/*
 * linux/ipc/shm.c
 * Copyright (C) 1992, 1993 Krishna Balasubramanian
 *	 Many improvements/fixes by Bruno Haible.
 * Replaced `struct shm_desc' by `struct vm_area_struct', July 1994.
 * Fixed the shm swap deallocation (shm_unuse()), August 1998 Andrea Arcangeli.
 *
 * /proc/sysvipc/shm support (c) 1999 Dragos Acostachioaie <dragos@iname.com>
 * BIGMEM support, Andrea Arcangeli <andrea@suse.de>
 * SMP thread shm, Jean-Luc Boyard <jean-luc.boyard@siemens.fr>
 * HIGHMEM support, Ingo Molnar <mingo@redhat.com>
 * Make shmmax, shmall, shmmni sysctl'able, Christoph Rohland <cr@sap.com>
 * Shared /dev/zero support, Kanoj Sarcar <kanoj@sgi.com>
 * Move the mm functionality over to mm/shmem.c, Christoph Rohland <cr@sap.com>
 *
 */

#include <linux/config.h>
#include <linux/slab.h>
#include <linux/mm.h>
#include <linux/hugetlb.h>
#include <linux/shm.h>
#include <linux/init.h>
#include <linux/file.h>
#include <linux/mman.h>
#include <linux/shmem_fs.h>
#include <linux/security.h>
#include <linux/syscalls.h>
#include <linux/audit.h>
#include <linux/capability.h>
#include <linux/ptrace.h>
#include <linux/seq_file.h>
#include <linux/mutex.h>

#include <asm/uaccess.h>

#include "util.h"

static struct file_operations shm_file_operations;
static struct vm_operations_struct shm_vm_ops;

static struct ipc_ids shm_ids;

#define shm_lock(id)	((struct shmid_kernel*)ipc_lock(&shm_ids,id))
#define shm_unlock(shp)	ipc_unlock(&(shp)->shm_perm)
#define shm_get(id)	((struct shmid_kernel*)ipc_get(&shm_ids,id))
#define shm_buildid(id, seq) \
	ipc_buildid(&shm_ids, id, seq)

static int newseg (key_t key, int shmflg, size_t size);
static void shm_open (struct vm_area_struct *shmd);
static void shm_close (struct vm_area_struct *shmd);
#ifdef CONFIG_PROC_FS
static int sysvipc_shm_proc_show(struct seq_file *s, void *it);
#endif

size_t	shm_ctlmax = SHMMAX;
size_t 	shm_ctlall = SHMALL;
int 	shm_ctlmni = SHMMNI;

static int shm_tot; /* total number of shared memory pages */

void __init shm_init (void)
{
	ipc_init_ids(&shm_ids, 1);
	ipc_init_proc_interface("sysvipc/shm",
				"       key      shmid perms       size  cpid  lpid nattch   uid   gid  cuid  cgid      atime      dtime      ctime\n",
				&shm_ids,
				sysvipc_shm_proc_show);
}

static inline int shm_checkid(struct shmid_kernel *s, int id)
{
	if (ipc_checkid(&shm_ids,&s->shm_perm,id))
		return -EIDRM;
	return 0;
}

static inline struct shmid_kernel *shm_rmid(int id)
{
	return (struct shmid_kernel *)ipc_rmid(&shm_ids,id);
}

static inline int shm_addid(struct shmid_kernel *shp)
{
	return ipc_addid(&shm_ids, &shp->shm_perm, shm_ctlmni);
}



static inline void shm_inc (int id) {
	struct shmid_kernel *shp;

	shp = shm_lock(id);
	BUG_ON(!shp);
	shp->shm_atim = get_seconds();
	shp->shm_lprid = current->tgid;
	shp->shm_nattch++;
	shm_unlock(shp);
}

/* This is called by fork, once for every shm attach. */
static void shm_open (struct vm_area_struct *shmd)
{
	shm_inc (shmd->vm_file->f_dentry->d_inode->i_ino);
}

/*
 * shm_destroy - free the struct shmid_kernel
 *
 * @shp: struct to free
 *
 * It has to be called with shp and shm_ids.mutex locked,
 * but returns with shp unlocked and freed.
 */
static void shm_destroy (struct shmid_kernel *shp)
{
	shm_tot -= (shp->shm_segsz + PAGE_SIZE - 1) >> PAGE_SHIFT;
	shm_rmid (shp->id);
	shm_unlock(shp);
	if (!is_file_hugepages(shp->shm_file))
		shmem_lock(shp->shm_file, 0, shp->mlock_user);
	else
		user_shm_unlock(shp->shm_file->f_dentry->d_inode->i_size,
						shp->mlock_user);
	fput (shp->shm_file);
	security_shm_free(shp);
	ipc_rcu_putref(shp);
}

/*
 * remove the attach descriptor shmd.
 * free memory for segment if it is marked destroyed.
 * The descriptor has already been removed from the current->mm->mmap list
 * and will later be kfree()d.
 */
static void shm_close (struct vm_area_struct *shmd)
{
	struct file * file = shmd->vm_file;
	int id = file->f_dentry->d_inode->i_ino;
	struct shmid_kernel *shp;

	mutex_lock(&shm_ids.mutex);
	/* remove from the list of attaches of the shm segment */
	shp = shm_lock(id);
	BUG_ON(!shp);
	shp->shm_lprid = current->tgid;
	shp->shm_dtim = get_seconds();
	shp->shm_nattch--;
	if(shp->shm_nattch == 0 &&
	   shp->shm_perm.mode & SHM_DEST)
		shm_destroy (shp);
	else
		shm_unlock(shp);
	mutex_unlock(&shm_ids.mutex);
}

static int shm_mmap(struct file * file, struct vm_area_struct * vma)
{
	int ret;

	ret = shmem_mmap(file, vma);
	if (ret == 0) {
		vma->vm_ops = &shm_vm_ops;
		if (!(vma->vm_flags & VM_WRITE))
			vma->vm_flags &= ~VM_MAYWRITE;
		shm_inc(file->f_dentry->d_inode->i_ino);
	}

	return ret;
}

static struct file_operations shm_file_operations = {
	.mmap	= shm_mmap,
#ifndef CONFIG_MMU
	.get_unmapped_area = shmem_get_unmapped_area,
#endif
};

static struct vm_operations_struct shm_vm_ops = {
	.open	= shm_open,	/* callback for a new vm-area open */
	.close	= shm_close,	/* callback for when the vm-area is released */
	.nopage	= shmem_nopage,
#if defined(CONFIG_NUMA) && defined(CONFIG_SHMEM)
	.set_policy = shmem_set_policy,
	.get_policy = shmem_get_policy,
#endif
};

static int newseg (key_t key, int shmflg, size_t size)
{
	int error;
	struct shmid_kernel *shp;
	int numpages = (size + PAGE_SIZE -1) >> PAGE_SHIFT;
	struct file * file;
	char name[13];
	int id;

	if (size < SHMMIN || size > shm_ctlmax)
		return -EINVAL;

	if (shm_tot + numpages >= shm_ctlall)
		return -ENOSPC;

	shp = ipc_rcu_alloc(sizeof(*shp));
	if (!shp)
		return -ENOMEM;

	shp->shm_perm.key = key;
	shp->shm_perm.mode = (shmflg & S_IRWXUGO);
	shp->mlock_user = NULL;

	shp->shm_perm.security = NULL;
	error = security_shm_alloc(shp);
	if (error) {
		ipc_rcu_putref(shp);
		return error;
	}

	if (shmflg & SHM_HUGETLB) {
		/* hugetlb_zero_setup takes care of mlock user accounting */
		file = hugetlb_zero_setup(size);
		shp->mlock_user = current->user;
	} else {
		int acctflag = VM_ACCOUNT;
		/*
		 * Do not allow no accounting for OVERCOMMIT_NEVER, even
	 	 * if it's asked for.
		 */
		if  ((shmflg & SHM_NORESERVE) &&
				sysctl_overcommit_memory != OVERCOMMIT_NEVER)
			acctflag = 0;
		sprintf (name, "SYSV%08x", key);
		file = shmem_file_setup(name, size, acctflag);
	}
	error = PTR_ERR(file);
	if (IS_ERR(file))
		goto no_file;

	error = -ENOSPC;
	id = shm_addid(shp);
	if(id == -1) 
		goto no_id;

	shp->shm_cprid = current->tgid;
	shp->shm_lprid = 0;
	shp->shm_atim = shp->shm_dtim = 0;
	shp->shm_ctim = get_seconds();
	shp->shm_segsz = size;
	shp->shm_nattch = 0;
	shp->id = shm_buildid(id,shp->shm_perm.seq);
	shp->shm_file = file;
	file->f_dentry->d_inode->i_ino = shp->id;

	/* Hugetlb ops would have already been assigned. */
	if (!(shmflg & SHM_HUGETLB))
		file->f_op = &shm_file_operations;

	shm_tot += numpages;
	shm_unlock(shp);
	return shp->id;

no_id:
	fput(file);
no_file:
	security_shm_free(shp);
	ipc_rcu_putref(shp);
	return error;
}

asmlinkage long sys_shmget (key_t key, size_t size, int shmflg)
{
	struct shmid_kernel *shp;
	int err, id = 0;

	mutex_lock(&shm_ids.mutex);
	if (key == IPC_PRIVATE) {
		err = newseg(key, shmflg, size);
	} else if ((id = ipc_findkey(&shm_ids, key)) == -1) {
		if (!(shmflg & IPC_CREAT))
			err = -ENOENT;
		else
			err = newseg(key, shmflg, size);
	} else if ((shmflg & IPC_CREAT) && (shmflg & IPC_EXCL)) {
		err = -EEXIST;
	} else {
		shp = shm_lock(id);
		BUG_ON(shp==NULL);
		if (shp->shm_segsz < size)
			err = -EINVAL;
		else if (ipcperms(&shp->shm_perm, shmflg))
			err = -EACCES;
		else {
			int shmid = shm_buildid(id, shp->shm_perm.seq);
			err = security_shm_associate(shp, shmflg);
			if (!err)
				err = shmid;
		}
		shm_unlock(shp);
	}
	mutex_unlock(&shm_ids.mutex);

	return err;
}

static inline unsigned long copy_shmid_to_user(void __user *buf, struct shmid64_ds *in, int version)
{
	switch(version) {
	case IPC_64:
		return copy_to_user(buf, in, sizeof(*in));
	case IPC_OLD:
	    {
		struct shmid_ds out;

		ipc64_perm_to_ipc_perm(&in->shm_perm, &out.shm_perm);
		out.shm_segsz	= in->shm_segsz;
		out.shm_atime	= in->shm_atime;
		out.shm_dtime	= in->shm_dtime;
		out.shm_ctime	= in->shm_ctime;
		out.shm_cpid	= in->shm_cpid;
		out.shm_lpid	= in->shm_lpid;
		out.shm_nattch	= in->shm_nattch;

		return copy_to_user(buf, &out, sizeof(out));
	    }
	default:
		return -EINVAL;
	}
}

struct shm_setbuf {
	uid_t	uid;
	gid_t	gid;
	mode_t	mode;
};	

static inline unsigned long copy_shmid_from_user(struct shm_setbuf *out, void __user *buf, int version)
{
	switch(version) {
	case IPC_64:
	    {
		struct shmid64_ds tbuf;

		if (copy_from_user(&tbuf, buf, sizeof(tbuf)))
			return -EFAULT;

		out->uid	= tbuf.shm_perm.uid;
		out->gid	= tbuf.shm_perm.gid;
		out->mode	= tbuf.shm_perm.mode;

		return 0;
	    }
	case IPC_OLD:
	    {
		struct shmid_ds tbuf_old;

		if (copy_from_user(&tbuf_old, buf, sizeof(tbuf_old)))
			return -EFAULT;

		out->uid	= tbuf_old.shm_perm.uid;
		out->gid	= tbuf_old.shm_perm.gid;
		out->mode	= tbuf_old.shm_perm.mode;

		return 0;
	    }
	default:
		return -EINVAL;
	}
}

static inline unsigned long copy_shminfo_to_user(void __user *buf, struct shminfo64 *in, int version)
{
	switch(version) {
	case IPC_64:
		return copy_to_user(buf, in, sizeof(*in));
	case IPC_OLD:
	    {
		struct shminfo out;

		if(in->shmmax > INT_MAX)
			out.shmmax = INT_MAX;
		else
			out.shmmax = (int)in->shmmax;

		out.shmmin	= in->shmmin;
		out.shmmni	= in->shmmni;
		out.shmseg	= in->shmseg;
		out.shmall	= in->shmall; 

		return copy_to_user(buf, &out, sizeof(out));
	    }
	default:
		return -EINVAL;
	}
}

static void shm_get_stat(unsigned long *rss, unsigned long *swp) 
{
	int i;

	*rss = 0;
	*swp = 0;

	for (i = 0; i <= shm_ids.max_id; i++) {
		struct shmid_kernel *shp;
		struct inode *inode;

		shp = shm_get(i);
		if(!shp)
			continue;

		inode = shp->shm_file->f_dentry->d_inode;

		if (is_file_hugepages(shp->shm_file)) {
			struct address_space *mapping = inode->i_mapping;
			*rss += (HPAGE_SIZE/PAGE_SIZE)*mapping->nrpages;
		} else {
			struct shmem_inode_info *info = SHMEM_I(inode);
			spin_lock(&info->lock);
			*rss += inode->i_mapping->nrpages;
			*swp += info->swapped;
			spin_unlock(&info->lock);
		}
	}
}

asmlinkage long sys_shmctl (int shmid, int cmd, struct shmid_ds __user *buf)
{
	struct shm_setbuf setbuf;
	struct shmid_kernel *shp;
	int err, version;

	if (cmd < 0 || shmid < 0) {
		err = -EINVAL;
		goto out;
	}

	version = ipc_parse_version(&cmd);

	switch (cmd) { /* replace with proc interface ? */
	case IPC_INFO:
	{
		struct shminfo64 shminfo;

		err = security_shm_shmctl(NULL, cmd);
		if (err)
			return err;

		memset(&shminfo,0,sizeof(shminfo));
		shminfo.shmmni = shminfo.shmseg = shm_ctlmni;
		shminfo.shmmax = shm_ctlmax;
		shminfo.shmall = shm_ctlall;

		shminfo.shmmin = SHMMIN;
		if(copy_shminfo_to_user (buf, &shminfo, version))
			return -EFAULT;
		/* reading a integer is always atomic */
		err= shm_ids.max_id;
		if(err<0)
			err = 0;
		goto out;
	}
	case SHM_INFO:
	{
		struct shm_info shm_info;

		err = security_shm_shmctl(NULL, cmd);
		if (err)
			return err;

		memset(&shm_info,0,sizeof(shm_info));
		mutex_lock(&shm_ids.mutex);
		shm_info.used_ids = shm_ids.in_use;
		shm_get_stat (&shm_info.shm_rss, &shm_info.shm_swp);
		shm_info.shm_tot = shm_tot;
		shm_info.swap_attempts = 0;
		shm_info.swap_successes = 0;
		err = shm_ids.max_id;
		mutex_unlock(&shm_ids.mutex);
		if(copy_to_user (buf, &shm_info, sizeof(shm_info))) {
			err = -EFAULT;
			goto out;
		}

		err = err < 0 ? 0 : err;
		goto out;
	}
	case SHM_STAT:
	case IPC_STAT:
	{
		struct shmid64_ds tbuf;
		int result;
		memset(&tbuf, 0, sizeof(tbuf));
		shp = shm_lock(shmid);
		if(shp==NULL) {
			err = -EINVAL;
			goto out;
		} else if(cmd==SHM_STAT) {
			err = -EINVAL;
			if (shmid > shm_ids.max_id)
				goto out_unlock;
			result = shm_buildid(shmid, shp->shm_perm.seq);
		} else {
			err = shm_checkid(shp,shmid);
			if(err)
				goto out_unlock;
			result = 0;
		}
		err=-EACCES;
		if (ipcperms (&shp->shm_perm, S_IRUGO))
			goto out_unlock;
		err = security_shm_shmctl(shp, cmd);
		if (err)
			goto out_unlock;
		kernel_to_ipc64_perm(&shp->shm_perm, &tbuf.shm_perm);
		tbuf.shm_segsz	= shp->shm_segsz;
		tbuf.shm_atime	= shp->shm_atim;
		tbuf.shm_dtime	= shp->shm_dtim;
		tbuf.shm_ctime	= shp->shm_ctim;
		tbuf.shm_cpid	= shp->shm_cprid;
		tbuf.shm_lpid	= shp->shm_lprid;
		if (!is_file_hugepages(shp->shm_file))
			tbuf.shm_nattch	= shp->shm_nattch;
		else
			tbuf.shm_nattch = file_count(shp->shm_file) - 1;
		shm_unlock(shp);
		if(copy_shmid_to_user (buf, &tbuf, version))
			err = -EFAULT;
		else
			err = result;
		goto out;
	}
	case SHM_LOCK:
	case SHM_UNLOCK:
	{
		shp = shm_lock(shmid);
		if(shp==NULL) {
			err = -EINVAL;
			goto out;
		}
		err = shm_checkid(shp,shmid);
		if(err)
			goto out_unlock;

		if (!capable(CAP_IPC_LOCK)) {
			err = -EPERM;
			if (current->euid != shp->shm_perm.uid &&
			    current->euid != shp->shm_perm.cuid)
				goto out_unlock;
			if (cmd == SHM_LOCK &&
			    !current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur)
				goto out_unlock;
		}

		err = security_shm_shmctl(shp, cmd);
		if (err)
			goto out_unlock;
		
		if(cmd==SHM_LOCK) {
			struct user_struct * user = current->user;
			if (!is_file_hugepages(shp->shm_file)) {
				err = shmem_lock(shp->shm_file, 1, user);
				if (!err) {
					shp->shm_perm.mode |= SHM_LOCKED;
					shp->mlock_user = user;
				}
			}
		} else if (!is_file_hugepages(shp->shm_file)) {
			shmem_lock(shp->shm_file, 0, shp->mlock_user);
			shp->shm_perm.mode &= ~SHM_LOCKED;
			shp->mlock_user = NULL;
		}
		shm_unlock(shp);
		goto out;
	}
	case IPC_RMID:
	{
		/*
		 *	We cannot simply remove the file. The SVID states
		 *	that the block remains until the last person
		 *	detaches from it, then is deleted. A shmat() on
		 *	an RMID segment is legal in older Linux and if 
		 *	we change it apps break...
		 *
		 *	Instead we set a destroyed flag, and then blow
		 *	the name away when the usage hits zero.
		 */
		mutex_lock(&shm_ids.mutex);
		shp = shm_lock(shmid);
		err = -EINVAL;
		if (shp == NULL) 
			goto out_up;
		err = shm_checkid(shp, shmid);
		if(err)
			goto out_unlock_up;

		if (current->euid != shp->shm_perm.uid &&
		    current->euid != shp->shm_perm.cuid && 
		    !capable(CAP_SYS_ADMIN)) {
			err=-EPERM;
			goto out_unlock_up;
		}

		err = security_shm_shmctl(shp, cmd);
		if (err)
			goto out_unlock_up;

		if (shp->shm_nattch){
			shp->shm_perm.mode |= SHM_DEST;
			/* Do not find it any more */
			shp->shm_perm.key = IPC_PRIVATE;
			shm_unlock(shp);
		} else
			shm_destroy (shp);
		mutex_unlock(&shm_ids.mutex);
		goto out;
	}

	case IPC_SET:
	{
		if (copy_shmid_from_user (&setbuf, buf, version)) {
			err = -EFAULT;
			goto out;
		}
		mutex_lock(&shm_ids.mutex);
		shp = shm_lock(shmid);
		err=-EINVAL;
		if(shp==NULL)
			goto out_up;
		if ((err = audit_ipc_perms(0, setbuf.uid, setbuf.gid,
					setbuf.mode, &(shp->shm_perm))))
			goto out_unlock_up;
		err = shm_checkid(shp,shmid);
		if(err)
			goto out_unlock_up;
		err=-EPERM;
		if (current->euid != shp->shm_perm.uid &&
		    current->euid != shp->shm_perm.cuid && 
		    !capable(CAP_SYS_ADMIN)) {
			goto out_unlock_up;
		}

		err = security_shm_shmctl(shp, cmd);
		if (err)
			goto out_unlock_up;
		
		shp->shm_perm.uid = setbuf.uid;
		shp->shm_perm.gid = setbuf.gid;
		shp->shm_perm.mode = (shp->shm_perm.mode & ~S_IRWXUGO)
			| (setbuf.mode & S_IRWXUGO);
		shp->shm_ctim = get_seconds();
		break;
	}

	default:
		err = -EINVAL;
		goto out;
	}

	err = 0;
out_unlock_up:
	shm_unlock(shp);
out_up:
	mutex_unlock(&shm_ids.mutex);
	goto out;
out_unlock:
	shm_unlock(shp);
out:
	return err;
}

/*
 * Fix shmaddr, allocate descriptor, map shm, add attach descriptor to lists.
 *
 * NOTE! Despite the name, this is NOT a direct system call entrypoint. The
 * "raddr" thing points to kernel space, and there has to be a wrapper around
 * this.
 */
long do_shmat(int shmid, char __user *shmaddr, int shmflg, ulong *raddr)
{
	struct shmid_kernel *shp;
	unsigned long addr;
	unsigned long size;
	struct file * file;
	int    err;
	unsigned long flags;
	unsigned long prot;
	unsigned long o_flags;
	int acc_mode;
	void *user_addr;

	if (shmid < 0) {
		err = -EINVAL;
		goto out;
	} else if ((addr = (ulong)shmaddr)) {
		if (addr & (SHMLBA-1)) {
			if (shmflg & SHM_RND)
				addr &= ~(SHMLBA-1);	   /* round down */
			else
#ifndef __ARCH_FORCE_SHMLBA
				if (addr & ~PAGE_MASK)
#endif
					return -EINVAL;
		}
		flags = MAP_SHARED | MAP_FIXED;
	} else {
		if ((shmflg & SHM_REMAP))
			return -EINVAL;

		flags = MAP_SHARED;
	}

	if (shmflg & SHM_RDONLY) {
		prot = PROT_READ;
		o_flags = O_RDONLY;
		acc_mode = S_IRUGO;
	} else {
		prot = PROT_READ | PROT_WRITE;
		o_flags = O_RDWR;
		acc_mode = S_IRUGO | S_IWUGO;
	}
	if (shmflg & SHM_EXEC) {
		prot |= PROT_EXEC;
		acc_mode |= S_IXUGO;
	}

	/*
	 * We cannot rely on the fs check since SYSV IPC does have an
	 * additional creator id...
	 */
	shp = shm_lock(shmid);
	if(shp == NULL) {
		err = -EINVAL;
		goto out;
	}
	err = shm_checkid(shp,shmid);
	if (err) {
		shm_unlock(shp);
		goto out;
	}
	if (ipcperms(&shp->shm_perm, acc_mode)) {
		shm_unlock(shp);
		err = -EACCES;
		goto out;
	}

	err = security_shm_shmat(shp, shmaddr, shmflg);
	if (err) {
		shm_unlock(shp);
		return err;
	}
		
	file = shp->shm_file;
	size = i_size_read(file->f_dentry->d_inode);
	shp->shm_nattch++;
	shm_unlock(shp);

	down_write(&current->mm->mmap_sem);
	if (addr && !(shmflg & SHM_REMAP)) {
		user_addr = ERR_PTR(-EINVAL);
		if (find_vma_intersection(current->mm, addr, addr + size))
			goto invalid;
		/*
		 * If shm segment goes below stack, make sure there is some
		 * space left for the stack to grow (at least 4 pages).
		 */
		if (addr < current->mm->start_stack &&
		    addr > current->mm->start_stack - size - PAGE_SIZE * 5)
			goto invalid;
	}
		
	user_addr = (void*) do_mmap (file, addr, size, prot, flags, 0);

invalid:
	up_write(&current->mm->mmap_sem);

	mutex_lock(&shm_ids.mutex);
	shp = shm_lock(shmid);
	BUG_ON(!shp);
	shp->shm_nattch--;
	if(shp->shm_nattch == 0 &&
	   shp->shm_perm.mode & SHM_DEST)
		shm_destroy (shp);
	else
		shm_unlock(shp);
	mutex_unlock(&shm_ids.mutex);

	*raddr = (unsigned long) user_addr;
	err = 0;
	if (IS_ERR(user_addr))
		err = PTR_ERR(user_addr);
out:
	return err;
}

asmlinkage long sys_shmat(int shmid, char __user *shmaddr, int shmflg)
{
	unsigned long ret;
	long err;

	err = do_shmat(shmid, shmaddr, shmflg, &ret);
	if (err)
		return err;
	force_successful_syscall_return();
	return (long)ret;
}

/*
 * detach and kill segment if marked destroyed.
 * The work is done in shm_close.
 */
asmlinkage long sys_shmdt(char __user *shmaddr)
{
	struct mm_struct *mm = current->mm;
	struct vm_area_struct *vma, *next;
	unsigned long addr = (unsigned long)shmaddr;
	loff_t size = 0;
	int retval = -EINVAL;

	if (addr & ~PAGE_MASK)
		return retval;

	down_write(&mm->mmap_sem);

	/*
	 * This function tries to be smart and unmap shm segments that
	 * were modified by partial mlock or munmap calls:
	 * - It first determines the size of the shm segment that should be
	 *   unmapped: It searches for a vma that is backed by shm and that
	 *   started at address shmaddr. It records it's size and then unmaps
	 *   it.
	 * - Then it unmaps all shm vmas that started at shmaddr and that
	 *   are within the initially determined size.
	 * Errors from do_munmap are ignored: the function only fails if
	 * it's called with invalid parameters or if it's called to unmap
	 * a part of a vma. Both calls in this function are for full vmas,
	 * the parameters are directly copied from the vma itself and always
	 * valid - therefore do_munmap cannot fail. (famous last words?)
	 */
	/*
	 * If it had been mremap()'d, the starting address would not
	 * match the usual checks anyway. So assume all vma's are
	 * above the starting address given.
	 */
	vma = find_vma(mm, addr);

	while (vma) {
		next = vma->vm_next;

		/*
		 * Check if the starting address would match, i.e. it's
		 * a fragment created by mprotect() and/or munmap(), or it
		 * otherwise it starts at this address with no hassles.
		 */
		if ((vma->vm_ops == &shm_vm_ops || is_vm_hugetlb_page(vma)) &&
			(vma->vm_start - addr)/PAGE_SIZE == vma->vm_pgoff) {


			size = vma->vm_file->f_dentry->d_inode->i_size;
			do_munmap(mm, vma->vm_start, vma->vm_end - vma->vm_start);
			/*
			 * We discovered the size of the shm segment, so
			 * break out of here and fall through to the next
			 * loop that uses the size information to stop
			 * searching for matching vma's.
			 */
			retval = 0;
			vma = next;
			break;
		}
		vma = next;
	}

	/*
	 * We need look no further than the maximum address a fragment
	 * could possibly have landed at. Also cast things to loff_t to
	 * prevent overflows and make comparisions vs. equal-width types.
	 */
	size = PAGE_ALIGN(size);
	while (vma && (loff_t)(vma->vm_end - addr) <= size) {
		next = vma->vm_next;

		/* finding a matching vma now does not alter retval */
		if ((vma->vm_ops == &shm_vm_ops || is_vm_hugetlb_page(vma)) &&
			(vma->vm_start - addr)/PAGE_SIZE == vma->vm_pgoff)

			do_munmap(mm, vma->vm_start, vma->vm_end - vma->vm_start);
		vma = next;
	}

	up_write(&mm->mmap_sem);
	return retval;
}

#ifdef CONFIG_PROC_FS
static int sysvipc_shm_proc_show(struct seq_file *s, void *it)
{
	struct shmid_kernel *shp = it;
	char *format;

#define SMALL_STRING "%10d %10d  %4o %10u %5u %5u  %5d %5u %5u %5u %5u %10lu %10lu %10lu\n"
#define BIG_STRING   "%10d %10d  %4o %21u %5u %5u  %5d %5u %5u %5u %5u %10lu %10lu %10lu\n"

	if (sizeof(size_t) <= sizeof(int))
		format = SMALL_STRING;
	else
		format = BIG_STRING;
	return seq_printf(s, format,
			  shp->shm_perm.key,
			  shp->id,
			  shp->shm_perm.mode,
			  shp->shm_segsz,
			  shp->shm_cprid,
			  shp->shm_lprid,
			  is_file_hugepages(shp->shm_file) ? (file_count(shp->shm_file) - 1) : shp->shm_nattch,
			  shp->shm_perm.uid,
			  shp->shm_perm.gid,
			  shp->shm_perm.cuid,
			  shp->shm_perm.cgid,
			  shp->shm_atim,
			  shp->shm_dtim,
			  shp->shm_ctim);
}
#endif
lass='add'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/pixfmt-srggb10dpcm8.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/pixfmt-srggb10dpcm8.xml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/pixfmt.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/pixfmt.xml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/subdev-image-processing-crop.dia?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/subdev-image-processing-crop.dia</a></td><td class='right'>614</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/subdev-image-processing-crop.svg?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/subdev-image-processing-crop.svg</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/subdev-image-processing-full.dia?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/subdev-image-processing-full.dia</a></td><td class='right'>1588</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 74.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/subdev-image-processing-full.svg?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/subdev-image-processing-full.svg</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/subdev-image-processing-scaling-multi-source.dia?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/subdev-image-processing-scaling-multi-source.dia</a></td><td class='right'>1152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/subdev-image-processing-scaling-multi-source.svg?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/subdev-image-processing-scaling-multi-source.svg</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/v4l2.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/v4l2.xml</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-create-bufs.xml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-cropcap.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-cropcap.xml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-dv-timings-cap.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-dv-timings-cap.xml</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-enum-dv-timings.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-enum-dv-timings.xml</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-enuminput.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-enuminput.xml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-enumoutput.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-enumoutput.xml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-g-crop.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-crop.xml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-g-fmt.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-fmt.xml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-g-frequency.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-frequency.xml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-g-parm.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-parm.xml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-g-tuner.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-tuner.xml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-queryctrl.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-queryctrl.xml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-reqbufs.xml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/DocBook/media/v4l/vidioc-subdev-g-selection.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-subdev-g-selection.xml</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/DocBook/mtdnand.tmpl?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/mtdnand.tmpl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/HOWTO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/HOWTO</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/RCU/torture.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/RCU/torture.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/SubmittingPatches?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/SubmittingPatches</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/arm/00-INDEX?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/arm/00-INDEX</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/arm/IXP2000?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/arm/IXP2000</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/arm/OMAP/DSS?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/arm/OMAP/DSS</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/arm/SPEAr/overview.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/arm/SPEAr/overview.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/blackfin/bfin-gpio-notes.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/blackfin/bfin-gpio-notes.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/cgroups/memory.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/cgroups/memory.txt</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/cgroups/resource_counter.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/cgroups/resource_counter.txt</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/cris/README?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/cris/README</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/device-mapper/thin-provisioning.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/device-mapper/thin-provisioning.txt</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devices.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devices.txt</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/arch_timer.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/arch_timer.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/atmel-adc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/atmel-adc.txt</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/fsl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/fsl.txt</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/gic.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/gic.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/lpc32xx-mic.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/lpc32xx-mic.txt</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/lpc32xx.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/lpc32xx.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/mrvl/intc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/mrvl/intc.txt</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/mrvl/mrvl.txt</a> (renamed from Documentation/devicetree/bindings/arm/mrvl.txt)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/mrvl/timer.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/mrvl/timer.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/spear-timer.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/spear-timer.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/spear.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/spear.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/Documentation/devicetree/bindings/ata/ahci-platform.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/ata/ahci-platform.txt</a> (renamed from Documentation/devicetree/bindings/ata/calxeda-sata.txt)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/dma/snps-dma.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/dma/snps-dma.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/gpio-mxs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/gpio/gpio-mxs.txt</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/gpio-nmk.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/gpio/gpio-nmk.txt</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/gpio-stp-xway.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/gpio/gpio-stp-xway.txt</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/gpio/mrvl-gpio.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/i2c/i2c-mxs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/i2c-mxs.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/mrvl-i2c.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/i2c/mux.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/mux.txt</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/i2c/pnx.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/pnx.txt</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/i2c/samsung-i2c.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/samsung-i2c.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/i2c/xiic.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/xiic.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/input/spear-keyboard.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/input/spear-keyboard.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/input/touchscreen/lpc32xx-tsc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/input/touchscreen/lpc32xx-tsc.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/input/twl6040-vibra.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/input/twl6040-vibra.txt</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mfd/da9052-i2c.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mfd/da9052-i2c.txt</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mfd/tps65910.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mfd/tps65910.txt</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mfd/twl6040.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mfd/twl6040.txt</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/misc/bmp085.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/misc/bmp085.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/fsl-esdhc.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/mmc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/mmc.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/mmci.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/mmci.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/mxs-mmc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/mxs-mmc.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mtd/gpmi-nand.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mtd/gpmi-nand.txt</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mtd/mxc-nand.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mtd/mxc-nand.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/mtd/orion-nand.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mtd/orion-nand.txt</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/net/can/fsl-flexcan.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/fsl-fec.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/net/fsl-fec.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/lpc-eth.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/net/lpc-eth.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/mdio-mux-gpio.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/net/mdio-mux-gpio.txt</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/net/mdio-mux.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/net/mdio-mux.txt</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/fsl,imx51-pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/fsl,imx51-pinctrl.txt</a></td><td class='right'>787</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/fsl,imx53-pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/fsl,imx53-pinctrl.txt</a></td><td class='right'>1202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt</a></td><td class='right'>1628</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 74.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt</a></td><td class='right'>918</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinctrl/pinctrl_spear.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/pinctrl_spear.txt</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/regulator/fixed-regulator.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/regulator/fixed-regulator.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/regulator/tps62360-regulator.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/regulator/tps62360-regulator.txt</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/regulator/tps6586x.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/regulator/tps6586x.txt</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/rtc/spear-rtc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/rtc/spear-rtc.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/sound/mxs-audio-sgtl5000.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/mxs-audio-sgtl5000.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/sound/mxs-saif.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/mxs-saif.txt</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/sound/omap-dmic.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/omap-dmic.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/sound/omap-mcpdm.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/omap-mcpdm.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/sound/sgtl5000.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/sgtl5000.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/staging/iio/adc/spear-adc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/staging/iio/adc/spear-adc.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/isp1301.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/usb/isp1301.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/lpc32xx-udc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/usb/lpc32xx-udc.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/ohci-nxp.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/usb/ohci-nxp.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/spear-usb.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/usb/spear-usb.txt</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/usb/tegra-usb.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/usb/tegra-usb.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/bindings/vendor-prefixes.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/vendor-prefixes.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/devicetree/bindings/watchdog/pnx4008-wdt.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/watchdog/pnx4008-wdt.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/devicetree/booting-without-of.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/booting-without-of.txt</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/dma-buf-sharing.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/dma-buf-sharing.txt</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/driver-model/devres.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/driver-model/devres.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/Documentation/dvb/get_dvb_firmware?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/dvb/get_dvb_firmware</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/dvb/opera-firmware.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/dvb/opera-firmware.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/dynamic-debug-howto.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/dynamic-debug-howto.txt</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/edac.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/edac.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/eisa.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/eisa.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/extcon/porting-android-switch-class?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/extcon/porting-android-switch-class</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/feature-removal-schedule.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/feature-removal-schedule.txt</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/Locking?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/Locking</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/ext3.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/ext3.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/gfs2-glocks.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/gfs2-glocks.txt</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/gfs2.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/gfs2.txt</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/nfs/pnfs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/nfs/pnfs.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/porting?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/porting</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/proc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/proc.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/qnx6.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/qnx6.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/filesystems/vfs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/vfs.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/gpio.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/gpio.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/hwmon/ina2xx?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/hwmon/ina2xx</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/hwmon/it87?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/hwmon/it87</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/hwmon/wm831x?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/hwmon/wm831x</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/i2c/functionality?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/i2c/functionality</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/i2c/i2c-protocol?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/i2c/i2c-protocol</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/Documentation/i2c/muxes/i2c-mux-gpio?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/i2c/muxes/i2c-mux-gpio</a> (renamed from Documentation/i2c/muxes/gpio-i2cmux)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/initrd.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/initrd.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/ioctl/ioctl-number.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ioctl/ioctl-number.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/kbuild/kbuild.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/kbuild/kbuild.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/kbuild/kconfig.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/kbuild/kconfig.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/kernel-parameters.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/kernel-parameters.txt</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/leds/ledtrig-transient.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/leds/ledtrig-transient.txt</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/mca.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/mca.txt</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/media-framework.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/media-framework.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/memory-devices/ti-emif.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/memory-devices/ti-emif.txt</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/memory-hotplug.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/memory-hotplug.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/misc-devices/mei/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/misc-devices/mei/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/misc-devices/mei/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/misc-devices/mei/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/misc-devices/mei/TODO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/misc-devices/mei/TODO</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/Documentation/misc-devices/mei/mei-amt-version.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/misc-devices/mei/mei-amt-version.c</a> (renamed from drivers/staging/mei/mei-amt-version.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/Documentation/misc-devices/mei/mei.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/misc-devices/mei/mei.txt</a> (renamed from drivers/staging/mei/mei.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/00-INDEX?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/00-INDEX</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/networking/3c359.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/3c359.txt</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/3c509.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/3c509.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/batman-adv.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/batman-adv.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/can.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/can.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/fore200e.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/fore200e.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/ieee802154.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/ieee802154.txt</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/ip-sysctl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/ip-sysctl.txt</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/mac80211-auth-assoc-deauth.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/mac80211-auth-assoc-deauth.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/networking/olympic.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/olympic.txt</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/networking/smctr.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/smctr.txt</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/networking/stmmac.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/stmmac.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/networking/tms380tr.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/tms380tr.txt</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/nfc/nfc-hci.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/nfc/nfc-hci.txt</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/parisc/debugging?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/parisc/debugging</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/pinctrl.txt</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/power/charger-manager.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/power/charger-manager.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/power/power_supply_class.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/power/power_supply_class.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/power/regulator/regulator.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/power/regulator/regulator.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/power/suspend-and-cpuhotplug.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/power/suspend-and-cpuhotplug.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/ramoops.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ramoops.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/scheduler/sched-design-CFS.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scheduler/sched-design-CFS.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/scheduler/sched-domains.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scheduler/sched-domains.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/scsi/00-INDEX?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scsi/00-INDEX</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/scsi/ChangeLog.megaraid_sas?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scsi/ChangeLog.megaraid_sas</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/scsi/ibmmca.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scsi/ibmmca.txt</a></td><td class='right'>1402</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 22.2%;'/><td class='none' style='width: 77.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/scsi/scsi-parameters.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scsi/scsi-parameters.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/scsi/scsi_mid_low_api.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scsi/scsi_mid_low_api.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/serial/stallion.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/serial/stallion.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/sound/alsa/ALSA-Configuration.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/sound/alsa/ALSA-Configuration.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/sound/alsa/compress_offload.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/sound/alsa/compress_offload.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/sound/oss/ALS?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/sound/oss/ALS</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/Documentation/sparc/README-2.5?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/sparc/README-2.5</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/static-keys.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/static-keys.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/sysctl/fs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/sysctl/fs.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/sysctl/net.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/sysctl/net.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/trace/uprobetracer.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/trace/uprobetracer.txt</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/usb/dwc3.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/usb/dwc3.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/usb/functionfs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/usb/functionfs.txt</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/usb/wusb-cbaf?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/usb/wusb-cbaf</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/video4linux/4CCs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/video4linux/4CCs.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/video4linux/README.cpia2?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/video4linux/README.cpia2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/video4linux/gspca.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/video4linux/gspca.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/video4linux/v4l2-controls.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/video4linux/v4l2-controls.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/video4linux/v4l2-framework.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/video4linux/v4l2-framework.txt</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/virtual/kvm/api.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/virtual/kvm/api.txt</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/virtual/kvm/cpuid.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/virtual/kvm/cpuid.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/virtual/kvm/msr.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/virtual/kvm/msr.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/virtual/virtio-spec.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/virtual/virtio-spec.txt</a></td><td class='right'>1164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 81.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/vm/frontswap.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/vm/frontswap.txt</a></td><td class='right'>278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/vm/pagemap.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/vm/pagemap.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/vm/slub.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/vm/slub.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/vm/transhuge.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/vm/transhuge.txt</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/Documentation/vme_api.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/vme_api.txt</a> (renamed from drivers/staging/vme/vme_api.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/watchdog/src/watchdog-test.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/watchdog/src/watchdog-test.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/watchdog/watchdog-kernel-api.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/watchdog/watchdog-kernel-api.txt</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/watchdog/watchdog-parameters.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/watchdog/watchdog-parameters.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/Documentation/x86/efi-stub.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/x86/efi-stub.txt</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Documentation/zh_CN/magic-number.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/zh_CN/magic-number.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/MAINTAINERS?id=66dd07b88a1c9d446f32253da606b87324fa620e'>MAINTAINERS</a></td><td class='right'>361</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Makefile</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/README?id=66dd07b88a1c9d446f32253da606b87324fa620e'>README</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/Kconfig</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/gpio.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/include/asm/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/io.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/alpha/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/processor.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/include/asm/rtc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/rtc.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/include/asm/sysinfo.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/sysinfo.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/include/asm/unistd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/unistd.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/kernel/core_tsunami.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/core_tsunami.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/kernel/osf_sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/osf_sys.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/kernel/pci_iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/pci_iommu.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/kernel/perf_event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/perf_event.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/signal.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/smp.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/kernel/sys_marvel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/sys_marvel.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/alpha/kernel/systbls.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/systbls.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/Kconfig</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/Kconfig.debug?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/Kconfig.debug</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/compressed/head-xscale.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/compressed/head-xscale.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/compressed/head.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/compressed/head.S</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9260.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9260.dtsi</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9263.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9263.dtsi</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9263ek.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9263ek.dts</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9g20.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9g20.dtsi</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9g20ek.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9g20ek.dts</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9g20ek_2mmc.dts</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9g20ek_common.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9g20ek_common.dtsi</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9g45.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9g45.dtsi</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9n12.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9n12.dtsi</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9n12ek.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9n12ek.dts</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/at91sam9x5.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9x5.dtsi</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/db8500.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/db8500.dtsi</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/emev2-kzm9d.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/emev2-kzm9d.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/emev2.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/emev2.dtsi</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/ethernut5.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/ethernut5.dts</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5250-smdk5250.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/exynos5250-smdk5250.dts</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/exynos5250.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/exynos5250.dtsi</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx23-evk.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx23-evk.dts</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx23.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx23.dtsi</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx27-phytec-phycore.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx27-phytec-phycore.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx27.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx27.dtsi</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx28-evk.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx28-evk.dts</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx28.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx28.dtsi</a></td><td class='right'>497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx51-babbage.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx51-babbage.dts</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx51.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx51.dtsi</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx53-ard.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx53-ard.dts</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx53-evk.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx53-evk.dts</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx53-qsb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx53-qsb.dts</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx53-smd.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx53-smd.dts</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx53.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx53.dtsi</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6q-arm2.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx6q-arm2.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6q-sabrelite.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx6q-sabrelite.dts</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6q-sabresd.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx6q-sabresd.dts</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/imx6q.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx6q.dtsi</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-dns320.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/kirkwood-dns320.dts</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-dns325.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/kirkwood-dns325.dts</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-ib62x0.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/kirkwood-ib62x0.dts</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood-iconnect.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/kirkwood-iconnect.dts</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/kirkwood.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/kirkwood.dtsi</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/kizbox.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/kizbox.dts</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/lpc32xx.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/lpc32xx.dtsi</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/mmp2-brownstone.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/mmp2-brownstone.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/mmp2.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/mmp2.dtsi</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap3-beagle.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/omap3-beagle.dts</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap3.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/omap3.dtsi</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap4-panda.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/omap4-panda.dts</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap4-sdp.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/omap4-sdp.dts</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/omap4.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/omap4.dtsi</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/phy3250.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/phy3250.dts</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/pxa168.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/pxa168.dtsi</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/pxa910-dkb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/pxa910-dkb.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/pxa910.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/pxa910.dtsi</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/r8a7740-armadillo800eva.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/r8a7740-armadillo800eva.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sh7372.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/sh7372.dtsi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/sh73a0-kzm9g.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/sh73a0-kzm9g.dts</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/snowball.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/snowball.dts</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/spear1310-evb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear1310-evb.dts</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/spear1310.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear1310.dtsi</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/spear1340-evb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear1340-evb.dts</a></td><td class='right'>308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/spear1340.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear1340.dtsi</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/spear13xx.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear13xx.dtsi</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/spear300-evb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear300-evb.dts</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/spear300.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear300.dtsi</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/spear310-evb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear310-evb.dts</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/spear310.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear310.dtsi</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/spear320-evb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear320-evb.dts</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/spear320.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear320.dtsi</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/spear3xx.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear3xx.dtsi</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear600-evb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear600-evb.dts</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/spear600.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear600.dtsi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra-cardhu.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra-cardhu.dts</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra-harmony.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra-harmony.dts</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra-paz00.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra-paz00.dts</a></td><td class='right'>328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra-seaboard.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra-seaboard.dts</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra-trimslice.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra-trimslice.dts</a></td><td class='right'>307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra-ventana.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra-ventana.dts</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra20.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra20.dtsi</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/tegra30.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra30.dtsi</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/tny_a9260.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tny_a9260.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/tny_a9260_common.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tny_a9260_common.dtsi</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/tny_a9263.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tny_a9263.dts</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/tny_a9g20.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tny_a9g20.dts</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/twl4030.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/twl4030.dtsi</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/twl6030.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/twl6030.dtsi</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/usb_a9260.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/usb_a9260.dts</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/usb_a9260_common.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/usb_a9260_common.dtsi</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/boot/dts/usb_a9263.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/usb_a9263.dts</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/usb_a9g20.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/usb_a9g20.dts</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/versatile-ab.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/versatile-ab.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/versatile-pb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/versatile-pb.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/vexpress-v2p-ca5s.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/vexpress-v2p-ca5s.dts</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/boot/dts/vexpress-v2p-ca9.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/vexpress-v2p-ca9.dts</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/common/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/common/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/common/dmabounce.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/common/dmabounce.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/common/it8152.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/common/it8152.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/common/uengine.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/common/uengine.c</a></td><td class='right'>507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/common/via82c505.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/common/via82c505.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/common/vic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/common/vic.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/configs/armadillo800eva_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/armadillo800eva_defconfig</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/configs/at91_dt_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/at91_dt_defconfig</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/at91rm9200_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/at91rm9200_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/bcmring_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/bcmring_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/imx_v4_v5_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/imx_v4_v5_defconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/imx_v6_v7_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/imx_v6_v7_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/configs/ixp2000_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/ixp2000_defconfig</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/configs/ixp23xx_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/ixp23xx_defconfig</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/configs/kzm9g_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/kzm9g_defconfig</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/lpc32xx_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/lpc32xx_defconfig</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/mxs_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/mxs_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/nhk8815_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/nhk8815_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/omap2plus_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/omap2plus_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/configs/prima2_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/prima2_defconfig</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/rpc_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/rpc_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/configs/spear13xx_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/spear13xx_defconfig</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/spear3xx_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/spear3xx_defconfig</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/spear6xx_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/spear6xx_defconfig</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/tegra_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/tegra_defconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/configs/u8500_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/u8500_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/include/asm/arch_timer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/arch_timer.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/cacheflush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/cacheflush.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/cmpxchg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/cmpxchg.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/cpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/cpu.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/device.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/device.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/include/asm/dma-contiguous.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/dma-contiguous.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/include/asm/dma-iommu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/dma-iommu.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/dma-mapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/dma-mapping.h</a></td><td class='right'>407</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/glue-df.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/glue-df.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/glue-proc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/glue-proc.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/include/asm/hardware/cs89712.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/hardware/cs89712.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/include/asm/hardware/ep7212.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/hardware/ep7212.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/hardware/it8152.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/hardware/it8152.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/hardware/pl080.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/hardware/pl080.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/include/asm/hardware/uengine.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/hardware/uengine.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/io.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/mach/arch.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/mach/arch.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/mach/map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/mach/map.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/mach/pci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/mach/pci.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/mach/time.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/mach/time.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/mmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/mmu.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/mmu_context.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/mmu_context.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/page.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/page.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/pgtable-3level.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/pgtable-3level.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/processor.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/ptrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/ptrace.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/include/asm/syscall.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/syscall.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/thread_info.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/tlbflush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/tlbflush.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/include/asm/tls.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/tls.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/kernel/arch_timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/arch_timer.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/bios32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/bios32.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/entry-armv.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/entry-armv.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/entry-common.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/entry-common.S</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/head.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/head.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/init_task.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/irq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/perf_event_v6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/perf_event_v6.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/perf_event_v7.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/perf_event_v7.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/perf_event_xscale.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/perf_event_xscale.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/process.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/ptrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/ptrace.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/setup.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/signal.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/signal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/signal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/smp.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/smp_scu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/smp_scu.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/sys_arm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/sys_arm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/sys_oabi-compat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/sys_oabi-compat.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/thumbee.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/thumbee.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/time.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/kernel/traps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/traps.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/lib/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/lib/Makefile</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/lib/io-readsw-armv3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/lib/io-readsw-armv3.S</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/lib/io-writesw-armv3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/lib/io-writesw-armv3.S</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/lib/uaccess.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/lib/uaccess.S</a></td><td class='right'>564</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.9%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/Kconfig</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/Makefile</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/Makefile.boot</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91rm9200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91rm9200.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91rm9200_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91rm9200_devices.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91sam9260.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9260.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91sam9260_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9260_devices.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91sam9261.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9261.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91sam9261_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9261_devices.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91sam9263.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9263.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91sam9263_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9263_devices.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91sam9g45.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9g45.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91sam9g45_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9g45_devices.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-at91/at91sam9n12.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9n12.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91sam9rl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9rl.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91sam9rl_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9rl_devices.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/at91sam9x5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9x5.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-1arm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-1arm.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-afeb-9260v1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-afeb-9260v1.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-cam60.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-cam60.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-carmeva.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-carmeva.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-cpu9krea.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-cpu9krea.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-cpuat91.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-cpuat91.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-csb337.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-csb337.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-csb637.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-csb637.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-dt.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-eb9200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-eb9200.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-ecbat91.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-ecbat91.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-eco920.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-eco920.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-flexibity.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-flexibity.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-foxg20.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-foxg20.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-gsia18s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-gsia18s.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-kafa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-kafa.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-kb9202.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-kb9202.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-neocore926.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-neocore926.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-pcontrol-g20.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-pcontrol-g20.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-picotux200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-picotux200.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-qil-a9260.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-qil-a9260.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-rm9200dk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-rm9200dk.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-rm9200ek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-rm9200ek.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-rsi-ews.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-rsi-ews.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-sam9-l9260.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9-l9260.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-sam9260ek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9260ek.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-sam9261ek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9261ek.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-sam9263ek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9263ek.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-sam9g20ek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9g20ek.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-sam9m10g45ek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9m10g45ek.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-sam9rlek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9rlek.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-snapper9260.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-snapper9260.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-stamp9g20.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-stamp9g20.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-usb-a926x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-usb-a926x.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/board-yl-9200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-yl-9200.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/clock.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/cpuidle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/cpuidle.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/generic.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at91rm9200.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91rm9200.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at91sam9260.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9260.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at91sam9261.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9261.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at91sam9263.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9263.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at91sam9g45.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9g45.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at91sam9n12.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9n12.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at91sam9rl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9rl.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at91sam9x5.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9x5.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/at_hdmac.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at_hdmac.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/board.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/board.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/cpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/cpu.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/hardware.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/uncompress.h</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/pm.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/pm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/pm.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/pm_slowclock.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/pm_slowclock.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/setup.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-at91/soc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/soc.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-clps711x/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/Kconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-clps711x/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/common.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/mach-clps711x/include/mach/clps711x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/clps711x.h</a> (renamed from arch/arm/include/asm/hardware/clps7111.h)</td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-clps711x/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/debug-macro.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-clps711x/include/mach/entry-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/entry-macro.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-clps711x/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/hardware.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-clps711x/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/irqs.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-clps711x/include/mach/time.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/time.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-clps711x/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/uncompress.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-clps711x/p720t-leds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/p720t-leds.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-cns3xxx/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-cns3xxx/pcie.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/board-da830-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-da830-evm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/board-da850-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-da850-evm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/board-dm355-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-dm355-evm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/board-dm355-leopard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-dm355-leopard.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/board-dm365-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-dm365-evm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/board-dm644x-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-dm644x-evm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/board-dm646x-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-dm646x-evm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/board-mityomapl138.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-mityomapl138.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/board-neuros-osd2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-neuros-osd2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/board-omapl138-hawk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-omapl138-hawk.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/board-sffsdr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-sffsdr.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/board-tnetv107x-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-tnetv107x-evm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/clock.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/common.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/cpufreq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/cpufreq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/davinci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/davinci.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/devices-da8xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/devices-da8xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/dm355.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/dm355.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/dm365.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/dm365.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/dma.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/include/mach/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/common.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/include/mach/da8xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/da8xx.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/debug-macro.S</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/hardware.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/include/mach/psc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/psc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/include/mach/serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/serial.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/uncompress.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-davinci/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/pm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-dove/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-dove/common.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-dove/dove-db-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-dove/dove-db-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-dove/mpp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-dove/mpp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-dove/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-dove/pcie.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/adssphere.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/adssphere.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/core.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/crunch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/crunch.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/edb93xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/edb93xx.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/gesbc9312.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/gesbc9312.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/include/mach/platform.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/include/mach/platform.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/micro9.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/micro9.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/simone.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/simone.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/snappercl15.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/snappercl15.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/ts72xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/ts72xx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ep93xx/vision_ep9307.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/vision_ep9307.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/Kconfig</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/Makefile.boot</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/clock-exynos4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/clock-exynos4.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/clock-exynos4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/clock-exynos4.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/clock-exynos4210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/clock-exynos4210.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/clock-exynos4212.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/clock-exynos4212.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/clock-exynos5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/clock-exynos5.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/common.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/common.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/cpuidle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/cpuidle.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/dev-ahci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/dev-ahci.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/dev-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/dev-audio.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-exynos/dev-drm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/dev-drm.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/dev-sysmmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/dev-sysmmu.c</a></td><td class='right'>457</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/dma.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/include/mach/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/gpio.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/irqs.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/include/mach/map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/map.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/include/mach/pm-core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/pm-core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/include/mach/pmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/pmu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/include/mach/regs-clock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/regs-clock.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/include/mach/regs-pmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/regs-pmu.h</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-exynos/include/mach/regs-sysmmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/regs-sysmmu.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/include/mach/spi-clocks.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/spi-clocks.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/include/mach/sysmmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/sysmmu.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/mach-armlex4210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-armlex4210.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/mach-exynos4-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-exynos4-dt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/mach-exynos5-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-exynos5-dt.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/mach-nuri.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-nuri.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/mach-origen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-origen.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/mach-smdk4x12.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-smdk4x12.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/mach-smdkv310.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-smdkv310.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/mach-universal_c210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-universal_c210.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/mct.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mct.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/pm.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/pm_domains.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/pm_domains.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/pmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/pmu.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-exynos/setup-usb-phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/setup-usb-phy.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-footbridge/cats-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-footbridge/cats-pci.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-footbridge/dc21285.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-footbridge/dc21285.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-footbridge/ebsa285-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-footbridge/ebsa285-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-footbridge/netwinder-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-footbridge/netwinder-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-footbridge/personal-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-footbridge/personal-pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/Kconfig</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/Makefile</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/Makefile.boot</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-busy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-busy.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-gate2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-gate2.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-imx1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx1.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-imx21.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx21.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-imx25.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx25.c</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-imx27.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx27.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-imx31.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx31.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-imx35.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx35.c</a></td><td class='right'>278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-imx51-imx53.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx51-imx53.c</a></td><td class='right'>506</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-imx6q.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx6q.c</a></td><td class='right'>444</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-pfd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-pfd.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-pllv1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-pllv1.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-pllv2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-pllv2.c</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk-pllv3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-pllv3.c</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-imx/clk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/clock-imx1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clock-imx1.c</a></td><td class='right'>636</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.1%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/clock-imx21.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clock-imx21.c</a></td><td class='right'>1239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 19.6%;'/><td class='none' style='width: 80.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/clock-imx25.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clock-imx25.c</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/clock-imx27.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clock-imx27.c</a></td><td class='right'>785</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.4%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/clock-imx31.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clock-imx31.c</a></td><td class='right'>630</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.0%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/clock-imx35.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clock-imx35.c</a></td><td class='right'>536</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.5%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/clock-imx6q.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clock-imx6q.c</a></td><td class='right'>2111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 33.4%;'/><td class='none' style='width: 66.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/clock-mx51-mx53.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clock-mx51-mx53.c</a></td><td class='right'>1675</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 26.5%;'/><td class='none' style='width: 73.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/cpu-imx5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/cpu-imx5.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/crmregs-imx3.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/crmregs-imx3.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/eukrea_mbimx27-baseboard.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/eukrea_mbimx51-baseboard.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c</a> (renamed from arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c)</td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/imx27-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/imx27-dt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/imx51-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/imx51-dt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/imx53-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/imx53-dt.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/lluart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/lluart.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-cpuimx35.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-cpuimx35.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-cpuimx51.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-cpuimx51.c</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-cpuimx51sd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-cpuimx51sd.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-eukrea_cpuimx25.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-eukrea_cpuimx25.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-imx27_visstrim_m10.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-imx27_visstrim_m10.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-imx6q.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-imx6q.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-mx1ads.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx1ads.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-mx21ads.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx21ads.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-mx31_3ds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx31_3ds.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-mx31lite.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx31lite.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-mx31moboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx31moboard.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-mx35_3ds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx35_3ds.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-mx51_3ds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx51_3ds.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-mx51_babbage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx51_babbage.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-mx51_efikamx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx51_efikamx.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-mx51_efikasb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx51_efikasb.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-pcm037.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-pcm037.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-pcm037_eet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-pcm037_eet.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-pcm043.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-pcm043.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mach-vpr200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-vpr200.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mm-imx1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mm-imx1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mm-imx21.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mm-imx21.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mm-imx25.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mm-imx25.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mm-imx27.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mm-imx27.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mm-imx3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mm-imx3.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/mm-imx5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mm-imx5.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/pcm037.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/pcm037.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-imx/pm-imx3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/pm-imx3.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-integrator/impd1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/impd1.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-integrator/include/mach/entry-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/include/mach/entry-macro.S</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-integrator/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/include/mach/irqs.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-integrator/integrator_ap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/integrator_ap.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-integrator/integrator_cp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/integrator_cp.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-integrator/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/pci.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-integrator/pci_v3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/pci_v3.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-iop13xx/iq81340mc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop13xx/iq81340mc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-iop13xx/iq81340sc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop13xx/iq81340sc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-iop32x/em7210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop32x/em7210.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-iop32x/glantank.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop32x/glantank.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-iop32x/iq31244.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop32x/iq31244.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-iop32x/iq80321.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop32x/iq80321.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-iop32x/n2100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop32x/n2100.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-iop33x/iq80331.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop33x/iq80331.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-iop33x/iq80332.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop33x/iq80332.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/Kconfig</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/Makefile.boot</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/core.c</a></td><td class='right'>520</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.2%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/enp2611.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/enp2611.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/debug-macro.S</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/enp2611.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/enp2611.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/entry-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/entry-macro.S</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/hardware.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/io.h</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/irqs.h</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/ixdp2x00.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/ixdp2x00.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/ixdp2x01.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/ixdp2x01.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h</a></td><td class='right'>451</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.1%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/memory.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/memory.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/platform.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/platform.h</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/timex.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/timex.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/include/mach/uncompress.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/ixdp2400.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/ixdp2400.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/ixdp2800.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/ixdp2800.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/ixdp2x00.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/ixdp2x00.c</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/ixdp2x01.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/ixdp2x01.c</a></td><td class='right'>483</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.6%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp2000/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp2000/pci.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/Makefile.boot</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/core.c</a></td><td class='right'>455</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.2%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/espresso.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/espresso.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/include/mach/debug-macro.S</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/include/mach/entry-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/include/mach/entry-macro.S</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/include/mach/hardware.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/include/mach/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/include/mach/io.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/include/mach/irqs.h</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/include/mach/ixdp2351.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/include/mach/ixdp2351.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/include/mach/ixp23xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/include/mach/ixp23xx.h</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/include/mach/memory.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/include/mach/memory.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/include/mach/platform.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/include/mach/platform.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/include/mach/time.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/include/mach/time.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/include/mach/timex.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/include/mach/timex.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/include/mach/uncompress.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/ixdp2351.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/ixdp2351.c</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/pci.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ixp23xx/roadrunner.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp23xx/roadrunner.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/avila-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/avila-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/common-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/common-pci.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/common.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/coyote-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/coyote-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/dsmg600-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/dsmg600-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/fsg-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/fsg-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/gateway7001-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/gateway7001-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/goramo_mlr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/goramo_mlr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/gtwx5715-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/gtwx5715-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/include/mach/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/include/mach/gpio.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/include/mach/platform.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/include/mach/platform.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/ixdp425-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/ixdp425-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/ixdp425-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/ixdp425-setup.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/ixdpg425-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/ixdpg425-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/miccpt-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/miccpt-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/nas100d-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/nas100d-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/nslu2-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/nslu2-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/vulcan-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/vulcan-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ixp4xx/wg302v2-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/wg302v2-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/Makefile.boot</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/board-dnskw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/board-dnskw.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/board-dreamplug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/board-dreamplug.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/board-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/board-dt.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/board-ib62x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/board-ib62x0.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/board-iconnect.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/board-iconnect.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/common.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/common.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/include/mach/bridge-regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/include/mach/bridge-regs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/pcie.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/rd88f6192-nas-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/t5325-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/t5325-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-kirkwood/tsx1x-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/tsx1x-common.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ks8695/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ks8695/pci.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-lpc32xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-lpc32xx/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/clock.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-lpc32xx/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/common.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-lpc32xx/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/common.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-lpc32xx/include/mach/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/include/mach/gpio.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-lpc32xx/include/mach/i2c.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/include/mach/i2c.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-lpc32xx/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/irq.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-lpc32xx/phy3250.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/phy3250.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/Kconfig</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/aspenite.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/aspenite.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/devices.c</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/include/mach/addr-map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/addr-map.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/include/mach/devices.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/devices.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/include/mach/entry-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/entry-macro.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/irqs.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-mmp/include/mach/pm-mmp2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/pm-mmp2.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-mmp/include/mach/pm-pxa910.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/pm-pxa910.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/include/mach/pxa168.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/pxa168.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/include/mach/pxa910.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/pxa910.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/include/mach/regs-apbc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/regs-apbc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/include/mach/regs-apmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/regs-apmu.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-mmp/include/mach/regs-usb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/regs-usb.h</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-mmp/irq-mmp2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/irq-mmp2.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-mmp/irq-pxa168.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/irq-pxa168.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-mmp/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/irq.c</a></td><td class='right'>458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/mmp-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/mmp-dt.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-mmp/mmp2-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/mmp2-dt.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-mmp/pm-mmp2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/pm-mmp2.c</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-mmp/pm-pxa910.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/pm-pxa910.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/pxa168.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/pxa168.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/pxa910.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/pxa910.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/time.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mmp/ttc_dkb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/ttc_dkb.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/board-halibut.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-halibut.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/board-mahimahi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-mahimahi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/board-msm7x27.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-msm7x27.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/board-msm7x30.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-msm7x30.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/board-msm8960.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-msm8960.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/board-msm8x60.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-msm8x60.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/board-qsd8x50.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-qsd8x50.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/board-sapphire.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-sapphire.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/board-trout.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-trout.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/include/mach/board.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/include/mach/board.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/include/mach/debug-macro.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/scm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/scm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-msm/smd_debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/smd_debug.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mv78xx0/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mv78xx0/common.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mv78xx0/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mv78xx0/pcie.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-mxs/clock-mx23.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/clock-mx23.c</a></td><td class='right'>536</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.5%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-mxs/clock-mx28.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/clock-mx28.c</a></td><td class='right'>803</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.7%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-mxs/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/clock.c</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/devices-mx23.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices-mx23.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/devices-mx28.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices-mx28.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/devices/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/devices/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-mxs/devices/amba-duart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices/amba-duart.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/devices/platform-dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices/platform-dma.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/devices/platform-gpio-mxs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices/platform-gpio-mxs.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/devices/platform-mxs-mmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices/platform-mxs-mmc.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-mxs/include/mach/clock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/include/mach/clock.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/include/mach/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/include/mach/common.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/include/mach/devices-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/include/mach/devices-common.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/mach-apx4devkit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-apx4devkit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/mach-m28evk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-m28evk.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/mach-mx23evk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-mx23evk.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/mach-mx28evk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-mx28evk.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-mxs/mach-mxs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-mxs.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/mach-stmp378x_devb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-stmp378x_devb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/mach-tx28.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-tx28.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/mm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mm.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-mxs/regs-clkctrl-mx23.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/regs-clkctrl-mx23.h</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-mxs/regs-clkctrl-mx28.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/regs-clkctrl-mx28.h</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.7%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/system.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/system.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-mxs/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/timer.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-nomadik/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-nomadik/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-nomadik/board-nhk8815.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-nomadik/board-nhk8815.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/ams-delta-fiq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/ams-delta-fiq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-ams-delta.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-ams-delta.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-fsample.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-fsample.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-generic.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-h2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-h2.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-h3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-h3.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-htcherald.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-htcherald.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-innovator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-innovator.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-nand.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-nokia770.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-nokia770.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-osk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-osk.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-palmte.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-palmte.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-palmtt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-palmtt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-palmz71.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-palmz71.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-perseus2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-perseus2.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-sx1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-sx1.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/board-voiceblue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-voiceblue.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/clock.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/common.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/devices.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/fpga.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/fpga.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/gpio15xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/gpio15xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/gpio16xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/gpio16xx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/gpio7xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/gpio7xx.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/id.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/id.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/io.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/lcd_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/lcd_dma.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/mach-omap1/ocpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/ocpi.c</a> (renamed from arch/arm/plat-omap/ocpi.c)</td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/pm.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/reset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/reset.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/serial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/serial.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/time.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/timer.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/timer32k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/timer32k.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap1/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/usb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/Makefile</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/am35xx-emac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/am35xx-emac.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-2430sdp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-2430sdp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-3430sdp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-3430sdp.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-3630sdp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-3630sdp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-4430sdp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-4430sdp.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-am3517crane.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-am3517crane.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-am3517evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-am3517evm.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-apollon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-apollon.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-cm-t35.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-cm-t35.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-cm-t3517.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-cm-t3517.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-devkit8000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-devkit8000.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-flash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-flash.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-flash.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-flash.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-generic.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-h4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-h4.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-igep0020.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-igep0020.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-ldp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-ldp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-n8x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-n8x0.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-omap3beagle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap3beagle.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-omap3evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap3evm.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-omap3logic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap3logic.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-omap3pandora.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap3pandora.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-omap3stalker.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap3stalker.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-omap3touchbook.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap3touchbook.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-omap4panda.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap4panda.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-overo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-overo.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-rm680.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-rm680.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-rx51-peripherals.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-rx51-peripherals.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-rx51.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-rx51.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-ti8168evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-ti8168evm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-zoom-display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-zoom-display.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/board-zoom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-zoom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/clock3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clock3xxx_data.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/clock44xx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clock44xx_data.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/clockdomain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clockdomain.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/clockdomain44xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clockdomain44xx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/clockdomains3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clockdomains3xxx_data.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/clockdomains44xx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clockdomains44xx_data.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-omap2/clockdomains_common_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clockdomains_common_data.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/cm-regbits-34xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/cm-regbits-34xx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/cminst44xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/cminst44xx.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/common.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/common.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/cpuidle34xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/cpuidle34xx.c</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/cpuidle44xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/cpuidle44xx.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/devices.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/display.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/dma.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/dpll3xxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/dpll3xxx.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/dsp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/dsp.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/gpio.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/gpmc-onenand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/gpmc-onenand.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/gpmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/gpmc.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-omap2/hdq1w.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/hdq1w.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/hsmmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/hsmmc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/hwspinlock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/hwspinlock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/id.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/id.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/include/mach/omap-wakeupgen.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/io.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/iomap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/iomap.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/irq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/mailbox.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/mailbox.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-omap2/msdi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/msdi.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/mux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/mux.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap-secure.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap-secure.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap-wakeupgen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap-wakeupgen.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap4-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap4-common.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod.c</a></td><td class='right'>1143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.9%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 81.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_2420_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_2420_data.c</a></td><td class='right'>1580</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 20.3%;'/><td class='none' style='width: 75.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_2430_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_2430_data.c</a></td><td class='right'>1968</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 24.5%;'/><td class='none' style='width: 68.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_3xxx_data.c</a></td><td class='right'>3089</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.2%;'/><td class='rem' style='width: 27.6%;'/><td class='none' style='width: 51.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_44xx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_44xx_data.c</a></td><td class='right'>6323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 53.6%;'/><td class='rem' style='width: 46.4%;'/><td class='none' style='width: 0.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/omap_hwmod_common_data.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_common_data.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/pm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/pm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/pm.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/pm24xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/pm24xx.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/pm34xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/pm34xx.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/pm44xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/pm44xx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/powerdomain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/powerdomain.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/powerdomain.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/powerdomain.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/powerdomains3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/powerdomains3xxx_data.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/prcm-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/prcm-common.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/prcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/prcm.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/prm_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/prm_common.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/prminst44xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/prminst44xx.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/serial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/serial.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/timer.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/twl-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/twl-common.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/twl-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/twl-common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/usb-musb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/usb-musb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/usb-tusb6010.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/usb-tusb6010.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/vc3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/vc3xxx_data.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/voltage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/voltage.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/voltagedomains3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/voltagedomains3xxx_data.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/wd_timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/wd_timer.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-omap2/wd_timer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/wd_timer.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/addr-map.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/addr-map.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/common.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/db88f5281-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/db88f5281-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/dns323-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/dns323-setup.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/kurobox_pro-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/kurobox_pro-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/mpp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/mpp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/mss2-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/mss2-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/rd88f5181l-ge-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/rd88f5182-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/rd88f5182-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/terastation_pro2-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/terastation_pro2-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/ts209-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/ts209-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/ts409-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/ts409-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/ts78xx-fpga.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/ts78xx-fpga.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/ts78xx-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/ts78xx-setup.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/wnr854t-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/wnr854t-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-orion5x/wrt350n-v2-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/wrt350n-v2-setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pnx4008/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pnx4008/core.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pnx4008/i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pnx4008/i2c.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-pnx4008/include/mach/i2c.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pnx4008/include/mach/i2c.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pnx4008/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pnx4008/pm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-prima2/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-prima2/common.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-prima2/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-prima2/irq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-prima2/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-prima2/pm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-prima2/prima2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-prima2/prima2.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/balloon3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/balloon3.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/cm-x2xx-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/cm-x2xx-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/cm-x300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/cm-x300.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/em-x270.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/em-x270.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/hx4700.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/hx4700.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/include/mach/mfp-pxa27x.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/include/mach/mioa701.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/include/mach/mioa701.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/include/mach/pcm990_baseboard.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/magician.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/magician.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/mioa701.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/mioa701.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/palm27x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/palm27x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/palmtx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/palmtx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/pcm990-baseboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/pcm990-baseboard.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/spitz.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/spitz.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/stargate2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/stargate2.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/vpac270.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/vpac270.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-pxa/z2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/z2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/bast-ide.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/bast-ide.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/clock-s3c2416.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/clock-s3c2416.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/clock-s3c2443.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/clock-s3c2443.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/common-s3c2443.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/common-s3c2443.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/common.c</a> (renamed from arch/arm/plat-s3c24xx/cpu.c)</td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/dma-s3c2443.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/dma-s3c2443.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/include/mach/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/include/mach/dma.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/include/mach/irqs.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/include/mach/map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/include/mach/map.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/irq-pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/irq-pm.c</a> (renamed from arch/arm/plat-s3c24xx/irq-pm.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/irq-s3c2416.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/irq-s3c2416.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-amlm5900.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-amlm5900.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-anubis.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-anubis.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-at2440evb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-at2440evb.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-bast.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-bast.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-gta02.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-gta02.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-h1940.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-h1940.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-mini2440.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-mini2440.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-nexcoder.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-nexcoder.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-osiris.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-osiris.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-otom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-otom.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-qt2410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-qt2410.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-rx1950.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-rx1950.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-smdk2416.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-smdk2416.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-tct_hammer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-tct_hammer.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/mach-vr1000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-vr1000.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/pm.c</a> (renamed from arch/arm/plat-s3c24xx/pm.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/s3c2416.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/s3c2416.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/setup-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/setup-spi.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/simtec-nor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/simtec-nor.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/mach-s3c24xx/sleep.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/sleep.S</a> (renamed from arch/arm/plat-s3c24xx/sleep.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/common.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/common.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/cpuidle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/cpuidle.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/dev-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/dev-audio.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/dev-uart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/dev-uart.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/mach-anw6410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-anw6410.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/mach-crag6410-module.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-crag6410-module.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/mach-crag6410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-crag6410.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/mach-hmt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-hmt.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/mach-mini6410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-mini6410.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/mach-ncp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-ncp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/mach-real6410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-real6410.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/mach-smartq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-smartq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/mach-smartq5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-smartq5.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/mach-smartq7.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-smartq7.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/mach-smdk6400.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-smdk6400.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/mach-smdk6410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-smdk6410.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s3c64xx/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/pm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s5p64x0/dev-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5p64x0/dev-audio.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s5p64x0/mach-smdk6440.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5p64x0/mach-smdk6440.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s5p64x0/mach-smdk6450.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5p64x0/mach-smdk6450.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s5pc100/dev-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pc100/dev-audio.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s5pc100/mach-smdkc100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pc100/mach-smdkc100.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s5pv210/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pv210/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s5pv210/dev-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pv210/dev-audio.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s5pv210/mach-aquila.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pv210/mach-aquila.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s5pv210/mach-goni.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pv210/mach-goni.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-s5pv210/mach-smdkv210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pv210/mach-smdkv210.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/assabet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/assabet.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/badge4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/badge4.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/cerf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/cerf.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/collie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/collie.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/generic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/generic.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/h3100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/h3100.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/h3600.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/h3600.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/hackkit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/hackkit.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/jornada720.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/jornada720.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/lart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/lart.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/nanoengine.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/nanoengine.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/neponset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/neponset.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/pci-nanoengine.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/pci-nanoengine.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/pleb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/pleb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/pm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/shannon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/shannon.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-sa1100/simpad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/simpad.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shark/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shark/pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/Kconfig</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/board-ag5evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-ag5evm.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/board-ap4evb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-ap4evb.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-shmobile/board-armadillo800eva.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-armadillo800eva.c</a></td><td class='right'>784</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/board-bonito.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-bonito.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/board-g3evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-g3evm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/board-g4evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-g4evm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/board-kota2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-kota2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-shmobile/board-kzm9d.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-kzm9d.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-shmobile/board-kzm9g.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-kzm9g.c</a></td><td class='right'>460</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/board-mackerel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-mackerel.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/board-marzen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-marzen.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-shmobile/clock-emev2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/clock-emev2.c</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/clock-r8a7740.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/clock-r8a7740.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-shmobile/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/common.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/cpuidle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/cpuidle.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/headsmp.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/headsmp.S</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/include/mach/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/include/mach/common.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-shmobile/include/mach/emev2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/include/mach/emev2.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/include/mach/intc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/include/mach/intc.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/include/mach/irqs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/include/mach/sh7372.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/include/mach/sh7372.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/include/mach/sh73a0.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/include/mach/sh73a0.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/intc-sh7372.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/intc-sh7372.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/pfc-r8a7740.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/pfc-r8a7740.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/pfc-sh73a0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/pfc-sh73a0.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/platsmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/platsmp.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-shmobile/setup-emev2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/setup-emev2.c</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/setup-r8a7740.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/setup-r8a7740.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/setup-r8a7779.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/setup-r8a7779.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/setup-sh7372.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/setup-sh7372.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/setup-sh73a0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/setup-sh73a0.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-shmobile/smp-emev2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/smp-emev2.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/smp-r8a7779.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/smp-r8a7779.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/smp-sh73a0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/smp-sh73a0.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/suspend.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/suspend.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-shmobile/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/timer.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/Makefile.boot</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/headsmp.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/headsmp.S</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/hotplug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/hotplug.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/debug-macro.S</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/include/mach/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/dma.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/include/mach/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/generic.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/include/mach/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/gpio.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/hardware.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/irqs.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/include/mach/spear.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/spear.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h</a></td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h</a></td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/include/mach/timex.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/timex.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/uncompress.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/platsmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/platsmp.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/spear1310.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/spear1310.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/spear1340.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/spear1340.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-spear13xx/spear13xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/spear13xx.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/Kconfig</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/Makefile.boot</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/clock.c</a></td><td class='right'>760</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.0%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/include/mach/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/generic.h</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/hardware.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/irqs.h</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/include/mach/misc_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/misc_regs.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/include/mach/spear.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/spear.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/include/mach/spear300.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/spear300.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/include/mach/spear310.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/spear310.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/include/mach/spear320.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/spear320.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/spear300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/spear300.c</a></td><td class='right'>653</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 6.1%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/spear300_evb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/spear300_evb.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/spear310.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/spear310.c</a></td><td class='right'>475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/spear310_evb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/spear310_evb.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/spear320.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/spear320.c</a></td><td class='right'>733</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 6.2%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/spear320_evb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/spear320_evb.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear3xx/spear3xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/spear3xx.c</a></td><td class='right'>549</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 7.6%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear6xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear6xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear6xx/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/Makefile.boot</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-spear6xx/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/clock.c</a></td><td class='right'>683</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.8%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear6xx/include/mach/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/include/mach/generic.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear6xx/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/include/mach/hardware.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear6xx/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/include/mach/irqs.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear6xx/include/mach/misc_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/include/mach/misc_regs.h</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear6xx/include/mach/spear.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/include/mach/spear.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-spear6xx/include/mach/spear600.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/include/mach/spear600.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-spear6xx/spear6xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/spear6xx.c</a></td><td class='right'>422</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/Kconfig</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board-dt-tegra20.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-dt-tegra20.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board-dt-tegra30.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-dt-tegra30.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board-harmony-pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-harmony-pinmux.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board-harmony.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-harmony.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board-paz00-pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-paz00-pinmux.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board-paz00.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-paz00.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board-pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-pinmux.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board-pinmux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-pinmux.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board-seaboard-pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-seaboard-pinmux.c</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board-seaboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-seaboard.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board-trimslice-pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-trimslice-pinmux.c</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board-trimslice.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-trimslice.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/board.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/clock.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/common.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/devices.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/devices.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/devices.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/flowctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/flowctrl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/include/mach/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/dma.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/include/mach/gpio-tegra.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/gpio-tegra.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-tegra/include/mach/pinmux-tegra20.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/pinmux-tegra20.h</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/pinmux-tegra30.h</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-tegra/include/mach/pinmux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/pinmux.h</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-tegra/include/mach/tegra-ahb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/tegra-ahb.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/uncompress.h</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/include/mach/usb_phy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/usb_phy.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/pcie.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-tegra/pinmux-tegra20-tables.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/pinmux-tegra20-tables.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-tegra/pinmux-tegra30-tables.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/pinmux-tegra30-tables.c</a></td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-tegra/pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/pinmux.c</a></td><td class='right'>987</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 15.6%;'/><td class='none' style='width: 84.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/powergate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/powergate.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/tegra2_clocks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/tegra2_clocks.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/tegra30_clocks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/tegra30_clocks.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/timer.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-tegra/usb_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/usb_phy.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/Kconfig</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-ux500/board-mop500-msp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-mop500-msp.c</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-ux500/board-mop500-msp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-mop500-msp.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/board-mop500-pins.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-mop500-pins.c</a></td><td class='right'>733</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/board-mop500-uib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-mop500-uib.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/board-mop500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-mop500.c</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/board-mop500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-mop500.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/board-u5500-sdi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-u5500-sdi.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/board-u5500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-u5500.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/cache-l2x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/cache-l2x0.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/clock.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/clock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/clock.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/cpu-db5500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/cpu-db5500.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/cpu-db8500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/cpu-db8500.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/cpu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/cpu.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-ux500/cpuidle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/cpuidle.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/devices-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/devices-common.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/devices-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/devices-common.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/devices-db5500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/devices-db5500.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/devices-db8500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/devices-db8500.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/devices-db8500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/devices-db8500.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/dma-db5500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/dma-db5500.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/id.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/id.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/crypto-ux500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/crypto-ux500.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/db5500-regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/db5500-regs.h</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/db8500-regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/db8500-regs.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/debug-macro.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/devices.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/devices.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/hardware.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/id.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/id.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/irqs-board-u5500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/irqs-board-u5500.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/irqs-db5500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/irqs-db5500.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/irqs.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/mbox-db5500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/mbox-db5500.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/msp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/msp.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/setup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/setup.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/uncompress.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/mbox-db5500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/mbox-db5500.c</a></td><td class='right'>565</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.9%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/modem-irq-db5500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/modem-irq-db5500.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/pins-db5500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/pins-db5500.h</a></td><td class='right'>620</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.8%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/pins-db8500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/pins-db8500.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/platsmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/platsmp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mach-ux500/ste-dma40-db5500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/ste-dma40-db5500.h</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-ux500/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/timer.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-versatile/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-versatile/core.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-versatile/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-versatile/pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mach-vexpress/v2m.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-vexpress/v2m.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/Kconfig</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/abort-ev6.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/abort-ev6.S</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/cache-l2x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-l2x0.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/cache-tauros2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-tauros2.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/cache-v3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-v3.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/cache-v4.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-v4.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/cache-v4wb.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-v4wb.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/cache-v4wt.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-v4wt.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/cache-v6.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-v6.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/cache-v7.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-v7.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/context.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/context.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mm/copypage-v3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/copypage-v3.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/dma-mapping.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/dma-mapping.c</a></td><td class='right'>1346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.1%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 78.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/fault.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/init.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/mm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/mm.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/mmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/mmu.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-arm1020.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm1020.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-arm1020e.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm1020e.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-arm1022.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm1022.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-arm1026.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm1026.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mm/proc-arm6_7.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm6_7.S</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-arm920.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm920.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-arm922.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm922.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-arm925.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm925.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-arm926.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm926.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-arm940.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm940.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-arm946.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm946.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-feroceon.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-feroceon.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-mohawk.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-mohawk.S</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/proc-v7-2level.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-v7-2level.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/mm/tlb-v3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/tlb-v3.S</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/mm/vmregion.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/vmregion.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/nwfpe/fpmodule.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/nwfpe/fpmodule.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-iop/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-iop/pci.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-mxc/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/clock.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-mxc/include/mach/clock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/clock.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-mxc/include/mach/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/common.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-mxc/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/debug-macro.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-mxc/include/mach/iomux-mx51.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/iomux-mx51.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-mxc/include/mach/iomux-mx53.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/iomux-mx53.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-mxc/include/mach/mx2_cam.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/mx2_cam.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-mxc/include/mach/mx6q.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/mx6q.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-mxc/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/time.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-nomadik/include/plat/gpio-nomadik.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-nomadik/include/plat/pincfg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-nomadik/include/plat/pincfg.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/common.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/counter_32k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/counter_32k.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/devices.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/dma.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/dmtimer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/dmtimer.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/include/plat/board.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/board.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/include/plat/clkdev_omap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/clkdev_omap.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/include/plat/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/common.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/include/plat/cpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/cpu.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/include/plat/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/dma.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/include/plat/dmtimer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/dmtimer.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/include/plat/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/gpio.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/include/plat/gpmc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/gpmc.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/plat-omap/include/plat/hdq1w.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/hdq1w.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/include/plat/mmc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/mmc.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/include/plat/omap-serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/omap-serial.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/include/plat/omap_hwmod.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/omap_hwmod.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/omap_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/omap_device.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/sram.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/sram.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-omap/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/usb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-orion/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-orion/common.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-orion/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-orion/gpio.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-orion/include/plat/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-orion/include/plat/common.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-orion/include/plat/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-orion/include/plat/gpio.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-orion/include/plat/orion_wdt.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-orion/include/plat/orion_wdt.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-orion/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-orion/pcie.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-pxa/include/plat/pxa27x_keypad.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-pxa/include/plat/pxa27x_keypad.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-s3c24xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-s3c24xx/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-s3c24xx/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-s3c24xx/clock.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-s3c24xx/dev-uart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-s3c24xx/dev-uart.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-s5p/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-s5p/Kconfig</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-s5p/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-s5p/Makefile</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-s5p/sysmmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-s5p/sysmmu.c</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-samsung/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/Kconfig</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-samsung/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-samsung/devs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/devs.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-samsung/include/plat/cpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/cpu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-samsung/include/plat/devs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/devs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-samsung/include/plat/dma-pl330.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/dma-pl330.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-samsung/include/plat/fb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/fb.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h</a></td><td class='right'>379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-samsung/include/plat/s3c2416.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/s3c2416.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-samsung/include/plat/s5p-clock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/s5p-clock.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-samsung/include/plat/sdhci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/sdhci.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-samsung/include/plat/sysmmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/sysmmu.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-samsung/platformdata.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/platformdata.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/plat-samsung/s5p-clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-clock.c</a> (renamed from arch/arm/plat-s5p/clock.c)</td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/plat-samsung/s5p-dev-mfc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-dev-mfc.c</a> (renamed from arch/arm/plat-s5p/dev-mfc.c)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/plat-samsung/s5p-dev-uart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-dev-uart.c</a> (renamed from arch/arm/plat-s5p/dev-uart.c)</td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/plat-samsung/s5p-irq-eint.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-irq-eint.c</a> (renamed from arch/arm/plat-s5p/irq-eint.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/plat-samsung/s5p-irq-gpioint.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-irq-gpioint.c</a> (renamed from arch/arm/plat-s5p/irq-gpioint.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/plat-samsung/s5p-irq-pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-irq-pm.c</a> (renamed from arch/arm/plat-s5p/irq-pm.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/plat-samsung/s5p-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-irq.c</a> (renamed from arch/arm/plat-s5p/irq.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/plat-samsung/s5p-pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-pm.c</a> (renamed from arch/arm/plat-s5p/pm.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/plat-samsung/s5p-sleep.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-sleep.S</a> (renamed from arch/arm/plat-s5p/sleep.S)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/plat-samsung/s5p-time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-time.c</a> (renamed from arch/arm/plat-s5p/s5p-time.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/arm/plat-samsung/setup-mipiphy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/setup-mipiphy.c</a> (renamed from arch/arm/plat-s5p/setup-mipiphy.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-spear/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-spear/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-spear/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/clock.c</a></td><td class='right'>1005</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 15.9%;'/><td class='none' style='width: 84.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-spear/include/plat/clock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/include/plat/clock.h</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-spear/include/plat/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/include/plat/debug-macro.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-spear/include/plat/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/include/plat/hardware.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-spear/include/plat/padmux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/include/plat/padmux.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/plat-spear/include/plat/pl080.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/include/plat/pl080.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-spear/include/plat/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/include/plat/uncompress.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/arm/plat-spear/padmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/padmux.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/arm/plat-spear/pl080.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/pl080.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-spear/restart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/restart.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-spear/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/time.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-versatile/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-versatile/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-versatile/fpga-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-versatile/fpga-irq.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/plat-versatile/include/plat/fpga-irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-versatile/include/plat/fpga-irq.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/tools/mach-types?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/tools/mach-types</a></td><td class='right'>505</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/arm/vfp/vfpmodule.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/vfp/vfpmodule.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/avr32/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/include/asm/processor.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/include/asm/signal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/include/asm/signal.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/kernel/entry-avr32b.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/kernel/entry-avr32b.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/avr32/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/kernel/init_task.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/avr32/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/kernel/signal.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/blackfin/ADI_BSD.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/ADI_BSD.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/Clear_BSD.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/Clear_BSD.txt</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/Kconfig</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/Kconfig.debug?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/Kconfig.debug</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/configs/BF561-EZKIT-SMP_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/configs/BF609-EZKIT_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/configs/BF609-EZKIT_defconfig</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/bfin-global.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin-global.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/include/asm/bfin6xx_spi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin6xx_spi.h</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/include/asm/bfin_crc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_crc.h</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/bfin_dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_dma.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/bfin_pfmon.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_pfmon.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/bfin_ppi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_ppi.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/bfin_rotary.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_rotary.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/bfin_serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_serial.h</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/bfin_sport.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_sport.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/include/asm/bfin_sport3.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_sport3.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/bfin_twi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_twi.h</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/blackfin.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/blackfin.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/include/asm/clkdev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/clkdev.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/clocks.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/clocks.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/cplb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/cplb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/def_LPBlackfin.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/def_LPBlackfin.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/dma.h</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/dpmc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/dpmc.h</a></td><td class='right'>656</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/fixed_code.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/fixed_code.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/gpio.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/gptimers.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/gptimers.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/irqflags.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/irqflags.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/page.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/page.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/pda.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/pda.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/include/asm/pm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/pm.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/processor.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/thread_info.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/include/asm/unistd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/unistd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/bfin_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/bfin_dma.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/bfin_gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/bfin_gpio.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/cplb-nompu/cplbinit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/cplb-nompu/cplbinit.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/cplb-nompu/cplbmgr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/cplb-nompu/cplbmgr.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/debug-mmrs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/debug-mmrs.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/entry.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/gptimers.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/gptimers.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/blackfin/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/init_task.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/process.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/reboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/reboot.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/setup.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/shadow_console.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/shadow_console.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/signal.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/time-ts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/time-ts.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/kernel/trace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/trace.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/divsi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/divsi3.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/memchr.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/memchr.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/memcmp.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/memcmp.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/memcpy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/memcpy.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/memmove.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/memmove.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/memset.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/memset.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/modsi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/modsi3.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/muldi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/muldi3.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/smulsi3_highpart.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/smulsi3_highpart.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/strcmp.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/strcmp.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/strcpy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/strcpy.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/strncmp.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/strncmp.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/strncpy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/strncpy.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/udivsi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/udivsi3.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/umodsi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/umodsi3.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/lib/umulsi3_highpart.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/umulsi3_highpart.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf518/boards/ezbrd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/boards/ezbrd.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf518/boards/tcm-bf518.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/boards/tcm-bf518.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf518/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/anomaly.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf518/include/mach/cdefBF512.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/cdefBF512.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf518/include/mach/cdefBF514.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/cdefBF514.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf518/include/mach/cdefBF516.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/cdefBF516.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf518/include/mach/cdefBF518.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/cdefBF518.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf518/include/mach/defBF512.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/defBF512.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf518/include/mach/defBF514.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/defBF514.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf518/include/mach/defBF516.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/defBF516.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf518/include/mach/defBF518.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/defBF518.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf527/boards/ad7160eval.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/boards/ad7160eval.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf527/boards/cm_bf527.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/boards/cm_bf527.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf527/boards/ezbrd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/boards/ezbrd.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf527/boards/ezkit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/boards/ezkit.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf527/boards/tll6527m.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/boards/tll6527m.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf527/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/include/mach/anomaly.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf527/include/mach/defBF522.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/include/mach/defBF522.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf527/include/mach/defBF525.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/include/mach/defBF525.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf527/include/mach/defBF527.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/include/mach/defBF527.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf533/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf533/include/mach/anomaly.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf533/include/mach/defBF532.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf533/include/mach/defBF532.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf537/boards/cm_bf537e.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/boards/cm_bf537e.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf537/boards/cm_bf537u.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/boards/cm_bf537u.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf537/boards/dnp5370.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/boards/dnp5370.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf537/boards/minotaur.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/boards/minotaur.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf537/boards/stamp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/boards/stamp.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf537/boards/tcm_bf537.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/boards/tcm_bf537.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf537/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/include/mach/anomaly.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf537/include/mach/defBF534.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/include/mach/defBF534.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf537/include/mach/defBF537.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/include/mach/defBF537.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf538/boards/ezkit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf538/boards/ezkit.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf538/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf538/include/mach/anomaly.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf538/include/mach/defBF538.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf538/include/mach/defBF538.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf538/include/mach/defBF539.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf538/include/mach/defBF539.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf548/boards/cm_bf548.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/boards/cm_bf548.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf548/boards/ezkit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/boards/ezkit.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf548/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/anomaly.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf548/include/mach/defBF542.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/defBF542.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf548/include/mach/defBF544.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/defBF544.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf548/include/mach/defBF547.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/defBF547.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf548/include/mach/defBF548.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/defBF548.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf548/include/mach/defBF549.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/defBF549.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/defBF54x_base.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf561/boards/acvilon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf561/boards/acvilon.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf561/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf561/include/mach/anomaly.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-bf561/include/mach/defBF561.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf561/include/mach/defBF561.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/Kconfig</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/boards/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/boards/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/boards/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/boards/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/boards/ezkit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/boards/ezkit.c</a></td><td class='right'>1340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/clock.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/dma.c</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/hibernate.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/hibernate.S</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/anomaly.h</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/bf609.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/bf609.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/bfin_serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/bfin_serial.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/blackfin.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/blackfin.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/cdefBF609.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/cdefBF609.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/cdefBF60x_base.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/cdefBF60x_base.h</a></td><td class='right'>3252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 51.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 48.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/defBF609.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/defBF609.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/defBF60x_base.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/defBF60x_base.h</a></td><td class='right'>3587</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 56.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 43.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/dma.h</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/gpio.h</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/irq.h</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/mem_map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/mem_map.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/pll.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/pll.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/pm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/pm.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/include/mach/portmux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/portmux.h</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-bf609/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/pm.c</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-common/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/blackfin/mach-common/clock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/clock.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-common/clocks-init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/clocks-init.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-common/cpufreq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/cpufreq.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-common/dpmc_modes.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/dpmc_modes.S</a></td><td class='right'>606</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 9.3%;'/><td class='none' style='width: 90.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-common/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/entry.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-common/head.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/head.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-common/ints-priority.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/ints-priority.c</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-common/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/pm.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mach-common/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/smp.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mm/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mm/init.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/blackfin/mm/sram-alloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mm/sram-alloc.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/c6x/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/c6x/include/asm/elf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/include/asm/elf.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/c6x/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/c6x/include/asm/mmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/include/asm/mmu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/c6x/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/include/asm/processor.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/c6x/include/asm/ptrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/include/asm/ptrace.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/c6x/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/include/asm/thread_info.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/c6x/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/kernel/process.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/c6x/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/kernel/signal.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/cris/arch-v10/drivers/ds1302.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v10/drivers/ds1302.c</a></td><td class='right'>515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.1%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/cris/arch-v10/drivers/pcf8563.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v10/drivers/pcf8563.c</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v10/kernel/fasttimer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v10/kernel/fasttimer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v10/kernel/kgdb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v10/kernel/kgdb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v10/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v10/kernel/signal.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v10/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v10/kernel/time.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v10/lib/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v10/lib/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v32/drivers/cryptocop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v32/drivers/cryptocop.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v32/kernel/ptrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v32/kernel/ptrace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v32/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v32/kernel/signal.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v32/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v32/kernel/smp.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/arch-v32/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v32/kernel/time.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/include/arch-v32/arch/cache.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/include/arch-v32/arch/cache.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/include/asm/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/include/asm/posix_types.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/include/asm/processor.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/cris/include/asm/rtc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/include/asm/rtc.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/include/asm/thread_info.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/kernel/process.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/kernel/ptrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/kernel/ptrace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/kernel/time.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/kernel/vmlinux.lds.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/kernel/vmlinux.lds.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/cris/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/mm/fault.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/frv/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/include/asm/processor.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/include/asm/thread_info.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/kernel/entry.S</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/frv/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/kernel/init_task.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/kernel/process.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/frv/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/kernel/signal.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/h8300/Kconfig.cpu?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/Kconfig.cpu</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/h8300/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/h8300/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/h8300/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/include/asm/processor.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/h8300/include/asm/unistd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/include/asm/unistd.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/h8300/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/h8300/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/kernel/init_task.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/h8300/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/kernel/signal.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/h8300/kernel/syscalls.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/kernel/syscalls.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/Kconfig</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/hexagon/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/include/asm/processor.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/include/asm/spinlock_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/include/asm/spinlock_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/include/asm/thread_info.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/kernel/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/hexagon/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/init_task.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/process.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/signal.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/smp.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/time.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/hexagon/mm/vm_fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/mm/vm_fault.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/gpio.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/ia64/include/asm/irq_remapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/irq_remapping.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/kvm_host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/kvm_host.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/kvm_para.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/processor.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/thread_info.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/include/asm/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/topology.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/fsys.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kernel/fsys.S</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/perfmon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kernel/perfmon.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kernel/process.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kernel/signal.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/smpboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kernel/smpboot.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kernel/sys_ia64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kernel/sys_ia64.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/ia64/kvm/kvm-ia64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kvm/kvm-ia64.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/include/asm/processor.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/include/asm/signal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/include/asm/signal.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/include/asm/thread_info.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m32r/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/kernel/init_task.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/kernel/signal.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m32r/kernel/smpboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/kernel/smpboot.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/Kconfig.cpu?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/Kconfig.cpu</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/amiga/platform.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/amiga/platform.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/atari/ataints.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/atari/ataints.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/m68k/configs/m5475evb_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/configs/m5475evb_defconfig</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/atariints.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/atariints.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/cacheflush_no.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/cacheflush_no.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/entry.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/entry.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/flat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/flat.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/io_mm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/io_mm.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/m68k/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/m528xsim.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/m528xsim.h</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/mcfgpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/mcfgpio.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/processor.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/thread_info.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/include/asm/unaligned.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/unaligned.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/m68k/include/asm/vga.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/vga.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/kernel/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/dma.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/kernel/dma_mm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/dma_mm.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/kernel/dma_no.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/dma_no.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/kernel/entry_mm.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/entry_mm.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/init_task.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/signal.c</a></td><td class='right'>1183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/kernel/signal_mm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/signal_mm.c</a></td><td class='right'>1115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 17.6%;'/><td class='none' style='width: 82.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/kernel/signal_no.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/signal_no.c</a></td><td class='right'>765</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.1%;'/><td class='none' style='width: 87.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/mm/fault.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/5206/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/5206/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/5206/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/5206/gpio.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/520x/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/520x/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/520x/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/520x/gpio.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/523x/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/523x/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/523x/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/523x/gpio.c</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/5249/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/5249/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/5249/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/5249/gpio.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/5272/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/5272/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/5272/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/5272/gpio.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/527x/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/527x/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/527x/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/527x/gpio.c</a></td><td class='right'>609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.6%;'/><td class='none' style='width: 90.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/528x/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/528x/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/528x/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/528x/gpio.c</a></td><td class='right'>438</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.9%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/5307/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/5307/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/5307/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/5307/gpio.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/532x/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/532x/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/532x/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/532x/gpio.c</a></td><td class='right'>337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/5407/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/5407/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/5407/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/5407/gpio.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/m68k/platform/54xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/54xx/Makefile</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/platform/68328/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/68328/entry.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/platform/68360/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/68360/entry.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/Makefile</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/device.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/entry.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/firebee.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/firebee.c</a> (renamed from arch/m68k/platform/54xx/firebee.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/gpio.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/intc-5249.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/intc-5249.c</a> (renamed from arch/m68k/platform/5249/intc2.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/intc-5272.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/intc-5272.c</a> (renamed from arch/m68k/platform/5272/intc.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/m5206.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m5206.c</a> (renamed from arch/m68k/platform/5206/config.c)</td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/m520x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m520x.c</a> (renamed from arch/m68k/platform/520x/config.c)</td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/m523x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m523x.c</a> (renamed from arch/m68k/platform/523x/config.c)</td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/m5249.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m5249.c</a> (renamed from arch/m68k/platform/5249/config.c)</td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/m5272.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m5272.c</a> (renamed from arch/m68k/platform/5272/config.c)</td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/m527x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m527x.c</a> (renamed from arch/m68k/platform/527x/config.c)</td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/m528x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m528x.c</a> (renamed from arch/m68k/platform/528x/config.c)</td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/m5307.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m5307.c</a> (renamed from arch/m68k/platform/5307/config.c)</td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/m532x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m532x.c</a> (renamed from arch/m68k/platform/532x/config.c)</td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/m5407.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m5407.c</a> (renamed from arch/m68k/platform/5407/config.c)</td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/m54xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m54xx.c</a> (renamed from arch/m68k/platform/54xx/config.c)</td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/m68k/platform/coldfire/nettel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/nettel.c</a> (renamed from arch/m68k/platform/5307/nettel.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/include/asm/gpio.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/microblaze/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/include/asm/processor.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/include/asm/thread_info.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/kernel/entry-nommu.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/entry-nommu.S</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/entry.S</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/microblaze/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/init_task.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/kernel/mcount.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/mcount.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/process.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/signal.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/mm/fault.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/microblaze/pci/pci-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/pci/pci-common.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/Kconfig</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/Kconfig.debug?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/Kconfig.debug</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/alchemy/devboards/db1200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/alchemy/devboards/db1200.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/alchemy/devboards/db1300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/alchemy/devboards/db1300.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/alchemy/devboards/db1550.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/alchemy/devboards/db1550.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/clock.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/common.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/dev-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/dev-common.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/dev-gpio-buttons.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/dev-gpio-buttons.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/dev-leds-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/dev-leds-gpio.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/dev-wmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/dev-wmac.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/early_printk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/early_printk.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/gpio.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/irq.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/ath79/mach-db120.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/mach-db120.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/mach-pb44.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/mach-pb44.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/mach-ubnt-xm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/mach-ubnt-xm.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/machtypes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/machtypes.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/ath79/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/pci.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/ath79/pci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/pci.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/ath79/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/setup.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bcm47xx/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/bcm47xx/setup.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bcm47xx/sprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/bcm47xx/sprom.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/bcm63xx/boards/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/bcm63xx/boards/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/cavium-octeon/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/cavium-octeon/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/cavium-octeon/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/cavium-octeon/smp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/configs/mtx1_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/configs/mtx1_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/fw/arc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/fw/arc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/include/asm/clkdev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/clkdev.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-ath79/ar71xx_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-ath79/ar71xx_regs.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-ath79/ath79.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-ath79/ath79.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-ath79/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-ath79/irq.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/include/asm/mach-ath79/pci-ath724x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-ath79/pci-ath724x.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/include/asm/mach-ath79/pci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-ath79/pci.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-bcm47xx/bcm47xx.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-ip27/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-ip27/topology.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-jz4740/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-jz4740/irq.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/include/asm/mach-lantiq/falcon/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/falcon/irq.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/include/asm/mach-lantiq/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/gpio.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-lantiq/lantiq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/lantiq.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-lantiq/lantiq_platform.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/lantiq_platform.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mips-boards/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mips-boards/generic.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/mmu_context.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mmu_context.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/module.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/module.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/include/asm/octeon/cvmx-pcieep-defs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/octeon/cvmx-pcieep-defs.h</a></td><td class='right'>1365</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 21.6%;'/><td class='none' style='width: 78.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/pci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/pci.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/posix_types.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/processor.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/prom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/prom.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/setup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/setup.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/sparsemem.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/sparsemem.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/stat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/stat.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/termios.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/termios.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/thread_info.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/traps.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/traps.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/include/asm/uasm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/uasm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/jz4740/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/jz4740/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/cpu-probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/cpu-probe.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/init_task.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/mips-mt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/mips-mt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/perf_event_mipsxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/perf_event_mipsxx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/proc.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/prom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/prom.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/signal-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/signal-common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/signal.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/signal32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/signal32.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/signal_n32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/signal_n32.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/smp.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/kernel/traps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/traps.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/Platform?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/Platform</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/clk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/clk.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/clk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/clk.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/devices.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/devices.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/devices.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/lantiq/dts/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/dts/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/lantiq/dts/danube.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/dts/danube.dtsi</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/lantiq/dts/easy50712.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/dts/easy50712.dts</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/early_printk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/early_printk.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/lantiq/falcon/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/falcon/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/lantiq/falcon/prom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/falcon/prom.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/lantiq/falcon/reset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/falcon/reset.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/lantiq/falcon/sysctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/falcon/sysctrl.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/irq.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/machtypes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/machtypes.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/prom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/prom.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/prom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/prom.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/setup.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/xway/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/clk-ase.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/clk-ase.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/clk-xway.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/clk-xway.c</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/lantiq/xway/clk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/clk.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/devices.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/devices.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/devices.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/xway/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/dma.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/ebu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/ebu.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/xway/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/gpio.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/gpio_ebu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/gpio_ebu.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/gpio_stp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/gpio_stp.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/mach-easy50601.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/mach-easy50601.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/mach-easy50712.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/mach-easy50712.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/pmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/pmu.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/prom-ase.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/prom-ase.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/prom-xway.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/prom-xway.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/lantiq/xway/prom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/prom.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/lantiq/xway/reset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/reset.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/setup-ase.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/setup-ase.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/lantiq/xway/setup-xway.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/setup-xway.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/lantiq/xway/sysctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/sysctrl.c</a></td><td class='right'>371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mm/c-octeon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/mm/c-octeon.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/mm/c-r4k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/mm/c-r4k.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/oprofile/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/oprofile/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/oprofile/op_model_mipsxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/oprofile/op_model_mipsxx.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pci/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/pci/fixup-lantiq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/fixup-lantiq.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pci/ops-loongson2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/ops-loongson2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/pci/pci-ar71xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/pci-ar71xx.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mips/pci/pci-ar724x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/pci-ar724x.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mips/pci/pci-ath724x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/pci-ath724x.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pci/pci-lantiq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/pci-lantiq.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pci/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/pci.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pmc-sierra/yosemite/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pmc-sierra/yosemite/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pmc-sierra/yosemite/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pmc-sierra/yosemite/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/pnx833x/common/platform.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pnx833x/common/platform.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/powertv/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/powertv/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/powertv/asic/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/powertv/asic/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/powertv/pci/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/powertv/pci/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/rb532/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/rb532/devices.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/sni/pcimt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/sni/pcimt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mips/sni/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/sni/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/mn10300/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/include/asm/processor.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/include/asm/thread_info.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/mn10300/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/kernel/init_task.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/kernel/kgdb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/kernel/kgdb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/kernel/process.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/kernel/signal.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/mn10300/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/kernel/smp.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/include/asm/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/Kbuild</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/include/asm/dma-mapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/dma-mapping.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/include/asm/elf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/elf.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/gpio.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/openrisc/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/processor.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/include/asm/ptrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/ptrace.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/uaccess.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/kernel/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/kernel/dma.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/kernel/entry.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/openrisc/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/kernel/init_task.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/kernel/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/kernel/irq.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/kernel/signal.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/lib/string.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/lib/string.S</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/openrisc/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/mm/fault.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/hpux/fs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/hpux/fs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/bug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/bug.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/hardware.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/parisc/include/asm/kbdleds.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/kbdleds.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/parisc/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/page.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/page.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/pdc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/pdc.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/pgtable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/pgtable.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/prefetch.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/prefetch.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/processor.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/smp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/smp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/spinlock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/spinlock.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/stat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/stat.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/thread_info.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/uaccess.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/entry.S</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/parisc/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/init_task.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/pacache.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/pacache.S</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/parisc_ksyms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/parisc_ksyms.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/pdc_cons.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/pdc_cons.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/signal.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/signal32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/signal32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/smp.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/time.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/kernel/vmlinux.lds.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/vmlinux.lds.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/lib/lusercopy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/lib/lusercopy.S</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/parisc/mm/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/mm/init.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/Makefile</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/bluestone.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/boot/dts/bluestone.dts</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/boot/dts/mpc8569mds.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/boot/dts/mpc8569mds.dts</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/chroma_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/chroma_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/g5_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/g5_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/gamecube_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/gamecube_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/maple_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/maple_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/mpc85xx_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/mpc85xx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/mpc85xx_smp_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/mpc85xx_smp_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/pasemi_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/pasemi_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/ps3_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/ps3_defconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/configs/wii_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/wii_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/asm-compat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/asm-compat.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/cputable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/cputable.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/cputhreads.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/cputhreads.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/dbell.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/dbell.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/exception-64s.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/exception-64s.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/gpio.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/hvcall.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/hvcall.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/hw_irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/hw_irq.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/irq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm_asm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_asm.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm_book3s.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_book3s.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm_book3s_asm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_book3s_asm.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm_booke.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_booke.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm_booke_hv_asm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_booke_hv_asm.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm_e500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_e500.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm_host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_host.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_para.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/kvm_ppc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_ppc.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/lppaca.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/lppaca.h</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/lv1call.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/lv1call.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/mmu-book3e.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/mmu-book3e.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/pSeries_reconfig.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/pSeries_reconfig.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/ppc_asm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/ppc_asm.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/processor.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/ptrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/ptrace.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/reg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/reg_booke.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/reg_booke.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/stat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/stat.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/switch_to.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/switch_to.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/thread_info.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/time.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/time.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/topology.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/uaccess.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/include/asm/vio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/vio.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/include/asm/word-at-a-time.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/word-at-a-time.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/asm-offsets.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/asm-offsets.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/cpu_setup_fsl_booke.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/cpu_setup_fsl_booke.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/entry_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/entry_64.S</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/exceptions-64s.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/exceptions-64s.S</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/head_44x.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/head_44x.S</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/head_booke.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/head_booke.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/head_fsl_booke.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/head_fsl_booke.S</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/idle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/idle.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/idle_power7.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/idle_power7.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/powerpc/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/init_task.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/irq.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/machine_kexec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/machine_kexec.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/misc_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/misc_32.S</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/module_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/module_32.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/paca.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/paca.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/ppc_ksyms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/ppc_ksyms.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/process.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/prom_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/prom_init.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/ptrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/ptrace.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/ptrace32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/ptrace32.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/signal.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/signal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/signal.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/signal_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/signal_32.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/signal_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/signal_64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/smp.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/time.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/traps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/traps.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/vector.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/vector.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kernel/vio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/vio.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/44x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/44x.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/44x_emulate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/44x_emulate.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/Kconfig</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_64_mmu_host.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_64_mmu_host.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_64_mmu_hv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_64_mmu_hv.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_64_slb.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_64_slb.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_64_vio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_64_vio.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_64_vio_hv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_64_vio_hv.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_emulate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_emulate.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_hv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_hv.c</a></td><td class='right'>469</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_hv_interrupts.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_hv_interrupts.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_hv_rm_mmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_hv_rm_mmu.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_hv_rmhandlers.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_hv_rmhandlers.S</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_pr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_pr.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_pr_papr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_pr_papr.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/book3s_segment.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_segment.S</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/booke.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/booke.c</a></td><td class='right'>471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/booke.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/booke.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/booke_emulate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/booke_emulate.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/booke_interrupts.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/booke_interrupts.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/kvm/bookehv_interrupts.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/bookehv_interrupts.S</a></td><td class='right'>597</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/e500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/e500.c</a></td><td class='right'>372</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/kvm/e500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/e500.h</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/e500_emulate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/e500_emulate.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/e500_tlb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/e500_tlb.c</a></td><td class='right'>666</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 89.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/powerpc/kvm/e500_tlb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/e500_tlb.h</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/powerpc/kvm/e500mc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/e500mc.c</a></td><td class='right'>342</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/emulate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/emulate.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/powerpc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/powerpc.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/kvm/timing.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/timing.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/lib/copyuser_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/lib/copyuser_64.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/lib/mem_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/lib/mem_64.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/lib/memcpy_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/lib/memcpy_64.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/lib/string.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/lib/string.S</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/hugetlbpage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/mm/hugetlbpage.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/mm/mmu_context_nohash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/mm/mmu_context_nohash.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/net/bpf_jit.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/net/bpf_jit.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/net/bpf_jit_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/net/bpf_jit_64.S</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/net/bpf_jit_comp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/net/bpf_jit_comp.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/perf/core-book3s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/perf/core-book3s.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/perf/core-fsl-emb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/perf/core-fsl-emb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/44x/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/44x/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/Kconfig.cputype?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/Kconfig.cputype</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/cell/axon_msi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/cell/axon_msi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/cell/beat_interrupt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/cell/beat_interrupt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/cell/spufs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/cell/spufs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powermac/low_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/powermac/low_i2c.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/powermac/pic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/powermac/pic.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/ps3/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/ps3/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/ps3/mm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/ps3/mm.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/ps3/platform.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/ps3/platform.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/ps3/repository.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/ps3/repository.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/pseries/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/pseries/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/pseries/eeh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/pseries/eeh.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/pseries/plpar_wrappers.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/pseries/plpar_wrappers.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/platforms/pseries/reconfig.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/pseries/reconfig.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/cpm2_pic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/sysdev/cpm2_pic.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/mpc8xx_pic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/sysdev/mpc8xx_pic.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/ppc4xx_msi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/sysdev/ppc4xx_msi.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/powerpc/sysdev/xics/xics-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/sysdev/xics/xics-common.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/Kconfig</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/s390/boot/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/boot/.gitignore</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/s390/boot/compressed/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/boot/compressed/.gitignore</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/hypfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/hypfs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/barrier.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/barrier.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/bitops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/bitops.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/ccwgroup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/ccwgroup.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/cio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/cio.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/cmpxchg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/cmpxchg.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/cputime.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/cputime.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/ctl_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/ctl_reg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/current.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/current.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/elf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/elf.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/futex.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/futex.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/idals.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/idals.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/io.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/irq.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/kexec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/kexec.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/kmap_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/kmap_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/kvm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/kvm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/kvm_host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/kvm_host.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/kvm_para.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/mmu_context.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/mmu_context.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/module.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/module.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/os_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/os_info.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/percpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/percpu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/pgalloc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/pgalloc.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/pgtable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/pgtable.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/posix_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/processor.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/qdio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/qdio.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/rwsem.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/rwsem.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/sclp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/sclp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/setup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/setup.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/sfp-util.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/sfp-util.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/smp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/smp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/string.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/string.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/thread_info.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/timer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/timer.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/timex.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/timex.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/tlb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/tlb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/tlbflush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/tlbflush.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/uaccess.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/include/asm/vdso.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/vdso.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/s390/kernel/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/base.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/base.S</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/compat_linux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/compat_linux.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/compat_signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/compat_signal.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/early.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/early.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/entry.S</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/entry.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/entry.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/entry64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/entry64.S</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/head.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/head.S</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/head_kdump.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/head_kdump.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/s390/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/init_task.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/ipl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/ipl.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/irq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/machine_kexec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/machine_kexec.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/os_info.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/os_info.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/perf_cpum_cf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/perf_cpum_cf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/setup.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/signal.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/smp.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kernel/sysinfo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/sysinfo.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/s390/kernel/vdso32/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/vdso32/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/s390/kernel/vdso64/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/vdso64/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kvm/diag.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kvm/diag.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kvm/intercept.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kvm/intercept.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kvm/kvm-s390.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kvm/kvm-s390.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kvm/kvm-s390.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kvm/kvm-s390.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/kvm/priv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kvm/priv.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/lib/uaccess_mvcos.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/lib/uaccess_mvcos.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/lib/uaccess_std.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/lib/uaccess_std.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/mm/fault.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/mm/hugetlbpage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/mm/hugetlbpage.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/mm/maccess.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/mm/maccess.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/mm/pgtable.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/mm/pgtable.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/mm/vmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/mm/vmem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/s390/oprofile/hwsampler.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/oprofile/hwsampler.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/score/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/score/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/score/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/include/asm/processor.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/score/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/include/asm/thread_info.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/score/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/score/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/kernel/init_task.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/score/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/kernel/signal.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/Kconfig</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/Kconfig.cpu?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/Kconfig.cpu</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/board-edosk7705.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-edosk7705.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/board-edosk7760.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-edosk7760.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/board-espt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-espt.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/board-magicpanelr2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-magicpanelr2.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/board-polaris.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-polaris.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/board-secureedge5410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-secureedge5410.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/board-sh7757lcr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-sh7757lcr.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/board-sh7785lcr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-sh7785lcr.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/board-urquell.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-urquell.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-ap325rxa/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-ap325rxa/setup.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-cayman/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-cayman/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-ecovec24/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-ecovec24/setup.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-hp6xx/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-hp6xx/setup.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-kfr2r09/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-kfr2r09/setup.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-lboxre2/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-lboxre2/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-microdev/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-microdev/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-migor/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-migor/setup.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-rsk/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-rsk/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-rsk/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-rsk/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/boards/mach-rsk/devices-rsk7264.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-rsk/devices-rsk7264.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/boards/mach-rsk/devices-rsk7269.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-rsk/devices-rsk7269.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-sdk7780/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-sdk7780/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-se/7206/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/7206/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-se/770x/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/770x/setup.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-se/7721/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/7721/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-se/7722/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/7722/setup.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-se/7724/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/7724/setup.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-se/7751/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/7751/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-se/7780/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/7780/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-se/board-se7619.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/board-se7619.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-sh03/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-sh03/setup.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/boards/mach-sh7763rdp/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-sh7763rdp/setup.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/configs/rsk7264_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/configs/rsk7264_defconfig</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/configs/rsk7269_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/configs/rsk7269_defconfig</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/configs/sh7785lcr_32bit_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/configs/sh7785lcr_32bit_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/drivers/dma/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/dma/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/drivers/dma/dma-sh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/dma/dma-sh.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/drivers/dma/dma-sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/dma/dma-sysfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/drivers/pci/fixups-landisk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/fixups-landisk.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/drivers/pci/fixups-r7780rp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/fixups-r7780rp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/drivers/pci/fixups-sdk7780.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/fixups-sdk7780.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/drivers/pci/fixups-se7751.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/fixups-se7751.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/drivers/pci/fixups-sh03.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/fixups-sh03.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/drivers/pci/fixups-snapgear.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/fixups-snapgear.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/drivers/pci/pcie-sh7786.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/pcie-sh7786.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sh/include/asm/dma-sh.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/dma-sh.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/dma.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/fixmap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/fixmap.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/i2c-sh7760.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/i2c-sh7760.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/io.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/include/asm/io_noioport.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/io_noioport.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/irq.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/kdebug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/kdebug.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/kgdb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/kgdb.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/machvec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/machvec.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/pgtable_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/pgtable_64.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/posix_types_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/posix_types_32.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/posix_types_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/posix_types_64.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/processor.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/processor_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/processor_32.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/processor_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/processor_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/include/asm/stackprotector.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/stackprotector.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/syscalls_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/syscalls_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/thread_info.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/topology.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/traps_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/traps_64.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/asm/unistd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/unistd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sh/include/cpu-sh2/cpu/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh2/cpu/dma.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sh/include/cpu-sh2a/cpu/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh2a/cpu/dma.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/include/cpu-sh2a/cpu/sh7264.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh2a/cpu/sh7264.h</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/include/cpu-sh2a/cpu/sh7269.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh2a/cpu/sh7269.h</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/cpu-sh3/cpu/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh3/cpu/dma.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh4/cpu/dma-sh4a.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/cpu-sh4/cpu/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh4/cpu/dma.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/cpu-sh4/cpu/freq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh4/cpu/freq.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/include/cpu-sh4/cpu/sh7734.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh4/cpu/sh7734.h</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/include/cpu-sh4a/cpu/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh4a/cpu/dma.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sh/include/cpu-sh5/cpu/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh5/cpu/dma.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-common/mach/hp6xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-common/mach/hp6xx.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-common/mach/lboxre2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-common/mach/lboxre2.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-common/mach/sdk7780.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-common/mach/sdk7780.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-common/mach/titan.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-common/mach/titan.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-dreamcast/mach/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-dreamcast/mach/dma.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-landisk/mach/iodata_landisk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-landisk/mach/iodata_landisk.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-se/mach/se.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-se/mach/se7343.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se7343.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-se/mach/se7721.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se7721.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-se/mach/se7722.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se7722.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-se/mach/se7724.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se7724.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-se/mach/se7751.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se7751.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/include/mach-se/mach/se7780.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se7780.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/proc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2/setup-sh7619.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2/setup-sh7619.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2a/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2a/clock-sh7264.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/clock-sh7264.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2a/clock-sh7269.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/clock-sh7269.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c</a></td><td class='right'>2136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 33.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 66.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c</a></td><td class='right'>2800</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 44.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 55.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2a/probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/probe.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2a/setup-mxg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/setup-mxg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2a/setup-sh7201.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/setup-sh7201.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2a/setup-sh7203.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/setup-sh7203.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2a/setup-sh7206.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/setup-sh7206.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2a/setup-sh7264.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/setup-sh7264.c</a></td><td class='right'>606</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh2a/setup-sh7269.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/setup-sh7269.c</a></td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh3/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh3/entry.S</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh3/setup-sh7705.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh3/setup-sh7705.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh3/setup-sh770x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh3/setup-sh770x.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh3/setup-sh7710.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh3/setup-sh7710.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh3/setup-sh7720.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh3/setup-sh7720.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4/probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4/probe.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4/setup-sh4-202.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4/setup-sh4-202.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4/setup-sh7750.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4/setup-sh7750.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4/setup-sh7760.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4/setup-sh7760.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/clock-sh7734.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/clock-sh7734.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c</a></td><td class='right'>2497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 39.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 60.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-sh7343.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7343.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-sh7366.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7366.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-sh7722.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7722.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-sh7723.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7723.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-sh7724.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7724.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-sh7734.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7734.c</a></td><td class='right'>800</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-sh7757.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7757.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-sh7763.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7763.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-sh7770.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7770.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-sh7780.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7780.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-sh7785.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7785.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-sh7786.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7786.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh4a/setup-shx3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-shx3.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh5/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh5/entry.S</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/cpu/sh5/fpu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh5/fpu.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/idle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/idle.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sh/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/init_task.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/irq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/kgdb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/kgdb.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/machvec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/machvec.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/process.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/process_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/process_32.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/signal_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/signal_32.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/signal_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/signal_64.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/smp.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/kernel/traps_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/traps_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/mm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/fault.c</a></td><td class='right'>514</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sh/mm/fault_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/fault_32.c</a></td><td class='right'>374</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sh/mm/fault_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/fault_64.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/mm/tlb-sh5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/tlb-sh5.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/mm/tlbex_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/tlbex_32.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sh/mm/tlbex_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/tlbex_64.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/mm/tlbflush_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/tlbflush_64.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sh/tools/mach-types?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/tools/mach-types</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sparc/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/Kbuild</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/Makefile</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/boot/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/boot/Makefile</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/boot/btfixupprep.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/boot/btfixupprep.c</a></td><td class='right'>386</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.1%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/configs/sparc64_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/configs/sparc64_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/asi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/asi.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/asmmacro.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/asmmacro.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/include/asm/btfixup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/btfixup.h</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/cache.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cache.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/cacheflush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cacheflush.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/cacheflush_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cacheflush_32.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/cacheflush_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cacheflush_64.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sparc/include/asm/cachetlb_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cachetlb_32.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/cmpxchg_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cmpxchg_32.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/contregs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/contregs.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/cpu_type.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cpu_type.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/cpudata_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cpudata_32.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/include/asm/cypress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cypress.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/dma-mapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/dma-mapping.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/dma.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/elf_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/elf_32.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/floppy_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/floppy_32.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/floppy_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/floppy_64.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/gpio.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/head_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/head_32.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sparc/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/leon.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/leon.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/leon_amba.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/leon_amba.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/machines.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/machines.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/mbus.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/mbus.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/include/asm/memreg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/memreg.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/mmu_context_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/mmu_context_32.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/obio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/obio.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/oplib_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/oplib_32.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/page_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/page_32.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/pgalloc_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/pgalloc_32.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/pgtable_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/pgtable_32.h</a></td><td class='right'>387</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/pgtable_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/pgtable_64.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/pgtsrmmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/pgtsrmmu.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/include/asm/pgtsun4c.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/pgtsun4c.h</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/posix_types.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/processor_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/processor_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/processor_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/processor_64.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/psr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/psr.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/sections.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/sections.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/setup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/setup.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/shmparam_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/shmparam_32.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/smp_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/smp_32.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/include/asm/smpprim.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/smpprim.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/string_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/string_32.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/include/asm/sysen.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/sysen.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/thread_info_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/thread_info_32.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/thread_info_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/thread_info_64.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/timer_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/timer_32.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/timex_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/timex_32.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/tlbflush_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/tlbflush_32.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/topology_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/topology_64.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/uaccess.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/uaccess_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/uaccess_32.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/uaccess_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/uaccess_64.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/include/asm/vac-ops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/vac-ops.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/vaddrs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/vaddrs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/include/asm/winmacro.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/winmacro.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/auxio_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/auxio_32.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/central.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/central.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/cpu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/cpu.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/devices.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/ds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/ds.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/entry.S</a></td><td class='right'>442</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 5.8%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/etrap_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/etrap_32.S</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/head_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/head_32.S</a></td><td class='right'>765</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 10.1%;'/><td class='none' style='width: 87.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/head_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/head_64.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/idprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/idprom.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/init_task.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/ioport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/ioport.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/irq.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/irq_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/irq_32.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/irq_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/irq_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/kernel.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/kernel.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/leon_kernel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/leon_kernel.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/leon_pmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/leon_pmc.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/leon_smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/leon_smp.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/module.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/module.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/kernel/muldiv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/muldiv.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/of_device_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/of_device_32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/pcic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/pcic.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/perf_event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/perf_event.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/process_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/process_32.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/prom_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/prom_common.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/rtrap_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/rtrap_32.S</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/rtrap_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/rtrap_64.S</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/setup_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/setup_32.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/signal32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/signal32.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/signal_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/signal_32.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/signal_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/signal_64.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/smp_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/smp_32.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/smp_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/smp_64.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/sparc_ksyms_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sparc_ksyms_32.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/kernel/sun4c_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sun4c_irq.c</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/sun4d_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sun4d_irq.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/sun4d_smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sun4d_smp.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/sun4m_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sun4m_irq.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/sun4m_smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sun4m_smp.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/sys_sparc32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sys_sparc32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/sys_sparc_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sys_sparc_32.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/sys_sparc_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sys_sparc_64.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/time_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/time_32.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/trampoline_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/trampoline_32.S</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/traps_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/traps_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/traps_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/traps_64.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sparc/kernel/ttable_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/ttable_32.S</a></td><td class='right'>417</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/sparc/kernel/ttable_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/ttable_64.S</a> (renamed from arch/sparc/kernel/ttable.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/unaligned_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/unaligned_64.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/vmlinux.lds.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/vmlinux.lds.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/wof.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/wof.S</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/kernel/wuf.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/wuf.S</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/ashldi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/ashldi3.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/ashrdi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/ashrdi3.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/lib/atomic_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/atomic_32.S</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/atomic_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/atomic_64.S</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/bitops.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/bitops.S</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/blockops.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/blockops.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/bzero.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/bzero.S</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/divdi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/divdi3.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/ipcsum.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/ipcsum.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/ksyms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/ksyms.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/lshrdi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/lshrdi3.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/memmove.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/memmove.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/lib/mul.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/mul.S</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/muldi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/muldi3.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/lib/rem.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/rem.S</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.1%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/lib/sdiv.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/sdiv.S</a></td><td class='right'>381</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/lib/strlen_user_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/strlen_user_32.S</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/lib/strlen_user_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/strlen_user_64.S</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/strncmp_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/strncmp_32.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/strncmp_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/strncmp_64.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/lib/strncpy_from_user_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/strncpy_from_user_32.S</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/lib/strncpy_from_user_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/strncpy_from_user_64.S</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sparc/lib/ucmpdi2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/ucmpdi2.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/lib/udiv.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/udiv.S</a></td><td class='right'>357</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/udivdi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/udivdi3.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/lib/umul.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/umul.S</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/lib/urem.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/urem.S</a></td><td class='right'>357</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/usercopy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/usercopy.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/lib/xor.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/xor.S</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/math-emu/math_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/math-emu/math_64.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/mm/btfixup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/btfixup.c</a></td><td class='right'>328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/fault_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/fault_32.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/init_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/init_32.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/init_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/init_64.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/io-unit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/io-unit.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/iommu.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/leon_mm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/leon_mm.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/mm/loadmmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/loadmmu.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/mm/nosun4c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/nosun4c.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/srmmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/srmmu.c</a></td><td class='right'>1278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 14.8%;'/><td class='none' style='width: 79.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sparc/mm/srmmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/srmmu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sparc/mm/srmmu_access.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/srmmu_access.S</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/mm/sun4c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/sun4c.c</a></td><td class='right'>2166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 34.3%;'/><td class='none' style='width: 65.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/ultra.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/ultra.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/mm/viking.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/viking.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sparc/net/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/net/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sparc/net/bpf_jit.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/net/bpf_jit.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sparc/net/bpf_jit_asm.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/net/bpf_jit_asm.S</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/sparc/net/bpf_jit_comp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/net/bpf_jit_comp.c</a></td><td class='right'>802</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/sparc/prom/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/prom/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/sparc/prom/segment.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/prom/segment.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/Kconfig</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/arch/spr_def_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/arch/spr_def_32.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/arch/spr_def_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/arch/spr_def_64.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/atomic_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/atomic_32.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/bitops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/bitops.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/byteorder.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/byteorder.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/tile/include/asm/cachectl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/cachectl.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/compat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/compat.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/elf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/elf.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/futex.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/futex.h</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/hardwall.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/hardwall.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/hugetlb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/hugetlb.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/irqflags.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/irqflags.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/kexec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/kexec.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/tile/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/mmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/mmu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/mmu_context.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/mmu_context.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/tile/include/asm/module.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/module.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/page.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/page.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/pgalloc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/pgalloc.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/pgtable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/pgtable.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/pgtable_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/pgtable_32.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/pgtable_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/pgtable_64.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/processor.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/setup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/setup.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/syscalls.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/syscalls.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/thread_info.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/tlbflush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/tlbflush.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/topology.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/uaccess.h</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/asm/unistd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/unistd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/hv/drv_xgbe_intf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/hv/drv_xgbe_intf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/include/hv/hypervisor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/hv/hypervisor.h</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/compat_signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/compat_signal.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/entry.S</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/hardwall.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/hardwall.c</a></td><td class='right'>754</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 88.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/head_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/head_32.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/head_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/head_64.S</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/hvglue.lds?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/hvglue.lds</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/tile/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/init_task.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/intvec_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/intvec_32.S</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/intvec_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/intvec_64.S</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/machine_kexec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/machine_kexec.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/module.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/module.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/proc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/process.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/tile/kernel/relocate_kernel_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/relocate_kernel_32.S</a> (renamed from arch/tile/kernel/relocate_kernel.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/tile/kernel/relocate_kernel_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/relocate_kernel_64.S</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/setup.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/signal.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/single_step.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/single_step.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/smp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/smpboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/smpboot.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/sys.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/sysfs.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/tlb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/tlb.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/kernel/traps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/traps.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/atomic_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/atomic_32.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/exports.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/exports.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/memchr_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/memchr_64.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/memcpy_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/memcpy_64.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/memcpy_tile64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/memcpy_tile64.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/strchr_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/strchr_64.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/tile/lib/string-endian.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/string-endian.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/strlen_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/strlen_64.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/usercopy_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/usercopy_32.S</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/lib/usercopy_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/usercopy_64.S</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/fault.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/mm/homecache.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/homecache.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/mm/hugetlbpage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/hugetlbpage.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/mm/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/init.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/mm/migrate.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/migrate.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/mm/migrate_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/migrate_32.S</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/mm/migrate_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/migrate_64.S</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/tile/mm/pgtable.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/pgtable.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/Kconfig.common?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/Kconfig.common</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/Kconfig.um?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/Kconfig.um</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/drivers/chan_kern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/drivers/chan_kern.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/drivers/line.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/drivers/line.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/drivers/mconsole_kern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/drivers/mconsole_kern.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/drivers/net_kern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/drivers/net_kern.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/drivers/port_kern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/drivers/port_kern.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/drivers/xterm_kern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/drivers/xterm_kern.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/um/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/include/asm/pgtable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/include/asm/pgtable.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/include/asm/processor-generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/include/asm/processor-generic.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/include/asm/thread_info.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/include/shared/frame_kern.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/include/shared/frame_kern.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/include/shared/irq_kern.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/include/shared/irq_kern.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/um/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/init_task.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/irq.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/process.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/reboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/reboot.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/signal.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/skas/syscall.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/skas/syscall.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/smp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/tlb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/tlb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/trap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/trap.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/kernel/um_arch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/um_arch.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/um/os-Linux/skas/mem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/os-Linux/skas/mem.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/unicore32/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/unicore32/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/unicore32/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/unicore32/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/include/asm/processor.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/unicore32/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/unicore32/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/kernel/init_task.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/unicore32/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/kernel/signal.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/Kconfig</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/boot/compressed/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/boot/compressed/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/boot/compressed/eboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/boot/compressed/eboot.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/boot/compressed/eboot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/boot/compressed/eboot.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/boot/header.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/boot/header.S</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/boot/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/boot/main.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/boot/tools/build.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/boot/tools/build.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/crypto/aesni-intel_glue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/crypto/aesni-intel_glue.c</a></td><td class='right'>793</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 7.5%;'/><td class='none' style='width: 87.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/ia32/ia32_aout.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/ia32/ia32_aout.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/ia32/ia32_signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/ia32/ia32_signal.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/ia32/ia32entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/ia32/ia32entry.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/ia32/sys_ia32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/ia32/sys_ia32.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/acpi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/acpi.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/apic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/apic.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/apicdef.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/apicdef.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/asm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/asm.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/atomic64_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/atomic64_32.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/bitops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/bitops.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/boot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/boot.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/bootparam.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/bootparam.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/compat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/compat.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/current.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/current.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/desc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/desc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/device.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/device.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/dma-contiguous.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/dma-contiguous.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/dma-mapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/dma-mapping.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/fpu-internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/fpu-internal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/ftrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/ftrace.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/gpio.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/hardirq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/hardirq.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/io_apic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/io_apic.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/irq_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/irq_regs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/irq_remapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/irq_remapping.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/kbdleds.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/kbdleds.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/kdebug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/kdebug.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/kvm_emulate.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/kvm_emulate.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/kvm_host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/kvm_host.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/kvm_para.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/include/asm/mca.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/mca.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/include/asm/mca_dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/mca_dma.h</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/mmu_context.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/mmu_context.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/mmzone_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/mmzone_32.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/mpspec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/mpspec.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/mpspec_def.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/mpspec_def.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/msr-index.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/msr-index.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/msr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/msr.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/nmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/nmi.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/nops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/nops.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/page_32_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/page_32_types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/page_64_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/page_64_types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/paravirt.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/paravirt.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/percpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/percpu.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/perf_event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/perf_event.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/pgtable-3level.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/pgtable-3level.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/posix_types_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/posix_types_32.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/processor.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/pvclock-abi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/pvclock-abi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/realmode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/realmode.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/segment.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/segment.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/sighandling.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/sighandling.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/smp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/smp.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/spinlock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/spinlock.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/sta2x11.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/sta2x11.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/stackprotector.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/stackprotector.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/stat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/stat.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/thread_info.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/tlbflush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/tlbflush.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/topology.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/include/asm/trampoline.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/trampoline.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/uaccess.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/uaccess_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/uaccess_32.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/uaccess_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/uaccess_64.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/uprobes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/uprobes.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/uv/uv_bau.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/uv/uv_bau.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/vga.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/vga.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/word-at-a-time.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/word-at-a-time.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/x86_init.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/x86_init.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/xen/events.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/xen/events.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/xen/page.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/xen/page.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/xor_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/xor_32.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/xor_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/xor_64.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/include/asm/xor_avx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/xor_avx.h</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/include/asm/xsave.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/xsave.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/acpi/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/acpi/boot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/boot.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/acpi/realmode/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/realmode/.gitignore</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/acpi/realmode/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/realmode/Makefile</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/acpi/realmode/bioscall.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/realmode/bioscall.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/acpi/realmode/copy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/realmode/copy.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/acpi/realmode/regs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/realmode/regs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/acpi/realmode/video-bios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/realmode/video-bios.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/acpi/realmode/video-mode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/realmode/video-mode.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/acpi/realmode/video-vesa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/realmode/video-vesa.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/acpi/realmode/video-vga.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/realmode/video-vga.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/acpi/realmode/wakeup.lds.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/realmode/wakeup.lds.S</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/acpi/sleep.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/sleep.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/acpi/sleep.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/sleep.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/acpi/wakeup_rm.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/wakeup_rm.S</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/aperture_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/aperture_64.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/apic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/apic.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/apic_flat_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/apic_flat_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/apic_noop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/apic_noop.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/apic_numachip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/apic_numachip.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/bigsmp_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/bigsmp_32.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/es7000_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/es7000_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/io_apic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/io_apic.c</a></td><td class='right'>404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/numaq_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/numaq_32.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/probe_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/probe_32.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/summit_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/summit_32.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/x2apic_cluster.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/x2apic_cluster.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/x2apic_phys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/x2apic_phys.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apic/x2apic_uv_x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/x2apic_uv_x.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/apm_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apm_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/check.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/check.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/amd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/amd.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/common.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/intel_cacheinfo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/intel_cacheinfo.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/match.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/match.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mcheck/mce-apei.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/mcheck/mce-apei.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mcheck/mce-severity.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/mcheck/mce-severity.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mcheck/mce.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/mcheck/mce.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mcheck/mce_amd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/mcheck/mce_amd.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/mtrr/cleanup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/mtrr/cleanup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_amd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event_amd.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_amd_ibs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event_amd_ibs.c</a></td><td class='right'>570</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_intel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event_intel.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_intel_ds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event_intel_ds.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/cpu/perf_event_p4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event_p4.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/dumpstack.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/dumpstack.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/dumpstack_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/dumpstack_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/dumpstack_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/dumpstack_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/e820.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/e820.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/entry_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/entry_32.S</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/entry_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/entry_64.S</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/ftrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/ftrace.c</a></td><td class='right'>594</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/head32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/head32.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/head64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/head64.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/head_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/head_32.S</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/head_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/head_64.S</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/hpet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/hpet.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/i387.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/i387.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/init_task.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/irq_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/irq_32.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/kprobes.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/kprobes.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/kvm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/kvm.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/kvmclock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/kvmclock.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/mca_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/mca_32.c</a></td><td class='right'>476</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.5%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/microcode_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/microcode_core.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/microcode_intel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/microcode_intel.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/mpparse.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/mpparse.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/nmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/nmi.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/nmi_selftest.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/nmi_selftest.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/paravirt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/paravirt.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/pci-calgary_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/pci-calgary_64.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/pci-dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/pci-dma.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/pci-nommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/pci-nommu.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/process.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/process_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/process_32.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/process_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/process_64.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/ptrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/ptrace.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/reboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/reboot.c</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/setup.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/setup_percpu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/setup_percpu.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/signal.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/smp.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/smpboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/smpboot.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/tboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/tboot.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/test_rodata.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/test_rodata.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/time.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/trampoline.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/trampoline.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/x86/kernel/trampoline_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/trampoline_32.S</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/traps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/traps.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/kernel/uprobes.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/uprobes.c</a></td><td class='right'>674</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/vmlinux.lds.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/vmlinux.lds.S</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/vsmp_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/vsmp_64.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/x86_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/x86_init.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kernel/xsave.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/xsave.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/cpuid.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/cpuid.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/emulate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/emulate.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/i8254.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/i8254.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/i8254.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/i8254.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/lapic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/lapic.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/mmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/mmu.c</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/mmu_audit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/mmu_audit.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/paging_tmpl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/paging_tmpl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/svm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/svm.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/vmx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/vmx.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/x86.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/x86.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/kvm/x86.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/x86.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/checksum_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/checksum_32.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/copy_user_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/copy_user_64.S</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/copy_user_nocache_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/copy_user_nocache_64.S</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/csum-copy_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/csum-copy_64.S</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/getuser.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/getuser.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/putuser.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/putuser.S</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/usercopy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/usercopy.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/usercopy_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/usercopy_32.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/usercopy_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/usercopy_64.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/lib/x86-opcode-map.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/x86-opcode-map.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/extable.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/extable.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/fault.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/init.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/init_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/init_64.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/numa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/numa.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/numa_emulation.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/numa_emulation.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/pat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/pat.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/srat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/srat.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/mm/tlb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/tlb.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/acpi.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/amd_bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/amd_bus.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/broadcom_bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/broadcom_bus.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/bus_numa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/bus_numa.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/bus_numa.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/bus_numa.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/common.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/fixup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/fixup.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/i386.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/i386.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/pci/sta2x11-fixup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/sta2x11-fixup.c</a></td><td class='right'>366</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/pci/xen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/xen.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/geode/net5501.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/platform/geode/net5501.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/mrst/mrst.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/platform/mrst/mrst.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/olpc/olpc-xo1-sci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/platform/olpc/olpc-xo1-sci.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/uv/tlb_uv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/platform/uv/tlb_uv.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/platform/visws/visws_quirks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/platform/visws/visws_quirks.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/init.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/.gitignore</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/Makefile</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/bioscall.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/bioscall.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/copy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/copy.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/header.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/header.S</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/realmode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/realmode.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/realmode.lds.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/realmode.lds.S</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/realmode/rm/reboot_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/reboot_32.S</a> (renamed from arch/x86/kernel/reboot_32.S)</td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/regs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/regs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/stack.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/stack.S</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/trampoline_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/trampoline_32.S</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/realmode/rm/trampoline_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/trampoline_64.S</a> (renamed from arch/x86/kernel/trampoline_64.S)</td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/trampoline_common.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/trampoline_common.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/video-bios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/video-bios.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/video-mode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/video-mode.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/video-vesa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/video-vesa.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rm/video-vga.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/video-vga.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/realmode/rm/wakemain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/wakemain.c</a> (renamed from arch/x86/kernel/acpi/realmode/wakemain.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/realmode/rm/wakeup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/wakeup.h</a> (renamed from arch/x86/kernel/acpi/realmode/wakeup.h)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/realmode/rm/wakeup_asm.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/wakeup_asm.S</a> (renamed from arch/x86/kernel/acpi/realmode/wakeup.S)</td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/realmode/rmpiggy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rmpiggy.S</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/syscalls/syscall_32.tbl?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/syscalls/syscall_32.tbl</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/syscalls/syscall_64.tbl?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/syscalls/syscall_64.tbl</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/tools/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/tools/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/tools/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/tools/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/tools/gen-insn-attr-x86.awk?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/tools/gen-insn-attr-x86.awk</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/arch/x86/tools/relocs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/tools/relocs.c</a> (renamed from arch/x86/boot/compressed/relocs.c)</td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/asm/elf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/asm/elf.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/asm/ptrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/asm/ptrace.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/asm/ptrace_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/asm/ptrace_32.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/asm/ptrace_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/asm/ptrace_64.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/checksum_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/checksum_32.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/shared/sysdep/ptrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/shared/sysdep/ptrace.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/shared/sysdep/ptrace_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/shared/sysdep/ptrace_32.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/shared/sysdep/ptrace_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/shared/sysdep/ptrace_64.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/signal.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/sys_call_table_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/sys_call_table_64.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/syscalls_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/syscalls_32.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/sysrq_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/sysrq_32.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/sysrq_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/sysrq_64.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/um/tls_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/tls_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/video/fbdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/video/fbdev.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/xen/apic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/apic.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/debugfs.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/debugfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/debugfs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/enlighten.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/enlighten.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/mmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/mmu.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/p2m.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/p2m.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/setup.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/smp.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/x86/xen/smp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/smp.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/spinlock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/spinlock.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/xen-asm_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/xen-asm_32.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/x86/xen/xen-ops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/xen-ops.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/configs/common_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/configs/common_defconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/gpio.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/arch/xtensa/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/kvm_para.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/processor.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/include/asm/signal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/signal.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/include/asm/syscall.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/syscall.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/thread_info.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/include/asm/unistd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/unistd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/kernel/entry.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/arch/xtensa/kernel/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/kernel/init_task.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/kernel/process.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/kernel/signal.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/variants/s6000/dmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/variants/s6000/dmac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/variants/s6000/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/variants/s6000/gpio.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/variants/s6000/include/variant/dmac.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/variants/s6000/include/variant/dmac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/arch/xtensa/variants/s6000/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/variants/s6000/irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/Kconfig.iosched?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/Kconfig.iosched</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-cgroup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk-cgroup.c</a></td><td class='right'>2109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.6%;'/><td class='rem' style='width: 22.8%;'/><td class='none' style='width: 66.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-cgroup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk-cgroup.h</a></td><td class='right'>647</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 89.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk-core.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-ioc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk-ioc.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk-sysfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk-throttle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk-throttle.c</a></td><td class='right'>697</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 89.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/blk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/cfq-iosched.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/cfq-iosched.c</a></td><td class='right'>1072</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.8%;'/><td class='rem' style='width: 6.1%;'/><td class='none' style='width: 83.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/block/cfq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/cfq.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/deadline-iosched.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/deadline-iosched.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/elevator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/elevator.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/genhd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/genhd.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/noop-iosched.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/noop-iosched.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/block/partitions/ibm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/partitions/ibm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/ablkcipher.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/ablkcipher.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/aead.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/aead.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/ahash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/ahash.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/blkcipher.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/blkcipher.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/crypto_user.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/crypto_user.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/pcompress.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/pcompress.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/rng.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/rng.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/shash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/shash.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/crypto/xor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/xor.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/battery.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/battery.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/bgrt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/bgrt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/bus.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/glue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/glue.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/pci_link.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/pci_link.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/power.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/power.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/processor_perflib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/processor_perflib.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/scan.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/sleep.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/sleep.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/utils.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/utils.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/acpi/video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/video.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/amba/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/amba/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/amba/bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/amba/bus.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/amba/tegra-ahb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/amba/tegra-ahb.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/ahci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/ahci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/ahci_platform.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/ahci_platform.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/ata_generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/ata_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/ata_piix.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/ata_piix.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/libata-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/libata-core.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/libata-eh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/libata-eh.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/libata-scsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/libata-scsi.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/pata_arasan_cf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/pata_arasan_cf.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ata/pata_ep93xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/pata_ep93xx.c</a></td><td class='right'>1044</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ata/sata_mv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/sata_mv.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/atm/ambassador.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/atm/ambassador.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/atm/horizon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/atm/horizon.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/atm/idt77252.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/atm/idt77252.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/atm/solos-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/atm/solos-pci.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/Kconfig</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/bus.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/core.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/cpu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/cpu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/devres.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/devres.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/devtmpfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/devtmpfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/dma-buf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/dma-buf.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/dma-coherent.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/dma-coherent.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/base/dma-contiguous.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/dma-contiguous.c</a></td><td class='right'>401</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/driver.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/node.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/node.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/domain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/domain.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/domain_governor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/domain_governor.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/main.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/qos.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/qos.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/runtime.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/runtime.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/sysfs.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/power/wakeup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/wakeup.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/internal.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/regcache-lzo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regcache-lzo.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/regcache-rbtree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regcache-rbtree.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/regcache.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regcache.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/regmap-debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regmap-debugfs.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/regmap-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regmap-i2c.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/regmap-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regmap-irq.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/base/regmap/regmap-mmio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regmap-mmio.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/regmap-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regmap-spi.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/regmap/regmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regmap.c</a></td><td class='right'>278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/base/soc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/soc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bcma/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bcma/core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bcma/driver_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bcma/driver_pci.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bcma/driver_pci_host.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bcma/driver_pci_host.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bcma/host_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bcma/host_pci.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bcma/scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bcma/scan.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bcma/sprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bcma/sprom.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/DAC960.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/DAC960.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_actlog.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_actlog.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_bitmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_bitmap.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_int.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_int.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_main.c</a></td><td class='right'>357</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_nl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_nl.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_proc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_receiver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_receiver.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_req.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_req.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_req.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_req.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/drbd/drbd_worker.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_worker.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/floppy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/floppy.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/mtip32xx/mtip32xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/mtip32xx/mtip32xx.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/mtip32xx/mtip32xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/mtip32xx/mtip32xx.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/rbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/rbd.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/virtio_blk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/virtio_blk.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/block/xen-blkfront.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/xen-blkfront.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/ath3k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/ath3k.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/bcm203x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/bcm203x.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/bfusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/bfusb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/bpa10x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/bpa10x.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/btmrvl_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/btmrvl_drv.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/btmrvl_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/btmrvl_main.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/btmrvl_sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/btmrvl_sdio.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/btusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/btusb.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/hci_ldisc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/hci_ldisc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/bluetooth/hci_vhci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/hci_vhci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/agp/generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/agp/generic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/agp/intel-agp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/agp/intel-agp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/agp/intel-agp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/agp/intel-agp.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/agp/intel-gtt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/agp/intel-gtt.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/agp/sgi-agp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/agp/sgi-agp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/hw_random/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/hw_random/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/hw_random/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/hw_random/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/hw_random/omap-rng.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/hw_random/omap-rng.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/char/hw_random/pseries-rng.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/hw_random/pseries-rng.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/mem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/mem.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/char/ramoops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/ramoops.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/virtio_console.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/virtio_console.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/xilinx_hwicap/xilinx_hwicap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/xilinx_hwicap/xilinx_hwicap.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/char/xilinx_hwicap/xilinx_hwicap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/xilinx_hwicap/xilinx_hwicap.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-divider.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clk-divider.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/clk-fixed-factor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clk-fixed-factor.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-fixed-rate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clk-fixed-rate.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-gate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clk-gate.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk-mux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clk-mux.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clk.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clk/clkdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clkdev.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mxs/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mxs/clk-div.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk-div.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mxs/clk-frac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk-frac.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mxs/clk-imx23.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk-imx23.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mxs/clk-imx28.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk-imx28.c</a></td><td class='right'>338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mxs/clk-pll.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk-pll.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mxs/clk-ref.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk-ref.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mxs/clk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/mxs/clk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/spear/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/spear/clk-aux-synth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/clk-aux-synth.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/spear/clk-frac-synth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/clk-frac-synth.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/spear/clk-gpt-synth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/clk-gpt-synth.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/spear/clk-vco-pll.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/clk-vco-pll.c</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/spear/clk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/clk.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/spear/clk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/clk.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/spear/spear1310_clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/spear1310_clock.c</a></td><td class='right'>1106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/spear/spear1340_clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/spear1340_clock.c</a></td><td class='right'>964</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/spear/spear3xx_clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/spear3xx_clock.c</a></td><td class='right'>612</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clk/spear/spear6xx_clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/spear6xx_clock.c</a></td><td class='right'>342</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clocksource/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clocksource/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/clocksource/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clocksource/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/clocksource/em_sti.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clocksource/em_sti.c</a></td><td class='right'>406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpufreq/db8500-cpufreq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/cpufreq/db8500-cpufreq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/cpuidle/cpuidle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/cpuidle/cpuidle.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/Kconfig</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/amcc/crypto4xx_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/amcc/crypto4xx_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/caam/caamalg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/caam/caamalg.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/caam/ctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/caam/ctrl.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/crypto/mv_cesa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/mv_cesa.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-aes-cbc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-aes-cbc.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-aes-ccm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-aes-ccm.c</a></td><td class='right'>468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-aes-ctr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-aes-ctr.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-aes-ecb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-aes-ecb.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-aes-gcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-aes-gcm.c</a></td><td class='right'>353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-aes-xcbc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-aes-xcbc.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-sha256.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-sha256.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx-sha512.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-sha512.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx.c</a></td><td class='right'>716</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx.h</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx_csbcpb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx_csbcpb.h</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/nx/nx_debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx_debugfs.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/Kconfig</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/cryp/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/cryp/cryp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp.c</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/cryp/cryp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp.h</a></td><td class='right'>308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/cryp/cryp_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp_core.c</a></td><td class='right'>1784</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 28.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 71.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/cryp/cryp_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp_irq.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/cryp/cryp_irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp_irq.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/cryp/cryp_irqp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp_irqp.h</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/cryp/cryp_p.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp_p.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/hash/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/hash/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/hash/hash_alg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/hash/hash_alg.h</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/crypto/ux500/hash/hash_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/hash/hash_core.c</a></td><td class='right'>2009</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 31.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 68.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/devfreq/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/devfreq/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/devfreq/governor_performance.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/devfreq/governor_performance.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/devfreq/governor_powersave.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/devfreq/governor_powersave.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/amba-pl08x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/amba-pl08x.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/at_hdmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/at_hdmac.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/at_hdmac_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/at_hdmac_regs.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/coh901318.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/coh901318.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/coh901318_lli.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/coh901318_lli.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/dw_dmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/dw_dmac.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/ep93xx_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/ep93xx_dma.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/imx-dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/imx-dma.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/imx-sdma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/imx-sdma.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/intel_mid_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/intel_mid_dma.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/ipu/ipu_idmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/ipu/ipu_idmac.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/mv_xor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/mv_xor.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/mv_xor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/mv_xor.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/mxs-dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/mxs-dma.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/pch_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/pch_dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/pl330.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/pl330.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/dma/ste_dma40.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/ste_dma40.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/amd64_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/amd64_edac.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/amd76x_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/amd76x_edac.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/cell_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/cell_edac.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/cpc925_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/cpc925_edac.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/e752x_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/e752x_edac.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/e7xxx_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/e7xxx_edac.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/edac_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/edac_core.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/edac_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/edac_device.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/edac_mc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/edac_mc.c</a></td><td class='right'>716</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 88.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/edac_mc_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/edac_mc_sysfs.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/edac_module.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/edac_module.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/edac_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/edac_pci.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/i3000_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i3000_edac.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/i3200_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i3200_edac.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/i5000_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i5000_edac.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/i5100_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i5100_edac.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/i5400_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i5400_edac.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/i7300_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i7300_edac.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/i7core_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i7core_edac.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/i82443bxgx_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i82443bxgx_edac.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/i82860_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i82860_edac.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/i82875p_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i82875p_edac.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/i82975x_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i82975x_edac.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/mce_amd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/mce_amd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/mpc85xx_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/mpc85xx_edac.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/mv64x60_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/mv64x60_edac.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/pasemi_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/pasemi_edac.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/ppc4xx_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/ppc4xx_edac.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/r82600_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/r82600_edac.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/sb_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/sb_edac.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/tile_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/tile_edac.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/edac/x38_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/x38_edac.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/extcon/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/extcon/Kconfig</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/extcon/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/extcon/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/extcon/extcon-max8997.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/extcon/extcon-max8997.c</a> (renamed from drivers/misc/max8997-muic.c)</td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/extcon/extcon_class.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/extcon/extcon_class.c</a></td><td class='right'>832</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/extcon/extcon_gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/extcon/extcon_gpio.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firewire/core-card.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/core-card.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firewire/core-cdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/core-cdev.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firewire/core-device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/core-device.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firewire/core-iso.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/core-iso.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firewire/core-transaction.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/core-transaction.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firewire/core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/core.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firewire/nosy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/nosy.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firewire/ohci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/ohci.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firewire/sbp2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/sbp2.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/firmware/efivars.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firmware/efivars.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/Kconfig</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/devres.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/devres.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-bt8xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-bt8xx.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpio/gpio-em.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-em.c</a></td><td class='right'>418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-ep93xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-ep93xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-generic.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpio/gpio-ich.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-ich.c</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-langwell.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-langwell.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-lpc32xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-lpc32xx.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-mcp23s08.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-mcp23s08.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-ml-ioh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-ml-ioh.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpio/gpio-mm-lantiq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-mm-lantiq.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-mpc8xxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-mpc8xxx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpio/gpio-msic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-msic.c</a></td><td class='right'>339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-mxc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-mxc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-mxs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-mxs.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-omap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-omap.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-pca953x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-pca953x.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-pch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-pch.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-pxa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-pxa.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpio/gpio-rc5t583.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-rc5t583.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-samsung.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-samsung.c</a></td><td class='right'>426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-sch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-sch.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-sodaville.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-sodaville.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpio/gpio-sta2x11.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-sta2x11.c</a></td><td class='right'>435</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpio/gpio-stp-xway.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-stp-xway.c</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-tegra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-tegra.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-tps65910.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-tps65910.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpio-wm831x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-wm831x.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/gpio/gpiolib-of.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpiolib-of.c</a> (renamed from drivers/of/gpio.c)</td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpio/gpiolib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpiolib.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/ast/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/ast/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/ast/ast_dram_tables.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_dram_tables.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/ast/ast_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_drv.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/ast/ast_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_drv.h</a></td><td class='right'>356</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/ast/ast_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_fb.c</a></td><td class='right'>341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/ast/ast_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_main.c</a></td><td class='right'>527</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/ast/ast_mode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_mode.c</a></td><td class='right'>1160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/ast/ast_post.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_post.c</a></td><td class='right'>1780</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 28.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 71.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/ast/ast_tables.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_tables.h</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/ast/ast_ttm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_ttm.c</a></td><td class='right'>453</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/cirrus/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/cirrus/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/cirrus/cirrus_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/cirrus_drv.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/cirrus/cirrus_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/cirrus_drv.h</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/cirrus/cirrus_fbdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/cirrus_fbdev.c</a></td><td class='right'>307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/cirrus/cirrus_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/cirrus_main.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/cirrus/cirrus_mode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/cirrus_mode.c</a></td><td class='right'>629</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/cirrus/cirrus_ttm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/cirrus_ttm.c</a></td><td class='right'>458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_cache.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_cache.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_context.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_context.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_crtc.c</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_crtc_helper.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_crtc_helper.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_drv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_edid.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_edid.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_edid_load.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_edid_load.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_edid_modes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_edid_modes.h</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_fb_helper.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_fb_helper.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_gem.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_ioctl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_irq.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_lock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_lock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_prime.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_prime.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_stub.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_stub.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_sysfs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/drm_vm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_vm.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_buf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_buf.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_crtc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_crtc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_crtc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_dmabuf.c</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_dmabuf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_dmabuf.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_drv.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_drv.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_encoder.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_encoder.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_fb.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_fb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_fb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_g2d.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_g2d.c</a></td><td class='right'>937</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_g2d.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_g2d.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_gem.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_gem.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_gem.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_hdmi.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_hdmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_hdmi.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_drm_plane.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_plane.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_hdmi.c</a></td><td class='right'>429</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/exynos_mixer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_mixer.c</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/exynos/regs-hdmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/regs-hdmi.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/cdv_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/cdv_device.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/cdv_intel_crt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/cdv_intel_crt.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/cdv_intel_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/cdv_intel_display.c</a></td><td class='right'>697</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 89.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/cdv_intel_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/cdv_intel_hdmi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/cdv_intel_lvds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/cdv_intel_lvds.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/framebuffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/framebuffer.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/gem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/gtt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/gtt.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/intel_bios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/intel_bios.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/intel_bios.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/intel_bios.h</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/mdfld_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/mdfld_device.c</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/mdfld_dsi_dpi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/mdfld_intel_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/mdfld_intel_display.c</a></td><td class='right'>330</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/mid_bios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/mid_bios.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/oaktrail.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/oaktrail.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/oaktrail_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/oaktrail_crtc.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/oaktrail_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/oaktrail_device.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/oaktrail_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/oaktrail_hdmi.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/oaktrail_lvds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/oaktrail_lvds.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/opregion.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/opregion.c</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/opregion.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/opregion.h</a> (renamed from drivers/gpu/drm/gma500/intel_opregion.c)</td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/psb_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_device.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/psb_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_drv.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/psb_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_drv.h</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/psb_intel_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_intel_display.c</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/psb_intel_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_intel_drv.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/psb_intel_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_intel_reg.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/psb_intel_sdvo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_intel_sdvo.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/psb_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_irq.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/gma500/psb_lid.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_lid.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i810/i810_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i810/i810_dma.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_debugfs.c</a></td><td class='right'>388</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_dma.c</a></td><td class='right'>1155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 13.5%;'/><td class='none' style='width: 81.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_drv.c</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_drv.h</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem.c</a></td><td class='right'>1932</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.4%;'/><td class='rem' style='width: 17.1%;'/><td class='none' style='width: 69.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_debug.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_dmabuf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_dmabuf.c</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_evict.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_evict.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_execbuffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_execbuffer.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_gtt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_gtt.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_stolen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_stolen.c</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_gem_tiling.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_tiling.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_ioc32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_ioc32.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_irq.c</a></td><td class='right'>1799</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.0%;'/><td class='rem' style='width: 10.5%;'/><td class='none' style='width: 71.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_reg.h</a></td><td class='right'>531</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_suspend.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_suspend.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_sysfs.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/i915_trace_points.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_trace_points.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_acpi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_bios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_bios.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_crt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_crt.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_ddi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_ddi.c</a></td><td class='right'>755</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_display.c</a></td><td class='right'>4396</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.2%;'/><td class='rem' style='width: 52.3%;'/><td class='none' style='width: 30.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_dp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_dp.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_drv.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_dvo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_dvo.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_fb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_hdmi.c</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_i2c.c</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_lvds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_lvds.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_modes.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_modes.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_opregion.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_opregion.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_overlay.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_overlay.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_panel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_panel.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_pm.c</a></td><td class='right'>3820</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 60.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 39.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_ringbuffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_ringbuffer.c</a></td><td class='right'>745</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 6.2%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_ringbuffer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_ringbuffer.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_sdvo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_sdvo.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_sdvo_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_sdvo_regs.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_sprite.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_sprite.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/i915/intel_tv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_tv.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/mgag200/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/mgag200/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/mgag200/mgag200_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_drv.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/mgag200/mgag200_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_drv.h</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/mgag200/mgag200_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_fb.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/mgag200/mgag200_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_i2c.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/mgag200/mgag200_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_main.c</a></td><td class='right'>388</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/mgag200/mgag200_mode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_mode.c</a></td><td class='right'>1533</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/mgag200/mgag200_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_reg.h</a></td><td class='right'>661</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/mgag200/mgag200_ttm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_ttm.c</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_acpi.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_bios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_bios.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_bo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_bo.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_channel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_channel.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_connector.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_connector.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_display.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_dma.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_dp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_dp.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_drv.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_drv.h</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_fbcon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_fbcon.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_fence.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_fence.c</a></td><td class='right'>578</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 7.7%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_fence.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_fence.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_fifo.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_fifo.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_gem.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_gpio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_grctx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_grctx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_hdmi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_hw.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_i2c.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_i2c.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_i2c.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_mem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_mem.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_object.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_object.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_perf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_perf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_pm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_pm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_prime.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_prime.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_sgdma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_sgdma.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_software.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_software.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_state.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_state.c</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_vm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_vm.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nouveau_vm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_vm.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv04_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_crtc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv04_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_display.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv04_fbcon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_fbcon.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv04_fence.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_fence.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv04_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_fifo.c</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv04_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_graph.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv04_instmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_instmem.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv04_software.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_software.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv10_fence.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv10_fence.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv10_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv10_fifo.c</a></td><td class='right'>278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv10_gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv10_gpio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv10_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv10_graph.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv17_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv17_fifo.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv20_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv20_graph.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv31_mpeg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv31_mpeg.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv40_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv40_fifo.c</a></td><td class='right'>351</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv40_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv40_graph.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv40_grctx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv40_grctx.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv40_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv40_pm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_crtc.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_cursor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_cursor.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_dac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_dac.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_display.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_display.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_display.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_evo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_evo.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_fb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_fbcon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_fbcon.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_fifo.c</a></td><td class='right'>596</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 6.4%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_graph.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_grctx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_grctx.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_instmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_instmem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_mpeg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_mpeg.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_software.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_software.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_sor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_sor.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv50_vm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_vm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv84_fence.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv84_fence.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv84_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv84_fifo.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv98_crypt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv98_crypt.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv98_crypt.fuc?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv98_crypt.fuc</a></td><td class='right'>698</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nv98_crypt.fuc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv98_crypt.fuc.h</a></td><td class='right'>584</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nva3_copy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nva3_copy.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nva3_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nva3_pm.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nvc0_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_fb.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nvc0_fbcon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_fbcon.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nvc0_fence.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_fence.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nvc0_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_fifo.c</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nvc0_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_graph.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nvc0_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_pm.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nvc0_software.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_software.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nvd0_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvd0_display.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nve0_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nve0_fifo.c</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nve0_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nve0_graph.c</a></td><td class='right'>831</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nve0_graph.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nve0_graph.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/nouveau/nve0_grctx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nve0_grctx.c</a></td><td class='right'>2777</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 43.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 56.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/atombios_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/atombios_crtc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/atombios_dp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/atombios_dp.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/atombios_encoders.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/atombios_encoders.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/evergreen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/evergreen.c</a></td><td class='right'>537</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/evergreen_blit_kms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/evergreen_blit_kms.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/evergreen_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/evergreen_cs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/evergreen_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/evergreen_hdmi.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/evergreen_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/evergreen_reg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/evergreend.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/evergreend.h</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/ni.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/ni.c</a></td><td class='right'>424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 5.8%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/nid.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/nid.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r100.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r200.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r300.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r420.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r420.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r520.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r520.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r600.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600.c</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r600_audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600_audio.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r600_blit_kms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600_blit_kms.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r600_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600_cs.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r600_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600_hdmi.c</a></td><td class='right'>463</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r600_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600_reg.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/r600d.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600d.h</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon.h</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_asic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_asic.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_asic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_asic.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_atombios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_atombios.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_benchmark.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_benchmark.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_combios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_combios.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_connectors.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_connectors.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_cp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_cp.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_cs.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_device.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_display.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_drv.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_fence.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_fence.c</a></td><td class='right'>621</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_gart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_gart.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_gem.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_irq_kms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_irq_kms.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_kms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_kms.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_legacy_encoders.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_legacy_encoders.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_mode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_mode.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_object.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_object.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_object.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_object.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_pm.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_prime.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_prime.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_ring.c</a></td><td class='right'>415</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_sa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_sa.c</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_semaphore.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_semaphore.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_test.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_test.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/radeon_ttm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_ttm.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/rs400.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rs400.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/rs600.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rs600.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/rs600d.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rs600d.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/rs690.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rs690.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/rv515.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rv515.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/rv770.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rv770.c</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/rv770d.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rv770d.h</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/si.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/si.c</a></td><td class='right'>507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/radeon/sid.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/sid.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/savage/savage_bci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/savage/savage_bci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/ttm/ttm_bo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ttm/ttm_bo.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/udl/udl_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/udl/udl_drv.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/udl/udl_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/udl/udl_drv.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/udl/udl_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/udl/udl_fb.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/udl/udl_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/udl/udl_gem.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/udl/udl_modeset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/udl/udl_modeset.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/vmwgfx/vmwgfx_kms.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/vmwgfx/vmwgfx_resource.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/vga/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/vga/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/vga/vga_switcheroo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/vga/vga_switcheroo.c</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/gpu/vga/vgaarb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/vga/vgaarb.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/Kconfig</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-apple.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-apple.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/hid/hid-aureal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-aureal.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-core.c</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/hid/hid-generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-generic.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-hyperv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-hyperv.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-ids.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-ids.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-input.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-lg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-lg.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-lg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-lg.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-lg4ff.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-lg4ff.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-logitech-dj.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-logitech-dj.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-multitouch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-multitouch.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-uclogic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-uclogic.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-wacom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-wacom.c</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-waltop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-waltop.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hid-wiimote-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-wiimote-core.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/hidraw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hidraw.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/usbhid/hid-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/usbhid/hid-core.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/usbhid/hid-quirks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/usbhid/hid-quirks.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/usbhid/hiddev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/usbhid/hiddev.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/usbhid/usbhid.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/usbhid/usbhid.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hid/usbhid/usbmouse.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/usbhid/usbmouse.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/channel_mgmt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hv/channel_mgmt.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/hv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hv/hv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/hv_kvp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hv/hv_kvp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/hv_util.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hv/hv_util.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/hyperv_vmbus.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hv/hyperv_vmbus.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hv/ring_buffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hv/ring_buffer.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/Kconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/acpi_power_meter.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/acpi_power_meter.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/ad7314.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/ad7314.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/coretemp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/coretemp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/fam15h_power.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/fam15h_power.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/hwmon/ina2xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/ina2xx.c</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/it87.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/it87.c</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/k10temp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/k10temp.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/k8temp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/k8temp.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/ntc_thermistor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/ntc_thermistor.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/sch5627.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/sch5627.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/sch5636.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/sch5636.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/sch56xx-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/sch56xx-common.c</a></td><td class='right'>406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/hwmon/sch56xx-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/sch56xx-common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/algos/i2c-algo-bit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/algos/i2c-algo-bit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-davinci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-davinci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-designware-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-designware-core.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-designware-core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-designware-core.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-designware-platdrv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-designware-platdrv.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-eg20t.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-eg20t.c</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-gpio.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-imx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-imx.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-ixp2000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-ixp2000.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-mpc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-mpc.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-mxs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-mxs.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-nuc900.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-nuc900.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-ocores.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-ocores.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-pca-platform.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-pca-platform.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-pnx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-pnx.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-powermac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-powermac.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-pxa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-pxa.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-s3c2410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-s3c2410.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-s6000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-s6000.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-s6000.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-s6000.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-sh_mobile.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-sh_mobile.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-tegra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-tegra.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-versatile.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-versatile.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/busses/i2c-xiic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-xiic.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/i2c-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/i2c-core.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/i2c-dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/i2c-dev.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/i2c-mux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/i2c-mux.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/muxes/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/muxes/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/i2c/muxes/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/muxes/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/i2c/muxes/i2c-mux-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/muxes/i2c-mux-gpio.c</a> (renamed from drivers/i2c/muxes/gpio-i2cmux.c)</td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/i2c/muxes/i2c-mux-pca9541.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/muxes/i2c-mux-pca9541.c</a> (renamed from drivers/i2c/muxes/pca9541.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/i2c/muxes/i2c-mux-pca954x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/muxes/i2c-mux-pca954x.c</a> (renamed from drivers/i2c/muxes/pca954x.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/i2c/muxes/i2c-mux-pinctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/muxes/i2c-mux-pinctrl.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ieee802154/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ieee802154/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ieee802154/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ieee802154/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/ieee802154/fakelb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ieee802154/fakelb.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/Kconfig</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/adc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/adc/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/adc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/adc/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/adc/at91_adc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/adc/at91_adc.c</a></td><td class='right'>802</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/amplifiers/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/amplifiers/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/amplifiers/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/amplifiers/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iio/amplifiers/ad8366.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/amplifiers/ad8366.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/iio/iio_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/iio_core.h</a> (renamed from drivers/staging/iio/iio_core.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/iio/iio_core_trigger.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/iio_core_trigger.h</a> (renamed from drivers/staging/iio/iio_core_trigger.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/iio/industrialio-buffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/industrialio-buffer.c</a> (renamed from drivers/staging/iio/industrialio-buffer.c)</td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/iio/industrialio-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/industrialio-core.c</a> (renamed from drivers/staging/iio/industrialio-core.c)</td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/iio/industrialio-event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/industrialio-event.c</a> (renamed from drivers/staging/iio/industrialio-event.c)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/iio/industrialio-trigger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/industrialio-trigger.c</a> (renamed from drivers/staging/iio/industrialio-trigger.c)</td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/iio/inkern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/inkern.c</a> (renamed from drivers/staging/iio/inkern.c)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/iio/kfifo_buf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/kfifo_buf.c</a> (renamed from drivers/staging/iio/kfifo_buf.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/cma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/core/cma.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/netlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/core/netlink.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/ucma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/core/ucma.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/umem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/core/umem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/uverbs_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/core/uverbs_cmd.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/core/verbs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/core/verbs.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/cm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/cm.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/device.c</a></td><td class='right'>340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/ev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/ev.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/id_table.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/id_table.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/iw_cxgb4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/iw_cxgb4.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/mem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/mem.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/provider.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/provider.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/qp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/qp.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/resource.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/resource.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/t4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/t4.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/cxgb4/user.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/user.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ipath/ipath_iba6110.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ipath/ipath_iba6110.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/ipath/ipath_intr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ipath/ipath_intr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx4/cq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/mlx4/cq.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx4/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/mlx4/main.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx4/mlx4_ib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/mlx4/mlx4_ib.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx4/mr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/mlx4/mr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx4/qp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/mlx4/qp.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/mlx4/srq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/mlx4/srq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/nes/nes_cm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/nes/nes_cm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma.h</a></td><td class='right'>392</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_abi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_abi.h</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_ah.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_ah.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_ah.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_ah.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_hw.c</a></td><td class='right'>2633</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 41.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 58.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_hw.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_main.c</a></td><td class='right'>576</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_sli.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_sli.h</a></td><td class='right'>1672</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 73.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_verbs.c</a></td><td class='right'>2532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 40.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 60.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/infiniband/hw/ocrdma/ocrdma_verbs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_verbs.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_driver.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_iba6120.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_iba6120.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_iba7220.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_iba7220.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_iba7322.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_iba7322.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_init.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_mad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_mad.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_qp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_qp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_rc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_rc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_ruc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_ruc.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_sysfs.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_tx.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_uc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_uc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_ud.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_ud.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/hw/qib/qib_verbs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_verbs.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/iser/iscsi_iser.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/ulp/iser/iscsi_iser.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/iser/iser_verbs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/ulp/iser/iser_verbs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/infiniband/ulp/srpt/ib_srpt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/ulp/srpt/ib_srpt.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/evdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/evdev.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/ff-memless.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/ff-memless.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/gameport/emu10k1-gp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/gameport/emu10k1-gp.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/gameport/fm801-gp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/gameport/fm801-gp.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/a3d.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/a3d.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/adi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/adi.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/as5011.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/as5011.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/cobra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/cobra.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/gf2k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/gf2k.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/grip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/grip.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/grip_mp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/grip_mp.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/guillemot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/guillemot.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/iforce/iforce-main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/iforce/iforce-main.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/iforce/iforce-packets.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/iforce/iforce-packets.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/iforce/iforce-usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/iforce/iforce-usb.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/iforce/iforce.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/iforce/iforce.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/interact.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/interact.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/joydump.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/joydump.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/magellan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/magellan.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/sidewinder.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/sidewinder.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/spaceball.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/spaceball.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/spaceorb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/spaceorb.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/stinger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/stinger.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/tmdc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/tmdc.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/twidjoy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/twidjoy.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/warrior.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/warrior.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/xpad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/xpad.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/joystick/zhenhua.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/zhenhua.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/Kconfig</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/adp5588-keys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/adp5588-keys.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/atkbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/atkbd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/ep93xx_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/ep93xx_keypad.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/hil_kbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/hil_kbd.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/imx_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/imx_keypad.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/lkkbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/lkkbd.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/input/keyboard/lm8333.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/lm8333.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/matrix_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/matrix_keypad.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/newtonkbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/newtonkbd.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/nomadik-ske-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/nomadik-ske-keypad.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/omap-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/omap-keypad.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/omap4-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/omap4-keypad.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/pmic8xxx-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/pmic8xxx-keypad.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/pxa27x_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/pxa27x_keypad.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/samsung-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/samsung-keypad.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/spear-keyboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/spear-keyboard.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/stmpe-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/stmpe-keypad.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/stowaway.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/stowaway.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/sunkbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/sunkbd.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/tc3589x-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/tc3589x-keypad.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/tca8418_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/tca8418_keypad.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/tegra-kbc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/tegra-kbc.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/tnetv107x-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/tnetv107x-keypad.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/twl4030_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/twl4030_keypad.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/w90p910_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/w90p910_keypad.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/keyboard/xtkbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/xtkbd.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/input/matrix-keymap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/matrix-keymap.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/cm109.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/cm109.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/cma3000_d0x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/cma3000_d0x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/keyspan_remote.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/keyspan_remote.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/mpu3050.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/mpu3050.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/powermate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/powermate.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/twl6040-vibra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/twl6040-vibra.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/wm831x-on.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/wm831x-on.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/misc/yealink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/yealink.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/alps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/alps.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/alps.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/alps.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/appletouch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/appletouch.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/bcm5974.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/bcm5974.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/input/mouse/navpoint.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/navpoint.c</a></td><td class='right'>369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/sentelic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/sentelic.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/sentelic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/sentelic.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/sermouse.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/sermouse.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/synaptics.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/synaptics.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/mouse/vsxxxaa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/vsxxxaa.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/input/of_keymap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/of_keymap.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/serio/pcips2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/serio/pcips2.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/serio/ps2mult.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/serio/ps2mult.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/serio/serio_raw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/serio/serio_raw.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/serio/xilinx_ps2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/serio/xilinx_ps2.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/tablet/acecad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/acecad.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/tablet/aiptek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/aiptek.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/tablet/gtco.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/gtco.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/tablet/kbtab.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/kbtab.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/tablet/wacom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/wacom.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/tablet/wacom_sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/wacom_sys.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/tablet/wacom_wac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/wacom_wac.c</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/tablet/wacom_wac.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/wacom_wac.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/atmel_mxt_ts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/atmel_mxt_ts.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/input/touchscreen/da9052_tsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/da9052_tsi.c</a></td><td class='right'>370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/dynapro.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/dynapro.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/elo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/elo.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/fujitsu_ts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/fujitsu_ts.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/gunze.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/gunze.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/h3600_ts_input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/h3600_ts_input.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/hampshire.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/hampshire.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/inexio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/inexio.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/lpc32xx_ts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/lpc32xx_ts.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/mtouch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/mtouch.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/penmount.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/penmount.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/st1232.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/st1232.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/touchit213.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/touchit213.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/touchright.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/touchright.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/touchwin.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/touchwin.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/tsc40.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/tsc40.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/usbtouchscreen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/usbtouchscreen.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/input/touchscreen/wacom_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/wacom_i2c.c</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/wacom_w8001.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/wacom_w8001.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/input/touchscreen/wm831x-ts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/wm831x-ts.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/amd_iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/amd_iommu.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/amd_iommu_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/amd_iommu_init.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/amd_iommu_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/amd_iommu_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/dmar.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/dmar.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iommu/exynos-iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/exynos-iommu.c</a></td><td class='right'>1076</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/intel-iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/intel-iommu.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/iommu/intel_irq_remapping.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/intel_irq_remapping.c</a> (renamed from drivers/iommu/intr_remapping.c)</td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/iommu/intr_remapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/intr_remapping.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/iommu.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iommu/irq_remapping.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/irq_remapping.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/iommu/irq_remapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/irq_remapping.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/omap-iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/omap-iommu.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/tegra-gart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/tegra-gart.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/iommu/tegra-smmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/tegra-smmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/capi/capi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/capi/capi.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/capi/capidrv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/capi/capidrv.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/gigaset/bas-gigaset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/bas-gigaset.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/gigaset/capi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/capi.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/gigaset/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/common.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/gigaset/dummyll.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/dummyll.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/gigaset/ev-layer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/ev-layer.c</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/gigaset/gigaset.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/gigaset.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/gigaset/i4l.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/i4l.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/gigaset/isocdata.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/isocdata.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/gigaset/ser-gigaset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/ser-gigaset.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/gigaset/usb-gigaset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/usb-gigaset.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/eicon/capifunc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/capifunc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/eicon/capimain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/capimain.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/eicon/diddfunc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/diddfunc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/eicon/diva_didd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/diva_didd.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/eicon/divamnt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/divamnt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/eicon/divasfunc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/divasfunc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/eicon/divasi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/divasi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/eicon/divasmain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/divasmain.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/eicon/idifunc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/idifunc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/eicon/mntfunc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/mntfunc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/eicon/platform.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/platform.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/mISDN/avmfritz.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/avmfritz.c</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/mISDN/hfc_multi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/hfc_multi.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/mISDN/hfcmulti.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/hfcmulti.c</a></td><td class='right'>706</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/mISDN/hfcpci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/hfcpci.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/mISDN/hfcsusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/hfcsusb.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/mISDN/hfcsusb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/hfcsusb.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/mISDN/mISDNipac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/mISDNipac.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/mISDN/mISDNisar.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/mISDNisar.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/mISDN/netjet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/netjet.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/mISDN/speedfax.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/speedfax.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hardware/mISDN/w6692.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/w6692.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hisax/hfc_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hisax/hfc_usb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hisax/st5481_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hisax/st5481_init.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/hysdn/hysdn_proclog.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hysdn/hysdn_proclog.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/i4l/isdn_bsdcomp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/i4l/isdn_bsdcomp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/i4l/isdn_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/i4l/isdn_common.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/i4l/isdn_tty.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/i4l/isdn_tty.c</a></td><td class='right'>466</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/mISDN/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/core.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/mISDN/dsp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/dsp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/mISDN/dsp_cmx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/dsp_cmx.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/mISDN/dsp_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/dsp_core.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/mISDN/dsp_dtmf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/dsp_dtmf.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/mISDN/hwchannel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/hwchannel.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/mISDN/l1oip_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/l1oip_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/mISDN/layer1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/layer1.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/mISDN/layer2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/layer2.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/isdn/mISDN/tei.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/tei.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/led-class.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/led-class.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/leds/leds-da9052.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-da9052.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/leds-lm3530.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-lm3530.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/leds/leds-lm3533.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-lm3533.c</a></td><td class='right'>785</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/leds-lp5521.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-lp5521.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/leds-mc13783.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-mc13783.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/leds-netxbig.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-netxbig.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/leds-ns2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-ns2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/leds-pca955x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-pca955x.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/ledtrig-backlight.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/ledtrig-backlight.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/ledtrig-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/ledtrig-gpio.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/ledtrig-heartbeat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/ledtrig-heartbeat.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/leds/ledtrig-timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/ledtrig-timer.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/leds/ledtrig-transient.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/ledtrig-transient.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/ams/ams-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/ams/ams-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/therm_adt746x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/therm_adt746x.c</a></td><td class='right'>480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/windfarm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/macintosh/windfarm_ad7417_sensor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_ad7417_sensor.c</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/windfarm_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_core.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/windfarm_cpufreq_clamp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_cpufreq_clamp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/macintosh/windfarm_fcu_controls.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_fcu_controls.c</a></td><td class='right'>613</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/windfarm_lm75_sensor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_lm75_sensor.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/macintosh/windfarm_lm87_sensor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_lm87_sensor.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/windfarm_max6690_sensor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_max6690_sensor.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/macintosh/windfarm_mpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_mpu.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/macintosh/windfarm_pm72.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_pm72.c</a></td><td class='right'>847</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/windfarm_pm81.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_pm81.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/windfarm_pm91.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_pm91.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/macintosh/windfarm_rm31.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_rm31.c</a></td><td class='right'>740</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/windfarm_smu_controls.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_smu_controls.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/macintosh/windfarm_smu_sat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_smu_sat.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mca/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mca/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mca/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mca/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mca/mca-bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mca/mca-bus.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mca/mca-device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mca/mca-device.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mca/mca-driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mca/mca-driver.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mca/mca-legacy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mca/mca-legacy.c</a></td><td class='right'>329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mca/mca-proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mca/mca-proc.c</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/bitmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/bitmap.c</a></td><td class='right'>1101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.0%;'/><td class='rem' style='width: 7.4%;'/><td class='none' style='width: 82.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/bitmap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/bitmap.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-log-userspace-transfer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/dm-log-userspace-transfer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-mpath.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/dm-mpath.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-raid.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/dm-raid.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-thin-metadata.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/dm-thin-metadata.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-thin-metadata.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/dm-thin-metadata.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/dm-thin.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/dm-thin.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/md.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/md.c</a></td><td class='right'>372</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/md.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/md.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/persistent-data/dm-transaction-manager.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/persistent-data/dm-transaction-manager.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/raid1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/raid1.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/raid10.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/raid10.c</a></td><td class='right'>1321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.3%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 79.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/raid10.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/raid10.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/raid5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/raid5.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/md/raid5.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/raid5.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/saa7146_fops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/saa7146_fops.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/saa7146_hlp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/saa7146_hlp.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/saa7146_vbi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/saa7146_vbi.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/saa7146_video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/saa7146_video.c</a></td><td class='right'>367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/tuners/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/Kconfig</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/tuners/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/common/tuners/fc0011.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0011.c</a></td><td class='right'>524</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/common/tuners/fc0011.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0011.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/common/tuners/fc0012-priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0012-priv.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/common/tuners/fc0012.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0012.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/common/tuners/fc0012.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0012.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/common/tuners/fc0013-priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0013-priv.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/common/tuners/fc0013.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0013.c</a></td><td class='right'>634</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/common/tuners/fc0013.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0013.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/common/tuners/fc001x-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc001x-common.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/common/tuners/tua9001.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/tua9001.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/common/tuners/tua9001.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/tua9001.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/common/tuners/tua9001_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/tua9001_priv.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/tuners/xc5000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/xc5000.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/common/tuners/xc5000.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/xc5000.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/bt8xx/dst_ca.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/bt8xx/dst_ca.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/ddbridge/ddbridge-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/ddbridge/ddbridge-core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-core/dvb_demux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-core/dvb_demux.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-core/dvb_demux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-core/dvb_demux.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-core/dvb_frontend.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-core/dvb_frontend.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-core/dvb_frontend.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-core/dvb_frontend.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/af9015.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/af9015.c</a></td><td class='right'>495</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/af9035.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/af9035.c</a></td><td class='right'>1242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/af9035.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/af9035.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/dib0700_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/dib0700_core.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/dib0700_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/dib0700_devices.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/dvb-usb-ids.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/dvb-usb-ids.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/dvb-usb-urb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/dvb-usb-urb.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/dvb-usb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/dvb-usb.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/dw2102.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/dw2102.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/it913x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/it913x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/lmedm04.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/lmedm04.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/mxl111sf-tuner.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/mxl111sf-tuner.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/mxl111sf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/mxl111sf.c</a></td><td class='right'>850</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 86.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/dvb-usb/rtl28xxu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/rtl28xxu.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/Kconfig</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/af9013.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/af9013.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/dvb/frontends/af9033.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/af9033.c</a></td><td class='right'>980</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/dvb/frontends/af9033.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/af9033.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/dvb/frontends/af9033_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/af9033_priv.h</a></td><td class='right'>470</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/dvb/frontends/au8522_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/au8522_common.c</a></td><td class='right'>259</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/au8522_dig.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/au8522_dig.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/au8522_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/au8522_priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/cx24110.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/cx24110.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/cxd2820r_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/cxd2820r_core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/dib7000p.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/dib7000p.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/dib9000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/dib9000.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/drxd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/drxd.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/drxk_hard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/drxk_hard.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/drxk_map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/drxk_map.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/ds3000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/ds3000.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/it913x-fe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/it913x-fe.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/dvb/frontends/lg2160.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/lg2160.c</a></td><td class='right'>1468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 76.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/dvb/frontends/lg2160.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/lg2160.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/lgs8gxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/lgs8gxx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/m88rs2000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/m88rs2000.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/rtl2830.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/rtl2830.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/rtl2830_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/rtl2830_priv.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/stb0899_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/stb0899_drv.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/stb6100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/stb6100.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/stv0297.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/stv0297.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/stv0900_sw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/stv0900_sw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/stv090x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/stv090x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/frontends/zl10353.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/zl10353.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/mantis/hopper_cards.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/mantis/hopper_cards.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/mantis/mantis_cards.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/mantis/mantis_cards.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/mantis/mantis_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/mantis/mantis_dma.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/mantis/mantis_evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/mantis/mantis_evm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/ngene/ngene-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/ngene/ngene-core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/pluto2/pluto2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/pluto2/pluto2.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/siano/smssdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/siano/smssdio.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/siano/smsusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/siano/smsusb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/ttpci/av7110_v4l.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/ttpci/av7110_v4l.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/dvb/ttpci/budget-av.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/ttpci/budget-av.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/media-entity.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/media-entity.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/dsbr100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/dsbr100.c</a></td><td class='right'>528</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/radio-gemtek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-gemtek.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/radio-isa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-isa.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/radio-isa.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-isa.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/radio-keene.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-keene.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/radio-mr800.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-mr800.c</a></td><td class='right'>524</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/radio-rtrack2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-rtrack2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/radio-sf16fmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-sf16fmi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/radio-sf16fmr2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-sf16fmr2.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/radio-timb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-timb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/saa7706h.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/saa7706h.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/si470x/radio-si470x-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/si470x/radio-si470x-common.c</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/si470x/radio-si470x-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/si470x/radio-si470x-i2c.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/si470x/radio-si470x-usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/si470x/radio-si470x-usb.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/si470x/radio-si470x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/si470x/radio-si470x.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/tef6862.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/tef6862.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/radio/wl128x/fmdrv_v4l2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/wl128x/fmdrv_v4l2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/ati_remote.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/ati_remote.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/ene_ir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/ene_ir.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/fintek-cir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/fintek-cir.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/imon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/imon.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/ir-raw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/ir-raw.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/ir-sanyo-decoder.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/ir-sanyo-decoder.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/ite-cir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/ite-cir.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/keymaps/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/keymaps/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/rc/keymaps/rc-asus-ps3-100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/keymaps/rc-asus-ps3-100.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/keymaps/rc-it913x-v2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/keymaps/rc-it913x-v2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/rc/keymaps/rc-medion-x10-digitainer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/keymaps/rc-medion-x10-digitainer.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/rc/keymaps/rc-medion-x10-or2x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/keymaps/rc-medion-x10-or2x.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/mceusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/mceusb.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/nuvoton-cir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/nuvoton-cir.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/rc-loopback.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/rc-loopback.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/redrat3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/redrat3.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/rc/winbond-cir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/winbond-cir.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/Kconfig</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/adp1653.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/adp1653.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/adv7180.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/adv7180.c</a></td><td class='right'>417</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/adv7343.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/adv7343.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/aptina-pll.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/aptina-pll.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/arv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/arv.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/as3645a.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/as3645a.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/atmel-isi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/atmel-isi.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/au0828/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/au0828/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/au0828/au0828-cards.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/au0828/au0828-cards.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/au0828/au0828-dvb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/au0828/au0828-dvb.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/au0828/au0828-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/au0828/au0828-video.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/blackfin/bfin_capture.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/blackfin/bfin_capture.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/bt8xx/bttv-driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/bt8xx/bttv-driver.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/bw-qcam.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/bw-qcam.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/c-qcam.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/c-qcam.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cpia2/cpia2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cpia2/cpia2.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cpia2/cpia2_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cpia2/cpia2_core.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cpia2/cpia2_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cpia2/cpia2_usb.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cpia2/cpia2_v4l.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cpia2/cpia2_v4l.c</a></td><td class='right'>850</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 9.3%;'/><td class='none' style='width: 86.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/media/video/cpia2/cpia2dev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cpia2/cpia2dev.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx18/cx18-alsa-main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx18/cx18-alsa-main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx18/cx18-alsa-pcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx18/cx18-alsa-pcm.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx18/cx18-ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx18/cx18-ioctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx18/cx18-mailbox.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx18/cx18-mailbox.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx18/cx18-streams.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx18/cx18-streams.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx231xx/cx231xx-417.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx231xx/cx231xx-417.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx231xx/cx231xx-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx231xx/cx231xx-audio.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx231xx/cx231xx-avcore.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx231xx/cx231xx-avcore.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx231xx/cx231xx-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx231xx/cx231xx-core.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx231xx/cx231xx-vbi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx231xx/cx231xx-vbi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx231xx/cx231xx-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx231xx/cx231xx-video.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx23885/cx23885-cards.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx23885/cx23885-cards.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx23885/cx23885-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx23885/cx23885-core.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx23885/cx23885-dvb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx23885/cx23885-dvb.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx23885/cx23885.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx23885/cx23885.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx23885/cx23888-ir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx23885/cx23888-ir.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx25821/cx25821-alsa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-alsa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx25821/cx25821-audio-upstream.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-audio-upstream.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx25821/cx25821-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-core.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx25821/cx25821-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-i2c.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx25821/cx25821-medusa-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-medusa-video.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx25821/cx25821-video-upstream-ch2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-video-upstream-ch2.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx25821/cx25821-video-upstream.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-video-upstream.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx25821/cx25821-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-video.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx25821/cx25821-video.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-video.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/cx25840/cx25840-ir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25840/cx25840-ir.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/davinci/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/davinci/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/davinci/vpbe_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/davinci/vpbe_display.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/davinci/vpfe_capture.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/davinci/vpfe_capture.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/davinci/vpif_capture.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/davinci/vpif_capture.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/davinci/vpif_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/davinci/vpif_display.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/em28xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/em28xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/em28xx/em28xx-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-audio.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/em28xx/em28xx-cards.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-cards.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/em28xx/em28xx-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-core.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/em28xx/em28xx-dvb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-dvb.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/em28xx/em28xx-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-i2c.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/em28xx/em28xx-input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-input.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/em28xx/em28xx-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-video.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/em28xx/em28xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/media/video/et61x251/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/et61x251/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/media/video/et61x251/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/et61x251/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/media/video/et61x251/et61x251.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/et61x251/et61x251.h</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/media/video/et61x251/et61x251_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/et61x251/et61x251_core.c</a></td><td class='right'>2683</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 42.4%;'/><td class='none' style='width: 57.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/media/video/et61x251/et61x251_sensor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/et61x251/et61x251_sensor.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/media/video/et61x251/et61x251_tas5130d1b.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/et61x251/et61x251_tas5130d1b.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/fsl-viu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/fsl-viu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/gspca/autogain_functions.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/autogain_functions.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/autogain_functions.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/autogain_functions.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/conex.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/conex.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/finepix.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/finepix.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/gl860/gl860.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/gl860/gl860.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/gspca.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/gspca.c</a></td><td class='right'>545</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/gspca.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/gspca.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/jl2005bcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/jl2005bcd.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/mars.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/mars.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/nw80x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/nw80x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/ov519.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/ov519.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/ov534.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/ov534.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/ov534_9.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/ov534_9.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/pac207.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/pac207.c</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/pac7302.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/pac7302.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/pac7311.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/pac7311.c</a></td><td class='right'>505</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/sn9c20x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/sn9c20x.c</a></td><td class='right'>594</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/sonixb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/sonixb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/sonixj.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/sonixj.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/sq905.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/sq905.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/sq905c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/sq905c.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/stv06xx/stv06xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/stv06xx/stv06xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_pb0100.c</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_pb0100.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/stv06xx/stv06xx_sensor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_sensor.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/stv06xx/stv06xx_st6422.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_st6422.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/stv06xx/stv06xx_st6422.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_st6422.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_vv6410.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/topro.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/topro.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/vicam.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/vicam.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/gspca/zc3xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/zc3xx.c</a></td><td class='right'>620</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 6.2%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/hdpvr/hdpvr-control.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/hdpvr/hdpvr-control.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/hdpvr/hdpvr-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/hdpvr/hdpvr-core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/hdpvr/hdpvr-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/hdpvr/hdpvr-video.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/hexium_gemini.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/hexium_gemini.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/hexium_orion.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/hexium_orion.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/ivtv/ivtv-driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/ivtv/ivtv-driver.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/ivtv/ivtv-fileops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/ivtv/ivtv-fileops.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/ivtv/ivtv-ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/ivtv/ivtv-ioctl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/ivtv/ivtv-streams.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/ivtv/ivtv-streams.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/ivtv/ivtvfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/ivtv/ivtvfb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/m5mols/m5mols.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/m5mols/m5mols.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/m5mols/m5mols_capture.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/m5mols/m5mols_capture.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/m5mols/m5mols_controls.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/m5mols/m5mols_controls.c</a></td><td class='right'>479</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/m5mols/m5mols_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/m5mols/m5mols_core.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/m5mols/m5mols_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/m5mols/m5mols_reg.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/marvell-ccic/mcam-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/marvell-ccic/mcam-core.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/marvell-ccic/mmp-driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/marvell-ccic/mmp-driver.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/mem2mem_testdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mem2mem_testdev.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/meye.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/meye.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/msp3400-driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/msp3400-driver.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/mt9m032.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mt9m032.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/mt9p031.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mt9p031.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/mt9t112.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mt9t112.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/mt9v032.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mt9v032.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/mx1_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mx1_camera.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/mx2_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mx2_camera.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/mx2_emmaprp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mx2_emmaprp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/mx3_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mx3_camera.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/mxb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mxb.c</a></td><td class='right'>351</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/media/video/mxb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mxb.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap1_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap1_camera.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap24xxcam-dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap24xxcam-dma.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap24xxcam.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap24xxcam.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap24xxcam.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap24xxcam.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/isp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/isp.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/isp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/isp.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/ispccdc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispccdc.c</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/ispccdc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispccdc.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/ispccp2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispccp2.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/ispcsi2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispcsi2.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/ispcsi2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispcsi2.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/ispcsiphy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispcsiphy.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/ispcsiphy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispcsiphy.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/isppreview.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/isppreview.c</a></td><td class='right'>634</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/isppreview.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/isppreview.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/ispqueue.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispqueue.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/ispresizer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispresizer.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/ispstat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispstat.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/ispvideo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispvideo.c</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/omap3isp/ispvideo.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispvideo.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/ov5642.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/ov5642.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/pms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pms.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/pvrusb2/pvrusb2-hdw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pvrusb2/pvrusb2-hdw.c</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/pvrusb2/pvrusb2-hdw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pvrusb2/pvrusb2-hdw.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/pvrusb2/pvrusb2-v4l2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pvrusb2/pvrusb2-v4l2.c</a></td><td class='right'>1341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.1%;'/><td class='rem' style='width: 10.2%;'/><td class='none' style='width: 78.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/pwc/pwc-if.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pwc/pwc-if.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/pwc/pwc-v4l.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pwc/pwc-v4l.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/pwc/pwc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pwc/pwc.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/pxa_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pxa_camera.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s2255drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s2255drv.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/Kconfig</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/fimc-capture.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-capture.c</a></td><td class='right'>539</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/fimc-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-core.c</a></td><td class='right'>1163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 15.6%;'/><td class='none' style='width: 81.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/fimc-core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-core.h</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/fimc-lite-reg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-lite-reg.c</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/fimc-lite-reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-lite-reg.h</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/fimc-lite.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-lite.c</a></td><td class='right'>1576</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/fimc-lite.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-lite.h</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/fimc-m2m.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-m2m.c</a></td><td class='right'>824</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/fimc-mdevice.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-mdevice.c</a></td><td class='right'>476</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/fimc-mdevice.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-mdevice.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/fimc-reg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-reg.c</a></td><td class='right'>616</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/fimc-reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-reg.h</a></td><td class='right'>326</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/mipi-csis.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/mipi-csis.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/media/video/s5p-fimc/regs-fimc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/regs-fimc.h</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-g2d/g2d.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-g2d/g2d.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-g2d/g2d.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-g2d/g2d.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-jpeg/jpeg-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-jpeg/jpeg-core.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-jpeg/jpeg-core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-jpeg/jpeg-core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-mfc/s5p_mfc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-mfc/s5p_mfc.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-mfc/s5p_mfc_common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-mfc/s5p_mfc_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-mfc/s5p_mfc_ctrl.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-mfc/s5p_mfc_enc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-mfc/s5p_mfc_enc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-mfc/s5p_mfc_opr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-mfc/s5p_mfc_opr.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-tv/hdmi_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/hdmi_drv.c</a></td><td class='right'>480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-tv/hdmiphy_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/hdmiphy_drv.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-tv/mixer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/mixer.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-tv/mixer_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/mixer_drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-tv/mixer_reg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/mixer_reg.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-tv/mixer_video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/mixer_video.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/s5p-tv/regs-hdmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/regs-hdmi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/saa7134/saa7134-cards.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7134/saa7134-cards.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/saa7134/saa7134-dvb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7134/saa7134-dvb.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/saa7134/saa7134-input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7134/saa7134-input.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/saa7134/saa7134-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7134/saa7134-video.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/saa7134/saa7134.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7134/saa7134.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/saa7164/saa7164-vbi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7164/saa7164-vbi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/saa7164/saa7164.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7164/saa7164.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/sh_mobile_ceu_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/sh_mobile_ceu_camera.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/sh_vou.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/sh_vou.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp-pll.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp-pll.c</a></td><td class='right'>418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp-pll.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp-pll.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp/smiapp-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-core.c</a></td><td class='right'>2894</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 45.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 54.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp/smiapp-limits.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-limits.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp/smiapp-limits.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-limits.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp/smiapp-quirk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-quirk.c</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp/smiapp-quirk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-quirk.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp/smiapp-reg-defs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-reg-defs.h</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp/smiapp-reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-reg.h</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp/smiapp-regs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-regs.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp/smiapp-regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-regs.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/smiapp/smiapp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp.h</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/sn9c102/sn9c102_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/sn9c102/sn9c102_core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/soc_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/soc_camera.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/soc_mediabus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/soc_mediabus.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/sta2x11_vip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/sta2x11_vip.c</a></td><td class='right'>1550</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/media/video/sta2x11_vip.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/sta2x11_vip.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/stk-webcam.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/stk-webcam.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/tda9840.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tda9840.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/tlg2300/pd-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tlg2300/pd-video.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/tm6000/tm6000-input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tm6000/tm6000-input.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/tm6000/tm6000-stds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tm6000/tm6000-stds.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/tm6000/tm6000-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tm6000/tm6000-video.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/tm6000/tm6000.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tm6000/tm6000.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/tuner-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tuner-core.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/tvp5150.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tvp5150.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/tvp7002.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tvp7002.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/usbvision/usbvision-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/usbvision/usbvision-core.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/usbvision/usbvision-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/usbvision/usbvision-video.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/uvc/uvc_ctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/uvc/uvc_ctrl.c</a></td><td class='right'>330</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/uvc/uvc_queue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/uvc/uvc_queue.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/uvc/uvc_v4l2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/uvc/uvc_v4l2.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/uvc/uvcvideo.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/uvc/uvcvideo.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/v4l2-compat-ioctl32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/v4l2-compat-ioctl32.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/v4l2-ctrls.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/v4l2-ctrls.c</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/v4l2-dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/v4l2-dev.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/v4l2-event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/v4l2-event.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/v4l2-ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/v4l2-ioctl.c</a></td><td class='right'>662</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 89.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/v4l2-subdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/v4l2-subdev.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/via-camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/via-camera.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/videobuf-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/videobuf-core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/videobuf-dma-contig.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/videobuf-dma-contig.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/videobuf-dvb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/videobuf-dvb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/videobuf2-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/videobuf2-core.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/videobuf2-dma-contig.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/videobuf2-dma-contig.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/videobuf2-memops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/videobuf2-memops.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/vivi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/vivi.c</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/w9966.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/w9966.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/zoran/zoran_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/zoran/zoran_device.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/zoran/zoran_driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/zoran/zoran_driver.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/media/video/zr364xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/zr364xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/memory/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/memory/Kconfig</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/memory/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/memory/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/memory/emif.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/memory/emif.c</a></td><td class='right'>1670</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 73.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/memory/emif.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/memory/emif.h</a></td><td class='right'>589</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/memory/tegra20-mc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/memory/tegra20-mc.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/memory/tegra30-mc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/memory/tegra30-mc.c</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/message/fusion/mptbase.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/message/fusion/mptbase.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/message/fusion/mptctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/message/fusion/mptctl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/message/fusion/mptlan.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/message/fusion/mptlan.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/message/i2o/i2o_proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/message/i2o/i2o_proc.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/Kconfig</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mfd/ab5500-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/ab5500-core.c</a></td><td class='right'>1439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 22.8%;'/><td class='none' style='width: 77.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mfd/ab5500-debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/ab5500-debugfs.c</a></td><td class='right'>807</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.8%;'/><td class='none' style='width: 87.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mfd/ab5500-debugfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/ab5500-debugfs.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/ab8500-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/ab8500-core.c</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/ab8500-debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/ab8500-debugfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/ab8500-gpadc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/ab8500-gpadc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mfd/ab8500-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/ab8500-i2c.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/ab8500-sysctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/ab8500-sysctrl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/anatop-mfd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/anatop-mfd.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/asic3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/asic3.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/cs5535-mfd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/cs5535-mfd.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/da9052-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/da9052-core.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/da9052-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/da9052-i2c.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/da9052-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/da9052-spi.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mfd/db5500-prcmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/db5500-prcmu.c</a></td><td class='right'>451</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.1%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/db8500-prcmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/db8500-prcmu.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/intel_msic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/intel_msic.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/janz-cmodio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/janz-cmodio.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mfd/lm3533-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/lm3533-core.c</a></td><td class='right'>667</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mfd/lm3533-ctrlbank.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/lm3533-ctrlbank.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mfd/lpc_ich.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/lpc_ich.c</a></td><td class='right'>888</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/lpc_sch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/lpc_sch.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mfd/max77693-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/max77693-irq.c</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mfd/max77693.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/max77693.c</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/mc13xxx-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/mc13xxx-core.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mfd/mc13xxx-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/mc13xxx-i2c.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mfd/mc13xxx-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/mc13xxx-spi.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mfd/mc13xxx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/mc13xxx.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/omap-usb-host.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/omap-usb-host.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mfd/palmas.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/palmas.c</a></td><td class='right'>509</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/pcf50633-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/pcf50633-core.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/rc5t583.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/rc5t583.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/rdc321x-southbridge.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/rdc321x-southbridge.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/s5m-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/s5m-core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/mfd/sta2x11-mfd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/sta2x11-mfd.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/stmpe-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/stmpe-spi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/tps65090.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/tps65090.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/tps65217.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/tps65217.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/tps6586x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/tps6586x.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/tps65910-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/tps65910-irq.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/tps65910.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/tps65910.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/tps65911-comparator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/tps65911-comparator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/twl-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/twl-core.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/twl4030-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/twl4030-irq.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/twl6040-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/twl6040-core.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/twl6040-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/twl6040-irq.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/vx855.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/vx855.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm831x-auxadc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm831x-auxadc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm831x-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm831x-core.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm831x-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm831x-irq.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm8350-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm8350-core.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm8350-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm8350-i2c.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm8400-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm8400-core.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm8994-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm8994-core.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm8994-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm8994-irq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mfd/wm8994-regmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm8994-regmap.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/Kconfig</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/ab8500-pwm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/ab8500-pwm.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/ad525x_dpot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/ad525x_dpot.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/bh1780gli.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/bh1780gli.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/bmp085-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/bmp085-i2c.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/bmp085-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/bmp085-spi.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/bmp085.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/bmp085.c</a></td><td class='right'>356</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/misc/bmp085.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/bmp085.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/c2port/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/c2port/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/eeprom/at25.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/eeprom/at25.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/misc/mei/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/Kconfig</a> (renamed from drivers/staging/mei/Kconfig)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/misc/mei/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/Makefile</a> (renamed from drivers/staging/mei/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/misc/mei/hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/hw.h</a> (renamed from drivers/staging/mei/hw.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/misc/mei/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/init.c</a> (renamed from drivers/staging/mei/init.c)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/misc/mei/interface.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/interface.c</a> (renamed from drivers/staging/mei/interface.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/misc/mei/interface.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/interface.h</a> (renamed from drivers/staging/mei/interface.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/misc/mei/interrupt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/interrupt.c</a> (renamed from drivers/staging/mei/interrupt.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/misc/mei/iorw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/iorw.c</a> (renamed from drivers/staging/mei/iorw.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/misc/mei/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/main.c</a> (renamed from drivers/staging/mei/main.c)</td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/misc/mei/mei_dev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/mei_dev.h</a> (renamed from drivers/staging/mei/mei_dev.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/misc/mei/wd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/wd.c</a> (renamed from drivers/staging/mei/wd.c)</td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/pch_phub.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/pch_phub.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/misc/pti.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/pti.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/card/block.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/card/block.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/card/queue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/card/queue.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/core/bus.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/cd-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/core/cd-gpio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/core/core.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/mmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/core/mmc.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/core/sdio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/core/sdio_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/core/sdio_irq.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/atmel-mci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/atmel-mci.c</a></td><td class='right'>469</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/davinci_mmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/davinci_mmc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/dw_mmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/dw_mmc.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mmc/host/imxmmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/imxmmc.c</a></td><td class='right'>1169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 18.5%;'/><td class='none' style='width: 81.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mmc/host/imxmmc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/imxmmc.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/mmci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/mmci.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/mvsdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/mvsdio.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/mxcmmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/mxcmmc.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/mxs-mmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/mxs-mmc.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/omap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/omap.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/omap_hsmmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/omap_hsmmc.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-esdhc-imx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/sdhci-esdhc-imx.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-pltfm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/sdhci-pltfm.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-spear.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/sdhci-spear.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci-tegra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/sdhci-tegra.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mmc/host/sdhci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/sdhci.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/bcm63xxpart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/bcm63xxpart.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/chips/cfi_cmdset_0002.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/chips/cfi_cmdset_0002.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/cmdlinepart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/cmdlinepart.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/devices/block2mtd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/devices/block2mtd.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/devices/docg3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/devices/docg3.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/devices/m25p80.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/devices/m25p80.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/devices/spear_smi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/devices/spear_smi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/lpddr/qinfo_probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/lpddr/qinfo_probe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/maps/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/intel_vr_nor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/maps/intel_vr_nor.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/lantiq-flash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/maps/lantiq-flash.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/maps/pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/scb2_flash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/maps/scb2_flash.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/maps/wr_sbc82xx_flash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/maps/wr_sbc82xx_flash.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/mtdchar.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/mtdchar.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/mtdcore.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/mtdcore.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/mtdpart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/mtdpart.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/Kconfig</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/alauda.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/alauda.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/ams-delta.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/ams-delta.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/atmel_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/atmel_nand.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/au1550nd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/au1550nd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/autcpu12.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/autcpu12.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/bcm_umi_bch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/bcm_umi_bch.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/bcm_umi_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/bcm_umi_nand.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/bf5xx_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/bf5xx_nand.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/cafe_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/cafe_nand.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/cs553x_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/cs553x_nand.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/denali.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/denali.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/docg4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/docg4.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/fsl_elbc_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/fsl_elbc_nand.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/fsl_ifc_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/fsl_ifc_nand.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/fsmc_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/fsmc_nand.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/gpmi-nand/bch-regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/gpmi-nand/bch-regs.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/gpmi-nand/gpmi-lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/gpmi-nand/gpmi-lib.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/gpmi-nand/gpmi-nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/gpmi-nand/gpmi-nand.c</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/gpmi-nand/gpmi-nand.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/gpmi-nand/gpmi-nand.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/h1910.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/h1910.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/jz4740_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/jz4740_nand.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/mpc5121_nfc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/mpc5121_nfc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/mxc_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/mxc_nand.c</a></td><td class='right'>640</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/nand_base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/nand_base.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/nand_bbt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/nand_bbt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/nand_ids.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/nand_ids.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/nandsim.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/nandsim.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/omap2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/omap2.c</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/orion_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/orion_nand.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/pasemi_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/pasemi_nand.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/plat_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/plat_nand.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/pxa3xx_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/pxa3xx_nand.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/r852.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/r852.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/sh_flctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/sh_flctl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/nand/sm_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/sm_common.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/onenand/onenand_base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/onenand/onenand_base.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/mtd/ubi/attach.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/attach.c</a> (renamed from drivers/mtd/ubi/scan.c)</td><td class='right'>970</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 7.5%;'/><td class='none' style='width: 84.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/build.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/build.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/cdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/cdev.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/debug.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/debug.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/eba.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/eba.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/gluebi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/gluebi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/io.c</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/kapi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/kapi.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/mtd/ubi/scan.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/scan.h</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/ubi-media.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/ubi-media.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/ubi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/ubi.h</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/upd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/upd.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/vmt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/vmt.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/vtbl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/vtbl.c</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/mtd/ubi/wl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/wl.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/Space.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/Space.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/bonding/bond_3ad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/bonding/bond_3ad.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/bonding/bond_3ad.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/bonding/bond_3ad.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/bonding/bond_alb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/bonding/bond_alb.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/bonding/bond_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/bonding/bond_main.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/bonding/bonding.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/bonding/bonding.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/caif/caif_hsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/caif/caif_hsi.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/caif/caif_shmcore.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/caif/caif_shmcore.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/dev.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/flexcan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/flexcan.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/pch_can.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/pch_can.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/sja1000/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/sja1000/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/sja1000/ems_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/sja1000/ems_pci.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/sja1000/kvaser_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/sja1000/kvaser_pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/sja1000/peak_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/sja1000/peak_pci.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/can/sja1000/plx_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/sja1000/plx_pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/cris/eth_v10.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/cris/eth_v10.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/3com/3c509.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/3com/3c509.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/3com/typhoon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/3com/typhoon.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/8390/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/8390/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/8390/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/8390/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/8390/ax88796.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/8390/ax88796.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/8390/etherh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/8390/etherh.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/8390/ne2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/8390/ne2.c</a></td><td class='right'>798</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.6%;'/><td class='none' style='width: 87.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/8390/smc-mca.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/8390/smc-mca.c</a></td><td class='right'>575</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.1%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/adaptec/starfire.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/adaptec/starfire.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/adi/bfin_mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/adi/bfin_mac.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/ariadne.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/amd/ariadne.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/atarilance.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/amd/atarilance.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/amd/depca.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/amd/depca.c</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/atheros/atl1c/atl1c.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atl1c/atl1c.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/atheros/atl1c/atl1c_hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atl1c/atl1c_hw.c</a></td><td class='right'>569</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atl1c/atl1c_hw.h</a></td><td class='right'>983</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 6.6%;'/><td class='none' style='width: 84.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/atheros/atl1c/atl1c_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atl1c/atl1c_main.c</a></td><td class='right'>1007</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 9.5%;'/><td class='none' style='width: 84.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/atheros/atl1e/atl1e_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atl1e/atl1e_main.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/atheros/atlx/atl1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atlx/atl1.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/atheros/atlx/atl1.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atlx/atl1.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/atheros/atlx/atlx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atlx/atlx.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c</a></td><td class='right'>474</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h</a></td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c</a></td><td class='right'>733</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 6.9%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c</a></td><td class='right'>1134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.3%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 82.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/broadcom/tg3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/tg3.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfa_ioc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/brocade/bna/bfa_ioc.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bfi_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/brocade/bna/bfi_reg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bnad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/brocade/bna/bnad.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bnad.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/brocade/bna/bnad.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/brocade/bna/bnad_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/brocade/bna/bnad_ethtool.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cadence/at91_ether.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/cadence/at91_ether.c</a></td><td class='right'>535</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cadence/at91_ether.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/cadence/at91_ether.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cadence/macb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/cadence/macb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/cxgb4.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/sge.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/sge.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/t4_hw.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/t4_regs.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cirrus/cs89x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/cirrus/cs89x0.c</a></td><td class='right'>2221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.5%;'/><td class='rem' style='width: 17.7%;'/><td class='none' style='width: 64.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cisco/enic/enic_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/cisco/enic/enic_main.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/cisco/enic/enic_pp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/cisco/enic/enic_pp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/davicom/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/davicom/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dec/ewrk3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/ewrk3.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dec/tulip/de2104x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/de2104x.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dec/tulip/de4x5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/de4x5.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dec/tulip/dmfe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/dmfe.c</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dec/tulip/tulip_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/tulip_core.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dec/tulip/uli526x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/uli526x.c</a></td><td class='right'>443</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dec/tulip/winbond-840.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/winbond-840.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dec/tulip/xircom_cb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/xircom_cb.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dlink/dl2k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dlink/dl2k.c</a></td><td class='right'>468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dlink/dl2k.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dlink/dl2k.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dlink/sundance.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dlink/sundance.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/dnet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dnet.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_cmds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_cmds.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_cmds.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_cmds.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_ethtool.c</a></td><td class='right'>326</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_hw.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_main.c</a></td><td class='right'>583</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 90.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_roce.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_roce.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/emulex/benet/be_roce.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_roce.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/fealnx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/fealnx.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/fec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/fec.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/fec_mpc52xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/fec_mpc52xx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/gianfar.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/gianfar.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/gianfar.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/gianfar.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/gianfar_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/gianfar_ethtool.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/gianfar_ptp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/gianfar_ptp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/ucc_geth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/ucc_geth.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/ucc_geth.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/ucc_geth.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/freescale/ucc_geth_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/ucc_geth_ethtool.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/fujitsu/at1700.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/fujitsu/at1700.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/i825xx/3c523.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/i825xx/3c523.c</a></td><td class='right'>1312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 20.7%;'/><td class='none' style='width: 79.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/i825xx/3c523.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/i825xx/3c523.h</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/i825xx/3c527.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/i825xx/3c527.c</a></td><td class='right'>1660</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 26.3%;'/><td class='none' style='width: 73.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/i825xx/3c527.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/i825xx/3c527.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/i825xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/i825xx/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/i825xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/i825xx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/i825xx/eexpress.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/i825xx/eexpress.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ibm/ehea/ehea_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/ibm/ehea/ehea_main.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ibm/ehea/ehea_phyp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/ibm/ehea/ehea_phyp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/Kconfig</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000/e1000_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000/e1000_main.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/80003es2lan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/80003es2lan.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/82571.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/82571.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/defines.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/defines.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/e1000.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/e1000.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/ethtool.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/hw.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/ich8lan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/ich8lan.c</a></td><td class='right'>780</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.9%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 87.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/mac.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/manage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/manage.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/netdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/netdev.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/param.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/param.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/e1000e/phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/phy.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_82575.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_82575.c</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_82575.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_82575.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_defines.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_defines.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_hw.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_i210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_i210.c</a></td><td class='right'>603</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_i210.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_i210.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_mac.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_nvm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_nvm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_phy.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_phy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_phy.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/e1000_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_regs.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/igb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/igb.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/igb_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/igb_ethtool.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/igb_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/igb_main.c</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igb/igb_ptp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/igb_ptp.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/igbvf/netdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igbvf/netdev.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.c</a></td><td class='right'>831</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 86.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_main.c</a></td><td class='right'>458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c</a></td><td class='right'>900</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_sysfs.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_type.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbevf/defines.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbevf/defines.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbevf/ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbevf/ethtool.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbevf/ixgbevf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/intel/ixgbevf/vf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbevf/vf.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/marvell/mv643xx_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/marvell/mv643xx_eth.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/marvell/pxa168_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/marvell/pxa168_eth.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/marvell/sky2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/marvell/sky2.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/marvell/sky2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/marvell/sky2.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/alloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/alloc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/cmd.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_cq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_cq.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_ethtool.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_main.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_netdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_netdev.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_port.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_port.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_resources.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_resources.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_rx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/en_tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_tx.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/eq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/eq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/fw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/fw.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/fw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/fw.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/main.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/mcg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/mcg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/mlx4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/mlx4.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/mlx4_en.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/mr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/mr.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/pd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/pd.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/port.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/port.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/profile.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/profile.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/resource_tracker.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/micrel/ks8842.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/micrel/ks8842.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/micrel/ks8851.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/micrel/ks8851.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/myricom/myri10ge/myri10ge.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/myricom/myri10ge/myri10ge.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/natsemi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/natsemi/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/natsemi/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/natsemi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/natsemi/natsemi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/natsemi/natsemi.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/neterion/s2io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/neterion/s2io.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/neterion/vxge/vxge-main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/neterion/vxge/vxge-main.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/neterion/vxge/vxge-main.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/neterion/vxge/vxge-main.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/nvidia/forcedeth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/nvidia/forcedeth.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/nxp/lpc_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/nxp/lpc_eth.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/packetengines/hamachi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/packetengines/hamachi.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/packetengines/yellowfin.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/packetengines/yellowfin.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/pasemi/pasemi_mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/pasemi/pasemi_mac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/netxen/netxen_nic.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/netxen/netxen_nic_ethtool.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_hdr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/netxen/netxen_nic_hdr.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlcnic/qlcnic.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/qlogic/qlge/qlge_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlge/qlge_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/rdc/r6040.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/rdc/r6040.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/realtek/8139cp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/realtek/8139cp.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/realtek/8139too.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/realtek/8139too.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/realtek/r8169.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/realtek/r8169.c</a></td><td class='right'>719</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.7%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/renesas/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/renesas/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/renesas/sh_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/renesas/sh_eth.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/renesas/sh_eth.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/renesas/sh_eth.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/s6gmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/s6gmac.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/efx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sfc/efx.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sfc/ethtool.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/mcdi_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sfc/mcdi_phy.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/net_driver.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sfc/net_driver.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/qt202x_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sfc/qt202x_phy.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sfc/rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sfc/rx.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/silan/sc92031.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/silan/sc92031.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sis/sis190.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sis/sis190.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sis/sis900.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sis/sis900.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/smsc/epic100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/smsc/epic100.c</a></td><td class='right'>403</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/smsc/smsc911x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/smsc/smsc911x.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/smsc/smsc9420.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/smsc/smsc9420.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/common.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac1000.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/enh_desc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/enh_desc.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/norm_desc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/norm_desc.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/stmmac.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/stmmac.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/stmmac_main.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sun/niu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sun/niu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sun/sungem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sun/sungem.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sun/sunhme.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sun/sunhme.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sun/sunhme.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sun/sunhme.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/sun/sunvnet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sun/sunvnet.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/tehuti/tehuti.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/tehuti/tehuti.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ti/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/ti/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ti/davinci_cpdma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/ti/davinci_cpdma.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ti/davinci_emac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/ti/davinci_emac.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/ti/tlan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/ti/tlan.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/tile/tilepro.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/tile/tilepro.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/toshiba/ps3_gelic_wireless.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/toshiba/ps3_gelic_wireless.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/via/via-rhine.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/via/via-rhine.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/via/via-velocity.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/via/via-velocity.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/wiznet/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/wiznet/Kconfig</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/wiznet/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/wiznet/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/wiznet/w5100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/wiznet/w5100.c</a></td><td class='right'>808</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/ethernet/wiznet/w5300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/wiznet/w5300.c</a></td><td class='right'>720</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/xilinx/ll_temac_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xilinx/ll_temac_main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/caleb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/caleb.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/caleb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/caleb.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/enp2611.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/enp2611.c</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.5%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/ixpdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/ixpdev.c</a></td><td class='right'>437</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.9%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/ixpdev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/ixpdev.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/pm3386.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/pm3386.c</a></td><td class='right'>351</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp2000/pm3386.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp2000/pm3386.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ethernet/xscale/ixp4xx_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp4xx_eth.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/hippi/rrunner.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/hippi/rrunner.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/hyperv/hyperv_net.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/hyperv/hyperv_net.h</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/hyperv/netvsc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/hyperv/netvsc.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/hyperv/netvsc_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/hyperv/netvsc_drv.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/hyperv/rndis_filter.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/hyperv/rndis_filter.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/irda/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/irda/donauboe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/donauboe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/irda/irda-usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/irda-usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/irda/kingsun-sir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/kingsun-sir.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/irda/ks959-sir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/ks959-sir.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/irda/ksdazzle-sir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/ksdazzle-sir.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/irda/sh_irda.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/sh_irda.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/irda/sh_sir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/sh_sir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/irda/smsc-ircc2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/smsc-ircc2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/irda/stir4200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/stir4200.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/macvlan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/macvlan.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/macvtap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/macvtap.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/bcm63xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/bcm63xx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/davicom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/davicom.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/dp83640.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/dp83640.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/marvell.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/marvell.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/phy/mdio-mux-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/mdio-mux-gpio.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/phy/mdio-mux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/mdio-mux.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/mdio_bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/mdio_bus.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/phy_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/phy_device.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/phy/spi_ks8995.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/spi_ks8995.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ppp/ppp_async.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ppp/ppp_async.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ppp/ppp_generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ppp/ppp_generic.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ppp/ppp_synctty.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ppp/ppp_synctty.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ppp/pppoe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ppp/pppoe.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/ppp/pptp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ppp/pptp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/team/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/team/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/team/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/team/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/team/team.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/team/team.c</a></td><td class='right'>523</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/team/team_mode_activebackup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/team/team_mode_activebackup.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/team/team_mode_loadbalance.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/team/team_mode_loadbalance.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/team/team_mode_roundrobin.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/team/team_mode_roundrobin.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/3c359.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/3c359.c</a></td><td class='right'>1843</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 29.1%;'/><td class='none' style='width: 70.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/3c359.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/3c359.h</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/Kconfig</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/abyss.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/abyss.c</a></td><td class='right'>468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.4%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/abyss.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/abyss.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/ibmtr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/ibmtr.c</a></td><td class='right'>1964</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 31.1%;'/><td class='none' style='width: 68.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/ibmtr_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/ibmtr_cs.c</a></td><td class='right'>370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/lanstreamer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/lanstreamer.c</a></td><td class='right'>1917</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 30.3%;'/><td class='none' style='width: 69.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/lanstreamer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/lanstreamer.h</a></td><td class='right'>343</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/madgemc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/madgemc.c</a></td><td class='right'>761</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.0%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/madgemc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/madgemc.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/olympic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/olympic.c</a></td><td class='right'>1749</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 27.7%;'/><td class='none' style='width: 72.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/olympic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/olympic.h</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/proteon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/proteon.c</a></td><td class='right'>422</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.7%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/skisa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/skisa.c</a></td><td class='right'>432</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/smctr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/smctr.c</a></td><td class='right'>5717</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 90.4%;'/><td class='none' style='width: 9.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/smctr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/smctr.h</a></td><td class='right'>1585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 25.1%;'/><td class='none' style='width: 74.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/tms380tr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/tms380tr.c</a></td><td class='right'>2306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 36.5%;'/><td class='none' style='width: 63.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/tms380tr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/tms380tr.h</a></td><td class='right'>1141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 18.0%;'/><td class='none' style='width: 82.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/tokenring/tmspci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tokenring/tmspci.c</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/tun.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tun.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/asix.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/asix.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/catc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/catc.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/cdc-phonet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/cdc-phonet.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/cdc_eem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/cdc_eem.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/cdc_ether.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/cdc_ether.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/cdc_ncm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/cdc_ncm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/cdc_subset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/cdc_subset.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/cx82310_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/cx82310_eth.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/dm9601.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/dm9601.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/gl620a.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/gl620a.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/hso.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/hso.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/int51x1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/int51x1.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/ipheth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/ipheth.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/kalmia.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/kalmia.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/kaweth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/kaweth.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/lg-vl600.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/lg-vl600.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/mcs7830.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/mcs7830.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/net1080.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/net1080.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/pegasus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/pegasus.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/plusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/plusb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/qmi_wwan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/qmi_wwan.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/rndis_host.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/rndis_host.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/rtl8150.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/rtl8150.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/sierra_net.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/sierra_net.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/smsc75xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/smsc75xx.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/smsc75xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/smsc75xx.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/smsc95xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/smsc95xx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/usbnet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/usbnet.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/usb/zaurus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/zaurus.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/virtio_net.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/virtio_net.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wan/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wan/Kconfig</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wan/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wan/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wan/dscc4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wan/dscc4.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wan/lmc/lmc_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wan/lmc/lmc_main.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wimax/i2400m/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wimax/i2400m/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wimax/i2400m/usb-rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wimax/i2400m/usb-rx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wimax/i2400m/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wimax/i2400m/usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/adm8211.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/adm8211.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/at76c50x-usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/at76c50x-usb.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/ahb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/ahb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/ani.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/ani.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/ath5k.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/ath5k.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/attach.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/attach.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/base.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/debug.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/desc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/desc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/eeprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/eeprom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/initvals.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/initvals.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/led.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/led.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/mac80211-ops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/mac80211-ops.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/pci.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/pcu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/pcu.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/phy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/qcu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/qcu.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/reset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/reset.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath5k/sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/sysfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/cfg80211.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/cfg80211.c</a></td><td class='right'>621</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/cfg80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/cfg80211.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/common.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/core.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/core.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/debug.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/debug.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/hif-ops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/hif-ops.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/hif.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/hif.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/htc-ops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/htc-ops.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/htc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/htc.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/htc_mbox.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/htc_mbox.c</a> (renamed from drivers/net/wireless/ath/ath6kl/htc.c)</td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/htc_pipe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/htc_pipe.c</a></td><td class='right'>1708</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 27.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 73.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/init.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/main.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/sdio.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/testmode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/testmode.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/txrx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/txrx.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/usb.c</a></td><td class='right'>798</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 87.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/wmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/wmi.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath6kl/wmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/wmi.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ani.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ani.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ani.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ani.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar5008_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar5008_phy.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9002_mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9002_mac.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9002_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9002_phy.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9003_calib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_calib.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_eeprom.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_eeprom.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9003_hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_hw.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9003_mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_mac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9003_mci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_mci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9003_paprd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_paprd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9003_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_phy.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9003_phy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_phy.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9003_rtt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_rtt.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9003_rtt.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_rtt.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/ath9k.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ath9k.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/beacon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/beacon.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/btcoex.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/btcoex.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/btcoex.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/btcoex.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/debug.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/debug.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/dfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/dfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/dfs_debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs_debug.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/dfs_debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs_debug.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs_pattern_detector.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/dfs_pri_detector.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs_pri_detector.c</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/dfs_pri_detector.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs_pri_detector.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/eeprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/eeprom.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/eeprom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/eeprom.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/eeprom_9287.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/eeprom_9287.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/eeprom_def.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/eeprom_def.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/gpio.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/hif_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/hif_usb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/htc_drv_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/htc_drv_init.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/htc_hst.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/htc_hst.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/hw.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/hw.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/init.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/mac.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/main.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/pci.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/rc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/rc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/recv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/recv.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/ath9k/xmit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/xmit.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/carl9170/cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/carl9170/cmd.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/carl9170/fw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/carl9170/fw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/carl9170/rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/carl9170/rx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/carl9170/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/carl9170/usb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ath/regd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/regd.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/atmel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/atmel.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/atmel_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/atmel_pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/b43/bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43/bus.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/b43/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43/dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/b43/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43/main.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/b43/sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43/sdio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/b43/xmit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43/xmit.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/b43legacy/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43legacy/main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/b43legacy/phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43legacy/phy.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/b43legacy/radio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43legacy/radio.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/b43legacy/xmit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43legacy/xmit.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/dhd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/dhd.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/dhd_cdc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/dhd_cdc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c</a></td><td class='right'>459</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmfmac/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/usb.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/aiutils.c</a></td><td class='right'>479</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 7.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/aiutils.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/antsel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/antsel.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/channel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/channel.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/d11.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/d11.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/main.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/nicpci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/nicpci.c</a></td><td class='right'>826</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 13.1%;'/><td class='none' style='width: 86.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/nicpci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/nicpci.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/otp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/otp.c</a></td><td class='right'>410</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.5%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/otp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/otp.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c</a></td><td class='right'>374</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/phy_shim.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/phy_shim.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/phy_shim.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/phy_shim.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/pub.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/pub.h</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/srom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/srom.c</a></td><td class='right'>980</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 15.5%;'/><td class='none' style='width: 84.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/srom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/srom.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/brcmsmac/stf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/stf.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/include/brcm_hw_ids.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/hostap/hostap_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/hostap/hostap_main.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/hostap/hostap_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/hostap/hostap_pci.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/hostap/hostap_plx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/hostap/hostap_plx.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ipw2x00/ipw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ipw2x00/ipw.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ipw2x00/ipw2100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ipw2x00/ipw2100.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ipw2x00/ipw2100.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ipw2x00/ipw2100.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ipw2x00/ipw2200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ipw2x00/ipw2200.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ipw2x00/libipw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ipw2x00/libipw.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/ipw2x00/libipw_rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ipw2x00/libipw_rx.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlegacy/3945.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlegacy/3945.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlegacy/4965-mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlegacy/4965-mac.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlegacy/4965-rs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlegacy/4965-rs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlegacy/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlegacy/common.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-1000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-1000.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-2000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-2000.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-5000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-5000.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-6000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-6000.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn-calib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-calib.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn-calib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-calib.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn-devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-devices.c</a></td><td class='right'>755</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn-hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-hw.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn-lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-lib.c</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn-rs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-rs.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn-rs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-rs.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn-rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-rx.c</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-rxon.c</a></td><td class='right'>692</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 89.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn-sta.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-sta.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn-tt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-tt.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn-tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-tx.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn.c</a></td><td class='right'>1272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.8%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 79.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-agn.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn.h</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-commands.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-commands.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-config.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-config.h</a> (renamed from drivers/net/wireless/iwlwifi/iwl-shared.h)</td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-core.c</a></td><td class='right'>1480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 23.4%;'/><td class='none' style='width: 76.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-core.h</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-csr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-csr.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-debug.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-debug.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-debugfs.c</a></td><td class='right'>509</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-dev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-dev.h</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-drv.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-drv.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-eeprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-eeprom.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-eeprom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-eeprom.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-fh.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-fh.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-fw-file.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-fw-file.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-fw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-fw.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-io.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-led.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-led.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-mac80211.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-mac80211.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-modparams.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-modparams.h</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-notif-wait.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-notif-wait.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-notif-wait.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-notif-wait.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-op-mode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-op-mode.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-pci.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-power.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-power.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-power.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-power.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-prph.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-prph.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-scan.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-testmode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-testmode.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c</a></td><td class='right'>549</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 7.2%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-trans-pcie-tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-trans-pcie-tx.c</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-trans-pcie.c</a></td><td class='right'>575</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-trans.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-trans.h</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwlwifi/iwl-ucode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-ucode.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/iwmc3200wifi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwmc3200wifi/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas/decl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/decl.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas/dev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/dev.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/libertas/firmware.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/firmware.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas/if_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/if_cs.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas/if_sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/if_sdio.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas/if_spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/if_spi.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas/if_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/if_usb.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/main.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/libertas_tf/if_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas_tf/if_usb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mac80211_hwsim.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mac80211_hwsim.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/11n.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/11n.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/11n_aggr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/11n_aggr.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/cfg80211.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/cfg80211.c</a></td><td class='right'>600</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/cfg80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/cfg80211.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/cfp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/cfp.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/cmdevt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/cmdevt.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/decl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/decl.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/fw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/fw.h</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/ie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/ie.c</a></td><td class='right'>396</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/init.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/ioctl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/ioctl.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/join.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/join.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/main.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/main.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/main.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/pcie.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/scan.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sdio.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sdio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sdio.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sta_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sta_cmd.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sta_cmdresp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sta_cmdresp.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sta_event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sta_event.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sta_ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sta_ioctl.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sta_rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sta_rx.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/sta_tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sta_tx.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/txrx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/txrx.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/uap_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/uap_cmd.c</a></td><td class='right'>432</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/usb.c</a></td><td class='right'>1052</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/usb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/usb.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/util.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/util.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwifiex/wmm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/wmm.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/mwl8k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwl8k.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/orinoco/fw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/orinoco/fw.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/orinoco/orinoco_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/orinoco/orinoco_usb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/p54/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/p54/main.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/p54/p54.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/p54/p54.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/p54/p54pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/p54/p54pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/p54/p54usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/p54/p54usb.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/p54/p54usb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/p54/p54usb.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/p54/txrx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/p54/txrx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/prism54/oid_mgt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/prism54/oid_mgt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rndis_wlan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rndis_wlan.c</a></td><td class='right'>388</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2400pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2400pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2500pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2500pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2500usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2500usb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2800.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2800.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2800lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2800lib.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2800lib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2800lib.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2800pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2800pci.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2800usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2800usb.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2x00.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2x00config.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00config.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2x00debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00debug.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2x00debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00debug.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2x00dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00dev.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2x00leds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00leds.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2x00lib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00lib.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2x00mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00mac.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2x00pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2x00queue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00queue.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt2x00usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt61pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt61pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rt2x00/rt73usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt73usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtl818x/rtl8180/dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtl818x/rtl8180/dev.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtl818x/rtl8187/dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtl818x/rtl8187/dev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/base.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/cam.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/cam.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/pci.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/ps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/ps.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192c/dm_common.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192ce/dm.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192ce/sw.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192ce/trx.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192ce/trx.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192cu/mac.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192cu/sw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192de/def.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/def.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192de/dm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/dm.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192de/dm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/dm.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192de/hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/hw.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192de/phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/phy.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192de/trx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/trx.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192de/trx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/trx.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192se/def.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/def.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192se/dm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/dm.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192se/dm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/dm.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192se/fw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/fw.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192se/phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/phy.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192se/sw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/sw.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/rtl8192se/trx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/trx.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/usb.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/rtlwifi/wifi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/wifi.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/Kconfig</a> (renamed from drivers/net/wireless/wl1251/Kconfig)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/Makefile</a> (renamed from drivers/net/wireless/wl1251/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/acx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/acx.c</a> (renamed from drivers/net/wireless/wl1251/acx.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/acx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/acx.h</a> (renamed from drivers/net/wireless/wl1251/acx.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/boot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/boot.c</a> (renamed from drivers/net/wireless/wl1251/boot.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/boot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/boot.h</a> (renamed from drivers/net/wireless/wl1251/boot.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/cmd.c</a> (renamed from drivers/net/wireless/wl1251/cmd.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/cmd.h</a> (renamed from drivers/net/wireless/wl1251/cmd.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/debugfs.c</a> (renamed from drivers/net/wireless/wl1251/debugfs.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/debugfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/debugfs.h</a> (renamed from drivers/net/wireless/wl1251/debugfs.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/event.c</a> (renamed from drivers/net/wireless/wl1251/event.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/event.h</a> (renamed from drivers/net/wireless/wl1251/event.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/init.c</a> (renamed from drivers/net/wireless/wl1251/init.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/init.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/init.h</a> (renamed from drivers/net/wireless/wl1251/init.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/io.c</a> (renamed from drivers/net/wireless/wl1251/io.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/io.h</a> (renamed from drivers/net/wireless/wl1251/io.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/main.c</a> (renamed from drivers/net/wireless/wl1251/main.c)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/ps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/ps.c</a> (renamed from drivers/net/wireless/wl1251/ps.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/ps.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/ps.h</a> (renamed from drivers/net/wireless/wl1251/ps.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/reg.h</a> (renamed from drivers/net/wireless/wl1251/reg.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/rx.c</a> (renamed from drivers/net/wireless/wl1251/rx.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/rx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/rx.h</a> (renamed from drivers/net/wireless/wl1251/rx.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/sdio.c</a> (renamed from drivers/net/wireless/wl1251/sdio.c)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/spi.c</a> (renamed from drivers/net/wireless/wl1251/spi.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/spi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/spi.h</a> (renamed from drivers/net/wireless/wl1251/spi.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/tx.c</a> (renamed from drivers/net/wireless/wl1251/tx.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/tx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/tx.h</a> (renamed from drivers/net/wireless/wl1251/tx.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/wl1251.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/wl1251.h</a> (renamed from drivers/net/wireless/wl1251/wl1251.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl1251/wl12xx_80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/wl12xx_80211.h</a> (renamed from drivers/net/wireless/wl1251/wl12xx_80211.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl12xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl12xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl12xx/acx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/acx.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl12xx/acx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/acx.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl12xx/cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/cmd.c</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl12xx/cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/cmd.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl12xx/conf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/conf.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl12xx/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/main.c</a></td><td class='right'>1388</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl12xx/reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/reg.h</a> (renamed from drivers/net/wireless/wl12xx/reg.h)</td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wl12xx/wl12xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/wl12xx.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/Kconfig</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/acx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/acx.c</a> (renamed from drivers/net/wireless/wl12xx/acx.c)</td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/acx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/acx.h</a> (renamed from drivers/net/wireless/wl12xx/acx.h)</td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/boot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/boot.c</a></td><td class='right'>444</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/boot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/boot.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/cmd.c</a> (renamed from drivers/net/wireless/wl12xx/cmd.c)</td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/cmd.h</a> (renamed from drivers/net/wireless/wl12xx/cmd.h)</td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/conf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/conf.h</a> (renamed from drivers/net/wireless/wl12xx/conf.h)</td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/debug.h</a> (renamed from drivers/net/wireless/wl12xx/debug.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/debugfs.c</a> (renamed from drivers/net/wireless/wl12xx/debugfs.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/debugfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/debugfs.h</a> (renamed from drivers/net/wireless/wl12xx/debugfs.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/event.c</a> (renamed from drivers/net/wireless/wl12xx/event.c)</td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/event.h</a> (renamed from drivers/net/wireless/wl12xx/event.h)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/hw_ops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/hw_ops.h</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/ini.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/ini.h</a> (renamed from drivers/net/wireless/wl12xx/ini.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/init.c</a> (renamed from drivers/net/wireless/wl12xx/init.c)</td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/init.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/init.h</a> (renamed from drivers/net/wireless/wl12xx/init.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/io.c</a> (renamed from drivers/net/wireless/wl12xx/io.c)</td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/io.h</a> (renamed from drivers/net/wireless/wl12xx/io.h)</td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/main.c</a> (renamed from drivers/net/wireless/wl12xx/main.c)</td><td class='right'>1129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 10.7%;'/><td class='none' style='width: 82.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/ps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/ps.c</a> (renamed from drivers/net/wireless/wl12xx/ps.c)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/ps.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/ps.h</a> (renamed from drivers/net/wireless/wl12xx/ps.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/rx.c</a> (renamed from drivers/net/wireless/wl12xx/rx.c)</td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/rx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/rx.h</a> (renamed from drivers/net/wireless/wl12xx/rx.h)</td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/scan.c</a> (renamed from drivers/net/wireless/wl12xx/scan.c)</td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/scan.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/scan.h</a> (renamed from drivers/net/wireless/wl12xx/scan.h)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/sdio.c</a> (renamed from drivers/net/wireless/wl12xx/sdio.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/spi.c</a> (renamed from drivers/net/wireless/wl12xx/spi.c)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/testmode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/testmode.c</a> (renamed from drivers/net/wireless/wl12xx/testmode.c)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/testmode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/testmode.h</a> (renamed from drivers/net/wireless/wl12xx/testmode.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/tx.c</a> (renamed from drivers/net/wireless/wl12xx/tx.c)</td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/tx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/tx.h</a> (renamed from drivers/net/wireless/wl12xx/tx.h)</td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/wl12xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/wl12xx.h</a> (renamed from drivers/net/wireless/wl12xx/wl12xx.h)</td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/wl12xx_80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/wl12xx_80211.h</a> (renamed from drivers/net/wireless/wl12xx/wl12xx_80211.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/wl12xx_platform_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/wl12xx_platform_data.c</a> (renamed from drivers/net/wireless/wl12xx/wl12xx_platform_data.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/net/wireless/ti/wlcore/wlcore.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/wlcore.h</a></td><td class='right'>454</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/wireless/wl12xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/wl12xx/Kconfig</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/wireless/wl12xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/wl12xx/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/wireless/wl12xx/boot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/wl12xx/boot.c</a></td><td class='right'>786</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.4%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/net/wireless/wl12xx/boot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/wl12xx/boot.h</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/zd1201.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/zd1201.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/wireless/zd1211rw/zd_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/zd1211rw/zd_usb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/xen-netback/netback.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/xen-netback/netback.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/net/xen-netfront.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/xen-netfront.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/nfc/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/nfc/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/nfc/pn533.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/nfc/pn533.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/nfc/pn544_hci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/nfc/pn544_hci.c</a></td><td class='right'>947</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/address.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/address.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/base.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/of_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/of_i2c.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/of_mdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/of_mdio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/of/of_pci_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/of_pci_irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/of/of_spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/of_spi.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/parisc/sba_iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parisc/sba_iommu.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/parisc/superio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parisc/superio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/parport/parport_amiga.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parport/parport_amiga.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/parport/parport_atari.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parport/parport_atari.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/parport/parport_mfc3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parport/parport_mfc3.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/parport/parport_pc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parport/parport_pc.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/parport/parport_sunbpp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parport/parport_sunbpp.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pci/host-bridge.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/host-bridge.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/pci-acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/pci-acpi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/pci-driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/pci-driver.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/pci-sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/pci-sysfs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/pci.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/pcie/portdrv_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/pcie/portdrv_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/probe.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pci/quirks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/quirks.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pcmcia/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pcmcia/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pcmcia/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pcmcia/pxa2xx_hx4700.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pcmcia/pxa2xx_hx4700.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/Kconfig</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/core.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/core.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/devicetree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/devicetree.c</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/devicetree.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/devicetree.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinconf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinconf.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinconf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinconf.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-coh901.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-coh901.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-imx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx.c</a></td><td class='right'>620</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-imx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-imx23.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx23.c</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-imx28.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx28.c</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-imx51.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx51.c</a></td><td class='right'>1322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-imx53.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx53.c</a></td><td class='right'>1649</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 73.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-imx6q.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx6q.c</a></td><td class='right'>2331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 36.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 63.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-mxs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-mxs.c</a></td><td class='right'>528</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-mxs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-mxs.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-nomadik-db8500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-nomadik-db8500.c</a></td><td class='right'>857</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-nomadik.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-nomadik.c</a> (renamed from drivers/gpio/gpio-nomadik.c)</td><td class='right'>875</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.8%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 86.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-nomadik.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-nomadik.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-pxa3xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-pxa3xx.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-sirf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-sirf.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-tegra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-tegra.c</a></td><td class='right'>439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-tegra.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-tegra.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-tegra20.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-tegra20.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-tegra30.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-tegra30.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinctrl-u300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-u300.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinmux.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/pinctrl/pinmux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinmux.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/spear/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/Kconfig</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/spear/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear.c</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear.h</a></td><td class='right'>393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear1310.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear1310.c</a></td><td class='right'>2198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 34.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 65.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear1340.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear1340.c</a></td><td class='right'>1989</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 31.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 68.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear300.c</a></td><td class='right'>708</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear310.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear310.c</a></td><td class='right'>431</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear320.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear320.c</a></td><td class='right'>3468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 54.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 45.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear3xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear3xx.c</a></td><td class='right'>487</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/pinctrl/spear/pinctrl-spear3xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear3xx.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/acer-wmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/acer-wmi.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/acerhdf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/acerhdf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/apple-gmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/apple-gmux.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/dell-laptop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/dell-laptop.c</a></td><td class='right'>308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/fujitsu-laptop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/fujitsu-laptop.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/fujitsu-tablet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/fujitsu-tablet.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/hdaps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/hdaps.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/hp-wmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/hp-wmi.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/ideapad-laptop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/ideapad-laptop.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/intel_mid_powerbtn.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/intel_mid_powerbtn.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/sony-laptop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/sony-laptop.c</a></td><td class='right'>1498</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.9%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 76.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/thinkpad_acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/thinkpad_acpi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/toshiba_acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/toshiba_acpi.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/platform/x86/xo1-rfkill.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/xo1-rfkill.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/ab8500_btemp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/ab8500_btemp.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/ab8500_charger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/ab8500_charger.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/ab8500_fg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/ab8500_fg.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/bq27x00_battery.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/bq27x00_battery.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/charger-manager.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/charger-manager.c</a></td><td class='right'>392</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/ds2781_battery.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/ds2781_battery.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/isp1704_charger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/isp1704_charger.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/max17042_battery.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/max17042_battery.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/power_supply_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/power_supply_sysfs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/sbs-battery.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/sbs-battery.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/smb347-charger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/smb347-charger.c</a></td><td class='right'>712</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 88.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/power/wm831x_power.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/wm831x_power.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ps3/ps3av.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ps3/ps3av.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ptp/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ptp/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ptp/ptp_clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ptp/ptp_clock.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ptp/ptp_ixp46x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ptp/ptp_ixp46x.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ptp/ptp_pch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ptp/ptp_pch.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rapidio/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rapidio/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rapidio/devices/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rapidio/devices/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rapidio/devices/tsi721.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rapidio/devices/tsi721.c</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rapidio/devices/tsi721.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rapidio/devices/tsi721.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/rapidio/devices/tsi721_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rapidio/devices/tsi721_dma.c</a></td><td class='right'>823</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rapidio/rio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rapidio/rio.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/88pm8607.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/88pm8607.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/Kconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/aat2870-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/aat2870-regulator.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/ab3100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/ab3100.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/ab8500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/ab8500.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/ad5398.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/ad5398.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/anatop-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/anatop-regulator.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/core.c</a></td><td class='right'>461</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/da903x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/da903x.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/da9052-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/da9052-regulator.c</a></td><td class='right'>441</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/db8500-prcmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/db8500-prcmu.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/dummy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/dummy.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/fixed.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/fixed.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/gpio-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/gpio-regulator.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/isl6271a-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/isl6271a-regulator.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/lp3971.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/lp3971.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/lp3972.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/lp3972.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max1586.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max1586.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max8649.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max8649.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max8660.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max8660.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max8925-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max8925-regulator.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max8952.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max8952.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max8997.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max8997.c</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/max8998.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max8998.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/mc13783-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/mc13783-regulator.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/mc13892-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/mc13892-regulator.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/mc13xxx-regulator-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/mc13xxx-regulator-core.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/mc13xxx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/mc13xxx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/of_regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/of_regulator.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/regulator/palmas-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/palmas-regulator.c</a></td><td class='right'>822</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/pcap-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/pcap-regulator.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/pcf50633-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/pcf50633-regulator.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/regulator/rc5t583-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/rc5t583-regulator.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/s5m8767.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/s5m8767.c</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/tps6105x-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps6105x-regulator.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/tps62360-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps62360-regulator.c</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/tps65023-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps65023-regulator.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/tps6507x-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps6507x-regulator.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/regulator/tps65090-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps65090-regulator.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/tps65217-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps65217-regulator.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/tps6524x-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps6524x-regulator.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/tps6586x-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps6586x-regulator.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/tps65910-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps65910-regulator.c</a></td><td class='right'>425</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/tps65912-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps65912-regulator.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/twl-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/twl-regulator.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/userspace-consumer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/userspace-consumer.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/virtual.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/virtual.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/wm831x-dcdc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/wm831x-dcdc.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/wm831x-isink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/wm831x-isink.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/wm831x-ldo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/wm831x-ldo.c</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/wm8350-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/wm8350-regulator.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/wm8400-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/wm8400-regulator.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/regulator/wm8994-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/wm8994-regulator.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/remoteproc/remoteproc_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/remoteproc/remoteproc_core.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/Kconfig</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-cmos.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-cmos.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-ds1307.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-ds1307.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-ep93xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-ep93xx.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-imxdi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-imxdi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-lpc32xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-lpc32xx.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-m41t93.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-m41t93.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-mpc5121.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-mpc5121.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-pcf8563.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-pcf8563.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-pl031.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-pl031.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-s3c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-s3c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-spear.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-spear.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-tegra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-tegra.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/rtc/rtc-wm831x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-wm831x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/block/dasd_int.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/block/dasd_int.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/con3215.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/con3215.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/keyboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/keyboard.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/keyboard.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/keyboard.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/sclp_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/sclp_cmd.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/sclp_sdias.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/sclp_sdias.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/sclp_tty.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/sclp_tty.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/sclp_vt220.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/sclp_vt220.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/tape.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/tape.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/tape_34xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/tape_34xx.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/tape_3590.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/tape_3590.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/tape_char.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/tape_char.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/tape_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/tape_core.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/char/tty3270.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/tty3270.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/cio/ccwgroup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/cio/ccwgroup.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/cio/cio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/cio/cio.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/cio/device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/cio/device.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/cio/device.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/cio/device.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/cio/qdio_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/cio/qdio_main.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/crypto/ap_bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/crypto/ap_bus.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/crypto/ap_bus.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/crypto/ap_bus.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/crypto/zcrypt_cex2a.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/crypto/zcrypt_cex2a.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/crypto/zcrypt_pcica.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/crypto/zcrypt_pcica.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/crypto/zcrypt_pcicc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/crypto/zcrypt_pcicc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/crypto/zcrypt_pcixcc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/crypto/zcrypt_pcixcc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/claw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/claw.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/ctcm_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/ctcm_main.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/ctcm_main.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/ctcm_main.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/ctcm_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/ctcm_sysfs.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/lcs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/lcs.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_core.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_core_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_core_main.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_core_mpc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_core_mpc.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_core_sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_core_sys.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_l2_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_l2_main.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_l3_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_l3_main.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/s390/net/qeth_l3_sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_l3_sys.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/Kconfig</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/aacraid/src.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/aacraid/src.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/aha1542.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/aha1542.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/aic94xx/aic94xx_seq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/aic94xx/aic94xx_seq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/atari_scsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/atari_scsi.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/atari_scsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/atari_scsi.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_cmds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_cmds.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_cmds.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_cmds.h</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_iscsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_iscsi.c</a></td><td class='right'>493</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_iscsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_iscsi.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_main.c</a></td><td class='right'>447</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_main.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_main.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_mgmt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_mgmt.c</a></td><td class='right'>521</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/be2iscsi/be_mgmt.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_mgmt.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bfa/bfa_fcs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bfa/bfa_fcs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bfa/bfa_fcs_lport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bfa/bfa_fcs_lport.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bfa/bfad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bfa/bfad.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bfa/bfad_attr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bfa/bfad_attr.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bfa/bfad_im.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bfa/bfad_im.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bfa/bfad_im.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bfa/bfad_im.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2fc/bnx2fc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2fc/bnx2fc.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2fc/bnx2fc_els.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2fc/bnx2fc_els.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2fc/bnx2fc_fcoe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2fc/bnx2fc_fcoe.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2fc/bnx2fc_hwi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2fc/bnx2fc_hwi.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2fc/bnx2fc_io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2fc/bnx2fc_io.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2fc/bnx2fc_tgt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2fc/bnx2fc_tgt.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2i/57xx_iscsi_constants.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/57xx_iscsi_constants.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2i/57xx_iscsi_hsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/57xx_iscsi_hsi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2i/bnx2i.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/bnx2i.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2i/bnx2i_hwi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/bnx2i_hwi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2i/bnx2i_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/bnx2i_init.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2i/bnx2i_iscsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/bnx2i_iscsi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/bnx2i/bnx2i_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/bnx2i_sysfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/device_handler/scsi_dh_alua.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/device_handler/scsi_dh_alua.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/esp_scsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/esp_scsi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/fcoe/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fcoe/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/fcoe/fcoe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fcoe/fcoe.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/fcoe/fcoe.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fcoe/fcoe.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/fcoe/fcoe_ctlr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fcoe/fcoe_ctlr.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/fcoe/fcoe_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fcoe/fcoe_sysfs.c</a></td><td class='right'>832</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/fcoe/fcoe_transport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fcoe/fcoe_transport.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/scsi/fd_mcs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fd_mcs.c</a></td><td class='right'>1354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 21.4%;'/><td class='none' style='width: 78.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/hosts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/hosts.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/hpsa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/hpsa.c</a></td><td class='right'>683</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.6%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/hpsa.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/hpsa.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/hpsa_cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/hpsa_cmd.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/scsi/ibmmca.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/ibmmca.c</a></td><td class='right'>2379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 37.6%;'/><td class='none' style='width: 62.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ipr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/ipr.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/host.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/host.c</a></td><td class='right'>703</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 7.4%;'/><td class='none' style='width: 88.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/host.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/init.c</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/phy.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/phy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/phy.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/port.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/port.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/port.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/port.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/port_config.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/port_config.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/probe_roms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/probe_roms.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/probe_roms.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/probe_roms.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/registers.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/registers.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/remote_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/remote_device.c</a></td><td class='right'>576</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/remote_device.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/remote_device.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/remote_node_context.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/remote_node_context.c</a></td><td class='right'>393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/remote_node_context.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/remote_node_context.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/request.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/request.c</a></td><td class='right'>715</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 6.4%;'/><td class='none' style='width: 88.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/request.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/request.h</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/scu_completion_codes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/scu_completion_codes.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/task.c</a></td><td class='right'>800</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 10.4%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/task.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/task.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/unsolicited_frame_control.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/unsolicited_frame_control.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/isci/unsolicited_frame_control.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/unsolicited_frame_control.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/iscsi_tcp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/iscsi_tcp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/libfc/fc_lport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libfc/fc_lport.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/libsas/sas_ata.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_ata.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/libsas/sas_discover.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_discover.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/libsas/sas_event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_event.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/libsas/sas_expander.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_expander.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/libsas/sas_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_init.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/libsas/sas_internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_internal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/libsas/sas_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_phy.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/libsas/sas_port.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_port.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_bsg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_bsg.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_bsg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_bsg.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_crtn.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_crtn.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_debugfs.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_debugfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_debugfs.h</a></td><td class='right'>418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_els.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_els.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_hbadisc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_hbadisc.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_hw.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_hw4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_hw4.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_init.c</a></td><td class='right'>377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_nportdisc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_nportdisc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_scsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_scsi.c</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_sli.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_sli.c</a></td><td class='right'>785</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_sli.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_sli.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_sli4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_sli4.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/lpfc/lpfc_version.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_version.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/megaraid/megaraid_sas.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/megaraid/megaraid_sas.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/megaraid/megaraid_sas_base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/megaraid/megaraid_sas_base.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/megaraid/megaraid_sas_fp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/megaraid/megaraid_sas_fp.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/megaraid/megaraid_sas_fusion.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/megaraid/megaraid_sas_fusion.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/mpt2sas/mpi/mpi2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpi/mpi2.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/mpt2sas/mpt2sas_base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpt2sas_base.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/mpt2sas/mpt2sas_base.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpt2sas_base.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/mpt2sas/mpt2sas_ctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpt2sas_ctl.c</a></td><td class='right'>312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/mpt2sas/mpt2sas_scsih.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpt2sas_scsih.c</a></td><td class='right'>597</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/mpt2sas/mpt2sas_transport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpt2sas_transport.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/pm8001/pm8001_defs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/pm8001/pm8001_defs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/pm8001/pm8001_hwi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/pm8001/pm8001_hwi.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/pm8001/pm8001_hwi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/pm8001/pm8001_hwi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/pm8001/pm8001_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/pm8001/pm8001_init.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla1280.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla1280.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_attr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_attr.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_bsg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_bsg.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_dbg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_dbg.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_dbg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_dbg.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_def.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_def.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_gbl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_gbl.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_gs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_gs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_init.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_iocb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_iocb.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_isr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_isr.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_mbx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_mbx.c</a></td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_mid.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_mid.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_nx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_nx.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_nx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_nx.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_os.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_os.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_sup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_sup.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_target.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_target.c</a></td><td class='right'>4973</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 78.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 21.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_target.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_target.h</a></td><td class='right'>1005</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/qla_version.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_version.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/tcm_qla2xxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/tcm_qla2xxx.c</a></td><td class='right'>1955</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 30.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 69.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/scsi/qla2xxx/tcm_qla2xxx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/tcm_qla2xxx.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_attr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_attr.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_def.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_def.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_fw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_fw.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_glbl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_glbl.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_init.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_mbx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_mbx.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_nx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_nx.c</a></td><td class='right'>738</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 88.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_nx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_nx.h</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_os.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_os.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/qla4xxx/ql4_version.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_version.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_error.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_error.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_lib.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_pm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_scan.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_transport_fc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_transport_fc.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_transport_spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_transport_spi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/scsi_wait_scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_wait_scan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/sd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/sd.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/sg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/sg.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/sim710.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/sim710.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/st.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/st.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/storvsc_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/storvsc_drv.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/ufs/ufshcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/ufs/ufshcd.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/scsi/virtio_scsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/virtio_scsi.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/sh/clk/cpg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/sh/clk/cpg.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/sh/intc/dynamic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/sh/intc/dynamic.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-ath79.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-ath79.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-coldfire-qspi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-coldfire-qspi.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-dw-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-dw-pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-ep93xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-ep93xx.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-fsl-espi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-fsl-espi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-fsl-lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-fsl-lib.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-fsl-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-fsl-spi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-imx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-imx.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-lm70llp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-lm70llp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-mpc52xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-mpc52xx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-omap2-mcspi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-omap2-mcspi.c</a></td><td class='right'>373</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-orion.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-orion.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-ppc4xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-ppc4xx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-pxa2xx-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-pxa2xx-pci.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-rspi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-rspi.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-sirf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-sirf.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi-topcliff-pch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi-topcliff-pch.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/spi/spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/spi/spi.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ssb/b43_pci_bridge.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ssb/b43_pci_bridge.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/ssb/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ssb/pci.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/Kconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/alarm-dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/alarm-dev.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/android/alarm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/alarm.c</a></td><td class='right'>601</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.5%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/android_alarm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/android_alarm.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/ashmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/ashmem.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/binder.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/binder.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/logger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/logger.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/ram_console.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/ram_console.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/android/switch/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/switch/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/android/switch/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/switch/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/android/switch/switch.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/switch/switch.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/android/switch/switch_class.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/switch/switch_class.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/android/switch/switch_gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/switch/switch_gpio.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/android/timed_output.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/android/timed_output.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/asus_oled/asus_oled.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/asus_oled/asus_oled.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/bcm/Adapter.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/bcm/Adapter.h</a></td><td class='right'>883</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 7.4%;'/><td class='none' style='width: 86.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/bcm/DDRInit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/bcm/DDRInit.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/bcm/IPv6Protocol.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/bcm/IPv6Protocol.c</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/bcm/Misc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/bcm/Misc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ccg/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ccg/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ccg/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ccg/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ccg/TODO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ccg/TODO</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ccg/ccg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ccg/ccg.c</a></td><td class='right'>1299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ccg/sysfs-class-ccg_usb?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ccg/sysfs-class-ccg_usb</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/Kconfig</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/comedi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/comedi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/comedi_fops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/comedi_fops.c</a></td><td class='right'>729</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 6.3%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/comedidev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/comedidev.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers.c</a></td><td class='right'>326</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/8255.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/8255.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/acl7225b.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/acl7225b.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/addi-data/addi_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/addi-data/addi_common.c</a></td><td class='right'>3556</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.0%;'/><td class='rem' style='width: 37.2%;'/><td class='none' style='width: 43.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/addi-data/addi_common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/addi-data/addi_common.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adl_pci6208.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/adl_pci6208.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adl_pci7230.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/adl_pci7230.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adl_pci7296.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/adl_pci7296.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adl_pci7432.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/adl_pci7432.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adl_pci8164.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/adl_pci8164.c</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adl_pci9111.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/adl_pci9111.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adl_pci9118.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/adl_pci9118.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adq12b.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/adq12b.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adv_pci1710.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/adv_pci1710.c</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adv_pci1723.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/adv_pci1723.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/adv_pci_dio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/adv_pci_dio.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/aio_aio12_8.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/aio_aio12_8.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/aio_iiro_16.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/aio_iiro_16.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/amplc_dio200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/amplc_dio200.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/amplc_pc236.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/amplc_pc236.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/amplc_pc263.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/amplc_pc263.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/amplc_pci224.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/amplc_pci224.c</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/amplc_pci230.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/amplc_pci230.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/c6xdigio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/c6xdigio.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/cb_das16_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/cb_das16_cs.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/cb_pcidas.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/cb_pcidas.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/cb_pcidas64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/cb_pcidas64.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/cb_pcidda.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/cb_pcidda.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/cb_pcidio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/cb_pcidio.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/cb_pcimdas.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/cb_pcimdas.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/cb_pcimdda.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/cb_pcimdda.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/comedi_bond.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/comedi_bond.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/comedi_parport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/comedi_parport.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/comedi_test.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/comedi_test.c</a></td><td class='right'>373</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/contec_pci_dio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/contec_pci_dio.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/daqboard2000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/daqboard2000.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das08.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/das08.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das08.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/das08.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das16.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/das16.c</a></td><td class='right'>891</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 7.7%;'/><td class='none' style='width: 85.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das16m1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/das16m1.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das1800.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/das1800.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das6402.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/das6402.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/das800.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/das800.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/dmm32at.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/dmm32at.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/dt2801.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/dt2801.c</a></td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/dt2811.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/dt2811.c</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/dt2814.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/dt2814.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/dt2815.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/dt2815.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/dt2817.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/dt2817.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/dt282x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/dt282x.c</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/dt3000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/dt3000.c</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/dt9812.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/dt9812.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/dyna_pci10xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/dyna_pci10xx.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/fl512.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/fl512.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/gsc_hpdi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/gsc_hpdi.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/icp_multi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/icp_multi.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ii_pci20kc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ii_pci20kc.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/jr3_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/jr3_pci.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ke_counter.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ke_counter.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/me4000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/me4000.c</a></td><td class='right'>432</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/me_daq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/me_daq.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/mite.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/mite.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/mpc624.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/mpc624.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/mpc8260cpm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/mpc8260cpm.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/multiq3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/multiq3.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_6527.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_6527.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_65xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_65xx.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_660x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_660x.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_670x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_670x.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_at_a2150.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_at_a2150.c</a></td><td class='right'>360</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_at_ao.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_at_ao.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_atmio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_atmio.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_atmio16d.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_atmio16d.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_daq_700.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_daq_700.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_daq_dio24.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_daq_dio24.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_labpc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_labpc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_labpc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_labpc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_labpc_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_labpc_cs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_mio_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_mio_cs.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_pcidio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_pcidio.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_pcimio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_pcimio.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ni_tio_internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ni_tio_internal.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcl711.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcl711.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcl724.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcl724.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcl725.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcl725.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcl726.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcl726.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcl730.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcl730.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcl812.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcl812.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcl816.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcl816.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcl818.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcl818.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcm3724.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcm3724.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcm3730.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcm3730.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcmad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcmad.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcmda12.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcmda12.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcmmio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcmmio.c</a></td><td class='right'>661</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 89.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/pcmuio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/pcmuio.c</a></td><td class='right'>542</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/poc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/poc.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/quatech_daqp_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/quatech_daqp_cs.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/rtd520.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/rtd520.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/rti800.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/rti800.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/rti802.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/rti802.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/s526.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/s526.c</a></td><td class='right'>495</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/s626.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/s626.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/serial2002.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/serial2002.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/skel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/skel.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/ssv_dnp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/ssv_dnp.c</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/unioxx5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/unioxx5.c</a></td><td class='right'>453</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/usbdux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/usbdux.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/usbduxfast.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/usbduxfast.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/usbduxsigma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/usbduxsigma.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/drivers/vmk80xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/drivers/vmk80xx.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/comedi/internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/comedi/internal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/et131x/et131x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/et131x/et131x.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/frontier/alphatrack.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/frontier/alphatrack.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/frontier/tranzport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/frontier/tranzport.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/Kconfig</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/TODO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/TODO</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/gdm_qos.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/gdm_qos.c</a></td><td class='right'>460</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/gdm_qos.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/gdm_qos.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/gdm_sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/gdm_sdio.c</a></td><td class='right'>754</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/gdm_sdio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/gdm_sdio.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/gdm_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/gdm_usb.c</a></td><td class='right'>798</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/gdm_usb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/gdm_usb.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/gdm_wimax.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/gdm_wimax.c</a></td><td class='right'>1026</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/gdm_wimax.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/gdm_wimax.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/hci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/hci.h</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/netlink_k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/netlink_k.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/netlink_k.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/netlink_k.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/sdio_boot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/sdio_boot.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/sdio_boot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/sdio_boot.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/usb_boot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/usb_boot.c</a></td><td class='right'>404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/usb_boot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/usb_boot.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/usb_ids.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/usb_ids.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/gdm72xx/wm_ioctl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/gdm72xx/wm_ioctl.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/Documentation/device.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/Documentation/device.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/Documentation/generic_buffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/Documentation/generic_buffer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/Documentation/iio_event_monitor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/Documentation/iio_event_monitor.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/drm-misc/diff/drivers/staging/iio/Documentation/light/sysfs-bus-iio-light-tsl2583?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/Documentation/light/sysfs-bus-iio-light-tsl2583</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/drm-misc/diff/drivers/staging/iio/Documentation/light/sysfs-bus-iio-light-tsl2x7x?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/Documentation/light/sysfs-bus-iio-light-tsl2x7x</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/iio/Documentation/sysfs-bus-iio-ad7192?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/Documentation/sysfs-bus-iio-ad7192</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/Documentation/sysfs-bus-iio-dds?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/Documentation/sysfs-bus-iio-dds</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/Documentation/sysfs-bus-iio-light?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/Documentation/sysfs-bus-iio-light</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/Documentation/trigger.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/Documentation/trigger.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/Kconfig</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/TODO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/TODO</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16201_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16201_core.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16201_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16201_ring.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16201_trigger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16201_trigger.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16203_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16203_core.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16203_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16203_ring.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16203_trigger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16203_trigger.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16204_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16204_core.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16204_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16204_ring.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16204_trigger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16204_trigger.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16209_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16209_core.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16209_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16209_ring.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16209_trigger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16209_trigger.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16220_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16220_core.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16240_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16240_core.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16240_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16240_ring.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/adis16240_trigger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/adis16240_trigger.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/kxsd9.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/kxsd9.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/lis3l02dq_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/lis3l02dq_core.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/lis3l02dq_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/lis3l02dq_ring.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/sca3000_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/sca3000_core.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/accel/sca3000_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/accel/sca3000_ring.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/Kconfig</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7192.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7192.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7280a.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7280a.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7291.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7291.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7298.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7298.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7298_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7298_core.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7298_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7298_ring.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7476.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7476.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7476_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7476_core.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7476_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7476_ring.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7606_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7606_core.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7606_par.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7606_par.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7606_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7606_ring.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7606_spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7606_spi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7780.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7780.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7793.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7793.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7816.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7816.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7887.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7887.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7887_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7887_core.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad7887_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad7887_ring.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad799x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad799x.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad799x_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad799x_core.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/ad799x_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/ad799x_ring.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/adt7310.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/adt7310.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/adt7410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/adt7410.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/lpc32xx_adc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/lpc32xx_adc.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/max1363_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/max1363_core.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/adc/max1363_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/max1363_ring.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/iio/adc/spear_adc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/adc/spear_adc.c</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/addac/adt7316.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/addac/adt7316.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/cdc/ad7150.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/cdc/ad7150.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/cdc/ad7152.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/cdc/ad7152.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/cdc/ad7746.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/cdc/ad7746.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/ad5064.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/ad5064.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/ad5360.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/ad5360.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/ad5380.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/ad5380.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/ad5421.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/ad5421.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/ad5446.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/ad5446.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/ad5446.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/ad5446.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/ad5504.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/ad5504.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/ad5624r_spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/ad5624r_spi.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/ad5686.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/ad5686.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/ad5764.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/ad5764.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/ad5791.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/ad5791.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/dac/max517.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dac/max517.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/iio/dds/dds.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/dds/dds.h</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/iio/frequency/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/frequency/Kconfig</a> (renamed from drivers/staging/iio/dds/Kconfig)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/iio/frequency/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/frequency/Makefile</a> (renamed from drivers/staging/iio/dds/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/iio/frequency/ad5930.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/frequency/ad5930.c</a> (renamed from drivers/staging/iio/dds/ad5930.c)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/iio/frequency/ad9832.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/frequency/ad9832.c</a> (renamed from drivers/staging/iio/dds/ad9832.c)</td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/iio/frequency/ad9832.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/frequency/ad9832.h</a> (renamed from drivers/staging/iio/dds/ad9832.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/iio/frequency/ad9834.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/frequency/ad9834.c</a> (renamed from drivers/staging/iio/dds/ad9834.c)</td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/iio/frequency/ad9834.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/frequency/ad9834.h</a> (renamed from drivers/staging/iio/dds/ad9834.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/iio/frequency/ad9850.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/frequency/ad9850.c</a> (renamed from drivers/staging/iio/dds/ad9850.c)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/iio/frequency/ad9852.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/frequency/ad9852.c</a> (renamed from drivers/staging/iio/dds/ad9852.c)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/iio/frequency/ad9910.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/frequency/ad9910.c</a> (renamed from drivers/staging/iio/dds/ad9910.c)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/iio/frequency/ad9951.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/frequency/ad9951.c</a> (renamed from drivers/staging/iio/dds/ad9951.c)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/iio/frequency/dds.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/frequency/dds.h</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/gyro/adis16060_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/gyro/adis16060_core.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/gyro/adis16080_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/gyro/adis16080_core.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/gyro/adis16130_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/gyro/adis16130_core.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/gyro/adis16260_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/gyro/adis16260_core.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/gyro/adis16260_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/gyro/adis16260_ring.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/gyro/adis16260_trigger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/gyro/adis16260_trigger.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/gyro/adxrs450.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/gyro/adxrs450.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/gyro/adxrs450_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/gyro/adxrs450_core.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/iio_dummy_evgen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/iio_dummy_evgen.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/iio_hwmon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/iio_hwmon.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/iio_simple_dummy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/iio_simple_dummy.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/iio_simple_dummy_buffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/iio_simple_dummy_buffer.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/iio_simple_dummy_events.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/iio_simple_dummy_events.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/impedance-analyzer/ad5933.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/impedance-analyzer/ad5933.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/imu/adis16400_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/imu/adis16400_core.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/imu/adis16400_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/imu/adis16400_ring.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/imu/adis16400_trigger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/imu/adis16400_trigger.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/light/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/light/Kconfig</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/light/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/light/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/light/isl29018.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/light/isl29018.c</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/iio/light/isl29028.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/light/isl29028.c</a></td><td class='right'>566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/light/tsl2563.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/light/tsl2563.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/light/tsl2583.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/light/tsl2583.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/drm-misc/diff/drivers/staging/iio/light/tsl2x7x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/light/tsl2x7x.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/drm-misc/diff/drivers/staging/iio/light/tsl2x7x_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/light/tsl2x7x_core.c</a></td><td class='right'>2082</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 32.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 67.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/magnetometer/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/magnetometer/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/magnetometer/ak8975.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/magnetometer/ak8975.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/magnetometer/hmc5843.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/magnetometer/hmc5843.c</a></td><td class='right'>522</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/meter/ade7753.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/meter/ade7753.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/meter/ade7754.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/meter/ade7754.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/meter/ade7758_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/meter/ade7758_core.c</a></td><td class='right'>299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/meter/ade7758_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/meter/ade7758_ring.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/meter/ade7758_trigger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/meter/ade7758_trigger.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/meter/ade7759.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/meter/ade7759.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/meter/ade7854-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/meter/ade7854-i2c.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/meter/ade7854-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/meter/ade7854-spi.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/meter/ade7854.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/meter/ade7854.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/meter/meter.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/meter/meter.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/resolver/ad2s1200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/resolver/ad2s1200.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/resolver/ad2s1210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/resolver/ad2s1210.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/resolver/ad2s90.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/resolver/ad2s90.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/ring_sw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/ring_sw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/ring_sw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/ring_sw.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/trigger/iio-trig-bfin-timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/trigger/iio-trig-bfin-timer.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/trigger/iio-trig-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/trigger/iio-trig-gpio.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/trigger/iio-trig-periodic-rtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/trigger/iio-trig-periodic-rtc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/iio/trigger/iio-trig-sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/iio/trigger/iio-trig-sysfs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/TODO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/TODO</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/bridges/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/bridges/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/bridges/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/bridges/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/bridges/tpci200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/bridges/tpci200.c</a></td><td class='right'>1141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/bridges/tpci200.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/bridges/tpci200.h</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/devices/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/devices/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/devices/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/devices/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/devices/ipoctal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/devices/ipoctal.c</a></td><td class='right'>901</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/devices/ipoctal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/devices/ipoctal.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/devices/scc2698.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/devices/scc2698.h</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/ipack.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/ipack.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/ipack/ipack.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ipack/ipack.h</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/line6/config.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/line6/config.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/line6/driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/line6/driver.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/line6/midi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/line6/midi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/line6/midibuf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/line6/midibuf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/line6/pcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/line6/pcm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/line6/toneport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/line6/toneport.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/as102/as102_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/as102/as102_drv.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/as102/as102_fe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/as102/as102_fe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/as102/as102_fw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/as102/as102_fw.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/as102/as102_usb_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/as102/as102_usb_drv.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/as102/as102_usb_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/as102/as102_usb_drv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/as102/as10x_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/as102/as10x_cmd.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/dt3155v4l/dt3155v4l.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/dt3155v4l/dt3155v4l.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/easycap/easycap_ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/easycap/easycap_ioctl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/easycap/easycap_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/easycap/easycap_main.c</a></td><td class='right'>1645</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.3%;'/><td class='rem' style='width: 11.7%;'/><td class='none' style='width: 74.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/go7007/README?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/go7007/README</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/go7007/go7007-v4l2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/go7007/go7007-v4l2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/go7007/go7007.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/go7007/go7007.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/go7007/s2250-loader.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/go7007/s2250-loader.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/lirc/lirc_imon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/lirc/lirc_imon.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/lirc/lirc_sasem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/lirc/lirc_sasem.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/media/lirc/lirc_ttusbir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/media/lirc/lirc_ttusbir.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/mei/TODO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/mei/TODO</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/net/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/net/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/net/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/net/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/net/TODO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/net/TODO</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/net/pc300-falc-lh.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/net/pc300-falc-lh.h</a> (renamed from drivers/net/wan/pc300-falc-lh.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/net/pc300.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/net/pc300.h</a> (renamed from drivers/net/wan/pc300.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/net/pc300_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/net/pc300_drv.c</a> (renamed from drivers/net/wan/pc300_drv.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/staging/net/pc300_tty.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/net/pc300_tty.c</a> (renamed from drivers/net/wan/pc300_tty.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/nvec/nvec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/nvec/nvec.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/octeon/ethernet-rx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/octeon/ethernet-tx.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet-util.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/octeon/ethernet-util.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/octeon/ethernet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/octeon/ethernet.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/olpc_dcon/olpc_dcon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/olpc_dcon/olpc_dcon.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/olpc_dcon/olpc_dcon_xo_1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/omapdrm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/omapdrm/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/omapdrm/omap_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/omapdrm/omap_crtc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/omapdrm/omap_dmm_tiler.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/omapdrm/omap_dmm_tiler.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/omapdrm/omap_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/omapdrm/omap_drv.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/omapdrm/omap_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/omapdrm/omap_drv.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/omapdrm/omap_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/omapdrm/omap_fb.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/omapdrm/omap_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/omapdrm/omap_gem.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/staging/omapdrm/omap_gem_dmabuf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/omapdrm/omap_gem_dmabuf.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/omapdrm/tcm-sita.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/omapdrm/tcm-sita.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ozwpan/README?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ozwpan/README</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ozwpan/ozappif.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ozwpan/ozappif.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ozwpan/ozcdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ozwpan/ozcdev.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ozwpan/ozevent.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ozwpan/ozevent.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ozwpan/ozevent.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ozwpan/ozevent.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ozwpan/ozeventdef.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ozwpan/ozeventdef.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ozwpan/ozhcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ozwpan/ozhcd.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ozwpan/ozmain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ozwpan/ozmain.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ozwpan/ozusbsvc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ozwpan/ozusbsvc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/panel/panel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/panel/panel.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/quatech_usb2/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/quatech_usb2/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/quatech_usb2/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/quatech_usb2/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/quatech_usb2/TODO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/quatech_usb2/TODO</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/quatech_usb2/quatech_usb2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/quatech_usb2/quatech_usb2.c</a></td><td class='right'>1976</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 31.3%;'/><td class='none' style='width: 68.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ramster/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ramster/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ramster/cluster/tcp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ramster/cluster/tcp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ramster/xvmalloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ramster/xvmalloc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/ramster/zcache-main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/ramster/zcache-main.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/ieee80211/dot11d.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/ieee80211/dot11d.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/ieee80211/ieee80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/ieee80211/ieee80211.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/r8180.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/r8180.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/r8180_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/r8180_core.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/r8180_dm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/r8180_dm.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/r8180_rtl8225z2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/r8180_rtl8225z2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/r8180_wx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/r8180_wx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/r8180_wx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/r8180_wx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8187se/r8185b_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8187se/r8185b_init.c</a></td><td class='right'>1329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.4%;'/><td class='rem' style='width: 11.6%;'/><td class='none' style='width: 79.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtl8192e/r819xE_phyreg.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtl8192e/rtl_core.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtl8192e/rtl_core.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtl8192e/rtl_dm.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtl8192e/rtl_wx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtl819x_TSProc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtl819x_TSProc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtllib.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtllib_rx.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_softmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtllib_softmac.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_softmac_wx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtllib_softmac_wx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtllib_tx.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192e/rtllib_wx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192e/rtllib_wx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/ieee80211_module.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/ieee80211/ieee80211_module.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/ieee80211/ieee80211_tx.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/ieee80211/rtl819x_TSProc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r8180_93cx6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r8180_93cx6.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r8180_93cx6.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r8180_93cx6.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r8192U.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r8192U.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r8192U_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r8192U_core.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r8192U_dm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r8192U_dm.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r8192U_hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r8192U_hw.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r8192U_wx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r8192U_wx.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r8192U_wx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r8192U_wx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r819xU_HTType.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r819xU_HTType.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r819xU_cmdpkt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r819xU_cmdpkt.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r819xU_firmware.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r819xU_firmware.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r819xU_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r819xU_phy.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8192u/r819xU_phyreg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8192u/r819xU_phyreg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/rtl8712/big_endian.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/big_endian.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/drv_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/drv_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/rtl8712/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/generic.h</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/hal_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/hal_init.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/ieee80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/ieee80211.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/rtl8712/if_ether.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/if_ether.h</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/rtl8712/ip.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/ip.h</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/rtl8712/little_endian.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/little_endian.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/os_intfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/os_intfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/osdep_service.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/osdep_service.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl8712_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl8712_cmd.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl8712_cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl8712_cmd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl8712_efuse.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl8712_efuse.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl8712_gp_bitdef.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl8712_gp_bitdef.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl8712_hal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl8712_hal.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl8712_led.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl8712_led.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl8712_recv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl8712_recv.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl8712_xmit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl8712_xmit.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_byteorder.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl871x_byteorder.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl871x_cmd.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl871x_cmd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl871x_io.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_ioctl_linux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl871x_ioctl_linux.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_ioctl_set.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl871x_ioctl_set.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_mlme.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl871x_mlme.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_mlme.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl871x_mlme.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_mp_phy_regdef.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl871x_mp_phy_regdef.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_recv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl871x_recv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_xmit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl871x_xmit.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/rtl871x_xmit.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/rtl871x_xmit.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/rtl8712/swab.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/swab.h</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/usb_halinit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/usb_halinit.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/usb_intf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/usb_intf.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/usb_ops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/usb_ops.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/wifi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/wifi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rtl8712/xmit_linux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rtl8712/xmit_linux.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/ms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/ms.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/ms.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/ms.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/ms_mg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/ms_mg.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x_card.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x_card.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x_card.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x_card.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x_chip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x_chip.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x_chip.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x_chip.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x_fop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x_fop.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x_fop.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x_fop.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x_scsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x_scsi.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x_scsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x_scsi.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x_sys.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x_sys.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x_transport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x_transport.c</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/rts51x_transport.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/rts51x_transport.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/sd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/sd.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/sd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/sd.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/sd_cprm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/sd_cprm.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/xd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/xd.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts5139/xd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts5139/xd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts_pstor/ms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts_pstor/ms.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/rts_pstor/rtsx_transport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/rts_pstor/rtsx_transport.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sep/sep_driver_config.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/sep/sep_driver_config.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sep/sep_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/sep/sep_main.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/serial/68360serial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/serial/68360serial.c</a></td><td class='right'>2979</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 47.1%;'/><td class='none' style='width: 52.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/serial/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/serial/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/serial/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/serial/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/serial/TODO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/serial/TODO</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/serqt_usb2/serqt_usb2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/serqt_usb2/serqt_usb2.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm7xx/smtcfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/sm7xx/smtcfb.c</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/sm7xx/smtcfb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/sm7xx/smtcfb.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/telephony/ixj.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/telephony/ixj.c</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/tidspbridge/core/io_sm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/tidspbridge/core/io_sm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/tidspbridge/core/ue_deh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/tidspbridge/core/ue_deh.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/usbip/stub_dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/usbip/stub_dev.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/usbip/usbip_common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/usbip/usbip_common.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/usbip/usbip_protocol.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/usbip/usbip_protocol.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/usbip/userspace/libsrc/vhci_driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/usbip/userspace/libsrc/vhci_driver.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/usbip/vhci_hcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/usbip/vhci_hcd.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/usbip/vhci_rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/usbip/vhci_rx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/usbip/vhci_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/usbip/vhci_sysfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vme/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/vme/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/staging/vme/TODO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/vme/TODO</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vme/devices/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/vme/devices/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vme/devices/vme_pio2_cntr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/vme/devices/vme_pio2_cntr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vme/devices/vme_pio2_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/vme/devices/vme_pio2_core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vme/devices/vme_pio2_gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/vme/devices/vme_pio2_gpio.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vme/devices/vme_user.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/vme/devices/vme_user.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6655/wpa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/vt6655/wpa.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6656/dpc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/vt6656/dpc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6656/ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/vt6656/ioctl.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6656/main_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/vt6656/main_usb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/vt6656/wpa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/vt6656/wpa.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlags49_h2/README.ubuntu?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/wlags49_h2/README.ubuntu</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlags49_h2/hcf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/wlags49_h2/hcf.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlags49_h2/hcf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/wlags49_h2/hcf.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlags49_h2/mmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/wlags49_h2/mmd.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlags49_h2/wl_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/wlags49_h2/wl_cs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlags49_h2/wl_netdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/wlags49_h2/wl_netdev.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlags49_h2/wl_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/wlags49_h2/wl_pci.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlags49_h2/wl_profile.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/wlags49_h2/wl_profile.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlags49_h2/wl_util.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/wlags49_h2/wl_util.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlan-ng/cfg80211.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/wlan-ng/cfg80211.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/wlan-ng/prism2mgmt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/wlan-ng/prism2mgmt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/xgifb/XGI_main.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/xgifb/XGI_main.h</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/xgifb/XGI_main_26.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/xgifb/XGI_main_26.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/xgifb/XGIfb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/xgifb/XGIfb.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/xgifb/vb_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/xgifb/vb_init.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/xgifb/vb_setmode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/xgifb/vb_setmode.c</a></td><td class='right'>1457</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 16.6%;'/><td class='none' style='width: 77.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/xgifb/vb_struct.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/xgifb/vb_struct.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/xgifb/vb_table.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/xgifb/vb_table.h</a></td><td class='right'>725</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 9.8%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/xgifb/vgatypes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/xgifb/vgatypes.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/zcache/zcache-main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/zcache/zcache-main.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/zsmalloc/zsmalloc-main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/zsmalloc/zsmalloc-main.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/staging/zsmalloc/zsmalloc_int.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/staging/zsmalloc/zsmalloc_int.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target.c</a></td><td class='right'>821</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 6.6%;'/><td class='none' style='width: 87.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_configfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target_configfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target_core.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_datain_values.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target_datain_values.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_erl0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target_erl0.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_erl1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target_erl1.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_erl2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target_erl2.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_parameters.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target_parameters.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_seq_pdu_list.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target_seq_pdu_list.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_seq_pdu_list.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target_seq_pdu_list.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_tmr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target_tmr.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_util.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target_util.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/iscsi/iscsi_target_util.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/iscsi/iscsi_target_util.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/loopback/tcm_loop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/loopback/tcm_loop.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/target/sbp/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/sbp/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/target/sbp/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/sbp/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/target/sbp/sbp_target.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/sbp/sbp_target.c</a></td><td class='right'>2621</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 41.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 58.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/target/sbp/sbp_target.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/sbp/sbp_target.h</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_alua.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_alua.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_alua.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_alua.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_cdb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_cdb.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_configfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_configfs.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_device.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_file.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_file.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_file.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_iblock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_iblock.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_iblock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_iblock.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_internal.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_pr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_pr.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_pr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_pr.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_pscsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_pscsi.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_pscsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_pscsi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_rd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_rd.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_rd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_rd.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_tmr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_tmr.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_tpg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_tpg.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/target_core_transport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/target_core_transport.c</a></td><td class='right'>994</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 11.4%;'/><td class='none' style='width: 84.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/tcm_fc/tfc_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/tcm_fc/tfc_cmd.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/tcm_fc/tfc_conf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/tcm_fc/tfc_conf.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/target/tcm_fc/tfc_io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/target/tcm_fc/tfc_io.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/bfin_jtag_comm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/bfin_jtag_comm.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/hvc_console.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/hvc/hvc_console.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/hvc_console.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/hvc/hvc_console.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/hvc_xen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/hvc/hvc_xen.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/hvcs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/hvc/hvcs.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/hvsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/hvc/hvsi.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/hvc/hvsi_lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/hvc/hvsi_lib.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/ipwireless/tty.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/ipwireless/tty.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/mxser.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/mxser.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/n_tty.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/n_tty.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/pty.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/pty.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/68328serial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/68328serial.c</a></td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/tty/serial/68328serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/68328serial.h</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/8250/8250.c</a></td><td class='right'>312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/8250/8250.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250_em.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/8250/8250_em.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250_mca.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/8250/8250_mca.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/8250_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/8250/8250_pci.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/8250/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/8250/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/8250/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/amba-pl011.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/amba-pl011.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/bfin_uart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/bfin_uart.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/clps711x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/clps711x.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/crisv10.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/crisv10.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/imx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/imx.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/lantiq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/lantiq.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/mxs-auart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/mxs-auart.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/of_serial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/of_serial.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/omap-serial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/omap-serial.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/pch_uart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/pch_uart.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/pmac_zilog.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/pmac_zilog.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/sb1250-duart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/sb1250-duart.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/serial_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/serial_core.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/sh-sci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/sh-sci.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/serial/zs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/serial/zs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/tty_buffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/tty_buffer.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/tty_io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/tty_io.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/tty_ldisc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/tty_ldisc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/vt/consolemap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/vt/consolemap.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/vt/keyboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/vt/keyboard.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/vt/vt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/vt/vt.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/tty/vt/vt_ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/tty/vt/vt_ioctl.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/uio/uio_pdrv_genirq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/uio/uio_pdrv_genirq.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/atm/cxacru.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/atm/cxacru.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/atm/speedtch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/atm/speedtch.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/atm/ueagle-atm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/atm/ueagle-atm.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/atm/usbatm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/atm/usbatm.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/atm/xusbatm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/atm/xusbatm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/chipidea/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/Kconfig</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/chipidea/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/chipidea/bits.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/bits.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/chipidea/ci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/ci.h</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/usb/chipidea/ci13xxx_msm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/ci13xxx_msm.c</a> (renamed from drivers/usb/gadget/ci13xxx_msm.c)</td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/usb/chipidea/ci13xxx_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/ci13xxx_pci.c</a> (renamed from drivers/usb/gadget/ci13xxx_pci.c)</td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/chipidea/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/core.c</a></td><td class='right'>474</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/chipidea/debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/debug.c</a></td><td class='right'>804</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/chipidea/debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/debug.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/chipidea/host.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/host.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/chipidea/host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/host.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/chipidea/udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/udc.c</a></td><td class='right'>1809</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 28.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 71.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/chipidea/udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/chipidea/udc.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/class/cdc-acm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/class/cdc-acm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/class/cdc-wdm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/class/cdc-wdm.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/class/usblp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/class/usblp.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/Kconfig</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/devio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/devio.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/driver.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/file.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/hcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/hcd.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/hub.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/hub.c</a></td><td class='right'>676</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/usb/core/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/inode.c</a></td><td class='right'>748</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 11.8%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/message.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/message.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/quirks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/quirks.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/sysfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/urb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/urb.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/core/usb-acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/usb-acpi.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/usb.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/core/usb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/core/usb.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/dwc3/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/dwc3/core.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/dwc3/core.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/dwc3-omap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/dwc3/dwc3-omap.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/ep0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/dwc3/ep0.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/gadget.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/dwc3/gadget.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/gadget.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/dwc3/gadget.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/host.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/dwc3/host.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/dwc3/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/dwc3/io.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/Kconfig</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/amd5536udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/amd5536udc.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/amd5536udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/amd5536udc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/at91_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/at91_udc.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/at91_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/at91_udc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/atmel_usba_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/atmel_usba_udc.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/atmel_usba_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/atmel_usba_udc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/usb/gadget/ci13xxx_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/ci13xxx_udc.c</a></td><td class='right'>2996</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 47.4%;'/><td class='none' style='width: 52.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/usb/gadget/ci13xxx_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/ci13xxx_udc.h</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/composite.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/composite.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/dummy_hcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/dummy_hcd.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/f_fs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/f_fs.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/f_hid.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/f_hid.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/f_loopback.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/f_loopback.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/f_mass_storage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/f_mass_storage.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/f_rndis.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/f_rndis.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/f_sourcesink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/f_sourcesink.c</a></td><td class='right'>424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/fsl_qe_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/fsl_qe_udc.c</a></td><td class='right'>371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/fsl_qe_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/fsl_qe_udc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/fsl_udc_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/fsl_udc_core.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/fsl_usb2_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/fsl_usb2_udc.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/fusb300_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/fusb300_udc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/fusb300_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/fusb300_udc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/g_ffs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/g_ffs.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/g_zero.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/g_zero.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/gadget_chips.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/gadget_chips.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/goku_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/goku_udc.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/goku_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/goku_udc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/imx_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/imx_udc.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/usb/gadget/langwell_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/langwell_udc.c</a></td><td class='right'>3434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 54.3%;'/><td class='none' style='width: 45.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/usb/gadget/langwell_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/langwell_udc.h</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/gadget/lpc32xx_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/lpc32xx_udc.c</a></td><td class='right'>3538</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 56.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 44.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/m66592-udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/m66592-udc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/m66592-udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/m66592-udc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/mv_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/mv_udc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/mv_udc_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/mv_udc_core.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/ndis.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/ndis.h</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/omap_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/omap_udc.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/omap_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/omap_udc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/pch_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/pch_udc.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/printer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/printer.c</a></td><td class='right'>470</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/pxa25x_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/pxa25x_udc.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/pxa25x_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/pxa25x_udc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/r8a66597-udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/r8a66597-udc.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/r8a66597-udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/r8a66597-udc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/rndis.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/rndis.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/rndis.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/rndis.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/s3c-hsotg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/s3c-hsotg.c</a></td><td class='right'>1633</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.8%;'/><td class='rem' style='width: 11.0%;'/><td class='none' style='width: 74.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/gadget/s3c-hsotg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/s3c-hsotg.h</a></td><td class='right'>377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/s3c-hsudc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/s3c-hsudc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/s3c2410_udc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/s3c2410_udc.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/s3c2410_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/s3c2410_udc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/gadget/tcm_usb_gadget.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/tcm_usb_gadget.c</a></td><td class='right'>2480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 39.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 60.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/gadget/tcm_usb_gadget.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/tcm_usb_gadget.h</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/u_ether.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/u_ether.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/u_ether.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/u_ether.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/u_serial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/u_serial.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/uvc_queue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/uvc_queue.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/uvc_v4l2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/uvc_v4l2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/gadget/zero.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/gadget/zero.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/Kconfig</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/host/bcma-hcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/bcma-hcd.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-dbg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-dbg.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-fsl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-fsl.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-fsl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-fsl.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-hcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-hcd.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-hub.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-hub.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-mxc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-mxc.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-omap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-omap.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-orion.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-orion.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-pci.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-platform.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-platform.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-q.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-q.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-s5p.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-s5p.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-sched.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-sched.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/host/ehci-sead3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-sead3.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-sh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-sh.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-spear.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-spear.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ehci-tegra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ehci-tegra.c</a></td><td class='right'>463</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/fhci-tds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/fhci-tds.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/fsl-mph-dr-of.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/fsl-mph-dr-of.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/isp1760-hcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/isp1760-hcd.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/isp1760-if.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/isp1760-if.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-at91.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-at91.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-au1xxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-au1xxx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-cns3xxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-cns3xxx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-da8xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-da8xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-dbg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-dbg.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-ep93xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-ep93xx.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-exynos.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-exynos.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-hcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-hcd.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-nxp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-nxp.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-omap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-omap.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-platform.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-platform.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-pnx8550.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-pnx8550.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-ppc-of.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-ppc-of.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-ppc-soc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-ppc-soc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-ps3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-ps3.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-pxa27x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-pxa27x.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-s3c2410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-s3c2410.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-sa1111.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-sa1111.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-sh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-sh.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-spear.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-spear.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/usb/host/ohci-ssb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-ssb.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-tmio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-tmio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/ohci-xls.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ohci-xls.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/oxu210hp-hcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/oxu210hp-hcd.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/pci-quirks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/pci-quirks.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/r8a66597-hcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/r8a66597-hcd.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/host/ssb-hcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/ssb-hcd.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/xhci-hub.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/xhci-hub.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/xhci-mem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/xhci-mem.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/xhci-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/xhci-pci.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/xhci-ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/xhci-ring.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/xhci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/xhci.c</a></td><td class='right'>483</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/host/xhci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/host/xhci.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/image/mdc800.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/image/mdc800.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/appledisplay.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/misc/appledisplay.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/emi26.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/misc/emi26.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/emi62.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/misc/emi62.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/idmouse.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/misc/idmouse.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/iowarrior.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/misc/iowarrior.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/ldusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/misc/ldusb.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/legousbtower.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/misc/legousbtower.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/rio500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/misc/rio500.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/usblcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/misc/usblcd.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/usbtest.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/misc/usbtest.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/uss720.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/misc/uss720.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/misc/yurex.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/misc/yurex.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/musb/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/musb/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/cppi_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/musb/cppi_dma.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/musb/musb_core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/musb/musb_dsps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/musb/musb_dsps.c</a></td><td class='right'>711</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/musb/musb_io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/musb/musb_io.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/otg/gpio_vbus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/otg/gpio_vbus.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/otg/twl6030-usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/otg/twl6030-usb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/phy/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/phy/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/phy/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/phy/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/phy/isp1301.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/phy/isp1301.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/renesas_usbhs/mod_gadget.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/renesas_usbhs/mod_gadget.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/aircable.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/aircable.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/ark3116.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/ark3116.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/belkin_sa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/belkin_sa.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/bus.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/ch341.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/ch341.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/console.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/console.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/cp210x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/cp210x.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/cyberjack.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/cyberjack.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/cypress_m8.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/cypress_m8.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/digi_acceleport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/digi_acceleport.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/empeg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/empeg.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/ezusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/ezusb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/f81232.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/f81232.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/ftdi_sio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/ftdi_sio.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/ftdi_sio_ids.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/ftdi_sio_ids.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/funsoft.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/funsoft.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/garmin_gps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/garmin_gps.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/generic.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/hp4x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/hp4x.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/io_edgeport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/io_edgeport.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/io_tables.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/io_tables.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/io_ti.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/io_ti.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/ipaq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/ipaq.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/ipw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/ipw.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/ir-usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/ir-usb.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/iuu_phoenix.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/iuu_phoenix.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/keyspan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/keyspan.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/keyspan.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/keyspan.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/keyspan_pda.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/keyspan_pda.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/kl5kusb105.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/kl5kusb105.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/kobil_sct.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/kobil_sct.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/mct_u232.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/mct_u232.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/metro-usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/metro-usb.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/mos7720.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/mos7720.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/mos7840.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/mos7840.c</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/moto_modem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/moto_modem.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/navman.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/navman.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/omninet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/omninet.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/opticon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/opticon.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/option.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/option.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/oti6858.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/oti6858.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/pl2303.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/pl2303.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/qcaux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/qcaux.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/qcserial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/qcserial.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/usb/serial/quatech2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/quatech2.c</a></td><td class='right'>1155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/safe_serial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/safe_serial.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/siemens_mpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/siemens_mpi.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/sierra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/sierra.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/spcp8x5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/spcp8x5.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/ssu100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/ssu100.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/symbolserial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/symbolserial.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/ti_usb_3410_5052.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/ti_usb_3410_5052.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/ti_usb_3410_5052.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/ti_usb_3410_5052.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/usb-serial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/usb-serial.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/usb_debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/usb_debug.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/usb_wwan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/usb_wwan.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/visor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/visor.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/vivopay-serial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/vivopay-serial.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/whiteheat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/whiteheat.c</a></td><td class='right'>569</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 8.8%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/serial/zio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/serial/zio.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/ene_ub6250.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/storage/ene_ub6250.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/unusual_devs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/storage/unusual_devs.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/storage/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/storage/usb.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/usb/usb-skeleton.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/usb/usb-skeleton.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vhost/net.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vhost/net.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/vhost/vhost.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vhost/vhost.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/Kconfig</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/au1100fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/au1100fb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/video/auo_k1900fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/auo_k1900fb.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/video/auo_k1901fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/auo_k1901fb.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/video/auo_k190x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/auo_k190x.c</a></td><td class='right'>1046</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/video/auo_k190x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/auo_k190x.h</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/adp5520_bl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/adp5520_bl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/adp8860_bl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/adp8860_bl.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/adp8870_bl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/adp8870_bl.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/ams369fg06.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/ams369fg06.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/apple_bl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/apple_bl.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/backlight.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/backlight.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/corgi_lcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/corgi_lcd.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/cr_bllcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/cr_bllcd.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/da903x_bl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/da903x_bl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/generic_bl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/generic_bl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/ili9320.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/ili9320.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/jornada720_bl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/jornada720_bl.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/jornada720_lcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/jornada720_lcd.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/l4f00242t03.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/l4f00242t03.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/lcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/lcd.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/ld9040.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/ld9040.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/video/backlight/lm3533_bl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/lm3533_bl.c</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/lms283gf05.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/lms283gf05.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/ltv350qv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/ltv350qv.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/omap1_bl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/omap1_bl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/pcf50633-backlight.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/pcf50633-backlight.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/progear_bl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/progear_bl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/s6e63m0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/s6e63m0.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/tdo24m.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/tdo24m.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/tosa_bl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/tosa_bl.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/tosa_lcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/tosa_lcd.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/backlight/wm831x_bl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/backlight/wm831x_bl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/bfin_adv7393fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/bfin_adv7393fb.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/clps711xfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/clps711xfb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/cobalt_lcdfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/cobalt_lcdfb.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/console/sticore.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/console/sticore.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/efifb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/efifb.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/ep93xx-fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/ep93xx-fb.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/exynos/exynos_dp_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/exynos/exynos_dp_core.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/exynos/exynos_dp_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/exynos/exynos_dp_core.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/exynos/exynos_dp_reg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/exynos/exynos_dp_reg.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/exynos/exynos_dp_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/exynos/exynos_dp_reg.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/exynos/exynos_mipi_dsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/exynos/exynos_mipi_dsi.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/exynos/exynos_mipi_dsi_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/exynos/exynos_mipi_dsi_common.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/exynos/s6e8ax0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/exynos/s6e8ax0.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fb_defio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/fb_defio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/fbmem.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fbsysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/fbsysfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/fsl-diu-fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/fsl-diu-fb.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/imxfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/imxfb.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/intelfb/intelfbdrv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/intelfb/intelfbdrv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/matrox/matroxfb_maven.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/matrox/matroxfb_maven.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/mb862xx/mb862xx-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/mb862xx/mb862xx-i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/mb862xx/mb862xxfbdrv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/mb862xx/mb862xxfbdrv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/mbx/mbxfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/mbx/mbxfb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/mxsfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/mxsfb.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/displays/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/displays/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/displays/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/displays/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/displays/panel-acx565akm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/displays/panel-acx565akm.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/displays/panel-generic-dpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/displays/panel-generic-dpi.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/displays/panel-n8x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/displays/panel-n8x0.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/displays/panel-taal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/displays/panel-taal.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/video/omap2/displays/panel-tfp410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/displays/panel-tfp410.c</a> (renamed from drivers/video/omap2/displays/panel-dvi.c)</td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/displays/panel-tpo-td043mtea1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/displays/panel-tpo-td043mtea1.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/apply.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/apply.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/core.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/dispc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/dispc.c</a></td><td class='right'>747</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/dispc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/dispc.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/display.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/dpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/dpi.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/dsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/dsi.c</a></td><td class='right'>537</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/dss.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/dss.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/dss.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/dss.h</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/dss_features.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/dss_features.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/dss_features.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/dss_features.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/hdmi.c</a></td><td class='right'>443</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/hdmi_panel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/hdmi_panel.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/manager.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/manager.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/overlay.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/overlay.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/rfbi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/rfbi.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/sdi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/sdi.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/ti_hdmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/ti_hdmi.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c</a></td><td class='right'>480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/dss/venc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/dss/venc.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/omapfb/omapfb-ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/omapfb/omapfb-ioctl.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/omapfb/omapfb-main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/omapfb/omapfb-main.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/omapfb/omapfb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/omapfb/omapfb.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/omap2/vrfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/omap2/vrfb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/pxa3xx-gcu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/pxa3xx-gcu.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/s3c-fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/s3c-fb.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/sh_mobile_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/sh_mobile_hdmi.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/sh_mobile_lcdcfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/sh_mobile_lcdcfb.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/sh_mobile_lcdcfb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/sh_mobile_lcdcfb.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/sis/init.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/sis/init.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/sis/sis_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/sis/sis_main.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/skeletonfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/skeletonfb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/smscufx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/smscufx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/udlfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/udlfb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/uvesafb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/uvesafb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/via/viafbdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/via/viafbdev.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/video/xen-fbfront.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/video/xen-fbfront.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/virtio/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/virtio/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/virtio/virtio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/virtio/virtio.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/virtio/virtio_balloon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/virtio/virtio_balloon.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/virtio/virtio_mmio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/virtio/virtio_mmio.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/Kconfig</a> (renamed from drivers/staging/vme/Kconfig)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/vme/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/boards/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/boards/Kconfig</a> (renamed from drivers/staging/vme/boards/Kconfig)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/boards/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/boards/Makefile</a> (renamed from drivers/staging/vme/boards/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/boards/vme_vmivme7805.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/boards/vme_vmivme7805.c</a> (renamed from drivers/staging/vme/boards/vme_vmivme7805.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/boards/vme_vmivme7805.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/boards/vme_vmivme7805.h</a> (renamed from drivers/staging/vme/boards/vme_vmivme7805.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/bridges/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/bridges/Kconfig</a> (renamed from drivers/staging/vme/bridges/Kconfig)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/bridges/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/bridges/Makefile</a> (renamed from drivers/staging/vme/bridges/Makefile)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/bridges/vme_ca91cx42.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/bridges/vme_ca91cx42.c</a> (renamed from drivers/staging/vme/bridges/vme_ca91cx42.c)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/bridges/vme_ca91cx42.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/bridges/vme_ca91cx42.h</a> (renamed from drivers/staging/vme/bridges/vme_ca91cx42.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/bridges/vme_tsi148.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/bridges/vme_tsi148.c</a> (renamed from drivers/staging/vme/bridges/vme_tsi148.c)</td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/bridges/vme_tsi148.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/bridges/vme_tsi148.h</a> (renamed from drivers/staging/vme/bridges/vme_tsi148.h)</td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/vme.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/vme.c</a> (renamed from drivers/staging/vme/vme.c)</td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/vme/vme_bridge.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/vme/vme_bridge.h</a> (renamed from drivers/staging/vme/vme_bridge.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/w1/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/w1/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/w1/masters/mxc_w1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/w1/masters/mxc_w1.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/w1/slaves/w1_ds2408.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/w1/slaves/w1_ds2408.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/w1/w1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/w1/w1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/w1/w1_io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/w1/w1_io.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/Kconfig</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/ar7_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/ar7_wdt.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/watchdog/da9052_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/da9052_wdt.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/hpwdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/hpwdt.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/i6300esb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/i6300esb.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/iTCO_vendor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/iTCO_vendor.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/iTCO_vendor_support.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/iTCO_vendor_support.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/iTCO_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/iTCO_wdt.c</a></td><td class='right'>533</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 6.6%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/watchdog/ie6xx_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/ie6xx_wdt.c</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/imx2_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/imx2_wdt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/it87_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/it87_wdt.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/drivers/watchdog/ixp2000_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/ixp2000_wdt.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/lantiq_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/lantiq_wdt.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/orion_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/orion_wdt.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/pcwd_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/pcwd_pci.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/pnx4008_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/pnx4008_wdt.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/s3c2410_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/s3c2410_wdt.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/sch311x_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/sch311x_wdt.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/shwdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/shwdt.c</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/sp5100_tco.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/sp5100_tco.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/sp805_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/sp805_wdt.c</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/via_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/via_wdt.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/watchdog_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/watchdog_core.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/drivers/watchdog/watchdog_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/watchdog_core.h</a> (renamed from drivers/watchdog/watchdog_dev.h)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/watchdog_dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/watchdog_dev.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/wdt_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/wdt_pci.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/watchdog/wm831x_wdt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/watchdog/wm831x_wdt.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/xen/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/xen/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/drivers/xen/acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/xen/acpi.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/events.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/xen/events.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/grant-table.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/xen/grant-table.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/tmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/xen/tmem.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/xen-acpi-processor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/xen/xen-acpi-processor.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/xen-selfballoon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/xen/xen-selfballoon.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/xenbus/xenbus_comms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/xen/xenbus/xenbus_comms.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/xenbus/xenbus_comms.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/xen/xenbus/xenbus_comms.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/drivers/xen/xenbus/xenbus_dev_backend.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/xen/xenbus/xenbus_dev_backend.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/firmware/3com/3C359.bin.ihex?id=66dd07b88a1c9d446f32253da606b87324fa620e'>firmware/3com/3C359.bin.ihex</a></td><td class='right'>1573</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 24.9%;'/><td class='none' style='width: 75.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/firmware/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>firmware/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/firmware/WHENCE?id=66dd07b88a1c9d446f32253da606b87324fa620e'>firmware/WHENCE</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/firmware/tr_smctr.bin.ihex?id=66dd07b88a1c9d446f32253da606b87324fa620e'>firmware/tr_smctr.bin.ihex</a></td><td class='right'>477</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.5%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/9p/vfs_inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/9p/vfs_inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/9p/vfs_inode_dotl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/9p/vfs_inode_dotl.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/Kconfig.binfmt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/Kconfig.binfmt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/affs/affs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/affs/affs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/affs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/affs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/afs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/afs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/aio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/aio.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/attr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/attr.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/autofs4/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/autofs4/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/bad_inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/bad_inode.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/bfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/bfs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/binfmt_elf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/binfmt_elf.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/binfmt_elf_fdpic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/binfmt_elf_fdpic.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/binfmt_flat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/binfmt_flat.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/binfmt_misc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/binfmt_misc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/bio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/bio.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/block_dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/block_dev.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/acl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/acl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/backref.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/backref.c</a></td><td class='right'>495</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/backref.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/backref.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/btrfs_inode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/btrfs_inode.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/check-integrity.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/check-integrity.c</a></td><td class='right'>584</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 90.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ctree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/ctree.c</a></td><td class='right'>889</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 85.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ctree.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/ctree.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/delayed-inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/delayed-inode.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/delayed-ref.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/delayed-ref.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/delayed-ref.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/delayed-ref.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/disk-io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/disk-io.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/disk-io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/disk-io.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/export.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/export.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/extent-tree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/extent-tree.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/extent_io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/extent_io.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/extent_io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/extent_io.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/file.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/free-space-cache.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/free-space-cache.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/inode.c</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/ioctl.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ioctl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/ioctl.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ordered-data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/ordered-data.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ordered-data.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/ordered-data.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/print-tree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/print-tree.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/reada.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/reada.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/scrub.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/scrub.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/super.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/transaction.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/transaction.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/tree-log.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/tree-log.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ulist.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/ulist.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/ulist.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/ulist.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/volumes.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/volumes.c</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/volumes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/volumes.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/btrfs/xattr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/btrfs/xattr.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/buffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/buffer.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/export.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ceph/export.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ceph/file.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ceph/ioctl.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/ioctl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ceph/ioctl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/mds_client.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ceph/mds_client.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/mds_client.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ceph/mds_client.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/snap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ceph/snap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ceph/xattr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ceph/xattr.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/README?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/README</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/cifs_debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/cifs_debug.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/cifs_debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/cifs_debug.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/cifsfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/cifsfs.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/cifsfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/cifsfs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/cifsglob.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/cifsglob.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/cifsproto.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/cifsproto.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/cifssmb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/cifssmb.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/connect.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/connect.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/dir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/dir.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/file.c</a></td><td class='right'>783</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/ioctl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/misc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/misc.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/readdir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/readdir.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/cifs/smb1ops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/smb1ops.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/cifs/smb2ops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/smb2ops.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/cifs/transport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/cifs/transport.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/coda/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/coda/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/compat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/compat.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dcache.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/dcache.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/debugfs/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/debugfs/file.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/devpts/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/devpts/inode.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/direct-io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/direct-io.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dlm/ast.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/dlm/ast.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dlm/dlm_internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/dlm/dlm_internal.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dlm/lock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/dlm/lock.c</a></td><td class='right'>541</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dlm/lock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/dlm/lock.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dlm/lockspace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/dlm/lockspace.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dlm/lowcomms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/dlm/lowcomms.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dlm/memory.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/dlm/memory.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dlm/rcom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/dlm/rcom.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dlm/recover.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/dlm/recover.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dlm/recoverd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/dlm/recoverd.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/dlm/requestqueue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/dlm/requestqueue.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ecryptfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ecryptfs/inode.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ecryptfs/messaging.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ecryptfs/messaging.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ecryptfs/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ecryptfs/super.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/eventfd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/eventfd.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/eventpoll.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/eventpoll.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/exec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/exec.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/exofs/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/exofs/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/exofs/exofs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/exofs/exofs.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/exofs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/exofs/inode.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/exofs/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/exofs/super.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/exofs/sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/exofs/sys.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/exportfs/expfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/exportfs/expfs.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/balloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext2/balloc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/ext2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext2/ext2.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/ialloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext2/ialloc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext2/inode.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/namei.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext2/namei.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext2/super.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext2/xattr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext2/xattr.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext3/balloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext3/balloc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext3/dir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext3/dir.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext3/ext3.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext3/ext3.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext3/hash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext3/hash.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext3/ialloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext3/ialloc.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext3/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext3/inode.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext3/namei.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext3/namei.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext3/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext3/super.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/balloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/balloc.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/bitmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/bitmap.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/dir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/dir.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/ext4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/ext4.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/ext4_extents.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/ext4_extents.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/ext4_jbd2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/ext4_jbd2.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/ext4_jbd2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/ext4_jbd2.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/extents.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/extents.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/file.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/ialloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/ialloc.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/inode.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/ioctl.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/mballoc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/mballoc.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/migrate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/migrate.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/mmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/mmp.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/namei.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/namei.c</a></td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/resize.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/resize.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/super.c</a></td><td class='right'>299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/xattr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/xattr.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ext4/xattr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ext4/xattr.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fat/dir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/fat/dir.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fat/fat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/fat/fat.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fat/fatent.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/fat/fatent.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fat/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/fat/inode.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fcntl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/fcntl.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/file_table.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/file_table.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/freevxfs/vxfs_inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/freevxfs/vxfs_inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fs-writeback.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/fs-writeback.c</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fuse/control.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/fuse/control.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fuse/dir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/fuse/dir.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fuse/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/fuse/file.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fuse/fuse_i.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/fuse/fuse_i.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/fuse/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/fuse/inode.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/acl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/acl.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/aops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/aops.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/bmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/bmap.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/dir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/dir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/export.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/export.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/file.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/glops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/glops.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/incore.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/incore.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/inode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/inode.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/lock_dlm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/lock_dlm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/log.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/log.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/log.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/log.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/lops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/lops.c</a></td><td class='right'>520</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/lops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/lops.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/main.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/meta_io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/meta_io.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/meta_io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/meta_io.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/ops_fstype.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/ops_fstype.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/quota.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/quota.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/rgrp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/rgrp.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/super.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/sys.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/trace_gfs2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/trace_gfs2.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/trans.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/trans.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/util.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/util.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/gfs2/util.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/gfs2/util.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hfs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hfsplus/catalog.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hfsplus/catalog.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hfsplus/dir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hfsplus/dir.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hfsplus/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hfsplus/super.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hostfs/hostfs_kern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hostfs/hostfs_kern.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/alloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hpfs/alloc.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/anode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hpfs/anode.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/buffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hpfs/buffer.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/dir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hpfs/dir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/dnode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hpfs/dnode.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/ea.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hpfs/ea.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/hpfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hpfs/hpfs.h</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/hpfs_fn.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hpfs/hpfs_fn.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hpfs/inode.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/map.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hpfs/map.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/namei.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hpfs/namei.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hpfs/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hpfs/super.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hppfs/hppfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hppfs/hppfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/hugetlbfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/hugetlbfs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/inode.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/internal.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ioprio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ioprio.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/isofs/export.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/isofs/export.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd/checkpoint.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jbd/checkpoint.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd/commit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jbd/commit.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd/journal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jbd/journal.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd/transaction.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jbd/transaction.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd2/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jbd2/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd2/commit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jbd2/commit.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd2/journal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jbd2/journal.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd2/recovery.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jbd2/recovery.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd2/revoke.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jbd2/revoke.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jbd2/transaction.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jbd2/transaction.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/fs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jffs2/fs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/gc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jffs2/gc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/jffs2_fs_sb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jffs2/jffs2_fs_sb.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/nodemgmt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jffs2/nodemgmt.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/os-linux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jffs2/os-linux.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/readinode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jffs2/readinode.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jffs2/super.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/wbuf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jffs2/wbuf.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/xattr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jffs2/xattr.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jffs2/xattr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jffs2/xattr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/jfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/jfs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/libfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/libfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/lockd/clntlock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/lockd/clntlock.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/lockd/svc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/lockd/svc.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/locks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/locks.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/logfs/readwrite.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/logfs/readwrite.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/minix/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/minix/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/namei.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/namei.c</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/namespace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/namespace.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ncpfs/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ncpfs/file.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ncpfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ncpfs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ncpfs/ncp_fs_sb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ncpfs/ncp_fs_sb.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/blocklayout/blocklayout.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/blocklayout/blocklayout.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/blocklayout/blocklayoutdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/blocklayout/blocklayoutdev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/callback.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/callback.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/client.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/client.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/delegation.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/delegation.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/delegation.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/delegation.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/dir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/dir.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/direct.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/direct.c</a></td><td class='right'>751</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 6.3%;'/><td class='none' style='width: 88.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/file.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/fscache.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/fscache.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/fscache.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/fscache.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/getroot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/getroot.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/idmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/idmap.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/inode.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/internal.h</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/namespace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/namespace.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/netns.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/netns.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs2xdr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/nfs2xdr.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs3proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/nfs3proc.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs3xdr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/nfs3xdr.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4_fs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/nfs4_fs.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4filelayout.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/nfs4filelayout.c</a></td><td class='right'>688</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 89.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4filelayout.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/nfs4filelayout.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4filelayoutdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/nfs4filelayoutdev.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4namespace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/nfs4namespace.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/nfs4proc.c</a></td><td class='right'>680</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4renewd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/nfs4renewd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4state.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/nfs4state.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/nfs4xdr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/nfs4xdr.c</a></td><td class='right'>443</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/objlayout/objio_osd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/objlayout/objio_osd.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/objlayout/objlayout.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/objlayout/objlayout.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/pagelist.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/pagelist.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/pnfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/pnfs.c</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/pnfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/pnfs.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/proc.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/read.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/read.c</a></td><td class='right'>437</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/super.c</a></td><td class='right'>762</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 7.5%;'/><td class='none' style='width: 87.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfs/write.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfs/write.c</a></td><td class='right'>809</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 87.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/auth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/auth.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/export.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/export.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/fault_inject.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/fault_inject.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/idmap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/idmap.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/netns.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/netns.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfs4callback.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/nfs4callback.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfs4idmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/nfs4idmap.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfs4recover.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/nfs4recover.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfs4state.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/nfs4state.c</a></td><td class='right'>538</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfs4xdr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/nfs4xdr.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfsctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/nfsctl.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfsfh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/nfsfh.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/nfssvc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/nfssvc.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/state.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/state.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/vfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/vfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nfsd/xdr4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nfsd/xdr4.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nilfs2/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nilfs2/file.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nilfs2/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nilfs2/inode.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nilfs2/ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nilfs2/ioctl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nilfs2/namei.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nilfs2/namei.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nls/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/Kconfig</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/nls/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/nls/mac-celtic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/mac-celtic.c</a></td><td class='right'>602</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/nls/mac-centeuro.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/mac-centeuro.c</a></td><td class='right'>532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/nls/mac-croatian.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/mac-croatian.c</a></td><td class='right'>602</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/nls/mac-cyrillic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/mac-cyrillic.c</a></td><td class='right'>497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/nls/mac-gaelic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/mac-gaelic.c</a></td><td class='right'>567</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/nls/mac-greek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/mac-greek.c</a></td><td class='right'>497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/nls/mac-iceland.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/mac-iceland.c</a></td><td class='right'>602</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/nls/mac-inuit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/mac-inuit.c</a></td><td class='right'>532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/nls/mac-roman.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/mac-roman.c</a></td><td class='right'>637</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/nls/mac-romanian.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/mac-romanian.c</a></td><td class='right'>602</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/nls/mac-turkish.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/nls/mac-turkish.c</a></td><td class='right'>602</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/notify/fsnotify.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/notify/fsnotify.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ntfs/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ntfs/file.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ntfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ntfs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/blockcheck.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/blockcheck.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/cluster/tcp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/cluster/tcp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/dlm/dlmast.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/dlm/dlmast.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/dlm/dlmcommon.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/dlm/dlmcommon.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/dlm/dlmdomain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/dlm/dlmdomain.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/dlmfs/dlmfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/dlmfs/dlmfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/export.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/export.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/inode.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/ioctl.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/move_extents.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/move_extents.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/namei.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/namei.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/symlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/symlink.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ocfs2/symlink.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ocfs2/symlink.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/omfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/omfs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/open.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/open.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/pipe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/pipe.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/pnode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/pnode.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/array.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/proc/array.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/proc/base.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/proc/inode.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/proc/internal.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/proc_sysctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/proc/proc_sysctl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/root.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/proc/root.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/task_mmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/proc/task_mmu.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc/task_nommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/proc/task_nommu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/proc_namespace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/proc_namespace.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/pstore/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/pstore/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/pstore/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/pstore/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/pstore/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/pstore/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/pstore/ram.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/pstore/ram.c</a></td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/fs/pstore/ram_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/pstore/ram_core.c</a> (renamed from drivers/staging/android/persistent_ram.c)</td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/quota/dquot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/quota/dquot.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/read_write.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/read_write.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/readdir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/readdir.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/reiserfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/reiserfs/inode.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/reiserfs/journal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/reiserfs/journal.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/reiserfs/reiserfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/reiserfs/reiserfs.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/reiserfs/resize.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/reiserfs/resize.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/reiserfs/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/reiserfs/super.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/select.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/select.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/signalfd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/signalfd.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/splice.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/splice.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/stat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/stat.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/statfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/statfs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/sync.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/sync.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/sysfs/dir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/sysfs/dir.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/sysfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/sysfs/inode.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/sysv/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/sysv/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/commit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/commit.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/debug.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/debug.h</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/dir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/dir.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/file.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/gc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/gc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/io.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/journal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/journal.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/log.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/log.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/lprops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/lprops.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/lpt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/lpt.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/lpt_commit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/lpt_commit.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/master.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/master.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/orphan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/orphan.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/recovery.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/recovery.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/replay.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/replay.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/sb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/sb.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/scan.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/super.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/tnc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/tnc.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/tnc_commit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/tnc_commit.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/tnc_misc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/tnc_misc.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/ubifs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/ubifs.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ubifs/xattr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ubifs/xattr.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/udf/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/udf/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/udf/namei.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/udf/namei.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ufs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ufs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/ufs/super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/ufs/super.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/utimes.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/utimes.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xattr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xattr.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/kmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/kmem.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/kmem.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/kmem.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_ag.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_ag.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_alloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_alloc.c</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 9.2%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_alloc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_alloc.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_alloc_btree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_alloc_btree.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_aops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_aops.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_attr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_attr.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_attr_leaf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_attr_leaf.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_bmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_bmap.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_bmap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_bmap.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_bmap_btree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_bmap_btree.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_btree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_btree.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_buf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_buf.c</a></td><td class='right'>593</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_buf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_buf.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_buf_item.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_buf_item.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_da_btree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_da_btree.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_dfrag.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_dfrag.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_dir2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_dir2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_dir2_block.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_dir2_block.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_dir2_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_dir2_data.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_dir2_leaf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_dir2_leaf.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_dir2_node.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_dir2_node.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_dir2_sf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_dir2_sf.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_discard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_discard.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_dquot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_dquot.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_dquot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_dquot.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_dquot_item.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_dquot_item.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_error.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_error.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_export.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_export.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/xfs/xfs_extent_busy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_extent_busy.c</a></td><td class='right'>603</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/fs/xfs/xfs_extent_busy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_extent_busy.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_extfree_item.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_extfree_item.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_file.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_file.c</a></td><td class='right'>334</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_fsops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_fsops.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_ialloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_ialloc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_ialloc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_ialloc.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_ialloc_btree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_ialloc_btree.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_iget.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_iget.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_inode.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_inode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_inode.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_inode_item.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_inode_item.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_inode_item.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_inode_item.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_inum.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_inum.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_ioctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_ioctl32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_ioctl32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_iomap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_iomap.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_iops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_iops.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_itable.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_itable.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_log.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_log.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_log.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_log.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_log_cil.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_log_cil.c</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_log_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_log_priv.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_log_recover.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_log_recover.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_message.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_message.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_mount.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_mount.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_mount.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_mount.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_qm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_qm.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_qm_bhv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_qm_bhv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_qm_syscalls.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_qm_syscalls.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_quotaops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_quotaops.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_rename.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_rename.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_rtalloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_rtalloc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/fs/xfs/xfs_rw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_rw.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/fs/xfs/xfs_rw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_rw.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_super.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_super.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_sync.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_sync.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_trace.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_trans.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_trans.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans_ail.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_trans_ail.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans_buf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_trans_buf.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans_dquot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_trans_dquot.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans_extfree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_trans_extfree.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans_inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_trans_inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_trans_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_trans_priv.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_types.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_utils.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_utils.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/fs/xfs/xfs_vnodeops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>fs/xfs/xfs_vnodeops.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/acpi_bus.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/acpi/acpi_bus.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/acpi/actypes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/acpi/actypes.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/asm-generic/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/bitsperlong.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/asm-generic/bitsperlong.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/dma-coherent.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/asm-generic/dma-coherent.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/asm-generic/dma-contiguous.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/asm-generic/dma-contiguous.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/asm-generic/gpio.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/asm-generic/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/asm-generic/kvm_para.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/pci-bridge.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/asm-generic/pci-bridge.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/pgtable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/asm-generic/pgtable.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/asm-generic/posix_types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/statfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/asm-generic/statfs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/asm-generic/vmlinux.lds.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/asm-generic/vmlinux.lds.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/asm-generic/word-at-a-time.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/asm-generic/word-at-a-time.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/drm.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drmP.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/drmP.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_crtc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/drm_crtc.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_crtc_helper.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/drm_crtc_helper.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_dp_helper.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/drm_dp_helper.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_edid.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/drm_edid.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_fixed.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/drm_fixed.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_mem_util.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/drm_mem_util.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_mode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/drm_mode.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/drm_pciids.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/drm_pciids.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/exynos_drm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/exynos_drm.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/i915_drm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/i915_drm.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/radeon_drm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/radeon_drm.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/ttm/ttm_bo_api.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/ttm/ttm_bo_api.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/drm/ttm/ttm_bo_driver.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/drm/ttm/ttm_bo_driver.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/Kbuild</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/alarmtimer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/alarmtimer.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/amba/bus.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/amba/bus.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/amba/pl08x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/amba/pl08x.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/apple_bl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/apple_bl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/atmlec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/atmlec.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/basic_mmio_gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/basic_mmio_gpio.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/bcma/bcma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/bcma/bcma.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/bcma/bcma_driver_pci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/bcma/bcma_driver_pci.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/bio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/bio.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/blk_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/blk_types.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/blkdev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/blkdev.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/bootmem.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/bootmem.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/bug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/bug.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/capability.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/capability.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ceph/auth.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ceph/auth.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ceph/ceph_fs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ceph/ceph_fs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ceph/decode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ceph/decode.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ceph/messenger.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ceph/messenger.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ceph/osd_client.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ceph/osd_client.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ceph/osdmap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ceph/osdmap.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/cgroup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/cgroup.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/clk-private.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/clk-private.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/clk-provider.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/clk-provider.h</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/clk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/clk.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/clkdev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/clkdev.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/clockchips.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/clockchips.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/compat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/compat.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/cpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/cpu.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/cred.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/cred.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/crush/crush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/crush/crush.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/crush/mapper.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/crush/mapper.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/cs5535.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/cs5535.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dcache.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/dcache.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dcbnl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/dcbnl.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dccp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/dccp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/debugfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/debugfs.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/device.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/device.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dlm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/dlm.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dma-buf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/dma-buf.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/dma-contiguous.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/dma-contiguous.h</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dmaengine.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/dmaengine.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dmar.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/dmar.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/drbd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/drbd.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/drbd_limits.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/drbd_limits.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/drbd_nl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/drbd_nl.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dvb/frontend.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/dvb/frontend.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dvb/version.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/dvb/version.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/dynamic_debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/dynamic_debug.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/edac.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/edac.h</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/efi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/efi.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/elevator.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/elevator.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/errno.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/errno.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/etherdevice.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/etherdevice.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ethtool.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ethtool.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/eventfd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/eventfd.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/eventpoll.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/eventpoll.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/exportfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/exportfs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/extcon.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/extcon.h</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/extcon/extcon_gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/extcon/extcon_gpio.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/fb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/fb.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/filter.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/filter.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/firewire.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/firewire.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/fixp-arith.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/fixp-arith.h</a> (renamed from drivers/input/fixp-arith.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/frontswap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/frontswap.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/fs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/fs.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/fsl/mxs-dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/fsl/mxs-dma.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/fsl_devices.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/fsl_devices.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/fsnotify_backend.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/fsnotify_backend.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ftrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ftrace.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ftrace_event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ftrace_event.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/fuse.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/fuse.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/gameport.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/gameport.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/generic_serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/generic_serial.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/genetlink.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/genetlink.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/genhd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/genhd.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/gfp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/gfp.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/gpio.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/hid.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/hid.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/hidraw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/hidraw.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/huge_mm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/huge_mm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/hugetlb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/hugetlb.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/hyperv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/hyperv.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/i2c-mux-gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/i2c-mux-gpio.h</a> (renamed from include/linux/gpio-i2cmux.h)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/i2c-mux-pinctrl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/i2c-mux-pinctrl.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/i2c-mux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/i2c-mux.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/i2c-pnx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/i2c-pnx.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/i2c.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/i2c.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/i2c/adp5588.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/i2c/adp5588.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/i2c/twl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/i2c/twl.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/i2o-dev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/i2o-dev.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/ibmtr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ibmtr.h</a></td><td class='right'>373</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ieee80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ieee80211.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/if_arp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/if_arp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/if_ec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/if_ec.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/if_link.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/if_link.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/if_macvlan.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/if_macvlan.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/if_pppol2tp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/if_pppol2tp.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/if_pppox.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/if_pppox.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/if_team.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/if_team.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/if_tr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/if_tr.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/iio/buffer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iio/buffer.h</a> (renamed from drivers/staging/iio/buffer.h)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/iio/consumer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iio/consumer.h</a> (renamed from drivers/staging/iio/consumer.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/iio/driver.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iio/driver.h</a> (renamed from drivers/staging/iio/driver.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/iio/events.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iio/events.h</a> (renamed from drivers/staging/iio/events.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/iio/iio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iio/iio.h</a> (renamed from drivers/staging/iio/iio.h)</td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/iio/kfifo_buf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iio/kfifo_buf.h</a> (renamed from drivers/staging/iio/kfifo_buf.h)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/iio/machine.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iio/machine.h</a> (renamed from drivers/staging/iio/machine.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/iio/sysfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iio/sysfs.h</a> (renamed from drivers/staging/iio/sysfs.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/iio/trigger.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iio/trigger.h</a> (renamed from drivers/staging/iio/trigger.h)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/iio/trigger_consumer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iio/trigger_consumer.h</a> (renamed from drivers/staging/iio/trigger_consumer.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/iio/types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iio/types.h</a> (renamed from drivers/staging/iio/types.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/in6.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/in6.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/init_task.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/init_task.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/input/lm8333.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/input/lm8333.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/input/matrix_keypad.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/input/matrix_keypad.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/input/navpoint.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/input/navpoint.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/interrupt.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/interrupt.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/iocontext.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iocontext.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/iommu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/iommu.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ioport.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ioport.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ioprio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ioprio.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ip_vs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ip_vs.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ipc_namespace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ipc_namespace.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/irq.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/irqdomain.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/irqdomain.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/isdn.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/isdn.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/jbd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/jbd.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/jbd2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/jbd2.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/jbd_common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/jbd_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kallsyms.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/kallsyms.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/kcmp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/kcmp.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kernel-page-flags.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/kernel-page-flags.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kernel.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/kernel.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kexec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/kexec.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/key.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/key.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kmod.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/kmod.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kvm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/kvm.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/kvm_host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/kvm_host.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/l2tp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/l2tp.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/lcd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/lcd.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/led-lm3530.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/led-lm3530.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/leds.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/leds.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/lglock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/lglock.h</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/libata.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/libata.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/lockd/bind.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/lockd/bind.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/lockdep.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/lockdep.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mISDNhw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mISDNhw.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mISDNif.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mISDNif.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/mca-legacy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mca-legacy.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/mca.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mca.h</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/mdio-mux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mdio-mux.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/mei.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mei.h</a> (renamed from drivers/staging/mei/mei.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/memcontrol.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/memcontrol.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mempolicy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mempolicy.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/abx500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/abx500.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/mfd/abx500/ab5500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/abx500/ab5500.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/abx500/ab8500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/abx500/ab8500.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/anatop.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/anatop.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/asic3.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/asic3.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/da9052/da9052.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/da9052/da9052.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/mfd/db5500-prcmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/db5500-prcmu.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/dbx500-prcmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/dbx500-prcmu.h</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/mfd/lm3533.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/lm3533.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/mfd/lpc_ich.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/lpc_ich.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/mfd/max77693-private.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/max77693-private.h</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/mfd/max77693.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/max77693.h</a> (renamed from arch/arm/include/asm/hardware/ep7211.h)</td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/max8997.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/max8997.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/mc13xxx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/mc13xxx.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/mfd/palmas.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/palmas.h</a></td><td class='right'>2620</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 41.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 58.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/rc5t583.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/rc5t583.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/s5m87xx/s5m-core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/s5m87xx/s5m-core.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/s5m87xx/s5m-pmic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/s5m87xx/s5m-pmic.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/mfd/sta2x11-mfd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/sta2x11-mfd.h</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/stmpe.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/stmpe.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/tps65090.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/tps65090.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/tps6586x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/tps6586x.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/tps65910.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/tps65910.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/twl6040.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/twl6040.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/wm831x/core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/wm831x/core.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/wm831x/pdata.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/wm831x/pdata.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/wm8350/core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/wm8350/core.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/wm8400-private.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/wm8400-private.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/wm8994/core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/wm8994/core.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mfd/wm8994/registers.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mfd/wm8994/registers.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/micrel_phy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/micrel_phy.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mlx4/cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mlx4/cmd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mlx4/device.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mlx4/device.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mlx4/qp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mlx4/qp.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mm.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mm_inline.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mm_inline.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mm_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mm_types.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmc/card.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mmc/card.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmc/dw_mmc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mmc/dw_mmc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmc/host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mmc/host.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmc/mmc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mmc/mmc.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/mmc/mxs-mmc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mmc/mxs-mmc.h</a> (renamed from arch/arm/mach-mxs/include/mach/mmc.h)</td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmdebug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mmdebug.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mmzone.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mmzone.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mod_devicetable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mod_devicetable.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/moduleparam.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/moduleparam.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/msdos_fs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/msdos_fs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mtd/gpmi-nand.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mtd/gpmi-nand.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mtd/mtd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mtd/mtd.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mtd/nand.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mtd/nand.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mtd/ubi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mtd/ubi.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/mv643xx_eth.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/mv643xx_eth.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/neighbour.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/neighbour.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/net.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/net.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netdevice.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netdevice.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter/ipset/ip_set.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter/ipset/ip_set.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter/ipset/ip_set_ahash.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter/ipset/ip_set_ahash.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter/ipset/ip_set_timeout.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter/ipset/ip_set_timeout.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter/nf_conntrack_common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter/nf_conntrack_common.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter/nf_conntrack_h323_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter/nf_conntrack_h323_types.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter/nfnetlink.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter/nfnetlink.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/netfilter/xt_HMARK.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter/xt_HMARK.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter/xt_hashlimit.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter/xt_hashlimit.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter_bridge.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter_bridge.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter_ipv4/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter_ipv4/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/netfilter_ipv4/ip_queue.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter_ipv4/ip_queue.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netfilter_ipv6/ip6_tables.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netfilter_ipv6/ip6_tables.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/netlink.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/netlink.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/nfc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfc/pn544.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/nfc/pn544.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfs4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/nfs4.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfs_fs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/nfs_fs.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfs_fs_sb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/nfs_fs_sb.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfs_page.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/nfs_page.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfs_xdr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/nfs_xdr.h</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nfsd/export.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/nfsd/export.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nl80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/nl80211.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/nl802154.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/nl802154.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/of.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/of.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/of_gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/of_gpio.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/of_i2c.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/of_i2c.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/of_irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/of_irq.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/of_mdio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/of_mdio.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/of_pci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/of_pci.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/of_serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/of_serial.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/of_spi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/of_spi.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/oom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/oom.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/page-isolation.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/page-isolation.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pagemap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pagemap.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pci.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pci_ids.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pci_ids.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/percpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/percpu.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/perf_event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/perf_event.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/phy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/phy.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pid_namespace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pid_namespace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pinctrl/consumer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pinctrl/consumer.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pinctrl/machine.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pinctrl/machine.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pinctrl/pinconf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pinctrl/pinconf.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pinctrl/pinctrl-state.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pinctrl/pinctrl-state.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pinctrl/pinctrl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pinctrl/pinctrl.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pinctrl/pinmux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pinctrl/pinmux.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pkt_sched.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pkt_sched.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/platform_data/at91_adc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/platform_data/at91_adc.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/platform_data/ehci-sh.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/platform_data/ehci-sh.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/platform_data/emif_plat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/platform_data/emif_plat.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/platform_data/gpio-em.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/platform_data/gpio-em.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/platform_data/ina2xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/platform_data/ina2xx.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/platform_data/s3c-hsotg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/platform_data/s3c-hsotg.h</a> (renamed from arch/arm/plat-samsung/include/plat/udc-hs.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/platform_data/tegra_usb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/platform_data/tegra_usb.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/platform_data/wiznet.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/platform_data/wiznet.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pm_domain.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pm_domain.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pm_runtime.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pm_runtime.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/pm_wakeup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pm_wakeup.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/power/charger-manager.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/power/charger-manager.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/power/max17042_battery.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/power/max17042_battery.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/power_supply.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/power_supply.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/prctl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/prctl.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/printk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/printk.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/proc_fs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/proc_fs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/pstore_ram.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/pstore_ram.h</a> (renamed from drivers/staging/android/persistent_ram.h)</td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ptp_clock_kernel.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ptp_clock_kernel.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/quotaops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/quotaops.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/radix-tree.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/radix-tree.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/raid/md_p.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/raid/md_p.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/raid/pq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/raid/pq.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/ramoops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ramoops.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rational.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/rational.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rculist.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/rculist.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rcupdate.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/rcupdate.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rcutiny.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/rcutiny.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rcutree.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/rcutree.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/regmap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/regmap.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/regulator/driver.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/regulator/driver.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/regulator/fixed.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/regulator/fixed.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/regulator/of_regulator.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/regulator/of_regulator.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/regulator/tps62360.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/regulator/tps62360.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/regulator/tps65090-regulator.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/regulator/tps65090-regulator.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/res_counter.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/res_counter.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ring_buffer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ring_buffer.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/rio.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rio_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/rio_drv.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rmap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/rmap.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/rndis.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/rndis.h</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rtc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/rtc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/rtc/ds1307.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/rtc/ds1307.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/rtnetlink.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/rtnetlink.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sched.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/sched.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/security.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/security.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/seqlock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/seqlock.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/serial.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/serial_8250.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/serial_8250.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/serial_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/serial_core.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/serial_sci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/serial_sci.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/serio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/serio.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sh_clk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/sh_clk.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sh_intc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/sh_intc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/shmem_fs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/shmem_fs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/signal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/signal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/skbuff.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/skbuff.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/slab.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/slab.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/smp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/smp.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sock_diag.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/sock_diag.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/socket.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/socket.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/spi/eeprom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/spi/eeprom.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/spi/orion_spi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/spi/orion_spi.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/spi/rspi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/spi/rspi.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/srcu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/srcu.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ssb/ssb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ssb/ssb.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ssb/ssb_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ssb/ssb_regs.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/stat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/stat.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/stmmac.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/stmmac.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/stmp_device.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/stmp_device.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sunrpc/svc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/sunrpc/svc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sunrpc/svcauth.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/sunrpc/svcauth.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sunrpc/svcauth_gss.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/sunrpc/svcauth_gss.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/suspend.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/suspend.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/swap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/swap.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/swapfile.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/swapfile.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/syscalls.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/syscalls.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/sysfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/sysfs.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/task_work.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/task_work.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/tcp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/tcp.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/thread_info.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/ti_wilink_st.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/ti_wilink_st.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/time.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/time.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/topology.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/tracehook.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/tracehook.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/trdevice.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/trdevice.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/tty_ldisc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/tty_ldisc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/uidgid.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/uidgid.h</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/uprobes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/uprobes.h</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/ch11.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb/ch11.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/ch9.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb/ch9.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/usb/chipidea.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb/chipidea.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/composite.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb/composite.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/functionfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb/functionfs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/gpio_vbus.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb/gpio_vbus.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/hcd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb/hcd.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/usb/isp1301.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb/isp1301.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/include/linux/usb/langwell_udc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb/langwell_udc.h</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.9%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/rndis_host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb/rndis_host.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb/serial.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/usb/usbnet.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/usb/usbnet.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/user_namespace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/user_namespace.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/uuid.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/uuid.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/linux/v4l2-dv-timings.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/v4l2-dv-timings.h</a></td><td class='right'>816</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/v4l2-subdev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/v4l2-subdev.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/vga_switcheroo.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/vga_switcheroo.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/vgaarb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/vgaarb.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/videodev2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/videodev2.h</a></td><td class='right'>372</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/virtio_config.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/virtio_config.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/virtio_net.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/virtio_net.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/linux/vme.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/vme.h</a> (renamed from drivers/staging/vme/vme.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/vt_kern.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/vt_kern.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/watchdog.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/watchdog.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/linux/writeback.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/linux/writeback.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/media-entity.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/media-entity.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/mt9p031.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/mt9p031.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/omap3isp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/omap3isp.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/rc-map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/rc-map.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/s5p_fimc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/s5p_fimc.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/saa7146.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/saa7146.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/saa7146_vv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/saa7146_vv.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/sh_mobile_ceu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/sh_mobile_ceu.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/media/smiapp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/smiapp.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/soc_camera.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/soc_camera.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/soc_mediabus.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/soc_mediabus.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/v4l2-ctrls.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/v4l2-ctrls.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/v4l2-dev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/v4l2-dev.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/v4l2-event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/v4l2-event.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/v4l2-ioctl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/v4l2-ioctl.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/v4l2-subdev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/v4l2-subdev.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/media/videobuf-dma-contig.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/media/videobuf-dma-contig.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/memory/jedec_ddr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/memory/jedec_ddr.h</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/mtd/ubi-user.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/mtd/ubi-user.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/addrconf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/addrconf.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/af_unix.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/af_unix.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ax25.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/ax25.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/bluetooth/bluetooth.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/bluetooth/bluetooth.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/bluetooth/hci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/bluetooth/hci.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/bluetooth/hci_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/bluetooth/hci_core.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/bluetooth/l2cap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/bluetooth/l2cap.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/bluetooth/mgmt.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/bluetooth/mgmt.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/bluetooth/smp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/bluetooth/smp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/caif/caif_hsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/caif/caif_hsi.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/caif/cfpkt.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/caif/cfpkt.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/cfg80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/cfg80211.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/cipso_ipv4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/cipso_ipv4.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/net/codel.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/codel.h</a></td><td class='right'>342</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/compat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/compat.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/dcbnl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/dcbnl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/dn.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/dn.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/dn_fib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/dn_fib.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/dn_route.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/dn_route.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/dst.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/dst.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/dst_ops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/dst_ops.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/icmp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/icmp.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ieee802154_netdev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/ieee802154_netdev.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/if_inet6.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/if_inet6.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/inet6_connection_sock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/inet6_connection_sock.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/inet_connection_sock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/inet_connection_sock.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/inet_frag.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/inet_frag.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ip.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/ip.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ip6_route.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/ip6_route.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ip_fib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/ip_fib.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ip_vs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/ip_vs.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ipip.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/ipip.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ipv6.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/ipv6.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/lapb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/lapb.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/llc_c_ev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/llc_c_ev.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/llc_pdu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/llc_pdu.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/mac80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/mac80211.h</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/net/mac802154.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/mac802154.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/ndisc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/ndisc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/neighbour.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/neighbour.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/net_namespace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/net_namespace.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netfilter/nf_conntrack.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/netfilter/nf_conntrack.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netfilter/nf_conntrack_helper.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/netfilter/nf_conntrack_helper.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netfilter/nf_conntrack_l3proto.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/netfilter/nf_conntrack_l3proto.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netlink.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/netlink.h</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netns/conntrack.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/netns/conntrack.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netns/hash.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/netns/hash.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/netns/ipv6.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/netns/ipv6.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/net/nfc/hci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/nfc/hci.h</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/nfc/nfc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/nfc/nfc.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/net/nfc/shdlc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/nfc/shdlc.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/pkt_sched.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/pkt_sched.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/rawv6.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/rawv6.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/route.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/route.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/rtnetlink.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/rtnetlink.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/sctp/sctp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/sctp/sctp.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/sctp/structs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/sctp/structs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/sock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/sock.h</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/tcp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/tcp.h</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/tcp_memcontrol.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/tcp_memcontrol.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/udp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/udp.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/wimax.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/wimax.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/wpan-phy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/wpan-phy.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/x25.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/x25.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/net/xfrm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/net/xfrm.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/rdma/ib_mad.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/rdma/ib_mad.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/rdma/ib_verbs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/rdma/ib_verbs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/scsi/fcoe_sysfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/scsi/fcoe_sysfs.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/scsi/iscsi_proto.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/scsi/iscsi_proto.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/scsi/libfcoe.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/scsi/libfcoe.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/scsi/libsas.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/scsi/libsas.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/scsi/sas.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/scsi/sas.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/scsi/sas_ata.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/scsi/sas_ata.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/sound/asound.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/sound/asound.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/sound/asoundef.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/sound/asoundef.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/sound/cs42l52.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/sound/cs42l52.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/sound/max98095.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/sound/max98095.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/sound/sh_fsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/sound/sh_fsi.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/sound/simple_card.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/sound/simple_card.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/sound/soc-dai.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/sound/soc-dai.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/sound/soc-dapm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/sound/soc-dapm.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/sound/soc-dpcm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/sound/soc-dpcm.h</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/sound/soc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/sound/soc.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/target/target_core_backend.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/target/target_core_backend.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/target/target_core_base.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/target/target_core_base.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/target/target_core_fabric.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/target/target_core_fabric.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/asoc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/trace/events/asoc.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/ext3.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/trace/events/ext3.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/ext4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/trace/events/ext4.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/jbd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/trace/events/jbd.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/power.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/trace/events/power.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/rcu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/trace/events/rcu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/vmscan.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/trace/events/vmscan.h</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/workqueue.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/trace/events/workqueue.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/trace/events/writeback.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/trace/events/writeback.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/video/auo_k190xfb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/video/auo_k190xfb.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/video/exynos_dp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/video/exynos_dp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/video/exynos_mipi_dsim.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/video/exynos_mipi_dsim.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/video/omap-panel-nokia-dsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/video/omap-panel-nokia-dsi.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/include/video/omap-panel-tfp410.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/video/omap-panel-tfp410.h</a> (renamed from include/video/omap-panel-dvi.h)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/video/omapdss.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/video/omapdss.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/video/sh_mobile_hdmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/video/sh_mobile_hdmi.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/video/vga.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/video/vga.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/include/xen/acpi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/xen/acpi.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/xen/events.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/xen/events.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/xen/grant_table.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/xen/grant_table.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/include/xen/xenbus_dev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>include/xen/xenbus_dev.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/init/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>init/Kconfig</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/init/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>init/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/init/do_mounts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>init/do_mounts.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/init/do_mounts_initrd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>init/do_mounts_initrd.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/init/do_mounts_md.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>init/do_mounts_md.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/init/do_mounts_rd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>init/do_mounts_rd.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/init/init_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>init/init_task.c</a> (renamed from arch/alpha/kernel/init_task.c)</td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/init/initramfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>init/initramfs.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/init/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>init/main.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/ipc/mq_sysctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>ipc/mq_sysctl.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/ipc/mqueue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>ipc/mqueue.c</a></td><td class='right'>304</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/ipc/namespace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>ipc/namespace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/ipc/shm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>ipc/shm.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/capability.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/capability.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/cgroup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/cgroup.c</a></td><td class='right'>607</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 90.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/cgroup_freezer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/cgroup_freezer.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/compat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/compat.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/cpu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/cpu.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/cpu_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/cpu_pm.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/cpuset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/cpuset.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/cred.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/cred.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/events/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/events/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/events/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/events/core.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/events/uprobes.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/events/uprobes.c</a></td><td class='right'>1667</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 73.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/exit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/exit.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/extable.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/extable.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/fork.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/fork.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/groups.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/groups.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/hung_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/hung_task.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/chip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/irq/chip.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/internals.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/irq/internals.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/irqdesc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/irq/irqdesc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/irqdomain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/irq/irqdomain.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/manage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/irq/manage.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/migration.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/irq/migration.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/irq/pm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/irq/resend.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/irq/resend.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/kallsyms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/kallsyms.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/kcmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/kcmp.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/kfifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/kfifo.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/kmod.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/kmod.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/lglock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/lglock.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/module.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/module.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/params.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/params.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/pid.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/pid.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/pid_namespace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/pid_namespace.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/power/Kconfig</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/power/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/power/autosleep.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/power/autosleep.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/hibernate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/power/hibernate.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/power/main.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/power.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/power/power.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/power/swap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/power/swap.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/power/wakelock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/power/wakelock.c</a></td><td class='right'>259</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/printk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/printk.c</a></td><td class='right'>1390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.3%;'/><td class='rem' style='width: 6.7%;'/><td class='none' style='width: 78.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/ptrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/ptrace.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcupdate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/rcupdate.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcutiny_plugin.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/rcutiny_plugin.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcutorture.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/rcutorture.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcutree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/rcutree.c</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcutree.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/rcutree.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcutree_plugin.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/rcutree_plugin.h</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/rcutree_trace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/rcutree_trace.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/res_counter.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/res_counter.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/resource.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/resource.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/sched/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/sched/core.c</a></td><td class='right'>645</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 89.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/sched/debug.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/fair.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/sched/fair.c</a></td><td class='right'>533</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 6.3%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/idle_task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/sched/idle_task.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/rt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/sched/rt.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sched/sched.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/sched/sched.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/semaphore.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/semaphore.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/signal.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/smp.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/smpboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/smpboot.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/smpboot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/smpboot.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/srcu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/srcu.c</a></td><td class='right'>548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/sys.c</a></td><td class='right'>487</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/sys_ni.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/sys_ni.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/task_work.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/task_work.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/time/Kconfig</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/alarmtimer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/time/alarmtimer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/clockevents.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/time/clockevents.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/ntp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/time/ntp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/tick-sched.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/time/tick-sched.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/time/timekeeping.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/time/timekeeping.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/timer.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/ftrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/ftrace.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/ring_buffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/ring_buffer.c</a></td><td class='right'>590</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/trace.c</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/trace.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_events.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/trace_events.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_export.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/trace_export.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_kprobe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/trace_kprobe.c</a></td><td class='right'>899</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 13.9%;'/><td class='none' style='width: 85.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/trace/trace_printk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/trace_printk.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/trace/trace_probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/trace_probe.c</a></td><td class='right'>839</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/trace/trace_probe.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/trace_probe.h</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/kernel/trace/trace_uprobe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/trace_uprobe.c</a></td><td class='right'>788</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/kernel/trace/trace_workqueue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/trace/trace_workqueue.c</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/uid16.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/uid16.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/user.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/user.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/user_namespace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/user_namespace.c</a></td><td class='right'>595</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/utsname.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/utsname.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/watchdog.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/watchdog.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/kernel/workqueue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>kernel/workqueue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/Kconfig.debug?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/Kconfig.debug</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/bitmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/bitmap.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/btree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/btree.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/debugobjects.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/debugobjects.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/dma-debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/dma-debug.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/dynamic_debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/dynamic_debug.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/dynamic_queue_limits.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/dynamic_queue_limits.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/lib/jedec_ddr_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/jedec_ddr_data.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/kobject.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/kobject.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/list_debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/list_debug.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/radix-tree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/radix-tree.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/raid6/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/raid6/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/raid6/algos.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/raid6/algos.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/raid6/mktables.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/raid6/mktables.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/raid6/recov.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/raid6/recov.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/lib/raid6/recov_ssse3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/raid6/recov_ssse3.c</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/raid6/test/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/raid6/test/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/raid6/test/test.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/raid6/test/test.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/raid6/x86.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/raid6/x86.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/rational.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/rational.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/spinlock_debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/spinlock_debug.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/lib/stmp_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/stmp_device.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/string_helpers.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/string_helpers.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/lib/strncpy_from_user.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/strncpy_from_user.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/lib/strnlen_user.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/strnlen_user.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/swiotlb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/swiotlb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/test-kstrtox.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/test-kstrtox.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/lib/vsprintf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>lib/vsprintf.c</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/bootmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/bootmem.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/cleancache.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/cleancache.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/compaction.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/compaction.c</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/filemap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/filemap.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/filemap_xip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/filemap_xip.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/mm/frontswap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/frontswap.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/huge_memory.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/huge_memory.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/hugetlb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/hugetlb.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/internal.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/madvise.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/madvise.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/memblock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/memblock.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/memcontrol.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/memcontrol.c</a></td><td class='right'>765</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 87.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/memory-failure.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/memory-failure.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/memory.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/memory.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/memory_hotplug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/memory_hotplug.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/mempolicy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/mempolicy.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/migrate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/migrate.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/mmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/mmap.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/mmzone.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/mmzone.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/mremap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/mremap.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/nobootmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/nobootmem.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/nommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/nommu.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/oom_kill.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/oom_kill.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/page-writeback.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/page-writeback.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/page_alloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/page_alloc.c</a></td><td class='right'>492</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/page_io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/page_io.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/page_isolation.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/page_isolation.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/percpu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/percpu.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/pgtable-generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/pgtable-generic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/process_vm_access.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/process_vm_access.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/readahead.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/readahead.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/rmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/rmap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/shmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/shmem.c</a></td><td class='right'>560</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/slub.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/slub.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/sparse.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/sparse.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/swap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/swap.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/swapfile.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/swapfile.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/mm/thrash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/thrash.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/truncate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/truncate.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/util.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/util.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/vmalloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/vmalloc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/vmscan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/vmscan.c</a></td><td class='right'>738</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 8.4%;'/><td class='none' style='width: 88.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/mm/vmstat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>mm/vmstat.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/802/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/802/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/802/fc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/802/fc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/802/fddi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/802/fddi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/802/garp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/802/garp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/802/hippi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/802/hippi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/802/p8022.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/802/p8022.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/802/stp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/802/stp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/net/802/tr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/802/tr.c</a></td><td class='right'>676</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.7%;'/><td class='none' style='width: 89.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/8021q/vlan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/8021q/vlan.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/8021q/vlan_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/8021q/vlan_core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/8021q/vlan_dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/8021q/vlan_dev.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/8021q/vlan_netlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/8021q/vlan_netlink.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/9p/client.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/9p/client.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/9p/trans_fd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/9p/trans_fd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/9p/trans_virtio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/9p/trans_virtio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/appletalk/ddp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/appletalk/ddp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/appletalk/sysctl_net_atalk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/appletalk/sysctl_net_atalk.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/atm/br2684.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/atm/br2684.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/atm/ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/atm/ioctl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/atm/lec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/atm/lec.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/atm/lec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/atm/lec.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/atm/mpc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/atm/mpc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/atm/mpoa_proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/atm/mpoa_proc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/atm/pppoatm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/atm/pppoatm.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/atm/signaling.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/atm/signaling.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ax25/af_ax25.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ax25/af_ax25.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ax25/ax25_dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ax25/ax25_dev.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ax25/ax25_ip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ax25/ax25_ip.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ax25/sysctl_net_ax25.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ax25/sysctl_net_ax25.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/Kconfig</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/bat_debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/bat_debugfs.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/bat_iv_ogm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/bat_iv_ogm.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/bat_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/bat_sysfs.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/bitarray.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/bitarray.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/bitarray.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/bitarray.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/batman-adv/bridge_loop_avoidance.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/bridge_loop_avoidance.c</a></td><td class='right'>1580</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/batman-adv/bridge_loop_avoidance.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/bridge_loop_avoidance.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/gateway_client.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/gateway_client.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/hard-interface.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/hard-interface.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/icmp_socket.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/icmp_socket.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/main.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/main.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/main.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/originator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/originator.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/originator.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/originator.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/packet.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/packet.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/routing.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/routing.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/routing.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/routing.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/send.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/send.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/soft-interface.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/soft-interface.c</a></td><td class='right'>500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 7.5%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/soft-interface.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/soft-interface.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/translation-table.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/translation-table.c</a></td><td class='right'>460</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/translation-table.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/translation-table.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/types.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/unicast.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/unicast.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/batman-adv/vis.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/batman-adv/vis.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/af_bluetooth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/af_bluetooth.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/bnep/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/bnep/core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/hci_conn.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/hci_conn.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/hci_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/hci_core.c</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/hci_event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/hci_event.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/hci_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/hci_sysfs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/hidp/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/hidp/core.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/l2cap_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/l2cap_core.c</a></td><td class='right'>765</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.6%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 87.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/l2cap_sock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/l2cap_sock.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/mgmt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/mgmt.c</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/rfcomm/sock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/rfcomm/sock.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/rfcomm/tty.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/rfcomm/tty.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/sco.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/sco.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bluetooth/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bluetooth/smp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_device.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_fdb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_fdb.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_forward.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_forward.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_input.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_multicast.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_multicast.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_netfilter.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_netfilter.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_netlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_netlink.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_private.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_private.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_private_stp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_private_stp.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_stp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_stp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_stp_bpdu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_stp_bpdu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_stp_if.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_stp_if.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_stp_timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_stp_timer.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/br_sysfs_br.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/br_sysfs_br.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/bridge/netfilter/ebt_stp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/bridge/netfilter/ebt_stp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/caif/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/caif/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/caif/caif_socket.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/caif/caif_socket.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/caif/cfctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/caif/cfctrl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/caif/cfpkt_skbuff.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/caif/cfpkt_skbuff.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/caif/cfsrvl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/caif/cfsrvl.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/caif/chnl_net.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/caif/chnl_net.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/can/gw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/can/gw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/auth_none.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ceph/auth_none.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/auth_x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ceph/auth_x.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/auth_x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ceph/auth_x.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/ceph_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ceph/ceph_common.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/ceph_hash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ceph/ceph_hash.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/crush/crush.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ceph/crush/crush.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/crush/mapper.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ceph/crush/mapper.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ceph/debugfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/messenger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ceph/messenger.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/mon_client.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ceph/mon_client.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/osd_client.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ceph/osd_client.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ceph/osdmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ceph/osdmap.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/compat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/compat.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/datagram.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/datagram.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/dev.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/dev_addr_lists.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/dev_addr_lists.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/drop_monitor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/drop_monitor.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/ethtool.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/fib_rules.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/fib_rules.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/filter.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/filter.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/gen_stats.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/gen_stats.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/net/core/kmap_skb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/kmap_skb.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/neighbour.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/neighbour.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/net-sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/net-sysfs.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/net_namespace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/net_namespace.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/netprio_cgroup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/netprio_cgroup.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/pktgen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/pktgen.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/rtnetlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/rtnetlink.c</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/skbuff.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/skbuff.c</a></td><td class='right'>446</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/sock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/sock.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/sock_diag.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/sock_diag.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/sysctl_net_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/sysctl_net_core.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/core/utils.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/core/utils.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dcb/dcbnl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/dcb/dcbnl.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dccp/ccids/ccid3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/dccp/ccids/ccid3.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dccp/dccp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/dccp/dccp.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dccp/input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/dccp/input.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dccp/ipv4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/dccp/ipv4.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dccp/ipv6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/dccp/ipv6.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dccp/proto.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/dccp/proto.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dccp/sysctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/dccp/sysctl.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/decnet/af_decnet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/decnet/af_decnet.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/decnet/dn_dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/decnet/dn_dev.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/decnet/dn_fib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/decnet/dn_fib.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/decnet/dn_neigh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/decnet/dn_neigh.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/decnet/dn_nsp_in.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/decnet/dn_nsp_in.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/decnet/dn_nsp_out.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/decnet/dn_nsp_out.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/decnet/dn_route.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/decnet/dn_route.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/decnet/dn_rules.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/decnet/dn_rules.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/decnet/dn_table.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/decnet/dn_table.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/decnet/netfilter/dn_rtmsg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/decnet/netfilter/dn_rtmsg.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/decnet/sysctl_net_decnet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/decnet/sysctl_net_decnet.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dns_resolver/dns_key.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/dns_resolver/dns_key.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dns_resolver/internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/dns_resolver/internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/dsa/slave.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/dsa/slave.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/net/econet/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/econet/Kconfig</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/net/econet/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/econet/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/net/econet/af_econet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/econet/af_econet.c</a></td><td class='right'>1172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 18.5%;'/><td class='none' style='width: 81.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ethernet/eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ethernet/eth.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/6lowpan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ieee802154/6lowpan.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/6lowpan.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ieee802154/6lowpan.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/dgram.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ieee802154/dgram.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/nl-mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ieee802154/nl-mac.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/nl-phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ieee802154/nl-phy.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ieee802154/raw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ieee802154/raw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/af_inet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/af_inet.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ah4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/ah4.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/arp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/arp.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/devinet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/devinet.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/esp4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/esp4.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/fib_frontend.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/fib_frontend.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/fib_rules.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/fib_rules.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/fib_semantics.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/fib_semantics.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/fib_trie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/fib_trie.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/icmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/icmp.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/igmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/igmp.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/inet_connection_sock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/inet_connection_sock.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/inet_diag.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/inet_diag.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/inet_hashtables.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/inet_hashtables.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/inet_timewait_sock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/inet_timewait_sock.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_forward.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/ip_forward.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_fragment.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/ip_fragment.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_gre.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/ip_gre.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/ip_input.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_options.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/ip_options.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_output.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/ip_output.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ip_sockglue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/ip_sockglue.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ipconfig.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/ipconfig.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ipip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/ipip.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ipmr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/ipmr.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/netfilter.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/netfilter/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/arp_tables.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/netfilter/arp_tables.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/net/ipv4/netfilter/ip_queue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/netfilter/ip_queue.c</a></td><td class='right'>639</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.1%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/ip_tables.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/netfilter/ip_tables.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/ipt_CLUSTERIP.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/netfilter/ipt_CLUSTERIP.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/nf_conntrack_proto_icmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/netfilter/nf_conntrack_proto_icmp.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/nf_nat_h323.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/netfilter/nf_nat_h323.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/nf_nat_sip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/netfilter/nf_nat_sip.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/netfilter/nf_nat_snmp_basic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/netfilter/nf_nat_snmp_basic.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/ping.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/ping.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/raw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/raw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/route.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/route.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/sysctl_net_ipv4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/sysctl_net_ipv4.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/tcp.c</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_cong.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/tcp_cong.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_hybla.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/tcp_hybla.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/tcp_input.c</a></td><td class='right'>630</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_ipv4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/tcp_ipv4.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_memcontrol.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/tcp_memcontrol.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_minisocks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/tcp_minisocks.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_output.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/tcp_output.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/tcp_probe.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/tcp_timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/tcp_timer.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/udp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/udp.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/udp_diag.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/udp_diag.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/udp_impl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/udp_impl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv4/xfrm4_policy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv4/xfrm4_policy.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/addrconf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/addrconf.c</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/addrconf_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/addrconf_core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/addrlabel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/addrlabel.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/af_inet6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/af_inet6.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ah6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/ah6.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/anycast.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/anycast.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/datagram.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/datagram.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/esp6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/esp6.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/exthdrs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/exthdrs.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/exthdrs_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/exthdrs_core.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/fib6_rules.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/fib6_rules.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/icmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/icmp.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/inet6_connection_sock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/inet6_connection_sock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ip6_fib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/ip6_fib.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ip6_flowlabel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/ip6_flowlabel.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ip6_input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/ip6_input.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ip6_output.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/ip6_output.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ip6_tunnel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/ip6_tunnel.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ip6mr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/ip6mr.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ipcomp6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/ipcomp6.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ipv6_sockglue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/ipv6_sockglue.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/mcast.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/mcast.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/mip6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/mip6.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/ndisc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/ndisc.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/net/ipv6/netfilter/ip6_queue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/ip6_queue.c</a></td><td class='right'>641</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.1%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/ip6_tables.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/ip6_tables.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/ip6t_REJECT.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/ip6t_REJECT.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/ip6t_ah.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/ip6t_ah.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/ip6t_frag.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/ip6t_frag.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/ip6t_hbh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/ip6t_hbh.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/ip6t_rt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/ip6t_rt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/ip6table_mangle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/ip6table_mangle.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/nf_conntrack_proto_icmpv6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/nf_conntrack_proto_icmpv6.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/netfilter/nf_conntrack_reasm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/netfilter/nf_conntrack_reasm.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/raw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/raw.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/reassembly.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/reassembly.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/route.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/route.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/sit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/sit.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/sysctl_net_ipv6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/sysctl_net_ipv6.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/tcp_ipv6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/tcp_ipv6.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/tunnel6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/tunnel6.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/udp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/udp.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/xfrm6_policy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/xfrm6_policy.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipv6/xfrm6_tunnel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipv6/xfrm6_tunnel.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipx/af_ipx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipx/af_ipx.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/ipx/sysctl_net_ipx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/ipx/sysctl_net_ipx.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/irda/ircomm/ircomm_tty_ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/irda/ircomm/ircomm_tty_ioctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/irda/irsysctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/irda/irsysctl.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/key/af_key.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/key/af_key.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/l2tp/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/l2tp/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/l2tp/l2tp_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/l2tp/l2tp_core.c</a></td><td class='right'>525</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/l2tp/l2tp_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/l2tp/l2tp_core.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/l2tp/l2tp_debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/l2tp/l2tp_debugfs.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/l2tp/l2tp_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/l2tp/l2tp_eth.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/l2tp/l2tp_ip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/l2tp/l2tp_ip.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/l2tp/l2tp_ip6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/l2tp/l2tp_ip6.c</a></td><td class='right'>803</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/l2tp/l2tp_netlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/l2tp/l2tp_netlink.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/l2tp/l2tp_ppp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/l2tp/l2tp_ppp.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/lapb/lapb_iface.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/lapb/lapb_iface.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/lapb/lapb_in.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/lapb/lapb_in.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/lapb/lapb_out.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/lapb/lapb_out.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/lapb/lapb_subr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/lapb/lapb_subr.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/lapb/lapb_timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/lapb/lapb_timer.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/llc/af_llc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/llc/af_llc.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/llc/llc_conn.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/llc/llc_conn.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/llc/llc_output.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/llc/llc_output.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/llc/llc_sap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/llc/llc_sap.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/llc/sysctl_net_llc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/llc/sysctl_net_llc.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/agg-rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/agg-rx.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/agg-tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/agg-tx.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/cfg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/cfg.c</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/chan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/chan.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/debugfs_netdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/debugfs_netdev.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/debugfs_sta.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/debugfs_sta.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/driver-ops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/driver-ops.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/driver-trace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/driver-trace.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/ht.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/ht.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/ibss.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/ibss.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/ieee80211_i.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/ieee80211_i.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/iface.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/iface.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/main.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/mesh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/mesh.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/mesh.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/mesh.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/mesh_hwmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/mesh_hwmp.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/mesh_pathtbl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/mesh_pathtbl.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/mesh_plink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/mesh_plink.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/mac80211/mesh_sync.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/mesh_sync.c</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/mlme.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/mlme.c</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/pm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/rate.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/rate.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/rc80211_minstrel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/rc80211_minstrel.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/rc80211_minstrel_ht.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/rc80211_minstrel_ht.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/rx.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/scan.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/sta_info.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/sta_info.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/sta_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/sta_info.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/status.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/status.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/tx.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/util.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/util.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/wep.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/wep.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/wme.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/wme.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/wme.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/wme.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/work.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/work.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/mac80211/wpa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac80211/wpa.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/mac802154/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac802154/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/mac802154/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac802154/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/mac802154/ieee802154_dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac802154/ieee802154_dev.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/mac802154/mac802154.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac802154/mac802154.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/mac802154/mac_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac802154/mac_cmd.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/mac802154/mib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac802154/mib.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/mac802154/monitor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac802154/monitor.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/mac802154/rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac802154/rx.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/mac802154/tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/mac802154/tx.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/core.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_bitmap_ip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipset/ip_set_bitmap_ip.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_bitmap_ipmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipset/ip_set_bitmap_ipmac.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_bitmap_port.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipset/ip_set_bitmap_port.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipset/ip_set_core.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_ip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipset/ip_set_hash_ip.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_ipport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipset/ip_set_hash_ipport.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_ipportip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipset/ip_set_hash_ipportip.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_ipportnet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipset/ip_set_hash_ipportnet.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_net.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipset/ip_set_hash_net.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_netiface.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipset/ip_set_hash_netiface.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_hash_netport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipset/ip_set_hash_netport.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipset/ip_set_list_set.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipset/ip_set_list_set.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_app.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_app.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_conn.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_conn.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_core.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_ctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_ctl.c</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_dh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_dh.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_ftp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_ftp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_lblc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_lblc.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_lblcr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_lblcr.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_proto.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_proto.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_proto_sctp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_proto_sctp.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_proto_tcp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_proto_tcp.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_proto_udp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_proto_udp.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_sh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_sh.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_sync.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_sync.c</a></td><td class='right'>668</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 89.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/ipvs/ip_vs_wrr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/ipvs/ip_vs_wrr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_acct.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_acct.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_amanda.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_amanda.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_core.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_ecache.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_ecache.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_expect.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_expect.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_h323_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_h323_main.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_helper.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_helper.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_irc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_irc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_netlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_netlink.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_proto.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_proto.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_proto_dccp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_proto_dccp.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_proto_generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_proto_generic.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_proto_gre.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_proto_gre.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_proto_sctp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_proto_sctp.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_proto_tcp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_proto_tcp.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_proto_udp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_proto_udp.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_proto_udplite.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_proto_udplite.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_standalone.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_standalone.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_conntrack_timestamp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_conntrack_timestamp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nf_log.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nf_log.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nfnetlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nfnetlink.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nfnetlink_acct.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nfnetlink_acct.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nfnetlink_cttimeout.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nfnetlink_cttimeout.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nfnetlink_log.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nfnetlink_log.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/nfnetlink_queue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/nfnetlink_queue.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_CT.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/xt_CT.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/netfilter/xt_HMARK.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/xt_HMARK.c</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_TCPMSS.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/xt_TCPMSS.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_TEE.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/xt_TEE.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_TPROXY.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/xt_TPROXY.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_hashlimit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/xt_hashlimit.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_limit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/xt_limit.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/xt_mac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_recent.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/xt_recent.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_set.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/xt_set.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netfilter/xt_socket.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netfilter/xt_socket.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netlink/af_netlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netlink/af_netlink.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netlink/genetlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netlink/genetlink.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netrom/nr_dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netrom/nr_dev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/netrom/sysctl_net_netrom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/netrom/sysctl_net_netrom.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/core.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/nfc/hci/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/hci/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/nfc/hci/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/hci/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/nfc/hci/command.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/hci/command.c</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/nfc/hci/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/hci/core.c</a></td><td class='right'>798</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/nfc/hci/hci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/hci/hci.h</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/nfc/hci/hcp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/hci/hcp.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/nfc/hci/shdlc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/hci/shdlc.c</a></td><td class='right'>957</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/llcp/commands.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/llcp/commands.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/llcp/llcp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/llcp/llcp.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/llcp/sock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/llcp/sock.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/nci/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/nci/core.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/nci/data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/nci/data.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/nci/lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/nci/lib.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/nci/ntf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/nci/ntf.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/netlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/netlink.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/nfc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/nfc.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/nfc/rawsock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/nfc/rawsock.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/openvswitch/datapath.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/openvswitch/datapath.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/openvswitch/flow.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/openvswitch/flow.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/openvswitch/vport-netdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/openvswitch/vport-netdev.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/packet/af_packet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/packet/af_packet.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/phonet/af_phonet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/phonet/af_phonet.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/phonet/pep.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/phonet/pep.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/phonet/pn_dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/phonet/pn_dev.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/phonet/pn_netlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/phonet/pn_netlink.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/phonet/socket.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/phonet/socket.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/phonet/sysctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/phonet/sysctl.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/ib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rds/ib.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/ib_sysctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rds/ib_sysctl.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/iw_sysctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rds/iw_sysctl.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/sysctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rds/sysctl.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rds/tcp_listen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rds/tcp_listen.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rose/rose_dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rose/rose_dev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rose/rose_subr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rose/rose_subr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rose/sysctl_net_rose.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rose/sysctl_net_rose.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rxrpc/af_rxrpc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rxrpc/af_rxrpc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rxrpc/ar-ack.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rxrpc/ar-ack.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rxrpc/ar-call.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rxrpc/ar-call.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rxrpc/ar-input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rxrpc/ar-input.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rxrpc/ar-internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rxrpc/ar-internal.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rxrpc/ar-key.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rxrpc/ar-key.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/rxrpc/rxkad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/rxrpc/rxkad.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_api.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/act_api.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_csum.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/act_csum.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_gact.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/act_gact.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_ipt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/act_ipt.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_mirred.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/act_mirred.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_nat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/act_nat.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_pedit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/act_pedit.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_police.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/act_police.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_simple.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/act_simple.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/act_skbedit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/act_skbedit.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/cls_api.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/cls_api.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/cls_basic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/cls_basic.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/cls_cgroup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/cls_cgroup.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/cls_flow.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/cls_flow.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/cls_fw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/cls_fw.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/cls_route.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/cls_route.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/cls_rsvp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/cls_rsvp.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/cls_tcindex.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/cls_tcindex.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/cls_u32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/cls_u32.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/em_meta.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/em_meta.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/ematch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/ematch.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_api.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_api.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_atm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_atm.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_cbq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_cbq.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_choke.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_choke.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/sched/sch_codel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_codel.c</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_drr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_drr.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_dsmark.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_dsmark.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_fifo.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/net/sched/sch_fq_codel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_fq_codel.c</a></td><td class='right'>626</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_generic.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_gred.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_gred.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_hfsc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_hfsc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_htb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_htb.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_mqprio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_mqprio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_multiq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_multiq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_netem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_netem.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_prio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_prio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_qfq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_qfq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_red.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_red.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_sfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_sfb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_sfq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_sfq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_tbf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_tbf.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sched/sch_teql.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sched/sch_teql.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/associola.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sctp/associola.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sctp/input.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/output.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sctp/output.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/outqueue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sctp/outqueue.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/sm_sideeffect.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sctp/sm_sideeffect.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/sm_statefuns.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sctp/sm_statefuns.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/socket.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sctp/socket.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/sysctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sctp/sysctl.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sctp/transport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sctp/transport.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/socket.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/socket.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/auth_generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/auth_generic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/auth_gss/gss_krb5_mech.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/auth_gss/gss_krb5_mech.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/auth_gss/gss_krb5_wrap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/auth_gss/gss_krb5_wrap.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/auth_gss/gss_mech_switch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/auth_gss/gss_mech_switch.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/auth_gss/svcauth_gss.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/auth_gss/svcauth_gss.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/auth_unix.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/auth_unix.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/cache.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/cache.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/clnt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/clnt.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/rpc_pipe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/rpc_pipe.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/rpcb_clnt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/rpcb_clnt.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/svc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/svc.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/svc_xprt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/svc_xprt.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/svcauth_unix.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/svcauth_unix.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/svcsock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/svcsock.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/timer.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xdr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/xdr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sunrpc/xprt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sunrpc/xprt.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/sysctl_net.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/sysctl_net.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/addr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/addr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/addr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/addr.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/bcast.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/bcast.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/bcast.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/bcast.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/bearer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/bearer.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/bearer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/bearer.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/config.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/config.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/config.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/config.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/core.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/core.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/discover.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/discover.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/eth_media.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/eth_media.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/handler.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/handler.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/link.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/link.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/link.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/link.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/log.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/log.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/log.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/log.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/msg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/msg.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/msg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/msg.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/name_distr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/name_distr.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/name_table.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/name_table.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/name_table.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/name_table.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/net.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/net.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/node.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/node.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/node.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/node.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/node_subscr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/node_subscr.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/node_subscr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/node_subscr.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/port.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/port.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/port.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/port.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/ref.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/ref.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/socket.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/socket.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/subscr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/subscr.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/tipc/subscr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/tipc/subscr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/unix/af_unix.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/unix/af_unix.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/unix/diag.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/unix/diag.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/unix/sysctl_net_unix.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/unix/sysctl_net_unix.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wanrouter/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wanrouter/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wimax/stack.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wimax/stack.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/chan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/chan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/core.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/ethtool.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/ibss.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/ibss.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/lib80211_crypt_ccmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/lib80211_crypt_ccmp.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/lib80211_crypt_tkip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/lib80211_crypt_tkip.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/mesh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/mesh.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/mlme.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/mlme.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/nl80211.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/nl80211.c</a></td><td class='right'>1353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.3%;'/><td class='rem' style='width: 9.1%;'/><td class='none' style='width: 78.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/nl80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/nl80211.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/reg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/reg.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/scan.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/util.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/util.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/wext-compat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/wext-compat.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/wext-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/wext-core.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/wext-sme.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/wext-sme.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/wireless/wext-spy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/wireless/wext-spy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/x25/sysctl_net_x25.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/x25/sysctl_net_x25.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/x25/x25_dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/x25/x25_dev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/x25/x25_facilities.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/x25/x25_facilities.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/xfrm/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/xfrm/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/xfrm_algo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/xfrm/xfrm_algo.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/xfrm_hash.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/xfrm/xfrm_hash.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/xfrm_policy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/xfrm/xfrm_policy.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/xfrm_sysctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/xfrm/xfrm_sysctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/net/xfrm/xfrm_user.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>net/xfrm/xfrm_user.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/scripts/checkpatch.pl?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/checkpatch.pl</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/scripts/coccinelle/misc/ifaddr.cocci?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/coccinelle/misc/ifaddr.cocci</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/scripts/coccinelle/misc/noderef.cocci?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/coccinelle/misc/noderef.cocci</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/scripts/config?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/config</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/kconfig/conf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/kconfig/conf.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/kconfig/mconf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/kconfig/mconf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/kconfig/nconf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/kconfig/nconf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/scripts/link-vmlinux.sh?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/link-vmlinux.sh</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/mod/file2alias.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/mod/file2alias.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/mod/modpost.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/mod/modpost.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/scripts/package/builddeb?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/package/builddeb</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/scripts/sortextable.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/sortextable.c</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/scripts/sortextable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>scripts/sortextable.h</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/apparmor/lsm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/apparmor/lsm.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/capability.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/capability.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/commoncap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/commoncap.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/device_cgroup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/device_cgroup.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/keys/compat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/keys/compat.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/keys/internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/keys/internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/keys/key.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/keys/key.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/keys/keyctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/keys/keyctl.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/keys/permission.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/keys/permission.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/keys/process_keys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/keys/process_keys.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/keys/request_key.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/keys/request_key.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/security.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/security.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/selinux/hooks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/selinux/hooks.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/selinux/nlmsgtab.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/selinux/nlmsgtab.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/selinux/selinuxfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/selinux/selinuxfs.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/security/smack/smack_lsm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>security/smack/smack_lsm.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/atmel/ac97c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/atmel/ac97c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/core/jack.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/core/jack.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/core/pcm_lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/core/pcm_lib.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/core/pcm_native.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/core/pcm_native.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/core/sound_oss.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/core/sound_oss.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/drivers/aloop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/drivers/aloop.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/firewire/amdtp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/firewire/amdtp.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/firewire/amdtp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/firewire/amdtp.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/firewire/cmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/firewire/cmp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/firewire/lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/firewire/lib.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/firewire/lib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/firewire/lib.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/i2c/other/tea575x-tuner.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/i2c/other/tea575x-tuner.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/isa/als100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/isa/als100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/ad1889.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/ad1889.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/ali5451/ali5451.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/ali5451/ali5451.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/als300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/als300.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/als4000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/als4000.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/atiixp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/atiixp.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/atiixp_modem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/atiixp_modem.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/au88x0/au88x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/au88x0/au88x0.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/aw2/aw2-alsa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/aw2/aw2-alsa.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/azt3328.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/azt3328.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/bt87x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/bt87x.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/ca0106/ca0106_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/ca0106/ca0106_main.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/cmipci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/cmipci.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/cs4281.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/cs4281.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/cs46xx/cs46xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/cs46xx/cs46xx.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/cs5530.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/cs5530.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/cs5535audio/cs5535audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/cs5535audio/cs5535audio.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/ctxfi/xfi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/ctxfi/xfi.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/echoaudio/echoaudio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/echoaudio/echoaudio.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/echoaudio/echoaudio_dsp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/echoaudio/echoaudio_dsp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/emu10k1/emu10k1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/emu10k1/emu10k1.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/emu10k1/emu10k1x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/emu10k1/emu10k1x.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/ens1370.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/ens1370.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/es1938.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/es1938.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/es1968.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/es1968.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/fm801.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/fm801.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/pci/hda/hda_auto_parser.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/hda_auto_parser.c</a></td><td class='right'>760</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/pci/hda/hda_auto_parser.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/hda_auto_parser.h</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/hda_codec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/hda_codec.c</a></td><td class='right'>1097</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 12.3%;'/><td class='none' style='width: 82.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/hda_codec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/hda_codec.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/hda_intel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/hda_intel.c</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/hda_jack.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/hda_jack.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/hda_jack.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/hda_jack.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/hda_local.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/hda_local.h</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_analog.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/patch_analog.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_ca0110.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/patch_ca0110.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_ca0132.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/patch_ca0132.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_cirrus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/patch_cirrus.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_cmedia.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/patch_cmedia.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_conexant.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/patch_conexant.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/patch_hdmi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_realtek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/patch_realtek.c</a></td><td class='right'>521</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_sigmatel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/patch_sigmatel.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/hda/patch_via.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/hda/patch_via.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/ice1712/ice1712.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/ice1712/ice1712.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/ice1712/ice1724.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/ice1712/ice1724.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/intel8x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/intel8x0.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/intel8x0m.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/intel8x0m.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/korg1212/korg1212.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/korg1212/korg1212.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/lola/lola.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/lola/lola.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/lx6464es/lx6464es.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/lx6464es/lx6464es.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/maestro3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/maestro3.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/mixart/mixart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/mixart/mixart.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/nm256/nm256.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/nm256/nm256.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/oxygen/oxygen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/oxygen/oxygen.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/oxygen/virtuoso.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/oxygen/virtuoso.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/oxygen/xonar_dg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/oxygen/xonar_dg.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/pcxhr/pcxhr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/pcxhr/pcxhr.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/riptide/riptide.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/riptide/riptide.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/rme32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/rme32.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/rme96.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/rme96.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/rme9652/hdsp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/rme9652/hdsp.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/rme9652/hdspm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/rme9652/hdspm.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/rme9652/rme9652.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/rme9652/rme9652.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/sis7019.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/sis7019.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/sonicvibes.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/sonicvibes.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/trident/trident.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/trident/trident.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/via82xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/via82xx.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/via82xx_modem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/via82xx_modem.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/vx222/vx222.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/vx222/vx222.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/pci/ymfpci/ymfpci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/pci/ymfpci/ymfpci.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/sh/sh_dac_audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/sh/sh_dac_audio.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/blackfin/bf5xx-ssm2602.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/blackfin/bf5xx-ssm2602.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/ac97.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/ac97.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/ad1836.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/ad1836.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/ad193x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/ad193x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/adau1701.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/adau1701.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/ak4104.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/ak4104.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/ak4535.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/ak4535.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/ak4641.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/ak4641.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/alc5623.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/alc5623.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/alc5632.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/alc5632.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/cs4270.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/cs4270.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/cs4271.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/cs4271.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/cs42l51.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/cs42l51.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/codecs/cs42l52.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/cs42l52.c</a></td><td class='right'>1295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/codecs/cs42l52.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/cs42l52.h</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/cs42l73.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/cs42l73.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/da7210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/da7210.c</a></td><td class='right'>379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/jz4740.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/jz4740.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/codecs/lm49453.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/lm49453.c</a></td><td class='right'>1550</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/codecs/lm49453.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/lm49453.h</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/max98095.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/max98095.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/max98095.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/max98095.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/codecs/mc13783.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/mc13783.c</a></td><td class='right'>786</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/codecs/mc13783.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/mc13783.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/codecs/ml26124.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/ml26124.c</a></td><td class='right'>681</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/codecs/ml26124.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/ml26124.h</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/codecs/omap-hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/omap-hdmi.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/rt5631.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/rt5631.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/sgtl5000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/sgtl5000.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/ssm2602.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/ssm2602.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/sta32x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/sta32x.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/tlv320aic23.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/tlv320aic23.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/tlv320aic26.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/tlv320aic26.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/tlv320aic3x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/tlv320aic3x.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/tlv320dac33.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/tlv320dac33.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/twl4030.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/twl4030.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/twl6040.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/twl6040.c</a></td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 6.9%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/uda134x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/uda134x.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/uda1380.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/uda1380.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wl1273.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wl1273.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm1250-ev1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm1250-ev1.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm5100-tables.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm5100-tables.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm5100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm5100.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm5100.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm5100.h</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8350.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8350.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8400.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8400.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8510.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8510.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8523.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8523.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8728.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8728.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8731.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8731.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8737.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8737.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8741.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8741.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8750.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8750.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8753.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8753.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8900.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8900.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8903.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8903.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8940.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8940.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8960.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8960.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8962.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8962.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8971.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8971.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8978.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8978.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8988.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8988.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8990.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8990.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8993.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8993.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8994.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8994.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8994.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8994.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm8996.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm8996.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm9081.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm9081.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm9705.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm9705.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm9712.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm9712.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm_hubs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm_hubs.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/codecs/wm_hubs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/codecs/wm_hubs.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/ep93xx/ep93xx-ac97.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/ep93xx/ep93xx-ac97.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/ep93xx/ep93xx-i2s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/ep93xx/ep93xx-i2s.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/fsl/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/Kconfig</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/fsl/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/Makefile</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/sound/soc/fsl/eukrea-tlv320.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/eukrea-tlv320.c</a> (renamed from sound/soc/imx/eukrea-tlv320.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/fsl/fsl_ssi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/fsl_ssi.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/fsl/fsl_utils.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/fsl_utils.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/fsl/fsl_utils.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/fsl_utils.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/sound/soc/fsl/imx-audmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/imx-audmux.c</a> (renamed from sound/soc/imx/imx-audmux.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/sound/soc/fsl/imx-audmux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/imx-audmux.h</a> (renamed from sound/soc/imx/imx-audmux.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/fsl/imx-mc13783.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/imx-mc13783.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/sound/soc/fsl/imx-pcm-dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/imx-pcm-dma.c</a> (renamed from sound/soc/imx/imx-pcm-dma-mx2.c)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/sound/soc/fsl/imx-pcm-fiq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/imx-pcm-fiq.c</a> (renamed from sound/soc/imx/imx-pcm-fiq.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/sound/soc/fsl/imx-pcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/imx-pcm.c</a> (renamed from sound/soc/imx/imx-pcm.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/sound/soc/fsl/imx-pcm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/imx-pcm.h</a> (renamed from sound/soc/imx/imx-pcm.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/fsl/imx-sgtl5000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/imx-sgtl5000.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/sound/soc/fsl/imx-ssi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/imx-ssi.c</a> (renamed from sound/soc/imx/imx-ssi.c)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/sound/soc/fsl/imx-ssi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/imx-ssi.h</a> (renamed from sound/soc/imx/imx-ssi.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/fsl/mpc8610_hpcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/mpc8610_hpcd.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/sound/soc/fsl/mx27vis-aic32x4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/mx27vis-aic32x4.c</a> (renamed from sound/soc/imx/mx27vis-aic32x4.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/fsl/p1022_ds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/p1022_ds.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/sound/soc/fsl/phycore-ac97.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/phycore-ac97.c</a> (renamed from sound/soc/imx/phycore-ac97.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/sound/soc/fsl/wm1133-ev1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/fsl/wm1133-ev1.c</a> (renamed from sound/soc/imx/wm1133-ev1.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/generic/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/generic/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/generic/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/generic/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/generic/simple-card.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/generic/simple-card.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/sound/soc/imx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/imx/Kconfig</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/sound/soc/imx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/imx/Makefile</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/jz4740/jz4740-i2s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/jz4740/jz4740-i2s.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/kirkwood/kirkwood-i2s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/kirkwood/kirkwood-i2s.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/kirkwood/kirkwood.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/kirkwood/kirkwood.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/mxs/mxs-pcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/mxs/mxs-pcm.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/mxs/mxs-pcm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/mxs/mxs-pcm.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/mxs/mxs-saif.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/mxs/mxs-saif.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/mxs/mxs-saif.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/mxs/mxs-saif.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/mxs/mxs-sgtl5000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/mxs/mxs-sgtl5000.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/omap/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/omap/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/omap/mcbsp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/mcbsp.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/omap/mcbsp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/mcbsp.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/omap/omap-abe-twl6040.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/omap-abe-twl6040.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/omap/omap-dmic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/omap-dmic.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/omap/omap-hdmi-card.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/omap-hdmi-card.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/omap/omap-hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/omap-hdmi.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/omap/omap-hdmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/omap-hdmi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/omap/omap-mcbsp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/omap-mcbsp.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/omap/omap-mcpdm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/omap-mcpdm.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/omap/omap-pcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/omap-pcm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/sound/soc/omap/omap4-hdmi-card.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/omap/omap4-hdmi-card.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/pxa/pxa-ssp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/pxa/pxa-ssp.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/pxa/pxa2xx-i2s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/pxa/pxa2xx-i2s.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/samsung/littlemill.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/samsung/littlemill.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/samsung/lowland.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/samsung/lowland.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/samsung/s3c2412-i2s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/samsung/s3c2412-i2s.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/samsung/speyside.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/samsung/speyside.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/sh/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/sh/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/sh/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/sh/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/sound/soc/sh/fsi-ak4642.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/sh/fsi-ak4642.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/sound/soc/sh/fsi-da7210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/sh/fsi-da7210.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/sound/soc/sh/fsi-hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/sh/fsi-hdmi.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/sh/fsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/sh/fsi.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/sh/migor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/sh/migor.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/soc-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/soc-core.c</a></td><td class='right'>696</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 89.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/soc-dapm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/soc-dapm.c</a></td><td class='right'>562</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/soc-jack.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/soc-jack.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/soc-pcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/soc-pcm.c</a></td><td class='right'>1718</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 72.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/tegra/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/Kconfig</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/tegra/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/tegra/tegra20_das.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra20_das.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/tegra/tegra20_das.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra20_das.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/tegra/tegra20_i2s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra20_i2s.c</a></td><td class='right'>494</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/tegra/tegra20_i2s.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra20_i2s.h</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/tegra/tegra20_spdif.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra20_spdif.c</a></td><td class='right'>404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/tegra/tegra20_spdif.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra20_spdif.h</a></td><td class='right'>471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/tegra/tegra30_ahub.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra30_ahub.c</a></td><td class='right'>631</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/tegra/tegra30_ahub.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra30_ahub.h</a></td><td class='right'>483</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/tegra/tegra30_i2s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra30_i2s.c</a></td><td class='right'>536</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/tegra/tegra30_i2s.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra30_i2s.h</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/tegra/tegra_alc5632.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_alc5632.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/tegra/tegra_asoc_utils.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_asoc_utils.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/tegra/tegra_asoc_utils.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_asoc_utils.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/sound/soc/tegra/tegra_das.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_das.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/sound/soc/tegra/tegra_das.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_das.h</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/sound/soc/tegra/tegra_i2s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_i2s.c</a></td><td class='right'>459</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/sound/soc/tegra/tegra_i2s.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_i2s.h</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/tegra/tegra_pcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_pcm.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/tegra/tegra_pcm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_pcm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/sound/soc/tegra/tegra_spdif.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_spdif.c</a></td><td class='right'>364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.8%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/sound/soc/tegra/tegra_spdif.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_spdif.h</a></td><td class='right'>473</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.5%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/tegra/tegra_wm8753.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_wm8753.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/tegra/tegra_wm8903.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/tegra_wm8903.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/soc/tegra/trimslice.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/tegra/trimslice.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/ux500/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/ux500/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/ux500/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/ux500/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/ux500/ux500_msp_dai.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/ux500/ux500_msp_dai.c</a></td><td class='right'>843</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/ux500/ux500_msp_dai.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/ux500/ux500_msp_dai.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/ux500/ux500_msp_i2s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/ux500/ux500_msp_i2s.c</a></td><td class='right'>742</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/sound/soc/ux500/ux500_msp_i2s.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/soc/ux500/ux500_msp_i2s.h</a></td><td class='right'>553</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/sound_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/sound_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/card.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/usb/card.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/card.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/usb/card.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/endpoint.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/usb/endpoint.c</a></td><td class='right'>1609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.3%;'/><td class='rem' style='width: 11.2%;'/><td class='none' style='width: 74.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/endpoint.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/usb/endpoint.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/mixer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/usb/mixer.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/mixer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/usb/mixer.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/mixer_maps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/usb/mixer_maps.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/mixer_quirks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/usb/mixer_quirks.c</a></td><td class='right'>472</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/pcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/usb/pcm.c</a></td><td class='right'>456</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/usb/proc.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/stream.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/usb/stream.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/sound/usb/usbaudio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>sound/usb/usbaudio.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/Makefile</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/lib/traceevent/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/lib/traceevent/Makefile</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/lib/traceevent/event-parse.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/lib/traceevent/event-parse.c</a></td><td class='right'>5079</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 80.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 19.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/lib/traceevent/event-parse.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/lib/traceevent/event-parse.h</a></td><td class='right'>804</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/lib/traceevent/event-utils.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/lib/traceevent/event-utils.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/lib/traceevent/parse-filter.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/lib/traceevent/parse-filter.c</a></td><td class='right'>2261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 35.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 64.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/lib/traceevent/parse-utils.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/lib/traceevent/parse-utils.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/lib/traceevent/trace-seq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/lib/traceevent/trace-seq.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-evlist.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/Documentation/perf-evlist.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-probe.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/Documentation/perf-probe.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perf-record.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/Documentation/perf-record.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Documentation/perfconfig.example?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/Documentation/perfconfig.example</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/MANIFEST?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/MANIFEST</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/Makefile</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-annotate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-annotate.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-buildid-list.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-buildid-list.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-evlist.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-evlist.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-inject.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-inject.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-kmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-kmem.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-lock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-lock.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-probe.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-record.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-record.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-report.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-report.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-sched.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-sched.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-script.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-script.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-stat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-stat.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-test.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-test.c</a></td><td class='right'>565</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 8.8%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/builtin-top.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/builtin-top.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/design.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/design.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/perf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/perf.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/browser.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/browser.c</a> (renamed from tools/perf/util/ui/browser.c)</td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/browser.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/browser.h</a> (renamed from tools/perf/util/ui/browser.h)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/ui/browsers/annotate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/browsers/annotate.c</a></td><td class='right'>951</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/browsers/hists.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/browsers/hists.c</a> (renamed from tools/perf/util/ui/browsers/hists.c)</td><td class='right'>360</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/browsers/map.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/browsers/map.c</a> (renamed from tools/perf/util/ui/browsers/map.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/browsers/map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/browsers/map.h</a> (renamed from tools/perf/util/ui/browsers/map.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/gtk/browser.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/gtk/browser.c</a> (renamed from tools/perf/util/gtk/browser.c)</td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/gtk/gtk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/gtk/gtk.h</a> (renamed from tools/perf/util/gtk/gtk.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/ui/gtk/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/gtk/setup.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/helpline.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/helpline.c</a> (renamed from tools/perf/util/ui/helpline.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/helpline.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/helpline.h</a> (renamed from tools/perf/util/ui/helpline.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/keysyms.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/keysyms.h</a> (renamed from tools/perf/util/ui/keysyms.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/libslang.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/libslang.h</a> (renamed from tools/perf/util/ui/libslang.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/progress.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/progress.c</a> (renamed from tools/perf/util/ui/progress.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/progress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/progress.h</a> (renamed from tools/perf/util/ui/progress.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/ui/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/setup.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/tui/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/tui/setup.c</a> (renamed from tools/perf/util/ui/setup.c)</td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/ui.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/ui.h</a> (renamed from tools/perf/util/ui/ui.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/util.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/util.c</a> (renamed from tools/perf/util/ui/util.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/drm-misc/diff/tools/perf/ui/util.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/ui/util.h</a> (renamed from tools/perf/util/ui/util.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/PERF-VERSION-GEN?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/PERF-VERSION-GEN</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/annotate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/annotate.c</a></td><td class='right'>599</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/annotate.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/annotate.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/build-id.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/build-id.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/cache.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/cache.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/callchain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/callchain.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/callchain.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/callchain.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/config.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/config.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/debug.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/debug.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/evlist.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/evlist.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/evlist.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/evlist.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/evsel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/evsel.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/evsel.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/evsel.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/header.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/header.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/header.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/header.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/hist.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/hist.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/hist.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/hist.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/pager.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/pager.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/util/parse-events-test.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/parse-events-test.c</a></td><td class='right'>625</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/parse-events.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/parse-events.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/parse-events.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/parse-events.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/parse-events.l?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/parse-events.l</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/parse-events.y?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/parse-events.y</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/pmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/pmu.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/probe-event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/probe-event.c</a></td><td class='right'>418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/probe-event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/probe-event.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/scripting-engines/trace-event-perl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/scripting-engines/trace-event-perl.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/scripting-engines/trace-event-python.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/scripting-engines/trace-event-python.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/session.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/session.c</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/symbol.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/symbol.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/symbol.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/symbol.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/util/target.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/target.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/perf/util/target.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/target.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/thread_map.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/thread_map.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/thread_map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/thread_map.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/top.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/top.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/top.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/top.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/trace-event-info.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/trace-event-info.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/trace-event-parse.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/trace-event-parse.c</a></td><td class='right'>3142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 46.9%;'/><td class='none' style='width: 50.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/trace-event-read.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/trace-event-read.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/trace-event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/trace-event.h</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/types.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/drm-misc/diff/tools/perf/util/ui/browsers/annotate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/ui/browsers/annotate.c</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/usage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/usage.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/util.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/util.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/perf/util/util.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/perf/util/util.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/cpupower/man/cpupower-set.1?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/power/cpupower/man/cpupower-set.1</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/cpupower/utils/helpers/sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/power/cpupower/utils/helpers/sysfs.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/power/x86/turbostat/turbostat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/power/x86/turbostat/turbostat.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/scripts/Makefile.include?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/scripts/Makefile.include</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/ktest/examples/README?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/ktest/examples/README</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/ktest/examples/crosstests.conf?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/ktest/examples/crosstests.conf</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/ktest/examples/include/bisect.conf?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/ktest/examples/include/bisect.conf</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/ktest/examples/include/defaults.conf?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/ktest/examples/include/defaults.conf</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/ktest/examples/include/min-config.conf?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/ktest/examples/include/min-config.conf</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/ktest/examples/include/patchcheck.conf?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/ktest/examples/include/patchcheck.conf</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/ktest/examples/include/tests.conf?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/ktest/examples/include/tests.conf</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/ktest/examples/kvm.conf?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/ktest/examples/kvm.conf</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/ktest/examples/snowball.conf?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/ktest/examples/snowball.conf</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/ktest/examples/test.conf?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/ktest/examples/test.conf</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/drm-misc/diff/tools/testing/ktest/ktest.pl?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/ktest/ktest.pl</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/ktest/sample.conf?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/ktest/sample.conf</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/testing/selftests/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/selftests/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/kcmp/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/selftests/kcmp/Makefile</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/kcmp/kcmp_test.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/selftests/kcmp/kcmp_test.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/mqueue/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/selftests/mqueue/.gitignore</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/mqueue/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/selftests/mqueue/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/mqueue/mq_open_tests.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/selftests/mqueue/mq_open_tests.c</a></td><td class='right'>492</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/drm-misc/diff/tools/testing/selftests/mqueue/mq_perf_tests.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/testing/selftests/mqueue/mq_perf_tests.c</a></td><td class='right'>741</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/usb/ffs-test.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/usb/ffs-test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/usb/testusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/usb/testusb.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/virtio/linux/virtio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/virtio/linux/virtio.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/virtio/virtio_test.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/virtio/virtio_test.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/tools/vm/page-types.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>tools/vm/page-types.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/usr/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>usr/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/virt/kvm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>virt/kvm/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/virt/kvm/ioapic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>virt/kvm/ioapic.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/virt/kvm/ioapic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>virt/kvm/ioapic.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/virt/kvm/irq_comm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>virt/kvm/irq_comm.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/drm-misc/diff/virt/kvm/kvm_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>virt/kvm/kvm_main.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
</table><div class='diffstat-summary'>9063 files changed, 529941 insertions, 324040 deletions</div><table summary='diff' class='diff'><tr><td><div class='head'>diff --git a/.mailmap b/.mailmap<br/>index 9b0d0267a3c3..2909c33bc54e 100644<br/>--- a/<a href='/drm-misc/tree/.mailmap?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>.mailmap</a><br/>+++ b/<a href='/drm-misc/tree/.mailmap?id=66dd07b88a1c9d446f32253da606b87324fa620e'>.mailmap</a></div><div class='hunk'>@@ -113,3 +113,5 @@ Uwe Kleine-König &lt;Uwe.Kleine-Koenig@digi.com&gt;</div><div class='ctx'> Valdis Kletnieks &lt;Valdis.Kletnieks@vt.edu&gt;</div><div class='ctx'> Takashi YOSHII &lt;takashi.yoshii.zj@renesas.com&gt;</div><div class='ctx'> Yusuke Goda &lt;goda.yusuke@renesas.com&gt;</div><div class='add'>+Gustavo Padovan &lt;gustavo@las.ic.unicamp.br&gt;</div><div class='add'>+Gustavo Padovan &lt;padovan@profusion.mobi&gt;</div><div class='head'>diff --git a/CREDITS b/CREDITS<br/>index 370b4c7da39b..d8fe12a9421f 100644<br/>--- a/<a href='/drm-misc/tree/CREDITS?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>CREDITS</a><br/>+++ b/<a href='/drm-misc/tree/CREDITS?id=66dd07b88a1c9d446f32253da606b87324fa620e'>CREDITS</a></div><div class='hunk'>@@ -3814,8 +3814,8 @@ D: INFO-SHEET, former maintainer</div><div class='ctx'> D: Author of the longest-living linux bug</div><div class='ctx'> </div><div class='ctx'> N: Jonathan Woithe</div><div class='del'>-E: jwoithe@physics.adelaide.edu.au</div><div class='del'>-W: http://www.physics.adelaide.edu.au/~jwoithe</div><div class='add'>+E: jwoithe@just42.net</div><div class='add'>+W: http:/www.just42.net/jwoithe</div><div class='ctx'> D: ALS-007 sound card extensions to Sound Blaster driver</div><div class='ctx'> S: 20 Jordan St</div><div class='ctx'> S: Valley View, SA 5093</div><div class='head'>diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX<br/>index 2214f123a976..49c051380daf 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/00-INDEX?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/00-INDEX</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/00-INDEX?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/00-INDEX</a></div><div class='hunk'>@@ -218,8 +218,6 @@ m68k/</div><div class='ctx'> 	- directory with info about Linux on Motorola 68k architecture.</div><div class='ctx'> magic-number.txt</div><div class='ctx'> 	- list of magic numbers used to mark/protect kernel data structures.</div><div class='del'>-mca.txt</div><div class='del'>-	- info on supporting Micro Channel Architecture (e.g. PS/2) systems.</div><div class='ctx'> md.txt</div><div class='ctx'> 	- info on boot arguments for the multiple devices driver.</div><div class='ctx'> memory-barriers.txt</div><div class='head'>diff --git a/Documentation/ABI/removed/ip_queue b/Documentation/ABI/removed/ip_queue<br/>new file mode 100644<br/>index 000000000000..3243613bc2d2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/removed/ip_queue?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/removed/ip_queue</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+What:		ip_queue</div><div class='add'>+Date:		finally removed in kernel v3.5.0</div><div class='add'>+Contact:	Pablo Neira Ayuso &lt;pablo@netfilter.org&gt;</div><div class='add'>+Description:</div><div class='add'>+	ip_queue has been replaced by nfnetlink_queue which provides</div><div class='add'>+	more advanced queueing mechanism to user-space. The ip_queue</div><div class='add'>+	module was already announced to become obsolete years ago.</div><div class='add'>+</div><div class='add'>+Users:</div><div class='head'>diff --git a/Documentation/ABI/testing/debugfs-pfo-nx-crypto b/Documentation/ABI/testing/debugfs-pfo-nx-crypto<br/>new file mode 100644<br/>index 000000000000..685d5a448423<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/debugfs-pfo-nx-crypto?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/debugfs-pfo-nx-crypto</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+What:		/sys/kernel/debug/nx-crypto/*</div><div class='add'>+Date:		March 2012</div><div class='add'>+KernelVersion:	3.4</div><div class='add'>+Contact:	Kent Yoder &lt;key@linux.vnet.ibm.com&gt;</div><div class='add'>+Description:</div><div class='add'>+</div><div class='add'>+  These debugfs interfaces are built by the nx-crypto driver, built in</div><div class='add'>+arch/powerpc/crypto/nx.</div><div class='add'>+</div><div class='add'>+Error Detection</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+errors:</div><div class='add'>+- A u32 providing a total count of errors since the driver was loaded. The</div><div class='add'>+only errors counted here are those returned from the hcall, H_COP_OP.</div><div class='add'>+</div><div class='add'>+last_error:</div><div class='add'>+- The most recent non-zero return code from the H_COP_OP hcall. -EBUSY is not</div><div class='add'>+recorded here (the hcall will retry until -EBUSY goes away).</div><div class='add'>+</div><div class='add'>+last_error_pid:</div><div class='add'>+- The process ID of the process who received the most recent error from the</div><div class='add'>+hcall.</div><div class='add'>+</div><div class='add'>+Device Use</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+aes_bytes:</div><div class='add'>+- The total number of bytes encrypted using AES in any of the driver's</div><div class='add'>+supported modes.</div><div class='add'>+</div><div class='add'>+aes_ops:</div><div class='add'>+- The total number of AES operations submitted to the hardware.</div><div class='add'>+</div><div class='add'>+sha256_bytes:</div><div class='add'>+- The total number of bytes hashed by the hardware using SHA-256.</div><div class='add'>+</div><div class='add'>+sha256_ops:</div><div class='add'>+- The total number of SHA-256 operations submitted to the hardware.</div><div class='add'>+</div><div class='add'>+sha512_bytes:</div><div class='add'>+- The total number of bytes hashed by the hardware using SHA-512.</div><div class='add'>+</div><div class='add'>+sha512_ops:</div><div class='add'>+- The total number of SHA-512 operations submitted to the hardware.</div><div class='head'>diff --git a/Documentation/ABI/testing/dev-kmsg b/Documentation/ABI/testing/dev-kmsg<br/>new file mode 100644<br/>index 000000000000..281ecc5f9709<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/dev-kmsg?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/dev-kmsg</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+What:		/dev/kmsg</div><div class='add'>+Date:		Mai 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Kay Sievers &lt;kay@vrfy.org&gt;</div><div class='add'>+Description:	The /dev/kmsg character device node provides userspace access</div><div class='add'>+		to the kernel's printk buffer.</div><div class='add'>+</div><div class='add'>+		Injecting messages:</div><div class='add'>+		Every write() to the opened device node places a log entry in</div><div class='add'>+		the kernel's printk buffer.</div><div class='add'>+</div><div class='add'>+		The logged line can be prefixed with a &lt;N&gt; syslog prefix, which</div><div class='add'>+		carries the syslog priority and facility. The single decimal</div><div class='add'>+		prefix number is composed of the 3 lowest bits being the syslog</div><div class='add'>+		priority and the higher bits the syslog facility number.</div><div class='add'>+</div><div class='add'>+		If no prefix is given, the priority number is the default kernel</div><div class='add'>+		log priority and the facility number is set to LOG_USER (1). It</div><div class='add'>+		is not possible to inject messages from userspace with the</div><div class='add'>+		facility number LOG_KERN (0), to make sure that the origin of</div><div class='add'>+		the messages can always be reliably determined.</div><div class='add'>+</div><div class='add'>+		Accessing the buffer:</div><div class='add'>+		Every read() from the opened device node receives one record</div><div class='add'>+		of the kernel's printk buffer.</div><div class='add'>+</div><div class='add'>+		The first read() directly following an open() always returns</div><div class='add'>+		first message in the buffer; there is no kernel-internal</div><div class='add'>+		persistent state; many readers can concurrently open the device</div><div class='add'>+		and read from it, without affecting other readers.</div><div class='add'>+</div><div class='add'>+		Every read() will receive the next available record. If no more</div><div class='add'>+		records are available read() will block, or if O_NONBLOCK is</div><div class='add'>+		used -EAGAIN returned.</div><div class='add'>+</div><div class='add'>+		Messages in the record ring buffer get overwritten as whole,</div><div class='add'>+		there are never partial messages received by read().</div><div class='add'>+</div><div class='add'>+		In case messages get overwritten in the circular buffer while</div><div class='add'>+		the device is kept open, the next read() will return -EPIPE,</div><div class='add'>+		and the seek position be updated to the next available record.</div><div class='add'>+		Subsequent reads() will return available records again.</div><div class='add'>+</div><div class='add'>+		Unlike the classic syslog() interface, the 64 bit record</div><div class='add'>+		sequence numbers allow to calculate the amount of lost</div><div class='add'>+		messages, in case the buffer gets overwritten. And they allow</div><div class='add'>+		to reconnect to the buffer and reconstruct the read position</div><div class='add'>+		if needed, without limiting the interface to a single reader.</div><div class='add'>+</div><div class='add'>+		The device supports seek with the following parameters:</div><div class='add'>+		SEEK_SET, 0</div><div class='add'>+		  seek to the first entry in the buffer</div><div class='add'>+		SEEK_END, 0</div><div class='add'>+		  seek after the last entry in the buffer</div><div class='add'>+		SEEK_DATA, 0</div><div class='add'>+		  seek after the last record available at the time</div><div class='add'>+		  the last SYSLOG_ACTION_CLEAR was issued.</div><div class='add'>+</div><div class='add'>+		The output format consists of a prefix carrying the syslog</div><div class='add'>+		prefix including priority and facility, the 64 bit message</div><div class='add'>+		sequence number and the monotonic timestamp in microseconds.</div><div class='add'>+		The values are separated by a ','. Future extensions might</div><div class='add'>+		add more comma separated values before the terminating ';'.</div><div class='add'>+		Unknown values should be gracefully ignored.</div><div class='add'>+</div><div class='add'>+		The human readable text string starts directly after the ';'</div><div class='add'>+		and is terminated by a '\n'. Untrusted values derived from</div><div class='add'>+		hardware or other facilities are printed, therefore</div><div class='add'>+		all non-printable characters in the log message are escaped</div><div class='add'>+		by "\x00" C-style hex encoding.</div><div class='add'>+</div><div class='add'>+		A line starting with ' ', is a continuation line, adding</div><div class='add'>+		key/value pairs to the log message, which provide the machine</div><div class='add'>+		readable context of the message, for reliable processing in</div><div class='add'>+		userspace.</div><div class='add'>+</div><div class='add'>+		Example:</div><div class='add'>+		7,160,424069;pci_root PNP0A03:00: host bridge window [io  0x0000-0x0cf7] (ignored)</div><div class='add'>+		 SUBSYSTEM=acpi</div><div class='add'>+		 DEVICE=+acpi:PNP0A03:00</div><div class='add'>+		6,339,5140900;NET: Registered protocol family 10</div><div class='add'>+		30,340,5690716;udevd[80]: starting version 181</div><div class='add'>+</div><div class='add'>+		The DEVICE= key uniquely identifies devices the following way:</div><div class='add'>+		  b12:8        - block dev_t</div><div class='add'>+		  c127:3       - char dev_t</div><div class='add'>+		  n8           - netdev ifindex</div><div class='add'>+		  +sound:card0 - subsystem:devname</div><div class='add'>+</div><div class='add'>+Users:		dmesg(1), userspace kernel log consumers</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-block-rssd b/Documentation/ABI/testing/sysfs-block-rssd<br/>index d535757799fe..679ce3543122 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-block-rssd?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/ABI/testing/sysfs-block-rssd</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-block-rssd?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-block-rssd</a></div><div class='hunk'>@@ -6,13 +6,21 @@ Description:    This is a read-only file. Dumps below driver information and</div><div class='ctx'>                 hardware registers.</div><div class='ctx'>                     - S ACTive</div><div class='ctx'>                     - Command Issue</div><div class='del'>-                    - Allocated</div><div class='ctx'>                     - Completed</div><div class='ctx'>                     - PORT IRQ STAT</div><div class='ctx'>                     - HOST IRQ STAT</div><div class='add'>+                    - Allocated</div><div class='add'>+                    - Commands in Q</div><div class='ctx'> </div><div class='ctx'> What:           /sys/block/rssd*/status</div><div class='ctx'> Date:           April 2012</div><div class='ctx'> KernelVersion:  3.4</div><div class='ctx'> Contact:        Asai Thambi S P &lt;asamymuthupa@micron.com&gt;</div><div class='del'>-Description:   This is a read-only file. Indicates the status of the device.</div><div class='add'>+Description:    This is a read-only file. Indicates the status of the device.</div><div class='add'>+</div><div class='add'>+What:           /sys/block/rssd*/flags</div><div class='add'>+Date:           May 2012</div><div class='add'>+KernelVersion:  3.5</div><div class='add'>+Contact:        Asai Thambi S P &lt;asamymuthupa@micron.com&gt;</div><div class='add'>+Description:    This is a read-only file. Dumps the flags in port and driver</div><div class='add'>+                data structure</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-fcoe b/Documentation/ABI/testing/sysfs-bus-fcoe<br/>new file mode 100644<br/>index 000000000000..469d09c02f6b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-fcoe?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-bus-fcoe</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+What:		/sys/bus/fcoe/ctlr_X</div><div class='add'>+Date:		March 2012</div><div class='add'>+KernelVersion:	TBD</div><div class='add'>+Contact:	Robert Love &lt;robert.w.love@intel.com&gt;, devel@open-fcoe.org</div><div class='add'>+Description:	'FCoE Controller' instances on the fcoe bus</div><div class='add'>+Attributes:</div><div class='add'>+</div><div class='add'>+	fcf_dev_loss_tmo: Device loss timeout peroid (see below). Changing</div><div class='add'>+			  this value will change the dev_loss_tmo for all</div><div class='add'>+			  FCFs discovered by this controller.</div><div class='add'>+</div><div class='add'>+	lesb_link_fail:   Link Error Status Block (LESB) link failure count.</div><div class='add'>+</div><div class='add'>+	lesb_vlink_fail:  Link Error Status Block (LESB) virtual link</div><div class='add'>+			  failure count.</div><div class='add'>+</div><div class='add'>+	lesb_miss_fka:    Link Error Status Block (LESB) missed FCoE</div><div class='add'>+			  Initialization Protocol (FIP) Keep-Alives (FKA).</div><div class='add'>+</div><div class='add'>+	lesb_symb_err:    Link Error Status Block (LESB) symbolic error count.</div><div class='add'>+</div><div class='add'>+	lesb_err_block:   Link Error Status Block (LESB) block error count.</div><div class='add'>+</div><div class='add'>+	lesb_fcs_error:   Link Error Status Block (LESB) Fibre Channel</div><div class='add'>+			  Serivces error count.</div><div class='add'>+</div><div class='add'>+Notes: ctlr_X (global increment starting at 0)</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/fcoe/fcf_X</div><div class='add'>+Date:		March 2012</div><div class='add'>+KernelVersion:	TBD</div><div class='add'>+Contact:	Robert Love &lt;robert.w.love@intel.com&gt;, devel@open-fcoe.org</div><div class='add'>+Description:	'FCoE FCF' instances on the fcoe bus. A FCF is a Fibre Channel</div><div class='add'>+		Forwarder, which is a FCoE switch that can accept FCoE</div><div class='add'>+		(Ethernet) packets, unpack them, and forward the embedded</div><div class='add'>+		Fibre Channel frames into a FC fabric. It can also take</div><div class='add'>+		outbound FC frames and pack them in Ethernet packets to</div><div class='add'>+		be sent to their destination on the Ethernet segment.</div><div class='add'>+Attributes:</div><div class='add'>+</div><div class='add'>+	fabric_name: Identifies the fabric that the FCF services.</div><div class='add'>+</div><div class='add'>+	switch_name: Identifies the FCF.</div><div class='add'>+</div><div class='add'>+	priority:    The switch's priority amongst other FCFs on the same</div><div class='add'>+		     fabric.</div><div class='add'>+</div><div class='add'>+	selected:    1 indicates that the switch has been selected for use;</div><div class='add'>+		     0 indicates that the swich will not be used.</div><div class='add'>+</div><div class='add'>+	fc_map:      The Fibre Channel MAP</div><div class='add'>+</div><div class='add'>+	vfid:	     The Virtual Fabric ID</div><div class='add'>+</div><div class='add'>+	mac:         The FCF's MAC address</div><div class='add'>+</div><div class='add'>+	fka_peroid:  The FIP Keep-Alive peroid</div><div class='add'>+</div><div class='add'>+	fabric_state: The internal kernel state</div><div class='add'>+		      "Unknown" - Initialization value</div><div class='add'>+		      "Disconnected" - No link to the FCF/fabric</div><div class='add'>+		      "Connected" - Host is connected to the FCF</div><div class='add'>+		      "Deleted" - FCF is being removed from the system</div><div class='add'>+</div><div class='add'>+	dev_loss_tmo: The device loss timeout peroid for this FCF.</div><div class='add'>+</div><div class='add'>+Notes: A device loss infrastructre similar to the FC Transport's</div><div class='add'>+       is present in fcoe_sysfs. It is nice to have so that a</div><div class='add'>+       link flapping adapter doesn't continually advance the count</div><div class='add'>+       used to identify the discovered FCF. FCFs will exist in a</div><div class='add'>+       "Disconnected" state until either the timer expires and the</div><div class='add'>+       FCF becomes "Deleted" or the FCF is rediscovered and becomes</div><div class='add'>+       "Connected."</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Users: The first user of this interface will be the fcoeadm application,</div><div class='add'>+       which is commonly packaged in the fcoe-utils package.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-i2c-devices-lm3533 b/Documentation/ABI/testing/sysfs-bus-i2c-devices-lm3533<br/>new file mode 100644<br/>index 000000000000..1b62230b33b9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-i2c-devices-lm3533?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-bus-i2c-devices-lm3533</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+What:		/sys/bus/i2c/devices/.../output_hvled[n]</div><div class='add'>+Date:		April 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Set the controlling backlight device for high-voltage current</div><div class='add'>+		sink HVLED[n] (n = 1, 2) (0, 1).</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/i2c/devices/.../output_lvled[n]</div><div class='add'>+Date:		April 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Set the controlling led device for low-voltage current sink</div><div class='add'>+		LVLED[n] (n = 1..5) (0..3).</div><div class='head'>diff --git a/drivers/staging/iio/Documentation/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio<br/>index 46a995d6d261..5bc8a476c15e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/iio/Documentation/sysfs-bus-iio?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/iio/Documentation/sysfs-bus-iio</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-iio?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-bus-iio</a></div><div class='hunk'>@@ -108,7 +108,7 @@ Description:</div><div class='ctx'> 		physically equivalent inputs when non differential readings are</div><div class='ctx'> 		separately available. In differential only parts, then all that</div><div class='ctx'> 		is required is a consistent labeling.  Units after application</div><div class='del'>-		of scale and offset are nanofarads..</div><div class='add'>+		of scale and offset are nanofarads.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_temp_raw</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_tempX_raw</div><div class='hunk'>@@ -119,7 +119,7 @@ KernelVersion:	2.6.35</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='ctx'> 		Raw (unscaled no bias removal etc) temperature measurement.</div><div class='del'>-		It an axis is specified it generally means that the temperature</div><div class='add'>+		If an axis is specified it generally means that the temperature</div><div class='ctx'> 		sensor is associated with one part of a compound device (e.g.</div><div class='ctx'> 		a gyroscope axis). Units after application of scale and offset</div><div class='ctx'> 		are milli degrees Celsuis.</div><div class='hunk'>@@ -232,7 +232,7 @@ Description:</div><div class='ctx'> 		If known for a device, scale to be applied to &lt;type&gt;Y[_name]_raw</div><div class='ctx'> 		post addition of &lt;type&gt;[Y][_name]_offset in order to obtain the</div><div class='ctx'> 		measured value in &lt;type&gt; units as specified in</div><div class='del'>-		&lt;type&gt;[Y][_name]_raw documentation..  If shared across all in</div><div class='add'>+		&lt;type&gt;[Y][_name]_raw documentation.  If shared across all in</div><div class='ctx'> 		channels then Y and &lt;x|y|z&gt; are not present and the value is</div><div class='ctx'> 		called &lt;type&gt;[Y][_name]_scale. The peak modifier means this</div><div class='ctx'> 		value is applied to &lt;type&gt;Y[_name]_peak_raw values.</div><div class='hunk'>@@ -243,6 +243,8 @@ What:		/sys/bus/iio/devices/iio:deviceX/in_accel_z_calibbias</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibbias</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibbias</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibbias</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_illuminance0_calibbias</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_proximity0_calibbias</div><div class='ctx'> KernelVersion:	2.6.35</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='hunk'>@@ -258,6 +260,8 @@ What		/sys/bus/iio/devices/iio:deviceX/in_accel_z_calibscale</div><div class='ctx'> What		/sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibscale</div><div class='ctx'> What		/sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibscale</div><div class='ctx'> What		/sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibscale</div><div class='add'>+what		/sys/bus/iio/devices/iio:deviceX/in_illuminance0_calibscale</div><div class='add'>+what		/sys/bus/iio/devices/iio:deviceX/in_proximity0_calibscale</div><div class='ctx'> KernelVersion:	2.6.35</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='hunk'>@@ -276,6 +280,13 @@ Description:</div><div class='ctx'> 		If a discrete set of scale values are available, they</div><div class='ctx'> 		are listed in this attribute.</div><div class='ctx'> </div><div class='add'>+What		/sys/bus/iio/devices/iio:deviceX/out_voltageY_hardwaregain</div><div class='add'>+KernelVersion:	2.6.35</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Hardware applied gain factor. If shared across all channels,</div><div class='add'>+		&lt;type&gt;_hardwaregain is used.</div><div class='add'>+</div><div class='ctx'> What:		/sys/.../in_accel_filter_low_pass_3db_frequency</div><div class='ctx'> What:		/sys/.../in_magn_filter_low_pass_3db_frequency</div><div class='ctx'> What:		/sys/.../in_anglvel_filter_low_pass_3db_frequency</div><div class='hunk'>@@ -453,10 +464,14 @@ What:		/sys/.../events/in_magn_z_raw_thresh_rising_value</div><div class='ctx'> What:		/sys/.../events/in_magn_z_raw_thresh_falling_value</div><div class='ctx'> What:		/sys/.../events/in_voltageY_supply_raw_thresh_rising_value</div><div class='ctx'> What:		/sys/.../events/in_voltageY_supply_raw_thresh_falling_value</div><div class='add'>+What:		/sys/.../events/in_voltageY_raw_thresh_rising_value</div><div class='ctx'> What:		/sys/.../events/in_voltageY_raw_thresh_falling_value</div><div class='del'>-What:		/sys/.../events/in_voltageY_raw_thresh_falling_value</div><div class='del'>-What:		/sys/.../events/in_tempY_raw_thresh_falling_value</div><div class='add'>+What:		/sys/.../events/in_tempY_raw_thresh_rising_value</div><div class='ctx'> What:		/sys/.../events/in_tempY_raw_thresh_falling_value</div><div class='add'>+What:		/sys/.../events/in_illuminance0_thresh_falling_value</div><div class='add'>+what:		/sys/.../events/in_illuminance0_thresh_rising_value</div><div class='add'>+what:		/sys/.../events/in_proximity0_thresh_falling_value</div><div class='add'>+what:		/sys/.../events/in_proximity0_thresh_rising_value</div><div class='ctx'> KernelVersion:	2.6.37</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='hunk'>@@ -490,9 +505,9 @@ What:		/sys/.../events/in_magn_z_raw_roc_rising_value</div><div class='ctx'> What:		/sys/.../events/in_magn_z_raw_roc_falling_value</div><div class='ctx'> What:		/sys/.../events/in_voltageY_supply_raw_roc_rising_value</div><div class='ctx'> What:		/sys/.../events/in_voltageY_supply_raw_roc_falling_value</div><div class='add'>+What:		/sys/.../events/in_voltageY_raw_roc_rising_value</div><div class='ctx'> What:		/sys/.../events/in_voltageY_raw_roc_falling_value</div><div class='del'>-What:		/sys/.../events/in_voltageY_raw_roc_falling_value</div><div class='del'>-What:		/sys/.../events/in_tempY_raw_roc_falling_value</div><div class='add'>+What:		/sys/.../events/in_tempY_raw_roc_rising_value</div><div class='ctx'> What:		/sys/.../events/in_tempY_raw_roc_falling_value</div><div class='ctx'> KernelVersion:	2.6.37</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='hunk'>@@ -556,6 +571,8 @@ What:		/sys/.../events/in_tempY_thresh_falling_period</div><div class='ctx'> What:		/sys/.../events/in_tempY_roc_rising_period</div><div class='ctx'> What:		/sys/.../events/in_tempY_roc_falling_period</div><div class='ctx'> What:		/sys/.../events/in_accel_x&amp;y&amp;z_mag_falling_period</div><div class='add'>+What:		/sys/.../events/in_intensity0_thresh_period</div><div class='add'>+What:		/sys/.../events/in_proximity0_thresh_period</div><div class='ctx'> KernelVersion:	2.6.37</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='hunk'>@@ -718,24 +735,3 @@ Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='ctx'> 		This attribute is used to read the amount of quadrature error</div><div class='ctx'> 		present in the device at a given time.</div><div class='del'>-</div><div class='del'>-What:		/sys/.../iio:deviceX/ac_excitation_en</div><div class='del'>-KernelVersion:	3.1.0</div><div class='del'>-Contact:	linux-iio@vger.kernel.org</div><div class='del'>-Description:</div><div class='del'>-		This attribute, if available, is used to enable the AC</div><div class='del'>-		excitation mode found on some converters. In ac excitation mode,</div><div class='del'>-		the polarity of the excitation voltage is reversed on</div><div class='del'>-		alternate cycles, to eliminate DC errors.</div><div class='del'>-</div><div class='del'>-What:		/sys/.../iio:deviceX/bridge_switch_en</div><div class='del'>-KernelVersion:	3.1.0</div><div class='del'>-Contact:	linux-iio@vger.kernel.org</div><div class='del'>-Description:</div><div class='del'>-		This attribute, if available, is used to close or open the</div><div class='del'>-		bridge power down switch found on some converters.</div><div class='del'>-		In bridge applications, such as strain gauges and load cells,</div><div class='del'>-		the bridge itself consumes the majority of the current in the</div><div class='del'>-		system. To minimize the current consumption of the system,</div><div class='del'>-		the bridge can be disconnected (when it is not being used</div><div class='del'>-		using the bridge_switch_en attribute.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-rbd b/Documentation/ABI/testing/sysfs-bus-rbd<br/>index dbedafb095e2..bcd88eb7ebcd 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-rbd?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/ABI/testing/sysfs-bus-rbd</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-rbd?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-bus-rbd</a></div><div class='hunk'>@@ -65,11 +65,11 @@ snap_*</div><div class='ctx'> Entries under /sys/bus/rbd/devices/&lt;dev-id&gt;/snap_&lt;snap-name&gt;</div><div class='ctx'> -------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-id</div><div class='add'>+snap_id</div><div class='ctx'> </div><div class='ctx'> 	The rados internal snapshot id assigned for this snapshot</div><div class='ctx'> </div><div class='del'>-size</div><div class='add'>+snap_size</div><div class='ctx'> </div><div class='ctx'> 	The size of the image when this snapshot was taken.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-usb b/Documentation/ABI/testing/sysfs-bus-usb<br/>index 7c22a532fdfb..6df4e6f57560 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-usb?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/ABI/testing/sysfs-bus-usb</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-bus-usb?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-bus-usb</a></div><div class='hunk'>@@ -135,6 +135,17 @@ Description:</div><div class='ctx'> 		for the device and attempt to bind to it.  For example:</div><div class='ctx'> 		# echo "8086 10f5" &gt; /sys/bus/usb/drivers/foo/new_id</div><div class='ctx'> </div><div class='add'>+		Reading from this file will list all dynamically added</div><div class='add'>+		device IDs in the same format, with one entry per</div><div class='add'>+		line. For example:</div><div class='add'>+		# cat /sys/bus/usb/drivers/foo/new_id</div><div class='add'>+		8086 10f5</div><div class='add'>+		dead beef 06</div><div class='add'>+		f00d cafe</div><div class='add'>+</div><div class='add'>+		The list will be truncated at PAGE_SIZE bytes due to</div><div class='add'>+		sysfs restrictions.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/usb-serial/drivers/.../new_id</div><div class='ctx'> Date:		October 2011</div><div class='ctx'> Contact:	linux-usb@vger.kernel.org</div><div class='hunk'>@@ -157,6 +168,10 @@ Description:</div><div class='ctx'> 		match the driver to the device.  For example:</div><div class='ctx'> 		# echo "046d c315" &gt; /sys/bus/usb/drivers/foo/remove_id</div><div class='ctx'> </div><div class='add'>+		Reading from this file will list the dynamically added</div><div class='add'>+		device IDs, exactly like reading from the entry</div><div class='add'>+		"/sys/bus/usb/drivers/.../new_id"</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/usb/device/.../avoid_reset_quirk</div><div class='ctx'> Date:		December 2009</div><div class='ctx'> Contact:	Oliver Neukum &lt;oliver@neukum.org&gt;</div><div class='hunk'>@@ -189,7 +204,7 @@ Contact:	Matthew Garrett &lt;mjg@redhat.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Some information about whether a given USB device is</div><div class='ctx'> 		physically fixed to the platform can be inferred from a</div><div class='del'>-		combination of hub decriptor bits and platform-specific data</div><div class='add'>+		combination of hub descriptor bits and platform-specific data</div><div class='ctx'> 		such as ACPI. This file will read either "removable" or</div><div class='ctx'> 		"fixed" if the information is available, and "unknown"</div><div class='del'>-		otherwise.
\ No newline at end of file</div><div class='add'>+		otherwise.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-backlight-driver-lm3533 b/Documentation/ABI/testing/sysfs-class-backlight-driver-lm3533<br/>new file mode 100644<br/>index 000000000000..77cf7ac949af<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-backlight-driver-lm3533?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-class-backlight-driver-lm3533</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+What:		/sys/class/backlight/&lt;backlight&gt;/als_channel</div><div class='add'>+Date:		May 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Get the ALS output channel used as input in</div><div class='add'>+		ALS-current-control mode (0, 1), where</div><div class='add'>+</div><div class='add'>+		0 - out_current0 (backlight 0)</div><div class='add'>+		1 - out_current1 (backlight 1)</div><div class='add'>+</div><div class='add'>+What:		/sys/class/backlight/&lt;backlight&gt;/als_en</div><div class='add'>+Date:		May 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Enable ALS-current-control mode (0, 1).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/backlight/&lt;backlight&gt;/id</div><div class='add'>+Date:		April 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Get the id of this backlight (0, 1).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/backlight/&lt;backlight&gt;/linear</div><div class='add'>+Date:		April 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Set the brightness-mapping mode (0, 1), where</div><div class='add'>+</div><div class='add'>+		0 - exponential mode</div><div class='add'>+		1 - linear mode</div><div class='add'>+</div><div class='add'>+What:		/sys/class/backlight/&lt;backlight&gt;/pwm</div><div class='add'>+Date:		April 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Set the PWM-input control mask (5 bits), where</div><div class='add'>+</div><div class='add'>+		bit 5 - PWM-input enabled in Zone 4</div><div class='add'>+		bit 4 - PWM-input enabled in Zone 3</div><div class='add'>+		bit 3 - PWM-input enabled in Zone 2</div><div class='add'>+		bit 2 - PWM-input enabled in Zone 1</div><div class='add'>+		bit 1 - PWM-input enabled in Zone 0</div><div class='add'>+		bit 0 - PWM-input enabled</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-extcon b/Documentation/ABI/testing/sysfs-class-extcon<br/>new file mode 100644<br/>index 000000000000..20ab361bd8c6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-extcon?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-class-extcon</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+What:		/sys/class/extcon/.../</div><div class='add'>+Date:		February 2012</div><div class='add'>+Contact:	MyungJoo Ham &lt;myungjoo.ham@samsung.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Provide a place in sysfs for the extcon objects.</div><div class='add'>+		This allows accessing extcon specific variables.</div><div class='add'>+		The name of extcon object denoted as ... is the name given</div><div class='add'>+		with extcon_dev_register.</div><div class='add'>+</div><div class='add'>+		One extcon device denotes a single external connector</div><div class='add'>+		port. An external connector may have multiple cables</div><div class='add'>+		attached simultaneously. Many of docks, cradles, and</div><div class='add'>+		accessory cables have such capability. For example,</div><div class='add'>+		the 30-pin port of Nuri board (/arch/arm/mach-exynos)</div><div class='add'>+		may have both HDMI and Charger attached, or analog audio,</div><div class='add'>+		video, and USB cables attached simulteneously.</div><div class='add'>+</div><div class='add'>+		If there are cables mutually exclusive with each other,</div><div class='add'>+		such binary relations may be expressed with extcon_dev's</div><div class='add'>+		mutually_exclusive array.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/extcon/.../name</div><div class='add'>+Date:		February 2012</div><div class='add'>+Contact:	MyungJoo Ham &lt;myungjoo.ham@samsung.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/class/extcon/.../name shows the name of the extcon</div><div class='add'>+		object. If the extcon object has an optional callback</div><div class='add'>+		"show_name" defined, the callback will provide the name with</div><div class='add'>+		this sysfs node.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/extcon/.../state</div><div class='add'>+Date:		February 2012</div><div class='add'>+Contact:	MyungJoo Ham &lt;myungjoo.ham@samsung.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/class/extcon/.../state shows and stores the cable</div><div class='add'>+		attach/detach information of the corresponding extcon object.</div><div class='add'>+		If the extcon object has an optional callback "show_state"</div><div class='add'>+		defined, the showing function is overriden with the optional</div><div class='add'>+		callback.</div><div class='add'>+</div><div class='add'>+		If the default callback for showing function is used, the</div><div class='add'>+		format is like this:</div><div class='add'>+		# cat state</div><div class='add'>+		USB_OTG=1</div><div class='add'>+		HDMI=0</div><div class='add'>+		TA=1</div><div class='add'>+		EAR_JACK=0</div><div class='add'>+		#</div><div class='add'>+		In this example, the extcon device have USB_OTG and TA</div><div class='add'>+		cables attached and HDMI and EAR_JACK cables detached.</div><div class='add'>+</div><div class='add'>+		In order to update the state of an extcon device, enter a hex</div><div class='add'>+		state number starting with 0x.</div><div class='add'>+		 echo 0xHEX &gt; state</div><div class='add'>+</div><div class='add'>+		This updates the whole state of the extcon dev.</div><div class='add'>+		Inputs of all the methods are required to meet the</div><div class='add'>+		mutually_exclusive contidions if they exist.</div><div class='add'>+</div><div class='add'>+		It is recommended to use this "global" state interface if</div><div class='add'>+		you need to enter the value atomically. The later state</div><div class='add'>+		interface associated with each cable cannot update</div><div class='add'>+		multiple cable states of an extcon device simultaneously.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/extcon/.../cable.x/name</div><div class='add'>+Date:		February 2012</div><div class='add'>+Contact:	MyungJoo Ham &lt;myungjoo.ham@samsung.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/class/extcon/.../cable.x/name shows the name of cable</div><div class='add'>+		"x" (integer between 0 and 31) of an extcon device.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/extcon/.../cable.x/state</div><div class='add'>+Date:		February 2012</div><div class='add'>+Contact:	MyungJoo Ham &lt;myungjoo.ham@samsung.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/class/extcon/.../cable.x/name shows and stores the</div><div class='add'>+		state of cable "x" (integer between 0 and 31) of an extcon</div><div class='add'>+		device. The state value is either 0 (detached) or 1</div><div class='add'>+		(attached).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/extcon/.../mutually_exclusive/...</div><div class='add'>+Date:		December 2011</div><div class='add'>+Contact:	MyungJoo Ham &lt;myungjoo.ham@samsung.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Shows the relations of mutually exclusiveness. For example,</div><div class='add'>+		if the mutually_exclusive array of extcon_dev is</div><div class='add'>+		{0x3, 0x5, 0xC, 0x0}, the, the output is:</div><div class='add'>+		# ls mutually_exclusive/</div><div class='add'>+		0x3</div><div class='add'>+		0x5</div><div class='add'>+		0xc</div><div class='add'>+		#</div><div class='add'>+</div><div class='add'>+		Note that mutually_exclusive is a sub-directory of the extcon</div><div class='add'>+		device and the file names under the mutually_exclusive</div><div class='add'>+		directory show the mutually-exclusive sets, not the contents</div><div class='add'>+		of the files.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-led-driver-lm3533 b/Documentation/ABI/testing/sysfs-class-led-driver-lm3533<br/>new file mode 100644<br/>index 000000000000..620ebb3b9baa<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-led-driver-lm3533?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-class-led-driver-lm3533</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+What:		/sys/class/leds/&lt;led&gt;/als_channel</div><div class='add'>+Date:		May 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Set the ALS output channel to use as input in</div><div class='add'>+		ALS-current-control mode (1, 2), where</div><div class='add'>+</div><div class='add'>+		1 - out_current1</div><div class='add'>+		2 - out_current2</div><div class='add'>+</div><div class='add'>+What:		/sys/class/leds/&lt;led&gt;/als_en</div><div class='add'>+Date:		May 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Enable ALS-current-control mode (0, 1).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/leds/&lt;led&gt;/falltime</div><div class='add'>+What:		/sys/class/leds/&lt;led&gt;/risetime</div><div class='add'>+Date:		April 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Set the pattern generator fall and rise times (0..7), where</div><div class='add'>+</div><div class='add'>+		0 - 2048 us</div><div class='add'>+		1 - 262 ms</div><div class='add'>+		2 - 524 ms</div><div class='add'>+		3 - 1.049 s</div><div class='add'>+		4 - 2.097 s</div><div class='add'>+		5 - 4.194 s</div><div class='add'>+		6 - 8.389 s</div><div class='add'>+		7 - 16.78 s</div><div class='add'>+</div><div class='add'>+What:		/sys/class/leds/&lt;led&gt;/id</div><div class='add'>+Date:		April 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Get the id of this led (0..3).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/leds/&lt;led&gt;/linear</div><div class='add'>+Date:		April 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Set the brightness-mapping mode (0, 1), where</div><div class='add'>+</div><div class='add'>+		0 - exponential mode</div><div class='add'>+		1 - linear mode</div><div class='add'>+</div><div class='add'>+What:		/sys/class/leds/&lt;led&gt;/pwm</div><div class='add'>+Date:		April 2012</div><div class='add'>+KernelVersion:	3.5</div><div class='add'>+Contact:	Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Set the PWM-input control mask (5 bits), where</div><div class='add'>+</div><div class='add'>+		bit 5 - PWM-input enabled in Zone 4</div><div class='add'>+		bit 4 - PWM-input enabled in Zone 3</div><div class='add'>+		bit 3 - PWM-input enabled in Zone 2</div><div class='add'>+		bit 2 - PWM-input enabled in Zone 1</div><div class='add'>+		bit 1 - PWM-input enabled in Zone 0</div><div class='add'>+		bit 0 - PWM-input enabled</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-mtd b/Documentation/ABI/testing/sysfs-class-mtd<br/>index 4d55a1888981..db1ad7e34fc3 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-mtd?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/ABI/testing/sysfs-class-mtd</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-mtd?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-class-mtd</a></div><div class='hunk'>@@ -123,3 +123,54 @@ Description:</div><div class='ctx'> 		half page, or a quarter page).</div><div class='ctx'> </div><div class='ctx'> 		In the case of ECC NOR, it is the ECC block size.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/mtd/mtdX/ecc_strength</div><div class='add'>+Date:		April 2012</div><div class='add'>+KernelVersion:	3.4</div><div class='add'>+Contact:	linux-mtd@lists.infradead.org</div><div class='add'>+Description:</div><div class='add'>+		Maximum number of bit errors that the device is capable of</div><div class='add'>+		correcting within each region covering an ecc step.  This will</div><div class='add'>+		always be a non-negative integer.  Note that some devices will</div><div class='add'>+		have multiple ecc steps within each writesize region.</div><div class='add'>+</div><div class='add'>+		In the case of devices lacking any ECC capability, it is 0.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/mtd/mtdX/bitflip_threshold</div><div class='add'>+Date:		April 2012</div><div class='add'>+KernelVersion:	3.4</div><div class='add'>+Contact:	linux-mtd@lists.infradead.org</div><div class='add'>+Description:</div><div class='add'>+		This allows the user to examine and adjust the criteria by which</div><div class='add'>+		mtd returns -EUCLEAN from mtd_read().  If the maximum number of</div><div class='add'>+		bit errors that were corrected on any single region comprising</div><div class='add'>+		an ecc step (as reported by the driver) equals or exceeds this</div><div class='add'>+		value, -EUCLEAN is returned.  Otherwise, absent an error, 0 is</div><div class='add'>+		returned.  Higher layers (e.g., UBI) use this return code as an</div><div class='add'>+		indication that an erase block may be degrading and should be</div><div class='add'>+		scrutinized as a candidate for being marked as bad.</div><div class='add'>+</div><div class='add'>+		The initial value may be specified by the flash device driver.</div><div class='add'>+		If not, then the default value is ecc_strength.</div><div class='add'>+</div><div class='add'>+		The introduction of this feature brings a subtle change to the</div><div class='add'>+		meaning of the -EUCLEAN return code.  Previously, it was</div><div class='add'>+		interpreted to mean simply "one or more bit errors were</div><div class='add'>+		corrected".  Its new interpretation can be phrased as "a</div><div class='add'>+		dangerously high number of bit errors were corrected on one or</div><div class='add'>+		more regions comprising an ecc step".  The precise definition of</div><div class='add'>+		"dangerously high" can be adjusted by the user with</div><div class='add'>+		bitflip_threshold.  Users are discouraged from doing this,</div><div class='add'>+		however, unless they know what they are doing and have intimate</div><div class='add'>+		knowledge of the properties of their device.  Broadly speaking,</div><div class='add'>+		bitflip_threshold should be low enough to detect genuine erase</div><div class='add'>+		block degradation, but high enough to avoid the consequences of</div><div class='add'>+		a persistent return value of -EUCLEAN on devices where sticky</div><div class='add'>+		bitflips occur.  Note that if bitflip_threshold exceeds</div><div class='add'>+		ecc_strength, -EUCLEAN is never returned by mtd_read().</div><div class='add'>+		Conversely, if bitflip_threshold is zero, -EUCLEAN is always</div><div class='add'>+		returned, absent a hard error.</div><div class='add'>+</div><div class='add'>+		This is generally applicable only to NAND flash devices with ECC</div><div class='add'>+		capability.  It is ignored on devices lacking ECC capability;</div><div class='add'>+		i.e., devices for which ecc_strength is zero.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-net-mesh b/Documentation/ABI/testing/sysfs-class-net-mesh<br/>index b218e0f8bdb3..c81fe89c4c46 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-net-mesh?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/ABI/testing/sysfs-class-net-mesh</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-class-net-mesh?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-class-net-mesh</a></div><div class='hunk'>@@ -14,6 +14,15 @@ Description:</div><div class='ctx'>                 mesh will be sent using multiple interfaces at the</div><div class='ctx'>                 same time (if available).</div><div class='ctx'> </div><div class='add'>+What:           /sys/class/net/&lt;mesh_iface&gt;/mesh/bridge_loop_avoidance</div><div class='add'>+Date:           November 2011</div><div class='add'>+Contact:        Simon Wunderlich &lt;siwu@hrz.tu-chemnitz.de&gt;</div><div class='add'>+Description:</div><div class='add'>+                Indicates whether the bridge loop avoidance feature</div><div class='add'>+                is enabled. This feature detects and avoids loops</div><div class='add'>+                between the mesh and devices bridged with the soft</div><div class='add'>+                interface &lt;mesh_iface&gt;.</div><div class='add'>+</div><div class='ctx'> What:           /sys/class/net/&lt;mesh_iface&gt;/mesh/fragmentation</div><div class='ctx'> Date:           October 2010</div><div class='ctx'> Contact:        Andreas Langer &lt;an.langer@gmx.de&gt;</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-power b/Documentation/ABI/testing/sysfs-devices-power<br/>index 840f7d64d483..45000f0db4d4 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-devices-power?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/ABI/testing/sysfs-devices-power</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-devices-power?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-devices-power</a></div><div class='hunk'>@@ -96,16 +96,26 @@ Description:</div><div class='ctx'> 		is read-only.  If the device is not enabled to wake up the</div><div class='ctx'> 		system from sleep states, this attribute is not present.</div><div class='ctx'> </div><div class='del'>-What:		/sys/devices/.../power/wakeup_hit_count</div><div class='del'>-Date:		September 2010</div><div class='add'>+What:		/sys/devices/.../power/wakeup_abort_count</div><div class='add'>+Date:		February 2012</div><div class='ctx'> Contact:	Rafael J. Wysocki &lt;rjw@sisk.pl&gt;</div><div class='ctx'> Description:</div><div class='del'>-		The /sys/devices/.../wakeup_hit_count attribute contains the</div><div class='add'>+		The /sys/devices/.../wakeup_abort_count attribute contains the</div><div class='ctx'> 		number of times the processing of a wakeup event associated with</div><div class='del'>-		the device might prevent the system from entering a sleep state.</div><div class='del'>-		This attribute is read-only.  If the device is not enabled to</div><div class='del'>-		wake up the system from sleep states, this attribute is not</div><div class='del'>-		present.</div><div class='add'>+		the device might have aborted system transition into a sleep</div><div class='add'>+		state in progress.  This attribute is read-only.  If the device</div><div class='add'>+		is not enabled to wake up the system from sleep states, this</div><div class='add'>+		attribute is not present.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/.../power/wakeup_expire_count</div><div class='add'>+Date:		February 2012</div><div class='add'>+Contact:	Rafael J. Wysocki &lt;rjw@sisk.pl&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/devices/.../wakeup_expire_count attribute contains the</div><div class='add'>+		number of times a wakeup event associated with the device has</div><div class='add'>+		been reported with a timeout that expired.  This attribute is</div><div class='add'>+		read-only.  If the device is not enabled to wake up the system</div><div class='add'>+		from sleep states, this attribute is not present.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/devices/.../power/wakeup_active</div><div class='ctx'> Date:		September 2010</div><div class='hunk'>@@ -148,6 +158,17 @@ Description:</div><div class='ctx'> 		not enabled to wake up the system from sleep states, this</div><div class='ctx'> 		attribute is not present.</div><div class='ctx'> </div><div class='add'>+What:		/sys/devices/.../power/wakeup_prevent_sleep_time_ms</div><div class='add'>+Date:		February 2012</div><div class='add'>+Contact:	Rafael J. Wysocki &lt;rjw@sisk.pl&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/devices/.../wakeup_prevent_sleep_time_ms attribute</div><div class='add'>+		contains the total time the device has been preventing</div><div class='add'>+		opportunistic transitions to sleep states from occuring.</div><div class='add'>+		This attribute is read-only.  If the device is not enabled to</div><div class='add'>+		wake up the system from sleep states, this attribute is not</div><div class='add'>+		present.</div><div class='add'>+</div><div class='ctx'> What:		/sys/devices/.../power/autosuspend_delay_ms</div><div class='ctx'> Date:		September 2010</div><div class='ctx'> Contact:	Alan Stern &lt;stern@rowland.harvard.edu&gt;</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu<br/>index e7be75b96e4b..5dab36448b44 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-devices-system-cpu?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/ABI/testing/sysfs-devices-system-cpu</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-devices-system-cpu?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-devices-system-cpu</a></div><div class='hunk'>@@ -9,31 +9,6 @@ Description:</div><div class='ctx'> </div><div class='ctx'> 		/sys/devices/system/cpu/cpu#/</div><div class='ctx'> </div><div class='del'>-What:		/sys/devices/system/cpu/sched_mc_power_savings</div><div class='del'>-		/sys/devices/system/cpu/sched_smt_power_savings</div><div class='del'>-Date:		June 2006</div><div class='del'>-Contact:	Linux kernel mailing list &lt;linux-kernel@vger.kernel.org&gt;</div><div class='del'>-Description:	Discover and adjust the kernel's multi-core scheduler support.</div><div class='del'>-</div><div class='del'>-		Possible values are:</div><div class='del'>-</div><div class='del'>-		0 - No power saving load balance (default value)</div><div class='del'>-		1 - Fill one thread/core/package first for long running threads</div><div class='del'>-		2 - Also bias task wakeups to semi-idle cpu package for power</div><div class='del'>-		    savings</div><div class='del'>-</div><div class='del'>-		sched_mc_power_savings is dependent upon SCHED_MC, which is</div><div class='del'>-		itself architecture dependent.</div><div class='del'>-</div><div class='del'>-		sched_smt_power_savings is dependent upon SCHED_SMT, which</div><div class='del'>-		is itself architecture dependent.</div><div class='del'>-</div><div class='del'>-		The two files are independent of each other. It is possible</div><div class='del'>-		that one file may be present without the other.</div><div class='del'>-</div><div class='del'>-		Introduced by git commit 5c45bf27.</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> What:		/sys/devices/system/cpu/kernel_max</div><div class='ctx'> 		/sys/devices/system/cpu/offline</div><div class='ctx'> 		/sys/devices/system/cpu/online</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-wacom b/Documentation/ABI/testing/sysfs-driver-wacom<br/>index 0130d6683c14..8d55a83d6921 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-driver-wacom?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/ABI/testing/sysfs-driver-wacom</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-driver-wacom?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-driver-wacom</a></div><div class='hunk'>@@ -9,15 +9,24 @@ Description:</div><div class='ctx'> 		or 0 otherwise. Writing to this file one of these values</div><div class='ctx'> 		switches reporting speed.</div><div class='ctx'> </div><div class='add'>+What:		/sys/class/leds/0005\:056A\:00BD.0001\:selector\:*/</div><div class='add'>+Date:		May 2012</div><div class='add'>+Kernel Version:	3.5</div><div class='add'>+Contact:	linux-bluetooth@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		LED selector for Intuos4 WL. There are 4 leds, but only one LED</div><div class='add'>+		can be lit at a time. Max brightness is 127.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/usb/devices/&lt;busnum&gt;-&lt;devnum&gt;:&lt;cfg&gt;.&lt;intf&gt;/wacom_led/led</div><div class='ctx'> Date:		August 2011</div><div class='ctx'> Contact:	linux-input@vger.kernel.org</div><div class='ctx'> Description:</div><div class='ctx'> 		Attribute group for control of the status LEDs and the OLEDs.</div><div class='ctx'> 		This attribute group is only available for Intuos 4 M, L,</div><div class='del'>-		and XL (with LEDs and OLEDs) and Cintiq 21UX2 and Cintiq 24HD</div><div class='del'>-		(LEDs only). Therefore its presence implicitly signifies the</div><div class='del'>-		presence of said LEDs and OLEDs on the tablet device.</div><div class='add'>+		and XL (with LEDs and OLEDs), Intuos 5 (LEDs only), and Cintiq</div><div class='add'>+		21UX2 and Cintiq 24HD (LEDs only). Therefore its presence</div><div class='add'>+		implicitly signifies the presence of said LEDs and OLEDs on the</div><div class='add'>+		tablet device.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/usb/devices/&lt;busnum&gt;-&lt;devnum&gt;:&lt;cfg&gt;.&lt;intf&gt;/wacom_led/status0_luminance</div><div class='ctx'> Date:		August 2011</div><div class='hunk'>@@ -40,10 +49,10 @@ What:		/sys/bus/usb/devices/&lt;busnum&gt;-&lt;devnum&gt;:&lt;cfg&gt;.&lt;intf&gt;/wacom_led/status_led0</div><div class='ctx'> Date:		August 2011</div><div class='ctx'> Contact:	linux-input@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		Writing to this file sets which one of the four (for Intuos 4)</div><div class='del'>-		or of the right four (for Cintiq 21UX2 and Cintiq 24HD) status</div><div class='del'>-		LEDs is active (0..3). The other three LEDs on the same side are</div><div class='del'>-		always inactive.</div><div class='add'>+		Writing to this file sets which one of the four (for Intuos 4</div><div class='add'>+		and Intuos 5) or of the right four (for Cintiq 21UX2 and Cintiq</div><div class='add'>+		24HD) status LEDs is active (0..3). The other three LEDs on the</div><div class='add'>+		same side are always inactive.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/usb/devices/&lt;busnum&gt;-&lt;devnum&gt;:&lt;cfg&gt;.&lt;intf&gt;/wacom_led/status_led1_select</div><div class='ctx'> Date:		September 2011</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-power b/Documentation/ABI/testing/sysfs-power<br/>index b464d12761ba..31725ffeeb3a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-power?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/ABI/testing/sysfs-power</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ABI/testing/sysfs-power?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ABI/testing/sysfs-power</a></div><div class='hunk'>@@ -172,3 +172,62 @@ Description:</div><div class='ctx'> </div><div class='ctx'> 		Reading from this file will display the current value, which is</div><div class='ctx'> 		set to 1 MB by default.</div><div class='add'>+</div><div class='add'>+What:		/sys/power/autosleep</div><div class='add'>+Date:		April 2012</div><div class='add'>+Contact:	Rafael J. Wysocki &lt;rjw@sisk.pl&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/power/autosleep file can be written one of the strings</div><div class='add'>+		returned by reads from /sys/power/state.  If that happens, a</div><div class='add'>+		work item attempting to trigger a transition of the system to</div><div class='add'>+		the sleep state represented by that string is queued up.  This</div><div class='add'>+		attempt will only succeed if there are no active wakeup sources</div><div class='add'>+		in the system at that time.  After every execution, regardless</div><div class='add'>+		of whether or not the attempt to put the system to sleep has</div><div class='add'>+		succeeded, the work item requeues itself until user space</div><div class='add'>+		writes "off" to /sys/power/autosleep.</div><div class='add'>+</div><div class='add'>+		Reading from this file causes the last string successfully</div><div class='add'>+		written to it to be returned.</div><div class='add'>+</div><div class='add'>+What:		/sys/power/wake_lock</div><div class='add'>+Date:		February 2012</div><div class='add'>+Contact:	Rafael J. Wysocki &lt;rjw@sisk.pl&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/power/wake_lock file allows user space to create</div><div class='add'>+		wakeup source objects and activate them on demand (if one of</div><div class='add'>+		those wakeup sources is active, reads from the</div><div class='add'>+		/sys/power/wakeup_count file block or return false).  When a</div><div class='add'>+		string without white space is written to /sys/power/wake_lock,</div><div class='add'>+		it will be assumed to represent a wakeup source name.  If there</div><div class='add'>+		is a wakeup source object with that name, it will be activated</div><div class='add'>+		(unless active already).  Otherwise, a new wakeup source object</div><div class='add'>+		will be registered, assigned the given name and activated.</div><div class='add'>+		If a string written to /sys/power/wake_lock contains white</div><div class='add'>+		space, the part of the string preceding the white space will be</div><div class='add'>+		regarded as a wakeup source name and handled as descrived above.</div><div class='add'>+		The other part of the string will be regarded as a timeout (in</div><div class='add'>+		nanoseconds) such that the wakeup source will be automatically</div><div class='add'>+		deactivated after it has expired.  The timeout, if present, is</div><div class='add'>+		set regardless of the current state of the wakeup source object</div><div class='add'>+		in question.</div><div class='add'>+</div><div class='add'>+		Reads from this file return a string consisting of the names of</div><div class='add'>+		wakeup sources created with the help of it that are active at</div><div class='add'>+		the moment, separated with spaces.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/power/wake_unlock</div><div class='add'>+Date:		February 2012</div><div class='add'>+Contact:	Rafael J. Wysocki &lt;rjw@sisk.pl&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/power/wake_unlock file allows user space to deactivate</div><div class='add'>+		wakeup sources created with the help of /sys/power/wake_lock.</div><div class='add'>+		When a string is written to /sys/power/wake_unlock, it will be</div><div class='add'>+		assumed to represent the name of a wakeup source to deactivate.</div><div class='add'>+		If a wakeup source object of that name exists and is active at</div><div class='add'>+		the moment, it will be deactivated.</div><div class='add'>+</div><div class='add'>+		Reads from this file return a string consisting of the names of</div><div class='add'>+		wakeup sources created with the help of /sys/power/wake_lock</div><div class='add'>+		that are inactive at the moment, separated with spaces.</div><div class='head'>diff --git a/Documentation/CodingStyle b/Documentation/CodingStyle<br/>index c58b236bbe04..cb9258b8fd35 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/CodingStyle?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/CodingStyle</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/CodingStyle?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/CodingStyle</a></div><div class='hunk'>@@ -671,8 +671,9 @@ ones already enabled by DEBUG.</div><div class='ctx'> 		Chapter 14: Allocating memory</div><div class='ctx'> </div><div class='ctx'> The kernel provides the following general purpose memory allocators:</div><div class='del'>-kmalloc(), kzalloc(), kcalloc(), vmalloc(), and vzalloc().  Please refer to</div><div class='del'>-the API documentation for further information about them.</div><div class='add'>+kmalloc(), kzalloc(), kmalloc_array(), kcalloc(), vmalloc(), and</div><div class='add'>+vzalloc().  Please refer to the API documentation for further information</div><div class='add'>+about them.</div><div class='ctx'> </div><div class='ctx'> The preferred form for passing a size of a struct is the following:</div><div class='ctx'> </div><div class='hunk'>@@ -686,6 +687,17 @@ Casting the return value which is a void pointer is redundant. The conversion</div><div class='ctx'> from void pointer to any other pointer type is guaranteed by the C programming</div><div class='ctx'> language.</div><div class='ctx'> </div><div class='add'>+The preferred form for allocating an array is the following:</div><div class='add'>+</div><div class='add'>+	p = kmalloc_array(n, sizeof(...), ...);</div><div class='add'>+</div><div class='add'>+The preferred form for allocating a zeroed array is the following:</div><div class='add'>+</div><div class='add'>+	p = kcalloc(n, sizeof(...), ...);</div><div class='add'>+</div><div class='add'>+Both forms check for overflow on the allocation size n * sizeof(...),</div><div class='add'>+and return NULL if that occurred.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 		Chapter 15: The inline disease</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/DocBook/80211.tmpl b/Documentation/DocBook/80211.tmpl<br/>index c5ac6929c41c..f3e214f9e256 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/80211.tmpl?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/80211.tmpl</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/80211.tmpl?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/80211.tmpl</a></div><div class='hunk'>@@ -516,7 +516,7 @@</div><div class='ctx'> !Finclude/net/mac80211.h ieee80211_start_tx_ba_cb_irqsafe</div><div class='ctx'> !Finclude/net/mac80211.h ieee80211_stop_tx_ba_session</div><div class='ctx'> !Finclude/net/mac80211.h ieee80211_stop_tx_ba_cb_irqsafe</div><div class='del'>-!Finclude/net/mac80211.h rate_control_changed</div><div class='add'>+!Finclude/net/mac80211.h ieee80211_rate_control_changed</div><div class='ctx'> !Finclude/net/mac80211.h ieee80211_tx_rate_control</div><div class='ctx'> !Finclude/net/mac80211.h rate_control_send_low</div><div class='ctx'>       &lt;/chapter&gt;</div><div class='head'>diff --git a/Documentation/DocBook/Makefile b/Documentation/DocBook/Makefile<br/>index 66725a3d30dc..bc3d9f8c0a90 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/Makefile</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> # To add a new book the only step required is to add the book to the</div><div class='ctx'> # list of DOCBOOKS.</div><div class='ctx'> </div><div class='del'>-DOCBOOKS := z8530book.xml mcabook.xml device-drivers.xml \</div><div class='add'>+DOCBOOKS := z8530book.xml device-drivers.xml \</div><div class='ctx'> 	    kernel-hacking.xml kernel-locking.xml deviceiobook.xml \</div><div class='ctx'> 	    writing_usb_driver.xml networking.xml \</div><div class='ctx'> 	    kernel-api.xml filesystems.xml lsm.xml usb.xml kgdb.xml \</div><div class='head'>diff --git a/Documentation/DocBook/kernel-api.tmpl b/Documentation/DocBook/kernel-api.tmpl<br/>index 7160652a8736..00687ee9d363 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/kernel-api.tmpl?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/kernel-api.tmpl</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/kernel-api.tmpl?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/kernel-api.tmpl</a></div><div class='hunk'>@@ -212,19 +212,6 @@ X!Edrivers/pci/hotplug.c</div><div class='ctx'>      &lt;sect1&gt;&lt;title&gt;PCI Hotplug Support Library&lt;/title&gt;</div><div class='ctx'> !Edrivers/pci/hotplug/pci_hotplug_core.c</div><div class='ctx'>      &lt;/sect1&gt;</div><div class='del'>-     &lt;sect1&gt;&lt;title&gt;MCA Architecture&lt;/title&gt;</div><div class='del'>-	&lt;sect2&gt;&lt;title&gt;MCA Device Functions&lt;/title&gt;</div><div class='del'>-           &lt;para&gt;</div><div class='del'>-              Refer to the file arch/x86/kernel/mca_32.c for more information.</div><div class='del'>-           &lt;/para&gt;</div><div class='del'>-&lt;!-- FIXME: Removed for now since no structured comments in source</div><div class='del'>-X!Earch/x86/kernel/mca_32.c</div><div class='del'>---&gt;</div><div class='del'>-	&lt;/sect2&gt;</div><div class='del'>-	&lt;sect2&gt;&lt;title&gt;MCA Bus DMA&lt;/title&gt;</div><div class='del'>-!Iarch/x86/include/asm/mca_dma.h</div><div class='del'>-	&lt;/sect2&gt;</div><div class='del'>-     &lt;/sect1&gt;</div><div class='ctx'>   &lt;/chapter&gt;</div><div class='ctx'> </div><div class='ctx'>   &lt;chapter id="firmware"&gt;</div><div class='head'>diff --git a/Documentation/DocBook/kernel-hacking.tmpl b/Documentation/DocBook/kernel-hacking.tmpl<br/>index 07a9c48de5a2..eee71426ecb8 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/kernel-hacking.tmpl?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/kernel-hacking.tmpl</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/kernel-hacking.tmpl?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/kernel-hacking.tmpl</a></div><div class='hunk'>@@ -1289,7 +1289,7 @@ static struct block_device_operations opt_fops = {</div><div class='ctx'>  * Sparc assembly will do this to ya.</div><div class='ctx'>  */</div><div class='ctx'> C_LABEL(cputypvar):</div><div class='del'>-        .asciz "compatability"</div><div class='add'>+        .asciz "compatibility"</div><div class='ctx'> </div><div class='ctx'> /* Tested on SS-5, SS-10. Probably someone at Sun applied a spell-checker. */</div><div class='ctx'>         .align 4</div><div class='head'>diff --git a/Documentation/DocBook/libata.tmpl b/Documentation/DocBook/libata.tmpl<br/>index 31df1aa00710..deb71baed328 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/libata.tmpl?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/libata.tmpl</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/libata.tmpl?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/libata.tmpl</a></div><div class='hunk'>@@ -918,7 +918,7 @@ and other resources, etc.</div><div class='ctx'>         &lt;title&gt;HSM violation&lt;/title&gt;</div><div class='ctx'>         &lt;para&gt;</div><div class='ctx'>         This error is indicated when STATUS value doesn't match HSM</div><div class='del'>-        requirement during issuing or excution any ATA/ATAPI command.</div><div class='add'>+        requirement during issuing or execution any ATA/ATAPI command.</div><div class='ctx'>         &lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'> 	&lt;itemizedlist&gt;</div><div class='head'>diff --git a/Documentation/DocBook/mcabook.tmpl b/Documentation/DocBook/mcabook.tmpl<br/>deleted file mode 100644<br/>index 467ccac6ec50..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/mcabook.tmpl?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/mcabook.tmpl</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,107 +0,0 @@</div><div class='del'>-&lt;?xml version="1.0" encoding="UTF-8"?&gt;</div><div class='del'>-&lt;!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"</div><div class='del'>-	"http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []&gt;</div><div class='del'>-</div><div class='del'>-&lt;book id="MCAGuide"&gt;</div><div class='del'>- &lt;bookinfo&gt;</div><div class='del'>-  &lt;title&gt;MCA Driver Programming Interface&lt;/title&gt;</div><div class='del'>-  </div><div class='del'>-  &lt;authorgroup&gt;</div><div class='del'>-   &lt;author&gt;</div><div class='del'>-    &lt;firstname&gt;Alan&lt;/firstname&gt;</div><div class='del'>-    &lt;surname&gt;Cox&lt;/surname&gt;</div><div class='del'>-    &lt;affiliation&gt;</div><div class='del'>-     &lt;address&gt;</div><div class='del'>-      &lt;email&gt;alan@lxorguk.ukuu.org.uk&lt;/email&gt;</div><div class='del'>-     &lt;/address&gt;</div><div class='del'>-    &lt;/affiliation&gt;</div><div class='del'>-   &lt;/author&gt;</div><div class='del'>-   &lt;author&gt;</div><div class='del'>-    &lt;firstname&gt;David&lt;/firstname&gt;</div><div class='del'>-    &lt;surname&gt;Weinehall&lt;/surname&gt;</div><div class='del'>-   &lt;/author&gt;</div><div class='del'>-   &lt;author&gt;</div><div class='del'>-    &lt;firstname&gt;Chris&lt;/firstname&gt;</div><div class='del'>-    &lt;surname&gt;Beauregard&lt;/surname&gt;</div><div class='del'>-   &lt;/author&gt;</div><div class='del'>-  &lt;/authorgroup&gt;</div><div class='del'>-</div><div class='del'>-  &lt;copyright&gt;</div><div class='del'>-   &lt;year&gt;2000&lt;/year&gt;</div><div class='del'>-   &lt;holder&gt;Alan Cox&lt;/holder&gt;</div><div class='del'>-   &lt;holder&gt;David Weinehall&lt;/holder&gt;</div><div class='del'>-   &lt;holder&gt;Chris Beauregard&lt;/holder&gt;</div><div class='del'>-  &lt;/copyright&gt;</div><div class='del'>-</div><div class='del'>-  &lt;legalnotice&gt;</div><div class='del'>-   &lt;para&gt;</div><div class='del'>-     This documentation is free software; you can redistribute</div><div class='del'>-     it and/or modify it under the terms of the GNU General Public</div><div class='del'>-     License as published by the Free Software Foundation; either</div><div class='del'>-     version 2 of the License, or (at your option) any later</div><div class='del'>-     version.</div><div class='del'>-   &lt;/para&gt;</div><div class='del'>-      </div><div class='del'>-   &lt;para&gt;</div><div class='del'>-     This program is distributed in the hope that it will be</div><div class='del'>-     useful, but WITHOUT ANY WARRANTY; without even the implied</div><div class='del'>-     warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.</div><div class='del'>-     See the GNU General Public License for more details.</div><div class='del'>-   &lt;/para&gt;</div><div class='del'>-      </div><div class='del'>-   &lt;para&gt;</div><div class='del'>-     You should have received a copy of the GNU General Public</div><div class='del'>-     License along with this program; if not, write to the Free</div><div class='del'>-     Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,</div><div class='del'>-     MA 02111-1307 USA</div><div class='del'>-   &lt;/para&gt;</div><div class='del'>-      </div><div class='del'>-   &lt;para&gt;</div><div class='del'>-     For more details see the file COPYING in the source</div><div class='del'>-     distribution of Linux.</div><div class='del'>-   &lt;/para&gt;</div><div class='del'>-  &lt;/legalnotice&gt;</div><div class='del'>- &lt;/bookinfo&gt;</div><div class='del'>-</div><div class='del'>-&lt;toc&gt;&lt;/toc&gt;</div><div class='del'>-</div><div class='del'>-  &lt;chapter id="intro"&gt;</div><div class='del'>-      &lt;title&gt;Introduction&lt;/title&gt;</div><div class='del'>-  &lt;para&gt;</div><div class='del'>-	The MCA bus functions provide a generalised interface to find MCA</div><div class='del'>-	bus cards, to claim them for a driver, and to read and manipulate POS </div><div class='del'>-	registers without being aware of the motherboard internals or </div><div class='del'>-	certain deep magic specific to onboard devices.</div><div class='del'>-  &lt;/para&gt;</div><div class='del'>-  &lt;para&gt;</div><div class='del'>-	The basic interface to the MCA bus devices is the slot. Each slot</div><div class='del'>-	is numbered and virtual slot numbers are assigned to the internal</div><div class='del'>-	devices. Using a pci_dev as other busses do does not really make</div><div class='del'>-	sense in the MCA context as the MCA bus resources require card</div><div class='del'>-	specific interpretation.</div><div class='del'>-  &lt;/para&gt;</div><div class='del'>-  &lt;para&gt;</div><div class='del'>-	Finally the MCA bus functions provide a parallel set of DMA</div><div class='del'>-	functions mimicing the ISA bus DMA functions as closely as possible,</div><div class='del'>-	although also supporting the additional DMA functionality on the</div><div class='del'>-	MCA bus controllers.</div><div class='del'>-  &lt;/para&gt;</div><div class='del'>-  &lt;/chapter&gt;</div><div class='del'>-  &lt;chapter id="bugs"&gt;</div><div class='del'>-     &lt;title&gt;Known Bugs And Assumptions&lt;/title&gt;</div><div class='del'>-  &lt;para&gt;</div><div class='del'>-	None.	</div><div class='del'>-  &lt;/para&gt;</div><div class='del'>-  &lt;/chapter&gt;</div><div class='del'>-</div><div class='del'>-  &lt;chapter id="pubfunctions"&gt;</div><div class='del'>-     &lt;title&gt;Public Functions Provided&lt;/title&gt;</div><div class='del'>-!Edrivers/mca/mca-legacy.c</div><div class='del'>-  &lt;/chapter&gt;</div><div class='del'>-</div><div class='del'>-  &lt;chapter id="dmafunctions"&gt;</div><div class='del'>-     &lt;title&gt;DMA Functions Provided&lt;/title&gt;</div><div class='del'>-!Iarch/x86/include/asm/mca_dma.h</div><div class='del'>-  &lt;/chapter&gt;</div><div class='del'>-</div><div class='del'>-&lt;/book&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/Makefile b/Documentation/DocBook/media/Makefile<br/>index 6628b4b9cac4..362520992ced 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/Makefile</a></div><div class='hunk'>@@ -70,6 +70,8 @@ IOCTLS = \</div><div class='ctx'> 	VIDIOC_SUBDEV_ENUM_MBUS_CODE \</div><div class='ctx'> 	VIDIOC_SUBDEV_ENUM_FRAME_SIZE \</div><div class='ctx'> 	VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL \</div><div class='add'>+	VIDIOC_SUBDEV_G_SELECTION \</div><div class='add'>+	VIDIOC_SUBDEV_S_SELECTION \</div><div class='ctx'> </div><div class='ctx'> TYPES = \</div><div class='ctx'> 	$(shell perl -ne 'print "$$1 " if /^typedef\s+[^\s]+\s+([^\s]+)\;/' $(srctree)/include/linux/videodev2.h) \</div><div class='hunk'>@@ -193,7 +195,7 @@ DVB_DOCUMENTED = \</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> install_media_images = \</div><div class='del'>-	$(Q)cp $(OBJIMGFILES) $(MEDIA_OBJ_DIR)/media_api</div><div class='add'>+	$(Q)cp $(OBJIMGFILES) $(MEDIA_SRC_DIR)/v4l/*.svg $(MEDIA_OBJ_DIR)/media_api</div><div class='ctx'> </div><div class='ctx'> $(MEDIA_OBJ_DIR)/%: $(MEDIA_SRC_DIR)/%.b64</div><div class='ctx'> 	$(Q)base64 -d $&lt; &gt;$@</div><div class='head'>diff --git a/Documentation/DocBook/media/dvb/dvbproperty.xml b/Documentation/DocBook/media/dvb/dvbproperty.xml<br/>index c7a4ca517859..e633c097a8d1 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/dvbproperty.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/dvb/dvbproperty.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/dvb/dvbproperty.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/dvb/dvbproperty.xml</a></div><div class='hunk'>@@ -531,6 +531,139 @@ typedef enum fe_delivery_system {</div><div class='ctx'> 				here are referring to what can be found in the TMCC-structure -</div><div class='ctx'> 				independent of the mode.&lt;/para&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-FIC-VER"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_FIC_VER&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;Version number of the FIC (Fast Information Channel) signaling data.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;FIC is used for relaying information to allow rapid service acquisition by the receiver.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values: 0, 1, 2, 3, ..., 30, 31&lt;/para&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-PARADE-ID"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_PARADE_ID&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;Parade identification number&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;A parade is a collection of up to eight MH groups, conveying one or two ensembles.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values: 0, 1, 2, 3, ..., 126, 127&lt;/para&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-NOG"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_NOG&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;Number of MH groups per MH subframe for a designated parade.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values: 1, 2, 3, 4, 5, 6, 7, 8&lt;/para&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-TNOG"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_TNOG&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;Total number of MH groups including all MH groups belonging to all MH parades in one MH subframe.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values: 0, 1, 2, 3, ..., 30, 31&lt;/para&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-SGN"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_SGN&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;Start group number.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values: 0, 1, 2, 3, ..., 14, 15&lt;/para&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-PRC"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_PRC&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;Parade repetition cycle.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values: 1, 2, 3, 4, 5, 6, 7, 8&lt;/para&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-RS-FRAME-MODE"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_RS_FRAME_MODE&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;RS frame mode.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+typedef enum atscmh_rs_frame_mode {</div><div class='add'>+	ATSCMH_RSFRAME_PRI_ONLY  = 0,</div><div class='add'>+	ATSCMH_RSFRAME_PRI_SEC   = 1,</div><div class='add'>+} atscmh_rs_frame_mode_t;</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-RS-FRAME-ENSEMBLE"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_RS_FRAME_ENSEMBLE&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;RS frame ensemble.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+typedef enum atscmh_rs_frame_ensemble {</div><div class='add'>+	ATSCMH_RSFRAME_ENS_PRI   = 0,</div><div class='add'>+	ATSCMH_RSFRAME_ENS_SEC   = 1,</div><div class='add'>+} atscmh_rs_frame_ensemble_t;</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-RS-CODE-MODE-PRI"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_RS_CODE_MODE_PRI&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;RS code mode (primary).&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+typedef enum atscmh_rs_code_mode {</div><div class='add'>+	ATSCMH_RSCODE_211_187    = 0,</div><div class='add'>+	ATSCMH_RSCODE_223_187    = 1,</div><div class='add'>+	ATSCMH_RSCODE_235_187    = 2,</div><div class='add'>+} atscmh_rs_code_mode_t;</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-RS-CODE-MODE-SEC"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_RS_CODE_MODE_SEC&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;RS code mode (secondary).&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+typedef enum atscmh_rs_code_mode {</div><div class='add'>+	ATSCMH_RSCODE_211_187    = 0,</div><div class='add'>+	ATSCMH_RSCODE_223_187    = 1,</div><div class='add'>+	ATSCMH_RSCODE_235_187    = 2,</div><div class='add'>+} atscmh_rs_code_mode_t;</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-SCCC-BLOCK-MODE"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_BLOCK_MODE&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;Series Concatenated Convolutional Code Block Mode.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+typedef enum atscmh_sccc_block_mode {</div><div class='add'>+	ATSCMH_SCCC_BLK_SEP      = 0,</div><div class='add'>+	ATSCMH_SCCC_BLK_COMB     = 1,</div><div class='add'>+} atscmh_sccc_block_mode_t;</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-SCCC-CODE-MODE-A"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_CODE_MODE_A&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;Series Concatenated Convolutional Code Rate.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+typedef enum atscmh_sccc_code_mode {</div><div class='add'>+	ATSCMH_SCCC_CODE_HLF     = 0,</div><div class='add'>+	ATSCMH_SCCC_CODE_QTR     = 1,</div><div class='add'>+} atscmh_sccc_code_mode_t;</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-SCCC-CODE-MODE-B"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_CODE_MODE_B&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;Series Concatenated Convolutional Code Rate.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+typedef enum atscmh_sccc_code_mode {</div><div class='add'>+	ATSCMH_SCCC_CODE_HLF     = 0,</div><div class='add'>+	ATSCMH_SCCC_CODE_QTR     = 1,</div><div class='add'>+} atscmh_sccc_code_mode_t;</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-SCCC-CODE-MODE-C"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_CODE_MODE_C&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;Series Concatenated Convolutional Code Rate.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+typedef enum atscmh_sccc_code_mode {</div><div class='add'>+	ATSCMH_SCCC_CODE_HLF     = 0,</div><div class='add'>+	ATSCMH_SCCC_CODE_QTR     = 1,</div><div class='add'>+} atscmh_sccc_code_mode_t;</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='add'>+		&lt;section id="DTV-ATSCMH-SCCC-CODE-MODE-D"&gt;</div><div class='add'>+			&lt;title&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_CODE_MODE_D&lt;/constant&gt;&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;Series Concatenated Convolutional Code Rate.&lt;/para&gt;</div><div class='add'>+			&lt;para&gt;Possible values are:&lt;/para&gt;</div><div class='add'>+&lt;programlisting&gt;</div><div class='add'>+typedef enum atscmh_sccc_code_mode {</div><div class='add'>+	ATSCMH_SCCC_CODE_HLF     = 0,</div><div class='add'>+	ATSCMH_SCCC_CODE_QTR     = 1,</div><div class='add'>+} atscmh_sccc_code_mode_t;</div><div class='add'>+&lt;/programlisting&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="DTV-API-VERSION"&gt;</div><div class='ctx'> 	&lt;title&gt;&lt;constant&gt;DTV_API_VERSION&lt;/constant&gt;&lt;/title&gt;</div><div class='hunk'>@@ -774,6 +907,33 @@ typedef enum fe_hierarchy {</div><div class='ctx'> 				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-BANDWIDTH-HZ"&gt;&lt;constant&gt;DTV_BANDWIDTH_HZ&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='ctx'> 			&lt;/itemizedlist&gt;</div><div class='ctx'> 		&lt;/section&gt;</div><div class='add'>+		&lt;section id="atscmh-params"&gt;</div><div class='add'>+			&lt;title&gt;ATSC-MH delivery system&lt;/title&gt;</div><div class='add'>+			&lt;para&gt;The following parameters are valid for ATSC-MH:&lt;/para&gt;</div><div class='add'>+			&lt;itemizedlist mark='opencircle'&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-API-VERSION"&gt;&lt;constant&gt;DTV_API_VERSION&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-DELIVERY-SYSTEM"&gt;&lt;constant&gt;DTV_DELIVERY_SYSTEM&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-TUNE"&gt;&lt;constant&gt;DTV_TUNE&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-CLEAR"&gt;&lt;constant&gt;DTV_CLEAR&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-FREQUENCY"&gt;&lt;constant&gt;DTV_FREQUENCY&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-BANDWIDTH-HZ"&gt;&lt;constant&gt;DTV_BANDWIDTH_HZ&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-FIC-VER"&gt;&lt;constant&gt;DTV_ATSCMH_FIC_VER&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-PARADE-ID"&gt;&lt;constant&gt;DTV_ATSCMH_PARADE_ID&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-NOG"&gt;&lt;constant&gt;DTV_ATSCMH_NOG&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-TNOG"&gt;&lt;constant&gt;DTV_ATSCMH_TNOG&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-SGN"&gt;&lt;constant&gt;DTV_ATSCMH_SGN&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-PRC"&gt;&lt;constant&gt;DTV_ATSCMH_PRC&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-RS-FRAME-MODE"&gt;&lt;constant&gt;DTV_ATSCMH_RS_FRAME_MODE&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-RS-FRAME-ENSEMBLE"&gt;&lt;constant&gt;DTV_ATSCMH_RS_FRAME_ENSEMBLE&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-CODE-MODE-PRI"&gt;&lt;constant&gt;DTV_ATSCMH_CODE_MODE_PRI&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-CODE-MODE-SEC"&gt;&lt;constant&gt;DTV_ATSCMH_CODE_MODE_SEC&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-SCCC-BLOCK-MODE"&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_BLOCK_MODE&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-SCCC-CODE_MODE-A"&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_CODE_MODE_A&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-SCCC-CODE_MODE-B"&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_CODE_MODE_B&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-SCCC-CODE_MODE-C"&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_CODE_MODE_C&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+				&lt;listitem&gt;&lt;para&gt;&lt;link linkend="DTV-ATSCMH-SCCC-CODE_MODE-D"&gt;&lt;constant&gt;DTV_ATSCMH_SCCC_CODE_MODE_D&lt;/constant&gt;&lt;/link&gt;&lt;/para&gt;&lt;/listitem&gt;</div><div class='add'>+			&lt;/itemizedlist&gt;</div><div class='add'>+		&lt;/section&gt;</div><div class='ctx'> 	&lt;/section&gt;</div><div class='ctx'> 	&lt;section id="frontend-property-cable-systems"&gt;</div><div class='ctx'> 	&lt;title&gt;Properties used on cable delivery systems&lt;/title&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/biblio.xml b/Documentation/DocBook/media/v4l/biblio.xml<br/>index 7dc65c592a87..7c49facecd25 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/biblio.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/biblio.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/biblio.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/biblio.xml</a></div><div class='hunk'>@@ -197,4 +197,33 @@ in the frequency range from 87,5 to 108,0 MHz&lt;/title&gt;</div><div class='ctx'>       &lt;title&gt;NTSC-4: United States RBDS Standard&lt;/title&gt;</div><div class='ctx'>     &lt;/biblioentry&gt;</div><div class='ctx'> </div><div class='add'>+    &lt;biblioentry id="iso12232"&gt;</div><div class='add'>+      &lt;abbrev&gt;ISO&amp;nbsp;12232:2006&lt;/abbrev&gt;</div><div class='add'>+      &lt;authorgroup&gt;</div><div class='add'>+	&lt;corpauthor&gt;International Organization for Standardization</div><div class='add'>+(&lt;ulink url="http://www.iso.org"&gt;http://www.iso.org&lt;/ulink&gt;)&lt;/corpauthor&gt;</div><div class='add'>+      &lt;/authorgroup&gt;</div><div class='add'>+      &lt;title&gt;Photography &amp;mdash; Digital still cameras &amp;mdash; Determination</div><div class='add'>+      of exposure index, ISO speed ratings, standard output sensitivity, and</div><div class='add'>+      recommended exposure index&lt;/title&gt;</div><div class='add'>+    &lt;/biblioentry&gt;</div><div class='add'>+</div><div class='add'>+    &lt;biblioentry id="cea861"&gt;</div><div class='add'>+      &lt;abbrev&gt;CEA-861-E&lt;/abbrev&gt;</div><div class='add'>+      &lt;authorgroup&gt;</div><div class='add'>+	&lt;corpauthor&gt;Consumer Electronics Association</div><div class='add'>+(&lt;ulink url="http://www.ce.org"&gt;http://www.ce.org&lt;/ulink&gt;)&lt;/corpauthor&gt;</div><div class='add'>+      &lt;/authorgroup&gt;</div><div class='add'>+      &lt;title&gt;A DTV Profile for Uncompressed High Speed Digital Interfaces&lt;/title&gt;</div><div class='add'>+    &lt;/biblioentry&gt;</div><div class='add'>+</div><div class='add'>+    &lt;biblioentry id="vesadmt"&gt;</div><div class='add'>+      &lt;abbrev&gt;VESA&amp;nbsp;DMT&lt;/abbrev&gt;</div><div class='add'>+      &lt;authorgroup&gt;</div><div class='add'>+	&lt;corpauthor&gt;Video Electronics Standards Association</div><div class='add'>+(&lt;ulink url="http://www.vesa.org"&gt;http://www.vesa.org&lt;/ulink&gt;)&lt;/corpauthor&gt;</div><div class='add'>+      &lt;/authorgroup&gt;</div><div class='add'>+      &lt;title&gt;VESA and Industry Standards and Guidelines for Computer Display Monitor Timing (DMT)&lt;/title&gt;</div><div class='add'>+    &lt;/biblioentry&gt;</div><div class='add'>+</div><div class='ctx'>   &lt;/bibliography&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/common.xml b/Documentation/DocBook/media/v4l/common.xml<br/>index c79278acfb0e..4101aeb56540 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/common.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/common.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/common.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/common.xml</a></div><div class='hunk'>@@ -724,41 +724,49 @@ if (-1 == ioctl (fd, &amp;VIDIOC-S-STD;, &amp;amp;std_id)) {</div><div class='ctx'> }</div><div class='ctx'>       &lt;/programlisting&gt;</div><div class='ctx'>     &lt;/example&gt;</div><div class='add'>+  &lt;/section&gt;</div><div class='ctx'>   &lt;section id="dv-timings"&gt;</div><div class='ctx'> 	&lt;title&gt;Digital Video (DV) Timings&lt;/title&gt;</div><div class='ctx'> 	&lt;para&gt;</div><div class='del'>-	The video standards discussed so far has been dealing with Analog TV and the</div><div class='add'>+	The video standards discussed so far have been dealing with Analog TV and the</div><div class='ctx'> corresponding video timings. Today there are many more different hardware interfaces</div><div class='ctx'> such as High Definition TV interfaces (HDMI), VGA, DVI connectors etc., that carry</div><div class='ctx'> video signals and there is a need to extend the API to select the video timings</div><div class='ctx'> for these interfaces. Since it is not possible to extend the &amp;v4l2-std-id; due to</div><div class='del'>-the limited bits available, a new set of IOCTLs is added to set/get video timings at</div><div class='add'>+the limited bits available, a new set of IOCTLs was added to set/get video timings at</div><div class='ctx'> the input and output: &lt;/para&gt;&lt;itemizedlist&gt;</div><div class='ctx'> 	&lt;listitem&gt;</div><div class='del'>-	&lt;para&gt;DV Presets: Digital Video (DV) presets. These are IDs representing a</div><div class='add'>+	&lt;para&gt;DV Timings: This will allow applications to define detailed</div><div class='add'>+video timings for the interface. This includes parameters such as width, height,</div><div class='add'>+polarities, frontporch, backporch etc. The &lt;filename&gt;linux/v4l2-dv-timings.h&lt;/filename&gt;</div><div class='add'>+header can be used to get the timings of the formats in the &lt;xref linkend="cea861" /&gt; and</div><div class='add'>+&lt;xref linkend="vesadmt" /&gt; standards.</div><div class='add'>+	&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	&lt;para&gt;DV Presets: Digital Video (DV) presets (&lt;emphasis role="bold"&gt;deprecated&lt;/emphasis&gt;).</div><div class='add'>+	These are IDs representing a</div><div class='ctx'> video timing at the input/output. Presets are pre-defined timings implemented</div><div class='ctx'> by the hardware according to video standards. A __u32 data type is used to represent</div><div class='ctx'> a preset unlike the bit mask that is used in &amp;v4l2-std-id; allowing future extensions</div><div class='del'>-to support as many different presets as needed.&lt;/para&gt;</div><div class='del'>-	&lt;/listitem&gt;</div><div class='del'>-	&lt;listitem&gt;</div><div class='del'>-	&lt;para&gt;Custom DV Timings: This will allow applications to define more detailed</div><div class='del'>-custom video timings for the interface. This includes parameters such as width, height,</div><div class='del'>-polarities, frontporch, backporch etc.</div><div class='del'>-	&lt;/para&gt;</div><div class='add'>+to support as many different presets as needed. This API is deprecated in favor of the DV Timings</div><div class='add'>+API.&lt;/para&gt;</div><div class='ctx'> 	&lt;/listitem&gt;</div><div class='ctx'> 	&lt;/itemizedlist&gt;</div><div class='add'>+	&lt;para&gt;To enumerate and query the attributes of the DV timings supported by a device,</div><div class='add'>+	applications use the &amp;VIDIOC-ENUM-DV-TIMINGS; and &amp;VIDIOC-DV-TIMINGS-CAP; ioctls.</div><div class='add'>+	To set DV timings for the device, applications use the</div><div class='add'>+&amp;VIDIOC-S-DV-TIMINGS; ioctl and to get current DV timings they use the</div><div class='add'>+&amp;VIDIOC-G-DV-TIMINGS; ioctl. To detect the DV timings as seen by the video receiver applications</div><div class='add'>+use the &amp;VIDIOC-QUERY-DV-TIMINGS; ioctl.&lt;/para&gt;</div><div class='ctx'> 	&lt;para&gt;To enumerate and query the attributes of DV presets supported by a device,</div><div class='ctx'> applications use the &amp;VIDIOC-ENUM-DV-PRESETS; ioctl. To get the current DV preset,</div><div class='ctx'> applications use the &amp;VIDIOC-G-DV-PRESET; ioctl and to set a preset they use the</div><div class='del'>-&amp;VIDIOC-S-DV-PRESET; ioctl.&lt;/para&gt;</div><div class='del'>-	&lt;para&gt;To set custom DV timings for the device, applications use the</div><div class='del'>-&amp;VIDIOC-S-DV-TIMINGS; ioctl and to get current custom DV timings they use the</div><div class='del'>-&amp;VIDIOC-G-DV-TIMINGS; ioctl.&lt;/para&gt;</div><div class='add'>+&amp;VIDIOC-S-DV-PRESET; ioctl. To detect the preset as seen by the video receiver applications</div><div class='add'>+use the &amp;VIDIOC-QUERY-DV-PRESET; ioctl.&lt;/para&gt;</div><div class='ctx'> 	&lt;para&gt;Applications can make use of the &lt;xref linkend="input-capabilities" /&gt; and</div><div class='ctx'> &lt;xref linkend="output-capabilities"/&gt; flags to decide what ioctls are available to set the</div><div class='ctx'> video timings for the device.&lt;/para&gt;</div><div class='del'>-	&lt;/section&gt;</div><div class='ctx'>   &lt;/section&gt;</div><div class='ctx'> </div><div class='ctx'>   &amp;sub-controls;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/compat.xml b/Documentation/DocBook/media/v4l/compat.xml<br/>index bce97c50391b..ea42ef824948 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/compat.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/compat.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/compat.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/compat.xml</a></div><div class='hunk'>@@ -2407,6 +2407,54 @@ details.&lt;/para&gt;</div><div class='ctx'> 	  &lt;para&gt;Added &lt;link linkend="jpeg-controls"&gt;JPEG compression control</div><div class='ctx'> 	  class&lt;/link&gt;.&lt;/para&gt;</div><div class='ctx'>         &lt;/listitem&gt;</div><div class='add'>+        &lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;Extended the DV Timings API:</div><div class='add'>+	  &amp;VIDIOC-ENUM-DV-TIMINGS;, &amp;VIDIOC-QUERY-DV-TIMINGS; and</div><div class='add'>+	  &amp;VIDIOC-DV-TIMINGS-CAP;.&lt;/para&gt;</div><div class='add'>+        &lt;/listitem&gt;</div><div class='add'>+      &lt;/orderedlist&gt;</div><div class='add'>+    &lt;/section&gt;</div><div class='add'>+</div><div class='add'>+    &lt;section&gt;</div><div class='add'>+      &lt;title&gt;V4L2 in Linux 3.5&lt;/title&gt;</div><div class='add'>+      &lt;orderedlist&gt;</div><div class='add'>+        &lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;Added integer menus, the new type will be</div><div class='add'>+	  V4L2_CTRL_TYPE_INTEGER_MENU.&lt;/para&gt;</div><div class='add'>+        &lt;/listitem&gt;</div><div class='add'>+        &lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;Added selection API for V4L2 subdev interface:</div><div class='add'>+	  &amp;VIDIOC-SUBDEV-G-SELECTION; and</div><div class='add'>+	  &amp;VIDIOC-SUBDEV-S-SELECTION;.&lt;/para&gt;</div><div class='add'>+        &lt;/listitem&gt;</div><div class='add'>+        &lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt; Added &lt;constant&gt;V4L2_COLORFX_ANTIQUE&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_COLORFX_ART_FREEZE&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_COLORFX_AQUA&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_COLORFX_SILHOUETTE&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_COLORFX_SOLARIZATION&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_COLORFX_VIVID&lt;/constant&gt; and</div><div class='add'>+	  &lt;constant&gt;V4L2_COLORFX_ARBITRARY_CBCR&lt;/constant&gt; menu items</div><div class='add'>+	  to the &lt;constant&gt;V4L2_CID_COLORFX&lt;/constant&gt; control.&lt;/para&gt;</div><div class='add'>+        &lt;/listitem&gt;</div><div class='add'>+        &lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt; Added &lt;constant&gt;V4L2_CID_COLORFX_CBCR&lt;/constant&gt; control.&lt;/para&gt;</div><div class='add'>+        &lt;/listitem&gt;</div><div class='add'>+        &lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt; Added camera controls &lt;constant&gt;V4L2_CID_AUTO_EXPOSURE_BIAS&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_CID_IMAGE_STABILIZATION&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_CID_ISO_SENSITIVITY&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_CID_ISO_SENSITIVITY_AUTO&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_CID_EXPOSURE_METERING&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_CID_SCENE_MODE&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_CID_3A_LOCK&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_CID_AUTO_FOCUS_START&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_CID_AUTO_FOCUS_STOP&lt;/constant&gt;,</div><div class='add'>+	  &lt;constant&gt;V4L2_CID_AUTO_FOCUS_STATUS&lt;/constant&gt; and</div><div class='add'>+	  &lt;constant&gt;V4L2_CID_AUTO_FOCUS_RANGE&lt;/constant&gt;.</div><div class='add'>+	  &lt;/para&gt;</div><div class='add'>+        &lt;/listitem&gt;</div><div class='ctx'>       &lt;/orderedlist&gt;</div><div class='ctx'>     &lt;/section&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -2508,6 +2556,10 @@ and may change in the future.&lt;/para&gt;</div><div class='ctx'> ioctls.&lt;/para&gt;</div><div class='ctx'>         &lt;/listitem&gt;</div><div class='ctx'>         &lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;VIDIOC-DECODER-CMD; and &amp;VIDIOC-TRY-DECODER-CMD;</div><div class='add'>+ioctls.&lt;/para&gt;</div><div class='add'>+        &lt;/listitem&gt;</div><div class='add'>+        &lt;listitem&gt;</div><div class='ctx'> 	  &lt;para&gt;&amp;VIDIOC-DBG-G-REGISTER; and &amp;VIDIOC-DBG-S-REGISTER;</div><div class='ctx'> ioctls.&lt;/para&gt;</div><div class='ctx'>         &lt;/listitem&gt;</div><div class='hunk'>@@ -2515,6 +2567,10 @@ ioctls.&lt;/para&gt;</div><div class='ctx'> 	  &lt;para&gt;&amp;VIDIOC-DBG-G-CHIP-IDENT; ioctl.&lt;/para&gt;</div><div class='ctx'>         &lt;/listitem&gt;</div><div class='ctx'>         &lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;VIDIOC-ENUM-DV-TIMINGS;, &amp;VIDIOC-QUERY-DV-TIMINGS; and</div><div class='add'>+	  &amp;VIDIOC-DV-TIMINGS-CAP; ioctls.&lt;/para&gt;</div><div class='add'>+        &lt;/listitem&gt;</div><div class='add'>+        &lt;listitem&gt;</div><div class='ctx'> 	  &lt;para&gt;Flash API. &lt;xref linkend="flash-controls" /&gt;&lt;/para&gt;</div><div class='ctx'>         &lt;/listitem&gt;</div><div class='ctx'>         &lt;listitem&gt;</div><div class='hunk'>@@ -2523,6 +2579,14 @@ ioctls.&lt;/para&gt;</div><div class='ctx'>         &lt;listitem&gt;</div><div class='ctx'> 	  &lt;para&gt;Selection API. &lt;xref linkend="selection-api" /&gt;&lt;/para&gt;</div><div class='ctx'>         &lt;/listitem&gt;</div><div class='add'>+        &lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;Sub-device selection API: &amp;VIDIOC-SUBDEV-G-SELECTION;</div><div class='add'>+	  and &amp;VIDIOC-SUBDEV-S-SELECTION; ioctls.&lt;/para&gt;</div><div class='add'>+        &lt;/listitem&gt;</div><div class='add'>+        &lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&lt;link linkend="v4l2-auto-focus-area"&gt;&lt;constant&gt;</div><div class='add'>+	  V4L2_CID_AUTO_FOCUS_AREA&lt;/constant&gt;&lt;/link&gt; control.&lt;/para&gt;</div><div class='add'>+        &lt;/listitem&gt;</div><div class='ctx'>       &lt;/itemizedlist&gt;</div><div class='ctx'>     &lt;/section&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -2538,6 +2602,17 @@ interfaces and should not be implemented in new drivers.&lt;/para&gt;</div><div class='ctx'> &lt;constant&gt;VIDIOC_S_MPEGCOMP&lt;/constant&gt; ioctls. Use Extended Controls,</div><div class='ctx'> &lt;xref linkend="extended-controls" /&gt;.&lt;/para&gt;</div><div class='ctx'>         &lt;/listitem&gt;</div><div class='add'>+        &lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;VIDIOC-G-DV-PRESET;, &amp;VIDIOC-S-DV-PRESET;, &amp;VIDIOC-ENUM-DV-PRESETS; and</div><div class='add'>+	  &amp;VIDIOC-QUERY-DV-PRESET; ioctls. Use the DV Timings API (&lt;xref linkend="dv-timings" /&gt;).&lt;/para&gt;</div><div class='add'>+        &lt;/listitem&gt;</div><div class='add'>+        &lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&lt;constant&gt;VIDIOC_SUBDEV_G_CROP&lt;/constant&gt; and</div><div class='add'>+	  &lt;constant&gt;VIDIOC_SUBDEV_S_CROP&lt;/constant&gt; ioctls. Use</div><div class='add'>+	  &lt;constant&gt;VIDIOC_SUBDEV_G_SELECTION&lt;/constant&gt; and</div><div class='add'>+	  &lt;constant&gt;VIDIOC_SUBDEV_S_SELECTION&lt;/constant&gt;, &lt;xref</div><div class='add'>+	  linkend="vidioc-subdev-g-selection" /&gt;.&lt;/para&gt;</div><div class='add'>+        &lt;/listitem&gt;</div><div class='ctx'>       &lt;/itemizedlist&gt;</div><div class='ctx'>     &lt;/section&gt;</div><div class='ctx'>   &lt;/section&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/controls.xml b/Documentation/DocBook/media/v4l/controls.xml<br/>index b84f25e9cc87..676bc46f9c52 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/controls.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/controls.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/controls.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/controls.xml</a></div><div class='hunk'>@@ -285,18 +285,92 @@ minimum value disables backlight compensation.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;row id="v4l2-colorfx"&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_CID_COLORFX&lt;/constant&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;enum&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Selects a color effect. Possible values for</div><div class='del'>-&lt;constant&gt;enum v4l2_colorfx&lt;/constant&gt; are:</div><div class='del'>-&lt;constant&gt;V4L2_COLORFX_NONE&lt;/constant&gt; (0),</div><div class='del'>-&lt;constant&gt;V4L2_COLORFX_BW&lt;/constant&gt; (1),</div><div class='del'>-&lt;constant&gt;V4L2_COLORFX_SEPIA&lt;/constant&gt; (2),</div><div class='del'>-&lt;constant&gt;V4L2_COLORFX_NEGATIVE&lt;/constant&gt; (3),</div><div class='del'>-&lt;constant&gt;V4L2_COLORFX_EMBOSS&lt;/constant&gt; (4),</div><div class='del'>-&lt;constant&gt;V4L2_COLORFX_SKETCH&lt;/constant&gt; (5),</div><div class='del'>-&lt;constant&gt;V4L2_COLORFX_SKY_BLUE&lt;/constant&gt; (6),</div><div class='del'>-&lt;constant&gt;V4L2_COLORFX_GRASS_GREEN&lt;/constant&gt; (7),</div><div class='del'>-&lt;constant&gt;V4L2_COLORFX_SKIN_WHITEN&lt;/constant&gt; (8) and</div><div class='del'>-&lt;constant&gt;V4L2_COLORFX_VIVID&lt;/constant&gt; (9).&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Selects a color effect. The following values are defined:</div><div class='add'>+	    &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;</div><div class='add'>+	  &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entrytbl spanname="descr" cols="2"&gt;</div><div class='add'>+	      &lt;tbody valign="top"&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_NONE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Color effect is disabled.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_ANTIQUE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;An aging (old photo) effect.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_ART_FREEZE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Frost color effect.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_AQUA&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Water color, cool tone.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_BW&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Black and white.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_EMBOSS&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Emboss, the highlights and shadows replace light/dark boundaries</div><div class='add'>+		  and low contrast areas are set to a gray background.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_GRASS_GREEN&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Grass green.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_NEGATIVE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Negative.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_SEPIA&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Sepia tone.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_SKETCH&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Sketch.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_SKIN_WHITEN&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Skin whiten.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_SKY_BLUE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Sky blue.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_SOLARIZATION&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Solarization, the image is partially reversed in tone,</div><div class='add'>+		  only color values above or below a certain threshold are inverted.</div><div class='add'>+		  &lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_SILHOUETTE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Silhouette (outline).&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_VIVID&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Vivid colors.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_COLORFX_SET_CBCR&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;The Cb and Cr chroma components are replaced by fixed</div><div class='add'>+		  coefficients determined by &lt;constant&gt;V4L2_CID_COLORFX_CBCR&lt;/constant&gt;</div><div class='add'>+		  control.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+	      &lt;/tbody&gt;</div><div class='add'>+	    &lt;/entrytbl&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_CID_COLORFX_CBCR&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;integer&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Determines the Cb and Cr coefficients for &lt;constant&gt;V4L2_COLORFX_SET_CBCR&lt;/constant&gt;</div><div class='add'>+	    color effect. Bits [7:0] of the supplied 32 bit value are interpreted as</div><div class='add'>+	    Cr component, bits [15:8] as Cb component and bits [31:16] must be zero.</div><div class='add'>+	  &lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_CID_ROTATE&lt;/constant&gt;&lt;/entry&gt;</div><div class='hunk'>@@ -2023,7 +2097,7 @@ Possible values are:&lt;/entry&gt;</div><div class='ctx'> 		&lt;entry&gt;integer&lt;/entry&gt;</div><div class='ctx'> 	      &lt;/row&gt;</div><div class='ctx'> 	      &lt;row&gt;&lt;entry spanname="descr"&gt;Cyclic intra macroblock refresh. This is the number of continuous macroblocks</div><div class='del'>-refreshed every frame. Each frame a succesive set of macroblocks is refreshed until the cycle completes and starts from the</div><div class='add'>+refreshed every frame. Each frame a successive set of macroblocks is refreshed until the cycle completes and starts from the</div><div class='ctx'> top of the frame. Applicable to H264, H263 and MPEG4 encoder.&lt;/entry&gt;</div><div class='ctx'> 	      &lt;/row&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -2183,7 +2257,7 @@ Applicable to the MPEG4 and H264 encoders.&lt;/entry&gt;</div><div class='ctx'> 		&lt;entry&gt;integer&lt;/entry&gt;</div><div class='ctx'> 	      &lt;/row&gt;</div><div class='ctx'> 	      &lt;row&gt;&lt;entry spanname="descr"&gt;The Video Buffer Verifier size in kilobytes, it is used as a limitation of frame skip.</div><div class='del'>-The VBV is defined in the standard as a mean to verify that the produced stream will be succesfully decoded.</div><div class='add'>+The VBV is defined in the standard as a mean to verify that the produced stream will be successfully decoded.</div><div class='ctx'> The standard describes it as "Part of a hypothetical decoder that is conceptually connected to the</div><div class='ctx'> output of the encoder. Its purpose is to provide a constraint on the variability of the data rate that an</div><div class='ctx'> encoder or editing process may produce.".</div><div class='hunk'>@@ -2196,7 +2270,7 @@ Applicable to the MPEG1, MPEG2, MPEG4 encoders.&lt;/entry&gt;</div><div class='ctx'> 		&lt;entry&gt;integer&lt;/entry&gt;</div><div class='ctx'> 	      &lt;/row&gt;</div><div class='ctx'> 	      &lt;row&gt;&lt;entry spanname="descr"&gt;The Coded Picture Buffer size in kilobytes, it is used as a limitation of frame skip.</div><div class='del'>-The CPB is defined in the H264 standard as a mean to verify that the produced stream will be succesfully decoded.</div><div class='add'>+The CPB is defined in the H264 standard as a mean to verify that the produced stream will be successfully decoded.</div><div class='ctx'> Applicable to the H264 encoder.&lt;/entry&gt;</div><div class='ctx'> 	      &lt;/row&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -2775,6 +2849,51 @@ remain constant.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='ctx'> </div><div class='ctx'> 	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_EXPOSURE_BIAS&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;integer menu&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;&lt;entry spanname="descr"&gt; Determines the automatic</div><div class='add'>+exposure compensation, it is effective only when &lt;constant&gt;V4L2_CID_EXPOSURE_AUTO&lt;/constant&gt;</div><div class='add'>+control is set to &lt;constant&gt;AUTO&lt;/constant&gt;, &lt;constant&gt;SHUTTER_PRIORITY &lt;/constant&gt;</div><div class='add'>+or &lt;constant&gt;APERTURE_PRIORITY&lt;/constant&gt;.</div><div class='add'>+It is expressed in terms of EV, drivers should interpret the values as 0.001 EV</div><div class='add'>+units, where the value 1000 stands for +1 EV.</div><div class='add'>+&lt;para&gt;Increasing the exposure compensation value is equivalent to decreasing</div><div class='add'>+the exposure value (EV) and will increase the amount of light at the image</div><div class='add'>+sensor. The camera performs the exposure compensation by adjusting absolute</div><div class='add'>+exposure time and/or aperture.&lt;/para&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row id="v4l2-exposure-metering"&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_EXPOSURE_METERING&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;enum&amp;nbsp;v4l2_exposure_metering&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;&lt;entry spanname="descr"&gt;Determines how the camera measures</div><div class='add'>+the amount of light available for the frame exposure. Possible values are:&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entrytbl spanname="descr" cols="2"&gt;</div><div class='add'>+	      &lt;tbody valign="top"&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_EXPOSURE_METERING_AVERAGE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Use the light information coming from the entire frame</div><div class='add'>+and average giving no weighting to any particular portion of the metered area.</div><div class='add'>+		  &lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_EXPOSURE_METERING_CENTER_WEIGHTED&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Average the light information coming from the entire frame</div><div class='add'>+giving priority to the center of the metered area.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_EXPOSURE_METERING_SPOT&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Measure only very small area at the center of the frame.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+	      &lt;/tbody&gt;</div><div class='add'>+	    &lt;/entrytbl&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_PAN_RELATIVE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;integer&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;&lt;row&gt;&lt;entry spanname="descr"&gt;This control turns the</div><div class='hunk'>@@ -2857,13 +2976,107 @@ negative values towards infinity. This is a write-only control.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_FOCUS_AUTO&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;boolean&lt;/entry&gt;</div><div class='del'>-	  &lt;/row&gt;&lt;row&gt;&lt;entry spanname="descr"&gt;Enables automatic focus</div><div class='del'>-adjustments. The effect of manual focus adjustments while this feature</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;&lt;entry spanname="descr"&gt;Enables continuous automatic</div><div class='add'>+focus adjustments. The effect of manual focus adjustments while this feature</div><div class='ctx'> is enabled is undefined, drivers should ignore such requests.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='ctx'> </div><div class='ctx'> 	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_AUTO_FOCUS_START&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;button&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;&lt;entry spanname="descr"&gt;Starts single auto focus process.</div><div class='add'>+The effect of setting this control when &lt;constant&gt;V4L2_CID_FOCUS_AUTO&lt;/constant&gt;</div><div class='add'>+is set to &lt;constant&gt;TRUE&lt;/constant&gt; (1) is undefined, drivers should ignore</div><div class='add'>+such requests.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_AUTO_FOCUS_STOP&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;button&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;&lt;entry spanname="descr"&gt;Aborts automatic focusing</div><div class='add'>+started with &lt;constant&gt;V4L2_CID_AUTO_FOCUS_START&lt;/constant&gt; control. It is</div><div class='add'>+effective only when the continuous autofocus is disabled, that is when</div><div class='add'>+&lt;constant&gt;V4L2_CID_FOCUS_AUTO&lt;/constant&gt; control is set to &lt;constant&gt;FALSE</div><div class='add'>+&lt;/constant&gt; (0).&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row id="v4l2-auto-focus-status"&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;</div><div class='add'>+	      &lt;constant&gt;V4L2_CID_AUTO_FOCUS_STATUS&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;bitmask&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry spanname="descr"&gt;The automatic focus status. This is a read-only</div><div class='add'>+	  control.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entrytbl spanname="descr" cols="2"&gt;</div><div class='add'>+	      &lt;tbody valign="top"&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_AUTO_FOCUS_STATUS_IDLE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Automatic focus is not active.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_AUTO_FOCUS_STATUS_BUSY&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Automatic focusing is in progress.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_AUTO_FOCUS_STATUS_REACHED&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Focus has been reached.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_AUTO_FOCUS_STATUS_FAILED&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Automatic focus has failed, the driver will not</div><div class='add'>+		  transition from this state until another action is</div><div class='add'>+		  performed by an application.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+	      &lt;/tbody&gt;</div><div class='add'>+	    &lt;/entrytbl&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry spanname="descr"&gt;</div><div class='add'>+Setting &lt;constant&gt;V4L2_LOCK_FOCUS&lt;/constant&gt; lock bit of the &lt;constant&gt;V4L2_CID_3A_LOCK</div><div class='add'>+&lt;/constant&gt; control may stop updates of the &lt;constant&gt;V4L2_CID_AUTO_FOCUS_STATUS&lt;/constant&gt;</div><div class='add'>+control value.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row id="v4l2-auto-focus-range"&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;</div><div class='add'>+	      &lt;constant&gt;V4L2_CID_AUTO_FOCUS_RANGE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;enum&amp;nbsp;v4l2_auto_focus_range&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry spanname="descr"&gt;Determines auto focus distance range</div><div class='add'>+for which lens may be adjusted. &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entrytbl spanname="descr" cols="2"&gt;</div><div class='add'>+	      &lt;tbody valign="top"&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_AUTO_FOCUS_RANGE_AUTO&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;The camera automatically selects the focus range.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_AUTO_FOCUS_RANGE_NORMAL&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Normal distance range, limited for best automatic focus</div><div class='add'>+performance.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_AUTO_FOCUS_RANGE_MACRO&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Macro (close-up) auto focus. The camera will</div><div class='add'>+use its minimum possible distance for auto focus.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_AUTO_FOCUS_RANGE_INFINITY&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;The lens is set to focus on an object at infinite distance.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+	      &lt;/tbody&gt;</div><div class='add'>+	    &lt;/entrytbl&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_ZOOM_ABSOLUTE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;integer&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;&lt;row&gt;&lt;entry spanname="descr"&gt;Specify the objective lens</div><div class='hunk'>@@ -2932,6 +3145,295 @@ camera sensor on or off, or specify its strength. Such band-stop filters can</div><div class='ctx'> be used, for example, to filter out the fluorescent light component.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row id="v4l2-auto-n-preset-white-balance"&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;enum&amp;nbsp;v4l2_auto_n_preset_white_balance&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;&lt;entry spanname="descr"&gt;Sets white balance to automatic,</div><div class='add'>+manual or a preset. The presets determine color temperature of the light as</div><div class='add'>+a hint to the camera for white balance adjustments resulting in most accurate</div><div class='add'>+color representation. The following white balance presets are listed in order</div><div class='add'>+of increasing color temperature.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entrytbl spanname="descr" cols="2"&gt;</div><div class='add'>+	      &lt;tbody valign="top"&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_WHITE_BALANCE_MANUAL&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Manual white balance.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_WHITE_BALANCE_AUTO&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Automatic white balance adjustments.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_WHITE_BALANCE_INCANDESCENT&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;White balance setting for incandescent (tungsten) lighting.</div><div class='add'>+It generally cools down the colors and corresponds approximately to 2500...3500 K</div><div class='add'>+color temperature range.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_WHITE_BALANCE_FLUORESCENT&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;White balance preset for fluorescent lighting.</div><div class='add'>+It corresponds approximately to 4000...5000 K color temperature.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_WHITE_BALANCE_FLUORESCENT_H&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;With this setting the camera will compensate for</div><div class='add'>+fluorescent H lighting.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_WHITE_BALANCE_HORIZON&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;White balance setting for horizon daylight.</div><div class='add'>+It corresponds approximately to 5000 K color temperature.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_WHITE_BALANCE_DAYLIGHT&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;White balance preset for daylight (with clear sky).</div><div class='add'>+It corresponds approximately to 5000...6500 K color temperature.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_WHITE_BALANCE_FLASH&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;With this setting the camera will compensate for the flash</div><div class='add'>+light. It slightly warms up the colors and corresponds roughly to 5000...5500 K</div><div class='add'>+color temperature.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_WHITE_BALANCE_CLOUDY&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;White balance preset for moderately overcast sky.</div><div class='add'>+This option corresponds approximately to 6500...8000 K color temperature</div><div class='add'>+range.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_WHITE_BALANCE_SHADE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;White balance preset for shade or heavily overcast</div><div class='add'>+sky. It corresponds approximately to 9000...10000 K color temperature.</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+	      &lt;/tbody&gt;</div><div class='add'>+	    &lt;/entrytbl&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row id="v4l2-wide-dynamic-range"&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_WIDE_DYNAMIC_RANGE&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;boolean&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="descr"&gt;Enables or disables the camera's wide dynamic</div><div class='add'>+range feature. This feature allows to obtain clear images in situations where</div><div class='add'>+intensity of the illumination varies significantly throughout the scene, i.e.</div><div class='add'>+there are simultaneously very dark and very bright areas. It is most commonly</div><div class='add'>+realized in cameras by combining two subsequent frames with different exposure</div><div class='add'>+times. &lt;footnote id="ctypeconv"&gt;&lt;para&gt; This control may be changed to a menu</div><div class='add'>+control in the future, if more options are required.&lt;/para&gt;&lt;/footnote&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row id="v4l2-image-stabilization"&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_IMAGE_STABILIZATION&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;boolean&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="descr"&gt;Enables or disables image stabilization.</div><div class='add'>+	      &lt;footnoteref linkend="ctypeconv"/&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_ISO_SENSITIVITY&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;integer menu&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;&lt;entry spanname="descr"&gt;Determines ISO equivalent of an</div><div class='add'>+image sensor indicating the sensor's sensitivity to light. The numbers are</div><div class='add'>+expressed in arithmetic scale, as per &lt;xref linkend="iso12232" /&gt; standard,</div><div class='add'>+where doubling the sensor sensitivity is represented by doubling the numerical</div><div class='add'>+ISO value. Applications should interpret the values as standard ISO values</div><div class='add'>+multiplied by 1000, e.g. control value 800 stands for ISO 0.8. Drivers will</div><div class='add'>+usually support only a subset of standard ISO values. The effect of setting</div><div class='add'>+this control while the &lt;constant&gt;V4L2_CID_ISO_SENSITIVITY_AUTO&lt;/constant&gt;</div><div class='add'>+control is set to a value other than &lt;constant&gt;V4L2_CID_ISO_SENSITIVITY_MANUAL</div><div class='add'>+&lt;/constant&gt; is undefined, drivers should ignore such requests.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row id="v4l2-iso-sensitivity-auto-type"&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_ISO_SENSITIVITY_AUTO&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;enum&amp;nbsp;v4l2_iso_sensitivity_type&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;&lt;entry spanname="descr"&gt;Enables or disables automatic ISO</div><div class='add'>+sensitivity adjustments.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entrytbl spanname="descr" cols="2"&gt;</div><div class='add'>+	      &lt;tbody valign="top"&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_CID_ISO_SENSITIVITY_MANUAL&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Manual ISO sensitivity.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_CID_ISO_SENSITIVITY_AUTO&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Automatic ISO sensitivity adjustments.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+	      &lt;/tbody&gt;</div><div class='add'>+	    &lt;/entrytbl&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row id="v4l2-scene-mode"&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_SCENE_MODE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;enum&amp;nbsp;v4l2_scene_mode&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row&gt;&lt;entry spanname="descr"&gt;This control allows to select</div><div class='add'>+scene programs as the camera automatic modes optimized for common shooting</div><div class='add'>+scenes. Within these modes the camera determines best exposure, aperture,</div><div class='add'>+focusing, light metering, white balance and equivalent sensitivity. The</div><div class='add'>+controls of those parameters are influenced by the scene mode control.</div><div class='add'>+An exact behavior in each mode is subject to the camera specification.</div><div class='add'>+</div><div class='add'>+&lt;para&gt;When the scene mode feature is not used, this control should be set to</div><div class='add'>+&lt;constant&gt;V4L2_SCENE_MODE_NONE&lt;/constant&gt; to make sure the other possibly</div><div class='add'>+related controls are accessible. The following scene programs are defined:</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entrytbl spanname="descr" cols="2"&gt;</div><div class='add'>+	      &lt;tbody valign="top"&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_NONE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;The scene mode feature is disabled.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_BACKLIGHT&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Backlight. Compensates for dark shadows when light is</div><div class='add'>+		  coming from behind a subject, also by automatically turning</div><div class='add'>+		  on the flash.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_BEACH_SNOW&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Beach and snow. This mode compensates for all-white or</div><div class='add'>+bright scenes, which tend to look gray and low contrast, when camera's automatic</div><div class='add'>+exposure is based on an average scene brightness. To compensate, this mode</div><div class='add'>+automatically slightly overexposes the frames. The white balance may also be</div><div class='add'>+adjusted to compensate for the fact that reflected snow looks bluish rather</div><div class='add'>+than white.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_CANDLELIGHT&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Candle light. The camera generally raises the ISO</div><div class='add'>+sensitivity and lowers the shutter speed. This mode compensates for relatively</div><div class='add'>+close subject in the scene. The flash is disabled in order to preserve the</div><div class='add'>+ambiance of the light.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_DAWN_DUSK&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Dawn and dusk. Preserves the colors seen in low</div><div class='add'>+natural light before dusk and after down. The camera may turn off the flash,</div><div class='add'>+and automatically focus at infinity. It will usually boost saturation and</div><div class='add'>+lower the shutter speed.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_FALL_COLORS&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Fall colors. Increases saturation and adjusts white</div><div class='add'>+balance for color enhancement. Pictures of autumn leaves get saturated reds</div><div class='add'>+and yellows.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_FIREWORKS&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Fireworks. Long exposure times are used to capture</div><div class='add'>+the expanding burst of light from a firework. The camera may invoke image</div><div class='add'>+stabilization.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_LANDSCAPE&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Landscape. The camera may choose a small aperture to</div><div class='add'>+provide deep depth of field and long exposure duration to help capture detail</div><div class='add'>+in dim light conditions. The focus is fixed at infinity. Suitable for distant</div><div class='add'>+and wide scenery.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_NIGHT&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Night, also known as Night Landscape. Designed for low</div><div class='add'>+light conditions, it preserves detail in the dark areas without blowing out bright</div><div class='add'>+objects. The camera generally sets itself to a medium-to-high ISO sensitivity,</div><div class='add'>+with a relatively long exposure time, and turns flash off. As such, there will be</div><div class='add'>+increased image noise and the possibility of blurred image.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_PARTY_INDOOR&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Party and indoor. Designed to capture indoor scenes</div><div class='add'>+that are lit by indoor background lighting as well as the flash. The camera</div><div class='add'>+usually increases ISO sensitivity, and adjusts exposure for the low light</div><div class='add'>+conditions.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_PORTRAIT&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Portrait. The camera adjusts the aperture so that the</div><div class='add'>+depth of field is reduced, which helps to isolate the subject against a smooth</div><div class='add'>+background. Most cameras recognize the presence of faces in the scene and focus</div><div class='add'>+on them. The color hue is adjusted to enhance skin tones. The intensity of the</div><div class='add'>+flash is often reduced.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_SPORTS&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Sports. Significantly increases ISO and uses a fast</div><div class='add'>+shutter speed to freeze motion of rapidly-moving subjects. Increased image</div><div class='add'>+noise may be seen in this mode.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_SUNSET&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Sunset. Preserves deep hues seen in sunsets and</div><div class='add'>+sunrises. It bumps up the saturation.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_SCENE_MODE_TEXT&lt;/constant&gt;&amp;nbsp;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Text. It applies extra contrast and sharpness, it is</div><div class='add'>+typically a black-and-white mode optimized for readability. Automatic focus</div><div class='add'>+may be switched to close-up mode and this setting may also involve some</div><div class='add'>+lens-distortion correction.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+	      &lt;/tbody&gt;</div><div class='add'>+	    &lt;/entrytbl&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_3A_LOCK&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;bitmask&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="descr"&gt;This control locks or unlocks the automatic</div><div class='add'>+focus, exposure and white balance. The automatic adjustments can be paused</div><div class='add'>+independently by setting the corresponding lock bit to 1. The camera then retains</div><div class='add'>+the settings until the lock bit is cleared. The following lock bits are defined:</div><div class='add'>+&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entrytbl spanname="descr" cols="2"&gt;</div><div class='add'>+	      &lt;tbody valign="top"&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_LOCK_EXPOSURE&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Automatic exposure adjustments lock.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_LOCK_WHITE_BALANCE&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Automatic white balance adjustments lock.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+		&lt;row&gt;</div><div class='add'>+		  &lt;entry&gt;&lt;constant&gt;V4L2_LOCK_FOCUS&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+		  &lt;entry&gt;Automatic focus lock.&lt;/entry&gt;</div><div class='add'>+		&lt;/row&gt;</div><div class='add'>+	      &lt;/tbody&gt;</div><div class='add'>+	    &lt;/entrytbl&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry spanname="descr"&gt;</div><div class='add'>+When a given algorithm is not enabled, drivers should ignore requests</div><div class='add'>+to lock it and should return no error. An example might be an application</div><div class='add'>+setting bit &lt;constant&gt;V4L2_LOCK_WHITE_BALANCE&lt;/constant&gt; when the</div><div class='add'>+&lt;constant&gt;V4L2_CID_AUTO_WHITE_BALANCE&lt;/constant&gt; control is set to</div><div class='add'>+&lt;constant&gt;FALSE&lt;/constant&gt;. The value of this control may be changed</div><div class='add'>+by exposure, white balance or focus controls.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='ctx'>     &lt;/table&gt;</div><div class='hunk'>@@ -3476,7 +3978,7 @@ interface and may change in the future.&lt;/para&gt;</div><div class='ctx'> 	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_JPEG_CHROMA_SUBSAMPLING&lt;/constant&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;menu&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='del'>-	  &lt;row id="jpeg-chroma-subsampling-control"&gt;</div><div class='add'>+	  &lt;row id="v4l2-jpeg-chroma-subsampling"&gt;</div><div class='ctx'> 	    &lt;entry spanname="descr"&gt;The chroma subsampling factors describe how</div><div class='ctx'> 	    each component of an input image is sampled, in respect to maximum</div><div class='ctx'> 	    sample rate in each spatial dimension. See &lt;xref linkend="itu-t81"/&gt;,</div><div class='hunk'>@@ -3486,7 +3988,7 @@ interface and may change in the future.&lt;/para&gt;</div><div class='ctx'> 	    from RGB to Y'CbCr color space.</div><div class='ctx'> 	    &lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='del'>-	  &lt;row&gt;</div><div class='add'>+	  &lt;row id = "v4l2-jpeg-chroma-subsampling"&gt;</div><div class='ctx'> 	    &lt;entrytbl spanname="descr" cols="2"&gt;</div><div class='ctx'> 	      &lt;tbody valign="top"&gt;</div><div class='ctx'> 		&lt;row&gt;</div><div class='hunk'>@@ -3538,12 +4040,12 @@ interface and may change in the future.&lt;/para&gt;</div><div class='ctx'> 	    &lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row id="jpeg-quality-control"&gt;</div><div class='del'>-	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_JPEG_COMPRESION_QUALITY&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_JPEG_COMPRESSION_QUALITY&lt;/constant&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;integer&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry spanname="descr"&gt;</div><div class='del'>-	      &lt;constant&gt;V4L2_CID_JPEG_COMPRESION_QUALITY&lt;/constant&gt; control</div><div class='add'>+	      &lt;constant&gt;V4L2_CID_JPEG_COMPRESSION_QUALITY&lt;/constant&gt; control</div><div class='ctx'> 	      determines trade-off between image quality and size.</div><div class='ctx'> 	      It provides simpler method for applications to control image quality,</div><div class='ctx'> 	      without a need for direct reconfiguration of luminance and chrominance</div><div class='hunk'>@@ -3551,7 +4053,7 @@ interface and may change in the future.&lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'> 	      In cases where a driver uses quantization tables configured directly</div><div class='ctx'> 	      by an application, using interfaces defined elsewhere, &lt;constant&gt;</div><div class='del'>-	      V4L2_CID_JPEG_COMPRESION_QUALITY&lt;/constant&gt; control should be set</div><div class='add'>+	      V4L2_CID_JPEG_COMPRESSION_QUALITY&lt;/constant&gt; control should be set</div><div class='ctx'> 	      by driver to 0.</div><div class='ctx'> </div><div class='ctx'> 	      &lt;para&gt;The value range of this control is driver-specific. Only</div><div class='hunk'>@@ -3599,4 +4101,172 @@ interface and may change in the future.&lt;/para&gt;</div><div class='ctx'>       to &lt;xref linkend="itu-t81"/&gt;, &lt;xref linkend="jfif"/&gt;,</div><div class='ctx'>       &lt;xref linkend="w3c-jpeg-jfif"/&gt;.&lt;/para&gt;</div><div class='ctx'>     &lt;/section&gt;</div><div class='add'>+</div><div class='add'>+    &lt;section id="image-source-controls"&gt;</div><div class='add'>+      &lt;title&gt;Image Source Control Reference&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+      &lt;note&gt;</div><div class='add'>+	&lt;title&gt;Experimental&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+	&lt;para&gt;This is an &lt;link</div><div class='add'>+	linkend="experimental"&gt;experimental&lt;/link&gt; interface and may</div><div class='add'>+	change in the future.&lt;/para&gt;</div><div class='add'>+      &lt;/note&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;</div><div class='add'>+	The Image Source control class is intended for low-level</div><div class='add'>+	control of image source devices such as image sensors. The</div><div class='add'>+	devices feature an analogue to digital converter and a bus</div><div class='add'>+	transmitter to transmit the image data out of the device.</div><div class='add'>+      &lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;table pgwide="1" frame="none" id="image-source-control-id"&gt;</div><div class='add'>+      &lt;title&gt;Image Source Control IDs&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+      &lt;tgroup cols="4"&gt;</div><div class='add'>+	&lt;colspec colname="c1" colwidth="1*" /&gt;</div><div class='add'>+	&lt;colspec colname="c2" colwidth="6*" /&gt;</div><div class='add'>+	&lt;colspec colname="c3" colwidth="2*" /&gt;</div><div class='add'>+	&lt;colspec colname="c4" colwidth="6*" /&gt;</div><div class='add'>+	&lt;spanspec namest="c1" nameend="c2" spanname="id" /&gt;</div><div class='add'>+	&lt;spanspec namest="c2" nameend="c4" spanname="descr" /&gt;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id" align="left"&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="left"&gt;Type&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row rowsep="1"&gt;&lt;entry spanname="descr" align="left"&gt;Description&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_IMAGE_SOURCE_CLASS&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;class&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="descr"&gt;The IMAGE_SOURCE class descriptor.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_VBLANK&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;integer&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="descr"&gt;Vertical blanking. The idle period</div><div class='add'>+	    after every frame during which no image data is produced.</div><div class='add'>+	    The unit of vertical blanking is a line. Every line has</div><div class='add'>+	    length of the image width plus horizontal blanking at the</div><div class='add'>+	    pixel rate defined by</div><div class='add'>+	    &lt;constant&gt;V4L2_CID_PIXEL_RATE&lt;/constant&gt; control in the</div><div class='add'>+	    same sub-device.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_HBLANK&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;integer&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="descr"&gt;Horizontal blanking. The idle</div><div class='add'>+	    period after every line of image data during which no</div><div class='add'>+	    image data is produced. The unit of horizontal blanking is</div><div class='add'>+	    pixels.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_ANALOGUE_GAIN&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;integer&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="descr"&gt;Analogue gain is gain affecting</div><div class='add'>+	    all colour components in the pixel matrix. The gain</div><div class='add'>+	    operation is performed in the analogue domain before A/D</div><div class='add'>+	    conversion.</div><div class='add'>+	    &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+      &lt;/table&gt;</div><div class='add'>+</div><div class='add'>+    &lt;/section&gt;</div><div class='add'>+</div><div class='add'>+    &lt;section id="image-process-controls"&gt;</div><div class='add'>+      &lt;title&gt;Image Process Control Reference&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+      &lt;note&gt;</div><div class='add'>+	&lt;title&gt;Experimental&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+	&lt;para&gt;This is an &lt;link</div><div class='add'>+	linkend="experimental"&gt;experimental&lt;/link&gt; interface and may</div><div class='add'>+	change in the future.&lt;/para&gt;</div><div class='add'>+      &lt;/note&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;</div><div class='add'>+	The Image Source control class is intended for low-level control of</div><div class='add'>+	image processing functions. Unlike</div><div class='add'>+	&lt;constant&gt;V4L2_CID_IMAGE_SOURCE_CLASS&lt;/constant&gt;, the controls in</div><div class='add'>+	this class affect processing the image, and do not control capturing</div><div class='add'>+	of it.</div><div class='add'>+      &lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;table pgwide="1" frame="none" id="image-process-control-id"&gt;</div><div class='add'>+      &lt;title&gt;Image Source Control IDs&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+      &lt;tgroup cols="4"&gt;</div><div class='add'>+	&lt;colspec colname="c1" colwidth="1*" /&gt;</div><div class='add'>+	&lt;colspec colname="c2" colwidth="6*" /&gt;</div><div class='add'>+	&lt;colspec colname="c3" colwidth="2*" /&gt;</div><div class='add'>+	&lt;colspec colname="c4" colwidth="6*" /&gt;</div><div class='add'>+	&lt;spanspec namest="c1" nameend="c2" spanname="id" /&gt;</div><div class='add'>+	&lt;spanspec namest="c2" nameend="c4" spanname="descr" /&gt;</div><div class='add'>+	&lt;thead&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id" align="left"&gt;ID&lt;/entry&gt;</div><div class='add'>+	    &lt;entry align="left"&gt;Type&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;&lt;row rowsep="1"&gt;&lt;entry spanname="descr" align="left"&gt;Description&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/thead&gt;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_IMAGE_PROC_CLASS&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;class&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="descr"&gt;The IMAGE_PROC class descriptor.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_LINK_FREQ&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;integer menu&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="descr"&gt;Data bus frequency. Together with the</div><div class='add'>+	    media bus pixel code, bus type (clock cycles per sample), the</div><div class='add'>+	    data bus frequency defines the pixel rate</div><div class='add'>+	    (&lt;constant&gt;V4L2_CID_PIXEL_RATE&lt;/constant&gt;) in the</div><div class='add'>+	    pixel array (or possibly elsewhere, if the device is not an</div><div class='add'>+	    image sensor). The frame rate can be calculated from the pixel</div><div class='add'>+	    clock, image width and height and horizontal and vertical</div><div class='add'>+	    blanking. While the pixel rate control may be defined elsewhere</div><div class='add'>+	    than in the subdev containing the pixel array, the frame rate</div><div class='add'>+	    cannot be obtained from that information. This is because only</div><div class='add'>+	    on the pixel array it can be assumed that the vertical and</div><div class='add'>+	    horizontal blanking information is exact: no other blanking is</div><div class='add'>+	    allowed in the pixel array. The selection of frame rate is</div><div class='add'>+	    performed by selecting the desired horizontal and vertical</div><div class='add'>+	    blanking. The unit of this control is Hz. &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="id"&gt;&lt;constant&gt;V4L2_CID_PIXEL_RATE&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;64-bit integer&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry spanname="descr"&gt;Pixel rate in the source pads of</div><div class='add'>+	    the subdev. This control is read-only and its unit is</div><div class='add'>+	    pixels / second.</div><div class='add'>+	    &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;&lt;entry&gt;&lt;/entry&gt;&lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+      &lt;/table&gt;</div><div class='add'>+</div><div class='add'>+    &lt;/section&gt;</div><div class='ctx'> &lt;/section&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/dev-subdev.xml b/Documentation/DocBook/media/v4l/dev-subdev.xml<br/>index 0916a7343a16..4afcbbec5eda 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/dev-subdev.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/dev-subdev.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/dev-subdev.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/dev-subdev.xml</a></div><div class='hunk'>@@ -76,11 +76,12 @@</div><div class='ctx'>     &lt;wordasword&gt;format&lt;/wordasword&gt; means the combination of media bus data</div><div class='ctx'>     format, frame width and frame height.&lt;/para&gt;&lt;/note&gt;</div><div class='ctx'> </div><div class='del'>-    &lt;para&gt;Image formats are typically negotiated on video capture and output</div><div class='del'>-    devices using the &lt;link linkend="crop"&gt;cropping and scaling&lt;/link&gt; ioctls.</div><div class='del'>-    The driver is responsible for configuring every block in the video pipeline</div><div class='del'>-    according to the requested format at the pipeline input and/or</div><div class='del'>-    output.&lt;/para&gt;</div><div class='add'>+    &lt;para&gt;Image formats are typically negotiated on video capture and</div><div class='add'>+    output devices using the format and &lt;link</div><div class='add'>+    linkend="vidioc-subdev-g-selection"&gt;selection&lt;/link&gt; ioctls. The</div><div class='add'>+    driver is responsible for configuring every block in the video</div><div class='add'>+    pipeline according to the requested format at the pipeline input</div><div class='add'>+    and/or output.&lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'>     &lt;para&gt;For complex devices, such as often found in embedded systems,</div><div class='ctx'>     identical image sizes at the output of a pipeline can be achieved using</div><div class='hunk'>@@ -276,11 +277,11 @@</div><div class='ctx'>     &lt;/section&gt;</div><div class='ctx'> </div><div class='ctx'>     &lt;section&gt;</div><div class='del'>-      &lt;title&gt;Cropping and scaling&lt;/title&gt;</div><div class='add'>+      &lt;title&gt;Selections: cropping, scaling and composition&lt;/title&gt;</div><div class='ctx'> </div><div class='ctx'>       &lt;para&gt;Many sub-devices support cropping frames on their input or output</div><div class='ctx'>       pads (or possible even on both). Cropping is used to select the area of</div><div class='del'>-      interest in an image, typically on a video sensor or video decoder. It can</div><div class='add'>+      interest in an image, typically on an image sensor or a video decoder. It can</div><div class='ctx'>       also be used as part of digital zoom implementations to select the area of</div><div class='ctx'>       the image that will be scaled up.&lt;/para&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -288,26 +289,179 @@</div><div class='ctx'>       &amp;v4l2-rect; by the coordinates of the top left corner and the rectangle</div><div class='ctx'>       size. Both the coordinates and sizes are expressed in pixels.&lt;/para&gt;</div><div class='ctx'> </div><div class='del'>-      &lt;para&gt;The crop rectangle is retrieved and set using the</div><div class='del'>-      &amp;VIDIOC-SUBDEV-G-CROP; and &amp;VIDIOC-SUBDEV-S-CROP; ioctls. Like for pad</div><div class='del'>-      formats, drivers store try and active crop rectangles. The format</div><div class='del'>-      negotiation mechanism applies to crop settings as well.&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-      &lt;para&gt;On input pads, cropping is applied relatively to the current pad</div><div class='del'>-      format. The pad format represents the image size as received by the</div><div class='del'>-      sub-device from the previous block in the pipeline, and the crop rectangle</div><div class='del'>-      represents the sub-image that will be transmitted further inside the</div><div class='del'>-      sub-device for processing. The crop rectangle be entirely containted</div><div class='del'>-      inside the input image size.&lt;/para&gt;</div><div class='del'>-</div><div class='del'>-      &lt;para&gt;Input crop rectangle are reset to their default value when the input</div><div class='del'>-      image format is modified. Drivers should use the input image size as the</div><div class='del'>-      crop rectangle default value, but hardware requirements may prevent this.</div><div class='del'>-      &lt;/para&gt;</div><div class='add'>+      &lt;para&gt;As for pad formats, drivers store try and active</div><div class='add'>+      rectangles for the selection targets of ACTUAL type &lt;xref</div><div class='add'>+      linkend="v4l2-subdev-selection-targets"&gt;.&lt;/xref&gt;&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;On sink pads, cropping is applied relative to the</div><div class='add'>+      current pad format. The pad format represents the image size as</div><div class='add'>+      received by the sub-device from the previous block in the</div><div class='add'>+      pipeline, and the crop rectangle represents the sub-image that</div><div class='add'>+      will be transmitted further inside the sub-device for</div><div class='add'>+      processing.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;The scaling operation changes the size of the image by</div><div class='add'>+      scaling it to new dimensions. The scaling ratio isn't specified</div><div class='add'>+      explicitly, but is implied from the original and scaled image</div><div class='add'>+      sizes. Both sizes are represented by &amp;v4l2-rect;.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;Scaling support is optional. When supported by a subdev,</div><div class='add'>+      the crop rectangle on the subdev's sink pad is scaled to the</div><div class='add'>+      size configured using the &amp;VIDIOC-SUBDEV-S-SELECTION; IOCTL</div><div class='add'>+      using &lt;constant&gt;V4L2_SUBDEV_SEL_COMPOSE_ACTUAL&lt;/constant&gt;</div><div class='add'>+      selection target on the same pad. If the subdev supports scaling</div><div class='add'>+      but not composing, the top and left values are not used and must</div><div class='add'>+      always be set to zero.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;On source pads, cropping is similar to sink pads, with the</div><div class='add'>+      exception that the source size from which the cropping is</div><div class='add'>+      performed, is the COMPOSE rectangle on the sink pad. In both</div><div class='add'>+      sink and source pads, the crop rectangle must be entirely</div><div class='add'>+      contained inside the source image size for the crop</div><div class='add'>+      operation.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;The drivers should always use the closest possible</div><div class='add'>+      rectangle the user requests on all selection targets, unless</div><div class='add'>+      specifically told otherwise.</div><div class='add'>+      &lt;constant&gt;V4L2_SUBDEV_SEL_FLAG_SIZE_GE&lt;/constant&gt; and</div><div class='add'>+      &lt;constant&gt;V4L2_SUBDEV_SEL_FLAG_SIZE_LE&lt;/constant&gt; flags may be</div><div class='add'>+      used to round the image size either up or down. &lt;xref</div><div class='add'>+      linkend="v4l2-subdev-selection-flags"&gt;&lt;/xref&gt;&lt;/para&gt;</div><div class='add'>+    &lt;/section&gt;</div><div class='add'>+</div><div class='add'>+    &lt;section&gt;</div><div class='add'>+      &lt;title&gt;Types of selection targets&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+      &lt;section&gt;</div><div class='add'>+	&lt;title&gt;ACTUAL targets&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+	&lt;para&gt;ACTUAL targets reflect the actual hardware configuration</div><div class='add'>+	at any point of time. There is a BOUNDS target</div><div class='add'>+	corresponding to every ACTUAL.&lt;/para&gt;</div><div class='add'>+      &lt;/section&gt;</div><div class='add'>+</div><div class='add'>+      &lt;section&gt;</div><div class='add'>+	&lt;title&gt;BOUNDS targets&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+	&lt;para&gt;BOUNDS targets is the smallest rectangle that contains</div><div class='add'>+	all valid ACTUAL rectangles. It may not be possible to set the</div><div class='add'>+	ACTUAL rectangle as large as the BOUNDS rectangle, however.</div><div class='add'>+	This may be because e.g. a sensor's pixel array is not</div><div class='add'>+	rectangular but cross-shaped or round. The maximum size may</div><div class='add'>+	also be smaller than the BOUNDS rectangle.&lt;/para&gt;</div><div class='add'>+      &lt;/section&gt;</div><div class='ctx'> </div><div class='del'>-      &lt;para&gt;Cropping behaviour on output pads is not defined.&lt;/para&gt;</div><div class='add'>+    &lt;/section&gt;</div><div class='add'>+</div><div class='add'>+    &lt;section&gt;</div><div class='add'>+      &lt;title&gt;Order of configuration and format propagation&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;Inside subdevs, the order of image processing steps will</div><div class='add'>+      always be from the sink pad towards the source pad. This is also</div><div class='add'>+      reflected in the order in which the configuration must be</div><div class='add'>+      performed by the user: the changes made will be propagated to</div><div class='add'>+      any subsequent stages. If this behaviour is not desired, the</div><div class='add'>+      user must set</div><div class='add'>+      &lt;constant&gt;V4L2_SUBDEV_SEL_FLAG_KEEP_CONFIG&lt;/constant&gt; flag. This</div><div class='add'>+      flag causes no propagation of the changes are allowed in any</div><div class='add'>+      circumstances. This may also cause the accessed rectangle to be</div><div class='add'>+      adjusted by the driver, depending on the properties of the</div><div class='add'>+      underlying hardware.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;The coordinates to a step always refer to the actual size</div><div class='add'>+      of the previous step. The exception to this rule is the source</div><div class='add'>+      compose rectangle, which refers to the sink compose bounds</div><div class='add'>+      rectangle --- if it is supported by the hardware.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;orderedlist&gt;</div><div class='add'>+	&lt;listitem&gt;Sink pad format. The user configures the sink pad</div><div class='add'>+	format. This format defines the parameters of the image the</div><div class='add'>+	entity receives through the pad for further processing.&lt;/listitem&gt;</div><div class='add'>+</div><div class='add'>+	&lt;listitem&gt;Sink pad actual crop selection. The sink pad crop</div><div class='add'>+	defines the crop performed to the sink pad format.&lt;/listitem&gt;</div><div class='add'>+</div><div class='add'>+	&lt;listitem&gt;Sink pad actual compose selection. The size of the</div><div class='add'>+	sink pad compose rectangle defines the scaling ratio compared</div><div class='add'>+	to the size of the sink pad crop rectangle. The location of</div><div class='add'>+	the compose rectangle specifies the location of the actual</div><div class='add'>+	sink compose rectangle in the sink compose bounds</div><div class='add'>+	rectangle.&lt;/listitem&gt;</div><div class='add'>+</div><div class='add'>+	&lt;listitem&gt;Source pad actual crop selection. Crop on the source</div><div class='add'>+	pad defines crop performed to the image in the sink compose</div><div class='add'>+	bounds rectangle.&lt;/listitem&gt;</div><div class='add'>+</div><div class='add'>+	&lt;listitem&gt;Source pad format. The source pad format defines the</div><div class='add'>+	output pixel format of the subdev, as well as the other</div><div class='add'>+	parameters with the exception of the image width and height.</div><div class='add'>+	Width and height are defined by the size of the source pad</div><div class='add'>+	actual crop selection.&lt;/listitem&gt;</div><div class='add'>+      &lt;/orderedlist&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;Accessing any of the above rectangles not supported by the</div><div class='add'>+      subdev will return &lt;constant&gt;EINVAL&lt;/constant&gt;. Any rectangle</div><div class='add'>+      referring to a previous unsupported rectangle coordinates will</div><div class='add'>+      instead refer to the previous supported rectangle. For example,</div><div class='add'>+      if sink crop is not supported, the compose selection will refer</div><div class='add'>+      to the sink pad format dimensions instead.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;figure id="subdev-image-processing-crop"&gt;</div><div class='add'>+	&lt;title&gt;Image processing in subdevs: simple crop example&lt;/title&gt;</div><div class='add'>+	&lt;mediaobject&gt;</div><div class='add'>+	  &lt;imageobject&gt;</div><div class='add'>+	    &lt;imagedata fileref="subdev-image-processing-crop.svg"</div><div class='add'>+	    format="SVG" scale="200" /&gt;</div><div class='add'>+	  &lt;/imageobject&gt;</div><div class='add'>+	&lt;/mediaobject&gt;</div><div class='add'>+      &lt;/figure&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;In the above example, the subdev supports cropping on its</div><div class='add'>+      sink pad. To configure it, the user sets the media bus format on</div><div class='add'>+      the subdev's sink pad. Now the actual crop rectangle can be set</div><div class='add'>+      on the sink pad --- the location and size of this rectangle</div><div class='add'>+      reflect the location and size of a rectangle to be cropped from</div><div class='add'>+      the sink format. The size of the sink crop rectangle will also</div><div class='add'>+      be the size of the format of the subdev's source pad.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;figure id="subdev-image-processing-scaling-multi-source"&gt;</div><div class='add'>+	&lt;title&gt;Image processing in subdevs: scaling with multiple sources&lt;/title&gt;</div><div class='add'>+	&lt;mediaobject&gt;</div><div class='add'>+	  &lt;imageobject&gt;</div><div class='add'>+	    &lt;imagedata fileref="subdev-image-processing-scaling-multi-source.svg"</div><div class='add'>+	    format="SVG" scale="200" /&gt;</div><div class='add'>+	  &lt;/imageobject&gt;</div><div class='add'>+	&lt;/mediaobject&gt;</div><div class='add'>+      &lt;/figure&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;In this example, the subdev is capable of first cropping,</div><div class='add'>+      then scaling and finally cropping for two source pads</div><div class='add'>+      individually from the resulting scaled image. The location of</div><div class='add'>+      the scaled image in the cropped image is ignored in sink compose</div><div class='add'>+      target. Both of the locations of the source crop rectangles</div><div class='add'>+      refer to the sink scaling rectangle, independently cropping an</div><div class='add'>+      area at location specified by the source crop rectangle from</div><div class='add'>+      it.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;figure id="subdev-image-processing-full"&gt;</div><div class='add'>+	&lt;title&gt;Image processing in subdevs: scaling and composition</div><div class='add'>+	with multiple sinks and sources&lt;/title&gt;</div><div class='add'>+	&lt;mediaobject&gt;</div><div class='add'>+	  &lt;imageobject&gt;</div><div class='add'>+	    &lt;imagedata fileref="subdev-image-processing-full.svg"</div><div class='add'>+	    format="SVG" scale="200" /&gt;</div><div class='add'>+	  &lt;/imageobject&gt;</div><div class='add'>+	&lt;/mediaobject&gt;</div><div class='add'>+      &lt;/figure&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;The subdev driver supports two sink pads and two source</div><div class='add'>+      pads. The images from both of the sink pads are individually</div><div class='add'>+      cropped, then scaled and further composed on the composition</div><div class='add'>+      bounds rectangle. From that, two independent streams are cropped</div><div class='add'>+      and sent out of the subdev from the source pads.&lt;/para&gt;</div><div class='ctx'> </div><div class='ctx'>     &lt;/section&gt;</div><div class='add'>+</div><div class='ctx'>   &lt;/section&gt;</div><div class='ctx'> </div><div class='ctx'>   &amp;sub-subdev-formats;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/io.xml b/Documentation/DocBook/media/v4l/io.xml<br/>index b815929b5bba..fd6aca2922b6 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/io.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/io.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/io.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/io.xml</a></div><div class='hunk'>@@ -543,12 +543,13 @@ and can range from zero to the number of buffers allocated</div><div class='ctx'> with the &amp;VIDIOC-REQBUFS; ioctl (&amp;v4l2-requestbuffers; &lt;structfield&gt;count&lt;/structfield&gt;) minus one.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-buf-type;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Type of the buffer, same as &amp;v4l2-format;</div><div class='ctx'> &lt;structfield&gt;type&lt;/structfield&gt; or &amp;v4l2-requestbuffers;</div><div class='del'>-&lt;structfield&gt;type&lt;/structfield&gt;, set by the application.&lt;/entry&gt;</div><div class='add'>+&lt;structfield&gt;type&lt;/structfield&gt;, set by the application. See &lt;xref</div><div class='add'>+linkend="v4l2-buf-type" /&gt;&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='hunk'>@@ -568,7 +569,7 @@ refers to an input stream, applications when an output stream.&lt;/entry&gt;</div><div class='ctx'> linkend="buffer-flags" /&gt;.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-field;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;field&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Indicates the field order of the image in the</div><div class='hunk'>@@ -630,11 +631,12 @@ bandwidth. These devices identify by not enumerating any video</div><div class='ctx'> standards, see &lt;xref linkend="standard" /&gt;.&lt;/para&gt;&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-memory;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;memory&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;This field must be set by applications and/or drivers</div><div class='del'>-in accordance with the selected I/O method.&lt;/entry&gt;</div><div class='add'>+in accordance with the selected I/O method. See &lt;xref linkend="v4l2-memory"</div><div class='add'>+	    /&gt;&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;union&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/pixfmt-srggb10.xml b/Documentation/DocBook/media/v4l/pixfmt-srggb10.xml<br/>index 7b274092e60c..c1c62a9acc2a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/pixfmt-srggb10.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/pixfmt-srggb10.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/pixfmt-srggb10.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/pixfmt-srggb10.xml</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-    &lt;refentry&gt;</div><div class='add'>+    &lt;refentry id="pixfmt-srggb10"&gt;</div><div class='ctx'>       &lt;refmeta&gt;</div><div class='ctx'> 	&lt;refentrytitle&gt;V4L2_PIX_FMT_SRGGB10 ('RG10'),</div><div class='ctx'> 	 V4L2_PIX_FMT_SGRBG10 ('BA10'),</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/pixfmt-srggb10dpcm8.xml b/Documentation/DocBook/media/v4l/pixfmt-srggb10dpcm8.xml<br/>new file mode 100644<br/>index 000000000000..8eace3e2e7d4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/pixfmt-srggb10dpcm8.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/pixfmt-srggb10dpcm8.xml</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+    &lt;refentry id="pixfmt-srggb10dpcm8"&gt;</div><div class='add'>+      &lt;refmeta&gt;</div><div class='add'>+	&lt;refentrytitle&gt;</div><div class='add'>+	 V4L2_PIX_FMT_SBGGR10DPCM8 ('bBA8'),</div><div class='add'>+	 V4L2_PIX_FMT_SGBRG10DPCM8 ('bGA8'),</div><div class='add'>+	 V4L2_PIX_FMT_SGRBG10DPCM8 ('BD10'),</div><div class='add'>+	 V4L2_PIX_FMT_SRGGB10DPCM8 ('bRA8'),</div><div class='add'>+	 &lt;/refentrytitle&gt;</div><div class='add'>+	&amp;manvol;</div><div class='add'>+      &lt;/refmeta&gt;</div><div class='add'>+      &lt;refnamediv&gt;</div><div class='add'>+	&lt;refname id="V4L2-PIX-FMT-SBGGR10DPCM8"&gt;&lt;constant&gt;V4L2_PIX_FMT_SBGGR10DPCM8&lt;/constant&gt;&lt;/refname&gt;</div><div class='add'>+	&lt;refname id="V4L2-PIX-FMT-SGBRG10DPCM8"&gt;&lt;constant&gt;V4L2_PIX_FMT_SGBRG10DPCM8&lt;/constant&gt;&lt;/refname&gt;</div><div class='add'>+	&lt;refname id="V4L2-PIX-FMT-SGRBG10DPCM8"&gt;&lt;constant&gt;V4L2_PIX_FMT_SGRBG10DPCM8&lt;/constant&gt;&lt;/refname&gt;</div><div class='add'>+	&lt;refname id="V4L2-PIX-FMT-SRGGB10DPCM8"&gt;&lt;constant&gt;V4L2_PIX_FMT_SRGGB10DPCM8&lt;/constant&gt;&lt;/refname&gt;</div><div class='add'>+	&lt;refpurpose&gt;10-bit Bayer formats compressed to 8 bits&lt;/refpurpose&gt;</div><div class='add'>+      &lt;/refnamediv&gt;</div><div class='add'>+      &lt;refsect1&gt;</div><div class='add'>+	&lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+	&lt;para&gt;The following four pixel formats are raw sRGB / Bayer formats</div><div class='add'>+	with 10 bits per colour compressed to 8 bits each, using DPCM</div><div class='add'>+	compression. DPCM, differential pulse-code modulation, is lossy.</div><div class='add'>+	Each colour component consumes 8 bits of memory. In other respects</div><div class='add'>+	this format is similar to &lt;xref</div><div class='add'>+	linkend="pixfmt-srggb10"&gt;.&lt;/xref&gt;&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+      &lt;/refsect1&gt;</div><div class='add'>+    &lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/pixfmt.xml b/Documentation/DocBook/media/v4l/pixfmt.xml<br/>index 31eaae2469f9..f5ac15ed0549 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/pixfmt.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/pixfmt.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/pixfmt.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/pixfmt.xml</a></div><div class='hunk'>@@ -673,6 +673,7 @@ access the palette, this must be done with ioctls of the Linux framebuffer API.&lt;</div><div class='ctx'>     &amp;sub-srggb8;</div><div class='ctx'>     &amp;sub-sbggr16;</div><div class='ctx'>     &amp;sub-srggb10;</div><div class='add'>+    &amp;sub-srggb10dpcm8;</div><div class='ctx'>     &amp;sub-srggb12;</div><div class='ctx'>   &lt;/section&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -876,11 +877,6 @@ kernel sources in the file &lt;filename&gt;Documentation/video4linux/cx2341x/README.hm</div><div class='ctx'> 	    &lt;entry&gt;'S561'&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Compressed GBRG Bayer format used by the gspca driver.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='del'>-	  &lt;row id="V4L2-PIX-FMT-SGRBG10DPCM8"&gt;</div><div class='del'>-	    &lt;entry&gt;&lt;constant&gt;V4L2_PIX_FMT_SGRBG10DPCM8&lt;/constant&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;'DB10'&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;10 bit raw Bayer DPCM compressed to 8 bits.&lt;/entry&gt;</div><div class='del'>-	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row id="V4L2-PIX-FMT-PAC207"&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_PIX_FMT_PAC207&lt;/constant&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;'P207'&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/subdev-image-processing-crop.dia b/Documentation/DocBook/media/v4l/subdev-image-processing-crop.dia<br/>new file mode 100644<br/>index 000000000000..e32ba5362e1d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/subdev-image-processing-crop.dia?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/subdev-image-processing-crop.dia</a></div><div class='hunk'>@@ -0,0 +1,614 @@</div><div class='add'>+&lt;?xml version="1.0" encoding="UTF-8"?&gt;</div><div class='add'>+&lt;dia:diagram xmlns:dia="http://www.lysator.liu.se/~alla/dia/"&gt;</div><div class='add'>+  &lt;dia:diagramdata&gt;</div><div class='add'>+    &lt;dia:attribute name="background"&gt;</div><div class='add'>+      &lt;dia:color val="#ffffff"/&gt;</div><div class='add'>+    &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;dia:attribute name="pagebreak"&gt;</div><div class='add'>+      &lt;dia:color val="#000099"/&gt;</div><div class='add'>+    &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;dia:attribute name="paper"&gt;</div><div class='add'>+      &lt;dia:composite type="paper"&gt;</div><div class='add'>+        &lt;dia:attribute name="name"&gt;</div><div class='add'>+          &lt;dia:string&gt;#A4#&lt;/dia:string&gt;</div><div class='add'>+        &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;dia:attribute name="tmargin"&gt;</div><div class='add'>+          &lt;dia:real val="2.8222000598907471"/&gt;</div><div class='add'>+        &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;dia:attribute name="bmargin"&gt;</div><div class='add'>+          &lt;dia:real val="2.8222000598907471"/&gt;</div><div class='add'>+        &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;dia:attribute name="lmargin"&gt;</div><div class='add'>+          &lt;dia:real val="2.8222000598907471"/&gt;</div><div class='add'>+        &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;dia:attribute name="rmargin"&gt;</div><div class='add'>+          &lt;dia:real val="2.8222000598907471"/&gt;</div><div class='add'>+        &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;dia:attribute name="is_portrait"&gt;</div><div class='add'>+          &lt;dia:boolean val="false"/&gt;</div><div class='add'>+        &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;dia:attribute name="scaling"&gt;</div><div class='add'>+          &lt;dia:real val="0.49000000953674316"/&gt;</div><div class='add'>+        &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;dia:attribute name="fitto"&gt;</div><div class='add'>+          &lt;dia:boolean val="false"/&gt;</div><div class='add'>+        &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;/dia:composite&gt;</div><div class='add'>+    &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;dia:attribute name="grid"&gt;</div><div class='add'>+      &lt;dia:composite type="grid"&gt;</div><div class='add'>+        &lt;dia:attribute name="width_x"&gt;</div><div class='add'>+          &lt;dia:real val="1"/&gt;</div><div class='add'>+        &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;dia:attribute name="width_y"&gt;</div><div class='add'>+          &lt;dia:real val="1"/&gt;</div><div class='add'>+        &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;dia:attribute name="visible_x"&gt;</div><div class='add'>+          &lt;dia:int val="1"/&gt;</div><div class='add'>+        &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;dia:attribute name="visible_y"&gt;</div><div class='add'>+          &lt;dia:int val="1"/&gt;</div><div class='add'>+        &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;dia:composite type="color"/&gt;</div><div class='add'>+      &lt;/dia:composite&gt;</div><div class='add'>+    &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;dia:attribute name="color"&gt;</div><div class='add'>+      &lt;dia:color val="#d8e5e5"/&gt;</div><div class='add'>+    &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;dia:attribute name="guides"&gt;</div><div class='add'>+      &lt;dia:composite type="guides"&gt;</div><div class='add'>+        &lt;dia:attribute name="hguides"/&gt;</div><div class='add'>+        &lt;dia:attribute name="vguides"/&gt;</div><div class='add'>+      &lt;/dia:composite&gt;</div><div class='add'>+    &lt;/dia:attribute&gt;</div><div class='add'>+  &lt;/dia:diagramdata&gt;</div><div class='add'>+  &lt;dia:layer name="Background" visible="true" active="true"&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O0"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="-0.4,6.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="-0.45,6.45;23.1387,16.2"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="-0.4,6.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="23.48871579904775"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="9.6500000000000004"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="false"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O1"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="0.225,9.45"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="0.175,9.4;8.225,14.7"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="0.225,9.45"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="7.9499999999999975"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="5.1999999999999975"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#a52a2a"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O2"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="3.175,10.55"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="3.125,10.5;7.925,14.45"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="3.175,10.55"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="4.6999999999999975"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="3.8499999999999979"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#0000ff"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O3"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="3.725,11.3875"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="3.725,10.7925;6.6025,13.14"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#sink</div><div class='add'>+crop</div><div class='add'>+selection#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="3.725,11.3875"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#0000ff"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O4"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="1.475,7.9"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="1.475,7.305;1.475,8.0525"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;##&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="1.475,7.9"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#000000"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O5"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="0.426918,7.89569"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="0.426918,7.30069;3.90942,8.84819"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#sink media</div><div class='add'>+bus format#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="0.426918,7.89569"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#a52a2a"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O6"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="17.4887,7.75"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="17.4887,7.155;21.8112,8.7025"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+   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&lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O7"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="17.5244,9.5417"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="17.4744,9.4917;22.2387,13.35"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="17.5244,9.5417"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="4.6643157990477508"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="3.758300000000002"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#8b6914"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O8"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="17.5244,13.3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="3.12132,13.2463;17.5781,14.4537"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="17.5244,13.3"/&gt;</div><div class='add'>+        &lt;dia:point val="3.175,14.4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute 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class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow_length"&gt;</div><div class='add'>+        &lt;dia:real val="0.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O2" connection="2"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O5"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="41.1866,10.2592"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="41.1366,9.89879;49.6019,10.6224"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="41.1866,10.2592"/&gt;</div><div class='add'>+        &lt;dia:point val="49.4901,10.2607"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow"&gt;</div><div class='add'>+        &lt;dia:enum val="22"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow_length"&gt;</div><div class='add'>+        &lt;dia:real val="0.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O3" connection="3"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O6"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="-6.998,7.75"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="-6.998,7.155;-3.193,7.9025"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#pad 0 (sink)#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="-6.998,7.75"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#000000"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O7"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="42.452,9.75"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="42.452,9.155;47.097,9.9025"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#pad 2 (source)#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="42.452,9.75"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#000000"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O8"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="0.275,6"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="0.225,5.95;8.275,11.25"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="0.275,6"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="7.9499999999999975"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="5.1999999999999975"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#a52a2a"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O9"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="3.125,6.8"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="3.075,6.75;7.875,10.7"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="3.125,6.8"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="4.6999999999999975"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="3.8499999999999979"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#0000ff"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O10"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="1.525,4.45"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="1.525,3.855;1.525,4.6025"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;##&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="1.525,4.45"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#000000"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O11"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="0.476918,4.44569"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="0.476918,3.85069;3.95942,5.39819"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#sink media</div><div class='add'>+bus format#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="0.476918,4.44569"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#a52a2a"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O12"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="16.6822,9.28251"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="16.6322,9.23251;24.9922,17.9564"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="16.6822,9.28251"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="8.2600228398861297"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="8.6238900617957164"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#00ff00"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O13"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="16.6822,17.9064"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="3.05732,10.5823;16.7499,17.9741"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="16.6822,17.9064"/&gt;</div><div class='add'>+        &lt;dia:point val="3.125,10.65"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O12" connection="5"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O9" connection="5"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O14"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="16.6822,9.28251"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="3.06681,6.74181;16.7404,9.3407"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="16.6822,9.28251"/&gt;</div><div class='add'>+        &lt;dia:point val="3.125,6.8"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O12" connection="0"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O9" connection="0"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O15"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="24.9422,17.9064"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="7.75945,10.5845;25.0077,17.9719"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="24.9422,17.9064"/&gt;</div><div class='add'>+        &lt;dia:point val="7.825,10.65"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O12" connection="7"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O9" connection="7"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O16"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="24.9422,9.28251"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="7.76834,6.74334;24.9989,9.33917"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="24.9422,9.28251"/&gt;</div><div class='add'>+        &lt;dia:point val="7.825,6.8"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O12" connection="2"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O9" connection="2"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O17"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="16.7352,7.47209"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="16.7352,6.87709;22.5602,8.42459"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#sink compose</div><div class='add'>+selection (scaling)#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="16.7352,7.47209"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#00ff00"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O18"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="20.4661,9.72825"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="20.4161,9.67825;25.5254,13.3509"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="20.4661,9.72825"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="5.009308462554376"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="3.5726155970598077"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#a020f0"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O19"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="34.475,5.2564"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="34.475,4.6614;38.7975,6.2089"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#source media</div><div class='add'>+bus format#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="34.475,5.2564"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#8b6914"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O20"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="34.4244,8.6917"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="34.3744,8.6417;39.4837,12.3143"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="34.4244,8.6917"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="5.009308462554376"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="3.5726155970598077"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#8b6914"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O21"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="34.4244,12.2643"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="20.4125,12.2107;34.478,13.3545"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="34.4244,12.2643"/&gt;</div><div class='add'>+        &lt;dia:point val="20.4661,13.3009"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O20" connection="5"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O18" connection="5"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O22"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="34.4244,8.6917"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="20.4125,8.63813;34.478,9.78182"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="34.4244,8.6917"/&gt;</div><div class='add'>+        &lt;dia:point val="20.4661,9.72825"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O20" connection="0"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O18" connection="0"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O23"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="39.4337,12.2643"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="25.4218,12.2107;39.4873,13.3545"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="39.4337,12.2643"/&gt;</div><div class='add'>+        &lt;dia:point val="25.4754,13.3009"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O20" connection="7"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O18" connection="7"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O24"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="39.4337,8.6917"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="25.4218,8.63813;39.4873,9.78182"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="39.4337,8.6917"/&gt;</div><div class='add'>+        &lt;dia:point val="25.4754,9.72825"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O20" connection="2"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O18" connection="2"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O25"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="16.25,5.15"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="16.25,4.555;21.68,6.1025"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#sink compose</div><div class='add'>+bounds selection#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="16.25,5.15"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#ff765a"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Geometric - Perfect Circle" version="1" id="O26"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="-1.02991,16.6506"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="-1.07991,16.6006;-0.12991,17.5506"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="meta"&gt;</div><div class='add'>+        &lt;dia:composite type="dict"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="-1.02991,16.6506"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.84999999999999787"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="0.84999999999999787"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000000000001"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_colour"&gt;</div><div class='add'>+        &lt;dia:color val="#000000"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="fill_colour"&gt;</div><div class='add'>+        &lt;dia:color val="#ffffff"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="0"/&gt;</div><div class='add'>+        &lt;dia:real val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="flip_horizontal"&gt;</div><div class='add'>+        &lt;dia:boolean val="false"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="flip_vertical"&gt;</div><div class='add'>+        &lt;dia:boolean val="false"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="subscale"&gt;</div><div class='add'>+        &lt;dia:real val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O27"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="-9.20491,17.09"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="-9.255,16.7149;-0.918107,17.4385"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="-9.20491,17.09"/&gt;</div><div class='add'>+        &lt;dia:point val="-1.02991,17.0756"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow"&gt;</div><div class='add'>+        &lt;dia:enum val="22"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow_length"&gt;</div><div class='add'>+        &lt;dia:real val="0.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O26" connection="2"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O28"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="-6.95,16.45"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="-6.95,15.855;-3.145,16.6025"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#pad 1 (sink)#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="-6.95,16.45"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#000000"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O29"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="0.390412,14.64"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="0.340412,14.59;6.045,18.8"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="0.390412,14.64"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="5.604587512785236"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="4.1099999999999994"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#a52a2a"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O30"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="2.645,15.74"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="2.595,15.69;5.6,18.3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="2.645,15.74"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="2.904999999254942"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="2.5100000000000016"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#0000ff"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O31"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="1.595,12.99"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="1.595,12.395;1.595,13.1425"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;##&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="1.595,12.99"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#000000"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O32"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="17.945,12.595"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="2.58596,12.536;18.004,15.799"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="17.945,12.595"/&gt;</div><div class='add'>+        &lt;dia:point val="2.645,15.74"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O36" connection="0"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O30" connection="0"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O33"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="17.945,15.8"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="2.58772,15.7427;18.0023,18.3073"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="17.945,15.8"/&gt;</div><div class='add'>+        &lt;dia:point val="2.645,18.25"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O36" connection="5"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O30" connection="5"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O34"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="21.7,15.8"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="5.49307,15.7431;21.7569,18.3069"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="21.7,15.8"/&gt;</div><div class='add'>+        &lt;dia:point val="5.55,18.25"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O36" connection="7"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O30" connection="7"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O35"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="21.7,12.595"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="5.49136,12.5364;21.7586,15.7986"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="21.7,12.595"/&gt;</div><div class='add'>+        &lt;dia:point val="5.55,15.74"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O36" connection="2"/&gt;</div><div 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class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#0000ff"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O4"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="1.475,7.9"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="1.475,7.305;1.475,8.0525"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;##&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="1.475,7.9"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#000000"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O5"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="0.426918,7.89569"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="0.426918,7.30069;3.90942,8.84819"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#sink media</div><div class='add'>+bus format#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="0.426918,7.89569"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#a52a2a"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O6"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="16.6822,9.28251"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="16.6322,9.23251;24.9922,17.9564"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="16.6822,9.28251"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="8.2600228398861297"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="8.6238900617957164"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#00ff00"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O7"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="16.6822,17.9064"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="2.41365,13.9886;16.7436,17.9678"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="16.6822,17.9064"/&gt;</div><div class='add'>+        &lt;dia:point val="2.475,14.05"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O6" connection="5"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O2" connection="5"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O8"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="16.6822,9.28251"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="2.42188,9.22939;16.7353,10.2531"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="16.6822,9.28251"/&gt;</div><div class='add'>+        &lt;dia:point val="2.475,10.2"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O6" connection="0"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O2" connection="0"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O9"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="24.9422,17.9064"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="7.11553,13.9905;25.0017,17.9659"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="24.9422,17.9064"/&gt;</div><div class='add'>+        &lt;dia:point val="7.175,14.05"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O6" connection="7"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O2" connection="7"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O10"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="24.9422,9.28251"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="7.12249,9.23;24.9947,10.2525"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="24.9422,9.28251"/&gt;</div><div class='add'>+        &lt;dia:point val="7.175,10.2"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O6" connection="2"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O2" connection="2"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O11"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="16.7352,7.47209"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="16.7352,6.87709;22.5602,8.42459"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#sink compose</div><div class='add'>+selection (scaling)#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="16.7352,7.47209"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#00ff00"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O12"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="19.1161,9.97825"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="19.0661,9.92825;24.1754,13.6009"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="19.1161,9.97825"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="5.009308462554376"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="3.5726155970598077"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#a020f0"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O13"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="27.1661,7.47209"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="27.1661,6.87709;30.0436,9.22459"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#source</div><div class='add'>+crop</div><div class='add'>+selection#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="27.1661,7.47209"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#a020f0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O14"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="34.575,7.8564"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="34.575,7.2614;38.8975,8.8089"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#source media</div><div class='add'>+bus format#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="34.575,7.8564"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#8b6914"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O15"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="34.5244,11.2917"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="34.4744,11.2417;39.5837,14.9143"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="34.5244,11.2917"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="5.009308462554376"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="3.5726155970598077"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#8b6914"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O16"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="34.5244,14.8643"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="19.062,13.4968;34.5785,14.9184"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="34.5244,14.8643"/&gt;</div><div class='add'>+        &lt;dia:point val="19.1161,13.5509"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O15" connection="5"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O12" connection="5"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O17"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="34.5244,11.2917"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="19.062,9.92418;34.5785,11.3458"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="34.5244,11.2917"/&gt;</div><div class='add'>+        &lt;dia:point val="19.1161,9.97825"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O15" connection="0"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O12" connection="0"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O18"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="39.5337,14.8643"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="24.0713,13.4968;39.5878,14.9184"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="39.5337,14.8643"/&gt;</div><div class='add'>+        &lt;dia:point val="24.1254,13.5509"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O15" connection="7"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O12" connection="7"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O19"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="39.5337,11.2917"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="24.0713,9.92418;39.5878,11.3458"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="39.5337,11.2917"/&gt;</div><div class='add'>+        &lt;dia:point val="24.1254,9.97825"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O15" connection="2"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O12" connection="2"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Geometric - Perfect Circle" version="1" id="O20"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="39.98,12.0742"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="39.93,12.0242;40.88,12.9742"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="meta"&gt;</div><div class='add'>+        &lt;dia:composite type="dict"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="39.98,12.0742"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.84999999999999787"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="0.84999999999999787"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000000000001"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_colour"&gt;</div><div class='add'>+        &lt;dia:color val="#000000"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="fill_colour"&gt;</div><div class='add'>+        &lt;dia:color val="#ffffff"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="0"/&gt;</div><div class='add'>+        &lt;dia:real val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="flip_horizontal"&gt;</div><div class='add'>+        &lt;dia:boolean val="false"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="flip_vertical"&gt;</div><div class='add'>+        &lt;dia:boolean val="false"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="subscale"&gt;</div><div class='add'>+        &lt;dia:real val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O21"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="40.83,12.4992"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="40.78,12.1388;49.2453,12.8624"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="40.83,12.4992"/&gt;</div><div class='add'>+        &lt;dia:point val="49.1335,12.5007"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow"&gt;</div><div class='add'>+        &lt;dia:enum val="22"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow_length"&gt;</div><div class='add'>+        &lt;dia:real val="0.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O20" connection="3"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O22"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="42.0954,11.99"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="42.0954,11.395;46.7404,12.1425"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#pad 1 (source)#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="42.0954,11.99"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#000000"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="alignment"&gt;</div><div class='add'>+            &lt;dia:enum val="0"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+        &lt;/dia:composite&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="valign"&gt;</div><div class='add'>+        &lt;dia:enum val="3"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Geometric - Perfect Circle" version="1" id="O23"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="-1.44491,11.6506"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="-1.49491,11.6006;-0.54491,12.5506"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="meta"&gt;</div><div class='add'>+        &lt;dia:composite type="dict"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="-1.44491,11.6506"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.84999999999999787"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="0.84999999999999787"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000000000001"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_colour"&gt;</div><div class='add'>+        &lt;dia:color val="#000000"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="fill_colour"&gt;</div><div class='add'>+        &lt;dia:color val="#ffffff"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="0"/&gt;</div><div class='add'>+        &lt;dia:real val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="flip_horizontal"&gt;</div><div class='add'>+        &lt;dia:boolean val="false"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="flip_vertical"&gt;</div><div class='add'>+        &lt;dia:boolean val="false"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="subscale"&gt;</div><div class='add'>+        &lt;dia:real val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O24"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="-9.61991,12.09"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle 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   &lt;dia:real val="0.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O23" connection="2"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Text" version="1" id="O25"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="-7.39291,11.49"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="-7.39291,10.895;-3.58791,11.6425"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="text"&gt;</div><div class='add'>+        &lt;dia:composite type="text"&gt;</div><div class='add'>+          &lt;dia:attribute name="string"&gt;</div><div class='add'>+            &lt;dia:string&gt;#pad 0 (sink)#&lt;/dia:string&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="font"&gt;</div><div class='add'>+            &lt;dia:font family="sans" style="0" name="Helvetica"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="height"&gt;</div><div class='add'>+            &lt;dia:real val="0.80000000000000004"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="pos"&gt;</div><div class='add'>+            &lt;dia:point val="-7.39291,11.49"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+          &lt;dia:attribute name="color"&gt;</div><div class='add'>+            &lt;dia:color val="#000000"/&gt;</div><div class='add'>+          &lt;/dia:attribute&gt;</div><div class='add'>+       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  &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="19.4911,13.8333"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="5.009308462554376"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="3.5726155970598077"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#a020f0"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="false"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Box" version="0" id="O27"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="34.4994,17.2967"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="34.4494,17.2467;39.5587,20.9193"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="34.4994,17.2967"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="5.009308462554376"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="3.5726155970598077"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000149011612"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="border_color"&gt;</div><div class='add'>+        &lt;dia:color val="#8b6914"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O28"&gt;</div><div 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&lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O27" connection="5"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O26" connection="5"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O29"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="34.4994,17.2967"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="19.4311,13.7733;34.5594,17.3567"/&gt;</div><div class='add'>+      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val="39.5087,17.2967"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="24.4404,13.7733;39.5687,17.3567"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="39.5087,17.2967"/&gt;</div><div class='add'>+        &lt;dia:point val="24.5004,13.8333"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_color"&gt;</div><div class='add'>+        &lt;dia:color val="#e60505"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="4"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O27" connection="2"/&gt;</div><div class='add'>+        &lt;dia:connection handle="1" to="O26" connection="2"/&gt;</div><div class='add'>+      &lt;/dia:connections&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Geometric - Perfect Circle" version="1" id="O32"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="39.855,18.7792"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="39.805,18.7292;40.755,19.6792"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="meta"&gt;</div><div class='add'>+        &lt;dia:composite type="dict"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_corner"&gt;</div><div class='add'>+        &lt;dia:point val="39.855,18.7792"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.84999999999999787"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="elem_height"&gt;</div><div class='add'>+        &lt;dia:real val="0.84999999999999787"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.10000000000000001"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_colour"&gt;</div><div class='add'>+        &lt;dia:color val="#000000"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="fill_colour"&gt;</div><div class='add'>+        &lt;dia:color val="#ffffff"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="show_background"&gt;</div><div class='add'>+        &lt;dia:boolean val="true"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="line_style"&gt;</div><div class='add'>+        &lt;dia:enum val="0"/&gt;</div><div class='add'>+        &lt;dia:real val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="flip_horizontal"&gt;</div><div class='add'>+        &lt;dia:boolean val="false"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="flip_vertical"&gt;</div><div class='add'>+        &lt;dia:boolean val="false"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="subscale"&gt;</div><div class='add'>+        &lt;dia:real val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+    &lt;/dia:object&gt;</div><div class='add'>+    &lt;dia:object type="Standard - Line" version="0" id="O33"&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_pos"&gt;</div><div class='add'>+        &lt;dia:point val="40.705,19.2042"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="obj_bb"&gt;</div><div class='add'>+        &lt;dia:rectangle val="40.655,18.8438;49.1203,19.5674"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="conn_endpoints"&gt;</div><div class='add'>+        &lt;dia:point val="40.705,19.2042"/&gt;</div><div class='add'>+        &lt;dia:point val="49.0085,19.2057"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="numcp"&gt;</div><div class='add'>+        &lt;dia:int val="1"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow"&gt;</div><div class='add'>+        &lt;dia:enum val="22"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow_length"&gt;</div><div class='add'>+        &lt;dia:real val="0.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:attribute name="end_arrow_width"&gt;</div><div class='add'>+        &lt;dia:real val="0.5"/&gt;</div><div class='add'>+      &lt;/dia:attribute&gt;</div><div class='add'>+      &lt;dia:connections&gt;</div><div class='add'>+        &lt;dia:connection handle="0" to="O32" connection="3"/&gt;</div><div class='add'>+      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y2="268.548"/&gt;</div><div class='add'>+    &lt;polygon style="fill: #a020f0" points="491.242,274.802 492.594,263.703 495.383,268.548 500.932,269.224 "/&gt;</div><div class='add'>+    &lt;polygon style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #a020f0" points="491.242,274.802 492.594,263.703 495.383,268.548 500.932,269.224 "/&gt;</div><div class='add'>+  &lt;/g&gt;</div><div class='add'>+&lt;/svg&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/v4l2.xml b/Documentation/DocBook/media/v4l/v4l2.xml<br/>index 8ae38876172e..015c561754b7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/v4l2.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/v4l2.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/v4l2.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/v4l2.xml</a></div><div class='hunk'>@@ -28,8 +28,8 @@ documentation.&lt;/contrib&gt;</div><div class='ctx'> 	&lt;firstname&gt;Hans&lt;/firstname&gt;</div><div class='ctx'> 	&lt;surname&gt;Verkuil&lt;/surname&gt;</div><div class='ctx'> 	&lt;contrib&gt;Designed and documented the VIDIOC_LOG_STATUS ioctl,</div><div class='del'>-the extended control ioctls and major parts of the sliced VBI</div><div class='del'>-API.&lt;/contrib&gt;</div><div class='add'>+the extended control ioctls, major parts of the sliced VBI API, the</div><div class='add'>+MPEG encoder and decoder APIs and the DV Timings API.&lt;/contrib&gt;</div><div class='ctx'> 	&lt;affiliation&gt;</div><div class='ctx'> 	  &lt;address&gt;</div><div class='ctx'> 	    &lt;email&gt;hverkuil@xs4all.nl&lt;/email&gt;</div><div class='hunk'>@@ -96,6 +96,17 @@ Remote Controller chapter.&lt;/contrib&gt;</div><div class='ctx'> 	  &lt;/address&gt;</div><div class='ctx'> 	&lt;/affiliation&gt;</div><div class='ctx'>       &lt;/author&gt;</div><div class='add'>+</div><div class='add'>+      &lt;author&gt;</div><div class='add'>+	&lt;firstname&gt;Sakari&lt;/firstname&gt;</div><div class='add'>+	&lt;surname&gt;Ailus&lt;/surname&gt;</div><div class='add'>+	&lt;contrib&gt;Subdev selections API.&lt;/contrib&gt;</div><div class='add'>+	&lt;affiliation&gt;</div><div class='add'>+	  &lt;address&gt;</div><div class='add'>+	    &lt;email&gt;sakari.ailus@iki.fi&lt;/email&gt;</div><div class='add'>+	  &lt;/address&gt;</div><div class='add'>+	&lt;/affiliation&gt;</div><div class='add'>+      &lt;/author&gt;</div><div class='ctx'>     &lt;/authorgroup&gt;</div><div class='ctx'> </div><div class='ctx'>     &lt;copyright&gt;</div><div class='hunk'>@@ -112,6 +123,7 @@ Remote Controller chapter.&lt;/contrib&gt;</div><div class='ctx'>       &lt;year&gt;2009&lt;/year&gt;</div><div class='ctx'>       &lt;year&gt;2010&lt;/year&gt;</div><div class='ctx'>       &lt;year&gt;2011&lt;/year&gt;</div><div class='add'>+      &lt;year&gt;2012&lt;/year&gt;</div><div class='ctx'>       &lt;holder&gt;Bill Dirks, Michael H. Schimek, Hans Verkuil, Martin</div><div class='ctx'> Rubli, Andy Walls, Muralidharan Karicheri, Mauro Carvalho Chehab,</div><div class='ctx'> 	Pawel Osciak&lt;/holder&gt;</div><div class='hunk'>@@ -128,6 +140,28 @@ structs, ioctls) must be noted in more detail in the history chapter</div><div class='ctx'> applications. --&gt;</div><div class='ctx'> </div><div class='ctx'>       &lt;revision&gt;</div><div class='add'>+	&lt;revnumber&gt;3.5&lt;/revnumber&gt;</div><div class='add'>+	&lt;date&gt;2012-05-07&lt;/date&gt;</div><div class='add'>+	&lt;authorinitials&gt;sa, sn&lt;/authorinitials&gt;</div><div class='add'>+	&lt;revremark&gt;Added V4L2_CTRL_TYPE_INTEGER_MENU and V4L2 subdev</div><div class='add'>+	    selections API. Improved the description of V4L2_CID_COLORFX</div><div class='add'>+	    control, added V4L2_CID_COLORFX_CBCR control.</div><div class='add'>+	    Added camera controls V4L2_CID_AUTO_EXPOSURE_BIAS,</div><div class='add'>+	    V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE, V4L2_CID_IMAGE_STABILIZATION,</div><div class='add'>+	    V4L2_CID_ISO_SENSITIVITY, V4L2_CID_ISO_SENSITIVITY_AUTO,</div><div class='add'>+	    V4L2_CID_EXPOSURE_METERING, V4L2_CID_SCENE_MODE,</div><div class='add'>+	    V4L2_CID_3A_LOCK, V4L2_CID_AUTO_FOCUS_START,</div><div class='add'>+	    V4L2_CID_AUTO_FOCUS_STOP, V4L2_CID_AUTO_FOCUS_STATUS</div><div class='add'>+	    and V4L2_CID_AUTO_FOCUS_RANGE.</div><div class='add'>+	&lt;/revremark&gt;</div><div class='add'>+	&lt;date&gt;2012-05-01&lt;/date&gt;</div><div class='add'>+	&lt;authorinitials&gt;hv&lt;/authorinitials&gt;</div><div class='add'>+	&lt;revremark&gt;Added VIDIOC_ENUM_DV_TIMINGS, VIDIOC_QUERY_DV_TIMINGS and</div><div class='add'>+	VIDIOC_DV_TIMINGS_CAP.</div><div class='add'>+	&lt;/revremark&gt;</div><div class='add'>+      &lt;/revision&gt;</div><div class='add'>+</div><div class='add'>+      &lt;revision&gt;</div><div class='ctx'> 	&lt;revnumber&gt;3.4&lt;/revnumber&gt;</div><div class='ctx'> 	&lt;date&gt;2012-01-25&lt;/date&gt;</div><div class='ctx'> 	&lt;authorinitials&gt;sn&lt;/authorinitials&gt;</div><div class='hunk'>@@ -433,7 +467,7 @@ and discussions on the V4L mailing list.&lt;/revremark&gt;</div><div class='ctx'> &lt;/partinfo&gt;</div><div class='ctx'> </div><div class='ctx'> &lt;title&gt;Video for Linux Two API Specification&lt;/title&gt;</div><div class='del'>- &lt;subtitle&gt;Revision 3.3&lt;/subtitle&gt;</div><div class='add'>+ &lt;subtitle&gt;Revision 3.5&lt;/subtitle&gt;</div><div class='ctx'> </div><div class='ctx'>   &lt;chapter id="common"&gt;</div><div class='ctx'>     &amp;sub-common;</div><div class='hunk'>@@ -491,10 +525,12 @@ and discussions on the V4L mailing list.&lt;/revremark&gt;</div><div class='ctx'>     &amp;sub-dbg-g-register;</div><div class='ctx'>     &amp;sub-decoder-cmd;</div><div class='ctx'>     &amp;sub-dqevent;</div><div class='add'>+    &amp;sub-dv-timings-cap;</div><div class='ctx'>     &amp;sub-encoder-cmd;</div><div class='ctx'>     &amp;sub-enumaudio;</div><div class='ctx'>     &amp;sub-enumaudioout;</div><div class='ctx'>     &amp;sub-enum-dv-presets;</div><div class='add'>+    &amp;sub-enum-dv-timings;</div><div class='ctx'>     &amp;sub-enum-fmt;</div><div class='ctx'>     &amp;sub-enum-framesizes;</div><div class='ctx'>     &amp;sub-enum-frameintervals;</div><div class='hunk'>@@ -529,6 +565,7 @@ and discussions on the V4L mailing list.&lt;/revremark&gt;</div><div class='ctx'>     &amp;sub-querycap;</div><div class='ctx'>     &amp;sub-queryctrl;</div><div class='ctx'>     &amp;sub-query-dv-preset;</div><div class='add'>+    &amp;sub-query-dv-timings;</div><div class='ctx'>     &amp;sub-querystd;</div><div class='ctx'>     &amp;sub-prepare-buf;</div><div class='ctx'>     &amp;sub-reqbufs;</div><div class='hunk'>@@ -540,6 +577,7 @@ and discussions on the V4L mailing list.&lt;/revremark&gt;</div><div class='ctx'>     &amp;sub-subdev-g-crop;</div><div class='ctx'>     &amp;sub-subdev-g-fmt;</div><div class='ctx'>     &amp;sub-subdev-g-frame-interval;</div><div class='add'>+    &amp;sub-subdev-g-selection;</div><div class='ctx'>     &amp;sub-subscribe-event;</div><div class='ctx'>     &lt;!-- End of ioctls. --&gt;</div><div class='ctx'>     &amp;sub-mmap;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml b/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml<br/>index 73ae8a6cd004..765549ff8a71 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-create-bufs.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-create-bufs.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-create-bufs.xml</a></div><div class='hunk'>@@ -48,6 +48,12 @@</div><div class='ctx'>   &lt;refsect1&gt;</div><div class='ctx'>     &lt;title&gt;Description&lt;/title&gt;</div><div class='ctx'> </div><div class='add'>+    &lt;note&gt;</div><div class='add'>+      &lt;title&gt;Experimental&lt;/title&gt;</div><div class='add'>+      &lt;para&gt;This is an &lt;link linkend="experimental"&gt; experimental &lt;/link&gt;</div><div class='add'>+      interface and may change in the future.&lt;/para&gt;</div><div class='add'>+    &lt;/note&gt;</div><div class='add'>+</div><div class='ctx'>     &lt;para&gt;This ioctl is used to create buffers for &lt;link linkend="mmap"&gt;memory</div><div class='ctx'> mapped&lt;/link&gt; or &lt;link linkend="userp"&gt;user pointer&lt;/link&gt;</div><div class='ctx'> I/O. It can be used as an alternative or in addition to the</div><div class='hunk'>@@ -94,16 +100,18 @@ information.&lt;/para&gt;</div><div class='ctx'> 	    &lt;entry&gt;The number of buffers requested or granted.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-memory;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;memory&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Applications set this field to</div><div class='ctx'> &lt;constant&gt;V4L2_MEMORY_MMAP&lt;/constant&gt; or</div><div class='del'>-&lt;constant&gt;V4L2_MEMORY_USERPTR&lt;/constant&gt;.&lt;/entry&gt;</div><div class='add'>+&lt;constant&gt;V4L2_MEMORY_USERPTR&lt;/constant&gt;. See &lt;xref linkend="v4l2-memory"</div><div class='add'>+/&gt;&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-format;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;format&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Filled in by the application, preserved by the driver.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Filled in by the application, preserved by the driver.</div><div class='add'>+	    See &lt;xref linkend="v4l2-format" /&gt;.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-cropcap.xml b/Documentation/DocBook/media/v4l/vidioc-cropcap.xml<br/>index b4f2f255211e..f1bac2c6e978 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-cropcap.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-cropcap.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-cropcap.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-cropcap.xml</a></div><div class='hunk'>@@ -65,7 +65,7 @@ output.&lt;/para&gt;</div><div class='ctx'> 	&amp;cs-str;</div><div class='ctx'> 	&lt;tbody valign="top"&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-buf-type;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Type of the data stream, set by the application.</div><div class='ctx'> Only these types are valid here:</div><div class='hunk'>@@ -73,7 +73,7 @@ Only these types are valid here:</div><div class='ctx'> &lt;constant&gt;V4L2_BUF_TYPE_VIDEO_OUTPUT&lt;/constant&gt;,</div><div class='ctx'> &lt;constant&gt;V4L2_BUF_TYPE_VIDEO_OVERLAY&lt;/constant&gt;, and custom (driver</div><div class='ctx'> defined) types with code &lt;constant&gt;V4L2_BUF_TYPE_PRIVATE&lt;/constant&gt;</div><div class='del'>-and higher.&lt;/entry&gt;</div><div class='add'>+and higher. See &lt;xref linkend="v4l2-buf-type" /&gt;.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;struct &lt;link linkend="v4l2-rect-crop"&gt;v4l2_rect&lt;/link&gt;&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-dv-timings-cap.xml b/Documentation/DocBook/media/v4l/vidioc-dv-timings-cap.xml<br/>new file mode 100644<br/>index 000000000000..6673ce582050<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-dv-timings-cap.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-dv-timings-cap.xml</a></div><div class='hunk'>@@ -0,0 +1,211 @@</div><div class='add'>+&lt;refentry id="vidioc-dv-timings-cap"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl VIDIOC_DV_TIMINGS_CAP&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;VIDIOC_DV_TIMINGS_CAP&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;The capabilities of the Digital Video receiver/transmitter&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;struct v4l2_dv_timings_cap *&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;VIDIOC_DV_TIMINGS_CAP&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;note&gt;</div><div class='add'>+      &lt;title&gt;Experimental&lt;/title&gt;</div><div class='add'>+      &lt;para&gt;This is an &lt;link linkend="experimental"&gt; experimental &lt;/link&gt;</div><div class='add'>+      interface and may change in the future.&lt;/para&gt;</div><div class='add'>+    &lt;/note&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;To query the available timings, applications initialize the</div><div class='add'>+&lt;structfield&gt;index&lt;/structfield&gt; field and zero the reserved array of &amp;v4l2-dv-timings-cap;</div><div class='add'>+and call the &lt;constant&gt;VIDIOC_DV_TIMINGS_CAP&lt;/constant&gt; ioctl with a pointer to this</div><div class='add'>+structure. Drivers fill the rest of the structure or return an</div><div class='add'>+&amp;EINVAL; when the index is out of bounds. To enumerate all supported DV timings,</div><div class='add'>+applications shall begin at index zero, incrementing by one until the</div><div class='add'>+driver returns &lt;errorcode&gt;EINVAL&lt;/errorcode&gt;. Note that drivers may enumerate a</div><div class='add'>+different set of DV timings after switching the video input or</div><div class='add'>+output.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+    &lt;table pgwide="1" frame="none" id="v4l2-bt-timings-cap"&gt;</div><div class='add'>+      &lt;title&gt;struct &lt;structname&gt;v4l2_bt_timings_cap&lt;/structname&gt;&lt;/title&gt;</div><div class='add'>+      &lt;tgroup cols="3"&gt;</div><div class='add'>+	&amp;cs-str;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;min_width&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Minimum width of the active video in pixels.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;max_width&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Maximum width of the active video in pixels.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;min_height&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Minimum height of the active video in lines.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;max_height&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Maximum height of the active video in lines.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u64&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;min_pixelclock&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Minimum pixelclock frequency in Hz.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u64&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;max_pixelclock&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Maximum pixelclock frequency in Hz.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;standards&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The video standard(s) supported by the hardware.</div><div class='add'>+	    See &lt;xref linkend="dv-bt-standards"/&gt; for a list of standards.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;capabilities&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Several flags giving more information about the capabilities.</div><div class='add'>+	    See &lt;xref linkend="dv-bt-cap-capabilities"/&gt; for a description of the flags.</div><div class='add'>+	    &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;reserved&lt;/structfield&gt;[16]&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+    &lt;/table&gt;</div><div class='add'>+</div><div class='add'>+    &lt;table pgwide="1" frame="none" id="v4l2-dv-timings-cap"&gt;</div><div class='add'>+      &lt;title&gt;struct &lt;structname&gt;v4l2_dv_timings_cap&lt;/structname&gt;&lt;/title&gt;</div><div class='add'>+      &lt;tgroup cols="4"&gt;</div><div class='add'>+	&amp;cs-str;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Type of DV timings as listed in &lt;xref linkend="dv-timing-types"/&gt;.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;reserved&lt;/structfield&gt;[3]&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reserved for future extensions. Drivers must set the array to zero.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;union&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&amp;v4l2-bt-timings-cap;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;bt&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;BT.656/1120 timings capabilities of the hardware.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;raw_data&lt;/structfield&gt;[32]&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+    &lt;/table&gt;</div><div class='add'>+</div><div class='add'>+    &lt;table pgwide="1" frame="none" id="dv-bt-cap-capabilities"&gt;</div><div class='add'>+      &lt;title&gt;DV BT Timing capabilities&lt;/title&gt;</div><div class='add'>+      &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-str;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;Flag&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;V4L2_DV_BT_CAP_INTERLACED&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Interlaced formats are supported.</div><div class='add'>+	    &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;V4L2_DV_BT_CAP_PROGRESSIVE&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Progressive formats are supported.</div><div class='add'>+	    &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;V4L2_DV_BT_CAP_REDUCED_BLANKING&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;CVT/GTF specific: the timings can make use of reduced blanking (CVT)</div><div class='add'>+or the 'Secondary GTF' curve (GTF).</div><div class='add'>+	    &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;V4L2_DV_BT_CAP_CUSTOM&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Can support non-standard timings, i.e. timings not belonging to the</div><div class='add'>+standards set in the &lt;structfield&gt;standards&lt;/structfield&gt; field.</div><div class='add'>+	    &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+    &lt;/table&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &amp;return-value;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='add'>+</div><div class='add'>+&lt;!--</div><div class='add'>+Local Variables:</div><div class='add'>+mode: sgml</div><div class='add'>+sgml-parent-document: "v4l2.sgml"</div><div class='add'>+indent-tabs-mode: nil</div><div class='add'>+End:</div><div class='add'>+--&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml b/Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml<br/>index 0be17c232d3a..509f0012d2a6 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml</a></div><div class='hunk'>@@ -48,6 +48,10 @@</div><div class='ctx'>   &lt;refsect1&gt;</div><div class='ctx'>     &lt;title&gt;Description&lt;/title&gt;</div><div class='ctx'> </div><div class='add'>+    &lt;para&gt;This ioctl is &lt;emphasis role="bold"&gt;deprecated&lt;/emphasis&gt;.</div><div class='add'>+    New drivers and applications should use &amp;VIDIOC-ENUM-DV-TIMINGS; instead.</div><div class='add'>+    &lt;/para&gt;</div><div class='add'>+</div><div class='ctx'>     &lt;para&gt;To query the attributes of a DV preset, applications initialize the</div><div class='ctx'> &lt;structfield&gt;index&lt;/structfield&gt; field and zero the reserved array of &amp;v4l2-dv-enum-preset;</div><div class='ctx'> and call the &lt;constant&gt;VIDIOC_ENUM_DV_PRESETS&lt;/constant&gt; ioctl with a pointer to this</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-enum-dv-timings.xml b/Documentation/DocBook/media/v4l/vidioc-enum-dv-timings.xml<br/>new file mode 100644<br/>index 000000000000..24c3bf4fd29a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enum-dv-timings.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-enum-dv-timings.xml</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+&lt;refentry id="vidioc-enum-dv-timings"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl VIDIOC_ENUM_DV_TIMINGS&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;VIDIOC_ENUM_DV_TIMINGS&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Enumerate supported Digital Video timings&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;struct v4l2_enum_dv_timings *&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;VIDIOC_ENUM_DV_TIMINGS&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;note&gt;</div><div class='add'>+      &lt;title&gt;Experimental&lt;/title&gt;</div><div class='add'>+      &lt;para&gt;This is an &lt;link linkend="experimental"&gt; experimental &lt;/link&gt;</div><div class='add'>+      interface and may change in the future.&lt;/para&gt;</div><div class='add'>+    &lt;/note&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;While some DV receivers or transmitters support a wide range of timings, others</div><div class='add'>+support only a limited number of timings. With this ioctl applications can enumerate a list</div><div class='add'>+of known supported timings. Call &amp;VIDIOC-DV-TIMINGS-CAP; to check if it also supports other</div><div class='add'>+standards or even custom timings that are not in this list.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;To query the available timings, applications initialize the</div><div class='add'>+&lt;structfield&gt;index&lt;/structfield&gt; field and zero the reserved array of &amp;v4l2-enum-dv-timings;</div><div class='add'>+and call the &lt;constant&gt;VIDIOC_ENUM_DV_TIMINGS&lt;/constant&gt; ioctl with a pointer to this</div><div class='add'>+structure. Drivers fill the rest of the structure or return an</div><div class='add'>+&amp;EINVAL; when the index is out of bounds. To enumerate all supported DV timings,</div><div class='add'>+applications shall begin at index zero, incrementing by one until the</div><div class='add'>+driver returns &lt;errorcode&gt;EINVAL&lt;/errorcode&gt;. Note that drivers may enumerate a</div><div class='add'>+different set of DV timings after switching the video input or</div><div class='add'>+output.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+    &lt;table pgwide="1" frame="none" id="v4l2-enum-dv-timings"&gt;</div><div class='add'>+      &lt;title&gt;struct &lt;structname&gt;v4l2_enum_dv_timings&lt;/structname&gt;&lt;/title&gt;</div><div class='add'>+      &lt;tgroup cols="3"&gt;</div><div class='add'>+	&amp;cs-str;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;index&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Number of the DV timings, set by the</div><div class='add'>+application.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;reserved&lt;/structfield&gt;[3]&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reserved for future extensions. Drivers must set the array to zero.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&amp;v4l2-dv-timings;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;timings&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The timings.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+    &lt;/table&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &amp;return-value;</div><div class='add'>+</div><div class='add'>+    &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;EINVAL&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;The &amp;v4l2-enum-dv-timings; &lt;structfield&gt;index&lt;/structfield&gt;</div><div class='add'>+is out of bounds.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='add'>+</div><div class='add'>+&lt;!--</div><div class='add'>+Local Variables:</div><div class='add'>+mode: sgml</div><div class='add'>+sgml-parent-document: "v4l2.sgml"</div><div class='add'>+indent-tabs-mode: nil</div><div class='add'>+End:</div><div class='add'>+--&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml b/Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml<br/>index 347d142e7431..81ebe48317fe 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml</a></div><div class='hunk'>@@ -71,7 +71,7 @@ the application. This is in no way related to the &lt;structfield&gt;</div><div class='ctx'> pixelformat&lt;/structfield&gt; field.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-buf-type;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Type of the data stream, set by the application.</div><div class='ctx'> Only these types are valid here:</div><div class='hunk'>@@ -81,7 +81,7 @@ Only these types are valid here:</div><div class='ctx'> &lt;constant&gt;V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE&lt;/constant&gt;,</div><div class='ctx'> &lt;constant&gt;V4L2_BUF_TYPE_VIDEO_OVERLAY&lt;/constant&gt;, and custom (driver</div><div class='ctx'> defined) types with code &lt;constant&gt;V4L2_BUF_TYPE_PRIVATE&lt;/constant&gt;</div><div class='del'>-and higher.&lt;/entry&gt;</div><div class='add'>+and higher. See &lt;xref linkend="v4l2-buf-type" /&gt;.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-enuminput.xml b/Documentation/DocBook/media/v4l/vidioc-enuminput.xml<br/>index 9b8efcd6e947..46d5a044a537 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enuminput.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-enuminput.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enuminput.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-enuminput.xml</a></div><div class='hunk'>@@ -285,7 +285,7 @@ input/output interface to linux-media@vger.kernel.org on 19 Oct 2009.</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_IN_CAP_CUSTOM_TIMINGS&lt;/constant&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;0x00000002&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;This input supports setting custom video timings by using VIDIOC_S_DV_TIMINGS.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;This input supports setting video timings by using VIDIOC_S_DV_TIMINGS.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_IN_CAP_STD&lt;/constant&gt;&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-enumoutput.xml b/Documentation/DocBook/media/v4l/vidioc-enumoutput.xml<br/>index a64d5ef103fa..428020000ef0 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enumoutput.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-enumoutput.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-enumoutput.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-enumoutput.xml</a></div><div class='hunk'>@@ -170,7 +170,7 @@ input/output interface to linux-media@vger.kernel.org on 19 Oct 2009.</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_OUT_CAP_CUSTOM_TIMINGS&lt;/constant&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;0x00000002&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;This output supports setting custom video timings by using VIDIOC_S_DV_TIMINGS.&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;This output supports setting video timings by using VIDIOC_S_DV_TIMINGS.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_OUT_CAP_STD&lt;/constant&gt;&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-g-crop.xml b/Documentation/DocBook/media/v4l/vidioc-g-crop.xml<br/>index 01a50640dce0..c4ff3b1887fb 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-crop.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-g-crop.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-crop.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-crop.xml</a></div><div class='hunk'>@@ -100,14 +100,14 @@ changed and &lt;constant&gt;VIDIOC_S_CROP&lt;/constant&gt; returns the</div><div class='ctx'> 	&amp;cs-str;</div><div class='ctx'> 	&lt;tbody valign="top"&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-buf-type;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Type of the data stream, set by the application.</div><div class='ctx'> Only these types are valid here: &lt;constant&gt;V4L2_BUF_TYPE_VIDEO_CAPTURE&lt;/constant&gt;,</div><div class='ctx'> &lt;constant&gt;V4L2_BUF_TYPE_VIDEO_OUTPUT&lt;/constant&gt;,</div><div class='ctx'> &lt;constant&gt;V4L2_BUF_TYPE_VIDEO_OVERLAY&lt;/constant&gt;, and custom (driver</div><div class='ctx'> defined) types with code &lt;constant&gt;V4L2_BUF_TYPE_PRIVATE&lt;/constant&gt;</div><div class='del'>-and higher.&lt;/entry&gt;</div><div class='add'>+and higher. See &lt;xref linkend="v4l2-buf-type" /&gt;.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;&amp;v4l2-rect;&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml b/Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml<br/>index 7940c1149393..61be9fa3803a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml</a></div><div class='hunk'>@@ -48,6 +48,12 @@</div><div class='ctx'> </div><div class='ctx'>   &lt;refsect1&gt;</div><div class='ctx'>     &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;These ioctls are &lt;emphasis role="bold"&gt;deprecated&lt;/emphasis&gt;.</div><div class='add'>+    New drivers and applications should use &amp;VIDIOC-G-DV-TIMINGS; and &amp;VIDIOC-S-DV-TIMINGS;</div><div class='add'>+    instead.</div><div class='add'>+    &lt;/para&gt;</div><div class='add'>+</div><div class='ctx'>     &lt;para&gt;To query and select the current DV preset, applications</div><div class='ctx'> use the &lt;constant&gt;VIDIOC_G_DV_PRESET&lt;/constant&gt; and &lt;constant&gt;VIDIOC_S_DV_PRESET&lt;/constant&gt;</div><div class='ctx'> ioctls which take a pointer to a &amp;v4l2-dv-preset; type as argument.</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml b/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml<br/>index 4a8648ae9a63..eda1a2991bbe 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'>   &lt;refnamediv&gt;</div><div class='ctx'>     &lt;refname&gt;VIDIOC_G_DV_TIMINGS&lt;/refname&gt;</div><div class='ctx'>     &lt;refname&gt;VIDIOC_S_DV_TIMINGS&lt;/refname&gt;</div><div class='del'>-    &lt;refpurpose&gt;Get or set custom DV timings for input or output&lt;/refpurpose&gt;</div><div class='add'>+    &lt;refpurpose&gt;Get or set DV timings for input or output&lt;/refpurpose&gt;</div><div class='ctx'>   &lt;/refnamediv&gt;</div><div class='ctx'> </div><div class='ctx'>   &lt;refsynopsisdiv&gt;</div><div class='hunk'>@@ -48,12 +48,15 @@</div><div class='ctx'> </div><div class='ctx'>   &lt;refsect1&gt;</div><div class='ctx'>     &lt;title&gt;Description&lt;/title&gt;</div><div class='del'>-    &lt;para&gt;To set custom DV timings for the input or output, applications use the</div><div class='del'>-&lt;constant&gt;VIDIOC_S_DV_TIMINGS&lt;/constant&gt; ioctl and to get the current custom timings,</div><div class='add'>+    &lt;para&gt;To set DV timings for the input or output, applications use the</div><div class='add'>+&lt;constant&gt;VIDIOC_S_DV_TIMINGS&lt;/constant&gt; ioctl and to get the current timings,</div><div class='ctx'> applications use the &lt;constant&gt;VIDIOC_G_DV_TIMINGS&lt;/constant&gt; ioctl. The detailed timing</div><div class='ctx'> information is filled in using the structure &amp;v4l2-dv-timings;. These ioctls take</div><div class='ctx'> a pointer to the &amp;v4l2-dv-timings; structure as argument. If the ioctl is not supported</div><div class='ctx'> or the timing values are not correct, the driver returns &amp;EINVAL;.&lt;/para&gt;</div><div class='add'>+&lt;para&gt;The &lt;filename&gt;linux/v4l2-dv-timings.h&lt;/filename&gt; header can be used to get the</div><div class='add'>+timings of the formats in the &lt;xref linkend="cea861" /&gt; and &lt;xref linkend="vesadmt" /&gt;</div><div class='add'>+standards.&lt;/para&gt;</div><div class='ctx'>   &lt;/refsect1&gt;</div><div class='ctx'> </div><div class='ctx'>   &lt;refsect1&gt;</div><div class='hunk'>@@ -83,12 +86,13 @@ or the timing values are not correct, the driver returns &amp;EINVAL;.&lt;/para&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;width&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Width of the active video in pixels&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Width of the active video in pixels.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;height&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Height of the active video in lines&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Height of the active video frame in lines. So for interlaced formats the</div><div class='add'>+	    height of the active video in each field is &lt;structfield&gt;height&lt;/structfield&gt;/2.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='hunk'>@@ -125,32 +129,52 @@ bit 0 (V4L2_DV_VSYNC_POS_POL) is for vertical sync polarity and bit 1 (V4L2_DV_H</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;vfrontporch&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Vertical front porch in lines&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Vertical front porch in lines. For interlaced formats this refers to the</div><div class='add'>+	    odd field (aka field 1).&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;vsync&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Vertical sync length in lines&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Vertical sync length in lines. For interlaced formats this refers to the</div><div class='add'>+	    odd field (aka field 1).&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;vbackporch&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Vertical back porch in lines&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Vertical back porch in lines. For interlaced formats this refers to the</div><div class='add'>+	    odd field (aka field 1).&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;il_vfrontporch&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Vertical front porch in lines for bottom field of interlaced field formats&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Vertical front porch in lines for the even field (aka field 2) of</div><div class='add'>+	    interlaced field formats.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;il_vsync&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Vertical sync length in lines for bottom field of interlaced field formats&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Vertical sync length in lines for the even field (aka field 2) of</div><div class='add'>+	    interlaced field formats.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;il_vbackporch&lt;/structfield&gt;&lt;/entry&gt;</div><div class='del'>-	    &lt;entry&gt;Vertical back porch in lines for bottom field of interlaced field formats&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Vertical back porch in lines for the even field (aka field 2) of</div><div class='add'>+	    interlaced field formats.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;standards&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The video standard(s) this format belongs to. This will be filled in by</div><div class='add'>+	    the driver. Applications must set this to 0. See &lt;xref linkend="dv-bt-standards"/&gt;</div><div class='add'>+	    for a list of standards.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;flags&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Several flags giving more information about the format.</div><div class='add'>+	    See &lt;xref linkend="dv-bt-flags"/&gt; for a description of the flags.</div><div class='add'>+	    &lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='hunk'>@@ -211,6 +235,90 @@ bit 0 (V4L2_DV_VSYNC_POS_POL) is for vertical sync polarity and bit 1 (V4L2_DV_H</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='ctx'>     &lt;/table&gt;</div><div class='add'>+    &lt;table pgwide="1" frame="none" id="dv-bt-standards"&gt;</div><div class='add'>+      &lt;title&gt;DV BT Timing standards&lt;/title&gt;</div><div class='add'>+      &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-str;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;Timing standard&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;V4L2_DV_BT_STD_CEA861&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The timings follow the CEA-861 Digital TV Profile standard&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;V4L2_DV_BT_STD_DMT&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The timings follow the VESA Discrete Monitor Timings standard&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;V4L2_DV_BT_STD_CVT&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The timings follow the VESA Coordinated Video Timings standard&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;V4L2_DV_BT_STD_GTF&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The timings follow the VESA Generalized Timings Formula standard&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+    &lt;/table&gt;</div><div class='add'>+    &lt;table pgwide="1" frame="none" id="dv-bt-flags"&gt;</div><div class='add'>+      &lt;title&gt;DV BT Timing flags&lt;/title&gt;</div><div class='add'>+      &lt;tgroup cols="2"&gt;</div><div class='add'>+	&amp;cs-str;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;Flag&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Description&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;V4L2_DV_FL_REDUCED_BLANKING&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;CVT/GTF specific: the timings use reduced blanking (CVT) or the 'Secondary</div><div class='add'>+GTF' curve (GTF). In both cases the horizontal and/or vertical blanking</div><div class='add'>+intervals are reduced, allowing a higher resolution over the same</div><div class='add'>+bandwidth. This is a read-only flag, applications must not set this.</div><div class='add'>+	    &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;V4L2_DV_FL_CAN_REDUCE_FPS&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;CEA-861 specific: set for CEA-861 formats with a framerate that is a multiple</div><div class='add'>+of six. These formats can be optionally played at 1 / 1.001 speed to</div><div class='add'>+be compatible with 60 Hz based standards such as NTSC and PAL-M that use a framerate of</div><div class='add'>+29.97 frames per second. If the transmitter can't generate such frequencies, then the</div><div class='add'>+flag will also be cleared. This is a read-only flag, applications must not set this.</div><div class='add'>+	    &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;V4L2_DV_FL_REDUCED_FPS&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;CEA-861 specific: only valid for video transmitters, the flag is cleared</div><div class='add'>+by receivers. It is also only valid for formats with the V4L2_DV_FL_CAN_REDUCE_FPS flag</div><div class='add'>+set, for other formats the flag will be cleared by the driver.</div><div class='add'>+</div><div class='add'>+If the application sets this flag, then the pixelclock used to set up the transmitter is</div><div class='add'>+divided by 1.001 to make it compatible with NTSC framerates. If the transmitter</div><div class='add'>+can't generate such frequencies, then the flag will also be cleared.</div><div class='add'>+	    &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;V4L2_DV_FL_HALF_LINE&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Specific to interlaced formats: if set, then field 1 (aka the odd field)</div><div class='add'>+is really one half-line longer and field 2 (aka the even field) is really one half-line</div><div class='add'>+shorter, so each field has exactly the same number of half-lines. Whether half-lines can be</div><div class='add'>+detected or used depends on the hardware.</div><div class='add'>+	    &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+    &lt;/table&gt;</div><div class='ctx'>   &lt;/refsect1&gt;</div><div class='ctx'>   &lt;refsect1&gt;</div><div class='ctx'>     &amp;return-value;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml b/Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml<br/>index b17a7aac6997..e3d5afcdafbb 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml</a></div><div class='hunk'>@@ -265,6 +265,32 @@ These controls are described in &lt;xref</div><div class='ctx'> These controls are described in &lt;xref</div><div class='ctx'> 		linkend="flash-controls" /&gt;.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_CTRL_CLASS_JPEG&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;0x9d0000&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The class containing JPEG compression controls.</div><div class='add'>+These controls are described in &lt;xref</div><div class='add'>+		linkend="jpeg-controls" /&gt;.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_CTRL_CLASS_IMAGE_SOURCE&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;0x9e0000&lt;/entry&gt; &lt;entry&gt;The class containing image</div><div class='add'>+	    source controls. These controls are described in &lt;xref</div><div class='add'>+	    linkend="image-source-controls" /&gt;.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_CTRL_CLASS_IMAGE_PROC&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;0x9f0000&lt;/entry&gt; &lt;entry&gt;The class containing image</div><div class='add'>+	    processing controls. These controls are described in &lt;xref</div><div class='add'>+	    linkend="image-process-controls" /&gt;.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_CTRL_CLASS_JPEG&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;0x9d0000&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The class containing JPEG compression controls.</div><div class='add'>+These controls are described in &lt;xref</div><div class='add'>+		linkend="jpeg-controls" /&gt;.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='ctx'> 	&lt;/tbody&gt;</div><div class='ctx'>       &lt;/tgroup&gt;</div><div class='ctx'>     &lt;/table&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-g-fmt.xml b/Documentation/DocBook/media/v4l/vidioc-g-fmt.xml<br/>index 17fbda15137b..52acff193a6f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-fmt.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-g-fmt.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-fmt.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-fmt.xml</a></div><div class='hunk'>@@ -116,7 +116,7 @@ this ioctl.&lt;/para&gt;</div><div class='ctx'> 	&lt;colspec colname="c4" /&gt;</div><div class='ctx'> 	&lt;tbody valign="top"&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-buf-type;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Type of the data stream, see &lt;xref</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-g-frequency.xml b/Documentation/DocBook/media/v4l/vidioc-g-frequency.xml<br/>index 66e9a5257861..69c178a4d205 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-frequency.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-g-frequency.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-frequency.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-frequency.xml</a></div><div class='hunk'>@@ -95,14 +95,14 @@ the &amp;v4l2-output; &lt;structfield&gt;modulator&lt;/structfield&gt; field and the</div><div class='ctx'> &amp;v4l2-modulator; &lt;structfield&gt;index&lt;/structfield&gt; field.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-tuner-type;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;The tuner type. This is the same value as in the</div><div class='del'>-&amp;v4l2-tuner; &lt;structfield&gt;type&lt;/structfield&gt; field. The type must be set</div><div class='add'>+&amp;v4l2-tuner; &lt;structfield&gt;type&lt;/structfield&gt; field. See The type must be set</div><div class='ctx'> to &lt;constant&gt;V4L2_TUNER_RADIO&lt;/constant&gt; for &lt;filename&gt;/dev/radioX&lt;/filename&gt;</div><div class='ctx'> device nodes, and to &lt;constant&gt;V4L2_TUNER_ANALOG_TV&lt;/constant&gt;</div><div class='ctx'> for all others. The field is not applicable to modulators, &amp;ie; ignored</div><div class='del'>-by drivers.&lt;/entry&gt;</div><div class='add'>+by drivers. See &lt;xref linkend="v4l2-tuner-type" /&gt;&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-g-parm.xml b/Documentation/DocBook/media/v4l/vidioc-g-parm.xml<br/>index 19b1d85dd668..f83d2cdd1185 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-parm.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-g-parm.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-parm.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-parm.xml</a></div><div class='hunk'>@@ -75,11 +75,12 @@ devices.&lt;/para&gt;</div><div class='ctx'> 	&amp;cs-ustr;</div><div class='ctx'> 	&lt;tbody valign="top"&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-buf-type;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;The buffer (stream) type, same as &amp;v4l2-format;</div><div class='del'>-&lt;structfield&gt;type&lt;/structfield&gt;, set by the application.&lt;/entry&gt;</div><div class='add'>+&lt;structfield&gt;type&lt;/structfield&gt;, set by the application. See &lt;xref</div><div class='add'>+	    linkend="v4l2-buf-type" /&gt;&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;union&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml b/Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml<br/>index 71741daaf725..bd015d1563ff 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml</a></div><div class='hunk'>@@ -148,7 +148,7 @@ using the &amp;VIDIOC-S-FMT; ioctl as described in &lt;xref</div><div class='ctx'> &lt;structfield&gt;service_lines&lt;/structfield&gt;[1][0] to zero.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-buf-type;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Type of the data stream, see &lt;xref</div><div class='ctx'> 		  linkend="v4l2-buf-type" /&gt;. Should be</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-g-tuner.xml b/Documentation/DocBook/media/v4l/vidioc-g-tuner.xml<br/>index 91ec2fb658f8..62a1aa200a36 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-tuner.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-g-tuner.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-g-tuner.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-g-tuner.xml</a></div><div class='hunk'>@@ -107,7 +107,7 @@ user.&lt;!-- FIXME Video inputs already have a name, the purpose of this</div><div class='ctx'> field is not quite clear.--&gt;&lt;/para&gt;&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-tuner-type;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry spanname="hspan"&gt;Type of the tuner, see &lt;xref</div><div class='ctx'> 		linkend="v4l2-tuner-type" /&gt;.&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml b/Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml<br/>index 7bde698760e4..fa7ad7e33228 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-prepare-buf.xml</a></div><div class='hunk'>@@ -48,6 +48,12 @@</div><div class='ctx'>   &lt;refsect1&gt;</div><div class='ctx'>     &lt;title&gt;Description&lt;/title&gt;</div><div class='ctx'> </div><div class='add'>+    &lt;note&gt;</div><div class='add'>+      &lt;title&gt;Experimental&lt;/title&gt;</div><div class='add'>+      &lt;para&gt;This is an &lt;link linkend="experimental"&gt; experimental &lt;/link&gt;</div><div class='add'>+      interface and may change in the future.&lt;/para&gt;</div><div class='add'>+    &lt;/note&gt;</div><div class='add'>+</div><div class='ctx'>     &lt;para&gt;Applications can optionally call the</div><div class='ctx'> &lt;constant&gt;VIDIOC_PREPARE_BUF&lt;/constant&gt; ioctl to pass ownership of the buffer</div><div class='ctx'> to the driver before actually enqueuing it, using the</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml b/Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml<br/>index 23b17f604211..1bc8aeb3ff1f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml</a></div><div class='hunk'>@@ -49,6 +49,10 @@ input&lt;/refpurpose&gt;</div><div class='ctx'>   &lt;refsect1&gt;</div><div class='ctx'>     &lt;title&gt;Description&lt;/title&gt;</div><div class='ctx'> </div><div class='add'>+    &lt;para&gt;This ioctl is &lt;emphasis role="bold"&gt;deprecated&lt;/emphasis&gt;.</div><div class='add'>+    New drivers and applications should use &amp;VIDIOC-QUERY-DV-TIMINGS; instead.</div><div class='add'>+    &lt;/para&gt;</div><div class='add'>+</div><div class='ctx'>     &lt;para&gt;The hardware may be able to detect the current DV preset</div><div class='ctx'> automatically, similar to sensing the video standard. To do so, applications</div><div class='ctx'> call &lt;constant&gt; VIDIOC_QUERY_DV_PRESET&lt;/constant&gt; with a pointer to a</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml b/Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml<br/>new file mode 100644<br/>index 000000000000..44935a0ffcf0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-query-dv-timings.xml</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+&lt;refentry id="vidioc-query-dv-timings"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl VIDIOC_QUERY_DV_TIMINGS&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;VIDIOC_QUERY_DV_TIMINGS&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Sense the DV preset received by the current</div><div class='add'>+input&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;struct v4l2_dv_timings *&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;variablelist&gt;</div><div class='add'>+	&lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;VIDIOC_QUERY_DV_TIMINGS&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;note&gt;</div><div class='add'>+      &lt;title&gt;Experimental&lt;/title&gt;</div><div class='add'>+      &lt;para&gt;This is an &lt;link linkend="experimental"&gt; experimental &lt;/link&gt;</div><div class='add'>+      interface and may change in the future.&lt;/para&gt;</div><div class='add'>+    &lt;/note&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;The hardware may be able to detect the current DV timings</div><div class='add'>+automatically, similar to sensing the video standard. To do so, applications</div><div class='add'>+call &lt;constant&gt;VIDIOC_QUERY_DV_TIMINGS&lt;/constant&gt; with a pointer to a</div><div class='add'>+&amp;v4l2-dv-timings;. Once the hardware detects the timings, it will fill in the</div><div class='add'>+timings structure.</div><div class='add'>+</div><div class='add'>+If the timings could not be detected because there was no signal, then</div><div class='add'>+&lt;errorcode&gt;ENOLINK&lt;/errorcode&gt; is returned. If a signal was detected, but</div><div class='add'>+it was unstable and the receiver could not lock to the signal, then</div><div class='add'>+&lt;errorcode&gt;ENOLCK&lt;/errorcode&gt; is returned. If the receiver could lock to the signal,</div><div class='add'>+but the format is unsupported (e.g. because the pixelclock is out of range</div><div class='add'>+of the hardware capabilities), then the driver fills in whatever timings it</div><div class='add'>+could find and returns &lt;errorcode&gt;ERANGE&lt;/errorcode&gt;. In that case the application</div><div class='add'>+can call &amp;VIDIOC-DV-TIMINGS-CAP; to compare the found timings with the hardware's</div><div class='add'>+capabilities in order to give more precise feedback to the user.</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &amp;return-value;</div><div class='add'>+</div><div class='add'>+    &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;ENOLINK&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;No timings could be detected because no signal was found.</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;ENOLCK&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;The signal was unstable and the hardware could not lock on to it.</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;ERANGE&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;Timings were found, but they are out of range of the hardware</div><div class='add'>+capabilities.</div><div class='add'>+&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-queryctrl.xml b/Documentation/DocBook/media/v4l/vidioc-queryctrl.xml<br/>index 36660d311b51..e6645b996558 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-queryctrl.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-queryctrl.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-queryctrl.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-queryctrl.xml</a></div><div class='hunk'>@@ -127,7 +127,7 @@ the first control with a higher ID. Drivers which do not support this</div><div class='ctx'> flag yet always return an &amp;EINVAL;.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-ctrl-type;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Type of control, see &lt;xref</div><div class='ctx'> 		linkend="v4l2-ctrl-type" /&gt;.&lt;/entry&gt;</div><div class='hunk'>@@ -215,11 +215,12 @@ the array to zero.&lt;/entry&gt;</div><div class='ctx'> </div><div class='ctx'>     &lt;table pgwide="1" frame="none" id="v4l2-querymenu"&gt;</div><div class='ctx'>       &lt;title&gt;struct &lt;structname&gt;v4l2_querymenu&lt;/structname&gt;&lt;/title&gt;</div><div class='del'>-      &lt;tgroup cols="3"&gt;</div><div class='add'>+      &lt;tgroup cols="4"&gt;</div><div class='ctx'> 	&amp;cs-str;</div><div class='ctx'> 	&lt;tbody valign="top"&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;id&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Identifies the control, set by the application</div><div class='ctx'> from the respective &amp;v4l2-queryctrl;</div><div class='hunk'>@@ -227,18 +228,38 @@ from the respective &amp;v4l2-queryctrl;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;index&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Index of the menu item, starting at zero, set by</div><div class='ctx'> 	    the application.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;union&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u8&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;name&lt;/structfield&gt;[32]&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Name of the menu item, a NUL-terminated ASCII</div><div class='del'>-string. This information is intended for the user.&lt;/entry&gt;</div><div class='add'>+string. This information is intended for the user. This field is valid</div><div class='add'>+for &lt;constant&gt;V4L2_CTRL_FLAG_MENU&lt;/constant&gt; type controls.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__s64&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;value&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;</div><div class='add'>+              Value of the integer menu item. This field is valid for</div><div class='add'>+              &lt;constant&gt;V4L2_CTRL_FLAG_INTEGER_MENU&lt;/constant&gt; type</div><div class='add'>+              controls.</div><div class='add'>+            &lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;reserved&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Reserved for future extensions. Drivers must set</div><div class='ctx'> the array to zero.&lt;/entry&gt;</div><div class='hunk'>@@ -292,6 +313,20 @@ the menu items can be enumerated with the</div><div class='ctx'> &lt;constant&gt;VIDIOC_QUERYMENU&lt;/constant&gt; ioctl.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_CTRL_TYPE_INTEGER_MENU&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&amp;ge; 0&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;1&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;N-1&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;</div><div class='add'>+              The control has a menu of N choices. The values of the</div><div class='add'>+              menu items can be enumerated with the</div><div class='add'>+              &lt;constant&gt;VIDIOC_QUERYMENU&lt;/constant&gt; ioctl. This is</div><div class='add'>+              similar to &lt;constant&gt;V4L2_CTRL_TYPE_MENU&lt;/constant&gt;</div><div class='add'>+              except that instead of strings, the menu items are</div><div class='add'>+              signed 64-bit integers.</div><div class='add'>+            &lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;constant&gt;V4L2_CTRL_TYPE_BITMASK&lt;/constant&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;0&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;n/a&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml b/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml<br/>index 7be4b1d29b90..d7c95057bc51 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-reqbufs.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-reqbufs.xml</a></div><div class='hunk'>@@ -92,18 +92,19 @@ streamoff.--&gt;&lt;/para&gt;</div><div class='ctx'> 	    &lt;entry&gt;The number of buffers requested or granted.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-buf-type;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Type of the stream or buffers, this is the same</div><div class='ctx'> as the &amp;v4l2-format; &lt;structfield&gt;type&lt;/structfield&gt; field. See &lt;xref</div><div class='ctx'> 		linkend="v4l2-buf-type" /&gt; for valid values.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-memory;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;memory&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;Applications set this field to</div><div class='ctx'> &lt;constant&gt;V4L2_MEMORY_MMAP&lt;/constant&gt; or</div><div class='del'>-&lt;constant&gt;V4L2_MEMORY_USERPTR&lt;/constant&gt;.&lt;/entry&gt;</div><div class='add'>+&lt;constant&gt;V4L2_MEMORY_USERPTR&lt;/constant&gt;. See &lt;xref linkend="v4l2-memory"</div><div class='add'>+/&gt;.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml b/Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml<br/>index 18b1a8266f7c..407dfceb71f0 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml</a></div><div class='hunk'>@@ -73,10 +73,11 @@ same value as in the &amp;v4l2-input; &lt;structfield&gt;tuner&lt;/structfield&gt;</div><div class='ctx'> field and the &amp;v4l2-tuner; &lt;structfield&gt;index&lt;/structfield&gt; field.&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='del'>-	    &lt;entry&gt;&amp;v4l2-tuner-type;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;&lt;structfield&gt;type&lt;/structfield&gt;&lt;/entry&gt;</div><div class='ctx'> 	    &lt;entry&gt;The tuner type. This is the same value as in the</div><div class='del'>-&amp;v4l2-tuner; &lt;structfield&gt;type&lt;/structfield&gt; field.&lt;/entry&gt;</div><div class='add'>+&amp;v4l2-tuner; &lt;structfield&gt;type&lt;/structfield&gt; field. See &lt;xref</div><div class='add'>+	    linkend="v4l2-tuner-type" /&gt;&lt;/entry&gt;</div><div class='ctx'> 	  &lt;/row&gt;</div><div class='ctx'> 	  &lt;row&gt;</div><div class='ctx'> 	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml b/Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml<br/>index 06197323a8cc..4cddd788c589 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml</a></div><div class='hunk'>@@ -58,9 +58,12 @@</div><div class='ctx'>     &lt;title&gt;Description&lt;/title&gt;</div><div class='ctx'> </div><div class='ctx'>     &lt;note&gt;</div><div class='del'>-      &lt;title&gt;Experimental&lt;/title&gt;</div><div class='del'>-      &lt;para&gt;This is an &lt;link linkend="experimental"&gt;experimental&lt;/link&gt;</div><div class='del'>-      interface and may change in the future.&lt;/para&gt;</div><div class='add'>+      &lt;title&gt;Obsolete&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;This is an &lt;link linkend="obsolete"&gt;obsolete&lt;/link&gt;</div><div class='add'>+      interface and may be removed in the future. It is superseded by</div><div class='add'>+      &lt;link linkend="vidioc-subdev-g-selection"&gt;the selection</div><div class='add'>+      API&lt;/link&gt;.&lt;/para&gt;</div><div class='ctx'>     &lt;/note&gt;</div><div class='ctx'> </div><div class='ctx'>     &lt;para&gt;To retrieve the current crop rectangle applications set the</div><div class='head'>diff --git a/Documentation/DocBook/media/v4l/vidioc-subdev-g-selection.xml b/Documentation/DocBook/media/v4l/vidioc-subdev-g-selection.xml<br/>new file mode 100644<br/>index 000000000000..208e9f0da3f3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/media/v4l/vidioc-subdev-g-selection.xml?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/media/v4l/vidioc-subdev-g-selection.xml</a></div><div class='hunk'>@@ -0,0 +1,228 @@</div><div class='add'>+&lt;refentry id="vidioc-subdev-g-selection"&gt;</div><div class='add'>+  &lt;refmeta&gt;</div><div class='add'>+    &lt;refentrytitle&gt;ioctl VIDIOC_SUBDEV_G_SELECTION, VIDIOC_SUBDEV_S_SELECTION&lt;/refentrytitle&gt;</div><div class='add'>+    &amp;manvol;</div><div class='add'>+  &lt;/refmeta&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refnamediv&gt;</div><div class='add'>+    &lt;refname&gt;VIDIOC_SUBDEV_G_SELECTION&lt;/refname&gt;</div><div class='add'>+    &lt;refname&gt;VIDIOC_SUBDEV_S_SELECTION&lt;/refname&gt;</div><div class='add'>+    &lt;refpurpose&gt;Get or set selection rectangles on a subdev pad&lt;/refpurpose&gt;</div><div class='add'>+  &lt;/refnamediv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsynopsisdiv&gt;</div><div class='add'>+    &lt;funcsynopsis&gt;</div><div class='add'>+      &lt;funcprototype&gt;</div><div class='add'>+	&lt;funcdef&gt;int &lt;function&gt;ioctl&lt;/function&gt;&lt;/funcdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;fd&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;int &lt;parameter&gt;request&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+	&lt;paramdef&gt;struct v4l2_subdev_selection *&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/paramdef&gt;</div><div class='add'>+      &lt;/funcprototype&gt;</div><div class='add'>+    &lt;/funcsynopsis&gt;</div><div class='add'>+  &lt;/refsynopsisdiv&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Arguments&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;fd&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&amp;fd;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;request&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;VIDIOC_SUBDEV_G_SELECTION, VIDIOC_SUBDEV_S_SELECTION&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;parameter&gt;argp&lt;/parameter&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &lt;title&gt;Description&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+    &lt;note&gt;</div><div class='add'>+      &lt;title&gt;Experimental&lt;/title&gt;</div><div class='add'>+      &lt;para&gt;This is an &lt;link linkend="experimental"&gt;experimental&lt;/link&gt;</div><div class='add'>+      interface and may change in the future.&lt;/para&gt;</div><div class='add'>+    &lt;/note&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;The selections are used to configure various image</div><div class='add'>+    processing functionality performed by the subdevs which affect the</div><div class='add'>+    image size. This currently includes cropping, scaling and</div><div class='add'>+    composition.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;The selection API replaces &lt;link</div><div class='add'>+    linkend="vidioc-subdev-g-crop"&gt;the old subdev crop API&lt;/link&gt;. All</div><div class='add'>+    the function of the crop API, and more, are supported by the</div><div class='add'>+    selections API.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+    &lt;para&gt;See &lt;xref linkend="subdev"&gt;&lt;/xref&gt; for</div><div class='add'>+    more information on how each selection target affects the image</div><div class='add'>+    processing pipeline inside the subdevice.&lt;/para&gt;</div><div class='add'>+</div><div class='add'>+    &lt;section&gt;</div><div class='add'>+      &lt;title&gt;Types of selection targets&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;There are two types of selection targets: actual and bounds.</div><div class='add'>+      The ACTUAL targets are the targets which configure the hardware.</div><div class='add'>+      The BOUNDS target will return a rectangle that contain all</div><div class='add'>+      possible ACTUAL rectangles.&lt;/para&gt;</div><div class='add'>+    &lt;/section&gt;</div><div class='add'>+</div><div class='add'>+    &lt;section&gt;</div><div class='add'>+      &lt;title&gt;Discovering supported features&lt;/title&gt;</div><div class='add'>+</div><div class='add'>+      &lt;para&gt;To discover which targets are supported, the user can</div><div class='add'>+      perform &lt;constant&gt;VIDIOC_SUBDEV_G_SELECTION&lt;/constant&gt; on them.</div><div class='add'>+      Any unsupported target will return</div><div class='add'>+      &lt;constant&gt;EINVAL&lt;/constant&gt;.&lt;/para&gt;</div><div class='add'>+    &lt;/section&gt;</div><div class='add'>+</div><div class='add'>+    &lt;table pgwide="1" frame="none" id="v4l2-subdev-selection-targets"&gt;</div><div class='add'>+      &lt;title&gt;V4L2 subdev selection targets&lt;/title&gt;</div><div class='add'>+      &lt;tgroup cols="3"&gt;</div><div class='add'>+        &amp;cs-def;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;0x0000&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Actual crop. Defines the cropping</div><div class='add'>+	    performed by the processing step.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;0x0002&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Bounds of the crop rectangle.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_SUBDEV_SEL_TGT_COMPOSE_ACTUAL&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;0x0100&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Actual compose rectangle. Used to configure scaling</div><div class='add'>+	    on sink pads and composition on source pads.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_SUBDEV_SEL_TGT_COMPOSE_BOUNDS&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;0x0102&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Bounds of the compose rectangle.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+    &lt;/table&gt;</div><div class='add'>+</div><div class='add'>+    &lt;table pgwide="1" frame="none" id="v4l2-subdev-selection-flags"&gt;</div><div class='add'>+      &lt;title&gt;V4L2 subdev selection flags&lt;/title&gt;</div><div class='add'>+      &lt;tgroup cols="3"&gt;</div><div class='add'>+        &amp;cs-def;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_SUBDEV_SEL_FLAG_SIZE_GE&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;(1 &amp;lt;&amp;lt; 0)&lt;/entry&gt; &lt;entry&gt;Suggest the driver it</div><div class='add'>+	    should choose greater or equal rectangle (in size) than</div><div class='add'>+	    was requested. Albeit the driver may choose a lesser size,</div><div class='add'>+	    it will only do so due to hardware limitations. Without</div><div class='add'>+	    this flag (and</div><div class='add'>+	    &lt;constant&gt;V4L2_SUBDEV_SEL_FLAG_SIZE_LE&lt;/constant&gt;) the</div><div class='add'>+	    behaviour is to choose the closest possible</div><div class='add'>+	    rectangle.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_SUBDEV_SEL_FLAG_SIZE_LE&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;(1 &amp;lt;&amp;lt; 1)&lt;/entry&gt; &lt;entry&gt;Suggest the driver it</div><div class='add'>+	    should choose lesser or equal rectangle (in size) than was</div><div class='add'>+	    requested. Albeit the driver may choose a greater size, it</div><div class='add'>+	    will only do so due to hardware limitations.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;constant&gt;V4L2_SUBDEV_SEL_FLAG_KEEP_CONFIG&lt;/constant&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;(1 &amp;lt;&amp;lt; 2)&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;The configuration should not be propagated to any</div><div class='add'>+	    further processing steps. If this flag is not given, the</div><div class='add'>+	    configuration is propagated inside the subdevice to all</div><div class='add'>+	    further processing steps.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+    &lt;/table&gt;</div><div class='add'>+</div><div class='add'>+    &lt;table pgwide="1" frame="none" id="v4l2-subdev-selection"&gt;</div><div class='add'>+      &lt;title&gt;struct &lt;structname&gt;v4l2_subdev_selection&lt;/structname&gt;&lt;/title&gt;</div><div class='add'>+      &lt;tgroup cols="3"&gt;</div><div class='add'>+        &amp;cs-str;</div><div class='add'>+	&lt;tbody valign="top"&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;which&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Active or try selection, from</div><div class='add'>+	    &amp;v4l2-subdev-format-whence;.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;pad&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Pad number as reported by the media framework.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;target&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Target selection rectangle. See</div><div class='add'>+	    &lt;xref linkend="v4l2-subdev-selection-targets"&gt;.&lt;/xref&gt;.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;flags&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Flags. See</div><div class='add'>+	    &lt;xref linkend="v4l2-subdev-selection-flags"&gt;.&lt;/xref&gt;&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;&amp;v4l2-rect;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;rect&lt;/structfield&gt;&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Selection rectangle, in pixels.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	  &lt;row&gt;</div><div class='add'>+	    &lt;entry&gt;__u32&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;&lt;structfield&gt;reserved&lt;/structfield&gt;[8]&lt;/entry&gt;</div><div class='add'>+	    &lt;entry&gt;Reserved for future extensions. Applications and drivers must</div><div class='add'>+	    set the array to zero.&lt;/entry&gt;</div><div class='add'>+	  &lt;/row&gt;</div><div class='add'>+	&lt;/tbody&gt;</div><div class='add'>+      &lt;/tgroup&gt;</div><div class='add'>+    &lt;/table&gt;</div><div class='add'>+</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+</div><div class='add'>+  &lt;refsect1&gt;</div><div class='add'>+    &amp;return-value;</div><div class='add'>+</div><div class='add'>+    &lt;variablelist&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;EBUSY&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;The selection rectangle can't be changed because the</div><div class='add'>+	  pad is currently busy. This can be caused, for instance, by</div><div class='add'>+	  an active video stream on the pad. The ioctl must not be</div><div class='add'>+	  retried without performing another action to fix the problem</div><div class='add'>+	  first. Only returned by</div><div class='add'>+	  &lt;constant&gt;VIDIOC_SUBDEV_S_SELECTION&lt;/constant&gt;&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+      &lt;varlistentry&gt;</div><div class='add'>+	&lt;term&gt;&lt;errorcode&gt;EINVAL&lt;/errorcode&gt;&lt;/term&gt;</div><div class='add'>+	&lt;listitem&gt;</div><div class='add'>+	  &lt;para&gt;The &amp;v4l2-subdev-selection;</div><div class='add'>+	  &lt;structfield&gt;pad&lt;/structfield&gt; references a non-existing</div><div class='add'>+	  pad, the &lt;structfield&gt;which&lt;/structfield&gt; field references a</div><div class='add'>+	  non-existing format, or the selection target is not</div><div class='add'>+	  supported on the given subdev pad.&lt;/para&gt;</div><div class='add'>+	&lt;/listitem&gt;</div><div class='add'>+      &lt;/varlistentry&gt;</div><div class='add'>+    &lt;/variablelist&gt;</div><div class='add'>+  &lt;/refsect1&gt;</div><div class='add'>+&lt;/refentry&gt;</div><div class='head'>diff --git a/Documentation/DocBook/mtdnand.tmpl b/Documentation/DocBook/mtdnand.tmpl<br/>index 0c674be0d3c6..e0aedb7a7827 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/DocBook/mtdnand.tmpl?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/DocBook/mtdnand.tmpl</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/DocBook/mtdnand.tmpl?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/DocBook/mtdnand.tmpl</a></div><div class='hunk'>@@ -1119,8 +1119,6 @@ in this page&lt;/entry&gt;</div><div class='ctx'> 		These constants are defined in nand.h. They are ored together to describe</div><div class='ctx'> 		the chip functionality.</div><div class='ctx'>      		&lt;programlisting&gt;</div><div class='del'>-/* Chip can not auto increment pages */</div><div class='del'>-#define NAND_NO_AUTOINCR	0x00000001</div><div class='ctx'> /* Buswitdh is 16 bit */</div><div class='ctx'> #define NAND_BUSWIDTH_16	0x00000002</div><div class='ctx'> /* Device supports partial programming without padding */</div><div class='head'>diff --git a/Documentation/HOWTO b/Documentation/HOWTO<br/>index f7ade3b3b40d..59c080f084ef 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/HOWTO?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/HOWTO</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/HOWTO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/HOWTO</a></div><div class='hunk'>@@ -218,16 +218,16 @@ The development process</div><div class='ctx'> Linux kernel development process currently consists of a few different</div><div class='ctx'> main kernel "branches" and lots of different subsystem-specific kernel</div><div class='ctx'> branches.  These different branches are:</div><div class='del'>-  - main 2.6.x kernel tree</div><div class='del'>-  - 2.6.x.y -stable kernel tree</div><div class='del'>-  - 2.6.x -git kernel patches</div><div class='add'>+  - main 3.x kernel tree</div><div class='add'>+  - 3.x.y -stable kernel tree</div><div class='add'>+  - 3.x -git kernel patches</div><div class='ctx'>   - subsystem specific kernel trees and patches</div><div class='del'>-  - the 2.6.x -next kernel tree for integration tests</div><div class='add'>+  - the 3.x -next kernel tree for integration tests</div><div class='ctx'> </div><div class='del'>-2.6.x kernel tree</div><div class='add'>+3.x kernel tree</div><div class='ctx'> -----------------</div><div class='del'>-2.6.x kernels are maintained by Linus Torvalds, and can be found on</div><div class='del'>-kernel.org in the pub/linux/kernel/v2.6/ directory.  Its development</div><div class='add'>+3.x kernels are maintained by Linus Torvalds, and can be found on</div><div class='add'>+kernel.org in the pub/linux/kernel/v3.x/ directory.  Its development</div><div class='ctx'> process is as follows:</div><div class='ctx'>   - As soon as a new kernel is released a two weeks window is open,</div><div class='ctx'>     during this period of time maintainers can submit big diffs to</div><div class='hunk'>@@ -262,20 +262,20 @@ mailing list about kernel releases:</div><div class='ctx'> 	released according to perceived bug status, not according to a</div><div class='ctx'> 	preconceived timeline."</div><div class='ctx'> </div><div class='del'>-2.6.x.y -stable kernel tree</div><div class='add'>+3.x.y -stable kernel tree</div><div class='ctx'> ---------------------------</div><div class='del'>-Kernels with 4-part versions are -stable kernels. They contain</div><div class='add'>+Kernels with 3-part versions are -stable kernels. They contain</div><div class='ctx'> relatively small and critical fixes for security problems or significant</div><div class='del'>-regressions discovered in a given 2.6.x kernel.</div><div class='add'>+regressions discovered in a given 3.x kernel.</div><div class='ctx'> </div><div class='ctx'> This is the recommended branch for users who want the most recent stable</div><div class='ctx'> kernel and are not interested in helping test development/experimental</div><div class='ctx'> versions.</div><div class='ctx'> </div><div class='del'>-If no 2.6.x.y kernel is available, then the highest numbered 2.6.x</div><div class='add'>+If no 3.x.y kernel is available, then the highest numbered 3.x</div><div class='ctx'> kernel is the current stable kernel.</div><div class='ctx'> </div><div class='del'>-2.6.x.y are maintained by the "stable" team &lt;stable@vger.kernel.org&gt;, and</div><div class='add'>+3.x.y are maintained by the "stable" team &lt;stable@vger.kernel.org&gt;, and</div><div class='ctx'> are released as needs dictate.  The normal release period is approximately</div><div class='ctx'> two weeks, but it can be longer if there are no pressing problems.  A</div><div class='ctx'> security-related problem, instead, can cause a release to happen almost</div><div class='hunk'>@@ -285,7 +285,7 @@ The file Documentation/stable_kernel_rules.txt in the kernel tree</div><div class='ctx'> documents what kinds of changes are acceptable for the -stable tree, and</div><div class='ctx'> how the release process works.</div><div class='ctx'> </div><div class='del'>-2.6.x -git patches</div><div class='add'>+3.x -git patches</div><div class='ctx'> ------------------</div><div class='ctx'> These are daily snapshots of Linus' kernel tree which are managed in a</div><div class='ctx'> git repository (hence the name.) These patches are usually released</div><div class='hunk'>@@ -317,13 +317,13 @@ revisions to it, and maintainers can mark patches as under review,</div><div class='ctx'> accepted, or rejected.  Most of these patchwork sites are listed at</div><div class='ctx'> http://patchwork.kernel.org/.</div><div class='ctx'> </div><div class='del'>-2.6.x -next kernel tree for integration tests</div><div class='add'>+3.x -next kernel tree for integration tests</div><div class='ctx'> ---------------------------------------------</div><div class='del'>-Before updates from subsystem trees are merged into the mainline 2.6.x</div><div class='add'>+Before updates from subsystem trees are merged into the mainline 3.x</div><div class='ctx'> tree, they need to be integration-tested.  For this purpose, a special</div><div class='ctx'> testing repository exists into which virtually all subsystem trees are</div><div class='ctx'> pulled on an almost daily basis:</div><div class='del'>-	http://git.kernel.org/?p=linux/kernel/git/sfr/linux-next.git</div><div class='add'>+	http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git</div><div class='ctx'> 	http://linux.f-seidel.de/linux-next/pmwiki/</div><div class='ctx'> </div><div class='ctx'> This way, the -next kernel gives a summary outlook onto what will be</div><div class='head'>diff --git a/Documentation/Makefile b/Documentation/Makefile<br/>index 30b656ece7aa..31d302bc5863 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/Makefile</a></div><div class='hunk'>@@ -1,3 +1,3 @@</div><div class='ctx'> obj-m := DocBook/ accounting/ auxdisplay/ connector/ \</div><div class='ctx'> 	filesystems/ filesystems/configfs/ ia64/ laptops/ networking/ \</div><div class='del'>-	pcmcia/ spi/ timers/ watchdog/src/</div><div class='add'>+	pcmcia/ spi/ timers/ watchdog/src/ misc-devices/mei/</div><div class='head'>diff --git a/Documentation/RCU/torture.txt b/Documentation/RCU/torture.txt<br/>index 375d3fb71437..4ddf3913fd8c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/RCU/torture.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/RCU/torture.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/RCU/torture.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/RCU/torture.txt</a></div><div class='hunk'>@@ -47,6 +47,16 @@ irqreader	Says to invoke RCU readers from irq level.  This is currently</div><div class='ctx'> 		permit this.  (Or, more accurately, variants of RCU that do</div><div class='ctx'> 		-not- permit this know to ignore this variable.)</div><div class='ctx'> </div><div class='add'>+n_barrier_cbs	If this is nonzero, RCU barrier testing will be conducted,</div><div class='add'>+		in which case n_barrier_cbs specifies the number of</div><div class='add'>+		RCU callbacks (and corresponding kthreads) to use for</div><div class='add'>+		this testing.  The value cannot be negative.  If you</div><div class='add'>+		specify this to be non-zero when torture_type indicates a</div><div class='add'>+		synchronous RCU implementation (one for which a member of</div><div class='add'>+		the synchronize_rcu() rather than the call_rcu() family is</div><div class='add'>+		used -- see the documentation for torture_type below), an</div><div class='add'>+		error will be reported and no testing will be carried out.</div><div class='add'>+</div><div class='ctx'> nfakewriters	This is the number of RCU fake writer threads to run.  Fake</div><div class='ctx'> 		writer threads repeatedly use the synchronous "wait for</div><div class='ctx'> 		current readers" function of the interface selected by</div><div class='hunk'>@@ -188,7 +198,7 @@ OUTPUT</div><div class='ctx'> The statistics output is as follows:</div><div class='ctx'> </div><div class='ctx'> 	rcu-torture:--- Start of test: nreaders=16 nfakewriters=4 stat_interval=30 verbose=0 test_no_idle_hz=1 shuffle_interval=3 stutter=5 irqreader=1 fqs_duration=0 fqs_holdoff=0 fqs_stutter=3 test_boost=1/0 test_boost_interval=7 test_boost_duration=4</div><div class='del'>-	rcu-torture: rtc:           (null) ver: 155441 tfle: 0 rta: 155441 rtaf: 8884 rtf: 155440 rtmbe: 0 rtbke: 0 rtbre: 0 rtbf: 0 rtb: 0 nt: 3055767</div><div class='add'>+	rcu-torture: rtc:           (null) ver: 155441 tfle: 0 rta: 155441 rtaf: 8884 rtf: 155440 rtmbe: 0 rtbe: 0 rtbke: 0 rtbre: 0 rtbf: 0 rtb: 0 nt: 3055767</div><div class='ctx'> 	rcu-torture: Reader Pipe:  727860534 34213 0 0 0 0 0 0 0 0 0</div><div class='ctx'> 	rcu-torture: Reader Batch:  727877838 17003 0 0 0 0 0 0 0 0 0</div><div class='ctx'> 	rcu-torture: Free-Block Circulation:  155440 155440 155440 155440 155440 155440 155440 155440 155440 155440 0</div><div class='hunk'>@@ -230,6 +240,9 @@ o	"rtmbe": A non-zero value indicates that rcutorture believes that</div><div class='ctx'> 	rcu_assign_pointer() and rcu_dereference() are not working</div><div class='ctx'> 	correctly.  This value should be zero.</div><div class='ctx'> </div><div class='add'>+o	"rtbe": A non-zero value indicates that one of the rcu_barrier()</div><div class='add'>+	family of functions is not working correctly.</div><div class='add'>+</div><div class='ctx'> o	"rtbke": rcutorture was unable to create the real-time kthreads</div><div class='ctx'> 	used to force RCU priority inversion.  This value should be zero.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/SubmittingPatches b/Documentation/SubmittingPatches<br/>index 4468ce24427c..c379a2a6949f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/SubmittingPatches?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/SubmittingPatches</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/SubmittingPatches?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/SubmittingPatches</a></div><div class='hunk'>@@ -150,7 +150,8 @@ be able to justify all violations that remain in your patch.</div><div class='ctx'> </div><div class='ctx'> Look through the MAINTAINERS file and the source code, and determine</div><div class='ctx'> if your change applies to a specific subsystem of the kernel, with</div><div class='del'>-an assigned maintainer.  If so, e-mail that person.</div><div class='add'>+an assigned maintainer.  If so, e-mail that person.  The script</div><div class='add'>+scripts/get_maintainer.pl can be very useful at this step.</div><div class='ctx'> </div><div class='ctx'> If no maintainer is listed, or the maintainer does not respond, send</div><div class='ctx'> your patch to the primary Linux kernel developer's mailing list,</div><div class='head'>diff --git a/Documentation/arm/00-INDEX b/Documentation/arm/00-INDEX<br/>index 91c24a1e8a9e..36420e116c90 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/arm/00-INDEX?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/arm/00-INDEX</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/arm/00-INDEX?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/arm/00-INDEX</a></div><div class='hunk'>@@ -4,8 +4,6 @@ Booting</div><div class='ctx'> 	- requirements for booting</div><div class='ctx'> Interrupts</div><div class='ctx'> 	- ARM Interrupt subsystem documentation</div><div class='del'>-IXP2000</div><div class='del'>-	- Release Notes for Linux on Intel's IXP2000 Network Processor</div><div class='ctx'> msm</div><div class='ctx'> 	- MSM specific documentation</div><div class='ctx'> Netwinder</div><div class='head'>diff --git a/Documentation/arm/IXP2000 b/Documentation/arm/IXP2000<br/>deleted file mode 100644<br/>index 68d21d92a30b..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/arm/IXP2000?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/arm/IXP2000</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,69 +0,0 @@</div><div class='del'>-</div><div class='del'>--------------------------------------------------------------------------</div><div class='del'>-Release Notes for Linux on Intel's IXP2000 Network Processor</div><div class='del'>-</div><div class='del'>-Maintained by Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>--------------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-1. Overview</div><div class='del'>-</div><div class='del'>-Intel's IXP2000 family of NPUs (IXP2400, IXP2800, IXP2850) is designed</div><div class='del'>-for high-performance network applications such high-availability</div><div class='del'>-telecom systems. In addition to an XScale core, it contains up to 8</div><div class='del'>-"MicroEngines" that run special code, several high-end networking </div><div class='del'>-interfaces (UTOPIA, SPI, etc), a PCI host bridge, one serial port,</div><div class='del'>-flash interface, and some other odds and ends. For more information, see:</div><div class='del'>-</div><div class='del'>-http://developer.intel.com</div><div class='del'>-</div><div class='del'>-2. Linux Support</div><div class='del'>-</div><div class='del'>-Linux currently supports the following features on the IXP2000 NPUs:</div><div class='del'>-</div><div class='del'>-- On-chip serial</div><div class='del'>-- PCI</div><div class='del'>-- Flash (MTD/JFFS2)</div><div class='del'>-- I2C through GPIO</div><div class='del'>-- Timers (watchdog, OS)</div><div class='del'>-</div><div class='del'>-That is about all we can support under Linux ATM b/c the core networking</div><div class='del'>-components of the chip are accessed via Intel's closed source SDK. </div><div class='del'>-Please contact Intel directly on issues with using those. There is</div><div class='del'>-also a mailing list run by some folks at Princeton University that might</div><div class='del'>-be of help:  https://lists.cs.princeton.edu/mailman/listinfo/ixp2xxx</div><div class='del'>-</div><div class='del'>-WHATEVER YOU DO, DO NOT POST EMAIL TO THE LINUX-ARM OR LINUX-ARM-KERNEL</div><div class='del'>-MAILING LISTS REGARDING THE INTEL SDK.</div><div class='del'>-</div><div class='del'>-3. Supported Platforms</div><div class='del'>-</div><div class='del'>-- Intel IXDP2400 Reference Platform</div><div class='del'>-- Intel IXDP2800 Reference Platform</div><div class='del'>-- Intel IXDP2401 Reference Platform</div><div class='del'>-- Intel IXDP2801 Reference Platform</div><div class='del'>-- RadiSys ENP-2611</div><div class='del'>-</div><div class='del'>-4. Usage Notes</div><div class='del'>-</div><div class='del'>-- The IXP2000 platforms usually have rather complex PCI bus topologies</div><div class='del'>-  with large memory space requirements. In addition, b/c of the way the</div><div class='del'>-  Intel SDK is designed, devices are enumerated in a very specific</div><div class='del'>-  way. B/c of this this, we use "pci=firmware" option in the kernel</div><div class='del'>-  command line so that we do not re-enumerate the bus.</div><div class='del'>-</div><div class='del'>-- IXDP2x01 systems have variable clock tick rates that we cannot determine </div><div class='del'>-  via HW registers. The "ixdp2x01_clk=XXX" cmd line options allow you</div><div class='del'>-  to pass the clock rate to the board port.</div><div class='del'>-</div><div class='del'>-5. Thanks</div><div class='del'>-</div><div class='del'>-The IXP2000 work has been funded by Intel Corp. and MontaVista Software, Inc.</div><div class='del'>-</div><div class='del'>-The following people have contributed patches/comments/etc:</div><div class='del'>-</div><div class='del'>-Naeem F. Afzal</div><div class='del'>-Lennert Buytenhek</div><div class='del'>-Jeffrey Daly</div><div class='del'>-</div><div class='del'>--------------------------------------------------------------------------</div><div class='del'>-Last Update: 8/09/2004</div><div class='head'>diff --git a/Documentation/arm/OMAP/DSS b/Documentation/arm/OMAP/DSS<br/>index 888ae7b83ae4..a564ceea9e98 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/arm/OMAP/DSS?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/arm/OMAP/DSS</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/arm/OMAP/DSS?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/arm/OMAP/DSS</a></div><div class='hunk'>@@ -47,6 +47,51 @@ flexible way to enable non-common multi-display configuration. In addition to</div><div class='ctx'> modelling the hardware overlays, omapdss supports virtual overlays and overlay</div><div class='ctx'> managers. These can be used when updating a display with CPU or system DMA.</div><div class='ctx'> </div><div class='add'>+omapdss driver support for audio</div><div class='add'>+--------------------------------</div><div class='add'>+There exist several display technologies and standards that support audio as</div><div class='add'>+well. Hence, it is relevant to update the DSS device driver to provide an audio</div><div class='add'>+interface that may be used by an audio driver or any other driver interested in</div><div class='add'>+the functionality.</div><div class='add'>+</div><div class='add'>+The audio_enable function is intended to prepare the relevant</div><div class='add'>+IP for playback (e.g., enabling an audio FIFO, taking in/out of reset</div><div class='add'>+some IP, enabling companion chips, etc). It is intended to be called before</div><div class='add'>+audio_start. The audio_disable function performs the reverse operation and is</div><div class='add'>+intended to be called after audio_stop.</div><div class='add'>+</div><div class='add'>+While a given DSS device driver may support audio, it is possible that for</div><div class='add'>+certain configurations audio is not supported (e.g., an HDMI display using a</div><div class='add'>+VESA video timing). The audio_supported function is intended to query whether</div><div class='add'>+the current configuration of the display supports audio.</div><div class='add'>+</div><div class='add'>+The audio_config function is intended to configure all the relevant audio</div><div class='add'>+parameters of the display. In order to make the function independent of any</div><div class='add'>+specific DSS device driver, a struct omap_dss_audio is defined. Its purpose</div><div class='add'>+is to contain all the required parameters for audio configuration. At the</div><div class='add'>+moment, such structure contains pointers to IEC-60958 channel status word</div><div class='add'>+and CEA-861 audio infoframe structures. This should be enough to support</div><div class='add'>+HDMI and DisplayPort, as both are based on CEA-861 and IEC-60958.</div><div class='add'>+</div><div class='add'>+The audio_enable/disable, audio_config and audio_supported functions could be</div><div class='add'>+implemented as functions that may sleep. Hence, they should not be called</div><div class='add'>+while holding a spinlock or a readlock.</div><div class='add'>+</div><div class='add'>+The audio_start/audio_stop function is intended to effectively start/stop audio</div><div class='add'>+playback after the configuration has taken place. These functions are designed</div><div class='add'>+to be used in an atomic context. Hence, audio_start should return quickly and be</div><div class='add'>+called only after all the needed resources for audio playback (audio FIFOs,</div><div class='add'>+DMA channels, companion chips, etc) have been enabled to begin data transfers.</div><div class='add'>+audio_stop is designed to only stop the audio transfers. The resources used</div><div class='add'>+for playback are released using audio_disable.</div><div class='add'>+</div><div class='add'>+The enum omap_dss_audio_state may be used to help the implementations of</div><div class='add'>+the interface to keep track of the audio state. The initial state is _DISABLED;</div><div class='add'>+then, the state transitions to _CONFIGURED, and then, when it is ready to</div><div class='add'>+play audio, to _ENABLED. The state _PLAYING is used when the audio is being</div><div class='add'>+rendered.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> Panel and controller drivers</div><div class='ctx'> ----------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -156,6 +201,7 @@ timings		Display timings (pixclock,xres/hfp/hbp/hsw,yres/vfp/vbp/vsw)</div><div class='ctx'> 		"pal" and "ntsc"</div><div class='ctx'> panel_name</div><div class='ctx'> tear_elim	Tearing elimination 0=off, 1=on</div><div class='add'>+output_type	Output type (video encoder only): "composite" or "svideo"</div><div class='ctx'> </div><div class='ctx'> There are also some debugfs files at &lt;debugfs&gt;/omapdss/ which show information</div><div class='ctx'> about clocks and registers.</div><div class='head'>diff --git a/Documentation/arm/SPEAr/overview.txt b/Documentation/arm/SPEAr/overview.txt<br/>index 253a35c6f782..57aae7765c74 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/arm/SPEAr/overview.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/arm/SPEAr/overview.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/arm/SPEAr/overview.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/arm/SPEAr/overview.txt</a></div><div class='hunk'>@@ -8,53 +8,56 @@ Introduction</div><div class='ctx'>   weblink : http://www.st.com/spear</div><div class='ctx'> </div><div class='ctx'>   The ST Microelectronics SPEAr range of ARM9/CortexA9 System-on-Chip CPUs are</div><div class='del'>-  supported by the 'spear' platform of ARM Linux. Currently SPEAr300,</div><div class='del'>-  SPEAr310, SPEAr320 and SPEAr600 SOCs are supported. Support for the SPEAr13XX</div><div class='del'>-  series is in progress.</div><div class='add'>+  supported by the 'spear' platform of ARM Linux. Currently SPEAr1310,</div><div class='add'>+  SPEAr1340, SPEAr300, SPEAr310, SPEAr320 and SPEAr600 SOCs are supported.</div><div class='ctx'> </div><div class='ctx'>   Hierarchy in SPEAr is as follows:</div><div class='ctx'> </div><div class='ctx'>   SPEAr (Platform)</div><div class='ctx'> 	- SPEAr3XX (3XX SOC series, based on ARM9)</div><div class='ctx'> 		- SPEAr300 (SOC)</div><div class='del'>-			- SPEAr300_EVB (Evaluation Board)</div><div class='add'>+			- SPEAr300 Evaluation Board</div><div class='ctx'> 		- SPEAr310 (SOC)</div><div class='del'>-			- SPEAr310_EVB (Evaluation Board)</div><div class='add'>+			- SPEAr310 Evaluation Board</div><div class='ctx'> 		- SPEAr320 (SOC)</div><div class='del'>-			- SPEAr320_EVB (Evaluation Board)</div><div class='add'>+			- SPEAr320 Evaluation Board</div><div class='ctx'> 	- SPEAr6XX (6XX SOC series, based on ARM9)</div><div class='ctx'> 		- SPEAr600 (SOC)</div><div class='del'>-			- SPEAr600_EVB (Evaluation Board)</div><div class='add'>+			- SPEAr600 Evaluation Board</div><div class='ctx'> 	- SPEAr13XX (13XX SOC series, based on ARM CORTEXA9)</div><div class='del'>-		- SPEAr1300 (SOC)</div><div class='add'>+		- SPEAr1310 (SOC)</div><div class='add'>+			- SPEAr1310 Evaluation Board</div><div class='add'>+		- SPEAr1340 (SOC)</div><div class='add'>+			- SPEAr1340 Evaluation Board</div><div class='ctx'> </div><div class='ctx'>   Configuration</div><div class='ctx'>   -------------</div><div class='ctx'> </div><div class='ctx'>   A generic configuration is provided for each machine, and can be used as the</div><div class='ctx'>   default by</div><div class='del'>-	make spear600_defconfig</div><div class='del'>-	make spear300_defconfig</div><div class='del'>-	make spear310_defconfig</div><div class='del'>-	make spear320_defconfig</div><div class='add'>+	make spear13xx_defconfig</div><div class='add'>+	make spear3xx_defconfig</div><div class='add'>+	make spear6xx_defconfig</div><div class='ctx'> </div><div class='ctx'>   Layout</div><div class='ctx'>   ------</div><div class='ctx'> </div><div class='del'>-  The common files for multiple machine families (SPEAr3XX, SPEAr6XX and</div><div class='del'>-  SPEAr13XX) are located in the platform code contained in arch/arm/plat-spear</div><div class='add'>+  The common files for multiple machine families (SPEAr3xx, SPEAr6xx and</div><div class='add'>+  SPEAr13xx) are located in the platform code contained in arch/arm/plat-spear</div><div class='ctx'>   with headers in plat/.</div><div class='ctx'> </div><div class='ctx'>   Each machine series have a directory with name arch/arm/mach-spear followed by</div><div class='ctx'>   series name. Like mach-spear3xx, mach-spear6xx and mach-spear13xx.</div><div class='ctx'> </div><div class='del'>-  Common file for machines of spear3xx family is mach-spear3xx/spear3xx.c and for</div><div class='del'>-  spear6xx is mach-spear6xx/spear6xx.c. mach-spear* also contain soc/machine</div><div class='del'>-  specific files, like spear300.c, spear310.c, spear320.c and spear600.c.</div><div class='del'>-  mach-spear* also contains board specific files for each machine type.</div><div class='add'>+  Common file for machines of spear3xx family is mach-spear3xx/spear3xx.c, for</div><div class='add'>+  spear6xx is mach-spear6xx/spear6xx.c and for spear13xx family is</div><div class='add'>+  mach-spear13xx/spear13xx.c. mach-spear* also contain soc/machine specific</div><div class='add'>+  files, like spear1310.c, spear1340.c spear300.c, spear310.c, spear320.c and</div><div class='add'>+  spear600.c.  mach-spear* doesn't contains board specific files as they fully</div><div class='add'>+  support Flattened Device Tree.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'>   Document Author</div><div class='ctx'>   ---------------</div><div class='ctx'> </div><div class='del'>-  Viresh Kumar, (c) 2010 ST Microelectronics</div><div class='add'>+  Viresh Kumar &lt;viresh.kumar@st.com&gt;, (c) 2010-2012 ST Microelectronics</div><div class='head'>diff --git a/Documentation/blackfin/bfin-gpio-notes.txt b/Documentation/blackfin/bfin-gpio-notes.txt<br/>index d36b01f778b9..d245f39c3d01 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/blackfin/bfin-gpio-notes.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/blackfin/bfin-gpio-notes.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/blackfin/bfin-gpio-notes.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/blackfin/bfin-gpio-notes.txt</a></div><div class='hunk'>@@ -53,7 +53,7 @@</div><div class='ctx'> </div><div class='ctx'> 3. But there are some exceptions</div><div class='ctx'>     - Kernel permit the identical GPIO be requested both as GPIO and GPIO</div><div class='del'>-    interrut.</div><div class='add'>+    interrupt.</div><div class='ctx'>     Some drivers, like gpio-keys, need this behavior. Kernel only print out</div><div class='ctx'>     warning messages like,</div><div class='ctx'> 	bfin-gpio: GPIO 24 is already reserved by gpio-keys: BTN0, and you are</div><div class='head'>diff --git a/Documentation/cgroups/memory.txt b/Documentation/cgroups/memory.txt<br/>index 9b1067afb224..dd88540bb995 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/cgroups/memory.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/cgroups/memory.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/cgroups/memory.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/cgroups/memory.txt</a></div><div class='hunk'>@@ -184,12 +184,14 @@ behind this approach is that a cgroup that aggressively uses a shared</div><div class='ctx'> page will eventually get charged for it (once it is uncharged from</div><div class='ctx'> the cgroup that brought it in -- this will happen on memory pressure).</div><div class='ctx'> </div><div class='add'>+But see section 8.2: when moving a task to another cgroup, its pages may</div><div class='add'>+be recharged to the new cgroup, if move_charge_at_immigrate has been chosen.</div><div class='add'>+</div><div class='ctx'> Exception: If CONFIG_CGROUP_CGROUP_MEM_RES_CTLR_SWAP is not used.</div><div class='ctx'> When you do swapoff and make swapped-out pages of shmem(tmpfs) to</div><div class='ctx'> be backed into memory in force, charges for pages are accounted against the</div><div class='ctx'> caller of swapoff rather than the users of shmem.</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 2.4 Swap Extension (CONFIG_CGROUP_MEM_RES_CTLR_SWAP)</div><div class='ctx'> </div><div class='ctx'> Swap Extension allows you to record charge for swap. A swapped-in page is</div><div class='hunk'>@@ -374,14 +376,15 @@ cgroup might have some charge associated with it, even though all</div><div class='ctx'> tasks have migrated away from it. (because we charge against pages, not</div><div class='ctx'> against tasks.)</div><div class='ctx'> </div><div class='del'>-Such charges are freed or moved to their parent. At moving, both of RSS</div><div class='del'>-and CACHES are moved to parent.</div><div class='del'>-rmdir() may return -EBUSY if freeing/moving fails. See 5.1 also.</div><div class='add'>+We move the stats to root (if use_hierarchy==0) or parent (if</div><div class='add'>+use_hierarchy==1), and no change on the charge except uncharging</div><div class='add'>+from the child.</div><div class='ctx'> </div><div class='ctx'> Charges recorded in swap information is not updated at removal of cgroup.</div><div class='ctx'> Recorded information is discarded and a cgroup which uses swap (swapcache)</div><div class='ctx'> will be charged as a new owner of it.</div><div class='ctx'> </div><div class='add'>+About use_hierarchy, see Section 6.</div><div class='ctx'> </div><div class='ctx'> 5. Misc. interfaces.</div><div class='ctx'> </div><div class='hunk'>@@ -394,13 +397,15 @@ will be charged as a new owner of it.</div><div class='ctx'> </div><div class='ctx'>   Almost all pages tracked by this memory cgroup will be unmapped and freed.</div><div class='ctx'>   Some pages cannot be freed because they are locked or in-use. Such pages are</div><div class='del'>-  moved to parent and this cgroup will be empty. This may return -EBUSY if</div><div class='del'>-  VM is too busy to free/move all pages immediately.</div><div class='add'>+  moved to parent(if use_hierarchy==1) or root (if use_hierarchy==0) and this</div><div class='add'>+  cgroup will be empty.</div><div class='ctx'> </div><div class='ctx'>   Typical use case of this interface is that calling this before rmdir().</div><div class='ctx'>   Because rmdir() moves all pages to parent, some out-of-use page caches can be</div><div class='ctx'>   moved to the parent. If you want to avoid that, force_empty will be useful.</div><div class='ctx'> </div><div class='add'>+  About use_hierarchy, see Section 6.</div><div class='add'>+</div><div class='ctx'> 5.2 stat file</div><div class='ctx'> </div><div class='ctx'> memory.stat file includes following statistics</div><div class='hunk'>@@ -430,17 +435,10 @@ hierarchical_memory_limit - # of bytes of memory limit with regard to hierarchy</div><div class='ctx'> hierarchical_memsw_limit - # of bytes of memory+swap limit with regard to</div><div class='ctx'> 			hierarchy under which memory cgroup is.</div><div class='ctx'> </div><div class='del'>-total_cache		- sum of all children's "cache"</div><div class='del'>-total_rss		- sum of all children's "rss"</div><div class='del'>-total_mapped_file	- sum of all children's "cache"</div><div class='del'>-total_pgpgin		- sum of all children's "pgpgin"</div><div class='del'>-total_pgpgout		- sum of all children's "pgpgout"</div><div class='del'>-total_swap		- sum of all children's "swap"</div><div class='del'>-total_inactive_anon	- sum of all children's "inactive_anon"</div><div class='del'>-total_active_anon	- sum of all children's "active_anon"</div><div class='del'>-total_inactive_file	- sum of all children's "inactive_file"</div><div class='del'>-total_active_file	- sum of all children's "active_file"</div><div class='del'>-total_unevictable	- sum of all children's "unevictable"</div><div class='add'>+total_&lt;counter&gt;		- # hierarchical version of &lt;counter&gt;, which in</div><div class='add'>+			addition to the cgroup's own value includes the</div><div class='add'>+			sum of all hierarchical children's values of</div><div class='add'>+			&lt;counter&gt;, i.e. total_cache</div><div class='ctx'> </div><div class='ctx'> # The following additional stats are dependent on CONFIG_DEBUG_VM.</div><div class='ctx'> </div><div class='hunk'>@@ -622,8 +620,7 @@ memory cgroup.</div><div class='ctx'>   bit | what type of charges would be moved ?</div><div class='ctx'>  -----+------------------------------------------------------------------------</div><div class='ctx'>    0  | A charge of an anonymous page(or swap of it) used by the target task.</div><div class='del'>-      | Those pages and swaps must be used only by the target task. You must</div><div class='del'>-      | enable Swap Extension(see 2.4) to enable move of swap charges.</div><div class='add'>+      | You must enable Swap Extension(see 2.4) to enable move of swap charges.</div><div class='ctx'>  -----+------------------------------------------------------------------------</div><div class='ctx'>    1  | A charge of file pages(normal file, tmpfs file(e.g. ipc shared memory)</div><div class='ctx'>       | and swaps of tmpfs file) mmapped by the target task. Unlike the case of</div><div class='hunk'>@@ -636,8 +633,6 @@ memory cgroup.</div><div class='ctx'> </div><div class='ctx'> 8.3 TODO</div><div class='ctx'> </div><div class='del'>-- Implement madvise(2) to let users decide the vma to be moved or not to be</div><div class='del'>-  moved.</div><div class='ctx'> - All of moving charge operations are done under cgroup_mutex. It's not good</div><div class='ctx'>   behavior to hold the mutex too long, so we may need some trick.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/cgroups/resource_counter.txt b/Documentation/cgroups/resource_counter.txt<br/>index 95b24d766eab..0c4a344e78fa 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/cgroups/resource_counter.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/cgroups/resource_counter.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/cgroups/resource_counter.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/cgroups/resource_counter.txt</a></div><div class='hunk'>@@ -77,11 +77,11 @@ to work with it.</div><div class='ctx'> 	where the charging failed.</div><div class='ctx'> </div><div class='ctx'>  d. int res_counter_charge_locked</div><div class='del'>-			(struct res_counter *rc, unsigned long val)</div><div class='add'>+			(struct res_counter *rc, unsigned long val, bool force)</div><div class='ctx'> </div><div class='ctx'> 	The same as res_counter_charge(), but it must not acquire/release the</div><div class='ctx'> 	res_counter-&gt;lock internally (it must be called with res_counter-&gt;lock</div><div class='del'>-	held).</div><div class='add'>+	held). The force parameter indicates whether we can bypass the limit.</div><div class='ctx'> </div><div class='ctx'>  e. void res_counter_uncharge[_locked]</div><div class='ctx'> 			(struct res_counter *rc, unsigned long val)</div><div class='hunk'>@@ -92,6 +92,14 @@ to work with it.</div><div class='ctx'> </div><div class='ctx'> 	The _locked routines imply that the res_counter-&gt;lock is taken.</div><div class='ctx'> </div><div class='add'>+ f. void res_counter_uncharge_until</div><div class='add'>+		(struct res_counter *rc, struct res_counter *top,</div><div class='add'>+		 unsinged long val)</div><div class='add'>+</div><div class='add'>+	Almost same as res_cunter_uncharge() but propagation of uncharge</div><div class='add'>+	stops when rc == top. This is useful when kill a res_coutner in</div><div class='add'>+	child cgroup.</div><div class='add'>+</div><div class='ctx'>  2.1 Other accounting routines</div><div class='ctx'> </div><div class='ctx'>     There are more routines that may help you with common needs, like</div><div class='head'>diff --git a/Documentation/cris/README b/Documentation/cris/README<br/>index d9b086869a60..8dbdb1a44429 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/cris/README?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/cris/README</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/cris/README?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/cris/README</a></div><div class='hunk'>@@ -1,38 +1,34 @@</div><div class='del'>-Linux 2.4 on the CRIS architecture</div><div class='del'>-==================================</div><div class='del'>-$Id: README,v 1.7 2001/04/19 12:38:32 bjornw Exp $</div><div class='add'>+Linux on the CRIS architecture</div><div class='add'>+==============================</div><div class='ctx'> </div><div class='del'>-This is a port of Linux 2.4 to Axis Communications ETRAX 100LX embedded </div><div class='del'>-network CPU. For more information about CRIS and ETRAX please see further</div><div class='del'>-below.</div><div class='add'>+This is a port of Linux to Axis Communications ETRAX 100LX,</div><div class='add'>+ETRAX FS and ARTPEC-3 embedded network CPUs.</div><div class='add'>+</div><div class='add'>+For more information about CRIS and ETRAX please see further below.</div><div class='ctx'> </div><div class='ctx'> In order to compile this you need a version of gcc with support for the</div><div class='del'>-ETRAX chip family. Please see this link for more information on how to </div><div class='add'>+ETRAX chip family. Please see this link for more information on how to</div><div class='ctx'> download the compiler and other tools useful when building and booting</div><div class='ctx'> software for the ETRAX platform:</div><div class='ctx'> </div><div class='del'>-http://developer.axis.com/doc/software/devboard_lx/install-howto.html</div><div class='del'>-</div><div class='del'>-&lt;more specific information should come in this document later&gt;</div><div class='add'>+http://developer.axis.com/wiki/doku.php?id=axis:install-howto-2_20</div><div class='ctx'> </div><div class='ctx'> What is CRIS ?</div><div class='ctx'> --------------</div><div class='ctx'> </div><div class='ctx'> CRIS is an acronym for 'Code Reduced Instruction Set'. It is the CPU</div><div class='ctx'> architecture in Axis Communication AB's range of embedded network CPU's,</div><div class='del'>-called ETRAX. The latest CPU is called ETRAX 100LX, where LX stands for</div><div class='del'>-'Linux' because the chip was designed to be a good host for the Linux</div><div class='del'>-operating system.</div><div class='add'>+called ETRAX.</div><div class='ctx'> </div><div class='ctx'> The ETRAX 100LX chip</div><div class='ctx'> --------------------</div><div class='ctx'> </div><div class='del'>-For reference, please see the press-release:</div><div class='add'>+For reference, please see the following link:</div><div class='ctx'> </div><div class='del'>-http://www.axis.com/news/us/001101_etrax.htm</div><div class='add'>+http://www.axis.com/products/dev_etrax_100lx/index.htm</div><div class='ctx'> </div><div class='del'>-The ETRAX 100LX is a 100 MIPS processor with 8kB cache, MMU, and a very broad </div><div class='del'>-range of  built-in interfaces, all with modern scatter/gather DMA.</div><div class='add'>+The ETRAX 100LX is a 100 MIPS processor with 8kB cache, MMU, and a very broad</div><div class='add'>+range of built-in interfaces, all with modern scatter/gather DMA.</div><div class='ctx'> </div><div class='ctx'> Memory interfaces:</div><div class='ctx'> </div><div class='hunk'>@@ -51,20 +47,28 @@ I/O interfaces:</div><div class='ctx'> 	* SCSI</div><div class='ctx'> 	* two parallel-ports</div><div class='ctx'> 	* two generic 8-bit ports</div><div class='del'>-	</div><div class='del'>-	(not all interfaces are available at the same time due to chip pin </div><div class='add'>+</div><div class='add'>+	(not all interfaces are available at the same time due to chip pin</div><div class='ctx'>          multiplexing)</div><div class='ctx'> </div><div class='del'>-The previous version of the ETRAX, the ETRAX 100, sits in almost all of</div><div class='del'>-Axis shipping thin-servers like the Axis 2100 web camera or the ETRAX 100</div><div class='del'>-developer-board. It lacks an MMU so the Linux we run on that is a version</div><div class='del'>-of uClinux (Linux 2.0 without MM-support) ported to the CRIS architecture.</div><div class='del'>-The new Linux 2.4 port has full MM and needs a CPU with an MMU, so it will</div><div class='del'>-not run on the ETRAX 100.</div><div class='add'>+ETRAX 100LX is CRISv10 architecture.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+The ETRAX FS and ARTPEC-3 chips</div><div class='add'>+-------------------------------</div><div class='ctx'> </div><div class='del'>-A version of the Axis developer-board with ETRAX 100LX (running Linux</div><div class='del'>-2.4) is now available. For more information please see developer.axis.com.</div><div class='add'>+The ETRAX FS is a 200MHz 32-bit RISC processor with on-chip 16kB</div><div class='add'>+I-cache and 16kB D-cache and with a wide range of device interfaces</div><div class='add'>+including multiple high speed serial ports and an integrated USB 1.1 PHY.</div><div class='ctx'> </div><div class='add'>+The ARTPEC-3 is a variant of the ETRAX FS with additional IO-units</div><div class='add'>+used by the Axis Communications network cameras.</div><div class='add'>+</div><div class='add'>+See below link for more information:</div><div class='add'>+</div><div class='add'>+http://www.axis.com/products/dev_etrax_fs/index.htm</div><div class='add'>+</div><div class='add'>+ETRAX FS and ARTPEC-3 are both CRISv32 architectures.</div><div class='ctx'> </div><div class='ctx'> Bootlog</div><div class='ctx'> -------</div><div class='hunk'>@@ -182,10 +186,6 @@ SwapFree:            0 kB</div><div class='ctx'> -rwxr-xr-x  1 342      100         16252  Jan 01 00:00 telnetd</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-(All programs are statically linked to the libc at this point - we have not ported the</div><div class='del'>- shared libraries yet)</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/device-mapper/thin-provisioning.txt b/Documentation/device-mapper/thin-provisioning.txt<br/>index 3370bc4d7b98..f5cfc62b7ad3 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/device-mapper/thin-provisioning.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/device-mapper/thin-provisioning.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/device-mapper/thin-provisioning.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/device-mapper/thin-provisioning.txt</a></div><div class='hunk'>@@ -287,6 +287,17 @@ iii) Messages</div><div class='ctx'> 	the current transaction id is when you change it with this</div><div class='ctx'> 	compare-and-swap message.</div><div class='ctx'> </div><div class='add'>+    reserve_metadata_snap</div><div class='add'>+</div><div class='add'>+        Reserve a copy of the data mapping btree for use by userland.</div><div class='add'>+        This allows userland to inspect the mappings as they were when</div><div class='add'>+        this message was executed.  Use the pool's status command to</div><div class='add'>+        get the root block associated with the metadata snapshot.</div><div class='add'>+</div><div class='add'>+    release_metadata_snap</div><div class='add'>+</div><div class='add'>+        Release a previously reserved copy of the data mapping btree.</div><div class='add'>+</div><div class='ctx'> 'thin' target</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devices.txt b/Documentation/devices.txt<br/>index 00383186d8fb..47a154f30290 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devices.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devices.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devices.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devices.txt</a></div><div class='hunk'>@@ -98,7 +98,8 @@ Your cooperation is appreciated.</div><div class='ctx'> 		  8 = /dev/random	Nondeterministic random number gen.</div><div class='ctx'> 		  9 = /dev/urandom	Faster, less secure random number gen.</div><div class='ctx'> 		 10 = /dev/aio		Asynchronous I/O notification interface</div><div class='del'>-		 11 = /dev/kmsg		Writes to this come out as printk's</div><div class='add'>+		 11 = /dev/kmsg		Writes to this come out as printk's, reads</div><div class='add'>+					export the buffered printk records.</div><div class='ctx'> 		 12 = /dev/oldmem	Used by crashdump kernels to access</div><div class='ctx'> 					the memory of the kernel that crashed.</div><div class='ctx'> </div><div class='hunk'>@@ -846,13 +847,7 @@ Your cooperation is appreciated.</div><div class='ctx'> 		    ...</div><div class='ctx'> 		 31 = /dev/tap15	16th Ethertap device</div><div class='ctx'> </div><div class='del'>- 36 block	MCA ESDI hard disk</div><div class='del'>-		  0 = /dev/eda		First ESDI disk whole disk</div><div class='del'>-		 64 = /dev/edb		Second ESDI disk whole disk</div><div class='del'>-		    ...</div><div class='del'>-</div><div class='del'>-		Partitions are handled in the same way as IDE disks</div><div class='del'>-		(see major number 3).</div><div class='add'>+ 36 block	OBSOLETE (was MCA ESDI hard disk)</div><div class='ctx'> </div><div class='ctx'>  37 char	IDE tape</div><div class='ctx'> 		  0 = /dev/ht0		First IDE tape</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt<br/>new file mode 100644<br/>index 000000000000..52478c83d0cc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/arch_timer.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/arch_timer.txt</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+* ARM architected timer</div><div class='add'>+</div><div class='add'>+ARM Cortex-A7 and Cortex-A15 have a per-core architected timer, which</div><div class='add'>+provides per-cpu timers.</div><div class='add'>+</div><div class='add'>+The timer is attached to a GIC to deliver its per-processor interrupts.</div><div class='add'>+</div><div class='add'>+** Timer node properties:</div><div class='add'>+</div><div class='add'>+- compatible : Should at least contain "arm,armv7-timer".</div><div class='add'>+</div><div class='add'>+- interrupts : Interrupt list for secure, non-secure, virtual and</div><div class='add'>+  hypervisor timers, in that order.</div><div class='add'>+</div><div class='add'>+- clock-frequency : The frequency of the main counter, in Hz. Optional.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,cortex-a15-timer",</div><div class='add'>+			     "arm,armv7-timer";</div><div class='add'>+		interrupts = &lt;1 13 0xf08&gt;,</div><div class='add'>+			     &lt;1 14 0xf08&gt;,</div><div class='add'>+			     &lt;1 11 0xf08&gt;,</div><div class='add'>+			     &lt;1 10 0xf08&gt;;</div><div class='add'>+		clock-frequency = &lt;100000000&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/atmel-adc.txt b/Documentation/devicetree/bindings/arm/atmel-adc.txt<br/>new file mode 100644<br/>index 000000000000..c63097d6afeb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/atmel-adc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/atmel-adc.txt</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+* AT91's Analog to Digital Converter (ADC)</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+  - compatible: Should be "atmel,at91sam9260-adc"</div><div class='add'>+  - reg: Should contain ADC registers location and length</div><div class='add'>+  - interrupts: Should contain the IRQ line for the ADC</div><div class='add'>+  - atmel,adc-channel-base: Offset of the first channel data register</div><div class='add'>+  - atmel,adc-channels-used: Bitmask of the channels muxed and enable for this</div><div class='add'>+    device</div><div class='add'>+  - atmel,adc-drdy-mask: Mask of the DRDY interruption in the ADC</div><div class='add'>+  - atmel,adc-num-channels: Number of channels available in the ADC</div><div class='add'>+  - atmel,adc-startup-time: Startup Time of the ADC in microseconds as</div><div class='add'>+    defined in the datasheet</div><div class='add'>+  - atmel,adc-status-register: Offset of the Interrupt Status Register</div><div class='add'>+  - atmel,adc-trigger-register: Offset of the Trigger Register</div><div class='add'>+  - atmel,adc-vref: Reference voltage in millivolts for the conversions</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+  - atmel,adc-use-external: Boolean to enable of external triggers</div><div class='add'>+ </div><div class='add'>+Optional trigger Nodes:</div><div class='add'>+  - Required properties:</div><div class='add'>+    * trigger-name: Name of the trigger exposed to the user</div><div class='add'>+    * trigger-value: Value to put in the Trigger register</div><div class='add'>+      to activate this trigger</div><div class='add'>+  - Optional properties:</div><div class='add'>+    * trigger-external: Is the trigger an external trigger?</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+adc0: adc@fffb0000 {</div><div class='add'>+	compatible = "atmel,at91sam9260-adc";</div><div class='add'>+	reg = &lt;0xfffb0000 0x100&gt;;</div><div class='add'>+	interrupts = &lt;20 4&gt;;</div><div class='add'>+	atmel,adc-channel-base = &lt;0x30&gt;;</div><div class='add'>+	atmel,adc-channels-used = &lt;0xff&gt;;</div><div class='add'>+	atmel,adc-drdy-mask = &lt;0x10000&gt;;</div><div class='add'>+	atmel,adc-num-channels = &lt;8&gt;;</div><div class='add'>+	atmel,adc-startup-time = &lt;40&gt;;</div><div class='add'>+	atmel,adc-status-register = &lt;0x1c&gt;;</div><div class='add'>+	atmel,adc-trigger-register = &lt;0x08&gt;;</div><div class='add'>+	atmel,adc-use-external;</div><div class='add'>+	atmel,adc-vref = &lt;3300&gt;;</div><div class='add'>+</div><div class='add'>+	trigger@0 {</div><div class='add'>+		trigger-name = "external-rising";</div><div class='add'>+		trigger-value = &lt;0x1&gt;;</div><div class='add'>+		trigger-external;</div><div class='add'>+	};</div><div class='add'>+	trigger@1 {</div><div class='add'>+		trigger-name = "external-falling";</div><div class='add'>+		trigger-value = &lt;0x2&gt;;</div><div class='add'>+		trigger-external;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	trigger@2 {</div><div class='add'>+		trigger-name = "external-any";</div><div class='add'>+		trigger-value = &lt;0x3&gt;;</div><div class='add'>+		trigger-external;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	trigger@3 {</div><div class='add'>+		trigger-name = "continuous";</div><div class='add'>+		trigger-value = &lt;0x6&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt<br/>index bfbc771a65f8..ac9e7516756e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/fsl.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/arm/fsl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/fsl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/fsl.txt</a></div><div class='hunk'>@@ -1,6 +1,14 @@</div><div class='ctx'> Freescale i.MX Platforms Device Tree Bindings</div><div class='ctx'> -----------------------------------------------</div><div class='ctx'> </div><div class='add'>+i.MX23 Evaluation Kit</div><div class='add'>+Required root node properties:</div><div class='add'>+    - compatible = "fsl,imx23-evk", "fsl,imx23";</div><div class='add'>+</div><div class='add'>+i.MX28 Evaluation Kit</div><div class='add'>+Required root node properties:</div><div class='add'>+    - compatible = "fsl,imx28-evk", "fsl,imx28";</div><div class='add'>+</div><div class='ctx'> i.MX51 Babbage Board</div><div class='ctx'> Required root node properties:</div><div class='ctx'>     - compatible = "fsl,imx51-babbage", "fsl,imx51";</div><div class='hunk'>@@ -29,6 +37,10 @@ i.MX6 Quad SABRE Lite Board</div><div class='ctx'> Required root node properties:</div><div class='ctx'>     - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";</div><div class='ctx'> </div><div class='add'>+i.MX6 Quad SABRE Smart Device Board</div><div class='add'>+Required root node properties:</div><div class='add'>+    - compatible = "fsl,imx6q-sabresd", "fsl,imx6q";</div><div class='add'>+</div><div class='ctx'> Generic i.MX boards</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt<br/>index 9b4b82a721b6..62eb8df1e08d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/gic.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/arm/gic.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/gic.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/gic.txt</a></div><div class='hunk'>@@ -11,7 +11,9 @@ have PPIs or SGIs.</div><div class='ctx'> Main node required properties:</div><div class='ctx'> </div><div class='ctx'> - compatible : should be one of:</div><div class='add'>+	"arm,cortex-a15-gic"</div><div class='ctx'> 	"arm,cortex-a9-gic"</div><div class='add'>+	"arm,cortex-a7-gic"</div><div class='ctx'> 	"arm,arm11mp-gic"</div><div class='ctx'> - interrupt-controller : Identifies the node as an interrupt controller</div><div class='ctx'> - #interrupt-cells : Specifies the number of cells needed to encode an</div><div class='hunk'>@@ -39,8 +41,9 @@ Main node required properties:</div><div class='ctx'>   the GIC cpu interface register base and size.</div><div class='ctx'> </div><div class='ctx'> Optional</div><div class='del'>-- interrupts	: Interrupt source of the parent interrupt controller. Only</div><div class='del'>-  present on secondary GICs.</div><div class='add'>+- interrupts	: Interrupt source of the parent interrupt controller on</div><div class='add'>+  secondary GICs, or VGIC maintainance interrupt on primary GIC (see</div><div class='add'>+  below).</div><div class='ctx'> </div><div class='ctx'> - cpu-offset	: per-cpu offset within the distributor and cpu interface</div><div class='ctx'>   regions, used when the GIC doesn't have banked registers. The offset is</div><div class='hunk'>@@ -57,3 +60,31 @@ Example:</div><div class='ctx'> 		      &lt;0xfff10100 0x100&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+* GIC virtualization extensions (VGIC)</div><div class='add'>+</div><div class='add'>+For ARM cores that support the virtualization extensions, additional</div><div class='add'>+properties must be described (they only exist if the GIC is the</div><div class='add'>+primary interrupt controller).</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+- reg : Additional regions specifying the base physical address and</div><div class='add'>+  size of the VGIC registers. The first additional region is the GIC</div><div class='add'>+  virtual interface control register base and size. The 2nd additional</div><div class='add'>+  region is the GIC virtual cpu interface register base and size.</div><div class='add'>+</div><div class='add'>+- interrupts : VGIC maintainance interrupt.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	interrupt-controller@2c001000 {</div><div class='add'>+		compatible = "arm,cortex-a15-gic";</div><div class='add'>+		#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		reg = &lt;0x2c001000 0x1000&gt;,</div><div class='add'>+		      &lt;0x2c002000 0x1000&gt;,</div><div class='add'>+		      &lt;0x2c004000 0x2000&gt;,</div><div class='add'>+		      &lt;0x2c006000 0x2000&gt;;</div><div class='add'>+		interrupts = &lt;1 9 0xf04&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/lpc32xx-mic.txt b/Documentation/devicetree/bindings/arm/lpc32xx-mic.txt<br/>new file mode 100644<br/>index 000000000000..539adca19e8f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/lpc32xx-mic.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/lpc32xx-mic.txt</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+* NXP LPC32xx Main Interrupt Controller</div><div class='add'>+  (MIC, including SIC1 and SIC2 secondary controllers)</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be "nxp,lpc3220-mic"</div><div class='add'>+- interrupt-controller: Identifies the node as an interrupt controller.</div><div class='add'>+- interrupt-parent: Empty for the interrupt controller itself</div><div class='add'>+- #interrupt-cells: The number of cells to define the interrupts. Should be 2.</div><div class='add'>+  The first cell is the IRQ number</div><div class='add'>+  The second cell is used to specify mode:</div><div class='add'>+      1 = low-to-high edge triggered</div><div class='add'>+      2 = high-to-low edge triggered</div><div class='add'>+      4 = active high level-sensitive</div><div class='add'>+      8 = active low level-sensitive</div><div class='add'>+      Default for internal sources should be set to 4 (active high).</div><div class='add'>+- reg: Should contain MIC registers location and length</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+	/*</div><div class='add'>+	 * MIC</div><div class='add'>+	 */</div><div class='add'>+	mic: interrupt-controller@40008000 {</div><div class='add'>+		compatible = "nxp,lpc3220-mic";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		interrupt-parent;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		reg = &lt;0x40008000 0xC000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * ADC</div><div class='add'>+	 */</div><div class='add'>+	adc@40048000 {</div><div class='add'>+		compatible = "nxp,lpc3220-adc";</div><div class='add'>+		reg = &lt;0x40048000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mic&gt;;</div><div class='add'>+		interrupts = &lt;39 4&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/lpc32xx.txt b/Documentation/devicetree/bindings/arm/lpc32xx.txt<br/>new file mode 100644<br/>index 000000000000..56ec8ddc4a3b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/lpc32xx.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/lpc32xx.txt</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+NXP LPC32xx Platforms Device Tree Bindings</div><div class='add'>+------------------------------------------</div><div class='add'>+</div><div class='add'>+Boards with the NXP LPC32xx SoC shall have the following properties:</div><div class='add'>+</div><div class='add'>+Required root node property:</div><div class='add'>+</div><div class='add'>+compatible: must be "nxp,lpc3220", "nxp,lpc3230", "nxp,lpc3240" or "nxp,lpc3250"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mrvl/intc.txt b/Documentation/devicetree/bindings/arm/mrvl/intc.txt<br/>new file mode 100644<br/>index 000000000000..80b9a94d9a23<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/mrvl/intc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/mrvl/intc.txt</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+* Marvell MMP Interrupt controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or</div><div class='add'>+  "mrvl,mmp2-mux-intc"</div><div class='add'>+- reg : Address and length of the register set of the interrupt controller.</div><div class='add'>+  If the interrupt controller is intc, address and length means the range</div><div class='add'>+  of the whold interrupt controller. If the interrupt controller is mux-intc,</div><div class='add'>+  address and length means one register. Since address of mux-intc is in the</div><div class='add'>+  range of intc. mux-intc is secondary interrupt controller.</div><div class='add'>+- reg-names : Name of the register set of the interrupt controller. It's</div><div class='add'>+  only required in mux-intc interrupt controller.</div><div class='add'>+- interrupts : Should be the port interrupt shared by mux interrupts. It's</div><div class='add'>+  only required in mux-intc interrupt controller.</div><div class='add'>+- interrupt-controller : Identifies the node as an interrupt controller.</div><div class='add'>+- #interrupt-cells : Specifies the number of cells needed to encode an</div><div class='add'>+  interrupt source.</div><div class='add'>+- mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt</div><div class='add'>+  controller.</div><div class='add'>+- mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge</div><div class='add'>+  detection first.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	intc: interrupt-controller@d4282000 {</div><div class='add'>+		compatible = "mrvl,mmp2-intc";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0xd4282000 0x1000&gt;;</div><div class='add'>+		mrvl,intc-nr-irqs = &lt;64&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	intcmux4@d4282150 {</div><div class='add'>+		compatible = "mrvl,mmp2-mux-intc";</div><div class='add'>+		interrupts = &lt;4&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x150 0x4&gt;, &lt;0x168 0x4&gt;;</div><div class='add'>+		reg-names = "mux status", "mux mask";</div><div class='add'>+		mrvl,intc-nr-irqs = &lt;2&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mrvl.txt b/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt<br/>index d8de933e9d81..117d741a2e4f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/mrvl.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/arm/mrvl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/mrvl/mrvl.txt</a></div><div class='hunk'>@@ -4,3 +4,11 @@ Marvell Platforms Device Tree Bindings</div><div class='ctx'> PXA168 Aspenite Board</div><div class='ctx'> Required root node properties:</div><div class='ctx'> 	- compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";</div><div class='add'>+</div><div class='add'>+PXA910 DKB Board</div><div class='add'>+Required root node properties:</div><div class='add'>+	- compatible = "mrvl,pxa910-dkb";</div><div class='add'>+</div><div class='add'>+MMP2 Brownstone Board</div><div class='add'>+Required root node properties:</div><div class='add'>+	- compatible = "mrvl,mmp2-brownstone";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mrvl/timer.txt b/Documentation/devicetree/bindings/arm/mrvl/timer.txt<br/>new file mode 100644<br/>index 000000000000..9a6e251462e7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/mrvl/timer.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/mrvl/timer.txt</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+* Marvell MMP Timer controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Should be "mrvl,mmp-timer".</div><div class='add'>+- reg : Address and length of the register set of timer controller.</div><div class='add'>+- interrupts : Should be the interrupt number.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	timer0: timer@d4014000 {</div><div class='add'>+		compatible = "mrvl,mmp-timer";</div><div class='add'>+		reg = &lt;0xd4014000 0x100&gt;;</div><div class='add'>+		interrupts = &lt;13&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt b/Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt<br/>new file mode 100644<br/>index 000000000000..f2f2171e530e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+* Samsung Exynos Interrupt Combiner Controller</div><div class='add'>+</div><div class='add'>+Samsung's Exynos4 architecture includes a interrupt combiner controller which</div><div class='add'>+can combine interrupt sources as a group and provide a single interrupt request</div><div class='add'>+for the group. The interrupt request from each group are connected to a parent</div><div class='add'>+interrupt controller, such as GIC in case of Exynos4210.</div><div class='add'>+</div><div class='add'>+The interrupt combiner controller consists of multiple combiners. Upto eight</div><div class='add'>+interrupt sources can be connected to a combiner. The combiner outputs one</div><div class='add'>+combined interrupt for its eight interrupt sources. The combined interrupt</div><div class='add'>+is usually connected to a parent interrupt controller.</div><div class='add'>+</div><div class='add'>+A single node in the device tree is used to describe the interrupt combiner</div><div class='add'>+controller module (which includes multiple combiners). A combiner in the</div><div class='add'>+interrupt controller module shares config/control registers with other</div><div class='add'>+combiners. For example, a 32-bit interrupt enable/disable config register</div><div class='add'>+can accommodate upto 4 interrupt combiners (with each combiner supporting</div><div class='add'>+upto 8 interrupt sources).</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: should be "samsung,exynos4210-combiner".</div><div class='add'>+- interrupt-controller: Identifies the node as an interrupt controller.</div><div class='add'>+- #interrupt-cells: should be &lt;2&gt;. The meaning of the cells are</div><div class='add'>+	* First Cell: Combiner Group Number.</div><div class='add'>+	* Second Cell: Interrupt number within the group.</div><div class='add'>+- reg: Base address and size of interrupt combiner registers.</div><div class='add'>+- interrupts: The list of interrupts generated by the combiners which are then</div><div class='add'>+    connected to a parent interrupt controller. The format of the interrupt</div><div class='add'>+    specifier depends in the interrupt parent controller.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- samsung,combiner-nr: The number of interrupt combiners supported. If this</div><div class='add'>+  property is not specified, the default number of combiners is assumed</div><div class='add'>+  to be 16.</div><div class='add'>+- interrupt-parent: pHandle of the parent interrupt controller, if not</div><div class='add'>+  inherited from the parent node.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	The following is a an example from the Exynos4210 SoC dtsi file.</div><div class='add'>+</div><div class='add'>+	combiner:interrupt-controller@10440000 {</div><div class='add'>+		compatible = "samsung,exynos4210-combiner";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		reg = &lt;0x10440000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0 0 0&gt;, &lt;0 1 0&gt;, &lt;0 2 0&gt;, &lt;0 3 0&gt;,</div><div class='add'>+			     &lt;0 4 0&gt;, &lt;0 5 0&gt;, &lt;0 6 0&gt;, &lt;0 7 0&gt;,</div><div class='add'>+			     &lt;0 8 0&gt;, &lt;0 9 0&gt;, &lt;0 10 0&gt;, &lt;0 11 0&gt;,</div><div class='add'>+			     &lt;0 12 0&gt;, &lt;0 13 0&gt;, &lt;0 14 0&gt;, &lt;0 15 0&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/spear-timer.txt b/Documentation/devicetree/bindings/arm/spear-timer.txt<br/>new file mode 100644<br/>index 000000000000..c0017221cf55<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/spear-timer.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/spear-timer.txt</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+* SPEAr ARM Timer</div><div class='add'>+</div><div class='add'>+** Timer node required properties:</div><div class='add'>+</div><div class='add'>+- compatible : Should be:</div><div class='add'>+	"st,spear-timer"</div><div class='add'>+- reg: Address range of the timer registers</div><div class='add'>+- interrupt-parent: Should be the phandle for the interrupt controller</div><div class='add'>+  that services interrupts for this device</div><div class='add'>+- interrupt: Should contain the timer interrupt number</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	timer@f0000000 {</div><div class='add'>+		compatible = "st,spear-timer";</div><div class='add'>+		reg = &lt;0xf0000000 0x400&gt;;</div><div class='add'>+		interrupts = &lt;2&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/spear.txt b/Documentation/devicetree/bindings/arm/spear.txt<br/>index f8e54f092328..0d42949df6c2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/spear.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/arm/spear.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/spear.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/spear.txt</a></div><div class='hunk'>@@ -2,7 +2,25 @@ ST SPEAr Platforms Device Tree Bindings</div><div class='ctx'> ---------------------------------------</div><div class='ctx'> </div><div class='ctx'> Boards with the ST SPEAr600 SoC shall have the following properties:</div><div class='add'>+Required root node property:</div><div class='add'>+compatible = "st,spear600";</div><div class='ctx'> </div><div class='add'>+Boards with the ST SPEAr300 SoC shall have the following properties:</div><div class='ctx'> Required root node property:</div><div class='add'>+compatible = "st,spear300";</div><div class='ctx'> </div><div class='del'>-compatible = "st,spear600";</div><div class='add'>+Boards with the ST SPEAr310 SoC shall have the following properties:</div><div class='add'>+Required root node property:</div><div class='add'>+compatible = "st,spear310";</div><div class='add'>+</div><div class='add'>+Boards with the ST SPEAr320 SoC shall have the following properties:</div><div class='add'>+Required root node property:</div><div class='add'>+compatible = "st,spear320";</div><div class='add'>+</div><div class='add'>+Boards with the ST SPEAr1310 SoC shall have the following properties:</div><div class='add'>+Required root node property:</div><div class='add'>+compatible = "st,spear1310";</div><div class='add'>+</div><div class='add'>+Boards with the ST SPEAr1340 SoC shall have the following properties:</div><div class='add'>+Required root node property:</div><div class='add'>+compatible = "st,spear1340";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt<br/>new file mode 100644<br/>index 000000000000..234406d41c12<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+NVIDIA Tegra AHB</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "nvidia,tegra20-ahb" or "nvidia,tegra30-ahb"</div><div class='add'>+- reg : Should contain 1 register ranges(address and length)</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	ahb: ahb@6000c004 {</div><div class='add'>+		compatible = "nvidia,tegra20-ahb";</div><div class='add'>+		reg = &lt;0x6000c004 0x10c&gt;; /* AHB Arbitration + Gizmo Controller */</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt<br/>new file mode 100644<br/>index 000000000000..c25a0a55151d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+NVIDIA Tegra20 MC(Memory Controller)</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "nvidia,tegra20-mc"</div><div class='add'>+- reg : Should contain 2 register ranges(address and length); see the</div><div class='add'>+  example below. Note that the MC registers are interleaved with the</div><div class='add'>+  GART registers, and hence must be represented as multiple ranges.</div><div class='add'>+- interrupts : Should contain MC General interrupt.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	mc {</div><div class='add'>+		compatible = "nvidia,tegra20-mc";</div><div class='add'>+		reg = &lt;0x7000f000 0x024</div><div class='add'>+		       0x7000f03c 0x3c4&gt;;</div><div class='add'>+		interrupts = &lt;0 77 0x04&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt<br/>new file mode 100644<br/>index 000000000000..e47e73f612f4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+NVIDIA Tegra30 MC(Memory Controller)</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "nvidia,tegra30-mc"</div><div class='add'>+- reg : Should contain 4 register ranges(address and length); see the</div><div class='add'>+  example below. Note that the MC registers are interleaved with the</div><div class='add'>+  SMMU registers, and hence must be represented as multiple ranges.</div><div class='add'>+- interrupts : Should contain MC General interrupt.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+	mc {</div><div class='add'>+		compatible = "nvidia,tegra30-mc";</div><div class='add'>+		reg = &lt;0x7000f000 0x010</div><div class='add'>+		       0x7000f03c 0x1b4</div><div class='add'>+		       0x7000f200 0x028</div><div class='add'>+		       0x7000f284 0x17c&gt;;</div><div class='add'>+		interrupts = &lt;0 77 0x04&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/calxeda-sata.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt<br/>index 79caa5651f53..8bb8a76d42e8 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/ata/calxeda-sata.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/ata/calxeda-sata.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/ata/ahci-platform.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/ata/ahci-platform.txt</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='del'>-* Calxeda SATA Controller</div><div class='add'>+* AHCI SATA Controller</div><div class='ctx'> </div><div class='ctx'> SATA nodes are defined to describe on-chip Serial ATA controllers.</div><div class='ctx'> Each SATA controller should have its own node.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible        : compatible list, contains "calxeda,hb-ahci"</div><div class='add'>+- compatible        : compatible list, contains "calxeda,hb-ahci" or "snps,spear-ahci"</div><div class='ctx'> - interrupts        : &lt;interrupt mapping for SATA IRQ&gt;</div><div class='ctx'> - reg               : &lt;registers mapping&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -14,4 +14,3 @@ Example:</div><div class='ctx'>                 reg = &lt;0xffe08000 0x1000&gt;;</div><div class='ctx'>                 interrupts = &lt;115&gt;;</div><div class='ctx'>         };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt b/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt<br/>new file mode 100644<br/>index 000000000000..ded0398d3bdc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+* Freescale MXS DMA</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Should be "fsl,&lt;chip&gt;-dma-apbh" or "fsl,&lt;chip&gt;-dma-apbx"</div><div class='add'>+- reg : Should contain registers location and length</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+imx23, imx28.</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+dma-apbh@80004000 {</div><div class='add'>+	compatible = "fsl,imx28-dma-apbh";</div><div class='add'>+	reg = &lt;0x80004000 2000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+dma-apbx@80024000 {</div><div class='add'>+	compatible = "fsl,imx28-dma-apbx";</div><div class='add'>+	reg = &lt;0x80024000 2000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt b/Documentation/devicetree/bindings/dma/snps-dma.txt<br/>new file mode 100644<br/>index 000000000000..c0d85dbcada5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/dma/snps-dma.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/dma/snps-dma.txt</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+* Synopsys Designware DMA Controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "snps,dma-spear1340"</div><div class='add'>+- reg: Address range of the DMAC registers</div><div class='add'>+- interrupt-parent: Should be the phandle for the interrupt controller</div><div class='add'>+  that services interrupts for this device</div><div class='add'>+- interrupt: Should contain the DMAC interrupt number</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	dma@fc000000 {</div><div class='add'>+		compatible = "snps,dma-spear1340";</div><div class='add'>+		reg = &lt;0xfc000000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='add'>+		interrupts = &lt;12&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt b/Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt<br/>new file mode 100644<br/>index 000000000000..f93d51478d5a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+Lantiq SoC External Bus memory mapped GPIO controller</div><div class='add'>+</div><div class='add'>+By attaching hardware latches to the EBU it is possible to create output</div><div class='add'>+only gpios. This driver configures a special memory address, which when</div><div class='add'>+written to outputs 16 bit to the latches.</div><div class='add'>+</div><div class='add'>+The node describing the memory mapped GPIOs needs to be a child of the node</div><div class='add'>+describing the "lantiq,localbus".</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Should be "lantiq,gpio-mm-lantiq"</div><div class='add'>+- reg : Address and length of the register set for the device</div><div class='add'>+- #gpio-cells : Should be two.  The first cell is the pin number and</div><div class='add'>+  the second cell is used to specify optional parameters (currently</div><div class='add'>+  unused).</div><div class='add'>+- gpio-controller : Marks the device node as a gpio controller.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- lantiq,shadow : The default value that we shall assume as already set on the</div><div class='add'>+  shift register cascade.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+localbus@0 {</div><div class='add'>+	#address-cells = &lt;2&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	ranges = &lt;0 0 0x0 0x3ffffff /* addrsel0 */</div><div class='add'>+		1 0 0x4000000 0x4000010&gt;; /* addsel1 */</div><div class='add'>+	compatible = "lantiq,localbus", "simple-bus";</div><div class='add'>+</div><div class='add'>+	gpio_mm0: gpio@4000000 {</div><div class='add'>+		compatible = "lantiq,gpio-mm";</div><div class='add'>+		reg = &lt;1 0x0 0x10&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		lantiq,shadow = &lt;0x77f&gt;</div><div class='add'>+	};</div><div class='add'>+}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-mxs.txt b/Documentation/devicetree/bindings/gpio/gpio-mxs.txt<br/>new file mode 100644<br/>index 000000000000..0c35673f7a3e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/gpio-mxs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/gpio/gpio-mxs.txt</a></div><div class='hunk'>@@ -0,0 +1,87 @@</div><div class='add'>+* Freescale MXS GPIO controller</div><div class='add'>+</div><div class='add'>+The Freescale MXS GPIO controller is part of MXS PIN controller.  The</div><div class='add'>+GPIOs are organized in port/bank.  Each port consists of 32 GPIOs.</div><div class='add'>+</div><div class='add'>+As the GPIO controller is embedded in the PIN controller and all the</div><div class='add'>+GPIO ports share the same IO space with PIN controller, the GPIO node</div><div class='add'>+will be represented as sub-nodes of MXS pinctrl node.</div><div class='add'>+</div><div class='add'>+Required properties for GPIO node:</div><div class='add'>+- compatible : Should be "fsl,&lt;soc&gt;-gpio".  The supported SoCs include</div><div class='add'>+  imx23 and imx28.</div><div class='add'>+- interrupts : Should be the port interrupt shared by all 32 pins.</div><div class='add'>+- gpio-controller : Marks the device node as a gpio controller.</div><div class='add'>+- #gpio-cells : Should be two.  The first cell is the pin number and</div><div class='add'>+  the second cell is used to specify optional parameters (currently</div><div class='add'>+  unused).</div><div class='add'>+- interrupt-controller: Marks the device node as an interrupt controller.</div><div class='add'>+- #interrupt-cells : Should be 2.  The first cell is the GPIO number.</div><div class='add'>+  The second cell bits[3:0] is used to specify trigger type and level flags:</div><div class='add'>+      1 = low-to-high edge triggered.</div><div class='add'>+      2 = high-to-low edge triggered.</div><div class='add'>+      4 = active high level-sensitive.</div><div class='add'>+      8 = active low level-sensitive.</div><div class='add'>+</div><div class='add'>+Note: Each GPIO port should have an alias correctly numbered in "aliases"</div><div class='add'>+node.</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+aliases {</div><div class='add'>+	gpio0 = &amp;gpio0;</div><div class='add'>+	gpio1 = &amp;gpio1;</div><div class='add'>+	gpio2 = &amp;gpio2;</div><div class='add'>+	gpio3 = &amp;gpio3;</div><div class='add'>+	gpio4 = &amp;gpio4;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+pinctrl@80018000 {</div><div class='add'>+	compatible = "fsl,imx28-pinctrl", "simple-bus";</div><div class='add'>+	reg = &lt;0x80018000 2000&gt;;</div><div class='add'>+</div><div class='add'>+	gpio0: gpio@0 {</div><div class='add'>+		compatible = "fsl,imx28-gpio";</div><div class='add'>+		interrupts = &lt;127&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio1: gpio@1 {</div><div class='add'>+		compatible = "fsl,imx28-gpio";</div><div class='add'>+		interrupts = &lt;126&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio2: gpio@2 {</div><div class='add'>+		compatible = "fsl,imx28-gpio";</div><div class='add'>+		interrupts = &lt;125&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio3: gpio@3 {</div><div class='add'>+		compatible = "fsl,imx28-gpio";</div><div class='add'>+		interrupts = &lt;124&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio4: gpio@4 {</div><div class='add'>+		compatible = "fsl,imx28-gpio";</div><div class='add'>+		interrupts = &lt;123&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-nmk.txt b/Documentation/devicetree/bindings/gpio/gpio-nmk.txt<br/>new file mode 100644<br/>index 000000000000..ee87467ad8d6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/gpio-nmk.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/gpio/gpio-nmk.txt</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+Nomadik GPIO controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible            : Should be "st,nomadik-gpio".</div><div class='add'>+- reg                   : Physical base address and length of the controller's registers.</div><div class='add'>+- interrupts            : The interrupt outputs from the controller.</div><div class='add'>+- #gpio-cells           : Should be two:</div><div class='add'>+                            The first cell is the pin number.</div><div class='add'>+                            The second cell is used to specify optional parameters:</div><div class='add'>+                              - bits[3:0] trigger type and level flags:</div><div class='add'>+                                  1 = low-to-high edge triggered.</div><div class='add'>+                                  2 = high-to-low edge triggered.</div><div class='add'>+                                  4 = active high level-sensitive.</div><div class='add'>+                                  8 = active low level-sensitive.</div><div class='add'>+- gpio-controller       : Marks the device node as a GPIO controller.</div><div class='add'>+- interrupt-controller  : Marks the device node as an interrupt controller.</div><div class='add'>+- gpio-bank             : Specifies which bank a controller owns.</div><div class='add'>+- st,supports-sleepmode : Specifies whether controller can sleep or not</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+                gpio1: gpio@8012e080 {</div><div class='add'>+                        compatible = "st,nomadik-gpio";</div><div class='add'>+                        reg =  &lt;0x8012e080 0x80&gt;;</div><div class='add'>+                        interrupts = &lt;0 120 0x4&gt;;</div><div class='add'>+                        #gpio-cells = &lt;2&gt;;</div><div class='add'>+                        gpio-controller;</div><div class='add'>+                        interrupt-controller;</div><div class='add'>+                        supports-sleepmode;</div><div class='add'>+                        gpio-bank = &lt;1&gt;;</div><div class='add'>+                };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-stp-xway.txt b/Documentation/devicetree/bindings/gpio/gpio-stp-xway.txt<br/>new file mode 100644<br/>index 000000000000..854de130a971<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/gpio-stp-xway.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/gpio/gpio-stp-xway.txt</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+Lantiq SoC Serial To Parallel (STP) GPIO controller</div><div class='add'>+</div><div class='add'>+The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a</div><div class='add'>+peripheral controller used to drive external shift register cascades. At most</div><div class='add'>+3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem</div><div class='add'>+to drive the 2 LSBs of the cascade automatically.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Should be "lantiq,gpio-stp-xway"</div><div class='add'>+- reg : Address and length of the register set for the device</div><div class='add'>+- #gpio-cells : Should be two.  The first cell is the pin number and</div><div class='add'>+  the second cell is used to specify optional parameters (currently</div><div class='add'>+  unused).</div><div class='add'>+- gpio-controller : Marks the device node as a gpio controller.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- lantiq,shadow : The default value that we shall assume as already set on the</div><div class='add'>+  shift register cascade.</div><div class='add'>+- lantiq,groups : Set the 3 bit mask to select which of the 3 groups are enabled</div><div class='add'>+  in the shift register cascade.</div><div class='add'>+- lantiq,dsl : The dsl core can control the 2 LSBs of the gpio cascade. This 2 bit</div><div class='add'>+  property can enable this feature.</div><div class='add'>+- lantiq,phy1 : The gphy1 core can control 3 bits of the gpio cascade.</div><div class='add'>+- lantiq,phy2 : The gphy2 core can control 3 bits of the gpio cascade.</div><div class='add'>+- lantiq,rising : use rising instead of falling edge for the shift register</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+gpio1: stp@E100BB0 {</div><div class='add'>+	compatible = "lantiq,gpio-stp-xway";</div><div class='add'>+	reg = &lt;0xE100BB0 0x40&gt;;</div><div class='add'>+	#gpio-cells = &lt;2&gt;;</div><div class='add'>+	gpio-controller;</div><div class='add'>+</div><div class='add'>+	lantiq,shadow = &lt;0xffff&gt;;</div><div class='add'>+	lantiq,groups = &lt;0x7&gt;;</div><div class='add'>+	lantiq,dsl = &lt;0x3&gt;;</div><div class='add'>+	lantiq,phy1 = &lt;0x7&gt;;</div><div class='add'>+	lantiq,phy2 = &lt;0x7&gt;;</div><div class='add'>+	/* lantiq,rising; */</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt b/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt<br/>new file mode 100644<br/>index 000000000000..49819367a011<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+NXP LPC32xx SoC GPIO controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: must be "nxp,lpc3220-gpio"</div><div class='add'>+- reg: Physical base address and length of the controller's registers.</div><div class='add'>+- gpio-controller: Marks the device node as a GPIO controller.</div><div class='add'>+- #gpio-cells: Should be 3:</div><div class='add'>+   1) bank:</div><div class='add'>+      0: GPIO P0</div><div class='add'>+      1: GPIO P1</div><div class='add'>+      2: GPIO P2</div><div class='add'>+      3: GPIO P3</div><div class='add'>+      4: GPI P3</div><div class='add'>+      5: GPO P3</div><div class='add'>+   2) pin number</div><div class='add'>+   3) optional parameters:</div><div class='add'>+      - bit 0 specifies polarity (0 for normal, 1 for inverted)</div><div class='add'>+- reg: Index of the GPIO group</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	gpio: gpio@40028000 {</div><div class='add'>+		compatible = "nxp,lpc3220-gpio";</div><div class='add'>+		reg = &lt;0x40028000 0x1000&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;3&gt;; /* bank, pin, flags */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led0 {</div><div class='add'>+			gpios = &lt;&amp;gpio 5 1 1&gt;; /* GPO_P3 1, active low */</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			gpios = &lt;&amp;gpio 5 14 1&gt;; /* GPO_P3 14, active low */</div><div class='add'>+			linux,default-trigger = "timer";</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt<br/>index 1e34cfe5ebea..05428f39d9ac 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/gpio/mrvl-gpio.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/gpio/mrvl-gpio.txt</a></div><div class='hunk'>@@ -3,19 +3,25 @@</div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible : Should be "mrvl,pxa-gpio" or "mrvl,mmp-gpio"</div><div class='ctx'> - reg : Address and length of the register set for the device</div><div class='del'>-- interrupts : Should be the port interrupt shared by all gpio pins, if</div><div class='del'>-- interrupt-name : Should be the name of irq resource.</div><div class='del'>-  one number.</div><div class='add'>+- interrupts : Should be the port interrupt shared by all gpio pins.</div><div class='add'>+  There're three gpio interrupts in arch-pxa, and they're gpio0,</div><div class='add'>+  gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp,</div><div class='add'>+  gpio_mux.</div><div class='add'>+- interrupt-name : Should be the name of irq resource. Each interrupt</div><div class='add'>+  binds its interrupt-name.</div><div class='add'>+- interrupt-controller : Identifies the node as an interrupt controller.</div><div class='add'>+- #interrupt-cells: Specifies the number of cells needed to encode an</div><div class='add'>+  interrupt source.</div><div class='ctx'> - gpio-controller : Marks the device node as a gpio controller.</div><div class='ctx'> - #gpio-cells : Should be one.  It is the pin number.</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> 	gpio: gpio@d4019000 {</div><div class='del'>-		compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";</div><div class='add'>+		compatible = "mrvl,mmp-gpio";</div><div class='ctx'> 		reg = &lt;0xd4019000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;49&gt;, &lt;17&gt;, &lt;18&gt;;</div><div class='del'>-		interrupt-name = "gpio_mux", "gpio0", "gpio1";</div><div class='add'>+		interrupts = &lt;49&gt;;</div><div class='add'>+		interrupt-name = "gpio_mux";</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#gpio-cells = &lt;1&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt b/Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt<br/>new file mode 100644<br/>index 000000000000..ae8af1694e95<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+Pinctrl-based I2C Bus Mux</div><div class='add'>+</div><div class='add'>+This binding describes an I2C bus multiplexer that uses pin multiplexing to</div><div class='add'>+route the I2C signals, and represents the pin multiplexing configuration</div><div class='add'>+using the pinctrl device tree bindings.</div><div class='add'>+</div><div class='add'>+                                 +-----+  +-----+</div><div class='add'>+                                 | dev |  | dev |</div><div class='add'>+    +------------------------+   +-----+  +-----+</div><div class='add'>+    | SoC                    |      |        |</div><div class='add'>+    |                   /----|------+--------+</div><div class='add'>+    |   +---+   +------+     | child bus A, on first set of pins</div><div class='add'>+    |   |I2C|---|Pinmux|     |</div><div class='add'>+    |   +---+   +------+     | child bus B, on second set of pins</div><div class='add'>+    |                   \----|------+--------+--------+</div><div class='add'>+    |                        |      |        |        |</div><div class='add'>+    +------------------------+  +-----+  +-----+  +-----+</div><div class='add'>+                                | dev |  | dev |  | dev |</div><div class='add'>+                                +-----+  +-----+  +-----+</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: i2c-mux-pinctrl</div><div class='add'>+- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side</div><div class='add'>+  port is connected to.</div><div class='add'>+</div><div class='add'>+Also required are:</div><div class='add'>+</div><div class='add'>+* Standard pinctrl properties that specify the pin mux state for each child</div><div class='add'>+  bus. See ../pinctrl/pinctrl-bindings.txt.</div><div class='add'>+</div><div class='add'>+* Standard I2C mux properties. See mux.txt in this directory.</div><div class='add'>+</div><div class='add'>+* I2C child bus nodes. See mux.txt in this directory.</div><div class='add'>+</div><div class='add'>+For each named state defined in the pinctrl-names property, an I2C child bus</div><div class='add'>+will be created. I2C child bus numbers are assigned based on the index into</div><div class='add'>+the pinctrl-names property.</div><div class='add'>+</div><div class='add'>+The only exception is that no bus will be created for a state named "idle". If</div><div class='add'>+such a state is defined, it must be the last entry in pinctrl-names. For</div><div class='add'>+example:</div><div class='add'>+</div><div class='add'>+	pinctrl-names = "ddc", "pta", "idle"  -&gt;  ddc = bus 0, pta = bus 1</div><div class='add'>+	pinctrl-names = "ddc", "idle", "pta"  -&gt;  Invalid ("idle" not last)</div><div class='add'>+	pinctrl-names = "idle", "ddc", "pta"  -&gt;  Invalid ("idle" not last)</div><div class='add'>+</div><div class='add'>+Whenever an access is made to a device on a child bus, the relevant pinctrl</div><div class='add'>+state will be programmed into hardware.</div><div class='add'>+</div><div class='add'>+If an idle state is defined, whenever an access is not being made to a device</div><div class='add'>+on a child bus, the idle pinctrl state will be programmed into hardware.</div><div class='add'>+</div><div class='add'>+If an idle state is not defined, the most recently used pinctrl state will be</div><div class='add'>+left programmed into hardware whenever no access is being made of a device on</div><div class='add'>+a child bus.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	i2cmux {</div><div class='add'>+		compatible = "i2c-mux-pinctrl";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		i2c-parent = &lt;&amp;i2c1&gt;;</div><div class='add'>+</div><div class='add'>+		pinctrl-names = "ddc", "pta", "idle";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_i2cmux_ddc&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;state_i2cmux_pta&gt;;</div><div class='add'>+		pinctrl-2 = &lt;&amp;state_i2cmux_idle&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@0 {</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom {</div><div class='add'>+				compatible = "eeprom";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		i2c@1 {</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			eeprom {</div><div class='add'>+				compatible = "eeprom";</div><div class='add'>+				reg = &lt;0x50&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt<br/>new file mode 100644<br/>index 000000000000..1bfc02de1b0c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/i2c-mxs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/i2c-mxs.txt</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+* Freescale MXS Inter IC (I2C) Controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be "fsl,&lt;chip&gt;-i2c"</div><div class='add'>+- reg: Should contain registers location and length</div><div class='add'>+- interrupts: Should contain ERROR and DMA interrupts</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+i2c0: i2c@80058000 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	compatible = "fsl,imx28-i2c";</div><div class='add'>+	reg = &lt;0x80058000 2000&gt;;</div><div class='add'>+	interrupts = &lt;111 68&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt b/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt<br/>index 071eb3caae91..b891ee218354 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/i2c/mrvl-i2c.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/mrvl-i2c.txt</a></div><div class='hunk'>@@ -3,34 +3,31 @@</div><div class='ctx'> Required properties :</div><div class='ctx'> </div><div class='ctx'>  - reg : Offset and length of the register set for the device</div><div class='del'>- - compatible : should be "mrvl,mmp-twsi" where CHIP is the name of a</div><div class='add'>+ - compatible : should be "mrvl,mmp-twsi" where mmp is the name of a</div><div class='ctx'>    compatible processor, e.g. pxa168, pxa910, mmp2, mmp3.</div><div class='ctx'>    For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required</div><div class='ctx'>    as shown in the example below.</div><div class='ctx'> </div><div class='ctx'> Recommended properties :</div><div class='ctx'> </div><div class='del'>- - interrupts : &lt;a b&gt; where a is the interrupt number and b is a</div><div class='del'>-   field that represents an encoding of the sense and level</div><div class='del'>-   information for the interrupt.  This should be encoded based on</div><div class='del'>-   the information in section 2) depending on the type of interrupt</div><div class='del'>-   controller you have.</div><div class='add'>+ - interrupts : the interrupt number</div><div class='ctx'>  - interrupt-parent : the phandle for the interrupt controller that</div><div class='del'>-   services interrupts for this device.</div><div class='add'>+   services interrupts for this device. If the parent is the default</div><div class='add'>+   interrupt controller in device tree, it could be ignored.</div><div class='ctx'>  - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling</div><div class='ctx'>    status register of i2c controller instead.</div><div class='ctx'>  - mrvl,i2c-fast-mode : Enable fast mode of i2c controller.</div><div class='ctx'> </div><div class='ctx'> Examples:</div><div class='ctx'> 	twsi1: i2c@d4011000 {</div><div class='del'>-		compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";</div><div class='add'>+		compatible = "mrvl,mmp-twsi";</div><div class='ctx'> 		reg = &lt;0xd4011000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;7&gt;;</div><div class='ctx'> 		mrvl,i2c-fast-mode;</div><div class='ctx'> 	};</div><div class='ctx'> 	</div><div class='ctx'> 	twsi2: i2c@d4025000 {</div><div class='del'>-		compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";</div><div class='add'>+		compatible = "mrvl,mmp-twsi";</div><div class='ctx'> 		reg = &lt;0xd4025000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;58&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/mux.txt b/Documentation/devicetree/bindings/i2c/mux.txt<br/>new file mode 100644<br/>index 000000000000..af84cce5cd7b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/mux.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/mux.txt</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+Common i2c bus multiplexer/switch properties.</div><div class='add'>+</div><div class='add'>+An i2c bus multiplexer/switch will have several child busses that are</div><div class='add'>+numbered uniquely in a device dependent manner.  The nodes for an i2c bus</div><div class='add'>+multiplexer/switch will have one child node for each child</div><div class='add'>+bus.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- #address-cells = &lt;1&gt;;</div><div class='add'>+- #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+Required properties for child nodes:</div><div class='add'>+- #address-cells = &lt;1&gt;;</div><div class='add'>+- #size-cells = &lt;0&gt;;</div><div class='add'>+- reg : The sub-bus number.</div><div class='add'>+</div><div class='add'>+Optional properties for child nodes:</div><div class='add'>+- Other properties specific to the multiplexer/switch hardware.</div><div class='add'>+- Child nodes conforming to i2c bus binding</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example :</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	   An NXP pca9548 8 channel I2C multiplexer at address 0x70</div><div class='add'>+	   with two NXP pca8574 GPIO expanders attached, one each to</div><div class='add'>+	   ports 3 and 4.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	mux@70 {</div><div class='add'>+		compatible = "nxp,pca9548";</div><div class='add'>+		reg = &lt;0x70&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		i2c@3 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+			gpio1: gpio@38 {</div><div class='add'>+				compatible = "nxp,pca8574";</div><div class='add'>+				reg = &lt;0x38&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		i2c@4 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+			gpio2: gpio@38 {</div><div class='add'>+				compatible = "nxp,pca8574";</div><div class='add'>+				reg = &lt;0x38&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/pnx.txt b/Documentation/devicetree/bindings/i2c/pnx.txt<br/>new file mode 100644<br/>index 000000000000..fe98ada33ee4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/pnx.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/pnx.txt</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+* NXP PNX I2C Controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+</div><div class='add'>+ - reg: Offset and length of the register set for the device</div><div class='add'>+ - compatible: should be "nxp,pnx-i2c"</div><div class='add'>+ - interrupts: configure one interrupt line</div><div class='add'>+ - #address-cells: always 1 (for i2c addresses)</div><div class='add'>+ - #size-cells: always 0</div><div class='add'>+ - interrupt-parent: the phandle for the interrupt controller that</div><div class='add'>+   services interrupts for this device.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+</div><div class='add'>+ - clock-frequency: desired I2C bus clock frequency in Hz, Default: 100000 Hz</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+	i2c1: i2c@400a0000 {</div><div class='add'>+		compatible = "nxp,pnx-i2c";</div><div class='add'>+		reg = &lt;0x400a0000 0x100&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mic&gt;;</div><div class='add'>+		interrupts = &lt;51 0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c2: i2c@400a8000 {</div><div class='add'>+		compatible = "nxp,pnx-i2c";</div><div class='add'>+		reg = &lt;0x400a8000 0x100&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mic&gt;;</div><div class='add'>+		interrupts = &lt;50 0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		clock-frequency = &lt;100000&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/samsung-i2c.txt b/Documentation/devicetree/bindings/i2c/samsung-i2c.txt<br/>index 38832c712919..b6cb5a12c672 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/samsung-i2c.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/i2c/samsung-i2c.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/samsung-i2c.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/samsung-i2c.txt</a></div><div class='hunk'>@@ -6,14 +6,18 @@ Required properties:</div><div class='ctx'>   - compatible: value should be either of the following.</div><div class='ctx'>       (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c.</div><div class='ctx'>       (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c.</div><div class='add'>+      (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used</div><div class='add'>+          inside HDMIPHY block found on several samsung SoCs</div><div class='ctx'>   - reg: physical base address of the controller and length of memory mapped</div><div class='ctx'>     region.</div><div class='ctx'>   - interrupts: interrupt number to the cpu.</div><div class='ctx'>   - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges.</div><div class='del'>-  - gpios: The order of the gpios should be the following: &lt;SDA, SCL&gt;.</div><div class='del'>-    The gpio specifier depends on the gpio controller.</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='add'>+  - gpios: The order of the gpios should be the following: &lt;SDA, SCL&gt;.</div><div class='add'>+    The gpio specifier depends on the gpio controller. Required in all</div><div class='add'>+    cases except for "samsung,s3c2440-hdmiphy-i2c" whose input/output</div><div class='add'>+    lines are permanently wired to the respective client</div><div class='ctx'>   - samsung,i2c-slave-addr: Slave address in multi-master enviroment. If not</div><div class='ctx'>     specified, default value is 0.</div><div class='ctx'>   - samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/xiic.txt b/Documentation/devicetree/bindings/i2c/xiic.txt<br/>new file mode 100644<br/>index 000000000000..ceabbe91ae44<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/i2c/xiic.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/i2c/xiic.txt</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+Xilinx IIC controller:</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Must be "xlnx,xps-iic-2.00.a"</div><div class='add'>+- reg : IIC register location and length</div><div class='add'>+- interrupts : IIC controller unterrupt</div><div class='add'>+- #address-cells = &lt;1&gt;</div><div class='add'>+- #size-cells = &lt;0&gt;</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- Child nodes conforming to i2c bus binding</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	axi_iic_0: i2c@40800000 {</div><div class='add'>+		compatible = "xlnx,xps-iic-2.00.a";</div><div class='add'>+		interrupts = &lt; 1 2 &gt;;</div><div class='add'>+		reg = &lt; 0x40800000 0x10000 &gt;;</div><div class='add'>+</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/spear-keyboard.txt b/Documentation/devicetree/bindings/input/spear-keyboard.txt<br/>new file mode 100644<br/>index 000000000000..4a846d26da23<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/input/spear-keyboard.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/input/spear-keyboard.txt</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+* SPEAr keyboard controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "st,spear300-kbd"</div><div class='add'>+</div><div class='add'>+Optional properties, in addition to those specified by the shared</div><div class='add'>+matrix-keyboard bindings:</div><div class='add'>+- autorepeat: bool: enables key autorepeat</div><div class='add'>+- st,mode: keyboard mode: 0 - 9x9, 1 - 6x6, 2 - 2x2</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+kbd@fc400000 {</div><div class='add'>+	compatible = "st,spear300-kbd";</div><div class='add'>+	reg = &lt;0xfc400000 0x100&gt;;</div><div class='add'>+	linux,keymap = &lt; 0x00030012</div><div class='add'>+			 0x0102003a &gt;;</div><div class='add'>+	autorepeat;</div><div class='add'>+	st,mode = &lt;0&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/lpc32xx-tsc.txt b/Documentation/devicetree/bindings/input/touchscreen/lpc32xx-tsc.txt<br/>new file mode 100644<br/>index 000000000000..41cbf4b7a670<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/input/touchscreen/lpc32xx-tsc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/input/touchscreen/lpc32xx-tsc.txt</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+* NXP LPC32xx SoC Touchscreen Controller (TSC)</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: must be "nxp,lpc3220-tsc"</div><div class='add'>+- reg: physical base address of the controller and length of memory mapped</div><div class='add'>+  region.</div><div class='add'>+- interrupts: The TSC/ADC interrupt</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	tsc@40048000 {</div><div class='add'>+		compatible = "nxp,lpc3220-tsc";</div><div class='add'>+		reg = &lt;0x40048000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mic&gt;;</div><div class='add'>+		interrupts = &lt;39 0&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/twl6040-vibra.txt b/Documentation/devicetree/bindings/input/twl6040-vibra.txt<br/>new file mode 100644<br/>index 000000000000..5b1918b818fb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/input/twl6040-vibra.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/input/twl6040-vibra.txt</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+Vibra driver for the twl6040 family</div><div class='add'>+</div><div class='add'>+The vibra driver is a child of the twl6040 MFD dirver.</div><div class='add'>+Documentation/devicetree/bindings/mfd/twl6040.txt</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Must be "ti,twl6040-vibra";</div><div class='add'>+- interrupts: 4, Vibra overcurrent interrupt</div><div class='add'>+- vddvibl-supply: Regulator supplying the left vibra motor</div><div class='add'>+- vddvibr-supply: Regulator supplying the right vibra motor</div><div class='add'>+- vibldrv_res: Board specific left driver resistance</div><div class='add'>+- vibrdrv_res: Board specific right driver resistance</div><div class='add'>+- viblmotor_res: Board specific left motor resistance</div><div class='add'>+- vibrmotor_res: Board specific right motor resistance</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- vddvibl_uV: If the vddvibl default voltage need to be changed</div><div class='add'>+- vddvibr_uV: If the vddvibr default voltage need to be changed</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+/*</div><div class='add'>+ * 8-channel high quality low-power audio codec</div><div class='add'>+ * http://www.ti.com/lit/ds/symlink/twl6040.pdf</div><div class='add'>+ */</div><div class='add'>+twl6040: twl6040@4b {</div><div class='add'>+	...</div><div class='add'>+	twl6040_vibra: twl6040@1 {</div><div class='add'>+		compatible = "ti,twl6040-vibra";</div><div class='add'>+		interrupts = &lt;4&gt;;</div><div class='add'>+		vddvibl-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+		vddvibr-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+		vibldrv_res = &lt;8&gt;;</div><div class='add'>+		vibrdrv_res = &lt;3&gt;;</div><div class='add'>+		viblmotor_res = &lt;10&gt;;</div><div class='add'>+		vibrmotor_res = &lt;10&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt b/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt<br/>new file mode 100644<br/>index 000000000000..099d9362ebc1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+NVIDIA Tegra 20 GART</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "nvidia,tegra20-gart"</div><div class='add'>+- reg: Two pairs of cells specifying the physical address and size of</div><div class='add'>+  the memory controller registers and the GART aperture respectively.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	gart {</div><div class='add'>+		compatible = "nvidia,tegra20-gart";</div><div class='add'>+		reg = &lt;0x7000f024 0x00000018	/* controller registers */</div><div class='add'>+		       0x58000000 0x02000000&gt;;	/* GART aperture */</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/da9052-i2c.txt b/Documentation/devicetree/bindings/mfd/da9052-i2c.txt<br/>new file mode 100644<br/>index 000000000000..1857f4a6b9a9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/da9052-i2c.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mfd/da9052-i2c.txt</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+* Dialog DA9052/53 Power Management Integrated Circuit (PMIC)</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Should be "dlg,da9052", "dlg,da9053-aa",</div><div class='add'>+			 "dlg,da9053-ab", or "dlg,da9053-bb"</div><div class='add'>+</div><div class='add'>+Sub-nodes:</div><div class='add'>+- regulators : Contain the regulator nodes. The DA9052/53 regulators are</div><div class='add'>+  bound using their names as listed below:</div><div class='add'>+</div><div class='add'>+    buck0     : regulator BUCK0</div><div class='add'>+    buck1     : regulator BUCK1</div><div class='add'>+    buck2     : regulator BUCK2</div><div class='add'>+    buck3     : regulator BUCK3</div><div class='add'>+    ldo4      : regulator LDO4</div><div class='add'>+    ldo5      : regulator LDO5</div><div class='add'>+    ldo6      : regulator LDO6</div><div class='add'>+    ldo7      : regulator LDO7</div><div class='add'>+    ldo8      : regulator LDO8</div><div class='add'>+    ldo9      : regulator LDO9</div><div class='add'>+    ldo10     : regulator LDO10</div><div class='add'>+    ldo11     : regulator LDO11</div><div class='add'>+    ldo12     : regulator LDO12</div><div class='add'>+    ldo13     : regulator LDO13</div><div class='add'>+</div><div class='add'>+  The bindings details of individual regulator device can be found in:</div><div class='add'>+  Documentation/devicetree/bindings/regulator/regulator.txt</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+i2c@63fc8000 { /* I2C1 */</div><div class='add'>+	status = "okay";</div><div class='add'>+</div><div class='add'>+	pmic: dialog@48 {</div><div class='add'>+		compatible = "dlg,da9053-aa";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			buck0 {</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2075000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck1 {</div><div class='add'>+				regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2075000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck2 {</div><div class='add'>+				regulator-min-microvolt = &lt;925000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			buck3 {</div><div class='add'>+				regulator-min-microvolt = &lt;925000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/tps65910.txt b/Documentation/devicetree/bindings/mfd/tps65910.txt<br/>new file mode 100644<br/>index 000000000000..645f5eaadb3f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/tps65910.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mfd/tps65910.txt</a></div><div class='hunk'>@@ -0,0 +1,133 @@</div><div class='add'>+TPS65910 Power Management Integrated Circuit</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "ti,tps65910" or "ti,tps65911"</div><div class='add'>+- reg: I2C slave address</div><div class='add'>+- interrupts: the interrupt outputs of the controller</div><div class='add'>+- #gpio-cells: number of cells to describe a GPIO, this should be 2.</div><div class='add'>+  The first cell is the GPIO number.</div><div class='add'>+  The second cell is used to specify additional options &lt;unused&gt;.</div><div class='add'>+- gpio-controller: mark the device as a GPIO controller</div><div class='add'>+- #interrupt-cells: the number of cells to describe an IRQ, this should be 2.</div><div class='add'>+  The first cell is the IRQ number.</div><div class='add'>+  The second cell is the flags, encoded as the trigger masks from</div><div class='add'>+  Documentation/devicetree/bindings/interrupts.txt</div><div class='add'>+- regulators: This is the list of child nodes that specify the regulator</div><div class='add'>+  initialization data for defined regulators. Not all regulators for the given</div><div class='add'>+  device need to be present. The definition for each of these nodes is defined</div><div class='add'>+  using the standard binding for regulators found at</div><div class='add'>+  Documentation/devicetree/bindings/regulator/regulator.txt.</div><div class='add'>+</div><div class='add'>+  The valid names for regulators are:</div><div class='add'>+  tps65910: vrtc, vio, vdd1, vdd2, vdd3, vdig1, vdig2, vpll, vdac, vaux1,</div><div class='add'>+            vaux2, vaux33, vmmc</div><div class='add'>+  tps65911: vrtc, vio, vdd1, vdd3, vddctrl, ldo1, ldo2, ldo3, ldo4, ldo5,</div><div class='add'>+            ldo6, ldo7, ldo8</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- ti,vmbch-threshold: (tps65911) main battery charged threshold</div><div class='add'>+  comparator. (see VMBCH_VSEL in TPS65910 datasheet)</div><div class='add'>+- ti,vmbch2-threshold: (tps65911) main battery discharged threshold</div><div class='add'>+  comparator. (see VMBCH_VSEL in TPS65910 datasheet)</div><div class='add'>+- ti,en-gpio-sleep: enable sleep control for gpios</div><div class='add'>+  There should be 9 entries here, one for each gpio.</div><div class='add'>+</div><div class='add'>+Regulator Optional properties:</div><div class='add'>+- ti,regulator-ext-sleep-control: enable external sleep</div><div class='add'>+  control through external inputs [0 (not enabled), 1 (EN1), 2 (EN2) or 4(EN3)]</div><div class='add'>+  If this property is not defined, it defaults to 0 (not enabled).</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	pmu: tps65910@d2 {</div><div class='add'>+		compatible = "ti,tps65910";</div><div class='add'>+		reg = &lt;0xd2&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		interrupts = &lt; 0 118 0x04 &gt;;</div><div class='add'>+</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+</div><div class='add'>+		ti,vmbch-threshold = 0;</div><div class='add'>+		ti,vmbch2-threshold = 0;</div><div class='add'>+</div><div class='add'>+		ti,en-gpio-sleep = &lt;0 0 1 0 0 0 0 0 0&gt;;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			vdd1_reg: vdd1 {</div><div class='add'>+				regulator-min-microvolt = &lt; 600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				ti,regulator-ext-sleep-control = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			vdd2_reg: vdd2 {</div><div class='add'>+				regulator-min-microvolt = &lt; 600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				ti,regulator-ext-sleep-control = &lt;4&gt;;</div><div class='add'>+			};</div><div class='add'>+			vddctrl_reg: vddctrl {</div><div class='add'>+				regulator-min-microvolt = &lt; 600000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				ti,regulator-ext-sleep-control = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			vio_reg: vio {</div><div class='add'>+				regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				ti,regulator-ext-sleep-control = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			ldo1_reg: ldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				ti,regulator-ext-sleep-control = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			ldo2_reg: ldo2 {</div><div class='add'>+				regulator-min-microvolt = &lt;1050000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1050000&gt;;</div><div class='add'>+				ti,regulator-ext-sleep-control = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			ldo3_reg: ldo3 {</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				ti,regulator-ext-sleep-control = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			ldo4_reg: ldo4 {</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				ti,regulator-ext-sleep-control = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			ldo5_reg: ldo5 {</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				ti,regulator-ext-sleep-control = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			ldo6_reg: ldo6 {</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				ti,regulator-ext-sleep-control = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			ldo7_reg: ldo7 {</div><div class='add'>+				regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				ti,regulator-ext-sleep-control = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			ldo8_reg: ldo8 {</div><div class='add'>+				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+				ti,regulator-ext-sleep-control = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/twl6040.txt b/Documentation/devicetree/bindings/mfd/twl6040.txt<br/>new file mode 100644<br/>index 000000000000..bc67c6f424aa<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mfd/twl6040.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mfd/twl6040.txt</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+Texas Instruments TWL6040 family</div><div class='add'>+</div><div class='add'>+The TWL6040s are 8-channel high quality low-power audio codecs providing audio</div><div class='add'>+and vibra functionality on OMAP4+ platforms.</div><div class='add'>+They are connected ot the host processor via i2c for commands, McPDM for audio</div><div class='add'>+data and commands.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : Must be "ti,twl6040";</div><div class='add'>+- reg: must be 0x4b for i2c address</div><div class='add'>+- interrupts: twl6040 has one interrupt line connecteded to the main SoC</div><div class='add'>+- interrupt-parent: The parent interrupt controller</div><div class='add'>+- twl6040,audpwron-gpio: Power on GPIO line for the twl6040</div><div class='add'>+</div><div class='add'>+- vio-supply: Regulator for the twl6040 VIO supply</div><div class='add'>+- v2v1-supply: Regulator for the twl6040 V2V1 supply</div><div class='add'>+</div><div class='add'>+Optional properties, nodes:</div><div class='add'>+- enable-active-high: To power on the twl6040 during boot.</div><div class='add'>+</div><div class='add'>+Vibra functionality</div><div class='add'>+Required properties:</div><div class='add'>+- vddvibl-supply: Regulator for the left vibra motor</div><div class='add'>+- vddvibr-supply: Regulator for the right vibra motor</div><div class='add'>+- vibra { }: Configuration section for vibra parameters containing the following</div><div class='add'>+	     properties:</div><div class='add'>+- ti,vibldrv-res: Resistance parameter for left driver</div><div class='add'>+- ti,vibrdrv-res: Resistance parameter for right driver</div><div class='add'>+- ti,viblmotor-res: Resistance parameter for left motor</div><div class='add'>+- ti,viblmotor-res: Resistance parameter for right motor</div><div class='add'>+</div><div class='add'>+Optional properties within vibra { } section:</div><div class='add'>+- vddvibl_uV: If the vddvibl default voltage need to be changed</div><div class='add'>+- vddvibr_uV: If the vddvibr default voltage need to be changed</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	twl6040: twl@4b {</div><div class='add'>+		compatible = "ti,twl6040";</div><div class='add'>+		reg = &lt;0x4b&gt;;</div><div class='add'>+</div><div class='add'>+		interrupts = &lt;0 119 4&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+		twl6040,audpwron-gpio = &lt;&amp;gpio4 31 0&gt;;</div><div class='add'>+</div><div class='add'>+		vio-supply = &lt;&amp;v1v8&gt;;</div><div class='add'>+		v2v1-supply = &lt;&amp;v2v1&gt;;</div><div class='add'>+		enable-active-high;</div><div class='add'>+</div><div class='add'>+		/* regulators for vibra motor */</div><div class='add'>+		vddvibl-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+		vddvibr-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+</div><div class='add'>+		vibra {</div><div class='add'>+			/* Vibra driver, motor resistance parameters */</div><div class='add'>+			ti,vibldrv-res = &lt;8&gt;;</div><div class='add'>+			ti,vibrdrv-res = &lt;3&gt;;</div><div class='add'>+			ti,viblmotor-res = &lt;10&gt;;</div><div class='add'>+			ti,vibrmotor-res = &lt;10&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/misc/bmp085.txt b/Documentation/devicetree/bindings/misc/bmp085.txt<br/>new file mode 100644<br/>index 000000000000..91dfda2e4e11<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/misc/bmp085.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/misc/bmp085.txt</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+BMP085/BMP18x digital pressure sensors</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: bosch,bmp085</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- chip-id: configurable chip id for non-default chip revisions</div><div class='add'>+- temp-measurement-period: temperature measurement period (milliseconds)</div><div class='add'>+- default-oversampling: default oversampling value to be used at startup,</div><div class='add'>+  value range is 0-3 with rising sensitivity.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+pressure@77 {</div><div class='add'>+	compatible = "bosch,bmp085";</div><div class='add'>+	reg = &lt;0x77&gt;;</div><div class='add'>+	chip-id = &lt;10&gt;;</div><div class='add'>+	temp-measurement-period = &lt;100&gt;;</div><div class='add'>+	default-oversampling = &lt;2&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt<br/>index 64bcb8be973c..0d93b4b0e0e3 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/mmc/fsl-esdhc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/fsl-esdhc.txt</a></div><div class='hunk'>@@ -11,9 +11,11 @@ Required properties:</div><div class='ctx'>   - interrupt-parent : interrupt source phandle.</div><div class='ctx'>   - clock-frequency : specifies eSDHC base clock frequency.</div><div class='ctx'>   - sdhci,wp-inverted : (optional) specifies that eSDHC controller</div><div class='del'>-    reports inverted write-protect state;</div><div class='add'>+    reports inverted write-protect state; New devices should use</div><div class='add'>+    the generic "wp-inverted" property.</div><div class='ctx'>   - sdhci,1-bit-only : (optional) specifies that a controller can</div><div class='del'>-    only handle 1-bit data transfers.</div><div class='add'>+    only handle 1-bit data transfers. New devices should use the</div><div class='add'>+    generic "bus-width = &lt;1&gt;" property.</div><div class='ctx'>   - sdhci,auto-cmd12: (optional) specifies that a controller can</div><div class='ctx'>     only handle auto CMD12.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt<br/>index ab22fe6e73ab..c7e404b3ef05 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt</a></div><div class='hunk'>@@ -9,7 +9,7 @@ Required properties:</div><div class='ctx'> - interrupts : Should contain eSDHC interrupt</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='del'>-- fsl,card-wired : Indicate the card is wired to host permanently</div><div class='add'>+- non-removable : Indicate the card is wired to host permanently</div><div class='ctx'> - fsl,cd-internal : Indicate to use controller internal card detection</div><div class='ctx'> - fsl,wp-internal : Indicate to use controller internal write protection</div><div class='ctx'> - cd-gpios : Specify GPIOs for card detection</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt b/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt<br/>index 89a0084df2f7..d64aea5a4203 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt</a></div><div class='hunk'>@@ -10,7 +10,8 @@ Required properties:</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='ctx'> - gpios : may specify GPIOs in this order: Card-Detect GPIO,</div><div class='del'>-  Write-Protect GPIO.</div><div class='add'>+  Write-Protect GPIO. Note that this does not follow the</div><div class='add'>+  binding from mmc.txt, for historic reasons.</div><div class='ctx'> - interrupts : the interrupt of a card detect interrupt.</div><div class='ctx'> - interrupt-parent : the phandle for the interrupt controller that</div><div class='ctx'>   services interrupts for this device.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt b/Documentation/devicetree/bindings/mmc/mmc.txt<br/>new file mode 100644<br/>index 000000000000..6e70dcde0a71<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/mmc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/mmc.txt</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+These properties are common to multiple MMC host controllers. Any host</div><div class='add'>+that requires the respective functionality should implement them using</div><div class='add'>+these definitions.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- bus-width: Number of data lines, can be &lt;1&gt;, &lt;4&gt;, or &lt;8&gt;</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- cd-gpios : Specify GPIOs for card detection, see gpio binding</div><div class='add'>+- wp-gpios : Specify GPIOs for write protection, see gpio binding</div><div class='add'>+- cd-inverted: when present, polarity on the wp gpio line is inverted</div><div class='add'>+- wp-inverted: when present, polarity on the wp gpio line is inverted</div><div class='add'>+- non-removable: non-removable slot (like eMMC)</div><div class='add'>+- max-frequency: maximum operating clock frequency</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+sdhci@ab000000 {</div><div class='add'>+	compatible = "sdhci";</div><div class='add'>+	reg = &lt;0xab000000 0x200&gt;;</div><div class='add'>+	interrupts = &lt;23&gt;;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	cd-gpios = &lt;&amp;gpio 69 0&gt;;</div><div class='add'>+	cd-inverted;</div><div class='add'>+	wp-gpios = &lt;&amp;gpio 70 0&gt;;</div><div class='add'>+	max-frequency = &lt;50000000&gt;;</div><div class='add'>+}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mmci.txt b/Documentation/devicetree/bindings/mmc/mmci.txt<br/>new file mode 100644<br/>index 000000000000..14a81d526118<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/mmci.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/mmci.txt</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+* ARM PrimeCell MultiMedia Card Interface (MMCI) PL180/1</div><div class='add'>+</div><div class='add'>+The ARM PrimeCell MMCI PL180 and PL181 provides and interface for</div><div class='add'>+reading and writing to MultiMedia and SD cards alike.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible             : contains "arm,pl18x", "arm,primecell".</div><div class='add'>+- reg                    : contains pl18x registers and length.</div><div class='add'>+- interrupts             : contains the device IRQ(s).</div><div class='add'>+- arm,primecell-periphid : contains the PrimeCell Peripheral ID.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- wp-gpios               : contains any write protect (ro) gpios</div><div class='add'>+- cd-gpios               : contains any card detection gpios</div><div class='add'>+- cd-inverted            : indicates whether the cd gpio is inverted</div><div class='add'>+- max-frequency          : contains the maximum operating frequency</div><div class='add'>+- bus-width              : number of data lines, can be &lt;1&gt;, &lt;4&gt;, or &lt;8&gt;</div><div class='add'>+- mmc-cap-mmc-highspeed  : indicates whether MMC is high speed capable</div><div class='add'>+- mmc-cap-sd-highspeed   : indicates whether SD is high speed capable</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mxs-mmc.txt b/Documentation/devicetree/bindings/mmc/mxs-mmc.txt<br/>new file mode 100644<br/>index 000000000000..14d870a9e3db<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/mxs-mmc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/mxs-mmc.txt</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+* Freescale MXS MMC controller</div><div class='add'>+</div><div class='add'>+The Freescale MXS Synchronous Serial Ports (SSP) can act as a MMC controller</div><div class='add'>+to support MMC, SD, and SDIO types of memory cards.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be "fsl,&lt;chip&gt;-mmc".  The supported chips include</div><div class='add'>+  imx23 and imx28.</div><div class='add'>+- reg: Should contain registers location and length</div><div class='add'>+- interrupts: Should contain ERROR and DMA interrupts</div><div class='add'>+- fsl,ssp-dma-channel: APBH DMA channel for the SSP</div><div class='add'>+- bus-width: Number of data lines, can be &lt;1&gt;, &lt;4&gt;, or &lt;8&gt;</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- wp-gpios: Specify GPIOs for write protection</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+ssp0: ssp@80010000 {</div><div class='add'>+	compatible = "fsl,imx28-mmc";</div><div class='add'>+	reg = &lt;0x80010000 2000&gt;;</div><div class='add'>+	interrupts = &lt;96 82&gt;;</div><div class='add'>+	fsl,ssp-dma-channel = &lt;0&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt<br/>index 7e51154679a6..f77c3031607f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt</a></div><div class='hunk'>@@ -7,12 +7,12 @@ Required properties:</div><div class='ctx'> - compatible : Should be "nvidia,&lt;chip&gt;-sdhci"</div><div class='ctx'> - reg : Should contain SD/MMC registers location and length</div><div class='ctx'> - interrupts : Should contain SD/MMC interrupt</div><div class='add'>+- bus-width : Number of data lines, can be &lt;1&gt;, &lt;4&gt;, or &lt;8&gt;</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='ctx'> - cd-gpios : Specify GPIOs for card detection</div><div class='ctx'> - wp-gpios : Specify GPIOs for write protection</div><div class='ctx'> - power-gpios : Specify GPIOs for power control</div><div class='del'>-- support-8bit : Boolean, indicates if 8-bit mode should be used.</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='hunk'>@@ -23,5 +23,5 @@ sdhci@c8000200 {</div><div class='ctx'> 	cd-gpios = &lt;&amp;gpio 69 0&gt;; /* gpio PI5 */</div><div class='ctx'> 	wp-gpios = &lt;&amp;gpio 57 0&gt;; /* gpio PH1 */</div><div class='ctx'> 	power-gpios = &lt;&amp;gpio 155 0&gt;; /* gpio PT3 */</div><div class='del'>-	support-8bit;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt<br/>index dbd4368ab8cc..8a53958c9a9f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt</a></div><div class='hunk'>@@ -15,7 +15,7 @@ Optional properties:</div><div class='ctx'> ti,dual-volt: boolean, supports dual voltage cards</div><div class='ctx'> &lt;supply-name&gt;-supply: phandle to the regulator device tree node</div><div class='ctx'> "supply-name" examples are "vmmc", "vmmc_aux" etc</div><div class='del'>-ti,bus-width: Number of data lines, default assumed is 1 if the property is missing.</div><div class='add'>+bus-width: Number of data lines, default assumed is 1 if the property is missing.</div><div class='ctx'> cd-gpios: GPIOs for card detection</div><div class='ctx'> wp-gpios: GPIOs for write protection</div><div class='ctx'> ti,non-removable: non-removable slot (like eMMC)</div><div class='hunk'>@@ -27,7 +27,7 @@ Example:</div><div class='ctx'> 		reg = &lt;0x4809c000 0x400&gt;;</div><div class='ctx'> 		ti,hwmods = "mmc1";</div><div class='ctx'> 		ti,dual-volt;</div><div class='del'>-		ti,bus-width = &lt;4&gt;;</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='ctx'> 		vmmc-supply = &lt;&amp;vmmc&gt;; /* phandle to regulator node */</div><div class='ctx'> 		ti,non-removable;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt<br/>new file mode 100644<br/>index 000000000000..1a5bbd346d22<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mtd/gpmi-nand.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mtd/gpmi-nand.txt</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+* Freescale General-Purpose Media Interface (GPMI)</div><div class='add'>+</div><div class='add'>+The GPMI nand controller provides an interface to control the</div><div class='add'>+NAND flash chips. We support only one NAND chip now.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+  - compatible : should be "fsl,&lt;chip&gt;-gpmi-nand"</div><div class='add'>+  - reg : should contain registers location and length for gpmi and bch.</div><div class='add'>+  - reg-names: Should contain the reg names "gpmi-nand" and "bch"</div><div class='add'>+  - interrupts : The first is the DMA interrupt number for GPMI.</div><div class='add'>+                 The second is the BCH interrupt number.</div><div class='add'>+  - interrupt-names : The interrupt names "gpmi-dma", "bch";</div><div class='add'>+  - fsl,gpmi-dma-channel : Should contain the dma channel it uses.</div><div class='add'>+</div><div class='add'>+The device tree may optionally contain sub-nodes describing partitions of the</div><div class='add'>+address space. See partition.txt for more detail.</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+gpmi-nand@8000c000 {</div><div class='add'>+	compatible = "fsl,imx28-gpmi-nand";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	reg = &lt;0x8000c000 2000&gt;, &lt;0x8000a000 2000&gt;;</div><div class='add'>+	reg-names = "gpmi-nand", "bch";</div><div class='add'>+	interrupts = &lt;88&gt;, &lt;41&gt;;</div><div class='add'>+	interrupt-names = "gpmi-dma", "bch";</div><div class='add'>+	fsl,gpmi-dma-channel = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+	partition@0 {</div><div class='add'>+	...</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/mxc-nand.txt b/Documentation/devicetree/bindings/mtd/mxc-nand.txt<br/>new file mode 100644<br/>index 000000000000..b5833d11c7be<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mtd/mxc-nand.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mtd/mxc-nand.txt</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+* Freescale's mxc_nand</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "fsl,imxXX-nand"</div><div class='add'>+- reg: address range of the nfc block</div><div class='add'>+- interrupts: irq to be used</div><div class='add'>+- nand-bus-width: see nand.txt</div><div class='add'>+- nand-ecc-mode: see nand.txt</div><div class='add'>+- nand-on-flash-bbt: see nand.txt</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	nand@d8000000 {</div><div class='add'>+		compatible = "fsl,imx27-nand";</div><div class='add'>+		reg = &lt;0xd8000000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;29&gt;;</div><div class='add'>+		nand-bus-width = &lt;8&gt;;</div><div class='add'>+		nand-ecc-mode = "hw";</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/orion-nand.txt b/Documentation/devicetree/bindings/mtd/orion-nand.txt<br/>new file mode 100644<br/>index 000000000000..b2356b7d2fa4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/mtd/orion-nand.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/mtd/orion-nand.txt</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+NAND support for Marvell Orion SoC platforms</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "mrvl,orion-nand".</div><div class='add'>+- reg : Base physical address of the NAND and length of memory mapped</div><div class='add'>+	region</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- cle : Address line number connected to CLE. Default is 0</div><div class='add'>+- ale : Address line number connected to ALE. Default is 1</div><div class='add'>+- bank-width : Width in bytes of the device. Default is 1</div><div class='add'>+- chip-delay : Chip dependent delay for transferring data from array to read</div><div class='add'>+               registers in usecs</div><div class='add'>+</div><div class='add'>+The device tree may optionally contain sub-nodes describing partitions of the</div><div class='add'>+address space. See partition.txt for more detail.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+nand@f4000000 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	cle = &lt;0&gt;;</div><div class='add'>+	ale = &lt;1&gt;;</div><div class='add'>+	bank-width = &lt;1&gt;;</div><div class='add'>+	chip-delay = &lt;25&gt;;</div><div class='add'>+	compatible = "mrvl,orion-nand";</div><div class='add'>+	reg = &lt;0xf4000000 0x400&gt;;</div><div class='add'>+</div><div class='add'>+	partition@0 {</div><div class='add'>+		label = "u-boot";</div><div class='add'>+		reg = &lt;0x0000000 0x100000&gt;;</div><div class='add'>+		read-only;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	partition@100000 {</div><div class='add'>+		label = "uImage";</div><div class='add'>+		reg = &lt;0x0100000 0x200000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	partition@300000 {</div><div class='add'>+		label = "dtb";</div><div class='add'>+		reg = &lt;0x0300000 0x100000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	partition@400000 {</div><div class='add'>+		label = "root";</div><div class='add'>+		reg = &lt;0x0400000 0x7d00000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt<br/>index 1ad80d5865a9..f31b686d4556 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/net/can/fsl-flexcan.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/net/can/fsl-flexcan.txt</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-Flexcan CAN contoller on Freescale's ARM and PowerPC system-on-a-chip (SOC).</div><div class='add'>+Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt b/Documentation/devicetree/bindings/net/fsl-fec.txt<br/>index de439517dff0..7ab9e1a2d8be 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/fsl-fec.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/net/fsl-fec.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/fsl-fec.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/net/fsl-fec.txt</a></div><div class='hunk'>@@ -14,7 +14,7 @@ Optional properties:</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='del'>-fec@83fec000 {</div><div class='add'>+ethernet@83fec000 {</div><div class='ctx'> 	compatible = "fsl,imx51-fec", "fsl,imx27-fec";</div><div class='ctx'> 	reg = &lt;0x83fec000 0x4000&gt;;</div><div class='ctx'> 	interrupts = &lt;87&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/lpc-eth.txt b/Documentation/devicetree/bindings/net/lpc-eth.txt<br/>new file mode 100644<br/>index 000000000000..585021acd178<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/lpc-eth.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/net/lpc-eth.txt</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+* NXP LPC32xx SoC Ethernet Controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be "nxp,lpc-eth"</div><div class='add'>+- reg: Address and length of the register set for the device</div><div class='add'>+- interrupts: Should contain ethernet controller interrupt</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- phy-mode: String, operation mode of the PHY interface.</div><div class='add'>+  Supported values are: "mii", "rmii" (default)</div><div class='add'>+- use-iram: Use LPC32xx internal SRAM (IRAM) for DMA buffering</div><div class='add'>+- local-mac-address : 6 bytes, mac address</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	mac: ethernet@31060000 {</div><div class='add'>+		compatible = "nxp,lpc-eth";</div><div class='add'>+		reg = &lt;0x31060000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mic&gt;;</div><div class='add'>+		interrupts = &lt;29 0&gt;;</div><div class='add'>+</div><div class='add'>+		phy-mode = "rmii";</div><div class='add'>+		use-iram;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mdio-mux-gpio.txt b/Documentation/devicetree/bindings/net/mdio-mux-gpio.txt<br/>new file mode 100644<br/>index 000000000000..79384113c2b0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/mdio-mux-gpio.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/net/mdio-mux-gpio.txt</a></div><div class='hunk'>@@ -0,0 +1,127 @@</div><div class='add'>+Properties for an MDIO bus multiplexer/switch controlled by GPIO pins.</div><div class='add'>+</div><div class='add'>+This is a special case of a MDIO bus multiplexer.  One or more GPIO</div><div class='add'>+lines are used to control which child bus is connected.</div><div class='add'>+</div><div class='add'>+Required properties in addition to the generic multiplexer properties:</div><div class='add'>+</div><div class='add'>+- compatible : mdio-mux-gpio.</div><div class='add'>+- gpios : GPIO specifiers for each GPIO line.  One or more must be specified.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example :</div><div class='add'>+</div><div class='add'>+	/* The parent MDIO bus. */</div><div class='add'>+	smi1: mdio@1180000001900 {</div><div class='add'>+		compatible = "cavium,octeon-3860-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x11800 0x00001900 0x0 0x40&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	   An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a</div><div class='add'>+	   pair of GPIO lines.  Child busses 2 and 3 populated with 4</div><div class='add'>+	   PHYs each.</div><div class='add'>+	 */</div><div class='add'>+	mdio-mux {</div><div class='add'>+		compatible = "mdio-mux-gpio";</div><div class='add'>+		gpios = &lt;&amp;gpio1 3 0&gt;, &lt;&amp;gpio1 4 0&gt;;</div><div class='add'>+		mdio-parent-bus = &lt;&amp;smi1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		mdio@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			phy11: ethernet-phy@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;10 8&gt;; /* Pin 10, active low */</div><div class='add'>+			};</div><div class='add'>+			phy12: ethernet-phy@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;10 8&gt;; /* Pin 10, active low */</div><div class='add'>+			};</div><div class='add'>+			phy13: ethernet-phy@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;10 8&gt;; /* Pin 10, active low */</div><div class='add'>+			};</div><div class='add'>+			phy14: ethernet-phy@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;10 8&gt;; /* Pin 10, active low */</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			phy21: ethernet-phy@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;12 8&gt;; /* Pin 12, active low */</div><div class='add'>+			};</div><div class='add'>+			phy22: ethernet-phy@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;12 8&gt;; /* Pin 12, active low */</div><div class='add'>+			};</div><div class='add'>+			phy23: ethernet-phy@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;12 8&gt;; /* Pin 12, active low */</div><div class='add'>+			};</div><div class='add'>+			phy24: ethernet-phy@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;12 8&gt;; /* Pin 12, active low */</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mdio-mux.txt b/Documentation/devicetree/bindings/net/mdio-mux.txt<br/>new file mode 100644<br/>index 000000000000..f65606f8d632<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/net/mdio-mux.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/net/mdio-mux.txt</a></div><div class='hunk'>@@ -0,0 +1,136 @@</div><div class='add'>+Common MDIO bus multiplexer/switch properties.</div><div class='add'>+</div><div class='add'>+An MDIO bus multiplexer/switch will have several child busses that are</div><div class='add'>+numbered uniquely in a device dependent manner.  The nodes for an MDIO</div><div class='add'>+bus multiplexer/switch will have one child node for each child bus.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- mdio-parent-bus : phandle to the parent MDIO bus.</div><div class='add'>+- #address-cells = &lt;1&gt;;</div><div class='add'>+- #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- Other properties specific to the multiplexer/switch hardware.</div><div class='add'>+</div><div class='add'>+Required properties for child nodes:</div><div class='add'>+- #address-cells = &lt;1&gt;;</div><div class='add'>+- #size-cells = &lt;0&gt;;</div><div class='add'>+- reg : The sub-bus number.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example :</div><div class='add'>+</div><div class='add'>+	/* The parent MDIO bus. */</div><div class='add'>+	smi1: mdio@1180000001900 {</div><div class='add'>+		compatible = "cavium,octeon-3860-mdio";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		reg = &lt;0x11800 0x00001900 0x0 0x40&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	   An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a</div><div class='add'>+	   pair of GPIO lines.  Child busses 2 and 3 populated with 4</div><div class='add'>+	   PHYs each.</div><div class='add'>+	 */</div><div class='add'>+	mdio-mux {</div><div class='add'>+		compatible = "mdio-mux-gpio";</div><div class='add'>+		gpios = &lt;&amp;gpio1 3 0&gt;, &lt;&amp;gpio1 4 0&gt;;</div><div class='add'>+		mdio-parent-bus = &lt;&amp;smi1&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		mdio@2 {</div><div class='add'>+			reg = &lt;2&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			phy11: ethernet-phy@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;10 8&gt;; /* Pin 10, active low */</div><div class='add'>+			};</div><div class='add'>+			phy12: ethernet-phy@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;10 8&gt;; /* Pin 10, active low */</div><div class='add'>+			};</div><div class='add'>+			phy13: ethernet-phy@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;10 8&gt;; /* Pin 10, active low */</div><div class='add'>+			};</div><div class='add'>+			phy14: ethernet-phy@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;10 8&gt;; /* Pin 10, active low */</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mdio@3 {</div><div class='add'>+			reg = &lt;3&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+			phy21: ethernet-phy@1 {</div><div class='add'>+				reg = &lt;1&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;12 8&gt;; /* Pin 12, active low */</div><div class='add'>+			};</div><div class='add'>+			phy22: ethernet-phy@2 {</div><div class='add'>+				reg = &lt;2&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;12 8&gt;; /* Pin 12, active low */</div><div class='add'>+			};</div><div class='add'>+			phy23: ethernet-phy@3 {</div><div class='add'>+				reg = &lt;3&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;12 8&gt;; /* Pin 12, active low */</div><div class='add'>+			};</div><div class='add'>+			phy24: ethernet-phy@4 {</div><div class='add'>+				reg = &lt;4&gt;;</div><div class='add'>+				compatible = "marvell,88e1149r";</div><div class='add'>+				marvell,reg-init = &lt;3 0x10 0 0x5777&gt;,</div><div class='add'>+					&lt;3 0x11 0 0x00aa&gt;,</div><div class='add'>+					&lt;3 0x12 0 0x4105&gt;,</div><div class='add'>+					&lt;3 0x13 0 0x0a60&gt;;</div><div class='add'>+				interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+				interrupts = &lt;12 8&gt;; /* Pin 12, active low */</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt<br/>new file mode 100644<br/>index 000000000000..ab19e6bc7d3b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+* Freescale IOMUX Controller (IOMUXC) for i.MX</div><div class='add'>+</div><div class='add'>+The IOMUX Controller (IOMUXC), together with the IOMUX, enables the IC</div><div class='add'>+to share one PAD to several functional blocks. The sharing is done by</div><div class='add'>+multiplexing the PAD input/output signals. For each PAD there are up to</div><div class='add'>+8 muxing options (called ALT modes). Since different modules require</div><div class='add'>+different PAD settings (like pull up, keeper, etc) the IOMUXC controls</div><div class='add'>+also the PAD settings parameters.</div><div class='add'>+</div><div class='add'>+Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='add'>+common pinctrl bindings used by client devices, including the meaning of the</div><div class='add'>+phrase "pin configuration node".</div><div class='add'>+</div><div class='add'>+Freescale IMX pin configuration node is a node of a group of pins which can be</div><div class='add'>+used for a specific device or function. This node represents both mux and config</div><div class='add'>+of the pins in that group. The 'mux' selects the function mode(also named mux</div><div class='add'>+mode) this pin can work on and the 'config' configures various pad settings</div><div class='add'>+such as pull-up, open drain, drive strength, etc.</div><div class='add'>+</div><div class='add'>+Required properties for iomux controller:</div><div class='add'>+- compatible: "fsl,&lt;soc&gt;-iomuxc"</div><div class='add'>+  Please refer to each fsl,&lt;soc&gt;-pinctrl.txt binding doc for supported SoCs.</div><div class='add'>+</div><div class='add'>+Required properties for pin configuration node:</div><div class='add'>+- fsl,pins: two integers array, represents a group of pins mux and config</div><div class='add'>+  setting. The format is fsl,pins = &lt;PIN_FUNC_ID CONFIG&gt;, PIN_FUNC_ID is a</div><div class='add'>+  pin working on a specific function, CONFIG is the pad setting value like</div><div class='add'>+  pull-up on this pin. Please refer to fsl,&lt;soc&gt;-pinctrl.txt for the valid</div><div class='add'>+  pins and functions of each SoC.</div><div class='add'>+</div><div class='add'>+Bits used for CONFIG:</div><div class='add'>+NO_PAD_CTL(1 &lt;&lt; 31): indicate this pin does not need config.</div><div class='add'>+</div><div class='add'>+SION(1 &lt;&lt; 30): Software Input On Field.</div><div class='add'>+Force the selected mux mode input path no matter of MUX_MODE functionality.</div><div class='add'>+By default the input path is determined by functionality of the selected</div><div class='add'>+mux mode (regular).</div><div class='add'>+</div><div class='add'>+Other bits are used for PAD setting.</div><div class='add'>+Please refer to each fsl,&lt;soc&gt;-pinctrl,txt binding doc for SoC specific part</div><div class='add'>+of bits definitions.</div><div class='add'>+</div><div class='add'>+NOTE:</div><div class='add'>+Some requirements for using fsl,imx-pinctrl binding:</div><div class='add'>+1. We have pin function node defined under iomux controller node to represent</div><div class='add'>+   what pinmux functions this SoC supports.</div><div class='add'>+2. The pin configuration node intends to work on a specific function should</div><div class='add'>+   to be defined under that specific function node.</div><div class='add'>+   The function node's name should represent well about what function</div><div class='add'>+   this group of pins in this pin configuration node are working on.</div><div class='add'>+3. The driver can use the function node's name and pin configuration node's</div><div class='add'>+   name describe the pin function and group hierarchy.</div><div class='add'>+   For example, Linux IMX pinctrl driver takes the function node's name</div><div class='add'>+   as the function name and pin configuration node's name as group name to</div><div class='add'>+   create the map table.</div><div class='add'>+4. Each pin configuration node should have a phandle, devices can set pins</div><div class='add'>+   configurations by referring to the phandle of that pin configuration node.</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+usdhc@0219c000 { /* uSDHC4 */</div><div class='add'>+	fsl,card-wired;</div><div class='add'>+	vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+	status = "okay";</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;pinctrl_usdhc4_1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+iomuxc@020e0000 {</div><div class='add'>+	compatible = "fsl,imx6q-iomuxc";</div><div class='add'>+	reg = &lt;0x020e0000 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+	/* shared pinctrl settings */</div><div class='add'>+	usdhc4 {</div><div class='add'>+		pinctrl_usdhc4_1: usdhc4grp-1 {</div><div class='add'>+			fsl,pins = &lt;1386 0x17059	/* MX6Q_PAD_SD4_CMD__USDHC4_CMD */</div><div class='add'>+				    1392 0x10059	/* MX6Q_PAD_SD4_CLK__USDHC4_CLK	*/</div><div class='add'>+				    1462 0x17059	/* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */</div><div class='add'>+				    1470 0x17059	/* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */</div><div class='add'>+				    1478 0x17059	/* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */</div><div class='add'>+				    1486 0x17059	/* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */</div><div class='add'>+				    1493 0x17059	/* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */</div><div class='add'>+				    1501 0x17059	/* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */</div><div class='add'>+				    1509 0x17059	/* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */</div><div class='add'>+				    1517 0x17059&gt;;	/* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	....</div><div class='add'>+};</div><div class='add'>+Refer to the IOMUXC controller chapter in imx6q datasheet,</div><div class='add'>+0x17059 means enable hysteresis, 47KOhm Pull Up, 50Mhz speed,</div><div class='add'>+80Ohm driver strength and Fast Slew Rate.</div><div class='add'>+User should refer to each SoC spec to set the correct value.</div><div class='add'>+</div><div class='add'>+TODO: when dtc macro support is available, we can change above raw data</div><div class='add'>+to dt macro which can get better readability in dts file.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx51-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx51-pinctrl.txt<br/>new file mode 100644<br/>index 000000000000..b96fa4c31745<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx51-pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/fsl,imx51-pinctrl.txt</a></div><div class='hunk'>@@ -0,0 +1,787 @@</div><div class='add'>+* Freescale IMX51 IOMUX Controller</div><div class='add'>+</div><div class='add'>+Please refer to fsl,imx-pinctrl.txt in this directory for common binding part</div><div class='add'>+and usage.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "fsl,imx51-iomuxc"</div><div class='add'>+- fsl,pins: two integers array, represents a group of pins mux and config</div><div class='add'>+  setting. The format is fsl,pins = &lt;PIN_FUNC_ID CONFIG&gt;, PIN_FUNC_ID is a</div><div class='add'>+  pin working on a specific function, CONFIG is the pad setting value like</div><div class='add'>+  pull-up for this pin. Please refer to imx51 datasheet for the valid pad</div><div class='add'>+  config settings.</div><div class='add'>+</div><div class='add'>+CONFIG bits definition:</div><div class='add'>+PAD_CTL_HVE			(1 &lt;&lt; 13)</div><div class='add'>+PAD_CTL_HYS			(1 &lt;&lt; 8)</div><div class='add'>+PAD_CTL_PKE			(1 &lt;&lt; 7)</div><div class='add'>+PAD_CTL_PUE			(1 &lt;&lt; 6)</div><div class='add'>+PAD_CTL_PUS_100K_DOWN		(0 &lt;&lt; 4)</div><div class='add'>+PAD_CTL_PUS_47K_UP		(1 &lt;&lt; 4)</div><div class='add'>+PAD_CTL_PUS_100K_UP		(2 &lt;&lt; 4)</div><div class='add'>+PAD_CTL_PUS_22K_UP		(3 &lt;&lt; 4)</div><div class='add'>+PAD_CTL_ODE			(1 &lt;&lt; 3)</div><div class='add'>+PAD_CTL_DSE_LOW			(0 &lt;&lt; 1)</div><div class='add'>+PAD_CTL_DSE_MED			(1 &lt;&lt; 1)</div><div class='add'>+PAD_CTL_DSE_HIGH		(2 &lt;&lt; 1)</div><div class='add'>+PAD_CTL_DSE_MAX			(3 &lt;&lt; 1)</div><div class='add'>+PAD_CTL_SRE_FAST		(1 &lt;&lt; 0)</div><div class='add'>+PAD_CTL_SRE_SLOW		(0 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+See below for available PIN_FUNC_ID for imx51:</div><div class='add'>+MX51_PAD_EIM_D16__AUD4_RXFS			0</div><div class='add'>+MX51_PAD_EIM_D16__AUD5_TXD			1</div><div class='add'>+MX51_PAD_EIM_D16__EIM_D16			2</div><div class='add'>+MX51_PAD_EIM_D16__GPIO2_0			3</div><div class='add'>+MX51_PAD_EIM_D16__I2C1_SDA			4</div><div class='add'>+MX51_PAD_EIM_D16__UART2_CTS			5</div><div class='add'>+MX51_PAD_EIM_D16__USBH2_DATA0			6</div><div class='add'>+MX51_PAD_EIM_D17__AUD5_RXD			7</div><div class='add'>+MX51_PAD_EIM_D17__EIM_D17			8</div><div class='add'>+MX51_PAD_EIM_D17__GPIO2_1			9</div><div class='add'>+MX51_PAD_EIM_D17__UART2_RXD			10</div><div class='add'>+MX51_PAD_EIM_D17__UART3_CTS			11</div><div class='add'>+MX51_PAD_EIM_D17__USBH2_DATA1			12</div><div class='add'>+MX51_PAD_EIM_D18__AUD5_TXC			13</div><div class='add'>+MX51_PAD_EIM_D18__EIM_D18			14</div><div class='add'>+MX51_PAD_EIM_D18__GPIO2_2			15</div><div class='add'>+MX51_PAD_EIM_D18__UART2_TXD			16</div><div class='add'>+MX51_PAD_EIM_D18__UART3_RTS			17</div><div class='add'>+MX51_PAD_EIM_D18__USBH2_DATA2			18</div><div class='add'>+MX51_PAD_EIM_D19__AUD4_RXC			19</div><div class='add'>+MX51_PAD_EIM_D19__AUD5_TXFS			20</div><div class='add'>+MX51_PAD_EIM_D19__EIM_D19			21</div><div class='add'>+MX51_PAD_EIM_D19__GPIO2_3			22</div><div class='add'>+MX51_PAD_EIM_D19__I2C1_SCL			23</div><div class='add'>+MX51_PAD_EIM_D19__UART2_RTS			24</div><div class='add'>+MX51_PAD_EIM_D19__USBH2_DATA3			25</div><div class='add'>+MX51_PAD_EIM_D20__AUD4_TXD			26</div><div class='add'>+MX51_PAD_EIM_D20__EIM_D20			27</div><div class='add'>+MX51_PAD_EIM_D20__GPIO2_4			28</div><div class='add'>+MX51_PAD_EIM_D20__SRTC_ALARM_DEB		29</div><div class='add'>+MX51_PAD_EIM_D20__USBH2_DATA4			30</div><div class='add'>+MX51_PAD_EIM_D21__AUD4_RXD			31</div><div class='add'>+MX51_PAD_EIM_D21__EIM_D21			32</div><div class='add'>+MX51_PAD_EIM_D21__GPIO2_5			33</div><div class='add'>+MX51_PAD_EIM_D21__SRTC_ALARM_DEB		34</div><div class='add'>+MX51_PAD_EIM_D21__USBH2_DATA5			35</div><div class='add'>+MX51_PAD_EIM_D22__AUD4_TXC			36</div><div class='add'>+MX51_PAD_EIM_D22__EIM_D22			37</div><div class='add'>+MX51_PAD_EIM_D22__GPIO2_6			38</div><div class='add'>+MX51_PAD_EIM_D22__USBH2_DATA6			39</div><div class='add'>+MX51_PAD_EIM_D23__AUD4_TXFS			40</div><div class='add'>+MX51_PAD_EIM_D23__EIM_D23			41</div><div class='add'>+MX51_PAD_EIM_D23__GPIO2_7			42</div><div class='add'>+MX51_PAD_EIM_D23__SPDIF_OUT1			43</div><div class='add'>+MX51_PAD_EIM_D23__USBH2_DATA7			44</div><div class='add'>+MX51_PAD_EIM_D24__AUD6_RXFS			45</div><div class='add'>+MX51_PAD_EIM_D24__EIM_D24			46</div><div class='add'>+MX51_PAD_EIM_D24__GPIO2_8			47</div><div class='add'>+MX51_PAD_EIM_D24__I2C2_SDA			48</div><div class='add'>+MX51_PAD_EIM_D24__UART3_CTS			49</div><div class='add'>+MX51_PAD_EIM_D24__USBOTG_DATA0			50</div><div class='add'>+MX51_PAD_EIM_D25__EIM_D25			51</div><div class='add'>+MX51_PAD_EIM_D25__KEY_COL6			52</div><div class='add'>+MX51_PAD_EIM_D25__UART2_CTS			53</div><div class='add'>+MX51_PAD_EIM_D25__UART3_RXD			54</div><div class='add'>+MX51_PAD_EIM_D25__USBOTG_DATA1			55</div><div class='add'>+MX51_PAD_EIM_D26__EIM_D26			56</div><div class='add'>+MX51_PAD_EIM_D26__KEY_COL7			57</div><div class='add'>+MX51_PAD_EIM_D26__UART2_RTS			58</div><div class='add'>+MX51_PAD_EIM_D26__UART3_TXD			59</div><div class='add'>+MX51_PAD_EIM_D26__USBOTG_DATA2			60</div><div class='add'>+MX51_PAD_EIM_D27__AUD6_RXC			61</div><div class='add'>+MX51_PAD_EIM_D27__EIM_D27			62</div><div class='add'>+MX51_PAD_EIM_D27__GPIO2_9			63</div><div class='add'>+MX51_PAD_EIM_D27__I2C2_SCL			64</div><div class='add'>+MX51_PAD_EIM_D27__UART3_RTS			65</div><div class='add'>+MX51_PAD_EIM_D27__USBOTG_DATA3			66</div><div class='add'>+MX51_PAD_EIM_D28__AUD6_TXD			67</div><div class='add'>+MX51_PAD_EIM_D28__EIM_D28			68</div><div class='add'>+MX51_PAD_EIM_D28__KEY_ROW4			69</div><div class='add'>+MX51_PAD_EIM_D28__USBOTG_DATA4			70</div><div class='add'>+MX51_PAD_EIM_D29__AUD6_RXD			71</div><div class='add'>+MX51_PAD_EIM_D29__EIM_D29			72</div><div class='add'>+MX51_PAD_EIM_D29__KEY_ROW5			73</div><div class='add'>+MX51_PAD_EIM_D29__USBOTG_DATA5			74</div><div class='add'>+MX51_PAD_EIM_D30__AUD6_TXC			75</div><div class='add'>+MX51_PAD_EIM_D30__EIM_D30			76</div><div class='add'>+MX51_PAD_EIM_D30__KEY_ROW6			77</div><div class='add'>+MX51_PAD_EIM_D30__USBOTG_DATA6			78</div><div class='add'>+MX51_PAD_EIM_D31__AUD6_TXFS			79</div><div class='add'>+MX51_PAD_EIM_D31__EIM_D31			80</div><div class='add'>+MX51_PAD_EIM_D31__KEY_ROW7			81</div><div class='add'>+MX51_PAD_EIM_D31__USBOTG_DATA7			82</div><div class='add'>+MX51_PAD_EIM_A16__EIM_A16			83</div><div class='add'>+MX51_PAD_EIM_A16__GPIO2_10			84</div><div class='add'>+MX51_PAD_EIM_A16__OSC_FREQ_SEL0			85</div><div class='add'>+MX51_PAD_EIM_A17__EIM_A17			86</div><div class='add'>+MX51_PAD_EIM_A17__GPIO2_11			87</div><div class='add'>+MX51_PAD_EIM_A17__OSC_FREQ_SEL1			88</div><div class='add'>+MX51_PAD_EIM_A18__BOOT_LPB0			89</div><div class='add'>+MX51_PAD_EIM_A18__EIM_A18			90</div><div class='add'>+MX51_PAD_EIM_A18__GPIO2_12			91</div><div class='add'>+MX51_PAD_EIM_A19__BOOT_LPB1			92</div><div class='add'>+MX51_PAD_EIM_A19__EIM_A19			93</div><div class='add'>+MX51_PAD_EIM_A19__GPIO2_13			94</div><div class='add'>+MX51_PAD_EIM_A20__BOOT_UART_SRC0		95</div><div class='add'>+MX51_PAD_EIM_A20__EIM_A20			96</div><div class='add'>+MX51_PAD_EIM_A20__GPIO2_14			97</div><div class='add'>+MX51_PAD_EIM_A21__BOOT_UART_SRC1		98</div><div class='add'>+MX51_PAD_EIM_A21__EIM_A21			99</div><div class='add'>+MX51_PAD_EIM_A21__GPIO2_15			100</div><div class='add'>+MX51_PAD_EIM_A22__EIM_A22			101</div><div class='add'>+MX51_PAD_EIM_A22__GPIO2_16			102</div><div class='add'>+MX51_PAD_EIM_A23__BOOT_HPN_EN			103</div><div class='add'>+MX51_PAD_EIM_A23__EIM_A23			104</div><div class='add'>+MX51_PAD_EIM_A23__GPIO2_17			105</div><div class='add'>+MX51_PAD_EIM_A24__EIM_A24			106</div><div class='add'>+MX51_PAD_EIM_A24__GPIO2_18			107</div><div class='add'>+MX51_PAD_EIM_A24__USBH2_CLK			108</div><div class='add'>+MX51_PAD_EIM_A25__DISP1_PIN4			109</div><div class='add'>+MX51_PAD_EIM_A25__EIM_A25			110</div><div class='add'>+MX51_PAD_EIM_A25__GPIO2_19			111</div><div class='add'>+MX51_PAD_EIM_A25__USBH2_DIR			112</div><div class='add'>+MX51_PAD_EIM_A26__CSI1_DATA_EN			113</div><div class='add'>+MX51_PAD_EIM_A26__DISP2_EXT_CLK			114</div><div class='add'>+MX51_PAD_EIM_A26__EIM_A26			115</div><div class='add'>+MX51_PAD_EIM_A26__GPIO2_20			116</div><div class='add'>+MX51_PAD_EIM_A26__USBH2_STP			117</div><div class='add'>+MX51_PAD_EIM_A27__CSI2_DATA_EN			118</div><div class='add'>+MX51_PAD_EIM_A27__DISP1_PIN1			119</div><div class='add'>+MX51_PAD_EIM_A27__EIM_A27			120</div><div class='add'>+MX51_PAD_EIM_A27__GPIO2_21			121</div><div class='add'>+MX51_PAD_EIM_A27__USBH2_NXT			122</div><div class='add'>+MX51_PAD_EIM_EB0__EIM_EB0			123</div><div class='add'>+MX51_PAD_EIM_EB1__EIM_EB1			124</div><div class='add'>+MX51_PAD_EIM_EB2__AUD5_RXFS			125</div><div class='add'>+MX51_PAD_EIM_EB2__CSI1_D2			126</div><div class='add'>+MX51_PAD_EIM_EB2__EIM_EB2			127</div><div class='add'>+MX51_PAD_EIM_EB2__FEC_MDIO			128</div><div class='add'>+MX51_PAD_EIM_EB2__GPIO2_22			129</div><div class='add'>+MX51_PAD_EIM_EB2__GPT_CMPOUT1			130</div><div class='add'>+MX51_PAD_EIM_EB3__AUD5_RXC			131</div><div class='add'>+MX51_PAD_EIM_EB3__CSI1_D3			132</div><div class='add'>+MX51_PAD_EIM_EB3__EIM_EB3			133</div><div class='add'>+MX51_PAD_EIM_EB3__FEC_RDATA1			134</div><div class='add'>+MX51_PAD_EIM_EB3__GPIO2_23			135</div><div class='add'>+MX51_PAD_EIM_EB3__GPT_CMPOUT2			136</div><div class='add'>+MX51_PAD_EIM_OE__EIM_OE				137</div><div class='add'>+MX51_PAD_EIM_OE__GPIO2_24			138</div><div class='add'>+MX51_PAD_EIM_CS0__EIM_CS0			139</div><div class='add'>+MX51_PAD_EIM_CS0__GPIO2_25			140</div><div class='add'>+MX51_PAD_EIM_CS1__EIM_CS1			141</div><div class='add'>+MX51_PAD_EIM_CS1__GPIO2_26			142</div><div class='add'>+MX51_PAD_EIM_CS2__AUD5_TXD			143</div><div class='add'>+MX51_PAD_EIM_CS2__CSI1_D4			144</div><div class='add'>+MX51_PAD_EIM_CS2__EIM_CS2			145</div><div class='add'>+MX51_PAD_EIM_CS2__FEC_RDATA2			146</div><div class='add'>+MX51_PAD_EIM_CS2__GPIO2_27			147</div><div class='add'>+MX51_PAD_EIM_CS2__USBOTG_STP			148</div><div class='add'>+MX51_PAD_EIM_CS3__AUD5_RXD			149</div><div class='add'>+MX51_PAD_EIM_CS3__CSI1_D5			150</div><div class='add'>+MX51_PAD_EIM_CS3__EIM_CS3			151</div><div class='add'>+MX51_PAD_EIM_CS3__FEC_RDATA3			152</div><div class='add'>+MX51_PAD_EIM_CS3__GPIO2_28			153</div><div class='add'>+MX51_PAD_EIM_CS3__USBOTG_NXT			154</div><div class='add'>+MX51_PAD_EIM_CS4__AUD5_TXC			155</div><div class='add'>+MX51_PAD_EIM_CS4__CSI1_D6			156</div><div class='add'>+MX51_PAD_EIM_CS4__EIM_CS4			157</div><div class='add'>+MX51_PAD_EIM_CS4__FEC_RX_ER			158</div><div class='add'>+MX51_PAD_EIM_CS4__GPIO2_29			159</div><div class='add'>+MX51_PAD_EIM_CS4__USBOTG_CLK			160</div><div class='add'>+MX51_PAD_EIM_CS5__AUD5_TXFS			161</div><div class='add'>+MX51_PAD_EIM_CS5__CSI1_D7			162</div><div class='add'>+MX51_PAD_EIM_CS5__DISP1_EXT_CLK			163</div><div class='add'>+MX51_PAD_EIM_CS5__EIM_CS5			164</div><div class='add'>+MX51_PAD_EIM_CS5__FEC_CRS			165</div><div class='add'>+MX51_PAD_EIM_CS5__GPIO2_30			166</div><div class='add'>+MX51_PAD_EIM_CS5__USBOTG_DIR			167</div><div class='add'>+MX51_PAD_EIM_DTACK__EIM_DTACK			168</div><div class='add'>+MX51_PAD_EIM_DTACK__GPIO2_31			169</div><div class='add'>+MX51_PAD_EIM_LBA__EIM_LBA			170</div><div class='add'>+MX51_PAD_EIM_LBA__GPIO3_1			171</div><div class='add'>+MX51_PAD_EIM_CRE__EIM_CRE			172</div><div class='add'>+MX51_PAD_EIM_CRE__GPIO3_2			173</div><div class='add'>+MX51_PAD_DRAM_CS1__DRAM_CS1			174</div><div class='add'>+MX51_PAD_NANDF_WE_B__GPIO3_3			175</div><div class='add'>+MX51_PAD_NANDF_WE_B__NANDF_WE_B			176</div><div class='add'>+MX51_PAD_NANDF_WE_B__PATA_DIOW			177</div><div class='add'>+MX51_PAD_NANDF_WE_B__SD3_DATA0			178</div><div class='add'>+MX51_PAD_NANDF_RE_B__GPIO3_4			179</div><div class='add'>+MX51_PAD_NANDF_RE_B__NANDF_RE_B			180</div><div class='add'>+MX51_PAD_NANDF_RE_B__PATA_DIOR			181</div><div class='add'>+MX51_PAD_NANDF_RE_B__SD3_DATA1			182</div><div class='add'>+MX51_PAD_NANDF_ALE__GPIO3_5			183</div><div class='add'>+MX51_PAD_NANDF_ALE__NANDF_ALE			184</div><div class='add'>+MX51_PAD_NANDF_ALE__PATA_BUFFER_EN		185</div><div class='add'>+MX51_PAD_NANDF_CLE__GPIO3_6			186</div><div class='add'>+MX51_PAD_NANDF_CLE__NANDF_CLE			187</div><div class='add'>+MX51_PAD_NANDF_CLE__PATA_RESET_B		188</div><div class='add'>+MX51_PAD_NANDF_WP_B__GPIO3_7			189</div><div class='add'>+MX51_PAD_NANDF_WP_B__NANDF_WP_B			190</div><div class='add'>+MX51_PAD_NANDF_WP_B__PATA_DMACK			191</div><div class='add'>+MX51_PAD_NANDF_WP_B__SD3_DATA2			192</div><div class='add'>+MX51_PAD_NANDF_RB0__ECSPI2_SS1			193</div><div class='add'>+MX51_PAD_NANDF_RB0__GPIO3_8			194</div><div class='add'>+MX51_PAD_NANDF_RB0__NANDF_RB0			195</div><div class='add'>+MX51_PAD_NANDF_RB0__PATA_DMARQ			196</div><div class='add'>+MX51_PAD_NANDF_RB0__SD3_DATA3			197</div><div class='add'>+MX51_PAD_NANDF_RB1__CSPI_MOSI			198</div><div class='add'>+MX51_PAD_NANDF_RB1__ECSPI2_RDY			199</div><div class='add'>+MX51_PAD_NANDF_RB1__GPIO3_9			200</div><div class='add'>+MX51_PAD_NANDF_RB1__NANDF_RB1			201</div><div class='add'>+MX51_PAD_NANDF_RB1__PATA_IORDY			202</div><div class='add'>+MX51_PAD_NANDF_RB1__SD4_CMD			203</div><div class='add'>+MX51_PAD_NANDF_RB2__DISP2_WAIT			204</div><div class='add'>+MX51_PAD_NANDF_RB2__ECSPI2_SCLK			205</div><div class='add'>+MX51_PAD_NANDF_RB2__FEC_COL			206</div><div class='add'>+MX51_PAD_NANDF_RB2__GPIO3_10			207</div><div class='add'>+MX51_PAD_NANDF_RB2__NANDF_RB2			208</div><div class='add'>+MX51_PAD_NANDF_RB2__USBH3_H3_DP			209</div><div class='add'>+MX51_PAD_NANDF_RB2__USBH3_NXT			210</div><div class='add'>+MX51_PAD_NANDF_RB3__DISP1_WAIT			211</div><div class='add'>+MX51_PAD_NANDF_RB3__ECSPI2_MISO			212</div><div class='add'>+MX51_PAD_NANDF_RB3__FEC_RX_CLK			213</div><div class='add'>+MX51_PAD_NANDF_RB3__GPIO3_11			214</div><div class='add'>+MX51_PAD_NANDF_RB3__NANDF_RB3			215</div><div class='add'>+MX51_PAD_NANDF_RB3__USBH3_CLK			216</div><div class='add'>+MX51_PAD_NANDF_RB3__USBH3_H3_DM			217</div><div class='add'>+MX51_PAD_GPIO_NAND__GPIO_NAND			218</div><div class='add'>+MX51_PAD_GPIO_NAND__PATA_INTRQ			219</div><div class='add'>+MX51_PAD_NANDF_CS0__GPIO3_16			220</div><div class='add'>+MX51_PAD_NANDF_CS0__NANDF_CS0			221</div><div class='add'>+MX51_PAD_NANDF_CS1__GPIO3_17			222</div><div class='add'>+MX51_PAD_NANDF_CS1__NANDF_CS1			223</div><div class='add'>+MX51_PAD_NANDF_CS2__CSPI_SCLK			224</div><div class='add'>+MX51_PAD_NANDF_CS2__FEC_TX_ER			225</div><div class='add'>+MX51_PAD_NANDF_CS2__GPIO3_18			226</div><div class='add'>+MX51_PAD_NANDF_CS2__NANDF_CS2			227</div><div class='add'>+MX51_PAD_NANDF_CS2__PATA_CS_0			228</div><div class='add'>+MX51_PAD_NANDF_CS2__SD4_CLK			229</div><div class='add'>+MX51_PAD_NANDF_CS2__USBH3_H1_DP			230</div><div class='add'>+MX51_PAD_NANDF_CS3__FEC_MDC			231</div><div class='add'>+MX51_PAD_NANDF_CS3__GPIO3_19			232</div><div class='add'>+MX51_PAD_NANDF_CS3__NANDF_CS3			233</div><div class='add'>+MX51_PAD_NANDF_CS3__PATA_CS_1			234</div><div class='add'>+MX51_PAD_NANDF_CS3__SD4_DAT0			235</div><div class='add'>+MX51_PAD_NANDF_CS3__USBH3_H1_DM			236</div><div class='add'>+MX51_PAD_NANDF_CS4__FEC_TDATA1			237</div><div class='add'>+MX51_PAD_NANDF_CS4__GPIO3_20			238</div><div class='add'>+MX51_PAD_NANDF_CS4__NANDF_CS4			239</div><div class='add'>+MX51_PAD_NANDF_CS4__PATA_DA_0			240</div><div class='add'>+MX51_PAD_NANDF_CS4__SD4_DAT1			241</div><div class='add'>+MX51_PAD_NANDF_CS4__USBH3_STP			242</div><div class='add'>+MX51_PAD_NANDF_CS5__FEC_TDATA2			243</div><div class='add'>+MX51_PAD_NANDF_CS5__GPIO3_21			244</div><div class='add'>+MX51_PAD_NANDF_CS5__NANDF_CS5			245</div><div class='add'>+MX51_PAD_NANDF_CS5__PATA_DA_1			246</div><div class='add'>+MX51_PAD_NANDF_CS5__SD4_DAT2			247</div><div class='add'>+MX51_PAD_NANDF_CS5__USBH3_DIR			248</div><div class='add'>+MX51_PAD_NANDF_CS6__CSPI_SS3			249</div><div class='add'>+MX51_PAD_NANDF_CS6__FEC_TDATA3			250</div><div class='add'>+MX51_PAD_NANDF_CS6__GPIO3_22			251</div><div class='add'>+MX51_PAD_NANDF_CS6__NANDF_CS6			252</div><div class='add'>+MX51_PAD_NANDF_CS6__PATA_DA_2			253</div><div class='add'>+MX51_PAD_NANDF_CS6__SD4_DAT3			254</div><div class='add'>+MX51_PAD_NANDF_CS7__FEC_TX_EN			255</div><div class='add'>+MX51_PAD_NANDF_CS7__GPIO3_23			256</div><div class='add'>+MX51_PAD_NANDF_CS7__NANDF_CS7			257</div><div class='add'>+MX51_PAD_NANDF_CS7__SD3_CLK			258</div><div class='add'>+MX51_PAD_NANDF_RDY_INT__ECSPI2_SS0		259</div><div class='add'>+MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK		260</div><div class='add'>+MX51_PAD_NANDF_RDY_INT__GPIO3_24		261</div><div class='add'>+MX51_PAD_NANDF_RDY_INT__NANDF_RDY_INT		262</div><div class='add'>+MX51_PAD_NANDF_RDY_INT__SD3_CMD			263</div><div class='add'>+MX51_PAD_NANDF_D15__ECSPI2_MOSI			264</div><div class='add'>+MX51_PAD_NANDF_D15__GPIO3_25			265</div><div class='add'>+MX51_PAD_NANDF_D15__NANDF_D15			266</div><div class='add'>+MX51_PAD_NANDF_D15__PATA_DATA15			267</div><div class='add'>+MX51_PAD_NANDF_D15__SD3_DAT7			268</div><div class='add'>+MX51_PAD_NANDF_D14__ECSPI2_SS3			269</div><div class='add'>+MX51_PAD_NANDF_D14__GPIO3_26			270</div><div class='add'>+MX51_PAD_NANDF_D14__NANDF_D14			271</div><div class='add'>+MX51_PAD_NANDF_D14__PATA_DATA14			272</div><div class='add'>+MX51_PAD_NANDF_D14__SD3_DAT6			273</div><div class='add'>+MX51_PAD_NANDF_D13__ECSPI2_SS2			274</div><div class='add'>+MX51_PAD_NANDF_D13__GPIO3_27			275</div><div class='add'>+MX51_PAD_NANDF_D13__NANDF_D13			276</div><div class='add'>+MX51_PAD_NANDF_D13__PATA_DATA13			277</div><div class='add'>+MX51_PAD_NANDF_D13__SD3_DAT5			278</div><div class='add'>+MX51_PAD_NANDF_D12__ECSPI2_SS1			279</div><div class='add'>+MX51_PAD_NANDF_D12__GPIO3_28			280</div><div class='add'>+MX51_PAD_NANDF_D12__NANDF_D12			281</div><div class='add'>+MX51_PAD_NANDF_D12__PATA_DATA12			282</div><div class='add'>+MX51_PAD_NANDF_D12__SD3_DAT4			283</div><div class='add'>+MX51_PAD_NANDF_D11__FEC_RX_DV			284</div><div class='add'>+MX51_PAD_NANDF_D11__GPIO3_29			285</div><div class='add'>+MX51_PAD_NANDF_D11__NANDF_D11			286</div><div class='add'>+MX51_PAD_NANDF_D11__PATA_DATA11			287</div><div class='add'>+MX51_PAD_NANDF_D11__SD3_DATA3			288</div><div class='add'>+MX51_PAD_NANDF_D10__GPIO3_30			289</div><div class='add'>+MX51_PAD_NANDF_D10__NANDF_D10			290</div><div class='add'>+MX51_PAD_NANDF_D10__PATA_DATA10			291</div><div class='add'>+MX51_PAD_NANDF_D10__SD3_DATA2			292</div><div class='add'>+MX51_PAD_NANDF_D9__FEC_RDATA0			293</div><div class='add'>+MX51_PAD_NANDF_D9__GPIO3_31			294</div><div class='add'>+MX51_PAD_NANDF_D9__NANDF_D9			295</div><div class='add'>+MX51_PAD_NANDF_D9__PATA_DATA9			296</div><div class='add'>+MX51_PAD_NANDF_D9__SD3_DATA1			297</div><div class='add'>+MX51_PAD_NANDF_D8__FEC_TDATA0			298</div><div class='add'>+MX51_PAD_NANDF_D8__GPIO4_0			299</div><div class='add'>+MX51_PAD_NANDF_D8__NANDF_D8			300</div><div class='add'>+MX51_PAD_NANDF_D8__PATA_DATA8			301</div><div class='add'>+MX51_PAD_NANDF_D8__SD3_DATA0			302</div><div class='add'>+MX51_PAD_NANDF_D7__GPIO4_1			303</div><div class='add'>+MX51_PAD_NANDF_D7__NANDF_D7			304</div><div class='add'>+MX51_PAD_NANDF_D7__PATA_DATA7			305</div><div class='add'>+MX51_PAD_NANDF_D7__USBH3_DATA0			306</div><div class='add'>+MX51_PAD_NANDF_D6__GPIO4_2			307</div><div class='add'>+MX51_PAD_NANDF_D6__NANDF_D6			308</div><div class='add'>+MX51_PAD_NANDF_D6__PATA_DATA6			309</div><div class='add'>+MX51_PAD_NANDF_D6__SD4_LCTL			310</div><div class='add'>+MX51_PAD_NANDF_D6__USBH3_DATA1			311</div><div class='add'>+MX51_PAD_NANDF_D5__GPIO4_3			312</div><div class='add'>+MX51_PAD_NANDF_D5__NANDF_D5			313</div><div class='add'>+MX51_PAD_NANDF_D5__PATA_DATA5			314</div><div class='add'>+MX51_PAD_NANDF_D5__SD4_WP			315</div><div class='add'>+MX51_PAD_NANDF_D5__USBH3_DATA2			316</div><div class='add'>+MX51_PAD_NANDF_D4__GPIO4_4			317</div><div class='add'>+MX51_PAD_NANDF_D4__NANDF_D4			318</div><div class='add'>+MX51_PAD_NANDF_D4__PATA_DATA4			319</div><div class='add'>+MX51_PAD_NANDF_D4__SD4_CD			320</div><div class='add'>+MX51_PAD_NANDF_D4__USBH3_DATA3			321</div><div class='add'>+MX51_PAD_NANDF_D3__GPIO4_5			322</div><div class='add'>+MX51_PAD_NANDF_D3__NANDF_D3			323</div><div class='add'>+MX51_PAD_NANDF_D3__PATA_DATA3			324</div><div class='add'>+MX51_PAD_NANDF_D3__SD4_DAT4			325</div><div class='add'>+MX51_PAD_NANDF_D3__USBH3_DATA4			326</div><div class='add'>+MX51_PAD_NANDF_D2__GPIO4_6			327</div><div class='add'>+MX51_PAD_NANDF_D2__NANDF_D2			328</div><div class='add'>+MX51_PAD_NANDF_D2__PATA_DATA2			329</div><div class='add'>+MX51_PAD_NANDF_D2__SD4_DAT5			330</div><div class='add'>+MX51_PAD_NANDF_D2__USBH3_DATA5			331</div><div class='add'>+MX51_PAD_NANDF_D1__GPIO4_7			332</div><div class='add'>+MX51_PAD_NANDF_D1__NANDF_D1			333</div><div class='add'>+MX51_PAD_NANDF_D1__PATA_DATA1			334</div><div class='add'>+MX51_PAD_NANDF_D1__SD4_DAT6			335</div><div class='add'>+MX51_PAD_NANDF_D1__USBH3_DATA6			336</div><div class='add'>+MX51_PAD_NANDF_D0__GPIO4_8			337</div><div class='add'>+MX51_PAD_NANDF_D0__NANDF_D0			338</div><div class='add'>+MX51_PAD_NANDF_D0__PATA_DATA0			339</div><div class='add'>+MX51_PAD_NANDF_D0__SD4_DAT7			340</div><div class='add'>+MX51_PAD_NANDF_D0__USBH3_DATA7			341</div><div class='add'>+MX51_PAD_CSI1_D8__CSI1_D8			342</div><div class='add'>+MX51_PAD_CSI1_D8__GPIO3_12			343</div><div class='add'>+MX51_PAD_CSI1_D9__CSI1_D9			344</div><div class='add'>+MX51_PAD_CSI1_D9__GPIO3_13			345</div><div class='add'>+MX51_PAD_CSI1_D10__CSI1_D10			346</div><div class='add'>+MX51_PAD_CSI1_D11__CSI1_D11			347</div><div class='add'>+MX51_PAD_CSI1_D12__CSI1_D12			348</div><div class='add'>+MX51_PAD_CSI1_D13__CSI1_D13			349</div><div class='add'>+MX51_PAD_CSI1_D14__CSI1_D14			350</div><div class='add'>+MX51_PAD_CSI1_D15__CSI1_D15			351</div><div class='add'>+MX51_PAD_CSI1_D16__CSI1_D16			352</div><div class='add'>+MX51_PAD_CSI1_D17__CSI1_D17			353</div><div class='add'>+MX51_PAD_CSI1_D18__CSI1_D18			354</div><div class='add'>+MX51_PAD_CSI1_D19__CSI1_D19			355</div><div class='add'>+MX51_PAD_CSI1_VSYNC__CSI1_VSYNC			356</div><div class='add'>+MX51_PAD_CSI1_VSYNC__GPIO3_14			357</div><div class='add'>+MX51_PAD_CSI1_HSYNC__CSI1_HSYNC			358</div><div class='add'>+MX51_PAD_CSI1_HSYNC__GPIO3_15			359</div><div class='add'>+MX51_PAD_CSI1_PIXCLK__CSI1_PIXCLK		360</div><div class='add'>+MX51_PAD_CSI1_MCLK__CSI1_MCLK			361</div><div class='add'>+MX51_PAD_CSI2_D12__CSI2_D12			362</div><div class='add'>+MX51_PAD_CSI2_D12__GPIO4_9			363</div><div class='add'>+MX51_PAD_CSI2_D13__CSI2_D13			364</div><div class='add'>+MX51_PAD_CSI2_D13__GPIO4_10			365</div><div class='add'>+MX51_PAD_CSI2_D14__CSI2_D14			366</div><div class='add'>+MX51_PAD_CSI2_D15__CSI2_D15			367</div><div class='add'>+MX51_PAD_CSI2_D16__CSI2_D16			368</div><div class='add'>+MX51_PAD_CSI2_D17__CSI2_D17			369</div><div class='add'>+MX51_PAD_CSI2_D18__CSI2_D18			370</div><div class='add'>+MX51_PAD_CSI2_D18__GPIO4_11			371</div><div class='add'>+MX51_PAD_CSI2_D19__CSI2_D19			372</div><div class='add'>+MX51_PAD_CSI2_D19__GPIO4_12			373</div><div class='add'>+MX51_PAD_CSI2_VSYNC__CSI2_VSYNC			374</div><div class='add'>+MX51_PAD_CSI2_VSYNC__GPIO4_13			375</div><div class='add'>+MX51_PAD_CSI2_HSYNC__CSI2_HSYNC			376</div><div class='add'>+MX51_PAD_CSI2_HSYNC__GPIO4_14			377</div><div class='add'>+MX51_PAD_CSI2_PIXCLK__CSI2_PIXCLK		378</div><div class='add'>+MX51_PAD_CSI2_PIXCLK__GPIO4_15			379</div><div class='add'>+MX51_PAD_I2C1_CLK__GPIO4_16			380</div><div class='add'>+MX51_PAD_I2C1_CLK__I2C1_CLK			381</div><div class='add'>+MX51_PAD_I2C1_DAT__GPIO4_17			382</div><div class='add'>+MX51_PAD_I2C1_DAT__I2C1_DAT			383</div><div class='add'>+MX51_PAD_AUD3_BB_TXD__AUD3_TXD			384</div><div class='add'>+MX51_PAD_AUD3_BB_TXD__GPIO4_18			385</div><div class='add'>+MX51_PAD_AUD3_BB_RXD__AUD3_RXD			386</div><div class='add'>+MX51_PAD_AUD3_BB_RXD__GPIO4_19			387</div><div class='add'>+MX51_PAD_AUD3_BB_RXD__UART3_RXD			388</div><div class='add'>+MX51_PAD_AUD3_BB_CK__AUD3_TXC			389</div><div class='add'>+MX51_PAD_AUD3_BB_CK__GPIO4_20			390</div><div class='add'>+MX51_PAD_AUD3_BB_FS__AUD3_TXFS			391</div><div class='add'>+MX51_PAD_AUD3_BB_FS__GPIO4_21			392</div><div class='add'>+MX51_PAD_AUD3_BB_FS__UART3_TXD			393</div><div class='add'>+MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI		394</div><div class='add'>+MX51_PAD_CSPI1_MOSI__GPIO4_22			395</div><div class='add'>+MX51_PAD_CSPI1_MOSI__I2C1_SDA			396</div><div class='add'>+MX51_PAD_CSPI1_MISO__AUD4_RXD			397</div><div class='add'>+MX51_PAD_CSPI1_MISO__ECSPI1_MISO		398</div><div class='add'>+MX51_PAD_CSPI1_MISO__GPIO4_23			399</div><div class='add'>+MX51_PAD_CSPI1_SS0__AUD4_TXC			400</div><div class='add'>+MX51_PAD_CSPI1_SS0__ECSPI1_SS0			401</div><div class='add'>+MX51_PAD_CSPI1_SS0__GPIO4_24			402</div><div class='add'>+MX51_PAD_CSPI1_SS1__AUD4_TXD			403</div><div class='add'>+MX51_PAD_CSPI1_SS1__ECSPI1_SS1			404</div><div class='add'>+MX51_PAD_CSPI1_SS1__GPIO4_25			405</div><div class='add'>+MX51_PAD_CSPI1_RDY__AUD4_TXFS			406</div><div class='add'>+MX51_PAD_CSPI1_RDY__ECSPI1_RDY			407</div><div class='add'>+MX51_PAD_CSPI1_RDY__GPIO4_26			408</div><div class='add'>+MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK		409</div><div class='add'>+MX51_PAD_CSPI1_SCLK__GPIO4_27			410</div><div class='add'>+MX51_PAD_CSPI1_SCLK__I2C1_SCL			411</div><div class='add'>+MX51_PAD_UART1_RXD__GPIO4_28			412</div><div class='add'>+MX51_PAD_UART1_RXD__UART1_RXD			413</div><div class='add'>+MX51_PAD_UART1_TXD__GPIO4_29			414</div><div class='add'>+MX51_PAD_UART1_TXD__PWM2_PWMO			415</div><div class='add'>+MX51_PAD_UART1_TXD__UART1_TXD			416</div><div class='add'>+MX51_PAD_UART1_RTS__GPIO4_30			417</div><div class='add'>+MX51_PAD_UART1_RTS__UART1_RTS			418</div><div class='add'>+MX51_PAD_UART1_CTS__GPIO4_31			419</div><div class='add'>+MX51_PAD_UART1_CTS__UART1_CTS			420</div><div class='add'>+MX51_PAD_UART2_RXD__FIRI_TXD			421</div><div class='add'>+MX51_PAD_UART2_RXD__GPIO1_20			422</div><div class='add'>+MX51_PAD_UART2_RXD__UART2_RXD			423</div><div class='add'>+MX51_PAD_UART2_TXD__FIRI_RXD			424</div><div class='add'>+MX51_PAD_UART2_TXD__GPIO1_21			425</div><div class='add'>+MX51_PAD_UART2_TXD__UART2_TXD			426</div><div class='add'>+MX51_PAD_UART3_RXD__CSI1_D0			427</div><div class='add'>+MX51_PAD_UART3_RXD__GPIO1_22			428</div><div class='add'>+MX51_PAD_UART3_RXD__UART1_DTR			429</div><div class='add'>+MX51_PAD_UART3_RXD__UART3_RXD			430</div><div class='add'>+MX51_PAD_UART3_TXD__CSI1_D1			431</div><div class='add'>+MX51_PAD_UART3_TXD__GPIO1_23			432</div><div class='add'>+MX51_PAD_UART3_TXD__UART1_DSR			433</div><div class='add'>+MX51_PAD_UART3_TXD__UART3_TXD			434</div><div class='add'>+MX51_PAD_OWIRE_LINE__GPIO1_24			435</div><div class='add'>+MX51_PAD_OWIRE_LINE__OWIRE_LINE			436</div><div class='add'>+MX51_PAD_OWIRE_LINE__SPDIF_OUT			437</div><div class='add'>+MX51_PAD_KEY_ROW0__KEY_ROW0			438</div><div class='add'>+MX51_PAD_KEY_ROW1__KEY_ROW1			439</div><div class='add'>+MX51_PAD_KEY_ROW2__KEY_ROW2			440</div><div class='add'>+MX51_PAD_KEY_ROW3__KEY_ROW3			441</div><div class='add'>+MX51_PAD_KEY_COL0__KEY_COL0			442</div><div class='add'>+MX51_PAD_KEY_COL0__PLL1_BYP			443</div><div class='add'>+MX51_PAD_KEY_COL1__KEY_COL1			444</div><div class='add'>+MX51_PAD_KEY_COL1__PLL2_BYP			445</div><div class='add'>+MX51_PAD_KEY_COL2__KEY_COL2			446</div><div class='add'>+MX51_PAD_KEY_COL2__PLL3_BYP			447</div><div class='add'>+MX51_PAD_KEY_COL3__KEY_COL3			448</div><div class='add'>+MX51_PAD_KEY_COL4__I2C2_SCL			449</div><div class='add'>+MX51_PAD_KEY_COL4__KEY_COL4			450</div><div class='add'>+MX51_PAD_KEY_COL4__SPDIF_OUT1			451</div><div class='add'>+MX51_PAD_KEY_COL4__UART1_RI			452</div><div class='add'>+MX51_PAD_KEY_COL4__UART3_RTS			453</div><div class='add'>+MX51_PAD_KEY_COL5__I2C2_SDA			454</div><div class='add'>+MX51_PAD_KEY_COL5__KEY_COL5			455</div><div class='add'>+MX51_PAD_KEY_COL5__UART1_DCD			456</div><div class='add'>+MX51_PAD_KEY_COL5__UART3_CTS			457</div><div class='add'>+MX51_PAD_USBH1_CLK__CSPI_SCLK			458</div><div class='add'>+MX51_PAD_USBH1_CLK__GPIO1_25			459</div><div class='add'>+MX51_PAD_USBH1_CLK__I2C2_SCL			460</div><div class='add'>+MX51_PAD_USBH1_CLK__USBH1_CLK			461</div><div class='add'>+MX51_PAD_USBH1_DIR__CSPI_MOSI			462</div><div class='add'>+MX51_PAD_USBH1_DIR__GPIO1_26			463</div><div class='add'>+MX51_PAD_USBH1_DIR__I2C2_SDA			464</div><div class='add'>+MX51_PAD_USBH1_DIR__USBH1_DIR			465</div><div class='add'>+MX51_PAD_USBH1_STP__CSPI_RDY			466</div><div class='add'>+MX51_PAD_USBH1_STP__GPIO1_27			467</div><div class='add'>+MX51_PAD_USBH1_STP__UART3_RXD			468</div><div class='add'>+MX51_PAD_USBH1_STP__USBH1_STP			469</div><div class='add'>+MX51_PAD_USBH1_NXT__CSPI_MISO			470</div><div class='add'>+MX51_PAD_USBH1_NXT__GPIO1_28			471</div><div class='add'>+MX51_PAD_USBH1_NXT__UART3_TXD			472</div><div class='add'>+MX51_PAD_USBH1_NXT__USBH1_NXT			473</div><div class='add'>+MX51_PAD_USBH1_DATA0__GPIO1_11			474</div><div class='add'>+MX51_PAD_USBH1_DATA0__UART2_CTS			475</div><div class='add'>+MX51_PAD_USBH1_DATA0__USBH1_DATA0		476</div><div class='add'>+MX51_PAD_USBH1_DATA1__GPIO1_12			477</div><div class='add'>+MX51_PAD_USBH1_DATA1__UART2_RXD			478</div><div class='add'>+MX51_PAD_USBH1_DATA1__USBH1_DATA1		479</div><div class='add'>+MX51_PAD_USBH1_DATA2__GPIO1_13			480</div><div class='add'>+MX51_PAD_USBH1_DATA2__UART2_TXD			481</div><div class='add'>+MX51_PAD_USBH1_DATA2__USBH1_DATA2		482</div><div class='add'>+MX51_PAD_USBH1_DATA3__GPIO1_14			483</div><div class='add'>+MX51_PAD_USBH1_DATA3__UART2_RTS			484</div><div class='add'>+MX51_PAD_USBH1_DATA3__USBH1_DATA3		485</div><div class='add'>+MX51_PAD_USBH1_DATA4__CSPI_SS0			486</div><div class='add'>+MX51_PAD_USBH1_DATA4__GPIO1_15			487</div><div class='add'>+MX51_PAD_USBH1_DATA4__USBH1_DATA4		488</div><div class='add'>+MX51_PAD_USBH1_DATA5__CSPI_SS1			489</div><div class='add'>+MX51_PAD_USBH1_DATA5__GPIO1_16			490</div><div class='add'>+MX51_PAD_USBH1_DATA5__USBH1_DATA5		491</div><div class='add'>+MX51_PAD_USBH1_DATA6__CSPI_SS3			492</div><div class='add'>+MX51_PAD_USBH1_DATA6__GPIO1_17			493</div><div class='add'>+MX51_PAD_USBH1_DATA6__USBH1_DATA6		494</div><div class='add'>+MX51_PAD_USBH1_DATA7__ECSPI1_SS3		495</div><div class='add'>+MX51_PAD_USBH1_DATA7__ECSPI2_SS3		496</div><div class='add'>+MX51_PAD_USBH1_DATA7__GPIO1_18			497</div><div class='add'>+MX51_PAD_USBH1_DATA7__USBH1_DATA7		498</div><div class='add'>+MX51_PAD_DI1_PIN11__DI1_PIN11			499</div><div class='add'>+MX51_PAD_DI1_PIN11__ECSPI1_SS2			500</div><div class='add'>+MX51_PAD_DI1_PIN11__GPIO3_0			501</div><div class='add'>+MX51_PAD_DI1_PIN12__DI1_PIN12			502</div><div class='add'>+MX51_PAD_DI1_PIN12__GPIO3_1			503</div><div class='add'>+MX51_PAD_DI1_PIN13__DI1_PIN13			504</div><div class='add'>+MX51_PAD_DI1_PIN13__GPIO3_2			505</div><div class='add'>+MX51_PAD_DI1_D0_CS__DI1_D0_CS			506</div><div class='add'>+MX51_PAD_DI1_D0_CS__GPIO3_3			507</div><div class='add'>+MX51_PAD_DI1_D1_CS__DI1_D1_CS			508</div><div class='add'>+MX51_PAD_DI1_D1_CS__DISP1_PIN14			509</div><div class='add'>+MX51_PAD_DI1_D1_CS__DISP1_PIN5			510</div><div class='add'>+MX51_PAD_DI1_D1_CS__GPIO3_4			511</div><div class='add'>+MX51_PAD_DISPB2_SER_DIN__DISP1_PIN1		512</div><div class='add'>+MX51_PAD_DISPB2_SER_DIN__DISPB2_SER_DIN		513</div><div class='add'>+MX51_PAD_DISPB2_SER_DIN__GPIO3_5		514</div><div class='add'>+MX51_PAD_DISPB2_SER_DIO__DISP1_PIN6		515</div><div class='add'>+MX51_PAD_DISPB2_SER_DIO__DISPB2_SER_DIO		516</div><div class='add'>+MX51_PAD_DISPB2_SER_DIO__GPIO3_6		517</div><div class='add'>+MX51_PAD_DISPB2_SER_CLK__DISP1_PIN17		518</div><div class='add'>+MX51_PAD_DISPB2_SER_CLK__DISP1_PIN7		519</div><div class='add'>+MX51_PAD_DISPB2_SER_CLK__DISPB2_SER_CLK		520</div><div class='add'>+MX51_PAD_DISPB2_SER_CLK__GPIO3_7		521</div><div class='add'>+MX51_PAD_DISPB2_SER_RS__DISP1_EXT_CLK		522</div><div class='add'>+MX51_PAD_DISPB2_SER_RS__DISP1_PIN16		523</div><div class='add'>+MX51_PAD_DISPB2_SER_RS__DISP1_PIN8		524</div><div class='add'>+MX51_PAD_DISPB2_SER_RS__DISPB2_SER_RS		525</div><div class='add'>+MX51_PAD_DISPB2_SER_RS__DISPB2_SER_RS		526</div><div class='add'>+MX51_PAD_DISPB2_SER_RS__GPIO3_8			527</div><div class='add'>+MX51_PAD_DISP1_DAT0__DISP1_DAT0			528</div><div class='add'>+MX51_PAD_DISP1_DAT1__DISP1_DAT1			529</div><div class='add'>+MX51_PAD_DISP1_DAT2__DISP1_DAT2			530</div><div class='add'>+MX51_PAD_DISP1_DAT3__DISP1_DAT3			531</div><div class='add'>+MX51_PAD_DISP1_DAT4__DISP1_DAT4			532</div><div class='add'>+MX51_PAD_DISP1_DAT5__DISP1_DAT5			533</div><div class='add'>+MX51_PAD_DISP1_DAT6__BOOT_USB_SRC		534</div><div class='add'>+MX51_PAD_DISP1_DAT6__DISP1_DAT6			535</div><div class='add'>+MX51_PAD_DISP1_DAT7__BOOT_EEPROM_CFG		536</div><div class='add'>+MX51_PAD_DISP1_DAT7__DISP1_DAT7			537</div><div class='add'>+MX51_PAD_DISP1_DAT8__BOOT_SRC0			538</div><div class='add'>+MX51_PAD_DISP1_DAT8__DISP1_DAT8			539</div><div class='add'>+MX51_PAD_DISP1_DAT9__BOOT_SRC1			540</div><div class='add'>+MX51_PAD_DISP1_DAT9__DISP1_DAT9			541</div><div class='add'>+MX51_PAD_DISP1_DAT10__BOOT_SPARE_SIZE		542</div><div class='add'>+MX51_PAD_DISP1_DAT10__DISP1_DAT10		543</div><div class='add'>+MX51_PAD_DISP1_DAT11__BOOT_LPB_FREQ2		544</div><div class='add'>+MX51_PAD_DISP1_DAT11__DISP1_DAT11		545</div><div class='add'>+MX51_PAD_DISP1_DAT12__BOOT_MLC_SEL		546</div><div class='add'>+MX51_PAD_DISP1_DAT12__DISP1_DAT12		547</div><div class='add'>+MX51_PAD_DISP1_DAT13__BOOT_MEM_CTL0		548</div><div class='add'>+MX51_PAD_DISP1_DAT13__DISP1_DAT13		549</div><div class='add'>+MX51_PAD_DISP1_DAT14__BOOT_MEM_CTL1		550</div><div class='add'>+MX51_PAD_DISP1_DAT14__DISP1_DAT14		551</div><div class='add'>+MX51_PAD_DISP1_DAT15__BOOT_BUS_WIDTH		552</div><div class='add'>+MX51_PAD_DISP1_DAT15__DISP1_DAT15		553</div><div class='add'>+MX51_PAD_DISP1_DAT16__BOOT_PAGE_SIZE0		554</div><div class='add'>+MX51_PAD_DISP1_DAT16__DISP1_DAT16		555</div><div class='add'>+MX51_PAD_DISP1_DAT17__BOOT_PAGE_SIZE1		556</div><div class='add'>+MX51_PAD_DISP1_DAT17__DISP1_DAT17		557</div><div class='add'>+MX51_PAD_DISP1_DAT18__BOOT_WEIM_MUXED0		558</div><div class='add'>+MX51_PAD_DISP1_DAT18__DISP1_DAT18		559</div><div class='add'>+MX51_PAD_DISP1_DAT18__DISP2_PIN11		560</div><div class='add'>+MX51_PAD_DISP1_DAT18__DISP2_PIN5		561</div><div class='add'>+MX51_PAD_DISP1_DAT19__BOOT_WEIM_MUXED1		562</div><div class='add'>+MX51_PAD_DISP1_DAT19__DISP1_DAT19		563</div><div class='add'>+MX51_PAD_DISP1_DAT19__DISP2_PIN12		564</div><div class='add'>+MX51_PAD_DISP1_DAT19__DISP2_PIN6		565</div><div class='add'>+MX51_PAD_DISP1_DAT20__BOOT_MEM_TYPE0		566</div><div class='add'>+MX51_PAD_DISP1_DAT20__DISP1_DAT20		567</div><div class='add'>+MX51_PAD_DISP1_DAT20__DISP2_PIN13		568</div><div class='add'>+MX51_PAD_DISP1_DAT20__DISP2_PIN7		569</div><div class='add'>+MX51_PAD_DISP1_DAT21__BOOT_MEM_TYPE1		570</div><div class='add'>+MX51_PAD_DISP1_DAT21__DISP1_DAT21		571</div><div class='add'>+MX51_PAD_DISP1_DAT21__DISP2_PIN14		572</div><div class='add'>+MX51_PAD_DISP1_DAT21__DISP2_PIN8		573</div><div class='add'>+MX51_PAD_DISP1_DAT22__BOOT_LPB_FREQ0		574</div><div class='add'>+MX51_PAD_DISP1_DAT22__DISP1_DAT22		575</div><div class='add'>+MX51_PAD_DISP1_DAT22__DISP2_D0_CS		576</div><div class='add'>+MX51_PAD_DISP1_DAT22__DISP2_DAT16		577</div><div class='add'>+MX51_PAD_DISP1_DAT23__BOOT_LPB_FREQ1		578</div><div class='add'>+MX51_PAD_DISP1_DAT23__DISP1_DAT23		579</div><div class='add'>+MX51_PAD_DISP1_DAT23__DISP2_D1_CS		580</div><div class='add'>+MX51_PAD_DISP1_DAT23__DISP2_DAT17		581</div><div class='add'>+MX51_PAD_DISP1_DAT23__DISP2_SER_CS		582</div><div class='add'>+MX51_PAD_DI1_PIN3__DI1_PIN3			583</div><div class='add'>+MX51_PAD_DI1_PIN2__DI1_PIN2			584</div><div class='add'>+MX51_PAD_DI_GP2__DISP1_SER_CLK			585</div><div class='add'>+MX51_PAD_DI_GP2__DISP2_WAIT			586</div><div class='add'>+MX51_PAD_DI_GP3__CSI1_DATA_EN			587</div><div class='add'>+MX51_PAD_DI_GP3__DISP1_SER_DIO			588</div><div class='add'>+MX51_PAD_DI_GP3__FEC_TX_ER			589</div><div class='add'>+MX51_PAD_DI2_PIN4__CSI2_DATA_EN			590</div><div class='add'>+MX51_PAD_DI2_PIN4__DI2_PIN4			591</div><div class='add'>+MX51_PAD_DI2_PIN4__FEC_CRS			592</div><div class='add'>+MX51_PAD_DI2_PIN2__DI2_PIN2			593</div><div class='add'>+MX51_PAD_DI2_PIN2__FEC_MDC			594</div><div class='add'>+MX51_PAD_DI2_PIN3__DI2_PIN3			595</div><div class='add'>+MX51_PAD_DI2_PIN3__FEC_MDIO			596</div><div class='add'>+MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK		597</div><div class='add'>+MX51_PAD_DI2_DISP_CLK__FEC_RDATA1		598</div><div class='add'>+MX51_PAD_DI_GP4__DI2_PIN15			599</div><div class='add'>+MX51_PAD_DI_GP4__DISP1_SER_DIN			600</div><div class='add'>+MX51_PAD_DI_GP4__DISP2_PIN1			601</div><div class='add'>+MX51_PAD_DI_GP4__FEC_RDATA2			602</div><div class='add'>+MX51_PAD_DISP2_DAT0__DISP2_DAT0			603</div><div class='add'>+MX51_PAD_DISP2_DAT0__FEC_RDATA3			604</div><div class='add'>+MX51_PAD_DISP2_DAT0__KEY_COL6			605</div><div class='add'>+MX51_PAD_DISP2_DAT0__UART3_RXD			606</div><div class='add'>+MX51_PAD_DISP2_DAT0__USBH3_CLK			607</div><div class='add'>+MX51_PAD_DISP2_DAT1__DISP2_DAT1			608</div><div class='add'>+MX51_PAD_DISP2_DAT1__FEC_RX_ER			609</div><div class='add'>+MX51_PAD_DISP2_DAT1__KEY_COL7			610</div><div class='add'>+MX51_PAD_DISP2_DAT1__UART3_TXD			611</div><div class='add'>+MX51_PAD_DISP2_DAT1__USBH3_DIR			612</div><div class='add'>+MX51_PAD_DISP2_DAT2__DISP2_DAT2			613</div><div class='add'>+MX51_PAD_DISP2_DAT3__DISP2_DAT3			614</div><div class='add'>+MX51_PAD_DISP2_DAT4__DISP2_DAT4			615</div><div class='add'>+MX51_PAD_DISP2_DAT5__DISP2_DAT5			616</div><div class='add'>+MX51_PAD_DISP2_DAT6__DISP2_DAT6			617</div><div class='add'>+MX51_PAD_DISP2_DAT6__FEC_TDATA1			618</div><div class='add'>+MX51_PAD_DISP2_DAT6__GPIO1_19			619</div><div class='add'>+MX51_PAD_DISP2_DAT6__KEY_ROW4			620</div><div class='add'>+MX51_PAD_DISP2_DAT6__USBH3_STP			621</div><div class='add'>+MX51_PAD_DISP2_DAT7__DISP2_DAT7			622</div><div class='add'>+MX51_PAD_DISP2_DAT7__FEC_TDATA2			623</div><div class='add'>+MX51_PAD_DISP2_DAT7__GPIO1_29			624</div><div class='add'>+MX51_PAD_DISP2_DAT7__KEY_ROW5			625</div><div class='add'>+MX51_PAD_DISP2_DAT7__USBH3_NXT			626</div><div class='add'>+MX51_PAD_DISP2_DAT8__DISP2_DAT8			627</div><div class='add'>+MX51_PAD_DISP2_DAT8__FEC_TDATA3			628</div><div class='add'>+MX51_PAD_DISP2_DAT8__GPIO1_30			629</div><div class='add'>+MX51_PAD_DISP2_DAT8__KEY_ROW6			630</div><div class='add'>+MX51_PAD_DISP2_DAT8__USBH3_DATA0		631</div><div class='add'>+MX51_PAD_DISP2_DAT9__AUD6_RXC			632</div><div class='add'>+MX51_PAD_DISP2_DAT9__DISP2_DAT9			633</div><div class='add'>+MX51_PAD_DISP2_DAT9__FEC_TX_EN			634</div><div class='add'>+MX51_PAD_DISP2_DAT9__GPIO1_31			635</div><div class='add'>+MX51_PAD_DISP2_DAT9__USBH3_DATA1		636</div><div class='add'>+MX51_PAD_DISP2_DAT10__DISP2_DAT10		637</div><div class='add'>+MX51_PAD_DISP2_DAT10__DISP2_SER_CS		638</div><div class='add'>+MX51_PAD_DISP2_DAT10__FEC_COL			639</div><div class='add'>+MX51_PAD_DISP2_DAT10__KEY_ROW7			640</div><div class='add'>+MX51_PAD_DISP2_DAT10__USBH3_DATA2		641</div><div class='add'>+MX51_PAD_DISP2_DAT11__AUD6_TXD			642</div><div class='add'>+MX51_PAD_DISP2_DAT11__DISP2_DAT11		643</div><div class='add'>+MX51_PAD_DISP2_DAT11__FEC_RX_CLK		644</div><div class='add'>+MX51_PAD_DISP2_DAT11__GPIO1_10			645</div><div class='add'>+MX51_PAD_DISP2_DAT11__USBH3_DATA3		646</div><div class='add'>+MX51_PAD_DISP2_DAT12__AUD6_RXD			647</div><div class='add'>+MX51_PAD_DISP2_DAT12__DISP2_DAT12		648</div><div class='add'>+MX51_PAD_DISP2_DAT12__FEC_RX_DV			649</div><div class='add'>+MX51_PAD_DISP2_DAT12__USBH3_DATA4		650</div><div class='add'>+MX51_PAD_DISP2_DAT13__AUD6_TXC			651</div><div class='add'>+MX51_PAD_DISP2_DAT13__DISP2_DAT13		652</div><div class='add'>+MX51_PAD_DISP2_DAT13__FEC_TX_CLK		653</div><div class='add'>+MX51_PAD_DISP2_DAT13__USBH3_DATA5		654</div><div class='add'>+MX51_PAD_DISP2_DAT14__AUD6_TXFS			655</div><div class='add'>+MX51_PAD_DISP2_DAT14__DISP2_DAT14		656</div><div class='add'>+MX51_PAD_DISP2_DAT14__FEC_RDATA0		657</div><div class='add'>+MX51_PAD_DISP2_DAT14__USBH3_DATA6		658</div><div class='add'>+MX51_PAD_DISP2_DAT15__AUD6_RXFS			659</div><div class='add'>+MX51_PAD_DISP2_DAT15__DISP1_SER_CS		660</div><div class='add'>+MX51_PAD_DISP2_DAT15__DISP2_DAT15		661</div><div class='add'>+MX51_PAD_DISP2_DAT15__FEC_TDATA0		662</div><div class='add'>+MX51_PAD_DISP2_DAT15__USBH3_DATA7		663</div><div class='add'>+MX51_PAD_SD1_CMD__AUD5_RXFS			664</div><div class='add'>+MX51_PAD_SD1_CMD__CSPI_MOSI			665</div><div class='add'>+MX51_PAD_SD1_CMD__SD1_CMD			666</div><div class='add'>+MX51_PAD_SD1_CLK__AUD5_RXC			667</div><div class='add'>+MX51_PAD_SD1_CLK__CSPI_SCLK			668</div><div class='add'>+MX51_PAD_SD1_CLK__SD1_CLK			669</div><div class='add'>+MX51_PAD_SD1_DATA0__AUD5_TXD			670</div><div class='add'>+MX51_PAD_SD1_DATA0__CSPI_MISO			671</div><div class='add'>+MX51_PAD_SD1_DATA0__SD1_DATA0			672</div><div class='add'>+MX51_PAD_EIM_DA0__EIM_DA0			673</div><div class='add'>+MX51_PAD_EIM_DA1__EIM_DA1			674</div><div class='add'>+MX51_PAD_EIM_DA2__EIM_DA2			675</div><div class='add'>+MX51_PAD_EIM_DA3__EIM_DA3			676</div><div class='add'>+MX51_PAD_SD1_DATA1__AUD5_RXD			677</div><div class='add'>+MX51_PAD_SD1_DATA1__SD1_DATA1			678</div><div class='add'>+MX51_PAD_EIM_DA4__EIM_DA4			679</div><div class='add'>+MX51_PAD_EIM_DA5__EIM_DA5			680</div><div class='add'>+MX51_PAD_EIM_DA6__EIM_DA6			681</div><div class='add'>+MX51_PAD_EIM_DA7__EIM_DA7			682</div><div class='add'>+MX51_PAD_SD1_DATA2__AUD5_TXC			683</div><div class='add'>+MX51_PAD_SD1_DATA2__SD1_DATA2			684</div><div class='add'>+MX51_PAD_EIM_DA10__EIM_DA10			685</div><div class='add'>+MX51_PAD_EIM_DA11__EIM_DA11			686</div><div class='add'>+MX51_PAD_EIM_DA8__EIM_DA8			687</div><div class='add'>+MX51_PAD_EIM_DA9__EIM_DA9			688</div><div class='add'>+MX51_PAD_SD1_DATA3__AUD5_TXFS			689</div><div class='add'>+MX51_PAD_SD1_DATA3__CSPI_SS1			690</div><div class='add'>+MX51_PAD_SD1_DATA3__SD1_DATA3			691</div><div class='add'>+MX51_PAD_GPIO1_0__CSPI_SS2			692</div><div class='add'>+MX51_PAD_GPIO1_0__GPIO1_0			693</div><div class='add'>+MX51_PAD_GPIO1_0__SD1_CD			694</div><div class='add'>+MX51_PAD_GPIO1_1__CSPI_MISO			695</div><div class='add'>+MX51_PAD_GPIO1_1__GPIO1_1			696</div><div class='add'>+MX51_PAD_GPIO1_1__SD1_WP			697</div><div class='add'>+MX51_PAD_EIM_DA12__EIM_DA12			698</div><div class='add'>+MX51_PAD_EIM_DA13__EIM_DA13			699</div><div class='add'>+MX51_PAD_EIM_DA14__EIM_DA14			700</div><div class='add'>+MX51_PAD_EIM_DA15__EIM_DA15			701</div><div class='add'>+MX51_PAD_SD2_CMD__CSPI_MOSI			702</div><div class='add'>+MX51_PAD_SD2_CMD__I2C1_SCL			703</div><div class='add'>+MX51_PAD_SD2_CMD__SD2_CMD			704</div><div class='add'>+MX51_PAD_SD2_CLK__CSPI_SCLK			705</div><div class='add'>+MX51_PAD_SD2_CLK__I2C1_SDA			706</div><div class='add'>+MX51_PAD_SD2_CLK__SD2_CLK			707</div><div class='add'>+MX51_PAD_SD2_DATA0__CSPI_MISO			708</div><div class='add'>+MX51_PAD_SD2_DATA0__SD1_DAT4			709</div><div class='add'>+MX51_PAD_SD2_DATA0__SD2_DATA0			710</div><div class='add'>+MX51_PAD_SD2_DATA1__SD1_DAT5			711</div><div class='add'>+MX51_PAD_SD2_DATA1__SD2_DATA1			712</div><div class='add'>+MX51_PAD_SD2_DATA1__USBH3_H2_DP			713</div><div class='add'>+MX51_PAD_SD2_DATA2__SD1_DAT6			714</div><div class='add'>+MX51_PAD_SD2_DATA2__SD2_DATA2			715</div><div class='add'>+MX51_PAD_SD2_DATA2__USBH3_H2_DM			716</div><div class='add'>+MX51_PAD_SD2_DATA3__CSPI_SS2			717</div><div class='add'>+MX51_PAD_SD2_DATA3__SD1_DAT7			718</div><div class='add'>+MX51_PAD_SD2_DATA3__SD2_DATA3			719</div><div class='add'>+MX51_PAD_GPIO1_2__CCM_OUT_2			720</div><div class='add'>+MX51_PAD_GPIO1_2__GPIO1_2			721</div><div class='add'>+MX51_PAD_GPIO1_2__I2C2_SCL			722</div><div class='add'>+MX51_PAD_GPIO1_2__PLL1_BYP			723</div><div class='add'>+MX51_PAD_GPIO1_2__PWM1_PWMO			724</div><div class='add'>+MX51_PAD_GPIO1_3__GPIO1_3			725</div><div class='add'>+MX51_PAD_GPIO1_3__I2C2_SDA			726</div><div class='add'>+MX51_PAD_GPIO1_3__PLL2_BYP			727</div><div class='add'>+MX51_PAD_GPIO1_3__PWM2_PWMO			728</div><div class='add'>+MX51_PAD_PMIC_INT_REQ__PMIC_INT_REQ		729</div><div class='add'>+MX51_PAD_PMIC_INT_REQ__PMIC_PMU_IRQ_B		730</div><div class='add'>+MX51_PAD_GPIO1_4__DISP2_EXT_CLK			731</div><div class='add'>+MX51_PAD_GPIO1_4__EIM_RDY			732</div><div class='add'>+MX51_PAD_GPIO1_4__GPIO1_4			733</div><div class='add'>+MX51_PAD_GPIO1_4__WDOG1_WDOG_B			734</div><div class='add'>+MX51_PAD_GPIO1_5__CSI2_MCLK			735</div><div class='add'>+MX51_PAD_GPIO1_5__DISP2_PIN16			736</div><div class='add'>+MX51_PAD_GPIO1_5__GPIO1_5			737</div><div class='add'>+MX51_PAD_GPIO1_5__WDOG2_WDOG_B			738</div><div class='add'>+MX51_PAD_GPIO1_6__DISP2_PIN17			739</div><div class='add'>+MX51_PAD_GPIO1_6__GPIO1_6			740</div><div class='add'>+MX51_PAD_GPIO1_6__REF_EN_B			741</div><div class='add'>+MX51_PAD_GPIO1_7__CCM_OUT_0			742</div><div class='add'>+MX51_PAD_GPIO1_7__GPIO1_7			743</div><div class='add'>+MX51_PAD_GPIO1_7__SD2_WP			744</div><div class='add'>+MX51_PAD_GPIO1_7__SPDIF_OUT1			745</div><div class='add'>+MX51_PAD_GPIO1_8__CSI2_DATA_EN			746</div><div class='add'>+MX51_PAD_GPIO1_8__GPIO1_8			747</div><div class='add'>+MX51_PAD_GPIO1_8__SD2_CD			748</div><div class='add'>+MX51_PAD_GPIO1_8__USBH3_PWR			749</div><div class='add'>+MX51_PAD_GPIO1_9__CCM_OUT_1			750</div><div class='add'>+MX51_PAD_GPIO1_9__DISP2_D1_CS			751</div><div class='add'>+MX51_PAD_GPIO1_9__DISP2_SER_CS			752</div><div class='add'>+MX51_PAD_GPIO1_9__GPIO1_9			753</div><div class='add'>+MX51_PAD_GPIO1_9__SD2_LCTL			754</div><div class='add'>+MX51_PAD_GPIO1_9__USBH3_OC			755</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx53-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx53-pinctrl.txt<br/>new file mode 100644<br/>index 000000000000..ca85ca432ef0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx53-pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/fsl,imx53-pinctrl.txt</a></div><div class='hunk'>@@ -0,0 +1,1202 @@</div><div class='add'>+* Freescale IMX53 IOMUX Controller</div><div class='add'>+</div><div class='add'>+Please refer to fsl,imx-pinctrl.txt in this directory for common binding part</div><div class='add'>+and usage.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "fsl,imx53-iomuxc"</div><div class='add'>+- fsl,pins: two integers array, represents a group of pins mux and config</div><div class='add'>+  setting. The format is fsl,pins = &lt;PIN_FUNC_ID CONFIG&gt;, PIN_FUNC_ID is a</div><div class='add'>+  pin working on a specific function, CONFIG is the pad setting value like</div><div class='add'>+  pull-up for this pin. Please refer to imx53 datasheet for the valid pad</div><div class='add'>+  config settings.</div><div class='add'>+</div><div class='add'>+CONFIG bits definition:</div><div class='add'>+PAD_CTL_HVE			(1 &lt;&lt; 13)</div><div class='add'>+PAD_CTL_HYS			(1 &lt;&lt; 8)</div><div class='add'>+PAD_CTL_PKE			(1 &lt;&lt; 7)</div><div class='add'>+PAD_CTL_PUE			(1 &lt;&lt; 6)</div><div class='add'>+PAD_CTL_PUS_100K_DOWN		(0 &lt;&lt; 4)</div><div class='add'>+PAD_CTL_PUS_47K_UP		(1 &lt;&lt; 4)</div><div class='add'>+PAD_CTL_PUS_100K_UP		(2 &lt;&lt; 4)</div><div class='add'>+PAD_CTL_PUS_22K_UP		(3 &lt;&lt; 4)</div><div class='add'>+PAD_CTL_ODE			(1 &lt;&lt; 3)</div><div class='add'>+PAD_CTL_DSE_LOW			(0 &lt;&lt; 1)</div><div class='add'>+PAD_CTL_DSE_MED			(1 &lt;&lt; 1)</div><div class='add'>+PAD_CTL_DSE_HIGH		(2 &lt;&lt; 1)</div><div class='add'>+PAD_CTL_DSE_MAX			(3 &lt;&lt; 1)</div><div class='add'>+PAD_CTL_SRE_FAST		(1 &lt;&lt; 0)</div><div class='add'>+PAD_CTL_SRE_SLOW		(0 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+See below for available PIN_FUNC_ID for imx53:</div><div class='add'>+MX53_PAD_GPIO_19__KPP_COL_5				0</div><div class='add'>+MX53_PAD_GPIO_19__GPIO4_5				1</div><div class='add'>+MX53_PAD_GPIO_19__CCM_CLKO				2</div><div class='add'>+MX53_PAD_GPIO_19__SPDIF_OUT1				3</div><div class='add'>+MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2			4</div><div class='add'>+MX53_PAD_GPIO_19__ECSPI1_RDY				5</div><div class='add'>+MX53_PAD_GPIO_19__FEC_TDATA_3				6</div><div class='add'>+MX53_PAD_GPIO_19__SRC_INT_BOOT				7</div><div class='add'>+MX53_PAD_KEY_COL0__KPP_COL_0				8</div><div class='add'>+MX53_PAD_KEY_COL0__GPIO4_6				9</div><div class='add'>+MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC			10</div><div class='add'>+MX53_PAD_KEY_COL0__UART4_TXD_MUX			11</div><div class='add'>+MX53_PAD_KEY_COL0__ECSPI1_SCLK				12</div><div class='add'>+MX53_PAD_KEY_COL0__FEC_RDATA_3				13</div><div class='add'>+MX53_PAD_KEY_COL0__SRC_ANY_PU_RST			14</div><div class='add'>+MX53_PAD_KEY_ROW0__KPP_ROW_0				15</div><div class='add'>+MX53_PAD_KEY_ROW0__GPIO4_7				16</div><div class='add'>+MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD			17</div><div class='add'>+MX53_PAD_KEY_ROW0__UART4_RXD_MUX			18</div><div class='add'>+MX53_PAD_KEY_ROW0__ECSPI1_MOSI				19</div><div class='add'>+MX53_PAD_KEY_ROW0__FEC_TX_ER				20</div><div class='add'>+MX53_PAD_KEY_COL1__KPP_COL_1				21</div><div class='add'>+MX53_PAD_KEY_COL1__GPIO4_8				22</div><div class='add'>+MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS			23</div><div class='add'>+MX53_PAD_KEY_COL1__UART5_TXD_MUX			24</div><div class='add'>+MX53_PAD_KEY_COL1__ECSPI1_MISO				25</div><div class='add'>+MX53_PAD_KEY_COL1__FEC_RX_CLK				26</div><div class='add'>+MX53_PAD_KEY_COL1__USBPHY1_TXREADY			27</div><div class='add'>+MX53_PAD_KEY_ROW1__KPP_ROW_1				28</div><div class='add'>+MX53_PAD_KEY_ROW1__GPIO4_9				29</div><div class='add'>+MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD			30</div><div class='add'>+MX53_PAD_KEY_ROW1__UART5_RXD_MUX			31</div><div class='add'>+MX53_PAD_KEY_ROW1__ECSPI1_SS0				32</div><div class='add'>+MX53_PAD_KEY_ROW1__FEC_COL				33</div><div class='add'>+MX53_PAD_KEY_ROW1__USBPHY1_RXVALID			34</div><div class='add'>+MX53_PAD_KEY_COL2__KPP_COL_2				35</div><div class='add'>+MX53_PAD_KEY_COL2__GPIO4_10				36</div><div class='add'>+MX53_PAD_KEY_COL2__CAN1_TXCAN				37</div><div class='add'>+MX53_PAD_KEY_COL2__FEC_MDIO				38</div><div class='add'>+MX53_PAD_KEY_COL2__ECSPI1_SS1				39</div><div class='add'>+MX53_PAD_KEY_COL2__FEC_RDATA_2				40</div><div class='add'>+MX53_PAD_KEY_COL2__USBPHY1_RXACTIVE			41</div><div class='add'>+MX53_PAD_KEY_ROW2__KPP_ROW_2				42</div><div class='add'>+MX53_PAD_KEY_ROW2__GPIO4_11				43</div><div class='add'>+MX53_PAD_KEY_ROW2__CAN1_RXCAN				44</div><div class='add'>+MX53_PAD_KEY_ROW2__FEC_MDC				45</div><div class='add'>+MX53_PAD_KEY_ROW2__ECSPI1_SS2				46</div><div class='add'>+MX53_PAD_KEY_ROW2__FEC_TDATA_2				47</div><div class='add'>+MX53_PAD_KEY_ROW2__USBPHY1_RXERROR			48</div><div class='add'>+MX53_PAD_KEY_COL3__KPP_COL_3				49</div><div class='add'>+MX53_PAD_KEY_COL3__GPIO4_12				50</div><div class='add'>+MX53_PAD_KEY_COL3__USBOH3_H2_DP				51</div><div class='add'>+MX53_PAD_KEY_COL3__SPDIF_IN1				52</div><div class='add'>+MX53_PAD_KEY_COL3__I2C2_SCL				53</div><div class='add'>+MX53_PAD_KEY_COL3__ECSPI1_SS3				54</div><div class='add'>+MX53_PAD_KEY_COL3__FEC_CRS				55</div><div class='add'>+MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK			56</div><div class='add'>+MX53_PAD_KEY_ROW3__KPP_ROW_3				57</div><div class='add'>+MX53_PAD_KEY_ROW3__GPIO4_13				58</div><div class='add'>+MX53_PAD_KEY_ROW3__USBOH3_H2_DM				59</div><div class='add'>+MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK			60</div><div class='add'>+MX53_PAD_KEY_ROW3__I2C2_SDA				61</div><div class='add'>+MX53_PAD_KEY_ROW3__OSC32K_32K_OUT			62</div><div class='add'>+MX53_PAD_KEY_ROW3__CCM_PLL4_BYP				63</div><div class='add'>+MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0			64</div><div class='add'>+MX53_PAD_KEY_COL4__KPP_COL_4				65</div><div class='add'>+MX53_PAD_KEY_COL4__GPIO4_14				66</div><div class='add'>+MX53_PAD_KEY_COL4__CAN2_TXCAN				67</div><div class='add'>+MX53_PAD_KEY_COL4__IPU_SISG_4				68</div><div class='add'>+MX53_PAD_KEY_COL4__UART5_RTS				69</div><div class='add'>+MX53_PAD_KEY_COL4__USBOH3_USBOTG_OC			70</div><div class='add'>+MX53_PAD_KEY_COL4__USBPHY1_LINESTATE_1			71</div><div class='add'>+MX53_PAD_KEY_ROW4__KPP_ROW_4				72</div><div class='add'>+MX53_PAD_KEY_ROW4__GPIO4_15				73</div><div class='add'>+MX53_PAD_KEY_ROW4__CAN2_RXCAN				74</div><div class='add'>+MX53_PAD_KEY_ROW4__IPU_SISG_5				75</div><div class='add'>+MX53_PAD_KEY_ROW4__UART5_CTS				76</div><div class='add'>+MX53_PAD_KEY_ROW4__USBOH3_USBOTG_PWR			77</div><div class='add'>+MX53_PAD_KEY_ROW4__USBPHY1_VBUSVALID			78</div><div class='add'>+MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK			79</div><div class='add'>+MX53_PAD_DI0_DISP_CLK__GPIO4_16				80</div><div class='add'>+MX53_PAD_DI0_DISP_CLK__USBOH3_USBH2_DIR			81</div><div class='add'>+MX53_PAD_DI0_DISP_CLK__SDMA_DEBUG_CORE_STATE_0		82</div><div class='add'>+MX53_PAD_DI0_DISP_CLK__EMI_EMI_DEBUG_0			83</div><div class='add'>+MX53_PAD_DI0_DISP_CLK__USBPHY1_AVALID			84</div><div class='add'>+MX53_PAD_DI0_PIN15__IPU_DI0_PIN15			85</div><div class='add'>+MX53_PAD_DI0_PIN15__GPIO4_17				86</div><div class='add'>+MX53_PAD_DI0_PIN15__AUDMUX_AUD6_TXC			87</div><div class='add'>+MX53_PAD_DI0_PIN15__SDMA_DEBUG_CORE_STATE_1		88</div><div class='add'>+MX53_PAD_DI0_PIN15__EMI_EMI_DEBUG_1			89</div><div class='add'>+MX53_PAD_DI0_PIN15__USBPHY1_BVALID			90</div><div class='add'>+MX53_PAD_DI0_PIN2__IPU_DI0_PIN2				91</div><div class='add'>+MX53_PAD_DI0_PIN2__GPIO4_18				92</div><div class='add'>+MX53_PAD_DI0_PIN2__AUDMUX_AUD6_TXD			93</div><div class='add'>+MX53_PAD_DI0_PIN2__SDMA_DEBUG_CORE_STATE_2		94</div><div class='add'>+MX53_PAD_DI0_PIN2__EMI_EMI_DEBUG_2			95</div><div class='add'>+MX53_PAD_DI0_PIN2__USBPHY1_ENDSESSION			96</div><div class='add'>+MX53_PAD_DI0_PIN3__IPU_DI0_PIN3				97</div><div class='add'>+MX53_PAD_DI0_PIN3__GPIO4_19				98</div><div class='add'>+MX53_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS			99</div><div class='add'>+MX53_PAD_DI0_PIN3__SDMA_DEBUG_CORE_STATE_3		100</div><div class='add'>+MX53_PAD_DI0_PIN3__EMI_EMI_DEBUG_3			101</div><div class='add'>+MX53_PAD_DI0_PIN3__USBPHY1_IDDIG			102</div><div class='add'>+MX53_PAD_DI0_PIN4__IPU_DI0_PIN4				103</div><div class='add'>+MX53_PAD_DI0_PIN4__GPIO4_20				104</div><div class='add'>+MX53_PAD_DI0_PIN4__AUDMUX_AUD6_RXD			105</div><div class='add'>+MX53_PAD_DI0_PIN4__ESDHC1_WP				106</div><div class='add'>+MX53_PAD_DI0_PIN4__SDMA_DEBUG_YIELD			107</div><div class='add'>+MX53_PAD_DI0_PIN4__EMI_EMI_DEBUG_4			108</div><div class='add'>+MX53_PAD_DI0_PIN4__USBPHY1_HOSTDISCONNECT		109</div><div class='add'>+MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0			110</div><div class='add'>+MX53_PAD_DISP0_DAT0__GPIO4_21				111</div><div class='add'>+MX53_PAD_DISP0_DAT0__CSPI_SCLK				112</div><div class='add'>+MX53_PAD_DISP0_DAT0__USBOH3_USBH2_DATA_0		113</div><div class='add'>+MX53_PAD_DISP0_DAT0__SDMA_DEBUG_CORE_RUN		114</div><div class='add'>+MX53_PAD_DISP0_DAT0__EMI_EMI_DEBUG_5			115</div><div class='add'>+MX53_PAD_DISP0_DAT0__USBPHY2_TXREADY			116</div><div class='add'>+MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1			117</div><div class='add'>+MX53_PAD_DISP0_DAT1__GPIO4_22				118</div><div class='add'>+MX53_PAD_DISP0_DAT1__CSPI_MOSI				119</div><div class='add'>+MX53_PAD_DISP0_DAT1__USBOH3_USBH2_DATA_1		120</div><div class='add'>+MX53_PAD_DISP0_DAT1__SDMA_DEBUG_EVENT_CHANNEL_SEL	121</div><div class='add'>+MX53_PAD_DISP0_DAT1__EMI_EMI_DEBUG_6			122</div><div class='add'>+MX53_PAD_DISP0_DAT1__USBPHY2_RXVALID			123</div><div class='add'>+MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2			124</div><div class='add'>+MX53_PAD_DISP0_DAT2__GPIO4_23				125</div><div class='add'>+MX53_PAD_DISP0_DAT2__CSPI_MISO				126</div><div class='add'>+MX53_PAD_DISP0_DAT2__USBOH3_USBH2_DATA_2		127</div><div class='add'>+MX53_PAD_DISP0_DAT2__SDMA_DEBUG_MODE			128</div><div class='add'>+MX53_PAD_DISP0_DAT2__EMI_EMI_DEBUG_7			129</div><div class='add'>+MX53_PAD_DISP0_DAT2__USBPHY2_RXACTIVE			130</div><div class='add'>+MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3			131</div><div class='add'>+MX53_PAD_DISP0_DAT3__GPIO4_24				132</div><div class='add'>+MX53_PAD_DISP0_DAT3__CSPI_SS0				133</div><div class='add'>+MX53_PAD_DISP0_DAT3__USBOH3_USBH2_DATA_3		134</div><div class='add'>+MX53_PAD_DISP0_DAT3__SDMA_DEBUG_BUS_ERROR		135</div><div class='add'>+MX53_PAD_DISP0_DAT3__EMI_EMI_DEBUG_8			136</div><div class='add'>+MX53_PAD_DISP0_DAT3__USBPHY2_RXERROR			137</div><div class='add'>+MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4			138</div><div class='add'>+MX53_PAD_DISP0_DAT4__GPIO4_25				139</div><div class='add'>+MX53_PAD_DISP0_DAT4__CSPI_SS1				140</div><div class='add'>+MX53_PAD_DISP0_DAT4__USBOH3_USBH2_DATA_4		141</div><div class='add'>+MX53_PAD_DISP0_DAT4__SDMA_DEBUG_BUS_RWB			142</div><div class='add'>+MX53_PAD_DISP0_DAT4__EMI_EMI_DEBUG_9			143</div><div class='add'>+MX53_PAD_DISP0_DAT4__USBPHY2_SIECLOCK			144</div><div class='add'>+MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5			145</div><div class='add'>+MX53_PAD_DISP0_DAT5__GPIO4_26				146</div><div class='add'>+MX53_PAD_DISP0_DAT5__CSPI_SS2				147</div><div class='add'>+MX53_PAD_DISP0_DAT5__USBOH3_USBH2_DATA_5		148</div><div class='add'>+MX53_PAD_DISP0_DAT5__SDMA_DEBUG_MATCHED_DMBUS		149</div><div class='add'>+MX53_PAD_DISP0_DAT5__EMI_EMI_DEBUG_10			150</div><div class='add'>+MX53_PAD_DISP0_DAT5__USBPHY2_LINESTATE_0		151</div><div class='add'>+MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6			152</div><div class='add'>+MX53_PAD_DISP0_DAT6__GPIO4_27				153</div><div class='add'>+MX53_PAD_DISP0_DAT6__CSPI_SS3				154</div><div class='add'>+MX53_PAD_DISP0_DAT6__USBOH3_USBH2_DATA_6		155</div><div class='add'>+MX53_PAD_DISP0_DAT6__SDMA_DEBUG_RTBUFFER_WRITE		156</div><div class='add'>+MX53_PAD_DISP0_DAT6__EMI_EMI_DEBUG_11			157</div><div class='add'>+MX53_PAD_DISP0_DAT6__USBPHY2_LINESTATE_1		158</div><div class='add'>+MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7			159</div><div class='add'>+MX53_PAD_DISP0_DAT7__GPIO4_28				160</div><div class='add'>+MX53_PAD_DISP0_DAT7__CSPI_RDY				161</div><div class='add'>+MX53_PAD_DISP0_DAT7__USBOH3_USBH2_DATA_7		162</div><div class='add'>+MX53_PAD_DISP0_DAT7__SDMA_DEBUG_EVENT_CHANNEL_0		163</div><div class='add'>+MX53_PAD_DISP0_DAT7__EMI_EMI_DEBUG_12			164</div><div class='add'>+MX53_PAD_DISP0_DAT7__USBPHY2_VBUSVALID			165</div><div class='add'>+MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8			166</div><div class='add'>+MX53_PAD_DISP0_DAT8__GPIO4_29				167</div><div class='add'>+MX53_PAD_DISP0_DAT8__PWM1_PWMO				168</div><div class='add'>+MX53_PAD_DISP0_DAT8__WDOG1_WDOG_B			169</div><div class='add'>+MX53_PAD_DISP0_DAT8__SDMA_DEBUG_EVENT_CHANNEL_1		170</div><div class='add'>+MX53_PAD_DISP0_DAT8__EMI_EMI_DEBUG_13			171</div><div class='add'>+MX53_PAD_DISP0_DAT8__USBPHY2_AVALID			172</div><div class='add'>+MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9			173</div><div class='add'>+MX53_PAD_DISP0_DAT9__GPIO4_30				174</div><div class='add'>+MX53_PAD_DISP0_DAT9__PWM2_PWMO				175</div><div class='add'>+MX53_PAD_DISP0_DAT9__WDOG2_WDOG_B			176</div><div class='add'>+MX53_PAD_DISP0_DAT9__SDMA_DEBUG_EVENT_CHANNEL_2		177</div><div class='add'>+MX53_PAD_DISP0_DAT9__EMI_EMI_DEBUG_14			178</div><div class='add'>+MX53_PAD_DISP0_DAT9__USBPHY2_VSTATUS_0			179</div><div class='add'>+MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10			180</div><div class='add'>+MX53_PAD_DISP0_DAT10__GPIO4_31				181</div><div class='add'>+MX53_PAD_DISP0_DAT10__USBOH3_USBH2_STP			182</div><div class='add'>+MX53_PAD_DISP0_DAT10__SDMA_DEBUG_EVENT_CHANNEL_3	183</div><div class='add'>+MX53_PAD_DISP0_DAT10__EMI_EMI_DEBUG_15			184</div><div class='add'>+MX53_PAD_DISP0_DAT10__USBPHY2_VSTATUS_1			185</div><div class='add'>+MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11			186</div><div class='add'>+MX53_PAD_DISP0_DAT11__GPIO5_5				187</div><div class='add'>+MX53_PAD_DISP0_DAT11__USBOH3_USBH2_NXT			188</div><div class='add'>+MX53_PAD_DISP0_DAT11__SDMA_DEBUG_EVENT_CHANNEL_4	189</div><div class='add'>+MX53_PAD_DISP0_DAT11__EMI_EMI_DEBUG_16			190</div><div class='add'>+MX53_PAD_DISP0_DAT11__USBPHY2_VSTATUS_2			191</div><div class='add'>+MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12			192</div><div class='add'>+MX53_PAD_DISP0_DAT12__GPIO5_6				193</div><div class='add'>+MX53_PAD_DISP0_DAT12__USBOH3_USBH2_CLK			194</div><div class='add'>+MX53_PAD_DISP0_DAT12__SDMA_DEBUG_EVENT_CHANNEL_5	195</div><div class='add'>+MX53_PAD_DISP0_DAT12__EMI_EMI_DEBUG_17			196</div><div class='add'>+MX53_PAD_DISP0_DAT12__USBPHY2_VSTATUS_3			197</div><div class='add'>+MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13			198</div><div class='add'>+MX53_PAD_DISP0_DAT13__GPIO5_7				199</div><div class='add'>+MX53_PAD_DISP0_DAT13__AUDMUX_AUD5_RXFS			200</div><div class='add'>+MX53_PAD_DISP0_DAT13__SDMA_DEBUG_EVT_CHN_LINES_0	201</div><div class='add'>+MX53_PAD_DISP0_DAT13__EMI_EMI_DEBUG_18			202</div><div class='add'>+MX53_PAD_DISP0_DAT13__USBPHY2_VSTATUS_4			203</div><div class='add'>+MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14			204</div><div class='add'>+MX53_PAD_DISP0_DAT14__GPIO5_8				205</div><div class='add'>+MX53_PAD_DISP0_DAT14__AUDMUX_AUD5_RXC			206</div><div class='add'>+MX53_PAD_DISP0_DAT14__SDMA_DEBUG_EVT_CHN_LINES_1	207</div><div class='add'>+MX53_PAD_DISP0_DAT14__EMI_EMI_DEBUG_19			208</div><div class='add'>+MX53_PAD_DISP0_DAT14__USBPHY2_VSTATUS_5			209</div><div class='add'>+MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15			210</div><div class='add'>+MX53_PAD_DISP0_DAT15__GPIO5_9				211</div><div class='add'>+MX53_PAD_DISP0_DAT15__ECSPI1_SS1			212</div><div class='add'>+MX53_PAD_DISP0_DAT15__ECSPI2_SS1			213</div><div class='add'>+MX53_PAD_DISP0_DAT15__SDMA_DEBUG_EVT_CHN_LINES_2	214</div><div class='add'>+MX53_PAD_DISP0_DAT15__EMI_EMI_DEBUG_20			215</div><div class='add'>+MX53_PAD_DISP0_DAT15__USBPHY2_VSTATUS_6			216</div><div class='add'>+MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16			217</div><div class='add'>+MX53_PAD_DISP0_DAT16__GPIO5_10				218</div><div class='add'>+MX53_PAD_DISP0_DAT16__ECSPI2_MOSI			219</div><div class='add'>+MX53_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC			220</div><div class='add'>+MX53_PAD_DISP0_DAT16__SDMA_EXT_EVENT_0			221</div><div class='add'>+MX53_PAD_DISP0_DAT16__SDMA_DEBUG_EVT_CHN_LINES_3	222</div><div class='add'>+MX53_PAD_DISP0_DAT16__EMI_EMI_DEBUG_21			223</div><div class='add'>+MX53_PAD_DISP0_DAT16__USBPHY2_VSTATUS_7			224</div><div class='add'>+MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17			225</div><div class='add'>+MX53_PAD_DISP0_DAT17__GPIO5_11				226</div><div class='add'>+MX53_PAD_DISP0_DAT17__ECSPI2_MISO			227</div><div class='add'>+MX53_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD			228</div><div class='add'>+MX53_PAD_DISP0_DAT17__SDMA_EXT_EVENT_1			229</div><div class='add'>+MX53_PAD_DISP0_DAT17__SDMA_DEBUG_EVT_CHN_LINES_4	230</div><div class='add'>+MX53_PAD_DISP0_DAT17__EMI_EMI_DEBUG_22			231</div><div class='add'>+MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18			232</div><div class='add'>+MX53_PAD_DISP0_DAT18__GPIO5_12				233</div><div class='add'>+MX53_PAD_DISP0_DAT18__ECSPI2_SS0			234</div><div class='add'>+MX53_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS			235</div><div class='add'>+MX53_PAD_DISP0_DAT18__AUDMUX_AUD4_RXFS			236</div><div class='add'>+MX53_PAD_DISP0_DAT18__SDMA_DEBUG_EVT_CHN_LINES_5	237</div><div class='add'>+MX53_PAD_DISP0_DAT18__EMI_EMI_DEBUG_23			238</div><div class='add'>+MX53_PAD_DISP0_DAT18__EMI_WEIM_CS_2			239</div><div class='add'>+MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19			240</div><div class='add'>+MX53_PAD_DISP0_DAT19__GPIO5_13				241</div><div class='add'>+MX53_PAD_DISP0_DAT19__ECSPI2_SCLK			242</div><div class='add'>+MX53_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD			243</div><div class='add'>+MX53_PAD_DISP0_DAT19__AUDMUX_AUD4_RXC			244</div><div class='add'>+MX53_PAD_DISP0_DAT19__SDMA_DEBUG_EVT_CHN_LINES_6	245</div><div class='add'>+MX53_PAD_DISP0_DAT19__EMI_EMI_DEBUG_24			246</div><div class='add'>+MX53_PAD_DISP0_DAT19__EMI_WEIM_CS_3			247</div><div class='add'>+MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20			248</div><div class='add'>+MX53_PAD_DISP0_DAT20__GPIO5_14				249</div><div class='add'>+MX53_PAD_DISP0_DAT20__ECSPI1_SCLK			250</div><div class='add'>+MX53_PAD_DISP0_DAT20__AUDMUX_AUD4_TXC			251</div><div class='add'>+MX53_PAD_DISP0_DAT20__SDMA_DEBUG_EVT_CHN_LINES_7	252</div><div class='add'>+MX53_PAD_DISP0_DAT20__EMI_EMI_DEBUG_25			253</div><div class='add'>+MX53_PAD_DISP0_DAT20__SATA_PHY_TDI			254</div><div class='add'>+MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21			255</div><div class='add'>+MX53_PAD_DISP0_DAT21__GPIO5_15				256</div><div class='add'>+MX53_PAD_DISP0_DAT21__ECSPI1_MOSI			257</div><div class='add'>+MX53_PAD_DISP0_DAT21__AUDMUX_AUD4_TXD			258</div><div class='add'>+MX53_PAD_DISP0_DAT21__SDMA_DEBUG_BUS_DEVICE_0		259</div><div class='add'>+MX53_PAD_DISP0_DAT21__EMI_EMI_DEBUG_26			260</div><div class='add'>+MX53_PAD_DISP0_DAT21__SATA_PHY_TDO			261</div><div class='add'>+MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22			262</div><div class='add'>+MX53_PAD_DISP0_DAT22__GPIO5_16				263</div><div class='add'>+MX53_PAD_DISP0_DAT22__ECSPI1_MISO			264</div><div class='add'>+MX53_PAD_DISP0_DAT22__AUDMUX_AUD4_TXFS			265</div><div class='add'>+MX53_PAD_DISP0_DAT22__SDMA_DEBUG_BUS_DEVICE_1		266</div><div class='add'>+MX53_PAD_DISP0_DAT22__EMI_EMI_DEBUG_27			267</div><div class='add'>+MX53_PAD_DISP0_DAT22__SATA_PHY_TCK			268</div><div class='add'>+MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23			269</div><div class='add'>+MX53_PAD_DISP0_DAT23__GPIO5_17				270</div><div class='add'>+MX53_PAD_DISP0_DAT23__ECSPI1_SS0			271</div><div class='add'>+MX53_PAD_DISP0_DAT23__AUDMUX_AUD4_RXD			272</div><div class='add'>+MX53_PAD_DISP0_DAT23__SDMA_DEBUG_BUS_DEVICE_2		273</div><div class='add'>+MX53_PAD_DISP0_DAT23__EMI_EMI_DEBUG_28			274</div><div class='add'>+MX53_PAD_DISP0_DAT23__SATA_PHY_TMS			275</div><div class='add'>+MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK			276</div><div class='add'>+MX53_PAD_CSI0_PIXCLK__GPIO5_18				277</div><div class='add'>+MX53_PAD_CSI0_PIXCLK__SDMA_DEBUG_PC_0			278</div><div class='add'>+MX53_PAD_CSI0_PIXCLK__EMI_EMI_DEBUG_29			279</div><div class='add'>+MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC			280</div><div class='add'>+MX53_PAD_CSI0_MCLK__GPIO5_19				281</div><div class='add'>+MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK			282</div><div class='add'>+MX53_PAD_CSI0_MCLK__SDMA_DEBUG_PC_1			283</div><div class='add'>+MX53_PAD_CSI0_MCLK__EMI_EMI_DEBUG_30			284</div><div class='add'>+MX53_PAD_CSI0_MCLK__TPIU_TRCTL				285</div><div class='add'>+MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN			286</div><div class='add'>+MX53_PAD_CSI0_DATA_EN__GPIO5_20				287</div><div class='add'>+MX53_PAD_CSI0_DATA_EN__SDMA_DEBUG_PC_2			288</div><div class='add'>+MX53_PAD_CSI0_DATA_EN__EMI_EMI_DEBUG_31			289</div><div class='add'>+MX53_PAD_CSI0_DATA_EN__TPIU_TRCLK			290</div><div class='add'>+MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC			291</div><div class='add'>+MX53_PAD_CSI0_VSYNC__GPIO5_21				292</div><div class='add'>+MX53_PAD_CSI0_VSYNC__SDMA_DEBUG_PC_3			293</div><div class='add'>+MX53_PAD_CSI0_VSYNC__EMI_EMI_DEBUG_32			294</div><div class='add'>+MX53_PAD_CSI0_VSYNC__TPIU_TRACE_0			295</div><div class='add'>+MX53_PAD_CSI0_DAT4__IPU_CSI0_D_4			296</div><div class='add'>+MX53_PAD_CSI0_DAT4__GPIO5_22				297</div><div class='add'>+MX53_PAD_CSI0_DAT4__KPP_COL_5				298</div><div class='add'>+MX53_PAD_CSI0_DAT4__ECSPI1_SCLK				299</div><div class='add'>+MX53_PAD_CSI0_DAT4__USBOH3_USBH3_STP			300</div><div class='add'>+MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC			301</div><div class='add'>+MX53_PAD_CSI0_DAT4__EMI_EMI_DEBUG_33			302</div><div class='add'>+MX53_PAD_CSI0_DAT4__TPIU_TRACE_1			303</div><div class='add'>+MX53_PAD_CSI0_DAT5__IPU_CSI0_D_5			304</div><div class='add'>+MX53_PAD_CSI0_DAT5__GPIO5_23				305</div><div class='add'>+MX53_PAD_CSI0_DAT5__KPP_ROW_5				306</div><div class='add'>+MX53_PAD_CSI0_DAT5__ECSPI1_MOSI				307</div><div class='add'>+MX53_PAD_CSI0_DAT5__USBOH3_USBH3_NXT			308</div><div class='add'>+MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD			309</div><div class='add'>+MX53_PAD_CSI0_DAT5__EMI_EMI_DEBUG_34			310</div><div class='add'>+MX53_PAD_CSI0_DAT5__TPIU_TRACE_2			311</div><div class='add'>+MX53_PAD_CSI0_DAT6__IPU_CSI0_D_6			312</div><div class='add'>+MX53_PAD_CSI0_DAT6__GPIO5_24				313</div><div class='add'>+MX53_PAD_CSI0_DAT6__KPP_COL_6				314</div><div class='add'>+MX53_PAD_CSI0_DAT6__ECSPI1_MISO				315</div><div class='add'>+MX53_PAD_CSI0_DAT6__USBOH3_USBH3_CLK			316</div><div class='add'>+MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS			317</div><div class='add'>+MX53_PAD_CSI0_DAT6__EMI_EMI_DEBUG_35			318</div><div class='add'>+MX53_PAD_CSI0_DAT6__TPIU_TRACE_3			319</div><div class='add'>+MX53_PAD_CSI0_DAT7__IPU_CSI0_D_7			320</div><div class='add'>+MX53_PAD_CSI0_DAT7__GPIO5_25				321</div><div class='add'>+MX53_PAD_CSI0_DAT7__KPP_ROW_6				322</div><div class='add'>+MX53_PAD_CSI0_DAT7__ECSPI1_SS0				323</div><div class='add'>+MX53_PAD_CSI0_DAT7__USBOH3_USBH3_DIR			324</div><div class='add'>+MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD			325</div><div class='add'>+MX53_PAD_CSI0_DAT7__EMI_EMI_DEBUG_36			326</div><div class='add'>+MX53_PAD_CSI0_DAT7__TPIU_TRACE_4			327</div><div class='add'>+MX53_PAD_CSI0_DAT8__IPU_CSI0_D_8			328</div><div class='add'>+MX53_PAD_CSI0_DAT8__GPIO5_26				329</div><div class='add'>+MX53_PAD_CSI0_DAT8__KPP_COL_7				330</div><div class='add'>+MX53_PAD_CSI0_DAT8__ECSPI2_SCLK				331</div><div class='add'>+MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC			332</div><div class='add'>+MX53_PAD_CSI0_DAT8__I2C1_SDA				333</div><div class='add'>+MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37			334</div><div class='add'>+MX53_PAD_CSI0_DAT8__TPIU_TRACE_5			335</div><div class='add'>+MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9			336</div><div class='add'>+MX53_PAD_CSI0_DAT9__GPIO5_27				337</div><div class='add'>+MX53_PAD_CSI0_DAT9__KPP_ROW_7				338</div><div class='add'>+MX53_PAD_CSI0_DAT9__ECSPI2_MOSI				339</div><div class='add'>+MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR			340</div><div class='add'>+MX53_PAD_CSI0_DAT9__I2C1_SCL				341</div><div class='add'>+MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38			342</div><div class='add'>+MX53_PAD_CSI0_DAT9__TPIU_TRACE_6			343</div><div class='add'>+MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10			344</div><div class='add'>+MX53_PAD_CSI0_DAT10__GPIO5_28				345</div><div class='add'>+MX53_PAD_CSI0_DAT10__UART1_TXD_MUX			346</div><div class='add'>+MX53_PAD_CSI0_DAT10__ECSPI2_MISO			347</div><div class='add'>+MX53_PAD_CSI0_DAT10__AUDMUX_AUD3_RXC			348</div><div class='add'>+MX53_PAD_CSI0_DAT10__SDMA_DEBUG_PC_4			349</div><div class='add'>+MX53_PAD_CSI0_DAT10__EMI_EMI_DEBUG_39			350</div><div class='add'>+MX53_PAD_CSI0_DAT10__TPIU_TRACE_7			351</div><div class='add'>+MX53_PAD_CSI0_DAT11__IPU_CSI0_D_11			352</div><div class='add'>+MX53_PAD_CSI0_DAT11__GPIO5_29				353</div><div class='add'>+MX53_PAD_CSI0_DAT11__UART1_RXD_MUX			354</div><div class='add'>+MX53_PAD_CSI0_DAT11__ECSPI2_SS0				355</div><div class='add'>+MX53_PAD_CSI0_DAT11__AUDMUX_AUD3_RXFS			356</div><div class='add'>+MX53_PAD_CSI0_DAT11__SDMA_DEBUG_PC_5			357</div><div class='add'>+MX53_PAD_CSI0_DAT11__EMI_EMI_DEBUG_40			358</div><div class='add'>+MX53_PAD_CSI0_DAT11__TPIU_TRACE_8			359</div><div class='add'>+MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12			360</div><div class='add'>+MX53_PAD_CSI0_DAT12__GPIO5_30				361</div><div class='add'>+MX53_PAD_CSI0_DAT12__UART4_TXD_MUX			362</div><div class='add'>+MX53_PAD_CSI0_DAT12__USBOH3_USBH3_DATA_0		363</div><div class='add'>+MX53_PAD_CSI0_DAT12__SDMA_DEBUG_PC_6			364</div><div class='add'>+MX53_PAD_CSI0_DAT12__EMI_EMI_DEBUG_41			365</div><div class='add'>+MX53_PAD_CSI0_DAT12__TPIU_TRACE_9			366</div><div class='add'>+MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13			367</div><div class='add'>+MX53_PAD_CSI0_DAT13__GPIO5_31				368</div><div class='add'>+MX53_PAD_CSI0_DAT13__UART4_RXD_MUX			369</div><div class='add'>+MX53_PAD_CSI0_DAT13__USBOH3_USBH3_DATA_1		370</div><div class='add'>+MX53_PAD_CSI0_DAT13__SDMA_DEBUG_PC_7			371</div><div class='add'>+MX53_PAD_CSI0_DAT13__EMI_EMI_DEBUG_42			372</div><div class='add'>+MX53_PAD_CSI0_DAT13__TPIU_TRACE_10			373</div><div class='add'>+MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14			374</div><div class='add'>+MX53_PAD_CSI0_DAT14__GPIO6_0				375</div><div class='add'>+MX53_PAD_CSI0_DAT14__UART5_TXD_MUX			376</div><div class='add'>+MX53_PAD_CSI0_DAT14__USBOH3_USBH3_DATA_2		377</div><div class='add'>+MX53_PAD_CSI0_DAT14__SDMA_DEBUG_PC_8			378</div><div class='add'>+MX53_PAD_CSI0_DAT14__EMI_EMI_DEBUG_43			379</div><div class='add'>+MX53_PAD_CSI0_DAT14__TPIU_TRACE_11			380</div><div class='add'>+MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15			381</div><div class='add'>+MX53_PAD_CSI0_DAT15__GPIO6_1				382</div><div class='add'>+MX53_PAD_CSI0_DAT15__UART5_RXD_MUX			383</div><div class='add'>+MX53_PAD_CSI0_DAT15__USBOH3_USBH3_DATA_3		384</div><div class='add'>+MX53_PAD_CSI0_DAT15__SDMA_DEBUG_PC_9			385</div><div class='add'>+MX53_PAD_CSI0_DAT15__EMI_EMI_DEBUG_44			386</div><div class='add'>+MX53_PAD_CSI0_DAT15__TPIU_TRACE_12			387</div><div class='add'>+MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16			388</div><div class='add'>+MX53_PAD_CSI0_DAT16__GPIO6_2				389</div><div class='add'>+MX53_PAD_CSI0_DAT16__UART4_RTS				390</div><div class='add'>+MX53_PAD_CSI0_DAT16__USBOH3_USBH3_DATA_4		391</div><div class='add'>+MX53_PAD_CSI0_DAT16__SDMA_DEBUG_PC_10			392</div><div class='add'>+MX53_PAD_CSI0_DAT16__EMI_EMI_DEBUG_45			393</div><div class='add'>+MX53_PAD_CSI0_DAT16__TPIU_TRACE_13			394</div><div class='add'>+MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17			395</div><div class='add'>+MX53_PAD_CSI0_DAT17__GPIO6_3				396</div><div class='add'>+MX53_PAD_CSI0_DAT17__UART4_CTS				397</div><div class='add'>+MX53_PAD_CSI0_DAT17__USBOH3_USBH3_DATA_5		398</div><div class='add'>+MX53_PAD_CSI0_DAT17__SDMA_DEBUG_PC_11			399</div><div class='add'>+MX53_PAD_CSI0_DAT17__EMI_EMI_DEBUG_46			400</div><div class='add'>+MX53_PAD_CSI0_DAT17__TPIU_TRACE_14			401</div><div class='add'>+MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18			402</div><div class='add'>+MX53_PAD_CSI0_DAT18__GPIO6_4				403</div><div class='add'>+MX53_PAD_CSI0_DAT18__UART5_RTS				404</div><div class='add'>+MX53_PAD_CSI0_DAT18__USBOH3_USBH3_DATA_6		405</div><div class='add'>+MX53_PAD_CSI0_DAT18__SDMA_DEBUG_PC_12			406</div><div class='add'>+MX53_PAD_CSI0_DAT18__EMI_EMI_DEBUG_47			407</div><div class='add'>+MX53_PAD_CSI0_DAT18__TPIU_TRACE_15			408</div><div class='add'>+MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19			409</div><div class='add'>+MX53_PAD_CSI0_DAT19__GPIO6_5				410</div><div class='add'>+MX53_PAD_CSI0_DAT19__UART5_CTS				411</div><div class='add'>+MX53_PAD_CSI0_DAT19__USBOH3_USBH3_DATA_7		412</div><div class='add'>+MX53_PAD_CSI0_DAT19__SDMA_DEBUG_PC_13			413</div><div class='add'>+MX53_PAD_CSI0_DAT19__EMI_EMI_DEBUG_48			414</div><div class='add'>+MX53_PAD_CSI0_DAT19__USBPHY2_BISTOK			415</div><div class='add'>+MX53_PAD_EIM_A25__EMI_WEIM_A_25				416</div><div class='add'>+MX53_PAD_EIM_A25__GPIO5_2				417</div><div class='add'>+MX53_PAD_EIM_A25__ECSPI2_RDY				418</div><div class='add'>+MX53_PAD_EIM_A25__IPU_DI1_PIN12				419</div><div class='add'>+MX53_PAD_EIM_A25__CSPI_SS1				420</div><div class='add'>+MX53_PAD_EIM_A25__IPU_DI0_D1_CS				421</div><div class='add'>+MX53_PAD_EIM_A25__USBPHY1_BISTOK			422</div><div class='add'>+MX53_PAD_EIM_EB2__EMI_WEIM_EB_2				423</div><div class='add'>+MX53_PAD_EIM_EB2__GPIO2_30				424</div><div class='add'>+MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK			425</div><div class='add'>+MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS			426</div><div class='add'>+MX53_PAD_EIM_EB2__ECSPI1_SS0				427</div><div class='add'>+MX53_PAD_EIM_EB2__I2C2_SCL				428</div><div class='add'>+MX53_PAD_EIM_D16__EMI_WEIM_D_16				429</div><div class='add'>+MX53_PAD_EIM_D16__GPIO3_16				430</div><div class='add'>+MX53_PAD_EIM_D16__IPU_DI0_PIN5				431</div><div class='add'>+MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK			432</div><div class='add'>+MX53_PAD_EIM_D16__ECSPI1_SCLK				433</div><div class='add'>+MX53_PAD_EIM_D16__I2C2_SDA				434</div><div class='add'>+MX53_PAD_EIM_D17__EMI_WEIM_D_17				435</div><div class='add'>+MX53_PAD_EIM_D17__GPIO3_17				436</div><div class='add'>+MX53_PAD_EIM_D17__IPU_DI0_PIN6				437</div><div class='add'>+MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN			438</div><div class='add'>+MX53_PAD_EIM_D17__ECSPI1_MISO				439</div><div class='add'>+MX53_PAD_EIM_D17__I2C3_SCL				440</div><div class='add'>+MX53_PAD_EIM_D18__EMI_WEIM_D_18				441</div><div class='add'>+MX53_PAD_EIM_D18__GPIO3_18				442</div><div class='add'>+MX53_PAD_EIM_D18__IPU_DI0_PIN7				443</div><div class='add'>+MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO			444</div><div class='add'>+MX53_PAD_EIM_D18__ECSPI1_MOSI				445</div><div class='add'>+MX53_PAD_EIM_D18__I2C3_SDA				446</div><div class='add'>+MX53_PAD_EIM_D18__IPU_DI1_D0_CS				447</div><div class='add'>+MX53_PAD_EIM_D19__EMI_WEIM_D_19				448</div><div class='add'>+MX53_PAD_EIM_D19__GPIO3_19				449</div><div class='add'>+MX53_PAD_EIM_D19__IPU_DI0_PIN8				450</div><div class='add'>+MX53_PAD_EIM_D19__IPU_DISPB1_SER_RS			451</div><div class='add'>+MX53_PAD_EIM_D19__ECSPI1_SS1				452</div><div class='add'>+MX53_PAD_EIM_D19__EPIT1_EPITO				453</div><div class='add'>+MX53_PAD_EIM_D19__UART1_CTS				454</div><div class='add'>+MX53_PAD_EIM_D19__USBOH3_USBH2_OC			455</div><div class='add'>+MX53_PAD_EIM_D20__EMI_WEIM_D_20				456</div><div class='add'>+MX53_PAD_EIM_D20__GPIO3_20				457</div><div class='add'>+MX53_PAD_EIM_D20__IPU_DI0_PIN16				458</div><div class='add'>+MX53_PAD_EIM_D20__IPU_SER_DISP0_CS			459</div><div class='add'>+MX53_PAD_EIM_D20__CSPI_SS0				460</div><div class='add'>+MX53_PAD_EIM_D20__EPIT2_EPITO				461</div><div class='add'>+MX53_PAD_EIM_D20__UART1_RTS				462</div><div class='add'>+MX53_PAD_EIM_D20__USBOH3_USBH2_PWR			463</div><div class='add'>+MX53_PAD_EIM_D21__EMI_WEIM_D_21				464</div><div class='add'>+MX53_PAD_EIM_D21__GPIO3_21				465</div><div class='add'>+MX53_PAD_EIM_D21__IPU_DI0_PIN17				466</div><div class='add'>+MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK			467</div><div class='add'>+MX53_PAD_EIM_D21__CSPI_SCLK				468</div><div class='add'>+MX53_PAD_EIM_D21__I2C1_SCL				469</div><div class='add'>+MX53_PAD_EIM_D21__USBOH3_USBOTG_OC			470</div><div class='add'>+MX53_PAD_EIM_D22__EMI_WEIM_D_22				471</div><div class='add'>+MX53_PAD_EIM_D22__GPIO3_22				472</div><div class='add'>+MX53_PAD_EIM_D22__IPU_DI0_PIN1				473</div><div class='add'>+MX53_PAD_EIM_D22__IPU_DISPB0_SER_DIN			474</div><div class='add'>+MX53_PAD_EIM_D22__CSPI_MISO				475</div><div class='add'>+MX53_PAD_EIM_D22__USBOH3_USBOTG_PWR			476</div><div class='add'>+MX53_PAD_EIM_D23__EMI_WEIM_D_23				477</div><div class='add'>+MX53_PAD_EIM_D23__GPIO3_23				478</div><div class='add'>+MX53_PAD_EIM_D23__UART3_CTS				479</div><div class='add'>+MX53_PAD_EIM_D23__UART1_DCD				480</div><div class='add'>+MX53_PAD_EIM_D23__IPU_DI0_D0_CS				481</div><div class='add'>+MX53_PAD_EIM_D23__IPU_DI1_PIN2				482</div><div class='add'>+MX53_PAD_EIM_D23__IPU_CSI1_DATA_EN			483</div><div class='add'>+MX53_PAD_EIM_D23__IPU_DI1_PIN14				484</div><div class='add'>+MX53_PAD_EIM_EB3__EMI_WEIM_EB_3				485</div><div class='add'>+MX53_PAD_EIM_EB3__GPIO2_31				486</div><div class='add'>+MX53_PAD_EIM_EB3__UART3_RTS				487</div><div class='add'>+MX53_PAD_EIM_EB3__UART1_RI				488</div><div class='add'>+MX53_PAD_EIM_EB3__IPU_DI1_PIN3				489</div><div class='add'>+MX53_PAD_EIM_EB3__IPU_CSI1_HSYNC			490</div><div class='add'>+MX53_PAD_EIM_EB3__IPU_DI1_PIN16				491</div><div class='add'>+MX53_PAD_EIM_D24__EMI_WEIM_D_24				492</div><div class='add'>+MX53_PAD_EIM_D24__GPIO3_24				493</div><div class='add'>+MX53_PAD_EIM_D24__UART3_TXD_MUX				494</div><div class='add'>+MX53_PAD_EIM_D24__ECSPI1_SS2				495</div><div class='add'>+MX53_PAD_EIM_D24__CSPI_SS2				496</div><div class='add'>+MX53_PAD_EIM_D24__AUDMUX_AUD5_RXFS			497</div><div class='add'>+MX53_PAD_EIM_D24__ECSPI2_SS2				498</div><div class='add'>+MX53_PAD_EIM_D24__UART1_DTR				499</div><div class='add'>+MX53_PAD_EIM_D25__EMI_WEIM_D_25				500</div><div class='add'>+MX53_PAD_EIM_D25__GPIO3_25				501</div><div class='add'>+MX53_PAD_EIM_D25__UART3_RXD_MUX				502</div><div class='add'>+MX53_PAD_EIM_D25__ECSPI1_SS3				503</div><div class='add'>+MX53_PAD_EIM_D25__CSPI_SS3				504</div><div class='add'>+MX53_PAD_EIM_D25__AUDMUX_AUD5_RXC			505</div><div class='add'>+MX53_PAD_EIM_D25__ECSPI2_SS3				506</div><div class='add'>+MX53_PAD_EIM_D25__UART1_DSR				507</div><div class='add'>+MX53_PAD_EIM_D26__EMI_WEIM_D_26				508</div><div class='add'>+MX53_PAD_EIM_D26__GPIO3_26				509</div><div class='add'>+MX53_PAD_EIM_D26__UART2_TXD_MUX				510</div><div class='add'>+MX53_PAD_EIM_D26__FIRI_RXD				511</div><div class='add'>+MX53_PAD_EIM_D26__IPU_CSI0_D_1				512</div><div class='add'>+MX53_PAD_EIM_D26__IPU_DI1_PIN11				513</div><div class='add'>+MX53_PAD_EIM_D26__IPU_SISG_2				514</div><div class='add'>+MX53_PAD_EIM_D26__IPU_DISP1_DAT_22			515</div><div class='add'>+MX53_PAD_EIM_D27__EMI_WEIM_D_27				516</div><div class='add'>+MX53_PAD_EIM_D27__GPIO3_27				517</div><div class='add'>+MX53_PAD_EIM_D27__UART2_RXD_MUX				518</div><div class='add'>+MX53_PAD_EIM_D27__FIRI_TXD				519</div><div class='add'>+MX53_PAD_EIM_D27__IPU_CSI0_D_0				520</div><div class='add'>+MX53_PAD_EIM_D27__IPU_DI1_PIN13				521</div><div class='add'>+MX53_PAD_EIM_D27__IPU_SISG_3				522</div><div class='add'>+MX53_PAD_EIM_D27__IPU_DISP1_DAT_23			523</div><div class='add'>+MX53_PAD_EIM_D28__EMI_WEIM_D_28				524</div><div class='add'>+MX53_PAD_EIM_D28__GPIO3_28				525</div><div class='add'>+MX53_PAD_EIM_D28__UART2_CTS				526</div><div class='add'>+MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO			527</div><div class='add'>+MX53_PAD_EIM_D28__CSPI_MOSI				528</div><div class='add'>+MX53_PAD_EIM_D28__I2C1_SDA				529</div><div class='add'>+MX53_PAD_EIM_D28__IPU_EXT_TRIG				530</div><div class='add'>+MX53_PAD_EIM_D28__IPU_DI0_PIN13				531</div><div class='add'>+MX53_PAD_EIM_D29__EMI_WEIM_D_29				532</div><div class='add'>+MX53_PAD_EIM_D29__GPIO3_29				533</div><div class='add'>+MX53_PAD_EIM_D29__UART2_RTS				534</div><div class='add'>+MX53_PAD_EIM_D29__IPU_DISPB0_SER_RS			535</div><div class='add'>+MX53_PAD_EIM_D29__CSPI_SS0				536</div><div class='add'>+MX53_PAD_EIM_D29__IPU_DI1_PIN15				537</div><div class='add'>+MX53_PAD_EIM_D29__IPU_CSI1_VSYNC			538</div><div class='add'>+MX53_PAD_EIM_D29__IPU_DI0_PIN14				539</div><div class='add'>+MX53_PAD_EIM_D30__EMI_WEIM_D_30				540</div><div class='add'>+MX53_PAD_EIM_D30__GPIO3_30				541</div><div class='add'>+MX53_PAD_EIM_D30__UART3_CTS				542</div><div class='add'>+MX53_PAD_EIM_D30__IPU_CSI0_D_3				543</div><div class='add'>+MX53_PAD_EIM_D30__IPU_DI0_PIN11				544</div><div class='add'>+MX53_PAD_EIM_D30__IPU_DISP1_DAT_21			545</div><div class='add'>+MX53_PAD_EIM_D30__USBOH3_USBH1_OC			546</div><div class='add'>+MX53_PAD_EIM_D30__USBOH3_USBH2_OC			547</div><div class='add'>+MX53_PAD_EIM_D31__EMI_WEIM_D_31				548</div><div class='add'>+MX53_PAD_EIM_D31__GPIO3_31				549</div><div class='add'>+MX53_PAD_EIM_D31__UART3_RTS				550</div><div class='add'>+MX53_PAD_EIM_D31__IPU_CSI0_D_2				551</div><div class='add'>+MX53_PAD_EIM_D31__IPU_DI0_PIN12				552</div><div class='add'>+MX53_PAD_EIM_D31__IPU_DISP1_DAT_20			553</div><div class='add'>+MX53_PAD_EIM_D31__USBOH3_USBH1_PWR			554</div><div class='add'>+MX53_PAD_EIM_D31__USBOH3_USBH2_PWR			555</div><div class='add'>+MX53_PAD_EIM_A24__EMI_WEIM_A_24				556</div><div class='add'>+MX53_PAD_EIM_A24__GPIO5_4				557</div><div class='add'>+MX53_PAD_EIM_A24__IPU_DISP1_DAT_19			558</div><div class='add'>+MX53_PAD_EIM_A24__IPU_CSI1_D_19				559</div><div class='add'>+MX53_PAD_EIM_A24__IPU_SISG_2				560</div><div class='add'>+MX53_PAD_EIM_A24__USBPHY2_BVALID			561</div><div class='add'>+MX53_PAD_EIM_A23__EMI_WEIM_A_23				562</div><div class='add'>+MX53_PAD_EIM_A23__GPIO6_6				563</div><div class='add'>+MX53_PAD_EIM_A23__IPU_DISP1_DAT_18			564</div><div class='add'>+MX53_PAD_EIM_A23__IPU_CSI1_D_18				565</div><div class='add'>+MX53_PAD_EIM_A23__IPU_SISG_3				566</div><div class='add'>+MX53_PAD_EIM_A23__USBPHY2_ENDSESSION			567</div><div class='add'>+MX53_PAD_EIM_A22__EMI_WEIM_A_22				568</div><div class='add'>+MX53_PAD_EIM_A22__GPIO2_16				569</div><div class='add'>+MX53_PAD_EIM_A22__IPU_DISP1_DAT_17			570</div><div class='add'>+MX53_PAD_EIM_A22__IPU_CSI1_D_17				571</div><div class='add'>+MX53_PAD_EIM_A22__SRC_BT_CFG1_7				572</div><div class='add'>+MX53_PAD_EIM_A21__EMI_WEIM_A_21				573</div><div class='add'>+MX53_PAD_EIM_A21__GPIO2_17				574</div><div class='add'>+MX53_PAD_EIM_A21__IPU_DISP1_DAT_16			575</div><div class='add'>+MX53_PAD_EIM_A21__IPU_CSI1_D_16				576</div><div class='add'>+MX53_PAD_EIM_A21__SRC_BT_CFG1_6				577</div><div class='add'>+MX53_PAD_EIM_A20__EMI_WEIM_A_20				578</div><div class='add'>+MX53_PAD_EIM_A20__GPIO2_18				579</div><div class='add'>+MX53_PAD_EIM_A20__IPU_DISP1_DAT_15			580</div><div class='add'>+MX53_PAD_EIM_A20__IPU_CSI1_D_15				581</div><div class='add'>+MX53_PAD_EIM_A20__SRC_BT_CFG1_5				582</div><div class='add'>+MX53_PAD_EIM_A19__EMI_WEIM_A_19				583</div><div class='add'>+MX53_PAD_EIM_A19__GPIO2_19				584</div><div class='add'>+MX53_PAD_EIM_A19__IPU_DISP1_DAT_14			585</div><div class='add'>+MX53_PAD_EIM_A19__IPU_CSI1_D_14				586</div><div class='add'>+MX53_PAD_EIM_A19__SRC_BT_CFG1_4				587</div><div class='add'>+MX53_PAD_EIM_A18__EMI_WEIM_A_18				588</div><div class='add'>+MX53_PAD_EIM_A18__GPIO2_20				589</div><div class='add'>+MX53_PAD_EIM_A18__IPU_DISP1_DAT_13			590</div><div class='add'>+MX53_PAD_EIM_A18__IPU_CSI1_D_13				591</div><div class='add'>+MX53_PAD_EIM_A18__SRC_BT_CFG1_3				592</div><div class='add'>+MX53_PAD_EIM_A17__EMI_WEIM_A_17				593</div><div class='add'>+MX53_PAD_EIM_A17__GPIO2_21				594</div><div class='add'>+MX53_PAD_EIM_A17__IPU_DISP1_DAT_12			595</div><div class='add'>+MX53_PAD_EIM_A17__IPU_CSI1_D_12				596</div><div class='add'>+MX53_PAD_EIM_A17__SRC_BT_CFG1_2				597</div><div class='add'>+MX53_PAD_EIM_A16__EMI_WEIM_A_16				598</div><div class='add'>+MX53_PAD_EIM_A16__GPIO2_22				599</div><div class='add'>+MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK			600</div><div class='add'>+MX53_PAD_EIM_A16__IPU_CSI1_PIXCLK			601</div><div class='add'>+MX53_PAD_EIM_A16__SRC_BT_CFG1_1				602</div><div class='add'>+MX53_PAD_EIM_CS0__EMI_WEIM_CS_0				603</div><div class='add'>+MX53_PAD_EIM_CS0__GPIO2_23				604</div><div class='add'>+MX53_PAD_EIM_CS0__ECSPI2_SCLK				605</div><div class='add'>+MX53_PAD_EIM_CS0__IPU_DI1_PIN5				606</div><div class='add'>+MX53_PAD_EIM_CS1__EMI_WEIM_CS_1				607</div><div class='add'>+MX53_PAD_EIM_CS1__GPIO2_24				608</div><div class='add'>+MX53_PAD_EIM_CS1__ECSPI2_MOSI				609</div><div class='add'>+MX53_PAD_EIM_CS1__IPU_DI1_PIN6				610</div><div class='add'>+MX53_PAD_EIM_OE__EMI_WEIM_OE				611</div><div class='add'>+MX53_PAD_EIM_OE__GPIO2_25				612</div><div class='add'>+MX53_PAD_EIM_OE__ECSPI2_MISO				613</div><div class='add'>+MX53_PAD_EIM_OE__IPU_DI1_PIN7				614</div><div class='add'>+MX53_PAD_EIM_OE__USBPHY2_IDDIG				615</div><div class='add'>+MX53_PAD_EIM_RW__EMI_WEIM_RW				616</div><div class='add'>+MX53_PAD_EIM_RW__GPIO2_26				617</div><div class='add'>+MX53_PAD_EIM_RW__ECSPI2_SS0				618</div><div class='add'>+MX53_PAD_EIM_RW__IPU_DI1_PIN8				619</div><div class='add'>+MX53_PAD_EIM_RW__USBPHY2_HOSTDISCONNECT			620</div><div class='add'>+MX53_PAD_EIM_LBA__EMI_WEIM_LBA				621</div><div class='add'>+MX53_PAD_EIM_LBA__GPIO2_27				622</div><div class='add'>+MX53_PAD_EIM_LBA__ECSPI2_SS1				623</div><div class='add'>+MX53_PAD_EIM_LBA__IPU_DI1_PIN17				624</div><div class='add'>+MX53_PAD_EIM_LBA__SRC_BT_CFG1_0				625</div><div class='add'>+MX53_PAD_EIM_EB0__EMI_WEIM_EB_0				626</div><div class='add'>+MX53_PAD_EIM_EB0__GPIO2_28				627</div><div class='add'>+MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11			628</div><div class='add'>+MX53_PAD_EIM_EB0__IPU_CSI1_D_11				629</div><div class='add'>+MX53_PAD_EIM_EB0__GPC_PMIC_RDY				630</div><div class='add'>+MX53_PAD_EIM_EB0__SRC_BT_CFG2_7				631</div><div class='add'>+MX53_PAD_EIM_EB1__EMI_WEIM_EB_1				632</div><div class='add'>+MX53_PAD_EIM_EB1__GPIO2_29				633</div><div class='add'>+MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10			634</div><div class='add'>+MX53_PAD_EIM_EB1__IPU_CSI1_D_10				635</div><div class='add'>+MX53_PAD_EIM_EB1__SRC_BT_CFG2_6				636</div><div class='add'>+MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0			637</div><div class='add'>+MX53_PAD_EIM_DA0__GPIO3_0				638</div><div class='add'>+MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9			639</div><div class='add'>+MX53_PAD_EIM_DA0__IPU_CSI1_D_9				640</div><div class='add'>+MX53_PAD_EIM_DA0__SRC_BT_CFG2_5				641</div><div class='add'>+MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1			642</div><div class='add'>+MX53_PAD_EIM_DA1__GPIO3_1				643</div><div class='add'>+MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8			644</div><div class='add'>+MX53_PAD_EIM_DA1__IPU_CSI1_D_8				645</div><div class='add'>+MX53_PAD_EIM_DA1__SRC_BT_CFG2_4				646</div><div class='add'>+MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2			647</div><div class='add'>+MX53_PAD_EIM_DA2__GPIO3_2				648</div><div class='add'>+MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7			649</div><div class='add'>+MX53_PAD_EIM_DA2__IPU_CSI1_D_7				650</div><div class='add'>+MX53_PAD_EIM_DA2__SRC_BT_CFG2_3				651</div><div class='add'>+MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3			652</div><div class='add'>+MX53_PAD_EIM_DA3__GPIO3_3				653</div><div class='add'>+MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6			654</div><div class='add'>+MX53_PAD_EIM_DA3__IPU_CSI1_D_6				655</div><div class='add'>+MX53_PAD_EIM_DA3__SRC_BT_CFG2_2				656</div><div class='add'>+MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4			657</div><div class='add'>+MX53_PAD_EIM_DA4__GPIO3_4				658</div><div class='add'>+MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5			659</div><div class='add'>+MX53_PAD_EIM_DA4__IPU_CSI1_D_5				660</div><div class='add'>+MX53_PAD_EIM_DA4__SRC_BT_CFG3_7				661</div><div class='add'>+MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5			662</div><div class='add'>+MX53_PAD_EIM_DA5__GPIO3_5				663</div><div class='add'>+MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4			664</div><div class='add'>+MX53_PAD_EIM_DA5__IPU_CSI1_D_4				665</div><div class='add'>+MX53_PAD_EIM_DA5__SRC_BT_CFG3_6				666</div><div class='add'>+MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6			667</div><div class='add'>+MX53_PAD_EIM_DA6__GPIO3_6				668</div><div class='add'>+MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3			669</div><div class='add'>+MX53_PAD_EIM_DA6__IPU_CSI1_D_3				670</div><div class='add'>+MX53_PAD_EIM_DA6__SRC_BT_CFG3_5				671</div><div class='add'>+MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7			672</div><div class='add'>+MX53_PAD_EIM_DA7__GPIO3_7				673</div><div class='add'>+MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2			674</div><div class='add'>+MX53_PAD_EIM_DA7__IPU_CSI1_D_2				675</div><div class='add'>+MX53_PAD_EIM_DA7__SRC_BT_CFG3_4				676</div><div class='add'>+MX53_PAD_EIM_DA8__EMI_NAND_WEIM_DA_8			677</div><div class='add'>+MX53_PAD_EIM_DA8__GPIO3_8				678</div><div class='add'>+MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1			679</div><div class='add'>+MX53_PAD_EIM_DA8__IPU_CSI1_D_1				680</div><div class='add'>+MX53_PAD_EIM_DA8__SRC_BT_CFG3_3				681</div><div class='add'>+MX53_PAD_EIM_DA9__EMI_NAND_WEIM_DA_9			682</div><div class='add'>+MX53_PAD_EIM_DA9__GPIO3_9				683</div><div class='add'>+MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0			684</div><div class='add'>+MX53_PAD_EIM_DA9__IPU_CSI1_D_0				685</div><div class='add'>+MX53_PAD_EIM_DA9__SRC_BT_CFG3_2				686</div><div class='add'>+MX53_PAD_EIM_DA10__EMI_NAND_WEIM_DA_10			687</div><div class='add'>+MX53_PAD_EIM_DA10__GPIO3_10				688</div><div class='add'>+MX53_PAD_EIM_DA10__IPU_DI1_PIN15			689</div><div class='add'>+MX53_PAD_EIM_DA10__IPU_CSI1_DATA_EN			690</div><div class='add'>+MX53_PAD_EIM_DA10__SRC_BT_CFG3_1			691</div><div class='add'>+MX53_PAD_EIM_DA11__EMI_NAND_WEIM_DA_11			692</div><div class='add'>+MX53_PAD_EIM_DA11__GPIO3_11				693</div><div class='add'>+MX53_PAD_EIM_DA11__IPU_DI1_PIN2				694</div><div class='add'>+MX53_PAD_EIM_DA11__IPU_CSI1_HSYNC			695</div><div class='add'>+MX53_PAD_EIM_DA12__EMI_NAND_WEIM_DA_12			696</div><div class='add'>+MX53_PAD_EIM_DA12__GPIO3_12				697</div><div class='add'>+MX53_PAD_EIM_DA12__IPU_DI1_PIN3				698</div><div class='add'>+MX53_PAD_EIM_DA12__IPU_CSI1_VSYNC			699</div><div class='add'>+MX53_PAD_EIM_DA13__EMI_NAND_WEIM_DA_13			700</div><div class='add'>+MX53_PAD_EIM_DA13__GPIO3_13				701</div><div class='add'>+MX53_PAD_EIM_DA13__IPU_DI1_D0_CS			702</div><div class='add'>+MX53_PAD_EIM_DA13__CCM_DI1_EXT_CLK			703</div><div class='add'>+MX53_PAD_EIM_DA14__EMI_NAND_WEIM_DA_14			704</div><div class='add'>+MX53_PAD_EIM_DA14__GPIO3_14				705</div><div class='add'>+MX53_PAD_EIM_DA14__IPU_DI1_D1_CS			706</div><div class='add'>+MX53_PAD_EIM_DA14__CCM_DI0_EXT_CLK			707</div><div class='add'>+MX53_PAD_EIM_DA15__EMI_NAND_WEIM_DA_15			708</div><div class='add'>+MX53_PAD_EIM_DA15__GPIO3_15				709</div><div class='add'>+MX53_PAD_EIM_DA15__IPU_DI1_PIN1				710</div><div class='add'>+MX53_PAD_EIM_DA15__IPU_DI1_PIN4				711</div><div class='add'>+MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B			712</div><div class='add'>+MX53_PAD_NANDF_WE_B__GPIO6_12				713</div><div class='add'>+MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B			714</div><div class='add'>+MX53_PAD_NANDF_RE_B__GPIO6_13				715</div><div class='add'>+MX53_PAD_EIM_WAIT__EMI_WEIM_WAIT			716</div><div class='add'>+MX53_PAD_EIM_WAIT__GPIO5_0				717</div><div class='add'>+MX53_PAD_EIM_WAIT__EMI_WEIM_DTACK_B			718</div><div class='add'>+MX53_PAD_LVDS1_TX3_P__GPIO6_22				719</div><div class='add'>+MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3			720</div><div class='add'>+MX53_PAD_LVDS1_TX2_P__GPIO6_24				721</div><div class='add'>+MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2			722</div><div class='add'>+MX53_PAD_LVDS1_CLK_P__GPIO6_26				723</div><div class='add'>+MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK			724</div><div class='add'>+MX53_PAD_LVDS1_TX1_P__GPIO6_28				725</div><div class='add'>+MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1			726</div><div class='add'>+MX53_PAD_LVDS1_TX0_P__GPIO6_30				727</div><div class='add'>+MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0			728</div><div class='add'>+MX53_PAD_LVDS0_TX3_P__GPIO7_22				729</div><div class='add'>+MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3			730</div><div class='add'>+MX53_PAD_LVDS0_CLK_P__GPIO7_24				731</div><div class='add'>+MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK			732</div><div class='add'>+MX53_PAD_LVDS0_TX2_P__GPIO7_26				733</div><div class='add'>+MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2			734</div><div class='add'>+MX53_PAD_LVDS0_TX1_P__GPIO7_28				735</div><div class='add'>+MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1			736</div><div class='add'>+MX53_PAD_LVDS0_TX0_P__GPIO7_30				737</div><div class='add'>+MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0			738</div><div class='add'>+MX53_PAD_GPIO_10__GPIO4_0				739</div><div class='add'>+MX53_PAD_GPIO_10__OSC32k_32K_OUT			740</div><div class='add'>+MX53_PAD_GPIO_11__GPIO4_1				741</div><div class='add'>+MX53_PAD_GPIO_12__GPIO4_2				742</div><div class='add'>+MX53_PAD_GPIO_13__GPIO4_3				743</div><div class='add'>+MX53_PAD_GPIO_14__GPIO4_4				744</div><div class='add'>+MX53_PAD_NANDF_CLE__EMI_NANDF_CLE			745</div><div class='add'>+MX53_PAD_NANDF_CLE__GPIO6_7				746</div><div class='add'>+MX53_PAD_NANDF_CLE__USBPHY1_VSTATUS_0			747</div><div class='add'>+MX53_PAD_NANDF_ALE__EMI_NANDF_ALE			748</div><div class='add'>+MX53_PAD_NANDF_ALE__GPIO6_8				749</div><div class='add'>+MX53_PAD_NANDF_ALE__USBPHY1_VSTATUS_1			750</div><div class='add'>+MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B			751</div><div class='add'>+MX53_PAD_NANDF_WP_B__GPIO6_9				752</div><div class='add'>+MX53_PAD_NANDF_WP_B__USBPHY1_VSTATUS_2			753</div><div class='add'>+MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0			754</div><div class='add'>+MX53_PAD_NANDF_RB0__GPIO6_10				755</div><div class='add'>+MX53_PAD_NANDF_RB0__USBPHY1_VSTATUS_3			756</div><div class='add'>+MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0			757</div><div class='add'>+MX53_PAD_NANDF_CS0__GPIO6_11				758</div><div class='add'>+MX53_PAD_NANDF_CS0__USBPHY1_VSTATUS_4			759</div><div class='add'>+MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1			760</div><div class='add'>+MX53_PAD_NANDF_CS1__GPIO6_14				761</div><div class='add'>+MX53_PAD_NANDF_CS1__MLB_MLBCLK				762</div><div class='add'>+MX53_PAD_NANDF_CS1__USBPHY1_VSTATUS_5			763</div><div class='add'>+MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2			764</div><div class='add'>+MX53_PAD_NANDF_CS2__GPIO6_15				765</div><div class='add'>+MX53_PAD_NANDF_CS2__IPU_SISG_0				766</div><div class='add'>+MX53_PAD_NANDF_CS2__ESAI1_TX0				767</div><div class='add'>+MX53_PAD_NANDF_CS2__EMI_WEIM_CRE			768</div><div class='add'>+MX53_PAD_NANDF_CS2__CCM_CSI0_MCLK			769</div><div class='add'>+MX53_PAD_NANDF_CS2__MLB_MLBSIG				770</div><div class='add'>+MX53_PAD_NANDF_CS2__USBPHY1_VSTATUS_6			771</div><div class='add'>+MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3			772</div><div class='add'>+MX53_PAD_NANDF_CS3__GPIO6_16				773</div><div class='add'>+MX53_PAD_NANDF_CS3__IPU_SISG_1				774</div><div class='add'>+MX53_PAD_NANDF_CS3__ESAI1_TX1				775</div><div class='add'>+MX53_PAD_NANDF_CS3__EMI_WEIM_A_26			776</div><div class='add'>+MX53_PAD_NANDF_CS3__MLB_MLBDAT				777</div><div class='add'>+MX53_PAD_NANDF_CS3__USBPHY1_VSTATUS_7			778</div><div class='add'>+MX53_PAD_FEC_MDIO__FEC_MDIO				779</div><div class='add'>+MX53_PAD_FEC_MDIO__GPIO1_22				780</div><div class='add'>+MX53_PAD_FEC_MDIO__ESAI1_SCKR				781</div><div class='add'>+MX53_PAD_FEC_MDIO__FEC_COL				782</div><div class='add'>+MX53_PAD_FEC_MDIO__RTC_CE_RTC_PS2			783</div><div class='add'>+MX53_PAD_FEC_MDIO__SDMA_DEBUG_BUS_DEVICE_3		784</div><div class='add'>+MX53_PAD_FEC_MDIO__EMI_EMI_DEBUG_49			785</div><div class='add'>+MX53_PAD_FEC_REF_CLK__FEC_TX_CLK			786</div><div class='add'>+MX53_PAD_FEC_REF_CLK__GPIO1_23				787</div><div class='add'>+MX53_PAD_FEC_REF_CLK__ESAI1_FSR				788</div><div class='add'>+MX53_PAD_FEC_REF_CLK__SDMA_DEBUG_BUS_DEVICE_4		789</div><div class='add'>+MX53_PAD_FEC_REF_CLK__EMI_EMI_DEBUG_50			790</div><div class='add'>+MX53_PAD_FEC_RX_ER__FEC_RX_ER				791</div><div class='add'>+MX53_PAD_FEC_RX_ER__GPIO1_24				792</div><div class='add'>+MX53_PAD_FEC_RX_ER__ESAI1_HCKR				793</div><div class='add'>+MX53_PAD_FEC_RX_ER__FEC_RX_CLK				794</div><div class='add'>+MX53_PAD_FEC_RX_ER__RTC_CE_RTC_PS3			795</div><div class='add'>+MX53_PAD_FEC_CRS_DV__FEC_RX_DV				796</div><div class='add'>+MX53_PAD_FEC_CRS_DV__GPIO1_25				797</div><div class='add'>+MX53_PAD_FEC_CRS_DV__ESAI1_SCKT				798</div><div class='add'>+MX53_PAD_FEC_RXD1__FEC_RDATA_1				799</div><div class='add'>+MX53_PAD_FEC_RXD1__GPIO1_26				800</div><div class='add'>+MX53_PAD_FEC_RXD1__ESAI1_FST				801</div><div class='add'>+MX53_PAD_FEC_RXD1__MLB_MLBSIG				802</div><div class='add'>+MX53_PAD_FEC_RXD1__RTC_CE_RTC_PS1			803</div><div class='add'>+MX53_PAD_FEC_RXD0__FEC_RDATA_0				804</div><div class='add'>+MX53_PAD_FEC_RXD0__GPIO1_27				805</div><div class='add'>+MX53_PAD_FEC_RXD0__ESAI1_HCKT				806</div><div class='add'>+MX53_PAD_FEC_RXD0__OSC32k_32K_OUT			807</div><div class='add'>+MX53_PAD_FEC_TX_EN__FEC_TX_EN				808</div><div class='add'>+MX53_PAD_FEC_TX_EN__GPIO1_28				809</div><div class='add'>+MX53_PAD_FEC_TX_EN__ESAI1_TX3_RX2			810</div><div class='add'>+MX53_PAD_FEC_TXD1__FEC_TDATA_1				811</div><div class='add'>+MX53_PAD_FEC_TXD1__GPIO1_29				812</div><div class='add'>+MX53_PAD_FEC_TXD1__ESAI1_TX2_RX3			813</div><div class='add'>+MX53_PAD_FEC_TXD1__MLB_MLBCLK				814</div><div class='add'>+MX53_PAD_FEC_TXD1__RTC_CE_RTC_PRSC_CLK			815</div><div class='add'>+MX53_PAD_FEC_TXD0__FEC_TDATA_0				816</div><div class='add'>+MX53_PAD_FEC_TXD0__GPIO1_30				817</div><div class='add'>+MX53_PAD_FEC_TXD0__ESAI1_TX4_RX1			818</div><div class='add'>+MX53_PAD_FEC_TXD0__USBPHY2_DATAOUT_0			819</div><div class='add'>+MX53_PAD_FEC_MDC__FEC_MDC				820</div><div class='add'>+MX53_PAD_FEC_MDC__GPIO1_31				821</div><div class='add'>+MX53_PAD_FEC_MDC__ESAI1_TX5_RX0				822</div><div class='add'>+MX53_PAD_FEC_MDC__MLB_MLBDAT				823</div><div class='add'>+MX53_PAD_FEC_MDC__RTC_CE_RTC_ALARM1_TRIG		824</div><div class='add'>+MX53_PAD_FEC_MDC__USBPHY2_DATAOUT_1			825</div><div class='add'>+MX53_PAD_PATA_DIOW__PATA_DIOW				826</div><div class='add'>+MX53_PAD_PATA_DIOW__GPIO6_17				827</div><div class='add'>+MX53_PAD_PATA_DIOW__UART1_TXD_MUX			828</div><div class='add'>+MX53_PAD_PATA_DIOW__USBPHY2_DATAOUT_2			829</div><div class='add'>+MX53_PAD_PATA_DMACK__PATA_DMACK				830</div><div class='add'>+MX53_PAD_PATA_DMACK__GPIO6_18				831</div><div class='add'>+MX53_PAD_PATA_DMACK__UART1_RXD_MUX			832</div><div class='add'>+MX53_PAD_PATA_DMACK__USBPHY2_DATAOUT_3			833</div><div class='add'>+MX53_PAD_PATA_DMARQ__PATA_DMARQ				834</div><div class='add'>+MX53_PAD_PATA_DMARQ__GPIO7_0				835</div><div class='add'>+MX53_PAD_PATA_DMARQ__UART2_TXD_MUX			836</div><div class='add'>+MX53_PAD_PATA_DMARQ__CCM_CCM_OUT_0			837</div><div class='add'>+MX53_PAD_PATA_DMARQ__USBPHY2_DATAOUT_4			838</div><div class='add'>+MX53_PAD_PATA_BUFFER_EN__PATA_BUFFER_EN			839</div><div class='add'>+MX53_PAD_PATA_BUFFER_EN__GPIO7_1			840</div><div class='add'>+MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX			841</div><div class='add'>+MX53_PAD_PATA_BUFFER_EN__CCM_CCM_OUT_1			842</div><div class='add'>+MX53_PAD_PATA_BUFFER_EN__USBPHY2_DATAOUT_5		843</div><div class='add'>+MX53_PAD_PATA_INTRQ__PATA_INTRQ				844</div><div class='add'>+MX53_PAD_PATA_INTRQ__GPIO7_2				845</div><div class='add'>+MX53_PAD_PATA_INTRQ__UART2_CTS				846</div><div class='add'>+MX53_PAD_PATA_INTRQ__CAN1_TXCAN				847</div><div class='add'>+MX53_PAD_PATA_INTRQ__CCM_CCM_OUT_2			848</div><div class='add'>+MX53_PAD_PATA_INTRQ__USBPHY2_DATAOUT_6			849</div><div class='add'>+MX53_PAD_PATA_DIOR__PATA_DIOR				850</div><div class='add'>+MX53_PAD_PATA_DIOR__GPIO7_3				851</div><div class='add'>+MX53_PAD_PATA_DIOR__UART2_RTS				852</div><div class='add'>+MX53_PAD_PATA_DIOR__CAN1_RXCAN				853</div><div class='add'>+MX53_PAD_PATA_DIOR__USBPHY2_DATAOUT_7			854</div><div class='add'>+MX53_PAD_PATA_RESET_B__PATA_PATA_RESET_B		855</div><div class='add'>+MX53_PAD_PATA_RESET_B__GPIO7_4				856</div><div class='add'>+MX53_PAD_PATA_RESET_B__ESDHC3_CMD			857</div><div class='add'>+MX53_PAD_PATA_RESET_B__UART1_CTS			858</div><div class='add'>+MX53_PAD_PATA_RESET_B__CAN2_TXCAN			859</div><div class='add'>+MX53_PAD_PATA_RESET_B__USBPHY1_DATAOUT_0		860</div><div class='add'>+MX53_PAD_PATA_IORDY__PATA_IORDY				861</div><div class='add'>+MX53_PAD_PATA_IORDY__GPIO7_5				862</div><div class='add'>+MX53_PAD_PATA_IORDY__ESDHC3_CLK				863</div><div class='add'>+MX53_PAD_PATA_IORDY__UART1_RTS				864</div><div class='add'>+MX53_PAD_PATA_IORDY__CAN2_RXCAN				865</div><div class='add'>+MX53_PAD_PATA_IORDY__USBPHY1_DATAOUT_1			866</div><div class='add'>+MX53_PAD_PATA_DA_0__PATA_DA_0				867</div><div class='add'>+MX53_PAD_PATA_DA_0__GPIO7_6				868</div><div class='add'>+MX53_PAD_PATA_DA_0__ESDHC3_RST				869</div><div class='add'>+MX53_PAD_PATA_DA_0__OWIRE_LINE				870</div><div class='add'>+MX53_PAD_PATA_DA_0__USBPHY1_DATAOUT_2			871</div><div class='add'>+MX53_PAD_PATA_DA_1__PATA_DA_1				872</div><div class='add'>+MX53_PAD_PATA_DA_1__GPIO7_7				873</div><div class='add'>+MX53_PAD_PATA_DA_1__ESDHC4_CMD				874</div><div class='add'>+MX53_PAD_PATA_DA_1__UART3_CTS				875</div><div class='add'>+MX53_PAD_PATA_DA_1__USBPHY1_DATAOUT_3			876</div><div class='add'>+MX53_PAD_PATA_DA_2__PATA_DA_2				877</div><div class='add'>+MX53_PAD_PATA_DA_2__GPIO7_8				878</div><div class='add'>+MX53_PAD_PATA_DA_2__ESDHC4_CLK				879</div><div class='add'>+MX53_PAD_PATA_DA_2__UART3_RTS				880</div><div class='add'>+MX53_PAD_PATA_DA_2__USBPHY1_DATAOUT_4			881</div><div class='add'>+MX53_PAD_PATA_CS_0__PATA_CS_0				882</div><div class='add'>+MX53_PAD_PATA_CS_0__GPIO7_9				883</div><div class='add'>+MX53_PAD_PATA_CS_0__UART3_TXD_MUX			884</div><div class='add'>+MX53_PAD_PATA_CS_0__USBPHY1_DATAOUT_5			885</div><div class='add'>+MX53_PAD_PATA_CS_1__PATA_CS_1				886</div><div class='add'>+MX53_PAD_PATA_CS_1__GPIO7_10				887</div><div class='add'>+MX53_PAD_PATA_CS_1__UART3_RXD_MUX			888</div><div class='add'>+MX53_PAD_PATA_CS_1__USBPHY1_DATAOUT_6			889</div><div class='add'>+MX53_PAD_PATA_DATA0__PATA_DATA_0			890</div><div class='add'>+MX53_PAD_PATA_DATA0__GPIO2_0				891</div><div class='add'>+MX53_PAD_PATA_DATA0__EMI_NANDF_D_0			892</div><div class='add'>+MX53_PAD_PATA_DATA0__ESDHC3_DAT4			893</div><div class='add'>+MX53_PAD_PATA_DATA0__GPU3d_GPU_DEBUG_OUT_0		894</div><div class='add'>+MX53_PAD_PATA_DATA0__IPU_DIAG_BUS_0			895</div><div class='add'>+MX53_PAD_PATA_DATA0__USBPHY1_DATAOUT_7			896</div><div class='add'>+MX53_PAD_PATA_DATA1__PATA_DATA_1			897</div><div class='add'>+MX53_PAD_PATA_DATA1__GPIO2_1				898</div><div class='add'>+MX53_PAD_PATA_DATA1__EMI_NANDF_D_1			899</div><div class='add'>+MX53_PAD_PATA_DATA1__ESDHC3_DAT5			900</div><div class='add'>+MX53_PAD_PATA_DATA1__GPU3d_GPU_DEBUG_OUT_1		901</div><div class='add'>+MX53_PAD_PATA_DATA1__IPU_DIAG_BUS_1			902</div><div class='add'>+MX53_PAD_PATA_DATA2__PATA_DATA_2			903</div><div class='add'>+MX53_PAD_PATA_DATA2__GPIO2_2				904</div><div class='add'>+MX53_PAD_PATA_DATA2__EMI_NANDF_D_2			905</div><div class='add'>+MX53_PAD_PATA_DATA2__ESDHC3_DAT6			906</div><div class='add'>+MX53_PAD_PATA_DATA2__GPU3d_GPU_DEBUG_OUT_2		907</div><div class='add'>+MX53_PAD_PATA_DATA2__IPU_DIAG_BUS_2			908</div><div class='add'>+MX53_PAD_PATA_DATA3__PATA_DATA_3			909</div><div class='add'>+MX53_PAD_PATA_DATA3__GPIO2_3				910</div><div class='add'>+MX53_PAD_PATA_DATA3__EMI_NANDF_D_3			911</div><div class='add'>+MX53_PAD_PATA_DATA3__ESDHC3_DAT7			912</div><div class='add'>+MX53_PAD_PATA_DATA3__GPU3d_GPU_DEBUG_OUT_3		913</div><div class='add'>+MX53_PAD_PATA_DATA3__IPU_DIAG_BUS_3			914</div><div class='add'>+MX53_PAD_PATA_DATA4__PATA_DATA_4			915</div><div class='add'>+MX53_PAD_PATA_DATA4__GPIO2_4				916</div><div class='add'>+MX53_PAD_PATA_DATA4__EMI_NANDF_D_4			917</div><div class='add'>+MX53_PAD_PATA_DATA4__ESDHC4_DAT4			918</div><div class='add'>+MX53_PAD_PATA_DATA4__GPU3d_GPU_DEBUG_OUT_4		919</div><div class='add'>+MX53_PAD_PATA_DATA4__IPU_DIAG_BUS_4			920</div><div class='add'>+MX53_PAD_PATA_DATA5__PATA_DATA_5			921</div><div class='add'>+MX53_PAD_PATA_DATA5__GPIO2_5				922</div><div class='add'>+MX53_PAD_PATA_DATA5__EMI_NANDF_D_5			923</div><div class='add'>+MX53_PAD_PATA_DATA5__ESDHC4_DAT5			924</div><div class='add'>+MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5		925</div><div class='add'>+MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5			926</div><div class='add'>+MX53_PAD_PATA_DATA6__PATA_DATA_6			927</div><div class='add'>+MX53_PAD_PATA_DATA6__GPIO2_6				928</div><div class='add'>+MX53_PAD_PATA_DATA6__EMI_NANDF_D_6			929</div><div class='add'>+MX53_PAD_PATA_DATA6__ESDHC4_DAT6			930</div><div class='add'>+MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6		931</div><div class='add'>+MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6			932</div><div class='add'>+MX53_PAD_PATA_DATA7__PATA_DATA_7			933</div><div class='add'>+MX53_PAD_PATA_DATA7__GPIO2_7				934</div><div class='add'>+MX53_PAD_PATA_DATA7__EMI_NANDF_D_7			935</div><div class='add'>+MX53_PAD_PATA_DATA7__ESDHC4_DAT7			936</div><div class='add'>+MX53_PAD_PATA_DATA7__GPU3d_GPU_DEBUG_OUT_7		937</div><div class='add'>+MX53_PAD_PATA_DATA7__IPU_DIAG_BUS_7			938</div><div class='add'>+MX53_PAD_PATA_DATA8__PATA_DATA_8			939</div><div class='add'>+MX53_PAD_PATA_DATA8__GPIO2_8				940</div><div class='add'>+MX53_PAD_PATA_DATA8__ESDHC1_DAT4			941</div><div class='add'>+MX53_PAD_PATA_DATA8__EMI_NANDF_D_8			942</div><div class='add'>+MX53_PAD_PATA_DATA8__ESDHC3_DAT0			943</div><div class='add'>+MX53_PAD_PATA_DATA8__GPU3d_GPU_DEBUG_OUT_8		944</div><div class='add'>+MX53_PAD_PATA_DATA8__IPU_DIAG_BUS_8			945</div><div class='add'>+MX53_PAD_PATA_DATA9__PATA_DATA_9			946</div><div class='add'>+MX53_PAD_PATA_DATA9__GPIO2_9				947</div><div class='add'>+MX53_PAD_PATA_DATA9__ESDHC1_DAT5			948</div><div class='add'>+MX53_PAD_PATA_DATA9__EMI_NANDF_D_9			949</div><div class='add'>+MX53_PAD_PATA_DATA9__ESDHC3_DAT1			950</div><div class='add'>+MX53_PAD_PATA_DATA9__GPU3d_GPU_DEBUG_OUT_9		951</div><div class='add'>+MX53_PAD_PATA_DATA9__IPU_DIAG_BUS_9			952</div><div class='add'>+MX53_PAD_PATA_DATA10__PATA_DATA_10			953</div><div class='add'>+MX53_PAD_PATA_DATA10__GPIO2_10				954</div><div class='add'>+MX53_PAD_PATA_DATA10__ESDHC1_DAT6			955</div><div class='add'>+MX53_PAD_PATA_DATA10__EMI_NANDF_D_10			956</div><div class='add'>+MX53_PAD_PATA_DATA10__ESDHC3_DAT2			957</div><div class='add'>+MX53_PAD_PATA_DATA10__GPU3d_GPU_DEBUG_OUT_10		958</div><div class='add'>+MX53_PAD_PATA_DATA10__IPU_DIAG_BUS_10			959</div><div class='add'>+MX53_PAD_PATA_DATA11__PATA_DATA_11			960</div><div class='add'>+MX53_PAD_PATA_DATA11__GPIO2_11				961</div><div class='add'>+MX53_PAD_PATA_DATA11__ESDHC1_DAT7			962</div><div class='add'>+MX53_PAD_PATA_DATA11__EMI_NANDF_D_11			963</div><div class='add'>+MX53_PAD_PATA_DATA11__ESDHC3_DAT3			964</div><div class='add'>+MX53_PAD_PATA_DATA11__GPU3d_GPU_DEBUG_OUT_11		965</div><div class='add'>+MX53_PAD_PATA_DATA11__IPU_DIAG_BUS_11			966</div><div class='add'>+MX53_PAD_PATA_DATA12__PATA_DATA_12			967</div><div class='add'>+MX53_PAD_PATA_DATA12__GPIO2_12				968</div><div class='add'>+MX53_PAD_PATA_DATA12__ESDHC2_DAT4			969</div><div class='add'>+MX53_PAD_PATA_DATA12__EMI_NANDF_D_12			970</div><div class='add'>+MX53_PAD_PATA_DATA12__ESDHC4_DAT0			971</div><div class='add'>+MX53_PAD_PATA_DATA12__GPU3d_GPU_DEBUG_OUT_12		972</div><div class='add'>+MX53_PAD_PATA_DATA12__IPU_DIAG_BUS_12			973</div><div class='add'>+MX53_PAD_PATA_DATA13__PATA_DATA_13			974</div><div class='add'>+MX53_PAD_PATA_DATA13__GPIO2_13				975</div><div class='add'>+MX53_PAD_PATA_DATA13__ESDHC2_DAT5			976</div><div class='add'>+MX53_PAD_PATA_DATA13__EMI_NANDF_D_13			977</div><div class='add'>+MX53_PAD_PATA_DATA13__ESDHC4_DAT1			978</div><div class='add'>+MX53_PAD_PATA_DATA13__GPU3d_GPU_DEBUG_OUT_13		979</div><div class='add'>+MX53_PAD_PATA_DATA13__IPU_DIAG_BUS_13			980</div><div class='add'>+MX53_PAD_PATA_DATA14__PATA_DATA_14			981</div><div class='add'>+MX53_PAD_PATA_DATA14__GPIO2_14				982</div><div class='add'>+MX53_PAD_PATA_DATA14__ESDHC2_DAT6			983</div><div class='add'>+MX53_PAD_PATA_DATA14__EMI_NANDF_D_14			984</div><div class='add'>+MX53_PAD_PATA_DATA14__ESDHC4_DAT2			985</div><div class='add'>+MX53_PAD_PATA_DATA14__GPU3d_GPU_DEBUG_OUT_14		986</div><div class='add'>+MX53_PAD_PATA_DATA14__IPU_DIAG_BUS_14			987</div><div class='add'>+MX53_PAD_PATA_DATA15__PATA_DATA_15			988</div><div class='add'>+MX53_PAD_PATA_DATA15__GPIO2_15				989</div><div class='add'>+MX53_PAD_PATA_DATA15__ESDHC2_DAT7			990</div><div class='add'>+MX53_PAD_PATA_DATA15__EMI_NANDF_D_15			991</div><div class='add'>+MX53_PAD_PATA_DATA15__ESDHC4_DAT3			992</div><div class='add'>+MX53_PAD_PATA_DATA15__GPU3d_GPU_DEBUG_OUT_15		993</div><div class='add'>+MX53_PAD_PATA_DATA15__IPU_DIAG_BUS_15			994</div><div class='add'>+MX53_PAD_SD1_DATA0__ESDHC1_DAT0				995</div><div class='add'>+MX53_PAD_SD1_DATA0__GPIO1_16				996</div><div class='add'>+MX53_PAD_SD1_DATA0__GPT_CAPIN1				997</div><div class='add'>+MX53_PAD_SD1_DATA0__CSPI_MISO				998</div><div class='add'>+MX53_PAD_SD1_DATA0__CCM_PLL3_BYP			999</div><div class='add'>+MX53_PAD_SD1_DATA1__ESDHC1_DAT1				1000</div><div class='add'>+MX53_PAD_SD1_DATA1__GPIO1_17				1001</div><div class='add'>+MX53_PAD_SD1_DATA1__GPT_CAPIN2				1002</div><div class='add'>+MX53_PAD_SD1_DATA1__CSPI_SS0				1003</div><div class='add'>+MX53_PAD_SD1_DATA1__CCM_PLL4_BYP			1004</div><div class='add'>+MX53_PAD_SD1_CMD__ESDHC1_CMD				1005</div><div class='add'>+MX53_PAD_SD1_CMD__GPIO1_18				1006</div><div class='add'>+MX53_PAD_SD1_CMD__GPT_CMPOUT1				1007</div><div class='add'>+MX53_PAD_SD1_CMD__CSPI_MOSI				1008</div><div class='add'>+MX53_PAD_SD1_CMD__CCM_PLL1_BYP				1009</div><div class='add'>+MX53_PAD_SD1_DATA2__ESDHC1_DAT2				1010</div><div class='add'>+MX53_PAD_SD1_DATA2__GPIO1_19				1011</div><div class='add'>+MX53_PAD_SD1_DATA2__GPT_CMPOUT2				1012</div><div class='add'>+MX53_PAD_SD1_DATA2__PWM2_PWMO				1013</div><div class='add'>+MX53_PAD_SD1_DATA2__WDOG1_WDOG_B			1014</div><div class='add'>+MX53_PAD_SD1_DATA2__CSPI_SS1				1015</div><div class='add'>+MX53_PAD_SD1_DATA2__WDOG1_WDOG_RST_B_DEB		1016</div><div class='add'>+MX53_PAD_SD1_DATA2__CCM_PLL2_BYP			1017</div><div class='add'>+MX53_PAD_SD1_CLK__ESDHC1_CLK				1018</div><div class='add'>+MX53_PAD_SD1_CLK__GPIO1_20				1019</div><div class='add'>+MX53_PAD_SD1_CLK__OSC32k_32K_OUT			1020</div><div class='add'>+MX53_PAD_SD1_CLK__GPT_CLKIN				1021</div><div class='add'>+MX53_PAD_SD1_CLK__CSPI_SCLK				1022</div><div class='add'>+MX53_PAD_SD1_CLK__SATA_PHY_DTB_0			1023</div><div class='add'>+MX53_PAD_SD1_DATA3__ESDHC1_DAT3				1024</div><div class='add'>+MX53_PAD_SD1_DATA3__GPIO1_21				1025</div><div class='add'>+MX53_PAD_SD1_DATA3__GPT_CMPOUT3				1026</div><div class='add'>+MX53_PAD_SD1_DATA3__PWM1_PWMO				1027</div><div class='add'>+MX53_PAD_SD1_DATA3__WDOG2_WDOG_B			1028</div><div class='add'>+MX53_PAD_SD1_DATA3__CSPI_SS2				1029</div><div class='add'>+MX53_PAD_SD1_DATA3__WDOG2_WDOG_RST_B_DEB		1030</div><div class='add'>+MX53_PAD_SD1_DATA3__SATA_PHY_DTB_1			1031</div><div class='add'>+MX53_PAD_SD2_CLK__ESDHC2_CLK				1032</div><div class='add'>+MX53_PAD_SD2_CLK__GPIO1_10				1033</div><div class='add'>+MX53_PAD_SD2_CLK__KPP_COL_5				1034</div><div class='add'>+MX53_PAD_SD2_CLK__AUDMUX_AUD4_RXFS			1035</div><div class='add'>+MX53_PAD_SD2_CLK__CSPI_SCLK				1036</div><div class='add'>+MX53_PAD_SD2_CLK__SCC_RANDOM_V				1037</div><div class='add'>+MX53_PAD_SD2_CMD__ESDHC2_CMD				1038</div><div class='add'>+MX53_PAD_SD2_CMD__GPIO1_11				1039</div><div class='add'>+MX53_PAD_SD2_CMD__KPP_ROW_5				1040</div><div class='add'>+MX53_PAD_SD2_CMD__AUDMUX_AUD4_RXC			1041</div><div class='add'>+MX53_PAD_SD2_CMD__CSPI_MOSI				1042</div><div class='add'>+MX53_PAD_SD2_CMD__SCC_RANDOM				1043</div><div class='add'>+MX53_PAD_SD2_DATA3__ESDHC2_DAT3				1044</div><div class='add'>+MX53_PAD_SD2_DATA3__GPIO1_12				1045</div><div class='add'>+MX53_PAD_SD2_DATA3__KPP_COL_6				1046</div><div class='add'>+MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC			1047</div><div class='add'>+MX53_PAD_SD2_DATA3__CSPI_SS2				1048</div><div class='add'>+MX53_PAD_SD2_DATA3__SJC_DONE				1049</div><div class='add'>+MX53_PAD_SD2_DATA2__ESDHC2_DAT2				1050</div><div class='add'>+MX53_PAD_SD2_DATA2__GPIO1_13				1051</div><div class='add'>+MX53_PAD_SD2_DATA2__KPP_ROW_6				1052</div><div class='add'>+MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD			1053</div><div class='add'>+MX53_PAD_SD2_DATA2__CSPI_SS1				1054</div><div class='add'>+MX53_PAD_SD2_DATA2__SJC_FAIL				1055</div><div class='add'>+MX53_PAD_SD2_DATA1__ESDHC2_DAT1				1056</div><div class='add'>+MX53_PAD_SD2_DATA1__GPIO1_14				1057</div><div class='add'>+MX53_PAD_SD2_DATA1__KPP_COL_7				1058</div><div class='add'>+MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS			1059</div><div class='add'>+MX53_PAD_SD2_DATA1__CSPI_SS0				1060</div><div class='add'>+MX53_PAD_SD2_DATA1__RTIC_SEC_VIO			1061</div><div class='add'>+MX53_PAD_SD2_DATA0__ESDHC2_DAT0				1062</div><div class='add'>+MX53_PAD_SD2_DATA0__GPIO1_15				1063</div><div class='add'>+MX53_PAD_SD2_DATA0__KPP_ROW_7				1064</div><div class='add'>+MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD			1065</div><div class='add'>+MX53_PAD_SD2_DATA0__CSPI_MISO				1066</div><div class='add'>+MX53_PAD_SD2_DATA0__RTIC_DONE_INT			1067</div><div class='add'>+MX53_PAD_GPIO_0__CCM_CLKO				1068</div><div class='add'>+MX53_PAD_GPIO_0__GPIO1_0				1069</div><div class='add'>+MX53_PAD_GPIO_0__KPP_COL_5				1070</div><div class='add'>+MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK			1071</div><div class='add'>+MX53_PAD_GPIO_0__EPIT1_EPITO				1072</div><div class='add'>+MX53_PAD_GPIO_0__SRTC_ALARM_DEB				1073</div><div class='add'>+MX53_PAD_GPIO_0__USBOH3_USBH1_PWR			1074</div><div class='add'>+MX53_PAD_GPIO_0__CSU_TD					1075</div><div class='add'>+MX53_PAD_GPIO_1__ESAI1_SCKR				1076</div><div class='add'>+MX53_PAD_GPIO_1__GPIO1_1				1077</div><div class='add'>+MX53_PAD_GPIO_1__KPP_ROW_5				1078</div><div class='add'>+MX53_PAD_GPIO_1__CCM_SSI_EXT2_CLK			1079</div><div class='add'>+MX53_PAD_GPIO_1__PWM2_PWMO				1080</div><div class='add'>+MX53_PAD_GPIO_1__WDOG2_WDOG_B				1081</div><div class='add'>+MX53_PAD_GPIO_1__ESDHC1_CD				1082</div><div class='add'>+MX53_PAD_GPIO_1__SRC_TESTER_ACK				1083</div><div class='add'>+MX53_PAD_GPIO_9__ESAI1_FSR				1084</div><div class='add'>+MX53_PAD_GPIO_9__GPIO1_9				1085</div><div class='add'>+MX53_PAD_GPIO_9__KPP_COL_6				1086</div><div class='add'>+MX53_PAD_GPIO_9__CCM_REF_EN_B				1087</div><div class='add'>+MX53_PAD_GPIO_9__PWM1_PWMO				1088</div><div class='add'>+MX53_PAD_GPIO_9__WDOG1_WDOG_B				1089</div><div class='add'>+MX53_PAD_GPIO_9__ESDHC1_WP				1090</div><div class='add'>+MX53_PAD_GPIO_9__SCC_FAIL_STATE				1091</div><div class='add'>+MX53_PAD_GPIO_3__ESAI1_HCKR				1092</div><div class='add'>+MX53_PAD_GPIO_3__GPIO1_3				1093</div><div class='add'>+MX53_PAD_GPIO_3__I2C3_SCL				1094</div><div class='add'>+MX53_PAD_GPIO_3__DPLLIP1_TOG_EN				1095</div><div class='add'>+MX53_PAD_GPIO_3__CCM_CLKO2				1096</div><div class='add'>+MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0		1097</div><div class='add'>+MX53_PAD_GPIO_3__USBOH3_USBH1_OC			1098</div><div class='add'>+MX53_PAD_GPIO_3__MLB_MLBCLK				1099</div><div class='add'>+MX53_PAD_GPIO_6__ESAI1_SCKT				1100</div><div class='add'>+MX53_PAD_GPIO_6__GPIO1_6				1101</div><div class='add'>+MX53_PAD_GPIO_6__I2C3_SDA				1102</div><div class='add'>+MX53_PAD_GPIO_6__CCM_CCM_OUT_0				1103</div><div class='add'>+MX53_PAD_GPIO_6__CSU_CSU_INT_DEB			1104</div><div class='add'>+MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1		1105</div><div class='add'>+MX53_PAD_GPIO_6__ESDHC2_LCTL				1106</div><div class='add'>+MX53_PAD_GPIO_6__MLB_MLBSIG				1107</div><div class='add'>+MX53_PAD_GPIO_2__ESAI1_FST				1108</div><div class='add'>+MX53_PAD_GPIO_2__GPIO1_2				1109</div><div class='add'>+MX53_PAD_GPIO_2__KPP_ROW_6				1110</div><div class='add'>+MX53_PAD_GPIO_2__CCM_CCM_OUT_1				1111</div><div class='add'>+MX53_PAD_GPIO_2__CSU_CSU_ALARM_AUT_0			1112</div><div class='add'>+MX53_PAD_GPIO_2__OBSERVE_MUX_OBSRV_INT_OUT2		1113</div><div class='add'>+MX53_PAD_GPIO_2__ESDHC2_WP				1114</div><div class='add'>+MX53_PAD_GPIO_2__MLB_MLBDAT				1115</div><div class='add'>+MX53_PAD_GPIO_4__ESAI1_HCKT				1116</div><div class='add'>+MX53_PAD_GPIO_4__GPIO1_4				1117</div><div class='add'>+MX53_PAD_GPIO_4__KPP_COL_7				1118</div><div class='add'>+MX53_PAD_GPIO_4__CCM_CCM_OUT_2				1119</div><div class='add'>+MX53_PAD_GPIO_4__CSU_CSU_ALARM_AUT_1			1120</div><div class='add'>+MX53_PAD_GPIO_4__OBSERVE_MUX_OBSRV_INT_OUT3		1121</div><div class='add'>+MX53_PAD_GPIO_4__ESDHC2_CD				1122</div><div class='add'>+MX53_PAD_GPIO_4__SCC_SEC_STATE				1123</div><div class='add'>+MX53_PAD_GPIO_5__ESAI1_TX2_RX3				1124</div><div class='add'>+MX53_PAD_GPIO_5__GPIO1_5				1125</div><div class='add'>+MX53_PAD_GPIO_5__KPP_ROW_7				1126</div><div class='add'>+MX53_PAD_GPIO_5__CCM_CLKO				1127</div><div class='add'>+MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2			1128</div><div class='add'>+MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4		1129</div><div class='add'>+MX53_PAD_GPIO_5__I2C3_SCL				1130</div><div class='add'>+MX53_PAD_GPIO_5__CCM_PLL1_BYP				1131</div><div class='add'>+MX53_PAD_GPIO_7__ESAI1_TX4_RX1				1132</div><div class='add'>+MX53_PAD_GPIO_7__GPIO1_7				1133</div><div class='add'>+MX53_PAD_GPIO_7__EPIT1_EPITO				1134</div><div class='add'>+MX53_PAD_GPIO_7__CAN1_TXCAN				1135</div><div class='add'>+MX53_PAD_GPIO_7__UART2_TXD_MUX				1136</div><div class='add'>+MX53_PAD_GPIO_7__FIRI_RXD				1137</div><div class='add'>+MX53_PAD_GPIO_7__SPDIF_PLOCK				1138</div><div class='add'>+MX53_PAD_GPIO_7__CCM_PLL2_BYP				1139</div><div class='add'>+MX53_PAD_GPIO_8__ESAI1_TX5_RX0				1140</div><div class='add'>+MX53_PAD_GPIO_8__GPIO1_8				1141</div><div class='add'>+MX53_PAD_GPIO_8__EPIT2_EPITO				1142</div><div class='add'>+MX53_PAD_GPIO_8__CAN1_RXCAN				1143</div><div class='add'>+MX53_PAD_GPIO_8__UART2_RXD_MUX				1144</div><div class='add'>+MX53_PAD_GPIO_8__FIRI_TXD				1145</div><div class='add'>+MX53_PAD_GPIO_8__SPDIF_SRCLK				1146</div><div class='add'>+MX53_PAD_GPIO_8__CCM_PLL3_BYP				1147</div><div class='add'>+MX53_PAD_GPIO_16__ESAI1_TX3_RX2				1148</div><div class='add'>+MX53_PAD_GPIO_16__GPIO7_11				1149</div><div class='add'>+MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT			1150</div><div class='add'>+MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1			1151</div><div class='add'>+MX53_PAD_GPIO_16__SPDIF_IN1				1152</div><div class='add'>+MX53_PAD_GPIO_16__I2C3_SDA				1153</div><div class='add'>+MX53_PAD_GPIO_16__SJC_DE_B				1154</div><div class='add'>+MX53_PAD_GPIO_17__ESAI1_TX0				1155</div><div class='add'>+MX53_PAD_GPIO_17__GPIO7_12				1156</div><div class='add'>+MX53_PAD_GPIO_17__SDMA_EXT_EVENT_0			1157</div><div class='add'>+MX53_PAD_GPIO_17__GPC_PMIC_RDY				1158</div><div class='add'>+MX53_PAD_GPIO_17__RTC_CE_RTC_FSV_TRIG			1159</div><div class='add'>+MX53_PAD_GPIO_17__SPDIF_OUT1				1160</div><div class='add'>+MX53_PAD_GPIO_17__IPU_SNOOP2				1161</div><div class='add'>+MX53_PAD_GPIO_17__SJC_JTAG_ACT				1162</div><div class='add'>+MX53_PAD_GPIO_18__ESAI1_TX1				1163</div><div class='add'>+MX53_PAD_GPIO_18__GPIO7_13				1164</div><div class='add'>+MX53_PAD_GPIO_18__SDMA_EXT_EVENT_1			1165</div><div class='add'>+MX53_PAD_GPIO_18__OWIRE_LINE				1166</div><div class='add'>+MX53_PAD_GPIO_18__RTC_CE_RTC_ALARM2_TRIG		1167</div><div class='add'>+MX53_PAD_GPIO_18__CCM_ASRC_EXT_CLK			1168</div><div class='add'>+MX53_PAD_GPIO_18__ESDHC1_LCTL				1169</div><div class='add'>+MX53_PAD_GPIO_18__SRC_SYSTEM_RST			1170</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt<br/>new file mode 100644<br/>index 000000000000..82b43f915857<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt</a></div><div class='hunk'>@@ -0,0 +1,1628 @@</div><div class='add'>+* Freescale IMX6Q IOMUX Controller</div><div class='add'>+</div><div class='add'>+Please refer to fsl,imx-pinctrl.txt in this directory for common binding part</div><div class='add'>+and usage.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "fsl,imx6q-iomuxc"</div><div class='add'>+- fsl,pins: two integers array, represents a group of pins mux and config</div><div class='add'>+  setting. The format is fsl,pins = &lt;PIN_FUNC_ID CONFIG&gt;, PIN_FUNC_ID is a</div><div class='add'>+  pin working on a specific function, CONFIG is the pad setting value like</div><div class='add'>+  pull-up for this pin. Please refer to imx6q datasheet for the valid pad</div><div class='add'>+  config settings.</div><div class='add'>+</div><div class='add'>+CONFIG bits definition:</div><div class='add'>+PAD_CTL_HYS                     (1 &lt;&lt; 16)</div><div class='add'>+PAD_CTL_PUS_100K_DOWN           (0 &lt;&lt; 14)</div><div class='add'>+PAD_CTL_PUS_47K_UP              (1 &lt;&lt; 14)</div><div class='add'>+PAD_CTL_PUS_100K_UP             (2 &lt;&lt; 14)</div><div class='add'>+PAD_CTL_PUS_22K_UP              (3 &lt;&lt; 14)</div><div class='add'>+PAD_CTL_PUE                     (1 &lt;&lt; 13)</div><div class='add'>+PAD_CTL_PKE                     (1 &lt;&lt; 12)</div><div class='add'>+PAD_CTL_ODE                     (1 &lt;&lt; 11)</div><div class='add'>+PAD_CTL_SPEED_LOW               (1 &lt;&lt; 6)</div><div class='add'>+PAD_CTL_SPEED_MED               (2 &lt;&lt; 6)</div><div class='add'>+PAD_CTL_SPEED_HIGH              (3 &lt;&lt; 6)</div><div class='add'>+PAD_CTL_DSE_DISABLE             (0 &lt;&lt; 3)</div><div class='add'>+PAD_CTL_DSE_240ohm              (1 &lt;&lt; 3)</div><div class='add'>+PAD_CTL_DSE_120ohm              (2 &lt;&lt; 3)</div><div class='add'>+PAD_CTL_DSE_80ohm               (3 &lt;&lt; 3)</div><div class='add'>+PAD_CTL_DSE_60ohm               (4 &lt;&lt; 3)</div><div class='add'>+PAD_CTL_DSE_48ohm               (5 &lt;&lt; 3)</div><div class='add'>+PAD_CTL_DSE_40ohm               (6 &lt;&lt; 3)</div><div class='add'>+PAD_CTL_DSE_34ohm               (7 &lt;&lt; 3)</div><div class='add'>+PAD_CTL_SRE_FAST                (1 &lt;&lt; 0)</div><div class='add'>+PAD_CTL_SRE_SLOW                (0 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+See below for available PIN_FUNC_ID for imx6q:</div><div class='add'>+MX6Q_PAD_SD2_DAT1__USDHC2_DAT1			0</div><div class='add'>+MX6Q_PAD_SD2_DAT1__ECSPI5_SS0			1</div><div class='add'>+MX6Q_PAD_SD2_DAT1__WEIM_WEIM_CS_2		2</div><div class='add'>+MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS		3</div><div class='add'>+MX6Q_PAD_SD2_DAT1__KPP_COL_7			4</div><div class='add'>+MX6Q_PAD_SD2_DAT1__GPIO_1_14			5</div><div class='add'>+MX6Q_PAD_SD2_DAT1__CCM_WAIT			6</div><div class='add'>+MX6Q_PAD_SD2_DAT1__ANATOP_TESTO_0		7</div><div class='add'>+MX6Q_PAD_SD2_DAT2__USDHC2_DAT2			8</div><div class='add'>+MX6Q_PAD_SD2_DAT2__ECSPI5_SS1			9</div><div class='add'>+MX6Q_PAD_SD2_DAT2__WEIM_WEIM_CS_3		10</div><div class='add'>+MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD		11</div><div class='add'>+MX6Q_PAD_SD2_DAT2__KPP_ROW_6			12</div><div class='add'>+MX6Q_PAD_SD2_DAT2__GPIO_1_13			13</div><div class='add'>+MX6Q_PAD_SD2_DAT2__CCM_STOP			14</div><div class='add'>+MX6Q_PAD_SD2_DAT2__ANATOP_TESTO_1		15</div><div class='add'>+MX6Q_PAD_SD2_DAT0__USDHC2_DAT0			16</div><div class='add'>+MX6Q_PAD_SD2_DAT0__ECSPI5_MISO			17</div><div class='add'>+MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD		18</div><div class='add'>+MX6Q_PAD_SD2_DAT0__KPP_ROW_7			19</div><div class='add'>+MX6Q_PAD_SD2_DAT0__GPIO_1_15			20</div><div class='add'>+MX6Q_PAD_SD2_DAT0__DCIC2_DCIC_OUT		21</div><div class='add'>+MX6Q_PAD_SD2_DAT0__TESTO_2			22</div><div class='add'>+MX6Q_PAD_RGMII_TXC__USBOH3_H2_DATA		23</div><div class='add'>+MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC		24</div><div class='add'>+MX6Q_PAD_RGMII_TXC__SPDIF_SPDIF_EXTCLK		25</div><div class='add'>+MX6Q_PAD_RGMII_TXC__GPIO_6_19			26</div><div class='add'>+MX6Q_PAD_RGMII_TXC__MIPI_CORE_DPHY_IN_0		27</div><div class='add'>+MX6Q_PAD_RGMII_TXC__ANATOP_24M_OUT		28</div><div class='add'>+MX6Q_PAD_RGMII_TD0__MIPI_HSI_CRL_TX_RDY		29</div><div class='add'>+MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0		30</div><div class='add'>+MX6Q_PAD_RGMII_TD0__GPIO_6_20			31</div><div class='add'>+MX6Q_PAD_RGMII_TD0__MIPI_CORE_DPHY_IN_1		32</div><div class='add'>+MX6Q_PAD_RGMII_TD1__MIPI_HSI_CRL_RX_FLG		33</div><div class='add'>+MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1		34</div><div class='add'>+MX6Q_PAD_RGMII_TD1__GPIO_6_21			35</div><div class='add'>+MX6Q_PAD_RGMII_TD1__MIPI_CORE_DPHY_IN_2		36</div><div class='add'>+MX6Q_PAD_RGMII_TD1__CCM_PLL3_BYP		37</div><div class='add'>+MX6Q_PAD_RGMII_TD2__MIPI_HSI_CRL_RX_DTA		38</div><div class='add'>+MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2		39</div><div class='add'>+MX6Q_PAD_RGMII_TD2__GPIO_6_22			40</div><div class='add'>+MX6Q_PAD_RGMII_TD2__MIPI_CORE_DPHY_IN_3		41</div><div class='add'>+MX6Q_PAD_RGMII_TD2__CCM_PLL2_BYP		42</div><div class='add'>+MX6Q_PAD_RGMII_TD3__MIPI_HSI_CRL_RX_WAK		43</div><div class='add'>+MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3		44</div><div class='add'>+MX6Q_PAD_RGMII_TD3__GPIO_6_23			45</div><div class='add'>+MX6Q_PAD_RGMII_TD3__MIPI_CORE_DPHY_IN_4		46</div><div class='add'>+MX6Q_PAD_RGMII_RX_CTL__USBOH3_H3_DATA		47</div><div class='add'>+MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL		48</div><div class='add'>+MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24		49</div><div class='add'>+MX6Q_PAD_RGMII_RX_CTL__MIPI_DPHY_IN_5		50</div><div class='add'>+MX6Q_PAD_RGMII_RD0__MIPI_HSI_CRL_RX_RDY		51</div><div class='add'>+MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0		52</div><div class='add'>+MX6Q_PAD_RGMII_RD0__GPIO_6_25			53</div><div class='add'>+MX6Q_PAD_RGMII_RD0__MIPI_CORE_DPHY_IN_6		54</div><div class='add'>+MX6Q_PAD_RGMII_TX_CTL__USBOH3_H2_STROBE		55</div><div class='add'>+MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL		56</div><div class='add'>+MX6Q_PAD_RGMII_TX_CTL__GPIO_6_26		57</div><div class='add'>+MX6Q_PAD_RGMII_TX_CTL__CORE_DPHY_IN_7		58</div><div class='add'>+MX6Q_PAD_RGMII_TX_CTL__ANATOP_REF_OUT		59</div><div class='add'>+MX6Q_PAD_RGMII_RD1__MIPI_HSI_CTRL_TX_FL		60</div><div class='add'>+MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1		61</div><div class='add'>+MX6Q_PAD_RGMII_RD1__GPIO_6_27			62</div><div class='add'>+MX6Q_PAD_RGMII_RD1__CORE_DPHY_TEST_IN_8		63</div><div class='add'>+MX6Q_PAD_RGMII_RD1__SJC_FAIL			64</div><div class='add'>+MX6Q_PAD_RGMII_RD2__MIPI_HSI_CRL_TX_DTA		65</div><div class='add'>+MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2		66</div><div class='add'>+MX6Q_PAD_RGMII_RD2__GPIO_6_28			67</div><div class='add'>+MX6Q_PAD_RGMII_RD2__MIPI_CORE_DPHY_IN_9		68</div><div class='add'>+MX6Q_PAD_RGMII_RD3__MIPI_HSI_CRL_TX_WAK		69</div><div class='add'>+MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3		70</div><div class='add'>+MX6Q_PAD_RGMII_RD3__GPIO_6_29			71</div><div class='add'>+MX6Q_PAD_RGMII_RD3__MIPI_CORE_DPHY_IN10		72</div><div class='add'>+MX6Q_PAD_RGMII_RXC__USBOH3_H3_STROBE		73</div><div class='add'>+MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC		74</div><div class='add'>+MX6Q_PAD_RGMII_RXC__GPIO_6_30			75</div><div class='add'>+MX6Q_PAD_RGMII_RXC__MIPI_CORE_DPHY_IN11		76</div><div class='add'>+MX6Q_PAD_EIM_A25__WEIM_WEIM_A_25		77</div><div class='add'>+MX6Q_PAD_EIM_A25__ECSPI4_SS1			78</div><div class='add'>+MX6Q_PAD_EIM_A25__ECSPI2_RDY			79</div><div class='add'>+MX6Q_PAD_EIM_A25__IPU1_DI1_PIN12		80</div><div class='add'>+MX6Q_PAD_EIM_A25__IPU1_DI0_D1_CS		81</div><div class='add'>+MX6Q_PAD_EIM_A25__GPIO_5_2			82</div><div class='add'>+MX6Q_PAD_EIM_A25__HDMI_TX_CEC_LINE		83</div><div class='add'>+MX6Q_PAD_EIM_A25__PL301_PER1_HBURST_0		84</div><div class='add'>+MX6Q_PAD_EIM_EB2__WEIM_WEIM_EB_2		85</div><div class='add'>+MX6Q_PAD_EIM_EB2__ECSPI1_SS0			86</div><div class='add'>+MX6Q_PAD_EIM_EB2__CCM_DI1_EXT_CLK		87</div><div class='add'>+MX6Q_PAD_EIM_EB2__IPU2_CSI1_D_19		88</div><div class='add'>+MX6Q_PAD_EIM_EB2__HDMI_TX_DDC_SCL		89</div><div class='add'>+MX6Q_PAD_EIM_EB2__GPIO_2_30			90</div><div class='add'>+MX6Q_PAD_EIM_EB2__I2C2_SCL			91</div><div class='add'>+MX6Q_PAD_EIM_EB2__SRC_BT_CFG_30			92</div><div class='add'>+MX6Q_PAD_EIM_D16__WEIM_WEIM_D_16		93</div><div class='add'>+MX6Q_PAD_EIM_D16__ECSPI1_SCLK			94</div><div class='add'>+MX6Q_PAD_EIM_D16__IPU1_DI0_PIN5			95</div><div class='add'>+MX6Q_PAD_EIM_D16__IPU2_CSI1_D_18		96</div><div class='add'>+MX6Q_PAD_EIM_D16__HDMI_TX_DDC_SDA		97</div><div class='add'>+MX6Q_PAD_EIM_D16__GPIO_3_16			98</div><div class='add'>+MX6Q_PAD_EIM_D16__I2C2_SDA			99</div><div class='add'>+MX6Q_PAD_EIM_D17__WEIM_WEIM_D_17		100</div><div class='add'>+MX6Q_PAD_EIM_D17__ECSPI1_MISO			101</div><div class='add'>+MX6Q_PAD_EIM_D17__IPU1_DI0_PIN6			102</div><div class='add'>+MX6Q_PAD_EIM_D17__IPU2_CSI1_PIXCLK		103</div><div class='add'>+MX6Q_PAD_EIM_D17__DCIC1_DCIC_OUT		104</div><div class='add'>+MX6Q_PAD_EIM_D17__GPIO_3_17			105</div><div class='add'>+MX6Q_PAD_EIM_D17__I2C3_SCL			106</div><div class='add'>+MX6Q_PAD_EIM_D17__PL301_PER1_HBURST_1		107</div><div class='add'>+MX6Q_PAD_EIM_D18__WEIM_WEIM_D_18		108</div><div class='add'>+MX6Q_PAD_EIM_D18__ECSPI1_MOSI			109</div><div class='add'>+MX6Q_PAD_EIM_D18__IPU1_DI0_PIN7			110</div><div class='add'>+MX6Q_PAD_EIM_D18__IPU2_CSI1_D_17		111</div><div class='add'>+MX6Q_PAD_EIM_D18__IPU1_DI1_D0_CS		112</div><div class='add'>+MX6Q_PAD_EIM_D18__GPIO_3_18			113</div><div class='add'>+MX6Q_PAD_EIM_D18__I2C3_SDA			114</div><div class='add'>+MX6Q_PAD_EIM_D18__PL301_PER1_HBURST_2		115</div><div class='add'>+MX6Q_PAD_EIM_D19__WEIM_WEIM_D_19		116</div><div class='add'>+MX6Q_PAD_EIM_D19__ECSPI1_SS1			117</div><div class='add'>+MX6Q_PAD_EIM_D19__IPU1_DI0_PIN8			118</div><div class='add'>+MX6Q_PAD_EIM_D19__IPU2_CSI1_D_16		119</div><div class='add'>+MX6Q_PAD_EIM_D19__UART1_CTS			120</div><div class='add'>+MX6Q_PAD_EIM_D19__GPIO_3_19			121</div><div class='add'>+MX6Q_PAD_EIM_D19__EPIT1_EPITO			122</div><div class='add'>+MX6Q_PAD_EIM_D19__PL301_PER1_HRESP		123</div><div class='add'>+MX6Q_PAD_EIM_D20__WEIM_WEIM_D_20		124</div><div class='add'>+MX6Q_PAD_EIM_D20__ECSPI4_SS0			125</div><div class='add'>+MX6Q_PAD_EIM_D20__IPU1_DI0_PIN16		126</div><div class='add'>+MX6Q_PAD_EIM_D20__IPU2_CSI1_D_15		127</div><div class='add'>+MX6Q_PAD_EIM_D20__UART1_RTS			128</div><div class='add'>+MX6Q_PAD_EIM_D20__GPIO_3_20			129</div><div class='add'>+MX6Q_PAD_EIM_D20__EPIT2_EPITO			130</div><div class='add'>+MX6Q_PAD_EIM_D21__WEIM_WEIM_D_21		131</div><div class='add'>+MX6Q_PAD_EIM_D21__ECSPI4_SCLK			132</div><div class='add'>+MX6Q_PAD_EIM_D21__IPU1_DI0_PIN17		133</div><div class='add'>+MX6Q_PAD_EIM_D21__IPU2_CSI1_D_11		134</div><div class='add'>+MX6Q_PAD_EIM_D21__USBOH3_USBOTG_OC		135</div><div class='add'>+MX6Q_PAD_EIM_D21__GPIO_3_21			136</div><div class='add'>+MX6Q_PAD_EIM_D21__I2C1_SCL			137</div><div class='add'>+MX6Q_PAD_EIM_D21__SPDIF_IN1			138</div><div class='add'>+MX6Q_PAD_EIM_D22__WEIM_WEIM_D_22		139</div><div class='add'>+MX6Q_PAD_EIM_D22__ECSPI4_MISO			140</div><div class='add'>+MX6Q_PAD_EIM_D22__IPU1_DI0_PIN1			141</div><div class='add'>+MX6Q_PAD_EIM_D22__IPU2_CSI1_D_10		142</div><div class='add'>+MX6Q_PAD_EIM_D22__USBOH3_USBOTG_PWR		143</div><div class='add'>+MX6Q_PAD_EIM_D22__GPIO_3_22			144</div><div class='add'>+MX6Q_PAD_EIM_D22__SPDIF_OUT1			145</div><div class='add'>+MX6Q_PAD_EIM_D22__PL301_PER1_HWRITE		146</div><div class='add'>+MX6Q_PAD_EIM_D23__WEIM_WEIM_D_23		147</div><div class='add'>+MX6Q_PAD_EIM_D23__IPU1_DI0_D0_CS		148</div><div class='add'>+MX6Q_PAD_EIM_D23__UART3_CTS			149</div><div class='add'>+MX6Q_PAD_EIM_D23__UART1_DCD			150</div><div class='add'>+MX6Q_PAD_EIM_D23__IPU2_CSI1_DATA_EN		151</div><div class='add'>+MX6Q_PAD_EIM_D23__GPIO_3_23			152</div><div class='add'>+MX6Q_PAD_EIM_D23__IPU1_DI1_PIN2			153</div><div class='add'>+MX6Q_PAD_EIM_D23__IPU1_DI1_PIN14		154</div><div class='add'>+MX6Q_PAD_EIM_EB3__WEIM_WEIM_EB_3		155</div><div class='add'>+MX6Q_PAD_EIM_EB3__ECSPI4_RDY			156</div><div class='add'>+MX6Q_PAD_EIM_EB3__UART3_RTS			157</div><div class='add'>+MX6Q_PAD_EIM_EB3__UART1_RI			158</div><div class='add'>+MX6Q_PAD_EIM_EB3__IPU2_CSI1_HSYNC		159</div><div class='add'>+MX6Q_PAD_EIM_EB3__GPIO_2_31			160</div><div class='add'>+MX6Q_PAD_EIM_EB3__IPU1_DI1_PIN3			161</div><div class='add'>+MX6Q_PAD_EIM_EB3__SRC_BT_CFG_31			162</div><div class='add'>+MX6Q_PAD_EIM_D24__WEIM_WEIM_D_24		163</div><div class='add'>+MX6Q_PAD_EIM_D24__ECSPI4_SS2			164</div><div class='add'>+MX6Q_PAD_EIM_D24__UART3_TXD			165</div><div class='add'>+MX6Q_PAD_EIM_D24__ECSPI1_SS2			166</div><div class='add'>+MX6Q_PAD_EIM_D24__ECSPI2_SS2			167</div><div class='add'>+MX6Q_PAD_EIM_D24__GPIO_3_24			168</div><div class='add'>+MX6Q_PAD_EIM_D24__AUDMUX_AUD5_RXFS		169</div><div class='add'>+MX6Q_PAD_EIM_D24__UART1_DTR			170</div><div class='add'>+MX6Q_PAD_EIM_D25__WEIM_WEIM_D_25		171</div><div class='add'>+MX6Q_PAD_EIM_D25__ECSPI4_SS3			172</div><div class='add'>+MX6Q_PAD_EIM_D25__UART3_RXD			173</div><div class='add'>+MX6Q_PAD_EIM_D25__ECSPI1_SS3			174</div><div class='add'>+MX6Q_PAD_EIM_D25__ECSPI2_SS3			175</div><div class='add'>+MX6Q_PAD_EIM_D25__GPIO_3_25			176</div><div class='add'>+MX6Q_PAD_EIM_D25__AUDMUX_AUD5_RXC		177</div><div class='add'>+MX6Q_PAD_EIM_D25__UART1_DSR			178</div><div class='add'>+MX6Q_PAD_EIM_D26__WEIM_WEIM_D_26		179</div><div class='add'>+MX6Q_PAD_EIM_D26__IPU1_DI1_PIN11		180</div><div class='add'>+MX6Q_PAD_EIM_D26__IPU1_CSI0_D_1			181</div><div class='add'>+MX6Q_PAD_EIM_D26__IPU2_CSI1_D_14		182</div><div class='add'>+MX6Q_PAD_EIM_D26__UART2_TXD			183</div><div class='add'>+MX6Q_PAD_EIM_D26__GPIO_3_26			184</div><div class='add'>+MX6Q_PAD_EIM_D26__IPU1_SISG_2			185</div><div class='add'>+MX6Q_PAD_EIM_D26__IPU1_DISP1_DAT_22		186</div><div class='add'>+MX6Q_PAD_EIM_D27__WEIM_WEIM_D_27		187</div><div class='add'>+MX6Q_PAD_EIM_D27__IPU1_DI1_PIN13		188</div><div class='add'>+MX6Q_PAD_EIM_D27__IPU1_CSI0_D_0			189</div><div class='add'>+MX6Q_PAD_EIM_D27__IPU2_CSI1_D_13		190</div><div class='add'>+MX6Q_PAD_EIM_D27__UART2_RXD			191</div><div class='add'>+MX6Q_PAD_EIM_D27__GPIO_3_27			192</div><div class='add'>+MX6Q_PAD_EIM_D27__IPU1_SISG_3			193</div><div class='add'>+MX6Q_PAD_EIM_D27__IPU1_DISP1_DAT_23		194</div><div class='add'>+MX6Q_PAD_EIM_D28__WEIM_WEIM_D_28		195</div><div class='add'>+MX6Q_PAD_EIM_D28__I2C1_SDA			196</div><div class='add'>+MX6Q_PAD_EIM_D28__ECSPI4_MOSI			197</div><div class='add'>+MX6Q_PAD_EIM_D28__IPU2_CSI1_D_12		198</div><div class='add'>+MX6Q_PAD_EIM_D28__UART2_CTS			199</div><div class='add'>+MX6Q_PAD_EIM_D28__GPIO_3_28			200</div><div class='add'>+MX6Q_PAD_EIM_D28__IPU1_EXT_TRIG			201</div><div class='add'>+MX6Q_PAD_EIM_D28__IPU1_DI0_PIN13		202</div><div class='add'>+MX6Q_PAD_EIM_D29__WEIM_WEIM_D_29		203</div><div class='add'>+MX6Q_PAD_EIM_D29__IPU1_DI1_PIN15		204</div><div class='add'>+MX6Q_PAD_EIM_D29__ECSPI4_SS0			205</div><div class='add'>+MX6Q_PAD_EIM_D29__UART2_RTS			206</div><div class='add'>+MX6Q_PAD_EIM_D29__GPIO_3_29			207</div><div class='add'>+MX6Q_PAD_EIM_D29__IPU2_CSI1_VSYNC		208</div><div class='add'>+MX6Q_PAD_EIM_D29__IPU1_DI0_PIN14		209</div><div class='add'>+MX6Q_PAD_EIM_D30__WEIM_WEIM_D_30		210</div><div class='add'>+MX6Q_PAD_EIM_D30__IPU1_DISP1_DAT_21		211</div><div class='add'>+MX6Q_PAD_EIM_D30__IPU1_DI0_PIN11		212</div><div class='add'>+MX6Q_PAD_EIM_D30__IPU1_CSI0_D_3			213</div><div class='add'>+MX6Q_PAD_EIM_D30__UART3_CTS			214</div><div class='add'>+MX6Q_PAD_EIM_D30__GPIO_3_30			215</div><div class='add'>+MX6Q_PAD_EIM_D30__USBOH3_USBH1_OC		216</div><div class='add'>+MX6Q_PAD_EIM_D30__PL301_PER1_HPROT_0		217</div><div class='add'>+MX6Q_PAD_EIM_D31__WEIM_WEIM_D_31		218</div><div class='add'>+MX6Q_PAD_EIM_D31__IPU1_DISP1_DAT_20		219</div><div class='add'>+MX6Q_PAD_EIM_D31__IPU1_DI0_PIN12		220</div><div class='add'>+MX6Q_PAD_EIM_D31__IPU1_CSI0_D_2			221</div><div class='add'>+MX6Q_PAD_EIM_D31__UART3_RTS			222</div><div class='add'>+MX6Q_PAD_EIM_D31__GPIO_3_31			223</div><div class='add'>+MX6Q_PAD_EIM_D31__USBOH3_USBH1_PWR		224</div><div class='add'>+MX6Q_PAD_EIM_D31__PL301_PER1_HPROT_1		225</div><div class='add'>+MX6Q_PAD_EIM_A24__WEIM_WEIM_A_24		226</div><div class='add'>+MX6Q_PAD_EIM_A24__IPU1_DISP1_DAT_19		227</div><div class='add'>+MX6Q_PAD_EIM_A24__IPU2_CSI1_D_19		228</div><div class='add'>+MX6Q_PAD_EIM_A24__IPU2_SISG_2			229</div><div class='add'>+MX6Q_PAD_EIM_A24__IPU1_SISG_2			230</div><div class='add'>+MX6Q_PAD_EIM_A24__GPIO_5_4			231</div><div class='add'>+MX6Q_PAD_EIM_A24__PL301_PER1_HPROT_2		232</div><div class='add'>+MX6Q_PAD_EIM_A24__SRC_BT_CFG_24			233</div><div class='add'>+MX6Q_PAD_EIM_A23__WEIM_WEIM_A_23		234</div><div class='add'>+MX6Q_PAD_EIM_A23__IPU1_DISP1_DAT_18		235</div><div class='add'>+MX6Q_PAD_EIM_A23__IPU2_CSI1_D_18		236</div><div class='add'>+MX6Q_PAD_EIM_A23__IPU2_SISG_3			237</div><div class='add'>+MX6Q_PAD_EIM_A23__IPU1_SISG_3			238</div><div class='add'>+MX6Q_PAD_EIM_A23__GPIO_6_6			239</div><div class='add'>+MX6Q_PAD_EIM_A23__PL301_PER1_HPROT_3		240</div><div class='add'>+MX6Q_PAD_EIM_A23__SRC_BT_CFG_23			241</div><div class='add'>+MX6Q_PAD_EIM_A22__WEIM_WEIM_A_22		242</div><div class='add'>+MX6Q_PAD_EIM_A22__IPU1_DISP1_DAT_17		243</div><div class='add'>+MX6Q_PAD_EIM_A22__IPU2_CSI1_D_17		244</div><div class='add'>+MX6Q_PAD_EIM_A22__GPIO_2_16			245</div><div class='add'>+MX6Q_PAD_EIM_A22__TPSMP_HDATA_0			246</div><div class='add'>+MX6Q_PAD_EIM_A22__SRC_BT_CFG_22			247</div><div class='add'>+MX6Q_PAD_EIM_A21__WEIM_WEIM_A_21		248</div><div class='add'>+MX6Q_PAD_EIM_A21__IPU1_DISP1_DAT_16		249</div><div class='add'>+MX6Q_PAD_EIM_A21__IPU2_CSI1_D_16		250</div><div class='add'>+MX6Q_PAD_EIM_A21__RESERVED_RESERVED		251</div><div class='add'>+MX6Q_PAD_EIM_A21__MIPI_CORE_DPHY_OUT_18		252</div><div class='add'>+MX6Q_PAD_EIM_A21__GPIO_2_17			253</div><div class='add'>+MX6Q_PAD_EIM_A21__TPSMP_HDATA_1			254</div><div class='add'>+MX6Q_PAD_EIM_A21__SRC_BT_CFG_21			255</div><div class='add'>+MX6Q_PAD_EIM_A20__WEIM_WEIM_A_20		256</div><div class='add'>+MX6Q_PAD_EIM_A20__IPU1_DISP1_DAT_15		257</div><div class='add'>+MX6Q_PAD_EIM_A20__IPU2_CSI1_D_15		258</div><div class='add'>+MX6Q_PAD_EIM_A20__RESERVED_RESERVED		259</div><div class='add'>+MX6Q_PAD_EIM_A20__MIPI_CORE_DPHY_OUT_19		260</div><div class='add'>+MX6Q_PAD_EIM_A20__GPIO_2_18			261</div><div class='add'>+MX6Q_PAD_EIM_A20__TPSMP_HDATA_2			262</div><div class='add'>+MX6Q_PAD_EIM_A20__SRC_BT_CFG_20			263</div><div class='add'>+MX6Q_PAD_EIM_A19__WEIM_WEIM_A_19		264</div><div class='add'>+MX6Q_PAD_EIM_A19__IPU1_DISP1_DAT_14		265</div><div class='add'>+MX6Q_PAD_EIM_A19__IPU2_CSI1_D_14		266</div><div class='add'>+MX6Q_PAD_EIM_A19__RESERVED_RESERVED		267</div><div class='add'>+MX6Q_PAD_EIM_A19__MIPI_CORE_DPHY_OUT_20		268</div><div class='add'>+MX6Q_PAD_EIM_A19__GPIO_2_19			269</div><div class='add'>+MX6Q_PAD_EIM_A19__TPSMP_HDATA_3			270</div><div class='add'>+MX6Q_PAD_EIM_A19__SRC_BT_CFG_19			271</div><div class='add'>+MX6Q_PAD_EIM_A18__WEIM_WEIM_A_18		272</div><div class='add'>+MX6Q_PAD_EIM_A18__IPU1_DISP1_DAT_13		273</div><div class='add'>+MX6Q_PAD_EIM_A18__IPU2_CSI1_D_13		274</div><div class='add'>+MX6Q_PAD_EIM_A18__RESERVED_RESERVED		275</div><div class='add'>+MX6Q_PAD_EIM_A18__MIPI_CORE_DPHY_OUT_21		276</div><div class='add'>+MX6Q_PAD_EIM_A18__GPIO_2_20			277</div><div class='add'>+MX6Q_PAD_EIM_A18__TPSMP_HDATA_4			278</div><div class='add'>+MX6Q_PAD_EIM_A18__SRC_BT_CFG_18			279</div><div class='add'>+MX6Q_PAD_EIM_A17__WEIM_WEIM_A_17		280</div><div class='add'>+MX6Q_PAD_EIM_A17__IPU1_DISP1_DAT_12		281</div><div class='add'>+MX6Q_PAD_EIM_A17__IPU2_CSI1_D_12		282</div><div class='add'>+MX6Q_PAD_EIM_A17__RESERVED_RESERVED		283</div><div class='add'>+MX6Q_PAD_EIM_A17__MIPI_CORE_DPHY_OUT_22		284</div><div class='add'>+MX6Q_PAD_EIM_A17__GPIO_2_21			285</div><div class='add'>+MX6Q_PAD_EIM_A17__TPSMP_HDATA_5			286</div><div class='add'>+MX6Q_PAD_EIM_A17__SRC_BT_CFG_17			287</div><div class='add'>+MX6Q_PAD_EIM_A16__WEIM_WEIM_A_16		288</div><div class='add'>+MX6Q_PAD_EIM_A16__IPU1_DI1_DISP_CLK		289</div><div class='add'>+MX6Q_PAD_EIM_A16__IPU2_CSI1_PIXCLK		290</div><div class='add'>+MX6Q_PAD_EIM_A16__MIPI_CORE_DPHY_OUT_23		291</div><div class='add'>+MX6Q_PAD_EIM_A16__GPIO_2_22			292</div><div class='add'>+MX6Q_PAD_EIM_A16__TPSMP_HDATA_6			293</div><div class='add'>+MX6Q_PAD_EIM_A16__SRC_BT_CFG_16			294</div><div class='add'>+MX6Q_PAD_EIM_CS0__WEIM_WEIM_CS_0		295</div><div class='add'>+MX6Q_PAD_EIM_CS0__IPU1_DI1_PIN5			296</div><div class='add'>+MX6Q_PAD_EIM_CS0__ECSPI2_SCLK			297</div><div class='add'>+MX6Q_PAD_EIM_CS0__MIPI_CORE_DPHY_OUT_24		298</div><div class='add'>+MX6Q_PAD_EIM_CS0__GPIO_2_23			299</div><div class='add'>+MX6Q_PAD_EIM_CS0__TPSMP_HDATA_7			300</div><div class='add'>+MX6Q_PAD_EIM_CS1__WEIM_WEIM_CS_1		301</div><div class='add'>+MX6Q_PAD_EIM_CS1__IPU1_DI1_PIN6			302</div><div class='add'>+MX6Q_PAD_EIM_CS1__ECSPI2_MOSI			303</div><div class='add'>+MX6Q_PAD_EIM_CS1__MIPI_CORE_DPHY_OUT_25		304</div><div class='add'>+MX6Q_PAD_EIM_CS1__GPIO_2_24			305</div><div class='add'>+MX6Q_PAD_EIM_CS1__TPSMP_HDATA_8			306</div><div class='add'>+MX6Q_PAD_EIM_OE__WEIM_WEIM_OE			307</div><div class='add'>+MX6Q_PAD_EIM_OE__IPU1_DI1_PIN7			308</div><div class='add'>+MX6Q_PAD_EIM_OE__ECSPI2_MISO			309</div><div class='add'>+MX6Q_PAD_EIM_OE__MIPI_CORE_DPHY_OUT_26		310</div><div class='add'>+MX6Q_PAD_EIM_OE__GPIO_2_25			311</div><div class='add'>+MX6Q_PAD_EIM_OE__TPSMP_HDATA_9			312</div><div class='add'>+MX6Q_PAD_EIM_RW__WEIM_WEIM_RW			313</div><div class='add'>+MX6Q_PAD_EIM_RW__IPU1_DI1_PIN8			314</div><div class='add'>+MX6Q_PAD_EIM_RW__ECSPI2_SS0			315</div><div class='add'>+MX6Q_PAD_EIM_RW__MIPI_CORE_DPHY_OUT_27		316</div><div class='add'>+MX6Q_PAD_EIM_RW__GPIO_2_26			317</div><div class='add'>+MX6Q_PAD_EIM_RW__TPSMP_HDATA_10			318</div><div class='add'>+MX6Q_PAD_EIM_RW__SRC_BT_CFG_29			319</div><div class='add'>+MX6Q_PAD_EIM_LBA__WEIM_WEIM_LBA			320</div><div class='add'>+MX6Q_PAD_EIM_LBA__IPU1_DI1_PIN17		321</div><div class='add'>+MX6Q_PAD_EIM_LBA__ECSPI2_SS1			322</div><div class='add'>+MX6Q_PAD_EIM_LBA__GPIO_2_27			323</div><div class='add'>+MX6Q_PAD_EIM_LBA__TPSMP_HDATA_11		324</div><div class='add'>+MX6Q_PAD_EIM_LBA__SRC_BT_CFG_26			325</div><div class='add'>+MX6Q_PAD_EIM_EB0__WEIM_WEIM_EB_0		326</div><div class='add'>+MX6Q_PAD_EIM_EB0__IPU1_DISP1_DAT_11		327</div><div class='add'>+MX6Q_PAD_EIM_EB0__IPU2_CSI1_D_11		328</div><div class='add'>+MX6Q_PAD_EIM_EB0__MIPI_CORE_DPHY_OUT_0		329</div><div class='add'>+MX6Q_PAD_EIM_EB0__CCM_PMIC_RDY			330</div><div class='add'>+MX6Q_PAD_EIM_EB0__GPIO_2_28			331</div><div class='add'>+MX6Q_PAD_EIM_EB0__TPSMP_HDATA_12		332</div><div class='add'>+MX6Q_PAD_EIM_EB0__SRC_BT_CFG_27			333</div><div class='add'>+MX6Q_PAD_EIM_EB1__WEIM_WEIM_EB_1		334</div><div class='add'>+MX6Q_PAD_EIM_EB1__IPU1_DISP1_DAT_10		335</div><div class='add'>+MX6Q_PAD_EIM_EB1__IPU2_CSI1_D_10		336</div><div class='add'>+MX6Q_PAD_EIM_EB1__MIPI_CORE_DPHY__OUT_1		337</div><div class='add'>+MX6Q_PAD_EIM_EB1__GPIO_2_29			338</div><div class='add'>+MX6Q_PAD_EIM_EB1__TPSMP_HDATA_13		339</div><div class='add'>+MX6Q_PAD_EIM_EB1__SRC_BT_CFG_28			340</div><div class='add'>+MX6Q_PAD_EIM_DA0__WEIM_WEIM_DA_A_0		341</div><div class='add'>+MX6Q_PAD_EIM_DA0__IPU1_DISP1_DAT_9		342</div><div class='add'>+MX6Q_PAD_EIM_DA0__IPU2_CSI1_D_9			343</div><div class='add'>+MX6Q_PAD_EIM_DA0__MIPI_CORE_DPHY__OUT_2		344</div><div class='add'>+MX6Q_PAD_EIM_DA0__GPIO_3_0			345</div><div class='add'>+MX6Q_PAD_EIM_DA0__TPSMP_HDATA_14		346</div><div class='add'>+MX6Q_PAD_EIM_DA0__SRC_BT_CFG_0			347</div><div class='add'>+MX6Q_PAD_EIM_DA1__WEIM_WEIM_DA_A_1		348</div><div class='add'>+MX6Q_PAD_EIM_DA1__IPU1_DISP1_DAT_8		349</div><div class='add'>+MX6Q_PAD_EIM_DA1__IPU2_CSI1_D_8			350</div><div class='add'>+MX6Q_PAD_EIM_DA1__MIPI_CORE_DPHY_OUT_3		351</div><div class='add'>+MX6Q_PAD_EIM_DA1__USBPHY1_TX_LS_MODE		352</div><div class='add'>+MX6Q_PAD_EIM_DA1__GPIO_3_1			353</div><div class='add'>+MX6Q_PAD_EIM_DA1__TPSMP_HDATA_15		354</div><div class='add'>+MX6Q_PAD_EIM_DA1__SRC_BT_CFG_1			355</div><div class='add'>+MX6Q_PAD_EIM_DA2__WEIM_WEIM_DA_A_2		356</div><div class='add'>+MX6Q_PAD_EIM_DA2__IPU1_DISP1_DAT_7		357</div><div class='add'>+MX6Q_PAD_EIM_DA2__IPU2_CSI1_D_7			358</div><div class='add'>+MX6Q_PAD_EIM_DA2__MIPI_CORE_DPHY_OUT_4		359</div><div class='add'>+MX6Q_PAD_EIM_DA2__USBPHY1_TX_HS_MODE		360</div><div class='add'>+MX6Q_PAD_EIM_DA2__GPIO_3_2			361</div><div class='add'>+MX6Q_PAD_EIM_DA2__TPSMP_HDATA_16		362</div><div class='add'>+MX6Q_PAD_EIM_DA2__SRC_BT_CFG_2			363</div><div class='add'>+MX6Q_PAD_EIM_DA3__WEIM_WEIM_DA_A_3		364</div><div class='add'>+MX6Q_PAD_EIM_DA3__IPU1_DISP1_DAT_6		365</div><div class='add'>+MX6Q_PAD_EIM_DA3__IPU2_CSI1_D_6			366</div><div class='add'>+MX6Q_PAD_EIM_DA3__MIPI_CORE_DPHY_OUT_5		367</div><div class='add'>+MX6Q_PAD_EIM_DA3__USBPHY1_TX_HIZ		368</div><div class='add'>+MX6Q_PAD_EIM_DA3__GPIO_3_3			369</div><div class='add'>+MX6Q_PAD_EIM_DA3__TPSMP_HDATA_17		370</div><div class='add'>+MX6Q_PAD_EIM_DA3__SRC_BT_CFG_3			371</div><div class='add'>+MX6Q_PAD_EIM_DA4__WEIM_WEIM_DA_A_4		372</div><div class='add'>+MX6Q_PAD_EIM_DA4__IPU1_DISP1_DAT_5		373</div><div class='add'>+MX6Q_PAD_EIM_DA4__IPU2_CSI1_D_5			374</div><div class='add'>+MX6Q_PAD_EIM_DA4__MIPI_CORE_DPHY_OUT_6		375</div><div class='add'>+MX6Q_PAD_EIM_DA4__ANATOP_USBPHY1_TX_EN		376</div><div class='add'>+MX6Q_PAD_EIM_DA4__GPIO_3_4			377</div><div class='add'>+MX6Q_PAD_EIM_DA4__TPSMP_HDATA_18		378</div><div class='add'>+MX6Q_PAD_EIM_DA4__SRC_BT_CFG_4			379</div><div class='add'>+MX6Q_PAD_EIM_DA5__WEIM_WEIM_DA_A_5		380</div><div class='add'>+MX6Q_PAD_EIM_DA5__IPU1_DISP1_DAT_4		381</div><div class='add'>+MX6Q_PAD_EIM_DA5__IPU2_CSI1_D_4			382</div><div class='add'>+MX6Q_PAD_EIM_DA5__MIPI_CORE_DPHY_OUT_7		383</div><div class='add'>+MX6Q_PAD_EIM_DA5__ANATOP_USBPHY1_TX_DP		384</div><div class='add'>+MX6Q_PAD_EIM_DA5__GPIO_3_5			385</div><div class='add'>+MX6Q_PAD_EIM_DA5__TPSMP_HDATA_19		386</div><div class='add'>+MX6Q_PAD_EIM_DA5__SRC_BT_CFG_5			387</div><div class='add'>+MX6Q_PAD_EIM_DA6__WEIM_WEIM_DA_A_6		388</div><div class='add'>+MX6Q_PAD_EIM_DA6__IPU1_DISP1_DAT_3		389</div><div class='add'>+MX6Q_PAD_EIM_DA6__IPU2_CSI1_D_3			390</div><div class='add'>+MX6Q_PAD_EIM_DA6__MIPI_CORE_DPHY_OUT_8		391</div><div class='add'>+MX6Q_PAD_EIM_DA6__ANATOP_USBPHY1_TX_DN		392</div><div class='add'>+MX6Q_PAD_EIM_DA6__GPIO_3_6			393</div><div class='add'>+MX6Q_PAD_EIM_DA6__TPSMP_HDATA_20		394</div><div class='add'>+MX6Q_PAD_EIM_DA6__SRC_BT_CFG_6			395</div><div class='add'>+MX6Q_PAD_EIM_DA7__WEIM_WEIM_DA_A_7		396</div><div class='add'>+MX6Q_PAD_EIM_DA7__IPU1_DISP1_DAT_2		397</div><div class='add'>+MX6Q_PAD_EIM_DA7__IPU2_CSI1_D_2			398</div><div class='add'>+MX6Q_PAD_EIM_DA7__MIPI_CORE_DPHY_OUT_9		399</div><div class='add'>+MX6Q_PAD_EIM_DA7__GPIO_3_7			400</div><div class='add'>+MX6Q_PAD_EIM_DA7__TPSMP_HDATA_21		401</div><div class='add'>+MX6Q_PAD_EIM_DA7__SRC_BT_CFG_7			402</div><div class='add'>+MX6Q_PAD_EIM_DA8__WEIM_WEIM_DA_A_8		403</div><div class='add'>+MX6Q_PAD_EIM_DA8__IPU1_DISP1_DAT_1		404</div><div class='add'>+MX6Q_PAD_EIM_DA8__IPU2_CSI1_D_1			405</div><div class='add'>+MX6Q_PAD_EIM_DA8__MIPI_CORE_DPHY_OUT_10		406</div><div class='add'>+MX6Q_PAD_EIM_DA8__GPIO_3_8			407</div><div class='add'>+MX6Q_PAD_EIM_DA8__TPSMP_HDATA_22		408</div><div class='add'>+MX6Q_PAD_EIM_DA8__SRC_BT_CFG_8			409</div><div class='add'>+MX6Q_PAD_EIM_DA9__WEIM_WEIM_DA_A_9		410</div><div class='add'>+MX6Q_PAD_EIM_DA9__IPU1_DISP1_DAT_0		411</div><div class='add'>+MX6Q_PAD_EIM_DA9__IPU2_CSI1_D_0			412</div><div class='add'>+MX6Q_PAD_EIM_DA9__MIPI_CORE_DPHY_OUT_11		413</div><div class='add'>+MX6Q_PAD_EIM_DA9__GPIO_3_9			414</div><div class='add'>+MX6Q_PAD_EIM_DA9__TPSMP_HDATA_23		415</div><div class='add'>+MX6Q_PAD_EIM_DA9__SRC_BT_CFG_9			416</div><div class='add'>+MX6Q_PAD_EIM_DA10__WEIM_WEIM_DA_A_10		417</div><div class='add'>+MX6Q_PAD_EIM_DA10__IPU1_DI1_PIN15		418</div><div class='add'>+MX6Q_PAD_EIM_DA10__IPU2_CSI1_DATA_EN		419</div><div class='add'>+MX6Q_PAD_EIM_DA10__MIPI_CORE_DPHY_OUT12		420</div><div class='add'>+MX6Q_PAD_EIM_DA10__GPIO_3_10			421</div><div class='add'>+MX6Q_PAD_EIM_DA10__TPSMP_HDATA_24		422</div><div class='add'>+MX6Q_PAD_EIM_DA10__SRC_BT_CFG_10		423</div><div class='add'>+MX6Q_PAD_EIM_DA11__WEIM_WEIM_DA_A_11		424</div><div class='add'>+MX6Q_PAD_EIM_DA11__IPU1_DI1_PIN2		425</div><div class='add'>+MX6Q_PAD_EIM_DA11__IPU2_CSI1_HSYNC		426</div><div class='add'>+MX6Q_PAD_EIM_DA11__MIPI_CORE_DPHY_OUT13		427</div><div class='add'>+MX6Q_PAD_EIM_DA11__SDMA_DBG_EVT_CHN_6		428</div><div class='add'>+MX6Q_PAD_EIM_DA11__GPIO_3_11			429</div><div class='add'>+MX6Q_PAD_EIM_DA11__TPSMP_HDATA_25		430</div><div class='add'>+MX6Q_PAD_EIM_DA11__SRC_BT_CFG_11		431</div><div class='add'>+MX6Q_PAD_EIM_DA12__WEIM_WEIM_DA_A_12		432</div><div class='add'>+MX6Q_PAD_EIM_DA12__IPU1_DI1_PIN3		433</div><div class='add'>+MX6Q_PAD_EIM_DA12__IPU2_CSI1_VSYNC		434</div><div class='add'>+MX6Q_PAD_EIM_DA12__MIPI_CORE_DPHY_OUT14		435</div><div class='add'>+MX6Q_PAD_EIM_DA12__SDMA_DEBUG_EVT_CHN_3		436</div><div class='add'>+MX6Q_PAD_EIM_DA12__GPIO_3_12			437</div><div class='add'>+MX6Q_PAD_EIM_DA12__TPSMP_HDATA_26		438</div><div class='add'>+MX6Q_PAD_EIM_DA12__SRC_BT_CFG_12		439</div><div class='add'>+MX6Q_PAD_EIM_DA13__WEIM_WEIM_DA_A_13		440</div><div class='add'>+MX6Q_PAD_EIM_DA13__IPU1_DI1_D0_CS		441</div><div class='add'>+MX6Q_PAD_EIM_DA13__CCM_DI1_EXT_CLK		442</div><div class='add'>+MX6Q_PAD_EIM_DA13__MIPI_CORE_DPHY_OUT15		443</div><div class='add'>+MX6Q_PAD_EIM_DA13__SDMA_DEBUG_EVT_CHN_4		444</div><div class='add'>+MX6Q_PAD_EIM_DA13__GPIO_3_13			445</div><div class='add'>+MX6Q_PAD_EIM_DA13__TPSMP_HDATA_27		446</div><div class='add'>+MX6Q_PAD_EIM_DA13__SRC_BT_CFG_13		447</div><div class='add'>+MX6Q_PAD_EIM_DA14__WEIM_WEIM_DA_A_14		448</div><div class='add'>+MX6Q_PAD_EIM_DA14__IPU1_DI1_D1_CS		449</div><div class='add'>+MX6Q_PAD_EIM_DA14__CCM_DI0_EXT_CLK		450</div><div class='add'>+MX6Q_PAD_EIM_DA14__MIPI_CORE_DPHY_OUT16		451</div><div class='add'>+MX6Q_PAD_EIM_DA14__SDMA_DEBUG_EVT_CHN_5		452</div><div class='add'>+MX6Q_PAD_EIM_DA14__GPIO_3_14			453</div><div class='add'>+MX6Q_PAD_EIM_DA14__TPSMP_HDATA_28		454</div><div class='add'>+MX6Q_PAD_EIM_DA14__SRC_BT_CFG_14		455</div><div class='add'>+MX6Q_PAD_EIM_DA15__WEIM_WEIM_DA_A_15		456</div><div class='add'>+MX6Q_PAD_EIM_DA15__IPU1_DI1_PIN1		457</div><div class='add'>+MX6Q_PAD_EIM_DA15__IPU1_DI1_PIN4		458</div><div class='add'>+MX6Q_PAD_EIM_DA15__MIPI_CORE_DPHY_OUT17		459</div><div class='add'>+MX6Q_PAD_EIM_DA15__GPIO_3_15			460</div><div class='add'>+MX6Q_PAD_EIM_DA15__TPSMP_HDATA_29		461</div><div class='add'>+MX6Q_PAD_EIM_DA15__SRC_BT_CFG_15		462</div><div class='add'>+MX6Q_PAD_EIM_WAIT__WEIM_WEIM_WAIT		463</div><div class='add'>+MX6Q_PAD_EIM_WAIT__WEIM_WEIM_DTACK_B		464</div><div class='add'>+MX6Q_PAD_EIM_WAIT__GPIO_5_0			465</div><div class='add'>+MX6Q_PAD_EIM_WAIT__TPSMP_HDATA_30		466</div><div class='add'>+MX6Q_PAD_EIM_WAIT__SRC_BT_CFG_25		467</div><div class='add'>+MX6Q_PAD_EIM_BCLK__WEIM_WEIM_BCLK		468</div><div class='add'>+MX6Q_PAD_EIM_BCLK__IPU1_DI1_PIN16		469</div><div class='add'>+MX6Q_PAD_EIM_BCLK__GPIO_6_31			470</div><div class='add'>+MX6Q_PAD_EIM_BCLK__TPSMP_HDATA_31		471</div><div class='add'>+MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DSP_CLK		472</div><div class='add'>+MX6Q_PAD_DI0_DISP_CLK__IPU2_DI0_DSP_CLK		473</div><div class='add'>+MX6Q_PAD_DI0_DISP_CLK__MIPI_CR_DPY_OT28		474</div><div class='add'>+MX6Q_PAD_DI0_DISP_CLK__SDMA_DBG_CR_STA0		475</div><div class='add'>+MX6Q_PAD_DI0_DISP_CLK__GPIO_4_16		476</div><div class='add'>+MX6Q_PAD_DI0_DISP_CLK__MMDC_DEBUG_0		477</div><div class='add'>+MX6Q_PAD_DI0_PIN15__IPU1_DI0_PIN15		478</div><div class='add'>+MX6Q_PAD_DI0_PIN15__IPU2_DI0_PIN15		479</div><div class='add'>+MX6Q_PAD_DI0_PIN15__AUDMUX_AUD6_TXC		480</div><div class='add'>+MX6Q_PAD_DI0_PIN15__MIPI_CR_DPHY_OUT_29		481</div><div class='add'>+MX6Q_PAD_DI0_PIN15__SDMA_DBG_CORE_STA_1		482</div><div class='add'>+MX6Q_PAD_DI0_PIN15__GPIO_4_17			483</div><div class='add'>+MX6Q_PAD_DI0_PIN15__MMDC_MMDC_DEBUG_1		484</div><div class='add'>+MX6Q_PAD_DI0_PIN2__IPU1_DI0_PIN2		485</div><div class='add'>+MX6Q_PAD_DI0_PIN2__IPU2_DI0_PIN2		486</div><div class='add'>+MX6Q_PAD_DI0_PIN2__AUDMUX_AUD6_TXD		487</div><div class='add'>+MX6Q_PAD_DI0_PIN2__MIPI_CR_DPHY_OUT_30		488</div><div class='add'>+MX6Q_PAD_DI0_PIN2__SDMA_DBG_CORE_STA_2		489</div><div class='add'>+MX6Q_PAD_DI0_PIN2__GPIO_4_18			490</div><div class='add'>+MX6Q_PAD_DI0_PIN2__MMDC_DEBUG_2			491</div><div class='add'>+MX6Q_PAD_DI0_PIN2__PL301_PER1_HADDR_9		492</div><div class='add'>+MX6Q_PAD_DI0_PIN3__IPU1_DI0_PIN3		493</div><div class='add'>+MX6Q_PAD_DI0_PIN3__IPU2_DI0_PIN3		494</div><div class='add'>+MX6Q_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS		495</div><div class='add'>+MX6Q_PAD_DI0_PIN3__MIPI_CORE_DPHY_OUT31		496</div><div class='add'>+MX6Q_PAD_DI0_PIN3__SDMA_DBG_CORE_STA_3		497</div><div class='add'>+MX6Q_PAD_DI0_PIN3__GPIO_4_19			498</div><div class='add'>+MX6Q_PAD_DI0_PIN3__MMDC_MMDC_DEBUG_3		499</div><div class='add'>+MX6Q_PAD_DI0_PIN3__PL301_PER1_HADDR_10		500</div><div class='add'>+MX6Q_PAD_DI0_PIN4__IPU1_DI0_PIN4		501</div><div class='add'>+MX6Q_PAD_DI0_PIN4__IPU2_DI0_PIN4		502</div><div class='add'>+MX6Q_PAD_DI0_PIN4__AUDMUX_AUD6_RXD		503</div><div class='add'>+MX6Q_PAD_DI0_PIN4__USDHC1_WP			504</div><div class='add'>+MX6Q_PAD_DI0_PIN4__SDMA_DEBUG_YIELD		505</div><div class='add'>+MX6Q_PAD_DI0_PIN4__GPIO_4_20			506</div><div class='add'>+MX6Q_PAD_DI0_PIN4__MMDC_MMDC_DEBUG_4		507</div><div class='add'>+MX6Q_PAD_DI0_PIN4__PL301_PER1_HADDR_11		508</div><div class='add'>+MX6Q_PAD_DISP0_DAT0__IPU1_DISP0_DAT_0		509</div><div class='add'>+MX6Q_PAD_DISP0_DAT0__IPU2_DISP0_DAT_0		510</div><div class='add'>+MX6Q_PAD_DISP0_DAT0__ECSPI3_SCLK		511</div><div class='add'>+MX6Q_PAD_DISP0_DAT0__USDHC1_USDHC_DBG_0		512</div><div class='add'>+MX6Q_PAD_DISP0_DAT0__SDMA_DBG_CORE_RUN		513</div><div class='add'>+MX6Q_PAD_DISP0_DAT0__GPIO_4_21			514</div><div class='add'>+MX6Q_PAD_DISP0_DAT0__MMDC_MMDC_DEBUG_5		515</div><div class='add'>+MX6Q_PAD_DISP0_DAT1__IPU1_DISP0_DAT_1		516</div><div class='add'>+MX6Q_PAD_DISP0_DAT1__IPU2_DISP0_DAT_1		517</div><div class='add'>+MX6Q_PAD_DISP0_DAT1__ECSPI3_MOSI		518</div><div class='add'>+MX6Q_PAD_DISP0_DAT1__USDHC1_USDHC_DBG_1		519</div><div class='add'>+MX6Q_PAD_DISP0_DAT1__SDMA_DBG_EVT_CHNSL		520</div><div class='add'>+MX6Q_PAD_DISP0_DAT1__GPIO_4_22			521</div><div class='add'>+MX6Q_PAD_DISP0_DAT1__MMDC_DEBUG_6		522</div><div class='add'>+MX6Q_PAD_DISP0_DAT1__PL301_PER1_HADR_12		523</div><div class='add'>+MX6Q_PAD_DISP0_DAT2__IPU1_DISP0_DAT_2		524</div><div class='add'>+MX6Q_PAD_DISP0_DAT2__IPU2_DISP0_DAT_2		525</div><div class='add'>+MX6Q_PAD_DISP0_DAT2__ECSPI3_MISO		526</div><div class='add'>+MX6Q_PAD_DISP0_DAT2__USDHC1_USDHC_DBG_2		527</div><div class='add'>+MX6Q_PAD_DISP0_DAT2__SDMA_DEBUG_MODE		528</div><div class='add'>+MX6Q_PAD_DISP0_DAT2__GPIO_4_23			529</div><div class='add'>+MX6Q_PAD_DISP0_DAT2__MMDC_DEBUG_7		530</div><div class='add'>+MX6Q_PAD_DISP0_DAT2__PL301_PER1_HADR_13		531</div><div class='add'>+MX6Q_PAD_DISP0_DAT3__IPU1_DISP0_DAT_3		532</div><div class='add'>+MX6Q_PAD_DISP0_DAT3__IPU2_DISP0_DAT_3		533</div><div class='add'>+MX6Q_PAD_DISP0_DAT3__ECSPI3_SS0			534</div><div class='add'>+MX6Q_PAD_DISP0_DAT3__USDHC1_USDHC_DBG_3		535</div><div class='add'>+MX6Q_PAD_DISP0_DAT3__SDMA_DBG_BUS_ERROR		536</div><div class='add'>+MX6Q_PAD_DISP0_DAT3__GPIO_4_24			537</div><div class='add'>+MX6Q_PAD_DISP0_DAT3__MMDC_MMDC_DBG_8		538</div><div class='add'>+MX6Q_PAD_DISP0_DAT3__PL301_PER1_HADR_14		539</div><div class='add'>+MX6Q_PAD_DISP0_DAT4__IPU1_DISP0_DAT_4		540</div><div class='add'>+MX6Q_PAD_DISP0_DAT4__IPU2_DISP0_DAT_4		541</div><div class='add'>+MX6Q_PAD_DISP0_DAT4__ECSPI3_SS1			542</div><div class='add'>+MX6Q_PAD_DISP0_DAT4__USDHC1_USDHC_DBG_4		543</div><div class='add'>+MX6Q_PAD_DISP0_DAT4__SDMA_DEBUG_BUS_RWB		544</div><div class='add'>+MX6Q_PAD_DISP0_DAT4__GPIO_4_25			545</div><div class='add'>+MX6Q_PAD_DISP0_DAT4__MMDC_MMDC_DEBUG_9		546</div><div class='add'>+MX6Q_PAD_DISP0_DAT4__PL301_PER1_HADR_15		547</div><div class='add'>+MX6Q_PAD_DISP0_DAT5__IPU1_DISP0_DAT_5		548</div><div class='add'>+MX6Q_PAD_DISP0_DAT5__IPU2_DISP0_DAT_5		549</div><div class='add'>+MX6Q_PAD_DISP0_DAT5__ECSPI3_SS2			550</div><div class='add'>+MX6Q_PAD_DISP0_DAT5__AUDMUX_AUD6_RXFS		551</div><div class='add'>+MX6Q_PAD_DISP0_DAT5__SDMA_DBG_MCH_DMBUS		552</div><div class='add'>+MX6Q_PAD_DISP0_DAT5__GPIO_4_26			553</div><div class='add'>+MX6Q_PAD_DISP0_DAT5__MMDC_DEBUG_10		554</div><div class='add'>+MX6Q_PAD_DISP0_DAT5__PL301_PER1_HADR_16		555</div><div class='add'>+MX6Q_PAD_DISP0_DAT6__IPU1_DISP0_DAT_6		556</div><div class='add'>+MX6Q_PAD_DISP0_DAT6__IPU2_DISP0_DAT_6		557</div><div class='add'>+MX6Q_PAD_DISP0_DAT6__ECSPI3_SS3			558</div><div class='add'>+MX6Q_PAD_DISP0_DAT6__AUDMUX_AUD6_RXC		559</div><div class='add'>+MX6Q_PAD_DISP0_DAT6__SDMA_DBG_RTBUF_WRT		560</div><div class='add'>+MX6Q_PAD_DISP0_DAT6__GPIO_4_27			561</div><div class='add'>+MX6Q_PAD_DISP0_DAT6__MMDC_DEBUG_11		562</div><div class='add'>+MX6Q_PAD_DISP0_DAT6__PL301_PER1_HADR_17		563</div><div class='add'>+MX6Q_PAD_DISP0_DAT7__IPU1_DISP0_DAT_7		564</div><div class='add'>+MX6Q_PAD_DISP0_DAT7__IPU2_DISP0_DAT_7		565</div><div class='add'>+MX6Q_PAD_DISP0_DAT7__ECSPI3_RDY			566</div><div class='add'>+MX6Q_PAD_DISP0_DAT7__USDHC1_USDHC_DBG_5		567</div><div class='add'>+MX6Q_PAD_DISP0_DAT7__SDMA_DBG_EVT_CHN_0		568</div><div class='add'>+MX6Q_PAD_DISP0_DAT7__GPIO_4_28			569</div><div class='add'>+MX6Q_PAD_DISP0_DAT7__MMDC_DEBUG_12		570</div><div class='add'>+MX6Q_PAD_DISP0_DAT7__PL301_PER1_HADR_18		571</div><div class='add'>+MX6Q_PAD_DISP0_DAT8__IPU1_DISP0_DAT_8		572</div><div class='add'>+MX6Q_PAD_DISP0_DAT8__IPU2_DISP0_DAT_8		573</div><div class='add'>+MX6Q_PAD_DISP0_DAT8__PWM1_PWMO			574</div><div class='add'>+MX6Q_PAD_DISP0_DAT8__WDOG1_WDOG_B		575</div><div class='add'>+MX6Q_PAD_DISP0_DAT8__SDMA_DBG_EVT_CHN_1		576</div><div class='add'>+MX6Q_PAD_DISP0_DAT8__GPIO_4_29			577</div><div class='add'>+MX6Q_PAD_DISP0_DAT8__MMDC_DEBUG_13		578</div><div class='add'>+MX6Q_PAD_DISP0_DAT8__PL301_PER1_HADR_19		579</div><div class='add'>+MX6Q_PAD_DISP0_DAT9__IPU1_DISP0_DAT_9		580</div><div class='add'>+MX6Q_PAD_DISP0_DAT9__IPU2_DISP0_DAT_9		581</div><div class='add'>+MX6Q_PAD_DISP0_DAT9__PWM2_PWMO			582</div><div class='add'>+MX6Q_PAD_DISP0_DAT9__WDOG2_WDOG_B		583</div><div class='add'>+MX6Q_PAD_DISP0_DAT9__SDMA_DBG_EVT_CHN_2		584</div><div class='add'>+MX6Q_PAD_DISP0_DAT9__GPIO_4_30			585</div><div class='add'>+MX6Q_PAD_DISP0_DAT9__MMDC_DEBUG_14		586</div><div class='add'>+MX6Q_PAD_DISP0_DAT9__PL301_PER1_HADR_20		587</div><div class='add'>+MX6Q_PAD_DISP0_DAT10__IPU1_DISP0_DAT_10		588</div><div class='add'>+MX6Q_PAD_DISP0_DAT10__IPU2_DISP0_DAT_10		589</div><div class='add'>+MX6Q_PAD_DISP0_DAT10__USDHC1_DBG_6		590</div><div class='add'>+MX6Q_PAD_DISP0_DAT10__SDMA_DBG_EVT_CHN3		591</div><div class='add'>+MX6Q_PAD_DISP0_DAT10__GPIO_4_31			592</div><div class='add'>+MX6Q_PAD_DISP0_DAT10__MMDC_DEBUG_15		593</div><div class='add'>+MX6Q_PAD_DISP0_DAT10__PL301_PER1_HADR21		594</div><div class='add'>+MX6Q_PAD_DISP0_DAT11__IPU1_DISP0_DAT_11		595</div><div class='add'>+MX6Q_PAD_DISP0_DAT11__IPU2_DISP0_DAT_11		596</div><div class='add'>+MX6Q_PAD_DISP0_DAT11__USDHC1_USDHC_DBG7		597</div><div class='add'>+MX6Q_PAD_DISP0_DAT11__SDMA_DBG_EVT_CHN4		598</div><div class='add'>+MX6Q_PAD_DISP0_DAT11__GPIO_5_5			599</div><div class='add'>+MX6Q_PAD_DISP0_DAT11__MMDC_DEBUG_16		600</div><div class='add'>+MX6Q_PAD_DISP0_DAT11__PL301_PER1_HADR22		601</div><div class='add'>+MX6Q_PAD_DISP0_DAT12__IPU1_DISP0_DAT_12		602</div><div class='add'>+MX6Q_PAD_DISP0_DAT12__IPU2_DISP0_DAT_12		603</div><div class='add'>+MX6Q_PAD_DISP0_DAT12__RESERVED_RESERVED		604</div><div class='add'>+MX6Q_PAD_DISP0_DAT12__SDMA_DBG_EVT_CHN5		605</div><div class='add'>+MX6Q_PAD_DISP0_DAT12__GPIO_5_6			606</div><div class='add'>+MX6Q_PAD_DISP0_DAT12__MMDC_DEBUG_17		607</div><div class='add'>+MX6Q_PAD_DISP0_DAT12__PL301_PER1_HADR23		608</div><div class='add'>+MX6Q_PAD_DISP0_DAT13__IPU1_DISP0_DAT_13		609</div><div class='add'>+MX6Q_PAD_DISP0_DAT13__IPU2_DISP0_DAT_13		610</div><div class='add'>+MX6Q_PAD_DISP0_DAT13__AUDMUX_AUD5_RXFS		611</div><div class='add'>+MX6Q_PAD_DISP0_DAT13__SDMA_DBG_EVT_CHN0		612</div><div class='add'>+MX6Q_PAD_DISP0_DAT13__GPIO_5_7			613</div><div class='add'>+MX6Q_PAD_DISP0_DAT13__MMDC_DEBUG_18		614</div><div class='add'>+MX6Q_PAD_DISP0_DAT13__PL301_PER1_HADR24		615</div><div class='add'>+MX6Q_PAD_DISP0_DAT14__IPU1_DISP0_DAT_14		616</div><div class='add'>+MX6Q_PAD_DISP0_DAT14__IPU2_DISP0_DAT_14		617</div><div class='add'>+MX6Q_PAD_DISP0_DAT14__AUDMUX_AUD5_RXC		618</div><div class='add'>+MX6Q_PAD_DISP0_DAT14__SDMA_DBG_EVT_CHN1		619</div><div class='add'>+MX6Q_PAD_DISP0_DAT14__GPIO_5_8			620</div><div class='add'>+MX6Q_PAD_DISP0_DAT14__MMDC_DEBUG_19		621</div><div class='add'>+MX6Q_PAD_DISP0_DAT15__IPU1_DISP0_DAT_15		622</div><div class='add'>+MX6Q_PAD_DISP0_DAT15__IPU2_DISP0_DAT_15		623</div><div class='add'>+MX6Q_PAD_DISP0_DAT15__ECSPI1_SS1		624</div><div class='add'>+MX6Q_PAD_DISP0_DAT15__ECSPI2_SS1		625</div><div class='add'>+MX6Q_PAD_DISP0_DAT15__SDMA_DBG_EVT_CHN2		626</div><div class='add'>+MX6Q_PAD_DISP0_DAT15__GPIO_5_9			627</div><div class='add'>+MX6Q_PAD_DISP0_DAT15__MMDC_DEBUG_20		628</div><div class='add'>+MX6Q_PAD_DISP0_DAT15__PL301_PER1_HADR25		629</div><div class='add'>+MX6Q_PAD_DISP0_DAT16__IPU1_DISP0_DAT_16		630</div><div class='add'>+MX6Q_PAD_DISP0_DAT16__IPU2_DISP0_DAT_16		631</div><div class='add'>+MX6Q_PAD_DISP0_DAT16__ECSPI2_MOSI		632</div><div class='add'>+MX6Q_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC		633</div><div class='add'>+MX6Q_PAD_DISP0_DAT16__SDMA_EXT_EVENT_0		634</div><div class='add'>+MX6Q_PAD_DISP0_DAT16__GPIO_5_10			635</div><div class='add'>+MX6Q_PAD_DISP0_DAT16__MMDC_DEBUG_21		636</div><div class='add'>+MX6Q_PAD_DISP0_DAT16__PL301_PER1_HADR26		637</div><div class='add'>+MX6Q_PAD_DISP0_DAT17__IPU1_DISP0_DAT_17		638</div><div class='add'>+MX6Q_PAD_DISP0_DAT17__IPU2_DISP0_DAT_17		639</div><div class='add'>+MX6Q_PAD_DISP0_DAT17__ECSPI2_MISO		640</div><div class='add'>+MX6Q_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD		641</div><div class='add'>+MX6Q_PAD_DISP0_DAT17__SDMA_EXT_EVENT_1		642</div><div class='add'>+MX6Q_PAD_DISP0_DAT17__GPIO_5_11			643</div><div class='add'>+MX6Q_PAD_DISP0_DAT17__MMDC_DEBUG_22		644</div><div class='add'>+MX6Q_PAD_DISP0_DAT17__PL301_PER1_HADR27		645</div><div class='add'>+MX6Q_PAD_DISP0_DAT18__IPU1_DISP0_DAT_18		646</div><div class='add'>+MX6Q_PAD_DISP0_DAT18__IPU2_DISP0_DAT_18		647</div><div class='add'>+MX6Q_PAD_DISP0_DAT18__ECSPI2_SS0		648</div><div class='add'>+MX6Q_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS		649</div><div class='add'>+MX6Q_PAD_DISP0_DAT18__AUDMUX_AUD4_RXFS		650</div><div class='add'>+MX6Q_PAD_DISP0_DAT18__GPIO_5_12			651</div><div class='add'>+MX6Q_PAD_DISP0_DAT18__MMDC_DEBUG_23		652</div><div class='add'>+MX6Q_PAD_DISP0_DAT18__WEIM_WEIM_CS_2		653</div><div class='add'>+MX6Q_PAD_DISP0_DAT19__IPU1_DISP0_DAT_19		654</div><div class='add'>+MX6Q_PAD_DISP0_DAT19__IPU2_DISP0_DAT_19		655</div><div class='add'>+MX6Q_PAD_DISP0_DAT19__ECSPI2_SCLK		656</div><div class='add'>+MX6Q_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD		657</div><div class='add'>+MX6Q_PAD_DISP0_DAT19__AUDMUX_AUD4_RXC		658</div><div class='add'>+MX6Q_PAD_DISP0_DAT19__GPIO_5_13			659</div><div class='add'>+MX6Q_PAD_DISP0_DAT19__MMDC_DEBUG_24		660</div><div class='add'>+MX6Q_PAD_DISP0_DAT19__WEIM_WEIM_CS_3		661</div><div class='add'>+MX6Q_PAD_DISP0_DAT20__IPU1_DISP0_DAT_20		662</div><div class='add'>+MX6Q_PAD_DISP0_DAT20__IPU2_DISP0_DAT_20		663</div><div class='add'>+MX6Q_PAD_DISP0_DAT20__ECSPI1_SCLK		664</div><div class='add'>+MX6Q_PAD_DISP0_DAT20__AUDMUX_AUD4_TXC		665</div><div class='add'>+MX6Q_PAD_DISP0_DAT20__SDMA_DBG_EVT_CHN7		666</div><div class='add'>+MX6Q_PAD_DISP0_DAT20__GPIO_5_14			667</div><div class='add'>+MX6Q_PAD_DISP0_DAT20__MMDC_DEBUG_25		668</div><div class='add'>+MX6Q_PAD_DISP0_DAT20__PL301_PER1_HADR28		669</div><div class='add'>+MX6Q_PAD_DISP0_DAT21__IPU1_DISP0_DAT_21		670</div><div class='add'>+MX6Q_PAD_DISP0_DAT21__IPU2_DISP0_DAT_21		671</div><div class='add'>+MX6Q_PAD_DISP0_DAT21__ECSPI1_MOSI		672</div><div class='add'>+MX6Q_PAD_DISP0_DAT21__AUDMUX_AUD4_TXD		673</div><div class='add'>+MX6Q_PAD_DISP0_DAT21__SDMA_DBG_BUS_DEV0		674</div><div class='add'>+MX6Q_PAD_DISP0_DAT21__GPIO_5_15			675</div><div class='add'>+MX6Q_PAD_DISP0_DAT21__MMDC_DEBUG_26		676</div><div class='add'>+MX6Q_PAD_DISP0_DAT21__PL301_PER1_HADR29		677</div><div class='add'>+MX6Q_PAD_DISP0_DAT22__IPU1_DISP0_DAT_22		678</div><div class='add'>+MX6Q_PAD_DISP0_DAT22__IPU2_DISP0_DAT_22		679</div><div class='add'>+MX6Q_PAD_DISP0_DAT22__ECSPI1_MISO		680</div><div class='add'>+MX6Q_PAD_DISP0_DAT22__AUDMUX_AUD4_TXFS		681</div><div class='add'>+MX6Q_PAD_DISP0_DAT22__SDMA_DBG_BUS_DEV1		682</div><div class='add'>+MX6Q_PAD_DISP0_DAT22__GPIO_5_16			683</div><div class='add'>+MX6Q_PAD_DISP0_DAT22__MMDC_DEBUG_27		684</div><div class='add'>+MX6Q_PAD_DISP0_DAT22__PL301_PER1_HADR30		685</div><div class='add'>+MX6Q_PAD_DISP0_DAT23__IPU1_DISP0_DAT_23		686</div><div class='add'>+MX6Q_PAD_DISP0_DAT23__IPU2_DISP0_DAT_23		687</div><div class='add'>+MX6Q_PAD_DISP0_DAT23__ECSPI1_SS0		688</div><div class='add'>+MX6Q_PAD_DISP0_DAT23__AUDMUX_AUD4_RXD		689</div><div class='add'>+MX6Q_PAD_DISP0_DAT23__SDMA_DBG_BUS_DEV2		690</div><div class='add'>+MX6Q_PAD_DISP0_DAT23__GPIO_5_17			691</div><div class='add'>+MX6Q_PAD_DISP0_DAT23__MMDC_DEBUG_28		692</div><div class='add'>+MX6Q_PAD_DISP0_DAT23__PL301_PER1_HADR31		693</div><div class='add'>+MX6Q_PAD_ENET_MDIO__RESERVED_RESERVED		694</div><div class='add'>+MX6Q_PAD_ENET_MDIO__ENET_MDIO			695</div><div class='add'>+MX6Q_PAD_ENET_MDIO__ESAI1_SCKR			696</div><div class='add'>+MX6Q_PAD_ENET_MDIO__SDMA_DEBUG_BUS_DEV3		697</div><div class='add'>+MX6Q_PAD_ENET_MDIO__ENET_1588_EVT1_OUT		698</div><div class='add'>+MX6Q_PAD_ENET_MDIO__GPIO_1_22			699</div><div class='add'>+MX6Q_PAD_ENET_MDIO__SPDIF_PLOCK			700</div><div class='add'>+MX6Q_PAD_ENET_REF_CLK__RESERVED_RSRVED		701</div><div class='add'>+MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK		702</div><div class='add'>+MX6Q_PAD_ENET_REF_CLK__ESAI1_FSR		703</div><div class='add'>+MX6Q_PAD_ENET_REF_CLK__SDMA_DBGBUS_DEV4		704</div><div class='add'>+MX6Q_PAD_ENET_REF_CLK__GPIO_1_23		705</div><div class='add'>+MX6Q_PAD_ENET_REF_CLK__SPDIF_SRCLK		706</div><div class='add'>+MX6Q_PAD_ENET_REF_CLK__USBPHY1_RX_SQH		707</div><div class='add'>+MX6Q_PAD_ENET_RX_ER__ENET_RX_ER			708</div><div class='add'>+MX6Q_PAD_ENET_RX_ER__ESAI1_HCKR			709</div><div class='add'>+MX6Q_PAD_ENET_RX_ER__SPDIF_IN1			710</div><div class='add'>+MX6Q_PAD_ENET_RX_ER__ENET_1588_EVT2_OUT		711</div><div class='add'>+MX6Q_PAD_ENET_RX_ER__GPIO_1_24			712</div><div class='add'>+MX6Q_PAD_ENET_RX_ER__PHY_TDI			713</div><div class='add'>+MX6Q_PAD_ENET_RX_ER__USBPHY1_RX_HS_RXD		714</div><div class='add'>+MX6Q_PAD_ENET_CRS_DV__RESERVED_RSRVED		715</div><div class='add'>+MX6Q_PAD_ENET_CRS_DV__ENET_RX_EN		716</div><div class='add'>+MX6Q_PAD_ENET_CRS_DV__ESAI1_SCKT		717</div><div class='add'>+MX6Q_PAD_ENET_CRS_DV__SPDIF_EXTCLK		718</div><div class='add'>+MX6Q_PAD_ENET_CRS_DV__GPIO_1_25			719</div><div class='add'>+MX6Q_PAD_ENET_CRS_DV__PHY_TDO			720</div><div class='add'>+MX6Q_PAD_ENET_CRS_DV__USBPHY1_RX_FS_RXD		721</div><div class='add'>+MX6Q_PAD_ENET_RXD1__MLB_MLBSIG			722</div><div class='add'>+MX6Q_PAD_ENET_RXD1__ENET_RDATA_1		723</div><div class='add'>+MX6Q_PAD_ENET_RXD1__ESAI1_FST			724</div><div class='add'>+MX6Q_PAD_ENET_RXD1__ENET_1588_EVT3_OUT		725</div><div class='add'>+MX6Q_PAD_ENET_RXD1__GPIO_1_26			726</div><div class='add'>+MX6Q_PAD_ENET_RXD1__PHY_TCK			727</div><div class='add'>+MX6Q_PAD_ENET_RXD1__USBPHY1_RX_DISCON		728</div><div class='add'>+MX6Q_PAD_ENET_RXD0__OSC32K_32K_OUT		729</div><div class='add'>+MX6Q_PAD_ENET_RXD0__ENET_RDATA_0		730</div><div class='add'>+MX6Q_PAD_ENET_RXD0__ESAI1_HCKT			731</div><div class='add'>+MX6Q_PAD_ENET_RXD0__SPDIF_OUT1			732</div><div class='add'>+MX6Q_PAD_ENET_RXD0__GPIO_1_27			733</div><div class='add'>+MX6Q_PAD_ENET_RXD0__PHY_TMS			734</div><div class='add'>+MX6Q_PAD_ENET_RXD0__USBPHY1_PLL_CK20DIV		735</div><div class='add'>+MX6Q_PAD_ENET_TX_EN__RESERVED_RSRVED		736</div><div class='add'>+MX6Q_PAD_ENET_TX_EN__ENET_TX_EN			737</div><div class='add'>+MX6Q_PAD_ENET_TX_EN__ESAI1_TX3_RX2		738</div><div class='add'>+MX6Q_PAD_ENET_TX_EN__GPIO_1_28			739</div><div class='add'>+MX6Q_PAD_ENET_TX_EN__SATA_PHY_TDI		740</div><div class='add'>+MX6Q_PAD_ENET_TX_EN__USBPHY2_RX_SQH		741</div><div class='add'>+MX6Q_PAD_ENET_TXD1__MLB_MLBCLK			742</div><div class='add'>+MX6Q_PAD_ENET_TXD1__ENET_TDATA_1		743</div><div class='add'>+MX6Q_PAD_ENET_TXD1__ESAI1_TX2_RX3		744</div><div class='add'>+MX6Q_PAD_ENET_TXD1__ENET_1588_EVENT0_IN		745</div><div class='add'>+MX6Q_PAD_ENET_TXD1__GPIO_1_29			746</div><div class='add'>+MX6Q_PAD_ENET_TXD1__SATA_PHY_TDO		747</div><div class='add'>+MX6Q_PAD_ENET_TXD1__USBPHY2_RX_HS_RXD		748</div><div class='add'>+MX6Q_PAD_ENET_TXD0__RESERVED_RSRVED		749</div><div class='add'>+MX6Q_PAD_ENET_TXD0__ENET_TDATA_0		750</div><div class='add'>+MX6Q_PAD_ENET_TXD0__ESAI1_TX4_RX1		751</div><div class='add'>+MX6Q_PAD_ENET_TXD0__GPIO_1_30			752</div><div class='add'>+MX6Q_PAD_ENET_TXD0__SATA_PHY_TCK		753</div><div class='add'>+MX6Q_PAD_ENET_TXD0__USBPHY2_RX_FS_RXD		754</div><div class='add'>+MX6Q_PAD_ENET_MDC__MLB_MLBDAT			755</div><div class='add'>+MX6Q_PAD_ENET_MDC__ENET_MDC			756</div><div class='add'>+MX6Q_PAD_ENET_MDC__ESAI1_TX5_RX0		757</div><div class='add'>+MX6Q_PAD_ENET_MDC__ENET_1588_EVENT1_IN		758</div><div class='add'>+MX6Q_PAD_ENET_MDC__GPIO_1_31			759</div><div class='add'>+MX6Q_PAD_ENET_MDC__SATA_PHY_TMS			760</div><div class='add'>+MX6Q_PAD_ENET_MDC__USBPHY2_RX_DISCON		761</div><div class='add'>+MX6Q_PAD_DRAM_D40__MMDC_DRAM_D_40		762</div><div class='add'>+MX6Q_PAD_DRAM_D41__MMDC_DRAM_D_41		763</div><div class='add'>+MX6Q_PAD_DRAM_D42__MMDC_DRAM_D_42		764</div><div class='add'>+MX6Q_PAD_DRAM_D43__MMDC_DRAM_D_43		765</div><div class='add'>+MX6Q_PAD_DRAM_D44__MMDC_DRAM_D_44		766</div><div class='add'>+MX6Q_PAD_DRAM_D45__MMDC_DRAM_D_45		767</div><div class='add'>+MX6Q_PAD_DRAM_D46__MMDC_DRAM_D_46		768</div><div class='add'>+MX6Q_PAD_DRAM_D47__MMDC_DRAM_D_47		769</div><div class='add'>+MX6Q_PAD_DRAM_SDQS5__MMDC_DRAM_SDQS_5		770</div><div class='add'>+MX6Q_PAD_DRAM_DQM5__MMDC_DRAM_DQM_5		771</div><div class='add'>+MX6Q_PAD_DRAM_D32__MMDC_DRAM_D_32		772</div><div class='add'>+MX6Q_PAD_DRAM_D33__MMDC_DRAM_D_33		773</div><div class='add'>+MX6Q_PAD_DRAM_D34__MMDC_DRAM_D_34		774</div><div class='add'>+MX6Q_PAD_DRAM_D35__MMDC_DRAM_D_35		775</div><div class='add'>+MX6Q_PAD_DRAM_D36__MMDC_DRAM_D_36		776</div><div class='add'>+MX6Q_PAD_DRAM_D37__MMDC_DRAM_D_37		777</div><div class='add'>+MX6Q_PAD_DRAM_D38__MMDC_DRAM_D_38		778</div><div class='add'>+MX6Q_PAD_DRAM_D39__MMDC_DRAM_D_39		779</div><div class='add'>+MX6Q_PAD_DRAM_DQM4__MMDC_DRAM_DQM_4		780</div><div class='add'>+MX6Q_PAD_DRAM_SDQS4__MMDC_DRAM_SDQS_4		781</div><div class='add'>+MX6Q_PAD_DRAM_D24__MMDC_DRAM_D_24		782</div><div class='add'>+MX6Q_PAD_DRAM_D25__MMDC_DRAM_D_25		783</div><div class='add'>+MX6Q_PAD_DRAM_D26__MMDC_DRAM_D_26		784</div><div class='add'>+MX6Q_PAD_DRAM_D27__MMDC_DRAM_D_27		785</div><div class='add'>+MX6Q_PAD_DRAM_D28__MMDC_DRAM_D_28		786</div><div class='add'>+MX6Q_PAD_DRAM_D29__MMDC_DRAM_D_29		787</div><div class='add'>+MX6Q_PAD_DRAM_SDQS3__MMDC_DRAM_SDQS_3		788</div><div class='add'>+MX6Q_PAD_DRAM_D30__MMDC_DRAM_D_30		789</div><div class='add'>+MX6Q_PAD_DRAM_D31__MMDC_DRAM_D_31		790</div><div class='add'>+MX6Q_PAD_DRAM_DQM3__MMDC_DRAM_DQM_3		791</div><div class='add'>+MX6Q_PAD_DRAM_D16__MMDC_DRAM_D_16		792</div><div class='add'>+MX6Q_PAD_DRAM_D17__MMDC_DRAM_D_17		793</div><div class='add'>+MX6Q_PAD_DRAM_D18__MMDC_DRAM_D_18		794</div><div class='add'>+MX6Q_PAD_DRAM_D19__MMDC_DRAM_D_19		795</div><div class='add'>+MX6Q_PAD_DRAM_D20__MMDC_DRAM_D_20		796</div><div class='add'>+MX6Q_PAD_DRAM_D21__MMDC_DRAM_D_21		797</div><div class='add'>+MX6Q_PAD_DRAM_D22__MMDC_DRAM_D_22		798</div><div class='add'>+MX6Q_PAD_DRAM_SDQS2__MMDC_DRAM_SDQS_2		799</div><div class='add'>+MX6Q_PAD_DRAM_D23__MMDC_DRAM_D_23		800</div><div class='add'>+MX6Q_PAD_DRAM_DQM2__MMDC_DRAM_DQM_2		801</div><div class='add'>+MX6Q_PAD_DRAM_A0__MMDC_DRAM_A_0			802</div><div class='add'>+MX6Q_PAD_DRAM_A1__MMDC_DRAM_A_1			803</div><div class='add'>+MX6Q_PAD_DRAM_A2__MMDC_DRAM_A_2			804</div><div class='add'>+MX6Q_PAD_DRAM_A3__MMDC_DRAM_A_3			805</div><div class='add'>+MX6Q_PAD_DRAM_A4__MMDC_DRAM_A_4			806</div><div class='add'>+MX6Q_PAD_DRAM_A5__MMDC_DRAM_A_5			807</div><div class='add'>+MX6Q_PAD_DRAM_A6__MMDC_DRAM_A_6			808</div><div class='add'>+MX6Q_PAD_DRAM_A7__MMDC_DRAM_A_7			809</div><div class='add'>+MX6Q_PAD_DRAM_A8__MMDC_DRAM_A_8			810</div><div class='add'>+MX6Q_PAD_DRAM_A9__MMDC_DRAM_A_9			811</div><div class='add'>+MX6Q_PAD_DRAM_A10__MMDC_DRAM_A_10		812</div><div class='add'>+MX6Q_PAD_DRAM_A11__MMDC_DRAM_A_11		813</div><div class='add'>+MX6Q_PAD_DRAM_A12__MMDC_DRAM_A_12		814</div><div class='add'>+MX6Q_PAD_DRAM_A13__MMDC_DRAM_A_13		815</div><div class='add'>+MX6Q_PAD_DRAM_A14__MMDC_DRAM_A_14		816</div><div class='add'>+MX6Q_PAD_DRAM_A15__MMDC_DRAM_A_15		817</div><div class='add'>+MX6Q_PAD_DRAM_CAS__MMDC_DRAM_CAS		818</div><div class='add'>+MX6Q_PAD_DRAM_CS0__MMDC_DRAM_CS_0		819</div><div class='add'>+MX6Q_PAD_DRAM_CS1__MMDC_DRAM_CS_1		820</div><div class='add'>+MX6Q_PAD_DRAM_RAS__MMDC_DRAM_RAS		821</div><div class='add'>+MX6Q_PAD_DRAM_RESET__MMDC_DRAM_RESET		822</div><div class='add'>+MX6Q_PAD_DRAM_SDBA0__MMDC_DRAM_SDBA_0		823</div><div class='add'>+MX6Q_PAD_DRAM_SDBA1__MMDC_DRAM_SDBA_1		824</div><div class='add'>+MX6Q_PAD_DRAM_SDCLK_0__MMDC_DRAM_SDCLK0		825</div><div class='add'>+MX6Q_PAD_DRAM_SDBA2__MMDC_DRAM_SDBA_2		826</div><div class='add'>+MX6Q_PAD_DRAM_SDCKE0__MMDC_DRAM_SDCKE_0		827</div><div class='add'>+MX6Q_PAD_DRAM_SDCLK_1__MMDC_DRAM_SDCLK1		828</div><div class='add'>+MX6Q_PAD_DRAM_SDCKE1__MMDC_DRAM_SDCKE_1		829</div><div class='add'>+MX6Q_PAD_DRAM_SDODT0__MMDC_DRAM_ODT_0		830</div><div class='add'>+MX6Q_PAD_DRAM_SDODT1__MMDC_DRAM_ODT_1		831</div><div class='add'>+MX6Q_PAD_DRAM_SDWE__MMDC_DRAM_SDWE		832</div><div class='add'>+MX6Q_PAD_DRAM_D0__MMDC_DRAM_D_0			833</div><div class='add'>+MX6Q_PAD_DRAM_D1__MMDC_DRAM_D_1			834</div><div class='add'>+MX6Q_PAD_DRAM_D2__MMDC_DRAM_D_2			835</div><div class='add'>+MX6Q_PAD_DRAM_D3__MMDC_DRAM_D_3			836</div><div class='add'>+MX6Q_PAD_DRAM_D4__MMDC_DRAM_D_4			837</div><div class='add'>+MX6Q_PAD_DRAM_D5__MMDC_DRAM_D_5			838</div><div class='add'>+MX6Q_PAD_DRAM_SDQS0__MMDC_DRAM_SDQS_0		839</div><div class='add'>+MX6Q_PAD_DRAM_D6__MMDC_DRAM_D_6			840</div><div class='add'>+MX6Q_PAD_DRAM_D7__MMDC_DRAM_D_7			841</div><div class='add'>+MX6Q_PAD_DRAM_DQM0__MMDC_DRAM_DQM_0		842</div><div class='add'>+MX6Q_PAD_DRAM_D8__MMDC_DRAM_D_8			843</div><div class='add'>+MX6Q_PAD_DRAM_D9__MMDC_DRAM_D_9			844</div><div class='add'>+MX6Q_PAD_DRAM_D10__MMDC_DRAM_D_10		845</div><div class='add'>+MX6Q_PAD_DRAM_D11__MMDC_DRAM_D_11		846</div><div class='add'>+MX6Q_PAD_DRAM_D12__MMDC_DRAM_D_12		847</div><div class='add'>+MX6Q_PAD_DRAM_D13__MMDC_DRAM_D_13		848</div><div class='add'>+MX6Q_PAD_DRAM_D14__MMDC_DRAM_D_14		849</div><div class='add'>+MX6Q_PAD_DRAM_SDQS1__MMDC_DRAM_SDQS_1		850</div><div class='add'>+MX6Q_PAD_DRAM_D15__MMDC_DRAM_D_15		851</div><div class='add'>+MX6Q_PAD_DRAM_DQM1__MMDC_DRAM_DQM_1		852</div><div class='add'>+MX6Q_PAD_DRAM_D48__MMDC_DRAM_D_48		853</div><div class='add'>+MX6Q_PAD_DRAM_D49__MMDC_DRAM_D_49		854</div><div class='add'>+MX6Q_PAD_DRAM_D50__MMDC_DRAM_D_50		855</div><div class='add'>+MX6Q_PAD_DRAM_D51__MMDC_DRAM_D_51		856</div><div class='add'>+MX6Q_PAD_DRAM_D52__MMDC_DRAM_D_52		857</div><div class='add'>+MX6Q_PAD_DRAM_D53__MMDC_DRAM_D_53		858</div><div class='add'>+MX6Q_PAD_DRAM_D54__MMDC_DRAM_D_54		859</div><div class='add'>+MX6Q_PAD_DRAM_D55__MMDC_DRAM_D_55		860</div><div class='add'>+MX6Q_PAD_DRAM_SDQS6__MMDC_DRAM_SDQS_6		861</div><div class='add'>+MX6Q_PAD_DRAM_DQM6__MMDC_DRAM_DQM_6		862</div><div class='add'>+MX6Q_PAD_DRAM_D56__MMDC_DRAM_D_56		863</div><div class='add'>+MX6Q_PAD_DRAM_SDQS7__MMDC_DRAM_SDQS_7		864</div><div class='add'>+MX6Q_PAD_DRAM_D57__MMDC_DRAM_D_57		865</div><div class='add'>+MX6Q_PAD_DRAM_D58__MMDC_DRAM_D_58		866</div><div class='add'>+MX6Q_PAD_DRAM_D59__MMDC_DRAM_D_59		867</div><div class='add'>+MX6Q_PAD_DRAM_D60__MMDC_DRAM_D_60		868</div><div class='add'>+MX6Q_PAD_DRAM_DQM7__MMDC_DRAM_DQM_7		869</div><div class='add'>+MX6Q_PAD_DRAM_D61__MMDC_DRAM_D_61		870</div><div class='add'>+MX6Q_PAD_DRAM_D62__MMDC_DRAM_D_62		871</div><div class='add'>+MX6Q_PAD_DRAM_D63__MMDC_DRAM_D_63		872</div><div class='add'>+MX6Q_PAD_KEY_COL0__ECSPI1_SCLK			873</div><div class='add'>+MX6Q_PAD_KEY_COL0__ENET_RDATA_3			874</div><div class='add'>+MX6Q_PAD_KEY_COL0__AUDMUX_AUD5_TXC		875</div><div class='add'>+MX6Q_PAD_KEY_COL0__KPP_COL_0			876</div><div class='add'>+MX6Q_PAD_KEY_COL0__UART4_TXD			877</div><div class='add'>+MX6Q_PAD_KEY_COL0__GPIO_4_6			878</div><div class='add'>+MX6Q_PAD_KEY_COL0__DCIC1_DCIC_OUT		879</div><div class='add'>+MX6Q_PAD_KEY_COL0__SRC_ANY_PU_RST		880</div><div class='add'>+MX6Q_PAD_KEY_ROW0__ECSPI1_MOSI			881</div><div class='add'>+MX6Q_PAD_KEY_ROW0__ENET_TDATA_3			882</div><div class='add'>+MX6Q_PAD_KEY_ROW0__AUDMUX_AUD5_TXD		883</div><div class='add'>+MX6Q_PAD_KEY_ROW0__KPP_ROW_0			884</div><div class='add'>+MX6Q_PAD_KEY_ROW0__UART4_RXD			885</div><div class='add'>+MX6Q_PAD_KEY_ROW0__GPIO_4_7			886</div><div class='add'>+MX6Q_PAD_KEY_ROW0__DCIC2_DCIC_OUT		887</div><div class='add'>+MX6Q_PAD_KEY_ROW0__PL301_PER1_HADR_0		888</div><div class='add'>+MX6Q_PAD_KEY_COL1__ECSPI1_MISO			889</div><div class='add'>+MX6Q_PAD_KEY_COL1__ENET_MDIO			890</div><div class='add'>+MX6Q_PAD_KEY_COL1__AUDMUX_AUD5_TXFS		891</div><div class='add'>+MX6Q_PAD_KEY_COL1__KPP_COL_1			892</div><div class='add'>+MX6Q_PAD_KEY_COL1__UART5_TXD			893</div><div class='add'>+MX6Q_PAD_KEY_COL1__GPIO_4_8			894</div><div class='add'>+MX6Q_PAD_KEY_COL1__USDHC1_VSELECT		895</div><div class='add'>+MX6Q_PAD_KEY_COL1__PL301MX_PER1_HADR_1		896</div><div class='add'>+MX6Q_PAD_KEY_ROW1__ECSPI1_SS0			897</div><div class='add'>+MX6Q_PAD_KEY_ROW1__ENET_COL			898</div><div class='add'>+MX6Q_PAD_KEY_ROW1__AUDMUX_AUD5_RXD		899</div><div class='add'>+MX6Q_PAD_KEY_ROW1__KPP_ROW_1			900</div><div class='add'>+MX6Q_PAD_KEY_ROW1__UART5_RXD			901</div><div class='add'>+MX6Q_PAD_KEY_ROW1__GPIO_4_9			902</div><div class='add'>+MX6Q_PAD_KEY_ROW1__USDHC2_VSELECT		903</div><div class='add'>+MX6Q_PAD_KEY_ROW1__PL301_PER1_HADDR_2		904</div><div class='add'>+MX6Q_PAD_KEY_COL2__ECSPI1_SS1			905</div><div class='add'>+MX6Q_PAD_KEY_COL2__ENET_RDATA_2			906</div><div class='add'>+MX6Q_PAD_KEY_COL2__CAN1_TXCAN			907</div><div class='add'>+MX6Q_PAD_KEY_COL2__KPP_COL_2			908</div><div class='add'>+MX6Q_PAD_KEY_COL2__ENET_MDC			909</div><div class='add'>+MX6Q_PAD_KEY_COL2__GPIO_4_10			910</div><div class='add'>+MX6Q_PAD_KEY_COL2__USBOH3_H1_PWRCTL_WKP		911</div><div class='add'>+MX6Q_PAD_KEY_COL2__PL301_PER1_HADDR_3		912</div><div class='add'>+MX6Q_PAD_KEY_ROW2__ECSPI1_SS2			913</div><div class='add'>+MX6Q_PAD_KEY_ROW2__ENET_TDATA_2			914</div><div class='add'>+MX6Q_PAD_KEY_ROW2__CAN1_RXCAN			915</div><div class='add'>+MX6Q_PAD_KEY_ROW2__KPP_ROW_2			916</div><div class='add'>+MX6Q_PAD_KEY_ROW2__USDHC2_VSELECT		917</div><div class='add'>+MX6Q_PAD_KEY_ROW2__GPIO_4_11			918</div><div class='add'>+MX6Q_PAD_KEY_ROW2__HDMI_TX_CEC_LINE		919</div><div class='add'>+MX6Q_PAD_KEY_ROW2__PL301_PER1_HADR_4		920</div><div class='add'>+MX6Q_PAD_KEY_COL3__ECSPI1_SS3			921</div><div class='add'>+MX6Q_PAD_KEY_COL3__ENET_CRS			922</div><div class='add'>+MX6Q_PAD_KEY_COL3__HDMI_TX_DDC_SCL		923</div><div class='add'>+MX6Q_PAD_KEY_COL3__KPP_COL_3			924</div><div class='add'>+MX6Q_PAD_KEY_COL3__I2C2_SCL			925</div><div class='add'>+MX6Q_PAD_KEY_COL3__GPIO_4_12			926</div><div class='add'>+MX6Q_PAD_KEY_COL3__SPDIF_IN1			927</div><div class='add'>+MX6Q_PAD_KEY_COL3__PL301_PER1_HADR_5		928</div><div class='add'>+MX6Q_PAD_KEY_ROW3__OSC32K_32K_OUT		929</div><div class='add'>+MX6Q_PAD_KEY_ROW3__ASRC_ASRC_EXT_CLK		930</div><div class='add'>+MX6Q_PAD_KEY_ROW3__HDMI_TX_DDC_SDA		931</div><div class='add'>+MX6Q_PAD_KEY_ROW3__KPP_ROW_3			932</div><div class='add'>+MX6Q_PAD_KEY_ROW3__I2C2_SDA			933</div><div class='add'>+MX6Q_PAD_KEY_ROW3__GPIO_4_13			934</div><div class='add'>+MX6Q_PAD_KEY_ROW3__USDHC1_VSELECT		935</div><div class='add'>+MX6Q_PAD_KEY_ROW3__PL301_PER1_HADR_6		936</div><div class='add'>+MX6Q_PAD_KEY_COL4__CAN2_TXCAN			937</div><div class='add'>+MX6Q_PAD_KEY_COL4__IPU1_SISG_4			938</div><div class='add'>+MX6Q_PAD_KEY_COL4__USBOH3_USBOTG_OC		939</div><div class='add'>+MX6Q_PAD_KEY_COL4__KPP_COL_4			940</div><div class='add'>+MX6Q_PAD_KEY_COL4__UART5_RTS			941</div><div class='add'>+MX6Q_PAD_KEY_COL4__GPIO_4_14			942</div><div class='add'>+MX6Q_PAD_KEY_COL4__MMDC_DEBUG_49		943</div><div class='add'>+MX6Q_PAD_KEY_COL4__PL301_PER1_HADDR_7		944</div><div class='add'>+MX6Q_PAD_KEY_ROW4__CAN2_RXCAN			945</div><div class='add'>+MX6Q_PAD_KEY_ROW4__IPU1_SISG_5			946</div><div class='add'>+MX6Q_PAD_KEY_ROW4__USBOH3_USBOTG_PWR		947</div><div class='add'>+MX6Q_PAD_KEY_ROW4__KPP_ROW_4			948</div><div class='add'>+MX6Q_PAD_KEY_ROW4__UART5_CTS			949</div><div class='add'>+MX6Q_PAD_KEY_ROW4__GPIO_4_15			950</div><div class='add'>+MX6Q_PAD_KEY_ROW4__MMDC_DEBUG_50		951</div><div class='add'>+MX6Q_PAD_KEY_ROW4__PL301_PER1_HADR_8		952</div><div class='add'>+MX6Q_PAD_GPIO_0__CCM_CLKO			953</div><div class='add'>+MX6Q_PAD_GPIO_0__KPP_COL_5			954</div><div class='add'>+MX6Q_PAD_GPIO_0__ASRC_ASRC_EXT_CLK		955</div><div class='add'>+MX6Q_PAD_GPIO_0__EPIT1_EPITO			956</div><div class='add'>+MX6Q_PAD_GPIO_0__GPIO_1_0			957</div><div class='add'>+MX6Q_PAD_GPIO_0__USBOH3_USBH1_PWR		958</div><div class='add'>+MX6Q_PAD_GPIO_0__SNVS_HP_WRAP_SNVS_VIO5		959</div><div class='add'>+MX6Q_PAD_GPIO_1__ESAI1_SCKR			960</div><div class='add'>+MX6Q_PAD_GPIO_1__WDOG2_WDOG_B			961</div><div class='add'>+MX6Q_PAD_GPIO_1__KPP_ROW_5			962</div><div class='add'>+MX6Q_PAD_GPIO_1__PWM2_PWMO			963</div><div class='add'>+MX6Q_PAD_GPIO_1__GPIO_1_1			964</div><div class='add'>+MX6Q_PAD_GPIO_1__USDHC1_CD			965</div><div class='add'>+MX6Q_PAD_GPIO_1__SRC_TESTER_ACK			966</div><div class='add'>+MX6Q_PAD_GPIO_9__ESAI1_FSR			967</div><div class='add'>+MX6Q_PAD_GPIO_9__WDOG1_WDOG_B			968</div><div class='add'>+MX6Q_PAD_GPIO_9__KPP_COL_6			969</div><div class='add'>+MX6Q_PAD_GPIO_9__CCM_REF_EN_B			970</div><div class='add'>+MX6Q_PAD_GPIO_9__PWM1_PWMO			971</div><div class='add'>+MX6Q_PAD_GPIO_9__GPIO_1_9			972</div><div class='add'>+MX6Q_PAD_GPIO_9__USDHC1_WP			973</div><div class='add'>+MX6Q_PAD_GPIO_9__SRC_EARLY_RST			974</div><div class='add'>+MX6Q_PAD_GPIO_3__ESAI1_HCKR			975</div><div class='add'>+MX6Q_PAD_GPIO_3__OBSERVE_MUX_INT_OUT0		976</div><div class='add'>+MX6Q_PAD_GPIO_3__I2C3_SCL			977</div><div class='add'>+MX6Q_PAD_GPIO_3__ANATOP_24M_OUT			978</div><div class='add'>+MX6Q_PAD_GPIO_3__CCM_CLKO2			979</div><div class='add'>+MX6Q_PAD_GPIO_3__GPIO_1_3			980</div><div class='add'>+MX6Q_PAD_GPIO_3__USBOH3_USBH1_OC		981</div><div class='add'>+MX6Q_PAD_GPIO_3__MLB_MLBCLK			982</div><div class='add'>+MX6Q_PAD_GPIO_6__ESAI1_SCKT			983</div><div class='add'>+MX6Q_PAD_GPIO_6__OBSERVE_MUX_INT_OUT1		984</div><div class='add'>+MX6Q_PAD_GPIO_6__I2C3_SDA			985</div><div class='add'>+MX6Q_PAD_GPIO_6__CCM_CCM_OUT_0			986</div><div class='add'>+MX6Q_PAD_GPIO_6__CSU_CSU_INT_DEB		987</div><div class='add'>+MX6Q_PAD_GPIO_6__GPIO_1_6			988</div><div class='add'>+MX6Q_PAD_GPIO_6__USDHC2_LCTL			989</div><div class='add'>+MX6Q_PAD_GPIO_6__MLB_MLBSIG			990</div><div class='add'>+MX6Q_PAD_GPIO_2__ESAI1_FST			991</div><div class='add'>+MX6Q_PAD_GPIO_2__OBSERVE_MUX_INT_OUT2		992</div><div class='add'>+MX6Q_PAD_GPIO_2__KPP_ROW_6			993</div><div class='add'>+MX6Q_PAD_GPIO_2__CCM_CCM_OUT_1			994</div><div class='add'>+MX6Q_PAD_GPIO_2__CSU_CSU_ALARM_AUT_0		995</div><div class='add'>+MX6Q_PAD_GPIO_2__GPIO_1_2			996</div><div class='add'>+MX6Q_PAD_GPIO_2__USDHC2_WP			997</div><div class='add'>+MX6Q_PAD_GPIO_2__MLB_MLBDAT			998</div><div class='add'>+MX6Q_PAD_GPIO_4__ESAI1_HCKT			999</div><div class='add'>+MX6Q_PAD_GPIO_4__OBSERVE_MUX_INT_OUT3		1000</div><div class='add'>+MX6Q_PAD_GPIO_4__KPP_COL_7			1001</div><div class='add'>+MX6Q_PAD_GPIO_4__CCM_CCM_OUT_2			1002</div><div class='add'>+MX6Q_PAD_GPIO_4__CSU_CSU_ALARM_AUT_1		1003</div><div class='add'>+MX6Q_PAD_GPIO_4__GPIO_1_4			1004</div><div class='add'>+MX6Q_PAD_GPIO_4__USDHC2_CD			1005</div><div class='add'>+MX6Q_PAD_GPIO_4__OCOTP_CRL_WRAR_FUSE_LA		1006</div><div class='add'>+MX6Q_PAD_GPIO_5__ESAI1_TX2_RX3			1007</div><div class='add'>+MX6Q_PAD_GPIO_5__OBSERVE_MUX_INT_OUT4		1008</div><div class='add'>+MX6Q_PAD_GPIO_5__KPP_ROW_7			1009</div><div class='add'>+MX6Q_PAD_GPIO_5__CCM_CLKO			1010</div><div class='add'>+MX6Q_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2		1011</div><div class='add'>+MX6Q_PAD_GPIO_5__GPIO_1_5			1012</div><div class='add'>+MX6Q_PAD_GPIO_5__I2C3_SCL			1013</div><div class='add'>+MX6Q_PAD_GPIO_5__CHEETAH_EVENTI			1014</div><div class='add'>+MX6Q_PAD_GPIO_7__ESAI1_TX4_RX1			1015</div><div class='add'>+MX6Q_PAD_GPIO_7__ECSPI5_RDY			1016</div><div class='add'>+MX6Q_PAD_GPIO_7__EPIT1_EPITO			1017</div><div class='add'>+MX6Q_PAD_GPIO_7__CAN1_TXCAN			1018</div><div class='add'>+MX6Q_PAD_GPIO_7__UART2_TXD			1019</div><div class='add'>+MX6Q_PAD_GPIO_7__GPIO_1_7			1020</div><div class='add'>+MX6Q_PAD_GPIO_7__SPDIF_PLOCK			1021</div><div class='add'>+MX6Q_PAD_GPIO_7__USBOH3_OTGUSB_HST_MODE		1022</div><div class='add'>+MX6Q_PAD_GPIO_8__ESAI1_TX5_RX0			1023</div><div class='add'>+MX6Q_PAD_GPIO_8__ANATOP_ANATOP_32K_OUT		1024</div><div class='add'>+MX6Q_PAD_GPIO_8__EPIT2_EPITO			1025</div><div class='add'>+MX6Q_PAD_GPIO_8__CAN1_RXCAN			1026</div><div class='add'>+MX6Q_PAD_GPIO_8__UART2_RXD			1027</div><div class='add'>+MX6Q_PAD_GPIO_8__GPIO_1_8			1028</div><div class='add'>+MX6Q_PAD_GPIO_8__SPDIF_SRCLK			1029</div><div class='add'>+MX6Q_PAD_GPIO_8__USBOH3_OTG_PWRCTL_WAK		1030</div><div class='add'>+MX6Q_PAD_GPIO_16__ESAI1_TX3_RX2			1031</div><div class='add'>+MX6Q_PAD_GPIO_16__ENET_1588_EVENT2_IN		1032</div><div class='add'>+MX6Q_PAD_GPIO_16__ENET_ETHERNET_REF_OUT		1033</div><div class='add'>+MX6Q_PAD_GPIO_16__USDHC1_LCTL			1034</div><div class='add'>+MX6Q_PAD_GPIO_16__SPDIF_IN1			1035</div><div class='add'>+MX6Q_PAD_GPIO_16__GPIO_7_11			1036</div><div class='add'>+MX6Q_PAD_GPIO_16__I2C3_SDA			1037</div><div class='add'>+MX6Q_PAD_GPIO_16__SJC_DE_B			1038</div><div class='add'>+MX6Q_PAD_GPIO_17__ESAI1_TX0			1039</div><div class='add'>+MX6Q_PAD_GPIO_17__ENET_1588_EVENT3_IN		1040</div><div class='add'>+MX6Q_PAD_GPIO_17__CCM_PMIC_RDY			1041</div><div class='add'>+MX6Q_PAD_GPIO_17__SDMA_SDMA_EXT_EVENT_0		1042</div><div class='add'>+MX6Q_PAD_GPIO_17__SPDIF_OUT1			1043</div><div class='add'>+MX6Q_PAD_GPIO_17__GPIO_7_12			1044</div><div class='add'>+MX6Q_PAD_GPIO_17__SJC_JTAG_ACT			1045</div><div class='add'>+MX6Q_PAD_GPIO_18__ESAI1_TX1			1046</div><div class='add'>+MX6Q_PAD_GPIO_18__ENET_RX_CLK			1047</div><div class='add'>+MX6Q_PAD_GPIO_18__USDHC3_VSELECT		1048</div><div class='add'>+MX6Q_PAD_GPIO_18__SDMA_SDMA_EXT_EVENT_1		1049</div><div class='add'>+MX6Q_PAD_GPIO_18__ASRC_ASRC_EXT_CLK		1050</div><div class='add'>+MX6Q_PAD_GPIO_18__GPIO_7_13			1051</div><div class='add'>+MX6Q_PAD_GPIO_18__SNVS_HP_WRA_SNVS_VIO5		1052</div><div class='add'>+MX6Q_PAD_GPIO_18__SRC_SYSTEM_RST		1053</div><div class='add'>+MX6Q_PAD_GPIO_19__KPP_COL_5			1054</div><div class='add'>+MX6Q_PAD_GPIO_19__ENET_1588_EVENT0_OUT		1055</div><div class='add'>+MX6Q_PAD_GPIO_19__SPDIF_OUT1			1056</div><div class='add'>+MX6Q_PAD_GPIO_19__CCM_CLKO			1057</div><div class='add'>+MX6Q_PAD_GPIO_19__ECSPI1_RDY			1058</div><div class='add'>+MX6Q_PAD_GPIO_19__GPIO_4_5			1059</div><div class='add'>+MX6Q_PAD_GPIO_19__ENET_TX_ER			1060</div><div class='add'>+MX6Q_PAD_GPIO_19__SRC_INT_BOOT			1061</div><div class='add'>+MX6Q_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK		1062</div><div class='add'>+MX6Q_PAD_CSI0_PIXCLK__PCIE_CTRL_MUX_12		1063</div><div class='add'>+MX6Q_PAD_CSI0_PIXCLK__SDMA_DEBUG_PC_0		1064</div><div class='add'>+MX6Q_PAD_CSI0_PIXCLK__GPIO_5_18			1065</div><div class='add'>+MX6Q_PAD_CSI0_PIXCLK___MMDC_DEBUG_29		1066</div><div class='add'>+MX6Q_PAD_CSI0_PIXCLK__CHEETAH_EVENTO		1067</div><div class='add'>+MX6Q_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC		1068</div><div class='add'>+MX6Q_PAD_CSI0_MCLK__PCIE_CTRL_MUX_13		1069</div><div class='add'>+MX6Q_PAD_CSI0_MCLK__CCM_CLKO			1070</div><div class='add'>+MX6Q_PAD_CSI0_MCLK__SDMA_DEBUG_PC_1		1071</div><div class='add'>+MX6Q_PAD_CSI0_MCLK__GPIO_5_19			1072</div><div class='add'>+MX6Q_PAD_CSI0_MCLK__MMDC_MMDC_DEBUG_30		1073</div><div class='add'>+MX6Q_PAD_CSI0_MCLK__CHEETAH_TRCTL		1074</div><div class='add'>+MX6Q_PAD_CSI0_DATA_EN__IPU1_CSI0_DA_EN		1075</div><div class='add'>+MX6Q_PAD_CSI0_DATA_EN__WEIM_WEIM_D_0		1076</div><div class='add'>+MX6Q_PAD_CSI0_DATA_EN__PCIE_CTRL_MUX_14		1077</div><div class='add'>+MX6Q_PAD_CSI0_DATA_EN__SDMA_DEBUG_PC_2		1078</div><div class='add'>+MX6Q_PAD_CSI0_DATA_EN__GPIO_5_20		1079</div><div class='add'>+MX6Q_PAD_CSI0_DATA_EN__MMDC_DEBUG_31		1080</div><div class='add'>+MX6Q_PAD_CSI0_DATA_EN__CHEETAH_TRCLK		1081</div><div class='add'>+MX6Q_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC		1082</div><div class='add'>+MX6Q_PAD_CSI0_VSYNC__WEIM_WEIM_D_1		1083</div><div class='add'>+MX6Q_PAD_CSI0_VSYNC__PCIE_CTRL_MUX_15		1084</div><div class='add'>+MX6Q_PAD_CSI0_VSYNC__SDMA_DEBUG_PC_3		1085</div><div class='add'>+MX6Q_PAD_CSI0_VSYNC__GPIO_5_21			1086</div><div class='add'>+MX6Q_PAD_CSI0_VSYNC__MMDC_DEBUG_32		1087</div><div class='add'>+MX6Q_PAD_CSI0_VSYNC__CHEETAH_TRACE_0		1088</div><div class='add'>+MX6Q_PAD_CSI0_DAT4__IPU1_CSI0_D_4		1089</div><div class='add'>+MX6Q_PAD_CSI0_DAT4__WEIM_WEIM_D_2		1090</div><div class='add'>+MX6Q_PAD_CSI0_DAT4__ECSPI1_SCLK			1091</div><div class='add'>+MX6Q_PAD_CSI0_DAT4__KPP_COL_5			1092</div><div class='add'>+MX6Q_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC		1093</div><div class='add'>+MX6Q_PAD_CSI0_DAT4__GPIO_5_22			1094</div><div class='add'>+MX6Q_PAD_CSI0_DAT4__MMDC_DEBUG_43		1095</div><div class='add'>+MX6Q_PAD_CSI0_DAT4__CHEETAH_TRACE_1		1096</div><div class='add'>+MX6Q_PAD_CSI0_DAT5__IPU1_CSI0_D_5		1097</div><div class='add'>+MX6Q_PAD_CSI0_DAT5__WEIM_WEIM_D_3		1098</div><div class='add'>+MX6Q_PAD_CSI0_DAT5__ECSPI1_MOSI			1099</div><div class='add'>+MX6Q_PAD_CSI0_DAT5__KPP_ROW_5			1100</div><div class='add'>+MX6Q_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD		1101</div><div class='add'>+MX6Q_PAD_CSI0_DAT5__GPIO_5_23			1102</div><div class='add'>+MX6Q_PAD_CSI0_DAT5__MMDC_MMDC_DEBUG_44		1103</div><div class='add'>+MX6Q_PAD_CSI0_DAT5__CHEETAH_TRACE_2		1104</div><div class='add'>+MX6Q_PAD_CSI0_DAT6__IPU1_CSI0_D_6		1105</div><div class='add'>+MX6Q_PAD_CSI0_DAT6__WEIM_WEIM_D_4		1106</div><div class='add'>+MX6Q_PAD_CSI0_DAT6__ECSPI1_MISO			1107</div><div class='add'>+MX6Q_PAD_CSI0_DAT6__KPP_COL_6			1108</div><div class='add'>+MX6Q_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS		1109</div><div class='add'>+MX6Q_PAD_CSI0_DAT6__GPIO_5_24			1110</div><div class='add'>+MX6Q_PAD_CSI0_DAT6__MMDC_MMDC_DEBUG_45		1111</div><div class='add'>+MX6Q_PAD_CSI0_DAT6__CHEETAH_TRACE_3		1112</div><div class='add'>+MX6Q_PAD_CSI0_DAT7__IPU1_CSI0_D_7		1113</div><div class='add'>+MX6Q_PAD_CSI0_DAT7__WEIM_WEIM_D_5		1114</div><div class='add'>+MX6Q_PAD_CSI0_DAT7__ECSPI1_SS0			1115</div><div class='add'>+MX6Q_PAD_CSI0_DAT7__KPP_ROW_6			1116</div><div class='add'>+MX6Q_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD		1117</div><div class='add'>+MX6Q_PAD_CSI0_DAT7__GPIO_5_25			1118</div><div class='add'>+MX6Q_PAD_CSI0_DAT7__MMDC_MMDC_DEBUG_46		1119</div><div class='add'>+MX6Q_PAD_CSI0_DAT7__CHEETAH_TRACE_4		1120</div><div class='add'>+MX6Q_PAD_CSI0_DAT8__IPU1_CSI0_D_8		1121</div><div class='add'>+MX6Q_PAD_CSI0_DAT8__WEIM_WEIM_D_6		1122</div><div class='add'>+MX6Q_PAD_CSI0_DAT8__ECSPI2_SCLK			1123</div><div class='add'>+MX6Q_PAD_CSI0_DAT8__KPP_COL_7			1124</div><div class='add'>+MX6Q_PAD_CSI0_DAT8__I2C1_SDA			1125</div><div class='add'>+MX6Q_PAD_CSI0_DAT8__GPIO_5_26			1126</div><div class='add'>+MX6Q_PAD_CSI0_DAT8__MMDC_MMDC_DEBUG_47		1127</div><div class='add'>+MX6Q_PAD_CSI0_DAT8__CHEETAH_TRACE_5		1128</div><div class='add'>+MX6Q_PAD_CSI0_DAT9__IPU1_CSI0_D_9		1129</div><div class='add'>+MX6Q_PAD_CSI0_DAT9__WEIM_WEIM_D_7		1130</div><div class='add'>+MX6Q_PAD_CSI0_DAT9__ECSPI2_MOSI			1131</div><div class='add'>+MX6Q_PAD_CSI0_DAT9__KPP_ROW_7			1132</div><div class='add'>+MX6Q_PAD_CSI0_DAT9__I2C1_SCL			1133</div><div class='add'>+MX6Q_PAD_CSI0_DAT9__GPIO_5_27			1134</div><div class='add'>+MX6Q_PAD_CSI0_DAT9__MMDC_MMDC_DEBUG_48		1135</div><div class='add'>+MX6Q_PAD_CSI0_DAT9__CHEETAH_TRACE_6		1136</div><div class='add'>+MX6Q_PAD_CSI0_DAT10__IPU1_CSI0_D_10		1137</div><div class='add'>+MX6Q_PAD_CSI0_DAT10__AUDMUX_AUD3_RXC		1138</div><div class='add'>+MX6Q_PAD_CSI0_DAT10__ECSPI2_MISO		1139</div><div class='add'>+MX6Q_PAD_CSI0_DAT10__UART1_TXD			1140</div><div class='add'>+MX6Q_PAD_CSI0_DAT10__SDMA_DEBUG_PC_4		1141</div><div class='add'>+MX6Q_PAD_CSI0_DAT10__GPIO_5_28			1142</div><div class='add'>+MX6Q_PAD_CSI0_DAT10__MMDC_MMDC_DEBUG_33		1143</div><div class='add'>+MX6Q_PAD_CSI0_DAT10__CHEETAH_TRACE_7		1144</div><div class='add'>+MX6Q_PAD_CSI0_DAT11__IPU1_CSI0_D_11		1145</div><div class='add'>+MX6Q_PAD_CSI0_DAT11__AUDMUX_AUD3_RXFS		1146</div><div class='add'>+MX6Q_PAD_CSI0_DAT11__ECSPI2_SS0			1147</div><div class='add'>+MX6Q_PAD_CSI0_DAT11__UART1_RXD			1148</div><div class='add'>+MX6Q_PAD_CSI0_DAT11__SDMA_DEBUG_PC_5		1149</div><div class='add'>+MX6Q_PAD_CSI0_DAT11__GPIO_5_29			1150</div><div class='add'>+MX6Q_PAD_CSI0_DAT11__MMDC_MMDC_DEBUG_34		1151</div><div class='add'>+MX6Q_PAD_CSI0_DAT11__CHEETAH_TRACE_8		1152</div><div class='add'>+MX6Q_PAD_CSI0_DAT12__IPU1_CSI0_D_12		1153</div><div class='add'>+MX6Q_PAD_CSI0_DAT12__WEIM_WEIM_D_8		1154</div><div class='add'>+MX6Q_PAD_CSI0_DAT12__PCIE_CTRL_MUX_16		1155</div><div class='add'>+MX6Q_PAD_CSI0_DAT12__UART4_TXD			1156</div><div class='add'>+MX6Q_PAD_CSI0_DAT12__SDMA_DEBUG_PC_6		1157</div><div class='add'>+MX6Q_PAD_CSI0_DAT12__GPIO_5_30			1158</div><div class='add'>+MX6Q_PAD_CSI0_DAT12__MMDC_MMDC_DEBUG_35		1159</div><div class='add'>+MX6Q_PAD_CSI0_DAT12__CHEETAH_TRACE_9		1160</div><div class='add'>+MX6Q_PAD_CSI0_DAT13__IPU1_CSI0_D_13		1161</div><div class='add'>+MX6Q_PAD_CSI0_DAT13__WEIM_WEIM_D_9		1162</div><div class='add'>+MX6Q_PAD_CSI0_DAT13__PCIE_CTRL_MUX_17		1163</div><div class='add'>+MX6Q_PAD_CSI0_DAT13__UART4_RXD			1164</div><div class='add'>+MX6Q_PAD_CSI0_DAT13__SDMA_DEBUG_PC_7		1165</div><div class='add'>+MX6Q_PAD_CSI0_DAT13__GPIO_5_31			1166</div><div class='add'>+MX6Q_PAD_CSI0_DAT13__MMDC_MMDC_DEBUG_36		1167</div><div class='add'>+MX6Q_PAD_CSI0_DAT13__CHEETAH_TRACE_10		1168</div><div class='add'>+MX6Q_PAD_CSI0_DAT14__IPU1_CSI0_D_14		1169</div><div class='add'>+MX6Q_PAD_CSI0_DAT14__WEIM_WEIM_D_10		1170</div><div class='add'>+MX6Q_PAD_CSI0_DAT14__PCIE_CTRL_MUX_18		1171</div><div class='add'>+MX6Q_PAD_CSI0_DAT14__UART5_TXD			1172</div><div class='add'>+MX6Q_PAD_CSI0_DAT14__SDMA_DEBUG_PC_8		1173</div><div class='add'>+MX6Q_PAD_CSI0_DAT14__GPIO_6_0			1174</div><div class='add'>+MX6Q_PAD_CSI0_DAT14__MMDC_MMDC_DEBUG_37		1175</div><div class='add'>+MX6Q_PAD_CSI0_DAT14__CHEETAH_TRACE_11		1176</div><div class='add'>+MX6Q_PAD_CSI0_DAT15__IPU1_CSI0_D_15		1177</div><div class='add'>+MX6Q_PAD_CSI0_DAT15__WEIM_WEIM_D_11		1178</div><div class='add'>+MX6Q_PAD_CSI0_DAT15__PCIE_CTRL_MUX_19		1179</div><div class='add'>+MX6Q_PAD_CSI0_DAT15__UART5_RXD			1180</div><div class='add'>+MX6Q_PAD_CSI0_DAT15__SDMA_DEBUG_PC_9		1181</div><div class='add'>+MX6Q_PAD_CSI0_DAT15__GPIO_6_1			1182</div><div class='add'>+MX6Q_PAD_CSI0_DAT15__MMDC_MMDC_DEBUG_38		1183</div><div class='add'>+MX6Q_PAD_CSI0_DAT15__CHEETAH_TRACE_12		1184</div><div class='add'>+MX6Q_PAD_CSI0_DAT16__IPU1_CSI0_D_16		1185</div><div class='add'>+MX6Q_PAD_CSI0_DAT16__WEIM_WEIM_D_12		1186</div><div class='add'>+MX6Q_PAD_CSI0_DAT16__PCIE_CTRL_MUX_20		1187</div><div class='add'>+MX6Q_PAD_CSI0_DAT16__UART4_RTS			1188</div><div class='add'>+MX6Q_PAD_CSI0_DAT16__SDMA_DEBUG_PC_10		1189</div><div class='add'>+MX6Q_PAD_CSI0_DAT16__GPIO_6_2			1190</div><div class='add'>+MX6Q_PAD_CSI0_DAT16__MMDC_MMDC_DEBUG_39		1191</div><div class='add'>+MX6Q_PAD_CSI0_DAT16__CHEETAH_TRACE_13		1192</div><div class='add'>+MX6Q_PAD_CSI0_DAT17__IPU1_CSI0_D_17		1193</div><div class='add'>+MX6Q_PAD_CSI0_DAT17__WEIM_WEIM_D_13		1194</div><div class='add'>+MX6Q_PAD_CSI0_DAT17__PCIE_CTRL_MUX_21		1195</div><div class='add'>+MX6Q_PAD_CSI0_DAT17__UART4_CTS			1196</div><div class='add'>+MX6Q_PAD_CSI0_DAT17__SDMA_DEBUG_PC_11		1197</div><div class='add'>+MX6Q_PAD_CSI0_DAT17__GPIO_6_3			1198</div><div class='add'>+MX6Q_PAD_CSI0_DAT17__MMDC_MMDC_DEBUG_40		1199</div><div class='add'>+MX6Q_PAD_CSI0_DAT17__CHEETAH_TRACE_14		1200</div><div class='add'>+MX6Q_PAD_CSI0_DAT18__IPU1_CSI0_D_18		1201</div><div class='add'>+MX6Q_PAD_CSI0_DAT18__WEIM_WEIM_D_14		1202</div><div class='add'>+MX6Q_PAD_CSI0_DAT18__PCIE_CTRL_MUX_22		1203</div><div class='add'>+MX6Q_PAD_CSI0_DAT18__UART5_RTS			1204</div><div class='add'>+MX6Q_PAD_CSI0_DAT18__SDMA_DEBUG_PC_12		1205</div><div class='add'>+MX6Q_PAD_CSI0_DAT18__GPIO_6_4			1206</div><div class='add'>+MX6Q_PAD_CSI0_DAT18__MMDC_MMDC_DEBUG_41		1207</div><div class='add'>+MX6Q_PAD_CSI0_DAT18__CHEETAH_TRACE_15		1208</div><div class='add'>+MX6Q_PAD_CSI0_DAT19__IPU1_CSI0_D_19		1209</div><div class='add'>+MX6Q_PAD_CSI0_DAT19__WEIM_WEIM_D_15		1210</div><div class='add'>+MX6Q_PAD_CSI0_DAT19__PCIE_CTRL_MUX_23		1211</div><div class='add'>+MX6Q_PAD_CSI0_DAT19__UART5_CTS			1212</div><div class='add'>+MX6Q_PAD_CSI0_DAT19__SDMA_DEBUG_PC_13		1213</div><div class='add'>+MX6Q_PAD_CSI0_DAT19__GPIO_6_5			1214</div><div class='add'>+MX6Q_PAD_CSI0_DAT19__MMDC_MMDC_DEBUG_42		1215</div><div class='add'>+MX6Q_PAD_CSI0_DAT19__ANATOP_TESTO_9		1216</div><div class='add'>+MX6Q_PAD_JTAG_TMS__SJC_TMS			1217</div><div class='add'>+MX6Q_PAD_JTAG_MOD__SJC_MOD			1218</div><div class='add'>+MX6Q_PAD_JTAG_TRSTB__SJC_TRSTB			1219</div><div class='add'>+MX6Q_PAD_JTAG_TDI__SJC_TDI			1220</div><div class='add'>+MX6Q_PAD_JTAG_TCK__SJC_TCK			1221</div><div class='add'>+MX6Q_PAD_JTAG_TDO__SJC_TDO			1222</div><div class='add'>+MX6Q_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3		1223</div><div class='add'>+MX6Q_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2		1224</div><div class='add'>+MX6Q_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK		1225</div><div class='add'>+MX6Q_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1		1226</div><div class='add'>+MX6Q_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0		1227</div><div class='add'>+MX6Q_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3		1228</div><div class='add'>+MX6Q_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK		1229</div><div class='add'>+MX6Q_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2		1230</div><div class='add'>+MX6Q_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1		1231</div><div class='add'>+MX6Q_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0		1232</div><div class='add'>+MX6Q_PAD_TAMPER__SNVS_LP_WRAP_SNVS_TD1		1233</div><div class='add'>+MX6Q_PAD_PMIC_ON_REQ__SNVS_LPWRAP_WKALM		1234</div><div class='add'>+MX6Q_PAD_PMIC_STBY_REQ__CCM_PMIC_STBYRQ		1235</div><div class='add'>+MX6Q_PAD_POR_B__SRC_POR_B			1236</div><div class='add'>+MX6Q_PAD_BOOT_MODE1__SRC_BOOT_MODE_1		1237</div><div class='add'>+MX6Q_PAD_RESET_IN_B__SRC_RESET_B		1238</div><div class='add'>+MX6Q_PAD_BOOT_MODE0__SRC_BOOT_MODE_0		1239</div><div class='add'>+MX6Q_PAD_TEST_MODE__TCU_TEST_MODE		1240</div><div class='add'>+MX6Q_PAD_SD3_DAT7__USDHC3_DAT7			1241</div><div class='add'>+MX6Q_PAD_SD3_DAT7__UART1_TXD			1242</div><div class='add'>+MX6Q_PAD_SD3_DAT7__PCIE_CTRL_MUX_24		1243</div><div class='add'>+MX6Q_PAD_SD3_DAT7__USBOH3_UH3_DFD_OUT_0		1244</div><div class='add'>+MX6Q_PAD_SD3_DAT7__USBOH3_UH2_DFD_OUT_0		1245</div><div class='add'>+MX6Q_PAD_SD3_DAT7__GPIO_6_17			1246</div><div class='add'>+MX6Q_PAD_SD3_DAT7__MIPI_CORE_DPHY_IN_12		1247</div><div class='add'>+MX6Q_PAD_SD3_DAT7__USBPHY2_CLK20DIV		1248</div><div class='add'>+MX6Q_PAD_SD3_DAT6__USDHC3_DAT6			1249</div><div class='add'>+MX6Q_PAD_SD3_DAT6__UART1_RXD			1250</div><div class='add'>+MX6Q_PAD_SD3_DAT6__PCIE_CTRL_MUX_25		1251</div><div class='add'>+MX6Q_PAD_SD3_DAT6__USBOH3_UH3_DFD_OUT_1		1252</div><div class='add'>+MX6Q_PAD_SD3_DAT6__USBOH3_UH2_DFD_OUT_1		1253</div><div class='add'>+MX6Q_PAD_SD3_DAT6__GPIO_6_18			1254</div><div class='add'>+MX6Q_PAD_SD3_DAT6__MIPI_CORE_DPHY_IN_13		1255</div><div class='add'>+MX6Q_PAD_SD3_DAT6__ANATOP_TESTO_10		1256</div><div class='add'>+MX6Q_PAD_SD3_DAT5__USDHC3_DAT5			1257</div><div class='add'>+MX6Q_PAD_SD3_DAT5__UART2_TXD			1258</div><div class='add'>+MX6Q_PAD_SD3_DAT5__PCIE_CTRL_MUX_26		1259</div><div class='add'>+MX6Q_PAD_SD3_DAT5__USBOH3_UH3_DFD_OUT_2		1260</div><div class='add'>+MX6Q_PAD_SD3_DAT5__USBOH3_UH2_DFD_OUT_2		1261</div><div class='add'>+MX6Q_PAD_SD3_DAT5__GPIO_7_0			1262</div><div class='add'>+MX6Q_PAD_SD3_DAT5__MIPI_CORE_DPHY_IN_14		1263</div><div class='add'>+MX6Q_PAD_SD3_DAT5__ANATOP_TESTO_11		1264</div><div class='add'>+MX6Q_PAD_SD3_DAT4__USDHC3_DAT4			1265</div><div class='add'>+MX6Q_PAD_SD3_DAT4__UART2_RXD			1266</div><div class='add'>+MX6Q_PAD_SD3_DAT4__PCIE_CTRL_MUX_27		1267</div><div class='add'>+MX6Q_PAD_SD3_DAT4__USBOH3_UH3_DFD_OUT_3		1268</div><div class='add'>+MX6Q_PAD_SD3_DAT4__USBOH3_UH2_DFD_OUT_3		1269</div><div class='add'>+MX6Q_PAD_SD3_DAT4__GPIO_7_1			1270</div><div class='add'>+MX6Q_PAD_SD3_DAT4__MIPI_CORE_DPHY_IN_15		1271</div><div class='add'>+MX6Q_PAD_SD3_DAT4__ANATOP_TESTO_12		1272</div><div class='add'>+MX6Q_PAD_SD3_CMD__USDHC3_CMD			1273</div><div class='add'>+MX6Q_PAD_SD3_CMD__UART2_CTS			1274</div><div class='add'>+MX6Q_PAD_SD3_CMD__CAN1_TXCAN			1275</div><div class='add'>+MX6Q_PAD_SD3_CMD__USBOH3_UH3_DFD_OUT_4		1276</div><div class='add'>+MX6Q_PAD_SD3_CMD__USBOH3_UH2_DFD_OUT_4		1277</div><div class='add'>+MX6Q_PAD_SD3_CMD__GPIO_7_2			1278</div><div class='add'>+MX6Q_PAD_SD3_CMD__MIPI_CORE_DPHY_IN_16		1279</div><div class='add'>+MX6Q_PAD_SD3_CMD__ANATOP_TESTO_13		1280</div><div class='add'>+MX6Q_PAD_SD3_CLK__USDHC3_CLK			1281</div><div class='add'>+MX6Q_PAD_SD3_CLK__UART2_RTS			1282</div><div class='add'>+MX6Q_PAD_SD3_CLK__CAN1_RXCAN			1283</div><div class='add'>+MX6Q_PAD_SD3_CLK__USBOH3_UH3_DFD_OUT_5		1284</div><div class='add'>+MX6Q_PAD_SD3_CLK__USBOH3_UH2_DFD_OUT_5		1285</div><div class='add'>+MX6Q_PAD_SD3_CLK__GPIO_7_3			1286</div><div class='add'>+MX6Q_PAD_SD3_CLK__MIPI_CORE_DPHY_IN_17		1287</div><div class='add'>+MX6Q_PAD_SD3_CLK__ANATOP_TESTO_14		1288</div><div class='add'>+MX6Q_PAD_SD3_DAT0__USDHC3_DAT0			1289</div><div class='add'>+MX6Q_PAD_SD3_DAT0__UART1_CTS			1290</div><div class='add'>+MX6Q_PAD_SD3_DAT0__CAN2_TXCAN			1291</div><div class='add'>+MX6Q_PAD_SD3_DAT0__USBOH3_UH3_DFD_OUT_6		1292</div><div class='add'>+MX6Q_PAD_SD3_DAT0__USBOH3_UH2_DFD_OUT_6		1293</div><div class='add'>+MX6Q_PAD_SD3_DAT0__GPIO_7_4			1294</div><div class='add'>+MX6Q_PAD_SD3_DAT0__MIPI_CORE_DPHY_IN_18		1295</div><div class='add'>+MX6Q_PAD_SD3_DAT0__ANATOP_TESTO_15		1296</div><div class='add'>+MX6Q_PAD_SD3_DAT1__USDHC3_DAT1			1297</div><div class='add'>+MX6Q_PAD_SD3_DAT1__UART1_RTS			1298</div><div class='add'>+MX6Q_PAD_SD3_DAT1__CAN2_RXCAN			1299</div><div class='add'>+MX6Q_PAD_SD3_DAT1__USBOH3_UH3_DFD_OUT_7		1300</div><div class='add'>+MX6Q_PAD_SD3_DAT1__USBOH3_UH2_DFD_OUT_7		1301</div><div class='add'>+MX6Q_PAD_SD3_DAT1__GPIO_7_5			1302</div><div class='add'>+MX6Q_PAD_SD3_DAT1__MIPI_CORE_DPHY_IN_19		1303</div><div class='add'>+MX6Q_PAD_SD3_DAT1__ANATOP_TESTI_0		1304</div><div class='add'>+MX6Q_PAD_SD3_DAT2__USDHC3_DAT2			1305</div><div class='add'>+MX6Q_PAD_SD3_DAT2__PCIE_CTRL_MUX_28		1306</div><div class='add'>+MX6Q_PAD_SD3_DAT2__USBOH3_UH3_DFD_OUT_8		1307</div><div class='add'>+MX6Q_PAD_SD3_DAT2__USBOH3_UH2_DFD_OUT_8		1308</div><div class='add'>+MX6Q_PAD_SD3_DAT2__GPIO_7_6			1309</div><div class='add'>+MX6Q_PAD_SD3_DAT2__MIPI_CORE_DPHY_IN_20		1310</div><div class='add'>+MX6Q_PAD_SD3_DAT2__ANATOP_TESTI_1		1311</div><div class='add'>+MX6Q_PAD_SD3_DAT3__USDHC3_DAT3			1312</div><div class='add'>+MX6Q_PAD_SD3_DAT3__UART3_CTS			1313</div><div class='add'>+MX6Q_PAD_SD3_DAT3__PCIE_CTRL_MUX_29		1314</div><div class='add'>+MX6Q_PAD_SD3_DAT3__USBOH3_UH3_DFD_OUT_9		1315</div><div class='add'>+MX6Q_PAD_SD3_DAT3__USBOH3_UH2_DFD_OUT_9		1316</div><div class='add'>+MX6Q_PAD_SD3_DAT3__GPIO_7_7			1317</div><div class='add'>+MX6Q_PAD_SD3_DAT3__MIPI_CORE_DPHY_IN_21		1318</div><div class='add'>+MX6Q_PAD_SD3_DAT3__ANATOP_TESTI_2		1319</div><div class='add'>+MX6Q_PAD_SD3_RST__USDHC3_RST			1320</div><div class='add'>+MX6Q_PAD_SD3_RST__UART3_RTS			1321</div><div class='add'>+MX6Q_PAD_SD3_RST__PCIE_CTRL_MUX_30		1322</div><div class='add'>+MX6Q_PAD_SD3_RST__USBOH3_UH3_DFD_OUT_10		1323</div><div class='add'>+MX6Q_PAD_SD3_RST__USBOH3_UH2_DFD_OUT_10		1324</div><div class='add'>+MX6Q_PAD_SD3_RST__GPIO_7_8			1325</div><div class='add'>+MX6Q_PAD_SD3_RST__MIPI_CORE_DPHY_IN_22		1326</div><div class='add'>+MX6Q_PAD_SD3_RST__ANATOP_ANATOP_TESTI_3		1327</div><div class='add'>+MX6Q_PAD_NANDF_CLE__RAWNAND_CLE			1328</div><div class='add'>+MX6Q_PAD_NANDF_CLE__IPU2_SISG_4			1329</div><div class='add'>+MX6Q_PAD_NANDF_CLE__PCIE_CTRL_MUX_31		1330</div><div class='add'>+MX6Q_PAD_NANDF_CLE__USBOH3_UH3_DFD_OT11		1331</div><div class='add'>+MX6Q_PAD_NANDF_CLE__USBOH3_UH2_DFD_OT11		1332</div><div class='add'>+MX6Q_PAD_NANDF_CLE__GPIO_6_7			1333</div><div class='add'>+MX6Q_PAD_NANDF_CLE__MIPI_CORE_DPHY_IN23		1334</div><div class='add'>+MX6Q_PAD_NANDF_CLE__TPSMP_HTRANS_0		1335</div><div class='add'>+MX6Q_PAD_NANDF_ALE__RAWNAND_ALE			1336</div><div class='add'>+MX6Q_PAD_NANDF_ALE__USDHC4_RST			1337</div><div class='add'>+MX6Q_PAD_NANDF_ALE__PCIE_CTRL_MUX_0		1338</div><div class='add'>+MX6Q_PAD_NANDF_ALE__USBOH3_UH3_DFD_OT12		1339</div><div class='add'>+MX6Q_PAD_NANDF_ALE__USBOH3_UH2_DFD_OT12		1340</div><div class='add'>+MX6Q_PAD_NANDF_ALE__GPIO_6_8			1341</div><div class='add'>+MX6Q_PAD_NANDF_ALE__MIPI_CR_DPHY_IN_24		1342</div><div class='add'>+MX6Q_PAD_NANDF_ALE__TPSMP_HTRANS_1		1343</div><div class='add'>+MX6Q_PAD_NANDF_WP_B__RAWNAND_RESETN		1344</div><div class='add'>+MX6Q_PAD_NANDF_WP_B__IPU2_SISG_5		1345</div><div class='add'>+MX6Q_PAD_NANDF_WP_B__PCIE_CTRL__MUX_1		1346</div><div class='add'>+MX6Q_PAD_NANDF_WP_B__USBOH3_UH3_DFDOT13		1347</div><div class='add'>+MX6Q_PAD_NANDF_WP_B__USBOH3_UH2_DFDOT13		1348</div><div class='add'>+MX6Q_PAD_NANDF_WP_B__GPIO_6_9			1349</div><div class='add'>+MX6Q_PAD_NANDF_WP_B__MIPI_CR_DPHY_OUT32		1350</div><div class='add'>+MX6Q_PAD_NANDF_WP_B__PL301_PER1_HSIZE_0		1351</div><div class='add'>+MX6Q_PAD_NANDF_RB0__RAWNAND_READY0		1352</div><div class='add'>+MX6Q_PAD_NANDF_RB0__IPU2_DI0_PIN1		1353</div><div class='add'>+MX6Q_PAD_NANDF_RB0__PCIE_CTRL_MUX_2		1354</div><div class='add'>+MX6Q_PAD_NANDF_RB0__USBOH3_UH3_DFD_OT14		1355</div><div class='add'>+MX6Q_PAD_NANDF_RB0__USBOH3_UH2_DFD_OT14		1356</div><div class='add'>+MX6Q_PAD_NANDF_RB0__GPIO_6_10			1357</div><div class='add'>+MX6Q_PAD_NANDF_RB0__MIPI_CR_DPHY_OUT_33		1358</div><div class='add'>+MX6Q_PAD_NANDF_RB0__PL301_PER1_HSIZE_1		1359</div><div class='add'>+MX6Q_PAD_NANDF_CS0__RAWNAND_CE0N		1360</div><div class='add'>+MX6Q_PAD_NANDF_CS0__USBOH3_UH3_DFD_OT15		1361</div><div class='add'>+MX6Q_PAD_NANDF_CS0__USBOH3_UH2_DFD_OT15		1362</div><div class='add'>+MX6Q_PAD_NANDF_CS0__GPIO_6_11			1363</div><div class='add'>+MX6Q_PAD_NANDF_CS0__PL301_PER1_HSIZE_2		1364</div><div class='add'>+MX6Q_PAD_NANDF_CS1__RAWNAND_CE1N		1365</div><div class='add'>+MX6Q_PAD_NANDF_CS1__USDHC4_VSELECT		1366</div><div class='add'>+MX6Q_PAD_NANDF_CS1__USDHC3_VSELECT		1367</div><div class='add'>+MX6Q_PAD_NANDF_CS1__PCIE_CTRL_MUX_3		1368</div><div class='add'>+MX6Q_PAD_NANDF_CS1__GPIO_6_14			1369</div><div class='add'>+MX6Q_PAD_NANDF_CS1__PL301_PER1_HRDYOUT		1370</div><div class='add'>+MX6Q_PAD_NANDF_CS2__RAWNAND_CE2N		1371</div><div class='add'>+MX6Q_PAD_NANDF_CS2__IPU1_SISG_0			1372</div><div class='add'>+MX6Q_PAD_NANDF_CS2__ESAI1_TX0			1373</div><div class='add'>+MX6Q_PAD_NANDF_CS2__WEIM_WEIM_CRE		1374</div><div class='add'>+MX6Q_PAD_NANDF_CS2__CCM_CLKO2			1375</div><div class='add'>+MX6Q_PAD_NANDF_CS2__GPIO_6_15			1376</div><div class='add'>+MX6Q_PAD_NANDF_CS2__IPU2_SISG_0			1377</div><div class='add'>+MX6Q_PAD_NANDF_CS3__RAWNAND_CE3N		1378</div><div class='add'>+MX6Q_PAD_NANDF_CS3__IPU1_SISG_1			1379</div><div class='add'>+MX6Q_PAD_NANDF_CS3__ESAI1_TX1			1380</div><div class='add'>+MX6Q_PAD_NANDF_CS3__WEIM_WEIM_A_26		1381</div><div class='add'>+MX6Q_PAD_NANDF_CS3__PCIE_CTRL_MUX_4		1382</div><div class='add'>+MX6Q_PAD_NANDF_CS3__GPIO_6_16			1383</div><div class='add'>+MX6Q_PAD_NANDF_CS3__IPU2_SISG_1			1384</div><div class='add'>+MX6Q_PAD_NANDF_CS3__TPSMP_CLK			1385</div><div class='add'>+MX6Q_PAD_SD4_CMD__USDHC4_CMD			1386</div><div class='add'>+MX6Q_PAD_SD4_CMD__RAWNAND_RDN			1387</div><div class='add'>+MX6Q_PAD_SD4_CMD__UART3_TXD			1388</div><div class='add'>+MX6Q_PAD_SD4_CMD__PCIE_CTRL_MUX_5		1389</div><div class='add'>+MX6Q_PAD_SD4_CMD__GPIO_7_9			1390</div><div class='add'>+MX6Q_PAD_SD4_CMD__TPSMP_HDATA_DIR		1391</div><div class='add'>+MX6Q_PAD_SD4_CLK__USDHC4_CLK			1392</div><div class='add'>+MX6Q_PAD_SD4_CLK__RAWNAND_WRN			1393</div><div class='add'>+MX6Q_PAD_SD4_CLK__UART3_RXD			1394</div><div class='add'>+MX6Q_PAD_SD4_CLK__PCIE_CTRL_MUX_6		1395</div><div class='add'>+MX6Q_PAD_SD4_CLK__GPIO_7_10			1396</div><div class='add'>+MX6Q_PAD_NANDF_D0__RAWNAND_D0			1397</div><div class='add'>+MX6Q_PAD_NANDF_D0__USDHC1_DAT4			1398</div><div class='add'>+MX6Q_PAD_NANDF_D0__GPU3D_GPU_DBG_OUT_0		1399</div><div class='add'>+MX6Q_PAD_NANDF_D0__USBOH3_UH2_DFD_OUT16		1400</div><div class='add'>+MX6Q_PAD_NANDF_D0__USBOH3_UH3_DFD_OUT16		1401</div><div class='add'>+MX6Q_PAD_NANDF_D0__GPIO_2_0			1402</div><div class='add'>+MX6Q_PAD_NANDF_D0__IPU1_IPU_DIAG_BUS_0		1403</div><div class='add'>+MX6Q_PAD_NANDF_D0__IPU2_IPU_DIAG_BUS_0		1404</div><div class='add'>+MX6Q_PAD_NANDF_D1__RAWNAND_D1			1405</div><div class='add'>+MX6Q_PAD_NANDF_D1__USDHC1_DAT5			1406</div><div class='add'>+MX6Q_PAD_NANDF_D1__GPU3D_GPU_DEBUG_OUT1		1407</div><div class='add'>+MX6Q_PAD_NANDF_D1__USBOH3_UH2_DFD_OUT17		1408</div><div class='add'>+MX6Q_PAD_NANDF_D1__USBOH3_UH3_DFD_OUT17		1409</div><div class='add'>+MX6Q_PAD_NANDF_D1__GPIO_2_1			1410</div><div class='add'>+MX6Q_PAD_NANDF_D1__IPU1_IPU_DIAG_BUS_1		1411</div><div class='add'>+MX6Q_PAD_NANDF_D1__IPU2_IPU_DIAG_BUS_1		1412</div><div class='add'>+MX6Q_PAD_NANDF_D2__RAWNAND_D2			1413</div><div class='add'>+MX6Q_PAD_NANDF_D2__USDHC1_DAT6			1414</div><div class='add'>+MX6Q_PAD_NANDF_D2__GPU3D_GPU_DBG_OUT_2		1415</div><div class='add'>+MX6Q_PAD_NANDF_D2__USBOH3_UH2_DFD_OUT18		1416</div><div class='add'>+MX6Q_PAD_NANDF_D2__USBOH3_UH3_DFD_OUT18		1417</div><div class='add'>+MX6Q_PAD_NANDF_D2__GPIO_2_2			1418</div><div class='add'>+MX6Q_PAD_NANDF_D2__IPU1_IPU_DIAG_BUS_2		1419</div><div class='add'>+MX6Q_PAD_NANDF_D2__IPU2_IPU_DIAG_BUS_2		1420</div><div class='add'>+MX6Q_PAD_NANDF_D3__RAWNAND_D3			1421</div><div class='add'>+MX6Q_PAD_NANDF_D3__USDHC1_DAT7			1422</div><div class='add'>+MX6Q_PAD_NANDF_D3__GPU3D_GPU_DBG_OUT_3		1423</div><div class='add'>+MX6Q_PAD_NANDF_D3__USBOH3_UH2_DFD_OUT19		1424</div><div class='add'>+MX6Q_PAD_NANDF_D3__USBOH3_UH3_DFD_OUT19		1425</div><div class='add'>+MX6Q_PAD_NANDF_D3__GPIO_2_3			1426</div><div class='add'>+MX6Q_PAD_NANDF_D3__IPU1_IPU_DIAG_BUS_3		1427</div><div class='add'>+MX6Q_PAD_NANDF_D3__IPU2_IPU_DIAG_BUS_3		1428</div><div class='add'>+MX6Q_PAD_NANDF_D4__RAWNAND_D4			1429</div><div class='add'>+MX6Q_PAD_NANDF_D4__USDHC2_DAT4			1430</div><div class='add'>+MX6Q_PAD_NANDF_D4__GPU3D_GPU_DBG_OUT_4		1431</div><div class='add'>+MX6Q_PAD_NANDF_D4__USBOH3_UH2_DFD_OUT20		1432</div><div class='add'>+MX6Q_PAD_NANDF_D4__USBOH3_UH3_DFD_OUT20		1433</div><div class='add'>+MX6Q_PAD_NANDF_D4__GPIO_2_4			1434</div><div class='add'>+MX6Q_PAD_NANDF_D4__IPU1_IPU_DIAG_BUS_4		1435</div><div class='add'>+MX6Q_PAD_NANDF_D4__IPU2_IPU_DIAG_BUS_4		1436</div><div class='add'>+MX6Q_PAD_NANDF_D5__RAWNAND_D5			1437</div><div class='add'>+MX6Q_PAD_NANDF_D5__USDHC2_DAT5			1438</div><div class='add'>+MX6Q_PAD_NANDF_D5__GPU3D_GPU_DBG_OUT_5		1439</div><div class='add'>+MX6Q_PAD_NANDF_D5__USBOH3_UH2_DFD_OUT21		1440</div><div class='add'>+MX6Q_PAD_NANDF_D5__USBOH3_UH3_DFD_OUT21		1441</div><div class='add'>+MX6Q_PAD_NANDF_D5__GPIO_2_5			1442</div><div class='add'>+MX6Q_PAD_NANDF_D5__IPU1_IPU_DIAG_BUS_5		1443</div><div class='add'>+MX6Q_PAD_NANDF_D5__IPU2_IPU_DIAG_BUS_5		1444</div><div class='add'>+MX6Q_PAD_NANDF_D6__RAWNAND_D6			1445</div><div class='add'>+MX6Q_PAD_NANDF_D6__USDHC2_DAT6			1446</div><div class='add'>+MX6Q_PAD_NANDF_D6__GPU3D_GPU_DBG_OUT_6		1447</div><div class='add'>+MX6Q_PAD_NANDF_D6__USBOH3_UH2_DFD_OUT22		1448</div><div class='add'>+MX6Q_PAD_NANDF_D6__USBOH3_UH3_DFD_OUT22		1449</div><div class='add'>+MX6Q_PAD_NANDF_D6__GPIO_2_6			1450</div><div class='add'>+MX6Q_PAD_NANDF_D6__IPU1_IPU_DIAG_BUS_6		1451</div><div class='add'>+MX6Q_PAD_NANDF_D6__IPU2_IPU_DIAG_BUS_6		1452</div><div class='add'>+MX6Q_PAD_NANDF_D7__RAWNAND_D7			1453</div><div class='add'>+MX6Q_PAD_NANDF_D7__USDHC2_DAT7			1454</div><div class='add'>+MX6Q_PAD_NANDF_D7__GPU3D_GPU_DBG_OUT_7		1455</div><div class='add'>+MX6Q_PAD_NANDF_D7__USBOH3_UH2_DFD_OUT23		1456</div><div class='add'>+MX6Q_PAD_NANDF_D7__USBOH3_UH3_DFD_OUT23		1457</div><div class='add'>+MX6Q_PAD_NANDF_D7__GPIO_2_7			1458</div><div class='add'>+MX6Q_PAD_NANDF_D7__IPU1_IPU_DIAG_BUS_7		1459</div><div class='add'>+MX6Q_PAD_NANDF_D7__IPU2_IPU_DIAG_BUS_7		1460</div><div class='add'>+MX6Q_PAD_SD4_DAT0__RAWNAND_D8			1461</div><div class='add'>+MX6Q_PAD_SD4_DAT0__USDHC4_DAT0			1462</div><div class='add'>+MX6Q_PAD_SD4_DAT0__RAWNAND_DQS			1463</div><div class='add'>+MX6Q_PAD_SD4_DAT0__USBOH3_UH2_DFD_OUT24		1464</div><div class='add'>+MX6Q_PAD_SD4_DAT0__USBOH3_UH3_DFD_OUT24		1465</div><div class='add'>+MX6Q_PAD_SD4_DAT0__GPIO_2_8			1466</div><div class='add'>+MX6Q_PAD_SD4_DAT0__IPU1_IPU_DIAG_BUS_8		1467</div><div class='add'>+MX6Q_PAD_SD4_DAT0__IPU2_IPU_DIAG_BUS_8		1468</div><div class='add'>+MX6Q_PAD_SD4_DAT1__RAWNAND_D9			1469</div><div class='add'>+MX6Q_PAD_SD4_DAT1__USDHC4_DAT1			1470</div><div class='add'>+MX6Q_PAD_SD4_DAT1__PWM3_PWMO			1471</div><div class='add'>+MX6Q_PAD_SD4_DAT1__USBOH3_UH2_DFD_OUT25		1472</div><div class='add'>+MX6Q_PAD_SD4_DAT1__USBOH3_UH3_DFD_OUT25		1473</div><div class='add'>+MX6Q_PAD_SD4_DAT1__GPIO_2_9			1474</div><div class='add'>+MX6Q_PAD_SD4_DAT1__IPU1_IPU_DIAG_BUS_9		1475</div><div class='add'>+MX6Q_PAD_SD4_DAT1__IPU2_IPU_DIAG_BUS_9		1476</div><div class='add'>+MX6Q_PAD_SD4_DAT2__RAWNAND_D10			1477</div><div class='add'>+MX6Q_PAD_SD4_DAT2__USDHC4_DAT2			1478</div><div class='add'>+MX6Q_PAD_SD4_DAT2__PWM4_PWMO			1479</div><div class='add'>+MX6Q_PAD_SD4_DAT2__USBOH3_UH2_DFD_OUT26		1480</div><div class='add'>+MX6Q_PAD_SD4_DAT2__USBOH3_UH3_DFD_OUT26		1481</div><div class='add'>+MX6Q_PAD_SD4_DAT2__GPIO_2_10			1482</div><div class='add'>+MX6Q_PAD_SD4_DAT2__IPU1_IPU_DIAG_BUS_10		1483</div><div class='add'>+MX6Q_PAD_SD4_DAT2__IPU2_IPU_DIAG_BUS_10		1484</div><div class='add'>+MX6Q_PAD_SD4_DAT3__RAWNAND_D11			1485</div><div class='add'>+MX6Q_PAD_SD4_DAT3__USDHC4_DAT3			1486</div><div class='add'>+MX6Q_PAD_SD4_DAT3__USBOH3_UH2_DFD_OUT27		1487</div><div class='add'>+MX6Q_PAD_SD4_DAT3__USBOH3_UH3_DFD_OUT27		1488</div><div class='add'>+MX6Q_PAD_SD4_DAT3__GPIO_2_11			1489</div><div class='add'>+MX6Q_PAD_SD4_DAT3__IPU1_IPU_DIAG_BUS_11		1490</div><div class='add'>+MX6Q_PAD_SD4_DAT3__IPU2_IPU_DIAG_BUS_11		1491</div><div class='add'>+MX6Q_PAD_SD4_DAT4__RAWNAND_D12			1492</div><div class='add'>+MX6Q_PAD_SD4_DAT4__USDHC4_DAT4			1493</div><div class='add'>+MX6Q_PAD_SD4_DAT4__UART2_RXD			1494</div><div class='add'>+MX6Q_PAD_SD4_DAT4__USBOH3_UH2_DFD_OUT28		1495</div><div class='add'>+MX6Q_PAD_SD4_DAT4__USBOH3_UH3_DFD_OUT28		1496</div><div class='add'>+MX6Q_PAD_SD4_DAT4__GPIO_2_12			1497</div><div class='add'>+MX6Q_PAD_SD4_DAT4__IPU1_IPU_DIAG_BUS_12		1498</div><div class='add'>+MX6Q_PAD_SD4_DAT4__IPU2_IPU_DIAG_BUS_12		1499</div><div class='add'>+MX6Q_PAD_SD4_DAT5__RAWNAND_D13			1500</div><div class='add'>+MX6Q_PAD_SD4_DAT5__USDHC4_DAT5			1501</div><div class='add'>+MX6Q_PAD_SD4_DAT5__UART2_RTS			1502</div><div class='add'>+MX6Q_PAD_SD4_DAT5__USBOH3_UH2_DFD_OUT29		1503</div><div class='add'>+MX6Q_PAD_SD4_DAT5__USBOH3_UH3_DFD_OUT29		1504</div><div class='add'>+MX6Q_PAD_SD4_DAT5__GPIO_2_13			1505</div><div class='add'>+MX6Q_PAD_SD4_DAT5__IPU1_IPU_DIAG_BUS_13		1506</div><div class='add'>+MX6Q_PAD_SD4_DAT5__IPU2_IPU_DIAG_BUS_13		1507</div><div class='add'>+MX6Q_PAD_SD4_DAT6__RAWNAND_D14			1508</div><div class='add'>+MX6Q_PAD_SD4_DAT6__USDHC4_DAT6			1509</div><div class='add'>+MX6Q_PAD_SD4_DAT6__UART2_CTS			1510</div><div class='add'>+MX6Q_PAD_SD4_DAT6__USBOH3_UH2_DFD_OUT30		1511</div><div class='add'>+MX6Q_PAD_SD4_DAT6__USBOH3_UH3_DFD_OUT30		1512</div><div class='add'>+MX6Q_PAD_SD4_DAT6__GPIO_2_14			1513</div><div class='add'>+MX6Q_PAD_SD4_DAT6__IPU1_IPU_DIAG_BUS_14		1514</div><div class='add'>+MX6Q_PAD_SD4_DAT6__IPU2_IPU_DIAG_BUS_14		1515</div><div class='add'>+MX6Q_PAD_SD4_DAT7__RAWNAND_D15			1516</div><div class='add'>+MX6Q_PAD_SD4_DAT7__USDHC4_DAT7			1517</div><div class='add'>+MX6Q_PAD_SD4_DAT7__UART2_TXD			1518</div><div class='add'>+MX6Q_PAD_SD4_DAT7__USBOH3_UH2_DFD_OUT31		1519</div><div class='add'>+MX6Q_PAD_SD4_DAT7__USBOH3_UH3_DFD_OUT31		1520</div><div class='add'>+MX6Q_PAD_SD4_DAT7__GPIO_2_15			1521</div><div class='add'>+MX6Q_PAD_SD4_DAT7__IPU1_IPU_DIAG_BUS_15		1522</div><div class='add'>+MX6Q_PAD_SD4_DAT7__IPU2_IPU_DIAG_BUS_15		1523</div><div class='add'>+MX6Q_PAD_SD1_DAT1__USDHC1_DAT1			1524</div><div class='add'>+MX6Q_PAD_SD1_DAT1__ECSPI5_SS0			1525</div><div class='add'>+MX6Q_PAD_SD1_DAT1__PWM3_PWMO			1526</div><div class='add'>+MX6Q_PAD_SD1_DAT1__GPT_CAPIN2			1527</div><div class='add'>+MX6Q_PAD_SD1_DAT1__PCIE_CTRL_MUX_7		1528</div><div class='add'>+MX6Q_PAD_SD1_DAT1__GPIO_1_17			1529</div><div class='add'>+MX6Q_PAD_SD1_DAT1__HDMI_TX_OPHYDTB_0		1530</div><div class='add'>+MX6Q_PAD_SD1_DAT1__ANATOP_TESTO_8		1531</div><div class='add'>+MX6Q_PAD_SD1_DAT0__USDHC1_DAT0			1532</div><div class='add'>+MX6Q_PAD_SD1_DAT0__ECSPI5_MISO			1533</div><div class='add'>+MX6Q_PAD_SD1_DAT0__CAAM_WRAP_RNG_OSCOBS		1534</div><div class='add'>+MX6Q_PAD_SD1_DAT0__GPT_CAPIN1			1535</div><div class='add'>+MX6Q_PAD_SD1_DAT0__PCIE_CTRL_MUX_8		1536</div><div class='add'>+MX6Q_PAD_SD1_DAT0__GPIO_1_16			1537</div><div class='add'>+MX6Q_PAD_SD1_DAT0__HDMI_TX_OPHYDTB_1		1538</div><div class='add'>+MX6Q_PAD_SD1_DAT0__ANATOP_TESTO_7		1539</div><div class='add'>+MX6Q_PAD_SD1_DAT3__USDHC1_DAT3			1540</div><div class='add'>+MX6Q_PAD_SD1_DAT3__ECSPI5_SS2			1541</div><div class='add'>+MX6Q_PAD_SD1_DAT3__GPT_CMPOUT3			1542</div><div class='add'>+MX6Q_PAD_SD1_DAT3__PWM1_PWMO			1543</div><div class='add'>+MX6Q_PAD_SD1_DAT3__WDOG2_WDOG_B			1544</div><div class='add'>+MX6Q_PAD_SD1_DAT3__GPIO_1_21			1545</div><div class='add'>+MX6Q_PAD_SD1_DAT3__WDOG2_WDOG_RST_B_DEB		1546</div><div class='add'>+MX6Q_PAD_SD1_DAT3__ANATOP_TESTO_6		1547</div><div class='add'>+MX6Q_PAD_SD1_CMD__USDHC1_CMD			1548</div><div class='add'>+MX6Q_PAD_SD1_CMD__ECSPI5_MOSI			1549</div><div class='add'>+MX6Q_PAD_SD1_CMD__PWM4_PWMO			1550</div><div class='add'>+MX6Q_PAD_SD1_CMD__GPT_CMPOUT1			1551</div><div class='add'>+MX6Q_PAD_SD1_CMD__GPIO_1_18			1552</div><div class='add'>+MX6Q_PAD_SD1_CMD__ANATOP_TESTO_5		1553</div><div class='add'>+MX6Q_PAD_SD1_DAT2__USDHC1_DAT2			1554</div><div class='add'>+MX6Q_PAD_SD1_DAT2__ECSPI5_SS1			1555</div><div class='add'>+MX6Q_PAD_SD1_DAT2__GPT_CMPOUT2			1556</div><div class='add'>+MX6Q_PAD_SD1_DAT2__PWM2_PWMO			1557</div><div class='add'>+MX6Q_PAD_SD1_DAT2__WDOG1_WDOG_B			1558</div><div class='add'>+MX6Q_PAD_SD1_DAT2__GPIO_1_19			1559</div><div class='add'>+MX6Q_PAD_SD1_DAT2__WDOG1_WDOG_RST_B_DEB		1560</div><div class='add'>+MX6Q_PAD_SD1_DAT2__ANATOP_TESTO_4		1561</div><div class='add'>+MX6Q_PAD_SD1_CLK__USDHC1_CLK			1562</div><div class='add'>+MX6Q_PAD_SD1_CLK__ECSPI5_SCLK			1563</div><div class='add'>+MX6Q_PAD_SD1_CLK__OSC32K_32K_OUT		1564</div><div class='add'>+MX6Q_PAD_SD1_CLK__GPT_CLKIN			1565</div><div class='add'>+MX6Q_PAD_SD1_CLK__GPIO_1_20			1566</div><div class='add'>+MX6Q_PAD_SD1_CLK__PHY_DTB_0			1567</div><div class='add'>+MX6Q_PAD_SD1_CLK__SATA_PHY_DTB_0		1568</div><div class='add'>+MX6Q_PAD_SD2_CLK__USDHC2_CLK			1569</div><div class='add'>+MX6Q_PAD_SD2_CLK__ECSPI5_SCLK			1570</div><div class='add'>+MX6Q_PAD_SD2_CLK__KPP_COL_5			1571</div><div class='add'>+MX6Q_PAD_SD2_CLK__AUDMUX_AUD4_RXFS		1572</div><div class='add'>+MX6Q_PAD_SD2_CLK__PCIE_CTRL_MUX_9		1573</div><div class='add'>+MX6Q_PAD_SD2_CLK__GPIO_1_10			1574</div><div class='add'>+MX6Q_PAD_SD2_CLK__PHY_DTB_1			1575</div><div class='add'>+MX6Q_PAD_SD2_CLK__SATA_PHY_DTB_1		1576</div><div class='add'>+MX6Q_PAD_SD2_CMD__USDHC2_CMD			1577</div><div class='add'>+MX6Q_PAD_SD2_CMD__ECSPI5_MOSI			1578</div><div class='add'>+MX6Q_PAD_SD2_CMD__KPP_ROW_5			1579</div><div class='add'>+MX6Q_PAD_SD2_CMD__AUDMUX_AUD4_RXC		1580</div><div class='add'>+MX6Q_PAD_SD2_CMD__PCIE_CTRL_MUX_10		1581</div><div class='add'>+MX6Q_PAD_SD2_CMD__GPIO_1_11			1582</div><div class='add'>+MX6Q_PAD_SD2_DAT3__USDHC2_DAT3			1583</div><div class='add'>+MX6Q_PAD_SD2_DAT3__ECSPI5_SS3			1584</div><div class='add'>+MX6Q_PAD_SD2_DAT3__KPP_COL_6			1585</div><div class='add'>+MX6Q_PAD_SD2_DAT3__AUDMUX_AUD4_TXC		1586</div><div class='add'>+MX6Q_PAD_SD2_DAT3__PCIE_CTRL_MUX_11		1587</div><div class='add'>+MX6Q_PAD_SD2_DAT3__GPIO_1_12			1588</div><div class='add'>+MX6Q_PAD_SD2_DAT3__SJC_DONE			1589</div><div class='add'>+MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3		1590</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt<br/>new file mode 100644<br/>index 000000000000..f7e8e8f4d9a3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/fsl,mxs-pinctrl.txt</a></div><div class='hunk'>@@ -0,0 +1,918 @@</div><div class='add'>+* Freescale MXS Pin Controller</div><div class='add'>+</div><div class='add'>+The pins controlled by mxs pin controller are organized in banks, each bank</div><div class='add'>+has 32 pins.  Each pin has 4 multiplexing functions, and generally, the 4th</div><div class='add'>+function is GPIO.  The configuration on the pins includes drive strength,</div><div class='add'>+voltage and pull-up.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "fsl,imx23-pinctrl" or "fsl,imx28-pinctrl"</div><div class='add'>+- reg: Should contain the register physical address and length for the</div><div class='add'>+  pin controller.</div><div class='add'>+</div><div class='add'>+Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='add'>+common pinctrl bindings used by client devices.</div><div class='add'>+</div><div class='add'>+The node of mxs pin controller acts as a container for an arbitrary number of</div><div class='add'>+subnodes.  Each of these subnodes represents some desired configuration for</div><div class='add'>+a group of pins, and only affects those parameters that are explicitly listed.</div><div class='add'>+In other words, a subnode that describes a drive strength parameter implies no</div><div class='add'>+information about pull-up. For this reason, even seemingly boolean values are</div><div class='add'>+actually tristates in this binding: unspecified, off, or on. Unspecified is</div><div class='add'>+represented as an absent property, and off/on are represented as integer</div><div class='add'>+values 0 and 1.</div><div class='add'>+</div><div class='add'>+Those subnodes under mxs pin controller node will fall into two categories.</div><div class='add'>+One is to set up a group of pins for a function, both mux selection and pin</div><div class='add'>+configurations, and it's called group node in the binding document.   The other</div><div class='add'>+one is to adjust the pin configuration for some particular pins that need a</div><div class='add'>+different configuration than what is defined in group node.  The binding</div><div class='add'>+document calls this type of node config node.</div><div class='add'>+</div><div class='add'>+On mxs, there is no hardware pin group. The pin group in this binding only</div><div class='add'>+means a group of pins put together for particular peripheral to work in</div><div class='add'>+particular function, like SSP0 functioning as mmc0-8bit.  That said, the</div><div class='add'>+group node should include all the pins needed for one function rather than</div><div class='add'>+having these pins defined in several group nodes.  It also means each of</div><div class='add'>+"pinctrl-*" phandle in client device node should only have one group node</div><div class='add'>+pointed in there, while the phandle can have multiple config node referenced</div><div class='add'>+there to adjust configurations for some pins in the group.</div><div class='add'>+</div><div class='add'>+Required subnode-properties:</div><div class='add'>+- fsl,pinmux-ids: An integer array.  Each integer in the array specify a pin</div><div class='add'>+  with given mux function, with bank, pin and mux packed as below.</div><div class='add'>+</div><div class='add'>+    [15..12] : bank number</div><div class='add'>+    [11..4]  : pin number</div><div class='add'>+    [3..0]   : mux selection</div><div class='add'>+</div><div class='add'>+  This integer with mux selection packed is used as an entity by both group</div><div class='add'>+  and config nodes to identify a pin.  The mux selection in the integer takes</div><div class='add'>+  effects only on group node, and will get ignored by driver with config node,</div><div class='add'>+  since config node is only meant to set up pin configurations.</div><div class='add'>+</div><div class='add'>+  Valid values for these integers are listed below.</div><div class='add'>+</div><div class='add'>+- reg: Should be the index of the group nodes for same function.  This property</div><div class='add'>+  is required only for group nodes, and should not be present in any config</div><div class='add'>+  nodes.</div><div class='add'>+</div><div class='add'>+Optional subnode-properties:</div><div class='add'>+- fsl,drive-strength: Integer.</div><div class='add'>+    0: 4 mA</div><div class='add'>+    1: 8 mA</div><div class='add'>+    2: 12 mA</div><div class='add'>+    3: 16 mA</div><div class='add'>+- fsl,voltage: Integer.</div><div class='add'>+    0: 1.8 V</div><div class='add'>+    1: 3.3 V</div><div class='add'>+- fsl,pull-up: Integer.</div><div class='add'>+    0: Disable the internal pull-up</div><div class='add'>+    1: Enable the internal pull-up</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+pinctrl@80018000 {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;0&gt;;</div><div class='add'>+	compatible = "fsl,imx28-pinctrl";</div><div class='add'>+	reg = &lt;0x80018000 2000&gt;;</div><div class='add'>+</div><div class='add'>+	mmc0_8bit_pins_a: mmc0-8bit@0 {</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		fsl,pinmux-ids = &lt;</div><div class='add'>+			0x2000 0x2010 0x2020 0x2030</div><div class='add'>+			0x2040 0x2050 0x2060 0x2070</div><div class='add'>+			0x2080 0x2090 0x20a0&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;1&gt;;</div><div class='add'>+		fsl,voltage = &lt;1&gt;;</div><div class='add'>+		fsl,pull-up = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc_cd_cfg: mmc-cd-cfg {</div><div class='add'>+		fsl,pinmux-ids = &lt;0x2090&gt;;</div><div class='add'>+		fsl,pull-up = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mmc_sck_cfg: mmc-sck-cfg {</div><div class='add'>+		fsl,pinmux-ids = &lt;0x20a0&gt;;</div><div class='add'>+		fsl,drive-strength = &lt;2&gt;;</div><div class='add'>+		fsl,pull-up = &lt;0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+In this example, group node mmc0-8bit defines a group of pins for mxs SSP0</div><div class='add'>+to function as a 8-bit mmc device, with 8mA, 3.3V and pull-up configurations</div><div class='add'>+applied on all these pins.  And config nodes mmc-cd-cfg and mmc-sck-cfg are</div><div class='add'>+adjusting the configuration for pins card-detection and clock from what group</div><div class='add'>+node mmc0-8bit defines.  Only the configuration properties to be adjusted need</div><div class='add'>+to be listed in the config nodes.</div><div class='add'>+</div><div class='add'>+Valid values for i.MX28 pinmux-id:</div><div class='add'>+</div><div class='add'>+pinmux						id</div><div class='add'>+------						--</div><div class='add'>+MX28_PAD_GPMI_D00__GPMI_D0			0x0000</div><div class='add'>+MX28_PAD_GPMI_D01__GPMI_D1			0x0010</div><div class='add'>+MX28_PAD_GPMI_D02__GPMI_D2			0x0020</div><div class='add'>+MX28_PAD_GPMI_D03__GPMI_D3			0x0030</div><div class='add'>+MX28_PAD_GPMI_D04__GPMI_D4			0x0040</div><div class='add'>+MX28_PAD_GPMI_D05__GPMI_D5			0x0050</div><div class='add'>+MX28_PAD_GPMI_D06__GPMI_D6			0x0060</div><div class='add'>+MX28_PAD_GPMI_D07__GPMI_D7			0x0070</div><div class='add'>+MX28_PAD_GPMI_CE0N__GPMI_CE0N			0x0100</div><div class='add'>+MX28_PAD_GPMI_CE1N__GPMI_CE1N			0x0110</div><div class='add'>+MX28_PAD_GPMI_CE2N__GPMI_CE2N			0x0120</div><div class='add'>+MX28_PAD_GPMI_CE3N__GPMI_CE3N			0x0130</div><div class='add'>+MX28_PAD_GPMI_RDY0__GPMI_READY0			0x0140</div><div class='add'>+MX28_PAD_GPMI_RDY1__GPMI_READY1			0x0150</div><div class='add'>+MX28_PAD_GPMI_RDY2__GPMI_READY2			0x0160</div><div class='add'>+MX28_PAD_GPMI_RDY3__GPMI_READY3			0x0170</div><div class='add'>+MX28_PAD_GPMI_RDN__GPMI_RDN			0x0180</div><div class='add'>+MX28_PAD_GPMI_WRN__GPMI_WRN			0x0190</div><div class='add'>+MX28_PAD_GPMI_ALE__GPMI_ALE			0x01a0</div><div class='add'>+MX28_PAD_GPMI_CLE__GPMI_CLE			0x01b0</div><div class='add'>+MX28_PAD_GPMI_RESETN__GPMI_RESETN		0x01c0</div><div class='add'>+MX28_PAD_LCD_D00__LCD_D0			0x1000</div><div class='add'>+MX28_PAD_LCD_D01__LCD_D1			0x1010</div><div class='add'>+MX28_PAD_LCD_D02__LCD_D2			0x1020</div><div class='add'>+MX28_PAD_LCD_D03__LCD_D3			0x1030</div><div class='add'>+MX28_PAD_LCD_D04__LCD_D4			0x1040</div><div class='add'>+MX28_PAD_LCD_D05__LCD_D5			0x1050</div><div class='add'>+MX28_PAD_LCD_D06__LCD_D6			0x1060</div><div class='add'>+MX28_PAD_LCD_D07__LCD_D7			0x1070</div><div class='add'>+MX28_PAD_LCD_D08__LCD_D8			0x1080</div><div class='add'>+MX28_PAD_LCD_D09__LCD_D9			0x1090</div><div class='add'>+MX28_PAD_LCD_D10__LCD_D10			0x10a0</div><div class='add'>+MX28_PAD_LCD_D11__LCD_D11			0x10b0</div><div class='add'>+MX28_PAD_LCD_D12__LCD_D12			0x10c0</div><div class='add'>+MX28_PAD_LCD_D13__LCD_D13			0x10d0</div><div class='add'>+MX28_PAD_LCD_D14__LCD_D14			0x10e0</div><div class='add'>+MX28_PAD_LCD_D15__LCD_D15			0x10f0</div><div class='add'>+MX28_PAD_LCD_D16__LCD_D16			0x1100</div><div class='add'>+MX28_PAD_LCD_D17__LCD_D17			0x1110</div><div class='add'>+MX28_PAD_LCD_D18__LCD_D18			0x1120</div><div class='add'>+MX28_PAD_LCD_D19__LCD_D19			0x1130</div><div class='add'>+MX28_PAD_LCD_D20__LCD_D20			0x1140</div><div class='add'>+MX28_PAD_LCD_D21__LCD_D21			0x1150</div><div class='add'>+MX28_PAD_LCD_D22__LCD_D22			0x1160</div><div class='add'>+MX28_PAD_LCD_D23__LCD_D23			0x1170</div><div class='add'>+MX28_PAD_LCD_RD_E__LCD_RD_E			0x1180</div><div class='add'>+MX28_PAD_LCD_WR_RWN__LCD_WR_RWN			0x1190</div><div class='add'>+MX28_PAD_LCD_RS__LCD_RS				0x11a0</div><div class='add'>+MX28_PAD_LCD_CS__LCD_CS				0x11b0</div><div class='add'>+MX28_PAD_LCD_VSYNC__LCD_VSYNC			0x11c0</div><div class='add'>+MX28_PAD_LCD_HSYNC__LCD_HSYNC			0x11d0</div><div class='add'>+MX28_PAD_LCD_DOTCLK__LCD_DOTCLK			0x11e0</div><div class='add'>+MX28_PAD_LCD_ENABLE__LCD_ENABLE			0x11f0</div><div class='add'>+MX28_PAD_SSP0_DATA0__SSP0_D0			0x2000</div><div class='add'>+MX28_PAD_SSP0_DATA1__SSP0_D1			0x2010</div><div class='add'>+MX28_PAD_SSP0_DATA2__SSP0_D2			0x2020</div><div class='add'>+MX28_PAD_SSP0_DATA3__SSP0_D3			0x2030</div><div class='add'>+MX28_PAD_SSP0_DATA4__SSP0_D4			0x2040</div><div class='add'>+MX28_PAD_SSP0_DATA5__SSP0_D5			0x2050</div><div class='add'>+MX28_PAD_SSP0_DATA6__SSP0_D6			0x2060</div><div class='add'>+MX28_PAD_SSP0_DATA7__SSP0_D7			0x2070</div><div class='add'>+MX28_PAD_SSP0_CMD__SSP0_CMD			0x2080</div><div class='add'>+MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT		0x2090</div><div class='add'>+MX28_PAD_SSP0_SCK__SSP0_SCK			0x20a0</div><div class='add'>+MX28_PAD_SSP1_SCK__SSP1_SCK			0x20c0</div><div class='add'>+MX28_PAD_SSP1_CMD__SSP1_CMD			0x20d0</div><div class='add'>+MX28_PAD_SSP1_DATA0__SSP1_D0			0x20e0</div><div class='add'>+MX28_PAD_SSP1_DATA3__SSP1_D3			0x20f0</div><div class='add'>+MX28_PAD_SSP2_SCK__SSP2_SCK			0x2100</div><div class='add'>+MX28_PAD_SSP2_MOSI__SSP2_CMD			0x2110</div><div class='add'>+MX28_PAD_SSP2_MISO__SSP2_D0			0x2120</div><div class='add'>+MX28_PAD_SSP2_SS0__SSP2_D3			0x2130</div><div class='add'>+MX28_PAD_SSP2_SS1__SSP2_D4			0x2140</div><div class='add'>+MX28_PAD_SSP2_SS2__SSP2_D5			0x2150</div><div class='add'>+MX28_PAD_SSP3_SCK__SSP3_SCK			0x2180</div><div class='add'>+MX28_PAD_SSP3_MOSI__SSP3_CMD			0x2190</div><div class='add'>+MX28_PAD_SSP3_MISO__SSP3_D0			0x21a0</div><div class='add'>+MX28_PAD_SSP3_SS0__SSP3_D3			0x21b0</div><div class='add'>+MX28_PAD_AUART0_RX__AUART0_RX			0x3000</div><div class='add'>+MX28_PAD_AUART0_TX__AUART0_TX			0x3010</div><div class='add'>+MX28_PAD_AUART0_CTS__AUART0_CTS			0x3020</div><div class='add'>+MX28_PAD_AUART0_RTS__AUART0_RTS			0x3030</div><div class='add'>+MX28_PAD_AUART1_RX__AUART1_RX			0x3040</div><div class='add'>+MX28_PAD_AUART1_TX__AUART1_TX			0x3050</div><div class='add'>+MX28_PAD_AUART1_CTS__AUART1_CTS			0x3060</div><div class='add'>+MX28_PAD_AUART1_RTS__AUART1_RTS			0x3070</div><div class='add'>+MX28_PAD_AUART2_RX__AUART2_RX			0x3080</div><div class='add'>+MX28_PAD_AUART2_TX__AUART2_TX			0x3090</div><div class='add'>+MX28_PAD_AUART2_CTS__AUART2_CTS			0x30a0</div><div class='add'>+MX28_PAD_AUART2_RTS__AUART2_RTS			0x30b0</div><div class='add'>+MX28_PAD_AUART3_RX__AUART3_RX			0x30c0</div><div class='add'>+MX28_PAD_AUART3_TX__AUART3_TX			0x30d0</div><div class='add'>+MX28_PAD_AUART3_CTS__AUART3_CTS			0x30e0</div><div class='add'>+MX28_PAD_AUART3_RTS__AUART3_RTS			0x30f0</div><div class='add'>+MX28_PAD_PWM0__PWM_0				0x3100</div><div class='add'>+MX28_PAD_PWM1__PWM_1				0x3110</div><div class='add'>+MX28_PAD_PWM2__PWM_2				0x3120</div><div class='add'>+MX28_PAD_SAIF0_MCLK__SAIF0_MCLK			0x3140</div><div class='add'>+MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK		0x3150</div><div class='add'>+MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK		0x3160</div><div class='add'>+MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0		0x3170</div><div class='add'>+MX28_PAD_I2C0_SCL__I2C0_SCL			0x3180</div><div class='add'>+MX28_PAD_I2C0_SDA__I2C0_SDA			0x3190</div><div class='add'>+MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0		0x31a0</div><div class='add'>+MX28_PAD_SPDIF__SPDIF_TX			0x31b0</div><div class='add'>+MX28_PAD_PWM3__PWM_3				0x31c0</div><div class='add'>+MX28_PAD_PWM4__PWM_4				0x31d0</div><div class='add'>+MX28_PAD_LCD_RESET__LCD_RESET			0x31e0</div><div class='add'>+MX28_PAD_ENET0_MDC__ENET0_MDC			0x4000</div><div class='add'>+MX28_PAD_ENET0_MDIO__ENET0_MDIO			0x4010</div><div class='add'>+MX28_PAD_ENET0_RX_EN__ENET0_RX_EN		0x4020</div><div class='add'>+MX28_PAD_ENET0_RXD0__ENET0_RXD0			0x4030</div><div class='add'>+MX28_PAD_ENET0_RXD1__ENET0_RXD1			0x4040</div><div class='add'>+MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK		0x4050</div><div class='add'>+MX28_PAD_ENET0_TX_EN__ENET0_TX_EN		0x4060</div><div class='add'>+MX28_PAD_ENET0_TXD0__ENET0_TXD0			0x4070</div><div class='add'>+MX28_PAD_ENET0_TXD1__ENET0_TXD1			0x4080</div><div class='add'>+MX28_PAD_ENET0_RXD2__ENET0_RXD2			0x4090</div><div class='add'>+MX28_PAD_ENET0_RXD3__ENET0_RXD3			0x40a0</div><div class='add'>+MX28_PAD_ENET0_TXD2__ENET0_TXD2			0x40b0</div><div class='add'>+MX28_PAD_ENET0_TXD3__ENET0_TXD3			0x40c0</div><div class='add'>+MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK		0x40d0</div><div class='add'>+MX28_PAD_ENET0_COL__ENET0_COL			0x40e0</div><div class='add'>+MX28_PAD_ENET0_CRS__ENET0_CRS			0x40f0</div><div class='add'>+MX28_PAD_ENET_CLK__CLKCTRL_ENET			0x4100</div><div class='add'>+MX28_PAD_JTAG_RTCK__JTAG_RTCK			0x4140</div><div class='add'>+MX28_PAD_EMI_D00__EMI_DATA0			0x5000</div><div class='add'>+MX28_PAD_EMI_D01__EMI_DATA1			0x5010</div><div class='add'>+MX28_PAD_EMI_D02__EMI_DATA2			0x5020</div><div class='add'>+MX28_PAD_EMI_D03__EMI_DATA3			0x5030</div><div class='add'>+MX28_PAD_EMI_D04__EMI_DATA4			0x5040</div><div class='add'>+MX28_PAD_EMI_D05__EMI_DATA5			0x5050</div><div class='add'>+MX28_PAD_EMI_D06__EMI_DATA6			0x5060</div><div class='add'>+MX28_PAD_EMI_D07__EMI_DATA7			0x5070</div><div class='add'>+MX28_PAD_EMI_D08__EMI_DATA8			0x5080</div><div class='add'>+MX28_PAD_EMI_D09__EMI_DATA9			0x5090</div><div class='add'>+MX28_PAD_EMI_D10__EMI_DATA10			0x50a0</div><div class='add'>+MX28_PAD_EMI_D11__EMI_DATA11			0x50b0</div><div class='add'>+MX28_PAD_EMI_D12__EMI_DATA12			0x50c0</div><div class='add'>+MX28_PAD_EMI_D13__EMI_DATA13			0x50d0</div><div class='add'>+MX28_PAD_EMI_D14__EMI_DATA14			0x50e0</div><div class='add'>+MX28_PAD_EMI_D15__EMI_DATA15			0x50f0</div><div class='add'>+MX28_PAD_EMI_ODT0__EMI_ODT0			0x5100</div><div class='add'>+MX28_PAD_EMI_DQM0__EMI_DQM0			0x5110</div><div class='add'>+MX28_PAD_EMI_ODT1__EMI_ODT1			0x5120</div><div class='add'>+MX28_PAD_EMI_DQM1__EMI_DQM1			0x5130</div><div class='add'>+MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK	0x5140</div><div class='add'>+MX28_PAD_EMI_CLK__EMI_CLK			0x5150</div><div class='add'>+MX28_PAD_EMI_DQS0__EMI_DQS0			0x5160</div><div class='add'>+MX28_PAD_EMI_DQS1__EMI_DQS1			0x5170</div><div class='add'>+MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN		0x51a0</div><div class='add'>+MX28_PAD_EMI_A00__EMI_ADDR0			0x6000</div><div class='add'>+MX28_PAD_EMI_A01__EMI_ADDR1			0x6010</div><div class='add'>+MX28_PAD_EMI_A02__EMI_ADDR2			0x6020</div><div class='add'>+MX28_PAD_EMI_A03__EMI_ADDR3			0x6030</div><div class='add'>+MX28_PAD_EMI_A04__EMI_ADDR4			0x6040</div><div class='add'>+MX28_PAD_EMI_A05__EMI_ADDR5			0x6050</div><div class='add'>+MX28_PAD_EMI_A06__EMI_ADDR6			0x6060</div><div class='add'>+MX28_PAD_EMI_A07__EMI_ADDR7			0x6070</div><div class='add'>+MX28_PAD_EMI_A08__EMI_ADDR8			0x6080</div><div class='add'>+MX28_PAD_EMI_A09__EMI_ADDR9			0x6090</div><div class='add'>+MX28_PAD_EMI_A10__EMI_ADDR10			0x60a0</div><div class='add'>+MX28_PAD_EMI_A11__EMI_ADDR11			0x60b0</div><div class='add'>+MX28_PAD_EMI_A12__EMI_ADDR12			0x60c0</div><div class='add'>+MX28_PAD_EMI_A13__EMI_ADDR13			0x60d0</div><div class='add'>+MX28_PAD_EMI_A14__EMI_ADDR14			0x60e0</div><div class='add'>+MX28_PAD_EMI_BA0__EMI_BA0			0x6100</div><div class='add'>+MX28_PAD_EMI_BA1__EMI_BA1			0x6110</div><div class='add'>+MX28_PAD_EMI_BA2__EMI_BA2			0x6120</div><div class='add'>+MX28_PAD_EMI_CASN__EMI_CASN			0x6130</div><div class='add'>+MX28_PAD_EMI_RASN__EMI_RASN			0x6140</div><div class='add'>+MX28_PAD_EMI_WEN__EMI_WEN			0x6150</div><div class='add'>+MX28_PAD_EMI_CE0N__EMI_CE0N			0x6160</div><div class='add'>+MX28_PAD_EMI_CE1N__EMI_CE1N			0x6170</div><div class='add'>+MX28_PAD_EMI_CKE__EMI_CKE			0x6180</div><div class='add'>+MX28_PAD_GPMI_D00__SSP1_D0			0x0001</div><div class='add'>+MX28_PAD_GPMI_D01__SSP1_D1			0x0011</div><div class='add'>+MX28_PAD_GPMI_D02__SSP1_D2			0x0021</div><div class='add'>+MX28_PAD_GPMI_D03__SSP1_D3			0x0031</div><div class='add'>+MX28_PAD_GPMI_D04__SSP1_D4			0x0041</div><div class='add'>+MX28_PAD_GPMI_D05__SSP1_D5			0x0051</div><div class='add'>+MX28_PAD_GPMI_D06__SSP1_D6			0x0061</div><div class='add'>+MX28_PAD_GPMI_D07__SSP1_D7			0x0071</div><div class='add'>+MX28_PAD_GPMI_CE0N__SSP3_D0			0x0101</div><div class='add'>+MX28_PAD_GPMI_CE1N__SSP3_D3			0x0111</div><div class='add'>+MX28_PAD_GPMI_CE2N__CAN1_TX			0x0121</div><div class='add'>+MX28_PAD_GPMI_CE3N__CAN1_RX			0x0131</div><div class='add'>+MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT		0x0141</div><div class='add'>+MX28_PAD_GPMI_RDY1__SSP1_CMD			0x0151</div><div class='add'>+MX28_PAD_GPMI_RDY2__CAN0_TX			0x0161</div><div class='add'>+MX28_PAD_GPMI_RDY3__CAN0_RX			0x0171</div><div class='add'>+MX28_PAD_GPMI_RDN__SSP3_SCK			0x0181</div><div class='add'>+MX28_PAD_GPMI_WRN__SSP1_SCK			0x0191</div><div class='add'>+MX28_PAD_GPMI_ALE__SSP3_D1			0x01a1</div><div class='add'>+MX28_PAD_GPMI_CLE__SSP3_D2			0x01b1</div><div class='add'>+MX28_PAD_GPMI_RESETN__SSP3_CMD			0x01c1</div><div class='add'>+MX28_PAD_LCD_D03__ETM_DA8			0x1031</div><div class='add'>+MX28_PAD_LCD_D04__ETM_DA9			0x1041</div><div class='add'>+MX28_PAD_LCD_D08__ETM_DA3			0x1081</div><div class='add'>+MX28_PAD_LCD_D09__ETM_DA4			0x1091</div><div class='add'>+MX28_PAD_LCD_D20__ENET1_1588_EVENT2_OUT		0x1141</div><div class='add'>+MX28_PAD_LCD_D21__ENET1_1588_EVENT2_IN		0x1151</div><div class='add'>+MX28_PAD_LCD_D22__ENET1_1588_EVENT3_OUT		0x1161</div><div class='add'>+MX28_PAD_LCD_D23__ENET1_1588_EVENT3_IN		0x1171</div><div class='add'>+MX28_PAD_LCD_RD_E__LCD_VSYNC			0x1181</div><div class='add'>+MX28_PAD_LCD_WR_RWN__LCD_HSYNC			0x1191</div><div class='add'>+MX28_PAD_LCD_RS__LCD_DOTCLK			0x11a1</div><div class='add'>+MX28_PAD_LCD_CS__LCD_ENABLE			0x11b1</div><div class='add'>+MX28_PAD_LCD_VSYNC__SAIF1_SDATA0		0x11c1</div><div class='add'>+MX28_PAD_LCD_HSYNC__SAIF1_SDATA1		0x11d1</div><div class='add'>+MX28_PAD_LCD_DOTCLK__SAIF1_MCLK			0x11e1</div><div class='add'>+MX28_PAD_SSP0_DATA4__SSP2_D0			0x2041</div><div class='add'>+MX28_PAD_SSP0_DATA5__SSP2_D3			0x2051</div><div class='add'>+MX28_PAD_SSP0_DATA6__SSP2_CMD			0x2061</div><div class='add'>+MX28_PAD_SSP0_DATA7__SSP2_SCK			0x2071</div><div class='add'>+MX28_PAD_SSP1_SCK__SSP2_D1			0x20c1</div><div class='add'>+MX28_PAD_SSP1_CMD__SSP2_D2			0x20d1</div><div class='add'>+MX28_PAD_SSP1_DATA0__SSP2_D6			0x20e1</div><div class='add'>+MX28_PAD_SSP1_DATA3__SSP2_D7			0x20f1</div><div class='add'>+MX28_PAD_SSP2_SCK__AUART2_RX			0x2101</div><div class='add'>+MX28_PAD_SSP2_MOSI__AUART2_TX			0x2111</div><div class='add'>+MX28_PAD_SSP2_MISO__AUART3_RX			0x2121</div><div class='add'>+MX28_PAD_SSP2_SS0__AUART3_TX			0x2131</div><div class='add'>+MX28_PAD_SSP2_SS1__SSP2_D1			0x2141</div><div class='add'>+MX28_PAD_SSP2_SS2__SSP2_D2			0x2151</div><div class='add'>+MX28_PAD_SSP3_SCK__AUART4_TX			0x2181</div><div class='add'>+MX28_PAD_SSP3_MOSI__AUART4_RX			0x2191</div><div class='add'>+MX28_PAD_SSP3_MISO__AUART4_RTS			0x21a1</div><div class='add'>+MX28_PAD_SSP3_SS0__AUART4_CTS			0x21b1</div><div class='add'>+MX28_PAD_AUART0_RX__I2C0_SCL			0x3001</div><div class='add'>+MX28_PAD_AUART0_TX__I2C0_SDA			0x3011</div><div class='add'>+MX28_PAD_AUART0_CTS__AUART4_RX			0x3021</div><div class='add'>+MX28_PAD_AUART0_RTS__AUART4_TX			0x3031</div><div class='add'>+MX28_PAD_AUART1_RX__SSP2_CARD_DETECT		0x3041</div><div class='add'>+MX28_PAD_AUART1_TX__SSP3_CARD_DETECT		0x3051</div><div class='add'>+MX28_PAD_AUART1_CTS__USB0_OVERCURRENT		0x3061</div><div class='add'>+MX28_PAD_AUART1_RTS__USB0_ID			0x3071</div><div class='add'>+MX28_PAD_AUART2_RX__SSP3_D1			0x3081</div><div class='add'>+MX28_PAD_AUART2_TX__SSP3_D2			0x3091</div><div class='add'>+MX28_PAD_AUART2_CTS__I2C1_SCL			0x30a1</div><div class='add'>+MX28_PAD_AUART2_RTS__I2C1_SDA			0x30b1</div><div class='add'>+MX28_PAD_AUART3_RX__CAN0_TX			0x30c1</div><div class='add'>+MX28_PAD_AUART3_TX__CAN0_RX			0x30d1</div><div class='add'>+MX28_PAD_AUART3_CTS__CAN1_TX			0x30e1</div><div class='add'>+MX28_PAD_AUART3_RTS__CAN1_RX			0x30f1</div><div class='add'>+MX28_PAD_PWM0__I2C1_SCL				0x3101</div><div class='add'>+MX28_PAD_PWM1__I2C1_SDA				0x3111</div><div class='add'>+MX28_PAD_PWM2__USB0_ID				0x3121</div><div class='add'>+MX28_PAD_SAIF0_MCLK__PWM_3			0x3141</div><div class='add'>+MX28_PAD_SAIF0_LRCLK__PWM_4			0x3151</div><div class='add'>+MX28_PAD_SAIF0_BITCLK__PWM_5			0x3161</div><div class='add'>+MX28_PAD_SAIF0_SDATA0__PWM_6			0x3171</div><div class='add'>+MX28_PAD_I2C0_SCL__TIMROT_ROTARYA		0x3181</div><div class='add'>+MX28_PAD_I2C0_SDA__TIMROT_ROTARYB		0x3191</div><div class='add'>+MX28_PAD_SAIF1_SDATA0__PWM_7			0x31a1</div><div class='add'>+MX28_PAD_LCD_RESET__LCD_VSYNC			0x31e1</div><div class='add'>+MX28_PAD_ENET0_MDC__GPMI_CE4N			0x4001</div><div class='add'>+MX28_PAD_ENET0_MDIO__GPMI_CE5N			0x4011</div><div class='add'>+MX28_PAD_ENET0_RX_EN__GPMI_CE6N			0x4021</div><div class='add'>+MX28_PAD_ENET0_RXD0__GPMI_CE7N			0x4031</div><div class='add'>+MX28_PAD_ENET0_RXD1__GPMI_READY4		0x4041</div><div class='add'>+MX28_PAD_ENET0_TX_CLK__HSADC_TRIGGER		0x4051</div><div class='add'>+MX28_PAD_ENET0_TX_EN__GPMI_READY5		0x4061</div><div class='add'>+MX28_PAD_ENET0_TXD0__GPMI_READY6		0x4071</div><div class='add'>+MX28_PAD_ENET0_TXD1__GPMI_READY7		0x4081</div><div class='add'>+MX28_PAD_ENET0_RXD2__ENET1_RXD0			0x4091</div><div class='add'>+MX28_PAD_ENET0_RXD3__ENET1_RXD1			0x40a1</div><div class='add'>+MX28_PAD_ENET0_TXD2__ENET1_TXD0			0x40b1</div><div class='add'>+MX28_PAD_ENET0_TXD3__ENET1_TXD1			0x40c1</div><div class='add'>+MX28_PAD_ENET0_RX_CLK__ENET0_RX_ER		0x40d1</div><div class='add'>+MX28_PAD_ENET0_COL__ENET1_TX_EN			0x40e1</div><div class='add'>+MX28_PAD_ENET0_CRS__ENET1_RX_EN			0x40f1</div><div class='add'>+MX28_PAD_GPMI_CE2N__ENET0_RX_ER			0x0122</div><div class='add'>+MX28_PAD_GPMI_CE3N__SAIF1_MCLK			0x0132</div><div class='add'>+MX28_PAD_GPMI_RDY0__USB0_ID			0x0142</div><div class='add'>+MX28_PAD_GPMI_RDY2__ENET0_TX_ER			0x0162</div><div class='add'>+MX28_PAD_GPMI_RDY3__HSADC_TRIGGER		0x0172</div><div class='add'>+MX28_PAD_GPMI_ALE__SSP3_D4			0x01a2</div><div class='add'>+MX28_PAD_GPMI_CLE__SSP3_D5			0x01b2</div><div class='add'>+MX28_PAD_LCD_D00__ETM_DA0			0x1002</div><div class='add'>+MX28_PAD_LCD_D01__ETM_DA1			0x1012</div><div class='add'>+MX28_PAD_LCD_D02__ETM_DA2			0x1022</div><div class='add'>+MX28_PAD_LCD_D03__ETM_DA3			0x1032</div><div class='add'>+MX28_PAD_LCD_D04__ETM_DA4			0x1042</div><div class='add'>+MX28_PAD_LCD_D05__ETM_DA5			0x1052</div><div class='add'>+MX28_PAD_LCD_D06__ETM_DA6			0x1062</div><div class='add'>+MX28_PAD_LCD_D07__ETM_DA7			0x1072</div><div class='add'>+MX28_PAD_LCD_D08__ETM_DA8			0x1082</div><div class='add'>+MX28_PAD_LCD_D09__ETM_DA9			0x1092</div><div class='add'>+MX28_PAD_LCD_D10__ETM_DA10			0x10a2</div><div class='add'>+MX28_PAD_LCD_D11__ETM_DA11			0x10b2</div><div class='add'>+MX28_PAD_LCD_D12__ETM_DA12			0x10c2</div><div class='add'>+MX28_PAD_LCD_D13__ETM_DA13			0x10d2</div><div class='add'>+MX28_PAD_LCD_D14__ETM_DA14			0x10e2</div><div class='add'>+MX28_PAD_LCD_D15__ETM_DA15			0x10f2</div><div class='add'>+MX28_PAD_LCD_D16__ETM_DA7			0x1102</div><div class='add'>+MX28_PAD_LCD_D17__ETM_DA6			0x1112</div><div class='add'>+MX28_PAD_LCD_D18__ETM_DA5			0x1122</div><div class='add'>+MX28_PAD_LCD_D19__ETM_DA4			0x1132</div><div class='add'>+MX28_PAD_LCD_D20__ETM_DA3			0x1142</div><div class='add'>+MX28_PAD_LCD_D21__ETM_DA2			0x1152</div><div class='add'>+MX28_PAD_LCD_D22__ETM_DA1			0x1162</div><div class='add'>+MX28_PAD_LCD_D23__ETM_DA0			0x1172</div><div class='add'>+MX28_PAD_LCD_RD_E__ETM_TCTL			0x1182</div><div class='add'>+MX28_PAD_LCD_WR_RWN__ETM_TCLK			0x1192</div><div class='add'>+MX28_PAD_LCD_HSYNC__ETM_TCTL			0x11d2</div><div class='add'>+MX28_PAD_LCD_DOTCLK__ETM_TCLK			0x11e2</div><div class='add'>+MX28_PAD_SSP1_SCK__ENET0_1588_EVENT2_OUT	0x20c2</div><div class='add'>+MX28_PAD_SSP1_CMD__ENET0_1588_EVENT2_IN		0x20d2</div><div class='add'>+MX28_PAD_SSP1_DATA0__ENET0_1588_EVENT3_OUT	0x20e2</div><div class='add'>+MX28_PAD_SSP1_DATA3__ENET0_1588_EVENT3_IN	0x20f2</div><div class='add'>+MX28_PAD_SSP2_SCK__SAIF0_SDATA1			0x2102</div><div class='add'>+MX28_PAD_SSP2_MOSI__SAIF0_SDATA2		0x2112</div><div class='add'>+MX28_PAD_SSP2_MISO__SAIF1_SDATA1		0x2122</div><div class='add'>+MX28_PAD_SSP2_SS0__SAIF1_SDATA2			0x2132</div><div class='add'>+MX28_PAD_SSP2_SS1__USB1_OVERCURRENT		0x2142</div><div class='add'>+MX28_PAD_SSP2_SS2__USB0_OVERCURRENT		0x2152</div><div class='add'>+MX28_PAD_SSP3_SCK__ENET1_1588_EVENT0_OUT	0x2182</div><div class='add'>+MX28_PAD_SSP3_MOSI__ENET1_1588_EVENT0_IN	0x2192</div><div class='add'>+MX28_PAD_SSP3_MISO__ENET1_1588_EVENT1_OUT	0x21a2</div><div class='add'>+MX28_PAD_SSP3_SS0__ENET1_1588_EVENT1_IN		0x21b2</div><div class='add'>+MX28_PAD_AUART0_RX__DUART_CTS			0x3002</div><div class='add'>+MX28_PAD_AUART0_TX__DUART_RTS			0x3012</div><div class='add'>+MX28_PAD_AUART0_CTS__DUART_RX			0x3022</div><div class='add'>+MX28_PAD_AUART0_RTS__DUART_TX			0x3032</div><div class='add'>+MX28_PAD_AUART1_RX__PWM_0			0x3042</div><div class='add'>+MX28_PAD_AUART1_TX__PWM_1			0x3052</div><div class='add'>+MX28_PAD_AUART1_CTS__TIMROT_ROTARYA		0x3062</div><div class='add'>+MX28_PAD_AUART1_RTS__TIMROT_ROTARYB		0x3072</div><div class='add'>+MX28_PAD_AUART2_RX__SSP3_D4			0x3082</div><div class='add'>+MX28_PAD_AUART2_TX__SSP3_D5			0x3092</div><div class='add'>+MX28_PAD_AUART2_CTS__SAIF1_BITCLK		0x30a2</div><div class='add'>+MX28_PAD_AUART2_RTS__SAIF1_LRCLK		0x30b2</div><div class='add'>+MX28_PAD_AUART3_RX__ENET0_1588_EVENT0_OUT	0x30c2</div><div class='add'>+MX28_PAD_AUART3_TX__ENET0_1588_EVENT0_IN	0x30d2</div><div class='add'>+MX28_PAD_AUART3_CTS__ENET0_1588_EVENT1_OUT	0x30e2</div><div class='add'>+MX28_PAD_AUART3_RTS__ENET0_1588_EVENT1_IN	0x30f2</div><div class='add'>+MX28_PAD_PWM0__DUART_RX				0x3102</div><div class='add'>+MX28_PAD_PWM1__DUART_TX				0x3112</div><div class='add'>+MX28_PAD_PWM2__USB1_OVERCURRENT			0x3122</div><div class='add'>+MX28_PAD_SAIF0_MCLK__AUART4_CTS			0x3142</div><div class='add'>+MX28_PAD_SAIF0_LRCLK__AUART4_RTS		0x3152</div><div class='add'>+MX28_PAD_SAIF0_BITCLK__AUART4_RX		0x3162</div><div class='add'>+MX28_PAD_SAIF0_SDATA0__AUART4_TX		0x3172</div><div class='add'>+MX28_PAD_I2C0_SCL__DUART_RX			0x3182</div><div class='add'>+MX28_PAD_I2C0_SDA__DUART_TX			0x3192</div><div class='add'>+MX28_PAD_SAIF1_SDATA0__SAIF0_SDATA1		0x31a2</div><div class='add'>+MX28_PAD_SPDIF__ENET1_RX_ER			0x31b2</div><div class='add'>+MX28_PAD_ENET0_MDC__SAIF0_SDATA1		0x4002</div><div class='add'>+MX28_PAD_ENET0_MDIO__SAIF0_SDATA2		0x4012</div><div class='add'>+MX28_PAD_ENET0_RX_EN__SAIF1_SDATA1		0x4022</div><div class='add'>+MX28_PAD_ENET0_RXD0__SAIF1_SDATA2		0x4032</div><div class='add'>+MX28_PAD_ENET0_TX_CLK__ENET0_1588_EVENT2_OUT	0x4052</div><div class='add'>+MX28_PAD_ENET0_RXD2__ENET0_1588_EVENT0_OUT	0x4092</div><div class='add'>+MX28_PAD_ENET0_RXD3__ENET0_1588_EVENT0_IN	0x40a2</div><div class='add'>+MX28_PAD_ENET0_TXD2__ENET0_1588_EVENT1_OUT	0x40b2</div><div class='add'>+MX28_PAD_ENET0_TXD3__ENET0_1588_EVENT1_IN	0x40c2</div><div class='add'>+MX28_PAD_ENET0_RX_CLK__ENET0_1588_EVENT2_IN	0x40d2</div><div class='add'>+MX28_PAD_ENET0_COL__ENET0_1588_EVENT3_OUT	0x40e2</div><div class='add'>+MX28_PAD_ENET0_CRS__ENET0_1588_EVENT3_IN	0x40f2</div><div class='add'>+MX28_PAD_GPMI_D00__GPIO_0_0			0x0003</div><div class='add'>+MX28_PAD_GPMI_D01__GPIO_0_1			0x0013</div><div class='add'>+MX28_PAD_GPMI_D02__GPIO_0_2			0x0023</div><div class='add'>+MX28_PAD_GPMI_D03__GPIO_0_3			0x0033</div><div class='add'>+MX28_PAD_GPMI_D04__GPIO_0_4			0x0043</div><div class='add'>+MX28_PAD_GPMI_D05__GPIO_0_5			0x0053</div><div class='add'>+MX28_PAD_GPMI_D06__GPIO_0_6			0x0063</div><div class='add'>+MX28_PAD_GPMI_D07__GPIO_0_7			0x0073</div><div class='add'>+MX28_PAD_GPMI_CE0N__GPIO_0_16			0x0103</div><div class='add'>+MX28_PAD_GPMI_CE1N__GPIO_0_17			0x0113</div><div class='add'>+MX28_PAD_GPMI_CE2N__GPIO_0_18			0x0123</div><div class='add'>+MX28_PAD_GPMI_CE3N__GPIO_0_19			0x0133</div><div class='add'>+MX28_PAD_GPMI_RDY0__GPIO_0_20			0x0143</div><div class='add'>+MX28_PAD_GPMI_RDY1__GPIO_0_21			0x0153</div><div class='add'>+MX28_PAD_GPMI_RDY2__GPIO_0_22			0x0163</div><div class='add'>+MX28_PAD_GPMI_RDY3__GPIO_0_23			0x0173</div><div class='add'>+MX28_PAD_GPMI_RDN__GPIO_0_24			0x0183</div><div class='add'>+MX28_PAD_GPMI_WRN__GPIO_0_25			0x0193</div><div class='add'>+MX28_PAD_GPMI_ALE__GPIO_0_26			0x01a3</div><div class='add'>+MX28_PAD_GPMI_CLE__GPIO_0_27			0x01b3</div><div class='add'>+MX28_PAD_GPMI_RESETN__GPIO_0_28			0x01c3</div><div class='add'>+MX28_PAD_LCD_D00__GPIO_1_0			0x1003</div><div class='add'>+MX28_PAD_LCD_D01__GPIO_1_1			0x1013</div><div class='add'>+MX28_PAD_LCD_D02__GPIO_1_2			0x1023</div><div class='add'>+MX28_PAD_LCD_D03__GPIO_1_3			0x1033</div><div class='add'>+MX28_PAD_LCD_D04__GPIO_1_4			0x1043</div><div class='add'>+MX28_PAD_LCD_D05__GPIO_1_5			0x1053</div><div class='add'>+MX28_PAD_LCD_D06__GPIO_1_6			0x1063</div><div class='add'>+MX28_PAD_LCD_D07__GPIO_1_7			0x1073</div><div class='add'>+MX28_PAD_LCD_D08__GPIO_1_8			0x1083</div><div class='add'>+MX28_PAD_LCD_D09__GPIO_1_9			0x1093</div><div class='add'>+MX28_PAD_LCD_D10__GPIO_1_10			0x10a3</div><div class='add'>+MX28_PAD_LCD_D11__GPIO_1_11			0x10b3</div><div class='add'>+MX28_PAD_LCD_D12__GPIO_1_12			0x10c3</div><div class='add'>+MX28_PAD_LCD_D13__GPIO_1_13			0x10d3</div><div class='add'>+MX28_PAD_LCD_D14__GPIO_1_14			0x10e3</div><div class='add'>+MX28_PAD_LCD_D15__GPIO_1_15			0x10f3</div><div class='add'>+MX28_PAD_LCD_D16__GPIO_1_16			0x1103</div><div class='add'>+MX28_PAD_LCD_D17__GPIO_1_17			0x1113</div><div class='add'>+MX28_PAD_LCD_D18__GPIO_1_18			0x1123</div><div class='add'>+MX28_PAD_LCD_D19__GPIO_1_19			0x1133</div><div class='add'>+MX28_PAD_LCD_D20__GPIO_1_20			0x1143</div><div class='add'>+MX28_PAD_LCD_D21__GPIO_1_21			0x1153</div><div class='add'>+MX28_PAD_LCD_D22__GPIO_1_22			0x1163</div><div class='add'>+MX28_PAD_LCD_D23__GPIO_1_23			0x1173</div><div class='add'>+MX28_PAD_LCD_RD_E__GPIO_1_24			0x1183</div><div class='add'>+MX28_PAD_LCD_WR_RWN__GPIO_1_25			0x1193</div><div class='add'>+MX28_PAD_LCD_RS__GPIO_1_26			0x11a3</div><div class='add'>+MX28_PAD_LCD_CS__GPIO_1_27			0x11b3</div><div class='add'>+MX28_PAD_LCD_VSYNC__GPIO_1_28			0x11c3</div><div class='add'>+MX28_PAD_LCD_HSYNC__GPIO_1_29			0x11d3</div><div class='add'>+MX28_PAD_LCD_DOTCLK__GPIO_1_30			0x11e3</div><div class='add'>+MX28_PAD_LCD_ENABLE__GPIO_1_31			0x11f3</div><div class='add'>+MX28_PAD_SSP0_DATA0__GPIO_2_0			0x2003</div><div class='add'>+MX28_PAD_SSP0_DATA1__GPIO_2_1			0x2013</div><div class='add'>+MX28_PAD_SSP0_DATA2__GPIO_2_2			0x2023</div><div class='add'>+MX28_PAD_SSP0_DATA3__GPIO_2_3			0x2033</div><div class='add'>+MX28_PAD_SSP0_DATA4__GPIO_2_4			0x2043</div><div class='add'>+MX28_PAD_SSP0_DATA5__GPIO_2_5			0x2053</div><div class='add'>+MX28_PAD_SSP0_DATA6__GPIO_2_6			0x2063</div><div class='add'>+MX28_PAD_SSP0_DATA7__GPIO_2_7			0x2073</div><div class='add'>+MX28_PAD_SSP0_CMD__GPIO_2_8			0x2083</div><div class='add'>+MX28_PAD_SSP0_DETECT__GPIO_2_9			0x2093</div><div class='add'>+MX28_PAD_SSP0_SCK__GPIO_2_10			0x20a3</div><div class='add'>+MX28_PAD_SSP1_SCK__GPIO_2_12			0x20c3</div><div class='add'>+MX28_PAD_SSP1_CMD__GPIO_2_13			0x20d3</div><div class='add'>+MX28_PAD_SSP1_DATA0__GPIO_2_14			0x20e3</div><div class='add'>+MX28_PAD_SSP1_DATA3__GPIO_2_15			0x20f3</div><div class='add'>+MX28_PAD_SSP2_SCK__GPIO_2_16			0x2103</div><div class='add'>+MX28_PAD_SSP2_MOSI__GPIO_2_17			0x2113</div><div class='add'>+MX28_PAD_SSP2_MISO__GPIO_2_18			0x2123</div><div class='add'>+MX28_PAD_SSP2_SS0__GPIO_2_19			0x2133</div><div class='add'>+MX28_PAD_SSP2_SS1__GPIO_2_20			0x2143</div><div class='add'>+MX28_PAD_SSP2_SS2__GPIO_2_21			0x2153</div><div class='add'>+MX28_PAD_SSP3_SCK__GPIO_2_24			0x2183</div><div class='add'>+MX28_PAD_SSP3_MOSI__GPIO_2_25			0x2193</div><div class='add'>+MX28_PAD_SSP3_MISO__GPIO_2_26			0x21a3</div><div class='add'>+MX28_PAD_SSP3_SS0__GPIO_2_27			0x21b3</div><div class='add'>+MX28_PAD_AUART0_RX__GPIO_3_0			0x3003</div><div class='add'>+MX28_PAD_AUART0_TX__GPIO_3_1			0x3013</div><div class='add'>+MX28_PAD_AUART0_CTS__GPIO_3_2			0x3023</div><div class='add'>+MX28_PAD_AUART0_RTS__GPIO_3_3			0x3033</div><div class='add'>+MX28_PAD_AUART1_RX__GPIO_3_4			0x3043</div><div class='add'>+MX28_PAD_AUART1_TX__GPIO_3_5			0x3053</div><div class='add'>+MX28_PAD_AUART1_CTS__GPIO_3_6			0x3063</div><div class='add'>+MX28_PAD_AUART1_RTS__GPIO_3_7			0x3073</div><div class='add'>+MX28_PAD_AUART2_RX__GPIO_3_8			0x3083</div><div class='add'>+MX28_PAD_AUART2_TX__GPIO_3_9			0x3093</div><div class='add'>+MX28_PAD_AUART2_CTS__GPIO_3_10			0x30a3</div><div class='add'>+MX28_PAD_AUART2_RTS__GPIO_3_11			0x30b3</div><div class='add'>+MX28_PAD_AUART3_RX__GPIO_3_12			0x30c3</div><div class='add'>+MX28_PAD_AUART3_TX__GPIO_3_13			0x30d3</div><div class='add'>+MX28_PAD_AUART3_CTS__GPIO_3_14			0x30e3</div><div class='add'>+MX28_PAD_AUART3_RTS__GPIO_3_15			0x30f3</div><div class='add'>+MX28_PAD_PWM0__GPIO_3_16			0x3103</div><div class='add'>+MX28_PAD_PWM1__GPIO_3_17			0x3113</div><div class='add'>+MX28_PAD_PWM2__GPIO_3_18			0x3123</div><div class='add'>+MX28_PAD_SAIF0_MCLK__GPIO_3_20			0x3143</div><div class='add'>+MX28_PAD_SAIF0_LRCLK__GPIO_3_21			0x3153</div><div class='add'>+MX28_PAD_SAIF0_BITCLK__GPIO_3_22		0x3163</div><div class='add'>+MX28_PAD_SAIF0_SDATA0__GPIO_3_23		0x3173</div><div class='add'>+MX28_PAD_I2C0_SCL__GPIO_3_24			0x3183</div><div class='add'>+MX28_PAD_I2C0_SDA__GPIO_3_25			0x3193</div><div class='add'>+MX28_PAD_SAIF1_SDATA0__GPIO_3_26		0x31a3</div><div class='add'>+MX28_PAD_SPDIF__GPIO_3_27			0x31b3</div><div class='add'>+MX28_PAD_PWM3__GPIO_3_28			0x31c3</div><div class='add'>+MX28_PAD_PWM4__GPIO_3_29			0x31d3</div><div class='add'>+MX28_PAD_LCD_RESET__GPIO_3_30			0x31e3</div><div class='add'>+MX28_PAD_ENET0_MDC__GPIO_4_0			0x4003</div><div class='add'>+MX28_PAD_ENET0_MDIO__GPIO_4_1			0x4013</div><div class='add'>+MX28_PAD_ENET0_RX_EN__GPIO_4_2			0x4023</div><div class='add'>+MX28_PAD_ENET0_RXD0__GPIO_4_3			0x4033</div><div class='add'>+MX28_PAD_ENET0_RXD1__GPIO_4_4			0x4043</div><div class='add'>+MX28_PAD_ENET0_TX_CLK__GPIO_4_5			0x4053</div><div class='add'>+MX28_PAD_ENET0_TX_EN__GPIO_4_6			0x4063</div><div class='add'>+MX28_PAD_ENET0_TXD0__GPIO_4_7			0x4073</div><div class='add'>+MX28_PAD_ENET0_TXD1__GPIO_4_8			0x4083</div><div class='add'>+MX28_PAD_ENET0_RXD2__GPIO_4_9			0x4093</div><div class='add'>+MX28_PAD_ENET0_RXD3__GPIO_4_10			0x40a3</div><div class='add'>+MX28_PAD_ENET0_TXD2__GPIO_4_11			0x40b3</div><div class='add'>+MX28_PAD_ENET0_TXD3__GPIO_4_12			0x40c3</div><div class='add'>+MX28_PAD_ENET0_RX_CLK__GPIO_4_13		0x40d3</div><div class='add'>+MX28_PAD_ENET0_COL__GPIO_4_14			0x40e3</div><div class='add'>+MX28_PAD_ENET0_CRS__GPIO_4_15			0x40f3</div><div class='add'>+MX28_PAD_ENET_CLK__GPIO_4_16			0x4103</div><div class='add'>+MX28_PAD_JTAG_RTCK__GPIO_4_20			0x4143</div><div class='add'>+</div><div class='add'>+Valid values for i.MX23 pinmux-id:</div><div class='add'>+</div><div class='add'>+pinmux						id</div><div class='add'>+------						--</div><div class='add'>+MX23_PAD_GPMI_D00__GPMI_D00			0x0000</div><div class='add'>+MX23_PAD_GPMI_D01__GPMI_D01			0x0010</div><div class='add'>+MX23_PAD_GPMI_D02__GPMI_D02			0x0020</div><div class='add'>+MX23_PAD_GPMI_D03__GPMI_D03			0x0030</div><div class='add'>+MX23_PAD_GPMI_D04__GPMI_D04			0x0040</div><div class='add'>+MX23_PAD_GPMI_D05__GPMI_D05			0x0050</div><div class='add'>+MX23_PAD_GPMI_D06__GPMI_D06			0x0060</div><div class='add'>+MX23_PAD_GPMI_D07__GPMI_D07			0x0070</div><div class='add'>+MX23_PAD_GPMI_D08__GPMI_D08			0x0080</div><div class='add'>+MX23_PAD_GPMI_D09__GPMI_D09			0x0090</div><div class='add'>+MX23_PAD_GPMI_D10__GPMI_D10			0x00a0</div><div class='add'>+MX23_PAD_GPMI_D11__GPMI_D11			0x00b0</div><div class='add'>+MX23_PAD_GPMI_D12__GPMI_D12			0x00c0</div><div class='add'>+MX23_PAD_GPMI_D13__GPMI_D13			0x00d0</div><div class='add'>+MX23_PAD_GPMI_D14__GPMI_D14			0x00e0</div><div class='add'>+MX23_PAD_GPMI_D15__GPMI_D15			0x00f0</div><div class='add'>+MX23_PAD_GPMI_CLE__GPMI_CLE			0x0100</div><div class='add'>+MX23_PAD_GPMI_ALE__GPMI_ALE			0x0110</div><div class='add'>+MX23_PAD_GPMI_CE2N__GPMI_CE2N			0x0120</div><div class='add'>+MX23_PAD_GPMI_RDY0__GPMI_RDY0			0x0130</div><div class='add'>+MX23_PAD_GPMI_RDY1__GPMI_RDY1			0x0140</div><div class='add'>+MX23_PAD_GPMI_RDY2__GPMI_RDY2			0x0150</div><div class='add'>+MX23_PAD_GPMI_RDY3__GPMI_RDY3			0x0160</div><div class='add'>+MX23_PAD_GPMI_WPN__GPMI_WPN			0x0170</div><div class='add'>+MX23_PAD_GPMI_WRN__GPMI_WRN			0x0180</div><div class='add'>+MX23_PAD_GPMI_RDN__GPMI_RDN			0x0190</div><div class='add'>+MX23_PAD_AUART1_CTS__AUART1_CTS			0x01a0</div><div class='add'>+MX23_PAD_AUART1_RTS__AUART1_RTS			0x01b0</div><div class='add'>+MX23_PAD_AUART1_RX__AUART1_RX			0x01c0</div><div class='add'>+MX23_PAD_AUART1_TX__AUART1_TX			0x01d0</div><div class='add'>+MX23_PAD_I2C_SCL__I2C_SCL			0x01e0</div><div class='add'>+MX23_PAD_I2C_SDA__I2C_SDA			0x01f0</div><div class='add'>+MX23_PAD_LCD_D00__LCD_D00			0x1000</div><div class='add'>+MX23_PAD_LCD_D01__LCD_D01			0x1010</div><div class='add'>+MX23_PAD_LCD_D02__LCD_D02			0x1020</div><div class='add'>+MX23_PAD_LCD_D03__LCD_D03			0x1030</div><div class='add'>+MX23_PAD_LCD_D04__LCD_D04			0x1040</div><div class='add'>+MX23_PAD_LCD_D05__LCD_D05			0x1050</div><div class='add'>+MX23_PAD_LCD_D06__LCD_D06			0x1060</div><div class='add'>+MX23_PAD_LCD_D07__LCD_D07			0x1070</div><div class='add'>+MX23_PAD_LCD_D08__LCD_D08			0x1080</div><div class='add'>+MX23_PAD_LCD_D09__LCD_D09			0x1090</div><div class='add'>+MX23_PAD_LCD_D10__LCD_D10			0x10a0</div><div class='add'>+MX23_PAD_LCD_D11__LCD_D11			0x10b0</div><div class='add'>+MX23_PAD_LCD_D12__LCD_D12			0x10c0</div><div class='add'>+MX23_PAD_LCD_D13__LCD_D13			0x10d0</div><div class='add'>+MX23_PAD_LCD_D14__LCD_D14			0x10e0</div><div class='add'>+MX23_PAD_LCD_D15__LCD_D15			0x10f0</div><div class='add'>+MX23_PAD_LCD_D16__LCD_D16			0x1100</div><div class='add'>+MX23_PAD_LCD_D17__LCD_D17			0x1110</div><div class='add'>+MX23_PAD_LCD_RESET__LCD_RESET			0x1120</div><div class='add'>+MX23_PAD_LCD_RS__LCD_RS				0x1130</div><div class='add'>+MX23_PAD_LCD_WR__LCD_WR				0x1140</div><div class='add'>+MX23_PAD_LCD_CS__LCD_CS				0x1150</div><div class='add'>+MX23_PAD_LCD_DOTCK__LCD_DOTCK			0x1160</div><div class='add'>+MX23_PAD_LCD_ENABLE__LCD_ENABLE			0x1170</div><div class='add'>+MX23_PAD_LCD_HSYNC__LCD_HSYNC			0x1180</div><div class='add'>+MX23_PAD_LCD_VSYNC__LCD_VSYNC			0x1190</div><div class='add'>+MX23_PAD_PWM0__PWM0				0x11a0</div><div class='add'>+MX23_PAD_PWM1__PWM1				0x11b0</div><div class='add'>+MX23_PAD_PWM2__PWM2				0x11c0</div><div class='add'>+MX23_PAD_PWM3__PWM3				0x11d0</div><div class='add'>+MX23_PAD_PWM4__PWM4				0x11e0</div><div class='add'>+MX23_PAD_SSP1_CMD__SSP1_CMD			0x2000</div><div class='add'>+MX23_PAD_SSP1_DETECT__SSP1_DETECT		0x2010</div><div class='add'>+MX23_PAD_SSP1_DATA0__SSP1_DATA0			0x2020</div><div class='add'>+MX23_PAD_SSP1_DATA1__SSP1_DATA1			0x2030</div><div class='add'>+MX23_PAD_SSP1_DATA2__SSP1_DATA2			0x2040</div><div class='add'>+MX23_PAD_SSP1_DATA3__SSP1_DATA3			0x2050</div><div class='add'>+MX23_PAD_SSP1_SCK__SSP1_SCK			0x2060</div><div class='add'>+MX23_PAD_ROTARYA__ROTARYA			0x2070</div><div class='add'>+MX23_PAD_ROTARYB__ROTARYB			0x2080</div><div class='add'>+MX23_PAD_EMI_A00__EMI_A00			0x2090</div><div class='add'>+MX23_PAD_EMI_A01__EMI_A01			0x20a0</div><div class='add'>+MX23_PAD_EMI_A02__EMI_A02			0x20b0</div><div class='add'>+MX23_PAD_EMI_A03__EMI_A03			0x20c0</div><div class='add'>+MX23_PAD_EMI_A04__EMI_A04			0x20d0</div><div class='add'>+MX23_PAD_EMI_A05__EMI_A05			0x20e0</div><div class='add'>+MX23_PAD_EMI_A06__EMI_A06			0x20f0</div><div class='add'>+MX23_PAD_EMI_A07__EMI_A07			0x2100</div><div class='add'>+MX23_PAD_EMI_A08__EMI_A08			0x2110</div><div class='add'>+MX23_PAD_EMI_A09__EMI_A09			0x2120</div><div class='add'>+MX23_PAD_EMI_A10__EMI_A10			0x2130</div><div class='add'>+MX23_PAD_EMI_A11__EMI_A11			0x2140</div><div class='add'>+MX23_PAD_EMI_A12__EMI_A12			0x2150</div><div class='add'>+MX23_PAD_EMI_BA0__EMI_BA0			0x2160</div><div class='add'>+MX23_PAD_EMI_BA1__EMI_BA1			0x2170</div><div class='add'>+MX23_PAD_EMI_CASN__EMI_CASN			0x2180</div><div class='add'>+MX23_PAD_EMI_CE0N__EMI_CE0N			0x2190</div><div class='add'>+MX23_PAD_EMI_CE1N__EMI_CE1N			0x21a0</div><div class='add'>+MX23_PAD_GPMI_CE1N__GPMI_CE1N			0x21b0</div><div class='add'>+MX23_PAD_GPMI_CE0N__GPMI_CE0N			0x21c0</div><div class='add'>+MX23_PAD_EMI_CKE__EMI_CKE			0x21d0</div><div class='add'>+MX23_PAD_EMI_RASN__EMI_RASN			0x21e0</div><div class='add'>+MX23_PAD_EMI_WEN__EMI_WEN			0x21f0</div><div class='add'>+MX23_PAD_EMI_D00__EMI_D00			0x3000</div><div class='add'>+MX23_PAD_EMI_D01__EMI_D01			0x3010</div><div class='add'>+MX23_PAD_EMI_D02__EMI_D02			0x3020</div><div class='add'>+MX23_PAD_EMI_D03__EMI_D03			0x3030</div><div class='add'>+MX23_PAD_EMI_D04__EMI_D04			0x3040</div><div class='add'>+MX23_PAD_EMI_D05__EMI_D05			0x3050</div><div class='add'>+MX23_PAD_EMI_D06__EMI_D06			0x3060</div><div class='add'>+MX23_PAD_EMI_D07__EMI_D07			0x3070</div><div class='add'>+MX23_PAD_EMI_D08__EMI_D08			0x3080</div><div class='add'>+MX23_PAD_EMI_D09__EMI_D09			0x3090</div><div class='add'>+MX23_PAD_EMI_D10__EMI_D10			0x30a0</div><div class='add'>+MX23_PAD_EMI_D11__EMI_D11			0x30b0</div><div class='add'>+MX23_PAD_EMI_D12__EMI_D12			0x30c0</div><div class='add'>+MX23_PAD_EMI_D13__EMI_D13			0x30d0</div><div class='add'>+MX23_PAD_EMI_D14__EMI_D14			0x30e0</div><div class='add'>+MX23_PAD_EMI_D15__EMI_D15			0x30f0</div><div class='add'>+MX23_PAD_EMI_DQM0__EMI_DQM0			0x3100</div><div class='add'>+MX23_PAD_EMI_DQM1__EMI_DQM1			0x3110</div><div class='add'>+MX23_PAD_EMI_DQS0__EMI_DQS0			0x3120</div><div class='add'>+MX23_PAD_EMI_DQS1__EMI_DQS1			0x3130</div><div class='add'>+MX23_PAD_EMI_CLK__EMI_CLK			0x3140</div><div class='add'>+MX23_PAD_EMI_CLKN__EMI_CLKN			0x3150</div><div class='add'>+MX23_PAD_GPMI_D00__LCD_D8			0x0001</div><div class='add'>+MX23_PAD_GPMI_D01__LCD_D9			0x0011</div><div class='add'>+MX23_PAD_GPMI_D02__LCD_D10			0x0021</div><div class='add'>+MX23_PAD_GPMI_D03__LCD_D11			0x0031</div><div class='add'>+MX23_PAD_GPMI_D04__LCD_D12			0x0041</div><div class='add'>+MX23_PAD_GPMI_D05__LCD_D13			0x0051</div><div class='add'>+MX23_PAD_GPMI_D06__LCD_D14			0x0061</div><div class='add'>+MX23_PAD_GPMI_D07__LCD_D15			0x0071</div><div class='add'>+MX23_PAD_GPMI_D08__LCD_D18			0x0081</div><div class='add'>+MX23_PAD_GPMI_D09__LCD_D19			0x0091</div><div class='add'>+MX23_PAD_GPMI_D10__LCD_D20			0x00a1</div><div class='add'>+MX23_PAD_GPMI_D11__LCD_D21			0x00b1</div><div class='add'>+MX23_PAD_GPMI_D12__LCD_D22			0x00c1</div><div class='add'>+MX23_PAD_GPMI_D13__LCD_D23			0x00d1</div><div class='add'>+MX23_PAD_GPMI_D14__AUART2_RX			0x00e1</div><div class='add'>+MX23_PAD_GPMI_D15__AUART2_TX			0x00f1</div><div class='add'>+MX23_PAD_GPMI_CLE__LCD_D16			0x0101</div><div class='add'>+MX23_PAD_GPMI_ALE__LCD_D17			0x0111</div><div class='add'>+MX23_PAD_GPMI_CE2N__ATA_A2			0x0121</div><div class='add'>+MX23_PAD_AUART1_RTS__IR_CLK			0x01b1</div><div class='add'>+MX23_PAD_AUART1_RX__IR_RX			0x01c1</div><div class='add'>+MX23_PAD_AUART1_TX__IR_TX			0x01d1</div><div class='add'>+MX23_PAD_I2C_SCL__GPMI_RDY2			0x01e1</div><div class='add'>+MX23_PAD_I2C_SDA__GPMI_CE2N			0x01f1</div><div class='add'>+MX23_PAD_LCD_D00__ETM_DA8			0x1001</div><div class='add'>+MX23_PAD_LCD_D01__ETM_DA9			0x1011</div><div class='add'>+MX23_PAD_LCD_D02__ETM_DA10			0x1021</div><div class='add'>+MX23_PAD_LCD_D03__ETM_DA11			0x1031</div><div class='add'>+MX23_PAD_LCD_D04__ETM_DA12			0x1041</div><div class='add'>+MX23_PAD_LCD_D05__ETM_DA13			0x1051</div><div class='add'>+MX23_PAD_LCD_D06__ETM_DA14			0x1061</div><div class='add'>+MX23_PAD_LCD_D07__ETM_DA15			0x1071</div><div class='add'>+MX23_PAD_LCD_D08__ETM_DA0			0x1081</div><div class='add'>+MX23_PAD_LCD_D09__ETM_DA1			0x1091</div><div class='add'>+MX23_PAD_LCD_D10__ETM_DA2			0x10a1</div><div class='add'>+MX23_PAD_LCD_D11__ETM_DA3			0x10b1</div><div class='add'>+MX23_PAD_LCD_D12__ETM_DA4			0x10c1</div><div class='add'>+MX23_PAD_LCD_D13__ETM_DA5			0x10d1</div><div class='add'>+MX23_PAD_LCD_D14__ETM_DA6			0x10e1</div><div class='add'>+MX23_PAD_LCD_D15__ETM_DA7			0x10f1</div><div class='add'>+MX23_PAD_LCD_RESET__ETM_TCTL			0x1121</div><div class='add'>+MX23_PAD_LCD_RS__ETM_TCLK			0x1131</div><div class='add'>+MX23_PAD_LCD_DOTCK__GPMI_RDY3			0x1161</div><div class='add'>+MX23_PAD_LCD_ENABLE__I2C_SCL			0x1171</div><div class='add'>+MX23_PAD_LCD_HSYNC__I2C_SDA			0x1181</div><div class='add'>+MX23_PAD_LCD_VSYNC__LCD_BUSY			0x1191</div><div class='add'>+MX23_PAD_PWM0__ROTARYA				0x11a1</div><div class='add'>+MX23_PAD_PWM1__ROTARYB				0x11b1</div><div class='add'>+MX23_PAD_PWM2__GPMI_RDY3			0x11c1</div><div class='add'>+MX23_PAD_PWM3__ETM_TCTL				0x11d1</div><div class='add'>+MX23_PAD_PWM4__ETM_TCLK				0x11e1</div><div class='add'>+MX23_PAD_SSP1_DETECT__GPMI_CE3N			0x2011</div><div class='add'>+MX23_PAD_SSP1_DATA1__I2C_SCL			0x2031</div><div class='add'>+MX23_PAD_SSP1_DATA2__I2C_SDA			0x2041</div><div class='add'>+MX23_PAD_ROTARYA__AUART2_RTS			0x2071</div><div class='add'>+MX23_PAD_ROTARYB__AUART2_CTS			0x2081</div><div class='add'>+MX23_PAD_GPMI_D00__SSP2_DATA0			0x0002</div><div class='add'>+MX23_PAD_GPMI_D01__SSP2_DATA1			0x0012</div><div class='add'>+MX23_PAD_GPMI_D02__SSP2_DATA2			0x0022</div><div class='add'>+MX23_PAD_GPMI_D03__SSP2_DATA3			0x0032</div><div class='add'>+MX23_PAD_GPMI_D04__SSP2_DATA4			0x0042</div><div class='add'>+MX23_PAD_GPMI_D05__SSP2_DATA5			0x0052</div><div class='add'>+MX23_PAD_GPMI_D06__SSP2_DATA6			0x0062</div><div class='add'>+MX23_PAD_GPMI_D07__SSP2_DATA7			0x0072</div><div class='add'>+MX23_PAD_GPMI_D08__SSP1_DATA4			0x0082</div><div class='add'>+MX23_PAD_GPMI_D09__SSP1_DATA5			0x0092</div><div class='add'>+MX23_PAD_GPMI_D10__SSP1_DATA6			0x00a2</div><div class='add'>+MX23_PAD_GPMI_D11__SSP1_DATA7			0x00b2</div><div class='add'>+MX23_PAD_GPMI_D15__GPMI_CE3N			0x00f2</div><div class='add'>+MX23_PAD_GPMI_RDY0__SSP2_DETECT			0x0132</div><div class='add'>+MX23_PAD_GPMI_RDY1__SSP2_CMD			0x0142</div><div class='add'>+MX23_PAD_GPMI_WRN__SSP2_SCK			0x0182</div><div class='add'>+MX23_PAD_AUART1_CTS__SSP1_DATA4			0x01a2</div><div class='add'>+MX23_PAD_AUART1_RTS__SSP1_DATA5			0x01b2</div><div class='add'>+MX23_PAD_AUART1_RX__SSP1_DATA6			0x01c2</div><div class='add'>+MX23_PAD_AUART1_TX__SSP1_DATA7			0x01d2</div><div class='add'>+MX23_PAD_I2C_SCL__AUART1_TX			0x01e2</div><div class='add'>+MX23_PAD_I2C_SDA__AUART1_RX			0x01f2</div><div class='add'>+MX23_PAD_LCD_D08__SAIF2_SDATA0			0x1082</div><div class='add'>+MX23_PAD_LCD_D09__SAIF1_SDATA0			0x1092</div><div class='add'>+MX23_PAD_LCD_D10__SAIF_MCLK_BITCLK		0x10a2</div><div class='add'>+MX23_PAD_LCD_D11__SAIF_LRCLK			0x10b2</div><div class='add'>+MX23_PAD_LCD_D12__SAIF2_SDATA1			0x10c2</div><div class='add'>+MX23_PAD_LCD_D13__SAIF2_SDATA2			0x10d2</div><div class='add'>+MX23_PAD_LCD_D14__SAIF1_SDATA2			0x10e2</div><div class='add'>+MX23_PAD_LCD_D15__SAIF1_SDATA1			0x10f2</div><div class='add'>+MX23_PAD_LCD_D16__SAIF_ALT_BITCLK		0x1102</div><div class='add'>+MX23_PAD_LCD_RESET__GPMI_CE3N			0x1122</div><div class='add'>+MX23_PAD_PWM0__DUART_RX				0x11a2</div><div class='add'>+MX23_PAD_PWM1__DUART_TX				0x11b2</div><div class='add'>+MX23_PAD_PWM3__AUART1_CTS			0x11d2</div><div class='add'>+MX23_PAD_PWM4__AUART1_RTS			0x11e2</div><div class='add'>+MX23_PAD_SSP1_CMD__JTAG_TDO			0x2002</div><div class='add'>+MX23_PAD_SSP1_DETECT__USB_OTG_ID		0x2012</div><div class='add'>+MX23_PAD_SSP1_DATA0__JTAG_TDI			0x2022</div><div class='add'>+MX23_PAD_SSP1_DATA1__JTAG_TCLK			0x2032</div><div class='add'>+MX23_PAD_SSP1_DATA2__JTAG_RTCK			0x2042</div><div class='add'>+MX23_PAD_SSP1_DATA3__JTAG_TMS			0x2052</div><div class='add'>+MX23_PAD_SSP1_SCK__JTAG_TRST			0x2062</div><div class='add'>+MX23_PAD_ROTARYA__SPDIF				0x2072</div><div class='add'>+MX23_PAD_ROTARYB__GPMI_CE3N			0x2082</div><div class='add'>+MX23_PAD_GPMI_D00__GPIO_0_0			0x0003</div><div class='add'>+MX23_PAD_GPMI_D01__GPIO_0_1			0x0013</div><div class='add'>+MX23_PAD_GPMI_D02__GPIO_0_2			0x0023</div><div class='add'>+MX23_PAD_GPMI_D03__GPIO_0_3			0x0033</div><div class='add'>+MX23_PAD_GPMI_D04__GPIO_0_4			0x0043</div><div class='add'>+MX23_PAD_GPMI_D05__GPIO_0_5			0x0053</div><div class='add'>+MX23_PAD_GPMI_D06__GPIO_0_6			0x0063</div><div class='add'>+MX23_PAD_GPMI_D07__GPIO_0_7			0x0073</div><div class='add'>+MX23_PAD_GPMI_D08__GPIO_0_8			0x0083</div><div class='add'>+MX23_PAD_GPMI_D09__GPIO_0_9			0x0093</div><div class='add'>+MX23_PAD_GPMI_D10__GPIO_0_10			0x00a3</div><div class='add'>+MX23_PAD_GPMI_D11__GPIO_0_11			0x00b3</div><div class='add'>+MX23_PAD_GPMI_D12__GPIO_0_12			0x00c3</div><div class='add'>+MX23_PAD_GPMI_D13__GPIO_0_13			0x00d3</div><div class='add'>+MX23_PAD_GPMI_D14__GPIO_0_14			0x00e3</div><div class='add'>+MX23_PAD_GPMI_D15__GPIO_0_15			0x00f3</div><div class='add'>+MX23_PAD_GPMI_CLE__GPIO_0_16			0x0103</div><div class='add'>+MX23_PAD_GPMI_ALE__GPIO_0_17			0x0113</div><div class='add'>+MX23_PAD_GPMI_CE2N__GPIO_0_18			0x0123</div><div class='add'>+MX23_PAD_GPMI_RDY0__GPIO_0_19			0x0133</div><div class='add'>+MX23_PAD_GPMI_RDY1__GPIO_0_20			0x0143</div><div class='add'>+MX23_PAD_GPMI_RDY2__GPIO_0_21			0x0153</div><div class='add'>+MX23_PAD_GPMI_RDY3__GPIO_0_22			0x0163</div><div class='add'>+MX23_PAD_GPMI_WPN__GPIO_0_23			0x0173</div><div class='add'>+MX23_PAD_GPMI_WRN__GPIO_0_24			0x0183</div><div class='add'>+MX23_PAD_GPMI_RDN__GPIO_0_25			0x0193</div><div class='add'>+MX23_PAD_AUART1_CTS__GPIO_0_26			0x01a3</div><div class='add'>+MX23_PAD_AUART1_RTS__GPIO_0_27			0x01b3</div><div class='add'>+MX23_PAD_AUART1_RX__GPIO_0_28			0x01c3</div><div class='add'>+MX23_PAD_AUART1_TX__GPIO_0_29			0x01d3</div><div class='add'>+MX23_PAD_I2C_SCL__GPIO_0_30			0x01e3</div><div class='add'>+MX23_PAD_I2C_SDA__GPIO_0_31			0x01f3</div><div class='add'>+MX23_PAD_LCD_D00__GPIO_1_0			0x1003</div><div class='add'>+MX23_PAD_LCD_D01__GPIO_1_1			0x1013</div><div class='add'>+MX23_PAD_LCD_D02__GPIO_1_2			0x1023</div><div class='add'>+MX23_PAD_LCD_D03__GPIO_1_3			0x1033</div><div class='add'>+MX23_PAD_LCD_D04__GPIO_1_4			0x1043</div><div class='add'>+MX23_PAD_LCD_D05__GPIO_1_5			0x1053</div><div class='add'>+MX23_PAD_LCD_D06__GPIO_1_6			0x1063</div><div class='add'>+MX23_PAD_LCD_D07__GPIO_1_7			0x1073</div><div class='add'>+MX23_PAD_LCD_D08__GPIO_1_8			0x1083</div><div class='add'>+MX23_PAD_LCD_D09__GPIO_1_9			0x1093</div><div class='add'>+MX23_PAD_LCD_D10__GPIO_1_10			0x10a3</div><div class='add'>+MX23_PAD_LCD_D11__GPIO_1_11			0x10b3</div><div class='add'>+MX23_PAD_LCD_D12__GPIO_1_12			0x10c3</div><div class='add'>+MX23_PAD_LCD_D13__GPIO_1_13			0x10d3</div><div class='add'>+MX23_PAD_LCD_D14__GPIO_1_14			0x10e3</div><div class='add'>+MX23_PAD_LCD_D15__GPIO_1_15			0x10f3</div><div class='add'>+MX23_PAD_LCD_D16__GPIO_1_16			0x1103</div><div class='add'>+MX23_PAD_LCD_D17__GPIO_1_17			0x1113</div><div class='add'>+MX23_PAD_LCD_RESET__GPIO_1_18			0x1123</div><div class='add'>+MX23_PAD_LCD_RS__GPIO_1_19			0x1133</div><div class='add'>+MX23_PAD_LCD_WR__GPIO_1_20			0x1143</div><div class='add'>+MX23_PAD_LCD_CS__GPIO_1_21			0x1153</div><div class='add'>+MX23_PAD_LCD_DOTCK__GPIO_1_22			0x1163</div><div class='add'>+MX23_PAD_LCD_ENABLE__GPIO_1_23			0x1173</div><div class='add'>+MX23_PAD_LCD_HSYNC__GPIO_1_24			0x1183</div><div class='add'>+MX23_PAD_LCD_VSYNC__GPIO_1_25			0x1193</div><div class='add'>+MX23_PAD_PWM0__GPIO_1_26			0x11a3</div><div class='add'>+MX23_PAD_PWM1__GPIO_1_27			0x11b3</div><div class='add'>+MX23_PAD_PWM2__GPIO_1_28			0x11c3</div><div class='add'>+MX23_PAD_PWM3__GPIO_1_29			0x11d3</div><div class='add'>+MX23_PAD_PWM4__GPIO_1_30			0x11e3</div><div class='add'>+MX23_PAD_SSP1_CMD__GPIO_2_0			0x2003</div><div class='add'>+MX23_PAD_SSP1_DETECT__GPIO_2_1			0x2013</div><div class='add'>+MX23_PAD_SSP1_DATA0__GPIO_2_2			0x2023</div><div class='add'>+MX23_PAD_SSP1_DATA1__GPIO_2_3			0x2033</div><div class='add'>+MX23_PAD_SSP1_DATA2__GPIO_2_4			0x2043</div><div class='add'>+MX23_PAD_SSP1_DATA3__GPIO_2_5			0x2053</div><div class='add'>+MX23_PAD_SSP1_SCK__GPIO_2_6			0x2063</div><div class='add'>+MX23_PAD_ROTARYA__GPIO_2_7			0x2073</div><div class='add'>+MX23_PAD_ROTARYB__GPIO_2_8			0x2083</div><div class='add'>+MX23_PAD_EMI_A00__GPIO_2_9			0x2093</div><div class='add'>+MX23_PAD_EMI_A01__GPIO_2_10			0x20a3</div><div class='add'>+MX23_PAD_EMI_A02__GPIO_2_11			0x20b3</div><div class='add'>+MX23_PAD_EMI_A03__GPIO_2_12			0x20c3</div><div class='add'>+MX23_PAD_EMI_A04__GPIO_2_13			0x20d3</div><div class='add'>+MX23_PAD_EMI_A05__GPIO_2_14			0x20e3</div><div class='add'>+MX23_PAD_EMI_A06__GPIO_2_15			0x20f3</div><div class='add'>+MX23_PAD_EMI_A07__GPIO_2_16			0x2103</div><div class='add'>+MX23_PAD_EMI_A08__GPIO_2_17			0x2113</div><div class='add'>+MX23_PAD_EMI_A09__GPIO_2_18			0x2123</div><div class='add'>+MX23_PAD_EMI_A10__GPIO_2_19			0x2133</div><div class='add'>+MX23_PAD_EMI_A11__GPIO_2_20			0x2143</div><div class='add'>+MX23_PAD_EMI_A12__GPIO_2_21			0x2153</div><div class='add'>+MX23_PAD_EMI_BA0__GPIO_2_22			0x2163</div><div class='add'>+MX23_PAD_EMI_BA1__GPIO_2_23			0x2173</div><div class='add'>+MX23_PAD_EMI_CASN__GPIO_2_24			0x2183</div><div class='add'>+MX23_PAD_EMI_CE0N__GPIO_2_25			0x2193</div><div class='add'>+MX23_PAD_EMI_CE1N__GPIO_2_26			0x21a3</div><div class='add'>+MX23_PAD_GPMI_CE1N__GPIO_2_27			0x21b3</div><div class='add'>+MX23_PAD_GPMI_CE0N__GPIO_2_28			0x21c3</div><div class='add'>+MX23_PAD_EMI_CKE__GPIO_2_29			0x21d3</div><div class='add'>+MX23_PAD_EMI_RASN__GPIO_2_30			0x21e3</div><div class='add'>+MX23_PAD_EMI_WEN__GPIO_2_31			0x21f3</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt<br/>new file mode 100644<br/>index 000000000000..c8e578263ce2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt</a></div><div class='hunk'>@@ -0,0 +1,132 @@</div><div class='add'>+NVIDIA Tegra20 pinmux controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "nvidia,tegra20-pinmux"</div><div class='add'>+- reg: Should contain the register physical address and length for each of</div><div class='add'>+  the tri-state, mux, pull-up/down, and pad control register sets.</div><div class='add'>+</div><div class='add'>+Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='add'>+common pinctrl bindings used by client devices, including the meaning of the</div><div class='add'>+phrase "pin configuration node".</div><div class='add'>+</div><div class='add'>+Tegra's pin configuration nodes act as a container for an abitrary number of</div><div class='add'>+subnodes. Each of these subnodes represents some desired configuration for a</div><div class='add'>+pin, a group, or a list of pins or groups. This configuration can include the</div><div class='add'>+mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='add'>+parameters, such as pull-up, tristate, drive strength, etc.</div><div class='add'>+</div><div class='add'>+The name of each subnode is not important; all subnodes should be enumerated</div><div class='add'>+and processed purely based on their content.</div><div class='add'>+</div><div class='add'>+Each subnode only affects those parameters that are explicitly listed. In</div><div class='add'>+other words, a subnode that lists a mux function but no pin configuration</div><div class='add'>+parameters implies no information about any pin configuration parameters.</div><div class='add'>+Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='add'>+information about e.g. the mux function or tristate parameter. For this</div><div class='add'>+reason, even seemingly boolean values are actually tristates in this binding:</div><div class='add'>+unspecified, off, or on. Unspecified is represented as an absent property,</div><div class='add'>+and off/on are represented as integer values 0 and 1.</div><div class='add'>+</div><div class='add'>+Required subnode-properties:</div><div class='add'>+- nvidia,pins : An array of strings. Each string contains the name of a pin or</div><div class='add'>+    group. Valid values for these names are listed below.</div><div class='add'>+</div><div class='add'>+Optional subnode-properties:</div><div class='add'>+- nvidia,function: A string containing the name of the function to mux to the</div><div class='add'>+  pin or group. Valid values for function names are listed below. See the Tegra</div><div class='add'>+  TRM to determine which are valid for each pin or group.</div><div class='add'>+- nvidia,pull: Integer, representing the pull-down/up to apply to the pin.</div><div class='add'>+    0: none, 1: down, 2: up.</div><div class='add'>+- nvidia,tristate: Integer.</div><div class='add'>+    0: drive, 1: tristate.</div><div class='add'>+- nvidia,high-speed-mode: Integer. Enable high speed mode the pins.</div><div class='add'>+    0: no, 1: yes.</div><div class='add'>+- nvidia,schmitt: Integer. Enables Schmitt Trigger on the input.</div><div class='add'>+    0: no, 1: yes.</div><div class='add'>+- nvidia,low-power-mode: Integer. Valid values 0-3. 0 is least power, 3 is</div><div class='add'>+    most power. Controls the drive power or current. See "Low Power Mode"</div><div class='add'>+    or "LPMD1" and "LPMD0" in the Tegra TRM.</div><div class='add'>+- nvidia,pull-down-strength: Integer. Controls drive strength. 0 is weakest.</div><div class='add'>+    The range of valid values depends on the pingroup. See "CAL_DRVDN" in the</div><div class='add'>+    Tegra TRM.</div><div class='add'>+- nvidia,pull-up-strength: Integer. Controls drive strength. 0 is weakest.</div><div class='add'>+    The range of valid values depends on the pingroup. See "CAL_DRVUP" in the</div><div class='add'>+    Tegra TRM.</div><div class='add'>+- nvidia,slew-rate-rising: Integer. Controls rising signal slew rate. 0 is</div><div class='add'>+    fastest. The range of valid values depends on the pingroup. See</div><div class='add'>+    "DRVDN_SLWR" in the Tegra TRM.</div><div class='add'>+- nvidia,slew-rate-falling: Integer. Controls falling signal slew rate. 0 is</div><div class='add'>+    fastest. The range of valid values depends on the pingroup. See</div><div class='add'>+    "DRVUP_SLWF" in the Tegra TRM.</div><div class='add'>+</div><div class='add'>+Note that many of these properties are only valid for certain specific pins</div><div class='add'>+or groups. See the Tegra TRM and various pinmux spreadsheets for complete</div><div class='add'>+details regarding which groups support which functionality. The Linux pinctrl</div><div class='add'>+driver may also be a useful reference, since it consolidates, disambiguates,</div><div class='add'>+and corrects data from all those sources.</div><div class='add'>+</div><div class='add'>+Valid values for pin and group names are:</div><div class='add'>+</div><div class='add'>+  mux groups:</div><div class='add'>+</div><div class='add'>+    These all support nvidia,function, nvidia,tristate, and many support</div><div class='add'>+    nvidia,pull.</div><div class='add'>+</div><div class='add'>+    ata, atb, atc, atd, ate, cdev1, cdev2, crtp, csus, dap1, dap2, dap3, dap4,</div><div class='add'>+    ddc, dta, dtb, dtc, dtd, dte, dtf, gma, gmb, gmc, gmd, gme, gpu, gpu7,</div><div class='add'>+    gpv, hdint, i2cp, irrx, irtx, kbca, kbcb, kbcc, kbcd, kbce, kbcf, lcsn,</div><div class='add'>+    ld0, ld1, ld2, ld3, ld4, ld5, ld6, ld7, ld8, ld9, ld10, ld11, ld12, ld13,</div><div class='add'>+    ld14, ld15, ld16, ld17, ldc, ldi, lhp0, lhp1, lhp2, lhs, lm0, lm1, lpp,</div><div class='add'>+    lpw0, lpw1, lpw2, lsc0, lsc1, lsck, lsda, lsdi, lspi, lvp0, lvp1, lvs,</div><div class='add'>+    owc, pmc, pta, rm, sdb, sdc, sdd, sdio1, slxa, slxc, slxd, slxk, spdi,</div><div class='add'>+    spdo, spia, spib, spic, spid, spie, spif, spig, spih, uaa, uab, uac, uad,</div><div class='add'>+    uca, ucb, uda.</div><div class='add'>+</div><div class='add'>+  tristate groups:</div><div class='add'>+</div><div class='add'>+    These only support nvidia,pull.</div><div class='add'>+</div><div class='add'>+    ck32, ddrc, pmca, pmcb, pmcc, pmcd, pmce, xm2c, xm2d, ls, lc, ld17_0,</div><div class='add'>+    ld19_18, ld21_20, ld23_22.</div><div class='add'>+</div><div class='add'>+  drive groups:</div><div class='add'>+</div><div class='add'>+    With some exceptions, these support nvidia,high-speed-mode,</div><div class='add'>+    nvidia,schmitt, nvidia,low-power-mode, nvidia,pull-down-strength,</div><div class='add'>+    nvidia,pull-up-strength, nvidia,slew_rate-rising, nvidia,slew_rate-falling.</div><div class='add'>+</div><div class='add'>+    drive_ao1, drive_ao2, drive_at1, drive_at2, drive_cdev1, drive_cdev2,</div><div class='add'>+    drive_csus, drive_dap1, drive_dap2, drive_dap3, drive_dap4, drive_dbg,</div><div class='add'>+    drive_lcd1, drive_lcd2, drive_sdmmc2, drive_sdmmc3, drive_spi, drive_uaa,</div><div class='add'>+    drive_uab, drive_uart2, drive_uart3, drive_vi1, drive_vi2, drive_xm2a,</div><div class='add'>+    drive_xm2c, drive_xm2d, drive_xm2clk, drive_sdio1, drive_crt, drive_ddc,</div><div class='add'>+    drive_gma, drive_gmb, drive_gmc, drive_gmd, drive_gme, drive_owr,</div><div class='add'>+    drive_uda.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	pinctrl@70000000 {</div><div class='add'>+		compatible = "nvidia,tegra20-pinmux";</div><div class='add'>+		reg = &lt; 0x70000014 0x10    /* Tri-state registers */</div><div class='add'>+			0x70000080 0x20    /* Mux registers */</div><div class='add'>+			0x700000a0 0x14    /* Pull-up/down registers */</div><div class='add'>+			0x70000868 0xa8 &gt;; /* Pad control registers */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Example board file extract:</div><div class='add'>+</div><div class='add'>+	pinctrl@70000000 {</div><div class='add'>+		sdio4_default: sdio4_default {</div><div class='add'>+			atb {</div><div class='add'>+				nvidia,pins = "atb", "gma", "gme";</div><div class='add'>+				nvidia,function = "sdio4";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhci@c8000600 {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdio4_default&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt<br/>new file mode 100644<br/>index 000000000000..c275b70349c1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt</a></div><div class='hunk'>@@ -0,0 +1,132 @@</div><div class='add'>+NVIDIA Tegra30 pinmux controller</div><div class='add'>+</div><div class='add'>+The Tegra30 pinctrl binding is very similar to the Tegra20 pinctrl binding,</div><div class='add'>+as described in nvidia,tegra20-pinmux.txt. In fact, this document assumes</div><div class='add'>+that binding as a baseline, and only documents the differences between the</div><div class='add'>+two bindings.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "nvidia,tegra30-pinmux"</div><div class='add'>+- reg: Should contain the register physical address and length for each of</div><div class='add'>+  the pad control and mux registers.</div><div class='add'>+</div><div class='add'>+Tegra30 adds the following optional properties for pin configuration subnodes:</div><div class='add'>+- nvidia,enable-input: Integer. Enable the pin's input path. 0: no, 1: yes.</div><div class='add'>+- nvidia,open-drain: Integer. Enable open drain mode. 0: no, 1: yes.</div><div class='add'>+- nvidia,lock: Integer. Lock the pin configuration against further changes</div><div class='add'>+    until reset. 0: no, 1: yes.</div><div class='add'>+- nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes.</div><div class='add'>+</div><div class='add'>+As with Tegra20, see the Tegra TRM for complete details regarding which groups</div><div class='add'>+support which functionality.</div><div class='add'>+</div><div class='add'>+Valid values for pin and group names are:</div><div class='add'>+</div><div class='add'>+  per-pin mux groups:</div><div class='add'>+</div><div class='add'>+    These all support nvidia,function, nvidia,tristate, nvidia,pull,</div><div class='add'>+    nvidia,enable-input, nvidia,lock. Some support nvidia,open-drain,</div><div class='add'>+    nvidia,io-reset.</div><div class='add'>+</div><div class='add'>+    clk_32k_out_pa0, uart3_cts_n_pa1, dap2_fs_pa2, dap2_sclk_pa3,</div><div class='add'>+    dap2_din_pa4, dap2_dout_pa5, sdmmc3_clk_pa6, sdmmc3_cmd_pa7, gmi_a17_pb0,</div><div class='add'>+    gmi_a18_pb1, lcd_pwr0_pb2, lcd_pclk_pb3, sdmmc3_dat3_pb4, sdmmc3_dat2_pb5,</div><div class='add'>+    sdmmc3_dat1_pb6, sdmmc3_dat0_pb7, uart3_rts_n_pc0, lcd_pwr1_pc1,</div><div class='add'>+    uart2_txd_pc2, uart2_rxd_pc3, gen1_i2c_scl_pc4, gen1_i2c_sda_pc5,</div><div class='add'>+    lcd_pwr2_pc6, gmi_wp_n_pc7, sdmmc3_dat5_pd0, sdmmc3_dat4_pd1, lcd_dc1_pd2,</div><div class='add'>+    sdmmc3_dat6_pd3, sdmmc3_dat7_pd4, vi_d1_pd5, vi_vsync_pd6, vi_hsync_pd7,</div><div class='add'>+    lcd_d0_pe0, lcd_d1_pe1, lcd_d2_pe2, lcd_d3_pe3, lcd_d4_pe4, lcd_d5_pe5,</div><div class='add'>+    lcd_d6_pe6, lcd_d7_pe7, lcd_d8_pf0, lcd_d9_pf1, lcd_d10_pf2, lcd_d11_pf3,</div><div class='add'>+    lcd_d12_pf4, lcd_d13_pf5, lcd_d14_pf6, lcd_d15_pf7, gmi_ad0_pg0,</div><div class='add'>+    gmi_ad1_pg1, gmi_ad2_pg2, gmi_ad3_pg3, gmi_ad4_pg4, gmi_ad5_pg5,</div><div class='add'>+    gmi_ad6_pg6, gmi_ad7_pg7, gmi_ad8_ph0, gmi_ad9_ph1, gmi_ad10_ph2,</div><div class='add'>+    gmi_ad11_ph3, gmi_ad12_ph4, gmi_ad13_ph5, gmi_ad14_ph6, gmi_ad15_ph7,</div><div class='add'>+    gmi_wr_n_pi0, gmi_oe_n_pi1, gmi_dqs_pi2, gmi_cs6_n_pi3, gmi_rst_n_pi4,</div><div class='add'>+    gmi_iordy_pi5, gmi_cs7_n_pi6, gmi_wait_pi7, gmi_cs0_n_pj0, lcd_de_pj1,</div><div class='add'>+    gmi_cs1_n_pj2, lcd_hsync_pj3, lcd_vsync_pj4, uart2_cts_n_pj5,</div><div class='add'>+    uart2_rts_n_pj6, gmi_a16_pj7, gmi_adv_n_pk0, gmi_clk_pk1, gmi_cs4_n_pk2,</div><div class='add'>+    gmi_cs2_n_pk3, gmi_cs3_n_pk4, spdif_out_pk5, spdif_in_pk6, gmi_a19_pk7,</div><div class='add'>+    vi_d2_pl0, vi_d3_pl1, vi_d4_pl2, vi_d5_pl3, vi_d6_pl4, vi_d7_pl5,</div><div class='add'>+    vi_d8_pl6, vi_d9_pl7, lcd_d16_pm0, lcd_d17_pm1, lcd_d18_pm2, lcd_d19_pm3,</div><div class='add'>+    lcd_d20_pm4, lcd_d21_pm5, lcd_d22_pm6, lcd_d23_pm7, dap1_fs_pn0,</div><div class='add'>+    dap1_din_pn1, dap1_dout_pn2, dap1_sclk_pn3, lcd_cs0_n_pn4, lcd_sdout_pn5,</div><div class='add'>+    lcd_dc0_pn6, hdmi_int_pn7, ulpi_data7_po0, ulpi_data0_po1, ulpi_data1_po2,</div><div class='add'>+    ulpi_data2_po3, ulpi_data3_po4, ulpi_data4_po5, ulpi_data5_po6,</div><div class='add'>+    ulpi_data6_po7, dap3_fs_pp0, dap3_din_pp1, dap3_dout_pp2, dap3_sclk_pp3,</div><div class='add'>+    dap4_fs_pp4, dap4_din_pp5, dap4_dout_pp6, dap4_sclk_pp7, kb_col0_pq0,</div><div class='add'>+    kb_col1_pq1, kb_col2_pq2, kb_col3_pq3, kb_col4_pq4, kb_col5_pq5,</div><div class='add'>+    kb_col6_pq6, kb_col7_pq7, kb_row0_pr0, kb_row1_pr1, kb_row2_pr2,</div><div class='add'>+    kb_row3_pr3, kb_row4_pr4, kb_row5_pr5, kb_row6_pr6, kb_row7_pr7,</div><div class='add'>+    kb_row8_ps0, kb_row9_ps1, kb_row10_ps2, kb_row11_ps3, kb_row12_ps4,</div><div class='add'>+    kb_row13_ps5, kb_row14_ps6, kb_row15_ps7, vi_pclk_pt0, vi_mclk_pt1,</div><div class='add'>+    vi_d10_pt2, vi_d11_pt3, vi_d0_pt4, gen2_i2c_scl_pt5, gen2_i2c_sda_pt6,</div><div class='add'>+    sdmmc4_cmd_pt7, pu0, pu1, pu2, pu3, pu4, pu5, pu6, jtag_rtck_pu7, pv0,</div><div class='add'>+    pv1, pv2, pv3, ddc_scl_pv4, ddc_sda_pv5, crt_hsync_pv6, crt_vsync_pv7,</div><div class='add'>+    lcd_cs1_n_pw0, lcd_m1_pw1, spi2_cs1_n_pw2, spi2_cs2_n_pw3, clk1_out_pw4,</div><div class='add'>+    clk2_out_pw5, uart3_txd_pw6, uart3_rxd_pw7, spi2_mosi_px0, spi2_miso_px1,</div><div class='add'>+    spi2_sck_px2, spi2_cs0_n_px3, spi1_mosi_px4, spi1_sck_px5, spi1_cs0_n_px6,</div><div class='add'>+    spi1_miso_px7, ulpi_clk_py0, ulpi_dir_py1, ulpi_nxt_py2, ulpi_stp_py3,</div><div class='add'>+    sdmmc1_dat3_py4, sdmmc1_dat2_py5, sdmmc1_dat1_py6, sdmmc1_dat0_py7,</div><div class='add'>+    sdmmc1_clk_pz0, sdmmc1_cmd_pz1, lcd_sdin_pz2, lcd_wr_n_pz3, lcd_sck_pz4,</div><div class='add'>+    sys_clk_req_pz5, pwr_i2c_scl_pz6, pwr_i2c_sda_pz7, sdmmc4_dat0_paa0,</div><div class='add'>+    sdmmc4_dat1_paa1, sdmmc4_dat2_paa2, sdmmc4_dat3_paa3, sdmmc4_dat4_paa4,</div><div class='add'>+    sdmmc4_dat5_paa5, sdmmc4_dat6_paa6, sdmmc4_dat7_paa7, pbb0,</div><div class='add'>+    cam_i2c_scl_pbb1, cam_i2c_sda_pbb2, pbb3, pbb4, pbb5, pbb6, pbb7,</div><div class='add'>+    cam_mclk_pcc0, pcc1, pcc2, sdmmc4_rst_n_pcc3, sdmmc4_clk_pcc4,</div><div class='add'>+    clk2_req_pcc5, pex_l2_rst_n_pcc6, pex_l2_clkreq_n_pcc7,</div><div class='add'>+    pex_l0_prsnt_n_pdd0, pex_l0_rst_n_pdd1, pex_l0_clkreq_n_pdd2,</div><div class='add'>+    pex_wake_n_pdd3, pex_l1_prsnt_n_pdd4, pex_l1_rst_n_pdd5,</div><div class='add'>+    pex_l1_clkreq_n_pdd6, pex_l2_prsnt_n_pdd7, clk3_out_pee0, clk3_req_pee1,</div><div class='add'>+    clk1_req_pee2, hdmi_cec_pee3, clk_32k_in, core_pwr_req, cpu_pwr_req, owr,</div><div class='add'>+    pwr_int_n.</div><div class='add'>+</div><div class='add'>+  drive groups:</div><div class='add'>+</div><div class='add'>+    These all support nvidia,pull-down-strength, nvidia,pull-up-strength,</div><div class='add'>+    nvidia,slew_rate-rising, nvidia,slew_rate-falling. Most but not all</div><div class='add'>+    support nvidia,high-speed-mode, nvidia,schmitt, nvidia,low-power-mode.</div><div class='add'>+</div><div class='add'>+    ao1, ao2, at1, at2, at3, at4, at5, cdev1, cdev2, cec, crt, csus, dap1,</div><div class='add'>+    dap2, dap3, dap4, dbg, ddc, dev3, gma, gmb, gmc, gmd, gme, gmf, gmg,</div><div class='add'>+    gmh, gpv, lcd1, lcd2, owr, sdio1, sdio2, sdio3, spi, uaa, uab, uart2,</div><div class='add'>+    uart3, uda, vi1.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	pinctrl@70000000 {</div><div class='add'>+		compatible = "nvidia,tegra30-pinmux";</div><div class='add'>+		reg = &lt; 0x70000868 0xd0     /* Pad control registers */</div><div class='add'>+			0x70003000 0x3e0 &gt;; /* Mux registers */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+Example board file extract:</div><div class='add'>+</div><div class='add'>+	pinctrl@70000000 {</div><div class='add'>+		sdmmc4_default: pinmux {</div><div class='add'>+			sdmmc4_clk_pcc4 {</div><div class='add'>+				nvidia,pins =	"sdmmc4_clk_pcc4",</div><div class='add'>+						"sdmmc4_rst_n_pcc3";</div><div class='add'>+				nvidia,function = "sdmmc4";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc4_dat0_paa0 {</div><div class='add'>+				nvidia,pins =	"sdmmc4_dat0_paa0",</div><div class='add'>+						"sdmmc4_dat1_paa1",</div><div class='add'>+						"sdmmc4_dat2_paa2",</div><div class='add'>+						"sdmmc4_dat3_paa3",</div><div class='add'>+						"sdmmc4_dat4_paa4",</div><div class='add'>+						"sdmmc4_dat5_paa5",</div><div class='add'>+						"sdmmc4_dat6_paa6",</div><div class='add'>+						"sdmmc4_dat7_paa7";</div><div class='add'>+				nvidia,function = "sdmmc4";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhci@78000400 {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;sdmmc4_default&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt<br/>new file mode 100644<br/>index 000000000000..c95ea8278f87<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+== Introduction ==</div><div class='add'>+</div><div class='add'>+Hardware modules that control pin multiplexing or configuration parameters</div><div class='add'>+such as pull-up/down, tri-state, drive-strength etc are designated as pin</div><div class='add'>+controllers. Each pin controller must be represented as a node in device tree,</div><div class='add'>+just like any other hardware module.</div><div class='add'>+</div><div class='add'>+Hardware modules whose signals are affected by pin configuration are</div><div class='add'>+designated client devices. Again, each client device must be represented as a</div><div class='add'>+node in device tree, just like any other hardware module.</div><div class='add'>+</div><div class='add'>+For a client device to operate correctly, certain pin controllers must</div><div class='add'>+set up certain specific pin configurations. Some client devices need a</div><div class='add'>+single static pin configuration, e.g. set up during initialization. Others</div><div class='add'>+need to reconfigure pins at run-time, for example to tri-state pins when the</div><div class='add'>+device is inactive. Hence, each client device can define a set of named</div><div class='add'>+states. The number and names of those states is defined by the client device's</div><div class='add'>+own binding.</div><div class='add'>+</div><div class='add'>+The common pinctrl bindings defined in this file provide an infrastructure</div><div class='add'>+for client device device tree nodes to map those state names to the pin</div><div class='add'>+configuration used by those states.</div><div class='add'>+</div><div class='add'>+Note that pin controllers themselves may also be client devices of themselves.</div><div class='add'>+For example, a pin controller may set up its own "active" state when the</div><div class='add'>+driver loads. This would allow representing a board's static pin configuration</div><div class='add'>+in a single place, rather than splitting it across multiple client device</div><div class='add'>+nodes. The decision to do this or not somewhat rests with the author of</div><div class='add'>+individual board device tree files, and any requirements imposed by the</div><div class='add'>+bindings for the individual client devices in use by that board, i.e. whether</div><div class='add'>+they require certain specific named states for dynamic pin configuration.</div><div class='add'>+</div><div class='add'>+== Pinctrl client devices ==</div><div class='add'>+</div><div class='add'>+For each client device individually, every pin state is assigned an integer</div><div class='add'>+ID. These numbers start at 0, and are contiguous. For each state ID, a unique</div><div class='add'>+property exists to define the pin configuration. Each state may also be</div><div class='add'>+assigned a name. When names are used, another property exists to map from</div><div class='add'>+those names to the integer IDs.</div><div class='add'>+</div><div class='add'>+Each client device's own binding determines the set of states the must be</div><div class='add'>+defined in its device tree node, and whether to define the set of state</div><div class='add'>+IDs that must be provided, or whether to define the set of state names that</div><div class='add'>+must be provided.</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+pinctrl-0:	List of phandles, each pointing at a pin configuration</div><div class='add'>+		node. These referenced pin configuration nodes must be child</div><div class='add'>+		nodes of the pin controller that they configure. Multiple</div><div class='add'>+		entries may exist in this list so that multiple pin</div><div class='add'>+		controllers may be configured, or so that a state may be built</div><div class='add'>+		from multiple nodes for a single pin controller, each</div><div class='add'>+		contributing part of the overall configuration. See the next</div><div class='add'>+		section of this document for details of the format of these</div><div class='add'>+		pin configuration nodes.</div><div class='add'>+</div><div class='add'>+		In some cases, it may be useful to define a state, but for it</div><div class='add'>+		to be empty. This may be required when a common IP block is</div><div class='add'>+		used in an SoC either without a pin controller, or where the</div><div class='add'>+		pin controller does not affect the HW module in question. If</div><div class='add'>+		the binding for that IP block requires certain pin states to</div><div class='add'>+		exist, they must still be defined, but may be left empty.</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+pinctrl-1:	List of phandles, each pointing at a pin configuration</div><div class='add'>+		node within a pin controller.</div><div class='add'>+...</div><div class='add'>+pinctrl-n:	List of phandles, each pointing at a pin configuration</div><div class='add'>+		node within a pin controller.</div><div class='add'>+pinctrl-names:	The list of names to assign states. List entry 0 defines the</div><div class='add'>+		name for integer state ID 0, list entry 1 for state ID 1, and</div><div class='add'>+		so on.</div><div class='add'>+</div><div class='add'>+For example:</div><div class='add'>+</div><div class='add'>+	/* For a client device requiring named states */</div><div class='add'>+	device {</div><div class='add'>+		pinctrl-names = "active", "idle";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_0_node_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;state_1_node_a &amp;state_1_node_b&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* For the same device if using state IDs */</div><div class='add'>+	device {</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_0_node_a&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;state_1_node_a &amp;state_1_node_b&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * For an IP block whose binding supports pin configuration,</div><div class='add'>+	 * but in use on an SoC that doesn't have any pin control hardware</div><div class='add'>+	 */</div><div class='add'>+	device {</div><div class='add'>+		pinctrl-names = "active", "idle";</div><div class='add'>+		pinctrl-0 = &lt;&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+== Pin controller devices ==</div><div class='add'>+</div><div class='add'>+Pin controller devices should contain the pin configuration nodes that client</div><div class='add'>+devices reference.</div><div class='add'>+</div><div class='add'>+For example:</div><div class='add'>+</div><div class='add'>+	pincontroller {</div><div class='add'>+		... /* Standard DT properties for the device itself elided */</div><div class='add'>+</div><div class='add'>+		state_0_node_a {</div><div class='add'>+			...</div><div class='add'>+		};</div><div class='add'>+		state_1_node_a {</div><div class='add'>+			...</div><div class='add'>+		};</div><div class='add'>+		state_1_node_b {</div><div class='add'>+			...</div><div class='add'>+		};</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+The contents of each of those pin configuration child nodes is defined</div><div class='add'>+entirely by the binding for the individual pin controller device. There</div><div class='add'>+exists no common standard for this content.</div><div class='add'>+</div><div class='add'>+The pin configuration nodes need not be direct children of the pin controller</div><div class='add'>+device; they may be grandchildren, for example. Whether this is legal, and</div><div class='add'>+whether there is any interaction between the child and intermediate parent</div><div class='add'>+nodes, is again defined entirely by the binding for the individual pin</div><div class='add'>+controller device.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl_spear.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl_spear.txt<br/>new file mode 100644<br/>index 000000000000..b4480d5c3aca<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinctrl/pinctrl_spear.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/pinctrl/pinctrl_spear.txt</a></div><div class='hunk'>@@ -0,0 +1,155 @@</div><div class='add'>+ST Microelectronics, SPEAr pinmux controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible	: "st,spear300-pinmux"</div><div class='add'>+		: "st,spear310-pinmux"</div><div class='add'>+		: "st,spear320-pinmux"</div><div class='add'>+		: "st,spear1310-pinmux"</div><div class='add'>+		: "st,spear1340-pinmux"</div><div class='add'>+- reg		: Address range of the pinctrl registers</div><div class='add'>+- st,pinmux-mode: Mandatory for SPEAr300 and SPEAr320 and invalid for others.</div><div class='add'>+	- Its values for SPEAr300:</div><div class='add'>+		- NAND_MODE		: &lt;0&gt;</div><div class='add'>+		- NOR_MODE		: &lt;1&gt;</div><div class='add'>+		- PHOTO_FRAME_MODE	: &lt;2&gt;</div><div class='add'>+		- LEND_IP_PHONE_MODE	: &lt;3&gt;</div><div class='add'>+		- HEND_IP_PHONE_MODE	: &lt;4&gt;</div><div class='add'>+		- LEND_WIFI_PHONE_MODE	: &lt;5&gt;</div><div class='add'>+		- HEND_WIFI_PHONE_MODE	: &lt;6&gt;</div><div class='add'>+		- ATA_PABX_WI2S_MODE	: &lt;7&gt;</div><div class='add'>+		- ATA_PABX_I2S_MODE	: &lt;8&gt;</div><div class='add'>+		- CAML_LCDW_MODE	: &lt;9&gt;</div><div class='add'>+		- CAMU_LCD_MODE		: &lt;10&gt;</div><div class='add'>+		- CAMU_WLCD_MODE	: &lt;11&gt;</div><div class='add'>+		- CAML_LCD_MODE		: &lt;12&gt;</div><div class='add'>+	- Its values for SPEAr320:</div><div class='add'>+		- AUTO_NET_SMII_MODE	: &lt;0&gt;</div><div class='add'>+		- AUTO_NET_MII_MODE	: &lt;1&gt;</div><div class='add'>+		- AUTO_EXP_MODE		: &lt;2&gt;</div><div class='add'>+		- SMALL_PRINTERS_MODE	: &lt;3&gt;</div><div class='add'>+		- EXTENDED_MODE		: &lt;4&gt;</div><div class='add'>+</div><div class='add'>+Please refer to pinctrl-bindings.txt in this directory for details of the common</div><div class='add'>+pinctrl bindings used by client devices.</div><div class='add'>+</div><div class='add'>+SPEAr's pinmux nodes act as a container for an abitrary number of subnodes. Each</div><div class='add'>+of these subnodes represents muxing for a pin, a group, or a list of pins or</div><div class='add'>+groups.</div><div class='add'>+</div><div class='add'>+The name of each subnode is not important; all subnodes should be enumerated</div><div class='add'>+and processed purely based on their content.</div><div class='add'>+</div><div class='add'>+Required subnode-properties:</div><div class='add'>+- st,pins : An array of strings. Each string contains the name of a pin or</div><div class='add'>+  group.</div><div class='add'>+- st,function: A string containing the name of the function to mux to the pin or</div><div class='add'>+  group. See the SPEAr's TRM to determine which are valid for each pin or group.</div><div class='add'>+</div><div class='add'>+  Valid values for group and function names can be found from looking at the</div><div class='add'>+  group and function arrays in driver files:</div><div class='add'>+  drivers/pinctrl/spear/pinctrl-spear3*0.c</div><div class='add'>+</div><div class='add'>+Valid values for group names are:</div><div class='add'>+For All SPEAr3xx machines:</div><div class='add'>+	"firda_grp", "i2c0_grp", "ssp_cs_grp", "ssp0_grp", "mii0_grp",</div><div class='add'>+	"gpio0_pin0_grp", "gpio0_pin1_grp", "gpio0_pin2_grp", "gpio0_pin3_grp",</div><div class='add'>+	"gpio0_pin4_grp", "gpio0_pin5_grp", "uart0_ext_grp", "uart0_grp",</div><div class='add'>+	"timer_0_1_grp", timer_0_1_pins, "timer_2_3_grp"</div><div class='add'>+</div><div class='add'>+For SPEAr300 machines:</div><div class='add'>+	"fsmc_2chips_grp", "fsmc_4chips_grp", "clcd_lcdmode_grp",</div><div class='add'>+	"clcd_pfmode_grp", "tdm_grp", "i2c_clk_grp_grp", "caml_grp", "camu_grp",</div><div class='add'>+	"dac_grp", "i2s_grp", "sdhci_4bit_grp", "sdhci_8bit_grp",</div><div class='add'>+	"gpio1_0_to_3_grp", "gpio1_4_to_7_grp"</div><div class='add'>+</div><div class='add'>+For SPEAr310 machines:</div><div class='add'>+	"emi_cs_0_to_5_grp", "uart1_grp", "uart2_grp", "uart3_grp", "uart4_grp",</div><div class='add'>+	"uart5_grp", "fsmc_grp", "rs485_0_grp", "rs485_1_grp", "tdm_grp"</div><div class='add'>+</div><div class='add'>+For SPEAr320 machines:</div><div class='add'>+	"clcd_grp", "emi_grp", "fsmc_8bit_grp", "fsmc_16bit_grp", "spp_grp",</div><div class='add'>+	"sdhci_led_grp", "sdhci_cd_12_grp", "sdhci_cd_51_grp", "i2s_grp",</div><div class='add'>+	"uart1_grp", "uart1_modem_2_to_7_grp", "uart1_modem_31_to_36_grp",</div><div class='add'>+	"uart1_modem_34_to_45_grp", "uart1_modem_80_to_85_grp", "uart2_grp",</div><div class='add'>+	"uart3_8_9_grp", "uart3_15_16_grp", "uart3_41_42_grp",</div><div class='add'>+	"uart3_52_53_grp", "uart3_73_74_grp", "uart3_94_95_grp",</div><div class='add'>+	"uart3_98_99_grp", "uart4_6_7_grp", "uart4_13_14_grp",</div><div class='add'>+	"uart4_39_40_grp", "uart4_71_72_grp", "uart4_92_93_grp",</div><div class='add'>+	"uart4_100_101_grp", "uart5_4_5_grp", "uart5_37_38_grp",</div><div class='add'>+	"uart5_69_70_grp", "uart5_90_91_grp", "uart6_2_3_grp",</div><div class='add'>+	"uart6_88_89_grp", "rs485_grp", "touchscreen_grp", "can0_grp",</div><div class='add'>+	"can1_grp", "pwm0_1_pin_8_9_grp", "pwm0_1_pin_14_15_grp",</div><div class='add'>+	"pwm0_1_pin_30_31_grp", "pwm0_1_pin_37_38_grp", "pwm0_1_pin_42_43_grp",</div><div class='add'>+	"pwm0_1_pin_59_60_grp", "pwm0_1_pin_88_89_grp", "pwm2_pin_7_grp",</div><div class='add'>+	"pwm2_pin_13_grp", "pwm2_pin_29_grp", "pwm2_pin_34_grp",</div><div class='add'>+	"pwm2_pin_41_grp", "pwm2_pin_58_grp", "pwm2_pin_87_grp",</div><div class='add'>+	"pwm3_pin_6_grp", "pwm3_pin_12_grp", "pwm3_pin_28_grp",</div><div class='add'>+	"pwm3_pin_40_grp", "pwm3_pin_57_grp", "pwm3_pin_86_grp",</div><div class='add'>+	"ssp1_17_20_grp", "ssp1_36_39_grp", "ssp1_48_51_grp", "ssp1_65_68_grp",</div><div class='add'>+	"ssp1_94_97_grp", "ssp2_13_16_grp", "ssp2_32_35_grp", "ssp2_44_47_grp",</div><div class='add'>+	"ssp2_61_64_grp", "ssp2_90_93_grp", "mii2_grp", "smii0_1_grp",</div><div class='add'>+	"rmii0_1_grp", "i2c1_8_9_grp", "i2c1_98_99_grp", "i2c2_0_1_grp",</div><div class='add'>+	"i2c2_2_3_grp", "i2c2_19_20_grp", "i2c2_75_76_grp", "i2c2_96_97_grp"</div><div class='add'>+</div><div class='add'>+For SPEAr1310 machines:</div><div class='add'>+	"i2c0_grp", "ssp0_grp", "ssp0_cs0_grp", "ssp0_cs1_2_grp", "i2s0_grp",</div><div class='add'>+	"i2s1_grp", "clcd_grp", "clcd_high_res_grp", "arm_gpio_grp",</div><div class='add'>+	"smi_2_chips_grp", "smi_4_chips_grp", "gmii_grp", "rgmii_grp",</div><div class='add'>+	"smii_0_1_2_grp", "ras_mii_txclk_grp", "nand_8bit_grp",</div><div class='add'>+	"nand_16bit_grp", "nand_4_chips_grp", "keyboard_6x6_grp",</div><div class='add'>+	"keyboard_rowcol6_8_grp", "uart0_grp", "uart0_modem_grp",</div><div class='add'>+	"gpt0_tmr0_grp", "gpt0_tmr1_grp", "gpt1_tmr0_grp", "gpt1_tmr1_grp",</div><div class='add'>+	"sdhci_grp", "cf_grp", "xd_grp", "touch_xy_grp",</div><div class='add'>+	"uart1_disable_i2c_grp", "uart1_disable_sd_grp", "uart2_3_grp",</div><div class='add'>+	"uart4_grp", "uart5_grp", "rs485_0_1_tdm_0_1_grp", "i2c_1_2_grp",</div><div class='add'>+	"i2c3_dis_smi_clcd_grp", "i2c3_dis_sd_i2s0_grp", "i2c_4_5_dis_smi_grp",</div><div class='add'>+	"i2c4_dis_sd_grp", "i2c5_dis_sd_grp", "i2c_6_7_dis_kbd_grp",</div><div class='add'>+	"i2c6_dis_sd_grp", "i2c7_dis_sd_grp", "can0_dis_nor_grp",</div><div class='add'>+	"can0_dis_sd_grp", "can1_dis_sd_grp", "can1_dis_kbd_grp", "pcie0_grp",</div><div class='add'>+	"pcie1_grp", "pcie2_grp", "sata0_grp", "sata1_grp", "sata2_grp",</div><div class='add'>+	"ssp1_dis_kbd_grp", "ssp1_dis_sd_grp", "gpt64_grp"</div><div class='add'>+</div><div class='add'>+For SPEAr1340 machines:</div><div class='add'>+	"pads_as_gpio_grp", "fsmc_8bit_grp", "fsmc_16bit_grp", "fsmc_pnor_grp",</div><div class='add'>+	"keyboard_row_col_grp", "keyboard_col5_grp", "spdif_in_grp",</div><div class='add'>+	"spdif_out_grp", "gpt_0_1_grp", "pwm0_grp", "pwm1_grp", "pwm2_grp",</div><div class='add'>+	"pwm3_grp", "vip_mux_grp", "vip_mux_cam0_grp", "vip_mux_cam1_grp",</div><div class='add'>+	"vip_mux_cam2_grp", "vip_mux_cam3_grp", "cam0_grp", "cam1_grp",</div><div class='add'>+	"cam2_grp", "cam3_grp", "smi_grp", "ssp0_grp", "ssp0_cs1_grp",</div><div class='add'>+	"ssp0_cs2_grp", "ssp0_cs3_grp", "uart0_grp", "uart0_enh_grp",</div><div class='add'>+	"uart1_grp", "i2s_in_grp", "i2s_out_grp", "gmii_grp", "rgmii_grp",</div><div class='add'>+	"rmii_grp", "sgmii_grp", "i2c0_grp", "i2c1_grp", "cec0_grp", "cec1_grp",</div><div class='add'>+	"sdhci_grp", "cf_grp", "xd_grp", "clcd_grp", "arm_trace_grp",</div><div class='add'>+	"miphy_dbg_grp", "pcie_grp", "sata_grp"</div><div class='add'>+</div><div class='add'>+Valid values for function names are:</div><div class='add'>+For All SPEAr3xx machines:</div><div class='add'>+	"firda", "i2c0", "ssp_cs", "ssp0", "mii0", "gpio0", "uart0_ext",</div><div class='add'>+	"uart0", "timer_0_1", "timer_2_3"</div><div class='add'>+</div><div class='add'>+For SPEAr300 machines:</div><div class='add'>+	"fsmc", "clcd", "tdm", "i2c1", "cam", "dac", "i2s", "sdhci", "gpio1"</div><div class='add'>+</div><div class='add'>+For SPEAr310 machines:</div><div class='add'>+	"emi", "uart1", "uart2", "uart3", "uart4", "uart5", "fsmc", "rs485_0",</div><div class='add'>+	"rs485_1", "tdm"</div><div class='add'>+</div><div class='add'>+For SPEAr320 machines:</div><div class='add'>+	"clcd", "emi", "fsmc", "spp", "sdhci", "i2s", "uart1", "uart1_modem",</div><div class='add'>+	"uart2", "uart3", "uart4", "uart5", "uart6", "rs485", "touchscreen",</div><div class='add'>+	"can0", "can1", "pwm0_1", "pwm2", "pwm3", "ssp1", "ssp2", "mii2",</div><div class='add'>+	"mii0_1", "i2c1", "i2c2"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+For SPEAr1310 machines:</div><div class='add'>+	"i2c0", "ssp0", "i2s0", "i2s1", "clcd", "arm_gpio", "smi", "gmii",</div><div class='add'>+	"rgmii", "smii_0_1_2", "ras_mii_txclk", "nand", "keyboard", "uart0",</div><div class='add'>+	"gpt0", "gpt1", "sdhci", "cf", "xd", "touchscreen", "uart1", "uart2_3",</div><div class='add'>+	"uart4", "uart5", "rs485_0_1_tdm_0_1", "i2c_1_2", "i2c3_i2s1",</div><div class='add'>+	"i2c_4_5", "i2c_6_7", "can0", "can1", "pci", "sata", "ssp1", "gpt64"</div><div class='add'>+</div><div class='add'>+For SPEAr1340 machines:</div><div class='add'>+	"pads_as_gpio", "fsmc", "keyboard", "spdif_in", "spdif_out", "gpt_0_1",</div><div class='add'>+	"pwm", "vip", "cam0", "cam1", "cam2", "cam3", "smi", "ssp0", "uart0",</div><div class='add'>+	"uart1", "i2s", "gmac", "i2c0", "i2c1", "cec0", "cec1", "sdhci", "cf",</div><div class='add'>+	"xd", "clcd", "arm_trace", "miphy_dbg", "pcie", "sata"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt b/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt<br/>deleted file mode 100644<br/>index 36f82dbdd14d..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,5 +0,0 @@</div><div class='del'>-NVIDIA Tegra 2 pinmux controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : "nvidia,tegra20-pinmux"</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/fixed-regulator.txt b/Documentation/devicetree/bindings/regulator/fixed-regulator.txt<br/>index 9cf57fd042d2..2f5b6b1ba15f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/regulator/fixed-regulator.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/regulator/fixed-regulator.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/regulator/fixed-regulator.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/regulator/fixed-regulator.txt</a></div><div class='hunk'>@@ -8,6 +8,8 @@ Optional properties:</div><div class='ctx'> - startup-delay-us: startup time in microseconds</div><div class='ctx'> - enable-active-high: Polarity of GPIO is Active high</div><div class='ctx'> If this property is missing, the default assumed is Active low.</div><div class='add'>+- gpio-open-drain: GPIO is open drain type.</div><div class='add'>+  If this property is missing then default assumption is false.</div><div class='ctx'> </div><div class='ctx'> Any property defined as part of the core regulator</div><div class='ctx'> binding, defined in regulator.txt, can also be used.</div><div class='hunk'>@@ -25,5 +27,6 @@ Example:</div><div class='ctx'> 		gpio = &lt;&amp;gpio1 16 0&gt;;</div><div class='ctx'> 		startup-delay-us = &lt;70000&gt;;</div><div class='ctx'> 		enable-active-high;</div><div class='del'>-		regulator-boot-on</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+		gpio-open-drain;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/tps62360-regulator.txt b/Documentation/devicetree/bindings/regulator/tps62360-regulator.txt<br/>new file mode 100644<br/>index 000000000000..c8ca6b8f6582<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/regulator/tps62360-regulator.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/regulator/tps62360-regulator.txt</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+TPS62360 Voltage regulators</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Must be one of the following.</div><div class='add'>+	"ti,tps62360"</div><div class='add'>+	"ti,tps62361",</div><div class='add'>+	"ti,tps62362",</div><div class='add'>+	"ti,tps62363",</div><div class='add'>+- reg: I2C slave address</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- ti,enable-vout-discharge: Enable output discharge. This is boolean value.</div><div class='add'>+- ti,enable-pull-down: Enable pull down. This is boolean value.</div><div class='add'>+- ti,vsel0-gpio: GPIO for controlling VSEL0 line.</div><div class='add'>+  If this property is missing, then assume that there is no GPIO</div><div class='add'>+  for vsel0 control.</div><div class='add'>+- ti,vsel1-gpio: Gpio for controlling VSEL1 line.</div><div class='add'>+  If this property is missing, then assume that there is no GPIO</div><div class='add'>+  for vsel1 control.</div><div class='add'>+- ti,vsel0-state-high: Inital state of vsel0 input is high.</div><div class='add'>+  If this property is missing, then assume the state as low (0).</div><div class='add'>+- ti,vsel1-state-high: Inital state of vsel1 input is high.</div><div class='add'>+  If this property is missing, then assume the state as low (0).</div><div class='add'>+</div><div class='add'>+Any property defined as part of the core regulator binding, defined in</div><div class='add'>+regulator.txt, can also be used.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	abc: tps62360 {</div><div class='add'>+		compatible = "ti,tps62361";</div><div class='add'>+		reg =  &lt;0x60&gt;;</div><div class='add'>+		regulator-name = "tps62361-vout";</div><div class='add'>+		regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+		regulator-boot-on</div><div class='add'>+		ti,vsel0-gpio = &lt;&amp;gpio1 16 0&gt;;</div><div class='add'>+		ti,vsel1-gpio = &lt;&amp;gpio1 17 0&gt;;</div><div class='add'>+		ti,vsel0-state-high;</div><div class='add'>+		ti,vsel1-state-high;</div><div class='add'>+		ti,enable-pull-down;</div><div class='add'>+		ti,enable-force-pwm;</div><div class='add'>+		ti,enable-vout-discharge;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/tps6586x.txt b/Documentation/devicetree/bindings/regulator/tps6586x.txt<br/>new file mode 100644<br/>index 000000000000..0fcabaa3baa3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/regulator/tps6586x.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/regulator/tps6586x.txt</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+TPS6586x family of regulators</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "ti,tps6586x"</div><div class='add'>+- reg: I2C slave address</div><div class='add'>+- interrupts: the interrupt outputs of the controller</div><div class='add'>+- #gpio-cells: number of cells to describe a GPIO</div><div class='add'>+- gpio-controller: mark the device as a GPIO controller</div><div class='add'>+- regulators: list of regulators provided by this controller, must be named</div><div class='add'>+  after their hardware counterparts: sm[0-2], ldo[0-9] and ldo_rtc</div><div class='add'>+</div><div class='add'>+Each regulator is defined using the standard binding for regulators.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	pmu: tps6586x@34 {</div><div class='add'>+		compatible = "ti,tps6586x";</div><div class='add'>+		reg = &lt;0x34&gt;;</div><div class='add'>+		interrupts = &lt;0 88 0x4&gt;;</div><div class='add'>+</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+</div><div class='add'>+		regulators {</div><div class='add'>+			sm0_reg: sm0 {</div><div class='add'>+				regulator-min-microvolt = &lt; 725000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sm1_reg: sm1 {</div><div class='add'>+				regulator-min-microvolt = &lt; 725000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sm2_reg: sm2 {</div><div class='add'>+				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;4550000&gt;;</div><div class='add'>+				regulator-boot-on;</div><div class='add'>+				regulator-always-on;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo0_reg: ldo0 {</div><div class='add'>+				regulator-name = "PCIE CLK";</div><div class='add'>+				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo1_reg: ldo1 {</div><div class='add'>+				regulator-min-microvolt = &lt; 725000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo2_reg: ldo2 {</div><div class='add'>+				regulator-min-microvolt = &lt; 725000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo3_reg: ldo3 {</div><div class='add'>+				regulator-min-microvolt = &lt;1250000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo4_reg: ldo4 {</div><div class='add'>+				regulator-min-microvolt = &lt;1700000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;2475000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo5_reg: ldo5 {</div><div class='add'>+				regulator-min-microvolt = &lt;1250000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo6_reg: ldo6 {</div><div class='add'>+				regulator-min-microvolt = &lt;1250000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo7_reg: ldo7 {</div><div class='add'>+				regulator-min-microvolt = &lt;1250000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo8_reg: ldo8 {</div><div class='add'>+				regulator-min-microvolt = &lt;1250000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ldo9_reg: ldo9 {</div><div class='add'>+				regulator-min-microvolt = &lt;1250000&gt;;</div><div class='add'>+				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt b/Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt<br/>new file mode 100644<br/>index 000000000000..a87a1e9bc060<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+* NXP LPC32xx SoC Real Time Clock controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: must be "nxp,lpc3220-rtc"</div><div class='add'>+- reg: physical base address of the controller and length of memory mapped</div><div class='add'>+  region.</div><div class='add'>+- interrupts: The RTC interrupt</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	rtc@40024000 {</div><div class='add'>+		compatible = "nxp,lpc3220-rtc";</div><div class='add'>+		reg = &lt;0x40024000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;52 0&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/spear-rtc.txt b/Documentation/devicetree/bindings/rtc/spear-rtc.txt<br/>new file mode 100644<br/>index 000000000000..ca67ac62108e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/rtc/spear-rtc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/rtc/spear-rtc.txt</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+* SPEAr RTC</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "st,spear600-rtc"</div><div class='add'>+- reg : Address range of the rtc registers</div><div class='add'>+- interrupt-parent: Should be the phandle for the interrupt controller</div><div class='add'>+  that services interrupts for this device</div><div class='add'>+- interrupt: Should contain the rtc interrupt number</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	rtc@fc000000 {</div><div class='add'>+		compatible = "st,spear600-rtc";</div><div class='add'>+		reg = &lt;0xfc000000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='add'>+		interrupts = &lt;12&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt b/Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt<br/>new file mode 100644<br/>index 000000000000..e4acdd891e49<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/imx-audio-sgtl5000.txt</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+Freescale i.MX audio complex with SGTL5000 codec</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "fsl,imx-audio-sgtl5000"</div><div class='add'>+- model : The user-visible name of this sound complex</div><div class='add'>+- ssi-controller : The phandle of the i.MX SSI controller</div><div class='add'>+- audio-codec : The phandle of the SGTL5000 audio codec</div><div class='add'>+- audio-routing : A list of the connections between audio components.</div><div class='add'>+  Each entry is a pair of strings, the first being the connection's sink,</div><div class='add'>+  the second being the connection's source. Valid names could be power</div><div class='add'>+  supplies, SGTL5000 pins, and the jacks on the board:</div><div class='add'>+</div><div class='add'>+  Power supplies:</div><div class='add'>+   * Mic Bias</div><div class='add'>+</div><div class='add'>+  SGTL5000 pins:</div><div class='add'>+   * MIC_IN</div><div class='add'>+   * LINE_IN</div><div class='add'>+   * HP_OUT</div><div class='add'>+   * LINE_OUT</div><div class='add'>+</div><div class='add'>+  Board connectors:</div><div class='add'>+   * Mic Jack</div><div class='add'>+   * Line In Jack</div><div class='add'>+   * Headphone Jack</div><div class='add'>+   * Line Out Jack</div><div class='add'>+   * Ext Spk</div><div class='add'>+</div><div class='add'>+- mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)</div><div class='add'>+- mux-ext-port : The external port of the i.MX audio muxer</div><div class='add'>+</div><div class='add'>+Note: The AUDMUX port numbering should start at 1, which is consistent with</div><div class='add'>+hardware manual.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+sound {</div><div class='add'>+	compatible = "fsl,imx51-babbage-sgtl5000",</div><div class='add'>+		     "fsl,imx-audio-sgtl5000";</div><div class='add'>+	model = "imx51-babbage-sgtl5000";</div><div class='add'>+	ssi-controller = &lt;&amp;ssi1&gt;;</div><div class='add'>+	audio-codec = &lt;&amp;sgtl5000&gt;;</div><div class='add'>+	audio-routing =</div><div class='add'>+		"MIC_IN", "Mic Jack",</div><div class='add'>+		"Mic Jack", "Mic Bias",</div><div class='add'>+		"Headphone Jack", "HP_OUT";</div><div class='add'>+	mux-int-port = &lt;1&gt;;</div><div class='add'>+	mux-ext-port = &lt;3&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mxs-audio-sgtl5000.txt b/Documentation/devicetree/bindings/sound/mxs-audio-sgtl5000.txt<br/>new file mode 100644<br/>index 000000000000..601c518eddaa<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/mxs-audio-sgtl5000.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/mxs-audio-sgtl5000.txt</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+* Freescale MXS audio complex with SGTL5000 codec</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "fsl,mxs-audio-sgtl5000"</div><div class='add'>+- model: The user-visible name of this sound complex</div><div class='add'>+- saif-controllers: The phandle list of the MXS SAIF controller</div><div class='add'>+- audio-codec: The phandle of the SGTL5000 audio codec</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+sound {</div><div class='add'>+	compatible = "fsl,imx28-evk-sgtl5000",</div><div class='add'>+		     "fsl,mxs-audio-sgtl5000";</div><div class='add'>+	model = "imx28-evk-sgtl5000";</div><div class='add'>+	saif-controllers = &lt;&amp;saif0 &amp;saif1&gt;;</div><div class='add'>+	audio-codec = &lt;&amp;sgtl5000&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mxs-saif.txt b/Documentation/devicetree/bindings/sound/mxs-saif.txt<br/>new file mode 100644<br/>index 000000000000..c37ba6143d9b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/mxs-saif.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/mxs-saif.txt</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+* Freescale MXS Serial Audio Interface (SAIF)</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be "fsl,&lt;chip&gt;-saif"</div><div class='add'>+- reg: Should contain registers location and length</div><div class='add'>+- interrupts: Should contain ERROR and DMA interrupts</div><div class='add'>+- fsl,saif-dma-channel: APBX DMA channel for the SAIF</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- fsl,saif-master: phandle to the master SAIF.  It's only required for</div><div class='add'>+  the slave SAIF.</div><div class='add'>+</div><div class='add'>+Note: Each SAIF controller should have an alias correctly numbered</div><div class='add'>+in "aliases" node.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+aliases {</div><div class='add'>+	saif0 = &amp;saif0;</div><div class='add'>+	saif1 = &amp;saif1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+saif0: saif@80042000 {</div><div class='add'>+	compatible = "fsl,imx28-saif";</div><div class='add'>+	reg = &lt;0x80042000 2000&gt;;</div><div class='add'>+	interrupts = &lt;59 80&gt;;</div><div class='add'>+	fsl,saif-dma-channel = &lt;4&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+saif1: saif@80046000 {</div><div class='add'>+	compatible = "fsl,imx28-saif";</div><div class='add'>+	reg = &lt;0x80046000 2000&gt;;</div><div class='add'>+	interrupts = &lt;58 81&gt;;</div><div class='add'>+	fsl,saif-dma-channel = &lt;5&gt;;</div><div class='add'>+	fsl,saif-master = &lt;&amp;saif0&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt<br/>new file mode 100644<br/>index 000000000000..1ac7b1642186<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+NVIDIA Tegra30 AHUB (Audio Hub)</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "nvidia,tegra30-ahub"</div><div class='add'>+- reg : Should contain the register physical address and length for each of</div><div class='add'>+  the AHUB's APBIF registers and the AHUB's own registers.</div><div class='add'>+- interrupts : Should contain AHUB interrupt</div><div class='add'>+- nvidia,dma-request-selector : The Tegra DMA controller's phandle and</div><div class='add'>+  request selector for the first APBIF channel.</div><div class='add'>+- ranges : The bus address mapping for the configlink register bus.</div><div class='add'>+  Can be empty since the mapping is 1:1.</div><div class='add'>+- #address-cells : For the configlink bus. Should be &lt;1&gt;;</div><div class='add'>+- #size-cells : For the configlink bus. Should be &lt;1&gt;.</div><div class='add'>+</div><div class='add'>+AHUB client modules need to specify the IDs of their CIFs (Client InterFaces).</div><div class='add'>+For RX CIFs, the numbers indicate the register number within AHUB routing</div><div class='add'>+register space (APBIF 0..3 RX, I2S 0..5 RX, DAM 0..2 RX 0..1, SPDIF RX 0..1).</div><div class='add'>+For TX CIFs, the numbers indicate the bit position within the AHUB routing</div><div class='add'>+registers (APBIF 0..3 TX, I2S 0..5 TX, DAM 0..2 TX, SPDIF TX 0..1).</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+ahub@70080000 {</div><div class='add'>+	compatible = "nvidia,tegra30-ahub";</div><div class='add'>+	reg = &lt;0x70080000 0x200 0x70080200 0x100&gt;;</div><div class='add'>+	interrupts = &lt; 0 103 0x04 &gt;;</div><div class='add'>+	nvidia,dma-request-selector = &lt;&amp;apbdma 1&gt;;</div><div class='add'>+</div><div class='add'>+	ranges;</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt<br/>new file mode 100644<br/>index 000000000000..dfa6c037124a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+NVIDIA Tegra30 I2S controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "nvidia,tegra30-i2s"</div><div class='add'>+- reg : Should contain I2S registers location and length</div><div class='add'>+- nvidia,ahub-cif-ids : The list of AHUB CIF IDs for this port, rx (playback)</div><div class='add'>+  first, tx (capture) second. See nvidia,tegra30-ahub.txt for values.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+i2s@70002800 {</div><div class='add'>+	compatible = "nvidia,tegra30-i2s";</div><div class='add'>+	reg = &lt;0x70080300 0x100&gt;;</div><div class='add'>+	nvidia,ahub-cif-ids = &lt;4 4&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/omap-dmic.txt b/Documentation/devicetree/bindings/sound/omap-dmic.txt<br/>new file mode 100644<br/>index 000000000000..fd8105f18978<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/omap-dmic.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/omap-dmic.txt</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+* Texas Instruments OMAP4+ Digital Microphone Module</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "ti,omap4-dmic"</div><div class='add'>+- reg: Register location and size as an array:</div><div class='add'>+       &lt;MPU access base address, size&gt;,</div><div class='add'>+       &lt;L3 interconnect address, size&gt;;</div><div class='add'>+- interrupts: Interrupt number for DMIC</div><div class='add'>+- interrupt-parent: The parent interrupt controller</div><div class='add'>+- ti,hwmods: Name of the hwmod associated with OMAP dmic IP</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+dmic: dmic@4012e000 {</div><div class='add'>+	compatible = "ti,omap4-dmic";</div><div class='add'>+	reg = &lt;0x4012e000 0x7f&gt;, /* MPU private access */</div><div class='add'>+	      &lt;0x4902e000 0x7f&gt;; /* L3 Interconnect */</div><div class='add'>+	interrupts = &lt;0 114 0x4&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	ti,hwmods = "dmic";</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/omap-mcpdm.txt b/Documentation/devicetree/bindings/sound/omap-mcpdm.txt<br/>new file mode 100644<br/>index 000000000000..0741dff048dd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/omap-mcpdm.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/omap-mcpdm.txt</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+* Texas Instruments OMAP4+ McPDM</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "ti,omap4-mcpdm"</div><div class='add'>+- reg: Register location and size as an array:</div><div class='add'>+       &lt;MPU access base address, size&gt;,</div><div class='add'>+       &lt;L3 interconnect address, size&gt;;</div><div class='add'>+- interrupts: Interrupt number for McPDM</div><div class='add'>+- interrupt-parent: The parent interrupt controller</div><div class='add'>+- ti,hwmods: Name of the hwmod associated to the McPDM</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+mcpdm: mcpdm@40132000 {</div><div class='add'>+	compatible = "ti,omap4-mcpdm";</div><div class='add'>+	reg = &lt;0x40132000 0x7f&gt;, /* MPU private access */</div><div class='add'>+	      &lt;0x49032000 0x7f&gt;; /* L3 Interconnect */</div><div class='add'>+	interrupts = &lt;0 112 0x4&gt;;</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	ti,hwmods = "mcpdm";</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/sgtl5000.txt b/Documentation/devicetree/bindings/sound/sgtl5000.txt<br/>index 2c3cd413f042..9cc44449508d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/sgtl5000.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/sound/sgtl5000.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/sgtl5000.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/sgtl5000.txt</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible : "fsl,sgtl5000".</div><div class='ctx'> </div><div class='add'>+- reg : the I2C address of the device</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> codec: sgtl5000@0a {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt b/Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt<br/>new file mode 100644<br/>index 000000000000..04b14cfb1f16<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+NVIDIA Tegra audio complex for TrimSlice</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "nvidia,tegra-audio-trimslice"</div><div class='add'>+- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller</div><div class='add'>+- nvidia,audio-codec : The phandle of the WM8903 audio codec</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+sound {</div><div class='add'>+	compatible = "nvidia,tegra-audio-trimslice";</div><div class='add'>+	nvidia,i2s-controller = &lt;&amp;tegra_i2s1&gt;;</div><div class='add'>+	nvidia,audio-codec = &lt;&amp;codec&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt b/Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt<br/>new file mode 100644<br/>index 000000000000..c4dd39ce6165<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+NVIDIA Tegra audio complex</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible : "nvidia,tegra-audio-wm8753"</div><div class='add'>+- nvidia,model : The user-visible name of this sound complex.</div><div class='add'>+- nvidia,audio-routing : A list of the connections between audio components.</div><div class='add'>+  Each entry is a pair of strings, the first being the connection's sink,</div><div class='add'>+  the second being the connection's source. Valid names for sources and</div><div class='add'>+  sinks are the WM8753's pins, and the jacks on the board:</div><div class='add'>+</div><div class='add'>+  WM8753 pins:</div><div class='add'>+</div><div class='add'>+  * LOUT1</div><div class='add'>+  * LOUT2</div><div class='add'>+  * ROUT1</div><div class='add'>+  * ROUT2</div><div class='add'>+  * MONO1</div><div class='add'>+  * MONO2</div><div class='add'>+  * OUT3</div><div class='add'>+  * OUT4</div><div class='add'>+  * LINE1</div><div class='add'>+  * LINE2</div><div class='add'>+  * RXP</div><div class='add'>+  * RXN</div><div class='add'>+  * ACIN</div><div class='add'>+  * ACOP</div><div class='add'>+  * MIC1N</div><div class='add'>+  * MIC1</div><div class='add'>+  * MIC2N</div><div class='add'>+  * MIC2</div><div class='add'>+  * Mic Bias</div><div class='add'>+</div><div class='add'>+  Board connectors:</div><div class='add'>+</div><div class='add'>+  * Headphone Jack</div><div class='add'>+  * Mic Jack</div><div class='add'>+</div><div class='add'>+- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller</div><div class='add'>+- nvidia,audio-codec : The phandle of the WM8753 audio codec</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+sound {</div><div class='add'>+	compatible = "nvidia,tegra-audio-wm8753-whistler",</div><div class='add'>+		     "nvidia,tegra-audio-wm8753"</div><div class='add'>+	nvidia,model = "tegra-wm8753-harmony";</div><div class='add'>+</div><div class='add'>+	nvidia,audio-routing =</div><div class='add'>+		"Headphone Jack", "LOUT1",</div><div class='add'>+		"Headphone Jack", "ROUT1";</div><div class='add'>+</div><div class='add'>+	nvidia,i2s-controller = &lt;&amp;i2s1&gt;;</div><div class='add'>+	nvidia,audio-codec = &lt;&amp;wm8753&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt b/Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt<br/>new file mode 100644<br/>index 000000000000..b3629d3a9adf<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/staging/iio/adc/lpc32xx-adc.txt</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+* NXP LPC32xx SoC ADC controller</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: must be "nxp,lpc3220-adc"</div><div class='add'>+- reg: physical base address of the controller and length of memory mapped</div><div class='add'>+  region.</div><div class='add'>+- interrupts: The ADC interrupt</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	adc@40048000 {</div><div class='add'>+		compatible = "nxp,lpc3220-adc";</div><div class='add'>+		reg = &lt;0x40048000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mic&gt;;</div><div class='add'>+		interrupts = &lt;39 0&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/staging/iio/adc/spear-adc.txt b/Documentation/devicetree/bindings/staging/iio/adc/spear-adc.txt<br/>new file mode 100644<br/>index 000000000000..02ea23a63f20<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/staging/iio/adc/spear-adc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/staging/iio/adc/spear-adc.txt</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+* ST SPEAr ADC device driver</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Should be "st,spear600-adc"</div><div class='add'>+- reg: Address and length of the register set for the device</div><div class='add'>+- interrupt-parent: Should be the phandle for the interrupt controller</div><div class='add'>+  that services interrupts for this device</div><div class='add'>+- interrupts: Should contain the ADC interrupt</div><div class='add'>+- sampling-frequency: Default sampling frequency</div><div class='add'>+</div><div class='add'>+Optional properties:</div><div class='add'>+- vref-external: External voltage reference in milli-volts. If omitted</div><div class='add'>+  the internal voltage reference will be used.</div><div class='add'>+- average-samples: Number of samples to generate an average value. If</div><div class='add'>+  omitted, single data conversion will be used.</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+	adc: adc@d8200000 {</div><div class='add'>+		compatible = "st,spear600-adc";</div><div class='add'>+		reg = &lt;0xd8200000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='add'>+		interrupts = &lt;6&gt;;</div><div class='add'>+		sampling-frequency = &lt;5000000&gt;;</div><div class='add'>+		vref-external = &lt;2500&gt;;	/* 2.5V VRef */</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt<br/>index a9c0406280e8..b462d0c54823 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/tty/serial/fsl-imx-uart.txt</a></div><div class='hunk'>@@ -11,7 +11,7 @@ Optional properties:</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='del'>-uart@73fbc000 {</div><div class='add'>+serial@73fbc000 {</div><div class='ctx'> 	compatible = "fsl,imx51-uart", "fsl,imx21-uart";</div><div class='ctx'> 	reg = &lt;0x73fbc000 0x4000&gt;;</div><div class='ctx'> 	interrupts = &lt;31&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/isp1301.txt b/Documentation/devicetree/bindings/usb/isp1301.txt<br/>new file mode 100644<br/>index 000000000000..5405d99d9aaa<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/isp1301.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/usb/isp1301.txt</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+* NXP ISP1301 USB transceiver</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: must be "nxp,isp1301"</div><div class='add'>+- reg: I2C address of the ISP1301 device</div><div class='add'>+</div><div class='add'>+Optional properties of devices using ISP1301:</div><div class='add'>+- transceiver: phandle of isp1301 - this helps the ISP1301 driver to find the</div><div class='add'>+               ISP1301 instance associated with the respective USB driver</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	isp1301: usb-transceiver@2c {</div><div class='add'>+		compatible = "nxp,isp1301";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usbd@31020000 {</div><div class='add'>+		compatible = "nxp,lpc3220-udc";</div><div class='add'>+		reg = &lt;0x31020000 0x300&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mic&gt;;</div><div class='add'>+		interrupts = &lt;0x3d 0&gt;, &lt;0x3e 0&gt;, &lt;0x3c 0&gt;, &lt;0x3a 0&gt;;</div><div class='add'>+		transceiver = &lt;&amp;isp1301&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/lpc32xx-udc.txt b/Documentation/devicetree/bindings/usb/lpc32xx-udc.txt<br/>new file mode 100644<br/>index 000000000000..29f12a533f66<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/lpc32xx-udc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/usb/lpc32xx-udc.txt</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+* NXP LPC32xx SoC USB Device Controller (UDC)</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: Must be "nxp,lpc3220-udc"</div><div class='add'>+- reg: Physical base address of the controller and length of memory mapped</div><div class='add'>+  region.</div><div class='add'>+- interrupts: The USB interrupts:</div><div class='add'>+              * USB Device Low Priority Interrupt</div><div class='add'>+              * USB Device High Priority Interrupt</div><div class='add'>+              * USB Device DMA Interrupt</div><div class='add'>+              * External USB Transceiver Interrupt (OTG ATX)</div><div class='add'>+- transceiver: phandle of the associated ISP1301 device - this is necessary for</div><div class='add'>+               the UDC controller for connecting to the USB physical layer</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	isp1301: usb-transceiver@2c {</div><div class='add'>+		compatible = "nxp,isp1301";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usbd@31020000 {</div><div class='add'>+		compatible = "nxp,lpc3220-udc";</div><div class='add'>+		reg = &lt;0x31020000 0x300&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mic&gt;;</div><div class='add'>+		interrupts = &lt;0x3d 0&gt;, &lt;0x3e 0&gt;, &lt;0x3c 0&gt;, &lt;0x3a 0&gt;;</div><div class='add'>+		transceiver = &lt;&amp;isp1301&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ohci-nxp.txt b/Documentation/devicetree/bindings/usb/ohci-nxp.txt<br/>new file mode 100644<br/>index 000000000000..71e28c1017ed<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/ohci-nxp.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/usb/ohci-nxp.txt</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+* OHCI controller, NXP ohci-nxp variant</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: must be "nxp,ohci-nxp"</div><div class='add'>+- reg: physical base address of the controller and length of memory mapped</div><div class='add'>+  region.</div><div class='add'>+- interrupts: The OHCI interrupt</div><div class='add'>+- transceiver: phandle of the associated ISP1301 device - this is necessary for</div><div class='add'>+               the UDC controller for connecting to the USB physical layer</div><div class='add'>+</div><div class='add'>+Example (LPC32xx):</div><div class='add'>+</div><div class='add'>+	isp1301: usb-transceiver@2c {</div><div class='add'>+		compatible = "nxp,isp1301";</div><div class='add'>+		reg = &lt;0x2c&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ohci@31020000 {</div><div class='add'>+		compatible = "nxp,ohci-nxp";</div><div class='add'>+		reg = &lt;0x31020000 0x300&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;mic&gt;;</div><div class='add'>+		interrupts = &lt;0x3b 0&gt;;</div><div class='add'>+		transceiver = &lt;&amp;isp1301&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/spear-usb.txt b/Documentation/devicetree/bindings/usb/spear-usb.txt<br/>new file mode 100644<br/>index 000000000000..f8a464a25653<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/spear-usb.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/usb/spear-usb.txt</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+ST SPEAr SoC USB controllers:</div><div class='add'>+-----------------------------</div><div class='add'>+</div><div class='add'>+EHCI:</div><div class='add'>+-----</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "st,spear600-ehci"</div><div class='add'>+- interrupt-parent: Should be the phandle for the interrupt controller</div><div class='add'>+  that services interrupts for this device</div><div class='add'>+- interrupts: Should contain the EHCI interrupt</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	ehci@e1800000 {</div><div class='add'>+		compatible = "st,spear600-ehci", "usb-ehci";</div><div class='add'>+		reg = &lt;0xe1800000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='add'>+		interrupts = &lt;27&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+OHCI:</div><div class='add'>+-----</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: "st,spear600-ohci"</div><div class='add'>+- interrupt-parent: Should be the phandle for the interrupt controller</div><div class='add'>+  that services interrupts for this device</div><div class='add'>+- interrupts: Should contain the OHCI interrupt</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	ohci@e1900000 {</div><div class='add'>+		compatible = "st,spear600-ohci", "usb-ohci";</div><div class='add'>+		reg = &lt;0xe1800000 0x1000&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='add'>+		interrupts = &lt;26&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/tegra-usb.txt b/Documentation/devicetree/bindings/usb/tegra-usb.txt<br/>index 007005ddbe12..e9b005dc7625 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/tegra-usb.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/usb/tegra-usb.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/usb/tegra-usb.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/usb/tegra-usb.txt</a></div><div class='hunk'>@@ -12,6 +12,9 @@ Required properties :</div><div class='ctx'>  - nvidia,vbus-gpio : If present, specifies a gpio that needs to be</div><div class='ctx'>    activated for the bus to be powered.</div><div class='ctx'> </div><div class='add'>+Required properties for phy_type == ulpi:</div><div class='add'>+  - nvidia,phy-reset-gpio : The GPIO used to reset the PHY.</div><div class='add'>+</div><div class='ctx'> Optional properties:</div><div class='ctx'>   - dr_mode : dual role mode. Indicates the working mode for</div><div class='ctx'>    nvidia,tegra20-ehci compatible controllers.  Can be "host", "peripheral",</div><div class='head'>diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt<br/>index 82ac057a24a9..6eab91747a86 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/bindings/vendor-prefixes.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/bindings/vendor-prefixes.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/vendor-prefixes.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/vendor-prefixes.txt</a></div><div class='hunk'>@@ -8,11 +8,13 @@ amcc	Applied Micro Circuits Corporation (APM, formally AMCC)</div><div class='ctx'> apm	Applied Micro Circuits Corporation (APM)</div><div class='ctx'> arm	ARM Ltd.</div><div class='ctx'> atmel	Atmel Corporation</div><div class='add'>+bosch	Bosch Sensortec GmbH</div><div class='ctx'> cavium	Cavium, Inc.</div><div class='ctx'> chrp	Common Hardware Reference Platform</div><div class='ctx'> cortina	Cortina Systems, Inc.</div><div class='ctx'> dallas	Maxim Integrated Products (formerly Dallas Semiconductor)</div><div class='ctx'> denx	Denx Software Engineering</div><div class='add'>+emmicro	EM Microelectronic</div><div class='ctx'> epson	Seiko Epson Corp.</div><div class='ctx'> est	ESTeem Wireless Modems</div><div class='ctx'> fsl	Freescale Semiconductor</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/pnx4008-wdt.txt b/Documentation/devicetree/bindings/watchdog/pnx4008-wdt.txt<br/>new file mode 100644<br/>index 000000000000..7c7f6887c796<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/bindings/watchdog/pnx4008-wdt.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/bindings/watchdog/pnx4008-wdt.txt</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+* NXP PNX watchdog timer</div><div class='add'>+</div><div class='add'>+Required properties:</div><div class='add'>+- compatible: must be "nxp,pnx4008-wdt"</div><div class='add'>+- reg: physical base address of the controller and length of memory mapped</div><div class='add'>+  region.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+	watchdog@4003C000 {</div><div class='add'>+		compatible = "nxp,pnx4008-wdt";</div><div class='add'>+		reg = &lt;0x4003C000 0x1000&gt;;</div><div class='add'>+	};</div><div class='head'>diff --git a/Documentation/devicetree/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt<br/>index da0bfeb4253d..d4d66757354e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/devicetree/booting-without-of.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/devicetree/booting-without-of.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/devicetree/booting-without-of.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/devicetree/booting-without-of.txt</a></div><div class='hunk'>@@ -551,12 +551,13 @@ Here is an example of a simple device-tree. In this example, an "o"</div><div class='ctx'> designates a node followed by the node unit name. Properties are</div><div class='ctx'> presented with their name followed by their content. "content"</div><div class='ctx'> represents an ASCII string (zero terminated) value, while &lt;content&gt;</div><div class='del'>-represents a 32-bit hexadecimal value. The various nodes in this</div><div class='del'>-example will be discussed in a later chapter. At this point, it is</div><div class='del'>-only meant to give you a idea of what a device-tree looks like. I have</div><div class='del'>-purposefully kept the "name" and "linux,phandle" properties which</div><div class='del'>-aren't necessary in order to give you a better idea of what the tree</div><div class='del'>-looks like in practice.</div><div class='add'>+represents a 32-bit value, specified in decimal or hexadecimal (the</div><div class='add'>+latter prefixed 0x). The various nodes in this example will be</div><div class='add'>+discussed in a later chapter. At this point, it is only meant to give</div><div class='add'>+you a idea of what a device-tree looks like. I have purposefully kept</div><div class='add'>+the "name" and "linux,phandle" properties which aren't necessary in</div><div class='add'>+order to give you a better idea of what the tree looks like in</div><div class='add'>+practice.</div><div class='ctx'> </div><div class='ctx'>   / o device-tree</div><div class='ctx'>       |- name = "device-tree"</div><div class='hunk'>@@ -576,14 +577,14 @@ looks like in practice.</div><div class='ctx'>       |   |- name = "PowerPC,970"</div><div class='ctx'>       |   |- device_type = "cpu"</div><div class='ctx'>       |   |- reg = &lt;0&gt;</div><div class='del'>-      |   |- clock-frequency = &lt;5f5e1000&gt;</div><div class='add'>+      |   |- clock-frequency = &lt;0x5f5e1000&gt;</div><div class='ctx'>       |   |- 64-bit</div><div class='ctx'>       |   |- linux,phandle = &lt;2&gt;</div><div class='ctx'>       |</div><div class='ctx'>       o memory@0</div><div class='ctx'>       | |- name = "memory"</div><div class='ctx'>       | |- device_type = "memory"</div><div class='del'>-      | |- reg = &lt;00000000 00000000 00000000 20000000&gt;</div><div class='add'>+      | |- reg = &lt;0x00000000 0x00000000 0x00000000 0x20000000&gt;</div><div class='ctx'>       | |- linux,phandle = &lt;3&gt;</div><div class='ctx'>       |</div><div class='ctx'>       o chosen</div><div class='hunk'>@@ -1010,8 +1011,8 @@ compatibility.</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		device_type = "soc";</div><div class='del'>-		ranges = &lt;00000000 e0000000 00100000&gt;</div><div class='del'>-		reg = &lt;e0000000 00003000&gt;;</div><div class='add'>+		ranges = &lt;0x00000000 0xe0000000 0x00100000&gt;</div><div class='add'>+		reg = &lt;0xe0000000 0x00003000&gt;;</div><div class='ctx'> 		bus-frequency = &lt;0&gt;;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1085,16 +1086,16 @@ supported currently at the toplevel.</div><div class='ctx'>                                  * terminated string</div><div class='ctx'> 				 */</div><div class='ctx'> </div><div class='del'>-  property2 = &lt;1234abcd&gt;;	/* define a property containing a</div><div class='add'>+  property2 = &lt;0x1234abcd&gt;;	/* define a property containing a</div><div class='ctx'>                                  * numerical 32-bit value (hexadecimal)</div><div class='ctx'> 				 */</div><div class='ctx'> </div><div class='del'>-  property3 = &lt;12345678 12345678 deadbeef&gt;;</div><div class='add'>+  property3 = &lt;0x12345678 0x12345678 0xdeadbeef&gt;;</div><div class='ctx'>                                 /* define a property containing 3</div><div class='ctx'>                                  * numerical 32-bit values (cells) in</div><div class='ctx'>                                  * hexadecimal</div><div class='ctx'> 				 */</div><div class='del'>-  property4 = [0a 0b 0c 0d de ea ad be ef];</div><div class='add'>+  property4 = [0x0a 0x0b 0x0c 0x0d 0xde 0xea 0xad 0xbe 0xef];</div><div class='ctx'>                                 /* define a property whose content is</div><div class='ctx'>                                  * an arbitrary array of bytes</div><div class='ctx'>                                  */</div><div class='hunk'>@@ -1350,10 +1351,10 @@ Appendix A - Sample SOC node for MPC8540</div><div class='ctx'> 			model = "TSEC";</div><div class='ctx'> 			compatible = "gianfar", "simple-bus";</div><div class='ctx'> 			reg = &lt;0x24000 0x1000&gt;;</div><div class='del'>-			local-mac-address = [ 00 E0 0C 00 73 00 ];</div><div class='del'>-			interrupts = &lt;29 2 30 2 34 2&gt;;</div><div class='add'>+			local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x00 ];</div><div class='add'>+			interrupts = &lt;0x29 2 0x30 2 0x34 2&gt;;</div><div class='ctx'> 			phy-handle = &lt;&amp;phy0&gt;;</div><div class='del'>-			sleep = &lt;&amp;pmc 00000080&gt;;</div><div class='add'>+			sleep = &lt;&amp;pmc 0x00000080&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='ctx'> 			mdio@24520 {</div><div class='hunk'>@@ -1385,10 +1386,10 @@ Appendix A - Sample SOC node for MPC8540</div><div class='ctx'> 			model = "TSEC";</div><div class='ctx'> 			compatible = "gianfar";</div><div class='ctx'> 			reg = &lt;0x25000 0x1000&gt;;</div><div class='del'>-			local-mac-address = [ 00 E0 0C 00 73 01 ];</div><div class='del'>-			interrupts = &lt;13 2 14 2 18 2&gt;;</div><div class='add'>+			local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x01 ];</div><div class='add'>+			interrupts = &lt;0x13 2 0x14 2 0x18 2&gt;;</div><div class='ctx'> 			phy-handle = &lt;&amp;phy1&gt;;</div><div class='del'>-			sleep = &lt;&amp;pmc 00000040&gt;;</div><div class='add'>+			sleep = &lt;&amp;pmc 0x00000040&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		ethernet@26000 {</div><div class='hunk'>@@ -1396,17 +1397,17 @@ Appendix A - Sample SOC node for MPC8540</div><div class='ctx'> 			model = "FEC";</div><div class='ctx'> 			compatible = "gianfar";</div><div class='ctx'> 			reg = &lt;0x26000 0x1000&gt;;</div><div class='del'>-			local-mac-address = [ 00 E0 0C 00 73 02 ];</div><div class='del'>-			interrupts = &lt;41 2&gt;;</div><div class='add'>+			local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x02 ];</div><div class='add'>+			interrupts = &lt;0x41 2&gt;;</div><div class='ctx'> 			phy-handle = &lt;&amp;phy3&gt;;</div><div class='del'>-			sleep = &lt;&amp;pmc 00000020&gt;;</div><div class='add'>+			sleep = &lt;&amp;pmc 0x00000020&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		serial@4500 {</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='ctx'> 			compatible = "fsl,mpc8540-duart", "simple-bus";</div><div class='del'>-			sleep = &lt;&amp;pmc 00000002&gt;;</div><div class='add'>+			sleep = &lt;&amp;pmc 0x00000002&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='ctx'> 			serial@4500 {</div><div class='hunk'>@@ -1414,7 +1415,7 @@ Appendix A - Sample SOC node for MPC8540</div><div class='ctx'> 				compatible = "ns16550";</div><div class='ctx'> 				reg = &lt;0x4500 0x100&gt;;</div><div class='ctx'> 				clock-frequency = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;42 2&gt;;</div><div class='add'>+				interrupts = &lt;0x42 2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			serial@4600 {</div><div class='hunk'>@@ -1422,7 +1423,7 @@ Appendix A - Sample SOC node for MPC8540</div><div class='ctx'> 				compatible = "ns16550";</div><div class='ctx'> 				reg = &lt;0x4600 0x100&gt;;</div><div class='ctx'> 				clock-frequency = &lt;0&gt;;</div><div class='del'>-				interrupts = &lt;42 2&gt;;</div><div class='add'>+				interrupts = &lt;0x42 2&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -1436,11 +1437,11 @@ Appendix A - Sample SOC node for MPC8540</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c@3000 {</div><div class='del'>-			interrupts = &lt;43 2&gt;;</div><div class='add'>+			interrupts = &lt;0x43 2&gt;;</div><div class='ctx'> 			reg = &lt;0x3000 0x100&gt;;</div><div class='ctx'> 			compatible  = "fsl-i2c";</div><div class='ctx'> 			dfsrr;</div><div class='del'>-			sleep = &lt;&amp;pmc 00000004&gt;;</div><div class='add'>+			sleep = &lt;&amp;pmc 0x00000004&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		pmc: power@e0070 {</div><div class='head'>diff --git a/Documentation/dma-buf-sharing.txt b/Documentation/dma-buf-sharing.txt<br/>index 3bbd5c51605a..ad86fb86c9a0 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/dma-buf-sharing.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/dma-buf-sharing.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/dma-buf-sharing.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/dma-buf-sharing.txt</a></div><div class='hunk'>@@ -29,13 +29,6 @@ The buffer-user</div><div class='ctx'>    in memory, mapped into its own address space, so it can access the same area</div><div class='ctx'>    of memory.</div><div class='ctx'> </div><div class='del'>-*IMPORTANT*: [see https://lkml.org/lkml/2011/12/20/211 for more details]</div><div class='del'>-For this first version, A buffer shared using the dma_buf sharing API:</div><div class='del'>-- *may* be exported to user space using "mmap" *ONLY* by exporter, outside of</div><div class='del'>-  this framework.</div><div class='del'>-- with this new iteration of the dma-buf api cpu access from the kernel has been</div><div class='del'>-  enable, see below for the details.</div><div class='del'>-</div><div class='ctx'> dma-buf operations for device dma only</div><div class='ctx'> --------------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -300,6 +293,17 @@ Access to a dma_buf from the kernel context involves three steps:</div><div class='ctx'>    Note that these calls need to always succeed. The exporter needs to complete</div><div class='ctx'>    any preparations that might fail in begin_cpu_access.</div><div class='ctx'> </div><div class='add'>+   For some cases the overhead of kmap can be too high, a vmap interface</div><div class='add'>+   is introduced. This interface should be used very carefully, as vmalloc</div><div class='add'>+   space is a limited resources on many architectures.</div><div class='add'>+</div><div class='add'>+   Interfaces:</div><div class='add'>+      void *dma_buf_vmap(struct dma_buf *dmabuf)</div><div class='add'>+      void dma_buf_vunmap(struct dma_buf *dmabuf, void *vaddr)</div><div class='add'>+</div><div class='add'>+   The vmap call can fail if there is no vmap support in the exporter, or if it</div><div class='add'>+   runs out of vmalloc space. Fallback to kmap should be implemented.</div><div class='add'>+</div><div class='ctx'> 3. Finish access</div><div class='ctx'> </div><div class='ctx'>    When the importer is done accessing the range specified in begin_cpu_access,</div><div class='hunk'>@@ -313,6 +317,83 @@ Access to a dma_buf from the kernel context involves three steps:</div><div class='ctx'> 				  enum dma_data_direction dir);</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+Direct Userspace Access/mmap Support</div><div class='add'>+------------------------------------</div><div class='add'>+</div><div class='add'>+Being able to mmap an export dma-buf buffer object has 2 main use-cases:</div><div class='add'>+- CPU fallback processing in a pipeline and</div><div class='add'>+- supporting existing mmap interfaces in importers.</div><div class='add'>+</div><div class='add'>+1. CPU fallback processing in a pipeline</div><div class='add'>+</div><div class='add'>+   In many processing pipelines it is sometimes required that the cpu can access</div><div class='add'>+   the data in a dma-buf (e.g. for thumbnail creation, snapshots, ...). To avoid</div><div class='add'>+   the need to handle this specially in userspace frameworks for buffer sharing</div><div class='add'>+   it's ideal if the dma_buf fd itself can be used to access the backing storage</div><div class='add'>+   from userspace using mmap.</div><div class='add'>+</div><div class='add'>+   Furthermore Android's ION framework already supports this (and is otherwise</div><div class='add'>+   rather similar to dma-buf from a userspace consumer side with using fds as</div><div class='add'>+   handles, too). So it's beneficial to support this in a similar fashion on</div><div class='add'>+   dma-buf to have a good transition path for existing Android userspace.</div><div class='add'>+</div><div class='add'>+   No special interfaces, userspace simply calls mmap on the dma-buf fd.</div><div class='add'>+</div><div class='add'>+2. Supporting existing mmap interfaces in exporters</div><div class='add'>+</div><div class='add'>+   Similar to the motivation for kernel cpu access it is again important that</div><div class='add'>+   the userspace code of a given importing subsystem can use the same interfaces</div><div class='add'>+   with a imported dma-buf buffer object as with a native buffer object. This is</div><div class='add'>+   especially important for drm where the userspace part of contemporary OpenGL,</div><div class='add'>+   X, and other drivers is huge, and reworking them to use a different way to</div><div class='add'>+   mmap a buffer rather invasive.</div><div class='add'>+</div><div class='add'>+   The assumption in the current dma-buf interfaces is that redirecting the</div><div class='add'>+   initial mmap is all that's needed. A survey of some of the existing</div><div class='add'>+   subsystems shows that no driver seems to do any nefarious thing like syncing</div><div class='add'>+   up with outstanding asynchronous processing on the device or allocating</div><div class='add'>+   special resources at fault time. So hopefully this is good enough, since</div><div class='add'>+   adding interfaces to intercept pagefaults and allow pte shootdowns would</div><div class='add'>+   increase the complexity quite a bit.</div><div class='add'>+</div><div class='add'>+   Interface:</div><div class='add'>+      int dma_buf_mmap(struct dma_buf *, struct vm_area_struct *,</div><div class='add'>+		       unsigned long);</div><div class='add'>+</div><div class='add'>+   If the importing subsystem simply provides a special-purpose mmap call to set</div><div class='add'>+   up a mapping in userspace, calling do_mmap with dma_buf-&gt;file will equally</div><div class='add'>+   achieve that for a dma-buf object.</div><div class='add'>+</div><div class='add'>+3. Implementation notes for exporters</div><div class='add'>+</div><div class='add'>+   Because dma-buf buffers have invariant size over their lifetime, the dma-buf</div><div class='add'>+   core checks whether a vma is too large and rejects such mappings. The</div><div class='add'>+   exporter hence does not need to duplicate this check.</div><div class='add'>+</div><div class='add'>+   Because existing importing subsystems might presume coherent mappings for</div><div class='add'>+   userspace, the exporter needs to set up a coherent mapping. If that's not</div><div class='add'>+   possible, it needs to fake coherency by manually shooting down ptes when</div><div class='add'>+   leaving the cpu domain and flushing caches at fault time. Note that all the</div><div class='add'>+   dma_buf files share the same anon inode, hence the exporter needs to replace</div><div class='add'>+   the dma_buf file stored in vma-&gt;vm_file with it's own if pte shootdown is</div><div class='add'>+   requred. This is because the kernel uses the underlying inode's address_space</div><div class='add'>+   for vma tracking (and hence pte tracking at shootdown time with</div><div class='add'>+   unmap_mapping_range).</div><div class='add'>+</div><div class='add'>+   If the above shootdown dance turns out to be too expensive in certain</div><div class='add'>+   scenarios, we can extend dma-buf with a more explicit cache tracking scheme</div><div class='add'>+   for userspace mappings. But the current assumption is that using mmap is</div><div class='add'>+   always a slower path, so some inefficiencies should be acceptable.</div><div class='add'>+</div><div class='add'>+   Exporters that shoot down mappings (for any reasons) shall not do any</div><div class='add'>+   synchronization at fault time with outstanding device operations.</div><div class='add'>+   Synchronization is an orthogonal issue to sharing the backing storage of a</div><div class='add'>+   buffer and hence should not be handled by dma-buf itself. This is explictly</div><div class='add'>+   mentioned here because many people seem to want something like this, but if</div><div class='add'>+   different exporters handle this differently, buffer sharing can fail in</div><div class='add'>+   interesting ways depending upong the exporter (if userspace starts depending</div><div class='add'>+   upon this implicit synchronization).</div><div class='add'>+</div><div class='ctx'> Miscellaneous notes</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='hunk'>@@ -336,6 +417,20 @@ Miscellaneous notes</div><div class='ctx'>   the exporting driver to create a dmabuf fd must provide a way to let</div><div class='ctx'>   userspace control setting of O_CLOEXEC flag passed in to dma_buf_fd().</div><div class='ctx'> </div><div class='add'>+- If an exporter needs to manually flush caches and hence needs to fake</div><div class='add'>+  coherency for mmap support, it needs to be able to zap all the ptes pointing</div><div class='add'>+  at the backing storage. Now linux mm needs a struct address_space associated</div><div class='add'>+  with the struct file stored in vma-&gt;vm_file to do that with the function</div><div class='add'>+  unmap_mapping_range. But the dma_buf framework only backs every dma_buf fd</div><div class='add'>+  with the anon_file struct file, i.e. all dma_bufs share the same file.</div><div class='add'>+</div><div class='add'>+  Hence exporters need to setup their own file (and address_space) association</div><div class='add'>+  by setting vma-&gt;vm_file and adjusting vma-&gt;vm_pgoff in the dma_buf mmap</div><div class='add'>+  callback. In the specific case of a gem driver the exporter could use the</div><div class='add'>+  shmem file already provided by gem (and set vm_pgoff = 0). Exporters can then</div><div class='add'>+  zap ptes by unmapping the corresponding range of the struct address_space</div><div class='add'>+  associated with their own file.</div><div class='add'>+</div><div class='ctx'> References:</div><div class='ctx'> [1] struct dma_buf_ops in include/linux/dma-buf.h</div><div class='ctx'> [2] All interfaces mentioned above defined in include/linux/dma-buf.h</div><div class='head'>diff --git a/Documentation/driver-model/devres.txt b/Documentation/driver-model/devres.txt<br/>index 2a596a4fc23e..950856bd2e39 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/driver-model/devres.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/driver-model/devres.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/driver-model/devres.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/driver-model/devres.txt</a></div><div class='hunk'>@@ -276,3 +276,11 @@ REGULATOR</div><div class='ctx'>   devm_regulator_get()</div><div class='ctx'>   devm_regulator_put()</div><div class='ctx'>   devm_regulator_bulk_get()</div><div class='add'>+</div><div class='add'>+CLOCK</div><div class='add'>+  devm_clk_get()</div><div class='add'>+  devm_clk_put()</div><div class='add'>+</div><div class='add'>+PINCTRL</div><div class='add'>+  devm_pinctrl_get()</div><div class='add'>+  devm_pinctrl_put()</div><div class='head'>diff --git a/Documentation/dvb/get_dvb_firmware b/Documentation/dvb/get_dvb_firmware<br/>index d1d4a179a382..fbb241174486 100755<br/>--- a/<a href='/drm-misc/tree/Documentation/dvb/get_dvb_firmware?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/dvb/get_dvb_firmware</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/dvb/get_dvb_firmware?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/dvb/get_dvb_firmware</a></div><div class='hunk'>@@ -28,7 +28,8 @@ use IO::Handle;</div><div class='ctx'> 		"opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718",</div><div class='ctx'> 		"af9015", "ngene", "az6027", "lme2510_lg", "lme2510c_s7395",</div><div class='ctx'> 		"lme2510c_s7395_old", "drxk", "drxk_terratec_h5",</div><div class='del'>-		"drxk_hauppauge_hvr930c", "tda10071", "it9135", "it9137");</div><div class='add'>+		"drxk_hauppauge_hvr930c", "tda10071", "it9135", "it9137",</div><div class='add'>+		"drxk_pctv");</div><div class='ctx'> </div><div class='ctx'> # Check args</div><div class='ctx'> syntax() if (scalar(@ARGV) != 1);</div><div class='hunk'>@@ -730,6 +731,23 @@ sub tda10071 {</div><div class='ctx'>     "$fwfile";</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+sub drxk_pctv {</div><div class='add'>+    my $sourcefile = "PCTV_460e_reference.zip";</div><div class='add'>+    my $url = "ftp://ftp.pctvsystems.com/TV/driver/PCTV%2070e%2080e%20100e%20320e%20330e%20800e/";</div><div class='add'>+    my $hash = "4403de903bf2593464c8d74bbc200a57";</div><div class='add'>+    my $fwfile = "dvb-demod-drxk-pctv.fw";</div><div class='add'>+    my $tmpdir = tempdir(DIR =&gt; "/tmp", CLEANUP =&gt; 1);</div><div class='add'>+</div><div class='add'>+    checkstandard();</div><div class='add'>+</div><div class='add'>+    wgetfile($sourcefile, $url . $sourcefile);</div><div class='add'>+    verify($sourcefile, $hash);</div><div class='add'>+    unzip($sourcefile, $tmpdir);</div><div class='add'>+    extract("$tmpdir/PCTV\ 70e\ 80e\ 100e\ 320e\ 330e\ 800e/32\ bit/emOEM.sys", 0x72b80, 42692, $fwfile);</div><div class='add'>+</div><div class='add'>+    "$fwfile";</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> # ---------------------------------------------------------------</div><div class='ctx'> # Utilities</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/dvb/opera-firmware.txt b/Documentation/dvb/opera-firmware.txt<br/>index 93e784c2607b..fb6683188ef7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/dvb/opera-firmware.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/dvb/opera-firmware.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/dvb/opera-firmware.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/dvb/opera-firmware.txt</a></div><div class='hunk'>@@ -8,7 +8,7 @@ from the windriver disk into this directory.</div><div class='ctx'> </div><div class='ctx'> Then run</div><div class='ctx'> </div><div class='del'>-./get_dvb_firware opera1</div><div class='add'>+./get_dvb_firmware opera1</div><div class='ctx'> </div><div class='ctx'> and after that you have 2 files:</div><div class='ctx'> </div><div class='hunk'>@@ -24,4 +24,4 @@ After that the driver can load the firmware</div><div class='ctx'> in kernel config and have hotplug running).</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Marco Gittler &lt;g.marco@freenet.de&gt;
\ No newline at end of file</div><div class='add'>+Marco Gittler &lt;g.marco@freenet.de&gt;</div><div class='head'>diff --git a/Documentation/dynamic-debug-howto.txt b/Documentation/dynamic-debug-howto.txt<br/>index 74e6c7782678..6e1684981da2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/dynamic-debug-howto.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/dynamic-debug-howto.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/dynamic-debug-howto.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/dynamic-debug-howto.txt</a></div><div class='hunk'>@@ -2,17 +2,17 @@</div><div class='ctx'> Introduction</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='del'>-This document describes how to use the dynamic debug (ddebug) feature.</div><div class='add'>+This document describes how to use the dynamic debug (dyndbg) feature.</div><div class='ctx'> </div><div class='del'>-Dynamic debug is designed to allow you to dynamically enable/disable kernel</div><div class='del'>-code to obtain additional kernel information. Currently, if</div><div class='del'>-CONFIG_DYNAMIC_DEBUG is set, then all pr_debug()/dev_dbg() calls can be</div><div class='del'>-dynamically enabled per-callsite.</div><div class='add'>+Dynamic debug is designed to allow you to dynamically enable/disable</div><div class='add'>+kernel code to obtain additional kernel information.  Currently, if</div><div class='add'>+CONFIG_DYNAMIC_DEBUG is set, then all pr_debug()/dev_dbg() calls can</div><div class='add'>+be dynamically enabled per-callsite.</div><div class='ctx'> </div><div class='ctx'> Dynamic debug has even more useful features:</div><div class='ctx'> </div><div class='del'>- * Simple query language allows turning on and off debugging statements by</div><div class='del'>-   matching any combination of 0 or 1 of:</div><div class='add'>+ * Simple query language allows turning on and off debugging</div><div class='add'>+   statements by matching any combination of 0 or 1 of:</div><div class='ctx'> </div><div class='ctx'>    - source filename</div><div class='ctx'>    - function name</div><div class='hunk'>@@ -20,17 +20,19 @@ Dynamic debug has even more useful features:</div><div class='ctx'>    - module name</div><div class='ctx'>    - format string</div><div class='ctx'> </div><div class='del'>- * Provides a debugfs control file: &lt;debugfs&gt;/dynamic_debug/control which can be</div><div class='del'>-   read to display the complete list of known debug statements, to help guide you</div><div class='add'>+ * Provides a debugfs control file: &lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+   which can be read to display the complete list of known debug</div><div class='add'>+   statements, to help guide you</div><div class='ctx'> </div><div class='ctx'> Controlling dynamic debug Behaviour</div><div class='ctx'> ===================================</div><div class='ctx'> </div><div class='ctx'> The behaviour of pr_debug()/dev_dbg()s are controlled via writing to a</div><div class='del'>-control file in the 'debugfs' filesystem. Thus, you must first mount the debugfs</div><div class='del'>-filesystem, in order to make use of this feature. Subsequently, we refer to the</div><div class='del'>-control file as: &lt;debugfs&gt;/dynamic_debug/control. For example, if you want to</div><div class='del'>-enable printing from source file 'svcsock.c', line 1603 you simply do:</div><div class='add'>+control file in the 'debugfs' filesystem. Thus, you must first mount</div><div class='add'>+the debugfs filesystem, in order to make use of this feature.</div><div class='add'>+Subsequently, we refer to the control file as:</div><div class='add'>+&lt;debugfs&gt;/dynamic_debug/control. For example, if you want to enable</div><div class='add'>+printing from source file 'svcsock.c', line 1603 you simply do:</div><div class='ctx'> </div><div class='ctx'> nullarbor:~ # echo 'file svcsock.c line 1603 +p' &gt;</div><div class='ctx'> 				&lt;debugfs&gt;/dynamic_debug/control</div><div class='hunk'>@@ -44,15 +46,15 @@ nullarbor:~ # echo 'file svcsock.c wtf 1 +p' &gt;</div><div class='ctx'> Viewing Dynamic Debug Behaviour</div><div class='ctx'> ===========================</div><div class='ctx'> </div><div class='del'>-You can view the currently configured behaviour of all the debug statements</div><div class='del'>-via:</div><div class='add'>+You can view the currently configured behaviour of all the debug</div><div class='add'>+statements via:</div><div class='ctx'> </div><div class='ctx'> nullarbor:~ # cat &lt;debugfs&gt;/dynamic_debug/control</div><div class='ctx'> # filename:lineno [module]function flags format</div><div class='del'>-/usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:323 [svcxprt_rdma]svc_rdma_cleanup - "SVCRDMA Module Removed, deregister RPC RDMA transport\012"</div><div class='del'>-/usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:341 [svcxprt_rdma]svc_rdma_init - "\011max_inline       : %d\012"</div><div class='del'>-/usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:340 [svcxprt_rdma]svc_rdma_init - "\011sq_depth         : %d\012"</div><div class='del'>-/usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:338 [svcxprt_rdma]svc_rdma_init - "\011max_requests     : %d\012"</div><div class='add'>+/usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:323 [svcxprt_rdma]svc_rdma_cleanup =_ "SVCRDMA Module Removed, deregister RPC RDMA transport\012"</div><div class='add'>+/usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:341 [svcxprt_rdma]svc_rdma_init =_ "\011max_inline       : %d\012"</div><div class='add'>+/usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:340 [svcxprt_rdma]svc_rdma_init =_ "\011sq_depth         : %d\012"</div><div class='add'>+/usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:338 [svcxprt_rdma]svc_rdma_init =_ "\011max_requests     : %d\012"</div><div class='ctx'> ...</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -65,12 +67,12 @@ nullarbor:~ # grep -i rdma &lt;debugfs&gt;/dynamic_debug/control  | wc -l</div><div class='ctx'> nullarbor:~ # grep -i tcp &lt;debugfs&gt;/dynamic_debug/control | wc -l</div><div class='ctx'> 42</div><div class='ctx'> </div><div class='del'>-Note in particular that the third column shows the enabled behaviour</div><div class='del'>-flags for each debug statement callsite (see below for definitions of the</div><div class='del'>-flags).  The default value, no extra behaviour enabled, is "-".  So</div><div class='del'>-you can view all the debug statement callsites with any non-default flags:</div><div class='add'>+The third column shows the currently enabled flags for each debug</div><div class='add'>+statement callsite (see below for definitions of the flags).  The</div><div class='add'>+default value, with no flags enabled, is "=_".  So you can view all</div><div class='add'>+the debug statement callsites with any non-default flags:</div><div class='ctx'> </div><div class='del'>-nullarbor:~ # awk '$3 != "-"' &lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+nullarbor:~ # awk '$3 != "=_"' &lt;debugfs&gt;/dynamic_debug/control</div><div class='ctx'> # filename:lineno [module]function flags format</div><div class='ctx'> /usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svcsock.c:1603 [sunrpc]svc_send p "svc_process: st_sendto returned %d\012"</div><div class='ctx'> </div><div class='hunk'>@@ -103,15 +105,14 @@ specifications, followed by a flags change specification.</div><div class='ctx'> </div><div class='ctx'> command ::= match-spec* flags-spec</div><div class='ctx'> </div><div class='del'>-The match-spec's are used to choose a subset of the known dprintk()</div><div class='add'>+The match-spec's are used to choose a subset of the known pr_debug()</div><div class='ctx'> callsites to which to apply the flags-spec.  Think of them as a query</div><div class='ctx'> with implicit ANDs between each pair.  Note that an empty list of</div><div class='del'>-match-specs is possible, but is not very useful because it will not</div><div class='del'>-match any debug statement callsites.</div><div class='add'>+match-specs will select all debug statement callsites.</div><div class='ctx'> </div><div class='del'>-A match specification comprises a keyword, which controls the attribute</div><div class='del'>-of the callsite to be compared, and a value to compare against.  Possible</div><div class='del'>-keywords are:</div><div class='add'>+A match specification comprises a keyword, which controls the</div><div class='add'>+attribute of the callsite to be compared, and a value to compare</div><div class='add'>+against.  Possible keywords are:</div><div class='ctx'> </div><div class='ctx'> match-spec ::= 'func' string |</div><div class='ctx'> 	       'file' string |</div><div class='hunk'>@@ -164,15 +165,15 @@ format</div><div class='ctx'>     characters (") or single quote characters (').</div><div class='ctx'>     Examples:</div><div class='ctx'> </div><div class='del'>-    format svcrdma:	    // many of the NFS/RDMA server dprintks</div><div class='del'>-    format readahead	    // some dprintks in the readahead cache</div><div class='add'>+    format svcrdma:	    // many of the NFS/RDMA server pr_debugs</div><div class='add'>+    format readahead	    // some pr_debugs in the readahead cache</div><div class='ctx'>     format nfsd:\040SETATTR // one way to match a format with whitespace</div><div class='ctx'>     format "nfsd: SETATTR"  // a neater way to match a format with whitespace</div><div class='ctx'>     format 'nfsd: SETATTR'  // yet another way to match a format with whitespace</div><div class='ctx'> </div><div class='ctx'> line</div><div class='ctx'>     The given line number or range of line numbers is compared</div><div class='del'>-    against the line number of each dprintk() callsite.  A single</div><div class='add'>+    against the line number of each pr_debug() callsite.  A single</div><div class='ctx'>     line number matches the callsite line number exactly.  A</div><div class='ctx'>     range of line numbers matches any callsite between the first</div><div class='ctx'>     and last line number inclusive.  An empty first number means</div><div class='hunk'>@@ -188,51 +189,93 @@ The flags specification comprises a change operation followed</div><div class='ctx'> by one or more flag characters.  The change operation is one</div><div class='ctx'> of the characters:</div><div class='ctx'> </div><div class='del'>--</div><div class='del'>-    remove the given flags</div><div class='del'>-</div><div class='del'>-+</div><div class='del'>-    add the given flags</div><div class='del'>-</div><div class='del'>-=</div><div class='del'>-    set the flags to the given flags</div><div class='add'>+  -    remove the given flags</div><div class='add'>+  +    add the given flags</div><div class='add'>+  =    set the flags to the given flags</div><div class='ctx'> </div><div class='ctx'> The flags are:</div><div class='ctx'> </div><div class='del'>-f</div><div class='del'>-    Include the function name in the printed message</div><div class='del'>-l</div><div class='del'>-    Include line number in the printed message</div><div class='del'>-m</div><div class='del'>-    Include module name in the printed message</div><div class='del'>-p</div><div class='del'>-    Causes a printk() message to be emitted to dmesg</div><div class='del'>-t</div><div class='del'>-    Include thread ID in messages not generated from interrupt context</div><div class='add'>+  p    enables the pr_debug() callsite.</div><div class='add'>+  f    Include the function name in the printed message</div><div class='add'>+  l    Include line number in the printed message</div><div class='add'>+  m    Include module name in the printed message</div><div class='add'>+  t    Include thread ID in messages not generated from interrupt context</div><div class='add'>+  _    No flags are set. (Or'd with others on input)</div><div class='add'>+</div><div class='add'>+For display, the flags are preceded by '='</div><div class='add'>+(mnemonic: what the flags are currently equal to).</div><div class='ctx'> </div><div class='del'>-Note the regexp ^[-+=][flmpt]+$ matches a flags specification.</div><div class='del'>-Note also that there is no convenient syntax to remove all</div><div class='del'>-the flags at once, you need to use "-flmpt".</div><div class='add'>+Note the regexp ^[-+=][flmpt_]+$ matches a flags specification.</div><div class='add'>+To clear all flags at once, use "=_" or "-flmpt".</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Debug messages during boot process</div><div class='add'>+Debug messages during Boot Process</div><div class='ctx'> ==================================</div><div class='ctx'> </div><div class='del'>-To be able to activate debug messages during the boot process,</div><div class='del'>-even before userspace and debugfs exists, use the boot parameter:</div><div class='del'>-ddebug_query="QUERY"</div><div class='add'>+To activate debug messages for core code and built-in modules during</div><div class='add'>+the boot process, even before userspace and debugfs exists, use</div><div class='add'>+dyndbg="QUERY", module.dyndbg="QUERY", or ddebug_query="QUERY"</div><div class='add'>+(ddebug_query is obsoleted by dyndbg, and deprecated).  QUERY follows</div><div class='add'>+the syntax described above, but must not exceed 1023 characters.  Your</div><div class='add'>+bootloader may impose lower limits.</div><div class='add'>+</div><div class='add'>+These dyndbg params are processed just after the ddebug tables are</div><div class='add'>+processed, as part of the arch_initcall.  Thus you can enable debug</div><div class='add'>+messages in all code run after this arch_initcall via this boot</div><div class='add'>+parameter.</div><div class='ctx'> </div><div class='del'>-QUERY follows the syntax described above, but must not exceed 1023</div><div class='del'>-characters. The enablement of debug messages is done as an arch_initcall.</div><div class='del'>-Thus you can enable debug messages in all code processed after this</div><div class='del'>-arch_initcall via this boot parameter.</div><div class='ctx'> On an x86 system for example ACPI enablement is a subsys_initcall and</div><div class='del'>-ddebug_query="file ec.c +p"</div><div class='add'>+   dyndbg="file ec.c +p"</div><div class='ctx'> will show early Embedded Controller transactions during ACPI setup if</div><div class='ctx'> your machine (typically a laptop) has an Embedded Controller.</div><div class='ctx'> PCI (or other devices) initialization also is a hot candidate for using</div><div class='ctx'> this boot parameter for debugging purposes.</div><div class='ctx'> </div><div class='add'>+If foo module is not built-in, foo.dyndbg will still be processed at</div><div class='add'>+boot time, without effect, but will be reprocessed when module is</div><div class='add'>+loaded later.  dyndbg_query= and bare dyndbg= are only processed at</div><div class='add'>+boot.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Debug Messages at Module Initialization Time</div><div class='add'>+============================================</div><div class='add'>+</div><div class='add'>+When "modprobe foo" is called, modprobe scans /proc/cmdline for</div><div class='add'>+foo.params, strips "foo.", and passes them to the kernel along with</div><div class='add'>+params given in modprobe args or /etc/modprob.d/*.conf files,</div><div class='add'>+in the following order:</div><div class='add'>+</div><div class='add'>+1. # parameters given via /etc/modprobe.d/*.conf</div><div class='add'>+   options foo dyndbg=+pt</div><div class='add'>+   options foo dyndbg # defaults to +p</div><div class='add'>+</div><div class='add'>+2. # foo.dyndbg as given in boot args, "foo." is stripped and passed</div><div class='add'>+   foo.dyndbg=" func bar +p; func buz +mp"</div><div class='add'>+</div><div class='add'>+3. # args to modprobe</div><div class='add'>+   modprobe foo dyndbg==pmf # override previous settings</div><div class='add'>+</div><div class='add'>+These dyndbg queries are applied in order, with last having final say.</div><div class='add'>+This allows boot args to override or modify those from /etc/modprobe.d</div><div class='add'>+(sensible, since 1 is system wide, 2 is kernel or boot specific), and</div><div class='add'>+modprobe args to override both.</div><div class='add'>+</div><div class='add'>+In the foo.dyndbg="QUERY" form, the query must exclude "module foo".</div><div class='add'>+"foo" is extracted from the param-name, and applied to each query in</div><div class='add'>+"QUERY", and only 1 match-spec of each type is allowed.</div><div class='add'>+</div><div class='add'>+The dyndbg option is a "fake" module parameter, which means:</div><div class='add'>+</div><div class='add'>+- modules do not need to define it explicitly</div><div class='add'>+- every module gets it tacitly, whether they use pr_debug or not</div><div class='add'>+- it doesnt appear in /sys/module/$module/parameters/</div><div class='add'>+  To see it, grep the control file, or inspect /proc/cmdline.</div><div class='add'>+</div><div class='add'>+For CONFIG_DYNAMIC_DEBUG kernels, any settings given at boot-time (or</div><div class='add'>+enabled by -DDEBUG flag during compilation) can be disabled later via</div><div class='add'>+the sysfs interface if the debug messages are no longer needed:</div><div class='add'>+</div><div class='add'>+   echo "module module_name -p" &gt; &lt;debugfs&gt;/dynamic_debug/control</div><div class='ctx'> </div><div class='ctx'> Examples</div><div class='ctx'> ========</div><div class='hunk'>@@ -260,3 +303,18 @@ nullarbor:~ # echo -n 'func svc_process -p' &gt;</div><div class='ctx'> // enable messages for NFS calls READ, READLINK, READDIR and READDIR+.</div><div class='ctx'> nullarbor:~ # echo -n 'format "nfsd: READ" +p' &gt;</div><div class='ctx'> 				&lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+</div><div class='add'>+// enable all messages</div><div class='add'>+nullarbor:~ # echo -n '+p' &gt; &lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+</div><div class='add'>+// add module, function to all enabled messages</div><div class='add'>+nullarbor:~ # echo -n '+mf' &gt; &lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+</div><div class='add'>+// boot-args example, with newlines and comments for readability</div><div class='add'>+Kernel command line: ...</div><div class='add'>+  // see whats going on in dyndbg=value processing</div><div class='add'>+  dynamic_debug.verbose=1</div><div class='add'>+  // enable pr_debugs in 2 builtins, #cmt is stripped</div><div class='add'>+  dyndbg="module params +p #cmt ; module sys +p"</div><div class='add'>+  // enable pr_debugs in 2 functions in a module loaded later</div><div class='add'>+  pc87360.dyndbg="func pc87360_init_device +p; func pc87360_find +p"</div><div class='head'>diff --git a/Documentation/edac.txt b/Documentation/edac.txt<br/>index fdcc49fad8e1..03df2b020332 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/edac.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/edac.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/edac.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/edac.txt</a></div><div class='hunk'>@@ -734,7 +734,7 @@ were done at i7core_edac driver. This chapter will cover those differences</div><div class='ctx'>    associated with a physical CPU socket.</div><div class='ctx'> </div><div class='ctx'>    Each MC have 3 physical read channels, 3 physical write channels and</div><div class='del'>-   3 logic channels. The driver currenty sees it as just 3 channels.</div><div class='add'>+   3 logic channels. The driver currently sees it as just 3 channels.</div><div class='ctx'>    Each channel can have up to 3 DIMMs.</div><div class='ctx'> </div><div class='ctx'>    The minimum known unity is DIMMs. There are no information about csrows.</div><div class='head'>diff --git a/Documentation/eisa.txt b/Documentation/eisa.txt<br/>index 38cf0c7b559f..a55e4910924e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/eisa.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/eisa.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/eisa.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/eisa.txt</a></div><div class='hunk'>@@ -179,7 +179,7 @@ CONFIG_ALPHA_JENSEN or CONFIG_EISA_VLB_PRIMING are set.</div><div class='ctx'> </div><div class='ctx'> Converting an EISA driver to the new API mostly involves *deleting*</div><div class='ctx'> code (since probing is now in the core EISA code). Unfortunately, most</div><div class='del'>-drivers share their probing routine between ISA, MCA and EISA. Special</div><div class='add'>+drivers share their probing routine between ISA, and EISA. Special</div><div class='ctx'> care must be taken when ripping out the EISA code, so other busses</div><div class='ctx'> won't suffer from these surgical strikes...</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/extcon/porting-android-switch-class b/Documentation/extcon/porting-android-switch-class<br/>new file mode 100644<br/>index 000000000000..eb0fa5f4fe88<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/extcon/porting-android-switch-class?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/extcon/porting-android-switch-class</a></div><div class='hunk'>@@ -0,0 +1,124 @@</div><div class='add'>+</div><div class='add'>+	Staging/Android Switch Class Porting Guide</div><div class='add'>+	(linux/drivers/staging/android/switch)</div><div class='add'>+	(c) Copyright 2012 Samsung Electronics</div><div class='add'>+</div><div class='add'>+AUTHORS</div><div class='add'>+MyungJoo Ham &lt;myungjoo.ham@samsung.com&gt;</div><div class='add'>+</div><div class='add'>+/*****************************************************************</div><div class='add'>+ * CHAPTER 1.                                                    *</div><div class='add'>+ * PORTING SWITCH CLASS DEVICE DRIVERS                           *</div><div class='add'>+ *****************************************************************/</div><div class='add'>+</div><div class='add'>+****** STEP 1. Basic Functionality</div><div class='add'>+	No extcon extended feature, but switch features only.</div><div class='add'>+</div><div class='add'>+- struct switch_dev (fed to switch_dev_register/unregister)</div><div class='add'>+    @name: no change</div><div class='add'>+    @dev: no change</div><div class='add'>+    @index: drop (not used in switch device driver side anyway)</div><div class='add'>+    @state: no change</div><div class='add'>+	If you have used @state with magic numbers, keep it</div><div class='add'>+	at this step.</div><div class='add'>+    @print_name: no change but type change (switch_dev-&gt;extcon_dev)</div><div class='add'>+    @print_state: no change but type change (switch_dev-&gt;extcon_dev)</div><div class='add'>+</div><div class='add'>+- switch_dev_register(sdev, dev)</div><div class='add'>+	=&gt; extcon_dev_register(edev, dev)</div><div class='add'>+	: no change but type change (sdev-&gt;edev)</div><div class='add'>+- switch_dev_unregister(sdev)</div><div class='add'>+	=&gt; extcon_dev_unregister(edev)</div><div class='add'>+	: no change but type change (sdev-&gt;edev)</div><div class='add'>+- switch_get_state(sdev)</div><div class='add'>+	=&gt; extcon_get_state(edev)</div><div class='add'>+	: no change but type change (sdev-&gt;edev) and (return: int-&gt;u32)</div><div class='add'>+- switch_set_state(sdev, state)</div><div class='add'>+	=&gt; extcon_set_state(edev, state)</div><div class='add'>+	: no change but type change (sdev-&gt;edev) and (state: int-&gt;u32)</div><div class='add'>+</div><div class='add'>+With this changes, the ex-switch extcon class device works as it once</div><div class='add'>+worked as switch class device. However, it will now have additional</div><div class='add'>+interfaces (both ABI and in-kernel API) and different ABI locations.</div><div class='add'>+However, if CONFIG_ANDROID is enabled without CONFIG_ANDROID_SWITCH,</div><div class='add'>+/sys/class/switch/* will be symbolically linked to /sys/class/extcon/</div><div class='add'>+so that they are still compatible with legacy userspace processes.</div><div class='add'>+</div><div class='add'>+****** STEP 2. Multistate (no more magic numbers in state value)</div><div class='add'>+	Extcon's extended features for switch device drivers with</div><div class='add'>+	complex features usually required magic numbers in state</div><div class='add'>+	value of switch_dev. With extcon, such magic numbers that</div><div class='add'>+	support multiple cables (</div><div class='add'>+</div><div class='add'>+  1. Define cable names at edev-&gt;supported_cable.</div><div class='add'>+  2. (Recommended) remove print_state callback.</div><div class='add'>+  3. Use extcon_get_cable_state_(edev, index) or</div><div class='add'>+   extcon_get_cable_state(edev, cable_name) instead of</div><div class='add'>+   extcon_get_state(edev) if you intend to get a state of a specific</div><div class='add'>+   cable. Same for set_state. This way, you can remove the usage of</div><div class='add'>+   magic numbers in state value.</div><div class='add'>+  4. Use extcon_update_state() if you are updating specific bits of</div><div class='add'>+   the state value.</div><div class='add'>+</div><div class='add'>+Example: a switch device driver w/ magic numbers for two cables.</div><div class='add'>+	"0x00": no cables connected.</div><div class='add'>+	"0x01": cable 1 connected</div><div class='add'>+	"0x02": cable 2 connected</div><div class='add'>+	"0x03": cable 1 and 2 connected</div><div class='add'>+  1. edev-&gt;supported_cable = {"1", "2", NULL};</div><div class='add'>+  2. edev-&gt;print_state = NULL;</div><div class='add'>+  3. extcon_get_cable_state_(edev, 0) shows cable 1's state.</div><div class='add'>+     extcon_get_cable_state(edev, "1") shows cable 1's state.</div><div class='add'>+     extcon_set_cable_state_(edev, 1) sets cable 2's state.</div><div class='add'>+     extcon_set_cable_state(edev, "2") sets cable 2's state</div><div class='add'>+  4. extcon_update_state(edev, 0x01, 0) sets the least bit's 0.</div><div class='add'>+</div><div class='add'>+****** STEP 3. Notify other device drivers</div><div class='add'>+</div><div class='add'>+  You can notify others of the cable attach/detach events with</div><div class='add'>+notifier chains.</div><div class='add'>+</div><div class='add'>+  At the side of other device drivers (the extcon device itself</div><div class='add'>+does not need to get notified of its own events), there are two</div><div class='add'>+methods to register notifier_block for cable events:</div><div class='add'>+(a) for a specific cable or (b) for every cable.</div><div class='add'>+</div><div class='add'>+  (a) extcon_register_interest(obj, extcon_name, cable_name, nb)</div><div class='add'>+	Example: want to get news of "MAX8997_MUIC"'s "USB" cable</div><div class='add'>+</div><div class='add'>+	obj = kzalloc(sizeof(struct extcon_specific_cable_nb),</div><div class='add'>+		      GFP_KERNEL);</div><div class='add'>+	nb-&gt;notifier_call = the_callback_to_handle_usb;</div><div class='add'>+</div><div class='add'>+	extcon_register_intereset(obj, "MAX8997_MUIC", "USB", nb);</div><div class='add'>+</div><div class='add'>+  (b) extcon_register_notifier(edev, nb)</div><div class='add'>+	Call nb for any changes in edev.</div><div class='add'>+</div><div class='add'>+  Please note that in order to properly behave with method (a),</div><div class='add'>+the extcon device driver should support multistate feature (STEP 2).</div><div class='add'>+</div><div class='add'>+****** STEP 4. Inter-cable relation (mutually exclusive)</div><div class='add'>+</div><div class='add'>+  You can provide inter-cable mutually exclusiveness information</div><div class='add'>+for an extcon device. When cables A and B are declared to be mutually</div><div class='add'>+exclusive, the two cables cannot be in ATTACHED state simulteneously.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*****************************************************************</div><div class='add'>+ * CHAPTER 2.                                                    *</div><div class='add'>+ * PORTING USERSPACE w/ SWITCH CLASS DEVICE SUPPORT              *</div><div class='add'>+ *****************************************************************/</div><div class='add'>+</div><div class='add'>+****** ABI Location</div><div class='add'>+</div><div class='add'>+  If "CONFIG_ANDROID" is enabled and "CONFIG_ANDROID_SWITCH" is</div><div class='add'>+disabled, /sys/class/switch/* are created as symbolic links to</div><div class='add'>+/sys/class/extcon/*. Because CONFIG_ANDROID_SWITCH creates</div><div class='add'>+/sys/class/switch directory, we disable symboling linking if</div><div class='add'>+CONFIG_ANDROID_SWITCH is enabled.</div><div class='add'>+</div><div class='add'>+  The two files of switch class, name and state, are provided with</div><div class='add'>+extcon, too. When the multistate support (STEP 2 of CHAPTER 1.) is</div><div class='add'>+not enabled or print_state callback is supplied, the output of</div><div class='add'>+state ABI is same with switch class.</div><div class='head'>diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt<br/>index 03ca210406ed..56000b33340b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/feature-removal-schedule.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/feature-removal-schedule.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/feature-removal-schedule.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/feature-removal-schedule.txt</a></div><div class='hunk'>@@ -2,7 +2,14 @@ The following is a list of files and features that are going to be</div><div class='ctx'> removed in the kernel source tree.  Every entry should contain what</div><div class='ctx'> exactly is going away, why it is happening, and who is going to be doing</div><div class='ctx'> the work.  When the feature is removed from the kernel, it should also</div><div class='del'>-be removed from this file.</div><div class='add'>+be removed from this file.  The suggested deprecation period is 3 releases.</div><div class='add'>+</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+What:	ddebug_query="query" boot cmdline param</div><div class='add'>+When:	v3.8</div><div class='add'>+Why:	obsoleted by dyndbg="query" and module.dyndbg="query"</div><div class='add'>+Who:	Jim Cromie &lt;jim.cromie@gmail.com&gt;, Jason Baron &lt;jbaron@redhat.com&gt;</div><div class='ctx'> </div><div class='ctx'> ---------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -534,8 +541,74 @@ Who:	Kees Cook &lt;keescook@chromium.org&gt;</div><div class='ctx'> </div><div class='ctx'> ----------------------------</div><div class='ctx'> </div><div class='add'>+What:	Removing the pn544 raw driver.</div><div class='add'>+When:	3.6</div><div class='add'>+Why:	With the introduction of the NFC HCI and SHDL kernel layers, pn544.c</div><div class='add'>+	is being replaced by pn544_hci.c which is accessible through the netlink</div><div class='add'>+	and socket NFC APIs. Moreover, pn544.c is outdated and does not seem to</div><div class='add'>+	work properly with the latest Android stacks.</div><div class='add'>+	Having 2 drivers for the same hardware is confusing and as such we</div><div class='add'>+	should only keep the one following the kernel NFC APIs.</div><div class='add'>+Who:	Samuel Ortiz &lt;sameo@linux.intel.com&gt;</div><div class='add'>+</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='ctx'> What:	setitimer accepts user NULL pointer (value)</div><div class='ctx'> When:	3.6</div><div class='ctx'> Why:	setitimer is not returning -EFAULT if user pointer is NULL. This</div><div class='ctx'> 	violates the spec.</div><div class='ctx'> Who:	Sasikantha Babu &lt;sasikanth.v19@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+What:	remove bogus DV presets V4L2_DV_1080I29_97, V4L2_DV_1080I30 and</div><div class='add'>+	V4L2_DV_1080I25</div><div class='add'>+When:	3.6</div><div class='add'>+Why:	These HDTV formats do not exist and were added by a confused mind</div><div class='add'>+	(that was me, to be precise...)</div><div class='add'>+Who:	Hans Verkuil &lt;hans.verkuil@cisco.com&gt;</div><div class='add'>+</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+What:	V4L2_CID_HCENTER, V4L2_CID_VCENTER V4L2 controls</div><div class='add'>+When:	3.7</div><div class='add'>+Why:	The V4L2_CID_VCENTER, V4L2_CID_HCENTER controls have been deprecated</div><div class='add'>+	for about 4 years and they are not used by any mainline driver.</div><div class='add'>+	There are newer controls (V4L2_CID_PAN*, V4L2_CID_TILT*) that provide</div><div class='add'>+	similar	functionality.</div><div class='add'>+Who:	Sylwester Nawrocki &lt;sylvester.nawrocki@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+What:	cgroup option updates via remount</div><div class='add'>+When:	March 2013</div><div class='add'>+Why:	Remount currently allows changing bound subsystems and</div><div class='add'>+	release_agent.  Rebinding is hardly useful as it only works</div><div class='add'>+	when the hierarchy is empty and release_agent itself should be</div><div class='add'>+	replaced with conventional fsnotify.</div><div class='add'>+</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+What:	KVM debugfs statistics</div><div class='add'>+When:	2013</div><div class='add'>+Why:	KVM tracepoints provide mostly equivalent information in a much more</div><div class='add'>+        flexible fashion.</div><div class='add'>+</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+What:	at91-mci driver ("CONFIG_MMC_AT91")</div><div class='add'>+When:	3.7</div><div class='add'>+Why:	There are two mci drivers: at91-mci and atmel-mci. The PDC support</div><div class='add'>+	was added to atmel-mci as a first step to support more chips.</div><div class='add'>+	Then at91-mci was kept only for old IP versions (on at91rm9200 and</div><div class='add'>+	at91sam9261). The support of these IP versions has just been added</div><div class='add'>+	to atmel-mci, so atmel-mci can be used for all chips.</div><div class='add'>+Who:	Ludovic Desroches &lt;ludovic.desroches@atmel.com&gt;</div><div class='add'>+</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+What:	net/wanrouter/</div><div class='add'>+When:	June 2013</div><div class='add'>+Why:	Unsupported/unmaintained/unused since 2.6</div><div class='add'>+</div><div class='add'>+----------------------------</div><div class='head'>diff --git a/Documentation/filesystems/Locking b/Documentation/filesystems/Locking<br/>index 4fca82e5276e..8e2da1e06e3b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/Locking?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/filesystems/Locking</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/Locking?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/Locking</a></div><div class='hunk'>@@ -60,8 +60,8 @@ ata *);</div><div class='ctx'> 	ssize_t (*getxattr) (struct dentry *, const char *, void *, size_t);</div><div class='ctx'> 	ssize_t (*listxattr) (struct dentry *, char *, size_t);</div><div class='ctx'> 	int (*removexattr) (struct dentry *, const char *);</div><div class='del'>-	void (*truncate_range)(struct inode *, loff_t, loff_t);</div><div class='ctx'> 	int (*fiemap)(struct inode *, struct fiemap_extent_info *, u64 start, u64 len);</div><div class='add'>+	void (*update_time)(struct inode *, struct timespec *, int);</div><div class='ctx'> </div><div class='ctx'> locking rules:</div><div class='ctx'> 	all may block</div><div class='hunk'>@@ -87,8 +87,9 @@ setxattr:	yes</div><div class='ctx'> getxattr:	no</div><div class='ctx'> listxattr:	no</div><div class='ctx'> removexattr:	yes</div><div class='del'>-truncate_range:	yes</div><div class='ctx'> fiemap:		no</div><div class='add'>+update_time:	no</div><div class='add'>+</div><div class='ctx'> 	Additionally, -&gt;rmdir(), -&gt;unlink() and -&gt;rename() have -&gt;i_mutex on</div><div class='ctx'> victim.</div><div class='ctx'> 	cross-directory -&gt;rename() has (per-superblock) -&gt;s_vfs_rename_sem.</div><div class='head'>diff --git a/Documentation/filesystems/ext3.txt b/Documentation/filesystems/ext3.txt<br/>index b100adc38adb..293855e95000 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/ext3.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/filesystems/ext3.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/ext3.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/ext3.txt</a></div><div class='hunk'>@@ -59,9 +59,9 @@ commit=nrsec	(*)	Ext3 can be told to sync all its data and metadata</div><div class='ctx'> 			Setting it to very large values will improve</div><div class='ctx'> 			performance.</div><div class='ctx'> </div><div class='del'>-barrier=&lt;0(*)|1&gt;	This enables/disables the use of write barriers in</div><div class='del'>-barrier			the jbd code.  barrier=0 disables, barrier=1 enables.</div><div class='del'>-nobarrier	(*)	This also requires an IO stack which can support</div><div class='add'>+barrier=&lt;0|1(*)&gt;	This enables/disables the use of write barriers in</div><div class='add'>+barrier	(*)		the jbd code.  barrier=0 disables, barrier=1 enables.</div><div class='add'>+nobarrier		This also requires an IO stack which can support</div><div class='ctx'> 			barriers, and if jbd gets an error on a barrier</div><div class='ctx'> 			write, it will disable again with a warning.</div><div class='ctx'> 			Write barriers enforce proper on-disk ordering</div><div class='head'>diff --git a/Documentation/filesystems/gfs2-glocks.txt b/Documentation/filesystems/gfs2-glocks.txt<br/>index 0494f78d87e4..fcc79957be63 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/gfs2-glocks.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/filesystems/gfs2-glocks.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/gfs2-glocks.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/gfs2-glocks.txt</a></div><div class='hunk'>@@ -61,7 +61,9 @@ go_unlock        | Called on the final local unlock of a lock</div><div class='ctx'> go_dump          | Called to print content of object for debugfs file, or on</div><div class='ctx'>                  | error to dump glock to the log.</div><div class='ctx'> go_type          | The type of the glock, LM_TYPE_.....</div><div class='del'>-go_min_hold_time | The minimum hold time</div><div class='add'>+go_callback	 | Called if the DLM sends a callback to drop this lock</div><div class='add'>+go_flags	 | GLOF_ASPACE is set, if the glock has an address space</div><div class='add'>+                 | associated with it</div><div class='ctx'> </div><div class='ctx'> The minimum hold time for each lock is the time after a remote lock</div><div class='ctx'> grant for which we ignore remote demote requests. This is in order to</div><div class='hunk'>@@ -89,6 +91,7 @@ go_demote_ok  |       Sometimes         |       Yes</div><div class='ctx'> go_lock       |       Yes               |       No</div><div class='ctx'> go_unlock     |       Yes               |       No</div><div class='ctx'> go_dump       |       Sometimes         |       Yes</div><div class='add'>+go_callback   |       Sometimes (N/A)   |       Yes</div><div class='ctx'> </div><div class='ctx'> N.B. Operations must not drop either the bit lock or the spinlock</div><div class='ctx'> if its held on entry. go_dump and do_demote_ok must never block.</div><div class='hunk'>@@ -111,4 +114,118 @@ itself (locking order as above), and the other, known as the iopen</div><div class='ctx'> glock is used in conjunction with the i_nlink field in the inode to</div><div class='ctx'> determine the lifetime of the inode in question. Locking of inodes</div><div class='ctx'> is on a per-inode basis. Locking of rgrps is on a per rgrp basis.</div><div class='add'>+In general we prefer to lock local locks prior to cluster locks.</div><div class='add'>+</div><div class='add'>+                            Glock Statistics</div><div class='add'>+                           ------------------</div><div class='add'>+</div><div class='add'>+The stats are divided into two sets: those relating to the</div><div class='add'>+super block and those relating to an individual glock. The</div><div class='add'>+super block stats are done on a per cpu basis in order to</div><div class='add'>+try and reduce the overhead of gathering them. They are also</div><div class='add'>+further divided by glock type. All timings are in nanoseconds.</div><div class='add'>+</div><div class='add'>+In the case of both the super block and glock statistics,</div><div class='add'>+the same information is gathered in each case. The super</div><div class='add'>+block timing statistics are used to provide default values for</div><div class='add'>+the glock timing statistics, so that newly created glocks</div><div class='add'>+should have, as far as possible, a sensible starting point.</div><div class='add'>+The per-glock counters are initialised to zero when the</div><div class='add'>+glock is created. The per-glock statistics are lost when</div><div class='add'>+the glock is ejected from memory.</div><div class='add'>+</div><div class='add'>+The statistics are divided into three pairs of mean and</div><div class='add'>+variance, plus two counters. The mean/variance pairs are</div><div class='add'>+smoothed exponential estimates and the algorithm used is</div><div class='add'>+one which will be very familiar to those used to calculation</div><div class='add'>+of round trip times in network code. See "TCP/IP Illustrated,</div><div class='add'>+Volume 1", W. Richard Stevens, sect 21.3, "Round-Trip Time Measurement",</div><div class='add'>+p. 299 and onwards. Also, Volume 2, Sect. 25.10, p. 838 and onwards.</div><div class='add'>+Unlike the TCP/IP Illustrated case, the mean and variance are</div><div class='add'>+not scaled, but are in units of integer nanoseconds.</div><div class='add'>+</div><div class='add'>+The three pairs of mean/variance measure the following</div><div class='add'>+things:</div><div class='add'>+</div><div class='add'>+ 1. DLM lock time (non-blocking requests)</div><div class='add'>+ 2. DLM lock time (blocking requests)</div><div class='add'>+ 3. Inter-request time (again to the DLM)</div><div class='add'>+</div><div class='add'>+A non-blocking request is one which will complete right</div><div class='add'>+away, whatever the state of the DLM lock in question. That</div><div class='add'>+currently means any requests when (a) the current state of</div><div class='add'>+the lock is exclusive, i.e. a lock demotion (b) the requested</div><div class='add'>+state is either null or unlocked (again, a demotion) or (c) the</div><div class='add'>+"try lock" flag is set. A blocking request covers all the other</div><div class='add'>+lock requests.</div><div class='add'>+</div><div class='add'>+There are two counters. The first is there primarily to show</div><div class='add'>+how many lock requests have been made, and thus how much data</div><div class='add'>+has gone into the mean/variance calculations. The other counter</div><div class='add'>+is counting queuing of holders at the top layer of the glock</div><div class='add'>+code. Hopefully that number will be a lot larger than the number</div><div class='add'>+of dlm lock requests issued.</div><div class='add'>+</div><div class='add'>+So why gather these statistics? There are several reasons</div><div class='add'>+we'd like to get a better idea of these timings:</div><div class='add'>+</div><div class='add'>+1. To be able to better set the glock "min hold time"</div><div class='add'>+2. To spot performance issues more easily</div><div class='add'>+3. To improve the algorithm for selecting resource groups for</div><div class='add'>+allocation (to base it on lock wait time, rather than blindly</div><div class='add'>+using a "try lock")</div><div class='add'>+</div><div class='add'>+Due to the smoothing action of the updates, a step change in</div><div class='add'>+some input quantity being sampled will only fully be taken</div><div class='add'>+into account after 8 samples (or 4 for the variance) and this</div><div class='add'>+needs to be carefully considered when interpreting the</div><div class='add'>+results.</div><div class='add'>+</div><div class='add'>+Knowing both the time it takes a lock request to complete and</div><div class='add'>+the average time between lock requests for a glock means we</div><div class='add'>+can compute the total percentage of the time for which the</div><div class='add'>+node is able to use a glock vs. time that the rest of the</div><div class='add'>+cluster has its share. That will be very useful when setting</div><div class='add'>+the lock min hold time.</div><div class='add'>+</div><div class='add'>+Great care has been taken to ensure that we</div><div class='add'>+measure exactly the quantities that we want, as accurately</div><div class='add'>+as possible. There are always inaccuracies in any</div><div class='add'>+measuring system, but I hope this is as accurate as we</div><div class='add'>+can reasonably make it.</div><div class='add'>+</div><div class='add'>+Per sb stats can be found here:</div><div class='add'>+/sys/kernel/debug/gfs2/&lt;fsname&gt;/sbstats</div><div class='add'>+Per glock stats can be found here:</div><div class='add'>+/sys/kernel/debug/gfs2/&lt;fsname&gt;/glstats</div><div class='add'>+</div><div class='add'>+Assuming that debugfs is mounted on /sys/kernel/debug and also</div><div class='add'>+that &lt;fsname&gt; is replaced with the name of the gfs2 filesystem</div><div class='add'>+in question.</div><div class='add'>+</div><div class='add'>+The abbreviations used in the output as are follows:</div><div class='add'>+</div><div class='add'>+srtt     - Smoothed round trip time for non-blocking dlm requests</div><div class='add'>+srttvar  - Variance estimate for srtt</div><div class='add'>+srttb    - Smoothed round trip time for (potentially) blocking dlm requests</div><div class='add'>+srttvarb - Variance estimate for srttb</div><div class='add'>+sirt     - Smoothed inter-request time (for dlm requests)</div><div class='add'>+sirtvar  - Variance estimate for sirt</div><div class='add'>+dlm      - Number of dlm requests made (dcnt in glstats file)</div><div class='add'>+queue    - Number of glock requests queued (qcnt in glstats file)</div><div class='add'>+</div><div class='add'>+The sbstats file contains a set of these stats for each glock type (so 8 lines</div><div class='add'>+for each type) and for each cpu (one column per cpu). The glstats file contains</div><div class='add'>+a set of these stats for each glock in a similar format to the glocks file, but</div><div class='add'>+using the format mean/variance for each of the timing stats.</div><div class='add'>+</div><div class='add'>+The gfs2_glock_lock_time tracepoint prints out the current values of the stats</div><div class='add'>+for the glock in question, along with some addition information on each dlm</div><div class='add'>+reply that is received:</div><div class='add'>+</div><div class='add'>+status - The status of the dlm request</div><div class='add'>+flags  - The dlm request flags</div><div class='add'>+tdiff  - The time taken by this specific request</div><div class='add'>+(remaining fields as per above list)</div><div class='add'>+</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/gfs2.txt b/Documentation/filesystems/gfs2.txt<br/>index 4cda926628aa..cc4f2306609e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/gfs2.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/filesystems/gfs2.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/gfs2.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/gfs2.txt</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> Global File System</div><div class='ctx'> ------------------</div><div class='ctx'> </div><div class='del'>-http://sources.redhat.com/cluster/wiki/</div><div class='add'>+https://fedorahosted.org/cluster/wiki/HomePage</div><div class='ctx'> </div><div class='ctx'> GFS is a cluster file system. It allows a cluster of computers to</div><div class='ctx'> simultaneously use a block device that is shared between them (with FC,</div><div class='hunk'>@@ -30,7 +30,8 @@ needed, simply:</div><div class='ctx'> </div><div class='ctx'> If you are using Fedora, you need to install the gfs2-utils package</div><div class='ctx'> and, for lock_dlm, you will also need to install the cman package</div><div class='del'>-and write a cluster.conf as per the documentation.</div><div class='add'>+and write a cluster.conf as per the documentation. For F17 and above</div><div class='add'>+cman has been replaced by the dlm package.</div><div class='ctx'> </div><div class='ctx'> GFS2 is not on-disk compatible with previous versions of GFS, but it</div><div class='ctx'> is pretty close.</div><div class='hunk'>@@ -39,8 +40,6 @@ The following man pages can be found at the URL above:</div><div class='ctx'>   fsck.gfs2		to repair a filesystem</div><div class='ctx'>   gfs2_grow		to expand a filesystem online</div><div class='ctx'>   gfs2_jadd		to add journals to a filesystem online</div><div class='del'>-  gfs2_tool		to manipulate, examine and tune a filesystem</div><div class='del'>-  gfs2_quota	to examine and change quota values in a filesystem</div><div class='add'>+  tunegfs2		to manipulate, examine and tune a filesystem</div><div class='ctx'>   gfs2_convert	to convert a gfs filesystem to gfs2 in-place</div><div class='del'>-  mount.gfs2	to help mount(8) mount a filesystem</div><div class='ctx'>   mkfs.gfs2		to make a filesystem</div><div class='head'>diff --git a/Documentation/filesystems/nfs/pnfs.txt b/Documentation/filesystems/nfs/pnfs.txt<br/>index c7919c6e3bea..52ae07f5f578 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/nfs/pnfs.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/filesystems/nfs/pnfs.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/nfs/pnfs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/nfs/pnfs.txt</a></div><div class='hunk'>@@ -93,7 +93,7 @@ The API to the login script is as follows:</div><div class='ctx'> 				(allways exists)</div><div class='ctx'> 				(More protocols can be defined in the future.</div><div class='ctx'> 				 The client does not interpret this string it is</div><div class='del'>-				 passed unchanged as recieved from the Server)</div><div class='add'>+				 passed unchanged as received from the Server)</div><div class='ctx'> 		-o		osdname of the requested target OSD</div><div class='ctx'> 				(Might be empty)</div><div class='ctx'> 				(A string which denotes the OSD name, there is a</div><div class='head'>diff --git a/Documentation/filesystems/porting b/Documentation/filesystems/porting<br/>index 74acd9618819..8c91d1057d9a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/porting?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/filesystems/porting</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/porting?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/porting</a></div><div class='hunk'>@@ -297,7 +297,8 @@ in the beginning of -&gt;setattr unconditionally.</div><div class='ctx'> be used instead.  It gets called whenever the inode is evicted, whether it has</div><div class='ctx'> remaining links or not.  Caller does *not* evict the pagecache or inode-associated</div><div class='ctx'> metadata buffers; getting rid of those is responsibility of method, as it had</div><div class='del'>-been for -&gt;delete_inode().</div><div class='add'>+been for -&gt;delete_inode(). Caller makes sure async writeback cannot be running</div><div class='add'>+for the inode while (or after) -&gt;evict_inode() is called.</div><div class='ctx'> </div><div class='ctx'> 	-&gt;drop_inode() returns int now; it's called on final iput() with</div><div class='ctx'> inode-&gt;i_lock held and it returns true if filesystems wants the inode to be</div><div class='hunk'>@@ -306,14 +307,11 @@ updated appropriately.  generic_delete_inode() is also alive and it consists</div><div class='ctx'> simply of return 1.  Note that all actual eviction work is done by caller after</div><div class='ctx'> -&gt;drop_inode() returns.</div><div class='ctx'> </div><div class='del'>-	clear_inode() is gone; use end_writeback() instead.  As before, it must</div><div class='del'>-be called exactly once on each call of -&gt;evict_inode() (as it used to be for</div><div class='del'>-each call of -&gt;delete_inode()).  Unlike before, if you are using inode-associated</div><div class='del'>-metadata buffers (i.e. mark_buffer_dirty_inode()), it's your responsibility to</div><div class='del'>-call invalidate_inode_buffers() before end_writeback().</div><div class='del'>-	No async writeback (and thus no calls of -&gt;write_inode()) will happen</div><div class='del'>-after end_writeback() returns, so actions that should not overlap with -&gt;write_inode()</div><div class='del'>-(e.g. freeing on-disk inode if i_nlink is 0) ought to be done after that call.</div><div class='add'>+	As before, clear_inode() must be called exactly once on each call of</div><div class='add'>+-&gt;evict_inode() (as it used to be for each call of -&gt;delete_inode()).  Unlike</div><div class='add'>+before, if you are using inode-associated metadata buffers (i.e.</div><div class='add'>+mark_buffer_dirty_inode()), it's your responsibility to call</div><div class='add'>+invalidate_inode_buffers() before clear_inode().</div><div class='ctx'> </div><div class='ctx'> 	NOTE: checking i_nlink in the beginning of -&gt;write_inode() and bailing out</div><div class='ctx'> if it's zero is not *and* *never* *had* *been* enough.  Final unlink() and iput()</div><div class='head'>diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt<br/>index b7413cb46dcb..fb0a6aeb936c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/proc.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/filesystems/proc.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/proc.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/proc.txt</a></div><div class='hunk'>@@ -40,6 +40,7 @@ Table of Contents</div><div class='ctx'>   3.4	/proc/&lt;pid&gt;/coredump_filter - Core dump filtering settings</div><div class='ctx'>   3.5	/proc/&lt;pid&gt;/mountinfo - Information about mounts</div><div class='ctx'>   3.6	/proc/&lt;pid&gt;/comm  &amp; /proc/&lt;pid&gt;/task/&lt;tid&gt;/comm</div><div class='add'>+  3.7   /proc/&lt;pid&gt;/task/&lt;tid&gt;/children - Information about task children</div><div class='ctx'> </div><div class='ctx'>   4	Configuring procfs</div><div class='ctx'>   4.1	Mount options</div><div class='hunk'>@@ -310,6 +311,11 @@ Table 1-4: Contents of the stat files (as of 2.6.30-rc7)</div><div class='ctx'>   start_data    address above which program data+bss is placed</div><div class='ctx'>   end_data      address below which program data+bss is placed</div><div class='ctx'>   start_brk     address above which program heap can be expanded with brk()</div><div class='add'>+  arg_start     address above which program command line is placed</div><div class='add'>+  arg_end       address below which program command line is placed</div><div class='add'>+  env_start     address above which program environment is placed</div><div class='add'>+  env_end       address below which program environment is placed</div><div class='add'>+  exit_code     the thread's exit_code in the form reported by the waitpid system call</div><div class='ctx'> ..............................................................................</div><div class='ctx'> </div><div class='ctx'> The /proc/PID/maps file containing the currently mapped memory regions and</div><div class='hunk'>@@ -743,6 +749,7 @@ Committed_AS:   100056 kB</div><div class='ctx'> VmallocTotal:   112216 kB</div><div class='ctx'> VmallocUsed:       428 kB</div><div class='ctx'> VmallocChunk:   111088 kB</div><div class='add'>+AnonHugePages:   49152 kB</div><div class='ctx'> </div><div class='ctx'>     MemTotal: Total usable ram (i.e. physical ram minus a few reserved</div><div class='ctx'>               bits and the kernel binary code)</div><div class='hunk'>@@ -776,6 +783,7 @@ VmallocChunk:   111088 kB</div><div class='ctx'>        Dirty: Memory which is waiting to get written back to the disk</div><div class='ctx'>    Writeback: Memory which is actively being written back to the disk</div><div class='ctx'>    AnonPages: Non-file backed pages mapped into userspace page tables</div><div class='add'>+AnonHugePages: Non-file backed huge pages mapped into userspace page tables</div><div class='ctx'>       Mapped: files which have been mmaped, such as libraries</div><div class='ctx'>         Slab: in-kernel data structures cache</div><div class='ctx'> SReclaimable: Part of Slab, that might be reclaimed, such as caches</div><div class='hunk'>@@ -996,7 +1004,6 @@ Table 1-9: Network info in /proc/net</div><div class='ctx'>  snmp          SNMP data                                                       </div><div class='ctx'>  sockstat      Socket statistics                                               </div><div class='ctx'>  tcp           TCP  sockets                                                    </div><div class='del'>- tr_rif        Token ring RIF routing table                                    </div><div class='ctx'>  udp           UDP sockets                                                     </div><div class='ctx'>  unix          UNIX domain sockets                                             </div><div class='ctx'>  wireless      Wireless interface data (Wavelan etc)                           </div><div class='hunk'>@@ -1577,6 +1584,23 @@ then the kernel's TASK_COMM_LEN (currently 16 chars) will result in a truncated</div><div class='ctx'> comm value.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+3.7	/proc/&lt;pid&gt;/task/&lt;tid&gt;/children - Information about task children</div><div class='add'>+-------------------------------------------------------------------------</div><div class='add'>+This file provides a fast way to retrieve first level children pids</div><div class='add'>+of a task pointed by &lt;pid&gt;/&lt;tid&gt; pair. The format is a space separated</div><div class='add'>+stream of pids.</div><div class='add'>+</div><div class='add'>+Note the "first level" here -- if a child has own children they will</div><div class='add'>+not be listed here, one needs to read /proc/&lt;children-pid&gt;/task/&lt;tid&gt;/children</div><div class='add'>+to obtain the descendants.</div><div class='add'>+</div><div class='add'>+Since this interface is intended to be fast and cheap it doesn't</div><div class='add'>+guarantee to provide precise results and some children might be</div><div class='add'>+skipped, especially if they've exited right after we printed their</div><div class='add'>+pids, so one need to either stop or freeze processes being inspected</div><div class='add'>+if precise results are needed.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> ------------------------------------------------------------------------------</div><div class='ctx'> Configuring procfs</div><div class='ctx'> ------------------------------------------------------------------------------</div><div class='head'>diff --git a/Documentation/filesystems/qnx6.txt b/Documentation/filesystems/qnx6.txt<br/>index 050223ea03c7..e59f2f09f56e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/qnx6.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/filesystems/qnx6.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/qnx6.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/qnx6.txt</a></div><div class='hunk'>@@ -17,7 +17,7 @@ concepts of blocks, inodes and directories.</div><div class='ctx'> On QNX it is possible to create little endian and big endian qnx6 filesystems.</div><div class='ctx'> This feature makes it possible to create and use a different endianness fs</div><div class='ctx'> for the target (QNX is used on quite a range of embedded systems) plattform</div><div class='del'>-running on a different endianess.</div><div class='add'>+running on a different endianness.</div><div class='ctx'> The Linux driver handles endianness transparently. (LE and BE)</div><div class='ctx'> </div><div class='ctx'> Blocks</div><div class='hunk'>@@ -26,7 +26,7 @@ Blocks</div><div class='ctx'> The space in the device or file is split up into blocks. These are a fixed</div><div class='ctx'> size of 512, 1024, 2048 or 4096, which is decided when the filesystem is</div><div class='ctx'> created.</div><div class='del'>-Blockpointers are 32bit, so the maximum space that can be adressed is</div><div class='add'>+Blockpointers are 32bit, so the maximum space that can be addressed is</div><div class='ctx'> 2^32 * 4096 bytes or 16TB</div><div class='ctx'> </div><div class='ctx'> The superblocks</div><div class='hunk'>@@ -47,16 +47,16 @@ inactive superblock.</div><div class='ctx'> Each superblock holds a set of root inodes for the different filesystem</div><div class='ctx'> parts. (Inode, Bitmap and Longfilenames)</div><div class='ctx'> Each of these root nodes holds information like total size of the stored</div><div class='del'>-data and the adressing levels in that specific tree.</div><div class='del'>-If the level value is 0, up to 16 direct blocks can be adressed by each</div><div class='add'>+data and the addressing levels in that specific tree.</div><div class='add'>+If the level value is 0, up to 16 direct blocks can be addressed by each</div><div class='ctx'> node.</div><div class='del'>-Level 1 adds an additional indirect adressing level where each indirect</div><div class='del'>-adressing block holds up to blocksize / 4 bytes pointers to data blocks.</div><div class='del'>-Level 2 adds an additional indirect adressig block level (so, already up</div><div class='del'>-to 16 * 256 * 256 = 1048576 blocks that can be adressed by such a tree)a</div><div class='add'>+Level 1 adds an additional indirect addressing level where each indirect</div><div class='add'>+addressing block holds up to blocksize / 4 bytes pointers to data blocks.</div><div class='add'>+Level 2 adds an additional indirect addressing block level (so, already up</div><div class='add'>+to 16 * 256 * 256 = 1048576 blocks that can be addressed by such a tree).</div><div class='ctx'> </div><div class='ctx'> Unused block pointers are always set to ~0 - regardless of root node,</div><div class='del'>-indirect adressing blocks or inodes.</div><div class='add'>+indirect addressing blocks or inodes.</div><div class='ctx'> Data leaves are always on the lowest level. So no data is stored on upper</div><div class='ctx'> tree levels.</div><div class='ctx'> </div><div class='hunk'>@@ -64,7 +64,7 @@ The first Superblock is located at 0x2000. (0x2000 is the bootblock size)</div><div class='ctx'> The Audi MMI 3G first superblock directly starts at byte 0.</div><div class='ctx'> Second superblock position can either be calculated from the superblock</div><div class='ctx'> information (total number of filesystem blocks) or by taking the highest</div><div class='del'>-device address, zeroing the last 3 bytes and then substracting 0x1000 from</div><div class='add'>+device address, zeroing the last 3 bytes and then subtracting 0x1000 from</div><div class='ctx'> that address.</div><div class='ctx'> </div><div class='ctx'> 0x1000 is the size reserved for each superblock - regardless of the</div><div class='hunk'>@@ -83,8 +83,8 @@ size, number of blocks used, access time, change time and modification time.</div><div class='ctx'> Object mode field is POSIX format. (which makes things easier)</div><div class='ctx'> </div><div class='ctx'> There are also pointers to the first 16 blocks, if the object data can be</div><div class='del'>-adressed with 16 direct blocks.</div><div class='del'>-For more than 16 blocks an indirect adressing in form of another tree is</div><div class='add'>+addressed with 16 direct blocks.</div><div class='add'>+For more than 16 blocks an indirect addressing in form of another tree is</div><div class='ctx'> used. (scheme is the same as the one used for the superblock root nodes)</div><div class='ctx'> </div><div class='ctx'> The filesize is stored 64bit. Inode counting starts with 1. (whilst long</div><div class='hunk'>@@ -118,13 +118,13 @@ no block pointers and the directory file record pointing to the target file</div><div class='ctx'> inode.</div><div class='ctx'> </div><div class='ctx'> Character and block special devices do not exist in QNX as those files</div><div class='del'>-are handled by the QNX kernel/drivers and created in /dev independant of the</div><div class='add'>+are handled by the QNX kernel/drivers and created in /dev independent of the</div><div class='ctx'> underlaying filesystem.</div><div class='ctx'> </div><div class='ctx'> Long filenames</div><div class='ctx'> --------------</div><div class='ctx'> </div><div class='del'>-Long filenames are stored in a seperate adressing tree. The staring point</div><div class='add'>+Long filenames are stored in a separate addressing tree. The staring point</div><div class='ctx'> is the longfilename root node in the active superblock.</div><div class='ctx'> Each data block (tree leaves) holds one long filename. That filename is</div><div class='ctx'> limited to 510 bytes. The first two starting bytes are used as length field</div><div class='head'>diff --git a/Documentation/filesystems/vfs.txt b/Documentation/filesystems/vfs.txt<br/>index 0d0492028082..efd23f481704 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/filesystems/vfs.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/filesystems/vfs.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/filesystems/vfs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/filesystems/vfs.txt</a></div><div class='hunk'>@@ -363,7 +363,7 @@ struct inode_operations {</div><div class='ctx'> 	ssize_t (*getxattr) (struct dentry *, const char *, void *, size_t);</div><div class='ctx'> 	ssize_t (*listxattr) (struct dentry *, char *, size_t);</div><div class='ctx'> 	int (*removexattr) (struct dentry *, const char *);</div><div class='del'>-	void (*truncate_range)(struct inode *, loff_t, loff_t);</div><div class='add'>+	void (*update_time)(struct inode *, struct timespec *, int);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> Again, all methods are called without any locks being held, unless</div><div class='hunk'>@@ -472,9 +472,9 @@ otherwise noted.</div><div class='ctx'>   removexattr: called by the VFS to remove an extended attribute from</div><div class='ctx'>   	a file. This method is called by removexattr(2) system call.</div><div class='ctx'> </div><div class='del'>-  truncate_range: a method provided by the underlying filesystem to truncate a</div><div class='del'>-  	range of blocks , i.e. punch a hole somewhere in a file.</div><div class='del'>-</div><div class='add'>+  update_time: called by the VFS to update a specific time or the i_version of</div><div class='add'>+  	an inode.  If this is not defined the VFS will update the inode itself</div><div class='add'>+  	and call mark_inode_dirty_sync.</div><div class='ctx'> </div><div class='ctx'> The Address Space Object</div><div class='ctx'> ========================</div><div class='hunk'>@@ -760,7 +760,7 @@ struct file_operations</div><div class='ctx'> ----------------------</div><div class='ctx'> </div><div class='ctx'> This describes how the VFS can manipulate an open file. As of kernel</div><div class='del'>-2.6.22, the following members are defined:</div><div class='add'>+3.5, the following members are defined:</div><div class='ctx'> </div><div class='ctx'> struct file_operations {</div><div class='ctx'> 	struct module *owner;</div><div class='hunk'>@@ -790,6 +790,8 @@ struct file_operations {</div><div class='ctx'> 	int (*flock) (struct file *, int, struct file_lock *);</div><div class='ctx'> 	ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, size_t, unsigned int);</div><div class='ctx'> 	ssize_t (*splice_read)(struct file *, struct pipe_inode_info *, size_t, unsigned int);</div><div class='add'>+	int (*setlease)(struct file *, long arg, struct file_lock **);</div><div class='add'>+	long (*fallocate)(struct file *, int mode, loff_t offset, loff_t len);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> Again, all methods are called without any locks being held, unless</div><div class='hunk'>@@ -858,6 +860,11 @@ otherwise noted.</div><div class='ctx'>   splice_read: called by the VFS to splice data from file to a pipe. This</div><div class='ctx'> 	       method is used by the splice(2) system call</div><div class='ctx'> </div><div class='add'>+  setlease: called by the VFS to set or release a file lock lease.</div><div class='add'>+	    setlease has the file_lock_lock held and must not sleep.</div><div class='add'>+</div><div class='add'>+  fallocate: called by the VFS to preallocate blocks or punch a hole.</div><div class='add'>+</div><div class='ctx'> Note that the file operations are implemented by the specific</div><div class='ctx'> filesystem in which the inode resides. When opening a device node</div><div class='ctx'> (character or block special) most filesystems will call special</div><div class='head'>diff --git a/Documentation/gpio.txt b/Documentation/gpio.txt<br/>index 620a07844e8c..e08a883de36e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/gpio.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/gpio.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/gpio.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/gpio.txt</a></div><div class='hunk'>@@ -322,6 +322,9 @@ where 'flags' is currently defined to specify the following properties:</div><div class='ctx'> 	* GPIOF_OPEN_DRAIN	- gpio pin is open drain type.</div><div class='ctx'> 	* GPIOF_OPEN_SOURCE	- gpio pin is open source type.</div><div class='ctx'> </div><div class='add'>+	* GPIOF_EXPORT_DIR_FIXED	- export gpio to sysfs, keep direction</div><div class='add'>+	* GPIOF_EXPORT_DIR_CHANGEABLE	- also export, allow changing direction</div><div class='add'>+</div><div class='ctx'> since GPIOF_INIT_* are only valid when configured as output, so group valid</div><div class='ctx'> combinations as:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/hwmon/ina2xx b/Documentation/hwmon/ina2xx<br/>new file mode 100644<br/>index 000000000000..f50a6cc27616<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/hwmon/ina2xx?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/hwmon/ina2xx</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+Kernel driver ina2xx</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+  * Texas Instruments INA219</div><div class='add'>+    Prefix: 'ina219'</div><div class='add'>+    Addresses: I2C 0x40 - 0x4f</div><div class='add'>+    Datasheet: Publicly available at the Texas Instruments website</div><div class='add'>+               http://www.ti.com/</div><div class='add'>+</div><div class='add'>+  * Texas Instruments INA226</div><div class='add'>+    Prefix: 'ina226'</div><div class='add'>+    Addresses: I2C 0x40 - 0x4f</div><div class='add'>+    Datasheet: Publicly available at the Texas Instruments website</div><div class='add'>+               http://www.ti.com/</div><div class='add'>+</div><div class='add'>+Author: Lothar Felten &lt;l-felten@ti.com&gt;</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+The INA219 is a high-side current shunt and power monitor with an I2C</div><div class='add'>+interface. The INA219 monitors both shunt drop and supply voltage, with</div><div class='add'>+programmable conversion times and filtering.</div><div class='add'>+</div><div class='add'>+The INA226 is a current shunt and power monitor with an I2C interface.</div><div class='add'>+The INA226 monitors both a shunt voltage drop and bus supply voltage.</div><div class='add'>+</div><div class='add'>+The shunt value in micro-ohms can be set via platform data.</div><div class='head'>diff --git a/Documentation/hwmon/it87 b/Documentation/hwmon/it87<br/>index 23b7def21ba8..87850d86c559 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/hwmon/it87?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/hwmon/it87</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/hwmon/it87?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/hwmon/it87</a></div><div class='hunk'>@@ -30,6 +30,14 @@ Supported chips:</div><div class='ctx'>     Prefix: 'it8728'</div><div class='ctx'>     Addresses scanned: from Super I/O config space (8 I/O ports)</div><div class='ctx'>     Datasheet: Not publicly available</div><div class='add'>+  * IT8782F</div><div class='add'>+    Prefix: 'it8782'</div><div class='add'>+    Addresses scanned: from Super I/O config space (8 I/O ports)</div><div class='add'>+    Datasheet: Not publicly available</div><div class='add'>+  * IT8783E/F</div><div class='add'>+    Prefix: 'it8783'</div><div class='add'>+    Addresses scanned: from Super I/O config space (8 I/O ports)</div><div class='add'>+    Datasheet: Not publicly available</div><div class='ctx'>   * SiS950   [clone of IT8705F]</div><div class='ctx'>     Prefix: 'it87'</div><div class='ctx'>     Addresses scanned: from Super I/O config space (8 I/O ports)</div><div class='hunk'>@@ -63,7 +71,7 @@ Module Parameters</div><div class='ctx'> Hardware Interfaces</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='del'>-All the chips suported by this driver are LPC Super-I/O chips, accessed</div><div class='add'>+All the chips supported by this driver are LPC Super-I/O chips, accessed</div><div class='ctx'> through the LPC bus (ISA-like I/O ports). The IT8712F additionally has an</div><div class='ctx'> SMBus interface to the hardware monitoring functions. This driver no</div><div class='ctx'> longer supports this interface though, as it is slower and less reliable</div><div class='hunk'>@@ -75,7 +83,8 @@ Description</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='ctx'> This driver implements support for the IT8705F, IT8712F, IT8716F,</div><div class='del'>-IT8718F, IT8720F, IT8721F, IT8726F, IT8728F, IT8758E and SiS950 chips.</div><div class='add'>+IT8718F, IT8720F, IT8721F, IT8726F, IT8728F, IT8758E, IT8781F, IT8782F,</div><div class='add'>+IT8783E/F, and SiS950 chips.</div><div class='ctx'> </div><div class='ctx'> These chips are 'Super I/O chips', supporting floppy disks, infrared ports,</div><div class='ctx'> joysticks and other miscellaneous stuff. For hardware monitoring, they</div><div class='hunk'>@@ -99,11 +108,11 @@ The IT8716F, IT8718F, IT8720F, IT8721F/IT8758E and later IT8712F revisions</div><div class='ctx'> have support for 2 additional fans. The additional fans are supported by the</div><div class='ctx'> driver.</div><div class='ctx'> </div><div class='del'>-The IT8716F, IT8718F, IT8720F and IT8721F/IT8758E, and late IT8712F and</div><div class='del'>-IT8705F also have optional 16-bit tachometer counters for fans 1 to 3. This</div><div class='del'>-is better (no more fan clock divider mess) but not compatible with the older</div><div class='del'>-chips and revisions. The 16-bit tachometer mode is enabled by the driver when</div><div class='del'>-one of the above chips is detected.</div><div class='add'>+The IT8716F, IT8718F, IT8720F, IT8721F/IT8758E, IT8782F, IT8783E/F, and late</div><div class='add'>+IT8712F and IT8705F also have optional 16-bit tachometer counters for fans 1 to</div><div class='add'>+3. This is better (no more fan clock divider mess) but not compatible with the</div><div class='add'>+older chips and revisions. The 16-bit tachometer mode is enabled by the driver</div><div class='add'>+when one of the above chips is detected.</div><div class='ctx'> </div><div class='ctx'> The IT8726F is just bit enhanced IT8716F with additional hardware</div><div class='ctx'> for AMD power sequencing. Therefore the chip will appear as IT8716F</div><div class='hunk'>@@ -131,9 +140,10 @@ inputs can measure voltages between 0 and 4.08 volts, with a resolution of</div><div class='ctx'> 0.016 volt (except IT8721F/IT8758E and IT8728F: 0.012 volt.) The battery</div><div class='ctx'> voltage in8 does not have limit registers.</div><div class='ctx'> </div><div class='del'>-On the IT8721F/IT8758E, some voltage inputs are internal and scaled inside</div><div class='del'>-the chip (in7, in8 and optionally in3). The driver handles this transparently</div><div class='del'>-so user-space doesn't have to care.</div><div class='add'>+On the IT8721F/IT8758E, IT8782F, and IT8783E/F, some voltage inputs are</div><div class='add'>+internal and scaled inside the chip (in7 (optional for IT8782F and IT8783E/F),</div><div class='add'>+in8 and optionally in3). The driver handles this transparently so user-space</div><div class='add'>+doesn't have to care.</div><div class='ctx'> </div><div class='ctx'> The VID lines (IT8712F/IT8716F/IT8718F/IT8720F) encode the core voltage value:</div><div class='ctx'> the voltage level your processor should work with. This is hardcoded by</div><div class='head'>diff --git a/Documentation/hwmon/wm831x b/Documentation/hwmon/wm831x<br/>index 24f47d8f6a42..11446757c8c8 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/hwmon/wm831x?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/hwmon/wm831x</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/hwmon/wm831x?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/hwmon/wm831x</a></div><div class='hunk'>@@ -22,7 +22,7 @@ reporting of all the input values but does not provide any alarms.</div><div class='ctx'> Voltage Monitoring</div><div class='ctx'> ------------------</div><div class='ctx'> </div><div class='del'>-Voltages are sampled by a 12 bit ADC.  Voltages in milivolts are 1.465</div><div class='add'>+Voltages are sampled by a 12 bit ADC.  Voltages in millivolts are 1.465</div><div class='ctx'> times the ADC value.</div><div class='ctx'> </div><div class='ctx'> Temperature Monitoring</div><div class='head'>diff --git a/Documentation/i2c/functionality b/Documentation/i2c/functionality<br/>index 42c17c1fb3cd..b0ff2ab596ce 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/i2c/functionality?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/i2c/functionality</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/i2c/functionality?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/i2c/functionality</a></div><div class='hunk'>@@ -18,9 +18,9 @@ For the most up-to-date list of functionality constants, please check</div><div class='ctx'>                                   adapters typically can not do these)</div><div class='ctx'>   I2C_FUNC_10BIT_ADDR             Handles the 10-bit address extensions</div><div class='ctx'>   I2C_FUNC_PROTOCOL_MANGLING      Knows about the I2C_M_IGNORE_NAK,</div><div class='del'>-                                  I2C_M_REV_DIR_ADDR, I2C_M_NOSTART and</div><div class='del'>-                                  I2C_M_NO_RD_ACK flags (which modify the</div><div class='del'>-                                  I2C protocol!)</div><div class='add'>+                                  I2C_M_REV_DIR_ADDR and I2C_M_NO_RD_ACK</div><div class='add'>+                                  flags (which modify the I2C protocol!)</div><div class='add'>+  I2C_FUNC_NOSTART                Can skip repeated start sequence</div><div class='ctx'>   I2C_FUNC_SMBUS_QUICK            Handles the SMBus write_quick command</div><div class='ctx'>   I2C_FUNC_SMBUS_READ_BYTE        Handles the SMBus read_byte command</div><div class='ctx'>   I2C_FUNC_SMBUS_WRITE_BYTE       Handles the SMBus write_byte command</div><div class='hunk'>@@ -50,6 +50,9 @@ A few combinations of the above flags are also defined for your convenience:</div><div class='ctx'>                                   emulated by a real I2C adapter (using</div><div class='ctx'>                                   the transparent emulation layer)</div><div class='ctx'> </div><div class='add'>+In kernel versions prior to 3.5 I2C_FUNC_NOSTART was implemented as</div><div class='add'>+part of I2C_FUNC_PROTOCOL_MANGLING.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> ADAPTER IMPLEMENTATION</div><div class='ctx'> ----------------------</div><div class='head'>diff --git a/Documentation/i2c/i2c-protocol b/Documentation/i2c/i2c-protocol<br/>index 10518dd58814..0b3e62d1f77a 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/i2c/i2c-protocol?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/i2c/i2c-protocol</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/i2c/i2c-protocol?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/i2c/i2c-protocol</a></div><div class='hunk'>@@ -49,7 +49,9 @@ a byte read, followed by a byte write:</div><div class='ctx'> Modified transactions</div><div class='ctx'> =====================</div><div class='ctx'> </div><div class='del'>-We have found some I2C devices that needs the following modifications:</div><div class='add'>+The following modifications to the I2C protocol can also be generated,</div><div class='add'>+with the exception of I2C_M_NOSTART these are usually only needed to</div><div class='add'>+work around device issues:</div><div class='ctx'> </div><div class='ctx'>   Flag I2C_M_NOSTART: </div><div class='ctx'>     In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some</div><div class='hunk'>@@ -60,6 +62,11 @@ We have found some I2C devices that needs the following modifications:</div><div class='ctx'>     we do not generate Addr, but we do generate the startbit S. This will</div><div class='ctx'>     probably confuse all other clients on your bus, so don't try this.</div><div class='ctx'> </div><div class='add'>+    This is often used to gather transmits from multiple data buffers in</div><div class='add'>+    system memory into something that appears as a single transfer to the</div><div class='add'>+    I2C device but may also be used between direction changes by some</div><div class='add'>+    rare devices.</div><div class='add'>+</div><div class='ctx'>   Flags I2C_M_REV_DIR_ADDR</div><div class='ctx'>     This toggles the Rd/Wr flag. That is, if you want to do a write, but</div><div class='ctx'>     need to emit an Rd instead of a Wr, or vice versa, you set this</div><div class='head'>diff --git a/Documentation/i2c/muxes/gpio-i2cmux b/Documentation/i2c/muxes/i2c-mux-gpio<br/>index 811cd78d4cdc..bd9b2299b739 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/i2c/muxes/gpio-i2cmux?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/i2c/muxes/gpio-i2cmux</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/i2c/muxes/i2c-mux-gpio?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/i2c/muxes/i2c-mux-gpio</a></div><div class='hunk'>@@ -1,11 +1,11 @@</div><div class='del'>-Kernel driver gpio-i2cmux</div><div class='add'>+Kernel driver i2c-gpio-mux</div><div class='ctx'> </div><div class='ctx'> Author: Peter Korsgaard &lt;peter.korsgaard@barco.com&gt;</div><div class='ctx'> </div><div class='ctx'> Description</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='del'>-gpio-i2cmux is an i2c mux driver providing access to I2C bus segments</div><div class='add'>+i2c-gpio-mux is an i2c mux driver providing access to I2C bus segments</div><div class='ctx'> from a master I2C bus and a hardware MUX controlled through GPIO pins.</div><div class='ctx'> </div><div class='ctx'> E.G.:</div><div class='hunk'>@@ -26,16 +26,16 @@ according to the settings of the GPIO pins 1..N.</div><div class='ctx'> Usage</div><div class='ctx'> -----</div><div class='ctx'> </div><div class='del'>-gpio-i2cmux uses the platform bus, so you need to provide a struct</div><div class='add'>+i2c-gpio-mux uses the platform bus, so you need to provide a struct</div><div class='ctx'> platform_device with the platform_data pointing to a struct</div><div class='ctx'> gpio_i2cmux_platform_data with the I2C adapter number of the master</div><div class='ctx'> bus, the number of bus segments to create and the GPIO pins used</div><div class='del'>-to control it. See include/linux/gpio-i2cmux.h for details.</div><div class='add'>+to control it. See include/linux/i2c-gpio-mux.h for details.</div><div class='ctx'> </div><div class='ctx'> E.G. something like this for a MUX providing 4 bus segments</div><div class='ctx'> controlled through 3 GPIO pins:</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/gpio-i2cmux.h&gt;</div><div class='add'>+#include &lt;linux/i2c-gpio-mux.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> </div><div class='ctx'> static const unsigned myboard_gpiomux_gpios[] = {</div><div class='hunk'>@@ -57,7 +57,7 @@ static struct gpio_i2cmux_platform_data myboard_i2cmux_data = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device myboard_i2cmux = {</div><div class='del'>-	.name		= "gpio-i2cmux",</div><div class='add'>+	.name		= "i2c-gpio-mux",</div><div class='ctx'> 	.id		= 0,</div><div class='ctx'> 	.dev		= {</div><div class='ctx'> 		.platform_data	= &amp;myboard_i2cmux_data,</div><div class='head'>diff --git a/Documentation/initrd.txt b/Documentation/initrd.txt<br/>index 1ba84f3584e3..4e1839ccb555 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/initrd.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/initrd.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/initrd.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/initrd.txt</a></div><div class='hunk'>@@ -362,5 +362,5 @@ Resources</div><div class='ctx'>     http://www.almesberger.net/cv/papers/ols2k-9.ps.gz</div><div class='ctx'> [2] newlib package (experimental), with initrd example</div><div class='ctx'>     http://sources.redhat.com/newlib/</div><div class='del'>-[3] Brouwer, Andries; "util-linux: Miscellaneous utilities for Linux"</div><div class='del'>-    ftp://ftp.win.tue.nl/pub/linux-local/utils/util-linux/</div><div class='add'>+[3] util-linux: Miscellaneous utilities for Linux</div><div class='add'>+    http://www.kernel.org/pub/linux/utils/util-linux/</div><div class='head'>diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt<br/>index e34b531dc316..915f28c470e9 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ioctl/ioctl-number.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/ioctl/ioctl-number.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ioctl/ioctl-number.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ioctl/ioctl-number.txt</a></div><div class='hunk'>@@ -120,6 +120,7 @@ Code  Seq#(hex)	Include File		Comments</div><div class='ctx'> 'G'	00-0F	linux/gigaset_dev.h	conflict!</div><div class='ctx'> 'H'	00-7F	linux/hiddev.h		conflict!</div><div class='ctx'> 'H'	00-0F	linux/hidraw.h		conflict!</div><div class='add'>+'H'	01	linux/mei.h		conflict!</div><div class='ctx'> 'H'	00-0F	sound/asound.h		conflict!</div><div class='ctx'> 'H'	20-40	sound/asound_fm.h	conflict!</div><div class='ctx'> 'H'	80-8F	sound/sfnt_info.h	conflict!</div><div class='head'>diff --git a/Documentation/kbuild/kbuild.txt b/Documentation/kbuild/kbuild.txt<br/>index 68e32bb6bd80..6466704d47b5 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/kbuild/kbuild.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/kbuild/kbuild.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/kbuild/kbuild.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/kbuild/kbuild.txt</a></div><div class='hunk'>@@ -50,6 +50,10 @@ LDFLAGS_MODULE</div><div class='ctx'> --------------------------------------------------</div><div class='ctx'> Additional options used for $(LD) when linking modules.</div><div class='ctx'> </div><div class='add'>+LDFLAGS_vmlinux</div><div class='add'>+--------------------------------------------------</div><div class='add'>+Additional options passed to final link of vmlinux.</div><div class='add'>+</div><div class='ctx'> KBUILD_VERBOSE</div><div class='ctx'> --------------------------------------------------</div><div class='ctx'> Set the kbuild verbosity. Can be assigned same values as "V=...".</div><div class='hunk'>@@ -214,3 +218,18 @@ KBUILD_BUILD_USER, KBUILD_BUILD_HOST</div><div class='ctx'> These two variables allow to override the user@host string displayed during</div><div class='ctx'> boot and in /proc/version. The default value is the output of the commands</div><div class='ctx'> whoami and host, respectively.</div><div class='add'>+</div><div class='add'>+KBUILD_LDS</div><div class='add'>+--------------------------------------------------</div><div class='add'>+The linker script with full path. Assigned by the top-level Makefile.</div><div class='add'>+</div><div class='add'>+KBUILD_VMLINUX_INIT</div><div class='add'>+--------------------------------------------------</div><div class='add'>+All object files for the init (first) part of vmlinux.</div><div class='add'>+Files specified with KBUILD_VMLINUX_INIT are linked first.</div><div class='add'>+</div><div class='add'>+KBUILD_VMLINUX_MAIN</div><div class='add'>+--------------------------------------------------</div><div class='add'>+All object files for the main part of vmlinux.</div><div class='add'>+KBUILD_VMLINUX_INIT and KBUILD_VMLINUX_MAIN together specify</div><div class='add'>+all the object files used to link vmlinux.</div><div class='head'>diff --git a/Documentation/kbuild/kconfig.txt b/Documentation/kbuild/kconfig.txt<br/>index 9d5f2a90dca9..a09f1a6a830c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/kbuild/kconfig.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/kbuild/kconfig.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/kbuild/kconfig.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/kbuild/kconfig.txt</a></div><div class='hunk'>@@ -53,15 +53,15 @@ KCONFIG_ALLCONFIG</div><div class='ctx'> --------------------------------------------------</div><div class='ctx'> (partially based on lkml email from/by Rob Landley, re: miniconfig)</div><div class='ctx'> --------------------------------------------------</div><div class='del'>-The allyesconfig/allmodconfig/allnoconfig/randconfig variants can</div><div class='del'>-also use the environment variable KCONFIG_ALLCONFIG as a flag or a</div><div class='del'>-filename that contains config symbols that the user requires to be</div><div class='del'>-set to a specific value.  If KCONFIG_ALLCONFIG is used without a</div><div class='del'>-filename, "make *config" checks for a file named</div><div class='del'>-"all{yes/mod/no/def/random}.config" (corresponding to the *config command</div><div class='del'>-that was used) for symbol values that are to be forced.  If this file</div><div class='del'>-is not found, it checks for a file named "all.config" to contain forced</div><div class='del'>-values.</div><div class='add'>+The allyesconfig/allmodconfig/allnoconfig/randconfig variants can also</div><div class='add'>+use the environment variable KCONFIG_ALLCONFIG as a flag or a filename</div><div class='add'>+that contains config symbols that the user requires to be set to a</div><div class='add'>+specific value.  If KCONFIG_ALLCONFIG is used without a filename where</div><div class='add'>+KCONFIG_ALLCONFIG == "" or KCONFIG_ALLCONFIG == "1", "make *config"</div><div class='add'>+checks for a file named "all{yes/mod/no/def/random}.config"</div><div class='add'>+(corresponding to the *config command that was used) for symbol values</div><div class='add'>+that are to be forced.  If this file is not found, it checks for a</div><div class='add'>+file named "all.config" to contain forced values.</div><div class='ctx'> </div><div class='ctx'> This enables you to create "miniature" config (miniconfig) or custom</div><div class='ctx'> config files containing just the config symbols that you are interested</div><div class='head'>diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt<br/>index c1601e5a8b71..a92c5ebf373e 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/kernel-parameters.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/kernel-parameters.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/kernel-parameters.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/kernel-parameters.txt</a></div><div class='hunk'>@@ -70,7 +70,6 @@ parameter is applicable:</div><div class='ctx'> 	M68k	M68k architecture is enabled.</div><div class='ctx'> 			These options have more detailed description inside of</div><div class='ctx'> 			Documentation/m68k/kernel-options.txt.</div><div class='del'>-	MCA	MCA bus support is enabled.</div><div class='ctx'> 	MDA	MDA console support is enabled.</div><div class='ctx'> 	MIPS	MIPS architecture is enabled.</div><div class='ctx'> 	MOUSE	Appropriate mouse support is enabled.</div><div class='hunk'>@@ -110,6 +109,7 @@ parameter is applicable:</div><div class='ctx'> 	USB	USB support is enabled.</div><div class='ctx'> 	USBHID	USB Human Interface Device support is enabled.</div><div class='ctx'> 	V4L	Video For Linux support is enabled.</div><div class='add'>+	VMMIO   Driver for memory mapped virtio devices is enabled.</div><div class='ctx'> 	VGA	The VGA console has been enabled.</div><div class='ctx'> 	VT	Virtual terminal support is enabled.</div><div class='ctx'> 	WDT	Watchdog support is enabled.</div><div class='hunk'>@@ -335,6 +335,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 					  requirements as needed. This option</div><div class='ctx'> 					  does not override iommu=pt</div><div class='ctx'> </div><div class='add'>+	amd_iommu_dump=	[HW,X86-64]</div><div class='add'>+			Enable AMD IOMMU driver option to dump the ACPI table</div><div class='add'>+			for AMD IOMMU. With this option enabled, AMD IOMMU</div><div class='add'>+			driver will print ACPI tables for AMD IOMMU during</div><div class='add'>+			IOMMU initialization.</div><div class='add'>+</div><div class='ctx'> 	amijoy.map=	[HW,JOY] Amiga joystick support</div><div class='ctx'> 			Map of devices attached to JOY0DAT and JOY1DAT</div><div class='ctx'> 			Format: &lt;a&gt;,&lt;b&gt;</div><div class='hunk'>@@ -397,8 +403,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 	atkbd.softrepeat= [HW]</div><div class='ctx'> 			Use software keyboard repeat</div><div class='ctx'> </div><div class='del'>-	autotest	[IA-64]</div><div class='del'>-</div><div class='ctx'> 	baycom_epp=	[HW,AX25]</div><div class='ctx'> 			Format: &lt;io&gt;,&lt;mode&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -508,6 +512,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			Also note the kernel might malfunction if you disable</div><div class='ctx'> 			some critical bits.</div><div class='ctx'> </div><div class='add'>+	cma=nn[MG]	[ARM,KNL]</div><div class='add'>+			Sets the size of kernel global memory area for contiguous</div><div class='add'>+			memory allocations. For more information, see</div><div class='add'>+			include/linux/dma-contiguous.h</div><div class='add'>+</div><div class='ctx'> 	cmo_free_hint=	[PPC] Format: { yes | no }</div><div class='ctx'> 			Specify whether pages are marked as being inactive</div><div class='ctx'> 			when they are freed.  This is used in CMO environments</div><div class='hunk'>@@ -515,6 +524,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			a hypervisor.</div><div class='ctx'> 			Default: yes</div><div class='ctx'> </div><div class='add'>+	coherent_pool=nn[KMG]	[ARM,KNL]</div><div class='add'>+			Sets the size of memory pool for coherent, atomic dma</div><div class='add'>+			allocations if Contiguous Memory Allocator (CMA) is used.</div><div class='add'>+</div><div class='ctx'> 	code_bytes	[X86] How many bytes of object code to print</div><div class='ctx'> 			in an oops report.</div><div class='ctx'> 			Range: 0 - 8192</div><div class='hunk'>@@ -610,7 +623,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> </div><div class='ctx'> 	ddebug_query=   [KNL,DYNAMIC_DEBUG] Enable debug messages at early boot</div><div class='ctx'> 			time. See Documentation/dynamic-debug-howto.txt for</div><div class='del'>-			details.</div><div class='add'>+			details.  Deprecated, see dyndbg.</div><div class='ctx'> </div><div class='ctx'> 	debug		[KNL] Enable kernel debugging (events log level).</div><div class='ctx'> </div><div class='hunk'>@@ -730,6 +743,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> </div><div class='ctx'> 	dscc4.setup=	[NET]</div><div class='ctx'> </div><div class='add'>+	dyndbg[="val"]		[KNL,DYNAMIC_DEBUG]</div><div class='add'>+	module.dyndbg[="val"]</div><div class='add'>+			Enable debug messages at boot time.  See</div><div class='add'>+			Documentation/dynamic-debug-howto.txt for details.</div><div class='add'>+</div><div class='ctx'> 	earlycon=	[KNL] Output early console device and options.</div><div class='ctx'> 		uart[8250],io,&lt;addr&gt;[,options]</div><div class='ctx'> 		uart[8250],mmio,&lt;addr&gt;[,options]</div><div class='hunk'>@@ -982,6 +1000,20 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 	i8k.restricted	[HW] Allow controlling fans only if SYS_ADMIN</div><div class='ctx'> 			capability is set.</div><div class='ctx'> </div><div class='add'>+	i915.invert_brightness=</div><div class='add'>+			[DRM] Invert the sense of the variable that is used to</div><div class='add'>+			set the brightness of the panel backlight. Normally a</div><div class='add'>+			brightness value of 0 indicates backlight switched off,</div><div class='add'>+			and the maximum of the brightness value sets the backlight</div><div class='add'>+			to maximum brightness. If this parameter is set to 0</div><div class='add'>+			(default) and the machine requires it, or this parameter</div><div class='add'>+			is set to 1, a brightness value of 0 sets the backlight</div><div class='add'>+			to maximum brightness, and the maximum of the brightness</div><div class='add'>+			value switches the backlight off.</div><div class='add'>+			-1 -- never invert brightness</div><div class='add'>+			 0 -- machine default</div><div class='add'>+			 1 -- force brightness inversion</div><div class='add'>+</div><div class='ctx'> 	icn=		[HW,ISDN]</div><div class='ctx'> 			Format: &lt;io&gt;[,&lt;membase&gt;[,&lt;icn_id&gt;[,&lt;icn_id2&gt;]]]</div><div class='ctx'> </div><div class='hunk'>@@ -1425,8 +1457,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 			devices can be requested on-demand with the</div><div class='ctx'> 			/dev/loop-control interface.</div><div class='ctx'> </div><div class='del'>-	mcatest=	[IA-64]</div><div class='del'>-</div><div class='ctx'> 	mce		[X86-32] Machine Check Exception</div><div class='ctx'> </div><div class='ctx'> 	mce=option	[X86-64] See Documentation/x86/x86_64/boot-options.txt</div><div class='hunk'>@@ -2161,6 +2191,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 				on: Turn realloc on</div><div class='ctx'> 		realloc		same as realloc=on</div><div class='ctx'> 		noari		do not use PCIe ARI.</div><div class='add'>+		pcie_scan_all	Scan all possible PCIe devices.  Otherwise we</div><div class='add'>+				only look for one device below a PCIe downstream</div><div class='add'>+				port.</div><div class='ctx'> </div><div class='ctx'> 	pcie_aspm=	[PCIE] Forcibly enable or disable PCIe Active State Power</div><div class='ctx'> 			Management.</div><div class='hunk'>@@ -2330,18 +2363,100 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 	ramdisk_size=	[RAM] Sizes of RAM disks in kilobytes</div><div class='ctx'> 			See Documentation/blockdev/ramdisk.txt.</div><div class='ctx'> </div><div class='del'>-	rcupdate.blimit=	[KNL,BOOT]</div><div class='add'>+	rcutree.blimit=	[KNL,BOOT]</div><div class='ctx'> 			Set maximum number of finished RCU callbacks to process</div><div class='ctx'> 			in one batch.</div><div class='ctx'> </div><div class='del'>-	rcupdate.qhimark=	[KNL,BOOT]</div><div class='add'>+	rcutree.qhimark=	[KNL,BOOT]</div><div class='ctx'> 			Set threshold of queued</div><div class='ctx'> 			RCU callbacks over which batch limiting is disabled.</div><div class='ctx'> </div><div class='del'>-	rcupdate.qlowmark=	[KNL,BOOT]</div><div class='add'>+	rcutree.qlowmark=	[KNL,BOOT]</div><div class='ctx'> 			Set threshold of queued RCU callbacks below which</div><div class='ctx'> 			batch limiting is re-enabled.</div><div class='ctx'> </div><div class='add'>+	rcutree.rcu_cpu_stall_suppress=	[KNL,BOOT]</div><div class='add'>+			Suppress RCU CPU stall warning messages.</div><div class='add'>+</div><div class='add'>+	rcutree.rcu_cpu_stall_timeout= [KNL,BOOT]</div><div class='add'>+			Set timeout for RCU CPU stall warning messages.</div><div class='add'>+</div><div class='add'>+	rcutorture.fqs_duration= [KNL,BOOT]</div><div class='add'>+			Set duration of force_quiescent_state bursts.</div><div class='add'>+</div><div class='add'>+	rcutorture.fqs_holdoff= [KNL,BOOT]</div><div class='add'>+			Set holdoff time within force_quiescent_state bursts.</div><div class='add'>+</div><div class='add'>+	rcutorture.fqs_stutter= [KNL,BOOT]</div><div class='add'>+			Set wait time between force_quiescent_state bursts.</div><div class='add'>+</div><div class='add'>+	rcutorture.irqreader= [KNL,BOOT]</div><div class='add'>+			Test RCU readers from irq handlers.</div><div class='add'>+</div><div class='add'>+	rcutorture.n_barrier_cbs= [KNL,BOOT]</div><div class='add'>+			Set callbacks/threads for rcu_barrier() testing.</div><div class='add'>+</div><div class='add'>+	rcutorture.nfakewriters= [KNL,BOOT]</div><div class='add'>+			Set number of concurrent RCU writers.  These just</div><div class='add'>+			stress RCU, they don't participate in the actual</div><div class='add'>+			test, hence the "fake".</div><div class='add'>+</div><div class='add'>+	rcutorture.nreaders= [KNL,BOOT]</div><div class='add'>+			Set number of RCU readers.</div><div class='add'>+</div><div class='add'>+	rcutorture.onoff_holdoff= [KNL,BOOT]</div><div class='add'>+			Set time (s) after boot for CPU-hotplug testing.</div><div class='add'>+</div><div class='add'>+	rcutorture.onoff_interval= [KNL,BOOT]</div><div class='add'>+			Set time (s) between CPU-hotplug operations, or</div><div class='add'>+			zero to disable CPU-hotplug testing.</div><div class='add'>+</div><div class='add'>+	rcutorture.shuffle_interval= [KNL,BOOT]</div><div class='add'>+			Set task-shuffle interval (s).  Shuffling tasks</div><div class='add'>+			allows some CPUs to go into dyntick-idle mode</div><div class='add'>+			during the rcutorture test.</div><div class='add'>+</div><div class='add'>+	rcutorture.shutdown_secs= [KNL,BOOT]</div><div class='add'>+			Set time (s) after boot system shutdown.  This</div><div class='add'>+			is useful for hands-off automated testing.</div><div class='add'>+</div><div class='add'>+	rcutorture.stall_cpu= [KNL,BOOT]</div><div class='add'>+			Duration of CPU stall (s) to test RCU CPU stall</div><div class='add'>+			warnings, zero to disable.</div><div class='add'>+</div><div class='add'>+	rcutorture.stall_cpu_holdoff= [KNL,BOOT]</div><div class='add'>+			Time to wait (s) after boot before inducing stall.</div><div class='add'>+</div><div class='add'>+	rcutorture.stat_interval= [KNL,BOOT]</div><div class='add'>+			Time (s) between statistics printk()s.</div><div class='add'>+</div><div class='add'>+	rcutorture.stutter= [KNL,BOOT]</div><div class='add'>+			Time (s) to stutter testing, for example, specifying</div><div class='add'>+			five seconds causes the test to run for five seconds,</div><div class='add'>+			wait for five seconds, and so on.  This tests RCU's</div><div class='add'>+			ability to transition abruptly to and from idle.</div><div class='add'>+</div><div class='add'>+	rcutorture.test_boost= [KNL,BOOT]</div><div class='add'>+			Test RCU priority boosting?  0=no, 1=maybe, 2=yes.</div><div class='add'>+			"Maybe" means test if the RCU implementation</div><div class='add'>+			under test support RCU priority boosting.</div><div class='add'>+</div><div class='add'>+	rcutorture.test_boost_duration= [KNL,BOOT]</div><div class='add'>+			Duration (s) of each individual boost test.</div><div class='add'>+</div><div class='add'>+	rcutorture.test_boost_interval= [KNL,BOOT]</div><div class='add'>+			Interval (s) between each boost test.</div><div class='add'>+</div><div class='add'>+	rcutorture.test_no_idle_hz= [KNL,BOOT]</div><div class='add'>+			Test RCU's dyntick-idle handling.  See also the</div><div class='add'>+			rcutorture.shuffle_interval parameter.</div><div class='add'>+</div><div class='add'>+	rcutorture.torture_type= [KNL,BOOT]</div><div class='add'>+			Specify the RCU implementation to test.</div><div class='add'>+</div><div class='add'>+	rcutorture.verbose= [KNL,BOOT]</div><div class='add'>+			Enable additional printk() statements.</div><div class='add'>+</div><div class='ctx'> 	rdinit=		[KNL]</div><div class='ctx'> 			Format: &lt;full_path&gt;</div><div class='ctx'> 			Run specified binary instead of /init from the ramdisk,</div><div class='hunk'>@@ -2372,6 +2487,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> </div><div class='ctx'> 	resume=		[SWSUSP]</div><div class='ctx'> 			Specify the partition device for software suspend</div><div class='add'>+			Format:</div><div class='add'>+			{/dev/&lt;dev&gt; | PARTUUID=&lt;uuid&gt; | &lt;int&gt;:&lt;int&gt; | &lt;hex&gt;}</div><div class='ctx'> </div><div class='ctx'> 	resume_offset=	[SWSUSP]</div><div class='ctx'> 			Specify the offset from the beginning of the partition</div><div class='hunk'>@@ -2426,6 +2543,15 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> </div><div class='ctx'> 	sched_debug	[KNL] Enables verbose scheduler debug messages.</div><div class='ctx'> </div><div class='add'>+	skew_tick=	[KNL] Offset the periodic timer tick per cpu to mitigate</div><div class='add'>+			xtime_lock contention on larger systems, and/or RCU lock</div><div class='add'>+			contention on all systems with CONFIG_MAXSMP set.</div><div class='add'>+			Format: { "0" | "1" }</div><div class='add'>+			0 -- disable. (may be 1 via CONFIG_CMDLINE="skew_tick=1"</div><div class='add'>+			1 -- enable.</div><div class='add'>+			Note: increases power consumption, thus should only be</div><div class='add'>+			enabled if running jitter sensitive (HPC/RT) workloads.</div><div class='add'>+</div><div class='ctx'> 	security=	[SECURITY] Choose a security module to enable at boot.</div><div class='ctx'> 			If this boot parameter is not specified, only the first</div><div class='ctx'> 			security module asking for security registration will be</div><div class='hunk'>@@ -2847,6 +2973,22 @@ bytes respectively. Such letter suffixes can also be entirely omitted.</div><div class='ctx'> 	video=		[FB] Frame buffer configuration</div><div class='ctx'> 			See Documentation/fb/modedb.txt.</div><div class='ctx'> </div><div class='add'>+	virtio_mmio.device=</div><div class='add'>+			[VMMIO] Memory mapped virtio (platform) device.</div><div class='add'>+</div><div class='add'>+				&lt;size&gt;@&lt;baseaddr&gt;:&lt;irq&gt;[:&lt;id&gt;]</div><div class='add'>+			where:</div><div class='add'>+				&lt;size&gt;     := size (can use standard suffixes</div><div class='add'>+						like K, M and G)</div><div class='add'>+				&lt;baseaddr&gt; := physical base address</div><div class='add'>+				&lt;irq&gt;      := interrupt number (as passed to</div><div class='add'>+						request_irq())</div><div class='add'>+				&lt;id&gt;       := (optional) platform device id</div><div class='add'>+			example:</div><div class='add'>+				virtio_mmio.device=1K@0x100b0000:48:7</div><div class='add'>+</div><div class='add'>+			Can be used multiple times for multiple devices.</div><div class='add'>+</div><div class='ctx'> 	vga=		[BOOT,X86-32] Select a particular video mode</div><div class='ctx'> 			See Documentation/x86/boot.txt and</div><div class='ctx'> 			Documentation/svga.txt.</div><div class='head'>diff --git a/Documentation/leds/ledtrig-transient.txt b/Documentation/leds/ledtrig-transient.txt<br/>new file mode 100644<br/>index 000000000000..3bd38b487df1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/leds/ledtrig-transient.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/leds/ledtrig-transient.txt</a></div><div class='hunk'>@@ -0,0 +1,152 @@</div><div class='add'>+LED Transient Trigger</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+The leds timer trigger does not currently have an interface to activate</div><div class='add'>+a one shot timer. The current support allows for setting two timers, one for</div><div class='add'>+specifying how long a state to be on, and the second for how long the state</div><div class='add'>+to be off. The delay_on value specifies the time period an LED should stay</div><div class='add'>+in on state, followed by a delay_off value that specifies how long the LED</div><div class='add'>+should stay in off state. The on and off cycle repeats until the trigger</div><div class='add'>+gets deactivated. There is no provision for one time activation to implement</div><div class='add'>+features that require an on or off state to be held just once and then stay in</div><div class='add'>+the original state forever.</div><div class='add'>+</div><div class='add'>+Without one shot timer interface, user space can still use timer trigger to</div><div class='add'>+set a timer to hold a state, however when user space application crashes or</div><div class='add'>+goes away without deactivating the timer, the hardware will be left in that</div><div class='add'>+state permanently.</div><div class='add'>+</div><div class='add'>+As a specific example of this use-case, let's look at vibrate feature on</div><div class='add'>+phones. Vibrate function on phones is implemented using PWM pins on SoC or</div><div class='add'>+PMIC. There is a need to activate one shot timer to control the vibrate</div><div class='add'>+feature, to prevent user space crashes leaving the phone in vibrate mode</div><div class='add'>+permanently causing the battery to drain.</div><div class='add'>+</div><div class='add'>+Transient trigger addresses the need for one shot timer activation. The</div><div class='add'>+transient trigger can be enabled and disabled just like the other leds</div><div class='add'>+triggers.</div><div class='add'>+</div><div class='add'>+When an led class device driver registers itself, it can specify all leds</div><div class='add'>+triggers it supports and a default trigger. During registration, activation</div><div class='add'>+routine for the default trigger gets called. During registration of an led</div><div class='add'>+class device, the LED state does not change.</div><div class='add'>+</div><div class='add'>+When the driver unregisters, deactivation routine for the currently active</div><div class='add'>+trigger will be called, and LED state is changed to LED_OFF.</div><div class='add'>+</div><div class='add'>+Driver suspend changes the LED state to LED_OFF and resume doesn't change</div><div class='add'>+the state. Please note that there is no explicit interaction between the</div><div class='add'>+suspend and resume actions and the currently enabled trigger. LED state</div><div class='add'>+changes are suspended while the driver is in suspend state. Any timers</div><div class='add'>+that are active at the time driver gets suspended, continue to run, without</div><div class='add'>+being able to actually change the LED state. Once driver is resumed, triggers</div><div class='add'>+start functioning again.</div><div class='add'>+</div><div class='add'>+LED state changes are controlled using brightness which is a common led</div><div class='add'>+class device property. When brightness is set to 0 from user space via</div><div class='add'>+echo 0 &gt; brightness, it will result in deactivating the current trigger.</div><div class='add'>+</div><div class='add'>+Transient trigger uses standard register and unregister interfaces. During</div><div class='add'>+trigger registration, for each led class device that specifies this trigger</div><div class='add'>+as its default trigger, trigger activation routine will get called. During</div><div class='add'>+registration, the LED state does not change, unless there is another trigger</div><div class='add'>+active, in which case LED state changes to LED_OFF.</div><div class='add'>+</div><div class='add'>+During trigger unregistration, LED state gets changed to LED_OFF.</div><div class='add'>+</div><div class='add'>+Transient trigger activation routine doesn't change the LED state. It</div><div class='add'>+creates its properties and does its initialization. Transient trigger</div><div class='add'>+deactivation routine, will cancel any timer that is active before it cleans</div><div class='add'>+up and removes the properties it created. It will restore the LED state to</div><div class='add'>+non-transient state. When driver gets suspended, irrespective of the transient</div><div class='add'>+state, the LED state changes to LED_OFF.</div><div class='add'>+</div><div class='add'>+Transient trigger can be enabled and disabled from user space on led class</div><div class='add'>+devices, that support this trigger as shown below:</div><div class='add'>+</div><div class='add'>+echo transient &gt; trigger</div><div class='add'>+echo none &gt; trigger</div><div class='add'>+</div><div class='add'>+NOTE: Add a new property trigger state to control the state.</div><div class='add'>+</div><div class='add'>+This trigger exports three properties, activate, state, and duration. When</div><div class='add'>+transient trigger is activated these properties are set to default values.</div><div class='add'>+</div><div class='add'>+- duration allows setting timer value in msecs. The initial value is 0.</div><div class='add'>+- activate allows activating and deactivating the timer specified by</div><div class='add'>+  duration as needed. The initial and default value is 0.  This will allow</div><div class='add'>+  duration to be set after trigger activation.</div><div class='add'>+- state allows user to specify a transient state to be held for the specified</div><div class='add'>+  duration.</div><div class='add'>+</div><div class='add'>+	activate - one shot timer activate mechanism.</div><div class='add'>+		1 when activated, 0 when deactivated.</div><div class='add'>+		default value is zero when transient trigger is enabled,</div><div class='add'>+		to allow duration to be set.</div><div class='add'>+</div><div class='add'>+		activate state indicates a timer with a value of specified</div><div class='add'>+		duration running.</div><div class='add'>+		deactivated state indicates that there is no active timer</div><div class='add'>+		running.</div><div class='add'>+</div><div class='add'>+	duration - one shot timer value. When activate is set, duration value</div><div class='add'>+		is used to start a timer that runs once. This value doesn't</div><div class='add'>+		get changed by the trigger unless user does a set via</div><div class='add'>+		echo new_value &gt; duration</div><div class='add'>+</div><div class='add'>+	state - transient state to be held. It has two values 0 or 1. 0 maps</div><div class='add'>+		to LED_OFF and 1 maps to LED_FULL. The specified state is</div><div class='add'>+		held for the duration of the one shot timer and then the</div><div class='add'>+		state gets changed to the non-transient state which is the</div><div class='add'>+		inverse of transient state.</div><div class='add'>+		If state = LED_FULL, when the timer runs out the state will</div><div class='add'>+		go back to LED_OFF.</div><div class='add'>+		If state = LED_OFF, when the timer runs out the state will</div><div class='add'>+		go back to LED_FULL.</div><div class='add'>+		Please note that current LED state is not checked prior to</div><div class='add'>+		changing the state to the specified state.</div><div class='add'>+		Driver could map these values to inverted depending on the</div><div class='add'>+		default states it defines for the LED in its brightness_set()</div><div class='add'>+		interface which is called from the led brightness_set()</div><div class='add'>+		interfaces to control the LED state.</div><div class='add'>+</div><div class='add'>+When timer expires activate goes back to deactivated state, duration is left</div><div class='add'>+at the set value to be used when activate is set at a future time. This will</div><div class='add'>+allow user app to set the time once and activate it to run it once for the</div><div class='add'>+specified value as needed. When timer expires, state is restored to the</div><div class='add'>+non-transient state which is the inverse of the transient state.</div><div class='add'>+</div><div class='add'>+	echo 1 &gt; activate - starts timer = duration when duration is not 0.</div><div class='add'>+	echo 0 &gt; activate - cancels currently running timer.</div><div class='add'>+	echo n &gt; duration - stores timer value to be used upon next</div><div class='add'>+                            activate. Currently active timer if</div><div class='add'>+                            any, continues to run for the specified time.</div><div class='add'>+	echo 0 &gt; duration - stores timer value to be used upon next</div><div class='add'>+                            activate. Currently active timer if any,</div><div class='add'>+                            continues to run for the specified time.</div><div class='add'>+	echo 1 &gt; state    - stores desired transient state LED_FULL to be</div><div class='add'>+			    held for the specified duration.</div><div class='add'>+	echo 0 &gt; state    - stores desired transient state LED_OFF to be</div><div class='add'>+			    held for the specified duration.</div><div class='add'>+</div><div class='add'>+What is not supported:</div><div class='add'>+======================</div><div class='add'>+- Timer activation is one shot and extending and/or shortening the timer</div><div class='add'>+  is not supported.</div><div class='add'>+</div><div class='add'>+Example use-case 1:</div><div class='add'>+	echo transient &gt; trigger</div><div class='add'>+	echo n &gt; duration</div><div class='add'>+	echo 1 &gt; state</div><div class='add'>+repeat the following step as needed:</div><div class='add'>+	echo 1 &gt; activate - start timer = duration to run once</div><div class='add'>+	echo 1 &gt; activate - start timer = duration to run once</div><div class='add'>+	echo none &gt; trigger</div><div class='add'>+</div><div class='add'>+This trigger is intended to be used for for the following example use cases:</div><div class='add'>+ - Control of vibrate (phones, tablets etc.) hardware by user space app.</div><div class='add'>+ - Use of LED by user space app as activity indicator.</div><div class='add'>+ - Use of LED by user space app as a kind of watchdog indicator -- as</div><div class='add'>+       long as the app is alive, it can keep the LED illuminated, if it dies</div><div class='add'>+       the LED will be extinguished automatically.</div><div class='add'>+ - Use by any user space app that needs a transient GPIO output.</div><div class='head'>diff --git a/Documentation/mca.txt b/Documentation/mca.txt<br/>deleted file mode 100644<br/>index dfd130c2207d..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/mca.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/mca.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,313 +0,0 @@</div><div class='del'>-i386 Micro Channel Architecture Support</div><div class='del'>-=======================================</div><div class='del'>-</div><div class='del'>-MCA support is enabled using the CONFIG_MCA define.  A machine with a MCA</div><div class='del'>-bus will have the kernel variable MCA_bus set, assuming the BIOS feature</div><div class='del'>-bits are set properly (see arch/i386/boot/setup.S for information on</div><div class='del'>-how this detection is done).</div><div class='del'>-</div><div class='del'>-Adapter Detection</div><div class='del'>-=================</div><div class='del'>-</div><div class='del'>-The ideal MCA adapter detection is done through the use of the</div><div class='del'>-Programmable Option Select registers.  Generic functions for doing</div><div class='del'>-this have been added in include/linux/mca.h and arch/x86/kernel/mca_32.c.</div><div class='del'>-Everything needed to detect adapters and read (and write) configuration</div><div class='del'>-information is there.  A number of MCA-specific drivers already use</div><div class='del'>-this.  The typical probe code looks like the following:</div><div class='del'>-</div><div class='del'>-	#include &lt;linux/mca.h&gt;</div><div class='del'>-</div><div class='del'>-	unsigned char pos2, pos3, pos4, pos5;</div><div class='del'>-	struct net_device* dev;</div><div class='del'>-	int slot;</div><div class='del'>-</div><div class='del'>-	if( MCA_bus ) {</div><div class='del'>-		slot = mca_find_adapter( ADAPTER_ID, 0 );</div><div class='del'>-		if( slot == MCA_NOTFOUND ) {</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		/* optional - see below */</div><div class='del'>-		mca_set_adapter_name( slot, "adapter name &amp; description" );</div><div class='del'>-		mca_set_adapter_procfn( slot, dev_getinfo, dev );</div><div class='del'>-</div><div class='del'>-		/* read the POS registers.  Most devices only use 2 and 3 */</div><div class='del'>-		pos2 = mca_read_stored_pos( slot, 2 );</div><div class='del'>-		pos3 = mca_read_stored_pos( slot, 3 );</div><div class='del'>-		pos4 = mca_read_stored_pos( slot, 4 );</div><div class='del'>-		pos5 = mca_read_stored_pos( slot, 5 );</div><div class='del'>-	} else {</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* extract configuration from pos[2345] and set everything up */</div><div class='del'>-</div><div class='del'>-Loadable modules should modify this to test that the specified IRQ and</div><div class='del'>-IO ports (plus whatever other stuff) match.  See 3c523.c for example</div><div class='del'>-code (actually, smc-mca.c has a slightly more complex example that can</div><div class='del'>-handle a list of adapter ids).</div><div class='del'>-</div><div class='del'>-Keep in mind that devices should never directly access the POS registers</div><div class='del'>-(via inb(), outb(), etc).  While it's generally safe, there is a small</div><div class='del'>-potential for blowing up hardware when it's done at the wrong time.</div><div class='del'>-Furthermore, accessing a POS register disables a device temporarily.</div><div class='del'>-This is usually okay during startup, but do _you_ want to rely on it?</div><div class='del'>-During initial configuration, mca_init() reads all the POS registers</div><div class='del'>-into memory.  mca_read_stored_pos() accesses that data.  mca_read_pos()</div><div class='del'>-and mca_write_pos() are also available for (safer) direct POS access,</div><div class='del'>-but their use is _highly_ discouraged.  mca_write_pos() is particularly</div><div class='del'>-dangerous, as it is possible for adapters to be put in inconsistent</div><div class='del'>-states (i.e. sharing IO address, etc) and may result in crashes, toasted</div><div class='del'>-hardware, and blindness.</div><div class='del'>-</div><div class='del'>-User level drivers (such as the AGX X server) can use /proc/mca/pos to</div><div class='del'>-find adapters (see below).</div><div class='del'>-</div><div class='del'>-Some MCA adapters can also be detected via the usual ISA-style device</div><div class='del'>-probing (many SCSI adapters, for example).  This sort of thing is highly</div><div class='del'>-discouraged.  Perfectly good information is available telling you what's</div><div class='del'>-there, so there's no excuse for messing with random IO ports.  However,</div><div class='del'>-we MCA people still appreciate any ISA-style driver that will work with</div><div class='del'>-our hardware.  You take what you can get...</div><div class='del'>-</div><div class='del'>-Level-Triggered Interrupts</div><div class='del'>-==========================</div><div class='del'>-</div><div class='del'>-Because MCA uses level-triggered interrupts, a few problems arise with</div><div class='del'>-what might best be described as the ISA mindset and its effects on</div><div class='del'>-drivers.  These sorts of problems are expected to become less common as</div><div class='del'>-more people use shared IRQs on PCI machines.</div><div class='del'>-</div><div class='del'>-In general, an interrupt must be acknowledged not only at the ICU (which</div><div class='del'>-is done automagically by the kernel), but at the device level.  In</div><div class='del'>-particular, IRQ 0 must be reset after a timer interrupt (now done in</div><div class='del'>-arch/x86/kernel/time.c) or the first timer interrupt hangs the system.</div><div class='del'>-There were also problems with the 1.3.x floppy drivers, but that seems</div><div class='del'>-to have been fixed.</div><div class='del'>-</div><div class='del'>-IRQs are also shareable, and most MCA-specific devices should be coded</div><div class='del'>-with shared IRQs in mind.</div><div class='del'>-</div><div class='del'>-/proc/mca</div><div class='del'>-=========</div><div class='del'>-</div><div class='del'>-/proc/mca is a directory containing various files for adapters and</div><div class='del'>-other stuff.</div><div class='del'>-</div><div class='del'>-	/proc/mca/pos		Straight listing of POS registers</div><div class='del'>-	/proc/mca/slot[1-8]	Information on adapter in specific slot</div><div class='del'>-	/proc/mca/video		Same for integrated video</div><div class='del'>-	/proc/mca/scsi		Same for integrated SCSI</div><div class='del'>-	/proc/mca/machine	Machine information</div><div class='del'>-</div><div class='del'>-See Appendix A for a sample.</div><div class='del'>-</div><div class='del'>-Device drivers can easily add their own information function for</div><div class='del'>-specific slots (including integrated ones) via the</div><div class='del'>-mca_set_adapter_procfn() call.  Drivers that support this are ESDI, IBM</div><div class='del'>-SCSI, and 3c523.  If a device is also a module, make sure that the proc</div><div class='del'>-function is removed in the module cleanup.  This will require storing</div><div class='del'>-the slot information in a private structure somewhere.  See the 3c523</div><div class='del'>-driver for details.</div><div class='del'>-</div><div class='del'>-Your typical proc function will look something like this:</div><div class='del'>-</div><div class='del'>-	static int</div><div class='del'>-	dev_getinfo( char* buf, int slot, void* d ) {</div><div class='del'>-		struct net_device* dev = (struct net_device*) d;</div><div class='del'>-		int len = 0;</div><div class='del'>-</div><div class='del'>-		len += sprintf( buf+len, "Device: %s\n", dev-&gt;name );</div><div class='del'>-		len += sprintf( buf+len, "IRQ: %d\n", dev-&gt;irq );</div><div class='del'>-		len += sprintf( buf+len, "IO Port: %#lx-%#lx\n", ... );</div><div class='del'>-		...</div><div class='del'>-</div><div class='del'>-		return len;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-Some of the standard MCA information will already be printed, so don't</div><div class='del'>-bother repeating it.  Don't try putting in more than 3K of information.</div><div class='del'>-</div><div class='del'>-Enable this function with:</div><div class='del'>-	mca_set_adapter_procfn( slot, dev_getinfo, dev );</div><div class='del'>-</div><div class='del'>-Disable it with:</div><div class='del'>-	mca_set_adapter_procfn( slot, NULL, NULL );</div><div class='del'>-</div><div class='del'>-It is also recommended that, even if you don't write a proc function, to</div><div class='del'>-set the name of the adapter (i.e. "PS/2 ESDI Controller") via</div><div class='del'>-mca_set_adapter_name( int slot, char* name ).</div><div class='del'>-</div><div class='del'>-MCA Device Drivers</div><div class='del'>-==================</div><div class='del'>-</div><div class='del'>-Currently, there are a number of MCA-specific device drivers.</div><div class='del'>-</div><div class='del'>-1) PS/2 SCSI</div><div class='del'>-	drivers/scsi/ibmmca.c</div><div class='del'>-	drivers/scsi/ibmmca.h</div><div class='del'>-   The driver for the IBM SCSI subsystem.  Includes both integrated</div><div class='del'>-   controllers and adapter cards.  May require command-line arg</div><div class='del'>-   "ibmmcascsi=io_port" to force detection of an adapter.  If you have a</div><div class='del'>-   machine with a front-panel display (i.e. model 95), you can use</div><div class='del'>-   "ibmmcascsi=display" to enable a drive activity indicator.</div><div class='del'>-</div><div class='del'>-2) 3c523</div><div class='del'>-	drivers/net/3c523.c</div><div class='del'>-	drivers/net/3c523.h</div><div class='del'>-   3Com 3c523 Etherlink/MC ethernet driver.</div><div class='del'>-</div><div class='del'>-3) SMC Ultra/MCA and IBM Adapter/A</div><div class='del'>-	drivers/net/smc-mca.c</div><div class='del'>-	drivers/net/smc-mca.h</div><div class='del'>-	Driver for the MCA version of the SMC Ultra and various other</div><div class='del'>-	OEM'ed and work-alike cards (Elite, Adapter/A, etc).</div><div class='del'>-</div><div class='del'>-4) NE/2</div><div class='del'>-	driver/net/ne2.c</div><div class='del'>-	driver/net/ne2.h</div><div class='del'>-	The NE/2 is the MCA version of the NE2000.  This may not work</div><div class='del'>-	with clones that have a different adapter id than the original</div><div class='del'>-	NE/2.</div><div class='del'>-</div><div class='del'>-5) Future Domain MCS-600/700, OEM'd IBM Fast SCSI Adapter/A and</div><div class='del'>-   Reply Sound Blaster/SCSI (SCSI part)</div><div class='del'>-	Better support for these cards than the driver for ISA.</div><div class='del'>-   Supports multiple cards with IRQ sharing.</div><div class='del'>-</div><div class='del'>-Also added boot time option of scsi-probe, which can do reordering of</div><div class='del'>-SCSI host adapters. This will direct the kernel on the order which</div><div class='del'>-SCSI adapter should be detected. Example:</div><div class='del'>-  scsi-probe=ibmmca,fd_mcs,adaptec1542,buslogic</div><div class='del'>-</div><div class='del'>-The serial drivers were modified to support the extended IO port range</div><div class='del'>-of the typical MCA system (also #ifdef CONFIG_MCA).</div><div class='del'>-</div><div class='del'>-The following devices work with existing drivers:</div><div class='del'>-1) Token-ring</div><div class='del'>-2) Future Domain SCSI (MCS-600, MCS-700, not MCS-350, OEM'ed IBM SCSI)</div><div class='del'>-3) Adaptec 1640 SCSI (using the aha1542 driver)</div><div class='del'>-4) Bustek/Buslogic SCSI (various)</div><div class='del'>-5) Probably all Arcnet cards.</div><div class='del'>-6) Some, possibly all, MCA IDE controllers.</div><div class='del'>-7) 3Com 3c529 (MCA version of 3c509) (patched)</div><div class='del'>-</div><div class='del'>-8) Intel EtherExpressMC  (patched version)</div><div class='del'>-   You need to have CONFIG_MCA defined to have EtherExpressMC support.</div><div class='del'>-9) Reply Sound Blaster/SCSI (SB part) (patched version)</div><div class='del'>-</div><div class='del'>-Bugs &amp; Other Weirdness</div><div class='del'>-======================</div><div class='del'>-</div><div class='del'>-NMIs tend to occur with MCA machines because of various hardware</div><div class='del'>-weirdness, bus timeouts, and many other non-critical things.  Some basic</div><div class='del'>-code to handle them (inspired by the NetBSD MCA code) has been added to</div><div class='del'>-detect the guilty device, but it's pretty incomplete.  If NMIs are a</div><div class='del'>-persistent problem (on some model 70 or 80s, they occur every couple</div><div class='del'>-shell commands), the CONFIG_IGNORE_NMI flag will take care of that.</div><div class='del'>-</div><div class='del'>-Various Pentium machines have had serious problems with the FPU test in</div><div class='del'>-bugs.h.  Basically, the machine hangs after the HLT test.  This occurs,</div><div class='del'>-as far as we know, on the Pentium-equipped 85s, 95s, and some PC Servers.</div><div class='del'>-The PCI/MCA PC 750s are fine as far as I can tell.  The ``mca-pentium''</div><div class='del'>-boot-prompt flag will disable the FPU bug check if this is a problem</div><div class='del'>-with your machine.</div><div class='del'>-</div><div class='del'>-The model 80 has a raft of problems that are just too weird and unique</div><div class='del'>-to get into here.  Some people have no trouble while others have nothing</div><div class='del'>-but problems.  I'd suspect some problems are related to the age of the</div><div class='del'>-average 80 and accompanying hardware deterioration, although others</div><div class='del'>-are definitely design problems with the hardware.  Among the problems</div><div class='del'>-include SCSI controller problems, ESDI controller problems, and serious</div><div class='del'>-screw-ups in the floppy controller.  Oh, and the parallel port is also</div><div class='del'>-pretty flaky.  There were about 5 or 6 different model 80 motherboards</div><div class='del'>-produced to fix various obscure problems.  As far as I know, it's pretty</div><div class='del'>-much impossible to tell which bugs a particular model 80 has (other than</div><div class='del'>-triggering them, that is).</div><div class='del'>-</div><div class='del'>-Drivers are required for some MCA memory adapters.  If you're suddenly</div><div class='del'>-short a few megs of RAM, this might be the reason.  The (I think) Enhanced</div><div class='del'>-Memory Adapter commonly found on the model 70 is one.  There's a very</div><div class='del'>-alpha driver floating around, but it's pretty ugly (disassembled from</div><div class='del'>-the DOS driver, actually).  See the MCA Linux web page (URL below)</div><div class='del'>-for more current memory info.</div><div class='del'>-</div><div class='del'>-The Thinkpad 700 and 720 will work, but various components are either</div><div class='del'>-non-functional, flaky, or we don't know anything about them.  The</div><div class='del'>-graphics controller is supposed to be some WD, but we can't get things</div><div class='del'>-working properly.  The PCMCIA slots don't seem to work.  Ditto for APM.</div><div class='del'>-The serial ports work, but detection seems to be flaky.</div><div class='del'>-</div><div class='del'>-Credits</div><div class='del'>-=======</div><div class='del'>-A whole pile of people have contributed to the MCA code.  I'd include</div><div class='del'>-their names here, but I don't have a list handy.  Check the MCA Linux</div><div class='del'>-home page (URL below) for a perpetually out-of-date list.</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-MCA Linux Home Page: http://www.dgmicro.com/mca/</div><div class='del'>-</div><div class='del'>-Christophe Beauregard</div><div class='del'>-chrisb@truespectra.com</div><div class='del'>-cpbeaure@calum.csclub.uwaterloo.ca</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-Appendix A: Sample /proc/mca</div><div class='del'>-</div><div class='del'>-This is from my model 8595.  Slot 1 contains the standard IBM SCSI</div><div class='del'>-adapter, slot 3 is an Adaptec AHA-1640, slot 5 is a XGA-1 video adapter,</div><div class='del'>-and slot 7 is the 3c523 Etherlink/MC.</div><div class='del'>-</div><div class='del'>-/proc/mca/machine:</div><div class='del'>-Model Id: 0xf8</div><div class='del'>-Submodel Id: 0x14</div><div class='del'>-BIOS Revision: 0x5</div><div class='del'>-</div><div class='del'>-/proc/mca/pos:</div><div class='del'>-Slot 1: ff 8e f1 fc a0 ff ff ff  IBM SCSI Adapter w/Cache</div><div class='del'>-Slot 2: ff ff ff ff ff ff ff ff  </div><div class='del'>-Slot 3: 1f 0f 81 3b bf b6 ff ff  </div><div class='del'>-Slot 4: ff ff ff ff ff ff ff ff  </div><div class='del'>-Slot 5: db 8f 1d 5e fd c0 00 00  </div><div class='del'>-Slot 6: ff ff ff ff ff ff ff ff  </div><div class='del'>-Slot 7: 42 60 ff 08 ff ff ff ff  3Com 3c523 Etherlink/MC</div><div class='del'>-Slot 8: ff ff ff ff ff ff ff ff  </div><div class='del'>-Video : ff ff ff ff ff ff ff ff  </div><div class='del'>-SCSI  : ff ff ff ff ff ff ff ff  </div><div class='del'>-</div><div class='del'>-/proc/mca/slot1:</div><div class='del'>-Slot: 1</div><div class='del'>-Adapter Name: IBM SCSI Adapter w/Cache</div><div class='del'>-Id: 8eff</div><div class='del'>-Enabled: Yes</div><div class='del'>-POS: ff 8e f1 fc a0 ff ff ff </div><div class='del'>-Subsystem PUN: 7</div><div class='del'>-Detected at boot: Yes</div><div class='del'>-</div><div class='del'>-/proc/mca/slot3:</div><div class='del'>-Slot: 3</div><div class='del'>-Adapter Name: Unknown</div><div class='del'>-Id: 0f1f</div><div class='del'>-Enabled: Yes</div><div class='del'>-POS: 1f 0f 81 3b bf b6 ff ff </div><div class='del'>-</div><div class='del'>-/proc/mca/slot5:</div><div class='del'>-Slot: 5</div><div class='del'>-Adapter Name: Unknown</div><div class='del'>-Id: 8fdb</div><div class='del'>-Enabled: Yes</div><div class='del'>-POS: db 8f 1d 5e fd c0 00 00 </div><div class='del'>-</div><div class='del'>-/proc/mca/slot7:</div><div class='del'>-Slot: 7</div><div class='del'>-Adapter Name: 3Com 3c523 Etherlink/MC</div><div class='del'>-Id: 6042</div><div class='del'>-Enabled: Yes</div><div class='del'>-POS: 42 60 ff 08 ff ff ff ff </div><div class='del'>-Revision: 0xe</div><div class='del'>-IRQ: 9</div><div class='del'>-IO Address: 0x3300-0x3308</div><div class='del'>-Memory: 0xd8000-0xdbfff</div><div class='del'>-Transceiver: External</div><div class='del'>-Device: eth0</div><div class='del'>-Hardware Address: 02 60 8c 45 c4 2a</div><div class='head'>diff --git a/Documentation/media-framework.txt b/Documentation/media-framework.txt<br/>index 3a0f879533ce..802875413873 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/media-framework.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/media-framework.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/media-framework.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/media-framework.txt</a></div><div class='hunk'>@@ -335,6 +335,9 @@ the media_entity pipe field.</div><div class='ctx'> Calls to media_entity_pipeline_start() can be nested. The pipeline pointer must</div><div class='ctx'> be identical for all nested calls to the function.</div><div class='ctx'> </div><div class='add'>+media_entity_pipeline_start() may return an error. In that case, it will</div><div class='add'>+clean up any the changes it did by itself.</div><div class='add'>+</div><div class='ctx'> When stopping the stream, drivers must notify the entities with</div><div class='ctx'> </div><div class='ctx'> 	media_entity_pipeline_stop(struct media_entity *entity);</div><div class='hunk'>@@ -351,3 +354,19 @@ If other operations need to be disallowed on streaming entities (such as</div><div class='ctx'> changing entities configuration parameters) drivers can explicitly check the</div><div class='ctx'> media_entity stream_count field to find out if an entity is streaming. This</div><div class='ctx'> operation must be done with the media_device graph_mutex held.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Link validation</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+Link validation is performed by media_entity_pipeline_start() for any</div><div class='add'>+entity which has sink pads in the pipeline. The</div><div class='add'>+media_entity::link_validate() callback is used for that purpose. In</div><div class='add'>+link_validate() callback, entity driver should check that the properties of</div><div class='add'>+the source pad of the connected entity and its own sink pad match. It is up</div><div class='add'>+to the type of the entity (and in the end, the properties of the hardware)</div><div class='add'>+what matching actually means.</div><div class='add'>+</div><div class='add'>+Subsystems should facilitate link validation by providing subsystem specific</div><div class='add'>+helper functions to provide easy access for commonly needed information, and</div><div class='add'>+in the end provide a way to use driver-specific callbacks.</div><div class='head'>diff --git a/Documentation/memory-devices/ti-emif.txt b/Documentation/memory-devices/ti-emif.txt<br/>new file mode 100644<br/>index 000000000000..f4ad9a7d0f4b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/memory-devices/ti-emif.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/memory-devices/ti-emif.txt</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+TI EMIF SDRAM Controller Driver:</div><div class='add'>+</div><div class='add'>+Author</div><div class='add'>+========</div><div class='add'>+Aneesh V &lt;aneesh@ti.com&gt;</div><div class='add'>+</div><div class='add'>+Location</div><div class='add'>+============</div><div class='add'>+driver/memory/emif.c</div><div class='add'>+</div><div class='add'>+Supported SoCs:</div><div class='add'>+===================</div><div class='add'>+TI OMAP44xx</div><div class='add'>+TI OMAP54xx</div><div class='add'>+</div><div class='add'>+Menuconfig option:</div><div class='add'>+==========================</div><div class='add'>+Device Drivers</div><div class='add'>+	Memory devices</div><div class='add'>+		Texas Instruments EMIF driver</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+===========</div><div class='add'>+This driver is for the EMIF module available in Texas Instruments</div><div class='add'>+SoCs. EMIF is an SDRAM controller that, based on its revision,</div><div class='add'>+supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.</div><div class='add'>+This driver takes care of only LPDDR2 memories presently. The</div><div class='add'>+functions of the driver includes re-configuring AC timing</div><div class='add'>+parameters and other settings during frequency, voltage and</div><div class='add'>+temperature changes</div><div class='add'>+</div><div class='add'>+Platform Data (see include/linux/platform_data/emif_plat.h):</div><div class='add'>+=====================================================================</div><div class='add'>+DDR device details and other board dependent and SoC dependent</div><div class='add'>+information can be passed through platform data (struct emif_platform_data)</div><div class='add'>+- DDR device details: 'struct ddr_device_info'</div><div class='add'>+- Device AC timings: 'struct lpddr2_timings' and 'struct lpddr2_min_tck'</div><div class='add'>+- Custom configurations: customizable policy options through</div><div class='add'>+  'struct emif_custom_configs'</div><div class='add'>+- IP revision</div><div class='add'>+- PHY type</div><div class='add'>+</div><div class='add'>+Interface to the external world:</div><div class='add'>+================================</div><div class='add'>+EMIF driver registers notifiers for voltage and frequency changes</div><div class='add'>+affecting EMIF and takes appropriate actions when these are invoked.</div><div class='add'>+- freq_pre_notify_handling()</div><div class='add'>+- freq_post_notify_handling()</div><div class='add'>+- volt_notify_handling()</div><div class='add'>+</div><div class='add'>+Debugfs</div><div class='add'>+========</div><div class='add'>+The driver creates two debugfs entries per device.</div><div class='add'>+- regcache_dump : dump of register values calculated and saved for all</div><div class='add'>+  frequencies used so far.</div><div class='add'>+- mr4 : last polled value of MR4 register in the LPDDR2 device. MR4</div><div class='add'>+  indicates the current temperature level of the device.</div><div class='head'>diff --git a/Documentation/memory-hotplug.txt b/Documentation/memory-hotplug.txt<br/>index 8f485d72cf25..6d0c2519cf47 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/memory-hotplug.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/memory-hotplug.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/memory-hotplug.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/memory-hotplug.txt</a></div><div class='hunk'>@@ -341,7 +341,7 @@ Need more implementation yet....</div><div class='ctx'> --------------------------------</div><div class='ctx'> 8. Memory hotplug event notifier</div><div class='ctx'> --------------------------------</div><div class='del'>-Memory hotplug has event notifer. There are 6 types of notification.</div><div class='add'>+Memory hotplug has event notifier. There are 6 types of notification.</div><div class='ctx'> </div><div class='ctx'> MEMORY_GOING_ONLINE</div><div class='ctx'>   Generated before new memory becomes available in order to be able to</div><div class='head'>diff --git a/Documentation/misc-devices/mei/.gitignore b/Documentation/misc-devices/mei/.gitignore<br/>new file mode 100644<br/>index 000000000000..f356b81ca1ec<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/misc-devices/mei/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/misc-devices/mei/.gitignore</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+mei-amt-version</div><div class='head'>diff --git a/Documentation/misc-devices/mei/Makefile b/Documentation/misc-devices/mei/Makefile<br/>new file mode 100644<br/>index 000000000000..00e8c3e836ff<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/misc-devices/mei/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/misc-devices/mei/Makefile</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+# kbuild trick to avoid linker error. Can be omitted if a module is built.</div><div class='add'>+obj- := dummy.o</div><div class='add'>+</div><div class='add'>+# List of programs to build</div><div class='add'>+hostprogs-y := mei-amt-version</div><div class='add'>+HOSTCFLAGS_mei-amt-version.o += -I$(objtree)/usr/include</div><div class='add'>+# Tell kbuild to always build the programs</div><div class='add'>+always := $(hostprogs-y)</div><div class='head'>diff --git a/Documentation/misc-devices/mei/TODO b/Documentation/misc-devices/mei/TODO<br/>new file mode 100644<br/>index 000000000000..6b3625d3058c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/misc-devices/mei/TODO?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/misc-devices/mei/TODO</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+TODO:</div><div class='add'>+	- Cleanup and split the timer function</div><div class='head'>diff --git a/drivers/staging/mei/mei-amt-version.c b/Documentation/misc-devices/mei/mei-amt-version.c<br/>index ac2a507be253..01804f216312 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/mei-amt-version.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/mei-amt-version.c</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/misc-devices/mei/mei-amt-version.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/misc-devices/mei/mei-amt-version.c</a></div><div class='hunk'>@@ -74,7 +74,7 @@</div><div class='ctx'> #include &lt;stdint.h&gt;</div><div class='ctx'> #include &lt;stdbool.h&gt;</div><div class='ctx'> #include &lt;bits/wordsize.h&gt;</div><div class='del'>-#include "mei.h"</div><div class='add'>+#include &lt;linux/mei.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='ctx'>  * Intel Management Engine Interface</div><div class='head'>diff --git a/drivers/staging/mei/mei.txt b/Documentation/misc-devices/mei/mei.txt<br/>index 2785697da59d..2785697da59d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/mei.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/mei.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/misc-devices/mei/mei.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/misc-devices/mei/mei.txt</a></div><div class='head'>diff --git a/Documentation/networking/00-INDEX b/Documentation/networking/00-INDEX<br/>index 9ad9ddeb384c..2cc3c7733a2f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/00-INDEX?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/00-INDEX</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/00-INDEX?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/00-INDEX</a></div><div class='hunk'>@@ -1,7 +1,5 @@</div><div class='ctx'> 00-INDEX</div><div class='ctx'> 	- this file</div><div class='del'>-3c359.txt</div><div class='del'>-	- information on the 3Com TokenLink Velocity XL (3c5359) driver.</div><div class='ctx'> 3c505.txt</div><div class='ctx'> 	- information on the 3Com EtherLink Plus (3c505) driver.</div><div class='ctx'> 3c509.txt</div><div class='hunk'>@@ -142,8 +140,6 @@ netif-msg.txt</div><div class='ctx'> 	- Design of the network interface message level setting (NETIF_MSG_*).</div><div class='ctx'> nfc.txt</div><div class='ctx'> 	- The Linux Near Field Communication (NFS) subsystem.</div><div class='del'>-olympic.txt</div><div class='del'>-	- IBM PCI Pit/Pit-Phy/Olympic Token Ring driver info.</div><div class='ctx'> openvswitch.txt</div><div class='ctx'> 	- Open vSwitch developer documentation.</div><div class='ctx'> operstates.txt</div><div class='hunk'>@@ -184,8 +180,6 @@ skfp.txt</div><div class='ctx'> 	- SysKonnect FDDI (SK-5xxx, Compaq Netelligent) driver info.</div><div class='ctx'> smc9.txt</div><div class='ctx'> 	- the driver for SMC's 9000 series of Ethernet cards</div><div class='del'>-smctr.txt</div><div class='del'>-	- SMC TokenCard TokenRing Linux driver info.</div><div class='ctx'> spider-net.txt</div><div class='ctx'> 	- README for the Spidernet Driver (as found in PS3 / Cell BE).</div><div class='ctx'> stmmac.txt</div><div class='hunk'>@@ -200,8 +194,6 @@ tcp-thin.txt</div><div class='ctx'> 	- kernel tuning options for low rate 'thin' TCP streams.</div><div class='ctx'> tlan.txt</div><div class='ctx'> 	- ThunderLAN (Compaq Netelligent 10/100, Olicom OC-2xxx) driver info.</div><div class='del'>-tms380tr.txt</div><div class='del'>-	- SysKonnect Token Ring ISA/PCI adapter driver info.</div><div class='ctx'> tproxy.txt</div><div class='ctx'> 	- Transparent proxy support user guide.</div><div class='ctx'> tuntap.txt</div><div class='head'>diff --git a/Documentation/networking/3c359.txt b/Documentation/networking/3c359.txt<br/>deleted file mode 100644<br/>index dadfe8147ab8..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/3c359.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/3c359.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,58 +0,0 @@</div><div class='del'>-</div><div class='del'>-3COM PCI TOKEN LINK VELOCITY XL TOKEN RING CARDS README</div><div class='del'>-</div><div class='del'>-Release 0.9.0 - Release   </div><div class='del'>-	Jul 17th 2000 Mike Phillips </div><div class='del'>-</div><div class='del'>-	1.2.0 - Final</div><div class='del'>-	Feb 17th 2002 Mike Phillips </div><div class='del'>-	Updated for submission to the 2.4.x kernel.</div><div class='del'>-</div><div class='del'>-Thanks:</div><div class='del'>-	Terry Murphy from 3Com for tech docs and support,</div><div class='del'>-	Adam D. Ligas for testing the driver.</div><div class='del'>- </div><div class='del'>-Note:</div><div class='del'>-	This driver will NOT work with the 3C339 Token Ring cards, you need</div><div class='del'>-to use the tms380 driver instead.</div><div class='del'>-</div><div class='del'>-Options:</div><div class='del'>-</div><div class='del'>-The driver accepts three options: ringspeed, pkt_buf_sz and message_level.</div><div class='del'>-</div><div class='del'>-These options can be specified differently for each card found. </div><div class='del'>-</div><div class='del'>-ringspeed:  Has one of three settings 0 (default), 4 or 16.  0 will </div><div class='del'>-make the card autosense the ringspeed and join at the appropriate speed, </div><div class='del'>-this will be the default option for most people.  4 or 16 allow you to </div><div class='del'>-explicitly force the card to operate at a certain speed.  The card will fail </div><div class='del'>-if you try to insert it at the wrong speed. (Although some hubs will allow </div><div class='del'>-this so be *very* careful).  The main purpose for explicitly setting the ring</div><div class='del'>-speed is for when the card is first on the ring.  In autosense mode, if the card</div><div class='del'>-cannot detect any active monitors on the ring it will open at the same speed as</div><div class='del'>-its last opening. This can be hazardous if this speed does not match the speed</div><div class='del'>-you want the ring to operate at.  </div><div class='del'>-</div><div class='del'>-pkt_buf_sz:  This is this initial receive buffer allocation size.  This will</div><div class='del'>-default to 4096 if no value is entered. You may increase performance of the </div><div class='del'>-driver by setting this to a value larger than the network packet size, although</div><div class='del'>-the driver now re-sizes buffers based on MTU settings as well. </div><div class='del'>-</div><div class='del'>-message_level: Controls level of messages created by the driver. Defaults to 0:</div><div class='del'>-which only displays start-up and critical messages.  Presently any non-zero </div><div class='del'>-value will display all soft messages as well.  NB This does not turn </div><div class='del'>-debugging messages on, that must be done by modified the source code.</div><div class='del'>-</div><div class='del'>-Variable MTU size:</div><div class='del'>-</div><div class='del'>-The driver can handle a MTU size up to either 4500 or 18000 depending upon </div><div class='del'>-ring speed.  The driver also changes the size of the receive buffers as part</div><div class='del'>-of the mtu re-sizing, so if you set mtu = 18000, you will need to be able</div><div class='del'>-to allocate 16 * (sk_buff with 18000 buffer size) call it 18500 bytes per ring </div><div class='del'>-position = 296,000 bytes of memory space, plus of course anything </div><div class='del'>-necessary for the tx sk_buff's.  Remember this is per card, so if you are</div><div class='del'>-building routers, gateway's etc, you could start to use a lot of memory</div><div class='del'>-real fast.</div><div class='del'>-</div><div class='del'>-2/17/02 Mike Phillips</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/networking/3c509.txt b/Documentation/networking/3c509.txt<br/>index dcc9eaf59395..fbf722e15ac3 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/3c509.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/3c509.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/3c509.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/3c509.txt</a></div><div class='hunk'>@@ -25,7 +25,6 @@ models:</div><div class='ctx'>   3c509B (later revision of the ISA card; supports full-duplex)</div><div class='ctx'>   3c589 (PCMCIA)</div><div class='ctx'>   3c589B (later revision of the 3c589; supports full-duplex)</div><div class='del'>-  3c529 (MCA)</div><div class='ctx'>   3c579 (EISA)</div><div class='ctx'> </div><div class='ctx'> Large portions of this documentation were heavily borrowed from the guide</div><div class='head'>diff --git a/Documentation/networking/batman-adv.txt b/Documentation/networking/batman-adv.txt<br/>index 221ad0cdf11f..75a592365af9 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/batman-adv.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/batman-adv.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/batman-adv.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/batman-adv.txt</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-[state: 21-08-2011]</div><div class='del'>-</div><div class='ctx'> BATMAN-ADV</div><div class='ctx'> ----------</div><div class='ctx'> </div><div class='hunk'>@@ -67,18 +65,19 @@ To deactivate an interface you have  to  write  "none"  into  its</div><div class='ctx'> All  mesh  wide  settings  can be found in batman's own interface</div><div class='ctx'> folder:</div><div class='ctx'> </div><div class='del'>-#  ls  /sys/class/net/bat0/mesh/</div><div class='del'>-# aggregated_ogms   fragmentation gw_sel_class   vis_mode</div><div class='del'>-# ap_isolation      gw_bandwidth  hop_penalty</div><div class='del'>-# bonding           gw_mode       orig_interval</div><div class='add'>+# ls /sys/class/net/bat0/mesh/</div><div class='add'>+# aggregated_ogms        gw_bandwidth           log_level</div><div class='add'>+# ap_isolation           gw_mode                orig_interval</div><div class='add'>+# bonding                gw_sel_class           routing_algo</div><div class='add'>+# bridge_loop_avoidance  hop_penalty            vis_mode</div><div class='add'>+# fragmentation</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> There is a special folder for debugging information:</div><div class='ctx'> </div><div class='ctx'> #  ls /sys/kernel/debug/batman_adv/bat0/</div><div class='del'>-#  gateways     socket        transtable_global  vis_data</div><div class='del'>-#  originators  softif_neigh  transtable_local</div><div class='del'>-</div><div class='add'>+# bla_claim_table    log                socket             transtable_local</div><div class='add'>+# gateways           originators        transtable_global  vis_data</div><div class='ctx'> </div><div class='ctx'> Some of the files contain all sort of status information  regard-</div><div class='ctx'> ing  the  mesh  network.  For  example, you can view the table of</div><div class='hunk'>@@ -202,12 +201,13 @@ abled  during run time. Following log_levels are defined:</div><div class='ctx'> 1 - Enable messages related to routing / flooding / broadcasting</div><div class='ctx'> 2 - Enable messages related to route added / changed / deleted</div><div class='ctx'> 4 - Enable messages related to translation table operations</div><div class='del'>-7 - Enable all messages</div><div class='add'>+8 - Enable messages related to bridge loop avoidance</div><div class='add'>+15 - enable all messages</div><div class='ctx'> </div><div class='ctx'> The debug output can be changed at runtime  using  the  file</div><div class='ctx'> /sys/class/net/bat0/mesh/log_level. e.g.</div><div class='ctx'> </div><div class='del'>-# echo 2 &gt; /sys/class/net/bat0/mesh/log_level</div><div class='add'>+# echo 6 &gt; /sys/class/net/bat0/mesh/log_level</div><div class='ctx'> </div><div class='ctx'> will enable debug messages for when routes change.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/can.txt b/Documentation/networking/can.txt<br/>index 56ca3b75376e..ac295399f0d4 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/can.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/can.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/can.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/can.txt</a></div><div class='hunk'>@@ -649,7 +649,7 @@ solution for a couple of reasons:</div><div class='ctx'>   The CAN device must be configured via netlink interface. The supported</div><div class='ctx'>   netlink message types are defined and briefly described in</div><div class='ctx'>   "include/linux/can/netlink.h". CAN link support for the program "ip"</div><div class='del'>-  of the IPROUTE2 utility suite is avaiable and it can be used as shown</div><div class='add'>+  of the IPROUTE2 utility suite is available and it can be used as shown</div><div class='ctx'>   below:</div><div class='ctx'> </div><div class='ctx'>   - Setting CAN device properties:</div><div class='head'>diff --git a/Documentation/networking/fore200e.txt b/Documentation/networking/fore200e.txt<br/>index f648eb265188..d52af53efdc5 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/fore200e.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/fore200e.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/fore200e.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/fore200e.txt</a></div><div class='hunk'>@@ -11,12 +11,10 @@ i386, alpha (untested), powerpc, sparc and sparc64 archs.</div><div class='ctx'> </div><div class='ctx'> The intent is to enable the use of different models of FORE adapters at the</div><div class='ctx'> same time, by hosts that have several bus interfaces (such as PCI+SBUS,</div><div class='del'>-PCI+MCA or PCI+EISA).</div><div class='add'>+or PCI+EISA).</div><div class='ctx'> </div><div class='ctx'> Only PCI and SBUS devices are currently supported by the driver, but support</div><div class='del'>-for other bus interfaces such as EISA should not be too hard to add (this may</div><div class='del'>-be more tricky for the MCA bus, though, as FORE made some MCA-specific</div><div class='del'>-modifications to the adapter's AALI interface).</div><div class='add'>+for other bus interfaces such as EISA should not be too hard to add.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Firmware Copyright Notice</div><div class='head'>diff --git a/Documentation/networking/ieee802154.txt b/Documentation/networking/ieee802154.txt<br/>index 1dc1c24a7547..703cf4370c79 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/ieee802154.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/ieee802154.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/ieee802154.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/ieee802154.txt</a></div><div class='hunk'>@@ -4,15 +4,22 @@</div><div class='ctx'> </div><div class='ctx'> Introduction</div><div class='ctx'> ============</div><div class='add'>+The IEEE 802.15.4 working group focuses on standartization of bottom</div><div class='add'>+two layers: Medium Accsess Control (MAC) and Physical (PHY). And there</div><div class='add'>+are mainly two options available for upper layers:</div><div class='add'>+ - ZigBee - proprietary protocol from ZigBee Alliance</div><div class='add'>+ - 6LowPAN - IPv6 networking over low rate personal area networks</div><div class='ctx'> </div><div class='ctx'> The Linux-ZigBee project goal is to provide complete implementation</div><div class='del'>-of IEEE 802.15.4 / ZigBee / 6LoWPAN protocols. IEEE 802.15.4 is a stack</div><div class='add'>+of IEEE 802.15.4 and 6LoWPAN protocols. IEEE 802.15.4 is a stack</div><div class='ctx'> of protocols for organizing Low-Rate Wireless Personal Area Networks.</div><div class='ctx'> </div><div class='del'>-Currently only IEEE 802.15.4 layer is implemented. We have chosen</div><div class='del'>-to use plain Berkeley socket API, the generic Linux networking stack</div><div class='del'>-to transfer IEEE 802.15.4 messages and a special protocol over genetlink</div><div class='del'>-for configuration/management</div><div class='add'>+The stack is composed of three main parts:</div><div class='add'>+ - IEEE 802.15.4 layer;  We have chosen to use plain Berkeley socket API,</div><div class='add'>+   the generic Linux networking stack to transfer IEEE 802.15.4 messages</div><div class='add'>+   and a special protocol over genetlink for configuration/management</div><div class='add'>+ - MAC - provides access to shared channel and reliable data delivery</div><div class='add'>+ - PHY - represents device drivers</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Socket API</div><div class='hunk'>@@ -29,15 +36,6 @@ or git tree at git://linux-zigbee.git.sourceforge.net/gitroot/linux-zigbee).</div><div class='ctx'> One can use SOCK_RAW for passing raw data towards device xmit function. YMMV.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-MLME - MAC Level Management</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-Most of IEEE 802.15.4 MLME interfaces are directly mapped on netlink commands.</div><div class='del'>-See the include/net/nl802154.h header. Our userspace tools package</div><div class='del'>-(see above) provides CLI configuration utility for radio interfaces and simple</div><div class='del'>-coordinator for IEEE 802.15.4 networks as an example users of MLME protocol.</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> Kernel side</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='hunk'>@@ -51,6 +49,15 @@ Like with WiFi, there are several types of devices implementing IEEE 802.15.4.</div><div class='ctx'> Those types of devices require different approach to be hooked into Linux kernel.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+MLME - MAC Level Management</div><div class='add'>+============================</div><div class='add'>+</div><div class='add'>+Most of IEEE 802.15.4 MLME interfaces are directly mapped on netlink commands.</div><div class='add'>+See the include/net/nl802154.h header. Our userspace tools package</div><div class='add'>+(see above) provides CLI configuration utility for radio interfaces and simple</div><div class='add'>+coordinator for IEEE 802.15.4 networks as an example users of MLME protocol.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> HardMAC</div><div class='ctx'> =======</div><div class='ctx'> </div><div class='hunk'>@@ -73,11 +80,47 @@ We provide an example of simple HardMAC driver at drivers/ieee802154/fakehard.c</div><div class='ctx'> SoftMAC</div><div class='ctx'> =======</div><div class='ctx'> </div><div class='del'>-We are going to provide intermediate layer implementing IEEE 802.15.4 MAC</div><div class='del'>-in software. This is currently WIP.</div><div class='add'>+The MAC is the middle layer in the IEEE 802.15.4 Linux stack. This moment it</div><div class='add'>+provides interface for drivers registration and management of slave interfaces.</div><div class='add'>+</div><div class='add'>+NOTE: Currently the only monitor device type is supported - it's IEEE 802.15.4</div><div class='add'>+stack interface for network sniffers (e.g. WireShark).</div><div class='add'>+</div><div class='add'>+This layer is going to be extended soon.</div><div class='ctx'> </div><div class='ctx'> See header include/net/mac802154.h and several drivers in drivers/ieee802154/.</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+Device drivers API</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+The include/net/mac802154.h defines following functions:</div><div class='add'>+ - struct ieee802154_dev *ieee802154_alloc_device</div><div class='add'>+   (size_t priv_size, struct ieee802154_ops *ops):</div><div class='add'>+   allocation of IEEE 802.15.4 compatible device</div><div class='add'>+</div><div class='add'>+ - void ieee802154_free_device(struct ieee802154_dev *dev):</div><div class='add'>+   freeing allocated device</div><div class='add'>+</div><div class='add'>+ - int ieee802154_register_device(struct ieee802154_dev *dev):</div><div class='add'>+   register PHY in the system</div><div class='add'>+</div><div class='add'>+ - void ieee802154_unregister_device(struct ieee802154_dev *dev):</div><div class='add'>+   freeing registered PHY</div><div class='add'>+</div><div class='add'>+Moreover IEEE 802.15.4 device operations structure should be filled.</div><div class='add'>+</div><div class='add'>+Fake drivers</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+In addition there are two drivers available which simulate real devices with</div><div class='add'>+HardMAC (fakehard) and SoftMAC (fakelb - IEEE 802.15.4 loopback driver)</div><div class='add'>+interfaces. This option provides possibility to test and debug stack without</div><div class='add'>+usage of real hardware.</div><div class='add'>+</div><div class='add'>+See sources in drivers/ieee802154 folder for more details.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> 6LoWPAN Linux implementation</div><div class='ctx'> ============================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/ip-sysctl.txt b/Documentation/networking/ip-sysctl.txt<br/>index bd80ba5847d2..6f896b94abdc 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/ip-sysctl.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/ip-sysctl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/ip-sysctl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/ip-sysctl.txt</a></div><div class='hunk'>@@ -147,7 +147,7 @@ tcp_adv_win_scale - INTEGER</div><div class='ctx'> 	(if tcp_adv_win_scale &gt; 0) or bytes-bytes/2^(-tcp_adv_win_scale),</div><div class='ctx'> 	if it is &lt;= 0.</div><div class='ctx'> 	Possible values are [-31, 31], inclusive.</div><div class='del'>-	Default: 2</div><div class='add'>+	Default: 1</div><div class='ctx'> </div><div class='ctx'> tcp_allowed_congestion_control - STRING</div><div class='ctx'> 	Show/set the congestion control choices available to non-privileged</div><div class='hunk'>@@ -190,6 +190,20 @@ tcp_cookie_size - INTEGER</div><div class='ctx'> tcp_dsack - BOOLEAN</div><div class='ctx'> 	Allows TCP to send "duplicate" SACKs.</div><div class='ctx'> </div><div class='add'>+tcp_early_retrans - INTEGER</div><div class='add'>+	Enable Early Retransmit (ER), per RFC 5827. ER lowers the threshold</div><div class='add'>+	for triggering fast retransmit when the amount of outstanding data is</div><div class='add'>+	small and when no previously unsent data can be transmitted (such</div><div class='add'>+	that limited transmit could be used).</div><div class='add'>+	Possible values:</div><div class='add'>+		0 disables ER</div><div class='add'>+		1 enables ER</div><div class='add'>+		2 enables ER but delays fast recovery and fast retransmit</div><div class='add'>+		  by a fourth of RTT. This mitigates connection falsely</div><div class='add'>+		  recovers when network has a small degree of reordering</div><div class='add'>+		  (less than 3 packets).</div><div class='add'>+	Default: 2</div><div class='add'>+</div><div class='ctx'> tcp_ecn - INTEGER</div><div class='ctx'> 	Enable Explicit Congestion Notification (ECN) in TCP. ECN is only</div><div class='ctx'> 	used when both ends of the TCP flow support it. It is useful to</div><div class='hunk'>@@ -410,7 +424,7 @@ tcp_rmem - vector of 3 INTEGERs: min, default, max</div><div class='ctx'> 	net.core.rmem_max.  Calling setsockopt() with SO_RCVBUF disables</div><div class='ctx'> 	automatic tuning of that socket's receive buffer size, in which</div><div class='ctx'> 	case this value is ignored.</div><div class='del'>-	Default: between 87380B and 4MB, depending on RAM size.</div><div class='add'>+	Default: between 87380B and 6MB, depending on RAM size.</div><div class='ctx'> </div><div class='ctx'> tcp_sack - BOOLEAN</div><div class='ctx'> 	Enable select acknowledgments (SACKS).</div><div class='hunk'>@@ -1287,13 +1301,22 @@ bridge-nf-call-ip6tables - BOOLEAN</div><div class='ctx'> bridge-nf-filter-vlan-tagged - BOOLEAN</div><div class='ctx'> 	1 : pass bridged vlan-tagged ARP/IP/IPv6 traffic to {arp,ip,ip6}tables.</div><div class='ctx'> 	0 : disable this.</div><div class='del'>-	Default: 1</div><div class='add'>+	Default: 0</div><div class='ctx'> </div><div class='ctx'> bridge-nf-filter-pppoe-tagged - BOOLEAN</div><div class='ctx'> 	1 : pass bridged pppoe-tagged IP/IPv6 traffic to {ip,ip6}tables.</div><div class='ctx'> 	0 : disable this.</div><div class='del'>-	Default: 1</div><div class='add'>+	Default: 0</div><div class='ctx'> </div><div class='add'>+bridge-nf-pass-vlan-input-dev - BOOLEAN</div><div class='add'>+	1: if bridge-nf-filter-vlan-tagged is enabled, try to find a vlan</div><div class='add'>+	interface on the bridge and set the netfilter input device to the vlan.</div><div class='add'>+	This allows use of e.g. "iptables -i br0.1" and makes the REDIRECT</div><div class='add'>+	target work with vlan-on-top-of-bridge interfaces.  When no matching</div><div class='add'>+	vlan interface is found, or this switch is off, the input device is</div><div class='add'>+	set to the bridge interface.</div><div class='add'>+	0: disable bridge netfilter vlan interface lookup.</div><div class='add'>+	Default: 0</div><div class='ctx'> </div><div class='ctx'> proc/sys/net/sctp/* Variables:</div><div class='ctx'> </div><div class='hunk'>@@ -1484,11 +1507,8 @@ addr_scope_policy - INTEGER</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /proc/sys/net/core/*</div><div class='del'>-dev_weight - INTEGER</div><div class='del'>-	The maximum number of packets that kernel can handle on a NAPI</div><div class='del'>-	interrupt, it's a Per-CPU variable.</div><div class='add'>+	Please see: Documentation/sysctl/net.txt for descriptions of these entries.</div><div class='ctx'> </div><div class='del'>-	Default: 64</div><div class='ctx'> </div><div class='ctx'> /proc/sys/net/unix/*</div><div class='ctx'> max_dgram_qlen - INTEGER</div><div class='head'>diff --git a/Documentation/networking/mac80211-auth-assoc-deauth.txt b/Documentation/networking/mac80211-auth-assoc-deauth.txt<br/>index e0a2aa585ca3..d7a15fe91bf7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/mac80211-auth-assoc-deauth.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/mac80211-auth-assoc-deauth.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/mac80211-auth-assoc-deauth.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/mac80211-auth-assoc-deauth.txt</a></div><div class='hunk'>@@ -23,7 +23,7 @@ BA session stop &amp; deauth/disassoc frames</div><div class='ctx'> end note</div><div class='ctx'> end</div><div class='ctx'> </div><div class='del'>-mac80211-&gt;driver: config(channel, non-HT)</div><div class='add'>+mac80211-&gt;driver: config(channel, channel type)</div><div class='ctx'> mac80211-&gt;driver: bss_info_changed(set BSSID, basic rate bitmap)</div><div class='ctx'> mac80211-&gt;driver: sta_state(AP, exists)</div><div class='ctx'> </div><div class='hunk'>@@ -51,7 +51,7 @@ note over mac80211,driver: cleanup like for authenticate</div><div class='ctx'> end</div><div class='ctx'> </div><div class='ctx'> alt not previously authenticated (FT)</div><div class='del'>-mac80211-&gt;driver: config(channel, non-HT)</div><div class='add'>+mac80211-&gt;driver: config(channel, channel type)</div><div class='ctx'> mac80211-&gt;driver: bss_info_changed(set BSSID, basic rate bitmap)</div><div class='ctx'> mac80211-&gt;driver: sta_state(AP, exists)</div><div class='ctx'> mac80211-&gt;driver: sta_state(AP, authenticated)</div><div class='hunk'>@@ -67,10 +67,6 @@ end</div><div class='ctx'> </div><div class='ctx'> mac80211-&gt;driver: set up QoS parameters</div><div class='ctx'> </div><div class='del'>-alt is HT channel</div><div class='del'>-mac80211-&gt;driver: config(channel, HT params)</div><div class='del'>-end</div><div class='del'>-</div><div class='ctx'> mac80211-&gt;driver: bss_info_changed(QoS, HT, associated with AID)</div><div class='ctx'> mac80211-&gt;userspace: associated</div><div class='ctx'> </div><div class='hunk'>@@ -95,5 +91,5 @@ mac80211-&gt;driver: sta_state(AP,exists)</div><div class='ctx'> mac80211-&gt;driver: sta_state(AP,not-exists)</div><div class='ctx'> mac80211-&gt;driver: turn off powersave</div><div class='ctx'> mac80211-&gt;driver: bss_info_changed(clear BSSID, not associated, no QoS, ...)</div><div class='del'>-mac80211-&gt;driver: config(non-HT channel type)</div><div class='add'>+mac80211-&gt;driver: config(channel type to non-HT)</div><div class='ctx'> mac80211-&gt;userspace: disconnected</div><div class='head'>diff --git a/Documentation/networking/olympic.txt b/Documentation/networking/olympic.txt<br/>deleted file mode 100644<br/>index b95b5bf96751..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/olympic.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/olympic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,79 +0,0 @@</div><div class='del'>-</div><div class='del'>-IBM PCI Pit/Pit-Phy/Olympic CHIPSET BASED TOKEN RING CARDS README</div><div class='del'>-</div><div class='del'>-Release 0.2.0 - Release    </div><div class='del'>-	June 8th 1999 Peter De Schrijver &amp; Mike Phillips</div><div class='del'>-Release 0.9.C - Release</div><div class='del'>-	April 18th 2001 Mike Phillips</div><div class='del'>-</div><div class='del'>-Thanks:</div><div class='del'>-Erik De Cock, Adrian Bridgett and Frank Fiene for their </div><div class='del'>-patience and testing.</div><div class='del'>-Donald Champion for the cardbus support</div><div class='del'>-Kyle Lucke for the dma api changes.   </div><div class='del'>-Jonathon Bitner for hardware support. </div><div class='del'>-Everybody on linux-tr for their continued support.  </div><div class='del'>- </div><div class='del'>-Options:</div><div class='del'>-</div><div class='del'>-The driver accepts four options: ringspeed, pkt_buf_sz,  </div><div class='del'>-message_level and network_monitor.</div><div class='del'>-</div><div class='del'>-These options can be specified differently for each card found. </div><div class='del'>-</div><div class='del'>-ringspeed:  Has one of three settings 0 (default), 4 or 16.  0 will </div><div class='del'>-make the card autosense the ringspeed and join at the appropriate speed, </div><div class='del'>-this will be the default option for most people.  4 or 16 allow you to </div><div class='del'>-explicitly force the card to operate at a certain speed.  The card will fail </div><div class='del'>-if you try to insert it at the wrong speed. (Although some hubs will allow </div><div class='del'>-this so be *very* careful).  The main purpose for explicitly setting the ring</div><div class='del'>-speed is for when the card is first on the ring.  In autosense mode, if the card</div><div class='del'>-cannot detect any active monitors on the ring it will not open, so you must </div><div class='del'>-re-init the card at the appropriate speed.  Unfortunately at present the only</div><div class='del'>-way of doing this is rmmod and insmod which is a bit tough if it is compiled</div><div class='del'>-in the kernel.</div><div class='del'>-</div><div class='del'>-pkt_buf_sz:  This is this initial receive buffer allocation size.  This will</div><div class='del'>-default to 4096 if no value is entered. You may increase performance of the </div><div class='del'>-driver by setting this to a value larger than the network packet size, although</div><div class='del'>-the driver now re-sizes buffers based on MTU settings as well. </div><div class='del'>-</div><div class='del'>-message_level: Controls level of messages created by the driver. Defaults to 0:</div><div class='del'>-which only displays start-up and critical messages.  Presently any non-zero </div><div class='del'>-value will display all soft messages as well.  NB This does not turn </div><div class='del'>-debugging messages on, that must be done by modified the source code.</div><div class='del'>-</div><div class='del'>-network_monitor: Any non-zero value will provide a quasi network monitoring </div><div class='del'>-mode.  All unexpected MAC frames (beaconing etc.) will be received</div><div class='del'>-by the driver and the source and destination addresses printed. </div><div class='del'>-Also an entry will be added in  /proc/net called olympic_tr%d, where tr%d</div><div class='del'>-is the registered device name, i.e tr0, tr1, etc. This displays low</div><div class='del'>-level information about the configuration of the ring and the adapter.</div><div class='del'>-This feature has been designed for network administrators to assist in </div><div class='del'>-the diagnosis of network / ring problems. (This used to OLYMPIC_NETWORK_MONITOR,</div><div class='del'>-but has now changed to allow each adapter to be configured differently and</div><div class='del'>-to alleviate the necessity to re-compile olympic to turn the option on).</div><div class='del'>-</div><div class='del'>-Multi-card:</div><div class='del'>-</div><div class='del'>-The driver will detect multiple cards and will work with shared interrupts,</div><div class='del'>-each card is assigned the next token ring device, i.e. tr0 , tr1, tr2.  The </div><div class='del'>-driver should also happily reside in the system with other drivers.  It has </div><div class='del'>-been tested with ibmtr.c running, and I personally have had one Olicom PCI </div><div class='del'>-card and two IBM olympic cards (all on the same interrupt), all running</div><div class='del'>-together. </div><div class='del'>-</div><div class='del'>-Variable MTU size:</div><div class='del'>-</div><div class='del'>-The driver can handle a MTU size up to either 4500 or 18000 depending upon </div><div class='del'>-ring speed.  The driver also changes the size of the receive buffers as part</div><div class='del'>-of the mtu re-sizing, so if you set mtu = 18000, you will need to be able</div><div class='del'>-to allocate 16 * (sk_buff with 18000 buffer size) call it 18500 bytes per ring </div><div class='del'>-position = 296,000 bytes of memory space, plus of course anything </div><div class='del'>-necessary for the tx sk_buff's.  Remember this is per card, so if you are</div><div class='del'>-building routers, gateway's etc, you could start to use a lot of memory</div><div class='del'>-real fast.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-6/8/99 Peter De Schrijver and Mike Phillips</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/networking/smctr.txt b/Documentation/networking/smctr.txt<br/>deleted file mode 100644<br/>index 9af25b810c1f..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/smctr.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/smctr.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,66 +0,0 @@</div><div class='del'>-Text File for the SMC TokenCard TokenRing Linux driver (smctr.c).</div><div class='del'>-        By Jay Schulist &lt;jschlst@samba.org&gt;</div><div class='del'>-</div><div class='del'>-The Linux SMC Token Ring driver works with the SMC TokenCard Elite (8115T) </div><div class='del'>-ISA and SMC TokenCard Elite/A (8115T/A) MCA adapters.</div><div class='del'>-</div><div class='del'>-Latest information on this driver can be obtained on the Linux-SNA WWW site.</div><div class='del'>-Please point your browser to: http://www.linux-sna.org</div><div class='del'>-</div><div class='del'>-This driver is rather simple to use. Select Y to Token Ring adapter support</div><div class='del'>-in the kernel configuration. A choice for SMC Token Ring adapters will</div><div class='del'>-appear. This drives supports all SMC ISA/MCA adapters. Choose this</div><div class='del'>-option. I personally recommend compiling the driver as a module (M), but if you</div><div class='del'>-you would like to compile it statically answer Y instead.</div><div class='del'>-</div><div class='del'>-This driver supports multiple adapters without the need to load multiple copies</div><div class='del'>-of the driver. You should be able to load up to 7 adapters without any kernel</div><div class='del'>-modifications, if you are in need of more please contact the maintainer of this</div><div class='del'>-driver.</div><div class='del'>-</div><div class='del'>-Load the driver either by lilo/loadlin or as a module. When a module using the</div><div class='del'>-following command will suffice for most:</div><div class='del'>-</div><div class='del'>-# modprobe smctr</div><div class='del'>-smctr.c: v1.00 12/6/99 by jschlst@samba.org</div><div class='del'>-tr0: SMC TokenCard 8115T at Io 0x300, Irq 10, Rom 0xd8000, Ram 0xcc000.</div><div class='del'>-</div><div class='del'>-Now just setup the device via ifconfig and set and routes you may have. After</div><div class='del'>-this you are ready to start sending some tokens.</div><div class='del'>-</div><div class='del'>-Errata:</div><div class='del'>-1). For anyone wondering where to pick up the SMC adapters please browse</div><div class='del'>-    to http://www.smc.com</div><div class='del'>-</div><div class='del'>-2). If you are the first/only Token Ring Client on a Token Ring LAN, please</div><div class='del'>-    specify the ringspeed with the ringspeed=[4/16] module option. If no</div><div class='del'>-    ringspeed is specified the driver will attempt to autodetect the ring</div><div class='del'>-    speed and/or if the adapter is the first/only station on the ring take</div><div class='del'>-    the appropriate actions. </div><div class='del'>-</div><div class='del'>-    NOTE: Default ring speed is 16MB UTP.</div><div class='del'>-</div><div class='del'>-3). PnP support for this adapter sucks. I recommend hard setting the </div><div class='del'>-    IO/MEM/IRQ by the jumpers on the adapter. If this is not possible</div><div class='del'>-    load the module with the following io=[ioaddr] mem=[mem_addr]</div><div class='del'>-    irq=[irq_num].</div><div class='del'>-</div><div class='del'>-    The following IRQ, IO, and MEM settings are supported.</div><div class='del'>-</div><div class='del'>-    IO ports:</div><div class='del'>-    0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0, 0x300,</div><div class='del'>-    0x320, 0x340, 0x360, 0x380.</div><div class='del'>-</div><div class='del'>-    IRQs:</div><div class='del'>-    2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15</div><div class='del'>-</div><div class='del'>-    Memory addresses:</div><div class='del'>-    0xA0000, 0xA4000, 0xA8000, 0xAC000, 0xB0000, 0xB4000,</div><div class='del'>-    0xB8000, 0xBC000, 0xC0000, 0xC4000, 0xC8000, 0xCC000,</div><div class='del'>-    0xD0000, 0xD4000, 0xD8000, 0xDC000, 0xE0000, 0xE4000,</div><div class='del'>-    0xE8000, 0xEC000, 0xF0000, 0xF4000, 0xF8000, 0xFC000</div><div class='del'>-</div><div class='del'>-This driver is under the GNU General Public License. Its Firmware image is</div><div class='del'>-included as an initialized C-array and is licensed by SMC to the Linux</div><div class='del'>-users of this driver. However no warranty about its fitness is expressed or</div><div class='del'>-implied by SMC.</div><div class='head'>diff --git a/Documentation/networking/stmmac.txt b/Documentation/networking/stmmac.txt<br/>index d0aeeadd264b..ab1e8d7004c5 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/stmmac.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/stmmac.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/networking/stmmac.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/networking/stmmac.txt</a></div><div class='hunk'>@@ -111,11 +111,12 @@ and detailed below as well:</div><div class='ctx'> 	int phy_addr;</div><div class='ctx'> 	int interface;</div><div class='ctx'> 	struct stmmac_mdio_bus_data *mdio_bus_data;</div><div class='del'>-	int pbl;</div><div class='add'>+	struct stmmac_dma_cfg *dma_cfg;</div><div class='ctx'> 	int clk_csr;</div><div class='ctx'> 	int has_gmac;</div><div class='ctx'> 	int enh_desc;</div><div class='ctx'> 	int tx_coe;</div><div class='add'>+	int rx_coe;</div><div class='ctx'> 	int bugged_jumbo;</div><div class='ctx'> 	int pmt;</div><div class='ctx'> 	int force_sf_dma_mode;</div><div class='hunk'>@@ -136,10 +137,12 @@ Where:</div><div class='ctx'>  o pbl: the Programmable Burst Length is maximum number of beats to</div><div class='ctx'>        be transferred in one DMA transaction.</div><div class='ctx'>        GMAC also enables the 4xPBL by default.</div><div class='del'>- o clk_csr: CSR Clock range selection.</div><div class='add'>+ o clk_csr: fixed CSR Clock range selection.</div><div class='ctx'>  o has_gmac: uses the GMAC core.</div><div class='ctx'>  o enh_desc: if sets the MAC will use the enhanced descriptor structure.</div><div class='ctx'>  o tx_coe: core is able to perform the tx csum in HW.</div><div class='add'>+ o rx_coe: the supports three check sum offloading engine types:</div><div class='add'>+	   type_1, type_2 (full csum) and no RX coe.</div><div class='ctx'>  o bugged_jumbo: some HWs are not able to perform the csum in HW for</div><div class='ctx'> 		over-sized frames due to limited buffer sizes.</div><div class='ctx'> 		Setting this flag the csum will be done in SW on</div><div class='hunk'>@@ -160,7 +163,7 @@ Where:</div><div class='ctx'>  o custom_cfg: this is a custom configuration that can be passed while</div><div class='ctx'> 	      initialising the resources.</div><div class='ctx'> </div><div class='del'>-The we have:</div><div class='add'>+For MDIO bus The we have:</div><div class='ctx'> </div><div class='ctx'>  struct stmmac_mdio_bus_data {</div><div class='ctx'> 	int bus_id;</div><div class='hunk'>@@ -177,10 +180,28 @@ Where:</div><div class='ctx'>  o irqs: list of IRQs, one per PHY.</div><div class='ctx'>  o probed_phy_irq: if irqs is NULL, use this for probed PHY.</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+For DMA engine we have the following internal fields that should be</div><div class='add'>+tuned according to the HW capabilities.</div><div class='add'>+</div><div class='add'>+struct stmmac_dma_cfg {</div><div class='add'>+	int pbl;</div><div class='add'>+	int fixed_burst;</div><div class='add'>+	int burst_len_supported;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+Where:</div><div class='add'>+ o pbl: Programmable Burst Length</div><div class='add'>+ o fixed_burst: program the DMA to use the fixed burst mode</div><div class='add'>+ o burst_len: this is the value we put in the register</div><div class='add'>+	      supported values are provided as macros in</div><div class='add'>+	      linux/stmmac.h header file.</div><div class='add'>+</div><div class='add'>+---</div><div class='add'>+</div><div class='ctx'> Below an example how the structures above are using on ST platforms.</div><div class='ctx'> </div><div class='ctx'>  static struct plat_stmmacenet_data stxYYY_ethernet_platform_data = {</div><div class='del'>-	.pbl = 32,</div><div class='ctx'> 	.has_gmac = 0,</div><div class='ctx'> 	.enh_desc = 0,</div><div class='ctx'> 	.fix_mac_speed = stxYYY_ethernet_fix_mac_speed,</div><div class='head'>diff --git a/Documentation/networking/tms380tr.txt b/Documentation/networking/tms380tr.txt<br/>deleted file mode 100644<br/>index 1f73e13058df..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/networking/tms380tr.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/networking/tms380tr.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,147 +0,0 @@</div><div class='del'>-Text file for the Linux SysKonnect Token Ring ISA/PCI Adapter Driver.</div><div class='del'>-	Text file by: Jay Schulist &lt;jschlst@samba.org&gt;</div><div class='del'>-</div><div class='del'>-The Linux SysKonnect Token Ring driver works with the SysKonnect TR4/16(+) ISA,</div><div class='del'>-SysKonnect TR4/16(+) PCI, SysKonnect TR4/16 PCI, and older revisions of the</div><div class='del'>-SK NET TR4/16 ISA card.</div><div class='del'>-</div><div class='del'>-Latest information on this driver can be obtained on the Linux-SNA WWW site.</div><div class='del'>-Please point your browser to: </div><div class='del'>-http://www.linux-sna.org</div><div class='del'>-</div><div class='del'>-Many thanks to Christoph Goos for his excellent work on this driver and</div><div class='del'>-SysKonnect for donating the adapters to Linux-SNA for the testing and </div><div class='del'>-maintenance of this device driver.</div><div class='del'>-</div><div class='del'>-Important information to be noted:</div><div class='del'>-1. Adapters can be slow to open (~20 secs) and close (~5 secs), please be </div><div class='del'>-   patient.</div><div class='del'>-2. This driver works very well when autoprobing for adapters. Why even </div><div class='del'>-   think about those nasty io/int/dma settings of modprobe when the driver </div><div class='del'>-   will do it all for you!</div><div class='del'>-</div><div class='del'>-This driver is rather simple to use. Select Y to Token Ring adapter support</div><div class='del'>-in the kernel configuration. A choice for SysKonnect Token Ring adapters will</div><div class='del'>-appear. This drives supports all SysKonnect ISA and PCI adapters. Choose this</div><div class='del'>-option. I personally recommend compiling the driver as a module (M), but if you</div><div class='del'>-you would like to compile it statically answer Y instead.</div><div class='del'>-</div><div class='del'>-This driver supports multiple adapters without the need to load multiple copies</div><div class='del'>-of the driver. You should be able to load up to 7 adapters without any kernel</div><div class='del'>-modifications, if you are in need of more please contact the maintainer of this</div><div class='del'>-driver.</div><div class='del'>-</div><div class='del'>-Load the driver either by lilo/loadlin or as a module. When a module using the</div><div class='del'>-following command will suffice for most:</div><div class='del'>-</div><div class='del'>-# modprobe sktr</div><div class='del'>-</div><div class='del'>-This will produce output similar to the following: (Output is user specific)</div><div class='del'>-</div><div class='del'>-sktr.c: v1.01 08/29/97 by Christoph Goos</div><div class='del'>-tr0: SK NET TR 4/16 PCI found at 0x6100, using IRQ 17.</div><div class='del'>-tr1: SK NET TR 4/16 PCI found at 0x6200, using IRQ 16.</div><div class='del'>-tr2: SK NET TR 4/16 ISA found at 0xa20, using IRQ 10 and DMA 5.</div><div class='del'>-</div><div class='del'>-Now just setup the device via ifconfig and set and routes you may have. After</div><div class='del'>-this you are ready to start sending some tokens.</div><div class='del'>-</div><div class='del'>-Errata:</div><div class='del'>-For anyone wondering where to pick up the SysKonnect adapters please browse</div><div class='del'>-to http://www.syskonnect.com</div><div class='del'>-</div><div class='del'>-This driver is under the GNU General Public License. Its Firmware image is </div><div class='del'>-included as an initialized C-array and is licensed by SysKonnect to the Linux </div><div class='del'>-users of this driver. However no warranty about its fitness is expressed or </div><div class='del'>-implied by SysKonnect.</div><div class='del'>-</div><div class='del'>-Below find attached the setting for the SK NET TR 4/16 ISA adapters</div><div class='del'>--------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-                    ***************************</div><div class='del'>-                    ***   C O N T E N T S   ***</div><div class='del'>-                    ***************************</div><div class='del'>-</div><div class='del'>-                1) Location of DIP-Switch W1</div><div class='del'>-                2) Default settings</div><div class='del'>-                3) DIP-Switch W1 description</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-  ==============================================================</div><div class='del'>-  CHAPTER 1     LOCATION OF DIP-SWITCH</div><div class='del'>-  ==============================================================</div><div class='del'>-</div><div class='del'>-UÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿</div><div class='del'>-þUÄÄÄÄÄÄ¿                         UÄÄÄÄÄ¿            UÄÄÄ¿         þ</div><div class='del'>-þAÄÄÄÄÄÄU                      W1 AÄÄÄÄÄU     UÄÄÄÄ¿ þ   þ         þ</div><div class='del'>-þUÄÄÄÄÄÄ¿                                     þ    þ þ   þ      UÄÄÅ¿</div><div class='del'>-þAÄÄÄÄÄÄU              UÄÄÄÄÄÄÄÄÄÄÄ¿          AÄÄÄÄU þ   þ      þ  þþ</div><div class='del'>-þUÄÄÄÄÄÄ¿              þ           þ          UÄÄÄ¿  AÄÄÄU      AÄÄÅU</div><div class='del'>-þAÄÄÄÄÄÄU              þ TMS380C26 þ          þ   þ                þ</div><div class='del'>-þUÄÄÄÄÄÄ¿              þ           þ          AÄÄÄU                AÄ¿</div><div class='del'>-þAÄÄÄÄÄÄU              þ           þ                               þ þ</div><div class='del'>-þ                      AÄÄÄÄÄÄÄÄÄÄÄU                               þ þ</div><div class='del'>-þ                                                                  þ þ</div><div class='del'>-þ                                                                  AÄU</div><div class='del'>-þ                                                                  þ</div><div class='del'>-þ                                                                  þ</div><div class='del'>-þ                                                                  þ</div><div class='del'>-þ                                                                  þ</div><div class='del'>-AÄÄÄÄÄÄÄÄÄÄÄÄAÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄAÄÄAÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄAÄÄÄÄÄÄÄÄÄU</div><div class='del'>-             AÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄU  AÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄU</div><div class='del'>-</div><div class='del'>-  ==============================================================</div><div class='del'>-  CHAPTER 2     DEFAULT SETTINGS</div><div class='del'>-  ==============================================================</div><div class='del'>-</div><div class='del'>-          W1    1  2  3  4  5  6  7  8</div><div class='del'>-        +------------------------------+</div><div class='del'>-        | ON    X                      |</div><div class='del'>-        | OFF      X  X  X  X  X  X  X |</div><div class='del'>-        +------------------------------+</div><div class='del'>-</div><div class='del'>-        W1.1 = ON               Adapter drives address lines SA17..19</div><div class='del'>-        W1.2 - 1.5 = OFF        BootROM disabled</div><div class='del'>-        W1.6 - 1.8 = OFF        I/O address 0A20h</div><div class='del'>-</div><div class='del'>-  ==============================================================</div><div class='del'>-  CHAPTER 3     DIP SWITCH W1 DESCRIPTION</div><div class='del'>-  ==============================================================</div><div class='del'>-</div><div class='del'>-      UÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄ¿  ON</div><div class='del'>-      þ 1 þ 2 þ 3 þ 4 þ 5 þ 6 þ 7 þ 8 þ</div><div class='del'>-      AÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄU  OFF</div><div class='del'>-      |AD | BootROM Addr. |  I/O      |</div><div class='del'>-      +-+-+-------+-------+-----+-----+</div><div class='del'>-        |         |             |</div><div class='del'>-        |         |             +------ 6     7     8</div><div class='del'>-        |         |                     ON    ON    ON       1900h</div><div class='del'>-        |         |                     ON    ON    OFF      0900h</div><div class='del'>-        |         |                     ON    OFF   ON       1980h</div><div class='del'>-        |         |                     ON    OFF   OFF      0980h</div><div class='del'>-        |         |                     OFF   ON    ON       1b20h</div><div class='del'>-        |         |                     OFF   ON    OFF      0b20h</div><div class='del'>-        |         |                     OFF   OFF   ON       1a20h</div><div class='del'>-        |         |                     OFF   OFF   OFF      0a20h    (+)</div><div class='del'>-        |         |</div><div class='del'>-        |         |</div><div class='del'>-        |         +-------- 2     3     4     5</div><div class='del'>-        |                   OFF   x     x     x       disabled  (+)</div><div class='del'>-        |                   ON    ON    ON    ON      C0000</div><div class='del'>-        |                   ON    ON    ON    OFF     C4000</div><div class='del'>-        |                   ON    ON    OFF   ON      C8000</div><div class='del'>-        |                   ON    ON    OFF   OFF     CC000</div><div class='del'>-        |                   ON    OFF   ON    ON      D0000</div><div class='del'>-        |                   ON    OFF   ON    OFF     D4000</div><div class='del'>-        |                   ON    OFF   OFF   ON      D8000</div><div class='del'>-        |                   ON    OFF   OFF   OFF     DC000</div><div class='del'>-        |</div><div class='del'>-        |</div><div class='del'>-        +----- 1</div><div class='del'>-               OFF    adapter does NOT drive SA&lt;17..19&gt;</div><div class='del'>-               ON     adapter drives SA&lt;17..19&gt;  (+)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-        (+) means default setting</div><div class='del'>-</div><div class='del'>-                       ********************************</div><div class='head'>diff --git a/Documentation/nfc/nfc-hci.txt b/Documentation/nfc/nfc-hci.txt<br/>new file mode 100644<br/>index 000000000000..320f9336c781<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/nfc/nfc-hci.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/nfc/nfc-hci.txt</a></div><div class='hunk'>@@ -0,0 +1,180 @@</div><div class='add'>+HCI backend for NFC Core</div><div class='add'>+</div><div class='add'>+Author: Eric Lapuyade, Samuel Ortiz</div><div class='add'>+Contact: eric.lapuyade@intel.com, samuel.ortiz@intel.com</div><div class='add'>+</div><div class='add'>+General</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+The HCI layer implements much of the ETSI TS 102 622 V10.2.0 specification. It</div><div class='add'>+enables easy writing of HCI-based NFC drivers. The HCI layer runs as an NFC Core</div><div class='add'>+backend, implementing an abstract nfc device and translating NFC Core API</div><div class='add'>+to HCI commands and events.</div><div class='add'>+</div><div class='add'>+HCI</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+HCI registers as an nfc device with NFC Core. Requests coming from userspace are</div><div class='add'>+routed through netlink sockets to NFC Core and then to HCI. From this point,</div><div class='add'>+they are translated in a sequence of HCI commands sent to the HCI layer in the</div><div class='add'>+host controller (the chip). The sending context blocks while waiting for the</div><div class='add'>+response to arrive.</div><div class='add'>+HCI events can also be received from the host controller. They will be handled</div><div class='add'>+and a translation will be forwarded to NFC Core as needed.</div><div class='add'>+HCI uses 2 execution contexts:</div><div class='add'>+- one for executing commands : nfc_hci_msg_tx_work(). Only one command</div><div class='add'>+can be executing at any given moment.</div><div class='add'>+- one for dispatching received events and commands : nfc_hci_msg_rx_work().</div><div class='add'>+</div><div class='add'>+HCI Session initialization:</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+The Session initialization is an HCI standard which must unfortunately</div><div class='add'>+support proprietary gates. This is the reason why the driver will pass a list</div><div class='add'>+of proprietary gates that must be part of the session. HCI will ensure all</div><div class='add'>+those gates have pipes connected when the hci device is set up.</div><div class='add'>+</div><div class='add'>+HCI Gates and Pipes</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+A gate defines the 'port' where some service can be found. In order to access</div><div class='add'>+a service, one must create a pipe to that gate and open it. In this</div><div class='add'>+implementation, pipes are totally hidden. The public API only knows gates.</div><div class='add'>+This is consistent with the driver need to send commands to proprietary gates</div><div class='add'>+without knowing the pipe connected to it.</div><div class='add'>+</div><div class='add'>+Driver interface</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+A driver would normally register itself with HCI and provide the following</div><div class='add'>+entry points:</div><div class='add'>+</div><div class='add'>+struct nfc_hci_ops {</div><div class='add'>+	int (*open)(struct nfc_hci_dev *hdev);</div><div class='add'>+	void (*close)(struct nfc_hci_dev *hdev);</div><div class='add'>+	int (*hci_ready) (struct nfc_hci_dev *hdev);</div><div class='add'>+	int (*xmit)(struct nfc_hci_dev *hdev, struct sk_buff *skb);</div><div class='add'>+	int (*start_poll)(struct nfc_hci_dev *hdev, u32 protocols);</div><div class='add'>+	int (*target_from_gate)(struct nfc_hci_dev *hdev, u8 gate,</div><div class='add'>+				struct nfc_target *target);</div><div class='add'>+	int (*complete_target_discovered) (struct nfc_hci_dev *hdev, u8 gate,</div><div class='add'>+					   struct nfc_target *target);</div><div class='add'>+	int (*data_exchange) (struct nfc_hci_dev *hdev,</div><div class='add'>+			      struct nfc_target *target,</div><div class='add'>+			      struct sk_buff *skb, struct sk_buff **res_skb);</div><div class='add'>+	int (*check_presence)(struct nfc_hci_dev *hdev,</div><div class='add'>+			      struct nfc_target *target);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+- open() and close() shall turn the hardware on and off.</div><div class='add'>+- hci_ready() is an optional entry point that is called right after the hci</div><div class='add'>+session has been set up. The driver can use it to do additional initialization</div><div class='add'>+that must be performed using HCI commands.</div><div class='add'>+- xmit() shall simply write a frame to the chip.</div><div class='add'>+- start_poll() is an optional entrypoint that shall set the hardware in polling</div><div class='add'>+mode. This must be implemented only if the hardware uses proprietary gates or a</div><div class='add'>+mechanism slightly different from the HCI standard.</div><div class='add'>+- target_from_gate() is an optional entrypoint to return the nfc protocols</div><div class='add'>+corresponding to a proprietary gate.</div><div class='add'>+- complete_target_discovered() is an optional entry point to let the driver</div><div class='add'>+perform additional proprietary processing necessary to auto activate the</div><div class='add'>+discovered target.</div><div class='add'>+- data_exchange() must be implemented by the driver if proprietary HCI commands</div><div class='add'>+are required to send data to the tag. Some tag types will require custom</div><div class='add'>+commands, others can be written to using the standard HCI commands. The driver</div><div class='add'>+can check the tag type and either do proprietary processing, or return 1 to ask</div><div class='add'>+for standard processing.</div><div class='add'>+- check_presence() is an optional entry point that will be called regularly</div><div class='add'>+by the core to check that an activated tag is still in the field. If this is</div><div class='add'>+not implemented, the core will not be able to push tag_lost events to the user</div><div class='add'>+space</div><div class='add'>+</div><div class='add'>+On the rx path, the driver is responsible to push incoming HCP frames to HCI</div><div class='add'>+using nfc_hci_recv_frame(). HCI will take care of re-aggregation and handling</div><div class='add'>+This must be done from a context that can sleep.</div><div class='add'>+</div><div class='add'>+SHDLC</div><div class='add'>+-----</div><div class='add'>+</div><div class='add'>+Most chips use shdlc to ensure integrity and delivery ordering of the HCP</div><div class='add'>+frames between the host controller (the chip) and hosts (entities connected</div><div class='add'>+to the chip, like the cpu). In order to simplify writing the driver, an shdlc</div><div class='add'>+layer is available for use by the driver.</div><div class='add'>+When used, the driver actually registers with shdlc, and shdlc will register</div><div class='add'>+with HCI. HCI sees shdlc as the driver and thus send its HCP frames</div><div class='add'>+through shdlc-&gt;xmit.</div><div class='add'>+SHDLC adds a new execution context (nfc_shdlc_sm_work()) to run its state</div><div class='add'>+machine and handle both its rx and tx path.</div><div class='add'>+</div><div class='add'>+Included Drivers</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+An HCI based driver for an NXP PN544, connected through I2C bus, and using</div><div class='add'>+shdlc is included.</div><div class='add'>+</div><div class='add'>+Execution Contexts</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+The execution contexts are the following:</div><div class='add'>+- IRQ handler (IRQH):</div><div class='add'>+fast, cannot sleep. stores incoming frames into an shdlc rx queue</div><div class='add'>+</div><div class='add'>+- SHDLC State Machine worker (SMW)</div><div class='add'>+handles shdlc rx &amp; tx queues. Dispatches HCI cmd responses.</div><div class='add'>+</div><div class='add'>+- HCI Tx Cmd worker (MSGTXWQ)</div><div class='add'>+Serializes execution of HCI commands. Completes execution in case of response</div><div class='add'>+timeout.</div><div class='add'>+</div><div class='add'>+- HCI Rx worker (MSGRXWQ)</div><div class='add'>+Dispatches incoming HCI commands or events.</div><div class='add'>+</div><div class='add'>+- Syscall context from a userspace call (SYSCALL)</div><div class='add'>+Any entrypoint in HCI called from NFC Core</div><div class='add'>+</div><div class='add'>+Workflow executing an HCI command (using shdlc)</div><div class='add'>+-----------------------------------------------</div><div class='add'>+</div><div class='add'>+Executing an HCI command can easily be performed synchronously using the</div><div class='add'>+following API:</div><div class='add'>+</div><div class='add'>+int nfc_hci_send_cmd (struct nfc_hci_dev *hdev, u8 gate, u8 cmd,</div><div class='add'>+			const u8 *param, size_t param_len, struct sk_buff **skb)</div><div class='add'>+</div><div class='add'>+The API must be invoked from a context that can sleep. Most of the time, this</div><div class='add'>+will be the syscall context. skb will return the result that was received in</div><div class='add'>+the response.</div><div class='add'>+</div><div class='add'>+Internally, execution is asynchronous. So all this API does is to enqueue the</div><div class='add'>+HCI command, setup a local wait queue on stack, and wait_event() for completion.</div><div class='add'>+The wait is not interruptible because it is guaranteed that the command will</div><div class='add'>+complete after some short timeout anyway.</div><div class='add'>+</div><div class='add'>+MSGTXWQ context will then be scheduled and invoke nfc_hci_msg_tx_work().</div><div class='add'>+This function will dequeue the next pending command and send its HCP fragments</div><div class='add'>+to the lower layer which happens to be shdlc. It will then start a timer to be</div><div class='add'>+able to complete the command with a timeout error if no response arrive.</div><div class='add'>+</div><div class='add'>+SMW context gets scheduled and invokes nfc_shdlc_sm_work(). This function</div><div class='add'>+handles shdlc framing in and out. It uses the driver xmit to send frames and</div><div class='add'>+receives incoming frames in an skb queue filled from the driver IRQ handler.</div><div class='add'>+SHDLC I(nformation) frames payload are HCP fragments. They are aggregated to</div><div class='add'>+form complete HCI frames, which can be a response, command, or event.</div><div class='add'>+</div><div class='add'>+HCI Responses are dispatched immediately from this context to unblock</div><div class='add'>+waiting command execution. Response processing involves invoking the completion</div><div class='add'>+callback that was provided by nfc_hci_msg_tx_work() when it sent the command.</div><div class='add'>+The completion callback will then wake the syscall context.</div><div class='add'>+</div><div class='add'>+Workflow receiving an HCI event or command</div><div class='add'>+------------------------------------------</div><div class='add'>+</div><div class='add'>+HCI commands or events are not dispatched from SMW context. Instead, they are</div><div class='add'>+queued to HCI rx_queue and will be dispatched from HCI rx worker</div><div class='add'>+context (MSGRXWQ). This is done this way to allow a cmd or event handler</div><div class='add'>+to also execute other commands (for example, handling the</div><div class='add'>+NFC_HCI_EVT_TARGET_DISCOVERED event from PN544 requires to issue an</div><div class='add'>+ANY_GET_PARAMETER to the reader A gate to get information on the target</div><div class='add'>+that was discovered).</div><div class='add'>+</div><div class='add'>+Typically, such an event will be propagated to NFC Core from MSGRXWQ context.</div><div class='head'>diff --git a/Documentation/parisc/debugging b/Documentation/parisc/debugging<br/>index d728594058e5..7d75223fa18d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/parisc/debugging?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/parisc/debugging</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/parisc/debugging?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/parisc/debugging</a></div><div class='hunk'>@@ -34,6 +34,6 @@ registers interruption handlers read to find out where the machine</div><div class='ctx'> was interrupted - so if you get an interruption between the instruction</div><div class='ctx'> that clears the Q bit and the RFI that sets it again you don't know</div><div class='ctx'> where exactly it happened.  If you're lucky the IAOQ will point to the</div><div class='del'>-instrucion that cleared the Q bit, if you're not it points anywhere</div><div class='add'>+instruction that cleared the Q bit, if you're not it points anywhere</div><div class='ctx'> at all.  Usually Q bit problems will show themselves in unexplainable</div><div class='ctx'> system hangs or running off the end of physical memory.</div><div class='head'>diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt<br/>index d97bccf46147..e40f4b4e1977 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/pinctrl.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/pinctrl.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/pinctrl.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/pinctrl.txt</a></div><div class='hunk'>@@ -152,11 +152,9 @@ static const struct foo_group foo_groups[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int foo_list_groups(struct pinctrl_dev *pctldev, unsigned selector)</div><div class='add'>+static int foo_get_groups_count(struct pinctrl_dev *pctldev)</div><div class='ctx'> {</div><div class='del'>-	if (selector &gt;= ARRAY_SIZE(foo_groups))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+	return ARRAY_SIZE(foo_groups);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *foo_get_group_name(struct pinctrl_dev *pctldev,</div><div class='hunk'>@@ -175,7 +173,7 @@ static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pinctrl_ops foo_pctrl_ops = {</div><div class='del'>-	.list_groups = foo_list_groups,</div><div class='add'>+	.get_groups_count = foo_get_groups_count,</div><div class='ctx'> 	.get_group_name = foo_get_group_name,</div><div class='ctx'> 	.get_group_pins = foo_get_group_pins,</div><div class='ctx'> };</div><div class='hunk'>@@ -186,13 +184,12 @@ static struct pinctrl_desc foo_desc = {</div><div class='ctx'>        .pctlops = &amp;foo_pctrl_ops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-The pin control subsystem will call the .list_groups() function repeatedly</div><div class='del'>-beginning on 0 until it returns non-zero to determine legal selectors, then</div><div class='del'>-it will call the other functions to retrieve the name and pins of the group.</div><div class='del'>-Maintaining the data structure of the groups is up to the driver, this is</div><div class='del'>-just a simple example - in practice you may need more entries in your group</div><div class='del'>-structure, for example specific register ranges associated with each group</div><div class='del'>-and so on.</div><div class='add'>+The pin control subsystem will call the .get_groups_count() function to</div><div class='add'>+determine total number of legal selectors, then it will call the other functions</div><div class='add'>+to retrieve the name and pins of the group. Maintaining the data structure of</div><div class='add'>+the groups is up to the driver, this is just a simple example - in practice you</div><div class='add'>+may need more entries in your group structure, for example specific register</div><div class='add'>+ranges associated with each group and so on.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Pin configuration</div><div class='hunk'>@@ -606,11 +603,9 @@ static const struct foo_group foo_groups[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int foo_list_groups(struct pinctrl_dev *pctldev, unsigned selector)</div><div class='add'>+static int foo_get_groups_count(struct pinctrl_dev *pctldev)</div><div class='ctx'> {</div><div class='del'>-	if (selector &gt;= ARRAY_SIZE(foo_groups))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+	return ARRAY_SIZE(foo_groups);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *foo_get_group_name(struct pinctrl_dev *pctldev,</div><div class='hunk'>@@ -629,7 +624,7 @@ static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pinctrl_ops foo_pctrl_ops = {</div><div class='del'>-	.list_groups = foo_list_groups,</div><div class='add'>+	.get_groups_count = foo_get_groups_count,</div><div class='ctx'> 	.get_group_name = foo_get_group_name,</div><div class='ctx'> 	.get_group_pins = foo_get_group_pins,</div><div class='ctx'> };</div><div class='hunk'>@@ -640,7 +635,7 @@ struct foo_pmx_func {</div><div class='ctx'> 	const unsigned num_groups;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char * const spi0_groups[] = { "spi0_1_grp" };</div><div class='add'>+static const char * const spi0_groups[] = { "spi0_0_grp", "spi0_1_grp" };</div><div class='ctx'> static const char * const i2c0_groups[] = { "i2c0_grp" };</div><div class='ctx'> static const char * const mmc0_groups[] = { "mmc0_1_grp", "mmc0_2_grp",</div><div class='ctx'> 					"mmc0_3_grp" };</div><div class='hunk'>@@ -663,11 +658,9 @@ static const struct foo_pmx_func foo_functions[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int foo_list_funcs(struct pinctrl_dev *pctldev, unsigned selector)</div><div class='add'>+int foo_get_functions_count(struct pinctrl_dev *pctldev)</div><div class='ctx'> {</div><div class='del'>-	if (selector &gt;= ARRAY_SIZE(foo_functions))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+	return ARRAY_SIZE(foo_functions);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector)</div><div class='hunk'>@@ -703,7 +696,7 @@ void foo_disable(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct pinmux_ops foo_pmxops = {</div><div class='del'>-	.list_functions = foo_list_funcs,</div><div class='add'>+	.get_functions_count = foo_get_functions_count,</div><div class='ctx'> 	.get_function_name = foo_get_fname,</div><div class='ctx'> 	.get_function_groups = foo_get_groups,</div><div class='ctx'> 	.enable = foo_enable,</div><div class='hunk'>@@ -786,7 +779,7 @@ and spi on the second function mapping:</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> </div><div class='del'>-static const struct pinctrl_map __initdata mapping[] = {</div><div class='add'>+static const struct pinctrl_map mapping[] __initconst = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.dev_name = "foo-spi.0",</div><div class='ctx'> 		.name = PINCTRL_STATE_DEFAULT,</div><div class='hunk'>@@ -952,13 +945,13 @@ case), we define a mapping like this:</div><div class='ctx'> The result of grabbing this mapping from the device with something like</div><div class='ctx'> this (see next paragraph):</div><div class='ctx'> </div><div class='del'>-	p = pinctrl_get(dev);</div><div class='add'>+	p = devm_pinctrl_get(dev);</div><div class='ctx'> 	s = pinctrl_lookup_state(p, "8bit");</div><div class='ctx'> 	ret = pinctrl_select_state(p, s);</div><div class='ctx'> </div><div class='ctx'> or more simply:</div><div class='ctx'> </div><div class='del'>-	p = pinctrl_get_select(dev, "8bit");</div><div class='add'>+	p = devm_pinctrl_get_select(dev, "8bit");</div><div class='ctx'> </div><div class='ctx'> Will be that you activate all the three bottom records in the mapping at</div><div class='ctx'> once. Since they share the same name, pin controller device, function and</div><div class='hunk'>@@ -992,7 +985,7 @@ foo_probe()</div><div class='ctx'> 	/* Allocate a state holder named "foo" etc */</div><div class='ctx'> 	struct foo_state *foo = ...;</div><div class='ctx'> </div><div class='del'>-	foo-&gt;p = pinctrl_get(&amp;device);</div><div class='add'>+	foo-&gt;p = devm_pinctrl_get(&amp;device);</div><div class='ctx'> 	if (IS_ERR(foo-&gt;p)) {</div><div class='ctx'> 		/* FIXME: clean up "foo" here */</div><div class='ctx'> 		return PTR_ERR(foo-&gt;p);</div><div class='hunk'>@@ -1000,24 +993,17 @@ foo_probe()</div><div class='ctx'> </div><div class='ctx'> 	foo-&gt;s = pinctrl_lookup_state(foo-&gt;p, PINCTRL_STATE_DEFAULT);</div><div class='ctx'> 	if (IS_ERR(foo-&gt;s)) {</div><div class='del'>-		pinctrl_put(foo-&gt;p);</div><div class='ctx'> 		/* FIXME: clean up "foo" here */</div><div class='ctx'> 		return PTR_ERR(s);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = pinctrl_select_state(foo-&gt;s);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		pinctrl_put(foo-&gt;p);</div><div class='ctx'> 		/* FIXME: clean up "foo" here */</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-foo_remove()</div><div class='del'>-{</div><div class='del'>-	pinctrl_put(state-&gt;p);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> This get/lookup/select/put sequence can just as well be handled by bus drivers</div><div class='ctx'> if you don't want each and every driver to handle it and you know the</div><div class='ctx'> arrangement on your bus.</div><div class='hunk'>@@ -1029,6 +1015,11 @@ The semantics of the pinctrl APIs are:</div><div class='ctx'>   kernel memory to hold the pinmux state. All mapping table parsing or similar</div><div class='ctx'>   slow operations take place within this API.</div><div class='ctx'> </div><div class='add'>+- devm_pinctrl_get() is a variant of pinctrl_get() that causes pinctrl_put()</div><div class='add'>+  to be called automatically on the retrieved pointer when the associated</div><div class='add'>+  device is removed. It is recommended to use this function over plain</div><div class='add'>+  pinctrl_get().</div><div class='add'>+</div><div class='ctx'> - pinctrl_lookup_state() is called in process context to obtain a handle to a</div><div class='ctx'>   specific state for a the client device. This operation may be slow too.</div><div class='ctx'> </div><div class='hunk'>@@ -1041,14 +1032,30 @@ The semantics of the pinctrl APIs are:</div><div class='ctx'> </div><div class='ctx'> - pinctrl_put() frees all information associated with a pinctrl handle.</div><div class='ctx'> </div><div class='add'>+- devm_pinctrl_put() is a variant of pinctrl_put() that may be used to</div><div class='add'>+  explicitly destroy a pinctrl object returned by devm_pinctrl_get().</div><div class='add'>+  However, use of this function will be rare, due to the automatic cleanup</div><div class='add'>+  that will occur even without calling it.</div><div class='add'>+</div><div class='add'>+  pinctrl_get() must be paired with a plain pinctrl_put().</div><div class='add'>+  pinctrl_get() may not be paired with devm_pinctrl_put().</div><div class='add'>+  devm_pinctrl_get() can optionally be paired with devm_pinctrl_put().</div><div class='add'>+  devm_pinctrl_get() may not be paired with plain pinctrl_put().</div><div class='add'>+</div><div class='ctx'> Usually the pin control core handled the get/put pair and call out to the</div><div class='ctx'> device drivers bookkeeping operations, like checking available functions and</div><div class='ctx'> the associated pins, whereas the enable/disable pass on to the pin controller</div><div class='ctx'> driver which takes care of activating and/or deactivating the mux setting by</div><div class='ctx'> quickly poking some registers.</div><div class='ctx'> </div><div class='del'>-The pins are allocated for your device when you issue the pinctrl_get() call,</div><div class='del'>-after this you should be able to see this in the debugfs listing of all pins.</div><div class='add'>+The pins are allocated for your device when you issue the devm_pinctrl_get()</div><div class='add'>+call, after this you should be able to see this in the debugfs listing of all</div><div class='add'>+pins.</div><div class='add'>+</div><div class='add'>+NOTE: the pinctrl system will return -EPROBE_DEFER if it cannot find the</div><div class='add'>+requested pinctrl handles, for example if the pinctrl driver has not yet</div><div class='add'>+registered. Thus make sure that the error path in your driver gracefully</div><div class='add'>+cleans up and is ready to retry the probing later in the startup process.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> System pin control hogging</div><div class='hunk'>@@ -1094,13 +1101,13 @@ it, disables and releases it, and muxes it in on the pins defined by group B:</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> </div><div class='del'>-foo_switch()</div><div class='del'>-{</div><div class='del'>-	struct pinctrl *p;</div><div class='del'>-	struct pinctrl_state *s1, *s2;</div><div class='add'>+struct pinctrl *p;</div><div class='add'>+struct pinctrl_state *s1, *s2;</div><div class='ctx'> </div><div class='add'>+foo_probe()</div><div class='add'>+{</div><div class='ctx'> 	/* Setup */</div><div class='del'>-	p = pinctrl_get(&amp;device);</div><div class='add'>+	p = devm_pinctrl_get(&amp;device);</div><div class='ctx'> 	if (IS_ERR(p))</div><div class='ctx'> 		...</div><div class='ctx'> </div><div class='hunk'>@@ -1111,7 +1118,10 @@ foo_switch()</div><div class='ctx'> 	s2 = pinctrl_lookup_state(foo-&gt;p, "pos-B");</div><div class='ctx'> 	if (IS_ERR(s2))</div><div class='ctx'> 		...</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+foo_switch()</div><div class='add'>+{</div><div class='ctx'> 	/* Enable on position A */</div><div class='ctx'> 	ret = pinctrl_select_state(s1);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -1125,8 +1135,6 @@ foo_switch()</div><div class='ctx'> 	    ...</div><div class='ctx'> </div><div class='ctx'> 	...</div><div class='del'>-</div><div class='del'>-	pinctrl_put(p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> The above has to be done from process context.</div><div class='head'>diff --git a/Documentation/power/charger-manager.txt b/Documentation/power/charger-manager.txt<br/>index fdcca991df30..b4f7f4b23f64 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/power/charger-manager.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/power/charger-manager.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/power/charger-manager.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/power/charger-manager.txt</a></div><div class='hunk'>@@ -44,6 +44,16 @@ Charger Manager supports the following:</div><div class='ctx'> 	Normally, the platform will need to resume and suspend some devices</div><div class='ctx'> 	that are used by Charger Manager.</div><div class='ctx'> </div><div class='add'>+* Support for premature full-battery event handling</div><div class='add'>+	If the battery voltage drops by "fullbatt_vchkdrop_uV" after</div><div class='add'>+	"fullbatt_vchkdrop_ms" from the full-battery event, the framework</div><div class='add'>+	restarts charging. This check is also performed while suspended by</div><div class='add'>+	setting wakeup time accordingly and using suspend_again.</div><div class='add'>+</div><div class='add'>+* Support for uevent-notify</div><div class='add'>+	With the charger-related events, the device sends</div><div class='add'>+	notification to users with UEVENT.</div><div class='add'>+</div><div class='ctx'> 2. Global Charger-Manager Data related with suspend_again</div><div class='ctx'> ========================================================</div><div class='ctx'> In order to setup Charger Manager with suspend-again feature</div><div class='hunk'>@@ -55,7 +65,7 @@ if there are multiple batteries. If there are multiple batteries, the</div><div class='ctx'> multiple instances of Charger Manager share the same charger_global_desc</div><div class='ctx'> and it will manage in-suspend monitoring for all instances of Charger Manager.</div><div class='ctx'> </div><div class='del'>-The user needs to provide all the two entries properly in order to activate</div><div class='add'>+The user needs to provide all the three entries properly in order to activate</div><div class='ctx'> in-suspend monitoring:</div><div class='ctx'> </div><div class='ctx'> struct charger_global_desc {</div><div class='hunk'>@@ -74,6 +84,11 @@ bool (*rtc_only_wakeup)(void);</div><div class='ctx'> 	same struct. If there is any other wakeup source triggered the</div><div class='ctx'> 	wakeup, it should return false. If the "rtc" is the only wakeup</div><div class='ctx'> 	reason, it should return true.</div><div class='add'>+</div><div class='add'>+bool assume_timer_stops_in_suspend;</div><div class='add'>+	: if true, Charger Manager assumes that</div><div class='add'>+	the timer (CM uses jiffies as timer) stops during suspend. Then, CM</div><div class='add'>+	assumes that the suspend-duration is same as the alarm length.</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> 3. How to setup suspend_again</div><div class='hunk'>@@ -111,6 +126,16 @@ enum polling_modes polling_mode;</div><div class='ctx'> 	  CM_POLL_CHARGING_ONLY: poll this battery if and only if the</div><div class='ctx'> 				 battery is being charged.</div><div class='ctx'> </div><div class='add'>+unsigned int fullbatt_vchkdrop_ms;</div><div class='add'>+unsigned int fullbatt_vchkdrop_uV;</div><div class='add'>+	: If both have non-zero values, Charger Manager will check the</div><div class='add'>+	battery voltage drop fullbatt_vchkdrop_ms after the battery is fully</div><div class='add'>+	charged. If the voltage drop is over fullbatt_vchkdrop_uV, Charger</div><div class='add'>+	Manager will try to recharge the battery by disabling and enabling</div><div class='add'>+	chargers. Recharge with voltage drop condition only (without delay</div><div class='add'>+	condition) is needed to be implemented with hardware interrupts from</div><div class='add'>+	fuel gauges or charger devices/chips.</div><div class='add'>+</div><div class='ctx'> unsigned int fullbatt_uV;</div><div class='ctx'> 	: If specified with a non-zero value, Charger Manager assumes</div><div class='ctx'> 	that the battery is full (capacity = 100) if the battery is not being</div><div class='hunk'>@@ -122,6 +147,8 @@ unsigned int polling_interval_ms;</div><div class='ctx'> 	this battery every polling_interval_ms or more frequently.</div><div class='ctx'> </div><div class='ctx'> enum data_source battery_present;</div><div class='add'>+	: CM_BATTERY_PRESENT: assume that the battery exists.</div><div class='add'>+	CM_NO_BATTERY: assume that the battery does not exists.</div><div class='ctx'> 	CM_FUEL_GAUGE: get battery presence information from fuel gauge.</div><div class='ctx'> 	CM_CHARGER_STAT: get battery presence from chargers.</div><div class='ctx'> </div><div class='hunk'>@@ -151,7 +178,17 @@ bool measure_battery_temp;</div><div class='ctx'> 	the value of measure_battery_temp.</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-5. Other Considerations</div><div class='add'>+5. Notify Charger-Manager of charger events: cm_notify_event()</div><div class='add'>+=========================================================</div><div class='add'>+If there is an charger event is required to notify</div><div class='add'>+Charger Manager, a charger device driver that triggers the event can call</div><div class='add'>+cm_notify_event(psy, type, msg) to notify the corresponding Charger Manager.</div><div class='add'>+In the function, psy is the charger driver's power_supply pointer, which is</div><div class='add'>+associated with Charger-Manager. The parameter "type"</div><div class='add'>+is the same as irq's type (enum cm_event_types). The event message "msg" is</div><div class='add'>+optional and is effective only if the event type is "UNDESCRIBED" or "OTHERS".</div><div class='add'>+</div><div class='add'>+6. Other Considerations</div><div class='ctx'> =======================</div><div class='ctx'> </div><div class='ctx'> At the charger/battery-related events such as battery-pulled-out,</div><div class='head'>diff --git a/Documentation/power/power_supply_class.txt b/Documentation/power/power_supply_class.txt<br/>index 9f16c5178b66..211831d4095f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/power/power_supply_class.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/power/power_supply_class.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/power/power_supply_class.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/power/power_supply_class.txt</a></div><div class='hunk'>@@ -84,6 +84,8 @@ are already charged or discharging, 'n/a' can be displayed (or</div><div class='ctx'> HEALTH - represents health of the battery, values corresponds to</div><div class='ctx'> POWER_SUPPLY_HEALTH_*, defined in battery.h.</div><div class='ctx'> </div><div class='add'>+VOLTAGE_OCV - open circuit voltage of the battery.</div><div class='add'>+</div><div class='ctx'> VOLTAGE_MAX_DESIGN, VOLTAGE_MIN_DESIGN - design values for maximal and</div><div class='ctx'> minimal power supply voltages. Maximal/minimal means values of voltages</div><div class='ctx'> when battery considered "full"/"empty" at normal conditions. Yes, there is</div><div class='head'>diff --git a/Documentation/power/regulator/regulator.txt b/Documentation/power/regulator/regulator.txt<br/>index e272d9909e39..13902778ae44 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/power/regulator/regulator.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/power/regulator/regulator.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/power/regulator/regulator.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/power/regulator/regulator.txt</a></div><div class='hunk'>@@ -11,8 +11,7 @@ Registration</div><div class='ctx'> Drivers can register a regulator by calling :-</div><div class='ctx'> </div><div class='ctx'> struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc,</div><div class='del'>-	struct device *dev, struct regulator_init_data *init_data,</div><div class='del'>-	void *driver_data, struct device_node *of_node);</div><div class='add'>+					 const struct regulator_config *config);</div><div class='ctx'> </div><div class='ctx'> This will register the regulators capabilities and operations to the regulator</div><div class='ctx'> core.</div><div class='head'>diff --git a/Documentation/power/suspend-and-cpuhotplug.txt b/Documentation/power/suspend-and-cpuhotplug.txt<br/>index f28f9a6f0347..e13dafc8e8f1 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/power/suspend-and-cpuhotplug.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/power/suspend-and-cpuhotplug.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/power/suspend-and-cpuhotplug.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/power/suspend-and-cpuhotplug.txt</a></div><div class='hunk'>@@ -29,7 +29,7 @@ More details follow:</div><div class='ctx'> </div><div class='ctx'>                                   Write 'mem' to</div><div class='ctx'>                                 /sys/power/state</div><div class='del'>-                                    syfs file</div><div class='add'>+                                    sysfs file</div><div class='ctx'>                                         |</div><div class='ctx'>                                         v</div><div class='ctx'>                                Acquire pm_mutex lock</div><div class='head'>diff --git a/Documentation/ramoops.txt b/Documentation/ramoops.txt<br/>index 8fb1ba7fe7bf..4ba7db231cb2 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/ramoops.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/ramoops.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/ramoops.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/ramoops.txt</a></div><div class='hunk'>@@ -3,7 +3,7 @@ Ramoops oops/panic logger</div><div class='ctx'> </div><div class='ctx'> Sergiu Iordache &lt;sergiu@chromium.org&gt;</div><div class='ctx'> </div><div class='del'>-Updated: 8 August 2011</div><div class='add'>+Updated: 17 November 2011</div><div class='ctx'> </div><div class='ctx'> 0. Introduction</div><div class='ctx'> </div><div class='hunk'>@@ -30,6 +30,11 @@ variable while setting 0 in that variable dumps only the panics.</div><div class='ctx'> The module uses a counter to record multiple dumps but the counter gets reset</div><div class='ctx'> on restart (i.e. new dumps after the restart will overwrite old ones).</div><div class='ctx'> </div><div class='add'>+Ramoops also supports software ECC protection of persistent memory regions.</div><div class='add'>+This might be useful when a hardware reset was used to bring the machine back</div><div class='add'>+to life (i.e. a watchdog triggered). In such cases, RAM may be somewhat</div><div class='add'>+corrupt, but usually it is restorable.</div><div class='add'>+</div><div class='ctx'> 2. Setting the parameters</div><div class='ctx'> </div><div class='ctx'> Setting the ramoops parameters can be done in 2 different manners:</div><div class='hunk'>@@ -38,7 +43,7 @@ Setting the ramoops parameters can be done in 2 different manners:</div><div class='ctx'>  2. Use a platform device and set the platform data. The parameters can then</div><div class='ctx'>  be set through that platform data. An example of doing that is:</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/ramoops.h&gt;</div><div class='add'>+#include &lt;linux/pstore_ram.h&gt;</div><div class='ctx'> [...]</div><div class='ctx'> </div><div class='ctx'> static struct ramoops_platform_data ramoops_data = {</div><div class='hunk'>@@ -46,6 +51,7 @@ static struct ramoops_platform_data ramoops_data = {</div><div class='ctx'>         .mem_address            = &lt;...&gt;,</div><div class='ctx'>         .record_size            = &lt;...&gt;,</div><div class='ctx'>         .dump_oops              = &lt;...&gt;,</div><div class='add'>+        .ecc                    = &lt;...&gt;,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device ramoops_dev = {</div><div class='hunk'>@@ -71,6 +77,6 @@ timestamp and a new line. The dump then continues with the actual data.</div><div class='ctx'> </div><div class='ctx'> 4. Reading the data</div><div class='ctx'> </div><div class='del'>-The dump data can be read from memory (through /dev/mem or other means).</div><div class='del'>-Getting the module parameters, which are needed in order to parse the data, can</div><div class='del'>-be done through /sys/module/ramoops/parameters/* .</div><div class='add'>+The dump data can be read from the pstore filesystem. The format for these</div><div class='add'>+files is "dmesg-ramoops-N", where N is the record number in memory. To delete</div><div class='add'>+a stored record from RAM, simply unlink the respective pstore file.</div><div class='head'>diff --git a/Documentation/scheduler/sched-design-CFS.txt b/Documentation/scheduler/sched-design-CFS.txt<br/>index 91ecff07cede..d529e02d928d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/scheduler/sched-design-CFS.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/scheduler/sched-design-CFS.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/scheduler/sched-design-CFS.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scheduler/sched-design-CFS.txt</a></div><div class='hunk'>@@ -130,7 +130,7 @@ CFS implements three scheduling policies:</div><div class='ctx'>     idle timer scheduler in order to avoid to get into priority</div><div class='ctx'>     inversion problems which would deadlock the machine.</div><div class='ctx'> </div><div class='del'>-SCHED_FIFO/_RR are implemented in sched_rt.c and are as specified by</div><div class='add'>+SCHED_FIFO/_RR are implemented in sched/rt.c and are as specified by</div><div class='ctx'> POSIX.</div><div class='ctx'> </div><div class='ctx'> The command chrt from util-linux-ng 2.13.1.1 can set all of these except</div><div class='hunk'>@@ -145,9 +145,9 @@ Classes," an extensible hierarchy of scheduler modules.  These modules</div><div class='ctx'> encapsulate scheduling policy details and are handled by the scheduler core</div><div class='ctx'> without the core code assuming too much about them.</div><div class='ctx'> </div><div class='del'>-sched_fair.c implements the CFS scheduler described above.</div><div class='add'>+sched/fair.c implements the CFS scheduler described above.</div><div class='ctx'> </div><div class='del'>-sched_rt.c implements SCHED_FIFO and SCHED_RR semantics, in a simpler way than</div><div class='add'>+sched/rt.c implements SCHED_FIFO and SCHED_RR semantics, in a simpler way than</div><div class='ctx'> the previous vanilla scheduler did.  It uses 100 runqueues (for all 100 RT</div><div class='ctx'> priority levels, instead of 140 in the previous scheduler) and it needs no</div><div class='ctx'> expired array.</div><div class='head'>diff --git a/Documentation/scheduler/sched-domains.txt b/Documentation/scheduler/sched-domains.txt<br/>index b7ee379b651b..443f0c76bab4 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/scheduler/sched-domains.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/scheduler/sched-domains.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/scheduler/sched-domains.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scheduler/sched-domains.txt</a></div><div class='hunk'>@@ -61,10 +61,6 @@ The implementor should read comments in include/linux/sched.h:</div><div class='ctx'> struct sched_domain fields, SD_FLAG_*, SD_*_INIT to get an idea of</div><div class='ctx'> the specifics and what to tune.</div><div class='ctx'> </div><div class='del'>-For SMT, the architecture must define CONFIG_SCHED_SMT and provide a</div><div class='del'>-cpumask_t cpu_sibling_map[NR_CPUS], where cpu_sibling_map[i] is the mask of</div><div class='del'>-all "i"'s siblings as well as "i" itself.</div><div class='del'>-</div><div class='ctx'> Architectures may retain the regular override the default SD_*_INIT flags</div><div class='ctx'> while using the generic domain builder in kernel/sched.c if they wish to</div><div class='ctx'> retain the traditional SMT-&gt;SMP-&gt;NUMA topology (or some subset of that). This</div><div class='head'>diff --git a/Documentation/scsi/00-INDEX b/Documentation/scsi/00-INDEX<br/>index b7dd6502bec5..9b0787f965e9 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/scsi/00-INDEX?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/scsi/00-INDEX</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/scsi/00-INDEX?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scsi/00-INDEX</a></div><div class='hunk'>@@ -56,8 +56,6 @@ g_NCR5380.txt</div><div class='ctx'> 	- info on driver for NCR5380 and NCR53c400 based adapters</div><div class='ctx'> hptiop.txt</div><div class='ctx'> 	- HIGHPOINT ROCKETRAID 3xxx RAID DRIVER</div><div class='del'>-ibmmca.txt</div><div class='del'>-	- info on driver for IBM adapters with MCA bus</div><div class='ctx'> in2000.txt</div><div class='ctx'> 	- info on in2000 driver</div><div class='ctx'> libsas.txt</div><div class='head'>diff --git a/Documentation/scsi/ChangeLog.megaraid_sas b/Documentation/scsi/ChangeLog.megaraid_sas<br/>index 83f8ea8b79eb..80441ab608e4 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/scsi/ChangeLog.megaraid_sas?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/scsi/ChangeLog.megaraid_sas</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/scsi/ChangeLog.megaraid_sas?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scsi/ChangeLog.megaraid_sas</a></div><div class='hunk'>@@ -1,3 +1,11 @@</div><div class='add'>+Release Date    : Mon. Mar 19, 2012 17:00:00 PST 2012 -</div><div class='add'>+			(emaild-id:megaraidlinux@lsi.com)</div><div class='add'>+			Adam Radford</div><div class='add'>+Current Version : 00.00.06.15-rc1</div><div class='add'>+Old Version     : 00.00.06.14-rc1</div><div class='add'>+    1. Optimize HostMSIxVectors setting.</div><div class='add'>+    2. Add fpRead/WriteCapable, fpRead/WriteAcrossStripe checks.</div><div class='add'>+-------------------------------------------------------------------------------</div><div class='ctx'> Release Date    : Fri. Jan 6, 2012 17:00:00 PST 2010 -</div><div class='ctx'> 			(emaild-id:megaraidlinux@lsi.com)</div><div class='ctx'> 			Adam Radford</div><div class='head'>diff --git a/Documentation/scsi/ibmmca.txt b/Documentation/scsi/ibmmca.txt<br/>deleted file mode 100644<br/>index ac41a9fcac77..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/scsi/ibmmca.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/scsi/ibmmca.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1402 +0,0 @@</div><div class='del'>-</div><div class='del'>-               -=&lt; The IBM Microchannel SCSI-Subsystem &gt;=-</div><div class='del'>-	       </div><div class='del'>-	                 for the IBM PS/2 series</div><div class='del'>-		 </div><div class='del'>-	  	   Low Level Software-Driver for Linux</div><div class='del'>-		 </div><div class='del'>-     Copyright (c) 1995 Strom Systems, Inc. under the terms of the GNU </div><div class='del'>-  General Public License. Originally written by Martin Kolinek, December 1995.</div><div class='del'>-   Officially modified and maintained by Michael Lang since January 1999.</div><div class='del'>-	   </div><div class='del'>- 	                       Version 4.0a</div><div class='del'>-	</div><div class='del'>-   Last update: January 3, 2001</div><div class='del'>-   </div><div class='del'>-   Before you Start</div><div class='del'>-   ----------------</div><div class='del'>-   This is the common README.ibmmca file for all driver releases of the </div><div class='del'>-   IBM MCA SCSI driver for Linux. Please note, that driver releases 4.0</div><div class='del'>-   or newer do not work with kernel versions older than 2.4.0, while driver</div><div class='del'>-   versions older than 4.0 do not work with kernels 2.4.0 or later! If you</div><div class='del'>-   try to compile your kernel with the wrong driver source, the </div><div class='del'>-   compilation is aborted and you get a corresponding error message. This is</div><div class='del'>-   no bug in the driver; it prevents you from using the wrong source code</div><div class='del'>-   with the wrong kernel version.</div><div class='del'>-</div><div class='del'>-   Authors of this Driver</div><div class='del'>-   ----------------------</div><div class='del'>-    - Chris Beauregard (improvement of the SCSI-device mapping by the driver)</div><div class='del'>-    - Martin Kolinek (origin, first release of this driver)</div><div class='del'>-    - Klaus Kudielka (multiple SCSI-host management/detection, adaption to</div><div class='del'>-                      Linux Kernel 2.1.x, module support)</div><div class='del'>-    - Michael Lang (assigning original pun/lun mapping, dynamical ldn</div><div class='del'>-                    assignment, rewritten adapter detection, this file, </div><div class='del'>-		    patches, official driver maintenance and subsequent </div><div class='del'>-		    debugging, related with the driver)</div><div class='del'>-</div><div class='del'>-   Table of Contents</div><div class='del'>-   -----------------</div><div class='del'>-   1 Abstract</div><div class='del'>-   2 Driver Description</div><div class='del'>-     2.1  IBM SCSI-Subsystem Detection</div><div class='del'>-     2.2  Physical Units, Logical Units, and Logical Devices</div><div class='del'>-     2.3  SCSI-Device Recognition and dynamical ldn Assignment</div><div class='del'>-     2.4  SCSI-Device Order</div><div class='del'>-     2.5  Regular SCSI-Command-Processing</div><div class='del'>-     2.6  Abort &amp; Reset Commands</div><div class='del'>-     2.7  Disk Geometry</div><div class='del'>-     2.8  Kernel Boot Option</div><div class='del'>-     2.9  Driver Module Support</div><div class='del'>-     2.10 Multiple Hostadapter Support</div><div class='del'>-     2.11 /proc/scsi-Filesystem Information</div><div class='del'>-     2.12 /proc/mca-Filesystem Information</div><div class='del'>-     2.13 Supported IBM SCSI-Subsystems</div><div class='del'>-     2.14 Linux Kernel Versions</div><div class='del'>-   3 Code History</div><div class='del'>-   4 To do</div><div class='del'>-   5 Users' Manual</div><div class='del'>-     5.1 Commandline Parameters</div><div class='del'>-     5.2 Troubleshooting</div><div class='del'>-     5.3 Bug reports</div><div class='del'>-     5.4 Support WWW-page</div><div class='del'>-   6 References</div><div class='del'>-   7 Credits to</div><div class='del'>-     7.1 People</div><div class='del'>-     7.2 Sponsors &amp; Supporters</div><div class='del'>-   8 Trademarks</div><div class='del'>-   9 Disclaimer</div><div class='del'>-</div><div class='del'>-                              * * *</div><div class='del'>-</div><div class='del'>-   1 Abstract</div><div class='del'>-   ----------</div><div class='del'>-   This README-file describes the IBM SCSI-subsystem low level driver for</div><div class='del'>-   Linux. The descriptions which were formerly kept in the source code have</div><div class='del'>-   been taken out of this file to simplify the codes readability. The driver</div><div class='del'>-   description has been updated, as most of the former description was already</div><div class='del'>-   quite outdated. The history of the driver development is also kept inside</div><div class='del'>-   here. Multiple historical developments have been summarized to shorten the</div><div class='del'>-   text size a bit. At the end of this file you can find a small manual for</div><div class='del'>-   this driver and hints to get it running on your machine.</div><div class='del'>-</div><div class='del'>-   2 Driver Description</div><div class='del'>-   --------------------</div><div class='del'>-   2.1 IBM SCSI-Subsystem Detection</div><div class='del'>-   --------------------------------</div><div class='del'>-   This is done in the ibmmca_detect() function. It first checks, if the</div><div class='del'>-   Microchannel-bus support is enabled, as the IBM SCSI-subsystem needs the</div><div class='del'>-   Microchannel. In a next step, a free interrupt is chosen and the main</div><div class='del'>-   interrupt handler is connected to it to handle answers of the SCSI-</div><div class='del'>-   subsystem(s). If the F/W SCSI-adapter is forced by the BIOS to use IRQ11</div><div class='del'>-   instead of IRQ14, IRQ11 is used for the IBM SCSI-2 F/W adapter. In a </div><div class='del'>-   further step it is checked, if the adapter gets detected by force from</div><div class='del'>-   the kernel commandline, where the I/O port and the SCSI-subsystem id can </div><div class='del'>-   be specified. The next step checks if there is an integrated SCSI-subsystem</div><div class='del'>-   installed. This register area is fixed through all IBM PS/2 MCA-machines </div><div class='del'>-   and appears as something like a virtual slot 10 of the MCA-bus. On most</div><div class='del'>-   PS/2 machines, the POS registers of slot 10 are set to 0xff or 0x00 if not</div><div class='del'>-   integrated SCSI-controller is available. But on certain PS/2s, like model </div><div class='del'>-   9595, this slot 10 is used to store other information which at earlier</div><div class='del'>-   stage confused the driver and resulted in the detection of some ghost-SCSI. </div><div class='del'>-   If POS-register 2 and 3 are not 0x00 and not 0xff, but all other POS</div><div class='del'>-   registers are either 0xff or 0x00, there must be an integrated SCSI-</div><div class='del'>-   subsystem present and it will be registered as IBM Integrated SCSI-</div><div class='del'>-   Subsystem. The next step checks, if there is a slot-adapter installed on </div><div class='del'>-   the MCA-bus. To get this, the first two POS-registers, that represent the </div><div class='del'>-   adapter ID are checked. If they fit to one of the ids, stored in the </div><div class='del'>-   adapter list, a SCSI-subsystem is assumed to be found in a slot and will be </div><div class='del'>-   registered. This check is done through all possible MCA-bus slots to allow </div><div class='del'>-   more than one SCSI-adapter to be present in the PS/2-system and this is </div><div class='del'>-   already the first point of problems. Looking into the technical reference </div><div class='del'>-   manual for the IBM PS/2 common interfaces, the POS2 register must have </div><div class='del'>-   different interpretation of its single bits to avoid overlapping I/O</div><div class='del'>-   regions. While one can assume, that the integrated subsystem has a fix </div><div class='del'>-   I/O-address at 0x3540 - 0x3547, further installed IBM SCSI-adapters must </div><div class='del'>-   use a different I/O-address. This is expressed by bit 1 to 3 of POS2 </div><div class='del'>-   (multiplied by 8 + 0x3540). Bits 2 and 3 are reserved for the integrated </div><div class='del'>-   subsystem, but not for the adapters! The following list shows, how the </div><div class='del'>-   bits of POS2 and POS3 should be interpreted.</div><div class='del'>-   </div><div class='del'>-   The POS2-register of all PS/2 models' integrated SCSI-subsystems has the </div><div class='del'>-   following interpretation of bits:</div><div class='del'>-                           Bit 7 - 4 : Chip Revision ID (Release)</div><div class='del'>-                           Bit 3 - 2 : Reserved</div><div class='del'>-                           Bit 1     : 8k NVRAM Disabled</div><div class='del'>-                           Bit 0     : Chip Enable (EN-Signal)</div><div class='del'>-   The POS3-register is interpreted as follows (for most IBM SCSI-subsys.):</div><div class='del'>-                           Bit 7 - 5 : SCSI ID</div><div class='del'>-                           Bit 4 - 0 : Reserved = 0</div><div class='del'>-   The slot-adapters have different interpretation of these bits. The IBM SCSI</div><div class='del'>-   adapter (w/Cache) and the IBM SCSI-2 F/W adapter use the following</div><div class='del'>-   interpretation of the POS2 register:</div><div class='del'>-                           Bit 7 - 4 : ROM Segment Address Select</div><div class='del'>-			   Bit 3 - 1 : Adapter I/O Address Select (*8+0x3540)</div><div class='del'>-			   Bit 0     : Adapter Enable (EN-Signal)</div><div class='del'>-   and for the POS3 register:</div><div class='del'>-                           Bit 7 - 5 : SCSI ID </div><div class='del'>-			   Bit 4     : Fairness Enable (SCSI ID3 f. F/W)</div><div class='del'>-			   Bit 3 - 0 : Arbitration Level</div><div class='del'>-   The most modern product of the series is the IBM SCSI-2 F/W adapter, it </div><div class='del'>-   allows dual-bus SCSI and SCSI-wide addressing, which means, PUNs may be</div><div class='del'>-   between 0 and 15. Here, Bit 4 is the high-order bit of the 4-bit wide</div><div class='del'>-   adapter PUN expression. In short words, this means, that IBM PS/2 machines </div><div class='del'>-   can only support 1 single integrated subsystem by default. Additional</div><div class='del'>-   slot-adapters get ports assigned by the automatic configuration tool.</div><div class='del'>-</div><div class='del'>-   One day I found a patch in ibmmca_detect(), forcing the I/O-address to be </div><div class='del'>-   0x3540 for integrated SCSI-subsystems, there was a remark placed, that on </div><div class='del'>-   integrated IBM SCSI-subsystems of model 56, the POS2 register was showing 5.</div><div class='del'>-   This means, that really for these models, POS2 has to be interpreted</div><div class='del'>-   sticking to the technical reference guide. In this case, the bit 2 (4) is </div><div class='del'>-   a reserved bit and may not be interpreted. These differences between the </div><div class='del'>-   adapters and the integrated controllers are taken into account by the </div><div class='del'>-   detection routine of the driver on from version &gt;3.0g. </div><div class='del'>-</div><div class='del'>-   Every time, a SCSI-subsystem is discovered, the ibmmca_register() function</div><div class='del'>-   is called. This function checks first, if the requested area for the I/O-</div><div class='del'>-   address of this SCSI-subsystem is still available and assigns this I/O-</div><div class='del'>-   area to the SCSI-subsystem. There are always 8 sequential I/O-addresses</div><div class='del'>-   taken for each individual SCSI-subsystem found, which are:</div><div class='del'>-   </div><div class='del'>-     Offset            Type                  Permissions</div><div class='del'>-       0     Command Interface Register 1    Read/Write</div><div class='del'>-       1     Command Interface Register 2    Read/Write</div><div class='del'>-       2     Command Interface Register 3    Read/Write</div><div class='del'>-       3     Command Interface Register 4    Read/Write</div><div class='del'>-       4     Attention Register              Read/Write</div><div class='del'>-       5     Basic Control Register          Read/Write</div><div class='del'>-       6     Interrupt Status Register       Read</div><div class='del'>-       7     Basic Status Register           Read</div><div class='del'>-   </div><div class='del'>-   After the I/O-address range is assigned, the host-adapter is assigned</div><div class='del'>-   to a local structure which keeps all adapter information needed for the</div><div class='del'>-   driver itself and the mid- and higher-level SCSI-drivers. The SCSI pun/lun</div><div class='del'>-   and the adapters' ldn tables are initialized and get probed afterwards by</div><div class='del'>-   the check_devices() function. If no further adapters are found, </div><div class='del'>-   ibmmca_detect() quits.</div><div class='del'>-   </div><div class='del'>-   2.2 Physical Units, Logical Units, and Logical Devices</div><div class='del'>-   ------------------------------------------------------</div><div class='del'>-   There can be up to 56 devices on the SCSI bus (besides the adapter):</div><div class='del'>-   there are up to 7 "physical units" (each identified by physical unit </div><div class='del'>-   number or pun, also called the scsi id, this is the number you select</div><div class='del'>-   with hardware jumpers), and each physical unit can have up to 8 </div><div class='del'>-   "logical units" (each identified by logical unit number, or lun, </div><div class='del'>-   between 0 and 7). The IBM SCSI-2 F/W adapter offers this on up to two</div><div class='del'>-   busses and provides support for 30 logical devices at the same time, where</div><div class='del'>-   in wide-addressing mode you can have 16 puns with 32 luns on each device.</div><div class='del'>-   This section describes the handling of devices on non-F/W adapters.</div><div class='del'>-   Just imagine, that you can have 16 * 32 = 512 devices on a F/W adapter</div><div class='del'>-   which means a lot of possible devices for such a small machine.</div><div class='del'>-</div><div class='del'>-   Typically the adapter has pun=7, so puns of other physical units</div><div class='del'>-   are between 0 and 6(15). On a wide-adapter a pun higher than 7 is</div><div class='del'>-   possible, but is normally not used. Almost all physical units have only </div><div class='del'>-   one logical unit, with lun=0. A CD-ROM jukebox would be an example of a </div><div class='del'>-   physical unit with more than one logical unit.</div><div class='del'>-</div><div class='del'>-   The embedded microprocessor of the IBM SCSI-subsystem hides the complex</div><div class='del'>-   two-dimensional (pun,lun) organization from the operating system.</div><div class='del'>-   When the machine is powered-up (or rebooted), the embedded microprocessor </div><div class='del'>-   checks, on its own, all 56 possible (pun,lun) combinations, and the first </div><div class='del'>-   15 devices found are assigned into a one-dimensional array of so-called </div><div class='del'>-   "logical devices", identified by "logical device numbers" or ldn. The last </div><div class='del'>-   ldn=15 is reserved for the subsystem itself. Wide adapters may have </div><div class='del'>-   to check up to 15 * 8 = 120 pun/lun combinations.</div><div class='del'>-   </div><div class='del'>-   2.3 SCSI-Device Recognition and Dynamical ldn Assignment</div><div class='del'>-   --------------------------------------------------------</div><div class='del'>-   One consequence of information hiding is that the real (pun,lun)    </div><div class='del'>-   numbers are also hidden. The two possibilities to get around this problem</div><div class='del'>-   are to offer fake pun/lun combinations to the operating system or to </div><div class='del'>-   delete the whole mapping of the adapter and to reassign the ldns, using</div><div class='del'>-   the immediate assign command of the SCSI-subsystem for probing through</div><div class='del'>-   all possible pun/lun combinations.  An ldn is a "logical device number"</div><div class='del'>-   which is used by IBM SCSI-subsystems to access some valid SCSI-device.</div><div class='del'>-   At the beginning of the development of this driver, the following approach </div><div class='del'>-   was used:</div><div class='del'>-   </div><div class='del'>-   First, the driver checked the ldn's (0 to 6) to find out which ldn's</div><div class='del'>-   have devices assigned. This was done by the functions check_devices() and</div><div class='del'>-   device_exists(). The interrupt handler has a special paragraph of code</div><div class='del'>-   (see local_checking_phase_flag) to assist in the checking. Assume, for</div><div class='del'>-   example, that three logical devices were found assigned at ldn 0, 1, 2.</div><div class='del'>-   These are presented to the upper layer of Linux SCSI driver</div><div class='del'>-   as devices with bogus (pun, lun) equal to (0,0), (1,0), (2,0). </div><div class='del'>-   On the other hand, if the upper layer issues a command to device</div><div class='del'>-   say (4,0), this driver returns DID_NO_CONNECT error.</div><div class='del'>-</div><div class='del'>-   In a second step of the driver development, the following improvement has</div><div class='del'>-   been applied: The first approach limited the number of devices to 7, far</div><div class='del'>-   fewer than the 15 that it could use, then it just mapped ldn -&gt; </div><div class='del'>-   (ldn/8,ldn%8) for pun,lun.  We ended up with a real mishmash of puns</div><div class='del'>-   and luns, but it all seemed to work.</div><div class='del'>-</div><div class='del'>-   The latest development, which is implemented from the driver version 3.0</div><div class='del'>-   and later, realizes the device recognition in the following way:</div><div class='del'>-   The physical SCSI-devices on the SCSI-bus are probed via immediate_assign- </div><div class='del'>-   and device_inquiry-commands, that is all implemented in a completely new</div><div class='del'>-   made check_devices() subroutine. This delivers an exact map of the physical</div><div class='del'>-   SCSI-world that is now stored in the get_scsi[][]-array. This means,</div><div class='del'>-   that the once hidden pun,lun assignment is now known to this driver.</div><div class='del'>-   It no longer believes in default-settings of the subsystem and maps all</div><div class='del'>-   ldns to existing pun,lun "by foot". This assures full control of the ldn</div><div class='del'>-   mapping and allows dynamical remapping of ldns to different pun,lun, if</div><div class='del'>-   there are more SCSI-devices installed than ldns available (n&gt;15). The</div><div class='del'>-   ldns from 0 to 6 get 'hardwired' by this driver to puns 0 to 7 at lun=0,</div><div class='del'>-   excluding the pun of the subsystem. This assures, that at least simple </div><div class='del'>-   SCSI-installations have optimum access-speed and are not touched by</div><div class='del'>-   dynamical remapping. The ldns 7 to 14 are put to existing devices with </div><div class='del'>-   lun&gt;0 or to non-existing devices, in order to satisfy the subsystem, if </div><div class='del'>-   there are less than 15 SCSI-devices connected. In the case of more than 15 </div><div class='del'>-   devices, the dynamical mapping goes active. If the get_scsi[][] reports a </div><div class='del'>-   device to be existent, but it has no ldn assigned, it gets an ldn out of 7</div><div class='del'>-   to 14. The numbers are assigned in cyclic order, therefore it takes 8 </div><div class='del'>-   dynamical reassignments on the SCSI-devices until a certain device </div><div class='del'>-   loses its ldn again. This assures that dynamical remapping is avoided </div><div class='del'>-   during intense I/O between up to 15 SCSI-devices (means pun,lun </div><div class='del'>-   combinations). A further advantage of this method is that people who</div><div class='del'>-   build their kernel without probing on all luns will get what they expect,</div><div class='del'>-   because the driver just won't assign everything with lun&gt;0 when </div><div class='del'>-   multiple lun probing is inactive.</div><div class='del'>- </div><div class='del'>-   2.4 SCSI-Device Order</div><div class='del'>-   ---------------------</div><div class='del'>-   Because of the now correct recognition of physical pun,lun, and </div><div class='del'>-   their report to mid-level- and higher-level-drivers, the new reported puns</div><div class='del'>-   can be different from the old, faked puns. Therefore, Linux will eventually</div><div class='del'>-   change /dev/sdXXX assignments and prompt you for corrupted superblock</div><div class='del'>-   repair on boottime. In this case DO NOT PANIC, YOUR DISKS ARE STILL OK!!!</div><div class='del'>-   You have to reboot (CTRL-D) with an old kernel and set the /etc/fstab-file</div><div class='del'>-   entries right. After that, the system should come up as errorfree as before.</div><div class='del'>-   If your boot-partition is not coming up, also edit the /etc/lilo.conf-file</div><div class='del'>-   in a Linux session booted on old kernel and run lilo before reboot. Check</div><div class='del'>-   lilo.conf anyway to get boot on other partitions with foreign OSes right</div><div class='del'>-   again. But there exists a feature of this driver that allows you to change</div><div class='del'>-   the assignment order of the SCSI-devices by flipping the PUN-assignment.</div><div class='del'>-   See the next paragraph for a description.</div><div class='del'>- </div><div class='del'>-   The problem for this is, that Linux does not assign the SCSI-devices in the</div><div class='del'>-   way as described in the ANSI-SCSI-standard. Linux assigns /dev/sda to </div><div class='del'>-   the device with at minimum id 0. But the first drive should be at id 6,</div><div class='del'>-   because for historical reasons, drive at id 6 has, by hardware, the highest</div><div class='del'>-   priority and a drive at id 0 the lowest. IBM was one of the rare producers,</div><div class='del'>-   where the BIOS assigns drives belonging to the ANSI-SCSI-standard. Most </div><div class='del'>-   other producers' BIOS does not (I think even Adaptec-BIOS). The </div><div class='del'>-   IBMMCA_SCSI_ORDER_STANDARD flag, which you set while configuring the</div><div class='del'>-   kernel enables to choose the preferred way of SCSI-device-assignment. </div><div class='del'>-   Defining this flag would result in Linux determining the devices in the </div><div class='del'>-   same order as DOS and OS/2 does on your MCA-machine. This is also standard </div><div class='del'>-   on most industrial computers and OSes, like e.g. OS-9. Leaving this flag </div><div class='del'>-   undefined will get your devices ordered in the default way of Linux. See </div><div class='del'>-   also the remarks of Chris Beauregard from Dec 15, 1997 and the followups </div><div class='del'>-   in section 3.</div><div class='del'>-   </div><div class='del'>-   2.5 Regular SCSI-Command-Processing</div><div class='del'>-   -----------------------------------</div><div class='del'>-   Only three functions get involved: ibmmca_queuecommand(), issue_cmd(),</div><div class='del'>-   and interrupt_handler().</div><div class='del'>-</div><div class='del'>-   The upper layer issues a scsi command by calling function </div><div class='del'>-   ibmmca_queuecommand(). This function fills a "subsystem control block"</div><div class='del'>-   (scb) and calls a local function issue_cmd(), which writes a scb </div><div class='del'>-   command into subsystem I/O ports. Once the scb command is carried out, </div><div class='del'>-   the interrupt_handler() is invoked. If a device is determined to be </div><div class='del'>-   existent and it has not assigned any ldn, it gets one dynamically.</div><div class='del'>-   For this, the whole stuff is done in ibmmca_queuecommand().</div><div class='del'>-</div><div class='del'>-   2.6 Abort &amp; Reset Commands</div><div class='del'>-   --------------------------</div><div class='del'>-   These are implemented with busy waiting for interrupt to arrive.</div><div class='del'>-   ibmmca_reset() and ibmmca_abort() do not work sufficiently well</div><div class='del'>-   up to now and need still a lot of development work. This seems</div><div class='del'>-   to be a problem with other low-level SCSI drivers too, however</div><div class='del'>-   this should be no excuse.</div><div class='del'>-</div><div class='del'>-   2.7 Disk Geometry</div><div class='del'>-   -----------------</div><div class='del'>-   The ibmmca_biosparams() function should return the same disk geometry </div><div class='del'>-   as the bios. This is needed for fdisk, etc. The returned geometry is </div><div class='del'>-   certainly correct for disks smaller than 1 gigabyte. In the meantime,</div><div class='del'>-   it has been proved, that this works fine even with disks larger than</div><div class='del'>-   1 gigabyte.</div><div class='del'>-</div><div class='del'>-   2.8 Kernel Boot Option</div><div class='del'>-   ----------------------</div><div class='del'>-   The function ibmmca_scsi_setup() is called if option ibmmcascsi=n </div><div class='del'>-   is passed to the kernel. See file linux/init/main.c for details.</div><div class='del'>-   </div><div class='del'>-   2.9 Driver Module Support</div><div class='del'>-   -------------------------</div><div class='del'>-   Is implemented and tested by K. Kudielka. This could probably not work</div><div class='del'>-   on kernels &lt;2.1.0.</div><div class='del'>-  </div><div class='del'>-   2.10 Multiple Hostadapter Support</div><div class='del'>-   ---------------------------------</div><div class='del'>-   This driver supports up to eight interfaces of type IBM-SCSI-Subsystem. </div><div class='del'>-   Integrated-, and MCA-adapters are automatically recognized. Unrecognizable</div><div class='del'>-   IBM-SCSI-Subsystem interfaces can be specified as kernel-parameters.</div><div class='del'>- </div><div class='del'>-   2.11 /proc/scsi-Filesystem Information</div><div class='del'>-   --------------------------------------</div><div class='del'>-   Information about the driver condition is given in </div><div class='del'>-   /proc/scsi/ibmmca/&lt;host_no&gt;. ibmmca_proc_info() provides this information.</div><div class='del'>-   </div><div class='del'>-   This table is quite informative for interested users. It shows the load</div><div class='del'>-   of commands on the subsystem and whether you are running the bypassed</div><div class='del'>-   (software) or integrated (hardware) SCSI-command set (see below). The</div><div class='del'>-   amount of accesses is shown. Read, write, modeselect is shown separately</div><div class='del'>-   in order to help debugging problems with CD-ROMs or tapedrives.</div><div class='del'>-   </div><div class='del'>-   The following table shows the list of 15 logical device numbers, that are</div><div class='del'>-   used by the SCSI-subsystem. The load on each ldn is shown in the table,</div><div class='del'>-   again, read and write commands are split. The last column shows the amount</div><div class='del'>-   of reassignments, that have been applied to the ldns, if you have more than</div><div class='del'>-   15 pun/lun combinations available on the SCSI-bus.</div><div class='del'>-   </div><div class='del'>-   The last two tables show the pun/lun map and the positions of the ldns</div><div class='del'>-   on this pun/lun map. This may change during operation, when a ldn is</div><div class='del'>-   reassigned to another pun/lun combination. If the necessity for dynamical</div><div class='del'>-   assignments is set to 'no', the ldn structure keeps static.</div><div class='del'>-   </div><div class='del'>-   2.12 /proc/mca-Filesystem Information</div><div class='del'>-   -------------------------------------</div><div class='del'>-   The slot-file contains all default entries and in addition chip and I/O-</div><div class='del'>-   address information of the SCSI-subsystem. This information is provided</div><div class='del'>-   by ibmmca_getinfo().</div><div class='del'>-   </div><div class='del'>-   2.13 Supported IBM SCSI-Subsystems</div><div class='del'>-   ----------------------------------</div><div class='del'>-   The following IBM SCSI-subsystems are supported by this driver:</div><div class='del'>-   </div><div class='del'>-     - IBM Fast/Wide SCSI-2 Adapter</div><div class='del'>-     - IBM 7568 Industrial Computer SCSI Adapter w/Cache</div><div class='del'>-     - IBM Expansion Unit SCSI Controller</div><div class='del'>-     - IBM SCSI Adapter w/Cache</div><div class='del'>-     - IBM SCSI Adapter</div><div class='del'>-     - IBM Integrated SCSI Controller</div><div class='del'>-     - All clones, 100% compatible with the chipset and subsystem command</div><div class='del'>-       system of IBM SCSI-adapters (forced detection)</div><div class='del'>-     </div><div class='del'>-   2.14 Linux Kernel Versions</div><div class='del'>-   --------------------------</div><div class='del'>-   The IBM SCSI-subsystem low level driver is prepared to be used with</div><div class='del'>-   all versions of Linux between 2.0.x and 2.4.x. The compatibility checks</div><div class='del'>-   are fully implemented up from version 3.1e of the driver. This means, that</div><div class='del'>-   you just need the latest ibmmca.h and ibmmca.c file and copy it in the</div><div class='del'>-   linux/drivers/scsi directory. The code is automatically adapted during </div><div class='del'>-   kernel compilation. This is different from kernel 2.4.0! Here version </div><div class='del'>-   4.0 or later of the driver must be used for kernel 2.4.0 or later. Version</div><div class='del'>-   4.0 or later does not work together with older kernels! Driver versions</div><div class='del'>-   older than 4.0 do not work together with kernel 2.4.0 or later. They work</div><div class='del'>-   on all older kernels.</div><div class='del'>-</div><div class='del'>-   3 Code History</div><div class='del'>-   --------------</div><div class='del'>-   Jan 15 1996:  First public release.</div><div class='del'>-   - Martin Kolinek</div><div class='del'>-</div><div class='del'>-   Jan 23 1996:  Scrapped code which reassigned scsi devices to logical</div><div class='del'>-   device numbers. Instead, the existing assignment (created</div><div class='del'>-   when the machine is powered-up or rebooted) is used. </div><div class='del'>-   A side effect is that the upper layer of Linux SCSI </div><div class='del'>-   device driver gets bogus scsi ids (this is benign), </div><div class='del'>-   and also the hard disks are ordered under Linux the </div><div class='del'>-   same way as they are under dos (i.e., C: disk is sda, </div><div class='del'>-   D: disk is sdb, etc.).</div><div class='del'>-   - Martin Kolinek</div><div class='del'>-</div><div class='del'>-   I think that the CD-ROM is now detected only if a CD is </div><div class='del'>-   inside CD_ROM while Linux boots. This can be fixed later,</div><div class='del'>-   once the driver works on all types of PS/2's.</div><div class='del'>-   - Martin Kolinek</div><div class='del'>-</div><div class='del'>-   Feb 7 1996:   Modified biosparam function. Fixed the CD-ROM detection. </div><div class='del'>-   For now, devices other than harddisk and CD_ROM are </div><div class='del'>-   ignored. Temporarily modified abort() function </div><div class='del'>-   to behave like reset().</div><div class='del'>-   - Martin Kolinek</div><div class='del'>-</div><div class='del'>-   Mar 31 1996:  The integrated scsi subsystem is correctly found</div><div class='del'>-   in PS/2 models 56,57, but not in model 76. Therefore</div><div class='del'>-   the ibmmca_scsi_setup() function has been added today.</div><div class='del'>-   This function allows the user to force detection of</div><div class='del'>-   scsi subsystem. The kernel option has format</div><div class='del'>-   ibmmcascsi=n</div><div class='del'>-   where n is the scsi_id (pun) of the subsystem. Most likely, n is 7.</div><div class='del'>-   - Martin Kolinek</div><div class='del'>-</div><div class='del'>-   Aug 21 1996:  Modified the code which maps ldns to (pun,0).  It was</div><div class='del'>-   insufficient for those of us with CD-ROM changers.</div><div class='del'>-   - Chris Beauregard</div><div class='del'>- </div><div class='del'>-   Dec 14 1996: More improvements to the ldn mapping.  See check_devices</div><div class='del'>-   for details.  Did more fiddling with the integrated SCSI detection,</div><div class='del'>-   but I think it's ultimately hopeless without actually testing the</div><div class='del'>-   model of the machine.  The 56, 57, 76 and 95 (ultimedia) all have</div><div class='del'>-   different integrated SCSI register configurations.  However, the 56</div><div class='del'>-   and 57 are the only ones that have problems with forced detection.</div><div class='del'>-   - Chris Beauregard</div><div class='del'>- </div><div class='del'>-   Mar 8-16 1997: Modified driver to run as a module and to support </div><div class='del'>-   multiple adapters. A structure, called ibmmca_hostdata, is now</div><div class='del'>-   present, containing all the variables, that were once only</div><div class='del'>-   available for one single adapter. The find_subsystem-routine has vanished.</div><div class='del'>-   The hardware recognition is now done in ibmmca_detect directly.</div><div class='del'>-   This routine checks for presence of MCA-bus, checks the interrupt</div><div class='del'>-   level and continues with checking the installed hardware.</div><div class='del'>-   Certain PS/2-models do not recognize a SCSI-subsystem automatically.</div><div class='del'>-   Hence, the setup defined by command-line-parameters is checked first.</div><div class='del'>-   Thereafter, the routine probes for an integrated SCSI-subsystem.</div><div class='del'>-   Finally, adapters are checked. This method has the advantage to cover all</div><div class='del'>-   possible combinations of multiple SCSI-subsystems on one MCA-board. Up to</div><div class='del'>-   eight SCSI-subsystems can be recognized and announced to the upper-level</div><div class='del'>-   drivers with this improvement. A set of defines made changes to other</div><div class='del'>-   routines as small as possible.</div><div class='del'>-   - Klaus Kudielka</div><div class='del'>-   </div><div class='del'>-   May 30 1997: (v1.5b)</div><div class='del'>-   1) SCSI-command capability enlarged by the recognition of MODE_SELECT.</div><div class='del'>-      This needs the RD-Bit to be disabled on IM_OTHER_SCSI_CMD_CMD which </div><div class='del'>-      allows data to be written from the system to the device. It is a</div><div class='del'>-      necessary step to be allowed to set blocksize of SCSI-tape-drives and </div><div class='del'>-      the tape-speed, without confusing the SCSI-Subsystem.</div><div class='del'>-   2) The recognition of a tape is included in the check_devices routine.</div><div class='del'>-      This is done by checking for TYPE_TAPE, that is already defined in</div><div class='del'>-      the kernel-scsi-environment. The markup of a tape is done in the </div><div class='del'>-      global ldn_is_tape[] array. If the entry on index ldn </div><div class='del'>-      is 1, there is a tapedrive connected.</div><div class='del'>-   3) The ldn_is_tape[] array is necessary to distinguish between tape- and </div><div class='del'>-      other devices. Fixed blocklength devices should not cause a problem</div><div class='del'>-      with the SCB-command for read and write in the ibmmca_queuecommand</div><div class='del'>-      subroutine. Therefore, I only derivate the READ_XX, WRITE_XX for</div><div class='del'>-      the tape-devices, as recommended by IBM in this Technical Reference,</div><div class='del'>-      mentioned below. (IBM recommends to avoid using the read/write of the</div><div class='del'>-      subsystem, but the fact was, that read/write causes a command error from</div><div class='del'>-      the subsystem and this causes kernel-panic.)</div><div class='del'>-   4) In addition, I propose to use the ldn instead of a fix char for the</div><div class='del'>-      display of PS2_DISK_LED_ON(). On 95, one can distinguish between the</div><div class='del'>-      devices that are accessed. It shows activity and easyfies debugging.   </div><div class='del'>-   The tape-support has been tested with a SONY SDT-5200 and a HP DDS-2</div><div class='del'>-   (I do not know yet the type). Optimization and CD-ROM audio-support, </div><div class='del'>-   I am working on ...</div><div class='del'>-   - Michael Lang</div><div class='del'>-   </div><div class='del'>-   June 19 1997: (v1.6b)</div><div class='del'>-   1) Submitting the extra-array ldn_is_tape[] -&gt; to the local ld[]</div><div class='del'>-      device-array. </div><div class='del'>-   2) CD-ROM Audio-Play seems to work now.</div><div class='del'>-   3) When using DDS-2 (120M) DAT-Tapes, mtst shows still density-code</div><div class='del'>-      0x13 for ordinary DDS (61000 BPM) instead 0x24 for DDS-2. This appears </div><div class='del'>-      also on Adaptec 2940 adaptor in a PCI-System. Therefore, I assume that </div><div class='del'>-      the problem is independent of the low-level-driver/bus-architecture.</div><div class='del'>-   4) Hexadecimal ldn on PS/2-95 LED-display.</div><div class='del'>-   5) Fixing of the PS/2-LED on/off that it works right with tapedrives and</div><div class='del'>-      does not confuse the disk_rw_in_progress counter.</div><div class='del'>-   - Michael Lang</div><div class='del'>-  </div><div class='del'>-   June 21 1997: (v1.7b)</div><div class='del'>-   1) Adding of a proc_info routine to inform in /proc/scsi/ibmmca/&lt;host&gt; the</div><div class='del'>-      outer-world about operational load statistics on the different ldns,</div><div class='del'>-      seen by the driver. Everybody that has more than one IBM-SCSI should</div><div class='del'>-      test this, because I only have one and cannot see what happens with more</div><div class='del'>-      than one IBM-SCSI hosts.</div><div class='del'>-   2) Definition of a driver version-number to have a better recognition of </div><div class='del'>-      the source when there are existing too much releases that may confuse</div><div class='del'>-      the user, when reading about release-specific problems. Up to know,</div><div class='del'>-      I calculated the version-number to be 1.7. Because we are in BETA-test</div><div class='del'>-      yet, it is today 1.7b.</div><div class='del'>-   3) Sorry for the heavy bug I programmed on June 19 1997! After that, the</div><div class='del'>-      CD-ROM did not work any more! The C7-command was a fake impression</div><div class='del'>-      I got while programming. Now, the READ and WRITE commands for CD-ROM are</div><div class='del'>-      no longer running over the subsystem, but just over </div><div class='del'>-      IM_OTHER_SCSI_CMD_CMD. On my observations (PS/2-95), now CD-ROM mounts</div><div class='del'>-      much faster(!) and hopefully all fancy multimedia-functions, like direct</div><div class='del'>-      digital recording from audio-CDs also work. (I tried it with cdda2wav</div><div class='del'>-      from the cdwtools-package and it filled up the harddisk immediately :-).)</div><div class='del'>-      To easify boolean logics, a further local device-type in ld[], called</div><div class='del'>-      is_cdrom has been included.</div><div class='del'>-   4) If one uses a SCSI-device of unsupported type/commands, one</div><div class='del'>-      immediately runs into a kernel-panic caused by Command Error. To better</div><div class='del'>-      understand which SCSI-command caused the problem, I extended this</div><div class='del'>-      specific panic-message slightly.</div><div class='del'>-   - Michael Lang</div><div class='del'>- </div><div class='del'>-   June 25 1997: (v1.8b)</div><div class='del'>-   1) Some cosmetic changes for the handling of SCSI-device-types.</div><div class='del'>-      Now, also CD-Burners / WORMs and SCSI-scanners should work. For</div><div class='del'>-      MO-drives I have no experience, therefore not yet supported.</div><div class='del'>-      In logical_devices I changed from different type-variables to one</div><div class='del'>-      called 'device_type' where the values, corresponding to scsi.h,</div><div class='del'>-      of a SCSI-device are stored.</div><div class='del'>-   2) There existed a small bug, that maps a device, coming after a SCSI-tape</div><div class='del'>-      wrong. Therefore, e.g. a CD-ROM changer would have been mapped wrong</div><div class='del'>-      -&gt; problem removed.</div><div class='del'>-   3) Extension of the logical_device structure. Now it contains also device,</div><div class='del'>-      vendor and revision-level of a SCSI-device for internal usage.</div><div class='del'>-   - Michael Lang</div><div class='del'>-</div><div class='del'>-   June 26-29 1997: (v2.0b)</div><div class='del'>-   1) The release number 2.0b is necessary because of the completely new done</div><div class='del'>-      recognition and handling of SCSI-devices with the adapter. As I got</div><div class='del'>-      from Chris the hint, that the subsystem can reassign ldns dynamically,</div><div class='del'>-      I remembered this immediate_assign-command, I found once in the handbook.</div><div class='del'>-      Now, the driver first kills all ldn assignments that are set by default</div><div class='del'>-      on the SCSI-subsystem. After that, it probes on all puns and luns for</div><div class='del'>-      devices by going through all combinations with immediate_assign and</div><div class='del'>-      probing for devices, using device_inquiry. The found physical(!) pun,lun</div><div class='del'>-      structure is stored in get_scsi[][] as device types. This is followed</div><div class='del'>-      by the assignment of all ldns to existing SCSI-devices. If more ldns</div><div class='del'>-      than devices are available, they are assigned to non existing pun,lun</div><div class='del'>-      combinations to satisfy the adapter. With this, the dynamical mapping</div><div class='del'>-      was possible to implement. (For further info see the text in the </div><div class='del'>-      source code and in the description below. Read the description</div><div class='del'>-      below BEFORE installing this driver on your system!)</div><div class='del'>-   2) Changed the name IBMMCA_DRIVER_VERSION to IBMMCA_SCSI_DRIVER_VERSION.</div><div class='del'>-   3) The LED-display shows on PS/2-95 no longer the ldn, but the SCSI-ID</div><div class='del'>-      (pun) of the accessed SCSI-device. This is now senseful, because the </div><div class='del'>-      pun known within the driver is exactly the pun of the physical device</div><div class='del'>-      and no longer a fake one.</div><div class='del'>-   4) The /proc/scsi/ibmmca/&lt;host_no&gt; consists now of the first part, where</div><div class='del'>-      hit-statistics of ldns is shown and a second part, where the maps of </div><div class='del'>-      physical and logical SCSI-devices are displayed. This could be very </div><div class='del'>-      interesting, when one is using more than 15 SCSI-devices in order to </div><div class='del'>-      follow the dynamical remapping of ldns.</div><div class='del'>-   - Michael Lang</div><div class='del'>- </div><div class='del'>-   June 26-29 1997: (v2.0b-1)</div><div class='del'>-   1) I forgot to switch the local_checking_phase_flag to 1 and back to 0</div><div class='del'>-      in the dynamical remapping part in ibmmca_queuecommand for the </div><div class='del'>-      device_exist routine. Sorry.</div><div class='del'>-   - Michael Lang</div><div class='del'>- </div><div class='del'>-   July 1-13 1997: (v3.0b,c)</div><div class='del'>-   1) Merging of the driver-developments of Klaus Kudielka and Michael Lang </div><div class='del'>-      in order to get a optimum and unified driver-release for the </div><div class='del'>-      IBM-SCSI-Subsystem-Adapter(s).</div><div class='del'>-         For people, using the Kernel-release &gt;=2.1.0, module-support should </div><div class='del'>-      be no problem. For users, running under &lt;2.1.0, module-support may not </div><div class='del'>-      work, because the methods have changed between 2.0.x and 2.1.x.</div><div class='del'>-   2) Added some more effective statistics for /proc-output.</div><div class='del'>-   3) Change typecasting at necessary points from (unsigned long) to</div><div class='del'>-      virt_to_bus().</div><div class='del'>-   4) Included #if... at special points to have specific adaption of the</div><div class='del'>-      driver to kernel 2.0.x and 2.1.x. It should therefore also run with </div><div class='del'>-      later releases.</div><div class='del'>-   5) Magneto-Optical drives and medium-changers are also recognized, now.</div><div class='del'>-      Therefore, we have a completely gapfree recognition of all SCSI-</div><div class='del'>-      device-types, that are known by Linux up to kernel 2.1.31.</div><div class='del'>-   6) The flag SCSI_IBMMCA_DEV_RESET has been inserted. If it is set within</div><div class='del'>-      the configuration, each connected SCSI-device will get a reset command</div><div class='del'>-      during boottime. This can be necessary for some special SCSI-devices.</div><div class='del'>-      This flag should be included in Config.in.</div><div class='del'>-      (See also the new Config.in file.)</div><div class='del'>-   Probable next improvement: bad disk handler.</div><div class='del'>-   - Michael Lang</div><div class='del'>- </div><div class='del'>-   Sept 14 1997: (v3.0c)</div><div class='del'>-   1) Some debugging and speed optimization applied.</div><div class='del'>-   - Michael Lang</div><div class='del'>-</div><div class='del'>-   Dec 15, 1997</div><div class='del'>-    - chrisb@truespectra.com</div><div class='del'>-    - made the front panel display thingy optional, specified from the</div><div class='del'>-    command-line via ibmmcascsi=display.  Along the lines of the /LED</div><div class='del'>-    option for the OS/2 driver.</div><div class='del'>-    - fixed small bug in the LED display that would hang some machines.</div><div class='del'>-    - reversed ordering of the drives (using the</div><div class='del'>-    IBMMCA_SCSI_ORDER_STANDARD define).  This is necessary for two main</div><div class='del'>-    reasons:</div><div class='del'>-	- users who've already installed Linux won't be screwed.  Keep</div><div class='del'>-	in mind that not everyone is a kernel hacker.</div><div class='del'>-	- be consistent with the BIOS ordering of the drives.  In the</div><div class='del'>-	BIOS, id 6 is C:, id 0 might be D:.  With this scheme, they'd be</div><div class='del'>-	backwards.  This confuses the crap out of those heathens who've</div><div class='del'>-	got a impure Linux installation (which, &lt;wince&gt;, I'm one of).</div><div class='del'>-    This whole problem arises because IBM is actually non-standard with</div><div class='del'>-    the id to BIOS mappings.  You'll find, in fdomain.c, a similar</div><div class='del'>-    comment about a few FD BIOS revisions.  The Linux (and apparently</div><div class='del'>-    industry) standard is that C: maps to scsi id (0,0).  Let's stick</div><div class='del'>-    with that standard.</div><div class='del'>-    - Since this is technically a branch of my own, I changed the</div><div class='del'>-    version number to 3.0e-cpb.</div><div class='del'>-</div><div class='del'>-   Jan 17, 1998: (v3.0f)</div><div class='del'>-   1) Addition of some statistical info for /proc in proc_info.</div><div class='del'>-   2) Taking care of the SCSI-assignment problem, dealed by Chris at Dec 15</div><div class='del'>-      1997. In fact, IBM is right, concerning the assignment of SCSI-devices </div><div class='del'>-      to driveletters. It is conform to the ANSI-definition of the SCSI-</div><div class='del'>-      standard to assign drive C: to SCSI-id 6, because it is the highest</div><div class='del'>-      hardware priority after the hostadapter (that has still today by</div><div class='del'>-      default everywhere id 7). Also realtime-operating systems that I use, </div><div class='del'>-      like LynxOS and OS9, which are quite industrial systems use top-down</div><div class='del'>-      numbering of the harddisks, that is also starting at id 6. Now, one</div><div class='del'>-      sits a bit between two chairs. On one hand side, using the define</div><div class='del'>-      IBMMCA_SCSI_ORDER_STANDARD makes Linux assigning disks conform to</div><div class='del'>-      the IBM- and ANSI-SCSI-standard and keeps this driver downward</div><div class='del'>-      compatible to older releases, on the other hand side, people is quite</div><div class='del'>-      habituated in believing that C: is assigned to (0,0) and much other</div><div class='del'>-      SCSI-BIOS do so. Therefore, I moved the IBMMCA_SCSI_ORDER_STANDARD </div><div class='del'>-      define out of the driver and put it into Config.in as subitem of </div><div class='del'>-      'IBM SCSI support'. A help, added to Documentation/Configure.help </div><div class='del'>-      explains the differences between saying 'y' or 'n' to the user, when </div><div class='del'>-      IBMMCA_SCSI_ORDER_STANDARD prompts, so the ordinary user is enabled to </div><div class='del'>-      choose the way of assignment, depending on his own situation and gusto.</div><div class='del'>-   3) Adapted SCSI_IBMMCA_DEV_RESET to the local naming convention, so it is</div><div class='del'>-      now called IBMMCA_SCSI_DEV_RESET.</div><div class='del'>-   4) Optimization of proc_info and its subroutines.</div><div class='del'>-   5) Added more in-source-comments and extended the driver description by</div><div class='del'>-      some explanation about the SCSI-device-assignment problem.</div><div class='del'>-   - Michael Lang</div><div class='del'>-   </div><div class='del'>-   Jan 18, 1998: (v3.0g)</div><div class='del'>-   1) Correcting names to be absolutely conform to the later 2.1.x releases.</div><div class='del'>-      This is necessary for </div><div class='del'>-            IBMMCA_SCSI_DEV_RESET -&gt; CONFIG_IBMMCA_SCSI_DEV_RESET</div><div class='del'>-            IBMMCA_SCSI_ORDER_STANDARD -&gt; CONFIG_IBMMCA_SCSI_ORDER_STANDARD</div><div class='del'>-   - Michael Lang</div><div class='del'>- </div><div class='del'>-   Jan 18, 1999: (v3.1 MCA-team internal)</div><div class='del'>-   1) The multiple hosts structure is accessed from every subroutine, so there</div><div class='del'>-      is no longer the address of the device structure passed from function</div><div class='del'>-      to function, but only the hostindex. A call by value, nothing more. This</div><div class='del'>-      should really be understood by the compiler and the subsystem should get</div><div class='del'>-      the right values and addresses.</div><div class='del'>-   2) The SCSI-subsystem detection was not complete and quite hugely buggy up</div><div class='del'>-      to now, compared to the technical manual. The interpretation of the pos2</div><div class='del'>-      register is not as assumed by people before, therefore, I dropped a note</div><div class='del'>-      in the ibmmca_detect function to show the registers' interpretation.</div><div class='del'>-      The pos-registers of integrated SCSI-subsystems do not contain any </div><div class='del'>-      information concerning the IO-port offset, really. Instead, they contain</div><div class='del'>-      some info about the adapter, the chip, the NVRAM .... The I/O-port is</div><div class='del'>-      fixed to 0x3540 - 0x3547. There can be more than one adapters in the </div><div class='del'>-      slots and they get an offset for the I/O area in order to get their own</div><div class='del'>-      I/O-address area. See chapter 2 for detailed description. At least, the </div><div class='del'>-      detection should now work right, even on models other than 95. The 95ers</div><div class='del'>-      came happily around the bug, as their pos2 register contains always 0 </div><div class='del'>-      in the critical area. Reserved bits are not allowed to be interpreted, </div><div class='del'>-      therefore, IBM is allowed to set those bits as they like and they may </div><div class='del'>-      really vary between different PS/2 models. So, now, no interpretation </div><div class='del'>-      of reserved bits - hopefully no trouble here anymore.</div><div class='del'>-   3) The command error, which you may get on models 55, 56, 57, 70, 77 and</div><div class='del'>-      P70 may have been caused by the fact, that adapters of older design do</div><div class='del'>-      not like sending commands to non-existing SCSI-devices and will react</div><div class='del'>-      with a command error as a sign of protest. While this error is not</div><div class='del'>-      present on IBM SCSI Adapter w/cache, it appears on IBM Integrated SCSI</div><div class='del'>-      Adapters. Therefore, I implemented a workaround to forgive those </div><div class='del'>-      adapters their protests, but it is marked up in the statistics, so</div><div class='del'>-      after a successful boot, you can see in /proc/scsi/ibmmca/&lt;host_number&gt;</div><div class='del'>-      how often the command errors have been forgiven to the SCSI-subsystem.</div><div class='del'>-      If the number is bigger than 0, you have a SCSI subsystem of older</div><div class='del'>-      design, what should no longer matter.</div><div class='del'>-   4) ibmmca_getinfo() has been adapted very carefully, so it shows in the </div><div class='del'>-      slotn file really, what is senseful to be presented.</div><div class='del'>-   5) ibmmca_register() has been extended in its parameter list in order to</div><div class='del'>-      pass the right name of the SCSI-adapter to Linux.</div><div class='del'>-   - Michael Lang</div><div class='del'>-</div><div class='del'>-   Feb 6, 1999: (v3.1)</div><div class='del'>-   1) Finally, after some 3.1Beta-releases, the 3.1 release. Sorry, for </div><div class='del'>-      the delayed release, but it was not finished with the release of </div><div class='del'>-      Kernel 2.2.0.</div><div class='del'>-   - Michael Lang</div><div class='del'>-   </div><div class='del'>-   Feb 10, 1999 (v3.1)</div><div class='del'>-   1) Added a new commandline parameter called 'bypass' in order to bypass</div><div class='del'>-      every integrated subsystem SCSI-command consequently in case of</div><div class='del'>-      troubles.</div><div class='del'>-   2) Concatenated read_capacity requests to the harddisks. It gave a lot</div><div class='del'>-      of troubles with some controllers and after I wanted to apply some</div><div class='del'>-      extensions, it jumped out in the same situation, on my w/cache, as like </div><div class='del'>-      on D. Weinehalls' Model 56, having integrated SCSI. This gave me the </div><div class='del'>-      decisive hint to move the code-part out and declare it global. Now</div><div class='del'>-      it seems to work far better and more stable. Let us see what</div><div class='del'>-      the world thinks of it...</div><div class='del'>-   3) By the way, only Sony DAT-drives seem to show density code 0x13. A</div><div class='del'>-      test with a HP drive gave right results, so the problem is vendor-</div><div class='del'>-      specific and not a problem of the OS or the driver.</div><div class='del'>-   - Michael Lang</div><div class='del'>-   </div><div class='del'>-   Feb 18, 1999 (v3.1d)</div><div class='del'>-   1) The abort command and the reset function have been checked for </div><div class='del'>-      inconsistencies. From the logical point of thinking, they work</div><div class='del'>-      at their optimum, now, but as the subsystem does not answer with an</div><div class='del'>-      interrupt, abort never finishes, sigh...</div><div class='del'>-   2) Everything, that is accessed by a busmaster request from the adapter</div><div class='del'>-      is now declared as global variable, even the return-buffer in the</div><div class='del'>-      local checking phase. This assures, that no accesses to undefined memory</div><div class='del'>-      areas are performed.</div><div class='del'>-   3) In ibmmca.h, the line unchecked_isa_dma is added with 1 in order to</div><div class='del'>-      avoid memory-pointers for the areas higher than 16MByte in order to</div><div class='del'>-      be sure, it also works on 16-Bit Microchannel bus systems.</div><div class='del'>-   4) A lot of small things have been found, but nothing that endangered the</div><div class='del'>-      driver operations. Just it should be more stable, now.</div><div class='del'>-   - Michael Lang</div><div class='del'>-      </div><div class='del'>-   Feb 20, 1999 (v3.1e)</div><div class='del'>-   1) I took the warning from the Linux Kernel Hackers Guide serious and </div><div class='del'>-      checked the cmd-&gt;result return value to the done-function very carefully.</div><div class='del'>-      It is obvious, that the IBM SCSI only delivers the tsb.dev_status, if</div><div class='del'>-      some error appeared, else it is undefined. Now, this is fixed. Before</div><div class='del'>-      any SCB command gets queued, the tsb.dev_status is set to 0, so the </div><div class='del'>-      cmd-&gt;result won't screw up Linux higher level drivers.</div><div class='del'>-   2) The reset-function has slightly improved. This is still planned for </div><div class='del'>-      abort. During the abort and the reset function, no interrupts are </div><div class='del'>-      allowed. This is however quite hard to cope with, so the INT-status</div><div class='del'>-      register is read. When the interrupt gets queued, one can find its</div><div class='del'>-      status immediately on that register and is enabled to continue in the</div><div class='del'>-      reset function. I had no chance to test this really, only in a bogus </div><div class='del'>-      situation, I got this function running, but the situation was too much</div><div class='del'>-      worse for Linux :-(, so tests will continue.</div><div class='del'>-   3) Buffers got now consistent. No open address mapping, as before and</div><div class='del'>-      therefore no further troubles with the unassigned memory segmentation</div><div class='del'>-      faults that scrambled probes on 95XX series and even on 85XX series,</div><div class='del'>-      when the kernel is done in a not so perfectly fitting way.</div><div class='del'>-   4) Spontaneous interrupts from the subsystem, appearing without any</div><div class='del'>-      command previously queued are answered with a DID_BAD_INTR result.</div><div class='del'>-   5) Taken into account ZP Gus' proposals to reverse the SCSI-device</div><div class='del'>-      scan order. As it does not work on Kernel 2.1.x or 2.2.x, as proposed</div><div class='del'>-      by him, I implemented it in a slightly derived way, which offers in </div><div class='del'>-      addition more flexibility.</div><div class='del'>-   - Michael Lang</div><div class='del'>-</div><div class='del'>-   Apr 23, 2000 (v3.2pre1)</div><div class='del'>-   1) During a very long time, I collected a huge amount of bug reports from</div><div class='del'>-      various people, trying really quite different things on their SCSI-</div><div class='del'>-      PS/2s. Today, all these bug reports are taken into account and should be</div><div class='del'>-      mostly solved. The major topics were:</div><div class='del'>-      - Driver crashes during boottime by no obvious reason.</div><div class='del'>-      - Driver panics while the midlevel-SCSI-driver is trying to inquire</div><div class='del'>-        the SCSI-device properties, even though hardware is in perfect state.</div><div class='del'>-      - Displayed info for the various slot-cards is interpreted wrong.</div><div class='del'>-      The main reasons for the crashes were two:</div><div class='del'>-      1) The commands to check for device information like INQUIRY, </div><div class='del'>-         TEST_UNIT_READY, REQUEST_SENSE and MODE_SENSE cause the devices</div><div class='del'>-	 to deliver information of up to 255 bytes. Midlevel drivers offer</div><div class='del'>-	 1024 bytes of space for the answer, but the IBM-SCSI-adapters do</div><div class='del'>-	 not accept this, as they stick quite near to ANSI-SCSI and report</div><div class='del'>-	 a COMMAND_ERROR message which causes the driver to panic. The main</div><div class='del'>-	 problem was located around the INQUIRY command. Now, for all the</div><div class='del'>-	 mentioned commands, the buffersize sent to the adapter is at </div><div class='del'>-	 maximum 255 which seems to be a quite reasonable solution. </div><div class='del'>-	 TEST_UNIT_READY gets a buffersize of 0 to make sure that no </div><div class='del'>-	 data is transferred in order to avoid any possible command failure.</div><div class='del'>-      2) On unsuccessful TEST_UNIT_READY, the mid-level driver has to send</div><div class='del'>-         a REQUEST_SENSE in order to see where the problem is located. This</div><div class='del'>-	 REQUEST_SENSE may have various length in its answer-buffer. IBM</div><div class='del'>-	 SCSI-subsystems report a command failure if the returned buffersize</div><div class='del'>-	 is different from the sent buffersize, but this can be suppressed by</div><div class='del'>-	 a special bit, which is now done and problems seem to be solved.</div><div class='del'>-   2) Code adaption to all kernel-releases. Now, the 3.2 code compiles on </div><div class='del'>-      2.0.x, 2.1.x, 2.2.x and 2.3.x kernel releases without any code-changes.</div><div class='del'>-   3) Commandline-parameters are recognized again, even under Kernel 2.3.x or</div><div class='del'>-      higher.</div><div class='del'>-   - Michael Lang   </div><div class='del'>-</div><div class='del'>-   April 27, 2000 (v3.2pre2)</div><div class='del'>-   1) Bypassed commands get read by the adapter by one cycle instead of two.</div><div class='del'>-      This increases SCSI-performance.</div><div class='del'>-   2) Synchronous datatransfer is provided for sure to be 5 MHz on older</div><div class='del'>-      SCSI and 10 MHz on internal F/W SCSI-adapter.</div><div class='del'>-   3) New commandline parameters allow to force the adapter to slow down while</div><div class='del'>-      in synchronous transfer. Could be helpful for very old devices.</div><div class='del'>-   - Michael Lang</div><div class='del'>-   </div><div class='del'>-   June 2, 2000 (v3.2pre5)</div><div class='del'>-   1) Added Jim Shorney's contribution to make the activity indicator</div><div class='del'>-      flashing in addition to the LED-alphanumeric display-panel on</div><div class='del'>-      models 95A. To be enabled to choose this feature freely, a new</div><div class='del'>-      commandline parameter is added, called 'activity'.</div><div class='del'>-   2) Added the READ_CONTROL bit for test_unit_ready SCSI-command.</div><div class='del'>-   3) Added some suppress_exception bits to read_device_capacity and</div><div class='del'>-      all device_inquiry occurrences in the driver code.</div><div class='del'>-   4) Complaints about the various KERNEL_VERSION implementations are</div><div class='del'>-      taken into account. Every local_LinuxKernelVersion occurrence is</div><div class='del'>-      now replaced by KERNEL_VERSION, defined in linux/version.h. </div><div class='del'>-      Corresponding changes were applied to ibmmca.h, too. This was a</div><div class='del'>-      contribution to all kernel-parts by Philipp Hahn.</div><div class='del'>-   - Michael Lang</div><div class='del'>-   </div><div class='del'>-   July 17, 2000 (v3.2pre8)</div><div class='del'>-   A long period of collecting bug reports from all corners of the world</div><div class='del'>-   now lead to the following corrections to the code:</div><div class='del'>-   1) SCSI-2 F/W support crashed with a COMMAND ERROR. The reason for this </div><div class='del'>-      was that it is possible to disable Fast-SCSI for the external bus.</div><div class='del'>-      The feature-control command, where this crash appeared regularly, tried</div><div class='del'>-      to set the maximum speed of 10MHz synchronous transfer speed and that</div><div class='del'>-      reports a COMMAND ERROR if external bus Fast-SCSI is disabled. Now,</div><div class='del'>-      the feature-command probes down from maximum speed until the adapter </div><div class='del'>-      stops to complain, which is at the same time the maximum possible</div><div class='del'>-      speed selected in the reference program. So, F/W external can run at</div><div class='del'>-      5 MHz (slow-) or 10 MHz (fast-SCSI). During feature probing, the </div><div class='del'>-      COMMAND ERROR message is used to detect if the adapter does not complain.</div><div class='del'>-   2) Up to now, only combined busmode is supported, if you use external</div><div class='del'>-      SCSI-devices, attached to the F/W-controller. If dual bus is selected,</div><div class='del'>-      only the internal SCSI-devices get accessed by Linux. For most </div><div class='del'>-      applications, this should do fine. </div><div class='del'>-   3) Wide-SCSI-addressing (16-Bit) is now possible for the internal F/W</div><div class='del'>-      bus on the F/W adapter. If F/W adapter is detected, the driver</div><div class='del'>-      automatically uses the extended PUN/LUN &lt;-&gt; LDN mapping tables, which</div><div class='del'>-      are now new from 3.2pre8. This allows PUNs between 0 and 15 and should</div><div class='del'>-      provide more fun with the F/W adapter.</div><div class='del'>-   4) Several machines use the SCSI: POS registers for internal/undocumented</div><div class='del'>-      storage of system relevant info. This confused the driver, mainly on</div><div class='del'>-      models 9595, as it expected no onboard SCSI only, if all POS in</div><div class='del'>-      the integrated SCSI-area are set to 0x00 or 0xff. Now, the mechanism</div><div class='del'>-      to check for integrated SCSI is much more restrictive and these problems</div><div class='del'>-      should be history.</div><div class='del'>-   - Michael Lang          </div><div class='del'>-</div><div class='del'>-   July 18, 2000 (v3.2pre9)</div><div class='del'>-   This develop rather quickly at the moment. Two major things were still</div><div class='del'>-   missing in 3.2pre8:</div><div class='del'>-   1) The adapter PUN for F/W adapters has 4-bits, while all other adapters</div><div class='del'>-      have 3-bits. This is now taken into account for F/W.</div><div class='del'>-   2) When you select CONFIG_IBMMCA_SCSI_ORDER_STANDARD, you should </div><div class='del'>-      normally get the inverse probing order of your devices on the SCSI-bus.</div><div class='del'>-      The ANSI device order gets scrambled in version 3.2pre8!! Now, a new</div><div class='del'>-      and tested algorithm inverts the device-order on the SCSI-bus and</div><div class='del'>-      automatically avoids accidental access to whatever SCSI PUN the adapter </div><div class='del'>-      is set and works with SCSI- and Wide-SCSI-addressing.</div><div class='del'>-   - Michael Lang</div><div class='del'>-</div><div class='del'>-   July 23, 2000 (v3.2pre10 unpublished) </div><div class='del'>-   1) LED panel display supports wide-addressing in ibmmca=display mode.</div><div class='del'>-   2) Adapter-information and autoadaption to address-space is done.</div><div class='del'>-   3) Auto-probing for maximum synchronous SCSI transfer rate is working.</div><div class='del'>-   4) Optimization to some embedded function calls is applied.</div><div class='del'>-   5) Added some comment for the user to wait for SCSI-devices being probed.</div><div class='del'>-   6) Finished version 3.2 for Kernel 2.4.0. It least, I thought it is but...</div><div class='del'>-   - Michael Lang</div><div class='del'>-   </div><div class='del'>-   July 26, 2000 (v3.2pre11)</div><div class='del'>-   1) I passed a horrible weekend getting mad with NMIs on kernel 2.2.14 and</div><div class='del'>-      a model 9595. Asking around in the community, nobody except of me has</div><div class='del'>-      seen such errors. Weird, but I am trying to recompile everything on</div><div class='del'>-      the model 9595. Maybe, as I use a specially modified gcc, that could</div><div class='del'>-      cause problems. But, it was not the reason. The true background was,</div><div class='del'>-      that the kernel was compiled for i386 and the 9595 has a 486DX-2. </div><div class='del'>-      Normally, no troubles should appear, but for this special machine,</div><div class='del'>-      only the right processor support is working fine!</div><div class='del'>-   2) Previous problems with synchronous speed, slowing down from one adapter </div><div class='del'>-      to the next during probing are corrected. Now, local variables store</div><div class='del'>-      the synchronous bitmask for every single adapter found on the MCA bus.</div><div class='del'>-   3) LED alphanumeric panel support for XX95 systems is now showing some</div><div class='del'>-      alive rotator during boottime. This makes sense, when no monitor is </div><div class='del'>-      connected to the system. You can get rid of all display activity, if</div><div class='del'>-      you do not use any parameter or just ibmmcascsi=activity, for the </div><div class='del'>-      harddrive activity LED, existent on all PS/2, except models 8595-XXX.</div><div class='del'>-      If no monitor is available, please use ibmmcascsi=display, which works</div><div class='del'>-      fine together with the linuxinfo utility for the LED-panel.</div><div class='del'>-   - Michael Lang</div><div class='del'>-   </div><div class='del'>-   July 29, 2000 (v3.2)</div><div class='del'>-   1) Submission of this driver for kernel 2.4test-XX and 2.2.17.</div><div class='del'>-   - Michael Lang</div><div class='del'>-   </div><div class='del'>-   December 28, 2000 (v3.2d / v4.0)</div><div class='del'>-   1) The interrupt handler had some wrong statement to wait for. This</div><div class='del'>-      was done due to experimental reasons during 3.2 development but it</div><div class='del'>-      has shown that this is not stable enough. Going back to wait for the</div><div class='del'>-      adapter to be not busy is best.</div><div class='del'>-   2) Inquiry requests can be shorter than 255 bytes of return buffer. Due</div><div class='del'>-      to a bug in the ibmmca_queuecommand routine, this buffer was forced</div><div class='del'>-      to 255 at minimum. If the memory address, this return buffer is pointing</div><div class='del'>-      to does not offer more space, invalid memory accesses destabilized the</div><div class='del'>-      kernel.</div><div class='del'>-   3) version 4.0 is only valid for kernel 2.4.0 or later. This is necessary</div><div class='del'>-      to remove old kernel version dependent waste from the driver. 3.2d is</div><div class='del'>-      only distributed with older kernels but keeps compatibility with older</div><div class='del'>-      kernel versions. 4.0 and higher versions cannot be used with older </div><div class='del'>-      kernels anymore!! You must have at least kernel 2.4.0!!</div><div class='del'>-   4) The commandline argument 'bypass' and all its functionality got removed</div><div class='del'>-      in version 4.0. This was never really necessary, as all troubles were</div><div class='del'>-      based on non-command related reasons up to now, so bypassing commands</div><div class='del'>-      did not help to avoid any bugs. It is kept in 3.2X for debugging reasons.</div><div class='del'>-   5) Dynamic reassignment of ldns was again verified and analyzed to be</div><div class='del'>-      completely inoperational. This is corrected and should work now.</div><div class='del'>-   6) All commands that get sent to the SCSI adapter were verified and</div><div class='del'>-      completed in such a way, that they are now completely conform to the</div><div class='del'>-      demands in the technical description of IBM. Main candidates were the</div><div class='del'>-      DEVICE_INQUIRY, REQUEST_SENSE and DEVICE_CAPACITY commands. They must</div><div class='del'>-      be transferred by bypassing the internal command buffer of the adapter</div><div class='del'>-      or else the response can be a random result. GET_POS_INFO would be more</div><div class='del'>-      safe in usage, if one could use the SUPRESS_EXCEPTION_SHORT, but this</div><div class='del'>-      is not allowed by the technical references of IBM. (Sorry, folks, the</div><div class='del'>-      model 80 problem is still a task to be solved in a different way.)</div><div class='del'>-   7) v3.2d is still hold back for some days for testing, while 4.0 is </div><div class='del'>-      released.</div><div class='del'>-   - Michael Lang</div><div class='del'>-   </div><div class='del'>-   January 3, 2001 (v4.0a)</div><div class='del'>-   1) A lot of complains after the 2.4.0-prerelease kernel came in about</div><div class='del'>-      the impossibility to compile the driver as a module. This problem is</div><div class='del'>-      solved. In combination with that problem, some unprecise declaration</div><div class='del'>-      of the function option_setup() gave some warnings during compilation.</div><div class='del'>-      This is solved, too by a forward declaration in ibmmca.c.</div><div class='del'>-   2) #ifdef argument concerning CONFIG_SCSI_IBMMCA is no longer needed and</div><div class='del'>-      was entirely removed.</div><div class='del'>-   3) Some switch statements got optimized in code, as some minor variables</div><div class='del'>-      in internal SCSI-command handlers.</div><div class='del'>-   - Michael Lang</div><div class='del'>-</div><div class='del'>-   4 To do</div><div class='del'>-   -------</div><div class='del'>-        - IBM SCSI-2 F/W external SCSI bus support in separate mode!</div><div class='del'>-	- It seems that the handling of bad disks is really bad -</div><div class='del'>-	  non-existent, in fact. However, a low-level driver cannot help</div><div class='del'>-	  much, if such things happen.</div><div class='del'>-</div><div class='del'>-   5 Users' Manual</div><div class='del'>-   ---------------</div><div class='del'>-   5.1 Commandline Parameters</div><div class='del'>-   --------------------------</div><div class='del'>-   There exist several features for the IBM SCSI-subsystem driver.</div><div class='del'>-   The commandline parameter format is:</div><div class='del'>-   </div><div class='del'>-         ibmmcascsi=&lt;command1&gt;,&lt;command2&gt;,&lt;command3&gt;,...</div><div class='del'>-	 </div><div class='del'>-   where commandN can be one of the following:</div><div class='del'>-   </div><div class='del'>-         display    Owners of a model 95 or other PS/2 systems with an</div><div class='del'>-	            alphanumeric LED display may set this to have their</div><div class='del'>-		    display showing the following output of the 8 digits:</div><div class='del'>-		      </div><div class='del'>-		                ------DA</div><div class='del'>-				</div><div class='del'>-		    where '-' stays dark, 'D' shows the SCSI-device id</div><div class='del'>-		    and 'A' shows the SCSI hostindex, being currently </div><div class='del'>-		    accessed. During boottime, this will give the message</div><div class='del'>-		    </div><div class='del'>-		                SCSIini*</div><div class='del'>-				</div><div class='del'>-                    on the LED-panel, where the * represents a rotator, </div><div class='del'>-		    showing the activity during the probing phase of the</div><div class='del'>-		    driver which can take up to two minutes per SCSI-adapter.</div><div class='del'>-	 adisplay   This works like display, but gives more optical overview </div><div class='del'>-	            of the activities on the SCSI-bus. The display will have</div><div class='del'>-		    the following output:</div><div class='del'>-		    </div><div class='del'>-		                6543210A</div><div class='del'>-				</div><div class='del'>-		    where the numbers 0 to 6 light up at the shown position,</div><div class='del'>-		    when the SCSI-device is accessed. 'A' shows again the SCSI</div><div class='del'>-		    hostindex. If display nor adisplay is set, the internal</div><div class='del'>-		    PS/2 harddisk LED is used for media-activities. So, if</div><div class='del'>-		    you really do not have a system with a LED-display, you</div><div class='del'>-		    should not set display or adisplay. Keep in mind, that</div><div class='del'>-		    display and adisplay can only be used alternatively. It</div><div class='del'>-		    is not recommended to use this option, if you have some</div><div class='del'>-		    wide-addressed devices e.g. at the SCSI-2 F/W adapter in</div><div class='del'>-		    your system. In addition, the usage of the display for</div><div class='del'>-		    other tasks in parallel, like the linuxinfo-utility makes </div><div class='del'>-		    no sense with this option.</div><div class='del'>-	 activity   This enables the PS/2 harddisk LED activity indicator.</div><div class='del'>-	            Most PS/2 have no alphanumeric LED display, but some</div><div class='del'>-		    indicator. So you should use this parameter to activate it.</div><div class='del'>-		    If you own model 9595 (Server95), you can have both, the </div><div class='del'>-		    LED panel and the activity indicator in parallel. However,</div><div class='del'>-		    some PS/2s, like the 8595 do not have any harddisk LED </div><div class='del'>-		    activity indicator, which means, that you must use the</div><div class='del'>-		    alphanumeric LED display if you want to monitor SCSI-</div><div class='del'>-		    activity.</div><div class='del'>-	 bypass     This is obsolete from driver version 4.0, as the adapters</div><div class='del'>-	            got that far understood, that the selection between </div><div class='del'>-		    integrated and bypassed commands should now work completely</div><div class='del'>-		    correct! For historical reasons, the old description is</div><div class='del'>-		    kept here:</div><div class='del'>-	            This commandline parameter forces the driver never to use</div><div class='del'>-	            SCSI-subsystems' integrated SCSI-command set. Except of</div><div class='del'>-		    the immediate assign, which is of vital importance for</div><div class='del'>-		    every IBM SCSI-subsystem to set its ldns right. Instead,</div><div class='del'>-		    the ordinary ANSI-SCSI-commands are used and passed by the</div><div class='del'>-		    controller to the SCSI-devices, therefore 'bypass'. The</div><div class='del'>-		    effort, done by the subsystem is quite bogus and at a</div><div class='del'>-		    minimum and therefore it should work everywhere. This</div><div class='del'>-		    could maybe solve troubles with old or integrated SCSI-</div><div class='del'>-		    controllers and nasty harddisks. Keep in mind, that using </div><div class='del'>-		    this flag will slow-down SCSI-accesses slightly, as the </div><div class='del'>-		    software generated commands are always slower than the </div><div class='del'>-		    hardware. Non-harddisk devices always get read/write-</div><div class='del'>-		    commands in bypass mode. On the most recent releases of </div><div class='del'>-		    the Linux IBM-SCSI-driver, the bypass command should be</div><div class='del'>-		    no longer a necessary thing, if you are sure about your</div><div class='del'>-		    SCSI-hardware!</div><div class='del'>-	 normal     This is the parameter, introduced on the 2.0.x development</div><div class='del'>-	            rail by ZP Gu. This parameter defines the SCSI-device</div><div class='del'>-		    scan order in the new industry standard. This means, that</div><div class='del'>-		    the first SCSI-device is the one with the lowest pun.</div><div class='del'>-		    E.g. harddisk at pun=0 is scanned before harddisk at</div><div class='del'>-		    pun=6, which means, that harddisk at pun=0 gets sda</div><div class='del'>-		    and the one at pun=6 gets sdb.</div><div class='del'>-	 ansi       The ANSI-standard for the right scan order, as done by</div><div class='del'>-	            IBM, Microware and Microsoft, scans SCSI-devices starting</div><div class='del'>-		    at the highest pun, which means, that e.g. harddisk at</div><div class='del'>-		    pun=6 gets sda and a harddisk at pun=0 gets sdb. If you</div><div class='del'>-		    like to have the same SCSI-device order, as in DOS, OS-9</div><div class='del'>-		    or OS/2, just use this parameter.</div><div class='del'>-         fast       SCSI-I/O in synchronous mode is done at 5 MHz for IBM-</div><div class='del'>-                    SCSI-devices. SCSI-2 Fast/Wide Adapter/A external bus</div><div class='del'>-                    should then run at 10 MHz if Fast-SCSI is enabled,</div><div class='del'>-                    and at 5 MHz if Fast-SCSI is disabled on the external</div><div class='del'>-                    bus. This is the default setting when nothing is </div><div class='del'>-                    specified here.</div><div class='del'>-         medium     Synchronous rate is at 50% approximately, which means</div><div class='del'>-                    2.5 MHz for IBM SCSI-adapters and 5.0 MHz for F/W ext.</div><div class='del'>-                    SCSI-bus (when Fast-SCSI speed enabled on external bus).</div><div class='del'>-         slow       The slowest possible synchronous transfer rate is set. </div><div class='del'>-                    This means 1.82 MHz for IBM SCSI-adapters and 2.0 MHz</div><div class='del'>-                    for F/W external bus at Fast-SCSI speed on the external</div><div class='del'>-		    bus.</div><div class='del'>-		    </div><div class='del'>-   A further option is that you can force the SCSI-driver to accept a SCSI-</div><div class='del'>-   subsystem at a certain I/O-address with a predefined adapter PUN. This</div><div class='del'>-   is done by entering </div><div class='del'>-</div><div class='del'>-                  commandN   = I/O-base</div><div class='del'>-		  commandN+1 = adapter PUN</div><div class='del'>-		  </div><div class='del'>-   e.g. ibmmcascsi=0x3540,7 will force the driver to detect a SCSI-subsystem </div><div class='del'>-   at I/O-address 0x3540 with adapter PUN 7. Please only use this method, if</div><div class='del'>-   the driver does really not recognize your SCSI-adapter! With driver version</div><div class='del'>-   3.2, this recognition of various adapters was hugely improved and you</div><div class='del'>-   should try first to remove your commandline arguments of such type with a </div><div class='del'>-   newer driver. I bet, it will be recognized correctly. Even multiple and </div><div class='del'>-   different types of IBM SCSI-adapters should be recognized correctly, too.</div><div class='del'>-   Use the forced detection method only as last solution!</div><div class='del'>-   </div><div class='del'>-   Examples:</div><div class='del'>-   </div><div class='del'>-        ibmmcascsi=adisplay</div><div class='del'>-	</div><div class='del'>-   This will use the advanced display mode for the model 95 LED alphanumeric</div><div class='del'>-   display.</div><div class='del'>-   </div><div class='del'>-        ibmmcascsi=display,0x3558,7</div><div class='del'>-	</div><div class='del'>-   This will activate the default display mode for the model 95 LED display</div><div class='del'>-   and will force the driver to accept a SCSI-subsystem at I/O-base 0x3558</div><div class='del'>-   with adapter PUN 7.</div><div class='del'>-   </div><div class='del'>-   5.2 Troubleshooting</div><div class='del'>-   -------------------</div><div class='del'>-   The following FAQs should help you to solve some major problems with this</div><div class='del'>-   driver.</div><div class='del'>-   </div><div class='del'>-     Q: "Reset SCSI-devices at boottime" halts the system at boottime, why?</div><div class='del'>-     A: This is only tested with the IBM SCSI Adapter w/cache. It is not</div><div class='del'>-        yet proven to run on other adapters, however you may be lucky.</div><div class='del'>-	In version 3.1d this has been hugely improved and should work better,</div><div class='del'>-	now. Normally you really won't need to activate this flag in the</div><div class='del'>-	kernel configuration, as all post 1989 SCSI-devices should accept</div><div class='del'>-	the reset-signal, when the computer is switched on. The SCSI-</div><div class='del'>-	subsystem generates this reset while being initialized. This flag</div><div class='del'>-	is really reserved for users with very old, very strange or self-made</div><div class='del'>-	SCSI-devices.</div><div class='del'>-     Q: Why is the SCSI-order of my drives mirrored to the device-order</div><div class='del'>-        seen from OS/2 or DOS ?</div><div class='del'>-     A: It depends on the operating system, if it looks at the devices in</div><div class='del'>-        ANSI-SCSI-standard (starting from pun 6 and going down to pun 0) or</div><div class='del'>-	if it just starts at pun 0 and counts up. If you want to be conform</div><div class='del'>-	with OS/2 and DOS, you have to activate this flag in the kernel</div><div class='del'>-	configuration or you should set 'ansi' as parameter for the kernel.</div><div class='del'>-	The parameter 'normal' sets the new industry standard, starting</div><div class='del'>-	from pun 0, scanning up to pun 6. This allows you to change your </div><div class='del'>-	opinion still after having already compiled the kernel.</div><div class='del'>-     Q: Why can't I find IBM MCA SCSI support in the config menu?</div><div class='del'>-     A: You have to activate MCA bus support, first.</div><div class='del'>-     Q: Where can I find the latest info about this driver?</div><div class='del'>-     A: See the file MAINTAINERS for the current WWW-address, which offers</div><div class='del'>-        updates, info and Q/A lists. At this file's origin, the webaddress</div><div class='del'>-	was: http://www.staff.uni-mainz.de/mlang/linux.html</div><div class='del'>-     Q: My SCSI-adapter is not recognized by the driver, what can I do?</div><div class='del'>-     A: Just force it to be recognized by kernel parameters. See section 5.1.</div><div class='del'>-        If this really happens, do also send e-mail to the maintainer, as</div><div class='del'>-	forced detection should be never necessary. Forced detection is in</div><div class='del'>-	principal some flaw of the driver adapter detection and goes into </div><div class='del'>-	bug reports.</div><div class='del'>-     Q: The driver screws up, if it starts to probe SCSI-devices, is there</div><div class='del'>-        some way out of it?</div><div class='del'>-     A: Yes, that was some recognition problem of the correct SCSI-adapter</div><div class='del'>-        and its I/O base addresses. Upgrade your driver to the latest release</div><div class='del'>-	and it should be fine again.</div><div class='del'>-     Q: I get a message: panic IBM MCA SCSI: command error .... , what can</div><div class='del'>-        I do against this?</div><div class='del'>-     A: Previously, I followed the way by ignoring command errors by using</div><div class='del'>-        ibmmcascsi=forgiveall, but this command no longer exists and is</div><div class='del'>-	obsolete. If such a problem appears, it is caused by some segmentation</div><div class='del'>-	fault of the driver, which maps to some unallowed area. The latest </div><div class='del'>-	version of the driver should be ok, as most bugs have been solved.</div><div class='del'>-     Q: There are still kernel panics, even after having set </div><div class='del'>-        ibmmcascsi=forgiveall. Are there other possibilities to prevent</div><div class='del'>-	such panics?</div><div class='del'>-     A: No, get just the latest release of the driver and it should work </div><div class='del'>-        better and better with increasing version number. Forget about this</div><div class='del'>-	ibmmcascsi=forgiveall, as also ignorecmd are obsolete.!</div><div class='del'>-     Q: Linux panics or stops without any comment, but it is probable, that my</div><div class='del'>-        harddisk(s) have bad blocks.</div><div class='del'>-     A: Sorry, the bad-block handling is still a feeble point of this driver,</div><div class='del'>-        but is on the schedule for development in the near future.</div><div class='del'>-     Q: Linux panics while dynamically assigning SCSI-ids or ldns.</div><div class='del'>-     A: If you disconnect a SCSI-device from the machine, while Linux is up</div><div class='del'>-        and the driver uses dynamical reassignment of logical device numbers</div><div class='del'>-	(ldn), it really gets "angry" if it won't find devices, that were still</div><div class='del'>-	present at boottime and stops Linux.</div><div class='del'>-     Q: The system does not recover after an abort-command has been generated.</div><div class='del'>-     A: This is regrettably true, as it is not yet understood, why the </div><div class='del'>-        SCSI-adapter does really NOT generate any interrupt at the end of</div><div class='del'>-	the abort-command. As no interrupt is generated, the abort command</div><div class='del'>-	cannot get finished and the system hangs, sorry, but checks are </div><div class='del'>-	running to hunt down this problem. If there is a real pending command,</div><div class='del'>-	the interrupt MUST get generated after abort. In this case, it</div><div class='del'>-	should finish well.</div><div class='del'>-     Q: The system gets in bad shape after a SCSI-reset, is this known?</div><div class='del'>-     A: Yes, as there are a lot of prescriptions (see the Linux Hackers'</div><div class='del'>-        Guide) what has to be done for reset, we still share the bad shape of</div><div class='del'>-	the reset functions with all other low level SCSI-drivers. </div><div class='del'>-	Astonishingly, reset works in most cases quite ok, but the harddisks</div><div class='del'>-	won't run in synchronous mode anymore after a reset, until you reboot.</div><div class='del'>-     Q: Why does my XXX w/Cache adapter not use read-prefetch?</div><div class='del'>-     A: Ok, that is not completely possible. If a cache is present, the </div><div class='del'>-        adapter tries to use it internally. Explicitly, one can use the cache</div><div class='del'>-	with a read prefetch command, maybe in future, but this requires</div><div class='del'>-	some major overhead of SCSI-commands that risks the performance to</div><div class='del'>-	go down more than it gets improved. Tests with that are running.</div><div class='del'>-     Q: I have a IBM SCSI-2 Fast/Wide adapter, it boots in some way and hangs.</div><div class='del'>-     A: Yes, that is understood, as for sure, your SCSI-2 Fast/Wide adapter</div><div class='del'>-        was in such a case recognized as integrated SCSI-adapter or something </div><div class='del'>-	else, but not as the correct adapter. As the I/O-ports get assigned </div><div class='del'>-	wrongly by that reason, the system should crash in most cases. You </div><div class='del'>-	should upgrade to the latest release of the SCSI-driver. The </div><div class='del'>-	recommended version is 3.2 or later. Here, the F/W support is in</div><div class='del'>-	a stable and reliable condition. Wide-addressing is in addition </div><div class='del'>-	supported.</div><div class='del'>-     Q: I get an Oops message and something like "killing interrupt".</div><div class='del'>-     A: The reason for this is that the IBM SCSI-subsystem only sends a </div><div class='del'>-        termination status back, if some error appeared. In former releases</div><div class='del'>-	of the driver, it was not checked, if the termination status block</div><div class='del'>-	is NULL. From version 3.2, it is taken care of this.</div><div class='del'>-     Q: I have a F/W adapter and the driver sees my internal SCSI-devices,</div><div class='del'>-        but ignores the external ones.</div><div class='del'>-     A: Select combined busmode in the IBM config-program and check for that</div><div class='del'>-        no SCSI-id on the external devices appears on internal devices.</div><div class='del'>-        Reboot afterwards. Dual busmode is supported, but works only for the</div><div class='del'>-	internal bus, yet. External bus is still ignored. Take care for your</div><div class='del'>-	SCSI-ids. If combined bus-mode is activated, on some adapters, </div><div class='del'>-	the wide-addressing is not possible, so devices with ids between 8 </div><div class='del'>-	and 15 get ignored by the driver &amp; adapter!</div><div class='del'>-     Q: I have a 9595 and I get a NMI during heavy SCSI I/O e.g. during fsck.</div><div class='del'>-        A COMMAND ERROR is reported and characters on the screen are missing.</div><div class='del'>-	Warm reboot is not possible. Things look like quite weird.</div><div class='del'>-     A: Check the processor type of your 9595. If you have an 80486 or 486DX-2</div><div class='del'>-        processor complex on your mainboard and you compiled a kernel that</div><div class='del'>-	supports 80386 processors, it is possible, that the kernel cannot</div><div class='del'>-	keep track of the PS/2 interrupt handling and stops on an NMI. Just</div><div class='del'>-	compile a kernel for the correct processor type of your PS/2 and</div><div class='del'>-	everything should be fine. This is necessary even if one assumes,</div><div class='del'>-	that some 80486 system should be downward compatible to 80386</div><div class='del'>-	software.</div><div class='del'>-     Q: Some commands hang and interrupts block the machine. After some</div><div class='del'>-        timeout, the syslog reports that it tries to call abort, but the</div><div class='del'>-	machine is frozen.</div><div class='del'>-     A: This can be a busy wait bug in the interrupt handler of driver </div><div class='del'>-        version 3.2. You should at least upgrade to 3.2c if you use </div><div class='del'>-	kernel &lt; 2.4.0 and driver version 4.0 if you use kernel 2.4.0 or </div><div class='del'>-	later (including all test releases).</div><div class='del'>-     Q: I have a PS/2 model 80 and more than 16 MBytes of RAM. The driver</div><div class='del'>-        completely refuses to work, reports NMIs, COMMAND ERRORs or other</div><div class='del'>-	ambiguous stuff. When reducing the RAM size down below 16 MB, </div><div class='del'>-	everything is running smoothly.</div><div class='del'>-     A: No real answer, yet. In any case, one should force the kernel to</div><div class='del'>-        present SCBs only below the 16 MBytes barrier. Maybe this solves the</div><div class='del'>-	problem. Not yet tried, but guessing that it could work. To get this,</div><div class='del'>-	set unchecked_isa_dma argument of ibmmca.h from 0 to 1.</div><div class='del'>-</div><div class='del'>-   5.3 Bug reports</div><div class='del'>-   --------------</div><div class='del'>-   If you really find bugs in the source code or the driver will successfully</div><div class='del'>-   refuse to work on your machine, you should send a bug report to me. The</div><div class='del'>-   best for this is to follow the instructions on the WWW-page for this</div><div class='del'>-   driver. Fill out the bug-report form, placed on the WWW-page and ship it,</div><div class='del'>-   so the bugs can be taken into account with maximum efforts. But, please</div><div class='del'>-   do not send bug reports about this driver to Linus Torvalds or Leonard</div><div class='del'>-   Zubkoff, as Linus is buried in E-Mail and Leonard is supervising all</div><div class='del'>-   SCSI-drivers and won't have the time left to look inside every single</div><div class='del'>-   driver to fix a bug and especially DO NOT send modified code to Linus</div><div class='del'>-   Torvalds or Alan J. Cox which has not been checked here!!! They are both</div><div class='del'>-   quite buried in E-mail (as me, sometimes, too) and one should first check</div><div class='del'>-   for problems on my local teststand. Recently, I got a lot of </div><div class='del'>-   bug reports for errors in the ibmmca.c code, which I could not imagine, but</div><div class='del'>-   a look inside some Linux-distribution showed me quite often some modified</div><div class='del'>-   code, which did no longer work on most other machines than the one of the</div><div class='del'>-   modifier. Ok, so now that there is maintenance service available for this</div><div class='del'>-   driver, please use this address first in order to keep the level of</div><div class='del'>-   confusion low. Thank you!</div><div class='del'>-   </div><div class='del'>-   When you get a SCSI-error message that panics your system, a list of</div><div class='del'>-   register-entries of the SCSI-subsystem is shown (from Version 3.1d). With </div><div class='del'>-   this list, it is very easy for the maintainer to localize the problem in </div><div class='del'>-   the driver or in the configuration of the user. Please write down all the </div><div class='del'>-   values from this report and send them to the maintainer. This would really </div><div class='del'>-   help a lot and makes life easier concerning misunderstandings.</div><div class='del'>-   </div><div class='del'>-   Use the bug-report form (see 5.4 for its address) to send all the bug-</div><div class='del'>-   stuff to the maintainer or write e-mail with the values from the table. </div><div class='del'>-   </div><div class='del'>-   5.4 Support WWW-page</div><div class='del'>-   --------------------</div><div class='del'>-   The address of the IBM SCSI-subsystem supporting WWW-page is:</div><div class='del'>-   </div><div class='del'>-        http://www.staff.uni-mainz.de/mlang/linux.html</div><div class='del'>-	</div><div class='del'>-   Here you can find info about the background of this driver, patches,</div><div class='del'>-   troubleshooting support, news and a bugreport form. Please check that</div><div class='del'>-   WWW-page regularly for latest hints. If ever this URL changes, please </div><div class='del'>-   refer to the MAINTAINERS file in order to get the latest address.</div><div class='del'>-   </div><div class='del'>-   For the bugreport, please fill out the formular on the corresponding</div><div class='del'>-   WWW-page. Read the dedicated instructions and write as much as you</div><div class='del'>-   know about your problem. If you do not like such formulars, please send</div><div class='del'>-   some e-mail directly, but at least with the same information as required by</div><div class='del'>-   the formular.</div><div class='del'>-   </div><div class='del'>-   If you have extensive bug reports, including Oops messages and</div><div class='del'>-   screen-shots, please feel free to send it directly to the address</div><div class='del'>-   of the maintainer, too. The current address of the maintainer is:</div><div class='del'>-   </div><div class='del'>-            Michael Lang &lt;langa2@kph.uni-mainz.de&gt;</div><div class='del'>-   </div><div class='del'>-   6 References</div><div class='del'>-   ------------</div><div class='del'>-   IBM Corp., "Update for the PS/2 Hardware Interface Technical Reference, </div><div class='del'>-   Common Interfaces", Armonk, September 1991, PN 04G3281, </div><div class='del'>-   (available in the U.S. for $21.75 at 1-800-IBM-PCTB or in Germany for</div><div class='del'>-   around 40,-DM at "Hallo IBM").</div><div class='del'>-  </div><div class='del'>-   IBM Corp., "Personal System/2 Micro Channel SCSI</div><div class='del'>-   Adapter with Cache Technical Reference", Armonk, March 1990, PN 68X2365.</div><div class='del'>-</div><div class='del'>-   IBM Corp., "Personal System/2 Micro Channel SCSI</div><div class='del'>-   Adapter Technical Reference", Armonk, March 1990, PN 68X2397.</div><div class='del'>-</div><div class='del'>-   IBM Corp., "SCSI-2 Fast/Wide Adapter/A Technical Reference - Dual Bus",</div><div class='del'>-   Armonk, March 1994, PN 83G7545.</div><div class='del'>- </div><div class='del'>-   Friedhelm Schmidt, "SCSI-Bus und IDE-Schnittstelle - Moderne Peripherie-</div><div class='del'>-   Schnittstellen: Hardware, Protokollbeschreibung und Anwendung", 2. Aufl.</div><div class='del'>-   Addison Wesley, 1996.</div><div class='del'>-   </div><div class='del'>-   Michael K. Johnson, "The Linux Kernel Hackers' Guide", Version 0.6, Chapel</div><div class='del'>-   Hill - North Carolina, 1995</div><div class='del'>-   </div><div class='del'>-   Andreas Kaiser, "SCSI TAPE BACKUP for OS/2 2.0", Version 2.12, Stuttgart</div><div class='del'>-   1993</div><div class='del'>-   </div><div class='del'>-   Helmut Rompel, "IBM Computerwelt GUIDE", What is what bei IBM., Systeme *</div><div class='del'>-   Programme * Begriffe, IWT-Verlag GmbH - Muenchen, 1988</div><div class='del'>-   </div><div class='del'>-   7 Credits to</div><div class='del'>-   ------------</div><div class='del'>-   7.1 People</div><div class='del'>-   ----------</div><div class='del'>-   Klaus Grimm</div><div class='del'>-                who already a long time ago gave me the old code from the</div><div class='del'>-		SCSI-driver in order to get it running for some old machine</div><div class='del'>-		in our institute.</div><div class='del'>-   Martin Kolinek</div><div class='del'>-                who wrote the first release of the IBM SCSI-subsystem driver.</div><div class='del'>-   Chris Beauregard</div><div class='del'>-                who for a long time maintained MCA-Linux and the SCSI-driver</div><div class='del'>-		in the beginning. Chris, wherever you are: Cheers to you!</div><div class='del'>-   Klaus Kudielka</div><div class='del'>-                with whom in the 2.1.x times, I had a quite fruitful</div><div class='del'>-                cooperation to get the driver running as a module and to get</div><div class='del'>-		it running with multiple SCSI-adapters.</div><div class='del'>-   David Weinehall</div><div class='del'>-                for his excellent maintenance of the MCA-stuff and the quite </div><div class='del'>-		detailed bug reports and ideas for this driver (and his </div><div class='del'>-		patience ;-)).</div><div class='del'>-   Alan J. Cox  </div><div class='del'>-                for his bug reports and his bold activities in cross-checking</div><div class='del'>-		the driver-code with his teststand.</div><div class='del'>-		</div><div class='del'>-   7.2 Sponsors &amp; Supporters</div><div class='del'>-   -------------------------</div><div class='del'>-   "Hallo IBM",</div><div class='del'>-   IBM-Deutschland GmbH</div><div class='del'>-                the service of IBM-Deutschland for customers. Their E-Mail</div><div class='del'>-		service is unbeatable. Whatever old stuff I asked for, I </div><div class='del'>-		always got some helpful answers.</div><div class='del'>-   Karl-Otto Reimers,</div><div class='del'>-   IBM Klub - Sparte IBM Geschichte, Sindelfingen</div><div class='del'>-                for sending me a copy of the w/Cache manual from the </div><div class='del'>-		IBM-Deutschland archives.</div><div class='del'>-   Harald Staiger</div><div class='del'>-                for his extensive hardware donations which allows me today</div><div class='del'>-		still to test the driver in various constellations.</div><div class='del'>-   Erich Fritscher</div><div class='del'>-                for his very kind sponsoring.</div><div class='del'>-   Louis Ohland,</div><div class='del'>-   Charles Lasitter</div><div class='del'>-                for support by shipping me an IBM SCSI-2 Fast/Wide manual.</div><div class='del'>-                In addition, the contribution of various hardware is quite </div><div class='del'>-                decessive and will make it possible to add FWSR (RAID)</div><div class='del'>-                adapter support to the driver in the near future! So,</div><div class='del'>-                complaints about no RAID support won't remain forever.</div><div class='del'>-                Yes, folks, that is no joke, RAID support is going to rise!</div><div class='del'>-   Erik Weber</div><div class='del'>-                for the great deal we made about a model 9595 and the nice</div><div class='del'>-                surrounding equipment and the cool trip to Mannheim</div><div class='del'>-                second-hand computer market. In addition, I would like</div><div class='del'>-		to thank him for his exhaustive SCSI-driver testing on his </div><div class='del'>-		95er PS/2 park.</div><div class='del'>-   Anthony Hogbin</div><div class='del'>-                for his direct shipment of a SCSI F/W adapter, which allowed</div><div class='del'>-                me immediately on the first stage to try it on model 8557</div><div class='del'>-                together with onboard SCSI adapter and some SCSI w/Cache.</div><div class='del'>-   Andreas Hotz</div><div class='del'>-                for his support by memory and an IBM SCSI-adapter. Collecting</div><div class='del'>-                all this together now allows me to try really things with</div><div class='del'>-                the driver at maximum load and variety on various models in</div><div class='del'>-                a very quick and efficient way.</div><div class='del'>-   Peter Jennewein</div><div class='del'>-                for his model 30, which serves me as part of my teststand</div><div class='del'>-		and his cool remark about how you make an ordinary diskette</div><div class='del'>-		drive working and how to connect it to an IBM-diskette port.</div><div class='del'>-   Johannes Gutenberg-Universitaet, Mainz &amp;</div><div class='del'>-   Institut fuer Kernphysik, Mainz Microtron (MAMI)</div><div class='del'>-                for the offered space, the link, placed on the central</div><div class='del'>-                homepage and the space to store and offer the driver and </div><div class='del'>-		related material and the free working times, which allow</div><div class='del'>-                me to answer all your e-mail.</div><div class='del'>-                   </div><div class='del'>-   8 Trademarks</div><div class='del'>-   ------------</div><div class='del'>-   IBM, PS/2, OS/2, Microchannel are registered trademarks of International </div><div class='del'>-   Business Machines Corporation</div><div class='del'>-   </div><div class='del'>-   MS-DOS is a registered trademark of Microsoft Corporation</div><div class='del'>-   </div><div class='del'>-   Microware, OS-9 are registered trademarks of Microware Systems</div><div class='del'>-   </div><div class='del'>-   9 Disclaimer</div><div class='del'>-   ------------</div><div class='del'>-   Beside the GNU General Public License and the dependent disclaimers and disclaimers</div><div class='del'>-   concerning the Linux-kernel in special, this SCSI-driver comes without any</div><div class='del'>-   warranty. Its functionality is tested as good as possible on certain </div><div class='del'>-   machines and combinations of computer hardware, which does not exclude,</div><div class='del'>-   that data loss or severe damage of hardware is possible while using this</div><div class='del'>-   part of software on some arbitrary computer hardware or in combination </div><div class='del'>-   with other software packages. It is highly recommended to make backup</div><div class='del'>-   copies of your data before using this software. Furthermore, personal</div><div class='del'>-   injuries by hardware defects, that could be caused by this SCSI-driver are</div><div class='del'>-   not excluded and it is highly recommended to handle this driver with a</div><div class='del'>-   maximum of carefulness.</div><div class='del'>-   </div><div class='del'>-   This driver supports hardware, produced by International Business Machines</div><div class='del'>-   Corporation (IBM).</div><div class='del'>-   </div><div class='del'>-------</div><div class='del'>-Michael Lang </div><div class='del'>-(langa2@kph.uni-mainz.de)</div><div class='head'>diff --git a/Documentation/scsi/scsi-parameters.txt b/Documentation/scsi/scsi-parameters.txt<br/>index 21e5798526ee..2bfd6f6d2d3d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/scsi/scsi-parameters.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/scsi/scsi-parameters.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/scsi/scsi-parameters.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scsi/scsi-parameters.txt</a></div><div class='hunk'>@@ -37,9 +37,6 @@ parameters may be changed at runtime by the command</div><div class='ctx'> </div><div class='ctx'> 	eata=		[HW,SCSI]</div><div class='ctx'> </div><div class='del'>-	fd_mcs=		[HW,SCSI]</div><div class='del'>-			See header of drivers/scsi/fd_mcs.c.</div><div class='del'>-</div><div class='ctx'> 	fdomain=	[HW,SCSI]</div><div class='ctx'> 			See header of drivers/scsi/fdomain.c.</div><div class='ctx'> </div><div class='hunk'>@@ -48,9 +45,6 @@ parameters may be changed at runtime by the command</div><div class='ctx'> </div><div class='ctx'> 	gvp11=		[HW,SCSI]</div><div class='ctx'> </div><div class='del'>-	ibmmcascsi=	[HW,MCA,SCSI] IBM MicroChannel SCSI adapter</div><div class='del'>-			See Documentation/mca.txt.</div><div class='del'>-</div><div class='ctx'> 	in2000=		[HW,SCSI]</div><div class='ctx'> 			See header of drivers/scsi/in2000.c.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/scsi/scsi_mid_low_api.txt b/Documentation/scsi/scsi_mid_low_api.txt<br/>index a340b18cd4eb..2b06aba4fa0f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/scsi/scsi_mid_low_api.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/scsi/scsi_mid_low_api.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/scsi/scsi_mid_low_api.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/scsi/scsi_mid_low_api.txt</a></div><div class='hunk'>@@ -30,7 +30,7 @@ the motherboard (or both). Some aic7xxx based HBAs are dual controllers</div><div class='ctx'> and thus represent two hosts. Like most modern HBAs, each aic7xxx host</div><div class='ctx'> has its own PCI device address. [The one-to-one correspondence between</div><div class='ctx'> a SCSI host and a PCI device is common but not required (e.g. with</div><div class='del'>-ISA or MCA adapters).]</div><div class='add'>+ISA adapters).]</div><div class='ctx'> </div><div class='ctx'> The SCSI mid level isolates an LLD from other layers such as the SCSI</div><div class='ctx'> upper layer drivers and the block layer.</div><div class='head'>diff --git a/Documentation/serial/stallion.txt b/Documentation/serial/stallion.txt<br/>index 55090914a9c5..4d798c0cb5cb 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/serial/stallion.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/serial/stallion.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/serial/stallion.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/serial/stallion.txt</a></div><div class='hunk'>@@ -20,10 +20,10 @@ There are two drivers that work with the different families of Stallion</div><div class='ctx'> multiport serial boards. One is for the Stallion smart boards - that is</div><div class='ctx'> EasyIO, EasyConnection 8/32 and EasyConnection 8/64-PCI, the other for</div><div class='ctx'> the true Stallion intelligent multiport boards - EasyConnection 8/64</div><div class='del'>-(ISA, EISA, MCA), EasyConnection/RA-PCI, ONboard and Brumby.</div><div class='add'>+(ISA, EISA), EasyConnection/RA-PCI, ONboard and Brumby.</div><div class='ctx'> </div><div class='ctx'> If you are using any of the Stallion intelligent multiport boards (Brumby,</div><div class='del'>-ONboard, EasyConnection 8/64 (ISA, EISA, MCA), EasyConnection/RA-PCI) with</div><div class='add'>+ONboard, EasyConnection 8/64 (ISA, EISA), EasyConnection/RA-PCI) with</div><div class='ctx'> Linux you will need to get the driver utility package.  This contains a</div><div class='ctx'> firmware loader and the firmware images necessary to make the devices operate.</div><div class='ctx'> </div><div class='hunk'>@@ -40,7 +40,7 @@ If you are using the EasyIO, EasyConnection 8/32 or EasyConnection 8/64-PCI</div><div class='ctx'> boards then you don't need this package, although it does have a serial stats</div><div class='ctx'> display program.</div><div class='ctx'> </div><div class='del'>-If you require DIP switch settings, EISA or MCA configuration files, or any</div><div class='add'>+If you require DIP switch settings, or EISA configuration files, or any</div><div class='ctx'> other information related to Stallion boards then have a look at Stallion's</div><div class='ctx'> web pages at http://www.stallion.com.</div><div class='ctx'> </div><div class='hunk'>@@ -51,13 +51,13 @@ web pages at http://www.stallion.com.</div><div class='ctx'> The drivers can be used as loadable modules or compiled into the kernel.</div><div class='ctx'> You can choose which when doing a "config" on the kernel.</div><div class='ctx'> </div><div class='del'>-All ISA, EISA and MCA boards that you want to use need to be configured into</div><div class='add'>+All ISA, and EISA boards that you want to use need to be configured into</div><div class='ctx'> the driver(s). All PCI boards will be automatically detected when you load</div><div class='ctx'> the driver - so they do not need to be entered into the driver(s)</div><div class='ctx'> configuration structure. Note that kernel PCI support is required to use PCI</div><div class='ctx'> boards.</div><div class='ctx'> </div><div class='del'>-There are two methods of configuring ISA, EISA and MCA boards into the drivers.</div><div class='add'>+There are two methods of configuring ISA and EISA boards into the drivers.</div><div class='ctx'> If using the driver as a loadable module then the simplest method is to pass</div><div class='ctx'> the driver configuration as module arguments. The other method is to modify</div><div class='ctx'> the driver source to add configuration lines for each board in use.</div><div class='hunk'>@@ -71,12 +71,12 @@ That makes things pretty simple to get going.</div><div class='ctx'> 2.1 MODULE DRIVER CONFIGURATION:</div><div class='ctx'> </div><div class='ctx'> The simplest configuration for modules is to use the module load arguments</div><div class='del'>-to configure any ISA, EISA or MCA boards. PCI boards are automatically</div><div class='add'>+to configure any ISA or EISA boards. PCI boards are automatically</div><div class='ctx'> detected, so do not need any additional configuration at all.</div><div class='ctx'> </div><div class='del'>-If using EasyIO, EasyConnection 8/32 ISA or MCA, or EasyConnection 8/63-PCI</div><div class='add'>+If using EasyIO, EasyConnection 8/32 ISA, or EasyConnection 8/63-PCI</div><div class='ctx'> boards then use the "stallion" driver module, Otherwise if you are using</div><div class='del'>-an EasyConnection 8/64 ISA, EISA or MCA, EasyConnection/RA-PCI, ONboard,</div><div class='add'>+an EasyConnection 8/64 ISA or EISA, EasyConnection/RA-PCI, ONboard,</div><div class='ctx'> Brumby or original Stallion board then use the "istallion" driver module.</div><div class='ctx'> </div><div class='ctx'> Typically to load up the smart board driver use:</div><div class='hunk'>@@ -146,7 +146,7 @@ on each system boot. Typically configuration files are put in the</div><div class='ctx'> 2.2 STATIC DRIVER CONFIGURATION:</div><div class='ctx'> </div><div class='ctx'> For static driver configuration you need to modify the driver source code.</div><div class='del'>-Entering ISA, EISA and MCA boards into the driver(s) configuration structure</div><div class='add'>+Entering ISA and EISA boards into the driver(s) configuration structure</div><div class='ctx'> involves editing the driver(s) source file. It's pretty easy if you follow</div><div class='ctx'> the instructions below. Both drivers can support up to 4 boards. The smart</div><div class='ctx'> card driver (the stallion.c driver) supports any combination of EasyIO and</div><div class='hunk'>@@ -157,7 +157,7 @@ supports any combination of ONboards, Brumbys, Stallions and EasyConnection</div><div class='ctx'> To set up the driver(s) for the boards that you want to use you need to</div><div class='ctx'> edit the appropriate driver file and add configuration entries.</div><div class='ctx'> </div><div class='del'>-If using EasyIO or EasyConnection 8/32 ISA or MCA boards,</div><div class='add'>+If using EasyIO or EasyConnection 8/32 ISA boards,</div><div class='ctx'>    In drivers/char/stallion.c:</div><div class='ctx'>       - find the definition of the stl_brdconf array (of structures)</div><div class='ctx'>         near the top of the file</div><div class='hunk'>@@ -243,7 +243,7 @@ change it on the board.</div><div class='ctx'> On EasyIO and EasyConnection 8/32 boards the IRQ is software programmable, so</div><div class='ctx'> if there is a conflict you may need to change the IRQ used for a board. There</div><div class='ctx'> are no interrupts to worry about for ONboard, Brumby or EasyConnection 8/64</div><div class='del'>-(ISA, EISA and MCA) boards. The memory region on EasyConnection 8/64 and</div><div class='add'>+(ISA and EISA) boards. The memory region on EasyConnection 8/64 and</div><div class='ctx'> ONboard boards is software programmable, but not on the Brumby boards.</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/sound/alsa/ALSA-Configuration.txt b/Documentation/sound/alsa/ALSA-Configuration.txt<br/>index 8c16d50f6cb6..221b81016dba 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/sound/alsa/ALSA-Configuration.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/sound/alsa/ALSA-Configuration.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/sound/alsa/ALSA-Configuration.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/sound/alsa/ALSA-Configuration.txt</a></div><div class='hunk'>@@ -1545,7 +1545,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.</div><div class='ctx'> </div><div class='ctx'>     Module for sound cards based on the C-Media CMI8786/8787/8788 chip:</div><div class='ctx'>     * Asound A-8788</div><div class='del'>-    * Asus Xonar DG</div><div class='add'>+    * Asus Xonar DG/DGX</div><div class='ctx'>     * AuzenTech X-Meridian</div><div class='ctx'>     * AuzenTech X-Meridian 2G</div><div class='ctx'>     * Bgears b-Enspirer</div><div class='head'>diff --git a/Documentation/sound/alsa/compress_offload.txt b/Documentation/sound/alsa/compress_offload.txt<br/>index c83a835350f0..90e9b3a11abc 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/sound/alsa/compress_offload.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/sound/alsa/compress_offload.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/sound/alsa/compress_offload.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/sound/alsa/compress_offload.txt</a></div><div class='hunk'>@@ -18,7 +18,7 @@ processing. Support for such hardware has not been very good in Linux,</div><div class='ctx'> mostly because of a lack of a generic API available in the mainline</div><div class='ctx'> kernel.</div><div class='ctx'> </div><div class='del'>-Rather than requiring a compability break with an API change of the</div><div class='add'>+Rather than requiring a compatibility break with an API change of the</div><div class='ctx'> ALSA PCM interface, a new 'Compressed Data' API is introduced to</div><div class='ctx'> provide a control and data-streaming interface for audio DSPs.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/sound/oss/ALS b/Documentation/sound/oss/ALS<br/>index d01ffbfd5808..bf10bed4574b 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/sound/oss/ALS?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/sound/oss/ALS</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/sound/oss/ALS?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/sound/oss/ALS</a></div><div class='hunk'>@@ -57,10 +57,10 @@ The resulting sound driver will provide the following capabilities:</div><div class='ctx'>     DSP/PCM/audio out (L&amp;R), FM (L&amp;R) and Mic in (mono).</div><div class='ctx'> </div><div class='ctx'> Jonathan Woithe</div><div class='del'>-jwoithe@physics.adelaide.edu.au</div><div class='add'>+jwoithe@just42.net</div><div class='ctx'> 30 March 1998</div><div class='ctx'> </div><div class='ctx'> Modified 2000-02-26 by Dave Forrest, drf5n@virginia.edu to add ALS100/ALS200</div><div class='ctx'> Modified 2000-04-10 by Paul Laufer, pelaufer@csupomona.edu to add ISAPnP info.</div><div class='del'>-Modified 2000-11-19 by Jonathan Woithe, jwoithe@physics.adelaide.edu.au</div><div class='add'>+Modified 2000-11-19 by Jonathan Woithe, jwoithe@just42.net</div><div class='ctx'>  - updated information for kernel 2.4.x.</div><div class='head'>diff --git a/Documentation/sparc/README-2.5 b/Documentation/sparc/README-2.5<br/>deleted file mode 100644<br/>index 806fe490a56d..000000000000<br/>--- a/<a href='/drm-misc/tree/Documentation/sparc/README-2.5?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/sparc/README-2.5</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,46 +0,0 @@</div><div class='del'>-BTFIXUP</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-To build new kernels you have to issue "make image". The ready kernel</div><div class='del'>-in ELF format is placed in arch/sparc/boot/image. Explanation is below.</div><div class='del'>-</div><div class='del'>-BTFIXUP is a unique feature of Linux/sparc among other architectures,</div><div class='del'>-developed by Jakub Jelinek (I think... Obviously David S. Miller took</div><div class='del'>-part, too). It allows to boot the same kernel at different </div><div class='del'>-sub-architectures, such as sun4c, sun4m, sun4d, where SunOS uses</div><div class='del'>-different kernels. This feature is convinient for people who you move</div><div class='del'>-disks between boxes and for distrution builders.</div><div class='del'>-</div><div class='del'>-To function, BTFIXUP must link the kernel "in the draft" first,</div><div class='del'>-analyze the result, write a special stub code based on that, and</div><div class='del'>-build the final kernel with the stub (btfix.o).</div><div class='del'>-</div><div class='del'>-Kai Germaschewski improved the build system of the kernel in the 2.5 series</div><div class='del'>-significantly. Unfortunately, the traditional way of running the draft</div><div class='del'>-linking from architecture specific Makefile before the actual linking</div><div class='del'>-by generic Makefile is nearly impossible to support properly in the</div><div class='del'>-new build system. Therefore, the way we integrate BTFIXUP with the</div><div class='del'>-build system was changed in 2.5.40. Now, generic Makefile performs</div><div class='del'>-the draft linking and stores the result in file vmlinux. Architecture</div><div class='del'>-specific post-processing invokes BTFIXUP machinery and final linking</div><div class='del'>-in the same way as other architectures do bootstraps.</div><div class='del'>-</div><div class='del'>-Implications of that change are as follows.</div><div class='del'>-</div><div class='del'>-1. Hackers must type "make image" now, instead of just "make", in the same</div><div class='del'>-   way as s390 people do now. It is analogous to "make bzImage" on i386.</div><div class='del'>-   This does NOT affect sparc64, you continue to use "make" to build sparc64</div><div class='del'>-   kernels.</div><div class='del'>-</div><div class='del'>-2. vmlinux is not the final kernel, so RPM builders have to adjust</div><div class='del'>-   their spec files (if they delivered vmlinux for debugging).</div><div class='del'>-   System.map generated for vmlinux is still valid.</div><div class='del'>-</div><div class='del'>-3. Scripts that produce a.out images have to be changed. First, if they</div><div class='del'>-   invoke make, they have to use "make image". Second, they have to pick up</div><div class='del'>-   the new kernel in arch/sparc/boot/image instead of vmlinux.</div><div class='del'>-</div><div class='del'>-4. Since we are compliant with Kai's build system now, make -j is permitted.</div><div class='del'>-</div><div class='del'>--- Pete Zaitcev</div><div class='del'>-zaitcev@yahoo.com</div><div class='head'>diff --git a/Documentation/static-keys.txt b/Documentation/static-keys.txt<br/>index d93f3c00f245..9f5263d3152c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/static-keys.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/static-keys.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/static-keys.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/static-keys.txt</a></div><div class='hunk'>@@ -235,7 +235,7 @@ label case adds:</div><div class='ctx'> 6 (mov) + 2 (test) + 2 (jne) = 10 - 5 (5 byte jump 0) = 5 addition bytes.</div><div class='ctx'> </div><div class='ctx'> If we then include the padding bytes, the jump label code saves, 16 total bytes</div><div class='del'>-of instruction memory for this small fucntion. In this case the non-jump label</div><div class='add'>+of instruction memory for this small function. In this case the non-jump label</div><div class='ctx'> function is 80 bytes long. Thus, we have have saved 20% of the instruction</div><div class='ctx'> footprint. We can in fact improve this even further, since the 5-byte no-op</div><div class='ctx'> really can be a 2-byte no-op since we can reach the branch with a 2-byte jmp.</div><div class='head'>diff --git a/Documentation/sysctl/fs.txt b/Documentation/sysctl/fs.txt<br/>index 88fd7f5c8dcd..13d6166d7a27 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/sysctl/fs.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/sysctl/fs.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/sysctl/fs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/sysctl/fs.txt</a></div><div class='hunk'>@@ -225,6 +225,13 @@ a queue must be less or equal then msg_max.</div><div class='ctx'> maximum  message size value (it is every  message queue's attribute set during</div><div class='ctx'> its creation).</div><div class='ctx'> </div><div class='add'>+/proc/sys/fs/mqueue/msg_default is  a read/write  file for setting/getting the</div><div class='add'>+default number of messages in a queue value if attr parameter of mq_open(2) is</div><div class='add'>+NULL. If it exceed msg_max, the default value is initialized msg_max.</div><div class='add'>+</div><div class='add'>+/proc/sys/fs/mqueue/msgsize_default is a read/write file for setting/getting</div><div class='add'>+the default message size value if attr parameter of mq_open(2) is NULL. If it</div><div class='add'>+exceed msgsize_max, the default value is initialized msgsize_max.</div><div class='ctx'> </div><div class='ctx'> 4. /proc/sys/fs/epoll - Configuration options for the epoll interface</div><div class='ctx'> --------------------------------------------------------</div><div class='head'>diff --git a/Documentation/sysctl/net.txt b/Documentation/sysctl/net.txt<br/>index 3201a7097e4d..98335b7a5337 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/sysctl/net.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/sysctl/net.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/sysctl/net.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/sysctl/net.txt</a></div><div class='hunk'>@@ -43,6 +43,13 @@ Values :</div><div class='ctx'> 	1 - enable the JIT</div><div class='ctx'> 	2 - enable the JIT and ask the compiler to emit traces on kernel log.</div><div class='ctx'> </div><div class='add'>+dev_weight</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+The maximum number of packets that kernel can handle on a NAPI interrupt,</div><div class='add'>+it's a Per-CPU variable.</div><div class='add'>+Default: 64</div><div class='add'>+</div><div class='ctx'> rmem_default</div><div class='ctx'> ------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/trace/uprobetracer.txt b/Documentation/trace/uprobetracer.txt<br/>new file mode 100644<br/>index 000000000000..24ce6823a09e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/trace/uprobetracer.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/trace/uprobetracer.txt</a></div><div class='hunk'>@@ -0,0 +1,113 @@</div><div class='add'>+		Uprobe-tracer: Uprobe-based Event Tracing</div><div class='add'>+		=========================================</div><div class='add'>+                 Documentation written by Srikar Dronamraju</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+--------</div><div class='add'>+Uprobe based trace events are similar to kprobe based trace events.</div><div class='add'>+To enable this feature, build your kernel with CONFIG_UPROBE_EVENT=y.</div><div class='add'>+</div><div class='add'>+Similar to the kprobe-event tracer, this doesn't need to be activated via</div><div class='add'>+current_tracer. Instead of that, add probe points via</div><div class='add'>+/sys/kernel/debug/tracing/uprobe_events, and enable it via</div><div class='add'>+/sys/kernel/debug/tracing/events/uprobes/&lt;EVENT&gt;/enabled.</div><div class='add'>+</div><div class='add'>+However unlike kprobe-event tracer, the uprobe event interface expects the</div><div class='add'>+user to calculate the offset of the probepoint in the object</div><div class='add'>+</div><div class='add'>+Synopsis of uprobe_tracer</div><div class='add'>+-------------------------</div><div class='add'>+  p[:[GRP/]EVENT] PATH:SYMBOL[+offs] [FETCHARGS]	: Set a probe</div><div class='add'>+</div><div class='add'>+ GRP		: Group name. If omitted, use "uprobes" for it.</div><div class='add'>+ EVENT		: Event name. If omitted, the event name is generated</div><div class='add'>+		  based on SYMBOL+offs.</div><div class='add'>+ PATH		: path to an executable or a library.</div><div class='add'>+ SYMBOL[+offs]	: Symbol+offset where the probe is inserted.</div><div class='add'>+</div><div class='add'>+ FETCHARGS	: Arguments. Each probe can have up to 128 args.</div><div class='add'>+  %REG		: Fetch register REG</div><div class='add'>+</div><div class='add'>+Event Profiling</div><div class='add'>+---------------</div><div class='add'>+ You can check the total number of probe hits and probe miss-hits via</div><div class='add'>+/sys/kernel/debug/tracing/uprobe_profile.</div><div class='add'>+ The first column is event name, the second is the number of probe hits,</div><div class='add'>+the third is the number of probe miss-hits.</div><div class='add'>+</div><div class='add'>+Usage examples</div><div class='add'>+--------------</div><div class='add'>+To add a probe as a new event, write a new definition to uprobe_events</div><div class='add'>+as below.</div><div class='add'>+</div><div class='add'>+  echo 'p: /bin/bash:0x4245c0' &gt; /sys/kernel/debug/tracing/uprobe_events</div><div class='add'>+</div><div class='add'>+ This sets a uprobe at an offset of 0x4245c0 in the executable /bin/bash</div><div class='add'>+</div><div class='add'>+  echo &gt; /sys/kernel/debug/tracing/uprobe_events</div><div class='add'>+</div><div class='add'>+ This clears all probe points.</div><div class='add'>+</div><div class='add'>+The following example shows how to dump the instruction pointer and %ax</div><div class='add'>+a register at the probed text address.  Here we are trying to probe</div><div class='add'>+function zfree in /bin/zsh</div><div class='add'>+</div><div class='add'>+    # cd /sys/kernel/debug/tracing/</div><div class='add'>+    # cat /proc/`pgrep  zsh`/maps | grep /bin/zsh | grep r-xp</div><div class='add'>+    00400000-0048a000 r-xp 00000000 08:03 130904 /bin/zsh</div><div class='add'>+    # objdump -T /bin/zsh | grep -w zfree</div><div class='add'>+    0000000000446420 g    DF .text  0000000000000012  Base        zfree</div><div class='add'>+</div><div class='add'>+0x46420 is the offset of zfree in object /bin/zsh that is loaded at</div><div class='add'>+0x00400000. Hence the command to probe would be :</div><div class='add'>+</div><div class='add'>+    # echo 'p /bin/zsh:0x46420 %ip %ax' &gt; uprobe_events</div><div class='add'>+</div><div class='add'>+Please note: User has to explicitly calculate the offset of the probepoint</div><div class='add'>+in the object. We can see the events that are registered by looking at the</div><div class='add'>+uprobe_events file.</div><div class='add'>+</div><div class='add'>+    # cat uprobe_events</div><div class='add'>+    p:uprobes/p_zsh_0x46420 /bin/zsh:0x00046420 arg1=%ip arg2=%ax</div><div class='add'>+</div><div class='add'>+The format of events can be seen by viewing the file events/uprobes/p_zsh_0x46420/format</div><div class='add'>+</div><div class='add'>+    # cat events/uprobes/p_zsh_0x46420/format</div><div class='add'>+    name: p_zsh_0x46420</div><div class='add'>+    ID: 922</div><div class='add'>+    format:</div><div class='add'>+	field:unsigned short common_type;	offset:0;	size:2;	signed:0;</div><div class='add'>+	field:unsigned char common_flags;	offset:2;	size:1;	signed:0;</div><div class='add'>+	field:unsigned char common_preempt_count;	offset:3;	size:1;	signed:0;</div><div class='add'>+	field:int common_pid;	offset:4;	size:4;	signed:1;</div><div class='add'>+	field:int common_padding;	offset:8;	size:4;	signed:1;</div><div class='add'>+</div><div class='add'>+	field:unsigned long __probe_ip;	offset:12;	size:4;	signed:0;</div><div class='add'>+	field:u32 arg1;	offset:16;	size:4;	signed:0;</div><div class='add'>+	field:u32 arg2;	offset:20;	size:4;	signed:0;</div><div class='add'>+</div><div class='add'>+    print fmt: "(%lx) arg1=%lx arg2=%lx", REC-&gt;__probe_ip, REC-&gt;arg1, REC-&gt;arg2</div><div class='add'>+</div><div class='add'>+Right after definition, each event is disabled by default. For tracing these</div><div class='add'>+events, you need to enable it by:</div><div class='add'>+</div><div class='add'>+    # echo 1 &gt; events/uprobes/enable</div><div class='add'>+</div><div class='add'>+Lets disable the event after sleeping for some time.</div><div class='add'>+    # sleep 20</div><div class='add'>+    # echo 0 &gt; events/uprobes/enable</div><div class='add'>+</div><div class='add'>+And you can see the traced information via /sys/kernel/debug/tracing/trace.</div><div class='add'>+</div><div class='add'>+    # cat trace</div><div class='add'>+    # tracer: nop</div><div class='add'>+    #</div><div class='add'>+    #           TASK-PID    CPU#    TIMESTAMP  FUNCTION</div><div class='add'>+    #              | |       |          |         |</div><div class='add'>+                 zsh-24842 [006] 258544.995456: p_zsh_0x46420: (0x446420) arg1=446421 arg2=79</div><div class='add'>+                 zsh-24842 [007] 258545.000270: p_zsh_0x46420: (0x446420) arg1=446421 arg2=79</div><div class='add'>+                 zsh-24842 [002] 258545.043929: p_zsh_0x46420: (0x446420) arg1=446421 arg2=79</div><div class='add'>+                 zsh-24842 [004] 258547.046129: p_zsh_0x46420: (0x446420) arg1=446421 arg2=79</div><div class='add'>+</div><div class='add'>+Each line shows us probes were triggered for a pid 24842 with ip being</div><div class='add'>+0x446421 and contents of ax register being 79.</div><div class='head'>diff --git a/Documentation/usb/dwc3.txt b/Documentation/usb/dwc3.txt<br/>index 7b590edae145..1d02c01d1c7c 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/usb/dwc3.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/usb/dwc3.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/usb/dwc3.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/usb/dwc3.txt</a></div><div class='hunk'>@@ -28,7 +28,7 @@ Please pick something while reading :)</div><div class='ctx'>       none</div><div class='ctx'> </div><div class='ctx'>     - primary handler of the EP-interrupt</div><div class='del'>-      reads the event and tries to process it. Everything that requries</div><div class='add'>+      reads the event and tries to process it. Everything that requires</div><div class='ctx'>       sleeping is handed over to the Thread. The event is saved in an</div><div class='ctx'>       per-endpoint data-structure.</div><div class='ctx'>       We probably have to pay attention not to process events once we</div><div class='head'>diff --git a/Documentation/usb/functionfs.txt b/Documentation/usb/functionfs.txt<br/>new file mode 100644<br/>index 000000000000..eaaaea019fc7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/usb/functionfs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/usb/functionfs.txt</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+*How FunctionFS works*</div><div class='add'>+</div><div class='add'>+From kernel point of view it is just a composite function with some</div><div class='add'>+unique behaviour.  It may be added to an USB configuration only after</div><div class='add'>+the user space driver has registered by writing descriptors and</div><div class='add'>+strings (the user space program has to provide the same information</div><div class='add'>+that kernel level composite functions provide when they are added to</div><div class='add'>+the configuration).</div><div class='add'>+</div><div class='add'>+This in particular means that the composite initialisation functions</div><div class='add'>+may not be in init section (ie. may not use the __init tag).</div><div class='add'>+</div><div class='add'>+From user space point of view it is a file system which when</div><div class='add'>+mounted provides an "ep0" file.  User space driver need to</div><div class='add'>+write descriptors and strings to that file.  It does not need</div><div class='add'>+to worry about endpoints, interfaces or strings numbers but</div><div class='add'>+simply provide descriptors such as if the function was the</div><div class='add'>+only one (endpoints and strings numbers starting from one and</div><div class='add'>+interface numbers starting from zero).  The FunctionFS changes</div><div class='add'>+them as needed also handling situation when numbers differ in</div><div class='add'>+different configurations.</div><div class='add'>+</div><div class='add'>+When descriptors and strings are written "ep#" files appear</div><div class='add'>+(one for each declared endpoint) which handle communication on</div><div class='add'>+a single endpoint.  Again, FunctionFS takes care of the real</div><div class='add'>+numbers and changing of the configuration (which means that</div><div class='add'>+"ep1" file may be really mapped to (say) endpoint 3 (and when</div><div class='add'>+configuration changes to (say) endpoint 2)).  "ep0" is used</div><div class='add'>+for receiving events and handling setup requests.</div><div class='add'>+</div><div class='add'>+When all files are closed the function disables itself.</div><div class='add'>+</div><div class='add'>+What I also want to mention is that the FunctionFS is designed in such</div><div class='add'>+a way that it is possible to mount it several times so in the end</div><div class='add'>+a gadget could use several FunctionFS functions. The idea is that</div><div class='add'>+each FunctionFS instance is identified by the device name used</div><div class='add'>+when mounting.</div><div class='add'>+</div><div class='add'>+One can imagine a gadget that has an Ethernet, MTP and HID interfaces</div><div class='add'>+where the last two are implemented via FunctionFS.  On user space</div><div class='add'>+level it would look like this:</div><div class='add'>+</div><div class='add'>+$ insmod g_ffs.ko idVendor=&lt;ID&gt; iSerialNumber=&lt;string&gt; functions=mtp,hid</div><div class='add'>+$ mkdir /dev/ffs-mtp &amp;&amp; mount -t functionfs mtp /dev/ffs-mtp</div><div class='add'>+$ ( cd /dev/ffs-mtp &amp;&amp; mtp-daemon ) &amp;</div><div class='add'>+$ mkdir /dev/ffs-hid &amp;&amp; mount -t functionfs hid /dev/ffs-hid</div><div class='add'>+$ ( cd /dev/ffs-hid &amp;&amp; hid-daemon ) &amp;</div><div class='add'>+</div><div class='add'>+On kernel level the gadget checks ffs_data-&gt;dev_name to identify</div><div class='add'>+whether it's FunctionFS designed for MTP ("mtp") or HID ("hid").</div><div class='add'>+</div><div class='add'>+If no "functions" module parameters is supplied, the driver accepts</div><div class='add'>+just one function with any name.</div><div class='add'>+</div><div class='add'>+When "functions" module parameter is supplied, only functions</div><div class='add'>+with listed names are accepted. In particular, if the "functions"</div><div class='add'>+parameter's value is just a one-element list, then the behaviour</div><div class='add'>+is similar to when there is no "functions" at all; however,</div><div class='add'>+only a function with the specified name is accepted.</div><div class='add'>+</div><div class='add'>+The gadget is registered only after all the declared function</div><div class='add'>+filesystems have been mounted and USB descriptors of all functions</div><div class='add'>+have been written to their ep0's.</div><div class='add'>+</div><div class='add'>+Conversely, the gadget is unregistered after the first USB function</div><div class='add'>+closes its endpoints.</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/usb/wusb-cbaf b/Documentation/usb/wusb-cbaf<br/>index 426ddaaef96f..8b3d43efce90 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/usb/wusb-cbaf?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/usb/wusb-cbaf</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/usb/wusb-cbaf?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/usb/wusb-cbaf</a></div><div class='hunk'>@@ -36,7 +36,7 @@ COMMAND/ARGS are</div><div class='ctx'> </div><div class='ctx'>  get-cdid DEVICE</div><div class='ctx'> </div><div class='del'>-   Get the device ID associated to the HOST-CHDI we sent with</div><div class='add'>+   Get the device ID associated to the HOST-CHID we sent with</div><div class='ctx'>    'set-chid'. We might not know about it.</div><div class='ctx'> </div><div class='ctx'>  set-cc DEVICE</div><div class='head'>diff --git a/Documentation/video4linux/4CCs.txt b/Documentation/video4linux/4CCs.txt<br/>new file mode 100644<br/>index 000000000000..41241af1ebfe<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/video4linux/4CCs.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/video4linux/4CCs.txt</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+Guidelines for Linux4Linux pixel format 4CCs</div><div class='add'>+============================================</div><div class='add'>+</div><div class='add'>+Guidelines for Video4Linux 4CC codes defined using v4l2_fourcc() are</div><div class='add'>+specified in this document. First of the characters defines the nature of</div><div class='add'>+the pixel format, compression and colour space. The interpretation of the</div><div class='add'>+other three characters depends on the first one.</div><div class='add'>+</div><div class='add'>+Existing 4CCs may not obey these guidelines.</div><div class='add'>+</div><div class='add'>+Formats</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+Raw bayer</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+The following first characters are used by raw bayer formats:</div><div class='add'>+</div><div class='add'>+	B: raw bayer, uncompressed</div><div class='add'>+	b: raw bayer, DPCM compressed</div><div class='add'>+	a: A-law compressed</div><div class='add'>+	u: u-law compressed</div><div class='add'>+</div><div class='add'>+2nd character: pixel order</div><div class='add'>+	B: BGGR</div><div class='add'>+	G: GBRG</div><div class='add'>+	g: GRBG</div><div class='add'>+	R: RGGB</div><div class='add'>+</div><div class='add'>+3rd character: uncompressed bits-per-pixel 0--9, A--</div><div class='add'>+</div><div class='add'>+4th character: compressed bits-per-pixel 0--9, A--</div><div class='head'>diff --git a/Documentation/video4linux/README.cpia2 b/Documentation/video4linux/README.cpia2<br/>index ce8213d28b67..38e742fd0df7 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/video4linux/README.cpia2?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/video4linux/README.cpia2</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/video4linux/README.cpia2?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/video4linux/README.cpia2</a></div><div class='hunk'>@@ -12,7 +12,7 @@ gqcam application to view this stream.</div><div class='ctx'> 	The driver is implemented as two kernel modules. The cpia2 module</div><div class='ctx'> contains the camera functions and the V4L interface.  The cpia2_usb module</div><div class='ctx'> contains usb specific functions.  The main reason for this was the size of the</div><div class='del'>-module was getting out of hand, so I separted them.  It is not likely that</div><div class='add'>+module was getting out of hand, so I separated them.  It is not likely that</div><div class='ctx'> there will be a parallel port version.</div><div class='ctx'> </div><div class='ctx'> FEATURES:</div><div class='head'>diff --git a/Documentation/video4linux/gspca.txt b/Documentation/video4linux/gspca.txt<br/>index e6c2842407a4..1e6b6531bbcc 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/video4linux/gspca.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/video4linux/gspca.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/video4linux/gspca.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/video4linux/gspca.txt</a></div><div class='hunk'>@@ -276,6 +276,7 @@ pac7302		093a:2622	Genius Eye 312</div><div class='ctx'> pac7302		093a:2624	PAC7302</div><div class='ctx'> pac7302		093a:2625	Genius iSlim 310</div><div class='ctx'> pac7302		093a:2626	Labtec 2200</div><div class='add'>+pac7302		093a:2627	Genius FaceCam 300</div><div class='ctx'> pac7302		093a:2628	Genius iLook 300</div><div class='ctx'> pac7302		093a:2629	Genious iSlim 300</div><div class='ctx'> pac7302		093a:262a	Webcam 300k</div><div class='head'>diff --git a/Documentation/video4linux/v4l2-controls.txt b/Documentation/video4linux/v4l2-controls.txt<br/>index e2492a9d1027..43da22b89728 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/video4linux/v4l2-controls.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/video4linux/v4l2-controls.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/video4linux/v4l2-controls.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/video4linux/v4l2-controls.txt</a></div><div class='hunk'>@@ -130,8 +130,18 @@ Menu controls are added by calling v4l2_ctrl_new_std_menu:</div><div class='ctx'> 			const struct v4l2_ctrl_ops *ops,</div><div class='ctx'> 			u32 id, s32 max, s32 skip_mask, s32 def);</div><div class='ctx'> </div><div class='add'>+Or alternatively for integer menu controls, by calling v4l2_ctrl_new_int_menu:</div><div class='add'>+</div><div class='add'>+	struct v4l2_ctrl *v4l2_ctrl_new_int_menu(struct v4l2_ctrl_handler *hdl,</div><div class='add'>+			const struct v4l2_ctrl_ops *ops,</div><div class='add'>+			u32 id, s32 max, s32 def, const s64 *qmenu_int);</div><div class='add'>+</div><div class='ctx'> These functions are typically called right after the v4l2_ctrl_handler_init:</div><div class='ctx'> </div><div class='add'>+	static const s64 exp_bias_qmenu[] = {</div><div class='add'>+	       -2, -1, 0, 1, 2</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	v4l2_ctrl_handler_init(&amp;foo-&gt;ctrl_handler, nr_of_controls);</div><div class='ctx'> 	v4l2_ctrl_new_std(&amp;foo-&gt;ctrl_handler, &amp;foo_ctrl_ops,</div><div class='ctx'> 			V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);</div><div class='hunk'>@@ -141,6 +151,11 @@ These functions are typically called right after the v4l2_ctrl_handler_init:</div><div class='ctx'> 			V4L2_CID_POWER_LINE_FREQUENCY,</div><div class='ctx'> 			V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0,</div><div class='ctx'> 			V4L2_CID_POWER_LINE_FREQUENCY_DISABLED);</div><div class='add'>+	v4l2_ctrl_new_int_menu(&amp;foo-&gt;ctrl_handler, &amp;foo_ctrl_ops,</div><div class='add'>+			V4L2_CID_EXPOSURE_BIAS,</div><div class='add'>+			ARRAY_SIZE(exp_bias_qmenu) - 1,</div><div class='add'>+			ARRAY_SIZE(exp_bias_qmenu) / 2 - 1,</div><div class='add'>+			exp_bias_qmenu);</div><div class='ctx'> 	...</div><div class='ctx'> 	if (foo-&gt;ctrl_handler.error) {</div><div class='ctx'> 		int err = foo-&gt;ctrl_handler.error;</div><div class='hunk'>@@ -164,6 +179,12 @@ controls. There is no min argument since that is always 0 for menu controls,</div><div class='ctx'> and instead of a step there is a skip_mask argument: if bit X is 1, then menu</div><div class='ctx'> item X is skipped.</div><div class='ctx'> </div><div class='add'>+The v4l2_ctrl_new_int_menu function creates a new standard integer menu</div><div class='add'>+control with driver-specific items in the menu. It differs from</div><div class='add'>+v4l2_ctrl_new_std_menu in that it doesn't have the mask argument and takes</div><div class='add'>+as the last argument an array of signed 64-bit integers that form an exact</div><div class='add'>+menu item list.</div><div class='add'>+</div><div class='ctx'> Note that if something fails, the function will return NULL or an error and</div><div class='ctx'> set ctrl_handler-&gt;error to the error code. If ctrl_handler-&gt;error was already</div><div class='ctx'> set, then it will just return and do nothing. This is also true for</div><div class='head'>diff --git a/Documentation/video4linux/v4l2-framework.txt b/Documentation/video4linux/v4l2-framework.txt<br/>index 659b2ba12a4f..1f5905270050 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/video4linux/v4l2-framework.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/video4linux/v4l2-framework.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/video4linux/v4l2-framework.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/video4linux/v4l2-framework.txt</a></div><div class='hunk'>@@ -182,11 +182,11 @@ static int __devinit drv_probe(struct pci_dev *pdev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> If you have multiple device nodes then it can be difficult to know when it is</div><div class='del'>-safe to unregister v4l2_device. For this purpose v4l2_device has refcounting</div><div class='del'>-support. The refcount is increased whenever video_register_device is called and</div><div class='del'>-it is decreased whenever that device node is released. When the refcount reaches</div><div class='del'>-zero, then the v4l2_device release() callback is called. You can do your final</div><div class='del'>-cleanup there.</div><div class='add'>+safe to unregister v4l2_device for hotpluggable devices. For this purpose</div><div class='add'>+v4l2_device has refcounting support. The refcount is increased whenever</div><div class='add'>+video_register_device is called and it is decreased whenever that device node</div><div class='add'>+is released. When the refcount reaches zero, then the v4l2_device release()</div><div class='add'>+callback is called. You can do your final cleanup there.</div><div class='ctx'> </div><div class='ctx'> If other device nodes (e.g. ALSA) are created, then you can increase and</div><div class='ctx'> decrease the refcount manually as well by calling:</div><div class='hunk'>@@ -197,6 +197,10 @@ or:</div><div class='ctx'> </div><div class='ctx'> int v4l2_device_put(struct v4l2_device *v4l2_dev);</div><div class='ctx'> </div><div class='add'>+Since the initial refcount is 1 you also need to call v4l2_device_put in the</div><div class='add'>+disconnect() callback (for USB devices) or in the remove() callback (for e.g.</div><div class='add'>+PCI devices), otherwise the refcount will never reach 0.</div><div class='add'>+</div><div class='ctx'> struct v4l2_subdev</div><div class='ctx'> ------------------</div><div class='ctx'> </div><div class='hunk'>@@ -262,11 +266,16 @@ struct v4l2_subdev_video_ops {</div><div class='ctx'> 	...</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct v4l2_subdev_pad_ops {</div><div class='add'>+	...</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct v4l2_subdev_ops {</div><div class='ctx'> 	const struct v4l2_subdev_core_ops  *core;</div><div class='ctx'> 	const struct v4l2_subdev_tuner_ops *tuner;</div><div class='ctx'> 	const struct v4l2_subdev_audio_ops *audio;</div><div class='ctx'> 	const struct v4l2_subdev_video_ops *video;</div><div class='add'>+	const struct v4l2_subdev_pad_ops *video;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> The core ops are common to all subdevs, the other categories are implemented</div><div class='hunk'>@@ -303,6 +312,22 @@ Don't forget to cleanup the media entity before the sub-device is destroyed:</div><div class='ctx'> </div><div class='ctx'> 	media_entity_cleanup(&amp;sd-&gt;entity);</div><div class='ctx'> </div><div class='add'>+If the subdev driver intends to process video and integrate with the media</div><div class='add'>+framework, it must implement format related functionality using</div><div class='add'>+v4l2_subdev_pad_ops instead of v4l2_subdev_video_ops.</div><div class='add'>+</div><div class='add'>+In that case, the subdev driver may set the link_validate field to provide</div><div class='add'>+its own link validation function. The link validation function is called for</div><div class='add'>+every link in the pipeline where both of the ends of the links are V4L2</div><div class='add'>+sub-devices. The driver is still responsible for validating the correctness</div><div class='add'>+of the format configuration between sub-devices and video nodes.</div><div class='add'>+</div><div class='add'>+If link_validate op is not set, the default function</div><div class='add'>+v4l2_subdev_link_validate_default() is used instead. This function ensures</div><div class='add'>+that width, height and the media bus pixel code are equal on both source and</div><div class='add'>+sink of the link. Subdev drivers are also free to use this function to</div><div class='add'>+perform the checks mentioned above in addition to their own checks.</div><div class='add'>+</div><div class='ctx'> A device (bridge) driver needs to register the v4l2_subdev with the</div><div class='ctx'> v4l2_device:</div><div class='ctx'> </div><div class='hunk'>@@ -555,19 +580,25 @@ allocated memory.</div><div class='ctx'> You should also set these fields:</div><div class='ctx'> </div><div class='ctx'> - v4l2_dev: set to the v4l2_device parent device.</div><div class='add'>+</div><div class='ctx'> - name: set to something descriptive and unique.</div><div class='add'>+</div><div class='ctx'> - fops: set to the v4l2_file_operations struct.</div><div class='add'>+</div><div class='ctx'> - ioctl_ops: if you use the v4l2_ioctl_ops to simplify ioctl maintenance</div><div class='ctx'>   (highly recommended to use this and it might become compulsory in the</div><div class='ctx'>   future!), then set this to your v4l2_ioctl_ops struct.</div><div class='add'>+</div><div class='ctx'> - lock: leave to NULL if you want to do all the locking in the driver.</div><div class='del'>-  Otherwise you give it a pointer to a struct mutex_lock and before any</div><div class='del'>-  of the v4l2_file_operations is called this lock will be taken by the</div><div class='del'>-  core and released afterwards.</div><div class='add'>+  Otherwise you give it a pointer to a struct mutex_lock and before the</div><div class='add'>+  unlocked_ioctl file operation is called this lock will be taken by the</div><div class='add'>+  core and released afterwards. See the next section for more details.</div><div class='add'>+</div><div class='ctx'> - prio: keeps track of the priorities. Used to implement VIDIOC_G/S_PRIORITY.</div><div class='ctx'>   If left to NULL, then it will use the struct v4l2_prio_state in v4l2_device.</div><div class='ctx'>   If you want to have a separate priority state per (group of) device node(s),</div><div class='ctx'>   then you can point it to your own struct v4l2_prio_state.</div><div class='add'>+</div><div class='ctx'> - parent: you only set this if v4l2_device was registered with NULL as</div><div class='ctx'>   the parent device struct. This only happens in cases where one hardware</div><div class='ctx'>   device has multiple PCI devices that all share the same v4l2_device core.</div><div class='hunk'>@@ -577,6 +608,7 @@ You should also set these fields:</div><div class='ctx'>   (cx8802). Since the v4l2_device cannot be associated with a particular</div><div class='ctx'>   PCI device it is setup without a parent device. But when the struct</div><div class='ctx'>   video_device is setup you do know which parent PCI device to use.</div><div class='add'>+</div><div class='ctx'> - flags: optional. Set to V4L2_FL_USE_FH_PRIO if you want to let the framework</div><div class='ctx'>   handle the VIDIOC_G/S_PRIORITY ioctls. This requires that you use struct</div><div class='ctx'>   v4l2_fh. Eventually this flag will disappear once all drivers use the core</div><div class='hunk'>@@ -587,6 +619,16 @@ in your v4l2_file_operations struct.</div><div class='ctx'> </div><div class='ctx'> Do not use .ioctl! This is deprecated and will go away in the future.</div><div class='ctx'> </div><div class='add'>+In some cases you want to tell the core that a function you had specified in</div><div class='add'>+your v4l2_ioctl_ops should be ignored. You can mark such ioctls by calling this</div><div class='add'>+function before video_device_register is called:</div><div class='add'>+</div><div class='add'>+void v4l2_disable_ioctl(struct video_device *vdev, unsigned int cmd);</div><div class='add'>+</div><div class='add'>+This tends to be needed if based on external factors (e.g. which card is</div><div class='add'>+being used) you want to turns off certain features in v4l2_ioctl_ops without</div><div class='add'>+having to make a new struct.</div><div class='add'>+</div><div class='ctx'> The v4l2_file_operations struct is a subset of file_operations. The main</div><div class='ctx'> difference is that the inode argument is omitted since it is never used.</div><div class='ctx'> </div><div class='hunk'>@@ -609,8 +651,22 @@ v4l2_file_operations and locking</div><div class='ctx'> --------------------------------</div><div class='ctx'> </div><div class='ctx'> You can set a pointer to a mutex_lock in struct video_device. Usually this</div><div class='del'>-will be either a top-level mutex or a mutex per device node. If you want</div><div class='del'>-finer-grained locking then you have to set it to NULL and do you own locking.</div><div class='add'>+will be either a top-level mutex or a mutex per device node. By default this</div><div class='add'>+lock will be used for unlocked_ioctl, but you can disable locking for</div><div class='add'>+selected ioctls by calling:</div><div class='add'>+</div><div class='add'>+	void v4l2_disable_ioctl_locking(struct video_device *vdev, unsigned int cmd);</div><div class='add'>+</div><div class='add'>+E.g.: v4l2_disable_ioctl_locking(vdev, VIDIOC_DQBUF);</div><div class='add'>+</div><div class='add'>+You have to call this before you register the video_device.</div><div class='add'>+</div><div class='add'>+Particularly with USB drivers where certain commands such as setting controls</div><div class='add'>+can take a long time you may want to do your own locking for the buffer queuing</div><div class='add'>+ioctls.</div><div class='add'>+</div><div class='add'>+If you want still finer-grained locking then you have to set mutex_lock to NULL</div><div class='add'>+and do you own locking completely.</div><div class='ctx'> </div><div class='ctx'> It is up to the driver developer to decide which method to use. However, if</div><div class='ctx'> your driver has high-latency operations (for example, changing the exposure</div><div class='hunk'>@@ -618,7 +674,7 @@ of a USB webcam might take a long time), then you might be better off with</div><div class='ctx'> doing your own locking if you want to allow the user to do other things with</div><div class='ctx'> the device while waiting for the high-latency command to finish.</div><div class='ctx'> </div><div class='del'>-If a lock is specified then all file operations will be serialized on that</div><div class='add'>+If a lock is specified then all ioctl commands will be serialized on that</div><div class='ctx'> lock. If you use videobuf then you must pass the same lock to the videobuf</div><div class='ctx'> queue initialize function: if videobuf has to wait for a frame to arrive, then</div><div class='ctx'> it will temporarily unlock the lock and relock it afterwards. If your driver</div><div class='hunk'>@@ -941,21 +997,35 @@ fast.</div><div class='ctx'> </div><div class='ctx'> Useful functions:</div><div class='ctx'> </div><div class='del'>-- v4l2_event_queue()</div><div class='add'>+void v4l2_event_queue(struct video_device *vdev, const struct v4l2_event *ev)</div><div class='ctx'> </div><div class='ctx'>   Queue events to video device. The driver's only responsibility is to fill</div><div class='ctx'>   in the type and the data fields. The other fields will be filled in by</div><div class='ctx'>   V4L2.</div><div class='ctx'> </div><div class='del'>-- v4l2_event_subscribe()</div><div class='add'>+int v4l2_event_subscribe(struct v4l2_fh *fh,</div><div class='add'>+			 struct v4l2_event_subscription *sub, unsigned elems,</div><div class='add'>+			 const struct v4l2_subscribed_event_ops *ops)</div><div class='ctx'> </div><div class='ctx'>   The video_device-&gt;ioctl_ops-&gt;vidioc_subscribe_event must check the driver</div><div class='ctx'>   is able to produce events with specified event id. Then it calls</div><div class='del'>-  v4l2_event_subscribe() to subscribe the event. The last argument is the</div><div class='del'>-  size of the event queue for this event. If it is 0, then the framework</div><div class='del'>-  will fill in a default value (this depends on the event type).</div><div class='add'>+  v4l2_event_subscribe() to subscribe the event.</div><div class='add'>+</div><div class='add'>+  The elems argument is the size of the event queue for this event. If it is 0,</div><div class='add'>+  then the framework will fill in a default value (this depends on the event</div><div class='add'>+  type).</div><div class='add'>+</div><div class='add'>+  The ops argument allows the driver to specify a number of callbacks:</div><div class='add'>+  * add:     called when a new listener gets added (subscribing to the same</div><div class='add'>+             event twice will only cause this callback to get called once)</div><div class='add'>+  * del:     called when a listener stops listening</div><div class='add'>+  * replace: replace event 'old' with event 'new'.</div><div class='add'>+  * merge:   merge event 'old' into event 'new'.</div><div class='add'>+  All 4 callbacks are optional, if you don't want to specify any callbacks</div><div class='add'>+  the ops argument itself maybe NULL.</div><div class='ctx'> </div><div class='del'>-- v4l2_event_unsubscribe()</div><div class='add'>+int v4l2_event_unsubscribe(struct v4l2_fh *fh,</div><div class='add'>+			   struct v4l2_event_subscription *sub)</div><div class='ctx'> </div><div class='ctx'>   vidioc_unsubscribe_event in struct v4l2_ioctl_ops. A driver may use</div><div class='ctx'>   v4l2_event_unsubscribe() directly unless it wants to be involved in</div><div class='hunk'>@@ -964,7 +1034,7 @@ Useful functions:</div><div class='ctx'>   The special type V4L2_EVENT_ALL may be used to unsubscribe all events. The</div><div class='ctx'>   drivers may want to handle this in a special way.</div><div class='ctx'> </div><div class='del'>-- v4l2_event_pending()</div><div class='add'>+int v4l2_event_pending(struct v4l2_fh *fh)</div><div class='ctx'> </div><div class='ctx'>   Returns the number of pending events. Useful when implementing poll.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt<br/>index 6386f8c0482e..930126698a0f 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/virtual/kvm/api.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/virtual/kvm/api.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/virtual/kvm/api.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/virtual/kvm/api.txt</a></div><div class='hunk'>@@ -2,6 +2,7 @@ The Definitive KVM (Kernel-based Virtual Machine) API Documentation</div><div class='ctx'> ===================================================================</div><div class='ctx'> </div><div class='ctx'> 1. General description</div><div class='add'>+----------------------</div><div class='ctx'> </div><div class='ctx'> The kvm API is a set of ioctls that are issued to control various aspects</div><div class='ctx'> of a virtual machine.  The ioctls belong to three classes</div><div class='hunk'>@@ -23,7 +24,9 @@ of a virtual machine.  The ioctls belong to three classes</div><div class='ctx'>    Only run vcpu ioctls from the same thread that was used to create the</div><div class='ctx'>    vcpu.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 2. File descriptors</div><div class='add'>+-------------------</div><div class='ctx'> </div><div class='ctx'> The kvm API is centered around file descriptors.  An initial</div><div class='ctx'> open("/dev/kvm") obtains a handle to the kvm subsystem; this handle</div><div class='hunk'>@@ -41,7 +44,9 @@ not cause harm to the host, their actual behavior is not guaranteed by</div><div class='ctx'> the API.  The only supported use is one virtual machine per process,</div><div class='ctx'> and one vcpu per thread.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 3. Extensions</div><div class='add'>+-------------</div><div class='ctx'> </div><div class='ctx'> As of Linux 2.6.22, the KVM ABI has been stabilized: no backward</div><div class='ctx'> incompatible change are allowed.  However, there is an extension</div><div class='hunk'>@@ -53,7 +58,9 @@ Instead, kvm defines extension identifiers and a facility to query</div><div class='ctx'> whether a particular extension identifier is available.  If it is, a</div><div class='ctx'> set of ioctls is available for application use.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4. API description</div><div class='add'>+------------------</div><div class='ctx'> </div><div class='ctx'> This section describes ioctls that can be used to control kvm guests.</div><div class='ctx'> For each ioctl, the following information is provided along with a</div><div class='hunk'>@@ -75,6 +82,7 @@ description:</div><div class='ctx'>   Returns: the return value.  General error numbers (EBADF, ENOMEM, EINVAL)</div><div class='ctx'>       are not detailed, but errors with specific meanings are.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.1 KVM_GET_API_VERSION</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -90,6 +98,7 @@ supported.  Applications should refuse to run if KVM_GET_API_VERSION</div><div class='ctx'> returns a value other than 12.  If this check passes, all ioctls</div><div class='ctx'> described as 'basic' will be available.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.2 KVM_CREATE_VM</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -109,6 +118,7 @@ In order to create user controlled virtual machines on S390, check</div><div class='ctx'> KVM_CAP_S390_UCONTROL and use the flag KVM_VM_S390_UCONTROL as</div><div class='ctx'> privileged user (CAP_SYS_ADMIN).</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.3 KVM_GET_MSR_INDEX_LIST</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -135,6 +145,7 @@ Note: if kvm indicates supports MCE (KVM_CAP_MCE), then the MCE bank MSRs are</div><div class='ctx'> not returned in the MSR list, as different vcpus can have a different number</div><div class='ctx'> of banks, as set via the KVM_X86_SETUP_MCE ioctl.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.4 KVM_CHECK_EXTENSION</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -149,6 +160,7 @@ receives an integer that describes the extension availability.</div><div class='ctx'> Generally 0 means no and 1 means yes, but some extensions may report</div><div class='ctx'> additional information in the integer return value.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.5 KVM_GET_VCPU_MMAP_SIZE</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -161,6 +173,7 @@ The KVM_RUN ioctl (cf.) communicates with userspace via a shared</div><div class='ctx'> memory region.  This ioctl returns the size of that region.  See the</div><div class='ctx'> KVM_RUN documentation for details.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.6 KVM_SET_MEMORY_REGION</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -171,6 +184,7 @@ Returns: 0 on success, -1 on error</div><div class='ctx'> </div><div class='ctx'> This ioctl is obsolete and has been removed.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.7 KVM_CREATE_VCPU</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -223,6 +237,7 @@ machines, the resulting vcpu fd can be memory mapped at page offset</div><div class='ctx'> KVM_S390_SIE_PAGE_OFFSET in order to obtain a memory map of the virtual</div><div class='ctx'> cpu's hardware control block.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.8 KVM_GET_DIRTY_LOG (vm ioctl)</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -246,6 +261,7 @@ since the last call to this ioctl.  Bit 0 is the first page in the</div><div class='ctx'> memory slot.  Ensure the entire structure is cleared to avoid padding</div><div class='ctx'> issues.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.9 KVM_SET_MEMORY_ALIAS</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -256,6 +272,7 @@ Returns: 0 (success), -1 (error)</div><div class='ctx'> </div><div class='ctx'> This ioctl is obsolete and has been removed.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.10 KVM_RUN</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -272,6 +289,7 @@ obtained by mmap()ing the vcpu fd at offset 0, with the size given by</div><div class='ctx'> KVM_GET_VCPU_MMAP_SIZE.  The parameter block is formatted as a 'struct</div><div class='ctx'> kvm_run' (see below).</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.11 KVM_GET_REGS</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -292,6 +310,7 @@ struct kvm_regs {</div><div class='ctx'> 	__u64 rip, rflags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.12 KVM_SET_REGS</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -304,6 +323,7 @@ Writes the general purpose registers into the vcpu.</div><div class='ctx'> </div><div class='ctx'> See KVM_GET_REGS for the data structure.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.13 KVM_GET_SREGS</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -331,6 +351,7 @@ interrupt_bitmap is a bitmap of pending external interrupts.  At most</div><div class='ctx'> one bit may be set.  This interrupt has been acknowledged by the APIC</div><div class='ctx'> but not yet injected into the cpu core.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.14 KVM_SET_SREGS</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -342,6 +363,7 @@ Returns: 0 on success, -1 on error</div><div class='ctx'> Writes special registers into the vcpu.  See KVM_GET_SREGS for the</div><div class='ctx'> data structures.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.15 KVM_TRANSLATE</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -365,6 +387,7 @@ struct kvm_translation {</div><div class='ctx'> 	__u8  pad[5];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.16 KVM_INTERRUPT</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -413,6 +436,7 @@ c) KVM_INTERRUPT_SET_LEVEL</div><div class='ctx'> Note that any value for 'irq' other than the ones stated above is invalid</div><div class='ctx'> and incurs unexpected behavior.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.17 KVM_DEBUG_GUEST</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -423,6 +447,7 @@ Returns: -1 on error</div><div class='ctx'> </div><div class='ctx'> Support for this has been removed.  Use KVM_SET_GUEST_DEBUG instead.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.18 KVM_GET_MSRS</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -451,6 +476,7 @@ Application code should set the 'nmsrs' member (which indicates the</div><div class='ctx'> size of the entries array) and the 'index' member of each array entry.</div><div class='ctx'> kvm will fill in the 'data' member.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.19 KVM_SET_MSRS</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -466,6 +492,7 @@ Application code should set the 'nmsrs' member (which indicates the</div><div class='ctx'> size of the entries array), and the 'index' and 'data' members of each</div><div class='ctx'> array entry.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.20 KVM_SET_CPUID</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -494,6 +521,7 @@ struct kvm_cpuid {</div><div class='ctx'> 	struct kvm_cpuid_entry entries[0];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.21 KVM_SET_SIGNAL_MASK</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -516,6 +544,7 @@ struct kvm_signal_mask {</div><div class='ctx'> 	__u8  sigset[0];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.22 KVM_GET_FPU</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -541,6 +570,7 @@ struct kvm_fpu {</div><div class='ctx'> 	__u32 pad2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.23 KVM_SET_FPU</div><div class='ctx'> </div><div class='ctx'> Capability: basic</div><div class='hunk'>@@ -566,6 +596,7 @@ struct kvm_fpu {</div><div class='ctx'> 	__u32 pad2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.24 KVM_CREATE_IRQCHIP</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_IRQCHIP</div><div class='hunk'>@@ -579,6 +610,7 @@ ioapic, a virtual PIC (two PICs, nested), and sets up future vcpus to have a</div><div class='ctx'> local APIC.  IRQ routing for GSIs 0-15 is set to both PIC and IOAPIC; GSI 16-23</div><div class='ctx'> only go to the IOAPIC.  On ia64, a IOSAPIC is created.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.25 KVM_IRQ_LINE</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_IRQCHIP</div><div class='hunk'>@@ -600,6 +632,7 @@ struct kvm_irq_level {</div><div class='ctx'> 	__u32 level;           /* 0 or 1 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.26 KVM_GET_IRQCHIP</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_IRQCHIP</div><div class='hunk'>@@ -621,6 +654,7 @@ struct kvm_irqchip {</div><div class='ctx'> 	} chip;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.27 KVM_SET_IRQCHIP</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_IRQCHIP</div><div class='hunk'>@@ -642,6 +676,7 @@ struct kvm_irqchip {</div><div class='ctx'> 	} chip;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.28 KVM_XEN_HVM_CONFIG</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_XEN_HVM</div><div class='hunk'>@@ -666,6 +701,7 @@ struct kvm_xen_hvm_config {</div><div class='ctx'> 	__u8 pad2[30];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.29 KVM_GET_CLOCK</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_ADJUST_CLOCK</div><div class='hunk'>@@ -684,6 +720,7 @@ struct kvm_clock_data {</div><div class='ctx'> 	__u32 pad[9];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.30 KVM_SET_CLOCK</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_ADJUST_CLOCK</div><div class='hunk'>@@ -702,6 +739,7 @@ struct kvm_clock_data {</div><div class='ctx'> 	__u32 pad[9];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.31 KVM_GET_VCPU_EVENTS</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_VCPU_EVENTS</div><div class='hunk'>@@ -741,6 +779,7 @@ struct kvm_vcpu_events {</div><div class='ctx'> KVM_VCPUEVENT_VALID_SHADOW may be set in the flags field to signal that</div><div class='ctx'> interrupt.shadow contains a valid state. Otherwise, this field is undefined.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.32 KVM_SET_VCPU_EVENTS</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_VCPU_EVENTS</div><div class='hunk'>@@ -767,6 +806,7 @@ If KVM_CAP_INTR_SHADOW is available, KVM_VCPUEVENT_VALID_SHADOW can be set in</div><div class='ctx'> the flags field to signal that interrupt.shadow contains a valid state and</div><div class='ctx'> shall be written into the VCPU.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.33 KVM_GET_DEBUGREGS</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_DEBUGREGS</div><div class='hunk'>@@ -785,6 +825,7 @@ struct kvm_debugregs {</div><div class='ctx'> 	__u64 reserved[9];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.34 KVM_SET_DEBUGREGS</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_DEBUGREGS</div><div class='hunk'>@@ -798,6 +839,7 @@ Writes debug registers into the vcpu.</div><div class='ctx'> See KVM_GET_DEBUGREGS for the data structure. The flags field is unused</div><div class='ctx'> yet and must be cleared on entry.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.35 KVM_SET_USER_MEMORY_REGION</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_USER_MEM</div><div class='hunk'>@@ -844,6 +886,7 @@ It is recommended to use this API instead of the KVM_SET_MEMORY_REGION ioctl.</div><div class='ctx'> The KVM_SET_MEMORY_REGION does not allow fine grained control over memory</div><div class='ctx'> allocation and is deprecated.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.36 KVM_SET_TSS_ADDR</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_SET_TSS_ADDR</div><div class='hunk'>@@ -862,6 +905,7 @@ This ioctl is required on Intel-based hosts.  This is needed on Intel hardware</div><div class='ctx'> because of a quirk in the virtualization implementation (see the internals</div><div class='ctx'> documentation when it pops into existence).</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.37 KVM_ENABLE_CAP</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_ENABLE_CAP</div><div class='hunk'>@@ -897,6 +941,7 @@ function properly, this is the place to put them.</div><div class='ctx'>        __u8  pad[64];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.38 KVM_GET_MP_STATE</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_MP_STATE</div><div class='hunk'>@@ -927,6 +972,7 @@ Possible values are:</div><div class='ctx'> This ioctl is only useful after KVM_CREATE_IRQCHIP.  Without an in-kernel</div><div class='ctx'> irqchip, the multiprocessing state must be maintained by userspace.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.39 KVM_SET_MP_STATE</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_MP_STATE</div><div class='hunk'>@@ -941,6 +987,7 @@ arguments.</div><div class='ctx'> This ioctl is only useful after KVM_CREATE_IRQCHIP.  Without an in-kernel</div><div class='ctx'> irqchip, the multiprocessing state must be maintained by userspace.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.40 KVM_SET_IDENTITY_MAP_ADDR</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_SET_IDENTITY_MAP_ADDR</div><div class='hunk'>@@ -959,6 +1006,7 @@ This ioctl is required on Intel-based hosts.  This is needed on Intel hardware</div><div class='ctx'> because of a quirk in the virtualization implementation (see the internals</div><div class='ctx'> documentation when it pops into existence).</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.41 KVM_SET_BOOT_CPU_ID</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_SET_BOOT_CPU_ID</div><div class='hunk'>@@ -971,6 +1019,7 @@ Define which vcpu is the Bootstrap Processor (BSP).  Values are the same</div><div class='ctx'> as the vcpu id in KVM_CREATE_VCPU.  If this ioctl is not called, the default</div><div class='ctx'> is vcpu 0.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.42 KVM_GET_XSAVE</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_XSAVE</div><div class='hunk'>@@ -985,6 +1034,7 @@ struct kvm_xsave {</div><div class='ctx'> </div><div class='ctx'> This ioctl would copy current vcpu's xsave struct to the userspace.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.43 KVM_SET_XSAVE</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_XSAVE</div><div class='hunk'>@@ -999,6 +1049,7 @@ struct kvm_xsave {</div><div class='ctx'> </div><div class='ctx'> This ioctl would copy userspace's xsave struct to the kernel.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.44 KVM_GET_XCRS</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_XCRS</div><div class='hunk'>@@ -1022,6 +1073,7 @@ struct kvm_xcrs {</div><div class='ctx'> </div><div class='ctx'> This ioctl would copy current vcpu's xcrs to the userspace.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.45 KVM_SET_XCRS</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_XCRS</div><div class='hunk'>@@ -1045,6 +1097,7 @@ struct kvm_xcrs {</div><div class='ctx'> </div><div class='ctx'> This ioctl would set vcpu's xcr to the value userspace specified.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.46 KVM_GET_SUPPORTED_CPUID</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_EXT_CPUID</div><div class='hunk'>@@ -1119,6 +1172,7 @@ support.  Instead it is reported via</div><div class='ctx'> if that returns true and you use KVM_CREATE_IRQCHIP, or if you emulate the</div><div class='ctx'> feature in userspace, then you can enable the feature for KVM_SET_CPUID2.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.47 KVM_PPC_GET_PVINFO</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_PPC_GET_PVINFO</div><div class='hunk'>@@ -1142,6 +1196,7 @@ of 4 instructions that make up a hypercall.</div><div class='ctx'> If any additional field gets added to this structure later on, a bit for that</div><div class='ctx'> additional piece of information will be set in the flags bitmap.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.48 KVM_ASSIGN_PCI_DEVICE</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_DEVICE_ASSIGNMENT</div><div class='hunk'>@@ -1185,6 +1240,7 @@ Only PCI header type 0 devices with PCI BAR resources are supported by</div><div class='ctx'> device assignment.  The user requesting this ioctl must have read/write</div><div class='ctx'> access to the PCI sysfs resource files associated with the device.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.49 KVM_DEASSIGN_PCI_DEVICE</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_DEVICE_DEASSIGNMENT</div><div class='hunk'>@@ -1198,6 +1254,7 @@ Ends PCI device assignment, releasing all associated resources.</div><div class='ctx'> See KVM_CAP_DEVICE_ASSIGNMENT for the data structure. Only assigned_dev_id is</div><div class='ctx'> used in kvm_assigned_pci_dev to identify the device.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.50 KVM_ASSIGN_DEV_IRQ</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_ASSIGN_DEV_IRQ</div><div class='hunk'>@@ -1231,6 +1288,7 @@ The following flags are defined:</div><div class='ctx'> It is not valid to specify multiple types per host or guest IRQ. However, the</div><div class='ctx'> IRQ type of host and guest can differ or can even be null.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.51 KVM_DEASSIGN_DEV_IRQ</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_ASSIGN_DEV_IRQ</div><div class='hunk'>@@ -1245,6 +1303,7 @@ See KVM_ASSIGN_DEV_IRQ for the data structure. The target device is specified</div><div class='ctx'> by assigned_dev_id, flags must correspond to the IRQ type specified on</div><div class='ctx'> KVM_ASSIGN_DEV_IRQ. Partial deassignment of host or guest IRQ is allowed.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.52 KVM_SET_GSI_ROUTING</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_IRQ_ROUTING</div><div class='hunk'>@@ -1293,6 +1352,7 @@ struct kvm_irq_routing_msi {</div><div class='ctx'> 	__u32 pad;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.53 KVM_ASSIGN_SET_MSIX_NR</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_DEVICE_MSIX</div><div class='hunk'>@@ -1314,6 +1374,7 @@ struct kvm_assigned_msix_nr {</div><div class='ctx'> </div><div class='ctx'> #define KVM_MAX_MSIX_PER_DEV		256</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.54 KVM_ASSIGN_SET_MSIX_ENTRY</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_DEVICE_MSIX</div><div class='hunk'>@@ -1332,7 +1393,8 @@ struct kvm_assigned_msix_entry {</div><div class='ctx'> 	__u16 padding[3];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-4.54 KVM_SET_TSC_KHZ</div><div class='add'>+</div><div class='add'>+4.55 KVM_SET_TSC_KHZ</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_TSC_CONTROL</div><div class='ctx'> Architectures: x86</div><div class='hunk'>@@ -1343,7 +1405,8 @@ Returns: 0 on success, -1 on error</div><div class='ctx'> Specifies the tsc frequency for the virtual machine. The unit of the</div><div class='ctx'> frequency is KHz.</div><div class='ctx'> </div><div class='del'>-4.55 KVM_GET_TSC_KHZ</div><div class='add'>+</div><div class='add'>+4.56 KVM_GET_TSC_KHZ</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_GET_TSC_KHZ</div><div class='ctx'> Architectures: x86</div><div class='hunk'>@@ -1355,7 +1418,8 @@ Returns the tsc frequency of the guest. The unit of the return value is</div><div class='ctx'> KHz. If the host has unstable tsc this ioctl returns -EIO instead as an</div><div class='ctx'> error.</div><div class='ctx'> </div><div class='del'>-4.56 KVM_GET_LAPIC</div><div class='add'>+</div><div class='add'>+4.57 KVM_GET_LAPIC</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_IRQCHIP</div><div class='ctx'> Architectures: x86</div><div class='hunk'>@@ -1371,7 +1435,8 @@ struct kvm_lapic_state {</div><div class='ctx'> Reads the Local APIC registers and copies them into the input argument.  The</div><div class='ctx'> data format and layout are the same as documented in the architecture manual.</div><div class='ctx'> </div><div class='del'>-4.57 KVM_SET_LAPIC</div><div class='add'>+</div><div class='add'>+4.58 KVM_SET_LAPIC</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_IRQCHIP</div><div class='ctx'> Architectures: x86</div><div class='hunk'>@@ -1387,7 +1452,8 @@ struct kvm_lapic_state {</div><div class='ctx'> Copies the input argument into the the Local APIC registers.  The data format</div><div class='ctx'> and layout are the same as documented in the architecture manual.</div><div class='ctx'> </div><div class='del'>-4.58 KVM_IOEVENTFD</div><div class='add'>+</div><div class='add'>+4.59 KVM_IOEVENTFD</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_IOEVENTFD</div><div class='ctx'> Architectures: all</div><div class='hunk'>@@ -1417,7 +1483,8 @@ The following flags are defined:</div><div class='ctx'> If datamatch flag is set, the event will be signaled only if the written value</div><div class='ctx'> to the registered address is equal to datamatch in struct kvm_ioeventfd.</div><div class='ctx'> </div><div class='del'>-4.59 KVM_DIRTY_TLB</div><div class='add'>+</div><div class='add'>+4.60 KVM_DIRTY_TLB</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_SW_TLB</div><div class='ctx'> Architectures: ppc</div><div class='hunk'>@@ -1449,7 +1516,8 @@ The "num_dirty" field is a performance hint for KVM to determine whether it</div><div class='ctx'> should skip processing the bitmap and just invalidate everything.  It must</div><div class='ctx'> be set to the number of set bits in the bitmap.</div><div class='ctx'> </div><div class='del'>-4.60 KVM_ASSIGN_SET_INTX_MASK</div><div class='add'>+</div><div class='add'>+4.61 KVM_ASSIGN_SET_INTX_MASK</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_PCI_2_3</div><div class='ctx'> Architectures: x86</div><div class='hunk'>@@ -1482,6 +1550,7 @@ See KVM_ASSIGN_DEV_IRQ for the data structure.  The target device is specified</div><div class='ctx'> by assigned_dev_id.  In the flags field, only KVM_DEV_ASSIGN_MASK_INTX is</div><div class='ctx'> evaluated.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.62 KVM_CREATE_SPAPR_TCE</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_SPAPR_TCE</div><div class='hunk'>@@ -1517,6 +1586,7 @@ the entries written by kernel-handled H_PUT_TCE calls, and also lets</div><div class='ctx'> userspace update the TCE table directly which is useful in some</div><div class='ctx'> circumstances.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.63 KVM_ALLOCATE_RMA</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_PPC_RMA</div><div class='hunk'>@@ -1549,6 +1619,7 @@ is supported; 2 if the processor requires all virtual machines to have</div><div class='ctx'> an RMA, or 1 if the processor can use an RMA but doesn't require it,</div><div class='ctx'> because it supports the Virtual RMA (VRMA) facility.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.64 KVM_NMI</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_USER_NMI</div><div class='hunk'>@@ -1574,6 +1645,7 @@ following algorithm:</div><div class='ctx'> Some guests configure the LINT1 NMI input to cause a panic, aiding in</div><div class='ctx'> debugging.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.65 KVM_S390_UCAS_MAP</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_S390_UCONTROL</div><div class='hunk'>@@ -1593,6 +1665,7 @@ This ioctl maps the memory at "user_addr" with the length "length" to</div><div class='ctx'> the vcpu's address space starting at "vcpu_addr". All parameters need to</div><div class='ctx'> be alligned by 1 megabyte.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.66 KVM_S390_UCAS_UNMAP</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_S390_UCONTROL</div><div class='hunk'>@@ -1612,6 +1685,7 @@ This ioctl unmaps the memory in the vcpu's address space starting at</div><div class='ctx'> "vcpu_addr" with the length "length". The field "user_addr" is ignored.</div><div class='ctx'> All parameters need to be alligned by 1 megabyte.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.67 KVM_S390_VCPU_FAULT</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_S390_UCONTROL</div><div class='hunk'>@@ -1628,6 +1702,7 @@ table upfront. This is useful to handle validity intercepts for user</div><div class='ctx'> controlled virtual machines to fault in the virtual cpu's lowcore pages</div><div class='ctx'> prior to calling the KVM_RUN ioctl.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.68 KVM_SET_ONE_REG</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_ONE_REG</div><div class='hunk'>@@ -1653,6 +1728,7 @@ registers, find a list below:</div><div class='ctx'>         |                       |</div><div class='ctx'>   PPC   | KVM_REG_PPC_HIOR      | 64</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 4.69 KVM_GET_ONE_REG</div><div class='ctx'> </div><div class='ctx'> Capability: KVM_CAP_ONE_REG</div><div class='hunk'>@@ -1669,7 +1745,193 @@ at the memory location pointed to by "addr".</div><div class='ctx'> The list of registers accessible using this interface is identical to the</div><div class='ctx'> list in 4.64.</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+4.70 KVM_KVMCLOCK_CTRL</div><div class='add'>+</div><div class='add'>+Capability: KVM_CAP_KVMCLOCK_CTRL</div><div class='add'>+Architectures: Any that implement pvclocks (currently x86 only)</div><div class='add'>+Type: vcpu ioctl</div><div class='add'>+Parameters: None</div><div class='add'>+Returns: 0 on success, -1 on error</div><div class='add'>+</div><div class='add'>+This signals to the host kernel that the specified guest is being paused by</div><div class='add'>+userspace.  The host will set a flag in the pvclock structure that is checked</div><div class='add'>+from the soft lockup watchdog.  The flag is part of the pvclock structure that</div><div class='add'>+is shared between guest and host, specifically the second bit of the flags</div><div class='add'>+field of the pvclock_vcpu_time_info structure.  It will be set exclusively by</div><div class='add'>+the host and read/cleared exclusively by the guest.  The guest operation of</div><div class='add'>+checking and clearing the flag must an atomic operation so</div><div class='add'>+load-link/store-conditional, or equivalent must be used.  There are two cases</div><div class='add'>+where the guest will clear the flag: when the soft lockup watchdog timer resets</div><div class='add'>+itself or when a soft lockup is detected.  This ioctl can be called any time</div><div class='add'>+after pausing the vcpu, but before it is resumed.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+4.71 KVM_SIGNAL_MSI</div><div class='add'>+</div><div class='add'>+Capability: KVM_CAP_SIGNAL_MSI</div><div class='add'>+Architectures: x86</div><div class='add'>+Type: vm ioctl</div><div class='add'>+Parameters: struct kvm_msi (in)</div><div class='add'>+Returns: &gt;0 on delivery, 0 if guest blocked the MSI, and -1 on error</div><div class='add'>+</div><div class='add'>+Directly inject a MSI message. Only valid with in-kernel irqchip that handles</div><div class='add'>+MSI messages.</div><div class='add'>+</div><div class='add'>+struct kvm_msi {</div><div class='add'>+	__u32 address_lo;</div><div class='add'>+	__u32 address_hi;</div><div class='add'>+	__u32 data;</div><div class='add'>+	__u32 flags;</div><div class='add'>+	__u8  pad[16];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+No flags are defined so far. The corresponding field must be 0.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+4.71 KVM_CREATE_PIT2</div><div class='add'>+</div><div class='add'>+Capability: KVM_CAP_PIT2</div><div class='add'>+Architectures: x86</div><div class='add'>+Type: vm ioctl</div><div class='add'>+Parameters: struct kvm_pit_config (in)</div><div class='add'>+Returns: 0 on success, -1 on error</div><div class='add'>+</div><div class='add'>+Creates an in-kernel device model for the i8254 PIT. This call is only valid</div><div class='add'>+after enabling in-kernel irqchip support via KVM_CREATE_IRQCHIP. The following</div><div class='add'>+parameters have to be passed:</div><div class='add'>+</div><div class='add'>+struct kvm_pit_config {</div><div class='add'>+	__u32 flags;</div><div class='add'>+	__u32 pad[15];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+Valid flags are:</div><div class='add'>+</div><div class='add'>+#define KVM_PIT_SPEAKER_DUMMY     1 /* emulate speaker port stub */</div><div class='add'>+</div><div class='add'>+PIT timer interrupts may use a per-VM kernel thread for injection. If it</div><div class='add'>+exists, this thread will have a name of the following pattern:</div><div class='add'>+</div><div class='add'>+kvm-pit/&lt;owner-process-pid&gt;</div><div class='add'>+</div><div class='add'>+When running a guest with elevated priorities, the scheduling parameters of</div><div class='add'>+this thread may have to be adjusted accordingly.</div><div class='add'>+</div><div class='add'>+This IOCTL replaces the obsolete KVM_CREATE_PIT.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+4.72 KVM_GET_PIT2</div><div class='add'>+</div><div class='add'>+Capability: KVM_CAP_PIT_STATE2</div><div class='add'>+Architectures: x86</div><div class='add'>+Type: vm ioctl</div><div class='add'>+Parameters: struct kvm_pit_state2 (out)</div><div class='add'>+Returns: 0 on success, -1 on error</div><div class='add'>+</div><div class='add'>+Retrieves the state of the in-kernel PIT model. Only valid after</div><div class='add'>+KVM_CREATE_PIT2. The state is returned in the following structure:</div><div class='add'>+</div><div class='add'>+struct kvm_pit_state2 {</div><div class='add'>+	struct kvm_pit_channel_state channels[3];</div><div class='add'>+	__u32 flags;</div><div class='add'>+	__u32 reserved[9];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+Valid flags are:</div><div class='add'>+</div><div class='add'>+/* disable PIT in HPET legacy mode */</div><div class='add'>+#define KVM_PIT_FLAGS_HPET_LEGACY  0x00000001</div><div class='add'>+</div><div class='add'>+This IOCTL replaces the obsolete KVM_GET_PIT.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+4.73 KVM_SET_PIT2</div><div class='add'>+</div><div class='add'>+Capability: KVM_CAP_PIT_STATE2</div><div class='add'>+Architectures: x86</div><div class='add'>+Type: vm ioctl</div><div class='add'>+Parameters: struct kvm_pit_state2 (in)</div><div class='add'>+Returns: 0 on success, -1 on error</div><div class='add'>+</div><div class='add'>+Sets the state of the in-kernel PIT model. Only valid after KVM_CREATE_PIT2.</div><div class='add'>+See KVM_GET_PIT2 for details on struct kvm_pit_state2.</div><div class='add'>+</div><div class='add'>+This IOCTL replaces the obsolete KVM_SET_PIT.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+4.74 KVM_PPC_GET_SMMU_INFO</div><div class='add'>+</div><div class='add'>+Capability: KVM_CAP_PPC_GET_SMMU_INFO</div><div class='add'>+Architectures: powerpc</div><div class='add'>+Type: vm ioctl</div><div class='add'>+Parameters: None</div><div class='add'>+Returns: 0 on success, -1 on error</div><div class='add'>+</div><div class='add'>+This populates and returns a structure describing the features of</div><div class='add'>+the "Server" class MMU emulation supported by KVM.</div><div class='add'>+This can in turn be used by userspace to generate the appropariate</div><div class='add'>+device-tree properties for the guest operating system.</div><div class='add'>+</div><div class='add'>+The structure contains some global informations, followed by an</div><div class='add'>+array of supported segment page sizes:</div><div class='add'>+</div><div class='add'>+      struct kvm_ppc_smmu_info {</div><div class='add'>+	     __u64 flags;</div><div class='add'>+	     __u32 slb_size;</div><div class='add'>+	     __u32 pad;</div><div class='add'>+	     struct kvm_ppc_one_seg_page_size sps[KVM_PPC_PAGE_SIZES_MAX_SZ];</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+The supported flags are:</div><div class='add'>+</div><div class='add'>+    - KVM_PPC_PAGE_SIZES_REAL:</div><div class='add'>+        When that flag is set, guest page sizes must "fit" the backing</div><div class='add'>+        store page sizes. When not set, any page size in the list can</div><div class='add'>+        be used regardless of how they are backed by userspace.</div><div class='add'>+</div><div class='add'>+    - KVM_PPC_1T_SEGMENTS</div><div class='add'>+        The emulated MMU supports 1T segments in addition to the</div><div class='add'>+        standard 256M ones.</div><div class='add'>+</div><div class='add'>+The "slb_size" field indicates how many SLB entries are supported</div><div class='add'>+</div><div class='add'>+The "sps" array contains 8 entries indicating the supported base</div><div class='add'>+page sizes for a segment in increasing order. Each entry is defined</div><div class='add'>+as follow:</div><div class='add'>+</div><div class='add'>+   struct kvm_ppc_one_seg_page_size {</div><div class='add'>+	__u32 page_shift;	/* Base page shift of segment (or 0) */</div><div class='add'>+	__u32 slb_enc;		/* SLB encoding for BookS */</div><div class='add'>+	struct kvm_ppc_one_page_size enc[KVM_PPC_PAGE_SIZES_MAX_SZ];</div><div class='add'>+   };</div><div class='add'>+</div><div class='add'>+An entry with a "page_shift" of 0 is unused. Because the array is</div><div class='add'>+organized in increasing order, a lookup can stop when encoutering</div><div class='add'>+such an entry.</div><div class='add'>+</div><div class='add'>+The "slb_enc" field provides the encoding to use in the SLB for the</div><div class='add'>+page size. The bits are in positions such as the value can directly</div><div class='add'>+be OR'ed into the "vsid" argument of the slbmte instruction.</div><div class='add'>+</div><div class='add'>+The "enc" array is a list which for each of those segment base page</div><div class='add'>+size provides the list of supported actual page sizes (which can be</div><div class='add'>+only larger or equal to the base page size), along with the</div><div class='add'>+corresponding encoding in the hash PTE. Similarily, the array is</div><div class='add'>+8 entries sorted by increasing sizes and an entry with a "0" shift</div><div class='add'>+is an empty entry and a terminator:</div><div class='add'>+</div><div class='add'>+   struct kvm_ppc_one_page_size {</div><div class='add'>+	__u32 page_shift;	/* Page shift (or 0) */</div><div class='add'>+	__u32 pte_enc;		/* Encoding in the HPTE (&gt;&gt;12) */</div><div class='add'>+   };</div><div class='add'>+</div><div class='add'>+The "pte_enc" field provides a value that can OR'ed into the hash</div><div class='add'>+PTE's RPN field (ie, it needs to be shifted left by 12 to OR it</div><div class='add'>+into the hash PTE second double word).</div><div class='add'>+</div><div class='ctx'> 5. The kvm_run structure</div><div class='add'>+------------------------</div><div class='ctx'> </div><div class='ctx'> Application code obtains a pointer to the kvm_run structure by</div><div class='ctx'> mmap()ing a vcpu fd.  From that point, application code can control</div><div class='hunk'>@@ -1910,7 +2172,9 @@ and usually define the validity of a groups of registers. (e.g. one bit</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 6. Capabilities that can be enabled</div><div class='add'>+-----------------------------------</div><div class='ctx'> </div><div class='ctx'> There are certain capabilities that change the behavior of the virtual CPU when</div><div class='ctx'> enabled. To enable them, please see section 4.37. Below you can find a list of</div><div class='hunk'>@@ -1926,6 +2190,7 @@ The following information is provided along with the description:</div><div class='ctx'>   Returns: the return value.  General error numbers (EBADF, ENOMEM, EINVAL)</div><div class='ctx'>       are not detailed, but errors with specific meanings are.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 6.1 KVM_CAP_PPC_OSI</div><div class='ctx'> </div><div class='ctx'> Architectures: ppc</div><div class='hunk'>@@ -1939,6 +2204,7 @@ between the guest and the host.</div><div class='ctx'> </div><div class='ctx'> When this capability is enabled, KVM_EXIT_OSI can occur.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 6.2 KVM_CAP_PPC_PAPR</div><div class='ctx'> </div><div class='ctx'> Architectures: ppc</div><div class='hunk'>@@ -1957,6 +2223,7 @@ HTAB invisible to the guest.</div><div class='ctx'> </div><div class='ctx'> When this capability is enabled, KVM_EXIT_PAPR_HCALL can occur.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 6.3 KVM_CAP_SW_TLB</div><div class='ctx'> </div><div class='ctx'> Architectures: ppc</div><div class='head'>diff --git a/Documentation/virtual/kvm/cpuid.txt b/Documentation/virtual/kvm/cpuid.txt<br/>index 882068538c9c..83afe65d4966 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/virtual/kvm/cpuid.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/virtual/kvm/cpuid.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/virtual/kvm/cpuid.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/virtual/kvm/cpuid.txt</a></div><div class='hunk'>@@ -10,11 +10,15 @@ a guest.</div><div class='ctx'> KVM cpuid functions are:</div><div class='ctx'> </div><div class='ctx'> function: KVM_CPUID_SIGNATURE (0x40000000)</div><div class='del'>-returns : eax = 0,</div><div class='add'>+returns : eax = 0x40000001,</div><div class='ctx'>           ebx = 0x4b4d564b,</div><div class='ctx'>           ecx = 0x564b4d56,</div><div class='ctx'>           edx = 0x4d.</div><div class='ctx'> Note that this value in ebx, ecx and edx corresponds to the string "KVMKVMKVM".</div><div class='add'>+The value in eax corresponds to the maximum cpuid function present in this leaf,</div><div class='add'>+and will be updated if more functions are added in the future.</div><div class='add'>+Note also that old hosts set eax value to 0x0. This should</div><div class='add'>+be interpreted as if the value was 0x40000001.</div><div class='ctx'> This function queries the presence of KVM cpuid leafs.</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/virtual/kvm/msr.txt b/Documentation/virtual/kvm/msr.txt<br/>index 50317809113d..96b41bd97523 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/virtual/kvm/msr.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/virtual/kvm/msr.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/virtual/kvm/msr.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/virtual/kvm/msr.txt</a></div><div class='hunk'>@@ -109,6 +109,10 @@ MSR_KVM_SYSTEM_TIME_NEW:  0x4b564d01</div><div class='ctx'> 		     0      |	   24      | multiple cpus are guaranteed to</div><div class='ctx'> 			    |		   | be monotonic</div><div class='ctx'> 		-------------------------------------------------------------</div><div class='add'>+			    |		   | guest vcpu has been paused by</div><div class='add'>+		     1	    |	  N/A	   | the host</div><div class='add'>+			    |		   | See 4.70 in api.txt</div><div class='add'>+		-------------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> 	Availability of this MSR must be checked via bit 3 in 0x4000001 cpuid</div><div class='ctx'> 	leaf prior to usage.</div><div class='head'>diff --git a/Documentation/virtual/virtio-spec.txt b/Documentation/virtual/virtio-spec.txt<br/>index da094737e2f8..0d6ec85481cb 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/virtual/virtio-spec.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/virtual/virtio-spec.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/virtual/virtio-spec.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/virtual/virtio-spec.txt</a></div><div class='hunk'>@@ -1,11 +1,11 @@</div><div class='ctx'> [Generated file: see http://ozlabs.org/~rusty/virtio-spec/]</div><div class='ctx'> Virtio PCI Card Specification</div><div class='del'>-v0.9.1 DRAFT</div><div class='add'>+v0.9.5 DRAFT</div><div class='ctx'> -</div><div class='ctx'> </div><div class='del'>-Rusty Russell &lt;rusty@rustcorp.com.au&gt;IBM Corporation (Editor)</div><div class='add'>+Rusty Russell &lt;rusty@rustcorp.com.au&gt; IBM Corporation (Editor)</div><div class='ctx'> </div><div class='del'>-2011 August 1.</div><div class='add'>+2012 May 7.</div><div class='ctx'> </div><div class='ctx'> Purpose and Description</div><div class='ctx'> </div><div class='hunk'>@@ -68,11 +68,11 @@ and consists of three parts:</div><div class='ctx'> +-------------------+-----------------------------------+-----------+</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-When the driver wants to send buffers to the device, it puts them</div><div class='del'>-in one or more slots in the descriptor table, and writes the</div><div class='del'>-descriptor indices into the available ring. It then notifies the</div><div class='del'>-device. When the device has finished with the buffers, it writes</div><div class='del'>-the descriptors into the used ring, and sends an interrupt.</div><div class='add'>+When the driver wants to send a buffer to the device, it fills in</div><div class='add'>+a slot in the descriptor table (or chains several together), and</div><div class='add'>+writes the descriptor index into the available ring. It then</div><div class='add'>+notifies the device. When the device has finished a buffer, it</div><div class='add'>+writes the descriptor into the used ring, and sends an interrupt.</div><div class='ctx'> </div><div class='ctx'> Specification</div><div class='ctx'> </div><div class='hunk'>@@ -106,8 +106,14 @@ for informational purposes by the guest).</div><div class='ctx'> +----------------------+--------------------+---------------+</div><div class='ctx'> |          6           |     ioMemory       |       -       |</div><div class='ctx'> +----------------------+--------------------+---------------+</div><div class='add'>+|          7           |       rpmsg        |  Appendix H   |</div><div class='add'>++----------------------+--------------------+---------------+</div><div class='add'>+|          8           |     SCSI host      |  Appendix I   |</div><div class='add'>++----------------------+--------------------+---------------+</div><div class='ctx'> |          9           |   9P transport     |       -       |</div><div class='ctx'> +----------------------+--------------------+---------------+</div><div class='add'>+|         10           |   mac80211 wlan    |       -       |</div><div class='add'>++----------------------+--------------------+---------------+</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'>   Device Configuration</div><div class='hunk'>@@ -127,7 +133,7 @@ Note that this is possible because while the virtio header is PCI</div><div class='ctx'> the native endian of the guest (where such distinction is</div><div class='ctx'> applicable).</div><div class='ctx'> </div><div class='del'>-  Device Initialization Sequence</div><div class='add'>+  Device Initialization Sequence&lt;sub:Device-Initialization-Sequence&gt;</div><div class='ctx'> </div><div class='ctx'> We start with an overview of device initialization, then expand</div><div class='ctx'> on the details of the device and how each step is preformed.</div><div class='hunk'>@@ -177,7 +183,10 @@ The virtio header looks as follows:</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> If MSI-X is enabled for the device, two additional fields</div><div class='del'>-immediately follow this header:</div><div class='add'>+immediately follow this header:[footnote:</div><div class='add'>+ie. once you enable MSI-X on the device, the other fields move.</div><div class='add'>+If you turn it off again, they move back!</div><div class='add'>+]</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> +------------++----------------+--------+</div><div class='hunk'>@@ -191,20 +200,6 @@ immediately follow this header:</div><div class='ctx'> +------------++----------------+--------+</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Finally, if feature bits (VIRTIO_F_FEATURES_HI) this is</div><div class='del'>-immediately followed by two additional fields:</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-+------------++----------------------+----------------------</div><div class='del'>-| Bits       || 32                   | 32</div><div class='del'>-+------------++----------------------+----------------------</div><div class='del'>-| Read/Write || R                    | R+W</div><div class='del'>-+------------++----------------------+----------------------</div><div class='del'>-| Purpose    || Device               | Guest</div><div class='del'>-|            || Features bits 32:63  | Features bits 32:63</div><div class='del'>-+------------++----------------------+----------------------</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> Immediately following these general headers, there may be</div><div class='ctx'> device-specific headers:</div><div class='ctx'> </div><div class='hunk'>@@ -238,31 +233,25 @@ at least one bit should be set:</div><div class='ctx'>   may be a significant (or infinite) delay before setting this</div><div class='ctx'>   bit.</div><div class='ctx'> </div><div class='del'>-  DRIVER_OK (3) Indicates that the driver is set up and ready to</div><div class='add'>+  DRIVER_OK (4) Indicates that the driver is set up and ready to</div><div class='ctx'>   drive the device.</div><div class='ctx'> </div><div class='del'>-  FAILED (8) Indicates that something went wrong in the guest,</div><div class='add'>+  FAILED (128) Indicates that something went wrong in the guest,</div><div class='ctx'>   and it has given up on the device. This could be an internal</div><div class='ctx'>   error, or the driver didn't like the device for some reason, or</div><div class='ctx'>   even a fatal error during device operation. The device must be</div><div class='ctx'>   reset before attempting to re-initialize.</div><div class='ctx'> </div><div class='del'>-  Feature Bits</div><div class='add'>+  Feature Bits&lt;sub:Feature-Bits&gt;</div><div class='ctx'> </div><div class='del'>-The least significant 31 bits of the first configuration field</div><div class='del'>-indicates the features that the device supports (the high bit is</div><div class='del'>-reserved, and will be used to indicate the presence of future</div><div class='del'>-feature bits elsewhere). If more than 31 feature bits are</div><div class='del'>-supported, the device indicates so by setting feature bit 31 (see</div><div class='del'>-[cha:Reserved-Feature-Bits]). The bits are allocated as follows:</div><div class='add'>+Thefirst configuration field indicates the features that the</div><div class='add'>+device supports. The bits are allocated as follows:</div><div class='ctx'> </div><div class='ctx'>   0 to 23 Feature bits for the specific device type</div><div class='ctx'> </div><div class='del'>-  24 to 40 Feature bits reserved for extensions to the queue and</div><div class='add'>+  24 to 32 Feature bits reserved for extensions to the queue and</div><div class='ctx'>   feature negotiation mechanisms</div><div class='ctx'> </div><div class='del'>-  41 to 63 Feature bits reserved for future extensions</div><div class='del'>-</div><div class='ctx'> For example, feature bit 0 for a network device (i.e. Subsystem</div><div class='ctx'> Device ID 1) indicates that the device supports checksumming of</div><div class='ctx'> packets.</div><div class='hunk'>@@ -286,10 +275,6 @@ will not see that feature bit in the Device Features field and</div><div class='ctx'> can go into backwards compatibility mode (or, for poor</div><div class='ctx'> implementations, set the FAILED Device Status bit).</div><div class='ctx'> </div><div class='del'>-Access to feature bits 32 to 63 is enabled by Guest by setting</div><div class='del'>-feature bit 31. If this bit is unset, Device must assume that all</div><div class='del'>-feature bits &gt; 31 are unset.</div><div class='del'>-</div><div class='ctx'>   Configuration/Queue Vectors</div><div class='ctx'> </div><div class='ctx'> When MSI-X capability is present and enabled in the device</div><div class='hunk'>@@ -324,7 +309,7 @@ success, the previously written value is returned, and on</div><div class='ctx'> failure, NO_VECTOR is returned. If a mapping failure is detected,</div><div class='ctx'> the driver can retry mapping with fewervectors, or disable MSI-X.</div><div class='ctx'> </div><div class='del'>-  Virtqueue Configuration</div><div class='add'>+  Virtqueue Configuration&lt;sec:Virtqueue-Configuration&gt;</div><div class='ctx'> </div><div class='ctx'> As a device can have zero or more virtqueues for bulk data</div><div class='ctx'> transport (for example, the network driver has two), the driver</div><div class='hunk'>@@ -587,7 +572,7 @@ and Red Hat under the (3-clause) BSD license so that it can be</div><div class='ctx'> freely used by all other projects, and is reproduced (with slight</div><div class='ctx'> variation to remove Linux assumptions) in Appendix A.</div><div class='ctx'> </div><div class='del'>-  Device Operation</div><div class='add'>+  Device Operation&lt;sec:Device-Operation&gt;</div><div class='ctx'> </div><div class='ctx'> There are two parts to device operation: supplying new buffers to</div><div class='ctx'> the device, and processing used buffers from the device. As an</div><div class='hunk'>@@ -813,7 +798,7 @@ vring.used-&gt;ring[vq-&gt;last_seen_used%vsz];</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-  Dealing With Configuration Changes</div><div class='add'>+  Dealing With Configuration Changes&lt;sub:Dealing-With-Configuration&gt;</div><div class='ctx'> </div><div class='ctx'> Some virtio PCI devices can change the device configuration</div><div class='ctx'> state, as reflected in the virtio header in the PCI configuration</div><div class='hunk'>@@ -1260,18 +1245,6 @@ Currently there are five device-independent feature bits defined:</div><div class='ctx'>   driver should ignore the used_event field; the device should</div><div class='ctx'>   ignore the avail_event field; the flags field is used</div><div class='ctx'> </div><div class='del'>-  VIRTIO_F_BAD_FEATURE(30) This feature should never be</div><div class='del'>-  negotiated by the guest; doing so is an indication that the</div><div class='del'>-  guest is faulty[footnote:</div><div class='del'>-An experimental virtio PCI driver contained in Linux version</div><div class='del'>-2.6.25 had this problem, and this feature bit can be used to</div><div class='del'>-detect it.</div><div class='del'>-]</div><div class='del'>-</div><div class='del'>-  VIRTIO_F_FEATURES_HIGH(31) This feature indicates that the</div><div class='del'>-  device supports feature bits 32:63. If unset, feature bits</div><div class='del'>-  32:63 are unset.</div><div class='del'>-</div><div class='ctx'> Appendix C: Network Device</div><div class='ctx'> </div><div class='ctx'> The virtio network device is a virtual ethernet card, and is the</div><div class='hunk'>@@ -1335,11 +1308,17 @@ were required.</div><div class='ctx'> </div><div class='ctx'>   VIRTIO_NET_F_CTRL_VLAN (19) Control channel VLAN filtering.</div><div class='ctx'> </div><div class='add'>+  VIRTIO_NET_F_GUEST_ANNOUNCE(21) Guest can send gratuitous</div><div class='add'>+    packets.</div><div class='add'>+</div><div class='ctx'>   Device configuration layout Two configuration fields are</div><div class='ctx'>   currently defined. The mac address field always exists (though</div><div class='ctx'>   is only valid if VIRTIO_NET_F_MAC is set), and the status field</div><div class='del'>-  only exists if VIRTIO_NET_F_STATUS is set. Only one bit is</div><div class='del'>-  currently defined for the status field: VIRTIO_NET_S_LINK_UP. #define VIRTIO_NET_S_LINK_UP	1</div><div class='add'>+  only exists if VIRTIO_NET_F_STATUS is set. Two read-only bits</div><div class='add'>+  are currently defined for the status field:</div><div class='add'>+  VIRTIO_NET_S_LINK_UP and VIRTIO_NET_S_ANNOUNCE. #define VIRTIO_NET_S_LINK_UP	1</div><div class='add'>+</div><div class='add'>+#define VIRTIO_NET_S_ANNOUNCE	2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1377,12 +1356,19 @@ struct virtio_net_config {</div><div class='ctx'>   packets by negotating the VIRTIO_NET_F_CSUM feature. This “</div><div class='ctx'>   checksum offload” is a common feature on modern network cards.</div><div class='ctx'> </div><div class='del'>-  If that feature is negotiated, a driver can use TCP or UDP</div><div class='del'>-  segmentation offload by negotiating the VIRTIO_NET_F_HOST_TSO4</div><div class='del'>-  (IPv4 TCP), VIRTIO_NET_F_HOST_TSO6 (IPv6 TCP) and</div><div class='del'>-  VIRTIO_NET_F_HOST_UFO (UDP fragmentation) features. It should</div><div class='del'>-  not send TCP packets requiring segmentation offload which have</div><div class='del'>-  the Explicit Congestion Notification bit set, unless the</div><div class='add'>+  If that feature is negotiated[footnote:</div><div class='add'>+ie. VIRTIO_NET_F_HOST_TSO* and VIRTIO_NET_F_HOST_UFO are</div><div class='add'>+dependent on VIRTIO_NET_F_CSUM; a dvice which offers the offload</div><div class='add'>+features must offer the checksum feature, and a driver which</div><div class='add'>+accepts the offload features must accept the checksum feature.</div><div class='add'>+Similar logic applies to the VIRTIO_NET_F_GUEST_TSO4 features</div><div class='add'>+depending on VIRTIO_NET_F_GUEST_CSUM.</div><div class='add'>+], a driver can use TCP or UDP segmentation offload by</div><div class='add'>+  negotiating the VIRTIO_NET_F_HOST_TSO4 (IPv4 TCP),</div><div class='add'>+  VIRTIO_NET_F_HOST_TSO6 (IPv6 TCP) and VIRTIO_NET_F_HOST_UFO</div><div class='add'>+  (UDP fragmentation) features. It should not send TCP packets</div><div class='add'>+  requiring segmentation offload which have the Explicit</div><div class='add'>+  Congestion Notification bit set, unless the</div><div class='ctx'>   VIRTIO_NET_F_HOST_ECN feature is negotiated.[footnote:</div><div class='ctx'> This is a common restriction in real, older network cards.</div><div class='ctx'> ]</div><div class='hunk'>@@ -1403,7 +1389,7 @@ segmentation, if both guests are amenable.</div><div class='ctx'> </div><div class='ctx'> Packets are transmitted by placing them in the transmitq, and</div><div class='ctx'> buffers for incoming packets are placed in the receiveq. In each</div><div class='del'>-case, the packet itself is preceded by a header:</div><div class='add'>+case, the packet itself is preceeded by a header:</div><div class='ctx'> </div><div class='ctx'> struct virtio_net_hdr {</div><div class='ctx'> </div><div class='hunk'>@@ -1462,9 +1448,10 @@ It will have a 14 byte ethernet header and 20 byte IP header</div><div class='ctx'> followed by the TCP header (with the TCP checksum field 16 bytes</div><div class='ctx'> into that header). csum_start will be 14+20 = 34 (the TCP</div><div class='ctx'> checksum includes the header), and csum_offset will be 16. The</div><div class='del'>-value in the TCP checksum field will be the sum of the TCP pseudo</div><div class='del'>-header, so that replacing it by the ones' complement checksum of</div><div class='del'>-the TCP header and body will give the correct result.</div><div class='add'>+value in the TCP checksum field should be initialized to the sum</div><div class='add'>+of the TCP pseudo header, so that replacing it by the ones'</div><div class='add'>+complement checksum of the TCP header and body will give the</div><div class='add'>+correct result.</div><div class='ctx'> ]</div><div class='ctx'> </div><div class='ctx'>   &lt;enu:If-the-driver&gt;If the driver negotiated</div><div class='hunk'>@@ -1483,8 +1470,8 @@ Due to various bugs in implementations, this field is not useful</div><div class='ctx'> as a guarantee of the transport header size.</div><div class='ctx'> ]</div><div class='ctx'> </div><div class='del'>-  gso_size is the size of the packet beyond that header (ie.</div><div class='del'>-    MSS).</div><div class='add'>+  gso_size is the maximum size of each packet beyond that header</div><div class='add'>+    (ie. MSS).</div><div class='ctx'> </div><div class='ctx'>   If the driver negotiated the VIRTIO_NET_F_HOST_ECN feature, the</div><div class='ctx'>     VIRTIO_NET_HDR_GSO_ECN bit may be set in “gso_type” as well,</div><div class='hunk'>@@ -1567,7 +1554,9 @@ Processing packet involves:</div><div class='ctx'>   If the VIRTIO_NET_F_GUEST_TSO4, TSO6 or UFO options were</div><div class='ctx'>   negotiated, then the “gso_type” may be something other than</div><div class='ctx'>   VIRTIO_NET_HDR_GSO_NONE, and the “gso_size” field indicates the</div><div class='del'>-  desired MSS (see [enu:If-the-driver]).Control Virtqueue</div><div class='add'>+  desired MSS (see [enu:If-the-driver]).</div><div class='add'>+</div><div class='add'>+  Control Virtqueue</div><div class='ctx'> </div><div class='ctx'> The driver uses the control virtqueue (if VIRTIO_NET_F_VTRL_VQ is</div><div class='ctx'> negotiated) to send commands to manipulate various features of</div><div class='hunk'>@@ -1642,7 +1631,7 @@ struct virtio_net_ctrl_mac {</div><div class='ctx'> </div><div class='ctx'> The device can filter incoming packets by any number of</div><div class='ctx'> destination MAC addresses.[footnote:</div><div class='del'>-Since there are no guarantees, it can use a hash filter</div><div class='add'>+Since there are no guarentees, it can use a hash filter</div><div class='ctx'> orsilently switch to allmulti or promiscuous mode if it is given</div><div class='ctx'> too many addresses.</div><div class='ctx'> ] This table is set using the class VIRTIO_NET_CTRL_MAC and the</div><div class='hunk'>@@ -1665,6 +1654,38 @@ can control a VLAN filter table in the device.</div><div class='ctx'> Both the VIRTIO_NET_CTRL_VLAN_ADD and VIRTIO_NET_CTRL_VLAN_DEL</div><div class='ctx'> command take a 16-bit VLAN id as the command-specific-data.</div><div class='ctx'> </div><div class='add'>+  Gratuitous Packet Sending</div><div class='add'>+</div><div class='add'>+If the driver negotiates the VIRTIO_NET_F_GUEST_ANNOUNCE (depends</div><div class='add'>+on VIRTIO_NET_F_CTRL_VQ), it can ask the guest to send gratuitous</div><div class='add'>+packets; this is usually done after the guest has been physically</div><div class='add'>+migrated, and needs to announce its presence on the new network</div><div class='add'>+links. (As hypervisor does not have the knowledge of guest</div><div class='add'>+network configuration (eg. tagged vlan) it is simplest to prod</div><div class='add'>+the guest in this way).</div><div class='add'>+</div><div class='add'>+#define VIRTIO_NET_CTRL_ANNOUNCE       3</div><div class='add'>+</div><div class='add'>+ #define VIRTIO_NET_CTRL_ANNOUNCE_ACK             0</div><div class='add'>+</div><div class='add'>+The Guest needs to check VIRTIO_NET_S_ANNOUNCE bit in status</div><div class='add'>+field when it notices the changes of device configuration. The</div><div class='add'>+command VIRTIO_NET_CTRL_ANNOUNCE_ACK is used to indicate that</div><div class='add'>+driver has recevied the notification and device would clear the</div><div class='add'>+VIRTIO_NET_S_ANNOUNCE bit in the status filed after it received</div><div class='add'>+this command.</div><div class='add'>+</div><div class='add'>+Processing this notification involves:</div><div class='add'>+</div><div class='add'>+  Sending the gratuitous packets or marking there are pending</div><div class='add'>+  gratuitous packets to be sent and letting deferred routine to</div><div class='add'>+  send them.</div><div class='add'>+</div><div class='add'>+  Sending VIRTIO_NET_CTRL_ANNOUNCE_ACK command through control</div><div class='add'>+  vq.</div><div class='add'>+</div><div class='add'>+  .</div><div class='add'>+</div><div class='ctx'> Appendix D: Block Device</div><div class='ctx'> </div><div class='ctx'> The virtio block device is a simple virtual block device (ie.</div><div class='hunk'>@@ -1699,8 +1720,6 @@ device except where noted.</div><div class='ctx'> </div><div class='ctx'>   VIRTIO_BLK_F_FLUSH (9) Cache flush command support.</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-</div><div class='ctx'>   Device configuration layout The capacity of the device</div><div class='ctx'>   (expressed in 512-byte sectors) is always present. The</div><div class='ctx'>   availability of the others all depend on various feature bits</div><div class='hunk'>@@ -1743,8 +1762,6 @@ device except where noted.</div><div class='ctx'>   If the VIRTIO_BLK_F_RO feature is set by the device, any write</div><div class='ctx'>   requests will fail.</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-</div><div class='ctx'>   Device Operation</div><div class='ctx'> </div><div class='ctx'> The driver queues requests to the virtqueue, and they are used by</div><div class='hunk'>@@ -1805,7 +1822,7 @@ the FLUSH and FLUSH_OUT types are equivalent, the device does not</div><div class='ctx'> distinguish between them</div><div class='ctx'> ]). If the device has VIRTIO_BLK_F_BARRIER feature the high bit</div><div class='ctx'> (VIRTIO_BLK_T_BARRIER) indicates that this request acts as a</div><div class='del'>-barrier and that all preceding requests must be complete before</div><div class='add'>+barrier and that all preceeding requests must be complete before</div><div class='ctx'> this one, and all following requests must not be started until</div><div class='ctx'> this is complete. Note that a barrier does not flush caches in</div><div class='ctx'> the underlying backend device in host, and thus does not serve as</div><div class='hunk'>@@ -2118,7 +2135,7 @@ This is historical, and independent of the guest page size</div><div class='ctx'> </div><div class='ctx'>   Otherwise, the guest may begin to re-use pages previously given</div><div class='ctx'>     to the balloon before the device has acknowledged their</div><div class='del'>-    withdrawal. [footnote:</div><div class='add'>+    withdrawl. [footnote:</div><div class='ctx'> In this case, deflation advice is merely a courtesy</div><div class='ctx'> ]</div><div class='ctx'> </div><div class='hunk'>@@ -2198,3 +2215,996 @@ as follows:</div><div class='ctx'>   VIRTIO_BALLOON_S_MEMTOT The total amount of memory available</div><div class='ctx'>   (in bytes).</div><div class='ctx'> </div><div class='add'>+Appendix H: Rpmsg: Remote Processor Messaging</div><div class='add'>+</div><div class='add'>+Virtio rpmsg devices represent remote processors on the system</div><div class='add'>+which run in asymmetric multi-processing (AMP) configuration, and</div><div class='add'>+which are usually used to offload cpu-intensive tasks from the</div><div class='add'>+main application processor (a typical SoC methodology).</div><div class='add'>+</div><div class='add'>+Virtio is being used to communicate with those remote processors;</div><div class='add'>+empty buffers are placed in one virtqueue for receiving messages,</div><div class='add'>+and non-empty buffers, containing outbound messages, are enqueued</div><div class='add'>+in a second virtqueue for transmission.</div><div class='add'>+</div><div class='add'>+Numerous communication channels can be multiplexed over those two</div><div class='add'>+virtqueues, so different entities, running on the application and</div><div class='add'>+remote processor, can directly communicate in a point-to-point</div><div class='add'>+fashion.</div><div class='add'>+</div><div class='add'>+  Configuration</div><div class='add'>+</div><div class='add'>+  Subsystem Device ID 7</div><div class='add'>+</div><div class='add'>+  Virtqueues 0:receiveq. 1:transmitq.</div><div class='add'>+</div><div class='add'>+  Feature bits</div><div class='add'>+</div><div class='add'>+  VIRTIO_RPMSG_F_NS (0) Device sends (and capable of receiving)</div><div class='add'>+    name service messages announcing the creation (or</div><div class='add'>+    destruction) of a channel:/**</div><div class='add'>+</div><div class='add'>+ * struct rpmsg_ns_msg - dynamic name service announcement</div><div class='add'>+message</div><div class='add'>+</div><div class='add'>+ * @name: name of remote service that is published</div><div class='add'>+</div><div class='add'>+ * @addr: address of remote service that is published</div><div class='add'>+</div><div class='add'>+ * @flags: indicates whether service is created or destroyed</div><div class='add'>+</div><div class='add'>+ *</div><div class='add'>+</div><div class='add'>+ * This message is sent across to publish a new service (or</div><div class='add'>+announce</div><div class='add'>+</div><div class='add'>+ * about its removal). When we receives these messages, an</div><div class='add'>+appropriate</div><div class='add'>+</div><div class='add'>+ * rpmsg channel (i.e device) is created/destroyed.</div><div class='add'>+</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct rpmsg_ns_msgoon_config {</div><div class='add'>+</div><div class='add'>+	char name[RPMSG_NAME_SIZE];</div><div class='add'>+</div><div class='add'>+	u32 addr;</div><div class='add'>+</div><div class='add'>+	u32 flags;</div><div class='add'>+</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+</div><div class='add'>+ * enum rpmsg_ns_flags - dynamic name service announcement flags</div><div class='add'>+</div><div class='add'>+ *</div><div class='add'>+</div><div class='add'>+ * @RPMSG_NS_CREATE: a new remote service was just created</div><div class='add'>+</div><div class='add'>+ * @RPMSG_NS_DESTROY: a remote service was just destroyed</div><div class='add'>+</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+enum rpmsg_ns_flags {</div><div class='add'>+</div><div class='add'>+	RPMSG_NS_CREATE = 0,</div><div class='add'>+</div><div class='add'>+	RPMSG_NS_DESTROY = 1,</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+  Device configuration layout</div><div class='add'>+</div><div class='add'>+At his point none currently defined.</div><div class='add'>+</div><div class='add'>+  Device Initialization</div><div class='add'>+</div><div class='add'>+  The initialization routine should identify the receive and</div><div class='add'>+  transmission virtqueues.</div><div class='add'>+</div><div class='add'>+  The receive virtqueue should be filled with receive buffers.</div><div class='add'>+</div><div class='add'>+  Device Operation</div><div class='add'>+</div><div class='add'>+Messages are transmitted by placing them in the transmitq, and</div><div class='add'>+buffers for inbound messages are placed in the receiveq. In any</div><div class='add'>+case, messages are always preceded by the following header: /**</div><div class='add'>+</div><div class='add'>+ * struct rpmsg_hdr - common header for all rpmsg messages</div><div class='add'>+</div><div class='add'>+ * @src: source address</div><div class='add'>+</div><div class='add'>+ * @dst: destination address</div><div class='add'>+</div><div class='add'>+ * @reserved: reserved for future use</div><div class='add'>+</div><div class='add'>+ * @len: length of payload (in bytes)</div><div class='add'>+</div><div class='add'>+ * @flags: message flags</div><div class='add'>+</div><div class='add'>+ * @data: @len bytes of message payload data</div><div class='add'>+</div><div class='add'>+ *</div><div class='add'>+</div><div class='add'>+ * Every message sent(/received) on the rpmsg bus begins with</div><div class='add'>+this header.</div><div class='add'>+</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct rpmsg_hdr {</div><div class='add'>+</div><div class='add'>+	u32 src;</div><div class='add'>+</div><div class='add'>+	u32 dst;</div><div class='add'>+</div><div class='add'>+	u32 reserved;</div><div class='add'>+</div><div class='add'>+	u16 len;</div><div class='add'>+</div><div class='add'>+	u16 flags;</div><div class='add'>+</div><div class='add'>+	u8 data[0];</div><div class='add'>+</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+Appendix I: SCSI Host Device</div><div class='add'>+</div><div class='add'>+The virtio SCSI host device groups together one or more virtual</div><div class='add'>+logical units (such as disks), and allows communicating to them</div><div class='add'>+using the SCSI protocol. An instance of the device represents a</div><div class='add'>+SCSI host to which many targets and LUNs are attached.</div><div class='add'>+</div><div class='add'>+The virtio SCSI device services two kinds of requests:</div><div class='add'>+</div><div class='add'>+  command requests for a logical unit;</div><div class='add'>+</div><div class='add'>+  task management functions related to a logical unit, target or</div><div class='add'>+  command.</div><div class='add'>+</div><div class='add'>+The device is also able to send out notifications about added and</div><div class='add'>+removed logical units. Together, these capabilities provide a</div><div class='add'>+SCSI transport protocol that uses virtqueues as the transfer</div><div class='add'>+medium. In the transport protocol, the virtio driver acts as the</div><div class='add'>+initiator, while the virtio SCSI host provides one or more</div><div class='add'>+targets that receive and process the requests.</div><div class='add'>+</div><div class='add'>+  Configuration</div><div class='add'>+</div><div class='add'>+  Subsystem Device ID 8</div><div class='add'>+</div><div class='add'>+  Virtqueues 0:controlq; 1:eventq; 2..n:request queues.</div><div class='add'>+</div><div class='add'>+  Feature bits</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_F_INOUT (0) A single request can include both</div><div class='add'>+    read-only and write-only data buffers.</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_F_HOTPLUG (1) The host should enable</div><div class='add'>+    hot-plug/hot-unplug of new LUNs and targets on the SCSI bus.</div><div class='add'>+</div><div class='add'>+  Device configuration layout All fields of this configuration</div><div class='add'>+  are always available. sense_size and cdb_size are writable by</div><div class='add'>+  the guest.struct virtio_scsi_config {</div><div class='add'>+</div><div class='add'>+    u32 num_queues;</div><div class='add'>+</div><div class='add'>+    u32 seg_max;</div><div class='add'>+</div><div class='add'>+    u32 max_sectors;</div><div class='add'>+</div><div class='add'>+    u32 cmd_per_lun;</div><div class='add'>+</div><div class='add'>+    u32 event_info_size;</div><div class='add'>+</div><div class='add'>+    u32 sense_size;</div><div class='add'>+</div><div class='add'>+    u32 cdb_size;</div><div class='add'>+</div><div class='add'>+    u16 max_channel;</div><div class='add'>+</div><div class='add'>+    u16 max_target;</div><div class='add'>+</div><div class='add'>+    u32 max_lun;</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+  num_queues is the total number of request virtqueues exposed by</div><div class='add'>+    the device. The driver is free to use only one request queue,</div><div class='add'>+    or it can use more to achieve better performance.</div><div class='add'>+</div><div class='add'>+  seg_max is the maximum number of segments that can be in a</div><div class='add'>+    command. A bidirectional command can include seg_max input</div><div class='add'>+    segments and seg_max output segments.</div><div class='add'>+</div><div class='add'>+  max_sectors is a hint to the guest about the maximum transfer</div><div class='add'>+    size it should use.</div><div class='add'>+</div><div class='add'>+  cmd_per_lun is a hint to the guest about the maximum number of</div><div class='add'>+    linked commands it should send to one LUN. The actual value</div><div class='add'>+    to be used is the minimum of cmd_per_lun and the virtqueue</div><div class='add'>+    size.</div><div class='add'>+</div><div class='add'>+  event_info_size is the maximum size that the device will fill</div><div class='add'>+    for buffers that the driver places in the eventq. The driver</div><div class='add'>+    should always put buffers at least of this size. It is</div><div class='add'>+    written by the device depending on the set of negotated</div><div class='add'>+    features.</div><div class='add'>+</div><div class='add'>+  sense_size is the maximum size of the sense data that the</div><div class='add'>+    device will write. The default value is written by the device</div><div class='add'>+    and will always be 96, but the driver can modify it. It is</div><div class='add'>+    restored to the default when the device is reset.</div><div class='add'>+</div><div class='add'>+  cdb_size is the maximum size of the CDB that the driver will</div><div class='add'>+    write. The default value is written by the device and will</div><div class='add'>+    always be 32, but the driver can likewise modify it. It is</div><div class='add'>+    restored to the default when the device is reset.</div><div class='add'>+</div><div class='add'>+  max_channel, max_target and max_lun can be used by the driver</div><div class='add'>+    as hints to constrain scanning the logical units on the</div><div class='add'>+    host.h</div><div class='add'>+</div><div class='add'>+  Device Initialization</div><div class='add'>+</div><div class='add'>+The initialization routine should first of all discover the</div><div class='add'>+device's virtqueues.</div><div class='add'>+</div><div class='add'>+If the driver uses the eventq, it should then place at least a</div><div class='add'>+buffer in the eventq.</div><div class='add'>+</div><div class='add'>+The driver can immediately issue requests (for example, INQUIRY</div><div class='add'>+or REPORT LUNS) or task management functions (for example, I_T</div><div class='add'>+RESET).</div><div class='add'>+</div><div class='add'>+  Device Operation: request queues</div><div class='add'>+</div><div class='add'>+The driver queues requests to an arbitrary request queue, and</div><div class='add'>+they are used by the device on that same queue. It is the</div><div class='add'>+responsibility of the driver to ensure strict request ordering</div><div class='add'>+for commands placed on different queues, because they will be</div><div class='add'>+consumed with no order constraints.</div><div class='add'>+</div><div class='add'>+Requests have the following format:</div><div class='add'>+</div><div class='add'>+struct virtio_scsi_req_cmd {</div><div class='add'>+</div><div class='add'>+    // Read-only</div><div class='add'>+</div><div class='add'>+    u8 lun[8];</div><div class='add'>+</div><div class='add'>+    u64 id;</div><div class='add'>+</div><div class='add'>+    u8 task_attr;</div><div class='add'>+</div><div class='add'>+    u8 prio;</div><div class='add'>+</div><div class='add'>+    u8 crn;</div><div class='add'>+</div><div class='add'>+    char cdb[cdb_size];</div><div class='add'>+</div><div class='add'>+    char dataout[];</div><div class='add'>+</div><div class='add'>+    // Write-only part</div><div class='add'>+</div><div class='add'>+    u32 sense_len;</div><div class='add'>+</div><div class='add'>+    u32 residual;</div><div class='add'>+</div><div class='add'>+    u16 status_qualifier;</div><div class='add'>+</div><div class='add'>+    u8 status;</div><div class='add'>+</div><div class='add'>+    u8 response;</div><div class='add'>+</div><div class='add'>+    u8 sense[sense_size];</div><div class='add'>+</div><div class='add'>+    char datain[];</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* command-specific response values */</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_OK                0</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_OVERRUN           1</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_ABORTED           2</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_BAD_TARGET        3</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_RESET             4</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_BUSY              5</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_TRANSPORT_FAILURE 6</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_TARGET_FAILURE    7</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_NEXUS_FAILURE     8</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_FAILURE           9</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* task_attr */</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_SIMPLE            0</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_ORDERED           1</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_HEAD              2</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_ACA               3</div><div class='add'>+</div><div class='add'>+The lun field addresses a target and logical unit in the</div><div class='add'>+virtio-scsi device's SCSI domain. The only supported format for</div><div class='add'>+the LUN field is: first byte set to 1, second byte set to target,</div><div class='add'>+third and fourth byte representing a single level LUN structure,</div><div class='add'>+followed by four zero bytes. With this representation, a</div><div class='add'>+virtio-scsi device can serve up to 256 targets and 16384 LUNs per</div><div class='add'>+target.</div><div class='add'>+</div><div class='add'>+The id field is the command identifier (“tag”).</div><div class='add'>+</div><div class='add'>+task_attr, prio and crn should be left to zero. task_attr defines</div><div class='add'>+the task attribute as in the table above, but all task attributes</div><div class='add'>+may be mapped to SIMPLE by the device; crn may also be provided</div><div class='add'>+by clients, but is generally expected to be 0. The maximum CRN</div><div class='add'>+value defined by the protocol is 255, since CRN is stored in an</div><div class='add'>+8-bit integer.</div><div class='add'>+</div><div class='add'>+All of these fields are defined in SAM. They are always</div><div class='add'>+read-only, as are the cdb and dataout field. The cdb_size is</div><div class='add'>+taken from the configuration space.</div><div class='add'>+</div><div class='add'>+sense and subsequent fields are always write-only. The sense_len</div><div class='add'>+field indicates the number of bytes actually written to the sense</div><div class='add'>+buffer. The residual field indicates the residual size,</div><div class='add'>+calculated as “data_length - number_of_transferred_bytes”, for</div><div class='add'>+read or write operations. For bidirectional commands, the</div><div class='add'>+number_of_transferred_bytes includes both read and written bytes.</div><div class='add'>+A residual field that is less than the size of datain means that</div><div class='add'>+the dataout field was processed entirely. A residual field that</div><div class='add'>+exceeds the size of datain means that the dataout field was</div><div class='add'>+processed partially and the datain field was not processed at</div><div class='add'>+all.</div><div class='add'>+</div><div class='add'>+The status byte is written by the device to be the status code as</div><div class='add'>+defined in SAM.</div><div class='add'>+</div><div class='add'>+The response byte is written by the device to be one of the</div><div class='add'>+following:</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_S_OK when the request was completed and the status</div><div class='add'>+  byte is filled with a SCSI status code (not necessarily</div><div class='add'>+  "GOOD").</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_S_OVERRUN if the content of the CDB requires</div><div class='add'>+  transferring more data than is available in the data buffers.</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_S_ABORTED if the request was cancelled due to an</div><div class='add'>+  ABORT TASK or ABORT TASK SET task management function.</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_S_BAD_TARGET if the request was never processed</div><div class='add'>+  because the target indicated by the lun field does not exist.</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_S_RESET if the request was cancelled due to a bus</div><div class='add'>+  or device reset (including a task management function).</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_S_TRANSPORT_FAILURE if the request failed due to a</div><div class='add'>+  problem in the connection between the host and the target</div><div class='add'>+  (severed link).</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_S_TARGET_FAILURE if the target is suffering a</div><div class='add'>+  failure and the guest should not retry on other paths.</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_S_NEXUS_FAILURE if the nexus is suffering a failure</div><div class='add'>+  but retrying on other paths might yield a different result.</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_S_BUSY if the request failed but retrying on the</div><div class='add'>+  same path should work.</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_S_FAILURE for other host or guest error. In</div><div class='add'>+  particular, if neither dataout nor datain is empty, and the</div><div class='add'>+  VIRTIO_SCSI_F_INOUT feature has not been negotiated, the</div><div class='add'>+  request will be immediately returned with a response equal to</div><div class='add'>+  VIRTIO_SCSI_S_FAILURE.</div><div class='add'>+</div><div class='add'>+  Device Operation: controlq</div><div class='add'>+</div><div class='add'>+The controlq is used for other SCSI transport operations.</div><div class='add'>+Requests have the following format:</div><div class='add'>+</div><div class='add'>+struct virtio_scsi_ctrl {</div><div class='add'>+</div><div class='add'>+    u32 type;</div><div class='add'>+</div><div class='add'>+    ...</div><div class='add'>+</div><div class='add'>+    u8 response;</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* response values valid for all commands */</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_OK                       0</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_BAD_TARGET               3</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_BUSY                     5</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_TRANSPORT_FAILURE        6</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_TARGET_FAILURE           7</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_NEXUS_FAILURE            8</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_FAILURE                  9</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_INCORRECT_LUN            12</div><div class='add'>+</div><div class='add'>+The type identifies the remaining fields.</div><div class='add'>+</div><div class='add'>+The following commands are defined:</div><div class='add'>+</div><div class='add'>+  Task management function</div><div class='add'>+#define VIRTIO_SCSI_T_TMF                      0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_T_TMF_ABORT_TASK           0</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_T_TMF_ABORT_TASK_SET       1</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_T_TMF_CLEAR_ACA            2</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_T_TMF_CLEAR_TASK_SET       3</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_T_TMF_I_T_NEXUS_RESET      4</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_T_TMF_LOGICAL_UNIT_RESET   5</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_T_TMF_QUERY_TASK           6</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_T_TMF_QUERY_TASK_SET       7</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct virtio_scsi_ctrl_tmf</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+    // Read-only part</div><div class='add'>+</div><div class='add'>+    u32 type;</div><div class='add'>+</div><div class='add'>+    u32 subtype;</div><div class='add'>+</div><div class='add'>+    u8 lun[8];</div><div class='add'>+</div><div class='add'>+    u64 id;</div><div class='add'>+</div><div class='add'>+    // Write-only part</div><div class='add'>+</div><div class='add'>+    u8 response;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* command-specific response values */</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_FUNCTION_COMPLETE        0</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_FUNCTION_SUCCEEDED       10</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_S_FUNCTION_REJECTED        11</div><div class='add'>+</div><div class='add'>+  The type is VIRTIO_SCSI_T_TMF; the subtype field defines. All</div><div class='add'>+  fields except response are filled by the driver. The subtype</div><div class='add'>+  field must always be specified and identifies the requested</div><div class='add'>+  task management function.</div><div class='add'>+</div><div class='add'>+  Other fields may be irrelevant for the requested TMF; if so,</div><div class='add'>+  they are ignored but they should still be present. The lun</div><div class='add'>+  field is in the same format specified for request queues; the</div><div class='add'>+  single level LUN is ignored when the task management function</div><div class='add'>+  addresses a whole I_T nexus. When relevant, the value of the id</div><div class='add'>+  field is matched against the id values passed on the requestq.</div><div class='add'>+</div><div class='add'>+  The outcome of the task management function is written by the</div><div class='add'>+  device in the response field. The command-specific response</div><div class='add'>+  values map 1-to-1 with those defined in SAM.</div><div class='add'>+</div><div class='add'>+  Asynchronous notification query</div><div class='add'>+#define VIRTIO_SCSI_T_AN_QUERY                    1</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct virtio_scsi_ctrl_an {</div><div class='add'>+</div><div class='add'>+    // Read-only part</div><div class='add'>+</div><div class='add'>+    u32 type;</div><div class='add'>+</div><div class='add'>+    u8  lun[8];</div><div class='add'>+</div><div class='add'>+    u32 event_requested;</div><div class='add'>+</div><div class='add'>+    // Write-only part</div><div class='add'>+</div><div class='add'>+    u32 event_actual;</div><div class='add'>+</div><div class='add'>+    u8  response;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_EVT_ASYNC_OPERATIONAL_CHANGE  2</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_EVT_ASYNC_POWER_MGMT          4</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_EVT_ASYNC_EXTERNAL_REQUEST    8</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_EVT_ASYNC_MEDIA_CHANGE        16</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_EVT_ASYNC_MULTI_HOST          32</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_EVT_ASYNC_DEVICE_BUSY         64</div><div class='add'>+</div><div class='add'>+  By sending this command, the driver asks the device which</div><div class='add'>+  events the given LUN can report, as described in paragraphs 6.6</div><div class='add'>+  and A.6 of the SCSI MMC specification. The driver writes the</div><div class='add'>+  events it is interested in into the event_requested; the device</div><div class='add'>+  responds by writing the events that it supports into</div><div class='add'>+  event_actual.</div><div class='add'>+</div><div class='add'>+  The type is VIRTIO_SCSI_T_AN_QUERY. The lun and event_requested</div><div class='add'>+  fields are written by the driver. The event_actual and response</div><div class='add'>+  fields are written by the device.</div><div class='add'>+</div><div class='add'>+  No command-specific values are defined for the response byte.</div><div class='add'>+</div><div class='add'>+  Asynchronous notification subscription</div><div class='add'>+#define VIRTIO_SCSI_T_AN_SUBSCRIBE                2</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct virtio_scsi_ctrl_an {</div><div class='add'>+</div><div class='add'>+    // Read-only part</div><div class='add'>+</div><div class='add'>+    u32 type;</div><div class='add'>+</div><div class='add'>+    u8  lun[8];</div><div class='add'>+</div><div class='add'>+    u32 event_requested;</div><div class='add'>+</div><div class='add'>+    // Write-only part</div><div class='add'>+</div><div class='add'>+    u32 event_actual;</div><div class='add'>+</div><div class='add'>+    u8  response;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+  By sending this command, the driver asks the specified LUN to</div><div class='add'>+  report events for its physical interface, again as described in</div><div class='add'>+  the SCSI MMC specification. The driver writes the events it is</div><div class='add'>+  interested in into the event_requested; the device responds by</div><div class='add'>+  writing the events that it supports into event_actual.</div><div class='add'>+</div><div class='add'>+  Event types are the same as for the asynchronous notification</div><div class='add'>+  query message.</div><div class='add'>+</div><div class='add'>+  The type is VIRTIO_SCSI_T_AN_SUBSCRIBE. The lun and</div><div class='add'>+  event_requested fields are written by the driver. The</div><div class='add'>+  event_actual and response fields are written by the device.</div><div class='add'>+</div><div class='add'>+  No command-specific values are defined for the response byte.</div><div class='add'>+</div><div class='add'>+  Device Operation: eventq</div><div class='add'>+</div><div class='add'>+The eventq is used by the device to report information on logical</div><div class='add'>+units that are attached to it. The driver should always leave a</div><div class='add'>+few buffers ready in the eventq. In general, the device will not</div><div class='add'>+queue events to cope with an empty eventq, and will end up</div><div class='add'>+dropping events if it finds no buffer ready. However, when</div><div class='add'>+reporting events for many LUNs (e.g. when a whole target</div><div class='add'>+disappears), the device can throttle events to avoid dropping</div><div class='add'>+them. For this reason, placing 10-15 buffers on the event queue</div><div class='add'>+should be enough.</div><div class='add'>+</div><div class='add'>+Buffers are placed in the eventq and filled by the device when</div><div class='add'>+interesting events occur. The buffers should be strictly</div><div class='add'>+write-only (device-filled) and the size of the buffers should be</div><div class='add'>+at least the value given in the device's configuration</div><div class='add'>+information.</div><div class='add'>+</div><div class='add'>+Buffers returned by the device on the eventq will be referred to</div><div class='add'>+as "events" in the rest of this section. Events have the</div><div class='add'>+following format:</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_T_EVENTS_MISSED   0x80000000</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct virtio_scsi_event {</div><div class='add'>+</div><div class='add'>+    // Write-only part</div><div class='add'>+</div><div class='add'>+    u32 event;</div><div class='add'>+</div><div class='add'>+    ...</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+If bit 31 is set in the event field, the device failed to report</div><div class='add'>+an event due to missing buffers. In this case, the driver should</div><div class='add'>+poll the logical units for unit attention conditions, and/or do</div><div class='add'>+whatever form of bus scan is appropriate for the guest operating</div><div class='add'>+system.</div><div class='add'>+</div><div class='add'>+Other data that the device writes to the buffer depends on the</div><div class='add'>+contents of the event field. The following events are defined:</div><div class='add'>+</div><div class='add'>+  No event</div><div class='add'>+#define VIRTIO_SCSI_T_NO_EVENT         0</div><div class='add'>+</div><div class='add'>+  This event is fired in the following cases:</div><div class='add'>+</div><div class='add'>+  When the device detects in the eventq a buffer that is shorter</div><div class='add'>+    than what is indicated in the configuration field, it might</div><div class='add'>+    use it immediately and put this dummy value in the event</div><div class='add'>+    field. A well-written driver will never observe this</div><div class='add'>+    situation.</div><div class='add'>+</div><div class='add'>+  When events are dropped, the device may signal this event as</div><div class='add'>+    soon as the drivers makes a buffer available, in order to</div><div class='add'>+    request action from the driver. In this case, of course, this</div><div class='add'>+    event will be reported with the VIRTIO_SCSI_T_EVENTS_MISSED</div><div class='add'>+    flag.</div><div class='add'>+</div><div class='add'>+  Transport reset</div><div class='add'>+#define VIRTIO_SCSI_T_TRANSPORT_RESET  1</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct virtio_scsi_event_reset {</div><div class='add'>+</div><div class='add'>+    // Write-only part</div><div class='add'>+</div><div class='add'>+    u32 event;</div><div class='add'>+</div><div class='add'>+    u8  lun[8];</div><div class='add'>+</div><div class='add'>+    u32 reason;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_EVT_RESET_HARD         0</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_EVT_RESET_RESCAN       1</div><div class='add'>+</div><div class='add'>+#define VIRTIO_SCSI_EVT_RESET_REMOVED      2</div><div class='add'>+</div><div class='add'>+  By sending this event, the device signals that a logical unit</div><div class='add'>+  on a target has been reset, including the case of a new device</div><div class='add'>+  appearing or disappearing on the bus.The device fills in all</div><div class='add'>+  fields. The event field is set to</div><div class='add'>+  VIRTIO_SCSI_T_TRANSPORT_RESET. The lun field addresses a</div><div class='add'>+  logical unit in the SCSI host.</div><div class='add'>+</div><div class='add'>+  The reason value is one of the three #define values appearing</div><div class='add'>+  above:</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_EVT_RESET_REMOVED (“LUN/target removed”) is used if</div><div class='add'>+    the target or logical unit is no longer able to receive</div><div class='add'>+    commands.</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_EVT_RESET_HARD (“LUN hard reset”) is used if the</div><div class='add'>+    logical unit has been reset, but is still present.</div><div class='add'>+</div><div class='add'>+  VIRTIO_SCSI_EVT_RESET_RESCAN (“rescan LUN/target”) is used if a</div><div class='add'>+    target or logical unit has just appeared on the device.</div><div class='add'>+</div><div class='add'>+  The “removed” and “rescan” events, when sent for LUN 0, may</div><div class='add'>+  apply to the entire target. After receiving them the driver</div><div class='add'>+  should ask the initiator to rescan the target, in order to</div><div class='add'>+  detect the case when an entire target has appeared or</div><div class='add'>+  disappeared. These two events will never be reported unless the</div><div class='add'>+  VIRTIO_SCSI_F_HOTPLUG feature was negotiated between the host</div><div class='add'>+  and the guest.</div><div class='add'>+</div><div class='add'>+  Events will also be reported via sense codes (this obviously</div><div class='add'>+  does not apply to newly appeared buses or targets, since the</div><div class='add'>+  application has never discovered them):</div><div class='add'>+</div><div class='add'>+  “LUN/target removed” maps to sense key ILLEGAL REQUEST, asc</div><div class='add'>+    0x25, ascq 0x00 (LOGICAL UNIT NOT SUPPORTED)</div><div class='add'>+</div><div class='add'>+  “LUN hard reset” maps to sense key UNIT ATTENTION, asc 0x29</div><div class='add'>+    (POWER ON, RESET OR BUS DEVICE RESET OCCURRED)</div><div class='add'>+</div><div class='add'>+  “rescan LUN/target” maps to sense key UNIT ATTENTION, asc 0x3f,</div><div class='add'>+    ascq 0x0e (REPORTED LUNS DATA HAS CHANGED)</div><div class='add'>+</div><div class='add'>+  The preferred way to detect transport reset is always to use</div><div class='add'>+  events, because sense codes are only seen by the driver when it</div><div class='add'>+  sends a SCSI command to the logical unit or target. However, in</div><div class='add'>+  case events are dropped, the initiator will still be able to</div><div class='add'>+  synchronize with the actual state of the controller if the</div><div class='add'>+  driver asks the initiator to rescan of the SCSI bus. During the</div><div class='add'>+  rescan, the initiator will be able to observe the above sense</div><div class='add'>+  codes, and it will process them as if it the driver had</div><div class='add'>+  received the equivalent event.</div><div class='add'>+</div><div class='add'>+  Asynchronous notification</div><div class='add'>+#define VIRTIO_SCSI_T_ASYNC_NOTIFY     2</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct virtio_scsi_event_an {</div><div class='add'>+</div><div class='add'>+    // Write-only part</div><div class='add'>+</div><div class='add'>+    u32 event;</div><div class='add'>+</div><div class='add'>+    u8  lun[8];</div><div class='add'>+</div><div class='add'>+    u32 reason;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+  By sending this event, the device signals that an asynchronous</div><div class='add'>+  event was fired from a physical interface.</div><div class='add'>+</div><div class='add'>+  All fields are written by the device. The event field is set to</div><div class='add'>+  VIRTIO_SCSI_T_ASYNC_NOTIFY. The lun field addresses a logical</div><div class='add'>+  unit in the SCSI host. The reason field is a subset of the</div><div class='add'>+  events that the driver has subscribed to via the "Asynchronous</div><div class='add'>+  notification subscription" command.</div><div class='add'>+</div><div class='add'>+  When dropped events are reported, the driver should poll for</div><div class='add'>+  asynchronous events manually using SCSI commands.</div><div class='add'>+</div><div class='add'>+Appendix X: virtio-mmio</div><div class='add'>+</div><div class='add'>+Virtual environments without PCI support (a common situation in</div><div class='add'>+embedded devices models) might use simple memory mapped device (“</div><div class='add'>+virtio-mmio”) instead of the PCI device.</div><div class='add'>+</div><div class='add'>+The memory mapped virtio device behaviour is based on the PCI</div><div class='add'>+device specification. Therefore most of operations like device</div><div class='add'>+initialization, queues configuration and buffer transfers are</div><div class='add'>+nearly identical. Existing differences are described in the</div><div class='add'>+following sections.</div><div class='add'>+</div><div class='add'>+  Device Initialization</div><div class='add'>+</div><div class='add'>+Instead of using the PCI IO space for virtio header, the “</div><div class='add'>+virtio-mmio” device provides a set of memory mapped control</div><div class='add'>+registers, all 32 bits wide, followed by device-specific</div><div class='add'>+configuration space. The following list presents their layout:</div><div class='add'>+</div><div class='add'>+  Offset from the device base address | Direction | Name</div><div class='add'>+ Description</div><div class='add'>+</div><div class='add'>+  0x000 | R | MagicValue</div><div class='add'>+ “virt” string.</div><div class='add'>+</div><div class='add'>+  0x004 | R | Version</div><div class='add'>+ Device version number. Currently must be 1.</div><div class='add'>+</div><div class='add'>+  0x008 | R | DeviceID</div><div class='add'>+ Virtio Subsystem Device ID (ie. 1 for network card).</div><div class='add'>+</div><div class='add'>+  0x00c | R | VendorID</div><div class='add'>+ Virtio Subsystem Vendor ID.</div><div class='add'>+</div><div class='add'>+  0x010 | R | HostFeatures</div><div class='add'>+ Flags representing features the device supports.</div><div class='add'>+ Reading from this register returns 32 consecutive flag bits,</div><div class='add'>+  first bit depending on the last value written to</div><div class='add'>+  HostFeaturesSel register. Access to this register returns bits HostFeaturesSel*32</div><div class='add'>+</div><div class='add'>+   to (HostFeaturesSel*32)+31</div><div class='add'>+, eg. feature bits 0 to 31 if</div><div class='add'>+  HostFeaturesSel is set to 0 and features bits 32 to 63 if</div><div class='add'>+  HostFeaturesSel is set to 1. Also see [sub:Feature-Bits]</div><div class='add'>+</div><div class='add'>+  0x014 | W | HostFeaturesSel</div><div class='add'>+ Device (Host) features word selection.</div><div class='add'>+ Writing to this register selects a set of 32 device feature bits</div><div class='add'>+  accessible by reading from HostFeatures register. Device driver</div><div class='add'>+  must write a value to the HostFeaturesSel register before</div><div class='add'>+  reading from the HostFeatures register.</div><div class='add'>+</div><div class='add'>+  0x020 | W | GuestFeatures</div><div class='add'>+ Flags representing device features understood and activated by</div><div class='add'>+  the driver.</div><div class='add'>+ Writing to this register sets 32 consecutive flag bits, first</div><div class='add'>+  bit depending on the last value written to GuestFeaturesSel</div><div class='add'>+  register. Access to this register sets bits GuestFeaturesSel*32</div><div class='add'>+</div><div class='add'>+   to (GuestFeaturesSel*32)+31</div><div class='add'>+, eg. feature bits 0 to 31 if</div><div class='add'>+  GuestFeaturesSel is set to 0 and features bits 32 to 63 if</div><div class='add'>+  GuestFeaturesSel is set to 1. Also see [sub:Feature-Bits]</div><div class='add'>+</div><div class='add'>+  0x024 | W | GuestFeaturesSel</div><div class='add'>+ Activated (Guest) features word selection.</div><div class='add'>+ Writing to this register selects a set of 32 activated feature</div><div class='add'>+  bits accessible by writing to the GuestFeatures register.</div><div class='add'>+  Device driver must write a value to the GuestFeaturesSel</div><div class='add'>+  register before writing to the GuestFeatures register.</div><div class='add'>+</div><div class='add'>+  0x028 | W | GuestPageSize</div><div class='add'>+ Guest page size.</div><div class='add'>+ Device driver must write the guest page size in bytes to the</div><div class='add'>+  register during initialization, before any queues are used.</div><div class='add'>+  This value must be a power of 2 and is used by the Host to</div><div class='add'>+  calculate Guest address of the first queue page (see QueuePFN).</div><div class='add'>+</div><div class='add'>+  0x030 | W | QueueSel</div><div class='add'>+ Virtual queue index (first queue is 0).</div><div class='add'>+ Writing to this register selects the virtual queue that the</div><div class='add'>+  following operations on QueueNum, QueueAlign and QueuePFN apply</div><div class='add'>+  to.</div><div class='add'>+</div><div class='add'>+  0x034 | R | QueueNumMax</div><div class='add'>+ Maximum virtual queue size.</div><div class='add'>+ Reading from the register returns the maximum size of the queue</div><div class='add'>+  the Host is ready to process or zero (0x0) if the queue is not</div><div class='add'>+  available. This applies to the queue selected by writing to</div><div class='add'>+  QueueSel and is allowed only when QueuePFN is set to zero</div><div class='add'>+  (0x0), so when the queue is not actively used.</div><div class='add'>+</div><div class='add'>+  0x038 | W | QueueNum</div><div class='add'>+ Virtual queue size.</div><div class='add'>+ Queue size is a number of elements in the queue, therefore size</div><div class='add'>+  of the descriptor table and both available and used rings.</div><div class='add'>+ Writing to this register notifies the Host what size of the</div><div class='add'>+  queue the Guest will use. This applies to the queue selected by</div><div class='add'>+  writing to QueueSel.</div><div class='add'>+</div><div class='add'>+  0x03c | W | QueueAlign</div><div class='add'>+ Used Ring alignment in the virtual queue.</div><div class='add'>+ Writing to this register notifies the Host about alignment</div><div class='add'>+  boundary of the Used Ring in bytes. This value must be a power</div><div class='add'>+  of 2 and applies to the queue selected by writing to QueueSel.</div><div class='add'>+</div><div class='add'>+  0x040 | RW | QueuePFN</div><div class='add'>+ Guest physical page number of the virtual queue.</div><div class='add'>+ Writing to this register notifies the host about location of the</div><div class='add'>+  virtual queue in the Guest's physical address space. This value</div><div class='add'>+  is the index number of a page starting with the queue</div><div class='add'>+  Descriptor Table. Value zero (0x0) means physical address zero</div><div class='add'>+  (0x00000000) and is illegal. When the Guest stops using the</div><div class='add'>+  queue it must write zero (0x0) to this register.</div><div class='add'>+ Reading from this register returns the currently used page</div><div class='add'>+  number of the queue, therefore a value other than zero (0x0)</div><div class='add'>+  means that the queue is in use.</div><div class='add'>+ Both read and write accesses apply to the queue selected by</div><div class='add'>+  writing to QueueSel.</div><div class='add'>+</div><div class='add'>+  0x050 | W | QueueNotify</div><div class='add'>+ Queue notifier.</div><div class='add'>+ Writing a queue index to this register notifies the Host that</div><div class='add'>+  there are new buffers to process in the queue.</div><div class='add'>+</div><div class='add'>+  0x60 | R | InterruptStatus</div><div class='add'>+Interrupt status.</div><div class='add'>+Reading from this register returns a bit mask of interrupts</div><div class='add'>+  asserted by the device. An interrupt is asserted if the</div><div class='add'>+  corresponding bit is set, ie. equals one (1).</div><div class='add'>+</div><div class='add'>+  Bit 0 | Used Ring Update</div><div class='add'>+This interrupt is asserted when the Host has updated the Used</div><div class='add'>+    Ring in at least one of the active virtual queues.</div><div class='add'>+</div><div class='add'>+  Bit 1 | Configuration change</div><div class='add'>+This interrupt is asserted when configuration of the device has</div><div class='add'>+    changed.</div><div class='add'>+</div><div class='add'>+  0x064 | W | InterruptACK</div><div class='add'>+ Interrupt acknowledge.</div><div class='add'>+ Writing to this register notifies the Host that the Guest</div><div class='add'>+  finished handling interrupts. Set bits in the value clear the</div><div class='add'>+  corresponding bits of the InterruptStatus register.</div><div class='add'>+</div><div class='add'>+  0x070 | RW | Status</div><div class='add'>+ Device status.</div><div class='add'>+ Reading from this register returns the current device status</div><div class='add'>+  flags.</div><div class='add'>+ Writing non-zero values to this register sets the status flags,</div><div class='add'>+  indicating the Guest progress. Writing zero (0x0) to this</div><div class='add'>+  register triggers a device reset.</div><div class='add'>+ Also see [sub:Device-Initialization-Sequence]</div><div class='add'>+</div><div class='add'>+  0x100+ | RW | Config</div><div class='add'>+ Device-specific configuration space starts at an offset 0x100</div><div class='add'>+  and is accessed with byte alignment. Its meaning and size</div><div class='add'>+  depends on the device and the driver.</div><div class='add'>+</div><div class='add'>+Virtual queue size is a number of elements in the queue,</div><div class='add'>+therefore size of the descriptor table and both available and</div><div class='add'>+used rings.</div><div class='add'>+</div><div class='add'>+The endianness of the registers follows the native endianness of</div><div class='add'>+the Guest. Writing to registers described as “R” and reading from</div><div class='add'>+registers described as “W” is not permitted and can cause</div><div class='add'>+undefined behavior.</div><div class='add'>+</div><div class='add'>+The device initialization is performed as described in [sub:Device-Initialization-Sequence]</div><div class='add'>+ with one exception: the Guest must notify the Host about its</div><div class='add'>+page size, writing the size in bytes to GuestPageSize register</div><div class='add'>+before the initialization is finished.</div><div class='add'>+</div><div class='add'>+The memory mapped virtio devices generate single interrupt only,</div><div class='add'>+therefore no special configuration is required.</div><div class='add'>+</div><div class='add'>+  Virtqueue Configuration</div><div class='add'>+</div><div class='add'>+The virtual queue configuration is performed in a similar way to</div><div class='add'>+the one described in [sec:Virtqueue-Configuration] with a few</div><div class='add'>+additional operations:</div><div class='add'>+</div><div class='add'>+  Select the queue writing its index (first queue is 0) to the</div><div class='add'>+  QueueSel register.</div><div class='add'>+</div><div class='add'>+  Check if the queue is not already in use: read QueuePFN</div><div class='add'>+  register, returned value should be zero (0x0).</div><div class='add'>+</div><div class='add'>+  Read maximum queue size (number of elements) from the</div><div class='add'>+  QueueNumMax register. If the returned value is zero (0x0) the</div><div class='add'>+  queue is not available.</div><div class='add'>+</div><div class='add'>+  Allocate and zero the queue pages in contiguous virtual memory,</div><div class='add'>+  aligning the Used Ring to an optimal boundary (usually page</div><div class='add'>+  size). Size of the allocated queue may be smaller than or equal</div><div class='add'>+  to the maximum size returned by the Host.</div><div class='add'>+</div><div class='add'>+  Notify the Host about the queue size by writing the size to</div><div class='add'>+  QueueNum register.</div><div class='add'>+</div><div class='add'>+  Notify the Host about the used alignment by writing its value</div><div class='add'>+  in bytes to QueueAlign register.</div><div class='add'>+</div><div class='add'>+  Write the physical number of the first page of the queue to the</div><div class='add'>+  QueuePFN register.</div><div class='add'>+</div><div class='add'>+The queue and the device are ready to begin normal operations</div><div class='add'>+now.</div><div class='add'>+</div><div class='add'>+  Device Operation</div><div class='add'>+</div><div class='add'>+The memory mapped virtio device behaves in the same way as</div><div class='add'>+described in [sec:Device-Operation], with the following</div><div class='add'>+exceptions:</div><div class='add'>+</div><div class='add'>+  The device is notified about new buffers available in a queue</div><div class='add'>+  by writing the queue index to register QueueNum instead of the</div><div class='add'>+  virtio header in PCI I/O space ([sub:Notifying-The-Device]).</div><div class='add'>+</div><div class='add'>+  The memory mapped virtio device is using single, dedicated</div><div class='add'>+  interrupt signal, which is raised when at least one of the</div><div class='add'>+  interrupts described in the InterruptStatus register</div><div class='add'>+  description is asserted. After receiving an interrupt, the</div><div class='add'>+  driver must read the InterruptStatus register to check what</div><div class='add'>+  caused the interrupt (see the register description). After the</div><div class='add'>+  interrupt is handled, the driver must acknowledge it by writing</div><div class='add'>+  a bit mask corresponding to the serviced interrupt to the</div><div class='add'>+  InterruptACK register.</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/vm/frontswap.txt b/Documentation/vm/frontswap.txt<br/>new file mode 100644<br/>index 000000000000..37067cf455f4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/vm/frontswap.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/vm/frontswap.txt</a></div><div class='hunk'>@@ -0,0 +1,278 @@</div><div class='add'>+Frontswap provides a "transcendent memory" interface for swap pages.</div><div class='add'>+In some environments, dramatic performance savings may be obtained because</div><div class='add'>+swapped pages are saved in RAM (or a RAM-like device) instead of a swap disk.</div><div class='add'>+</div><div class='add'>+(Note, frontswap -- and cleancache (merged at 3.0) -- are the "frontends"</div><div class='add'>+and the only necessary changes to the core kernel for transcendent memory;</div><div class='add'>+all other supporting code -- the "backends" -- is implemented as drivers.</div><div class='add'>+See the LWN.net article "Transcendent memory in a nutshell" for a detailed</div><div class='add'>+overview of frontswap and related kernel parts:</div><div class='add'>+https://lwn.net/Articles/454795/ )</div><div class='add'>+</div><div class='add'>+Frontswap is so named because it can be thought of as the opposite of</div><div class='add'>+a "backing" store for a swap device.  The storage is assumed to be</div><div class='add'>+a synchronous concurrency-safe page-oriented "pseudo-RAM device" conforming</div><div class='add'>+to the requirements of transcendent memory (such as Xen's "tmem", or</div><div class='add'>+in-kernel compressed memory, aka "zcache", or future RAM-like devices);</div><div class='add'>+this pseudo-RAM device is not directly accessible or addressable by the</div><div class='add'>+kernel and is of unknown and possibly time-varying size.  The driver</div><div class='add'>+links itself to frontswap by calling frontswap_register_ops to set the</div><div class='add'>+frontswap_ops funcs appropriately and the functions it provides must</div><div class='add'>+conform to certain policies as follows:</div><div class='add'>+</div><div class='add'>+An "init" prepares the device to receive frontswap pages associated</div><div class='add'>+with the specified swap device number (aka "type").  A "store" will</div><div class='add'>+copy the page to transcendent memory and associate it with the type and</div><div class='add'>+offset associated with the page. A "load" will copy the page, if found,</div><div class='add'>+from transcendent memory into kernel memory, but will NOT remove the page</div><div class='add'>+from from transcendent memory.  An "invalidate_page" will remove the page</div><div class='add'>+from transcendent memory and an "invalidate_area" will remove ALL pages</div><div class='add'>+associated with the swap type (e.g., like swapoff) and notify the "device"</div><div class='add'>+to refuse further stores with that swap type.</div><div class='add'>+</div><div class='add'>+Once a page is successfully stored, a matching load on the page will normally</div><div class='add'>+succeed.  So when the kernel finds itself in a situation where it needs</div><div class='add'>+to swap out a page, it first attempts to use frontswap.  If the store returns</div><div class='add'>+success, the data has been successfully saved to transcendent memory and</div><div class='add'>+a disk write and, if the data is later read back, a disk read are avoided.</div><div class='add'>+If a store returns failure, transcendent memory has rejected the data, and the</div><div class='add'>+page can be written to swap as usual.</div><div class='add'>+</div><div class='add'>+If a backend chooses, frontswap can be configured as a "writethrough</div><div class='add'>+cache" by calling frontswap_writethrough().  In this mode, the reduction</div><div class='add'>+in swap device writes is lost (and also a non-trivial performance advantage)</div><div class='add'>+in order to allow the backend to arbitrarily "reclaim" space used to</div><div class='add'>+store frontswap pages to more completely manage its memory usage.</div><div class='add'>+</div><div class='add'>+Note that if a page is stored and the page already exists in transcendent memory</div><div class='add'>+(a "duplicate" store), either the store succeeds and the data is overwritten,</div><div class='add'>+or the store fails AND the page is invalidated.  This ensures stale data may</div><div class='add'>+never be obtained from frontswap.</div><div class='add'>+</div><div class='add'>+If properly configured, monitoring of frontswap is done via debugfs in</div><div class='add'>+the /sys/kernel/debug/frontswap directory.  The effectiveness of</div><div class='add'>+frontswap can be measured (across all swap devices) with:</div><div class='add'>+</div><div class='add'>+failed_stores	- how many store attempts have failed</div><div class='add'>+loads		- how many loads were attempted (all should succeed)</div><div class='add'>+succ_stores	- how many store attempts have succeeded</div><div class='add'>+invalidates	- how many invalidates were attempted</div><div class='add'>+</div><div class='add'>+A backend implementation may provide additional metrics.</div><div class='add'>+</div><div class='add'>+FAQ</div><div class='add'>+</div><div class='add'>+1) Where's the value?</div><div class='add'>+</div><div class='add'>+When a workload starts swapping, performance falls through the floor.</div><div class='add'>+Frontswap significantly increases performance in many such workloads by</div><div class='add'>+providing a clean, dynamic interface to read and write swap pages to</div><div class='add'>+"transcendent memory" that is otherwise not directly addressable to the kernel.</div><div class='add'>+This interface is ideal when data is transformed to a different form</div><div class='add'>+and size (such as with compression) or secretly moved (as might be</div><div class='add'>+useful for write-balancing for some RAM-like devices).  Swap pages (and</div><div class='add'>+evicted page-cache pages) are a great use for this kind of slower-than-RAM-</div><div class='add'>+but-much-faster-than-disk "pseudo-RAM device" and the frontswap (and</div><div class='add'>+cleancache) interface to transcendent memory provides a nice way to read</div><div class='add'>+and write -- and indirectly "name" -- the pages.</div><div class='add'>+</div><div class='add'>+Frontswap -- and cleancache -- with a fairly small impact on the kernel,</div><div class='add'>+provides a huge amount of flexibility for more dynamic, flexible RAM</div><div class='add'>+utilization in various system configurations:</div><div class='add'>+</div><div class='add'>+In the single kernel case, aka "zcache", pages are compressed and</div><div class='add'>+stored in local memory, thus increasing the total anonymous pages</div><div class='add'>+that can be safely kept in RAM.  Zcache essentially trades off CPU</div><div class='add'>+cycles used in compression/decompression for better memory utilization.</div><div class='add'>+Benchmarks have shown little or no impact when memory pressure is</div><div class='add'>+low while providing a significant performance improvement (25%+)</div><div class='add'>+on some workloads under high memory pressure.</div><div class='add'>+</div><div class='add'>+"RAMster" builds on zcache by adding "peer-to-peer" transcendent memory</div><div class='add'>+support for clustered systems.  Frontswap pages are locally compressed</div><div class='add'>+as in zcache, but then "remotified" to another system's RAM.  This</div><div class='add'>+allows RAM to be dynamically load-balanced back-and-forth as needed,</div><div class='add'>+i.e. when system A is overcommitted, it can swap to system B, and</div><div class='add'>+vice versa.  RAMster can also be configured as a memory server so</div><div class='add'>+many servers in a cluster can swap, dynamically as needed, to a single</div><div class='add'>+server configured with a large amount of RAM... without pre-configuring</div><div class='add'>+how much of the RAM is available for each of the clients!</div><div class='add'>+</div><div class='add'>+In the virtual case, the whole point of virtualization is to statistically</div><div class='add'>+multiplex physical resources acrosst the varying demands of multiple</div><div class='add'>+virtual machines.  This is really hard to do with RAM and efforts to do</div><div class='add'>+it well with no kernel changes have essentially failed (except in some</div><div class='add'>+well-publicized special-case workloads).</div><div class='add'>+Specifically, the Xen Transcendent Memory backend allows otherwise</div><div class='add'>+"fallow" hypervisor-owned RAM to not only be "time-shared" between multiple</div><div class='add'>+virtual machines, but the pages can be compressed and deduplicated to</div><div class='add'>+optimize RAM utilization.  And when guest OS's are induced to surrender</div><div class='add'>+underutilized RAM (e.g. with "selfballooning"), sudden unexpected</div><div class='add'>+memory pressure may result in swapping; frontswap allows those pages</div><div class='add'>+to be swapped to and from hypervisor RAM (if overall host system memory</div><div class='add'>+conditions allow), thus mitigating the potentially awful performance impact</div><div class='add'>+of unplanned swapping.</div><div class='add'>+</div><div class='add'>+A KVM implementation is underway and has been RFC'ed to lkml.  And,</div><div class='add'>+using frontswap, investigation is also underway on the use of NVM as</div><div class='add'>+a memory extension technology.</div><div class='add'>+</div><div class='add'>+2) Sure there may be performance advantages in some situations, but</div><div class='add'>+   what's the space/time overhead of frontswap?</div><div class='add'>+</div><div class='add'>+If CONFIG_FRONTSWAP is disabled, every frontswap hook compiles into</div><div class='add'>+nothingness and the only overhead is a few extra bytes per swapon'ed</div><div class='add'>+swap device.  If CONFIG_FRONTSWAP is enabled but no frontswap "backend"</div><div class='add'>+registers, there is one extra global variable compared to zero for</div><div class='add'>+every swap page read or written.  If CONFIG_FRONTSWAP is enabled</div><div class='add'>+AND a frontswap backend registers AND the backend fails every "store"</div><div class='add'>+request (i.e. provides no memory despite claiming it might),</div><div class='add'>+CPU overhead is still negligible -- and since every frontswap fail</div><div class='add'>+precedes a swap page write-to-disk, the system is highly likely</div><div class='add'>+to be I/O bound and using a small fraction of a percent of a CPU</div><div class='add'>+will be irrelevant anyway.</div><div class='add'>+</div><div class='add'>+As for space, if CONFIG_FRONTSWAP is enabled AND a frontswap backend</div><div class='add'>+registers, one bit is allocated for every swap page for every swap</div><div class='add'>+device that is swapon'd.  This is added to the EIGHT bits (which</div><div class='add'>+was sixteen until about 2.6.34) that the kernel already allocates</div><div class='add'>+for every swap page for every swap device that is swapon'd.  (Hugh</div><div class='add'>+Dickins has observed that frontswap could probably steal one of</div><div class='add'>+the existing eight bits, but let's worry about that minor optimization</div><div class='add'>+later.)  For very large swap disks (which are rare) on a standard</div><div class='add'>+4K pagesize, this is 1MB per 32GB swap.</div><div class='add'>+</div><div class='add'>+When swap pages are stored in transcendent memory instead of written</div><div class='add'>+out to disk, there is a side effect that this may create more memory</div><div class='add'>+pressure that can potentially outweigh the other advantages.  A</div><div class='add'>+backend, such as zcache, must implement policies to carefully (but</div><div class='add'>+dynamically) manage memory limits to ensure this doesn't happen.</div><div class='add'>+</div><div class='add'>+3) OK, how about a quick overview of what this frontswap patch does</div><div class='add'>+   in terms that a kernel hacker can grok?</div><div class='add'>+</div><div class='add'>+Let's assume that a frontswap "backend" has registered during</div><div class='add'>+kernel initialization; this registration indicates that this</div><div class='add'>+frontswap backend has access to some "memory" that is not directly</div><div class='add'>+accessible by the kernel.  Exactly how much memory it provides is</div><div class='add'>+entirely dynamic and random.</div><div class='add'>+</div><div class='add'>+Whenever a swap-device is swapon'd frontswap_init() is called,</div><div class='add'>+passing the swap device number (aka "type") as a parameter.</div><div class='add'>+This notifies frontswap to expect attempts to "store" swap pages</div><div class='add'>+associated with that number.</div><div class='add'>+</div><div class='add'>+Whenever the swap subsystem is readying a page to write to a swap</div><div class='add'>+device (c.f swap_writepage()), frontswap_store is called.  Frontswap</div><div class='add'>+consults with the frontswap backend and if the backend says it does NOT</div><div class='add'>+have room, frontswap_store returns -1 and the kernel swaps the page</div><div class='add'>+to the swap device as normal.  Note that the response from the frontswap</div><div class='add'>+backend is unpredictable to the kernel; it may choose to never accept a</div><div class='add'>+page, it could accept every ninth page, or it might accept every</div><div class='add'>+page.  But if the backend does accept a page, the data from the page</div><div class='add'>+has already been copied and associated with the type and offset,</div><div class='add'>+and the backend guarantees the persistence of the data.  In this case,</div><div class='add'>+frontswap sets a bit in the "frontswap_map" for the swap device</div><div class='add'>+corresponding to the page offset on the swap device to which it would</div><div class='add'>+otherwise have written the data.</div><div class='add'>+</div><div class='add'>+When the swap subsystem needs to swap-in a page (swap_readpage()),</div><div class='add'>+it first calls frontswap_load() which checks the frontswap_map to</div><div class='add'>+see if the page was earlier accepted by the frontswap backend.  If</div><div class='add'>+it was, the page of data is filled from the frontswap backend and</div><div class='add'>+the swap-in is complete.  If not, the normal swap-in code is</div><div class='add'>+executed to obtain the page of data from the real swap device.</div><div class='add'>+</div><div class='add'>+So every time the frontswap backend accepts a page, a swap device read</div><div class='add'>+and (potentially) a swap device write are replaced by a "frontswap backend</div><div class='add'>+store" and (possibly) a "frontswap backend loads", which are presumably much</div><div class='add'>+faster.</div><div class='add'>+</div><div class='add'>+4) Can't frontswap be configured as a "special" swap device that is</div><div class='add'>+   just higher priority than any real swap device (e.g. like zswap,</div><div class='add'>+   or maybe swap-over-nbd/NFS)?</div><div class='add'>+</div><div class='add'>+No.  First, the existing swap subsystem doesn't allow for any kind of</div><div class='add'>+swap hierarchy.  Perhaps it could be rewritten to accomodate a hierarchy,</div><div class='add'>+but this would require fairly drastic changes.  Even if it were</div><div class='add'>+rewritten, the existing swap subsystem uses the block I/O layer which</div><div class='add'>+assumes a swap device is fixed size and any page in it is linearly</div><div class='add'>+addressable.  Frontswap barely touches the existing swap subsystem,</div><div class='add'>+and works around the constraints of the block I/O subsystem to provide</div><div class='add'>+a great deal of flexibility and dynamicity.</div><div class='add'>+</div><div class='add'>+For example, the acceptance of any swap page by the frontswap backend is</div><div class='add'>+entirely unpredictable. This is critical to the definition of frontswap</div><div class='add'>+backends because it grants completely dynamic discretion to the</div><div class='add'>+backend.  In zcache, one cannot know a priori how compressible a page is.</div><div class='add'>+"Poorly" compressible pages can be rejected, and "poorly" can itself be</div><div class='add'>+defined dynamically depending on current memory constraints.</div><div class='add'>+</div><div class='add'>+Further, frontswap is entirely synchronous whereas a real swap</div><div class='add'>+device is, by definition, asynchronous and uses block I/O.  The</div><div class='add'>+block I/O layer is not only unnecessary, but may perform "optimizations"</div><div class='add'>+that are inappropriate for a RAM-oriented device including delaying</div><div class='add'>+the write of some pages for a significant amount of time.  Synchrony is</div><div class='add'>+required to ensure the dynamicity of the backend and to avoid thorny race</div><div class='add'>+conditions that would unnecessarily and greatly complicate frontswap</div><div class='add'>+and/or the block I/O subsystem.  That said, only the initial "store"</div><div class='add'>+and "load" operations need be synchronous.  A separate asynchronous thread</div><div class='add'>+is free to manipulate the pages stored by frontswap.  For example,</div><div class='add'>+the "remotification" thread in RAMster uses standard asynchronous</div><div class='add'>+kernel sockets to move compressed frontswap pages to a remote machine.</div><div class='add'>+Similarly, a KVM guest-side implementation could do in-guest compression</div><div class='add'>+and use "batched" hypercalls.</div><div class='add'>+</div><div class='add'>+In a virtualized environment, the dynamicity allows the hypervisor</div><div class='add'>+(or host OS) to do "intelligent overcommit".  For example, it can</div><div class='add'>+choose to accept pages only until host-swapping might be imminent,</div><div class='add'>+then force guests to do their own swapping.</div><div class='add'>+</div><div class='add'>+There is a downside to the transcendent memory specifications for</div><div class='add'>+frontswap:  Since any "store" might fail, there must always be a real</div><div class='add'>+slot on a real swap device to swap the page.  Thus frontswap must be</div><div class='add'>+implemented as a "shadow" to every swapon'd device with the potential</div><div class='add'>+capability of holding every page that the swap device might have held</div><div class='add'>+and the possibility that it might hold no pages at all.  This means</div><div class='add'>+that frontswap cannot contain more pages than the total of swapon'd</div><div class='add'>+swap devices.  For example, if NO swap device is configured on some</div><div class='add'>+installation, frontswap is useless.  Swapless portable devices</div><div class='add'>+can still use frontswap but a backend for such devices must configure</div><div class='add'>+some kind of "ghost" swap device and ensure that it is never used.</div><div class='add'>+</div><div class='add'>+5) Why this weird definition about "duplicate stores"?  If a page</div><div class='add'>+   has been previously successfully stored, can't it always be</div><div class='add'>+   successfully overwritten?</div><div class='add'>+</div><div class='add'>+Nearly always it can, but no, sometimes it cannot.  Consider an example</div><div class='add'>+where data is compressed and the original 4K page has been compressed</div><div class='add'>+to 1K.  Now an attempt is made to overwrite the page with data that</div><div class='add'>+is non-compressible and so would take the entire 4K.  But the backend</div><div class='add'>+has no more space.  In this case, the store must be rejected.  Whenever</div><div class='add'>+frontswap rejects a store that would overwrite, it also must invalidate</div><div class='add'>+the old data and ensure that it is no longer accessible.  Since the</div><div class='add'>+swap subsystem then writes the new data to the read swap device,</div><div class='add'>+this is the correct course of action to ensure coherency.</div><div class='add'>+</div><div class='add'>+6) What is frontswap_shrink for?</div><div class='add'>+</div><div class='add'>+When the (non-frontswap) swap subsystem swaps out a page to a real</div><div class='add'>+swap device, that page is only taking up low-value pre-allocated disk</div><div class='add'>+space.  But if frontswap has placed a page in transcendent memory, that</div><div class='add'>+page may be taking up valuable real estate.  The frontswap_shrink</div><div class='add'>+routine allows code outside of the swap subsystem to force pages out</div><div class='add'>+of the memory managed by frontswap and back into kernel-addressable memory.</div><div class='add'>+For example, in RAMster, a "suction driver" thread will attempt</div><div class='add'>+to "repatriate" pages sent to a remote machine back to the local machine;</div><div class='add'>+this is driven using the frontswap_shrink mechanism when memory pressure</div><div class='add'>+subsides.</div><div class='add'>+</div><div class='add'>+7) Why does the frontswap patch create the new include file swapfile.h?</div><div class='add'>+</div><div class='add'>+The frontswap code depends on some swap-subsystem-internal data</div><div class='add'>+structures that have, over the years, moved back and forth between</div><div class='add'>+static and global.  This seemed a reasonable compromise:  Define</div><div class='add'>+them as global but declare them in a new include file that isn't</div><div class='add'>+included by the large number of source files that include swap.h.</div><div class='add'>+</div><div class='add'>+Dan Magenheimer, last updated April 9, 2012</div><div class='head'>diff --git a/Documentation/vm/pagemap.txt b/Documentation/vm/pagemap.txt<br/>index 4600cbe3d6be..7587493c67f1 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/vm/pagemap.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/vm/pagemap.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/vm/pagemap.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/vm/pagemap.txt</a></div><div class='hunk'>@@ -16,7 +16,7 @@ There are three components to pagemap:</div><div class='ctx'>     * Bits 0-4   swap type if swapped</div><div class='ctx'>     * Bits 5-54  swap offset if swapped</div><div class='ctx'>     * Bits 55-60 page shift (page size = 1&lt;&lt;page shift)</div><div class='del'>-    * Bit  61    reserved for future use</div><div class='add'>+    * Bit  61    page is file-page or shared-anon</div><div class='ctx'>     * Bit  62    page swapped</div><div class='ctx'>     * Bit  63    page present</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/vm/slub.txt b/Documentation/vm/slub.txt<br/>index 6752870c4970..b0c6d1bbb434 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/vm/slub.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/vm/slub.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/vm/slub.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/vm/slub.txt</a></div><div class='hunk'>@@ -17,7 +17,7 @@ data and perform operation on the slabs. By default slabinfo only lists</div><div class='ctx'> slabs that have data in them. See "slabinfo -h" for more options when</div><div class='ctx'> running the command. slabinfo can be compiled with</div><div class='ctx'> </div><div class='del'>-gcc -o slabinfo tools/slub/slabinfo.c</div><div class='add'>+gcc -o slabinfo tools/vm/slabinfo.c</div><div class='ctx'> </div><div class='ctx'> Some of the modes of operation of slabinfo require that slub debugging</div><div class='ctx'> be enabled on the command line. F.e. no tracking information will be</div><div class='head'>diff --git a/Documentation/vm/transhuge.txt b/Documentation/vm/transhuge.txt<br/>index 29bdf62aac09..f734bb2a78dc 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/vm/transhuge.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/vm/transhuge.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/vm/transhuge.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/vm/transhuge.txt</a></div><div class='hunk'>@@ -166,6 +166,68 @@ behavior. So to make them effective you need to restart any</div><div class='ctx'> application that could have been using hugepages. This also applies to</div><div class='ctx'> the regions registered in khugepaged.</div><div class='ctx'> </div><div class='add'>+== Monitoring usage ==</div><div class='add'>+</div><div class='add'>+The number of transparent huge pages currently used by the system is</div><div class='add'>+available by reading the AnonHugePages field in /proc/meminfo. To</div><div class='add'>+identify what applications are using transparent huge pages, it is</div><div class='add'>+necessary to read /proc/PID/smaps and count the AnonHugePages fields</div><div class='add'>+for each mapping. Note that reading the smaps file is expensive and</div><div class='add'>+reading it frequently will incur overhead.</div><div class='add'>+</div><div class='add'>+There are a number of counters in /proc/vmstat that may be used to</div><div class='add'>+monitor how successfully the system is providing huge pages for use.</div><div class='add'>+</div><div class='add'>+thp_fault_alloc is incremented every time a huge page is successfully</div><div class='add'>+	allocated to handle a page fault. This applies to both the</div><div class='add'>+	first time a page is faulted and for COW faults.</div><div class='add'>+</div><div class='add'>+thp_collapse_alloc is incremented by khugepaged when it has found</div><div class='add'>+	a range of pages to collapse into one huge page and has</div><div class='add'>+	successfully allocated a new huge page to store the data.</div><div class='add'>+</div><div class='add'>+thp_fault_fallback is incremented if a page fault fails to allocate</div><div class='add'>+	a huge page and instead falls back to using small pages.</div><div class='add'>+</div><div class='add'>+thp_collapse_alloc_failed is incremented if khugepaged found a range</div><div class='add'>+	of pages that should be collapsed into one huge page but failed</div><div class='add'>+	the allocation.</div><div class='add'>+</div><div class='add'>+thp_split is incremented every time a huge page is split into base</div><div class='add'>+	pages. This can happen for a variety of reasons but a common</div><div class='add'>+	reason is that a huge page is old and is being reclaimed.</div><div class='add'>+</div><div class='add'>+As the system ages, allocating huge pages may be expensive as the</div><div class='add'>+system uses memory compaction to copy data around memory to free a</div><div class='add'>+huge page for use. There are some counters in /proc/vmstat to help</div><div class='add'>+monitor this overhead.</div><div class='add'>+</div><div class='add'>+compact_stall is incremented every time a process stalls to run</div><div class='add'>+	memory compaction so that a huge page is free for use.</div><div class='add'>+</div><div class='add'>+compact_success is incremented if the system compacted memory and</div><div class='add'>+	freed a huge page for use.</div><div class='add'>+</div><div class='add'>+compact_fail is incremented if the system tries to compact memory</div><div class='add'>+	but failed.</div><div class='add'>+</div><div class='add'>+compact_pages_moved is incremented each time a page is moved. If</div><div class='add'>+	this value is increasing rapidly, it implies that the system</div><div class='add'>+	is copying a lot of data to satisfy the huge page allocation.</div><div class='add'>+	It is possible that the cost of copying exceeds any savings</div><div class='add'>+	from reduced TLB misses.</div><div class='add'>+</div><div class='add'>+compact_pagemigrate_failed is incremented when the underlying mechanism</div><div class='add'>+	for moving a page failed.</div><div class='add'>+</div><div class='add'>+compact_blocks_moved is incremented each time memory compaction examines</div><div class='add'>+	a huge page aligned range of pages.</div><div class='add'>+</div><div class='add'>+It is possible to establish how long the stalls were using the function</div><div class='add'>+tracer to record how long was spent in __alloc_pages_nodemask and</div><div class='add'>+using the mm_page_alloc tracepoint to identify which allocations were</div><div class='add'>+for huge pages.</div><div class='add'>+</div><div class='ctx'> == get_user_pages and follow_page ==</div><div class='ctx'> </div><div class='ctx'> get_user_pages and follow_page if run on a hugepage, will return the</div><div class='head'>diff --git a/drivers/staging/vme/vme_api.txt b/Documentation/vme_api.txt<br/>index 856efa35f6e3..856efa35f6e3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/vme/vme_api.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/vme/vme_api.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/vme_api.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/vme_api.txt</a></div><div class='head'>diff --git a/Documentation/watchdog/src/watchdog-test.c b/Documentation/watchdog/src/watchdog-test.c<br/>index 63fdc34ceb98..73ff5cc93e05 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/watchdog/src/watchdog-test.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/watchdog/src/watchdog-test.c</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/watchdog/src/watchdog-test.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/watchdog/src/watchdog-test.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include &lt;string.h&gt;</div><div class='ctx'> #include &lt;unistd.h&gt;</div><div class='ctx'> #include &lt;fcntl.h&gt;</div><div class='add'>+#include &lt;signal.h&gt;</div><div class='ctx'> #include &lt;sys/ioctl.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/watchdog.h&gt;</div><div class='hunk'>@@ -29,6 +30,14 @@ static void keep_alive(void)</div><div class='ctx'>  * The main program.  Run the program with "-d" to disable the card,</div><div class='ctx'>  * or "-e" to enable the card.</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+void term(int sig)</div><div class='add'>+{</div><div class='add'>+    close(fd);</div><div class='add'>+    fprintf(stderr, "Stopping watchdog ticks...\n");</div><div class='add'>+    exit(0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int main(int argc, char *argv[])</div><div class='ctx'> {</div><div class='ctx'>     int flags;</div><div class='hunk'>@@ -47,26 +56,31 @@ int main(int argc, char *argv[])</div><div class='ctx'> 	    ioctl(fd, WDIOC_SETOPTIONS, &amp;flags);</div><div class='ctx'> 	    fprintf(stderr, "Watchdog card disabled.\n");</div><div class='ctx'> 	    fflush(stderr);</div><div class='del'>-	    exit(0);</div><div class='add'>+	    goto end;</div><div class='ctx'> 	} else if (!strncasecmp(argv[1], "-e", 2)) {</div><div class='ctx'> 	    flags = WDIOS_ENABLECARD;</div><div class='ctx'> 	    ioctl(fd, WDIOC_SETOPTIONS, &amp;flags);</div><div class='ctx'> 	    fprintf(stderr, "Watchdog card enabled.\n");</div><div class='ctx'> 	    fflush(stderr);</div><div class='del'>-	    exit(0);</div><div class='add'>+	    goto end;</div><div class='ctx'> 	} else {</div><div class='ctx'> 	    fprintf(stderr, "-d to disable, -e to enable.\n");</div><div class='ctx'> 	    fprintf(stderr, "run by itself to tick the card.\n");</div><div class='ctx'> 	    fflush(stderr);</div><div class='del'>-	    exit(0);</div><div class='add'>+	    goto end;</div><div class='ctx'> 	}</div><div class='ctx'>     } else {</div><div class='ctx'> 	fprintf(stderr, "Watchdog Ticking Away!\n");</div><div class='ctx'> 	fflush(stderr);</div><div class='ctx'>     }</div><div class='ctx'> </div><div class='add'>+    signal(SIGINT, term);</div><div class='add'>+</div><div class='ctx'>     while(1) {</div><div class='ctx'> 	keep_alive();</div><div class='ctx'> 	sleep(1);</div><div class='ctx'>     }</div><div class='add'>+end:</div><div class='add'>+    close(fd);</div><div class='add'>+    return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/Documentation/watchdog/watchdog-kernel-api.txt b/Documentation/watchdog/watchdog-kernel-api.txt<br/>index 227f6cd0e5fa..086638f6c82d 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/watchdog/watchdog-kernel-api.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/watchdog/watchdog-kernel-api.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/watchdog/watchdog-kernel-api.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/watchdog/watchdog-kernel-api.txt</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> The Linux WatchDog Timer Driver Core kernel API.</div><div class='ctx'> ===============================================</div><div class='del'>-Last reviewed: 16-Mar-2012</div><div class='add'>+Last reviewed: 22-May-2012</div><div class='ctx'> </div><div class='ctx'> Wim Van Sebroeck &lt;wim@iguana.be&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -39,6 +39,10 @@ watchdog_device structure.</div><div class='ctx'> The watchdog device structure looks like this:</div><div class='ctx'> </div><div class='ctx'> struct watchdog_device {</div><div class='add'>+	int id;</div><div class='add'>+	struct cdev cdev;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct device *parent;</div><div class='ctx'> 	const struct watchdog_info *info;</div><div class='ctx'> 	const struct watchdog_ops *ops;</div><div class='ctx'> 	unsigned int bootstatus;</div><div class='hunk'>@@ -46,10 +50,20 @@ struct watchdog_device {</div><div class='ctx'> 	unsigned int min_timeout;</div><div class='ctx'> 	unsigned int max_timeout;</div><div class='ctx'> 	void *driver_data;</div><div class='add'>+	struct mutex lock;</div><div class='ctx'> 	unsigned long status;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> It contains following fields:</div><div class='add'>+* id: set by watchdog_register_device, id 0 is special. It has both a</div><div class='add'>+  /dev/watchdog0 cdev (dynamic major, minor 0) as well as the old</div><div class='add'>+  /dev/watchdog miscdev. The id is set automatically when calling</div><div class='add'>+  watchdog_register_device.</div><div class='add'>+* cdev: cdev for the dynamic /dev/watchdog&lt;id&gt; device nodes. This</div><div class='add'>+  field is also populated by watchdog_register_device.</div><div class='add'>+* dev: device under the watchdog class (created by watchdog_register_device).</div><div class='add'>+* parent: set this to the parent device (or NULL) before calling</div><div class='add'>+  watchdog_register_device.</div><div class='ctx'> * info: a pointer to a watchdog_info structure. This structure gives some</div><div class='ctx'>   additional information about the watchdog timer itself. (Like it's unique name)</div><div class='ctx'> * ops: a pointer to the list of watchdog operations that the watchdog supports.</div><div class='hunk'>@@ -59,8 +73,9 @@ It contains following fields:</div><div class='ctx'> * bootstatus: status of the device after booting (reported with watchdog</div><div class='ctx'>   WDIOF_* status bits).</div><div class='ctx'> * driver_data: a pointer to the drivers private data of a watchdog device.</div><div class='del'>-  This data should only be accessed via the watchdog_set_drvadata and</div><div class='add'>+  This data should only be accessed via the watchdog_set_drvdata and</div><div class='ctx'>   watchdog_get_drvdata routines.</div><div class='add'>+* lock: Mutex for WatchDog Timer Driver Core internal use only.</div><div class='ctx'> * status: this field contains a number of status bits that give extra</div><div class='ctx'>   information about the status of the device (Like: is the watchdog timer</div><div class='ctx'>   running/active, is the nowayout bit set, is the device opened via</div><div class='hunk'>@@ -78,6 +93,8 @@ struct watchdog_ops {</div><div class='ctx'> 	unsigned int (*status)(struct watchdog_device *);</div><div class='ctx'> 	int (*set_timeout)(struct watchdog_device *, unsigned int);</div><div class='ctx'> 	unsigned int (*get_timeleft)(struct watchdog_device *);</div><div class='add'>+	void (*ref)(struct watchdog_device *);</div><div class='add'>+	void (*unref)(struct watchdog_device *);</div><div class='ctx'> 	long (*ioctl)(struct watchdog_device *, unsigned int, unsigned long);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -85,6 +102,21 @@ It is important that you first define the module owner of the watchdog timer</div><div class='ctx'> driver's operations. This module owner will be used to lock the module when</div><div class='ctx'> the watchdog is active. (This to avoid a system crash when you unload the</div><div class='ctx'> module and /dev/watchdog is still open).</div><div class='add'>+</div><div class='add'>+If the watchdog_device struct is dynamically allocated, just locking the module</div><div class='add'>+is not enough and a driver also needs to define the ref and unref operations to</div><div class='add'>+ensure the structure holding the watchdog_device does not go away.</div><div class='add'>+</div><div class='add'>+The simplest (and usually sufficient) implementation of this is to:</div><div class='add'>+1) Add a kref struct to the same structure which is holding the watchdog_device</div><div class='add'>+2) Define a release callback for the kref which frees the struct holding both</div><div class='add'>+3) Call kref_init on this kref *before* calling watchdog_register_device()</div><div class='add'>+4) Define a ref operation calling kref_get on this kref</div><div class='add'>+5) Define a unref operation calling kref_put on this kref</div><div class='add'>+6) When it is time to cleanup:</div><div class='add'>+ * Do not kfree() the struct holding both, the last kref_put will do this!</div><div class='add'>+ * *After* calling watchdog_unregister_device() call kref_put on the kref</div><div class='add'>+</div><div class='ctx'> Some operations are mandatory and some are optional. The mandatory operations</div><div class='ctx'> are:</div><div class='ctx'> * start: this is a pointer to the routine that starts the watchdog timer</div><div class='hunk'>@@ -125,6 +157,10 @@ they are supported. These optional routines/operations are:</div><div class='ctx'>   (Note: the WDIOF_SETTIMEOUT needs to be set in the options field of the</div><div class='ctx'>   watchdog's info structure).</div><div class='ctx'> * get_timeleft: this routines returns the time that's left before a reset.</div><div class='add'>+* ref: the operation that calls kref_get on the kref of a dynamically</div><div class='add'>+  allocated watchdog_device struct.</div><div class='add'>+* unref: the operation that calls kref_put on the kref of a dynamically</div><div class='add'>+  allocated watchdog_device struct.</div><div class='ctx'> * ioctl: if this routine is present then it will be called first before we do</div><div class='ctx'>   our own internal ioctl call handling. This routine should return -ENOIOCTLCMD</div><div class='ctx'>   if a command is not supported. The parameters that are passed to the ioctl</div><div class='hunk'>@@ -144,6 +180,11 @@ bit-operations. The status bits that are defined are:</div><div class='ctx'>   (This bit should only be used by the WatchDog Timer Driver Core).</div><div class='ctx'> * WDOG_NO_WAY_OUT: this bit stores the nowayout setting for the watchdog.</div><div class='ctx'>   If this bit is set then the watchdog timer will not be able to stop.</div><div class='add'>+* WDOG_UNREGISTERED: this bit gets set by the WatchDog Timer Driver Core</div><div class='add'>+  after calling watchdog_unregister_device, and then checked before calling</div><div class='add'>+  any watchdog_ops, so that you can be sure that no operations (other then</div><div class='add'>+  unref) will get called after unregister, even if userspace still holds a</div><div class='add'>+  reference to /dev/watchdog</div><div class='ctx'> </div><div class='ctx'>   To set the WDOG_NO_WAY_OUT status bit (before registering your watchdog</div><div class='ctx'>   timer device) you can either:</div><div class='head'>diff --git a/Documentation/watchdog/watchdog-parameters.txt b/Documentation/watchdog/watchdog-parameters.txt<br/>index 17ddd822b456..04fddbacdbde 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/watchdog/watchdog-parameters.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/watchdog/watchdog-parameters.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/watchdog/watchdog-parameters.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/watchdog/watchdog-parameters.txt</a></div><div class='hunk'>@@ -78,6 +78,11 @@ wd0_timeout: Default watchdog0 timeout in 1/10secs</div><div class='ctx'> wd1_timeout: Default watchdog1 timeout in 1/10secs</div><div class='ctx'> wd2_timeout: Default watchdog2 timeout in 1/10secs</div><div class='ctx'> -------------------------------------------------</div><div class='add'>+da9052wdt:</div><div class='add'>+timeout: Watchdog timeout in seconds. 2&lt;= timeout &lt;=131, default=2.048s</div><div class='add'>+nowayout: Watchdog cannot be stopped once started</div><div class='add'>+	(default=kernel config parameter)</div><div class='add'>+-------------------------------------------------</div><div class='ctx'> davinci_wdt:</div><div class='ctx'> heartbeat: Watchdog heartbeat period in seconds from 1 to 600, default 60</div><div class='ctx'> -------------------------------------------------</div><div class='head'>diff --git a/Documentation/x86/efi-stub.txt b/Documentation/x86/efi-stub.txt<br/>new file mode 100644<br/>index 000000000000..44e6bb6ead10<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/Documentation/x86/efi-stub.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/x86/efi-stub.txt</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+			  The EFI Boot Stub</div><div class='add'>+		     ---------------------------</div><div class='add'>+</div><div class='add'>+On the x86 platform, a bzImage can masquerade as a PE/COFF image,</div><div class='add'>+thereby convincing EFI firmware loaders to load it as an EFI</div><div class='add'>+executable. The code that modifies the bzImage header, along with the</div><div class='add'>+EFI-specific entry point that the firmware loader jumps to are</div><div class='add'>+collectively known as the "EFI boot stub", and live in</div><div class='add'>+arch/x86/boot/header.S and arch/x86/boot/compressed/eboot.c,</div><div class='add'>+respectively.</div><div class='add'>+</div><div class='add'>+By using the EFI boot stub it's possible to boot a Linux kernel</div><div class='add'>+without the use of a conventional EFI boot loader, such as grub or</div><div class='add'>+elilo. Since the EFI boot stub performs the jobs of a boot loader, in</div><div class='add'>+a certain sense it *IS* the boot loader.</div><div class='add'>+</div><div class='add'>+The EFI boot stub is enabled with the CONFIG_EFI_STUB kernel option.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**** How to install bzImage.efi</div><div class='add'>+</div><div class='add'>+The bzImage located in arch/x86/boot/bzImage must be copied to the EFI</div><div class='add'>+System Partiion (ESP) and renamed with the extension ".efi". Without</div><div class='add'>+the extension the EFI firmware loader will refuse to execute it. It's</div><div class='add'>+not possible to execute bzImage.efi from the usual Linux file systems</div><div class='add'>+because EFI firmware doesn't have support for them.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**** Passing kernel parameters from the EFI shell</div><div class='add'>+</div><div class='add'>+Arguments to the kernel can be passed after bzImage.efi, e.g.</div><div class='add'>+</div><div class='add'>+	fs0:&gt; bzImage.efi console=ttyS0 root=/dev/sda4</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**** The "initrd=" option</div><div class='add'>+</div><div class='add'>+Like most boot loaders, the EFI stub allows the user to specify</div><div class='add'>+multiple initrd files using the "initrd=" option. This is the only EFI</div><div class='add'>+stub-specific command line parameter, everything else is passed to the</div><div class='add'>+kernel when it boots.</div><div class='add'>+</div><div class='add'>+The path to the initrd file must be an absolute path from the</div><div class='add'>+beginning of the ESP, relative path names do not work. Also, the path</div><div class='add'>+is an EFI-style path and directory elements must be separated with</div><div class='add'>+backslashes (\). For example, given the following directory layout,</div><div class='add'>+</div><div class='add'>+fs0:&gt;</div><div class='add'>+	Kernels\</div><div class='add'>+			bzImage.efi</div><div class='add'>+			initrd-large.img</div><div class='add'>+</div><div class='add'>+	Ramdisks\</div><div class='add'>+			initrd-small.img</div><div class='add'>+			initrd-medium.img</div><div class='add'>+</div><div class='add'>+to boot with the initrd-large.img file if the current working</div><div class='add'>+directory is fs0:\Kernels, the following command must be used,</div><div class='add'>+</div><div class='add'>+	fs0:\Kernels&gt; bzImage.efi initrd=\Kernels\initrd-large.img</div><div class='add'>+</div><div class='add'>+Notice how bzImage.efi can be specified with a relative path. That's</div><div class='add'>+because the image we're executing is interpreted by the EFI shell,</div><div class='add'>+which understands relative paths, whereas the rest of the command line</div><div class='add'>+is passed to bzImage.efi.</div><div class='head'>diff --git a/Documentation/zh_CN/magic-number.txt b/Documentation/zh_CN/magic-number.txt<br/>index f606ba8598cf..4263022f5002 100644<br/>--- a/<a href='/drm-misc/tree/Documentation/zh_CN/magic-number.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Documentation/zh_CN/magic-number.txt</a><br/>+++ b/<a href='/drm-misc/tree/Documentation/zh_CN/magic-number.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Documentation/zh_CN/magic-number.txt</a></div><div class='hunk'>@@ -160,7 +160,7 @@ QUEUE_MAGIC_USED      0xf7e1cc33  queue_entry       drivers/scsi/arm/queue.c</div><div class='ctx'> HTB_CMAGIC            0xFEFAFEF1  htb_class         net/sched/sch_htb.c</div><div class='ctx'> NMI_MAGIC             0x48414d4d455201 nmi_s        arch/mips/include/asm/sn/nmi.h</div><div class='ctx'> </div><div class='del'>-请注意，在声音记忆管理中仍然有每一些被定义的驱动魔术值。查看include/sound/sndmagic.h来获取他们完整的列表信息。很多OSS声音驱动拥有自己从声卡PCI ID构建的魔术值-他们也没有被列在这里。</div><div class='add'>+请注意，在声音记忆管理中仍然有一些特殊的为每个驱动定义的魔术值。查看include/sound/sndmagic.h来获取他们完整的列表信息。很多OSS声音驱动拥有自己从声卡PCI ID构建的魔术值-他们也没有被列在这里。</div><div class='ctx'> </div><div class='ctx'> IrDA子系统也使用了大量的自己的魔术值，查看include/net/irda/irda.h来获取他们完整的信息。</div><div class='ctx'> </div><div class='head'>diff --git a/MAINTAINERS b/MAINTAINERS<br/>index d7ca204a0f8e..14bc7071f9df 100644<br/>--- a/<a href='/drm-misc/tree/MAINTAINERS?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>MAINTAINERS</a><br/>+++ b/<a href='/drm-misc/tree/MAINTAINERS?id=66dd07b88a1c9d446f32253da606b87324fa620e'>MAINTAINERS</a></div><div class='hunk'>@@ -640,13 +640,6 @@ S:	Maintained</div><div class='ctx'> F:	drivers/amba/</div><div class='ctx'> F:	include/linux/amba/bus.h</div><div class='ctx'> </div><div class='del'>-ARM/ADI ROADRUNNER MACHINE SUPPORT</div><div class='del'>-M:	Lennert Buytenhek &lt;kernel@wantstofly.org&gt;</div><div class='del'>-L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='del'>-S:	Maintained</div><div class='del'>-F:	arch/arm/mach-ixp23xx/</div><div class='del'>-F:	arch/arm/mach-ixp23xx/include/mach/</div><div class='del'>-</div><div class='ctx'> ARM/ADS SPHERE MACHINE SUPPORT</div><div class='ctx'> M:	Lennert Buytenhek &lt;kernel@wantstofly.org&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='hunk'>@@ -746,7 +739,10 @@ M:	Barry Song &lt;baohua.song@csr.com&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/arm/mach-prima2/</div><div class='del'>-F:	drivers/dma/sirf-dma*</div><div class='add'>+F:	drivers/dma/sirf-dma.c</div><div class='add'>+F:	drivers/i2c/busses/i2c-sirf.c</div><div class='add'>+F:	drivers/pinctrl/pinctrl-sirf.c</div><div class='add'>+F:	drivers/spi/spi-sirf.c</div><div class='ctx'> </div><div class='ctx'> ARM/EBSA110 MACHINE SUPPORT</div><div class='ctx'> M:	Russell King &lt;linux@arm.linux.org.uk&gt;</div><div class='hunk'>@@ -859,21 +855,11 @@ M:	Dan Williams &lt;dan.j.williams@intel.com&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='ctx'> </div><div class='del'>-ARM/INTEL IXP2000 ARM ARCHITECTURE</div><div class='del'>-M:	Lennert Buytenhek &lt;kernel@wantstofly.org&gt;</div><div class='del'>-L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='del'>-S:	Maintained</div><div class='del'>-</div><div class='ctx'> ARM/INTEL IXDP2850 MACHINE SUPPORT</div><div class='ctx'> M:	Lennert Buytenhek &lt;kernel@wantstofly.org&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='ctx'> </div><div class='del'>-ARM/INTEL IXP23XX ARM ARCHITECTURE</div><div class='del'>-M:	Lennert Buytenhek &lt;kernel@wantstofly.org&gt;</div><div class='del'>-L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='del'>-S:	Maintained</div><div class='del'>-</div><div class='ctx'> ARM/INTEL IXP4XX ARM ARCHITECTURE</div><div class='ctx'> M:	Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='ctx'> M:	Krzysztof Halasa &lt;khc@pm.waw.pl&gt;</div><div class='hunk'>@@ -908,11 +894,12 @@ ARM/MAGICIAN MACHINE SUPPORT</div><div class='ctx'> M:	Philipp Zabel &lt;philipp.zabel@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> </div><div class='del'>-ARM/Marvell Loki/Kirkwood/MV78xx0/Orion SOC support</div><div class='del'>-M:	Lennert Buytenhek &lt;kernel@wantstofly.org&gt;</div><div class='del'>-M:	Nicolas Pitre &lt;nico@fluxnic.net&gt;</div><div class='add'>+ARM/Marvell Dove/Kirkwood/MV78xx0/Orion SOC support</div><div class='add'>+M:	Jason Cooper &lt;jason@lakedaemon.net&gt;</div><div class='add'>+M:	Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='del'>-S:	Odd Fixes</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	arch/arm/mach-dove/</div><div class='ctx'> F:	arch/arm/mach-kirkwood/</div><div class='ctx'> F:	arch/arm/mach-mv78xx0/</div><div class='ctx'> F:	arch/arm/mach-orion5x/</div><div class='hunk'>@@ -1090,7 +1077,7 @@ F:	drivers/media/video/s5p-fimc/</div><div class='ctx'> ARM/SAMSUNG S5P SERIES Multi Format Codec (MFC) SUPPORT</div><div class='ctx'> M:	Kyungmin Park &lt;kyungmin.park@samsung.com&gt;</div><div class='ctx'> M:	Kamil Debski &lt;k.debski@samsung.com&gt;</div><div class='del'>-M:     Jeongtae Park &lt;jtp.park@samsung.com&gt;</div><div class='add'>+M:	Jeongtae Park &lt;jtp.park@samsung.com&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -1331,6 +1318,21 @@ M:	Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/tty/serial/atmel_serial.c</div><div class='ctx'> </div><div class='add'>+ATMEL DMA DRIVER</div><div class='add'>+M:	Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/dma/at_hdmac.c</div><div class='add'>+F:	drivers/dma/at_hdmac_regs.h</div><div class='add'>+F:	arch/arm/mach-at91/include/mach/at_hdmac.h</div><div class='add'>+</div><div class='add'>+ATMEL ISI DRIVER</div><div class='add'>+M:	Josh Wu &lt;josh.wu@atmel.com&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/media/video/atmel-isi.c</div><div class='add'>+F:	include/media/atmel-isi.h</div><div class='add'>+</div><div class='ctx'> ATMEL LCDFB DRIVER</div><div class='ctx'> M:	Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;</div><div class='ctx'> L:	linux-fbdev@vger.kernel.org</div><div class='hunk'>@@ -1348,10 +1350,22 @@ M:	Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/spi/spi-atmel.*</div><div class='ctx'> </div><div class='add'>+ATMEL Timer Counter (TC) AND CLOCKSOURCE DRIVERS</div><div class='add'>+M:	Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/misc/atmel_tclib.c</div><div class='add'>+F:	drivers/clocksource/tcb_clksrc.c</div><div class='add'>+</div><div class='add'>+ATMEL TSADCC DRIVER</div><div class='add'>+M:	Josh Wu &lt;josh.wu@atmel.com&gt;</div><div class='add'>+L:	linux-input@vger.kernel.org</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/input/touchscreen/atmel_tsadcc.c</div><div class='add'>+</div><div class='ctx'> ATMEL USBA UDC DRIVER</div><div class='ctx'> M:	Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='del'>-W:	http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/usb/gadget/atmel_usba_udc.*</div><div class='ctx'> </div><div class='hunk'>@@ -1431,6 +1445,7 @@ F:	include/linux/backlight.h</div><div class='ctx'> BATMAN ADVANCED</div><div class='ctx'> M:	Marek Lindner &lt;lindner_marek@yahoo.de&gt;</div><div class='ctx'> M:	Simon Wunderlich &lt;siwu@hrz.tu-chemnitz.de&gt;</div><div class='add'>+M:	Antonio Quartulli &lt;ordex@autistici.org&gt;</div><div class='ctx'> L:	b.a.t.m.a.n@lists.open-mesh.org</div><div class='ctx'> W:	http://www.open-mesh.org/</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -1598,6 +1613,7 @@ F:	include/linux/bcma/</div><div class='ctx'> </div><div class='ctx'> BROCADE BFA FC SCSI DRIVER</div><div class='ctx'> M:	Jing Huang &lt;huangj@brocade.com&gt;</div><div class='add'>+M:	Krishna C Gudipati &lt;kgudipat@brocade.com&gt;</div><div class='ctx'> L:	linux-scsi@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/scsi/bfa/</div><div class='hunk'>@@ -1727,10 +1743,10 @@ F:	include/linux/can/platform/</div><div class='ctx'> CAPABILITIES</div><div class='ctx'> M:	Serge Hallyn &lt;serge.hallyn@canonical.com&gt;</div><div class='ctx'> L:	linux-security-module@vger.kernel.org</div><div class='del'>-S:	Supported	</div><div class='add'>+S:	Supported</div><div class='ctx'> F:	include/linux/capability.h</div><div class='ctx'> F:	security/capability.c</div><div class='del'>-F:	security/commoncap.c </div><div class='add'>+F:	security/commoncap.c</div><div class='ctx'> F:	kernel/capability.c</div><div class='ctx'> </div><div class='ctx'> CELL BROADBAND ENGINE ARCHITECTURE</div><div class='hunk'>@@ -1810,6 +1826,12 @@ L:	linux-kernel@zh-kernel.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/zh_CN/</div><div class='ctx'> </div><div class='add'>+CHIPIDEA USB HIGH SPEED DUAL ROLE CONTROLLER</div><div class='add'>+M:	Alexander Shishkin &lt;alexander.shishkin@linux.intel.com&gt;</div><div class='add'>+L:	linux-usb@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/usb/chipidea/</div><div class='add'>+</div><div class='ctx'> CISCO VIC ETHERNET NIC DRIVER</div><div class='ctx'> M:	Christian Benvenuti &lt;benve@cisco.com&gt;</div><div class='ctx'> M:	Roopa Prabhu &lt;roprabhu@cisco.com&gt;</div><div class='hunk'>@@ -1883,6 +1905,16 @@ F:	Documentation/filesystems/coda.txt</div><div class='ctx'> F:	fs/coda/</div><div class='ctx'> F:	include/linux/coda*.h</div><div class='ctx'> </div><div class='add'>+COMMON CLK FRAMEWORK</div><div class='add'>+M:	Mike Turquette &lt;mturquette@ti.com&gt;</div><div class='add'>+M:	Mike Turquette &lt;mturquette@linaro.org&gt;</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (same as CLK API &amp; CLKDEV)</div><div class='add'>+T:	git git://git.linaro.org/people/mturquette/linux.git</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/clk/clk.c</div><div class='add'>+F:	drivers/clk/clk-*</div><div class='add'>+F:	include/linux/clk-pr*</div><div class='add'>+</div><div class='ctx'> COMMON INTERNET FILE SYSTEM (CIFS)</div><div class='ctx'> M:	Steve French &lt;sfrench@samba.org&gt;</div><div class='ctx'> L:	linux-cifs@vger.kernel.org</div><div class='hunk'>@@ -1969,10 +2001,9 @@ S:	Maintained</div><div class='ctx'> F:	drivers/net/ethernet/ti/cpmac.c</div><div class='ctx'> </div><div class='ctx'> CPU FREQUENCY DRIVERS</div><div class='del'>-M:	Dave Jones &lt;davej@redhat.com&gt;</div><div class='add'>+M:	Rafael J. Wysocki &lt;rjw@sisk.pl&gt;</div><div class='ctx'> L:	cpufreq@vger.kernel.org</div><div class='del'>-W:	http://www.codemonkey.org.uk/projects/cpufreq/</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq.git</div><div class='add'>+L:	linux-pm@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/cpufreq/</div><div class='ctx'> F:	include/linux/cpufreq.h</div><div class='hunk'>@@ -2115,11 +2146,11 @@ S:	Orphan</div><div class='ctx'> F:	drivers/net/wan/pc300*</div><div class='ctx'> </div><div class='ctx'> CYTTSP TOUCHSCREEN DRIVER</div><div class='del'>-M:      Javier Martinez Canillas &lt;javier@dowhile0.org&gt;</div><div class='del'>-L:      linux-input@vger.kernel.org</div><div class='del'>-S:      Maintained</div><div class='del'>-F:      drivers/input/touchscreen/cyttsp*</div><div class='del'>-F:      include/linux/input/cyttsp.h</div><div class='add'>+M:	Javier Martinez Canillas &lt;javier@dowhile0.org&gt;</div><div class='add'>+L:	linux-input@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/input/touchscreen/cyttsp*</div><div class='add'>+F:	include/linux/input/cyttsp.h</div><div class='ctx'> </div><div class='ctx'> DAMA SLAVE for AX.25</div><div class='ctx'> M:	Joerg Reuter &lt;jreuter@yaina.de&gt;</div><div class='hunk'>@@ -2239,7 +2270,7 @@ F:	include/linux/device-mapper.h</div><div class='ctx'> F:	include/linux/dm-*.h</div><div class='ctx'> </div><div class='ctx'> DIOLAN U2C-12 I2C DRIVER</div><div class='del'>-M:	Guenter Roeck &lt;guenter.roeck@ericsson.com&gt;</div><div class='add'>+M:	Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='ctx'> L:	linux-i2c@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/i2c/busses/i2c-diolan-u2c.c</div><div class='hunk'>@@ -2377,10 +2408,10 @@ F:	drivers/gpu/drm/</div><div class='ctx'> F:	include/drm/</div><div class='ctx'> </div><div class='ctx'> INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets)</div><div class='del'>-M:	Keith Packard &lt;keithp@keithp.com&gt;</div><div class='add'>+M:	Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;</div><div class='ctx'> L:	intel-gfx@lists.freedesktop.org (subscribers-only)</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux.git</div><div class='add'>+T:	git git://people.freedesktop.org/~danvet/drm-intel</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/gpu/drm/i915</div><div class='ctx'> F:	include/drm/i915*</div><div class='hunk'>@@ -2697,6 +2728,13 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/hwmon/f71805f</div><div class='ctx'> F:	drivers/hwmon/f71805f.c</div><div class='ctx'> </div><div class='add'>+FC0011 TUNER DRIVER</div><div class='add'>+M:	Michael Buesch &lt;m@bues.ch&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/media/common/tuners/fc0011.h</div><div class='add'>+F:	drivers/media/common/tuners/fc0011.c</div><div class='add'>+</div><div class='ctx'> FANOTIFY</div><div class='ctx'> M:	Eric Paris &lt;eparis@redhat.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -2755,6 +2793,15 @@ T:	git git://git.alsa-project.org/alsa-kernel.git</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	sound/firewire/</div><div class='ctx'> </div><div class='add'>+FIREWIRE SBP-2 TARGET</div><div class='add'>+M:	Chris Boot &lt;bootc@bootc.net&gt;</div><div class='add'>+L:	linux-scsi@vger.kernel.org</div><div class='add'>+L:	target-devel@vger.kernel.org</div><div class='add'>+L:	linux1394-devel@lists.sourceforge.net</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/nab/lio-core-2.6.git master</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/target/sbp/</div><div class='add'>+</div><div class='ctx'> FIREWIRE SUBSYSTEM</div><div class='ctx'> M:	Stefan Richter &lt;stefanr@s5r6.in-berlin.de&gt;</div><div class='ctx'> L:	linux1394-devel@lists.sourceforge.net</div><div class='hunk'>@@ -2771,6 +2818,12 @@ F:	Documentation/firmware_class/</div><div class='ctx'> F:	drivers/base/firmware*.c</div><div class='ctx'> F:	include/linux/firmware.h</div><div class='ctx'> </div><div class='add'>+FLOPPY DRIVER</div><div class='add'>+M:	Jiri Kosina &lt;jkosina@suse.cz&gt;</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/floppy.git</div><div class='add'>+S:	Odd fixes</div><div class='add'>+F:	drivers/block/floppy.c</div><div class='add'>+</div><div class='ctx'> FPU EMULATOR</div><div class='ctx'> M:	Bill Metzenthen &lt;billm@melbpc.org.au&gt;</div><div class='ctx'> W:	http://floatingpoint.sourceforge.net/emulator/index.html</div><div class='hunk'>@@ -2877,6 +2930,13 @@ F:	Documentation/power/freezing-of-tasks.txt</div><div class='ctx'> F:	include/linux/freezer.h</div><div class='ctx'> F:	kernel/freezer.c</div><div class='ctx'> </div><div class='add'>+FRONTSWAP API</div><div class='add'>+M:	Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;</div><div class='add'>+L:	linux-kernel@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	mm/frontswap.c</div><div class='add'>+F:	include/linux/frontswap.h</div><div class='add'>+</div><div class='ctx'> FS-CACHE: LOCAL CACHING FOR NETWORK FILESYSTEMS</div><div class='ctx'> M:	David Howells &lt;dhowells@redhat.com&gt;</div><div class='ctx'> L:	linux-cachefs@redhat.com</div><div class='hunk'>@@ -2891,7 +2951,7 @@ S:	Maintained</div><div class='ctx'> F:	arch/frv/</div><div class='ctx'> </div><div class='ctx'> FUJITSU LAPTOP EXTRAS</div><div class='del'>-M:	Jonathan Woithe &lt;jwoithe@physics.adelaide.edu.au&gt;</div><div class='add'>+M:	Jonathan Woithe &lt;jwoithe@just42.net&gt;</div><div class='ctx'> L:	platform-driver-x86@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/platform/x86/fujitsu-laptop.c</div><div class='hunk'>@@ -2941,9 +3001,9 @@ GENERIC GPIO I2C MULTIPLEXER DRIVER</div><div class='ctx'> M:	Peter Korsgaard &lt;peter.korsgaard@barco.com&gt;</div><div class='ctx'> L:	linux-i2c@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='del'>-F:	drivers/i2c/muxes/gpio-i2cmux.c</div><div class='del'>-F:	include/linux/gpio-i2cmux.h</div><div class='del'>-F:	Documentation/i2c/muxes/gpio-i2cmux</div><div class='add'>+F:	drivers/i2c/muxes/i2c-mux-gpio.c</div><div class='add'>+F:	include/linux/i2c-mux-gpio.h</div><div class='add'>+F:	Documentation/i2c/muxes/i2c-mux-gpio</div><div class='ctx'> </div><div class='ctx'> GENERIC HDLC (WAN) DRIVERS</div><div class='ctx'> M:	Krzysztof Halasa &lt;khc@pm.waw.pl&gt;</div><div class='hunk'>@@ -3085,7 +3145,7 @@ F:	drivers/tty/hvc/</div><div class='ctx'> </div><div class='ctx'> HARDWARE MONITORING</div><div class='ctx'> M:	Jean Delvare &lt;khali@linux-fr.org&gt;</div><div class='del'>-M:	Guenter Roeck &lt;guenter.roeck@ericsson.com&gt;</div><div class='add'>+M:	Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> W:	http://www.lm-sensors.org/</div><div class='ctx'> T:	quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-hwmon/</div><div class='hunk'>@@ -3185,10 +3245,8 @@ F:	include/linux/clockchips.h</div><div class='ctx'> F:	include/linux/hrtimer.h</div><div class='ctx'> </div><div class='ctx'> HIGH-SPEED SCC DRIVER FOR AX.25</div><div class='del'>-M:	Klaus Kudielka &lt;klaus.kudielka@ieee.org&gt;</div><div class='ctx'> L:	linux-hams@vger.kernel.org</div><div class='del'>-W:	http://www.nt.tuwien.ac.at/~kkudielk/Linux/</div><div class='del'>-S:	Maintained</div><div class='add'>+S:	Orphan</div><div class='ctx'> F:	drivers/net/hamradio/dmascc.c</div><div class='ctx'> F:	drivers/net/hamradio/scc.c</div><div class='ctx'> </div><div class='hunk'>@@ -3317,12 +3375,6 @@ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux.git</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/ia64/</div><div class='ctx'> </div><div class='del'>-IBM MCA SCSI SUBSYSTEM DRIVER</div><div class='del'>-M:	Michael Lang &lt;langa2@kph.uni-mainz.de&gt;</div><div class='del'>-W:	http://www.uni-mainz.de/~langm000/linux.html</div><div class='del'>-S:	Maintained</div><div class='del'>-F:	drivers/scsi/ibmmca.c</div><div class='del'>-</div><div class='ctx'> IBM Power Linux RAID adapter</div><div class='ctx'> M:	Brian King &lt;brking@us.ibm.com&gt;</div><div class='ctx'> S:	Supported</div><div class='hunk'>@@ -3341,6 +3393,12 @@ W:	http://www.developer.ibm.com/welcome/netfinity/serveraid.html</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/scsi/ips.*</div><div class='ctx'> </div><div class='add'>+ICH LPC AND GPIO DRIVER</div><div class='add'>+M:	Peter Tyser &lt;ptyser@xes-inc.com&gt;</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/mfd/lpc_ich.c</div><div class='add'>+F:	drivers/gpio/gpio-ich.c</div><div class='add'>+</div><div class='ctx'> IDE SUBSYSTEM</div><div class='ctx'> M:	"David S. Miller" &lt;davem@davemloft.net&gt;</div><div class='ctx'> L:	linux-ide@vger.kernel.org</div><div class='hunk'>@@ -3385,6 +3443,7 @@ IIO SUBSYSTEM AND DRIVERS</div><div class='ctx'> M:	Jonathan Cameron &lt;jic23@cam.ac.uk&gt;</div><div class='ctx'> L:	linux-iio@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='add'>+F:	drivers/iio/</div><div class='ctx'> F:	drivers/staging/iio/</div><div class='ctx'> </div><div class='ctx'> IKANOS/ADI EAGLE ADSL USB DRIVER</div><div class='hunk'>@@ -3433,6 +3492,8 @@ Q:	http://patchwork.kernel.org/project/linux-input/list/</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input.git</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/input/</div><div class='add'>+F:	include/linux/input.h</div><div class='add'>+F:	include/linux/input/</div><div class='ctx'> </div><div class='ctx'> INPUT MULTITOUCH (MT) PROTOCOL</div><div class='ctx'> M:	Henrik Rydberg &lt;rydberg@euromail.se&gt;</div><div class='hunk'>@@ -3520,12 +3581,6 @@ M:	Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/char/hw_random/ixp4xx-rng.c</div><div class='ctx'> </div><div class='del'>-INTEL IXP2000 ETHERNET DRIVER</div><div class='del'>-M:	Lennert Buytenhek &lt;kernel@wantstofly.org&gt;</div><div class='del'>-L:	netdev@vger.kernel.org</div><div class='del'>-S:	Maintained</div><div class='del'>-F:	drivers/net/ethernet/xscale/ixp2000/</div><div class='del'>-</div><div class='ctx'> INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/igbvf/ixgb/ixgbe/ixgbevf)</div><div class='ctx'> M:	Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;</div><div class='ctx'> M:	Jesse Brandeburg &lt;jesse.brandeburg@intel.com&gt;</div><div class='hunk'>@@ -3610,6 +3665,14 @@ S:	Supported</div><div class='ctx'> W:	http://wireless.kernel.org/en/users/Drivers/iwmc3200wifi</div><div class='ctx'> F:	drivers/net/wireless/iwmc3200wifi/</div><div class='ctx'> </div><div class='add'>+INTEL MANAGEMENT ENGINE (mei)</div><div class='add'>+M:	Tomas Winkler &lt;tomas.winkler@intel.com&gt;</div><div class='add'>+L:	linux-kernel@vger.kernel.org</div><div class='add'>+S:	Supported</div><div class='add'>+F:	include/linux/mei.h</div><div class='add'>+F:	drivers/misc/mei/*</div><div class='add'>+F:	Documentation/mei/*</div><div class='add'>+</div><div class='ctx'> IOC3 ETHERNET DRIVER</div><div class='ctx'> M:	Ralf Baechle &lt;ralf@linux-mips.org&gt;</div><div class='ctx'> L:	linux-mips@linux-mips.org</div><div class='hunk'>@@ -3635,7 +3698,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/net/ethernet/icplus/ipg.*</div><div class='ctx'> </div><div class='ctx'> IPATH DRIVER</div><div class='del'>-M:	Mike Marciniszyn &lt;infinipath@qlogic.com&gt;</div><div class='add'>+M:	Mike Marciniszyn &lt;infinipath@intel.com&gt;</div><div class='ctx'> L:	linux-rdma@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/infiniband/hw/ipath/</div><div class='hunk'>@@ -4038,7 +4101,10 @@ F:	Documentation/scsi/53c700.txt</div><div class='ctx'> F:	drivers/scsi/53c700*</div><div class='ctx'> </div><div class='ctx'> LED SUBSYSTEM</div><div class='add'>+M:	Bryan Wu &lt;bryan.wu@canonical.com&gt;</div><div class='ctx'> M:	Richard Purdie &lt;rpurdie@rpsys.net&gt;</div><div class='add'>+L:	linux-leds@vger.kernel.org</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/linux-leds.git</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/leds/</div><div class='ctx'> F:	include/linux/leds.h</div><div class='hunk'>@@ -4354,6 +4420,13 @@ S:	Orphan</div><div class='ctx'> F:	drivers/video/matrox/matroxfb_*</div><div class='ctx'> F:	include/linux/matroxfb.h</div><div class='ctx'> </div><div class='add'>+MAX16065 HARDWARE MONITOR DRIVER</div><div class='add'>+M:	Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='add'>+L:	lm-sensors@lm-sensors.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/hwmon/max16065</div><div class='add'>+F:	drivers/hwmon/max16065.c</div><div class='add'>+</div><div class='ctx'> MAX6650 HARDWARE MONITOR AND FAN CONTROLLER DRIVER</div><div class='ctx'> M:	"Hans J. Koch" &lt;hjk@hansjkoch.de&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='hunk'>@@ -4424,13 +4497,6 @@ T:	git git://git.monstr.eu/linux-2.6-microblaze.git</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	arch/microblaze/</div><div class='ctx'> </div><div class='del'>-MICROCHANNEL ARCHITECTURE (MCA)</div><div class='del'>-M:	James Bottomley &lt;James.Bottomley@HansenPartnership.com&gt;</div><div class='del'>-S:	Maintained</div><div class='del'>-F:	Documentation/mca.txt</div><div class='del'>-F:	drivers/mca/</div><div class='del'>-F:	include/linux/mca*</div><div class='del'>-</div><div class='ctx'> MICROTEK X6 SCANNER</div><div class='ctx'> M:	Oliver Neukum &lt;oliver@neukum.name&gt;</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -4465,12 +4531,6 @@ L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/mmc/host/imxmmc.*</div><div class='ctx'> </div><div class='del'>-MOUSE AND MISC DEVICES [GENERAL]</div><div class='del'>-M:	Alessandro Rubini &lt;rubini@ipvvis.unipv.it&gt;</div><div class='del'>-S:	Maintained</div><div class='del'>-F:	drivers/input/mouse/</div><div class='del'>-F:	include/linux/gpio_mouse.h</div><div class='del'>-</div><div class='ctx'> MOXA SMARTIO/INDUSTIO/INTELLIO SERIAL CARD</div><div class='ctx'> M:	Jiri Slaby &lt;jirislaby@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -5105,10 +5165,10 @@ F:	drivers/leds/leds-pca9532.c</div><div class='ctx'> F:	include/linux/leds-pca9532.h</div><div class='ctx'> </div><div class='ctx'> PCA9541 I2C BUS MASTER SELECTOR DRIVER</div><div class='del'>-M:	Guenter Roeck &lt;guenter.roeck@ericsson.com&gt;</div><div class='add'>+M:	Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='ctx'> L:	linux-i2c@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	drivers/i2c/muxes/pca9541.c</div><div class='add'>+F:	drivers/i2c/muxes/i2c-mux-pca9541.c</div><div class='ctx'> </div><div class='ctx'> PCA9564/PCA9665 I2C BUS DRIVER</div><div class='ctx'> M:	Wolfram Sang &lt;w.sang@pengutronix.de&gt;</div><div class='hunk'>@@ -5125,7 +5185,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/firmware/pcdp.*</div><div class='ctx'> </div><div class='ctx'> PCI ERROR RECOVERY</div><div class='del'>-M:     Linas Vepstas &lt;linasvepstas@gmail.com&gt;</div><div class='add'>+M:	Linas Vepstas &lt;linasvepstas@gmail.com&gt;</div><div class='ctx'> L:	linux-pci@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/PCI/pci-error-recovery.txt</div><div class='hunk'>@@ -5134,19 +5194,13 @@ F:	Documentation/powerpc/eeh-pci-error-recovery.txt</div><div class='ctx'> PCI SUBSYSTEM</div><div class='ctx'> M:	Bjorn Helgaas &lt;bhelgaas@google.com&gt;</div><div class='ctx'> L:	linux-pci@vger.kernel.org</div><div class='del'>-Q:	http://patchwork.kernel.org/project/linux-pci/list/</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci.git</div><div class='add'>+Q:	http://patchwork.ozlabs.org/project/linux-pci/list/</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/linux.git</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/PCI/</div><div class='ctx'> F:	drivers/pci/</div><div class='ctx'> F:	include/linux/pci*</div><div class='ctx'> </div><div class='del'>-PCI HOTPLUG</div><div class='del'>-M:	Bjorn Helgaas &lt;bhelgaas@google.com&gt;</div><div class='del'>-L:	linux-pci@vger.kernel.org</div><div class='del'>-S:	Supported</div><div class='del'>-F:	drivers/pci/hotplug</div><div class='del'>-</div><div class='ctx'> PCMCIA SUBSYSTEM</div><div class='ctx'> P:	Linux PCMCIA Team</div><div class='ctx'> L:	linux-pcmcia@lists.infradead.org</div><div class='hunk'>@@ -5209,7 +5263,7 @@ S:	Maintained</div><div class='ctx'> F:	include/linux/personality.h</div><div class='ctx'> </div><div class='ctx'> PHONET PROTOCOL</div><div class='del'>-M:	Remi Denis-Courmont &lt;remi.denis-courmont@nokia.com&gt;</div><div class='add'>+M:	Remi Denis-Courmont &lt;courmisch@gmail.com&gt;</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/networking/phonet.txt</div><div class='ctx'> F:	include/linux/phonet.h</div><div class='hunk'>@@ -5236,6 +5290,14 @@ M:	Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/pinctrl/</div><div class='ctx'> </div><div class='add'>+PIN CONTROLLER - ST SPEAR</div><div class='add'>+M:	Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+L:	spear-devel@list.st.com</div><div class='add'>+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='add'>+W:	http://www.st.com/spear</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	driver/pinctrl/spear/</div><div class='add'>+</div><div class='ctx'> PKTCDVD DRIVER</div><div class='ctx'> M:	Peter Osterlund &lt;petero2@telia.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -5253,7 +5315,7 @@ F:	drivers/video/fb-puv3.c</div><div class='ctx'> F:	drivers/rtc/rtc-puv3.c</div><div class='ctx'> </div><div class='ctx'> PMBUS HARDWARE MONITORING DRIVERS</div><div class='del'>-M:	Guenter Roeck &lt;guenter.roeck@ericsson.com&gt;</div><div class='add'>+M:	Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='ctx'> L:	lm-sensors@lm-sensors.org</div><div class='ctx'> W:	http://www.lm-sensors.org/</div><div class='ctx'> W:	http://www.roeck-us.net/linux/drivers/</div><div class='hunk'>@@ -5291,7 +5353,7 @@ M:	David Woodhouse &lt;dwmw2@infradead.org&gt;</div><div class='ctx'> T:	git git://git.infradead.org/battery-2.6.git</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	include/linux/power_supply.h</div><div class='del'>-F:	drivers/power/power_supply*</div><div class='add'>+F:	drivers/power/</div><div class='ctx'> </div><div class='ctx'> PNP SUPPORT</div><div class='ctx'> M:	Adam Belay &lt;abelay@mit.edu&gt;</div><div class='hunk'>@@ -5459,7 +5521,7 @@ L:	rtc-linux@googlegroups.com</div><div class='ctx'> S:	Maintained</div><div class='ctx'> </div><div class='ctx'> QIB DRIVER</div><div class='del'>-M:	Mike Marciniszyn &lt;infinipath@qlogic.com&gt;</div><div class='add'>+M:	Mike Marciniszyn &lt;infinipath@intel.com&gt;</div><div class='ctx'> L:	linux-rdma@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/infiniband/hw/qib/</div><div class='hunk'>@@ -5609,14 +5671,13 @@ F:	net/rds/</div><div class='ctx'> READ-COPY UPDATE (RCU)</div><div class='ctx'> M:	Dipankar Sarma &lt;dipankar@in.ibm.com&gt;</div><div class='ctx'> M:	"Paul E. McKenney" &lt;paulmck@linux.vnet.ibm.com&gt;</div><div class='del'>-W:	http://www.rdrop.com/users/paulmck/rclock/</div><div class='add'>+W:	http://www.rdrop.com/users/paulmck/RCU/</div><div class='ctx'> S:	Supported</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git</div><div class='ctx'> F:	Documentation/RCU/</div><div class='add'>+X:	Documentation/RCU/torture.txt</div><div class='ctx'> F:	include/linux/rcu*</div><div class='del'>-F:	include/linux/srcu*</div><div class='ctx'> F:	kernel/rcu*</div><div class='del'>-F:	kernel/srcu*</div><div class='ctx'> X:	kernel/rcutorture.c</div><div class='ctx'> </div><div class='ctx'> REAL TIME CLOCK (RTC) SUBSYSTEM</div><div class='hunk'>@@ -5893,11 +5954,11 @@ F:	Documentation/scsi/st.txt</div><div class='ctx'> F:	drivers/scsi/st*</div><div class='ctx'> </div><div class='ctx'> SCTP PROTOCOL</div><div class='del'>-M:	Vlad Yasevich &lt;vladislav.yasevich@hp.com&gt;</div><div class='add'>+M:	Vlad Yasevich &lt;vyasevich@gmail.com&gt;</div><div class='ctx'> M:	Sridhar Samudrala &lt;sri@us.ibm.com&gt;</div><div class='ctx'> L:	linux-sctp@vger.kernel.org</div><div class='ctx'> W:	http://lksctp.sourceforge.net</div><div class='del'>-S:	Supported</div><div class='add'>+S:	Maintained</div><div class='ctx'> F:	Documentation/networking/sctp.txt</div><div class='ctx'> F:	include/linux/sctp.h</div><div class='ctx'> F:	include/net/sctp/</div><div class='hunk'>@@ -6133,6 +6194,15 @@ S:	Maintained</div><div class='ctx'> F:	include/linux/sl?b*.h</div><div class='ctx'> F:	mm/sl?b.c</div><div class='ctx'> </div><div class='add'>+SLEEPABLE READ-COPY UPDATE (SRCU)</div><div class='add'>+M:	Lai Jiangshan &lt;laijs@cn.fujitsu.com&gt;</div><div class='add'>+M:	"Paul E. McKenney" &lt;paulmck@linux.vnet.ibm.com&gt;</div><div class='add'>+W:	http://www.rdrop.com/users/paulmck/RCU/</div><div class='add'>+S:	Supported</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git</div><div class='add'>+F:	include/linux/srcu*</div><div class='add'>+F:	kernel/srcu*</div><div class='add'>+</div><div class='ctx'> SMC91x ETHERNET DRIVER</div><div class='ctx'> M:	Nicolas Pitre &lt;nico@fluxnic.net&gt;</div><div class='ctx'> S:	Odd Fixes</div><div class='hunk'>@@ -6300,52 +6370,48 @@ F:	include/linux/compiler.h</div><div class='ctx'> </div><div class='ctx'> SPEAR PLATFORM SUPPORT</div><div class='ctx'> M:	Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+M:	Shiraz Hashim &lt;shiraz.hashim@st.com&gt;</div><div class='ctx'> L:	spear-devel@list.st.com</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> W:	http://www.st.com/spear</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/arm/plat-spear/</div><div class='ctx'> </div><div class='del'>-SPEAR3XX MACHINE SUPPORT</div><div class='add'>+SPEAR13XX MACHINE SUPPORT</div><div class='ctx'> M:	Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+M:	Shiraz Hashim &lt;shiraz.hashim@st.com&gt;</div><div class='ctx'> L:	spear-devel@list.st.com</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> W:	http://www.st.com/spear</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	arch/arm/mach-spear3xx/</div><div class='add'>+F:	arch/arm/mach-spear13xx/</div><div class='ctx'> </div><div class='del'>-SPEAR6XX MACHINE SUPPORT</div><div class='del'>-M:	Rajeev Kumar &lt;rajeev-dlh.kumar@st.com&gt;</div><div class='add'>+SPEAR3XX MACHINE SUPPORT</div><div class='add'>+M:	Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+M:	Shiraz Hashim &lt;shiraz.hashim@st.com&gt;</div><div class='ctx'> L:	spear-devel@list.st.com</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> W:	http://www.st.com/spear</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	arch/arm/mach-spear6xx/</div><div class='add'>+F:	arch/arm/mach-spear3xx/</div><div class='ctx'> </div><div class='del'>-SPEAR CLOCK FRAMEWORK SUPPORT</div><div class='add'>+SPEAR6XX MACHINE SUPPORT</div><div class='add'>+M:	Rajeev Kumar &lt;rajeev-dlh.kumar@st.com&gt;</div><div class='add'>+M:	Shiraz Hashim &lt;shiraz.hashim@st.com&gt;</div><div class='ctx'> M:	Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='ctx'> L:	spear-devel@list.st.com</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> W:	http://www.st.com/spear</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	arch/arm/mach-spear*/clock.c</div><div class='del'>-F:	arch/arm/plat-spear/clock.c</div><div class='del'>-F:	arch/arm/plat-spear/include/plat/clock.h</div><div class='add'>+F:	arch/arm/mach-spear6xx/</div><div class='ctx'> </div><div class='del'>-SPEAR PAD MULTIPLEXING SUPPORT</div><div class='add'>+SPEAR CLOCK FRAMEWORK SUPPORT</div><div class='ctx'> M:	Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='ctx'> L:	spear-devel@list.st.com</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> W:	http://www.st.com/spear</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	arch/arm/plat-spear/include/plat/padmux.h</div><div class='del'>-F:	arch/arm/plat-spear/padmux.c</div><div class='del'>-F:	arch/arm/mach-spear*/spear*xx.c</div><div class='del'>-F:	arch/arm/mach-spear*/include/mach/generic.h</div><div class='del'>-F:	arch/arm/mach-spear3xx/spear3*0.c</div><div class='del'>-F:	arch/arm/mach-spear3xx/spear3*0_evb.c</div><div class='del'>-F:	arch/arm/mach-spear6xx/spear600.c</div><div class='del'>-F:	arch/arm/mach-spear6xx/spear600_evb.c</div><div class='add'>+F:	drivers/clk/spear/</div><div class='ctx'> </div><div class='ctx'> SPI SUBSYSTEM</div><div class='ctx'> M:	Grant Likely &lt;grant.likely@secretlab.ca&gt;</div><div class='hunk'>@@ -6553,7 +6619,7 @@ M:	Paul Mundt &lt;lethal@linux-sh.org&gt;</div><div class='ctx'> L:	linux-sh@vger.kernel.org</div><div class='ctx'> W:	http://www.linux-sh.org</div><div class='ctx'> Q:	http://patchwork.kernel.org/project/linux-sh/list/</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6.git sh-latest</div><div class='add'>+T:	git git://github.com/pmundt/linux-sh.git sh-latest</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/sh/</div><div class='ctx'> F:	arch/sh/</div><div class='hunk'>@@ -6607,7 +6673,7 @@ F:	include/linux/taskstats*</div><div class='ctx'> F:	kernel/taskstats.c</div><div class='ctx'> </div><div class='ctx'> TC CLASSIFIER</div><div class='del'>-M:	Jamal Hadi Salim &lt;hadi@cyberus.ca&gt;</div><div class='add'>+M:	Jamal Hadi Salim &lt;jhs@mojatatu.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	include/linux/pkt_cls.h</div><div class='hunk'>@@ -6671,12 +6737,28 @@ F:	drivers/misc/tifm*</div><div class='ctx'> F:	drivers/mmc/host/tifm_sd.c</div><div class='ctx'> F:	include/linux/tifm.h</div><div class='ctx'> </div><div class='add'>+TI LM49xxx FAMILY ASoC CODEC DRIVERS</div><div class='add'>+M:	M R Swami Reddy &lt;mr.swami.reddy@ti.com&gt;</div><div class='add'>+L:	alsa-devel@alsa-project.org (moderated for non-subscribers)</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	sound/soc/codecs/lm49453*</div><div class='add'>+</div><div class='ctx'> TI TWL4030 SERIES SOC CODEC DRIVER</div><div class='ctx'> M:	Peter Ujfalusi &lt;peter.ujfalusi@ti.com&gt;</div><div class='ctx'> L:	alsa-devel@alsa-project.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	sound/soc/codecs/twl4030*</div><div class='ctx'> </div><div class='add'>+TI WILINK WIRELESS DRIVERS</div><div class='add'>+M:	Luciano Coelho &lt;coelho@ti.com&gt;</div><div class='add'>+L:	linux-wireless@vger.kernel.org</div><div class='add'>+W:	http://wireless.kernel.org/en/users/Drivers/wl12xx</div><div class='add'>+W:	http://wireless.kernel.org/en/users/Drivers/wl1251</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/luca/wl12xx.git</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/net/wireless/ti/</div><div class='add'>+F:	include/linux/wl12xx.h</div><div class='add'>+</div><div class='ctx'> TIPC NETWORK LAYER</div><div class='ctx'> M:	Jon Maloy &lt;jon.maloy@ericsson.com&gt;</div><div class='ctx'> M:	Allan Stephens &lt;allan.stephens@windriver.com&gt;</div><div class='hunk'>@@ -6884,6 +6966,14 @@ F:	Documentation/cdrom/</div><div class='ctx'> F:	drivers/cdrom/cdrom.c</div><div class='ctx'> F:	include/linux/cdrom.h</div><div class='ctx'> </div><div class='add'>+UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER</div><div class='add'>+M:	Vinayak Holikatti &lt;vinholikatti@gmail.com&gt;</div><div class='add'>+M:	Santosh Y &lt;santoshsy@gmail.com&gt;</div><div class='add'>+L:	linux-scsi@vger.kernel.org</div><div class='add'>+S:	Supported</div><div class='add'>+F:	Documentation/scsi/ufs.txt</div><div class='add'>+F:	drivers/scsi/ufs/</div><div class='add'>+</div><div class='ctx'> UNSORTED BLOCK IMAGES (UBI)</div><div class='ctx'> M:	Artem Bityutskiy &lt;dedekind1@gmail.com&gt;</div><div class='ctx'> W:	http://www.linux-mtd.infradead.org/</div><div class='hunk'>@@ -7030,6 +7120,14 @@ W:	http://pegasus2.sourceforge.net/</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/net/usb/pegasus.*</div><div class='ctx'> </div><div class='add'>+USB PHY LAYER</div><div class='add'>+M:	Felipe Balbi &lt;balbi@ti.com&gt;</div><div class='add'>+L:	linux-usb@vger.kernel.org</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/usb/phy/</div><div class='add'>+F:	drivers/usb/otg/</div><div class='add'>+</div><div class='ctx'> USB PRINTER DRIVER (usblp)</div><div class='ctx'> M:	Pete Zaitcev &lt;zaitcev@redhat.com&gt;</div><div class='ctx'> L:	linux-usb@vger.kernel.org</div><div class='hunk'>@@ -7143,7 +7241,7 @@ F:	include/linux/usb/usbnet.h</div><div class='ctx'> </div><div class='ctx'> USB VIDEO CLASS</div><div class='ctx'> M:	Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;</div><div class='del'>-L:	linux-uvc-devel@lists.berlios.de (subscribers-only)</div><div class='add'>+L:	linux-uvc-devel@lists.sourceforge.net (subscribers-only)</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media.git</div><div class='ctx'> W:	http://www.ideasonboard.org/uvc/</div><div class='hunk'>@@ -7209,11 +7307,11 @@ F:	Documentation/DocBook/uio-howto.tmpl</div><div class='ctx'> F:	drivers/uio/</div><div class='ctx'> F:	include/linux/uio*.h</div><div class='ctx'> </div><div class='del'>-UTIL-LINUX-NG PACKAGE</div><div class='add'>+UTIL-LINUX PACKAGE</div><div class='ctx'> M:	Karel Zak &lt;kzak@redhat.com&gt;</div><div class='del'>-L:	util-linux-ng@vger.kernel.org</div><div class='del'>-W:	http://kernel.org/~kzak/util-linux-ng/</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/utils/util-linux-ng/util-linux-ng.git</div><div class='add'>+L:	util-linux@vger.kernel.org</div><div class='add'>+W:	http://en.wikipedia.org/wiki/Util-linux</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/utils/util-linux/util-linux.git</div><div class='ctx'> S:	Maintained</div><div class='ctx'> </div><div class='ctx'> UVESAFB DRIVER</div><div class='hunk'>@@ -7313,6 +7411,18 @@ S:	Maintained</div><div class='ctx'> F:	drivers/vlynq/vlynq.c</div><div class='ctx'> F:	include/linux/vlynq.h</div><div class='ctx'> </div><div class='add'>+VME SUBSYSTEM</div><div class='add'>+M:	Martyn Welch &lt;martyn.welch@ge.com&gt;</div><div class='add'>+M:	Manohar Vanga &lt;manohar.vanga@cern.ch&gt;</div><div class='add'>+M:	Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='add'>+L:	devel@driverdev.osuosl.org</div><div class='add'>+S:	Maintained</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git</div><div class='add'>+F:	Documentation/vme_api.txt</div><div class='add'>+F:	drivers/staging/vme/</div><div class='add'>+F:	drivers/vme/</div><div class='add'>+F:	include/linux/vme*</div><div class='add'>+</div><div class='ctx'> VMWARE VMXNET3 ETHERNET DRIVER</div><div class='ctx'> M:	Shreyas Bhatewara &lt;sbhatewara@vmware.com&gt;</div><div class='ctx'> M:	"VMware, Inc." &lt;pv-drivers@vmware.com&gt;</div><div class='hunk'>@@ -7433,23 +7543,6 @@ M:	Miloslav Trmac &lt;mitr@volny.cz&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/input/misc/wistron_btns.c</div><div class='ctx'> </div><div class='del'>-WL1251 WIRELESS DRIVER</div><div class='del'>-M:	Luciano Coelho &lt;coelho@ti.com&gt;</div><div class='del'>-L:	linux-wireless@vger.kernel.org</div><div class='del'>-W:	http://wireless.kernel.org/en/users/Drivers/wl1251</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git</div><div class='del'>-S:	Maintained</div><div class='del'>-F:	drivers/net/wireless/wl1251/*</div><div class='del'>-</div><div class='del'>-WL1271 WIRELESS DRIVER</div><div class='del'>-M:	Luciano Coelho &lt;coelho@ti.com&gt;</div><div class='del'>-L:	linux-wireless@vger.kernel.org</div><div class='del'>-W:	http://wireless.kernel.org/en/users/Drivers/wl12xx</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/luca/wl12xx.git</div><div class='del'>-S:	Maintained</div><div class='del'>-F:	drivers/net/wireless/wl12xx/</div><div class='del'>-F:	include/linux/wl12xx.h</div><div class='del'>-</div><div class='ctx'> WL3501 WIRELESS PCMCIA CARD DRIVER</div><div class='ctx'> M:	Arnaldo Carvalho de Melo &lt;acme@ghostprotocols.net&gt;</div><div class='ctx'> L:	linux-wireless@vger.kernel.org</div><div class='hunk'>@@ -7571,7 +7664,7 @@ XFS FILESYSTEM</div><div class='ctx'> P:	Silicon Graphics Inc</div><div class='ctx'> M:	Ben Myers &lt;bpm@sgi.com&gt;</div><div class='ctx'> M:	Alex Elder &lt;elder@kernel.org&gt;</div><div class='del'>-M:	xfs-masters@oss.sgi.com</div><div class='add'>+M:	xfs@oss.sgi.com</div><div class='ctx'> L:	xfs@oss.sgi.com</div><div class='ctx'> W:	http://oss.sgi.com/projects/xfs</div><div class='ctx'> T:	git git://oss.sgi.com/xfs/xfs.git</div><div class='head'>diff --git a/Makefile b/Makefile<br/>index a06ee9fa8022..d845c2a1aa68 100644<br/>--- a/<a href='/drm-misc/tree/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>Makefile</a><br/>+++ b/<a href='/drm-misc/tree/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>Makefile</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> VERSION = 3</div><div class='del'>-PATCHLEVEL = 4</div><div class='add'>+PATCHLEVEL = 5</div><div class='ctx'> SUBLEVEL = 0</div><div class='del'>-EXTRAVERSION = -rc5</div><div class='add'>+EXTRAVERSION = -rc2</div><div class='ctx'> NAME = Saber-toothed Squirrel</div><div class='ctx'> </div><div class='ctx'> # *DOCUMENTATION*</div><div class='hunk'>@@ -231,10 +231,6 @@ endif</div><div class='ctx'> # Where to locate arch specific headers</div><div class='ctx'> hdr-arch  := $(SRCARCH)</div><div class='ctx'> </div><div class='del'>-ifeq ($(ARCH),m68knommu)</div><div class='del'>-       hdr-arch  := m68k</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> KCONFIG_CONFIG	?= .config</div><div class='ctx'> export KCONFIG_CONFIG</div><div class='ctx'> </div><div class='hunk'>@@ -341,7 +337,6 @@ AWK		= awk</div><div class='ctx'> GENKSYMS	= scripts/genksyms/genksyms</div><div class='ctx'> INSTALLKERNEL  := installkernel</div><div class='ctx'> DEPMOD		= /sbin/depmod</div><div class='del'>-KALLSYMS	= scripts/kallsyms</div><div class='ctx'> PERL		= perl</div><div class='ctx'> CHECK		= sparse</div><div class='ctx'> </div><div class='hunk'>@@ -400,8 +395,10 @@ export MODVERDIR := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/).tmp_ve</div><div class='ctx'> </div><div class='ctx'> # Files to ignore in find ... statements</div><div class='ctx'> </div><div class='del'>-RCS_FIND_IGNORE := \( -name SCCS -o -name BitKeeper -o -name .svn -o -name CVS -o -name .pc -o -name .hg -o -name .git \) -prune -o</div><div class='del'>-export RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn --exclude CVS --exclude .pc --exclude .hg --exclude .git</div><div class='add'>+RCS_FIND_IGNORE := \( -name SCCS -o -name BitKeeper -o -name .svn -o -name CVS \</div><div class='add'>+		   -o -name .pc -o -name .hg -o -name .git \) -prune -o</div><div class='add'>+export RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn \</div><div class='add'>+			 --exclude CVS --exclude .pc --exclude .hg --exclude .git</div><div class='ctx'> </div><div class='ctx'> # ===========================================================================</div><div class='ctx'> # Rules shared between *config targets and build targets</div><div class='hunk'>@@ -442,7 +439,7 @@ asm-generic:</div><div class='ctx'> </div><div class='ctx'> no-dot-config-targets := clean mrproper distclean \</div><div class='ctx'> 			 cscope gtags TAGS tags help %docs check% coccicheck \</div><div class='del'>-			 include/linux/version.h headers_% archheaders \</div><div class='add'>+			 include/linux/version.h headers_% archheaders archscripts \</div><div class='ctx'> 			 kernelversion %src-pkg</div><div class='ctx'> </div><div class='ctx'> config-targets := 0</div><div class='hunk'>@@ -564,6 +561,16 @@ else</div><div class='ctx'> KBUILD_CFLAGS	+= -O2</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+ifdef CONFIG_READABLE_ASM</div><div class='add'>+# Disable optimizations that make assembler listings hard to read.</div><div class='add'>+# reorder blocks reorders the control in the function</div><div class='add'>+# ipa clone creates specialized cloned functions</div><div class='add'>+# partial inlining inlines only parts of functions</div><div class='add'>+KBUILD_CFLAGS += $(call cc-option,-fno-reorder-blocks,) \</div><div class='add'>+                 $(call cc-option,-fno-ipa-cp-clone,) \</div><div class='add'>+                 $(call cc-option,-fno-partial-inlining)</div><div class='add'>+endif</div><div class='add'>+</div><div class='ctx'> include $(srctree)/arch/$(SRCARCH)/Makefile</div><div class='ctx'> </div><div class='ctx'> ifneq ($(CONFIG_FRAME_WARN),0)</div><div class='hunk'>@@ -727,187 +734,21 @@ libs-y1		:= $(patsubst %/, %/lib.a, $(libs-y))</div><div class='ctx'> libs-y2		:= $(patsubst %/, %/built-in.o, $(libs-y))</div><div class='ctx'> libs-y		:= $(libs-y1) $(libs-y2)</div><div class='ctx'> </div><div class='del'>-# Build vmlinux</div><div class='del'>-# ---------------------------------------------------------------------------</div><div class='del'>-# vmlinux is built from the objects selected by $(vmlinux-init) and</div><div class='del'>-# $(vmlinux-main). Most are built-in.o files from top-level directories</div><div class='del'>-# in the kernel tree, others are specified in arch/$(ARCH)/Makefile.</div><div class='del'>-# Ordering when linking is important, and $(vmlinux-init) must be first.</div><div class='del'>-#</div><div class='del'>-# vmlinux</div><div class='del'>-#   ^</div><div class='del'>-#   |</div><div class='del'>-#   +-&lt; $(vmlinux-init)</div><div class='del'>-#   |   +--&lt; init/version.o + more</div><div class='del'>-#   |</div><div class='del'>-#   +--&lt; $(vmlinux-main)</div><div class='del'>-#   |    +--&lt; driver/built-in.o mm/built-in.o + more</div><div class='del'>-#   |</div><div class='del'>-#   +-&lt; kallsyms.o (see description in CONFIG_KALLSYMS section)</div><div class='del'>-#</div><div class='del'>-# vmlinux version (uname -v) cannot be updated during normal</div><div class='del'>-# descending-into-subdirs phase since we do not yet know if we need to</div><div class='del'>-# update vmlinux.</div><div class='del'>-# Therefore this step is delayed until just before final link of vmlinux -</div><div class='del'>-# except in the kallsyms case where it is done just before adding the</div><div class='del'>-# symbols to the kernel.</div><div class='del'>-#</div><div class='del'>-# System.map is generated to document addresses of all kernel symbols</div><div class='del'>-</div><div class='del'>-vmlinux-init := $(head-y) $(init-y)</div><div class='del'>-vmlinux-main := $(core-y) $(libs-y) $(drivers-y) $(net-y)</div><div class='del'>-vmlinux-all  := $(vmlinux-init) $(vmlinux-main)</div><div class='del'>-vmlinux-lds  := arch/$(SRCARCH)/kernel/vmlinux.lds</div><div class='del'>-export KBUILD_VMLINUX_OBJS := $(vmlinux-all)</div><div class='del'>-</div><div class='del'>-# Rule to link vmlinux - also used during CONFIG_KALLSYMS</div><div class='del'>-# May be overridden by arch/$(ARCH)/Makefile</div><div class='del'>-quiet_cmd_vmlinux__ ?= LD      $@</div><div class='del'>-      cmd_vmlinux__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_vmlinux) -o $@ \</div><div class='del'>-      -T $(vmlinux-lds) $(vmlinux-init)                          \</div><div class='del'>-      --start-group $(vmlinux-main) --end-group                  \</div><div class='del'>-      $(filter-out $(vmlinux-lds) $(vmlinux-init) $(vmlinux-main) vmlinux.o FORCE ,$^)</div><div class='del'>-</div><div class='del'>-# Generate new vmlinux version</div><div class='del'>-quiet_cmd_vmlinux_version = GEN     .version</div><div class='del'>-      cmd_vmlinux_version = set -e;                     \</div><div class='del'>-	if [ ! -r .version ]; then			\</div><div class='del'>-	  rm -f .version;				\</div><div class='del'>-	  echo 1 &gt;.version;				\</div><div class='del'>-	else						\</div><div class='del'>-	  mv .version .old_version;			\</div><div class='del'>-	  expr 0$$(cat .old_version) + 1 &gt;.version;	\</div><div class='del'>-	fi;						\</div><div class='del'>-	$(MAKE) $(build)=init</div><div class='del'>-</div><div class='del'>-# Generate System.map</div><div class='del'>-quiet_cmd_sysmap = SYSMAP</div><div class='del'>-      cmd_sysmap = $(CONFIG_SHELL) $(srctree)/scripts/mksysmap</div><div class='del'>-</div><div class='del'>-# Link of vmlinux</div><div class='del'>-# If CONFIG_KALLSYMS is set .version is already updated</div><div class='del'>-# Generate System.map and verify that the content is consistent</div><div class='del'>-# Use + in front of the vmlinux_version rule to silent warning with make -j2</div><div class='del'>-# First command is ':' to allow us to use + in front of the rule</div><div class='del'>-define rule_vmlinux__</div><div class='del'>-	:</div><div class='del'>-	$(if $(CONFIG_KALLSYMS),,+$(call cmd,vmlinux_version))</div><div class='del'>-</div><div class='del'>-	$(call cmd,vmlinux__)</div><div class='del'>-	$(Q)echo 'cmd_$@ := $(cmd_vmlinux__)' &gt; $(@D)/.$(@F).cmd</div><div class='del'>-</div><div class='del'>-	$(Q)$(if $($(quiet)cmd_sysmap),                                      \</div><div class='del'>-	  echo '  $($(quiet)cmd_sysmap)  System.map' &amp;&amp;)                     \</div><div class='del'>-	$(cmd_sysmap) $@ System.map;                                         \</div><div class='del'>-	if [ $$? -ne 0 ]; then                                               \</div><div class='del'>-		rm -f $@;                                                    \</div><div class='del'>-		/bin/false;                                                  \</div><div class='del'>-	fi;</div><div class='del'>-	$(verify_kallsyms)</div><div class='del'>-endef</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-ifdef CONFIG_KALLSYMS</div><div class='del'>-# Generate section listing all symbols and add it into vmlinux $(kallsyms.o)</div><div class='del'>-# It's a three stage process:</div><div class='del'>-# o .tmp_vmlinux1 has all symbols and sections, but __kallsyms is</div><div class='del'>-#   empty</div><div class='del'>-#   Running kallsyms on that gives us .tmp_kallsyms1.o with</div><div class='del'>-#   the right size - vmlinux version (uname -v) is updated during this step</div><div class='del'>-# o .tmp_vmlinux2 now has a __kallsyms section of the right size,</div><div class='del'>-#   but due to the added section, some addresses have shifted.</div><div class='del'>-#   From here, we generate a correct .tmp_kallsyms2.o</div><div class='del'>-# o The correct .tmp_kallsyms2.o is linked into the final vmlinux.</div><div class='del'>-# o Verify that the System.map from vmlinux matches the map from</div><div class='del'>-#   .tmp_vmlinux2, just in case we did not generate kallsyms correctly.</div><div class='del'>-# o If 'make KALLSYMS_EXTRA_PASS=1" was used, do an extra pass using</div><div class='del'>-#   .tmp_vmlinux3 and .tmp_kallsyms3.o.  This is only meant as a</div><div class='del'>-#   temporary bypass to allow the kernel to be built while the</div><div class='del'>-#   maintainers work out what went wrong with kallsyms.</div><div class='del'>-</div><div class='del'>-last_kallsyms := 2</div><div class='del'>-</div><div class='del'>-ifdef KALLSYMS_EXTRA_PASS</div><div class='del'>-ifneq ($(KALLSYMS_EXTRA_PASS),0)</div><div class='del'>-last_kallsyms := 3</div><div class='del'>-endif</div><div class='del'>-endif</div><div class='del'>-</div><div class='del'>-kallsyms.o := .tmp_kallsyms$(last_kallsyms).o</div><div class='del'>-</div><div class='del'>-define verify_kallsyms</div><div class='del'>-	$(Q)$(if $($(quiet)cmd_sysmap),                                      \</div><div class='del'>-	  echo '  $($(quiet)cmd_sysmap)  .tmp_System.map' &amp;&amp;)                \</div><div class='del'>-	  $(cmd_sysmap) .tmp_vmlinux$(last_kallsyms) .tmp_System.map</div><div class='del'>-	$(Q)cmp -s System.map .tmp_System.map ||                             \</div><div class='del'>-		(echo Inconsistent kallsyms data;                            \</div><div class='del'>-		 echo This is a bug - please report about it;                \</div><div class='del'>-		 echo Try "make KALLSYMS_EXTRA_PASS=1" as a workaround;      \</div><div class='del'>-		 rm .tmp_kallsyms* ; /bin/false )</div><div class='del'>-endef</div><div class='del'>-</div><div class='del'>-# Update vmlinux version before link</div><div class='del'>-# Use + in front of this rule to silent warning about make -j1</div><div class='del'>-# First command is ':' to allow us to use + in front of this rule</div><div class='del'>-cmd_ksym_ld = $(cmd_vmlinux__)</div><div class='del'>-define rule_ksym_ld</div><div class='del'>-	: </div><div class='del'>-	+$(call cmd,vmlinux_version)</div><div class='del'>-	$(call cmd,vmlinux__)</div><div class='del'>-	$(Q)echo 'cmd_$@ := $(cmd_vmlinux__)' &gt; $(@D)/.$(@F).cmd</div><div class='del'>-endef</div><div class='del'>-</div><div class='del'>-# Generate .S file with all kernel symbols</div><div class='del'>-quiet_cmd_kallsyms = KSYM    $@</div><div class='del'>-      cmd_kallsyms = $(NM) -n $&lt; | $(KALLSYMS) \</div><div class='del'>-                     $(if $(CONFIG_KALLSYMS_ALL),--all-symbols) &gt; $@</div><div class='add'>+# Externally visible symbols (used by link-vmlinux.sh)</div><div class='add'>+export KBUILD_VMLINUX_INIT := $(head-y) $(init-y)</div><div class='add'>+export KBUILD_VMLINUX_MAIN := $(core-y) $(libs-y) $(drivers-y) $(net-y)</div><div class='add'>+export KBUILD_LDS          := arch/$(SRCARCH)/kernel/vmlinux.lds</div><div class='add'>+export LDFLAGS_vmlinux</div><div class='ctx'> </div><div class='del'>-.tmp_kallsyms1.o .tmp_kallsyms2.o .tmp_kallsyms3.o: %.o: %.S scripts FORCE</div><div class='del'>-	$(call if_changed_dep,as_o_S)</div><div class='add'>+vmlinux-deps := $(KBUILD_LDS) $(KBUILD_VMLINUX_INIT) $(KBUILD_VMLINUX_MAIN)</div><div class='ctx'> </div><div class='del'>-.tmp_kallsyms%.S: .tmp_vmlinux% $(KALLSYMS)</div><div class='del'>-	$(call cmd,kallsyms)</div><div class='add'>+# Final link of vmlinux</div><div class='add'>+      cmd_link-vmlinux = $(CONFIG_SHELL) $&lt; $(LD) $(LDFLAGS) $(LDFLAGS_vmlinux)</div><div class='add'>+quiet_cmd_link-vmlinux = LINK    $@</div><div class='ctx'> </div><div class='del'>-# .tmp_vmlinux1 must be complete except kallsyms, so update vmlinux version</div><div class='del'>-.tmp_vmlinux1: $(vmlinux-lds) $(vmlinux-all) FORCE</div><div class='del'>-	$(call if_changed_rule,ksym_ld)</div><div class='del'>-</div><div class='del'>-.tmp_vmlinux2: $(vmlinux-lds) $(vmlinux-all) .tmp_kallsyms1.o FORCE</div><div class='del'>-	$(call if_changed,vmlinux__)</div><div class='del'>-</div><div class='del'>-.tmp_vmlinux3: $(vmlinux-lds) $(vmlinux-all) .tmp_kallsyms2.o FORCE</div><div class='del'>-	$(call if_changed,vmlinux__)</div><div class='del'>-</div><div class='del'>-# Needs to visit scripts/ before $(KALLSYMS) can be used.</div><div class='del'>-$(KALLSYMS): scripts ;</div><div class='del'>-</div><div class='del'>-# Generate some data for debugging strange kallsyms problems</div><div class='del'>-debug_kallsyms: .tmp_map$(last_kallsyms)</div><div class='del'>-</div><div class='del'>-.tmp_map%: .tmp_vmlinux% FORCE</div><div class='del'>-	($(OBJDUMP) -h $&lt; | $(AWK) '/^ +[0-9]/{print $$4 " 0 " $$2}'; $(NM) $&lt;) | sort &gt; $@</div><div class='del'>-</div><div class='del'>-.tmp_map3: .tmp_map2</div><div class='del'>-</div><div class='del'>-.tmp_map2: .tmp_map1</div><div class='del'>-</div><div class='del'>-endif # ifdef CONFIG_KALLSYMS</div><div class='del'>-</div><div class='del'>-# Do modpost on a prelinked vmlinux. The finally linked vmlinux has</div><div class='del'>-# relevant sections renamed as per the linker script.</div><div class='del'>-quiet_cmd_vmlinux-modpost = LD      $@</div><div class='del'>-      cmd_vmlinux-modpost = $(LD) $(LDFLAGS) -r -o $@                          \</div><div class='del'>-	 $(vmlinux-init) --start-group $(vmlinux-main) --end-group             \</div><div class='del'>-	 $(filter-out $(vmlinux-init) $(vmlinux-main) FORCE ,$^)</div><div class='del'>-define rule_vmlinux-modpost</div><div class='del'>-	:</div><div class='del'>-	+$(call cmd,vmlinux-modpost)</div><div class='del'>-	$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost $@</div><div class='del'>-	$(Q)echo 'cmd_$@ := $(cmd_vmlinux-modpost)' &gt; $(dot-target).cmd</div><div class='del'>-endef</div><div class='del'>-</div><div class='del'>-# vmlinux image - including updated kernel symbols</div><div class='del'>-vmlinux: $(vmlinux-lds) $(vmlinux-init) $(vmlinux-main) vmlinux.o $(kallsyms.o) FORCE</div><div class='add'>+# Include targets which we want to</div><div class='add'>+# execute if the rest of the kernel build went well.</div><div class='add'>+vmlinux: scripts/link-vmlinux.sh $(vmlinux-deps) FORCE</div><div class='ctx'> ifdef CONFIG_HEADERS_CHECK</div><div class='ctx'> 	$(Q)$(MAKE) -f $(srctree)/Makefile headers_check</div><div class='ctx'> endif</div><div class='hunk'>@@ -917,22 +758,11 @@ endif</div><div class='ctx'> ifdef CONFIG_BUILD_DOCSRC</div><div class='ctx'> 	$(Q)$(MAKE) $(build)=Documentation</div><div class='ctx'> endif</div><div class='del'>-	$(call vmlinux-modpost)</div><div class='del'>-	$(call if_changed_rule,vmlinux__)</div><div class='del'>-	$(Q)rm -f .old_version</div><div class='del'>-</div><div class='del'>-# build vmlinux.o first to catch section mismatch errors early</div><div class='del'>-ifdef CONFIG_KALLSYMS</div><div class='del'>-.tmp_vmlinux1: vmlinux.o</div><div class='del'>-endif</div><div class='del'>-</div><div class='del'>-modpost-init := $(filter-out init/built-in.o, $(vmlinux-init))</div><div class='del'>-vmlinux.o: $(modpost-init) $(vmlinux-main) FORCE</div><div class='del'>-	$(call if_changed_rule,vmlinux-modpost)</div><div class='add'>+	+$(call if_changed,link-vmlinux)</div><div class='ctx'> </div><div class='ctx'> # The actual objects are generated when descending, </div><div class='ctx'> # make sure no implicit rule kicks in</div><div class='del'>-$(sort $(vmlinux-init) $(vmlinux-main)) $(vmlinux-lds): $(vmlinux-dirs) ;</div><div class='add'>+$(sort $(vmlinux-deps)): $(vmlinux-dirs) ;</div><div class='ctx'> </div><div class='ctx'> # Handle descending into subdirectories listed in $(vmlinux-dirs)</div><div class='ctx'> # Preset locale variables to speed up the build process. Limit locale</div><div class='hunk'>@@ -966,7 +796,7 @@ prepare3: include/config/kernel.release</div><div class='ctx'> ifneq ($(KBUILD_SRC),)</div><div class='ctx'> 	@$(kecho) '  Using $(srctree) as source for kernel'</div><div class='ctx'> 	$(Q)if [ -f $(srctree)/.config -o -d $(srctree)/include/config ]; then \</div><div class='del'>-		echo "  $(srctree) is not clean, please run 'make mrproper'";\</div><div class='add'>+		echo "  $(srctree) is not clean, please run 'make mrproper'"; \</div><div class='ctx'> 		echo "  in the '$(srctree)' directory.";\</div><div class='ctx'> 		/bin/false; \</div><div class='ctx'> 	fi;</div><div class='hunk'>@@ -979,7 +809,7 @@ prepare1: prepare2 include/linux/version.h include/generated/utsrelease.h \</div><div class='ctx'>                    include/config/auto.conf</div><div class='ctx'> 	$(cmd_crmodverdir)</div><div class='ctx'> </div><div class='del'>-archprepare: archheaders prepare1 scripts_basic</div><div class='add'>+archprepare: archheaders archscripts prepare1 scripts_basic</div><div class='ctx'> </div><div class='ctx'> prepare0: archprepare FORCE</div><div class='ctx'> 	$(Q)$(MAKE) $(build)=.</div><div class='hunk'>@@ -1003,8 +833,8 @@ define filechk_utsrelease.h</div><div class='ctx'> endef</div><div class='ctx'> </div><div class='ctx'> define filechk_version.h</div><div class='del'>-	(echo \#define LINUX_VERSION_CODE $(shell                             \</div><div class='del'>-	expr $(VERSION) \* 65536 + 0$(PATCHLEVEL) \* 256 + 0$(SUBLEVEL));    \</div><div class='add'>+	(echo \#define LINUX_VERSION_CODE $(shell                         \</div><div class='add'>+	expr $(VERSION) \* 65536 + 0$(PATCHLEVEL) \* 256 + 0$(SUBLEVEL)); \</div><div class='ctx'> 	echo '#define KERNEL_VERSION(a,b,c) (((a) &lt;&lt; 16) + ((b) &lt;&lt; 8) + (c))';)</div><div class='ctx'> endef</div><div class='ctx'> </div><div class='hunk'>@@ -1049,8 +879,11 @@ hdr-dst = $(if $(KBUILD_HEADERS), dst=include/asm-$(hdr-arch), dst=include/asm)</div><div class='ctx'> PHONY += archheaders</div><div class='ctx'> archheaders:</div><div class='ctx'> </div><div class='add'>+PHONY += archscripts</div><div class='add'>+archscripts:</div><div class='add'>+</div><div class='ctx'> PHONY += __headers</div><div class='del'>-__headers: include/linux/version.h scripts_basic asm-generic archheaders FORCE</div><div class='add'>+__headers: include/linux/version.h scripts_basic asm-generic archheaders archscripts FORCE</div><div class='ctx'> 	$(Q)$(MAKE) $(build)=scripts build_unifdef</div><div class='ctx'> </div><div class='ctx'> PHONY += headers_install_all</div><div class='hunk'>@@ -1156,8 +989,6 @@ endif # CONFIG_MODULES</div><div class='ctx'> </div><div class='ctx'> # Directories &amp; files removed with 'make clean'</div><div class='ctx'> CLEAN_DIRS  += $(MODVERDIR)</div><div class='del'>-CLEAN_FILES +=	vmlinux System.map \</div><div class='del'>-                .tmp_kallsyms* .tmp_version .tmp_vmlinux* .tmp_System.map</div><div class='ctx'> </div><div class='ctx'> # Directories &amp; files removed with 'make mrproper'</div><div class='ctx'> MRPROPER_DIRS  += include/config usr/include include/generated          \</div><div class='hunk'>@@ -1403,6 +1234,7 @@ scripts: ;</div><div class='ctx'> endif # KBUILD_EXTMOD</div><div class='ctx'> </div><div class='ctx'> clean: $(clean-dirs)</div><div class='add'>+	$(Q)$(CONFIG_SHELL) $(srctree)/scripts/link-vmlinux.sh clean</div><div class='ctx'> 	$(call cmd,rmdirs)</div><div class='ctx'> 	$(call cmd,rmfiles)</div><div class='ctx'> 	@find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \</div><div class='hunk'>@@ -1468,6 +1300,13 @@ kernelrelease:</div><div class='ctx'> kernelversion:</div><div class='ctx'> 	@echo $(KERNELVERSION)</div><div class='ctx'> </div><div class='add'>+# Clear a bunch of variables before executing the submake</div><div class='add'>+tools/: FORCE</div><div class='add'>+	$(Q)$(MAKE) LDFLAGS= MAKEFLAGS= -C $(src)/tools/</div><div class='add'>+</div><div class='add'>+tools/%: FORCE</div><div class='add'>+	$(Q)$(MAKE) LDFLAGS= MAKEFLAGS= -C $(src)/tools/ $*</div><div class='add'>+</div><div class='ctx'> # Single targets</div><div class='ctx'> # ---------------------------------------------------------------------------</div><div class='ctx'> # Single targets are compatible with:</div><div class='hunk'>@@ -1536,14 +1375,6 @@ quiet_cmd_depmod = DEPMOD  $(KERNELRELEASE)</div><div class='ctx'> cmd_crmodverdir = $(Q)mkdir -p $(MODVERDIR) \</div><div class='ctx'>                   $(if $(KBUILD_MODULES),; rm -f $(MODVERDIR)/*)</div><div class='ctx'> </div><div class='del'>-a_flags = -Wp,-MD,$(depfile) $(KBUILD_AFLAGS) $(AFLAGS_KERNEL) \</div><div class='del'>-	  $(KBUILD_AFLAGS_KERNEL)                              \</div><div class='del'>-	  $(NOSTDINC_FLAGS) $(LINUXINCLUDE) $(KBUILD_CPPFLAGS) \</div><div class='del'>-	  $(modkern_aflags) $(EXTRA_AFLAGS) $(AFLAGS_$(basetarget).o)</div><div class='del'>-</div><div class='del'>-quiet_cmd_as_o_S = AS      $@</div><div class='del'>-cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $&lt;</div><div class='del'>-</div><div class='ctx'> # read all saved command lines</div><div class='ctx'> </div><div class='ctx'> targets := $(wildcard $(sort $(targets)))</div><div class='head'>diff --git a/README b/README<br/>index 0d5a7ddbe3ee..9beaed0ed620 100644<br/>--- a/<a href='/drm-misc/tree/README?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>README</a><br/>+++ b/<a href='/drm-misc/tree/README?id=66dd07b88a1c9d446f32253da606b87324fa620e'>README</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-	Linux kernel release 3.x &lt;http://kernel.org/&gt;</div><div class='add'>+        Linux kernel release 3.x &lt;http://kernel.org/&gt;</div><div class='ctx'> </div><div class='ctx'> These are the release notes for Linux version 3.  Read them carefully,</div><div class='ctx'> as they tell you what this is all about, explain how to install the</div><div class='hunk'>@@ -62,13 +62,13 @@ INSTALLING the kernel source:</div><div class='ctx'>    directory where you have permissions (eg. your home directory) and</div><div class='ctx'>    unpack it:</div><div class='ctx'> </div><div class='del'>-		gzip -cd linux-3.X.tar.gz | tar xvf -</div><div class='add'>+     gzip -cd linux-3.X.tar.gz | tar xvf -</div><div class='ctx'> </div><div class='ctx'>    or</div><div class='del'>-		bzip2 -dc linux-3.X.tar.bz2 | tar xvf -</div><div class='ctx'> </div><div class='add'>+     bzip2 -dc linux-3.X.tar.bz2 | tar xvf -</div><div class='ctx'> </div><div class='del'>-   Replace "XX" with the version number of the latest kernel.</div><div class='add'>+   Replace "X" with the version number of the latest kernel.</div><div class='ctx'> </div><div class='ctx'>    Do NOT use the /usr/src/linux area! This area has a (usually</div><div class='ctx'>    incomplete) set of kernel headers that are used by the library header</div><div class='hunk'>@@ -78,49 +78,43 @@ INSTALLING the kernel source:</div><div class='ctx'>  - You can also upgrade between 3.x releases by patching.  Patches are</div><div class='ctx'>    distributed in the traditional gzip and the newer bzip2 format.  To</div><div class='ctx'>    install by patching, get all the newer patch files, enter the</div><div class='del'>-   top level directory of the kernel source (linux-3.x) and execute:</div><div class='add'>+   top level directory of the kernel source (linux-3.X) and execute:</div><div class='ctx'> </div><div class='del'>-		gzip -cd ../patch-3.x.gz | patch -p1</div><div class='add'>+     gzip -cd ../patch-3.x.gz | patch -p1</div><div class='ctx'> </div><div class='ctx'>    or</div><div class='del'>-		bzip2 -dc ../patch-3.x.bz2 | patch -p1</div><div class='ctx'> </div><div class='del'>-   (repeat xx for all versions bigger than the version of your current</div><div class='del'>-   source tree, _in_order_) and you should be ok.  You may want to remove</div><div class='del'>-   the backup files (xxx~ or xxx.orig), and make sure that there are no</div><div class='del'>-   failed patches (xxx# or xxx.rej). If there are, either you or me has</div><div class='del'>-   made a mistake.</div><div class='add'>+     bzip2 -dc ../patch-3.x.bz2 | patch -p1</div><div class='add'>+</div><div class='add'>+   Replace "x" for all versions bigger than the version "X" of your current</div><div class='add'>+   source tree, _in_order_, and you should be ok.  You may want to remove</div><div class='add'>+   the backup files (some-file-name~ or some-file-name.orig), and make sure</div><div class='add'>+   that there are no failed patches (some-file-name# or some-file-name.rej).</div><div class='add'>+   If there are, either you or I have made a mistake.</div><div class='ctx'> </div><div class='ctx'>    Unlike patches for the 3.x kernels, patches for the 3.x.y kernels</div><div class='ctx'>    (also known as the -stable kernels) are not incremental but instead apply</div><div class='del'>-   directly to the base 3.x kernel.  Please read</div><div class='del'>-   Documentation/applying-patches.txt for more information.</div><div class='add'>+   directly to the base 3.x kernel.  For example, if your base kernel is 3.0</div><div class='add'>+   and you want to apply the 3.0.3 patch, you must not first apply the 3.0.1</div><div class='add'>+   and 3.0.2 patches. Similarly, if you are running kernel version 3.0.2 and</div><div class='add'>+   want to jump to 3.0.3, you must first reverse the 3.0.2 patch (that is,</div><div class='add'>+   patch -R) _before_ applying the 3.0.3 patch. You can read more on this in</div><div class='add'>+   Documentation/applying-patches.txt</div><div class='ctx'> </div><div class='ctx'>    Alternatively, the script patch-kernel can be used to automate this</div><div class='ctx'>    process.  It determines the current kernel version and applies any</div><div class='ctx'>    patches found.</div><div class='ctx'> </div><div class='del'>-		linux/scripts/patch-kernel linux</div><div class='add'>+     linux/scripts/patch-kernel linux</div><div class='ctx'> </div><div class='ctx'>    The first argument in the command above is the location of the</div><div class='ctx'>    kernel source.  Patches are applied from the current directory, but</div><div class='ctx'>    an alternative directory can be specified as the second argument.</div><div class='ctx'> </div><div class='del'>- - If you are upgrading between releases using the stable series patches</div><div class='del'>-   (for example, patch-3.x.y), note that these "dot-releases" are</div><div class='del'>-   not incremental and must be applied to the 3.x base tree. For</div><div class='del'>-   example, if your base kernel is 3.0 and you want to apply the</div><div class='del'>-   3.0.3 patch, you do not and indeed must not first apply the</div><div class='del'>-   3.0.1 and 3.0.2 patches. Similarly, if you are running kernel</div><div class='del'>-   version 3.0.2 and want to jump to 3.0.3, you must first</div><div class='del'>-   reverse the 3.0.2 patch (that is, patch -R) _before_ applying</div><div class='del'>-   the 3.0.3 patch.</div><div class='del'>-   You can read more on this in Documentation/applying-patches.txt</div><div class='del'>-</div><div class='ctx'>  - Make sure you have no stale .o files and dependencies lying around:</div><div class='ctx'> </div><div class='del'>-		cd linux</div><div class='del'>-		make mrproper</div><div class='add'>+     cd linux</div><div class='add'>+     make mrproper</div><div class='ctx'> </div><div class='ctx'>    You should now have the sources correctly installed.</div><div class='ctx'> </div><div class='hunk'>@@ -137,21 +131,23 @@ SOFTWARE REQUIREMENTS</div><div class='ctx'> </div><div class='ctx'> BUILD directory for the kernel:</div><div class='ctx'> </div><div class='del'>-   When compiling the kernel all output files will per default be</div><div class='add'>+   When compiling the kernel, all output files will per default be</div><div class='ctx'>    stored together with the kernel source code.</div><div class='ctx'>    Using the option "make O=output/dir" allow you to specify an alternate</div><div class='ctx'>    place for the output files (including .config).</div><div class='ctx'>    Example:</div><div class='del'>-     kernel source code:	/usr/src/linux-3.N</div><div class='del'>-     build directory:		/home/name/build/kernel</div><div class='ctx'> </div><div class='del'>-   To configure and build the kernel use:</div><div class='del'>-   cd /usr/src/linux-3.N</div><div class='del'>-   make O=/home/name/build/kernel menuconfig</div><div class='del'>-   make O=/home/name/build/kernel</div><div class='del'>-   sudo make O=/home/name/build/kernel modules_install install</div><div class='add'>+     kernel source code: /usr/src/linux-3.X</div><div class='add'>+     build directory:    /home/name/build/kernel</div><div class='add'>+</div><div class='add'>+   To configure and build the kernel, use:</div><div class='ctx'> </div><div class='del'>-   Please note: If the 'O=output/dir' option is used then it must be</div><div class='add'>+     cd /usr/src/linux-3.X</div><div class='add'>+     make O=/home/name/build/kernel menuconfig</div><div class='add'>+     make O=/home/name/build/kernel</div><div class='add'>+     sudo make O=/home/name/build/kernel modules_install install</div><div class='add'>+</div><div class='add'>+   Please note: If the 'O=output/dir' option is used, then it must be</div><div class='ctx'>    used for all invocations of make.</div><div class='ctx'> </div><div class='ctx'> CONFIGURING the kernel:</div><div class='hunk'>@@ -163,61 +159,78 @@ CONFIGURING the kernel:</div><div class='ctx'>    new version with minimal work, use "make oldconfig", which will</div><div class='ctx'>    only ask you for the answers to new questions.</div><div class='ctx'> </div><div class='del'>- - Alternate configuration commands are:</div><div class='del'>-	"make config"      Plain text interface.</div><div class='del'>-	"make menuconfig"  Text based color menus, radiolists &amp; dialogs.</div><div class='del'>-	"make nconfig"     Enhanced text based color menus.</div><div class='del'>-	"make xconfig"     X windows (Qt) based configuration tool.</div><div class='del'>-	"make gconfig"     X windows (Gtk) based configuration tool.</div><div class='del'>-	"make oldconfig"   Default all questions based on the contents of</div><div class='del'>-			   your existing ./.config file and asking about</div><div class='del'>-			   new config symbols.</div><div class='del'>-	"make silentoldconfig"</div><div class='del'>-			   Like above, but avoids cluttering the screen</div><div class='del'>-			   with questions already answered.</div><div class='del'>-			   Additionally updates the dependencies.</div><div class='del'>-	"make defconfig"   Create a ./.config file by using the default</div><div class='del'>-			   symbol values from either arch/$ARCH/defconfig</div><div class='del'>-			   or arch/$ARCH/configs/${PLATFORM}_defconfig,</div><div class='del'>-			   depending on the architecture.</div><div class='del'>-	"make ${PLATFORM}_defconfig"</div><div class='del'>-			  Create a ./.config file by using the default</div><div class='del'>-			  symbol values from</div><div class='del'>-			  arch/$ARCH/configs/${PLATFORM}_defconfig.</div><div class='del'>-			  Use "make help" to get a list of all available</div><div class='del'>-			  platforms of your architecture.</div><div class='del'>-	"make allyesconfig"</div><div class='del'>-			   Create a ./.config file by setting symbol</div><div class='del'>-			   values to 'y' as much as possible.</div><div class='del'>-	"make allmodconfig"</div><div class='del'>-			   Create a ./.config file by setting symbol</div><div class='del'>-			   values to 'm' as much as possible.</div><div class='del'>-	"make allnoconfig" Create a ./.config file by setting symbol</div><div class='del'>-			   values to 'n' as much as possible.</div><div class='del'>-	"make randconfig"  Create a ./.config file by setting symbol</div><div class='del'>-			   values to random values.</div><div class='add'>+ - Alternative configuration commands are:</div><div class='add'>+</div><div class='add'>+     "make config"      Plain text interface.</div><div class='add'>+</div><div class='add'>+     "make menuconfig"  Text based color menus, radiolists &amp; dialogs.</div><div class='add'>+</div><div class='add'>+     "make nconfig"     Enhanced text based color menus.</div><div class='add'>+</div><div class='add'>+     "make xconfig"     X windows (Qt) based configuration tool.</div><div class='add'>+</div><div class='add'>+     "make gconfig"     X windows (Gtk) based configuration tool.</div><div class='add'>+</div><div class='add'>+     "make oldconfig"   Default all questions based on the contents of</div><div class='add'>+                        your existing ./.config file and asking about</div><div class='add'>+                        new config symbols.</div><div class='add'>+</div><div class='add'>+     "make silentoldconfig"</div><div class='add'>+                        Like above, but avoids cluttering the screen</div><div class='add'>+                        with questions already answered.</div><div class='add'>+                        Additionally updates the dependencies.</div><div class='add'>+</div><div class='add'>+     "make defconfig"   Create a ./.config file by using the default</div><div class='add'>+                        symbol values from either arch/$ARCH/defconfig</div><div class='add'>+                        or arch/$ARCH/configs/${PLATFORM}_defconfig,</div><div class='add'>+                        depending on the architecture.</div><div class='add'>+</div><div class='add'>+     "make ${PLATFORM}_defconfig"</div><div class='add'>+                        Create a ./.config file by using the default</div><div class='add'>+                        symbol values from</div><div class='add'>+                        arch/$ARCH/configs/${PLATFORM}_defconfig.</div><div class='add'>+                        Use "make help" to get a list of all available</div><div class='add'>+                        platforms of your architecture.</div><div class='add'>+</div><div class='add'>+     "make allyesconfig"</div><div class='add'>+                        Create a ./.config file by setting symbol</div><div class='add'>+                        values to 'y' as much as possible.</div><div class='add'>+</div><div class='add'>+     "make allmodconfig"</div><div class='add'>+                        Create a ./.config file by setting symbol</div><div class='add'>+                        values to 'm' as much as possible.</div><div class='add'>+</div><div class='add'>+     "make allnoconfig" Create a ./.config file by setting symbol</div><div class='add'>+                        values to 'n' as much as possible.</div><div class='add'>+</div><div class='add'>+     "make randconfig"  Create a ./.config file by setting symbol</div><div class='add'>+                        values to random values.</div><div class='ctx'> </div><div class='ctx'>    You can find more information on using the Linux kernel config tools</div><div class='ctx'>    in Documentation/kbuild/kconfig.txt.</div><div class='ctx'> </div><div class='del'>-	NOTES on "make config":</div><div class='del'>-	- having unnecessary drivers will make the kernel bigger, and can</div><div class='del'>-	  under some circumstances lead to problems: probing for a</div><div class='del'>-	  nonexistent controller card may confuse your other controllers</div><div class='del'>-	- compiling the kernel with "Processor type" set higher than 386</div><div class='del'>-	  will result in a kernel that does NOT work on a 386.  The</div><div class='del'>-	  kernel will detect this on bootup, and give up.</div><div class='del'>-	- A kernel with math-emulation compiled in will still use the</div><div class='del'>-	  coprocessor if one is present: the math emulation will just</div><div class='del'>-	  never get used in that case.  The kernel will be slightly larger,</div><div class='del'>-	  but will work on different machines regardless of whether they</div><div class='del'>-	  have a math coprocessor or not. </div><div class='del'>-	- the "kernel hacking" configuration details usually result in a</div><div class='del'>-	  bigger or slower kernel (or both), and can even make the kernel</div><div class='del'>-	  less stable by configuring some routines to actively try to</div><div class='del'>-	  break bad code to find kernel problems (kmalloc()).  Thus you</div><div class='del'>-	  should probably answer 'n' to the questions for</div><div class='del'>-          "development", "experimental", or "debugging" features.</div><div class='add'>+ - NOTES on "make config":</div><div class='add'>+</div><div class='add'>+    - Having unnecessary drivers will make the kernel bigger, and can</div><div class='add'>+      under some circumstances lead to problems: probing for a</div><div class='add'>+      nonexistent controller card may confuse your other controllers</div><div class='add'>+</div><div class='add'>+    - Compiling the kernel with "Processor type" set higher than 386</div><div class='add'>+      will result in a kernel that does NOT work on a 386.  The</div><div class='add'>+      kernel will detect this on bootup, and give up.</div><div class='add'>+</div><div class='add'>+    - A kernel with math-emulation compiled in will still use the</div><div class='add'>+      coprocessor if one is present: the math emulation will just</div><div class='add'>+      never get used in that case.  The kernel will be slightly larger,</div><div class='add'>+      but will work on different machines regardless of whether they</div><div class='add'>+      have a math coprocessor or not.</div><div class='add'>+</div><div class='add'>+    - The "kernel hacking" configuration details usually result in a</div><div class='add'>+      bigger or slower kernel (or both), and can even make the kernel</div><div class='add'>+      less stable by configuring some routines to actively try to</div><div class='add'>+      break bad code to find kernel problems (kmalloc()).  Thus you</div><div class='add'>+      should probably answer 'n' to the questions for "development",</div><div class='add'>+      "experimental", or "debugging" features.</div><div class='ctx'> </div><div class='ctx'> COMPILING the kernel:</div><div class='ctx'> </div><div class='hunk'>@@ -230,7 +243,7 @@ COMPILING the kernel:</div><div class='ctx'>    possible to do "make install" if you have lilo installed to suit the</div><div class='ctx'>    kernel makefiles, but you may want to check your particular lilo setup first.</div><div class='ctx'> </div><div class='del'>-   To do the actual install you have to be root, but none of the normal</div><div class='add'>+   To do the actual install, you have to be root, but none of the normal</div><div class='ctx'>    build should require that. Don't take the name of root in vain.</div><div class='ctx'> </div><div class='ctx'>  - If you configured any of the parts of the kernel as `modules', you</div><div class='hunk'>@@ -238,13 +251,13 @@ COMPILING the kernel:</div><div class='ctx'> </div><div class='ctx'>  - Verbose kernel compile/build output:</div><div class='ctx'> </div><div class='del'>-   Normally the kernel build system runs in a fairly quiet mode (but not</div><div class='add'>+   Normally, the kernel build system runs in a fairly quiet mode (but not</div><div class='ctx'>    totally silent).  However, sometimes you or other kernel developers need</div><div class='ctx'>    to see compile, link, or other commands exactly as they are executed.</div><div class='ctx'>    For this, use "verbose" build mode.  This is done by inserting</div><div class='ctx'>    "V=1" in the "make" command.  E.g.:</div><div class='ctx'> </div><div class='del'>-	make V=1 all</div><div class='add'>+     make V=1 all</div><div class='ctx'> </div><div class='ctx'>    To have the build system also tell the reason for the rebuild of each</div><div class='ctx'>    target, use "V=2".  The default is "V=0".</div><div class='hunk'>@@ -256,6 +269,7 @@ COMPILING the kernel:</div><div class='ctx'>    are installing a new kernel with the same version number as your</div><div class='ctx'>    working kernel, make a backup of your modules directory before you</div><div class='ctx'>    do a "make modules_install".</div><div class='add'>+</div><div class='ctx'>    Alternatively, before compiling, use the kernel config option</div><div class='ctx'>    "LOCALVERSION" to append a unique suffix to the regular kernel version.</div><div class='ctx'>    LOCALVERSION can be set in the "General Setup" menu.</div><div class='hunk'>@@ -267,7 +281,7 @@ COMPILING the kernel:</div><div class='ctx'>  - Booting a kernel directly from a floppy without the assistance of a</div><div class='ctx'>    bootloader such as LILO, is no longer supported.</div><div class='ctx'> </div><div class='del'>-   If you boot Linux from the hard drive, chances are you use LILO which</div><div class='add'>+   If you boot Linux from the hard drive, chances are you use LILO, which</div><div class='ctx'>    uses the kernel image as specified in the file /etc/lilo.conf.  The</div><div class='ctx'>    kernel image file is usually /vmlinuz, /boot/vmlinuz, /bzImage or</div><div class='ctx'>    /boot/bzImage.  To use the new kernel, save a copy of the old image</div><div class='hunk'>@@ -306,21 +320,21 @@ IF SOMETHING GOES WRONG:</div><div class='ctx'> </div><div class='ctx'>  - If the bug results in a message like</div><div class='ctx'> </div><div class='del'>-	unable to handle kernel paging request at address C0000010</div><div class='del'>-	Oops: 0002</div><div class='del'>-	EIP:   0010:XXXXXXXX</div><div class='del'>-	eax: xxxxxxxx   ebx: xxxxxxxx   ecx: xxxxxxxx   edx: xxxxxxxx</div><div class='del'>-	esi: xxxxxxxx   edi: xxxxxxxx   ebp: xxxxxxxx</div><div class='del'>-	ds: xxxx  es: xxxx  fs: xxxx  gs: xxxx</div><div class='del'>-	Pid: xx, process nr: xx</div><div class='del'>-	xx xx xx xx xx xx xx xx xx xx</div><div class='add'>+     unable to handle kernel paging request at address C0000010</div><div class='add'>+     Oops: 0002</div><div class='add'>+     EIP:   0010:XXXXXXXX</div><div class='add'>+     eax: xxxxxxxx   ebx: xxxxxxxx   ecx: xxxxxxxx   edx: xxxxxxxx</div><div class='add'>+     esi: xxxxxxxx   edi: xxxxxxxx   ebp: xxxxxxxx</div><div class='add'>+     ds: xxxx  es: xxxx  fs: xxxx  gs: xxxx</div><div class='add'>+     Pid: xx, process nr: xx</div><div class='add'>+     xx xx xx xx xx xx xx xx xx xx</div><div class='ctx'> </div><div class='ctx'>    or similar kernel debugging information on your screen or in your</div><div class='ctx'>    system log, please duplicate it *exactly*.  The dump may look</div><div class='ctx'>    incomprehensible to you, but it does contain information that may</div><div class='ctx'>    help debugging the problem.  The text above the dump is also</div><div class='ctx'>    important: it tells something about why the kernel dumped code (in</div><div class='del'>-   the above example it's due to a bad kernel pointer). More information</div><div class='add'>+   the above example, it's due to a bad kernel pointer). More information</div><div class='ctx'>    on making sense of the dump is in Documentation/oops-tracing.txt</div><div class='ctx'> </div><div class='ctx'>  - If you compiled the kernel with CONFIG_KALLSYMS you can send the dump</div><div class='hunk'>@@ -328,7 +342,7 @@ IF SOMETHING GOES WRONG:</div><div class='ctx'>    sense of the dump (but compiling with CONFIG_KALLSYMS is usually preferred).</div><div class='ctx'>    This utility can be downloaded from</div><div class='ctx'>    ftp://ftp.&lt;country&gt;.kernel.org/pub/linux/utils/kernel/ksymoops/ .</div><div class='del'>-   Alternately you can do the dump lookup by hand:</div><div class='add'>+   Alternatively, you can do the dump lookup by hand:</div><div class='ctx'> </div><div class='ctx'>  - In debugging dumps like the above, it helps enormously if you can</div><div class='ctx'>    look up what the EIP value means.  The hex value as such doesn't help</div><div class='hunk'>@@ -342,7 +356,7 @@ IF SOMETHING GOES WRONG:</div><div class='ctx'>    the file 'linux/vmlinux'.  To extract the namelist and match it against</div><div class='ctx'>    the EIP from the kernel crash, do:</div><div class='ctx'> </div><div class='del'>-		nm vmlinux | sort | less</div><div class='add'>+     nm vmlinux | sort | less</div><div class='ctx'> </div><div class='ctx'>    This will give you a list of kernel addresses sorted in ascending</div><div class='ctx'>    order, from which it is simple to find the function that contains the</div><div class='hunk'>@@ -361,7 +375,7 @@ IF SOMETHING GOES WRONG:</div><div class='ctx'>    kernel image or similar), telling me as much about your setup as</div><div class='ctx'>    possible will help.  Please read the REPORTING-BUGS document for details.</div><div class='ctx'> </div><div class='del'>- - Alternately, you can use gdb on a running kernel. (read-only; i.e. you</div><div class='add'>+ - Alternatively, you can use gdb on a running kernel. (read-only; i.e. you</div><div class='ctx'>    cannot change values or set break points.) To do this, first compile the</div><div class='ctx'>    kernel with -g; edit arch/i386/Makefile appropriately, then do a "make</div><div class='ctx'>    clean". You'll also need to enable CONFIG_PROC_FS (via "make config").</div><div class='head'>diff --git a/arch/Kconfig b/arch/Kconfig<br/>index c024b3ed6675..8c3d957fa8e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/Kconfig</a></div><div class='hunk'>@@ -76,6 +76,23 @@ config OPTPROBES</div><div class='ctx'> 	depends on KPROBES &amp;&amp; HAVE_OPTPROBES</div><div class='ctx'> 	depends on !PREEMPT</div><div class='ctx'> </div><div class='add'>+config UPROBES</div><div class='add'>+	bool "Transparent user-space probes (EXPERIMENTAL)"</div><div class='add'>+	depends on UPROBE_EVENT &amp;&amp; PERF_EVENTS</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Uprobes is the user-space counterpart to kprobes: they</div><div class='add'>+	  enable instrumentation applications (such as 'perf probe')</div><div class='add'>+	  to establish unintrusive probes in user-space binaries and</div><div class='add'>+	  libraries, by executing handler functions when the probes</div><div class='add'>+	  are hit by user-space applications.</div><div class='add'>+</div><div class='add'>+	  ( These probes come in the form of single-byte breakpoints,</div><div class='add'>+	    managed by the kernel and kept transparent to the probed</div><div class='add'>+	    application. )</div><div class='add'>+</div><div class='add'>+	  If in doubt, say "N".</div><div class='add'>+</div><div class='ctx'> config HAVE_EFFICIENT_UNALIGNED_ACCESS</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='hunk'>@@ -142,9 +159,27 @@ config HAVE_ARCH_TRACEHOOK</div><div class='ctx'> config HAVE_DMA_ATTRS</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='add'>+config HAVE_DMA_CONTIGUOUS</div><div class='add'>+	bool</div><div class='add'>+</div><div class='ctx'> config USE_GENERIC_SMP_HELPERS</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='add'>+config GENERIC_SMP_IDLE_THREAD</div><div class='add'>+       bool</div><div class='add'>+</div><div class='add'>+# Select if arch init_task initializer is different to init/init_task.c</div><div class='add'>+config ARCH_INIT_TASK</div><div class='add'>+       bool</div><div class='add'>+</div><div class='add'>+# Select if arch has its private alloc_task_struct() function</div><div class='add'>+config ARCH_TASK_STRUCT_ALLOCATOR</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+# Select if arch has its private alloc_thread_info() function</div><div class='add'>+config ARCH_THREAD_INFO_ALLOCATOR</div><div class='add'>+	bool</div><div class='add'>+</div><div class='ctx'> config HAVE_REGS_AND_STACK_ACCESS_API</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig<br/>index 56a4df952fb0..3de74c9f9610 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/Kconfig</a></div><div class='hunk'>@@ -15,6 +15,8 @@ config ALPHA</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='ctx'> 	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='add'>+	select GENERIC_CMOS_UPDATE</div><div class='ctx'> 	help</div><div class='ctx'> 	  The Alpha is a 64-bit general-purpose processor designed and</div><div class='ctx'> 	  marketed by the Digital Equipment Corporation of blessed memory,</div><div class='hunk'>@@ -47,9 +49,6 @@ config GENERIC_CALIBRATE_DELAY</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='del'>-config GENERIC_CMOS_UPDATE</div><div class='del'>-        def_bool y</div><div class='del'>-</div><div class='ctx'> config GENERIC_GPIO</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='hunk'>@@ -477,7 +476,7 @@ config ALPHA_BROKEN_IRQ_MASK</div><div class='ctx'> </div><div class='ctx'> config VGA_HOSE</div><div class='ctx'> 	bool</div><div class='del'>-	depends on ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL || ALPHA_TSUNAMI</div><div class='add'>+	depends on VGA_CONSOLE &amp;&amp; (ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL || ALPHA_TSUNAMI)</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support VGA on an arbitrary hose; needed for several platforms</div><div class='head'>diff --git a/arch/alpha/include/asm/gpio.h b/arch/alpha/include/asm/gpio.h<br/>index 7dc6a6343c06..b3799d88ffcf 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/include/asm/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/include/asm/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/gpio.h</a></div><div class='hunk'>@@ -1,55 +1,4 @@</div><div class='del'>-/*</div><div class='del'>- * Generic GPIO API implementation for Alpha.</div><div class='del'>- *</div><div class='del'>- * A stright copy of that for PowerPC which was:</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2007-2008  MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * Author: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _ASM_ALPHA_GPIO_H</div><div class='del'>-#define _ASM_ALPHA_GPIO_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;asm-generic/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_GPIOLIB</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We don't (yet) implement inlined/rapid versions for on-chip gpios.</div><div class='del'>- * Just call gpiolib.</div><div class='del'>- */</div><div class='del'>-static inline int gpio_get_value(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_get_value(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void gpio_set_value(unsigned int gpio, int value)</div><div class='del'>-{</div><div class='del'>-	__gpio_set_value(gpio, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_cansleep(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_cansleep(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_to_irq(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_to_irq(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int irq_to_gpio(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_GPIOLIB */</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_ALPHA_GPIO_H */</div><div class='add'>+#ifndef __LINUX_GPIO_H</div><div class='add'>+#warning Include linux/gpio.h instead of asm/gpio.h</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/alpha/include/asm/io.h b/arch/alpha/include/asm/io.h<br/>index 7a3d38d5ed6b..5ebab5895edb 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/include/asm/io.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/include/asm/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/io.h</a></div><div class='hunk'>@@ -489,6 +489,11 @@ extern inline void writeq(u64 b, volatile void __iomem *addr)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define ioread16be(p) be16_to_cpu(ioread16(p))</div><div class='add'>+#define ioread32be(p) be32_to_cpu(ioread32(p))</div><div class='add'>+#define iowrite16be(v,p) iowrite16(cpu_to_be16(v), (p))</div><div class='add'>+#define iowrite32be(v,p) iowrite32(cpu_to_be32(v), (p))</div><div class='add'>+</div><div class='ctx'> #define inb_p		inb</div><div class='ctx'> #define inw_p		inw</div><div class='ctx'> #define inl_p		inl</div><div class='head'>diff --git a/arch/alpha/include/asm/kvm_para.h b/arch/alpha/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/alpha/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/alpha/include/asm/posix_types.h b/arch/alpha/include/asm/posix_types.h<br/>index 24779fc95994..5a8a48320efe 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/posix_types.h</a></div><div class='hunk'>@@ -10,9 +10,6 @@</div><div class='ctx'> typedef unsigned int	__kernel_ino_t;</div><div class='ctx'> #define __kernel_ino_t __kernel_ino_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned int	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned long	__kernel_sigset_t;	/* at least 32 bits */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/posix_types.h&gt;</div><div class='head'>diff --git a/arch/alpha/include/asm/processor.h b/arch/alpha/include/asm/processor.h<br/>index 94afe5859301..e37b887b3d9f 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/processor.h</a></div><div class='hunk'>@@ -49,9 +49,6 @@ extern void start_thread(struct pt_regs *, unsigned long, unsigned long);</div><div class='ctx'> /* Free all resources held by a thread. */</div><div class='ctx'> extern void release_thread(struct task_struct *);</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> /* Create a kernel thread without removing it from tasklists.  */</div><div class='ctx'> extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/include/asm/rtc.h b/arch/alpha/include/asm/rtc.h<br/>index 1f7fba671ae6..d70408d36677 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/include/asm/rtc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/include/asm/rtc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/include/asm/rtc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/rtc.h</a></div><div class='hunk'>@@ -1,14 +1,10 @@</div><div class='ctx'> #ifndef _ALPHA_RTC_H</div><div class='ctx'> #define _ALPHA_RTC_H</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ALPHA_GENERIC)</div><div class='add'>+#if defined(CONFIG_ALPHA_MARVEL) &amp;&amp; defined(CONFIG_SMP) \</div><div class='add'>+ || defined(CONFIG_ALPHA_GENERIC)</div><div class='ctx'> # define get_rtc_time		alpha_mv.rtc_get_time</div><div class='ctx'> # define set_rtc_time		alpha_mv.rtc_set_time</div><div class='del'>-#else</div><div class='del'>-# if defined(CONFIG_ALPHA_MARVEL) &amp;&amp; defined(CONFIG_SMP)</div><div class='del'>-#  define get_rtc_time		marvel_get_rtc_time</div><div class='del'>-#  define set_rtc_time		marvel_set_rtc_time</div><div class='del'>-# endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/rtc.h&gt;</div><div class='head'>diff --git a/arch/alpha/include/asm/sysinfo.h b/arch/alpha/include/asm/sysinfo.h<br/>index e77d77cd07b8..0b80e79d75e5 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/include/asm/sysinfo.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/include/asm/sysinfo.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/include/asm/sysinfo.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/sysinfo.h</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #define GSI_GET_HWRPB			101</div><div class='ctx'> </div><div class='ctx'> #define SSI_NVPAIRS			1</div><div class='add'>+#define SSI_LMF				7</div><div class='ctx'> #define SSI_IEEE_FP_CONTROL		14</div><div class='ctx'> #define SSI_IEEE_STATE_AT_SIGNAL	15</div><div class='ctx'> #define SSI_IEEE_IGNORE_STATE_AT_SIGNAL	16</div><div class='head'>diff --git a/arch/alpha/include/asm/unistd.h b/arch/alpha/include/asm/unistd.h<br/>index 2207fc61665d..d1f23b722df4 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/include/asm/unistd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/include/asm/unistd.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/include/asm/unistd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/include/asm/unistd.h</a></div><div class='hunk'>@@ -203,6 +203,12 @@</div><div class='ctx'> #define __NR_osf_security	222	/* not implemented */</div><div class='ctx'> #define __NR_osf_kloadcall	223	/* not implemented */</div><div class='ctx'> </div><div class='add'>+#define __NR_osf_stat		224</div><div class='add'>+#define __NR_osf_lstat		225</div><div class='add'>+#define __NR_osf_fstat		226</div><div class='add'>+#define __NR_osf_statfs64	227</div><div class='add'>+#define __NR_osf_fstatfs64	228</div><div class='add'>+</div><div class='ctx'> #define __NR_getpgid		233</div><div class='ctx'> #define __NR_getsid		234</div><div class='ctx'> #define __NR_sigaltstack	235</div><div class='head'>diff --git a/arch/alpha/kernel/Makefile b/arch/alpha/kernel/Makefile<br/>index 7a6d908bb865..84ec46b38f7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/Makefile</a></div><div class='hunk'>@@ -6,7 +6,7 @@ extra-y		:= head.o vmlinux.lds</div><div class='ctx'> asflags-y	:= $(KBUILD_CFLAGS)</div><div class='ctx'> ccflags-y	:= -Wno-sign-compare</div><div class='ctx'> </div><div class='del'>-obj-y    := entry.o traps.o process.o init_task.o osf_sys.o irq.o \</div><div class='add'>+obj-y    := entry.o traps.o process.o osf_sys.o irq.o \</div><div class='ctx'> 	    irq_alpha.o signal.o setup.o ptrace.o time.o \</div><div class='ctx'> 	    alpha_ksyms.o systbls.o err_common.o io.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/kernel/core_tsunami.c b/arch/alpha/kernel/core_tsunami.c<br/>index 5e7c28f92f19..61893d7bdda5 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/kernel/core_tsunami.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/kernel/core_tsunami.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/kernel/core_tsunami.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/core_tsunami.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;asm/core_tsunami.h&gt;</div><div class='ctx'> #undef __EXTERN_INLINE</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='head'>diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c<br/>index 49ee3193477a..98a103621af6 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/kernel/osf_sys.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/kernel/osf_sys.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/kernel/osf_sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/osf_sys.c</a></div><div class='hunk'>@@ -191,6 +191,39 @@ SYSCALL_DEFINE6(osf_mmap, unsigned long, addr, unsigned long, len,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct osf_stat {</div><div class='add'>+	int		st_dev;</div><div class='add'>+	int		st_pad1;</div><div class='add'>+	unsigned	st_mode;</div><div class='add'>+	unsigned short	st_nlink;</div><div class='add'>+	short		st_nlink_reserved;</div><div class='add'>+	unsigned	st_uid;</div><div class='add'>+	unsigned	st_gid;</div><div class='add'>+	int		st_rdev;</div><div class='add'>+	int		st_ldev;</div><div class='add'>+	long		st_size;</div><div class='add'>+	int		st_pad2;</div><div class='add'>+	int		st_uatime;</div><div class='add'>+	int		st_pad3;</div><div class='add'>+	int		st_umtime;</div><div class='add'>+	int		st_pad4;</div><div class='add'>+	int		st_uctime;</div><div class='add'>+	int		st_pad5;</div><div class='add'>+	int		st_pad6;</div><div class='add'>+	unsigned	st_flags;</div><div class='add'>+	unsigned	st_gen;</div><div class='add'>+	long		st_spare[4];</div><div class='add'>+	unsigned	st_ino;</div><div class='add'>+	int		st_ino_reserved;</div><div class='add'>+	int		st_atime;</div><div class='add'>+	int		st_atime_reserved;</div><div class='add'>+	int		st_mtime;</div><div class='add'>+	int		st_mtime_reserved;</div><div class='add'>+	int		st_ctime;</div><div class='add'>+	int		st_ctime_reserved;</div><div class='add'>+	long		st_blksize;</div><div class='add'>+	long		st_blocks;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The OSF/1 statfs structure is much larger, but this should</div><div class='hunk'>@@ -209,6 +242,60 @@ struct osf_statfs {</div><div class='ctx'> 	__kernel_fsid_t f_fsid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct osf_statfs64 {</div><div class='add'>+	short f_type;</div><div class='add'>+	short f_flags;</div><div class='add'>+	int f_pad1;</div><div class='add'>+	int f_pad2;</div><div class='add'>+	int f_pad3;</div><div class='add'>+	int f_pad4;</div><div class='add'>+	int f_pad5;</div><div class='add'>+	int f_pad6;</div><div class='add'>+	int f_pad7;</div><div class='add'>+	__kernel_fsid_t f_fsid;</div><div class='add'>+	u_short f_namemax;</div><div class='add'>+	short f_reserved1;</div><div class='add'>+	int f_spare[8];</div><div class='add'>+	char f_pad8[90];</div><div class='add'>+	char f_pad9[90];</div><div class='add'>+	long mount_info[10];</div><div class='add'>+	u_long f_flags2;</div><div class='add'>+	long f_spare2[14];</div><div class='add'>+	long f_fsize;</div><div class='add'>+	long f_bsize;</div><div class='add'>+	long f_blocks;</div><div class='add'>+	long f_bfree;</div><div class='add'>+	long f_bavail;</div><div class='add'>+	long f_files;</div><div class='add'>+	long f_ffree;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+linux_to_osf_stat(struct kstat *lstat, struct osf_stat __user *osf_stat)</div><div class='add'>+{</div><div class='add'>+	struct osf_stat tmp = { 0 };</div><div class='add'>+</div><div class='add'>+	tmp.st_dev	= lstat-&gt;dev;</div><div class='add'>+	tmp.st_mode	= lstat-&gt;mode;</div><div class='add'>+	tmp.st_nlink	= lstat-&gt;nlink;</div><div class='add'>+	tmp.st_uid	= lstat-&gt;uid;</div><div class='add'>+	tmp.st_gid	= lstat-&gt;gid;</div><div class='add'>+	tmp.st_rdev	= lstat-&gt;rdev;</div><div class='add'>+	tmp.st_ldev	= lstat-&gt;rdev;</div><div class='add'>+	tmp.st_size	= lstat-&gt;size;</div><div class='add'>+	tmp.st_uatime	= lstat-&gt;atime.tv_nsec / 1000;</div><div class='add'>+	tmp.st_umtime	= lstat-&gt;mtime.tv_nsec / 1000;</div><div class='add'>+	tmp.st_uctime	= lstat-&gt;ctime.tv_nsec / 1000;</div><div class='add'>+	tmp.st_ino	= lstat-&gt;ino;</div><div class='add'>+	tmp.st_atime	= lstat-&gt;atime.tv_sec;</div><div class='add'>+	tmp.st_mtime	= lstat-&gt;mtime.tv_sec;</div><div class='add'>+	tmp.st_ctime	= lstat-&gt;ctime.tv_sec;</div><div class='add'>+	tmp.st_blksize	= lstat-&gt;blksize;</div><div class='add'>+	tmp.st_blocks	= lstat-&gt;blocks;</div><div class='add'>+</div><div class='add'>+	return copy_to_user(osf_stat, &amp;tmp, sizeof(tmp)) ? -EFAULT : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> linux_to_osf_statfs(struct kstatfs *linux_stat, struct osf_statfs __user *osf_stat,</div><div class='ctx'> 		    unsigned long bufsiz)</div><div class='hunk'>@@ -230,6 +317,26 @@ linux_to_osf_statfs(struct kstatfs *linux_stat, struct osf_statfs __user *osf_st</div><div class='ctx'> 	return copy_to_user(osf_stat, &amp;tmp_stat, bufsiz) ? -EFAULT : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+linux_to_osf_statfs64(struct kstatfs *linux_stat, struct osf_statfs64 __user *osf_stat,</div><div class='add'>+		      unsigned long bufsiz)</div><div class='add'>+{</div><div class='add'>+	struct osf_statfs64 tmp_stat = { 0 };</div><div class='add'>+</div><div class='add'>+	tmp_stat.f_type = linux_stat-&gt;f_type;</div><div class='add'>+	tmp_stat.f_fsize = linux_stat-&gt;f_frsize;</div><div class='add'>+	tmp_stat.f_bsize = linux_stat-&gt;f_bsize;</div><div class='add'>+	tmp_stat.f_blocks = linux_stat-&gt;f_blocks;</div><div class='add'>+	tmp_stat.f_bfree = linux_stat-&gt;f_bfree;</div><div class='add'>+	tmp_stat.f_bavail = linux_stat-&gt;f_bavail;</div><div class='add'>+	tmp_stat.f_files = linux_stat-&gt;f_files;</div><div class='add'>+	tmp_stat.f_ffree = linux_stat-&gt;f_ffree;</div><div class='add'>+	tmp_stat.f_fsid = linux_stat-&gt;f_fsid;</div><div class='add'>+	if (bufsiz &gt; sizeof(tmp_stat))</div><div class='add'>+		bufsiz = sizeof(tmp_stat);</div><div class='add'>+	return copy_to_user(osf_stat, &amp;tmp_stat, bufsiz) ? -EFAULT : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> SYSCALL_DEFINE3(osf_statfs, const char __user *, pathname,</div><div class='ctx'> 		struct osf_statfs __user *, buffer, unsigned long, bufsiz)</div><div class='ctx'> {</div><div class='hunk'>@@ -240,6 +347,42 @@ SYSCALL_DEFINE3(osf_statfs, const char __user *, pathname,</div><div class='ctx'> 	return error;	</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+SYSCALL_DEFINE2(osf_stat, char __user *, name, struct osf_stat __user *, buf)</div><div class='add'>+{</div><div class='add'>+	struct kstat stat;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	error = vfs_stat(name, &amp;stat);</div><div class='add'>+	if (error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	return linux_to_osf_stat(&amp;stat, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+SYSCALL_DEFINE2(osf_lstat, char __user *, name, struct osf_stat __user *, buf)</div><div class='add'>+{</div><div class='add'>+	struct kstat stat;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	error = vfs_lstat(name, &amp;stat);</div><div class='add'>+	if (error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	return linux_to_osf_stat(&amp;stat, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+SYSCALL_DEFINE2(osf_fstat, int, fd, struct osf_stat __user *, buf)</div><div class='add'>+{</div><div class='add'>+	struct kstat stat;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	error = vfs_fstat(fd, &amp;stat);</div><div class='add'>+	if (error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	return linux_to_osf_stat(&amp;stat, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> SYSCALL_DEFINE3(osf_fstatfs, unsigned long, fd,</div><div class='ctx'> 		struct osf_statfs __user *, buffer, unsigned long, bufsiz)</div><div class='ctx'> {</div><div class='hunk'>@@ -250,6 +393,26 @@ SYSCALL_DEFINE3(osf_fstatfs, unsigned long, fd,</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+SYSCALL_DEFINE3(osf_statfs64, char __user *, pathname,</div><div class='add'>+		struct osf_statfs64 __user *, buffer, unsigned long, bufsiz)</div><div class='add'>+{</div><div class='add'>+	struct kstatfs linux_stat;</div><div class='add'>+	int error = user_statfs(pathname, &amp;linux_stat);</div><div class='add'>+	if (!error)</div><div class='add'>+		error = linux_to_osf_statfs64(&amp;linux_stat, buffer, bufsiz);</div><div class='add'>+	return error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+SYSCALL_DEFINE3(osf_fstatfs64, unsigned long, fd,</div><div class='add'>+		struct osf_statfs64 __user *, buffer, unsigned long, bufsiz)</div><div class='add'>+{</div><div class='add'>+	struct kstatfs linux_stat;</div><div class='add'>+	int error = fd_statfs(fd, &amp;linux_stat);</div><div class='add'>+	if (!error)</div><div class='add'>+		error = linux_to_osf_statfs64(&amp;linux_stat, buffer, bufsiz);</div><div class='add'>+	return error;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Uhh.. OSF/1 mount parameters aren't exactly obvious..</div><div class='ctx'>  *</div><div class='hunk'>@@ -771,6 +934,9 @@ SYSCALL_DEFINE5(osf_setsysinfo, unsigned long, op, void __user *, buffer,</div><div class='ctx'>  		return 0;</div><div class='ctx'> 	}</div><div class='ctx'>  </div><div class='add'>+	case SSI_LMF:</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c<br/>index cd634795aa9c..3f844d26d2c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/kernel/pci_iommu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/kernel/pci_iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/kernel/pci_iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/pci_iommu.c</a></div><div class='hunk'>@@ -236,7 +236,7 @@ static int pci_dac_dma_supported(struct pci_dev *dev, u64 mask)</div><div class='ctx'> 		ok = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* If both conditions above are met, we are fine. */</div><div class='del'>-	DBGA("pci_dac_dma_supported %s from %p\n",</div><div class='add'>+	DBGA("pci_dac_dma_supported %s from %pf\n",</div><div class='ctx'> 	     ok ? "yes" : "no", __builtin_return_address(0));</div><div class='ctx'> </div><div class='ctx'> 	return ok;</div><div class='hunk'>@@ -268,7 +268,7 @@ pci_map_single_1(struct pci_dev *pdev, void *cpu_addr, size_t size,</div><div class='ctx'> 	    &amp;&amp; paddr + size &lt;= __direct_map_size) {</div><div class='ctx'> 		ret = paddr + __direct_map_base;</div><div class='ctx'> </div><div class='del'>-		DBGA2("pci_map_single: [%p,%zx] -&gt; direct %llx from %p\n",</div><div class='add'>+		DBGA2("pci_map_single: [%p,%zx] -&gt; direct %llx from %pf\n",</div><div class='ctx'> 		      cpu_addr, size, ret, __builtin_return_address(0));</div><div class='ctx'> </div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -279,7 +279,7 @@ pci_map_single_1(struct pci_dev *pdev, void *cpu_addr, size_t size,</div><div class='ctx'> 	if (dac_allowed) {</div><div class='ctx'> 		ret = paddr + alpha_mv.pci_dac_offset;</div><div class='ctx'> </div><div class='del'>-		DBGA2("pci_map_single: [%p,%zx] -&gt; DAC %llx from %p\n",</div><div class='add'>+		DBGA2("pci_map_single: [%p,%zx] -&gt; DAC %llx from %pf\n",</div><div class='ctx'> 		      cpu_addr, size, ret, __builtin_return_address(0));</div><div class='ctx'> </div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -316,7 +316,7 @@ pci_map_single_1(struct pci_dev *pdev, void *cpu_addr, size_t size,</div><div class='ctx'> 	ret = arena-&gt;dma_base + dma_ofs * PAGE_SIZE;</div><div class='ctx'> 	ret += (unsigned long)cpu_addr &amp; ~PAGE_MASK;</div><div class='ctx'> </div><div class='del'>-	DBGA2("pci_map_single: [%p,%zx] np %ld -&gt; sg %llx from %p\n",</div><div class='add'>+	DBGA2("pci_map_single: [%p,%zx] np %ld -&gt; sg %llx from %pf\n",</div><div class='ctx'> 	      cpu_addr, size, npages, ret, __builtin_return_address(0));</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -385,14 +385,14 @@ static void alpha_pci_unmap_page(struct device *dev, dma_addr_t dma_addr,</div><div class='ctx'> 	    &amp;&amp; dma_addr &lt; __direct_map_base + __direct_map_size) {</div><div class='ctx'> 		/* Nothing to do.  */</div><div class='ctx'> </div><div class='del'>-		DBGA2("pci_unmap_single: direct [%llx,%zx] from %p\n",</div><div class='add'>+		DBGA2("pci_unmap_single: direct [%llx,%zx] from %pf\n",</div><div class='ctx'> 		      dma_addr, size, __builtin_return_address(0));</div><div class='ctx'> </div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (dma_addr &gt; 0xffffffff) {</div><div class='del'>-		DBGA2("pci64_unmap_single: DAC [%llx,%zx] from %p\n",</div><div class='add'>+		DBGA2("pci64_unmap_single: DAC [%llx,%zx] from %pf\n",</div><div class='ctx'> 		      dma_addr, size, __builtin_return_address(0));</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -424,7 +424,7 @@ static void alpha_pci_unmap_page(struct device *dev, dma_addr_t dma_addr,</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;arena-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	DBGA2("pci_unmap_single: sg [%llx,%zx] np %ld from %p\n",</div><div class='add'>+	DBGA2("pci_unmap_single: sg [%llx,%zx] np %ld from %pf\n",</div><div class='ctx'> 	      dma_addr, size, npages, __builtin_return_address(0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -447,7 +447,7 @@ try_again:</div><div class='ctx'> 	cpu_addr = (void *)__get_free_pages(gfp, order);</div><div class='ctx'> 	if (! cpu_addr) {</div><div class='ctx'> 		printk(KERN_INFO "pci_alloc_consistent: "</div><div class='del'>-		       "get_free_pages failed from %p\n",</div><div class='add'>+		       "get_free_pages failed from %pf\n",</div><div class='ctx'> 			__builtin_return_address(0));</div><div class='ctx'> 		/* ??? Really atomic allocation?  Otherwise we could play</div><div class='ctx'> 		   with vmalloc and sg if we can't find contiguous memory.  */</div><div class='hunk'>@@ -466,7 +466,7 @@ try_again:</div><div class='ctx'> 		goto try_again;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	DBGA2("pci_alloc_consistent: %zx -&gt; [%p,%llx] from %p\n",</div><div class='add'>+	DBGA2("pci_alloc_consistent: %zx -&gt; [%p,%llx] from %pf\n",</div><div class='ctx'> 	      size, cpu_addr, *dma_addrp, __builtin_return_address(0));</div><div class='ctx'> </div><div class='ctx'> 	return cpu_addr;</div><div class='hunk'>@@ -486,7 +486,7 @@ static void alpha_pci_free_coherent(struct device *dev, size_t size,</div><div class='ctx'> 	pci_unmap_single(pdev, dma_addr, size, PCI_DMA_BIDIRECTIONAL);</div><div class='ctx'> 	free_pages((unsigned long)cpu_addr, get_order(size));</div><div class='ctx'> </div><div class='del'>-	DBGA2("pci_free_consistent: [%llx,%zx] from %p\n",</div><div class='add'>+	DBGA2("pci_free_consistent: [%llx,%zx] from %pf\n",</div><div class='ctx'> 	      dma_addr, size, __builtin_return_address(0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/alpha/kernel/perf_event.c b/arch/alpha/kernel/perf_event.c<br/>index 0dae252f7a33..d821b17047e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/kernel/perf_event.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/kernel/perf_event.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/kernel/perf_event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/perf_event.c</a></div><div class='hunk'>@@ -824,7 +824,6 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr,</div><div class='ctx'> </div><div class='ctx'> 	idx = la_ptr;</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0);</div><div class='ctx'> 	for (j = 0; j &lt; cpuc-&gt;n_events; j++) {</div><div class='ctx'> 		if (cpuc-&gt;current_idx[j] == idx)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -848,7 +847,7 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr,</div><div class='ctx'> </div><div class='ctx'> 	hwc = &amp;event-&gt;hw;</div><div class='ctx'> 	alpha_perf_event_update(event, hwc, idx, alpha_pmu-&gt;pmc_max_period[idx]+1);</div><div class='del'>-	data.period = event-&gt;hw.last_period;</div><div class='add'>+	perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='ctx'> </div><div class='ctx'> 	if (alpha_perf_event_set_period(event, hwc, idx)) {</div><div class='ctx'> 		if (perf_event_overflow(event, &amp;data, regs)) {</div><div class='head'>diff --git a/arch/alpha/kernel/signal.c b/arch/alpha/kernel/signal.c<br/>index 35f2ef44de12..a8c97d42ec8e 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/signal.c</a></div><div class='hunk'>@@ -34,9 +34,6 @@</div><div class='ctx'> #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='ctx'> </div><div class='ctx'> asmlinkage void ret_from_sys_call(void);</div><div class='del'>-static void do_signal(struct pt_regs *, struct switch_stack *,</div><div class='del'>-		      unsigned long, unsigned long);</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The OSF/1 sigprocmask calling sequence is different from the</div><div class='hunk'>@@ -121,17 +118,8 @@ SYSCALL_DEFINE5(rt_sigaction, int, sig, const struct sigaction __user *, act,</div><div class='ctx'> SYSCALL_DEFINE1(sigsuspend, old_sigset_t, mask)</div><div class='ctx'> {</div><div class='ctx'> 	sigset_t blocked;</div><div class='del'>-</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='ctx'> 	siginitset(&amp;blocked, mask);</div><div class='del'>-	set_current_blocked(&amp;blocked);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage int</div><div class='hunk'>@@ -238,7 +226,6 @@ do_sigreturn(struct sigcontext __user *sc, struct pt_regs *regs,</div><div class='ctx'> 	if (__get_user(set.sig[0], &amp;sc-&gt;sc_mask))</div><div class='ctx'> 		goto give_sigsegv;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(sc, regs, sw))</div><div class='hunk'>@@ -273,7 +260,6 @@ do_rt_sigreturn(struct rt_sigframe __user *frame, struct pt_regs *regs,</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto give_sigsegv;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(&amp;frame-&gt;uc.uc_mcontext, regs, sw))</div><div class='hunk'>@@ -376,11 +362,11 @@ setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,</div><div class='ctx'> 	oldsp = rdusp();</div><div class='ctx'> 	frame = get_sigframe(ka, oldsp, sizeof(*frame));</div><div class='ctx'> 	if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))</div><div class='del'>-		goto give_sigsegv;</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	err |= setup_sigcontext(&amp;frame-&gt;sc, regs, sw, set-&gt;sig[0], oldsp);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto give_sigsegv;</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	/* Set up to return from userspace.  If provided, use a stub</div><div class='ctx'> 	   already in userspace.  */</div><div class='hunk'>@@ -396,7 +382,7 @@ setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,</div><div class='ctx'> </div><div class='ctx'> 	/* Check that everything was written properly.  */</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto give_sigsegv;</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* "Return" to the handler */</div><div class='ctx'> 	regs-&gt;r26 = r26;</div><div class='hunk'>@@ -410,12 +396,7 @@ setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,</div><div class='ctx'> 	printk("SIG deliver (%s:%d): sp=%p pc=%p ra=%p\n",</div><div class='ctx'> 		current-&gt;comm, current-&gt;pid, frame, regs-&gt;pc, regs-&gt;r26);</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-give_sigsegv:</div><div class='del'>-	force_sigsegv(sig, current);</div><div class='del'>-	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -428,7 +409,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 	oldsp = rdusp();</div><div class='ctx'> 	frame = get_sigframe(ka, oldsp, sizeof(*frame));</div><div class='ctx'> 	if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))</div><div class='del'>-		goto give_sigsegv;</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	err |= copy_siginfo_to_user(&amp;frame-&gt;info, info);</div><div class='ctx'> </div><div class='hunk'>@@ -443,7 +424,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 				set-&gt;sig[0], oldsp);</div><div class='ctx'> 	err |= __copy_to_user(&amp;frame-&gt;uc.uc_sigmask, set, sizeof(*set));</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto give_sigsegv;</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	/* Set up to return from userspace.  If provided, use a stub</div><div class='ctx'> 	   already in userspace.  */</div><div class='hunk'>@@ -459,7 +440,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (err)</div><div class='del'>-		goto give_sigsegv;</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	/* "Return" to the handler */</div><div class='ctx'> 	regs-&gt;r26 = r26;</div><div class='hunk'>@@ -475,20 +456,17 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-give_sigsegv:</div><div class='del'>-	force_sigsegv(sig, current);</div><div class='del'>-	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * OK, we're invoking a handler.</div><div class='ctx'>  */</div><div class='del'>-static inline int</div><div class='add'>+static inline void</div><div class='ctx'> handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='del'>-	      sigset_t *oldset, struct pt_regs * regs, struct switch_stack *sw)</div><div class='add'>+	      struct pt_regs * regs, struct switch_stack *sw)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (ka-&gt;sa.sa_flags &amp; SA_SIGINFO)</div><div class='hunk'>@@ -496,10 +474,11 @@ handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = setup_frame(sig, ka, oldset, regs, sw);</div><div class='ctx'> </div><div class='del'>-	if (ret == 0)</div><div class='del'>-		block_sigmask(ka, sig);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	if (ret) {</div><div class='add'>+		force_sigsegv(sig, current);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='hunk'>@@ -547,12 +526,6 @@ do_signal(struct pt_regs * regs, struct switch_stack * sw,</div><div class='ctx'> 	int signr;</div><div class='ctx'> 	unsigned long single_stepping = ptrace_cancel_bpt(current);</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='del'>-	sigset_t *oldset;</div><div class='del'>-</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='ctx'> </div><div class='ctx'> 	/* This lets the debugger run, ... */</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='hunk'>@@ -564,14 +537,7 @@ do_signal(struct pt_regs * regs, struct switch_stack * sw,</div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  */</div><div class='ctx'> 		if (r0)</div><div class='ctx'> 			syscall_restart(r0, r19, regs, &amp;ka);</div><div class='del'>-		if (handle_signal(signr, &amp;ka, &amp;info, oldset, regs, sw) == 0) {</div><div class='del'>-			/* A signal was successfully delivered, and the</div><div class='del'>-			   saved sigmask was stored on the signal frame,</div><div class='del'>-			   and will be restored by sigreturn.  So we can</div><div class='del'>-			   simply clear the restore sigmask flag.  */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		}</div><div class='add'>+		handle_signal(signr, &amp;ka, &amp;info, regs, sw);</div><div class='ctx'> 		if (single_stepping) </div><div class='ctx'> 			ptrace_set_bpt(current); /* re-set bpt */</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -596,11 +562,7 @@ do_signal(struct pt_regs * regs, struct switch_stack * sw,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* If there's no signal to deliver, we just restore the saved mask.  */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> 	if (single_stepping)</div><div class='ctx'> 		ptrace_set_bpt(current);	/* re-set breakpoint */</div><div class='ctx'> }</div><div class='hunk'>@@ -610,13 +572,11 @@ do_notify_resume(struct pt_regs *regs, struct switch_stack *sw,</div><div class='ctx'> 		 unsigned long thread_info_flags,</div><div class='ctx'> 		 unsigned long r0, unsigned long r19)</div><div class='ctx'> {</div><div class='del'>-	if (thread_info_flags &amp; (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))</div><div class='add'>+	if (thread_info_flags &amp; _TIF_SIGPENDING)</div><div class='ctx'> 		do_signal(regs, sw, r0, r19);</div><div class='ctx'> </div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c<br/>index 50d438db1f6b..35ddc02bfa4a 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/smp.c</a></div><div class='hunk'>@@ -357,24 +357,10 @@ secondary_cpu_start(int cpuid, struct task_struct *idle)</div><div class='ctx'>  * Bring one cpu online.</div><div class='ctx'>  */</div><div class='ctx'> static int __cpuinit</div><div class='del'>-smp_boot_one_cpu(int cpuid)</div><div class='add'>+smp_boot_one_cpu(int cpuid, struct task_struct *idle)</div><div class='ctx'> {</div><div class='del'>-	struct task_struct *idle;</div><div class='ctx'> 	unsigned long timeout;</div><div class='ctx'> </div><div class='del'>-	/* Cook up an idler for this guy.  Note that the address we</div><div class='del'>-	   give to kernel_thread is irrelevant -- it's going to start</div><div class='del'>-	   where HWRPB.CPU_restart says to start.  But this gets all</div><div class='del'>-	   the other task-y sort of data structures set up like we</div><div class='del'>-	   wish.  We can't use kernel_thread since we must avoid</div><div class='del'>-	   rescheduling the child.  */</div><div class='del'>-	idle = fork_idle(cpuid);</div><div class='del'>-	if (IS_ERR(idle))</div><div class='del'>-		panic("failed fork for CPU %d", cpuid);</div><div class='del'>-</div><div class='del'>-	DBGS(("smp_boot_one_cpu: CPU %d state 0x%lx flags 0x%lx\n",</div><div class='del'>-	      cpuid, idle-&gt;state, idle-&gt;flags));</div><div class='del'>-</div><div class='ctx'> 	/* Signal the secondary to wait a moment.  */</div><div class='ctx'> 	smp_secondary_alive = -1;</div><div class='ctx'> </div><div class='hunk'>@@ -487,9 +473,9 @@ smp_prepare_boot_cpu(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __cpuinit</div><div class='del'>-__cpu_up(unsigned int cpu)</div><div class='add'>+__cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='del'>-	smp_boot_one_cpu(cpu);</div><div class='add'>+	smp_boot_one_cpu(cpu, tidle);</div><div class='ctx'> </div><div class='ctx'> 	return cpu_online(cpu) ? 0 : -ENOSYS;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c<br/>index 14a4b6a7cf59..407accc80877 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/kernel/sys_marvel.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/kernel/sys_marvel.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/kernel/sys_marvel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/sys_marvel.c</a></div><div class='hunk'>@@ -317,7 +317,7 @@ marvel_init_irq(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int </div><div class='del'>-marvel_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='add'>+marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_controller *hose = dev-&gt;sysdata;</div><div class='ctx'> 	struct io7_port *io7_port = hose-&gt;sysdata;</div><div class='head'>diff --git a/arch/alpha/kernel/systbls.S b/arch/alpha/kernel/systbls.S<br/>index e534e1c5bc11..87835235f114 100644<br/>--- a/<a href='/drm-misc/tree/arch/alpha/kernel/systbls.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/alpha/kernel/systbls.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/alpha/kernel/systbls.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/alpha/kernel/systbls.S</a></div><div class='hunk'>@@ -241,11 +241,11 @@ sys_call_table:</div><div class='ctx'> 	.quad alpha_ni_syscall</div><div class='ctx'> 	.quad alpha_ni_syscall</div><div class='ctx'> 	.quad alpha_ni_syscall</div><div class='del'>-	.quad alpha_ni_syscall</div><div class='del'>-	.quad alpha_ni_syscall			/* 225 */</div><div class='del'>-	.quad alpha_ni_syscall</div><div class='del'>-	.quad alpha_ni_syscall</div><div class='del'>-	.quad alpha_ni_syscall</div><div class='add'>+	.quad sys_osf_stat</div><div class='add'>+	.quad sys_osf_lstat			/* 225 */</div><div class='add'>+	.quad sys_osf_fstat</div><div class='add'>+	.quad sys_osf_statfs64</div><div class='add'>+	.quad sys_osf_fstatfs64</div><div class='ctx'> 	.quad alpha_ni_syscall</div><div class='ctx'> 	.quad alpha_ni_syscall			/* 230 */</div><div class='ctx'> 	.quad alpha_ni_syscall</div><div class='head'>diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig<br/>index cf006d40342c..84449dd8f031 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/Kconfig</a></div><div class='hunk'>@@ -1,9 +1,12 @@</div><div class='ctx'> config ARM</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='add'>+	select ARCH_HAVE_CUSTOM_GPIO_H</div><div class='ctx'> 	select HAVE_AOUT</div><div class='ctx'> 	select HAVE_DMA_API_DEBUG</div><div class='ctx'> 	select HAVE_IDE if PCI || ISA || PCMCIA</div><div class='add'>+	select HAVE_DMA_ATTRS</div><div class='add'>+	select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)</div><div class='ctx'> 	select HAVE_MEMBLOCK</div><div class='ctx'> 	select RTC_LIB</div><div class='ctx'> 	select SYS_SUPPORTS_APM_EMULATION</div><div class='hunk'>@@ -11,6 +14,7 @@ config ARM</div><div class='ctx'> 	select HAVE_OPROFILE if (HAVE_PERF_EVENTS)</div><div class='ctx'> 	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL</div><div class='ctx'> 	select HAVE_ARCH_KGDB</div><div class='add'>+	select HAVE_ARCH_TRACEHOOK</div><div class='ctx'> 	select HAVE_KPROBES if !XIP_KERNEL</div><div class='ctx'> 	select HAVE_KRETPROBES if (HAVE_KPROBES)</div><div class='ctx'> 	select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)</div><div class='hunk'>@@ -30,10 +34,17 @@ config ARM</div><div class='ctx'> 	select HAVE_HW_BREAKPOINT if (PERF_EVENTS &amp;&amp; (CPU_V6 || CPU_V6K || CPU_V7))</div><div class='ctx'> 	select HAVE_C_RECORDMCOUNT</div><div class='ctx'> 	select HAVE_GENERIC_HARDIRQS</div><div class='add'>+	select HARDIRQS_SW_RESEND</div><div class='add'>+	select GENERIC_IRQ_PROBE</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='add'>+	select GENERIC_IRQ_PROBE</div><div class='add'>+	select HARDIRQS_SW_RESEND</div><div class='ctx'> 	select CPU_PM if (SUSPEND || CPU_IDLE)</div><div class='ctx'> 	select GENERIC_PCI_IOMAP</div><div class='del'>-	select HAVE_BPF_JIT if NET</div><div class='add'>+	select HAVE_BPF_JIT</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='add'>+	select KTIME_SCALAR</div><div class='add'>+	select GENERIC_CLOCKEVENTS_BROADCAST if SMP</div><div class='ctx'> 	help</div><div class='ctx'> 	  The ARM series is a line of low-power-consumption RISC chip designs</div><div class='ctx'> 	  licensed by ARM Ltd and targeted at embedded applications and</div><div class='hunk'>@@ -45,33 +56,25 @@ config ARM</div><div class='ctx'> config ARM_HAS_SG_CHAIN</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config HAVE_PWM</div><div class='del'>-	bool</div><div class='del'>-</div><div class='del'>-config MIGHT_HAVE_PCI</div><div class='del'>-	bool</div><div class='del'>-</div><div class='del'>-config SYS_SUPPORTS_APM_EMULATION</div><div class='add'>+config NEED_SG_DMA_LENGTH</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config GENERIC_GPIO</div><div class='add'>+config ARM_DMA_USE_IOMMU</div><div class='add'>+	select NEED_SG_DMA_LENGTH</div><div class='add'>+	select ARM_HAS_SG_CHAIN</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config ARCH_USES_GETTIMEOFFSET</div><div class='add'>+config HAVE_PWM</div><div class='ctx'> 	bool</div><div class='del'>-	default n</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='add'>+config MIGHT_HAVE_PCI</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS_BROADCAST</div><div class='add'>+config SYS_SUPPORTS_APM_EMULATION</div><div class='ctx'> 	bool</div><div class='del'>-	depends on GENERIC_CLOCKEVENTS</div><div class='del'>-	default y if SMP</div><div class='ctx'> </div><div class='del'>-config KTIME_SCALAR</div><div class='add'>+config GENERIC_GPIO</div><div class='ctx'> 	bool</div><div class='del'>-	default y</div><div class='ctx'> </div><div class='ctx'> config HAVE_TCM</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -101,14 +104,6 @@ config EISA</div><div class='ctx'> config SBUS</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config MCA</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  MicroChannel Architecture is found in some IBM PS/2 machines and</div><div class='del'>-	  laptops.  It is a bus system similar to PCI or ISA. See</div><div class='del'>-	  &lt;file:Documentation/mca.txt&gt; (and especially the web page given</div><div class='del'>-	  there) before attempting to build an MCA bus kernel.</div><div class='del'>-</div><div class='ctx'> config STACKTRACE_SUPPORT</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -126,14 +121,6 @@ config TRACE_IRQFLAGS_SUPPORT</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='del'>-config HARDIRQS_SW_RESEND</div><div class='del'>-	bool</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-config GENERIC_IRQ_PROBE</div><div class='del'>-	bool</div><div class='del'>-	default y</div><div class='del'>-</div><div class='ctx'> config GENERIC_LOCKBREAK</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -159,9 +146,6 @@ config ARCH_HAS_CPUFREQ</div><div class='ctx'> 	  and that the relevant menu configurations are displayed for</div><div class='ctx'> 	  it.</div><div class='ctx'> </div><div class='del'>-config ARCH_HAS_CPU_IDLE_WAIT</div><div class='del'>-       def_bool y</div><div class='del'>-</div><div class='ctx'> config GENERIC_HWEIGHT</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -280,6 +264,7 @@ config ARCH_INTEGRATOR</div><div class='ctx'> 	select NEED_MACH_IO_H</div><div class='ctx'> 	select NEED_MACH_MEMORY_H</div><div class='ctx'> 	select SPARSE_IRQ</div><div class='add'>+	select MULTI_IRQ_HANDLER</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for ARM's Integrator platform.</div><div class='ctx'> </div><div class='hunk'>@@ -340,8 +325,8 @@ config ARCH_AT91</div><div class='ctx'> 	select IRQ_DOMAIN</div><div class='ctx'> 	select NEED_MACH_IO_H if PCCARD</div><div class='ctx'> 	help</div><div class='del'>-	  This enables support for systems based on the Atmel AT91RM9200,</div><div class='del'>-	  AT91SAM9 processors.</div><div class='add'>+	  This enables support for systems based on Atmel</div><div class='add'>+	  AT91RM9200 and AT91SAM9* processors.</div><div class='ctx'> </div><div class='ctx'> config ARCH_BCMRING</div><div class='ctx'> 	bool "Broadcom BCMRING"</div><div class='hunk'>@@ -373,12 +358,12 @@ config ARCH_HIGHBANK</div><div class='ctx'> 	  Support for the Calxeda Highbank SoC based boards.</div><div class='ctx'> </div><div class='ctx'> config ARCH_CLPS711X</div><div class='del'>-	bool "Cirrus Logic CLPS711x/EP721x-based"</div><div class='add'>+	bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"</div><div class='ctx'> 	select CPU_ARM720T</div><div class='ctx'> 	select ARCH_USES_GETTIMEOFFSET</div><div class='ctx'> 	select NEED_MACH_MEMORY_H</div><div class='ctx'> 	help</div><div class='del'>-	  Support for Cirrus Logic 711x/721x based boards.</div><div class='add'>+	  Support for Cirrus Logic 711x/721x/731x based boards.</div><div class='ctx'> </div><div class='ctx'> config ARCH_CNS3XXX</div><div class='ctx'> 	bool "Cavium Networks CNS3XXX family"</div><div class='hunk'>@@ -407,6 +392,8 @@ config ARCH_PRIMA2</div><div class='ctx'> 	select CLKDEV_LOOKUP</div><div class='ctx'> 	select GENERIC_IRQ_CHIP</div><div class='ctx'> 	select MIGHT_HAVE_CACHE_L2X0</div><div class='add'>+	select PINCTRL</div><div class='add'>+	select PINCTRL_SIRF</div><div class='ctx'> 	select USE_OF</div><div class='ctx'> 	select ZONE_DMA</div><div class='ctx'> 	help</div><div class='hunk'>@@ -468,7 +455,10 @@ config ARCH_MXS</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	select CLKDEV_LOOKUP</div><div class='ctx'> 	select CLKSRC_MMIO</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select HAVE_CLK_PREPARE</div><div class='add'>+	select PINCTRL</div><div class='add'>+	select USE_OF</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for Freescale MXS-based family of processors</div><div class='ctx'> </div><div class='hunk'>@@ -528,35 +518,13 @@ config ARCH_IOP33X</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for Intel's IOP33X (XScale) family of processors.</div><div class='ctx'> </div><div class='del'>-config ARCH_IXP23XX</div><div class='del'>- 	bool "IXP23XX-based"</div><div class='del'>-	depends on MMU</div><div class='del'>-	select CPU_XSC3</div><div class='del'>- 	select PCI</div><div class='del'>-	select ARCH_USES_GETTIMEOFFSET</div><div class='del'>-	select NEED_MACH_IO_H</div><div class='del'>-	select NEED_MACH_MEMORY_H</div><div class='del'>-	help</div><div class='del'>-	  Support for Intel's IXP23xx (XScale) family of processors.</div><div class='del'>-</div><div class='del'>-config ARCH_IXP2000</div><div class='del'>-	bool "IXP2400/2800-based"</div><div class='del'>-	depends on MMU</div><div class='del'>-	select CPU_XSCALE</div><div class='del'>-	select PCI</div><div class='del'>-	select ARCH_USES_GETTIMEOFFSET</div><div class='del'>-	select NEED_MACH_IO_H</div><div class='del'>-	select NEED_MACH_MEMORY_H</div><div class='del'>-	help</div><div class='del'>-	  Support for Intel's IXP2400/2800 (XScale) family of processors.</div><div class='del'>-</div><div class='ctx'> config ARCH_IXP4XX</div><div class='ctx'> 	bool "IXP4xx-based"</div><div class='ctx'> 	depends on MMU</div><div class='ctx'> 	select ARCH_HAS_DMA_SET_COHERENT_MASK</div><div class='ctx'> 	select CLKSRC_MMIO</div><div class='ctx'> 	select CPU_XSCALE</div><div class='del'>-	select GENERIC_GPIO</div><div class='add'>+	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS</div><div class='ctx'> 	select MIGHT_HAVE_PCI</div><div class='ctx'> 	select NEED_MACH_IO_H</div><div class='hunk'>@@ -597,6 +565,7 @@ config ARCH_LPC32XX</div><div class='ctx'> 	select USB_ARCH_HAS_OHCI</div><div class='ctx'> 	select CLKDEV_LOOKUP</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select USE_OF</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for the NXP LPC32XX family of processors</div><div class='ctx'> </div><div class='hunk'>@@ -632,7 +601,7 @@ config ARCH_MMP</div><div class='ctx'> 	select CLKDEV_LOOKUP</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS</div><div class='ctx'> 	select GPIO_PXA</div><div class='del'>-	select TICK_ONESHOT</div><div class='add'>+	select IRQ_DOMAIN</div><div class='ctx'> 	select PLAT_PXA</div><div class='ctx'> 	select SPARSE_IRQ</div><div class='ctx'> 	select GENERIC_ALLOCATOR</div><div class='hunk'>@@ -716,7 +685,6 @@ config ARCH_PXA</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS</div><div class='ctx'> 	select GPIO_PXA</div><div class='del'>-	select TICK_ONESHOT</div><div class='ctx'> 	select PLAT_PXA</div><div class='ctx'> 	select SPARSE_IRQ</div><div class='ctx'> 	select AUTO_ZRELADDR</div><div class='hunk'>@@ -783,7 +751,6 @@ config ARCH_SA1100</div><div class='ctx'> 	select CPU_FREQ</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS</div><div class='ctx'> 	select CLKDEV_LOOKUP</div><div class='del'>-	select TICK_ONESHOT</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	select HAVE_IDE</div><div class='ctx'> 	select NEED_MACH_MEMORY_H</div><div class='hunk'>@@ -946,6 +913,7 @@ config ARCH_NOMADIK</div><div class='ctx'> 	select CPU_ARM926T</div><div class='ctx'> 	select CLKDEV_LOOKUP</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select PINCTRL</div><div class='ctx'> 	select MIGHT_HAVE_CACHE_L2X0</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	help</div><div class='hunk'>@@ -980,6 +948,7 @@ config PLAT_SPEAR</div><div class='ctx'> 	select ARM_AMBA</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	select CLKDEV_LOOKUP</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select CLKSRC_MMIO</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS</div><div class='ctx'> 	select HAVE_CLK</div><div class='hunk'>@@ -1046,10 +1015,6 @@ source "arch/arm/mach-iop13xx/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "arch/arm/mach-ixp4xx/Kconfig"</div><div class='ctx'> </div><div class='del'>-source "arch/arm/mach-ixp2000/Kconfig"</div><div class='del'>-</div><div class='del'>-source "arch/arm/mach-ixp23xx/Kconfig"</div><div class='del'>-</div><div class='ctx'> source "arch/arm/mach-kirkwood/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "arch/arm/mach-ks8695/Kconfig"</div><div class='hunk'>@@ -1088,7 +1053,6 @@ source "arch/arm/mach-sa1100/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "arch/arm/plat-samsung/Kconfig"</div><div class='ctx'> source "arch/arm/plat-s3c24xx/Kconfig"</div><div class='del'>-source "arch/arm/plat-s5p/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "arch/arm/plat-spear/Kconfig"</div><div class='ctx'> </div><div class='hunk'>@@ -1139,6 +1103,7 @@ config PLAT_ORION</div><div class='ctx'> 	bool</div><div class='ctx'> 	select CLKSRC_MMIO</div><div class='ctx'> 	select GENERIC_IRQ_CHIP</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> </div><div class='ctx'> config PLAT_PXA</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -1186,6 +1151,15 @@ if !MMU</div><div class='ctx'> source "arch/arm/Kconfig-nommu"</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+config ARM_ERRATA_326103</div><div class='add'>+	bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"</div><div class='add'>+	depends on CPU_V6</div><div class='add'>+	help</div><div class='add'>+	  Executing a SWP instruction to read-only memory does not set bit 11</div><div class='add'>+	  of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to</div><div class='add'>+	  treat the access as a read, preventing a COW from occurring and</div><div class='add'>+	  causing the faulting task to livelock.</div><div class='add'>+</div><div class='ctx'> config ARM_ERRATA_411920</div><div class='ctx'> 	bool "ARM errata: Invalidation of the Instruction Cache operation can fail"</div><div class='ctx'> 	depends on CPU_V6 || CPU_V6K</div><div class='hunk'>@@ -1464,8 +1438,6 @@ endmenu</div><div class='ctx'> </div><div class='ctx'> menu "Kernel Features"</div><div class='ctx'> </div><div class='del'>-source "kernel/time/Kconfig"</div><div class='del'>-</div><div class='ctx'> config HAVE_SMP</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='hunk'>@@ -1543,10 +1515,15 @@ config HAVE_ARM_SCU</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the ARM system coherency unit</div><div class='ctx'> </div><div class='add'>+config ARM_ARCH_TIMER</div><div class='add'>+	bool "Architected timer support"</div><div class='add'>+	depends on CPU_V7</div><div class='add'>+	help</div><div class='add'>+	  This option enables support for the ARM architected timer</div><div class='add'>+</div><div class='ctx'> config HAVE_ARM_TWD</div><div class='ctx'> 	bool</div><div class='ctx'> 	depends on SMP</div><div class='del'>-	select TICK_ONESHOT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This options enables support for the ARM timer and watchdog unit</div><div class='ctx'> </div><div class='hunk'>@@ -1927,10 +1904,10 @@ choice</div><div class='ctx'> 	default ZBOOT_ROM_NONE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Include experimental SD/MMC loading code in the ROM-able zImage.</div><div class='del'>-	  With this enabled it is possible to write the the ROM-able zImage</div><div class='add'>+	  With this enabled it is possible to write the ROM-able zImage</div><div class='ctx'> 	  kernel image to an MMC or SD card and boot the kernel straight</div><div class='ctx'> 	  from the reset vector. At reset the processor Mask ROM will load</div><div class='del'>-	  the first part of the the ROM-able zImage which in turn loads the</div><div class='add'>+	  the first part of the ROM-able zImage which in turn loads the</div><div class='ctx'> 	  rest the kernel image to RAM.</div><div class='ctx'> </div><div class='ctx'> config ZBOOT_ROM_NONE</div><div class='hunk'>@@ -2272,9 +2249,9 @@ menu "Power management options"</div><div class='ctx'> source "kernel/power/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config ARCH_SUSPEND_POSSIBLE</div><div class='del'>-	depends on !ARCH_S5PC100</div><div class='add'>+	depends on !ARCH_S5PC100 &amp;&amp; !ARCH_TEGRA</div><div class='ctx'> 	depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \</div><div class='del'>-		CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE</div><div class='add'>+		CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='ctx'> config ARM_CPU_SUSPEND</div><div class='head'>diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug<br/>index 85348a09d655..01a134141216 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/Kconfig.debug?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/Kconfig.debug</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/Kconfig.debug?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/Kconfig.debug</a></div><div class='hunk'>@@ -103,6 +103,35 @@ choice</div><div class='ctx'> 		  Say Y here if you want the debug print routines to direct</div><div class='ctx'> 		  their output to the second serial port on these devices.</div><div class='ctx'> </div><div class='add'>+	config DEBUG_DAVINCI_DA8XX_UART1</div><div class='add'>+		bool "Kernel low-level debugging on DaVinci DA8XX using UART1"</div><div class='add'>+		depends on ARCH_DAVINCI_DA8XX</div><div class='add'>+		help</div><div class='add'>+		  Say Y here if you want the debug print routines to direct</div><div class='add'>+		  their output to UART1 serial port on DaVinci DA8XX devices.</div><div class='add'>+</div><div class='add'>+	config DEBUG_DAVINCI_DA8XX_UART2</div><div class='add'>+		bool "Kernel low-level debugging on DaVinci DA8XX using UART2"</div><div class='add'>+		depends on ARCH_DAVINCI_DA8XX</div><div class='add'>+		help</div><div class='add'>+		  Say Y here if you want the debug print routines to direct</div><div class='add'>+		  their output to UART2 serial port on DaVinci DA8XX devices.</div><div class='add'>+</div><div class='add'>+	config DEBUG_DAVINCI_DMx_UART0</div><div class='add'>+		bool "Kernel low-level debugging on DaVinci DMx using UART0"</div><div class='add'>+		depends on ARCH_DAVINCI_DMx</div><div class='add'>+		help</div><div class='add'>+		  Say Y here if you want the debug print routines to direct</div><div class='add'>+		  their output to UART0 serial port on DaVinci DMx devices.</div><div class='add'>+</div><div class='add'>+	config DEBUG_DAVINCI_TNETV107X_UART1</div><div class='add'>+		bool "Kernel low-level debugging on DaVinci TNETV107x using UART1"</div><div class='add'>+		depends on ARCH_DAVINCI_TNETV107X</div><div class='add'>+		help</div><div class='add'>+		  Say Y here if you want the debug print routines to direct</div><div class='add'>+		  their output to UART1 serial port on DaVinci TNETV107X</div><div class='add'>+		  devices.</div><div class='add'>+</div><div class='ctx'> 	config DEBUG_DC21285_PORT</div><div class='ctx'> 		bool "Kernel low-level debugging messages via footbridge serial port"</div><div class='ctx'> 		depends on FOOTBRIDGE</div><div class='hunk'>@@ -180,6 +209,14 @@ choice</div><div class='ctx'> 		  Say Y here if you want kernel low-level debugging support</div><div class='ctx'> 		  on i.MX50 or i.MX53.</div><div class='ctx'> </div><div class='add'>+	config DEBUG_IMX6Q_UART2</div><div class='add'>+		bool "i.MX6Q Debug UART2"</div><div class='add'>+		depends on SOC_IMX6Q</div><div class='add'>+		help</div><div class='add'>+		  Say Y here if you want kernel low-level debugging support</div><div class='add'>+		  on i.MX6Q UART2. This is correct for e.g. the SabreLite</div><div class='add'>+                  board.</div><div class='add'>+</div><div class='ctx'> 	config DEBUG_IMX6Q_UART4</div><div class='ctx'> 		bool "i.MX6Q Debug UART4"</div><div class='ctx'> 		depends on SOC_IMX6Q</div><div class='head'>diff --git a/arch/arm/Makefile b/arch/arm/Makefile<br/>index 047a20780fc1..0298b00fe241 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/Makefile</a></div><div class='hunk'>@@ -70,8 +70,6 @@ arch-$(CONFIG_CPU_32v4)		:=-D__LINUX_ARM_ARCH__=4 -march=armv4</div><div class='ctx'> arch-$(CONFIG_CPU_32v3)		:=-D__LINUX_ARM_ARCH__=3 -march=armv3</div><div class='ctx'> </div><div class='ctx'> # This selects how we optimise for the processor.</div><div class='del'>-tune-$(CONFIG_CPU_ARM610)	:=-mtune=arm610</div><div class='del'>-tune-$(CONFIG_CPU_ARM710)	:=-mtune=arm710</div><div class='ctx'> tune-$(CONFIG_CPU_ARM7TDMI)	:=-mtune=arm7tdmi</div><div class='ctx'> tune-$(CONFIG_CPU_ARM720T)	:=-mtune=arm7tdmi</div><div class='ctx'> tune-$(CONFIG_CPU_ARM740T)	:=-mtune=arm7tdmi</div><div class='hunk'>@@ -119,7 +117,7 @@ KBUILD_AFLAGS	+=$(CFLAGS_ABI) $(AFLAGS_THUMB2) $(arch-y) $(tune-y) -include asm/</div><div class='ctx'> CHECKFLAGS	+= -D__arm__</div><div class='ctx'> </div><div class='ctx'> #Default value</div><div class='del'>-head-y		:= arch/arm/kernel/head$(MMUEXT).o arch/arm/kernel/init_task.o</div><div class='add'>+head-y		:= arch/arm/kernel/head$(MMUEXT).o</div><div class='ctx'> textofs-y	:= 0x00008000</div><div class='ctx'> textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000</div><div class='ctx'> # We don't want the htc bootloader to corrupt kernel during resume</div><div class='hunk'>@@ -149,8 +147,6 @@ machine-$(CONFIG_ARCH_INTEGRATOR)	:= integrator</div><div class='ctx'> machine-$(CONFIG_ARCH_IOP13XX)		:= iop13xx</div><div class='ctx'> machine-$(CONFIG_ARCH_IOP32X)		:= iop32x</div><div class='ctx'> machine-$(CONFIG_ARCH_IOP33X)		:= iop33x</div><div class='del'>-machine-$(CONFIG_ARCH_IXP2000)		:= ixp2000</div><div class='del'>-machine-$(CONFIG_ARCH_IXP23XX)		:= ixp23xx</div><div class='ctx'> machine-$(CONFIG_ARCH_IXP4XX)		:= ixp4xx</div><div class='ctx'> machine-$(CONFIG_ARCH_KIRKWOOD)		:= kirkwood</div><div class='ctx'> machine-$(CONFIG_ARCH_KS8695)		:= ks8695</div><div class='hunk'>@@ -164,9 +160,7 @@ machine-$(CONFIG_ARCH_MXS)		:= mxs</div><div class='ctx'> machine-$(CONFIG_ARCH_NETX)		:= netx</div><div class='ctx'> machine-$(CONFIG_ARCH_NOMADIK)		:= nomadik</div><div class='ctx'> machine-$(CONFIG_ARCH_OMAP1)		:= omap1</div><div class='del'>-machine-$(CONFIG_ARCH_OMAP2)		:= omap2</div><div class='del'>-machine-$(CONFIG_ARCH_OMAP3)		:= omap2</div><div class='del'>-machine-$(CONFIG_ARCH_OMAP4)		:= omap2</div><div class='add'>+machine-$(CONFIG_ARCH_OMAP2PLUS)	:= omap2</div><div class='ctx'> machine-$(CONFIG_ARCH_ORION5X)		:= orion5x</div><div class='ctx'> machine-$(CONFIG_ARCH_PICOXCELL)	:= picoxcell</div><div class='ctx'> machine-$(CONFIG_ARCH_PNX4008)		:= pnx4008</div><div class='hunk'>@@ -192,6 +186,8 @@ machine-$(CONFIG_ARCH_VEXPRESS)		:= vexpress</div><div class='ctx'> machine-$(CONFIG_ARCH_VT8500)		:= vt8500</div><div class='ctx'> machine-$(CONFIG_ARCH_W90X900)		:= w90x900</div><div class='ctx'> machine-$(CONFIG_FOOTBRIDGE)		:= footbridge</div><div class='add'>+machine-$(CONFIG_MACH_SPEAR1310)	:= spear13xx</div><div class='add'>+machine-$(CONFIG_MACH_SPEAR1340)	:= spear13xx</div><div class='ctx'> machine-$(CONFIG_MACH_SPEAR300)		:= spear3xx</div><div class='ctx'> machine-$(CONFIG_MACH_SPEAR310)		:= spear3xx</div><div class='ctx'> machine-$(CONFIG_MACH_SPEAR320)		:= spear3xx</div><div class='hunk'>@@ -209,7 +205,7 @@ plat-$(CONFIG_PLAT_NOMADIK)	:= nomadik</div><div class='ctx'> plat-$(CONFIG_PLAT_ORION)	:= orion</div><div class='ctx'> plat-$(CONFIG_PLAT_PXA)		:= pxa</div><div class='ctx'> plat-$(CONFIG_PLAT_S3C24XX)	:= s3c24xx samsung</div><div class='del'>-plat-$(CONFIG_PLAT_S5P)		:= s5p samsung</div><div class='add'>+plat-$(CONFIG_PLAT_S5P)		:= samsung</div><div class='ctx'> plat-$(CONFIG_PLAT_SPEAR)	:= spear</div><div class='ctx'> plat-$(CONFIG_PLAT_VERSATILE)	:= versatile</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/compressed/head-xscale.S b/arch/arm/boot/compressed/head-xscale.S<br/>index aa5ee49c5c5a..6ab0599c02dd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/compressed/head-xscale.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/compressed/head-xscale.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/compressed/head-xscale.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/compressed/head-xscale.S</a></div><div class='hunk'>@@ -32,10 +32,3 @@ __XScale_start:</div><div class='ctx'> 		bic	r0, r0, #0x1000		@ clear Icache</div><div class='ctx'> 		mcr	p15, 0, r0, c1, c0, 0</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_IXP2000</div><div class='del'>-		mov	r1, #-1</div><div class='del'>-		mov	r0, #0xd6000000</div><div class='del'>-		str	r1, [r0, #0x14]</div><div class='del'>-		str	r1, [r0, #0x18]</div><div class='del'>-#endif</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S<br/>index dc7e8ce8e6be..b8c64b80bafc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/compressed/head.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/compressed/head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/compressed/head.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/compressed/head.S</a></div><div class='hunk'>@@ -567,6 +567,12 @@ __armv3_mpu_cache_on:</div><div class='ctx'> 		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3</div><div class='ctx'> 		mov	pc, lr</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH</div><div class='add'>+#define CB_BITS 0x08</div><div class='add'>+#else</div><div class='add'>+#define CB_BITS 0x0c</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> __setup_mmu:	sub	r3, r4, #16384		@ Page directory size</div><div class='ctx'> 		bic	r3, r3, #0xff		@ Align the pointer</div><div class='ctx'> 		bic	r3, r3, #0x3f00</div><div class='hunk'>@@ -578,17 +584,14 @@ __setup_mmu:	sub	r3, r4, #16384		@ Page directory size</div><div class='ctx'> 		mov	r9, r0, lsr #18</div><div class='ctx'> 		mov	r9, r9, lsl #18		@ start of RAM</div><div class='ctx'> 		add	r10, r9, #0x10000000	@ a reasonable RAM size</div><div class='del'>-		mov	r1, #0x12</div><div class='del'>-		orr	r1, r1, #3 &lt;&lt; 10</div><div class='add'>+		mov	r1, #0x12		@ XN|U + section mapping</div><div class='add'>+		orr	r1, r1, #3 &lt;&lt; 10	@ AP=11</div><div class='ctx'> 		add	r2, r3, #16384</div><div class='ctx'> 1:		cmp	r1, r9			@ if virt &gt; start of RAM</div><div class='del'>-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH</div><div class='del'>-		orrhs	r1, r1, #0x08		@ set cacheable</div><div class='del'>-#else</div><div class='del'>-		orrhs	r1, r1, #0x0c		@ set cacheable, bufferable</div><div class='del'>-#endif</div><div class='del'>-		cmp	r1, r10			@ if virt &gt; end of RAM</div><div class='del'>-		bichs	r1, r1, #0x0c		@ clear cacheable, bufferable</div><div class='add'>+		cmphs	r10, r1			@   &amp;&amp; end of RAM &gt; virt</div><div class='add'>+		bic	r1, r1, #0x1c		@ clear XN|U + C + B</div><div class='add'>+		orrlo	r1, r1, #0x10		@ Set XN|U for non-RAM</div><div class='add'>+		orrhs	r1, r1, r6		@ set RAM section settings</div><div class='ctx'> 		str	r1, [r0], #4		@ 1:1 mapping</div><div class='ctx'> 		add	r1, r1, #1048576</div><div class='ctx'> 		teq	r0, r2</div><div class='hunk'>@@ -599,7 +602,7 @@ __setup_mmu:	sub	r3, r4, #16384		@ Page directory size</div><div class='ctx'>  * so there is no map overlap problem for up to 1 MB compressed kernel.</div><div class='ctx'>  * If the execution is in RAM then we would only be duplicating the above.</div><div class='ctx'>  */</div><div class='del'>-		mov	r1, #0x1e</div><div class='add'>+		orr	r1, r6, #0x04		@ ensure B is set for this</div><div class='ctx'> 		orr	r1, r1, #3 &lt;&lt; 10</div><div class='ctx'> 		mov	r2, pc</div><div class='ctx'> 		mov	r2, r2, lsr #20</div><div class='hunk'>@@ -620,6 +623,7 @@ __arm926ejs_mmu_cache_on:</div><div class='ctx'> __armv4_mmu_cache_on:</div><div class='ctx'> 		mov	r12, lr</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='add'>+		mov	r6, #CB_BITS | 0x12	@ U</div><div class='ctx'> 		bl	__setup_mmu</div><div class='ctx'> 		mov	r0, #0</div><div class='ctx'> 		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer</div><div class='hunk'>@@ -641,6 +645,7 @@ __armv7_mmu_cache_on:</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='ctx'> 		mrc	p15, 0, r11, c0, c1, 4	@ read ID_MMFR0</div><div class='ctx'> 		tst	r11, #0xf		@ VMSA</div><div class='add'>+		movne	r6, #CB_BITS | 0x02	@ !XN</div><div class='ctx'> 		blne	__setup_mmu</div><div class='ctx'> 		mov	r0, #0</div><div class='ctx'> 		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer</div><div class='hunk'>@@ -655,7 +660,7 @@ __armv7_mmu_cache_on:</div><div class='ctx'> 		orr	r0, r0, #1 &lt;&lt; 25	@ big-endian page tables</div><div class='ctx'> #endif</div><div class='ctx'> 		orrne	r0, r0, #1		@ MMU enabled</div><div class='del'>-		movne	r1, #-1</div><div class='add'>+		movne	r1, #0xfffffffd		@ domain 0 = client</div><div class='ctx'> 		mcrne	p15, 0, r3, c2, c0, 0	@ load page table pointer</div><div class='ctx'> 		mcrne	p15, 0, r1, c3, c0, 0	@ load domain access control</div><div class='ctx'> #endif</div><div class='hunk'>@@ -668,6 +673,7 @@ __armv7_mmu_cache_on:</div><div class='ctx'> </div><div class='ctx'> __fa526_cache_on:</div><div class='ctx'> 		mov	r12, lr</div><div class='add'>+		mov	r6, #CB_BITS | 0x12	@ U</div><div class='ctx'> 		bl	__setup_mmu</div><div class='ctx'> 		mov	r0, #0</div><div class='ctx'> 		mcr	p15, 0, r0, c7, c7, 0	@ Invalidate whole cache</div><div class='hunk'>@@ -680,18 +686,6 @@ __fa526_cache_on:</div><div class='ctx'> 		mcr	p15, 0, r0, c8, c7, 0	@ flush UTLB</div><div class='ctx'> 		mov	pc, r12</div><div class='ctx'> </div><div class='del'>-__arm6_mmu_cache_on:</div><div class='del'>-		mov	r12, lr</div><div class='del'>-		bl	__setup_mmu</div><div class='del'>-		mov	r0, #0</div><div class='del'>-		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3</div><div class='del'>-		mcr	p15, 0, r0, c5, c0, 0	@ invalidate whole TLB v3</div><div class='del'>-		mov	r0, #0x30</div><div class='del'>-		bl	__common_mmu_cache_on</div><div class='del'>-		mov	r0, #0</div><div class='del'>-		mcr	p15, 0, r0, c5, c0, 0	@ invalidate whole TLB v3</div><div class='del'>-		mov	pc, r12</div><div class='del'>-</div><div class='ctx'> __common_mmu_cache_on:</div><div class='ctx'> #ifndef CONFIG_THUMB2_KERNEL</div><div class='ctx'> #ifndef DEBUG</div><div class='hunk'>@@ -756,16 +750,6 @@ call_cache_fn:	adr	r12, proc_types</div><div class='ctx'> 		.align	2</div><div class='ctx'> 		.type	proc_types,#object</div><div class='ctx'> proc_types:</div><div class='del'>-		.word	0x41560600		@ ARM6/610</div><div class='del'>-		.word	0xffffffe0</div><div class='del'>-		W(b)	__arm6_mmu_cache_off	@ works, but slow</div><div class='del'>-		W(b)	__arm6_mmu_cache_off</div><div class='del'>-		mov	pc, lr</div><div class='del'>- THUMB(		nop				)</div><div class='del'>-@		b	__arm6_mmu_cache_on		@ untested</div><div class='del'>-@		b	__arm6_mmu_cache_off</div><div class='del'>-@		b	__armv3_mmu_cache_flush</div><div class='del'>-</div><div class='ctx'> 		.word	0x00000000		@ old ARM ID</div><div class='ctx'> 		.word	0x0000f000</div><div class='ctx'> 		mov	pc, lr</div><div class='hunk'>@@ -777,8 +761,10 @@ proc_types:</div><div class='ctx'> </div><div class='ctx'> 		.word	0x41007000		@ ARM7/710</div><div class='ctx'> 		.word	0xfff8fe00</div><div class='del'>-		W(b)	__arm7_mmu_cache_off</div><div class='del'>-		W(b)	__arm7_mmu_cache_off</div><div class='add'>+		mov	pc, lr</div><div class='add'>+ THUMB(		nop				)</div><div class='add'>+		mov	pc, lr</div><div class='add'>+ THUMB(		nop				)</div><div class='ctx'> 		mov	pc, lr</div><div class='ctx'>  THUMB(		nop				)</div><div class='ctx'> </div><div class='hunk'>@@ -977,21 +963,6 @@ __armv7_mmu_cache_off:</div><div class='ctx'> 		mcr	p15, 0, r0, c7, c5, 4	@ ISB</div><div class='ctx'> 		mov	pc, r12</div><div class='ctx'> </div><div class='del'>-__arm6_mmu_cache_off:</div><div class='del'>-		mov	r0, #0x00000030		@ ARM6 control reg.</div><div class='del'>-		b	__armv3_mmu_cache_off</div><div class='del'>-</div><div class='del'>-__arm7_mmu_cache_off:</div><div class='del'>-		mov	r0, #0x00000070		@ ARM7 control reg.</div><div class='del'>-		b	__armv3_mmu_cache_off</div><div class='del'>-</div><div class='del'>-__armv3_mmu_cache_off:</div><div class='del'>-		mcr	p15, 0, r0, c1, c0, 0	@ turn MMU and cache off</div><div class='del'>-		mov	r0, #0</div><div class='del'>-		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3</div><div class='del'>-		mcr	p15, 0, r0, c5, c0, 0	@ invalidate whole TLB v3</div><div class='del'>-		mov	pc, lr</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Clean and flush the cache to maintain consistency.</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi<br/>new file mode 100644<br/>index 000000000000..f449efc9825f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9260.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9260.dtsi</a></div><div class='hunk'>@@ -0,0 +1,273 @@</div><div class='add'>+/*</div><div class='add'>+ * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2011 Atmel,</div><div class='add'>+ *                2011 Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;,</div><div class='add'>+ *                2011 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Atmel AT91SAM9260 family SoC";</div><div class='add'>+	compatible = "atmel,at91sam9260";</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;dbgu;</div><div class='add'>+		serial1 = &amp;usart0;</div><div class='add'>+		serial2 = &amp;usart1;</div><div class='add'>+		serial3 = &amp;usart2;</div><div class='add'>+		serial4 = &amp;usart3;</div><div class='add'>+		serial5 = &amp;usart4;</div><div class='add'>+		serial6 = &amp;usart5;</div><div class='add'>+		gpio0 = &amp;pioA;</div><div class='add'>+		gpio1 = &amp;pioB;</div><div class='add'>+		gpio2 = &amp;pioC;</div><div class='add'>+		tcb0 = &amp;tcb0;</div><div class='add'>+		tcb1 = &amp;tcb1;</div><div class='add'>+	};</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,arm926ejs";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x04000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			aic: interrupt-controller@fffff000 {</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				compatible = "atmel,at91rm9200-aic";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				reg = &lt;0xfffff000 0x200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ramc0: ramc@ffffea00 {</div><div class='add'>+				compatible = "atmel,at91sam9260-sdramc";</div><div class='add'>+				reg = &lt;0xffffea00 0x200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pmc: pmc@fffffc00 {</div><div class='add'>+				compatible = "atmel,at91rm9200-pmc";</div><div class='add'>+				reg = &lt;0xfffffc00 0x100&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rstc@fffffd00 {</div><div class='add'>+				compatible = "atmel,at91sam9260-rstc";</div><div class='add'>+				reg = &lt;0xfffffd00 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			shdwc@fffffd10 {</div><div class='add'>+				compatible = "atmel,at91sam9260-shdwc";</div><div class='add'>+				reg = &lt;0xfffffd10 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pit: timer@fffffd30 {</div><div class='add'>+				compatible = "atmel,at91sam9260-pit";</div><div class='add'>+				reg = &lt;0xfffffd30 0xf&gt;;</div><div class='add'>+				interrupts = &lt;1 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tcb0: timer@fffa0000 {</div><div class='add'>+				compatible = "atmel,at91rm9200-tcb";</div><div class='add'>+				reg = &lt;0xfffa0000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;17 4 18 4 19 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tcb1: timer@fffdc000 {</div><div class='add'>+				compatible = "atmel,at91rm9200-tcb";</div><div class='add'>+				reg = &lt;0xfffdc000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;26 4 27 4 28 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioA: gpio@fffff400 {</div><div class='add'>+				compatible = "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff400 0x100&gt;;</div><div class='add'>+				interrupts = &lt;2 4&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioB: gpio@fffff600 {</div><div class='add'>+				compatible = "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff600 0x100&gt;;</div><div class='add'>+				interrupts = &lt;3 4&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioC: gpio@fffff800 {</div><div class='add'>+				compatible = "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff800 0x100&gt;;</div><div class='add'>+				interrupts = &lt;4 4&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dbgu: serial@fffff200 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xfffff200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;1 4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart0: serial@fffb0000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xfffb0000 0x200&gt;;</div><div class='add'>+				interrupts = &lt;6 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart1: serial@fffb4000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xfffb4000 0x200&gt;;</div><div class='add'>+				interrupts = &lt;7 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart2: serial@fffb8000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xfffb8000 0x200&gt;;</div><div class='add'>+				interrupts = &lt;8 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart3: serial@fffd0000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xfffd0000 0x200&gt;;</div><div class='add'>+				interrupts = &lt;23 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart4: serial@fffd4000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xfffd4000 0x200&gt;;</div><div class='add'>+				interrupts = &lt;24 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart5: serial@fffd8000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xfffd8000 0x200&gt;;</div><div class='add'>+				interrupts = &lt;25 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			macb0: ethernet@fffc4000 {</div><div class='add'>+				compatible = "cdns,at32ap7000-macb", "cdns,macb";</div><div class='add'>+				reg = &lt;0xfffc4000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;21 4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb1: gadget@fffa4000 {</div><div class='add'>+				compatible = "atmel,at91rm9200-udc";</div><div class='add'>+				reg = &lt;0xfffa4000 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;10 4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			adc0: adc@fffe0000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-adc";</div><div class='add'>+				reg = &lt;0xfffe0000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;5 4&gt;;</div><div class='add'>+				atmel,adc-use-external-triggers;</div><div class='add'>+				atmel,adc-channels-used = &lt;0xf&gt;;</div><div class='add'>+				atmel,adc-vref = &lt;3300&gt;;</div><div class='add'>+				atmel,adc-num-channels = &lt;4&gt;;</div><div class='add'>+				atmel,adc-startup-time = &lt;15&gt;;</div><div class='add'>+				atmel,adc-channel-base = &lt;0x30&gt;;</div><div class='add'>+				atmel,adc-drdy-mask = &lt;0x10000&gt;;</div><div class='add'>+				atmel,adc-status-register = &lt;0x1c&gt;;</div><div class='add'>+				atmel,adc-trigger-register = &lt;0x04&gt;;</div><div class='add'>+</div><div class='add'>+				trigger@0 {</div><div class='add'>+					trigger-name = "timer-counter-0";</div><div class='add'>+					trigger-value = &lt;0x1&gt;;</div><div class='add'>+				};</div><div class='add'>+				trigger@1 {</div><div class='add'>+					trigger-name = "timer-counter-1";</div><div class='add'>+					trigger-value = &lt;0x3&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@2 {</div><div class='add'>+					trigger-name = "timer-counter-2";</div><div class='add'>+					trigger-value = &lt;0x5&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@3 {</div><div class='add'>+					trigger-name = "external";</div><div class='add'>+					trigger-value = &lt;0x13&gt;;</div><div class='add'>+					trigger-external;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			compatible = "atmel,at91rm9200-nand";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0x40000000 0x10000000</div><div class='add'>+			       0xffffe800 0x200</div><div class='add'>+			      &gt;;</div><div class='add'>+			atmel,nand-addr-offset = &lt;21&gt;;</div><div class='add'>+			atmel,nand-cmd-offset = &lt;22&gt;;</div><div class='add'>+			gpios = &lt;&amp;pioC 13 0</div><div class='add'>+				 &amp;pioC 14 0</div><div class='add'>+				 0</div><div class='add'>+				&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: ohci@00500000 {</div><div class='add'>+			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='add'>+			reg = &lt;0x00500000 0x100000&gt;;</div><div class='add'>+			interrupts = &lt;20 4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@0 {</div><div class='add'>+		compatible = "i2c-gpio";</div><div class='add'>+		gpios = &lt;&amp;pioA 23 0 /* sda */</div><div class='add'>+			 &amp;pioA 24 0 /* scl */</div><div class='add'>+			&gt;;</div><div class='add'>+		i2c-gpio,sda-open-drain;</div><div class='add'>+		i2c-gpio,scl-open-drain;</div><div class='add'>+		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi<br/>new file mode 100644<br/>index 000000000000..0209913a65a2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9263.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9263.dtsi</a></div><div class='hunk'>@@ -0,0 +1,220 @@</div><div class='add'>+/*</div><div class='add'>+ * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 only.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Atmel AT91SAM9263 family SoC";</div><div class='add'>+	compatible = "atmel,at91sam9263";</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;dbgu;</div><div class='add'>+		serial1 = &amp;usart0;</div><div class='add'>+		serial2 = &amp;usart1;</div><div class='add'>+		serial3 = &amp;usart2;</div><div class='add'>+		gpio0 = &amp;pioA;</div><div class='add'>+		gpio1 = &amp;pioB;</div><div class='add'>+		gpio2 = &amp;pioC;</div><div class='add'>+		gpio3 = &amp;pioD;</div><div class='add'>+		gpio4 = &amp;pioE;</div><div class='add'>+		tcb0 = &amp;tcb0;</div><div class='add'>+	};</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,arm926ejs";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x08000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			aic: interrupt-controller@fffff000 {</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				compatible = "atmel,at91rm9200-aic";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				reg = &lt;0xfffff000 0x200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pmc: pmc@fffffc00 {</div><div class='add'>+				compatible = "atmel,at91rm9200-pmc";</div><div class='add'>+				reg = &lt;0xfffffc00 0x100&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ramc: ramc@ffffe200 {</div><div class='add'>+				compatible = "atmel,at91sam9260-sdramc";</div><div class='add'>+				reg = &lt;0xffffe200 0x200</div><div class='add'>+				       0xffffe800 0x200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pit: timer@fffffd30 {</div><div class='add'>+				compatible = "atmel,at91sam9260-pit";</div><div class='add'>+				reg = &lt;0xfffffd30 0xf&gt;;</div><div class='add'>+				interrupts = &lt;1 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tcb0: timer@fff7c000 {</div><div class='add'>+				compatible = "atmel,at91rm9200-tcb";</div><div class='add'>+				reg = &lt;0xfff7c000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;19 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rstc@fffffd00 {</div><div class='add'>+				compatible = "atmel,at91sam9260-rstc";</div><div class='add'>+				reg = &lt;0xfffffd00 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			shdwc@fffffd10 {</div><div class='add'>+				compatible = "atmel,at91sam9260-shdwc";</div><div class='add'>+				reg = &lt;0xfffffd10 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioA: gpio@fffff200 {</div><div class='add'>+				compatible = "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff200 0x100&gt;;</div><div class='add'>+				interrupts = &lt;2 4&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioB: gpio@fffff400 {</div><div class='add'>+				compatible = "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff400 0x100&gt;;</div><div class='add'>+				interrupts = &lt;3 4&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioC: gpio@fffff600 {</div><div class='add'>+				compatible = "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff600 0x100&gt;;</div><div class='add'>+				interrupts = &lt;4 4&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioD: gpio@fffff800 {</div><div class='add'>+				compatible = "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff800 0x100&gt;;</div><div class='add'>+				interrupts = &lt;4 4&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioE: gpio@fffffa00 {</div><div class='add'>+				compatible = "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffffa00 0x100&gt;;</div><div class='add'>+				interrupts = &lt;4 4&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dbgu: serial@ffffee00 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xffffee00 0x200&gt;;</div><div class='add'>+				interrupts = &lt;1 4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart0: serial@fff8c000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xfff8c000 0x200&gt;;</div><div class='add'>+				interrupts = &lt;7 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart1: serial@fff90000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xfff90000 0x200&gt;;</div><div class='add'>+				interrupts = &lt;8 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart2: serial@fff94000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xfff94000 0x200&gt;;</div><div class='add'>+				interrupts = &lt;9 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			macb0: ethernet@fffbc000 {</div><div class='add'>+				compatible = "cdns,at32ap7000-macb", "cdns,macb";</div><div class='add'>+				reg = &lt;0xfffbc000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;21 4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb1: gadget@fff78000 {</div><div class='add'>+				compatible = "atmel,at91rm9200-udc";</div><div class='add'>+				reg = &lt;0xfff78000 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;24 4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			compatible = "atmel,at91rm9200-nand";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0x40000000 0x10000000</div><div class='add'>+			       0xffffe000 0x200</div><div class='add'>+			      &gt;;</div><div class='add'>+			atmel,nand-addr-offset = &lt;21&gt;;</div><div class='add'>+			atmel,nand-cmd-offset = &lt;22&gt;;</div><div class='add'>+			gpios = &lt;&amp;pioA 22 0</div><div class='add'>+				 &amp;pioD 15 0</div><div class='add'>+				 0</div><div class='add'>+				&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: ohci@00a00000 {</div><div class='add'>+			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='add'>+			reg = &lt;0x00a00000 0x100000&gt;;</div><div class='add'>+			interrupts = &lt;29 4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@0 {</div><div class='add'>+		compatible = "i2c-gpio";</div><div class='add'>+		gpios = &lt;&amp;pioB 4 0 /* sda */</div><div class='add'>+			 &amp;pioB 5 0 /* scl */</div><div class='add'>+			&gt;;</div><div class='add'>+		i2c-gpio,sda-open-drain;</div><div class='add'>+		i2c-gpio,scl-open-drain;</div><div class='add'>+		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts<br/>new file mode 100644<br/>index 000000000000..f86ac4b609fc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9263ek.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9263ek.dts</a></div><div class='hunk'>@@ -0,0 +1,156 @@</div><div class='add'>+/*</div><div class='add'>+ * at91sam9263ek.dts - Device Tree file for Atmel at91sam9263 reference board</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 only</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "at91sam9263.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Atmel at91sam9263ek";</div><div class='add'>+	compatible = "atmel,at91sam9263ek", "atmel,at91sam9263", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x4000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		main_clock: clock@0 {</div><div class='add'>+			compatible = "atmel,osc", "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;16367660&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			dbgu: serial@ffffee00 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart0: serial@fff8c000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			macb0: ethernet@fffbc000 {</div><div class='add'>+				phy-mode = "rmii";</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb1: gadget@fff78000 {</div><div class='add'>+				atmel,vbus-gpio = &lt;&amp;pioA 25 0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			nand-bus-width = &lt;8&gt;;</div><div class='add'>+			nand-ecc-mode = "soft";</div><div class='add'>+			nand-on-flash-bbt = &lt;1&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			at91bootstrap@0 {</div><div class='add'>+				label = "at91bootstrap";</div><div class='add'>+				reg = &lt;0x0 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			barebox@20000 {</div><div class='add'>+				label = "barebox";</div><div class='add'>+				reg = &lt;0x20000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bareboxenv@60000 {</div><div class='add'>+				label = "bareboxenv";</div><div class='add'>+				reg = &lt;0x60000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bareboxenv2@80000 {</div><div class='add'>+				label = "bareboxenv2";</div><div class='add'>+				reg = &lt;0x80000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			oftree@80000 {</div><div class='add'>+				label = "oftree";</div><div class='add'>+				reg = &lt;0xa0000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kernel@a0000 {</div><div class='add'>+				label = "kernel";</div><div class='add'>+				reg = &lt;0xc0000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rootfs@4a0000 {</div><div class='add'>+				label = "rootfs";</div><div class='add'>+				reg = &lt;0x4c0000 0x7800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			data@7ca0000 {</div><div class='add'>+				label = "data";</div><div class='add'>+				reg = &lt;0x7cc0000 0x8340000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: ohci@00a00000 {</div><div class='add'>+			num-ports = &lt;2&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+			atmel,vbus-gpio = &lt;&amp;pioA 24 0</div><div class='add'>+					   &amp;pioA 21 0</div><div class='add'>+					  &gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		d3 {</div><div class='add'>+			label = "d3";</div><div class='add'>+			gpios = &lt;&amp;pioB 7 0&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		d2 {</div><div class='add'>+			label = "d2";</div><div class='add'>+			gpios = &lt;&amp;pioC 29 1&gt;;</div><div class='add'>+			linux,default-trigger = "nand-disk";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		left_click {</div><div class='add'>+			label = "left_click";</div><div class='add'>+			gpios = &lt;&amp;pioC 5 1&gt;;</div><div class='add'>+			linux,code = &lt;272&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		right_click {</div><div class='add'>+			label = "right_click";</div><div class='add'>+			gpios = &lt;&amp;pioC 4 1&gt;;</div><div class='add'>+			linux,code = &lt;273&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		24c512@50 {</div><div class='add'>+			compatible = "24c512";</div><div class='add'>+			reg = &lt;0x50&gt;;</div><div class='add'>+			pagesize = &lt;128&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi<br/>index 773ef484037a..2a1d1ca8bd86 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9g20.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/at91sam9g20.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9g20.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9g20.dtsi</a></div><div class='hunk'>@@ -1,238 +1,26 @@</div><div class='ctx'> /*</div><div class='ctx'>  * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC</div><div class='ctx'>  *</div><div class='del'>- *  Copyright (C) 2011 Atmel,</div><div class='del'>- *                2011 Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;,</div><div class='del'>- *                2011 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * Licensed under GPLv2 or later.</div><div class='add'>+ * Licensed under GPLv2.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/include/ "skeleton.dtsi"</div><div class='add'>+/include/ "at91sam9260.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Atmel AT91SAM9G20 family SoC";</div><div class='ctx'> 	compatible = "atmel,at91sam9g20";</div><div class='del'>-	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;dbgu;</div><div class='del'>-		serial1 = &amp;usart0;</div><div class='del'>-		serial2 = &amp;usart1;</div><div class='del'>-		serial3 = &amp;usart2;</div><div class='del'>-		serial4 = &amp;usart3;</div><div class='del'>-		serial5 = &amp;usart4;</div><div class='del'>-		serial6 = &amp;usart5;</div><div class='del'>-		gpio0 = &amp;pioA;</div><div class='del'>-		gpio1 = &amp;pioB;</div><div class='del'>-		gpio2 = &amp;pioC;</div><div class='del'>-		tcb0 = &amp;tcb0;</div><div class='del'>-		tcb1 = &amp;tcb1;</div><div class='del'>-	};</div><div class='del'>-	cpus {</div><div class='del'>-		cpu@0 {</div><div class='del'>-			compatible = "arm,arm926ejs";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='ctx'> 		reg = &lt;0x20000000 0x08000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ahb {</div><div class='del'>-		compatible = "simple-bus";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='ctx'> 		apb {</div><div class='del'>-			compatible = "simple-bus";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			ranges;</div><div class='del'>-</div><div class='del'>-			aic: interrupt-controller@fffff000 {</div><div class='del'>-				#interrupt-cells = &lt;2&gt;;</div><div class='del'>-				compatible = "atmel,at91rm9200-aic";</div><div class='del'>-				interrupt-controller;</div><div class='del'>-				reg = &lt;0xfffff000 0x200&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ramc0: ramc@ffffea00 {</div><div class='del'>-				compatible = "atmel,at91sam9260-sdramc";</div><div class='del'>-				reg = &lt;0xffffea00 0x200&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pmc: pmc@fffffc00 {</div><div class='del'>-				compatible = "atmel,at91rm9200-pmc";</div><div class='del'>-				reg = &lt;0xfffffc00 0x100&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			rstc@fffffd00 {</div><div class='del'>-				compatible = "atmel,at91sam9260-rstc";</div><div class='del'>-				reg = &lt;0xfffffd00 0x10&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			shdwc@fffffd10 {</div><div class='del'>-				compatible = "atmel,at91sam9260-shdwc";</div><div class='del'>-				reg = &lt;0xfffffd10 0x10&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pit: timer@fffffd30 {</div><div class='del'>-				compatible = "atmel,at91sam9260-pit";</div><div class='del'>-				reg = &lt;0xfffffd30 0xf&gt;;</div><div class='del'>-				interrupts = &lt;1 4&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tcb0: timer@fffa0000 {</div><div class='del'>-				compatible = "atmel,at91rm9200-tcb";</div><div class='del'>-				reg = &lt;0xfffa0000 0x100&gt;;</div><div class='del'>-				interrupts = &lt;17 4 18 4 19 4&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tcb1: timer@fffdc000 {</div><div class='del'>-				compatible = "atmel,at91rm9200-tcb";</div><div class='del'>-				reg = &lt;0xfffdc000 0x100&gt;;</div><div class='del'>-				interrupts = &lt;26 4 27 4 28 4&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pioA: gpio@fffff400 {</div><div class='del'>-				compatible = "atmel,at91rm9200-gpio";</div><div class='del'>-				reg = &lt;0xfffff400 0x100&gt;;</div><div class='del'>-				interrupts = &lt;2 4&gt;;</div><div class='del'>-				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				gpio-controller;</div><div class='del'>-				interrupt-controller;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pioB: gpio@fffff600 {</div><div class='del'>-				compatible = "atmel,at91rm9200-gpio";</div><div class='del'>-				reg = &lt;0xfffff600 0x100&gt;;</div><div class='del'>-				interrupts = &lt;3 4&gt;;</div><div class='del'>-				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				gpio-controller;</div><div class='del'>-				interrupt-controller;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pioC: gpio@fffff800 {</div><div class='del'>-				compatible = "atmel,at91rm9200-gpio";</div><div class='del'>-				reg = &lt;0xfffff800 0x100&gt;;</div><div class='del'>-				interrupts = &lt;4 4&gt;;</div><div class='del'>-				#gpio-cells = &lt;2&gt;;</div><div class='del'>-				gpio-controller;</div><div class='del'>-				interrupt-controller;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			dbgu: serial@fffff200 {</div><div class='del'>-				compatible = "atmel,at91sam9260-usart";</div><div class='del'>-				reg = &lt;0xfffff200 0x200&gt;;</div><div class='del'>-				interrupts = &lt;1 4&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usart0: serial@fffb0000 {</div><div class='del'>-				compatible = "atmel,at91sam9260-usart";</div><div class='del'>-				reg = &lt;0xfffb0000 0x200&gt;;</div><div class='del'>-				interrupts = &lt;6 4&gt;;</div><div class='del'>-				atmel,use-dma-rx;</div><div class='del'>-				atmel,use-dma-tx;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usart1: serial@fffb4000 {</div><div class='del'>-				compatible = "atmel,at91sam9260-usart";</div><div class='del'>-				reg = &lt;0xfffb4000 0x200&gt;;</div><div class='del'>-				interrupts = &lt;7 4&gt;;</div><div class='del'>-				atmel,use-dma-rx;</div><div class='del'>-				atmel,use-dma-tx;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usart2: serial@fffb8000 {</div><div class='del'>-				compatible = "atmel,at91sam9260-usart";</div><div class='del'>-				reg = &lt;0xfffb8000 0x200&gt;;</div><div class='del'>-				interrupts = &lt;8 4&gt;;</div><div class='del'>-				atmel,use-dma-rx;</div><div class='del'>-				atmel,use-dma-tx;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usart3: serial@fffd0000 {</div><div class='del'>-				compatible = "atmel,at91sam9260-usart";</div><div class='del'>-				reg = &lt;0xfffd0000 0x200&gt;;</div><div class='del'>-				interrupts = &lt;23 4&gt;;</div><div class='del'>-				atmel,use-dma-rx;</div><div class='del'>-				atmel,use-dma-tx;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usart4: serial@fffd4000 {</div><div class='del'>-				compatible = "atmel,at91sam9260-usart";</div><div class='del'>-				reg = &lt;0xfffd4000 0x200&gt;;</div><div class='del'>-				interrupts = &lt;24 4&gt;;</div><div class='del'>-				atmel,use-dma-rx;</div><div class='del'>-				atmel,use-dma-tx;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usart5: serial@fffd8000 {</div><div class='del'>-				compatible = "atmel,at91sam9260-usart";</div><div class='del'>-				reg = &lt;0xfffd8000 0x200&gt;;</div><div class='del'>-				interrupts = &lt;25 4&gt;;</div><div class='del'>-				atmel,use-dma-rx;</div><div class='del'>-				atmel,use-dma-tx;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			macb0: ethernet@fffc4000 {</div><div class='del'>-				compatible = "cdns,at32ap7000-macb", "cdns,macb";</div><div class='del'>-				reg = &lt;0xfffc4000 0x100&gt;;</div><div class='del'>-				interrupts = &lt;21 4&gt;;</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb1: gadget@fffa4000 {</div><div class='del'>-				compatible = "atmel,at91rm9200-udc";</div><div class='del'>-				reg = &lt;0xfffa4000 0x4000&gt;;</div><div class='del'>-				interrupts = &lt;10 4&gt;;</div><div class='del'>-				status = "disabled";</div><div class='add'>+			adc0: adc@fffe0000 {</div><div class='add'>+				atmel,adc-startup-time = &lt;40&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='del'>-</div><div class='del'>-		nand0: nand@40000000 {</div><div class='del'>-			compatible = "atmel,at91rm9200-nand";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			reg = &lt;0x40000000 0x10000000</div><div class='del'>-			       0xffffe800 0x200</div><div class='del'>-			      &gt;;</div><div class='del'>-			atmel,nand-addr-offset = &lt;21&gt;;</div><div class='del'>-			atmel,nand-cmd-offset = &lt;22&gt;;</div><div class='del'>-			gpios = &lt;&amp;pioC 13 0</div><div class='del'>-				 &amp;pioC 14 0</div><div class='del'>-				 0</div><div class='del'>-				&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb0: ohci@00500000 {</div><div class='del'>-			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='del'>-			reg = &lt;0x00500000 0x100000&gt;;</div><div class='del'>-			interrupts = &lt;20 4&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@0 {</div><div class='del'>-		compatible = "i2c-gpio";</div><div class='del'>-		gpios = &lt;&amp;pioA 23 0 /* sda */</div><div class='del'>-			 &amp;pioA 24 0 /* scl */</div><div class='del'>-			&gt;;</div><div class='del'>-		i2c-gpio,sda-open-drain;</div><div class='del'>-		i2c-gpio,scl-open-drain;</div><div class='del'>-		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		status = "disabled";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9g20ek.dts b/arch/arm/boot/dts/at91sam9g20ek.dts<br/>new file mode 100644<br/>index 000000000000..e5324bf9d529<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9g20ek.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9g20ek.dts</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+/*</div><div class='add'>+ * at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "at91sam9g20ek_common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Atmel at91sam9g20ek";</div><div class='add'>+	compatible = "atmel,at91sam9g20ek", "atmel,at91sam9g20", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		ds1 {</div><div class='add'>+			label = "ds1";</div><div class='add'>+			gpios = &lt;&amp;pioA 9 0&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ds5 {</div><div class='add'>+			label = "ds5";</div><div class='add'>+			gpios = &lt;&amp;pioA 6 1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts b/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts<br/>new file mode 100644<br/>index 000000000000..f1b2e148ac8c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9g20ek_2mmc.dts</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+/*</div><div class='add'>+ * at91sam9g20ek_2mmc.dts - Device Tree file for Atmel at91sam9g20ek 2 MMC board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "at91sam9g20ek_common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Atmel at91sam9g20ek 2 mmc";</div><div class='add'>+	compatible = "atmel,at91sam9g20ek_2mmc", "atmel,at91sam9g20", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		ds1 {</div><div class='add'>+			label = "ds1";</div><div class='add'>+			gpios = &lt;&amp;pioB 9 0&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ds5 {</div><div class='add'>+			label = "ds5";</div><div class='add'>+			gpios = &lt;&amp;pioB 8 1&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi<br/>new file mode 100644<br/>index 000000000000..b06c0db273b1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9g20ek_common.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9g20ek_common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,142 @@</div><div class='add'>+/*</div><div class='add'>+ * at91sam9g20ek_common.dtsi - Device Tree file for Atmel at91sam9g20ek board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2.</div><div class='add'>+ */</div><div class='add'>+/include/ "at91sam9g20.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x4000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		main_clock: clock@0 {</div><div class='add'>+			compatible = "atmel,osc", "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;18432000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			dbgu: serial@fffff200 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart0: serial@fffb0000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart1: serial@fffb4000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			macb0: ethernet@fffc4000 {</div><div class='add'>+				phy-mode = "rmii";</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb1: gadget@fffa4000 {</div><div class='add'>+				atmel,vbus-gpio = &lt;&amp;pioC 5 0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			nand-bus-width = &lt;8&gt;;</div><div class='add'>+			nand-ecc-mode = "soft";</div><div class='add'>+			nand-on-flash-bbt;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			at91bootstrap@0 {</div><div class='add'>+				label = "at91bootstrap";</div><div class='add'>+				reg = &lt;0x0 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			barebox@20000 {</div><div class='add'>+				label = "barebox";</div><div class='add'>+				reg = &lt;0x20000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bareboxenv@60000 {</div><div class='add'>+				label = "bareboxenv";</div><div class='add'>+				reg = &lt;0x60000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bareboxenv2@80000 {</div><div class='add'>+				label = "bareboxenv2";</div><div class='add'>+				reg = &lt;0x80000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			oftree@80000 {</div><div class='add'>+				label = "oftree";</div><div class='add'>+				reg = &lt;0xa0000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kernel@a0000 {</div><div class='add'>+				label = "kernel";</div><div class='add'>+				reg = &lt;0xc0000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rootfs@4a0000 {</div><div class='add'>+				label = "rootfs";</div><div class='add'>+				reg = &lt;0x4c0000 0x7800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			data@7ca0000 {</div><div class='add'>+				label = "data";</div><div class='add'>+				reg = &lt;0x7cc0000 0x8340000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: ohci@00500000 {</div><div class='add'>+			num-ports = &lt;2&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		24c512@50 {</div><div class='add'>+			compatible = "24c512";</div><div class='add'>+			reg = &lt;0x50&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		wm8731@1b {</div><div class='add'>+			compatible = "wm8731";</div><div class='add'>+			reg = &lt;0x1b&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		btn3 {</div><div class='add'>+			label = "Buttin 3";</div><div class='add'>+			gpios = &lt;&amp;pioA 30 1&gt;;</div><div class='add'>+			linux,code = &lt;0x103&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		btn4 {</div><div class='add'>+			label = "Buttin 4";</div><div class='add'>+			gpios = &lt;&amp;pioA 31 1&gt;;</div><div class='add'>+			linux,code = &lt;0x104&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi<br/>index c8042147eaa2..7dbccaf199f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9g45.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/at91sam9g45.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9g45.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9g45.dtsi</a></div><div class='hunk'>@@ -199,6 +199,43 @@</div><div class='ctx'> 				interrupts = &lt;25 4&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			adc0: adc@fffb0000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-adc";</div><div class='add'>+				reg = &lt;0xfffb0000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;20 4&gt;;</div><div class='add'>+				atmel,adc-use-external-triggers;</div><div class='add'>+				atmel,adc-channels-used = &lt;0xff&gt;;</div><div class='add'>+				atmel,adc-vref = &lt;3300&gt;;</div><div class='add'>+				atmel,adc-num-channels = &lt;8&gt;;</div><div class='add'>+				atmel,adc-startup-time = &lt;40&gt;;</div><div class='add'>+				atmel,adc-channel-base = &lt;0x30&gt;;</div><div class='add'>+				atmel,adc-drdy-mask = &lt;0x10000&gt;;</div><div class='add'>+				atmel,adc-status-register = &lt;0x1c&gt;;</div><div class='add'>+				atmel,adc-trigger-register = &lt;0x08&gt;;</div><div class='add'>+</div><div class='add'>+				trigger@0 {</div><div class='add'>+					trigger-name = "external-rising";</div><div class='add'>+					trigger-value = &lt;0x1&gt;;</div><div class='add'>+					trigger-external;</div><div class='add'>+				};</div><div class='add'>+				trigger@1 {</div><div class='add'>+					trigger-name = "external-falling";</div><div class='add'>+					trigger-value = &lt;0x2&gt;;</div><div class='add'>+					trigger-external;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@2 {</div><div class='add'>+					trigger-name = "external-any";</div><div class='add'>+					trigger-value = &lt;0x3&gt;;</div><div class='add'>+					trigger-external;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@3 {</div><div class='add'>+					trigger-name = "continuous";</div><div class='add'>+					trigger-value = &lt;0x6&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nand0: nand@40000000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi<br/>new file mode 100644<br/>index 000000000000..cb84de791b5a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9n12.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9n12.dtsi</a></div><div class='hunk'>@@ -0,0 +1,221 @@</div><div class='add'>+/*</div><div class='add'>+ * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012 Atmel,</div><div class='add'>+ *                2012 Hong Xu &lt;hong.xu@atmel.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Atmel AT91SAM9N12 SoC";</div><div class='add'>+	compatible = "atmel,at91sam9n12";</div><div class='add'>+	interrupt-parent = &lt;&amp;aic&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;dbgu;</div><div class='add'>+		serial1 = &amp;usart0;</div><div class='add'>+		serial2 = &amp;usart1;</div><div class='add'>+		serial3 = &amp;usart2;</div><div class='add'>+		serial4 = &amp;usart3;</div><div class='add'>+		gpio0 = &amp;pioA;</div><div class='add'>+		gpio1 = &amp;pioB;</div><div class='add'>+		gpio2 = &amp;pioC;</div><div class='add'>+		gpio3 = &amp;pioD;</div><div class='add'>+		tcb0 = &amp;tcb0;</div><div class='add'>+		tcb1 = &amp;tcb1;</div><div class='add'>+	};</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,arm926ejs";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			aic: interrupt-controller@fffff000 {</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				compatible = "atmel,at91rm9200-aic";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				reg = &lt;0xfffff000 0x200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ramc0: ramc@ffffe800 {</div><div class='add'>+				compatible = "atmel,at91sam9g45-ddramc";</div><div class='add'>+				reg = &lt;0xffffe800 0x200&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pmc: pmc@fffffc00 {</div><div class='add'>+				compatible = "atmel,at91rm9200-pmc";</div><div class='add'>+				reg = &lt;0xfffffc00 0x100&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rstc@fffffe00 {</div><div class='add'>+				compatible = "atmel,at91sam9g45-rstc";</div><div class='add'>+				reg = &lt;0xfffffe00 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pit: timer@fffffe30 {</div><div class='add'>+				compatible = "atmel,at91sam9260-pit";</div><div class='add'>+				reg = &lt;0xfffffe30 0xf&gt;;</div><div class='add'>+				interrupts = &lt;1 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			shdwc@fffffe10 {</div><div class='add'>+				compatible = "atmel,at91sam9x5-shdwc";</div><div class='add'>+				reg = &lt;0xfffffe10 0x10&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tcb0: timer@f8008000 {</div><div class='add'>+				compatible = "atmel,at91sam9x5-tcb";</div><div class='add'>+				reg = &lt;0xf8008000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;17 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tcb1: timer@f800c000 {</div><div class='add'>+				compatible = "atmel,at91sam9x5-tcb";</div><div class='add'>+				reg = &lt;0xf800c000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;17 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dma: dma-controller@ffffec00 {</div><div class='add'>+				compatible = "atmel,at91sam9g45-dma";</div><div class='add'>+				reg = &lt;0xffffec00 0x200&gt;;</div><div class='add'>+				interrupts = &lt;20 4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioA: gpio@fffff400 {</div><div class='add'>+				compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff400 0x100&gt;;</div><div class='add'>+				interrupts = &lt;2 4&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioB: gpio@fffff600 {</div><div class='add'>+				compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff600 0x100&gt;;</div><div class='add'>+				interrupts = &lt;2 4&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioC: gpio@fffff800 {</div><div class='add'>+				compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffff800 0x100&gt;;</div><div class='add'>+				interrupts = &lt;3 4&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pioD: gpio@fffffa00 {</div><div class='add'>+				compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";</div><div class='add'>+				reg = &lt;0xfffffa00 0x100&gt;;</div><div class='add'>+				interrupts = &lt;3 4&gt;;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dbgu: serial@fffff200 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xfffff200 0x200&gt;;</div><div class='add'>+				interrupts = &lt;1 4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart0: serial@f801c000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xf801c000 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;5 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart1: serial@f8020000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xf8020000 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;6 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart2: serial@f8024000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xf8024000 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;7 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart3: serial@f8028000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-usart";</div><div class='add'>+				reg = &lt;0xf8028000 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;8 4&gt;;</div><div class='add'>+				atmel,use-dma-rx;</div><div class='add'>+				atmel,use-dma-tx;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			compatible = "atmel,at91rm9200-nand";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt; 0x40000000 0x10000000</div><div class='add'>+				0xffffe000 0x00000600</div><div class='add'>+				0xffffe600 0x00000200</div><div class='add'>+				0x00100000 0x00100000</div><div class='add'>+			       &gt;;</div><div class='add'>+			atmel,nand-addr-offset = &lt;21&gt;;</div><div class='add'>+			atmel,nand-cmd-offset = &lt;22&gt;;</div><div class='add'>+			gpios = &lt;&amp;pioD 5 0</div><div class='add'>+				 &amp;pioD 4 0</div><div class='add'>+				 0</div><div class='add'>+				&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: ohci@00500000 {</div><div class='add'>+			compatible = "atmel,at91rm9200-ohci", "usb-ohci";</div><div class='add'>+			reg = &lt;0x00500000 0x00100000&gt;;</div><div class='add'>+			interrupts = &lt;22 4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@0 {</div><div class='add'>+		compatible = "i2c-gpio";</div><div class='add'>+		gpios = &lt;&amp;pioA 30 0 /* sda */</div><div class='add'>+			 &amp;pioA 31 0 /* scl */</div><div class='add'>+			&gt;;</div><div class='add'>+		i2c-gpio,sda-open-drain;</div><div class='add'>+		i2c-gpio,scl-open-drain;</div><div class='add'>+		i2c-gpio,delay-us = &lt;2&gt;;	/* ~100 kHz */</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts<br/>new file mode 100644<br/>index 000000000000..f4e43e38f3a1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9n12ek.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9n12ek.dts</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+/*</div><div class='add'>+ * at91sam9n12ek.dts - Device Tree file for AT91SAM9N12-EK board</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012 Atmel,</div><div class='add'>+ *                2012 Hong Xu &lt;hong.xu@atmel.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 or later.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "at91sam9n12.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Atmel AT91SAM9N12-EK";</div><div class='add'>+	compatible = "atmel,at91sam9n12ek", "atmel,at91sam9n12", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "mem=128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		main_clock: clock@0 {</div><div class='add'>+			compatible = "atmel,osc", "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;16000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			dbgu: serial@fffff200 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			nand-bus-width = &lt;8&gt;;</div><div class='add'>+			nand-ecc-mode = "soft";</div><div class='add'>+			nand-on-flash-bbt;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		d8 {</div><div class='add'>+			label = "d8";</div><div class='add'>+			gpios = &lt;&amp;pioB 4 1&gt;;</div><div class='add'>+			linux,default-trigger = "mmc0";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		d9 {</div><div class='add'>+			label = "d6";</div><div class='add'>+			gpios = &lt;&amp;pioB 5 1&gt;;</div><div class='add'>+			linux,default-trigger = "nand-disk";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		d10 {</div><div class='add'>+			label = "d7";</div><div class='add'>+			gpios = &lt;&amp;pioB 6 0&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		enter {</div><div class='add'>+			label = "Enter";</div><div class='add'>+			gpios = &lt;&amp;pioB 4 1&gt;;</div><div class='add'>+			linux,code = &lt;28&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi<br/>index dd4ed748469a..6b3ef4339ae7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9x5.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/at91sam9x5.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/at91sam9x5.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/at91sam9x5.dtsi</a></div><div class='hunk'>@@ -190,6 +190,44 @@</div><div class='ctx'> 				interrupts = &lt;27 4&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			adc0: adc@f804c000 {</div><div class='add'>+				compatible = "atmel,at91sam9260-adc";</div><div class='add'>+				reg = &lt;0xf804c000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;19 4&gt;;</div><div class='add'>+				atmel,adc-use-external;</div><div class='add'>+				atmel,adc-channels-used = &lt;0xffff&gt;;</div><div class='add'>+				atmel,adc-vref = &lt;3300&gt;;</div><div class='add'>+				atmel,adc-num-channels = &lt;12&gt;;</div><div class='add'>+				atmel,adc-startup-time = &lt;40&gt;;</div><div class='add'>+				atmel,adc-channel-base = &lt;0x50&gt;;</div><div class='add'>+				atmel,adc-drdy-mask = &lt;0x1000000&gt;;</div><div class='add'>+				atmel,adc-status-register = &lt;0x30&gt;;</div><div class='add'>+				atmel,adc-trigger-register = &lt;0xc0&gt;;</div><div class='add'>+</div><div class='add'>+				trigger@0 {</div><div class='add'>+					trigger-name = "external-rising";</div><div class='add'>+					trigger-value = &lt;0x1&gt;;</div><div class='add'>+					trigger-external;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@1 {</div><div class='add'>+					trigger-name = "external-falling";</div><div class='add'>+					trigger-value = &lt;0x2&gt;;</div><div class='add'>+					trigger-external;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@2 {</div><div class='add'>+					trigger-name = "external-any";</div><div class='add'>+					trigger-value = &lt;0x3&gt;;</div><div class='add'>+					trigger-external;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				trigger@3 {</div><div class='add'>+					trigger-name = "continuous";</div><div class='add'>+					trigger-value = &lt;0x6&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		nand0: nand@40000000 {</div><div class='head'>diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi<br/>index 14bc30705099..4ad5160018cb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/db8500.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/db8500.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/db8500.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/db8500.dtsi</a></div><div class='hunk'>@@ -55,83 +55,123 @@</div><div class='ctx'> </div><div class='ctx'> 		gpio0: gpio@8012e000 {</div><div class='ctx'> 			compatible = "stericsson,db8500-gpio",</div><div class='del'>-				"stmicroelectronics,nomadik-gpio";</div><div class='add'>+				"st,nomadik-gpio";</div><div class='ctx'> 			reg =  &lt;0x8012e000 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;0 119 0x4&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			supports-sleepmode;</div><div class='ctx'> 			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-bank = &lt;0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio1: gpio@8012e080 {</div><div class='ctx'> 			compatible = "stericsson,db8500-gpio",</div><div class='del'>-				"stmicroelectronics,nomadik-gpio";</div><div class='add'>+				"st,nomadik-gpio";</div><div class='ctx'> 			reg =  &lt;0x8012e080 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;0 120 0x4&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			supports-sleepmode;</div><div class='ctx'> 			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-bank = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio2: gpio@8000e000 {</div><div class='ctx'> 			compatible = "stericsson,db8500-gpio",</div><div class='del'>-				"stmicroelectronics,nomadik-gpio";</div><div class='add'>+				"st,nomadik-gpio";</div><div class='ctx'> 			reg =  &lt;0x8000e000 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;0 121 0x4&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			supports-sleepmode;</div><div class='ctx'> 			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-bank = &lt;2&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio3: gpio@8000e080 {</div><div class='ctx'> 			compatible = "stericsson,db8500-gpio",</div><div class='del'>-				"stmicroelectronics,nomadik-gpio";</div><div class='add'>+				"st,nomadik-gpio";</div><div class='ctx'> 			reg =  &lt;0x8000e080 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;0 122 0x4&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			supports-sleepmode;</div><div class='ctx'> 			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-bank = &lt;3&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio4: gpio@8000e100 {</div><div class='ctx'> 			compatible = "stericsson,db8500-gpio",</div><div class='del'>-				"stmicroelectronics,nomadik-gpio";</div><div class='add'>+				"st,nomadik-gpio";</div><div class='ctx'> 			reg =  &lt;0x8000e100 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;0 123 0x4&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			supports-sleepmode;</div><div class='ctx'> 			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-bank = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio5: gpio@8000e180 {</div><div class='ctx'> 			compatible = "stericsson,db8500-gpio",</div><div class='del'>-				"stmicroelectronics,nomadik-gpio";</div><div class='add'>+				"st,nomadik-gpio";</div><div class='ctx'> 			reg =  &lt;0x8000e180 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;0 124 0x4&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			supports-sleepmode;</div><div class='ctx'> 			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-bank = &lt;5&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio6: gpio@8011e000 {</div><div class='ctx'> 			compatible = "stericsson,db8500-gpio",</div><div class='del'>-				"stmicroelectronics,nomadik-gpio";</div><div class='add'>+				"st,nomadik-gpio";</div><div class='ctx'> 			reg =  &lt;0x8011e000 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;0 125 0x4&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			supports-sleepmode;</div><div class='ctx'> 			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-bank = &lt;6&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio7: gpio@8011e080 {</div><div class='ctx'> 			compatible = "stericsson,db8500-gpio",</div><div class='del'>-				"stmicroelectronics,nomadik-gpio";</div><div class='add'>+				"st,nomadik-gpio";</div><div class='ctx'> 			reg =  &lt;0x8011e080 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;0 126 0x4&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			supports-sleepmode;</div><div class='ctx'> 			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-bank = &lt;7&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpio8: gpio@a03fe000 {</div><div class='ctx'> 			compatible = "stericsson,db8500-gpio",</div><div class='del'>-				"stmicroelectronics,nomadik-gpio";</div><div class='add'>+				"st,nomadik-gpio";</div><div class='ctx'> 			reg =  &lt;0xa03fe000 0x80&gt;;</div><div class='ctx'> 			interrupts = &lt;0 127 0x4&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 			supports-sleepmode;</div><div class='ctx'> 			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-bank = &lt;8&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pinctrl {</div><div class='add'>+			compatible = "stericsson,nmk_pinctrl";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		usb@a03e0000 {</div><div class='hunk'>@@ -151,19 +191,200 @@</div><div class='ctx'> 		prcmu@80157000 {</div><div class='ctx'> 			compatible = "stericsson,db8500-prcmu";</div><div class='ctx'> 			reg = &lt;0x80157000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;46 47&gt;;</div><div class='add'>+			interrupts = &lt;0 47 0x4&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			prcmu-timer-4@80157450 {</div><div class='add'>+				compatible = "stericsson,db8500-prcmu-timer-4";</div><div class='add'>+				reg = &lt;0x80157450 0xC&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			db8500-prcmu-regulators {</div><div class='add'>+				compatible = "stericsson,db8500-prcmu-regulator";</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_VAPE</div><div class='add'>+				db8500_vape_reg: db8500_vape {</div><div class='add'>+					regulator-name = "db8500-vape";</div><div class='add'>+					regulator-always-on;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_VARM</div><div class='add'>+				db8500_varm_reg: db8500_varm {</div><div class='add'>+					regulator-name = "db8500-varm";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_VMODEM</div><div class='add'>+				db8500_vmodem_reg: db8500_vmodem {</div><div class='add'>+					regulator-name = "db8500-vmodem";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_VPLL</div><div class='add'>+				db8500_vpll_reg: db8500_vpll {</div><div class='add'>+					regulator-name = "db8500-vpll";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_VSMPS1</div><div class='add'>+				db8500_vsmps1_reg: db8500_vsmps1 {</div><div class='add'>+					regulator-name = "db8500-vsmps1";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_VSMPS2</div><div class='add'>+				db8500_vsmps2_reg: db8500_vsmps2 {</div><div class='add'>+					regulator-name = "db8500-vsmps2";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_VSMPS3</div><div class='add'>+				db8500_vsmps3_reg: db8500_vsmps3 {</div><div class='add'>+					regulator-name = "db8500-vsmps3";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_VRF1</div><div class='add'>+				db8500_vrf1_reg: db8500_vrf1 {</div><div class='add'>+					regulator-name = "db8500-vrf1";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_SWITCH_SVAMMDSP</div><div class='add'>+				db8500_sva_mmdsp_reg: db8500_sva_mmdsp {</div><div class='add'>+					regulator-name = "db8500-sva-mmdsp";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_SWITCH_SVAMMDSPRET</div><div class='add'>+				db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {</div><div class='add'>+					regulator-name = "db8500-sva-mmdsp-ret";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_SWITCH_SVAPIPE</div><div class='add'>+				db8500_sva_pipe_reg: db8500_sva_pipe {</div><div class='add'>+					regulator-name = "db8500_sva_pipe";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_SWITCH_SIAMMDSP</div><div class='add'>+				db8500_sia_mmdsp_reg: db8500_sia_mmdsp {</div><div class='add'>+					regulator-name = "db8500_sia_mmdsp";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_SWITCH_SIAMMDSPRET</div><div class='add'>+				db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {</div><div class='add'>+					regulator-name = "db8500-sia-mmdsp-ret";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_SWITCH_SIAPIPE</div><div class='add'>+				db8500_sia_pipe_reg: db8500_sia_pipe {</div><div class='add'>+					regulator-name = "db8500-sia-pipe";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_SWITCH_SGA</div><div class='add'>+				db8500_sga_reg: db8500_sga {</div><div class='add'>+					regulator-name = "db8500-sga";</div><div class='add'>+					vin-supply = &lt;&amp;db8500_vape_reg&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_SWITCH_B2R2_MCDE</div><div class='add'>+				db8500_b2r2_mcde_reg: db8500_b2r2_mcde {</div><div class='add'>+					regulator-name = "db8500-b2r2-mcde";</div><div class='add'>+					vin-supply = &lt;&amp;db8500_vape_reg&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_SWITCH_ESRAM12</div><div class='add'>+				db8500_esram12_reg: db8500_esram12 {</div><div class='add'>+					regulator-name = "db8500-esram12";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_SWITCH_ESRAM12RET</div><div class='add'>+				db8500_esram12_ret_reg: db8500_esram12_ret {</div><div class='add'>+					regulator-name = "db8500-esram12-ret";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_SWITCH_ESRAM34</div><div class='add'>+				db8500_esram34_reg: db8500_esram34 {</div><div class='add'>+					regulator-name = "db8500-esram34";</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				// DB8500_REGULATOR_SWITCH_ESRAM34RET</div><div class='add'>+				db8500_esram34_ret_reg: db8500_esram34_ret {</div><div class='add'>+					regulator-name = "db8500-esram34-ret";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='ctx'> </div><div class='ctx'> 			ab8500@5 {</div><div class='ctx'> 				compatible = "stericsson,ab8500";</div><div class='ctx'> 				reg = &lt;5&gt;; /* mailbox 5 is i2c */</div><div class='ctx'> 				interrupts = &lt;0 40 0x4&gt;;</div><div class='add'>+</div><div class='add'>+				ab8500-regulators {</div><div class='add'>+					compatible = "stericsson,ab8500-regulator";</div><div class='add'>+</div><div class='add'>+					// supplies to the display/camera</div><div class='add'>+					ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {</div><div class='add'>+						regulator-name = "V-DISPLAY";</div><div class='add'>+						regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+						regulator-max-microvolt = &lt;2900000&gt;;</div><div class='add'>+						regulator-boot-on;</div><div class='add'>+						/* BUG: If turned off MMC will be affected. */</div><div class='add'>+						regulator-always-on;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					// supplies to the on-board eMMC</div><div class='add'>+					ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {</div><div class='add'>+						regulator-name = "V-eMMC1";</div><div class='add'>+						regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+						regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					// supply for VAUX3; SDcard slots</div><div class='add'>+					ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {</div><div class='add'>+						regulator-name = "V-MMC-SD";</div><div class='add'>+						regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+						regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					// supply for v-intcore12; VINTCORE12 LDO</div><div class='add'>+					ab8500_ldo_initcore_reg: ab8500_ldo_initcore {</div><div class='add'>+						regulator-name = "V-INTCORE";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					// supply for tvout; gpadc; TVOUT LDO</div><div class='add'>+					ab8500_ldo_tvout_reg: ab8500_ldo_tvout {</div><div class='add'>+						regulator-name = "V-TVOUT";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					// supply for ab8500-usb; USB LDO</div><div class='add'>+					ab8500_ldo_usb_reg: ab8500_ldo_usb {</div><div class='add'>+						regulator-name = "dummy";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					// supply for ab8500-vaudio; VAUDIO LDO</div><div class='add'>+					ab8500_ldo_audio_reg: ab8500_ldo_audio {</div><div class='add'>+						regulator-name = "V-AUD";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					// supply for v-anamic1 VAMic1-LDO</div><div class='add'>+					ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {</div><div class='add'>+						regulator-name = "V-AMIC1";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					// supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1</div><div class='add'>+					ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {</div><div class='add'>+						regulator-name = "V-AMIC2";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					// supply for v-dmic; VDMIC LDO</div><div class='add'>+					ab8500_ldo_dmic_reg: ab8500_ldo_dmic {</div><div class='add'>+						regulator-name = "V-DMIC";</div><div class='add'>+					};</div><div class='add'>+</div><div class='add'>+					// supply for U8500 CSI/DSI; VANA LDO</div><div class='add'>+					ab8500_ldo_ana_reg: ab8500_ldo_ana {</div><div class='add'>+						regulator-name = "V-CSI/DSI";</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c@80004000 {</div><div class='del'>-			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";</div><div class='add'>+			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";</div><div class='ctx'> 			reg = &lt;0x80004000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 21 0x4&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -171,7 +392,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c@80122000 {</div><div class='del'>-			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";</div><div class='add'>+			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";</div><div class='ctx'> 			reg = &lt;0x80122000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 22 0x4&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -179,7 +400,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c@80128000 {</div><div class='del'>-			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";</div><div class='add'>+			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";</div><div class='ctx'> 			reg = &lt;0x80128000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 55 0x4&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -187,7 +408,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c@80110000 {</div><div class='del'>-			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";</div><div class='add'>+			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";</div><div class='ctx'> 			reg = &lt;0x80110000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 12 0x4&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -195,7 +416,7 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		i2c@8012a000 {</div><div class='del'>-			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";</div><div class='add'>+			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";</div><div class='ctx'> 			reg = &lt;0x8012a000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 51 0x4&gt;;</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -211,7 +432,8 @@</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> </div><div class='ctx'> 			// Add one of these for each child device</div><div class='del'>-			cs-gpios = &lt;&amp;gpio0 31 &amp;gpio4 14 &amp;gpio4 16 &amp;gpio6 22 &amp;gpio7 0&gt;;</div><div class='add'>+			cs-gpios = &lt;&amp;gpio0 31 0x4 &amp;gpio4 14 0x4 &amp;gpio4 16 0x4</div><div class='add'>+				    &amp;gpio6 22 0x4 &amp;gpio7 0 0x4&gt;;</div><div class='ctx'> </div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -270,5 +492,14 @@</div><div class='ctx'> 			interrupts = &lt;0 100 0x4&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		external-bus@50000000 {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			reg = &lt;0x50000000 0x4000000&gt;;</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0x50000000 0x4000000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts<br/>new file mode 100644<br/>index 000000000000..297e3baba71c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/emev2-kzm9d.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/emev2-kzm9d.dts</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the KZM9D board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Renesas Solutions Corp.</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public License</div><div class='add'>+ * version 2.  This program is licensed "as is" without any warranty of any</div><div class='add'>+ * kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "emev2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "EMEV2 KZM9D Board";</div><div class='add'>+	compatible = "renesas,kzm9d", "renesas,emev2";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x40000000 0x8000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS1,115200n81";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi<br/>new file mode 100644<br/>index 000000000000..eb504a6c0f4a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/emev2.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/emev2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the EMEV2 SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Renesas Solutions Corp.</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public License</div><div class='add'>+ * version 2.  This program is licensed "as is" without any warranty of any</div><div class='add'>+ * kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,emev2";</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+		};</div><div class='add'>+		cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gic: interrupt-controller@e0020000 {</div><div class='add'>+		compatible = "arm,cortex-a9-gic";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		reg = &lt;0xe0028000 0x1000&gt;,</div><div class='add'>+		      &lt;0xe0020000 0x0100&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sti@e0180000 {</div><div class='add'>+		compatible = "renesas,em-sti";</div><div class='add'>+		reg = &lt;0xe0180000 0x54&gt;;</div><div class='add'>+		interrupts = &lt;0 125 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart@e1020000 {</div><div class='add'>+		compatible = "renesas,em-uart";</div><div class='add'>+		reg = &lt;0xe1020000 0x38&gt;;</div><div class='add'>+		interrupts = &lt;0 8 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart@e1030000 {</div><div class='add'>+		compatible = "renesas,em-uart";</div><div class='add'>+		reg = &lt;0xe1030000 0x38&gt;;</div><div class='add'>+		interrupts = &lt;0 9 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart@e1040000 {</div><div class='add'>+		compatible = "renesas,em-uart";</div><div class='add'>+		reg = &lt;0xe1040000 0x38&gt;;</div><div class='add'>+		interrupts = &lt;0 10 0&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	uart@e1050000 {</div><div class='add'>+		compatible = "renesas,em-uart";</div><div class='add'>+		reg = &lt;0xe1050000 0x38&gt;;</div><div class='add'>+		interrupts = &lt;0 11 0&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/ethernut5.dts b/arch/arm/boot/dts/ethernut5.dts<br/>new file mode 100644<br/>index 000000000000..1ea9d34460a4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/ethernut5.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/ethernut5.dts</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+/*</div><div class='add'>+ * ethernut5.dts - Device Tree file for Ethernut 5 board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 egnite GmbH &lt;info@egnite.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "at91sam9260.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Ethernut 5";</div><div class='add'>+	compatible = "egnite,ethernut5", "atmel,at91sam9260", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200 root=/dev/mtdblock0 rw rootfstype=jffs2";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x08000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			dbgu: serial@fffff200 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart0: serial@fffb0000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart1: serial@fffb4000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			macb0: ethernet@fffc4000 {</div><div class='add'>+				phy-mode = "rmii";</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb1: gadget@fffa4000 {</div><div class='add'>+				atmel,vbus-gpio = &lt;&amp;pioC 5 0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			nand-bus-width = &lt;8&gt;;</div><div class='add'>+			nand-ecc-mode = "soft";</div><div class='add'>+			nand-on-flash-bbt;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			gpios = &lt;0</div><div class='add'>+				 &amp;pioC 14 0</div><div class='add'>+				 0</div><div class='add'>+				&gt;;</div><div class='add'>+</div><div class='add'>+			root@0 {</div><div class='add'>+				label = "root";</div><div class='add'>+				reg = &lt;0x0 0x08000000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			data@20000 {</div><div class='add'>+				label = "data";</div><div class='add'>+				reg = &lt;0x08000000 0x38000000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: ohci@00500000 {</div><div class='add'>+			num-ports = &lt;2&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		pcf8563@50 {</div><div class='add'>+			compatible = "nxp,pcf8563";</div><div class='add'>+			reg = &lt;0x51&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts<br/>index 399d17b231d2..49945cc1bc7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5250-smdk5250.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/exynos5250-smdk5250.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5250-smdk5250.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/exynos5250-smdk5250.dts</a></div><div class='hunk'>@@ -23,4 +23,52 @@</div><div class='ctx'> 	chosen {</div><div class='ctx'> 		bootargs = "root=/dev/ram0 rw ramdisk=8192 console=ttySAC1,115200";</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	i2c@12C60000 {</div><div class='add'>+		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+		samsung,i2c-max-bus-freq = &lt;20000&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpb3 0 2 3 0&gt;,</div><div class='add'>+			&lt;&amp;gpb3 1 2 3 0&gt;;</div><div class='add'>+</div><div class='add'>+		eeprom@50 {</div><div class='add'>+			compatible = "samsung,s524ad0xd1";</div><div class='add'>+			reg = &lt;0x50&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@12C70000 {</div><div class='add'>+		samsung,i2c-sda-delay = &lt;100&gt;;</div><div class='add'>+		samsung,i2c-max-bus-freq = &lt;20000&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpb3 2 2 3 0&gt;,</div><div class='add'>+			&lt;&amp;gpb3 3 2 3 0&gt;;</div><div class='add'>+</div><div class='add'>+		eeprom@51 {</div><div class='add'>+			compatible = "samsung,s524ad0xd1";</div><div class='add'>+			reg = &lt;0x51&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@12C80000 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@12C90000 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@12CA0000 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@12CB0000 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@12CC0000 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@12CD0000 {</div><div class='add'>+		status = "disabled";</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi<br/>index dfc433599436..4272b2949228 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5250.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/exynos5250.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/exynos5250.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/exynos5250.dtsi</a></div><div class='hunk'>@@ -23,11 +23,27 @@</div><div class='ctx'> 	compatible = "samsung,exynos5250";</div><div class='ctx'> 	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> </div><div class='del'>-	gic:interrupt-controller@10490000 {</div><div class='add'>+	gic:interrupt-controller@10481000 {</div><div class='ctx'> 		compatible = "arm,cortex-a9-gic";</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='del'>-		reg = &lt;0x10490000 0x1000&gt;, &lt;0x10480000 0x100&gt;;</div><div class='add'>+		reg = &lt;0x10481000 0x1000&gt;, &lt;0x10482000 0x2000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	combiner:interrupt-controller@10440000 {</div><div class='add'>+		compatible = "samsung,exynos4210-combiner";</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		samsung,combiner-nr = &lt;32&gt;;</div><div class='add'>+		reg = &lt;0x10440000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0 0 0&gt;, &lt;0 1 0&gt;, &lt;0 2 0&gt;, &lt;0 3 0&gt;,</div><div class='add'>+			     &lt;0 4 0&gt;, &lt;0 5 0&gt;, &lt;0 6 0&gt;, &lt;0 7 0&gt;,</div><div class='add'>+			     &lt;0 8 0&gt;, &lt;0 9 0&gt;, &lt;0 10 0&gt;, &lt;0 11 0&gt;,</div><div class='add'>+			     &lt;0 12 0&gt;, &lt;0 13 0&gt;, &lt;0 14 0&gt;, &lt;0 15 0&gt;,</div><div class='add'>+			     &lt;0 16 0&gt;, &lt;0 17 0&gt;, &lt;0 18 0&gt;, &lt;0 19 0&gt;,</div><div class='add'>+			     &lt;0 20 0&gt;, &lt;0 21 0&gt;, &lt;0 22 0&gt;, &lt;0 23 0&gt;,</div><div class='add'>+			     &lt;0 24 0&gt;, &lt;0 25 0&gt;, &lt;0 26 0&gt;, &lt;0 27 0&gt;,</div><div class='add'>+			     &lt;0 28 0&gt;, &lt;0 29 0&gt;, &lt;0 30 0&gt;, &lt;0 31 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	watchdog {</div><div class='hunk'>@@ -42,30 +58,6 @@</div><div class='ctx'> 		interrupts = &lt;0 43 0&gt;, &lt;0 44 0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@12200000 {</div><div class='del'>-		compatible = "samsung,exynos4210-sdhci";</div><div class='del'>-		reg = &lt;0x12200000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;0 75 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@12210000 {</div><div class='del'>-		compatible = "samsung,exynos4210-sdhci";</div><div class='del'>-		reg = &lt;0x12210000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;0 76 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@12220000 {</div><div class='del'>-		compatible = "samsung,exynos4210-sdhci";</div><div class='del'>-		reg = &lt;0x12220000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;0 77 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@12230000 {</div><div class='del'>-		compatible = "samsung,exynos4210-sdhci";</div><div class='del'>-		reg = &lt;0x12230000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;0 78 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	serial@12C00000 {</div><div class='ctx'> 		compatible = "samsung,exynos4210-uart";</div><div class='ctx'> 		reg = &lt;0x12C00000 0x100&gt;;</div><div class='hunk'>@@ -94,48 +86,64 @@</div><div class='ctx'> 		compatible = "samsung,s3c2440-i2c";</div><div class='ctx'> 		reg = &lt;0x12C60000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 56 0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@12C70000 {</div><div class='ctx'> 		compatible = "samsung,s3c2440-i2c";</div><div class='ctx'> 		reg = &lt;0x12C70000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 57 0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@12C80000 {</div><div class='ctx'> 		compatible = "samsung,s3c2440-i2c";</div><div class='ctx'> 		reg = &lt;0x12C80000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 58 0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@12C90000 {</div><div class='ctx'> 		compatible = "samsung,s3c2440-i2c";</div><div class='ctx'> 		reg = &lt;0x12C90000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 59 0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@12CA0000 {</div><div class='ctx'> 		compatible = "samsung,s3c2440-i2c";</div><div class='ctx'> 		reg = &lt;0x12CA0000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 60 0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@12CB0000 {</div><div class='ctx'> 		compatible = "samsung,s3c2440-i2c";</div><div class='ctx'> 		reg = &lt;0x12CB0000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 61 0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@12CC0000 {</div><div class='ctx'> 		compatible = "samsung,s3c2440-i2c";</div><div class='ctx'> 		reg = &lt;0x12CC0000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 62 0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@12CD0000 {</div><div class='ctx'> 		compatible = "samsung,s3c2440-i2c";</div><div class='ctx'> 		reg = &lt;0x12CD0000 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 63 0&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	amba {</div><div class='hunk'>@@ -157,13 +165,13 @@</div><div class='ctx'> 			interrupts = &lt;0 35 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mdma0: pdma@10800000 {</div><div class='add'>+		mdma0: mdma@10800000 {</div><div class='ctx'> 			compatible = "arm,pl330", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x10800000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 33 0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		mdma1: pdma@11C10000 {</div><div class='add'>+		mdma1: mdma@11C10000 {</div><div class='ctx'> 			compatible = "arm,pl330", "arm,primecell";</div><div class='ctx'> 			reg = &lt;0x11C10000 0x1000&gt;;</div><div class='ctx'> 			interrupts = &lt;0 124 0&gt;;</div><div class='hunk'>@@ -242,6 +250,12 @@</div><div class='ctx'> 			#gpio-cells = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpc4: gpio-controller@114002E0 {</div><div class='add'>+			compatible = "samsung,exynos4-gpio";</div><div class='add'>+			reg = &lt;0x114002E0 0x20&gt;;</div><div class='add'>+			#gpio-cells = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gpd0: gpio-controller@11400160 {</div><div class='ctx'> 			compatible = "samsung,exynos4-gpio";</div><div class='ctx'> 			reg = &lt;0x11400160 0x20&gt;;</div><div class='hunk'>@@ -388,19 +402,19 @@</div><div class='ctx'> </div><div class='ctx'> 		gpv2: gpio-controller@10D10040 {</div><div class='ctx'> 			compatible = "samsung,exynos4-gpio";</div><div class='del'>-			reg = &lt;0x10D10040 0x20&gt;;</div><div class='add'>+			reg = &lt;0x10D10060 0x20&gt;;</div><div class='ctx'> 			#gpio-cells = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpv3: gpio-controller@10D10060 {</div><div class='ctx'> 			compatible = "samsung,exynos4-gpio";</div><div class='del'>-			reg = &lt;0x10D10060 0x20&gt;;</div><div class='add'>+			reg = &lt;0x10D10080 0x20&gt;;</div><div class='ctx'> 			#gpio-cells = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		gpv4: gpio-controller@10D10080 {</div><div class='ctx'> 			compatible = "samsung,exynos4-gpio";</div><div class='del'>-			reg = &lt;0x10D10080 0x20&gt;;</div><div class='add'>+			reg = &lt;0x10D100C0 0x20&gt;;</div><div class='ctx'> 			#gpio-cells = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/imx23-evk.dts b/arch/arm/boot/dts/imx23-evk.dts<br/>new file mode 100644<br/>index 000000000000..70bffa929b65<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx23-evk.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx23-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "imx23.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Freescale i.MX23 Evaluation Kit";</div><div class='add'>+	compatible = "fsl,imx23-evk", "fsl,imx23";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x40000000 0x08000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	apb@80000000 {</div><div class='add'>+		apbh@80000000 {</div><div class='add'>+			ssp0: ssp@80010000 {</div><div class='add'>+				compatible = "fsl,imx23-mmc";</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;mmc0_8bit_pins_a &amp;mmc0_pins_fixup&gt;;</div><div class='add'>+				bus-width = &lt;8&gt;;</div><div class='add'>+				wp-gpios = &lt;&amp;gpio1 30 0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apbx@80040000 {</div><div class='add'>+			duart: serial@80070000 {</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;duart_pins_a&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi<br/>new file mode 100644<br/>index 000000000000..8c5f9994f3fc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx23.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx23.dtsi</a></div><div class='hunk'>@@ -0,0 +1,295 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;icoll&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		gpio0 = &amp;gpio0;</div><div class='add'>+		gpio1 = &amp;gpio1;</div><div class='add'>+		gpio2 = &amp;gpio2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,arm926ejs";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	apb@80000000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x80000000 0x80000&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		apbh@80000000 {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0x80000000 0x40000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			icoll: interrupt-controller@80000000 {</div><div class='add'>+				compatible = "fsl,imx23-icoll", "fsl,mxs-icoll";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0x80000000 0x2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dma-apbh@80004000 {</div><div class='add'>+				compatible = "fsl,imx23-dma-apbh";</div><div class='add'>+				reg = &lt;0x80004000 2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ecc@80008000 {</div><div class='add'>+				reg = &lt;0x80008000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bch@8000a000 {</div><div class='add'>+				reg = &lt;0x8000a000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpmi@8000c000 {</div><div class='add'>+				reg = &lt;0x8000c000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ssp0: ssp@80010000 {</div><div class='add'>+				reg = &lt;0x80010000 2000&gt;;</div><div class='add'>+				interrupts = &lt;15 14&gt;;</div><div class='add'>+				fsl,ssp-dma-channel = &lt;1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			etm@80014000 {</div><div class='add'>+				reg = &lt;0x80014000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pinctrl@80018000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx23-pinctrl", "simple-bus";</div><div class='add'>+				reg = &lt;0x80018000 2000&gt;;</div><div class='add'>+</div><div class='add'>+				gpio0: gpio@0 {</div><div class='add'>+					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";</div><div class='add'>+					interrupts = &lt;16&gt;;</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					interrupt-controller;</div><div class='add'>+					#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpio1: gpio@1 {</div><div class='add'>+					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";</div><div class='add'>+					interrupts = &lt;17&gt;;</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					interrupt-controller;</div><div class='add'>+					#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpio2: gpio@2 {</div><div class='add'>+					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";</div><div class='add'>+					interrupts = &lt;18&gt;;</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					interrupt-controller;</div><div class='add'>+					#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				duart_pins_a: duart@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					fsl,pinmux-ids = &lt;0x11a2 0x11b2&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;0&gt;;</div><div class='add'>+					fsl,voltage = &lt;1&gt;;</div><div class='add'>+					fsl,pull-up = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mmc0_8bit_pins_a: mmc0-8bit@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					fsl,pinmux-ids = &lt;0x2020 0x2030 0x2040</div><div class='add'>+						0x2050 0x0082 0x0092 0x00a2</div><div class='add'>+						0x00b2 0x2000 0x2010 0x2060&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;1&gt;;</div><div class='add'>+					fsl,voltage = &lt;1&gt;;</div><div class='add'>+					fsl,pull-up = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mmc0_pins_fixup: mmc0-pins-fixup {</div><div class='add'>+					fsl,pinmux-ids = &lt;0x2010 0x2060&gt;;</div><div class='add'>+					fsl,pull-up = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			digctl@8001c000 {</div><div class='add'>+				reg = &lt;0x8001c000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			emi@80020000 {</div><div class='add'>+				reg = &lt;0x80020000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dma-apbx@80024000 {</div><div class='add'>+				compatible = "fsl,imx23-dma-apbx";</div><div class='add'>+				reg = &lt;0x80024000 2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dcp@80028000 {</div><div class='add'>+				reg = &lt;0x80028000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pxp@8002a000 {</div><div class='add'>+				reg = &lt;0x8002a000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ocotp@8002c000 {</div><div class='add'>+				reg = &lt;0x8002c000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			axi-ahb@8002e000 {</div><div class='add'>+				reg = &lt;0x8002e000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lcdif@80030000 {</div><div class='add'>+				reg = &lt;0x80030000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ssp1: ssp@80034000 {</div><div class='add'>+				reg = &lt;0x80034000 2000&gt;;</div><div class='add'>+				interrupts = &lt;2 20&gt;;</div><div class='add'>+				fsl,ssp-dma-channel = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tvenc@80038000 {</div><div class='add'>+				reg = &lt;0x80038000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+		apbx@80040000 {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0x80040000 0x40000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			clkctl@80040000 {</div><div class='add'>+				reg = &lt;0x80040000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			saif0: saif@80042000 {</div><div class='add'>+				reg = &lt;0x80042000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power@80044000 {</div><div class='add'>+				reg = &lt;0x80044000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			saif1: saif@80046000 {</div><div class='add'>+				reg = &lt;0x80046000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			audio-out@80048000 {</div><div class='add'>+				reg = &lt;0x80048000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			audio-in@8004c000 {</div><div class='add'>+				reg = &lt;0x8004c000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lradc@80050000 {</div><div class='add'>+				reg = &lt;0x80050000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spdif@80054000 {</div><div class='add'>+				reg = &lt;0x80054000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c@80058000 {</div><div class='add'>+				reg = &lt;0x80058000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@8005c000 {</div><div class='add'>+				reg = &lt;0x8005c000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwm@80064000 {</div><div class='add'>+				reg = &lt;0x80064000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timrot@80068000 {</div><div class='add'>+				reg = &lt;0x80068000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			auart0: serial@8006c000 {</div><div class='add'>+				reg = &lt;0x8006c000 0x2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			auart1: serial@8006e000 {</div><div class='add'>+				reg = &lt;0x8006e000 0x2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			duart: serial@80070000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0x80070000 0x2000&gt;;</div><div class='add'>+				interrupts = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usbphy@8007c000 {</div><div class='add'>+				reg = &lt;0x8007c000 0x2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb@80080000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x80080000 0x80000&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		usbctrl@80080000 {</div><div class='add'>+			reg = &lt;0x80080000 0x10000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore.dts<br/>index a51a08fc2af9..2b0ff60247a4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx27-phytec-phycore.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/imx27-phytec-phycore.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx27-phytec-phycore.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx27-phytec-phycore.dts</a></div><div class='hunk'>@@ -27,22 +27,22 @@</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart@1000a000 {</div><div class='add'>+			serial@1000a000 {</div><div class='ctx'> 				fsl,uart-has-rtscts;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart@1000b000 {</div><div class='add'>+			serial@1000b000 {</div><div class='ctx'> 				fsl,uart-has-rtscts;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart@1000c000 {</div><div class='add'>+			serial@1000c000 {</div><div class='ctx'> 				fsl,uart-has-rtscts;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			fec@1002b000 {</div><div class='add'>+			ethernet@1002b000 {</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi<br/>index bc5e7d5ddd54..386c769c38d1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx27.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/imx27.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx27.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx27.dtsi</a></div><div class='hunk'>@@ -59,28 +59,28 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart1: uart@1000a000 {</div><div class='add'>+			uart1: serial@1000a000 {</div><div class='ctx'> 				compatible = "fsl,imx27-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x1000a000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;20&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart2: uart@1000b000 {</div><div class='add'>+			uart2: serial@1000b000 {</div><div class='ctx'> 				compatible = "fsl,imx27-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x1000b000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;19&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart3: uart@1000c000 {</div><div class='add'>+			uart3: serial@1000c000 {</div><div class='ctx'> 				compatible = "fsl,imx27-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x1000c000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;18&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart4: uart@1000d000 {</div><div class='add'>+			uart4: serial@1000d000 {</div><div class='ctx'> 				compatible = "fsl,imx27-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x1000d000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;17&gt;;</div><div class='hunk'>@@ -183,14 +183,14 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart5: uart@1001b000 {</div><div class='add'>+			uart5: serial@1001b000 {</div><div class='ctx'> 				compatible = "fsl,imx27-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x1001b000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;49&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart6: uart@1001c000 {</div><div class='add'>+			uart6: serial@1001c000 {</div><div class='ctx'> 				compatible = "fsl,imx27-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x1001c000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;48&gt;;</div><div class='hunk'>@@ -206,12 +206,21 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			fec: fec@1002b000 {</div><div class='add'>+			fec: ethernet@1002b000 {</div><div class='ctx'> 				compatible = "fsl,imx27-fec";</div><div class='ctx'> 				reg = &lt;0x1002b000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;50&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+		nand@d8000000 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			compatible = "fsl,imx27-nand";</div><div class='add'>+			reg = &lt;0xd8000000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;29&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts<br/>new file mode 100644<br/>index 000000000000..ee520a529cb4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx28-evk.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx28-evk.dts</a></div><div class='hunk'>@@ -0,0 +1,114 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "imx28.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Freescale i.MX28 Evaluation Kit";</div><div class='add'>+	compatible = "fsl,imx28-evk", "fsl,imx28";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x40000000 0x08000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	apb@80000000 {</div><div class='add'>+		apbh@80000000 {</div><div class='add'>+			ssp0: ssp@80010000 {</div><div class='add'>+				compatible = "fsl,imx28-mmc";</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;mmc0_8bit_pins_a</div><div class='add'>+					&amp;mmc0_cd_cfg &amp;mmc0_sck_cfg&gt;;</div><div class='add'>+				bus-width = &lt;8&gt;;</div><div class='add'>+				wp-gpios = &lt;&amp;gpio2 12 0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ssp1: ssp@80012000 {</div><div class='add'>+				compatible = "fsl,imx28-mmc";</div><div class='add'>+				bus-width = &lt;8&gt;;</div><div class='add'>+				wp-gpios = &lt;&amp;gpio0 28 0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apbx@80040000 {</div><div class='add'>+			saif0: saif@80042000 {</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;saif0_pins_a&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			saif1: saif@80046000 {</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;saif1_pins_a&gt;;</div><div class='add'>+				fsl,saif-master = &lt;&amp;saif0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@80058000 {</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;i2c0_pins_a&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+</div><div class='add'>+				sgtl5000: codec@0a {</div><div class='add'>+					compatible = "fsl,sgtl5000";</div><div class='add'>+					reg = &lt;0x0a&gt;;</div><div class='add'>+					VDDA-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+					VDDIO-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			duart: serial@80074000 {</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;duart_pins_a&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb@80080000 {</div><div class='add'>+		mac0: ethernet@800f0000 {</div><div class='add'>+			phy-mode = "rmii";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;mac0_pins_a&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mac1: ethernet@800f4000 {</div><div class='add'>+			phy-mode = "rmii";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;mac1_pins_a&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+		reg_3p3v: 3p3v {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			regulator-name = "3P3V";</div><div class='add'>+			regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "fsl,imx28-evk-sgtl5000",</div><div class='add'>+			     "fsl,mxs-audio-sgtl5000";</div><div class='add'>+		model = "imx28-evk-sgtl5000";</div><div class='add'>+		saif-controllers = &lt;&amp;saif0 &amp;saif1&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;sgtl5000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi<br/>new file mode 100644<br/>index 000000000000..4634cb861a59<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx28.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx28.dtsi</a></div><div class='hunk'>@@ -0,0 +1,497 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;icoll&gt;;</div><div class='add'>+</div><div class='add'>+	aliases {</div><div class='add'>+		gpio0 = &amp;gpio0;</div><div class='add'>+		gpio1 = &amp;gpio1;</div><div class='add'>+		gpio2 = &amp;gpio2;</div><div class='add'>+		gpio3 = &amp;gpio3;</div><div class='add'>+		gpio4 = &amp;gpio4;</div><div class='add'>+		saif0 = &amp;saif0;</div><div class='add'>+		saif1 = &amp;saif1;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,arm926ejs";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	apb@80000000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x80000000 0x80000&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		apbh@80000000 {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0x80000000 0x3c900&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			icoll: interrupt-controller@80000000 {</div><div class='add'>+				compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0x80000000 0x2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			hsadc@80002000 {</div><div class='add'>+				reg = &lt;0x80002000 2000&gt;;</div><div class='add'>+				interrupts = &lt;13 87&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dma-apbh@80004000 {</div><div class='add'>+				compatible = "fsl,imx28-dma-apbh";</div><div class='add'>+				reg = &lt;0x80004000 2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			perfmon@80006000 {</div><div class='add'>+				reg = &lt;0x80006000 800&gt;;</div><div class='add'>+				interrupts = &lt;27&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bch@8000a000 {</div><div class='add'>+				reg = &lt;0x8000a000 2000&gt;;</div><div class='add'>+				interrupts = &lt;41&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpmi@8000c000 {</div><div class='add'>+				reg = &lt;0x8000c000 2000&gt;;</div><div class='add'>+				interrupts = &lt;42 88&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ssp0: ssp@80010000 {</div><div class='add'>+				reg = &lt;0x80010000 2000&gt;;</div><div class='add'>+				interrupts = &lt;96 82&gt;;</div><div class='add'>+				fsl,ssp-dma-channel = &lt;0&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ssp1: ssp@80012000 {</div><div class='add'>+				reg = &lt;0x80012000 2000&gt;;</div><div class='add'>+				interrupts = &lt;97 83&gt;;</div><div class='add'>+				fsl,ssp-dma-channel = &lt;1&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ssp2: ssp@80014000 {</div><div class='add'>+				reg = &lt;0x80014000 2000&gt;;</div><div class='add'>+				interrupts = &lt;98 84&gt;;</div><div class='add'>+				fsl,ssp-dma-channel = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ssp3: ssp@80016000 {</div><div class='add'>+				reg = &lt;0x80016000 2000&gt;;</div><div class='add'>+				interrupts = &lt;99 85&gt;;</div><div class='add'>+				fsl,ssp-dma-channel = &lt;3&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pinctrl@80018000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx28-pinctrl", "simple-bus";</div><div class='add'>+				reg = &lt;0x80018000 2000&gt;;</div><div class='add'>+</div><div class='add'>+				gpio0: gpio@0 {</div><div class='add'>+					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";</div><div class='add'>+					interrupts = &lt;127&gt;;</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					interrupt-controller;</div><div class='add'>+					#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpio1: gpio@1 {</div><div class='add'>+					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";</div><div class='add'>+					interrupts = &lt;126&gt;;</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					interrupt-controller;</div><div class='add'>+					#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpio2: gpio@2 {</div><div class='add'>+					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";</div><div class='add'>+					interrupts = &lt;125&gt;;</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					interrupt-controller;</div><div class='add'>+					#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpio3: gpio@3 {</div><div class='add'>+					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";</div><div class='add'>+					interrupts = &lt;124&gt;;</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					interrupt-controller;</div><div class='add'>+					#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gpio4: gpio@4 {</div><div class='add'>+					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";</div><div class='add'>+					interrupts = &lt;123&gt;;</div><div class='add'>+					gpio-controller;</div><div class='add'>+					#gpio-cells = &lt;2&gt;;</div><div class='add'>+					interrupt-controller;</div><div class='add'>+					#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				duart_pins_a: duart@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					fsl,pinmux-ids = &lt;0x3102 0x3112&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;0&gt;;</div><div class='add'>+					fsl,voltage = &lt;1&gt;;</div><div class='add'>+					fsl,pull-up = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mac0_pins_a: mac0@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					fsl,pinmux-ids = &lt;0x4000 0x4010 0x4020</div><div class='add'>+						0x4030 0x4040 0x4060 0x4070</div><div class='add'>+						0x4080 0x4100&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;1&gt;;</div><div class='add'>+					fsl,voltage = &lt;1&gt;;</div><div class='add'>+					fsl,pull-up = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mac1_pins_a: mac1@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					fsl,pinmux-ids = &lt;0x40f1 0x4091 0x40a1</div><div class='add'>+						0x40e1 0x40b1 0x40c1&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;1&gt;;</div><div class='add'>+					fsl,voltage = &lt;1&gt;;</div><div class='add'>+					fsl,pull-up = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mmc0_8bit_pins_a: mmc0-8bit@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					fsl,pinmux-ids = &lt;0x2000 0x2010 0x2020</div><div class='add'>+						0x2030 0x2040 0x2050 0x2060</div><div class='add'>+						0x2070 0x2080 0x2090 0x20a0&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;1&gt;;</div><div class='add'>+					fsl,voltage = &lt;1&gt;;</div><div class='add'>+					fsl,pull-up = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mmc0_cd_cfg: mmc0-cd-cfg {</div><div class='add'>+					fsl,pinmux-ids = &lt;0x2090&gt;;</div><div class='add'>+					fsl,pull-up = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				mmc0_sck_cfg: mmc0-sck-cfg {</div><div class='add'>+					fsl,pinmux-ids = &lt;0x20a0&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;2&gt;;</div><div class='add'>+					fsl,pull-up = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c0_pins_a: i2c0@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					fsl,pinmux-ids = &lt;0x3180 0x3190&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;1&gt;;</div><div class='add'>+					fsl,voltage = &lt;1&gt;;</div><div class='add'>+					fsl,pull-up = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				saif0_pins_a: saif0@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					fsl,pinmux-ids =</div><div class='add'>+						&lt;0x3140 0x3150 0x3160 0x3170&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;2&gt;;</div><div class='add'>+					fsl,voltage = &lt;1&gt;;</div><div class='add'>+					fsl,pull-up = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				saif1_pins_a: saif1@0 {</div><div class='add'>+					reg = &lt;0&gt;;</div><div class='add'>+					fsl,pinmux-ids = &lt;0x31a0&gt;;</div><div class='add'>+					fsl,drive-strength = &lt;2&gt;;</div><div class='add'>+					fsl,voltage = &lt;1&gt;;</div><div class='add'>+					fsl,pull-up = &lt;1&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			digctl@8001c000 {</div><div class='add'>+				reg = &lt;0x8001c000 2000&gt;;</div><div class='add'>+				interrupts = &lt;89&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			etm@80022000 {</div><div class='add'>+				reg = &lt;0x80022000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dma-apbx@80024000 {</div><div class='add'>+				compatible = "fsl,imx28-dma-apbx";</div><div class='add'>+				reg = &lt;0x80024000 2000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			dcp@80028000 {</div><div class='add'>+				reg = &lt;0x80028000 2000&gt;;</div><div class='add'>+				interrupts = &lt;52 53 54&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pxp@8002a000 {</div><div class='add'>+				reg = &lt;0x8002a000 2000&gt;;</div><div class='add'>+				interrupts = &lt;39&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ocotp@8002c000 {</div><div class='add'>+				reg = &lt;0x8002c000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			axi-ahb@8002e000 {</div><div class='add'>+				reg = &lt;0x8002e000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lcdif@80030000 {</div><div class='add'>+				reg = &lt;0x80030000 2000&gt;;</div><div class='add'>+				interrupts = &lt;38 86&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			can0: can@80032000 {</div><div class='add'>+				reg = &lt;0x80032000 2000&gt;;</div><div class='add'>+				interrupts = &lt;8&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			can1: can@80034000 {</div><div class='add'>+				reg = &lt;0x80034000 2000&gt;;</div><div class='add'>+				interrupts = &lt;9&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			simdbg@8003c000 {</div><div class='add'>+				reg = &lt;0x8003c000 200&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			simgpmisel@8003c200 {</div><div class='add'>+				reg = &lt;0x8003c200 100&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			simsspsel@8003c300 {</div><div class='add'>+				reg = &lt;0x8003c300 100&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			simmemsel@8003c400 {</div><div class='add'>+				reg = &lt;0x8003c400 100&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpiomon@8003c500 {</div><div class='add'>+				reg = &lt;0x8003c500 100&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			simenet@8003c700 {</div><div class='add'>+				reg = &lt;0x8003c700 100&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			armjtag@8003c800 {</div><div class='add'>+				reg = &lt;0x8003c800 100&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+		apbx@80040000 {</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0x80040000 0x40000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			clkctl@80040000 {</div><div class='add'>+				reg = &lt;0x80040000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			saif0: saif@80042000 {</div><div class='add'>+				compatible = "fsl,imx28-saif";</div><div class='add'>+				reg = &lt;0x80042000 2000&gt;;</div><div class='add'>+				interrupts = &lt;59 80&gt;;</div><div class='add'>+				fsl,saif-dma-channel = &lt;4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			power@80044000 {</div><div class='add'>+				reg = &lt;0x80044000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			saif1: saif@80046000 {</div><div class='add'>+				compatible = "fsl,imx28-saif";</div><div class='add'>+				reg = &lt;0x80046000 2000&gt;;</div><div class='add'>+				interrupts = &lt;58 81&gt;;</div><div class='add'>+				fsl,saif-dma-channel = &lt;5&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			lradc@80050000 {</div><div class='add'>+				reg = &lt;0x80050000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spdif@80054000 {</div><div class='add'>+				reg = &lt;0x80054000 2000&gt;;</div><div class='add'>+				interrupts = &lt;45 66&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@80056000 {</div><div class='add'>+				reg = &lt;0x80056000 2000&gt;;</div><div class='add'>+				interrupts = &lt;28 29&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@80058000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx28-i2c";</div><div class='add'>+				reg = &lt;0x80058000 2000&gt;;</div><div class='add'>+				interrupts = &lt;111 68&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@8005a000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "fsl,imx28-i2c";</div><div class='add'>+				reg = &lt;0x8005a000 2000&gt;;</div><div class='add'>+				interrupts = &lt;110 69&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			pwm@80064000 {</div><div class='add'>+				reg = &lt;0x80064000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timrot@80068000 {</div><div class='add'>+				reg = &lt;0x80068000 2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			auart0: serial@8006a000 {</div><div class='add'>+				reg = &lt;0x8006a000 0x2000&gt;;</div><div class='add'>+				interrupts = &lt;112 70 71&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			auart1: serial@8006c000 {</div><div class='add'>+				reg = &lt;0x8006c000 0x2000&gt;;</div><div class='add'>+				interrupts = &lt;113 72 73&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			auart2: serial@8006e000 {</div><div class='add'>+				reg = &lt;0x8006e000 0x2000&gt;;</div><div class='add'>+				interrupts = &lt;114 74 75&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			auart3: serial@80070000 {</div><div class='add'>+				reg = &lt;0x80070000 0x2000&gt;;</div><div class='add'>+				interrupts = &lt;115 76 77&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			auart4: serial@80072000 {</div><div class='add'>+				reg = &lt;0x80072000 0x2000&gt;;</div><div class='add'>+				interrupts = &lt;116 78 79&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			duart: serial@80074000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0x80074000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;47&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usbphy0: usbphy@8007c000 {</div><div class='add'>+				reg = &lt;0x8007c000 0x2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usbphy1: usbphy@8007e000 {</div><div class='add'>+				reg = &lt;0x8007e000 0x2000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb@80080000 {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		reg = &lt;0x80080000 0x80000&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		usbctrl0: usbctrl@80080000 {</div><div class='add'>+			reg = &lt;0x80080000 0x10000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbctrl1: usbctrl@80090000 {</div><div class='add'>+			reg = &lt;0x80090000 0x10000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dflpt@800c0000 {</div><div class='add'>+			reg = &lt;0x800c0000 0x10000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mac0: ethernet@800f0000 {</div><div class='add'>+			compatible = "fsl,imx28-fec";</div><div class='add'>+			reg = &lt;0x800f0000 0x4000&gt;;</div><div class='add'>+			interrupts = &lt;101&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mac1: ethernet@800f4000 {</div><div class='add'>+			compatible = "fsl,imx28-fec";</div><div class='add'>+			reg = &lt;0x800f4000 0x4000&gt;;</div><div class='add'>+			interrupts = &lt;102&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		switch@800f8000 {</div><div class='add'>+			reg = &lt;0x800f8000 0x8000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts<br/>index 9949e6060dee..de065b5976e6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx51-babbage.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/imx51-babbage.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx51-babbage.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx51-babbage.dts</a></div><div class='hunk'>@@ -17,10 +17,6 @@</div><div class='ctx'> 	model = "Freescale i.MX51 Babbage Board";</div><div class='ctx'> 	compatible = "fsl,imx51-babbage", "fsl,imx51";</div><div class='ctx'> </div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	memory {</div><div class='ctx'> 		reg = &lt;0x90000000 0x20000000&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -40,7 +36,7 @@</div><div class='ctx'> 					status = "okay";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				uart3: uart@7000c000 {</div><div class='add'>+				uart3: serial@7000c000 {</div><div class='ctx'> 					fsl,uart-has-rtscts;</div><div class='ctx'> 					status = "okay";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -166,6 +162,11 @@</div><div class='ctx'> 						};</div><div class='ctx'> 					};</div><div class='ctx'> 				};</div><div class='add'>+</div><div class='add'>+				ssi2: ssi@70014000 {</div><div class='add'>+					fsl,mode = "i2s-slave";</div><div class='add'>+					status = "okay";</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			wdog@73f98000 { /* WDOG1 */</div><div class='hunk'>@@ -177,12 +178,12 @@</div><div class='ctx'> 				reg = &lt;0x73fa8000 0x4000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart1: uart@73fbc000 {</div><div class='add'>+			uart1: serial@73fbc000 {</div><div class='ctx'> 				fsl,uart-has-rtscts;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart2: uart@73fc0000 {</div><div class='add'>+			uart2: serial@73fc0000 {</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -195,13 +196,20 @@</div><div class='ctx'> 			i2c@83fc4000 { /* I2C2 */</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> </div><div class='del'>-				codec: sgtl5000@0a {</div><div class='add'>+				sgtl5000: codec@0a {</div><div class='ctx'> 					compatible = "fsl,sgtl5000";</div><div class='ctx'> 					reg = &lt;0x0a&gt;;</div><div class='add'>+					clock-frequency = &lt;26000000&gt;;</div><div class='add'>+					VDDA-supply = &lt;&amp;vdig_reg&gt;;</div><div class='add'>+					VDDIO-supply = &lt;&amp;vvideo_reg&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			fec@83fec000 {</div><div class='add'>+			audmux@83fd0000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethernet@83fec000 {</div><div class='ctx'> 				phy-mode = "mii";</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='hunk'>@@ -218,4 +226,18 @@</div><div class='ctx'> 			gpio-key,wakeup;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "fsl,imx51-babbage-sgtl5000",</div><div class='add'>+			     "fsl,imx-audio-sgtl5000";</div><div class='add'>+		model = "imx51-babbage-sgtl5000";</div><div class='add'>+		ssi-controller = &lt;&amp;ssi2&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;sgtl5000&gt;;</div><div class='add'>+		audio-routing =</div><div class='add'>+			"MIC_IN", "Mic Jack",</div><div class='add'>+			"Mic Jack", "Mic Bias",</div><div class='add'>+			"Headphone Jack", "HP_OUT";</div><div class='add'>+		mux-int-port = &lt;2&gt;;</div><div class='add'>+		mux-ext-port = &lt;3&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi<br/>index 6663986fe1c8..bfa65abe8ef2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx51.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/imx51.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx51.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx51.dtsi</a></div><div class='hunk'>@@ -86,7 +86,7 @@</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				uart3: uart@7000c000 {</div><div class='add'>+				uart3: serial@7000c000 {</div><div class='ctx'> 					compatible = "fsl,imx51-uart", "fsl,imx21-uart";</div><div class='ctx'> 					reg = &lt;0x7000c000 0x4000&gt;;</div><div class='ctx'> 					interrupts = &lt;33&gt;;</div><div class='hunk'>@@ -102,6 +102,15 @@</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='add'>+				ssi2: ssi@70014000 {</div><div class='add'>+					compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";</div><div class='add'>+					reg = &lt;0x70014000 0x4000&gt;;</div><div class='add'>+					interrupts = &lt;30&gt;;</div><div class='add'>+					fsl,fifo-depth = &lt;15&gt;;</div><div class='add'>+					fsl,ssi-dma-events = &lt;25 24 23 22&gt;; /* TX0 RX0 TX1 RX1 */</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				esdhc@70020000 { /* ESDHC3 */</div><div class='ctx'> 					compatible = "fsl,imx51-esdhc";</div><div class='ctx'> 					reg = &lt;0x70020000 0x4000&gt;;</div><div class='hunk'>@@ -171,14 +180,14 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart1: uart@73fbc000 {</div><div class='add'>+			uart1: serial@73fbc000 {</div><div class='ctx'> 				compatible = "fsl,imx51-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x73fbc000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;31&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart2: uart@73fc0000 {</div><div class='add'>+			uart2: serial@73fc0000 {</div><div class='ctx'> 				compatible = "fsl,imx51-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x73fc0000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;32&gt;;</div><div class='hunk'>@@ -235,7 +244,31 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			fec@83fec000 {</div><div class='add'>+			ssi1: ssi@83fcc000 {</div><div class='add'>+				compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";</div><div class='add'>+				reg = &lt;0x83fcc000 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;29&gt;;</div><div class='add'>+				fsl,fifo-depth = &lt;15&gt;;</div><div class='add'>+				fsl,ssi-dma-events = &lt;29 28 27 26&gt;; /* TX0 RX0 TX1 RX1 */</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			audmux@83fd0000 {</div><div class='add'>+				compatible = "fsl,imx51-audmux", "fsl,imx31-audmux";</div><div class='add'>+				reg = &lt;0x83fd0000 0x4000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ssi3: ssi@83fe8000 {</div><div class='add'>+				compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";</div><div class='add'>+				reg = &lt;0x83fe8000 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;96&gt;;</div><div class='add'>+				fsl,fifo-depth = &lt;15&gt;;</div><div class='add'>+				fsl,ssi-dma-events = &lt;47 46 37 35&gt;; /* TX0 RX0 TX1 RX1 */</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethernet@83fec000 {</div><div class='ctx'> 				compatible = "fsl,imx51-fec", "fsl,imx27-fec";</div><div class='ctx'> 				reg = &lt;0x83fec000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;87&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts<br/>index 2dccce46ed81..5b8eafcdbeec 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx53-ard.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/imx53-ard.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx53-ard.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx53-ard.dts</a></div><div class='hunk'>@@ -17,10 +17,6 @@</div><div class='ctx'> 	model = "Freescale i.MX53 Automotive Reference Design Board";</div><div class='ctx'> 	compatible = "fsl,imx53-ard", "fsl,imx53";</div><div class='ctx'> </div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	memory {</div><div class='ctx'> 		reg = &lt;0x70000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -44,7 +40,7 @@</div><div class='ctx'> 				reg = &lt;0x53fa8000 0x4000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart1: uart@53fbc000 {</div><div class='add'>+			uart1: serial@53fbc000 {</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts<br/>index 5bac4aa4800b..9c798034675e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx53-evk.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/imx53-evk.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx53-evk.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx53-evk.dts</a></div><div class='hunk'>@@ -17,10 +17,6 @@</div><div class='ctx'> 	model = "Freescale i.MX53 Evaluation Kit";</div><div class='ctx'> 	compatible = "fsl,imx53-evk", "fsl,imx53";</div><div class='ctx'> </div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	memory {</div><div class='ctx'> 		reg = &lt;0x70000000 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -75,7 +71,7 @@</div><div class='ctx'> 				reg = &lt;0x53fa8000 0x4000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart1: uart@53fbc000 {</div><div class='add'>+			uart1: serial@53fbc000 {</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -99,7 +95,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			fec@63fec000 {</div><div class='add'>+			ethernet@63fec000 {</div><div class='ctx'> 				phy-mode = "rmii";</div><div class='ctx'> 				phy-reset-gpios = &lt;&amp;gpio7 6 0&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts<br/>index 5c57c8672c36..2d803a9a6949 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx53-qsb.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/imx53-qsb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx53-qsb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx53-qsb.dts</a></div><div class='hunk'>@@ -17,10 +17,6 @@</div><div class='ctx'> 	model = "Freescale i.MX53 Quick Start Board";</div><div class='ctx'> 	compatible = "fsl,imx53-qsb", "fsl,imx53";</div><div class='ctx'> </div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	memory {</div><div class='ctx'> 		reg = &lt;0x70000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -33,6 +29,11 @@</div><div class='ctx'> 					status = "okay";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='add'>+				ssi2: ssi@50014000 {</div><div class='add'>+					fsl,mode = "i2s-slave";</div><div class='add'>+					status = "okay";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				esdhc@50020000 { /* ESDHC3 */</div><div class='ctx'> 					cd-gpios = &lt;&amp;gpio3 11 0&gt;;</div><div class='ctx'> 					wp-gpios = &lt;&amp;gpio3 12 0&gt;;</div><div class='hunk'>@@ -49,7 +50,7 @@</div><div class='ctx'> 				reg = &lt;0x53fa8000 0x4000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart1: uart@53fbc000 {</div><div class='add'>+			uart1: serial@53fbc000 {</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -62,9 +63,11 @@</div><div class='ctx'> 			i2c@63fc4000 { /* I2C2 */</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> </div><div class='del'>-				codec: sgtl5000@0a {</div><div class='add'>+				sgtl5000: codec@0a {</div><div class='ctx'> 					compatible = "fsl,sgtl5000";</div><div class='ctx'> 					reg = &lt;0x0a&gt;;</div><div class='add'>+					VDDA-supply = &lt;&amp;reg_3p2v&gt;;</div><div class='add'>+					VDDIO-supply = &lt;&amp;reg_3p2v&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -77,12 +80,88 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				pmic: dialog@48 {</div><div class='del'>-					compatible = "dialog,da9053", "dialog,da9052";</div><div class='add'>+					compatible = "dlg,da9053-aa", "dlg,da9052";</div><div class='ctx'> 					reg = &lt;0x48&gt;;</div><div class='add'>+</div><div class='add'>+					regulators {</div><div class='add'>+						buck0 {</div><div class='add'>+							regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+							regulator-max-microvolt = &lt;2075000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						buck1 {</div><div class='add'>+							regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+							regulator-max-microvolt = &lt;2075000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						buck2 {</div><div class='add'>+							regulator-min-microvolt = &lt;925000&gt;;</div><div class='add'>+					                regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						buck3 {</div><div class='add'>+							regulator-min-microvolt = &lt;925000&gt;;</div><div class='add'>+					                regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						ldo4 {</div><div class='add'>+							regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+							regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						ldo5 {</div><div class='add'>+							regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+					                regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						ldo6 {</div><div class='add'>+							regulator-min-microvolt = &lt;1725000&gt;;</div><div class='add'>+					                regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						ldo7 {</div><div class='add'>+							regulator-min-microvolt = &lt;1725000&gt;;</div><div class='add'>+					                regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						ldo8 {</div><div class='add'>+							regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					                regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						ldo9 {</div><div class='add'>+							regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					                regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						ldo10 {</div><div class='add'>+							regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					                regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						ldo11 {</div><div class='add'>+							regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					                regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						ldo12 {</div><div class='add'>+							regulator-min-microvolt = &lt;1250000&gt;;</div><div class='add'>+					                regulator-max-microvolt = &lt;3650000&gt;;</div><div class='add'>+						};</div><div class='add'>+</div><div class='add'>+						ldo13 {</div><div class='add'>+							regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+					                regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+						};</div><div class='add'>+					};</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			fec@63fec000 {</div><div class='add'>+			audmux@63fd0000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethernet@63fec000 {</div><div class='ctx'> 				phy-mode = "rmii";</div><div class='ctx'> 				phy-reset-gpios = &lt;&amp;gpio7 6 0&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='hunk'>@@ -122,4 +201,30 @@</div><div class='ctx'> 			linux,default-trigger = "heartbeat";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	regulators {</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+		reg_3p2v: 3p2v {</div><div class='add'>+			compatible = "regulator-fixed";</div><div class='add'>+			regulator-name = "3P2V";</div><div class='add'>+			regulator-min-microvolt = &lt;3200000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "fsl,imx53-qsb-sgtl5000",</div><div class='add'>+			     "fsl,imx-audio-sgtl5000";</div><div class='add'>+		model = "imx53-qsb-sgtl5000";</div><div class='add'>+		ssi-controller = &lt;&amp;ssi2&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;sgtl5000&gt;;</div><div class='add'>+		audio-routing =</div><div class='add'>+			"MIC_IN", "Mic Jack",</div><div class='add'>+			"Mic Jack", "Mic Bias",</div><div class='add'>+			"Headphone Jack", "HP_OUT";</div><div class='add'>+		mux-int-port = &lt;2&gt;;</div><div class='add'>+		mux-ext-port = &lt;5&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts<br/>index c7ee86c2dfb5..08091029168e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx53-smd.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/imx53-smd.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx53-smd.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx53-smd.dts</a></div><div class='hunk'>@@ -17,10 +17,6 @@</div><div class='ctx'> 	model = "Freescale i.MX53 Smart Mobile Reference Design Board";</div><div class='ctx'> 	compatible = "fsl,imx53-smd", "fsl,imx53";</div><div class='ctx'> </div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	memory {</div><div class='ctx'> 		reg = &lt;0x70000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='hunk'>@@ -35,11 +31,11 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				esdhc@50008000 { /* ESDHC2 */</div><div class='del'>-					fsl,card-wired;</div><div class='add'>+					non-removable;</div><div class='ctx'> 					status = "okay";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				uart3: uart@5000c000 {</div><div class='add'>+				uart3: serial@5000c000 {</div><div class='ctx'> 					fsl,uart-has-rtscts;</div><div class='ctx'> 					status = "okay";</div><div class='ctx'> 				};</div><div class='hunk'>@@ -76,7 +72,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				esdhc@50020000 { /* ESDHC3 */</div><div class='del'>-					fsl,card-wired;</div><div class='add'>+					non-removable;</div><div class='ctx'> 					status = "okay";</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='hunk'>@@ -90,11 +86,11 @@</div><div class='ctx'> 				reg = &lt;0x53fa8000 0x4000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart1: uart@53fbc000 {</div><div class='add'>+			uart1: serial@53fbc000 {</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart2: uart@53fc0000 {</div><div class='add'>+			uart2: serial@53fc0000 {</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='hunk'>@@ -142,7 +138,7 @@</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			fec@63fec000 {</div><div class='add'>+			ethernet@63fec000 {</div><div class='ctx'> 				phy-mode = "rmii";</div><div class='ctx'> 				phy-reset-gpios = &lt;&amp;gpio7 6 0&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi<br/>index 5dd91b942c91..e3e869470cd3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx53.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/imx53.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx53.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx53.dtsi</a></div><div class='hunk'>@@ -88,7 +88,7 @@</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				uart3: uart@5000c000 {</div><div class='add'>+				uart3: serial@5000c000 {</div><div class='ctx'> 					compatible = "fsl,imx53-uart", "fsl,imx21-uart";</div><div class='ctx'> 					reg = &lt;0x5000c000 0x4000&gt;;</div><div class='ctx'> 					interrupts = &lt;33&gt;;</div><div class='hunk'>@@ -104,6 +104,15 @@</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='add'>+				ssi2: ssi@50014000 {</div><div class='add'>+					compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";</div><div class='add'>+					reg = &lt;0x50014000 0x4000&gt;;</div><div class='add'>+					interrupts = &lt;30&gt;;</div><div class='add'>+					fsl,fifo-depth = &lt;15&gt;;</div><div class='add'>+					fsl,ssi-dma-events = &lt;25 24 23 22&gt;; /* TX0 RX0 TX1 RX1 */</div><div class='add'>+					status = "disabled";</div><div class='add'>+				};</div><div class='add'>+</div><div class='ctx'> 				esdhc@50020000 { /* ESDHC3 */</div><div class='ctx'> 					compatible = "fsl,imx53-esdhc";</div><div class='ctx'> 					reg = &lt;0x50020000 0x4000&gt;;</div><div class='hunk'>@@ -173,14 +182,14 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart1: uart@53fbc000 {</div><div class='add'>+			uart1: serial@53fbc000 {</div><div class='ctx'> 				compatible = "fsl,imx53-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x53fbc000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;31&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart2: uart@53fc0000 {</div><div class='add'>+			uart2: serial@53fc0000 {</div><div class='ctx'> 				compatible = "fsl,imx53-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x53fc0000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;32&gt;;</div><div class='hunk'>@@ -226,7 +235,7 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart4: uart@53ff0000 {</div><div class='add'>+			uart4: serial@53ff0000 {</div><div class='ctx'> 				compatible = "fsl,imx53-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x53ff0000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;13&gt;;</div><div class='hunk'>@@ -241,7 +250,7 @@</div><div class='ctx'> 			reg = &lt;0x60000000 0x10000000&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='del'>-			uart5: uart@63f90000 {</div><div class='add'>+			uart5: serial@63f90000 {</div><div class='ctx'> 				compatible = "fsl,imx53-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x63f90000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;86&gt;;</div><div class='hunk'>@@ -290,7 +299,31 @@</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			fec@63fec000 {</div><div class='add'>+			ssi1: ssi@63fcc000 {</div><div class='add'>+				compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";</div><div class='add'>+				reg = &lt;0x63fcc000 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;29&gt;;</div><div class='add'>+				fsl,fifo-depth = &lt;15&gt;;</div><div class='add'>+				fsl,ssi-dma-events = &lt;29 28 27 26&gt;; /* TX0 RX0 TX1 RX1 */</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			audmux@63fd0000 {</div><div class='add'>+				compatible = "fsl,imx53-audmux", "fsl,imx31-audmux";</div><div class='add'>+				reg = &lt;0x63fd0000 0x4000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ssi3: ssi@63fe8000 {</div><div class='add'>+				compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";</div><div class='add'>+				reg = &lt;0x63fe8000 0x4000&gt;;</div><div class='add'>+				interrupts = &lt;96&gt;;</div><div class='add'>+				fsl,fifo-depth = &lt;15&gt;;</div><div class='add'>+				fsl,ssi-dma-events = &lt;47 46 45 44&gt;; /* TX0 RX0 TX1 RX1 */</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ethernet@63fec000 {</div><div class='ctx'> 				compatible = "fsl,imx53-fec", "fsl,imx25-fec";</div><div class='ctx'> 				reg = &lt;0x63fec000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;87&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts<br/>index ce1c8238c897..db4c6096c562 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q-arm2.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/imx6q-arm2.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q-arm2.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx6q-arm2.dts</a></div><div class='hunk'>@@ -17,19 +17,14 @@</div><div class='ctx'> 	model = "Freescale i.MX6 Quad Armadillo2 Board";</div><div class='ctx'> 	compatible = "fsl,imx6q-arm2", "fsl,imx6q";</div><div class='ctx'> </div><div class='del'>-	chosen {</div><div class='del'>-		bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait";</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	memory {</div><div class='ctx'> 		reg = &lt;0x10000000 0x80000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	soc {</div><div class='ctx'> 		aips-bus@02100000 { /* AIPS2 */</div><div class='del'>-			enet@02188000 {</div><div class='add'>+			ethernet@02188000 {</div><div class='ctx'> 				phy-mode = "rgmii";</div><div class='del'>-				local-mac-address = [00 04 9F 01 1B 61];</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -37,16 +32,20 @@</div><div class='ctx'> 				cd-gpios = &lt;&amp;gpio6 11 0&gt;;</div><div class='ctx'> 				wp-gpios = &lt;&amp;gpio6 14 0&gt;;</div><div class='ctx'> 				vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_usdhc3_1&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			usdhc@0219c000 { /* uSDHC4 */</div><div class='del'>-				fsl,card-wired;</div><div class='add'>+				non-removable;</div><div class='ctx'> 				vmmc-supply = &lt;&amp;reg_3p3v&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_usdhc4_1&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart4: uart@021f0000 {</div><div class='add'>+			uart4: serial@021f0000 {</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts<br/>index 4663a4e5a285..e0ec92973e7e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q-sabrelite.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/imx6q-sabrelite.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q-sabrelite.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx6q-sabrelite.dts</a></div><div class='hunk'>@@ -22,8 +22,30 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	soc {</div><div class='add'>+		aips-bus@02000000 { /* AIPS1 */</div><div class='add'>+			spba-bus@02000000 {</div><div class='add'>+				ecspi@02008000 { /* eCSPI1 */</div><div class='add'>+					fsl,spi-num-chipselects = &lt;1&gt;;</div><div class='add'>+					cs-gpios = &lt;&amp;gpio3 19 0&gt;;</div><div class='add'>+					status = "okay";</div><div class='add'>+</div><div class='add'>+					flash: m25p80@0 {</div><div class='add'>+						compatible = "sst,sst25vf016b";</div><div class='add'>+						spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+						reg = &lt;0&gt;;</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				ssi1: ssi@02028000 {</div><div class='add'>+					fsl,mode = "i2s-slave";</div><div class='add'>+					status = "okay";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		aips-bus@02100000 { /* AIPS2 */</div><div class='del'>-			enet@02188000 {</div><div class='add'>+			ethernet@02188000 {</div><div class='ctx'> 				phy-mode = "rgmii";</div><div class='ctx'> 				phy-reset-gpios = &lt;&amp;gpio3 23 0&gt;;</div><div class='ctx'> 				status = "okay";</div><div class='hunk'>@@ -43,13 +65,23 @@</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart2: uart@021e8000 {</div><div class='add'>+			audmux@021d8000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_audmux_1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart2: serial@021e8000 {</div><div class='ctx'> 				status = "okay";</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_serial2_1&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			i2c@021a0000 { /* I2C1 */</div><div class='ctx'> 				status = "okay";</div><div class='ctx'> 				clock-frequency = &lt;100000&gt;;</div><div class='add'>+				pinctrl-names = "default";</div><div class='add'>+				pinctrl-0 = &lt;&amp;pinctrl_i2c1_1&gt;;</div><div class='ctx'> </div><div class='ctx'> 				codec: sgtl5000@0a {</div><div class='ctx'> 					compatible = "fsl,sgtl5000";</div><div class='hunk'>@@ -80,4 +112,18 @@</div><div class='ctx'> 			regulator-always-on;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "fsl,imx6q-sabrelite-sgtl5000",</div><div class='add'>+			     "fsl,imx-audio-sgtl5000";</div><div class='add'>+		model = "imx6q-sabrelite-sgtl5000";</div><div class='add'>+		ssi-controller = &lt;&amp;ssi1&gt;;</div><div class='add'>+		audio-codec = &lt;&amp;codec&gt;;</div><div class='add'>+		audio-routing =</div><div class='add'>+			"MIC_IN", "Mic Jack",</div><div class='add'>+			"Mic Jack", "Mic Bias",</div><div class='add'>+			"Headphone Jack", "HP_OUT";</div><div class='add'>+		mux-int-port = &lt;1&gt;;</div><div class='add'>+		mux-ext-port = &lt;4&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts<br/>new file mode 100644<br/>index 000000000000..07509a181178<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q-sabresd.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx6q-sabresd.dts</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2011 Linaro Ltd.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "imx6q.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Freescale i.MX6Q SABRE Smart Device Board";</div><div class='add'>+	compatible = "fsl,imx6q-sabresd", "fsl,imx6q";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x10000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+</div><div class='add'>+		aips-bus@02000000 { /* AIPS1 */</div><div class='add'>+			spba-bus@02000000 {</div><div class='add'>+				uart1: serial@02020000 {</div><div class='add'>+					status = "okay";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		aips-bus@02100000 { /* AIPS2 */</div><div class='add'>+			ethernet@02188000 {</div><div class='add'>+				phy-mode = "rgmii";</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usdhc@02194000 { /* uSDHC2 */</div><div class='add'>+				cd-gpios = &lt;&amp;gpio2 2 0&gt;;</div><div class='add'>+				wp-gpios = &lt;&amp;gpio2 3 0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usdhc@02198000 { /* uSDHC3 */</div><div class='add'>+				cd-gpios = &lt;&amp;gpio2 0 0&gt;;</div><div class='add'>+				wp-gpios = &lt;&amp;gpio2 1 0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi<br/>index 4905f51a106f..8c90cbac945f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/imx6q.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/imx6q.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/imx6q.dtsi</a></div><div class='hunk'>@@ -165,7 +165,7 @@</div><div class='ctx'> 					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				uart1: uart@02020000 {</div><div class='add'>+				uart1: serial@02020000 {</div><div class='ctx'> 					compatible = "fsl,imx6q-uart", "fsl,imx21-uart";</div><div class='ctx'> 					reg = &lt;0x02020000 0x4000&gt;;</div><div class='ctx'> 					interrupts = &lt;0 26 0x04&gt;;</div><div class='hunk'>@@ -177,19 +177,31 @@</div><div class='ctx'> 					interrupts = &lt;0 51 0x04&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				ssi@02028000 { /* SSI1 */</div><div class='add'>+				ssi1: ssi@02028000 {</div><div class='add'>+					compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";</div><div class='ctx'> 					reg = &lt;0x02028000 0x4000&gt;;</div><div class='ctx'> 					interrupts = &lt;0 46 0x04&gt;;</div><div class='add'>+					fsl,fifo-depth = &lt;15&gt;;</div><div class='add'>+					fsl,ssi-dma-events = &lt;38 37&gt;;</div><div class='add'>+					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				ssi@0202c000 { /* SSI2 */</div><div class='add'>+				ssi2: ssi@0202c000 {</div><div class='add'>+					compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";</div><div class='ctx'> 					reg = &lt;0x0202c000 0x4000&gt;;</div><div class='ctx'> 					interrupts = &lt;0 47 0x04&gt;;</div><div class='add'>+					fsl,fifo-depth = &lt;15&gt;;</div><div class='add'>+					fsl,ssi-dma-events = &lt;42 41&gt;;</div><div class='add'>+					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='del'>-				ssi@02030000 { /* SSI3 */</div><div class='add'>+				ssi3: ssi@02030000 {</div><div class='add'>+					compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";</div><div class='ctx'> 					reg = &lt;0x02030000 0x4000&gt;;</div><div class='ctx'> 					interrupts = &lt;0 48 0x04&gt;;</div><div class='add'>+					fsl,fifo-depth = &lt;15&gt;;</div><div class='add'>+					fsl,ssi-dma-events = &lt;46 45&gt;;</div><div class='add'>+					status = "disabled";</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				asrc@02034000 {</div><div class='hunk'>@@ -346,6 +358,90 @@</div><div class='ctx'> 				compatible = "fsl,imx6q-anatop";</div><div class='ctx'> 				reg = &lt;0x020c8000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 49 0x04 0 54 0x04 0 127 0x04&gt;;</div><div class='add'>+</div><div class='add'>+				regulator-1p1@110 {</div><div class='add'>+					compatible = "fsl,anatop-regulator";</div><div class='add'>+					regulator-name = "vdd1p1";</div><div class='add'>+					regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1375000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					anatop-reg-offset = &lt;0x110&gt;;</div><div class='add'>+					anatop-vol-bit-shift = &lt;8&gt;;</div><div class='add'>+					anatop-vol-bit-width = &lt;5&gt;;</div><div class='add'>+					anatop-min-bit-val = &lt;4&gt;;</div><div class='add'>+					anatop-min-voltage = &lt;800000&gt;;</div><div class='add'>+					anatop-max-voltage = &lt;1375000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-3p0@120 {</div><div class='add'>+					compatible = "fsl,anatop-regulator";</div><div class='add'>+					regulator-name = "vdd3p0";</div><div class='add'>+					regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;3150000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					anatop-reg-offset = &lt;0x120&gt;;</div><div class='add'>+					anatop-vol-bit-shift = &lt;8&gt;;</div><div class='add'>+					anatop-vol-bit-width = &lt;5&gt;;</div><div class='add'>+					anatop-min-bit-val = &lt;0&gt;;</div><div class='add'>+					anatop-min-voltage = &lt;2625000&gt;;</div><div class='add'>+					anatop-max-voltage = &lt;3400000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-2p5@130 {</div><div class='add'>+					compatible = "fsl,anatop-regulator";</div><div class='add'>+					regulator-name = "vdd2p5";</div><div class='add'>+					regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;2750000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					anatop-reg-offset = &lt;0x130&gt;;</div><div class='add'>+					anatop-vol-bit-shift = &lt;8&gt;;</div><div class='add'>+					anatop-vol-bit-width = &lt;5&gt;;</div><div class='add'>+					anatop-min-bit-val = &lt;0&gt;;</div><div class='add'>+					anatop-min-voltage = &lt;2000000&gt;;</div><div class='add'>+					anatop-max-voltage = &lt;2750000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-vddcore@140 {</div><div class='add'>+					compatible = "fsl,anatop-regulator";</div><div class='add'>+					regulator-name = "cpu";</div><div class='add'>+					regulator-min-microvolt = &lt;725000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1450000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					anatop-reg-offset = &lt;0x140&gt;;</div><div class='add'>+					anatop-vol-bit-shift = &lt;0&gt;;</div><div class='add'>+					anatop-vol-bit-width = &lt;5&gt;;</div><div class='add'>+					anatop-min-bit-val = &lt;1&gt;;</div><div class='add'>+					anatop-min-voltage = &lt;725000&gt;;</div><div class='add'>+					anatop-max-voltage = &lt;1450000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-vddpu@140 {</div><div class='add'>+					compatible = "fsl,anatop-regulator";</div><div class='add'>+					regulator-name = "vddpu";</div><div class='add'>+					regulator-min-microvolt = &lt;725000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1450000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					anatop-reg-offset = &lt;0x140&gt;;</div><div class='add'>+					anatop-vol-bit-shift = &lt;9&gt;;</div><div class='add'>+					anatop-vol-bit-width = &lt;5&gt;;</div><div class='add'>+					anatop-min-bit-val = &lt;1&gt;;</div><div class='add'>+					anatop-min-voltage = &lt;725000&gt;;</div><div class='add'>+					anatop-max-voltage = &lt;1450000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				regulator-vddsoc@140 {</div><div class='add'>+					compatible = "fsl,anatop-regulator";</div><div class='add'>+					regulator-name = "vddsoc";</div><div class='add'>+					regulator-min-microvolt = &lt;725000&gt;;</div><div class='add'>+					regulator-max-microvolt = &lt;1450000&gt;;</div><div class='add'>+					regulator-always-on;</div><div class='add'>+					anatop-reg-offset = &lt;0x140&gt;;</div><div class='add'>+					anatop-vol-bit-shift = &lt;18&gt;;</div><div class='add'>+					anatop-vol-bit-width = &lt;5&gt;;</div><div class='add'>+					anatop-min-bit-val = &lt;1&gt;;</div><div class='add'>+					anatop-min-voltage = &lt;725000&gt;;</div><div class='add'>+					anatop-max-voltage = &lt;1450000&gt;;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			usbphy@020c9000 { /* USBPHY1 */</div><div class='hunk'>@@ -386,7 +482,62 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			iomuxc@020e0000 {</div><div class='add'>+				compatible = "fsl,imx6q-iomuxc";</div><div class='ctx'> 				reg = &lt;0x020e0000 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+				/* shared pinctrl settings */</div><div class='add'>+				audmux {</div><div class='add'>+					pinctrl_audmux_1: audmux-1 {</div><div class='add'>+						fsl,pins = &lt;18   0x80000000	/* MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD */</div><div class='add'>+							    1586 0x80000000	/* MX6Q_PAD_SD2_DAT3__AUDMUX_AUD4_TXC */</div><div class='add'>+							    11   0x80000000	/* MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD */</div><div class='add'>+							    3    0x80000000&gt;;	/* MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS */</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				i2c1 {</div><div class='add'>+					pinctrl_i2c1_1: i2c1grp-1 {</div><div class='add'>+						fsl,pins = &lt;137 0x4001b8b1	/* MX6Q_PAD_EIM_D21__I2C1_SCL */</div><div class='add'>+							    196 0x4001b8b1&gt;;	/* MX6Q_PAD_EIM_D28__I2C1_SDA */</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				serial2 {</div><div class='add'>+					pinctrl_serial2_1: serial2grp-1 {</div><div class='add'>+						fsl,pins = &lt;183 0x1b0b1		/* MX6Q_PAD_EIM_D26__UART2_TXD */</div><div class='add'>+							    191 0x1b0b1&gt;;	/* MX6Q_PAD_EIM_D27__UART2_RXD */</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc3 {</div><div class='add'>+					pinctrl_usdhc3_1: usdhc3grp-1 {</div><div class='add'>+						fsl,pins = &lt;1273 0x17059	/* MX6Q_PAD_SD3_CMD__USDHC3_CMD */</div><div class='add'>+							    1281 0x10059	/* MX6Q_PAD_SD3_CLK__USDHC3_CLK	*/</div><div class='add'>+							    1289 0x17059	/* MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 */</div><div class='add'>+							    1297 0x17059	/* MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 */</div><div class='add'>+							    1305 0x17059	/* MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 */</div><div class='add'>+							    1312 0x17059	/* MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 */</div><div class='add'>+							    1265 0x17059	/* MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 */</div><div class='add'>+							    1257 0x17059	/* MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 */</div><div class='add'>+							    1249 0x17059	/* MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 */</div><div class='add'>+							    1241 0x17059&gt;;	/* MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 */</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				usdhc4 {</div><div class='add'>+					pinctrl_usdhc4_1: usdhc4grp-1 {</div><div class='add'>+						fsl,pins = &lt;1386 0x17059	/* MX6Q_PAD_SD4_CMD__USDHC4_CMD */</div><div class='add'>+							    1392 0x10059	/* MX6Q_PAD_SD4_CLK__USDHC4_CLK	*/</div><div class='add'>+							    1462 0x17059	/* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */</div><div class='add'>+							    1470 0x17059	/* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */</div><div class='add'>+							    1478 0x17059	/* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */</div><div class='add'>+							    1486 0x17059	/* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */</div><div class='add'>+							    1493 0x17059	/* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */</div><div class='add'>+							    1501 0x17059	/* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */</div><div class='add'>+							    1509 0x17059	/* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */</div><div class='add'>+							    1517 0x17059&gt;;	/* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */</div><div class='add'>+					};</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			dcic@020e4000 { /* DCIC1 */</div><div class='hunk'>@@ -422,7 +573,7 @@</div><div class='ctx'> 				reg = &lt;0x0217c000 0x4000&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			enet@02188000 {</div><div class='add'>+			ethernet@02188000 {</div><div class='ctx'> 				compatible = "fsl,imx6q-fec";</div><div class='ctx'> 				reg = &lt;0x02188000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 118 0x04 0 119 0x04&gt;;</div><div class='hunk'>@@ -527,7 +678,9 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			audmux@021d8000 {</div><div class='add'>+				compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";</div><div class='ctx'> 				reg = &lt;0x021d8000 0x4000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			mipi@021dc000 { /* MIPI-CSI */</div><div class='hunk'>@@ -543,28 +696,28 @@</div><div class='ctx'> 				interrupts = &lt;0 18 0x04&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart2: uart@021e8000 {</div><div class='add'>+			uart2: serial@021e8000 {</div><div class='ctx'> 				compatible = "fsl,imx6q-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x021e8000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 27 0x04&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart3: uart@021ec000 {</div><div class='add'>+			uart3: serial@021ec000 {</div><div class='ctx'> 				compatible = "fsl,imx6q-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x021ec000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 28 0x04&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart4: uart@021f0000 {</div><div class='add'>+			uart4: serial@021f0000 {</div><div class='ctx'> 				compatible = "fsl,imx6q-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x021f0000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 29 0x04&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			uart5: uart@021f4000 {</div><div class='add'>+			uart5: serial@021f4000 {</div><div class='ctx'> 				compatible = "fsl,imx6q-uart", "fsl,imx21-uart";</div><div class='ctx'> 				reg = &lt;0x021f4000 0x4000&gt;;</div><div class='ctx'> 				interrupts = &lt;0 30 0x04&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-dns320.dts b/arch/arm/boot/dts/kirkwood-dns320.dts<br/>new file mode 100644<br/>index 000000000000..dc09a735b04a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-dns320.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/kirkwood-dns320.dts</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "kirkwood.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "D-Link DNS-320 NAS (Rev A1)";</div><div class='add'>+	compatible = "dlink,dns-320-a1", "dlink,dns-320", "dlink,dns-kirkwood", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x8000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200n8 earlyprintk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ocp@f1000000 {</div><div class='add'>+		serial@12000 {</div><div class='add'>+			clock-frequency = &lt;166666667&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial@12100 {</div><div class='add'>+			clock-frequency = &lt;166666667&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand@3000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "u-boot";</div><div class='add'>+				reg = &lt;0x0000000 0x100000&gt;;</div><div class='add'>+				read-only;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@100000 {</div><div class='add'>+				label = "uImage";</div><div class='add'>+				reg = &lt;0x0100000 0x500000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@600000 {</div><div class='add'>+				label = "ramdisk";</div><div class='add'>+				reg = &lt;0x0600000 0x500000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@b00000 {</div><div class='add'>+				label = "image";</div><div class='add'>+				reg = &lt;0x0b00000 0x6600000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@7100000 {</div><div class='add'>+				label = "mini firmware";</div><div class='add'>+				reg = &lt;0x7100000 0xa00000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@7b00000 {</div><div class='add'>+				label = "config";</div><div class='add'>+				reg = &lt;0x7b00000 0x500000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-dns325.dts b/arch/arm/boot/dts/kirkwood-dns325.dts<br/>new file mode 100644<br/>index 000000000000..c2a5562525d2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-dns325.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/kirkwood-dns325.dts</a></div><div class='hunk'>@@ -0,0 +1,59 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "kirkwood.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "D-Link DNS-325 NAS (Rev A1)";</div><div class='add'>+	compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200n8 earlyprintk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ocp@f1000000 {</div><div class='add'>+		serial@12000 {</div><div class='add'>+			clock-frequency = &lt;200000000&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand@3000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "u-boot";</div><div class='add'>+				reg = &lt;0x0000000 0x100000&gt;;</div><div class='add'>+				read-only;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@100000 {</div><div class='add'>+				label = "uImage";</div><div class='add'>+				reg = &lt;0x0100000 0x500000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@600000 {</div><div class='add'>+				label = "ramdisk";</div><div class='add'>+				reg = &lt;0x0600000 0x500000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@b00000 {</div><div class='add'>+				label = "image";</div><div class='add'>+				reg = &lt;0x0b00000 0x6600000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@7100000 {</div><div class='add'>+				label = "mini firmware";</div><div class='add'>+				reg = &lt;0x7100000 0xa00000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@7b00000 {</div><div class='add'>+				label = "config";</div><div class='add'>+				reg = &lt;0x7b00000 0x500000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts<br/>new file mode 100644<br/>index 000000000000..ada0f0c23085<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-ib62x0.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/kirkwood-ib62x0.dts</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "kirkwood.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";</div><div class='add'>+	compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0",  "mrvl,kirkwood-88f6281", "mrvl,kirkwood";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200n8 earlyprintk";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ocp@f1000000 {</div><div class='add'>+		serial@12000 {</div><div class='add'>+			clock-frequency = &lt;200000000&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand@3000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			partition@0 {</div><div class='add'>+				label = "u-boot";</div><div class='add'>+				reg = &lt;0x0000000 0x100000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@100000 {</div><div class='add'>+				label = "uImage";</div><div class='add'>+				reg = &lt;0x0100000 0x600000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			partition@700000 {</div><div class='add'>+				label = "root";</div><div class='add'>+				reg = &lt;0x0700000 0xf900000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts<br/>new file mode 100644<br/>index 000000000000..1ba75d4adecc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood-iconnect.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/kirkwood-iconnect.dts</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "kirkwood.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Iomega Iconnect";</div><div class='add'>+	compatible = "iom,iconnect-1.1", "iom,iconnect", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x00000000 0x10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200n8 earlyprintk mtdparts=orion_nand:0xc0000@0x0(uboot),0x20000@0xa0000(env),0x300000@0x100000(zImage),0x300000@0x540000(initrd),0x1f400000@0x980000(boot)";</div><div class='add'>+		linux,initrd-start = &lt;0x4500040&gt;;</div><div class='add'>+		linux,initrd-end   = &lt;0x4800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ocp@f1000000 {</div><div class='add'>+		serial@12000 {</div><div class='add'>+			clock-frequency = &lt;200000000&gt;;</div><div class='add'>+			status = "ok";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi<br/>index 3474ef890945..926528b81baa 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/kirkwood.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kirkwood.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/kirkwood.dtsi</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> 	ocp@f1000000 {</div><div class='ctx'> 		compatible = "simple-bus";</div><div class='del'>-		ranges = &lt;0 0xf1000000 0x1000000&gt;;</div><div class='add'>+		ranges = &lt;0 0xf1000000 0x4000000&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -32,5 +32,18 @@</div><div class='ctx'> 			reg = &lt;0x10300 0x20&gt;;</div><div class='ctx'> 			interrupts = &lt;53&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		nand@3000000 {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			cle = &lt;0&gt;;</div><div class='add'>+			ale = &lt;1&gt;;</div><div class='add'>+			bank-width = &lt;1&gt;;</div><div class='add'>+			compatible = "mrvl,orion-nand";</div><div class='add'>+			reg = &lt;0x3000000 0x400&gt;;</div><div class='add'>+			chip-delay = &lt;25&gt;;</div><div class='add'>+			/* set partition map and/or chip-delay in board dts */</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts<br/>new file mode 100644<br/>index 000000000000..e8814fe0e277<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/kizbox.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/kizbox.dts</a></div><div class='hunk'>@@ -0,0 +1,138 @@</div><div class='add'>+/*</div><div class='add'>+ * kizbox.dts - Device Tree file for Overkiz Kizbox board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Boris BREZILLON &lt;linux-arm@overkiz.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "at91sam9g20.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+</div><div class='add'>+	model = "Overkiz kizbox";</div><div class='add'>+	compatible = "overkiz,kizbox", "atmel,at91sam9g20", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "panic=5 ubi.mtd=1 rootfstype=ubifs root=ubi0:root";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		main_clock: clock@0 {</div><div class='add'>+			compatible = "atmel,osc", "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;18432000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			dbgu: serial@fffff200 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart0: serial@fffb0000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usart1: serial@fffb4000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			macb0: ethernet@fffc4000 {</div><div class='add'>+				phy-mode = "mii";</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			nand-bus-width = &lt;8&gt;;</div><div class='add'>+			nand-ecc-mode = "soft";</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			bootloaderkernel@0 {</div><div class='add'>+				label = "bootloader-kernel";</div><div class='add'>+				reg = &lt;0x0 0xc0000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ubi@c0000 {</div><div class='add'>+				label = "ubi";</div><div class='add'>+				reg = &lt;0xc0000 0x7f40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: ohci@00500000 {</div><div class='add'>+			num-ports = &lt;1&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+</div><div class='add'>+		pcf8563@51 {</div><div class='add'>+			/* nxp pcf8563 rtc */</div><div class='add'>+			compatible = "nxp,pcf8563";</div><div class='add'>+			reg = &lt;0x51&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led1g {</div><div class='add'>+			label = "led1:green";</div><div class='add'>+			gpios = &lt;&amp;pioB 0 1&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led1r {</div><div class='add'>+			label = "led1:red";</div><div class='add'>+			gpios = &lt;&amp;pioB 1 1&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led2g {</div><div class='add'>+			label = "led2:green";</div><div class='add'>+			gpios = &lt;&amp;pioB 2 1&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+			default-state = "on";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led2r {</div><div class='add'>+			label = "led2:red";</div><div class='add'>+			gpios = &lt;&amp;pioB 3 1&gt;;</div><div class='add'>+			linux,default-trigger = "none";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		reset {</div><div class='add'>+			label = "reset";</div><div class='add'>+			gpios = &lt;&amp;pioB 30 1&gt;;</div><div class='add'>+			linux,code = &lt;0x100&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mode {</div><div class='add'>+			label = "mode";</div><div class='add'>+			gpios = &lt;&amp;pioB 31 1&gt;;</div><div class='add'>+			linux,code = &lt;0x101&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};
\ No newline at end of file</div><div class='head'>diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi<br/>new file mode 100644<br/>index 000000000000..3f5dad801a98<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/lpc32xx.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/lpc32xx.dtsi</a></div><div class='hunk'>@@ -0,0 +1,255 @@</div><div class='add'>+/*</div><div class='add'>+ * NXP LPC32xx SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Roland Stigge &lt;stigge@antcom.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "nxp,lpc3220";</div><div class='add'>+	interrupt-parent = &lt;&amp;mic&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,arm926ejs";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x20000000 0x20000000 0x30000000&gt;;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Enable either SLC or MLC</div><div class='add'>+		 */</div><div class='add'>+		slc: flash@20020000 {</div><div class='add'>+			compatible = "nxp,lpc3220-slc";</div><div class='add'>+			reg = &lt;0x20020000 0x1000&gt;;</div><div class='add'>+			status = "disable";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mlc: flash@200B0000 {</div><div class='add'>+			compatible = "nxp,lpc3220-mlc";</div><div class='add'>+			reg = &lt;0x200B0000 0x1000&gt;;</div><div class='add'>+			status = "disable";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma@31000000 {</div><div class='add'>+			compatible = "arm,pl080", "arm,primecell";</div><div class='add'>+			reg = &lt;0x31000000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0x1c 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Enable either ohci or usbd (gadget)!</div><div class='add'>+		 */</div><div class='add'>+		ohci@31020000 {</div><div class='add'>+			compatible = "nxp,ohci-nxp", "usb-ohci";</div><div class='add'>+			reg = &lt;0x31020000 0x300&gt;;</div><div class='add'>+			interrupts = &lt;0x3b 0&gt;;</div><div class='add'>+			status = "disable";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usbd@31020000 {</div><div class='add'>+			compatible = "nxp,lpc3220-udc";</div><div class='add'>+			reg = &lt;0x31020000 0x300&gt;;</div><div class='add'>+			interrupts = &lt;0x3d 0&gt;, &lt;0x3e 0&gt;, &lt;0x3c 0&gt;, &lt;0x3a 0&gt;;</div><div class='add'>+			status = "disable";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clcd@31040000 {</div><div class='add'>+			compatible = "arm,pl110", "arm,primecell";</div><div class='add'>+			reg = &lt;0x31040000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0x0e 0&gt;;</div><div class='add'>+			status = "disable";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mac: ethernet@31060000 {</div><div class='add'>+			compatible = "nxp,lpc-eth";</div><div class='add'>+			reg = &lt;0x31060000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0x1d 0&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges = &lt;0x20000000 0x20000000 0x30000000&gt;;</div><div class='add'>+</div><div class='add'>+			ssp0: ssp@20084000 {</div><div class='add'>+				compatible = "arm,pl022", "arm,primecell";</div><div class='add'>+				reg = &lt;0x20084000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0x14 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi1: spi@20088000 {</div><div class='add'>+				compatible = "nxp,lpc3220-spi";</div><div class='add'>+				reg = &lt;0x20088000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ssp1: ssp@2008c000 {</div><div class='add'>+				compatible = "arm,pl022", "arm,primecell";</div><div class='add'>+				reg = &lt;0x2008c000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0x15 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			spi2: spi@20090000 {</div><div class='add'>+				compatible = "nxp,lpc3220-spi";</div><div class='add'>+				reg = &lt;0x20090000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2s0: i2s@20094000 {</div><div class='add'>+				compatible = "nxp,lpc3220-i2s";</div><div class='add'>+				reg = &lt;0x20094000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			sd@20098000 {</div><div class='add'>+				compatible = "arm,pl180", "arm,primecell";</div><div class='add'>+				reg = &lt;0x20098000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0x0f 0&gt;, &lt;0x0d 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2s1: i2s@2009C000 {</div><div class='add'>+				compatible = "nxp,lpc3220-i2s";</div><div class='add'>+				reg = &lt;0x2009C000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3: serial@40080000 {</div><div class='add'>+				compatible = "nxp,serial";</div><div class='add'>+				reg = &lt;0x40080000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4: serial@40088000 {</div><div class='add'>+				compatible = "nxp,serial";</div><div class='add'>+				reg = &lt;0x40088000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart5: serial@40090000 {</div><div class='add'>+				compatible = "nxp,serial";</div><div class='add'>+				reg = &lt;0x40090000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart6: serial@40098000 {</div><div class='add'>+				compatible = "nxp,serial";</div><div class='add'>+				reg = &lt;0x40098000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@400A0000 {</div><div class='add'>+				compatible = "nxp,pnx-i2c";</div><div class='add'>+				reg = &lt;0x400A0000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;0x33 0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				pnx,timeout = &lt;0x64&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2: i2c@400A8000 {</div><div class='add'>+				compatible = "nxp,pnx-i2c";</div><div class='add'>+				reg = &lt;0x400A8000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;0x32 0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				pnx,timeout = &lt;0x64&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2cusb: i2c@31020300 {</div><div class='add'>+				compatible = "nxp,pnx-i2c";</div><div class='add'>+				reg = &lt;0x31020300 0x100&gt;;</div><div class='add'>+				interrupts = &lt;0x3f 0&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				pnx,timeout = &lt;0x64&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fab {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges = &lt;0x20000000 0x20000000 0x30000000&gt;;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * MIC Interrupt controller includes:</div><div class='add'>+			 *   MIC @40008000</div><div class='add'>+			 *   SIC1 @4000C000</div><div class='add'>+			 *   SIC2 @40010000</div><div class='add'>+			 */</div><div class='add'>+			mic: interrupt-controller@40008000 {</div><div class='add'>+				compatible = "nxp,lpc3220-mic";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				reg = &lt;0x40008000 0xC000&gt;;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart1: serial@40014000 {</div><div class='add'>+				compatible = "nxp,serial";</div><div class='add'>+				reg = &lt;0x40014000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart2: serial@40018000 {</div><div class='add'>+				compatible = "nxp,serial";</div><div class='add'>+				reg = &lt;0x40018000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart7: serial@4001C000 {</div><div class='add'>+				compatible = "nxp,serial";</div><div class='add'>+				reg = &lt;0x4001C000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@40024000 {</div><div class='add'>+				compatible = "nxp,lpc3220-rtc";</div><div class='add'>+				reg = &lt;0x40024000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0x34 0&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio: gpio@40028000 {</div><div class='add'>+				compatible = "nxp,lpc3220-gpio";</div><div class='add'>+				reg = &lt;0x40028000 0x1000&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;3&gt;; /* bank, pin, flags */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			watchdog@4003C000 {</div><div class='add'>+				compatible = "nxp,pnx4008-wdt";</div><div class='add'>+				reg = &lt;0x4003C000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * TSC vs. ADC: Since those two share the same</div><div class='add'>+			 * hardware, you need to choose from one of the</div><div class='add'>+			 * following two and do 'status = "okay";' for one of</div><div class='add'>+			 * them</div><div class='add'>+			 */</div><div class='add'>+</div><div class='add'>+			adc@40048000 {</div><div class='add'>+				compatible = "nxp,lpc3220-adc";</div><div class='add'>+				reg = &lt;0x40048000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0x27 0&gt;;</div><div class='add'>+				status = "disable";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			tsc@40048000 {</div><div class='add'>+				compatible = "nxp,lpc3220-tsc";</div><div class='add'>+				reg = &lt;0x40048000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0x27 0&gt;;</div><div class='add'>+				status = "disable";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			key@40050000 {</div><div class='add'>+				compatible = "nxp,lpc3220-key";</div><div class='add'>+				reg = &lt;0x40050000 0x1000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/mmp2-brownstone.dts b/arch/arm/boot/dts/mmp2-brownstone.dts<br/>new file mode 100644<br/>index 000000000000..153a4b2d12b5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/mmp2-brownstone.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/mmp2-brownstone.dts</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+/*</div><div class='add'>+ *  Copyright (C) 2012 Marvell Technology Group Ltd.</div><div class='add'>+ *  Author: Haojian Zhuang &lt;haojian.zhuang@marvell.com&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *  it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ *  publishhed by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "mmp2.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Marvell MMP2 Aspenite Development Board";</div><div class='add'>+	compatible = "mrvl,mmp2-brownstone", "mrvl,mmp2";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS2,38400 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x00000000 0x04000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		apb@d4000000 {</div><div class='add'>+			uart3: uart@d4018000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+			twsi1: i2c@d4011000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+			rtc: rtc@d4010000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi<br/>new file mode 100644<br/>index 000000000000..80f74e256408<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/mmp2.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/mmp2.dtsi</a></div><div class='hunk'>@@ -0,0 +1,220 @@</div><div class='add'>+/*</div><div class='add'>+ *  Copyright (C) 2012 Marvell Technology Group Ltd.</div><div class='add'>+ *  Author: Haojian Zhuang &lt;haojian.zhuang@marvell.com&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *  it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ *  publishhed by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart1;</div><div class='add'>+		serial1 = &amp;uart2;</div><div class='add'>+		serial2 = &amp;uart3;</div><div class='add'>+		serial3 = &amp;uart4;</div><div class='add'>+		i2c0 = &amp;twsi1;</div><div class='add'>+		i2c1 = &amp;twsi2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		axi@d4200000 {	/* AXI */</div><div class='add'>+			compatible = "mrvl,axi-bus", "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0xd4200000 0x00200000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			intc: interrupt-controller@d4282000 {</div><div class='add'>+				compatible = "mrvl,mmp2-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0xd4282000 0x1000&gt;;</div><div class='add'>+				mrvl,intc-nr-irqs = &lt;64&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			intcmux4@d4282150 {</div><div class='add'>+				compatible = "mrvl,mmp2-mux-intc";</div><div class='add'>+				interrupts = &lt;4&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0x150 0x4&gt;, &lt;0x168 0x4&gt;;</div><div class='add'>+				reg-names = "mux status", "mux mask";</div><div class='add'>+				mrvl,intc-nr-irqs = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			intcmux5: interrupt-controller@d4282154 {</div><div class='add'>+				compatible = "mrvl,mmp2-mux-intc";</div><div class='add'>+				interrupts = &lt;5&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0x154 0x4&gt;, &lt;0x16c 0x4&gt;;</div><div class='add'>+				reg-names = "mux status", "mux mask";</div><div class='add'>+				mrvl,intc-nr-irqs = &lt;2&gt;;</div><div class='add'>+				mrvl,clr-mfp-irq = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			intcmux9: interrupt-controller@d4282180 {</div><div class='add'>+				compatible = "mrvl,mmp2-mux-intc";</div><div class='add'>+				interrupts = &lt;9&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0x180 0x4&gt;, &lt;0x17c 0x4&gt;;</div><div class='add'>+				reg-names = "mux status", "mux mask";</div><div class='add'>+				mrvl,intc-nr-irqs = &lt;3&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			intcmux17: interrupt-controller@d4282158 {</div><div class='add'>+				compatible = "mrvl,mmp2-mux-intc";</div><div class='add'>+				interrupts = &lt;17&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0x158 0x4&gt;, &lt;0x170 0x4&gt;;</div><div class='add'>+				reg-names = "mux status", "mux mask";</div><div class='add'>+				mrvl,intc-nr-irqs = &lt;5&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			intcmux35: interrupt-controller@d428215c {</div><div class='add'>+				compatible = "mrvl,mmp2-mux-intc";</div><div class='add'>+				interrupts = &lt;35&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0x15c 0x4&gt;, &lt;0x174 0x4&gt;;</div><div class='add'>+				reg-names = "mux status", "mux mask";</div><div class='add'>+				mrvl,intc-nr-irqs = &lt;15&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			intcmux51: interrupt-controller@d4282160 {</div><div class='add'>+				compatible = "mrvl,mmp2-mux-intc";</div><div class='add'>+				interrupts = &lt;51&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0x160 0x4&gt;, &lt;0x178 0x4&gt;;</div><div class='add'>+				reg-names = "mux status", "mux mask";</div><div class='add'>+				mrvl,intc-nr-irqs = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			intcmux55: interrupt-controller@d4282188 {</div><div class='add'>+				compatible = "mrvl,mmp2-mux-intc";</div><div class='add'>+				interrupts = &lt;55&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0x188 0x4&gt;, &lt;0x184 0x4&gt;;</div><div class='add'>+				reg-names = "mux status", "mux mask";</div><div class='add'>+				mrvl,intc-nr-irqs = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb@d4000000 {	/* APB */</div><div class='add'>+			compatible = "mrvl,apb-bus", "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0xd4000000 0x00200000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			timer0: timer@d4014000 {</div><div class='add'>+				compatible = "mrvl,mmp-timer";</div><div class='add'>+				reg = &lt;0xd4014000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;13&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart1: uart@d4030000 {</div><div class='add'>+				compatible = "mrvl,mmp-uart";</div><div class='add'>+				reg = &lt;0xd4030000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;27&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart2: uart@d4017000 {</div><div class='add'>+				compatible = "mrvl,mmp-uart";</div><div class='add'>+				reg = &lt;0xd4017000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;28&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3: uart@d4018000 {</div><div class='add'>+				compatible = "mrvl,mmp-uart";</div><div class='add'>+				reg = &lt;0xd4018000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;24&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart4: uart@d4016000 {</div><div class='add'>+				compatible = "mrvl,mmp-uart";</div><div class='add'>+				reg = &lt;0xd4016000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;46&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@d4019000 {</div><div class='add'>+				compatible = "mrvl,mmp-gpio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0xd4019000 0x1000&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupts = &lt;49&gt;;</div><div class='add'>+				interrupt-names = "gpio_mux";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+</div><div class='add'>+				gcb0: gpio@d4019000 {</div><div class='add'>+					reg = &lt;0xd4019000 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gcb1: gpio@d4019004 {</div><div class='add'>+					reg = &lt;0xd4019004 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gcb2: gpio@d4019008 {</div><div class='add'>+					reg = &lt;0xd4019008 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gcb3: gpio@d4019100 {</div><div class='add'>+					reg = &lt;0xd4019100 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gcb4: gpio@d4019104 {</div><div class='add'>+					reg = &lt;0xd4019104 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gcb5: gpio@d4019108 {</div><div class='add'>+					reg = &lt;0xd4019108 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			twsi1: i2c@d4011000 {</div><div class='add'>+				compatible = "mrvl,mmp-twsi";</div><div class='add'>+				reg = &lt;0xd4011000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;7&gt;;</div><div class='add'>+				mrvl,i2c-fast-mode;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			twsi2: i2c@d4025000 {</div><div class='add'>+				compatible = "mrvl,mmp-twsi";</div><div class='add'>+				reg = &lt;0xd4025000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;58&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc: rtc@d4010000 {</div><div class='add'>+				compatible = "mrvl,mmp-rtc";</div><div class='add'>+				reg = &lt;0xd4010000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;1 0&gt;;</div><div class='add'>+				interrupt-names = "rtc 1Hz", "rtc alarm";</div><div class='add'>+				interrupt-parent = &lt;&amp;intcmux5&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts<br/>index 9f72cd4cf308..5b4506c0a8c4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-beagle.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/omap3-beagle.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3-beagle.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/omap3-beagle.dts</a></div><div class='hunk'>@@ -18,3 +18,52 @@</div><div class='ctx'> 		reg = &lt;0x80000000 0x20000000&gt;; /* 512 MB */</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;2600000&gt;;</div><div class='add'>+</div><div class='add'>+	twl: twl@48 {</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		interrupts = &lt;7&gt;; /* SYS_NIRQ cascaded to intc */</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+</div><div class='add'>+		vsim: regulator@10 {</div><div class='add'>+			compatible = "ti,twl4030-vsim";</div><div class='add'>+			regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/include/ "twl4030.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Display monitor features are burnt in the EEPROM</div><div class='add'>+	 * as EDID data.</div><div class='add'>+	 */</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "ti,eeprom";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;vmmc1&gt;;</div><div class='add'>+	vmmc_aux-supply = &lt;&amp;vsim&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	status = "disable";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc3 {</div><div class='add'>+	status = "disable";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi<br/>index c6121357c1eb..99474fa5fac4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/omap3.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap3.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/omap3.dtsi</a></div><div class='hunk'>@@ -69,6 +69,60 @@</div><div class='ctx'> 			reg = &lt;0x48200000 0x1000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpio1: gpio@48310000 {</div><div class='add'>+			compatible = "ti,omap3-gpio";</div><div class='add'>+			ti,hwmods = "gpio1";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio2: gpio@49050000 {</div><div class='add'>+			compatible = "ti,omap3-gpio";</div><div class='add'>+			ti,hwmods = "gpio2";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio3: gpio@49052000 {</div><div class='add'>+			compatible = "ti,omap3-gpio";</div><div class='add'>+			ti,hwmods = "gpio3";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio4: gpio@49054000 {</div><div class='add'>+			compatible = "ti,omap3-gpio";</div><div class='add'>+			ti,hwmods = "gpio4";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio5: gpio@49056000 {</div><div class='add'>+			compatible = "ti,omap3-gpio";</div><div class='add'>+			ti,hwmods = "gpio5";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio6: gpio@49058000 {</div><div class='add'>+			compatible = "ti,omap3-gpio";</div><div class='add'>+			ti,hwmods = "gpio6";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart1: serial@4806a000 {</div><div class='ctx'> 			compatible = "ti,omap3-uart";</div><div class='ctx'> 			ti,hwmods = "uart1";</div><div class='hunk'>@@ -113,5 +167,53 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			ti,hwmods = "i2c3";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		mcspi1: spi@48098000 {</div><div class='add'>+			compatible = "ti,omap2-mcspi";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			ti,hwmods = "mcspi1";</div><div class='add'>+			ti,spi-num-cs = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcspi2: spi@4809a000 {</div><div class='add'>+			compatible = "ti,omap2-mcspi";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			ti,hwmods = "mcspi2";</div><div class='add'>+			ti,spi-num-cs = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcspi3: spi@480b8000 {</div><div class='add'>+			compatible = "ti,omap2-mcspi";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			ti,hwmods = "mcspi3";</div><div class='add'>+			ti,spi-num-cs = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcspi4: spi@480ba000 {</div><div class='add'>+			compatible = "ti,omap2-mcspi";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			ti,hwmods = "mcspi4";</div><div class='add'>+			ti,spi-num-cs = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1: mmc@4809c000 {</div><div class='add'>+			compatible = "ti,omap3-hsmmc";</div><div class='add'>+			ti,hwmods = "mmc1";</div><div class='add'>+			ti,dual-volt;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc2: mmc@480b4000 {</div><div class='add'>+			compatible = "ti,omap3-hsmmc";</div><div class='add'>+			ti,hwmods = "mmc2";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc3: mmc@480ad000 {</div><div class='add'>+			compatible = "ti,omap3-hsmmc";</div><div class='add'>+			ti,hwmods = "mmc3";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts<br/>index 9755ad5917f8..1efe0c587985 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap4-panda.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/omap4-panda.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap4-panda.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/omap4-panda.dts</a></div><div class='hunk'>@@ -17,4 +17,75 @@</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x80000000 0x40000000&gt;; /* 1 GB */</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		heartbeat {</div><div class='add'>+			label = "pandaboard::status1";</div><div class='add'>+			gpios = &lt;&amp;gpio1 7 0&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc {</div><div class='add'>+			label = "pandaboard::status2";</div><div class='add'>+			gpios = &lt;&amp;gpio1 8 0&gt;;</div><div class='add'>+			linux,default-trigger = "mmc0";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	twl: twl@48 {</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		/* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */</div><div class='add'>+		interrupts = &lt;0 7 4&gt;; /* IRQ_SYS_1N cascaded to gic */</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/include/ "twl6030.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Display monitor features are burnt in their EEPROM as EDID data.</div><div class='add'>+	 * The EEPROM is connected as I2C slave device.</div><div class='add'>+	 */</div><div class='add'>+	eeprom@50 {</div><div class='add'>+		compatible = "ti,eeprom";</div><div class='add'>+		reg = &lt;0x50&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;vmmc&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	status = "disable";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc3 {</div><div class='add'>+	status = "disable";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc4 {</div><div class='add'>+	status = "disable";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc5 {</div><div class='add'>+	ti,non-removable;</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts<br/>index 63c6b2b2bf42..d08c4d137280 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap4-sdp.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/omap4-sdp.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap4-sdp.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/omap4-sdp.dts</a></div><div class='hunk'>@@ -17,4 +17,144 @@</div><div class='ctx'> 		device_type = "memory";</div><div class='ctx'> 		reg = &lt;0x80000000 0x40000000&gt;; /* 1 GB */</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	vdd_eth: fixedregulator@0 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+		regulator-name = "VDD_ETH";</div><div class='add'>+		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpio = &lt;&amp;gpio2 16 0&gt;;  /* gpio line 48 */</div><div class='add'>+		enable-active-high;</div><div class='add'>+		regulator-boot-on;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+		debug0 {</div><div class='add'>+			label = "omap4:green:debug0";</div><div class='add'>+			gpios = &lt;&amp;gpio2 29 0&gt;; /* 61 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		debug1 {</div><div class='add'>+			label = "omap4:green:debug1";</div><div class='add'>+			gpios = &lt;&amp;gpio1 30 0&gt;; /* 30 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		debug2 {</div><div class='add'>+			label = "omap4:green:debug2";</div><div class='add'>+			gpios = &lt;&amp;gpio1 7 0&gt;; /* 7 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		debug3 {</div><div class='add'>+			label = "omap4:green:debug3";</div><div class='add'>+			gpios = &lt;&amp;gpio1 8 0&gt;; /* 8 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		debug4 {</div><div class='add'>+			label = "omap4:green:debug4";</div><div class='add'>+			gpios = &lt;&amp;gpio2 18 0&gt;; /* 50 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		user1 {</div><div class='add'>+			label = "omap4:blue:user";</div><div class='add'>+			gpios = &lt;&amp;gpio6 9 0&gt;; /* 169 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		user2 {</div><div class='add'>+			label = "omap4:red:user";</div><div class='add'>+			gpios = &lt;&amp;gpio6 10 0&gt;; /* 170 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		user3 {</div><div class='add'>+			label = "omap4:green:user";</div><div class='add'>+			gpios = &lt;&amp;gpio5 11 0&gt;; /* 139 */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c1 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	twl: twl@48 {</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+		/* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */</div><div class='add'>+		interrupts = &lt;0 7 4&gt;; /* IRQ_SYS_1N cascaded to gic */</div><div class='add'>+		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/include/ "twl6030.dtsi"</div><div class='add'>+</div><div class='add'>+&amp;i2c2 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c3 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Temperature Sensor</div><div class='add'>+	 * http://www.ti.com/lit/ds/symlink/tmp105.pdf</div><div class='add'>+	 */</div><div class='add'>+	tmp105@48 {</div><div class='add'>+		compatible = "ti,tmp105";</div><div class='add'>+		reg = &lt;0x48&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Ambient Light Sensor</div><div class='add'>+	 * http://www.rohm.com/products/databook/sensor/pdf/bh1780gli-e.pdf</div><div class='add'>+	 */</div><div class='add'>+	bh1780@29 {</div><div class='add'>+		compatible = "rohm,bh1780";</div><div class='add'>+		reg = &lt;0x29&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;i2c4 {</div><div class='add'>+	clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 3-Axis Digital Compass</div><div class='add'>+	 * http://www.sparkfun.com/datasheets/Sensors/Magneto/HMC5843.pdf</div><div class='add'>+	 */</div><div class='add'>+	hmc5843@1e {</div><div class='add'>+		compatible = "honeywell,hmc5843";</div><div class='add'>+		reg = &lt;0x1e&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mcspi1 {</div><div class='add'>+	eth@0 {</div><div class='add'>+		compatible = "ks8851";</div><div class='add'>+		spi-max-frequency = &lt;24000000&gt;;</div><div class='add'>+		reg = &lt;0&gt;;</div><div class='add'>+		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+		interrupts = &lt;2&gt;; /* gpio line 34 */</div><div class='add'>+		vdd-supply = &lt;&amp;vdd_eth&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc1 {</div><div class='add'>+	vmmc-supply = &lt;&amp;vmmc&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc2 {</div><div class='add'>+	vmmc-supply = &lt;&amp;vaux1&gt;;</div><div class='add'>+	bus-width = &lt;8&gt;;</div><div class='add'>+	ti,non-removable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc3 {</div><div class='add'>+	status = "disable";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc4 {</div><div class='add'>+	status = "disable";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;mmc5 {</div><div class='add'>+	bus-width = &lt;4&gt;;</div><div class='add'>+	ti,non-removable;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi<br/>index 3d35559e77bc..359c4979c8aa 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/omap4.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/omap4.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/omap4.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/omap4.dtsi</a></div><div class='hunk'>@@ -104,6 +104,60 @@</div><div class='ctx'> 			      &lt;0x48240100 0x0100&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		gpio1: gpio@4a310000 {</div><div class='add'>+			compatible = "ti,omap4-gpio";</div><div class='add'>+			ti,hwmods = "gpio1";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio2: gpio@48055000 {</div><div class='add'>+			compatible = "ti,omap4-gpio";</div><div class='add'>+			ti,hwmods = "gpio2";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio3: gpio@48057000 {</div><div class='add'>+			compatible = "ti,omap4-gpio";</div><div class='add'>+			ti,hwmods = "gpio3";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio4: gpio@48059000 {</div><div class='add'>+			compatible = "ti,omap4-gpio";</div><div class='add'>+			ti,hwmods = "gpio4";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio5: gpio@4805b000 {</div><div class='add'>+			compatible = "ti,omap4-gpio";</div><div class='add'>+			ti,hwmods = "gpio5";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio6: gpio@4805d000 {</div><div class='add'>+			compatible = "ti,omap4-gpio";</div><div class='add'>+			ti,hwmods = "gpio6";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		uart1: serial@4806a000 {</div><div class='ctx'> 			compatible = "ti,omap4-uart";</div><div class='ctx'> 			ti,hwmods = "uart1";</div><div class='hunk'>@@ -155,5 +209,68 @@</div><div class='ctx'> 			#size-cells = &lt;0&gt;;</div><div class='ctx'> 			ti,hwmods = "i2c4";</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		mcspi1: spi@48098000 {</div><div class='add'>+			compatible = "ti,omap4-mcspi";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			ti,hwmods = "mcspi1";</div><div class='add'>+			ti,spi-num-cs = &lt;4&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcspi2: spi@4809a000 {</div><div class='add'>+			compatible = "ti,omap4-mcspi";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			ti,hwmods = "mcspi2";</div><div class='add'>+			ti,spi-num-cs = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcspi3: spi@480b8000 {</div><div class='add'>+			compatible = "ti,omap4-mcspi";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			ti,hwmods = "mcspi3";</div><div class='add'>+			ti,spi-num-cs = &lt;2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mcspi4: spi@480ba000 {</div><div class='add'>+			compatible = "ti,omap4-mcspi";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			ti,hwmods = "mcspi4";</div><div class='add'>+			ti,spi-num-cs = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc1: mmc@4809c000 {</div><div class='add'>+			compatible = "ti,omap4-hsmmc";</div><div class='add'>+			ti,hwmods = "mmc1";</div><div class='add'>+			ti,dual-volt;</div><div class='add'>+			ti,needs-special-reset;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc2: mmc@480b4000 {</div><div class='add'>+			compatible = "ti,omap4-hsmmc";</div><div class='add'>+			ti,hwmods = "mmc2";</div><div class='add'>+			ti,needs-special-reset;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc3: mmc@480ad000 {</div><div class='add'>+			compatible = "ti,omap4-hsmmc";</div><div class='add'>+			ti,hwmods = "mmc3";</div><div class='add'>+			ti,needs-special-reset;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc4: mmc@480d1000 {</div><div class='add'>+			compatible = "ti,omap4-hsmmc";</div><div class='add'>+			ti,hwmods = "mmc4";</div><div class='add'>+			ti,needs-special-reset;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		mmc5: mmc@480d5000 {</div><div class='add'>+			compatible = "ti,omap4-hsmmc";</div><div class='add'>+			ti,hwmods = "mmc5";</div><div class='add'>+			ti,needs-special-reset;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/phy3250.dts b/arch/arm/boot/dts/phy3250.dts<br/>new file mode 100644<br/>index 000000000000..c4ff6d1a018b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/phy3250.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/phy3250.dts</a></div><div class='hunk'>@@ -0,0 +1,145 @@</div><div class='add'>+/*</div><div class='add'>+ * PHYTEC phyCORE-LPC3250 board</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Roland Stigge &lt;stigge@antcom.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "lpc32xx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250";</div><div class='add'>+	compatible = "phytec,phy3250", "nxp,lpc3250";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0 0x4000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		mac: ethernet@31060000 {</div><div class='add'>+			phy-mode = "rmii";</div><div class='add'>+			use-iram;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* Here, choose exactly one from: ohci, usbd */</div><div class='add'>+		ohci@31020000 {</div><div class='add'>+			transceiver = &lt;&amp;isp1301&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+		usbd@31020000 {</div><div class='add'>+			transceiver = &lt;&amp;isp1301&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+		clcd@31040000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* 64MB Flash via SLC NAND controller */</div><div class='add'>+		slc: flash@20020000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+			mtd0@00000000 {</div><div class='add'>+				label = "phy3250-boot";</div><div class='add'>+				reg = &lt;0x00000000 0x00064000&gt;;</div><div class='add'>+				read-only;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtd1@00064000 {</div><div class='add'>+				label = "phy3250-uboot";</div><div class='add'>+				reg = &lt;0x00064000 0x00190000&gt;;</div><div class='add'>+				read-only;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtd2@001f4000 {</div><div class='add'>+				label = "phy3250-ubt-prms";</div><div class='add'>+				reg = &lt;0x001f4000 0x00010000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtd3@00204000 {</div><div class='add'>+				label = "phy3250-kernel";</div><div class='add'>+				reg = &lt;0x00204000 0x00400000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			mtd4@00604000 {</div><div class='add'>+				label = "phy3250-rootfs";</div><div class='add'>+				reg = &lt;0x00604000 0x039fc000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			i2c1: i2c@400A0000 {</div><div class='add'>+				clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+				pcf8563: rtc@51 {</div><div class='add'>+					compatible = "nxp,pcf8563";</div><div class='add'>+					reg = &lt;0x51&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				uda1380: uda1380@18 {</div><div class='add'>+					compatible = "nxp,uda1380";</div><div class='add'>+					reg = &lt;0x18&gt;;</div><div class='add'>+					power-gpio = &lt;&amp;gpio 0x59 0&gt;;</div><div class='add'>+					reset-gpio = &lt;&amp;gpio 0x51 0&gt;;</div><div class='add'>+					dac-clk = "wspll";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2: i2c@400A8000 {</div><div class='add'>+				clock-frequency = &lt;100000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2cusb: i2c@31020300 {</div><div class='add'>+				clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+				isp1301: usb-transceiver@2c {</div><div class='add'>+					compatible = "nxp,isp1301";</div><div class='add'>+					reg = &lt;0x2c&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			ssp0: ssp@20084000 {</div><div class='add'>+				eeprom: at25@0 {</div><div class='add'>+					compatible = "atmel,at25";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fab {</div><div class='add'>+			tsc@40048000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		led0 {</div><div class='add'>+			gpios = &lt;&amp;gpio 5 1 1&gt;; /* GPO_P3 1, GPIO 80, active low */</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		led1 {</div><div class='add'>+			gpios = &lt;&amp;gpio 5 14 1&gt;; /* GPO_P3 14, GPIO 93, active low */</div><div class='add'>+			linux,default-trigger = "timer";</div><div class='add'>+			default-state = "off";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/pxa168.dtsi b/arch/arm/boot/dts/pxa168.dtsi<br/>index d32d5128f225..31a718696080 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/pxa168.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/pxa168.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/pxa168.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/pxa168.dtsi</a></div><div class='hunk'>@@ -18,13 +18,6 @@</div><div class='ctx'> 		i2c1 = &amp;twsi2;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	intc: intc-interrupt-controller@d4282000 {</div><div class='del'>-		compatible = "mrvl,mmp-intc", "mrvl,intc";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0xd4282000 0x1000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	soc {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='hunk'>@@ -32,6 +25,23 @@</div><div class='ctx'> 		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> 		ranges;</div><div class='ctx'> </div><div class='add'>+		axi@d4200000 {	/* AXI */</div><div class='add'>+			compatible = "mrvl,axi-bus", "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0xd4200000 0x00200000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			intc: interrupt-controller@d4282000 {</div><div class='add'>+				compatible = "mrvl,mmp-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0xd4282000 0x1000&gt;;</div><div class='add'>+				mrvl,intc-nr-irqs = &lt;64&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		apb@d4000000 {	/* APB */</div><div class='ctx'> 			compatible = "mrvl,apb-bus", "simple-bus";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -39,40 +49,65 @@</div><div class='ctx'> 			reg = &lt;0xd4000000 0x00200000&gt;;</div><div class='ctx'> 			ranges;</div><div class='ctx'> </div><div class='add'>+			timer0: timer@d4014000 {</div><div class='add'>+				compatible = "mrvl,mmp-timer";</div><div class='add'>+				reg = &lt;0xd4014000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;13&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='ctx'> 			uart1: uart@d4017000 {</div><div class='del'>-				compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";</div><div class='add'>+				compatible = "mrvl,mmp-uart";</div><div class='ctx'> 				reg = &lt;0xd4017000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;27&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			uart2: uart@d4018000 {</div><div class='del'>-				compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";</div><div class='add'>+				compatible = "mrvl,mmp-uart";</div><div class='ctx'> 				reg = &lt;0xd4018000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;28&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			uart3: uart@d4026000 {</div><div class='del'>-				compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";</div><div class='add'>+				compatible = "mrvl,mmp-uart";</div><div class='ctx'> 				reg = &lt;0xd4026000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;29&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='del'>-			gpio: gpio@d4019000 {</div><div class='del'>-				compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";</div><div class='add'>+			gpio@d4019000 {</div><div class='add'>+				compatible = "mrvl,mmp-gpio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='ctx'> 				reg = &lt;0xd4019000 0x1000&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 				interrupts = &lt;49&gt;;</div><div class='ctx'> 				interrupt-names = "gpio_mux";</div><div class='del'>-				gpio-controller;</div><div class='del'>-				#gpio-cells = &lt;1&gt;;</div><div class='ctx'> 				interrupt-controller;</div><div class='ctx'> 				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+</div><div class='add'>+				gcb0: gpio@d4019000 {</div><div class='add'>+					reg = &lt;0xd4019000 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gcb1: gpio@d4019004 {</div><div class='add'>+					reg = &lt;0xd4019004 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gcb2: gpio@d4019008 {</div><div class='add'>+					reg = &lt;0xd4019008 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gcb3: gpio@d4019100 {</div><div class='add'>+					reg = &lt;0xd4019100 0x4&gt;;</div><div class='add'>+				};</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			twsi1: i2c@d4011000 {</div><div class='del'>-				compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";</div><div class='add'>+				compatible = "mrvl,mmp-twsi";</div><div class='ctx'> 				reg = &lt;0xd4011000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;7&gt;;</div><div class='ctx'> 				mrvl,i2c-fast-mode;</div><div class='hunk'>@@ -80,7 +115,7 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			twsi2: i2c@d4025000 {</div><div class='del'>-				compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";</div><div class='add'>+				compatible = "mrvl,mmp-twsi";</div><div class='ctx'> 				reg = &lt;0xd4025000 0x1000&gt;;</div><div class='ctx'> 				interrupts = &lt;58&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='head'>diff --git a/arch/arm/boot/dts/pxa910-dkb.dts b/arch/arm/boot/dts/pxa910-dkb.dts<br/>new file mode 100644<br/>index 000000000000..e92be5a474e7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/pxa910-dkb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/pxa910-dkb.dts</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+/*</div><div class='add'>+ *  Copyright (C) 2012 Marvell Technology Group Ltd.</div><div class='add'>+ *  Author: Haojian Zhuang &lt;haojian.zhuang@marvell.com&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *  it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ *  publishhed by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "pxa910.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Marvell PXA910 DKB Development Board";</div><div class='add'>+	compatible = "mrvl,pxa910-dkb", "mrvl,pxa910";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x00000000 0x10000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		apb@d4000000 {</div><div class='add'>+			uart1: uart@d4017000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+			twsi1: i2c@d4011000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+			rtc: rtc@d4010000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi<br/>new file mode 100644<br/>index 000000000000..aebf32de73b4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/pxa910.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/pxa910.dtsi</a></div><div class='hunk'>@@ -0,0 +1,140 @@</div><div class='add'>+/*</div><div class='add'>+ *  Copyright (C) 2012 Marvell Technology Group Ltd.</div><div class='add'>+ *  Author: Haojian Zhuang &lt;haojian.zhuang@marvell.com&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *  it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ *  publishhed by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	aliases {</div><div class='add'>+		serial0 = &amp;uart1;</div><div class='add'>+		serial1 = &amp;uart2;</div><div class='add'>+		serial2 = &amp;uart3;</div><div class='add'>+		i2c0 = &amp;twsi1;</div><div class='add'>+		i2c1 = &amp;twsi2;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	soc {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		axi@d4200000 {	/* AXI */</div><div class='add'>+			compatible = "mrvl,axi-bus", "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0xd4200000 0x00200000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			intc: interrupt-controller@d4282000 {</div><div class='add'>+				compatible = "mrvl,mmp-intc";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0xd4282000 0x1000&gt;;</div><div class='add'>+				mrvl,intc-nr-irqs = &lt;64&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb@d4000000 {	/* APB */</div><div class='add'>+			compatible = "mrvl,apb-bus", "simple-bus";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0xd4000000 0x00200000&gt;;</div><div class='add'>+			ranges;</div><div class='add'>+</div><div class='add'>+			timer0: timer@d4014000 {</div><div class='add'>+				compatible = "mrvl,mmp-timer";</div><div class='add'>+				reg = &lt;0xd4014000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;13&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timer1: timer@d4016000 {</div><div class='add'>+				compatible = "mrvl,mmp-timer";</div><div class='add'>+				reg = &lt;0xd4016000 0x100&gt;;</div><div class='add'>+				interrupts = &lt;29&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart1: uart@d4017000 {</div><div class='add'>+				compatible = "mrvl,mmp-uart";</div><div class='add'>+				reg = &lt;0xd4017000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;27&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart2: uart@d4018000 {</div><div class='add'>+				compatible = "mrvl,mmp-uart";</div><div class='add'>+				reg = &lt;0xd4018000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;28&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			uart3: uart@d4036000 {</div><div class='add'>+				compatible = "mrvl,mmp-uart";</div><div class='add'>+				reg = &lt;0xd4036000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;59&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio@d4019000 {</div><div class='add'>+				compatible = "mrvl,mmp-gpio";</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0xd4019000 0x1000&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupts = &lt;49&gt;;</div><div class='add'>+				interrupt-names = "gpio_mux";</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;1&gt;;</div><div class='add'>+				ranges;</div><div class='add'>+</div><div class='add'>+				gcb0: gpio@d4019000 {</div><div class='add'>+					reg = &lt;0xd4019000 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gcb1: gpio@d4019004 {</div><div class='add'>+					reg = &lt;0xd4019004 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gcb2: gpio@d4019008 {</div><div class='add'>+					reg = &lt;0xd4019008 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				gcb3: gpio@d4019100 {</div><div class='add'>+					reg = &lt;0xd4019100 0x4&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			twsi1: i2c@d4011000 {</div><div class='add'>+				compatible = "mrvl,mmp-twsi";</div><div class='add'>+				reg = &lt;0xd4011000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;7&gt;;</div><div class='add'>+				mrvl,i2c-fast-mode;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			twsi2: i2c@d4037000 {</div><div class='add'>+				compatible = "mrvl,mmp-twsi";</div><div class='add'>+				reg = &lt;0xd4037000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;54&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc: rtc@d4010000 {</div><div class='add'>+				compatible = "mrvl,mmp-rtc";</div><div class='add'>+				reg = &lt;0xd4010000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;5 6&gt;;</div><div class='add'>+				interrupt-names = "rtc 1Hz", "rtc alarm";</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts<br/>new file mode 100644<br/>index 000000000000..a7505a95a3b7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/r8a7740-armadillo800eva.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/r8a7740-armadillo800eva.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the armadillo 800 eva board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Renesas Solutions Corp.</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public License</div><div class='add'>+ * version 2.  This program is licensed "as is" without any warranty of any</div><div class='add'>+ * kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "armadillo 800 eva";</div><div class='add'>+	compatible = "renesas,armadillo800eva";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x40000000 0x20000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi<br/>new file mode 100644<br/>index 000000000000..677fc603f8b3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sh7372.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/sh7372.dtsi</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the sh7372 SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Renesas Solutions Corp.</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public License</div><div class='add'>+ * version 2.  This program is licensed "as is" without any warranty of any</div><div class='add'>+ * kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "renesas,sh7372";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a8";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts<br/>new file mode 100644<br/>index 000000000000..bcb911951978<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/sh73a0-kzm9g.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/sh73a0-kzm9g.dts</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+/*</div><div class='add'>+ * Device Tree Source for the KZM-A9-GT board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Renesas Solutions Corp.</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public License</div><div class='add'>+ * version 2.  This program is licensed "as is" without any warranty of any</div><div class='add'>+ * kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "KZM-A9-GT";</div><div class='add'>+	compatible = "renesas,kzm9g", "renesas,sh73a0";</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0x41000000 0x1e800000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts<br/>index 359c6d679156..ec3c33975110 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/snowball.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/snowball.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/snowball.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/snowball.dts</a></div><div class='hunk'>@@ -20,6 +20,16 @@</div><div class='ctx'> 		reg = &lt;0x00000000 0x20000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	en_3v3_reg: en_3v3 {</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='add'>+                regulator-name = "en-3v3-fixed-supply";</div><div class='add'>+                regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+                regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                gpios = &lt;&amp;gpio0 26  0x4&gt;; // 26</div><div class='add'>+                startup-delay-us = &lt;5000&gt;;</div><div class='add'>+                enable-active-high;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	gpio_keys {</div><div class='ctx'> 		compatible = "gpio-keys";</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -30,35 +40,35 @@</div><div class='ctx'> 			wakeup = &lt;1&gt;;</div><div class='ctx'> 			linux,code = &lt;2&gt;;</div><div class='ctx'> 			label = "userpb";</div><div class='del'>-			gpios = &lt;&amp;gpio1 0&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio1 0 0x4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		button@2 {</div><div class='ctx'> 			debounce_interval = &lt;50&gt;;</div><div class='ctx'> 			wakeup = &lt;1&gt;;</div><div class='ctx'> 			linux,code = &lt;3&gt;;</div><div class='del'>-			label = "userpb";</div><div class='del'>-			gpios = &lt;&amp;gpio4 23&gt;;</div><div class='add'>+			label = "extkb1";</div><div class='add'>+			gpios = &lt;&amp;gpio4 23 0x4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		button@3 {</div><div class='ctx'> 			debounce_interval = &lt;50&gt;;</div><div class='ctx'> 			wakeup = &lt;1&gt;;</div><div class='ctx'> 			linux,code = &lt;4&gt;;</div><div class='del'>-			label = "userpb";</div><div class='del'>-			gpios = &lt;&amp;gpio4 23&gt;;</div><div class='add'>+			label = "extkb2";</div><div class='add'>+			gpios = &lt;&amp;gpio4 24 0x4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		button@4 {</div><div class='ctx'> 			debounce_interval = &lt;50&gt;;</div><div class='ctx'> 			wakeup = &lt;1&gt;;</div><div class='ctx'> 			linux,code = &lt;5&gt;;</div><div class='del'>-			label = "userpb";</div><div class='del'>-			gpios = &lt;&amp;gpio5 1&gt;;</div><div class='add'>+			label = "extkb3";</div><div class='add'>+			gpios = &lt;&amp;gpio5 1 0x4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		button@5 {</div><div class='ctx'> 			debounce_interval = &lt;50&gt;;</div><div class='ctx'> 			wakeup = &lt;1&gt;;</div><div class='ctx'> 			linux,code = &lt;6&gt;;</div><div class='del'>-			label = "userpb";</div><div class='del'>-			gpios = &lt;&amp;gpio5 2&gt;;</div><div class='add'>+			label = "extkb4";</div><div class='add'>+			gpios = &lt;&amp;gpio5 2 0x4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -66,34 +76,40 @@</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='ctx'> 		used-led {</div><div class='ctx'> 			label = "user_led";</div><div class='del'>-			gpios = &lt;&amp;gpio4 14&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio4 14 0x4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	soc-u9500 {</div><div class='del'>-</div><div class='ctx'> 		external-bus@50000000 {</div><div class='del'>-			compatible = "simple-bus";</div><div class='del'>-			reg = &lt;0x50000000 0x10000000&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			ranges;</div><div class='del'>-</div><div class='del'>-			ethernet@50000000 {</div><div class='del'>-				compatible = "smsc,9111";</div><div class='del'>-				reg = &lt;0x50000000 0x10000&gt;;</div><div class='del'>-				interrupts = &lt;12&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			ethernet@0 {</div><div class='add'>+				compatible = "smsc,lan9115";</div><div class='add'>+				reg = &lt;0 0x10000&gt;;</div><div class='add'>+				interrupts = &lt;12 0x1&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+				vdd33a-supply = &lt;&amp;en_3v3_reg&gt;;</div><div class='add'>+				vddvario-supply = &lt;&amp;db8500_vape_reg&gt;;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+				reg-shift = &lt;1&gt;;</div><div class='add'>+				reg-io-width = &lt;2&gt;;</div><div class='add'>+				smsc,force-internal-phy;</div><div class='add'>+				smsc,irq-active-high;</div><div class='add'>+				smsc,irq-push-pull;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sdi@80126000 {</div><div class='ctx'> 			status = "enabled";</div><div class='del'>-			cd-gpios = &lt;&amp;gpio6 26&gt;;</div><div class='add'>+			vmmc-supply = &lt;&amp;ab8500_ldo_aux3_reg&gt;;</div><div class='add'>+			cd-gpios  = &lt;&amp;gpio6 26 0x4&gt;; // 218</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		sdi@80114000 {</div><div class='ctx'> 			status = "enabled";</div><div class='add'>+			vmmc-supply = &lt;&amp;ab8500_ldo_aux2_reg&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		uart@80120000 {</div><div class='hunk'>@@ -112,7 +128,7 @@</div><div class='ctx'> 			tc3589x@42 {</div><div class='ctx'> 				//compatible = "tc3589x";</div><div class='ctx'> 				reg = &lt;0x42&gt;;</div><div class='del'>-				interrupts = &lt;25&gt;;</div><div class='add'>+				gpios = &lt;&amp;gpio6 25 0x4&gt;;</div><div class='ctx'> 				interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 			tps61052@33 {</div><div class='head'>diff --git a/arch/arm/boot/dts/spear1310-evb.dts b/arch/arm/boot/dts/spear1310-evb.dts<br/>new file mode 100644<br/>index 000000000000..8314e4171884<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear1310-evb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear1310-evb.dts</a></div><div class='hunk'>@@ -0,0 +1,292 @@</div><div class='add'>+/*</div><div class='add'>+ * DTS file for SPEAr1310 Evaluation Baord</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "spear1310.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ST SPEAr1310 Evaluation Board";</div><div class='add'>+	compatible = "st,spear1310-evb", "st,spear1310";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		pinmux@e0700000 {</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+			state_default: pinmux {</div><div class='add'>+				i2c0-pmx {</div><div class='add'>+					st,pins = "i2c0_grp";</div><div class='add'>+					st,function = "i2c0";</div><div class='add'>+				};</div><div class='add'>+				i2s1 {</div><div class='add'>+					st,pins = "i2s1_grp";</div><div class='add'>+					st,function = "i2s1";</div><div class='add'>+				};</div><div class='add'>+				gpio {</div><div class='add'>+					st,pins = "arm_gpio_grp";</div><div class='add'>+					st,function = "arm_gpio";</div><div class='add'>+				};</div><div class='add'>+				eth {</div><div class='add'>+					st,pins = "gmii_grp";</div><div class='add'>+					st,function = "gmii";</div><div class='add'>+				};</div><div class='add'>+				ssp0 {</div><div class='add'>+					st,pins = "ssp0_grp";</div><div class='add'>+					st,function = "ssp0";</div><div class='add'>+				};</div><div class='add'>+				kbd {</div><div class='add'>+					st,pins = "keyboard_6x6_grp";</div><div class='add'>+					st,function = "keyboard";</div><div class='add'>+				};</div><div class='add'>+				sdhci {</div><div class='add'>+					st,pins = "sdhci_grp";</div><div class='add'>+					st,function = "sdhci";</div><div class='add'>+				};</div><div class='add'>+				smi-pmx {</div><div class='add'>+					st,pins = "smi_2_chips_grp";</div><div class='add'>+					st,function = "smi";</div><div class='add'>+				};</div><div class='add'>+				uart0 {</div><div class='add'>+					st,pins = "uart0_grp";</div><div class='add'>+					st,function = "uart0";</div><div class='add'>+				};</div><div class='add'>+				rs485 {</div><div class='add'>+					st,pins = "rs485_0_1_tdm_0_1_grp";</div><div class='add'>+					st,function = "rs485_0_1_tdm_0_1";</div><div class='add'>+				};</div><div class='add'>+				i2c1_2 {</div><div class='add'>+					st,pins = "i2c_1_2_grp";</div><div class='add'>+					st,function = "i2c_1_2";</div><div class='add'>+				};</div><div class='add'>+				pci {</div><div class='add'>+					st,pins = "pcie0_grp","pcie1_grp",</div><div class='add'>+						"pcie2_grp";</div><div class='add'>+					st,function = "pci";</div><div class='add'>+				};</div><div class='add'>+				smii {</div><div class='add'>+					st,pins = "smii_0_1_2_grp";</div><div class='add'>+					st,function = "smii_0_1_2";</div><div class='add'>+				};</div><div class='add'>+				nand {</div><div class='add'>+					st,pins = "nand_8bit_grp",</div><div class='add'>+						"nand_16bit_grp";</div><div class='add'>+					st,function = "nand";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ahci@b1000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cf@b2800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma@ea800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma@eb000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fsmc: flash@b0000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac0: eth@e2000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci@b3000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smi: flash@ea000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			clock-rate=&lt;50000000&gt;;</div><div class='add'>+</div><div class='add'>+			flash@e6000000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0xe6000000 0x800000&gt;;</div><div class='add'>+				st,smi-fast-mode;</div><div class='add'>+</div><div class='add'>+				partition@0 {</div><div class='add'>+					label = "xloader";</div><div class='add'>+					reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@10000 {</div><div class='add'>+					label = "u-boot";</div><div class='add'>+					reg = &lt;0x10000 0x40000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@50000 {</div><div class='add'>+					label = "linux";</div><div class='add'>+					reg = &lt;0x50000 0x2c0000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@310000 {</div><div class='add'>+					label = "rootfs";</div><div class='add'>+					reg = &lt;0x310000 0x4f0000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@e0100000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci@e4800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci@e5800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e4000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e5000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			adc@e0080000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio0: gpio@e0600000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio1: gpio@e0680000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@e0280000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@5cd00000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kbd@e0300000 {</div><div class='add'>+				linux,keymap = &lt; 0x00000001</div><div class='add'>+						 0x00010002</div><div class='add'>+						 0x00020003</div><div class='add'>+						 0x00030004</div><div class='add'>+						 0x00040005</div><div class='add'>+						 0x00050006</div><div class='add'>+						 0x00060007</div><div class='add'>+						 0x00070008</div><div class='add'>+						 0x00080009</div><div class='add'>+						 0x0100000a</div><div class='add'>+						 0x0101000c</div><div class='add'>+						 0x0102000d</div><div class='add'>+						 0x0103000e</div><div class='add'>+						 0x0104000f</div><div class='add'>+						 0x01050010</div><div class='add'>+						 0x01060011</div><div class='add'>+						 0x01070012</div><div class='add'>+						 0x01080013</div><div class='add'>+						 0x02000014</div><div class='add'>+						 0x02010015</div><div class='add'>+						 0x02020016</div><div class='add'>+						 0x02030017</div><div class='add'>+						 0x02040018</div><div class='add'>+						 0x02050019</div><div class='add'>+						 0x0206001a</div><div class='add'>+						 0x0207001b</div><div class='add'>+						 0x0208001c</div><div class='add'>+						 0x0300001d</div><div class='add'>+						 0x0301001e</div><div class='add'>+						 0x0302001f</div><div class='add'>+						 0x03030020</div><div class='add'>+						 0x03040021</div><div class='add'>+						 0x03050022</div><div class='add'>+						 0x03060023</div><div class='add'>+						 0x03070024</div><div class='add'>+						 0x03080025</div><div class='add'>+						 0x04000026</div><div class='add'>+						 0x04010027</div><div class='add'>+						 0x04020028</div><div class='add'>+						 0x04030029</div><div class='add'>+						 0x0404002a</div><div class='add'>+						 0x0405002b</div><div class='add'>+						 0x0406002c</div><div class='add'>+						 0x0407002d</div><div class='add'>+						 0x0408002e</div><div class='add'>+						 0x0500002f</div><div class='add'>+						 0x05010030</div><div class='add'>+						 0x05020031</div><div class='add'>+						 0x05030032</div><div class='add'>+						 0x05040033</div><div class='add'>+						 0x05050034</div><div class='add'>+						 0x05060035</div><div class='add'>+						 0x05070036</div><div class='add'>+						 0x05080037</div><div class='add'>+						 0x06000038</div><div class='add'>+						 0x06010039</div><div class='add'>+						 0x0602003a</div><div class='add'>+						 0x0603003b</div><div class='add'>+						 0x0604003c</div><div class='add'>+						 0x0605003d</div><div class='add'>+						 0x0606003e</div><div class='add'>+						 0x0607003f</div><div class='add'>+						 0x06080040</div><div class='add'>+						 0x07000041</div><div class='add'>+						 0x07010042</div><div class='add'>+						 0x07020043</div><div class='add'>+						 0x07030044</div><div class='add'>+						 0x07040045</div><div class='add'>+						 0x07050046</div><div class='add'>+						 0x07060047</div><div class='add'>+						 0x07070048</div><div class='add'>+						 0x07080049</div><div class='add'>+						 0x0800004a</div><div class='add'>+						 0x0801004b</div><div class='add'>+						 0x0802004c</div><div class='add'>+						 0x0803004d</div><div class='add'>+						 0x0804004e</div><div class='add'>+						 0x0805004f</div><div class='add'>+						 0x08060050</div><div class='add'>+						 0x08070051</div><div class='add'>+						 0x08080052 &gt;;</div><div class='add'>+			       autorepeat;</div><div class='add'>+			       st,mode = &lt;0&gt;;</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@e0580000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@e0000000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdt@ec800620 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi<br/>new file mode 100644<br/>index 000000000000..9e61da404d57<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear1310.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear1310.dtsi</a></div><div class='hunk'>@@ -0,0 +1,184 @@</div><div class='add'>+/*</div><div class='add'>+ * DTS file for all SPEAr1310 SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "spear13xx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "st,spear1310";</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		ahci@b1000000 {</div><div class='add'>+			compatible = "snps,spear-ahci";</div><div class='add'>+			reg = &lt;0xb1000000 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;0 68 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ahci@b1800000 {</div><div class='add'>+			compatible = "snps,spear-ahci";</div><div class='add'>+			reg = &lt;0xb1800000 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;0 69 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ahci@b4000000 {</div><div class='add'>+			compatible = "snps,spear-ahci";</div><div class='add'>+			reg = &lt;0xb4000000 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;0 70 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac1: eth@5c400000 {</div><div class='add'>+			compatible = "st,spear600-gmac";</div><div class='add'>+			reg = &lt;0x5c400000 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;0 95 0x4&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac2: eth@5c500000 {</div><div class='add'>+			compatible = "st,spear600-gmac";</div><div class='add'>+			reg = &lt;0x5c500000 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;0 96 0x4&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac3: eth@5c600000 {</div><div class='add'>+			compatible = "st,spear600-gmac";</div><div class='add'>+			reg = &lt;0x5c600000 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;0 97 0x4&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac4: eth@5c700000 {</div><div class='add'>+			compatible = "st,spear600-gmac";</div><div class='add'>+			reg = &lt;0x5c700000 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;0 98 0x4&gt;;</div><div class='add'>+			interrupt-names = "macirq";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@5d400000 {</div><div class='add'>+			compatible = "arm,pl022", "arm,primecell";</div><div class='add'>+			reg = &lt;0x5d400000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 99 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			i2c1: i2c@5cd00000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "snps,designware-i2c";</div><div class='add'>+				reg = &lt;0x5cd00000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 87 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c2: i2c@5ce00000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "snps,designware-i2c";</div><div class='add'>+				reg = &lt;0x5ce00000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 88 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c3: i2c@5cf00000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "snps,designware-i2c";</div><div class='add'>+				reg = &lt;0x5cf00000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 89 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c4: i2c@5d000000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "snps,designware-i2c";</div><div class='add'>+				reg = &lt;0x5d000000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 90 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c5: i2c@5d100000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "snps,designware-i2c";</div><div class='add'>+				reg = &lt;0x5d100000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 91 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c6: i2c@5d200000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "snps,designware-i2c";</div><div class='add'>+				reg = &lt;0x5d200000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 92 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c7: i2c@5d300000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "snps,designware-i2c";</div><div class='add'>+				reg = &lt;0x5d300000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 93 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@5c800000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0x5c800000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 82 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@5c900000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0x5c900000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 83 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@5ca00000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0x5ca00000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 84 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@5cb00000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0x5cb00000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 85 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@5cc00000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0x5cc00000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 86 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			thermal@e07008c4 {</div><div class='add'>+				st,thermal-flags = &lt;0x7000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/spear1340-evb.dts b/arch/arm/boot/dts/spear1340-evb.dts<br/>new file mode 100644<br/>index 000000000000..0d8472e5ab9f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear1340-evb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear1340-evb.dts</a></div><div class='hunk'>@@ -0,0 +1,308 @@</div><div class='add'>+/*</div><div class='add'>+ * DTS file for SPEAr1340 Evaluation Baord</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "spear1340.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ST SPEAr1340 Evaluation Board";</div><div class='add'>+	compatible = "st,spear1340-evb", "st,spear1340";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		pinmux@e0700000 {</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+			state_default: pinmux {</div><div class='add'>+				pads_as_gpio {</div><div class='add'>+					st,pins = "pads_as_gpio_grp";</div><div class='add'>+					st,function = "pads_as_gpio";</div><div class='add'>+				};</div><div class='add'>+				fsmc {</div><div class='add'>+					st,pins = "fsmc_8bit_grp";</div><div class='add'>+					st,function = "fsmc";</div><div class='add'>+				};</div><div class='add'>+				kbd {</div><div class='add'>+					st,pins = "keyboard_row_col_grp",</div><div class='add'>+						"keyboard_col5_grp";</div><div class='add'>+					st,function = "keyboard";</div><div class='add'>+				};</div><div class='add'>+				uart0 {</div><div class='add'>+					st,pins = "uart0_grp", "uart0_enh_grp";</div><div class='add'>+					st,function = "uart0";</div><div class='add'>+				};</div><div class='add'>+				i2c0-pmx {</div><div class='add'>+					st,pins = "i2c0_grp";</div><div class='add'>+					st,function = "i2c0";</div><div class='add'>+				};</div><div class='add'>+				i2c1-pmx {</div><div class='add'>+					st,pins = "i2c1_grp";</div><div class='add'>+					st,function = "i2c1";</div><div class='add'>+				};</div><div class='add'>+				spdif-in {</div><div class='add'>+					st,pins = "spdif_in_grp";</div><div class='add'>+					st,function = "spdif_in";</div><div class='add'>+				};</div><div class='add'>+				spdif-out {</div><div class='add'>+					st,pins = "spdif_out_grp";</div><div class='add'>+					st,function = "spdif_out";</div><div class='add'>+				};</div><div class='add'>+				ssp0 {</div><div class='add'>+					st,pins = "ssp0_grp", "ssp0_cs1_grp",</div><div class='add'>+						"ssp0_cs3_grp";</div><div class='add'>+					st,function = "ssp0";</div><div class='add'>+				};</div><div class='add'>+				pwm {</div><div class='add'>+					st,pins = "pwm2_grp", "pwm3_grp";</div><div class='add'>+					st,function = "pwm";</div><div class='add'>+				};</div><div class='add'>+				smi-pmx {</div><div class='add'>+					st,pins = "smi_grp";</div><div class='add'>+					st,function = "smi";</div><div class='add'>+				};</div><div class='add'>+				i2s {</div><div class='add'>+					st,pins = "i2s_in_grp", "i2s_out_grp";</div><div class='add'>+					st,function = "i2s";</div><div class='add'>+				};</div><div class='add'>+				gmac {</div><div class='add'>+					st,pins = "gmii_grp", "rgmii_grp";</div><div class='add'>+					st,function = "gmac";</div><div class='add'>+				};</div><div class='add'>+				cam3 {</div><div class='add'>+					st,pins = "cam3_grp";</div><div class='add'>+					st,function = "cam3";</div><div class='add'>+				};</div><div class='add'>+				cec0 {</div><div class='add'>+					st,pins = "cec0_grp";</div><div class='add'>+					st,function = "cec0";</div><div class='add'>+				};</div><div class='add'>+				cec1 {</div><div class='add'>+					st,pins = "cec1_grp";</div><div class='add'>+					st,function = "cec1";</div><div class='add'>+				};</div><div class='add'>+				sdhci {</div><div class='add'>+					st,pins = "sdhci_grp";</div><div class='add'>+					st,function = "sdhci";</div><div class='add'>+				};</div><div class='add'>+				clcd {</div><div class='add'>+					st,pins = "clcd_grp";</div><div class='add'>+					st,function = "clcd";</div><div class='add'>+				};</div><div class='add'>+				sata {</div><div class='add'>+					st,pins = "sata_grp";</div><div class='add'>+					st,function = "sata";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma@ea800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma@eb000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fsmc: flash@b0000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac0: eth@e2000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci@b3000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smi: flash@ea000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			clock-rate=&lt;50000000&gt;;</div><div class='add'>+</div><div class='add'>+			flash@e6000000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0xe6000000 0x800000&gt;;</div><div class='add'>+				st,smi-fast-mode;</div><div class='add'>+</div><div class='add'>+				partition@0 {</div><div class='add'>+					label = "xloader";</div><div class='add'>+					reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@10000 {</div><div class='add'>+					label = "u-boot";</div><div class='add'>+					reg = &lt;0x10000 0x40000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@50000 {</div><div class='add'>+					label = "linux";</div><div class='add'>+					reg = &lt;0x50000 0x2c0000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@310000 {</div><div class='add'>+					label = "rootfs";</div><div class='add'>+					reg = &lt;0x310000 0x4f0000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@e0100000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci@e4800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci@e5800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e4000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e5000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			adc@e0080000 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio0: gpio@e0600000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio1: gpio@e0680000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@e0280000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@b4000000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kbd@e0300000 {</div><div class='add'>+				linux,keymap = &lt; 0x00000001</div><div class='add'>+						 0x00010002</div><div class='add'>+						 0x00020003</div><div class='add'>+						 0x00030004</div><div class='add'>+						 0x00040005</div><div class='add'>+						 0x00050006</div><div class='add'>+						 0x00060007</div><div class='add'>+						 0x00070008</div><div class='add'>+						 0x00080009</div><div class='add'>+						 0x0100000a</div><div class='add'>+						 0x0101000c</div><div class='add'>+						 0x0102000d</div><div class='add'>+						 0x0103000e</div><div class='add'>+						 0x0104000f</div><div class='add'>+						 0x01050010</div><div class='add'>+						 0x01060011</div><div class='add'>+						 0x01070012</div><div class='add'>+						 0x01080013</div><div class='add'>+						 0x02000014</div><div class='add'>+						 0x02010015</div><div class='add'>+						 0x02020016</div><div class='add'>+						 0x02030017</div><div class='add'>+						 0x02040018</div><div class='add'>+						 0x02050019</div><div class='add'>+						 0x0206001a</div><div class='add'>+						 0x0207001b</div><div class='add'>+						 0x0208001c</div><div class='add'>+						 0x0300001d</div><div class='add'>+						 0x0301001e</div><div class='add'>+						 0x0302001f</div><div class='add'>+						 0x03030020</div><div class='add'>+						 0x03040021</div><div class='add'>+						 0x03050022</div><div class='add'>+						 0x03060023</div><div class='add'>+						 0x03070024</div><div class='add'>+						 0x03080025</div><div class='add'>+						 0x04000026</div><div class='add'>+						 0x04010027</div><div class='add'>+						 0x04020028</div><div class='add'>+						 0x04030029</div><div class='add'>+						 0x0404002a</div><div class='add'>+						 0x0405002b</div><div class='add'>+						 0x0406002c</div><div class='add'>+						 0x0407002d</div><div class='add'>+						 0x0408002e</div><div class='add'>+						 0x0500002f</div><div class='add'>+						 0x05010030</div><div class='add'>+						 0x05020031</div><div class='add'>+						 0x05030032</div><div class='add'>+						 0x05040033</div><div class='add'>+						 0x05050034</div><div class='add'>+						 0x05060035</div><div class='add'>+						 0x05070036</div><div class='add'>+						 0x05080037</div><div class='add'>+						 0x06000038</div><div class='add'>+						 0x06010039</div><div class='add'>+						 0x0602003a</div><div class='add'>+						 0x0603003b</div><div class='add'>+						 0x0604003c</div><div class='add'>+						 0x0605003d</div><div class='add'>+						 0x0606003e</div><div class='add'>+						 0x0607003f</div><div class='add'>+						 0x06080040</div><div class='add'>+						 0x07000041</div><div class='add'>+						 0x07010042</div><div class='add'>+						 0x07020043</div><div class='add'>+						 0x07030044</div><div class='add'>+						 0x07040045</div><div class='add'>+						 0x07050046</div><div class='add'>+						 0x07060047</div><div class='add'>+						 0x07070048</div><div class='add'>+						 0x07080049</div><div class='add'>+						 0x0800004a</div><div class='add'>+						 0x0801004b</div><div class='add'>+						 0x0802004c</div><div class='add'>+						 0x0803004d</div><div class='add'>+						 0x0804004e</div><div class='add'>+						 0x0805004f</div><div class='add'>+						 0x08060050</div><div class='add'>+						 0x08070051</div><div class='add'>+						 0x08080052 &gt;;</div><div class='add'>+			       autorepeat;</div><div class='add'>+			       st,mode = &lt;0&gt;;</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@e0580000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@e0000000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@b4100000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdt@ec800620 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi<br/>new file mode 100644<br/>index 000000000000..a26fc47a55e8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear1340.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear1340.dtsi</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+/*</div><div class='add'>+ * DTS file for all SPEAr1340 SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "spear13xx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	compatible = "st,spear1340";</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		ahci@b1000000 {</div><div class='add'>+			compatible = "snps,spear-ahci";</div><div class='add'>+			reg = &lt;0xb1000000 0x10000&gt;;</div><div class='add'>+			interrupts = &lt;0 72 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@5d400000 {</div><div class='add'>+			compatible = "arm,pl022", "arm,primecell";</div><div class='add'>+			reg = &lt;0x5d400000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 99 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			i2c1: i2c@b4000000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "snps,designware-i2c";</div><div class='add'>+				reg = &lt;0xb4000000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 104 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@b4100000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0xb4100000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 105 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			thermal@e07008c4 {</div><div class='add'>+				st,thermal-flags = &lt;0x2a00&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi<br/>new file mode 100644<br/>index 000000000000..1f8e1e1481df<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear13xx.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear13xx.dtsi</a></div><div class='hunk'>@@ -0,0 +1,262 @@</div><div class='add'>+/*</div><div class='add'>+ * DTS file for all SPEAr13xx SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			reg = &lt;0&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cpu@1 {</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='add'>+			reg = &lt;1&gt;;</div><div class='add'>+			next-level-cache = &lt;&amp;L2&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gic: interrupt-controller@ec801000 {</div><div class='add'>+		compatible = "arm,cortex-a9-gic";</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;3&gt;;</div><div class='add'>+		reg = &lt; 0xec801000 0x1000 &gt;,</div><div class='add'>+		      &lt; 0xec800100 0x0100 &gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a9-pmu";</div><div class='add'>+		interrupts = &lt;0 8 0x04</div><div class='add'>+			      0 9 0x04&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	L2: l2-cache {</div><div class='add'>+		    compatible = "arm,pl310-cache";</div><div class='add'>+		    reg = &lt;0xed000000 0x1000&gt;;</div><div class='add'>+		    cache-unified;</div><div class='add'>+		    cache-level = &lt;2&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		name = "memory";</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyAMA0,115200";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x50000000 0x50000000 0x10000000</div><div class='add'>+			  0xb0000000 0xb0000000 0x10000000</div><div class='add'>+			  0xe0000000 0xe0000000 0x10000000&gt;;</div><div class='add'>+</div><div class='add'>+		sdhci@b3000000 {</div><div class='add'>+			compatible = "st,sdhci-spear";</div><div class='add'>+			reg = &lt;0xb3000000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;0 28 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cf@b2800000 {</div><div class='add'>+			compatible = "arasan,cf-spear1340";</div><div class='add'>+			reg = &lt;0xb2800000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;0 29 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma@ea800000 {</div><div class='add'>+			compatible = "snps,dma-spear1340";</div><div class='add'>+			reg = &lt;0xea800000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 19 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma@eb000000 {</div><div class='add'>+			compatible = "snps,dma-spear1340";</div><div class='add'>+			reg = &lt;0xeb000000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 59 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fsmc: flash@b0000000 {</div><div class='add'>+			compatible = "st,spear600-fsmc-nand";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0xb0000000 0x1000	/* FSMC Register */</div><div class='add'>+			       0xb0800000 0x0010&gt;;	/* NAND Base */</div><div class='add'>+			reg-names = "fsmc_regs", "nand_data";</div><div class='add'>+			interrupts = &lt;0 20 0x4</div><div class='add'>+				      0 21 0x4</div><div class='add'>+				      0 22 0x4</div><div class='add'>+				      0 23 0x4&gt;;</div><div class='add'>+			st,ale-off = &lt;0x20000&gt;;</div><div class='add'>+			st,cle-off = &lt;0x10000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac0: eth@e2000000 {</div><div class='add'>+			compatible = "st,spear600-gmac";</div><div class='add'>+			reg = &lt;0xe2000000 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;0 23 0x4</div><div class='add'>+				      0 24 0x4&gt;;</div><div class='add'>+			interrupt-names = "macirq", "eth_wake_irq";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smi: flash@ea000000 {</div><div class='add'>+			compatible = "st,spear600-smi";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0xea000000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 30 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@e0100000 {</div><div class='add'>+			compatible = "arm,pl022", "arm,primecell";</div><div class='add'>+			reg = &lt;0xe0100000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 31 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci@e4800000 {</div><div class='add'>+			compatible = "st,spear600-ehci", "usb-ehci";</div><div class='add'>+			reg = &lt;0xe4800000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 64 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci@e5800000 {</div><div class='add'>+			compatible = "st,spear600-ehci", "usb-ehci";</div><div class='add'>+			reg = &lt;0xe5800000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 66 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e4000000 {</div><div class='add'>+			compatible = "st,spear600-ohci", "usb-ohci";</div><div class='add'>+			reg = &lt;0xe4000000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 65 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e5000000 {</div><div class='add'>+			compatible = "st,spear600-ohci", "usb-ohci";</div><div class='add'>+			reg = &lt;0xe5000000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;0 67 0x4&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges = &lt;0x50000000 0x50000000 0x10000000</div><div class='add'>+				  0xb0000000 0xb0000000 0x10000000</div><div class='add'>+				  0xe0000000 0xe0000000 0x10000000&gt;;</div><div class='add'>+</div><div class='add'>+			gpio0: gpio@e0600000 {</div><div class='add'>+				compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+				reg = &lt;0xe0600000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 24 0x4&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio1: gpio@e0680000 {</div><div class='add'>+				compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+				reg = &lt;0xe0680000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 25 0x4&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kbd@e0300000 {</div><div class='add'>+				compatible = "st,spear300-kbd";</div><div class='add'>+				reg = &lt;0xe0300000 0x1000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@e0280000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "snps,designware-i2c";</div><div class='add'>+				reg = &lt;0xe0280000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 41 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@e0580000 {</div><div class='add'>+				compatible = "st,spear-rtc";</div><div class='add'>+				reg = &lt;0xe0580000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 36 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@e0000000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0xe0000000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 36 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			adc@e0080000 {</div><div class='add'>+				compatible = "st,spear600-adc";</div><div class='add'>+				reg = &lt;0xe0080000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;0 44 0x4&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timer@e0380000 {</div><div class='add'>+				compatible = "st,spear-timer";</div><div class='add'>+				reg = &lt;0xe0380000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;0 37 0x4&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timer@ec800600 {</div><div class='add'>+				compatible = "arm,cortex-a9-twd-timer";</div><div class='add'>+				reg = &lt;0xec800600 0x20&gt;;</div><div class='add'>+				interrupts = &lt;1 13 0x301&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdt@ec800620 {</div><div class='add'>+				compatible = "arm,cortex-a9-twd-wdt";</div><div class='add'>+				reg = &lt;0xec800620 0x20&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			thermal@e07008c4 {</div><div class='add'>+				compatible = "st,thermal-spear1340";</div><div class='add'>+				reg = &lt;0xe07008c4 0x4&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts<br/>new file mode 100644<br/>index 000000000000..fc82b1a26458<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear300-evb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear300-evb.dts</a></div><div class='hunk'>@@ -0,0 +1,246 @@</div><div class='add'>+/*</div><div class='add'>+ * DTS file for SPEAr300 Evaluation Baord</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "spear300.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ST SPEAr300 Evaluation Board";</div><div class='add'>+	compatible = "st,spear300-evb", "st,spear300";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		pinmux@99000000 {</div><div class='add'>+			st,pinmux-mode = &lt;2&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+			state_default: pinmux {</div><div class='add'>+				i2c0 {</div><div class='add'>+					st,pins = "i2c0_grp";</div><div class='add'>+					st,function = "i2c0";</div><div class='add'>+				};</div><div class='add'>+				ssp0 {</div><div class='add'>+					st,pins = "ssp0_grp";</div><div class='add'>+					st,function = "ssp0";</div><div class='add'>+				};</div><div class='add'>+				mii0 {</div><div class='add'>+					st,pins = "mii0_grp";</div><div class='add'>+					st,function = "mii0";</div><div class='add'>+				};</div><div class='add'>+				uart0 {</div><div class='add'>+					st,pins = "uart0_grp";</div><div class='add'>+					st,function = "uart0";</div><div class='add'>+				};</div><div class='add'>+				clcd {</div><div class='add'>+					st,pins = "clcd_pfmode_grp";</div><div class='add'>+					st,function = "clcd";</div><div class='add'>+				};</div><div class='add'>+				sdhci {</div><div class='add'>+					st,pins = "sdhci_4bit_grp";</div><div class='add'>+					st,function = "sdhci";</div><div class='add'>+				};</div><div class='add'>+				gpio1 {</div><div class='add'>+					st,pins = "gpio1_4_to_7_grp",</div><div class='add'>+						"gpio1_0_to_3_grp";</div><div class='add'>+					st,function = "gpio1";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clcd@60000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma@fc400000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fsmc: flash@94000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac: eth@e0800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci@70000000 {</div><div class='add'>+			int-gpio = &lt;&amp;gpio1 0 0&gt;;</div><div class='add'>+			power-gpio = &lt;&amp;gpio1 2 1&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smi: flash@fc000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			clock-rate=&lt;50000000&gt;;</div><div class='add'>+</div><div class='add'>+			flash@f8000000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0xf8000000 0x800000&gt;;</div><div class='add'>+				st,smi-fast-mode;</div><div class='add'>+</div><div class='add'>+				partition@0 {</div><div class='add'>+					label = "xloader";</div><div class='add'>+					reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@10000 {</div><div class='add'>+					label = "u-boot";</div><div class='add'>+					reg = &lt;0x10000 0x40000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@50000 {</div><div class='add'>+					label = "linux";</div><div class='add'>+					reg = &lt;0x50000 0x2c0000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@310000 {</div><div class='add'>+					label = "rootfs";</div><div class='add'>+					reg = &lt;0x310000 0x4f0000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@d0100000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci@e1800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e1900000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e2100000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			gpio0: gpio@fc980000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			gpio1: gpio@a9000000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@d0180000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kbd@a0000000 {</div><div class='add'>+				linux,keymap = &lt; 0x00000001</div><div class='add'>+						 0x00010002</div><div class='add'>+						 0x00020003</div><div class='add'>+						 0x00030004</div><div class='add'>+						 0x00040005</div><div class='add'>+						 0x00050006</div><div class='add'>+						 0x00060007</div><div class='add'>+						 0x00070008</div><div class='add'>+						 0x00080009</div><div class='add'>+						 0x0100000a</div><div class='add'>+						 0x0101000c</div><div class='add'>+						 0x0102000d</div><div class='add'>+						 0x0103000e</div><div class='add'>+						 0x0104000f</div><div class='add'>+						 0x01050010</div><div class='add'>+						 0x01060011</div><div class='add'>+						 0x01070012</div><div class='add'>+						 0x01080013</div><div class='add'>+						 0x02000014</div><div class='add'>+						 0x02010015</div><div class='add'>+						 0x02020016</div><div class='add'>+						 0x02030017</div><div class='add'>+						 0x02040018</div><div class='add'>+						 0x02050019</div><div class='add'>+						 0x0206001a</div><div class='add'>+						 0x0207001b</div><div class='add'>+						 0x0208001c</div><div class='add'>+						 0x0300001d</div><div class='add'>+						 0x0301001e</div><div class='add'>+						 0x0302001f</div><div class='add'>+						 0x03030020</div><div class='add'>+						 0x03040021</div><div class='add'>+						 0x03050022</div><div class='add'>+						 0x03060023</div><div class='add'>+						 0x03070024</div><div class='add'>+						 0x03080025</div><div class='add'>+						 0x04000026</div><div class='add'>+						 0x04010027</div><div class='add'>+						 0x04020028</div><div class='add'>+						 0x04030029</div><div class='add'>+						 0x0404002a</div><div class='add'>+						 0x0405002b</div><div class='add'>+						 0x0406002c</div><div class='add'>+						 0x0407002d</div><div class='add'>+						 0x0408002e</div><div class='add'>+						 0x0500002f</div><div class='add'>+						 0x05010030</div><div class='add'>+						 0x05020031</div><div class='add'>+						 0x05030032</div><div class='add'>+						 0x05040033</div><div class='add'>+						 0x05050034</div><div class='add'>+						 0x05060035</div><div class='add'>+						 0x05070036</div><div class='add'>+						 0x05080037</div><div class='add'>+						 0x06000038</div><div class='add'>+						 0x06010039</div><div class='add'>+						 0x0602003a</div><div class='add'>+						 0x0603003b</div><div class='add'>+						 0x0604003c</div><div class='add'>+						 0x0605003d</div><div class='add'>+						 0x0606003e</div><div class='add'>+						 0x0607003f</div><div class='add'>+						 0x06080040</div><div class='add'>+						 0x07000041</div><div class='add'>+						 0x07010042</div><div class='add'>+						 0x07020043</div><div class='add'>+						 0x07030044</div><div class='add'>+						 0x07040045</div><div class='add'>+						 0x07050046</div><div class='add'>+						 0x07060047</div><div class='add'>+						 0x07070048</div><div class='add'>+						 0x07080049</div><div class='add'>+						 0x0800004a</div><div class='add'>+						 0x0801004b</div><div class='add'>+						 0x0802004c</div><div class='add'>+						 0x0803004d</div><div class='add'>+						 0x0804004e</div><div class='add'>+						 0x0805004f</div><div class='add'>+						 0x08060050</div><div class='add'>+						 0x08070051</div><div class='add'>+						 0x08080052 &gt;;</div><div class='add'>+			       autorepeat;</div><div class='add'>+			       st,mode = &lt;0&gt;;</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@fc900000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@d0000000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdt@fc880000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/spear300.dtsi b/arch/arm/boot/dts/spear300.dtsi<br/>new file mode 100644<br/>index 000000000000..01c5e358fdb2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear300.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear300.dtsi</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+/*</div><div class='add'>+ * DTS file for SPEAr300 SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "spear3xx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	ahb {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x60000000 0x60000000 0x50000000</div><div class='add'>+			  0xd0000000 0xd0000000 0x30000000&gt;;</div><div class='add'>+</div><div class='add'>+		pinmux@99000000 {</div><div class='add'>+			compatible = "st,spear300-pinmux";</div><div class='add'>+			reg = &lt;0x99000000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clcd@60000000 {</div><div class='add'>+			compatible = "arm,clcd-pl110", "arm,primecell";</div><div class='add'>+			reg = &lt;0x60000000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;30&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fsmc: flash@94000000 {</div><div class='add'>+			compatible = "st,spear600-fsmc-nand";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0x94000000 0x1000	/* FSMC Register */</div><div class='add'>+			       0x80000000 0x0010&gt;;	/* NAND Base */</div><div class='add'>+			reg-names = "fsmc_regs", "nand_data";</div><div class='add'>+			st,ale-off = &lt;0x20000&gt;;</div><div class='add'>+			st,cle-off = &lt;0x10000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci@70000000 {</div><div class='add'>+			compatible = "st,sdhci-spear";</div><div class='add'>+			reg = &lt;0x70000000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;1&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges = &lt;0xa0000000 0xa0000000 0x10000000</div><div class='add'>+				  0xd0000000 0xd0000000 0x30000000&gt;;</div><div class='add'>+</div><div class='add'>+			gpio1: gpio@a9000000 {</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+				gpio-controller;</div><div class='add'>+				reg = &lt;0xa9000000 0x1000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kbd@a0000000 {</div><div class='add'>+				compatible = "st,spear300-kbd";</div><div class='add'>+				reg = &lt;0xa0000000 0x1000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts<br/>new file mode 100644<br/>index 000000000000..dc5e2d445a93<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear310-evb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear310-evb.dts</a></div><div class='hunk'>@@ -0,0 +1,188 @@</div><div class='add'>+/*</div><div class='add'>+ * DTS file for SPEAr310 Evaluation Baord</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "spear310.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ST SPEAr310 Evaluation Board";</div><div class='add'>+	compatible = "st,spear310-evb", "st,spear310";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		pinmux@b4000000 {</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+			state_default: pinmux {</div><div class='add'>+				gpio0 {</div><div class='add'>+					st,pins = "gpio0_pin0_grp",</div><div class='add'>+						"gpio0_pin1_grp",</div><div class='add'>+						"gpio0_pin2_grp",</div><div class='add'>+						"gpio0_pin3_grp",</div><div class='add'>+						"gpio0_pin4_grp",</div><div class='add'>+						"gpio0_pin5_grp";</div><div class='add'>+					st,function = "gpio0";</div><div class='add'>+				};</div><div class='add'>+				i2c0 {</div><div class='add'>+					st,pins = "i2c0_grp";</div><div class='add'>+					st,function = "i2c0";</div><div class='add'>+				};</div><div class='add'>+				mii0 {</div><div class='add'>+					st,pins = "mii0_grp";</div><div class='add'>+					st,function = "mii0";</div><div class='add'>+				};</div><div class='add'>+				ssp0 {</div><div class='add'>+					st,pins = "ssp0_grp";</div><div class='add'>+					st,function = "ssp0";</div><div class='add'>+				};</div><div class='add'>+				uart0 {</div><div class='add'>+					st,pins = "uart0_grp";</div><div class='add'>+					st,function = "uart0";</div><div class='add'>+				};</div><div class='add'>+				emi {</div><div class='add'>+					st,pins = "emi_cs_0_to_5_grp";</div><div class='add'>+					st,function = "emi";</div><div class='add'>+				};</div><div class='add'>+				fsmc {</div><div class='add'>+					st,pins = "fsmc_grp";</div><div class='add'>+					st,function = "fsmc";</div><div class='add'>+				};</div><div class='add'>+				uart1 {</div><div class='add'>+					st,pins = "uart1_grp";</div><div class='add'>+					st,function = "uart1";</div><div class='add'>+				};</div><div class='add'>+				uart2 {</div><div class='add'>+					st,pins = "uart2_grp";</div><div class='add'>+					st,function = "uart2";</div><div class='add'>+				};</div><div class='add'>+				uart3 {</div><div class='add'>+					st,pins = "uart3_grp";</div><div class='add'>+					st,function = "uart3";</div><div class='add'>+				};</div><div class='add'>+				uart4 {</div><div class='add'>+					st,pins = "uart4_grp";</div><div class='add'>+					st,function = "uart4";</div><div class='add'>+				};</div><div class='add'>+				uart5 {</div><div class='add'>+					st,pins = "uart5_grp";</div><div class='add'>+					st,function = "uart5";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma@fc400000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fsmc: flash@44000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac: eth@e0800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smi: flash@fc000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			clock-rate=&lt;50000000&gt;;</div><div class='add'>+</div><div class='add'>+			flash@f8000000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0xf8000000 0x800000&gt;;</div><div class='add'>+				st,smi-fast-mode;</div><div class='add'>+</div><div class='add'>+				partition@0 {</div><div class='add'>+					label = "xloader";</div><div class='add'>+					reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@10000 {</div><div class='add'>+					label = "u-boot";</div><div class='add'>+					reg = &lt;0x10000 0x40000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@50000 {</div><div class='add'>+					label = "linux";</div><div class='add'>+					reg = &lt;0x50000 0x2c0000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@310000 {</div><div class='add'>+					label = "rootfs";</div><div class='add'>+					reg = &lt;0x310000 0x4f0000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@d0100000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci@e1800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e1900000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e2100000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			gpio0: gpio@fc980000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@d0180000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@fc900000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@d0000000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@b2000000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@b2080000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@b2100000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@b2180000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@b2200000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdt@fc880000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi<br/>new file mode 100644<br/>index 000000000000..e47081c494d9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear310.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear310.dtsi</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+/*</div><div class='add'>+ * DTS file for SPEAr310 SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "spear3xx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	ahb {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x40000000 0x40000000 0x10000000</div><div class='add'>+			  0xb0000000 0xb0000000 0x10000000</div><div class='add'>+			  0xd0000000 0xd0000000 0x30000000&gt;;</div><div class='add'>+</div><div class='add'>+		pinmux@b4000000 {</div><div class='add'>+			compatible = "st,spear310-pinmux";</div><div class='add'>+			reg = &lt;0xb4000000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fsmc: flash@44000000 {</div><div class='add'>+			compatible = "st,spear600-fsmc-nand";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0x44000000 0x1000	/* FSMC Register */</div><div class='add'>+			       0x40000000 0x0010&gt;;	/* NAND Base */</div><div class='add'>+			reg-names = "fsmc_regs", "nand_data";</div><div class='add'>+			st,ale-off = &lt;0x10000&gt;;</div><div class='add'>+			st,cle-off = &lt;0x20000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges = &lt;0xb0000000 0xb0000000 0x10000000</div><div class='add'>+				  0xd0000000 0xd0000000 0x30000000&gt;;</div><div class='add'>+</div><div class='add'>+			serial@b2000000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0xb2000000 0x1000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@b2080000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0xb2080000 0x1000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@b2100000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0xb2100000 0x1000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@b2180000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0xb2180000 0x1000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@b2200000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0xb2200000 0x1000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts<br/>new file mode 100644<br/>index 000000000000..6308fa3bec1e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear320-evb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear320-evb.dts</a></div><div class='hunk'>@@ -0,0 +1,198 @@</div><div class='add'>+/*</div><div class='add'>+ * DTS file for SPEAr320 Evaluation Baord</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "spear320.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "ST SPEAr300 Evaluation Board";</div><div class='add'>+	compatible = "st,spear300-evb", "st,spear300";</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		pinmux@b3000000 {</div><div class='add'>+			st,pinmux-mode = &lt;3&gt;;</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+			state_default: pinmux {</div><div class='add'>+				i2c0 {</div><div class='add'>+					st,pins = "i2c0_grp";</div><div class='add'>+					st,function = "i2c0";</div><div class='add'>+				};</div><div class='add'>+				mii0 {</div><div class='add'>+					st,pins = "mii0_grp";</div><div class='add'>+					st,function = "mii0";</div><div class='add'>+				};</div><div class='add'>+				ssp0 {</div><div class='add'>+					st,pins = "ssp0_grp";</div><div class='add'>+					st,function = "ssp0";</div><div class='add'>+				};</div><div class='add'>+				uart0 {</div><div class='add'>+					st,pins = "uart0_grp";</div><div class='add'>+					st,function = "uart0";</div><div class='add'>+				};</div><div class='add'>+				sdhci {</div><div class='add'>+					st,pins = "sdhci_cd_51_grp";</div><div class='add'>+					st,function = "sdhci";</div><div class='add'>+				};</div><div class='add'>+				i2s {</div><div class='add'>+					st,pins = "i2s_grp";</div><div class='add'>+					st,function = "i2s";</div><div class='add'>+				};</div><div class='add'>+				uart1 {</div><div class='add'>+					st,pins = "uart1_grp";</div><div class='add'>+					st,function = "uart1";</div><div class='add'>+				};</div><div class='add'>+				uart2 {</div><div class='add'>+					st,pins = "uart2_grp";</div><div class='add'>+					st,function = "uart2";</div><div class='add'>+				};</div><div class='add'>+				can0 {</div><div class='add'>+					st,pins = "can0_grp";</div><div class='add'>+					st,function = "can0";</div><div class='add'>+				};</div><div class='add'>+				can1 {</div><div class='add'>+					st,pins = "can1_grp";</div><div class='add'>+					st,function = "can1";</div><div class='add'>+				};</div><div class='add'>+				mii2 {</div><div class='add'>+					st,pins = "mii2_grp";</div><div class='add'>+					st,function = "mii2";</div><div class='add'>+				};</div><div class='add'>+				pwm0_1 {</div><div class='add'>+					st,pins = "pwm0_1_pin_14_15_grp";</div><div class='add'>+					st,function = "pwm0_1";</div><div class='add'>+				};</div><div class='add'>+				pwm2 {</div><div class='add'>+					st,pins = "pwm2_pin_13_grp";</div><div class='add'>+					st,function = "pwm2";</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clcd@90000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma@fc400000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fsmc: flash@4c000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac: eth@e0800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci@70000000 {</div><div class='add'>+			power-gpio = &lt;&amp;gpio0 2 1&gt;;</div><div class='add'>+			power_always_enb;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smi: flash@fc000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			clock-rate=&lt;50000000&gt;;</div><div class='add'>+</div><div class='add'>+			flash@f8000000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0xf8000000 0x800000&gt;;</div><div class='add'>+				st,smi-fast-mode;</div><div class='add'>+</div><div class='add'>+				partition@0 {</div><div class='add'>+					label = "xloader";</div><div class='add'>+					reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@10000 {</div><div class='add'>+					label = "u-boot";</div><div class='add'>+					reg = &lt;0x10000 0x40000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@50000 {</div><div class='add'>+					label = "linux";</div><div class='add'>+					reg = &lt;0x50000 0x2c0000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@310000 {</div><div class='add'>+					label = "rootfs";</div><div class='add'>+					reg = &lt;0x310000 0x4f0000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@d0100000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@a5000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi2: spi@a6000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci@e1800000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e1900000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e2100000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			gpio0: gpio@fc980000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@d0180000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@a7000000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@fc900000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@d0000000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@a3000000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@a4000000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdt@fc880000 {</div><div class='add'>+			       status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi<br/>new file mode 100644<br/>index 000000000000..5372ca399b1f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear320.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear320.dtsi</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+/*</div><div class='add'>+ * DTS file for SPEAr320 SoC</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "spear3xx.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	ahb {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0x40000000 0x40000000 0x80000000</div><div class='add'>+			  0xd0000000 0xd0000000 0x30000000&gt;;</div><div class='add'>+</div><div class='add'>+		pinmux@b3000000 {</div><div class='add'>+			compatible = "st,spear320-pinmux";</div><div class='add'>+			reg = &lt;0xb3000000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		clcd@90000000 {</div><div class='add'>+			compatible = "arm,clcd-pl110", "arm,primecell";</div><div class='add'>+			reg = &lt;0x90000000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;33&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		fsmc: flash@4c000000 {</div><div class='add'>+			compatible = "st,spear600-fsmc-nand";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0x4c000000 0x1000	/* FSMC Register */</div><div class='add'>+			       0x50000000 0x0010&gt;;	/* NAND Base */</div><div class='add'>+			reg-names = "fsmc_regs", "nand_data";</div><div class='add'>+			st,ale-off = &lt;0x20000&gt;;</div><div class='add'>+			st,cle-off = &lt;0x10000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		sdhci@70000000 {</div><div class='add'>+			compatible = "st,sdhci-spear";</div><div class='add'>+			reg = &lt;0x70000000 0x100&gt;;</div><div class='add'>+			interrupts = &lt;29&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi1: spi@a5000000 {</div><div class='add'>+			compatible = "arm,pl022", "arm,primecell";</div><div class='add'>+			reg = &lt;0xa5000000 0x1000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi2: spi@a6000000 {</div><div class='add'>+			compatible = "arm,pl022", "arm,primecell";</div><div class='add'>+			reg = &lt;0xa6000000 0x1000&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges = &lt;0xa0000000 0xa0000000 0x10000000</div><div class='add'>+				  0xd0000000 0xd0000000 0x30000000&gt;;</div><div class='add'>+</div><div class='add'>+			i2c1: i2c@a7000000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "snps,designware-i2c";</div><div class='add'>+				reg = &lt;0xa7000000 0x1000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@a3000000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0xa3000000 0x1000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@a4000000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0xa4000000 0x1000&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi<br/>new file mode 100644<br/>index 000000000000..91072553963f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear3xx.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear3xx.dtsi</a></div><div class='hunk'>@@ -0,0 +1,150 @@</div><div class='add'>+/*</div><div class='add'>+ * DTS file for all SPEAr3xx SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/include/ "skeleton.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	interrupt-parent = &lt;&amp;vic&gt;;</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "arm,arm926ejs";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		device_type = "memory";</div><div class='add'>+		reg = &lt;0 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "simple-bus";</div><div class='add'>+		ranges = &lt;0xd0000000 0xd0000000 0x30000000&gt;;</div><div class='add'>+</div><div class='add'>+		vic: interrupt-controller@f1100000 {</div><div class='add'>+			compatible = "arm,pl190-vic";</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			reg = &lt;0xf1100000 0x1000&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma@fc400000 {</div><div class='add'>+			compatible = "arm,pl080", "arm,primecell";</div><div class='add'>+			reg = &lt;0xfc400000 0x1000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;vic&gt;;</div><div class='add'>+			interrupts = &lt;8&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gmac: eth@e0800000 {</div><div class='add'>+			compatible = "st,spear600-gmac";</div><div class='add'>+			reg = &lt;0xe0800000 0x8000&gt;;</div><div class='add'>+			interrupts = &lt;23 22&gt;;</div><div class='add'>+			interrupt-names = "macirq", "eth_wake_irq";</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		smi: flash@fc000000 {</div><div class='add'>+			compatible = "st,spear600-smi";</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			reg = &lt;0xfc000000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;9&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		spi0: spi@d0100000 {</div><div class='add'>+			compatible = "arm,pl022", "arm,primecell";</div><div class='add'>+			reg = &lt;0xd0100000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;20&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ehci@e1800000 {</div><div class='add'>+			compatible = "st,spear600-ehci", "usb-ehci";</div><div class='add'>+			reg = &lt;0xe1800000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;26&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e1900000 {</div><div class='add'>+			compatible = "st,spear600-ohci", "usb-ohci";</div><div class='add'>+			reg = &lt;0xe1900000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;25&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ohci@e2100000 {</div><div class='add'>+			compatible = "st,spear600-ohci", "usb-ohci";</div><div class='add'>+			reg = &lt;0xe2100000 0x1000&gt;;</div><div class='add'>+			interrupts = &lt;27&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		apb {</div><div class='add'>+			#address-cells = &lt;1&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "simple-bus";</div><div class='add'>+			ranges = &lt;0xd0000000 0xd0000000 0x30000000&gt;;</div><div class='add'>+</div><div class='add'>+			gpio0: gpio@fc980000 {</div><div class='add'>+				compatible = "arm,pl061", "arm,primecell";</div><div class='add'>+				reg = &lt;0xfc980000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;11&gt;;</div><div class='add'>+				gpio-controller;</div><div class='add'>+				#gpio-cells = &lt;2&gt;;</div><div class='add'>+				interrupt-controller;</div><div class='add'>+				#interrupt-cells = &lt;2&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			i2c0: i2c@d0180000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;0&gt;;</div><div class='add'>+				compatible = "snps,designware-i2c";</div><div class='add'>+				reg = &lt;0xd0180000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;21&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rtc@fc900000 {</div><div class='add'>+				compatible = "st,spear-rtc";</div><div class='add'>+				reg = &lt;0xfc900000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;10&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			serial@d0000000 {</div><div class='add'>+				compatible = "arm,pl011", "arm,primecell";</div><div class='add'>+				reg = &lt;0xd0000000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;19&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			wdt@fc880000 {</div><div class='add'>+				compatible = "arm,sp805", "arm,primecell";</div><div class='add'>+				reg = &lt;0xfc880000 0x1000&gt;;</div><div class='add'>+				interrupts = &lt;12&gt;;</div><div class='add'>+				status = "disabled";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			timer@f0000000 {</div><div class='add'>+				compatible = "st,spear-timer";</div><div class='add'>+				reg = &lt;0xf0000000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/spear600-evb.dts b/arch/arm/boot/dts/spear600-evb.dts<br/>index 636292e18c90..1119c22c9a82 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear600-evb.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/spear600-evb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear600-evb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear600-evb.dts</a></div><div class='hunk'>@@ -24,11 +24,44 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	ahb {</div><div class='add'>+		dma@fc400000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gmac: ethernet@e0800000 {</div><div class='ctx'> 			phy-mode = "gmii";</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		smi: flash@fc000000 {</div><div class='add'>+			status = "okay";</div><div class='add'>+			clock-rate=&lt;50000000&gt;;</div><div class='add'>+</div><div class='add'>+			flash@f8000000 {</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+				reg = &lt;0xf8000000 0x800000&gt;;</div><div class='add'>+				st,smi-fast-mode;</div><div class='add'>+</div><div class='add'>+				partition@0 {</div><div class='add'>+					label = "xloader";</div><div class='add'>+					reg = &lt;0x0 0x10000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@10000 {</div><div class='add'>+					label = "u-boot";</div><div class='add'>+					reg = &lt;0x10000 0x40000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@50000 {</div><div class='add'>+					label = "linux";</div><div class='add'>+					reg = &lt;0x50000 0x2c0000&gt;;</div><div class='add'>+				};</div><div class='add'>+				partition@310000 {</div><div class='add'>+					label = "rootfs";</div><div class='add'>+					reg = &lt;0x310000 0x4f0000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		apb {</div><div class='ctx'> 			serial@d0000000 {</div><div class='ctx'> 				status = "okay";</div><div class='head'>diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi<br/>index ebe0885a2b98..089f0a42c50e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/spear600.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/spear600.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/spear600.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/spear600.dtsi</a></div><div class='hunk'>@@ -45,6 +45,14 @@</div><div class='ctx'> 			#interrupt-cells = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='add'>+		dma@fc400000 {</div><div class='add'>+			compatible = "arm,pl080", "arm,primecell";</div><div class='add'>+			reg = &lt;0xfc400000 0x1000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='add'>+			interrupts = &lt;10&gt;;</div><div class='add'>+			status = "disabled";</div><div class='add'>+		};</div><div class='add'>+</div><div class='ctx'> 		gmac: ethernet@e0800000 {</div><div class='ctx'> 			compatible = "st,spear600-gmac";</div><div class='ctx'> 			reg = &lt;0xe0800000 0x8000&gt;;</div><div class='hunk'>@@ -169,6 +177,12 @@</div><div class='ctx'> 				interrupts = &lt;28&gt;;</div><div class='ctx'> 				status = "disabled";</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			timer@f0000000 {</div><div class='add'>+				compatible = "st,spear-timer";</div><div class='add'>+				reg = &lt;0xf0000000 0x400&gt;;</div><div class='add'>+				interrupts = &lt;16&gt;;</div><div class='add'>+			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts<br/>index ac3fb7558459..36321bceec46 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra-cardhu.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/tegra-cardhu.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra-cardhu.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra-cardhu.dts</a></div><div class='hunk'>@@ -7,64 +7,166 @@</div><div class='ctx'> 	compatible = "nvidia,cardhu", "nvidia,tegra30";</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='del'>-		reg = &lt; 0x80000000 0x40000000 &gt;;</div><div class='add'>+		reg = &lt;0x80000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@70006000 {</div><div class='del'>-		clock-frequency = &lt; 408000000 &gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006040 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006200 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006300 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	pinmux {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+		state_default: pinmux {</div><div class='add'>+			sdmmc1_clk_pz0 {</div><div class='add'>+				nvidia,pins = "sdmmc1_clk_pz0";</div><div class='add'>+				nvidia,function = "sdmmc1";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc1_cmd_pz1 {</div><div class='add'>+				nvidia,pins =	"sdmmc1_cmd_pz1",</div><div class='add'>+						"sdmmc1_dat0_py7",</div><div class='add'>+						"sdmmc1_dat1_py6",</div><div class='add'>+						"sdmmc1_dat2_py5",</div><div class='add'>+						"sdmmc1_dat3_py4";</div><div class='add'>+				nvidia,function = "sdmmc1";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc4_clk_pcc4 {</div><div class='add'>+				nvidia,pins =	"sdmmc4_clk_pcc4",</div><div class='add'>+						"sdmmc4_rst_n_pcc3";</div><div class='add'>+				nvidia,function = "sdmmc4";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			sdmmc4_dat0_paa0 {</div><div class='add'>+				nvidia,pins =	"sdmmc4_dat0_paa0",</div><div class='add'>+						"sdmmc4_dat1_paa1",</div><div class='add'>+						"sdmmc4_dat2_paa2",</div><div class='add'>+						"sdmmc4_dat3_paa3",</div><div class='add'>+						"sdmmc4_dat4_paa4",</div><div class='add'>+						"sdmmc4_dat5_paa5",</div><div class='add'>+						"sdmmc4_dat6_paa6",</div><div class='add'>+						"sdmmc4_dat7_paa7";</div><div class='add'>+				nvidia,function = "sdmmc4";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			dap2_fs_pa2 {</div><div class='add'>+				nvidia,pins =	"dap2_fs_pa2",</div><div class='add'>+						"dap2_sclk_pa3",</div><div class='add'>+						"dap2_din_pa4",</div><div class='add'>+						"dap2_dout_pa5";</div><div class='add'>+				nvidia,function = "i2s1";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@70006400 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	serial@70006000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;408000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;100000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c400 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;100000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c500 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+		/* ALS and Proximity sensor */</div><div class='add'>+		isl29028@44 {</div><div class='add'>+			compatible = "isil,isl29028";</div><div class='add'>+			reg = &lt;0x44&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;88 0x04&gt;; /*gpio PL0 */</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c700 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;100000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000d000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+		wm8903: wm8903@1a {</div><div class='add'>+			compatible = "wlf,wm8903";</div><div class='add'>+			reg = &lt;0x1a&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;179 0x04&gt;; /* gpio PW3 */</div><div class='add'>+</div><div class='add'>+			gpio-controller;</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+			micdet-cfg = &lt;0&gt;;</div><div class='add'>+			micdet-delay = &lt;100&gt;;</div><div class='add'>+			gpio-cfg = &lt;0xffffffff 0xffffffff 0 0xffffffff 0xffffffff&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tps62361 {</div><div class='add'>+			compatible = "ti,tps62361";</div><div class='add'>+			reg = &lt;0x60&gt;;</div><div class='add'>+</div><div class='add'>+			regulator-name = "tps62361-vout";</div><div class='add'>+			regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+			regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+			regulator-boot-on;</div><div class='add'>+			regulator-always-on;</div><div class='add'>+			ti,vsel0-state-high;</div><div class='add'>+			ti,vsel1-state-high;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahub {</div><div class='add'>+		i2s@70080400 {</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdhci@78000000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		cd-gpios = &lt;&amp;gpio 69 0&gt;; /* gpio PI5 */</div><div class='ctx'> 		wp-gpios = &lt;&amp;gpio 155 0&gt;; /* gpio PT3 */</div><div class='ctx'> 		power-gpios = &lt;&amp;gpio 31 0&gt;; /* gpio PD7 */</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@78000200 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@78000400 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	sdhci@78000600 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		support-8bit;</div><div class='add'>+		bus-width = &lt;8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@78000400 {</div><div class='del'>-		support-8bit;</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "nvidia,tegra-audio-wm8903-cardhu",</div><div class='add'>+			     "nvidia,tegra-audio-wm8903";</div><div class='add'>+		nvidia,model = "NVIDIA Tegra Cardhu";</div><div class='add'>+</div><div class='add'>+		nvidia,audio-routing =</div><div class='add'>+			"Headphone Jack", "HPOUTR",</div><div class='add'>+			"Headphone Jack", "HPOUTL",</div><div class='add'>+			"Int Spk", "ROP",</div><div class='add'>+			"Int Spk", "RON",</div><div class='add'>+			"Int Spk", "LOP",</div><div class='add'>+			"Int Spk", "LON",</div><div class='add'>+			"Mic Jack", "MICBIAS",</div><div class='add'>+			"IN1L", "Mic Jack";</div><div class='add'>+</div><div class='add'>+		nvidia,i2s-controller = &lt;&amp;tegra_i2s1&gt;;</div><div class='add'>+		nvidia,audio-codec = &lt;&amp;wm8903&gt;;</div><div class='add'>+</div><div class='add'>+		nvidia,spkr-en-gpios = &lt;&amp;wm8903 2 0&gt;;</div><div class='add'>+		nvidia,hp-det-gpios = &lt;&amp;gpio 178 0&gt;; /* gpio PW2 */</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts<br/>index 6e8447dc0202..7de701365fce 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra-harmony.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/tegra-harmony.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra-harmony.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra-harmony.dts</a></div><div class='hunk'>@@ -6,46 +6,309 @@</div><div class='ctx'> 	model = "NVIDIA Tegra2 Harmony evaluation board";</div><div class='ctx'> 	compatible = "nvidia,harmony", "nvidia,tegra20";</div><div class='ctx'> </div><div class='del'>-	memory@0 {</div><div class='del'>-		reg = &lt; 0x00000000 0x40000000 &gt;;</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x00000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pmc@7000f400 {</div><div class='del'>-		nvidia,invert-interrupt;</div><div class='add'>+	pinmux {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+		state_default: pinmux {</div><div class='add'>+			ata {</div><div class='add'>+				nvidia,pins = "ata";</div><div class='add'>+				nvidia,function = "ide";</div><div class='add'>+			};</div><div class='add'>+			atb {</div><div class='add'>+				nvidia,pins = "atb", "gma", "gme";</div><div class='add'>+				nvidia,function = "sdio4";</div><div class='add'>+			};</div><div class='add'>+			atc {</div><div class='add'>+				nvidia,pins = "atc";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+			};</div><div class='add'>+			atd {</div><div class='add'>+				nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",</div><div class='add'>+					"spia", "spib", "spic";</div><div class='add'>+				nvidia,function = "gmi";</div><div class='add'>+			};</div><div class='add'>+			cdev1 {</div><div class='add'>+				nvidia,pins = "cdev1";</div><div class='add'>+				nvidia,function = "plla_out";</div><div class='add'>+			};</div><div class='add'>+			cdev2 {</div><div class='add'>+				nvidia,pins = "cdev2";</div><div class='add'>+				nvidia,function = "pllp_out4";</div><div class='add'>+			};</div><div class='add'>+			crtp {</div><div class='add'>+				nvidia,pins = "crtp";</div><div class='add'>+				nvidia,function = "crt";</div><div class='add'>+			};</div><div class='add'>+			csus {</div><div class='add'>+				nvidia,pins = "csus";</div><div class='add'>+				nvidia,function = "vi_sensor_clk";</div><div class='add'>+			};</div><div class='add'>+			dap1 {</div><div class='add'>+				nvidia,pins = "dap1";</div><div class='add'>+				nvidia,function = "dap1";</div><div class='add'>+			};</div><div class='add'>+			dap2 {</div><div class='add'>+				nvidia,pins = "dap2";</div><div class='add'>+				nvidia,function = "dap2";</div><div class='add'>+			};</div><div class='add'>+			dap3 {</div><div class='add'>+				nvidia,pins = "dap3";</div><div class='add'>+				nvidia,function = "dap3";</div><div class='add'>+			};</div><div class='add'>+			dap4 {</div><div class='add'>+				nvidia,pins = "dap4";</div><div class='add'>+				nvidia,function = "dap4";</div><div class='add'>+			};</div><div class='add'>+			ddc {</div><div class='add'>+				nvidia,pins = "ddc";</div><div class='add'>+				nvidia,function = "i2c2";</div><div class='add'>+			};</div><div class='add'>+			dta {</div><div class='add'>+				nvidia,pins = "dta", "dtd";</div><div class='add'>+				nvidia,function = "sdio2";</div><div class='add'>+			};</div><div class='add'>+			dtb {</div><div class='add'>+				nvidia,pins = "dtb", "dtc", "dte";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+			};</div><div class='add'>+			dtf {</div><div class='add'>+				nvidia,pins = "dtf";</div><div class='add'>+				nvidia,function = "i2c3";</div><div class='add'>+			};</div><div class='add'>+			gmc {</div><div class='add'>+				nvidia,pins = "gmc";</div><div class='add'>+				nvidia,function = "uartd";</div><div class='add'>+			};</div><div class='add'>+			gpu7 {</div><div class='add'>+				nvidia,pins = "gpu7";</div><div class='add'>+				nvidia,function = "rtck";</div><div class='add'>+			};</div><div class='add'>+			gpv {</div><div class='add'>+				nvidia,pins = "gpv", "slxa", "slxk";</div><div class='add'>+				nvidia,function = "pcie";</div><div class='add'>+			};</div><div class='add'>+			hdint {</div><div class='add'>+				nvidia,pins = "hdint", "pta";</div><div class='add'>+				nvidia,function = "hdmi";</div><div class='add'>+			};</div><div class='add'>+			i2cp {</div><div class='add'>+				nvidia,pins = "i2cp";</div><div class='add'>+				nvidia,function = "i2cp";</div><div class='add'>+			};</div><div class='add'>+			irrx {</div><div class='add'>+				nvidia,pins = "irrx", "irtx";</div><div class='add'>+				nvidia,function = "uarta";</div><div class='add'>+			};</div><div class='add'>+			kbca {</div><div class='add'>+				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",</div><div class='add'>+					"kbce", "kbcf";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+			};</div><div class='add'>+			lcsn {</div><div class='add'>+				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",</div><div class='add'>+					"ld3", "ld4", "ld5", "ld6", "ld7",</div><div class='add'>+					"ld8", "ld9", "ld10", "ld11", "ld12",</div><div class='add'>+					"ld13", "ld14", "ld15", "ld16", "ld17",</div><div class='add'>+					"ldc", "ldi", "lhp0", "lhp1", "lhp2",</div><div class='add'>+					"lhs", "lm0", "lm1", "lpp", "lpw0",</div><div class='add'>+					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",</div><div class='add'>+					"lsda", "lsdi", "lspi", "lvp0", "lvp1",</div><div class='add'>+					"lvs";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+			};</div><div class='add'>+			owc {</div><div class='add'>+				nvidia,pins = "owc", "spdi", "spdo", "uac";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+			};</div><div class='add'>+			pmc {</div><div class='add'>+				nvidia,pins = "pmc";</div><div class='add'>+				nvidia,function = "pwr_on";</div><div class='add'>+			};</div><div class='add'>+			rm {</div><div class='add'>+				nvidia,pins = "rm";</div><div class='add'>+				nvidia,function = "i2c1";</div><div class='add'>+			};</div><div class='add'>+			sdb {</div><div class='add'>+				nvidia,pins = "sdb", "sdc", "sdd";</div><div class='add'>+				nvidia,function = "pwm";</div><div class='add'>+			};</div><div class='add'>+			sdio1 {</div><div class='add'>+				nvidia,pins = "sdio1";</div><div class='add'>+				nvidia,function = "sdio1";</div><div class='add'>+			};</div><div class='add'>+			slxc {</div><div class='add'>+				nvidia,pins = "slxc", "slxd";</div><div class='add'>+				nvidia,function = "spdif";</div><div class='add'>+			};</div><div class='add'>+			spid {</div><div class='add'>+				nvidia,pins = "spid", "spie", "spif";</div><div class='add'>+				nvidia,function = "spi1";</div><div class='add'>+			};</div><div class='add'>+			spig {</div><div class='add'>+				nvidia,pins = "spig", "spih";</div><div class='add'>+				nvidia,function = "spi2_alt";</div><div class='add'>+			};</div><div class='add'>+			uaa {</div><div class='add'>+				nvidia,pins = "uaa", "uab", "uda";</div><div class='add'>+				nvidia,function = "ulpi";</div><div class='add'>+			};</div><div class='add'>+			uad {</div><div class='add'>+				nvidia,pins = "uad";</div><div class='add'>+				nvidia,function = "irda";</div><div class='add'>+			};</div><div class='add'>+			uca {</div><div class='add'>+				nvidia,pins = "uca", "ucb";</div><div class='add'>+				nvidia,function = "uartc";</div><div class='add'>+			};</div><div class='add'>+			conf_ata {</div><div class='add'>+				nvidia,pins = "ata", "atb", "atc", "atd", "ate",</div><div class='add'>+					"cdev1", "cdev2", "dap1", "dtb", "gma",</div><div class='add'>+					"gmb", "gmc", "gmd", "gme", "gpu7",</div><div class='add'>+					"gpv", "i2cp", "pta", "rm", "slxa",</div><div class='add'>+					"slxk", "spia", "spib", "uac";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ck32 {</div><div class='add'>+				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",</div><div class='add'>+					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_csus {</div><div class='add'>+				nvidia,pins = "csus", "spid", "spif";</div><div class='add'>+				nvidia,pull = &lt;1&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_crtp {</div><div class='add'>+				nvidia,pins = "crtp", "dap2", "dap3", "dap4",</div><div class='add'>+					"dtc", "dte", "dtf", "gpu", "sdio1",</div><div class='add'>+					"slxc", "slxd", "spdi", "spdo", "spig",</div><div class='add'>+					"uda";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ddc {</div><div class='add'>+				nvidia,pins = "ddc", "dta", "dtd", "kbca",</div><div class='add'>+					"kbcb", "kbcc", "kbcd", "kbce", "kbcf",</div><div class='add'>+					"sdc";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_hdint {</div><div class='add'>+				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",</div><div class='add'>+					"lpw1", "lsc1", "lsck", "lsda", "lsdi",</div><div class='add'>+					"lvp0", "owc", "sdb";</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_irrx {</div><div class='add'>+				nvidia,pins = "irrx", "irtx", "sdd", "spic",</div><div class='add'>+					"spie", "spih", "uaa", "uab", "uad",</div><div class='add'>+					"uca", "ucb";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_lc {</div><div class='add'>+				nvidia,pins = "lc", "ls";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ld0 {</div><div class='add'>+				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",</div><div class='add'>+					"ld5", "ld6", "ld7", "ld8", "ld9",</div><div class='add'>+					"ld10", "ld11", "ld12", "ld13", "ld14",</div><div class='add'>+					"ld15", "ld16", "ld17", "ldi", "lhp0",</div><div class='add'>+					"lhp1", "lhp2", "lhs", "lm0", "lpp",</div><div class='add'>+					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",</div><div class='add'>+					"lvs", "pmc";</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ld17_0 {</div><div class='add'>+				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",</div><div class='add'>+					"ld23_22";</div><div class='add'>+				nvidia,pull = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s@70002800 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial@70006300 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;216000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		wm8903: wm8903@1a {</div><div class='ctx'> 			compatible = "wlf,wm8903";</div><div class='ctx'> 			reg = &lt;0x1a&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-			interrupts = &lt; 187 0x04 &gt;;</div><div class='add'>+			interrupts = &lt;187 0x04&gt;;</div><div class='ctx'> </div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			micdet-cfg = &lt;0&gt;;</div><div class='ctx'> 			micdet-delay = &lt;100&gt;;</div><div class='del'>-			gpio-cfg = &lt; 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff &gt;;</div><div class='add'>+			gpio-cfg = &lt;0xffffffff 0xffffffff 0 0xffffffff 0xffffffff&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c400 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c500 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000d000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2s@70002a00 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	pmc {</div><div class='add'>+		nvidia,invert-interrupt;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb@c5000000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb@c5004000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		nvidia,phy-reset-gpio = &lt;&amp;gpio 169 0&gt;; /* gpio PV1 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb@c5008000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhci@c8000200 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		cd-gpios = &lt;&amp;gpio 69 0&gt;; /* gpio PI5 */</div><div class='add'>+		wp-gpios = &lt;&amp;gpio 57 0&gt;; /* gpio PH1 */</div><div class='add'>+		power-gpios = &lt;&amp;gpio 155 0&gt;; /* gpio PT3 */</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhci@c8000600 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		cd-gpios = &lt;&amp;gpio 58 0&gt;; /* gpio PH2 */</div><div class='add'>+		wp-gpios = &lt;&amp;gpio 59 0&gt;; /* gpio PH3 */</div><div class='add'>+		power-gpios = &lt;&amp;gpio 70 0&gt;; /* gpio PI6 */</div><div class='add'>+		support-8bit;</div><div class='add'>+		bus-width = &lt;8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sound {</div><div class='hunk'>@@ -71,45 +334,4 @@</div><div class='ctx'> 		nvidia,int-mic-en-gpios = &lt;&amp;gpio 184 0&gt;; /*gpio PX0 */</div><div class='ctx'> 		nvidia,ext-mic-en-gpios = &lt;&amp;gpio 185 0&gt;; /* gpio PX1 */</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	serial@70006000 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006040 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006200 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006300 {</div><div class='del'>-		clock-frequency = &lt; 216000000 &gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006400 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@c8000000 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@c8000200 {</div><div class='del'>-		cd-gpios = &lt;&amp;gpio 69 0&gt;; /* gpio PI5 */</div><div class='del'>-		wp-gpios = &lt;&amp;gpio 57 0&gt;; /* gpio PH1 */</div><div class='del'>-		power-gpios = &lt;&amp;gpio 155 0&gt;; /* gpio PT3 */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@c8000400 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@c8000600 {</div><div class='del'>-		cd-gpios = &lt;&amp;gpio 58 0&gt;; /* gpio PH2 */</div><div class='del'>-		wp-gpios = &lt;&amp;gpio 59 0&gt;; /* gpio PH3 */</div><div class='del'>-		power-gpios = &lt;&amp;gpio 70 0&gt;; /* gpio PI6 */</div><div class='del'>-		support-8bit;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts<br/>index 6c02abb469d4..bfeb117d5aea 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra-paz00.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/tegra-paz00.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra-paz00.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra-paz00.dts</a></div><div class='hunk'>@@ -6,11 +6,242 @@</div><div class='ctx'> 	model = "Toshiba AC100 / Dynabook AZ";</div><div class='ctx'> 	compatible = "compal,paz00", "nvidia,tegra20";</div><div class='ctx'> </div><div class='del'>-	memory@0 {</div><div class='add'>+	memory {</div><div class='ctx'> 		reg = &lt;0x00000000 0x20000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinmux {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+		state_default: pinmux {</div><div class='add'>+			ata {</div><div class='add'>+				nvidia,pins = "ata", "atc", "atd", "ate",</div><div class='add'>+					"dap2", "gmb", "gmc", "gmd", "spia",</div><div class='add'>+					"spib", "spic", "spid", "spie";</div><div class='add'>+				nvidia,function = "gmi";</div><div class='add'>+			};</div><div class='add'>+			atb {</div><div class='add'>+				nvidia,pins = "atb", "gma", "gme";</div><div class='add'>+				nvidia,function = "sdio4";</div><div class='add'>+			};</div><div class='add'>+			cdev1 {</div><div class='add'>+				nvidia,pins = "cdev1";</div><div class='add'>+				nvidia,function = "plla_out";</div><div class='add'>+			};</div><div class='add'>+			cdev2 {</div><div class='add'>+				nvidia,pins = "cdev2";</div><div class='add'>+				nvidia,function = "pllp_out4";</div><div class='add'>+			};</div><div class='add'>+			crtp {</div><div class='add'>+				nvidia,pins = "crtp";</div><div class='add'>+				nvidia,function = "crt";</div><div class='add'>+			};</div><div class='add'>+			csus {</div><div class='add'>+				nvidia,pins = "csus";</div><div class='add'>+				nvidia,function = "pllc_out1";</div><div class='add'>+			};</div><div class='add'>+			dap1 {</div><div class='add'>+				nvidia,pins = "dap1";</div><div class='add'>+				nvidia,function = "dap1";</div><div class='add'>+			};</div><div class='add'>+			dap3 {</div><div class='add'>+				nvidia,pins = "dap3";</div><div class='add'>+				nvidia,function = "dap3";</div><div class='add'>+			};</div><div class='add'>+			dap4 {</div><div class='add'>+				nvidia,pins = "dap4";</div><div class='add'>+				nvidia,function = "dap4";</div><div class='add'>+			};</div><div class='add'>+			ddc {</div><div class='add'>+				nvidia,pins = "ddc";</div><div class='add'>+				nvidia,function = "i2c2";</div><div class='add'>+			};</div><div class='add'>+			dta {</div><div class='add'>+				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";</div><div class='add'>+				nvidia,function = "rsvd1";</div><div class='add'>+			};</div><div class='add'>+			dtf {</div><div class='add'>+				nvidia,pins = "dtf";</div><div class='add'>+				nvidia,function = "i2c3";</div><div class='add'>+			};</div><div class='add'>+			gpu {</div><div class='add'>+				nvidia,pins = "gpu", "sdb", "sdd";</div><div class='add'>+				nvidia,function = "pwm";</div><div class='add'>+			};</div><div class='add'>+			gpu7 {</div><div class='add'>+				nvidia,pins = "gpu7";</div><div class='add'>+				nvidia,function = "rtck";</div><div class='add'>+			};</div><div class='add'>+			gpv {</div><div class='add'>+				nvidia,pins = "gpv", "slxa", "slxk";</div><div class='add'>+				nvidia,function = "pcie";</div><div class='add'>+			};</div><div class='add'>+			hdint {</div><div class='add'>+				nvidia,pins = "hdint", "pta";</div><div class='add'>+				nvidia,function = "hdmi";</div><div class='add'>+			};</div><div class='add'>+			i2cp {</div><div class='add'>+				nvidia,pins = "i2cp";</div><div class='add'>+				nvidia,function = "i2cp";</div><div class='add'>+			};</div><div class='add'>+			irrx {</div><div class='add'>+				nvidia,pins = "irrx", "irtx";</div><div class='add'>+				nvidia,function = "uarta";</div><div class='add'>+			};</div><div class='add'>+			kbca {</div><div class='add'>+				nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+			};</div><div class='add'>+			kbcb {</div><div class='add'>+				nvidia,pins = "kbcb", "kbcd";</div><div class='add'>+				nvidia,function = "sdio2";</div><div class='add'>+			};</div><div class='add'>+			lcsn {</div><div class='add'>+				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",</div><div class='add'>+					"ld3", "ld4", "ld5", "ld6", "ld7",</div><div class='add'>+					"ld8", "ld9", "ld10", "ld11", "ld12",</div><div class='add'>+					"ld13", "ld14", "ld15", "ld16", "ld17",</div><div class='add'>+					"ldc", "ldi", "lhp0", "lhp1", "lhp2",</div><div class='add'>+					"lhs", "lm0", "lm1", "lpp", "lpw0",</div><div class='add'>+					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",</div><div class='add'>+					"lsda", "lsdi", "lspi", "lvp0", "lvp1",</div><div class='add'>+					"lvs";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+			};</div><div class='add'>+			owc {</div><div class='add'>+				nvidia,pins = "owc";</div><div class='add'>+				nvidia,function = "owr";</div><div class='add'>+			};</div><div class='add'>+			pmc {</div><div class='add'>+				nvidia,pins = "pmc";</div><div class='add'>+				nvidia,function = "pwr_on";</div><div class='add'>+			};</div><div class='add'>+			rm {</div><div class='add'>+				nvidia,pins = "rm";</div><div class='add'>+				nvidia,function = "i2c1";</div><div class='add'>+			};</div><div class='add'>+			sdc {</div><div class='add'>+				nvidia,pins = "sdc";</div><div class='add'>+				nvidia,function = "twc";</div><div class='add'>+			};</div><div class='add'>+			sdio1 {</div><div class='add'>+				nvidia,pins = "sdio1";</div><div class='add'>+				nvidia,function = "sdio1";</div><div class='add'>+			};</div><div class='add'>+			slxc {</div><div class='add'>+				nvidia,pins = "slxc", "slxd";</div><div class='add'>+				nvidia,function = "spi4";</div><div class='add'>+			};</div><div class='add'>+			spdi {</div><div class='add'>+				nvidia,pins = "spdi", "spdo";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+			};</div><div class='add'>+			spif {</div><div class='add'>+				nvidia,pins = "spif", "uac";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+			};</div><div class='add'>+			spig {</div><div class='add'>+				nvidia,pins = "spig", "spih";</div><div class='add'>+				nvidia,function = "spi2_alt";</div><div class='add'>+			};</div><div class='add'>+			uaa {</div><div class='add'>+				nvidia,pins = "uaa", "uab", "uda";</div><div class='add'>+				nvidia,function = "ulpi";</div><div class='add'>+			};</div><div class='add'>+			uad {</div><div class='add'>+				nvidia,pins = "uad";</div><div class='add'>+				nvidia,function = "spdif";</div><div class='add'>+			};</div><div class='add'>+			uca {</div><div class='add'>+				nvidia,pins = "uca", "ucb";</div><div class='add'>+				nvidia,function = "uartc";</div><div class='add'>+			};</div><div class='add'>+			conf_ata {</div><div class='add'>+				nvidia,pins = "ata", "atb", "atc", "atd", "ate",</div><div class='add'>+					"cdev1", "cdev2", "dap1", "dap2", "dtf",</div><div class='add'>+					"gma", "gmb", "gmc", "gmd", "gme",</div><div class='add'>+					"gpu", "gpu7", "gpv", "i2cp", "pta",</div><div class='add'>+					"rm", "sdio1", "slxk", "spdo", "uac",</div><div class='add'>+					"uda";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ck32 {</div><div class='add'>+				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",</div><div class='add'>+					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_crtp {</div><div class='add'>+				nvidia,pins = "crtp", "dap3", "dap4", "dtb",</div><div class='add'>+					"dtc", "dte", "slxa", "slxc", "slxd",</div><div class='add'>+					"spdi";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_csus {</div><div class='add'>+				nvidia,pins = "csus", "spia", "spib", "spid",</div><div class='add'>+					"spif";</div><div class='add'>+				nvidia,pull = &lt;1&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ddc {</div><div class='add'>+				nvidia,pins = "ddc", "irrx", "irtx", "kbca",</div><div class='add'>+					"kbcb", "kbcc", "kbcd", "kbce", "kbcf",</div><div class='add'>+					"spic", "spig", "uaa", "uab";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_dta {</div><div class='add'>+				nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",</div><div class='add'>+					"spie", "spih", "uad", "uca", "ucb";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_hdint {</div><div class='add'>+				nvidia,pins = "hdint", "ld0", "ld1", "ld2",</div><div class='add'>+					"ld3", "ld4", "ld5", "ld6", "ld7",</div><div class='add'>+					"ld8", "ld9", "ld10", "ld11", "ld12",</div><div class='add'>+					"ld13", "ld14", "ld15", "ld16", "ld17",</div><div class='add'>+					"ldc", "ldi", "lhs", "lsc0", "lspi",</div><div class='add'>+					"lvs", "pmc";</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_lc {</div><div class='add'>+				nvidia,pins = "lc", "ls";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_lcsn {</div><div class='add'>+				nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",</div><div class='add'>+					"lm0", "lm1", "lpp", "lpw0", "lpw1",</div><div class='add'>+					"lpw2", "lsc1", "lsck", "lsda", "lsdi",</div><div class='add'>+					"lvp0", "lvp1", "sdb";</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ld17_0 {</div><div class='add'>+				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",</div><div class='add'>+					"ld23_22";</div><div class='add'>+				nvidia,pull = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s@70002800 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial@70006000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;216000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial@70006200 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;216000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	i2c@7000c000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		alc5632: alc5632@1e {</div><div class='hunk'>@@ -22,25 +253,23 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c400 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c@7000c500 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	nvec@7000c500 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='add'>+	nvec {</div><div class='ctx'> 		compatible = "nvidia,nvec";</div><div class='del'>-		reg = &lt;0x7000C500 0x100&gt;;</div><div class='add'>+		reg = &lt;0x7000c500 0x100&gt;;</div><div class='ctx'> 		interrupts = &lt;0 92 0x04&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> 		clock-frequency = &lt;80000&gt;;</div><div class='del'>-		request-gpios = &lt;&amp;gpio 170 0&gt;;</div><div class='add'>+		request-gpios = &lt;&amp;gpio 170 0&gt;; /* gpio PV2 */</div><div class='ctx'> 		slave-addr = &lt;138&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000d000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		adt7461@4c {</div><div class='hunk'>@@ -49,66 +278,31 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2s@70002a00 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sound {</div><div class='del'>-		compatible = "nvidia,tegra-audio-alc5632-paz00",</div><div class='del'>-			"nvidia,tegra-audio-alc5632";</div><div class='del'>-</div><div class='del'>-		nvidia,model = "Compal PAZ00";</div><div class='del'>-</div><div class='del'>-		nvidia,audio-routing =</div><div class='del'>-			"Int Spk", "SPKOUT",</div><div class='del'>-			"Int Spk", "SPKOUTN",</div><div class='del'>-			"Headset Mic", "MICBIAS1",</div><div class='del'>-			"MIC1", "Headset Mic",</div><div class='del'>-			"Headset Stereophone", "HPR",</div><div class='del'>-			"Headset Stereophone", "HPL",</div><div class='del'>-			"DMICDAT", "Digital Mic";</div><div class='del'>-</div><div class='del'>-		nvidia,audio-codec = &lt;&amp;alc5632&gt;;</div><div class='del'>-		nvidia,i2s-controller = &lt;&amp;tegra_i2s1&gt;;</div><div class='del'>-		nvidia,hp-det-gpios = &lt;&amp;gpio 178 0&gt;; /* gpio PW2 */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006000 {</div><div class='del'>-		clock-frequency = &lt;216000000&gt;;</div><div class='add'>+	usb@c5000000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@70006040 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	usb@c5004000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		nvidia,phy-reset-gpio = &lt;&amp;gpio 168 0&gt;; /* gpio PV0 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@70006200 {</div><div class='del'>-		clock-frequency = &lt;216000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006300 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006400 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	usb@c5008000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdhci@c8000000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		cd-gpios = &lt;&amp;gpio 173 0&gt;; /* gpio PV5 */</div><div class='ctx'> 		wp-gpios = &lt;&amp;gpio 57 0&gt;;  /* gpio PH1 */</div><div class='ctx'> 		power-gpios = &lt;&amp;gpio 169 0&gt;; /* gpio PV1 */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@c8000200 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@c8000400 {</div><div class='del'>-		status = "disable";</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdhci@c8000600 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		support-8bit;</div><div class='add'>+		bus-width = &lt;8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio-keys {</div><div class='hunk'>@@ -127,8 +321,28 @@</div><div class='ctx'> </div><div class='ctx'> 		wifi {</div><div class='ctx'> 			label = "wifi-led";</div><div class='del'>-			gpios = &lt;&amp;gpio 24 0&gt;;</div><div class='add'>+			gpios = &lt;&amp;gpio 24 0&gt;; /* gpio PD0 */</div><div class='ctx'> 			linux,default-trigger = "rfkill0";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "nvidia,tegra-audio-alc5632-paz00",</div><div class='add'>+			"nvidia,tegra-audio-alc5632";</div><div class='add'>+</div><div class='add'>+		nvidia,model = "Compal PAZ00";</div><div class='add'>+</div><div class='add'>+		nvidia,audio-routing =</div><div class='add'>+			"Int Spk", "SPKOUT",</div><div class='add'>+			"Int Spk", "SPKOUTN",</div><div class='add'>+			"Headset Mic", "MICBIAS1",</div><div class='add'>+			"MIC1", "Headset Mic",</div><div class='add'>+			"Headset Stereophone", "HPR",</div><div class='add'>+			"Headset Stereophone", "HPL",</div><div class='add'>+			"DMICDAT", "Digital Mic";</div><div class='add'>+</div><div class='add'>+		nvidia,audio-codec = &lt;&amp;alc5632&gt;;</div><div class='add'>+		nvidia,i2s-controller = &lt;&amp;tegra_i2s1&gt;;</div><div class='add'>+		nvidia,hp-det-gpios = &lt;&amp;gpio 178 0&gt;; /* gpio PW2 */</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts<br/>index dbf1c5a171c2..89cb7f2acd92 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra-seaboard.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/tegra-seaboard.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra-seaboard.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra-seaboard.dts</a></div><div class='hunk'>@@ -7,112 +7,398 @@</div><div class='ctx'> 	compatible = "nvidia,seaboard", "nvidia,tegra20";</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt; 0x00000000 0x40000000 &gt;;</div><div class='add'>+		reg = &lt;0x00000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinmux {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+		state_default: pinmux {</div><div class='add'>+			ata {</div><div class='add'>+				nvidia,pins = "ata";</div><div class='add'>+				nvidia,function = "ide";</div><div class='add'>+			};</div><div class='add'>+			atb {</div><div class='add'>+				nvidia,pins = "atb", "gma", "gme";</div><div class='add'>+				nvidia,function = "sdio4";</div><div class='add'>+			};</div><div class='add'>+			atc {</div><div class='add'>+				nvidia,pins = "atc";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+			};</div><div class='add'>+			atd {</div><div class='add'>+				nvidia,pins = "atd", "ate", "gmb", "spia",</div><div class='add'>+					"spib", "spic";</div><div class='add'>+				nvidia,function = "gmi";</div><div class='add'>+			};</div><div class='add'>+			cdev1 {</div><div class='add'>+				nvidia,pins = "cdev1";</div><div class='add'>+				nvidia,function = "plla_out";</div><div class='add'>+			};</div><div class='add'>+			cdev2 {</div><div class='add'>+				nvidia,pins = "cdev2";</div><div class='add'>+				nvidia,function = "pllp_out4";</div><div class='add'>+			};</div><div class='add'>+			crtp {</div><div class='add'>+				nvidia,pins = "crtp", "lm1";</div><div class='add'>+				nvidia,function = "crt";</div><div class='add'>+			};</div><div class='add'>+			csus {</div><div class='add'>+				nvidia,pins = "csus";</div><div class='add'>+				nvidia,function = "vi_sensor_clk";</div><div class='add'>+			};</div><div class='add'>+			dap1 {</div><div class='add'>+				nvidia,pins = "dap1";</div><div class='add'>+				nvidia,function = "dap1";</div><div class='add'>+			};</div><div class='add'>+			dap2 {</div><div class='add'>+				nvidia,pins = "dap2";</div><div class='add'>+				nvidia,function = "dap2";</div><div class='add'>+			};</div><div class='add'>+			dap3 {</div><div class='add'>+				nvidia,pins = "dap3";</div><div class='add'>+				nvidia,function = "dap3";</div><div class='add'>+			};</div><div class='add'>+			dap4 {</div><div class='add'>+				nvidia,pins = "dap4";</div><div class='add'>+				nvidia,function = "dap4";</div><div class='add'>+			};</div><div class='add'>+			ddc {</div><div class='add'>+				nvidia,pins = "ddc", "owc", "spdi", "spdo",</div><div class='add'>+					"uac";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+			};</div><div class='add'>+			dta {</div><div class='add'>+				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";</div><div class='add'>+				nvidia,function = "vi";</div><div class='add'>+			};</div><div class='add'>+			dtf {</div><div class='add'>+				nvidia,pins = "dtf";</div><div class='add'>+				nvidia,function = "i2c3";</div><div class='add'>+			};</div><div class='add'>+			gmc {</div><div class='add'>+				nvidia,pins = "gmc";</div><div class='add'>+				nvidia,function = "uartd";</div><div class='add'>+			};</div><div class='add'>+			gmd {</div><div class='add'>+				nvidia,pins = "gmd";</div><div class='add'>+				nvidia,function = "sflash";</div><div class='add'>+			};</div><div class='add'>+			gpu {</div><div class='add'>+				nvidia,pins = "gpu";</div><div class='add'>+				nvidia,function = "pwm";</div><div class='add'>+			};</div><div class='add'>+			gpu7 {</div><div class='add'>+				nvidia,pins = "gpu7";</div><div class='add'>+				nvidia,function = "rtck";</div><div class='add'>+			};</div><div class='add'>+			gpv {</div><div class='add'>+				nvidia,pins = "gpv", "slxa", "slxk";</div><div class='add'>+				nvidia,function = "pcie";</div><div class='add'>+			};</div><div class='add'>+			hdint {</div><div class='add'>+				nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",</div><div class='add'>+					"lsck", "lsda";</div><div class='add'>+				nvidia,function = "hdmi";</div><div class='add'>+			};</div><div class='add'>+			i2cp {</div><div class='add'>+				nvidia,pins = "i2cp";</div><div class='add'>+				nvidia,function = "i2cp";</div><div class='add'>+			};</div><div class='add'>+			irrx {</div><div class='add'>+				nvidia,pins = "irrx", "irtx";</div><div class='add'>+				nvidia,function = "uartb";</div><div class='add'>+			};</div><div class='add'>+			kbca {</div><div class='add'>+				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",</div><div class='add'>+					"kbce", "kbcf";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+			};</div><div class='add'>+			lcsn {</div><div class='add'>+				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",</div><div class='add'>+					"lsdi", "lvp0";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+			};</div><div class='add'>+			ld0 {</div><div class='add'>+				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",</div><div class='add'>+					"ld5", "ld6", "ld7", "ld8", "ld9",</div><div class='add'>+					"ld10", "ld11", "ld12", "ld13", "ld14",</div><div class='add'>+					"ld15", "ld16", "ld17", "ldi", "lhp0",</div><div class='add'>+					"lhp1", "lhp2", "lhs", "lpp", "lsc0",</div><div class='add'>+					"lspi", "lvp1", "lvs";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+			};</div><div class='add'>+			pmc {</div><div class='add'>+				nvidia,pins = "pmc";</div><div class='add'>+				nvidia,function = "pwr_on";</div><div class='add'>+			};</div><div class='add'>+			pta {</div><div class='add'>+				nvidia,pins = "pta";</div><div class='add'>+				nvidia,function = "i2c2";</div><div class='add'>+			};</div><div class='add'>+			rm {</div><div class='add'>+				nvidia,pins = "rm";</div><div class='add'>+				nvidia,function = "i2c1";</div><div class='add'>+			};</div><div class='add'>+			sdb {</div><div class='add'>+				nvidia,pins = "sdb", "sdc", "sdd";</div><div class='add'>+				nvidia,function = "sdio3";</div><div class='add'>+			};</div><div class='add'>+			sdio1 {</div><div class='add'>+				nvidia,pins = "sdio1";</div><div class='add'>+				nvidia,function = "sdio1";</div><div class='add'>+			};</div><div class='add'>+			slxc {</div><div class='add'>+				nvidia,pins = "slxc", "slxd";</div><div class='add'>+				nvidia,function = "spdif";</div><div class='add'>+			};</div><div class='add'>+			spid {</div><div class='add'>+				nvidia,pins = "spid", "spie", "spif";</div><div class='add'>+				nvidia,function = "spi1";</div><div class='add'>+			};</div><div class='add'>+			spig {</div><div class='add'>+				nvidia,pins = "spig", "spih";</div><div class='add'>+				nvidia,function = "spi2_alt";</div><div class='add'>+			};</div><div class='add'>+			uaa {</div><div class='add'>+				nvidia,pins = "uaa", "uab", "uda";</div><div class='add'>+				nvidia,function = "ulpi";</div><div class='add'>+			};</div><div class='add'>+			uad {</div><div class='add'>+				nvidia,pins = "uad";</div><div class='add'>+				nvidia,function = "irda";</div><div class='add'>+			};</div><div class='add'>+			uca {</div><div class='add'>+				nvidia,pins = "uca", "ucb";</div><div class='add'>+				nvidia,function = "uartc";</div><div class='add'>+			};</div><div class='add'>+			conf_ata {</div><div class='add'>+				nvidia,pins = "ata", "atb", "atc", "atd",</div><div class='add'>+					"cdev1", "cdev2", "dap1", "dap2",</div><div class='add'>+					"dap4", "dtf", "gma", "gmc", "gmd",</div><div class='add'>+					"gme", "gpu", "gpu7", "i2cp", "irrx",</div><div class='add'>+					"irtx", "pta", "rm", "sdc", "sdd",</div><div class='add'>+					"slxd", "slxk", "spdi", "spdo", "uac",</div><div class='add'>+					"uad", "uca", "ucb", "uda";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ate {</div><div class='add'>+				nvidia,pins = "ate", "csus", "dap3", "ddc",</div><div class='add'>+					"gpv", "owc", "slxc", "spib", "spid",</div><div class='add'>+					"spie";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ck32 {</div><div class='add'>+				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",</div><div class='add'>+					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_crtp {</div><div class='add'>+				nvidia,pins = "crtp", "gmb", "slxa", "spia",</div><div class='add'>+					"spig", "spih";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_dta {</div><div class='add'>+				nvidia,pins = "dta", "dtb", "dtc", "dtd";</div><div class='add'>+				nvidia,pull = &lt;1&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_dte {</div><div class='add'>+				nvidia,pins = "dte", "spif";</div><div class='add'>+				nvidia,pull = &lt;1&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_hdint {</div><div class='add'>+				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",</div><div class='add'>+					"lpw1", "lsc1", "lsck", "lsda", "lsdi",</div><div class='add'>+					"lvp0";</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_kbca {</div><div class='add'>+				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",</div><div class='add'>+					"kbce", "kbcf", "sdio1", "spic", "uaa",</div><div class='add'>+					"uab";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_lc {</div><div class='add'>+				nvidia,pins = "lc", "ls";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ld0 {</div><div class='add'>+				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",</div><div class='add'>+					"ld5", "ld6", "ld7", "ld8", "ld9",</div><div class='add'>+					"ld10", "ld11", "ld12", "ld13", "ld14",</div><div class='add'>+					"ld15", "ld16", "ld17", "ldi", "lhp0",</div><div class='add'>+					"lhp1", "lhp2", "lhs", "lm0", "lpp",</div><div class='add'>+					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",</div><div class='add'>+					"lvs", "pmc", "sdb";</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ld17_0 {</div><div class='add'>+				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",</div><div class='add'>+					"ld23_22";</div><div class='add'>+				nvidia,pull = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			drive_sdio1 {</div><div class='add'>+				nvidia,pins = "drive_sdio1";</div><div class='add'>+				nvidia,high-speed-mode = &lt;0&gt;;</div><div class='add'>+				nvidia,schmitt = &lt;0&gt;;</div><div class='add'>+				nvidia,low-power-mode = &lt;3&gt;;</div><div class='add'>+				nvidia,pull-down-strength = &lt;31&gt;;</div><div class='add'>+				nvidia,pull-up-strength = &lt;31&gt;;</div><div class='add'>+				nvidia,slew-rate-rising = &lt;3&gt;;</div><div class='add'>+				nvidia,slew-rate-falling = &lt;3&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s@70002800 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial@70006300 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;216000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		wm8903: wm8903@1a {</div><div class='ctx'> 			compatible = "wlf,wm8903";</div><div class='ctx'> 			reg = &lt;0x1a&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-			interrupts = &lt; 187 0x04 &gt;;</div><div class='add'>+			interrupts = &lt;187 0x04&gt;;</div><div class='ctx'> </div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			micdet-cfg = &lt;0&gt;;</div><div class='ctx'> 			micdet-delay = &lt;100&gt;;</div><div class='del'>-			gpio-cfg = &lt; 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff &gt;;</div><div class='add'>+			gpio-cfg = &lt;0xffffffff 0xffffffff 0 0xffffffff 0xffffffff&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* ALS and proximity sensor */</div><div class='add'>+		isl29018@44 {</div><div class='add'>+			compatible = "isil,isl29018";</div><div class='add'>+			reg = &lt;0x44&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;202 0x04&gt;; /* GPIO PZ2 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gyrometer@68 {</div><div class='add'>+			compatible = "invn,mpu3050";</div><div class='add'>+			reg = &lt;0x68&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;204 0x04&gt;; /* gpio PZ4 */</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c400 {</div><div class='del'>-		clock-frequency = &lt;400000&gt;;</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+		smart-battery@b {</div><div class='add'>+			compatible = "ti,bq20z75", "smart-battery-1.1";</div><div class='add'>+			reg = &lt;0xb&gt;;</div><div class='add'>+			ti,i2c-retry-count = &lt;2&gt;;</div><div class='add'>+			ti,poll-retry-count = &lt;10&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c500 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000d000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-		adt7461@4c {</div><div class='del'>-			compatible = "adt7461";</div><div class='add'>+		temperature-sensor@4c {</div><div class='add'>+			compatible = "nct1008";</div><div class='ctx'> 			reg = &lt;0x4c&gt;;</div><div class='ctx'> 		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2s@70002a00 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sound {</div><div class='del'>-		compatible = "nvidia,tegra-audio-wm8903-seaboard",</div><div class='del'>-			     "nvidia,tegra-audio-wm8903";</div><div class='del'>-		nvidia,model = "NVIDIA Tegra Seaboard";</div><div class='del'>-</div><div class='del'>-		nvidia,audio-routing =</div><div class='del'>-			"Headphone Jack", "HPOUTR",</div><div class='del'>-			"Headphone Jack", "HPOUTL",</div><div class='del'>-			"Int Spk", "ROP",</div><div class='del'>-			"Int Spk", "RON",</div><div class='del'>-			"Int Spk", "LOP",</div><div class='del'>-			"Int Spk", "LON",</div><div class='del'>-			"Mic Jack", "MICBIAS",</div><div class='del'>-			"IN1R", "Mic Jack";</div><div class='del'>-</div><div class='del'>-		nvidia,i2s-controller = &lt;&amp;tegra_i2s1&gt;;</div><div class='del'>-		nvidia,audio-codec = &lt;&amp;wm8903&gt;;</div><div class='del'>-</div><div class='del'>-		nvidia,spkr-en-gpios = &lt;&amp;wm8903 2 0&gt;;</div><div class='del'>-		nvidia,hp-det-gpios = &lt;&amp;gpio 185 0&gt;; /* gpio PX1 */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006000 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='ctx'> </div><div class='del'>-	serial@70006040 {</div><div class='del'>-		status = "disable";</div><div class='add'>+		magnetometer@c {</div><div class='add'>+			compatible = "ak8975";</div><div class='add'>+			reg = &lt;0xc&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;109 0x04&gt;; /* gpio PN5 */</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@70006200 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='add'>+	emc {</div><div class='add'>+		emc-table@190000 {</div><div class='add'>+			reg = &lt;190000&gt;;</div><div class='add'>+			compatible = "nvidia,tegra20-emc-table";</div><div class='add'>+			clock-frequency = &lt;190000&gt;;</div><div class='add'>+			nvidia,emc-registers = &lt;0x0000000c 0x00000026</div><div class='add'>+				0x00000009 0x00000003 0x00000004 0x00000004</div><div class='add'>+				0x00000002 0x0000000c 0x00000003 0x00000003</div><div class='add'>+				0x00000002 0x00000001 0x00000004 0x00000005</div><div class='add'>+				0x00000004 0x00000009 0x0000000d 0x0000059f</div><div class='add'>+				0x00000000 0x00000003 0x00000003 0x00000003</div><div class='add'>+				0x00000003 0x00000001 0x0000000b 0x000000c8</div><div class='add'>+				0x00000003 0x00000007 0x00000004 0x0000000f</div><div class='add'>+				0x00000002 0x00000000 0x00000000 0x00000002</div><div class='add'>+				0x00000000 0x00000000 0x00000083 0xa06204ae</div><div class='add'>+				0x007dc010 0x00000000 0x00000000 0x00000000</div><div class='add'>+				0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-	serial@70006300 {</div><div class='del'>-		clock-frequency = &lt; 216000000 &gt;;</div><div class='add'>+		emc-table@380000 {</div><div class='add'>+			reg = &lt;380000&gt;;</div><div class='add'>+			compatible = "nvidia,tegra20-emc-table";</div><div class='add'>+			clock-frequency = &lt;380000&gt;;</div><div class='add'>+			nvidia,emc-registers = &lt;0x00000017 0x0000004b</div><div class='add'>+				0x00000012 0x00000006 0x00000004 0x00000005</div><div class='add'>+				0x00000003 0x0000000c 0x00000006 0x00000006</div><div class='add'>+				0x00000003 0x00000001 0x00000004 0x00000005</div><div class='add'>+				0x00000004 0x00000009 0x0000000d 0x00000b5f</div><div class='add'>+				0x00000000 0x00000003 0x00000003 0x00000006</div><div class='add'>+				0x00000006 0x00000001 0x00000011 0x000000c8</div><div class='add'>+				0x00000003 0x0000000e 0x00000007 0x0000000f</div><div class='add'>+				0x00000002 0x00000000 0x00000000 0x00000002</div><div class='add'>+				0x00000000 0x00000000 0x00000083 0xe044048b</div><div class='add'>+				0x007d8010 0x00000000 0x00000000 0x00000000</div><div class='add'>+				0x00000000 0x00000000 0x00000000 0x00000000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@70006400 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	usb@c5000000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		nvidia,vbus-gpio = &lt;&amp;gpio 24 0&gt;; /* PD0 */</div><div class='add'>+		dr_mode = "otg";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@c8000000 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	usb@c5004000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		nvidia,phy-reset-gpio = &lt;&amp;gpio 169 0&gt;; /* gpio PV1 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@c8000200 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	usb@c5008000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdhci@c8000400 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		cd-gpios = &lt;&amp;gpio 69 0&gt;; /* gpio PI5 */</div><div class='ctx'> 		wp-gpios = &lt;&amp;gpio 57 0&gt;; /* gpio PH1 */</div><div class='ctx'> 		power-gpios = &lt;&amp;gpio 70 0&gt;; /* gpio PI6 */</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdhci@c8000600 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		support-8bit;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb@c5000000 {</div><div class='del'>-		nvidia,vbus-gpio = &lt;&amp;gpio 24 0&gt;; /* PD0 */</div><div class='del'>-		dr_mode = "otg";</div><div class='add'>+		bus-width = &lt;8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpio-keys {</div><div class='hunk'>@@ -135,41 +421,25 @@</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	emc@7000f400 {</div><div class='del'>-		emc-table@190000 {</div><div class='del'>-			reg = &lt; 190000 &gt;;</div><div class='del'>-			compatible = "nvidia,tegra20-emc-table";</div><div class='del'>-			clock-frequency = &lt; 190000 &gt;;</div><div class='del'>-			nvidia,emc-registers = &lt; 0x0000000c 0x00000026</div><div class='del'>-				0x00000009 0x00000003 0x00000004 0x00000004</div><div class='del'>-				0x00000002 0x0000000c 0x00000003 0x00000003</div><div class='del'>-				0x00000002 0x00000001 0x00000004 0x00000005</div><div class='del'>-				0x00000004 0x00000009 0x0000000d 0x0000059f</div><div class='del'>-				0x00000000 0x00000003 0x00000003 0x00000003</div><div class='del'>-				0x00000003 0x00000001 0x0000000b 0x000000c8</div><div class='del'>-				0x00000003 0x00000007 0x00000004 0x0000000f</div><div class='del'>-				0x00000002 0x00000000 0x00000000 0x00000002</div><div class='del'>-				0x00000000 0x00000000 0x00000083 0xa06204ae</div><div class='del'>-				0x007dc010 0x00000000 0x00000000 0x00000000</div><div class='del'>-				0x00000000 0x00000000 0x00000000 0x00000000 &gt;;</div><div class='del'>-		};</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "nvidia,tegra-audio-wm8903-seaboard",</div><div class='add'>+			     "nvidia,tegra-audio-wm8903";</div><div class='add'>+		nvidia,model = "NVIDIA Tegra Seaboard";</div><div class='ctx'> </div><div class='del'>-		emc-table@380000 {</div><div class='del'>-			reg = &lt; 380000 &gt;;</div><div class='del'>-			compatible = "nvidia,tegra20-emc-table";</div><div class='del'>-			clock-frequency = &lt; 380000 &gt;;</div><div class='del'>-			nvidia,emc-registers = &lt; 0x00000017 0x0000004b</div><div class='del'>-				0x00000012 0x00000006 0x00000004 0x00000005</div><div class='del'>-				0x00000003 0x0000000c 0x00000006 0x00000006</div><div class='del'>-				0x00000003 0x00000001 0x00000004 0x00000005</div><div class='del'>-				0x00000004 0x00000009 0x0000000d 0x00000b5f</div><div class='del'>-				0x00000000 0x00000003 0x00000003 0x00000006</div><div class='del'>-				0x00000006 0x00000001 0x00000011 0x000000c8</div><div class='del'>-				0x00000003 0x0000000e 0x00000007 0x0000000f</div><div class='del'>-				0x00000002 0x00000000 0x00000000 0x00000002</div><div class='del'>-				0x00000000 0x00000000 0x00000083 0xe044048b</div><div class='del'>-				0x007d8010 0x00000000 0x00000000 0x00000000</div><div class='del'>-				0x00000000 0x00000000 0x00000000 0x00000000 &gt;;</div><div class='del'>-		};</div><div class='add'>+		nvidia,audio-routing =</div><div class='add'>+			"Headphone Jack", "HPOUTR",</div><div class='add'>+			"Headphone Jack", "HPOUTL",</div><div class='add'>+			"Int Spk", "ROP",</div><div class='add'>+			"Int Spk", "RON",</div><div class='add'>+			"Int Spk", "LOP",</div><div class='add'>+			"Int Spk", "LON",</div><div class='add'>+			"Mic Jack", "MICBIAS",</div><div class='add'>+			"IN1R", "Mic Jack";</div><div class='add'>+</div><div class='add'>+		nvidia,i2s-controller = &lt;&amp;tegra_i2s1&gt;;</div><div class='add'>+		nvidia,audio-codec = &lt;&amp;wm8903&gt;;</div><div class='add'>+</div><div class='add'>+		nvidia,spkr-en-gpios = &lt;&amp;wm8903 2 0&gt;;</div><div class='add'>+		nvidia,hp-det-gpios = &lt;&amp;gpio 185 0&gt;; /* gpio PX1 */</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts<br/>index 252476867b54..9de5636023f6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra-trimslice.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/tegra-trimslice.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra-trimslice.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra-trimslice.dts</a></div><div class='hunk'>@@ -6,72 +6,301 @@</div><div class='ctx'> 	model = "Compulab TrimSlice board";</div><div class='ctx'> 	compatible = "compulab,trimslice", "nvidia,tegra20";</div><div class='ctx'> </div><div class='del'>-	memory@0 {</div><div class='del'>-		reg = &lt; 0x00000000 0x40000000 &gt;;</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x00000000 0x40000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c@7000c000 {</div><div class='del'>-		clock-frequency = &lt;400000&gt;;</div><div class='del'>-	};</div><div class='add'>+	pinmux {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='ctx'> </div><div class='del'>-	i2c@7000c400 {</div><div class='del'>-		clock-frequency = &lt;400000&gt;;</div><div class='add'>+		state_default: pinmux {</div><div class='add'>+			ata {</div><div class='add'>+				nvidia,pins = "ata";</div><div class='add'>+				nvidia,function = "ide";</div><div class='add'>+			};</div><div class='add'>+			atb {</div><div class='add'>+				nvidia,pins = "atb", "gma";</div><div class='add'>+				nvidia,function = "sdio4";</div><div class='add'>+			};</div><div class='add'>+			atc {</div><div class='add'>+				nvidia,pins = "atc", "gmb";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+			};</div><div class='add'>+			atd {</div><div class='add'>+				nvidia,pins = "atd", "ate", "gme", "pta";</div><div class='add'>+				nvidia,function = "gmi";</div><div class='add'>+			};</div><div class='add'>+			cdev1 {</div><div class='add'>+				nvidia,pins = "cdev1";</div><div class='add'>+				nvidia,function = "plla_out";</div><div class='add'>+			};</div><div class='add'>+			cdev2 {</div><div class='add'>+				nvidia,pins = "cdev2";</div><div class='add'>+				nvidia,function = "pllp_out4";</div><div class='add'>+			};</div><div class='add'>+			crtp {</div><div class='add'>+				nvidia,pins = "crtp";</div><div class='add'>+				nvidia,function = "crt";</div><div class='add'>+			};</div><div class='add'>+			csus {</div><div class='add'>+				nvidia,pins = "csus";</div><div class='add'>+				nvidia,function = "vi_sensor_clk";</div><div class='add'>+			};</div><div class='add'>+			dap1 {</div><div class='add'>+				nvidia,pins = "dap1";</div><div class='add'>+				nvidia,function = "dap1";</div><div class='add'>+			};</div><div class='add'>+			dap2 {</div><div class='add'>+				nvidia,pins = "dap2";</div><div class='add'>+				nvidia,function = "dap2";</div><div class='add'>+			};</div><div class='add'>+			dap3 {</div><div class='add'>+				nvidia,pins = "dap3";</div><div class='add'>+				nvidia,function = "dap3";</div><div class='add'>+			};</div><div class='add'>+			dap4 {</div><div class='add'>+				nvidia,pins = "dap4";</div><div class='add'>+				nvidia,function = "dap4";</div><div class='add'>+			};</div><div class='add'>+			ddc {</div><div class='add'>+				nvidia,pins = "ddc";</div><div class='add'>+				nvidia,function = "i2c2";</div><div class='add'>+			};</div><div class='add'>+			dta {</div><div class='add'>+				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";</div><div class='add'>+				nvidia,function = "vi";</div><div class='add'>+			};</div><div class='add'>+			dtf {</div><div class='add'>+				nvidia,pins = "dtf";</div><div class='add'>+				nvidia,function = "i2c3";</div><div class='add'>+			};</div><div class='add'>+			gmc {</div><div class='add'>+				nvidia,pins = "gmc", "gmd";</div><div class='add'>+				nvidia,function = "sflash";</div><div class='add'>+			};</div><div class='add'>+			gpu {</div><div class='add'>+				nvidia,pins = "gpu";</div><div class='add'>+				nvidia,function = "uarta";</div><div class='add'>+			};</div><div class='add'>+			gpu7 {</div><div class='add'>+				nvidia,pins = "gpu7";</div><div class='add'>+				nvidia,function = "rtck";</div><div class='add'>+			};</div><div class='add'>+			gpv {</div><div class='add'>+				nvidia,pins = "gpv", "slxa", "slxk";</div><div class='add'>+				nvidia,function = "pcie";</div><div class='add'>+			};</div><div class='add'>+			hdint {</div><div class='add'>+				nvidia,pins = "hdint";</div><div class='add'>+				nvidia,function = "hdmi";</div><div class='add'>+			};</div><div class='add'>+			i2cp {</div><div class='add'>+				nvidia,pins = "i2cp";</div><div class='add'>+				nvidia,function = "i2cp";</div><div class='add'>+			};</div><div class='add'>+			irrx {</div><div class='add'>+				nvidia,pins = "irrx", "irtx";</div><div class='add'>+				nvidia,function = "uartb";</div><div class='add'>+			};</div><div class='add'>+			kbca {</div><div class='add'>+				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",</div><div class='add'>+					"kbce", "kbcf";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+			};</div><div class='add'>+			lcsn {</div><div class='add'>+				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",</div><div class='add'>+					"ld3", "ld4", "ld5", "ld6", "ld7",</div><div class='add'>+					"ld8", "ld9", "ld10", "ld11", "ld12",</div><div class='add'>+					"ld13", "ld14", "ld15", "ld16", "ld17",</div><div class='add'>+					"ldc", "ldi", "lhp0", "lhp1", "lhp2",</div><div class='add'>+					"lhs", "lm0", "lm1", "lpp", "lpw0",</div><div class='add'>+					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",</div><div class='add'>+					"lsda", "lsdi", "lspi", "lvp0", "lvp1",</div><div class='add'>+					"lvs";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+			};</div><div class='add'>+			owc {</div><div class='add'>+				nvidia,pins = "owc", "uac";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+			};</div><div class='add'>+			pmc {</div><div class='add'>+				nvidia,pins = "pmc";</div><div class='add'>+				nvidia,function = "pwr_on";</div><div class='add'>+			};</div><div class='add'>+			rm {</div><div class='add'>+				nvidia,pins = "rm";</div><div class='add'>+				nvidia,function = "i2c1";</div><div class='add'>+			};</div><div class='add'>+			sdb {</div><div class='add'>+				nvidia,pins = "sdb", "sdc", "sdd";</div><div class='add'>+				nvidia,function = "pwm";</div><div class='add'>+			};</div><div class='add'>+			sdio1 {</div><div class='add'>+				nvidia,pins = "sdio1";</div><div class='add'>+				nvidia,function = "sdio1";</div><div class='add'>+			};</div><div class='add'>+			slxc {</div><div class='add'>+				nvidia,pins = "slxc", "slxd";</div><div class='add'>+				nvidia,function = "sdio3";</div><div class='add'>+			};</div><div class='add'>+			spdi {</div><div class='add'>+				nvidia,pins = "spdi", "spdo";</div><div class='add'>+				nvidia,function = "spdif";</div><div class='add'>+			};</div><div class='add'>+			spia {</div><div class='add'>+				nvidia,pins = "spia", "spib", "spic";</div><div class='add'>+				nvidia,function = "spi2";</div><div class='add'>+			};</div><div class='add'>+			spid {</div><div class='add'>+				nvidia,pins = "spid", "spie", "spif";</div><div class='add'>+				nvidia,function = "spi1";</div><div class='add'>+			};</div><div class='add'>+			spig {</div><div class='add'>+				nvidia,pins = "spig", "spih";</div><div class='add'>+				nvidia,function = "spi2_alt";</div><div class='add'>+			};</div><div class='add'>+			uaa {</div><div class='add'>+				nvidia,pins = "uaa", "uab", "uda";</div><div class='add'>+				nvidia,function = "ulpi";</div><div class='add'>+			};</div><div class='add'>+			uad {</div><div class='add'>+				nvidia,pins = "uad";</div><div class='add'>+				nvidia,function = "irda";</div><div class='add'>+			};</div><div class='add'>+			uca {</div><div class='add'>+				nvidia,pins = "uca", "ucb";</div><div class='add'>+				nvidia,function = "uartc";</div><div class='add'>+			};</div><div class='add'>+			conf_ata {</div><div class='add'>+				nvidia,pins = "ata", "atc", "atd", "ate",</div><div class='add'>+					"crtp", "dap2", "dap3", "dap4", "dta",</div><div class='add'>+					"dtb", "dtc", "dtd", "dte", "gmb",</div><div class='add'>+					"gme", "i2cp", "pta", "slxc", "slxd",</div><div class='add'>+					"spdi", "spdo", "uda";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_atb {</div><div class='add'>+				nvidia,pins = "atb", "cdev1", "cdev2", "dap1",</div><div class='add'>+					"gma", "gmc", "gmd", "gpu", "gpu7",</div><div class='add'>+					"gpv", "sdio1", "slxa", "slxk", "uac";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ck32 {</div><div class='add'>+				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",</div><div class='add'>+					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_csus {</div><div class='add'>+				nvidia,pins = "csus", "spia", "spib",</div><div class='add'>+					"spid", "spif";</div><div class='add'>+				nvidia,pull = &lt;1&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ddc {</div><div class='add'>+				nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_hdint {</div><div class='add'>+				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",</div><div class='add'>+					"lpw1", "lsc1", "lsck", "lsda", "lsdi",</div><div class='add'>+					"lvp0", "pmc";</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_irrx {</div><div class='add'>+				nvidia,pins = "irrx", "irtx", "kbca", "kbcb",</div><div class='add'>+					"kbcc", "kbcd", "kbce", "kbcf", "owc",</div><div class='add'>+					"spic", "spie", "spig", "spih", "uaa",</div><div class='add'>+					"uab", "uad", "uca", "ucb";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_lc {</div><div class='add'>+				nvidia,pins = "lc", "ls";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ld0 {</div><div class='add'>+				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",</div><div class='add'>+					"ld5", "ld6", "ld7", "ld8", "ld9",</div><div class='add'>+					"ld10", "ld11", "ld12", "ld13", "ld14",</div><div class='add'>+					"ld15", "ld16", "ld17", "ldi", "lhp0",</div><div class='add'>+					"lhp1", "lhp2", "lhs", "lm0", "lpp",</div><div class='add'>+					"lpw0", "lpw2", "lsc0", "lspi", "lvp1",</div><div class='add'>+					"lvs", "sdb";</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ld17_0 {</div><div class='add'>+				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",</div><div class='add'>+					"ld23_22";</div><div class='add'>+				nvidia,pull = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c@7000c500 {</div><div class='del'>-		clock-frequency = &lt;400000&gt;;</div><div class='add'>+	i2s@70002800 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c@7000d000 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	serial@70006000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;216000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2s@70002800 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	i2c@7000c000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2s@70002a00 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	i2c@7000c400 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	das@70000c00 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='add'>+	i2c@7000c500 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='del'>-	serial@70006000 {</div><div class='del'>-		clock-frequency = &lt; 216000000 &gt;;</div><div class='del'>-	};</div><div class='add'>+		codec: codec@1a {</div><div class='add'>+			compatible = "ti,tlv320aic23";</div><div class='add'>+			reg = &lt;0x1a&gt;;</div><div class='add'>+		};</div><div class='ctx'> </div><div class='del'>-	serial@70006040 {</div><div class='del'>-		status = "disable";</div><div class='add'>+		rtc@56 {</div><div class='add'>+			compatible = "emmicro,em3027";</div><div class='add'>+			reg = &lt;0x56&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@70006200 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	usb@c5000000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@70006300 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	usb@c5004000 {</div><div class='add'>+		nvidia,phy-reset-gpio = &lt;&amp;gpio 168 0&gt;; /* gpio PV0 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	serial@70006400 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	usb@c5008000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdhci@c8000000 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@c8000200 {</div><div class='del'>-		status = "disable";</div><div class='add'>+		status = "okay";</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@c8000400 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	sdhci@c8000600 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		cd-gpios = &lt;&amp;gpio 121 0&gt;; /* gpio PP1 */</div><div class='add'>+		wp-gpios = &lt;&amp;gpio 122 0&gt;; /* gpio PP2 */</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@c8000600 {</div><div class='del'>-		cd-gpios = &lt;&amp;gpio 121 0&gt;;</div><div class='del'>-		wp-gpios = &lt;&amp;gpio 122 0&gt;;</div><div class='add'>+	sound {</div><div class='add'>+		compatible = "nvidia,tegra-audio-trimslice";</div><div class='add'>+		nvidia,i2s-controller = &lt;&amp;tegra_i2s1&gt;;</div><div class='add'>+		nvidia,audio-codec = &lt;&amp;codec&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts<br/>index 2dcff8728e90..445343b0fbdd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra-ventana.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/tegra-ventana.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra-ventana.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra-ventana.dts</a></div><div class='hunk'>@@ -7,41 +7,315 @@</div><div class='ctx'> 	compatible = "nvidia,ventana", "nvidia,tegra20";</div><div class='ctx'> </div><div class='ctx'> 	memory {</div><div class='del'>-		reg = &lt; 0x00000000 0x40000000 &gt;;</div><div class='add'>+		reg = &lt;0x00000000 0x40000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pinmux {</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+		state_default: pinmux {</div><div class='add'>+			ata {</div><div class='add'>+				nvidia,pins = "ata";</div><div class='add'>+				nvidia,function = "ide";</div><div class='add'>+			};</div><div class='add'>+			atb {</div><div class='add'>+				nvidia,pins = "atb", "gma", "gme";</div><div class='add'>+				nvidia,function = "sdio4";</div><div class='add'>+			};</div><div class='add'>+			atc {</div><div class='add'>+				nvidia,pins = "atc";</div><div class='add'>+				nvidia,function = "nand";</div><div class='add'>+			};</div><div class='add'>+			atd {</div><div class='add'>+				nvidia,pins = "atd", "ate", "gmb", "spia",</div><div class='add'>+					"spib", "spic";</div><div class='add'>+				nvidia,function = "gmi";</div><div class='add'>+			};</div><div class='add'>+			cdev1 {</div><div class='add'>+				nvidia,pins = "cdev1";</div><div class='add'>+				nvidia,function = "plla_out";</div><div class='add'>+			};</div><div class='add'>+			cdev2 {</div><div class='add'>+				nvidia,pins = "cdev2";</div><div class='add'>+				nvidia,function = "pllp_out4";</div><div class='add'>+			};</div><div class='add'>+			crtp {</div><div class='add'>+				nvidia,pins = "crtp", "lm1";</div><div class='add'>+				nvidia,function = "crt";</div><div class='add'>+			};</div><div class='add'>+			csus {</div><div class='add'>+				nvidia,pins = "csus";</div><div class='add'>+				nvidia,function = "vi_sensor_clk";</div><div class='add'>+			};</div><div class='add'>+			dap1 {</div><div class='add'>+				nvidia,pins = "dap1";</div><div class='add'>+				nvidia,function = "dap1";</div><div class='add'>+			};</div><div class='add'>+			dap2 {</div><div class='add'>+				nvidia,pins = "dap2";</div><div class='add'>+				nvidia,function = "dap2";</div><div class='add'>+			};</div><div class='add'>+			dap3 {</div><div class='add'>+				nvidia,pins = "dap3";</div><div class='add'>+				nvidia,function = "dap3";</div><div class='add'>+			};</div><div class='add'>+			dap4 {</div><div class='add'>+				nvidia,pins = "dap4";</div><div class='add'>+				nvidia,function = "dap4";</div><div class='add'>+			};</div><div class='add'>+			ddc {</div><div class='add'>+				nvidia,pins = "ddc", "owc", "spdi", "spdo",</div><div class='add'>+					"uac";</div><div class='add'>+				nvidia,function = "rsvd2";</div><div class='add'>+			};</div><div class='add'>+			dta {</div><div class='add'>+				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";</div><div class='add'>+				nvidia,function = "vi";</div><div class='add'>+			};</div><div class='add'>+			dtf {</div><div class='add'>+				nvidia,pins = "dtf";</div><div class='add'>+				nvidia,function = "i2c3";</div><div class='add'>+			};</div><div class='add'>+			gmc {</div><div class='add'>+				nvidia,pins = "gmc";</div><div class='add'>+				nvidia,function = "uartd";</div><div class='add'>+			};</div><div class='add'>+			gmd {</div><div class='add'>+				nvidia,pins = "gmd";</div><div class='add'>+				nvidia,function = "sflash";</div><div class='add'>+			};</div><div class='add'>+			gpu {</div><div class='add'>+				nvidia,pins = "gpu";</div><div class='add'>+				nvidia,function = "pwm";</div><div class='add'>+			};</div><div class='add'>+			gpu7 {</div><div class='add'>+				nvidia,pins = "gpu7";</div><div class='add'>+				nvidia,function = "rtck";</div><div class='add'>+			};</div><div class='add'>+			gpv {</div><div class='add'>+				nvidia,pins = "gpv", "slxa", "slxk";</div><div class='add'>+				nvidia,function = "pcie";</div><div class='add'>+			};</div><div class='add'>+			hdint {</div><div class='add'>+				nvidia,pins = "hdint", "pta";</div><div class='add'>+				nvidia,function = "hdmi";</div><div class='add'>+			};</div><div class='add'>+			i2cp {</div><div class='add'>+				nvidia,pins = "i2cp";</div><div class='add'>+				nvidia,function = "i2cp";</div><div class='add'>+			};</div><div class='add'>+			irrx {</div><div class='add'>+				nvidia,pins = "irrx", "irtx";</div><div class='add'>+				nvidia,function = "uartb";</div><div class='add'>+			};</div><div class='add'>+			kbca {</div><div class='add'>+				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",</div><div class='add'>+					"kbce", "kbcf";</div><div class='add'>+				nvidia,function = "kbc";</div><div class='add'>+			};</div><div class='add'>+			lcsn {</div><div class='add'>+				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",</div><div class='add'>+					"lsdi", "lvp0";</div><div class='add'>+				nvidia,function = "rsvd4";</div><div class='add'>+			};</div><div class='add'>+			ld0 {</div><div class='add'>+				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",</div><div class='add'>+					"ld5", "ld6", "ld7", "ld8", "ld9",</div><div class='add'>+					"ld10", "ld11", "ld12", "ld13", "ld14",</div><div class='add'>+					"ld15", "ld16", "ld17", "ldi", "lhp0",</div><div class='add'>+					"lhp1", "lhp2", "lhs", "lpp", "lpw0",</div><div class='add'>+					"lpw2", "lsc0", "lsc1", "lsck", "lsda",</div><div class='add'>+					"lspi", "lvp1", "lvs";</div><div class='add'>+				nvidia,function = "displaya";</div><div class='add'>+			};</div><div class='add'>+			pmc {</div><div class='add'>+				nvidia,pins = "pmc";</div><div class='add'>+				nvidia,function = "pwr_on";</div><div class='add'>+			};</div><div class='add'>+			rm {</div><div class='add'>+				nvidia,pins = "rm";</div><div class='add'>+				nvidia,function = "i2c1";</div><div class='add'>+			};</div><div class='add'>+			sdb {</div><div class='add'>+				nvidia,pins = "sdb", "sdc", "sdd", "slxc";</div><div class='add'>+				nvidia,function = "sdio3";</div><div class='add'>+			};</div><div class='add'>+			sdio1 {</div><div class='add'>+				nvidia,pins = "sdio1";</div><div class='add'>+				nvidia,function = "sdio1";</div><div class='add'>+			};</div><div class='add'>+			slxd {</div><div class='add'>+				nvidia,pins = "slxd";</div><div class='add'>+				nvidia,function = "spdif";</div><div class='add'>+			};</div><div class='add'>+			spid {</div><div class='add'>+				nvidia,pins = "spid", "spie", "spif";</div><div class='add'>+				nvidia,function = "spi1";</div><div class='add'>+			};</div><div class='add'>+			spig {</div><div class='add'>+				nvidia,pins = "spig", "spih";</div><div class='add'>+				nvidia,function = "spi2_alt";</div><div class='add'>+			};</div><div class='add'>+			uaa {</div><div class='add'>+				nvidia,pins = "uaa", "uab", "uda";</div><div class='add'>+				nvidia,function = "ulpi";</div><div class='add'>+			};</div><div class='add'>+			uad {</div><div class='add'>+				nvidia,pins = "uad";</div><div class='add'>+				nvidia,function = "irda";</div><div class='add'>+			};</div><div class='add'>+			uca {</div><div class='add'>+				nvidia,pins = "uca", "ucb";</div><div class='add'>+				nvidia,function = "uartc";</div><div class='add'>+			};</div><div class='add'>+			conf_ata {</div><div class='add'>+				nvidia,pins = "ata", "atb", "atc", "atd",</div><div class='add'>+					"cdev1", "cdev2", "dap1", "dap2",</div><div class='add'>+					"dap4", "ddc", "dtf", "gma", "gmc",</div><div class='add'>+					"gme", "gpu", "gpu7", "i2cp", "irrx",</div><div class='add'>+					"irtx", "pta", "rm", "sdc", "sdd",</div><div class='add'>+					"slxc", "slxd", "slxk", "spdi", "spdo",</div><div class='add'>+					"uac", "uad", "uca", "ucb", "uda";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ate {</div><div class='add'>+				nvidia,pins = "ate", "csus", "dap3", "gmd",</div><div class='add'>+					"gpv", "owc", "spia", "spib", "spic",</div><div class='add'>+					"spid", "spie", "spig";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ck32 {</div><div class='add'>+				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",</div><div class='add'>+					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";</div><div class='add'>+				nvidia,pull = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_crtp {</div><div class='add'>+				nvidia,pins = "crtp", "gmb", "slxa", "spih";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_dta {</div><div class='add'>+				nvidia,pins = "dta", "dtb", "dtc", "dtd";</div><div class='add'>+				nvidia,pull = &lt;1&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_dte {</div><div class='add'>+				nvidia,pins = "dte", "spif";</div><div class='add'>+				nvidia,pull = &lt;1&gt;;</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_hdint {</div><div class='add'>+				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",</div><div class='add'>+					"lpw1", "lsck", "lsda", "lsdi", "lvp0";</div><div class='add'>+				nvidia,tristate = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_kbca {</div><div class='add'>+				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",</div><div class='add'>+					"kbce", "kbcf", "sdio1", "uaa", "uab";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_lc {</div><div class='add'>+				nvidia,pins = "lc", "ls";</div><div class='add'>+				nvidia,pull = &lt;2&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ld0 {</div><div class='add'>+				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",</div><div class='add'>+					"ld5", "ld6", "ld7", "ld8", "ld9",</div><div class='add'>+					"ld10", "ld11", "ld12", "ld13", "ld14",</div><div class='add'>+					"ld15", "ld16", "ld17", "ldi", "lhp0",</div><div class='add'>+					"lhp1", "lhp2", "lhs", "lm0", "lpp",</div><div class='add'>+					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",</div><div class='add'>+					"lvp1", "lvs", "pmc", "sdb";</div><div class='add'>+				nvidia,tristate = &lt;0&gt;;</div><div class='add'>+			};</div><div class='add'>+			conf_ld17_0 {</div><div class='add'>+				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",</div><div class='add'>+					"ld23_22";</div><div class='add'>+				nvidia,pull = &lt;1&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2s@70002800 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	serial@70006300 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		clock-frequency = &lt;216000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> </div><div class='ctx'> 		wm8903: wm8903@1a {</div><div class='ctx'> 			compatible = "wlf,wm8903";</div><div class='ctx'> 			reg = &lt;0x1a&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-			interrupts = &lt; 187 0x04 &gt;;</div><div class='add'>+			interrupts = &lt;187 0x04&gt;;</div><div class='ctx'> </div><div class='ctx'> 			gpio-controller;</div><div class='ctx'> 			#gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'> 			micdet-cfg = &lt;0&gt;;</div><div class='ctx'> 			micdet-delay = &lt;100&gt;;</div><div class='del'>-			gpio-cfg = &lt; 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff &gt;;</div><div class='add'>+			gpio-cfg = &lt;0xffffffff 0xffffffff 0 0xffffffff 0xffffffff&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* ALS and proximity sensor */</div><div class='add'>+		isl29018@44 {</div><div class='add'>+			compatible = "isil,isl29018";</div><div class='add'>+			reg = &lt;0x44&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+			interrupts = &lt;202 0x04&gt;; /*gpio PZ2 */</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c400 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000c500 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	i2c@7000d000 {</div><div class='add'>+		status = "okay";</div><div class='ctx'> 		clock-frequency = &lt;400000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2s@70002a00 {</div><div class='del'>-		status = "disable";</div><div class='add'>+	usb@c5000000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb@c5004000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		nvidia,phy-reset-gpio = &lt;&amp;gpio 169 0&gt;; /* gpio PV1 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	usb@c5008000 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhci@c8000400 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		cd-gpios = &lt;&amp;gpio 69 0&gt;; /* gpio PI5 */</div><div class='add'>+		wp-gpios = &lt;&amp;gpio 57 0&gt;; /* gpio PH1 */</div><div class='add'>+		power-gpios = &lt;&amp;gpio 70 0&gt;; /* gpio PI6 */</div><div class='add'>+		bus-width = &lt;4&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhci@c8000600 {</div><div class='add'>+		status = "okay";</div><div class='add'>+		support-8bit;</div><div class='add'>+		bus-width = &lt;8&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sound {</div><div class='hunk'>@@ -64,45 +338,7 @@</div><div class='ctx'> </div><div class='ctx'> 		nvidia,spkr-en-gpios = &lt;&amp;wm8903 2 0&gt;;</div><div class='ctx'> 		nvidia,hp-det-gpios = &lt;&amp;gpio 178 0&gt;; /* gpio PW2 */</div><div class='del'>-		nvidia,int-mic-en-gpios = &lt;&amp;gpio 184 0&gt;; /*gpio PX0 */</div><div class='add'>+		nvidia,int-mic-en-gpios = &lt;&amp;gpio 184 0&gt;; /* gpio PX0 */</div><div class='ctx'> 		nvidia,ext-mic-en-gpios = &lt;&amp;gpio 185 0&gt;; /* gpio PX1 */</div><div class='ctx'> 	};</div><div class='del'>-</div><div class='del'>-	serial@70006000 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006040 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006200 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006300 {</div><div class='del'>-		clock-frequency = &lt; 216000000 &gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@70006400 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@c8000000 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@c8000200 {</div><div class='del'>-		status = "disable";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@c8000400 {</div><div class='del'>-		cd-gpios = &lt;&amp;gpio 69 0&gt;; /* gpio PI5 */</div><div class='del'>-		wp-gpios = &lt;&amp;gpio 57 0&gt;; /* gpio PH1 */</div><div class='del'>-		power-gpios = &lt;&amp;gpio 70 0&gt;; /* gpio PI6 */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@c8000600 {</div><div class='del'>-		support-8bit;</div><div class='del'>-	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi<br/>index 108e894a8926..c417d67e9027 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra20.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/tegra20.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra20.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra20.dtsi</a></div><div class='hunk'>@@ -4,207 +4,242 @@</div><div class='ctx'> 	compatible = "nvidia,tegra20";</div><div class='ctx'> 	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> </div><div class='del'>-	pmc@7000f400 {</div><div class='del'>-		compatible = "nvidia,tegra20-pmc";</div><div class='del'>-		reg = &lt;0x7000e400 0x400&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller@50041000 {</div><div class='add'>+	intc: interrupt-controller {</div><div class='ctx'> 		compatible = "arm,cortex-a9-gic";</div><div class='add'>+		reg = &lt;0x50041000 0x1000</div><div class='add'>+		       0x50040100 0x0100&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='del'>-		reg = &lt; 0x50041000 0x1000 &gt;,</div><div class='del'>-		      &lt; 0x50040100 0x0100 &gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pmu {</div><div class='del'>-		compatible = "arm,cortex-a9-pmu";</div><div class='del'>-		interrupts = &lt;0 56 0x04</div><div class='del'>-			      0 57 0x04&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	apbdma: dma@6000a000 {</div><div class='add'>+	apbdma: dma {</div><div class='ctx'> 		compatible = "nvidia,tegra20-apbdma";</div><div class='ctx'> 		reg = &lt;0x6000a000 0x1200&gt;;</div><div class='del'>-		interrupts = &lt; 0 104 0x04</div><div class='del'>-			       0 105 0x04</div><div class='del'>-			       0 106 0x04</div><div class='del'>-			       0 107 0x04</div><div class='del'>-			       0 108 0x04</div><div class='del'>-			       0 109 0x04</div><div class='del'>-			       0 110 0x04</div><div class='del'>-			       0 111 0x04</div><div class='del'>-			       0 112 0x04</div><div class='del'>-			       0 113 0x04</div><div class='del'>-			       0 114 0x04</div><div class='del'>-			       0 115 0x04</div><div class='del'>-			       0 116 0x04</div><div class='del'>-			       0 117 0x04</div><div class='del'>-			       0 118 0x04</div><div class='del'>-			       0 119 0x04 &gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@7000c000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "nvidia,tegra20-i2c";</div><div class='del'>-		reg = &lt;0x7000C000 0x100&gt;;</div><div class='del'>-		interrupts = &lt; 0 38 0x04 &gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@7000c400 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "nvidia,tegra20-i2c";</div><div class='del'>-		reg = &lt;0x7000C400 0x100&gt;;</div><div class='del'>-		interrupts = &lt; 0 84 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 104 0x04</div><div class='add'>+			      0 105 0x04</div><div class='add'>+			      0 106 0x04</div><div class='add'>+			      0 107 0x04</div><div class='add'>+			      0 108 0x04</div><div class='add'>+			      0 109 0x04</div><div class='add'>+			      0 110 0x04</div><div class='add'>+			      0 111 0x04</div><div class='add'>+			      0 112 0x04</div><div class='add'>+			      0 113 0x04</div><div class='add'>+			      0 114 0x04</div><div class='add'>+			      0 115 0x04</div><div class='add'>+			      0 116 0x04</div><div class='add'>+			      0 117 0x04</div><div class='add'>+			      0 118 0x04</div><div class='add'>+			      0 119 0x04&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		compatible = "nvidia,tegra20-ahb";</div><div class='add'>+		reg = &lt;0x6000c004 0x10c&gt;; /* AHB Arbitration + Gizmo Controller */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio: gpio {</div><div class='add'>+		compatible = "nvidia,tegra20-gpio";</div><div class='add'>+		reg = &lt;0x6000d000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0 32 0x04</div><div class='add'>+			      0 33 0x04</div><div class='add'>+			      0 34 0x04</div><div class='add'>+			      0 35 0x04</div><div class='add'>+			      0 55 0x04</div><div class='add'>+			      0 87 0x04</div><div class='add'>+			      0 89 0x04&gt;;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#interrupt-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c@7000c500 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "nvidia,tegra20-i2c";</div><div class='del'>-		reg = &lt;0x7000C500 0x100&gt;;</div><div class='del'>-		interrupts = &lt; 0 92 0x04 &gt;;</div><div class='add'>+	pinmux: pinmux {</div><div class='add'>+		compatible = "nvidia,tegra20-pinmux";</div><div class='add'>+		reg = &lt;0x70000014 0x10   /* Tri-state registers */</div><div class='add'>+		       0x70000080 0x20   /* Mux registers */</div><div class='add'>+		       0x700000a0 0x14   /* Pull-up/down registers */</div><div class='add'>+		       0x70000868 0xa8&gt;; /* Pad control registers */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c@7000d000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "nvidia,tegra20-i2c-dvc";</div><div class='del'>-		reg = &lt;0x7000D000 0x200&gt;;</div><div class='del'>-		interrupts = &lt; 0 53 0x04 &gt;;</div><div class='add'>+	das {</div><div class='add'>+		compatible = "nvidia,tegra20-das";</div><div class='add'>+		reg = &lt;0x70000c00 0x80&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	tegra_i2s1: i2s@70002800 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-i2s";</div><div class='ctx'> 		reg = &lt;0x70002800 0x200&gt;;</div><div class='del'>-		interrupts = &lt; 0 13 0x04 &gt;;</div><div class='del'>-		nvidia,dma-request-selector = &lt; &amp;apbdma 2 &gt;;</div><div class='add'>+		interrupts = &lt;0 13 0x04&gt;;</div><div class='add'>+		nvidia,dma-request-selector = &lt;&amp;apbdma 2&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	tegra_i2s2: i2s@70002a00 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-i2s";</div><div class='ctx'> 		reg = &lt;0x70002a00 0x200&gt;;</div><div class='del'>-		interrupts = &lt; 0 3 0x04 &gt;;</div><div class='del'>-		nvidia,dma-request-selector = &lt; &amp;apbdma 1 &gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	das@70000c00 {</div><div class='del'>-		compatible = "nvidia,tegra20-das";</div><div class='del'>-		reg = &lt;0x70000c00 0x80&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio: gpio@6000d000 {</div><div class='del'>-		compatible = "nvidia,tegra20-gpio";</div><div class='del'>-		reg = &lt; 0x6000d000 0x1000 &gt;;</div><div class='del'>-		interrupts = &lt; 0 32 0x04</div><div class='del'>-			       0 33 0x04</div><div class='del'>-			       0 34 0x04</div><div class='del'>-			       0 35 0x04</div><div class='del'>-			       0 55 0x04</div><div class='del'>-			       0 87 0x04</div><div class='del'>-			       0 89 0x04 &gt;;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pinmux: pinmux@70000000 {</div><div class='del'>-		compatible = "nvidia,tegra20-pinmux";</div><div class='del'>-		reg = &lt; 0x70000014 0x10    /* Tri-state registers */</div><div class='del'>-			0x70000080 0x20    /* Mux registers */</div><div class='del'>-			0x700000a0 0x14    /* Pull-up/down registers */</div><div class='del'>-			0x70000868 0xa8 &gt;; /* Pad control registers */</div><div class='add'>+		interrupts = &lt;0 3 0x04&gt;;</div><div class='add'>+		nvidia,dma-request-selector = &lt;&amp;apbdma 1&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	serial@70006000 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-uart";</div><div class='ctx'> 		reg = &lt;0x70006000 0x40&gt;;</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt; 0 36 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 36 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	serial@70006040 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-uart";</div><div class='ctx'> 		reg = &lt;0x70006040 0x40&gt;;</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt; 0 37 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 37 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	serial@70006200 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-uart";</div><div class='ctx'> 		reg = &lt;0x70006200 0x100&gt;;</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt; 0 46 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 46 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	serial@70006300 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-uart";</div><div class='ctx'> 		reg = &lt;0x70006300 0x100&gt;;</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt; 0 90 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 90 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	serial@70006400 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-uart";</div><div class='ctx'> 		reg = &lt;0x70006400 0x100&gt;;</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt; 0 91 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 91 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	emc@7000f400 {</div><div class='add'>+	i2c@7000c000 {</div><div class='add'>+		compatible = "nvidia,tegra20-i2c";</div><div class='add'>+		reg = &lt;0x7000c000 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 38 0x04&gt;;</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "nvidia,tegra20-emc";</div><div class='del'>-		reg = &lt;0x7000f400 0x200&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@c8000000 {</div><div class='del'>-		compatible = "nvidia,tegra20-sdhci";</div><div class='del'>-		reg = &lt;0xc8000000 0x200&gt;;</div><div class='del'>-		interrupts = &lt; 0 14 0x04 &gt;;</div><div class='add'>+	i2c@7000c400 {</div><div class='add'>+		compatible = "nvidia,tegra20-i2c";</div><div class='add'>+		reg = &lt;0x7000c400 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 84 0x04&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@c8000200 {</div><div class='del'>-		compatible = "nvidia,tegra20-sdhci";</div><div class='del'>-		reg = &lt;0xc8000200 0x200&gt;;</div><div class='del'>-		interrupts = &lt; 0 15 0x04 &gt;;</div><div class='add'>+	i2c@7000c500 {</div><div class='add'>+		compatible = "nvidia,tegra20-i2c";</div><div class='add'>+		reg = &lt;0x7000c500 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 92 0x04&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@c8000400 {</div><div class='del'>-		compatible = "nvidia,tegra20-sdhci";</div><div class='del'>-		reg = &lt;0xc8000400 0x200&gt;;</div><div class='del'>-		interrupts = &lt; 0 19 0x04 &gt;;</div><div class='add'>+	i2c@7000d000 {</div><div class='add'>+		compatible = "nvidia,tegra20-i2c-dvc";</div><div class='add'>+		reg = &lt;0x7000d000 0x200&gt;;</div><div class='add'>+		interrupts = &lt;0 53 0x04&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sdhci@c8000600 {</div><div class='del'>-		compatible = "nvidia,tegra20-sdhci";</div><div class='del'>-		reg = &lt;0xc8000600 0x200&gt;;</div><div class='del'>-		interrupts = &lt; 0 31 0x04 &gt;;</div><div class='add'>+	pmc {</div><div class='add'>+		compatible = "nvidia,tegra20-pmc";</div><div class='add'>+		reg = &lt;0x7000e400 0x400&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mc {</div><div class='add'>+		compatible = "nvidia,tegra20-mc";</div><div class='add'>+		reg = &lt;0x7000f000 0x024</div><div class='add'>+		       0x7000f03c 0x3c4&gt;;</div><div class='add'>+		interrupts = &lt;0 77 0x04&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gart {</div><div class='add'>+		compatible = "nvidia,tegra20-gart";</div><div class='add'>+		reg = &lt;0x7000f024 0x00000018	/* controller registers */</div><div class='add'>+		       0x58000000 0x02000000&gt;;	/* GART aperture */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	emc {</div><div class='add'>+		compatible = "nvidia,tegra20-emc";</div><div class='add'>+		reg = &lt;0x7000f400 0x200&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb@c5000000 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-ehci", "usb-ehci";</div><div class='ctx'> 		reg = &lt;0xc5000000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt; 0 20 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 20 0x04&gt;;</div><div class='ctx'> 		phy_type = "utmi";</div><div class='ctx'> 		nvidia,has-legacy-mode;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb@c5004000 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-ehci", "usb-ehci";</div><div class='ctx'> 		reg = &lt;0xc5004000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt; 0 21 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 21 0x04&gt;;</div><div class='ctx'> 		phy_type = "ulpi";</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usb@c5008000 {</div><div class='ctx'> 		compatible = "nvidia,tegra20-ehci", "usb-ehci";</div><div class='ctx'> 		reg = &lt;0xc5008000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt; 0 97 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 97 0x04&gt;;</div><div class='ctx'> 		phy_type = "utmi";</div><div class='add'>+		status = "disable";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhci@c8000000 {</div><div class='add'>+		compatible = "nvidia,tegra20-sdhci";</div><div class='add'>+		reg = &lt;0xc8000000 0x200&gt;;</div><div class='add'>+		interrupts = &lt;0 14 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='del'>-};</div><div class='ctx'> </div><div class='add'>+	sdhci@c8000200 {</div><div class='add'>+		compatible = "nvidia,tegra20-sdhci";</div><div class='add'>+		reg = &lt;0xc8000200 0x200&gt;;</div><div class='add'>+		interrupts = &lt;0 15 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhci@c8000400 {</div><div class='add'>+		compatible = "nvidia,tegra20-sdhci";</div><div class='add'>+		reg = &lt;0xc8000400 0x200&gt;;</div><div class='add'>+		interrupts = &lt;0 19 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sdhci@c8000600 {</div><div class='add'>+		compatible = "nvidia,tegra20-sdhci";</div><div class='add'>+		reg = &lt;0xc8000600 0x200&gt;;</div><div class='add'>+		interrupts = &lt;0 31 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a9-pmu";</div><div class='add'>+		interrupts = &lt;0 56 0x04</div><div class='add'>+			      0 57 0x04&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi<br/>index 62a7b39f1c9a..2dcc09e784b5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra30.dtsi?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/tegra30.dtsi</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tegra30.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tegra30.dtsi</a></div><div class='hunk'>@@ -4,183 +4,268 @@</div><div class='ctx'> 	compatible = "nvidia,tegra30";</div><div class='ctx'> 	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'> </div><div class='del'>-	pmc@7000f400 {</div><div class='del'>-		compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";</div><div class='del'>-		reg = &lt;0x7000e400 0x400&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller@50041000 {</div><div class='add'>+	intc: interrupt-controller {</div><div class='ctx'> 		compatible = "arm,cortex-a9-gic";</div><div class='add'>+		reg = &lt;0x50041000 0x1000</div><div class='add'>+		       0x50040100 0x0100&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='del'>-		reg = &lt; 0x50041000 0x1000 &gt;,</div><div class='del'>-		      &lt; 0x50040100 0x0100 &gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pmu {</div><div class='del'>-		compatible = "arm,cortex-a9-pmu";</div><div class='del'>-		interrupts = &lt;0 144 0x04</div><div class='del'>-			      0 145 0x04</div><div class='del'>-			      0 146 0x04</div><div class='del'>-			      0 147 0x04&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	apbdma: dma@6000a000 {</div><div class='add'>+	apbdma: dma {</div><div class='ctx'> 		compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";</div><div class='ctx'> 		reg = &lt;0x6000a000 0x1400&gt;;</div><div class='del'>-		interrupts = &lt; 0 104 0x04</div><div class='del'>-			       0 105 0x04</div><div class='del'>-			       0 106 0x04</div><div class='del'>-			       0 107 0x04</div><div class='del'>-			       0 108 0x04</div><div class='del'>-			       0 109 0x04</div><div class='del'>-			       0 110 0x04</div><div class='del'>-			       0 111 0x04</div><div class='del'>-			       0 112 0x04</div><div class='del'>-			       0 113 0x04</div><div class='del'>-			       0 114 0x04</div><div class='del'>-			       0 115 0x04</div><div class='del'>-			       0 116 0x04</div><div class='del'>-			       0 117 0x04</div><div class='del'>-			       0 118 0x04</div><div class='del'>-			       0 119 0x04</div><div class='del'>-			       0 128 0x04</div><div class='del'>-			       0 129 0x04</div><div class='del'>-			       0 130 0x04</div><div class='del'>-			       0 131 0x04</div><div class='del'>-			       0 132 0x04</div><div class='del'>-			       0 133 0x04</div><div class='del'>-			       0 134 0x04</div><div class='del'>-			       0 135 0x04</div><div class='del'>-			       0 136 0x04</div><div class='del'>-			       0 137 0x04</div><div class='del'>-			       0 138 0x04</div><div class='del'>-			       0 139 0x04</div><div class='del'>-			       0 140 0x04</div><div class='del'>-			       0 141 0x04</div><div class='del'>-			       0 142 0x04</div><div class='del'>-			       0 143 0x04 &gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@7000c000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";</div><div class='del'>-		reg = &lt;0x7000C000 0x100&gt;;</div><div class='del'>-		interrupts = &lt; 0 38 0x04 &gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@7000c400 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";</div><div class='del'>-		reg = &lt;0x7000C400 0x100&gt;;</div><div class='del'>-		interrupts = &lt; 0 84 0x04 &gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@7000c500 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";</div><div class='del'>-		reg = &lt;0x7000C500 0x100&gt;;</div><div class='del'>-		interrupts = &lt; 0 92 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 104 0x04</div><div class='add'>+			      0 105 0x04</div><div class='add'>+			      0 106 0x04</div><div class='add'>+			      0 107 0x04</div><div class='add'>+			      0 108 0x04</div><div class='add'>+			      0 109 0x04</div><div class='add'>+			      0 110 0x04</div><div class='add'>+			      0 111 0x04</div><div class='add'>+			      0 112 0x04</div><div class='add'>+			      0 113 0x04</div><div class='add'>+			      0 114 0x04</div><div class='add'>+			      0 115 0x04</div><div class='add'>+			      0 116 0x04</div><div class='add'>+			      0 117 0x04</div><div class='add'>+			      0 118 0x04</div><div class='add'>+			      0 119 0x04</div><div class='add'>+			      0 128 0x04</div><div class='add'>+			      0 129 0x04</div><div class='add'>+			      0 130 0x04</div><div class='add'>+			      0 131 0x04</div><div class='add'>+			      0 132 0x04</div><div class='add'>+			      0 133 0x04</div><div class='add'>+			      0 134 0x04</div><div class='add'>+			      0 135 0x04</div><div class='add'>+			      0 136 0x04</div><div class='add'>+			      0 137 0x04</div><div class='add'>+			      0 138 0x04</div><div class='add'>+			      0 139 0x04</div><div class='add'>+			      0 140 0x04</div><div class='add'>+			      0 141 0x04</div><div class='add'>+			      0 142 0x04</div><div class='add'>+			      0 143 0x04&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c@7000c700 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";</div><div class='del'>-		reg = &lt;0x7000c700 0x100&gt;;</div><div class='del'>-		interrupts = &lt; 0 120 0x04 &gt;;</div><div class='add'>+	ahb: ahb {</div><div class='add'>+		compatible = "nvidia,tegra30-ahb";</div><div class='add'>+		reg = &lt;0x6000c004 0x14c&gt;; /* AHB Arbitration + Gizmo Controller */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i2c@7000d000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";</div><div class='del'>-		reg = &lt;0x7000D000 0x100&gt;;</div><div class='del'>-		interrupts = &lt; 0 53 0x04 &gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio: gpio@6000d000 {</div><div class='add'>+	gpio: gpio {</div><div class='ctx'> 		compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";</div><div class='del'>-		reg = &lt; 0x6000d000 0x1000 &gt;;</div><div class='del'>-		interrupts = &lt; 0 32 0x04</div><div class='del'>-			       0 33 0x04</div><div class='del'>-			       0 34 0x04</div><div class='del'>-			       0 35 0x04</div><div class='del'>-			       0 55 0x04</div><div class='del'>-			       0 87 0x04</div><div class='del'>-			       0 89 0x04</div><div class='del'>-			       0 125 0x04 &gt;;</div><div class='add'>+		reg = &lt;0x6000d000 0x1000&gt;;</div><div class='add'>+		interrupts = &lt;0 32 0x04</div><div class='add'>+			      0 33 0x04</div><div class='add'>+			      0 34 0x04</div><div class='add'>+			      0 35 0x04</div><div class='add'>+			      0 55 0x04</div><div class='add'>+			      0 87 0x04</div><div class='add'>+			      0 89 0x04</div><div class='add'>+			      0 125 0x04&gt;;</div><div class='ctx'> 		#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 		gpio-controller;</div><div class='ctx'> 		#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinmux: pinmux {</div><div class='add'>+		compatible = "nvidia,tegra30-pinmux";</div><div class='add'>+		reg = &lt;0x70000868 0xd0    /* Pad control registers */</div><div class='add'>+		       0x70003000 0x3e0&gt;; /* Mux registers */</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	serial@70006000 {</div><div class='ctx'> 		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";</div><div class='ctx'> 		reg = &lt;0x70006000 0x40&gt;;</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt; 0 36 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 36 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	serial@70006040 {</div><div class='ctx'> 		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";</div><div class='ctx'> 		reg = &lt;0x70006040 0x40&gt;;</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt; 0 37 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 37 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	serial@70006200 {</div><div class='ctx'> 		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";</div><div class='ctx'> 		reg = &lt;0x70006200 0x100&gt;;</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt; 0 46 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 46 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	serial@70006300 {</div><div class='ctx'> 		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";</div><div class='ctx'> 		reg = &lt;0x70006300 0x100&gt;;</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt; 0 90 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 90 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	serial@70006400 {</div><div class='ctx'> 		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";</div><div class='ctx'> 		reg = &lt;0x70006400 0x100&gt;;</div><div class='ctx'> 		reg-shift = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt; 0 91 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 91 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c000 {</div><div class='add'>+		compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";</div><div class='add'>+		reg = &lt;0x7000c000 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 38 0x04&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disable";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c400 {</div><div class='add'>+		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";</div><div class='add'>+		reg = &lt;0x7000c400 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 84 0x04&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disable";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c500 {</div><div class='add'>+		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";</div><div class='add'>+		reg = &lt;0x7000c500 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 92 0x04&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disable";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000c700 {</div><div class='add'>+		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";</div><div class='add'>+		reg = &lt;0x7000c700 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 120 0x04&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disable";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@7000d000 {</div><div class='add'>+		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";</div><div class='add'>+		reg = &lt;0x7000d000 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 53 0x04&gt;;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+		status = "disable";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pmc {</div><div class='add'>+		compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";</div><div class='add'>+		reg = &lt;0x7000e400 0x400&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mc {</div><div class='add'>+		compatible = "nvidia,tegra30-mc";</div><div class='add'>+		reg = &lt;0x7000f000 0x010</div><div class='add'>+		       0x7000f03c 0x1b4</div><div class='add'>+		       0x7000f200 0x028</div><div class='add'>+		       0x7000f284 0x17c&gt;;</div><div class='add'>+		interrupts = &lt;0 77 0x04&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	smmu {</div><div class='add'>+		compatible = "nvidia,tegra30-smmu";</div><div class='add'>+		reg = &lt;0x7000f010 0x02c</div><div class='add'>+		       0x7000f1f0 0x010</div><div class='add'>+		       0x7000f228 0x05c&gt;;</div><div class='add'>+		nvidia,#asids = &lt;4&gt;;		/* # of ASIDs */</div><div class='add'>+		dma-window = &lt;0 0x40000000&gt;;	/* IOVA start &amp; length */</div><div class='add'>+		nvidia,ahb = &lt;&amp;ahb&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahub {</div><div class='add'>+		compatible = "nvidia,tegra30-ahub";</div><div class='add'>+		reg = &lt;0x70080000 0x200</div><div class='add'>+		       0x70080200 0x100&gt;;</div><div class='add'>+		interrupts = &lt;0 103 0x04&gt;;</div><div class='add'>+		nvidia,dma-request-selector = &lt;&amp;apbdma 1&gt;;</div><div class='add'>+</div><div class='add'>+		ranges;</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+		tegra_i2s0: i2s@70080300 {</div><div class='add'>+			compatible = "nvidia,tegra30-i2s";</div><div class='add'>+			reg = &lt;0x70080300 0x100&gt;;</div><div class='add'>+			nvidia,ahub-cif-ids = &lt;4 4&gt;;</div><div class='add'>+			status = "disable";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tegra_i2s1: i2s@70080400 {</div><div class='add'>+			compatible = "nvidia,tegra30-i2s";</div><div class='add'>+			reg = &lt;0x70080400 0x100&gt;;</div><div class='add'>+			nvidia,ahub-cif-ids = &lt;5 5&gt;;</div><div class='add'>+			status = "disable";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tegra_i2s2: i2s@70080500 {</div><div class='add'>+			compatible = "nvidia,tegra30-i2s";</div><div class='add'>+			reg = &lt;0x70080500 0x100&gt;;</div><div class='add'>+			nvidia,ahub-cif-ids = &lt;6 6&gt;;</div><div class='add'>+			status = "disable";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tegra_i2s3: i2s@70080600 {</div><div class='add'>+			compatible = "nvidia,tegra30-i2s";</div><div class='add'>+			reg = &lt;0x70080600 0x100&gt;;</div><div class='add'>+			nvidia,ahub-cif-ids = &lt;7 7&gt;;</div><div class='add'>+			status = "disable";</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		tegra_i2s4: i2s@70080700 {</div><div class='add'>+			compatible = "nvidia,tegra30-i2s";</div><div class='add'>+			reg = &lt;0x70080700 0x100&gt;;</div><div class='add'>+			nvidia,ahub-cif-ids = &lt;8 8&gt;;</div><div class='add'>+			status = "disable";</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdhci@78000000 {</div><div class='ctx'> 		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";</div><div class='ctx'> 		reg = &lt;0x78000000 0x200&gt;;</div><div class='del'>-		interrupts = &lt; 0 14 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 14 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdhci@78000200 {</div><div class='ctx'> 		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";</div><div class='ctx'> 		reg = &lt;0x78000200 0x200&gt;;</div><div class='del'>-		interrupts = &lt; 0 15 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 15 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdhci@78000400 {</div><div class='ctx'> 		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";</div><div class='ctx'> 		reg = &lt;0x78000400 0x200&gt;;</div><div class='del'>-		interrupts = &lt; 0 19 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 19 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	sdhci@78000600 {</div><div class='ctx'> 		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";</div><div class='ctx'> 		reg = &lt;0x78000600 0x200&gt;;</div><div class='del'>-		interrupts = &lt; 0 31 0x04 &gt;;</div><div class='add'>+		interrupts = &lt;0 31 0x04&gt;;</div><div class='add'>+		status = "disable";</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	pinmux: pinmux@70000000 {</div><div class='del'>-		compatible = "nvidia,tegra30-pinmux";</div><div class='del'>-		reg = &lt; 0x70000868 0xd0     /* Pad control registers */</div><div class='del'>-			0x70003000 0x3e0 &gt;; /* Mux registers */</div><div class='add'>+	pmu {</div><div class='add'>+		compatible = "arm,cortex-a9-pmu";</div><div class='add'>+		interrupts = &lt;0 144 0x04</div><div class='add'>+			      0 145 0x04</div><div class='add'>+			      0 146 0x04</div><div class='add'>+			      0 147 0x04&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/tny_a9260.dts b/arch/arm/boot/dts/tny_a9260.dts<br/>new file mode 100644<br/>index 000000000000..367a16dcd5ef<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tny_a9260.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tny_a9260.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+/*</div><div class='add'>+ * tny_a9260.dts - Device Tree file for Caloa TNY A9260 board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "at91sam9260.dtsi"</div><div class='add'>+/include/ "tny_a9260_common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Calao TNY A9260";</div><div class='add'>+	compatible = "calao,tny-a9260", "atmel,at91sam9260", "atmel,at91sam9";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/tny_a9260_common.dtsi b/arch/arm/boot/dts/tny_a9260_common.dtsi<br/>new file mode 100644<br/>index 000000000000..0e6d3de2e09e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tny_a9260_common.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tny_a9260_common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+/*</div><div class='add'>+ * tny_a9260_common.dtsi - Device Tree file for Caloa TNY A926x board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock6 rw rootfstype=ubifs";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x4000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		main_clock: clock@0 {</div><div class='add'>+			compatible = "atmel,osc", "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;12000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			dbgu: serial@fffff200 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			nand-bus-width = &lt;8&gt;;</div><div class='add'>+			nand-ecc-mode = "soft";</div><div class='add'>+			nand-on-flash-bbt;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			at91bootstrap@0 {</div><div class='add'>+				label = "at91bootstrap";</div><div class='add'>+				reg = &lt;0x0 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			barebox@20000 {</div><div class='add'>+				label = "barebox";</div><div class='add'>+				reg = &lt;0x20000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bareboxenv@60000 {</div><div class='add'>+				label = "bareboxenv";</div><div class='add'>+				reg = &lt;0x60000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bareboxenv2@80000 {</div><div class='add'>+				label = "bareboxenv2";</div><div class='add'>+				reg = &lt;0x80000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			oftree@80000 {</div><div class='add'>+				label = "oftree";</div><div class='add'>+				reg = &lt;0xa0000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kernel@a0000 {</div><div class='add'>+				label = "kernel";</div><div class='add'>+				reg = &lt;0xc0000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rootfs@4a0000 {</div><div class='add'>+				label = "rootfs";</div><div class='add'>+				reg = &lt;0x4c0000 0x7800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			data@7ca0000 {</div><div class='add'>+				label = "data";</div><div class='add'>+				reg = &lt;0x7cc0000 0x8340000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/tny_a9263.dts b/arch/arm/boot/dts/tny_a9263.dts<br/>new file mode 100644<br/>index 000000000000..dee9c571306b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tny_a9263.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tny_a9263.dts</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+/*</div><div class='add'>+ * usb_a9263.dts - Device Tree file for Caloa USB A9293 board</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 only</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "at91sam9263.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Calao TNY A9263";</div><div class='add'>+	compatible = "atmel,tny-a9263", "atmel,at91sam9263", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x4000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		main_clock: clock@0 {</div><div class='add'>+			compatible = "atmel,osc", "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;12000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			dbgu: serial@ffffee00 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb1: gadget@fff78000 {</div><div class='add'>+				atmel,vbus-gpio = &lt;&amp;pioB 11 0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			nand-bus-width = &lt;8&gt;;</div><div class='add'>+			nand-ecc-mode = "soft";</div><div class='add'>+			nand-on-flash-bbt;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			at91bootstrap@0 {</div><div class='add'>+				label = "at91bootstrap";</div><div class='add'>+				reg = &lt;0x0 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			barebox@20000 {</div><div class='add'>+				label = "barebox";</div><div class='add'>+				reg = &lt;0x20000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bareboxenv@60000 {</div><div class='add'>+				label = "bareboxenv";</div><div class='add'>+				reg = &lt;0x60000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bareboxenv2@80000 {</div><div class='add'>+				label = "bareboxenv2";</div><div class='add'>+				reg = &lt;0x80000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			oftree@80000 {</div><div class='add'>+				label = "oftree";</div><div class='add'>+				reg = &lt;0xa0000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kernel@a0000 {</div><div class='add'>+				label = "kernel";</div><div class='add'>+				reg = &lt;0xc0000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rootfs@4a0000 {</div><div class='add'>+				label = "rootfs";</div><div class='add'>+				reg = &lt;0x4c0000 0x7800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			data@7ca0000 {</div><div class='add'>+				label = "data";</div><div class='add'>+				reg = &lt;0x7cc0000 0x8340000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/tny_a9g20.dts b/arch/arm/boot/dts/tny_a9g20.dts<br/>new file mode 100644<br/>index 000000000000..e1ab64c72dba<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/tny_a9g20.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/tny_a9g20.dts</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+/*</div><div class='add'>+ * tny_a9g20.dts - Device Tree file for Caloa TNY A9G20 board</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "at91sam9g20.dtsi"</div><div class='add'>+/include/ "tny_a9260_common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Calao TNY A9G20";</div><div class='add'>+	compatible = "calao,tny-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi<br/>new file mode 100644<br/>index 000000000000..22f4d1394ed3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/twl4030.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/twl4030.dtsi</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Integrated Power Management Chip</div><div class='add'>+ */</div><div class='add'>+&amp;twl {</div><div class='add'>+	compatible = "ti,twl4030";</div><div class='add'>+	interrupt-controller;</div><div class='add'>+	#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	rtc {</div><div class='add'>+		compatible = "ti,twl4030-rtc";</div><div class='add'>+		interrupts = &lt;11&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdac: regulator@0 {</div><div class='add'>+		compatible = "ti,twl4030-vdac";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vpll2: regulator@1 {</div><div class='add'>+		compatible = "ti,twl4030-vpll2";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmmc1: regulator@2 {</div><div class='add'>+		compatible = "ti,twl4030-vmmc1";</div><div class='add'>+		regulator-min-microvolt = &lt;1850000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3150000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	twl_gpio: gpio {</div><div class='add'>+		compatible = "ti,twl4030-gpio";</div><div class='add'>+		gpio-controller;</div><div class='add'>+		#gpio-cells = &lt;2&gt;;</div><div class='add'>+		interrupt-controller;</div><div class='add'>+		#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi<br/>new file mode 100644<br/>index 000000000000..3b2f3510d7eb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/twl6030.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/twl6030.dtsi</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Integrated Power Management Chip</div><div class='add'>+ * http://www.ti.com/lit/ds/symlink/twl6030.pdf</div><div class='add'>+ */</div><div class='add'>+&amp;twl {</div><div class='add'>+	compatible = "ti,twl6030";</div><div class='add'>+	interrupt-controller;</div><div class='add'>+	#interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+	rtc {</div><div class='add'>+		compatible = "ti,twl4030-rtc";</div><div class='add'>+		interrupts = &lt;11&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vaux1: regulator@0 {</div><div class='add'>+		compatible = "ti,twl6030-vaux1";</div><div class='add'>+		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vaux2: regulator@1 {</div><div class='add'>+		compatible = "ti,twl6030-vaux2";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vaux3: regulator@2 {</div><div class='add'>+		compatible = "ti,twl6030-vaux3";</div><div class='add'>+		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vmmc: regulator@3 {</div><div class='add'>+		compatible = "ti,twl6030-vmmc";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vpp: regulator@4 {</div><div class='add'>+		compatible = "ti,twl6030-vpp";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vusim: regulator@5 {</div><div class='add'>+		compatible = "ti,twl6030-vusim";</div><div class='add'>+		regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;2900000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vdac: regulator@6 {</div><div class='add'>+		compatible = "ti,twl6030-vdac";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vana: regulator@7 {</div><div class='add'>+		compatible = "ti,twl6030-vana";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vcxio: regulator@8 {</div><div class='add'>+		compatible = "ti,twl6030-vcxio";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	vusb: regulator@9 {</div><div class='add'>+		compatible = "ti,twl6030-vusb";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	v1v8: regulator@10 {</div><div class='add'>+		compatible = "ti,twl6030-v1v8";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	v2v1: regulator@11 {</div><div class='add'>+		compatible = "ti,twl6030-v2v1";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clk32kg: regulator@12 {</div><div class='add'>+		compatible = "ti,twl6030-clk32kg";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/usb_a9260.dts b/arch/arm/boot/dts/usb_a9260.dts<br/>new file mode 100644<br/>index 000000000000..296216058c11<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/usb_a9260.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/usb_a9260.dts</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+/*</div><div class='add'>+ * usb_a9260.dts - Device Tree file for Caloa USB A9260 board</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 or later.</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "at91sam9260.dtsi"</div><div class='add'>+/include/ "usb_a9260_common.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Calao USB A9260";</div><div class='add'>+	compatible = "calao,usb-a9260", "atmel,at91sam9260", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x4000000&gt;;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/usb_a9260_common.dtsi b/arch/arm/boot/dts/usb_a9260_common.dtsi<br/>new file mode 100644<br/>index 000000000000..e70d229baef5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/usb_a9260_common.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/usb_a9260_common.dtsi</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+/*</div><div class='add'>+ * usb_a926x.dts - Device Tree file for Caloa USB A926x board</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	clocks {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		main_clock: clock@0 {</div><div class='add'>+			compatible = "atmel,osc", "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;12000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			dbgu: serial@fffff200 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			macb0: ethernet@fffc4000 {</div><div class='add'>+				phy-mode = "rmii";</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb1: gadget@fffa4000 {</div><div class='add'>+				atmel,vbus-gpio = &lt;&amp;pioC 5 0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			nand-bus-width = &lt;8&gt;;</div><div class='add'>+			nand-ecc-mode = "soft";</div><div class='add'>+			nand-on-flash-bbt;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			at91bootstrap@0 {</div><div class='add'>+				label = "at91bootstrap";</div><div class='add'>+				reg = &lt;0x0 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			barebox@20000 {</div><div class='add'>+				label = "barebox";</div><div class='add'>+				reg = &lt;0x20000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bareboxenv@60000 {</div><div class='add'>+				label = "bareboxenv";</div><div class='add'>+				reg = &lt;0x60000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bareboxenv2@80000 {</div><div class='add'>+				label = "bareboxenv2";</div><div class='add'>+				reg = &lt;0x80000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			oftree@80000 {</div><div class='add'>+				label = "oftree";</div><div class='add'>+				reg = &lt;0xa0000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kernel@a0000 {</div><div class='add'>+				label = "kernel";</div><div class='add'>+				reg = &lt;0xc0000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rootfs@4a0000 {</div><div class='add'>+				label = "rootfs";</div><div class='add'>+				reg = &lt;0x4c0000 0x7800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			data@7ca0000 {</div><div class='add'>+				label = "data";</div><div class='add'>+				reg = &lt;0x7cc0000 0x8340000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: ohci@00500000 {</div><div class='add'>+			num-ports = &lt;2&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		user_led {</div><div class='add'>+			label = "user_led";</div><div class='add'>+			gpios = &lt;&amp;pioB 21 1&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		user_pb {</div><div class='add'>+			label = "user_pb";</div><div class='add'>+			gpios = &lt;&amp;pioB 10 1&gt;;</div><div class='add'>+			linux,code = &lt;28&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/usb_a9263.dts b/arch/arm/boot/dts/usb_a9263.dts<br/>new file mode 100644<br/>index 000000000000..6fe05ccb6203<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/usb_a9263.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/usb_a9263.dts</a></div><div class='hunk'>@@ -0,0 +1,131 @@</div><div class='add'>+/*</div><div class='add'>+ * usb_a9263.dts - Device Tree file for Caloa USB A9293 board</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 only</div><div class='add'>+ */</div><div class='add'>+/dts-v1/;</div><div class='add'>+/include/ "at91sam9263.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	model = "Calao USB A9263";</div><div class='add'>+	compatible = "atmel,usb-a9263", "atmel,at91sam9263", "atmel,at91sam9";</div><div class='add'>+</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory {</div><div class='add'>+		reg = &lt;0x20000000 0x4000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	clocks {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		ranges;</div><div class='add'>+</div><div class='add'>+		main_clock: clock@0 {</div><div class='add'>+			compatible = "atmel,osc", "fixed-clock";</div><div class='add'>+			clock-frequency = &lt;12000000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ahb {</div><div class='add'>+		apb {</div><div class='add'>+			dbgu: serial@ffffee00 {</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			macb0: ethernet@fffbc000 {</div><div class='add'>+				phy-mode = "rmii";</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			usb1: gadget@fff78000 {</div><div class='add'>+				atmel,vbus-gpio = &lt;&amp;pioB 11 0&gt;;</div><div class='add'>+				status = "okay";</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		nand0: nand@40000000 {</div><div class='add'>+			nand-bus-width = &lt;8&gt;;</div><div class='add'>+			nand-ecc-mode = "soft";</div><div class='add'>+			nand-on-flash-bbt;</div><div class='add'>+			status = "okay";</div><div class='add'>+</div><div class='add'>+			at91bootstrap@0 {</div><div class='add'>+				label = "at91bootstrap";</div><div class='add'>+				reg = &lt;0x0 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			barebox@20000 {</div><div class='add'>+				label = "barebox";</div><div class='add'>+				reg = &lt;0x20000 0x40000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bareboxenv@60000 {</div><div class='add'>+				label = "bareboxenv";</div><div class='add'>+				reg = &lt;0x60000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			bareboxenv2@80000 {</div><div class='add'>+				label = "bareboxenv2";</div><div class='add'>+				reg = &lt;0x80000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			oftree@80000 {</div><div class='add'>+				label = "oftree";</div><div class='add'>+				reg = &lt;0xa0000 0x20000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			kernel@a0000 {</div><div class='add'>+				label = "kernel";</div><div class='add'>+				reg = &lt;0xc0000 0x400000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			rootfs@4a0000 {</div><div class='add'>+				label = "rootfs";</div><div class='add'>+				reg = &lt;0x4c0000 0x7800000&gt;;</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			data@7ca0000 {</div><div class='add'>+				label = "data";</div><div class='add'>+				reg = &lt;0x7cc0000 0x8340000&gt;;</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		usb0: ohci@00a00000 {</div><div class='add'>+			num-ports = &lt;2&gt;;</div><div class='add'>+			status = "okay";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	leds {</div><div class='add'>+		compatible = "gpio-leds";</div><div class='add'>+</div><div class='add'>+		user_led {</div><div class='add'>+			label = "user_led";</div><div class='add'>+			gpios = &lt;&amp;pioB 21 0&gt;;</div><div class='add'>+			linux,default-trigger = "heartbeat";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	gpio_keys {</div><div class='add'>+		compatible = "gpio-keys";</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+		user_pb {</div><div class='add'>+			label = "user_pb";</div><div class='add'>+			gpios = &lt;&amp;pioB 10 1&gt;;</div><div class='add'>+			linux,code = &lt;28&gt;;</div><div class='add'>+			gpio-key,wakeup;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	i2c@0 {</div><div class='add'>+		status = "okay";</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts<br/>index 7c2399c532e5..2dacb16ce4ae 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/usb_a9g20.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/usb_a9g20.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/usb_a9g20.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/usb_a9g20.dts</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'>  */</div><div class='ctx'> /dts-v1/;</div><div class='ctx'> /include/ "at91sam9g20.dtsi"</div><div class='add'>+/include/ "usb_a9260_common.dtsi"</div><div class='ctx'> </div><div class='ctx'> / {</div><div class='ctx'> 	model = "Calao USB A9G20";</div><div class='hunk'>@@ -20,108 +21,7 @@</div><div class='ctx'> 		reg = &lt;0x20000000 0x4000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	clocks {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		main_clock: clock@0 {</div><div class='del'>-			compatible = "atmel,osc", "fixed-clock";</div><div class='del'>-			clock-frequency = &lt;12000000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ahb {</div><div class='del'>-		apb {</div><div class='del'>-			dbgu: serial@fffff200 {</div><div class='del'>-				status = "okay";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			macb0: ethernet@fffc4000 {</div><div class='del'>-				phy-mode = "rmii";</div><div class='del'>-				status = "okay";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb1: gadget@fffa4000 {</div><div class='del'>-				atmel,vbus-gpio = &lt;&amp;pioC 5 0&gt;;</div><div class='del'>-				status = "okay";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		nand0: nand@40000000 {</div><div class='del'>-			nand-bus-width = &lt;8&gt;;</div><div class='del'>-			nand-ecc-mode = "soft";</div><div class='del'>-			nand-on-flash-bbt;</div><div class='del'>-			status = "okay";</div><div class='del'>-</div><div class='del'>-			at91bootstrap@0 {</div><div class='del'>-				label = "at91bootstrap";</div><div class='del'>-				reg = &lt;0x0 0x20000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			barebox@20000 {</div><div class='del'>-				label = "barebox";</div><div class='del'>-				reg = &lt;0x20000 0x40000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			bareboxenv@60000 {</div><div class='del'>-				label = "bareboxenv";</div><div class='del'>-				reg = &lt;0x60000 0x20000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			bareboxenv2@80000 {</div><div class='del'>-				label = "bareboxenv2";</div><div class='del'>-				reg = &lt;0x80000 0x20000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			kernel@a0000 {</div><div class='del'>-				label = "kernel";</div><div class='del'>-				reg = &lt;0xa0000 0x400000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			rootfs@4a0000 {</div><div class='del'>-				label = "rootfs";</div><div class='del'>-				reg = &lt;0x4a0000 0x7800000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			data@7ca0000 {</div><div class='del'>-				label = "data";</div><div class='del'>-				reg = &lt;0x7ca0000 0x8360000&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb0: ohci@00500000 {</div><div class='del'>-			num-ports = &lt;2&gt;;</div><div class='del'>-			status = "okay";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	leds {</div><div class='del'>-		compatible = "gpio-leds";</div><div class='del'>-</div><div class='del'>-		user_led {</div><div class='del'>-			label = "user_led";</div><div class='del'>-			gpios = &lt;&amp;pioB 21 1&gt;;</div><div class='del'>-			linux,default-trigger = "heartbeat";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpio_keys {</div><div class='del'>-		compatible = "gpio-keys";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		user_pb {</div><div class='del'>-			label = "user_pb";</div><div class='del'>-			gpios = &lt;&amp;pioB 10 1&gt;;</div><div class='del'>-			linux,code = &lt;28&gt;;</div><div class='del'>-			gpio-key,wakeup;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	i2c@0 {</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='ctx'> 		rv3029c2@56 {</div><div class='ctx'> 			compatible = "rv3029c2";</div><div class='ctx'> 			reg = &lt;0x56&gt;;</div><div class='head'>diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts<br/>index 0b32925f2147..e2fe3195c0d1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/versatile-ab.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/versatile-ab.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/versatile-ab.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/versatile-ab.dts</a></div><div class='hunk'>@@ -173,7 +173,7 @@</div><div class='ctx'> 			mmc@5000 {</div><div class='ctx'> 				compatible = "arm,primecell";</div><div class='ctx'> 				reg = &lt; 0x5000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;22&gt;;</div><div class='add'>+				interrupts = &lt;22 34&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 			kmi@6000 {</div><div class='ctx'> 				compatible = "arm,pl050", "arm,primecell";</div><div class='head'>diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts<br/>index 166461073b78..7e8175269064 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/versatile-pb.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/versatile-pb.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/versatile-pb.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/versatile-pb.dts</a></div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'> 			mmc@b000 {</div><div class='ctx'> 				compatible = "arm,primecell";</div><div class='ctx'> 				reg = &lt;0xb000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;23&gt;;</div><div class='add'>+				interrupts = &lt;23 34&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts<br/>index 941b161ab78c..7e1091d91af8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts</a></div><div class='hunk'>@@ -73,7 +73,10 @@</div><div class='ctx'> 		#address-cells = &lt;0&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		reg = &lt;0x2c001000 0x1000&gt;,</div><div class='del'>-		      &lt;0x2c002000 0x100&gt;;</div><div class='add'>+		      &lt;0x2c002000 0x1000&gt;,</div><div class='add'>+		      &lt;0x2c004000 0x2000&gt;,</div><div class='add'>+		      &lt;0x2c006000 0x2000&gt;;</div><div class='add'>+		interrupts = &lt;1 9 0xf04&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memory-controller@7ffd0000 {</div><div class='hunk'>@@ -93,6 +96,14 @@</div><div class='ctx'> 			     &lt;0 91 4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	timer {</div><div class='add'>+		compatible = "arm,armv7-timer";</div><div class='add'>+		interrupts = &lt;1 13 0xf08&gt;,</div><div class='add'>+			     &lt;1 14 0xf08&gt;,</div><div class='add'>+			     &lt;1 11 0xf08&gt;,</div><div class='add'>+			     &lt;1 10 0xf08&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	pmu {</div><div class='ctx'> 		compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";</div><div class='ctx'> 		interrupts = &lt;0 68 4&gt;,</div><div class='head'>diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts<br/>index 6905e66d4748..18917a0f8604 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/vexpress-v2p-ca5s.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/vexpress-v2p-ca5s.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/vexpress-v2p-ca5s.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/vexpress-v2p-ca5s.dts</a></div><div class='hunk'>@@ -77,13 +77,18 @@</div><div class='ctx'> </div><div class='ctx'> 	timer@2c000600 {</div><div class='ctx'> 		compatible = "arm,cortex-a5-twd-timer";</div><div class='del'>-		reg = &lt;0x2c000600 0x38&gt;;</div><div class='del'>-		interrupts = &lt;1 2 0x304&gt;,</div><div class='del'>-			     &lt;1 3 0x304&gt;;</div><div class='add'>+		reg = &lt;0x2c000600 0x20&gt;;</div><div class='add'>+		interrupts = &lt;1 13 0x304&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog@2c000620 {</div><div class='add'>+		compatible = "arm,cortex-a5-twd-wdt";</div><div class='add'>+		reg = &lt;0x2c000620 0x20&gt;;</div><div class='add'>+		interrupts = &lt;1 14 0x304&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gic: interrupt-controller@2c001000 {</div><div class='del'>-		compatible = "arm,corex-a5-gic", "arm,cortex-a9-gic";</div><div class='add'>+		compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic";</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 		#address-cells = &lt;0&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='head'>diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts<br/>index da778693be54..3f0c736d31d6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/boot/dts/vexpress-v2p-ca9.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/boot/dts/vexpress-v2p-ca9.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/boot/dts/vexpress-v2p-ca9.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/boot/dts/vexpress-v2p-ca9.dts</a></div><div class='hunk'>@@ -105,8 +105,13 @@</div><div class='ctx'> 	timer@1e000600 {</div><div class='ctx'> 		compatible = "arm,cortex-a9-twd-timer";</div><div class='ctx'> 		reg = &lt;0x1e000600 0x20&gt;;</div><div class='del'>-		interrupts = &lt;1 2 0xf04&gt;,</div><div class='del'>-			     &lt;1 3 0xf04&gt;;</div><div class='add'>+		interrupts = &lt;1 13 0xf04&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	watchdog@1e000620 {</div><div class='add'>+		compatible = "arm,cortex-a9-twd-wdt";</div><div class='add'>+		reg = &lt;0x1e000620 0x20&gt;;</div><div class='add'>+		interrupts = &lt;1 14 0xf04&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gic: interrupt-controller@1e001000 {</div><div class='head'>diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile<br/>index 215816f1775f..e8a4e58f1b82 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/common/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/common/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/common/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/common/Makefile</a></div><div class='hunk'>@@ -11,7 +11,5 @@ obj-$(CONFIG_DMABOUNCE)		+= dmabounce.o</div><div class='ctx'> obj-$(CONFIG_SHARP_LOCOMO)	+= locomo.o</div><div class='ctx'> obj-$(CONFIG_SHARP_PARAM)	+= sharpsl_param.o</div><div class='ctx'> obj-$(CONFIG_SHARP_SCOOP)	+= scoop.o</div><div class='del'>-obj-$(CONFIG_ARCH_IXP2000)	+= uengine.o</div><div class='del'>-obj-$(CONFIG_ARCH_IXP23XX)	+= uengine.o</div><div class='ctx'> obj-$(CONFIG_PCI_HOST_ITE8152)  += it8152.o</div><div class='ctx'> obj-$(CONFIG_ARM_TIMER_SP804)	+= timer-sp.o</div><div class='head'>diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c<br/>index 595ecd290ebf..9d7eb530f95f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/common/dmabounce.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/common/dmabounce.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/common/dmabounce.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/common/dmabounce.c</a></div><div class='hunk'>@@ -173,7 +173,8 @@ find_safe_buffer(struct dmabounce_device_info *device_info, dma_addr_t safe_dma_</div><div class='ctx'> 	read_lock_irqsave(&amp;device_info-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(b, &amp;device_info-&gt;safe_buffers, node)</div><div class='del'>-		if (b-&gt;safe_dma_addr == safe_dma_addr) {</div><div class='add'>+		if (b-&gt;safe_dma_addr &lt;= safe_dma_addr &amp;&amp;</div><div class='add'>+		    b-&gt;safe_dma_addr + b-&gt;size &gt; safe_dma_addr) {</div><div class='ctx'> 			rb = b;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -254,7 +255,7 @@ static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size,</div><div class='ctx'> 	if (buf == NULL) {</div><div class='ctx'> 		dev_err(dev, "%s: unable to map unsafe buffer %p!\n",</div><div class='ctx'> 		       __func__, ptr);</div><div class='del'>-		return ~0;</div><div class='add'>+		return DMA_ERROR_CODE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",</div><div class='hunk'>@@ -307,8 +308,9 @@ static inline void unmap_single(struct device *dev, struct safe_buffer *buf,</div><div class='ctx'>  * substitute the safe buffer for the unsafe one.</div><div class='ctx'>  * (basically move the buffer from an unsafe area to a safe one)</div><div class='ctx'>  */</div><div class='del'>-dma_addr_t __dma_map_page(struct device *dev, struct page *page,</div><div class='del'>-		unsigned long offset, size_t size, enum dma_data_direction dir)</div><div class='add'>+static dma_addr_t dmabounce_map_page(struct device *dev, struct page *page,</div><div class='add'>+		unsigned long offset, size_t size, enum dma_data_direction dir,</div><div class='add'>+		struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	dma_addr_t dma_addr;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -320,21 +322,20 @@ dma_addr_t __dma_map_page(struct device *dev, struct page *page,</div><div class='ctx'> </div><div class='ctx'> 	ret = needs_bounce(dev, dma_addr, size);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		return ~0;</div><div class='add'>+		return DMA_ERROR_CODE;</div><div class='ctx'> </div><div class='ctx'> 	if (ret == 0) {</div><div class='del'>-		__dma_page_cpu_to_dev(page, offset, size, dir);</div><div class='add'>+		arm_dma_ops.sync_single_for_device(dev, dma_addr, size, dir);</div><div class='ctx'> 		return dma_addr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (PageHighMem(page)) {</div><div class='ctx'> 		dev_err(dev, "DMA buffer bouncing of HIGHMEM pages is not supported\n");</div><div class='del'>-		return ~0;</div><div class='add'>+		return DMA_ERROR_CODE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return map_single(dev, page_address(page) + offset, size, dir);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(__dma_map_page);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * see if a mapped address was really a "safe" buffer and if so, copy</div><div class='hunk'>@@ -342,8 +343,8 @@ EXPORT_SYMBOL(__dma_map_page);</div><div class='ctx'>  * the safe buffer.  (basically return things back to the way they</div><div class='ctx'>  * should be)</div><div class='ctx'>  */</div><div class='del'>-void __dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,</div><div class='del'>-		enum dma_data_direction dir)</div><div class='add'>+static void dmabounce_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,</div><div class='add'>+		enum dma_data_direction dir, struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	struct safe_buffer *buf;</div><div class='ctx'> </div><div class='hunk'>@@ -352,19 +353,18 @@ void __dma_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,</div><div class='ctx'> </div><div class='ctx'> 	buf = find_safe_buffer_dev(dev, dma_addr, __func__);</div><div class='ctx'> 	if (!buf) {</div><div class='del'>-		__dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, dma_addr)),</div><div class='del'>-			dma_addr &amp; ~PAGE_MASK, size, dir);</div><div class='add'>+		arm_dma_ops.sync_single_for_cpu(dev, dma_addr, size, dir);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	unmap_single(dev, buf, size, dir);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(__dma_unmap_page);</div><div class='ctx'> </div><div class='del'>-int dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,</div><div class='del'>-		unsigned long off, size_t sz, enum dma_data_direction dir)</div><div class='add'>+static int __dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,</div><div class='add'>+		size_t sz, enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	struct safe_buffer *buf;</div><div class='add'>+	unsigned long off;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "%s(dma=%#x,off=%#lx,sz=%zx,dir=%x)\n",</div><div class='ctx'> 		__func__, addr, off, sz, dir);</div><div class='hunk'>@@ -373,6 +373,8 @@ int dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,</div><div class='ctx'> 	if (!buf)</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='add'>+	off = addr - buf-&gt;safe_dma_addr;</div><div class='add'>+</div><div class='ctx'> 	BUG_ON(buf-&gt;direction != dir);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",</div><div class='hunk'>@@ -388,12 +390,21 @@ int dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(dmabounce_sync_for_cpu);</div><div class='ctx'> </div><div class='del'>-int dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,</div><div class='del'>-		unsigned long off, size_t sz, enum dma_data_direction dir)</div><div class='add'>+static void dmabounce_sync_for_cpu(struct device *dev,</div><div class='add'>+		dma_addr_t handle, size_t size, enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	if (!__dmabounce_sync_for_cpu(dev, handle, size, dir))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	arm_dma_ops.sync_single_for_cpu(dev, handle, size, dir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,</div><div class='add'>+		size_t sz, enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	struct safe_buffer *buf;</div><div class='add'>+	unsigned long off;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "%s(dma=%#x,off=%#lx,sz=%zx,dir=%x)\n",</div><div class='ctx'> 		__func__, addr, off, sz, dir);</div><div class='hunk'>@@ -402,6 +413,8 @@ int dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,</div><div class='ctx'> 	if (!buf)</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='add'>+	off = addr - buf-&gt;safe_dma_addr;</div><div class='add'>+</div><div class='ctx'> 	BUG_ON(buf-&gt;direction != dir);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",</div><div class='hunk'>@@ -417,7 +430,38 @@ int dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(dmabounce_sync_for_device);</div><div class='add'>+</div><div class='add'>+static void dmabounce_sync_for_device(struct device *dev,</div><div class='add'>+		dma_addr_t handle, size_t size, enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	if (!__dmabounce_sync_for_device(dev, handle, size, dir))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	arm_dma_ops.sync_single_for_device(dev, handle, size, dir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dmabounce_set_mask(struct device *dev, u64 dma_mask)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;archdata.dmabounce)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return arm_dma_ops.set_dma_mask(dev, dma_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct dma_map_ops dmabounce_ops = {</div><div class='add'>+	.alloc			= arm_dma_alloc,</div><div class='add'>+	.free			= arm_dma_free,</div><div class='add'>+	.mmap			= arm_dma_mmap,</div><div class='add'>+	.map_page		= dmabounce_map_page,</div><div class='add'>+	.unmap_page		= dmabounce_unmap_page,</div><div class='add'>+	.sync_single_for_cpu	= dmabounce_sync_for_cpu,</div><div class='add'>+	.sync_single_for_device	= dmabounce_sync_for_device,</div><div class='add'>+	.map_sg			= arm_dma_map_sg,</div><div class='add'>+	.unmap_sg		= arm_dma_unmap_sg,</div><div class='add'>+	.sync_sg_for_cpu	= arm_dma_sync_sg_for_cpu,</div><div class='add'>+	.sync_sg_for_device	= arm_dma_sync_sg_for_device,</div><div class='add'>+	.set_dma_mask		= dmabounce_set_mask,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static int dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev,</div><div class='ctx'> 		const char *name, unsigned long size)</div><div class='hunk'>@@ -479,6 +523,7 @@ int dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;archdata.dmabounce = device_info;</div><div class='add'>+	set_dma_ops(dev, &amp;dmabounce_ops);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(dev, "dmabounce: registered device\n");</div><div class='ctx'> </div><div class='hunk'>@@ -497,6 +542,7 @@ void dmabounce_unregister_dev(struct device *dev)</div><div class='ctx'> 	struct dmabounce_device_info *device_info = dev-&gt;archdata.dmabounce;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;archdata.dmabounce = NULL;</div><div class='add'>+	set_dma_ops(dev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (!device_info) {</div><div class='ctx'> 		dev_warn(dev,</div><div class='head'>diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c<br/>index dcb13494ca0d..c4110d1b1f2d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/common/it8152.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/common/it8152.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/common/it8152.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/common/it8152.c</a></div><div class='hunk'>@@ -222,7 +222,7 @@ static int it8152_pci_write_config(struct pci_bus *bus,</div><div class='ctx'> 	return PCIBIOS_SUCCESSFUL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct pci_ops it8152_ops = {</div><div class='add'>+struct pci_ops it8152_ops = {</div><div class='ctx'> 	.read = it8152_pci_read_config,</div><div class='ctx'> 	.write = it8152_pci_write_config,</div><div class='ctx'> };</div><div class='hunk'>@@ -346,9 +346,4 @@ void pcibios_set_master(struct pci_dev *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-struct pci_bus * __init it8152_pci_scan_bus(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	return pci_scan_root_bus(NULL, nr, &amp;it8152_ops, sys, &amp;sys-&gt;resources);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> EXPORT_SYMBOL(dma_set_coherent_mask);</div><div class='head'>diff --git a/arch/arm/common/uengine.c b/arch/arm/common/uengine.c<br/>deleted file mode 100644<br/>index bef408f3d76c..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/common/uengine.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/common/uengine.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,507 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Generic library functions for the microengines found on the Intel</div><div class='del'>- * IXP2000 series of network processors.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU Lesser General Public License as</div><div class='del'>- * published by the Free Software Foundation; either version 2.1 of the</div><div class='del'>- * License, or (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/hardware/uengine.h&gt;</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ARCH_IXP2000)</div><div class='del'>-#define IXP_UENGINE_CSR_VIRT_BASE	IXP2000_UENGINE_CSR_VIRT_BASE</div><div class='del'>-#define IXP_PRODUCT_ID			IXP2000_PRODUCT_ID</div><div class='del'>-#define IXP_MISC_CONTROL		IXP2000_MISC_CONTROL</div><div class='del'>-#define IXP_RESET1			IXP2000_RESET1</div><div class='del'>-#else</div><div class='del'>-#if defined(CONFIG_ARCH_IXP23XX)</div><div class='del'>-#define IXP_UENGINE_CSR_VIRT_BASE	IXP23XX_UENGINE_CSR_VIRT_BASE</div><div class='del'>-#define IXP_PRODUCT_ID			IXP23XX_PRODUCT_ID</div><div class='del'>-#define IXP_MISC_CONTROL		IXP23XX_MISC_CONTROL</div><div class='del'>-#define IXP_RESET1			IXP23XX_RESET1</div><div class='del'>-#else</div><div class='del'>-#error unknown platform</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define USTORE_ADDRESS			0x000</div><div class='del'>-#define USTORE_DATA_LOWER		0x004</div><div class='del'>-#define USTORE_DATA_UPPER		0x008</div><div class='del'>-#define CTX_ENABLES			0x018</div><div class='del'>-#define CC_ENABLE			0x01c</div><div class='del'>-#define CSR_CTX_POINTER			0x020</div><div class='del'>-#define INDIRECT_CTX_STS		0x040</div><div class='del'>-#define ACTIVE_CTX_STS			0x044</div><div class='del'>-#define INDIRECT_CTX_SIG_EVENTS		0x048</div><div class='del'>-#define INDIRECT_CTX_WAKEUP_EVENTS	0x050</div><div class='del'>-#define NN_PUT				0x080</div><div class='del'>-#define NN_GET				0x084</div><div class='del'>-#define TIMESTAMP_LOW			0x0c0</div><div class='del'>-#define TIMESTAMP_HIGH			0x0c4</div><div class='del'>-#define T_INDEX_BYTE_INDEX		0x0f4</div><div class='del'>-#define LOCAL_CSR_STATUS		0x180</div><div class='del'>-</div><div class='del'>-u32 ixp2000_uengine_mask;</div><div class='del'>-</div><div class='del'>-static void *ixp2000_uengine_csr_area(int uengine)</div><div class='del'>-{</div><div class='del'>-	return ((void *)IXP_UENGINE_CSR_VIRT_BASE) + (uengine &lt;&lt; 10);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * LOCAL_CSR_STATUS=1 after a read or write to a microengine's CSR</div><div class='del'>- * space means that the microengine we tried to access was also trying</div><div class='del'>- * to access its own CSR space on the same clock cycle as we did.  When</div><div class='del'>- * this happens, we lose the arbitration process by default, and the</div><div class='del'>- * read or write we tried to do was not actually performed, so we try</div><div class='del'>- * again until it succeeds.</div><div class='del'>- */</div><div class='del'>-u32 ixp2000_uengine_csr_read(int uengine, int offset)</div><div class='del'>-{</div><div class='del'>-	void *uebase;</div><div class='del'>-	u32 *local_csr_status;</div><div class='del'>-	u32 *reg;</div><div class='del'>-	u32 value;</div><div class='del'>-</div><div class='del'>-	uebase = ixp2000_uengine_csr_area(uengine);</div><div class='del'>-</div><div class='del'>-	local_csr_status = (u32 *)(uebase + LOCAL_CSR_STATUS);</div><div class='del'>-	reg = (u32 *)(uebase + offset);</div><div class='del'>-	do {</div><div class='del'>-		value = ixp2000_reg_read(reg);</div><div class='del'>-	} while (ixp2000_reg_read(local_csr_status) &amp; 1);</div><div class='del'>-</div><div class='del'>-	return value;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ixp2000_uengine_csr_read);</div><div class='del'>-</div><div class='del'>-void ixp2000_uengine_csr_write(int uengine, int offset, u32 value)</div><div class='del'>-{</div><div class='del'>-	void *uebase;</div><div class='del'>-	u32 *local_csr_status;</div><div class='del'>-	u32 *reg;</div><div class='del'>-</div><div class='del'>-	uebase = ixp2000_uengine_csr_area(uengine);</div><div class='del'>-</div><div class='del'>-	local_csr_status = (u32 *)(uebase + LOCAL_CSR_STATUS);</div><div class='del'>-	reg = (u32 *)(uebase + offset);</div><div class='del'>-	do {</div><div class='del'>-		ixp2000_reg_write(reg, value);</div><div class='del'>-	} while (ixp2000_reg_read(local_csr_status) &amp; 1);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ixp2000_uengine_csr_write);</div><div class='del'>-</div><div class='del'>-void ixp2000_uengine_reset(u32 uengine_mask)</div><div class='del'>-{</div><div class='del'>-	u32 value;</div><div class='del'>-</div><div class='del'>-	value = ixp2000_reg_read(IXP_RESET1) &amp; ~ixp2000_uengine_mask;</div><div class='del'>-</div><div class='del'>-	uengine_mask &amp;= ixp2000_uengine_mask;</div><div class='del'>-	ixp2000_reg_wrb(IXP_RESET1, value | uengine_mask);</div><div class='del'>-	ixp2000_reg_wrb(IXP_RESET1, value);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ixp2000_uengine_reset);</div><div class='del'>-</div><div class='del'>-void ixp2000_uengine_set_mode(int uengine, u32 mode)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * CTL_STR_PAR_EN: unconditionally enable parity checking on</div><div class='del'>-	 * control store.</div><div class='del'>-	 */</div><div class='del'>-	mode |= 0x10000000;</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, CTX_ENABLES, mode);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Enable updating of condition codes.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, CC_ENABLE, 0x00002000);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialise other per-microengine registers.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, NN_PUT, 0x00);</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, NN_GET, 0x00);</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, T_INDEX_BYTE_INDEX, 0);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ixp2000_uengine_set_mode);</div><div class='del'>-</div><div class='del'>-static int make_even_parity(u32 x)</div><div class='del'>-{</div><div class='del'>-	return hweight32(x) &amp; 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ustore_write(int uengine, u64 insn)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Generate even parity for top and bottom 20 bits.</div><div class='del'>-	 */</div><div class='del'>-	insn |= (u64)make_even_parity((insn &gt;&gt; 20) &amp; 0x000fffff) &lt;&lt; 41;</div><div class='del'>-	insn |= (u64)make_even_parity(insn &amp; 0x000fffff) &lt;&lt; 40;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Write to microstore.  The second write auto-increments</div><div class='del'>-	 * the USTORE_ADDRESS index register.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, USTORE_DATA_LOWER, (u32)insn);</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, USTORE_DATA_UPPER, (u32)(insn &gt;&gt; 32));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ixp2000_uengine_load_microcode(int uengine, u8 *ucode, int insns)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Start writing to microstore at address 0.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, USTORE_ADDRESS, 0x80000000);</div><div class='del'>-	for (i = 0; i &lt; insns; i++) {</div><div class='del'>-		u64 insn;</div><div class='del'>-</div><div class='del'>-		insn = (((u64)ucode[0]) &lt;&lt; 32) |</div><div class='del'>-			(((u64)ucode[1]) &lt;&lt; 24) |</div><div class='del'>-			(((u64)ucode[2]) &lt;&lt; 16) |</div><div class='del'>-			(((u64)ucode[3]) &lt;&lt; 8) |</div><div class='del'>-			((u64)ucode[4]);</div><div class='del'>-		ucode += 5;</div><div class='del'>-</div><div class='del'>-		ustore_write(uengine, insn);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>- 	 * Pad with a few NOPs at the end (to avoid the microengine</div><div class='del'>-	 * aborting as it prefetches beyond the last instruction), unless</div><div class='del'>-	 * we run off the end of the instruction store first, at which</div><div class='del'>-	 * point the address register will wrap back to zero.</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; 4; i++) {</div><div class='del'>-		u32 addr;</div><div class='del'>-</div><div class='del'>-		addr = ixp2000_uengine_csr_read(uengine, USTORE_ADDRESS);</div><div class='del'>-		if (addr == 0x80000000)</div><div class='del'>-			break;</div><div class='del'>-		ustore_write(uengine, 0xf0000c0300ULL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * End programming.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, USTORE_ADDRESS, 0x00000000);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ixp2000_uengine_load_microcode);</div><div class='del'>-</div><div class='del'>-void ixp2000_uengine_init_context(int uengine, int context, int pc)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Select the right context for indirect access.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, CSR_CTX_POINTER, context);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialise signal masks to immediately go to Ready state.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, INDIRECT_CTX_SIG_EVENTS, 1);</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, INDIRECT_CTX_WAKEUP_EVENTS, 1);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set program counter.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, INDIRECT_CTX_STS, pc);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ixp2000_uengine_init_context);</div><div class='del'>-</div><div class='del'>-void ixp2000_uengine_start_contexts(int uengine, u8 ctx_mask)</div><div class='del'>-{</div><div class='del'>-	u32 mask;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Enable the specified context to go to Executing state.</div><div class='del'>-	 */</div><div class='del'>-	mask = ixp2000_uengine_csr_read(uengine, CTX_ENABLES);</div><div class='del'>-	mask |= ctx_mask &lt;&lt; 8;</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, CTX_ENABLES, mask);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ixp2000_uengine_start_contexts);</div><div class='del'>-</div><div class='del'>-void ixp2000_uengine_stop_contexts(int uengine, u8 ctx_mask)</div><div class='del'>-{</div><div class='del'>-	u32 mask;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Disable the Ready-&gt;Executing transition.  Note that this</div><div class='del'>-	 * does not stop the context until it voluntarily yields.</div><div class='del'>-	 */</div><div class='del'>-	mask = ixp2000_uengine_csr_read(uengine, CTX_ENABLES);</div><div class='del'>-	mask &amp;= ~(ctx_mask &lt;&lt; 8);</div><div class='del'>-	ixp2000_uengine_csr_write(uengine, CTX_ENABLES, mask);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ixp2000_uengine_stop_contexts);</div><div class='del'>-</div><div class='del'>-static int check_ixp_type(struct ixp2000_uengine_code *c)</div><div class='del'>-{</div><div class='del'>-	u32 product_id;</div><div class='del'>-	u32 rev;</div><div class='del'>-</div><div class='del'>-	product_id = ixp2000_reg_read(IXP_PRODUCT_ID);</div><div class='del'>-	if (((product_id &gt;&gt; 16) &amp; 0x1f) != 0)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	switch ((product_id &gt;&gt; 8) &amp; 0xff) {</div><div class='del'>-#ifdef CONFIG_ARCH_IXP2000</div><div class='del'>-	case 0:		/* IXP2800 */</div><div class='del'>-		if (!(c-&gt;cpu_model_bitmask &amp; 4))</div><div class='del'>-			return 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case 1:		/* IXP2850 */</div><div class='del'>-		if (!(c-&gt;cpu_model_bitmask &amp; 8))</div><div class='del'>-			return 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case 2:		/* IXP2400 */</div><div class='del'>-		if (!(c-&gt;cpu_model_bitmask &amp; 2))</div><div class='del'>-			return 0;</div><div class='del'>-		break;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARCH_IXP23XX</div><div class='del'>-	case 4:		/* IXP23xx */</div><div class='del'>-		if (!(c-&gt;cpu_model_bitmask &amp; 0x3f0))</div><div class='del'>-			return 0;</div><div class='del'>-		break;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rev = product_id &amp; 0xff;</div><div class='del'>-	if (rev &lt; c-&gt;cpu_min_revision || rev &gt; c-&gt;cpu_max_revision)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void generate_ucode(u8 *ucode, u32 *gpr_a, u32 *gpr_b)</div><div class='del'>-{</div><div class='del'>-	int offset;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	offset = 0;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 128; i++) {</div><div class='del'>-		u8 b3;</div><div class='del'>-		u8 b2;</div><div class='del'>-		u8 b1;</div><div class='del'>-		u8 b0;</div><div class='del'>-</div><div class='del'>-		b3 = (gpr_a[i] &gt;&gt; 24) &amp; 0xff;</div><div class='del'>-		b2 = (gpr_a[i] &gt;&gt; 16) &amp; 0xff;</div><div class='del'>-		b1 = (gpr_a[i] &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-		b0 = gpr_a[i] &amp; 0xff;</div><div class='del'>-</div><div class='del'>-		/* immed[@ai, (b1 &lt;&lt; 8) | b0] */</div><div class='del'>-		/* 11110000 0000VVVV VVVV11VV VVVVVV00 1IIIIIII */</div><div class='del'>-		ucode[offset++] = 0xf0;</div><div class='del'>-		ucode[offset++] = (b1 &gt;&gt; 4);</div><div class='del'>-		ucode[offset++] = (b1 &lt;&lt; 4) | 0x0c | (b0 &gt;&gt; 6);</div><div class='del'>-		ucode[offset++] = (b0 &lt;&lt; 2);</div><div class='del'>-		ucode[offset++] = 0x80 | i;</div><div class='del'>-</div><div class='del'>-		/* immed_w1[@ai, (b3 &lt;&lt; 8) | b2] */</div><div class='del'>-		/* 11110100 0100VVVV VVVV11VV VVVVVV00 1IIIIIII */</div><div class='del'>-		ucode[offset++] = 0xf4;</div><div class='del'>-		ucode[offset++] = 0x40 | (b3 &gt;&gt; 4);</div><div class='del'>-		ucode[offset++] = (b3 &lt;&lt; 4) | 0x0c | (b2 &gt;&gt; 6);</div><div class='del'>-		ucode[offset++] = (b2 &lt;&lt; 2);</div><div class='del'>-		ucode[offset++] = 0x80 | i;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 128; i++) {</div><div class='del'>-		u8 b3;</div><div class='del'>-		u8 b2;</div><div class='del'>-		u8 b1;</div><div class='del'>-		u8 b0;</div><div class='del'>-</div><div class='del'>-		b3 = (gpr_b[i] &gt;&gt; 24) &amp; 0xff;</div><div class='del'>-		b2 = (gpr_b[i] &gt;&gt; 16) &amp; 0xff;</div><div class='del'>-		b1 = (gpr_b[i] &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-		b0 = gpr_b[i] &amp; 0xff;</div><div class='del'>-</div><div class='del'>-		/* immed[@bi, (b1 &lt;&lt; 8) | b0] */</div><div class='del'>-		/* 11110000 0000VVVV VVVV001I IIIIII11 VVVVVVVV */</div><div class='del'>-		ucode[offset++] = 0xf0;</div><div class='del'>-		ucode[offset++] = (b1 &gt;&gt; 4);</div><div class='del'>-		ucode[offset++] = (b1 &lt;&lt; 4) | 0x02 | (i &gt;&gt; 6);</div><div class='del'>-		ucode[offset++] = (i &lt;&lt; 2) | 0x03;</div><div class='del'>-		ucode[offset++] = b0;</div><div class='del'>-</div><div class='del'>-		/* immed_w1[@bi, (b3 &lt;&lt; 8) | b2] */</div><div class='del'>-		/* 11110100 0100VVVV VVVV001I IIIIII11 VVVVVVVV */</div><div class='del'>-		ucode[offset++] = 0xf4;</div><div class='del'>-		ucode[offset++] = 0x40 | (b3 &gt;&gt; 4);</div><div class='del'>-		ucode[offset++] = (b3 &lt;&lt; 4) | 0x02 | (i &gt;&gt; 6);</div><div class='del'>-		ucode[offset++] = (i &lt;&lt; 2) | 0x03;</div><div class='del'>-		ucode[offset++] = b2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* ctx_arb[kill] */</div><div class='del'>-	ucode[offset++] = 0xe0;</div><div class='del'>-	ucode[offset++] = 0x00;</div><div class='del'>-	ucode[offset++] = 0x01;</div><div class='del'>-	ucode[offset++] = 0x00;</div><div class='del'>-	ucode[offset++] = 0x00;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int set_initial_registers(int uengine, struct ixp2000_uengine_code *c)</div><div class='del'>-{</div><div class='del'>-	int per_ctx_regs;</div><div class='del'>-	u32 *gpr_a;</div><div class='del'>-	u32 *gpr_b;</div><div class='del'>-	u8 *ucode;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	gpr_a = kzalloc(128 * sizeof(u32), GFP_KERNEL);</div><div class='del'>-	gpr_b = kzalloc(128 * sizeof(u32), GFP_KERNEL);</div><div class='del'>-	ucode = kmalloc(513 * 5, GFP_KERNEL);</div><div class='del'>-	if (gpr_a == NULL || gpr_b == NULL || ucode == NULL) {</div><div class='del'>-		kfree(ucode);</div><div class='del'>-		kfree(gpr_b);</div><div class='del'>-		kfree(gpr_a);</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	per_ctx_regs = 16;</div><div class='del'>-	if (c-&gt;uengine_parameters &amp; IXP2000_UENGINE_4_CONTEXTS)</div><div class='del'>-		per_ctx_regs = 32;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 256; i++) {</div><div class='del'>-		struct ixp2000_reg_value *r = c-&gt;initial_reg_values + i;</div><div class='del'>-		u32 *bank;</div><div class='del'>-		int inc;</div><div class='del'>-		int j;</div><div class='del'>-</div><div class='del'>-		if (r-&gt;reg == -1)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		bank = (r-&gt;reg &amp; 0x400) ? gpr_b : gpr_a;</div><div class='del'>-		inc = (r-&gt;reg &amp; 0x80) ? 128 : per_ctx_regs;</div><div class='del'>-</div><div class='del'>-		j = r-&gt;reg &amp; 0x7f;</div><div class='del'>-		while (j &lt; 128) {</div><div class='del'>-			bank[j] = r-&gt;value;</div><div class='del'>-			j += inc;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	generate_ucode(ucode, gpr_a, gpr_b);</div><div class='del'>-	ixp2000_uengine_load_microcode(uengine, ucode, 513);</div><div class='del'>-	ixp2000_uengine_init_context(uengine, 0, 0);</div><div class='del'>-	ixp2000_uengine_start_contexts(uengine, 0x01);</div><div class='del'>-	for (i = 0; i &lt; 100; i++) {</div><div class='del'>-		u32 status;</div><div class='del'>-</div><div class='del'>-		status = ixp2000_uengine_csr_read(uengine, ACTIVE_CTX_STS);</div><div class='del'>-		if (!(status &amp; 0x80000000))</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	ixp2000_uengine_stop_contexts(uengine, 0x01);</div><div class='del'>-</div><div class='del'>-	kfree(ucode);</div><div class='del'>-	kfree(gpr_b);</div><div class='del'>-	kfree(gpr_a);</div><div class='del'>-</div><div class='del'>-	return !!(i == 100);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int ixp2000_uengine_load(int uengine, struct ixp2000_uengine_code *c)</div><div class='del'>-{</div><div class='del'>-	int ctx;</div><div class='del'>-</div><div class='del'>-	if (!check_ixp_type(c))</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	if (!(ixp2000_uengine_mask &amp; (1 &lt;&lt; uengine)))</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	ixp2000_uengine_reset(1 &lt;&lt; uengine);</div><div class='del'>-	ixp2000_uengine_set_mode(uengine, c-&gt;uengine_parameters);</div><div class='del'>-	if (set_initial_registers(uengine, c))</div><div class='del'>-		return 1;</div><div class='del'>-	ixp2000_uengine_load_microcode(uengine, c-&gt;insns, c-&gt;num_insns);</div><div class='del'>-</div><div class='del'>-	for (ctx = 0; ctx &lt; 8; ctx++)</div><div class='del'>-		ixp2000_uengine_init_context(uengine, ctx, 0);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ixp2000_uengine_load);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __init ixp2000_uengine_init(void)</div><div class='del'>-{</div><div class='del'>-	int uengine;</div><div class='del'>-	u32 value;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Determine number of microengines present.</div><div class='del'>-	 */</div><div class='del'>-	switch ((ixp2000_reg_read(IXP_PRODUCT_ID) &gt;&gt; 8) &amp; 0x1fff) {</div><div class='del'>-#ifdef CONFIG_ARCH_IXP2000</div><div class='del'>-	case 0:		/* IXP2800 */</div><div class='del'>-	case 1:		/* IXP2850 */</div><div class='del'>-		ixp2000_uengine_mask = 0x00ff00ff;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case 2:		/* IXP2400 */</div><div class='del'>-		ixp2000_uengine_mask = 0x000f000f;</div><div class='del'>-		break;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARCH_IXP23XX</div><div class='del'>-	case 4:		/* IXP23xx */</div><div class='del'>-		ixp2000_uengine_mask = (*IXP23XX_EXP_CFG_FUSE &gt;&gt; 8) &amp; 0xf;</div><div class='del'>-		break;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		printk(KERN_INFO "Detected unknown IXP2000 model (%.8x)\n",</div><div class='del'>-			(unsigned int)ixp2000_reg_read(IXP_PRODUCT_ID));</div><div class='del'>-		ixp2000_uengine_mask = 0x00000000;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Reset microengines.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_uengine_reset(ixp2000_uengine_mask);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Synchronise timestamp counters across all microengines.</div><div class='del'>-	 */</div><div class='del'>-	value = ixp2000_reg_read(IXP_MISC_CONTROL);</div><div class='del'>-	ixp2000_reg_wrb(IXP_MISC_CONTROL, value &amp; ~0x80);</div><div class='del'>-	for (uengine = 0; uengine &lt; 32; uengine++) {</div><div class='del'>-		if (ixp2000_uengine_mask &amp; (1 &lt;&lt; uengine)) {</div><div class='del'>-			ixp2000_uengine_csr_write(uengine, TIMESTAMP_LOW, 0);</div><div class='del'>-			ixp2000_uengine_csr_write(uengine, TIMESTAMP_HIGH, 0);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	ixp2000_reg_wrb(IXP_MISC_CONTROL, value | 0x80);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-subsys_initcall(ixp2000_uengine_init);</div><div class='head'>diff --git a/arch/arm/common/via82c505.c b/arch/arm/common/via82c505.c<br/>index 1171a5010aea..6cb362e56d29 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/common/via82c505.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/common/via82c505.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/common/via82c505.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/common/via82c505.c</a></div><div class='hunk'>@@ -51,7 +51,7 @@ via82c505_write_config(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='ctx'> 	return PCIBIOS_SUCCESSFUL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct pci_ops via82c505_ops = {</div><div class='add'>+struct pci_ops via82c505_ops = {</div><div class='ctx'> 	.read	= via82c505_read_config,</div><div class='ctx'> 	.write	= via82c505_write_config,</div><div class='ctx'> };</div><div class='hunk'>@@ -81,12 +81,3 @@ int __init via82c505_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> {</div><div class='ctx'> 	return (nr == 0);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-struct pci_bus * __init via82c505_scan_bus(int nr, struct pci_sys_data *sysdata)</div><div class='del'>-{</div><div class='del'>-	if (nr == 0)</div><div class='del'>-		return pci_scan_root_bus(NULL, 0, &amp;via82c505_ops, sysdata,</div><div class='del'>-					 &amp;sysdata-&gt;resources);</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c<br/>index 7e288f96cedf..e0d538803cc3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/common/vic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/common/vic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/common/vic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/common/vic.c</a></div><div class='hunk'>@@ -39,6 +39,7 @@</div><div class='ctx'>  * struct vic_device - VIC PM device</div><div class='ctx'>  * @irq: The IRQ number for the base of the VIC.</div><div class='ctx'>  * @base: The register base for the VIC.</div><div class='add'>+ * @valid_sources: A bitmask of valid interrupts</div><div class='ctx'>  * @resume_sources: A bitmask of interrupts for resume.</div><div class='ctx'>  * @resume_irqs: The IRQs enabled for resume.</div><div class='ctx'>  * @int_select: Save for VIC_INT_SELECT.</div><div class='hunk'>@@ -50,6 +51,7 @@</div><div class='ctx'> struct vic_device {</div><div class='ctx'> 	void __iomem	*base;</div><div class='ctx'> 	int		irq;</div><div class='add'>+	u32		valid_sources;</div><div class='ctx'> 	u32		resume_sources;</div><div class='ctx'> 	u32		resume_irqs;</div><div class='ctx'> 	u32		int_select;</div><div class='hunk'>@@ -164,10 +166,32 @@ static int __init vic_pm_init(void)</div><div class='ctx'> late_initcall(vic_pm_init);</div><div class='ctx'> #endif /* CONFIG_PM */</div><div class='ctx'> </div><div class='add'>+static struct irq_chip vic_chip;</div><div class='add'>+</div><div class='add'>+static int vic_irqdomain_map(struct irq_domain *d, unsigned int irq,</div><div class='add'>+			     irq_hw_number_t hwirq)</div><div class='add'>+{</div><div class='add'>+	struct vic_device *v = d-&gt;host_data;</div><div class='add'>+</div><div class='add'>+	/* Skip invalid IRQs, only register handlers for the real ones */</div><div class='add'>+	if (!(v-&gt;valid_sources &amp; (1 &lt;&lt; hwirq)))</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;vic_chip, handle_level_irq);</div><div class='add'>+	irq_set_chip_data(irq, v-&gt;base);</div><div class='add'>+	set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_domain_ops vic_irqdomain_ops = {</div><div class='add'>+	.map = vic_irqdomain_map,</div><div class='add'>+	.xlate = irq_domain_xlate_onetwocell,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * vic_register() - Register a VIC.</div><div class='ctx'>  * @base: The base address of the VIC.</div><div class='ctx'>  * @irq: The base IRQ for the VIC.</div><div class='add'>+ * @valid_sources: bitmask of valid interrupts</div><div class='ctx'>  * @resume_sources: bitmask of interrupts allowed for resume sources.</div><div class='ctx'>  * @node: The device tree node associated with the VIC.</div><div class='ctx'>  *</div><div class='hunk'>@@ -178,7 +202,8 @@ late_initcall(vic_pm_init);</div><div class='ctx'>  * This also configures the IRQ domain for the VIC.</div><div class='ctx'>  */</div><div class='ctx'> static void __init vic_register(void __iomem *base, unsigned int irq,</div><div class='del'>-				u32 resume_sources, struct device_node *node)</div><div class='add'>+				u32 valid_sources, u32 resume_sources,</div><div class='add'>+				struct device_node *node)</div><div class='ctx'> {</div><div class='ctx'> 	struct vic_device *v;</div><div class='ctx'> </div><div class='hunk'>@@ -189,11 +214,12 @@ static void __init vic_register(void __iomem *base, unsigned int irq,</div><div class='ctx'> </div><div class='ctx'> 	v = &amp;vic_devices[vic_id];</div><div class='ctx'> 	v-&gt;base = base;</div><div class='add'>+	v-&gt;valid_sources = valid_sources;</div><div class='ctx'> 	v-&gt;resume_sources = resume_sources;</div><div class='ctx'> 	v-&gt;irq = irq;</div><div class='ctx'> 	vic_id++;</div><div class='del'>-	v-&gt;domain = irq_domain_add_legacy(node, 32, irq, 0,</div><div class='del'>-					  &amp;irq_domain_simple_ops, v);</div><div class='add'>+	v-&gt;domain = irq_domain_add_legacy(node, fls(valid_sources), irq, 0,</div><div class='add'>+					  &amp;vic_irqdomain_ops, v);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vic_ack_irq(struct irq_data *d)</div><div class='hunk'>@@ -287,23 +313,6 @@ static void __init vic_clear_interrupts(void __iomem *base)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init vic_set_irq_sources(void __iomem *base,</div><div class='del'>-				unsigned int irq_start, u32 vic_sources)</div><div class='del'>-{</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 32; i++) {</div><div class='del'>-		if (vic_sources &amp; (1 &lt;&lt; i)) {</div><div class='del'>-			unsigned int irq = irq_start + i;</div><div class='del'>-</div><div class='del'>-			irq_set_chip_and_handler(irq, &amp;vic_chip,</div><div class='del'>-						 handle_level_irq);</div><div class='del'>-			irq_set_chip_data(irq, base);</div><div class='del'>-			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The PL190 cell from ARM has been modified by ST to handle 64 interrupts.</div><div class='ctx'>  * The original cell has 32 interrupts, while the modified one has 64,</div><div class='hunk'>@@ -338,8 +347,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,</div><div class='ctx'> 		writel(32, base + VIC_PL190_DEF_VECT_ADDR);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vic_set_irq_sources(base, irq_start, vic_sources);</div><div class='del'>-	vic_register(base, irq_start, 0, node);</div><div class='add'>+	vic_register(base, irq_start, vic_sources, 0, node);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init __vic_init(void __iomem *base, unsigned int irq_start,</div><div class='hunk'>@@ -379,9 +387,7 @@ void __init __vic_init(void __iomem *base, unsigned int irq_start,</div><div class='ctx'> </div><div class='ctx'> 	vic_init2(base);</div><div class='ctx'> </div><div class='del'>-	vic_set_irq_sources(base, irq_start, vic_sources);</div><div class='del'>-</div><div class='del'>-	vic_register(base, irq_start, resume_sources, node);</div><div class='add'>+	vic_register(base, irq_start, vic_sources, resume_sources, node);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig<br/>new file mode 100644<br/>index 000000000000..ddc9fe6a78ac<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/armadillo800eva_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/armadillo800eva_defconfig</a></div><div class='hunk'>@@ -0,0 +1,142 @@</div><div class='add'>+CONFIG_EXPERIMENTAL=y</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+CONFIG_LOG_BUF_SHIFT=16</div><div class='add'>+# CONFIG_UTS_NS is not set</div><div class='add'>+# CONFIG_IPC_NS is not set</div><div class='add'>+# CONFIG_USER_NS is not set</div><div class='add'>+# CONFIG_PID_NS is not set</div><div class='add'>+CONFIG_SYSFS_DEPRECATED=y</div><div class='add'>+CONFIG_SYSFS_DEPRECATED_V2=y</div><div class='add'>+CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='add'>+CONFIG_SLAB=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_MODULE_FORCE_UNLOAD=y</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+CONFIG_ARCH_SHMOBILE=y</div><div class='add'>+CONFIG_ARCH_R8A7740=y</div><div class='add'>+CONFIG_MACH_ARMADILLO800EVA=y</div><div class='add'>+# CONFIG_SH_TIMER_TMU is not set</div><div class='add'>+# CONFIG_ARM_THUMB is not set</div><div class='add'>+CONFIG_CPU_BPREDICT_DISABLE=y</div><div class='add'>+# CONFIG_CACHE_L2X0 is not set</div><div class='add'>+CONFIG_ARM_ERRATA_430973=y</div><div class='add'>+CONFIG_ARM_ERRATA_458693=y</div><div class='add'>+CONFIG_ARM_ERRATA_460075=y</div><div class='add'>+CONFIG_ARM_ERRATA_720789=y</div><div class='add'>+CONFIG_ARM_ERRATA_743622=y</div><div class='add'>+CONFIG_ARM_ERRATA_751472=y</div><div class='add'>+CONFIG_ARM_ERRATA_754322=y</div><div class='add'>+CONFIG_AEABI=y</div><div class='add'>+# CONFIG_OABI_COMPAT is not set</div><div class='add'>+CONFIG_FORCE_MAX_ZONEORDER=13</div><div class='add'>+CONFIG_ZBOOT_ROM_TEXT=0x0</div><div class='add'>+CONFIG_ZBOOT_ROM_BSS=0x0</div><div class='add'>+CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096"</div><div class='add'>+CONFIG_CMDLINE_FORCE=y</div><div class='add'>+CONFIG_KEXEC=y</div><div class='add'>+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='add'>+# CONFIG_SUSPEND is not set</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+CONFIG_IP_PNP=y</div><div class='add'>+CONFIG_IP_PNP_DHCP=y</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='add'>+# CONFIG_INET_LRO is not set</div><div class='add'>+# CONFIG_INET_DIAG is not set</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+# CONFIG_WIRELESS is not set</div><div class='add'>+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_MD=y</div><div class='add'>+CONFIG_BLK_DEV_DM=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CHELSIO is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CIRRUS is not set</div><div class='add'>+# CONFIG_NET_VENDOR_FARADAY is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+CONFIG_SH_ETH=y</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SMSC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_STMICRO is not set</div><div class='add'>+# CONFIG_WLAN is not set</div><div class='add'>+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set</div><div class='add'>+CONFIG_INPUT_EVDEV=y</div><div class='add'>+# CONFIG_KEYBOARD_ATKBD is not set</div><div class='add'>+CONFIG_KEYBOARD_GPIO=y</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+CONFIG_INPUT_TOUCHSCREEN=y</div><div class='add'>+CONFIG_TOUCHSCREEN_ST1232=y</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+CONFIG_SERIAL_SH_SCI=y</div><div class='add'>+CONFIG_SERIAL_SH_SCI_NR_UARTS=8</div><div class='add'>+CONFIG_SERIAL_SH_SCI_CONSOLE=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_I2C_SH_MOBILE=y</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+CONFIG_FB_MODE_HELPERS=y</div><div class='add'>+CONFIG_FB_SH_MOBILE_LCDC=y</div><div class='add'>+CONFIG_LCD_CLASS_DEVICE=y</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y</div><div class='add'>+CONFIG_LOGO=y</div><div class='add'>+# CONFIG_LOGO_LINUX_MONO is not set</div><div class='add'>+# CONFIG_LOGO_LINUX_VGA16 is not set</div><div class='add'>+CONFIG_SOUND=y</div><div class='add'>+CONFIG_SND=y</div><div class='add'>+# CONFIG_SND_SUPPORT_OLD_API is not set</div><div class='add'>+# CONFIG_SND_VERBOSE_PROCFS is not set</div><div class='add'>+# CONFIG_SND_DRIVERS is not set</div><div class='add'>+# CONFIG_SND_ARM is not set</div><div class='add'>+CONFIG_SND_SOC=y</div><div class='add'>+CONFIG_SND_SOC_SH4_FSI=y</div><div class='add'>+# CONFIG_HID_SUPPORT is not set</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+# CONFIG_USB_DEVICE_CLASS is not set</div><div class='add'>+CONFIG_USB_RENESAS_USBHS=y</div><div class='add'>+CONFIG_USB_GADGET=y</div><div class='add'>+CONFIG_USB_RENESAS_USBHS_UDC=y</div><div class='add'>+CONFIG_USB_ETH=m</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_SDHI=y</div><div class='add'>+CONFIG_MMC_SH_MMCIF=y</div><div class='add'>+CONFIG_UIO=y</div><div class='add'>+CONFIG_UIO_PDRV_GENIRQ=y</div><div class='add'>+# CONFIG_DNOTIFY is not set</div><div class='add'>+CONFIG_MSDOS_FS=y</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+# CONFIG_MISC_FILESYSTEMS is not set</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+CONFIG_NFS_V3=y</div><div class='add'>+CONFIG_NFS_V3_ACL=y</div><div class='add'>+CONFIG_NFS_V4=y</div><div class='add'>+CONFIG_NFS_V4_1=y</div><div class='add'>+CONFIG_ROOT_NFS=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+# CONFIG_ARM_UNWIND is not set</div><div class='add'>+CONFIG_CRYPTO=y</div><div class='add'>+CONFIG_CRYPTO_CBC=y</div><div class='add'>+CONFIG_CRYPTO_MD5=y</div><div class='add'>+CONFIG_CRYPTO_DES=y</div><div class='add'>+CONFIG_CRYPTO_ANSI_CPRNG=y</div><div class='add'>+CONFIG_XZ_DEC=y</div><div class='head'>diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig<br/>new file mode 100644<br/>index 000000000000..67bc571ed0c3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/at91_dt_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/at91_dt_defconfig</a></div><div class='hunk'>@@ -0,0 +1,196 @@</div><div class='add'>+CONFIG_EXPERIMENTAL=y</div><div class='add'>+# CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+# CONFIG_SWAP is not set</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_LOG_BUF_SHIFT=14</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='add'>+CONFIG_KALLSYMS_ALL=y</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+CONFIG_SLAB=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+CONFIG_MODULE_UNLOAD=y</div><div class='add'>+# CONFIG_LBDAF is not set</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+CONFIG_ARCH_AT91=y</div><div class='add'>+CONFIG_SOC_AT91SAM9260=y</div><div class='add'>+CONFIG_SOC_AT91SAM9263=y</div><div class='add'>+CONFIG_SOC_AT91SAM9G45=y</div><div class='add'>+CONFIG_SOC_AT91SAM9X5=y</div><div class='add'>+CONFIG_MACH_AT91SAM_DT=y</div><div class='add'>+CONFIG_AT91_PROGRAMMABLE_CLOCKS=y</div><div class='add'>+CONFIG_AT91_TIMER_HZ=128</div><div class='add'>+CONFIG_AEABI=y</div><div class='add'>+# CONFIG_OABI_COMPAT is not set</div><div class='add'>+CONFIG_LEDS=y</div><div class='add'>+CONFIG_LEDS_CPU=y</div><div class='add'>+CONFIG_UACCESS_WITH_MEMCPY=y</div><div class='add'>+CONFIG_ZBOOT_ROM_TEXT=0x0</div><div class='add'>+CONFIG_ZBOOT_ROM_BSS=0x0</div><div class='add'>+CONFIG_ARM_APPENDED_DTB=y</div><div class='add'>+CONFIG_ARM_ATAG_DTB_COMPAT=y</div><div class='add'>+CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"</div><div class='add'>+CONFIG_KEXEC=y</div><div class='add'>+CONFIG_AUTO_ZRELADDR=y</div><div class='add'>+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+CONFIG_IP_MULTICAST=y</div><div class='add'>+CONFIG_IP_PNP=y</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='add'>+# CONFIG_INET_DIAG is not set</div><div class='add'>+CONFIG_IPV6=y</div><div class='add'>+# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set</div><div class='add'>+# CONFIG_INET6_XFRM_MODE_TUNNEL is not set</div><div class='add'>+# CONFIG_INET6_XFRM_MODE_BEET is not set</div><div class='add'>+CONFIG_IPV6_SIT_6RD=y</div><div class='add'>+# CONFIG_WIRELESS is not set</div><div class='add'>+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='add'>+CONFIG_DEVTMPFS=y</div><div class='add'>+CONFIG_DEVTMPFS_MOUNT=y</div><div class='add'>+# CONFIG_STANDALONE is not set</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+CONFIG_MTD=y</div><div class='add'>+CONFIG_MTD_CMDLINE_PARTS=y</div><div class='add'>+CONFIG_MTD_CHAR=y</div><div class='add'>+CONFIG_MTD_BLOCK=y</div><div class='add'>+CONFIG_MTD_NAND=y</div><div class='add'>+CONFIG_MTD_NAND_ATMEL=y</div><div class='add'>+CONFIG_MTD_UBI=y</div><div class='add'>+CONFIG_MTD_UBI_GLUEBI=y</div><div class='add'>+CONFIG_PROC_DEVICETREE=y</div><div class='add'>+CONFIG_BLK_DEV_LOOP=y</div><div class='add'>+CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_RAM_COUNT=4</div><div class='add'>+CONFIG_BLK_DEV_RAM_SIZE=8192</div><div class='add'>+CONFIG_ATMEL_PWM=y</div><div class='add'>+CONFIG_ATMEL_TCLIB=y</div><div class='add'>+CONFIG_EEPROM_93CX6=m</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_SCSI_MULTI_LUN=y</div><div class='add'>+# CONFIG_SCSI_LOWLEVEL is not set</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+CONFIG_MII=y</div><div class='add'>+CONFIG_MACB=y</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CHELSIO is not set</div><div class='add'>+# CONFIG_NET_VENDOR_FARADAY is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SMSC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_STMICRO is not set</div><div class='add'>+CONFIG_DAVICOM_PHY=y</div><div class='add'>+CONFIG_MICREL_PHY=y</div><div class='add'>+# CONFIG_WLAN is not set</div><div class='add'>+CONFIG_INPUT_POLLDEV=y</div><div class='add'>+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set</div><div class='add'>+CONFIG_INPUT_MOUSEDEV_SCREEN_X=480</div><div class='add'>+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272</div><div class='add'>+CONFIG_INPUT_JOYDEV=y</div><div class='add'>+CONFIG_INPUT_EVDEV=y</div><div class='add'>+# CONFIG_KEYBOARD_ATKBD is not set</div><div class='add'>+CONFIG_KEYBOARD_GPIO=y</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+CONFIG_INPUT_TOUCHSCREEN=y</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+CONFIG_LEGACY_PTY_COUNT=4</div><div class='add'>+CONFIG_SERIAL_ATMEL=y</div><div class='add'>+CONFIG_SERIAL_ATMEL_CONSOLE=y</div><div class='add'>+CONFIG_HW_RANDOM=y</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_I2C_GPIO=y</div><div class='add'>+CONFIG_SPI=y</div><div class='add'>+CONFIG_SPI_ATMEL=y</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_WATCHDOG=y</div><div class='add'>+CONFIG_AT91SAM9X_WATCHDOG=y</div><div class='add'>+CONFIG_SSB=m</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+CONFIG_FB_MODE_HELPERS=y</div><div class='add'>+CONFIG_FB_ATMEL=y</div><div class='add'>+CONFIG_BACKLIGHT_LCD_SUPPORT=y</div><div class='add'>+# CONFIG_LCD_CLASS_DEVICE is not set</div><div class='add'>+CONFIG_BACKLIGHT_CLASS_DEVICE=y</div><div class='add'>+CONFIG_BACKLIGHT_ATMEL_LCDC=y</div><div class='add'>+# CONFIG_BACKLIGHT_GENERIC is not set</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y</div><div class='add'>+CONFIG_FONTS=y</div><div class='add'>+CONFIG_FONT_8x8=y</div><div class='add'>+CONFIG_FONT_ACORN_8x8=y</div><div class='add'>+CONFIG_FONT_MINI_4x6=y</div><div class='add'>+CONFIG_LOGO=y</div><div class='add'>+# CONFIG_HID_SUPPORT is not set</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y</div><div class='add'>+CONFIG_USB_DEVICEFS=y</div><div class='add'>+# CONFIG_USB_DEVICE_CLASS is not set</div><div class='add'>+CONFIG_USB_EHCI_HCD=y</div><div class='add'>+CONFIG_USB_OHCI_HCD=y</div><div class='add'>+CONFIG_USB_ACM=y</div><div class='add'>+CONFIG_USB_STORAGE=y</div><div class='add'>+CONFIG_USB_SERIAL=y</div><div class='add'>+CONFIG_USB_SERIAL_GENERIC=y</div><div class='add'>+CONFIG_USB_SERIAL_FTDI_SIO=y</div><div class='add'>+CONFIG_USB_SERIAL_PL2303=y</div><div class='add'>+CONFIG_USB_GADGET=y</div><div class='add'>+CONFIG_USB_AT91=m</div><div class='add'>+CONFIG_USB_ATMEL_USBA=m</div><div class='add'>+CONFIG_USB_ETH=m</div><div class='add'>+CONFIG_USB_GADGETFS=m</div><div class='add'>+CONFIG_USB_CDC_COMPOSITE=m</div><div class='add'>+CONFIG_USB_G_ACM_MS=m</div><div class='add'>+CONFIG_USB_G_MULTI=m</div><div class='add'>+CONFIG_USB_G_MULTI_CDC=y</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_ATMELMCI=y</div><div class='add'>+CONFIG_NEW_LEDS=y</div><div class='add'>+CONFIG_LEDS_CLASS=y</div><div class='add'>+CONFIG_LEDS_GPIO=y</div><div class='add'>+CONFIG_LEDS_TRIGGERS=y</div><div class='add'>+CONFIG_LEDS_TRIGGER_TIMER=y</div><div class='add'>+CONFIG_LEDS_TRIGGER_HEARTBEAT=y</div><div class='add'>+CONFIG_LEDS_TRIGGER_GPIO=y</div><div class='add'>+CONFIG_RTC_CLASS=y</div><div class='add'>+CONFIG_RTC_DRV_AT91RM9200=y</div><div class='add'>+CONFIG_RTC_DRV_AT91SAM9=y</div><div class='add'>+CONFIG_DMADEVICES=y</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+CONFIG_FANOTIFY=y</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+CONFIG_NFS_V3=y</div><div class='add'>+CONFIG_ROOT_NFS=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_850=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+CONFIG_STRIP_ASM_SYMS=y</div><div class='add'>+CONFIG_DEBUG_FS=y</div><div class='add'>+# CONFIG_SCHED_DEBUG is not set</div><div class='add'>+# CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='add'>+CONFIG_DEBUG_USER=y</div><div class='add'>+CONFIG_CRYPTO=y</div><div class='add'>+CONFIG_CRYPTO_ECB=y</div><div class='add'>+CONFIG_CRYPTO_AES=y</div><div class='add'>+CONFIG_CRYPTO_ARC4=y</div><div class='add'>+# CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='add'>+CONFIG_CRYPTO_USER_API_HASH=m</div><div class='add'>+CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='add'>+# CONFIG_CRYPTO_HW is not set</div><div class='add'>+CONFIG_CRC_CCITT=m</div><div class='add'>+CONFIG_CRC_ITU_T=m</div><div class='add'>+CONFIG_CRC7=m</div><div class='add'>+CONFIG_AVERAGE=y</div><div class='head'>diff --git a/arch/arm/configs/at91rm9200_defconfig b/arch/arm/configs/at91rm9200_defconfig<br/>index bbe4e1a1f5d8..d54e2acd3ab1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/at91rm9200_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/at91rm9200_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/at91rm9200_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/at91rm9200_defconfig</a></div><div class='hunk'>@@ -14,6 +14,7 @@ CONFIG_MODULE_SRCVERSION_ALL=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='ctx'> CONFIG_ARCH_AT91=y</div><div class='add'>+CONFIG_ARCH_AT91RM9200=y</div><div class='ctx'> CONFIG_MACH_ONEARM=y</div><div class='ctx'> CONFIG_ARCH_AT91RM9200DK=y</div><div class='ctx'> CONFIG_MACH_AT91RM9200EK=y</div><div class='head'>diff --git a/arch/arm/configs/bcmring_defconfig b/arch/arm/configs/bcmring_defconfig<br/>index 795374d48f81..9e6a8fe13164 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/bcmring_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/bcmring_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/bcmring_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/bcmring_defconfig</a></div><div class='hunk'>@@ -11,7 +11,7 @@ CONFIG_KALLSYMS_EXTRA_PASS=y</div><div class='ctx'> # CONFIG_TIMERFD is not set</div><div class='ctx'> # CONFIG_EVENTFD is not set</div><div class='ctx'> # CONFIG_AIO is not set</div><div class='del'>-CONFIG_PERF_COUNTERS=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='ctx'> # CONFIG_VM_EVENT_COUNTERS is not set</div><div class='ctx'> # CONFIG_SLUB_DEBUG is not set</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='head'>diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig<br/>index 6b31cb60daab..e05a2f1665a7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/imx_v4_v5_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/imx_v4_v5_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/imx_v4_v5_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/imx_v4_v5_defconfig</a></div><div class='hunk'>@@ -33,6 +33,7 @@ CONFIG_MACH_IMX27LITE=y</div><div class='ctx'> CONFIG_MACH_PCA100=y</div><div class='ctx'> CONFIG_MACH_MXT_TD60=y</div><div class='ctx'> CONFIG_MACH_IMX27IPCAM=y</div><div class='add'>+CONFIG_MACH_IMX27_DT=y</div><div class='ctx'> CONFIG_MXC_IRQ_PRIOR=y</div><div class='ctx'> CONFIG_MXC_PWM=y</div><div class='ctx'> CONFIG_NO_HZ=y</div><div class='hunk'>@@ -92,6 +93,7 @@ CONFIG_INPUT_EVDEV=y</div><div class='ctx'> # CONFIG_INPUT_MOUSE is not set</div><div class='ctx'> CONFIG_INPUT_TOUCHSCREEN=y</div><div class='ctx'> CONFIG_TOUCHSCREEN_ADS7846=m</div><div class='add'>+CONFIG_TOUCHSCREEN_MC13783=m</div><div class='ctx'> # CONFIG_SERIO is not set</div><div class='ctx'> # CONFIG_LEGACY_PTYS is not set</div><div class='ctx'> CONFIG_SERIAL_8250=m</div><div class='hunk'>@@ -107,7 +109,8 @@ CONFIG_SPI_SPIDEV=y</div><div class='ctx'> CONFIG_W1=y</div><div class='ctx'> CONFIG_W1_MASTER_MXC=y</div><div class='ctx'> CONFIG_W1_SLAVE_THERM=y</div><div class='del'>-# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_HWMON=m</div><div class='add'>+CONFIG_SENSORS_MC13783_ADC=m</div><div class='ctx'> CONFIG_WATCHDOG=y</div><div class='ctx'> CONFIG_IMX2_WDT=y</div><div class='ctx'> CONFIG_MFD_MC13XXX=y</div><div class='hunk'>@@ -170,7 +173,7 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_PCF8563=y</div><div class='ctx'> CONFIG_RTC_DRV_IMXDI=y</div><div class='del'>-CONFIG_RTC_MXC=y</div><div class='add'>+CONFIG_RTC_DRV_MXC=y</div><div class='ctx'> CONFIG_DMADEVICES=y</div><div class='ctx'> CONFIG_IMX_SDMA=y</div><div class='ctx'> CONFIG_IMX_DMA=y</div><div class='head'>diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig<br/>index dc6f6411bbf5..b1d3675df72c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/imx_v6_v7_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/imx_v6_v7_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/imx_v6_v7_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/imx_v6_v7_defconfig</a></div><div class='hunk'>@@ -64,6 +64,12 @@ CONFIG_IPV6=y</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> CONFIG_DEVTMPFS=y</div><div class='ctx'> CONFIG_DEVTMPFS_MOUNT=y</div><div class='add'>+CONFIG_MTD=y</div><div class='add'>+CONFIG_MTD_OF_PARTS=y</div><div class='add'>+CONFIG_MTD_CHAR=y</div><div class='add'>+CONFIG_MTD_DATAFLASH=y</div><div class='add'>+CONFIG_MTD_M25P80=y</div><div class='add'>+CONFIG_MTD_SST25L=y</div><div class='ctx'> # CONFIG_STANDALONE is not set</div><div class='ctx'> CONFIG_CONNECTOR=y</div><div class='ctx'> CONFIG_BLK_DEV_LOOP=y</div><div class='hunk'>@@ -172,7 +178,7 @@ CONFIG_NEW_LEDS=y</div><div class='ctx'> CONFIG_LEDS_CLASS=y</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_INTF_DEV_UIE_EMUL=y</div><div class='del'>-CONFIG_RTC_MXC=y</div><div class='add'>+CONFIG_RTC_DRV_MXC=y</div><div class='ctx'> CONFIG_DMADEVICES=y</div><div class='ctx'> CONFIG_IMX_SDMA=y</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='head'>diff --git a/arch/arm/configs/ixp2000_defconfig b/arch/arm/configs/ixp2000_defconfig<br/>deleted file mode 100644<br/>index 8405aded97a3..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/ixp2000_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/ixp2000_defconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,99 +0,0 @@</div><div class='del'>-CONFIG_EXPERIMENTAL=y</div><div class='del'>-CONFIG_SYSVIPC=y</div><div class='del'>-CONFIG_BSD_PROCESS_ACCT=y</div><div class='del'>-CONFIG_LOG_BUF_SHIFT=14</div><div class='del'>-CONFIG_BLK_DEV_INITRD=y</div><div class='del'>-CONFIG_EXPERT=y</div><div class='del'>-# CONFIG_HOTPLUG is not set</div><div class='del'>-CONFIG_SLAB=y</div><div class='del'>-CONFIG_MODULES=y</div><div class='del'>-CONFIG_MODULE_UNLOAD=y</div><div class='del'>-CONFIG_ARCH_IXP2000=y</div><div class='del'>-CONFIG_ARCH_ENP2611=y</div><div class='del'>-CONFIG_ARCH_IXDP2400=y</div><div class='del'>-CONFIG_ARCH_IXDP2800=y</div><div class='del'>-CONFIG_ARCH_IXDP2401=y</div><div class='del'>-CONFIG_ARCH_IXDP2801=y</div><div class='del'>-# CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO is not set</div><div class='del'>-# CONFIG_ARM_THUMB is not set</div><div class='del'>-CONFIG_CPU_BIG_ENDIAN=y</div><div class='del'>-CONFIG_ZBOOT_ROM_TEXT=0x0</div><div class='del'>-CONFIG_ZBOOT_ROM_BSS=0x0</div><div class='del'>-CONFIG_CMDLINE="console=ttyS0,57600 root=/dev/nfs ip=bootp mem=64M@0x0"</div><div class='del'>-CONFIG_FPE_NWFPE=y</div><div class='del'>-CONFIG_FPE_NWFPE_XP=y</div><div class='del'>-CONFIG_NET=y</div><div class='del'>-CONFIG_PACKET=y</div><div class='del'>-CONFIG_UNIX=y</div><div class='del'>-CONFIG_INET=y</div><div class='del'>-CONFIG_IP_PNP=y</div><div class='del'>-CONFIG_IP_PNP_DHCP=y</div><div class='del'>-CONFIG_IP_PNP_BOOTP=y</div><div class='del'>-CONFIG_SYN_COOKIES=y</div><div class='del'>-CONFIG_IPV6=y</div><div class='del'>-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set</div><div class='del'>-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set</div><div class='del'>-# CONFIG_INET6_XFRM_MODE_BEET is not set</div><div class='del'>-# CONFIG_IPV6_SIT is not set</div><div class='del'>-# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='del'>-CONFIG_MTD=y</div><div class='del'>-CONFIG_MTD_PARTITIONS=y</div><div class='del'>-CONFIG_MTD_REDBOOT_PARTS=y</div><div class='del'>-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y</div><div class='del'>-CONFIG_MTD_REDBOOT_PARTS_READONLY=y</div><div class='del'>-CONFIG_MTD_CHAR=y</div><div class='del'>-CONFIG_MTD_BLOCK=y</div><div class='del'>-CONFIG_MTD_CFI=y</div><div class='del'>-CONFIG_MTD_CFI_INTELEXT=y</div><div class='del'>-CONFIG_MTD_COMPLEX_MAPPINGS=y</div><div class='del'>-CONFIG_MTD_IXP2000=y</div><div class='del'>-CONFIG_BLK_DEV_LOOP=y</div><div class='del'>-CONFIG_BLK_DEV_NBD=y</div><div class='del'>-CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_BLK_DEV_RAM_SIZE=8192</div><div class='del'>-CONFIG_EEPROM_LEGACY=y</div><div class='del'>-CONFIG_NETDEVICES=y</div><div class='del'>-CONFIG_DUMMY=y</div><div class='del'>-CONFIG_NET_ETHERNET=y</div><div class='del'>-CONFIG_NET_PCI=y</div><div class='del'>-CONFIG_CS89x0=y</div><div class='del'>-CONFIG_E100=y</div><div class='del'>-CONFIG_ENP2611_MSF_NET=y</div><div class='del'>-CONFIG_WAN=y</div><div class='del'>-CONFIG_HDLC=y</div><div class='del'>-CONFIG_HDLC_RAW=y</div><div class='del'>-CONFIG_HDLC_CISCO=y</div><div class='del'>-CONFIG_HDLC_FR=y</div><div class='del'>-CONFIG_HDLC_PPP=y</div><div class='del'>-CONFIG_DLCI=y</div><div class='del'>-# CONFIG_INPUT_KEYBOARD is not set</div><div class='del'>-# CONFIG_INPUT_MOUSE is not set</div><div class='del'>-# CONFIG_SERIO is not set</div><div class='del'>-# CONFIG_VT is not set</div><div class='del'>-CONFIG_SERIAL_8250=y</div><div class='del'>-CONFIG_SERIAL_8250_CONSOLE=y</div><div class='del'>-CONFIG_SERIAL_8250_NR_UARTS=3</div><div class='del'>-# CONFIG_HW_RANDOM is not set</div><div class='del'>-CONFIG_I2C=y</div><div class='del'>-CONFIG_I2C_CHARDEV=y</div><div class='del'>-CONFIG_I2C_IXP2000=y</div><div class='del'>-CONFIG_WATCHDOG=y</div><div class='del'>-CONFIG_IXP2000_WATCHDOG=y</div><div class='del'>-CONFIG_EXT2_FS=y</div><div class='del'>-CONFIG_EXT2_FS_XATTR=y</div><div class='del'>-CONFIG_EXT2_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_EXT3_FS=y</div><div class='del'>-CONFIG_EXT3_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_INOTIFY=y</div><div class='del'>-CONFIG_TMPFS=y</div><div class='del'>-CONFIG_JFFS2_FS=y</div><div class='del'>-CONFIG_NFS_FS=y</div><div class='del'>-CONFIG_NFS_V3=y</div><div class='del'>-CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_PARTITION_ADVANCED=y</div><div class='del'>-CONFIG_MAGIC_SYSRQ=y</div><div class='del'>-CONFIG_DEBUG_KERNEL=y</div><div class='del'>-CONFIG_DEBUG_MUTEXES=y</div><div class='del'>-CONFIG_DEBUG_USER=y</div><div class='del'>-CONFIG_DEBUG_ERRORS=y</div><div class='del'>-CONFIG_DEBUG_LL=y</div><div class='head'>diff --git a/arch/arm/configs/ixp23xx_defconfig b/arch/arm/configs/ixp23xx_defconfig<br/>deleted file mode 100644<br/>index 688717612e91..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/ixp23xx_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/ixp23xx_defconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,105 +0,0 @@</div><div class='del'>-CONFIG_EXPERIMENTAL=y</div><div class='del'>-CONFIG_SYSVIPC=y</div><div class='del'>-CONFIG_BSD_PROCESS_ACCT=y</div><div class='del'>-CONFIG_LOG_BUF_SHIFT=14</div><div class='del'>-CONFIG_BLK_DEV_INITRD=y</div><div class='del'>-CONFIG_EXPERT=y</div><div class='del'>-CONFIG_SLAB=y</div><div class='del'>-CONFIG_MODULES=y</div><div class='del'>-CONFIG_MODULE_UNLOAD=y</div><div class='del'>-CONFIG_ARCH_IXP23XX=y</div><div class='del'>-CONFIG_MACH_ESPRESSO=y</div><div class='del'>-CONFIG_MACH_IXDP2351=y</div><div class='del'>-CONFIG_MACH_ROADRUNNER=y</div><div class='del'>-# CONFIG_ARM_THUMB is not set</div><div class='del'>-CONFIG_CPU_BIG_ENDIAN=y</div><div class='del'>-CONFIG_ZBOOT_ROM_TEXT=0x0</div><div class='del'>-CONFIG_ZBOOT_ROM_BSS=0x0</div><div class='del'>-CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs ip=bootp"</div><div class='del'>-CONFIG_FPE_NWFPE=y</div><div class='del'>-CONFIG_FPE_NWFPE_XP=y</div><div class='del'>-CONFIG_NET=y</div><div class='del'>-CONFIG_PACKET=y</div><div class='del'>-CONFIG_UNIX=y</div><div class='del'>-CONFIG_INET=y</div><div class='del'>-CONFIG_IP_PNP=y</div><div class='del'>-CONFIG_IP_PNP_DHCP=y</div><div class='del'>-CONFIG_IP_PNP_BOOTP=y</div><div class='del'>-CONFIG_SYN_COOKIES=y</div><div class='del'>-CONFIG_IPV6=y</div><div class='del'>-# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set</div><div class='del'>-# CONFIG_INET6_XFRM_MODE_TUNNEL is not set</div><div class='del'>-# CONFIG_INET6_XFRM_MODE_BEET is not set</div><div class='del'>-# CONFIG_IPV6_SIT is not set</div><div class='del'>-# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='del'>-# CONFIG_FW_LOADER is not set</div><div class='del'>-CONFIG_MTD=y</div><div class='del'>-CONFIG_MTD_PARTITIONS=y</div><div class='del'>-CONFIG_MTD_REDBOOT_PARTS=y</div><div class='del'>-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y</div><div class='del'>-CONFIG_MTD_REDBOOT_PARTS_READONLY=y</div><div class='del'>-CONFIG_MTD_CHAR=y</div><div class='del'>-CONFIG_MTD_BLOCK=y</div><div class='del'>-CONFIG_MTD_CFI=y</div><div class='del'>-CONFIG_MTD_CFI_INTELEXT=y</div><div class='del'>-CONFIG_MTD_COMPLEX_MAPPINGS=y</div><div class='del'>-CONFIG_MTD_PHYSMAP=y</div><div class='del'>-CONFIG_BLK_DEV_LOOP=y</div><div class='del'>-CONFIG_BLK_DEV_NBD=y</div><div class='del'>-CONFIG_BLK_DEV_RAM=y</div><div class='del'>-CONFIG_BLK_DEV_RAM_SIZE=8192</div><div class='del'>-CONFIG_EEPROM_LEGACY=y</div><div class='del'>-CONFIG_IDE=y</div><div class='del'>-CONFIG_BLK_DEV_SIIMAGE=y</div><div class='del'>-CONFIG_SCSI=y</div><div class='del'>-CONFIG_BLK_DEV_SD=y</div><div class='del'>-CONFIG_NETDEVICES=y</div><div class='del'>-CONFIG_DUMMY=y</div><div class='del'>-CONFIG_NET_ETHERNET=y</div><div class='del'>-CONFIG_NET_PCI=y</div><div class='del'>-CONFIG_E100=y</div><div class='del'>-CONFIG_E1000=y</div><div class='del'>-CONFIG_WAN=y</div><div class='del'>-CONFIG_HDLC=y</div><div class='del'>-CONFIG_HDLC_RAW=y</div><div class='del'>-CONFIG_HDLC_CISCO=y</div><div class='del'>-CONFIG_HDLC_FR=y</div><div class='del'>-CONFIG_HDLC_PPP=y</div><div class='del'>-CONFIG_DLCI=y</div><div class='del'>-# CONFIG_INPUT_KEYBOARD is not set</div><div class='del'>-# CONFIG_INPUT_MOUSE is not set</div><div class='del'>-# CONFIG_SERIO is not set</div><div class='del'>-# CONFIG_VT is not set</div><div class='del'>-CONFIG_SERIAL_8250=y</div><div class='del'>-CONFIG_SERIAL_8250_CONSOLE=y</div><div class='del'>-# CONFIG_HW_RANDOM is not set</div><div class='del'>-CONFIG_I2C=y</div><div class='del'>-CONFIG_I2C_CHARDEV=y</div><div class='del'>-CONFIG_WATCHDOG=y</div><div class='del'>-# CONFIG_USB_HID is not set</div><div class='del'>-CONFIG_USB=y</div><div class='del'>-CONFIG_USB_MON=y</div><div class='del'>-CONFIG_USB_EHCI_HCD=y</div><div class='del'>-CONFIG_USB_OHCI_HCD=y</div><div class='del'>-CONFIG_USB_UHCI_HCD=y</div><div class='del'>-CONFIG_USB_STORAGE=y</div><div class='del'>-CONFIG_EXT2_FS=y</div><div class='del'>-CONFIG_EXT2_FS_XATTR=y</div><div class='del'>-CONFIG_EXT2_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_EXT3_FS=y</div><div class='del'>-CONFIG_EXT3_FS_POSIX_ACL=y</div><div class='del'>-CONFIG_INOTIFY=y</div><div class='del'>-CONFIG_MSDOS_FS=y</div><div class='del'>-CONFIG_TMPFS=y</div><div class='del'>-CONFIG_JFFS2_FS=y</div><div class='del'>-CONFIG_NFS_FS=y</div><div class='del'>-CONFIG_NFS_V3=y</div><div class='del'>-CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_PARTITION_ADVANCED=y</div><div class='del'>-CONFIG_NLS_CODEPAGE_437=y</div><div class='del'>-CONFIG_MAGIC_SYSRQ=y</div><div class='del'>-CONFIG_DEBUG_KERNEL=y</div><div class='del'>-CONFIG_DEBUG_MUTEXES=y</div><div class='del'>-CONFIG_DEBUG_USER=y</div><div class='del'>-CONFIG_DEBUG_ERRORS=y</div><div class='del'>-CONFIG_DEBUG_LL=y</div><div class='head'>diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig<br/>new file mode 100644<br/>index 000000000000..e3ebc20ed0a7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/kzm9g_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/kzm9g_defconfig</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+# CONFIG_ARM_PATCH_PHYS_VIRT is not set</div><div class='add'>+CONFIG_EXPERIMENTAL=y</div><div class='add'>+# CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+CONFIG_LOG_BUF_SHIFT=16</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='add'>+# CONFIG_UTS_NS is not set</div><div class='add'>+# CONFIG_IPC_NS is not set</div><div class='add'>+# CONFIG_USER_NS is not set</div><div class='add'>+# CONFIG_PID_NS is not set</div><div class='add'>+# CONFIG_NET_NS is not set</div><div class='add'>+CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='add'>+CONFIG_SYSCTL_SYSCALL=y</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+CONFIG_SLAB=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+CONFIG_MODULE_FORCE_LOAD=y</div><div class='add'>+CONFIG_MODULE_UNLOAD=y</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+CONFIG_ARCH_SHMOBILE=y</div><div class='add'>+CONFIG_KEYBOARD_GPIO_POLLED=y</div><div class='add'>+CONFIG_ARCH_SH73A0=y</div><div class='add'>+CONFIG_MACH_KZM9G=y</div><div class='add'>+CONFIG_MEMORY_START=0x41000000</div><div class='add'>+CONFIG_MEMORY_SIZE=0x1f000000</div><div class='add'>+CONFIG_ARM_ERRATA_743622=y</div><div class='add'>+CONFIG_ARM_ERRATA_754322=y</div><div class='add'>+CONFIG_NO_HZ=y</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_SMP=y</div><div class='add'>+CONFIG_SCHED_MC=y</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+CONFIG_AEABI=y</div><div class='add'>+# CONFIG_OABI_COMPAT is not set</div><div class='add'>+CONFIG_HIGHMEM=y</div><div class='add'>+CONFIG_ZBOOT_ROM_TEXT=0x0</div><div class='add'>+CONFIG_ZBOOT_ROM_BSS=0x0</div><div class='add'>+CONFIG_CMDLINE="console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200"</div><div class='add'>+CONFIG_KEXEC=y</div><div class='add'>+CONFIG_VFP=y</div><div class='add'>+CONFIG_NEON=y</div><div class='add'>+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='add'>+CONFIG_PM_RUNTIME=y</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+CONFIG_IP_PNP=y</div><div class='add'>+CONFIG_IP_PNP_DHCP=y</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='add'>+# CONFIG_INET_LRO is not set</div><div class='add'>+# CONFIG_INET_DIAG is not set</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+CONFIG_IRDA=y</div><div class='add'>+CONFIG_SH_IRDA=y</div><div class='add'>+# CONFIG_WIRELESS is not set</div><div class='add'>+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+CONFIG_SMSC911X=y</div><div class='add'>+# CONFIG_WLAN is not set</div><div class='add'>+CONFIG_INPUT_SPARSEKMAP=y</div><div class='add'>+# CONFIG_INPUT_MOUSEDEV is not set</div><div class='add'>+CONFIG_INPUT_EVDEV=y</div><div class='add'>+# CONFIG_KEYBOARD_ATKBD is not set</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+CONFIG_INPUT_TOUCHSCREEN=y</div><div class='add'>+CONFIG_TOUCHSCREEN_ST1232=y</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+CONFIG_SERIAL_SH_SCI=y</div><div class='add'>+CONFIG_SERIAL_SH_SCI_NR_UARTS=9</div><div class='add'>+CONFIG_SERIAL_SH_SCI_CONSOLE=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+CONFIG_I2C_CHARDEV=y</div><div class='add'>+CONFIG_I2C_SH_MOBILE=y</div><div class='add'>+CONFIG_GPIO_PCF857X=y</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+CONFIG_FB_SH_MOBILE_LCDC=y</div><div class='add'>+CONFIG_FRAMEBUFFER_CONSOLE=y</div><div class='add'>+CONFIG_LOGO=y</div><div class='add'>+CONFIG_FB_SH_MOBILE_MERAM=y</div><div class='add'>+CONFIG_SOUND=y</div><div class='add'>+CONFIG_SND=y</div><div class='add'>+# CONFIG_SND_SUPPORT_OLD_API is not set</div><div class='add'>+# CONFIG_SND_VERBOSE_PROCFS is not set</div><div class='add'>+# CONFIG_SND_DRIVERS is not set</div><div class='add'>+# CONFIG_SND_ARM is not set</div><div class='add'>+# CONFIG_SND_USB is not set</div><div class='add'>+CONFIG_SND_SOC=y</div><div class='add'>+CONFIG_SND_SOC_SH4_FSI=y</div><div class='add'>+# CONFIG_HID_SUPPORT is not set</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+CONFIG_USB_DEVICEFS=y</div><div class='add'>+CONFIG_USB_R8A66597_HCD=y</div><div class='add'>+CONFIG_USB_STORAGE=y</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+# CONFIG_MMC_BLOCK_BOUNCE is not set</div><div class='add'>+CONFIG_MMC_SDHI=y</div><div class='add'>+CONFIG_MMC_SH_MMCIF=y</div><div class='add'>+CONFIG_NEW_LEDS=y</div><div class='add'>+CONFIG_LEDS_CLASS=y</div><div class='add'>+CONFIG_RTC_CLASS=y</div><div class='add'>+CONFIG_DMADEVICES=y</div><div class='add'>+CONFIG_SH_DMAE=y</div><div class='add'>+CONFIG_ASYNC_TX_DMA=y</div><div class='add'>+CONFIG_STAGING=y</div><div class='add'>+# CONFIG_DNOTIFY is not set</div><div class='add'>+# CONFIG_INOTIFY_USER is not set</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+# CONFIG_MISC_FILESYSTEMS is not set</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+CONFIG_NFS_V3=y</div><div class='add'>+CONFIG_NFS_V3_ACL=y</div><div class='add'>+CONFIG_NFS_V4=y</div><div class='add'>+CONFIG_NFS_V4_1=y</div><div class='add'>+CONFIG_ROOT_NFS=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+# CONFIG_ENABLE_WARN_DEPRECATED is not set</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+# CONFIG_SCHED_DEBUG is not set</div><div class='add'>+# CONFIG_DEBUG_PREEMPT is not set</div><div class='add'>+# CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='add'>+# CONFIG_ARM_UNWIND is not set</div><div class='add'>+CONFIG_CRYPTO=y</div><div class='add'>+CONFIG_CRYPTO_CBC=y</div><div class='add'>+CONFIG_CRYPTO_MD5=y</div><div class='add'>+CONFIG_CRYPTO_DES=y</div><div class='add'>+CONFIG_CRC16=y</div><div class='head'>diff --git a/arch/arm/configs/lpc32xx_defconfig b/arch/arm/configs/lpc32xx_defconfig<br/>index fb2088171ca9..4fa60547494a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/lpc32xx_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/lpc32xx_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/lpc32xx_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/lpc32xx_defconfig</a></div><div class='hunk'>@@ -2,7 +2,7 @@ CONFIG_EXPERIMENTAL=y</div><div class='ctx'> CONFIG_SYSVIPC=y</div><div class='ctx'> CONFIG_IKCONFIG=y</div><div class='ctx'> CONFIG_IKCONFIG_PROC=y</div><div class='del'>-CONFIG_LOG_BUF_SHIFT=14</div><div class='add'>+CONFIG_LOG_BUF_SHIFT=16</div><div class='ctx'> CONFIG_SYSFS_DEPRECATED=y</div><div class='ctx'> CONFIG_SYSFS_DEPRECATED_V2=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='hunk'>@@ -10,6 +10,7 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> CONFIG_SYSCTL_SYSCALL=y</div><div class='ctx'> CONFIG_EMBEDDED=y</div><div class='ctx'> CONFIG_SLAB=y</div><div class='add'>+CONFIG_JUMP_LABEL=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='hunk'>@@ -21,6 +22,8 @@ CONFIG_PREEMPT=y</div><div class='ctx'> CONFIG_AEABI=y</div><div class='ctx'> CONFIG_ZBOOT_ROM_TEXT=0x0</div><div class='ctx'> CONFIG_ZBOOT_ROM_BSS=0x0</div><div class='add'>+CONFIG_ARM_APPENDED_DTB=y</div><div class='add'>+CONFIG_ARM_ATAG_DTB_COMPAT=y</div><div class='ctx'> CONFIG_CMDLINE="console=ttyS0,115200n81 root=/dev/ram0"</div><div class='ctx'> CONFIG_CPU_IDLE=y</div><div class='ctx'> CONFIG_FPE_NWFPE=y</div><div class='hunk'>@@ -40,7 +43,8 @@ CONFIG_IP_PNP_BOOTP=y</div><div class='ctx'> # CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='ctx'> # CONFIG_INET_LRO is not set</div><div class='ctx'> # CONFIG_INET_DIAG is not set</div><div class='del'>-# CONFIG_IPV6 is not set</div><div class='add'>+CONFIG_IPV6=y</div><div class='add'>+CONFIG_IPV6_PRIVACY=y</div><div class='ctx'> # CONFIG_WIRELESS is not set</div><div class='ctx'> CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='ctx'> # CONFIG_FW_LOADER is not set</div><div class='hunk'>@@ -55,13 +59,24 @@ CONFIG_BLK_DEV_CRYPTOLOOP=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM_COUNT=1</div><div class='ctx'> CONFIG_BLK_DEV_RAM_SIZE=16384</div><div class='del'>-CONFIG_MISC_DEVICES=y</div><div class='ctx'> CONFIG_EEPROM_AT25=y</div><div class='ctx'> CONFIG_SCSI=y</div><div class='ctx'> CONFIG_BLK_DEV_SD=y</div><div class='ctx'> CONFIG_NETDEVICES=y</div><div class='ctx'> CONFIG_MII=y</div><div class='del'>-CONFIG_PHYLIB=y</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CHELSIO is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CIRRUS is not set</div><div class='add'>+# CONFIG_NET_VENDOR_FARADAY is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICROCHIP is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+CONFIG_LPC_ENET=y</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SMSC is not set</div><div class='add'>+# CONFIG_NET_VENDOR_STMICRO is not set</div><div class='ctx'> CONFIG_SMSC_PHY=y</div><div class='ctx'> # CONFIG_WLAN is not set</div><div class='ctx'> # CONFIG_INPUT_MOUSEDEV_PSAUX is not set</div><div class='hunk'>@@ -97,16 +112,22 @@ CONFIG_SND_SEQUENCER=y</div><div class='ctx'> CONFIG_SND_MIXER_OSS=y</div><div class='ctx'> CONFIG_SND_PCM_OSS=y</div><div class='ctx'> CONFIG_SND_SEQUENCER_OSS=y</div><div class='del'>-CONFIG_SND_DYNAMIC_MINORS=y</div><div class='add'>+# CONFIG_SND_SUPPORT_OLD_API is not set</div><div class='ctx'> # CONFIG_SND_VERBOSE_PROCFS is not set</div><div class='add'>+CONFIG_SND_DEBUG=y</div><div class='add'>+CONFIG_SND_DEBUG_VERBOSE=y</div><div class='ctx'> # CONFIG_SND_DRIVERS is not set</div><div class='ctx'> # CONFIG_SND_ARM is not set</div><div class='ctx'> # CONFIG_SND_SPI is not set</div><div class='ctx'> CONFIG_SND_SOC=y</div><div class='ctx'> # CONFIG_HID_SUPPORT is not set</div><div class='ctx'> CONFIG_USB=y</div><div class='add'>+CONFIG_USB_OHCI_HCD=y</div><div class='ctx'> CONFIG_USB_STORAGE=y</div><div class='del'>-CONFIG_USB_LIBUSUAL=y</div><div class='add'>+CONFIG_USB_GADGET=y</div><div class='add'>+CONFIG_USB_LPC32XX=y</div><div class='add'>+CONFIG_USB_MASS_STORAGE=m</div><div class='add'>+CONFIG_USB_G_SERIAL=m</div><div class='ctx'> CONFIG_MMC=y</div><div class='ctx'> # CONFIG_MMC_BLOCK_BOUNCE is not set</div><div class='ctx'> CONFIG_MMC_ARMMMCI=y</div><div class='hunk'>@@ -114,10 +135,21 @@ CONFIG_NEW_LEDS=y</div><div class='ctx'> CONFIG_LEDS_CLASS=y</div><div class='ctx'> CONFIG_LEDS_GPIO=y</div><div class='ctx'> CONFIG_LEDS_TRIGGERS=y</div><div class='add'>+CONFIG_LEDS_TRIGGER_TIMER=y</div><div class='ctx'> CONFIG_LEDS_TRIGGER_HEARTBEAT=y</div><div class='add'>+CONFIG_LEDS_TRIGGER_BACKLIGHT=y</div><div class='add'>+CONFIG_LEDS_TRIGGER_GPIO=y</div><div class='add'>+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_INTF_DEV_UIE_EMUL=y</div><div class='add'>+CONFIG_RTC_DRV_DS1374=y</div><div class='add'>+CONFIG_RTC_DRV_PCF8563=y</div><div class='ctx'> CONFIG_RTC_DRV_LPC32XX=y</div><div class='add'>+CONFIG_DMADEVICES=y</div><div class='add'>+CONFIG_AMBA_PL08X=y</div><div class='add'>+CONFIG_STAGING=y</div><div class='add'>+CONFIG_IIO=y</div><div class='add'>+CONFIG_LPC32XX_ADC=y</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_AUTOFS4_FS=y</div><div class='ctx'> CONFIG_MSDOS_FS=y</div><div class='head'>diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig<br/>index 1ebbf451c48d..5406c23a02e3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/mxs_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/mxs_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/mxs_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/mxs_defconfig</a></div><div class='hunk'>@@ -22,6 +22,7 @@ CONFIG_BLK_DEV_INTEGRITY=y</div><div class='ctx'> # CONFIG_IOSCHED_DEADLINE is not set</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='ctx'> CONFIG_ARCH_MXS=y</div><div class='add'>+CONFIG_MACH_MXS_DT=y</div><div class='ctx'> CONFIG_MACH_MX23EVK=y</div><div class='ctx'> CONFIG_MACH_MX28EVK=y</div><div class='ctx'> CONFIG_MACH_STMP378X_DEVB=y</div><div class='head'>diff --git a/arch/arm/configs/nhk8815_defconfig b/arch/arm/configs/nhk8815_defconfig<br/>index 37207d1bf44b..bf123c5384d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/nhk8815_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/nhk8815_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/nhk8815_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/nhk8815_defconfig</a></div><div class='hunk'>@@ -97,6 +97,7 @@ CONFIG_I2C=y</div><div class='ctx'> CONFIG_I2C_CHARDEV=y</div><div class='ctx'> CONFIG_I2C_GPIO=y</div><div class='ctx'> CONFIG_DEBUG_GPIO=y</div><div class='add'>+CONFIG_PINCTRL_NOMADIK=y</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='ctx'> # CONFIG_VGA_CONSOLE is not set</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='head'>diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig<br/>index d5f00d7eb075..9854ff4279e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/omap2plus_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/omap2plus_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/omap2plus_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/omap2plus_defconfig</a></div><div class='hunk'>@@ -98,6 +98,7 @@ CONFIG_LIBERTAS_USB=m</div><div class='ctx'> CONFIG_LIBERTAS_SDIO=m</div><div class='ctx'> CONFIG_LIBERTAS_DEBUG=y</div><div class='ctx'> CONFIG_USB_USBNET=y</div><div class='add'>+CONFIG_USB_NET_SMSC95XX=y</div><div class='ctx'> CONFIG_USB_ALI_M5632=y</div><div class='ctx'> CONFIG_USB_AN2720=y</div><div class='ctx'> CONFIG_USB_EPSON2888=y</div><div class='hunk'>@@ -175,6 +176,7 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y</div><div class='ctx'> CONFIG_USB_DEVICEFS=y</div><div class='ctx'> CONFIG_USB_SUSPEND=y</div><div class='ctx'> CONFIG_USB_MON=y</div><div class='add'>+CONFIG_USB_EHCI_HCD=y</div><div class='ctx'> CONFIG_USB_WDM=y</div><div class='ctx'> CONFIG_USB_STORAGE=y</div><div class='ctx'> CONFIG_USB_LIBUSUAL=y</div><div class='head'>diff --git a/arch/arm/configs/prima2_defconfig b/arch/arm/configs/prima2_defconfig<br/>new file mode 100644<br/>index 000000000000..c328ac65479a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/prima2_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/prima2_defconfig</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+CONFIG_EXPERIMENTAL=y</div><div class='add'>+CONFIG_RELAY=y</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_KALLSYMS_ALL=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+CONFIG_MODULE_UNLOAD=y</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+CONFIG_PARTITION_ADVANCED=y</div><div class='add'>+CONFIG_BSD_DISKLABEL=y</div><div class='add'>+CONFIG_SOLARIS_X86_PARTITION=y</div><div class='add'>+CONFIG_ARCH_PRIMA2=y</div><div class='add'>+CONFIG_NO_HZ=y</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_PREEMPT=y</div><div class='add'>+CONFIG_AEABI=y</div><div class='add'>+CONFIG_KEXEC=y</div><div class='add'>+CONFIG_BINFMT_MISC=y</div><div class='add'>+CONFIG_PM_RUNTIME=y</div><div class='add'>+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='add'>+CONFIG_BLK_DEV_LOOP=y</div><div class='add'>+CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_RAM_SIZE=8192</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_CHR_DEV_SG=y</div><div class='add'>+CONFIG_INPUT_EVDEV=y</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+CONFIG_INPUT_TOUCHSCREEN=y</div><div class='add'>+CONFIG_SERIAL_SIRFSOC=y</div><div class='add'>+CONFIG_SERIAL_SIRFSOC_CONSOLE=y</div><div class='add'>+CONFIG_HW_RANDOM=y</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_I2C_CHARDEV=y</div><div class='add'>+CONFIG_I2C_SIRF=y</div><div class='add'>+CONFIG_SPI=y</div><div class='add'>+CONFIG_SPI_SIRF=y</div><div class='add'>+CONFIG_SPI_SPIDEV=y</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+# CONFIG_HID_SUPPORT is not set</div><div class='add'>+CONFIG_USB_GADGET=y</div><div class='add'>+CONFIG_USB_FILE_STORAGE=m</div><div class='add'>+CONFIG_USB_MASS_STORAGE=m</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_SDHCI=y</div><div class='add'>+CONFIG_MMC_SDHCI_PLTFM=y</div><div class='add'>+CONFIG_DMADEVICES=y</div><div class='add'>+CONFIG_DMADEVICES_DEBUG=y</div><div class='add'>+CONFIG_DMADEVICES_VDEBUG=y</div><div class='add'>+CONFIG_SIRF_DMA=y</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+CONFIG_MSDOS_FS=y</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+CONFIG_TMPFS_POSIX_ACL=y</div><div class='add'>+CONFIG_CRAMFS=y</div><div class='add'>+CONFIG_ROMFS_FS=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_ASCII=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+CONFIG_MAGIC_SYSRQ=y</div><div class='add'>+CONFIG_DEBUG_SECTION_MISMATCH=y</div><div class='add'>+CONFIG_DEBUG_KERNEL=y</div><div class='add'>+# CONFIG_DEBUG_PREEMPT is not set</div><div class='add'>+CONFIG_DEBUG_RT_MUTEXES=y</div><div class='add'>+CONFIG_DEBUG_SPINLOCK=y</div><div class='add'>+CONFIG_DEBUG_MUTEXES=y</div><div class='add'>+CONFIG_DEBUG_INFO=y</div><div class='add'>+CONFIG_CRC_CCITT=y</div><div class='head'>diff --git a/arch/arm/configs/rpc_defconfig b/arch/arm/configs/rpc_defconfig<br/>index af278f7a2246..00515ef9782d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/rpc_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/rpc_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/rpc_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/rpc_defconfig</a></div><div class='hunk'>@@ -8,8 +8,6 @@ CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='ctx'> CONFIG_ARCH_RPC=y</div><div class='del'>-CONFIG_CPU_ARM610=y</div><div class='del'>-CONFIG_CPU_ARM710=y</div><div class='ctx'> CONFIG_CPU_SA110=y</div><div class='ctx'> CONFIG_ZBOOT_ROM_TEXT=0x0</div><div class='ctx'> CONFIG_ZBOOT_ROM_BSS=0x0</div><div class='head'>diff --git a/arch/arm/configs/spear13xx_defconfig b/arch/arm/configs/spear13xx_defconfig<br/>new file mode 100644<br/>index 000000000000..1fdb82694ca2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/spear13xx_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/spear13xx_defconfig</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+CONFIG_EXPERIMENTAL=y</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_BSD_PROCESS_ACCT=y</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+CONFIG_MODULE_UNLOAD=y</div><div class='add'>+CONFIG_MODVERSIONS=y</div><div class='add'>+CONFIG_PARTITION_ADVANCED=y</div><div class='add'>+CONFIG_PLAT_SPEAR=y</div><div class='add'>+CONFIG_ARCH_SPEAR13XX=y</div><div class='add'>+CONFIG_MACH_SPEAR1310=y</div><div class='add'>+CONFIG_MACH_SPEAR1340=y</div><div class='add'>+# CONFIG_SWP_EMULATE is not set</div><div class='add'>+CONFIG_SMP=y</div><div class='add'>+# CONFIG_SMP_ON_UP is not set</div><div class='add'>+# CONFIG_ARM_CPU_TOPOLOGY is not set</div><div class='add'>+CONFIG_ARM_APPENDED_DTB=y</div><div class='add'>+CONFIG_ARM_ATAG_DTB_COMPAT=y</div><div class='add'>+CONFIG_BINFMT_MISC=y</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='add'>+CONFIG_MTD=y</div><div class='add'>+CONFIG_MTD_OF_PARTS=y</div><div class='add'>+CONFIG_MTD_CHAR=y</div><div class='add'>+CONFIG_MTD_BLOCK=y</div><div class='add'>+CONFIG_MTD_NAND=y</div><div class='add'>+CONFIG_MTD_NAND_FSMC=y</div><div class='add'>+CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_RAM_SIZE=16384</div><div class='add'>+CONFIG_ATA=y</div><div class='add'>+# CONFIG_SATA_PMP is not set</div><div class='add'>+CONFIG_SATA_AHCI_PLATFORM=y</div><div class='add'>+CONFIG_PATA_ARASAN_CF=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CIRRUS is not set</div><div class='add'>+# CONFIG_NET_VENDOR_FARADAY is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SMSC is not set</div><div class='add'>+CONFIG_STMMAC_ETH=y</div><div class='add'>+# CONFIG_WLAN is not set</div><div class='add'>+CONFIG_INPUT_FF_MEMLESS=y</div><div class='add'>+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set</div><div class='add'>+# CONFIG_KEYBOARD_ATKBD is not set</div><div class='add'>+CONFIG_KEYBOARD_SPEAR=y</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+CONFIG_SERIAL_AMBA_PL011=y</div><div class='add'>+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+CONFIG_RAW_DRIVER=y</div><div class='add'>+CONFIG_MAX_RAW_DEVS=8192</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_I2C_DESIGNWARE_PLATFORM=y</div><div class='add'>+CONFIG_SPI=y</div><div class='add'>+CONFIG_SPI_PL022=y</div><div class='add'>+CONFIG_GPIO_SYSFS=y</div><div class='add'>+CONFIG_GPIO_PL061=y</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_WATCHDOG=y</div><div class='add'>+CONFIG_MPCORE_WATCHDOG=y</div><div class='add'>+# CONFIG_HID_SUPPORT is not set</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+# CONFIG_USB_DEVICE_CLASS is not set</div><div class='add'>+CONFIG_USB_EHCI_HCD=y</div><div class='add'>+CONFIG_USB_OHCI_HCD=y</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_SDHCI=y</div><div class='add'>+CONFIG_MMC_SDHCI_SPEAR=y</div><div class='add'>+CONFIG_RTC_CLASS=y</div><div class='add'>+CONFIG_DMADEVICES=y</div><div class='add'>+CONFIG_DW_DMAC=y</div><div class='add'>+CONFIG_DMATEST=m</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+CONFIG_EXT2_FS_XATTR=y</div><div class='add'>+CONFIG_EXT2_FS_SECURITY=y</div><div class='add'>+CONFIG_EXT3_FS=y</div><div class='add'>+CONFIG_EXT3_FS_SECURITY=y</div><div class='add'>+CONFIG_AUTOFS4_FS=m</div><div class='add'>+CONFIG_MSDOS_FS=m</div><div class='add'>+CONFIG_VFAT_FS=m</div><div class='add'>+CONFIG_FAT_DEFAULT_IOCHARSET="ascii"</div><div class='add'>+CONFIG_TMPFS=y</div><div class='add'>+CONFIG_JFFS2_FS=y</div><div class='add'>+CONFIG_NLS_DEFAULT="utf8"</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_ASCII=m</div><div class='add'>+CONFIG_MAGIC_SYSRQ=y</div><div class='add'>+CONFIG_DEBUG_FS=y</div><div class='add'>+CONFIG_DEBUG_KERNEL=y</div><div class='add'>+CONFIG_DEBUG_SPINLOCK=y</div><div class='add'>+CONFIG_DEBUG_INFO=y</div><div class='head'>diff --git a/arch/arm/configs/spear3xx_defconfig b/arch/arm/configs/spear3xx_defconfig<br/>index fea7e1f026a3..865980c5f212 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/spear3xx_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/spear3xx_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/spear3xx_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/spear3xx_defconfig</a></div><div class='hunk'>@@ -2,33 +2,70 @@ CONFIG_EXPERIMENTAL=y</div><div class='ctx'> CONFIG_SYSVIPC=y</div><div class='ctx'> CONFIG_BSD_PROCESS_ACCT=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='del'>-CONFIG_KALLSYMS_EXTRA_PASS=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> CONFIG_MODVERSIONS=y</div><div class='add'>+CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_PLAT_SPEAR=y</div><div class='del'>-CONFIG_BOARD_SPEAR300_EVB=y</div><div class='del'>-CONFIG_BOARD_SPEAR310_EVB=y</div><div class='del'>-CONFIG_BOARD_SPEAR320_EVB=y</div><div class='add'>+CONFIG_MACH_SPEAR300=y</div><div class='add'>+CONFIG_MACH_SPEAR310=y</div><div class='add'>+CONFIG_MACH_SPEAR320=y</div><div class='ctx'> CONFIG_BINFMT_MISC=y</div><div class='add'>+CONFIG_NET=y</div><div class='ctx'> CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='add'>+CONFIG_MTD=y</div><div class='add'>+CONFIG_MTD_OF_PARTS=y</div><div class='add'>+CONFIG_MTD_CHAR=y</div><div class='add'>+CONFIG_MTD_BLOCK=y</div><div class='add'>+CONFIG_MTD_NAND=y</div><div class='add'>+CONFIG_MTD_NAND_FSMC=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM_SIZE=16384</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CIRRUS is not set</div><div class='add'>+# CONFIG_NET_VENDOR_FARADAY is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SMSC is not set</div><div class='add'>+CONFIG_STMMAC_ETH=y</div><div class='add'>+# CONFIG_WLAN is not set</div><div class='ctx'> CONFIG_INPUT_FF_MEMLESS=y</div><div class='ctx'> # CONFIG_INPUT_MOUSEDEV_PSAUX is not set</div><div class='del'>-# CONFIG_INPUT_KEYBOARD is not set</div><div class='add'>+# CONFIG_KEYBOARD_ATKBD is not set</div><div class='add'>+CONFIG_KEYBOARD_SPEAR=y</div><div class='ctx'> # CONFIG_INPUT_MOUSE is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='ctx'> CONFIG_SERIAL_AMBA_PL011=y</div><div class='ctx'> CONFIG_SERIAL_AMBA_PL011_CONSOLE=y</div><div class='del'>-# CONFIG_LEGACY_PTYS is not set</div><div class='ctx'> # CONFIG_HW_RANDOM is not set</div><div class='ctx'> CONFIG_RAW_DRIVER=y</div><div class='ctx'> CONFIG_MAX_RAW_DEVS=8192</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_I2C_DESIGNWARE_PLATFORM=y</div><div class='add'>+CONFIG_SPI=y</div><div class='add'>+CONFIG_SPI_PL022=y</div><div class='ctx'> CONFIG_GPIO_SYSFS=y</div><div class='ctx'> CONFIG_GPIO_PL061=y</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='add'>+CONFIG_WATCHDOG=y</div><div class='add'>+CONFIG_ARM_SP805_WATCHDOG=y</div><div class='add'>+CONFIG_FB=y</div><div class='add'>+CONFIG_FB_ARMCLCD=y</div><div class='ctx'> # CONFIG_HID_SUPPORT is not set</div><div class='del'>-# CONFIG_USB_SUPPORT is not set</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+# CONFIG_USB_DEVICE_CLASS is not set</div><div class='add'>+CONFIG_USB_EHCI_HCD=y</div><div class='add'>+CONFIG_USB_OHCI_HCD=y</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_SDHCI=y</div><div class='add'>+CONFIG_MMC_SDHCI_SPEAR=y</div><div class='add'>+CONFIG_RTC_CLASS=y</div><div class='add'>+CONFIG_DMADEVICES=y</div><div class='add'>+CONFIG_AMBA_PL08X=y</div><div class='add'>+CONFIG_DMATEST=m</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_EXT2_FS_XATTR=y</div><div class='ctx'> CONFIG_EXT2_FS_SECURITY=y</div><div class='hunk'>@@ -39,8 +76,7 @@ CONFIG_MSDOS_FS=m</div><div class='ctx'> CONFIG_VFAT_FS=m</div><div class='ctx'> CONFIG_FAT_DEFAULT_IOCHARSET="ascii"</div><div class='ctx'> CONFIG_TMPFS=y</div><div class='del'>-CONFIG_PARTITION_ADVANCED=y</div><div class='del'>-CONFIG_NLS=y</div><div class='add'>+CONFIG_JFFS2_FS=y</div><div class='ctx'> CONFIG_NLS_DEFAULT="utf8"</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ASCII=m</div><div class='hunk'>@@ -48,6 +84,4 @@ CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_SPINLOCK=y</div><div class='del'>-CONFIG_DEBUG_SPINLOCK_SLEEP=y</div><div class='ctx'> CONFIG_DEBUG_INFO=y</div><div class='del'>-# CONFIG_CRC32 is not set</div><div class='head'>diff --git a/arch/arm/configs/spear6xx_defconfig b/arch/arm/configs/spear6xx_defconfig<br/>index cef2e836afd2..a2a1265f86b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/spear6xx_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/spear6xx_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/spear6xx_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/spear6xx_defconfig</a></div><div class='hunk'>@@ -2,29 +2,60 @@ CONFIG_EXPERIMENTAL=y</div><div class='ctx'> CONFIG_SYSVIPC=y</div><div class='ctx'> CONFIG_BSD_PROCESS_ACCT=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='del'>-CONFIG_KALLSYMS_EXTRA_PASS=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> CONFIG_MODVERSIONS=y</div><div class='add'>+CONFIG_PARTITION_ADVANCED=y</div><div class='ctx'> CONFIG_PLAT_SPEAR=y</div><div class='ctx'> CONFIG_ARCH_SPEAR6XX=y</div><div class='del'>-CONFIG_BOARD_SPEAR600_EVB=y</div><div class='ctx'> CONFIG_BINFMT_MISC=y</div><div class='add'>+CONFIG_NET=y</div><div class='ctx'> CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='add'>+CONFIG_MTD=y</div><div class='add'>+CONFIG_MTD_OF_PARTS=y</div><div class='add'>+CONFIG_MTD_CHAR=y</div><div class='add'>+CONFIG_MTD_BLOCK=y</div><div class='add'>+CONFIG_MTD_NAND=y</div><div class='add'>+CONFIG_MTD_NAND_FSMC=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM=y</div><div class='ctx'> CONFIG_BLK_DEV_RAM_SIZE=16384</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CIRRUS is not set</div><div class='add'>+# CONFIG_NET_VENDOR_FARADAY is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SMSC is not set</div><div class='add'>+CONFIG_STMMAC_ETH=y</div><div class='add'>+# CONFIG_WLAN is not set</div><div class='ctx'> CONFIG_INPUT_FF_MEMLESS=y</div><div class='ctx'> # CONFIG_INPUT_MOUSEDEV_PSAUX is not set</div><div class='add'>+# CONFIG_INPUT_KEYBOARD is not set</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='ctx'> CONFIG_SERIAL_AMBA_PL011=y</div><div class='ctx'> CONFIG_SERIAL_AMBA_PL011_CONSOLE=y</div><div class='del'>-# CONFIG_LEGACY_PTYS is not set</div><div class='ctx'> CONFIG_RAW_DRIVER=y</div><div class='ctx'> CONFIG_MAX_RAW_DEVS=8192</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_I2C_DESIGNWARE_PLATFORM=y</div><div class='add'>+CONFIG_SPI=y</div><div class='add'>+CONFIG_SPI_PL022=y</div><div class='ctx'> CONFIG_GPIO_SYSFS=y</div><div class='ctx'> CONFIG_GPIO_PL061=y</div><div class='ctx'> # CONFIG_HWMON is not set</div><div class='add'>+CONFIG_WATCHDOG=y</div><div class='add'>+CONFIG_ARM_SP805_WATCHDOG=y</div><div class='ctx'> # CONFIG_HID_SUPPORT is not set</div><div class='del'>-# CONFIG_USB_SUPPORT is not set</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+CONFIG_USB_EHCI_HCD=y</div><div class='add'>+CONFIG_USB_OHCI_HCD=y</div><div class='add'>+CONFIG_RTC_CLASS=y</div><div class='add'>+CONFIG_DMADEVICES=y</div><div class='add'>+CONFIG_AMBA_PL08X=y</div><div class='add'>+CONFIG_DMATEST=m</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_EXT2_FS_XATTR=y</div><div class='ctx'> CONFIG_EXT2_FS_SECURITY=y</div><div class='hunk'>@@ -35,8 +66,7 @@ CONFIG_MSDOS_FS=m</div><div class='ctx'> CONFIG_VFAT_FS=m</div><div class='ctx'> CONFIG_FAT_DEFAULT_IOCHARSET="ascii"</div><div class='ctx'> CONFIG_TMPFS=y</div><div class='del'>-CONFIG_PARTITION_ADVANCED=y</div><div class='del'>-CONFIG_NLS=y</div><div class='add'>+CONFIG_JFFS2_FS=y</div><div class='ctx'> CONFIG_NLS_DEFAULT="utf8"</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ASCII=m</div><div class='hunk'>@@ -44,6 +74,4 @@ CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_SPINLOCK=y</div><div class='del'>-CONFIG_DEBUG_SPINLOCK_SLEEP=y</div><div class='ctx'> CONFIG_DEBUG_INFO=y</div><div class='del'>-# CONFIG_CRC32 is not set</div><div class='head'>diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig<br/>index 351d6708c3ae..1198dd61c7c4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/tegra_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/tegra_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/tegra_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/tegra_defconfig</a></div><div class='hunk'>@@ -45,6 +45,7 @@ CONFIG_CPU_FREQ=y</div><div class='ctx'> CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y</div><div class='ctx'> CONFIG_CPU_IDLE=y</div><div class='ctx'> CONFIG_VFP=y</div><div class='add'>+CONFIG_PM_RUNTIME=y</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='ctx'> CONFIG_UNIX=y</div><div class='hunk'>@@ -91,6 +92,8 @@ CONFIG_USB_NET_SMSC75XX=y</div><div class='ctx'> CONFIG_USB_NET_SMSC95XX=y</div><div class='ctx'> # CONFIG_WLAN is not set</div><div class='ctx'> CONFIG_INPUT_EVDEV=y</div><div class='add'>+CONFIG_INPUT_MISC=y</div><div class='add'>+CONFIG_INPUT_MPU3050=y</div><div class='ctx'> # CONFIG_VT is not set</div><div class='ctx'> # CONFIG_LEGACY_PTYS is not set</div><div class='ctx'> # CONFIG_DEVKMEM is not set</div><div class='hunk'>@@ -103,12 +106,15 @@ CONFIG_I2C=y</div><div class='ctx'> CONFIG_I2C_TEGRA=y</div><div class='ctx'> CONFIG_SPI=y</div><div class='ctx'> CONFIG_SPI_TEGRA=y</div><div class='add'>+CONFIG_POWER_SUPPLY=y</div><div class='add'>+CONFIG_BATTERY_SBS=y</div><div class='ctx'> CONFIG_SENSORS_LM90=y</div><div class='ctx'> CONFIG_MFD_TPS6586X=y</div><div class='ctx'> CONFIG_REGULATOR=y</div><div class='ctx'> CONFIG_REGULATOR_FIXED_VOLTAGE=y</div><div class='ctx'> CONFIG_REGULATOR_VIRTUAL_CONSUMER=y</div><div class='ctx'> CONFIG_REGULATOR_GPIO=y</div><div class='add'>+CONFIG_REGULATOR_TPS62360=y</div><div class='ctx'> CONFIG_REGULATOR_TPS6586X=y</div><div class='ctx'> CONFIG_SOUND=y</div><div class='ctx'> CONFIG_SND=y</div><div class='hunk'>@@ -133,16 +139,19 @@ CONFIG_MMC_SDHCI=y</div><div class='ctx'> CONFIG_MMC_SDHCI_PLTFM=y</div><div class='ctx'> CONFIG_MMC_SDHCI_TEGRA=y</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='add'>+CONFIG_RTC_DRV_EM3027=y</div><div class='ctx'> CONFIG_RTC_DRV_TEGRA=y</div><div class='ctx'> CONFIG_STAGING=y</div><div class='del'>-CONFIG_IIO=y</div><div class='ctx'> CONFIG_SENSORS_ISL29018=y</div><div class='add'>+CONFIG_SENSORS_ISL29028=y</div><div class='ctx'> CONFIG_SENSORS_AK8975=y</div><div class='ctx'> CONFIG_MFD_NVEC=y</div><div class='ctx'> CONFIG_KEYBOARD_NVEC=y</div><div class='ctx'> CONFIG_SERIO_NVEC_PS2=y</div><div class='ctx'> CONFIG_TEGRA_IOMMU_GART=y</div><div class='ctx'> CONFIG_TEGRA_IOMMU_SMMU=y</div><div class='add'>+CONFIG_MEMORY=y</div><div class='add'>+CONFIG_IIO=y</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='ctx'> CONFIG_EXT2_FS_XATTR=y</div><div class='ctx'> CONFIG_EXT2_FS_POSIX_ACL=y</div><div class='head'>diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig<br/>index 7e84f453e8a6..2d4f661d1cf6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/configs/u8500_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/configs/u8500_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/configs/u8500_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/configs/u8500_defconfig</a></div><div class='hunk'>@@ -75,6 +75,7 @@ CONFIG_AB5500_CORE=y</div><div class='ctx'> CONFIG_AB8500_CORE=y</div><div class='ctx'> CONFIG_REGULATOR=y</div><div class='ctx'> CONFIG_REGULATOR_AB8500=y</div><div class='add'>+CONFIG_REGULATOR_FIXED_VOLTAGE=y</div><div class='ctx'> # CONFIG_HID_SUPPORT is not set</div><div class='ctx'> CONFIG_USB_GADGET=y</div><div class='ctx'> CONFIG_AB8500_USB=y</div><div class='head'>diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h<br/>new file mode 100644<br/>index 000000000000..ed2e95d46e29<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/arch_timer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/arch_timer.h</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+#ifndef __ASMARM_ARCH_TIMER_H</div><div class='add'>+#define __ASMARM_ARCH_TIMER_H</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARM_ARCH_TIMER</div><div class='add'>+int arch_timer_of_register(void);</div><div class='add'>+int arch_timer_sched_clock_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int arch_timer_of_register(void)</div><div class='add'>+{</div><div class='add'>+	return -ENXIO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int arch_timer_sched_clock_init(void)</div><div class='add'>+{</div><div class='add'>+	return -ENXIO;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h<br/>index d5d8d5c72682..004c1bc95d2b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/cacheflush.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/cacheflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/cacheflush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -101,7 +101,7 @@ struct cpu_cache_fns {</div><div class='ctx'> 	void (*flush_user_range)(unsigned long, unsigned long, unsigned int);</div><div class='ctx'> </div><div class='ctx'> 	void (*coherent_kern_range)(unsigned long, unsigned long);</div><div class='del'>-	void (*coherent_user_range)(unsigned long, unsigned long);</div><div class='add'>+	int  (*coherent_user_range)(unsigned long, unsigned long);</div><div class='ctx'> 	void (*flush_kern_dcache_area)(void *, size_t);</div><div class='ctx'> </div><div class='ctx'> 	void (*dma_map_area)(const void *, size_t, int);</div><div class='hunk'>@@ -142,7 +142,7 @@ extern void __cpuc_flush_kern_all(void);</div><div class='ctx'> extern void __cpuc_flush_user_all(void);</div><div class='ctx'> extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int);</div><div class='ctx'> extern void __cpuc_coherent_kern_range(unsigned long, unsigned long);</div><div class='del'>-extern void __cpuc_coherent_user_range(unsigned long, unsigned long);</div><div class='add'>+extern int  __cpuc_coherent_user_range(unsigned long, unsigned long);</div><div class='ctx'> extern void __cpuc_flush_dcache_area(void *, size_t);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -249,7 +249,7 @@ extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr</div><div class='ctx'>  * Harvard caches are synchronised for the user space address range.</div><div class='ctx'>  * This is used for the ARM private sys_cacheflush system call.</div><div class='ctx'>  */</div><div class='del'>-#define flush_cache_user_range(vma,start,end) \</div><div class='add'>+#define flush_cache_user_range(start,end) \</div><div class='ctx'> 	__cpuc_coherent_user_range((start) &amp; PAGE_MASK, PAGE_ALIGN(end))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h<br/>index d41d7cbf0ada..7eb18c1d8d6c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/cmpxchg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/cmpxchg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -229,66 +229,19 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr,</div><div class='ctx'> 				       (unsigned long)(n),		\</div><div class='ctx'> 				       sizeof(*(ptr))))</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_CPU_V6	/* min ARCH &gt;= ARMv6K */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Note : ARMv7-M (currently unsupported by Linux) does not support</div><div class='del'>- * ldrexd/strexd. If ARMv7-M is ever supported by the Linux kernel, it should</div><div class='del'>- * not be allowed to use __cmpxchg64.</div><div class='del'>- */</div><div class='del'>-static inline unsigned long long __cmpxchg64(volatile void *ptr,</div><div class='del'>-					     unsigned long long old,</div><div class='del'>-					     unsigned long long new)</div><div class='del'>-{</div><div class='del'>-	register unsigned long long oldval asm("r0");</div><div class='del'>-	register unsigned long long __old asm("r2") = old;</div><div class='del'>-	register unsigned long long __new asm("r4") = new;</div><div class='del'>-	unsigned long res;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		asm volatile(</div><div class='del'>-		"	@ __cmpxchg8\n"</div><div class='del'>-		"	ldrexd	%1, %H1, [%2]\n"</div><div class='del'>-		"	mov	%0, #0\n"</div><div class='del'>-		"	teq	%1, %3\n"</div><div class='del'>-		"	teqeq	%H1, %H3\n"</div><div class='del'>-		"	strexdeq %0, %4, %H4, [%2]\n"</div><div class='del'>-			: "=&amp;r" (res), "=&amp;r" (oldval)</div><div class='del'>-			: "r" (ptr), "Ir" (__old), "r" (__new)</div><div class='del'>-			: "memory", "cc");</div><div class='del'>-	} while (res);</div><div class='del'>-</div><div class='del'>-	return oldval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned long long __cmpxchg64_mb(volatile void *ptr,</div><div class='del'>-						unsigned long long old,</div><div class='del'>-						unsigned long long new)</div><div class='del'>-{</div><div class='del'>-	unsigned long long ret;</div><div class='del'>-</div><div class='del'>-	smp_mb();</div><div class='del'>-	ret = __cmpxchg64(ptr, old, new);</div><div class='del'>-	smp_mb();</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define cmpxchg64(ptr,o,n)						\</div><div class='del'>-	((__typeof__(*(ptr)))__cmpxchg64_mb((ptr),			\</div><div class='del'>-					    (unsigned long long)(o),	\</div><div class='del'>-					    (unsigned long long)(n)))</div><div class='del'>-</div><div class='del'>-#define cmpxchg64_local(ptr,o,n)					\</div><div class='del'>-	((__typeof__(*(ptr)))__cmpxchg64((ptr),				\</div><div class='del'>-					 (unsigned long long)(o),	\</div><div class='del'>-					 (unsigned long long)(n)))</div><div class='del'>-</div><div class='del'>-#else /* min ARCH = ARMv6 */</div><div class='del'>-</div><div class='del'>-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))</div><div class='del'>-</div><div class='del'>-#endif</div><div class='add'>+#define cmpxchg64(ptr, o, n)						\</div><div class='add'>+	((__typeof__(*(ptr)))atomic64_cmpxchg(container_of((ptr),	\</div><div class='add'>+						atomic64_t,		\</div><div class='add'>+						counter),		\</div><div class='add'>+					      (unsigned long)(o),	\</div><div class='add'>+					      (unsigned long)(n)))</div><div class='add'>+</div><div class='add'>+#define cmpxchg64_local(ptr, o, n)					\</div><div class='add'>+	((__typeof__(*(ptr)))local64_cmpxchg(container_of((ptr),	\</div><div class='add'>+						local64_t,		\</div><div class='add'>+						a),			\</div><div class='add'>+					     (unsigned long)(o),	\</div><div class='add'>+					     (unsigned long)(n)))</div><div class='ctx'> </div><div class='ctx'> #endif	/* __LINUX_ARM_ARCH__ &gt;= 6 */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/include/asm/cpu.h b/arch/arm/include/asm/cpu.h<br/>index 793968173bef..d797223b39d5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/cpu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/cpu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/cpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/cpu.h</a></div><div class='hunk'>@@ -16,7 +16,6 @@</div><div class='ctx'> struct cpuinfo_arm {</div><div class='ctx'> 	struct cpu	cpu;</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-	struct task_struct *idle;</div><div class='ctx'> 	unsigned int	loops_per_jiffy;</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/include/asm/device.h b/arch/arm/include/asm/device.h<br/>index 7aa368003b05..b69c0d3285f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/device.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/device.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/device.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/device.h</a></div><div class='hunk'>@@ -7,12 +7,16 @@</div><div class='ctx'> #define ASMARM_DEVICE_H</div><div class='ctx'> </div><div class='ctx'> struct dev_archdata {</div><div class='add'>+	struct dma_map_ops	*dma_ops;</div><div class='ctx'> #ifdef CONFIG_DMABOUNCE</div><div class='ctx'> 	struct dmabounce_device_info *dmabounce;</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_IOMMU_API</div><div class='ctx'> 	void *iommu; /* private IOMMU data */</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_ARM_DMA_USE_IOMMU</div><div class='add'>+	struct dma_iommu_mapping	*mapping;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct omap_device;</div><div class='head'>diff --git a/arch/arm/include/asm/dma-contiguous.h b/arch/arm/include/asm/dma-contiguous.h<br/>new file mode 100644<br/>index 000000000000..3ed37b4d93da<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/dma-contiguous.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/dma-contiguous.h</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+#ifndef ASMARM_DMA_CONTIGUOUS_H</div><div class='add'>+#define ASMARM_DMA_CONTIGUOUS_H</div><div class='add'>+</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+#ifdef CONFIG_CMA</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm-generic/dma-contiguous.h&gt;</div><div class='add'>+</div><div class='add'>+void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/include/asm/dma-iommu.h b/arch/arm/include/asm/dma-iommu.h<br/>new file mode 100644<br/>index 000000000000..799b09409fad<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/dma-iommu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/dma-iommu.h</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+#ifndef ASMARM_DMA_IOMMU_H</div><div class='add'>+#define ASMARM_DMA_IOMMU_H</div><div class='add'>+</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mm_types.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/dma-debug.h&gt;</div><div class='add'>+#include &lt;linux/kmemcheck.h&gt;</div><div class='add'>+</div><div class='add'>+struct dma_iommu_mapping {</div><div class='add'>+	/* iommu specific data */</div><div class='add'>+	struct iommu_domain	*domain;</div><div class='add'>+</div><div class='add'>+	void			*bitmap;</div><div class='add'>+	size_t			bits;</div><div class='add'>+	unsigned int		order;</div><div class='add'>+	dma_addr_t		base;</div><div class='add'>+</div><div class='add'>+	spinlock_t		lock;</div><div class='add'>+	struct kref		kref;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dma_iommu_mapping *</div><div class='add'>+arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,</div><div class='add'>+			 int order);</div><div class='add'>+</div><div class='add'>+void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping);</div><div class='add'>+</div><div class='add'>+int arm_iommu_attach_device(struct device *dev,</div><div class='add'>+					struct dma_iommu_mapping *mapping);</div><div class='add'>+</div><div class='add'>+#endif /* __KERNEL__ */</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h<br/>index cb3b7c981c4b..bbef15d04890 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/dma-mapping.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/dma-mapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -5,11 +5,35 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm_types.h&gt;</div><div class='ctx'> #include &lt;linux/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/dma-attrs.h&gt;</div><div class='ctx'> #include &lt;linux/dma-debug.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/dma-coherent.h&gt;</div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='ctx'> </div><div class='add'>+#define DMA_ERROR_CODE	(~0)</div><div class='add'>+extern struct dma_map_ops arm_dma_ops;</div><div class='add'>+</div><div class='add'>+static inline struct dma_map_ops *get_dma_ops(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	if (dev &amp;&amp; dev-&gt;archdata.dma_ops)</div><div class='add'>+		return dev-&gt;archdata.dma_ops;</div><div class='add'>+	return &amp;arm_dma_ops;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)</div><div class='add'>+{</div><div class='add'>+	BUG_ON(!dev);</div><div class='add'>+	dev-&gt;archdata.dma_ops = ops;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/dma-mapping-common.h&gt;</div><div class='add'>+</div><div class='add'>+static inline int dma_set_mask(struct device *dev, u64 mask)</div><div class='add'>+{</div><div class='add'>+	return get_dma_ops(dev)-&gt;set_dma_mask(dev, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef __arch_page_to_dma</div><div class='ctx'> #error Please update to __arch_pfn_to_dma</div><div class='ctx'> #endif</div><div class='hunk'>@@ -62,68 +86,11 @@ static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * The DMA API is built upon the notion of "buffer ownership".  A buffer</div><div class='del'>- * is either exclusively owned by the CPU (and therefore may be accessed</div><div class='del'>- * by it) or exclusively owned by the DMA device.  These helper functions</div><div class='del'>- * represent the transitions between these two ownership states.</div><div class='del'>- *</div><div class='del'>- * Note, however, that on later ARMs, this notion does not work due to</div><div class='del'>- * speculative prefetches.  We model our approach on the assumption that</div><div class='del'>- * the CPU does do speculative prefetches, which means we clean caches</div><div class='del'>- * before transfers and delay cache invalidation until transfer completion.</div><div class='del'>- *</div><div class='del'>- * Private support functions: these are not part of the API and are</div><div class='del'>- * liable to change.  Drivers must not use these.</div><div class='del'>- */</div><div class='del'>-static inline void __dma_single_cpu_to_dev(const void *kaddr, size_t size,</div><div class='del'>-	enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	extern void ___dma_single_cpu_to_dev(const void *, size_t,</div><div class='del'>-		enum dma_data_direction);</div><div class='del'>-</div><div class='del'>-	if (!arch_is_coherent())</div><div class='del'>-		___dma_single_cpu_to_dev(kaddr, size, dir);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __dma_single_dev_to_cpu(const void *kaddr, size_t size,</div><div class='del'>-	enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	extern void ___dma_single_dev_to_cpu(const void *, size_t,</div><div class='del'>-		enum dma_data_direction);</div><div class='del'>-</div><div class='del'>-	if (!arch_is_coherent())</div><div class='del'>-		___dma_single_dev_to_cpu(kaddr, size, dir);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __dma_page_cpu_to_dev(struct page *page, unsigned long off,</div><div class='del'>-	size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	extern void ___dma_page_cpu_to_dev(struct page *, unsigned long,</div><div class='del'>-		size_t, enum dma_data_direction);</div><div class='del'>-</div><div class='del'>-	if (!arch_is_coherent())</div><div class='del'>-		___dma_page_cpu_to_dev(page, off, size, dir);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __dma_page_dev_to_cpu(struct page *page, unsigned long off,</div><div class='del'>-	size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	extern void ___dma_page_dev_to_cpu(struct page *, unsigned long,</div><div class='del'>-		size_t, enum dma_data_direction);</div><div class='del'>-</div><div class='del'>-	if (!arch_is_coherent())</div><div class='del'>-		___dma_page_dev_to_cpu(page, off, size, dir);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-extern int dma_supported(struct device *, u64);</div><div class='del'>-extern int dma_set_mask(struct device *, u64);</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * DMA errors are defined by all-bits-set in the DMA address.</div><div class='ctx'>  */</div><div class='ctx'> static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)</div><div class='ctx'> {</div><div class='del'>-	return dma_addr == ~0;</div><div class='add'>+	return dma_addr == DMA_ERROR_CODE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -141,69 +108,118 @@ static inline void dma_free_noncoherent(struct device *dev, size_t size,</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+extern int dma_supported(struct device *dev, u64 mask);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='del'>- * dma_alloc_coherent - allocate consistent memory for DMA</div><div class='add'>+ * arm_dma_alloc - allocate consistent memory for DMA</div><div class='ctx'>  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='ctx'>  * @size: required memory size</div><div class='ctx'>  * @handle: bus-specific DMA address</div><div class='add'>+ * @attrs: optinal attributes that specific mapping properties</div><div class='ctx'>  *</div><div class='del'>- * Allocate some uncached, unbuffered memory for a device for</div><div class='del'>- * performing DMA.  This function allocates pages, and will</div><div class='del'>- * return the CPU-viewed address, and sets @handle to be the</div><div class='del'>- * device-viewed address.</div><div class='add'>+ * Allocate some memory for a device for performing DMA.  This function</div><div class='add'>+ * allocates pages, and will return the CPU-viewed address, and sets @handle</div><div class='add'>+ * to be the device-viewed address.</div><div class='ctx'>  */</div><div class='del'>-extern void *dma_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);</div><div class='add'>+extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,</div><div class='add'>+			   gfp_t gfp, struct dma_attrs *attrs);</div><div class='add'>+</div><div class='add'>+#define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)</div><div class='add'>+</div><div class='add'>+static inline void *dma_alloc_attrs(struct device *dev, size_t size,</div><div class='add'>+				       dma_addr_t *dma_handle, gfp_t flag,</div><div class='add'>+				       struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='add'>+	void *cpu_addr;</div><div class='add'>+	BUG_ON(!ops);</div><div class='add'>+</div><div class='add'>+	cpu_addr = ops-&gt;alloc(dev, size, dma_handle, flag, attrs);</div><div class='add'>+	debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);</div><div class='add'>+	return cpu_addr;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * dma_free_coherent - free memory allocated by dma_alloc_coherent</div><div class='add'>+ * arm_dma_free - free memory allocated by arm_dma_alloc</div><div class='ctx'>  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='ctx'>  * @size: size of memory originally requested in dma_alloc_coherent</div><div class='ctx'>  * @cpu_addr: CPU-view address returned from dma_alloc_coherent</div><div class='ctx'>  * @handle: device-view address returned from dma_alloc_coherent</div><div class='add'>+ * @attrs: optinal attributes that specific mapping properties</div><div class='ctx'>  *</div><div class='ctx'>  * Free (and unmap) a DMA buffer previously allocated by</div><div class='del'>- * dma_alloc_coherent().</div><div class='add'>+ * arm_dma_alloc().</div><div class='ctx'>  *</div><div class='ctx'>  * References to memory and mappings associated with cpu_addr/handle</div><div class='ctx'>  * during and after this call executing are illegal.</div><div class='ctx'>  */</div><div class='del'>-extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);</div><div class='add'>+extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,</div><div class='add'>+			 dma_addr_t handle, struct dma_attrs *attrs);</div><div class='add'>+</div><div class='add'>+#define dma_free_coherent(d, s, c, h) dma_free_attrs(d, s, c, h, NULL)</div><div class='add'>+</div><div class='add'>+static inline void dma_free_attrs(struct device *dev, size_t size,</div><div class='add'>+				     void *cpu_addr, dma_addr_t dma_handle,</div><div class='add'>+				     struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='add'>+	BUG_ON(!ops);</div><div class='add'>+</div><div class='add'>+	debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);</div><div class='add'>+	ops-&gt;free(dev, size, cpu_addr, dma_handle, attrs);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * dma_mmap_coherent - map a coherent DMA allocation into user space</div><div class='add'>+ * arm_dma_mmap - map a coherent DMA allocation into user space</div><div class='ctx'>  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='ctx'>  * @vma: vm_area_struct describing requested user mapping</div><div class='ctx'>  * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent</div><div class='ctx'>  * @handle: device-view address returned from dma_alloc_coherent</div><div class='ctx'>  * @size: size of memory originally requested in dma_alloc_coherent</div><div class='add'>+ * @attrs: optinal attributes that specific mapping properties</div><div class='ctx'>  *</div><div class='ctx'>  * Map a coherent DMA buffer previously allocated by dma_alloc_coherent</div><div class='ctx'>  * into user space.  The coherent DMA buffer must not be freed by the</div><div class='ctx'>  * driver until the user space mapping has been released.</div><div class='ctx'>  */</div><div class='del'>-int dma_mmap_coherent(struct device *, struct vm_area_struct *,</div><div class='del'>-		void *, dma_addr_t, size_t);</div><div class='add'>+extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,</div><div class='add'>+			void *cpu_addr, dma_addr_t dma_addr, size_t size,</div><div class='add'>+			struct dma_attrs *attrs);</div><div class='ctx'> </div><div class='add'>+#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, NULL)</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * dma_alloc_writecombine - allocate writecombining memory for DMA</div><div class='del'>- * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='del'>- * @size: required memory size</div><div class='del'>- * @handle: bus-specific DMA address</div><div class='del'>- *</div><div class='del'>- * Allocate some uncached, buffered memory for a device for</div><div class='del'>- * performing DMA.  This function allocates pages, and will</div><div class='del'>- * return the CPU-viewed address, and sets @handle to be the</div><div class='del'>- * device-viewed address.</div><div class='del'>- */</div><div class='del'>-extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *,</div><div class='del'>-		gfp_t);</div><div class='add'>+static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,</div><div class='add'>+				  void *cpu_addr, dma_addr_t dma_addr,</div><div class='add'>+				  size_t size, struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='add'>+	BUG_ON(!ops);</div><div class='add'>+	return ops-&gt;mmap(dev, vma, cpu_addr, dma_addr, size, attrs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void *dma_alloc_writecombine(struct device *dev, size_t size,</div><div class='add'>+				       dma_addr_t *dma_handle, gfp_t flag)</div><div class='add'>+{</div><div class='add'>+	DEFINE_DMA_ATTRS(attrs);</div><div class='add'>+	dma_set_attr(DMA_ATTR_WRITE_COMBINE, &amp;attrs);</div><div class='add'>+	return dma_alloc_attrs(dev, size, dma_handle, flag, &amp;attrs);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#define dma_free_writecombine(dev,size,cpu_addr,handle) \</div><div class='del'>-	dma_free_coherent(dev,size,cpu_addr,handle)</div><div class='add'>+static inline void dma_free_writecombine(struct device *dev, size_t size,</div><div class='add'>+				     void *cpu_addr, dma_addr_t dma_handle)</div><div class='add'>+{</div><div class='add'>+	DEFINE_DMA_ATTRS(attrs);</div><div class='add'>+	dma_set_attr(DMA_ATTR_WRITE_COMBINE, &amp;attrs);</div><div class='add'>+	return dma_free_attrs(dev, size, cpu_addr, dma_handle, &amp;attrs);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-int dma_mmap_writecombine(struct device *, struct vm_area_struct *,</div><div class='del'>-		void *, dma_addr_t, size_t);</div><div class='add'>+static inline int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,</div><div class='add'>+		      void *cpu_addr, dma_addr_t dma_addr, size_t size)</div><div class='add'>+{</div><div class='add'>+	DEFINE_DMA_ATTRS(attrs);</div><div class='add'>+	dma_set_attr(DMA_ATTR_WRITE_COMBINE, &amp;attrs);</div><div class='add'>+	return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &amp;attrs);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This can be called during boot to increase the size of the consistent</div><div class='hunk'>@@ -212,8 +228,6 @@ int dma_mmap_writecombine(struct device *, struct vm_area_struct *,</div><div class='ctx'>  */</div><div class='ctx'> extern void __init init_consistent_dma_size(unsigned long size);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DMABOUNCE</div><div class='ctx'> /*</div><div class='ctx'>  * For SA-1111, IXP425, and ADI systems  the dma-mapping functions are "magic"</div><div class='ctx'>  * and utilize bounce buffers as needed to work around limited DMA windows.</div><div class='hunk'>@@ -253,222 +267,19 @@ extern int dmabounce_register_dev(struct device *, unsigned long,</div><div class='ctx'>  */</div><div class='ctx'> extern void dmabounce_unregister_dev(struct device *);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The DMA API, implemented by dmabounce.c.  See below for descriptions.</div><div class='del'>- */</div><div class='del'>-extern dma_addr_t __dma_map_page(struct device *, struct page *,</div><div class='del'>-		unsigned long, size_t, enum dma_data_direction);</div><div class='del'>-extern void __dma_unmap_page(struct device *, dma_addr_t, size_t,</div><div class='del'>-		enum dma_data_direction);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Private functions</div><div class='del'>- */</div><div class='del'>-int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,</div><div class='del'>-		size_t, enum dma_data_direction);</div><div class='del'>-int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,</div><div class='del'>-		size_t, enum dma_data_direction);</div><div class='del'>-#else</div><div class='del'>-static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr,</div><div class='del'>-	unsigned long offset, size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,</div><div class='del'>-	unsigned long offset, size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page,</div><div class='del'>-	     unsigned long offset, size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	__dma_page_cpu_to_dev(page, offset, size, dir);</div><div class='del'>-	return pfn_to_dma(dev, page_to_pfn(page)) + offset;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle,</div><div class='del'>-		size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	__dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),</div><div class='del'>-		handle &amp; ~PAGE_MASK, size, dir);</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_DMABOUNCE */</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * dma_map_single - map a single buffer for streaming DMA</div><div class='del'>- * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='del'>- * @cpu_addr: CPU direct mapped address of buffer</div><div class='del'>- * @size: size of buffer to map</div><div class='del'>- * @dir: DMA transfer direction</div><div class='del'>- *</div><div class='del'>- * Ensure that any data held in the cache is appropriately discarded</div><div class='del'>- * or written back.</div><div class='del'>- *</div><div class='del'>- * The device owns this memory once this call has completed.  The CPU</div><div class='del'>- * can regain ownership by calling dma_unmap_single() or</div><div class='del'>- * dma_sync_single_for_cpu().</div><div class='del'>- */</div><div class='del'>-static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,</div><div class='del'>-		size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	unsigned long offset;</div><div class='del'>-	struct page *page;</div><div class='del'>-	dma_addr_t addr;</div><div class='del'>-</div><div class='del'>-	BUG_ON(!virt_addr_valid(cpu_addr));</div><div class='del'>-	BUG_ON(!virt_addr_valid(cpu_addr + size - 1));</div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-</div><div class='del'>-	page = virt_to_page(cpu_addr);</div><div class='del'>-	offset = (unsigned long)cpu_addr &amp; ~PAGE_MASK;</div><div class='del'>-	addr = __dma_map_page(dev, page, offset, size, dir);</div><div class='del'>-	debug_dma_map_page(dev, page, offset, size, dir, addr, true);</div><div class='del'>-</div><div class='del'>-	return addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * dma_map_page - map a portion of a page for streaming DMA</div><div class='del'>- * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='del'>- * @page: page that buffer resides in</div><div class='del'>- * @offset: offset into page for start of buffer</div><div class='del'>- * @size: size of buffer to map</div><div class='del'>- * @dir: DMA transfer direction</div><div class='del'>- *</div><div class='del'>- * Ensure that any data held in the cache is appropriately discarded</div><div class='del'>- * or written back.</div><div class='del'>- *</div><div class='del'>- * The device owns this memory once this call has completed.  The CPU</div><div class='del'>- * can regain ownership by calling dma_unmap_page().</div><div class='del'>- */</div><div class='del'>-static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,</div><div class='del'>-	     unsigned long offset, size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	dma_addr_t addr;</div><div class='del'>-</div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-</div><div class='del'>-	addr = __dma_map_page(dev, page, offset, size, dir);</div><div class='del'>-	debug_dma_map_page(dev, page, offset, size, dir, addr, false);</div><div class='del'>-</div><div class='del'>-	return addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * dma_unmap_single - unmap a single buffer previously mapped</div><div class='del'>- * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='del'>- * @handle: DMA address of buffer</div><div class='del'>- * @size: size of buffer (same as passed to dma_map_single)</div><div class='del'>- * @dir: DMA transfer direction (same as passed to dma_map_single)</div><div class='del'>- *</div><div class='del'>- * Unmap a single streaming mode DMA translation.  The handle and size</div><div class='del'>- * must match what was provided in the previous dma_map_single() call.</div><div class='del'>- * All other usages are undefined.</div><div class='del'>- *</div><div class='del'>- * After this call, reads by the CPU to the buffer are guaranteed to see</div><div class='del'>- * whatever the device wrote there.</div><div class='del'>- */</div><div class='del'>-static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,</div><div class='del'>-		size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	debug_dma_unmap_page(dev, handle, size, dir, true);</div><div class='del'>-	__dma_unmap_page(dev, handle, size, dir);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()</div><div class='del'>- * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='del'>- * @handle: DMA address of buffer</div><div class='del'>- * @size: size of buffer (same as passed to dma_map_page)</div><div class='del'>- * @dir: DMA transfer direction (same as passed to dma_map_page)</div><div class='del'>- *</div><div class='del'>- * Unmap a page streaming mode DMA translation.  The handle and size</div><div class='del'>- * must match what was provided in the previous dma_map_page() call.</div><div class='del'>- * All other usages are undefined.</div><div class='del'>- *</div><div class='del'>- * After this call, reads by the CPU to the buffer are guaranteed to see</div><div class='del'>- * whatever the device wrote there.</div><div class='del'>- */</div><div class='del'>-static inline void dma_unmap_page(struct device *dev, dma_addr_t handle,</div><div class='del'>-		size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	debug_dma_unmap_page(dev, handle, size, dir, false);</div><div class='del'>-	__dma_unmap_page(dev, handle, size, dir);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * dma_sync_single_range_for_cpu</div><div class='del'>- * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='del'>- * @handle: DMA address of buffer</div><div class='del'>- * @offset: offset of region to start sync</div><div class='del'>- * @size: size of region to sync</div><div class='del'>- * @dir: DMA transfer direction (same as passed to dma_map_single)</div><div class='del'>- *</div><div class='del'>- * Make physical memory consistent for a single streaming mode DMA</div><div class='del'>- * translation after a transfer.</div><div class='del'>- *</div><div class='del'>- * If you perform a dma_map_single() but wish to interrogate the</div><div class='del'>- * buffer using the cpu, yet do not wish to teardown the PCI dma</div><div class='del'>- * mapping, you must call this function before doing so.  At the</div><div class='del'>- * next point you give the PCI dma address back to the card, you</div><div class='del'>- * must first the perform a dma_sync_for_device, and then the</div><div class='del'>- * device again owns the buffer.</div><div class='del'>- */</div><div class='del'>-static inline void dma_sync_single_range_for_cpu(struct device *dev,</div><div class='del'>-		dma_addr_t handle, unsigned long offset, size_t size,</div><div class='del'>-		enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-</div><div class='del'>-	debug_dma_sync_single_for_cpu(dev, handle + offset, size, dir);</div><div class='del'>-</div><div class='del'>-	if (!dmabounce_sync_for_cpu(dev, handle, offset, size, dir))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	__dma_single_dev_to_cpu(dma_to_virt(dev, handle) + offset, size, dir);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void dma_sync_single_range_for_device(struct device *dev,</div><div class='del'>-		dma_addr_t handle, unsigned long offset, size_t size,</div><div class='del'>-		enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-</div><div class='del'>-	debug_dma_sync_single_for_device(dev, handle + offset, size, dir);</div><div class='del'>-</div><div class='del'>-	if (!dmabounce_sync_for_device(dev, handle, offset, size, dir))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	__dma_single_cpu_to_dev(dma_to_virt(dev, handle) + offset, size, dir);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void dma_sync_single_for_cpu(struct device *dev,</div><div class='del'>-		dma_addr_t handle, size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	dma_sync_single_range_for_cpu(dev, handle, 0, size, dir);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void dma_sync_single_for_device(struct device *dev,</div><div class='del'>-		dma_addr_t handle, size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	dma_sync_single_range_for_device(dev, handle, 0, size, dir);</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The scatter list versions of the above methods.</div><div class='ctx'>  */</div><div class='del'>-extern int dma_map_sg(struct device *, struct scatterlist *, int,</div><div class='del'>-		enum dma_data_direction);</div><div class='del'>-extern void dma_unmap_sg(struct device *, struct scatterlist *, int,</div><div class='add'>+extern int arm_dma_map_sg(struct device *, struct scatterlist *, int,</div><div class='add'>+		enum dma_data_direction, struct dma_attrs *attrs);</div><div class='add'>+extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int,</div><div class='add'>+		enum dma_data_direction, struct dma_attrs *attrs);</div><div class='add'>+extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,</div><div class='ctx'> 		enum dma_data_direction);</div><div class='del'>-extern void dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,</div><div class='add'>+extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int,</div><div class='ctx'> 		enum dma_data_direction);</div><div class='del'>-extern void dma_sync_sg_for_device(struct device *, struct scatterlist *, int,</div><div class='del'>-		enum dma_data_direction);</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/include/asm/glue-df.h b/arch/arm/include/asm/glue-df.h<br/>index 354d571e8bcc..8cacbcda76da 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/glue-df.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/glue-df.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/glue-df.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/glue-df.h</a></div><div class='hunk'>@@ -31,14 +31,6 @@</div><div class='ctx'> #undef CPU_DABORT_HANDLER</div><div class='ctx'> #undef MULTI_DABORT</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_CPU_ARM610)</div><div class='del'>-# ifdef CPU_DABORT_HANDLER</div><div class='del'>-#  define MULTI_DABORT 1</div><div class='del'>-# else</div><div class='del'>-#  define CPU_DABORT_HANDLER cpu_arm6_data_abort</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_CPU_ARM710)</div><div class='ctx'> # ifdef CPU_DABORT_HANDLER</div><div class='ctx'> #  define MULTI_DABORT 1</div><div class='head'>diff --git a/arch/arm/include/asm/glue-proc.h b/arch/arm/include/asm/glue-proc.h<br/>index e2be7f142668..ac1dd54724b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/glue-proc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/glue-proc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/glue-proc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/glue-proc.h</a></div><div class='hunk'>@@ -23,15 +23,6 @@</div><div class='ctx'>  * CPU_NAME - the prefix for CPU related functions</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CPU_ARM610</div><div class='del'>-# ifdef CPU_NAME</div><div class='del'>-#  undef  MULTI_CPU</div><div class='del'>-#  define MULTI_CPU</div><div class='del'>-# else</div><div class='del'>-#  define CPU_NAME cpu_arm6</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_CPU_ARM7TDMI</div><div class='ctx'> # ifdef CPU_NAME</div><div class='ctx'> #  undef  MULTI_CPU</div><div class='hunk'>@@ -41,15 +32,6 @@</div><div class='ctx'> # endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CPU_ARM710</div><div class='del'>-# ifdef CPU_NAME</div><div class='del'>-#  undef  MULTI_CPU</div><div class='del'>-#  define MULTI_CPU</div><div class='del'>-# else</div><div class='del'>-#  define CPU_NAME cpu_arm7</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_CPU_ARM720T</div><div class='ctx'> # ifdef CPU_NAME</div><div class='ctx'> #  undef  MULTI_CPU</div><div class='head'>diff --git a/arch/arm/include/asm/hardware/cs89712.h b/arch/arm/include/asm/hardware/cs89712.h<br/>deleted file mode 100644<br/>index f75626933e94..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/hardware/cs89712.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/hardware/cs89712.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,49 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  arch/arm/include/asm/hardware/cs89712.h</div><div class='del'>- *</div><div class='del'>- *  This file contains the hardware definitions of the CS89712</div><div class='del'>- *  additional internal registers.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2001 Thomas Gleixner autronix automation &lt;gleixner@autronix.de&gt;</div><div class='del'>- *			</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- */</div><div class='del'>-#ifndef __ASM_HARDWARE_CS89712_H</div><div class='del'>-#define __ASM_HARDWARE_CS89712_H</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-*	CS89712 additional registers</div><div class='del'>-*/</div><div class='del'>-                                  </div><div class='del'>-#define PCDR			0x0002	/* Port C Data register ---------------------------- */</div><div class='del'>-#define PCDDR			0x0042	/* Port C Data Direction register ------------------ */</div><div class='del'>-#define SDCONF			0x2300  /* SDRAM Configuration register ---------------------*/</div><div class='del'>-#define SDRFPR			0x2340  /* SDRAM Refresh period register --------------------*/</div><div class='del'>-</div><div class='del'>-#define SDCONF_ACTIVE		(1 &lt;&lt; 10)</div><div class='del'>-#define SDCONF_CLKCTL		(1 &lt;&lt; 9)</div><div class='del'>-#define SDCONF_WIDTH_4		(0 &lt;&lt; 7)</div><div class='del'>-#define SDCONF_WIDTH_8		(1 &lt;&lt; 7)</div><div class='del'>-#define SDCONF_WIDTH_16		(2 &lt;&lt; 7)</div><div class='del'>-#define SDCONF_WIDTH_32		(3 &lt;&lt; 7)</div><div class='del'>-#define SDCONF_SIZE_16		(0 &lt;&lt; 5)</div><div class='del'>-#define SDCONF_SIZE_64		(1 &lt;&lt; 5)</div><div class='del'>-#define SDCONF_SIZE_128		(2 &lt;&lt; 5)</div><div class='del'>-#define SDCONF_SIZE_256		(3 &lt;&lt; 5)</div><div class='del'>-#define SDCONF_CASLAT_2		(2)</div><div class='del'>-#define SDCONF_CASLAT_3		(3)</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_HARDWARE_CS89712_H */</div><div class='head'>diff --git a/arch/arm/include/asm/hardware/ep7212.h b/arch/arm/include/asm/hardware/ep7212.h<br/>deleted file mode 100644<br/>index 3b43bbeaf1db..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/hardware/ep7212.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/hardware/ep7212.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,83 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  arch/arm/include/asm/hardware/ep7212.h</div><div class='del'>- *</div><div class='del'>- *  This file contains the hardware definitions of the EP7212 internal</div><div class='del'>- *  registers.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2000 Deep Blue Solutions Ltd.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- */</div><div class='del'>-#ifndef __ASM_HARDWARE_EP7212_H</div><div class='del'>-#define __ASM_HARDWARE_EP7212_H</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * define EP7212_BASE to be the base address of the region</div><div class='del'>- * you want to access.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define EP7212_PHYS_BASE	(0x80000000)</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-#define ep_readl(off)		__raw_readl(EP7212_BASE + (off))</div><div class='del'>-#define ep_writel(val,off)	__raw_writel(val, EP7212_BASE + (off))</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * These registers are specific to the EP7212 only</div><div class='del'>- */</div><div class='del'>-#define DAIR			0x2000</div><div class='del'>-#define DAIR0			0x2040</div><div class='del'>-#define DAIDR1			0x2080</div><div class='del'>-#define DAIDR2			0x20c0</div><div class='del'>-#define DAISR			0x2100</div><div class='del'>-#define SYSCON3			0x2200</div><div class='del'>-#define INTSR3			0x2240</div><div class='del'>-#define INTMR3			0x2280</div><div class='del'>-#define LEDFLSH			0x22c0</div><div class='del'>-</div><div class='del'>-#define DAIR_DAIEN		(1 &lt;&lt; 16)</div><div class='del'>-#define DAIR_ECS		(1 &lt;&lt; 17)</div><div class='del'>-#define DAIR_LCTM		(1 &lt;&lt; 19)</div><div class='del'>-#define DAIR_LCRM		(1 &lt;&lt; 20)</div><div class='del'>-#define DAIR_RCTM		(1 &lt;&lt; 21)</div><div class='del'>-#define DAIR_RCRM		(1 &lt;&lt; 22)</div><div class='del'>-#define DAIR_LBM		(1 &lt;&lt; 23)</div><div class='del'>-</div><div class='del'>-#define DAIDR2_FIFOEN		(1 &lt;&lt; 15)</div><div class='del'>-#define DAIDR2_FIFOLEFT		(0x0d &lt;&lt; 16)</div><div class='del'>-#define DAIDR2_FIFORIGHT	(0x11 &lt;&lt; 16)</div><div class='del'>-</div><div class='del'>-#define DAISR_RCTS		(1 &lt;&lt; 0)</div><div class='del'>-#define DAISR_RCRS		(1 &lt;&lt; 1)</div><div class='del'>-#define DAISR_LCTS		(1 &lt;&lt; 2)</div><div class='del'>-#define DAISR_LCRS		(1 &lt;&lt; 3)</div><div class='del'>-#define DAISR_RCTU		(1 &lt;&lt; 4)</div><div class='del'>-#define DAISR_RCRO		(1 &lt;&lt; 5)</div><div class='del'>-#define DAISR_LCTU		(1 &lt;&lt; 6)</div><div class='del'>-#define DAISR_LCRO		(1 &lt;&lt; 7)</div><div class='del'>-#define DAISR_RCNF		(1 &lt;&lt; 8)</div><div class='del'>-#define DAISR_RCNE		(1 &lt;&lt; 9)</div><div class='del'>-#define DAISR_LCNF		(1 &lt;&lt; 10)</div><div class='del'>-#define DAISR_LCNE		(1 &lt;&lt; 11)</div><div class='del'>-#define DAISR_FIFO		(1 &lt;&lt; 12)</div><div class='del'>-</div><div class='del'>-#define SYSCON3_ADCCON		(1 &lt;&lt; 0)</div><div class='del'>-#define SYSCON3_DAISEL		(1 &lt;&lt; 3)</div><div class='del'>-#define SYSCON3_ADCCKNSEN	(1 &lt;&lt; 4)</div><div class='del'>-#define SYSCON3_FASTWAKE	(1 &lt;&lt; 8)</div><div class='del'>-#define SYSCON3_DAIEN		(1 &lt;&lt; 9)</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_HARDWARE_EP7212_H */</div><div class='head'>diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h<br/>index 73f84fa4f366..d36a73d7c0e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/hardware/it8152.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/hardware/it8152.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/hardware/it8152.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/hardware/it8152.h</a></div><div class='hunk'>@@ -110,6 +110,6 @@ extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc);</div><div class='ctx'> extern void it8152_init_irq(void);</div><div class='ctx'> extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);</div><div class='ctx'> extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);</div><div class='del'>-extern struct pci_bus *it8152_pci_scan_bus(int nr, struct pci_sys_data *sys);</div><div class='add'>+extern struct pci_ops it8152_ops;</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_HARDWARE_IT8152_H */</div><div class='head'>diff --git a/arch/arm/include/asm/hardware/pl080.h b/arch/arm/include/asm/hardware/pl080.h<br/>index 33c78d7af2e1..4eea2107214b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/hardware/pl080.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/hardware/pl080.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/hardware/pl080.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/hardware/pl080.h</a></div><div class='hunk'>@@ -102,6 +102,8 @@</div><div class='ctx'> #define PL080_WIDTH_16BIT			(0x1)</div><div class='ctx'> #define PL080_WIDTH_32BIT			(0x2)</div><div class='ctx'> </div><div class='add'>+#define PL080N_CONFIG_ITPROT			(1 &lt;&lt; 20)</div><div class='add'>+#define PL080N_CONFIG_SECPROT			(1 &lt;&lt; 19)</div><div class='ctx'> #define PL080_CONFIG_HALT			(1 &lt;&lt; 18)</div><div class='ctx'> #define PL080_CONFIG_ACTIVE			(1 &lt;&lt; 17)  /* RO */</div><div class='ctx'> #define PL080_CONFIG_LOCK			(1 &lt;&lt; 16)</div><div class='head'>diff --git a/arch/arm/include/asm/hardware/uengine.h b/arch/arm/include/asm/hardware/uengine.h<br/>deleted file mode 100644<br/>index b442d65c6593..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/hardware/uengine.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/hardware/uengine.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,62 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Generic library functions for the microengines found on the Intel</div><div class='del'>- * IXP2000 series of network processors.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU Lesser General Public License as</div><div class='del'>- * published by the Free Software Foundation; either version 2.1 of the</div><div class='del'>- * License, or (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __IXP2000_UENGINE_H</div><div class='del'>-#define __IXP2000_UENGINE_H</div><div class='del'>-</div><div class='del'>-extern u32 ixp2000_uengine_mask;</div><div class='del'>-</div><div class='del'>-struct ixp2000_uengine_code</div><div class='del'>-{</div><div class='del'>-	u32	cpu_model_bitmask;</div><div class='del'>-	u8	cpu_min_revision;</div><div class='del'>-	u8	cpu_max_revision;</div><div class='del'>-</div><div class='del'>-	u32	uengine_parameters;</div><div class='del'>-</div><div class='del'>-	struct ixp2000_reg_value {</div><div class='del'>-		int	reg;</div><div class='del'>-		u32	value;</div><div class='del'>-	} *initial_reg_values;</div><div class='del'>-</div><div class='del'>-	int	num_insns;</div><div class='del'>-	u8	*insns;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-u32 ixp2000_uengine_csr_read(int uengine, int offset);</div><div class='del'>-void ixp2000_uengine_csr_write(int uengine, int offset, u32 value);</div><div class='del'>-void ixp2000_uengine_reset(u32 uengine_mask);</div><div class='del'>-void ixp2000_uengine_set_mode(int uengine, u32 mode);</div><div class='del'>-void ixp2000_uengine_load_microcode(int uengine, u8 *ucode, int insns);</div><div class='del'>-void ixp2000_uengine_init_context(int uengine, int context, int pc);</div><div class='del'>-void ixp2000_uengine_start_contexts(int uengine, u8 ctx_mask);</div><div class='del'>-void ixp2000_uengine_stop_contexts(int uengine, u8 ctx_mask);</div><div class='del'>-int ixp2000_uengine_load(int uengine, struct ixp2000_uengine_code *c);</div><div class='del'>-</div><div class='del'>-#define IXP2000_UENGINE_8_CONTEXTS		0x00000000</div><div class='del'>-#define IXP2000_UENGINE_4_CONTEXTS		0x80000000</div><div class='del'>-#define IXP2000_UENGINE_PRN_UPDATE_EVERY	0x40000000</div><div class='del'>-#define IXP2000_UENGINE_PRN_UPDATE_ON_ACCESS	0x00000000</div><div class='del'>-#define IXP2000_UENGINE_NN_FROM_SELF		0x00100000</div><div class='del'>-#define IXP2000_UENGINE_NN_FROM_PREVIOUS	0x00000000</div><div class='del'>-#define IXP2000_UENGINE_ASSERT_EMPTY_AT_3	0x000c0000</div><div class='del'>-#define IXP2000_UENGINE_ASSERT_EMPTY_AT_2	0x00080000</div><div class='del'>-#define IXP2000_UENGINE_ASSERT_EMPTY_AT_1	0x00040000</div><div class='del'>-#define IXP2000_UENGINE_ASSERT_EMPTY_AT_0	0x00000000</div><div class='del'>-#define IXP2000_UENGINE_LM_ADDR1_GLOBAL		0x00020000</div><div class='del'>-#define IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT	0x00000000</div><div class='del'>-#define IXP2000_UENGINE_LM_ADDR0_GLOBAL		0x00010000</div><div class='del'>-#define IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT	0x00000000</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h<br/>index 9af5563dd3eb..815c669fec0a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/io.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/io.h</a></div><div class='hunk'>@@ -47,9 +47,9 @@ extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);</div><div class='ctx'> extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);</div><div class='ctx'> extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);</div><div class='ctx'> </div><div class='del'>-#define __raw_writeb(v,a)	(__chk_io_ptr(a), *(volatile unsigned char __force  *)(a) = (v))</div><div class='del'>-#define __raw_writew(v,a)	(__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))</div><div class='del'>-#define __raw_writel(v,a)	(__chk_io_ptr(a), *(volatile unsigned int __force   *)(a) = (v))</div><div class='add'>+#define __raw_writeb(v,a)	((void)(__chk_io_ptr(a), *(volatile unsigned char __force  *)(a) = (v)))</div><div class='add'>+#define __raw_writew(v,a)	((void)(__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v)))</div><div class='add'>+#define __raw_writel(v,a)	((void)(__chk_io_ptr(a), *(volatile unsigned int __force   *)(a) = (v)))</div><div class='ctx'> </div><div class='ctx'> #define __raw_readb(a)		(__chk_io_ptr(a), *(volatile unsigned char __force  *)(a))</div><div class='ctx'> #define __raw_readw(a)		(__chk_io_ptr(a), *(volatile unsigned short __force *)(a))</div><div class='hunk'>@@ -229,11 +229,9 @@ extern void _memset_io(volatile void __iomem *, int, size_t);</div><div class='ctx'> #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \</div><div class='ctx'> 					__raw_readl(c)); __r; })</div><div class='ctx'> </div><div class='del'>-#define writeb_relaxed(v,c)	((void)__raw_writeb(v,c))</div><div class='del'>-#define writew_relaxed(v,c)	((void)__raw_writew((__force u16) \</div><div class='del'>-					cpu_to_le16(v),c))</div><div class='del'>-#define writel_relaxed(v,c)	((void)__raw_writel((__force u32) \</div><div class='del'>-					cpu_to_le32(v),c))</div><div class='add'>+#define writeb_relaxed(v,c)	__raw_writeb(v,c)</div><div class='add'>+#define writew_relaxed(v,c)	__raw_writew((__force u16) cpu_to_le16(v),c)</div><div class='add'>+#define writel_relaxed(v,c)	__raw_writel((__force u32) cpu_to_le32(v),c)</div><div class='ctx'> </div><div class='ctx'> #define readb(c)		({ u8  __v = readb_relaxed(c); __iormb(); __v; })</div><div class='ctx'> #define readw(c)		({ u16 __v = readw_relaxed(c); __iormb(); __v; })</div><div class='hunk'>@@ -281,12 +279,12 @@ extern void _memset_io(volatile void __iomem *, int, size_t);</div><div class='ctx'> #define ioread16be(p)	({ unsigned int __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })</div><div class='ctx'> #define ioread32be(p)	({ unsigned int __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })</div><div class='ctx'> </div><div class='del'>-#define iowrite8(v,p)	({ __iowmb(); (void)__raw_writeb(v, p); })</div><div class='del'>-#define iowrite16(v,p)	({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_le16(v), p); })</div><div class='del'>-#define iowrite32(v,p)	({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_le32(v), p); })</div><div class='add'>+#define iowrite8(v,p)	({ __iowmb(); __raw_writeb(v, p); })</div><div class='add'>+#define iowrite16(v,p)	({ __iowmb(); __raw_writew((__force __u16)cpu_to_le16(v), p); })</div><div class='add'>+#define iowrite32(v,p)	({ __iowmb(); __raw_writel((__force __u32)cpu_to_le32(v), p); })</div><div class='ctx'> </div><div class='del'>-#define iowrite16be(v,p) ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_be16(v), p); })</div><div class='del'>-#define iowrite32be(v,p) ({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_be32(v), p); })</div><div class='add'>+#define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); })</div><div class='add'>+#define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); })</div><div class='ctx'> </div><div class='ctx'> #define ioread8_rep(p,d,c)	__raw_readsb(p,d,c)</div><div class='ctx'> #define ioread16_rep(p,d,c)	__raw_readsw(p,d,c)</div><div class='head'>diff --git a/arch/arm/include/asm/kvm_para.h b/arch/arm/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h<br/>index d7692cafde7f..0b1c94b8c652 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/mach/arch.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/mach/arch.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/mach/arch.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/mach/arch.h</a></div><div class='hunk'>@@ -43,6 +43,7 @@ struct machine_desc {</div><div class='ctx'> 	void			(*init_irq)(void);</div><div class='ctx'> 	struct sys_timer	*timer;		/* system tick timer	*/</div><div class='ctx'> 	void			(*init_machine)(void);</div><div class='add'>+	void			(*init_late)(void);</div><div class='ctx'> #ifdef CONFIG_MULTI_IRQ_HANDLER</div><div class='ctx'> 	void			(*handle_irq)(struct pt_regs *);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h<br/>index b36f3654bf54..a6efcdd6fd25 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/mach/map.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/mach/map.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/mach/map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/mach/map.h</a></div><div class='hunk'>@@ -30,6 +30,7 @@ struct map_desc {</div><div class='ctx'> #define MT_MEMORY_DTCM		12</div><div class='ctx'> #define MT_MEMORY_ITCM		13</div><div class='ctx'> #define MT_MEMORY_SO		14</div><div class='add'>+#define MT_MEMORY_DMA_READY	15</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='ctx'> extern void iotable_init(struct map_desc *, int);</div><div class='head'>diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h<br/>index d943b7d20f11..26c511fddf8f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/mach/pci.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/mach/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/mach/pci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/mach/pci.h</a></div><div class='hunk'>@@ -12,13 +12,14 @@</div><div class='ctx'> #define __ASM_MACH_PCI_H</div><div class='ctx'> </div><div class='ctx'> struct pci_sys_data;</div><div class='add'>+struct pci_ops;</div><div class='ctx'> struct pci_bus;</div><div class='ctx'> </div><div class='ctx'> struct hw_pci {</div><div class='ctx'> #ifdef CONFIG_PCI_DOMAINS</div><div class='ctx'> 	int		domain;</div><div class='ctx'> #endif</div><div class='del'>-	struct list_head buses;</div><div class='add'>+	struct pci_ops	*ops;</div><div class='ctx'> 	int		nr_controllers;</div><div class='ctx'> 	int		(*setup)(int nr, struct pci_sys_data *);</div><div class='ctx'> 	struct pci_bus *(*scan)(int nr, struct pci_sys_data *);</div><div class='hunk'>@@ -45,16 +46,10 @@ struct pci_sys_data {</div><div class='ctx'> 	u8		(*swizzle)(struct pci_dev *, u8 *);</div><div class='ctx'> 					/* IRQ mapping				*/</div><div class='ctx'> 	int		(*map_irq)(const struct pci_dev *, u8, u8);</div><div class='del'>-	struct hw_pci	*hw;</div><div class='ctx'> 	void		*private_data;	/* platform controller private data	*/</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * This is the standard PCI-PCI bridge swizzling algorithm.</div><div class='del'>- */</div><div class='del'>-#define pci_std_swizzle pci_common_swizzle</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Call this with your hw_pci struct to initialise the PCI system.</div><div class='ctx'>  */</div><div class='ctx'> void pci_common_init(struct hw_pci *);</div><div class='hunk'>@@ -62,22 +57,22 @@ void pci_common_init(struct hw_pci *);</div><div class='ctx'> /*</div><div class='ctx'>  * PCI controllers</div><div class='ctx'>  */</div><div class='add'>+extern struct pci_ops iop3xx_ops;</div><div class='ctx'> extern int iop3xx_pci_setup(int nr, struct pci_sys_data *);</div><div class='del'>-extern struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *);</div><div class='ctx'> extern void iop3xx_pci_preinit(void);</div><div class='ctx'> extern void iop3xx_pci_preinit_cond(void);</div><div class='ctx'> </div><div class='add'>+extern struct pci_ops dc21285_ops;</div><div class='ctx'> extern int dc21285_setup(int nr, struct pci_sys_data *);</div><div class='del'>-extern struct pci_bus *dc21285_scan_bus(int nr, struct pci_sys_data *);</div><div class='ctx'> extern void dc21285_preinit(void);</div><div class='ctx'> extern void dc21285_postinit(void);</div><div class='ctx'> </div><div class='add'>+extern struct pci_ops via82c505_ops;</div><div class='ctx'> extern int via82c505_setup(int nr, struct pci_sys_data *);</div><div class='del'>-extern struct pci_bus *via82c505_scan_bus(int nr, struct pci_sys_data *);</div><div class='ctx'> extern void via82c505_init(void *sysdata);</div><div class='ctx'> </div><div class='add'>+extern struct pci_ops pci_v3_ops;</div><div class='ctx'> extern int pci_v3_setup(int nr, struct pci_sys_data *);</div><div class='del'>-extern struct pci_bus *pci_v3_scan_bus(int nr, struct pci_sys_data *);</div><div class='ctx'> extern void pci_v3_preinit(void);</div><div class='ctx'> extern void pci_v3_postinit(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/include/asm/mach/time.h b/arch/arm/include/asm/mach/time.h<br/>index f73c908b7fa0..6ca945f534ab 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/mach/time.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/mach/time.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/mach/time.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/mach/time.h</a></div><div class='hunk'>@@ -42,4 +42,9 @@ struct sys_timer {</div><div class='ctx'> </div><div class='ctx'> extern void timer_tick(void);</div><div class='ctx'> </div><div class='add'>+struct timespec;</div><div class='add'>+typedef void (*clock_access_fn)(struct timespec *);</div><div class='add'>+extern int register_persistent_clock(clock_access_fn read_boot,</div><div class='add'>+				     clock_access_fn read_persistent);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h<br/>index b8e580a297e4..14965658a923 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/mmu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/mmu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/mmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/mmu.h</a></div><div class='hunk'>@@ -34,11 +34,4 @@ typedef struct {</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * switch_mm() may do a full cache flush over the context switch,</div><div class='del'>- * so enable interrupts over the context switch to avoid high</div><div class='del'>- * latency.</div><div class='del'>- */</div><div class='del'>-#define __ARCH_WANT_INTERRUPTS_ON_CTXSW</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h<br/>index a0b3cac0547c..0306bc642c0d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/mmu_context.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/mmu_context.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/mmu_context.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -43,45 +43,104 @@ void __check_kvm_seq(struct mm_struct *mm);</div><div class='ctx'> #define ASID_FIRST_VERSION	(1 &lt;&lt; ASID_BITS)</div><div class='ctx'> </div><div class='ctx'> extern unsigned int cpu_last_asid;</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-DECLARE_PER_CPU(struct mm_struct *, current_mm);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> void __init_new_context(struct task_struct *tsk, struct mm_struct *mm);</div><div class='ctx'> void __new_context(struct mm_struct *mm);</div><div class='add'>+void cpu_set_reserved_ttbr0(void);</div><div class='ctx'> </div><div class='del'>-static inline void check_context(struct mm_struct *mm)</div><div class='add'>+static inline void switch_new_context(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * This code is executed with interrupts enabled. Therefore,</div><div class='del'>-	 * mm-&gt;context.id cannot be updated to the latest ASID version</div><div class='del'>-	 * on a different CPU (and condition below not triggered)</div><div class='del'>-	 * without first getting an IPI to reset the context. The</div><div class='del'>-	 * alternative is to take a read_lock on mm-&gt;context.id_lock</div><div class='del'>-	 * (after changing its type to rwlock_t).</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely((mm-&gt;context.id ^ cpu_last_asid) &gt;&gt; ASID_BITS))</div><div class='del'>-		__new_context(mm);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	__new_context(mm);</div><div class='add'>+</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+	cpu_switch_mm(mm-&gt;pgd, mm);</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+static inline void check_and_switch_context(struct mm_struct *mm,</div><div class='add'>+					    struct task_struct *tsk)</div><div class='add'>+{</div><div class='ctx'> 	if (unlikely(mm-&gt;context.kvm_seq != init_mm.context.kvm_seq))</div><div class='ctx'> 		__check_kvm_seq(mm);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Required during context switch to avoid speculative page table</div><div class='add'>+	 * walking with the wrong TTBR.</div><div class='add'>+	 */</div><div class='add'>+	cpu_set_reserved_ttbr0();</div><div class='add'>+</div><div class='add'>+	if (!((mm-&gt;context.id ^ cpu_last_asid) &gt;&gt; ASID_BITS))</div><div class='add'>+		/*</div><div class='add'>+		 * The ASID is from the current generation, just switch to the</div><div class='add'>+		 * new pgd. This condition is only true for calls from</div><div class='add'>+		 * context_switch() and interrupts are already disabled.</div><div class='add'>+		 */</div><div class='add'>+		cpu_switch_mm(mm-&gt;pgd, mm);</div><div class='add'>+	else if (irqs_disabled())</div><div class='add'>+		/*</div><div class='add'>+		 * Defer the new ASID allocation until after the context</div><div class='add'>+		 * switch critical region since __new_context() cannot be</div><div class='add'>+		 * called with interrupts disabled (it sends IPIs).</div><div class='add'>+		 */</div><div class='add'>+		set_ti_thread_flag(task_thread_info(tsk), TIF_SWITCH_MM);</div><div class='add'>+	else</div><div class='add'>+		/*</div><div class='add'>+		 * That is a direct call to switch_mm() or activate_mm() with</div><div class='add'>+		 * interrupts enabled and a new context.</div><div class='add'>+		 */</div><div class='add'>+		switch_new_context(mm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define init_new_context(tsk,mm)	(__init_new_context(tsk,mm),0)</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-static inline void check_context(struct mm_struct *mm)</div><div class='add'>+#define finish_arch_post_lock_switch \</div><div class='add'>+	finish_arch_post_lock_switch</div><div class='add'>+static inline void finish_arch_post_lock_switch(void)</div><div class='ctx'> {</div><div class='add'>+	if (test_and_clear_thread_flag(TIF_SWITCH_MM))</div><div class='add'>+		switch_new_context(current-&gt;mm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else	/* !CONFIG_CPU_HAS_ASID */</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='add'>+</div><div class='add'>+static inline void check_and_switch_context(struct mm_struct *mm,</div><div class='add'>+					    struct task_struct *tsk)</div><div class='add'>+{</div><div class='ctx'> 	if (unlikely(mm-&gt;context.kvm_seq != init_mm.context.kvm_seq))</div><div class='ctx'> 		__check_kvm_seq(mm);</div><div class='del'>-#endif</div><div class='add'>+</div><div class='add'>+	if (irqs_disabled())</div><div class='add'>+		/*</div><div class='add'>+		 * cpu_switch_mm() needs to flush the VIVT caches. To avoid</div><div class='add'>+		 * high interrupt latencies, defer the call and continue</div><div class='add'>+		 * running with the old mm. Since we only support UP systems</div><div class='add'>+		 * on non-ASID CPUs, the old mm will remain valid until the</div><div class='add'>+		 * finish_arch_post_lock_switch() call.</div><div class='add'>+		 */</div><div class='add'>+		set_ti_thread_flag(task_thread_info(tsk), TIF_SWITCH_MM);</div><div class='add'>+	else</div><div class='add'>+		cpu_switch_mm(mm-&gt;pgd, mm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define finish_arch_post_lock_switch \</div><div class='add'>+	finish_arch_post_lock_switch</div><div class='add'>+static inline void finish_arch_post_lock_switch(void)</div><div class='add'>+{</div><div class='add'>+	if (test_and_clear_thread_flag(TIF_SWITCH_MM)) {</div><div class='add'>+		struct mm_struct *mm = current-&gt;mm;</div><div class='add'>+		cpu_switch_mm(mm-&gt;pgd, mm);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif	/* CONFIG_MMU */</div><div class='add'>+</div><div class='ctx'> #define init_new_context(tsk,mm)	0</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='add'>+#endif	/* CONFIG_CPU_HAS_ASID */</div><div class='ctx'> </div><div class='ctx'> #define destroy_context(mm)		do { } while(0)</div><div class='ctx'> </div><div class='hunk'>@@ -119,12 +178,7 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,</div><div class='ctx'> 		__flush_icache_all();</div><div class='ctx'> #endif</div><div class='ctx'> 	if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next) {</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-		struct mm_struct **crt_mm = &amp;per_cpu(current_mm, cpu);</div><div class='del'>-		*crt_mm = next;</div><div class='del'>-#endif</div><div class='del'>-		check_context(next);</div><div class='del'>-		cpu_switch_mm(next-&gt;pgd, next);</div><div class='add'>+		check_and_switch_context(next, tsk);</div><div class='ctx'> 		if (cache_is_vivt())</div><div class='ctx'> 			cpumask_clear_cpu(cpu, mm_cpumask(prev));</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h<br/>index 5838361c48b3..ecf901902e44 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/page.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/page.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/page.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/page.h</a></div><div class='hunk'>@@ -34,7 +34,6 @@</div><div class='ctx'>  *	processor(s) we're building for.</div><div class='ctx'>  *</div><div class='ctx'>  *	We have the following to choose from:</div><div class='del'>- *	  v3		- ARMv3</div><div class='ctx'>  *	  v4wt		- ARMv4 with writethrough cache, without minicache</div><div class='ctx'>  *	  v4wb		- ARMv4 with writeback cache, without minicache</div><div class='ctx'>  *	  v4_mc		- ARMv4 with minicache</div><div class='hunk'>@@ -44,14 +43,6 @@</div><div class='ctx'> #undef _USER</div><div class='ctx'> #undef MULTI_USER</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CPU_COPY_V3</div><div class='del'>-# ifdef _USER</div><div class='del'>-#  define MULTI_USER 1</div><div class='del'>-# else</div><div class='del'>-#  define _USER v3</div><div class='del'>-# endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_CPU_COPY_V4WT</div><div class='ctx'> # ifdef _USER</div><div class='ctx'> #  define MULTI_USER 1</div><div class='head'>diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h<br/>index 759af70f9a0a..b24903549d1c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/pgtable-3level.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/pgtable-3level.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/pgtable-3level.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/pgtable-3level.h</a></div><div class='hunk'>@@ -69,8 +69,6 @@</div><div class='ctx'>  */</div><div class='ctx'> #define L_PTE_PRESENT		(_AT(pteval_t, 3) &lt;&lt; 0)		/* Valid */</div><div class='ctx'> #define L_PTE_FILE		(_AT(pteval_t, 1) &lt;&lt; 2)		/* only when !PRESENT */</div><div class='del'>-#define L_PTE_BUFFERABLE	(_AT(pteval_t, 1) &lt;&lt; 2)		/* AttrIndx[0] */</div><div class='del'>-#define L_PTE_CACHEABLE		(_AT(pteval_t, 1) &lt;&lt; 3)		/* AttrIndx[1] */</div><div class='ctx'> #define L_PTE_USER		(_AT(pteval_t, 1) &lt;&lt; 6)		/* AP[1] */</div><div class='ctx'> #define L_PTE_RDONLY		(_AT(pteval_t, 1) &lt;&lt; 7)		/* AP[2] */</div><div class='ctx'> #define L_PTE_SHARED		(_AT(pteval_t, 3) &lt;&lt; 8)		/* SH[1:0], inner shareable */</div><div class='head'>diff --git a/arch/arm/include/asm/posix_types.h b/arch/arm/include/asm/posix_types.h<br/>index efdf99045d87..d2de9cbbcd9b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/posix_types.h</a></div><div class='hunk'>@@ -22,9 +22,6 @@</div><div class='ctx'> typedef unsigned short		__kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned short		__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned short		__kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h<br/>index 5ac8d3d3e025..99afa7498260 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/processor.h</a></div><div class='hunk'>@@ -77,9 +77,6 @@ struct task_struct;</div><div class='ctx'> /* Free all resources held by a thread. */</div><div class='ctx'> extern void release_thread(struct task_struct *);</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> unsigned long get_wchan(struct task_struct *p);</div><div class='ctx'> </div><div class='ctx'> #if __LINUX_ARM_ARCH__ == 6 || defined(CONFIG_ARM_ERRATA_754327)</div><div class='hunk'>@@ -88,8 +85,6 @@ unsigned long get_wchan(struct task_struct *p);</div><div class='ctx'> #define cpu_relax()			barrier()</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-void cpu_idle_wait(void);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Create a new kernel thread</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h<br/>index 451808ba1211..355ece523f41 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/ptrace.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/ptrace.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/ptrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/ptrace.h</a></div><div class='hunk'>@@ -249,6 +249,11 @@ static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)</div><div class='ctx'> 	return regs-&gt;ARM_sp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline unsigned long user_stack_pointer(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	return regs-&gt;ARM_sp;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='head'>diff --git a/arch/arm/include/asm/syscall.h b/arch/arm/include/asm/syscall.h<br/>new file mode 100644<br/>index 000000000000..c334a23ddf75<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/syscall.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/syscall.h</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+/*</div><div class='add'>+ * Access to user system call parameters and results</div><div class='add'>+ *</div><div class='add'>+ * See asm-generic/syscall.h for descriptions of what we must do here.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_ARM_SYSCALL_H</div><div class='add'>+#define _ASM_ARM_SYSCALL_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+extern const unsigned long sys_call_table[];</div><div class='add'>+</div><div class='add'>+static inline int syscall_get_nr(struct task_struct *task,</div><div class='add'>+				 struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	return task_thread_info(task)-&gt;syscall;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void syscall_rollback(struct task_struct *task,</div><div class='add'>+				    struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;ARM_r0 = regs-&gt;ARM_ORIG_r0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline long syscall_get_error(struct task_struct *task,</div><div class='add'>+				     struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	unsigned long error = regs-&gt;ARM_r0;</div><div class='add'>+	return IS_ERR_VALUE(error) ? error : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline long syscall_get_return_value(struct task_struct *task,</div><div class='add'>+					    struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	return regs-&gt;ARM_r0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void syscall_set_return_value(struct task_struct *task,</div><div class='add'>+					    struct pt_regs *regs,</div><div class='add'>+					    int error, long val)</div><div class='add'>+{</div><div class='add'>+	regs-&gt;ARM_r0 = (long) error ? error : val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define SYSCALL_MAX_ARGS 7</div><div class='add'>+</div><div class='add'>+static inline void syscall_get_arguments(struct task_struct *task,</div><div class='add'>+					 struct pt_regs *regs,</div><div class='add'>+					 unsigned int i, unsigned int n,</div><div class='add'>+					 unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	if (i + n &gt; SYSCALL_MAX_ARGS) {</div><div class='add'>+		unsigned long *args_bad = args + SYSCALL_MAX_ARGS - i;</div><div class='add'>+		unsigned int n_bad = n + i - SYSCALL_MAX_ARGS;</div><div class='add'>+		pr_warning("%s called with max args %d, handling only %d\n",</div><div class='add'>+			   __func__, i + n, SYSCALL_MAX_ARGS);</div><div class='add'>+		memset(args_bad, 0, n_bad * sizeof(args[0]));</div><div class='add'>+		n = SYSCALL_MAX_ARGS - i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == 0) {</div><div class='add'>+		args[0] = regs-&gt;ARM_ORIG_r0;</div><div class='add'>+		args++;</div><div class='add'>+		i++;</div><div class='add'>+		n--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(args, &amp;regs-&gt;ARM_r0 + i, n * sizeof(args[0]));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void syscall_set_arguments(struct task_struct *task,</div><div class='add'>+					 struct pt_regs *regs,</div><div class='add'>+					 unsigned int i, unsigned int n,</div><div class='add'>+					 const unsigned long *args)</div><div class='add'>+{</div><div class='add'>+	if (i + n &gt; SYSCALL_MAX_ARGS) {</div><div class='add'>+		pr_warning("%s called with max args %d, handling only %d\n",</div><div class='add'>+			   __func__, i + n, SYSCALL_MAX_ARGS);</div><div class='add'>+		n = SYSCALL_MAX_ARGS - i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == 0) {</div><div class='add'>+		regs-&gt;ARM_ORIG_r0 = args[0];</div><div class='add'>+		args++;</div><div class='add'>+		i++;</div><div class='add'>+		n--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;regs-&gt;ARM_r0 + i, args, n * sizeof(args[0]));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_ARM_SYSCALL_H */</div><div class='head'>diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h<br/>index d4c24d412a8d..b79f8e97f775 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/thread_info.h</a></div><div class='hunk'>@@ -118,6 +118,13 @@ extern void iwmmxt_task_switch(struct thread_info *);</div><div class='ctx'> extern void vfp_sync_hwstate(struct thread_info *);</div><div class='ctx'> extern void vfp_flush_hwstate(struct thread_info *);</div><div class='ctx'> </div><div class='add'>+struct user_vfp;</div><div class='add'>+struct user_vfp_exc;</div><div class='add'>+</div><div class='add'>+extern int vfp_preserve_user_clear_hwstate(struct user_vfp __user *,</div><div class='add'>+					   struct user_vfp_exc __user *);</div><div class='add'>+extern int vfp_restore_user_hwstate(struct user_vfp __user *,</div><div class='add'>+				    struct user_vfp_exc __user *);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -141,11 +148,13 @@ extern void vfp_flush_hwstate(struct thread_info *);</div><div class='ctx'> #define TIF_NOTIFY_RESUME	2	/* callback before returning to user */</div><div class='ctx'> #define TIF_SYSCALL_TRACE	8</div><div class='ctx'> #define TIF_SYSCALL_AUDIT	9</div><div class='add'>+#define TIF_SYSCALL_RESTARTSYS	10</div><div class='ctx'> #define TIF_POLLING_NRFLAG	16</div><div class='ctx'> #define TIF_USING_IWMMXT	17</div><div class='ctx'> #define TIF_MEMDIE		18	/* is terminating due to OOM killer */</div><div class='ctx'> #define TIF_RESTORE_SIGMASK	20</div><div class='ctx'> #define TIF_SECCOMP		21</div><div class='add'>+#define TIF_SWITCH_MM		22	/* deferred switch_mm */</div><div class='ctx'> </div><div class='ctx'> #define _TIF_SIGPENDING		(1 &lt;&lt; TIF_SIGPENDING)</div><div class='ctx'> #define _TIF_NEED_RESCHED	(1 &lt;&lt; TIF_NEED_RESCHED)</div><div class='hunk'>@@ -154,16 +163,17 @@ extern void vfp_flush_hwstate(struct thread_info *);</div><div class='ctx'> #define _TIF_SYSCALL_AUDIT	(1 &lt;&lt; TIF_SYSCALL_AUDIT)</div><div class='ctx'> #define _TIF_POLLING_NRFLAG	(1 &lt;&lt; TIF_POLLING_NRFLAG)</div><div class='ctx'> #define _TIF_USING_IWMMXT	(1 &lt;&lt; TIF_USING_IWMMXT)</div><div class='del'>-#define _TIF_RESTORE_SIGMASK	(1 &lt;&lt; TIF_RESTORE_SIGMASK)</div><div class='ctx'> #define _TIF_SECCOMP		(1 &lt;&lt; TIF_SECCOMP)</div><div class='add'>+#define _TIF_SYSCALL_RESTARTSYS	(1 &lt;&lt; TIF_SYSCALL_RESTARTSYS)</div><div class='ctx'> </div><div class='ctx'> /* Checks for any syscall work in entry-common.S */</div><div class='del'>-#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT)</div><div class='add'>+#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \</div><div class='add'>+			   _TIF_SYSCALL_RESTARTSYS)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Change these and you break ASM code in entry-common.S</div><div class='ctx'>  */</div><div class='del'>-#define _TIF_WORK_MASK		0x000000ff</div><div class='add'>+#define _TIF_WORK_MASK		(_TIF_NEED_RESCHED | _TIF_SIGPENDING | _TIF_NOTIFY_RESUME)</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* __ASM_ARM_THREAD_INFO_H */</div><div class='head'>diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h<br/>index 85fe61e73202..6e924d3a77eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/tlbflush.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/tlbflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/tlbflush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/tlbflush.h</a></div><div class='hunk'>@@ -65,21 +65,6 @@</div><div class='ctx'> #define MULTI_TLB 1</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define v3_tlb_flags	(TLB_V3_FULL | TLB_V3_PAGE)</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CPU_TLB_V3</div><div class='del'>-# define v3_possible_flags	v3_tlb_flags</div><div class='del'>-# define v3_always_flags	v3_tlb_flags</div><div class='del'>-# ifdef _TLB</div><div class='del'>-#  define MULTI_TLB 1</div><div class='del'>-# else</div><div class='del'>-#  define _TLB v3</div><div class='del'>-# endif</div><div class='del'>-#else</div><div class='del'>-# define v3_possible_flags	0</div><div class='del'>-# define v3_always_flags	(-1UL)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define v4_tlb_flags	(TLB_V4_U_FULL | TLB_V4_U_PAGE)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CPU_TLB_V4WT</div><div class='hunk'>@@ -298,8 +283,7 @@ extern struct cpu_tlb_fns cpu_tlb;</div><div class='ctx'>  * implemented the "%?" method, but this has been discontinued due to too</div><div class='ctx'>  * many people getting it wrong.</div><div class='ctx'>  */</div><div class='del'>-#define possible_tlb_flags	(v3_possible_flags | \</div><div class='del'>-				 v4_possible_flags | \</div><div class='add'>+#define possible_tlb_flags	(v4_possible_flags | \</div><div class='ctx'> 				 v4wbi_possible_flags | \</div><div class='ctx'> 				 fr_possible_flags | \</div><div class='ctx'> 				 v4wb_possible_flags | \</div><div class='hunk'>@@ -307,8 +291,7 @@ extern struct cpu_tlb_fns cpu_tlb;</div><div class='ctx'> 				 v6wbi_possible_flags | \</div><div class='ctx'> 				 v7wbi_possible_flags)</div><div class='ctx'> </div><div class='del'>-#define always_tlb_flags	(v3_always_flags &amp; \</div><div class='del'>-				 v4_always_flags &amp; \</div><div class='add'>+#define always_tlb_flags	(v4_always_flags &amp; \</div><div class='ctx'> 				 v4wbi_always_flags &amp; \</div><div class='ctx'> 				 fr_always_flags &amp; \</div><div class='ctx'> 				 v4wb_always_flags &amp; \</div><div class='head'>diff --git a/arch/arm/include/asm/tls.h b/arch/arm/include/asm/tls.h<br/>index 60843eb0f61c..73409e6c0251 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/tls.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/tls.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/include/asm/tls.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/include/asm/tls.h</a></div><div class='hunk'>@@ -7,6 +7,8 @@</div><div class='ctx'> </div><div class='ctx'> 	.macro set_tls_v6k, tp, tmp1, tmp2</div><div class='ctx'> 	mcr	p15, 0, \tp, c13, c0, 3		@ set TLS register</div><div class='add'>+	mov	\tmp1, #0</div><div class='add'>+	mcr	p15, 0, \tmp1, c13, c0, 2	@ clear user r/w TLS register</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro set_tls_v6, tp, tmp1, tmp2</div><div class='hunk'>@@ -15,6 +17,8 @@</div><div class='ctx'> 	mov	\tmp2, #0xffff0fff</div><div class='ctx'> 	tst	\tmp1, #HWCAP_TLS		@ hardware TLS available?</div><div class='ctx'> 	mcrne	p15, 0, \tp, c13, c0, 3		@ yes, set TLS register</div><div class='add'>+	movne	\tmp1, #0</div><div class='add'>+	mcrne	p15, 0, \tmp1, c13, c0, 2	@ clear user r/w TLS register</div><div class='ctx'> 	streq	\tp, [\tmp2, #-15]		@ set TLS value at 0xffff0ff0</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile<br/>index 7b787d642af4..7ad2d5cf7008 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/Makefile</a></div><div class='hunk'>@@ -34,6 +34,7 @@ obj-$(CONFIG_ARM_CPU_SUSPEND)	+= sleep.o suspend.o</div><div class='ctx'> obj-$(CONFIG_SMP)		+= smp.o smp_tlb.o</div><div class='ctx'> obj-$(CONFIG_HAVE_ARM_SCU)	+= smp_scu.o</div><div class='ctx'> obj-$(CONFIG_HAVE_ARM_TWD)	+= smp_twd.o</div><div class='add'>+obj-$(CONFIG_ARM_ARCH_TIMER)	+= arch_timer.o</div><div class='ctx'> obj-$(CONFIG_DYNAMIC_FTRACE)	+= ftrace.o insn.o</div><div class='ctx'> obj-$(CONFIG_FUNCTION_GRAPH_TRACER)	+= ftrace.o insn.o</div><div class='ctx'> obj-$(CONFIG_JUMP_LABEL)	+= jump_label.o insn.o patch.o</div><div class='hunk'>@@ -81,4 +82,4 @@ head-y			:= head$(MMUEXT).o</div><div class='ctx'> obj-$(CONFIG_DEBUG_LL)	+= debug.o</div><div class='ctx'> obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o</div><div class='ctx'> </div><div class='del'>-extra-y := $(head-y) init_task.o vmlinux.lds</div><div class='add'>+extra-y := $(head-y) vmlinux.lds</div><div class='head'>diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c<br/>new file mode 100644<br/>index 000000000000..dd58035621f7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/arch_timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/arch_timer.c</a></div><div class='hunk'>@@ -0,0 +1,350 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/arm/kernel/arch_timer.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2011 ARM Ltd.</div><div class='add'>+ *  All Rights Reserved</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/clockchips.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cputype.h&gt;</div><div class='add'>+#include &lt;asm/localtimer.h&gt;</div><div class='add'>+#include &lt;asm/arch_timer.h&gt;</div><div class='add'>+#include &lt;asm/system_info.h&gt;</div><div class='add'>+#include &lt;asm/sched_clock.h&gt;</div><div class='add'>+</div><div class='add'>+static unsigned long arch_timer_rate;</div><div class='add'>+static int arch_timer_ppi;</div><div class='add'>+static int arch_timer_ppi2;</div><div class='add'>+</div><div class='add'>+static struct clock_event_device __percpu **arch_timer_evt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Architected system timer support.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define ARCH_TIMER_CTRL_ENABLE		(1 &lt;&lt; 0)</div><div class='add'>+#define ARCH_TIMER_CTRL_IT_MASK		(1 &lt;&lt; 1)</div><div class='add'>+#define ARCH_TIMER_CTRL_IT_STAT		(1 &lt;&lt; 2)</div><div class='add'>+</div><div class='add'>+#define ARCH_TIMER_REG_CTRL		0</div><div class='add'>+#define ARCH_TIMER_REG_FREQ		1</div><div class='add'>+#define ARCH_TIMER_REG_TVAL		2</div><div class='add'>+</div><div class='add'>+static void arch_timer_reg_write(int reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case ARCH_TIMER_REG_CTRL:</div><div class='add'>+		asm volatile("mcr p15, 0, %0, c14, c2, 1" : : "r" (val));</div><div class='add'>+		break;</div><div class='add'>+	case ARCH_TIMER_REG_TVAL:</div><div class='add'>+		asm volatile("mcr p15, 0, %0, c14, c2, 0" : : "r" (val));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	isb();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 arch_timer_reg_read(int reg)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case ARCH_TIMER_REG_CTRL:</div><div class='add'>+		asm volatile("mrc p15, 0, %0, c14, c2, 1" : "=r" (val));</div><div class='add'>+		break;</div><div class='add'>+	case ARCH_TIMER_REG_FREQ:</div><div class='add'>+		asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (val));</div><div class='add'>+		break;</div><div class='add'>+	case ARCH_TIMER_REG_TVAL:</div><div class='add'>+		asm volatile("mrc p15, 0, %0, c14, c2, 0" : "=r" (val));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t arch_timer_handler(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct clock_event_device *evt = *(struct clock_event_device **)dev_id;</div><div class='add'>+	unsigned long ctrl;</div><div class='add'>+</div><div class='add'>+	ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL);</div><div class='add'>+	if (ctrl &amp; ARCH_TIMER_CTRL_IT_STAT) {</div><div class='add'>+		ctrl |= ARCH_TIMER_CTRL_IT_MASK;</div><div class='add'>+		arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);</div><div class='add'>+		evt-&gt;event_handler(evt);</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void arch_timer_disable(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long ctrl;</div><div class='add'>+</div><div class='add'>+	ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL);</div><div class='add'>+	ctrl &amp;= ~ARCH_TIMER_CTRL_ENABLE;</div><div class='add'>+	arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void arch_timer_set_mode(enum clock_event_mode mode,</div><div class='add'>+				struct clock_event_device *clk)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CLOCK_EVT_MODE_UNUSED:</div><div class='add'>+	case CLOCK_EVT_MODE_SHUTDOWN:</div><div class='add'>+		arch_timer_disable();</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int arch_timer_set_next_event(unsigned long evt,</div><div class='add'>+				     struct clock_event_device *unused)</div><div class='add'>+{</div><div class='add'>+	unsigned long ctrl;</div><div class='add'>+</div><div class='add'>+	ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL);</div><div class='add'>+	ctrl |= ARCH_TIMER_CTRL_ENABLE;</div><div class='add'>+	ctrl &amp;= ~ARCH_TIMER_CTRL_IT_MASK;</div><div class='add'>+</div><div class='add'>+	arch_timer_reg_write(ARCH_TIMER_REG_TVAL, evt);</div><div class='add'>+	arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __cpuinit arch_timer_setup(struct clock_event_device *clk)</div><div class='add'>+{</div><div class='add'>+	/* Be safe... */</div><div class='add'>+	arch_timer_disable();</div><div class='add'>+</div><div class='add'>+	clk-&gt;features = CLOCK_EVT_FEAT_ONESHOT;</div><div class='add'>+	clk-&gt;name = "arch_sys_timer";</div><div class='add'>+	clk-&gt;rating = 450;</div><div class='add'>+	clk-&gt;set_mode = arch_timer_set_mode;</div><div class='add'>+	clk-&gt;set_next_event = arch_timer_set_next_event;</div><div class='add'>+	clk-&gt;irq = arch_timer_ppi;</div><div class='add'>+</div><div class='add'>+	clockevents_config_and_register(clk, arch_timer_rate,</div><div class='add'>+					0xf, 0x7fffffff);</div><div class='add'>+</div><div class='add'>+	*__this_cpu_ptr(arch_timer_evt) = clk;</div><div class='add'>+</div><div class='add'>+	enable_percpu_irq(clk-&gt;irq, 0);</div><div class='add'>+	if (arch_timer_ppi2)</div><div class='add'>+		enable_percpu_irq(arch_timer_ppi2, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Is the optional system timer available? */</div><div class='add'>+static int local_timer_is_architected(void)</div><div class='add'>+{</div><div class='add'>+	return (cpu_architecture() &gt;= CPU_ARCH_ARMv7) &amp;&amp;</div><div class='add'>+	       ((read_cpuid_ext(CPUID_EXT_PFR1) &gt;&gt; 16) &amp; 0xf) == 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int arch_timer_available(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long freq;</div><div class='add'>+</div><div class='add'>+	if (!local_timer_is_architected())</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	if (arch_timer_rate == 0) {</div><div class='add'>+		arch_timer_reg_write(ARCH_TIMER_REG_CTRL, 0);</div><div class='add'>+		freq = arch_timer_reg_read(ARCH_TIMER_REG_FREQ);</div><div class='add'>+</div><div class='add'>+		/* Check the timer frequency. */</div><div class='add'>+		if (freq == 0) {</div><div class='add'>+			pr_warn("Architected timer frequency not available\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		arch_timer_rate = freq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_info_once("Architected local timer running at %lu.%02luMHz.\n",</div><div class='add'>+		     arch_timer_rate / 1000000, (arch_timer_rate / 10000) % 100);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline cycle_t arch_counter_get_cntpct(void)</div><div class='add'>+{</div><div class='add'>+	u32 cvall, cvalh;</div><div class='add'>+</div><div class='add'>+	asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (cvall), "=r" (cvalh));</div><div class='add'>+</div><div class='add'>+	return ((cycle_t) cvalh &lt;&lt; 32) | cvall;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline cycle_t arch_counter_get_cntvct(void)</div><div class='add'>+{</div><div class='add'>+	u32 cvall, cvalh;</div><div class='add'>+</div><div class='add'>+	asm volatile("mrrc p15, 1, %0, %1, c14" : "=r" (cvall), "=r" (cvalh));</div><div class='add'>+</div><div class='add'>+	return ((cycle_t) cvalh &lt;&lt; 32) | cvall;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 notrace arch_counter_get_cntvct32(void)</div><div class='add'>+{</div><div class='add'>+	cycle_t cntvct = arch_counter_get_cntvct();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The sched_clock infrastructure only knows about counters</div><div class='add'>+	 * with at most 32bits. Forget about the upper 24 bits for the</div><div class='add'>+	 * time being...</div><div class='add'>+	 */</div><div class='add'>+	return (u32)(cntvct &amp; (u32)~0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static cycle_t arch_counter_read(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	return arch_counter_get_cntpct();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clocksource clocksource_counter = {</div><div class='add'>+	.name	= "arch_sys_counter",</div><div class='add'>+	.rating	= 400,</div><div class='add'>+	.read	= arch_counter_read,</div><div class='add'>+	.mask	= CLOCKSOURCE_MASK(56),</div><div class='add'>+	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __cpuinit arch_timer_stop(struct clock_event_device *clk)</div><div class='add'>+{</div><div class='add'>+	pr_debug("arch_timer_teardown disable IRQ%d cpu #%d\n",</div><div class='add'>+		 clk-&gt;irq, smp_processor_id());</div><div class='add'>+	disable_percpu_irq(clk-&gt;irq);</div><div class='add'>+	if (arch_timer_ppi2)</div><div class='add'>+		disable_percpu_irq(arch_timer_ppi2);</div><div class='add'>+	arch_timer_set_mode(CLOCK_EVT_MODE_UNUSED, clk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct local_timer_ops arch_timer_ops __cpuinitdata = {</div><div class='add'>+	.setup	= arch_timer_setup,</div><div class='add'>+	.stop	= arch_timer_stop,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clock_event_device arch_timer_global_evt;</div><div class='add'>+</div><div class='add'>+static int __init arch_timer_register(void)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = arch_timer_available();</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	arch_timer_evt = alloc_percpu(struct clock_event_device *);</div><div class='add'>+	if (!arch_timer_evt)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	clocksource_register_hz(&amp;clocksource_counter, arch_timer_rate);</div><div class='add'>+</div><div class='add'>+	err = request_percpu_irq(arch_timer_ppi, arch_timer_handler,</div><div class='add'>+				 "arch_timer", arch_timer_evt);</div><div class='add'>+	if (err) {</div><div class='add'>+		pr_err("arch_timer: can't register interrupt %d (%d)\n",</div><div class='add'>+		       arch_timer_ppi, err);</div><div class='add'>+		goto out_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (arch_timer_ppi2) {</div><div class='add'>+		err = request_percpu_irq(arch_timer_ppi2, arch_timer_handler,</div><div class='add'>+					 "arch_timer", arch_timer_evt);</div><div class='add'>+		if (err) {</div><div class='add'>+			pr_err("arch_timer: can't register interrupt %d (%d)\n",</div><div class='add'>+			       arch_timer_ppi2, err);</div><div class='add'>+			arch_timer_ppi2 = 0;</div><div class='add'>+			goto out_free_irq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = local_timer_register(&amp;arch_timer_ops);</div><div class='add'>+	if (err) {</div><div class='add'>+		/*</div><div class='add'>+		 * We couldn't register as a local timer (could be</div><div class='add'>+		 * because we're on a UP platform, or because some</div><div class='add'>+		 * other local timer is already present...). Try as a</div><div class='add'>+		 * global timer instead.</div><div class='add'>+		 */</div><div class='add'>+		arch_timer_global_evt.cpumask = cpumask_of(0);</div><div class='add'>+		err = arch_timer_setup(&amp;arch_timer_global_evt);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_free_irq;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_free_irq:</div><div class='add'>+	free_percpu_irq(arch_timer_ppi, arch_timer_evt);</div><div class='add'>+	if (arch_timer_ppi2)</div><div class='add'>+		free_percpu_irq(arch_timer_ppi2, arch_timer_evt);</div><div class='add'>+</div><div class='add'>+out_free:</div><div class='add'>+	free_percpu(arch_timer_evt);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id arch_timer_of_match[] __initconst = {</div><div class='add'>+	{ .compatible	= "arm,armv7-timer",	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __init arch_timer_of_register(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	u32 freq;</div><div class='add'>+</div><div class='add'>+	np = of_find_matching_node(NULL, arch_timer_of_match);</div><div class='add'>+	if (!np) {</div><div class='add'>+		pr_err("arch_timer: can't find DT node\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Try to determine the frequency from the device tree or CNTFRQ */</div><div class='add'>+	if (!of_property_read_u32(np, "clock-frequency", &amp;freq))</div><div class='add'>+		arch_timer_rate = freq;</div><div class='add'>+</div><div class='add'>+	arch_timer_ppi = irq_of_parse_and_map(np, 0);</div><div class='add'>+	arch_timer_ppi2 = irq_of_parse_and_map(np, 1);</div><div class='add'>+	pr_info("arch_timer: found %s irqs %d %d\n",</div><div class='add'>+		np-&gt;name, arch_timer_ppi, arch_timer_ppi2);</div><div class='add'>+</div><div class='add'>+	return arch_timer_register();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init arch_timer_sched_clock_init(void)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = arch_timer_available();</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	setup_sched_clock(arch_counter_get_cntvct32, 32, arch_timer_rate);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c<br/>index ede5f7741c42..25552508c3fd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/bios32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/bios32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/bios32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/bios32.c</a></div><div class='hunk'>@@ -374,16 +374,29 @@ EXPORT_SYMBOL(pcibios_fixup_bus);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Swizzle the device pin each time we cross a bridge.</div><div class='del'>- * This might update pin and returns the slot number.</div><div class='add'>+ * Swizzle the device pin each time we cross a bridge.  If a platform does</div><div class='add'>+ * not provide a swizzle function, we perform the standard PCI swizzling.</div><div class='add'>+ *</div><div class='add'>+ * The default swizzling walks up the bus tree one level at a time, applying</div><div class='add'>+ * the standard swizzle function at each step, stopping when it finds the PCI</div><div class='add'>+ * root bus.  This will return the slot number of the bridge device on the</div><div class='add'>+ * root bus and the interrupt pin on that device which should correspond</div><div class='add'>+ * with the downstream device interrupt.</div><div class='add'>+ *</div><div class='add'>+ * Platforms may override this, in which case the slot and pin returned</div><div class='add'>+ * depend entirely on the platform code.  However, please note that the</div><div class='add'>+ * PCI standard swizzle is implemented on plug-in cards and Cardbus based</div><div class='add'>+ * PCI extenders, so it can not be ignored.</div><div class='ctx'>  */</div><div class='ctx'> static u8 __devinit pcibios_swizzle(struct pci_dev *dev, u8 *pin)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_sys_data *sys = dev-&gt;sysdata;</div><div class='del'>-	int slot = 0, oldpin = *pin;</div><div class='add'>+	int slot, oldpin = *pin;</div><div class='ctx'> </div><div class='ctx'> 	if (sys-&gt;swizzle)</div><div class='ctx'> 		slot = sys-&gt;swizzle(dev, pin);</div><div class='add'>+	else</div><div class='add'>+		slot = pci_common_swizzle(dev, pin);</div><div class='ctx'> </div><div class='ctx'> 	if (debug_pci)</div><div class='ctx'> 		printk("PCI: %s swizzling pin %d =&gt; pin %d slot %d\n",</div><div class='hunk'>@@ -410,7 +423,7 @@ static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> 	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init pcibios_init_hw(struct hw_pci *hw)</div><div class='add'>+static void __init pcibios_init_hw(struct hw_pci *hw, struct list_head *head)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_sys_data *sys = NULL;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -424,7 +437,6 @@ static void __init pcibios_init_hw(struct hw_pci *hw)</div><div class='ctx'> #ifdef CONFIG_PCI_DOMAINS</div><div class='ctx'> 		sys-&gt;domain  = hw-&gt;domain;</div><div class='ctx'> #endif</div><div class='del'>-		sys-&gt;hw      = hw;</div><div class='ctx'> 		sys-&gt;busnr   = busnr;</div><div class='ctx'> 		sys-&gt;swizzle = hw-&gt;swizzle;</div><div class='ctx'> 		sys-&gt;map_irq = hw-&gt;map_irq;</div><div class='hunk'>@@ -440,14 +452,18 @@ static void __init pcibios_init_hw(struct hw_pci *hw)</div><div class='ctx'> 					 &amp;iomem_resource, sys-&gt;mem_offset);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			sys-&gt;bus = hw-&gt;scan(nr, sys);</div><div class='add'>+			if (hw-&gt;scan)</div><div class='add'>+				sys-&gt;bus = hw-&gt;scan(nr, sys);</div><div class='add'>+			else</div><div class='add'>+				sys-&gt;bus = pci_scan_root_bus(NULL, sys-&gt;busnr,</div><div class='add'>+						hw-&gt;ops, sys, &amp;sys-&gt;resources);</div><div class='ctx'> </div><div class='ctx'> 			if (!sys-&gt;bus)</div><div class='ctx'> 				panic("PCI: unable to scan bus!");</div><div class='ctx'> </div><div class='ctx'> 			busnr = sys-&gt;bus-&gt;subordinate + 1;</div><div class='ctx'> </div><div class='del'>-			list_add(&amp;sys-&gt;node, &amp;hw-&gt;buses);</div><div class='add'>+			list_add(&amp;sys-&gt;node, head);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			kfree(sys);</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='hunk'>@@ -459,19 +475,18 @@ static void __init pcibios_init_hw(struct hw_pci *hw)</div><div class='ctx'> void __init pci_common_init(struct hw_pci *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_sys_data *sys;</div><div class='del'>-</div><div class='del'>-	INIT_LIST_HEAD(&amp;hw-&gt;buses);</div><div class='add'>+	LIST_HEAD(head);</div><div class='ctx'> </div><div class='ctx'> 	pci_add_flags(PCI_REASSIGN_ALL_RSRC);</div><div class='ctx'> 	if (hw-&gt;preinit)</div><div class='ctx'> 		hw-&gt;preinit();</div><div class='del'>-	pcibios_init_hw(hw);</div><div class='add'>+	pcibios_init_hw(hw, &amp;head);</div><div class='ctx'> 	if (hw-&gt;postinit)</div><div class='ctx'> 		hw-&gt;postinit();</div><div class='ctx'> </div><div class='ctx'> 	pci_fixup_irqs(pcibios_swizzle, pcibios_map_irq);</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(sys, &amp;hw-&gt;buses, node) {</div><div class='add'>+	list_for_each_entry(sys, &amp;head, node) {</div><div class='ctx'> 		struct pci_bus *bus = sys-&gt;bus;</div><div class='ctx'> </div><div class='ctx'> 		if (!pci_has_flag(PCI_PROBE_ONLY)) {</div><div class='head'>diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S<br/>index 7fd3ad048da9..437f0c426517 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/entry-armv.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/entry-armv.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/entry-armv.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/entry-armv.S</a></div><div class='hunk'>@@ -556,10 +556,6 @@ call_fpe:</div><div class='ctx'> #endif</div><div class='ctx'> 	tst	r0, #0x08000000			@ only CDP/CPRT/LDC/STC have bit 27</div><div class='ctx'> 	tstne	r0, #0x04000000			@ bit 26 set on both ARM and Thumb-2</div><div class='del'>-#if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710)</div><div class='del'>-	and	r8, r0, #0x0f000000		@ mask out op-code bits</div><div class='del'>-	teqne	r8, #0x0f000000			@ SWI (ARM6/7 bug)?</div><div class='del'>-#endif</div><div class='ctx'> 	moveq	pc, lr</div><div class='ctx'> 	get_thread_info r10			@ get current thread</div><div class='ctx'> 	and	r8, r0, #0x00000f00		@ mask out CP number</div><div class='head'>diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S<br/>index 54ee265dd819..4afed88d250a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/entry-common.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/entry-common.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/entry-common.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/entry-common.S</a></div><div class='hunk'>@@ -53,9 +53,13 @@ fast_work_pending:</div><div class='ctx'> work_pending:</div><div class='ctx'> 	tst	r1, #_TIF_NEED_RESCHED</div><div class='ctx'> 	bne	work_resched</div><div class='del'>-	tst	r1, #_TIF_SIGPENDING|_TIF_NOTIFY_RESUME</div><div class='del'>-	beq	no_work_pending</div><div class='add'>+	/*</div><div class='add'>+	 * TIF_SIGPENDING or TIF_NOTIFY_RESUME must've been set if we got here</div><div class='add'>+	 */</div><div class='add'>+	ldr	r2, [sp, #S_PSR]</div><div class='ctx'> 	mov	r0, sp				@ 'regs'</div><div class='add'>+	tst	r2, #15				@ are we returning to user mode?</div><div class='add'>+	bne	no_work_pending			@ no?  just leave, then...</div><div class='ctx'> 	mov	r2, why				@ 'syscall'</div><div class='ctx'> 	tst	r1, #_TIF_SIGPENDING		@ delivering a signal?</div><div class='ctx'> 	movne	why, #0				@ prevent further restarts</div><div class='hunk'>@@ -335,20 +339,6 @@ ENDPROC(ftrace_stub)</div><div class='ctx'>  *-----------------------------------------------------------------------------</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-	/* If we're optimising for StrongARM the resulting code won't </div><div class='del'>-	   run on an ARM7 and we can save a couple of instructions.  </div><div class='del'>-								--pb */</div><div class='del'>-#ifdef CONFIG_CPU_ARM710</div><div class='del'>-#define A710(code...) code</div><div class='del'>-.Larm710bug:</div><div class='del'>-	ldmia	sp, {r0 - lr}^			@ Get calling r0 - lr</div><div class='del'>-	mov	r0, r0</div><div class='del'>-	add	sp, sp, #S_FRAME_SIZE</div><div class='del'>-	subs	pc, lr, #4</div><div class='del'>-#else</div><div class='del'>-#define A710(code...)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	.align	5</div><div class='ctx'> ENTRY(vector_swi)</div><div class='ctx'> 	sub	sp, sp, #S_FRAME_SIZE</div><div class='hunk'>@@ -379,9 +369,6 @@ ENTRY(vector_swi)</div><div class='ctx'> 	ldreq	r10, [lr, #-4]			@ get SWI instruction</div><div class='ctx'> #else</div><div class='ctx'> 	ldr	r10, [lr, #-4]			@ get SWI instruction</div><div class='del'>-  A710(	and	ip, r10, #0x0f000000		@ check for SWI		)</div><div class='del'>-  A710(	teq	ip, #0x0f000000						)</div><div class='del'>-  A710(	bne	.Larm710bug						)</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_CPU_ENDIAN_BE8</div><div class='ctx'> 	rev	r10, r10			@ little endian instruction</div><div class='hunk'>@@ -392,26 +379,15 @@ ENTRY(vector_swi)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Pure EABI user space always put syscall number into scno (r7).</div><div class='ctx'> 	 */</div><div class='del'>-  A710(	ldr	ip, [lr, #-4]			@ get SWI instruction	)</div><div class='del'>-  A710(	and	ip, ip, #0x0f000000		@ check for SWI		)</div><div class='del'>-  A710(	teq	ip, #0x0f000000						)</div><div class='del'>-  A710(	bne	.Larm710bug						)</div><div class='del'>-</div><div class='ctx'> #elif defined(CONFIG_ARM_THUMB)</div><div class='del'>-</div><div class='ctx'> 	/* Legacy ABI only, possibly thumb mode. */</div><div class='ctx'> 	tst	r8, #PSR_T_BIT			@ this is SPSR from save_user_regs</div><div class='ctx'> 	addne	scno, r7, #__NR_SYSCALL_BASE	@ put OS number in</div><div class='ctx'> 	ldreq	scno, [lr, #-4]</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='del'>-</div><div class='ctx'> 	/* Legacy ABI only. */</div><div class='ctx'> 	ldr	scno, [lr, #-4]			@ get SWI instruction</div><div class='del'>-  A710(	and	ip, scno, #0x0f000000		@ check for SWI		)</div><div class='del'>-  A710(	teq	ip, #0x0f000000						)</div><div class='del'>-  A710(	bne	.Larm710bug						)</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ALIGNMENT_TRAP</div><div class='head'>diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S<br/>index 3bf0c7f8b043..835898e7d704 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/head.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/head.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/head.S</a></div><div class='hunk'>@@ -277,10 +277,6 @@ __create_page_tables:</div><div class='ctx'> 	mov	r3, r3, lsl #PMD_ORDER</div><div class='ctx'> </div><div class='ctx'> 	add	r0, r4, r3</div><div class='del'>-	rsb	r3, r3, #0x4000			@ PTRS_PER_PGD*sizeof(long)</div><div class='del'>-	cmp	r3, #0x0800			@ limit to 512MB</div><div class='del'>-	movhi	r3, #0x0800</div><div class='del'>-	add	r6, r0, r3</div><div class='ctx'> 	mov	r3, r7, lsr #SECTION_SHIFT</div><div class='ctx'> 	ldr	r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags</div><div class='ctx'> 	orr	r3, r7, r3, lsl #SECTION_SHIFT</div><div class='hunk'>@@ -289,13 +285,10 @@ __create_page_tables:</div><div class='ctx'> #else</div><div class='ctx'> 	orr	r3, r3, #PMD_SECT_XN</div><div class='ctx'> #endif</div><div class='del'>-1:	str	r3, [r0], #4</div><div class='add'>+	str	r3, [r0], #4</div><div class='ctx'> #ifdef CONFIG_ARM_LPAE</div><div class='ctx'> 	str	r7, [r0], #4</div><div class='ctx'> #endif</div><div class='del'>-	add	r3, r3, #1 &lt;&lt; SECTION_SHIFT</div><div class='del'>-	cmp	r0, r6</div><div class='del'>-	blo	1b</div><div class='ctx'> </div><div class='ctx'> #else /* CONFIG_DEBUG_ICEDCC || CONFIG_DEBUG_SEMIHOSTING */</div><div class='ctx'> 	/* we don't need any serial debugging mappings */</div><div class='head'>diff --git a/arch/arm/kernel/init_task.c b/arch/arm/kernel/init_task.c<br/>deleted file mode 100644<br/>index e7cbb50dc356..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,37 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/arm/kernel/init_task.c</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-#include &lt;linux/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is 8192-byte aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by making sure</div><div class='del'>- * the linker maps this in the .text segment right after head.S,</div><div class='del'>- * and making head.S ensure the proper alignment.</div><div class='del'>- *</div><div class='del'>- * The things we do for performance..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c<br/>index 71ccdbfed662..8349d4e97e2b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/irq.c</a></div><div class='hunk'>@@ -155,10 +155,10 @@ static bool migrate_one_irq(struct irq_desc *desc)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	c = irq_data_get_irq_chip(d);</div><div class='del'>-	if (c-&gt;irq_set_affinity)</div><div class='del'>-		c-&gt;irq_set_affinity(d, affinity, true);</div><div class='del'>-	else</div><div class='add'>+	if (!c-&gt;irq_set_affinity)</div><div class='ctx'> 		pr_debug("IRQ%u: unable to set affinity\n", d-&gt;irq);</div><div class='add'>+	else if (c-&gt;irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK &amp;&amp; ret)</div><div class='add'>+		cpumask_copy(d-&gt;affinity, affinity);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c<br/>index b78af0cc6ef3..ab627a740fa3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_v6.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/perf_event_v6.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_v6.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/perf_event_v6.c</a></div><div class='hunk'>@@ -489,8 +489,6 @@ armv6pmu_handle_irq(int irq_num,</div><div class='ctx'> 	 */</div><div class='ctx'> 	armv6_pmcr_write(pmcr);</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0);</div><div class='del'>-</div><div class='ctx'> 	cpuc = &amp;__get_cpu_var(cpu_hw_events);</div><div class='ctx'> 	for (idx = 0; idx &lt; cpu_pmu-&gt;num_events; ++idx) {</div><div class='ctx'> 		struct perf_event *event = cpuc-&gt;events[idx];</div><div class='hunk'>@@ -509,7 +507,7 @@ armv6pmu_handle_irq(int irq_num,</div><div class='ctx'> </div><div class='ctx'> 		hwc = &amp;event-&gt;hw;</div><div class='ctx'> 		armpmu_event_update(event, hwc, idx);</div><div class='del'>-		data.period = event-&gt;hw.last_period;</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='ctx'> 		if (!armpmu_event_set_period(event, hwc, idx))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c<br/>index 00755d82e2f2..d3c536068162 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_v7.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/perf_event_v7.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_v7.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/perf_event_v7.c</a></div><div class='hunk'>@@ -1077,8 +1077,6 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	regs = get_irq_regs();</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0);</div><div class='del'>-</div><div class='ctx'> 	cpuc = &amp;__get_cpu_var(cpu_hw_events);</div><div class='ctx'> 	for (idx = 0; idx &lt; cpu_pmu-&gt;num_events; ++idx) {</div><div class='ctx'> 		struct perf_event *event = cpuc-&gt;events[idx];</div><div class='hunk'>@@ -1097,7 +1095,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)</div><div class='ctx'> </div><div class='ctx'> 		hwc = &amp;event-&gt;hw;</div><div class='ctx'> 		armpmu_event_update(event, hwc, idx);</div><div class='del'>-		data.period = event-&gt;hw.last_period;</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='ctx'> 		if (!armpmu_event_set_period(event, hwc, idx))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c<br/>index 71a21e6712f5..e34e7254e652 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_xscale.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/perf_event_xscale.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/perf_event_xscale.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/perf_event_xscale.c</a></div><div class='hunk'>@@ -248,8 +248,6 @@ xscale1pmu_handle_irq(int irq_num, void *dev)</div><div class='ctx'> </div><div class='ctx'> 	regs = get_irq_regs();</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0);</div><div class='del'>-</div><div class='ctx'> 	cpuc = &amp;__get_cpu_var(cpu_hw_events);</div><div class='ctx'> 	for (idx = 0; idx &lt; cpu_pmu-&gt;num_events; ++idx) {</div><div class='ctx'> 		struct perf_event *event = cpuc-&gt;events[idx];</div><div class='hunk'>@@ -263,7 +261,7 @@ xscale1pmu_handle_irq(int irq_num, void *dev)</div><div class='ctx'> </div><div class='ctx'> 		hwc = &amp;event-&gt;hw;</div><div class='ctx'> 		armpmu_event_update(event, hwc, idx);</div><div class='del'>-		data.period = event-&gt;hw.last_period;</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='ctx'> 		if (!armpmu_event_set_period(event, hwc, idx))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -588,8 +586,6 @@ xscale2pmu_handle_irq(int irq_num, void *dev)</div><div class='ctx'> </div><div class='ctx'> 	regs = get_irq_regs();</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0);</div><div class='del'>-</div><div class='ctx'> 	cpuc = &amp;__get_cpu_var(cpu_hw_events);</div><div class='ctx'> 	for (idx = 0; idx &lt; cpu_pmu-&gt;num_events; ++idx) {</div><div class='ctx'> 		struct perf_event *event = cpuc-&gt;events[idx];</div><div class='hunk'>@@ -603,7 +599,7 @@ xscale2pmu_handle_irq(int irq_num, void *dev)</div><div class='ctx'> </div><div class='ctx'> 		hwc = &amp;event-&gt;hw;</div><div class='ctx'> 		armpmu_event_update(event, hwc, idx);</div><div class='del'>-		data.period = event-&gt;hw.last_period;</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='ctx'> 		if (!armpmu_event_set_period(event, hwc, idx))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c<br/>index 2b7b017a20cd..19c95ea65b2f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/process.c</a></div><div class='hunk'>@@ -157,26 +157,6 @@ EXPORT_SYMBOL(pm_power_off);</div><div class='ctx'> void (*arm_pm_restart)(char str, const char *cmd) = null_restart;</div><div class='ctx'> EXPORT_SYMBOL_GPL(arm_pm_restart);</div><div class='ctx'> </div><div class='del'>-static void do_nothing(void *unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * cpu_idle_wait - Used to ensure that all the CPUs discard old value of</div><div class='del'>- * pm_idle and update to new pm_idle value. Required while changing pm_idle</div><div class='del'>- * handler on SMP systems.</div><div class='del'>- *</div><div class='del'>- * Caller must have changed pm_idle to the new value before the call. Old</div><div class='del'>- * pm_idle value will not be used by any CPU after the return of this function.</div><div class='del'>- */</div><div class='del'>-void cpu_idle_wait(void)</div><div class='del'>-{</div><div class='del'>-	smp_mb();</div><div class='del'>-	/* kick all the CPUs so that they exit out of pm_idle */</div><div class='del'>-	smp_call_function(do_nothing, NULL, 1);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cpu_idle_wait);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This is our default idle handler.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c<br/>index 80abafb9bf33..5700a7ae7f0b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/ptrace.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/ptrace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/ptrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/ptrace.c</a></div><div class='hunk'>@@ -24,6 +24,8 @@</div><div class='ctx'> #include &lt;linux/hw_breakpoint.h&gt;</div><div class='ctx'> #include &lt;linux/regset.h&gt;</div><div class='ctx'> #include &lt;linux/audit.h&gt;</div><div class='add'>+#include &lt;linux/tracehook.h&gt;</div><div class='add'>+#include &lt;linux/unistd.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='hunk'>@@ -906,49 +908,35 @@ long arch_ptrace(struct task_struct *child, long request,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef __ARMEB__</div><div class='del'>-#define AUDIT_ARCH_NR AUDIT_ARCH_ARMEB</div><div class='del'>-#else</div><div class='del'>-#define AUDIT_ARCH_NR AUDIT_ARCH_ARM</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ip;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Save IP.  IP is used to denote syscall entry/exit:</div><div class='del'>-	 *  IP = 0 -&gt; entry, = 1 -&gt; exit</div><div class='del'>-	 */</div><div class='del'>-	ip = regs-&gt;ARM_ip;</div><div class='del'>-	regs-&gt;ARM_ip = why;</div><div class='del'>-</div><div class='del'>-	if (!ip)</div><div class='add'>+	if (why)</div><div class='ctx'> 		audit_syscall_exit(regs);</div><div class='ctx'> 	else</div><div class='del'>-		audit_syscall_entry(AUDIT_ARCH_NR, scno, regs-&gt;ARM_r0,</div><div class='add'>+		audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs-&gt;ARM_r0,</div><div class='ctx'> 				    regs-&gt;ARM_r1, regs-&gt;ARM_r2, regs-&gt;ARM_r3);</div><div class='ctx'> </div><div class='add'>+	if (why == 0 &amp;&amp; test_and_clear_thread_flag(TIF_SYSCALL_RESTARTSYS))</div><div class='add'>+		scno = __NR_restart_syscall - __NR_SYSCALL_BASE;</div><div class='ctx'> 	if (!test_thread_flag(TIF_SYSCALL_TRACE))</div><div class='ctx'> 		return scno;</div><div class='del'>-	if (!(current-&gt;ptrace &amp; PT_PTRACED))</div><div class='del'>-		return scno;</div><div class='ctx'> </div><div class='ctx'> 	current_thread_info()-&gt;syscall = scno;</div><div class='ctx'> </div><div class='del'>-	/* the 0x80 provides a way for the tracing parent to distinguish</div><div class='del'>-	   between a syscall stop and SIGTRAP delivery */</div><div class='del'>-	ptrace_notify(SIGTRAP | ((current-&gt;ptrace &amp; PT_TRACESYSGOOD)</div><div class='del'>-				 ? 0x80 : 0));</div><div class='ctx'> 	/*</div><div class='del'>-	 * this isn't the same as continuing with a signal, but it will do</div><div class='del'>-	 * for normal use.  strace only continues with a signal if the</div><div class='del'>-	 * stopping signal is not SIGTRAP.  -brl</div><div class='add'>+	 * IP is used to denote syscall entry/exit:</div><div class='add'>+	 * IP = 0 -&gt; entry, =1 -&gt; exit</div><div class='ctx'> 	 */</div><div class='del'>-	if (current-&gt;exit_code) {</div><div class='del'>-		send_sig(current-&gt;exit_code, current, 1);</div><div class='del'>-		current-&gt;exit_code = 0;</div><div class='del'>-	}</div><div class='add'>+	ip = regs-&gt;ARM_ip;</div><div class='add'>+	regs-&gt;ARM_ip = why;</div><div class='add'>+</div><div class='add'>+	if (why)</div><div class='add'>+		tracehook_report_syscall_exit(regs, 0);</div><div class='add'>+	else if (tracehook_report_syscall_entry(regs))</div><div class='add'>+		current_thread_info()-&gt;syscall = -1;</div><div class='add'>+</div><div class='ctx'> 	regs-&gt;ARM_ip = ip;</div><div class='ctx'> </div><div class='ctx'> 	return current_thread_info()-&gt;syscall;</div><div class='head'>diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c<br/>index ebfac782593f..e15d83bb4ea3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/setup.c</a></div><div class='hunk'>@@ -81,6 +81,7 @@ __setup("fpe=", fpe_setup);</div><div class='ctx'> extern void paging_init(struct machine_desc *desc);</div><div class='ctx'> extern void sanity_check_meminfo(void);</div><div class='ctx'> extern void reboot_setup(char *str);</div><div class='add'>+extern void setup_dma_zone(struct machine_desc *desc);</div><div class='ctx'> </div><div class='ctx'> unsigned int processor_id;</div><div class='ctx'> EXPORT_SYMBOL(processor_id);</div><div class='hunk'>@@ -800,6 +801,14 @@ static int __init customize_machine(void)</div><div class='ctx'> }</div><div class='ctx'> arch_initcall(customize_machine);</div><div class='ctx'> </div><div class='add'>+static int __init init_machine_late(void)</div><div class='add'>+{</div><div class='add'>+	if (machine_desc-&gt;init_late)</div><div class='add'>+		machine_desc-&gt;init_late();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+late_initcall(init_machine_late);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_KEXEC</div><div class='ctx'> static inline unsigned long long get_total_mem(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -939,12 +948,8 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	machine_desc = mdesc;</div><div class='ctx'> 	machine_name = mdesc-&gt;name;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ZONE_DMA</div><div class='del'>-	if (mdesc-&gt;dma_zone_size) {</div><div class='del'>-		extern unsigned long arm_dma_zone_size;</div><div class='del'>-		arm_dma_zone_size = mdesc-&gt;dma_zone_size;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='add'>+	setup_dma_zone(mdesc);</div><div class='add'>+</div><div class='ctx'> 	if (mdesc-&gt;restart_mode)</div><div class='ctx'> 		reboot_setup(&amp;mdesc-&gt;restart_mode);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c<br/>index 7cb532fc8aa4..fd2392a17ac1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/signal.c</a></div><div class='hunk'>@@ -22,14 +22,11 @@</div><div class='ctx'> </div><div class='ctx'> #include "signal.h"</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * For ARM syscalls, we encode the syscall number into the instruction.</div><div class='ctx'>  */</div><div class='ctx'> #define SWI_SYS_SIGRETURN	(0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE))</div><div class='ctx'> #define SWI_SYS_RT_SIGRETURN	(0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE))</div><div class='del'>-#define SWI_SYS_RESTART		(0xef000000|__NR_restart_syscall|__NR_OABI_SYSCALL_BASE)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * With EABI, the syscall number has to be loaded into r7.</div><div class='hunk'>@@ -50,34 +47,13 @@ const unsigned long sigreturn_codes[7] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Either we support OABI only, or we have EABI with the OABI</div><div class='del'>- * compat layer enabled.  In the later case we don't know if</div><div class='del'>- * user space is EABI or not, and if not we must not clobber r7.</div><div class='del'>- * Always using the OABI syscall solves that issue and works for</div><div class='del'>- * all those cases.</div><div class='del'>- */</div><div class='del'>-const unsigned long syscall_restart_code[2] = {</div><div class='del'>-	SWI_SYS_RESTART,	/* swi	__NR_restart_syscall */</div><div class='del'>-	0xe49df004,		/* ldr	pc, [sp], #4 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * atomically swap in the new signal mask, and wait for a signal.</div><div class='ctx'>  */</div><div class='ctx'> asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask)</div><div class='ctx'> {</div><div class='ctx'> 	sigset_t blocked;</div><div class='del'>-</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='ctx'> 	siginitset(&amp;blocked, mask);</div><div class='del'>-	set_current_blocked(&amp;blocked);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_restore_sigmask();</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage int </div><div class='hunk'>@@ -91,10 +67,10 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='ctx'> 		old_sigset_t mask;</div><div class='ctx'> 		if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='ctx'> 		    __get_user(new_ka.sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer))</div><div class='add'>+		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='add'>+		    __get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='add'>+		    __get_user(mask, &amp;act-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags);</div><div class='del'>-		__get_user(mask, &amp;act-&gt;sa_mask);</div><div class='ctx'> 		siginitset(&amp;new_ka.sa.sa_mask, mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -103,10 +79,10 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='ctx'> 	if (!ret &amp;&amp; oact) {</div><div class='ctx'> 		if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||</div><div class='ctx'> 		    __put_user(old_ka.sa.sa_handler, &amp;oact-&gt;sa_handler) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer))</div><div class='add'>+		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags);</div><div class='del'>-		__put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -180,44 +156,23 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame)</div><div class='ctx'> </div><div class='ctx'> static int preserve_vfp_context(struct vfp_sigframe __user *frame)</div><div class='ctx'> {</div><div class='del'>-	struct thread_info *thread = current_thread_info();</div><div class='del'>-	struct vfp_hard_struct *h = &amp;thread-&gt;vfpstate.hard;</div><div class='ctx'> 	const unsigned long magic = VFP_MAGIC;</div><div class='ctx'> 	const unsigned long size = VFP_STORAGE_SIZE;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	vfp_sync_hwstate(thread);</div><div class='ctx'> 	__put_user_error(magic, &amp;frame-&gt;magic, err);</div><div class='ctx'> 	__put_user_error(size, &amp;frame-&gt;size, err);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Copy the floating point registers. There can be unused</div><div class='del'>-	 * registers see asm/hwcap.h for details.</div><div class='del'>-	 */</div><div class='del'>-	err |= __copy_to_user(&amp;frame-&gt;ufp.fpregs, &amp;h-&gt;fpregs,</div><div class='del'>-			      sizeof(h-&gt;fpregs));</div><div class='del'>-	/*</div><div class='del'>-	 * Copy the status and control register.</div><div class='del'>-	 */</div><div class='del'>-	__put_user_error(h-&gt;fpscr, &amp;frame-&gt;ufp.fpscr, err);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Copy the exception registers.</div><div class='del'>-	 */</div><div class='del'>-	__put_user_error(h-&gt;fpexc, &amp;frame-&gt;ufp_exc.fpexc, err);</div><div class='del'>-	__put_user_error(h-&gt;fpinst, &amp;frame-&gt;ufp_exc.fpinst, err);</div><div class='del'>-	__put_user_error(h-&gt;fpinst2, &amp;frame-&gt;ufp_exc.fpinst2, err);</div><div class='add'>+	if (err)</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	return err ? -EFAULT : 0;</div><div class='add'>+	return vfp_preserve_user_clear_hwstate(&amp;frame-&gt;ufp, &amp;frame-&gt;ufp_exc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int restore_vfp_context(struct vfp_sigframe __user *frame)</div><div class='ctx'> {</div><div class='del'>-	struct thread_info *thread = current_thread_info();</div><div class='del'>-	struct vfp_hard_struct *h = &amp;thread-&gt;vfpstate.hard;</div><div class='ctx'> 	unsigned long magic;</div><div class='ctx'> 	unsigned long size;</div><div class='del'>-	unsigned long fpexc;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	__get_user_error(magic, &amp;frame-&gt;magic, err);</div><div class='hunk'>@@ -228,33 +183,7 @@ static int restore_vfp_context(struct vfp_sigframe __user *frame)</div><div class='ctx'> 	if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	vfp_flush_hwstate(thread);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Copy the floating point registers. There can be unused</div><div class='del'>-	 * registers see asm/hwcap.h for details.</div><div class='del'>-	 */</div><div class='del'>-	err |= __copy_from_user(&amp;h-&gt;fpregs, &amp;frame-&gt;ufp.fpregs,</div><div class='del'>-				sizeof(h-&gt;fpregs));</div><div class='del'>-	/*</div><div class='del'>-	 * Copy the status and control register.</div><div class='del'>-	 */</div><div class='del'>-	__get_user_error(h-&gt;fpscr, &amp;frame-&gt;ufp.fpscr, err);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Sanitise and restore the exception registers.</div><div class='del'>-	 */</div><div class='del'>-	__get_user_error(fpexc, &amp;frame-&gt;ufp_exc.fpexc, err);</div><div class='del'>-	/* Ensure the VFP is enabled. */</div><div class='del'>-	fpexc |= FPEXC_EN;</div><div class='del'>-	/* Ensure FPINST2 is invalid and the exception flag is cleared. */</div><div class='del'>-	fpexc &amp;= ~(FPEXC_EX | FPEXC_FP2V);</div><div class='del'>-	h-&gt;fpexc = fpexc;</div><div class='del'>-</div><div class='del'>-	__get_user_error(h-&gt;fpinst, &amp;frame-&gt;ufp_exc.fpinst, err);</div><div class='del'>-	__get_user_error(h-&gt;fpinst2, &amp;frame-&gt;ufp_exc.fpinst2, err);</div><div class='del'>-</div><div class='del'>-	return err ? -EFAULT : 0;</div><div class='add'>+	return vfp_restore_user_hwstate(&amp;frame-&gt;ufp, &amp;frame-&gt;ufp_exc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='hunk'>@@ -279,10 +208,8 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = __copy_from_user(&amp;set, &amp;sf-&gt;uc.uc_sigmask, sizeof(set));</div><div class='del'>-	if (err == 0) {</div><div class='del'>-		sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='add'>+	if (err == 0)</div><div class='ctx'> 		set_current_blocked(&amp;set);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	__get_user_error(regs-&gt;ARM_r0, &amp;sf-&gt;uc.uc_mcontext.arm_r0, err);</div><div class='ctx'> 	__get_user_error(regs-&gt;ARM_r1, &amp;sf-&gt;uc.uc_mcontext.arm_r1, err);</div><div class='hunk'>@@ -597,13 +524,13 @@ setup_rt_frame(int usig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> /*</div><div class='ctx'>  * OK, we're invoking a handler</div><div class='ctx'>  */	</div><div class='del'>-static int</div><div class='add'>+static void</div><div class='ctx'> handle_signal(unsigned long sig, struct k_sigaction *ka,</div><div class='del'>-	      siginfo_t *info, sigset_t *oldset,</div><div class='del'>-	      struct pt_regs * regs)</div><div class='add'>+	      siginfo_t *info, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_info *thread = current_thread_info();</div><div class='ctx'> 	struct task_struct *tsk = current;</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	int usig = sig;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -628,15 +555,9 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,</div><div class='ctx'> </div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		force_sigsegv(sig, tsk);</div><div class='del'>-		return ret;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Block the signal if we were successful.</div><div class='del'>-	 */</div><div class='del'>-	block_sigmask(ka, sig);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -656,15 +577,6 @@ static void do_signal(struct pt_regs *regs, int syscall)</div><div class='ctx'> 	int signr;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * We want the common case to go fast, which</div><div class='del'>-	 * is why we may in certain cases get here from</div><div class='del'>-	 * kernel mode. Just return without doing anything</div><div class='del'>-	 * if so.</div><div class='del'>-	 */</div><div class='del'>-	if (!user_mode(regs))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * If we were from a system call, check for system call restarting...</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (syscall) {</div><div class='hunk'>@@ -680,58 +592,39 @@ static void do_signal(struct pt_regs *regs, int syscall)</div><div class='ctx'> 		case -ERESTARTNOHAND:</div><div class='ctx'> 		case -ERESTARTSYS:</div><div class='ctx'> 		case -ERESTARTNOINTR:</div><div class='add'>+		case -ERESTART_RESTARTBLOCK:</div><div class='ctx'> 			regs-&gt;ARM_r0 = regs-&gt;ARM_ORIG_r0;</div><div class='ctx'> 			regs-&gt;ARM_pc = restart_addr;</div><div class='ctx'> 			break;</div><div class='del'>-		case -ERESTART_RESTARTBLOCK:</div><div class='del'>-			regs-&gt;ARM_r0 = -EINTR;</div><div class='del'>-			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (try_to_freeze())</div><div class='del'>-		goto no_signal;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Get the signal to deliver.  When running under ptrace, at this</div><div class='ctx'> 	 * point the debugger may change all our registers ...</div><div class='ctx'> 	 */</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='del'>-		sigset_t *oldset;</div><div class='del'>-</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Depending on the signal settings we may need to revert the</div><div class='ctx'> 		 * decision to restart the system call.  But skip this if a</div><div class='ctx'> 		 * debugger has chosen to restart at a different PC.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (regs-&gt;ARM_pc == restart_addr) {</div><div class='del'>-			if (retval == -ERESTARTNOHAND</div><div class='add'>+			if (retval == -ERESTARTNOHAND ||</div><div class='add'>+			    retval == -ERESTART_RESTARTBLOCK</div><div class='ctx'> 			    || (retval == -ERESTARTSYS</div><div class='ctx'> 				&amp;&amp; !(ka.sa.sa_flags &amp; SA_RESTART))) {</div><div class='ctx'> 				regs-&gt;ARM_r0 = -EINTR;</div><div class='ctx'> 				regs-&gt;ARM_pc = continue_addr;</div><div class='ctx'> 			}</div><div class='add'>+			clear_thread_flag(TIF_SYSCALL_RESTARTSYS);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-			oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-		else</div><div class='del'>-			oldset = &amp;current-&gt;blocked;</div><div class='del'>-		if (handle_signal(signr, &amp;ka, &amp;info, oldset, regs) == 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * A signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag.</div><div class='del'>-			 */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		}</div><div class='add'>+		handle_signal(signr, &amp;ka, &amp;info, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>- no_signal:</div><div class='ctx'> 	if (syscall) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Handle restarting a different system call.  As above,</div><div class='hunk'>@@ -739,38 +632,11 @@ static void do_signal(struct pt_regs *regs, int syscall)</div><div class='ctx'> 		 * ignore the restart.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (retval == -ERESTART_RESTARTBLOCK</div><div class='del'>-		    &amp;&amp; regs-&gt;ARM_pc == continue_addr) {</div><div class='del'>-			if (thumb_mode(regs)) {</div><div class='del'>-				regs-&gt;ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE;</div><div class='del'>-				regs-&gt;ARM_pc -= 2;</div><div class='del'>-			} else {</div><div class='del'>-#if defined(CONFIG_AEABI) &amp;&amp; !defined(CONFIG_OABI_COMPAT)</div><div class='del'>-				regs-&gt;ARM_r7 = __NR_restart_syscall;</div><div class='del'>-				regs-&gt;ARM_pc -= 4;</div><div class='del'>-#else</div><div class='del'>-				u32 __user *usp;</div><div class='del'>-</div><div class='del'>-				regs-&gt;ARM_sp -= 4;</div><div class='del'>-				usp = (u32 __user *)regs-&gt;ARM_sp;</div><div class='del'>-</div><div class='del'>-				if (put_user(regs-&gt;ARM_pc, usp) == 0) {</div><div class='del'>-					regs-&gt;ARM_pc = KERN_RESTART_CODE;</div><div class='del'>-				} else {</div><div class='del'>-					regs-&gt;ARM_sp += 4;</div><div class='del'>-					force_sigsegv(0, current);</div><div class='del'>-				}</div><div class='del'>-#endif</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* If there's no signal to deliver, we just put the saved sigmask</div><div class='del'>-		 * back.</div><div class='del'>-		 */</div><div class='del'>-		if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-			clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-			sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-		}</div><div class='add'>+		    &amp;&amp; regs-&gt;ARM_pc == restart_addr)</div><div class='add'>+			set_thread_flag(TIF_SYSCALL_RESTARTSYS);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void</div><div class='hunk'>@@ -782,7 +648,5 @@ do_notify_resume(struct pt_regs *regs, unsigned int thread_flags, int syscall)</div><div class='ctx'> 	if (thread_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h<br/>index 6fcfe8398aa4..5ff067b7c752 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/signal.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/signal.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/signal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/signal.h</a></div><div class='hunk'>@@ -8,7 +8,5 @@</div><div class='ctx'>  * published by the Free Software Foundation.</div><div class='ctx'>  */</div><div class='ctx'> #define KERN_SIGRETURN_CODE	(CONFIG_VECTORS_BASE + 0x00000500)</div><div class='del'>-#define KERN_RESTART_CODE	(KERN_SIGRETURN_CODE + sizeof(sigreturn_codes))</div><div class='ctx'> </div><div class='ctx'> extern const unsigned long sigreturn_codes[7];</div><div class='del'>-extern const unsigned long syscall_restart_code[2];</div><div class='head'>diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c<br/>index addbbe8028c2..2c7217d971db 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/smp.c</a></div><div class='hunk'>@@ -60,32 +60,11 @@ enum ipi_msg_type {</div><div class='ctx'> </div><div class='ctx'> static DECLARE_COMPLETION(cpu_running);</div><div class='ctx'> </div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='del'>-	struct cpuinfo_arm *ci = &amp;per_cpu(cpu_data, cpu);</div><div class='del'>-	struct task_struct *idle = ci-&gt;idle;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Spawn a new process manually, if not already done.</div><div class='del'>-	 * Grab a pointer to its task struct so we can mess with it</div><div class='del'>-	 */</div><div class='del'>-	if (!idle) {</div><div class='del'>-		idle = fork_idle(cpu);</div><div class='del'>-		if (IS_ERR(idle)) {</div><div class='del'>-			printk(KERN_ERR "CPU%u: fork() failed\n", cpu);</div><div class='del'>-			return PTR_ERR(idle);</div><div class='del'>-		}</div><div class='del'>-		ci-&gt;idle = idle;</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * Since this idle thread is being re-used, call</div><div class='del'>-		 * init_idle() to reinitialize the thread structure.</div><div class='del'>-		 */</div><div class='del'>-		init_idle(idle, cpu);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * We need to tell the secondary core where to find</div><div class='ctx'> 	 * its stack and the page tables.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -130,7 +109,6 @@ static void percpu_timer_stop(void);</div><div class='ctx'> int __cpu_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cpu = smp_processor_id();</div><div class='del'>-	struct task_struct *p;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = platform_cpu_disable(cpu);</div><div class='hunk'>@@ -160,12 +138,7 @@ int __cpu_disable(void)</div><div class='ctx'> 	flush_cache_all();</div><div class='ctx'> 	local_flush_tlb_all();</div><div class='ctx'> </div><div class='del'>-	read_lock(&amp;tasklist_lock);</div><div class='del'>-	for_each_process(p) {</div><div class='del'>-		if (p-&gt;mm)</div><div class='del'>-			cpumask_clear_cpu(cpu, mm_cpumask(p-&gt;mm));</div><div class='del'>-	}</div><div class='del'>-	read_unlock(&amp;tasklist_lock);</div><div class='add'>+	clear_tasks_mm_cpumask(cpu);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -251,8 +224,6 @@ asmlinkage void __cpuinit secondary_start_kernel(void)</div><div class='ctx'> 	struct mm_struct *mm = &amp;init_mm;</div><div class='ctx'> 	unsigned int cpu = smp_processor_id();</div><div class='ctx'> </div><div class='del'>-	printk("CPU%u: Booted secondary processor\n", cpu);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * All kernel threads share the same mm context; grab a</div><div class='ctx'> 	 * reference and switch to it.</div><div class='hunk'>@@ -264,6 +235,8 @@ asmlinkage void __cpuinit secondary_start_kernel(void)</div><div class='ctx'> 	enter_lazy_tlb(mm, current);</div><div class='ctx'> 	local_flush_tlb_all();</div><div class='ctx'> </div><div class='add'>+	printk("CPU%u: Booted secondary processor\n", cpu);</div><div class='add'>+</div><div class='ctx'> 	cpu_init();</div><div class='ctx'> 	preempt_disable();</div><div class='ctx'> 	trace_hardirqs_off();</div><div class='hunk'>@@ -318,9 +291,6 @@ void __init smp_cpus_done(unsigned int max_cpus)</div><div class='ctx'> </div><div class='ctx'> void __init smp_prepare_boot_cpu(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned int cpu = smp_processor_id();</div><div class='del'>-</div><div class='del'>-	per_cpu(cpu_data, cpu).idle = current;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init smp_prepare_cpus(unsigned int max_cpus)</div><div class='hunk'>@@ -454,6 +424,9 @@ static struct local_timer_ops *lt_ops;</div><div class='ctx'> #ifdef CONFIG_LOCAL_TIMERS</div><div class='ctx'> int local_timer_register(struct local_timer_ops *ops)</div><div class='ctx'> {</div><div class='add'>+	if (!is_smp() || !setup_max_cpus)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='ctx'> 	if (lt_ops)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='hunk'>@@ -510,10 +483,6 @@ static void ipi_cpu_stop(unsigned int cpu)</div><div class='ctx'> 	local_fiq_disable();</div><div class='ctx'> 	local_irq_disable();</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_HOTPLUG_CPU</div><div class='del'>-	platform_cpu_kill(cpu);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	while (1)</div><div class='ctx'> 		cpu_relax();</div><div class='ctx'> }</div><div class='hunk'>@@ -576,17 +545,25 @@ void smp_send_reschedule(int cpu)</div><div class='ctx'> 	smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HOTPLUG_CPU</div><div class='add'>+static void smp_kill_cpus(cpumask_t *mask)</div><div class='add'>+{</div><div class='add'>+	unsigned int cpu;</div><div class='add'>+	for_each_cpu(cpu, mask)</div><div class='add'>+		platform_cpu_kill(cpu);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void smp_kill_cpus(cpumask_t *mask) { }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> void smp_send_stop(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long timeout;</div><div class='add'>+	struct cpumask mask;</div><div class='ctx'> </div><div class='del'>-	if (num_online_cpus() &gt; 1) {</div><div class='del'>-		struct cpumask mask;</div><div class='del'>-		cpumask_copy(&amp;mask, cpu_online_mask);</div><div class='del'>-		cpumask_clear_cpu(smp_processor_id(), &amp;mask);</div><div class='del'>-</div><div class='del'>-		smp_cross_call(&amp;mask, IPI_CPU_STOP);</div><div class='del'>-	}</div><div class='add'>+	cpumask_copy(&amp;mask, cpu_online_mask);</div><div class='add'>+	cpumask_clear_cpu(smp_processor_id(), &amp;mask);</div><div class='add'>+	smp_cross_call(&amp;mask, IPI_CPU_STOP);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait up to one second for other CPUs to stop */</div><div class='ctx'> 	timeout = USEC_PER_SEC;</div><div class='hunk'>@@ -595,6 +572,8 @@ void smp_send_stop(void)</div><div class='ctx'> </div><div class='ctx'> 	if (num_online_cpus() &gt; 1)</div><div class='ctx'> 		pr_warning("SMP: failed to stop secondary CPUs\n");</div><div class='add'>+</div><div class='add'>+	smp_kill_cpus(&amp;mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c<br/>index 8f5dd7963356..b9f015e843d8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/smp_scu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/smp_scu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/smp_scu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/smp_scu.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/smp_plat.h&gt;</div><div class='ctx'> #include &lt;asm/smp_scu.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/cputype.h&gt;</div><div class='hunk'>@@ -74,7 +75,7 @@ void scu_enable(void __iomem *scu_base)</div><div class='ctx'> int scu_power_mode(void __iomem *scu_base, unsigned int mode)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int val;</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='add'>+	int cpu = cpu_logical_map(smp_processor_id());</div><div class='ctx'> </div><div class='ctx'> 	if (mode &gt; 3 || mode == 1 || cpu &gt; 3)</div><div class='ctx'> 		return -EINVAL;</div><div class='head'>diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c<br/>index d2b177905cdb..76cbb055dd05 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/sys_arm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/sys_arm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/sys_arm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/sys_arm.c</a></div><div class='hunk'>@@ -115,7 +115,7 @@ int kernel_execve(const char *filename,</div><div class='ctx'> 		  "Ir" (THREAD_START_SP - sizeof(regs)),</div><div class='ctx'> 		  "r" (&amp;regs),</div><div class='ctx'> 		  "Ir" (sizeof(regs))</div><div class='del'>-		: "r0", "r1", "r2", "r3", "ip", "lr", "memory");</div><div class='add'>+		: "r0", "r1", "r2", "r3", "r8", "r9", "ip", "lr", "memory");</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c<br/>index af0aaebf4de6..3e94811690ce 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/sys_oabi-compat.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/sys_oabi-compat.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/sys_oabi-compat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/sys_oabi-compat.c</a></div><div class='hunk'>@@ -124,8 +124,8 @@ static long cp_oldabi_stat64(struct kstat *stat,</div><div class='ctx'> 	tmp.__st_ino = stat-&gt;ino;</div><div class='ctx'> 	tmp.st_mode = stat-&gt;mode;</div><div class='ctx'> 	tmp.st_nlink = stat-&gt;nlink;</div><div class='del'>-	tmp.st_uid = stat-&gt;uid;</div><div class='del'>-	tmp.st_gid = stat-&gt;gid;</div><div class='add'>+	tmp.st_uid = from_kuid_munged(current_user_ns(), stat-&gt;uid);</div><div class='add'>+	tmp.st_gid = from_kgid_munged(current_user_ns(), stat-&gt;gid);</div><div class='ctx'> 	tmp.st_rdev = huge_encode_dev(stat-&gt;rdev);</div><div class='ctx'> 	tmp.st_size = stat-&gt;size;</div><div class='ctx'> 	tmp.st_blocks = stat-&gt;blocks;</div><div class='head'>diff --git a/arch/arm/kernel/thumbee.c b/arch/arm/kernel/thumbee.c<br/>index aab899764053..7b8403b76666 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/thumbee.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/thumbee.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/thumbee.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/thumbee.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/cputype.h&gt;</div><div class='ctx'> #include &lt;asm/system_info.h&gt;</div><div class='ctx'> #include &lt;asm/thread_notify.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -67,8 +68,7 @@ static int __init thumbee_init(void)</div><div class='ctx'> 	if (cpu_arch &lt; CPU_ARCH_ARMv7)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* processor feature register 0 */</div><div class='del'>-	asm("mrc	p15, 0, %0, c0, c1, 0\n" : "=r" (pfr0));</div><div class='add'>+	pfr0 = read_cpuid_ext(CPUID_EXT_PFR0);</div><div class='ctx'> 	if ((pfr0 &amp; 0x0000f000) != 0x00001000)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c<br/>index fe31b22f18fd..af2afb019672 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/time.c</a></div><div class='hunk'>@@ -110,6 +110,42 @@ void timer_tick(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static void dummy_clock_access(struct timespec *ts)</div><div class='add'>+{</div><div class='add'>+	ts-&gt;tv_sec = 0;</div><div class='add'>+	ts-&gt;tv_nsec = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static clock_access_fn __read_persistent_clock = dummy_clock_access;</div><div class='add'>+static clock_access_fn __read_boot_clock = dummy_clock_access;;</div><div class='add'>+</div><div class='add'>+void read_persistent_clock(struct timespec *ts)</div><div class='add'>+{</div><div class='add'>+	__read_persistent_clock(ts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void read_boot_clock(struct timespec *ts)</div><div class='add'>+{</div><div class='add'>+	__read_boot_clock(ts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init register_persistent_clock(clock_access_fn read_boot,</div><div class='add'>+				     clock_access_fn read_persistent)</div><div class='add'>+{</div><div class='add'>+	/* Only allow the clockaccess functions to be registered once */</div><div class='add'>+	if (__read_persistent_clock == dummy_clock_access &amp;&amp;</div><div class='add'>+	    __read_boot_clock == dummy_clock_access) {</div><div class='add'>+		if (read_boot)</div><div class='add'>+			__read_boot_clock = read_boot;</div><div class='add'>+		if (read_persistent)</div><div class='add'>+			__read_persistent_clock = read_persistent;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #if defined(CONFIG_PM) &amp;&amp; !defined(CONFIG_GENERIC_CLOCKEVENTS)</div><div class='ctx'> static int timer_suspend(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c<br/>index 778454750a6c..4928d89758f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/kernel/traps.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/kernel/traps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/kernel/traps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/kernel/traps.c</a></div><div class='hunk'>@@ -479,14 +479,14 @@ static int bad_syscall(int n, struct pt_regs *regs)</div><div class='ctx'> 	return regs-&gt;ARM_r0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void</div><div class='add'>+static inline int</div><div class='ctx'> do_cache_op(unsigned long start, unsigned long end, int flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct mm_struct *mm = current-&gt;active_mm;</div><div class='ctx'> 	struct vm_area_struct *vma;</div><div class='ctx'> </div><div class='ctx'> 	if (end &lt; start || flags)</div><div class='del'>-		return;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	down_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	vma = find_vma(mm, start);</div><div class='hunk'>@@ -496,9 +496,11 @@ do_cache_op(unsigned long start, unsigned long end, int flags)</div><div class='ctx'> 		if (end &gt; vma-&gt;vm_end)</div><div class='ctx'> 			end = vma-&gt;vm_end;</div><div class='ctx'> </div><div class='del'>-		flush_cache_user_range(vma, start, end);</div><div class='add'>+		up_read(&amp;mm-&gt;mmap_sem);</div><div class='add'>+		return flush_cache_user_range(start, end);</div><div class='ctx'> 	}</div><div class='ctx'> 	up_read(&amp;mm-&gt;mmap_sem);</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -544,8 +546,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)</div><div class='ctx'> 	 * the specified region).</div><div class='ctx'> 	 */</div><div class='ctx'> 	case NR(cacheflush):</div><div class='del'>-		do_cache_op(regs-&gt;ARM_r0, regs-&gt;ARM_r1, regs-&gt;ARM_r2);</div><div class='del'>-		return 0;</div><div class='add'>+		return do_cache_op(regs-&gt;ARM_r0, regs-&gt;ARM_r1, regs-&gt;ARM_r2);</div><div class='ctx'> </div><div class='ctx'> 	case NR(usr26):</div><div class='ctx'> 		if (!(elf_hwcap &amp; HWCAP_26BIT))</div><div class='hunk'>@@ -819,8 +820,6 @@ void __init early_trap_init(void *vectors_base)</div><div class='ctx'> 	 */</div><div class='ctx'> 	memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE),</div><div class='ctx'> 	       sigreturn_codes, sizeof(sigreturn_codes));</div><div class='del'>-	memcpy((void *)(vectors + KERN_RESTART_CODE - CONFIG_VECTORS_BASE),</div><div class='del'>-	       syscall_restart_code, sizeof(syscall_restart_code));</div><div class='ctx'> </div><div class='ctx'> 	flush_icache_range(vectors, vectors + PAGE_SIZE);</div><div class='ctx'> 	modify_domain(DOMAIN_USER, DOMAIN_CLIENT);</div><div class='head'>diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile<br/>index 0ade0acc1ed9..992769ae2599 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/lib/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/lib/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/lib/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/lib/Makefile</a></div><div class='hunk'>@@ -17,30 +17,13 @@ lib-y		:= backtrace.o changebit.o csumipv6.o csumpartial.o   \</div><div class='ctx'> 		   call_with_stack.o</div><div class='ctx'> </div><div class='ctx'> mmu-y	:= clear_user.o copy_page.o getuser.o putuser.o</div><div class='del'>-</div><div class='del'>-# the code in uaccess.S is not preemption safe and</div><div class='del'>-# probably faster on ARMv3 only</div><div class='del'>-ifeq ($(CONFIG_PREEMPT),y)</div><div class='del'>-  mmu-y	+= copy_from_user.o copy_to_user.o</div><div class='del'>-else</div><div class='del'>-ifneq ($(CONFIG_CPU_32v3),y)</div><div class='del'>-  mmu-y	+= copy_from_user.o copy_to_user.o</div><div class='del'>-else</div><div class='del'>-  mmu-y	+= uaccess.o</div><div class='del'>-endif</div><div class='del'>-endif</div><div class='add'>+mmu-y	+= copy_from_user.o copy_to_user.o</div><div class='ctx'> </div><div class='ctx'> # using lib_ here won't override already available weak symbols</div><div class='ctx'> obj-$(CONFIG_UACCESS_WITH_MEMCPY) += uaccess_with_memcpy.o</div><div class='ctx'> </div><div class='del'>-lib-$(CONFIG_MMU) += $(mmu-y)</div><div class='del'>-</div><div class='del'>-ifeq ($(CONFIG_CPU_32v3),y)</div><div class='del'>-  lib-y	+= io-readsw-armv3.o io-writesw-armv3.o</div><div class='del'>-else</div><div class='del'>-  lib-y	+= io-readsw-armv4.o io-writesw-armv4.o</div><div class='del'>-endif</div><div class='del'>-</div><div class='add'>+lib-$(CONFIG_MMU)		+= $(mmu-y)</div><div class='add'>+lib-y				+= io-readsw-armv4.o io-writesw-armv4.o</div><div class='ctx'> lib-$(CONFIG_ARCH_RPC)		+= ecard.o io-acorn.o floppydma.o</div><div class='ctx'> lib-$(CONFIG_ARCH_SHARK)	+= io-shark.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S<br/>deleted file mode 100644<br/>index 88487c8c4f23..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/lib/io-readsw-armv3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/lib/io-readsw-armv3.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,106 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/arm/lib/io-readsw-armv3.S</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1995-2000 Russell King</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-.Linsw_bad_alignment:</div><div class='del'>-		adr	r0, .Linsw_bad_align_msg</div><div class='del'>-		mov	r2, lr</div><div class='del'>-		b	panic</div><div class='del'>-.Linsw_bad_align_msg:</div><div class='del'>-		.asciz	"insw: bad buffer alignment (0x%p, lr=0x%08lX)\n"</div><div class='del'>-		.align</div><div class='del'>-</div><div class='del'>-.Linsw_align:	tst	r1, #1</div><div class='del'>-		bne	.Linsw_bad_alignment</div><div class='del'>-</div><div class='del'>-		ldr	r3, [r0]</div><div class='del'>-		strb	r3, [r1], #1</div><div class='del'>-		mov	r3, r3, lsr #8</div><div class='del'>-		strb	r3, [r1], #1</div><div class='del'>-</div><div class='del'>-		subs	r2, r2, #1</div><div class='del'>-		moveq	pc, lr</div><div class='del'>-</div><div class='del'>-ENTRY(__raw_readsw)</div><div class='del'>-		teq	r2, #0		@ do we have to check for the zero len?</div><div class='del'>-		moveq	pc, lr</div><div class='del'>-		tst	r1, #3</div><div class='del'>-		bne	.Linsw_align</div><div class='del'>-</div><div class='del'>-.Linsw_aligned:	mov	ip, #0xff</div><div class='del'>-		orr	ip, ip, ip, lsl #8</div><div class='del'>-		stmfd	sp!, {r4, r5, r6, lr}</div><div class='del'>-</div><div class='del'>-		subs	r2, r2, #8</div><div class='del'>-		bmi	.Lno_insw_8</div><div class='del'>-</div><div class='del'>-.Linsw_8_lp:	ldr	r3, [r0]</div><div class='del'>-		and	r3, r3, ip</div><div class='del'>-		ldr	r4, [r0]</div><div class='del'>-		orr	r3, r3, r4, lsl #16</div><div class='del'>-</div><div class='del'>-		ldr	r4, [r0]</div><div class='del'>-		and	r4, r4, ip</div><div class='del'>-		ldr	r5, [r0]</div><div class='del'>-		orr	r4, r4, r5, lsl #16</div><div class='del'>-</div><div class='del'>-		ldr	r5, [r0]</div><div class='del'>-		and	r5, r5, ip</div><div class='del'>-		ldr	r6, [r0]</div><div class='del'>-		orr	r5, r5, r6, lsl #16</div><div class='del'>-</div><div class='del'>-		ldr	r6, [r0]</div><div class='del'>-		and	r6, r6, ip</div><div class='del'>-		ldr	lr, [r0]</div><div class='del'>-		orr	r6, r6, lr, lsl #16</div><div class='del'>-</div><div class='del'>-		stmia	r1!, {r3 - r6}</div><div class='del'>-</div><div class='del'>-		subs	r2, r2, #8</div><div class='del'>-		bpl	.Linsw_8_lp</div><div class='del'>-</div><div class='del'>-		tst	r2, #7</div><div class='del'>-		ldmeqfd	sp!, {r4, r5, r6, pc}</div><div class='del'>-</div><div class='del'>-.Lno_insw_8:	tst	r2, #4</div><div class='del'>-		beq	.Lno_insw_4</div><div class='del'>-</div><div class='del'>-		ldr	r3, [r0]</div><div class='del'>-		and	r3, r3, ip</div><div class='del'>-		ldr	r4, [r0]</div><div class='del'>-		orr	r3, r3, r4, lsl #16</div><div class='del'>-</div><div class='del'>-		ldr	r4, [r0]</div><div class='del'>-		and	r4, r4, ip</div><div class='del'>-		ldr	r5, [r0]</div><div class='del'>-		orr	r4, r4, r5, lsl #16</div><div class='del'>-</div><div class='del'>-		stmia	r1!, {r3, r4}</div><div class='del'>-</div><div class='del'>-.Lno_insw_4:	tst	r2, #2</div><div class='del'>-		beq	.Lno_insw_2</div><div class='del'>-</div><div class='del'>-		ldr	r3, [r0]</div><div class='del'>-		and	r3, r3, ip</div><div class='del'>-		ldr	r4, [r0]</div><div class='del'>-		orr	r3, r3, r4, lsl #16</div><div class='del'>-</div><div class='del'>-		str	r3, [r1], #4</div><div class='del'>-</div><div class='del'>-.Lno_insw_2:	tst	r2, #1</div><div class='del'>-		ldrne	r3, [r0]</div><div class='del'>-		strneb	r3, [r1], #1</div><div class='del'>-		movne	r3, r3, lsr #8</div><div class='del'>-		strneb	r3, [r1]</div><div class='del'>-</div><div class='del'>-		ldmfd	sp!, {r4, r5, r6, pc}</div><div class='del'>-</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S<br/>deleted file mode 100644<br/>index 49b800419e32..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/lib/io-writesw-armv3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/lib/io-writesw-armv3.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,126 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/arm/lib/io-writesw-armv3.S</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1995-2000 Russell King</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-</div><div class='del'>-.Loutsw_bad_alignment:</div><div class='del'>-		adr	r0, .Loutsw_bad_align_msg</div><div class='del'>-		mov	r2, lr</div><div class='del'>-		b	panic</div><div class='del'>-.Loutsw_bad_align_msg:</div><div class='del'>-		.asciz	"outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"</div><div class='del'>-		.align</div><div class='del'>-</div><div class='del'>-.Loutsw_align:	tst	r1, #1</div><div class='del'>-		bne	.Loutsw_bad_alignment</div><div class='del'>-</div><div class='del'>-		add	r1, r1, #2</div><div class='del'>-</div><div class='del'>-		ldr	r3, [r1, #-4]</div><div class='del'>-		mov	r3, r3, lsr #16</div><div class='del'>-		orr	r3, r3, r3, lsl #16</div><div class='del'>-		str	r3, [r0]</div><div class='del'>-		subs	r2, r2, #1</div><div class='del'>-		moveq	pc, lr</div><div class='del'>-</div><div class='del'>-ENTRY(__raw_writesw)</div><div class='del'>-		teq	r2, #0		@ do we have to check for the zero len?</div><div class='del'>-		moveq	pc, lr</div><div class='del'>-		tst	r1, #3</div><div class='del'>-		bne	.Loutsw_align</div><div class='del'>-</div><div class='del'>-		stmfd	sp!, {r4, r5, r6, lr}</div><div class='del'>-</div><div class='del'>-		subs	r2, r2, #8</div><div class='del'>-		bmi	.Lno_outsw_8</div><div class='del'>-</div><div class='del'>-.Loutsw_8_lp:	ldmia	r1!, {r3, r4, r5, r6}</div><div class='del'>-</div><div class='del'>-		mov	ip, r3, lsl #16</div><div class='del'>-		orr	ip, ip, ip, lsr #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-		mov	ip, r3, lsr #16</div><div class='del'>-		orr	ip, ip, ip, lsl #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-		mov	ip, r4, lsl #16</div><div class='del'>-		orr	ip, ip, ip, lsr #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-		mov	ip, r4, lsr #16</div><div class='del'>-		orr	ip, ip, ip, lsl #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-		mov	ip, r5, lsl #16</div><div class='del'>-		orr	ip, ip, ip, lsr #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-		mov	ip, r5, lsr #16</div><div class='del'>-		orr	ip, ip, ip, lsl #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-		mov	ip, r6, lsl #16</div><div class='del'>-		orr	ip, ip, ip, lsr #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-		mov	ip, r6, lsr #16</div><div class='del'>-		orr	ip, ip, ip, lsl #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-		subs	r2, r2, #8</div><div class='del'>-		bpl	.Loutsw_8_lp</div><div class='del'>-</div><div class='del'>-		tst	r2, #7</div><div class='del'>-		ldmeqfd	sp!, {r4, r5, r6, pc}</div><div class='del'>-</div><div class='del'>-.Lno_outsw_8:	tst	r2, #4</div><div class='del'>-		beq	.Lno_outsw_4</div><div class='del'>-</div><div class='del'>-		ldmia	r1!, {r3, r4}</div><div class='del'>-</div><div class='del'>-		mov	ip, r3, lsl #16</div><div class='del'>-		orr	ip, ip, ip, lsr #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-		mov	ip, r3, lsr #16</div><div class='del'>-		orr	ip, ip, ip, lsl #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-		mov	ip, r4, lsl #16</div><div class='del'>-		orr	ip, ip, ip, lsr #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-		mov	ip, r4, lsr #16</div><div class='del'>-		orr	ip, ip, ip, lsl #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-.Lno_outsw_4:	tst	r2, #2</div><div class='del'>-		beq	.Lno_outsw_2</div><div class='del'>-</div><div class='del'>-		ldr	r3, [r1], #4</div><div class='del'>-</div><div class='del'>-		mov	ip, r3, lsl #16</div><div class='del'>-		orr	ip, ip, ip, lsr #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-		mov	ip, r3, lsr #16</div><div class='del'>-		orr	ip, ip, ip, lsl #16</div><div class='del'>-		str	ip, [r0]</div><div class='del'>-</div><div class='del'>-.Lno_outsw_2:	tst	r2, #1</div><div class='del'>-</div><div class='del'>-		ldrne	r3, [r1]</div><div class='del'>-</div><div class='del'>-		movne	ip, r3, lsl #16</div><div class='del'>-		orrne	ip, ip, ip, lsr #16</div><div class='del'>-		strne	ip, [r0]</div><div class='del'>-</div><div class='del'>-		ldmfd	sp!, {r4, r5, r6, pc}</div><div class='head'>diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S<br/>deleted file mode 100644<br/>index 5c908b1cb8ed..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/lib/uaccess.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/lib/uaccess.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,564 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/arm/lib/uaccess.S</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1995, 1996,1997,1998 Russell King</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Routines to block copy data to/from user memory</div><div class='del'>- *   These are highly optimised both for the 4k page size</div><div class='del'>- *   and for various alignments.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-#include &lt;asm/errno.h&gt;</div><div class='del'>-#include &lt;asm/domain.h&gt;</div><div class='del'>-</div><div class='del'>-		.text</div><div class='del'>-</div><div class='del'>-#define PAGE_SHIFT 12</div><div class='del'>-</div><div class='del'>-/* Prototype: int __copy_to_user(void *to, const char *from, size_t n)</div><div class='del'>- * Purpose  : copy a block to user memory from kernel memory</div><div class='del'>- * Params   : to   - user memory</div><div class='del'>- *          : from - kernel memory</div><div class='del'>- *          : n    - number of bytes to copy</div><div class='del'>- * Returns  : Number of bytes NOT copied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-.Lc2u_dest_not_aligned:</div><div class='del'>-		rsb	ip, ip, #4</div><div class='del'>-		cmp	ip, #2</div><div class='del'>-		ldrb	r3, [r1], #1</div><div class='del'>-USER(	TUSER(	strb)	r3, [r0], #1)			@ May fault</div><div class='del'>-		ldrgeb	r3, [r1], #1</div><div class='del'>-USER(	TUSER(	strgeb) r3, [r0], #1)			@ May fault</div><div class='del'>-		ldrgtb	r3, [r1], #1</div><div class='del'>-USER(	TUSER(	strgtb) r3, [r0], #1)			@ May fault</div><div class='del'>-		sub	r2, r2, ip</div><div class='del'>-		b	.Lc2u_dest_aligned</div><div class='del'>-</div><div class='del'>-ENTRY(__copy_to_user)</div><div class='del'>-		stmfd	sp!, {r2, r4 - r7, lr}</div><div class='del'>-		cmp	r2, #4</div><div class='del'>-		blt	.Lc2u_not_enough</div><div class='del'>-		ands	ip, r0, #3</div><div class='del'>-		bne	.Lc2u_dest_not_aligned</div><div class='del'>-.Lc2u_dest_aligned:</div><div class='del'>-</div><div class='del'>-		ands	ip, r1, #3</div><div class='del'>-		bne	.Lc2u_src_not_aligned</div><div class='del'>-/*</div><div class='del'>- * Seeing as there has to be at least 8 bytes to copy, we can</div><div class='del'>- * copy one word, and force a user-mode page fault...</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-.Lc2u_0fupi:	subs	r2, r2, #4</div><div class='del'>-		addmi	ip, r2, #4</div><div class='del'>-		bmi	.Lc2u_0nowords</div><div class='del'>-		ldr	r3, [r1], #4</div><div class='del'>-USER(	TUSER(	str)	r3, [r0], #4)			@ May fault</div><div class='del'>-		mov	ip, r0, lsl #32 - PAGE_SHIFT	@ On each page, use a ld/st??t instruction</div><div class='del'>-		rsb	ip, ip, #0</div><div class='del'>-		movs	ip, ip, lsr #32 - PAGE_SHIFT</div><div class='del'>-		beq	.Lc2u_0fupi</div><div class='del'>-/*</div><div class='del'>- * ip = max no. of bytes to copy before needing another "strt" insn</div><div class='del'>- */</div><div class='del'>-		cmp	r2, ip</div><div class='del'>-		movlt	ip, r2</div><div class='del'>-		sub	r2, r2, ip</div><div class='del'>-		subs	ip, ip, #32</div><div class='del'>-		blt	.Lc2u_0rem8lp</div><div class='del'>-</div><div class='del'>-.Lc2u_0cpy8lp:	ldmia	r1!, {r3 - r6}</div><div class='del'>-		stmia	r0!, {r3 - r6}			@ Shouldnt fault</div><div class='del'>-		ldmia	r1!, {r3 - r6}</div><div class='del'>-		subs	ip, ip, #32</div><div class='del'>-		stmia	r0!, {r3 - r6}			@ Shouldnt fault</div><div class='del'>-		bpl	.Lc2u_0cpy8lp</div><div class='del'>-</div><div class='del'>-.Lc2u_0rem8lp:	cmn	ip, #16</div><div class='del'>-		ldmgeia	r1!, {r3 - r6}</div><div class='del'>-		stmgeia	r0!, {r3 - r6}			@ Shouldnt fault</div><div class='del'>-		tst	ip, #8</div><div class='del'>-		ldmneia	r1!, {r3 - r4}</div><div class='del'>-		stmneia	r0!, {r3 - r4}			@ Shouldnt fault</div><div class='del'>-		tst	ip, #4</div><div class='del'>-		ldrne	r3, [r1], #4</div><div class='del'>-	TUSER(	strne) r3, [r0], #4			@ Shouldnt fault</div><div class='del'>-		ands	ip, ip, #3</div><div class='del'>-		beq	.Lc2u_0fupi</div><div class='del'>-.Lc2u_0nowords:	teq	ip, #0</div><div class='del'>-		beq	.Lc2u_finished</div><div class='del'>-.Lc2u_nowords:	cmp	ip, #2</div><div class='del'>-		ldrb	r3, [r1], #1</div><div class='del'>-USER(	TUSER(	strb)	r3, [r0], #1)			@ May fault</div><div class='del'>-		ldrgeb	r3, [r1], #1</div><div class='del'>-USER(	TUSER(	strgeb) r3, [r0], #1)			@ May fault</div><div class='del'>-		ldrgtb	r3, [r1], #1</div><div class='del'>-USER(	TUSER(	strgtb) r3, [r0], #1)			@ May fault</div><div class='del'>-		b	.Lc2u_finished</div><div class='del'>-</div><div class='del'>-.Lc2u_not_enough:</div><div class='del'>-		movs	ip, r2</div><div class='del'>-		bne	.Lc2u_nowords</div><div class='del'>-.Lc2u_finished:	mov	r0, #0</div><div class='del'>-		ldmfd	sp!, {r2, r4 - r7, pc}</div><div class='del'>-</div><div class='del'>-.Lc2u_src_not_aligned:</div><div class='del'>-		bic	r1, r1, #3</div><div class='del'>-		ldr	r7, [r1], #4</div><div class='del'>-		cmp	ip, #2</div><div class='del'>-		bgt	.Lc2u_3fupi</div><div class='del'>-		beq	.Lc2u_2fupi</div><div class='del'>-.Lc2u_1fupi:	subs	r2, r2, #4</div><div class='del'>-		addmi	ip, r2, #4</div><div class='del'>-		bmi	.Lc2u_1nowords</div><div class='del'>-		mov	r3, r7, pull #8</div><div class='del'>-		ldr	r7, [r1], #4</div><div class='del'>-		orr	r3, r3, r7, push #24</div><div class='del'>-USER(	TUSER(	str)	r3, [r0], #4)			@ May fault</div><div class='del'>-		mov	ip, r0, lsl #32 - PAGE_SHIFT</div><div class='del'>-		rsb	ip, ip, #0</div><div class='del'>-		movs	ip, ip, lsr #32 - PAGE_SHIFT</div><div class='del'>-		beq	.Lc2u_1fupi</div><div class='del'>-		cmp	r2, ip</div><div class='del'>-		movlt	ip, r2</div><div class='del'>-		sub	r2, r2, ip</div><div class='del'>-		subs	ip, ip, #16</div><div class='del'>-		blt	.Lc2u_1rem8lp</div><div class='del'>-</div><div class='del'>-.Lc2u_1cpy8lp:	mov	r3, r7, pull #8</div><div class='del'>-		ldmia	r1!, {r4 - r7}</div><div class='del'>-		subs	ip, ip, #16</div><div class='del'>-		orr	r3, r3, r4, push #24</div><div class='del'>-		mov	r4, r4, pull #8</div><div class='del'>-		orr	r4, r4, r5, push #24</div><div class='del'>-		mov	r5, r5, pull #8</div><div class='del'>-		orr	r5, r5, r6, push #24</div><div class='del'>-		mov	r6, r6, pull #8</div><div class='del'>-		orr	r6, r6, r7, push #24</div><div class='del'>-		stmia	r0!, {r3 - r6}			@ Shouldnt fault</div><div class='del'>-		bpl	.Lc2u_1cpy8lp</div><div class='del'>-</div><div class='del'>-.Lc2u_1rem8lp:	tst	ip, #8</div><div class='del'>-		movne	r3, r7, pull #8</div><div class='del'>-		ldmneia	r1!, {r4, r7}</div><div class='del'>-		orrne	r3, r3, r4, push #24</div><div class='del'>-		movne	r4, r4, pull #8</div><div class='del'>-		orrne	r4, r4, r7, push #24</div><div class='del'>-		stmneia	r0!, {r3 - r4}			@ Shouldnt fault</div><div class='del'>-		tst	ip, #4</div><div class='del'>-		movne	r3, r7, pull #8</div><div class='del'>-		ldrne	r7, [r1], #4</div><div class='del'>-		orrne	r3, r3, r7, push #24</div><div class='del'>-	TUSER(	strne) r3, [r0], #4			@ Shouldnt fault</div><div class='del'>-		ands	ip, ip, #3</div><div class='del'>-		beq	.Lc2u_1fupi</div><div class='del'>-.Lc2u_1nowords:	mov	r3, r7, get_byte_1</div><div class='del'>-		teq	ip, #0</div><div class='del'>-		beq	.Lc2u_finished</div><div class='del'>-		cmp	ip, #2</div><div class='del'>-USER(	TUSER(	strb)	r3, [r0], #1)			@ May fault</div><div class='del'>-		movge	r3, r7, get_byte_2</div><div class='del'>-USER(	TUSER(	strgeb) r3, [r0], #1)			@ May fault</div><div class='del'>-		movgt	r3, r7, get_byte_3</div><div class='del'>-USER(	TUSER(	strgtb) r3, [r0], #1)			@ May fault</div><div class='del'>-		b	.Lc2u_finished</div><div class='del'>-</div><div class='del'>-.Lc2u_2fupi:	subs	r2, r2, #4</div><div class='del'>-		addmi	ip, r2, #4</div><div class='del'>-		bmi	.Lc2u_2nowords</div><div class='del'>-		mov	r3, r7, pull #16</div><div class='del'>-		ldr	r7, [r1], #4</div><div class='del'>-		orr	r3, r3, r7, push #16</div><div class='del'>-USER(	TUSER(	str)	r3, [r0], #4)			@ May fault</div><div class='del'>-		mov	ip, r0, lsl #32 - PAGE_SHIFT</div><div class='del'>-		rsb	ip, ip, #0</div><div class='del'>-		movs	ip, ip, lsr #32 - PAGE_SHIFT</div><div class='del'>-		beq	.Lc2u_2fupi</div><div class='del'>-		cmp	r2, ip</div><div class='del'>-		movlt	ip, r2</div><div class='del'>-		sub	r2, r2, ip</div><div class='del'>-		subs	ip, ip, #16</div><div class='del'>-		blt	.Lc2u_2rem8lp</div><div class='del'>-</div><div class='del'>-.Lc2u_2cpy8lp:	mov	r3, r7, pull #16</div><div class='del'>-		ldmia	r1!, {r4 - r7}</div><div class='del'>-		subs	ip, ip, #16</div><div class='del'>-		orr	r3, r3, r4, push #16</div><div class='del'>-		mov	r4, r4, pull #16</div><div class='del'>-		orr	r4, r4, r5, push #16</div><div class='del'>-		mov	r5, r5, pull #16</div><div class='del'>-		orr	r5, r5, r6, push #16</div><div class='del'>-		mov	r6, r6, pull #16</div><div class='del'>-		orr	r6, r6, r7, push #16</div><div class='del'>-		stmia	r0!, {r3 - r6}			@ Shouldnt fault</div><div class='del'>-		bpl	.Lc2u_2cpy8lp</div><div class='del'>-</div><div class='del'>-.Lc2u_2rem8lp:	tst	ip, #8</div><div class='del'>-		movne	r3, r7, pull #16</div><div class='del'>-		ldmneia	r1!, {r4, r7}</div><div class='del'>-		orrne	r3, r3, r4, push #16</div><div class='del'>-		movne	r4, r4, pull #16</div><div class='del'>-		orrne	r4, r4, r7, push #16</div><div class='del'>-		stmneia	r0!, {r3 - r4}			@ Shouldnt fault</div><div class='del'>-		tst	ip, #4</div><div class='del'>-		movne	r3, r7, pull #16</div><div class='del'>-		ldrne	r7, [r1], #4</div><div class='del'>-		orrne	r3, r3, r7, push #16</div><div class='del'>-	TUSER(	strne) r3, [r0], #4			@ Shouldnt fault</div><div class='del'>-		ands	ip, ip, #3</div><div class='del'>-		beq	.Lc2u_2fupi</div><div class='del'>-.Lc2u_2nowords:	mov	r3, r7, get_byte_2</div><div class='del'>-		teq	ip, #0</div><div class='del'>-		beq	.Lc2u_finished</div><div class='del'>-		cmp	ip, #2</div><div class='del'>-USER(	TUSER(	strb)	r3, [r0], #1)			@ May fault</div><div class='del'>-		movge	r3, r7, get_byte_3</div><div class='del'>-USER(	TUSER(	strgeb) r3, [r0], #1)			@ May fault</div><div class='del'>-		ldrgtb	r3, [r1], #0</div><div class='del'>-USER(	TUSER(	strgtb) r3, [r0], #1)			@ May fault</div><div class='del'>-		b	.Lc2u_finished</div><div class='del'>-</div><div class='del'>-.Lc2u_3fupi:	subs	r2, r2, #4</div><div class='del'>-		addmi	ip, r2, #4</div><div class='del'>-		bmi	.Lc2u_3nowords</div><div class='del'>-		mov	r3, r7, pull #24</div><div class='del'>-		ldr	r7, [r1], #4</div><div class='del'>-		orr	r3, r3, r7, push #8</div><div class='del'>-USER(	TUSER(	str)	r3, [r0], #4)			@ May fault</div><div class='del'>-		mov	ip, r0, lsl #32 - PAGE_SHIFT</div><div class='del'>-		rsb	ip, ip, #0</div><div class='del'>-		movs	ip, ip, lsr #32 - PAGE_SHIFT</div><div class='del'>-		beq	.Lc2u_3fupi</div><div class='del'>-		cmp	r2, ip</div><div class='del'>-		movlt	ip, r2</div><div class='del'>-		sub	r2, r2, ip</div><div class='del'>-		subs	ip, ip, #16</div><div class='del'>-		blt	.Lc2u_3rem8lp</div><div class='del'>-</div><div class='del'>-.Lc2u_3cpy8lp:	mov	r3, r7, pull #24</div><div class='del'>-		ldmia	r1!, {r4 - r7}</div><div class='del'>-		subs	ip, ip, #16</div><div class='del'>-		orr	r3, r3, r4, push #8</div><div class='del'>-		mov	r4, r4, pull #24</div><div class='del'>-		orr	r4, r4, r5, push #8</div><div class='del'>-		mov	r5, r5, pull #24</div><div class='del'>-		orr	r5, r5, r6, push #8</div><div class='del'>-		mov	r6, r6, pull #24</div><div class='del'>-		orr	r6, r6, r7, push #8</div><div class='del'>-		stmia	r0!, {r3 - r6}			@ Shouldnt fault</div><div class='del'>-		bpl	.Lc2u_3cpy8lp</div><div class='del'>-</div><div class='del'>-.Lc2u_3rem8lp:	tst	ip, #8</div><div class='del'>-		movne	r3, r7, pull #24</div><div class='del'>-		ldmneia	r1!, {r4, r7}</div><div class='del'>-		orrne	r3, r3, r4, push #8</div><div class='del'>-		movne	r4, r4, pull #24</div><div class='del'>-		orrne	r4, r4, r7, push #8</div><div class='del'>-		stmneia	r0!, {r3 - r4}			@ Shouldnt fault</div><div class='del'>-		tst	ip, #4</div><div class='del'>-		movne	r3, r7, pull #24</div><div class='del'>-		ldrne	r7, [r1], #4</div><div class='del'>-		orrne	r3, r3, r7, push #8</div><div class='del'>-	TUSER(	strne) r3, [r0], #4			@ Shouldnt fault</div><div class='del'>-		ands	ip, ip, #3</div><div class='del'>-		beq	.Lc2u_3fupi</div><div class='del'>-.Lc2u_3nowords:	mov	r3, r7, get_byte_3</div><div class='del'>-		teq	ip, #0</div><div class='del'>-		beq	.Lc2u_finished</div><div class='del'>-		cmp	ip, #2</div><div class='del'>-USER(	TUSER(	strb)	r3, [r0], #1)			@ May fault</div><div class='del'>-		ldrgeb	r3, [r1], #1</div><div class='del'>-USER(	TUSER(	strgeb) r3, [r0], #1)			@ May fault</div><div class='del'>-		ldrgtb	r3, [r1], #0</div><div class='del'>-USER(	TUSER(	strgtb) r3, [r0], #1)			@ May fault</div><div class='del'>-		b	.Lc2u_finished</div><div class='del'>-ENDPROC(__copy_to_user)</div><div class='del'>-</div><div class='del'>-		.pushsection .fixup,"ax"</div><div class='del'>-		.align	0</div><div class='del'>-9001:		ldmfd	sp!, {r0, r4 - r7, pc}</div><div class='del'>-		.popsection</div><div class='del'>-</div><div class='del'>-/* Prototype: unsigned long __copy_from_user(void *to,const void *from,unsigned long n);</div><div class='del'>- * Purpose  : copy a block from user memory to kernel memory</div><div class='del'>- * Params   : to   - kernel memory</div><div class='del'>- *          : from - user memory</div><div class='del'>- *          : n    - number of bytes to copy</div><div class='del'>- * Returns  : Number of bytes NOT copied.</div><div class='del'>- */</div><div class='del'>-.Lcfu_dest_not_aligned:</div><div class='del'>-		rsb	ip, ip, #4</div><div class='del'>-		cmp	ip, #2</div><div class='del'>-USER(	TUSER(	ldrb)	r3, [r1], #1)			@ May fault</div><div class='del'>-		strb	r3, [r0], #1</div><div class='del'>-USER(	TUSER(	ldrgeb) r3, [r1], #1)			@ May fault</div><div class='del'>-		strgeb	r3, [r0], #1</div><div class='del'>-USER(	TUSER(	ldrgtb) r3, [r1], #1)			@ May fault</div><div class='del'>-		strgtb	r3, [r0], #1</div><div class='del'>-		sub	r2, r2, ip</div><div class='del'>-		b	.Lcfu_dest_aligned</div><div class='del'>-</div><div class='del'>-ENTRY(__copy_from_user)</div><div class='del'>-		stmfd	sp!, {r0, r2, r4 - r7, lr}</div><div class='del'>-		cmp	r2, #4</div><div class='del'>-		blt	.Lcfu_not_enough</div><div class='del'>-		ands	ip, r0, #3</div><div class='del'>-		bne	.Lcfu_dest_not_aligned</div><div class='del'>-.Lcfu_dest_aligned:</div><div class='del'>-		ands	ip, r1, #3</div><div class='del'>-		bne	.Lcfu_src_not_aligned</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Seeing as there has to be at least 8 bytes to copy, we can</div><div class='del'>- * copy one word, and force a user-mode page fault...</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-.Lcfu_0fupi:	subs	r2, r2, #4</div><div class='del'>-		addmi	ip, r2, #4</div><div class='del'>-		bmi	.Lcfu_0nowords</div><div class='del'>-USER(	TUSER(	ldr)	r3, [r1], #4)</div><div class='del'>-		str	r3, [r0], #4</div><div class='del'>-		mov	ip, r1, lsl #32 - PAGE_SHIFT	@ On each page, use a ld/st??t instruction</div><div class='del'>-		rsb	ip, ip, #0</div><div class='del'>-		movs	ip, ip, lsr #32 - PAGE_SHIFT</div><div class='del'>-		beq	.Lcfu_0fupi</div><div class='del'>-/*</div><div class='del'>- * ip = max no. of bytes to copy before needing another "strt" insn</div><div class='del'>- */</div><div class='del'>-		cmp	r2, ip</div><div class='del'>-		movlt	ip, r2</div><div class='del'>-		sub	r2, r2, ip</div><div class='del'>-		subs	ip, ip, #32</div><div class='del'>-		blt	.Lcfu_0rem8lp</div><div class='del'>-</div><div class='del'>-.Lcfu_0cpy8lp:	ldmia	r1!, {r3 - r6}			@ Shouldnt fault</div><div class='del'>-		stmia	r0!, {r3 - r6}</div><div class='del'>-		ldmia	r1!, {r3 - r6}			@ Shouldnt fault</div><div class='del'>-		subs	ip, ip, #32</div><div class='del'>-		stmia	r0!, {r3 - r6}</div><div class='del'>-		bpl	.Lcfu_0cpy8lp</div><div class='del'>-</div><div class='del'>-.Lcfu_0rem8lp:	cmn	ip, #16</div><div class='del'>-		ldmgeia	r1!, {r3 - r6}			@ Shouldnt fault</div><div class='del'>-		stmgeia	r0!, {r3 - r6}</div><div class='del'>-		tst	ip, #8</div><div class='del'>-		ldmneia	r1!, {r3 - r4}			@ Shouldnt fault</div><div class='del'>-		stmneia	r0!, {r3 - r4}</div><div class='del'>-		tst	ip, #4</div><div class='del'>-	TUSER(	ldrne) r3, [r1], #4			@ Shouldnt fault</div><div class='del'>-		strne	r3, [r0], #4</div><div class='del'>-		ands	ip, ip, #3</div><div class='del'>-		beq	.Lcfu_0fupi</div><div class='del'>-.Lcfu_0nowords:	teq	ip, #0</div><div class='del'>-		beq	.Lcfu_finished</div><div class='del'>-.Lcfu_nowords:	cmp	ip, #2</div><div class='del'>-USER(	TUSER(	ldrb)	r3, [r1], #1)			@ May fault</div><div class='del'>-		strb	r3, [r0], #1</div><div class='del'>-USER(	TUSER(	ldrgeb) r3, [r1], #1)			@ May fault</div><div class='del'>-		strgeb	r3, [r0], #1</div><div class='del'>-USER(	TUSER(	ldrgtb) r3, [r1], #1)			@ May fault</div><div class='del'>-		strgtb	r3, [r0], #1</div><div class='del'>-		b	.Lcfu_finished</div><div class='del'>-</div><div class='del'>-.Lcfu_not_enough:</div><div class='del'>-		movs	ip, r2</div><div class='del'>-		bne	.Lcfu_nowords</div><div class='del'>-.Lcfu_finished:	mov	r0, #0</div><div class='del'>-		add	sp, sp, #8</div><div class='del'>-		ldmfd	sp!, {r4 - r7, pc}</div><div class='del'>-</div><div class='del'>-.Lcfu_src_not_aligned:</div><div class='del'>-		bic	r1, r1, #3</div><div class='del'>-USER(	TUSER(	ldr)	r7, [r1], #4)			@ May fault</div><div class='del'>-		cmp	ip, #2</div><div class='del'>-		bgt	.Lcfu_3fupi</div><div class='del'>-		beq	.Lcfu_2fupi</div><div class='del'>-.Lcfu_1fupi:	subs	r2, r2, #4</div><div class='del'>-		addmi	ip, r2, #4</div><div class='del'>-		bmi	.Lcfu_1nowords</div><div class='del'>-		mov	r3, r7, pull #8</div><div class='del'>-USER(	TUSER(	ldr)	r7, [r1], #4)			@ May fault</div><div class='del'>-		orr	r3, r3, r7, push #24</div><div class='del'>-		str	r3, [r0], #4</div><div class='del'>-		mov	ip, r1, lsl #32 - PAGE_SHIFT</div><div class='del'>-		rsb	ip, ip, #0</div><div class='del'>-		movs	ip, ip, lsr #32 - PAGE_SHIFT</div><div class='del'>-		beq	.Lcfu_1fupi</div><div class='del'>-		cmp	r2, ip</div><div class='del'>-		movlt	ip, r2</div><div class='del'>-		sub	r2, r2, ip</div><div class='del'>-		subs	ip, ip, #16</div><div class='del'>-		blt	.Lcfu_1rem8lp</div><div class='del'>-</div><div class='del'>-.Lcfu_1cpy8lp:	mov	r3, r7, pull #8</div><div class='del'>-		ldmia	r1!, {r4 - r7}			@ Shouldnt fault</div><div class='del'>-		subs	ip, ip, #16</div><div class='del'>-		orr	r3, r3, r4, push #24</div><div class='del'>-		mov	r4, r4, pull #8</div><div class='del'>-		orr	r4, r4, r5, push #24</div><div class='del'>-		mov	r5, r5, pull #8</div><div class='del'>-		orr	r5, r5, r6, push #24</div><div class='del'>-		mov	r6, r6, pull #8</div><div class='del'>-		orr	r6, r6, r7, push #24</div><div class='del'>-		stmia	r0!, {r3 - r6}</div><div class='del'>-		bpl	.Lcfu_1cpy8lp</div><div class='del'>-</div><div class='del'>-.Lcfu_1rem8lp:	tst	ip, #8</div><div class='del'>-		movne	r3, r7, pull #8</div><div class='del'>-		ldmneia	r1!, {r4, r7}			@ Shouldnt fault</div><div class='del'>-		orrne	r3, r3, r4, push #24</div><div class='del'>-		movne	r4, r4, pull #8</div><div class='del'>-		orrne	r4, r4, r7, push #24</div><div class='del'>-		stmneia	r0!, {r3 - r4}</div><div class='del'>-		tst	ip, #4</div><div class='del'>-		movne	r3, r7, pull #8</div><div class='del'>-USER(	TUSER(	ldrne) r7, [r1], #4)			@ May fault</div><div class='del'>-		orrne	r3, r3, r7, push #24</div><div class='del'>-		strne	r3, [r0], #4</div><div class='del'>-		ands	ip, ip, #3</div><div class='del'>-		beq	.Lcfu_1fupi</div><div class='del'>-.Lcfu_1nowords:	mov	r3, r7, get_byte_1</div><div class='del'>-		teq	ip, #0</div><div class='del'>-		beq	.Lcfu_finished</div><div class='del'>-		cmp	ip, #2</div><div class='del'>-		strb	r3, [r0], #1</div><div class='del'>-		movge	r3, r7, get_byte_2</div><div class='del'>-		strgeb	r3, [r0], #1</div><div class='del'>-		movgt	r3, r7, get_byte_3</div><div class='del'>-		strgtb	r3, [r0], #1</div><div class='del'>-		b	.Lcfu_finished</div><div class='del'>-</div><div class='del'>-.Lcfu_2fupi:	subs	r2, r2, #4</div><div class='del'>-		addmi	ip, r2, #4</div><div class='del'>-		bmi	.Lcfu_2nowords</div><div class='del'>-		mov	r3, r7, pull #16</div><div class='del'>-USER(	TUSER(	ldr)	r7, [r1], #4)			@ May fault</div><div class='del'>-		orr	r3, r3, r7, push #16</div><div class='del'>-		str	r3, [r0], #4</div><div class='del'>-		mov	ip, r1, lsl #32 - PAGE_SHIFT</div><div class='del'>-		rsb	ip, ip, #0</div><div class='del'>-		movs	ip, ip, lsr #32 - PAGE_SHIFT</div><div class='del'>-		beq	.Lcfu_2fupi</div><div class='del'>-		cmp	r2, ip</div><div class='del'>-		movlt	ip, r2</div><div class='del'>-		sub	r2, r2, ip</div><div class='del'>-		subs	ip, ip, #16</div><div class='del'>-		blt	.Lcfu_2rem8lp</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-.Lcfu_2cpy8lp:	mov	r3, r7, pull #16</div><div class='del'>-		ldmia	r1!, {r4 - r7}			@ Shouldnt fault</div><div class='del'>-		subs	ip, ip, #16</div><div class='del'>-		orr	r3, r3, r4, push #16</div><div class='del'>-		mov	r4, r4, pull #16</div><div class='del'>-		orr	r4, r4, r5, push #16</div><div class='del'>-		mov	r5, r5, pull #16</div><div class='del'>-		orr	r5, r5, r6, push #16</div><div class='del'>-		mov	r6, r6, pull #16</div><div class='del'>-		orr	r6, r6, r7, push #16</div><div class='del'>-		stmia	r0!, {r3 - r6}</div><div class='del'>-		bpl	.Lcfu_2cpy8lp</div><div class='del'>-</div><div class='del'>-.Lcfu_2rem8lp:	tst	ip, #8</div><div class='del'>-		movne	r3, r7, pull #16</div><div class='del'>-		ldmneia	r1!, {r4, r7}			@ Shouldnt fault</div><div class='del'>-		orrne	r3, r3, r4, push #16</div><div class='del'>-		movne	r4, r4, pull #16</div><div class='del'>-		orrne	r4, r4, r7, push #16</div><div class='del'>-		stmneia	r0!, {r3 - r4}</div><div class='del'>-		tst	ip, #4</div><div class='del'>-		movne	r3, r7, pull #16</div><div class='del'>-USER(	TUSER(	ldrne) r7, [r1], #4)			@ May fault</div><div class='del'>-		orrne	r3, r3, r7, push #16</div><div class='del'>-		strne	r3, [r0], #4</div><div class='del'>-		ands	ip, ip, #3</div><div class='del'>-		beq	.Lcfu_2fupi</div><div class='del'>-.Lcfu_2nowords:	mov	r3, r7, get_byte_2</div><div class='del'>-		teq	ip, #0</div><div class='del'>-		beq	.Lcfu_finished</div><div class='del'>-		cmp	ip, #2</div><div class='del'>-		strb	r3, [r0], #1</div><div class='del'>-		movge	r3, r7, get_byte_3</div><div class='del'>-		strgeb	r3, [r0], #1</div><div class='del'>-USER(	TUSER(	ldrgtb) r3, [r1], #0)			@ May fault</div><div class='del'>-		strgtb	r3, [r0], #1</div><div class='del'>-		b	.Lcfu_finished</div><div class='del'>-</div><div class='del'>-.Lcfu_3fupi:	subs	r2, r2, #4</div><div class='del'>-		addmi	ip, r2, #4</div><div class='del'>-		bmi	.Lcfu_3nowords</div><div class='del'>-		mov	r3, r7, pull #24</div><div class='del'>-USER(	TUSER(	ldr)	r7, [r1], #4)			@ May fault</div><div class='del'>-		orr	r3, r3, r7, push #8</div><div class='del'>-		str	r3, [r0], #4</div><div class='del'>-		mov	ip, r1, lsl #32 - PAGE_SHIFT</div><div class='del'>-		rsb	ip, ip, #0</div><div class='del'>-		movs	ip, ip, lsr #32 - PAGE_SHIFT</div><div class='del'>-		beq	.Lcfu_3fupi</div><div class='del'>-		cmp	r2, ip</div><div class='del'>-		movlt	ip, r2</div><div class='del'>-		sub	r2, r2, ip</div><div class='del'>-		subs	ip, ip, #16</div><div class='del'>-		blt	.Lcfu_3rem8lp</div><div class='del'>-</div><div class='del'>-.Lcfu_3cpy8lp:	mov	r3, r7, pull #24</div><div class='del'>-		ldmia	r1!, {r4 - r7}			@ Shouldnt fault</div><div class='del'>-		orr	r3, r3, r4, push #8</div><div class='del'>-		mov	r4, r4, pull #24</div><div class='del'>-		orr	r4, r4, r5, push #8</div><div class='del'>-		mov	r5, r5, pull #24</div><div class='del'>-		orr	r5, r5, r6, push #8</div><div class='del'>-		mov	r6, r6, pull #24</div><div class='del'>-		orr	r6, r6, r7, push #8</div><div class='del'>-		stmia	r0!, {r3 - r6}</div><div class='del'>-		subs	ip, ip, #16</div><div class='del'>-		bpl	.Lcfu_3cpy8lp</div><div class='del'>-</div><div class='del'>-.Lcfu_3rem8lp:	tst	ip, #8</div><div class='del'>-		movne	r3, r7, pull #24</div><div class='del'>-		ldmneia	r1!, {r4, r7}			@ Shouldnt fault</div><div class='del'>-		orrne	r3, r3, r4, push #8</div><div class='del'>-		movne	r4, r4, pull #24</div><div class='del'>-		orrne	r4, r4, r7, push #8</div><div class='del'>-		stmneia	r0!, {r3 - r4}</div><div class='del'>-		tst	ip, #4</div><div class='del'>-		movne	r3, r7, pull #24</div><div class='del'>-USER(	TUSER(	ldrne) r7, [r1], #4)			@ May fault</div><div class='del'>-		orrne	r3, r3, r7, push #8</div><div class='del'>-		strne	r3, [r0], #4</div><div class='del'>-		ands	ip, ip, #3</div><div class='del'>-		beq	.Lcfu_3fupi</div><div class='del'>-.Lcfu_3nowords:	mov	r3, r7, get_byte_3</div><div class='del'>-		teq	ip, #0</div><div class='del'>-		beq	.Lcfu_finished</div><div class='del'>-		cmp	ip, #2</div><div class='del'>-		strb	r3, [r0], #1</div><div class='del'>-USER(	TUSER(	ldrgeb) r3, [r1], #1)			@ May fault</div><div class='del'>-		strgeb	r3, [r0], #1</div><div class='del'>-USER(	TUSER(	ldrgtb) r3, [r1], #1)			@ May fault</div><div class='del'>-		strgtb	r3, [r0], #1</div><div class='del'>-		b	.Lcfu_finished</div><div class='del'>-ENDPROC(__copy_from_user)</div><div class='del'>-</div><div class='del'>-		.pushsection .fixup,"ax"</div><div class='del'>-		.align	0</div><div class='del'>-		/*</div><div class='del'>-		 * We took an exception.  r0 contains a pointer to</div><div class='del'>-		 * the byte not copied.</div><div class='del'>-		 */</div><div class='del'>-9001:		ldr	r2, [sp], #4			@ void *to</div><div class='del'>-		sub	r2, r0, r2			@ bytes copied</div><div class='del'>-		ldr	r1, [sp], #4			@ unsigned long count</div><div class='del'>-		subs	r4, r1, r2			@ bytes left to copy</div><div class='del'>-		movne	r1, r4</div><div class='del'>-		blne	__memzero</div><div class='del'>-		mov	r0, r4</div><div class='del'>-		ldmfd	sp!, {r4 - r7, pc}</div><div class='del'>-		.popsection</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig<br/>index 45db05d8d94c..19505c0a3f01 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/Kconfig</a></div><div class='hunk'>@@ -9,15 +9,6 @@ config HAVE_AT91_DBGU0</div><div class='ctx'> config HAVE_AT91_DBGU1</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config HAVE_AT91_USART3</div><div class='del'>-	bool</div><div class='del'>-</div><div class='del'>-config HAVE_AT91_USART4</div><div class='del'>-	bool</div><div class='del'>-</div><div class='del'>-config HAVE_AT91_USART5</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> config AT91_SAM9_ALT_RESET</div><div class='ctx'> 	bool</div><div class='ctx'> 	default !ARCH_AT91X40</div><div class='hunk'>@@ -26,87 +17,129 @@ config AT91_SAM9G45_RESET</div><div class='ctx'> 	bool</div><div class='ctx'> 	default !ARCH_AT91X40</div><div class='ctx'> </div><div class='add'>+config SOC_AT91SAM9</div><div class='add'>+	bool</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select CPU_ARM926T</div><div class='add'>+</div><div class='ctx'> menu "Atmel AT91 System-on-Chip"</div><div class='ctx'> </div><div class='del'>-choice</div><div class='del'>-	prompt "Atmel AT91 Processor"</div><div class='add'>+comment "Atmel AT91 Processor"</div><div class='ctx'> </div><div class='del'>-config ARCH_AT91RM9200</div><div class='add'>+config SOC_AT91SAM9</div><div class='add'>+	bool</div><div class='add'>+	select CPU_ARM926T</div><div class='add'>+	select AT91_SAM9_TIME</div><div class='add'>+	select AT91_SAM9_SMC</div><div class='add'>+</div><div class='add'>+config SOC_AT91RM9200</div><div class='ctx'> 	bool "AT91RM9200"</div><div class='ctx'> 	select CPU_ARM920T</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS</div><div class='ctx'> 	select HAVE_AT91_DBGU0</div><div class='del'>-	select HAVE_AT91_USART3</div><div class='ctx'> </div><div class='del'>-config ARCH_AT91SAM9260</div><div class='del'>-	bool "AT91SAM9260 or AT91SAM9XE"</div><div class='del'>-	select CPU_ARM926T</div><div class='del'>-	select GENERIC_CLOCKEVENTS</div><div class='add'>+config SOC_AT91SAM9260</div><div class='add'>+	bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"</div><div class='add'>+	select SOC_AT91SAM9</div><div class='ctx'> 	select HAVE_AT91_DBGU0</div><div class='del'>-	select HAVE_AT91_USART3</div><div class='del'>-	select HAVE_AT91_USART4</div><div class='del'>-	select HAVE_AT91_USART5</div><div class='ctx'> 	select HAVE_NET_MACB</div><div class='add'>+	help</div><div class='add'>+	  Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE</div><div class='add'>+	  or AT91SAM9G20 SoC.</div><div class='ctx'> </div><div class='del'>-config ARCH_AT91SAM9261</div><div class='del'>-	bool "AT91SAM9261"</div><div class='del'>-	select CPU_ARM926T</div><div class='del'>-	select GENERIC_CLOCKEVENTS</div><div class='del'>-	select HAVE_FB_ATMEL</div><div class='del'>-	select HAVE_AT91_DBGU0</div><div class='del'>-</div><div class='del'>-config ARCH_AT91SAM9G10</div><div class='del'>-	bool "AT91SAM9G10"</div><div class='del'>-	select CPU_ARM926T</div><div class='del'>-	select GENERIC_CLOCKEVENTS</div><div class='add'>+config SOC_AT91SAM9261</div><div class='add'>+	bool "AT91SAM9261 or AT91SAM9G10"</div><div class='add'>+	select SOC_AT91SAM9</div><div class='ctx'> 	select HAVE_AT91_DBGU0</div><div class='ctx'> 	select HAVE_FB_ATMEL</div><div class='add'>+	help</div><div class='add'>+	  Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.</div><div class='ctx'> </div><div class='del'>-config ARCH_AT91SAM9263</div><div class='add'>+config SOC_AT91SAM9263</div><div class='ctx'> 	bool "AT91SAM9263"</div><div class='del'>-	select CPU_ARM926T</div><div class='del'>-	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select SOC_AT91SAM9</div><div class='add'>+	select HAVE_AT91_DBGU1</div><div class='ctx'> 	select HAVE_FB_ATMEL</div><div class='ctx'> 	select HAVE_NET_MACB</div><div class='del'>-	select HAVE_AT91_DBGU1</div><div class='ctx'> </div><div class='del'>-config ARCH_AT91SAM9RL</div><div class='add'>+config SOC_AT91SAM9RL</div><div class='ctx'> 	bool "AT91SAM9RL"</div><div class='del'>-	select CPU_ARM926T</div><div class='del'>-	select GENERIC_CLOCKEVENTS</div><div class='del'>-	select HAVE_AT91_USART3</div><div class='del'>-	select HAVE_FB_ATMEL</div><div class='del'>-	select HAVE_AT91_DBGU0</div><div class='del'>-</div><div class='del'>-config ARCH_AT91SAM9G20</div><div class='del'>-	bool "AT91SAM9G20"</div><div class='del'>-	select CPU_ARM926T</div><div class='del'>-	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select SOC_AT91SAM9</div><div class='ctx'> 	select HAVE_AT91_DBGU0</div><div class='del'>-	select HAVE_AT91_USART3</div><div class='del'>-	select HAVE_AT91_USART4</div><div class='del'>-	select HAVE_AT91_USART5</div><div class='del'>-	select HAVE_NET_MACB</div><div class='add'>+	select HAVE_FB_ATMEL</div><div class='ctx'> </div><div class='del'>-config ARCH_AT91SAM9G45</div><div class='del'>-	bool "AT91SAM9G45"</div><div class='del'>-	select CPU_ARM926T</div><div class='del'>-	select GENERIC_CLOCKEVENTS</div><div class='del'>-	select HAVE_AT91_USART3</div><div class='add'>+config SOC_AT91SAM9G45</div><div class='add'>+	bool "AT91SAM9G45 or AT91SAM9M10 families"</div><div class='add'>+	select SOC_AT91SAM9</div><div class='add'>+	select HAVE_AT91_DBGU1</div><div class='ctx'> 	select HAVE_FB_ATMEL</div><div class='ctx'> 	select HAVE_NET_MACB</div><div class='del'>-	select HAVE_AT91_DBGU1</div><div class='add'>+	help</div><div class='add'>+	  Select this if you are using one of Atmel's AT91SAM9G45 family SoC.</div><div class='add'>+	  This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.</div><div class='ctx'> </div><div class='del'>-config ARCH_AT91SAM9X5</div><div class='add'>+config SOC_AT91SAM9X5</div><div class='ctx'> 	bool "AT91SAM9x5 family"</div><div class='del'>-	select CPU_ARM926T</div><div class='del'>-	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select SOC_AT91SAM9</div><div class='add'>+	select HAVE_AT91_DBGU0</div><div class='ctx'> 	select HAVE_FB_ATMEL</div><div class='ctx'> 	select HAVE_NET_MACB</div><div class='add'>+	help</div><div class='add'>+	  Select this if you are using one of Atmel's AT91SAM9x5 family SoC.</div><div class='add'>+	  This means that your SAM9 name finishes with a '5' (except if it is</div><div class='add'>+	  AT91SAM9G45!).</div><div class='add'>+	  This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35</div><div class='add'>+	  and AT91SAM9X35.</div><div class='add'>+</div><div class='add'>+config SOC_AT91SAM9N12</div><div class='add'>+	bool "AT91SAM9N12 family"</div><div class='add'>+	select SOC_AT91SAM9</div><div class='ctx'> 	select HAVE_AT91_DBGU0</div><div class='add'>+	select HAVE_FB_ATMEL</div><div class='add'>+	help</div><div class='add'>+	  Select this if you are using Atmel's AT91SAM9N12 SoC.</div><div class='add'>+</div><div class='add'>+choice</div><div class='add'>+	prompt "Atmel AT91 Processor Devices for non DT boards"</div><div class='add'>+</div><div class='add'>+config ARCH_AT91_NONE</div><div class='add'>+	bool "None"</div><div class='add'>+</div><div class='add'>+config ARCH_AT91RM9200</div><div class='add'>+	bool "AT91RM9200"</div><div class='add'>+	select SOC_AT91RM9200</div><div class='add'>+</div><div class='add'>+config ARCH_AT91SAM9260</div><div class='add'>+	bool "AT91SAM9260 or AT91SAM9XE"</div><div class='add'>+	select SOC_AT91SAM9260</div><div class='add'>+</div><div class='add'>+config ARCH_AT91SAM9261</div><div class='add'>+	bool "AT91SAM9261"</div><div class='add'>+	select SOC_AT91SAM9261</div><div class='add'>+</div><div class='add'>+config ARCH_AT91SAM9G10</div><div class='add'>+	bool "AT91SAM9G10"</div><div class='add'>+	select SOC_AT91SAM9261</div><div class='add'>+</div><div class='add'>+config ARCH_AT91SAM9263</div><div class='add'>+	bool "AT91SAM9263"</div><div class='add'>+	select SOC_AT91SAM9263</div><div class='add'>+</div><div class='add'>+config ARCH_AT91SAM9RL</div><div class='add'>+	bool "AT91SAM9RL"</div><div class='add'>+	select SOC_AT91SAM9RL</div><div class='add'>+</div><div class='add'>+config ARCH_AT91SAM9G20</div><div class='add'>+	bool "AT91SAM9G20"</div><div class='add'>+	select SOC_AT91SAM9260</div><div class='add'>+</div><div class='add'>+config ARCH_AT91SAM9G45</div><div class='add'>+	bool "AT91SAM9G45"</div><div class='add'>+	select SOC_AT91SAM9G45</div><div class='ctx'> </div><div class='ctx'> config ARCH_AT91X40</div><div class='ctx'> 	bool "AT91x40"</div><div class='add'>+	depends on !MMU</div><div class='ctx'> 	select ARCH_USES_GETTIMEOFFSET</div><div class='ctx'> </div><div class='ctx'> endchoice</div><div class='hunk'>@@ -364,6 +397,7 @@ config MACH_AT91SAM9G20EK_2MMC</div><div class='ctx'> 	  Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit</div><div class='ctx'> 	  with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and</div><div class='ctx'> 	  onwards.</div><div class='add'>+	  &lt;http://www.atmel.com/tools/SAM9G20-EK.aspx&gt;</div><div class='ctx'> </div><div class='ctx'> config MACH_CPU9G20</div><div class='ctx'> 	bool "Eukrea CPU9G20 board"</div><div class='hunk'>@@ -433,9 +467,10 @@ comment "AT91SAM9G45 Board Type"</div><div class='ctx'> config MACH_AT91SAM9M10G45EK</div><div class='ctx'> 	bool "Atmel AT91SAM9M10G45-EK Evaluation Kits"</div><div class='ctx'> 	help</div><div class='del'>-	  Select this if you are using Atmel's AT91SAM9G45-EKES Evaluation Kit.</div><div class='del'>-	  "ES" at the end of the name means that this board is an</div><div class='del'>-	  Engineering Sample.</div><div class='add'>+	  Select this if you are using Atmel's AT91SAM9M10G45-EK Evaluation Kit.</div><div class='add'>+	  Those boards can be populated with any SoC of AT91SAM9G45 or AT91SAM9M10</div><div class='add'>+	  families: AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.</div><div class='add'>+	  &lt;http://www.atmel.com/tools/SAM9M10-G45-EK.aspx&gt;</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='ctx'> </div><div class='hunk'>@@ -515,41 +550,6 @@ config AT91_TIMER_HZ</div><div class='ctx'> 	  system clock (of at least several MHz), rounding is less of a</div><div class='ctx'> 	  problem so it can be safer to use a decimal values like 100.</div><div class='ctx'> </div><div class='del'>-choice</div><div class='del'>-	prompt "Select a UART for early kernel messages"</div><div class='del'>-</div><div class='del'>-config AT91_EARLY_DBGU0</div><div class='del'>-	bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl"</div><div class='del'>-	depends on HAVE_AT91_DBGU0</div><div class='del'>-</div><div class='del'>-config AT91_EARLY_DBGU1</div><div class='del'>-	bool "DBGU on 9263 and 9g45"</div><div class='del'>-	depends on HAVE_AT91_DBGU1</div><div class='del'>-</div><div class='del'>-config AT91_EARLY_USART0</div><div class='del'>-	bool "USART0"</div><div class='del'>-</div><div class='del'>-config AT91_EARLY_USART1</div><div class='del'>-	bool "USART1"</div><div class='del'>-</div><div class='del'>-config AT91_EARLY_USART2</div><div class='del'>-	bool "USART2"</div><div class='del'>-	depends on ! ARCH_AT91X40</div><div class='del'>-</div><div class='del'>-config AT91_EARLY_USART3</div><div class='del'>-	bool "USART3"</div><div class='del'>-	depends on HAVE_AT91_USART3</div><div class='del'>-</div><div class='del'>-config AT91_EARLY_USART4</div><div class='del'>-	bool "USART4"</div><div class='del'>-	depends on HAVE_AT91_USART4</div><div class='del'>-</div><div class='del'>-config AT91_EARLY_USART5</div><div class='del'>-	bool "USART5"</div><div class='del'>-	depends on HAVE_AT91_USART5</div><div class='del'>-</div><div class='del'>-endchoice</div><div class='del'>-</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile<br/>index 8512e53bed93..3bb7a51efc9d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/Makefile</a></div><div class='hunk'>@@ -10,17 +10,26 @@ obj-		:=</div><div class='ctx'> obj-$(CONFIG_AT91_PMC_UNIT)	+= clock.o</div><div class='ctx'> obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o</div><div class='ctx'> obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o</div><div class='add'>+obj-$(CONFIG_SOC_AT91SAM9)	+= at91sam926x_time.o sam9_smc.o</div><div class='ctx'> </div><div class='ctx'> # CPU-specific support</div><div class='del'>-obj-$(CONFIG_ARCH_AT91RM9200)	+= at91rm9200.o at91rm9200_time.o at91rm9200_devices.o</div><div class='del'>-obj-$(CONFIG_ARCH_AT91SAM9260)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o</div><div class='del'>-obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o</div><div class='del'>-obj-$(CONFIG_ARCH_AT91SAM9G10)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o</div><div class='del'>-obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o</div><div class='del'>-obj-$(CONFIG_ARCH_AT91SAM9RL)	+= at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o</div><div class='del'>-obj-$(CONFIG_ARCH_AT91SAM9G20)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o</div><div class='del'>-obj-$(CONFIG_ARCH_AT91SAM9G45)	+= at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o</div><div class='del'>-obj-$(CONFIG_ARCH_AT91SAM9X5)	+= at91sam9x5.o at91sam926x_time.o sam9_smc.o</div><div class='add'>+obj-$(CONFIG_SOC_AT91RM9200)	+= at91rm9200.o at91rm9200_time.o</div><div class='add'>+obj-$(CONFIG_SOC_AT91SAM9260)	+= at91sam9260.o</div><div class='add'>+obj-$(CONFIG_SOC_AT91SAM9261)	+= at91sam9261.o</div><div class='add'>+obj-$(CONFIG_SOC_AT91SAM9263)	+= at91sam9263.o</div><div class='add'>+obj-$(CONFIG_SOC_AT91SAM9G45)	+= at91sam9g45.o</div><div class='add'>+obj-$(CONFIG_SOC_AT91SAM9N12)	+= at91sam9n12.o</div><div class='add'>+obj-$(CONFIG_SOC_AT91SAM9X5)	+= at91sam9x5.o</div><div class='add'>+obj-$(CONFIG_SOC_AT91SAM9RL)	+= at91sam9rl.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_ARCH_AT91RM9200)	+= at91rm9200_devices.o</div><div class='add'>+obj-$(CONFIG_ARCH_AT91SAM9260)	+= at91sam9260_devices.o</div><div class='add'>+obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261_devices.o</div><div class='add'>+obj-$(CONFIG_ARCH_AT91SAM9G10)	+= at91sam9261_devices.o</div><div class='add'>+obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263_devices.o</div><div class='add'>+obj-$(CONFIG_ARCH_AT91SAM9RL)	+= at91sam9rl_devices.o</div><div class='add'>+obj-$(CONFIG_ARCH_AT91SAM9G20)	+= at91sam9260_devices.o</div><div class='add'>+obj-$(CONFIG_ARCH_AT91SAM9G45)	+= at91sam9g45_devices.o</div><div class='ctx'> obj-$(CONFIG_ARCH_AT91X40)	+= at91x40.o at91x40_time.o</div><div class='ctx'> </div><div class='ctx'> # AT91RM9200 board-specific support</div><div class='head'>diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot<br/>index 0da66ca4a4f8..9e84fe4f2aaa 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/Makefile.boot?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/Makefile.boot</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/Makefile.boot</a></div><div class='hunk'>@@ -14,9 +14,23 @@ initrd_phys-y	:= 0x20410000</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> # Keep dtb files sorted alphabetically for each SoC</div><div class='add'>+# sam9260</div><div class='add'>+dtb-$(CONFIG_MACH_AT91SAM_DT) += ethernut5.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9260.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9260.dtb</div><div class='add'>+# sam9263</div><div class='add'>+dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9263ek.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9263.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9263.dtb</div><div class='ctx'> # sam9g20</div><div class='add'>+dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g20ek.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g20ek_2mmc.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_AT91SAM_DT) += kizbox.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9g20.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9g20.dtb</div><div class='ctx'> # sam9g45</div><div class='ctx'> dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb</div><div class='add'>+# sam9n12</div><div class='add'>+dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9n12ek.dtb</div><div class='ctx'> # sam9x5</div><div class='ctx'> dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g25ek.dtb</div><div class='head'>diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c<br/>index 364c19357e60..26917687fc30 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91rm9200.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91rm9200.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91rm9200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91rm9200.c</a></div><div class='hunk'>@@ -26,15 +26,6 @@</div><div class='ctx'> #include "clock.h"</div><div class='ctx'> #include "sam9_smc.h"</div><div class='ctx'> </div><div class='del'>-static struct map_desc at91rm9200_io_desc[] __initdata = {</div><div class='del'>-	{</div><div class='del'>-		.virtual	= AT91_VA_BASE_EMAC,</div><div class='del'>-		.pfn		= __phys_to_pfn(AT91RM9200_BASE_EMAC),</div><div class='del'>-		.length		= SZ_16K,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* --------------------------------------------------------------------</div><div class='ctx'>  *  Clocks</div><div class='ctx'>  * -------------------------------------------------------------------- */</div><div class='hunk'>@@ -258,18 +249,6 @@ static void __init at91rm9200_register_clocks(void)</div><div class='ctx'> 	clk_register(&amp;pck3);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct clk_lookup console_clock_lookup;</div><div class='del'>-</div><div class='del'>-void __init at91rm9200_set_console_clock(int id)</div><div class='del'>-{</div><div class='del'>-	if (id &gt;= ARRAY_SIZE(usart_clocks_lookups))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	console_clock_lookup.con_id = "usart";</div><div class='del'>-	console_clock_lookup.clk = usart_clocks_lookups[id].clk;</div><div class='del'>-	clkdev_add(&amp;console_clock_lookup);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* --------------------------------------------------------------------</div><div class='ctx'>  *  GPIO</div><div class='ctx'>  * -------------------------------------------------------------------- */</div><div class='hunk'>@@ -315,7 +294,6 @@ static void __init at91rm9200_map_io(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Map peripherals */</div><div class='ctx'> 	at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE);</div><div class='del'>-	iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init at91rm9200_ioremap_registers(void)</div><div class='head'>diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c<br/>index 05774e5b1cba..e6b7d0533dd7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91rm9200_devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91rm9200_devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91rm9200_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91rm9200_devices.c</a></div><div class='hunk'>@@ -140,8 +140,8 @@ static struct macb_platform_data eth_data;</div><div class='ctx'> </div><div class='ctx'> static struct resource eth_resources[] = {</div><div class='ctx'> 	[0] = {</div><div class='del'>-		.start	= AT91_VA_BASE_EMAC,</div><div class='del'>-		.end	= AT91_VA_BASE_EMAC + SZ_16K - 1,</div><div class='add'>+		.start	= AT91RM9200_BASE_EMAC,</div><div class='add'>+		.end	= AT91RM9200_BASE_EMAC + SZ_16K - 1,</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='hunk'>@@ -1152,14 +1152,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)</div><div class='ctx'> 		at91_uarts[portnr] = pdev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init at91_set_serial_console(unsigned portnr)</div><div class='del'>-{</div><div class='del'>-	if (portnr &lt; ATMEL_MAX_UART) {</div><div class='del'>-		atmel_default_console_device = at91_uarts[portnr];</div><div class='del'>-		at91rm9200_set_console_clock(at91_uarts[portnr]-&gt;id);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init at91_add_device_serial(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1168,13 +1160,9 @@ void __init at91_add_device_serial(void)</div><div class='ctx'> 		if (at91_uarts[i])</div><div class='ctx'> 			platform_device_register(at91_uarts[i]);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (!atmel_default_console_device)</div><div class='del'>-		printk(KERN_INFO "AT91: No default serial console defined.\n");</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}</div><div class='del'>-void __init at91_set_serial_console(unsigned portnr) {}</div><div class='ctx'> void __init at91_add_device_serial(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c<br/>index 46f774233298..2b1e438ed878 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9260.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91sam9260.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9260.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9260.c</a></div><div class='hunk'>@@ -55,6 +55,13 @@ static struct clk adc_clk = {</div><div class='ctx'> 	.pmc_mask	= 1 &lt;&lt; AT91SAM9260_ID_ADC,</div><div class='ctx'> 	.type		= CLK_TYPE_PERIPHERAL,</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+static struct clk adc_op_clk = {</div><div class='add'>+	.name		= "adc_op_clk",</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+	.rate_hz	= 5000000,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct clk usart0_clk = {</div><div class='ctx'> 	.name		= "usart0_clk",</div><div class='ctx'> 	.pmc_mask	= 1 &lt;&lt; AT91SAM9260_ID_US0,</div><div class='hunk'>@@ -166,6 +173,7 @@ static struct clk *periph_clocks[] __initdata = {</div><div class='ctx'> 	&amp;pioB_clk,</div><div class='ctx'> 	&amp;pioC_clk,</div><div class='ctx'> 	&amp;adc_clk,</div><div class='add'>+	&amp;adc_op_clk,</div><div class='ctx'> 	&amp;usart0_clk,</div><div class='ctx'> 	&amp;usart1_clk,</div><div class='ctx'> 	&amp;usart2_clk,</div><div class='hunk'>@@ -268,18 +276,6 @@ static void __init at91sam9260_register_clocks(void)</div><div class='ctx'> 	clk_register(&amp;pck1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct clk_lookup console_clock_lookup;</div><div class='del'>-</div><div class='del'>-void __init at91sam9260_set_console_clock(int id)</div><div class='del'>-{</div><div class='del'>-	if (id &gt;= ARRAY_SIZE(usart_clocks_lookups))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	console_clock_lookup.con_id = "usart";</div><div class='del'>-	console_clock_lookup.clk = usart_clocks_lookups[id].clk;</div><div class='del'>-	clkdev_add(&amp;console_clock_lookup);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* --------------------------------------------------------------------</div><div class='ctx'>  *  GPIO</div><div class='ctx'>  * -------------------------------------------------------------------- */</div><div class='head'>diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c<br/>index 5652dde4bbe2..0ded951f785a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9260_devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91sam9260_devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9260_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9260_devices.c</a></div><div class='hunk'>@@ -17,12 +17,15 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/i2c-gpio.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/platform_data/at91_adc.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;mach/board.h&gt;</div><div class='ctx'> #include &lt;mach/cpu.h&gt;</div><div class='ctx'> #include &lt;mach/at91sam9260.h&gt;</div><div class='ctx'> #include &lt;mach/at91sam9260_matrix.h&gt;</div><div class='ctx'> #include &lt;mach/at91_matrix.h&gt;</div><div class='ctx'> #include &lt;mach/at91sam9_smc.h&gt;</div><div class='add'>+#include &lt;mach/at91_adc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "generic.h"</div><div class='ctx'> </div><div class='hunk'>@@ -702,25 +705,8 @@ static struct platform_device at91sam9260_tcb1_device = {</div><div class='ctx'> 	.num_resources	= ARRAY_SIZE(tcb1_resources),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_OF)</div><div class='del'>-static struct of_device_id tcb_ids[] = {</div><div class='del'>-	{ .compatible = "atmel,at91rm9200-tcb" },</div><div class='del'>-	{ /*sentinel*/ }</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static void __init at91_add_device_tc(void)</div><div class='ctx'> {</div><div class='del'>-#if defined(CONFIG_OF)</div><div class='del'>-	struct device_node *np;</div><div class='del'>-</div><div class='del'>-	np = of_find_matching_node(NULL, tcb_ids);</div><div class='del'>-	if (np) {</div><div class='del'>-		of_node_put(np);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	platform_device_register(&amp;at91sam9260_tcb0_device);</div><div class='ctx'> 	platform_device_register(&amp;at91sam9260_tcb1_device);</div><div class='ctx'> }</div><div class='hunk'>@@ -1229,14 +1215,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)</div><div class='ctx'> 		at91_uarts[portnr] = pdev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init at91_set_serial_console(unsigned portnr)</div><div class='del'>-{</div><div class='del'>-	if (portnr &lt; ATMEL_MAX_UART) {</div><div class='del'>-		atmel_default_console_device = at91_uarts[portnr];</div><div class='del'>-		at91sam9260_set_console_clock(at91_uarts[portnr]-&gt;id);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init at91_add_device_serial(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1245,13 +1223,9 @@ void __init at91_add_device_serial(void)</div><div class='ctx'> 		if (at91_uarts[i])</div><div class='ctx'> 			platform_device_register(at91_uarts[i]);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (!atmel_default_console_device)</div><div class='del'>-		printk(KERN_INFO "AT91: No default serial console defined.\n");</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}</div><div class='del'>-void __init at91_set_serial_console(unsigned portnr) {}</div><div class='ctx'> void __init at91_add_device_serial(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1369,6 +1343,93 @@ void __init at91_add_device_cf(struct at91_cf_data *data)</div><div class='ctx'> void __init at91_add_device_cf(struct at91_cf_data * data) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/* --------------------------------------------------------------------</div><div class='add'>+ *  ADCs</div><div class='add'>+ * -------------------------------------------------------------------- */</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_AT91_ADC)</div><div class='add'>+static struct at91_adc_data adc_data;</div><div class='add'>+</div><div class='add'>+static struct resource adc_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= AT91SAM9260_BASE_ADC,</div><div class='add'>+		.end	= AT91SAM9260_BASE_ADC + SZ_16K - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= AT91SAM9260_ID_ADC,</div><div class='add'>+		.end	= AT91SAM9260_ID_ADC,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device at91_adc_device = {</div><div class='add'>+	.name		= "at91_adc",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.dev		= {</div><div class='add'>+				.platform_data		= &amp;adc_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= adc_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(adc_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct at91_adc_trigger at91_adc_triggers[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name = "timer-counter-0",</div><div class='add'>+		.value = AT91_ADC_TRGSEL_TC0 | AT91_ADC_TRGEN,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.name = "timer-counter-1",</div><div class='add'>+		.value = AT91_ADC_TRGSEL_TC1 | AT91_ADC_TRGEN,</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.name = "timer-counter-2",</div><div class='add'>+		.value = AT91_ADC_TRGSEL_TC2 | AT91_ADC_TRGEN,</div><div class='add'>+	},</div><div class='add'>+	[3] = {</div><div class='add'>+		.name = "external",</div><div class='add'>+		.value = AT91_ADC_TRGSEL_EXTERNAL | AT91_ADC_TRGEN,</div><div class='add'>+		.is_external = true,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct at91_adc_reg_desc at91_adc_register_g20 = {</div><div class='add'>+	.channel_base = AT91_ADC_CHR(0),</div><div class='add'>+	.drdy_mask = AT91_ADC_DRDY,</div><div class='add'>+	.status_register = AT91_ADC_SR,</div><div class='add'>+	.trigger_register = AT91_ADC_MR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init at91_add_device_adc(struct at91_adc_data *data)</div><div class='add'>+{</div><div class='add'>+	if (!data)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (test_bit(0, &amp;data-&gt;channels_used))</div><div class='add'>+		at91_set_A_periph(AT91_PIN_PC0, 0);</div><div class='add'>+	if (test_bit(1, &amp;data-&gt;channels_used))</div><div class='add'>+		at91_set_A_periph(AT91_PIN_PC1, 0);</div><div class='add'>+	if (test_bit(2, &amp;data-&gt;channels_used))</div><div class='add'>+		at91_set_A_periph(AT91_PIN_PC2, 0);</div><div class='add'>+	if (test_bit(3, &amp;data-&gt;channels_used))</div><div class='add'>+		at91_set_A_periph(AT91_PIN_PC3, 0);</div><div class='add'>+</div><div class='add'>+	if (data-&gt;use_external_triggers)</div><div class='add'>+		at91_set_A_periph(AT91_PIN_PA22, 0);</div><div class='add'>+</div><div class='add'>+	data-&gt;num_channels = 4;</div><div class='add'>+	data-&gt;startup_time = 10;</div><div class='add'>+	data-&gt;registers = &amp;at91_adc_register_g20;</div><div class='add'>+	data-&gt;trigger_number = 4;</div><div class='add'>+	data-&gt;trigger_list = at91_adc_triggers;</div><div class='add'>+</div><div class='add'>+	adc_data = *data;</div><div class='add'>+	platform_device_register(&amp;at91_adc_device);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+void __init at91_add_device_adc(struct at91_adc_data *data) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* -------------------------------------------------------------------- */</div><div class='ctx'> /*</div><div class='ctx'>  * These devices are always present and don't need any board-specific</div><div class='hunk'>@@ -1376,6 +1437,9 @@ void __init at91_add_device_cf(struct at91_cf_data * data) {}</div><div class='ctx'>  */</div><div class='ctx'> static int __init at91_add_standard_devices(void)</div><div class='ctx'> {</div><div class='add'>+	if (of_have_populated_dt())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	at91_add_device_rtt();</div><div class='ctx'> 	at91_add_device_watchdog();</div><div class='ctx'> 	at91_add_device_tc();</div><div class='head'>diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c<br/>index 7de81e6222f1..c77d503d09d1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9261.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91sam9261.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9261.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9261.c</a></div><div class='hunk'>@@ -239,18 +239,6 @@ static void __init at91sam9261_register_clocks(void)</div><div class='ctx'> 	clk_register(&amp;hck1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct clk_lookup console_clock_lookup;</div><div class='del'>-</div><div class='del'>-void __init at91sam9261_set_console_clock(int id)</div><div class='del'>-{</div><div class='del'>-	if (id &gt;= ARRAY_SIZE(usart_clocks_lookups))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	console_clock_lookup.con_id = "usart";</div><div class='del'>-	console_clock_lookup.clk = usart_clocks_lookups[id].clk;</div><div class='del'>-	clkdev_add(&amp;console_clock_lookup);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* --------------------------------------------------------------------</div><div class='ctx'>  *  GPIO</div><div class='ctx'>  * -------------------------------------------------------------------- */</div><div class='head'>diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c<br/>index 4db961a93085..9295e90b08ff 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9261_devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91sam9261_devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9261_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9261_devices.c</a></div><div class='hunk'>@@ -1051,14 +1051,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)</div><div class='ctx'> 		at91_uarts[portnr] = pdev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init at91_set_serial_console(unsigned portnr)</div><div class='del'>-{</div><div class='del'>-	if (portnr &lt; ATMEL_MAX_UART) {</div><div class='del'>-		atmel_default_console_device = at91_uarts[portnr];</div><div class='del'>-		at91sam9261_set_console_clock(at91_uarts[portnr]-&gt;id);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init at91_add_device_serial(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1067,13 +1059,9 @@ void __init at91_add_device_serial(void)</div><div class='ctx'> 		if (at91_uarts[i])</div><div class='ctx'> 			platform_device_register(at91_uarts[i]);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (!atmel_default_console_device)</div><div class='del'>-		printk(KERN_INFO "AT91: No default serial console defined.\n");</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}</div><div class='del'>-void __init at91_set_serial_console(unsigned portnr) {}</div><div class='ctx'> void __init at91_add_device_serial(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c<br/>index ef301be66575..ed91c7e9f7c2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9263.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91sam9263.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9263.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9263.c</a></div><div class='hunk'>@@ -199,6 +199,16 @@ static struct clk_lookup periph_clocks_lookups[] = {</div><div class='ctx'> 	CLKDEV_CON_ID("pioC", &amp;pioCDE_clk),</div><div class='ctx'> 	CLKDEV_CON_ID("pioD", &amp;pioCDE_clk),</div><div class='ctx'> 	CLKDEV_CON_ID("pioE", &amp;pioCDE_clk),</div><div class='add'>+	/* more usart lookup table for DT entries */</div><div class='add'>+	CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &amp;mck),</div><div class='add'>+	CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &amp;usart0_clk),</div><div class='add'>+	CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &amp;usart1_clk),</div><div class='add'>+	CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &amp;usart2_clk),</div><div class='add'>+	/* more tc lookup table for DT entries */</div><div class='add'>+	CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &amp;tcb_clk),</div><div class='add'>+	CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &amp;ohci_clk),</div><div class='add'>+	CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &amp;spi0_clk),</div><div class='add'>+	CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &amp;spi1_clk),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct clk_lookup usart_clocks_lookups[] = {</div><div class='hunk'>@@ -255,18 +265,6 @@ static void __init at91sam9263_register_clocks(void)</div><div class='ctx'> 	clk_register(&amp;pck3);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct clk_lookup console_clock_lookup;</div><div class='del'>-</div><div class='del'>-void __init at91sam9263_set_console_clock(int id)</div><div class='del'>-{</div><div class='del'>-	if (id &gt;= ARRAY_SIZE(usart_clocks_lookups))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	console_clock_lookup.con_id = "usart";</div><div class='del'>-	console_clock_lookup.clk = usart_clocks_lookups[id].clk;</div><div class='del'>-	clkdev_add(&amp;console_clock_lookup);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* --------------------------------------------------------------------</div><div class='ctx'>  *  GPIO</div><div class='ctx'>  * -------------------------------------------------------------------- */</div><div class='head'>diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c<br/>index fe99206de880..175e0009eaa9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9263_devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91sam9263_devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9263_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9263_devices.c</a></div><div class='hunk'>@@ -953,8 +953,25 @@ static struct platform_device at91sam9263_tcb_device = {</div><div class='ctx'> 	.num_resources	= ARRAY_SIZE(tcb_resources),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_OF)</div><div class='add'>+static struct of_device_id tcb_ids[] = {</div><div class='add'>+	{ .compatible = "atmel,at91rm9200-tcb" },</div><div class='add'>+	{ /*sentinel*/ }</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static void __init at91_add_device_tc(void)</div><div class='ctx'> {</div><div class='add'>+#if defined(CONFIG_OF)</div><div class='add'>+	struct device_node *np;</div><div class='add'>+</div><div class='add'>+	np = of_find_matching_node(NULL, tcb_ids);</div><div class='add'>+	if (np) {</div><div class='add'>+		of_node_put(np);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	platform_device_register(&amp;at91sam9263_tcb_device);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='hunk'>@@ -1461,14 +1478,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)</div><div class='ctx'> 		at91_uarts[portnr] = pdev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init at91_set_serial_console(unsigned portnr)</div><div class='del'>-{</div><div class='del'>-	if (portnr &lt; ATMEL_MAX_UART) {</div><div class='del'>-		atmel_default_console_device = at91_uarts[portnr];</div><div class='del'>-		at91sam9263_set_console_clock(at91_uarts[portnr]-&gt;id);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init at91_add_device_serial(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1477,13 +1486,9 @@ void __init at91_add_device_serial(void)</div><div class='ctx'> 		if (at91_uarts[i])</div><div class='ctx'> 			platform_device_register(at91_uarts[i]);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (!atmel_default_console_device)</div><div class='del'>-		printk(KERN_INFO "AT91: No default serial console defined.\n");</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}</div><div class='del'>-void __init at91_set_serial_console(unsigned portnr) {}</div><div class='ctx'> void __init at91_add_device_serial(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1495,6 +1500,9 @@ void __init at91_add_device_serial(void) {}</div><div class='ctx'>  */</div><div class='ctx'> static int __init at91_add_standard_devices(void)</div><div class='ctx'> {</div><div class='add'>+	if (of_have_populated_dt())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	at91_add_device_rtt();</div><div class='ctx'> 	at91_add_device_watchdog();</div><div class='ctx'> 	at91_add_device_tc();</div><div class='head'>diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c<br/>index d222f8333dab..4792682d52b9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9g45.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91sam9g45.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9g45.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9g45.c</a></div><div class='hunk'>@@ -176,6 +176,12 @@ static struct clk vdec_clk = {</div><div class='ctx'> 	.type		= CLK_TYPE_PERIPHERAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct clk adc_op_clk = {</div><div class='add'>+	.name		= "adc_op_clk",</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+	.rate_hz	= 13200000,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct clk *periph_clocks[] __initdata = {</div><div class='ctx'> 	&amp;pioA_clk,</div><div class='ctx'> 	&amp;pioB_clk,</div><div class='hunk'>@@ -204,6 +210,7 @@ static struct clk *periph_clocks[] __initdata = {</div><div class='ctx'> 	&amp;isi_clk,</div><div class='ctx'> 	&amp;udphs_clk,</div><div class='ctx'> 	&amp;mmc1_clk,</div><div class='add'>+	&amp;adc_op_clk,</div><div class='ctx'> 	// irq0</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -242,6 +249,8 @@ static struct clk_lookup periph_clocks_lookups[] = {</div><div class='ctx'> 	CLKDEV_CON_ID("pioC", &amp;pioC_clk),</div><div class='ctx'> 	CLKDEV_CON_ID("pioD", &amp;pioDE_clk),</div><div class='ctx'> 	CLKDEV_CON_ID("pioE", &amp;pioDE_clk),</div><div class='add'>+	/* Fake adc clock */</div><div class='add'>+	CLKDEV_CON_ID("adc_clk", &amp;tsc_clk),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct clk_lookup usart_clocks_lookups[] = {</div><div class='hunk'>@@ -288,18 +297,6 @@ static void __init at91sam9g45_register_clocks(void)</div><div class='ctx'> 	clk_register(&amp;pck1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct clk_lookup console_clock_lookup;</div><div class='del'>-</div><div class='del'>-void __init at91sam9g45_set_console_clock(int id)</div><div class='del'>-{</div><div class='del'>-	if (id &gt;= ARRAY_SIZE(usart_clocks_lookups))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	console_clock_lookup.con_id = "usart";</div><div class='del'>-	console_clock_lookup.clk = usart_clocks_lookups[id].clk;</div><div class='del'>-	clkdev_add(&amp;console_clock_lookup);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* --------------------------------------------------------------------</div><div class='ctx'>  *  GPIO</div><div class='ctx'>  * -------------------------------------------------------------------- */</div><div class='head'>diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c<br/>index 6b008aee1dff..933fc9afe7d0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9g45_devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91sam9g45_devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9g45_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9g45_devices.c</a></div><div class='hunk'>@@ -19,9 +19,12 @@</div><div class='ctx'> #include &lt;linux/i2c-gpio.h&gt;</div><div class='ctx'> #include &lt;linux/atmel-mci.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/platform_data/at91_adc.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/fb.h&gt;</div><div class='ctx'> #include &lt;video/atmel_lcdc.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;mach/at91_adc.h&gt;</div><div class='ctx'> #include &lt;mach/board.h&gt;</div><div class='ctx'> #include &lt;mach/at91sam9g45.h&gt;</div><div class='ctx'> #include &lt;mach/at91sam9g45_matrix.h&gt;</div><div class='hunk'>@@ -69,15 +72,7 @@ static struct platform_device at_hdmac_device = {</div><div class='ctx'> </div><div class='ctx'> void __init at91_add_device_hdmac(void)</div><div class='ctx'> {</div><div class='del'>-#if defined(CONFIG_OF)</div><div class='del'>-	struct device_node *of_node =</div><div class='del'>-		of_find_node_by_name(NULL, "dma-controller");</div><div class='del'>-</div><div class='del'>-	if (of_node)</div><div class='del'>-		of_node_put(of_node);</div><div class='del'>-	else</div><div class='del'>-#endif</div><div class='del'>-		platform_device_register(&amp;at_hdmac_device);</div><div class='add'>+	platform_device_register(&amp;at_hdmac_device);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> void __init at91_add_device_hdmac(void) {}</div><div class='hunk'>@@ -441,7 +436,6 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)</div><div class='ctx'> 	atslave-&gt;dma_dev = &amp;at_hdmac_device.dev;</div><div class='ctx'> 	atslave-&gt;cfg = ATC_FIFOCFG_HALFFIFO</div><div class='ctx'> 			| ATC_SRC_H2SEL_HW | ATC_DST_H2SEL_HW;</div><div class='del'>-	atslave-&gt;ctrla = ATC_SCSIZE_16 | ATC_DCSIZE_16;</div><div class='ctx'> 	if (mmc_id == 0)	/* MCI0 */</div><div class='ctx'> 		atslave-&gt;cfg |= ATC_SRC_PER(AT_DMA_ID_MCI0)</div><div class='ctx'> 			      | ATC_DST_PER(AT_DMA_ID_MCI0);</div><div class='hunk'>@@ -1094,25 +1088,8 @@ static struct platform_device at91sam9g45_tcb1_device = {</div><div class='ctx'> 	.num_resources	= ARRAY_SIZE(tcb1_resources),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_OF)</div><div class='del'>-static struct of_device_id tcb_ids[] = {</div><div class='del'>-	{ .compatible = "atmel,at91rm9200-tcb" },</div><div class='del'>-	{ /*sentinel*/ }</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static void __init at91_add_device_tc(void)</div><div class='ctx'> {</div><div class='del'>-#if defined(CONFIG_OF)</div><div class='del'>-	struct device_node *np;</div><div class='del'>-</div><div class='del'>-	np = of_find_matching_node(NULL, tcb_ids);</div><div class='del'>-	if (np) {</div><div class='del'>-		of_node_put(np);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	platform_device_register(&amp;at91sam9g45_tcb0_device);</div><div class='ctx'> 	platform_device_register(&amp;at91sam9g45_tcb1_device);</div><div class='ctx'> }</div><div class='hunk'>@@ -1207,6 +1184,104 @@ void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* --------------------------------------------------------------------</div><div class='add'>+ *  ADC</div><div class='add'>+ * -------------------------------------------------------------------- */</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_AT91_ADC)</div><div class='add'>+static struct at91_adc_data adc_data;</div><div class='add'>+</div><div class='add'>+static struct resource adc_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= AT91SAM9G45_BASE_TSC,</div><div class='add'>+		.end	= AT91SAM9G45_BASE_TSC + SZ_16K - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= AT91SAM9G45_ID_TSC,</div><div class='add'>+		.end	= AT91SAM9G45_ID_TSC,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device at91_adc_device = {</div><div class='add'>+	.name		= "at91_adc",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.dev		= {</div><div class='add'>+				.platform_data	= &amp;adc_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= adc_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(adc_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct at91_adc_trigger at91_adc_triggers[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name = "external-rising",</div><div class='add'>+		.value = 1,</div><div class='add'>+		.is_external = true,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.name = "external-falling",</div><div class='add'>+		.value = 2,</div><div class='add'>+		.is_external = true,</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.name = "external-any",</div><div class='add'>+		.value = 3,</div><div class='add'>+		.is_external = true,</div><div class='add'>+	},</div><div class='add'>+	[3] = {</div><div class='add'>+		.name = "continuous",</div><div class='add'>+		.value = 6,</div><div class='add'>+		.is_external = false,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct at91_adc_reg_desc at91_adc_register_g45 = {</div><div class='add'>+	.channel_base = AT91_ADC_CHR(0),</div><div class='add'>+	.drdy_mask = AT91_ADC_DRDY,</div><div class='add'>+	.status_register = AT91_ADC_SR,</div><div class='add'>+	.trigger_register = 0x08,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init at91_add_device_adc(struct at91_adc_data *data)</div><div class='add'>+{</div><div class='add'>+	if (!data)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (test_bit(0, &amp;data-&gt;channels_used))</div><div class='add'>+		at91_set_gpio_input(AT91_PIN_PD20, 0);</div><div class='add'>+	if (test_bit(1, &amp;data-&gt;channels_used))</div><div class='add'>+		at91_set_gpio_input(AT91_PIN_PD21, 0);</div><div class='add'>+	if (test_bit(2, &amp;data-&gt;channels_used))</div><div class='add'>+		at91_set_gpio_input(AT91_PIN_PD22, 0);</div><div class='add'>+	if (test_bit(3, &amp;data-&gt;channels_used))</div><div class='add'>+		at91_set_gpio_input(AT91_PIN_PD23, 0);</div><div class='add'>+	if (test_bit(4, &amp;data-&gt;channels_used))</div><div class='add'>+		at91_set_gpio_input(AT91_PIN_PD24, 0);</div><div class='add'>+	if (test_bit(5, &amp;data-&gt;channels_used))</div><div class='add'>+		at91_set_gpio_input(AT91_PIN_PD25, 0);</div><div class='add'>+	if (test_bit(6, &amp;data-&gt;channels_used))</div><div class='add'>+		at91_set_gpio_input(AT91_PIN_PD26, 0);</div><div class='add'>+	if (test_bit(7, &amp;data-&gt;channels_used))</div><div class='add'>+		at91_set_gpio_input(AT91_PIN_PD27, 0);</div><div class='add'>+</div><div class='add'>+	if (data-&gt;use_external_triggers)</div><div class='add'>+		at91_set_A_periph(AT91_PIN_PD28, 0);</div><div class='add'>+</div><div class='add'>+	data-&gt;num_channels = 8;</div><div class='add'>+	data-&gt;startup_time = 40;</div><div class='add'>+	data-&gt;registers = &amp;at91_adc_register_g45;</div><div class='add'>+	data-&gt;trigger_number = 4;</div><div class='add'>+	data-&gt;trigger_list = at91_adc_triggers;</div><div class='add'>+</div><div class='add'>+	adc_data = *data;</div><div class='add'>+	platform_device_register(&amp;at91_adc_device);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+void __init at91_add_device_adc(struct at91_adc_data *data) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* --------------------------------------------------------------------</div><div class='ctx'>  *  RTT</div><div class='ctx'>  * -------------------------------------------------------------------- */</div><div class='ctx'> </div><div class='hunk'>@@ -1741,14 +1816,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)</div><div class='ctx'> 		at91_uarts[portnr] = pdev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init at91_set_serial_console(unsigned portnr)</div><div class='del'>-{</div><div class='del'>-	if (portnr &lt; ATMEL_MAX_UART) {</div><div class='del'>-		atmel_default_console_device = at91_uarts[portnr];</div><div class='del'>-		at91sam9g45_set_console_clock(at91_uarts[portnr]-&gt;id);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init at91_add_device_serial(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1757,13 +1824,9 @@ void __init at91_add_device_serial(void)</div><div class='ctx'> 		if (at91_uarts[i])</div><div class='ctx'> 			platform_device_register(at91_uarts[i]);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (!atmel_default_console_device)</div><div class='del'>-		printk(KERN_INFO "AT91: No default serial console defined.\n");</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}</div><div class='del'>-void __init at91_set_serial_console(unsigned portnr) {}</div><div class='ctx'> void __init at91_add_device_serial(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1775,6 +1838,9 @@ void __init at91_add_device_serial(void) {}</div><div class='ctx'>  */</div><div class='ctx'> static int __init at91_add_standard_devices(void)</div><div class='ctx'> {</div><div class='add'>+	if (of_have_populated_dt())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	at91_add_device_hdmac();</div><div class='ctx'> 	at91_add_device_rtc();</div><div class='ctx'> 	at91_add_device_rtt();</div><div class='head'>diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c<br/>new file mode 100644<br/>index 000000000000..08494664ab78<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9n12.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9n12.c</a></div><div class='hunk'>@@ -0,0 +1,233 @@</div><div class='add'>+/*</div><div class='add'>+ * SoC specific setup code for the AT91SAM9N12</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Atmel Corporation.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/irq.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/mach/map.h&gt;</div><div class='add'>+#include &lt;mach/at91sam9n12.h&gt;</div><div class='add'>+#include &lt;mach/at91_pmc.h&gt;</div><div class='add'>+#include &lt;mach/cpu.h&gt;</div><div class='add'>+#include &lt;mach/board.h&gt;</div><div class='add'>+</div><div class='add'>+#include "soc.h"</div><div class='add'>+#include "generic.h"</div><div class='add'>+#include "clock.h"</div><div class='add'>+#include "sam9_smc.h"</div><div class='add'>+</div><div class='add'>+/* --------------------------------------------------------------------</div><div class='add'>+ *  Clocks</div><div class='add'>+ * -------------------------------------------------------------------- */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The peripheral clocks.</div><div class='add'>+ */</div><div class='add'>+static struct clk pioAB_clk = {</div><div class='add'>+	.name		= "pioAB_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_PIOAB,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk pioCD_clk = {</div><div class='add'>+	.name		= "pioCD_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_PIOCD,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk usart0_clk = {</div><div class='add'>+	.name		= "usart0_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_USART0,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk usart1_clk = {</div><div class='add'>+	.name		= "usart1_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_USART1,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk usart2_clk = {</div><div class='add'>+	.name		= "usart2_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_USART2,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk usart3_clk = {</div><div class='add'>+	.name		= "usart3_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_USART3,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk twi0_clk = {</div><div class='add'>+	.name		= "twi0_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_TWI0,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk twi1_clk = {</div><div class='add'>+	.name		= "twi1_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_TWI1,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk mmc_clk = {</div><div class='add'>+	.name		= "mci_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_MCI,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk spi0_clk = {</div><div class='add'>+	.name		= "spi0_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_SPI0,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk spi1_clk = {</div><div class='add'>+	.name		= "spi1_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_SPI1,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk uart0_clk = {</div><div class='add'>+	.name		= "uart0_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_UART0,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk uart1_clk = {</div><div class='add'>+	.name		= "uart1_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_UART1,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk tcb_clk = {</div><div class='add'>+	.name		= "tcb_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_TCB,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk pwm_clk = {</div><div class='add'>+	.name		= "pwm_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_PWM,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk adc_clk = {</div><div class='add'>+	.name		= "adc_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_ADC,</div><div class='add'>+	.type	= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk dma_clk = {</div><div class='add'>+	.name		= "dma_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_DMA,</div><div class='add'>+	.type	= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk uhp_clk = {</div><div class='add'>+	.name		= "uhp",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_UHP,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk udp_clk = {</div><div class='add'>+	.name		= "udp_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_UDP,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk lcdc_clk = {</div><div class='add'>+	.name		= "lcdc_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_LCDC,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+static struct clk ssc_clk = {</div><div class='add'>+	.name		= "ssc_clk",</div><div class='add'>+	.pmc_mask	= 1 &lt;&lt; AT91SAM9N12_ID_SSC,</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *periph_clocks[] __initdata = {</div><div class='add'>+	&amp;pioAB_clk,</div><div class='add'>+	&amp;pioCD_clk,</div><div class='add'>+	&amp;usart0_clk,</div><div class='add'>+	&amp;usart1_clk,</div><div class='add'>+	&amp;usart2_clk,</div><div class='add'>+	&amp;usart3_clk,</div><div class='add'>+	&amp;twi0_clk,</div><div class='add'>+	&amp;twi1_clk,</div><div class='add'>+	&amp;mmc_clk,</div><div class='add'>+	&amp;spi0_clk,</div><div class='add'>+	&amp;spi1_clk,</div><div class='add'>+	&amp;lcdc_clk,</div><div class='add'>+	&amp;uart0_clk,</div><div class='add'>+	&amp;uart1_clk,</div><div class='add'>+	&amp;tcb_clk,</div><div class='add'>+	&amp;pwm_clk,</div><div class='add'>+	&amp;adc_clk,</div><div class='add'>+	&amp;dma_clk,</div><div class='add'>+	&amp;uhp_clk,</div><div class='add'>+	&amp;udp_clk,</div><div class='add'>+	&amp;ssc_clk,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup periph_clocks_lookups[] = {</div><div class='add'>+	/* lookup table for DT entries */</div><div class='add'>+	CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &amp;mck),</div><div class='add'>+	CLKDEV_CON_DEV_ID("usart", "f801c000.serial", &amp;usart0_clk),</div><div class='add'>+	CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &amp;usart1_clk),</div><div class='add'>+	CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &amp;usart2_clk),</div><div class='add'>+	CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &amp;usart3_clk),</div><div class='add'>+	CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &amp;tcb_clk),</div><div class='add'>+	CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &amp;tcb_clk),</div><div class='add'>+	CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &amp;dma_clk),</div><div class='add'>+	CLKDEV_CON_ID("pioA", &amp;pioAB_clk),</div><div class='add'>+	CLKDEV_CON_ID("pioB", &amp;pioAB_clk),</div><div class='add'>+	CLKDEV_CON_ID("pioC", &amp;pioCD_clk),</div><div class='add'>+	CLKDEV_CON_ID("pioD", &amp;pioCD_clk),</div><div class='add'>+	/* additional fake clock for macb_hclk */</div><div class='add'>+	CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &amp;uhp_clk),</div><div class='add'>+	CLKDEV_CON_DEV_ID("ohci_clk", "500000.ohci", &amp;uhp_clk),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The two programmable clocks.</div><div class='add'>+ * You must configure pin multiplexing to bring these signals out.</div><div class='add'>+ */</div><div class='add'>+static struct clk pck0 = {</div><div class='add'>+	.name		= "pck0",</div><div class='add'>+	.pmc_mask	= AT91_PMC_PCK0,</div><div class='add'>+	.type		= CLK_TYPE_PROGRAMMABLE,</div><div class='add'>+	.id		= 0,</div><div class='add'>+};</div><div class='add'>+static struct clk pck1 = {</div><div class='add'>+	.name		= "pck1",</div><div class='add'>+	.pmc_mask	= AT91_PMC_PCK1,</div><div class='add'>+	.type		= CLK_TYPE_PROGRAMMABLE,</div><div class='add'>+	.id		= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init at91sam9n12_register_clocks(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(periph_clocks); i++)</div><div class='add'>+		clk_register(periph_clocks[i]);</div><div class='add'>+	clk_register(&amp;pck0);</div><div class='add'>+	clk_register(&amp;pck1);</div><div class='add'>+</div><div class='add'>+	clkdev_add_table(periph_clocks_lookups,</div><div class='add'>+			 ARRAY_SIZE(periph_clocks_lookups));</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* --------------------------------------------------------------------</div><div class='add'>+ *  AT91SAM9N12 processor initialization</div><div class='add'>+ * -------------------------------------------------------------------- */</div><div class='add'>+</div><div class='add'>+static void __init at91sam9n12_map_io(void)</div><div class='add'>+{</div><div class='add'>+	at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init at91sam9n12_initialize(void)</div><div class='add'>+{</div><div class='add'>+	at91_extern_irq = (1 &lt;&lt; AT91SAM9N12_ID_IRQ0);</div><div class='add'>+</div><div class='add'>+	/* Register GPIO subsystem (using DT) */</div><div class='add'>+	at91_gpio_init(NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct at91_init_soc __initdata at91sam9n12_soc = {</div><div class='add'>+	.map_io = at91sam9n12_map_io,</div><div class='add'>+	.register_clocks = at91sam9n12_register_clocks,</div><div class='add'>+	.init = at91sam9n12_initialize,</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c<br/>index d9f2774f385e..e420085a57ef 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9rl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91sam9rl.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9rl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9rl.c</a></div><div class='hunk'>@@ -232,18 +232,6 @@ static void __init at91sam9rl_register_clocks(void)</div><div class='ctx'> 	clk_register(&amp;pck1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct clk_lookup console_clock_lookup;</div><div class='del'>-</div><div class='del'>-void __init at91sam9rl_set_console_clock(int id)</div><div class='del'>-{</div><div class='del'>-	if (id &gt;= ARRAY_SIZE(usart_clocks_lookups))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	console_clock_lookup.con_id = "usart";</div><div class='del'>-	console_clock_lookup.clk = usart_clocks_lookups[id].clk;</div><div class='del'>-	clkdev_add(&amp;console_clock_lookup);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* --------------------------------------------------------------------</div><div class='ctx'>  *  GPIO</div><div class='ctx'>  * -------------------------------------------------------------------- */</div><div class='head'>diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c<br/>index fe4ae22e8561..9c0b1481a9a7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9rl_devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91sam9rl_devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9rl_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9rl_devices.c</a></div><div class='hunk'>@@ -1192,14 +1192,6 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)</div><div class='ctx'> 		at91_uarts[portnr] = pdev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init at91_set_serial_console(unsigned portnr)</div><div class='del'>-{</div><div class='del'>-	if (portnr &lt; ATMEL_MAX_UART) {</div><div class='del'>-		atmel_default_console_device = at91_uarts[portnr];</div><div class='del'>-		at91sam9rl_set_console_clock(at91_uarts[portnr]-&gt;id);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init at91_add_device_serial(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1208,13 +1200,9 @@ void __init at91_add_device_serial(void)</div><div class='ctx'> 		if (at91_uarts[i])</div><div class='ctx'> 			platform_device_register(at91_uarts[i]);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (!atmel_default_console_device)</div><div class='del'>-		printk(KERN_INFO "AT91: No default serial console defined.\n");</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}</div><div class='del'>-void __init at91_set_serial_console(unsigned portnr) {}</div><div class='ctx'> void __init at91_add_device_serial(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c<br/>index 13c8cae60462..1b144b4d3ce1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9x5.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/at91sam9x5.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/at91sam9x5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/at91sam9x5.c</a></div><div class='hunk'>@@ -120,6 +120,11 @@ static struct clk adc_clk = {</div><div class='ctx'> 	.pmc_mask	= 1 &lt;&lt; AT91SAM9X5_ID_ADC,</div><div class='ctx'> 	.type	= CLK_TYPE_PERIPHERAL,</div><div class='ctx'> };</div><div class='add'>+static struct clk adc_op_clk = {</div><div class='add'>+	.name		= "adc_op_clk",</div><div class='add'>+	.type		= CLK_TYPE_PERIPHERAL,</div><div class='add'>+	.rate_hz	= 5000000,</div><div class='add'>+};</div><div class='ctx'> static struct clk dma0_clk = {</div><div class='ctx'> 	.name		= "dma0_clk",</div><div class='ctx'> 	.pmc_mask	= 1 &lt;&lt; AT91SAM9X5_ID_DMA0,</div><div class='hunk'>@@ -205,6 +210,7 @@ static struct clk *periph_clocks[] __initdata = {</div><div class='ctx'> 	&amp;tcb0_clk,</div><div class='ctx'> 	&amp;pwm_clk,</div><div class='ctx'> 	&amp;adc_clk,</div><div class='add'>+	&amp;adc_op_clk,</div><div class='ctx'> 	&amp;dma0_clk,</div><div class='ctx'> 	&amp;dma1_clk,</div><div class='ctx'> 	&amp;uhphs_clk,</div><div class='head'>diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c<br/>index 2628384aaae1..271f994314a4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-1arm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-1arm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-1arm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-1arm.c</a></div><div class='hunk'>@@ -47,20 +47,6 @@ static void __init onearm_init_early(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='del'>-			   | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata onearm_eth_data = {</div><div class='hunk'>@@ -82,6 +68,16 @@ static struct at91_udc_data __initdata onearm_udc_data = {</div><div class='ctx'> static void __init onearm_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='add'>+			   | ATMEL_UART_RI);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* Ethernet */</div><div class='ctx'> 	at91_add_device_eth(&amp;onearm_eth_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c<br/>index 161efbaa1029..b7d8aa7b81e6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-afeb-9260v1.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-afeb-9260v1.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-afeb-9260v1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-afeb-9260v1.c</a></div><div class='hunk'>@@ -52,22 +52,6 @@ static void __init afeb9260_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US0, 1,</div><div class='del'>-			     ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			   | ATMEL_UART_DTR | ATMEL_UART_DSR</div><div class='del'>-			   | ATMEL_UART_DCD | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US1, 2,</div><div class='del'>-			ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -183,6 +167,18 @@ static struct at91_cf_data afeb9260_cf_data = {</div><div class='ctx'> static void __init afeb9260_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US0, 1,</div><div class='add'>+			     ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			   | ATMEL_UART_DTR | ATMEL_UART_DSR</div><div class='add'>+			   | ATMEL_UART_DCD | ATMEL_UART_RI);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US1, 2,</div><div class='add'>+			ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;afeb9260_usbh_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c<br/>index c6d44ee0c77e..29d3ef0a50fb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-cam60.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-cam60.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-cam60.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-cam60.c</a></div><div class='hunk'>@@ -49,12 +49,6 @@ static void __init cam60_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 10 MHz crystal */</div><div class='ctx'> 	at91_initialize(10000000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -175,6 +169,8 @@ static void __init cam60_add_device_nand(void)</div><div class='ctx'> static void __init cam60_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* SPI */</div><div class='ctx'> 	at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices));</div><div class='head'>diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c<br/>index 59d9cf997537..44328a6d4609 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-carmeva.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-carmeva.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-carmeva.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-carmeva.c</a></div><div class='hunk'>@@ -44,17 +44,6 @@ static void __init carmeva_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 20.000 MHz crystal */</div><div class='ctx'> 	at91_initialize(20000000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='del'>-			   | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata carmeva_eth_data = {</div><div class='hunk'>@@ -139,6 +128,13 @@ static struct gpio_led carmeva_leds[] = {</div><div class='ctx'> static void __init carmeva_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='add'>+			   | ATMEL_UART_RI);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* Ethernet */</div><div class='ctx'> 	at91_add_device_eth(&amp;carmeva_eth_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c<br/>index 5f3680e7c883..69951ec7dbf3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-cpu9krea.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-cpu9krea.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-cpu9krea.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-cpu9krea.c</a></div><div class='hunk'>@@ -52,34 +52,6 @@ static void __init cpu9krea_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* DGBU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |</div><div class='del'>-		ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |</div><div class='del'>-		ATMEL_UART_DCD | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS |</div><div class='del'>-		ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS |</div><div class='del'>-		ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* USART3 on ttyS4. (Rx, Tx) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US3, 4, 0);</div><div class='del'>-</div><div class='del'>-	/* USART4 on ttyS5. (Rx, Tx) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US4, 5, 0);</div><div class='del'>-</div><div class='del'>-	/* USART5 on ttyS6. (Rx, Tx) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US5, 6, 0);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -352,6 +324,30 @@ static void __init cpu9krea_board_init(void)</div><div class='ctx'> 	/* NOR */</div><div class='ctx'> 	cpu9krea_add_device_nor();</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DGBU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |</div><div class='add'>+		ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |</div><div class='add'>+		ATMEL_UART_DCD | ATMEL_UART_RI);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS |</div><div class='add'>+		ATMEL_UART_RTS);</div><div class='add'>+</div><div class='add'>+	/* USART2 on ttyS3. (Rx, Tx, RTS, CTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS |</div><div class='add'>+		ATMEL_UART_RTS);</div><div class='add'>+</div><div class='add'>+	/* USART3 on ttyS4. (Rx, Tx) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US3, 4, 0);</div><div class='add'>+</div><div class='add'>+	/* USART4 on ttyS5. (Rx, Tx) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US4, 5, 0);</div><div class='add'>+</div><div class='add'>+	/* USART5 on ttyS6. (Rx, Tx) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US5, 6, 0);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;cpu9krea_usbh_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c<br/>index e094cc81fe25..895cf2dba612 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-cpuat91.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-cpuat91.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-cpuat91.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-cpuat91.c</a></div><div class='hunk'>@@ -59,28 +59,6 @@ static void __init cpuat91_init_early(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS |</div><div class='del'>-		ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS |</div><div class='del'>-		ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |</div><div class='del'>-		ATMEL_UART_DCD | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* USART2 on ttyS3 (Rx, Tx) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US2, 3, 0);</div><div class='del'>-</div><div class='del'>-	/* USART3 on ttyS4 (Rx, Tx, CTS, RTS) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS |</div><div class='del'>-		ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata cpuat91_eth_data = {</div><div class='hunk'>@@ -161,6 +139,24 @@ static struct platform_device *platform_devices[] __initdata = {</div><div class='ctx'> static void __init cpuat91_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS |</div><div class='add'>+		ATMEL_UART_RTS);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS |</div><div class='add'>+		ATMEL_UART_RTS | ATMEL_UART_DTR | ATMEL_UART_DSR |</div><div class='add'>+		ATMEL_UART_DCD | ATMEL_UART_RI);</div><div class='add'>+</div><div class='add'>+	/* USART2 on ttyS3 (Rx, Tx) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US2, 3, 0);</div><div class='add'>+</div><div class='add'>+	/* USART3 on ttyS4 (Rx, Tx, CTS, RTS) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS |</div><div class='add'>+		ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* LEDs. */</div><div class='ctx'> 	at91_gpio_leds(cpuat91_leds, ARRAY_SIZE(cpuat91_leds));</div><div class='head'>diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c<br/>index 1a1547b1ce4e..cd813361cd26 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-csb337.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-csb337.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-csb337.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-csb337.c</a></div><div class='hunk'>@@ -47,15 +47,6 @@ static void __init csb337_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 3.6864 MHz crystal */</div><div class='ctx'> 	at91_initialize(3686400);</div><div class='del'>-</div><div class='del'>-	/* Setup the LEDs */</div><div class='del'>-	at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0 */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* make console=ttyS0 the default */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata csb337_eth_data = {</div><div class='hunk'>@@ -228,7 +219,11 @@ static struct gpio_led csb_leds[] = {</div><div class='ctx'> </div><div class='ctx'> static void __init csb337_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* Setup the LEDs */</div><div class='add'>+	at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0 */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* Ethernet */</div><div class='ctx'> 	at91_add_device_eth(&amp;csb337_eth_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c<br/>index f650bf39455d..7c8b05a57d7f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-csb637.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-csb637.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-csb637.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-csb637.c</a></div><div class='hunk'>@@ -44,12 +44,6 @@ static void __init csb637_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 3.6864 MHz crystal */</div><div class='ctx'> 	at91_initialize(3686400);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* make console=ttyS0 (ie, DBGU) the default */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata csb637_eth_data = {</div><div class='hunk'>@@ -118,6 +112,8 @@ static void __init csb637_board_init(void)</div><div class='ctx'> 	/* LED(s) */</div><div class='ctx'> 	at91_gpio_leds(csb_leds, ARRAY_SIZE(csb_leds));</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* Ethernet */</div><div class='ctx'> 	at91_add_device_eth(&amp;csb637_eth_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c<br/>index c18d4d307801..a1fce05aa7a5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-dt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-dt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-dt.c</a></div><div class='hunk'>@@ -1,10 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  Setup code for AT91SAM Evaluation Kits with Device Tree support</div><div class='ctx'>  *</div><div class='del'>- *  Covers: * AT91SAM9G45-EKES  board</div><div class='del'>- *          * AT91SAM9M10-EKES  board</div><div class='del'>- *          * AT91SAM9M10G45-EK board</div><div class='del'>- *</div><div class='ctx'>  *  Copyright (C) 2011 Atmel,</div><div class='ctx'>  *                2011 Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;</div><div class='ctx'>  *</div><div class='hunk'>@@ -49,9 +45,7 @@ static void __init at91_dt_device_init(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *at91_dt_board_compat[] __initdata = {</div><div class='del'>-	"atmel,at91sam9m10g45ek",</div><div class='del'>-	"atmel,at91sam9x5ek",</div><div class='del'>-	"calao,usb-a9g20",</div><div class='add'>+	"atmel,at91sam9",</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c<br/>index d302ca3eeb64..bd1017297989 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-eb9200.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-eb9200.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-eb9200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-eb9200.c</a></div><div class='hunk'>@@ -44,20 +44,6 @@ static void __init eb9200_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='del'>-			| ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* USART2 on ttyS2. (Rx, Tx) - IRDA */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US2, 2, 0);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata eb9200_eth_data = {</div><div class='hunk'>@@ -101,6 +87,16 @@ static struct i2c_board_info __initdata eb9200_i2c_devices[] = {</div><div class='ctx'> static void __init eb9200_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='add'>+			| ATMEL_UART_RI);</div><div class='add'>+</div><div class='add'>+	/* USART2 on ttyS2. (Rx, Tx) - IRDA */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US2, 2, 0);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* Ethernet */</div><div class='ctx'> 	at91_add_device_eth(&amp;eb9200_eth_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c<br/>index 69966ce4d776..89cc3726a9ce 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-ecbat91.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-ecbat91.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-ecbat91.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-ecbat91.c</a></div><div class='hunk'>@@ -50,18 +50,6 @@ static void __init ecb_at91init_early(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* Setup the LEDs */</div><div class='del'>-	at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US0, 1, 0);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata ecb_at91eth_data = {</div><div class='hunk'>@@ -151,7 +139,15 @@ static struct spi_board_info __initdata ecb_at91spi_devices[] = {</div><div class='ctx'> </div><div class='ctx'> static void __init ecb_at91board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* Setup the LEDs */</div><div class='add'>+	at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);</div><div class='add'>+</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US0, 1, 0);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> </div><div class='ctx'> 	/* Ethernet */</div><div class='head'>diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c<br/>index f23aabef8551..558546cf63f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-eco920.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-eco920.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-eco920.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-eco920.c</a></div><div class='hunk'>@@ -37,15 +37,6 @@ static void __init eco920_init_early(void)</div><div class='ctx'> 	at91rm9200_set_type(ARCH_REVISON_9200_PQFP);</div><div class='ctx'> </div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* Setup the LEDs */</div><div class='del'>-	at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata eco920_eth_data = {</div><div class='hunk'>@@ -103,6 +94,10 @@ static struct spi_board_info eco920_spi_devices[] = {</div><div class='ctx'> </div><div class='ctx'> static void __init eco920_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* Setup the LEDs */</div><div class='add'>+	at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	at91_add_device_eth(&amp;eco920_eth_data);</div><div class='ctx'> 	at91_add_device_usbh(&amp;eco920_usbh_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c<br/>index 1815152001f7..47658f78105d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-flexibity.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-flexibity.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-flexibity.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-flexibity.c</a></div><div class='hunk'>@@ -41,12 +41,6 @@ static void __init flexibity_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* USB Host port */</div><div class='hunk'>@@ -143,6 +137,8 @@ static struct gpio_led flexibity_leds[] = {</div><div class='ctx'> static void __init flexibity_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;flexibity_usbh_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c<br/>index caf017f0f4ee..33411e6ecb1f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-foxg20.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-foxg20.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-foxg20.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-foxg20.c</a></div><div class='hunk'>@@ -61,44 +61,6 @@ static void __init foxg20_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US0, 1,</div><div class='del'>-				ATMEL_UART_CTS</div><div class='del'>-				| ATMEL_UART_RTS</div><div class='del'>-				| ATMEL_UART_DTR</div><div class='del'>-				| ATMEL_UART_DSR</div><div class='del'>-				| ATMEL_UART_DCD</div><div class='del'>-				| ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US1, 2,</div><div class='del'>-		ATMEL_UART_CTS</div><div class='del'>-		| ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* USART2 on ttyS3. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US2, 3, 0);</div><div class='del'>-</div><div class='del'>-	/* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US3, 4,</div><div class='del'>-		ATMEL_UART_CTS</div><div class='del'>-		| ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* USART4 on ttyS5. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US4, 5, 0);</div><div class='del'>-</div><div class='del'>-	/* USART5 on ttyS6. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US5, 6, 0);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='del'>-</div><div class='del'>-	/* Set the internal pull-up resistor on DRXD */</div><div class='del'>-	at91_set_A_periph(AT91_PIN_PB14, 1);</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -241,6 +203,39 @@ static struct i2c_board_info __initdata foxg20_i2c_devices[] = {</div><div class='ctx'> static void __init foxg20_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US0, 1,</div><div class='add'>+				ATMEL_UART_CTS</div><div class='add'>+				| ATMEL_UART_RTS</div><div class='add'>+				| ATMEL_UART_DTR</div><div class='add'>+				| ATMEL_UART_DSR</div><div class='add'>+				| ATMEL_UART_DCD</div><div class='add'>+				| ATMEL_UART_RI);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US1, 2,</div><div class='add'>+		ATMEL_UART_CTS</div><div class='add'>+		| ATMEL_UART_RTS);</div><div class='add'>+</div><div class='add'>+	/* USART2 on ttyS3. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US2, 3, 0);</div><div class='add'>+</div><div class='add'>+	/* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US3, 4,</div><div class='add'>+		ATMEL_UART_CTS</div><div class='add'>+		| ATMEL_UART_RTS);</div><div class='add'>+</div><div class='add'>+	/* USART4 on ttyS5. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US4, 5, 0);</div><div class='add'>+</div><div class='add'>+	/* USART5 on ttyS6. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US5, 6, 0);</div><div class='add'>+</div><div class='add'>+	/* Set the internal pull-up resistor on DRXD */</div><div class='add'>+	at91_set_A_periph(AT91_PIN_PB14, 1);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;foxg20_usbh_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c<br/>index 230e71969fb7..3e0dfa643a86 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-gsia18s.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-gsia18s.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-gsia18s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-gsia18s.c</a></div><div class='hunk'>@@ -41,38 +41,6 @@</div><div class='ctx'> static void __init gsia18s_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	stamp9g20_init_early();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI).</div><div class='del'>-	 * Used for Internal Analog Modem.</div><div class='del'>-	 */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US0, 1,</div><div class='del'>-				ATMEL_UART_CTS | ATMEL_UART_RTS |</div><div class='del'>-				ATMEL_UART_DTR | ATMEL_UART_DSR |</div><div class='del'>-				ATMEL_UART_DCD | ATMEL_UART_RI);</div><div class='del'>-	/*</div><div class='del'>-	 * USART1 on ttyS2 (Rx, Tx, CTS, RTS).</div><div class='del'>-	 * Used for GPS or WiFi or Data stream.</div><div class='del'>-	 */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US1, 2,</div><div class='del'>-				ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-	/*</div><div class='del'>-	 * USART2 on ttyS3 (Rx, Tx, CTS, RTS).</div><div class='del'>-	 * Used for External Modem.</div><div class='del'>-	 */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US2, 3,</div><div class='del'>-				ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-	/*</div><div class='del'>-	 * USART3 on ttyS4 (Rx, Tx, RTS).</div><div class='del'>-	 * Used for RS-485.</div><div class='del'>-	 */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * USART4 on ttyS5 (Rx, Tx).</div><div class='del'>-	 * Used for TRX433 Radio Module.</div><div class='del'>-	 */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US4, 5, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -558,6 +526,37 @@ static int __init gsia18s_power_off_init(void)</div><div class='ctx'> </div><div class='ctx'> static void __init gsia18s_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/*</div><div class='add'>+	 * USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI).</div><div class='add'>+	 * Used for Internal Analog Modem.</div><div class='add'>+	 */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US0, 1,</div><div class='add'>+				ATMEL_UART_CTS | ATMEL_UART_RTS |</div><div class='add'>+				ATMEL_UART_DTR | ATMEL_UART_DSR |</div><div class='add'>+				ATMEL_UART_DCD | ATMEL_UART_RI);</div><div class='add'>+	/*</div><div class='add'>+	 * USART1 on ttyS2 (Rx, Tx, CTS, RTS).</div><div class='add'>+	 * Used for GPS or WiFi or Data stream.</div><div class='add'>+	 */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US1, 2,</div><div class='add'>+				ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='add'>+	/*</div><div class='add'>+	 * USART2 on ttyS3 (Rx, Tx, CTS, RTS).</div><div class='add'>+	 * Used for External Modem.</div><div class='add'>+	 */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US2, 3,</div><div class='add'>+				ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='add'>+	/*</div><div class='add'>+	 * USART3 on ttyS4 (Rx, Tx, RTS).</div><div class='add'>+	 * Used for RS-485.</div><div class='add'>+	 */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * USART4 on ttyS5 (Rx, Tx).</div><div class='add'>+	 * Used for TRX433 Radio Module.</div><div class='add'>+	 */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US4, 5, 0);</div><div class='ctx'> 	stamp9g20_board_init();</div><div class='ctx'> 	at91_add_device_usbh(&amp;usbh_data);</div><div class='ctx'> 	at91_add_device_udc(&amp;udc_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c<br/>index efde1b2327c8..f260657f32bc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-kafa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-kafa.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-kafa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-kafa.c</a></div><div class='hunk'>@@ -47,18 +47,6 @@ static void __init kafa_init_early(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* Set up the LEDs */</div><div class='del'>-	at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata kafa_eth_data = {</div><div class='hunk'>@@ -79,7 +67,15 @@ static struct at91_udc_data __initdata kafa_udc_data = {</div><div class='ctx'> </div><div class='ctx'> static void __init kafa_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* Set up the LEDs */</div><div class='add'>+	at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);</div><div class='add'>+</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* Ethernet */</div><div class='ctx'> 	at91_add_device_eth(&amp;kafa_eth_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c<br/>index 59b92aab9bcf..ba39db5482b9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-kb9202.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-kb9202.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-kb9202.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-kb9202.c</a></div><div class='hunk'>@@ -50,24 +50,6 @@ static void __init kb9202_init_early(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize processor: 10 MHz crystal */</div><div class='ctx'> 	at91_initialize(10000000);</div><div class='del'>-</div><div class='del'>-	/* Set up the LEDs */</div><div class='del'>-	at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1 (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US0, 1, 0);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2 (Rx &amp; Tx only) - IRDA (optional) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US1, 2, 0);</div><div class='del'>-</div><div class='del'>-	/* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata kb9202_eth_data = {</div><div class='hunk'>@@ -115,7 +97,21 @@ static struct atmel_nand_data __initdata kb9202_nand_data = {</div><div class='ctx'> </div><div class='ctx'> static void __init kb9202_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* Set up the LEDs */</div><div class='add'>+	at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);</div><div class='add'>+</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1 (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US0, 1, 0);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2 (Rx &amp; Tx only) - IRDA (optional) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US1, 2, 0);</div><div class='add'>+</div><div class='add'>+	/* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* Ethernet */</div><div class='ctx'> 	at91_add_device_eth(&amp;kb9202_eth_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c<br/>index 57d5f6a4726a..d2f4cc161766 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-neocore926.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-neocore926.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-neocore926.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-neocore926.c</a></div><div class='hunk'>@@ -55,15 +55,6 @@ static void __init neocore926_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 20 MHz crystal */</div><div class='ctx'> 	at91_initialize(20000000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -341,6 +332,11 @@ static struct ac97c_platform_data neocore926_ac97_data = {</div><div class='ctx'> static void __init neocore926_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> </div><div class='ctx'> 	/* USB Host */</div><div class='head'>diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c<br/>index b4a12fc184c8..7fe638342421 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-pcontrol-g20.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-pcontrol-g20.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-pcontrol-g20.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-pcontrol-g20.c</a></div><div class='hunk'>@@ -40,17 +40,6 @@</div><div class='ctx'> static void __init pcontrol_g20_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	stamp9g20_init_early();</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback  A2 */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS</div><div class='del'>-						| ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485  X5 */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS</div><div class='del'>-						| ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* USART2 on ttyS3. (Rx, Tx)  9bit-Bus  Multidrop-mode  X4 */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US4, 3, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {</div><div class='hunk'>@@ -199,6 +188,16 @@ static struct spi_board_info pcontrol_g20_spi_devices[] = {</div><div class='ctx'> </div><div class='ctx'> static void __init pcontrol_g20_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback  A2 */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS</div><div class='add'>+						| ATMEL_UART_RTS);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485  X5 */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS</div><div class='add'>+						| ATMEL_UART_RTS);</div><div class='add'>+</div><div class='add'>+	/* USART2 on ttyS3. (Rx, Tx)  9bit-Bus  Multidrop-mode  X4 */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US4, 3, 0);</div><div class='ctx'> 	stamp9g20_board_init();</div><div class='ctx'> 	at91_add_device_usbh(&amp;usbh_data);</div><div class='ctx'> 	at91_add_device_eth(&amp;macb_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c<br/>index 59e35dd14863..b45c0a5d5ca7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-picotux200.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-picotux200.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-picotux200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-picotux200.c</a></div><div class='hunk'>@@ -48,17 +48,6 @@ static void __init picotux200_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			  | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='del'>-			  | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata picotux200_eth_data = {</div><div class='hunk'>@@ -106,6 +95,13 @@ static struct platform_device picotux200_flash = {</div><div class='ctx'> static void __init picotux200_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			  | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='add'>+			  | ATMEL_UART_RI);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* Ethernet */</div><div class='ctx'> 	at91_add_device_eth(&amp;picotux200_eth_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c<br/>index b6ed5ed7081a..0c61bf0d272c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-qil-a9260.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-qil-a9260.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-qil-a9260.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-qil-a9260.c</a></div><div class='hunk'>@@ -52,24 +52,6 @@ static void __init ek_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 12.000 MHz crystal */</div><div class='ctx'> 	at91_initialize(12000000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='del'>-			   | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS1 (ie, USART0) */</div><div class='del'>-	at91_set_serial_console(1);</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -235,6 +217,19 @@ static struct gpio_led ek_leds[] = {</div><div class='ctx'> static void __init ek_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='add'>+			   | ATMEL_UART_RI);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='add'>+</div><div class='add'>+	/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;ek_usbh_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c<br/>index 01332aa538b2..afd7a4713766 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-rm9200dk.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-rm9200dk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-rm9200dk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-rm9200dk.c</a></div><div class='hunk'>@@ -50,20 +50,6 @@ static void __init dk_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* Setup the LEDs */</div><div class='del'>-	at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='del'>-			   | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata dk_eth_data = {</div><div class='hunk'>@@ -190,7 +176,17 @@ static struct gpio_led dk_leds[] = {</div><div class='ctx'> </div><div class='ctx'> static void __init dk_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* Setup the LEDs */</div><div class='add'>+	at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);</div><div class='add'>+</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='add'>+			   | ATMEL_UART_RI);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* Ethernet */</div><div class='ctx'> 	at91_add_device_eth(&amp;dk_eth_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c<br/>index b2e4fe21f346..2b15b8adec4c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-rm9200ek.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-rm9200ek.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-rm9200ek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-rm9200ek.c</a></div><div class='hunk'>@@ -50,20 +50,6 @@ static void __init ek_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* Setup the LEDs */</div><div class='del'>-	at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='del'>-			   | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct macb_platform_data __initdata ek_eth_data = {</div><div class='hunk'>@@ -161,7 +147,17 @@ static struct gpio_led ek_leds[] = {</div><div class='ctx'> </div><div class='ctx'> static void __init ek_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* Setup the LEDs */</div><div class='add'>+	at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);</div><div class='add'>+</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='add'>+			   | ATMEL_UART_RI);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* Ethernet */</div><div class='ctx'> 	at91_add_device_eth(&amp;ek_eth_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c<br/>index af0750fafa29..24ab9be7510f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-rsi-ews.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-rsi-ews.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-rsi-ews.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-rsi-ews.c</a></div><div class='hunk'>@@ -35,26 +35,6 @@ static void __init rsi_ews_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* Setup the LEDs */</div><div class='del'>-	at91_init_leds(AT91_PIN_PB6, AT91_PIN_PB9);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	/* This one is for debugging */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	/* Dialin/-out modem interface */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='del'>-			   | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* USART3 on ttyS4. (Rx, Tx, RTS) */</div><div class='del'>-	/* RS485 communication */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -204,7 +184,23 @@ static struct platform_device rsiews_nor_flash = {</div><div class='ctx'>  */</div><div class='ctx'> static void __init rsi_ews_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* Setup the LEDs */</div><div class='add'>+	at91_init_leds(AT91_PIN_PB6, AT91_PIN_PB9);</div><div class='add'>+</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	/* This one is for debugging */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	/* Dialin/-out modem interface */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='add'>+			   | ATMEL_UART_RI);</div><div class='add'>+</div><div class='add'>+	/* USART3 on ttyS4. (Rx, Tx, RTS) */</div><div class='add'>+	/* RS485 communication */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	at91_set_gpio_output(AT91_PIN_PA21, 0);</div><div class='ctx'> 	/* Ethernet */</div><div class='head'>diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c<br/>index e8b116b6cba6..cdd21f2595d2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9-l9260.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-sam9-l9260.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9-l9260.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9-l9260.c</a></div><div class='hunk'>@@ -48,23 +48,6 @@ static void __init ek_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* Setup the LEDs */</div><div class='del'>-	at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='del'>-			   | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -184,7 +167,20 @@ static struct at91_mmc_data __initdata ek_mmc_data = {</div><div class='ctx'> </div><div class='ctx'> static void __init ek_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* Setup the LEDs */</div><div class='add'>+	at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6);</div><div class='add'>+</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='add'>+			   | ATMEL_UART_RI);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;ek_usbh_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c<br/>index d5aec55b0eb4..7b3c3913551a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9260ek.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-sam9260ek.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9260ek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9260ek.c</a></div><div class='hunk'>@@ -54,20 +54,6 @@ static void __init ek_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='del'>-			   | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -320,6 +306,16 @@ static void __init ek_add_device_buttons(void) {}</div><div class='ctx'> static void __init ek_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='add'>+			   | ATMEL_UART_RI);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;ek_usbh_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c<br/>index 065fed342424..2736453821b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9261ek.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-sam9261ek.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9261ek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9261ek.c</a></div><div class='hunk'>@@ -58,15 +58,6 @@ static void __init ek_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* Setup the LEDs */</div><div class='del'>-	at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -577,7 +568,12 @@ static struct gpio_led ek_leds[] = {</div><div class='ctx'> </div><div class='ctx'> static void __init ek_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* Setup the LEDs */</div><div class='add'>+	at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);</div><div class='add'>+</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;ek_usbh_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c<br/>index 2ffe50f3a9e9..983cb98d2465 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9263ek.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-sam9263ek.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9263ek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9263ek.c</a></div><div class='hunk'>@@ -57,15 +57,6 @@ static void __init ek_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 16.367 MHz crystal */</div><div class='ctx'> 	at91_initialize(16367660);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -412,6 +403,11 @@ static struct at91_can_data ek_can_data = {</div><div class='ctx'> static void __init ek_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;ek_usbh_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c<br/>index 8923ec9f5831..6860d3451100 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9g20ek.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-sam9g20ek.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9g20ek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9g20ek.c</a></div><div class='hunk'>@@ -32,6 +32,8 @@</div><div class='ctx'> #include &lt;linux/regulator/fixed.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/platform_data/at91_adc.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='hunk'>@@ -65,20 +67,6 @@ static void __init ek_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='del'>-			   | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -318,6 +306,16 @@ static void __init ek_add_device_buttons(void)</div><div class='ctx'> static void __init ek_add_device_buttons(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * ADCs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct at91_adc_data ek_adc_data = {</div><div class='add'>+	.channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3),</div><div class='add'>+	.use_external_triggers = true,</div><div class='add'>+	.vref = 3300,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)</div><div class='ctx'> static struct regulator_consumer_supply ek_audio_consumer_supplies[] = {</div><div class='ctx'> 	REGULATOR_SUPPLY("AVDD", "0-001b"),</div><div class='hunk'>@@ -372,6 +370,16 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = {</div><div class='ctx'> static void __init ek_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			   | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='add'>+			   | ATMEL_UART_RI);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;ek_usbh_data);</div><div class='hunk'>@@ -393,6 +401,8 @@ static void __init ek_board_init(void)</div><div class='ctx'> 	ek_add_device_gpio_leds();</div><div class='ctx'> 	/* Push Buttons */</div><div class='ctx'> 	ek_add_device_buttons();</div><div class='add'>+	/* ADCs */</div><div class='add'>+	at91_add_device_adc(&amp;ek_adc_data);</div><div class='ctx'> 	/* PCK0 provides MCLK to the WM8731 */</div><div class='ctx'> 	at91_set_B_periph(AT91_PIN_PC1, 0);</div><div class='ctx'> 	/* SSC (for WM8731) */</div><div class='head'>diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c<br/>index c88e908ddd82..63163dc7df46 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9m10g45ek.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-sam9m10g45ek.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9m10g45ek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9m10g45ek.c</a></div><div class='hunk'>@@ -27,6 +27,8 @@</div><div class='ctx'> #include &lt;linux/atmel-mci.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/platform_data/at91_adc.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;video/atmel_lcdc.h&gt;</div><div class='ctx'> #include &lt;media/soc_camera.h&gt;</div><div class='hunk'>@@ -53,16 +55,6 @@ static void __init ek_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 12.000 MHz crystal */</div><div class='ctx'> 	at91_initialize(12000000);</div><div class='del'>-</div><div class='del'>-	/* DGBU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 not connected on the -EK board */</div><div class='del'>-	/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -315,6 +307,14 @@ static struct at91_tsadcc_data ek_tsadcc_data = {</div><div class='ctx'> 	.ts_sample_hold_time	= 0x0a,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * ADCs</div><div class='add'>+ */</div><div class='add'>+static struct at91_adc_data ek_adc_data = {</div><div class='add'>+	.channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7),</div><div class='add'>+	.use_external_triggers = true,</div><div class='add'>+	.vref = 3300,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * GPIO Buttons</div><div class='hunk'>@@ -457,6 +457,12 @@ static struct platform_device *devices[] __initdata = {</div><div class='ctx'> static void __init ek_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DGBU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 not connected on the -EK board */</div><div class='add'>+	/* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB HS Host */</div><div class='ctx'> 	at91_add_device_usbh_ohci(&amp;ek_usbh_hs_data);</div><div class='hunk'>@@ -480,6 +486,8 @@ static void __init ek_board_init(void)</div><div class='ctx'> 	at91_add_device_lcdc(&amp;ek_lcdc_data);</div><div class='ctx'> 	/* Touch Screen */</div><div class='ctx'> 	at91_add_device_tsadcc(&amp;ek_tsadcc_data);</div><div class='add'>+	/* ADC */</div><div class='add'>+	at91_add_device_adc(&amp;ek_adc_data);</div><div class='ctx'> 	/* Push Buttons */</div><div class='ctx'> 	ek_add_device_buttons();</div><div class='ctx'> 	/* AC97 */</div><div class='head'>diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c<br/>index b109ce2ba864..be3239f13daa 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9rlek.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-sam9rlek.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-sam9rlek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-sam9rlek.c</a></div><div class='hunk'>@@ -42,15 +42,6 @@ static void __init ek_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 12.000 MHz crystal */</div><div class='ctx'> 	at91_initialize(12000000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -296,6 +287,11 @@ static void __init ek_add_device_buttons(void) {}</div><div class='ctx'> static void __init ek_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB HS */</div><div class='ctx'> 	at91_add_device_usba(&amp;ek_usba_udc_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c<br/>index ebc9d01ce742..9d446f1bb45f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-snapper9260.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-snapper9260.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-snapper9260.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-snapper9260.c</a></div><div class='hunk'>@@ -43,16 +43,6 @@</div><div class='ctx'> static void __init snapper9260_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* Debug on ttyS0 */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-	at91_set_serial_console(0);</div><div class='del'>-</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US0, 1,</div><div class='del'>-			   ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US1, 2,</div><div class='del'>-			   ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US2, 3, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct at91_usbh_data __initdata snapper9260_usbh_data = {</div><div class='hunk'>@@ -168,6 +158,14 @@ static void __init snapper9260_board_init(void)</div><div class='ctx'> 	snapper9260_i2c_isl1208.irq = gpio_to_irq(AT91_PIN_PA31);</div><div class='ctx'> 	i2c_register_board_info(0, &amp;snapper9260_i2c_isl1208, 1);</div><div class='ctx'> </div><div class='add'>+	/* Debug on ttyS0 */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US0, 1,</div><div class='add'>+			   ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US1, 2,</div><div class='add'>+			   ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US2, 3, 0);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	at91_add_device_usbh(&amp;snapper9260_usbh_data);</div><div class='ctx'> 	at91_add_device_udc(&amp;snapper9260_udc_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c<br/>index 7640049410a0..ee86f9d7ee72 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-stamp9g20.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-stamp9g20.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-stamp9g20.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-stamp9g20.c</a></div><div class='hunk'>@@ -36,44 +36,6 @@ void __init stamp9g20_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* DGBU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init stamp9g20evb_init_early(void)</div><div class='del'>-{</div><div class='del'>-	stamp9g20_init_early();</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-						| ATMEL_UART_DTR | ATMEL_UART_DSR</div><div class='del'>-						| ATMEL_UART_DCD | ATMEL_UART_RI);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init portuxg20_init_early(void)</div><div class='del'>-{</div><div class='del'>-	stamp9g20_init_early();</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-						| ATMEL_UART_DTR | ATMEL_UART_DSR</div><div class='del'>-						| ATMEL_UART_DCD | ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* USART4 on ttyS5. (Rx, Tx only) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US4, 5, 0);</div><div class='del'>-</div><div class='del'>-	/* USART5 on ttyS6. (Rx, Tx only) */</div><div class='del'>-	at91_register_uart(AT91SAM9260_ID_US5, 6, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -254,6 +216,8 @@ void add_w1(void)</div><div class='ctx'> void __init stamp9g20_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DGBU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* NAND */</div><div class='ctx'> 	add_device_nand();</div><div class='hunk'>@@ -269,6 +233,22 @@ void __init stamp9g20_board_init(void)</div><div class='ctx'> </div><div class='ctx'> static void __init portuxg20_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+						| ATMEL_UART_DTR | ATMEL_UART_DSR</div><div class='add'>+						| ATMEL_UART_DCD | ATMEL_UART_RI);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='add'>+</div><div class='add'>+	/* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);</div><div class='add'>+</div><div class='add'>+	/* USART4 on ttyS5. (Rx, Tx only) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US4, 5, 0);</div><div class='add'>+</div><div class='add'>+	/* USART5 on ttyS6. (Rx, Tx only) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US5, 6, 0);</div><div class='ctx'> 	stamp9g20_board_init();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;usbh_data);</div><div class='hunk'>@@ -286,6 +266,10 @@ static void __init portuxg20_board_init(void)</div><div class='ctx'> </div><div class='ctx'> static void __init stamp9g20evb_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+						| ATMEL_UART_DTR | ATMEL_UART_DSR</div><div class='add'>+						| ATMEL_UART_DCD | ATMEL_UART_RI);</div><div class='ctx'> 	stamp9g20_board_init();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;usbh_data);</div><div class='hunk'>@@ -303,7 +287,7 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20")</div><div class='ctx'> 	/* Maintainer: taskit GmbH */</div><div class='ctx'> 	.timer		= &amp;at91sam926x_timer,</div><div class='ctx'> 	.map_io		= at91_map_io,</div><div class='del'>-	.init_early	= portuxg20_init_early,</div><div class='add'>+	.init_early	= stamp9g20_init_early,</div><div class='ctx'> 	.init_irq	= at91_init_irq_default,</div><div class='ctx'> 	.init_machine	= portuxg20_board_init,</div><div class='ctx'> MACHINE_END</div><div class='hunk'>@@ -312,7 +296,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20")</div><div class='ctx'> 	/* Maintainer: taskit GmbH */</div><div class='ctx'> 	.timer		= &amp;at91sam926x_timer,</div><div class='ctx'> 	.map_io		= at91_map_io,</div><div class='del'>-	.init_early	= stamp9g20evb_init_early,</div><div class='add'>+	.init_early	= stamp9g20_init_early,</div><div class='ctx'> 	.init_irq	= at91_init_irq_default,</div><div class='ctx'> 	.init_machine	= stamp9g20evb_board_init,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c<br/>index b7483a3d0980..95393fcaf199 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-usb-a926x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-usb-a926x.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-usb-a926x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-usb-a926x.c</a></div><div class='hunk'>@@ -53,12 +53,6 @@ static void __init ek_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Initialize processor: 12.00 MHz crystal */</div><div class='ctx'> 	at91_initialize(12000000);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -178,6 +172,10 @@ static struct mtd_partition __initdata ek_nand_partition[] = {</div><div class='ctx'> 		.offset	= MTDPART_OFS_NXTBLK,</div><div class='ctx'> 		.size	= SZ_128K,</div><div class='ctx'> 	}, {</div><div class='add'>+		.name	= "oftree",</div><div class='add'>+		.offset	= MTDPART_OFS_NXTBLK,</div><div class='add'>+		.size	= SZ_128K,</div><div class='add'>+	}, {</div><div class='ctx'> 		.name	= "kernel",</div><div class='ctx'> 		.offset	= MTDPART_OFS_NXTBLK,</div><div class='ctx'> 		.size	= 4 * SZ_1M,</div><div class='hunk'>@@ -325,6 +323,8 @@ static void __init ek_add_device_leds(void)</div><div class='ctx'> static void __init ek_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* USB Host */</div><div class='ctx'> 	at91_add_device_usbh(&amp;ek_usbh_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c<br/>index 38dd279d30b2..d56665ea4b55 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/board-yl-9200.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/board-yl-9200.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/board-yl-9200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/board-yl-9200.c</a></div><div class='hunk'>@@ -58,26 +58,6 @@ static void __init yl9200_init_early(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize processor: 18.432 MHz crystal */</div><div class='ctx'> 	at91_initialize(18432000);</div><div class='del'>-</div><div class='del'>-	/* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */</div><div class='del'>-	at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17);</div><div class='del'>-</div><div class='del'>-	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='del'>-	at91_register_uart(0, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='del'>-			| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='del'>-			| ATMEL_UART_RI);</div><div class='del'>-</div><div class='del'>-	/* USART0 on ttyS2. (Rx &amp; Tx only to JP3) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US0, 2, 0);</div><div class='del'>-</div><div class='del'>-	/* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */</div><div class='del'>-	at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS);</div><div class='del'>-</div><div class='del'>-	/* set serial console to ttyS0 (ie, DBGU) */</div><div class='del'>-	at91_set_serial_console(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -560,7 +540,23 @@ void __init yl9200_add_device_video(void) {}</div><div class='ctx'> </div><div class='ctx'> static void __init yl9200_board_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */</div><div class='add'>+	at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17);</div><div class='add'>+</div><div class='ctx'> 	/* Serial */</div><div class='add'>+	/* DBGU on ttyS0. (Rx &amp; Tx only) */</div><div class='add'>+	at91_register_uart(0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS</div><div class='add'>+			| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD</div><div class='add'>+			| ATMEL_UART_RI);</div><div class='add'>+</div><div class='add'>+	/* USART0 on ttyS2. (Rx &amp; Tx only to JP3) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US0, 2, 0);</div><div class='add'>+</div><div class='add'>+	/* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */</div><div class='add'>+	at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS);</div><div class='ctx'> 	at91_add_device_serial();</div><div class='ctx'> 	/* Ethernet */</div><div class='ctx'> 	at91_add_device_eth(&amp;yl9200_eth_data);</div><div class='head'>diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c<br/>index 6b692824c988..de2ec6b8fea7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/clock.c</a></div><div class='hunk'>@@ -58,13 +58,15 @@ EXPORT_SYMBOL_GPL(at91_pmc_base);</div><div class='ctx'> </div><div class='ctx'> #define cpu_has_800M_plla()	(  cpu_is_at91sam9g20() \</div><div class='ctx'> 				|| cpu_is_at91sam9g45() \</div><div class='del'>-				|| cpu_is_at91sam9x5())</div><div class='add'>+				|| cpu_is_at91sam9x5() \</div><div class='add'>+				|| cpu_is_at91sam9n12())</div><div class='ctx'> </div><div class='ctx'> #define cpu_has_300M_plla()	(cpu_is_at91sam9g10())</div><div class='ctx'> </div><div class='ctx'> #define cpu_has_pllb()		(!(cpu_is_at91sam9rl() \</div><div class='ctx'> 				|| cpu_is_at91sam9g45() \</div><div class='del'>-				|| cpu_is_at91sam9x5()))</div><div class='add'>+				|| cpu_is_at91sam9x5() \</div><div class='add'>+				|| cpu_is_at91sam9n12()))</div><div class='ctx'> </div><div class='ctx'> #define cpu_has_upll()		(cpu_is_at91sam9g45() \</div><div class='ctx'> 				|| cpu_is_at91sam9x5())</div><div class='hunk'>@@ -78,12 +80,15 @@ EXPORT_SYMBOL_GPL(at91_pmc_base);</div><div class='ctx'> 				|| cpu_is_at91sam9x5()))</div><div class='ctx'> </div><div class='ctx'> #define cpu_has_plladiv2()	(cpu_is_at91sam9g45() \</div><div class='del'>-				|| cpu_is_at91sam9x5())</div><div class='add'>+				|| cpu_is_at91sam9x5() \</div><div class='add'>+				|| cpu_is_at91sam9n12())</div><div class='ctx'> </div><div class='ctx'> #define cpu_has_mdiv3()		(cpu_is_at91sam9g45() \</div><div class='del'>-				|| cpu_is_at91sam9x5())</div><div class='add'>+				|| cpu_is_at91sam9x5() \</div><div class='add'>+				|| cpu_is_at91sam9n12())</div><div class='ctx'> </div><div class='del'>-#define cpu_has_alt_prescaler()	(cpu_is_at91sam9x5())</div><div class='add'>+#define cpu_has_alt_prescaler()	(cpu_is_at91sam9x5() \</div><div class='add'>+				|| cpu_is_at91sam9n12())</div><div class='ctx'> </div><div class='ctx'> static LIST_HEAD(clocks);</div><div class='ctx'> static DEFINE_SPINLOCK(clk_lock);</div><div class='head'>diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c<br/>index ece1f9aefb47..0c6381516a5a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/cpuidle.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/cpuidle.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/cpuidle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/cpuidle.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;asm/proc-fns.h&gt;</div><div class='ctx'> #include &lt;asm/cpuidle.h&gt;</div><div class='add'>+#include &lt;mach/cpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "pm.h"</div><div class='ctx'> </div><div class='hunk'>@@ -33,7 +34,12 @@ static int at91_enter_idle(struct cpuidle_device *dev,</div><div class='ctx'> 			struct cpuidle_driver *drv,</div><div class='ctx'> 			       int index)</div><div class='ctx'> {</div><div class='del'>-	at91_standby();</div><div class='add'>+	if (cpu_is_at91rm9200())</div><div class='add'>+		at91rm9200_standby();</div><div class='add'>+	else if (cpu_is_at91sam9g45())</div><div class='add'>+		at91sam9g45_standby();</div><div class='add'>+	else</div><div class='add'>+		at91sam9_standby();</div><div class='ctx'> </div><div class='ctx'> 	return index;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h<br/>index dd9b346c451d..0a60bf837037 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/generic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/generic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/generic.h</a></div><div class='hunk'>@@ -40,17 +40,6 @@ extern struct sys_timer at91sam926x_timer;</div><div class='ctx'> extern struct sys_timer at91x40_timer;</div><div class='ctx'> </div><div class='ctx'>  /* Clocks */</div><div class='del'>-/*</div><div class='del'>- * function to specify the clock of the default console. As we do not</div><div class='del'>- * use the device/driver bus, the dev_name is not intialize. So we need</div><div class='del'>- * to link the clock to a specific con_id only "usart"</div><div class='del'>- */</div><div class='del'>-extern void __init at91rm9200_set_console_clock(int id);</div><div class='del'>-extern void __init at91sam9260_set_console_clock(int id);</div><div class='del'>-extern void __init at91sam9261_set_console_clock(int id);</div><div class='del'>-extern void __init at91sam9263_set_console_clock(int id);</div><div class='del'>-extern void __init at91sam9rl_set_console_clock(int id);</div><div class='del'>-extern void __init at91sam9g45_set_console_clock(int id);</div><div class='ctx'> #ifdef CONFIG_AT91_PMC_UNIT</div><div class='ctx'> extern int __init at91_clock_init(unsigned long main_clock);</div><div class='ctx'> extern int __init at91_dt_clock_init(void);</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h<br/>index 603e6aac2a4f..e67317c67761 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91rm9200.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/include/mach/at91rm9200.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91rm9200.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91rm9200.h</a></div><div class='hunk'>@@ -88,11 +88,6 @@</div><div class='ctx'> #define AT91RM9200_BASE_RTC	0xfffffe00	/* Real-Time Clock */</div><div class='ctx'> #define AT91RM9200_BASE_MC	0xffffff00	/* Memory Controllers */</div><div class='ctx'> </div><div class='del'>-#define AT91_USART0	AT91RM9200_BASE_US0</div><div class='del'>-#define AT91_USART1	AT91RM9200_BASE_US1</div><div class='del'>-#define AT91_USART2	AT91RM9200_BASE_US2</div><div class='del'>-#define AT91_USART3	AT91RM9200_BASE_US3</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Internal Memory.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h<br/>index 08ae9afd00fe..416c7b6c56d3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9260.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/include/mach/at91sam9260.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9260.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9260.h</a></div><div class='hunk'>@@ -95,13 +95,6 @@</div><div class='ctx'> #define AT91SAM9260_BASE_WDT	0xfffffd40</div><div class='ctx'> #define AT91SAM9260_BASE_GPBR	0xfffffd50</div><div class='ctx'> </div><div class='del'>-#define AT91_USART0	AT91SAM9260_BASE_US0</div><div class='del'>-#define AT91_USART1	AT91SAM9260_BASE_US1</div><div class='del'>-#define AT91_USART2	AT91SAM9260_BASE_US2</div><div class='del'>-#define AT91_USART3	AT91SAM9260_BASE_US3</div><div class='del'>-#define AT91_USART4	AT91SAM9260_BASE_US4</div><div class='del'>-#define AT91_USART5	AT91SAM9260_BASE_US5</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Internal Memory.</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h<br/>index 44fbdc12ee62..a041406d06ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9261.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/include/mach/at91sam9261.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9261.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9261.h</a></div><div class='hunk'>@@ -79,10 +79,6 @@</div><div class='ctx'> #define AT91SAM9261_BASE_WDT	0xfffffd40</div><div class='ctx'> #define AT91SAM9261_BASE_GPBR	0xfffffd50</div><div class='ctx'> </div><div class='del'>-#define AT91_USART0	AT91SAM9261_BASE_US0</div><div class='del'>-#define AT91_USART1	AT91SAM9261_BASE_US1</div><div class='del'>-#define AT91_USART2	AT91SAM9261_BASE_US2</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Internal Memory.</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h<br/>index d96cbb2e03c4..d201029d60b3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9263.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/include/mach/at91sam9263.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9263.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9263.h</a></div><div class='hunk'>@@ -95,10 +95,6 @@</div><div class='ctx'> #define AT91SAM9263_BASE_RTT1	0xfffffd50</div><div class='ctx'> #define AT91SAM9263_BASE_GPBR	0xfffffd60</div><div class='ctx'> </div><div class='del'>-#define AT91_USART0	AT91SAM9263_BASE_US0</div><div class='del'>-#define AT91_USART1	AT91SAM9263_BASE_US1</div><div class='del'>-#define AT91_USART2	AT91SAM9263_BASE_US2</div><div class='del'>-</div><div class='ctx'> #define AT91_SMC	AT91_SMC0</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h<br/>index d052abcff852..3a4da24d5911 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9g45.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/include/mach/at91sam9g45.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9g45.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9g45.h</a></div><div class='hunk'>@@ -106,11 +106,6 @@</div><div class='ctx'> #define AT91SAM9G45_BASE_RTC	0xfffffdb0</div><div class='ctx'> #define AT91SAM9G45_BASE_GPBR	0xfffffd60</div><div class='ctx'> </div><div class='del'>-#define AT91_USART0	AT91SAM9G45_BASE_US0</div><div class='del'>-#define AT91_USART1	AT91SAM9G45_BASE_US1</div><div class='del'>-#define AT91_USART2	AT91SAM9G45_BASE_US2</div><div class='del'>-#define AT91_USART3	AT91SAM9G45_BASE_US3</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Internal Memory.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at91sam9n12.h b/arch/arm/mach-at91/include/mach/at91sam9n12.h<br/>new file mode 100644<br/>index 000000000000..d374b87c0459<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9n12.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9n12.h</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+/*</div><div class='add'>+ * SoC specific header file for the AT91SAM9N12</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Atmel Corporation</div><div class='add'>+ *</div><div class='add'>+ * Common definitions, based on AT91SAM9N12 SoC datasheet</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 or later</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _AT91SAM9N12_H_</div><div class='add'>+#define _AT91SAM9N12_H_</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Peripheral identifiers/interrupts.</div><div class='add'>+ */</div><div class='add'>+#define AT91SAM9N12_ID_PIOAB	2	/* Parallel I/O Controller A and B */</div><div class='add'>+#define AT91SAM9N12_ID_PIOCD	3	/* Parallel I/O Controller C and D */</div><div class='add'>+#define AT91SAM9N12_ID_FUSE	4	/* FUSE Controller */</div><div class='add'>+#define AT91SAM9N12_ID_USART0	5	/* USART 0 */</div><div class='add'>+#define AT91SAM9N12_ID_USART1	6	/* USART 1 */</div><div class='add'>+#define AT91SAM9N12_ID_USART2	7	/* USART 2 */</div><div class='add'>+#define AT91SAM9N12_ID_USART3	8	/* USART 3 */</div><div class='add'>+#define AT91SAM9N12_ID_TWI0	9	/* Two-Wire Interface 0 */</div><div class='add'>+#define AT91SAM9N12_ID_TWI1	10	/* Two-Wire Interface 1 */</div><div class='add'>+#define AT91SAM9N12_ID_MCI	12	/* High Speed Multimedia Card Interface */</div><div class='add'>+#define AT91SAM9N12_ID_SPI0	13	/* Serial Peripheral Interface 0 */</div><div class='add'>+#define AT91SAM9N12_ID_SPI1	14	/* Serial Peripheral Interface 1 */</div><div class='add'>+#define AT91SAM9N12_ID_UART0	15	/* UART 0 */</div><div class='add'>+#define AT91SAM9N12_ID_UART1	16	/* UART 1 */</div><div class='add'>+#define AT91SAM9N12_ID_TCB	17	/* Timer Counter 0, 1, 2, 3, 4 and 5 */</div><div class='add'>+#define AT91SAM9N12_ID_PWM	18	/* Pulse Width Modulation Controller */</div><div class='add'>+#define AT91SAM9N12_ID_ADC	19	/* ADC Controller */</div><div class='add'>+#define AT91SAM9N12_ID_DMA	20	/* DMA Controller */</div><div class='add'>+#define AT91SAM9N12_ID_UHP	22	/* USB Host High Speed */</div><div class='add'>+#define AT91SAM9N12_ID_UDP	23	/* USB Device High Speed */</div><div class='add'>+#define AT91SAM9N12_ID_LCDC	25	/* LCD Controller */</div><div class='add'>+#define AT91SAM9N12_ID_ISI	25	/* Image Sensor Interface */</div><div class='add'>+#define AT91SAM9N12_ID_SSC	28	/* Synchronous Serial Controller */</div><div class='add'>+#define AT91SAM9N12_ID_TRNG	30	/* TRNG */</div><div class='add'>+#define AT91SAM9N12_ID_IRQ0	31	/* Advanced Interrupt Controller */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * User Peripheral physical base addresses.</div><div class='add'>+ */</div><div class='add'>+#define AT91SAM9N12_BASE_USART0	0xf801c000</div><div class='add'>+#define AT91SAM9N12_BASE_USART1	0xf8020000</div><div class='add'>+#define AT91SAM9N12_BASE_USART2	0xf8024000</div><div class='add'>+#define AT91SAM9N12_BASE_USART3	0xf8028000</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Internal Memory.</div><div class='add'>+ */</div><div class='add'>+#define AT91SAM9N12_SRAM_BASE	0x00300000	/* Internal SRAM base address */</div><div class='add'>+#define AT91SAM9N12_SRAM_SIZE	SZ_32K		/* Internal SRAM size (32Kb) */</div><div class='add'>+</div><div class='add'>+#define AT91SAM9N12_ROM_BASE	0x00100000	/* Internal ROM base address */</div><div class='add'>+#define AT91SAM9N12_ROM_SIZE	SZ_128K		/* Internal ROM size (128Kb) */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h<br/>new file mode 100644<br/>index 000000000000..40060cd62fa9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+/*</div><div class='add'>+ * Matrix-centric header file for the AT91SAM9N12</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Atmel Corporation.</div><div class='add'>+ *</div><div class='add'>+ * Only EBI related registers.</div><div class='add'>+ * Write Protect register definitions may be useful.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under GPLv2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _AT91SAM9N12_MATRIX_H_</div><div class='add'>+#define _AT91SAM9N12_MATRIX_H_</div><div class='add'>+</div><div class='add'>+#define AT91_MATRIX_EBICSA	(AT91_MATRIX + 0x118)	/* EBI Chip Select Assignment Register */</div><div class='add'>+#define		AT91_MATRIX_EBI_CS1A		(1 &lt;&lt; 1)	/* Chip Select 1 Assignment */</div><div class='add'>+#define			AT91_MATRIX_EBI_CS1A_SMC		(0 &lt;&lt; 1)</div><div class='add'>+#define			AT91_MATRIX_EBI_CS1A_SDRAMC		(1 &lt;&lt; 1)</div><div class='add'>+#define		AT91_MATRIX_EBI_CS3A		(1 &lt;&lt; 3)	/* Chip Select 3 Assignment */</div><div class='add'>+#define			AT91_MATRIX_EBI_CS3A_SMC		(0 &lt;&lt; 3)</div><div class='add'>+#define			AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH	(1 &lt;&lt; 3)</div><div class='add'>+#define		AT91_MATRIX_EBI_DBPUC		(1 &lt;&lt; 8)	/* Data Bus Pull-up Configuration */</div><div class='add'>+#define			AT91_MATRIX_EBI_DBPU_ON			(0 &lt;&lt; 8)</div><div class='add'>+#define			AT91_MATRIX_EBI_DBPU_OFF		(1 &lt;&lt; 8)</div><div class='add'>+#define		AT91_MATRIX_EBI_VDDIOMSEL	(1 &lt;&lt; 16)	/* Memory voltage selection */</div><div class='add'>+#define			AT91_MATRIX_EBI_VDDIOMSEL_1_8V		(0 &lt;&lt; 16)</div><div class='add'>+#define			AT91_MATRIX_EBI_VDDIOMSEL_3_3V		(1 &lt;&lt; 16)</div><div class='add'>+#define		AT91_MATRIX_EBI_EBI_IOSR	(1 &lt;&lt; 17)	/* EBI I/O slew rate selection */</div><div class='add'>+#define			AT91_MATRIX_EBI_EBI_IOSR_REDUCED	(0 &lt;&lt; 17)</div><div class='add'>+#define			AT91_MATRIX_EBI_EBI_IOSR_NORMAL		(1 &lt;&lt; 17)</div><div class='add'>+#define		AT91_MATRIX_EBI_DDR_IOSR	(1 &lt;&lt; 18)	/* DDR2 dedicated port I/O slew rate selection */</div><div class='add'>+#define			AT91_MATRIX_EBI_DDR_IOSR_REDUCED	(0 &lt;&lt; 18)</div><div class='add'>+#define			AT91_MATRIX_EBI_DDR_IOSR_NORMAL		(1 &lt;&lt; 18)</div><div class='add'>+#define		AT91_MATRIX_NFD0_SELECT		(1 &lt;&lt; 24)	/* NAND Flash Data Bus Selection */</div><div class='add'>+#define			AT91_MATRIX_NFD0_ON_D0			(0 &lt;&lt; 24)</div><div class='add'>+#define			AT91_MATRIX_NFD0_ON_D16			(1 &lt;&lt; 24)</div><div class='add'>+#define		AT91_MATRIX_DDR_MP_EN		(1 &lt;&lt; 25)	/* DDR Multi-port Enable */</div><div class='add'>+#define			AT91_MATRIX_MP_OFF			(0 &lt;&lt; 25)</div><div class='add'>+#define			AT91_MATRIX_MP_ON			(1 &lt;&lt; 25)</div><div class='add'>+</div><div class='add'>+#define AT91_MATRIX_WPMR	(AT91_MATRIX + 0x1E4)	/* Write Protect Mode Register */</div><div class='add'>+#define		AT91_MATRIX_WPMR_WPEN		(1 &lt;&lt; 0)	/* Write Protect ENable */</div><div class='add'>+#define			AT91_MATRIX_WPMR_WP_WPDIS		(0 &lt;&lt; 0)</div><div class='add'>+#define			AT91_MATRIX_WPMR_WP_WPEN		(1 &lt;&lt; 0)</div><div class='add'>+#define		AT91_MATRIX_WPMR_WPKEY		(0xFFFFFF &lt;&lt; 8)	/* Write Protect KEY */</div><div class='add'>+</div><div class='add'>+#define AT91_MATRIX_WPSR	(AT91_MATRIX + 0x1E8)	/* Write Protect Status Register */</div><div class='add'>+#define		AT91_MATRIX_WPSR_WPVS		(1 &lt;&lt; 0)	/* Write Protect Violation Status */</div><div class='add'>+#define			AT91_MATRIX_WPSR_NO_WPV		(0 &lt;&lt; 0)</div><div class='add'>+#define			AT91_MATRIX_WPSR_WPV		(1 &lt;&lt; 0)</div><div class='add'>+#define		AT91_MATRIX_WPSR_WPVSRC		(0xFFFF &lt;&lt; 8)	/* Write Protect Violation Source */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h<br/>index e0073eb10144..a15db56d33fa 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9rl.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/include/mach/at91sam9rl.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9rl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9rl.h</a></div><div class='hunk'>@@ -89,11 +89,6 @@</div><div class='ctx'> #define AT91SAM9RL_BASE_GPBR	0xfffffd60</div><div class='ctx'> #define AT91SAM9RL_BASE_RTC	0xfffffe00</div><div class='ctx'> </div><div class='del'>-#define AT91_USART0	AT91SAM9RL_BASE_US0</div><div class='del'>-#define AT91_USART1	AT91SAM9RL_BASE_US1</div><div class='del'>-#define AT91_USART2	AT91SAM9RL_BASE_US2</div><div class='del'>-#define AT91_USART3	AT91SAM9RL_BASE_US3</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Internal Memory.</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h<br/>index 88e43d534cdf..c75ee19b58d3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9x5.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/include/mach/at91sam9x5.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at91sam9x5.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at91sam9x5.h</a></div><div class='hunk'>@@ -55,14 +55,6 @@</div><div class='ctx'> #define AT91SAM9X5_BASE_USART2	0xf8024000</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Base addresses for early serial code (uncompress.h)</div><div class='del'>- */</div><div class='del'>-#define AT91_DBGU	AT91_BASE_DBGU0</div><div class='del'>-#define AT91_USART0	AT91SAM9X5_BASE_USART0</div><div class='del'>-#define AT91_USART1	AT91SAM9X5_BASE_USART1</div><div class='del'>-#define AT91_USART2	AT91SAM9X5_BASE_USART2</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Internal Memory.</div><div class='ctx'>  */</div><div class='ctx'> #define AT91SAM9X5_SRAM_BASE	0x00300000	/* Internal SRAM base address */</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/at_hdmac.h b/arch/arm/mach-at91/include/mach/at_hdmac.h<br/>index fff48d1a0f4e..cab0997be3de 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at_hdmac.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/include/mach/at_hdmac.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/at_hdmac.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/at_hdmac.h</a></div><div class='hunk'>@@ -26,18 +26,11 @@ struct at_dma_platform_data {</div><div class='ctx'> /**</div><div class='ctx'>  * struct at_dma_slave - Controller-specific information about a slave</div><div class='ctx'>  * @dma_dev: required DMA master device</div><div class='del'>- * @tx_reg: physical address of data register used for</div><div class='del'>- *	memory-to-peripheral transfers</div><div class='del'>- * @rx_reg: physical address of data register used for</div><div class='del'>- *	peripheral-to-memory transfers</div><div class='del'>- * @reg_width: peripheral register width</div><div class='ctx'>  * @cfg: Platform-specific initializer for the CFG register</div><div class='del'>- * @ctrla: Platform-specific initializer for the CTRLA register</div><div class='ctx'>  */</div><div class='ctx'> struct at_dma_slave {</div><div class='ctx'> 	struct device		*dma_dev;</div><div class='ctx'> 	u32			cfg;</div><div class='del'>-	u32			ctrla;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -64,24 +57,5 @@ struct at_dma_slave {</div><div class='ctx'> #define		ATC_FIFOCFG_HALFFIFO		(0x1 &lt;&lt; 28)</div><div class='ctx'> #define		ATC_FIFOCFG_ENOUGHSPACE		(0x2 &lt;&lt; 28)</div><div class='ctx'> </div><div class='del'>-/* Platform-configurable bits in CTRLA */</div><div class='del'>-#define	ATC_SCSIZE_MASK		(0x7 &lt;&lt; 16)	/* Source Chunk Transfer Size */</div><div class='del'>-#define		ATC_SCSIZE_1		(0x0 &lt;&lt; 16)</div><div class='del'>-#define		ATC_SCSIZE_4		(0x1 &lt;&lt; 16)</div><div class='del'>-#define		ATC_SCSIZE_8		(0x2 &lt;&lt; 16)</div><div class='del'>-#define		ATC_SCSIZE_16		(0x3 &lt;&lt; 16)</div><div class='del'>-#define		ATC_SCSIZE_32		(0x4 &lt;&lt; 16)</div><div class='del'>-#define		ATC_SCSIZE_64		(0x5 &lt;&lt; 16)</div><div class='del'>-#define		ATC_SCSIZE_128		(0x6 &lt;&lt; 16)</div><div class='del'>-#define		ATC_SCSIZE_256		(0x7 &lt;&lt; 16)</div><div class='del'>-#define	ATC_DCSIZE_MASK		(0x7 &lt;&lt; 20)	/* Destination Chunk Transfer Size */</div><div class='del'>-#define		ATC_DCSIZE_1		(0x0 &lt;&lt; 20)</div><div class='del'>-#define		ATC_DCSIZE_4		(0x1 &lt;&lt; 20)</div><div class='del'>-#define		ATC_DCSIZE_8		(0x2 &lt;&lt; 20)</div><div class='del'>-#define		ATC_DCSIZE_16		(0x3 &lt;&lt; 20)</div><div class='del'>-#define		ATC_DCSIZE_32		(0x4 &lt;&lt; 20)</div><div class='del'>-#define		ATC_DCSIZE_64		(0x5 &lt;&lt; 20)</div><div class='del'>-#define		ATC_DCSIZE_128		(0x6 &lt;&lt; 20)</div><div class='del'>-#define		ATC_DCSIZE_256		(0x7 &lt;&lt; 20)</div><div class='ctx'> </div><div class='ctx'> #endif /* AT_HDMAC_H */</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h<br/>index 49a821192c65..369afc2ffc5b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/board.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/include/mach/board.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/board.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/board.h</a></div><div class='hunk'>@@ -121,7 +121,6 @@ extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_de</div><div class='ctx'> #define ATMEL_UART_RI	0x20</div><div class='ctx'> </div><div class='ctx'> extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins);</div><div class='del'>-extern void __init at91_set_serial_console(unsigned portnr);</div><div class='ctx'> </div><div class='ctx'> extern struct platform_device *atmel_default_console_device;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h<br/>index 0118c3338552..b6504c19d55c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/cpu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/include/mach/cpu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/cpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/cpu.h</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #define ARCH_ID_AT91SAM9G45MRL	0x819b05a2	/* aka 9G45-ES2 &amp; non ES lots */</div><div class='ctx'> #define ARCH_ID_AT91SAM9G45ES	0x819b05a1	/* 9G45-ES (Engineering Sample) */</div><div class='ctx'> #define ARCH_ID_AT91SAM9X5	0x819a05a0</div><div class='add'>+#define ARCH_ID_AT91SAM9N12	0x819a07a0</div><div class='ctx'> </div><div class='ctx'> #define ARCH_ID_AT91SAM9XE128	0x329973a0</div><div class='ctx'> #define ARCH_ID_AT91SAM9XE256	0x329a93a0</div><div class='hunk'>@@ -54,6 +55,7 @@</div><div class='ctx'> #define ARCH_REVISON_9200_BGA	(0 &lt;&lt; 0)</div><div class='ctx'> #define ARCH_REVISON_9200_PQFP	(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='ctx'> enum at91_soc_type {</div><div class='ctx'> 	/* 920T */</div><div class='ctx'> 	AT91_SOC_RM9200,</div><div class='hunk'>@@ -70,6 +72,9 @@ enum at91_soc_type {</div><div class='ctx'> 	/* SAM9X5 */</div><div class='ctx'> 	AT91_SOC_SAM9X5,</div><div class='ctx'> </div><div class='add'>+	/* SAM9N12 */</div><div class='add'>+	AT91_SOC_SAM9N12,</div><div class='add'>+</div><div class='ctx'> 	/* Unknown type */</div><div class='ctx'> 	AT91_SOC_NONE</div><div class='ctx'> };</div><div class='hunk'>@@ -106,7 +111,7 @@ static inline int at91_soc_is_detected(void)</div><div class='ctx'> 	return at91_soc_initdata.type != AT91_SOC_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_AT91RM9200</div><div class='add'>+#ifdef CONFIG_SOC_AT91RM9200</div><div class='ctx'> #define cpu_is_at91rm9200()	(at91_soc_initdata.type == AT91_SOC_RM9200)</div><div class='ctx'> #define cpu_is_at91rm9200_bga()	(at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA)</div><div class='ctx'> #define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP)</div><div class='hunk'>@@ -116,45 +121,37 @@ static inline int at91_soc_is_detected(void)</div><div class='ctx'> #define cpu_is_at91rm9200_pqfp() (0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_AT91SAM9260</div><div class='add'>+#ifdef CONFIG_SOC_AT91SAM9260</div><div class='ctx'> #define cpu_is_at91sam9xe()	(at91_soc_initdata.subtype == AT91_SOC_SAM9XE)</div><div class='ctx'> #define cpu_is_at91sam9260()	(at91_soc_initdata.type == AT91_SOC_SAM9260)</div><div class='add'>+#define cpu_is_at91sam9g20()	(at91_soc_initdata.type == AT91_SOC_SAM9G20)</div><div class='ctx'> #else</div><div class='ctx'> #define cpu_is_at91sam9xe()	(0)</div><div class='ctx'> #define cpu_is_at91sam9260()	(0)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARCH_AT91SAM9G20</div><div class='del'>-#define cpu_is_at91sam9g20()	(at91_soc_initdata.type == AT91_SOC_SAM9G20)</div><div class='del'>-#else</div><div class='ctx'> #define cpu_is_at91sam9g20()	(0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_AT91SAM9261</div><div class='add'>+#ifdef CONFIG_SOC_AT91SAM9261</div><div class='ctx'> #define cpu_is_at91sam9261()	(at91_soc_initdata.type == AT91_SOC_SAM9261)</div><div class='del'>-#else</div><div class='del'>-#define cpu_is_at91sam9261()	(0)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARCH_AT91SAM9G10</div><div class='ctx'> #define cpu_is_at91sam9g10()	(at91_soc_initdata.type == AT91_SOC_SAM9G10)</div><div class='ctx'> #else</div><div class='add'>+#define cpu_is_at91sam9261()	(0)</div><div class='ctx'> #define cpu_is_at91sam9g10()	(0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_AT91SAM9263</div><div class='add'>+#ifdef CONFIG_SOC_AT91SAM9263</div><div class='ctx'> #define cpu_is_at91sam9263()	(at91_soc_initdata.type == AT91_SOC_SAM9263)</div><div class='ctx'> #else</div><div class='ctx'> #define cpu_is_at91sam9263()	(0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_AT91SAM9RL</div><div class='add'>+#ifdef CONFIG_SOC_AT91SAM9RL</div><div class='ctx'> #define cpu_is_at91sam9rl()	(at91_soc_initdata.type == AT91_SOC_SAM9RL)</div><div class='ctx'> #else</div><div class='ctx'> #define cpu_is_at91sam9rl()	(0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_AT91SAM9G45</div><div class='add'>+#ifdef CONFIG_SOC_AT91SAM9G45</div><div class='ctx'> #define cpu_is_at91sam9g45()	(at91_soc_initdata.type == AT91_SOC_SAM9G45)</div><div class='ctx'> #define cpu_is_at91sam9g45es()	(at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES)</div><div class='ctx'> #define cpu_is_at91sam9m10()	(at91_soc_initdata.subtype == AT91_SOC_SAM9M10)</div><div class='hunk'>@@ -168,7 +165,7 @@ static inline int at91_soc_is_detected(void)</div><div class='ctx'> #define cpu_is_at91sam9m11()	(0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_AT91SAM9X5</div><div class='add'>+#ifdef CONFIG_SOC_AT91SAM9X5</div><div class='ctx'> #define cpu_is_at91sam9x5()	(at91_soc_initdata.type == AT91_SOC_SAM9X5)</div><div class='ctx'> #define cpu_is_at91sam9g15()	(at91_soc_initdata.subtype == AT91_SOC_SAM9G15)</div><div class='ctx'> #define cpu_is_at91sam9g35()	(at91_soc_initdata.subtype == AT91_SOC_SAM9G35)</div><div class='hunk'>@@ -184,10 +181,17 @@ static inline int at91_soc_is_detected(void)</div><div class='ctx'> #define cpu_is_at91sam9x25()	(0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_SOC_AT91SAM9N12</div><div class='add'>+#define cpu_is_at91sam9n12()	(at91_soc_initdata.type == AT91_SOC_SAM9N12)</div><div class='add'>+#else</div><div class='add'>+#define cpu_is_at91sam9n12()	(0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Since this is ARM, we will never run on any AVR32 CPU. But these</div><div class='ctx'>  * definitions may reduce clutter in common drivers.</div><div class='ctx'>  */</div><div class='ctx'> #define cpu_is_at32ap7000()	(0)</div><div class='add'>+#endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __MACH_CPU_H__ */</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h<br/>index e9e29a6c3868..09242b67d277 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/hardware.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/include/mach/hardware.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/hardware.h</a></div><div class='hunk'>@@ -22,27 +22,18 @@</div><div class='ctx'> /* 9263, 9g45 */</div><div class='ctx'> #define AT91_BASE_DBGU1	0xffffee00</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ARCH_AT91RM9200)</div><div class='add'>+#if defined(CONFIG_ARCH_AT91X40)</div><div class='add'>+#include &lt;mach/at91x40.h&gt;</div><div class='add'>+#else</div><div class='ctx'> #include &lt;mach/at91rm9200.h&gt;</div><div class='del'>-#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)</div><div class='ctx'> #include &lt;mach/at91sam9260.h&gt;</div><div class='del'>-#elif defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10)</div><div class='ctx'> #include &lt;mach/at91sam9261.h&gt;</div><div class='del'>-#elif defined(CONFIG_ARCH_AT91SAM9263)</div><div class='ctx'> #include &lt;mach/at91sam9263.h&gt;</div><div class='del'>-#elif defined(CONFIG_ARCH_AT91SAM9RL)</div><div class='ctx'> #include &lt;mach/at91sam9rl.h&gt;</div><div class='del'>-#elif defined(CONFIG_ARCH_AT91SAM9G45)</div><div class='ctx'> #include &lt;mach/at91sam9g45.h&gt;</div><div class='del'>-#elif defined(CONFIG_ARCH_AT91SAM9X5)</div><div class='ctx'> #include &lt;mach/at91sam9x5.h&gt;</div><div class='del'>-#elif defined(CONFIG_ARCH_AT91X40)</div><div class='del'>-#include &lt;mach/at91x40.h&gt;</div><div class='del'>-#else</div><div class='del'>-#error "Unsupported AT91 processor"</div><div class='del'>-#endif</div><div class='add'>+#include &lt;mach/at91sam9n12.h&gt;</div><div class='ctx'> </div><div class='del'>-#if !defined(CONFIG_ARCH_AT91X40)</div><div class='ctx'> /*</div><div class='ctx'>  * On all at91 except rm9200 and x40 have the System Controller starts</div><div class='ctx'>  * at address 0xffffc000 and has a size of 16KiB.</div><div class='hunk'>@@ -94,7 +85,6 @@</div><div class='ctx'>  * Virtual to Physical Address mapping for IO devices.</div><div class='ctx'>  */</div><div class='ctx'> #define AT91_VA_BASE_SYS	AT91_IO_P2V(AT91_BASE_SYS)</div><div class='del'>-#define AT91_VA_BASE_EMAC	AT91_IO_P2V(AT91RM9200_BASE_EMAC)</div><div class='ctx'> </div><div class='ctx'>  /* Internal SRAM is mapped below the IO devices */</div><div class='ctx'> #define AT91_SRAM_MAX		SZ_1M</div><div class='head'>diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h<br/>index 4218647c1fcd..6f6118d1576a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/uncompress.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/include/mach/uncompress.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/include/mach/uncompress.h</a></div><div class='hunk'>@@ -1,7 +1,8 @@</div><div class='ctx'> /*</div><div class='ctx'>  * arch/arm/mach-at91/include/mach/uncompress.h</div><div class='ctx'>  *</div><div class='del'>- *  Copyright (C) 2003 SAN People</div><div class='add'>+ * Copyright (C) 2003 SAN People</div><div class='add'>+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='hunk'>@@ -25,22 +26,147 @@</div><div class='ctx'> #include &lt;linux/atmel_serial.h&gt;</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_AT91_EARLY_DBGU0)</div><div class='del'>-#define UART_OFFSET AT91_BASE_DBGU0</div><div class='del'>-#elif defined(CONFIG_AT91_EARLY_DBGU1)</div><div class='del'>-#define UART_OFFSET AT91_BASE_DBGU1</div><div class='del'>-#elif defined(CONFIG_AT91_EARLY_USART0)</div><div class='del'>-#define UART_OFFSET AT91_USART0</div><div class='del'>-#elif defined(CONFIG_AT91_EARLY_USART1)</div><div class='del'>-#define UART_OFFSET AT91_USART1</div><div class='del'>-#elif defined(CONFIG_AT91_EARLY_USART2)</div><div class='del'>-#define UART_OFFSET AT91_USART2</div><div class='del'>-#elif defined(CONFIG_AT91_EARLY_USART3)</div><div class='del'>-#define UART_OFFSET AT91_USART3</div><div class='del'>-#elif defined(CONFIG_AT91_EARLY_USART4)</div><div class='del'>-#define UART_OFFSET AT91_USART4</div><div class='del'>-#elif defined(CONFIG_AT91_EARLY_USART5)</div><div class='del'>-#define UART_OFFSET AT91_USART5</div><div class='add'>+#include &lt;mach/at91_dbgu.h&gt;</div><div class='add'>+#include &lt;mach/cpu.h&gt;</div><div class='add'>+</div><div class='add'>+void __iomem *at91_uart;</div><div class='add'>+</div><div class='add'>+#if !defined(CONFIG_ARCH_AT91X40)</div><div class='add'>+static const u32 uarts_rm9200[] = {</div><div class='add'>+	AT91_BASE_DBGU0,</div><div class='add'>+	AT91RM9200_BASE_US0,</div><div class='add'>+	AT91RM9200_BASE_US1,</div><div class='add'>+	AT91RM9200_BASE_US2,</div><div class='add'>+	AT91RM9200_BASE_US3,</div><div class='add'>+	0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 uarts_sam9260[] = {</div><div class='add'>+	AT91_BASE_DBGU0,</div><div class='add'>+	AT91SAM9260_BASE_US0,</div><div class='add'>+	AT91SAM9260_BASE_US1,</div><div class='add'>+	AT91SAM9260_BASE_US2,</div><div class='add'>+	AT91SAM9260_BASE_US3,</div><div class='add'>+	AT91SAM9260_BASE_US4,</div><div class='add'>+	AT91SAM9260_BASE_US5,</div><div class='add'>+	0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 uarts_sam9261[] = {</div><div class='add'>+	AT91_BASE_DBGU0,</div><div class='add'>+	AT91SAM9261_BASE_US0,</div><div class='add'>+	AT91SAM9261_BASE_US1,</div><div class='add'>+	AT91SAM9261_BASE_US2,</div><div class='add'>+	0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 uarts_sam9263[] = {</div><div class='add'>+	AT91_BASE_DBGU1,</div><div class='add'>+	AT91SAM9263_BASE_US0,</div><div class='add'>+	AT91SAM9263_BASE_US1,</div><div class='add'>+	AT91SAM9263_BASE_US2,</div><div class='add'>+	0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 uarts_sam9g45[] = {</div><div class='add'>+	AT91_BASE_DBGU1,</div><div class='add'>+	AT91SAM9G45_BASE_US0,</div><div class='add'>+	AT91SAM9G45_BASE_US1,</div><div class='add'>+	AT91SAM9G45_BASE_US2,</div><div class='add'>+	AT91SAM9G45_BASE_US3,</div><div class='add'>+	0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 uarts_sam9rl[] = {</div><div class='add'>+	AT91_BASE_DBGU0,</div><div class='add'>+	AT91SAM9RL_BASE_US0,</div><div class='add'>+	AT91SAM9RL_BASE_US1,</div><div class='add'>+	AT91SAM9RL_BASE_US2,</div><div class='add'>+	AT91SAM9RL_BASE_US3,</div><div class='add'>+	0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 uarts_sam9x5[] = {</div><div class='add'>+	AT91_BASE_DBGU0,</div><div class='add'>+	AT91SAM9X5_BASE_USART0,</div><div class='add'>+	AT91SAM9X5_BASE_USART1,</div><div class='add'>+	AT91SAM9X5_BASE_USART2,</div><div class='add'>+	0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline const u32* decomp_soc_detect(u32 dbgu_base)</div><div class='add'>+{</div><div class='add'>+	u32 cidr, socid;</div><div class='add'>+</div><div class='add'>+	cidr = __raw_readl(dbgu_base + AT91_DBGU_CIDR);</div><div class='add'>+	socid = cidr &amp; ~AT91_CIDR_VERSION;</div><div class='add'>+</div><div class='add'>+	switch (socid) {</div><div class='add'>+	case ARCH_ID_AT91RM9200:</div><div class='add'>+		return uarts_rm9200;</div><div class='add'>+</div><div class='add'>+	case ARCH_ID_AT91SAM9G20:</div><div class='add'>+	case ARCH_ID_AT91SAM9260:</div><div class='add'>+		return uarts_sam9260;</div><div class='add'>+</div><div class='add'>+	case ARCH_ID_AT91SAM9261:</div><div class='add'>+		return uarts_sam9261;</div><div class='add'>+</div><div class='add'>+	case ARCH_ID_AT91SAM9263:</div><div class='add'>+		return uarts_sam9263;</div><div class='add'>+</div><div class='add'>+	case ARCH_ID_AT91SAM9G45:</div><div class='add'>+		return uarts_sam9g45;</div><div class='add'>+</div><div class='add'>+	case ARCH_ID_AT91SAM9RL64:</div><div class='add'>+		return uarts_sam9rl;</div><div class='add'>+</div><div class='add'>+	case ARCH_ID_AT91SAM9X5:</div><div class='add'>+		return uarts_sam9x5;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* at91sam9g10 */</div><div class='add'>+	if ((cidr &amp; ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {</div><div class='add'>+		return uarts_sam9261;</div><div class='add'>+	}</div><div class='add'>+	/* at91sam9xe */</div><div class='add'>+	else if ((cidr &amp; AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {</div><div class='add'>+		return uarts_sam9260;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_decomp_setup(void)</div><div class='add'>+{</div><div class='add'>+	int i = 0;</div><div class='add'>+	const u32* usarts;</div><div class='add'>+</div><div class='add'>+	usarts = decomp_soc_detect(AT91_BASE_DBGU0);</div><div class='add'>+</div><div class='add'>+	if (!usarts)</div><div class='add'>+		usarts = decomp_soc_detect(AT91_BASE_DBGU1);</div><div class='add'>+	if (!usarts) {</div><div class='add'>+		at91_uart = NULL;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		/* physical address */</div><div class='add'>+		at91_uart = (void __iomem *)usarts[i];</div><div class='add'>+</div><div class='add'>+		if (__raw_readl(at91_uart + ATMEL_US_BRGR))</div><div class='add'>+			return;</div><div class='add'>+		i++;</div><div class='add'>+	} while (usarts[i]);</div><div class='add'>+</div><div class='add'>+	at91_uart = NULL;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline void arch_decomp_setup(void)</div><div class='add'>+{</div><div class='add'>+	at91_uart = NULL;</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -52,28 +178,24 @@</div><div class='ctx'>  */</div><div class='ctx'> static void putc(int c)</div><div class='ctx'> {</div><div class='del'>-#ifdef UART_OFFSET</div><div class='del'>-	void __iomem *sys = (void __iomem *) UART_OFFSET;	/* physical address */</div><div class='add'>+	if (!at91_uart)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	while (!(__raw_readl(sys + ATMEL_US_CSR) &amp; ATMEL_US_TXRDY))</div><div class='add'>+	while (!(__raw_readl(at91_uart + ATMEL_US_CSR) &amp; ATMEL_US_TXRDY))</div><div class='ctx'> 		barrier();</div><div class='del'>-	__raw_writel(c, sys + ATMEL_US_THR);</div><div class='del'>-#endif</div><div class='add'>+	__raw_writel(c, at91_uart + ATMEL_US_THR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void flush(void)</div><div class='ctx'> {</div><div class='del'>-#ifdef UART_OFFSET</div><div class='del'>-	void __iomem *sys = (void __iomem *) UART_OFFSET;	/* physical address */</div><div class='add'>+	if (!at91_uart)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	/* wait for transmission to complete */</div><div class='del'>-	while (!(__raw_readl(sys + ATMEL_US_CSR) &amp; ATMEL_US_TXEMPTY))</div><div class='add'>+	while (!(__raw_readl(at91_uart + ATMEL_US_CSR) &amp; ATMEL_US_TXEMPTY))</div><div class='ctx'> 		barrier();</div><div class='del'>-#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define arch_decomp_setup()</div><div class='del'>-</div><div class='ctx'> #define arch_decomp_wdog()</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c<br/>index f630250c6b87..1bfaad628731 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/pm.c</a></div><div class='hunk'>@@ -261,7 +261,12 @@ static int at91_pm_enter(suspend_state_t state)</div><div class='ctx'> 			 * For ARM 926 based chips, this requirement is weaker</div><div class='ctx'> 			 * as at91sam9 can access a RAM in self-refresh mode.</div><div class='ctx'> 			 */</div><div class='del'>-			at91_standby();</div><div class='add'>+			if (cpu_is_at91rm9200())</div><div class='add'>+				at91rm9200_standby();</div><div class='add'>+			else if (cpu_is_at91sam9g45())</div><div class='add'>+				at91sam9g45_standby();</div><div class='add'>+			else</div><div class='add'>+				at91sam9_standby();</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case PM_SUSPEND_ON:</div><div class='hunk'>@@ -307,10 +312,9 @@ static int __init at91_pm_init(void)</div><div class='ctx'> </div><div class='ctx'> 	pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_AT91RM9200</div><div class='ctx'> 	/* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */</div><div class='del'>-	at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);</div><div class='del'>-#endif</div><div class='add'>+	if (cpu_is_at91rm9200())</div><div class='add'>+		at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);</div><div class='ctx'> </div><div class='ctx'> 	suspend_set_ops(&amp;at91_pm_ops);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h<br/>index 89f56f3a802e..38f467c6b710 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/pm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/pm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/pm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/pm.h</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'> #define __ARCH_ARM_MACH_AT91_PM</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/at91_ramc.h&gt;</div><div class='del'>-#ifdef CONFIG_ARCH_AT91RM9200</div><div class='ctx'> #include &lt;mach/at91rm9200_sdramc.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -43,10 +42,6 @@ static inline void at91rm9200_standby(void)</div><div class='ctx'> 		  "r" (lpr));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define at91_standby at91rm9200_standby</div><div class='del'>-</div><div class='del'>-#elif defined(CONFIG_ARCH_AT91SAM9G45)</div><div class='del'>-</div><div class='ctx'> /* We manage both DDRAM/SDRAM controllers, we need more than one value to</div><div class='ctx'>  * remember.</div><div class='ctx'>  */</div><div class='hunk'>@@ -75,11 +70,7 @@ static inline void at91sam9g45_standby(void)</div><div class='ctx'> 	at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define at91_standby at91sam9g45_standby</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARCH_AT91SAM9263</div><div class='add'>+#ifdef CONFIG_SOC_AT91SAM9263</div><div class='ctx'> /*</div><div class='ctx'>  * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;</div><div class='ctx'>  * handle those cases both here and in the Suspend-To-RAM support.</div><div class='hunk'>@@ -102,8 +93,4 @@ static inline void at91sam9_standby(void)</div><div class='ctx'> 	at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define at91_standby at91sam9_standby</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S<br/>index db5452123f17..098c28ddf025 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/pm_slowclock.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/pm_slowclock.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/pm_slowclock.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/pm_slowclock.S</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #include &lt;mach/at91_ramc.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_AT91SAM9263</div><div class='add'>+#ifdef CONFIG_SOC_AT91SAM9263</div><div class='ctx'> /*</div><div class='ctx'>  * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;</div><div class='ctx'>  * handle those cases both here and in the Suspend-To-RAM support.</div><div class='head'>diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c<br/>index f44a2e7272e3..944bffb08991 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/setup.c</a></div><div class='hunk'>@@ -143,6 +143,11 @@ static void __init soc_detect(u32 dbgu_base)</div><div class='ctx'> 		at91_soc_initdata.type = AT91_SOC_SAM9X5;</div><div class='ctx'> 		at91_boot_soc = at91sam9x5_soc;</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	case ARCH_ID_AT91SAM9N12:</div><div class='add'>+		at91_soc_initdata.type = AT91_SOC_SAM9N12;</div><div class='add'>+		at91_boot_soc = at91sam9n12_soc;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* at91sam9g10 */</div><div class='hunk'>@@ -210,6 +215,7 @@ static const char *soc_name[] = {</div><div class='ctx'> 	[AT91_SOC_SAM9G45]	= "at91sam9g45",</div><div class='ctx'> 	[AT91_SOC_SAM9RL]	= "at91sam9rl",</div><div class='ctx'> 	[AT91_SOC_SAM9X5]	= "at91sam9x5",</div><div class='add'>+	[AT91_SOC_SAM9N12]	= "at91sam9n12",</div><div class='ctx'> 	[AT91_SOC_NONE]		= "Unknown"</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h<br/>index 5db4aa45404a..a9cfeb153719 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-at91/soc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-at91/soc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-at91/soc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-at91/soc.h</a></div><div class='hunk'>@@ -20,36 +20,41 @@ extern struct at91_init_soc at91sam9263_soc;</div><div class='ctx'> extern struct at91_init_soc at91sam9g45_soc;</div><div class='ctx'> extern struct at91_init_soc at91sam9rl_soc;</div><div class='ctx'> extern struct at91_init_soc at91sam9x5_soc;</div><div class='add'>+extern struct at91_init_soc at91sam9n12_soc;</div><div class='ctx'> </div><div class='ctx'> static inline int at91_soc_is_enabled(void)</div><div class='ctx'> {</div><div class='ctx'> 	return at91_boot_soc.init != NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if !defined(CONFIG_ARCH_AT91RM9200)</div><div class='add'>+#if !defined(CONFIG_SOC_AT91RM9200)</div><div class='ctx'> #define at91rm9200_soc	at91_boot_soc</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#if !(defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20))</div><div class='add'>+#if !defined(CONFIG_SOC_AT91SAM9260)</div><div class='ctx'> #define at91sam9260_soc	at91_boot_soc</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#if !(defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10))</div><div class='add'>+#if !defined(CONFIG_SOC_AT91SAM9261)</div><div class='ctx'> #define at91sam9261_soc	at91_boot_soc</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#if !defined(CONFIG_ARCH_AT91SAM9263)</div><div class='add'>+#if !defined(CONFIG_SOC_AT91SAM9263)</div><div class='ctx'> #define at91sam9263_soc	at91_boot_soc</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#if !defined(CONFIG_ARCH_AT91SAM9G45)</div><div class='add'>+#if !defined(CONFIG_SOC_AT91SAM9G45)</div><div class='ctx'> #define at91sam9g45_soc	at91_boot_soc</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#if !defined(CONFIG_ARCH_AT91SAM9RL)</div><div class='add'>+#if !defined(CONFIG_SOC_AT91SAM9RL)</div><div class='ctx'> #define at91sam9rl_soc	at91_boot_soc</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#if !defined(CONFIG_ARCH_AT91SAM9X5)</div><div class='add'>+#if !defined(CONFIG_SOC_AT91SAM9X5)</div><div class='ctx'> #define at91sam9x5_soc	at91_boot_soc</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#if !defined(CONFIG_SOC_AT91SAM9N12)</div><div class='add'>+#define at91sam9n12_soc	at91_boot_soc</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig<br/>index eb34bd1251d4..ea036d621581 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-clps711x/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-clps711x/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-clps711x/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/Kconfig</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> if ARCH_CLPS711X</div><div class='ctx'> </div><div class='del'>-menu "CLPS711X/EP721X Implementations"</div><div class='add'>+menu "CLPS711X/EP721X/EP731X Implementations"</div><div class='ctx'> </div><div class='ctx'> config ARCH_AUTCPU12</div><div class='ctx'> 	bool "AUTCPU12"</div><div class='hunk'>@@ -45,26 +45,13 @@ config ARCH_P720T</div><div class='ctx'> config ARCH_FORTUNET</div><div class='ctx'> 	bool "FORTUNET"</div><div class='ctx'> </div><div class='del'>-# XXX Maybe these should indicate register compatibility</div><div class='del'>-# instead of being mutually exclusive.</div><div class='del'>-config ARCH_EP7211</div><div class='del'>-	bool</div><div class='del'>-	depends on ARCH_EDB7211</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-config ARCH_EP7212</div><div class='del'>-	bool</div><div class='del'>-	depends on ARCH_P720T || ARCH_CEIVA</div><div class='del'>-	default y</div><div class='del'>-</div><div class='ctx'> config EP72XX_ROM_BOOT</div><div class='del'>-	bool "EP72xx ROM boot"</div><div class='del'>-	depends on ARCH_EP7211 || ARCH_EP7212</div><div class='del'>-	---help---</div><div class='add'>+	bool "EP721x/EP731x ROM boot"</div><div class='add'>+	help</div><div class='ctx'> 	  If you say Y here, your CLPS711x-based kernel will use the bootstrap</div><div class='ctx'> 	  mode memory map instead of the normal memory map.</div><div class='ctx'> </div><div class='del'>-	  Processors derived from the Cirrus CLPS-711X core support two boot</div><div class='add'>+	  Processors derived from the Cirrus CLPS711X core support two boot</div><div class='ctx'> 	  modes.  Normal mode boots from the external memory device at CS0.</div><div class='ctx'> 	  Bootstrap mode rearranges parts of the memory map, placing an</div><div class='ctx'> 	  internal 128 byte bootstrap ROM at CS0.  This option performs the</div><div class='head'>diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c<br/>index 3c5b5bbf24e5..c965fd8eb31a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-clps711x/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-clps711x/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-clps711x/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/common.c</a></div><div class='hunk'>@@ -36,7 +36,6 @@</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> #include &lt;asm/mach/time.h&gt;</div><div class='del'>-#include &lt;asm/hardware/clps7111.h&gt;</div><div class='ctx'> #include &lt;asm/system_misc.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -44,8 +43,8 @@</div><div class='ctx'>  */</div><div class='ctx'> static struct map_desc clps711x_io_desc[] __initdata = {</div><div class='ctx'> 	{</div><div class='del'>-		.virtual	= CLPS7111_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(CLPS7111_PHYS_BASE),</div><div class='add'>+		.virtual	= (unsigned long)CLPS711X_VIRT_BASE,</div><div class='add'>+		.pfn		= __phys_to_pfn(CLPS711X_PHYS_BASE),</div><div class='ctx'> 		.length		= SZ_1M,</div><div class='ctx'> 		.type		= MT_DEVICE</div><div class='ctx'> 	}</div><div class='hunk'>@@ -67,12 +66,6 @@ static void int1_mask(struct irq_data *d)</div><div class='ctx'> </div><div class='ctx'> static void int1_ack(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	u32 intmr1;</div><div class='del'>-</div><div class='del'>-	intmr1 = clps_readl(INTMR1);</div><div class='del'>-	intmr1 &amp;= ~(1 &lt;&lt; d-&gt;irq);</div><div class='del'>-	clps_writel(intmr1, INTMR1);</div><div class='del'>-</div><div class='ctx'> 	switch (d-&gt;irq) {</div><div class='ctx'> 	case IRQ_CSINT:  clps_writel(0, COEOI);  break;</div><div class='ctx'> 	case IRQ_TC1OI:  clps_writel(0, TC1EOI); break;</div><div class='hunk'>@@ -109,12 +102,6 @@ static void int2_mask(struct irq_data *d)</div><div class='ctx'> </div><div class='ctx'> static void int2_ack(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	u32 intmr2;</div><div class='del'>-</div><div class='del'>-	intmr2 = clps_readl(INTMR2);</div><div class='del'>-	intmr2 &amp;= ~(1 &lt;&lt; (d-&gt;irq - 16));</div><div class='del'>-	clps_writel(intmr2, INTMR2);</div><div class='del'>-</div><div class='ctx'> 	switch (d-&gt;irq) {</div><div class='ctx'> 	case IRQ_KBDINT: clps_writel(0, KBDEOI); break;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm/include/asm/hardware/clps7111.h b/arch/arm/mach-clps711x/include/mach/clps711x.h<br/>index 44477225aed6..1dd806f2847e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/include/asm/hardware/clps7111.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/include/asm/hardware/clps7111.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-clps711x/include/mach/clps711x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/clps711x.h</a></div><div class='hunk'>@@ -1,8 +1,6 @@</div><div class='ctx'> /*</div><div class='del'>- *  arch/arm/include/asm/hardware/clps7111.h</div><div class='del'>- *</div><div class='del'>- *  This file contains the hardware definitions of the CLPS7111 internal</div><div class='del'>- *  registers.</div><div class='add'>+ *  This file contains the hardware definitions of the Cirrus Logic</div><div class='add'>+ *  ARM7 CLPS711X internal registers.</div><div class='ctx'>  *</div><div class='ctx'>  *  Copyright (C) 2000 Deep Blue Solutions Ltd.</div><div class='ctx'>  *</div><div class='hunk'>@@ -20,25 +18,18 @@</div><div class='ctx'>  * along with this program; if not, write to the Free Software</div><div class='ctx'>  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASM_HARDWARE_CLPS7111_H</div><div class='del'>-#define __ASM_HARDWARE_CLPS7111_H</div><div class='del'>-</div><div class='del'>-#define CLPS7111_PHYS_BASE	(0x80000000)</div><div class='add'>+#ifndef __MACH_CLPS711X_H</div><div class='add'>+#define __MACH_CLPS711X_H</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-#define clps_readb(off)		__raw_readb(CLPS7111_BASE + (off))</div><div class='del'>-#define clps_readw(off)		__raw_readw(CLPS7111_BASE + (off))</div><div class='del'>-#define clps_readl(off)		__raw_readl(CLPS7111_BASE + (off))</div><div class='del'>-#define clps_writeb(val,off)	__raw_writeb(val, CLPS7111_BASE + (off))</div><div class='del'>-#define clps_writew(val,off)	__raw_writew(val, CLPS7111_BASE + (off))</div><div class='del'>-#define clps_writel(val,off)	__raw_writel(val, CLPS7111_BASE + (off))</div><div class='del'>-#endif</div><div class='add'>+#define CLPS711X_PHYS_BASE	(0x80000000)</div><div class='ctx'> </div><div class='ctx'> #define PADR		(0x0000)</div><div class='ctx'> #define PBDR		(0x0001)</div><div class='add'>+#define PCDR		(0x0002)</div><div class='ctx'> #define PDDR		(0x0003)</div><div class='ctx'> #define PADDR		(0x0040)</div><div class='ctx'> #define PBDDR		(0x0041)</div><div class='add'>+#define PCDDR		(0x0042)</div><div class='ctx'> #define PDDDR		(0x0043)</div><div class='ctx'> #define PEDR		(0x0080)</div><div class='ctx'> #define PEDDR		(0x00c0)</div><div class='hunk'>@@ -50,7 +41,7 @@</div><div class='ctx'> #define INTSR1		(0x0240)</div><div class='ctx'> #define INTMR1		(0x0280)</div><div class='ctx'> #define LCDCON		(0x02c0)</div><div class='del'>-#define TC1D            (0x0300)</div><div class='add'>+#define TC1D		(0x0300)</div><div class='ctx'> #define TC2D		(0x0340)</div><div class='ctx'> #define RTCDR		(0x0380)</div><div class='ctx'> #define RTCMR		(0x03c0)</div><div class='hunk'>@@ -85,6 +76,26 @@</div><div class='ctx'> #define SS2POP		(0x16c0)</div><div class='ctx'> #define KBDEOI		(0x1700)</div><div class='ctx'> </div><div class='add'>+#define DAIR		(0x2000)</div><div class='add'>+#define DAIR0		(0x2040)</div><div class='add'>+#define DAIDR1		(0x2080)</div><div class='add'>+#define DAIDR2		(0x20c0)</div><div class='add'>+#define DAISR		(0x2100)</div><div class='add'>+#define SYSCON3		(0x2200)</div><div class='add'>+#define INTSR3		(0x2240)</div><div class='add'>+#define INTMR3		(0x2280)</div><div class='add'>+#define LEDFLSH		(0x22c0)</div><div class='add'>+#define SDCONF		(0x2300)</div><div class='add'>+#define SDRFPR		(0x2340)</div><div class='add'>+#define UNIQID		(0x2440)</div><div class='add'>+#define DAI64FS		(0x2600)</div><div class='add'>+#define PLLW		(0x2610)</div><div class='add'>+#define PLLR		(0xa5a8)</div><div class='add'>+#define RANDID0		(0x2700)</div><div class='add'>+#define RANDID1		(0x2704)</div><div class='add'>+#define RANDID2		(0x2708)</div><div class='add'>+#define RANDID3		(0x270c)</div><div class='add'>+</div><div class='ctx'> /* common bits: SYSCON1 / SYSCON2 */</div><div class='ctx'> #define SYSCON_UARTEN		(1 &lt;&lt; 8)</div><div class='ctx'> </div><div class='hunk'>@@ -131,6 +142,8 @@</div><div class='ctx'> #define SYSFLG1_CTXFF		(1 &lt;&lt; 25)</div><div class='ctx'> #define SYSFLG1_SSIBUSY		(1 &lt;&lt; 26)</div><div class='ctx'> #define SYSFLG1_ID		(1 &lt;&lt; 29)</div><div class='add'>+#define SYSFLG1_VERID(x)	(((x) &gt;&gt; 30) &amp; 3)</div><div class='add'>+#define SYSFLG1_VERID_MASK	(3 &lt;&lt; 30)</div><div class='ctx'> </div><div class='ctx'> #define SYSFLG2_SSRXOF		(1 &lt;&lt; 0)</div><div class='ctx'> #define SYSFLG2_RESVAL		(1 &lt;&lt; 1)</div><div class='hunk'>@@ -178,7 +191,88 @@</div><div class='ctx'> #define UBRLCR_WRDLEN8		(3 &lt;&lt; 17)</div><div class='ctx'> #define UBRLCR_WRDLEN_MASK	(3 &lt;&lt; 17)</div><div class='ctx'> </div><div class='add'>+#define SYNCIO_FRMLEN(x)	(((x) &amp; 0x3f) &lt;&lt; 7)</div><div class='add'>+#define SYNCIO_CFGLEN(x)	((x) &amp; 0x7f)</div><div class='ctx'> #define SYNCIO_SMCKEN		(1 &lt;&lt; 13)</div><div class='ctx'> #define SYNCIO_TXFRMEN		(1 &lt;&lt; 14)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_HARDWARE_CLPS7111_H */</div><div class='add'>+#define DAIR_RESERVED		(0x0404)</div><div class='add'>+#define DAIR_DAIEN		(1 &lt;&lt; 16)</div><div class='add'>+#define DAIR_ECS		(1 &lt;&lt; 17)</div><div class='add'>+#define DAIR_LCTM		(1 &lt;&lt; 19)</div><div class='add'>+#define DAIR_LCRM		(1 &lt;&lt; 20)</div><div class='add'>+#define DAIR_RCTM		(1 &lt;&lt; 21)</div><div class='add'>+#define DAIR_RCRM		(1 &lt;&lt; 22)</div><div class='add'>+#define DAIR_LBM		(1 &lt;&lt; 23)</div><div class='add'>+</div><div class='add'>+#define DAIDR2_FIFOEN		(1 &lt;&lt; 15)</div><div class='add'>+#define DAIDR2_FIFOLEFT		(0x0d &lt;&lt; 16)</div><div class='add'>+#define DAIDR2_FIFORIGHT	(0x11 &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+#define DAISR_RCTS		(1 &lt;&lt; 0)</div><div class='add'>+#define DAISR_RCRS		(1 &lt;&lt; 1)</div><div class='add'>+#define DAISR_LCTS		(1 &lt;&lt; 2)</div><div class='add'>+#define DAISR_LCRS		(1 &lt;&lt; 3)</div><div class='add'>+#define DAISR_RCTU		(1 &lt;&lt; 4)</div><div class='add'>+#define DAISR_RCRO		(1 &lt;&lt; 5)</div><div class='add'>+#define DAISR_LCTU		(1 &lt;&lt; 6)</div><div class='add'>+#define DAISR_LCRO		(1 &lt;&lt; 7)</div><div class='add'>+#define DAISR_RCNF		(1 &lt;&lt; 8)</div><div class='add'>+#define DAISR_RCNE		(1 &lt;&lt; 9)</div><div class='add'>+#define DAISR_LCNF		(1 &lt;&lt; 10)</div><div class='add'>+#define DAISR_LCNE		(1 &lt;&lt; 11)</div><div class='add'>+#define DAISR_FIFO		(1 &lt;&lt; 12)</div><div class='add'>+</div><div class='add'>+#define DAI64FS_I2SF64		(1 &lt;&lt; 0)</div><div class='add'>+#define DAI64FS_AUDIOCLKEN	(1 &lt;&lt; 1)</div><div class='add'>+#define DAI64FS_AUDIOCLKSRC	(1 &lt;&lt; 2)</div><div class='add'>+#define DAI64FS_MCLK256EN	(1 &lt;&lt; 3)</div><div class='add'>+#define DAI64FS_LOOPBACK	(1 &lt;&lt; 5)</div><div class='add'>+</div><div class='add'>+#define SYSCON3_ADCCON		(1 &lt;&lt; 0)</div><div class='add'>+#define SYSCON3_CLKCTL0		(1 &lt;&lt; 1)</div><div class='add'>+#define SYSCON3_CLKCTL1		(1 &lt;&lt; 2)</div><div class='add'>+#define SYSCON3_DAISEL		(1 &lt;&lt; 3)</div><div class='add'>+#define SYSCON3_ADCCKNSEN	(1 &lt;&lt; 4)</div><div class='add'>+#define SYSCON3_VERSN(x)	(((x) &gt;&gt; 5) &amp; 7)</div><div class='add'>+#define SYSCON3_VERSN_MASK	(7 &lt;&lt; 5)</div><div class='add'>+#define SYSCON3_FASTWAKE	(1 &lt;&lt; 8)</div><div class='add'>+#define SYSCON3_DAIEN		(1 &lt;&lt; 9)</div><div class='add'>+#define SYSCON3_128FS		SYSCON3_DAIEN</div><div class='add'>+#define SYSCON3_ENPD67		(1 &lt;&lt; 10)</div><div class='add'>+</div><div class='add'>+#define SDCONF_ACTIVE		(1 &lt;&lt; 10)</div><div class='add'>+#define SDCONF_CLKCTL		(1 &lt;&lt; 9)</div><div class='add'>+#define SDCONF_WIDTH_4		(0 &lt;&lt; 7)</div><div class='add'>+#define SDCONF_WIDTH_8		(1 &lt;&lt; 7)</div><div class='add'>+#define SDCONF_WIDTH_16		(2 &lt;&lt; 7)</div><div class='add'>+#define SDCONF_WIDTH_32		(3 &lt;&lt; 7)</div><div class='add'>+#define SDCONF_SIZE_16		(0 &lt;&lt; 5)</div><div class='add'>+#define SDCONF_SIZE_64		(1 &lt;&lt; 5)</div><div class='add'>+#define SDCONF_SIZE_128		(2 &lt;&lt; 5)</div><div class='add'>+#define SDCONF_SIZE_256		(3 &lt;&lt; 5)</div><div class='add'>+#define SDCONF_CASLAT_2		(2)</div><div class='add'>+#define SDCONF_CASLAT_3		(3)</div><div class='add'>+</div><div class='add'>+#define MEMCFG_BUS_WIDTH_32	(1)</div><div class='add'>+#define MEMCFG_BUS_WIDTH_16	(0)</div><div class='add'>+#define MEMCFG_BUS_WIDTH_8	(3)</div><div class='add'>+</div><div class='add'>+#define MEMCFG_WAITSTATE_8_3	(0 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_7_3	(1 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_6_3	(2 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_5_3	(3 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_4_2	(4 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_3_2	(5 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_2_2	(6 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_1_2	(7 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_8_1	(8 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_7_1	(9 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_6_1	(10 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_5_1	(11 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_4_0	(12 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_3_0	(13 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_2_0	(14 &lt;&lt; 2)</div><div class='add'>+#define MEMCFG_WAITSTATE_1_0	(15 &lt;&lt; 2)</div><div class='add'>+</div><div class='add'>+#endif /* __MACH_CLPS711X_H */</div><div class='head'>diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S<br/>index b802e8a51831..118b3d930573 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-clps711x/include/mach/debug-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-clps711x/include/mach/debug-macro.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-clps711x/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/debug-macro.S</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'> */</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/hardware/clps7111.h&gt;</div><div class='ctx'> </div><div class='ctx'> 		.macro	addruart, rp, rv, tmp</div><div class='ctx'> #ifndef CONFIG_DEBUG_CLPS711X_UART2</div><div class='hunk'>@@ -20,8 +19,8 @@</div><div class='ctx'> #else</div><div class='ctx'> 		mov	\rp, #0x1000	@ UART2</div><div class='ctx'> #endif</div><div class='del'>-		orr	\rv, \rp, #CLPS7111_VIRT_BASE</div><div class='del'>-		orr	\rp, \rp, #CLPS7111_PHYS_BASE</div><div class='add'>+		orr	\rv, \rp, #CLPS711X_VIRT_BASE</div><div class='add'>+		orr	\rp, \rp, #CLPS711X_PHYS_BASE</div><div class='ctx'> 		.endm</div><div class='ctx'> </div><div class='ctx'> 		.macro	senduart,rd,rx</div><div class='head'>diff --git a/arch/arm/mach-clps711x/include/mach/entry-macro.S b/arch/arm/mach-clps711x/include/mach/entry-macro.S<br/>index 125af59d7a29..56e5c2c23504 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-clps711x/include/mach/entry-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-clps711x/include/mach/entry-macro.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-clps711x/include/mach/entry-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/entry-macro.S</a></div><div class='hunk'>@@ -8,7 +8,6 @@</div><div class='ctx'>  * warranty of any kind, whether express or implied.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/hardware/clps7111.h&gt;</div><div class='ctx'> </div><div class='ctx'> 		.macro	get_irqnr_preamble, base, tmp</div><div class='ctx'> 		.endm</div><div class='hunk'>@@ -18,7 +17,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 		.macro	get_irqnr_and_base, irqnr, stat, base, mask</div><div class='del'>-		mov	\base, #CLPS7111_BASE</div><div class='add'>+		mov	\base, #CLPS711X_VIRT_BASE</div><div class='ctx'> 		ldr	\stat, [\base, #INTSR1]</div><div class='ctx'> 		ldr	\mask, [\base, #INTMR1]</div><div class='ctx'> 		mov	\irqnr, #4</div><div class='head'>diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h<br/>index d0b7d870be9c..13a64fcd7dd1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-clps711x/include/mach/hardware.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-clps711x/include/mach/hardware.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-clps711x/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/hardware.h</a></div><div class='hunk'>@@ -19,12 +19,21 @@</div><div class='ctx'>  * along with this program; if not, write to the Free Software</div><div class='ctx'>  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='ctx'>  */</div><div class='del'>-#ifndef __ASM_ARCH_HARDWARE_H</div><div class='del'>-#define __ASM_ARCH_HARDWARE_H</div><div class='add'>+#ifndef __MACH_HARDWARE_H</div><div class='add'>+#define __MACH_HARDWARE_H</div><div class='ctx'> </div><div class='add'>+#include &lt;mach/clps711x.h&gt;</div><div class='ctx'> </div><div class='del'>-#define CLPS7111_VIRT_BASE	0xff000000</div><div class='del'>-#define CLPS7111_BASE		CLPS7111_VIRT_BASE</div><div class='add'>+#define CLPS711X_VIRT_BASE	IOMEM(0xff000000)</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+#define clps_readb(off)		readb(CLPS711X_VIRT_BASE + (off))</div><div class='add'>+#define clps_readw(off)		readw(CLPS711X_VIRT_BASE + (off))</div><div class='add'>+#define clps_readl(off)		readl(CLPS711X_VIRT_BASE + (off))</div><div class='add'>+#define clps_writeb(val,off)	writeb(val, CLPS711X_VIRT_BASE + (off))</div><div class='add'>+#define clps_writew(val,off)	writew(val, CLPS711X_VIRT_BASE + (off))</div><div class='add'>+#define clps_writel(val,off)	writel(val, CLPS711X_VIRT_BASE + (off))</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The physical addresses that the external chip select signals map to is</div><div class='hunk'>@@ -52,46 +61,11 @@</div><div class='ctx'> #define CS7_PHYS_BASE		(0x00000000)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#if defined (CONFIG_ARCH_EP7211)</div><div class='del'>-</div><div class='del'>-#define EP7211_VIRT_BASE	CLPS7111_VIRT_BASE</div><div class='del'>-#define EP7211_BASE		CLPS7111_VIRT_BASE</div><div class='del'>-#include &lt;asm/hardware/ep7211.h&gt;</div><div class='del'>-</div><div class='del'>-#elif defined (CONFIG_ARCH_EP7212)</div><div class='del'>-</div><div class='del'>-#define EP7212_VIRT_BASE	CLPS7111_VIRT_BASE</div><div class='del'>-#define EP7212_BASE		CLPS7111_VIRT_BASE</div><div class='del'>-#include &lt;asm/hardware/ep7212.h&gt;</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define SYSPLD_VIRT_BASE	0xfe000000</div><div class='ctx'> #define SYSPLD_BASE		SYSPLD_VIRT_BASE</div><div class='ctx'> </div><div class='del'>-#if  defined (CONFIG_ARCH_AUTCPU12)</div><div class='del'>-</div><div class='del'>-#define  CS89712_VIRT_BASE	CLPS7111_VIRT_BASE</div><div class='del'>-#define  CS89712_BASE		CLPS7111_VIRT_BASE</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hardware/clps7111.h&gt;</div><div class='del'>-#include &lt;asm/hardware/ep7212.h&gt;</div><div class='del'>-#include &lt;asm/hardware/cs89712.h&gt;</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> #if defined (CONFIG_ARCH_CDB89712)</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/hardware/clps7111.h&gt;</div><div class='del'>-#include &lt;asm/hardware/ep7212.h&gt;</div><div class='del'>-#include &lt;asm/hardware/cs89712.h&gt;</div><div class='del'>-</div><div class='del'>-/* static cdb89712_map_io() areas */</div><div class='del'>-#define REGISTER_START   0x80000000</div><div class='del'>-#define REGISTER_SIZE    0x4000</div><div class='del'>-#define REGISTER_BASE    0xff000000</div><div class='del'>-</div><div class='ctx'> #define ETHER_START      0x20000000</div><div class='ctx'> #define ETHER_SIZE       0x1000</div><div class='ctx'> #define ETHER_BASE       0xfe000000</div><div class='hunk'>@@ -154,13 +128,6 @@</div><div class='ctx'> </div><div class='ctx'> #if defined (CONFIG_ARCH_CEIVA)</div><div class='ctx'> </div><div class='del'>-#define  CEIVA_VIRT_BASE	CLPS7111_VIRT_BASE</div><div class='del'>-#define  CEIVA_BASE		CLPS7111_VIRT_BASE</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hardware/clps7111.h&gt;</div><div class='del'>-#include &lt;asm/hardware/ep7212.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The two flash banks are wired to chip selects 0 and 1. This is the mapping</div><div class='ctx'>  * for them.</div><div class='head'>diff --git a/arch/arm/mach-clps711x/include/mach/irqs.h b/arch/arm/mach-clps711x/include/mach/irqs.h<br/>index 30b7e97285a4..14d215f8ca81 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-clps711x/include/mach/irqs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-clps711x/include/mach/irqs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-clps711x/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/irqs.h</a></div><div class='hunk'>@@ -35,7 +35,6 @@</div><div class='ctx'> #define IRQ_SSEOTI			15</div><div class='ctx'> </div><div class='ctx'> #define INT1_IRQS			(0x0000fff0)</div><div class='del'>-#define INT1_ACK_IRQS			(0x00004f10)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Interrupts from INTSR2</div><div class='hunk'>@@ -47,7 +46,5 @@</div><div class='ctx'> #define IRQ_URXINT2			(16+13)	/* bit 13 */</div><div class='ctx'> </div><div class='ctx'> #define INT2_IRQS			(0x30070000)</div><div class='del'>-#define INT2_ACK_IRQS			(0x00010000)</div><div class='del'>-</div><div class='del'>-#define NR_IRQS                         30</div><div class='ctx'> </div><div class='add'>+#define NR_IRQS				30</div><div class='head'>diff --git a/arch/arm/mach-clps711x/include/mach/time.h b/arch/arm/mach-clps711x/include/mach/time.h<br/>deleted file mode 100644<br/>index 61fef9129c6a..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-clps711x/include/mach/time.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-clps711x/include/mach/time.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,49 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  arch/arm/mach-clps711x/include/mach/time.h</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2000 Deep Blue Solutions Ltd.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- */</div><div class='del'>-#include &lt;asm/leds.h&gt;</div><div class='del'>-#include &lt;asm/hardware/clps7111.h&gt;</div><div class='del'>-</div><div class='del'>-extern void clps711x_setup_timer(void);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IRQ handler for the timer</div><div class='del'>- */</div><div class='del'>-static irqreturn_t</div><div class='del'>-p720t_timer_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct pt_regs *regs = get_irq_regs();</div><div class='del'>-	do_leds();</div><div class='del'>-	xtime_update(1);</div><div class='del'>-#ifndef CONFIG_SMP</div><div class='del'>-	update_process_times(user_mode(regs));</div><div class='del'>-#endif</div><div class='del'>-	do_profile(regs);</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Set up timer interrupt, and return the current time in seconds.</div><div class='del'>- */</div><div class='del'>-void __init time_init(void)</div><div class='del'>-{</div><div class='del'>-	clps711x_setup_timer();</div><div class='del'>-	timer_irq.handler = p720t_timer_interrupt;</div><div class='del'>-	setup_irq(IRQ_TC2OI, &amp;timer_irq);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-clps711x/include/mach/uncompress.h b/arch/arm/mach-clps711x/include/mach/uncompress.h<br/>index 35ed731b9f16..7b28d6a47690 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-clps711x/include/mach/uncompress.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-clps711x/include/mach/uncompress.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-clps711x/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/include/mach/uncompress.h</a></div><div class='hunk'>@@ -17,14 +17,7 @@</div><div class='ctx'>  * along with this program; if not, write to the Free Software</div><div class='ctx'>  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='ctx'>  */</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/hardware/clps7111.h&gt;</div><div class='del'>-</div><div class='del'>-#undef CLPS7111_BASE</div><div class='del'>-#define CLPS7111_BASE CLPS7111_PHYS_BASE</div><div class='del'>-</div><div class='del'>-#define __raw_readl(p)		(*(unsigned long *)(p))</div><div class='del'>-#define __raw_writel(v,p)	(*(unsigned long *)(p) = (v))</div><div class='add'>+#include &lt;mach/clps711x.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_CLPS711X_UART2</div><div class='ctx'> #define SYSFLGx	SYSFLG2</div><div class='hunk'>@@ -34,19 +27,25 @@</div><div class='ctx'> #define UARTDRx	UARTDR1</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define phys_reg(x)	(*(volatile u32 *)(CLPS711X_PHYS_BASE + (x)))</div><div class='add'>+</div><div class='ctx'> /*</div><div class='add'>+ * The following code assumes the serial port has already been</div><div class='add'>+ * initialized by the bootloader.  If you didn't setup a port in</div><div class='add'>+ * your bootloader then nothing will appear (which might be desired).</div><div class='add'>+ *</div><div class='ctx'>  * This does not append a newline</div><div class='ctx'>  */</div><div class='ctx'> static inline void putc(int c)</div><div class='ctx'> {</div><div class='del'>-	while (clps_readl(SYSFLGx) &amp; SYSFLG_UTXFF)</div><div class='add'>+	while (phys_reg(SYSFLGx) &amp; SYSFLG_UTXFF)</div><div class='ctx'> 		barrier();</div><div class='del'>-	clps_writel(c, UARTDRx);</div><div class='add'>+	phys_reg(UARTDRx) = c;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void flush(void)</div><div class='ctx'> {</div><div class='del'>-	while (clps_readl(SYSFLGx) &amp; SYSFLG_UBUSY)</div><div class='add'>+	while (phys_reg(SYSFLGx) &amp; SYSFLG_UBUSY)</div><div class='ctx'> 		barrier();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-clps711x/p720t-leds.c b/arch/arm/mach-clps711x/p720t-leds.c<br/>index dd9a6cdbeb02..bbc449fbe14a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-clps711x/p720t-leds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-clps711x/p720t-leds.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-clps711x/p720t-leds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-clps711x/p720t-leds.c</a></div><div class='hunk'>@@ -27,9 +27,6 @@</div><div class='ctx'> #include &lt;asm/leds.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/hardware/clps7111.h&gt;</div><div class='del'>-#include &lt;asm/hardware/ep7212.h&gt;</div><div class='del'>-</div><div class='ctx'> static void p720t_leds_event(led_event_t ledevt)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='head'>diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c<br/>index 79d001f831e0..311328314163 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-cns3xxx/pcie.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-cns3xxx/pcie.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-cns3xxx/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-cns3xxx/pcie.c</a></div><div class='hunk'>@@ -166,12 +166,6 @@ static struct pci_ops cns3xxx_pcie_ops = {</div><div class='ctx'> 	.write = cns3xxx_pci_write_config,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct pci_bus *cns3xxx_pci_scan_bus(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	return pci_scan_root_bus(NULL, sys-&gt;busnr, &amp;cns3xxx_pcie_ops, sys,</div><div class='del'>-				 &amp;sys-&gt;resources);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> {</div><div class='ctx'> 	struct cns3xxx_pcie *cnspci = pdev_to_cnspci(dev);</div><div class='hunk'>@@ -221,10 +215,9 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = {</div><div class='ctx'> 		.irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, },</div><div class='ctx'> 		.hw_pci = {</div><div class='ctx'> 			.domain = 0,</div><div class='del'>-			.swizzle = pci_std_swizzle,</div><div class='ctx'> 			.nr_controllers = 1,</div><div class='add'>+			.ops = &amp;cns3xxx_pcie_ops,</div><div class='ctx'> 			.setup = cns3xxx_pci_setup,</div><div class='del'>-			.scan = cns3xxx_pci_scan_bus,</div><div class='ctx'> 			.map_irq = cns3xxx_pcie_map_irq,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='hunk'>@@ -264,10 +257,9 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = {</div><div class='ctx'> 		.irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, },</div><div class='ctx'> 		.hw_pci = {</div><div class='ctx'> 			.domain = 1,</div><div class='del'>-			.swizzle = pci_std_swizzle,</div><div class='ctx'> 			.nr_controllers = 1,</div><div class='add'>+			.ops = &amp;cns3xxx_pcie_ops,</div><div class='ctx'> 			.setup = cns3xxx_pci_setup,</div><div class='del'>-			.scan = cns3xxx_pci_scan_bus,</div><div class='ctx'> 			.map_irq = cns3xxx_pcie_map_irq,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='head'>diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c<br/>index dc1afe5be20c..0031864e7f11 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-da830-evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/board-da830-evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-da830-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-da830-evm.c</a></div><div class='hunk'>@@ -681,6 +681,7 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")</div><div class='ctx'> 	.init_irq	= cp_intc_init,</div><div class='ctx'> 	.timer		= &amp;davinci_timer,</div><div class='ctx'> 	.init_machine	= da830_evm_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= da8xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c<br/>index a70de24d1cbc..0149fb453be3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-da850-evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/board-da850-evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-da850-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-da850-evm.c</a></div><div class='hunk'>@@ -284,7 +284,7 @@ static struct platform_device da850_evm_nandflash_device = {</div><div class='ctx'> 	.resource	= da850_evm_nandflash_resource,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct platform_device *da850_evm_devices[] __initdata = {</div><div class='add'>+static struct platform_device *da850_evm_devices[] = {</div><div class='ctx'> 	&amp;da850_evm_nandflash_device,</div><div class='ctx'> 	&amp;da850_evm_norflash_device,</div><div class='ctx'> };</div><div class='hunk'>@@ -1411,6 +1411,7 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")</div><div class='ctx'> 	.init_irq	= cp_intc_init,</div><div class='ctx'> 	.timer		= &amp;davinci_timer,</div><div class='ctx'> 	.init_machine	= da850_evm_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= da8xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c<br/>index 82ed753fb360..1c7b1f46a8f3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-dm355-evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/board-dm355-evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-dm355-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-dm355-evm.c</a></div><div class='hunk'>@@ -357,6 +357,7 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")</div><div class='ctx'> 	.init_irq     = davinci_irq_init,</div><div class='ctx'> 	.timer	      = &amp;davinci_timer,</div><div class='ctx'> 	.init_machine = dm355_evm_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= davinci_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c<br/>index d74a8b3445fb..8e7703213b08 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-dm355-leopard.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/board-dm355-leopard.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-dm355-leopard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-dm355-leopard.c</a></div><div class='hunk'>@@ -276,6 +276,7 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")</div><div class='ctx'> 	.init_irq     = davinci_irq_init,</div><div class='ctx'> 	.timer	      = &amp;davinci_timer,</div><div class='ctx'> 	.init_machine = dm355_leopard_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= davinci_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c<br/>index 5bce2b83bb4f..688a9c556dc9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-dm365-evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/board-dm365-evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-dm365-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-dm365-evm.c</a></div><div class='hunk'>@@ -618,6 +618,7 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")</div><div class='ctx'> 	.init_irq	= davinci_irq_init,</div><div class='ctx'> 	.timer		= &amp;davinci_timer,</div><div class='ctx'> 	.init_machine	= dm365_evm_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= davinci_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c<br/>index 3683306e0245..d34ed55912b2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-dm644x-evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/board-dm644x-evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-dm644x-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-dm644x-evm.c</a></div><div class='hunk'>@@ -825,6 +825,7 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")</div><div class='ctx'> 	.init_irq     = davinci_irq_init,</div><div class='ctx'> 	.timer	      = &amp;davinci_timer,</div><div class='ctx'> 	.init_machine = davinci_evm_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= davinci_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c<br/>index d72ab948d630..958679a20e13 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-dm646x-evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/board-dm646x-evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-dm646x-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-dm646x-evm.c</a></div><div class='hunk'>@@ -788,6 +788,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")</div><div class='ctx'> 	.init_irq     = davinci_irq_init,</div><div class='ctx'> 	.timer        = &amp;davinci_timer,</div><div class='ctx'> 	.init_machine = evm_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= davinci_restart,</div><div class='ctx'> MACHINE_END</div><div class='hunk'>@@ -798,6 +799,7 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")</div><div class='ctx'> 	.init_irq     = davinci_irq_init,</div><div class='ctx'> 	.timer        = &amp;davinci_timer,</div><div class='ctx'> 	.init_machine = evm_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= davinci_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c<br/>index 672d820e2aa4..beecde3a1d2f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-mityomapl138.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/board-mityomapl138.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-mityomapl138.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-mityomapl138.c</a></div><div class='hunk'>@@ -572,6 +572,7 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")</div><div class='ctx'> 	.init_irq	= cp_intc_init,</div><div class='ctx'> 	.timer		= &amp;davinci_timer,</div><div class='ctx'> 	.init_machine	= mityomapl138_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= da8xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c<br/>index a772bb45570a..5de69f2fcca9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-neuros-osd2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/board-neuros-osd2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-neuros-osd2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-neuros-osd2.c</a></div><div class='hunk'>@@ -278,6 +278,7 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")</div><div class='ctx'> 	.init_irq	= davinci_irq_init,</div><div class='ctx'> 	.timer		= &amp;davinci_timer,</div><div class='ctx'> 	.init_machine = davinci_ntosd2_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= davinci_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c<br/>index 45e815760a27..dc1208e9e664 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-omapl138-hawk.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/board-omapl138-hawk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-omapl138-hawk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-omapl138-hawk.c</a></div><div class='hunk'>@@ -343,6 +343,7 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")</div><div class='ctx'> 	.init_irq	= cp_intc_init,</div><div class='ctx'> 	.timer		= &amp;davinci_timer,</div><div class='ctx'> 	.init_machine	= omapl138_hawk_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= da8xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c<br/>index 76e675096104..9078acf94bac 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-sffsdr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/board-sffsdr.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-sffsdr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-sffsdr.c</a></div><div class='hunk'>@@ -157,6 +157,7 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR")</div><div class='ctx'> 	.init_irq     = davinci_irq_init,</div><div class='ctx'> 	.timer	      = &amp;davinci_timer,</div><div class='ctx'> 	.init_machine = davinci_sffsdr_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= davinci_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c<br/>index 5f14e30b00d8..ac4e003ad863 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-tnetv107x-evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/board-tnetv107x-evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/board-tnetv107x-evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/board-tnetv107x-evm.c</a></div><div class='hunk'>@@ -282,6 +282,7 @@ MACHINE_START(TNETV107X, "TNETV107X EVM")</div><div class='ctx'> 	.init_irq	= cp_intc_init,</div><div class='ctx'> 	.timer		= &amp;davinci_timer,</div><div class='ctx'> 	.init_machine	= tnetv107x_evm_board_init,</div><div class='add'>+	.init_late	= davinci_init_late,</div><div class='ctx'> 	.dma_zone_size	= SZ_128M,</div><div class='ctx'> 	.restart	= tnetv107x_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c<br/>index 008772e3b843..34668ead53c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/clock.c</a></div><div class='hunk'>@@ -213,7 +213,7 @@ EXPORT_SYMBOL(clk_unregister);</div><div class='ctx'> /*</div><div class='ctx'>  * Disable any unused clocks left on by the bootloader</div><div class='ctx'>  */</div><div class='del'>-static int __init clk_disable_unused(void)</div><div class='add'>+int __init davinci_clk_disable_unused(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk *ck;</div><div class='ctx'> </div><div class='hunk'>@@ -237,7 +237,6 @@ static int __init clk_disable_unused(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-late_initcall(clk_disable_unused);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static unsigned long clk_sysclk_recalc(struct clk *clk)</div><div class='head'>diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c<br/>index cb9b2e47510c..64b0f65a8639 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/common.c</a></div><div class='hunk'>@@ -117,3 +117,10 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)</div><div class='ctx'> err:</div><div class='ctx'> 	panic("davinci_common_init: SoC Initialization failed\n");</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __init davinci_init_late(void)</div><div class='add'>+{</div><div class='add'>+	davinci_cpufreq_init();</div><div class='add'>+	davinci_pm_init();</div><div class='add'>+	davinci_clk_disable_unused();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c<br/>index 031048fec9f5..4729eaab0f40 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/cpufreq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/cpufreq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/cpufreq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/cpufreq.c</a></div><div class='hunk'>@@ -240,10 +240,9 @@ static struct platform_driver davinci_cpufreq_driver = {</div><div class='ctx'> 	.remove = __exit_p(davinci_cpufreq_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init davinci_cpufreq_init(void)</div><div class='add'>+int __init davinci_cpufreq_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	return platform_driver_probe(&amp;davinci_cpufreq_driver,</div><div class='ctx'> 							davinci_cpufreq_probe);</div><div class='ctx'> }</div><div class='del'>-late_initcall(davinci_cpufreq_init);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h<br/>index 3e519dad5bb9..8db0fc6809dd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/davinci.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/davinci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/davinci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/davinci.h</a></div><div class='hunk'>@@ -72,7 +72,7 @@ void davinci_map_sysmod(void);</div><div class='ctx'> /* DM355 function declarations */</div><div class='ctx'> void __init dm355_init(void);</div><div class='ctx'> void dm355_init_spi0(unsigned chipselect_mask,</div><div class='del'>-		struct spi_board_info *info, unsigned len);</div><div class='add'>+		const struct spi_board_info *info, unsigned len);</div><div class='ctx'> void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata);</div><div class='ctx'> void dm355_set_vpfe_config(struct vpfe_config *cfg);</div><div class='ctx'> </div><div class='hunk'>@@ -83,7 +83,7 @@ void __init dm365_init_vc(struct snd_platform_data *pdata);</div><div class='ctx'> void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);</div><div class='ctx'> void __init dm365_init_rtc(void);</div><div class='ctx'> void dm365_init_spi0(unsigned chipselect_mask,</div><div class='del'>-			struct spi_board_info *info, unsigned len);</div><div class='add'>+			const struct spi_board_info *info, unsigned len);</div><div class='ctx'> void dm365_set_vpfe_config(struct vpfe_config *cfg);</div><div class='ctx'> </div><div class='ctx'> /* DM644x function declarations */</div><div class='head'>diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c<br/>index 42dbf3dc11ab..d1624a315c9a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/devices-da8xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/devices-da8xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/devices-da8xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/devices-da8xx.c</a></div><div class='hunk'>@@ -831,7 +831,7 @@ static struct platform_device da8xx_spi_device[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int __init da8xx_register_spi(int instance, struct spi_board_info *info,</div><div class='add'>+int __init da8xx_register_spi(int instance, const struct spi_board_info *info,</div><div class='ctx'> 			      unsigned len)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='head'>diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c<br/>index fd3d09aa6cde..678cd99b7336 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/dm355.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/dm355.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/dm355.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/dm355.c</a></div><div class='hunk'>@@ -424,7 +424,7 @@ static struct platform_device dm355_spi0_device = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void __init dm355_init_spi0(unsigned chipselect_mask,</div><div class='del'>-		struct spi_board_info *info, unsigned len)</div><div class='add'>+		const struct spi_board_info *info, unsigned len)</div><div class='ctx'> {</div><div class='ctx'> 	/* for now, assume we need MISO */</div><div class='ctx'> 	davinci_cfg_reg(DM355_SPI0_SDI);</div><div class='head'>diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c<br/>index 1a2e953082b3..a50d49de1883 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/dm365.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/dm365.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/dm365.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/dm365.c</a></div><div class='hunk'>@@ -676,7 +676,7 @@ static struct platform_device dm365_spi0_device = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void __init dm365_init_spi0(unsigned chipselect_mask,</div><div class='del'>-		struct spi_board_info *info, unsigned len)</div><div class='add'>+		const struct spi_board_info *info, unsigned len)</div><div class='ctx'> {</div><div class='ctx'> 	davinci_cfg_reg(DM365_SPI0_SCLK);</div><div class='ctx'> 	davinci_cfg_reg(DM365_SPI0_SDI);</div><div class='head'>diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c<br/>index fd33919c95d4..a685e9706b7b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/dma.c</a></div><div class='hunk'>@@ -353,9 +353,10 @@ static int irq2ctlr(int irq)</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> static irqreturn_t dma_irq_handler(int irq, void *data)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='ctx'> 	int ctlr;</div><div class='del'>-	unsigned int cnt = 0;</div><div class='add'>+	u32 sh_ier;</div><div class='add'>+	u32 sh_ipr;</div><div class='add'>+	u32 bank;</div><div class='ctx'> </div><div class='ctx'> 	ctlr = irq2ctlr(irq);</div><div class='ctx'> 	if (ctlr &lt; 0)</div><div class='hunk'>@@ -363,41 +364,39 @@ static irqreturn_t dma_irq_handler(int irq, void *data)</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(data, "dma_irq_handler\n");</div><div class='ctx'> </div><div class='del'>-	if ((edma_shadow0_read_array(ctlr, SH_IPR, 0) == 0) &amp;&amp;</div><div class='del'>-	    (edma_shadow0_read_array(ctlr, SH_IPR, 1) == 0))</div><div class='del'>-		return IRQ_NONE;</div><div class='add'>+	sh_ipr = edma_shadow0_read_array(ctlr, SH_IPR, 0);</div><div class='add'>+	if (!sh_ipr) {</div><div class='add'>+		sh_ipr = edma_shadow0_read_array(ctlr, SH_IPR, 1);</div><div class='add'>+		if (!sh_ipr)</div><div class='add'>+			return IRQ_NONE;</div><div class='add'>+		sh_ier = edma_shadow0_read_array(ctlr, SH_IER, 1);</div><div class='add'>+		bank = 1;</div><div class='add'>+	} else {</div><div class='add'>+		sh_ier = edma_shadow0_read_array(ctlr, SH_IER, 0);</div><div class='add'>+		bank = 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	while (1) {</div><div class='del'>-		int j;</div><div class='del'>-		if (edma_shadow0_read_array(ctlr, SH_IPR, 0) &amp;</div><div class='del'>-				edma_shadow0_read_array(ctlr, SH_IER, 0))</div><div class='del'>-			j = 0;</div><div class='del'>-		else if (edma_shadow0_read_array(ctlr, SH_IPR, 1) &amp;</div><div class='del'>-				edma_shadow0_read_array(ctlr, SH_IER, 1))</div><div class='del'>-			j = 1;</div><div class='del'>-		else</div><div class='del'>-			break;</div><div class='del'>-		dev_dbg(data, "IPR%d %08x\n", j,</div><div class='del'>-				edma_shadow0_read_array(ctlr, SH_IPR, j));</div><div class='del'>-		for (i = 0; i &lt; 32; i++) {</div><div class='del'>-			int k = (j &lt;&lt; 5) + i;</div><div class='del'>-			if ((edma_shadow0_read_array(ctlr, SH_IPR, j) &amp; BIT(i))</div><div class='del'>-					&amp;&amp; (edma_shadow0_read_array(ctlr,</div><div class='del'>-							SH_IER, j) &amp; BIT(i))) {</div><div class='del'>-				/* Clear the corresponding IPR bits */</div><div class='del'>-				edma_shadow0_write_array(ctlr, SH_ICR, j,</div><div class='del'>-							BIT(i));</div><div class='del'>-				if (edma_cc[ctlr]-&gt;intr_data[k].callback)</div><div class='del'>-					edma_cc[ctlr]-&gt;intr_data[k].callback(</div><div class='del'>-						k, DMA_COMPLETE,</div><div class='del'>-						edma_cc[ctlr]-&gt;intr_data[k].</div><div class='del'>-						data);</div><div class='del'>-			}</div><div class='add'>+	do {</div><div class='add'>+		u32 slot;</div><div class='add'>+		u32 channel;</div><div class='add'>+</div><div class='add'>+		dev_dbg(data, "IPR%d %08x\n", bank, sh_ipr);</div><div class='add'>+</div><div class='add'>+		slot = __ffs(sh_ipr);</div><div class='add'>+		sh_ipr &amp;= ~(BIT(slot));</div><div class='add'>+</div><div class='add'>+		if (sh_ier &amp; BIT(slot)) {</div><div class='add'>+			channel = (bank &lt;&lt; 5) | slot;</div><div class='add'>+			/* Clear the corresponding IPR bits */</div><div class='add'>+			edma_shadow0_write_array(ctlr, SH_ICR, bank,</div><div class='add'>+					BIT(slot));</div><div class='add'>+			if (edma_cc[ctlr]-&gt;intr_data[channel].callback)</div><div class='add'>+				edma_cc[ctlr]-&gt;intr_data[channel].callback(</div><div class='add'>+					channel, DMA_COMPLETE,</div><div class='add'>+					edma_cc[ctlr]-&gt;intr_data[channel].data);</div><div class='ctx'> 		}</div><div class='del'>-		cnt++;</div><div class='del'>-		if (cnt &gt; 10)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='add'>+	} while (sh_ipr);</div><div class='add'>+</div><div class='ctx'> 	edma_shadow0_write(ctlr, SH_IEVAL, 1);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -557,9 +556,9 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id,</div><div class='ctx'> 	if (i == edma_cc[ctlr]-&gt;num_slots)</div><div class='ctx'> 		stop_slot = i;</div><div class='ctx'> </div><div class='del'>-	for (j = start_slot; j &lt; stop_slot; j++)</div><div class='del'>-		if (test_bit(j, tmp_inuse))</div><div class='del'>-			clear_bit(j, edma_cc[ctlr]-&gt;edma_inuse);</div><div class='add'>+	j = start_slot;</div><div class='add'>+	for_each_set_bit_from(j, tmp_inuse, stop_slot)</div><div class='add'>+		clear_bit(j, edma_cc[ctlr]-&gt;edma_inuse);</div><div class='ctx'> </div><div class='ctx'> 	if (count)</div><div class='ctx'> 		return -EBUSY;</div><div class='head'>diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h<br/>index 5cd39a4e0c96..bdc4aa8e672a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/include/mach/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/common.h</a></div><div class='hunk'>@@ -84,6 +84,25 @@ extern struct davinci_soc_info davinci_soc_info;</div><div class='ctx'> extern void davinci_common_init(struct davinci_soc_info *soc_info);</div><div class='ctx'> extern void davinci_init_ide(void);</div><div class='ctx'> void davinci_restart(char mode, const char *cmd);</div><div class='add'>+void davinci_init_late(void);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DAVINCI_RESET_CLOCKS</div><div class='add'>+int davinci_clk_disable_unused(void);</div><div class='add'>+#else</div><div class='add'>+static inline int davinci_clk_disable_unused(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CPU_FREQ</div><div class='add'>+int davinci_cpufreq_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int davinci_cpufreq_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SUSPEND</div><div class='add'>+int davinci_pm_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int davinci_pm_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /* standard place to map on-chip SRAMs; they *may* support DMA */</div><div class='ctx'> #define SRAM_VIRT	0xfffe0000</div><div class='head'>diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h<br/>index ee3461d7ec1b..a2f1f274f189 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/da8xx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/include/mach/da8xx.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/da8xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/da8xx.h</a></div><div class='hunk'>@@ -76,7 +76,8 @@ void __init da850_init(void);</div><div class='ctx'> int da830_register_edma(struct edma_rsv_info *rsv);</div><div class='ctx'> int da850_register_edma(struct edma_rsv_info *rsv[2]);</div><div class='ctx'> int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);</div><div class='del'>-int da8xx_register_spi(int instance, struct spi_board_info *info, unsigned len);</div><div class='add'>+int da8xx_register_spi(int instance,</div><div class='add'>+		const struct spi_board_info *info, unsigned len);</div><div class='ctx'> int da8xx_register_watchdog(void);</div><div class='ctx'> int da8xx_register_usb20(unsigned mA, unsigned potpgt);</div><div class='ctx'> int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);</div><div class='head'>diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S<br/>index cf94552d5274..34290d14754b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/debug-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/include/mach/debug-macro.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/debug-macro.S</a></div><div class='hunk'>@@ -22,46 +22,28 @@</div><div class='ctx'> </div><div class='ctx'> #define UART_SHIFT	2</div><div class='ctx'> </div><div class='del'>-		.pushsection .data</div><div class='del'>-davinci_uart_phys:	.word	0</div><div class='del'>-davinci_uart_virt:	.word	0</div><div class='del'>-		.popsection</div><div class='del'>-</div><div class='del'>-		.macro addruart, rp, rv, tmp</div><div class='del'>-</div><div class='del'>-		/* Use davinci_uart_phys/virt if already configured */</div><div class='del'>-10:		adr	\rp, 99f		@ get effective addr of 99f</div><div class='del'>-		ldr	\rv, [\rp]		@ get absolute addr of 99f</div><div class='del'>-		sub	\rv, \rv, \rp		@ offset between the two</div><div class='del'>-		ldr	\rp, [\rp, #4]		@ abs addr of omap_uart_phys</div><div class='del'>-		sub	\tmp, \rp, \rv		@ make it effective</div><div class='del'>-		ldr	\rp, [\tmp, #0]		@ davinci_uart_phys</div><div class='del'>-		ldr	\rv, [\tmp, #4]		@ davinci_uart_virt</div><div class='del'>-		cmp	\rp, #0			@ is port configured?</div><div class='del'>-		cmpne	\rv, #0</div><div class='del'>-		bne	100f			@ already configured</div><div class='del'>-</div><div class='del'>-		/* Check the debug UART address set in uncompress.h */</div><div class='del'>-		and	\rp, pc, #0xff000000</div><div class='del'>-		ldr	\rv, =DAVINCI_UART_INFO_OFS</div><div class='del'>-		add	\rp, \rp, \rv</div><div class='del'>-</div><div class='del'>-		/* Copy uart phys address from decompressor uart info */</div><div class='del'>-		ldr	\rv, [\rp, #0]</div><div class='del'>-		str	\rv, [\tmp, #0]</div><div class='del'>-</div><div class='del'>-		/* Copy uart virt address from decompressor uart info */</div><div class='del'>-		ldr	\rv, [\rp, #4]</div><div class='del'>-		str	\rv, [\tmp, #4]</div><div class='del'>-</div><div class='del'>-		b	10b</div><div class='add'>+#if defined(CONFIG_DEBUG_DAVINCI_DMx_UART0)</div><div class='add'>+#define UART_BASE	DAVINCI_UART0_BASE</div><div class='add'>+#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART0)</div><div class='add'>+#define UART_BASE	DA8XX_UART0_BASE</div><div class='add'>+#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART1)</div><div class='add'>+#define UART_BASE	DA8XX_UART1_BASE</div><div class='add'>+#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART2)</div><div class='add'>+#define UART_BASE	DA8XX_UART2_BASE</div><div class='add'>+#elif defined(CONFIG_DEBUG_DAVINCI_TNETV107X_UART1)</div><div class='add'>+#define UART_BASE	TNETV107X_UART2_BASE</div><div class='add'>+#define UART_VIRTBASE	TNETV107X_UART2_VIRT</div><div class='add'>+#else</div><div class='add'>+#error "Select a specifc port for DEBUG_LL"</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-		.align</div><div class='del'>-99:		.word	.</div><div class='del'>-		.word	davinci_uart_phys</div><div class='del'>-		.ltorg</div><div class='add'>+#ifndef UART_VIRTBASE</div><div class='add'>+#define UART_VIRTBASE	IO_ADDRESS(UART_BASE)</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-100:</div><div class='add'>+		.macro addruart, rp, rv, tmp</div><div class='add'>+		ldr	\rp, =UART_BASE</div><div class='add'>+		ldr	\rv, =UART_VIRTBASE</div><div class='ctx'> 		.endm</div><div class='ctx'> </div><div class='ctx'> 		.macro	senduart,rd,rx</div><div class='head'>diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h<br/>index 2184691ebc2f..16bb42291d39 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/hardware.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/include/mach/hardware.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/hardware.h</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * I/O mapping</div><div class='ctx'>  */</div><div class='del'>-#define IO_PHYS				0x01c00000UL</div><div class='add'>+#define IO_PHYS				UL(0x01c00000)</div><div class='ctx'> #define IO_OFFSET			0xfd000000 /* Virtual IO = 0xfec00000 */</div><div class='ctx'> #define IO_SIZE				0x00400000</div><div class='ctx'> #define IO_VIRT				(IO_PHYS + IO_OFFSET)</div><div class='head'>diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h<br/>index 8bc3fc256171..405318e35bf6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/psc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/include/mach/psc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/psc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/psc.h</a></div><div class='hunk'>@@ -246,7 +246,7 @@</div><div class='ctx'> #define MDSTAT_STATE_MASK	0x3f</div><div class='ctx'> #define PDSTAT_STATE_MASK	0x1f</div><div class='ctx'> #define MDCTL_FORCE		BIT(31)</div><div class='del'>-#define PDCTL_NEXT		BIT(1)</div><div class='add'>+#define PDCTL_NEXT		BIT(0)</div><div class='ctx'> #define PDCTL_EPCGOOD		BIT(8)</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLER__</div><div class='head'>diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h<br/>index e347d88fef91..46b3cd11c3c2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/serial.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/include/mach/serial.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/serial.h</a></div><div class='hunk'>@@ -15,16 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Stolen area that contains debug uart physical and virtual addresses.  These</div><div class='del'>- * addresses are filled in by the uncompress.h code, and are used by the debug</div><div class='del'>- * macros in debug-macro.S.</div><div class='del'>- *</div><div class='del'>- * This area sits just below the page tables (see arch/arm/kernel/head.S).</div><div class='del'>- * We define it as a relative offset from start of usable RAM.</div><div class='del'>- */</div><div class='del'>-#define DAVINCI_UART_INFO_OFS	0x3ff8</div><div class='del'>-</div><div class='ctx'> #define DAVINCI_UART0_BASE	(IO_PHYS + 0x20000)</div><div class='ctx'> #define DAVINCI_UART1_BASE	(IO_PHYS + 0x20400)</div><div class='ctx'> #define DAVINCI_UART2_BASE	(IO_PHYS + 0x20800)</div><div class='head'>diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h<br/>index da2fb2c2155a..18cfd4977155 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/uncompress.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/include/mach/uncompress.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/include/mach/uncompress.h</a></div><div class='hunk'>@@ -43,37 +43,27 @@ static inline void flush(void)</div><div class='ctx'> 		barrier();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void set_uart_info(u32 phys, void * __iomem virt)</div><div class='add'>+static inline void set_uart_info(u32 phys)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * Get address of some.bss variable and round it down</div><div class='del'>-	 * a la CONFIG_AUTO_ZRELADDR.</div><div class='del'>-	 */</div><div class='del'>-	u32 ram_start = (u32)&amp;uart &amp; 0xf8000000;</div><div class='del'>-	u32 *uart_info = (u32 *)(ram_start + DAVINCI_UART_INFO_OFS);</div><div class='del'>-</div><div class='ctx'> 	uart = (u32 *)phys;</div><div class='del'>-	uart_info[0] = phys;</div><div class='del'>-	uart_info[1] = (u32)virt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define _DEBUG_LL_ENTRY(machine, phys, virt)			\</div><div class='del'>-	if (machine_is_##machine()) {				\</div><div class='del'>-		set_uart_info(phys, virt);			\</div><div class='del'>-		break;						\</div><div class='add'>+#define _DEBUG_LL_ENTRY(machine, phys)				\</div><div class='add'>+	{							\</div><div class='add'>+		if (machine_is_##machine()) {			\</div><div class='add'>+			set_uart_info(phys);			\</div><div class='add'>+			break;					\</div><div class='add'>+		}						\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_LL_DAVINCI(machine, port)				\</div><div class='del'>-	_DEBUG_LL_ENTRY(machine, DAVINCI_UART##port##_BASE,	\</div><div class='del'>-			IO_ADDRESS(DAVINCI_UART##port##_BASE))</div><div class='add'>+	_DEBUG_LL_ENTRY(machine, DAVINCI_UART##port##_BASE)</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_LL_DA8XX(machine, port)				\</div><div class='del'>-	_DEBUG_LL_ENTRY(machine, DA8XX_UART##port##_BASE,	\</div><div class='del'>-			IO_ADDRESS(DA8XX_UART##port##_BASE))</div><div class='add'>+	_DEBUG_LL_ENTRY(machine, DA8XX_UART##port##_BASE)</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_LL_TNETV107X(machine, port)			\</div><div class='del'>-	_DEBUG_LL_ENTRY(machine, TNETV107X_UART##port##_BASE,	\</div><div class='del'>-			TNETV107X_UART##port##_VIRT)</div><div class='add'>+	_DEBUG_LL_ENTRY(machine, TNETV107X_UART##port##_BASE)</div><div class='ctx'> </div><div class='ctx'> static inline void __arch_decomp_setup(unsigned long arch_id)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm/mach-davinci/pm.c b/arch/arm/mach-davinci/pm.c<br/>index 04c49f7543ef..eb8360b33aa9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-davinci/pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-davinci/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-davinci/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-davinci/pm.c</a></div><div class='hunk'>@@ -152,8 +152,7 @@ static struct platform_driver davinci_pm_driver = {</div><div class='ctx'> 	.remove = __exit_p(davinci_pm_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init davinci_pm_init(void)</div><div class='add'>+int __init davinci_pm_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	return platform_driver_probe(&amp;davinci_pm_driver, davinci_pm_probe);</div><div class='ctx'> }</div><div class='del'>-late_initcall(davinci_pm_init);</div><div class='head'>diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c<br/>index bda7aca04ca0..9493076fc594 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-dove/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-dove/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-dove/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-dove/common.c</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='ctx'> #include &lt;linux/ata_platform.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='hunk'>@@ -68,6 +68,19 @@ void __init dove_map_io(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='add'>+ * CLK tree</div><div class='add'>+ ****************************************************************************/</div><div class='add'>+static struct clk *tclk;</div><div class='add'>+</div><div class='add'>+static void __init clk_init(void)</div><div class='add'>+{</div><div class='add'>+	tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,</div><div class='add'>+				       get_tclk());</div><div class='add'>+</div><div class='add'>+	orion_clkdev_init(tclk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*****************************************************************************</div><div class='ctx'>  * EHCI0</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init dove_ehci0_init(void)</div><div class='hunk'>@@ -89,8 +102,7 @@ void __init dove_ehci1_init(void)</div><div class='ctx'> void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)</div><div class='ctx'> {</div><div class='ctx'> 	orion_ge00_init(eth_data,</div><div class='del'>-			DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,</div><div class='del'>-			0, get_tclk());</div><div class='add'>+			DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -116,7 +128,7 @@ void __init dove_sata_init(struct mv_sata_platform_data *sata_data)</div><div class='ctx'> void __init dove_uart0_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,</div><div class='del'>-			 IRQ_DOVE_UART_0, get_tclk());</div><div class='add'>+			 IRQ_DOVE_UART_0, tclk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -125,7 +137,7 @@ void __init dove_uart0_init(void)</div><div class='ctx'> void __init dove_uart1_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,</div><div class='del'>-			 IRQ_DOVE_UART_1, get_tclk());</div><div class='add'>+			 IRQ_DOVE_UART_1, tclk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -134,7 +146,7 @@ void __init dove_uart1_init(void)</div><div class='ctx'> void __init dove_uart2_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,</div><div class='del'>-			 IRQ_DOVE_UART_2, get_tclk());</div><div class='add'>+			 IRQ_DOVE_UART_2, tclk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -143,7 +155,7 @@ void __init dove_uart2_init(void)</div><div class='ctx'> void __init dove_uart3_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,</div><div class='del'>-			 IRQ_DOVE_UART_3, get_tclk());</div><div class='add'>+			 IRQ_DOVE_UART_3, tclk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -151,12 +163,12 @@ void __init dove_uart3_init(void)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init dove_spi0_init(void)</div><div class='ctx'> {</div><div class='del'>-	orion_spi_init(DOVE_SPI0_PHYS_BASE, get_tclk());</div><div class='add'>+	orion_spi_init(DOVE_SPI0_PHYS_BASE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init dove_spi1_init(void)</div><div class='ctx'> {</div><div class='del'>-	orion_spi_1_init(DOVE_SPI1_PHYS_BASE, get_tclk());</div><div class='add'>+	orion_spi_1_init(DOVE_SPI1_PHYS_BASE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -181,7 +193,7 @@ static int get_tclk(void)</div><div class='ctx'> 	return 166666667;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dove_timer_init(void)</div><div class='add'>+static void __init dove_timer_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,</div><div class='ctx'> 			IRQ_DOVE_BRIDGE, get_tclk());</div><div class='hunk'>@@ -272,18 +284,17 @@ void __init dove_sdio1_init(void)</div><div class='ctx'> </div><div class='ctx'> void __init dove_init(void)</div><div class='ctx'> {</div><div class='del'>-	int tclk;</div><div class='del'>-</div><div class='del'>-	tclk = get_tclk();</div><div class='del'>-</div><div class='ctx'> 	printk(KERN_INFO "Dove 88AP510 SoC, ");</div><div class='del'>-	printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000);</div><div class='add'>+	printk(KERN_INFO "TCLK = %dMHz\n", (get_tclk() + 499999) / 1000000);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CACHE_TAUROS2</div><div class='ctx'> 	tauros2_init();</div><div class='ctx'> #endif</div><div class='ctx'> 	dove_setup_cpu_mbus();</div><div class='ctx'> </div><div class='add'>+	/* Setup root of clk tree */</div><div class='add'>+	clk_init();</div><div class='add'>+</div><div class='ctx'> 	/* internal devices that every board has */</div><div class='ctx'> 	dove_rtc_init();</div><div class='ctx'> 	dove_xor0_init();</div><div class='head'>diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c<br/>index ea77ae430b2d..bc2867f11346 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-dove/dove-db-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-dove/dove-db-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-dove/dove-db-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-dove/dove-db-setup.c</a></div><div class='hunk'>@@ -20,7 +20,6 @@</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='del'>-#include &lt;linux/spi/orion_spi.h&gt;</div><div class='ctx'> #include &lt;linux/spi/flash.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='head'>diff --git a/arch/arm/mach-dove/mpp.c b/arch/arm/mach-dove/mpp.c<br/>index 51e0e411c9cb..7f70afc26f91 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-dove/mpp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-dove/mpp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-dove/mpp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-dove/mpp.c</a></div><div class='hunk'>@@ -56,7 +56,7 @@ static void dove_mpp_gpio_mode(int start, int end, int gpio_mode)</div><div class='ctx'> </div><div class='ctx'> /* Dump all the extra MPP registers. The platform code will dump the</div><div class='ctx'>    registers for pins 0-23. */</div><div class='del'>-static void dove_mpp_dump_regs(void)</div><div class='add'>+static void __init dove_mpp_dump_regs(void)</div><div class='ctx'> {</div><div class='ctx'> 	pr_debug("PMU_CTRL4_CTRL: %08x\n",</div><div class='ctx'> 		 readl(DOVE_MPP_CTRL4_VIRT_BASE));</div><div class='hunk'>@@ -67,7 +67,7 @@ static void dove_mpp_dump_regs(void)</div><div class='ctx'> 	pr_debug("MPP_GENERAL: %08x\n", readl(DOVE_MPP_GENERAL_VIRT_BASE));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dove_mpp_cfg_nfc(int sel)</div><div class='add'>+static void __init dove_mpp_cfg_nfc(int sel)</div><div class='ctx'> {</div><div class='ctx'> 	u32 mpp_gen_cfg = readl(DOVE_MPP_GENERAL_VIRT_BASE);</div><div class='ctx'> </div><div class='hunk'>@@ -78,7 +78,7 @@ static void dove_mpp_cfg_nfc(int sel)</div><div class='ctx'> 	dove_mpp_gpio_mode(64, 71, GPIO_OUTPUT_OK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dove_mpp_cfg_au1(int sel)</div><div class='add'>+static void __init dove_mpp_cfg_au1(int sel)</div><div class='ctx'> {</div><div class='ctx'> 	u32 mpp_ctrl4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);</div><div class='ctx'> 	u32 ssp_ctrl1 = readl(DOVE_SSP_CTRL_STATUS_1);</div><div class='hunk'>@@ -118,7 +118,7 @@ static void dove_mpp_cfg_au1(int sel)</div><div class='ctx'> </div><div class='ctx'> /* Configure the group registers, enabling GPIO if sel indicates the</div><div class='ctx'>    pin is to be used for GPIO */</div><div class='del'>-static void dove_mpp_conf_grp(unsigned int *mpp_grp_list)</div><div class='add'>+static void __init dove_mpp_conf_grp(unsigned int *mpp_grp_list)</div><div class='ctx'> {</div><div class='ctx'> 	u32 mpp_ctrl4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);</div><div class='ctx'> 	int gpio_mode;</div><div class='head'>diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c<br/>index 48a032005ea3..47921b0cdc65 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-dove/pcie.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-dove/pcie.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-dove/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-dove/pcie.c</a></div><div class='hunk'>@@ -43,6 +43,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	pp = &amp;pcie_port[nr];</div><div class='add'>+	sys-&gt;private_data = pp;</div><div class='ctx'> 	pp-&gt;root_bus_nr = sys-&gt;busnr;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -93,19 +94,6 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct pcie_port *bus_to_port(int bus)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = num_pcie_ports - 1; i &gt;= 0; i--) {</div><div class='del'>-		int rbus = pcie_port[i].root_bus_nr;</div><div class='del'>-		if (rbus != -1 &amp;&amp; rbus &lt;= bus)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return i &gt;= 0 ? pcie_port + i : NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -121,7 +109,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)</div><div class='ctx'> static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,</div><div class='ctx'> 			int size, u32 *val)</div><div class='ctx'> {</div><div class='del'>-	struct pcie_port *pp = bus_to_port(bus-&gt;number);</div><div class='add'>+	struct pci_sys_data *sys = bus-&gt;sysdata;</div><div class='add'>+	struct pcie_port *pp = sys-&gt;private_data;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -140,7 +129,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,</div><div class='ctx'> static int pcie_wr_conf(struct pci_bus *bus, u32 devfn,</div><div class='ctx'> 			int where, int size, u32 val)</div><div class='ctx'> {</div><div class='del'>-	struct pcie_port *pp = bus_to_port(bus-&gt;number);</div><div class='add'>+	struct pci_sys_data *sys = bus-&gt;sysdata;</div><div class='add'>+	struct pcie_port *pp = sys-&gt;private_data;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -194,14 +184,14 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)</div><div class='ctx'> </div><div class='ctx'> static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> {</div><div class='del'>-	struct pcie_port *pp = bus_to_port(dev-&gt;bus-&gt;number);</div><div class='add'>+	struct pci_sys_data *sys = dev-&gt;sysdata;</div><div class='add'>+	struct pcie_port *pp = sys-&gt;private_data;</div><div class='ctx'> </div><div class='ctx'> 	return pp-&gt;index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci dove_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 2,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= dove_pcie_setup,</div><div class='ctx'> 	.scan		= dove_pcie_scan_bus,</div><div class='ctx'> 	.map_irq	= dove_pcie_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig<br/>index 97a249395b5a..fe3c1fa5462b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ep93xx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/Kconfig</a></div><div class='hunk'>@@ -2,6 +2,11 @@ if ARCH_EP93XX</div><div class='ctx'> </div><div class='ctx'> menu "Cirrus EP93xx Implementation Options"</div><div class='ctx'> </div><div class='add'>+config EP93XX_SOC_COMMON</div><div class='add'>+	bool</div><div class='add'>+	default y</div><div class='add'>+	select LEDS_GPIO_REGISTER</div><div class='add'>+</div><div class='ctx'> config CRUNCH</div><div class='ctx'> 	bool "Support for MaverickCrunch"</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c<br/>index 2d45947a3034..a472777e9eba 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/adssphere.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ep93xx/adssphere.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/adssphere.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/adssphere.c</a></div><div class='hunk'>@@ -41,5 +41,6 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= adssphere_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c<br/>index 8d2589588713..4dd07a0e3604 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ep93xx/core.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/core.c</a></div><div class='hunk'>@@ -241,11 +241,7 @@ unsigned int ep93xx_chip_revision(void)</div><div class='ctx'>  * EP93xx GPIO</div><div class='ctx'>  *************************************************************************/</div><div class='ctx'> static struct resource ep93xx_gpio_resource[] = {</div><div class='del'>-	{</div><div class='del'>-		.start		= EP93XX_GPIO_PHYS_BASE,</div><div class='del'>-		.end		= EP93XX_GPIO_PHYS_BASE + 0xcc - 1,</div><div class='del'>-		.flags		= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='add'>+	DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device ep93xx_gpio_device = {</div><div class='hunk'>@@ -288,11 +284,7 @@ static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,</div><div class='ctx'> 	{ IRQ_EP93XX_UART3 }, &amp;ep93xx_uart_data);</div><div class='ctx'> </div><div class='ctx'> static struct resource ep93xx_rtc_resource[] = {</div><div class='del'>-	{</div><div class='del'>-		.start		= EP93XX_RTC_PHYS_BASE,</div><div class='del'>-		.end		= EP93XX_RTC_PHYS_BASE + 0x10c - 1,</div><div class='del'>-		.flags		= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='add'>+	DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device ep93xx_rtc_device = {</div><div class='hunk'>@@ -304,16 +296,8 @@ static struct platform_device ep93xx_rtc_device = {</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static struct resource ep93xx_ohci_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EP93XX_USB_PHYS_BASE,</div><div class='del'>-		.end	= EP93XX_USB_PHYS_BASE + 0x0fff,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_EP93XX_USB,</div><div class='del'>-		.end	= IRQ_EP93XX_USB,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),</div><div class='add'>+	DEFINE_RES_IRQ(IRQ_EP93XX_USB),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -372,15 +356,8 @@ void __init ep93xx_register_flash(unsigned int width,</div><div class='ctx'> static struct ep93xx_eth_data ep93xx_eth_data;</div><div class='ctx'> </div><div class='ctx'> static struct resource ep93xx_eth_resource[] = {</div><div class='del'>-	{</div><div class='del'>-		.start	= EP93XX_ETHERNET_PHYS_BASE,</div><div class='del'>-		.end	= EP93XX_ETHERNET_PHYS_BASE + 0xffff,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	}, {</div><div class='del'>-		.start	= IRQ_EP93XX_ETHERNET,</div><div class='del'>-		.end	= IRQ_EP93XX_ETHERNET,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	}</div><div class='add'>+	DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),</div><div class='add'>+	DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);</div><div class='hunk'>@@ -461,16 +438,8 @@ void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,</div><div class='ctx'> static struct ep93xx_spi_info ep93xx_spi_master_data;</div><div class='ctx'> </div><div class='ctx'> static struct resource ep93xx_spi_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.start	= EP93XX_SPI_PHYS_BASE,</div><div class='del'>-		.end	= EP93XX_SPI_PHYS_BASE + 0x18 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.start	= IRQ_EP93XX_SSP,</div><div class='del'>-		.end	= IRQ_EP93XX_SSP,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),</div><div class='add'>+	DEFINE_RES_IRQ(IRQ_EP93XX_SSP),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);</div><div class='hunk'>@@ -513,7 +482,7 @@ void __init ep93xx_register_spi(struct ep93xx_spi_info *info,</div><div class='ctx'> /*************************************************************************</div><div class='ctx'>  * EP93xx LEDs</div><div class='ctx'>  *************************************************************************/</div><div class='del'>-static struct gpio_led ep93xx_led_pins[] = {</div><div class='add'>+static const struct gpio_led ep93xx_led_pins[] __initconst = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name	= "platform:grled",</div><div class='ctx'> 		.gpio	= EP93XX_GPIO_LINE_GRLED,</div><div class='hunk'>@@ -523,29 +492,16 @@ static struct gpio_led ep93xx_led_pins[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct gpio_led_platform_data ep93xx_led_data = {</div><div class='add'>+static const struct gpio_led_platform_data ep93xx_led_data __initconst = {</div><div class='ctx'> 	.num_leds	= ARRAY_SIZE(ep93xx_led_pins),</div><div class='ctx'> 	.leds		= ep93xx_led_pins,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct platform_device ep93xx_leds = {</div><div class='del'>-	.name		= "leds-gpio",</div><div class='del'>-	.id		= -1,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data	= &amp;ep93xx_led_data,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /*************************************************************************</div><div class='ctx'>  * EP93xx pwm peripheral handling</div><div class='ctx'>  *************************************************************************/</div><div class='ctx'> static struct resource ep93xx_pwm0_resource[] = {</div><div class='del'>-	{</div><div class='del'>-		.start	= EP93XX_PWM_PHYS_BASE,</div><div class='del'>-		.end	= EP93XX_PWM_PHYS_BASE + 0x10 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='add'>+	DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device ep93xx_pwm0_device = {</div><div class='hunk'>@@ -556,11 +512,7 @@ static struct platform_device ep93xx_pwm0_device = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource ep93xx_pwm1_resource[] = {</div><div class='del'>-	{</div><div class='del'>-		.start	= EP93XX_PWM_PHYS_BASE + 0x20,</div><div class='del'>-		.end	= EP93XX_PWM_PHYS_BASE + 0x30 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='add'>+	DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device ep93xx_pwm1_device = {</div><div class='hunk'>@@ -628,11 +580,7 @@ EXPORT_SYMBOL(ep93xx_pwm_release_gpio);</div><div class='ctx'> static struct ep93xxfb_mach_info ep93xxfb_data;</div><div class='ctx'> </div><div class='ctx'> static struct resource ep93xx_fb_resource[] = {</div><div class='del'>-	{</div><div class='del'>-		.start		= EP93XX_RASTER_PHYS_BASE,</div><div class='del'>-		.end		= EP93XX_RASTER_PHYS_BASE + 0x800 - 1,</div><div class='del'>-		.flags		= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='add'>+	DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device ep93xx_fb_device = {</div><div class='hunk'>@@ -680,15 +628,8 @@ void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)</div><div class='ctx'> static struct ep93xx_keypad_platform_data ep93xx_keypad_data;</div><div class='ctx'> </div><div class='ctx'> static struct resource ep93xx_keypad_resource[] = {</div><div class='del'>-	{</div><div class='del'>-		.start	= EP93XX_KEY_MATRIX_PHYS_BASE,</div><div class='del'>-		.end	= EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	}, {</div><div class='del'>-		.start	= IRQ_EP93XX_KEY,</div><div class='del'>-		.end	= IRQ_EP93XX_KEY,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),</div><div class='add'>+	DEFINE_RES_IRQ(IRQ_EP93XX_KEY),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device ep93xx_keypad_device = {</div><div class='hunk'>@@ -734,7 +675,7 @@ int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)</div><div class='ctx'> fail_gpio_d:</div><div class='ctx'> 	gpio_free(EP93XX_GPIO_LINE_C(i));</div><div class='ctx'> fail_gpio_c:</div><div class='del'>-	for ( ; i &gt;= 0; --i) {</div><div class='add'>+	for (--i; i &gt;= 0; --i) {</div><div class='ctx'> 		gpio_free(EP93XX_GPIO_LINE_C(i));</div><div class='ctx'> 		gpio_free(EP93XX_GPIO_LINE_D(i));</div><div class='ctx'> 	}</div><div class='hunk'>@@ -761,11 +702,7 @@ EXPORT_SYMBOL(ep93xx_keypad_release_gpio);</div><div class='ctx'>  * EP93xx I2S audio peripheral handling</div><div class='ctx'>  *************************************************************************/</div><div class='ctx'> static struct resource ep93xx_i2s_resource[] = {</div><div class='del'>-	{</div><div class='del'>-		.start	= EP93XX_I2S_PHYS_BASE,</div><div class='del'>-		.end	= EP93XX_I2S_PHYS_BASE + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='add'>+	DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device ep93xx_i2s_device = {</div><div class='hunk'>@@ -824,16 +761,8 @@ EXPORT_SYMBOL(ep93xx_i2s_release);</div><div class='ctx'>  * EP93xx AC97 audio peripheral handling</div><div class='ctx'>  *************************************************************************/</div><div class='ctx'> static struct resource ep93xx_ac97_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.start	= EP93XX_AAC_PHYS_BASE,</div><div class='del'>-		.end	= EP93XX_AAC_PHYS_BASE + 0xac - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.start	= IRQ_EP93XX_AACINTR,</div><div class='del'>-		.end	= IRQ_EP93XX_AACINTR,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),</div><div class='add'>+	DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device ep93xx_ac97_device = {</div><div class='hunk'>@@ -889,8 +818,9 @@ void __init ep93xx_init_devices(void)</div><div class='ctx'> </div><div class='ctx'> 	platform_device_register(&amp;ep93xx_rtc_device);</div><div class='ctx'> 	platform_device_register(&amp;ep93xx_ohci_device);</div><div class='del'>-	platform_device_register(&amp;ep93xx_leds);</div><div class='ctx'> 	platform_device_register(&amp;ep93xx_wdt_device);</div><div class='add'>+</div><div class='add'>+	gpio_led_register_device(-1, &amp;ep93xx_led_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ep93xx_restart(char mode, const char *cmd)</div><div class='hunk'>@@ -904,3 +834,8 @@ void ep93xx_restart(char mode, const char *cmd)</div><div class='ctx'> 	while (1)</div><div class='ctx'> 		;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __init ep93xx_init_late(void)</div><div class='add'>+{</div><div class='add'>+	crunch_init();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/crunch.c b/arch/arm/mach-ep93xx/crunch.c<br/>index 74753e2df603..a4a2ab9648c9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/crunch.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ep93xx/crunch.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/crunch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/crunch.c</a></div><div class='hunk'>@@ -79,12 +79,10 @@ static struct notifier_block crunch_notifier_block = {</div><div class='ctx'> 	.notifier_call	= crunch_do,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init crunch_init(void)</div><div class='add'>+int __init crunch_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	thread_register_notifier(&amp;crunch_notifier_block);</div><div class='ctx'> 	elf_hwcap |= HWCAP_CRUNCH;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-late_initcall(crunch_init);</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c<br/>index da9047d726f0..d74c5cddb98b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/edb93xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ep93xx/edb93xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/edb93xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/edb93xx.c</a></div><div class='hunk'>@@ -255,6 +255,7 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= edb93xx_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='hunk'>@@ -268,6 +269,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= edb93xx_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='hunk'>@@ -281,6 +283,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= edb93xx_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='hunk'>@@ -294,6 +297,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= edb93xx_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='hunk'>@@ -307,6 +311,7 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= edb93xx_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='hunk'>@@ -320,6 +325,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= edb93xx_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='hunk'>@@ -333,6 +339,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= edb93xx_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='hunk'>@@ -346,6 +353,7 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= edb93xx_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c<br/>index fcdffbe49dcc..437c34111155 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/gesbc9312.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ep93xx/gesbc9312.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/gesbc9312.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/gesbc9312.c</a></div><div class='hunk'>@@ -41,5 +41,6 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= gesbc9312_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h<br/>index 602bd87fd0ab..1ecb040d98bf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/include/mach/platform.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ep93xx/include/mach/platform.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/include/mach/platform.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/include/mach/platform.h</a></div><div class='hunk'>@@ -53,5 +53,12 @@ void ep93xx_init_devices(void);</div><div class='ctx'> extern struct sys_timer ep93xx_timer;</div><div class='ctx'> </div><div class='ctx'> void ep93xx_restart(char, const char *);</div><div class='add'>+void ep93xx_init_late(void);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CRUNCH</div><div class='add'>+int crunch_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int crunch_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c<br/>index dc431c5f04ce..3d7cdab725b2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/micro9.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ep93xx/micro9.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/micro9.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/micro9.c</a></div><div class='hunk'>@@ -85,6 +85,7 @@ MACHINE_START(MICRO9, "Contec Micro9-High")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= micro9_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='hunk'>@@ -98,6 +99,7 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= micro9_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='hunk'>@@ -111,6 +113,7 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= micro9_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='hunk'>@@ -124,6 +127,7 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= micro9_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c<br/>index f40c2987e545..33dc07917417 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/simone.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ep93xx/simone.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/simone.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/simone.c</a></div><div class='hunk'>@@ -86,5 +86,6 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= simone_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c<br/>index 0c00852ef160..01abd3516a77 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/snappercl15.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ep93xx/snappercl15.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/snappercl15.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/snappercl15.c</a></div><div class='hunk'>@@ -82,8 +82,6 @@ static int snappercl15_nand_dev_ready(struct mtd_info *mtd)</div><div class='ctx'> 	return !!(__raw_readw(NAND_CTRL_ADDR(chip)) &amp; SNAPPERCL15_NAND_RDY);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char *snappercl15_nand_part_probes[] = {"cmdlinepart", NULL};</div><div class='del'>-</div><div class='ctx'> static struct mtd_partition snappercl15_nand_parts[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name		= "Kernel",</div><div class='hunk'>@@ -100,10 +98,8 @@ static struct mtd_partition snappercl15_nand_parts[] = {</div><div class='ctx'> static struct platform_nand_data snappercl15_nand_data = {</div><div class='ctx'> 	.chip = {</div><div class='ctx'> 		.nr_chips		= 1,</div><div class='del'>-		.part_probe_types	= snappercl15_nand_part_probes,</div><div class='ctx'> 		.partitions		= snappercl15_nand_parts,</div><div class='ctx'> 		.nr_partitions		= ARRAY_SIZE(snappercl15_nand_parts),</div><div class='del'>-		.options		= NAND_NO_AUTOINCR,</div><div class='ctx'> 		.chip_delay		= 25,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl = {</div><div class='hunk'>@@ -183,5 +179,6 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer 		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= snappercl15_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c<br/>index 5ea790942e94..75cab2d7ec73 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/ts72xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ep93xx/ts72xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/ts72xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/ts72xx.c</a></div><div class='hunk'>@@ -105,8 +105,6 @@ static int ts72xx_nand_device_ready(struct mtd_info *mtd)</div><div class='ctx'> 	return !!(__raw_readb(addr) &amp; 0x20);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char *ts72xx_nand_part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> #define TS72XX_BOOTROM_PART_SIZE	(SZ_16K)</div><div class='ctx'> #define TS72XX_REDBOOT_PART_SIZE	(SZ_2M + SZ_1M)</div><div class='ctx'> </div><div class='hunk'>@@ -134,7 +132,6 @@ static struct platform_nand_data ts72xx_nand_data = {</div><div class='ctx'> 		.nr_chips	= 1,</div><div class='ctx'> 		.chip_offset	= 0,</div><div class='ctx'> 		.chip_delay	= 15,</div><div class='del'>-		.part_probe_types = ts72xx_nand_part_probes,</div><div class='ctx'> 		.partitions	= ts72xx_nand_parts,</div><div class='ctx'> 		.nr_partitions	= ARRAY_SIZE(ts72xx_nand_parts),</div><div class='ctx'> 	},</div><div class='hunk'>@@ -252,5 +249,6 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= ts72xx_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c<br/>index ba156eb225e8..2905a4929bdc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/vision_ep9307.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ep93xx/vision_ep9307.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ep93xx/vision_ep9307.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ep93xx/vision_ep9307.c</a></div><div class='hunk'>@@ -367,5 +367,6 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ep93xx_timer,</div><div class='ctx'> 	.init_machine	= vision_init_machine,</div><div class='add'>+	.init_late	= ep93xx_init_late,</div><div class='ctx'> 	.restart	= ep93xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig<br/>index e81c35f936b5..573be57d3d28 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/Kconfig</a></div><div class='hunk'>@@ -61,6 +61,9 @@ config SOC_EXYNOS5250</div><div class='ctx'> 	bool "SAMSUNG EXYNOS5250"</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on ARCH_EXYNOS5</div><div class='add'>+	select SAMSUNG_DMADEV</div><div class='add'>+	select S5P_PM if PM</div><div class='add'>+	select S5P_SLEEP if PM</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enable EXYNOS5250 SoC support</div><div class='ctx'> </div><div class='hunk'>@@ -70,7 +73,7 @@ config EXYNOS4_MCT</div><div class='ctx'> 	help</div><div class='ctx'> 	  Use MCT (Multi Core Timer) as kernel timers</div><div class='ctx'> </div><div class='del'>-config EXYNOS4_DEV_DMA</div><div class='add'>+config EXYNOS_DEV_DMA</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='ctx'> 	  Compile in amba device definitions for DMA controller</div><div class='hunk'>@@ -80,15 +83,20 @@ config EXYNOS4_DEV_AHCI</div><div class='ctx'> 	help</div><div class='ctx'> 	  Compile in platform device definitions for AHCI</div><div class='ctx'> </div><div class='add'>+config EXYNOS_DEV_DRM</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definitions for core DRM device</div><div class='add'>+</div><div class='ctx'> config EXYNOS4_SETUP_FIMD0</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='ctx'> 	  Common setup code for FIMD0.</div><div class='ctx'> </div><div class='del'>-config EXYNOS4_DEV_SYSMMU</div><div class='add'>+config EXYNOS_DEV_SYSMMU</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='del'>-	  Common setup code for SYSTEM MMU in EXYNOS4</div><div class='add'>+	  Common setup code for SYSTEM MMU in EXYNOS platforms</div><div class='ctx'> </div><div class='ctx'> config EXYNOS4_DEV_DWMCI</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -161,7 +169,7 @@ config EXYNOS4_SETUP_USB_PHY</div><div class='ctx'> 	help</div><div class='ctx'> 	  Common setup code for USB PHY controller</div><div class='ctx'> </div><div class='del'>-config EXYNOS4_SETUP_SPI</div><div class='add'>+config EXYNOS_SETUP_SPI</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='ctx'> 	  Common setup code for SPI GPIO configurations.</div><div class='hunk'>@@ -200,12 +208,13 @@ config MACH_SMDKV310</div><div class='ctx'> 	select S3C_DEV_HSMMC2</div><div class='ctx'> 	select S3C_DEV_HSMMC3</div><div class='ctx'> 	select SAMSUNG_DEV_BACKLIGHT</div><div class='add'>+	select EXYNOS_DEV_DRM</div><div class='add'>+	select EXYNOS_DEV_SYSMMU</div><div class='ctx'> 	select EXYNOS4_DEV_AHCI</div><div class='ctx'> 	select SAMSUNG_DEV_KEYPAD</div><div class='ctx'> 	select EXYNOS4_DEV_DMA</div><div class='ctx'> 	select SAMSUNG_DEV_PWM</div><div class='ctx'> 	select EXYNOS4_DEV_USB_OHCI</div><div class='del'>-	select EXYNOS4_DEV_SYSMMU</div><div class='ctx'> 	select EXYNOS4_SETUP_FIMD0</div><div class='ctx'> 	select EXYNOS4_SETUP_I2C1</div><div class='ctx'> 	select EXYNOS4_SETUP_KEYPAD</div><div class='hunk'>@@ -223,8 +232,7 @@ config MACH_ARMLEX4210</div><div class='ctx'> 	select S3C_DEV_HSMMC2</div><div class='ctx'> 	select S3C_DEV_HSMMC3</div><div class='ctx'> 	select EXYNOS4_DEV_AHCI</div><div class='del'>-	select EXYNOS4_DEV_DMA</div><div class='del'>-	select EXYNOS4_DEV_SYSMMU</div><div class='add'>+	select EXYNOS_DEV_DMA</div><div class='ctx'> 	select EXYNOS4_SETUP_SDHCI</div><div class='ctx'> 	help</div><div class='ctx'> 	  Machine support for Samsung ARMLEX4210 based on EXYNOS4210</div><div class='hunk'>@@ -232,6 +240,9 @@ config MACH_ARMLEX4210</div><div class='ctx'> config MACH_UNIVERSAL_C210</div><div class='ctx'> 	bool "Mobile UNIVERSAL_C210 Board"</div><div class='ctx'> 	select CPU_EXYNOS4210</div><div class='add'>+	select S5P_HRT</div><div class='add'>+	select CLKSRC_MMIO</div><div class='add'>+	select HAVE_SCHED_CLOCK</div><div class='ctx'> 	select S5P_GPIO_INT</div><div class='ctx'> 	select S5P_DEV_FIMC0</div><div class='ctx'> 	select S5P_DEV_FIMC1</div><div class='hunk'>@@ -247,11 +258,14 @@ config MACH_UNIVERSAL_C210</div><div class='ctx'> 	select S3C_DEV_I2C1</div><div class='ctx'> 	select S3C_DEV_I2C3</div><div class='ctx'> 	select S3C_DEV_I2C5</div><div class='add'>+	select S3C_DEV_USB_HSOTG</div><div class='ctx'> 	select S5P_DEV_I2C_HDMIPHY</div><div class='ctx'> 	select S5P_DEV_MFC</div><div class='ctx'> 	select S5P_DEV_ONENAND</div><div class='ctx'> 	select S5P_DEV_TV</div><div class='add'>+	select EXYNOS_DEV_SYSMMU</div><div class='ctx'> 	select EXYNOS4_DEV_DMA</div><div class='add'>+	select EXYNOS_DEV_DRM</div><div class='ctx'> 	select EXYNOS4_SETUP_FIMD0</div><div class='ctx'> 	select EXYNOS4_SETUP_I2C1</div><div class='ctx'> 	select EXYNOS4_SETUP_I2C3</div><div class='hunk'>@@ -259,6 +273,7 @@ config MACH_UNIVERSAL_C210</div><div class='ctx'> 	select EXYNOS4_SETUP_SDHCI</div><div class='ctx'> 	select EXYNOS4_SETUP_FIMC</div><div class='ctx'> 	select S5P_SETUP_MIPIPHY</div><div class='add'>+	select EXYNOS4_SETUP_USB_PHY</div><div class='ctx'> 	help</div><div class='ctx'> 	  Machine support for Samsung Mobile Universal S5PC210 Reference</div><div class='ctx'> 	  Board.</div><div class='hunk'>@@ -277,6 +292,7 @@ config MACH_NURI</div><div class='ctx'> 	select S3C_DEV_I2C3</div><div class='ctx'> 	select S3C_DEV_I2C5</div><div class='ctx'> 	select S3C_DEV_I2C6</div><div class='add'>+	select S3C_DEV_USB_HSOTG</div><div class='ctx'> 	select S5P_DEV_CSIS0</div><div class='ctx'> 	select S5P_DEV_JPEG</div><div class='ctx'> 	select S5P_DEV_FIMC0</div><div class='hunk'>@@ -288,6 +304,7 @@ config MACH_NURI</div><div class='ctx'> 	select S5P_DEV_USB_EHCI</div><div class='ctx'> 	select S5P_SETUP_MIPIPHY</div><div class='ctx'> 	select EXYNOS4_DEV_DMA</div><div class='add'>+	select EXYNOS_DEV_DRM</div><div class='ctx'> 	select EXYNOS4_SETUP_FIMC</div><div class='ctx'> 	select EXYNOS4_SETUP_FIMD0</div><div class='ctx'> 	select EXYNOS4_SETUP_I2C1</div><div class='hunk'>@@ -322,6 +339,8 @@ config MACH_ORIGEN</div><div class='ctx'> 	select S5P_DEV_USB_EHCI</div><div class='ctx'> 	select SAMSUNG_DEV_BACKLIGHT</div><div class='ctx'> 	select SAMSUNG_DEV_PWM</div><div class='add'>+	select EXYNOS_DEV_DRM</div><div class='add'>+	select EXYNOS_DEV_SYSMMU</div><div class='ctx'> 	select EXYNOS4_DEV_DMA</div><div class='ctx'> 	select EXYNOS4_DEV_USB_OHCI</div><div class='ctx'> 	select EXYNOS4_SETUP_FIMD0</div><div class='hunk'>@@ -342,10 +361,16 @@ config MACH_SMDK4212</div><div class='ctx'> 	select S3C_DEV_I2C7</div><div class='ctx'> 	select S3C_DEV_RTC</div><div class='ctx'> 	select S3C_DEV_WDT</div><div class='add'>+	select S5P_DEV_FIMC0</div><div class='add'>+	select S5P_DEV_FIMC1</div><div class='add'>+	select S5P_DEV_FIMC2</div><div class='add'>+	select S5P_DEV_FIMC3</div><div class='add'>+	select S5P_DEV_MFC</div><div class='ctx'> 	select SAMSUNG_DEV_BACKLIGHT</div><div class='ctx'> 	select SAMSUNG_DEV_KEYPAD</div><div class='ctx'> 	select SAMSUNG_DEV_PWM</div><div class='del'>-	select EXYNOS4_DEV_DMA</div><div class='add'>+	select EXYNOS_DEV_SYSMMU</div><div class='add'>+	select EXYNOS_DEV_DMA</div><div class='ctx'> 	select EXYNOS4_SETUP_I2C1</div><div class='ctx'> 	select EXYNOS4_SETUP_I2C3</div><div class='ctx'> 	select EXYNOS4_SETUP_I2C7</div><div class='head'>diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile<br/>index 8631840d1b5e..9b58024f7d43 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/Makefile</a></div><div class='hunk'>@@ -22,7 +22,7 @@ obj-$(CONFIG_PM)		+= pm.o</div><div class='ctx'> obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o</div><div class='ctx'> obj-$(CONFIG_CPU_IDLE)		+= cpuidle.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_ARCH_EXYNOS4)	+= pmu.o</div><div class='add'>+obj-$(CONFIG_ARCH_EXYNOS)	+= pmu.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SMP)		+= platsmp.o headsmp.o</div><div class='ctx'> </div><div class='hunk'>@@ -50,10 +50,11 @@ obj-$(CONFIG_MACH_EXYNOS5_DT)		+= mach-exynos5-dt.o</div><div class='ctx'> obj-y					+= dev-uart.o</div><div class='ctx'> obj-$(CONFIG_ARCH_EXYNOS4)		+= dev-audio.o</div><div class='ctx'> obj-$(CONFIG_EXYNOS4_DEV_AHCI)		+= dev-ahci.o</div><div class='del'>-obj-$(CONFIG_EXYNOS4_DEV_SYSMMU)	+= dev-sysmmu.o</div><div class='ctx'> obj-$(CONFIG_EXYNOS4_DEV_DWMCI)		+= dev-dwmci.o</div><div class='del'>-obj-$(CONFIG_EXYNOS4_DEV_DMA)		+= dma.o</div><div class='add'>+obj-$(CONFIG_EXYNOS_DEV_DMA)		+= dma.o</div><div class='ctx'> obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI)	+= dev-ohci.o</div><div class='add'>+obj-$(CONFIG_EXYNOS_DEV_DRM)		+= dev-drm.o</div><div class='add'>+obj-$(CONFIG_EXYNOS_DEV_SYSMMU)		+= dev-sysmmu.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ARCH_EXYNOS)		+= setup-i2c0.o</div><div class='ctx'> obj-$(CONFIG_EXYNOS4_SETUP_FIMC)	+= setup-fimc.o</div><div class='hunk'>@@ -68,4 +69,4 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C7)	+= setup-i2c7.o</div><div class='ctx'> obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD)	+= setup-keypad.o</div><div class='ctx'> obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o</div><div class='ctx'> obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY)	+= setup-usb-phy.o</div><div class='del'>-obj-$(CONFIG_EXYNOS4_SETUP_SPI)		+= setup-spi.o</div><div class='add'>+obj-$(CONFIG_EXYNOS_SETUP_SPI)		+= setup-spi.o</div><div class='head'>diff --git a/arch/arm/mach-exynos/Makefile.boot b/arch/arm/mach-exynos/Makefile.boot<br/>index b9862e22bf10..31bd181b0514 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/Makefile.boot?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/Makefile.boot</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/Makefile.boot</a></div><div class='hunk'>@@ -1,2 +1,5 @@</div><div class='ctx'>    zreladdr-y	+= 0x40008000</div><div class='ctx'> params_phys-y	:= 0x40000100</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_MACH_EXYNOS4_DT) += exynos4210-origen.dtb exynos4210-smdkv310.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_EXYNOS5_DT) += exynos5250-smdk5250.dtb</div><div class='head'>diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c<br/>index 6efd1e5919fd..bcb7db453145 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/clock-exynos4.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/clock-exynos4.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/clock-exynos4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/clock-exynos4.c</a></div><div class='hunk'>@@ -168,7 +168,7 @@ static int exynos4_clk_ip_tv_ctrl(struct clk *clk, int enable)</div><div class='ctx'> 	return s5p_gatectrl(EXYNOS4_CLKGATE_IP_TV, clk, enable);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int exynos4_clk_ip_image_ctrl(struct clk *clk, int enable)</div><div class='add'>+int exynos4_clk_ip_image_ctrl(struct clk *clk, int enable)</div><div class='ctx'> {</div><div class='ctx'> 	return s5p_gatectrl(EXYNOS4_CLKGATE_IP_IMAGE, clk, enable);</div><div class='ctx'> }</div><div class='hunk'>@@ -198,6 +198,11 @@ static int exynos4_clk_ip_perir_ctrl(struct clk *clk, int enable)</div><div class='ctx'> 	return s5p_gatectrl(EXYNOS4_CLKGATE_IP_PERIR, clk, enable);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int exynos4_clk_ip_dmc_ctrl(struct clk *clk, int enable)</div><div class='add'>+{</div><div class='add'>+	return s5p_gatectrl(EXYNOS4_CLKGATE_IP_DMC, clk, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int exynos4_clk_hdmiphy_ctrl(struct clk *clk, int enable)</div><div class='ctx'> {</div><div class='ctx'> 	return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);</div><div class='hunk'>@@ -678,61 +683,55 @@ static struct clk exynos4_init_clocks_off[] = {</div><div class='ctx'> 		.enable		= exynos4_clk_ip_peril_ctrl,</div><div class='ctx'> 		.ctrlbit	= (1 &lt;&lt; 14),</div><div class='ctx'> 	}, {</div><div class='del'>-		.name		= "SYSMMU_MDMA",</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(mfc_l, 0),</div><div class='add'>+		.enable		= exynos4_clk_ip_mfc_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 1),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(mfc_r, 1),</div><div class='add'>+		.enable		= exynos4_clk_ip_mfc_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 2),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(tv, 2),</div><div class='add'>+		.enable		= exynos4_clk_ip_tv_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 4),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(jpeg, 3),</div><div class='add'>+		.enable		= exynos4_clk_ip_cam_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 11),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(rot, 4),</div><div class='ctx'> 		.enable		= exynos4_clk_ip_image_ctrl,</div><div class='del'>-		.ctrlbit	= (1 &lt;&lt; 5),</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 4),</div><div class='ctx'> 	}, {</div><div class='del'>-		.name		= "SYSMMU_FIMC0",</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(fimc0, 5),</div><div class='ctx'> 		.enable		= exynos4_clk_ip_cam_ctrl,</div><div class='ctx'> 		.ctrlbit	= (1 &lt;&lt; 7),</div><div class='ctx'> 	}, {</div><div class='del'>-		.name		= "SYSMMU_FIMC1",</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(fimc1, 6),</div><div class='ctx'> 		.enable		= exynos4_clk_ip_cam_ctrl,</div><div class='ctx'> 		.ctrlbit	= (1 &lt;&lt; 8),</div><div class='ctx'> 	}, {</div><div class='del'>-		.name		= "SYSMMU_FIMC2",</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(fimc2, 7),</div><div class='ctx'> 		.enable		= exynos4_clk_ip_cam_ctrl,</div><div class='ctx'> 		.ctrlbit	= (1 &lt;&lt; 9),</div><div class='ctx'> 	}, {</div><div class='del'>-		.name		= "SYSMMU_FIMC3",</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(fimc3, 8),</div><div class='ctx'> 		.enable		= exynos4_clk_ip_cam_ctrl,</div><div class='ctx'> 		.ctrlbit	= (1 &lt;&lt; 10),</div><div class='ctx'> 	}, {</div><div class='del'>-		.name		= "SYSMMU_JPEG",</div><div class='del'>-		.enable		= exynos4_clk_ip_cam_ctrl,</div><div class='del'>-		.ctrlbit	= (1 &lt;&lt; 11),</div><div class='del'>-	}, {</div><div class='del'>-		.name		= "SYSMMU_FIMD0",</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(fimd0, 10),</div><div class='ctx'> 		.enable		= exynos4_clk_ip_lcd0_ctrl,</div><div class='ctx'> 		.ctrlbit	= (1 &lt;&lt; 4),</div><div class='del'>-	}, {</div><div class='del'>-		.name		= "SYSMMU_FIMD1",</div><div class='del'>-		.enable		= exynos4_clk_ip_lcd1_ctrl,</div><div class='del'>-		.ctrlbit	= (1 &lt;&lt; 4),</div><div class='del'>-	}, {</div><div class='del'>-		.name		= "SYSMMU_PCIe",</div><div class='del'>-		.enable		= exynos4_clk_ip_fsys_ctrl,</div><div class='del'>-		.ctrlbit	= (1 &lt;&lt; 18),</div><div class='del'>-	}, {</div><div class='del'>-		.name		= "SYSMMU_G2D",</div><div class='del'>-		.enable		= exynos4_clk_ip_image_ctrl,</div><div class='del'>-		.ctrlbit	= (1 &lt;&lt; 3),</div><div class='del'>-	}, {</div><div class='del'>-		.name		= "SYSMMU_ROTATOR",</div><div class='del'>-		.enable		= exynos4_clk_ip_image_ctrl,</div><div class='del'>-		.ctrlbit	= (1 &lt;&lt; 4),</div><div class='del'>-	}, {</div><div class='del'>-		.name		= "SYSMMU_TV",</div><div class='del'>-		.enable		= exynos4_clk_ip_tv_ctrl,</div><div class='del'>-		.ctrlbit	= (1 &lt;&lt; 4),</div><div class='del'>-	}, {</div><div class='del'>-		.name		= "SYSMMU_MFC_L",</div><div class='del'>-		.enable		= exynos4_clk_ip_mfc_ctrl,</div><div class='del'>-		.ctrlbit	= (1 &lt;&lt; 1),</div><div class='del'>-	}, {</div><div class='del'>-		.name		= "SYSMMU_MFC_R",</div><div class='del'>-		.enable		= exynos4_clk_ip_mfc_ctrl,</div><div class='del'>-		.ctrlbit	= (1 &lt;&lt; 2),</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-exynos/clock-exynos4.h b/arch/arm/mach-exynos/clock-exynos4.h<br/>index cb71c29c14d1..28a119701182 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/clock-exynos4.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/clock-exynos4.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/clock-exynos4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/clock-exynos4.h</a></div><div class='hunk'>@@ -26,5 +26,7 @@ extern struct clk *exynos4_clkset_group_list[];</div><div class='ctx'> extern int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable);</div><div class='ctx'> extern int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable);</div><div class='ctx'> extern int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable);</div><div class='add'>+extern int exynos4_clk_ip_image_ctrl(struct clk *clk, int enable);</div><div class='add'>+extern int exynos4_clk_ip_dmc_ctrl(struct clk *clk, int enable);</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_ARCH_CLOCK_H */</div><div class='head'>diff --git a/arch/arm/mach-exynos/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c<br/>index 3b131e4b6ef5..b8689ff60baf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/clock-exynos4210.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/clock-exynos4210.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/clock-exynos4210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/clock-exynos4210.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;mach/map.h&gt;</div><div class='ctx'> #include &lt;mach/regs-clock.h&gt;</div><div class='add'>+#include &lt;mach/sysmmu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include "clock-exynos4.h"</div><div class='hunk'>@@ -94,6 +95,16 @@ static struct clk init_clocks_off[] = {</div><div class='ctx'> 		.devname	= "exynos4-fb.1",</div><div class='ctx'> 		.enable		= exynos4_clk_ip_lcd1_ctrl,</div><div class='ctx'> 		.ctrlbit	= (1 &lt;&lt; 0),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(2d, 14),</div><div class='add'>+		.enable		= exynos4_clk_ip_image_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 3),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(fimd1, 11),</div><div class='add'>+		.enable		= exynos4_clk_ip_lcd1_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 4),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c<br/>index 3ecc01e06f74..da397d21bbcf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/clock-exynos4212.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/clock-exynos4212.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/clock-exynos4212.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/clock-exynos4212.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;mach/map.h&gt;</div><div class='ctx'> #include &lt;mach/regs-clock.h&gt;</div><div class='add'>+#include &lt;mach/sysmmu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include "clock-exynos4.h"</div><div class='hunk'>@@ -39,6 +40,16 @@ static struct sleep_save exynos4212_clock_save[] = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static int exynos4212_clk_ip_isp0_ctrl(struct clk *clk, int enable)</div><div class='add'>+{</div><div class='add'>+	return s5p_gatectrl(EXYNOS4_CLKGATE_IP_ISP0, clk, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int exynos4212_clk_ip_isp1_ctrl(struct clk *clk, int enable)</div><div class='add'>+{</div><div class='add'>+	return s5p_gatectrl(EXYNOS4_CLKGATE_IP_ISP1, clk, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct clk *clk_src_mpll_user_list[] = {</div><div class='ctx'> 	[0] = &amp;clk_fin_mpll,</div><div class='ctx'> 	[1] = &amp;exynos4_clk_mout_mpll.clk,</div><div class='hunk'>@@ -66,7 +77,32 @@ static struct clksrc_clk clksrcs[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct clk init_clocks_off[] = {</div><div class='del'>-	/* nothing here yet */</div><div class='add'>+	{</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(2d, 14),</div><div class='add'>+		.enable		= exynos4_clk_ip_dmc_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 24),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(isp, 9),</div><div class='add'>+		.enable		= exynos4212_clk_ip_isp0_ctrl,</div><div class='add'>+		.ctrlbit	= (7 &lt;&lt; 8),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME2,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(isp, 9),</div><div class='add'>+		.enable		= exynos4212_clk_ip_isp1_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 4),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "flite",</div><div class='add'>+		.devname	= "exynos-fimc-lite.0",</div><div class='add'>+		.enable		= exynos4212_clk_ip_isp0_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 4),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "flite",</div><div class='add'>+		.devname	= "exynos-fimc-lite.1",</div><div class='add'>+		.enable		= exynos4212_clk_ip_isp0_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 3),</div><div class='add'>+	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='head'>diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c<br/>index 5cd7a8b8868c..fefa336be2b4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/clock-exynos5.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/clock-exynos5.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/clock-exynos5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/clock-exynos5.c</a></div><div class='hunk'>@@ -30,7 +30,56 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='ctx'> static struct sleep_save exynos5_clock_save[] = {</div><div class='del'>-	/* will be implemented */</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_MASK_TOP),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_MASK_GSCL),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_MASK_DISP1_0),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_MASK_FSYS),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_MASK_MAUDIO),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_MASK_PERIC0),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_MASK_PERIC1),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKGATE_IP_GSCL),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKGATE_IP_DISP1),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKGATE_IP_MFC),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKGATE_IP_G3D),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKGATE_IP_GEN),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKGATE_IP_FSYS),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKGATE_IP_PERIC),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKGATE_IP_PERIS),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKGATE_BLOCK),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_TOP0),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_TOP1),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_GSCL),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_DISP1_0),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_GEN),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_MAUDIO),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_FSYS0),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_FSYS1),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_FSYS2),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_FSYS3),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_PERIC0),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_PERIC1),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_PERIC2),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_PERIC3),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_PERIC4),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKDIV_PERIC5),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_SCLK_DIV_ISP),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_TOP0),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_TOP1),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_TOP2),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_TOP3),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_GSCL),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_DISP1_0),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_MAUDIO),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_FSYS),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_PERIC0),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_CLKSRC_PERIC1),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_SCLK_SRC_ISP),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_EPLL_CON0),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_EPLL_CON1),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_EPLL_CON2),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_VPLL_CON0),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_VPLL_CON1),</div><div class='add'>+	SAVE_ITEM(EXYNOS5_VPLL_CON2),</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -82,6 +131,11 @@ static int exynos5_clksrc_mask_peric0_ctrl(struct clk *clk, int enable)</div><div class='ctx'> 	return s5p_gatectrl(EXYNOS5_CLKSRC_MASK_PERIC0, clk, enable);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int exynos5_clk_ip_acp_ctrl(struct clk *clk, int enable)</div><div class='add'>+{</div><div class='add'>+	return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ACP, clk, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int exynos5_clk_ip_core_ctrl(struct clk *clk, int enable)</div><div class='ctx'> {</div><div class='ctx'> 	return s5p_gatectrl(EXYNOS5_CLKGATE_IP_CORE, clk, enable);</div><div class='hunk'>@@ -127,6 +181,21 @@ static int exynos5_clk_ip_peris_ctrl(struct clk *clk, int enable)</div><div class='ctx'> 	return s5p_gatectrl(EXYNOS5_CLKGATE_IP_PERIS, clk, enable);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int exynos5_clk_ip_gscl_ctrl(struct clk *clk, int enable)</div><div class='add'>+{</div><div class='add'>+	return s5p_gatectrl(EXYNOS5_CLKGATE_IP_GSCL, clk, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int exynos5_clk_ip_isp0_ctrl(struct clk *clk, int enable)</div><div class='add'>+{</div><div class='add'>+	return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP0, clk, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int exynos5_clk_ip_isp1_ctrl(struct clk *clk, int enable)</div><div class='add'>+{</div><div class='add'>+	return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Core list of CMU_CPU side */</div><div class='ctx'> </div><div class='ctx'> static struct clksrc_clk exynos5_clk_mout_apll = {</div><div class='hunk'>@@ -145,11 +214,29 @@ static struct clksrc_clk exynos5_clk_sclk_apll = {</div><div class='ctx'> 	.reg_div = { .reg = EXYNOS5_CLKDIV_CPU0, .shift = 24, .size = 3 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct clksrc_clk exynos5_clk_mout_bpll_fout = {</div><div class='add'>+	.clk	= {</div><div class='add'>+		.name		= "mout_bpll_fout",</div><div class='add'>+	},</div><div class='add'>+	.sources = &amp;clk_src_bpll_fout,</div><div class='add'>+	.reg_src = { .reg = EXYNOS5_PLL_DIV2_SEL, .shift = 0, .size = 1 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *exynos5_clk_src_bpll_list[] = {</div><div class='add'>+	[0] = &amp;clk_fin_bpll,</div><div class='add'>+	[1] = &amp;exynos5_clk_mout_bpll_fout.clk,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clksrc_sources exynos5_clk_src_bpll = {</div><div class='add'>+	.sources	= exynos5_clk_src_bpll_list,</div><div class='add'>+	.nr_sources	= ARRAY_SIZE(exynos5_clk_src_bpll_list),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct clksrc_clk exynos5_clk_mout_bpll = {</div><div class='ctx'> 	.clk	= {</div><div class='ctx'> 		.name		= "mout_bpll",</div><div class='ctx'> 	},</div><div class='del'>-	.sources = &amp;clk_src_bpll,</div><div class='add'>+	.sources = &amp;exynos5_clk_src_bpll,</div><div class='ctx'> 	.reg_src = { .reg = EXYNOS5_CLKSRC_CDREX, .shift = 0, .size = 1 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -187,11 +274,29 @@ static struct clksrc_clk exynos5_clk_mout_epll = {</div><div class='ctx'> 	.reg_src = { .reg = EXYNOS5_CLKSRC_TOP2, .shift = 12, .size = 1 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct clksrc_clk exynos5_clk_mout_mpll_fout = {</div><div class='add'>+	.clk	= {</div><div class='add'>+		.name		= "mout_mpll_fout",</div><div class='add'>+	},</div><div class='add'>+	.sources = &amp;clk_src_mpll_fout,</div><div class='add'>+	.reg_src = { .reg = EXYNOS5_PLL_DIV2_SEL, .shift = 4, .size = 1 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *exynos5_clk_src_mpll_list[] = {</div><div class='add'>+	[0] = &amp;clk_fin_mpll,</div><div class='add'>+	[1] = &amp;exynos5_clk_mout_mpll_fout.clk,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clksrc_sources exynos5_clk_src_mpll = {</div><div class='add'>+	.sources	= exynos5_clk_src_mpll_list,</div><div class='add'>+	.nr_sources	= ARRAY_SIZE(exynos5_clk_src_mpll_list),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct clksrc_clk exynos5_clk_mout_mpll = {</div><div class='ctx'> 	.clk = {</div><div class='ctx'> 		.name		= "mout_mpll",</div><div class='ctx'> 	},</div><div class='del'>-	.sources = &amp;clk_src_mpll,</div><div class='add'>+	.sources = &amp;exynos5_clk_src_mpll,</div><div class='ctx'> 	.reg_src = { .reg = EXYNOS5_CLKSRC_CORE1, .shift = 8, .size = 1 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -454,6 +559,11 @@ static struct clk exynos5_init_clocks_off[] = {</div><div class='ctx'> 		.enable		= exynos5_clk_ip_peris_ctrl,</div><div class='ctx'> 		.ctrlbit	= (1 &lt;&lt; 20),</div><div class='ctx'> 	}, {</div><div class='add'>+		.name		= "watchdog",</div><div class='add'>+		.parent		= &amp;exynos5_clk_aclk_66.clk,</div><div class='add'>+		.enable		= exynos5_clk_ip_peris_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 19),</div><div class='add'>+	}, {</div><div class='ctx'> 		.name		= "hsmmc",</div><div class='ctx'> 		.devname	= "exynos4-sdhci.0",</div><div class='ctx'> 		.parent		= &amp;exynos5_clk_aclk_200.clk,</div><div class='hunk'>@@ -630,6 +740,76 @@ static struct clk exynos5_init_clocks_off[] = {</div><div class='ctx'> 		.parent		= &amp;exynos5_clk_aclk_66.clk,</div><div class='ctx'> 		.enable		= exynos5_clk_ip_peric_ctrl,</div><div class='ctx'> 		.ctrlbit	= (1 &lt;&lt; 14),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(mfc_l, 0),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_mfc_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 1),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(mfc_r, 1),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_mfc_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 2),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(tv, 2),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_disp1_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 9)</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(jpeg, 3),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_gen_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 7),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(rot, 4),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_gen_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 6)</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(gsc0, 5),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_gscl_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 7),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(gsc1, 6),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_gscl_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 8),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(gsc2, 7),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_gscl_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 9),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(gsc3, 8),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_gscl_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 10),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(isp, 9),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_isp0_ctrl,</div><div class='add'>+		.ctrlbit	= (0x3F &lt;&lt; 8),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME2,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(isp, 9),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_isp1_ctrl,</div><div class='add'>+		.ctrlbit	= (0xF &lt;&lt; 4),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(camif0, 12),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_gscl_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 11),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(camif1, 13),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_gscl_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 12),</div><div class='add'>+	}, {</div><div class='add'>+		.name		= SYSMMU_CLOCK_NAME,</div><div class='add'>+		.devname	= SYSMMU_CLOCK_DEVNAME(2d, 14),</div><div class='add'>+		.enable		= &amp;exynos5_clk_ip_acp_ctrl,</div><div class='add'>+		.ctrlbit	= (1 &lt;&lt; 7)</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -678,7 +858,7 @@ static struct clk exynos5_clk_pdma1 = {</div><div class='ctx'> 	.name		= "dma",</div><div class='ctx'> 	.devname	= "dma-pl330.1",</div><div class='ctx'> 	.enable		= exynos5_clk_ip_fsys_ctrl,</div><div class='del'>-	.ctrlbit	= (1 &lt;&lt; 1),</div><div class='add'>+	.ctrlbit	= (1 &lt;&lt; 2),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct clk exynos5_clk_mdma1 = {</div><div class='hunk'>@@ -941,10 +1121,12 @@ static struct clksrc_clk *exynos5_sysclks[] = {</div><div class='ctx'> 	&amp;exynos5_clk_mout_apll,</div><div class='ctx'> 	&amp;exynos5_clk_sclk_apll,</div><div class='ctx'> 	&amp;exynos5_clk_mout_bpll,</div><div class='add'>+	&amp;exynos5_clk_mout_bpll_fout,</div><div class='ctx'> 	&amp;exynos5_clk_mout_bpll_user,</div><div class='ctx'> 	&amp;exynos5_clk_mout_cpll,</div><div class='ctx'> 	&amp;exynos5_clk_mout_epll,</div><div class='ctx'> 	&amp;exynos5_clk_mout_mpll,</div><div class='add'>+	&amp;exynos5_clk_mout_mpll_fout,</div><div class='ctx'> 	&amp;exynos5_clk_mout_mpll_user,</div><div class='ctx'> 	&amp;exynos5_clk_vpllsrc,</div><div class='ctx'> 	&amp;exynos5_clk_sclk_vpll,</div><div class='hunk'>@@ -1008,7 +1190,9 @@ static struct clk *exynos5_clks[] __initdata = {</div><div class='ctx'> 	&amp;exynos5_clk_sclk_hdmi27m,</div><div class='ctx'> 	&amp;exynos5_clk_sclk_hdmiphy,</div><div class='ctx'> 	&amp;clk_fout_bpll,</div><div class='add'>+	&amp;clk_fout_bpll_div2,</div><div class='ctx'> 	&amp;clk_fout_cpll,</div><div class='add'>+	&amp;clk_fout_mpll_div2,</div><div class='ctx'> 	&amp;exynos5_clk_armclk,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1173,8 +1357,10 @@ void __init_or_cpufreq exynos5_setup_clocks(void)</div><div class='ctx'> </div><div class='ctx'> 	clk_fout_apll.ops = &amp;exynos5_fout_apll_ops;</div><div class='ctx'> 	clk_fout_bpll.rate = bpll;</div><div class='add'>+	clk_fout_bpll_div2.rate = bpll &gt;&gt; 1;</div><div class='ctx'> 	clk_fout_cpll.rate = cpll;</div><div class='ctx'> 	clk_fout_mpll.rate = mpll;</div><div class='add'>+	clk_fout_mpll_div2.rate = mpll &gt;&gt; 1;</div><div class='ctx'> 	clk_fout_epll.rate = epll;</div><div class='ctx'> 	clk_fout_vpll.rate = vpll;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c<br/>index 5ccd6e80a607..742edd3bbec3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/common.c</a></div><div class='hunk'>@@ -19,6 +19,9 @@</div><div class='ctx'> #include &lt;linux/serial_core.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/proc-fns.h&gt;</div><div class='ctx'> #include &lt;asm/exception.h&gt;</div><div class='hunk'>@@ -265,12 +268,12 @@ static struct map_desc exynos5_iodesc[] __initdata = {</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.virtual	= (unsigned long)S5P_VA_GIC_CPU,</div><div class='ctx'> 		.pfn		= __phys_to_pfn(EXYNOS5_PA_GIC_CPU),</div><div class='del'>-		.length		= SZ_64K,</div><div class='add'>+		.length		= SZ_8K,</div><div class='ctx'> 		.type		= MT_DEVICE,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.virtual	= (unsigned long)S5P_VA_GIC_DIST,</div><div class='ctx'> 		.pfn		= __phys_to_pfn(EXYNOS5_PA_GIC_DIST),</div><div class='del'>-		.length		= SZ_64K,</div><div class='add'>+		.length		= SZ_4K,</div><div class='ctx'> 		.type		= MT_DEVICE,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -285,6 +288,11 @@ void exynos5_restart(char mode, const char *cmd)</div><div class='ctx'> 	__raw_writel(0x1, EXYNOS_SWRESET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void __init exynos_init_late(void)</div><div class='add'>+{</div><div class='add'>+	exynos_pm_late_initcall();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * exynos_map_io</div><div class='ctx'>  *</div><div class='hunk'>@@ -399,6 +407,7 @@ struct combiner_chip_data {</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct irq_domain *combiner_irq_domain;</div><div class='ctx'> static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];</div><div class='ctx'> </div><div class='ctx'> static inline void __iomem *combiner_base(struct irq_data *data)</div><div class='hunk'>@@ -411,14 +420,14 @@ static inline void __iomem *combiner_base(struct irq_data *data)</div><div class='ctx'> </div><div class='ctx'> static void combiner_mask_irq(struct irq_data *data)</div><div class='ctx'> {</div><div class='del'>-	u32 mask = 1 &lt;&lt; (data-&gt;irq % 32);</div><div class='add'>+	u32 mask = 1 &lt;&lt; (data-&gt;hwirq % 32);</div><div class='ctx'> </div><div class='ctx'> 	__raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void combiner_unmask_irq(struct irq_data *data)</div><div class='ctx'> {</div><div class='del'>-	u32 mask = 1 &lt;&lt; (data-&gt;irq % 32);</div><div class='add'>+	u32 mask = 1 &lt;&lt; (data-&gt;hwirq % 32);</div><div class='ctx'> </div><div class='ctx'> 	__raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);</div><div class='ctx'> }</div><div class='hunk'>@@ -474,49 +483,131 @@ static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int i</div><div class='ctx'> 	irq_set_chained_handler(irq, combiner_handle_cascade_irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init combiner_init(unsigned int combiner_nr, void __iomem *base,</div><div class='del'>-			  unsigned int irq_start)</div><div class='add'>+static void __init combiner_init_one(unsigned int combiner_nr,</div><div class='add'>+				     void __iomem *base)</div><div class='ctx'> {</div><div class='del'>-	unsigned int i;</div><div class='del'>-	unsigned int max_nr;</div><div class='del'>-</div><div class='del'>-	if (soc_is_exynos5250())</div><div class='del'>-		max_nr = EXYNOS5_MAX_COMBINER_NR;</div><div class='del'>-	else</div><div class='del'>-		max_nr = EXYNOS4_MAX_COMBINER_NR;</div><div class='del'>-</div><div class='del'>-	if (combiner_nr &gt;= max_nr)</div><div class='del'>-		BUG();</div><div class='del'>-</div><div class='ctx'> 	combiner_data[combiner_nr].base = base;</div><div class='del'>-	combiner_data[combiner_nr].irq_offset = irq_start;</div><div class='add'>+	combiner_data[combiner_nr].irq_offset = irq_find_mapping(</div><div class='add'>+		combiner_irq_domain, combiner_nr * MAX_IRQ_IN_COMBINER);</div><div class='ctx'> 	combiner_data[combiner_nr].irq_mask = 0xff &lt;&lt; ((combiner_nr % 4) &lt;&lt; 3);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable all interrupts */</div><div class='del'>-</div><div class='ctx'> 	__raw_writel(combiner_data[combiner_nr].irq_mask,</div><div class='ctx'> 		     base + COMBINER_ENABLE_CLEAR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static int combiner_irq_domain_xlate(struct irq_domain *d,</div><div class='add'>+				     struct device_node *controller,</div><div class='add'>+				     const u32 *intspec, unsigned int intsize,</div><div class='add'>+				     unsigned long *out_hwirq,</div><div class='add'>+				     unsigned int *out_type)</div><div class='add'>+{</div><div class='add'>+	if (d-&gt;of_node != controller)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (intsize &lt; 2)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*out_hwirq = intspec[0] * MAX_IRQ_IN_COMBINER + intspec[1];</div><div class='add'>+	*out_type = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static int combiner_irq_domain_xlate(struct irq_domain *d,</div><div class='add'>+				     struct device_node *controller,</div><div class='add'>+				     const u32 *intspec, unsigned int intsize,</div><div class='add'>+				     unsigned long *out_hwirq,</div><div class='add'>+				     unsigned int *out_type)</div><div class='add'>+{</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq,</div><div class='add'>+				   irq_hw_number_t hw)</div><div class='add'>+{</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;combiner_chip, handle_level_irq);</div><div class='add'>+	irq_set_chip_data(irq, &amp;combiner_data[hw &gt;&gt; 3]);</div><div class='add'>+	set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_domain_ops combiner_irq_domain_ops = {</div><div class='add'>+	.xlate	= combiner_irq_domain_xlate,</div><div class='add'>+	.map	= combiner_irq_domain_map,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init combiner_init(void __iomem *combiner_base, struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	int i, irq, irq_base;</div><div class='add'>+	unsigned int max_nr, nr_irq;</div><div class='add'>+</div><div class='add'>+	if (np) {</div><div class='add'>+		if (of_property_read_u32(np, "samsung,combiner-nr", &amp;max_nr)) {</div><div class='add'>+			pr_warning("%s: number of combiners not specified, "</div><div class='add'>+				"setting default as %d.\n",</div><div class='add'>+				__func__, EXYNOS4_MAX_COMBINER_NR);</div><div class='add'>+			max_nr = EXYNOS4_MAX_COMBINER_NR;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		max_nr = soc_is_exynos5250() ? EXYNOS5_MAX_COMBINER_NR :</div><div class='add'>+						EXYNOS4_MAX_COMBINER_NR;</div><div class='add'>+	}</div><div class='add'>+	nr_irq = max_nr * MAX_IRQ_IN_COMBINER;</div><div class='ctx'> </div><div class='del'>-	/* Setup the Linux IRQ subsystem */</div><div class='add'>+	irq_base = irq_alloc_descs(COMBINER_IRQ(0, 0), 1, nr_irq, 0);</div><div class='add'>+	if (IS_ERR_VALUE(irq_base)) {</div><div class='add'>+		irq_base = COMBINER_IRQ(0, 0);</div><div class='add'>+		pr_warning("%s: irq desc alloc failed. Continuing with %d as linux irq base\n", __func__, irq_base);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	for (i = irq_start; i &lt; combiner_data[combiner_nr].irq_offset</div><div class='del'>-				+ MAX_IRQ_IN_COMBINER; i++) {</div><div class='del'>-		irq_set_chip_and_handler(i, &amp;combiner_chip, handle_level_irq);</div><div class='del'>-		irq_set_chip_data(i, &amp;combiner_data[combiner_nr]);</div><div class='del'>-		set_irq_flags(i, IRQF_VALID | IRQF_PROBE);</div><div class='add'>+	combiner_irq_domain = irq_domain_add_legacy(np, nr_irq, irq_base, 0,</div><div class='add'>+				&amp;combiner_irq_domain_ops, &amp;combiner_data);</div><div class='add'>+	if (WARN_ON(!combiner_irq_domain)) {</div><div class='add'>+		pr_warning("%s: irq domain init failed\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; max_nr; i++) {</div><div class='add'>+		combiner_init_one(i, combiner_base + (i &gt;&gt; 2) * 0x10);</div><div class='add'>+		irq = IRQ_SPI(i);</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+		if (np)</div><div class='add'>+			irq = irq_of_parse_and_map(np, i);</div><div class='add'>+#endif</div><div class='add'>+		combiner_cascade_irq(i, irq);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OF</div><div class='add'>+int __init combiner_of_init(struct device_node *np, struct device_node *parent)</div><div class='add'>+{</div><div class='add'>+	void __iomem *combiner_base;</div><div class='add'>+</div><div class='add'>+	combiner_base = of_iomap(np, 0);</div><div class='add'>+	if (!combiner_base) {</div><div class='add'>+		pr_err("%s: failed to map combiner registers\n", __func__);</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	combiner_init(combiner_base, np);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct of_device_id exynos4_dt_irq_match[] = {</div><div class='ctx'> 	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },</div><div class='add'>+	{ .compatible = "samsung,exynos4210-combiner",</div><div class='add'>+			.data = combiner_of_init, },</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> void __init exynos4_init_irq(void)</div><div class='ctx'> {</div><div class='del'>-	int irq;</div><div class='ctx'> 	unsigned int gic_bank_offset;</div><div class='ctx'> </div><div class='ctx'> 	gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;</div><div class='hunk'>@@ -528,12 +619,8 @@ void __init exynos4_init_irq(void)</div><div class='ctx'> 		of_irq_init(exynos4_dt_irq_match);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	for (irq = 0; irq &lt; EXYNOS4_MAX_COMBINER_NR; irq++) {</div><div class='del'>-</div><div class='del'>-		combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),</div><div class='del'>-				COMBINER_IRQ(irq, 0));</div><div class='del'>-		combiner_cascade_irq(irq, IRQ_SPI(irq));</div><div class='del'>-	}</div><div class='add'>+	if (!of_have_populated_dt())</div><div class='add'>+		combiner_init(S5P_VA_COMBINER_BASE, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The parameters of s5p_init_irq() are for VIC init.</div><div class='hunk'>@@ -545,18 +632,9 @@ void __init exynos4_init_irq(void)</div><div class='ctx'> </div><div class='ctx'> void __init exynos5_init_irq(void)</div><div class='ctx'> {</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_OF</div><div class='ctx'> 	of_irq_init(exynos4_dt_irq_match);</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='del'>-	for (irq = 0; irq &lt; EXYNOS5_MAX_COMBINER_NR; irq++) {</div><div class='del'>-		combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),</div><div class='del'>-				COMBINER_IRQ(irq, 0));</div><div class='del'>-		combiner_cascade_irq(irq, IRQ_SPI(irq));</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The parameters of s5p_init_irq() are for VIC init.</div><div class='ctx'> 	 * Theses parameters should be NULL and 0 because EXYNOS4</div><div class='hunk'>@@ -565,30 +643,18 @@ void __init exynos5_init_irq(void)</div><div class='ctx'> 	s5p_init_irq(NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct bus_type exynos4_subsys = {</div><div class='del'>-	.name		= "exynos4-core",</div><div class='del'>-	.dev_name	= "exynos4-core",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct bus_type exynos5_subsys = {</div><div class='del'>-	.name		= "exynos5-core",</div><div class='del'>-	.dev_name	= "exynos5-core",</div><div class='add'>+struct bus_type exynos_subsys = {</div><div class='add'>+	.name		= "exynos-core",</div><div class='add'>+	.dev_name	= "exynos-core",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct device exynos4_dev = {</div><div class='del'>-	.bus	= &amp;exynos4_subsys,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct device exynos5_dev = {</div><div class='del'>-	.bus	= &amp;exynos5_subsys,</div><div class='add'>+	.bus	= &amp;exynos_subsys,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init exynos_core_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (soc_is_exynos5250())</div><div class='del'>-		return subsys_system_register(&amp;exynos5_subsys, NULL);</div><div class='del'>-	else</div><div class='del'>-		return subsys_system_register(&amp;exynos4_subsys, NULL);</div><div class='add'>+	return subsys_system_register(&amp;exynos_subsys, NULL);</div><div class='ctx'> }</div><div class='ctx'> core_initcall(exynos_core_init);</div><div class='ctx'> </div><div class='hunk'>@@ -675,10 +741,7 @@ static int __init exynos_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	printk(KERN_INFO "EXYNOS: Initializing architecture\n");</div><div class='ctx'> </div><div class='del'>-	if (soc_is_exynos5250())</div><div class='del'>-		return device_register(&amp;exynos5_dev);</div><div class='del'>-	else</div><div class='del'>-		return device_register(&amp;exynos4_dev);</div><div class='add'>+	return device_register(&amp;exynos4_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* uart registration process */</div><div class='head'>diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h<br/>index 677b5467df18..aed2eeb06517 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/common.h</a></div><div class='hunk'>@@ -19,6 +19,13 @@ void exynos4_init_irq(void);</div><div class='ctx'> void exynos5_init_irq(void);</div><div class='ctx'> void exynos4_restart(char mode, const char *cmd);</div><div class='ctx'> void exynos5_restart(char mode, const char *cmd);</div><div class='add'>+void exynos_init_late(void);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_GENERIC_DOMAINS</div><div class='add'>+int exynos_pm_late_initcall(void);</div><div class='add'>+#else</div><div class='add'>+static int exynos_pm_late_initcall(void) { return 0; }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_EXYNOS4</div><div class='ctx'> void exynos4_register_clocks(void);</div><div class='head'>diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c<br/>index 33ab4e7558af..cff0595d0d35 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/cpuidle.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/cpuidle.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/cpuidle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/cpuidle.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;asm/smp_scu.h&gt;</div><div class='ctx'> #include &lt;asm/suspend.h&gt;</div><div class='ctx'> #include &lt;asm/unified.h&gt;</div><div class='add'>+#include &lt;asm/cpuidle.h&gt;</div><div class='ctx'> #include &lt;mach/regs-pmu.h&gt;</div><div class='ctx'> #include &lt;mach/pmu.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -34,22 +35,12 @@</div><div class='ctx'> </div><div class='ctx'> #define S5P_CHECK_AFTR		0xFCBA0D10</div><div class='ctx'> </div><div class='del'>-static int exynos4_enter_idle(struct cpuidle_device *dev,</div><div class='del'>-			struct cpuidle_driver *drv,</div><div class='del'>-			      int index);</div><div class='ctx'> static int exynos4_enter_lowpower(struct cpuidle_device *dev,</div><div class='ctx'> 				struct cpuidle_driver *drv,</div><div class='ctx'> 				int index);</div><div class='ctx'> </div><div class='ctx'> static struct cpuidle_state exynos4_cpuidle_set[] __initdata = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.enter			= exynos4_enter_idle,</div><div class='del'>-		.exit_latency		= 1,</div><div class='del'>-		.target_residency	= 100000,</div><div class='del'>-		.flags			= CPUIDLE_FLAG_TIME_VALID,</div><div class='del'>-		.name			= "C0",</div><div class='del'>-		.desc			= "ARM clock gating(WFI)",</div><div class='del'>-	},</div><div class='add'>+	[0] = ARM_CPUIDLE_WFI_STATE,</div><div class='ctx'> 	[1] = {</div><div class='ctx'> 		.enter			= exynos4_enter_lowpower,</div><div class='ctx'> 		.exit_latency		= 300,</div><div class='hunk'>@@ -63,8 +54,9 @@ static struct cpuidle_state exynos4_cpuidle_set[] __initdata = {</div><div class='ctx'> static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);</div><div class='ctx'> </div><div class='ctx'> static struct cpuidle_driver exynos4_idle_driver = {</div><div class='del'>-	.name		= "exynos4_idle",</div><div class='del'>-	.owner		= THIS_MODULE,</div><div class='add'>+	.name			= "exynos4_idle",</div><div class='add'>+	.owner			= THIS_MODULE,</div><div class='add'>+	.en_core_tk_irqen	= 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */</div><div class='hunk'>@@ -103,17 +95,12 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,</div><div class='ctx'> 				struct cpuidle_driver *drv,</div><div class='ctx'> 				int index)</div><div class='ctx'> {</div><div class='del'>-	struct timeval before, after;</div><div class='del'>-	int idle_time;</div><div class='ctx'> 	unsigned long tmp;</div><div class='ctx'> </div><div class='del'>-	local_irq_disable();</div><div class='del'>-	do_gettimeofday(&amp;before);</div><div class='del'>-</div><div class='ctx'> 	exynos4_set_wakeupmask();</div><div class='ctx'> </div><div class='ctx'> 	/* Set value of power down register for aftr mode */</div><div class='del'>-	exynos4_sys_powerdown_conf(SYS_AFTR);</div><div class='add'>+	exynos_sys_powerdown_conf(SYS_AFTR);</div><div class='ctx'> </div><div class='ctx'> 	__raw_writel(virt_to_phys(s3c_cpu_resume), REG_DIRECTGO_ADDR);</div><div class='ctx'> 	__raw_writel(S5P_CHECK_AFTR, REG_DIRECTGO_FLAG);</div><div class='hunk'>@@ -150,34 +137,6 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,</div><div class='ctx'> 	/* Clear wakeup state register */</div><div class='ctx'> 	__raw_writel(0x0, S5P_WAKEUP_STAT);</div><div class='ctx'> </div><div class='del'>-	do_gettimeofday(&amp;after);</div><div class='del'>-</div><div class='del'>-	local_irq_enable();</div><div class='del'>-	idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +</div><div class='del'>-		    (after.tv_usec - before.tv_usec);</div><div class='del'>-</div><div class='del'>-	dev-&gt;last_residency = idle_time;</div><div class='del'>-	return index;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int exynos4_enter_idle(struct cpuidle_device *dev,</div><div class='del'>-				struct cpuidle_driver *drv,</div><div class='del'>-				int index)</div><div class='del'>-{</div><div class='del'>-	struct timeval before, after;</div><div class='del'>-	int idle_time;</div><div class='del'>-</div><div class='del'>-	local_irq_disable();</div><div class='del'>-	do_gettimeofday(&amp;before);</div><div class='del'>-</div><div class='del'>-	cpu_do_idle();</div><div class='del'>-</div><div class='del'>-	do_gettimeofday(&amp;after);</div><div class='del'>-	local_irq_enable();</div><div class='del'>-	idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +</div><div class='del'>-		    (after.tv_usec - before.tv_usec);</div><div class='del'>-</div><div class='del'>-	dev-&gt;last_residency = idle_time;</div><div class='ctx'> 	return index;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -192,7 +151,7 @@ static int exynos4_enter_lowpower(struct cpuidle_device *dev,</div><div class='ctx'> 		new_index = drv-&gt;safe_state_index;</div><div class='ctx'> </div><div class='ctx'> 	if (new_index == 0)</div><div class='del'>-		return exynos4_enter_idle(dev, drv, new_index);</div><div class='add'>+		return arm_cpuidle_simple_enter(dev, drv, new_index);</div><div class='ctx'> 	else</div><div class='ctx'> 		return exynos4_enter_core0_aftr(dev, drv, new_index);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-exynos/dev-ahci.c b/arch/arm/mach-exynos/dev-ahci.c<br/>index 50ce5b0adcf1..ce1aad3eeeb9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/dev-ahci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/dev-ahci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/dev-ahci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/dev-ahci.c</a></div><div class='hunk'>@@ -236,16 +236,8 @@ static struct ahci_platform_data exynos4_ahci_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource exynos4_ahci_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SATA,</div><div class='del'>-		.end	= EXYNOS4_PA_SATA + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= EXYNOS4_IRQ_SATA,</div><div class='del'>-		.end	= EXYNOS4_IRQ_SATA,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(EXYNOS4_PA_SATA, SZ_64K),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_SATA),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u64 exynos4_ahci_dmamask = DMA_BIT_MASK(32);</div><div class='head'>diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c<br/>index 7199e1ae79b4..b33a5b67b547 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/dev-audio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/dev-audio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/dev-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/dev-audio.c</a></div><div class='hunk'>@@ -62,26 +62,10 @@ static struct s3c_audio_pdata i2sv5_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource exynos4_i2s0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EXYNOS4_PA_I2S0,</div><div class='del'>-		.end	= EXYNOS4_PA_I2S0 + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_I2S0_TX,</div><div class='del'>-		.end	= DMACH_I2S0_TX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= DMACH_I2S0_RX,</div><div class='del'>-		.end	= DMACH_I2S0_RX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[3] = {</div><div class='del'>-		.start	= DMACH_I2S0S_TX,</div><div class='del'>-		.end	= DMACH_I2S0S_TX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S0, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S0_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S0_RX),</div><div class='add'>+	[3] = DEFINE_RES_DMA(DMACH_I2S0S_TX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device exynos4_device_i2s0 = {</div><div class='hunk'>@@ -110,21 +94,9 @@ static struct s3c_audio_pdata i2sv3_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource exynos4_i2s1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EXYNOS4_PA_I2S1,</div><div class='del'>-		.end	= EXYNOS4_PA_I2S1 + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_I2S1_TX,</div><div class='del'>-		.end	= DMACH_I2S1_TX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= DMACH_I2S1_RX,</div><div class='del'>-		.end	= DMACH_I2S1_RX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S1, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S1_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S1_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device exynos4_device_i2s1 = {</div><div class='hunk'>@@ -138,21 +110,9 @@ struct platform_device exynos4_device_i2s1 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource exynos4_i2s2_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EXYNOS4_PA_I2S2,</div><div class='del'>-		.end	= EXYNOS4_PA_I2S2 + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_I2S2_TX,</div><div class='del'>-		.end	= DMACH_I2S2_TX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= DMACH_I2S2_RX,</div><div class='del'>-		.end	= DMACH_I2S2_RX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S2, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S2_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S2_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device exynos4_device_i2s2 = {</div><div class='hunk'>@@ -192,21 +152,9 @@ static struct s3c_audio_pdata s3c_pcm_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource exynos4_pcm0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EXYNOS4_PA_PCM0,</div><div class='del'>-		.end	= EXYNOS4_PA_PCM0 + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_PCM0_TX,</div><div class='del'>-		.end	= DMACH_PCM0_TX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= DMACH_PCM0_RX,</div><div class='del'>-		.end	= DMACH_PCM0_RX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM0, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_PCM0_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_PCM0_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device exynos4_device_pcm0 = {</div><div class='hunk'>@@ -220,21 +168,9 @@ struct platform_device exynos4_device_pcm0 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource exynos4_pcm1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EXYNOS4_PA_PCM1,</div><div class='del'>-		.end	= EXYNOS4_PA_PCM1 + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_PCM1_TX,</div><div class='del'>-		.end	= DMACH_PCM1_TX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= DMACH_PCM1_RX,</div><div class='del'>-		.end	= DMACH_PCM1_RX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM1, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_PCM1_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_PCM1_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device exynos4_device_pcm1 = {</div><div class='hunk'>@@ -248,21 +184,9 @@ struct platform_device exynos4_device_pcm1 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource exynos4_pcm2_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EXYNOS4_PA_PCM2,</div><div class='del'>-		.end	= EXYNOS4_PA_PCM2 + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_PCM2_TX,</div><div class='del'>-		.end	= DMACH_PCM2_TX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= DMACH_PCM2_RX,</div><div class='del'>-		.end	= DMACH_PCM2_RX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM2, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_PCM2_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_PCM2_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device exynos4_device_pcm2 = {</div><div class='hunk'>@@ -283,31 +207,11 @@ static int exynos4_ac97_cfg_gpio(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource exynos4_ac97_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EXYNOS4_PA_AC97,</div><div class='del'>-		.end	= EXYNOS4_PA_AC97 + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_AC97_PCMOUT,</div><div class='del'>-		.end	= DMACH_AC97_PCMOUT,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= DMACH_AC97_PCMIN,</div><div class='del'>-		.end	= DMACH_AC97_PCMIN,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[3] = {</div><div class='del'>-		.start	= DMACH_AC97_MICIN,</div><div class='del'>-		.end	= DMACH_AC97_MICIN,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[4] = {</div><div class='del'>-		.start	= EXYNOS4_IRQ_AC97,</div><div class='del'>-		.end	= EXYNOS4_IRQ_AC97,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(EXYNOS4_PA_AC97, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN),</div><div class='add'>+	[3] = DEFINE_RES_DMA(DMACH_AC97_MICIN),</div><div class='add'>+	[4] = DEFINE_RES_IRQ(EXYNOS4_IRQ_AC97),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_audio_pdata s3c_ac97_pdata = {</div><div class='hunk'>@@ -338,16 +242,8 @@ static int exynos4_spdif_cfg_gpio(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource exynos4_spdif_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SPDIF,</div><div class='del'>-		.end	= EXYNOS4_PA_SPDIF + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_SPDIF,</div><div class='del'>-		.end	= DMACH_SPDIF,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(EXYNOS4_PA_SPDIF, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_SPDIF),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_audio_pdata samsung_spdif_pdata = {</div><div class='head'>diff --git a/arch/arm/mach-exynos/dev-drm.c b/arch/arm/mach-exynos/dev-drm.c<br/>new file mode 100644<br/>index 000000000000..17c9c6ecc2e0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/dev-drm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/dev-drm.c</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+/*</div><div class='add'>+ * linux/arch/arm/mach-exynos/dev-drm.c</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.</div><div class='add'>+ *		http://www.samsung.com</div><div class='add'>+ *</div><div class='add'>+ * EXYNOS - core DRM device</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;plat/devs.h&gt;</div><div class='add'>+</div><div class='add'>+static u64 exynos_drm_dma_mask = DMA_BIT_MASK(32);</div><div class='add'>+</div><div class='add'>+struct platform_device exynos_device_drm = {</div><div class='add'>+	.name	= "exynos-drm",</div><div class='add'>+	.dev	= {</div><div class='add'>+		.dma_mask		= &amp;exynos_drm_dma_mask,</div><div class='add'>+		.coherent_dma_mask	= DMA_BIT_MASK(32),</div><div class='add'>+	}</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/mach-exynos/dev-sysmmu.c b/arch/arm/mach-exynos/dev-sysmmu.c<br/>index 781563fcb156..c5b1ea301df0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/dev-sysmmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/dev-sysmmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/dev-sysmmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/dev-sysmmu.c</a></div><div class='hunk'>@@ -1,9 +1,9 @@</div><div class='del'>-/* linux/arch/arm/mach-exynos4/dev-sysmmu.c</div><div class='add'>+/* linux/arch/arm/mach-exynos/dev-sysmmu.c</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2010 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com</div><div class='ctx'>  *</div><div class='del'>- * EXYNOS4 - System MMU support</div><div class='add'>+ * EXYNOS - System MMU support</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='hunk'>@@ -12,222 +12,263 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;plat/cpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/map.h&gt;</div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='ctx'> #include &lt;mach/sysmmu.h&gt;</div><div class='del'>-#include &lt;plat/s5p-clock.h&gt;</div><div class='del'>-</div><div class='del'>-/* These names must be equal to the clock names in mach-exynos4/clock.c */</div><div class='del'>-const char *sysmmu_ips_name[EXYNOS4_SYSMMU_TOTAL_IPNUM] = {</div><div class='del'>-	"SYSMMU_MDMA"	,</div><div class='del'>-	"SYSMMU_SSS"	,</div><div class='del'>-	"SYSMMU_FIMC0"	,</div><div class='del'>-	"SYSMMU_FIMC1"	,</div><div class='del'>-	"SYSMMU_FIMC2"	,</div><div class='del'>-	"SYSMMU_FIMC3"	,</div><div class='del'>-	"SYSMMU_JPEG"	,</div><div class='del'>-	"SYSMMU_FIMD0"	,</div><div class='del'>-	"SYSMMU_FIMD1"	,</div><div class='del'>-	"SYSMMU_PCIe"	,</div><div class='del'>-	"SYSMMU_G2D"	,</div><div class='del'>-	"SYSMMU_ROTATOR",</div><div class='del'>-	"SYSMMU_MDMA2"	,</div><div class='del'>-	"SYSMMU_TV"	,</div><div class='del'>-	"SYSMMU_MFC_L"	,</div><div class='del'>-	"SYSMMU_MFC_R"	,</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-static struct resource exynos4_sysmmu_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_MDMA,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_MDMA + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_MDMA0_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_MDMA0_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_SSS,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_SSS + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[3] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_SSS_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_SSS_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[4] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_FIMC0,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_FIMC0 + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[5] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_FIMC0_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_FIMC0_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[6] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_FIMC1,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_FIMC1 + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[7] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_FIMC1_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_FIMC1_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[8] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_FIMC2,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_FIMC2 + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[9] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_FIMC2_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_FIMC2_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[10] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_FIMC3,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_FIMC3 + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[11] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_FIMC3_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_FIMC3_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[12] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_JPEG,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_JPEG + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[13] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_JPEG_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_JPEG_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[14] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_FIMD0,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_FIMD0 + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[15] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_LCD0_M0_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_LCD0_M0_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[16] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_FIMD1,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_FIMD1 + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[17] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_LCD1_M1_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_LCD1_M1_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[18] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_PCIe,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_PCIe + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[19] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_PCIE_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_PCIE_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[20] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_G2D,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_G2D + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[21] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_2D_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_2D_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[22] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_ROTATOR,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_ROTATOR + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[23] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_ROTATOR_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_ROTATOR_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[24] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_MDMA2,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_MDMA2 + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[25] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_MDMA1_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_MDMA1_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[26] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_TV,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_TV + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[27] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_TV_M0_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_TV_M0_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[28] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_MFC_L,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_MFC_L + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[29] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_MFC_M0_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_MFC_M0_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-	[30] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SYSMMU_MFC_R,</div><div class='del'>-		.end	= EXYNOS4_PA_SYSMMU_MFC_R + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[31] = {</div><div class='del'>-		.start	= IRQ_SYSMMU_MFC_M1_0,</div><div class='del'>-		.end	= IRQ_SYSMMU_MFC_M1_0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='add'>+static u64 exynos_sysmmu_dma_mask = DMA_BIT_MASK(32);</div><div class='add'>+</div><div class='add'>+#define SYSMMU_PLATFORM_DEVICE(ipname, devid)				\</div><div class='add'>+static struct sysmmu_platform_data platdata_##ipname = {		\</div><div class='add'>+	.dbgname = #ipname,						\</div><div class='add'>+};									\</div><div class='add'>+struct platform_device SYSMMU_PLATDEV(ipname) =				\</div><div class='add'>+{									\</div><div class='add'>+	.name		= SYSMMU_DEVNAME_BASE,				\</div><div class='add'>+	.id		= devid,					\</div><div class='add'>+	.dev		= {						\</div><div class='add'>+		.dma_mask		= &amp;exynos_sysmmu_dma_mask,	\</div><div class='add'>+		.coherent_dma_mask	= DMA_BIT_MASK(32),		\</div><div class='add'>+		.platform_data		= &amp;platdata_##ipname,		\</div><div class='add'>+	},								\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(mfc_l,	0);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(mfc_r,	1);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(tv,	2);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(jpeg,	3);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(rot,	4);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(fimc0,	5); /* fimc* and gsc* exist exclusively */</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(fimc1,	6);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(fimc2,	7);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(fimc3,	8);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(gsc0,	5);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(gsc1,	6);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(gsc2,	7);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(gsc3,	8);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(isp,	9);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(fimd0,	10);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(fimd1,	11);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(camif0,	12);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(camif1,	13);</div><div class='add'>+SYSMMU_PLATFORM_DEVICE(2d,	14);</div><div class='add'>+</div><div class='add'>+#define SYSMMU_RESOURCE_NAME(core, ipname) sysmmures_##core##_##ipname</div><div class='add'>+</div><div class='add'>+#define SYSMMU_RESOURCE(core, ipname)					\</div><div class='add'>+	static struct resource SYSMMU_RESOURCE_NAME(core, ipname)[] __initdata =</div><div class='add'>+</div><div class='add'>+#define DEFINE_SYSMMU_RESOURCE(core, mem, irq)				\</div><div class='add'>+	DEFINE_RES_MEM_NAMED(core##_PA_SYSMMU_##mem, SZ_4K, #mem),	\</div><div class='add'>+	DEFINE_RES_IRQ_NAMED(core##_IRQ_SYSMMU_##irq##_0, #mem)</div><div class='add'>+</div><div class='add'>+#define SYSMMU_RESOURCE_DEFINE(core, ipname, mem, irq)			\</div><div class='add'>+	SYSMMU_RESOURCE(core, ipname) {					\</div><div class='add'>+		DEFINE_SYSMMU_RESOURCE(core, mem, irq)			\</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-struct platform_device exynos4_device_sysmmu = {</div><div class='del'>-	.name		= "s5p-sysmmu",</div><div class='del'>-	.id		= 32,</div><div class='del'>-	.num_resources	= ARRAY_SIZE(exynos4_sysmmu_resource),</div><div class='del'>-	.resource	= exynos4_sysmmu_resource,</div><div class='add'>+struct sysmmu_resource_map {</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	u32 rnum;</div><div class='add'>+	struct device *pdd;</div><div class='add'>+	char *clocknames;</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL(exynos4_device_sysmmu);</div><div class='ctx'> </div><div class='del'>-static struct clk *sysmmu_clk[S5P_SYSMMU_TOTAL_IPNUM];</div><div class='del'>-void sysmmu_clk_init(struct device *dev, sysmmu_ips ips)</div><div class='del'>-{</div><div class='del'>-	sysmmu_clk[ips] = clk_get(dev, sysmmu_ips_name[ips]);</div><div class='del'>-	if (IS_ERR(sysmmu_clk[ips]))</div><div class='del'>-		sysmmu_clk[ips] = NULL;</div><div class='del'>-	else</div><div class='del'>-		clk_put(sysmmu_clk[ips]);</div><div class='add'>+#define SYSMMU_RESOURCE_MAPPING(core, ipname, resname) {		\</div><div class='add'>+	.pdev = &amp;SYSMMU_PLATDEV(ipname),				\</div><div class='add'>+	.res = SYSMMU_RESOURCE_NAME(EXYNOS##core, resname),		\</div><div class='add'>+	.rnum = ARRAY_SIZE(SYSMMU_RESOURCE_NAME(EXYNOS##core, resname)),\</div><div class='add'>+	.clocknames = SYSMMU_CLOCK_NAME,				\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void sysmmu_clk_enable(sysmmu_ips ips)</div><div class='del'>-{</div><div class='del'>-	if (sysmmu_clk[ips])</div><div class='del'>-		clk_enable(sysmmu_clk[ips]);</div><div class='add'>+#define SYSMMU_RESOURCE_MAPPING_MC(core, ipname, resname, pdata) {	\</div><div class='add'>+	.pdev = &amp;SYSMMU_PLATDEV(ipname),				\</div><div class='add'>+	.res = SYSMMU_RESOURCE_NAME(EXYNOS##core, resname),		\</div><div class='add'>+	.rnum = ARRAY_SIZE(SYSMMU_RESOURCE_NAME(EXYNOS##core, resname)),\</div><div class='add'>+	.clocknames = SYSMMU_CLOCK_NAME "," SYSMMU_CLOCK_NAME2,		\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXYNOS_DEV_PD</div><div class='add'>+#define SYSMMU_RESOURCE_MAPPING_PD(core, ipname, resname, pd) {		\</div><div class='add'>+	.pdev = &amp;SYSMMU_PLATDEV(ipname),				\</div><div class='add'>+	.res = &amp;SYSMMU_RESOURCE_NAME(EXYNOS##core, resname),		\</div><div class='add'>+	.rnum = ARRAY_SIZE(SYSMMU_RESOURCE_NAME(EXYNOS##core, resname)),\</div><div class='add'>+	.clocknames = SYSMMU_CLOCK_NAME,				\</div><div class='add'>+	.pdd = &amp;exynos##core##_device_pd[pd].dev,			\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define SYSMMU_RESOURCE_MAPPING_MCPD(core, ipname, resname, pd, pdata) {\</div><div class='add'>+	.pdev = &amp;SYSMMU_PLATDEV(ipname),				\</div><div class='add'>+	.res = &amp;SYSMMU_RESOURCE_NAME(EXYNOS##core, resname),		\</div><div class='add'>+	.rnum = ARRAY_SIZE(SYSMMU_RESOURCE_NAME(EXYNOS##core, resname)),\</div><div class='add'>+	.clocknames = SYSMMU_CLOCK_NAME "," SYSMMU_CLOCK_NAME2,		\</div><div class='add'>+	.pdd = &amp;exynos##core##_device_pd[pd].dev,			\</div><div class='ctx'> }</div><div class='add'>+#else</div><div class='add'>+#define SYSMMU_RESOURCE_MAPPING_PD(core, ipname, resname, pd)		\</div><div class='add'>+		SYSMMU_RESOURCE_MAPPING(core, ipname, resname)</div><div class='add'>+#define SYSMMU_RESOURCE_MAPPING_MCPD(core, ipname, resname, pd, pdata)	\</div><div class='add'>+		SYSMMU_RESOURCE_MAPPING_MC(core, ipname, resname, pdata)</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_EXYNOS_DEV_PD */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARCH_EXYNOS4</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimc0,	FIMC0,	FIMC0);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimc1,	FIMC1,	FIMC1);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimc2,	FIMC2,	FIMC2);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimc3,	FIMC3,	FIMC3);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, jpeg,	JPEG,	JPEG);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, 2d,	G2D,	2D);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, tv,	TV,	TV_M0);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, 2d_acp,	2D_ACP,	2D);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, rot,	ROTATOR, ROTATOR);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimd0,	FIMD0,	LCD0_M0);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, fimd1,	FIMD1,	LCD1_M1);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, flite0,	FIMC_LITE0, FIMC_LITE0);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, flite1,	FIMC_LITE1, FIMC_LITE1);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, mfc_r,	MFC_R,	MFC_M0);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS4, mfc_l,	MFC_L,	MFC_M1);</div><div class='add'>+SYSMMU_RESOURCE(EXYNOS4, isp) {</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS4, FIMC_ISP, FIMC_ISP),</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS4, FIMC_DRC, FIMC_DRC),</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS4, FIMC_FD, FIMC_FD),</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS4, ISPCPU, FIMC_CX),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sysmmu_resource_map sysmmu_resmap4[] __initdata = {</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4, fimc0,	fimc0,	PD_CAM),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4, fimc1,	fimc1,	PD_CAM),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4, fimc2,	fimc2,	PD_CAM),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4, fimc3,	fimc3,	PD_CAM),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4, tv,	tv,	PD_TV),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4, mfc_r,	mfc_r,	PD_MFC),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4, mfc_l,	mfc_l,	PD_MFC),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4, rot,	rot,	PD_LCD0),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4, jpeg,	jpeg,	PD_CAM),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4, fimd0,	fimd0,	PD_LCD0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sysmmu_resource_map sysmmu_resmap4210[] __initdata = {</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4, 2d,	2d,	PD_LCD0),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4, fimd1,	fimd1,	PD_LCD1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sysmmu_resource_map sysmmu_resmap4212[] __initdata = {</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING(4,	2d,	2d_acp),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4,	camif0, flite0,	PD_ISP),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4,	camif1, flite1,	PD_ISP),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(4,	isp,	isp,	PD_ISP),</div><div class='add'>+};</div><div class='add'>+#endif /* CONFIG_ARCH_EXYNOS4 */</div><div class='ctx'> </div><div class='del'>-void sysmmu_clk_disable(sysmmu_ips ips)</div><div class='add'>+#ifdef CONFIG_ARCH_EXYNOS5</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, jpeg,	JPEG,	JPEG);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, fimd1,	FIMD1,	FIMD1);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, 2d,	2D,	2D);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, rot,	ROTATOR, ROTATOR);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, tv,	TV,	TV);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, flite0,	LITE0,	LITE0);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, flite1,	LITE1,	LITE1);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, gsc0,	GSC0,	GSC0);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, gsc1,	GSC1,	GSC1);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, gsc2,	GSC2,	GSC2);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, gsc3,	GSC3,	GSC3);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, mfc_r,	MFC_R,	MFC_R);</div><div class='add'>+SYSMMU_RESOURCE_DEFINE(EXYNOS5, mfc_l,	MFC_L,	MFC_L);</div><div class='add'>+SYSMMU_RESOURCE(EXYNOS5, isp) {</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS5, ISP, ISP),</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS5, DRC, DRC),</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS5, FD, FD),</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS5, ISPCPU, MCUISP),</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS5, SCALERC, SCALERCISP),</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS5, SCALERP, SCALERPISP),</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS5,	ODC, ODC),</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS5, DIS0, DIS0),</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS5, DIS1, DIS1),</div><div class='add'>+	DEFINE_SYSMMU_RESOURCE(EXYNOS5, 3DNR, 3DNR),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sysmmu_resource_map sysmmu_resmap5[] __initdata = {</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING(5,	jpeg,	jpeg),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING(5,	fimd1,	fimd1),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING(5,	2d,	2d),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING(5,	rot,	rot),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(5,	tv,	tv,	PD_DISP1),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(5,	camif0,	flite0,	PD_GSCL),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(5,	camif1,	flite1,	PD_GSCL),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(5,	gsc0,	gsc0,	PD_GSCL),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(5,	gsc1,	gsc1,	PD_GSCL),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(5,	gsc2,	gsc2,	PD_GSCL),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(5,	gsc3,	gsc3,	PD_GSCL),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(5,	mfc_r,	mfc_r,	PD_MFC),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_PD(5,	mfc_l,	mfc_l,	PD_MFC),</div><div class='add'>+	SYSMMU_RESOURCE_MAPPING_MCPD(5,	isp,	isp,	PD_ISP, mc_platdata),</div><div class='add'>+};</div><div class='add'>+#endif /* CONFIG_ARCH_EXYNOS5 */</div><div class='add'>+</div><div class='add'>+static int __init init_sysmmu_platform_device(void)</div><div class='ctx'> {</div><div class='del'>-	if (sysmmu_clk[ips])</div><div class='del'>-		clk_disable(sysmmu_clk[ips]);</div><div class='add'>+	int i, j;</div><div class='add'>+	struct sysmmu_resource_map *resmap[2] = {NULL, NULL};</div><div class='add'>+	int nmap[2] = {0, 0};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARCH_EXYNOS5</div><div class='add'>+	if (soc_is_exynos5250()) {</div><div class='add'>+		resmap[0] = sysmmu_resmap5;</div><div class='add'>+		nmap[0] = ARRAY_SIZE(sysmmu_resmap5);</div><div class='add'>+		nmap[1] = 0;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARCH_EXYNOS4</div><div class='add'>+	if (resmap[0] == NULL) {</div><div class='add'>+		resmap[0] = sysmmu_resmap4;</div><div class='add'>+		nmap[0] = ARRAY_SIZE(sysmmu_resmap4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (soc_is_exynos4210()) {</div><div class='add'>+		resmap[1] = sysmmu_resmap4210;</div><div class='add'>+		nmap[1] = ARRAY_SIZE(sysmmu_resmap4210);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (soc_is_exynos4412() || soc_is_exynos4212()) {</div><div class='add'>+		resmap[1] = sysmmu_resmap4212;</div><div class='add'>+		nmap[1] = ARRAY_SIZE(sysmmu_resmap4212);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; 2; j++) {</div><div class='add'>+		for (i = 0; i &lt; nmap[j]; i++) {</div><div class='add'>+			struct sysmmu_resource_map *map;</div><div class='add'>+			struct sysmmu_platform_data *platdata;</div><div class='add'>+</div><div class='add'>+			map = &amp;resmap[j][i];</div><div class='add'>+</div><div class='add'>+			map-&gt;pdev-&gt;dev.parent = map-&gt;pdd;</div><div class='add'>+</div><div class='add'>+			platdata = map-&gt;pdev-&gt;dev.platform_data;</div><div class='add'>+			platdata-&gt;clockname = map-&gt;clocknames;</div><div class='add'>+</div><div class='add'>+			if (platform_device_add_resources(map-&gt;pdev, map-&gt;res,</div><div class='add'>+								map-&gt;rnum)) {</div><div class='add'>+				pr_err("%s: Failed to add device resources for "</div><div class='add'>+						"%s.%d\n", __func__,</div><div class='add'>+						map-&gt;pdev-&gt;name, map-&gt;pdev-&gt;id);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (platform_device_register(map-&gt;pdev)) {</div><div class='add'>+				pr_err("%s: Failed to register %s.%d\n",</div><div class='add'>+					__func__, map-&gt;pdev-&gt;name,</div><div class='add'>+						map-&gt;pdev-&gt;id);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='add'>+arch_initcall(init_sysmmu_platform_device);</div><div class='head'>diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c<br/>index 69aaa4503205..f60b66dbcf84 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/dma.c</a></div><div class='hunk'>@@ -103,10 +103,45 @@ static u8 exynos4212_pdma0_peri[] = {</div><div class='ctx'> 	DMACH_MIPI_HSI5,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct dma_pl330_platdata exynos4_pdma0_pdata;</div><div class='add'>+static u8 exynos5250_pdma0_peri[] = {</div><div class='add'>+	DMACH_PCM0_RX,</div><div class='add'>+	DMACH_PCM0_TX,</div><div class='add'>+	DMACH_PCM2_RX,</div><div class='add'>+	DMACH_PCM2_TX,</div><div class='add'>+	DMACH_SPI0_RX,</div><div class='add'>+	DMACH_SPI0_TX,</div><div class='add'>+	DMACH_SPI2_RX,</div><div class='add'>+	DMACH_SPI2_TX,</div><div class='add'>+	DMACH_I2S0S_TX,</div><div class='add'>+	DMACH_I2S0_RX,</div><div class='add'>+	DMACH_I2S0_TX,</div><div class='add'>+	DMACH_I2S2_RX,</div><div class='add'>+	DMACH_I2S2_TX,</div><div class='add'>+	DMACH_UART0_RX,</div><div class='add'>+	DMACH_UART0_TX,</div><div class='add'>+	DMACH_UART2_RX,</div><div class='add'>+	DMACH_UART2_TX,</div><div class='add'>+	DMACH_UART4_RX,</div><div class='add'>+	DMACH_UART4_TX,</div><div class='add'>+	DMACH_SLIMBUS0_RX,</div><div class='add'>+	DMACH_SLIMBUS0_TX,</div><div class='add'>+	DMACH_SLIMBUS2_RX,</div><div class='add'>+	DMACH_SLIMBUS2_TX,</div><div class='add'>+	DMACH_SLIMBUS4_RX,</div><div class='add'>+	DMACH_SLIMBUS4_TX,</div><div class='add'>+	DMACH_AC97_MICIN,</div><div class='add'>+	DMACH_AC97_PCMIN,</div><div class='add'>+	DMACH_AC97_PCMOUT,</div><div class='add'>+	DMACH_MIPI_HSI0,</div><div class='add'>+	DMACH_MIPI_HSI2,</div><div class='add'>+	DMACH_MIPI_HSI4,</div><div class='add'>+	DMACH_MIPI_HSI6,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dma_pl330_platdata exynos_pdma0_pdata;</div><div class='ctx'> </div><div class='del'>-static AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330,</div><div class='del'>-	EXYNOS4_PA_PDMA0, {EXYNOS4_IRQ_PDMA0}, &amp;exynos4_pdma0_pdata);</div><div class='add'>+static AMBA_AHB_DEVICE(exynos_pdma0, "dma-pl330.0", 0x00041330,</div><div class='add'>+	EXYNOS4_PA_PDMA0, {EXYNOS4_IRQ_PDMA0}, &amp;exynos_pdma0_pdata);</div><div class='ctx'> </div><div class='ctx'> static u8 exynos4210_pdma1_peri[] = {</div><div class='ctx'> 	DMACH_PCM0_RX,</div><div class='hunk'>@@ -169,10 +204,45 @@ static u8 exynos4212_pdma1_peri[] = {</div><div class='ctx'> 	DMACH_MIPI_HSI7,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct dma_pl330_platdata exynos4_pdma1_pdata;</div><div class='add'>+static u8 exynos5250_pdma1_peri[] = {</div><div class='add'>+	DMACH_PCM0_RX,</div><div class='add'>+	DMACH_PCM0_TX,</div><div class='add'>+	DMACH_PCM1_RX,</div><div class='add'>+	DMACH_PCM1_TX,</div><div class='add'>+	DMACH_SPI1_RX,</div><div class='add'>+	DMACH_SPI1_TX,</div><div class='add'>+	DMACH_PWM,</div><div class='add'>+	DMACH_SPDIF,</div><div class='add'>+	DMACH_I2S0S_TX,</div><div class='add'>+	DMACH_I2S0_RX,</div><div class='add'>+	DMACH_I2S0_TX,</div><div class='add'>+	DMACH_I2S1_RX,</div><div class='add'>+	DMACH_I2S1_TX,</div><div class='add'>+	DMACH_UART0_RX,</div><div class='add'>+	DMACH_UART0_TX,</div><div class='add'>+	DMACH_UART1_RX,</div><div class='add'>+	DMACH_UART1_TX,</div><div class='add'>+	DMACH_UART3_RX,</div><div class='add'>+	DMACH_UART3_TX,</div><div class='add'>+	DMACH_SLIMBUS1_RX,</div><div class='add'>+	DMACH_SLIMBUS1_TX,</div><div class='add'>+	DMACH_SLIMBUS3_RX,</div><div class='add'>+	DMACH_SLIMBUS3_TX,</div><div class='add'>+	DMACH_SLIMBUS5_RX,</div><div class='add'>+	DMACH_SLIMBUS5_TX,</div><div class='add'>+	DMACH_SLIMBUS0AUX_RX,</div><div class='add'>+	DMACH_SLIMBUS0AUX_TX,</div><div class='add'>+	DMACH_DISP1,</div><div class='add'>+	DMACH_MIPI_HSI1,</div><div class='add'>+	DMACH_MIPI_HSI3,</div><div class='add'>+	DMACH_MIPI_HSI5,</div><div class='add'>+	DMACH_MIPI_HSI7,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static AMBA_AHB_DEVICE(exynos4_pdma1,  "dma-pl330.1", 0x00041330,</div><div class='del'>-	EXYNOS4_PA_PDMA1, {EXYNOS4_IRQ_PDMA1}, &amp;exynos4_pdma1_pdata);</div><div class='add'>+static struct dma_pl330_platdata exynos_pdma1_pdata;</div><div class='add'>+</div><div class='add'>+static AMBA_AHB_DEVICE(exynos_pdma1,  "dma-pl330.1", 0x00041330,</div><div class='add'>+	EXYNOS4_PA_PDMA1, {EXYNOS4_IRQ_PDMA1}, &amp;exynos_pdma1_pdata);</div><div class='ctx'> </div><div class='ctx'> static u8 mdma_peri[] = {</div><div class='ctx'> 	DMACH_MTOM_0,</div><div class='hunk'>@@ -185,46 +255,63 @@ static u8 mdma_peri[] = {</div><div class='ctx'> 	DMACH_MTOM_7,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct dma_pl330_platdata exynos4_mdma1_pdata = {</div><div class='add'>+static struct dma_pl330_platdata exynos_mdma1_pdata = {</div><div class='ctx'> 	.nr_valid_peri = ARRAY_SIZE(mdma_peri),</div><div class='ctx'> 	.peri_id = mdma_peri,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static AMBA_AHB_DEVICE(exynos4_mdma1,  "dma-pl330.2", 0x00041330,</div><div class='del'>-	EXYNOS4_PA_MDMA1, {EXYNOS4_IRQ_MDMA1}, &amp;exynos4_mdma1_pdata);</div><div class='add'>+static AMBA_AHB_DEVICE(exynos_mdma1,  "dma-pl330.2", 0x00041330,</div><div class='add'>+	EXYNOS4_PA_MDMA1, {EXYNOS4_IRQ_MDMA1}, &amp;exynos_mdma1_pdata);</div><div class='ctx'> </div><div class='del'>-static int __init exynos4_dma_init(void)</div><div class='add'>+static int __init exynos_dma_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (of_have_populated_dt())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (soc_is_exynos4210()) {</div><div class='del'>-		exynos4_pdma0_pdata.nr_valid_peri =</div><div class='add'>+		exynos_pdma0_pdata.nr_valid_peri =</div><div class='ctx'> 			ARRAY_SIZE(exynos4210_pdma0_peri);</div><div class='del'>-		exynos4_pdma0_pdata.peri_id = exynos4210_pdma0_peri;</div><div class='del'>-		exynos4_pdma1_pdata.nr_valid_peri =</div><div class='add'>+		exynos_pdma0_pdata.peri_id = exynos4210_pdma0_peri;</div><div class='add'>+		exynos_pdma1_pdata.nr_valid_peri =</div><div class='ctx'> 			ARRAY_SIZE(exynos4210_pdma1_peri);</div><div class='del'>-		exynos4_pdma1_pdata.peri_id = exynos4210_pdma1_peri;</div><div class='add'>+		exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri;</div><div class='ctx'> 	} else if (soc_is_exynos4212() || soc_is_exynos4412()) {</div><div class='del'>-		exynos4_pdma0_pdata.nr_valid_peri =</div><div class='add'>+		exynos_pdma0_pdata.nr_valid_peri =</div><div class='ctx'> 			ARRAY_SIZE(exynos4212_pdma0_peri);</div><div class='del'>-		exynos4_pdma0_pdata.peri_id = exynos4212_pdma0_peri;</div><div class='del'>-		exynos4_pdma1_pdata.nr_valid_peri =</div><div class='add'>+		exynos_pdma0_pdata.peri_id = exynos4212_pdma0_peri;</div><div class='add'>+		exynos_pdma1_pdata.nr_valid_peri =</div><div class='ctx'> 			ARRAY_SIZE(exynos4212_pdma1_peri);</div><div class='del'>-		exynos4_pdma1_pdata.peri_id = exynos4212_pdma1_peri;</div><div class='add'>+		exynos_pdma1_pdata.peri_id = exynos4212_pdma1_peri;</div><div class='add'>+	} else if (soc_is_exynos5250()) {</div><div class='add'>+		exynos_pdma0_pdata.nr_valid_peri =</div><div class='add'>+			ARRAY_SIZE(exynos5250_pdma0_peri);</div><div class='add'>+		exynos_pdma0_pdata.peri_id = exynos5250_pdma0_peri;</div><div class='add'>+		exynos_pdma1_pdata.nr_valid_peri =</div><div class='add'>+			ARRAY_SIZE(exynos5250_pdma1_peri);</div><div class='add'>+		exynos_pdma1_pdata.peri_id = exynos5250_pdma1_peri;</div><div class='add'>+</div><div class='add'>+		exynos_pdma0_device.res.start = EXYNOS5_PA_PDMA0;</div><div class='add'>+		exynos_pdma0_device.res.end = EXYNOS5_PA_PDMA0 + SZ_4K;</div><div class='add'>+		exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_PDMA0;</div><div class='add'>+		exynos_pdma1_device.res.start = EXYNOS5_PA_PDMA1;</div><div class='add'>+		exynos_pdma1_device.res.end = EXYNOS5_PA_PDMA1 + SZ_4K;</div><div class='add'>+		exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_PDMA1;</div><div class='add'>+		exynos_mdma1_device.res.start = EXYNOS5_PA_MDMA1;</div><div class='add'>+		exynos_mdma1_device.res.end = EXYNOS5_PA_MDMA1 + SZ_4K;</div><div class='add'>+		exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_MDMA1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);</div><div class='del'>-	dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);</div><div class='del'>-	amba_device_register(&amp;exynos4_pdma0_device, &amp;iomem_resource);</div><div class='add'>+	dma_cap_set(DMA_SLAVE, exynos_pdma0_pdata.cap_mask);</div><div class='add'>+	dma_cap_set(DMA_CYCLIC, exynos_pdma0_pdata.cap_mask);</div><div class='add'>+	amba_device_register(&amp;exynos_pdma0_device, &amp;iomem_resource);</div><div class='ctx'> </div><div class='del'>-	dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);</div><div class='del'>-	dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);</div><div class='del'>-	amba_device_register(&amp;exynos4_pdma1_device, &amp;iomem_resource);</div><div class='add'>+	dma_cap_set(DMA_SLAVE, exynos_pdma1_pdata.cap_mask);</div><div class='add'>+	dma_cap_set(DMA_CYCLIC, exynos_pdma1_pdata.cap_mask);</div><div class='add'>+	amba_device_register(&amp;exynos_pdma1_device, &amp;iomem_resource);</div><div class='ctx'> </div><div class='del'>-	dma_cap_set(DMA_MEMCPY, exynos4_mdma1_pdata.cap_mask);</div><div class='del'>-	amba_device_register(&amp;exynos4_mdma1_device, &amp;iomem_resource);</div><div class='add'>+	dma_cap_set(DMA_MEMCPY, exynos_mdma1_pdata.cap_mask);</div><div class='add'>+	amba_device_register(&amp;exynos_mdma1_device, &amp;iomem_resource);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(exynos4_dma_init);</div><div class='add'>+arch_initcall(exynos_dma_init);</div><div class='head'>diff --git a/arch/arm/mach-exynos/include/mach/gpio.h b/arch/arm/mach-exynos/include/mach/gpio.h<br/>index d7498afe036a..eb24f1eb8e3b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/include/mach/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/gpio.h</a></div><div class='hunk'>@@ -153,10 +153,11 @@ enum exynos4_gpio_number {</div><div class='ctx'> #define EXYNOS5_GPIO_B2_NR	(4)</div><div class='ctx'> #define EXYNOS5_GPIO_B3_NR	(4)</div><div class='ctx'> #define EXYNOS5_GPIO_C0_NR	(7)</div><div class='del'>-#define EXYNOS5_GPIO_C1_NR	(7)</div><div class='add'>+#define EXYNOS5_GPIO_C1_NR	(4)</div><div class='ctx'> #define EXYNOS5_GPIO_C2_NR	(7)</div><div class='ctx'> #define EXYNOS5_GPIO_C3_NR	(7)</div><div class='del'>-#define EXYNOS5_GPIO_D0_NR	(8)</div><div class='add'>+#define EXYNOS5_GPIO_C4_NR	(7)</div><div class='add'>+#define EXYNOS5_GPIO_D0_NR	(4)</div><div class='ctx'> #define EXYNOS5_GPIO_D1_NR	(8)</div><div class='ctx'> #define EXYNOS5_GPIO_Y0_NR	(6)</div><div class='ctx'> #define EXYNOS5_GPIO_Y1_NR	(4)</div><div class='hunk'>@@ -199,7 +200,8 @@ enum exynos5_gpio_number {</div><div class='ctx'> 	EXYNOS5_GPIO_C1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C0),</div><div class='ctx'> 	EXYNOS5_GPIO_C2_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C1),</div><div class='ctx'> 	EXYNOS5_GPIO_C3_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C2),</div><div class='del'>-	EXYNOS5_GPIO_D0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C3),</div><div class='add'>+	EXYNOS5_GPIO_C4_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C3),</div><div class='add'>+	EXYNOS5_GPIO_D0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C4),</div><div class='ctx'> 	EXYNOS5_GPIO_D1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_D0),</div><div class='ctx'> 	EXYNOS5_GPIO_Y0_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_D1),</div><div class='ctx'> 	EXYNOS5_GPIO_Y1_START		= EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y0),</div><div class='hunk'>@@ -242,6 +244,7 @@ enum exynos5_gpio_number {</div><div class='ctx'> #define EXYNOS5_GPC1(_nr)	(EXYNOS5_GPIO_C1_START + (_nr))</div><div class='ctx'> #define EXYNOS5_GPC2(_nr)	(EXYNOS5_GPIO_C2_START + (_nr))</div><div class='ctx'> #define EXYNOS5_GPC3(_nr)	(EXYNOS5_GPIO_C3_START + (_nr))</div><div class='add'>+#define EXYNOS5_GPC4(_nr)	(EXYNOS5_GPIO_C4_START + (_nr))</div><div class='ctx'> #define EXYNOS5_GPD0(_nr)	(EXYNOS5_GPIO_D0_START + (_nr))</div><div class='ctx'> #define EXYNOS5_GPD1(_nr)	(EXYNOS5_GPIO_D1_START + (_nr))</div><div class='ctx'> #define EXYNOS5_GPY0(_nr)	(EXYNOS5_GPIO_Y0_START + (_nr))</div><div class='head'>diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h<br/>index 591e78521a9f..7a4b4789eb72 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/irqs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/include/mach/irqs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/irqs.h</a></div><div class='hunk'>@@ -154,6 +154,13 @@</div><div class='ctx'> #define EXYNOS4_IRQ_SYSMMU_MFC_M1_0	COMBINER_IRQ(5, 6)</div><div class='ctx'> #define EXYNOS4_IRQ_SYSMMU_PCIE_0	COMBINER_IRQ(5, 7)</div><div class='ctx'> </div><div class='add'>+#define EXYNOS4_IRQ_SYSMMU_FIMC_LITE0_0	COMBINER_IRQ(16, 0)</div><div class='add'>+#define EXYNOS4_IRQ_SYSMMU_FIMC_LITE1_0	COMBINER_IRQ(16, 1)</div><div class='add'>+#define EXYNOS4_IRQ_SYSMMU_FIMC_ISP_0	COMBINER_IRQ(16, 2)</div><div class='add'>+#define EXYNOS4_IRQ_SYSMMU_FIMC_DRC_0	COMBINER_IRQ(16, 3)</div><div class='add'>+#define EXYNOS4_IRQ_SYSMMU_FIMC_FD_0	COMBINER_IRQ(16, 4)</div><div class='add'>+#define EXYNOS4_IRQ_SYSMMU_FIMC_CX_0	COMBINER_IRQ(16, 5)</div><div class='add'>+</div><div class='ctx'> #define EXYNOS4_IRQ_FIMD0_FIFO		COMBINER_IRQ(11, 0)</div><div class='ctx'> #define EXYNOS4_IRQ_FIMD0_VSYNC		COMBINER_IRQ(11, 1)</div><div class='ctx'> #define EXYNOS4_IRQ_FIMD0_SYSTEM	COMBINER_IRQ(11, 2)</div><div class='hunk'>@@ -189,6 +196,7 @@</div><div class='ctx'> #define IRQ_IIC7			EXYNOS4_IRQ_IIC7</div><div class='ctx'> </div><div class='ctx'> #define IRQ_USB_HOST			EXYNOS4_IRQ_USB_HOST</div><div class='add'>+#define IRQ_OTG				EXYNOS4_IRQ_USB_HSOTG</div><div class='ctx'> </div><div class='ctx'> #define IRQ_HSMMC0			EXYNOS4_IRQ_HSMMC0</div><div class='ctx'> #define IRQ_HSMMC1			EXYNOS4_IRQ_HSMMC1</div><div class='hunk'>@@ -220,24 +228,6 @@</div><div class='ctx'> #define IRQ_KEYPAD			EXYNOS4_IRQ_KEYPAD</div><div class='ctx'> #define IRQ_PMU				EXYNOS4_IRQ_PMU</div><div class='ctx'> </div><div class='del'>-#define IRQ_SYSMMU_MDMA0_0		EXYNOS4_IRQ_SYSMMU_MDMA0_0</div><div class='del'>-#define IRQ_SYSMMU_SSS_0                EXYNOS4_IRQ_SYSMMU_SSS_0</div><div class='del'>-#define IRQ_SYSMMU_FIMC0_0              EXYNOS4_IRQ_SYSMMU_FIMC0_0</div><div class='del'>-#define IRQ_SYSMMU_FIMC1_0              EXYNOS4_IRQ_SYSMMU_FIMC1_0</div><div class='del'>-#define IRQ_SYSMMU_FIMC2_0              EXYNOS4_IRQ_SYSMMU_FIMC2_0</div><div class='del'>-#define IRQ_SYSMMU_FIMC3_0              EXYNOS4_IRQ_SYSMMU_FIMC3_0</div><div class='del'>-#define IRQ_SYSMMU_JPEG_0               EXYNOS4_IRQ_SYSMMU_JPEG_0</div><div class='del'>-#define IRQ_SYSMMU_2D_0                 EXYNOS4_IRQ_SYSMMU_2D_0</div><div class='del'>-</div><div class='del'>-#define IRQ_SYSMMU_ROTATOR_0            EXYNOS4_IRQ_SYSMMU_ROTATOR_0</div><div class='del'>-#define IRQ_SYSMMU_MDMA1_0              EXYNOS4_IRQ_SYSMMU_MDMA1_0</div><div class='del'>-#define IRQ_SYSMMU_LCD0_M0_0            EXYNOS4_IRQ_SYSMMU_LCD0_M0_0</div><div class='del'>-#define IRQ_SYSMMU_LCD1_M1_0            EXYNOS4_IRQ_SYSMMU_LCD1_M1_0</div><div class='del'>-#define IRQ_SYSMMU_TV_M0_0              EXYNOS4_IRQ_SYSMMU_TV_M0_0</div><div class='del'>-#define IRQ_SYSMMU_MFC_M0_0             EXYNOS4_IRQ_SYSMMU_MFC_M0_0</div><div class='del'>-#define IRQ_SYSMMU_MFC_M1_0             EXYNOS4_IRQ_SYSMMU_MFC_M1_0</div><div class='del'>-#define IRQ_SYSMMU_PCIE_0               EXYNOS4_IRQ_SYSMMU_PCIE_0</div><div class='del'>-</div><div class='ctx'> #define IRQ_FIMD0_FIFO			EXYNOS4_IRQ_FIMD0_FIFO</div><div class='ctx'> #define IRQ_FIMD0_VSYNC			EXYNOS4_IRQ_FIMD0_VSYNC</div><div class='ctx'> #define IRQ_FIMD0_SYSTEM		EXYNOS4_IRQ_FIMD0_SYSTEM</div><div class='hunk'>@@ -297,6 +287,7 @@</div><div class='ctx'> #define EXYNOS5_IRQ_MIPICSI1		IRQ_SPI(80)</div><div class='ctx'> #define EXYNOS5_IRQ_EFNFCON_DMA_ABORT	IRQ_SPI(81)</div><div class='ctx'> #define EXYNOS5_IRQ_MIPIDSI0		IRQ_SPI(82)</div><div class='add'>+#define EXYNOS5_IRQ_WDT_IOP		IRQ_SPI(83)</div><div class='ctx'> #define EXYNOS5_IRQ_ROTATOR		IRQ_SPI(84)</div><div class='ctx'> #define EXYNOS5_IRQ_GSC0		IRQ_SPI(85)</div><div class='ctx'> #define EXYNOS5_IRQ_GSC1		IRQ_SPI(86)</div><div class='hunk'>@@ -305,8 +296,8 @@</div><div class='ctx'> #define EXYNOS5_IRQ_JPEG		IRQ_SPI(89)</div><div class='ctx'> #define EXYNOS5_IRQ_EFNFCON_DMA		IRQ_SPI(90)</div><div class='ctx'> #define EXYNOS5_IRQ_2D			IRQ_SPI(91)</div><div class='del'>-#define EXYNOS5_IRQ_SFMC0		IRQ_SPI(92)</div><div class='del'>-#define EXYNOS5_IRQ_SFMC1		IRQ_SPI(93)</div><div class='add'>+#define EXYNOS5_IRQ_EFNFCON_0		IRQ_SPI(92)</div><div class='add'>+#define EXYNOS5_IRQ_EFNFCON_1		IRQ_SPI(93)</div><div class='ctx'> #define EXYNOS5_IRQ_MIXER		IRQ_SPI(94)</div><div class='ctx'> #define EXYNOS5_IRQ_HDMI		IRQ_SPI(95)</div><div class='ctx'> #define EXYNOS5_IRQ_MFC			IRQ_SPI(96)</div><div class='hunk'>@@ -320,7 +311,7 @@</div><div class='ctx'> #define EXYNOS5_IRQ_PCM2		IRQ_SPI(104)</div><div class='ctx'> #define EXYNOS5_IRQ_SPDIF		IRQ_SPI(105)</div><div class='ctx'> #define EXYNOS5_IRQ_ADC0		IRQ_SPI(106)</div><div class='del'>-</div><div class='add'>+#define EXYNOS5_IRQ_ADC1		IRQ_SPI(107)</div><div class='ctx'> #define EXYNOS5_IRQ_SATA_PHY		IRQ_SPI(108)</div><div class='ctx'> #define EXYNOS5_IRQ_SATA_PMEMREQ	IRQ_SPI(109)</div><div class='ctx'> #define EXYNOS5_IRQ_CAM_C		IRQ_SPI(110)</div><div class='hunk'>@@ -329,8 +320,9 @@</div><div class='ctx'> #define EXYNOS5_IRQ_DP1_INTP1		IRQ_SPI(113)</div><div class='ctx'> #define EXYNOS5_IRQ_CEC			IRQ_SPI(114)</div><div class='ctx'> #define EXYNOS5_IRQ_SATA		IRQ_SPI(115)</div><div class='del'>-#define EXYNOS5_IRQ_NFCON		IRQ_SPI(116)</div><div class='ctx'> </div><div class='add'>+#define EXYNOS5_IRQ_MCT_L0		IRQ_SPI(120)</div><div class='add'>+#define EXYNOS5_IRQ_MCT_L1		IRQ_SPI(121)</div><div class='ctx'> #define EXYNOS5_IRQ_MMC44		IRQ_SPI(123)</div><div class='ctx'> #define EXYNOS5_IRQ_MDMA1		IRQ_SPI(124)</div><div class='ctx'> #define EXYNOS5_IRQ_FIMC_LITE0		IRQ_SPI(125)</div><div class='hunk'>@@ -338,7 +330,6 @@</div><div class='ctx'> #define EXYNOS5_IRQ_RP_TIMER		IRQ_SPI(127)</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS5_IRQ_PMU			COMBINER_IRQ(1, 2)</div><div class='del'>-#define EXYNOS5_IRQ_PMU_CPU1		COMBINER_IRQ(1, 6)</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_GSC0_0	COMBINER_IRQ(2, 0)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_GSC0_1	COMBINER_IRQ(2, 1)</div><div class='hunk'>@@ -349,6 +340,8 @@</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_GSC3_0	COMBINER_IRQ(2, 6)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_GSC3_1	COMBINER_IRQ(2, 7)</div><div class='ctx'> </div><div class='add'>+#define EXYNOS5_IRQ_SYSMMU_LITE2_0	COMBINER_IRQ(3, 0)</div><div class='add'>+#define EXYNOS5_IRQ_SYSMMU_LITE2_1	COMBINER_IRQ(3, 1)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_FIMD1_0	COMBINER_IRQ(3, 2)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_FIMD1_1	COMBINER_IRQ(3, 3)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_LITE0_0	COMBINER_IRQ(3, 4)</div><div class='hunk'>@@ -372,8 +365,8 @@</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_ARM_0	COMBINER_IRQ(6, 0)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_ARM_1	COMBINER_IRQ(6, 1)</div><div class='del'>-#define EXYNOS5_IRQ_SYSMMU_MFC_L_0	COMBINER_IRQ(6, 2)</div><div class='del'>-#define EXYNOS5_IRQ_SYSMMU_MFC_L_1	COMBINER_IRQ(6, 3)</div><div class='add'>+#define EXYNOS5_IRQ_SYSMMU_MFC_R_0	COMBINER_IRQ(6, 2)</div><div class='add'>+#define EXYNOS5_IRQ_SYSMMU_MFC_R_1	COMBINER_IRQ(6, 3)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_RTIC_0	COMBINER_IRQ(6, 4)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_RTIC_1	COMBINER_IRQ(6, 5)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_SSS_0	COMBINER_IRQ(6, 6)</div><div class='hunk'>@@ -385,11 +378,9 @@</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_MDMA1_1	COMBINER_IRQ(7, 3)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_TV_0		COMBINER_IRQ(7, 4)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_TV_1		COMBINER_IRQ(7, 5)</div><div class='del'>-#define EXYNOS5_IRQ_SYSMMU_GPSX_0	COMBINER_IRQ(7, 6)</div><div class='del'>-#define EXYNOS5_IRQ_SYSMMU_GPSX_1	COMBINER_IRQ(7, 7)</div><div class='ctx'> </div><div class='del'>-#define EXYNOS5_IRQ_SYSMMU_MFC_R_0	COMBINER_IRQ(8, 5)</div><div class='del'>-#define EXYNOS5_IRQ_SYSMMU_MFC_R_1	COMBINER_IRQ(8, 6)</div><div class='add'>+#define EXYNOS5_IRQ_SYSMMU_MFC_L_0	COMBINER_IRQ(8, 5)</div><div class='add'>+#define EXYNOS5_IRQ_SYSMMU_MFC_L_1	COMBINER_IRQ(8, 6)</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_DIS1_0	COMBINER_IRQ(9, 4)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_DIS1_1	COMBINER_IRQ(9, 5)</div><div class='hunk'>@@ -405,17 +396,24 @@</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_DRC_0	COMBINER_IRQ(11, 6)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_DRC_1	COMBINER_IRQ(11, 7)</div><div class='ctx'> </div><div class='add'>+#define EXYNOS5_IRQ_MDMA1_ABORT		COMBINER_IRQ(13, 1)</div><div class='add'>+</div><div class='add'>+#define EXYNOS5_IRQ_MDMA0_ABORT		COMBINER_IRQ(15, 3)</div><div class='add'>+</div><div class='ctx'> #define EXYNOS5_IRQ_FIMD1_FIFO		COMBINER_IRQ(18, 4)</div><div class='ctx'> #define EXYNOS5_IRQ_FIMD1_VSYNC		COMBINER_IRQ(18, 5)</div><div class='ctx'> #define EXYNOS5_IRQ_FIMD1_SYSTEM	COMBINER_IRQ(18, 6)</div><div class='ctx'> </div><div class='add'>+#define EXYNOS5_IRQ_ARMIOP_GIC		COMBINER_IRQ(19, 0)</div><div class='add'>+#define EXYNOS5_IRQ_ARMISP_GIC		COMBINER_IRQ(19, 1)</div><div class='add'>+#define EXYNOS5_IRQ_IOP_GIC		COMBINER_IRQ(19, 3)</div><div class='add'>+#define EXYNOS5_IRQ_ISP_GIC		COMBINER_IRQ(19, 4)</div><div class='add'>+</div><div class='add'>+#define EXYNOS5_IRQ_PMU_CPU1		COMBINER_IRQ(22, 4)</div><div class='add'>+</div><div class='ctx'> #define EXYNOS5_IRQ_EINT0		COMBINER_IRQ(23, 0)</div><div class='del'>-#define EXYNOS5_IRQ_MCT_L0		COMBINER_IRQ(23, 1)</div><div class='del'>-#define EXYNOS5_IRQ_MCT_L1		COMBINER_IRQ(23, 2)</div><div class='ctx'> #define EXYNOS5_IRQ_MCT_G0		COMBINER_IRQ(23, 3)</div><div class='ctx'> #define EXYNOS5_IRQ_MCT_G1		COMBINER_IRQ(23, 4)</div><div class='del'>-#define EXYNOS5_IRQ_MCT_G2		COMBINER_IRQ(23, 5)</div><div class='del'>-#define EXYNOS5_IRQ_MCT_G3		COMBINER_IRQ(23, 6)</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS5_IRQ_EINT1		COMBINER_IRQ(24, 0)</div><div class='ctx'> #define EXYNOS5_IRQ_SYSMMU_LITE1_0	COMBINER_IRQ(24, 1)</div><div class='hunk'>@@ -446,7 +444,7 @@</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS5_MAX_COMBINER_NR		32</div><div class='ctx'> </div><div class='del'>-#define EXYNOS5_IRQ_GPIO1_NR_GROUPS	13</div><div class='add'>+#define EXYNOS5_IRQ_GPIO1_NR_GROUPS	14</div><div class='ctx'> #define EXYNOS5_IRQ_GPIO2_NR_GROUPS	9</div><div class='ctx'> #define EXYNOS5_IRQ_GPIO3_NR_GROUPS	5</div><div class='ctx'> #define EXYNOS5_IRQ_GPIO4_NR_GROUPS	1</div><div class='head'>diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h<br/>index 6e6d11ff352a..ca4aa89aa46b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/map.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/include/mach/map.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/map.h</a></div><div class='hunk'>@@ -34,6 +34,9 @@</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS4_PA_JPEG			0x11840000</div><div class='ctx'> </div><div class='add'>+/* x = 0...1 */</div><div class='add'>+#define EXYNOS4_PA_FIMC_LITE(x)		(0x12390000 + ((x) * 0x10000))</div><div class='add'>+</div><div class='ctx'> #define EXYNOS4_PA_G2D			0x12800000</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS4_PA_I2S0			0x03830000</div><div class='hunk'>@@ -78,8 +81,8 @@</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS4_PA_GIC_CPU		0x10480000</div><div class='ctx'> #define EXYNOS4_PA_GIC_DIST		0x10490000</div><div class='del'>-#define EXYNOS5_PA_GIC_CPU		0x10480000</div><div class='del'>-#define EXYNOS5_PA_GIC_DIST		0x10490000</div><div class='add'>+#define EXYNOS5_PA_GIC_CPU		0x10482000</div><div class='add'>+#define EXYNOS5_PA_GIC_DIST		0x10481000</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS4_PA_COREPERI		0x10500000</div><div class='ctx'> #define EXYNOS4_PA_TWD			0x10500600</div><div class='hunk'>@@ -95,6 +98,7 @@</div><div class='ctx'> #define EXYNOS5_PA_PDMA1		0x121B0000</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_MDMA		0x10A40000</div><div class='add'>+#define EXYNOS4_PA_SYSMMU_2D_ACP	0x10A40000</div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_SSS		0x10A50000</div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_FIMC0		0x11A20000</div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_FIMC1		0x11A30000</div><div class='hunk'>@@ -103,6 +107,12 @@</div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_JPEG		0x11A60000</div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_FIMD0		0x11E20000</div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_FIMD1		0x12220000</div><div class='add'>+#define EXYNOS4_PA_SYSMMU_FIMC_ISP	0x12260000</div><div class='add'>+#define EXYNOS4_PA_SYSMMU_FIMC_DRC	0x12270000</div><div class='add'>+#define EXYNOS4_PA_SYSMMU_FIMC_FD	0x122A0000</div><div class='add'>+#define EXYNOS4_PA_SYSMMU_ISPCPU	0x122B0000</div><div class='add'>+#define EXYNOS4_PA_SYSMMU_FIMC_LITE0	0x123B0000</div><div class='add'>+#define EXYNOS4_PA_SYSMMU_FIMC_LITE1	0x123C0000</div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_PCIe		0x12620000</div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_G2D		0x12A20000</div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_ROTATOR	0x12A30000</div><div class='hunk'>@@ -110,6 +120,37 @@</div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_TV		0x12E20000</div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_MFC_L		0x13620000</div><div class='ctx'> #define EXYNOS4_PA_SYSMMU_MFC_R		0x13630000</div><div class='add'>+</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_MDMA1		0x10A40000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_SSS		0x10A50000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_2D		0x10A60000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_MFC_L		0x11200000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_MFC_R		0x11210000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_ROTATOR	0x11D40000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_MDMA2		0x11D50000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_JPEG		0x11F20000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_IOP		0x12360000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_RTIC		0x12370000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_GPS		0x12630000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_ISP		0x13260000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_DRC		0x12370000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_SCALERC	0x13280000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_SCALERP	0x13290000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_FD		0x132A0000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_ISPCPU	0x132B0000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_ODC		0x132C0000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_DIS0		0x132D0000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_DIS1		0x132E0000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_3DNR		0x132F0000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_LITE0		0x13C40000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_LITE1		0x13C50000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_GSC0		0x13E80000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_GSC1		0x13E90000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_GSC2		0x13EA0000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_GSC3		0x13EB0000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_FIMD1		0x14640000</div><div class='add'>+#define EXYNOS5_PA_SYSMMU_TV		0x14650000</div><div class='add'>+</div><div class='ctx'> #define EXYNOS4_PA_SPI0			0x13920000</div><div class='ctx'> #define EXYNOS4_PA_SPI1			0x13930000</div><div class='ctx'> #define EXYNOS4_PA_SPI2			0x13940000</div><div class='hunk'>@@ -130,6 +171,9 @@</div><div class='ctx'> #define EXYNOS4_PA_HSMMC(x)		(0x12510000 + ((x) * 0x10000))</div><div class='ctx'> #define EXYNOS4_PA_DWMCI		0x12550000</div><div class='ctx'> </div><div class='add'>+#define EXYNOS4_PA_HSOTG		0x12480000</div><div class='add'>+#define EXYNOS4_PA_USB_HSPHY		0x125B0000</div><div class='add'>+</div><div class='ctx'> #define EXYNOS4_PA_SATA			0x12560000</div><div class='ctx'> #define EXYNOS4_PA_SATAPHY		0x125D0000</div><div class='ctx'> #define EXYNOS4_PA_SATAPHY_CTRL		0x126B0000</div><div class='hunk'>@@ -186,6 +230,7 @@</div><div class='ctx'> #define S3C_PA_SPI0			EXYNOS4_PA_SPI0</div><div class='ctx'> #define S3C_PA_SPI1			EXYNOS4_PA_SPI1</div><div class='ctx'> #define S3C_PA_SPI2			EXYNOS4_PA_SPI2</div><div class='add'>+#define S3C_PA_USB_HSOTG		EXYNOS4_PA_HSOTG</div><div class='ctx'> </div><div class='ctx'> #define S5P_PA_EHCI			EXYNOS4_PA_EHCI</div><div class='ctx'> #define S5P_PA_FIMC0			EXYNOS4_PA_FIMC0</div><div class='head'>diff --git a/arch/arm/mach-exynos/include/mach/pm-core.h b/arch/arm/mach-exynos/include/mach/pm-core.h<br/>index 9d8da51e35ca..a67ecfaf1216 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/pm-core.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/include/mach/pm-core.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/pm-core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/pm-core.h</a></div><div class='hunk'>@@ -33,7 +33,7 @@ static inline void s3c_pm_arch_prepare_irqs(void)</div><div class='ctx'> 	__raw_writel(tmp, S5P_WAKEUP_MASK);</div><div class='ctx'> </div><div class='ctx'> 	__raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK);</div><div class='del'>-	__raw_writel(s3c_irqwake_eintmask, S5P_EINT_WAKEUP_MASK);</div><div class='add'>+	__raw_writel(s3c_irqwake_eintmask &amp; 0xFFFFFFFE, S5P_EINT_WAKEUP_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void s3c_pm_arch_stop_clocks(void)</div><div class='head'>diff --git a/arch/arm/mach-exynos/include/mach/pmu.h b/arch/arm/mach-exynos/include/mach/pmu.h<br/>index e76b7faba66b..7c27c2d4bf44 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/pmu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/include/mach/pmu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/pmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/pmu.h</a></div><div class='hunk'>@@ -23,12 +23,12 @@ enum sys_powerdown {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern unsigned long l2x0_regs_phys;</div><div class='del'>-struct exynos4_pmu_conf {</div><div class='add'>+struct exynos_pmu_conf {</div><div class='ctx'> 	void __iomem *reg;</div><div class='ctx'> 	unsigned int val[NUM_SYS_POWERDOWN];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-extern void exynos4_sys_powerdown_conf(enum sys_powerdown mode);</div><div class='add'>+extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);</div><div class='ctx'> extern void s3c_cpu_resume(void);</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_ARCH_PMU_H */</div><div class='head'>diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h<br/>index d9578a58ae7f..8c9b38c9c504 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/regs-clock.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/include/mach/regs-clock.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/regs-clock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/regs-clock.h</a></div><div class='hunk'>@@ -135,6 +135,9 @@</div><div class='ctx'> #define EXYNOS4_CLKGATE_SCLKCPU			EXYNOS_CLKREG(0x14800)</div><div class='ctx'> #define EXYNOS4_CLKGATE_IP_CPU			EXYNOS_CLKREG(0x14900)</div><div class='ctx'> </div><div class='add'>+#define EXYNOS4_CLKGATE_IP_ISP0			EXYNOS_CLKREG(0x18800)</div><div class='add'>+#define EXYNOS4_CLKGATE_IP_ISP1			EXYNOS_CLKREG(0x18804)</div><div class='add'>+</div><div class='ctx'> #define EXYNOS4_APLL_LOCKTIME			(0x1C20)	/* 300us */</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS4_APLLCON0_ENABLE_SHIFT		(31)</div><div class='hunk'>@@ -271,41 +274,59 @@</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS5_CLKDIV_ACP			EXYNOS_CLKREG(0x08500)</div><div class='ctx'> </div><div class='del'>-#define EXYNOS5_CLKSRC_TOP2			EXYNOS_CLKREG(0x10218)</div><div class='ctx'> #define EXYNOS5_EPLL_CON0			EXYNOS_CLKREG(0x10130)</div><div class='ctx'> #define EXYNOS5_EPLL_CON1			EXYNOS_CLKREG(0x10134)</div><div class='add'>+#define EXYNOS5_EPLL_CON2			EXYNOS_CLKREG(0x10138)</div><div class='ctx'> #define EXYNOS5_VPLL_CON0			EXYNOS_CLKREG(0x10140)</div><div class='ctx'> #define EXYNOS5_VPLL_CON1			EXYNOS_CLKREG(0x10144)</div><div class='add'>+#define EXYNOS5_VPLL_CON2			EXYNOS_CLKREG(0x10148)</div><div class='ctx'> #define EXYNOS5_CPLL_CON0			EXYNOS_CLKREG(0x10120)</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS5_CLKSRC_TOP0			EXYNOS_CLKREG(0x10210)</div><div class='add'>+#define EXYNOS5_CLKSRC_TOP1			EXYNOS_CLKREG(0x10214)</div><div class='add'>+#define EXYNOS5_CLKSRC_TOP2			EXYNOS_CLKREG(0x10218)</div><div class='ctx'> #define EXYNOS5_CLKSRC_TOP3			EXYNOS_CLKREG(0x1021C)</div><div class='ctx'> #define EXYNOS5_CLKSRC_GSCL			EXYNOS_CLKREG(0x10220)</div><div class='ctx'> #define EXYNOS5_CLKSRC_DISP1_0			EXYNOS_CLKREG(0x1022C)</div><div class='add'>+#define EXYNOS5_CLKSRC_MAUDIO			EXYNOS_CLKREG(0x10240)</div><div class='ctx'> #define EXYNOS5_CLKSRC_FSYS			EXYNOS_CLKREG(0x10244)</div><div class='ctx'> #define EXYNOS5_CLKSRC_PERIC0			EXYNOS_CLKREG(0x10250)</div><div class='add'>+#define EXYNOS5_CLKSRC_PERIC1			EXYNOS_CLKREG(0x10254)</div><div class='add'>+#define EXYNOS5_SCLK_SRC_ISP			EXYNOS_CLKREG(0x10270)</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS5_CLKSRC_MASK_TOP			EXYNOS_CLKREG(0x10310)</div><div class='ctx'> #define EXYNOS5_CLKSRC_MASK_GSCL		EXYNOS_CLKREG(0x10320)</div><div class='ctx'> #define EXYNOS5_CLKSRC_MASK_DISP1_0		EXYNOS_CLKREG(0x1032C)</div><div class='add'>+#define EXYNOS5_CLKSRC_MASK_MAUDIO		EXYNOS_CLKREG(0x10334)</div><div class='ctx'> #define EXYNOS5_CLKSRC_MASK_FSYS		EXYNOS_CLKREG(0x10340)</div><div class='ctx'> #define EXYNOS5_CLKSRC_MASK_PERIC0		EXYNOS_CLKREG(0x10350)</div><div class='add'>+#define EXYNOS5_CLKSRC_MASK_PERIC1		EXYNOS_CLKREG(0x10354)</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS5_CLKDIV_TOP0			EXYNOS_CLKREG(0x10510)</div><div class='ctx'> #define EXYNOS5_CLKDIV_TOP1			EXYNOS_CLKREG(0x10514)</div><div class='ctx'> #define EXYNOS5_CLKDIV_GSCL			EXYNOS_CLKREG(0x10520)</div><div class='ctx'> #define EXYNOS5_CLKDIV_DISP1_0			EXYNOS_CLKREG(0x1052C)</div><div class='ctx'> #define EXYNOS5_CLKDIV_GEN			EXYNOS_CLKREG(0x1053C)</div><div class='add'>+#define EXYNOS5_CLKDIV_MAUDIO			EXYNOS_CLKREG(0x10544)</div><div class='ctx'> #define EXYNOS5_CLKDIV_FSYS0			EXYNOS_CLKREG(0x10548)</div><div class='ctx'> #define EXYNOS5_CLKDIV_FSYS1			EXYNOS_CLKREG(0x1054C)</div><div class='ctx'> #define EXYNOS5_CLKDIV_FSYS2			EXYNOS_CLKREG(0x10550)</div><div class='ctx'> #define EXYNOS5_CLKDIV_FSYS3			EXYNOS_CLKREG(0x10554)</div><div class='ctx'> #define EXYNOS5_CLKDIV_PERIC0			EXYNOS_CLKREG(0x10558)</div><div class='add'>+#define EXYNOS5_CLKDIV_PERIC1			EXYNOS_CLKREG(0x1055C)</div><div class='add'>+#define EXYNOS5_CLKDIV_PERIC2			EXYNOS_CLKREG(0x10560)</div><div class='add'>+#define EXYNOS5_CLKDIV_PERIC3			EXYNOS_CLKREG(0x10564)</div><div class='add'>+#define EXYNOS5_CLKDIV_PERIC4			EXYNOS_CLKREG(0x10568)</div><div class='add'>+#define EXYNOS5_CLKDIV_PERIC5			EXYNOS_CLKREG(0x1056C)</div><div class='add'>+#define EXYNOS5_SCLK_DIV_ISP			EXYNOS_CLKREG(0x10580)</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS5_CLKGATE_IP_ACP			EXYNOS_CLKREG(0x08800)</div><div class='add'>+#define EXYNOS5_CLKGATE_IP_ISP0			EXYNOS_CLKREG(0x0C800)</div><div class='add'>+#define EXYNOS5_CLKGATE_IP_ISP1			EXYNOS_CLKREG(0x0C804)</div><div class='ctx'> #define EXYNOS5_CLKGATE_IP_GSCL			EXYNOS_CLKREG(0x10920)</div><div class='ctx'> #define EXYNOS5_CLKGATE_IP_DISP1		EXYNOS_CLKREG(0x10928)</div><div class='ctx'> #define EXYNOS5_CLKGATE_IP_MFC			EXYNOS_CLKREG(0x1092C)</div><div class='add'>+#define EXYNOS5_CLKGATE_IP_G3D			EXYNOS_CLKREG(0x10930)</div><div class='ctx'> #define EXYNOS5_CLKGATE_IP_GEN			EXYNOS_CLKREG(0x10934)</div><div class='ctx'> #define EXYNOS5_CLKGATE_IP_FSYS			EXYNOS_CLKREG(0x10944)</div><div class='ctx'> #define EXYNOS5_CLKGATE_IP_GPS			EXYNOS_CLKREG(0x1094C)</div><div class='hunk'>@@ -317,6 +338,8 @@</div><div class='ctx'> #define EXYNOS5_CLKSRC_CDREX			EXYNOS_CLKREG(0x20200)</div><div class='ctx'> #define EXYNOS5_CLKDIV_CDREX			EXYNOS_CLKREG(0x20500)</div><div class='ctx'> </div><div class='add'>+#define EXYNOS5_PLL_DIV2_SEL			EXYNOS_CLKREG(0x20A24)</div><div class='add'>+</div><div class='ctx'> #define EXYNOS5_EPLL_LOCK			EXYNOS_CLKREG(0x10030)</div><div class='ctx'> </div><div class='ctx'> #define EXYNOS5_EPLLCON0_LOCKED_SHIFT		(29)</div><div class='head'>diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h<br/>index 4c53f38b5a9e..43a99e6f56ab 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/regs-pmu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/include/mach/regs-pmu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/regs-pmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/regs-pmu.h</a></div><div class='hunk'>@@ -1,9 +1,8 @@</div><div class='del'>-/* linux/arch/arm/mach-exynos4/include/mach/regs-pmu.h</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com</div><div class='ctx'>  *</div><div class='del'>- * EXYNOS4 - Power management unit definition</div><div class='add'>+ * EXYNOS - Power management unit definition</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='hunk'>@@ -163,6 +162,9 @@</div><div class='ctx'> #define S5P_CHECK_SLEEP				0x00000BAD</div><div class='ctx'> </div><div class='ctx'> /* Only for EXYNOS4210 */</div><div class='add'>+#define S5P_USBDEVICE_PHY_CONTROL	S5P_PMUREG(0x0704)</div><div class='add'>+#define S5P_USBDEVICE_PHY_ENABLE	(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='ctx'> #define S5P_USBHOST_PHY_CONTROL		S5P_PMUREG(0x0708)</div><div class='ctx'> #define S5P_USBHOST_PHY_ENABLE		(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='hunk'>@@ -177,7 +179,7 @@</div><div class='ctx'> </div><div class='ctx'> #define S5P_PMU_LCD1_CONF		S5P_PMUREG(0x3CA0)</div><div class='ctx'> </div><div class='del'>-/* Only for EXYNOS4212 */</div><div class='add'>+/* Only for EXYNOS4x12 */</div><div class='ctx'> #define S5P_ISP_ARM_LOWPWR			S5P_PMUREG(0x1050)</div><div class='ctx'> #define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR	S5P_PMUREG(0x1054)</div><div class='ctx'> #define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR	S5P_PMUREG(0x1058)</div><div class='hunk'>@@ -218,4 +220,146 @@</div><div class='ctx'> #define S5P_SECSS_MEM_OPTION			S5P_PMUREG(0x2EC8)</div><div class='ctx'> #define S5P_ROTATOR_MEM_OPTION			S5P_PMUREG(0x2F48)</div><div class='ctx'> </div><div class='add'>+/* Only for EXYNOS4412 */</div><div class='add'>+#define S5P_ARM_CORE2_LOWPWR			S5P_PMUREG(0x1020)</div><div class='add'>+#define S5P_DIS_IRQ_CORE2			S5P_PMUREG(0x1024)</div><div class='add'>+#define S5P_DIS_IRQ_CENTRAL2			S5P_PMUREG(0x1028)</div><div class='add'>+#define S5P_ARM_CORE3_LOWPWR			S5P_PMUREG(0x1030)</div><div class='add'>+#define S5P_DIS_IRQ_CORE3			S5P_PMUREG(0x1034)</div><div class='add'>+#define S5P_DIS_IRQ_CENTRAL3			S5P_PMUREG(0x1038)</div><div class='add'>+</div><div class='add'>+/* For EXYNOS5 */</div><div class='add'>+</div><div class='add'>+#define EXYNOS5_USB_CFG						S5P_PMUREG(0x0230)</div><div class='add'>+</div><div class='add'>+#define EXYNOS5_ARM_CORE0_SYS_PWR_REG				S5P_PMUREG(0x1000)</div><div class='add'>+#define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG		S5P_PMUREG(0x1004)</div><div class='add'>+#define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG		S5P_PMUREG(0x1008)</div><div class='add'>+#define EXYNOS5_ARM_CORE1_SYS_PWR_REG				S5P_PMUREG(0x1010)</div><div class='add'>+#define EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG		S5P_PMUREG(0x1014)</div><div class='add'>+#define EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG		S5P_PMUREG(0x1018)</div><div class='add'>+#define EXYNOS5_FSYS_ARM_SYS_PWR_REG				S5P_PMUREG(0x1040)</div><div class='add'>+#define EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG		S5P_PMUREG(0x1048)</div><div class='add'>+#define EXYNOS5_ISP_ARM_SYS_PWR_REG				S5P_PMUREG(0x1050)</div><div class='add'>+#define EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG		S5P_PMUREG(0x1054)</div><div class='add'>+#define EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG		S5P_PMUREG(0x1058)</div><div class='add'>+#define EXYNOS5_ARM_COMMON_SYS_PWR_REG				S5P_PMUREG(0x1080)</div><div class='add'>+#define EXYNOS5_ARM_L2_SYS_PWR_REG				S5P_PMUREG(0x10C0)</div><div class='add'>+#define EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG			S5P_PMUREG(0x1100)</div><div class='add'>+#define EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG			S5P_PMUREG(0x1104)</div><div class='add'>+#define EXYNOS5_CMU_RESET_SYS_PWR_REG				S5P_PMUREG(0x110C)</div><div class='add'>+#define EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG			S5P_PMUREG(0x1120)</div><div class='add'>+#define EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG			S5P_PMUREG(0x1124)</div><div class='add'>+#define EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG			S5P_PMUREG(0x112C)</div><div class='add'>+#define EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG			S5P_PMUREG(0x1130)</div><div class='add'>+#define EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG			S5P_PMUREG(0x1134)</div><div class='add'>+#define EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG			S5P_PMUREG(0x1138)</div><div class='add'>+#define EXYNOS5_APLL_SYSCLK_SYS_PWR_REG				S5P_PMUREG(0x1140)</div><div class='add'>+#define EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG				S5P_PMUREG(0x1144)</div><div class='add'>+#define EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG				S5P_PMUREG(0x1148)</div><div class='add'>+#define EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG				S5P_PMUREG(0x114C)</div><div class='add'>+#define EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG				S5P_PMUREG(0x1150)</div><div class='add'>+#define EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG				S5P_PMUREG(0x1154)</div><div class='add'>+#define EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG			S5P_PMUREG(0x1164)</div><div class='add'>+#define EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG			S5P_PMUREG(0x1170)</div><div class='add'>+#define EXYNOS5_TOP_BUS_SYS_PWR_REG				S5P_PMUREG(0x1180)</div><div class='add'>+#define EXYNOS5_TOP_RETENTION_SYS_PWR_REG			S5P_PMUREG(0x1184)</div><div class='add'>+#define EXYNOS5_TOP_PWR_SYS_PWR_REG				S5P_PMUREG(0x1188)</div><div class='add'>+#define EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG			S5P_PMUREG(0x1190)</div><div class='add'>+#define EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG		S5P_PMUREG(0x1194)</div><div class='add'>+#define EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG			S5P_PMUREG(0x1198)</div><div class='add'>+#define EXYNOS5_LOGIC_RESET_SYS_PWR_REG				S5P_PMUREG(0x11A0)</div><div class='add'>+#define EXYNOS5_OSCCLK_GATE_SYS_PWR_REG				S5P_PMUREG(0x11A4)</div><div class='add'>+#define EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG			S5P_PMUREG(0x11B0)</div><div class='add'>+#define EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG			S5P_PMUREG(0x11B4)</div><div class='add'>+#define EXYNOS5_USBOTG_MEM_SYS_PWR_REG				S5P_PMUREG(0x11C0)</div><div class='add'>+#define EXYNOS5_G2D_MEM_SYS_PWR_REG				S5P_PMUREG(0x11C8)</div><div class='add'>+#define EXYNOS5_USBDRD_MEM_SYS_PWR_REG				S5P_PMUREG(0x11CC)</div><div class='add'>+#define EXYNOS5_SDMMC_MEM_SYS_PWR_REG				S5P_PMUREG(0x11D0)</div><div class='add'>+#define EXYNOS5_CSSYS_MEM_SYS_PWR_REG				S5P_PMUREG(0x11D4)</div><div class='add'>+#define EXYNOS5_SECSS_MEM_SYS_PWR_REG				S5P_PMUREG(0x11D8)</div><div class='add'>+#define EXYNOS5_ROTATOR_MEM_SYS_PWR_REG				S5P_PMUREG(0x11DC)</div><div class='add'>+#define EXYNOS5_INTRAM_MEM_SYS_PWR_REG				S5P_PMUREG(0x11E0)</div><div class='add'>+#define EXYNOS5_INTROM_MEM_SYS_PWR_REG				S5P_PMUREG(0x11E4)</div><div class='add'>+#define EXYNOS5_JPEG_MEM_SYS_PWR_REG				S5P_PMUREG(0x11E8)</div><div class='add'>+#define EXYNOS5_HSI_MEM_SYS_PWR_REG				S5P_PMUREG(0x11EC)</div><div class='add'>+#define EXYNOS5_MCUIOP_MEM_SYS_PWR_REG				S5P_PMUREG(0x11F4)</div><div class='add'>+#define EXYNOS5_SATA_MEM_SYS_PWR_REG				S5P_PMUREG(0x11FC)</div><div class='add'>+#define EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG			S5P_PMUREG(0x1200)</div><div class='add'>+#define EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG			S5P_PMUREG(0x1204)</div><div class='add'>+#define EXYNOS5_PAD_RETENTION_EFNAND_SYS_PWR_REG		S5P_PMUREG(0x1208)</div><div class='add'>+#define EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG			S5P_PMUREG(0x1220)</div><div class='add'>+#define EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG			S5P_PMUREG(0x1224)</div><div class='add'>+#define EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG			S5P_PMUREG(0x1228)</div><div class='add'>+#define EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG			S5P_PMUREG(0x122C)</div><div class='add'>+#define EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG			S5P_PMUREG(0x1230)</div><div class='add'>+#define EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG			S5P_PMUREG(0x1234)</div><div class='add'>+#define EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG			S5P_PMUREG(0x1238)</div><div class='add'>+#define EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG		S5P_PMUREG(0x123C)</div><div class='add'>+#define EXYNOS5_PAD_ISOLATION_SYS_PWR_REG			S5P_PMUREG(0x1240)</div><div class='add'>+#define EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG		S5P_PMUREG(0x1250)</div><div class='add'>+#define EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG				S5P_PMUREG(0x1260)</div><div class='add'>+#define EXYNOS5_XUSBXTI_SYS_PWR_REG				S5P_PMUREG(0x1280)</div><div class='add'>+#define EXYNOS5_XXTI_SYS_PWR_REG				S5P_PMUREG(0x1284)</div><div class='add'>+#define EXYNOS5_EXT_REGULATOR_SYS_PWR_REG			S5P_PMUREG(0x12C0)</div><div class='add'>+#define EXYNOS5_GPIO_MODE_SYS_PWR_REG				S5P_PMUREG(0x1300)</div><div class='add'>+#define EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG			S5P_PMUREG(0x1320)</div><div class='add'>+#define EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG			S5P_PMUREG(0x1340)</div><div class='add'>+#define EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG			S5P_PMUREG(0x1344)</div><div class='add'>+#define EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG			S5P_PMUREG(0x1348)</div><div class='add'>+#define EXYNOS5_GSCL_SYS_PWR_REG				S5P_PMUREG(0x1400)</div><div class='add'>+#define EXYNOS5_ISP_SYS_PWR_REG					S5P_PMUREG(0x1404)</div><div class='add'>+#define EXYNOS5_MFC_SYS_PWR_REG					S5P_PMUREG(0x1408)</div><div class='add'>+#define EXYNOS5_G3D_SYS_PWR_REG					S5P_PMUREG(0x140C)</div><div class='add'>+#define EXYNOS5_DISP1_SYS_PWR_REG				S5P_PMUREG(0x1414)</div><div class='add'>+#define EXYNOS5_MAU_SYS_PWR_REG					S5P_PMUREG(0x1418)</div><div class='add'>+#define EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG			S5P_PMUREG(0x1480)</div><div class='add'>+#define EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG			S5P_PMUREG(0x1484)</div><div class='add'>+#define EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG			S5P_PMUREG(0x1488)</div><div class='add'>+#define EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG			S5P_PMUREG(0x148C)</div><div class='add'>+#define EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG			S5P_PMUREG(0x1494)</div><div class='add'>+#define EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG			S5P_PMUREG(0x1498)</div><div class='add'>+#define EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG			S5P_PMUREG(0x14C0)</div><div class='add'>+#define EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG			S5P_PMUREG(0x14C4)</div><div class='add'>+#define EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG			S5P_PMUREG(0x14C8)</div><div class='add'>+#define EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG			S5P_PMUREG(0x14CC)</div><div class='add'>+#define EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG			S5P_PMUREG(0x14D4)</div><div class='add'>+#define EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG			S5P_PMUREG(0x14D8)</div><div class='add'>+#define EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG			S5P_PMUREG(0x1580)</div><div class='add'>+#define EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG			S5P_PMUREG(0x1584)</div><div class='add'>+#define EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG			S5P_PMUREG(0x1588)</div><div class='add'>+#define EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG			S5P_PMUREG(0x158C)</div><div class='add'>+#define EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG			S5P_PMUREG(0x1594)</div><div class='add'>+#define EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG			S5P_PMUREG(0x1598)</div><div class='add'>+</div><div class='add'>+#define EXYNOS5_ARM_CORE0_OPTION				S5P_PMUREG(0x2008)</div><div class='add'>+#define EXYNOS5_ARM_CORE1_OPTION				S5P_PMUREG(0x2088)</div><div class='add'>+#define EXYNOS5_FSYS_ARM_OPTION					S5P_PMUREG(0x2208)</div><div class='add'>+#define EXYNOS5_ISP_ARM_OPTION					S5P_PMUREG(0x2288)</div><div class='add'>+#define EXYNOS5_ARM_COMMON_OPTION				S5P_PMUREG(0x2408)</div><div class='add'>+#define EXYNOS5_TOP_PWR_OPTION					S5P_PMUREG(0x2C48)</div><div class='add'>+#define EXYNOS5_TOP_PWR_SYSMEM_OPTION				S5P_PMUREG(0x2CC8)</div><div class='add'>+#define EXYNOS5_JPEG_MEM_OPTION					S5P_PMUREG(0x2F48)</div><div class='add'>+#define EXYNOS5_GSCL_STATUS					S5P_PMUREG(0x4004)</div><div class='add'>+#define EXYNOS5_ISP_STATUS					S5P_PMUREG(0x4024)</div><div class='add'>+#define EXYNOS5_GSCL_OPTION					S5P_PMUREG(0x4008)</div><div class='add'>+#define EXYNOS5_ISP_OPTION					S5P_PMUREG(0x4028)</div><div class='add'>+#define EXYNOS5_MFC_OPTION					S5P_PMUREG(0x4048)</div><div class='add'>+#define EXYNOS5_G3D_CONFIGURATION				S5P_PMUREG(0x4060)</div><div class='add'>+#define EXYNOS5_G3D_STATUS					S5P_PMUREG(0x4064)</div><div class='add'>+#define EXYNOS5_G3D_OPTION					S5P_PMUREG(0x4068)</div><div class='add'>+#define EXYNOS5_DISP1_OPTION					S5P_PMUREG(0x40A8)</div><div class='add'>+#define EXYNOS5_MAU_OPTION					S5P_PMUREG(0x40C8)</div><div class='add'>+</div><div class='add'>+#define EXYNOS5_USE_SC_FEEDBACK					(1 &lt;&lt; 1)</div><div class='add'>+#define EXYNOS5_USE_SC_COUNTER					(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+#define EXYNOS5_MANUAL_L2RSTDISABLE_CONTROL			(1 &lt;&lt; 2)</div><div class='add'>+#define EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN			(1 &lt;&lt; 7)</div><div class='add'>+</div><div class='add'>+#define EXYNOS5_OPTION_USE_STANDBYWFE				(1 &lt;&lt; 24)</div><div class='add'>+#define EXYNOS5_OPTION_USE_STANDBYWFI				(1 &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+#define EXYNOS5_OPTION_USE_RETENTION				(1 &lt;&lt; 4)</div><div class='add'>+</div><div class='ctx'> #endif /* __ASM_ARCH_REGS_PMU_H */</div><div class='head'>diff --git a/arch/arm/mach-exynos/include/mach/regs-sysmmu.h b/arch/arm/mach-exynos/include/mach/regs-sysmmu.h<br/>deleted file mode 100644<br/>index 68ff6ad08a2b..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/regs-sysmmu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/include/mach/regs-sysmmu.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-/* linux/arch/arm/mach-exynos4/include/mach/regs-sysmmu.h</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.</div><div class='del'>- *		http://www.samsung.com</div><div class='del'>- *</div><div class='del'>- * EXYNOS4 - System MMU register</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_REGS_SYSMMU_H</div><div class='del'>-#define __ASM_ARCH_REGS_SYSMMU_H __FILE__</div><div class='del'>-</div><div class='del'>-#define S5P_MMU_CTRL			0x000</div><div class='del'>-#define S5P_MMU_CFG			0x004</div><div class='del'>-#define S5P_MMU_STATUS			0x008</div><div class='del'>-#define S5P_MMU_FLUSH			0x00C</div><div class='del'>-#define S5P_PT_BASE_ADDR		0x014</div><div class='del'>-#define S5P_INT_STATUS			0x018</div><div class='del'>-#define S5P_INT_CLEAR			0x01C</div><div class='del'>-#define S5P_PAGE_FAULT_ADDR		0x024</div><div class='del'>-#define S5P_AW_FAULT_ADDR		0x028</div><div class='del'>-#define S5P_AR_FAULT_ADDR		0x02C</div><div class='del'>-#define S5P_DEFAULT_SLAVE_ADDR		0x030</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_ARCH_REGS_SYSMMU_H */</div><div class='head'>diff --git a/arch/arm/mach-exynos/include/mach/spi-clocks.h b/arch/arm/mach-exynos/include/mach/spi-clocks.h<br/>index 576efdf6d091..c71a5fba6a84 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/spi-clocks.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/include/mach/spi-clocks.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/spi-clocks.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/spi-clocks.h</a></div><div class='hunk'>@@ -11,6 +11,6 @@</div><div class='ctx'> #define __ASM_ARCH_SPI_CLKS_H __FILE__</div><div class='ctx'> </div><div class='ctx'> /* Must source from SCLK_SPI */</div><div class='del'>-#define EXYNOS4_SPI_SRCCLK_SCLK		0</div><div class='add'>+#define EXYNOS_SPI_SRCCLK_SCLK		0</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_ARCH_SPI_CLKS_H */</div><div class='head'>diff --git a/arch/arm/mach-exynos/include/mach/sysmmu.h b/arch/arm/mach-exynos/include/mach/sysmmu.h<br/>index 6a5fbb534e82..998daf2add92 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/sysmmu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/include/mach/sysmmu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/include/mach/sysmmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/include/mach/sysmmu.h</a></div><div class='hunk'>@@ -1,46 +1,66 @@</div><div class='del'>-/* linux/arch/arm/mach-exynos4/include/mach/sysmmu.h</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com</div><div class='ctx'>  *</div><div class='del'>- * Samsung sysmmu driver for EXYNOS4</div><div class='add'>+ * EXYNOS - System MMU support</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='ctx'>  * published by the Free Software Foundation.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARM_ARCH_SYSMMU_H</div><div class='del'>-#define __ASM_ARM_ARCH_SYSMMU_H __FILE__</div><div class='del'>-</div><div class='del'>-enum exynos4_sysmmu_ips {</div><div class='del'>-	SYSMMU_MDMA,</div><div class='del'>-	SYSMMU_SSS,</div><div class='del'>-	SYSMMU_FIMC0,</div><div class='del'>-	SYSMMU_FIMC1,</div><div class='del'>-	SYSMMU_FIMC2,</div><div class='del'>-	SYSMMU_FIMC3,</div><div class='del'>-	SYSMMU_JPEG,</div><div class='del'>-	SYSMMU_FIMD0,</div><div class='del'>-	SYSMMU_FIMD1,</div><div class='del'>-	SYSMMU_PCIe,</div><div class='del'>-	SYSMMU_G2D,</div><div class='del'>-	SYSMMU_ROTATOR,</div><div class='del'>-	SYSMMU_MDMA2,</div><div class='del'>-	SYSMMU_TV,</div><div class='del'>-	SYSMMU_MFC_L,</div><div class='del'>-	SYSMMU_MFC_R,</div><div class='del'>-	EXYNOS4_SYSMMU_TOTAL_IPNUM,</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ARM_MACH_EXYNOS_SYSMMU_H_</div><div class='add'>+#define _ARM_MACH_EXYNOS_SYSMMU_H_</div><div class='add'>+</div><div class='add'>+struct sysmmu_platform_data {</div><div class='add'>+	char *dbgname;</div><div class='add'>+	/* comma(,) separated list of clock names for clock gating */</div><div class='add'>+	char *clockname;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define S5P_SYSMMU_TOTAL_IPNUM		EXYNOS4_SYSMMU_TOTAL_IPNUM</div><div class='add'>+#define SYSMMU_DEVNAME_BASE "exynos-sysmmu"</div><div class='add'>+</div><div class='add'>+#define SYSMMU_CLOCK_NAME "sysmmu"</div><div class='add'>+#define SYSMMU_CLOCK_NAME2 "sysmmu_mc"</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXYNOS_DEV_SYSMMU</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+struct platform_device;</div><div class='add'>+</div><div class='add'>+#define SYSMMU_PLATDEV(ipname) exynos_device_sysmmu_##ipname</div><div class='add'>+</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(mfc_l);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(mfc_r);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(tv);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(jpeg);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(rot);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(fimc0);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(fimc1);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(fimc2);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(fimc3);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(gsc0);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(gsc1);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(gsc2);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(gsc3);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(isp);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(fimd0);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(fimd1);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(camif0);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(camif1);</div><div class='add'>+extern struct platform_device SYSMMU_PLATDEV(2d);</div><div class='ctx'> </div><div class='del'>-extern const char *sysmmu_ips_name[EXYNOS4_SYSMMU_TOTAL_IPNUM];</div><div class='add'>+#ifdef CONFIG_IOMMU_API</div><div class='add'>+static inline void platform_set_sysmmu(</div><div class='add'>+				struct device *sysmmu, struct device *dev)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;archdata.iommu = sysmmu;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-typedef enum exynos4_sysmmu_ips sysmmu_ips;</div><div class='add'>+#else /* !CONFIG_EXYNOS_DEV_SYSMMU */</div><div class='add'>+#define platform_set_sysmmu(dev, sysmmu) do { } while (0)</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-void sysmmu_clk_init(struct device *dev, sysmmu_ips ips);</div><div class='del'>-void sysmmu_clk_enable(sysmmu_ips ips);</div><div class='del'>-void sysmmu_clk_disable(sysmmu_ips ips);</div><div class='add'>+#define SYSMMU_CLOCK_DEVNAME(ipname, id) (SYSMMU_DEVNAME_BASE "." #id)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASM_ARM_ARCH_SYSMMU_H */</div><div class='add'>+#endif /* _ARM_MACH_EXYNOS_SYSMMU_H_ */</div><div class='head'>diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c<br/>index d726fcd3acf9..5a3daa0168d8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-armlex4210.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/mach-armlex4210.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-armlex4210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-armlex4210.c</a></div><div class='hunk'>@@ -77,7 +77,6 @@ static struct s3c2410_uartcfg armlex4210_uartcfgs[] __initdata = {</div><div class='ctx'> </div><div class='ctx'> static struct s3c_sdhci_platdata armlex4210_hsmmc0_pdata __initdata = {</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_PERMANENT,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT</div><div class='ctx'> 	.max_width		= 8,</div><div class='ctx'> 	.host_caps		= MMC_CAP_8_BIT_DATA,</div><div class='hunk'>@@ -88,13 +87,11 @@ static struct s3c_sdhci_platdata armlex4210_hsmmc2_pdata __initdata = {</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_GPIO,</div><div class='ctx'> 	.ext_cd_gpio		= EXYNOS4_GPX2(5),</div><div class='ctx'> 	.ext_cd_gpio_invert	= 1,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> 	.max_width		= 4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_sdhci_platdata armlex4210_hsmmc3_pdata __initdata = {</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_PERMANENT,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> 	.max_width		= 4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -121,16 +118,9 @@ static void __init armlex4210_wlan_init(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource armlex4210_smsc911x_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SROM_BANK(3),</div><div class='del'>-		.end	= EXYNOS4_PA_SROM_BANK(3) + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_EINT(27),</div><div class='del'>-		.end	= IRQ_EINT(27),</div><div class='del'>-		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(3), SZ_64K),</div><div class='add'>+	[1] = DEFINE_RES_NAMED(IRQ_EINT(27), 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+					| IRQF_TRIGGER_HIGH),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct smsc911x_platform_config smsc9215_config = {</div><div class='hunk'>@@ -157,7 +147,6 @@ static struct platform_device *armlex4210_devices[] __initdata = {</div><div class='ctx'> 	&amp;s3c_device_hsmmc3,</div><div class='ctx'> 	&amp;s3c_device_rtc,</div><div class='ctx'> 	&amp;s3c_device_wdt,</div><div class='del'>-	&amp;exynos4_device_sysmmu,</div><div class='ctx'> 	&amp;samsung_asoc_dma,</div><div class='ctx'> 	&amp;armlex4210_smsc911x,</div><div class='ctx'> 	&amp;exynos4_device_ahci,</div><div class='hunk'>@@ -214,6 +203,7 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210")</div><div class='ctx'> 	.map_io		= armlex4210_map_io,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= armlex4210_machine_init,</div><div class='add'>+	.init_late	= exynos_init_late,</div><div class='ctx'> 	.timer		= &amp;exynos4_timer,</div><div class='ctx'> 	.restart	= exynos4_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c<br/>index 8245f1c761d9..e7e9743543ac 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-exynos4-dt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/mach-exynos4-dt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-exynos4-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-exynos4-dt.c</a></div><div class='hunk'>@@ -83,6 +83,7 @@ DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")</div><div class='ctx'> 	.map_io		= exynos4210_dt_map_io,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= exynos4210_dt_machine_init,</div><div class='add'>+	.init_late	= exynos_init_late,</div><div class='ctx'> 	.timer		= &amp;exynos4_timer,</div><div class='ctx'> 	.dt_compat	= exynos4210_dt_compat,</div><div class='ctx'> 	.restart        = exynos4_restart,</div><div class='head'>diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c<br/>index 4711c8920e37..7b1e11a228cc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-exynos5-dt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/mach-exynos5-dt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-exynos5-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-exynos5-dt.c</a></div><div class='hunk'>@@ -43,6 +43,10 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {</div><div class='ctx'> 				"exynos4210-uart.2", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART3,</div><div class='ctx'> 				"exynos4210-uart.3", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(0),</div><div class='add'>+				"s3c2440-i2c.0", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),</div><div class='add'>+				"s3c2440-i2c.1", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),</div><div class='hunk'>@@ -72,6 +76,7 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")</div><div class='ctx'> 	.map_io		= exynos5250_dt_map_io,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= exynos5250_dt_machine_init,</div><div class='add'>+	.init_late	= exynos_init_late,</div><div class='ctx'> 	.timer		= &amp;exynos4_timer,</div><div class='ctx'> 	.dt_compat	= exynos5250_dt_compat,</div><div class='ctx'> 	.restart        = exynos5_restart,</div><div class='head'>diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c<br/>index ed90aef404c3..656f8fc9addd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-nuri.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/mach-nuri.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-nuri.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-nuri.c</a></div><div class='hunk'>@@ -25,6 +25,8 @@</div><div class='ctx'> #include &lt;linux/mmc/host.h&gt;</div><div class='ctx'> #include &lt;linux/fb.h&gt;</div><div class='ctx'> #include &lt;linux/pwm_backlight.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/s3c-hsotg.h&gt;</div><div class='add'>+#include &lt;drm/exynos_drm.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;video/platform_lcd.h&gt;</div><div class='ctx'> #include &lt;media/m5mols.h&gt;</div><div class='hunk'>@@ -114,7 +116,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {</div><div class='ctx'> 				MMC_CAP_ERASE),</div><div class='ctx'> 	.host_caps2		= MMC_CAP2_BROKEN_VOLTAGE,</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_PERMANENT,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_consumer_supply emmc_supplies[] = {</div><div class='hunk'>@@ -155,7 +156,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc2_data __initdata = {</div><div class='ctx'> 	.ext_cd_gpio		= EXYNOS4_GPX3(3),	/* XEINT_27 */</div><div class='ctx'> 	.ext_cd_gpio_invert	= 1,</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_GPIO,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* WLAN */</div><div class='hunk'>@@ -164,7 +164,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc3_data __initdata = {</div><div class='ctx'> 	.host_caps		= MMC_CAP_4_BIT_DATA |</div><div class='ctx'> 				MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_EXTERNAL,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __init nuri_sdhci_init(void)</div><div class='hunk'>@@ -213,32 +212,60 @@ static struct platform_device nuri_gpio_keys = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS</div><div class='add'>+static struct exynos_drm_fimd_pdata drm_fimd_pdata = {</div><div class='add'>+	.panel = {</div><div class='add'>+		.timing	= {</div><div class='add'>+			.xres		= 1024,</div><div class='add'>+			.yres		= 600,</div><div class='add'>+			.hsync_len	= 40,</div><div class='add'>+			.left_margin	= 79,</div><div class='add'>+			.right_margin	= 200,</div><div class='add'>+			.vsync_len	= 10,</div><div class='add'>+			.upper_margin	= 10,</div><div class='add'>+			.lower_margin	= 11,</div><div class='add'>+			.refresh	= 60,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |</div><div class='add'>+			  VIDCON0_CLKSEL_LCD,</div><div class='add'>+	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='add'>+	.default_win	= 3,</div><div class='add'>+	.bpp		= 32,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#else</div><div class='ctx'> /* Frame Buffer */</div><div class='ctx'> static struct s3c_fb_pd_win nuri_fb_win0 = {</div><div class='del'>-	.win_mode = {</div><div class='del'>-		.left_margin	= 64,</div><div class='del'>-		.right_margin	= 16,</div><div class='del'>-		.upper_margin	= 64,</div><div class='del'>-		.lower_margin	= 1,</div><div class='del'>-		.hsync_len	= 48,</div><div class='del'>-		.vsync_len	= 3,</div><div class='del'>-		.xres		= 1024,</div><div class='del'>-		.yres		= 600,</div><div class='del'>-		.refresh	= 60,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 24,</div><div class='ctx'> 	.default_bpp	= 16,</div><div class='add'>+	.xres		= 1024,</div><div class='add'>+	.yres		= 600,</div><div class='ctx'> 	.virtual_x	= 1024,</div><div class='ctx'> 	.virtual_y	= 2 * 600,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct fb_videomode nuri_lcd_timing = {</div><div class='add'>+	.left_margin	= 64,</div><div class='add'>+	.right_margin	= 16,</div><div class='add'>+	.upper_margin	= 64,</div><div class='add'>+	.lower_margin	= 1,</div><div class='add'>+	.hsync_len	= 48,</div><div class='add'>+	.vsync_len	= 3,</div><div class='add'>+	.xres		= 1024,</div><div class='add'>+	.yres		= 600,</div><div class='add'>+	.refresh	= 60,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct s3c_fb_platdata nuri_fb_pdata __initdata = {</div><div class='ctx'> 	.win[0]		= &amp;nuri_fb_win0,</div><div class='add'>+	.vtiming	= &amp;nuri_lcd_timing,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |</div><div class='ctx'> 			  VIDCON0_CLKSEL_LCD,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='ctx'> 	.setup_gpio	= exynos4_fimd0_gpio_setup_24bpp,</div><div class='ctx'> };</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power)</div><div class='ctx'> {</div><div class='hunk'>@@ -351,6 +378,7 @@ static struct regulator_consumer_supply __initdata max8997_ldo1_[] = {</div><div class='ctx'> 	REGULATOR_SUPPLY("vdd", "s5p-adc"), /* Used by CPU's ADC drv */</div><div class='ctx'> };</div><div class='ctx'> static struct regulator_consumer_supply __initdata max8997_ldo3_[] = {</div><div class='add'>+	REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* USB */</div><div class='ctx'> 	REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */</div><div class='ctx'> };</div><div class='ctx'> static struct regulator_consumer_supply __initdata max8997_ldo4_[] = {</div><div class='hunk'>@@ -366,7 +394,7 @@ static struct regulator_consumer_supply __initdata max8997_ldo7_[] = {</div><div class='ctx'> 	REGULATOR_SUPPLY("dig_18", "0-001f"), /* HCD803 */</div><div class='ctx'> };</div><div class='ctx'> static struct regulator_consumer_supply __initdata max8997_ldo8_[] = {</div><div class='del'>-	REGULATOR_SUPPLY("vusb_d", NULL), /* Used by CPU */</div><div class='add'>+	REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), /* USB */</div><div class='ctx'> 	REGULATOR_SUPPLY("vdac", NULL), /* Used by CPU */</div><div class='ctx'> };</div><div class='ctx'> static struct regulator_consumer_supply __initdata max8997_ldo11_[] = {</div><div class='hunk'>@@ -822,6 +850,7 @@ static struct regulator_init_data __initdata max8997_esafeout1_data = {</div><div class='ctx'> 	.constraints	= {</div><div class='ctx'> 		.name		= "SAFEOUT1",</div><div class='ctx'> 		.valid_ops_mask	= REGULATOR_CHANGE_STATUS,</div><div class='add'>+		.always_on	= 1,</div><div class='ctx'> 		.state_mem	= {</div><div class='ctx'> 			.disabled	= 1,</div><div class='ctx'> 		},</div><div class='hunk'>@@ -1079,6 +1108,9 @@ static void __init nuri_ehci_init(void)</div><div class='ctx'> 	s5p_ehci_set_platdata(pdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* USB OTG */</div><div class='add'>+static struct s3c_hsotg_plat nuri_hsotg_pdata;</div><div class='add'>+</div><div class='ctx'> /* CAMERA */</div><div class='ctx'> static struct regulator_consumer_supply cam_vt_cam15_supply =</div><div class='ctx'> 	REGULATOR_SUPPLY("vdd_core", "6-003c");</div><div class='hunk'>@@ -1291,6 +1323,7 @@ static struct platform_device *nuri_devices[] __initdata = {</div><div class='ctx'> 	&amp;s5p_device_mfc_l,</div><div class='ctx'> 	&amp;s5p_device_mfc_r,</div><div class='ctx'> 	&amp;s5p_device_fimc_md,</div><div class='add'>+	&amp;s3c_device_usb_hsotg,</div><div class='ctx'> </div><div class='ctx'> 	/* NURI Devices */</div><div class='ctx'> 	&amp;nuri_gpio_keys,</div><div class='hunk'>@@ -1302,6 +1335,9 @@ static struct platform_device *nuri_devices[] __initdata = {</div><div class='ctx'> 	&amp;cam_vdda_fixed_rdev,</div><div class='ctx'> 	&amp;cam_8m_12v_fixed_rdev,</div><div class='ctx'> 	&amp;exynos4_bus_devfreq,</div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS</div><div class='add'>+	&amp;exynos_device_drm,</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __init nuri_map_io(void)</div><div class='hunk'>@@ -1334,11 +1370,17 @@ static void __init nuri_machine_init(void)</div><div class='ctx'> 	i2c_register_board_info(9, i2c9_devs, ARRAY_SIZE(i2c9_devs));</div><div class='ctx'> 	s3c_i2c6_set_platdata(&amp;nuri_i2c6_platdata);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS</div><div class='add'>+	s5p_device_fimd0.dev.platform_data = &amp;drm_fimd_pdata;</div><div class='add'>+	exynos4_fimd0_gpio_setup_24bpp();</div><div class='add'>+#else</div><div class='ctx'> 	s5p_fimd0_set_platdata(&amp;nuri_fb_pdata);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	nuri_camera_init();</div><div class='ctx'> </div><div class='ctx'> 	nuri_ehci_init();</div><div class='add'>+	s3c_hsotg_set_platdata(&amp;nuri_hsotg_pdata);</div><div class='ctx'> </div><div class='ctx'> 	/* Last */</div><div class='ctx'> 	platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));</div><div class='hunk'>@@ -1351,6 +1393,7 @@ MACHINE_START(NURI, "NURI")</div><div class='ctx'> 	.map_io		= nuri_map_io,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= nuri_machine_init,</div><div class='add'>+	.init_late	= exynos_init_late,</div><div class='ctx'> 	.timer		= &amp;exynos4_timer,</div><div class='ctx'> 	.reserve        = &amp;nuri_reserve,</div><div class='ctx'> 	.restart	= exynos4_restart,</div><div class='head'>diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c<br/>index 878d4c99142d..f5572be9d7bf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-origen.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/mach-origen.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-origen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-origen.c</a></div><div class='hunk'>@@ -45,6 +45,7 @@</div><div class='ctx'> #include &lt;mach/ohci.h&gt;</div><div class='ctx'> #include &lt;mach/map.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;drm/exynos_drm.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='ctx'> /* Following are default values for UCON, ULCON and UFCON UART registers */</div><div class='hunk'>@@ -472,12 +473,10 @@ static struct i2c_board_info i2c0_devs[] __initdata = {</div><div class='ctx'> </div><div class='ctx'> static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_INTERNAL,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_INTERNAL,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* USB EHCI */</div><div class='hunk'>@@ -583,31 +582,59 @@ static struct platform_device origen_lcd_hv070wsa = {</div><div class='ctx'> 	.dev.platform_data	= &amp;origen_lcd_hv070wsa_data,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct s3c_fb_pd_win origen_fb_win0 = {</div><div class='del'>-	.win_mode = {</div><div class='del'>-		.left_margin	= 64,</div><div class='del'>-		.right_margin	= 16,</div><div class='del'>-		.upper_margin	= 64,</div><div class='del'>-		.lower_margin	= 16,</div><div class='del'>-		.hsync_len	= 48,</div><div class='del'>-		.vsync_len	= 3,</div><div class='del'>-		.xres		= 1024,</div><div class='del'>-		.yres		= 600,</div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS</div><div class='add'>+static struct exynos_drm_fimd_pdata drm_fimd_pdata = {</div><div class='add'>+	.panel	= {</div><div class='add'>+		.timing	= {</div><div class='add'>+			.left_margin	= 64,</div><div class='add'>+			.right_margin	= 16,</div><div class='add'>+			.upper_margin	= 64,</div><div class='add'>+			.lower_margin	= 16,</div><div class='add'>+			.hsync_len	= 48,</div><div class='add'>+			.vsync_len	= 3,</div><div class='add'>+			.xres		= 1024,</div><div class='add'>+			.yres		= 600,</div><div class='add'>+		},</div><div class='ctx'> 	},</div><div class='add'>+	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='add'>+	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |</div><div class='add'>+				VIDCON1_INV_VCLK,</div><div class='add'>+	.default_win	= 0,</div><div class='add'>+	.bpp		= 32,</div><div class='add'>+};</div><div class='add'>+#else</div><div class='add'>+static struct s3c_fb_pd_win origen_fb_win0 = {</div><div class='add'>+	.xres			= 1024,</div><div class='add'>+	.yres			= 600,</div><div class='ctx'> 	.max_bpp		= 32,</div><div class='ctx'> 	.default_bpp		= 24,</div><div class='add'>+	.virtual_x		= 1024,</div><div class='add'>+	.virtual_y		= 2 * 600,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode origen_lcd_timing = {</div><div class='add'>+	.left_margin	= 64,</div><div class='add'>+	.right_margin	= 16,</div><div class='add'>+	.upper_margin	= 64,</div><div class='add'>+	.lower_margin	= 16,</div><div class='add'>+	.hsync_len	= 48,</div><div class='add'>+	.vsync_len	= 3,</div><div class='add'>+	.xres		= 1024,</div><div class='add'>+	.yres		= 600,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_platdata origen_lcd_pdata __initdata = {</div><div class='ctx'> 	.win[0]		= &amp;origen_fb_win0,</div><div class='add'>+	.vtiming	= &amp;origen_lcd_timing,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |</div><div class='ctx'> 				VIDCON1_INV_VCLK,</div><div class='ctx'> 	.setup_gpio	= exynos4_fimd0_gpio_setup_24bpp,</div><div class='ctx'> };</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /* Bluetooth rfkill gpio platform data */</div><div class='del'>-struct rfkill_gpio_platform_data origen_bt_pdata = {</div><div class='add'>+static struct rfkill_gpio_platform_data origen_bt_pdata = {</div><div class='ctx'> 	.reset_gpio	= EXYNOS4_GPX2(2),</div><div class='ctx'> 	.shutdown_gpio	= -1,</div><div class='ctx'> 	.type		= RFKILL_TYPE_BLUETOOTH,</div><div class='hunk'>@@ -644,6 +671,9 @@ static struct platform_device *origen_devices[] __initdata = {</div><div class='ctx'> 	&amp;s5p_device_mfc_l,</div><div class='ctx'> 	&amp;s5p_device_mfc_r,</div><div class='ctx'> 	&amp;s5p_device_mixer,</div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS</div><div class='add'>+	&amp;exynos_device_drm,</div><div class='add'>+#endif</div><div class='ctx'> 	&amp;exynos4_device_ohci,</div><div class='ctx'> 	&amp;origen_device_gpiokeys,</div><div class='ctx'> 	&amp;origen_lcd_hv070wsa,</div><div class='hunk'>@@ -719,7 +749,12 @@ static void __init origen_machine_init(void)</div><div class='ctx'> 	s5p_tv_setup();</div><div class='ctx'> 	s5p_i2c_hdmiphy_set_platdata(NULL);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS</div><div class='add'>+	s5p_device_fimd0.dev.platform_data = &amp;drm_fimd_pdata;</div><div class='add'>+	exynos4_fimd0_gpio_setup_24bpp();</div><div class='add'>+#else</div><div class='ctx'> 	s5p_fimd0_set_platdata(&amp;origen_lcd_pdata);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));</div><div class='ctx'> </div><div class='hunk'>@@ -735,6 +770,7 @@ MACHINE_START(ORIGEN, "ORIGEN")</div><div class='ctx'> 	.map_io		= origen_map_io,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= origen_machine_init,</div><div class='add'>+	.init_late	= exynos_init_late,</div><div class='ctx'> 	.timer		= &amp;exynos4_timer,</div><div class='ctx'> 	.reserve	= &amp;origen_reserve,</div><div class='ctx'> 	.restart	= exynos4_restart,</div><div class='head'>diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c<br/>index d00e4f016a68..fb09c70e195a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-smdk4x12.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/mach-smdk4x12.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-smdk4x12.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-smdk4x12.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;plat/gpio-cfg.h&gt;</div><div class='ctx'> #include &lt;plat/iic.h&gt;</div><div class='ctx'> #include &lt;plat/keypad.h&gt;</div><div class='add'>+#include &lt;plat/mfc.h&gt;</div><div class='ctx'> #include &lt;plat/regs-serial.h&gt;</div><div class='ctx'> #include &lt;plat/sdhci.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -85,7 +86,6 @@ static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = {</div><div class='ctx'> </div><div class='ctx'> static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_INTERNAL,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT</div><div class='ctx'> 	.max_width		= 8,</div><div class='ctx'> 	.host_caps		= MMC_CAP_8_BIT_DATA,</div><div class='hunk'>@@ -94,7 +94,6 @@ static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {</div><div class='ctx'> </div><div class='ctx'> static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = {</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_INTERNAL,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_consumer_supply max8997_buck1 =</div><div class='hunk'>@@ -244,6 +243,14 @@ static struct platform_device *smdk4x12_devices[] __initdata = {</div><div class='ctx'> 	&amp;s3c_device_i2c7,</div><div class='ctx'> 	&amp;s3c_device_rtc,</div><div class='ctx'> 	&amp;s3c_device_wdt,</div><div class='add'>+	&amp;s5p_device_fimc0,</div><div class='add'>+	&amp;s5p_device_fimc1,</div><div class='add'>+	&amp;s5p_device_fimc2,</div><div class='add'>+	&amp;s5p_device_fimc3,</div><div class='add'>+	&amp;s5p_device_fimc_md,</div><div class='add'>+	&amp;s5p_device_mfc,</div><div class='add'>+	&amp;s5p_device_mfc_l,</div><div class='add'>+	&amp;s5p_device_mfc_r,</div><div class='ctx'> 	&amp;samsung_device_keypad,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -256,6 +263,11 @@ static void __init smdk4x12_map_io(void)</div><div class='ctx'> 	s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init smdk4x12_reserve(void)</div><div class='add'>+{</div><div class='add'>+	s5p_mfc_reserve_mem(0x43000000, 8 &lt;&lt; 20, 0x51000000, 8 &lt;&lt; 20);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init smdk4x12_machine_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	s3c_i2c0_set_platdata(NULL);</div><div class='hunk'>@@ -293,6 +305,7 @@ MACHINE_START(SMDK4212, "SMDK4212")</div><div class='ctx'> 	.init_machine	= smdk4x12_machine_init,</div><div class='ctx'> 	.timer		= &amp;exynos4_timer,</div><div class='ctx'> 	.restart	= exynos4_restart,</div><div class='add'>+	.reserve	= &amp;smdk4x12_reserve,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(SMDK4412, "SMDK4412")</div><div class='hunk'>@@ -303,6 +316,8 @@ MACHINE_START(SMDK4412, "SMDK4412")</div><div class='ctx'> 	.map_io		= smdk4x12_map_io,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= smdk4x12_machine_init,</div><div class='add'>+	.init_late	= exynos_init_late,</div><div class='ctx'> 	.timer		= &amp;exynos4_timer,</div><div class='ctx'> 	.restart	= exynos4_restart,</div><div class='add'>+	.reserve	= &amp;smdk4x12_reserve,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c<br/>index 83b91fa777c1..262e9e446a96 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-smdkv310.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/mach-smdkv310.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-smdkv310.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-smdkv310.c</a></div><div class='hunk'>@@ -44,6 +44,7 @@</div><div class='ctx'> #include &lt;mach/map.h&gt;</div><div class='ctx'> #include &lt;mach/ohci.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;drm/exynos_drm.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='ctx'> /* Following are default values for UCON, ULCON and UFCON UART registers */</div><div class='hunk'>@@ -93,7 +94,6 @@ static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {</div><div class='ctx'> </div><div class='ctx'> static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_INTERNAL,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT</div><div class='ctx'> 	.max_width		= 8,</div><div class='ctx'> 	.host_caps		= MMC_CAP_8_BIT_DATA,</div><div class='hunk'>@@ -104,12 +104,10 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_GPIO,</div><div class='ctx'> 	.ext_cd_gpio		= EXYNOS4_GPK0(2),</div><div class='ctx'> 	.ext_cd_gpio_invert	= 1,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_INTERNAL,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT</div><div class='ctx'> 	.max_width		= 8,</div><div class='ctx'> 	.host_caps		= MMC_CAP_8_BIT_DATA,</div><div class='hunk'>@@ -120,7 +118,6 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_GPIO,</div><div class='ctx'> 	.ext_cd_gpio		= EXYNOS4_GPK2(2),</div><div class='ctx'> 	.ext_cd_gpio_invert	= 1,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,</div><div class='hunk'>@@ -160,39 +157,57 @@ static struct platform_device smdkv310_lcd_lte480wv = {</div><div class='ctx'> 	.dev.platform_data	= &amp;smdkv310_lcd_lte480wv_data,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct s3c_fb_pd_win smdkv310_fb_win0 = {</div><div class='del'>-	.win_mode = {</div><div class='del'>-		.left_margin	= 13,</div><div class='del'>-		.right_margin	= 8,</div><div class='del'>-		.upper_margin	= 7,</div><div class='del'>-		.lower_margin	= 5,</div><div class='del'>-		.hsync_len	= 3,</div><div class='del'>-		.vsync_len	= 1,</div><div class='del'>-		.xres		= 800,</div><div class='del'>-		.yres		= 480,</div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS</div><div class='add'>+static struct exynos_drm_fimd_pdata drm_fimd_pdata = {</div><div class='add'>+	.panel	= {</div><div class='add'>+		.timing	= {</div><div class='add'>+			.left_margin	= 13,</div><div class='add'>+			.right_margin	= 8,</div><div class='add'>+			.upper_margin	= 7,</div><div class='add'>+			.lower_margin	= 5,</div><div class='add'>+			.hsync_len	= 3,</div><div class='add'>+			.vsync_len	= 1,</div><div class='add'>+			.xres		= 800,</div><div class='add'>+			.yres		= 480,</div><div class='add'>+		},</div><div class='ctx'> 	},</div><div class='del'>-	.max_bpp		= 32,</div><div class='del'>-	.default_bpp		= 24,</div><div class='add'>+	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='add'>+	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='add'>+	.default_win	= 0,</div><div class='add'>+	.bpp		= 32,</div><div class='add'>+};</div><div class='add'>+#else</div><div class='add'>+static struct s3c_fb_pd_win smdkv310_fb_win0 = {</div><div class='add'>+	.max_bpp	= 32,</div><div class='add'>+	.default_bpp	= 24,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode smdkv310_lcd_timing = {</div><div class='add'>+	.left_margin	= 13,</div><div class='add'>+	.right_margin	= 8,</div><div class='add'>+	.upper_margin	= 7,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.hsync_len	= 3,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {</div><div class='ctx'> 	.win[0]		= &amp;smdkv310_fb_win0,</div><div class='add'>+	.vtiming	= &amp;smdkv310_lcd_timing,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='ctx'> 	.setup_gpio	= exynos4_fimd0_gpio_setup_24bpp,</div><div class='ctx'> };</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static struct resource smdkv310_smsc911x_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= EXYNOS4_PA_SROM_BANK(1),</div><div class='del'>-		.end	= EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_EINT(5),</div><div class='del'>-		.end	= IRQ_EINT(5),</div><div class='del'>-		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(1), SZ_64K),</div><div class='add'>+	[1] = DEFINE_RES_NAMED(IRQ_EINT(5), 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+						| IRQF_TRIGGER_LOW),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct smsc911x_platform_config smsc9215_config = {</div><div class='hunk'>@@ -273,6 +288,9 @@ static struct platform_device *smdkv310_devices[] __initdata = {</div><div class='ctx'> 	&amp;s5p_device_fimc_md,</div><div class='ctx'> 	&amp;s5p_device_g2d,</div><div class='ctx'> 	&amp;s5p_device_jpeg,</div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS</div><div class='add'>+	&amp;exynos_device_drm,</div><div class='add'>+#endif</div><div class='ctx'> 	&amp;exynos4_device_ac97,</div><div class='ctx'> 	&amp;exynos4_device_i2s0,</div><div class='ctx'> 	&amp;exynos4_device_ohci,</div><div class='hunk'>@@ -281,7 +299,6 @@ static struct platform_device *smdkv310_devices[] __initdata = {</div><div class='ctx'> 	&amp;s5p_device_mfc_l,</div><div class='ctx'> 	&amp;s5p_device_mfc_r,</div><div class='ctx'> 	&amp;exynos4_device_spdif,</div><div class='del'>-	&amp;exynos4_device_sysmmu,</div><div class='ctx'> 	&amp;samsung_asoc_dma,</div><div class='ctx'> 	&amp;samsung_asoc_idma,</div><div class='ctx'> 	&amp;s5p_device_fimd0,</div><div class='hunk'>@@ -364,7 +381,12 @@ static void __init smdkv310_machine_init(void)</div><div class='ctx'> 	samsung_keypad_set_platdata(&amp;smdkv310_keypad_data);</div><div class='ctx'> </div><div class='ctx'> 	samsung_bl_set(&amp;smdkv310_bl_gpio_info, &amp;smdkv310_bl_data);</div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS</div><div class='add'>+	s5p_device_fimd0.dev.platform_data = &amp;drm_fimd_pdata;</div><div class='add'>+	exynos4_fimd0_gpio_setup_24bpp();</div><div class='add'>+#else</div><div class='ctx'> 	s5p_fimd0_set_platdata(&amp;smdkv310_lcd0_pdata);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	smdkv310_ehci_init();</div><div class='ctx'> 	smdkv310_ohci_init();</div><div class='hunk'>@@ -393,6 +415,7 @@ MACHINE_START(SMDKC210, "SMDKC210")</div><div class='ctx'> 	.map_io		= smdkv310_map_io,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= smdkv310_machine_init,</div><div class='add'>+	.init_late	= exynos_init_late,</div><div class='ctx'> 	.timer		= &amp;exynos4_timer,</div><div class='ctx'> 	.restart	= exynos4_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c<br/>index cb2b027f09a6..cd92fa86ba41 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-universal_c210.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/mach-universal_c210.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/mach-universal_c210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mach-universal_c210.c</a></div><div class='hunk'>@@ -23,6 +23,8 @@</div><div class='ctx'> #include &lt;linux/i2c-gpio.h&gt;</div><div class='ctx'> #include &lt;linux/i2c/mcs.h&gt;</div><div class='ctx'> #include &lt;linux/i2c/atmel_mxt_ts.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/s3c-hsotg.h&gt;</div><div class='add'>+#include &lt;drm/exynos_drm.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/hardware/gic.h&gt;</div><div class='hunk'>@@ -40,6 +42,7 @@</div><div class='ctx'> #include &lt;plat/pd.h&gt;</div><div class='ctx'> #include &lt;plat/regs-fb-v4.h&gt;</div><div class='ctx'> #include &lt;plat/fimc-core.h&gt;</div><div class='add'>+#include &lt;plat/s5p-time.h&gt;</div><div class='ctx'> #include &lt;plat/camport.h&gt;</div><div class='ctx'> #include &lt;plat/mipi_csis.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -204,6 +207,7 @@ static struct regulator_init_data lp3974_ldo2_data = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {</div><div class='add'>+	REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),</div><div class='ctx'> 	REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),</div><div class='ctx'> 	REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),</div><div class='ctx'> 	REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),</div><div class='hunk'>@@ -289,6 +293,7 @@ static struct regulator_init_data lp3974_ldo7_data = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {</div><div class='add'>+	REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"),</div><div class='ctx'> 	REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -485,7 +490,10 @@ static struct regulator_init_data lp3974_vichg_data = {</div><div class='ctx'> static struct regulator_init_data lp3974_esafeout1_data = {</div><div class='ctx'> 	.constraints	= {</div><div class='ctx'> 		.name		= "SAFEOUT1",</div><div class='add'>+		.min_uV		= 4800000,</div><div class='add'>+		.max_uV		= 4800000,</div><div class='ctx'> 		.valid_ops_mask	= REGULATOR_CHANGE_STATUS,</div><div class='add'>+		.always_on	= 1,</div><div class='ctx'> 		.state_mem	= {</div><div class='ctx'> 			.enabled	= 1,</div><div class='ctx'> 		},</div><div class='hunk'>@@ -749,7 +757,6 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {</div><div class='ctx'> 				MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),</div><div class='ctx'> 	.host_caps2		= MMC_CAP2_BROKEN_VOLTAGE,</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_PERMANENT,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_consumer_supply mmc0_supplies[] = {</div><div class='hunk'>@@ -789,7 +796,6 @@ static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {</div><div class='ctx'> 	.ext_cd_gpio		= EXYNOS4_GPX3(4),      /* XEINT_28 */</div><div class='ctx'> 	.ext_cd_gpio_invert	= 1,</div><div class='ctx'> 	.cd_type		= S3C_SDHCI_CD_GPIO,</div><div class='del'>-	.clk_type		= S3C_SDHCI_CLK_DIV_EXTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* WiFi */</div><div class='hunk'>@@ -812,33 +818,61 @@ static struct i2c_board_info i2c1_devs[] __initdata = {</div><div class='ctx'> 	/* Gyro, To be updated */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS</div><div class='add'>+static struct exynos_drm_fimd_pdata drm_fimd_pdata = {</div><div class='add'>+	.panel = {</div><div class='add'>+		.timing	= {</div><div class='add'>+			.left_margin	= 16,</div><div class='add'>+			.right_margin	= 16,</div><div class='add'>+			.upper_margin	= 2,</div><div class='add'>+			.lower_margin	= 28,</div><div class='add'>+			.hsync_len	= 2,</div><div class='add'>+			.vsync_len	= 1,</div><div class='add'>+			.xres		= 480,</div><div class='add'>+			.yres		= 800,</div><div class='add'>+			.refresh	= 55,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |</div><div class='add'>+			  VIDCON0_CLKSEL_LCD,</div><div class='add'>+	.vidcon1	= VIDCON1_INV_VCLK | VIDCON1_INV_VDEN</div><div class='add'>+			  | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='add'>+	.default_win	= 3,</div><div class='add'>+	.bpp		= 32,</div><div class='add'>+};</div><div class='add'>+#else</div><div class='ctx'> /* Frame Buffer */</div><div class='ctx'> static struct s3c_fb_pd_win universal_fb_win0 = {</div><div class='del'>-	.win_mode = {</div><div class='del'>-		.left_margin	= 16,</div><div class='del'>-		.right_margin	= 16,</div><div class='del'>-		.upper_margin	= 2,</div><div class='del'>-		.lower_margin	= 28,</div><div class='del'>-		.hsync_len	= 2,</div><div class='del'>-		.vsync_len	= 1,</div><div class='del'>-		.xres		= 480,</div><div class='del'>-		.yres		= 800,</div><div class='del'>-		.refresh	= 55,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 32,</div><div class='ctx'> 	.default_bpp	= 16,</div><div class='add'>+	.xres		= 480,</div><div class='add'>+	.yres		= 800,</div><div class='ctx'> 	.virtual_x	= 480,</div><div class='ctx'> 	.virtual_y	= 2 * 800,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct fb_videomode universal_lcd_timing = {</div><div class='add'>+	.left_margin	= 16,</div><div class='add'>+	.right_margin	= 16,</div><div class='add'>+	.upper_margin	= 2,</div><div class='add'>+	.lower_margin	= 28,</div><div class='add'>+	.hsync_len	= 2,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 480,</div><div class='add'>+	.yres		= 800,</div><div class='add'>+	.refresh	= 55,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct s3c_fb_platdata universal_lcd_pdata __initdata = {</div><div class='ctx'> 	.win[0]		= &amp;universal_fb_win0,</div><div class='add'>+	.vtiming	= &amp;universal_lcd_timing,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |</div><div class='ctx'> 			  VIDCON0_CLKSEL_LCD,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_VCLK | VIDCON1_INV_VDEN</div><div class='ctx'> 			  | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='ctx'> 	.setup_gpio	= exynos4_fimd0_gpio_setup_24bpp,</div><div class='ctx'> };</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static struct regulator_consumer_supply cam_vt_dio_supply =</div><div class='ctx'> 	REGULATOR_SUPPLY("vdd_core", "0-003c");</div><div class='hunk'>@@ -993,6 +1027,9 @@ static struct gpio universal_camera_gpios[] = {</div><div class='ctx'> 	{ GPIO_CAM_VGA_NSTBY,	GPIOF_OUT_INIT_LOW,  "CAM_VGA_NSTBY" },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* USB OTG */</div><div class='add'>+static struct s3c_hsotg_plat universal_hsotg_pdata;</div><div class='add'>+</div><div class='ctx'> static void __init universal_camera_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	s3c_set_platdata(&amp;mipi_csis_platdata, sizeof(mipi_csis_platdata),</div><div class='hunk'>@@ -1048,6 +1085,10 @@ static struct platform_device *universal_devices[] __initdata = {</div><div class='ctx'> 	&amp;s5p_device_onenand,</div><div class='ctx'> 	&amp;s5p_device_fimd0,</div><div class='ctx'> 	&amp;s5p_device_jpeg,</div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS</div><div class='add'>+	&amp;exynos_device_drm,</div><div class='add'>+#endif</div><div class='add'>+	&amp;s3c_device_usb_hsotg,</div><div class='ctx'> 	&amp;s5p_device_mfc,</div><div class='ctx'> 	&amp;s5p_device_mfc_l,</div><div class='ctx'> 	&amp;s5p_device_mfc_r,</div><div class='hunk'>@@ -1063,6 +1104,7 @@ static void __init universal_map_io(void)</div><div class='ctx'> 	exynos_init_io(NULL, 0);</div><div class='ctx'> 	s3c24xx_init_clocks(24000000);</div><div class='ctx'> 	s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));</div><div class='add'>+	s5p_set_timer_source(S5P_PWM2, S5P_PWM4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void s5p_tv_setup(void)</div><div class='hunk'>@@ -1094,12 +1136,18 @@ static void __init universal_machine_init(void)</div><div class='ctx'> 	s5p_i2c_hdmiphy_set_platdata(NULL);</div><div class='ctx'> 	i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS</div><div class='add'>+	s5p_device_fimd0.dev.platform_data = &amp;drm_fimd_pdata;</div><div class='add'>+	exynos4_fimd0_gpio_setup_24bpp();</div><div class='add'>+#else</div><div class='ctx'> 	s5p_fimd0_set_platdata(&amp;universal_lcd_pdata);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	universal_touchkey_init();</div><div class='ctx'> 	i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,</div><div class='ctx'> 			ARRAY_SIZE(i2c_gpio12_devs));</div><div class='ctx'> </div><div class='add'>+	s3c_hsotg_set_platdata(&amp;universal_hsotg_pdata);</div><div class='ctx'> 	universal_camera_init();</div><div class='ctx'> </div><div class='ctx'> 	/* Last */</div><div class='hunk'>@@ -1113,7 +1161,8 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")</div><div class='ctx'> 	.map_io		= universal_map_io,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= universal_machine_init,</div><div class='del'>-	.timer		= &amp;exynos4_timer,</div><div class='add'>+	.init_late	= exynos_init_late,</div><div class='add'>+	.timer		= &amp;s5p_timer,</div><div class='ctx'> 	.reserve        = &amp;universal_reserve,</div><div class='ctx'> 	.restart	= exynos4_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c<br/>index 897d9a9cf226..b601fb8a408b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/mct.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/mct.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/mct.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/mct.c</a></div><div class='hunk'>@@ -388,6 +388,7 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)</div><div class='ctx'> {</div><div class='ctx'> 	struct mct_clock_event_device *mevt;</div><div class='ctx'> 	unsigned int cpu = smp_processor_id();</div><div class='add'>+	int mct_lx_irq;</div><div class='ctx'> </div><div class='ctx'> 	mevt = this_cpu_ptr(&amp;percpu_mct_tick);</div><div class='ctx'> 	mevt-&gt;evt = evt;</div><div class='hunk'>@@ -414,14 +415,18 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)</div><div class='ctx'> </div><div class='ctx'> 	if (mct_int_type == MCT_INT_SPI) {</div><div class='ctx'> 		if (cpu == 0) {</div><div class='add'>+			mct_lx_irq = soc_is_exynos4210() ? EXYNOS4_IRQ_MCT_L0 :</div><div class='add'>+						EXYNOS5_IRQ_MCT_L0;</div><div class='ctx'> 			mct_tick0_event_irq.dev_id = mevt;</div><div class='del'>-			evt-&gt;irq = EXYNOS4_IRQ_MCT_L0;</div><div class='del'>-			setup_irq(EXYNOS4_IRQ_MCT_L0, &amp;mct_tick0_event_irq);</div><div class='add'>+			evt-&gt;irq = mct_lx_irq;</div><div class='add'>+			setup_irq(mct_lx_irq, &amp;mct_tick0_event_irq);</div><div class='ctx'> 		} else {</div><div class='add'>+			mct_lx_irq = soc_is_exynos4210() ? EXYNOS4_IRQ_MCT_L1 :</div><div class='add'>+						EXYNOS5_IRQ_MCT_L1;</div><div class='ctx'> 			mct_tick1_event_irq.dev_id = mevt;</div><div class='del'>-			evt-&gt;irq = EXYNOS4_IRQ_MCT_L1;</div><div class='del'>-			setup_irq(EXYNOS4_IRQ_MCT_L1, &amp;mct_tick1_event_irq);</div><div class='del'>-			irq_set_affinity(EXYNOS4_IRQ_MCT_L1, cpumask_of(1));</div><div class='add'>+			evt-&gt;irq = mct_lx_irq;</div><div class='add'>+			setup_irq(mct_lx_irq, &amp;mct_tick1_event_irq);</div><div class='add'>+			irq_set_affinity(mct_lx_irq, cpumask_of(1));</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		enable_percpu_irq(EXYNOS_IRQ_MCT_LOCALTIMER, 0);</div><div class='hunk'>@@ -473,7 +478,7 @@ static void __init exynos4_timer_resources(void)</div><div class='ctx'> </div><div class='ctx'> static void __init exynos4_timer_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (soc_is_exynos4210())</div><div class='add'>+	if ((soc_is_exynos4210()) || (soc_is_exynos5250()))</div><div class='ctx'> 		mct_int_type = MCT_INT_SPI;</div><div class='ctx'> 	else</div><div class='ctx'> 		mct_int_type = MCT_INT_PPI;</div><div class='head'>diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c<br/>index 428cfeb57724..c06c992943a1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/pm.c</a></div><div class='hunk'>@@ -1,9 +1,8 @@</div><div class='del'>-/* linux/arch/arm/mach-exynos4/pm.c</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2011 Samsung Electronics Co., Ltd.</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com</div><div class='ctx'>  *</div><div class='del'>- * EXYNOS4210 - Power Management support</div><div class='add'>+ * EXYNOS - Power Management support</div><div class='ctx'>  *</div><div class='ctx'>  * Based on arch/arm/mach-s3c2410/pm.c</div><div class='ctx'>  * Copyright (c) 2006 Simtec Electronics</div><div class='hunk'>@@ -63,90 +62,7 @@ static struct sleep_save exynos4_vpll_save[] = {</div><div class='ctx'> 	SAVE_ITEM(EXYNOS4_VPLL_CON1),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct sleep_save exynos4_core_save[] = {</div><div class='del'>-	/* GIC side */</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_CPU + 0x000),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_CPU + 0x004),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_CPU + 0x008),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_CPU + 0x00C),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_CPU + 0x014),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_CPU + 0x018),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x000),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x004),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x100),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x104),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x108),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x300),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x304),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x308),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x400),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x404),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x408),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x40C),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x410),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x414),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x418),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x41C),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x420),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x424),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x428),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x42C),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x430),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x434),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x438),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x43C),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x440),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x444),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x448),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x44C),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x450),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x454),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x458),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x45C),</div><div class='del'>-</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x800),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x804),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x808),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x80C),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x810),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x814),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x818),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x81C),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x820),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x824),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x828),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x82C),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x830),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x834),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x838),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x83C),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x840),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x844),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x848),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x84C),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x850),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x854),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x858),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0x85C),</div><div class='del'>-</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0xC00),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0xC04),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0xC08),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0xC0C),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0xC10),</div><div class='del'>-	SAVE_ITEM(S5P_VA_GIC_DIST + 0xC14),</div><div class='del'>-</div><div class='del'>-	SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x000),</div><div class='del'>-	SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x010),</div><div class='del'>-	SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x020),</div><div class='del'>-	SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x030),</div><div class='del'>-	SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x040),</div><div class='del'>-	SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x050),</div><div class='del'>-	SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x060),</div><div class='del'>-	SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x070),</div><div class='del'>-	SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x080),</div><div class='del'>-	SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x090),</div><div class='del'>-</div><div class='add'>+static struct sleep_save exynos_core_save[] = {</div><div class='ctx'> 	/* SROM side */</div><div class='ctx'> 	SAVE_ITEM(S5P_SROM_BW),</div><div class='ctx'> 	SAVE_ITEM(S5P_SROM_BC0),</div><div class='hunk'>@@ -159,9 +75,11 @@ static struct sleep_save exynos4_core_save[] = {</div><div class='ctx'> /* For Cortex-A9 Diagnostic and Power control register */</div><div class='ctx'> static unsigned int save_arm_register[2];</div><div class='ctx'> </div><div class='del'>-static int exynos4_cpu_suspend(unsigned long arg)</div><div class='add'>+static int exynos_cpu_suspend(unsigned long arg)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_CACHE_L2X0</div><div class='ctx'> 	outer_flush_all();</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/* issue the standby signal into the pm unit. */</div><div class='ctx'> 	cpu_do_idle();</div><div class='hunk'>@@ -170,19 +88,25 @@ static int exynos4_cpu_suspend(unsigned long arg)</div><div class='ctx'> 	panic("sleep resumed to originator?");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void exynos4_pm_prepare(void)</div><div class='add'>+static void exynos_pm_prepare(void)</div><div class='ctx'> {</div><div class='del'>-	u32 tmp;</div><div class='add'>+	unsigned int tmp;</div><div class='ctx'> </div><div class='del'>-	s3c_pm_do_save(exynos4_core_save, ARRAY_SIZE(exynos4_core_save));</div><div class='del'>-	s3c_pm_do_save(exynos4_epll_save, ARRAY_SIZE(exynos4_epll_save));</div><div class='del'>-	s3c_pm_do_save(exynos4_vpll_save, ARRAY_SIZE(exynos4_vpll_save));</div><div class='add'>+	s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));</div><div class='ctx'> </div><div class='del'>-	tmp = __raw_readl(S5P_INFORM1);</div><div class='add'>+	if (!soc_is_exynos5250()) {</div><div class='add'>+		s3c_pm_do_save(exynos4_epll_save, ARRAY_SIZE(exynos4_epll_save));</div><div class='add'>+		s3c_pm_do_save(exynos4_vpll_save, ARRAY_SIZE(exynos4_vpll_save));</div><div class='add'>+	} else {</div><div class='add'>+		/* Disable USE_RETENTION of JPEG_MEM_OPTION */</div><div class='add'>+		tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);</div><div class='add'>+		tmp &amp;= ~EXYNOS5_OPTION_USE_RETENTION;</div><div class='add'>+		__raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set value of power down register for sleep mode */</div><div class='ctx'> </div><div class='del'>-	exynos4_sys_powerdown_conf(SYS_SLEEP);</div><div class='add'>+	exynos_sys_powerdown_conf(SYS_SLEEP);</div><div class='ctx'> 	__raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);</div><div class='ctx'> </div><div class='ctx'> 	/* ensure at least INFORM0 has the resume address */</div><div class='hunk'>@@ -191,17 +115,18 @@ static void exynos4_pm_prepare(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Before enter central sequence mode, clock src register have to set */</div><div class='ctx'> </div><div class='del'>-	s3c_pm_do_restore_core(exynos4_set_clksrc, ARRAY_SIZE(exynos4_set_clksrc));</div><div class='add'>+	if (!soc_is_exynos5250())</div><div class='add'>+		s3c_pm_do_restore_core(exynos4_set_clksrc, ARRAY_SIZE(exynos4_set_clksrc));</div><div class='ctx'> </div><div class='ctx'> 	if (soc_is_exynos4210())</div><div class='ctx'> 		s3c_pm_do_restore_core(exynos4210_set_clksrc, ARRAY_SIZE(exynos4210_set_clksrc));</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int exynos4_pm_add(struct device *dev, struct subsys_interface *sif)</div><div class='add'>+static int exynos_pm_add(struct device *dev, struct subsys_interface *sif)</div><div class='ctx'> {</div><div class='del'>-	pm_cpu_prep = exynos4_pm_prepare;</div><div class='del'>-	pm_cpu_sleep = exynos4_cpu_suspend;</div><div class='add'>+	pm_cpu_prep = exynos_pm_prepare;</div><div class='add'>+	pm_cpu_sleep = exynos_cpu_suspend;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -273,13 +198,13 @@ static void exynos4_restore_pll(void)</div><div class='ctx'> 	} while (epll_wait || vpll_wait);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct subsys_interface exynos4_pm_interface = {</div><div class='del'>-	.name		= "exynos4_pm",</div><div class='del'>-	.subsys		= &amp;exynos4_subsys,</div><div class='del'>-	.add_dev	= exynos4_pm_add,</div><div class='add'>+static struct subsys_interface exynos_pm_interface = {</div><div class='add'>+	.name		= "exynos_pm",</div><div class='add'>+	.subsys		= &amp;exynos_subsys,</div><div class='add'>+	.add_dev	= exynos_pm_add,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static __init int exynos4_pm_drvinit(void)</div><div class='add'>+static __init int exynos_pm_drvinit(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk *pll_base;</div><div class='ctx'> 	unsigned int tmp;</div><div class='hunk'>@@ -292,18 +217,20 @@ static __init int exynos4_pm_drvinit(void)</div><div class='ctx'> 	tmp |= ((0xFF &lt;&lt; 8) | (0x1F &lt;&lt; 1));</div><div class='ctx'> 	__raw_writel(tmp, S5P_WAKEUP_MASK);</div><div class='ctx'> </div><div class='del'>-	pll_base = clk_get(NULL, "xtal");</div><div class='add'>+	if (!soc_is_exynos5250()) {</div><div class='add'>+		pll_base = clk_get(NULL, "xtal");</div><div class='ctx'> </div><div class='del'>-	if (!IS_ERR(pll_base)) {</div><div class='del'>-		pll_base_rate = clk_get_rate(pll_base);</div><div class='del'>-		clk_put(pll_base);</div><div class='add'>+		if (!IS_ERR(pll_base)) {</div><div class='add'>+			pll_base_rate = clk_get_rate(pll_base);</div><div class='add'>+			clk_put(pll_base);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return subsys_interface_register(&amp;exynos4_pm_interface);</div><div class='add'>+	return subsys_interface_register(&amp;exynos_pm_interface);</div><div class='ctx'> }</div><div class='del'>-arch_initcall(exynos4_pm_drvinit);</div><div class='add'>+arch_initcall(exynos_pm_drvinit);</div><div class='ctx'> </div><div class='del'>-static int exynos4_pm_suspend(void)</div><div class='add'>+static int exynos_pm_suspend(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long tmp;</div><div class='ctx'> </div><div class='hunk'>@@ -313,27 +240,27 @@ static int exynos4_pm_suspend(void)</div><div class='ctx'> 	tmp &amp;= ~S5P_CENTRAL_LOWPWR_CFG;</div><div class='ctx'> 	__raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);</div><div class='ctx'> </div><div class='del'>-	if (soc_is_exynos4212()) {</div><div class='del'>-		tmp = __raw_readl(S5P_CENTRAL_SEQ_OPTION);</div><div class='del'>-		tmp &amp;= ~(S5P_USE_STANDBYWFI_ISP_ARM |</div><div class='del'>-			 S5P_USE_STANDBYWFE_ISP_ARM);</div><div class='del'>-		__raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);</div><div class='del'>-	}</div><div class='add'>+	/* Setting SEQ_OPTION register */</div><div class='add'>+</div><div class='add'>+	tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);</div><div class='add'>+	__raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);</div><div class='ctx'> </div><div class='del'>-	/* Save Power control register */</div><div class='del'>-	asm ("mrc p15, 0, %0, c15, c0, 0"</div><div class='del'>-	     : "=r" (tmp) : : "cc");</div><div class='del'>-	save_arm_register[0] = tmp;</div><div class='add'>+	if (!soc_is_exynos5250()) {</div><div class='add'>+		/* Save Power control register */</div><div class='add'>+		asm ("mrc p15, 0, %0, c15, c0, 0"</div><div class='add'>+		     : "=r" (tmp) : : "cc");</div><div class='add'>+		save_arm_register[0] = tmp;</div><div class='ctx'> </div><div class='del'>-	/* Save Diagnostic register */</div><div class='del'>-	asm ("mrc p15, 0, %0, c15, c0, 1"</div><div class='del'>-	     : "=r" (tmp) : : "cc");</div><div class='del'>-	save_arm_register[1] = tmp;</div><div class='add'>+		/* Save Diagnostic register */</div><div class='add'>+		asm ("mrc p15, 0, %0, c15, c0, 1"</div><div class='add'>+		     : "=r" (tmp) : : "cc");</div><div class='add'>+		save_arm_register[1] = tmp;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void exynos4_pm_resume(void)</div><div class='add'>+static void exynos_pm_resume(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long tmp;</div><div class='ctx'> </div><div class='hunk'>@@ -350,17 +277,19 @@ static void exynos4_pm_resume(void)</div><div class='ctx'> 		/* No need to perform below restore code */</div><div class='ctx'> 		goto early_wakeup;</div><div class='ctx'> 	}</div><div class='del'>-	/* Restore Power control register */</div><div class='del'>-	tmp = save_arm_register[0];</div><div class='del'>-	asm volatile ("mcr p15, 0, %0, c15, c0, 0"</div><div class='del'>-		      : : "r" (tmp)</div><div class='del'>-		      : "cc");</div><div class='del'>-</div><div class='del'>-	/* Restore Diagnostic register */</div><div class='del'>-	tmp = save_arm_register[1];</div><div class='del'>-	asm volatile ("mcr p15, 0, %0, c15, c0, 1"</div><div class='del'>-		      : : "r" (tmp)</div><div class='del'>-		      : "cc");</div><div class='add'>+	if (!soc_is_exynos5250()) {</div><div class='add'>+		/* Restore Power control register */</div><div class='add'>+		tmp = save_arm_register[0];</div><div class='add'>+		asm volatile ("mcr p15, 0, %0, c15, c0, 0"</div><div class='add'>+			      : : "r" (tmp)</div><div class='add'>+			      : "cc");</div><div class='add'>+</div><div class='add'>+		/* Restore Diagnostic register */</div><div class='add'>+		tmp = save_arm_register[1];</div><div class='add'>+		asm volatile ("mcr p15, 0, %0, c15, c0, 1"</div><div class='add'>+			      : : "r" (tmp)</div><div class='add'>+			      : "cc");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* For release retention */</div><div class='ctx'> </div><div class='hunk'>@@ -372,26 +301,28 @@ static void exynos4_pm_resume(void)</div><div class='ctx'> 	__raw_writel((1 &lt;&lt; 28), S5P_PAD_RET_EBIA_OPTION);</div><div class='ctx'> 	__raw_writel((1 &lt;&lt; 28), S5P_PAD_RET_EBIB_OPTION);</div><div class='ctx'> </div><div class='del'>-	s3c_pm_do_restore_core(exynos4_core_save, ARRAY_SIZE(exynos4_core_save));</div><div class='add'>+	s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));</div><div class='ctx'> </div><div class='del'>-	exynos4_restore_pll();</div><div class='add'>+	if (!soc_is_exynos5250()) {</div><div class='add'>+		exynos4_restore_pll();</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-	scu_enable(S5P_VA_SCU);</div><div class='add'>+		scu_enable(S5P_VA_SCU);</div><div class='ctx'> #endif</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> early_wakeup:</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct syscore_ops exynos4_pm_syscore_ops = {</div><div class='del'>-	.suspend	= exynos4_pm_suspend,</div><div class='del'>-	.resume		= exynos4_pm_resume,</div><div class='add'>+static struct syscore_ops exynos_pm_syscore_ops = {</div><div class='add'>+	.suspend	= exynos_pm_suspend,</div><div class='add'>+	.resume		= exynos_pm_resume,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static __init int exynos4_pm_syscore_init(void)</div><div class='add'>+static __init int exynos_pm_syscore_init(void)</div><div class='ctx'> {</div><div class='del'>-	register_syscore_ops(&amp;exynos4_pm_syscore_ops);</div><div class='add'>+	register_syscore_ops(&amp;exynos_pm_syscore_ops);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(exynos4_pm_syscore_init);</div><div class='add'>+arch_initcall(exynos_pm_syscore_init);</div><div class='head'>diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c<br/>index 13b306808b42..e9fafcf163de 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/pm_domains.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/pm_domains.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/pm_domains.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/pm_domains.c</a></div><div class='hunk'>@@ -193,9 +193,8 @@ static __init int exynos4_pm_init_power_domain(void)</div><div class='ctx'> }</div><div class='ctx'> arch_initcall(exynos4_pm_init_power_domain);</div><div class='ctx'> </div><div class='del'>-static __init int exynos_pm_late_initcall(void)</div><div class='add'>+int __init exynos_pm_late_initcall(void)</div><div class='ctx'> {</div><div class='ctx'> 	pm_genpd_poweroff_unused();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-late_initcall(exynos_pm_late_initcall);</div><div class='head'>diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c<br/>index bba48f5c3e8f..4aacb66f7161 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/pmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/pmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/pmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/pmu.c</a></div><div class='hunk'>@@ -1,9 +1,8 @@</div><div class='del'>-/* linux/arch/arm/mach-exynos4/pmu.c</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2011 Samsung Electronics Co., Ltd.</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com/</div><div class='ctx'>  *</div><div class='del'>- * EXYNOS4210 - CPU PMU(Power Management Unit) support</div><div class='add'>+ * EXYNOS - CPU PMU(Power Management Unit) support</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='hunk'>@@ -12,13 +11,14 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/bug.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/regs-clock.h&gt;</div><div class='ctx'> #include &lt;mach/pmu.h&gt;</div><div class='ctx'> </div><div class='del'>-static struct exynos4_pmu_conf *exynos4_pmu_config;</div><div class='add'>+static struct exynos_pmu_conf *exynos_pmu_config;</div><div class='ctx'> </div><div class='del'>-static struct exynos4_pmu_conf exynos4210_pmu_config[] = {</div><div class='add'>+static struct exynos_pmu_conf exynos4210_pmu_config[] = {</div><div class='ctx'> 	/* { .reg = address, .val = { AFTR, LPA, SLEEP } */</div><div class='ctx'> 	{ S5P_ARM_CORE0_LOWPWR,			{ 0x0, 0x0, 0x2 } },</div><div class='ctx'> 	{ S5P_DIS_IRQ_CORE0,			{ 0x0, 0x0, 0x0 } },</div><div class='hunk'>@@ -94,7 +94,7 @@ static struct exynos4_pmu_conf exynos4210_pmu_config[] = {</div><div class='ctx'> 	{ PMU_TABLE_END,},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct exynos4_pmu_conf exynos4212_pmu_config[] = {</div><div class='add'>+static struct exynos_pmu_conf exynos4x12_pmu_config[] = {</div><div class='ctx'> 	{ S5P_ARM_CORE0_LOWPWR,			{ 0x0, 0x0, 0x2 } },</div><div class='ctx'> 	{ S5P_DIS_IRQ_CORE0,			{ 0x0, 0x0, 0x0 } },</div><div class='ctx'> 	{ S5P_DIS_IRQ_CENTRAL0,			{ 0x0, 0x0, 0x0 } },</div><div class='hunk'>@@ -202,29 +202,209 @@ static struct exynos4_pmu_conf exynos4212_pmu_config[] = {</div><div class='ctx'> 	{ PMU_TABLE_END,},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void exynos4_sys_powerdown_conf(enum sys_powerdown mode)</div><div class='add'>+static struct exynos_pmu_conf exynos4412_pmu_config[] = {</div><div class='add'>+	{ S5P_ARM_CORE2_LOWPWR,			{ 0x0, 0x0, 0x2 } },</div><div class='add'>+	{ S5P_DIS_IRQ_CORE2,			{ 0x0, 0x0, 0x0 } },</div><div class='add'>+	{ S5P_DIS_IRQ_CENTRAL2,			{ 0x0, 0x0, 0x0 } },</div><div class='add'>+	{ S5P_ARM_CORE3_LOWPWR,			{ 0x0, 0x0, 0x2 } },</div><div class='add'>+	{ S5P_DIS_IRQ_CORE3,			{ 0x0, 0x0, 0x0 } },</div><div class='add'>+	{ S5P_DIS_IRQ_CENTRAL3,			{ 0x0, 0x0, 0x0 } },</div><div class='add'>+	{ PMU_TABLE_END,},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct exynos_pmu_conf exynos5250_pmu_config[] = {</div><div class='add'>+	/* { .reg = address, .val = { AFTR, LPA, SLEEP } */</div><div class='add'>+	{ EXYNOS5_ARM_CORE0_SYS_PWR_REG,		{ 0x0, 0x0, 0x2} },</div><div class='add'>+	{ EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG,	{ 0x0, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG,	{ 0x0, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_ARM_CORE1_SYS_PWR_REG,		{ 0x0, 0x0, 0x2} },</div><div class='add'>+	{ EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG,	{ 0x0, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG,	{ 0x0, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_FSYS_ARM_SYS_PWR_REG,			{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG,	{ 0x1, 0x1, 0x1} },</div><div class='add'>+	{ EXYNOS5_ISP_ARM_SYS_PWR_REG,			{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG,	{ 0x0, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG,	{ 0x0, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_ARM_COMMON_SYS_PWR_REG,		{ 0x0, 0x0, 0x2} },</div><div class='add'>+	{ EXYNOS5_ARM_L2_SYS_PWR_REG,			{ 0x3, 0x3, 0x3} },</div><div class='add'>+	{ EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG,		{ 0x1, 0x0, 0x1} },</div><div class='add'>+	{ EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG,		{ 0x1, 0x0, 0x1} },</div><div class='add'>+	{ EXYNOS5_CMU_RESET_SYS_PWR_REG,		{ 0x1, 0x1, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG,	{ 0x1, 0x0, 0x1} },</div><div class='add'>+	{ EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG,	{ 0x1, 0x0, 0x1} },</div><div class='add'>+	{ EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG,		{ 0x1, 0x1, 0x0} },</div><div class='add'>+	{ EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG,		{ 0x1, 0x1, 0x1} },</div><div class='add'>+	{ EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG,		{ 0x1, 0x1, 0x1} },</div><div class='add'>+	{ EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG,		{ 0x1, 0x1, 0x1} },</div><div class='add'>+	{ EXYNOS5_APLL_SYSCLK_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG,		{ 0x1, 0x1, 0x0} },</div><div class='add'>+	{ EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_BPLLUSER_SYSCLK_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_TOP_BUS_SYS_PWR_REG,			{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_TOP_RETENTION_SYS_PWR_REG,		{ 0x1, 0x0, 0x1} },</div><div class='add'>+	{ EXYNOS5_TOP_PWR_SYS_PWR_REG,			{ 0x3, 0x0, 0x3} },</div><div class='add'>+	{ EXYNOS5_TOP_BUS_SYSMEM_SYS_PWR_REG,		{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_TOP_RETENTION_SYSMEM_SYS_PWR_REG,	{ 0x1, 0x0, 0x1} },</div><div class='add'>+	{ EXYNOS5_TOP_PWR_SYSMEM_SYS_PWR_REG,		{ 0x3, 0x0, 0x3} },</div><div class='add'>+	{ EXYNOS5_LOGIC_RESET_SYS_PWR_REG,		{ 0x1, 0x1, 0x0} },</div><div class='add'>+	{ EXYNOS5_OSCCLK_GATE_SYS_PWR_REG,		{ 0x1, 0x0, 0x1} },</div><div class='add'>+	{ EXYNOS5_LOGIC_RESET_SYSMEM_SYS_PWR_REG,	{ 0x1, 0x1, 0x0} },</div><div class='add'>+	{ EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG,	{ 0x1, 0x0, 0x1} },</div><div class='add'>+	{ EXYNOS5_USBOTG_MEM_SYS_PWR_REG,		{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_G2D_MEM_SYS_PWR_REG,			{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_USBDRD_MEM_SYS_PWR_REG,		{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_SDMMC_MEM_SYS_PWR_REG,		{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CSSYS_MEM_SYS_PWR_REG,		{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_SECSS_MEM_SYS_PWR_REG,		{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_ROTATOR_MEM_SYS_PWR_REG,		{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_INTRAM_MEM_SYS_PWR_REG,		{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_INTROM_MEM_SYS_PWR_REG,		{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_JPEG_MEM_SYS_PWR_REG,			{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_HSI_MEM_SYS_PWR_REG,			{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_MCUIOP_MEM_SYS_PWR_REG,		{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_SATA_MEM_SYS_PWR_REG,			{ 0x3, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_RETENTION_DRAM_SYS_PWR_REG,	{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_RETENTION_MAU_SYS_PWR_REG,	{ 0x1, 0x1, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_RETENTION_GPIO_SYS_PWR_REG,	{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_RETENTION_UART_SYS_PWR_REG,	{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_RETENTION_MMCA_SYS_PWR_REG,	{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_RETENTION_MMCB_SYS_PWR_REG,	{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_RETENTION_EBIA_SYS_PWR_REG,	{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_RETENTION_EBIB_SYS_PWR_REG,	{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_RETENTION_SPI_SYS_PWR_REG,	{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_RETENTION_GPIO_SYSMEM_SYS_PWR_REG,	{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_ISOLATION_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_ISOLATION_SYSMEM_SYS_PWR_REG,	{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_PAD_ALV_SEL_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_XUSBXTI_SYS_PWR_REG,			{ 0x1, 0x1, 0x1} },</div><div class='add'>+	{ EXYNOS5_XXTI_SYS_PWR_REG,			{ 0x1, 0x1, 0x0} },</div><div class='add'>+	{ EXYNOS5_EXT_REGULATOR_SYS_PWR_REG,		{ 0x1, 0x1, 0x0} },</div><div class='add'>+	{ EXYNOS5_GPIO_MODE_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_GPIO_MODE_MAU_SYS_PWR_REG,		{ 0x1, 0x1, 0x0} },</div><div class='add'>+	{ EXYNOS5_TOP_ASB_RESET_SYS_PWR_REG,		{ 0x1, 0x1, 0x1} },</div><div class='add'>+	{ EXYNOS5_TOP_ASB_ISOLATION_SYS_PWR_REG,	{ 0x1, 0x0, 0x1} },</div><div class='add'>+	{ EXYNOS5_GSCL_SYS_PWR_REG,			{ 0x7, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_ISP_SYS_PWR_REG,			{ 0x7, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_MFC_SYS_PWR_REG,			{ 0x7, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_G3D_SYS_PWR_REG,			{ 0x7, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_DISP1_SYS_PWR_REG,			{ 0x7, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_MAU_SYS_PWR_REG,			{ 0x7, 0x7, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_CLKSTOP_GSCL_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_CLKSTOP_ISP_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_CLKSTOP_MFC_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_CLKSTOP_G3D_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_CLKSTOP_DISP1_SYS_PWR_REG,	{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_CLKSTOP_MAU_SYS_PWR_REG,		{ 0x1, 0x1, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_SYSCLK_GSCL_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_SYSCLK_ISP_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_SYSCLK_MFC_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_SYSCLK_G3D_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_SYSCLK_DISP1_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_SYSCLK_MAU_SYS_PWR_REG,		{ 0x1, 0x1, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_RESET_GSCL_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_RESET_ISP_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_RESET_MFC_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_RESET_G3D_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_RESET_DISP1_SYS_PWR_REG,		{ 0x1, 0x0, 0x0} },</div><div class='add'>+	{ EXYNOS5_CMU_RESET_MAU_SYS_PWR_REG,		{ 0x1, 0x1, 0x0} },</div><div class='add'>+	{ PMU_TABLE_END,},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __iomem *exynos5_list_both_cnt_feed[] = {</div><div class='add'>+	EXYNOS5_ARM_CORE0_OPTION,</div><div class='add'>+	EXYNOS5_ARM_CORE1_OPTION,</div><div class='add'>+	EXYNOS5_ARM_COMMON_OPTION,</div><div class='add'>+	EXYNOS5_GSCL_OPTION,</div><div class='add'>+	EXYNOS5_ISP_OPTION,</div><div class='add'>+	EXYNOS5_MFC_OPTION,</div><div class='add'>+	EXYNOS5_G3D_OPTION,</div><div class='add'>+	EXYNOS5_DISP1_OPTION,</div><div class='add'>+	EXYNOS5_MAU_OPTION,</div><div class='add'>+	EXYNOS5_TOP_PWR_OPTION,</div><div class='add'>+	EXYNOS5_TOP_PWR_SYSMEM_OPTION,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __iomem *exynos5_list_diable_wfi_wfe[] = {</div><div class='add'>+	EXYNOS5_ARM_CORE1_OPTION,</div><div class='add'>+	EXYNOS5_FSYS_ARM_OPTION,</div><div class='add'>+	EXYNOS5_ISP_ARM_OPTION,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void exynos5_init_pmu(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='add'>+	unsigned int tmp;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; (exynos4_pmu_config[i].reg != PMU_TABLE_END) ; i++)</div><div class='del'>-		__raw_writel(exynos4_pmu_config[i].val[mode],</div><div class='del'>-				exynos4_pmu_config[i].reg);</div><div class='add'>+	/*</div><div class='add'>+	 * Enable both SC_FEEDBACK and SC_COUNTER</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0 ; i &lt; ARRAY_SIZE(exynos5_list_both_cnt_feed) ; i++) {</div><div class='add'>+		tmp = __raw_readl(exynos5_list_both_cnt_feed[i]);</div><div class='add'>+		tmp |= (EXYNOS5_USE_SC_FEEDBACK |</div><div class='add'>+			EXYNOS5_USE_SC_COUNTER);</div><div class='add'>+		__raw_writel(tmp, exynos5_list_both_cnt_feed[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable</div><div class='add'>+	 * MANUAL_L2RSTDISABLE_CONTROL_BITFIELD Enable</div><div class='add'>+	 */</div><div class='add'>+	tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION);</div><div class='add'>+	tmp |= (EXYNOS5_MANUAL_L2RSTDISABLE_CONTROL |</div><div class='add'>+		EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN);</div><div class='add'>+	__raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable WFI/WFE on XXX_OPTION</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0 ; i &lt; ARRAY_SIZE(exynos5_list_diable_wfi_wfe) ; i++) {</div><div class='add'>+		tmp = __raw_readl(exynos5_list_diable_wfi_wfe[i]);</div><div class='add'>+		tmp &amp;= ~(EXYNOS5_OPTION_USE_STANDBYWFE |</div><div class='add'>+			 EXYNOS5_OPTION_USE_STANDBYWFI);</div><div class='add'>+		__raw_writel(tmp, exynos5_list_diable_wfi_wfe[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void exynos_sys_powerdown_conf(enum sys_powerdown mode)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	if (soc_is_exynos5250())</div><div class='add'>+		exynos5_init_pmu();</div><div class='add'>+</div><div class='add'>+	for (i = 0; (exynos_pmu_config[i].reg != PMU_TABLE_END) ; i++)</div><div class='add'>+		__raw_writel(exynos_pmu_config[i].val[mode],</div><div class='add'>+				exynos_pmu_config[i].reg);</div><div class='add'>+</div><div class='add'>+	if (soc_is_exynos4412()) {</div><div class='add'>+		for (i = 0; exynos4412_pmu_config[i].reg != PMU_TABLE_END ; i++)</div><div class='add'>+			__raw_writel(exynos4412_pmu_config[i].val[mode],</div><div class='add'>+				exynos4412_pmu_config[i].reg);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init exynos4_pmu_init(void)</div><div class='add'>+static int __init exynos_pmu_init(void)</div><div class='ctx'> {</div><div class='del'>-	exynos4_pmu_config = exynos4210_pmu_config;</div><div class='add'>+	exynos_pmu_config = exynos4210_pmu_config;</div><div class='ctx'> </div><div class='ctx'> 	if (soc_is_exynos4210()) {</div><div class='del'>-		exynos4_pmu_config = exynos4210_pmu_config;</div><div class='add'>+		exynos_pmu_config = exynos4210_pmu_config;</div><div class='ctx'> 		pr_info("EXYNOS4210 PMU Initialize\n");</div><div class='del'>-	} else if (soc_is_exynos4212()) {</div><div class='del'>-		exynos4_pmu_config = exynos4212_pmu_config;</div><div class='del'>-		pr_info("EXYNOS4212 PMU Initialize\n");</div><div class='add'>+	} else if (soc_is_exynos4212() || soc_is_exynos4412()) {</div><div class='add'>+		exynos_pmu_config = exynos4x12_pmu_config;</div><div class='add'>+		pr_info("EXYNOS4x12 PMU Initialize\n");</div><div class='add'>+	} else if (soc_is_exynos5250()) {</div><div class='add'>+		exynos_pmu_config = exynos5250_pmu_config;</div><div class='add'>+		pr_info("EXYNOS5250 PMU Initialize\n");</div><div class='ctx'> 	} else {</div><div class='del'>-		pr_info("EXYNOS4: PMU not supported\n");</div><div class='add'>+		pr_info("EXYNOS: PMU not supported\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(exynos4_pmu_init);</div><div class='add'>+arch_initcall(exynos_pmu_init);</div><div class='head'>diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c<br/>index 41743d21e8c6..1af0a7f44e00 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-exynos/setup-usb-phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-exynos/setup-usb-phy.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-exynos/setup-usb-phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-exynos/setup-usb-phy.c</a></div><div class='hunk'>@@ -26,11 +26,71 @@ static int exynos4_usb_host_phy_is_on(void)</div><div class='ctx'> 	return (readl(EXYNOS4_PHYPWR) &amp; PHY1_STD_ANALOG_POWERDOWN) ? 0 : 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int exynos4_usb_phy1_init(struct platform_device *pdev)</div><div class='add'>+static void exynos4210_usb_phy_clkset(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct clk *otg_clk;</div><div class='ctx'> 	struct clk *xusbxti_clk;</div><div class='ctx'> 	u32 phyclk;</div><div class='add'>+</div><div class='add'>+	/* set clock frequency for PLL */</div><div class='add'>+	phyclk = readl(EXYNOS4_PHYCLK) &amp; ~CLKSEL_MASK;</div><div class='add'>+</div><div class='add'>+	xusbxti_clk = clk_get(&amp;pdev-&gt;dev, "xusbxti");</div><div class='add'>+	if (xusbxti_clk &amp;&amp; !IS_ERR(xusbxti_clk)) {</div><div class='add'>+		switch (clk_get_rate(xusbxti_clk)) {</div><div class='add'>+		case 12 * MHZ:</div><div class='add'>+			phyclk |= CLKSEL_12M;</div><div class='add'>+			break;</div><div class='add'>+		case 24 * MHZ:</div><div class='add'>+			phyclk |= CLKSEL_24M;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+		case 48 * MHZ:</div><div class='add'>+			/* default reference clock */</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		clk_put(xusbxti_clk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel(phyclk, EXYNOS4_PHYCLK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int exynos4210_usb_phy0_init(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	u32 rstcon;</div><div class='add'>+</div><div class='add'>+	writel(readl(S5P_USBDEVICE_PHY_CONTROL) | S5P_USBDEVICE_PHY_ENABLE,</div><div class='add'>+			S5P_USBDEVICE_PHY_CONTROL);</div><div class='add'>+</div><div class='add'>+	exynos4210_usb_phy_clkset(pdev);</div><div class='add'>+</div><div class='add'>+	/* set to normal PHY0 */</div><div class='add'>+	writel((readl(EXYNOS4_PHYPWR) &amp; ~PHY0_NORMAL_MASK), EXYNOS4_PHYPWR);</div><div class='add'>+</div><div class='add'>+	/* reset PHY0 and Link */</div><div class='add'>+	rstcon = readl(EXYNOS4_RSTCON) | PHY0_SWRST_MASK;</div><div class='add'>+	writel(rstcon, EXYNOS4_RSTCON);</div><div class='add'>+	udelay(10);</div><div class='add'>+</div><div class='add'>+	rstcon &amp;= ~PHY0_SWRST_MASK;</div><div class='add'>+	writel(rstcon, EXYNOS4_RSTCON);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int exynos4210_usb_phy0_exit(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	writel((readl(EXYNOS4_PHYPWR) | PHY0_ANALOG_POWERDOWN |</div><div class='add'>+				PHY0_OTG_DISABLE), EXYNOS4_PHYPWR);</div><div class='add'>+</div><div class='add'>+	writel(readl(S5P_USBDEVICE_PHY_CONTROL) &amp; ~S5P_USBDEVICE_PHY_ENABLE,</div><div class='add'>+			S5P_USBDEVICE_PHY_CONTROL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int exynos4210_usb_phy1_init(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct clk *otg_clk;</div><div class='ctx'> 	u32 rstcon;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -54,27 +114,7 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)</div><div class='ctx'> 	writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE,</div><div class='ctx'> 			S5P_USBHOST_PHY_CONTROL);</div><div class='ctx'> </div><div class='del'>-	/* set clock frequency for PLL */</div><div class='del'>-	phyclk = readl(EXYNOS4_PHYCLK) &amp; ~CLKSEL_MASK;</div><div class='del'>-</div><div class='del'>-	xusbxti_clk = clk_get(&amp;pdev-&gt;dev, "xusbxti");</div><div class='del'>-	if (xusbxti_clk &amp;&amp; !IS_ERR(xusbxti_clk)) {</div><div class='del'>-		switch (clk_get_rate(xusbxti_clk)) {</div><div class='del'>-		case 12 * MHZ:</div><div class='del'>-			phyclk |= CLKSEL_12M;</div><div class='del'>-			break;</div><div class='del'>-		case 24 * MHZ:</div><div class='del'>-			phyclk |= CLKSEL_24M;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-		case 48 * MHZ:</div><div class='del'>-			/* default reference clock */</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		clk_put(xusbxti_clk);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	writel(phyclk, EXYNOS4_PHYCLK);</div><div class='add'>+	exynos4210_usb_phy_clkset(pdev);</div><div class='ctx'> </div><div class='ctx'> 	/* floating prevention logic: disable */</div><div class='ctx'> 	writel((readl(EXYNOS4_PHY1CON) | FPENABLEN), EXYNOS4_PHY1CON);</div><div class='hunk'>@@ -102,7 +142,7 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int exynos4_usb_phy1_exit(struct platform_device *pdev)</div><div class='add'>+static int exynos4210_usb_phy1_exit(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk *otg_clk;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -136,16 +176,20 @@ static int exynos4_usb_phy1_exit(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> int s5p_usb_phy_init(struct platform_device *pdev, int type)</div><div class='ctx'> {</div><div class='del'>-	if (type == S5P_USB_PHY_HOST)</div><div class='del'>-		return exynos4_usb_phy1_init(pdev);</div><div class='add'>+	if (type == S5P_USB_PHY_DEVICE)</div><div class='add'>+		return exynos4210_usb_phy0_init(pdev);</div><div class='add'>+	else if (type == S5P_USB_PHY_HOST)</div><div class='add'>+		return exynos4210_usb_phy1_init(pdev);</div><div class='ctx'> </div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int s5p_usb_phy_exit(struct platform_device *pdev, int type)</div><div class='ctx'> {</div><div class='del'>-	if (type == S5P_USB_PHY_HOST)</div><div class='del'>-		return exynos4_usb_phy1_exit(pdev);</div><div class='add'>+	if (type == S5P_USB_PHY_DEVICE)</div><div class='add'>+		return exynos4210_usb_phy0_exit(pdev);</div><div class='add'>+	else if (type == S5P_USB_PHY_HOST)</div><div class='add'>+		return exynos4210_usb_phy1_exit(pdev);</div><div class='ctx'> </div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-footbridge/cats-pci.c b/arch/arm/mach-footbridge/cats-pci.c<br/>index 32321f66dec4..5cec2567c9c5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-footbridge/cats-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-footbridge/cats-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-footbridge/cats-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-footbridge/cats-pci.c</a></div><div class='hunk'>@@ -16,6 +16,11 @@</div><div class='ctx'> /* cats host-specific stuff */</div><div class='ctx'> static int irqmap_cats[] __initdata = { IRQ_PCI, IRQ_IN0, IRQ_IN1, IRQ_IN3 };</div><div class='ctx'> </div><div class='add'>+static u8 cats_no_swizzle(struct pci_dev *dev, u8 *pin)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> {</div><div class='ctx'> 	if (dev-&gt;irq &gt;= 255)</div><div class='hunk'>@@ -39,11 +44,11 @@ static int __init cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'>  * cards being used (ie, pci-pci bridge based cards)?</div><div class='ctx'>  */</div><div class='ctx'> static struct hw_pci cats_pci __initdata = {</div><div class='del'>-	.swizzle		= NULL,</div><div class='add'>+	.swizzle		= cats_no_swizzle,</div><div class='ctx'> 	.map_irq		= cats_map_irq,</div><div class='ctx'> 	.nr_controllers		= 1,</div><div class='add'>+	.ops			= &amp;dc21285_ops,</div><div class='ctx'> 	.setup			= dc21285_setup,</div><div class='del'>-	.scan			= dc21285_scan_bus,</div><div class='ctx'> 	.preinit		= dc21285_preinit,</div><div class='ctx'> 	.postinit		= dc21285_postinit,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c<br/>index e17e11de4f5e..9d62e3381024 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-footbridge/dc21285.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-footbridge/dc21285.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-footbridge/dc21285.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-footbridge/dc21285.c</a></div><div class='hunk'>@@ -129,7 +129,7 @@ dc21285_write_config(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='ctx'> 	return PCIBIOS_SUCCESSFUL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct pci_ops dc21285_ops = {</div><div class='add'>+struct pci_ops dc21285_ops = {</div><div class='ctx'> 	.read	= dc21285_read_config,</div><div class='ctx'> 	.write	= dc21285_write_config,</div><div class='ctx'> };</div><div class='hunk'>@@ -284,11 +284,6 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct pci_bus * __init dc21285_scan_bus(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	return pci_scan_root_bus(NULL, 0, &amp;dc21285_ops, sys, &amp;sys-&gt;resources);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define dc21285_request_irq(_a, _b, _c, _d, _e) \</div><div class='ctx'> 	WARN_ON(request_irq(_a, _b, _c, _d, _e) &lt; 0)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-footbridge/ebsa285-pci.c b/arch/arm/mach-footbridge/ebsa285-pci.c<br/>index 511c673ffa9d..fd12d8a36dc5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-footbridge/ebsa285-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-footbridge/ebsa285-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-footbridge/ebsa285-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-footbridge/ebsa285-pci.c</a></div><div class='hunk'>@@ -29,11 +29,10 @@ static int __init ebsa285_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci ebsa285_pci __initdata = {</div><div class='del'>-	.swizzle		= pci_std_swizzle,</div><div class='ctx'> 	.map_irq		= ebsa285_map_irq,</div><div class='ctx'> 	.nr_controllers		= 1,</div><div class='add'>+	.ops			= &amp;dc21285_ops,</div><div class='ctx'> 	.setup			= dc21285_setup,</div><div class='del'>-	.scan			= dc21285_scan_bus,</div><div class='ctx'> 	.preinit		= dc21285_preinit,</div><div class='ctx'> 	.postinit		= dc21285_postinit,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-footbridge/netwinder-pci.c b/arch/arm/mach-footbridge/netwinder-pci.c<br/>index 62187610e17e..0fba5134e4fe 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-footbridge/netwinder-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-footbridge/netwinder-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-footbridge/netwinder-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-footbridge/netwinder-pci.c</a></div><div class='hunk'>@@ -43,11 +43,10 @@ static int __init netwinder_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci netwinder_pci __initdata = {</div><div class='del'>-	.swizzle		= pci_std_swizzle,</div><div class='ctx'> 	.map_irq		= netwinder_map_irq,</div><div class='ctx'> 	.nr_controllers		= 1,</div><div class='add'>+	.ops			= &amp;dc21285_ops,</div><div class='ctx'> 	.setup			= dc21285_setup,</div><div class='del'>-	.scan			= dc21285_scan_bus,</div><div class='ctx'> 	.preinit		= dc21285_preinit,</div><div class='ctx'> 	.postinit		= dc21285_postinit,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-footbridge/personal-pci.c b/arch/arm/mach-footbridge/personal-pci.c<br/>index aeb651d914a6..5c9ee54613b2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-footbridge/personal-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-footbridge/personal-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-footbridge/personal-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-footbridge/personal-pci.c</a></div><div class='hunk'>@@ -41,8 +41,8 @@ static int __init personal_server_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> static struct hw_pci personal_server_pci __initdata = {</div><div class='ctx'> 	.map_irq		= personal_server_map_irq,</div><div class='ctx'> 	.nr_controllers		= 1,</div><div class='add'>+	.ops			= &amp;dc21285_ops,</div><div class='ctx'> 	.setup			= dc21285_setup,</div><div class='del'>-	.scan			= dc21285_scan_bus,</div><div class='ctx'> 	.preinit		= dc21285_preinit,</div><div class='ctx'> 	.postinit		= dc21285_postinit,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig<br/>index 7561eca131b0..0021f726b153 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/Kconfig</a></div><div class='hunk'>@@ -34,6 +34,7 @@ config ARCH_MX53</div><div class='ctx'> config SOC_IMX1</div><div class='ctx'> 	bool</div><div class='ctx'> 	select ARCH_MX1</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select CPU_ARM920T</div><div class='ctx'> 	select IMX_HAVE_IOMUX_V1</div><div class='ctx'> 	select MXC_AVIC</div><div class='hunk'>@@ -42,12 +43,14 @@ config SOC_IMX21</div><div class='ctx'> 	bool</div><div class='ctx'> 	select MACH_MX21</div><div class='ctx'> 	select CPU_ARM926T</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select IMX_HAVE_IOMUX_V1</div><div class='ctx'> 	select MXC_AVIC</div><div class='ctx'> </div><div class='ctx'> config SOC_IMX25</div><div class='ctx'> 	bool</div><div class='ctx'> 	select ARCH_MX25</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select CPU_ARM926T</div><div class='ctx'> 	select ARCH_MXC_IOMUX_V3</div><div class='ctx'> 	select MXC_AVIC</div><div class='hunk'>@@ -56,6 +59,7 @@ config SOC_IMX27</div><div class='ctx'> 	bool</div><div class='ctx'> 	select MACH_MX27</div><div class='ctx'> 	select CPU_ARM926T</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select IMX_HAVE_IOMUX_V1</div><div class='ctx'> 	select MXC_AVIC</div><div class='ctx'> </div><div class='hunk'>@@ -64,12 +68,14 @@ config SOC_IMX31</div><div class='ctx'> 	select CPU_V6</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_MXC_RNGA</div><div class='ctx'> 	select MXC_AVIC</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select SMP_ON_UP if SMP</div><div class='ctx'> </div><div class='ctx'> config SOC_IMX35</div><div class='ctx'> 	bool</div><div class='ctx'> 	select CPU_V6</div><div class='ctx'> 	select ARCH_MXC_IOMUX_V3</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select HAVE_EPIT</div><div class='ctx'> 	select MXC_AVIC</div><div class='ctx'> 	select SMP_ON_UP if SMP</div><div class='hunk'>@@ -77,6 +83,7 @@ config SOC_IMX35</div><div class='ctx'> config SOC_IMX5</div><div class='ctx'> 	select CPU_V7</div><div class='ctx'> 	select MXC_TZIC</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select ARCH_MXC_IOMUX_V3</div><div class='ctx'> 	select ARCH_HAS_CPUFREQ</div><div class='ctx'> 	select ARCH_MX5</div><div class='hunk'>@@ -151,6 +158,7 @@ config MACH_MX25_3DS</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX2_WDT</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMXDI_RTC</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_I2C</div><div class='add'>+	select IMX_HAVE_PLATFORM_IMX_SSI</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_FB</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_KEYPAD</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_UART</div><div class='hunk'>@@ -163,6 +171,7 @@ config MACH_EUKREA_CPUIMX25SD</div><div class='ctx'> 	select SOC_IMX25</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_FLEXCAN</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC</div><div class='add'>+	select IMX_HAVE_PLATFORM_IMX2_WDT</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMXDI_RTC</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_FB</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_I2C</div><div class='hunk'>@@ -181,6 +190,7 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD</div><div class='ctx'> 	bool "Eukrea MBIMXSD development board"</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_GPIO_KEYS</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_SSI</div><div class='add'>+	select IMX_HAVE_PLATFORM_SPI_IMX</div><div class='ctx'> 	select LEDS_GPIO_REGISTER</div><div class='ctx'> 	help</div><div class='ctx'> 	  This adds board specific devices that can be found on Eukrea's</div><div class='hunk'>@@ -493,6 +503,7 @@ config MACH_MX31MOBOARD</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX2_WDT</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_I2C</div><div class='add'>+	select IMX_HAVE_PLATFORM_IMX_SSI</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_UART</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IPU_CORE</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_MXC_EHCI</div><div class='hunk'>@@ -571,8 +582,10 @@ config MACH_MX35_3DS</div><div class='ctx'> 	select MXC_DEBUG_BOARD</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX2_WDT</div><div class='add'>+	select IMX_HAVE_PLATFORM_IMX_FB</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_I2C</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_UART</div><div class='add'>+	select IMX_HAVE_PLATFORM_IPU_CORE</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_MXC_EHCI</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_MXC_NAND</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX</div><div class='hunk'>@@ -606,6 +619,7 @@ config MACH_EUKREA_MBIMXSD35_BASEBOARD</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_GPIO_KEYS</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_SSI</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IPU_CORE</div><div class='add'>+	select IMX_HAVE_PLATFORM_SPI_IMX</div><div class='ctx'> 	select LEDS_GPIO_REGISTER</div><div class='ctx'> 	help</div><div class='ctx'> 	  This adds board specific devices that can be found on Eukrea's</div><div class='hunk'>@@ -682,42 +696,13 @@ config MACH_MX51_3DS</div><div class='ctx'> 	  Include support for MX51PDK (3DS) platform. This includes specific</div><div class='ctx'> 	  configurations for the board and its peripherals.</div><div class='ctx'> </div><div class='del'>-config MACH_EUKREA_CPUIMX51</div><div class='del'>-	bool "Support Eukrea CPUIMX51 module"</div><div class='del'>-	select SOC_IMX51</div><div class='del'>-	select IMX_HAVE_PLATFORM_FSL_USB2_UDC</div><div class='del'>-	select IMX_HAVE_PLATFORM_IMX_I2C</div><div class='del'>-	select IMX_HAVE_PLATFORM_IMX_UART</div><div class='del'>-	select IMX_HAVE_PLATFORM_MXC_EHCI</div><div class='del'>-	select IMX_HAVE_PLATFORM_MXC_NAND</div><div class='del'>-	select IMX_HAVE_PLATFORM_SPI_IMX</div><div class='del'>-	help</div><div class='del'>-	  Include support for Eukrea CPUIMX51 platform. This includes</div><div class='del'>-	  specific configurations for the module and its peripherals.</div><div class='del'>-</div><div class='del'>-choice</div><div class='del'>-	prompt "Baseboard"</div><div class='del'>-	depends on MACH_EUKREA_CPUIMX51</div><div class='del'>-	default MACH_EUKREA_MBIMX51_BASEBOARD</div><div class='del'>-</div><div class='del'>-config MACH_EUKREA_MBIMX51_BASEBOARD</div><div class='del'>-	prompt "Eukrea MBIMX51 development board"</div><div class='del'>-	bool</div><div class='del'>-	select IMX_HAVE_PLATFORM_IMX_KEYPAD</div><div class='del'>-	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX</div><div class='del'>-	select LEDS_GPIO_REGISTER</div><div class='del'>-	help</div><div class='del'>-	  This adds board specific devices that can be found on Eukrea's</div><div class='del'>-	  MBIMX51 evaluation board.</div><div class='del'>-</div><div class='del'>-endchoice</div><div class='del'>-</div><div class='ctx'> config MACH_EUKREA_CPUIMX51SD</div><div class='ctx'> 	bool "Support Eukrea CPUIMX51SD module"</div><div class='ctx'> 	select SOC_IMX51</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_I2C</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_IMX_UART</div><div class='add'>+	select IMX_HAVE_PLATFORM_IMX2_WDT</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_MXC_EHCI</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_MXC_NAND</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_SPI_IMX</div><div class='hunk'>@@ -733,6 +718,7 @@ choice</div><div class='ctx'> config MACH_EUKREA_MBIMXSD51_BASEBOARD</div><div class='ctx'> 	prompt "Eukrea MBIMXSD development board"</div><div class='ctx'> 	bool</div><div class='add'>+	select IMX_HAVE_PLATFORM_IMX_SSI</div><div class='ctx'> 	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX</div><div class='ctx'> 	select LEDS_GPIO_REGISTER</div><div class='ctx'> 	help</div><div class='hunk'>@@ -836,12 +822,15 @@ config SOC_IMX6Q</div><div class='ctx'> 	bool "i.MX6 Quad support"</div><div class='ctx'> 	select ARM_CPU_SUSPEND if PM</div><div class='ctx'> 	select ARM_GIC</div><div class='add'>+	select COMMON_CLK</div><div class='ctx'> 	select CPU_V7</div><div class='ctx'> 	select HAVE_ARM_SCU</div><div class='ctx'> 	select HAVE_IMX_GPC</div><div class='ctx'> 	select HAVE_IMX_MMDC</div><div class='ctx'> 	select HAVE_IMX_SRC</div><div class='ctx'> 	select HAVE_SMP</div><div class='add'>+	select PINCTRL</div><div class='add'>+	select PINCTRL_IMX6Q</div><div class='ctx'> 	select USE_OF</div><div class='ctx'> </div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile<br/>index ab939c5046c3..ff29421414f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/Makefile</a></div><div class='hunk'>@@ -1,15 +1,18 @@</div><div class='del'>-obj-$(CONFIG_SOC_IMX1) += clock-imx1.o mm-imx1.o</div><div class='del'>-obj-$(CONFIG_SOC_IMX21) += clock-imx21.o mm-imx21.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_SOC_IMX25) += clock-imx25.o mm-imx25.o ehci-imx25.o cpu-imx25.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX25) += clk-imx25.o mm-imx25.o ehci-imx25.o cpu-imx25.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o</div><div class='del'>-obj-$(CONFIG_SOC_IMX27) += clock-imx27.o mm-imx27.o ehci-imx27.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX27) += clk-imx27.o mm-imx27.o ehci-imx27.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clock-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o</div><div class='del'>-obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clock-imx35.o ehci-imx35.o pm-imx3.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clock-mx51-mx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \</div><div class='add'>+			    clk-pfd.o clk-busy.o</div><div class='ctx'> </div><div class='ctx'> # Support for CMOS sensor interface</div><div class='ctx'> obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o</div><div class='hunk'>@@ -70,7 +73,7 @@ obj-$(CONFIG_CPU_V7) += head-v7.o</div><div class='ctx'> AFLAGS_head-v7.o :=-Wa,-march=armv7-a</div><div class='ctx'> obj-$(CONFIG_SMP) += platsmp.o</div><div class='ctx'> obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o</div><div class='del'>-obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o</div><div class='ctx'> </div><div class='ctx'> ifeq ($(CONFIG_PM),y)</div><div class='ctx'> obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o</div><div class='hunk'>@@ -83,10 +86,8 @@ obj-$(CONFIG_MACH_MX53_EVK) += mach-mx53_evk.o</div><div class='ctx'> obj-$(CONFIG_MACH_MX53_SMD) += mach-mx53_smd.o</div><div class='ctx'> obj-$(CONFIG_MACH_MX53_LOCO) += mach-mx53_loco.o</div><div class='ctx'> obj-$(CONFIG_MACH_MX53_ARD) += mach-mx53_ard.o</div><div class='del'>-obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += mach-cpuimx51.o</div><div class='del'>-obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o</div><div class='ctx'> obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o</div><div class='del'>-obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd-baseboard.o</div><div class='add'>+obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd51-baseboard.o</div><div class='ctx'> obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o</div><div class='ctx'> obj-$(CONFIG_MACH_MX51_EFIKAMX) += mach-mx51_efikamx.o</div><div class='ctx'> obj-$(CONFIG_MACH_MX51_EFIKASB) += mach-mx51_efikasb.o</div><div class='head'>diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot<br/>index 3851d8a27875..05541cf4a878 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/Makefile.boot?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/Makefile.boot</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/Makefile.boot</a></div><div class='hunk'>@@ -42,4 +42,5 @@ dtb-$(CONFIG_MACH_IMX51_DT) += imx51-babbage.dtb</div><div class='ctx'> dtb-$(CONFIG_MACH_IMX53_DT) += imx53-ard.dtb imx53-evk.dtb \</div><div class='ctx'> 			       imx53-qsb.dtb imx53-smd.dtb</div><div class='ctx'> dtb-$(CONFIG_SOC_IMX6Q)	+= imx6q-arm2.dtb \</div><div class='del'>-			   imx6q-sabrelite.dtb</div><div class='add'>+			   imx6q-sabrelite.dtb \</div><div class='add'>+			   imx6q-sabresd.dtb \</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-busy.c b/arch/arm/mach-imx/clk-busy.c<br/>new file mode 100644<br/>index 000000000000..1a7a8dd045a1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-busy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-busy.c</a></div><div class='hunk'>@@ -0,0 +1,189 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2012 Linaro Ltd.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+static int clk_busy_wait(void __iomem *reg, u8 shift)</div><div class='add'>+{</div><div class='add'>+	unsigned long timeout = jiffies + msecs_to_jiffies(10);</div><div class='add'>+</div><div class='add'>+	while (readl_relaxed(reg) &amp; (1 &lt;&lt; shift))</div><div class='add'>+		if (time_after(jiffies, timeout))</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct clk_busy_divider {</div><div class='add'>+	struct clk_divider div;</div><div class='add'>+	const struct clk_ops *div_ops;</div><div class='add'>+	void __iomem *reg;</div><div class='add'>+	u8 shift;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct clk_busy_divider *to_clk_busy_divider(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_divider *div = container_of(hw, struct clk_divider, hw);</div><div class='add'>+</div><div class='add'>+	return container_of(div, struct clk_busy_divider, div);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long clk_busy_divider_recalc_rate(struct clk_hw *hw,</div><div class='add'>+						  unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_busy_divider *busy = to_clk_busy_divider(hw);</div><div class='add'>+</div><div class='add'>+	return busy-&gt;div_ops-&gt;recalc_rate(&amp;busy-&gt;div.hw, parent_rate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_busy_divider_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+					unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_busy_divider *busy = to_clk_busy_divider(hw);</div><div class='add'>+</div><div class='add'>+	return busy-&gt;div_ops-&gt;round_rate(&amp;busy-&gt;div.hw, rate, prate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_busy_divider_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_busy_divider *busy = to_clk_busy_divider(hw);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = busy-&gt;div_ops-&gt;set_rate(&amp;busy-&gt;div.hw, rate, parent_rate);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = clk_busy_wait(busy-&gt;reg, busy-&gt;shift);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_ops clk_busy_divider_ops = {</div><div class='add'>+	.recalc_rate = clk_busy_divider_recalc_rate,</div><div class='add'>+	.round_rate = clk_busy_divider_round_rate,</div><div class='add'>+	.set_rate = clk_busy_divider_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,</div><div class='add'>+				 void __iomem *reg, u8 shift, u8 width,</div><div class='add'>+				 void __iomem *busy_reg, u8 busy_shift)</div><div class='add'>+{</div><div class='add'>+	struct clk_busy_divider *busy;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+</div><div class='add'>+	busy = kzalloc(sizeof(*busy), GFP_KERNEL);</div><div class='add'>+	if (!busy)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	busy-&gt;reg = busy_reg;</div><div class='add'>+	busy-&gt;shift = busy_shift;</div><div class='add'>+</div><div class='add'>+	busy-&gt;div.reg = reg;</div><div class='add'>+	busy-&gt;div.shift = shift;</div><div class='add'>+	busy-&gt;div.width = width;</div><div class='add'>+	busy-&gt;div.lock = &amp;imx_ccm_lock;</div><div class='add'>+	busy-&gt;div_ops = &amp;clk_divider_ops;</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_busy_divider_ops;</div><div class='add'>+	init.flags = CLK_SET_RATE_PARENT;</div><div class='add'>+	init.parent_names = &amp;parent_name;</div><div class='add'>+	init.num_parents = 1;</div><div class='add'>+</div><div class='add'>+	busy-&gt;div.hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;busy-&gt;div.hw);</div><div class='add'>+	if (!clk)</div><div class='add'>+		kfree(busy);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct clk_busy_mux {</div><div class='add'>+	struct clk_mux mux;</div><div class='add'>+	const struct clk_ops *mux_ops;</div><div class='add'>+	void __iomem *reg;</div><div class='add'>+	u8 shift;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct clk_busy_mux *to_clk_busy_mux(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_mux *mux = container_of(hw, struct clk_mux, hw);</div><div class='add'>+</div><div class='add'>+	return container_of(mux, struct clk_busy_mux, mux);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 clk_busy_mux_get_parent(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_busy_mux *busy = to_clk_busy_mux(hw);</div><div class='add'>+</div><div class='add'>+	return busy-&gt;mux_ops-&gt;get_parent(&amp;busy-&gt;mux.hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_busy_mux_set_parent(struct clk_hw *hw, u8 index)</div><div class='add'>+{</div><div class='add'>+	struct clk_busy_mux *busy = to_clk_busy_mux(hw);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = busy-&gt;mux_ops-&gt;set_parent(&amp;busy-&gt;mux.hw, index);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = clk_busy_wait(busy-&gt;reg, busy-&gt;shift);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct clk_ops clk_busy_mux_ops = {</div><div class='add'>+	.get_parent = clk_busy_mux_get_parent,</div><div class='add'>+	.set_parent = clk_busy_mux_set_parent,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,</div><div class='add'>+			     u8 width, void __iomem *busy_reg, u8 busy_shift,</div><div class='add'>+			     const char **parent_names, int num_parents)</div><div class='add'>+{</div><div class='add'>+	struct clk_busy_mux *busy;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+</div><div class='add'>+	busy = kzalloc(sizeof(*busy), GFP_KERNEL);</div><div class='add'>+	if (!busy)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	busy-&gt;reg = busy_reg;</div><div class='add'>+	busy-&gt;shift = busy_shift;</div><div class='add'>+</div><div class='add'>+	busy-&gt;mux.reg = reg;</div><div class='add'>+	busy-&gt;mux.shift = shift;</div><div class='add'>+	busy-&gt;mux.width = width;</div><div class='add'>+	busy-&gt;mux.lock = &amp;imx_ccm_lock;</div><div class='add'>+	busy-&gt;mux_ops = &amp;clk_mux_ops;</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_busy_mux_ops;</div><div class='add'>+	init.flags = 0;</div><div class='add'>+	init.parent_names = parent_names;</div><div class='add'>+	init.num_parents = num_parents;</div><div class='add'>+</div><div class='add'>+	busy-&gt;mux.hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;busy-&gt;mux.hw);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(busy);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c<br/>new file mode 100644<br/>index 000000000000..3c1b8ff9a0a6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-gate2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-gate2.c</a></div><div class='hunk'>@@ -0,0 +1,118 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2010-2011 Canonical Ltd &lt;jeremy.kerr@canonical.com&gt;</div><div class='add'>+ * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd &lt;mturquette@linaro.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * Gated clock implementation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: basic gatable clock which can gate and ungate it's ouput</div><div class='add'>+ *</div><div class='add'>+ * Traits of this clock:</div><div class='add'>+ * prepare - clk_(un)prepare only ensures parent is (un)prepared</div><div class='add'>+ * enable - clk_enable and clk_disable are functional &amp; control gating</div><div class='add'>+ * rate - inherits rate from parent.  No clk_set_rate support</div><div class='add'>+ * parent - fixed parent.  No clk_set_parent support</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)</div><div class='add'>+</div><div class='add'>+static int clk_gate2_enable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_gate *gate = to_clk_gate(hw);</div><div class='add'>+	u32 reg;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+</div><div class='add'>+	if (gate-&gt;lock)</div><div class='add'>+		spin_lock_irqsave(gate-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	reg = readl(gate-&gt;reg);</div><div class='add'>+	reg |= 3 &lt;&lt; gate-&gt;bit_idx;</div><div class='add'>+	writel(reg, gate-&gt;reg);</div><div class='add'>+</div><div class='add'>+	if (gate-&gt;lock)</div><div class='add'>+		spin_unlock_irqrestore(gate-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clk_gate2_disable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_gate *gate = to_clk_gate(hw);</div><div class='add'>+	u32 reg;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+</div><div class='add'>+	if (gate-&gt;lock)</div><div class='add'>+		spin_lock_irqsave(gate-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	reg = readl(gate-&gt;reg);</div><div class='add'>+	reg &amp;= ~(3 &lt;&lt; gate-&gt;bit_idx);</div><div class='add'>+	writel(reg, gate-&gt;reg);</div><div class='add'>+</div><div class='add'>+	if (gate-&gt;lock)</div><div class='add'>+		spin_unlock_irqrestore(gate-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_gate2_is_enabled(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+	struct clk_gate *gate = to_clk_gate(hw);</div><div class='add'>+</div><div class='add'>+	reg = readl(gate-&gt;reg);</div><div class='add'>+</div><div class='add'>+	if (((reg &gt;&gt; gate-&gt;bit_idx) &amp; 3) == 3)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_ops clk_gate2_ops = {</div><div class='add'>+	.enable = clk_gate2_enable,</div><div class='add'>+	.disable = clk_gate2_disable,</div><div class='add'>+	.is_enabled = clk_gate2_is_enabled,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *clk_register_gate2(struct device *dev, const char *name,</div><div class='add'>+		const char *parent_name, unsigned long flags,</div><div class='add'>+		void __iomem *reg, u8 bit_idx,</div><div class='add'>+		u8 clk_gate2_flags, spinlock_t *lock)</div><div class='add'>+{</div><div class='add'>+	struct clk_gate *gate;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+</div><div class='add'>+	gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);</div><div class='add'>+	if (!gate)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	/* struct clk_gate assignments */</div><div class='add'>+	gate-&gt;reg = reg;</div><div class='add'>+	gate-&gt;bit_idx = bit_idx;</div><div class='add'>+	gate-&gt;flags = clk_gate2_flags;</div><div class='add'>+	gate-&gt;lock = lock;</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_gate2_ops;</div><div class='add'>+	init.flags = flags;</div><div class='add'>+	init.parent_names = parent_name ? &amp;parent_name : NULL;</div><div class='add'>+	init.num_parents = parent_name ? 1 : 0;</div><div class='add'>+</div><div class='add'>+	gate-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(dev, &amp;gate-&gt;hw);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(clk);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c<br/>new file mode 100644<br/>index 000000000000..0f0beb580b73<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-imx1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx1.c</a></div><div class='hunk'>@@ -0,0 +1,115 @@</div><div class='add'>+/*</div><div class='add'>+ *  Copyright (C) 2008 Sascha Hauer &lt;s.hauer@pengutronix.de&gt;, Pengutronix</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along</div><div class='add'>+ * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+/* CCM register addresses */</div><div class='add'>+#define IO_ADDR_CCM(off)	(MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off)))</div><div class='add'>+</div><div class='add'>+#define CCM_CSCR	IO_ADDR_CCM(0x0)</div><div class='add'>+#define CCM_MPCTL0	IO_ADDR_CCM(0x4)</div><div class='add'>+#define CCM_SPCTL0	IO_ADDR_CCM(0xc)</div><div class='add'>+#define CCM_PCDR	IO_ADDR_CCM(0x20)</div><div class='add'>+</div><div class='add'>+/* SCM register addresses */</div><div class='add'>+#define IO_ADDR_SCM(off)	(MX1_IO_ADDRESS(MX1_SCM_BASE_ADDR + (off)))</div><div class='add'>+</div><div class='add'>+#define SCM_GCCR	IO_ADDR_SCM(0xc)</div><div class='add'>+</div><div class='add'>+static const char *prem_sel_clks[] = { "clk32_premult", "clk16m", };</div><div class='add'>+static const char *clko_sel_clks[] = { "per1", "hclk", "clk48m", "clk16m", "prem",</div><div class='add'>+				"fclk", };</div><div class='add'>+enum imx1_clks {</div><div class='add'>+	dummy, clk32, clk16m_ext, clk16m, clk32_premult, prem, mpll, spll, mcu,</div><div class='add'>+	fclk, hclk, clk48m, per1, per2, per3, clko, dma_gate, csi_gate,</div><div class='add'>+	mma_gate, usbd_gate, clk_max</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *clk[clk_max];</div><div class='add'>+</div><div class='add'>+int __init mx1_clocks_init(unsigned long fref)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk[dummy] = imx_clk_fixed("dummy", 0);</div><div class='add'>+	clk[clk32] = imx_clk_fixed("clk32", fref);</div><div class='add'>+	clk[clk16m_ext] = imx_clk_fixed("clk16m_ext", 16000000);</div><div class='add'>+	clk[clk16m] = imx_clk_gate("clk16m", "clk16m_ext", CCM_CSCR, 17);</div><div class='add'>+	clk[clk32_premult] = imx_clk_fixed_factor("clk32_premult", "clk32", 512, 1);</div><div class='add'>+	clk[prem] = imx_clk_mux("prem", CCM_CSCR, 16, 1, prem_sel_clks,</div><div class='add'>+			ARRAY_SIZE(prem_sel_clks));</div><div class='add'>+	clk[mpll] = imx_clk_pllv1("mpll", "clk32_premult", CCM_MPCTL0);</div><div class='add'>+	clk[spll] = imx_clk_pllv1("spll", "prem", CCM_SPCTL0);</div><div class='add'>+	clk[mcu] = imx_clk_divider("mcu", "clk32_premult", CCM_CSCR, 15, 1);</div><div class='add'>+	clk[fclk] = imx_clk_divider("fclk", "mpll", CCM_CSCR, 15, 1);</div><div class='add'>+	clk[hclk] = imx_clk_divider("hclk", "spll", CCM_CSCR, 10, 4);</div><div class='add'>+	clk[clk48m] = imx_clk_divider("clk48m", "spll", CCM_CSCR, 26, 3);</div><div class='add'>+	clk[per1] = imx_clk_divider("per1", "spll", CCM_PCDR, 0, 4);</div><div class='add'>+	clk[per2] = imx_clk_divider("per2", "spll", CCM_PCDR, 4, 4);</div><div class='add'>+	clk[per3] = imx_clk_divider("per3", "spll", CCM_PCDR, 16, 7);</div><div class='add'>+	clk[clko] = imx_clk_mux("clko", CCM_CSCR, 29, 3, clko_sel_clks,</div><div class='add'>+			ARRAY_SIZE(clko_sel_clks));</div><div class='add'>+	clk[dma_gate] = imx_clk_gate("dma_gate", "hclk", SCM_GCCR, 4);</div><div class='add'>+	clk[csi_gate] = imx_clk_gate("csi_gate", "hclk", SCM_GCCR, 2);</div><div class='add'>+	clk[mma_gate] = imx_clk_gate("mma_gate", "hclk", SCM_GCCR, 1);</div><div class='add'>+	clk[usbd_gate] = imx_clk_gate("usbd_gate", "clk48m", SCM_GCCR, 0);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clk); i++)</div><div class='add'>+		if (IS_ERR(clk[i]))</div><div class='add'>+			pr_err("imx1 clk %d: register failed with %ld\n",</div><div class='add'>+				i, PTR_ERR(clk[i]));</div><div class='add'>+</div><div class='add'>+	clk_register_clkdev(clk[dma_gate], "ahb", "imx-dma");</div><div class='add'>+	clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0");</div><div class='add'>+	clk_register_clkdev(clk[mma_gate], "mma", NULL);</div><div class='add'>+	clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0");</div><div class='add'>+	clk_register_clkdev(clk[per1], "per", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[hclk], "ipg", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[per1], "per", "imx1-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[per1], "per", "imx1-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[per1], "per", "imx1-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[hclk], NULL, "imx-i2c.0");</div><div class='add'>+	clk_register_clkdev(clk[per2], "per", "imx1-cspi.0");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0");</div><div class='add'>+	clk_register_clkdev(clk[per2], "per", "imx1-cspi.1");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1");</div><div class='add'>+	clk_register_clkdev(clk[per2], NULL, "imx-mmc.0");</div><div class='add'>+	clk_register_clkdev(clk[per2], "per", "imx-fb.0");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "ipg", "imx-fb.0");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "ahb", "imx-fb.0");</div><div class='add'>+	clk_register_clkdev(clk[hclk], "mshc", NULL);</div><div class='add'>+	clk_register_clkdev(clk[per3], "ssi", NULL);</div><div class='add'>+	clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0");</div><div class='add'>+	clk_register_clkdev(clk[clko], "clko", NULL);</div><div class='add'>+</div><div class='add'>+	mxc_timer_init(NULL, MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR),</div><div class='add'>+			MX1_TIM1_INT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c<br/>new file mode 100644<br/>index 000000000000..4e4f384ee8dd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-imx21.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx21.c</a></div><div class='hunk'>@@ -0,0 +1,186 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='add'>+ * Copyright 2008 Juergen Beisert, kernel@pengutronix.de</div><div class='add'>+ * Copyright 2008 Martin Fuzzey, mfuzzey@gmail.com</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * as published by the Free Software Foundation; either version 2</div><div class='add'>+ * of the License, or (at your option) any later version.</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,</div><div class='add'>+ * MA 02110-1301, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+#define IO_ADDR_CCM(off)	(MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))</div><div class='add'>+</div><div class='add'>+/* Register offsets */</div><div class='add'>+#define CCM_CSCR		IO_ADDR_CCM(0x0)</div><div class='add'>+#define CCM_MPCTL0		IO_ADDR_CCM(0x4)</div><div class='add'>+#define CCM_MPCTL1		IO_ADDR_CCM(0x8)</div><div class='add'>+#define CCM_SPCTL0		IO_ADDR_CCM(0xc)</div><div class='add'>+#define CCM_SPCTL1		IO_ADDR_CCM(0x10)</div><div class='add'>+#define CCM_OSC26MCTL		IO_ADDR_CCM(0x14)</div><div class='add'>+#define CCM_PCDR0		IO_ADDR_CCM(0x18)</div><div class='add'>+#define CCM_PCDR1		IO_ADDR_CCM(0x1c)</div><div class='add'>+#define CCM_PCCR0		IO_ADDR_CCM(0x20)</div><div class='add'>+#define CCM_PCCR1		IO_ADDR_CCM(0x24)</div><div class='add'>+#define CCM_CCSR		IO_ADDR_CCM(0x28)</div><div class='add'>+#define CCM_PMCTL		IO_ADDR_CCM(0x2c)</div><div class='add'>+#define CCM_PMCOUNT		IO_ADDR_CCM(0x30)</div><div class='add'>+#define CCM_WKGDCTL		IO_ADDR_CCM(0x34)</div><div class='add'>+</div><div class='add'>+static const char *mpll_sel_clks[] = { "fpm", "ckih", };</div><div class='add'>+static const char *spll_sel_clks[] = { "fpm", "ckih", };</div><div class='add'>+</div><div class='add'>+enum imx21_clks {</div><div class='add'>+	ckil, ckih, fpm, mpll_sel, spll_sel, mpll, spll, fclk, hclk, ipg, per1,</div><div class='add'>+	per2, per3, per4, uart1_ipg_gate, uart2_ipg_gate, uart3_ipg_gate,</div><div class='add'>+	uart4_ipg_gate, gpt1_ipg_gate, gpt2_ipg_gate, gpt3_ipg_gate,</div><div class='add'>+	pwm_ipg_gate, sdhc1_ipg_gate, sdhc2_ipg_gate, lcdc_ipg_gate,</div><div class='add'>+	lcdc_hclk_gate, cspi3_ipg_gate, cspi2_ipg_gate, cspi1_ipg_gate,</div><div class='add'>+	per4_gate, csi_hclk_gate, usb_div, usb_gate, usb_hclk_gate, ssi1_gate,</div><div class='add'>+	ssi2_gate, nfc_div, nfc_gate, dma_gate, dma_hclk_gate, brom_gate,</div><div class='add'>+	emma_gate, emma_hclk_gate, slcdc_gate, slcdc_hclk_gate, wdog_gate,</div><div class='add'>+	gpio_gate, i2c_gate, kpp_gate, owire_gate, rtc_gate, clk_max</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *clk[clk_max];</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * must be called very early to get information about the</div><div class='add'>+ * available clock rate when the timer framework starts</div><div class='add'>+ */</div><div class='add'>+int __init mx21_clocks_init(unsigned long lref, unsigned long href)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk[ckil] = imx_clk_fixed("ckil", lref);</div><div class='add'>+	clk[ckih] = imx_clk_fixed("ckih", href);</div><div class='add'>+	clk[fpm] = imx_clk_fixed_factor("fpm", "ckil", 512, 1);</div><div class='add'>+	clk[mpll_sel] = imx_clk_mux("mpll_sel", CCM_CSCR, 16, 1, mpll_sel_clks,</div><div class='add'>+			ARRAY_SIZE(mpll_sel_clks));</div><div class='add'>+	clk[spll_sel] = imx_clk_mux("spll_sel", CCM_CSCR, 17, 1, spll_sel_clks,</div><div class='add'>+			ARRAY_SIZE(spll_sel_clks));</div><div class='add'>+	clk[mpll] = imx_clk_pllv1("mpll", "mpll_sel", CCM_MPCTL0);</div><div class='add'>+	clk[spll] = imx_clk_pllv1("spll", "spll_sel", CCM_SPCTL0);</div><div class='add'>+	clk[fclk] = imx_clk_divider("fclk", "mpll", CCM_CSCR, 29, 3);</div><div class='add'>+	clk[hclk] = imx_clk_divider("hclk", "fclk", CCM_CSCR, 10, 4);</div><div class='add'>+	clk[ipg] = imx_clk_divider("ipg", "hclk", CCM_CSCR, 9, 1);</div><div class='add'>+	clk[per1] = imx_clk_divider("per1", "mpll", CCM_PCDR1, 0, 6);</div><div class='add'>+	clk[per2] = imx_clk_divider("per2", "mpll", CCM_PCDR1, 8, 6);</div><div class='add'>+	clk[per3] = imx_clk_divider("per3", "mpll", CCM_PCDR1, 16, 6);</div><div class='add'>+	clk[per4] = imx_clk_divider("per4", "mpll", CCM_PCDR1, 24, 6);</div><div class='add'>+	clk[uart1_ipg_gate] = imx_clk_gate("uart1_ipg_gate", "ipg", CCM_PCCR0, 0);</div><div class='add'>+	clk[uart2_ipg_gate] = imx_clk_gate("uart2_ipg_gate", "ipg", CCM_PCCR0, 1);</div><div class='add'>+	clk[uart3_ipg_gate] = imx_clk_gate("uart3_ipg_gate", "ipg", CCM_PCCR0, 2);</div><div class='add'>+	clk[uart4_ipg_gate] = imx_clk_gate("uart4_ipg_gate", "ipg", CCM_PCCR0, 3);</div><div class='add'>+	clk[gpt1_ipg_gate] = imx_clk_gate("gpt1_ipg_gate", "ipg", CCM_PCCR1, 25);</div><div class='add'>+	clk[gpt2_ipg_gate] = imx_clk_gate("gpt2_ipg_gate", "ipg", CCM_PCCR1, 26);</div><div class='add'>+	clk[gpt3_ipg_gate] = imx_clk_gate("gpt3_ipg_gate", "ipg", CCM_PCCR1, 27);</div><div class='add'>+	clk[pwm_ipg_gate] = imx_clk_gate("pwm_ipg_gate", "ipg", CCM_PCCR1, 28);</div><div class='add'>+	clk[sdhc1_ipg_gate] = imx_clk_gate("sdhc1_ipg_gate", "ipg", CCM_PCCR0, 9);</div><div class='add'>+	clk[sdhc2_ipg_gate] = imx_clk_gate("sdhc2_ipg_gate", "ipg", CCM_PCCR0, 10);</div><div class='add'>+	clk[lcdc_ipg_gate] = imx_clk_gate("lcdc_ipg_gate", "ipg", CCM_PCCR0, 18);</div><div class='add'>+	clk[lcdc_hclk_gate] = imx_clk_gate("lcdc_hclk_gate", "hclk", CCM_PCCR0, 26);</div><div class='add'>+	clk[cspi3_ipg_gate] = imx_clk_gate("cspi3_ipg_gate", "ipg", CCM_PCCR1, 23);</div><div class='add'>+	clk[cspi2_ipg_gate] = imx_clk_gate("cspi2_ipg_gate", "ipg", CCM_PCCR0, 5);</div><div class='add'>+	clk[cspi1_ipg_gate] = imx_clk_gate("cspi1_ipg_gate", "ipg", CCM_PCCR0, 4);</div><div class='add'>+	clk[per4_gate] = imx_clk_gate("per4_gate", "per4", CCM_PCCR0, 22);</div><div class='add'>+	clk[csi_hclk_gate] = imx_clk_gate("csi_hclk_gate", "hclk", CCM_PCCR0, 31);</div><div class='add'>+	clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 26, 3);</div><div class='add'>+	clk[usb_gate] = imx_clk_gate("usb_gate", "usb_div", CCM_PCCR0, 14);</div><div class='add'>+	clk[usb_hclk_gate] = imx_clk_gate("usb_hclk_gate", "hclk", CCM_PCCR0, 24);</div><div class='add'>+	clk[ssi1_gate] = imx_clk_gate("ssi1_gate", "ipg", CCM_PCCR0, 6);</div><div class='add'>+	clk[ssi2_gate] = imx_clk_gate("ssi2_gate", "ipg", CCM_PCCR0, 7);</div><div class='add'>+	clk[nfc_div] = imx_clk_divider("nfc_div", "ipg", CCM_PCDR0, 12, 4);</div><div class='add'>+	clk[nfc_gate] = imx_clk_gate("nfc_gate", "nfc_div", CCM_PCCR0, 19);</div><div class='add'>+	clk[dma_gate] = imx_clk_gate("dma_gate", "ipg", CCM_PCCR0, 13);</div><div class='add'>+	clk[dma_hclk_gate] = imx_clk_gate("dma_hclk_gate", "hclk", CCM_PCCR0, 30);</div><div class='add'>+	clk[brom_gate] = imx_clk_gate("brom_gate", "hclk", CCM_PCCR0, 28);</div><div class='add'>+	clk[emma_gate] = imx_clk_gate("emma_gate", "ipg", CCM_PCCR0, 15);</div><div class='add'>+	clk[emma_hclk_gate] = imx_clk_gate("emma_hclk_gate", "hclk", CCM_PCCR0, 27);</div><div class='add'>+	clk[slcdc_gate] = imx_clk_gate("slcdc_gate", "ipg", CCM_PCCR0, 25);</div><div class='add'>+	clk[slcdc_hclk_gate] = imx_clk_gate("slcdc_hclk_gate", "hclk", CCM_PCCR0, 21);</div><div class='add'>+	clk[wdog_gate] = imx_clk_gate("wdog_gate", "ipg", CCM_PCCR1, 24);</div><div class='add'>+	clk[gpio_gate] = imx_clk_gate("gpio_gate", "ipg", CCM_PCCR0, 11);</div><div class='add'>+	clk[i2c_gate] = imx_clk_gate("i2c_gate", "ipg", CCM_PCCR0, 12);</div><div class='add'>+	clk[kpp_gate] = imx_clk_gate("kpp_gate", "ipg", CCM_PCCR1, 30);</div><div class='add'>+	clk[owire_gate] = imx_clk_gate("owire_gate", "ipg", CCM_PCCR1, 31);</div><div class='add'>+	clk[rtc_gate] = imx_clk_gate("rtc_gate", "ipg", CCM_PCCR1, 29);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clk); i++)</div><div class='add'>+		if (IS_ERR(clk[i]))</div><div class='add'>+			pr_err("i.MX21 clk %d: register failed with %ld\n",</div><div class='add'>+				i, PTR_ERR(clk[i]));</div><div class='add'>+</div><div class='add'>+	clk_register_clkdev(clk[per1], "per1", NULL);</div><div class='add'>+	clk_register_clkdev(clk[per2], "per2", NULL);</div><div class='add'>+	clk_register_clkdev(clk[per3], "per3", NULL);</div><div class='add'>+	clk_register_clkdev(clk[per4], "per4", NULL);</div><div class='add'>+	clk_register_clkdev(clk[per1], "per", "imx21-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[uart1_ipg_gate], "ipg", "imx21-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[per1], "per", "imx21-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[uart2_ipg_gate], "ipg", "imx21-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[per1], "per", "imx21-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[uart3_ipg_gate], "ipg", "imx21-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[per1], "per", "imx21-uart.3");</div><div class='add'>+	clk_register_clkdev(clk[uart4_ipg_gate], "ipg", "imx21-uart.3");</div><div class='add'>+	clk_register_clkdev(clk[gpt1_ipg_gate], "ipg", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[per1], "per", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[gpt2_ipg_gate], "ipg", "imx-gpt.1");</div><div class='add'>+	clk_register_clkdev(clk[per1], "per", "imx-gpt.1");</div><div class='add'>+	clk_register_clkdev(clk[gpt3_ipg_gate], "ipg", "imx-gpt.2");</div><div class='add'>+	clk_register_clkdev(clk[per1], "per", "imx-gpt.2");</div><div class='add'>+	clk_register_clkdev(clk[pwm_ipg_gate], "pwm", "mxc_pwm.0");</div><div class='add'>+	clk_register_clkdev(clk[per2], "per", "imx21-cspi.0");</div><div class='add'>+	clk_register_clkdev(clk[cspi1_ipg_gate], "ipg", "imx21-cspi.0");</div><div class='add'>+	clk_register_clkdev(clk[per2], "per", "imx21-cspi.1");</div><div class='add'>+	clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx21-cspi.1");</div><div class='add'>+	clk_register_clkdev(clk[per2], "per", "imx21-cspi.2");</div><div class='add'>+	clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx21-cspi.2");</div><div class='add'>+	clk_register_clkdev(clk[per3], "per", "imx-fb.0");</div><div class='add'>+	clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");</div><div class='add'>+	clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx-fb.0");</div><div class='add'>+	clk_register_clkdev(clk[usb_gate], "per", "imx21-hcd.0");</div><div class='add'>+	clk_register_clkdev(clk[usb_hclk_gate], "ahb", "imx21-hcd.0");</div><div class='add'>+	clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand.0");</div><div class='add'>+	clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx-dma");</div><div class='add'>+	clk_register_clkdev(clk[dma_gate], "ipg", "imx-dma");</div><div class='add'>+	clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");</div><div class='add'>+	clk_register_clkdev(clk[i2c_gate], NULL, "imx-i2c.0");</div><div class='add'>+	clk_register_clkdev(clk[kpp_gate], NULL, "mxc-keypad");</div><div class='add'>+	clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");</div><div class='add'>+	clk_register_clkdev(clk[brom_gate], "brom", NULL);</div><div class='add'>+	clk_register_clkdev(clk[emma_gate], "emma", NULL);</div><div class='add'>+	clk_register_clkdev(clk[slcdc_gate], "slcdc", NULL);</div><div class='add'>+	clk_register_clkdev(clk[gpio_gate], "gpio", NULL);</div><div class='add'>+	clk_register_clkdev(clk[rtc_gate], "rtc", NULL);</div><div class='add'>+	clk_register_clkdev(clk[csi_hclk_gate], "csi", NULL);</div><div class='add'>+	clk_register_clkdev(clk[ssi1_gate], "ssi1", NULL);</div><div class='add'>+	clk_register_clkdev(clk[ssi2_gate], "ssi2", NULL);</div><div class='add'>+	clk_register_clkdev(clk[sdhc1_ipg_gate], "sdhc1", NULL);</div><div class='add'>+	clk_register_clkdev(clk[sdhc2_ipg_gate], "sdhc2", NULL);</div><div class='add'>+</div><div class='add'>+	mxc_timer_init(NULL, MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR),</div><div class='add'>+			MX21_INT_GPT1);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c<br/>new file mode 100644<br/>index 000000000000..d9833bb5fd61<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-imx25.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx25.c</a></div><div class='hunk'>@@ -0,0 +1,248 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2009 by Sascha Hauer, Pengutronix</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * as published by the Free Software Foundation; either version 2</div><div class='add'>+ * of the License, or (at your option) any later version.</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,</div><div class='add'>+ * MA 02110-1301, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include &lt;mach/mx25.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+#define CRM_BASE	MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)</div><div class='add'>+</div><div class='add'>+#define CCM_MPCTL	0x00</div><div class='add'>+#define CCM_UPCTL	0x04</div><div class='add'>+#define CCM_CCTL	0x08</div><div class='add'>+#define CCM_CGCR0	0x0C</div><div class='add'>+#define CCM_CGCR1	0x10</div><div class='add'>+#define CCM_CGCR2	0x14</div><div class='add'>+#define CCM_PCDR0	0x18</div><div class='add'>+#define CCM_PCDR1	0x1C</div><div class='add'>+#define CCM_PCDR2	0x20</div><div class='add'>+#define CCM_PCDR3	0x24</div><div class='add'>+#define CCM_RCSR	0x28</div><div class='add'>+#define CCM_CRDR	0x2C</div><div class='add'>+#define CCM_DCVR0	0x30</div><div class='add'>+#define CCM_DCVR1	0x34</div><div class='add'>+#define CCM_DCVR2	0x38</div><div class='add'>+#define CCM_DCVR3	0x3c</div><div class='add'>+#define CCM_LTR0	0x40</div><div class='add'>+#define CCM_LTR1	0x44</div><div class='add'>+#define CCM_LTR2	0x48</div><div class='add'>+#define CCM_LTR3	0x4c</div><div class='add'>+#define CCM_MCR		0x64</div><div class='add'>+</div><div class='add'>+#define ccm(x)	(CRM_BASE + (x))</div><div class='add'>+</div><div class='add'>+static const char *cpu_sel_clks[] = { "mpll", "mpll_cpu_3_4", };</div><div class='add'>+static const char *per_sel_clks[] = { "ahb", "upll", };</div><div class='add'>+</div><div class='add'>+enum mx25_clks {</div><div class='add'>+	dummy, osc, mpll, upll, mpll_cpu_3_4, cpu_sel, cpu, ahb, usb_div, ipg,</div><div class='add'>+	per0_sel, per1_sel, per2_sel, per3_sel, per4_sel, per5_sel, per6_sel,</div><div class='add'>+	per7_sel, per8_sel, per9_sel, per10_sel, per11_sel, per12_sel,</div><div class='add'>+	per13_sel, per14_sel, per15_sel, per0, per1, per2, per3, per4, per5,</div><div class='add'>+	per6, per7, per8, per9, per10, per11, per12, per13, per14, per15,</div><div class='add'>+	csi_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per, gpt_ipg_per, i2c_ipg_per,</div><div class='add'>+	lcdc_ipg_per, nfc_ipg_per, ssi1_ipg_per, ssi2_ipg_per, uart_ipg_per,</div><div class='add'>+	csi_ahb, esdhc1_ahb, esdhc2_ahb, fec_ahb, lcdc_ahb, sdma_ahb,</div><div class='add'>+	usbotg_ahb, can1_ipg, can2_ipg, csi_ipg, cspi1_ipg, cspi2_ipg,</div><div class='add'>+	cspi3_ipg, dryice_ipg, esdhc1_ipg, esdhc2_ipg, fec_ipg, iim_ipg,</div><div class='add'>+	kpp_ipg, lcdc_ipg, pwm1_ipg, pwm2_ipg, pwm3_ipg, pwm4_ipg, sdma_ipg,</div><div class='add'>+	ssi1_ipg, ssi2_ipg, tsc_ipg, uart1_ipg, uart2_ipg, uart3_ipg,</div><div class='add'>+	uart4_ipg, uart5_ipg, wdt_ipg, clk_max</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *clk[clk_max];</div><div class='add'>+</div><div class='add'>+int __init mx25_clocks_init(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk[dummy] = imx_clk_fixed("dummy", 0);</div><div class='add'>+	clk[osc] = imx_clk_fixed("osc", 24000000);</div><div class='add'>+	clk[mpll] = imx_clk_pllv1("mpll", "osc", ccm(CCM_MPCTL));</div><div class='add'>+	clk[upll] = imx_clk_pllv1("upll", "osc", ccm(CCM_UPCTL));</div><div class='add'>+	clk[mpll_cpu_3_4] = imx_clk_fixed_factor("mpll_cpu_3_4", "mpll", 3, 4);</div><div class='add'>+	clk[cpu_sel] = imx_clk_mux("cpu_sel", ccm(CCM_CCTL), 14, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks));</div><div class='add'>+	clk[cpu] = imx_clk_divider("cpu", "cpu_sel", ccm(CCM_CCTL), 30, 2);</div><div class='add'>+	clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2);</div><div class='add'>+	clk[usb_div] = imx_clk_divider("usb_div", "upll", ccm(CCM_CCTL), 16, 6); </div><div class='add'>+	clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2);</div><div class='add'>+	clk[per0_sel] = imx_clk_mux("per0_sel", ccm(CCM_MCR), 0, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per1_sel] = imx_clk_mux("per1_sel", ccm(CCM_MCR), 1, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per2_sel] = imx_clk_mux("per2_sel", ccm(CCM_MCR), 2, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per3_sel] = imx_clk_mux("per3_sel", ccm(CCM_MCR), 3, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per4_sel] = imx_clk_mux("per4_sel", ccm(CCM_MCR), 4, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per5_sel] = imx_clk_mux("per5_sel", ccm(CCM_MCR), 5, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per6_sel] = imx_clk_mux("per6_sel", ccm(CCM_MCR), 6, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per7_sel] = imx_clk_mux("per7_sel", ccm(CCM_MCR), 7, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per8_sel] = imx_clk_mux("per8_sel", ccm(CCM_MCR), 8, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per9_sel] = imx_clk_mux("per9_sel", ccm(CCM_MCR), 9, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per10_sel] = imx_clk_mux("per10_sel", ccm(CCM_MCR), 10, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per11_sel] = imx_clk_mux("per11_sel", ccm(CCM_MCR), 11, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per12_sel] = imx_clk_mux("per12_sel", ccm(CCM_MCR), 12, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per13_sel] = imx_clk_mux("per13_sel", ccm(CCM_MCR), 13, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per14_sel] = imx_clk_mux("per14_sel", ccm(CCM_MCR), 14, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per15_sel] = imx_clk_mux("per15_sel", ccm(CCM_MCR), 15, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));</div><div class='add'>+	clk[per0] = imx_clk_divider("per0", "per0_sel", ccm(CCM_PCDR0), 0, 6);</div><div class='add'>+	clk[per1] = imx_clk_divider("per1", "per1_sel", ccm(CCM_PCDR0), 8, 6);</div><div class='add'>+	clk[per2] = imx_clk_divider("per2", "per2_sel", ccm(CCM_PCDR0), 16, 6);</div><div class='add'>+	clk[per3] = imx_clk_divider("per3", "per3_sel", ccm(CCM_PCDR0), 24, 6);</div><div class='add'>+	clk[per4] = imx_clk_divider("per4", "per4_sel", ccm(CCM_PCDR1), 0, 6);</div><div class='add'>+	clk[per5] = imx_clk_divider("per5", "per5_sel", ccm(CCM_PCDR1), 8, 6);</div><div class='add'>+	clk[per6] = imx_clk_divider("per6", "per6_sel", ccm(CCM_PCDR1), 16, 6);</div><div class='add'>+	clk[per7] = imx_clk_divider("per7", "per7_sel", ccm(CCM_PCDR1), 24, 6);</div><div class='add'>+	clk[per8] = imx_clk_divider("per8", "per8_sel", ccm(CCM_PCDR2), 0, 6);</div><div class='add'>+	clk[per9] = imx_clk_divider("per9", "per9_sel", ccm(CCM_PCDR2), 8, 6);</div><div class='add'>+	clk[per10] = imx_clk_divider("per10", "per10_sel", ccm(CCM_PCDR2), 16, 6);</div><div class='add'>+	clk[per11] = imx_clk_divider("per11", "per11_sel", ccm(CCM_PCDR2), 24, 6);</div><div class='add'>+	clk[per12] = imx_clk_divider("per12", "per12_sel", ccm(CCM_PCDR3), 0, 6);</div><div class='add'>+	clk[per13] = imx_clk_divider("per13", "per13_sel", ccm(CCM_PCDR3), 8, 6);</div><div class='add'>+	clk[per14] = imx_clk_divider("per14", "per14_sel", ccm(CCM_PCDR3), 16, 6);</div><div class='add'>+	clk[per15] = imx_clk_divider("per15", "per15_sel", ccm(CCM_PCDR3), 24, 6);</div><div class='add'>+	clk[csi_ipg_per] = imx_clk_gate("csi_ipg_per", "per0", ccm(CCM_CGCR0), 0);</div><div class='add'>+	clk[esdhc1_ipg_per] = imx_clk_gate("esdhc1_ipg_per", "per3", ccm(CCM_CGCR0),  3);</div><div class='add'>+	clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0),  4);</div><div class='add'>+	clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0),  5);</div><div class='add'>+	clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0),  6);</div><div class='add'>+	clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per8", ccm(CCM_CGCR0),  7);</div><div class='add'>+	clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "ipg_per", ccm(CCM_CGCR0),  8);</div><div class='add'>+	clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13);</div><div class='add'>+	clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14);</div><div class='add'>+	clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15);</div><div class='add'>+	clk[csi_ahb] = imx_clk_gate("csi_ahb", "ahb", ccm(CCM_CGCR0), 18);</div><div class='add'>+	clk[esdhc1_ahb] = imx_clk_gate("esdhc1_ahb", "ahb", ccm(CCM_CGCR0), 21);</div><div class='add'>+	clk[esdhc2_ahb] = imx_clk_gate("esdhc2_ahb", "ahb", ccm(CCM_CGCR0), 22);</div><div class='add'>+	clk[fec_ahb] = imx_clk_gate("fec_ahb", "ahb", ccm(CCM_CGCR0), 23);</div><div class='add'>+	clk[lcdc_ahb] = imx_clk_gate("lcdc_ahb", "ahb", ccm(CCM_CGCR0), 24);</div><div class='add'>+	clk[sdma_ahb] = imx_clk_gate("sdma_ahb", "ahb", ccm(CCM_CGCR0), 26);</div><div class='add'>+	clk[usbotg_ahb] = imx_clk_gate("usbotg_ahb", "ahb", ccm(CCM_CGCR0), 28);</div><div class='add'>+	clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1),  2);</div><div class='add'>+	clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1),  3);</div><div class='add'>+	clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1),  4);</div><div class='add'>+	clk[cspi1_ipg] = imx_clk_gate("cspi1_ipg", "ipg", ccm(CCM_CGCR1),  5);</div><div class='add'>+	clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1),  6);</div><div class='add'>+	clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", ccm(CCM_CGCR1),  7);</div><div class='add'>+	clk[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", ccm(CCM_CGCR1),  8);</div><div class='add'>+	clk[esdhc1_ipg] = imx_clk_gate("esdhc1_ipg", "ipg", ccm(CCM_CGCR1), 13);</div><div class='add'>+	clk[esdhc2_ipg] = imx_clk_gate("esdhc2_ipg", "ipg", ccm(CCM_CGCR1), 14);</div><div class='add'>+	clk[fec_ipg] = imx_clk_gate("fec_ipg", "ipg", ccm(CCM_CGCR1), 15);</div><div class='add'>+	clk[iim_ipg] = imx_clk_gate("iim_ipg", "ipg", ccm(CCM_CGCR1), 26);</div><div class='add'>+	clk[kpp_ipg] = imx_clk_gate("kpp_ipg", "ipg", ccm(CCM_CGCR1), 28);</div><div class='add'>+	clk[lcdc_ipg] = imx_clk_gate("lcdc_ipg", "ipg", ccm(CCM_CGCR1), 29);</div><div class='add'>+	clk[pwm1_ipg] = imx_clk_gate("pwm1_ipg", "ipg", ccm(CCM_CGCR1), 31);</div><div class='add'>+	clk[pwm2_ipg] = imx_clk_gate("pwm2_ipg", "ipg", ccm(CCM_CGCR2),  0);</div><div class='add'>+	clk[pwm3_ipg] = imx_clk_gate("pwm3_ipg", "ipg", ccm(CCM_CGCR2),  1);</div><div class='add'>+	clk[pwm4_ipg] = imx_clk_gate("pwm4_ipg", "ipg", ccm(CCM_CGCR2),  2);</div><div class='add'>+	clk[sdma_ipg] = imx_clk_gate("sdma_ipg", "ipg", ccm(CCM_CGCR2),  6);</div><div class='add'>+	clk[ssi1_ipg] = imx_clk_gate("ssi1_ipg", "ipg", ccm(CCM_CGCR2), 11);</div><div class='add'>+	clk[ssi2_ipg] = imx_clk_gate("ssi2_ipg", "ipg", ccm(CCM_CGCR2), 12);</div><div class='add'>+	clk[tsc_ipg] = imx_clk_gate("tsc_ipg", "ipg", ccm(CCM_CGCR2), 13);</div><div class='add'>+	clk[uart1_ipg] = imx_clk_gate("uart1_ipg", "ipg", ccm(CCM_CGCR2), 14);</div><div class='add'>+	clk[uart2_ipg] = imx_clk_gate("uart2_ipg", "ipg", ccm(CCM_CGCR2), 15);</div><div class='add'>+	clk[uart3_ipg] = imx_clk_gate("uart3_ipg", "ipg", ccm(CCM_CGCR2), 16);</div><div class='add'>+	clk[uart4_ipg] = imx_clk_gate("uart4_ipg", "ipg", ccm(CCM_CGCR2), 17);</div><div class='add'>+	clk[uart5_ipg] = imx_clk_gate("uart5_ipg", "ipg", ccm(CCM_CGCR2), 18);</div><div class='add'>+	clk[wdt_ipg] = imx_clk_gate("wdt_ipg", "ipg", ccm(CCM_CGCR2), 19);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clk); i++)</div><div class='add'>+		if (IS_ERR(clk[i]))</div><div class='add'>+			pr_err("i.MX25 clk %d: register failed with %ld\n",</div><div class='add'>+				i, PTR_ERR(clk[i]));</div><div class='add'>+</div><div class='add'>+	/* i.mx25 has the i.mx21 type uart */</div><div class='add'>+	clk_register_clkdev(clk[uart1_ipg], "ipg", "imx21-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[uart2_ipg], "ipg", "imx21-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[uart3_ipg], "ipg", "imx21-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[uart4_ipg], "ipg", "imx21-uart.3");</div><div class='add'>+	clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.3");</div><div class='add'>+	clk_register_clkdev(clk[uart5_ipg], "ipg", "imx21-uart.4");</div><div class='add'>+	clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.4");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[nfc_ipg_per], NULL, "mxc_nand.0");</div><div class='add'>+	/* i.mx25 has the i.mx35 type cspi */</div><div class='add'>+	clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0");</div><div class='add'>+	clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1");</div><div class='add'>+	clk_register_clkdev(clk[cspi3_ipg], NULL, "imx35-cspi.2");</div><div class='add'>+	clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.0");</div><div class='add'>+	clk_register_clkdev(clk[per10], "per", "mxc_pwm.0");</div><div class='add'>+	clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.1");</div><div class='add'>+	clk_register_clkdev(clk[per10], "per", "mxc_pwm.1");</div><div class='add'>+	clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.2");</div><div class='add'>+	clk_register_clkdev(clk[per10], "per", "mxc_pwm.2");</div><div class='add'>+	clk_register_clkdev(clk[pwm1_ipg], "ipg", "mxc_pwm.3");</div><div class='add'>+	clk_register_clkdev(clk[per10], "per", "mxc_pwm.3");</div><div class='add'>+	clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad");</div><div class='add'>+	clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc");</div><div class='add'>+	clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0");</div><div class='add'>+	clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.1");</div><div class='add'>+	clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.2");</div><div class='add'>+	clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0");</div><div class='add'>+	clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0");</div><div class='add'>+	clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0");</div><div class='add'>+	clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx-fb.0");</div><div class='add'>+	clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");</div><div class='add'>+	clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");</div><div class='add'>+	clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");</div><div class='add'>+	clk_register_clkdev(clk[ssi1_ipg_per], "per", "imx-ssi.0");</div><div class='add'>+	clk_register_clkdev(clk[ssi1_ipg], "ipg", "imx-ssi.0");</div><div class='add'>+	clk_register_clkdev(clk[ssi2_ipg_per], "per", "imx-ssi.1");</div><div class='add'>+	clk_register_clkdev(clk[ssi2_ipg], "ipg", "imx-ssi.1");</div><div class='add'>+	clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0");</div><div class='add'>+	clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0");</div><div class='add'>+	clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0");</div><div class='add'>+	clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1");</div><div class='add'>+	clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1");</div><div class='add'>+	clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1");</div><div class='add'>+	clk_register_clkdev(clk[csi_ipg_per], "per", "mx2-camera.0");</div><div class='add'>+	clk_register_clkdev(clk[csi_ipg], "ipg", "mx2-camera.0");</div><div class='add'>+	clk_register_clkdev(clk[csi_ahb], "ahb", "mx2-camera.0");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "audmux", NULL);</div><div class='add'>+	clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0");</div><div class='add'>+	clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1");</div><div class='add'>+	/* i.mx25 has the i.mx35 type sdma */</div><div class='add'>+	clk_register_clkdev(clk[sdma_ipg], "ipg", "imx35-sdma");</div><div class='add'>+	clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");</div><div class='add'>+	clk_register_clkdev(clk[iim_ipg], "iim", NULL);</div><div class='add'>+</div><div class='add'>+	mxc_timer_init(NULL, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c<br/>new file mode 100644<br/>index 000000000000..50a7ebd8d1b2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-imx27.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx27.c</a></div><div class='hunk'>@@ -0,0 +1,290 @@</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+#define IO_ADDR_CCM(off)	(MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))</div><div class='add'>+</div><div class='add'>+/* Register offsets */</div><div class='add'>+#define CCM_CSCR		IO_ADDR_CCM(0x0)</div><div class='add'>+#define CCM_MPCTL0		IO_ADDR_CCM(0x4)</div><div class='add'>+#define CCM_MPCTL1		IO_ADDR_CCM(0x8)</div><div class='add'>+#define CCM_SPCTL0		IO_ADDR_CCM(0xc)</div><div class='add'>+#define CCM_SPCTL1		IO_ADDR_CCM(0x10)</div><div class='add'>+#define CCM_OSC26MCTL		IO_ADDR_CCM(0x14)</div><div class='add'>+#define CCM_PCDR0		IO_ADDR_CCM(0x18)</div><div class='add'>+#define CCM_PCDR1		IO_ADDR_CCM(0x1c)</div><div class='add'>+#define CCM_PCCR0		IO_ADDR_CCM(0x20)</div><div class='add'>+#define CCM_PCCR1		IO_ADDR_CCM(0x24)</div><div class='add'>+#define CCM_CCSR		IO_ADDR_CCM(0x28)</div><div class='add'>+#define CCM_PMCTL		IO_ADDR_CCM(0x2c)</div><div class='add'>+#define CCM_PMCOUNT		IO_ADDR_CCM(0x30)</div><div class='add'>+#define CCM_WKGDCTL		IO_ADDR_CCM(0x34)</div><div class='add'>+</div><div class='add'>+#define CCM_CSCR_UPDATE_DIS	(1 &lt;&lt; 31)</div><div class='add'>+#define CCM_CSCR_SSI2		(1 &lt;&lt; 23)</div><div class='add'>+#define CCM_CSCR_SSI1		(1 &lt;&lt; 22)</div><div class='add'>+#define CCM_CSCR_VPU		(1 &lt;&lt; 21)</div><div class='add'>+#define CCM_CSCR_MSHC           (1 &lt;&lt; 20)</div><div class='add'>+#define CCM_CSCR_SPLLRES        (1 &lt;&lt; 19)</div><div class='add'>+#define CCM_CSCR_MPLLRES        (1 &lt;&lt; 18)</div><div class='add'>+#define CCM_CSCR_SP             (1 &lt;&lt; 17)</div><div class='add'>+#define CCM_CSCR_MCU            (1 &lt;&lt; 16)</div><div class='add'>+#define CCM_CSCR_OSC26MDIV      (1 &lt;&lt; 4)</div><div class='add'>+#define CCM_CSCR_OSC26M         (1 &lt;&lt; 3)</div><div class='add'>+#define CCM_CSCR_FPM            (1 &lt;&lt; 2)</div><div class='add'>+#define CCM_CSCR_SPEN           (1 &lt;&lt; 1)</div><div class='add'>+#define CCM_CSCR_MPEN           (1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* i.MX27 TO 2+ */</div><div class='add'>+#define CCM_CSCR_ARM_SRC        (1 &lt;&lt; 15)</div><div class='add'>+</div><div class='add'>+#define CCM_SPCTL1_LF           (1 &lt;&lt; 15)</div><div class='add'>+#define CCM_SPCTL1_BRMO         (1 &lt;&lt; 6)</div><div class='add'>+</div><div class='add'>+static const char *vpu_sel_clks[] = { "spll", "mpll_main2", };</div><div class='add'>+static const char *cpu_sel_clks[] = { "mpll_main2", "mpll", };</div><div class='add'>+static const char *clko_sel_clks[] = {</div><div class='add'>+	"ckil", "prem", "ckih", "ckih",</div><div class='add'>+	"ckih", "mpll", "spll", "cpu_div",</div><div class='add'>+	"ahb", "ipg", "per1_div", "per2_div",</div><div class='add'>+	"per3_div", "per4_div", "ssi1_div", "ssi2_div",</div><div class='add'>+	"nfc_div", "mshc_div", "vpu_div", "60m",</div><div class='add'>+	"32k", "usb_div", "dptc",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *ssi_sel_clks[] = { "spll", "mpll", };</div><div class='add'>+</div><div class='add'>+enum mx27_clks {</div><div class='add'>+	dummy, ckih, ckil, mpll, spll, mpll_main2, ahb, ipg, nfc_div, per1_div,</div><div class='add'>+	per2_div, per3_div, per4_div, vpu_sel, vpu_div, usb_div, cpu_sel,</div><div class='add'>+	clko_sel, cpu_div, clko_div, ssi1_sel, ssi2_sel, ssi1_div, ssi2_div,</div><div class='add'>+	clko_en, ssi2_ipg_gate, ssi1_ipg_gate, slcdc_ipg_gate, sdhc3_ipg_gate,</div><div class='add'>+	sdhc2_ipg_gate, sdhc1_ipg_gate, scc_ipg_gate, sahara_ipg_gate,</div><div class='add'>+	rtc_ipg_gate, pwm_ipg_gate, owire_ipg_gate, lcdc_ipg_gate,</div><div class='add'>+	kpp_ipg_gate, iim_ipg_gate, i2c2_ipg_gate, i2c1_ipg_gate,</div><div class='add'>+	gpt6_ipg_gate, gpt5_ipg_gate, gpt4_ipg_gate, gpt3_ipg_gate,</div><div class='add'>+	gpt2_ipg_gate, gpt1_ipg_gate, gpio_ipg_gate, fec_ipg_gate,</div><div class='add'>+	emma_ipg_gate, dma_ipg_gate, cspi3_ipg_gate, cspi2_ipg_gate,</div><div class='add'>+	cspi1_ipg_gate, nfc_baud_gate, ssi2_baud_gate, ssi1_baud_gate,</div><div class='add'>+	vpu_baud_gate, per4_gate, per3_gate, per2_gate, per1_gate,</div><div class='add'>+	usb_ahb_gate, slcdc_ahb_gate, sahara_ahb_gate, lcdc_ahb_gate,</div><div class='add'>+	vpu_ahb_gate, fec_ahb_gate, emma_ahb_gate, emi_ahb_gate, dma_ahb_gate,</div><div class='add'>+	csi_ahb_gate, brom_ahb_gate, ata_ahb_gate, wdog_ipg_gate, usb_ipg_gate,</div><div class='add'>+	uart6_ipg_gate, uart5_ipg_gate, uart4_ipg_gate, uart3_ipg_gate,</div><div class='add'>+	uart2_ipg_gate, uart1_ipg_gate, clk_max</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *clk[clk_max];</div><div class='add'>+</div><div class='add'>+int __init mx27_clocks_init(unsigned long fref)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk[dummy] = imx_clk_fixed("dummy", 0);</div><div class='add'>+	clk[ckih] = imx_clk_fixed("ckih", fref);</div><div class='add'>+	clk[ckil] = imx_clk_fixed("ckil", 32768);</div><div class='add'>+	clk[mpll] = imx_clk_pllv1("mpll", "ckih", CCM_MPCTL0);</div><div class='add'>+	clk[spll] = imx_clk_pllv1("spll", "ckih", CCM_SPCTL0);</div><div class='add'>+	clk[mpll_main2] = imx_clk_fixed_factor("mpll_main2", "mpll", 2, 3);</div><div class='add'>+</div><div class='add'>+	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0) {</div><div class='add'>+		clk[ahb] = imx_clk_divider("ahb", "mpll_main2", CCM_CSCR, 8, 2);</div><div class='add'>+		clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2);</div><div class='add'>+	} else {</div><div class='add'>+		clk[ahb] = imx_clk_divider("ahb", "mpll_main2", CCM_CSCR, 9, 4);</div><div class='add'>+		clk[ipg] = imx_clk_divider("ipg", "ahb", CCM_CSCR, 8, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk[nfc_div] = imx_clk_divider("nfc_div", "ahb", CCM_PCDR0, 6, 4);</div><div class='add'>+	clk[per1_div] = imx_clk_divider("per1_div", "mpll_main2", CCM_PCDR1, 0, 6);</div><div class='add'>+	clk[per2_div] = imx_clk_divider("per2_div", "mpll_main2", CCM_PCDR1, 8, 6);</div><div class='add'>+	clk[per3_div] = imx_clk_divider("per3_div", "mpll_main2", CCM_PCDR1, 16, 6);</div><div class='add'>+	clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6);</div><div class='add'>+	clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks));</div><div class='add'>+	clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 3);</div><div class='add'>+	clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 28, 3);</div><div class='add'>+	clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks));</div><div class='add'>+	clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks));</div><div class='add'>+	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0)</div><div class='add'>+		clk[cpu_div] = imx_clk_divider("cpu_div", "cpu_sel", CCM_CSCR, 12, 2);</div><div class='add'>+	else</div><div class='add'>+		clk[cpu_div] = imx_clk_divider("cpu_div", "cpu_sel", CCM_CSCR, 13, 3);</div><div class='add'>+	clk[clko_div] = imx_clk_divider("clko_div", "clko_sel", CCM_PCDR0, 22, 3);</div><div class='add'>+	clk[ssi1_sel] = imx_clk_mux("ssi1_sel", CCM_CSCR, 22, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));</div><div class='add'>+	clk[ssi2_sel] = imx_clk_mux("ssi2_sel", CCM_CSCR, 23, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));</div><div class='add'>+	clk[ssi1_div] = imx_clk_divider("ssi1_div", "ssi1_sel", CCM_PCDR0, 16, 6);</div><div class='add'>+	clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 3);</div><div class='add'>+	clk[clko_en] = imx_clk_gate("clko_en", "clko_div", CCM_PCCR0, 0);</div><div class='add'>+	clk[ssi2_ipg_gate] = imx_clk_gate("ssi2_ipg_gate", "ipg", CCM_PCCR0, 0);</div><div class='add'>+	clk[ssi1_ipg_gate] = imx_clk_gate("ssi1_ipg_gate", "ipg", CCM_PCCR0, 1);</div><div class='add'>+	clk[slcdc_ipg_gate] = imx_clk_gate("slcdc_ipg_gate", "ipg", CCM_PCCR0, 2);</div><div class='add'>+	clk[sdhc3_ipg_gate] = imx_clk_gate("sdhc3_ipg_gate", "ipg", CCM_PCCR0, 3);</div><div class='add'>+	clk[sdhc2_ipg_gate] = imx_clk_gate("sdhc2_ipg_gate", "ipg", CCM_PCCR0, 4);</div><div class='add'>+	clk[sdhc1_ipg_gate] = imx_clk_gate("sdhc1_ipg_gate", "ipg", CCM_PCCR0, 5);</div><div class='add'>+	clk[scc_ipg_gate] = imx_clk_gate("scc_ipg_gate", "ipg", CCM_PCCR0, 6);</div><div class='add'>+	clk[sahara_ipg_gate] = imx_clk_gate("sahara_ipg_gate", "ipg", CCM_PCCR0, 7);</div><div class='add'>+	clk[rtc_ipg_gate] = imx_clk_gate("rtc_ipg_gate", "ipg", CCM_PCCR0, 9);</div><div class='add'>+	clk[pwm_ipg_gate] = imx_clk_gate("pwm_ipg_gate", "ipg", CCM_PCCR0, 11);</div><div class='add'>+	clk[owire_ipg_gate] = imx_clk_gate("owire_ipg_gate", "ipg", CCM_PCCR0, 12);</div><div class='add'>+	clk[lcdc_ipg_gate] = imx_clk_gate("lcdc_ipg_gate", "ipg", CCM_PCCR0, 14);</div><div class='add'>+	clk[kpp_ipg_gate] = imx_clk_gate("kpp_ipg_gate", "ipg", CCM_PCCR0, 15);</div><div class='add'>+	clk[iim_ipg_gate] = imx_clk_gate("iim_ipg_gate", "ipg", CCM_PCCR0, 16);</div><div class='add'>+	clk[i2c2_ipg_gate] = imx_clk_gate("i2c2_ipg_gate", "ipg", CCM_PCCR0, 17);</div><div class='add'>+	clk[i2c1_ipg_gate] = imx_clk_gate("i2c1_ipg_gate", "ipg", CCM_PCCR0, 18);</div><div class='add'>+	clk[gpt6_ipg_gate] = imx_clk_gate("gpt6_ipg_gate", "ipg", CCM_PCCR0, 19);</div><div class='add'>+	clk[gpt5_ipg_gate] = imx_clk_gate("gpt5_ipg_gate", "ipg", CCM_PCCR0, 20);</div><div class='add'>+	clk[gpt4_ipg_gate] = imx_clk_gate("gpt4_ipg_gate", "ipg", CCM_PCCR0, 21);</div><div class='add'>+	clk[gpt3_ipg_gate] = imx_clk_gate("gpt3_ipg_gate", "ipg", CCM_PCCR0, 22);</div><div class='add'>+	clk[gpt2_ipg_gate] = imx_clk_gate("gpt2_ipg_gate", "ipg", CCM_PCCR0, 23);</div><div class='add'>+	clk[gpt1_ipg_gate] = imx_clk_gate("gpt1_ipg_gate", "ipg", CCM_PCCR0, 24);</div><div class='add'>+	clk[gpio_ipg_gate] = imx_clk_gate("gpio_ipg_gate", "ipg", CCM_PCCR0, 25);</div><div class='add'>+	clk[fec_ipg_gate] = imx_clk_gate("fec_ipg_gate", "ipg", CCM_PCCR0, 26);</div><div class='add'>+	clk[emma_ipg_gate] = imx_clk_gate("emma_ipg_gate", "ipg", CCM_PCCR0, 27);</div><div class='add'>+	clk[dma_ipg_gate] = imx_clk_gate("dma_ipg_gate", "ipg", CCM_PCCR0, 28);</div><div class='add'>+	clk[cspi3_ipg_gate] = imx_clk_gate("cspi3_ipg_gate", "ipg", CCM_PCCR0, 29);</div><div class='add'>+	clk[cspi2_ipg_gate] = imx_clk_gate("cspi2_ipg_gate", "ipg", CCM_PCCR0, 30);</div><div class='add'>+	clk[cspi1_ipg_gate] = imx_clk_gate("cspi1_ipg_gate", "ipg", CCM_PCCR0, 31);</div><div class='add'>+	clk[nfc_baud_gate] = imx_clk_gate("nfc_baud_gate", "nfc_div", CCM_PCCR1,  3);</div><div class='add'>+	clk[ssi2_baud_gate] = imx_clk_gate("ssi2_baud_gate", "ssi2_div", CCM_PCCR1,  4);</div><div class='add'>+	clk[ssi1_baud_gate] = imx_clk_gate("ssi1_baud_gate", "ssi1_div", CCM_PCCR1,  5);</div><div class='add'>+	clk[vpu_baud_gate] = imx_clk_gate("vpu_baud_gate", "vpu_div", CCM_PCCR1,  6);</div><div class='add'>+	clk[per4_gate] = imx_clk_gate("per4_gate", "per4_div", CCM_PCCR1,  7);</div><div class='add'>+	clk[per3_gate] = imx_clk_gate("per3_gate", "per3_div", CCM_PCCR1,  8);</div><div class='add'>+	clk[per2_gate] = imx_clk_gate("per2_gate", "per2_div", CCM_PCCR1,  9);</div><div class='add'>+	clk[per1_gate] = imx_clk_gate("per1_gate", "per1_div", CCM_PCCR1, 10);</div><div class='add'>+	clk[usb_ahb_gate] = imx_clk_gate("usb_ahb_gate", "ahb", CCM_PCCR1, 11);</div><div class='add'>+	clk[slcdc_ahb_gate] = imx_clk_gate("slcdc_ahb_gate", "ahb", CCM_PCCR1, 12);</div><div class='add'>+	clk[sahara_ahb_gate] = imx_clk_gate("sahara_ahb_gate", "ahb", CCM_PCCR1, 13);</div><div class='add'>+	clk[lcdc_ahb_gate] = imx_clk_gate("lcdc_ahb_gate", "ahb", CCM_PCCR1, 15);</div><div class='add'>+	clk[vpu_ahb_gate] = imx_clk_gate("vpu_ahb_gate", "ahb", CCM_PCCR1, 16);</div><div class='add'>+	clk[fec_ahb_gate] = imx_clk_gate("fec_ahb_gate", "ahb", CCM_PCCR1, 17);</div><div class='add'>+	clk[emma_ahb_gate] = imx_clk_gate("emma_ahb_gate", "ahb", CCM_PCCR1, 18);</div><div class='add'>+	clk[emi_ahb_gate] = imx_clk_gate("emi_ahb_gate", "ahb", CCM_PCCR1, 19);</div><div class='add'>+	clk[dma_ahb_gate] = imx_clk_gate("dma_ahb_gate", "ahb", CCM_PCCR1, 20);</div><div class='add'>+	clk[csi_ahb_gate] = imx_clk_gate("csi_ahb_gate", "ahb", CCM_PCCR1, 21);</div><div class='add'>+	clk[brom_ahb_gate] = imx_clk_gate("brom_ahb_gate", "ahb", CCM_PCCR1, 22);</div><div class='add'>+	clk[ata_ahb_gate] = imx_clk_gate("ata_ahb_gate", "ahb", CCM_PCCR1, 23);</div><div class='add'>+	clk[wdog_ipg_gate] = imx_clk_gate("wdog_ipg_gate", "ipg", CCM_PCCR1, 24);</div><div class='add'>+	clk[usb_ipg_gate] = imx_clk_gate("usb_ipg_gate", "ipg", CCM_PCCR1, 25);</div><div class='add'>+	clk[uart6_ipg_gate] = imx_clk_gate("uart6_ipg_gate", "ipg", CCM_PCCR1, 26);</div><div class='add'>+	clk[uart5_ipg_gate] = imx_clk_gate("uart5_ipg_gate", "ipg", CCM_PCCR1, 27);</div><div class='add'>+	clk[uart4_ipg_gate] = imx_clk_gate("uart4_ipg_gate", "ipg", CCM_PCCR1, 28);</div><div class='add'>+	clk[uart3_ipg_gate] = imx_clk_gate("uart3_ipg_gate", "ipg", CCM_PCCR1, 29);</div><div class='add'>+	clk[uart2_ipg_gate] = imx_clk_gate("uart2_ipg_gate", "ipg", CCM_PCCR1, 30);</div><div class='add'>+	clk[uart1_ipg_gate] = imx_clk_gate("uart1_ipg_gate", "ipg", CCM_PCCR1, 31);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clk); i++)</div><div class='add'>+		if (IS_ERR(clk[i]))</div><div class='add'>+			pr_err("i.MX27 clk %d: register failed with %ld\n",</div><div class='add'>+				i, PTR_ERR(clk[i]));</div><div class='add'>+</div><div class='add'>+	clk_register_clkdev(clk[uart1_ipg_gate], "ipg", "imx21-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[per1_gate], "per", "imx21-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[uart2_ipg_gate], "ipg", "imx21-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[per1_gate], "per", "imx21-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[uart3_ipg_gate], "ipg", "imx21-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[per1_gate], "per", "imx21-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[uart4_ipg_gate], "ipg", "imx21-uart.3");</div><div class='add'>+	clk_register_clkdev(clk[per1_gate], "per", "imx21-uart.3");</div><div class='add'>+	clk_register_clkdev(clk[uart5_ipg_gate], "ipg", "imx21-uart.4");</div><div class='add'>+	clk_register_clkdev(clk[per1_gate], "per", "imx21-uart.4");</div><div class='add'>+	clk_register_clkdev(clk[uart6_ipg_gate], "ipg", "imx21-uart.5");</div><div class='add'>+	clk_register_clkdev(clk[per1_gate], "per", "imx21-uart.5");</div><div class='add'>+	clk_register_clkdev(clk[gpt1_ipg_gate], "ipg", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[gpt2_ipg_gate], "ipg", "imx-gpt.1");</div><div class='add'>+	clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.1");</div><div class='add'>+	clk_register_clkdev(clk[gpt3_ipg_gate], "ipg", "imx-gpt.2");</div><div class='add'>+	clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.2");</div><div class='add'>+	clk_register_clkdev(clk[gpt4_ipg_gate], "ipg", "imx-gpt.3");</div><div class='add'>+	clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.3");</div><div class='add'>+	clk_register_clkdev(clk[gpt5_ipg_gate], "ipg", "imx-gpt.4");</div><div class='add'>+	clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.4");</div><div class='add'>+	clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5");</div><div class='add'>+	clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5");</div><div class='add'>+	clk_register_clkdev(clk[pwm_ipg_gate], NULL, "mxc_pwm.0");</div><div class='add'>+	clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.0");</div><div class='add'>+	clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "mxc-mmc.0");</div><div class='add'>+	clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.1");</div><div class='add'>+	clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.1");</div><div class='add'>+	clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.2");</div><div class='add'>+	clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.2");</div><div class='add'>+	clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0");</div><div class='add'>+	clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1");</div><div class='add'>+	clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2");</div><div class='add'>+	clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0");</div><div class='add'>+	clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");</div><div class='add'>+	clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0");</div><div class='add'>+	clk_register_clkdev(clk[csi_ahb_gate], NULL, "mx2-camera.0");</div><div class='add'>+	clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[usb_ipg_gate], "ipg", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[usb_ipg_gate], "ipg", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[usb_ipg_gate], "ipg", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");</div><div class='add'>+	clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");</div><div class='add'>+	clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0");</div><div class='add'>+	clk_register_clkdev(clk[vpu_baud_gate], "per", "imx-vpu");</div><div class='add'>+	clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "imx-vpu");</div><div class='add'>+	clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx-dma");</div><div class='add'>+	clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx-dma");</div><div class='add'>+	clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0");</div><div class='add'>+	clk_register_clkdev(clk[fec_ahb_gate], "ahb", "imx27-fec.0");</div><div class='add'>+	clk_register_clkdev(clk[wdog_ipg_gate], NULL, "imx2-wdt.0");</div><div class='add'>+	clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx-i2c.0");</div><div class='add'>+	clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1");</div><div class='add'>+	clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0");</div><div class='add'>+	clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad");</div><div class='add'>+	clk_register_clkdev(clk[emma_ahb_gate], "ahb", "imx-emma");</div><div class='add'>+	clk_register_clkdev(clk[emma_ipg_gate], "ipg", "imx-emma");</div><div class='add'>+	clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL);</div><div class='add'>+	clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL);</div><div class='add'>+	clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL);</div><div class='add'>+	clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL);</div><div class='add'>+	clk_register_clkdev(clk[rtc_ipg_gate], "rtc", NULL);</div><div class='add'>+	clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);</div><div class='add'>+	clk_register_clkdev(clk[cpu_div], "cpu", NULL);</div><div class='add'>+	clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);</div><div class='add'>+	clk_register_clkdev(clk[ssi1_baud_gate], "bitrate" , "imx-ssi.0");</div><div class='add'>+	clk_register_clkdev(clk[ssi2_baud_gate], "bitrate" , "imx-ssi.1");</div><div class='add'>+</div><div class='add'>+	mxc_timer_init(NULL, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR),</div><div class='add'>+			MX27_INT_GPT1);</div><div class='add'>+</div><div class='add'>+	clk_prepare_enable(clk[emi_ahb_gate]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+int __init mx27_clocks_init_dt(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	u32 fref = 26000000; /* default */</div><div class='add'>+</div><div class='add'>+	for_each_compatible_node(np, NULL, "fixed-clock") {</div><div class='add'>+		if (!of_device_is_compatible(np, "fsl,imx-osc26m"))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!of_property_read_u32(np, "clock-frequency", &amp;fref))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mx27_clocks_init(fref);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c<br/>new file mode 100644<br/>index 000000000000..a854b9cae5ea<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-imx31.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx31.c</a></div><div class='hunk'>@@ -0,0 +1,182 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 Sascha Hauer &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * as published by the Free Software Foundation; either version 2</div><div class='add'>+ * of the License, or (at your option) any later version.</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/mx31.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+</div><div class='add'>+#include "clk.h"</div><div class='add'>+#include "crmregs-imx3.h"</div><div class='add'>+</div><div class='add'>+static const char *mcu_main_sel[] = { "spll", "mpll", };</div><div class='add'>+static const char *per_sel[] = { "per_div", "ipg", };</div><div class='add'>+static const char *csi_sel[] = { "upll", "spll", };</div><div class='add'>+static const char *fir_sel[] = { "mcu_main", "upll", "spll" };</div><div class='add'>+</div><div class='add'>+enum mx31_clks {</div><div class='add'>+	ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, per_div,</div><div class='add'>+	per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre,</div><div class='add'>+	fir_div_post, sdhc1_gate, sdhc2_gate, gpt_gate, epit1_gate, epit2_gate,</div><div class='add'>+	iim_gate, ata_gate, sdma_gate, cspi3_gate, rng_gate, uart1_gate,</div><div class='add'>+	uart2_gate, ssi1_gate, i2c1_gate, i2c2_gate, i2c3_gate, hantro_gate,</div><div class='add'>+	mstick1_gate, mstick2_gate, csi_gate, rtc_gate, wdog_gate, pwm_gate,</div><div class='add'>+	sim_gate, ect_gate, usb_gate, kpp_gate, ipu_gate, uart3_gate,</div><div class='add'>+	uart4_gate, uart5_gate, owire_gate, ssi2_gate, cspi1_gate, cspi2_gate,</div><div class='add'>+	gacc_gate, emi_gate, rtic_gate, firi_gate, clk_max</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *clk[clk_max];</div><div class='add'>+</div><div class='add'>+int __init mx31_clocks_init(unsigned long fref)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk[ckih] = imx_clk_fixed("ckih", fref);</div><div class='add'>+	clk[ckil] = imx_clk_fixed("ckil", 32768);</div><div class='add'>+	clk[mpll] = imx_clk_pllv1("mpll", "ckih", base + MXC_CCM_MPCTL);</div><div class='add'>+	clk[spll] = imx_clk_pllv1("spll", "ckih", base + MXC_CCM_SRPCTL);</div><div class='add'>+	clk[upll] = imx_clk_pllv1("upll", "ckih", base + MXC_CCM_UPCTL);</div><div class='add'>+	clk[mcu_main] = imx_clk_mux("mcu_main", base + MXC_CCM_PMCR0, 31, 1, mcu_main_sel, ARRAY_SIZE(mcu_main_sel));</div><div class='add'>+	clk[hsp] = imx_clk_divider("hsp", "mcu_main", base + MXC_CCM_PDR0, 11, 3);</div><div class='add'>+	clk[ahb] = imx_clk_divider("ahb", "mcu_main", base + MXC_CCM_PDR0, 3, 3);</div><div class='add'>+	clk[nfc] = imx_clk_divider("nfc", "ahb", base + MXC_CCM_PDR0, 8, 3);</div><div class='add'>+	clk[ipg] = imx_clk_divider("ipg", "ahb", base + MXC_CCM_PDR0, 6, 2);</div><div class='add'>+	clk[per_div] = imx_clk_divider("per_div", "upll", base + MXC_CCM_PDR0, 16, 5);</div><div class='add'>+	clk[per] = imx_clk_mux("per", base + MXC_CCM_CCMR, 24, 1, per_sel, ARRAY_SIZE(per_sel));</div><div class='add'>+	clk[csi] = imx_clk_mux("csi_sel", base + MXC_CCM_CCMR, 25, 1, csi_sel, ARRAY_SIZE(csi_sel));</div><div class='add'>+	clk[fir] = imx_clk_mux("fir_sel", base + MXC_CCM_CCMR, 11, 2, fir_sel, ARRAY_SIZE(fir_sel));</div><div class='add'>+	clk[csi_div] = imx_clk_divider("csi_div", "csi_sel", base + MXC_CCM_PDR0, 23, 9);</div><div class='add'>+	clk[usb_div_pre] = imx_clk_divider("usb_div_pre", "upll", base + MXC_CCM_PDR1, 30, 2);</div><div class='add'>+	clk[usb_div_post] = imx_clk_divider("usb_div_post", "usb_div_pre", base + MXC_CCM_PDR1, 27, 3);</div><div class='add'>+	clk[fir_div_pre] = imx_clk_divider("fir_div_pre", "fir_sel", base + MXC_CCM_PDR1, 24, 3);</div><div class='add'>+	clk[fir_div_post] = imx_clk_divider("fir_div_post", "fir_div_pre", base + MXC_CCM_PDR1, 23, 6);</div><div class='add'>+	clk[sdhc1_gate] = imx_clk_gate2("sdhc1_gate", "per", base + MXC_CCM_CGR0, 0);</div><div class='add'>+	clk[sdhc2_gate] = imx_clk_gate2("sdhc2_gate", "per", base + MXC_CCM_CGR0, 2);</div><div class='add'>+	clk[gpt_gate] = imx_clk_gate2("gpt_gate", "per", base + MXC_CCM_CGR0, 4);</div><div class='add'>+	clk[epit1_gate] = imx_clk_gate2("epit1_gate", "per", base + MXC_CCM_CGR0, 6);</div><div class='add'>+	clk[epit2_gate] = imx_clk_gate2("epit2_gate", "per", base + MXC_CCM_CGR0, 8);</div><div class='add'>+	clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", base + MXC_CCM_CGR0, 10);</div><div class='add'>+	clk[ata_gate] = imx_clk_gate2("ata_gate", "ipg", base + MXC_CCM_CGR0, 12);</div><div class='add'>+	clk[sdma_gate] = imx_clk_gate2("sdma_gate", "ahb", base + MXC_CCM_CGR0, 14);</div><div class='add'>+	clk[cspi3_gate] = imx_clk_gate2("cspi3_gate", "ipg", base + MXC_CCM_CGR0, 16);</div><div class='add'>+	clk[rng_gate] = imx_clk_gate2("rng_gate", "ipg", base + MXC_CCM_CGR0, 18);</div><div class='add'>+	clk[uart1_gate] = imx_clk_gate2("uart1_gate", "per", base + MXC_CCM_CGR0, 20);</div><div class='add'>+	clk[uart2_gate] = imx_clk_gate2("uart2_gate", "per", base + MXC_CCM_CGR0, 22);</div><div class='add'>+	clk[ssi1_gate] = imx_clk_gate2("ssi1_gate", "spll", base + MXC_CCM_CGR0, 24);</div><div class='add'>+	clk[i2c1_gate] = imx_clk_gate2("i2c1_gate", "per", base + MXC_CCM_CGR0, 26);</div><div class='add'>+	clk[i2c2_gate] = imx_clk_gate2("i2c2_gate", "per", base + MXC_CCM_CGR0, 28);</div><div class='add'>+	clk[i2c3_gate] = imx_clk_gate2("i2c3_gate", "per", base + MXC_CCM_CGR0, 30);</div><div class='add'>+	clk[hantro_gate] = imx_clk_gate2("hantro_gate", "per", base + MXC_CCM_CGR1, 0);</div><div class='add'>+	clk[mstick1_gate] = imx_clk_gate2("mstick1_gate", "per", base + MXC_CCM_CGR1, 2);</div><div class='add'>+	clk[mstick2_gate] = imx_clk_gate2("mstick2_gate", "per", base + MXC_CCM_CGR1, 4);</div><div class='add'>+	clk[csi_gate] = imx_clk_gate2("csi_gate", "csi_div", base + MXC_CCM_CGR1, 6);</div><div class='add'>+	clk[rtc_gate] = imx_clk_gate2("rtc_gate", "ipg", base + MXC_CCM_CGR1, 8);</div><div class='add'>+	clk[wdog_gate] = imx_clk_gate2("wdog_gate", "ipg", base + MXC_CCM_CGR1, 10);</div><div class='add'>+	clk[pwm_gate] = imx_clk_gate2("pwm_gate", "per", base + MXC_CCM_CGR1, 12);</div><div class='add'>+	clk[sim_gate] = imx_clk_gate2("sim_gate", "per", base + MXC_CCM_CGR1, 14);</div><div class='add'>+	clk[ect_gate] = imx_clk_gate2("ect_gate", "per", base + MXC_CCM_CGR1, 16);</div><div class='add'>+	clk[usb_gate] = imx_clk_gate2("usb_gate", "ahb", base + MXC_CCM_CGR1, 18);</div><div class='add'>+	clk[kpp_gate] = imx_clk_gate2("kpp_gate", "ipg", base + MXC_CCM_CGR1, 20);</div><div class='add'>+	clk[ipu_gate] = imx_clk_gate2("ipu_gate", "hsp", base + MXC_CCM_CGR1, 22);</div><div class='add'>+	clk[uart3_gate] = imx_clk_gate2("uart3_gate", "per", base + MXC_CCM_CGR1, 24);</div><div class='add'>+	clk[uart4_gate] = imx_clk_gate2("uart4_gate", "per", base + MXC_CCM_CGR1, 26);</div><div class='add'>+	clk[uart5_gate] = imx_clk_gate2("uart5_gate", "per", base + MXC_CCM_CGR1, 28);</div><div class='add'>+	clk[owire_gate] = imx_clk_gate2("owire_gate", "per", base + MXC_CCM_CGR1, 30);</div><div class='add'>+	clk[ssi2_gate] = imx_clk_gate2("ssi2_gate", "spll", base + MXC_CCM_CGR2, 0);</div><div class='add'>+	clk[cspi1_gate] = imx_clk_gate2("cspi1_gate", "ipg", base + MXC_CCM_CGR2, 2);</div><div class='add'>+	clk[cspi2_gate] = imx_clk_gate2("cspi2_gate", "ipg", base + MXC_CCM_CGR2, 4);</div><div class='add'>+	clk[gacc_gate] = imx_clk_gate2("gacc_gate", "per", base + MXC_CCM_CGR2, 6);</div><div class='add'>+	clk[emi_gate] = imx_clk_gate2("emi_gate", "ahb", base + MXC_CCM_CGR2, 8);</div><div class='add'>+	clk[rtic_gate] = imx_clk_gate2("rtic_gate", "ahb", base + MXC_CCM_CGR2, 10);</div><div class='add'>+	clk[firi_gate] = imx_clk_gate2("firi_gate", "upll", base+MXC_CCM_CGR2, 12);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clk); i++)</div><div class='add'>+		if (IS_ERR(clk[i]))</div><div class='add'>+			pr_err("imx31 clk %d: register failed with %ld\n",</div><div class='add'>+				i, PTR_ERR(clk[i]));</div><div class='add'>+</div><div class='add'>+	clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[cspi1_gate], NULL, "imx31-cspi.0");</div><div class='add'>+	clk_register_clkdev(clk[cspi2_gate], NULL, "imx31-cspi.1");</div><div class='add'>+	clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2");</div><div class='add'>+	clk_register_clkdev(clk[pwm_gate], "pwm", NULL);</div><div class='add'>+	clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");</div><div class='add'>+	clk_register_clkdev(clk[rtc_gate], "rtc", NULL);</div><div class='add'>+	clk_register_clkdev(clk[epit1_gate], "epit", NULL);</div><div class='add'>+	clk_register_clkdev(clk[epit2_gate], "epit", NULL);</div><div class='add'>+	clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0");</div><div class='add'>+	clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");</div><div class='add'>+	clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");</div><div class='add'>+	clk_register_clkdev(clk[kpp_gate], "kpp", NULL);</div><div class='add'>+	clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[usb_div_post], "per", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[usb_gate], "ahb", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");</div><div class='add'>+	/* i.mx31 has the i.mx21 type uart */</div><div class='add'>+	clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[uart2_gate], "per", "imx21-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[uart3_gate], "per", "imx21-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[uart4_gate], "per", "imx21-uart.3");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3");</div><div class='add'>+	clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4");</div><div class='add'>+	clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");</div><div class='add'>+	clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");</div><div class='add'>+	clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");</div><div class='add'>+	clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");</div><div class='add'>+	clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0");</div><div class='add'>+	clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1");</div><div class='add'>+	clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");</div><div class='add'>+	clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");</div><div class='add'>+	clk_register_clkdev(clk[firi_gate], "firi", NULL);</div><div class='add'>+	clk_register_clkdev(clk[ata_gate], NULL, "pata_imx");</div><div class='add'>+	clk_register_clkdev(clk[rtic_gate], "rtic", NULL);</div><div class='add'>+	clk_register_clkdev(clk[rng_gate], "rng", NULL);</div><div class='add'>+	clk_register_clkdev(clk[sdma_gate], NULL, "imx31-sdma");</div><div class='add'>+	clk_register_clkdev(clk[iim_gate], "iim", NULL);</div><div class='add'>+</div><div class='add'>+	clk_set_parent(clk[csi], clk[upll]);</div><div class='add'>+	clk_prepare_enable(clk[emi_gate]);</div><div class='add'>+	clk_prepare_enable(clk[iim_gate]);</div><div class='add'>+	mx31_revision();</div><div class='add'>+	clk_disable_unprepare(clk[iim_gate]);</div><div class='add'>+</div><div class='add'>+	mxc_timer_init(NULL, MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR),</div><div class='add'>+			MX31_INT_GPT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c<br/>new file mode 100644<br/>index 000000000000..a9e60bf7dd75<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-imx35.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx35.c</a></div><div class='hunk'>@@ -0,0 +1,278 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 Sascha Hauer, Pengutronix &lt;s.hauer@pengutronix.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+</div><div class='add'>+#include "crmregs-imx3.h"</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+struct arm_ahb_div {</div><div class='add'>+	unsigned char arm, ahb, sel;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct arm_ahb_div clk_consumer[] = {</div><div class='add'>+	{ .arm = 1, .ahb = 4, .sel = 0},</div><div class='add'>+	{ .arm = 1, .ahb = 3, .sel = 1},</div><div class='add'>+	{ .arm = 2, .ahb = 2, .sel = 0},</div><div class='add'>+	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='add'>+	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='add'>+	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='add'>+	{ .arm = 4, .ahb = 1, .sel = 0},</div><div class='add'>+	{ .arm = 1, .ahb = 5, .sel = 0},</div><div class='add'>+	{ .arm = 1, .ahb = 8, .sel = 0},</div><div class='add'>+	{ .arm = 1, .ahb = 6, .sel = 1},</div><div class='add'>+	{ .arm = 2, .ahb = 4, .sel = 0},</div><div class='add'>+	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='add'>+	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='add'>+	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='add'>+	{ .arm = 4, .ahb = 2, .sel = 0},</div><div class='add'>+	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static char hsp_div_532[] = { 4, 8, 3, 0 };</div><div class='add'>+static char hsp_div_400[] = { 3, 6, 3, 0 };</div><div class='add'>+</div><div class='add'>+static const char *std_sel[] = {"ppll", "arm"};</div><div class='add'>+static const char *ipg_per_sel[] = {"ahb_per_div", "arm_per_div"};</div><div class='add'>+</div><div class='add'>+enum mx35_clks {</div><div class='add'>+	ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, ipg,</div><div class='add'>+	arm_per_div, ahb_per_div, ipg_per, uart_sel, uart_div, esdhc_sel,</div><div class='add'>+	esdhc1_div, esdhc2_div, esdhc3_div, spdif_sel, spdif_div_pre,</div><div class='add'>+	spdif_div_post, ssi_sel, ssi1_div_pre, ssi1_div_post, ssi2_div_pre,</div><div class='add'>+	ssi2_div_post, usb_sel, usb_div, nfc_div, asrc_gate, pata_gate,</div><div class='add'>+	audmux_gate, can1_gate, can2_gate, cspi1_gate, cspi2_gate, ect_gate,</div><div class='add'>+	edio_gate, emi_gate, epit1_gate, epit2_gate, esai_gate, esdhc1_gate,</div><div class='add'>+	esdhc2_gate, esdhc3_gate, fec_gate, gpio1_gate, gpio2_gate, gpio3_gate,</div><div class='add'>+	gpt_gate, i2c1_gate, i2c2_gate, i2c3_gate, iomuxc_gate, ipu_gate,</div><div class='add'>+	kpp_gate, mlb_gate, mshc_gate, owire_gate, pwm_gate, rngc_gate,</div><div class='add'>+	rtc_gate, rtic_gate, scc_gate, sdma_gate, spba_gate, spdif_gate,</div><div class='add'>+	ssi1_gate, ssi2_gate, uart1_gate, uart2_gate, uart3_gate, usbotg_gate,</div><div class='add'>+	wdog_gate, max_gate, admux_gate, csi_gate, iim_gate, gpu2d_gate,</div><div class='add'>+	clk_max</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *clk[clk_max];</div><div class='add'>+</div><div class='add'>+int __init mx35_clocks_init()</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR);</div><div class='add'>+	u32 pdr0, consumer_sel, hsp_sel;</div><div class='add'>+	struct arm_ahb_div *aad;</div><div class='add'>+	unsigned char *hsp_div;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	pdr0 = __raw_readl(base + MXC_CCM_PDR0);</div><div class='add'>+	consumer_sel = (pdr0 &gt;&gt; 16) &amp; 0xf;</div><div class='add'>+	aad = &amp;clk_consumer[consumer_sel];</div><div class='add'>+	if (!aad-&gt;arm) {</div><div class='add'>+		pr_err("i.MX35 clk: illegal consumer mux selection 0x%x\n", consumer_sel);</div><div class='add'>+		/*</div><div class='add'>+		 * We are basically stuck. Continue with a default entry and hope we</div><div class='add'>+		 * get far enough to actually show the above message</div><div class='add'>+		 */</div><div class='add'>+		aad = &amp;clk_consumer[0];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk[ckih] = imx_clk_fixed("ckih", 24000000);</div><div class='add'>+	clk[mpll] = imx_clk_pllv1("mpll", "ckih", base + MX35_CCM_MPCTL);</div><div class='add'>+	clk[ppll] = imx_clk_pllv1("ppll", "ckih", base + MX35_CCM_PPCTL);</div><div class='add'>+</div><div class='add'>+	clk[mpll] = imx_clk_fixed_factor("mpll_075", "mpll", 3, 4);</div><div class='add'>+</div><div class='add'>+	if (aad-&gt;sel)</div><div class='add'>+		clk[arm] = imx_clk_fixed_factor("arm", "mpll_075", 1, aad-&gt;arm);</div><div class='add'>+	else</div><div class='add'>+		clk[arm] = imx_clk_fixed_factor("arm", "mpll", 1, aad-&gt;arm);</div><div class='add'>+</div><div class='add'>+	if (clk_get_rate(clk[arm]) &gt; 400000000)</div><div class='add'>+		hsp_div = hsp_div_532;</div><div class='add'>+	else</div><div class='add'>+		hsp_div = hsp_div_400;</div><div class='add'>+</div><div class='add'>+	hsp_sel = (pdr0 &gt;&gt; 20) &amp; 0x3;</div><div class='add'>+	if (!hsp_div[hsp_sel]) {</div><div class='add'>+		pr_err("i.MX35 clk: illegal hsp clk selection 0x%x\n", hsp_sel);</div><div class='add'>+		hsp_sel = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk[hsp] = imx_clk_fixed_factor("hsp", "arm", 1, hsp_div[hsp_sel]);</div><div class='add'>+</div><div class='add'>+	clk[ahb] = imx_clk_fixed_factor("ahb", "arm", 1, aad-&gt;ahb);</div><div class='add'>+	clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2);</div><div class='add'>+</div><div class='add'>+	clk[arm_per_div] = imx_clk_divider("arm_per_div", "arm", base + MX35_CCM_PDR4, 16, 6);</div><div class='add'>+	clk[ahb_per_div] = imx_clk_divider("ahb_per_div", "ahb", base + MXC_CCM_PDR0, 12, 3);</div><div class='add'>+	clk[ipg_per] = imx_clk_mux("ipg_per", base + MXC_CCM_PDR0, 26, 1, ipg_per_sel, ARRAY_SIZE(ipg_per_sel));</div><div class='add'>+</div><div class='add'>+	clk[uart_sel] = imx_clk_mux("uart_sel", base + MX35_CCM_PDR3, 14, 1, std_sel, ARRAY_SIZE(std_sel));</div><div class='add'>+	clk[uart_div] = imx_clk_divider("uart_div", "uart_sel", base + MX35_CCM_PDR4, 10, 6);</div><div class='add'>+</div><div class='add'>+	clk[esdhc_sel] = imx_clk_mux("esdhc_sel", base + MX35_CCM_PDR4, 9, 1, std_sel, ARRAY_SIZE(std_sel));</div><div class='add'>+	clk[esdhc1_div] = imx_clk_divider("esdhc1_div", "esdhc_sel", base + MX35_CCM_PDR3, 0, 6);</div><div class='add'>+	clk[esdhc2_div] = imx_clk_divider("esdhc2_div", "esdhc_sel", base + MX35_CCM_PDR3, 8, 6);</div><div class='add'>+	clk[esdhc3_div] = imx_clk_divider("esdhc3_div", "esdhc_sel", base + MX35_CCM_PDR3, 16, 6);</div><div class='add'>+</div><div class='add'>+	clk[spdif_sel] = imx_clk_mux("spdif_sel", base + MX35_CCM_PDR3, 22, 1, std_sel, ARRAY_SIZE(std_sel));</div><div class='add'>+	clk[spdif_div_pre] = imx_clk_divider("spdif_div_pre", "spdif_sel", base + MX35_CCM_PDR3, 29, 3); /* divide by 1 not allowed */ </div><div class='add'>+	clk[spdif_div_post] = imx_clk_divider("spdif_div_post", "spdif_div_pre", base + MX35_CCM_PDR3, 23, 6);</div><div class='add'>+</div><div class='add'>+	clk[ssi_sel] = imx_clk_mux("ssi_sel", base + MX35_CCM_PDR2, 6, 1, std_sel, ARRAY_SIZE(std_sel));</div><div class='add'>+	clk[ssi1_div_pre] = imx_clk_divider("ssi1_div_pre", "ssi_sel", base + MX35_CCM_PDR2, 24, 3);</div><div class='add'>+	clk[ssi1_div_post] = imx_clk_divider("ssi1_div_post", "ssi1_div_pre", base + MX35_CCM_PDR2, 0, 6);</div><div class='add'>+	clk[ssi2_div_pre] = imx_clk_divider("ssi2_div_pre", "ssi_sel", base + MX35_CCM_PDR2, 27, 3);</div><div class='add'>+	clk[ssi2_div_post] = imx_clk_divider("ssi2_div_post", "ssi2_div_pre", base + MX35_CCM_PDR2, 8, 6);</div><div class='add'>+</div><div class='add'>+	clk[usb_sel] = imx_clk_mux("usb_sel", base + MX35_CCM_PDR4, 9, 1, std_sel, ARRAY_SIZE(std_sel));</div><div class='add'>+	clk[usb_div] = imx_clk_divider("usb_div", "usb_sel", base + MX35_CCM_PDR4, 22, 6);</div><div class='add'>+</div><div class='add'>+	clk[nfc_div] = imx_clk_divider("nfc_div", "ahb", base + MX35_CCM_PDR4, 28, 4);</div><div class='add'>+</div><div class='add'>+	clk[asrc_gate] = imx_clk_gate2("asrc_gate", "ipg", base + MX35_CCM_CGR0,  0);</div><div class='add'>+	clk[pata_gate] = imx_clk_gate2("pata_gate", "ipg", base + MX35_CCM_CGR0,  2);</div><div class='add'>+	clk[audmux_gate] = imx_clk_gate2("audmux_gate", "ipg", base + MX35_CCM_CGR0,  4);</div><div class='add'>+	clk[can1_gate] = imx_clk_gate2("can1_gate", "ipg", base + MX35_CCM_CGR0,  6);</div><div class='add'>+	clk[can2_gate] = imx_clk_gate2("can2_gate", "ipg", base + MX35_CCM_CGR0,  8);</div><div class='add'>+	clk[cspi1_gate] = imx_clk_gate2("cspi1_gate", "ipg", base + MX35_CCM_CGR0, 10);</div><div class='add'>+	clk[cspi2_gate] = imx_clk_gate2("cspi2_gate", "ipg", base + MX35_CCM_CGR0, 12);</div><div class='add'>+	clk[ect_gate] = imx_clk_gate2("ect_gate", "ipg", base + MX35_CCM_CGR0, 14);</div><div class='add'>+	clk[edio_gate] = imx_clk_gate2("edio_gate",   "ipg", base + MX35_CCM_CGR0, 16);</div><div class='add'>+	clk[emi_gate] = imx_clk_gate2("emi_gate", "ipg", base + MX35_CCM_CGR0, 18);</div><div class='add'>+	clk[epit1_gate] = imx_clk_gate2("epit1_gate", "ipg", base + MX35_CCM_CGR0, 20);</div><div class='add'>+	clk[epit2_gate] = imx_clk_gate2("epit2_gate", "ipg", base + MX35_CCM_CGR0, 22);</div><div class='add'>+	clk[esai_gate] = imx_clk_gate2("esai_gate",   "ipg", base + MX35_CCM_CGR0, 24);</div><div class='add'>+	clk[esdhc1_gate] = imx_clk_gate2("esdhc1_gate", "esdhc1_div", base + MX35_CCM_CGR0, 26);</div><div class='add'>+	clk[esdhc2_gate] = imx_clk_gate2("esdhc2_gate", "esdhc2_div", base + MX35_CCM_CGR0, 28);</div><div class='add'>+	clk[esdhc3_gate] = imx_clk_gate2("esdhc3_gate", "esdhc3_div", base + MX35_CCM_CGR0, 30);</div><div class='add'>+</div><div class='add'>+	clk[fec_gate] = imx_clk_gate2("fec_gate", "ipg", base + MX35_CCM_CGR1,  0);</div><div class='add'>+	clk[gpio1_gate] = imx_clk_gate2("gpio1_gate", "ipg", base + MX35_CCM_CGR1,  2);</div><div class='add'>+	clk[gpio2_gate] = imx_clk_gate2("gpio2_gate", "ipg", base + MX35_CCM_CGR1,  4);</div><div class='add'>+	clk[gpio3_gate] = imx_clk_gate2("gpio3_gate", "ipg", base + MX35_CCM_CGR1,  6);</div><div class='add'>+	clk[gpt_gate] = imx_clk_gate2("gpt_gate", "ipg", base + MX35_CCM_CGR1,  8);</div><div class='add'>+	clk[i2c1_gate] = imx_clk_gate2("i2c1_gate", "ipg_per", base + MX35_CCM_CGR1, 10);</div><div class='add'>+	clk[i2c2_gate] = imx_clk_gate2("i2c2_gate", "ipg_per", base + MX35_CCM_CGR1, 12);</div><div class='add'>+	clk[i2c3_gate] = imx_clk_gate2("i2c3_gate", "ipg_per", base + MX35_CCM_CGR1, 14);</div><div class='add'>+	clk[iomuxc_gate] = imx_clk_gate2("iomuxc_gate", "ipg", base + MX35_CCM_CGR1, 16);</div><div class='add'>+	clk[ipu_gate] = imx_clk_gate2("ipu_gate", "hsp", base + MX35_CCM_CGR1, 18);</div><div class='add'>+	clk[kpp_gate] = imx_clk_gate2("kpp_gate", "ipg", base + MX35_CCM_CGR1, 20);</div><div class='add'>+	clk[mlb_gate] = imx_clk_gate2("mlb_gate", "ahb", base + MX35_CCM_CGR1, 22);</div><div class='add'>+	clk[mshc_gate] = imx_clk_gate2("mshc_gate", "dummy", base + MX35_CCM_CGR1, 24);</div><div class='add'>+	clk[owire_gate] = imx_clk_gate2("owire_gate", "ipg_per", base + MX35_CCM_CGR1, 26);</div><div class='add'>+	clk[pwm_gate] = imx_clk_gate2("pwm_gate", "ipg_per", base + MX35_CCM_CGR1, 28);</div><div class='add'>+	clk[rngc_gate] = imx_clk_gate2("rngc_gate", "ipg", base + MX35_CCM_CGR1, 30);</div><div class='add'>+</div><div class='add'>+	clk[rtc_gate] = imx_clk_gate2("rtc_gate", "ipg", base + MX35_CCM_CGR2,  0);</div><div class='add'>+	clk[rtic_gate] = imx_clk_gate2("rtic_gate", "ahb", base + MX35_CCM_CGR2,  2);</div><div class='add'>+	clk[scc_gate] = imx_clk_gate2("scc_gate", "ipg", base + MX35_CCM_CGR2,  4);</div><div class='add'>+	clk[sdma_gate] = imx_clk_gate2("sdma_gate", "ahb", base + MX35_CCM_CGR2,  6);</div><div class='add'>+	clk[spba_gate] = imx_clk_gate2("spba_gate", "ipg", base + MX35_CCM_CGR2,  8);</div><div class='add'>+	clk[spdif_gate] = imx_clk_gate2("spdif_gate", "spdif_div_post", base + MX35_CCM_CGR2, 10);</div><div class='add'>+	clk[ssi1_gate] = imx_clk_gate2("ssi1_gate", "ssi1_div_post", base + MX35_CCM_CGR2, 12);</div><div class='add'>+	clk[ssi2_gate] = imx_clk_gate2("ssi2_gate", "ssi2_div_post", base + MX35_CCM_CGR2, 14);</div><div class='add'>+	clk[uart1_gate] = imx_clk_gate2("uart1_gate", "uart_div", base + MX35_CCM_CGR2, 16);</div><div class='add'>+	clk[uart2_gate] = imx_clk_gate2("uart2_gate", "uart_div", base + MX35_CCM_CGR2, 18);</div><div class='add'>+	clk[uart3_gate] = imx_clk_gate2("uart3_gate", "uart_div", base + MX35_CCM_CGR2, 20);</div><div class='add'>+	clk[usbotg_gate] = imx_clk_gate2("usbotg_gate", "ahb", base + MX35_CCM_CGR2, 22);</div><div class='add'>+	clk[wdog_gate] = imx_clk_gate2("wdog_gate", "ipg", base + MX35_CCM_CGR2, 24);</div><div class='add'>+	clk[max_gate] = imx_clk_gate2("max_gate", "dummy", base + MX35_CCM_CGR2, 26);</div><div class='add'>+	clk[admux_gate] = imx_clk_gate2("admux_gate", "ipg", base + MX35_CCM_CGR2, 30);</div><div class='add'>+</div><div class='add'>+	clk[csi_gate] = imx_clk_gate2("csi_gate", "ipg", base + MX35_CCM_CGR3,  0);</div><div class='add'>+	clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", base + MX35_CCM_CGR3,  2);</div><div class='add'>+	clk[gpu2d_gate] = imx_clk_gate2("gpu2d_gate", "ahb", base + MX35_CCM_CGR3,  4);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clk); i++)</div><div class='add'>+		if (IS_ERR(clk[i]))</div><div class='add'>+			pr_err("i.MX35 clk %d: register failed with %ld\n",</div><div class='add'>+				i, PTR_ERR(clk[i]));</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	clk_register_clkdev(clk[pata_gate], NULL, "pata_imx");</div><div class='add'>+	clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0");</div><div class='add'>+	clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1");</div><div class='add'>+	clk_register_clkdev(clk[cspi1_gate], "per", "imx35-cspi.0");</div><div class='add'>+	clk_register_clkdev(clk[cspi1_gate], "ipg", "imx35-cspi.0");</div><div class='add'>+	clk_register_clkdev(clk[cspi2_gate], "per", "imx35-cspi.1");</div><div class='add'>+	clk_register_clkdev(clk[cspi2_gate], "ipg", "imx35-cspi.1");</div><div class='add'>+	clk_register_clkdev(clk[epit1_gate], NULL, "imx-epit.0");</div><div class='add'>+	clk_register_clkdev(clk[epit2_gate], NULL, "imx-epit.1");</div><div class='add'>+	clk_register_clkdev(clk[esdhc1_gate], "per", "sdhci-esdhc-imx35.0");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.0");</div><div class='add'>+	clk_register_clkdev(clk[ahb], "ahb", "sdhci-esdhc-imx35.0");</div><div class='add'>+	clk_register_clkdev(clk[esdhc2_gate], "per", "sdhci-esdhc-imx35.1");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.1");</div><div class='add'>+	clk_register_clkdev(clk[ahb], "ahb", "sdhci-esdhc-imx35.1");</div><div class='add'>+	clk_register_clkdev(clk[esdhc3_gate], "per", "sdhci-esdhc-imx35.2");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.2");</div><div class='add'>+	clk_register_clkdev(clk[ahb], "ahb", "sdhci-esdhc-imx35.2");</div><div class='add'>+	/* i.mx35 has the i.mx27 type fec */</div><div class='add'>+	clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");</div><div class='add'>+	clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");</div><div class='add'>+	clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");</div><div class='add'>+	clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");</div><div class='add'>+	clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");</div><div class='add'>+	clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");</div><div class='add'>+	clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1");</div><div class='add'>+	clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.0");</div><div class='add'>+	clk_register_clkdev(clk[ssi1_div_post], "per", "imx-ssi.0");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.1");</div><div class='add'>+	clk_register_clkdev(clk[ssi2_div_post], "per", "imx-ssi.1");</div><div class='add'>+	/* i.mx35 has the i.mx21 type uart */</div><div class='add'>+	clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[uart2_gate], "per", "imx21-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[uart3_gate], "per", "imx21-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[usbotg_gate], "ahb", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[usbotg_gate], "ahb", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[usbotg_gate], "ahb", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");</div><div class='add'>+	clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0");</div><div class='add'>+</div><div class='add'>+	clk_prepare_enable(clk[spba_gate]);</div><div class='add'>+	clk_prepare_enable(clk[gpio1_gate]);</div><div class='add'>+	clk_prepare_enable(clk[gpio2_gate]);</div><div class='add'>+	clk_prepare_enable(clk[gpio3_gate]);</div><div class='add'>+	clk_prepare_enable(clk[iim_gate]);</div><div class='add'>+	clk_prepare_enable(clk[emi_gate]);</div><div class='add'>+</div><div class='add'>+	imx_print_silicon_rev("i.MX35", mx35_revision());</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MXC_USE_EPIT</div><div class='add'>+	epit_timer_init(&amp;epit1_clk,</div><div class='add'>+			MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);</div><div class='add'>+#else</div><div class='add'>+	mxc_timer_init(NULL, MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR),</div><div class='add'>+			MX35_INT_GPT);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c<br/>new file mode 100644<br/>index 000000000000..fcd94f3b0f0e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-imx51-imx53.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx51-imx53.c</a></div><div class='hunk'>@@ -0,0 +1,506 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2011 Sascha Hauer, Pengutronix &lt;s.hauer@pengutronix.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+</div><div class='add'>+#include "crm-regs-imx5.h"</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+/* Low-power Audio Playback Mode clock */</div><div class='add'>+static const char *lp_apm_sel[] = { "osc", };</div><div class='add'>+</div><div class='add'>+/* This is used multiple times */</div><div class='add'>+static const char *standard_pll_sel[] = { "pll1_sw", "pll2_sw", "pll3_sw", "lp_apm", };</div><div class='add'>+static const char *periph_apm_sel[] = { "pll1_sw", "pll3_sw", "lp_apm", };</div><div class='add'>+static const char *main_bus_sel[] = { "pll2_sw", "periph_apm", };</div><div class='add'>+static const char *per_lp_apm_sel[] = { "main_bus", "lp_apm", };</div><div class='add'>+static const char *per_root_sel[] = { "per_podf", "ipg", };</div><div class='add'>+static const char *esdhc_c_sel[] = { "esdhc_a_podf", "esdhc_b_podf", };</div><div class='add'>+static const char *esdhc_d_sel[] = { "esdhc_a_podf", "esdhc_b_podf", };</div><div class='add'>+static const char *ssi_apm_sels[] = { "ckih1", "lp_amp", "ckih2", };</div><div class='add'>+static const char *ssi_clk_sels[] = { "pll1_sw", "pll2_sw", "pll3_sw", "ssi_apm", };</div><div class='add'>+static const char *ssi3_clk_sels[] = { "ssi1_root_gate", "ssi2_root_gate", };</div><div class='add'>+static const char *ssi_ext1_com_sels[] = { "ssi_ext1_podf", "ssi1_root_gate", };</div><div class='add'>+static const char *ssi_ext2_com_sels[] = { "ssi_ext2_podf", "ssi2_root_gate", };</div><div class='add'>+static const char *emi_slow_sel[] = { "main_bus", "ahb", };</div><div class='add'>+static const char *usb_phy_sel_str[] = { "osc", "usb_phy_podf", };</div><div class='add'>+static const char *mx51_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "tve_di", };</div><div class='add'>+static const char *mx53_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "di_pll4_podf", "dummy", "ldb_di0", };</div><div class='add'>+static const char *mx53_ldb_di0_sel[] = { "pll3_sw", "pll4_sw", };</div><div class='add'>+static const char *mx51_ipu_di1_sel[] = { "di_pred", "osc", "ckih1", "tve_di", "ipp_di1", };</div><div class='add'>+static const char *mx53_ipu_di1_sel[] = { "di_pred", "osc", "ckih1", "tve_di", "ipp_di1", "ldb_di1", };</div><div class='add'>+static const char *mx53_ldb_di1_sel[] = { "pll3_sw", "pll4_sw", };</div><div class='add'>+static const char *mx51_tve_ext_sel[] = { "osc", "ckih1", };</div><div class='add'>+static const char *mx53_tve_ext_sel[] = { "pll4_sw", "ckih1", };</div><div class='add'>+static const char *tve_sel[] = { "tve_pred", "tve_ext_sel", };</div><div class='add'>+static const char *ipu_sel[] = { "axi_a", "axi_b", "emi_slow_gate", "ahb", };</div><div class='add'>+static const char *vpu_sel[] = { "axi_a", "axi_b", "emi_slow_gate", "ahb", };</div><div class='add'>+</div><div class='add'>+enum imx5_clks {</div><div class='add'>+	dummy, ckil, osc, ckih1, ckih2, ahb, ipg, axi_a, axi_b, uart_pred,</div><div class='add'>+	uart_root, esdhc_a_pred, esdhc_b_pred, esdhc_c_s, esdhc_d_s,</div><div class='add'>+	emi_sel, emi_slow_podf, nfc_podf, ecspi_pred, ecspi_podf, usboh3_pred,</div><div class='add'>+	usboh3_podf, usb_phy_pred, usb_phy_podf, cpu_podf, di_pred, tve_di,</div><div class='add'>+	tve_s, uart1_ipg_gate, uart1_per_gate, uart2_ipg_gate,</div><div class='add'>+	uart2_per_gate, uart3_ipg_gate, uart3_per_gate, i2c1_gate, i2c2_gate,</div><div class='add'>+	gpt_ipg_gate, pwm1_ipg_gate, pwm1_hf_gate, pwm2_ipg_gate, pwm2_hf_gate,</div><div class='add'>+	gpt_gate, fec_gate, usboh3_per_gate, esdhc1_ipg_gate, esdhc2_ipg_gate,</div><div class='add'>+	esdhc3_ipg_gate, esdhc4_ipg_gate, ssi1_ipg_gate, ssi2_ipg_gate,</div><div class='add'>+	ssi3_ipg_gate, ecspi1_ipg_gate, ecspi1_per_gate, ecspi2_ipg_gate,</div><div class='add'>+	ecspi2_per_gate, cspi_ipg_gate, sdma_gate, emi_slow_gate, ipu_s,</div><div class='add'>+	ipu_gate, nfc_gate, ipu_di1_gate, vpu_s, vpu_gate,</div><div class='add'>+	vpu_reference_gate, uart4_ipg_gate, uart4_per_gate, uart5_ipg_gate,</div><div class='add'>+	uart5_per_gate, tve_gate, tve_pred, esdhc1_per_gate, esdhc2_per_gate,</div><div class='add'>+	esdhc3_per_gate, esdhc4_per_gate, usb_phy_gate, hsi2c_gate,</div><div class='add'>+	mipi_hsc1_gate, mipi_hsc2_gate, mipi_esc_gate, mipi_hsp_gate,</div><div class='add'>+	ldb_di1_div_3_5, ldb_di1_div, ldb_di0_div_3_5, ldb_di0_div,</div><div class='add'>+	ldb_di1_gate, can2_serial_gate, can2_ipg_gate, i2c3_gate, lp_apm,</div><div class='add'>+	periph_apm, main_bus, ahb_max, aips_tz1, aips_tz2, tmax1, tmax2,</div><div class='add'>+	tmax3, spba, uart_sel, esdhc_a_sel, esdhc_b_sel, esdhc_a_podf,</div><div class='add'>+	esdhc_b_podf, ecspi_sel, usboh3_sel, usb_phy_sel, iim_gate,</div><div class='add'>+	usboh3_gate, emi_fast_gate, ipu_di0_gate,gpc_dvfs, pll1_sw, pll2_sw,</div><div class='add'>+	pll3_sw, ipu_di0_sel, ipu_di1_sel, tve_ext_sel, mx51_mipi, pll4_sw,</div><div class='add'>+	ldb_di1_sel, di_pll4_podf, ldb_di0_sel, ldb_di0_gate, usb_phy1_gate,</div><div class='add'>+	usb_phy2_gate, per_lp_apm, per_pred1, per_pred2, per_podf, per_root,</div><div class='add'>+	ssi_apm, ssi1_root_sel, ssi2_root_sel, ssi3_root_sel, ssi_ext1_sel,</div><div class='add'>+	ssi_ext2_sel, ssi_ext1_com_sel, ssi_ext2_com_sel, ssi1_root_pred,</div><div class='add'>+	ssi1_root_podf, ssi2_root_pred, ssi2_root_podf, ssi_ext1_pred,</div><div class='add'>+	ssi_ext1_podf, ssi_ext2_pred, ssi_ext2_podf, ssi1_root_gate,</div><div class='add'>+	ssi2_root_gate, ssi3_root_gate, ssi_ext1_gate, ssi_ext2_gate,</div><div class='add'>+	clk_max</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *clk[clk_max];</div><div class='add'>+</div><div class='add'>+static void __init mx5_clocks_common_init(unsigned long rate_ckil,</div><div class='add'>+		unsigned long rate_osc, unsigned long rate_ckih1,</div><div class='add'>+		unsigned long rate_ckih2)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk[dummy] = imx_clk_fixed("dummy", 0);</div><div class='add'>+	clk[ckil] = imx_clk_fixed("ckil", rate_ckil);</div><div class='add'>+	clk[osc] = imx_clk_fixed("osc", rate_osc);</div><div class='add'>+	clk[ckih1] = imx_clk_fixed("ckih1", rate_ckih1);</div><div class='add'>+	clk[ckih2] = imx_clk_fixed("ckih2", rate_ckih2);</div><div class='add'>+</div><div class='add'>+	clk[lp_apm] = imx_clk_mux("lp_apm", MXC_CCM_CCSR, 9, 1,</div><div class='add'>+				lp_apm_sel, ARRAY_SIZE(lp_apm_sel));</div><div class='add'>+	clk[periph_apm] = imx_clk_mux("periph_apm", MXC_CCM_CBCMR, 12, 2,</div><div class='add'>+				periph_apm_sel, ARRAY_SIZE(periph_apm_sel));</div><div class='add'>+	clk[main_bus] = imx_clk_mux("main_bus", MXC_CCM_CBCDR, 25, 1,</div><div class='add'>+				main_bus_sel, ARRAY_SIZE(main_bus_sel));</div><div class='add'>+	clk[per_lp_apm] = imx_clk_mux("per_lp_apm", MXC_CCM_CBCDR, 1, 1,</div><div class='add'>+				per_lp_apm_sel, ARRAY_SIZE(per_lp_apm_sel));</div><div class='add'>+	clk[per_pred1] = imx_clk_divider("per_pred1", "per_lp_apm", MXC_CCM_CBCDR, 6, 2);</div><div class='add'>+	clk[per_pred2] = imx_clk_divider("per_pred2", "per_pred1", MXC_CCM_CBCDR, 3, 3);</div><div class='add'>+	clk[per_podf] = imx_clk_divider("per_podf", "per_pred2", MXC_CCM_CBCDR, 0, 3);</div><div class='add'>+	clk[per_root] = imx_clk_mux("per_root", MXC_CCM_CBCDR, 1, 0,</div><div class='add'>+				per_root_sel, ARRAY_SIZE(per_root_sel));</div><div class='add'>+	clk[ahb] = imx_clk_divider("ahb", "main_bus", MXC_CCM_CBCDR, 10, 3);</div><div class='add'>+	clk[ahb_max] = imx_clk_gate2("ahb_max", "ahb", MXC_CCM_CCGR0, 28);</div><div class='add'>+	clk[aips_tz1] = imx_clk_gate2("aips_tz1", "ahb", MXC_CCM_CCGR0, 24);</div><div class='add'>+	clk[aips_tz2] = imx_clk_gate2("aips_tz2", "ahb", MXC_CCM_CCGR0, 26);</div><div class='add'>+	clk[tmax1] = imx_clk_gate2("tmax1", "ahb", MXC_CCM_CCGR1, 0);</div><div class='add'>+	clk[tmax2] = imx_clk_gate2("tmax2", "ahb", MXC_CCM_CCGR1, 2);</div><div class='add'>+	clk[tmax3] = imx_clk_gate2("tmax3", "ahb", MXC_CCM_CCGR1, 4);</div><div class='add'>+	clk[spba] = imx_clk_gate2("spba", "ipg", MXC_CCM_CCGR5, 0);</div><div class='add'>+	clk[ipg] = imx_clk_divider("ipg", "ahb", MXC_CCM_CBCDR, 8, 2);</div><div class='add'>+	clk[axi_a] = imx_clk_divider("axi_a", "main_bus", MXC_CCM_CBCDR, 16, 3);</div><div class='add'>+	clk[axi_b] = imx_clk_divider("axi_b", "main_bus", MXC_CCM_CBCDR, 19, 3);</div><div class='add'>+	clk[uart_sel] = imx_clk_mux("uart_sel", MXC_CCM_CSCMR1, 24, 2,</div><div class='add'>+				standard_pll_sel, ARRAY_SIZE(standard_pll_sel));</div><div class='add'>+	clk[uart_pred] = imx_clk_divider("uart_pred", "uart_sel", MXC_CCM_CSCDR1, 3, 3);</div><div class='add'>+	clk[uart_root] = imx_clk_divider("uart_root", "uart_pred", MXC_CCM_CSCDR1, 0, 3);</div><div class='add'>+</div><div class='add'>+	clk[esdhc_a_sel] = imx_clk_mux("esdhc_a_sel", MXC_CCM_CSCMR1, 20, 2,</div><div class='add'>+				standard_pll_sel, ARRAY_SIZE(standard_pll_sel));</div><div class='add'>+	clk[esdhc_b_sel] = imx_clk_mux("esdhc_b_sel", MXC_CCM_CSCMR1, 16, 2,</div><div class='add'>+				standard_pll_sel, ARRAY_SIZE(standard_pll_sel));</div><div class='add'>+	clk[esdhc_a_pred] = imx_clk_divider("esdhc_a_pred", "esdhc_a_sel", MXC_CCM_CSCDR1, 16, 3);</div><div class='add'>+	clk[esdhc_a_podf] = imx_clk_divider("esdhc_a_podf", "esdhc_a_pred", MXC_CCM_CSCDR1, 11, 3);</div><div class='add'>+	clk[esdhc_b_pred] = imx_clk_divider("esdhc_b_pred", "esdhc_b_sel", MXC_CCM_CSCDR1, 22, 3);</div><div class='add'>+	clk[esdhc_b_podf] = imx_clk_divider("esdhc_b_podf", "esdhc_b_pred", MXC_CCM_CSCDR1, 19, 3);</div><div class='add'>+	clk[esdhc_c_s] = imx_clk_mux("esdhc_c_sel", MXC_CCM_CSCMR1, 19, 1, esdhc_c_sel, ARRAY_SIZE(esdhc_c_sel));</div><div class='add'>+	clk[esdhc_d_s] = imx_clk_mux("esdhc_d_sel", MXC_CCM_CSCMR1, 18, 1, esdhc_d_sel, ARRAY_SIZE(esdhc_d_sel));</div><div class='add'>+</div><div class='add'>+	clk[emi_sel] = imx_clk_mux("emi_sel", MXC_CCM_CBCDR, 26, 1,</div><div class='add'>+				emi_slow_sel, ARRAY_SIZE(emi_slow_sel));</div><div class='add'>+	clk[emi_slow_podf] = imx_clk_divider("emi_slow_podf", "emi_sel", MXC_CCM_CBCDR, 22, 3);</div><div class='add'>+	clk[nfc_podf] = imx_clk_divider("nfc_podf", "emi_slow_podf", MXC_CCM_CBCDR, 13, 3);</div><div class='add'>+	clk[ecspi_sel] = imx_clk_mux("ecspi_sel", MXC_CCM_CSCMR1, 4, 2,</div><div class='add'>+				standard_pll_sel, ARRAY_SIZE(standard_pll_sel));</div><div class='add'>+	clk[ecspi_pred] = imx_clk_divider("ecspi_pred", "ecspi_sel", MXC_CCM_CSCDR2, 25, 3);</div><div class='add'>+	clk[ecspi_podf] = imx_clk_divider("ecspi_podf", "ecspi_pred", MXC_CCM_CSCDR2, 19, 6);</div><div class='add'>+	clk[usboh3_sel] = imx_clk_mux("usboh3_sel", MXC_CCM_CSCMR1, 22, 2,</div><div class='add'>+				standard_pll_sel, ARRAY_SIZE(standard_pll_sel));</div><div class='add'>+	clk[usboh3_pred] = imx_clk_divider("usboh3_pred", "usboh3_sel", MXC_CCM_CSCDR1, 8, 3);</div><div class='add'>+	clk[usboh3_podf] = imx_clk_divider("usboh3_podf", "usboh3_pred", MXC_CCM_CSCDR1, 6, 2);</div><div class='add'>+	clk[usb_phy_pred] = imx_clk_divider("usb_phy_pred", "pll3_sw", MXC_CCM_CDCDR, 3, 3);</div><div class='add'>+	clk[usb_phy_podf] = imx_clk_divider("usb_phy_podf", "usb_phy_pred", MXC_CCM_CDCDR, 0, 3);</div><div class='add'>+	clk[usb_phy_sel] = imx_clk_mux("usb_phy_sel", MXC_CCM_CSCMR1, 26, 1,</div><div class='add'>+				usb_phy_sel_str, ARRAY_SIZE(usb_phy_sel_str));</div><div class='add'>+	clk[cpu_podf] = imx_clk_divider("cpu_podf", "pll1_sw", MXC_CCM_CACRR, 0, 3);</div><div class='add'>+	clk[di_pred] = imx_clk_divider("di_pred", "pll3_sw", MXC_CCM_CDCDR, 6, 3);</div><div class='add'>+	clk[tve_di] = imx_clk_fixed("tve_di", 65000000); /* FIXME */</div><div class='add'>+	clk[tve_s] = imx_clk_mux("tve_sel", MXC_CCM_CSCMR1, 7, 1, tve_sel, ARRAY_SIZE(tve_sel));</div><div class='add'>+	clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", MXC_CCM_CCGR0, 30);</div><div class='add'>+	clk[uart1_ipg_gate] = imx_clk_gate2("uart1_ipg_gate", "ipg", MXC_CCM_CCGR1, 6);</div><div class='add'>+	clk[uart1_per_gate] = imx_clk_gate2("uart1_per_gate", "uart_root", MXC_CCM_CCGR1, 8);</div><div class='add'>+	clk[uart2_ipg_gate] = imx_clk_gate2("uart2_ipg_gate", "ipg", MXC_CCM_CCGR1, 10);</div><div class='add'>+	clk[uart2_per_gate] = imx_clk_gate2("uart2_per_gate", "uart_root", MXC_CCM_CCGR1, 12);</div><div class='add'>+	clk[uart3_ipg_gate] = imx_clk_gate2("uart3_ipg_gate", "ipg", MXC_CCM_CCGR1, 14);</div><div class='add'>+	clk[uart3_per_gate] = imx_clk_gate2("uart3_per_gate", "uart_root", MXC_CCM_CCGR1, 16);</div><div class='add'>+	clk[i2c1_gate] = imx_clk_gate2("i2c1_gate", "per_root", MXC_CCM_CCGR1, 18);</div><div class='add'>+	clk[i2c2_gate] = imx_clk_gate2("i2c2_gate", "per_root", MXC_CCM_CCGR1, 20);</div><div class='add'>+	clk[gpt_ipg_gate] = imx_clk_gate2("gpt_ipg_gate", "ipg", MXC_CCM_CCGR2, 20);</div><div class='add'>+	clk[pwm1_ipg_gate] = imx_clk_gate2("pwm1_ipg_gate", "ipg", MXC_CCM_CCGR2, 10);</div><div class='add'>+	clk[pwm1_hf_gate] = imx_clk_gate2("pwm1_hf_gate", "ipg", MXC_CCM_CCGR2, 12);</div><div class='add'>+	clk[pwm2_ipg_gate] = imx_clk_gate2("pwm2_ipg_gate", "ipg", MXC_CCM_CCGR2, 14);</div><div class='add'>+	clk[pwm2_hf_gate] = imx_clk_gate2("pwm2_hf_gate", "ipg", MXC_CCM_CCGR2, 16);</div><div class='add'>+	clk[gpt_gate] = imx_clk_gate2("gpt_gate", "ipg", MXC_CCM_CCGR2, 18);</div><div class='add'>+	clk[fec_gate] = imx_clk_gate2("fec_gate", "ipg", MXC_CCM_CCGR2, 24);</div><div class='add'>+	clk[usboh3_gate] = imx_clk_gate2("usboh3_gate", "ipg", MXC_CCM_CCGR2, 26);</div><div class='add'>+	clk[usboh3_per_gate] = imx_clk_gate2("usboh3_per_gate", "usboh3_podf", MXC_CCM_CCGR2, 28);</div><div class='add'>+	clk[esdhc1_ipg_gate] = imx_clk_gate2("esdhc1_ipg_gate", "ipg", MXC_CCM_CCGR3, 0);</div><div class='add'>+	clk[esdhc2_ipg_gate] = imx_clk_gate2("esdhc2_ipg_gate", "ipg", MXC_CCM_CCGR3, 4);</div><div class='add'>+	clk[esdhc3_ipg_gate] = imx_clk_gate2("esdhc3_ipg_gate", "ipg", MXC_CCM_CCGR3, 8);</div><div class='add'>+	clk[esdhc4_ipg_gate] = imx_clk_gate2("esdhc4_ipg_gate", "ipg", MXC_CCM_CCGR3, 12);</div><div class='add'>+	clk[ssi1_ipg_gate] = imx_clk_gate2("ssi1_ipg_gate", "ipg", MXC_CCM_CCGR3, 16);</div><div class='add'>+	clk[ssi2_ipg_gate] = imx_clk_gate2("ssi2_ipg_gate", "ipg", MXC_CCM_CCGR3, 20);</div><div class='add'>+	clk[ssi3_ipg_gate] = imx_clk_gate2("ssi3_ipg_gate", "ipg", MXC_CCM_CCGR3, 24);</div><div class='add'>+	clk[ecspi1_ipg_gate] = imx_clk_gate2("ecspi1_ipg_gate", "ipg", MXC_CCM_CCGR4, 18);</div><div class='add'>+	clk[ecspi1_per_gate] = imx_clk_gate2("ecspi1_per_gate", "ecspi_podf", MXC_CCM_CCGR4, 20);</div><div class='add'>+	clk[ecspi2_ipg_gate] = imx_clk_gate2("ecspi2_ipg_gate", "ipg", MXC_CCM_CCGR4, 22);</div><div class='add'>+	clk[ecspi2_per_gate] = imx_clk_gate2("ecspi2_per_gate", "ecspi_podf", MXC_CCM_CCGR4, 24);</div><div class='add'>+	clk[cspi_ipg_gate] = imx_clk_gate2("cspi_ipg_gate", "ipg", MXC_CCM_CCGR4, 26);</div><div class='add'>+	clk[sdma_gate] = imx_clk_gate2("sdma_gate", "ipg", MXC_CCM_CCGR4, 30);</div><div class='add'>+	clk[emi_fast_gate] = imx_clk_gate2("emi_fast_gate", "dummy", MXC_CCM_CCGR5, 14);</div><div class='add'>+	clk[emi_slow_gate] = imx_clk_gate2("emi_slow_gate", "emi_slow_podf", MXC_CCM_CCGR5, 16);</div><div class='add'>+	clk[ipu_s] = imx_clk_mux("ipu_sel", MXC_CCM_CBCMR, 6, 2, ipu_sel, ARRAY_SIZE(ipu_sel));</div><div class='add'>+	clk[ipu_gate] = imx_clk_gate2("ipu_gate", "ipu_sel", MXC_CCM_CCGR5, 10);</div><div class='add'>+	clk[nfc_gate] = imx_clk_gate2("nfc_gate", "nfc_podf", MXC_CCM_CCGR5, 20);</div><div class='add'>+	clk[ipu_di0_gate] = imx_clk_gate2("ipu_di0_gate", "ipu_di0_sel", MXC_CCM_CCGR6, 10);</div><div class='add'>+	clk[ipu_di1_gate] = imx_clk_gate2("ipu_di1_gate", "ipu_di1_sel", MXC_CCM_CCGR6, 12);</div><div class='add'>+	clk[vpu_s] = imx_clk_mux("vpu_sel", MXC_CCM_CBCMR, 14, 2, vpu_sel, ARRAY_SIZE(vpu_sel));</div><div class='add'>+	clk[vpu_gate] = imx_clk_gate2("vpu_gate", "vpu_sel", MXC_CCM_CCGR5, 6);</div><div class='add'>+	clk[vpu_reference_gate] = imx_clk_gate2("vpu_reference_gate", "osc", MXC_CCM_CCGR5, 8);</div><div class='add'>+	clk[uart4_ipg_gate] = imx_clk_gate2("uart4_ipg_gate", "ipg", MXC_CCM_CCGR7, 8);</div><div class='add'>+	clk[uart4_per_gate] = imx_clk_gate2("uart4_per_gate", "uart_root", MXC_CCM_CCGR7, 10);</div><div class='add'>+	clk[uart5_ipg_gate] = imx_clk_gate2("uart5_ipg_gate", "ipg", MXC_CCM_CCGR7, 12);</div><div class='add'>+	clk[uart5_per_gate] = imx_clk_gate2("uart5_per_gate", "uart_root", MXC_CCM_CCGR7, 14);</div><div class='add'>+	clk[gpc_dvfs] = imx_clk_gate2("gpc_dvfs", "dummy", MXC_CCM_CCGR5, 24);</div><div class='add'>+</div><div class='add'>+	clk[ssi_apm] = imx_clk_mux("ssi_apm", MXC_CCM_CSCMR1, 8, 2, ssi_apm_sels, ARRAY_SIZE(ssi_apm_sels));</div><div class='add'>+	clk[ssi1_root_sel] = imx_clk_mux("ssi1_root_sel", MXC_CCM_CSCMR1, 14, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));</div><div class='add'>+	clk[ssi2_root_sel] = imx_clk_mux("ssi2_root_sel", MXC_CCM_CSCMR1, 12, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));</div><div class='add'>+	clk[ssi3_root_sel] = imx_clk_mux("ssi3_root_sel", MXC_CCM_CSCMR1, 11, 1, ssi3_clk_sels, ARRAY_SIZE(ssi3_clk_sels));</div><div class='add'>+	clk[ssi_ext1_sel] = imx_clk_mux("ssi_ext1_sel", MXC_CCM_CSCMR1, 28, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));</div><div class='add'>+	clk[ssi_ext2_sel] = imx_clk_mux("ssi_ext2_sel", MXC_CCM_CSCMR1, 30, 2, ssi_clk_sels, ARRAY_SIZE(ssi_clk_sels));</div><div class='add'>+	clk[ssi_ext1_com_sel] = imx_clk_mux("ssi_ext1_com_sel", MXC_CCM_CSCMR1, 0, 1, ssi_ext1_com_sels, ARRAY_SIZE(ssi_ext1_com_sels));</div><div class='add'>+	clk[ssi_ext2_com_sel] = imx_clk_mux("ssi_ext2_com_sel", MXC_CCM_CSCMR1, 1, 1, ssi_ext2_com_sels, ARRAY_SIZE(ssi_ext2_com_sels));</div><div class='add'>+	clk[ssi1_root_pred] = imx_clk_divider("ssi1_root_pred", "ssi1_root_sel", MXC_CCM_CS1CDR, 6, 3);</div><div class='add'>+	clk[ssi1_root_podf] = imx_clk_divider("ssi1_root_podf", "ssi1_root_pred", MXC_CCM_CS1CDR, 0, 6);</div><div class='add'>+	clk[ssi2_root_pred] = imx_clk_divider("ssi2_root_pred", "ssi2_root_sel", MXC_CCM_CS2CDR, 6, 3);</div><div class='add'>+	clk[ssi2_root_podf] = imx_clk_divider("ssi2_root_podf", "ssi2_root_pred", MXC_CCM_CS2CDR, 0, 6);</div><div class='add'>+	clk[ssi_ext1_pred] = imx_clk_divider("ssi_ext1_pred", "ssi_ext1_sel", MXC_CCM_CS1CDR, 22, 3);</div><div class='add'>+	clk[ssi_ext1_podf] = imx_clk_divider("ssi_ext1_podf", "ssi_ext1_pred", MXC_CCM_CS1CDR, 16, 6);</div><div class='add'>+	clk[ssi_ext2_pred] = imx_clk_divider("ssi_ext2_pred", "ssi_ext2_sel", MXC_CCM_CS2CDR, 22, 3);</div><div class='add'>+	clk[ssi_ext2_podf] = imx_clk_divider("ssi_ext2_podf", "ssi_ext2_pred", MXC_CCM_CS2CDR, 16, 6);</div><div class='add'>+	clk[ssi1_root_gate] = imx_clk_gate2("ssi1_root_gate", "ssi1_root_podf", MXC_CCM_CCGR3, 18);</div><div class='add'>+	clk[ssi2_root_gate] = imx_clk_gate2("ssi2_root_gate", "ssi2_root_podf", MXC_CCM_CCGR3, 22);</div><div class='add'>+	clk[ssi3_root_gate] = imx_clk_gate2("ssi3_root_gate", "ssi3_root_sel", MXC_CCM_CCGR3, 26);</div><div class='add'>+	clk[ssi_ext1_gate] = imx_clk_gate2("ssi_ext1_gate", "ssi_ext1_com_sel", MXC_CCM_CCGR3, 28);</div><div class='add'>+	clk[ssi_ext2_gate] = imx_clk_gate2("ssi_ext2_gate", "ssi_ext2_com_sel", MXC_CCM_CCGR3, 30);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clk); i++)</div><div class='add'>+		if (IS_ERR(clk[i]))</div><div class='add'>+			pr_err("i.MX5 clk %d: register failed with %ld\n",</div><div class='add'>+				i, PTR_ERR(clk[i]));</div><div class='add'>+	</div><div class='add'>+	clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[gpt_ipg_gate], "ipg", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[uart1_per_gate], "per", "imx21-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[uart1_ipg_gate], "ipg", "imx21-uart.0");</div><div class='add'>+	clk_register_clkdev(clk[uart2_per_gate], "per", "imx21-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[uart2_ipg_gate], "ipg", "imx21-uart.1");</div><div class='add'>+	clk_register_clkdev(clk[uart3_per_gate], "per", "imx21-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[uart3_ipg_gate], "ipg", "imx21-uart.2");</div><div class='add'>+	clk_register_clkdev(clk[uart4_per_gate], "per", "imx21-uart.3");</div><div class='add'>+	clk_register_clkdev(clk[uart4_ipg_gate], "ipg", "imx21-uart.3");</div><div class='add'>+	clk_register_clkdev(clk[uart5_per_gate], "per", "imx21-uart.4");</div><div class='add'>+	clk_register_clkdev(clk[uart5_ipg_gate], "ipg", "imx21-uart.4");</div><div class='add'>+	clk_register_clkdev(clk[ecspi1_per_gate], "per", "imx51-ecspi.0");</div><div class='add'>+	clk_register_clkdev(clk[ecspi1_ipg_gate], "ipg", "imx51-ecspi.0");</div><div class='add'>+	clk_register_clkdev(clk[ecspi2_per_gate], "per", "imx51-ecspi.1");</div><div class='add'>+	clk_register_clkdev(clk[ecspi2_ipg_gate], "ipg", "imx51-ecspi.1");</div><div class='add'>+	clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx51-cspi.0");</div><div class='add'>+	clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0");</div><div class='add'>+	clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1");</div><div class='add'>+	clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");</div><div class='add'>+	clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");</div><div class='add'>+	clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.1");</div><div class='add'>+	clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.2");</div><div class='add'>+	clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc");</div><div class='add'>+	clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand");</div><div class='add'>+	clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");</div><div class='add'>+	clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");</div><div class='add'>+	clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");</div><div class='add'>+	clk_register_clkdev(clk[ssi_ext1_gate], "ssi_ext1", NULL);</div><div class='add'>+	clk_register_clkdev(clk[ssi_ext2_gate], "ssi_ext2", NULL);</div><div class='add'>+	clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");</div><div class='add'>+	clk_register_clkdev(clk[cpu_podf], "cpu", NULL);</div><div class='add'>+	clk_register_clkdev(clk[iim_gate], "iim", NULL);</div><div class='add'>+	clk_register_clkdev(clk[dummy], NULL, "imx2-wdt.0");</div><div class='add'>+	clk_register_clkdev(clk[dummy], NULL, "imx2-wdt.1");</div><div class='add'>+	clk_register_clkdev(clk[dummy], NULL, "imx-keypad");</div><div class='add'>+	clk_register_clkdev(clk[tve_gate], NULL, "imx-tve.0");</div><div class='add'>+	clk_register_clkdev(clk[ipu_di1_gate], "di1", "imx-tve.0");</div><div class='add'>+</div><div class='add'>+	/* Set SDHC parents to be PLL2 */</div><div class='add'>+	clk_set_parent(clk[esdhc_a_sel], clk[pll2_sw]);</div><div class='add'>+	clk_set_parent(clk[esdhc_b_sel], clk[pll2_sw]);</div><div class='add'>+</div><div class='add'>+	/* move usb phy clk to 24MHz */</div><div class='add'>+	clk_set_parent(clk[usb_phy_sel], clk[osc]);</div><div class='add'>+</div><div class='add'>+	clk_prepare_enable(clk[gpc_dvfs]);</div><div class='add'>+	clk_prepare_enable(clk[ahb_max]); /* esdhc3 */</div><div class='add'>+	clk_prepare_enable(clk[aips_tz1]);</div><div class='add'>+	clk_prepare_enable(clk[aips_tz2]); /* fec */</div><div class='add'>+	clk_prepare_enable(clk[spba]);</div><div class='add'>+	clk_prepare_enable(clk[emi_fast_gate]); /* fec */</div><div class='add'>+	clk_prepare_enable(clk[tmax1]);</div><div class='add'>+	clk_prepare_enable(clk[tmax2]); /* esdhc2, fec */</div><div class='add'>+	clk_prepare_enable(clk[tmax3]); /* esdhc1, esdhc4 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,</div><div class='add'>+			unsigned long rate_ckih1, unsigned long rate_ckih2)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX51_DPLL1_BASE);</div><div class='add'>+	clk[pll2_sw] = imx_clk_pllv2("pll2_sw", "osc", MX51_DPLL2_BASE);</div><div class='add'>+	clk[pll3_sw] = imx_clk_pllv2("pll3_sw", "osc", MX51_DPLL3_BASE);</div><div class='add'>+	clk[ipu_di0_sel] = imx_clk_mux("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,</div><div class='add'>+				mx51_ipu_di0_sel, ARRAY_SIZE(mx51_ipu_di0_sel));</div><div class='add'>+	clk[ipu_di1_sel] = imx_clk_mux("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,</div><div class='add'>+				mx51_ipu_di1_sel, ARRAY_SIZE(mx51_ipu_di1_sel));</div><div class='add'>+	clk[tve_ext_sel] = imx_clk_mux("tve_ext_sel", MXC_CCM_CSCMR1, 6, 1,</div><div class='add'>+				mx51_tve_ext_sel, ARRAY_SIZE(mx51_tve_ext_sel));</div><div class='add'>+	clk[tve_gate] = imx_clk_gate2("tve_gate", "tve_sel", MXC_CCM_CCGR2, 30);</div><div class='add'>+	clk[tve_pred] = imx_clk_divider("tve_pred", "pll3_sw", MXC_CCM_CDCDR, 28, 3);</div><div class='add'>+	clk[esdhc1_per_gate] = imx_clk_gate2("esdhc1_per_gate", "esdhc_a_podf", MXC_CCM_CCGR3, 2);</div><div class='add'>+	clk[esdhc2_per_gate] = imx_clk_gate2("esdhc2_per_gate", "esdhc_b_podf", MXC_CCM_CCGR3, 6);</div><div class='add'>+	clk[esdhc3_per_gate] = imx_clk_gate2("esdhc3_per_gate", "esdhc_c_sel", MXC_CCM_CCGR3, 10);</div><div class='add'>+	clk[esdhc4_per_gate] = imx_clk_gate2("esdhc4_per_gate", "esdhc_d_sel", MXC_CCM_CCGR3, 14);</div><div class='add'>+	clk[usb_phy_gate] = imx_clk_gate2("usb_phy_gate", "usb_phy_sel", MXC_CCM_CCGR2, 0);</div><div class='add'>+	clk[hsi2c_gate] = imx_clk_gate2("hsi2c_gate", "ipg", MXC_CCM_CCGR1, 22);</div><div class='add'>+	clk[mipi_hsc1_gate] = imx_clk_gate2("mipi_hsc1_gate", "ipg", MXC_CCM_CCGR4, 6);</div><div class='add'>+	clk[mipi_hsc2_gate] = imx_clk_gate2("mipi_hsc2_gate", "ipg", MXC_CCM_CCGR4, 8);</div><div class='add'>+	clk[mipi_esc_gate] = imx_clk_gate2("mipi_esc_gate", "ipg", MXC_CCM_CCGR4, 10);</div><div class='add'>+	clk[mipi_hsp_gate] = imx_clk_gate2("mipi_hsp_gate", "ipg", MXC_CCM_CCGR4, 12);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clk); i++)</div><div class='add'>+		if (IS_ERR(clk[i]))</div><div class='add'>+			pr_err("i.MX51 clk %d: register failed with %ld\n",</div><div class='add'>+				i, PTR_ERR(clk[i]));</div><div class='add'>+</div><div class='add'>+	mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);</div><div class='add'>+</div><div class='add'>+	clk_register_clkdev(clk[hsi2c_gate], NULL, "imx-i2c.2");</div><div class='add'>+	clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL);</div><div class='add'>+	clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0");</div><div class='add'>+	clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");</div><div class='add'>+	clk_register_clkdev(clk[gpc_dvfs], "gpc_dvfs", NULL);</div><div class='add'>+	clk_register_clkdev(clk[ipu_gate], "bus", "imx51-ipu");</div><div class='add'>+	clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx51-ipu");</div><div class='add'>+	clk_register_clkdev(clk[ipu_di1_gate], "di1", "imx51-ipu");</div><div class='add'>+	clk_register_clkdev(clk[ipu_gate], "hsp", "imx51-ipu");</div><div class='add'>+	clk_register_clkdev(clk[usb_phy_gate], "phy", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[esdhc1_ipg_gate], "ipg", "sdhci-esdhc-imx51.0");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.0");</div><div class='add'>+	clk_register_clkdev(clk[esdhc1_per_gate], "per", "sdhci-esdhc-imx51.0");</div><div class='add'>+	clk_register_clkdev(clk[esdhc2_ipg_gate], "ipg", "sdhci-esdhc-imx51.1");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.1");</div><div class='add'>+	clk_register_clkdev(clk[esdhc2_per_gate], "per", "sdhci-esdhc-imx51.1");</div><div class='add'>+	clk_register_clkdev(clk[esdhc3_ipg_gate], "ipg", "sdhci-esdhc-imx51.2");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.2");</div><div class='add'>+	clk_register_clkdev(clk[esdhc3_per_gate], "per", "sdhci-esdhc-imx51.2");</div><div class='add'>+	clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx51.3");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx51.3");</div><div class='add'>+	clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx51.3");</div><div class='add'>+	clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "83fcc000.ssi");</div><div class='add'>+	clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "70014000.ssi");</div><div class='add'>+	clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "83fe8000.ssi");</div><div class='add'>+</div><div class='add'>+	/* set the usboh3 parent to pll2_sw */</div><div class='add'>+	clk_set_parent(clk[usboh3_sel], clk[pll2_sw]);</div><div class='add'>+</div><div class='add'>+	/* set SDHC root clock to 166.25MHZ*/</div><div class='add'>+	clk_set_rate(clk[esdhc_a_podf], 166250000);</div><div class='add'>+	clk_set_rate(clk[esdhc_b_podf], 166250000);</div><div class='add'>+</div><div class='add'>+	/* System timer */</div><div class='add'>+	mxc_timer_init(NULL, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR),</div><div class='add'>+		MX51_INT_GPT);</div><div class='add'>+</div><div class='add'>+	clk_prepare_enable(clk[iim_gate]);</div><div class='add'>+	imx_print_silicon_rev("i.MX51", mx51_revision());</div><div class='add'>+	clk_disable_unprepare(clk[iim_gate]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,</div><div class='add'>+			unsigned long rate_ckih1, unsigned long rate_ckih2)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	unsigned long r;</div><div class='add'>+</div><div class='add'>+	clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE);</div><div class='add'>+	clk[pll2_sw] = imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE);</div><div class='add'>+	clk[pll3_sw] = imx_clk_pllv2("pll3_sw", "osc", MX53_DPLL3_BASE);</div><div class='add'>+	clk[pll4_sw] = imx_clk_pllv2("pll4_sw", "osc", MX53_DPLL4_BASE);</div><div class='add'>+</div><div class='add'>+	clk[ldb_di1_sel] = imx_clk_mux("ldb_di1_sel", MXC_CCM_CSCMR2, 9, 1,</div><div class='add'>+				mx53_ldb_di1_sel, ARRAY_SIZE(mx53_ldb_di1_sel));</div><div class='add'>+	clk[ldb_di1_div_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);</div><div class='add'>+	clk[ldb_di1_div] = imx_clk_divider("ldb_di1_div", "ldb_di1_div_3_5", MXC_CCM_CSCMR2, 11, 1);</div><div class='add'>+	clk[di_pll4_podf] = imx_clk_divider("di_pll4_podf", "pll4_sw", MXC_CCM_CDCDR, 16, 3);</div><div class='add'>+	clk[ldb_di0_sel] = imx_clk_mux("ldb_di0_sel", MXC_CCM_CSCMR2, 8, 1,</div><div class='add'>+				mx53_ldb_di0_sel, ARRAY_SIZE(mx53_ldb_di0_sel));</div><div class='add'>+	clk[ldb_di0_div_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);</div><div class='add'>+	clk[ldb_di0_div] = imx_clk_divider("ldb_di0_div", "ldb_di0_div_3_5", MXC_CCM_CSCMR2, 10, 1);</div><div class='add'>+	clk[ldb_di0_gate] = imx_clk_gate2("ldb_di0_gate", "ldb_di0_div", MXC_CCM_CCGR6, 28);</div><div class='add'>+	clk[ldb_di1_gate] = imx_clk_gate2("ldb_di1_gate", "ldb_di1_div", MXC_CCM_CCGR6, 30);</div><div class='add'>+	clk[ipu_di0_sel] = imx_clk_mux("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,</div><div class='add'>+				mx53_ipu_di0_sel, ARRAY_SIZE(mx53_ipu_di0_sel));</div><div class='add'>+	clk[ipu_di1_sel] = imx_clk_mux("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,</div><div class='add'>+				mx53_ipu_di1_sel, ARRAY_SIZE(mx53_ipu_di1_sel));</div><div class='add'>+	clk[tve_ext_sel] = imx_clk_mux("tve_ext_sel", MXC_CCM_CSCMR1, 6, 1,</div><div class='add'>+				mx53_tve_ext_sel, ARRAY_SIZE(mx53_tve_ext_sel));</div><div class='add'>+	clk[tve_gate] = imx_clk_gate2("tve_gate", "tve_pred", MXC_CCM_CCGR2, 30);</div><div class='add'>+	clk[tve_pred] = imx_clk_divider("tve_pred", "tve_ext_sel", MXC_CCM_CDCDR, 28, 3);</div><div class='add'>+	clk[esdhc1_per_gate] = imx_clk_gate2("esdhc1_per_gate", "esdhc_a_podf", MXC_CCM_CCGR3, 2);</div><div class='add'>+	clk[esdhc2_per_gate] = imx_clk_gate2("esdhc2_per_gate", "esdhc_c_sel", MXC_CCM_CCGR3, 6);</div><div class='add'>+	clk[esdhc3_per_gate] = imx_clk_gate2("esdhc3_per_gate", "esdhc_b_podf", MXC_CCM_CCGR3, 10);</div><div class='add'>+	clk[esdhc4_per_gate] = imx_clk_gate2("esdhc4_per_gate", "esdhc_d_sel", MXC_CCM_CCGR3, 14);</div><div class='add'>+	clk[usb_phy1_gate] = imx_clk_gate2("usb_phy1_gate", "usb_phy_sel", MXC_CCM_CCGR4, 10);</div><div class='add'>+	clk[usb_phy2_gate] = imx_clk_gate2("usb_phy2_gate", "usb_phy_sel", MXC_CCM_CCGR4, 12);</div><div class='add'>+	clk[can2_serial_gate] = imx_clk_gate2("can2_serial_gate", "ipg", MXC_CCM_CCGR4, 6);</div><div class='add'>+	clk[can2_ipg_gate] = imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 8);</div><div class='add'>+	clk[i2c3_gate] = imx_clk_gate2("i2c3_gate", "per_root", MXC_CCM_CCGR1, 22);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clk); i++)</div><div class='add'>+		if (IS_ERR(clk[i]))</div><div class='add'>+			pr_err("i.MX53 clk %d: register failed with %ld\n",</div><div class='add'>+				i, PTR_ERR(clk[i]));</div><div class='add'>+</div><div class='add'>+	mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);</div><div class='add'>+</div><div class='add'>+	clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0");</div><div class='add'>+	clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");</div><div class='add'>+	clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0");</div><div class='add'>+	clk_register_clkdev(clk[ipu_gate], "bus", "imx53-ipu");</div><div class='add'>+	clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx53-ipu");</div><div class='add'>+	clk_register_clkdev(clk[ipu_di1_gate], "di1", "imx53-ipu");</div><div class='add'>+	clk_register_clkdev(clk[ipu_gate], "hsp", "imx53-ipu");</div><div class='add'>+	clk_register_clkdev(clk[usb_phy1_gate], "usb_phy1", "mxc-ehci.0");</div><div class='add'>+	clk_register_clkdev(clk[esdhc1_ipg_gate], "ipg", "sdhci-esdhc-imx53.0");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.0");</div><div class='add'>+	clk_register_clkdev(clk[esdhc1_per_gate], "per", "sdhci-esdhc-imx53.0");</div><div class='add'>+	clk_register_clkdev(clk[esdhc2_ipg_gate], "ipg", "sdhci-esdhc-imx53.1");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.1");</div><div class='add'>+	clk_register_clkdev(clk[esdhc2_per_gate], "per", "sdhci-esdhc-imx53.1");</div><div class='add'>+	clk_register_clkdev(clk[esdhc3_ipg_gate], "ipg", "sdhci-esdhc-imx53.2");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.2");</div><div class='add'>+	clk_register_clkdev(clk[esdhc3_per_gate], "per", "sdhci-esdhc-imx53.2");</div><div class='add'>+	clk_register_clkdev(clk[esdhc4_ipg_gate], "ipg", "sdhci-esdhc-imx53.3");</div><div class='add'>+	clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.3");</div><div class='add'>+	clk_register_clkdev(clk[esdhc4_per_gate], "per", "sdhci-esdhc-imx53.3");</div><div class='add'>+	clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi");</div><div class='add'>+	clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi");</div><div class='add'>+	clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi");</div><div class='add'>+</div><div class='add'>+	/* set SDHC root clock to 200MHZ*/</div><div class='add'>+	clk_set_rate(clk[esdhc_a_podf], 200000000);</div><div class='add'>+	clk_set_rate(clk[esdhc_b_podf], 200000000);</div><div class='add'>+</div><div class='add'>+	/* System timer */</div><div class='add'>+	mxc_timer_init(NULL, MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR),</div><div class='add'>+		MX53_INT_GPT);</div><div class='add'>+</div><div class='add'>+	clk_prepare_enable(clk[iim_gate]);</div><div class='add'>+	imx_print_silicon_rev("i.MX53", mx53_revision());</div><div class='add'>+	clk_disable_unprepare(clk[iim_gate]);</div><div class='add'>+</div><div class='add'>+	r = clk_round_rate(clk[usboh3_per_gate], 54000000);</div><div class='add'>+	clk_set_rate(clk[usboh3_per_gate], r);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc,</div><div class='add'>+				   unsigned long *ckih1, unsigned long *ckih2)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np;</div><div class='add'>+</div><div class='add'>+	/* retrieve the freqency of fixed clocks from device tree */</div><div class='add'>+	for_each_compatible_node(np, NULL, "fixed-clock") {</div><div class='add'>+		u32 rate;</div><div class='add'>+		if (of_property_read_u32(np, "clock-frequency", &amp;rate))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (of_device_is_compatible(np, "fsl,imx-ckil"))</div><div class='add'>+			*ckil = rate;</div><div class='add'>+		else if (of_device_is_compatible(np, "fsl,imx-osc"))</div><div class='add'>+			*osc = rate;</div><div class='add'>+		else if (of_device_is_compatible(np, "fsl,imx-ckih1"))</div><div class='add'>+			*ckih1 = rate;</div><div class='add'>+		else if (of_device_is_compatible(np, "fsl,imx-ckih2"))</div><div class='add'>+			*ckih2 = rate;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init mx51_clocks_init_dt(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long ckil, osc, ckih1, ckih2;</div><div class='add'>+</div><div class='add'>+	clk_get_freq_dt(&amp;ckil, &amp;osc, &amp;ckih1, &amp;ckih2);</div><div class='add'>+	return mx51_clocks_init(ckil, osc, ckih1, ckih2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init mx53_clocks_init_dt(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long ckil, osc, ckih1, ckih2;</div><div class='add'>+</div><div class='add'>+	clk_get_freq_dt(&amp;ckil, &amp;osc, &amp;ckih1, &amp;ckih2);</div><div class='add'>+	return mx53_clocks_init(ckil, osc, ckih1, ckih2);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c<br/>new file mode 100644<br/>index 000000000000..cab02d0a15d6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-imx6q.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-imx6q.c</a></div><div class='hunk'>@@ -0,0 +1,444 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2011 Linaro Ltd.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+#define CCGR0				0x68</div><div class='add'>+#define CCGR1				0x6c</div><div class='add'>+#define CCGR2				0x70</div><div class='add'>+#define CCGR3				0x74</div><div class='add'>+#define CCGR4				0x78</div><div class='add'>+#define CCGR5				0x7c</div><div class='add'>+#define CCGR6				0x80</div><div class='add'>+#define CCGR7				0x84</div><div class='add'>+</div><div class='add'>+#define CLPCR				0x54</div><div class='add'>+#define BP_CLPCR_LPM			0</div><div class='add'>+#define BM_CLPCR_LPM			(0x3 &lt;&lt; 0)</div><div class='add'>+#define BM_CLPCR_BYPASS_PMIC_READY	(0x1 &lt;&lt; 2)</div><div class='add'>+#define BM_CLPCR_ARM_CLK_DIS_ON_LPM	(0x1 &lt;&lt; 5)</div><div class='add'>+#define BM_CLPCR_SBYOS			(0x1 &lt;&lt; 6)</div><div class='add'>+#define BM_CLPCR_DIS_REF_OSC		(0x1 &lt;&lt; 7)</div><div class='add'>+#define BM_CLPCR_VSTBY			(0x1 &lt;&lt; 8)</div><div class='add'>+#define BP_CLPCR_STBY_COUNT		9</div><div class='add'>+#define BM_CLPCR_STBY_COUNT		(0x3 &lt;&lt; 9)</div><div class='add'>+#define BM_CLPCR_COSC_PWRDOWN		(0x1 &lt;&lt; 11)</div><div class='add'>+#define BM_CLPCR_WB_PER_AT_LPM		(0x1 &lt;&lt; 16)</div><div class='add'>+#define BM_CLPCR_WB_CORE_AT_LPM		(0x1 &lt;&lt; 17)</div><div class='add'>+#define BM_CLPCR_BYP_MMDC_CH0_LPM_HS	(0x1 &lt;&lt; 19)</div><div class='add'>+#define BM_CLPCR_BYP_MMDC_CH1_LPM_HS	(0x1 &lt;&lt; 21)</div><div class='add'>+#define BM_CLPCR_MASK_CORE0_WFI		(0x1 &lt;&lt; 22)</div><div class='add'>+#define BM_CLPCR_MASK_CORE1_WFI		(0x1 &lt;&lt; 23)</div><div class='add'>+#define BM_CLPCR_MASK_CORE2_WFI		(0x1 &lt;&lt; 24)</div><div class='add'>+#define BM_CLPCR_MASK_CORE3_WFI		(0x1 &lt;&lt; 25)</div><div class='add'>+#define BM_CLPCR_MASK_SCU_IDLE		(0x1 &lt;&lt; 26)</div><div class='add'>+#define BM_CLPCR_MASK_L2CC_IDLE		(0x1 &lt;&lt; 27)</div><div class='add'>+</div><div class='add'>+static void __iomem *ccm_base;</div><div class='add'>+</div><div class='add'>+void __init imx6q_clock_map_io(void) { }</div><div class='add'>+</div><div class='add'>+int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)</div><div class='add'>+{</div><div class='add'>+	u32 val = readl_relaxed(ccm_base + CLPCR);</div><div class='add'>+</div><div class='add'>+	val &amp;= ~BM_CLPCR_LPM;</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case WAIT_CLOCKED:</div><div class='add'>+		break;</div><div class='add'>+	case WAIT_UNCLOCKED:</div><div class='add'>+		val |= 0x1 &lt;&lt; BP_CLPCR_LPM;</div><div class='add'>+		break;</div><div class='add'>+	case STOP_POWER_ON:</div><div class='add'>+		val |= 0x2 &lt;&lt; BP_CLPCR_LPM;</div><div class='add'>+		break;</div><div class='add'>+	case WAIT_UNCLOCKED_POWER_OFF:</div><div class='add'>+		val |= 0x1 &lt;&lt; BP_CLPCR_LPM;</div><div class='add'>+		val &amp;= ~BM_CLPCR_VSTBY;</div><div class='add'>+		val &amp;= ~BM_CLPCR_SBYOS;</div><div class='add'>+		break;</div><div class='add'>+	case STOP_POWER_OFF:</div><div class='add'>+		val |= 0x2 &lt;&lt; BP_CLPCR_LPM;</div><div class='add'>+		val |= 0x3 &lt;&lt; BP_CLPCR_STBY_COUNT;</div><div class='add'>+		val |= BM_CLPCR_VSTBY;</div><div class='add'>+		val |= BM_CLPCR_SBYOS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel_relaxed(val, ccm_base + CLPCR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *step_sels[]	= { "osc", "pll2_pfd2_396m", };</div><div class='add'>+static const char *pll1_sw_sels[]	= { "pll1_sys", "step", };</div><div class='add'>+static const char *periph_pre_sels[]	= { "pll2_bus", "pll2_pfd2_396m", "pll2_pfd0_352m", "pll2_198m", };</div><div class='add'>+static const char *periph_clk2_sels[]	= { "pll3_usb_otg", "osc", };</div><div class='add'>+static const char *periph_sels[]	= { "periph_pre", "periph_clk2", };</div><div class='add'>+static const char *periph2_sels[]	= { "periph2_pre", "periph2_clk2", };</div><div class='add'>+static const char *axi_sels[]		= { "periph", "pll2_pfd2_396m", "pll3_pfd1_540m", };</div><div class='add'>+static const char *audio_sels[]	= { "pll4_audio", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", };</div><div class='add'>+static const char *gpu_axi_sels[]	= { "axi", "ahb", };</div><div class='add'>+static const char *gpu2d_core_sels[]	= { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };</div><div class='add'>+static const char *gpu3d_core_sels[]	= { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };</div><div class='add'>+static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", };</div><div class='add'>+static const char *ipu_sels[]		= { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };</div><div class='add'>+static const char *ldb_di_sels[]	= { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };</div><div class='add'>+static const char *ipu_di_pre_sels[]	= { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };</div><div class='add'>+static const char *ipu1_di0_sels[]	= { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };</div><div class='add'>+static const char *ipu1_di1_sels[]	= { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };</div><div class='add'>+static const char *ipu2_di0_sels[]	= { "ipu2_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };</div><div class='add'>+static const char *ipu2_di1_sels[]	= { "ipu2_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };</div><div class='add'>+static const char *hsi_tx_sels[]	= { "pll3_120m", "pll2_pfd2_396m", };</div><div class='add'>+static const char *pcie_axi_sels[]	= { "axi", "ahb", };</div><div class='add'>+static const char *ssi_sels[]		= { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_audio", };</div><div class='add'>+static const char *usdhc_sels[]	= { "pll2_pfd2_396m", "pll2_pfd0_352m", };</div><div class='add'>+static const char *enfc_sels[]	= { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };</div><div class='add'>+static const char *emi_sels[]		= { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", };</div><div class='add'>+static const char *vdo_axi_sels[]	= { "axi", "ahb", };</div><div class='add'>+static const char *vpu_axi_sels[]	= { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", };</div><div class='add'>+static const char *cko1_sels[]	= { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video",</div><div class='add'>+				    "dummy", "axi", "enfc", "ipu1_di0", "ipu1_di1", "ipu2_di0",</div><div class='add'>+				    "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio", };</div><div class='add'>+</div><div class='add'>+static const char * const clks_init_on[] __initconst = {</div><div class='add'>+	"mmdc_ch0_axi", "mmdc_ch1_axi", "usboh3",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mx6q_clks {</div><div class='add'>+	dummy, ckil, ckih, osc, pll2_pfd0_352m, pll2_pfd1_594m, pll2_pfd2_396m,</div><div class='add'>+	pll3_pfd0_720m, pll3_pfd1_540m, pll3_pfd2_508m, pll3_pfd3_454m,</div><div class='add'>+	pll2_198m, pll3_120m, pll3_80m, pll3_60m, twd, step, pll1_sw,</div><div class='add'>+	periph_pre, periph2_pre, periph_clk2_sel, periph2_clk2_sel, axi_sel,</div><div class='add'>+	esai_sel, asrc_sel, spdif_sel, gpu2d_axi, gpu3d_axi, gpu2d_core_sel,</div><div class='add'>+	gpu3d_core_sel, gpu3d_shader_sel, ipu1_sel, ipu2_sel, ldb_di0_sel,</div><div class='add'>+	ldb_di1_sel, ipu1_di0_pre_sel, ipu1_di1_pre_sel, ipu2_di0_pre_sel,</div><div class='add'>+	ipu2_di1_pre_sel, ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel,</div><div class='add'>+	ipu2_di1_sel, hsi_tx_sel, pcie_axi_sel, ssi1_sel, ssi2_sel, ssi3_sel,</div><div class='add'>+	usdhc1_sel, usdhc2_sel, usdhc3_sel, usdhc4_sel, enfc_sel, emi_sel,</div><div class='add'>+	emi_slow_sel, vdo_axi_sel, vpu_axi_sel, cko1_sel, periph, periph2,</div><div class='add'>+	periph_clk2, periph2_clk2, ipg, ipg_per, esai_pred, esai_podf,</div><div class='add'>+	asrc_pred, asrc_podf, spdif_pred, spdif_podf, can_root, ecspi_root,</div><div class='add'>+	gpu2d_core_podf, gpu3d_core_podf, gpu3d_shader, ipu1_podf, ipu2_podf,</div><div class='add'>+	ldb_di0_podf, ldb_di1_podf, ipu1_di0_pre, ipu1_di1_pre, ipu2_di0_pre,</div><div class='add'>+	ipu2_di1_pre, hsi_tx_podf, ssi1_pred, ssi1_podf, ssi2_pred, ssi2_podf,</div><div class='add'>+	ssi3_pred, ssi3_podf, uart_serial_podf, usdhc1_podf, usdhc2_podf,</div><div class='add'>+	usdhc3_podf, usdhc4_podf, enfc_pred, enfc_podf, emi_podf,</div><div class='add'>+	emi_slow_podf, vpu_axi_podf, cko1_podf, axi, mmdc_ch0_axi_podf,</div><div class='add'>+	mmdc_ch1_axi_podf, arm, ahb, apbh_dma, asrc, can1_ipg, can1_serial,</div><div class='add'>+	can2_ipg, can2_serial, ecspi1, ecspi2, ecspi3, ecspi4, ecspi5, enet,</div><div class='add'>+	esai, gpt_ipg, gpt_ipg_per, gpu2d_core, gpu3d_core, hdmi_iahb,</div><div class='add'>+	hdmi_isfr, i2c1, i2c2, i2c3, iim, enfc, ipu1, ipu1_di0, ipu1_di1, ipu2,</div><div class='add'>+	ipu2_di0, ldb_di0, ldb_di1, ipu2_di1, hsi_tx, mlb, mmdc_ch0_axi,</div><div class='add'>+	mmdc_ch1_axi, ocram, openvg_axi, pcie_axi, pwm1, pwm2, pwm3, pwm4,</div><div class='add'>+	gpmi_bch_apb, gpmi_bch, gpmi_io, gpmi_apb, sata, sdma, spba, ssi1,</div><div class='add'>+	ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,</div><div class='add'>+	usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,</div><div class='add'>+	pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,</div><div class='add'>+	ssi2_ipg, ssi3_ipg, clk_max</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *clk[clk_max];</div><div class='add'>+</div><div class='add'>+int __init mx6q_clocks_init(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	struct clk *c;</div><div class='add'>+	int i, irq;</div><div class='add'>+</div><div class='add'>+	clk[dummy] = imx_clk_fixed("dummy", 0);</div><div class='add'>+</div><div class='add'>+	/* retrieve the freqency of fixed clocks from device tree */</div><div class='add'>+	for_each_compatible_node(np, NULL, "fixed-clock") {</div><div class='add'>+		u32 rate;</div><div class='add'>+		if (of_property_read_u32(np, "clock-frequency", &amp;rate))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (of_device_is_compatible(np, "fsl,imx-ckil"))</div><div class='add'>+			clk[ckil] = imx_clk_fixed("ckil", rate);</div><div class='add'>+		else if (of_device_is_compatible(np, "fsl,imx-ckih1"))</div><div class='add'>+			clk[ckih] = imx_clk_fixed("ckih", rate);</div><div class='add'>+		else if (of_device_is_compatible(np, "fsl,imx-osc"))</div><div class='add'>+			clk[osc] = imx_clk_fixed("osc", rate);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");</div><div class='add'>+	base = of_iomap(np, 0);</div><div class='add'>+	WARN_ON(!base);</div><div class='add'>+</div><div class='add'>+	/*                   type                               name         parent_name  base     gate_mask div_mask */</div><div class='add'>+	clk[pll1_sys]      = imx_clk_pllv3(IMX_PLLV3_SYS,	"pll1_sys",	"osc", base,        0x2000,   0x7f);</div><div class='add'>+	clk[pll2_bus]      = imx_clk_pllv3(IMX_PLLV3_GENERIC,	"pll2_bus",	"osc", base + 0x30, 0x2000,   0x1);</div><div class='add'>+	clk[pll3_usb_otg]  = imx_clk_pllv3(IMX_PLLV3_USB,	"pll3_usb_otg",	"osc", base + 0x10, 0x2000,   0x3);</div><div class='add'>+	clk[pll4_audio]    = imx_clk_pllv3(IMX_PLLV3_AV,	"pll4_audio",	"osc", base + 0x70, 0x2000,   0x7f);</div><div class='add'>+	clk[pll5_video]    = imx_clk_pllv3(IMX_PLLV3_AV,	"pll5_video",	"osc", base + 0xa0, 0x2000,   0x7f);</div><div class='add'>+	clk[pll6_mlb]      = imx_clk_pllv3(IMX_PLLV3_MLB,	"pll6_mlb",	"osc", base + 0xd0, 0x2000,   0x0);</div><div class='add'>+	clk[pll7_usb_host] = imx_clk_pllv3(IMX_PLLV3_USB,	"pll7_usb_host","osc", base + 0x20, 0x2000,   0x3);</div><div class='add'>+	clk[pll8_enet]     = imx_clk_pllv3(IMX_PLLV3_ENET,	"pll8_enet",	"osc", base + 0xe0, 0x182000, 0x3);</div><div class='add'>+</div><div class='add'>+	/*                                name              parent_name        reg       idx */</div><div class='add'>+	clk[pll2_pfd0_352m] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus",     base + 0x100, 0);</div><div class='add'>+	clk[pll2_pfd1_594m] = imx_clk_pfd("pll2_pfd1_594m", "pll2_bus",     base + 0x100, 1);</div><div class='add'>+	clk[pll2_pfd2_396m] = imx_clk_pfd("pll2_pfd2_396m", "pll2_bus",     base + 0x100, 2);</div><div class='add'>+	clk[pll3_pfd0_720m] = imx_clk_pfd("pll3_pfd0_720m", "pll3_usb_otg", base + 0xf0,  0);</div><div class='add'>+	clk[pll3_pfd1_540m] = imx_clk_pfd("pll3_pfd1_540m", "pll3_usb_otg", base + 0xf0,  1);</div><div class='add'>+	clk[pll3_pfd2_508m] = imx_clk_pfd("pll3_pfd2_508m", "pll3_usb_otg", base + 0xf0,  2);</div><div class='add'>+	clk[pll3_pfd3_454m] = imx_clk_pfd("pll3_pfd3_454m", "pll3_usb_otg", base + 0xf0,  3);</div><div class='add'>+</div><div class='add'>+	/*                                    name         parent_name     mult div */</div><div class='add'>+	clk[pll2_198m] = imx_clk_fixed_factor("pll2_198m", "pll2_pfd2_396m", 1, 2);</div><div class='add'>+	clk[pll3_120m] = imx_clk_fixed_factor("pll3_120m", "pll3_usb_otg",   1, 4);</div><div class='add'>+	clk[pll3_80m]  = imx_clk_fixed_factor("pll3_80m",  "pll3_usb_otg",   1, 6);</div><div class='add'>+	clk[pll3_60m]  = imx_clk_fixed_factor("pll3_60m",  "pll3_usb_otg",   1, 8);</div><div class='add'>+	clk[twd]       = imx_clk_fixed_factor("twd",       "arm",            1, 2);</div><div class='add'>+</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-ccm");</div><div class='add'>+	base = of_iomap(np, 0);</div><div class='add'>+	WARN_ON(!base);</div><div class='add'>+	ccm_base = base;</div><div class='add'>+</div><div class='add'>+	/*                                  name                reg       shift width parent_names     num_parents */</div><div class='add'>+	clk[step]             = imx_clk_mux("step",	        base + 0xc,  8,  1, step_sels,	       ARRAY_SIZE(step_sels));</div><div class='add'>+	clk[pll1_sw]          = imx_clk_mux("pll1_sw",	        base + 0xc,  2,  1, pll1_sw_sels,      ARRAY_SIZE(pll1_sw_sels));</div><div class='add'>+	clk[periph_pre]       = imx_clk_mux("periph_pre",       base + 0x18, 18, 2, periph_pre_sels,   ARRAY_SIZE(periph_pre_sels));</div><div class='add'>+	clk[periph2_pre]      = imx_clk_mux("periph2_pre",      base + 0x18, 21, 2, periph_pre_sels,   ARRAY_SIZE(periph_pre_sels));</div><div class='add'>+	clk[periph_clk2_sel]  = imx_clk_mux("periph_clk2_sel",  base + 0x18, 12, 1, periph_clk2_sels,  ARRAY_SIZE(periph_clk2_sels));</div><div class='add'>+	clk[periph2_clk2_sel] = imx_clk_mux("periph2_clk2_sel", base + 0x18, 20, 1, periph_clk2_sels,  ARRAY_SIZE(periph_clk2_sels));</div><div class='add'>+	clk[axi_sel]          = imx_clk_mux("axi_sel",          base + 0x14, 6,  2, axi_sels,          ARRAY_SIZE(axi_sels));</div><div class='add'>+	clk[esai_sel]         = imx_clk_mux("esai_sel",         base + 0x20, 19, 2, audio_sels,        ARRAY_SIZE(audio_sels));</div><div class='add'>+	clk[asrc_sel]         = imx_clk_mux("asrc_sel",         base + 0x30, 7,  2, audio_sels,        ARRAY_SIZE(audio_sels));</div><div class='add'>+	clk[spdif_sel]        = imx_clk_mux("spdif_sel",        base + 0x30, 20, 2, audio_sels,        ARRAY_SIZE(audio_sels));</div><div class='add'>+	clk[gpu2d_axi]        = imx_clk_mux("gpu2d_axi",        base + 0x18, 0,  1, gpu_axi_sels,      ARRAY_SIZE(gpu_axi_sels));</div><div class='add'>+	clk[gpu3d_axi]        = imx_clk_mux("gpu3d_axi",        base + 0x18, 1,  1, gpu_axi_sels,      ARRAY_SIZE(gpu_axi_sels));</div><div class='add'>+	clk[gpu2d_core_sel]   = imx_clk_mux("gpu2d_core_sel",   base + 0x18, 16, 2, gpu2d_core_sels,   ARRAY_SIZE(gpu2d_core_sels));</div><div class='add'>+	clk[gpu3d_core_sel]   = imx_clk_mux("gpu3d_core_sel",   base + 0x18, 4,  2, gpu3d_core_sels,   ARRAY_SIZE(gpu3d_core_sels));</div><div class='add'>+	clk[gpu3d_shader_sel] = imx_clk_mux("gpu3d_shader_sel", base + 0x18, 8,  2, gpu3d_shader_sels, ARRAY_SIZE(gpu3d_shader_sels));</div><div class='add'>+	clk[ipu1_sel]         = imx_clk_mux("ipu1_sel",         base + 0x3c, 9,  2, ipu_sels,          ARRAY_SIZE(ipu_sels));</div><div class='add'>+	clk[ipu2_sel]         = imx_clk_mux("ipu2_sel",         base + 0x3c, 14, 2, ipu_sels,          ARRAY_SIZE(ipu_sels));</div><div class='add'>+	clk[ldb_di0_sel]      = imx_clk_mux("ldb_di0_sel",      base + 0x2c, 9,  3, ldb_di_sels,       ARRAY_SIZE(ldb_di_sels));</div><div class='add'>+	clk[ldb_di1_sel]      = imx_clk_mux("ldb_di1_sel",      base + 0x2c, 12, 3, ldb_di_sels,       ARRAY_SIZE(ldb_di_sels));</div><div class='add'>+	clk[ipu1_di0_pre_sel] = imx_clk_mux("ipu1_di0_pre_sel", base + 0x34, 6,  3, ipu_di_pre_sels,   ARRAY_SIZE(ipu_di_pre_sels));</div><div class='add'>+	clk[ipu1_di1_pre_sel] = imx_clk_mux("ipu1_di1_pre_sel", base + 0x34, 15, 3, ipu_di_pre_sels,   ARRAY_SIZE(ipu_di_pre_sels));</div><div class='add'>+	clk[ipu2_di0_pre_sel] = imx_clk_mux("ipu2_di0_pre_sel", base + 0x38, 6,  3, ipu_di_pre_sels,   ARRAY_SIZE(ipu_di_pre_sels));</div><div class='add'>+	clk[ipu2_di1_pre_sel] = imx_clk_mux("ipu2_di1_pre_sel", base + 0x38, 15, 3, ipu_di_pre_sels,   ARRAY_SIZE(ipu_di_pre_sels));</div><div class='add'>+	clk[ipu1_di0_sel]     = imx_clk_mux("ipu1_di0_sel",     base + 0x34, 0,  3, ipu1_di0_sels,     ARRAY_SIZE(ipu1_di0_sels));</div><div class='add'>+	clk[ipu1_di1_sel]     = imx_clk_mux("ipu1_di1_sel",     base + 0x34, 9,  3, ipu1_di1_sels,     ARRAY_SIZE(ipu1_di1_sels));</div><div class='add'>+	clk[ipu2_di0_sel]     = imx_clk_mux("ipu2_di0_sel",     base + 0x38, 0,  3, ipu2_di0_sels,     ARRAY_SIZE(ipu2_di0_sels));</div><div class='add'>+	clk[ipu2_di1_sel]     = imx_clk_mux("ipu2_di1_sel",     base + 0x38, 9,  3, ipu2_di1_sels,     ARRAY_SIZE(ipu2_di1_sels));</div><div class='add'>+	clk[hsi_tx_sel]       = imx_clk_mux("hsi_tx_sel",       base + 0x30, 28, 1, hsi_tx_sels,       ARRAY_SIZE(hsi_tx_sels));</div><div class='add'>+	clk[pcie_axi_sel]     = imx_clk_mux("pcie_axi_sel",     base + 0x18, 10, 1, pcie_axi_sels,     ARRAY_SIZE(pcie_axi_sels));</div><div class='add'>+	clk[ssi1_sel]         = imx_clk_mux("ssi1_sel",         base + 0x1c, 10, 2, ssi_sels,          ARRAY_SIZE(ssi_sels));</div><div class='add'>+	clk[ssi2_sel]         = imx_clk_mux("ssi2_sel",         base + 0x1c, 12, 2, ssi_sels,          ARRAY_SIZE(ssi_sels));</div><div class='add'>+	clk[ssi3_sel]         = imx_clk_mux("ssi3_sel",         base + 0x1c, 14, 2, ssi_sels,          ARRAY_SIZE(ssi_sels));</div><div class='add'>+	clk[usdhc1_sel]       = imx_clk_mux("usdhc1_sel",       base + 0x1c, 16, 1, usdhc_sels,        ARRAY_SIZE(usdhc_sels));</div><div class='add'>+	clk[usdhc2_sel]       = imx_clk_mux("usdhc2_sel",       base + 0x1c, 17, 1, usdhc_sels,        ARRAY_SIZE(usdhc_sels));</div><div class='add'>+	clk[usdhc3_sel]       = imx_clk_mux("usdhc3_sel",       base + 0x1c, 18, 1, usdhc_sels,        ARRAY_SIZE(usdhc_sels));</div><div class='add'>+	clk[usdhc4_sel]       = imx_clk_mux("usdhc4_sel",       base + 0x1c, 19, 1, usdhc_sels,        ARRAY_SIZE(usdhc_sels));</div><div class='add'>+	clk[enfc_sel]         = imx_clk_mux("enfc_sel",         base + 0x2c, 16, 2, enfc_sels,         ARRAY_SIZE(enfc_sels));</div><div class='add'>+	clk[emi_sel]          = imx_clk_mux("emi_sel",          base + 0x1c, 27, 2, emi_sels,          ARRAY_SIZE(emi_sels));</div><div class='add'>+	clk[emi_slow_sel]     = imx_clk_mux("emi_slow_sel",     base + 0x1c, 29, 2, emi_sels,          ARRAY_SIZE(emi_sels));</div><div class='add'>+	clk[vdo_axi_sel]      = imx_clk_mux("vdo_axi_sel",      base + 0x18, 11, 1, vdo_axi_sels,      ARRAY_SIZE(vdo_axi_sels));</div><div class='add'>+	clk[vpu_axi_sel]      = imx_clk_mux("vpu_axi_sel",      base + 0x18, 14, 2, vpu_axi_sels,      ARRAY_SIZE(vpu_axi_sels));</div><div class='add'>+	clk[cko1_sel]         = imx_clk_mux("cko1_sel",         base + 0x60, 0,  4, cko1_sels,         ARRAY_SIZE(cko1_sels));</div><div class='add'>+</div><div class='add'>+	/*                              name         reg      shift width busy: reg, shift parent_names  num_parents */</div><div class='add'>+	clk[periph]  = imx_clk_busy_mux("periph",  base + 0x14, 25,  1,   base + 0x48, 5,  periph_sels,  ARRAY_SIZE(periph_sels));</div><div class='add'>+	clk[periph2] = imx_clk_busy_mux("periph2", base + 0x14, 26,  1,   base + 0x48, 3,  periph2_sels, ARRAY_SIZE(periph2_sels));</div><div class='add'>+</div><div class='add'>+	/*                                      name                parent_name          reg       shift width */</div><div class='add'>+	clk[periph_clk2]      = imx_clk_divider("periph_clk2",      "periph_clk2_sel",   base + 0x14, 27, 3);</div><div class='add'>+	clk[periph2_clk2]     = imx_clk_divider("periph2_clk2",     "periph2_clk2_sel",  base + 0x14, 0,  3);</div><div class='add'>+	clk[ipg]              = imx_clk_divider("ipg",              "ahb",               base + 0x14, 8,  2);</div><div class='add'>+	clk[ipg_per]          = imx_clk_divider("ipg_per",          "ipg",               base + 0x1c, 0,  6);</div><div class='add'>+	clk[esai_pred]        = imx_clk_divider("esai_pred",        "esai_sel",          base + 0x28, 9,  3);</div><div class='add'>+	clk[esai_podf]        = imx_clk_divider("esai_podf",        "esai_pred",         base + 0x28, 25, 3);</div><div class='add'>+	clk[asrc_pred]        = imx_clk_divider("asrc_pred",        "asrc_sel",          base + 0x30, 12, 3);</div><div class='add'>+	clk[asrc_podf]        = imx_clk_divider("asrc_podf",        "asrc_pred",         base + 0x30, 9,  3);</div><div class='add'>+	clk[spdif_pred]       = imx_clk_divider("spdif_pred",       "spdif_sel",         base + 0x30, 25, 3);</div><div class='add'>+	clk[spdif_podf]       = imx_clk_divider("spdif_podf",       "spdif_pred",        base + 0x30, 22, 3);</div><div class='add'>+	clk[can_root]         = imx_clk_divider("can_root",         "pll3_usb_otg",      base + 0x20, 2,  6);</div><div class='add'>+	clk[ecspi_root]       = imx_clk_divider("ecspi_root",       "pll3_60m",          base + 0x38, 19, 6);</div><div class='add'>+	clk[gpu2d_core_podf]  = imx_clk_divider("gpu2d_core_podf",  "gpu2d_core_sel",    base + 0x18, 23, 3);</div><div class='add'>+	clk[gpu3d_core_podf]  = imx_clk_divider("gpu3d_core_podf",  "gpu3d_core_sel",    base + 0x18, 26, 3);</div><div class='add'>+	clk[gpu3d_shader]     = imx_clk_divider("gpu3d_shader",     "gpu3d_shader_sel",  base + 0x18, 29, 3);</div><div class='add'>+	clk[ipu1_podf]        = imx_clk_divider("ipu1_podf",        "ipu1_sel",          base + 0x3c, 11, 3);</div><div class='add'>+	clk[ipu2_podf]        = imx_clk_divider("ipu2_podf",        "ipu2_sel",          base + 0x3c, 16, 3);</div><div class='add'>+	clk[ldb_di0_podf]     = imx_clk_divider("ldb_di0_podf",     "ldb_di0_sel",       base + 0x20, 10, 1);</div><div class='add'>+	clk[ldb_di1_podf]     = imx_clk_divider("ldb_di1_podf",     "ldb_di1_sel",       base + 0x20, 11, 1);</div><div class='add'>+	clk[ipu1_di0_pre]     = imx_clk_divider("ipu1_di0_pre",     "ipu1_di0_pre_sel",  base + 0x34, 3,  3);</div><div class='add'>+	clk[ipu1_di1_pre]     = imx_clk_divider("ipu1_di1_pre",     "ipu1_di1_pre_sel",  base + 0x34, 12, 3);</div><div class='add'>+	clk[ipu2_di0_pre]     = imx_clk_divider("ipu2_di0_pre",     "ipu2_di0_pre_sel",  base + 0x38, 3,  3);</div><div class='add'>+	clk[ipu2_di1_pre]     = imx_clk_divider("ipu2_di1_pre",     "ipu2_di1_pre_sel",  base + 0x38, 12, 3);</div><div class='add'>+	clk[hsi_tx_podf]      = imx_clk_divider("hsi_tx_podf",      "hsi_tx_sel",        base + 0x30, 29, 3);</div><div class='add'>+	clk[ssi1_pred]        = imx_clk_divider("ssi1_pred",        "ssi1_sel",          base + 0x28, 6,  3);</div><div class='add'>+	clk[ssi1_podf]        = imx_clk_divider("ssi1_podf",        "ssi1_pred",         base + 0x28, 0,  6);</div><div class='add'>+	clk[ssi2_pred]        = imx_clk_divider("ssi2_pred",        "ssi2_sel",          base + 0x2c, 6,  3);</div><div class='add'>+	clk[ssi2_podf]        = imx_clk_divider("ssi2_podf",        "ssi2_pred",         base + 0x2c, 0,  6);</div><div class='add'>+	clk[ssi3_pred]        = imx_clk_divider("ssi3_pred",        "ssi3_sel",          base + 0x28, 22, 3);</div><div class='add'>+	clk[ssi3_podf]        = imx_clk_divider("ssi3_podf",        "ssi3_pred",         base + 0x28, 16, 6);</div><div class='add'>+	clk[uart_serial_podf] = imx_clk_divider("uart_serial_podf", "pll3_80m",          base + 0x24, 0,  6);</div><div class='add'>+	clk[usdhc1_podf]      = imx_clk_divider("usdhc1_podf",      "usdhc1_sel",        base + 0x24, 11, 3);</div><div class='add'>+	clk[usdhc2_podf]      = imx_clk_divider("usdhc2_podf",      "usdhc2_sel",        base + 0x24, 16, 3);</div><div class='add'>+	clk[usdhc3_podf]      = imx_clk_divider("usdhc3_podf",      "usdhc3_sel",        base + 0x24, 19, 3);</div><div class='add'>+	clk[usdhc4_podf]      = imx_clk_divider("usdhc4_podf",      "usdhc4_sel",        base + 0x24, 22, 3);</div><div class='add'>+	clk[enfc_pred]        = imx_clk_divider("enfc_pred",        "enfc_sel",          base + 0x2c, 18, 3);</div><div class='add'>+	clk[enfc_podf]        = imx_clk_divider("enfc_podf",        "enfc_pred",         base + 0x2c, 21, 6);</div><div class='add'>+	clk[emi_podf]         = imx_clk_divider("emi_podf",         "emi_sel",           base + 0x1c, 20, 3);</div><div class='add'>+	clk[emi_slow_podf]    = imx_clk_divider("emi_slow_podf",    "emi_slow_sel",      base + 0x1c, 23, 3);</div><div class='add'>+	clk[vpu_axi_podf]     = imx_clk_divider("vpu_axi_podf",     "vpu_axi_sel",       base + 0x24, 25, 3);</div><div class='add'>+	clk[cko1_podf]        = imx_clk_divider("cko1_podf",        "cko1_sel",          base + 0x60, 4,  3);</div><div class='add'>+</div><div class='add'>+	/*                                            name                 parent_name    reg        shift width busy: reg, shift */</div><div class='add'>+	clk[axi]               = imx_clk_busy_divider("axi",               "axi_sel",     base + 0x14, 16,  3,   base + 0x48, 0);</div><div class='add'>+	clk[mmdc_ch0_axi_podf] = imx_clk_busy_divider("mmdc_ch0_axi_podf", "periph",      base + 0x14, 19,  3,   base + 0x48, 4);</div><div class='add'>+	clk[mmdc_ch1_axi_podf] = imx_clk_busy_divider("mmdc_ch1_axi_podf", "periph2",     base + 0x14, 3,   3,   base + 0x48, 2);</div><div class='add'>+	clk[arm]               = imx_clk_busy_divider("arm",               "pll1_sw",     base + 0x10, 0,   3,   base + 0x48, 16);</div><div class='add'>+	clk[ahb]               = imx_clk_busy_divider("ahb",               "periph",      base + 0x14, 10,  3,   base + 0x48, 1);</div><div class='add'>+</div><div class='add'>+	/*                                name             parent_name          reg         shift */</div><div class='add'>+	clk[apbh_dma]     = imx_clk_gate2("apbh_dma",      "ahb",               base + 0x68, 4);</div><div class='add'>+	clk[asrc]         = imx_clk_gate2("asrc",          "asrc_podf",         base + 0x68, 6);</div><div class='add'>+	clk[can1_ipg]     = imx_clk_gate2("can1_ipg",      "ipg",               base + 0x68, 14);</div><div class='add'>+	clk[can1_serial]  = imx_clk_gate2("can1_serial",   "can_root",          base + 0x68, 16);</div><div class='add'>+	clk[can2_ipg]     = imx_clk_gate2("can2_ipg",      "ipg",               base + 0x68, 18);</div><div class='add'>+	clk[can2_serial]  = imx_clk_gate2("can2_serial",   "can_root",          base + 0x68, 20);</div><div class='add'>+	clk[ecspi1]       = imx_clk_gate2("ecspi1",        "ecspi_root",        base + 0x6c, 0);</div><div class='add'>+	clk[ecspi2]       = imx_clk_gate2("ecspi2",        "ecspi_root",        base + 0x6c, 2);</div><div class='add'>+	clk[ecspi3]       = imx_clk_gate2("ecspi3",        "ecspi_root",        base + 0x6c, 4);</div><div class='add'>+	clk[ecspi4]       = imx_clk_gate2("ecspi4",        "ecspi_root",        base + 0x6c, 6);</div><div class='add'>+	clk[ecspi5]       = imx_clk_gate2("ecspi5",        "ecspi_root",        base + 0x6c, 8);</div><div class='add'>+	clk[enet]         = imx_clk_gate2("enet",          "ipg",               base + 0x6c, 10);</div><div class='add'>+	clk[esai]         = imx_clk_gate2("esai",          "esai_podf",         base + 0x6c, 16);</div><div class='add'>+	clk[gpt_ipg]      = imx_clk_gate2("gpt_ipg",       "ipg",               base + 0x6c, 20);</div><div class='add'>+	clk[gpt_ipg_per]  = imx_clk_gate2("gpt_ipg_per",   "ipg_per",           base + 0x6c, 22);</div><div class='add'>+	clk[gpu2d_core]   = imx_clk_gate2("gpu2d_core",    "gpu2d_core_podf",   base + 0x6c, 24);</div><div class='add'>+	clk[gpu3d_core]   = imx_clk_gate2("gpu3d_core",    "gpu3d_core_podf",   base + 0x6c, 26);</div><div class='add'>+	clk[hdmi_iahb]    = imx_clk_gate2("hdmi_iahb",     "ahb",               base + 0x70, 0);</div><div class='add'>+	clk[hdmi_isfr]    = imx_clk_gate2("hdmi_isfr",     "pll3_pfd1_540m",    base + 0x70, 4);</div><div class='add'>+	clk[i2c1]         = imx_clk_gate2("i2c1",          "ipg_per",           base + 0x70, 6);</div><div class='add'>+	clk[i2c2]         = imx_clk_gate2("i2c2",          "ipg_per",           base + 0x70, 8);</div><div class='add'>+	clk[i2c3]         = imx_clk_gate2("i2c3",          "ipg_per",           base + 0x70, 10);</div><div class='add'>+	clk[iim]          = imx_clk_gate2("iim",           "ipg",               base + 0x70, 12);</div><div class='add'>+	clk[enfc]         = imx_clk_gate2("enfc",          "enfc_podf",         base + 0x70, 14);</div><div class='add'>+	clk[ipu1]         = imx_clk_gate2("ipu1",          "ipu1_podf",         base + 0x74, 0);</div><div class='add'>+	clk[ipu1_di0]     = imx_clk_gate2("ipu1_di0",      "ipu1_di0_sel",      base + 0x74, 2);</div><div class='add'>+	clk[ipu1_di1]     = imx_clk_gate2("ipu1_di1",      "ipu1_di1_sel",      base + 0x74, 4);</div><div class='add'>+	clk[ipu2]         = imx_clk_gate2("ipu2",          "ipu2_podf",         base + 0x74, 6);</div><div class='add'>+	clk[ipu2_di0]     = imx_clk_gate2("ipu2_di0",      "ipu2_di0_sel",      base + 0x74, 8);</div><div class='add'>+	clk[ldb_di0]      = imx_clk_gate2("ldb_di0",       "ldb_di0_podf",      base + 0x74, 12);</div><div class='add'>+	clk[ldb_di1]      = imx_clk_gate2("ldb_di1",       "ldb_di1_podf",      base + 0x74, 14);</div><div class='add'>+	clk[ipu2_di1]     = imx_clk_gate2("ipu2_di1",      "ipu2_di1_sel",      base + 0x74, 10);</div><div class='add'>+	clk[hsi_tx]       = imx_clk_gate2("hsi_tx",        "hsi_tx_podf",       base + 0x74, 16);</div><div class='add'>+	clk[mlb]          = imx_clk_gate2("mlb",           "pll6_mlb",          base + 0x74, 18);</div><div class='add'>+	clk[mmdc_ch0_axi] = imx_clk_gate2("mmdc_ch0_axi",  "mmdc_ch0_axi_podf", base + 0x74, 20);</div><div class='add'>+	clk[mmdc_ch1_axi] = imx_clk_gate2("mmdc_ch1_axi",  "mmdc_ch1_axi_podf", base + 0x74, 22);</div><div class='add'>+	clk[ocram]        = imx_clk_gate2("ocram",         "ahb",               base + 0x74, 28);</div><div class='add'>+	clk[openvg_axi]   = imx_clk_gate2("openvg_axi",    "axi",               base + 0x74, 30);</div><div class='add'>+	clk[pcie_axi]     = imx_clk_gate2("pcie_axi",      "pcie_axi_sel",      base + 0x78, 0);</div><div class='add'>+	clk[pwm1]         = imx_clk_gate2("pwm1",          "ipg_per",           base + 0x78, 16);</div><div class='add'>+	clk[pwm2]         = imx_clk_gate2("pwm2",          "ipg_per",           base + 0x78, 18);</div><div class='add'>+	clk[pwm3]         = imx_clk_gate2("pwm3",          "ipg_per",           base + 0x78, 20);</div><div class='add'>+	clk[pwm4]         = imx_clk_gate2("pwm4",          "ipg_per",           base + 0x78, 22);</div><div class='add'>+	clk[gpmi_bch_apb] = imx_clk_gate2("gpmi_bch_apb",  "usdhc3",            base + 0x78, 24);</div><div class='add'>+	clk[gpmi_bch]     = imx_clk_gate2("gpmi_bch",      "usdhc4",            base + 0x78, 26);</div><div class='add'>+	clk[gpmi_io]      = imx_clk_gate2("gpmi_io",       "enfc",              base + 0x78, 28);</div><div class='add'>+	clk[gpmi_apb]     = imx_clk_gate2("gpmi_apb",      "usdhc3",            base + 0x78, 30);</div><div class='add'>+	clk[sata]         = imx_clk_gate2("sata",          "ipg",               base + 0x7c, 4);</div><div class='add'>+	clk[sdma]         = imx_clk_gate2("sdma",          "ahb",               base + 0x7c, 6);</div><div class='add'>+	clk[spba]         = imx_clk_gate2("spba",          "ipg",               base + 0x7c, 12);</div><div class='add'>+	clk[ssi1_ipg]     = imx_clk_gate2("ssi1_ipg",      "ipg",               base + 0x7c, 18);</div><div class='add'>+	clk[ssi2_ipg]     = imx_clk_gate2("ssi2_ipg",      "ipg",               base + 0x7c, 20);</div><div class='add'>+	clk[ssi3_ipg]     = imx_clk_gate2("ssi3_ipg",      "ipg",               base + 0x7c, 22);</div><div class='add'>+	clk[uart_ipg]     = imx_clk_gate2("uart_ipg",      "ipg",               base + 0x7c, 24);</div><div class='add'>+	clk[uart_serial]  = imx_clk_gate2("uart_serial",   "uart_serial_podf",  base + 0x7c, 26);</div><div class='add'>+	clk[usboh3]       = imx_clk_gate2("usboh3",        "ipg",               base + 0x80, 0);</div><div class='add'>+	clk[usdhc1]       = imx_clk_gate2("usdhc1",        "usdhc1_podf",       base + 0x80, 2);</div><div class='add'>+	clk[usdhc2]       = imx_clk_gate2("usdhc2",        "usdhc2_podf",       base + 0x80, 4);</div><div class='add'>+	clk[usdhc3]       = imx_clk_gate2("usdhc3",        "usdhc3_podf",       base + 0x80, 6);</div><div class='add'>+	clk[usdhc4]       = imx_clk_gate2("usdhc4",        "usdhc4_podf",       base + 0x80, 8);</div><div class='add'>+	clk[vdo_axi]      = imx_clk_gate2("vdo_axi",       "vdo_axi_sel",       base + 0x80, 12);</div><div class='add'>+	clk[vpu_axi]      = imx_clk_gate2("vpu_axi",       "vpu_axi_podf",      base + 0x80, 14);</div><div class='add'>+	clk[cko1]         = imx_clk_gate("cko1",           "cko1_podf",         base + 0x60, 7);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clk); i++)</div><div class='add'>+		if (IS_ERR(clk[i]))</div><div class='add'>+			pr_err("i.MX6q clk %d: register failed with %ld\n",</div><div class='add'>+				i, PTR_ERR(clk[i]));</div><div class='add'>+</div><div class='add'>+	clk_register_clkdev(clk[mmdc_ch0_axi], NULL, "mmdc_ch0_axi");</div><div class='add'>+	clk_register_clkdev(clk[mmdc_ch1_axi], NULL, "mmdc_ch1_axi");</div><div class='add'>+	clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");</div><div class='add'>+	clk_register_clkdev(clk[twd], NULL, "smp_twd");</div><div class='add'>+	clk_register_clkdev(clk[usboh3], NULL, "usboh3");</div><div class='add'>+	clk_register_clkdev(clk[uart_serial], "per", "2020000.serial");</div><div class='add'>+	clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial");</div><div class='add'>+	clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial");</div><div class='add'>+	clk_register_clkdev(clk[uart_ipg], "ipg", "21e8000.serial");</div><div class='add'>+	clk_register_clkdev(clk[uart_serial], "per", "21ec000.serial");</div><div class='add'>+	clk_register_clkdev(clk[uart_ipg], "ipg", "21ec000.serial");</div><div class='add'>+	clk_register_clkdev(clk[uart_serial], "per", "21f0000.serial");</div><div class='add'>+	clk_register_clkdev(clk[uart_ipg], "ipg", "21f0000.serial");</div><div class='add'>+	clk_register_clkdev(clk[uart_serial], "per", "21f4000.serial");</div><div class='add'>+	clk_register_clkdev(clk[uart_ipg], "ipg", "21f4000.serial");</div><div class='add'>+	clk_register_clkdev(clk[enet], NULL, "2188000.ethernet");</div><div class='add'>+	clk_register_clkdev(clk[usdhc1], NULL, "2190000.usdhc");</div><div class='add'>+	clk_register_clkdev(clk[usdhc2], NULL, "2194000.usdhc");</div><div class='add'>+	clk_register_clkdev(clk[usdhc3], NULL, "2198000.usdhc");</div><div class='add'>+	clk_register_clkdev(clk[usdhc4], NULL, "219c000.usdhc");</div><div class='add'>+	clk_register_clkdev(clk[i2c1], NULL, "21a0000.i2c");</div><div class='add'>+	clk_register_clkdev(clk[i2c2], NULL, "21a4000.i2c");</div><div class='add'>+	clk_register_clkdev(clk[i2c3], NULL, "21a8000.i2c");</div><div class='add'>+	clk_register_clkdev(clk[ecspi1], NULL, "2008000.ecspi");</div><div class='add'>+	clk_register_clkdev(clk[ecspi2], NULL, "200c000.ecspi");</div><div class='add'>+	clk_register_clkdev(clk[ecspi3], NULL, "2010000.ecspi");</div><div class='add'>+	clk_register_clkdev(clk[ecspi4], NULL, "2014000.ecspi");</div><div class='add'>+	clk_register_clkdev(clk[ecspi5], NULL, "2018000.ecspi");</div><div class='add'>+	clk_register_clkdev(clk[sdma], NULL, "20ec000.sdma");</div><div class='add'>+	clk_register_clkdev(clk[dummy], NULL, "20bc000.wdog");</div><div class='add'>+	clk_register_clkdev(clk[dummy], NULL, "20c0000.wdog");</div><div class='add'>+	clk_register_clkdev(clk[ssi1_ipg], NULL, "2028000.ssi");</div><div class='add'>+	clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL);</div><div class='add'>+	clk_register_clkdev(clk[ahb], "ahb", NULL);</div><div class='add'>+	clk_register_clkdev(clk[cko1], "cko1", NULL);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clks_init_on); i++) {</div><div class='add'>+		c = clk_get_sys(clks_init_on[i], NULL);</div><div class='add'>+		if (IS_ERR(c)) {</div><div class='add'>+			pr_err("%s: failed to get clk %s", __func__,</div><div class='add'>+			       clks_init_on[i]);</div><div class='add'>+			return PTR_ERR(c);</div><div class='add'>+		}</div><div class='add'>+		clk_prepare_enable(c);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");</div><div class='add'>+	base = of_iomap(np, 0);</div><div class='add'>+	WARN_ON(!base);</div><div class='add'>+	irq = irq_of_parse_and_map(np, 0);</div><div class='add'>+	mxc_timer_init(NULL, base, irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-pfd.c b/arch/arm/mach-imx/clk-pfd.c<br/>new file mode 100644<br/>index 000000000000..e2ed4160f329<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-pfd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-pfd.c</a></div><div class='hunk'>@@ -0,0 +1,147 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2012 Linaro Ltd.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct clk_pfd - IMX PFD clock</div><div class='add'>+ * @clk_hw:	clock source</div><div class='add'>+ * @reg:	PFD register address</div><div class='add'>+ * @idx:	the index of PFD encoded in the register</div><div class='add'>+ *</div><div class='add'>+ * PFD clock found on i.MX6 series.  Each register for PFD has 4 clk_pfd</div><div class='add'>+ * data encoded, and member idx is used to specify the one.  And each</div><div class='add'>+ * register has SET, CLR and TOG registers at offset 0x4 0x8 and 0xc.</div><div class='add'>+ */</div><div class='add'>+struct clk_pfd {</div><div class='add'>+	struct clk_hw	hw;</div><div class='add'>+	void __iomem	*reg;</div><div class='add'>+	u8		idx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define to_clk_pfd(_hw) container_of(_hw, struct clk_pfd, hw)</div><div class='add'>+</div><div class='add'>+#define SET	0x4</div><div class='add'>+#define CLR	0x8</div><div class='add'>+#define OTG	0xc</div><div class='add'>+</div><div class='add'>+static int clk_pfd_enable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_pfd *pfd = to_clk_pfd(hw);</div><div class='add'>+</div><div class='add'>+	writel_relaxed(1 &lt;&lt; ((pfd-&gt;idx + 1) * 8 - 1), pfd-&gt;reg + CLR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clk_pfd_disable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_pfd *pfd = to_clk_pfd(hw);</div><div class='add'>+</div><div class='add'>+	writel_relaxed(1 &lt;&lt; ((pfd-&gt;idx + 1) * 8 - 1), pfd-&gt;reg + SET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long clk_pfd_recalc_rate(struct clk_hw *hw,</div><div class='add'>+					 unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pfd *pfd = to_clk_pfd(hw);</div><div class='add'>+	u64 tmp = parent_rate;</div><div class='add'>+	u8 frac = (readl_relaxed(pfd-&gt;reg) &gt;&gt; (pfd-&gt;idx * 8)) &amp; 0x3f;</div><div class='add'>+</div><div class='add'>+	tmp *= 18;</div><div class='add'>+	do_div(tmp, frac);</div><div class='add'>+</div><div class='add'>+	return tmp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_pfd_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+			       unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	u64 tmp = *prate;</div><div class='add'>+	u8 frac;</div><div class='add'>+</div><div class='add'>+	tmp = tmp * 18 + rate / 2;</div><div class='add'>+	do_div(tmp, rate);</div><div class='add'>+	frac = tmp;</div><div class='add'>+	if (frac &lt; 12)</div><div class='add'>+		frac = 12;</div><div class='add'>+	else if (frac &gt; 35)</div><div class='add'>+		frac = 35;</div><div class='add'>+	tmp = *prate;</div><div class='add'>+	tmp *= 18;</div><div class='add'>+	do_div(tmp, frac);</div><div class='add'>+</div><div class='add'>+	return tmp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_pfd_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pfd *pfd = to_clk_pfd(hw);</div><div class='add'>+	u64 tmp = parent_rate;</div><div class='add'>+	u8 frac;</div><div class='add'>+</div><div class='add'>+	tmp = tmp * 18 + rate / 2;</div><div class='add'>+	do_div(tmp, rate);</div><div class='add'>+	frac = tmp;</div><div class='add'>+	if (frac &lt; 12)</div><div class='add'>+		frac = 12;</div><div class='add'>+	else if (frac &gt; 35)</div><div class='add'>+		frac = 35;</div><div class='add'>+</div><div class='add'>+	writel_relaxed(0x3f &lt;&lt; (pfd-&gt;idx * 8), pfd-&gt;reg + CLR);</div><div class='add'>+	writel_relaxed(frac &lt;&lt; (pfd-&gt;idx * 8), pfd-&gt;reg + SET);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct clk_ops clk_pfd_ops = {</div><div class='add'>+	.enable		= clk_pfd_enable,</div><div class='add'>+	.disable	= clk_pfd_disable,</div><div class='add'>+	.recalc_rate	= clk_pfd_recalc_rate,</div><div class='add'>+	.round_rate	= clk_pfd_round_rate,</div><div class='add'>+	.set_rate	= clk_pfd_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *imx_clk_pfd(const char *name, const char *parent_name,</div><div class='add'>+			void __iomem *reg, u8 idx)</div><div class='add'>+{</div><div class='add'>+	struct clk_pfd *pfd;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+</div><div class='add'>+	pfd = kzalloc(sizeof(*pfd), GFP_KERNEL);</div><div class='add'>+	if (!pfd)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	pfd-&gt;reg = reg;</div><div class='add'>+	pfd-&gt;idx = idx;</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_pfd_ops;</div><div class='add'>+	init.flags = 0;</div><div class='add'>+	init.parent_names = &amp;parent_name;</div><div class='add'>+	init.num_parents = 1;</div><div class='add'>+</div><div class='add'>+	pfd-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;pfd-&gt;hw);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(pfd);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c<br/>new file mode 100644<br/>index 000000000000..2d856f9ccf59<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-pllv1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-pllv1.c</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/clock.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pll v1</div><div class='add'>+ *</div><div class='add'>+ * @clk_hw	clock source</div><div class='add'>+ * @parent	the parent clock name</div><div class='add'>+ * @base	base address of pll registers</div><div class='add'>+ *</div><div class='add'>+ * PLL clock version 1, found on i.MX1/21/25/27/31/35</div><div class='add'>+ */</div><div class='add'>+struct clk_pllv1 {</div><div class='add'>+	struct clk_hw	hw;</div><div class='add'>+	void __iomem	*base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define to_clk_pllv1(clk) (container_of(clk, struct clk_pllv1, clk))</div><div class='add'>+</div><div class='add'>+static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv1 *pll = to_clk_pllv1(hw);</div><div class='add'>+</div><div class='add'>+	return mxc_decode_pll(readl(pll-&gt;base), parent_rate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct clk_ops clk_pllv1_ops = {</div><div class='add'>+	.recalc_rate = clk_pllv1_recalc_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *imx_clk_pllv1(const char *name, const char *parent,</div><div class='add'>+		void __iomem *base)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv1 *pll;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+</div><div class='add'>+	pll = kmalloc(sizeof(*pll), GFP_KERNEL);</div><div class='add'>+	if (!pll)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	pll-&gt;base = base;</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_pllv1_ops;</div><div class='add'>+	init.flags = 0;</div><div class='add'>+	init.parent_names = &amp;parent;</div><div class='add'>+	init.num_parents = 1;</div><div class='add'>+</div><div class='add'>+	pll-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;pll-&gt;hw);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(pll);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-pllv2.c b/arch/arm/mach-imx/clk-pllv2.c<br/>new file mode 100644<br/>index 000000000000..4685919deb63<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-pllv2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-pllv2.c</a></div><div class='hunk'>@@ -0,0 +1,249 @@</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/div64.h&gt;</div><div class='add'>+</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+#define to_clk_pllv2(clk) (container_of(clk, struct clk_pllv2, clk))</div><div class='add'>+</div><div class='add'>+/* PLL Register Offsets */</div><div class='add'>+#define MXC_PLL_DP_CTL			0x00</div><div class='add'>+#define MXC_PLL_DP_CONFIG		0x04</div><div class='add'>+#define MXC_PLL_DP_OP			0x08</div><div class='add'>+#define MXC_PLL_DP_MFD			0x0C</div><div class='add'>+#define MXC_PLL_DP_MFN			0x10</div><div class='add'>+#define MXC_PLL_DP_MFNMINUS		0x14</div><div class='add'>+#define MXC_PLL_DP_MFNPLUS		0x18</div><div class='add'>+#define MXC_PLL_DP_HFS_OP		0x1C</div><div class='add'>+#define MXC_PLL_DP_HFS_MFD		0x20</div><div class='add'>+#define MXC_PLL_DP_HFS_MFN		0x24</div><div class='add'>+#define MXC_PLL_DP_MFN_TOGC		0x28</div><div class='add'>+#define MXC_PLL_DP_DESTAT		0x2c</div><div class='add'>+</div><div class='add'>+/* PLL Register Bit definitions */</div><div class='add'>+#define MXC_PLL_DP_CTL_MUL_CTRL		0x2000</div><div class='add'>+#define MXC_PLL_DP_CTL_DPDCK0_2_EN	0x1000</div><div class='add'>+#define MXC_PLL_DP_CTL_DPDCK0_2_OFFSET	12</div><div class='add'>+#define MXC_PLL_DP_CTL_ADE		0x800</div><div class='add'>+#define MXC_PLL_DP_CTL_REF_CLK_DIV	0x400</div><div class='add'>+#define MXC_PLL_DP_CTL_REF_CLK_SEL_MASK	(3 &lt;&lt; 8)</div><div class='add'>+#define MXC_PLL_DP_CTL_REF_CLK_SEL_OFFSET	8</div><div class='add'>+#define MXC_PLL_DP_CTL_HFSM		0x80</div><div class='add'>+#define MXC_PLL_DP_CTL_PRE		0x40</div><div class='add'>+#define MXC_PLL_DP_CTL_UPEN		0x20</div><div class='add'>+#define MXC_PLL_DP_CTL_RST		0x10</div><div class='add'>+#define MXC_PLL_DP_CTL_RCP		0x8</div><div class='add'>+#define MXC_PLL_DP_CTL_PLM		0x4</div><div class='add'>+#define MXC_PLL_DP_CTL_BRM0		0x2</div><div class='add'>+#define MXC_PLL_DP_CTL_LRF		0x1</div><div class='add'>+</div><div class='add'>+#define MXC_PLL_DP_CONFIG_BIST		0x8</div><div class='add'>+#define MXC_PLL_DP_CONFIG_SJC_CE	0x4</div><div class='add'>+#define MXC_PLL_DP_CONFIG_AREN		0x2</div><div class='add'>+#define MXC_PLL_DP_CONFIG_LDREQ		0x1</div><div class='add'>+</div><div class='add'>+#define MXC_PLL_DP_OP_MFI_OFFSET	4</div><div class='add'>+#define MXC_PLL_DP_OP_MFI_MASK		(0xF &lt;&lt; 4)</div><div class='add'>+#define MXC_PLL_DP_OP_PDF_OFFSET	0</div><div class='add'>+#define MXC_PLL_DP_OP_PDF_MASK		0xF</div><div class='add'>+</div><div class='add'>+#define MXC_PLL_DP_MFD_OFFSET		0</div><div class='add'>+#define MXC_PLL_DP_MFD_MASK		0x07FFFFFF</div><div class='add'>+</div><div class='add'>+#define MXC_PLL_DP_MFN_OFFSET		0x0</div><div class='add'>+#define MXC_PLL_DP_MFN_MASK		0x07FFFFFF</div><div class='add'>+</div><div class='add'>+#define MXC_PLL_DP_MFN_TOGC_TOG_DIS	(1 &lt;&lt; 17)</div><div class='add'>+#define MXC_PLL_DP_MFN_TOGC_TOG_EN	(1 &lt;&lt; 16)</div><div class='add'>+#define MXC_PLL_DP_MFN_TOGC_CNT_OFFSET	0x0</div><div class='add'>+#define MXC_PLL_DP_MFN_TOGC_CNT_MASK	0xFFFF</div><div class='add'>+</div><div class='add'>+#define MXC_PLL_DP_DESTAT_TOG_SEL	(1 &lt;&lt; 31)</div><div class='add'>+#define MXC_PLL_DP_DESTAT_MFN		0x07FFFFFF</div><div class='add'>+</div><div class='add'>+#define MAX_DPLL_WAIT_TRIES	1000 /* 1000 * udelay(1) = 1ms */</div><div class='add'>+</div><div class='add'>+struct clk_pllv2 {</div><div class='add'>+	struct clk_hw	hw;</div><div class='add'>+	void __iomem	*base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned long clk_pllv2_recalc_rate(struct clk_hw *hw,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	long mfi, mfn, mfd, pdf, ref_clk, mfn_abs;</div><div class='add'>+	unsigned long dp_op, dp_mfd, dp_mfn, dp_ctl, pll_hfsm, dbl;</div><div class='add'>+	void __iomem *pllbase;</div><div class='add'>+	s64 temp;</div><div class='add'>+	struct clk_pllv2 *pll = to_clk_pllv2(hw);</div><div class='add'>+</div><div class='add'>+	pllbase = pll-&gt;base;</div><div class='add'>+</div><div class='add'>+	dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);</div><div class='add'>+	pll_hfsm = dp_ctl &amp; MXC_PLL_DP_CTL_HFSM;</div><div class='add'>+	dbl = dp_ctl &amp; MXC_PLL_DP_CTL_DPDCK0_2_EN;</div><div class='add'>+</div><div class='add'>+	if (pll_hfsm == 0) {</div><div class='add'>+		dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP);</div><div class='add'>+		dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_MFD);</div><div class='add'>+		dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_MFN);</div><div class='add'>+	} else {</div><div class='add'>+		dp_op = __raw_readl(pllbase + MXC_PLL_DP_HFS_OP);</div><div class='add'>+		dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFD);</div><div class='add'>+		dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFN);</div><div class='add'>+	}</div><div class='add'>+	pdf = dp_op &amp; MXC_PLL_DP_OP_PDF_MASK;</div><div class='add'>+	mfi = (dp_op &amp; MXC_PLL_DP_OP_MFI_MASK) &gt;&gt; MXC_PLL_DP_OP_MFI_OFFSET;</div><div class='add'>+	mfi = (mfi &lt;= 5) ? 5 : mfi;</div><div class='add'>+	mfd = dp_mfd &amp; MXC_PLL_DP_MFD_MASK;</div><div class='add'>+	mfn = mfn_abs = dp_mfn &amp; MXC_PLL_DP_MFN_MASK;</div><div class='add'>+	/* Sign extend to 32-bits */</div><div class='add'>+	if (mfn &gt;= 0x04000000) {</div><div class='add'>+		mfn |= 0xFC000000;</div><div class='add'>+		mfn_abs = -mfn;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ref_clk = 2 * parent_rate;</div><div class='add'>+	if (dbl != 0)</div><div class='add'>+		ref_clk *= 2;</div><div class='add'>+</div><div class='add'>+	ref_clk /= (pdf + 1);</div><div class='add'>+	temp = (u64) ref_clk * mfn_abs;</div><div class='add'>+	do_div(temp, mfd + 1);</div><div class='add'>+	if (mfn &lt; 0)</div><div class='add'>+		temp = -temp;</div><div class='add'>+	temp = (ref_clk * mfi) + temp;</div><div class='add'>+</div><div class='add'>+	return temp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_pllv2_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv2 *pll = to_clk_pllv2(hw);</div><div class='add'>+	u32 reg;</div><div class='add'>+	void __iomem *pllbase;</div><div class='add'>+	long mfi, pdf, mfn, mfd = 999999;</div><div class='add'>+	s64 temp64;</div><div class='add'>+	unsigned long quad_parent_rate;</div><div class='add'>+	unsigned long pll_hfsm, dp_ctl;</div><div class='add'>+</div><div class='add'>+	pllbase = pll-&gt;base;</div><div class='add'>+</div><div class='add'>+	quad_parent_rate = 4 * parent_rate;</div><div class='add'>+	pdf = mfi = -1;</div><div class='add'>+	while (++pdf &lt; 16 &amp;&amp; mfi &lt; 5)</div><div class='add'>+		mfi = rate * (pdf+1) / quad_parent_rate;</div><div class='add'>+	if (mfi &gt; 15)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	pdf--;</div><div class='add'>+</div><div class='add'>+	temp64 = rate * (pdf+1) - quad_parent_rate * mfi;</div><div class='add'>+	do_div(temp64, quad_parent_rate/1000000);</div><div class='add'>+	mfn = (long)temp64;</div><div class='add'>+</div><div class='add'>+	dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);</div><div class='add'>+	/* use dpdck0_2 */</div><div class='add'>+	__raw_writel(dp_ctl | 0x1000L, pllbase + MXC_PLL_DP_CTL);</div><div class='add'>+	pll_hfsm = dp_ctl &amp; MXC_PLL_DP_CTL_HFSM;</div><div class='add'>+	if (pll_hfsm == 0) {</div><div class='add'>+		reg = mfi &lt;&lt; 4 | pdf;</div><div class='add'>+		__raw_writel(reg, pllbase + MXC_PLL_DP_OP);</div><div class='add'>+		__raw_writel(mfd, pllbase + MXC_PLL_DP_MFD);</div><div class='add'>+		__raw_writel(mfn, pllbase + MXC_PLL_DP_MFN);</div><div class='add'>+	} else {</div><div class='add'>+		reg = mfi &lt;&lt; 4 | pdf;</div><div class='add'>+		__raw_writel(reg, pllbase + MXC_PLL_DP_HFS_OP);</div><div class='add'>+		__raw_writel(mfd, pllbase + MXC_PLL_DP_HFS_MFD);</div><div class='add'>+		__raw_writel(mfn, pllbase + MXC_PLL_DP_HFS_MFN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_pllv2_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+		unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	return rate;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_pllv2_prepare(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv2 *pll = to_clk_pllv2(hw);</div><div class='add'>+	u32 reg;</div><div class='add'>+	void __iomem *pllbase;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	pllbase = pll-&gt;base;</div><div class='add'>+	reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN;</div><div class='add'>+	__raw_writel(reg, pllbase + MXC_PLL_DP_CTL);</div><div class='add'>+</div><div class='add'>+	/* Wait for lock */</div><div class='add'>+	do {</div><div class='add'>+		reg = __raw_readl(pllbase + MXC_PLL_DP_CTL);</div><div class='add'>+		if (reg &amp; MXC_PLL_DP_CTL_LRF)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		udelay(1);</div><div class='add'>+	} while (++i &lt; MAX_DPLL_WAIT_TRIES);</div><div class='add'>+</div><div class='add'>+	if (i == MAX_DPLL_WAIT_TRIES) {</div><div class='add'>+		pr_err("MX5: pll locking failed\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clk_pllv2_unprepare(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv2 *pll = to_clk_pllv2(hw);</div><div class='add'>+	u32 reg;</div><div class='add'>+	void __iomem *pllbase;</div><div class='add'>+</div><div class='add'>+	pllbase = pll-&gt;base;</div><div class='add'>+	reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) &amp; ~MXC_PLL_DP_CTL_UPEN;</div><div class='add'>+	__raw_writel(reg, pllbase + MXC_PLL_DP_CTL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct clk_ops clk_pllv2_ops = {</div><div class='add'>+	.prepare = clk_pllv2_prepare,</div><div class='add'>+	.unprepare = clk_pllv2_unprepare,</div><div class='add'>+	.recalc_rate = clk_pllv2_recalc_rate,</div><div class='add'>+	.round_rate = clk_pllv2_round_rate,</div><div class='add'>+	.set_rate = clk_pllv2_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *imx_clk_pllv2(const char *name, const char *parent,</div><div class='add'>+		void __iomem *base)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv2 *pll;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+</div><div class='add'>+	pll = kzalloc(sizeof(*pll), GFP_KERNEL);</div><div class='add'>+	if (!pll)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	pll-&gt;base = base;</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_pllv2_ops;</div><div class='add'>+	init.flags = 0;</div><div class='add'>+	init.parent_names = &amp;parent;</div><div class='add'>+	init.num_parents = 1;</div><div class='add'>+</div><div class='add'>+	pll-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;pll-&gt;hw);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(pll);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/clk-pllv3.c b/arch/arm/mach-imx/clk-pllv3.c<br/>new file mode 100644<br/>index 000000000000..36aac947bce1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk-pllv3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk-pllv3.c</a></div><div class='hunk'>@@ -0,0 +1,419 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2012 Linaro Ltd.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+#define PLL_NUM_OFFSET		0x10</div><div class='add'>+#define PLL_DENOM_OFFSET	0x20</div><div class='add'>+</div><div class='add'>+#define BM_PLL_POWER		(0x1 &lt;&lt; 12)</div><div class='add'>+#define BM_PLL_ENABLE		(0x1 &lt;&lt; 13)</div><div class='add'>+#define BM_PLL_BYPASS		(0x1 &lt;&lt; 16)</div><div class='add'>+#define BM_PLL_LOCK		(0x1 &lt;&lt; 31)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct clk_pllv3 - IMX PLL clock version 3</div><div class='add'>+ * @clk_hw:	 clock source</div><div class='add'>+ * @base:	 base address of PLL registers</div><div class='add'>+ * @powerup_set: set POWER bit to power up the PLL</div><div class='add'>+ * @gate_mask:	 mask of gate bits</div><div class='add'>+ * @div_mask:	 mask of divider bits</div><div class='add'>+ *</div><div class='add'>+ * IMX PLL clock version 3, found on i.MX6 series.  Divider for pllv3</div><div class='add'>+ * is actually a multiplier, and always sits at bit 0.</div><div class='add'>+ */</div><div class='add'>+struct clk_pllv3 {</div><div class='add'>+	struct clk_hw	hw;</div><div class='add'>+	void __iomem	*base;</div><div class='add'>+	bool		powerup_set;</div><div class='add'>+	u32		gate_mask;</div><div class='add'>+	u32		div_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define to_clk_pllv3(_hw) container_of(_hw, struct clk_pllv3, hw)</div><div class='add'>+</div><div class='add'>+static int clk_pllv3_prepare(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll = to_clk_pllv3(hw);</div><div class='add'>+	unsigned long timeout = jiffies + msecs_to_jiffies(10);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(pll-&gt;base);</div><div class='add'>+	val &amp;= ~BM_PLL_BYPASS;</div><div class='add'>+	if (pll-&gt;powerup_set)</div><div class='add'>+		val |= BM_PLL_POWER;</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~BM_PLL_POWER;</div><div class='add'>+	writel_relaxed(val, pll-&gt;base);</div><div class='add'>+</div><div class='add'>+	/* Wait for PLL to lock */</div><div class='add'>+	while (!(readl_relaxed(pll-&gt;base) &amp; BM_PLL_LOCK))</div><div class='add'>+		if (time_after(jiffies, timeout))</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clk_pllv3_unprepare(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll = to_clk_pllv3(hw);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(pll-&gt;base);</div><div class='add'>+	val |= BM_PLL_BYPASS;</div><div class='add'>+	if (pll-&gt;powerup_set)</div><div class='add'>+		val &amp;= ~BM_PLL_POWER;</div><div class='add'>+	else</div><div class='add'>+		val |= BM_PLL_POWER;</div><div class='add'>+	writel_relaxed(val, pll-&gt;base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_pllv3_enable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll = to_clk_pllv3(hw);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(pll-&gt;base);</div><div class='add'>+	val |= pll-&gt;gate_mask;</div><div class='add'>+	writel_relaxed(val, pll-&gt;base);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clk_pllv3_disable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll = to_clk_pllv3(hw);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(pll-&gt;base);</div><div class='add'>+	val &amp;= ~pll-&gt;gate_mask;</div><div class='add'>+	writel_relaxed(val, pll-&gt;base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long clk_pllv3_recalc_rate(struct clk_hw *hw,</div><div class='add'>+					   unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll = to_clk_pllv3(hw);</div><div class='add'>+	u32 div = readl_relaxed(pll-&gt;base)  &amp; pll-&gt;div_mask;</div><div class='add'>+</div><div class='add'>+	return (div == 1) ? parent_rate * 22 : parent_rate * 20;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_pllv3_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+				 unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	unsigned long parent_rate = *prate;</div><div class='add'>+</div><div class='add'>+	return (rate &gt;= parent_rate * 22) ? parent_rate * 22 :</div><div class='add'>+					    parent_rate * 20;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_pllv3_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll = to_clk_pllv3(hw);</div><div class='add'>+	u32 val, div;</div><div class='add'>+</div><div class='add'>+	if (rate == parent_rate * 22)</div><div class='add'>+		div = 1;</div><div class='add'>+	else if (rate == parent_rate * 20)</div><div class='add'>+		div = 0;</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(pll-&gt;base);</div><div class='add'>+	val &amp;= ~pll-&gt;div_mask;</div><div class='add'>+	val |= div;</div><div class='add'>+	writel_relaxed(val, pll-&gt;base);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct clk_ops clk_pllv3_ops = {</div><div class='add'>+	.prepare	= clk_pllv3_prepare,</div><div class='add'>+	.unprepare	= clk_pllv3_unprepare,</div><div class='add'>+	.enable		= clk_pllv3_enable,</div><div class='add'>+	.disable	= clk_pllv3_disable,</div><div class='add'>+	.recalc_rate	= clk_pllv3_recalc_rate,</div><div class='add'>+	.round_rate	= clk_pllv3_round_rate,</div><div class='add'>+	.set_rate	= clk_pllv3_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned long clk_pllv3_sys_recalc_rate(struct clk_hw *hw,</div><div class='add'>+					       unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll = to_clk_pllv3(hw);</div><div class='add'>+	u32 div = readl_relaxed(pll-&gt;base) &amp; pll-&gt;div_mask;</div><div class='add'>+</div><div class='add'>+	return parent_rate * div / 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_pllv3_sys_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+				     unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	unsigned long parent_rate = *prate;</div><div class='add'>+	unsigned long min_rate = parent_rate * 54 / 2;</div><div class='add'>+	unsigned long max_rate = parent_rate * 108 / 2;</div><div class='add'>+	u32 div;</div><div class='add'>+</div><div class='add'>+	if (rate &gt; max_rate)</div><div class='add'>+		rate = max_rate;</div><div class='add'>+	else if (rate &lt; min_rate)</div><div class='add'>+		rate = min_rate;</div><div class='add'>+	div = rate * 2 / parent_rate;</div><div class='add'>+</div><div class='add'>+	return parent_rate * div / 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_pllv3_sys_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll = to_clk_pllv3(hw);</div><div class='add'>+	unsigned long min_rate = parent_rate * 54 / 2;</div><div class='add'>+	unsigned long max_rate = parent_rate * 108 / 2;</div><div class='add'>+	u32 val, div;</div><div class='add'>+</div><div class='add'>+	if (rate &lt; min_rate || rate &gt; max_rate)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	div = rate * 2 / parent_rate;</div><div class='add'>+	val = readl_relaxed(pll-&gt;base);</div><div class='add'>+	val &amp;= ~pll-&gt;div_mask;</div><div class='add'>+	val |= div;</div><div class='add'>+	writel_relaxed(val, pll-&gt;base);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct clk_ops clk_pllv3_sys_ops = {</div><div class='add'>+	.prepare	= clk_pllv3_prepare,</div><div class='add'>+	.unprepare	= clk_pllv3_unprepare,</div><div class='add'>+	.enable		= clk_pllv3_enable,</div><div class='add'>+	.disable	= clk_pllv3_disable,</div><div class='add'>+	.recalc_rate	= clk_pllv3_sys_recalc_rate,</div><div class='add'>+	.round_rate	= clk_pllv3_sys_round_rate,</div><div class='add'>+	.set_rate	= clk_pllv3_sys_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned long clk_pllv3_av_recalc_rate(struct clk_hw *hw,</div><div class='add'>+					      unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll = to_clk_pllv3(hw);</div><div class='add'>+	u32 mfn = readl_relaxed(pll-&gt;base + PLL_NUM_OFFSET);</div><div class='add'>+	u32 mfd = readl_relaxed(pll-&gt;base + PLL_DENOM_OFFSET);</div><div class='add'>+	u32 div = readl_relaxed(pll-&gt;base) &amp; pll-&gt;div_mask;</div><div class='add'>+</div><div class='add'>+	return (parent_rate * div) + ((parent_rate / mfd) * mfn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_pllv3_av_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+				    unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	unsigned long parent_rate = *prate;</div><div class='add'>+	unsigned long min_rate = parent_rate * 27;</div><div class='add'>+	unsigned long max_rate = parent_rate * 54;</div><div class='add'>+	u32 div;</div><div class='add'>+	u32 mfn, mfd = 1000000;</div><div class='add'>+	s64 temp64;</div><div class='add'>+</div><div class='add'>+	if (rate &gt; max_rate)</div><div class='add'>+		rate = max_rate;</div><div class='add'>+	else if (rate &lt; min_rate)</div><div class='add'>+		rate = min_rate;</div><div class='add'>+</div><div class='add'>+	div = rate / parent_rate;</div><div class='add'>+	temp64 = (u64) (rate - div * parent_rate);</div><div class='add'>+	temp64 *= mfd;</div><div class='add'>+	do_div(temp64, parent_rate);</div><div class='add'>+	mfn = temp64;</div><div class='add'>+</div><div class='add'>+	return parent_rate * div + parent_rate / mfd * mfn;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_pllv3_av_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll = to_clk_pllv3(hw);</div><div class='add'>+	unsigned long min_rate = parent_rate * 27;</div><div class='add'>+	unsigned long max_rate = parent_rate * 54;</div><div class='add'>+	u32 val, div;</div><div class='add'>+	u32 mfn, mfd = 1000000;</div><div class='add'>+	s64 temp64;</div><div class='add'>+</div><div class='add'>+	if (rate &lt; min_rate || rate &gt; max_rate)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	div = rate / parent_rate;</div><div class='add'>+	temp64 = (u64) (rate - div * parent_rate);</div><div class='add'>+	temp64 *= mfd;</div><div class='add'>+	do_div(temp64, parent_rate);</div><div class='add'>+	mfn = temp64;</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(pll-&gt;base);</div><div class='add'>+	val &amp;= ~pll-&gt;div_mask;</div><div class='add'>+	val |= div;</div><div class='add'>+	writel_relaxed(val, pll-&gt;base);</div><div class='add'>+	writel_relaxed(mfn, pll-&gt;base + PLL_NUM_OFFSET);</div><div class='add'>+	writel_relaxed(mfd, pll-&gt;base + PLL_DENOM_OFFSET);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct clk_ops clk_pllv3_av_ops = {</div><div class='add'>+	.prepare	= clk_pllv3_prepare,</div><div class='add'>+	.unprepare	= clk_pllv3_unprepare,</div><div class='add'>+	.enable		= clk_pllv3_enable,</div><div class='add'>+	.disable	= clk_pllv3_disable,</div><div class='add'>+	.recalc_rate	= clk_pllv3_av_recalc_rate,</div><div class='add'>+	.round_rate	= clk_pllv3_av_round_rate,</div><div class='add'>+	.set_rate	= clk_pllv3_av_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned long clk_pllv3_enet_recalc_rate(struct clk_hw *hw,</div><div class='add'>+						unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll = to_clk_pllv3(hw);</div><div class='add'>+	u32 div = readl_relaxed(pll-&gt;base) &amp; pll-&gt;div_mask;</div><div class='add'>+</div><div class='add'>+	switch (div) {</div><div class='add'>+	case 0:</div><div class='add'>+		return 25000000;</div><div class='add'>+	case 1:</div><div class='add'>+		return 50000000;</div><div class='add'>+	case 2:</div><div class='add'>+		return 100000000;</div><div class='add'>+	case 3:</div><div class='add'>+		return 125000000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_pllv3_enet_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+				      unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	if (rate &gt;= 125000000)</div><div class='add'>+		rate = 125000000;</div><div class='add'>+	else if (rate &gt;= 100000000)</div><div class='add'>+		rate = 100000000;</div><div class='add'>+	else if (rate &gt;= 50000000)</div><div class='add'>+		rate = 50000000;</div><div class='add'>+	else</div><div class='add'>+		rate = 25000000;</div><div class='add'>+	return rate;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_pllv3_enet_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll = to_clk_pllv3(hw);</div><div class='add'>+	u32 val, div;</div><div class='add'>+</div><div class='add'>+	switch (rate) {</div><div class='add'>+	case 25000000:</div><div class='add'>+		div = 0;</div><div class='add'>+		break;</div><div class='add'>+	case 50000000:</div><div class='add'>+		div = 1;</div><div class='add'>+		break;</div><div class='add'>+	case 100000000:</div><div class='add'>+		div = 2;</div><div class='add'>+		break;</div><div class='add'>+	case 125000000:</div><div class='add'>+		div = 3;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(pll-&gt;base);</div><div class='add'>+	val &amp;= ~pll-&gt;div_mask;</div><div class='add'>+	val |= div;</div><div class='add'>+	writel_relaxed(val, pll-&gt;base);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct clk_ops clk_pllv3_enet_ops = {</div><div class='add'>+	.prepare	= clk_pllv3_prepare,</div><div class='add'>+	.unprepare	= clk_pllv3_unprepare,</div><div class='add'>+	.enable		= clk_pllv3_enable,</div><div class='add'>+	.disable	= clk_pllv3_disable,</div><div class='add'>+	.recalc_rate	= clk_pllv3_enet_recalc_rate,</div><div class='add'>+	.round_rate	= clk_pllv3_enet_round_rate,</div><div class='add'>+	.set_rate	= clk_pllv3_enet_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct clk_ops clk_pllv3_mlb_ops = {</div><div class='add'>+	.prepare	= clk_pllv3_prepare,</div><div class='add'>+	.unprepare	= clk_pllv3_unprepare,</div><div class='add'>+	.enable		= clk_pllv3_enable,</div><div class='add'>+	.disable	= clk_pllv3_disable,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,</div><div class='add'>+			  const char *parent_name, void __iomem *base,</div><div class='add'>+			  u32 gate_mask, u32 div_mask)</div><div class='add'>+{</div><div class='add'>+	struct clk_pllv3 *pll;</div><div class='add'>+	const struct clk_ops *ops;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+</div><div class='add'>+	pll = kzalloc(sizeof(*pll), GFP_KERNEL);</div><div class='add'>+	if (!pll)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case IMX_PLLV3_SYS:</div><div class='add'>+		ops = &amp;clk_pllv3_sys_ops;</div><div class='add'>+		break;</div><div class='add'>+	case IMX_PLLV3_USB:</div><div class='add'>+		ops = &amp;clk_pllv3_ops;</div><div class='add'>+		pll-&gt;powerup_set = true;</div><div class='add'>+		break;</div><div class='add'>+	case IMX_PLLV3_AV:</div><div class='add'>+		ops = &amp;clk_pllv3_av_ops;</div><div class='add'>+		break;</div><div class='add'>+	case IMX_PLLV3_ENET:</div><div class='add'>+		ops = &amp;clk_pllv3_enet_ops;</div><div class='add'>+		break;</div><div class='add'>+	case IMX_PLLV3_MLB:</div><div class='add'>+		ops = &amp;clk_pllv3_mlb_ops;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ops = &amp;clk_pllv3_ops;</div><div class='add'>+	}</div><div class='add'>+	pll-&gt;base = base;</div><div class='add'>+	pll-&gt;gate_mask = gate_mask;</div><div class='add'>+	pll-&gt;div_mask = div_mask;</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = ops;</div><div class='add'>+	init.flags = 0;</div><div class='add'>+	init.parent_names = &amp;parent_name;</div><div class='add'>+	init.num_parents = 1;</div><div class='add'>+</div><div class='add'>+	pll-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;pll-&gt;hw);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(pll);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h<br/>new file mode 100644<br/>index 000000000000..1bf64fe2523c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/clk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/clk.h</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+#ifndef __MACH_IMX_CLK_H</div><div class='add'>+#define __MACH_IMX_CLK_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;mach/clock.h&gt;</div><div class='add'>+</div><div class='add'>+struct clk *imx_clk_pllv1(const char *name, const char *parent,</div><div class='add'>+		void __iomem *base);</div><div class='add'>+</div><div class='add'>+struct clk *imx_clk_pllv2(const char *name, const char *parent,</div><div class='add'>+		void __iomem *base);</div><div class='add'>+</div><div class='add'>+enum imx_pllv3_type {</div><div class='add'>+	IMX_PLLV3_GENERIC,</div><div class='add'>+	IMX_PLLV3_SYS,</div><div class='add'>+	IMX_PLLV3_USB,</div><div class='add'>+	IMX_PLLV3_AV,</div><div class='add'>+	IMX_PLLV3_ENET,</div><div class='add'>+	IMX_PLLV3_MLB,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,</div><div class='add'>+		const char *parent_name, void __iomem *base, u32 gate_mask,</div><div class='add'>+		u32 div_mask);</div><div class='add'>+</div><div class='add'>+struct clk *clk_register_gate2(struct device *dev, const char *name,</div><div class='add'>+		const char *parent_name, unsigned long flags,</div><div class='add'>+		void __iomem *reg, u8 bit_idx,</div><div class='add'>+		u8 clk_gate_flags, spinlock_t *lock);</div><div class='add'>+</div><div class='add'>+static inline struct clk *imx_clk_gate2(const char *name, const char *parent,</div><div class='add'>+		void __iomem *reg, u8 shift)</div><div class='add'>+{</div><div class='add'>+	return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,</div><div class='add'>+			shift, 0, &amp;imx_ccm_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct clk *imx_clk_pfd(const char *name, const char *parent_name,</div><div class='add'>+		void __iomem *reg, u8 idx);</div><div class='add'>+</div><div class='add'>+struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,</div><div class='add'>+				 void __iomem *reg, u8 shift, u8 width,</div><div class='add'>+				 void __iomem *busy_reg, u8 busy_shift);</div><div class='add'>+</div><div class='add'>+struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,</div><div class='add'>+			     u8 width, void __iomem *busy_reg, u8 busy_shift,</div><div class='add'>+			     const char **parent_names, int num_parents);</div><div class='add'>+</div><div class='add'>+static inline struct clk *imx_clk_fixed(const char *name, int rate)</div><div class='add'>+{</div><div class='add'>+	return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct clk *imx_clk_divider(const char *name, const char *parent,</div><div class='add'>+		void __iomem *reg, u8 shift, u8 width)</div><div class='add'>+{</div><div class='add'>+	return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,</div><div class='add'>+			reg, shift, width, 0, &amp;imx_ccm_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct clk *imx_clk_gate(const char *name, const char *parent,</div><div class='add'>+		void __iomem *reg, u8 shift)</div><div class='add'>+{</div><div class='add'>+	return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,</div><div class='add'>+			shift, 0, &amp;imx_ccm_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,</div><div class='add'>+		u8 shift, u8 width, const char **parents, int num_parents)</div><div class='add'>+{</div><div class='add'>+	return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift,</div><div class='add'>+			width, 0, &amp;imx_ccm_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct clk *imx_clk_fixed_factor(const char *name,</div><div class='add'>+		const char *parent, unsigned int mult, unsigned int div)</div><div class='add'>+{</div><div class='add'>+	return clk_register_fixed_factor(NULL, name, parent,</div><div class='add'>+			CLK_SET_RATE_PARENT, mult, div);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-imx/clock-imx1.c b/arch/arm/mach-imx/clock-imx1.c<br/>deleted file mode 100644<br/>index 4aabeb241563..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/clock-imx1.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/clock-imx1.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,636 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  Copyright (C) 2008 Sascha Hauer &lt;s.hauer@pengutronix.de&gt;, Pengutronix</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='del'>- * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/math64.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/clock.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-</div><div class='del'>-#define IO_ADDR_CCM(off)	(MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off)))</div><div class='del'>-</div><div class='del'>-/* CCM register addresses */</div><div class='del'>-#define CCM_CSCR	IO_ADDR_CCM(0x0)</div><div class='del'>-#define CCM_MPCTL0	IO_ADDR_CCM(0x4)</div><div class='del'>-#define CCM_SPCTL0	IO_ADDR_CCM(0xc)</div><div class='del'>-#define CCM_PCDR	IO_ADDR_CCM(0x20)</div><div class='del'>-</div><div class='del'>-#define CCM_CSCR_CLKO_OFFSET	29</div><div class='del'>-#define CCM_CSCR_CLKO_MASK	(0x7 &lt;&lt; 29)</div><div class='del'>-#define CCM_CSCR_USB_OFFSET	26</div><div class='del'>-#define CCM_CSCR_USB_MASK	(0x7 &lt;&lt; 26)</div><div class='del'>-#define CCM_CSCR_OSC_EN_SHIFT	17</div><div class='del'>-#define CCM_CSCR_SYSTEM_SEL	(1 &lt;&lt; 16)</div><div class='del'>-#define CCM_CSCR_BCLK_OFFSET	10</div><div class='del'>-#define CCM_CSCR_BCLK_MASK	(0xf &lt;&lt; 10)</div><div class='del'>-#define CCM_CSCR_PRESC		(1 &lt;&lt; 15)</div><div class='del'>-</div><div class='del'>-#define CCM_PCDR_PCLK3_OFFSET	16</div><div class='del'>-#define CCM_PCDR_PCLK3_MASK	(0x7f &lt;&lt; 16)</div><div class='del'>-#define CCM_PCDR_PCLK2_OFFSET	4</div><div class='del'>-#define CCM_PCDR_PCLK2_MASK	(0xf &lt;&lt; 4)</div><div class='del'>-#define CCM_PCDR_PCLK1_OFFSET	0</div><div class='del'>-#define CCM_PCDR_PCLK1_MASK	0xf</div><div class='del'>-</div><div class='del'>-#define IO_ADDR_SCM(off)	(MX1_IO_ADDRESS(MX1_SCM_BASE_ADDR + (off)))</div><div class='del'>-</div><div class='del'>-/* SCM register addresses */</div><div class='del'>-#define SCM_GCCR	IO_ADDR_SCM(0xc)</div><div class='del'>-</div><div class='del'>-#define SCM_GCCR_DMA_CLK_EN_OFFSET	3</div><div class='del'>-#define SCM_GCCR_CSI_CLK_EN_OFFSET	2</div><div class='del'>-#define SCM_GCCR_MMA_CLK_EN_OFFSET	1</div><div class='del'>-#define SCM_GCCR_USBD_CLK_EN_OFFSET	0</div><div class='del'>-</div><div class='del'>-static int _clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned int reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-	reg |= 1 &lt;&lt; clk-&gt;enable_shift;</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned int reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-	reg &amp;= ~(1 &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_can_use_parent(const struct clk *clk_arr[], unsigned int size,</div><div class='del'>-			       struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; size; i++)</div><div class='del'>-		if (parent == clk_arr[i])</div><div class='del'>-			return i;</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long</div><div class='del'>-_clk_simple_round_rate(struct clk *clk, unsigned long rate, unsigned int limit)</div><div class='del'>-{</div><div class='del'>-	int div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-	if (parent_rate % rate)</div><div class='del'>-		div++;</div><div class='del'>-</div><div class='del'>-	if (div &gt; limit)</div><div class='del'>-		div = limit;</div><div class='del'>-</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_parent_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return clk-&gt;parent-&gt;round_rate(clk-&gt;parent, rate);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_parent_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return clk-&gt;parent-&gt;set_rate(clk-&gt;parent, rate);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk16m_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return 16000000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk clk16m = {</div><div class='del'>-	.get_rate = clk16m_get_rate,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = CCM_CSCR,</div><div class='del'>-	.enable_shift = CCM_CSCR_OSC_EN_SHIFT,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* in Hz */</div><div class='del'>-static unsigned long clk32_rate;</div><div class='del'>-</div><div class='del'>-static unsigned long clk32_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk32_rate;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk clk32 = {</div><div class='del'>-	.get_rate = clk32_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long clk32_premult_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) * 512;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk clk32_premult = {</div><div class='del'>-	.parent = &amp;clk32,</div><div class='del'>-	.get_rate = clk32_premult_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct clk *prem_clk_clocks[] = {</div><div class='del'>-	&amp;clk32_premult,</div><div class='del'>-	&amp;clk16m,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int prem_clk_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	unsigned int reg = __raw_readl(CCM_CSCR);</div><div class='del'>-</div><div class='del'>-	i = _clk_can_use_parent(prem_clk_clocks, ARRAY_SIZE(prem_clk_clocks),</div><div class='del'>-				parent);</div><div class='del'>-</div><div class='del'>-	switch (i) {</div><div class='del'>-	case 0:</div><div class='del'>-		reg &amp;= ~CCM_CSCR_SYSTEM_SEL;</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		reg |= CCM_CSCR_SYSTEM_SEL;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return i;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__raw_writel(reg, CCM_CSCR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk prem_clk = {</div><div class='del'>-	.set_parent = prem_clk_set_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long system_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return mxc_decode_pll(__raw_readl(CCM_SPCTL0),</div><div class='del'>-			      clk_get_rate(clk-&gt;parent));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk system_clk = {</div><div class='del'>-	.parent = &amp;prem_clk,</div><div class='del'>-	.get_rate = system_clk_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long mcu_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return mxc_decode_pll(__raw_readl(CCM_MPCTL0),</div><div class='del'>-			      clk_get_rate(clk-&gt;parent));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk mcu_clk = {</div><div class='del'>-	.parent = &amp;clk32_premult,</div><div class='del'>-	.get_rate = mcu_clk_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long fclk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long fclk = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (__raw_readl(CCM_CSCR) &amp; CCM_CSCR_PRESC)</div><div class='del'>-		fclk /= 2;</div><div class='del'>-</div><div class='del'>-	return fclk;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk fclk = {</div><div class='del'>-	.parent = &amp;mcu_clk,</div><div class='del'>-	.get_rate = fclk_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *  get hclk ( SDRAM, CSI, Memory Stick, I2C, DMA )</div><div class='del'>- */</div><div class='del'>-static unsigned long hclk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (((__raw_readl(CCM_CSCR) &amp;</div><div class='del'>-			CCM_CSCR_BCLK_MASK) &gt;&gt; CCM_CSCR_BCLK_OFFSET) + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long hclk_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return _clk_simple_round_rate(clk, rate, 16);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hclk_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned int div;</div><div class='del'>-	unsigned int reg;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-</div><div class='del'>-	if (div &gt; 16 || div &lt; 1 || ((parent_rate / div) != rate))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div--;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_CSCR);</div><div class='del'>-	reg &amp;= ~CCM_CSCR_BCLK_MASK;</div><div class='del'>-	reg |= div &lt;&lt; CCM_CSCR_BCLK_OFFSET;</div><div class='del'>-	__raw_writel(reg, CCM_CSCR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk hclk = {</div><div class='del'>-	.parent = &amp;system_clk,</div><div class='del'>-	.get_rate = hclk_get_rate,</div><div class='del'>-	.round_rate = hclk_round_rate,</div><div class='del'>-	.set_rate = hclk_set_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long clk48m_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (((__raw_readl(CCM_CSCR) &amp;</div><div class='del'>-			CCM_CSCR_USB_MASK) &gt;&gt; CCM_CSCR_USB_OFFSET) + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk48m_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return _clk_simple_round_rate(clk, rate, 8);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int clk48m_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned int div;</div><div class='del'>-	unsigned int reg;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-</div><div class='del'>-	if (div &gt; 8 || div &lt; 1 || ((parent_rate / div) != rate))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div--;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_CSCR);</div><div class='del'>-	reg &amp;= ~CCM_CSCR_USB_MASK;</div><div class='del'>-	reg |= div &lt;&lt; CCM_CSCR_USB_OFFSET;</div><div class='del'>-	__raw_writel(reg, CCM_CSCR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk clk48m = {</div><div class='del'>-	.parent = &amp;system_clk,</div><div class='del'>-	.get_rate = clk48m_get_rate,</div><div class='del'>-	.round_rate = clk48m_round_rate,</div><div class='del'>-	.set_rate = clk48m_set_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *  get peripheral clock 1 ( UART[12], Timer[12], PWM )</div><div class='del'>- */</div><div class='del'>-static unsigned long perclk1_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (((__raw_readl(CCM_PCDR) &amp;</div><div class='del'>-			CCM_PCDR_PCLK1_MASK) &gt;&gt; CCM_PCDR_PCLK1_OFFSET) + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long perclk1_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return _clk_simple_round_rate(clk, rate, 16);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int perclk1_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned int div;</div><div class='del'>-	unsigned int reg;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-</div><div class='del'>-	if (div &gt; 16 || div &lt; 1 || ((parent_rate / div) != rate))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div--;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_PCDR);</div><div class='del'>-	reg &amp;= ~CCM_PCDR_PCLK1_MASK;</div><div class='del'>-	reg |= div &lt;&lt; CCM_PCDR_PCLK1_OFFSET;</div><div class='del'>-	__raw_writel(reg, CCM_PCDR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *  get peripheral clock 2 ( LCD, SD, SPI[12] )</div><div class='del'>- */</div><div class='del'>-static unsigned long perclk2_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (((__raw_readl(CCM_PCDR) &amp;</div><div class='del'>-			CCM_PCDR_PCLK2_MASK) &gt;&gt; CCM_PCDR_PCLK2_OFFSET) + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long perclk2_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return _clk_simple_round_rate(clk, rate, 16);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int perclk2_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned int div;</div><div class='del'>-	unsigned int reg;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-</div><div class='del'>-	if (div &gt; 16 || div &lt; 1 || ((parent_rate / div) != rate))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div--;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_PCDR);</div><div class='del'>-	reg &amp;= ~CCM_PCDR_PCLK2_MASK;</div><div class='del'>-	reg |= div &lt;&lt; CCM_PCDR_PCLK2_OFFSET;</div><div class='del'>-	__raw_writel(reg, CCM_PCDR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *  get peripheral clock 3 ( SSI )</div><div class='del'>- */</div><div class='del'>-static unsigned long perclk3_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (((__raw_readl(CCM_PCDR) &amp;</div><div class='del'>-			CCM_PCDR_PCLK3_MASK) &gt;&gt; CCM_PCDR_PCLK3_OFFSET) + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long perclk3_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return _clk_simple_round_rate(clk, rate, 128);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int perclk3_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned int div;</div><div class='del'>-	unsigned int reg;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-</div><div class='del'>-	if (div &gt; 128 || div &lt; 1 || ((parent_rate / div) != rate))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div--;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_PCDR);</div><div class='del'>-	reg &amp;= ~CCM_PCDR_PCLK3_MASK;</div><div class='del'>-	reg |= div &lt;&lt; CCM_PCDR_PCLK3_OFFSET;</div><div class='del'>-	__raw_writel(reg, CCM_PCDR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk perclk[] = {</div><div class='del'>-	{</div><div class='del'>-		.id = 0,</div><div class='del'>-		.parent = &amp;system_clk,</div><div class='del'>-		.get_rate = perclk1_get_rate,</div><div class='del'>-		.round_rate = perclk1_round_rate,</div><div class='del'>-		.set_rate = perclk1_set_rate,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 1,</div><div class='del'>-		.parent = &amp;system_clk,</div><div class='del'>-		.get_rate = perclk2_get_rate,</div><div class='del'>-		.round_rate = perclk2_round_rate,</div><div class='del'>-		.set_rate = perclk2_set_rate,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 2,</div><div class='del'>-		.parent = &amp;system_clk,</div><div class='del'>-		.get_rate = perclk3_get_rate,</div><div class='del'>-		.round_rate = perclk3_round_rate,</div><div class='del'>-		.set_rate = perclk3_set_rate,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct clk *clko_clocks[] = {</div><div class='del'>-	&amp;perclk[0],</div><div class='del'>-	&amp;hclk,</div><div class='del'>-	&amp;clk48m,</div><div class='del'>-	&amp;clk16m,</div><div class='del'>-	&amp;prem_clk,</div><div class='del'>-	&amp;fclk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int clko_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	unsigned int reg;</div><div class='del'>-</div><div class='del'>-	i = _clk_can_use_parent(clko_clocks, ARRAY_SIZE(clko_clocks), parent);</div><div class='del'>-	if (i &lt; 0)</div><div class='del'>-		return i;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_CSCR) &amp; ~CCM_CSCR_CLKO_MASK;</div><div class='del'>-	reg |= i &lt;&lt; CCM_CSCR_CLKO_OFFSET;</div><div class='del'>-	__raw_writel(reg, CCM_CSCR);</div><div class='del'>-</div><div class='del'>-	if (clko_clocks[i]-&gt;set_rate &amp;&amp; clko_clocks[i]-&gt;round_rate) {</div><div class='del'>-		clk-&gt;set_rate = _clk_parent_set_rate;</div><div class='del'>-		clk-&gt;round_rate = _clk_parent_round_rate;</div><div class='del'>-	} else {</div><div class='del'>-		clk-&gt;set_rate = NULL;</div><div class='del'>-		clk-&gt;round_rate = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk clko_clk = {</div><div class='del'>-	.set_parent = clko_set_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk dma_clk = {</div><div class='del'>-	.parent = &amp;hclk,</div><div class='del'>-	.round_rate = _clk_parent_round_rate,</div><div class='del'>-	.set_rate = _clk_parent_set_rate,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = SCM_GCCR,</div><div class='del'>-	.enable_shift = SCM_GCCR_DMA_CLK_EN_OFFSET,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk csi_clk = {</div><div class='del'>-	.parent = &amp;hclk,</div><div class='del'>-	.round_rate = _clk_parent_round_rate,</div><div class='del'>-	.set_rate = _clk_parent_set_rate,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = SCM_GCCR,</div><div class='del'>-	.enable_shift = SCM_GCCR_CSI_CLK_EN_OFFSET,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk mma_clk = {</div><div class='del'>-	.parent = &amp;hclk,</div><div class='del'>-	.round_rate = _clk_parent_round_rate,</div><div class='del'>-	.set_rate = _clk_parent_set_rate,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = SCM_GCCR,</div><div class='del'>-	.enable_shift = SCM_GCCR_MMA_CLK_EN_OFFSET,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk usbd_clk = {</div><div class='del'>-	.parent = &amp;clk48m,</div><div class='del'>-	.round_rate = _clk_parent_round_rate,</div><div class='del'>-	.set_rate = _clk_parent_set_rate,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = SCM_GCCR,</div><div class='del'>-	.enable_shift = SCM_GCCR_USBD_CLK_EN_OFFSET,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk gpt_clk = {</div><div class='del'>-	.parent = &amp;perclk[0],</div><div class='del'>-	.round_rate = _clk_parent_round_rate,</div><div class='del'>-	.set_rate = _clk_parent_set_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk uart_clk = {</div><div class='del'>-	.parent = &amp;perclk[0],</div><div class='del'>-	.round_rate = _clk_parent_round_rate,</div><div class='del'>-	.set_rate = _clk_parent_set_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk i2c_clk = {</div><div class='del'>-	.parent = &amp;hclk,</div><div class='del'>-	.round_rate = _clk_parent_round_rate,</div><div class='del'>-	.set_rate = _clk_parent_set_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk spi_clk = {</div><div class='del'>-	.parent = &amp;perclk[1],</div><div class='del'>-	.round_rate = _clk_parent_round_rate,</div><div class='del'>-	.set_rate = _clk_parent_set_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk sdhc_clk = {</div><div class='del'>-	.parent = &amp;perclk[1],</div><div class='del'>-	.round_rate = _clk_parent_round_rate,</div><div class='del'>-	.set_rate = _clk_parent_set_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk lcdc_clk = {</div><div class='del'>-	.parent = &amp;perclk[1],</div><div class='del'>-	.round_rate = _clk_parent_round_rate,</div><div class='del'>-	.set_rate = _clk_parent_set_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk mshc_clk = {</div><div class='del'>-	.parent = &amp;hclk,</div><div class='del'>-	.round_rate = _clk_parent_round_rate,</div><div class='del'>-	.set_rate = _clk_parent_set_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ssi_clk = {</div><div class='del'>-	.parent = &amp;perclk[2],</div><div class='del'>-	.round_rate = _clk_parent_round_rate,</div><div class='del'>-	.set_rate = _clk_parent_set_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk rtc_clk = {</div><div class='del'>-	.parent = &amp;clk32,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define _REGISTER_CLOCK(d, n, c) \</div><div class='del'>-	{ \</div><div class='del'>-		.dev_id = d, \</div><div class='del'>-		.con_id = n, \</div><div class='del'>-		.clk = &amp;c, \</div><div class='del'>-	},</div><div class='del'>-static struct clk_lookup lookups[] __initdata = {</div><div class='del'>-	_REGISTER_CLOCK(NULL, "dma", dma_clk)</div><div class='del'>-	_REGISTER_CLOCK("mx1-camera.0", NULL, csi_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "mma", mma_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx_udc.0", NULL, usbd_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt", gpt_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx1-uart.0", NULL, uart_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx1-uart.1", NULL, uart_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx1-uart.2", NULL, uart_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx1-cspi.0", NULL, spi_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx1-cspi.1", NULL, spi_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-mmc.0", NULL, sdhc_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "mshc", mshc_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "ssi", ssi_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_rtc.0", NULL, rtc_clk)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int __init mx1_clocks_init(unsigned long fref)</div><div class='del'>-{</div><div class='del'>-	unsigned int reg;</div><div class='del'>-</div><div class='del'>-	/* disable clocks we are able to */</div><div class='del'>-	__raw_writel(0, SCM_GCCR);</div><div class='del'>-</div><div class='del'>-	clk32_rate = fref;</div><div class='del'>-	reg = __raw_readl(CCM_CSCR);</div><div class='del'>-</div><div class='del'>-	/* detect clock reference for system PLL */</div><div class='del'>-	if (reg &amp; CCM_CSCR_SYSTEM_SEL) {</div><div class='del'>-		prem_clk.parent = &amp;clk16m;</div><div class='del'>-	} else {</div><div class='del'>-		/* ensure that oscillator is disabled */</div><div class='del'>-		reg &amp;= ~(1 &lt;&lt; CCM_CSCR_OSC_EN_SHIFT);</div><div class='del'>-		__raw_writel(reg, CCM_CSCR);</div><div class='del'>-		prem_clk.parent = &amp;clk32_premult;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* detect reference for CLKO */</div><div class='del'>-	reg = (reg &amp; CCM_CSCR_CLKO_MASK) &gt;&gt; CCM_CSCR_CLKO_OFFSET;</div><div class='del'>-	clko_clk.parent = (struct clk *)clko_clocks[reg];</div><div class='del'>-</div><div class='del'>-	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='del'>-</div><div class='del'>-	clk_enable(&amp;hclk);</div><div class='del'>-	clk_enable(&amp;fclk);</div><div class='del'>-</div><div class='del'>-	mxc_timer_init(&amp;gpt_clk, MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR),</div><div class='del'>-			MX1_TIM1_INT);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-imx/clock-imx21.c b/arch/arm/mach-imx/clock-imx21.c<br/>deleted file mode 100644<br/>index ee15d8c9db08..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/clock-imx21.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/clock-imx21.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1239 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='del'>- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de</div><div class='del'>- * Copyright 2008 Martin Fuzzey, mfuzzey@gmail.com</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation; either version 2</div><div class='del'>- * of the License, or (at your option) any later version.</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,</div><div class='del'>- * MA 02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/clock.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-#include &lt;asm/div64.h&gt;</div><div class='del'>-</div><div class='del'>-#define IO_ADDR_CCM(off)	(MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))</div><div class='del'>-</div><div class='del'>-/* Register offsets */</div><div class='del'>-#define CCM_CSCR		IO_ADDR_CCM(0x0)</div><div class='del'>-#define CCM_MPCTL0		IO_ADDR_CCM(0x4)</div><div class='del'>-#define CCM_MPCTL1		IO_ADDR_CCM(0x8)</div><div class='del'>-#define CCM_SPCTL0		IO_ADDR_CCM(0xc)</div><div class='del'>-#define CCM_SPCTL1		IO_ADDR_CCM(0x10)</div><div class='del'>-#define CCM_OSC26MCTL		IO_ADDR_CCM(0x14)</div><div class='del'>-#define CCM_PCDR0		IO_ADDR_CCM(0x18)</div><div class='del'>-#define CCM_PCDR1		IO_ADDR_CCM(0x1c)</div><div class='del'>-#define CCM_PCCR0		IO_ADDR_CCM(0x20)</div><div class='del'>-#define CCM_PCCR1		IO_ADDR_CCM(0x24)</div><div class='del'>-#define CCM_CCSR		IO_ADDR_CCM(0x28)</div><div class='del'>-#define CCM_PMCTL		IO_ADDR_CCM(0x2c)</div><div class='del'>-#define CCM_PMCOUNT		IO_ADDR_CCM(0x30)</div><div class='del'>-#define CCM_WKGDCTL		IO_ADDR_CCM(0x34)</div><div class='del'>-</div><div class='del'>-#define CCM_CSCR_PRESC_OFFSET	29</div><div class='del'>-#define CCM_CSCR_PRESC_MASK	(0x7 &lt;&lt; CCM_CSCR_PRESC_OFFSET)</div><div class='del'>-</div><div class='del'>-#define CCM_CSCR_USB_OFFSET	26</div><div class='del'>-#define CCM_CSCR_USB_MASK	(0x7 &lt;&lt; CCM_CSCR_USB_OFFSET)</div><div class='del'>-#define CCM_CSCR_SD_OFFSET	24</div><div class='del'>-#define CCM_CSCR_SD_MASK	(0x3 &lt;&lt; CCM_CSCR_SD_OFFSET)</div><div class='del'>-#define CCM_CSCR_SPLLRES	(1 &lt;&lt; 22)</div><div class='del'>-#define CCM_CSCR_MPLLRES	(1 &lt;&lt; 21)</div><div class='del'>-#define CCM_CSCR_SSI2_OFFSET	20</div><div class='del'>-#define CCM_CSCR_SSI2		(1 &lt;&lt; CCM_CSCR_SSI2_OFFSET)</div><div class='del'>-#define CCM_CSCR_SSI1_OFFSET	19</div><div class='del'>-#define CCM_CSCR_SSI1		(1 &lt;&lt; CCM_CSCR_SSI1_OFFSET)</div><div class='del'>-#define CCM_CSCR_FIR_OFFSET	18</div><div class='del'>-#define CCM_CSCR_FIR		(1 &lt;&lt; CCM_CSCR_FIR_OFFSET)</div><div class='del'>-#define CCM_CSCR_SP		(1 &lt;&lt; 17)</div><div class='del'>-#define CCM_CSCR_MCU		(1 &lt;&lt; 16)</div><div class='del'>-#define CCM_CSCR_BCLK_OFFSET	10</div><div class='del'>-#define CCM_CSCR_BCLK_MASK	(0xf &lt;&lt; CCM_CSCR_BCLK_OFFSET)</div><div class='del'>-#define CCM_CSCR_IPDIV_OFFSET	9</div><div class='del'>-#define CCM_CSCR_IPDIV		(1 &lt;&lt; CCM_CSCR_IPDIV_OFFSET)</div><div class='del'>-</div><div class='del'>-#define CCM_CSCR_OSC26MDIV	(1 &lt;&lt; 4)</div><div class='del'>-#define CCM_CSCR_OSC26M		(1 &lt;&lt; 3)</div><div class='del'>-#define CCM_CSCR_FPM		(1 &lt;&lt; 2)</div><div class='del'>-#define CCM_CSCR_SPEN		(1 &lt;&lt; 1)</div><div class='del'>-#define CCM_CSCR_MPEN		1</div><div class='del'>-</div><div class='del'>-#define CCM_MPCTL0_CPLM		(1 &lt;&lt; 31)</div><div class='del'>-#define CCM_MPCTL0_PD_OFFSET	26</div><div class='del'>-#define CCM_MPCTL0_PD_MASK	(0xf &lt;&lt; 26)</div><div class='del'>-#define CCM_MPCTL0_MFD_OFFSET	16</div><div class='del'>-#define CCM_MPCTL0_MFD_MASK	(0x3ff &lt;&lt; 16)</div><div class='del'>-#define CCM_MPCTL0_MFI_OFFSET	10</div><div class='del'>-#define CCM_MPCTL0_MFI_MASK	(0xf &lt;&lt; 10)</div><div class='del'>-#define CCM_MPCTL0_MFN_OFFSET	0</div><div class='del'>-#define CCM_MPCTL0_MFN_MASK	0x3ff</div><div class='del'>-</div><div class='del'>-#define CCM_MPCTL1_LF		(1 &lt;&lt; 15)</div><div class='del'>-#define CCM_MPCTL1_BRMO		(1 &lt;&lt; 6)</div><div class='del'>-</div><div class='del'>-#define CCM_SPCTL0_CPLM		(1 &lt;&lt; 31)</div><div class='del'>-#define CCM_SPCTL0_PD_OFFSET	26</div><div class='del'>-#define CCM_SPCTL0_PD_MASK	(0xf &lt;&lt; 26)</div><div class='del'>-#define CCM_SPCTL0_MFD_OFFSET	16</div><div class='del'>-#define CCM_SPCTL0_MFD_MASK	(0x3ff &lt;&lt; 16)</div><div class='del'>-#define CCM_SPCTL0_MFI_OFFSET	10</div><div class='del'>-#define CCM_SPCTL0_MFI_MASK	(0xf &lt;&lt; 10)</div><div class='del'>-#define CCM_SPCTL0_MFN_OFFSET	0</div><div class='del'>-#define CCM_SPCTL0_MFN_MASK	0x3ff</div><div class='del'>-</div><div class='del'>-#define CCM_SPCTL1_LF		(1 &lt;&lt; 15)</div><div class='del'>-#define CCM_SPCTL1_BRMO		(1 &lt;&lt; 6)</div><div class='del'>-</div><div class='del'>-#define CCM_OSC26MCTL_PEAK_OFFSET	16</div><div class='del'>-#define CCM_OSC26MCTL_PEAK_MASK		(0x3 &lt;&lt; 16)</div><div class='del'>-#define CCM_OSC26MCTL_AGC_OFFSET	8</div><div class='del'>-#define CCM_OSC26MCTL_AGC_MASK		(0x3f &lt;&lt; 8)</div><div class='del'>-#define CCM_OSC26MCTL_ANATEST_OFFSET	0</div><div class='del'>-#define CCM_OSC26MCTL_ANATEST_MASK	0x3f</div><div class='del'>-</div><div class='del'>-#define CCM_PCDR0_SSI2BAUDDIV_OFFSET	26</div><div class='del'>-#define CCM_PCDR0_SSI2BAUDDIV_MASK	(0x3f &lt;&lt; 26)</div><div class='del'>-#define CCM_PCDR0_SSI1BAUDDIV_OFFSET	16</div><div class='del'>-#define CCM_PCDR0_SSI1BAUDDIV_MASK	(0x3f &lt;&lt; 16)</div><div class='del'>-#define CCM_PCDR0_NFCDIV_OFFSET		12</div><div class='del'>-#define CCM_PCDR0_NFCDIV_MASK		(0xf &lt;&lt; 12)</div><div class='del'>-#define CCM_PCDR0_48MDIV_OFFSET		5</div><div class='del'>-#define CCM_PCDR0_48MDIV_MASK		(0x7 &lt;&lt; CCM_PCDR0_48MDIV_OFFSET)</div><div class='del'>-#define CCM_PCDR0_FIRIDIV_OFFSET	0</div><div class='del'>-#define CCM_PCDR0_FIRIDIV_MASK		0x1f</div><div class='del'>-#define CCM_PCDR1_PERDIV4_OFFSET	24</div><div class='del'>-#define CCM_PCDR1_PERDIV4_MASK		(0x3f &lt;&lt; 24)</div><div class='del'>-#define CCM_PCDR1_PERDIV3_OFFSET	16</div><div class='del'>-#define CCM_PCDR1_PERDIV3_MASK		(0x3f &lt;&lt; 16)</div><div class='del'>-#define CCM_PCDR1_PERDIV2_OFFSET	8</div><div class='del'>-#define CCM_PCDR1_PERDIV2_MASK		(0x3f &lt;&lt; 8)</div><div class='del'>-#define CCM_PCDR1_PERDIV1_OFFSET	0</div><div class='del'>-#define CCM_PCDR1_PERDIV1_MASK		0x3f</div><div class='del'>-</div><div class='del'>-#define CCM_PCCR_HCLK_CSI_OFFSET	31</div><div class='del'>-#define CCM_PCCR_HCLK_CSI_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_HCLK_DMA_OFFSET	30</div><div class='del'>-#define CCM_PCCR_HCLK_DMA_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_HCLK_BROM_OFFSET	28</div><div class='del'>-#define CCM_PCCR_HCLK_BROM_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_HCLK_EMMA_OFFSET	27</div><div class='del'>-#define CCM_PCCR_HCLK_EMMA_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_HCLK_LCDC_OFFSET	26</div><div class='del'>-#define CCM_PCCR_HCLK_LCDC_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_HCLK_SLCDC_OFFSET	25</div><div class='del'>-#define CCM_PCCR_HCLK_SLCDC_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_HCLK_USBOTG_OFFSET	24</div><div class='del'>-#define CCM_PCCR_HCLK_USBOTG_REG	CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_HCLK_BMI_OFFSET	23</div><div class='del'>-#define CCM_PCCR_BMI_MASK		(1 &lt;&lt; CCM_PCCR_BMI_MASK)</div><div class='del'>-#define CCM_PCCR_HCLK_BMI_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_PERCLK4_OFFSET		22</div><div class='del'>-#define CCM_PCCR_PERCLK4_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_SLCDC_OFFSET		21</div><div class='del'>-#define CCM_PCCR_SLCDC_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_FIRI_BAUD_OFFSET	20</div><div class='del'>-#define CCM_PCCR_FIRI_BAUD_MASK		(1 &lt;&lt; CCM_PCCR_FIRI_BAUD_MASK)</div><div class='del'>-#define CCM_PCCR_FIRI_BAUD_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_NFC_OFFSET		19</div><div class='del'>-#define CCM_PCCR_NFC_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_LCDC_OFFSET		18</div><div class='del'>-#define CCM_PCCR_LCDC_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_SSI1_BAUD_OFFSET	17</div><div class='del'>-#define CCM_PCCR_SSI1_BAUD_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_SSI2_BAUD_OFFSET	16</div><div class='del'>-#define CCM_PCCR_SSI2_BAUD_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_EMMA_OFFSET		15</div><div class='del'>-#define CCM_PCCR_EMMA_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_USBOTG_OFFSET		14</div><div class='del'>-#define CCM_PCCR_USBOTG_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_DMA_OFFSET		13</div><div class='del'>-#define CCM_PCCR_DMA_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_I2C1_OFFSET		12</div><div class='del'>-#define CCM_PCCR_I2C1_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_GPIO_OFFSET		11</div><div class='del'>-#define CCM_PCCR_GPIO_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_SDHC2_OFFSET		10</div><div class='del'>-#define CCM_PCCR_SDHC2_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_SDHC1_OFFSET		9</div><div class='del'>-#define CCM_PCCR_SDHC1_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_FIRI_OFFSET		8</div><div class='del'>-#define CCM_PCCR_FIRI_MASK		(1 &lt;&lt; CCM_PCCR_BAUD_MASK)</div><div class='del'>-#define CCM_PCCR_FIRI_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_SSI2_IPG_OFFSET	7</div><div class='del'>-#define CCM_PCCR_SSI2_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_SSI1_IPG_OFFSET	6</div><div class='del'>-#define CCM_PCCR_SSI1_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_CSPI2_OFFSET		5</div><div class='del'>-#define	CCM_PCCR_CSPI2_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_CSPI1_OFFSET		4</div><div class='del'>-#define	CCM_PCCR_CSPI1_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_UART4_OFFSET		3</div><div class='del'>-#define CCM_PCCR_UART4_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_UART3_OFFSET		2</div><div class='del'>-#define CCM_PCCR_UART3_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_UART2_OFFSET		1</div><div class='del'>-#define CCM_PCCR_UART2_REG		CCM_PCCR0</div><div class='del'>-#define CCM_PCCR_UART1_OFFSET		0</div><div class='del'>-#define CCM_PCCR_UART1_REG		CCM_PCCR0</div><div class='del'>-</div><div class='del'>-#define CCM_PCCR_OWIRE_OFFSET		31</div><div class='del'>-#define CCM_PCCR_OWIRE_REG		CCM_PCCR1</div><div class='del'>-#define CCM_PCCR_KPP_OFFSET		30</div><div class='del'>-#define CCM_PCCR_KPP_REG		CCM_PCCR1</div><div class='del'>-#define CCM_PCCR_RTC_OFFSET		29</div><div class='del'>-#define CCM_PCCR_RTC_REG		CCM_PCCR1</div><div class='del'>-#define CCM_PCCR_PWM_OFFSET		28</div><div class='del'>-#define CCM_PCCR_PWM_REG		CCM_PCCR1</div><div class='del'>-#define CCM_PCCR_GPT3_OFFSET		27</div><div class='del'>-#define CCM_PCCR_GPT3_REG		CCM_PCCR1</div><div class='del'>-#define CCM_PCCR_GPT2_OFFSET		26</div><div class='del'>-#define CCM_PCCR_GPT2_REG		CCM_PCCR1</div><div class='del'>-#define CCM_PCCR_GPT1_OFFSET		25</div><div class='del'>-#define CCM_PCCR_GPT1_REG		CCM_PCCR1</div><div class='del'>-#define CCM_PCCR_WDT_OFFSET		24</div><div class='del'>-#define CCM_PCCR_WDT_REG		CCM_PCCR1</div><div class='del'>-#define CCM_PCCR_CSPI3_OFFSET		23</div><div class='del'>-#define	CCM_PCCR_CSPI3_REG		CCM_PCCR1</div><div class='del'>-</div><div class='del'>-#define CCM_PCCR_CSPI1_MASK		(1 &lt;&lt; CCM_PCCR_CSPI1_OFFSET)</div><div class='del'>-#define CCM_PCCR_CSPI2_MASK		(1 &lt;&lt; CCM_PCCR_CSPI2_OFFSET)</div><div class='del'>-#define CCM_PCCR_CSPI3_MASK		(1 &lt;&lt; CCM_PCCR_CSPI3_OFFSET)</div><div class='del'>-#define CCM_PCCR_DMA_MASK		(1 &lt;&lt; CCM_PCCR_DMA_OFFSET)</div><div class='del'>-#define CCM_PCCR_EMMA_MASK		(1 &lt;&lt; CCM_PCCR_EMMA_OFFSET)</div><div class='del'>-#define CCM_PCCR_GPIO_MASK		(1 &lt;&lt; CCM_PCCR_GPIO_OFFSET)</div><div class='del'>-#define CCM_PCCR_GPT1_MASK		(1 &lt;&lt; CCM_PCCR_GPT1_OFFSET)</div><div class='del'>-#define CCM_PCCR_GPT2_MASK		(1 &lt;&lt; CCM_PCCR_GPT2_OFFSET)</div><div class='del'>-#define CCM_PCCR_GPT3_MASK		(1 &lt;&lt; CCM_PCCR_GPT3_OFFSET)</div><div class='del'>-#define CCM_PCCR_HCLK_BROM_MASK		(1 &lt;&lt; CCM_PCCR_HCLK_BROM_OFFSET)</div><div class='del'>-#define CCM_PCCR_HCLK_CSI_MASK		(1 &lt;&lt; CCM_PCCR_HCLK_CSI_OFFSET)</div><div class='del'>-#define CCM_PCCR_HCLK_DMA_MASK		(1 &lt;&lt; CCM_PCCR_HCLK_DMA_OFFSET)</div><div class='del'>-#define CCM_PCCR_HCLK_EMMA_MASK		(1 &lt;&lt; CCM_PCCR_HCLK_EMMA_OFFSET)</div><div class='del'>-#define CCM_PCCR_HCLK_LCDC_MASK		(1 &lt;&lt; CCM_PCCR_HCLK_LCDC_OFFSET)</div><div class='del'>-#define CCM_PCCR_HCLK_SLCDC_MASK	(1 &lt;&lt; CCM_PCCR_HCLK_SLCDC_OFFSET)</div><div class='del'>-#define CCM_PCCR_HCLK_USBOTG_MASK	(1 &lt;&lt; CCM_PCCR_HCLK_USBOTG_OFFSET)</div><div class='del'>-#define CCM_PCCR_I2C1_MASK		(1 &lt;&lt; CCM_PCCR_I2C1_OFFSET)</div><div class='del'>-#define CCM_PCCR_KPP_MASK		(1 &lt;&lt; CCM_PCCR_KPP_OFFSET)</div><div class='del'>-#define CCM_PCCR_LCDC_MASK		(1 &lt;&lt; CCM_PCCR_LCDC_OFFSET)</div><div class='del'>-#define CCM_PCCR_NFC_MASK		(1 &lt;&lt; CCM_PCCR_NFC_OFFSET)</div><div class='del'>-#define CCM_PCCR_OWIRE_MASK		(1 &lt;&lt; CCM_PCCR_OWIRE_OFFSET)</div><div class='del'>-#define CCM_PCCR_PERCLK4_MASK		(1 &lt;&lt; CCM_PCCR_PERCLK4_OFFSET)</div><div class='del'>-#define CCM_PCCR_PWM_MASK		(1 &lt;&lt; CCM_PCCR_PWM_OFFSET)</div><div class='del'>-#define CCM_PCCR_RTC_MASK		(1 &lt;&lt; CCM_PCCR_RTC_OFFSET)</div><div class='del'>-#define CCM_PCCR_SDHC1_MASK		(1 &lt;&lt; CCM_PCCR_SDHC1_OFFSET)</div><div class='del'>-#define CCM_PCCR_SDHC2_MASK		(1 &lt;&lt; CCM_PCCR_SDHC2_OFFSET)</div><div class='del'>-#define CCM_PCCR_SLCDC_MASK		(1 &lt;&lt; CCM_PCCR_SLCDC_OFFSET)</div><div class='del'>-#define CCM_PCCR_SSI1_BAUD_MASK		(1 &lt;&lt; CCM_PCCR_SSI1_BAUD_OFFSET)</div><div class='del'>-#define CCM_PCCR_SSI1_IPG_MASK		(1 &lt;&lt; CCM_PCCR_SSI1_IPG_OFFSET)</div><div class='del'>-#define CCM_PCCR_SSI2_BAUD_MASK		(1 &lt;&lt; CCM_PCCR_SSI2_BAUD_OFFSET)</div><div class='del'>-#define CCM_PCCR_SSI2_IPG_MASK		(1 &lt;&lt; CCM_PCCR_SSI2_IPG_OFFSET)</div><div class='del'>-#define CCM_PCCR_UART1_MASK		(1 &lt;&lt; CCM_PCCR_UART1_OFFSET)</div><div class='del'>-#define CCM_PCCR_UART2_MASK		(1 &lt;&lt; CCM_PCCR_UART2_OFFSET)</div><div class='del'>-#define CCM_PCCR_UART3_MASK		(1 &lt;&lt; CCM_PCCR_UART3_OFFSET)</div><div class='del'>-#define CCM_PCCR_UART4_MASK		(1 &lt;&lt; CCM_PCCR_UART4_OFFSET)</div><div class='del'>-#define CCM_PCCR_USBOTG_MASK		(1 &lt;&lt; CCM_PCCR_USBOTG_OFFSET)</div><div class='del'>-#define CCM_PCCR_WDT_MASK		(1 &lt;&lt; CCM_PCCR_WDT_OFFSET)</div><div class='del'>-</div><div class='del'>-#define CCM_CCSR_32KSR		(1 &lt;&lt; 15)</div><div class='del'>-</div><div class='del'>-#define CCM_CCSR_CLKMODE1	(1 &lt;&lt; 9)</div><div class='del'>-#define CCM_CCSR_CLKMODE0	(1 &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-#define CCM_CCSR_CLKOSEL_OFFSET 0</div><div class='del'>-#define CCM_CCSR_CLKOSEL_MASK	0x1f</div><div class='del'>-</div><div class='del'>-#define SYS_FMCR		0x14	/* Functional Muxing Control Reg */</div><div class='del'>-#define SYS_CHIP_ID		0x00	/* The offset of CHIP ID register */</div><div class='del'>-</div><div class='del'>-static int _clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-	reg |= 1 &lt;&lt; clk-&gt;enable_shift;</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-	reg &amp;= ~(1 &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_generic_round_rate(struct clk *clk,</div><div class='del'>-			unsigned long rate,</div><div class='del'>-			u32 max_divisor)</div><div class='del'>-{</div><div class='del'>-	u32 div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-	if (parent_rate % rate)</div><div class='del'>-		div++;</div><div class='del'>-</div><div class='del'>-	if (div &gt; max_divisor)</div><div class='del'>-		div = max_divisor;</div><div class='del'>-</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_spll_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_CSCR);</div><div class='del'>-	reg |= CCM_CSCR_SPEN;</div><div class='del'>-	__raw_writel(reg, CCM_CSCR);</div><div class='del'>-</div><div class='del'>-	while ((__raw_readl(CCM_SPCTL1) &amp; CCM_SPCTL1_LF) == 0)</div><div class='del'>-		;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _clk_spll_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_CSCR);</div><div class='del'>-	reg &amp;= ~CCM_CSCR_SPEN;</div><div class='del'>-	__raw_writel(reg, CCM_CSCR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define CSCR() (__raw_readl(CCM_CSCR))</div><div class='del'>-#define PCDR0() (__raw_readl(CCM_PCDR0))</div><div class='del'>-#define PCDR1() (__raw_readl(CCM_PCDR1))</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_perclkx_round_rate(struct clk *clk,</div><div class='del'>-					     unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return _clk_generic_round_rate(clk, rate, 64);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_perclkx_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	u32 div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;id &lt; 0 || clk-&gt;id &gt; 3)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-	if (div &gt; 64 || div &lt; 1 || ((parent_rate / div) != rate))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	div--;</div><div class='del'>-</div><div class='del'>-	reg =</div><div class='del'>-	    __raw_readl(CCM_PCDR1) &amp; ~(CCM_PCDR1_PERDIV1_MASK &lt;&lt;</div><div class='del'>-				       (clk-&gt;id &lt;&lt; 3));</div><div class='del'>-	reg |= div &lt;&lt; (clk-&gt;id &lt;&lt; 3);</div><div class='del'>-	__raw_writel(reg, CCM_PCDR1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_usb_recalc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long usb_pdf;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	usb_pdf = (CSCR() &amp; CCM_CSCR_USB_MASK) &gt;&gt; CCM_CSCR_USB_OFFSET;</div><div class='del'>-</div><div class='del'>-	return parent_rate / (usb_pdf + 1U);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_usb_round_rate(struct clk *clk,</div><div class='del'>-					     unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return _clk_generic_round_rate(clk, rate, 8);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_usb_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	u32 div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-	if (div &gt; 8 || div &lt; 1 || ((parent_rate / div) != rate))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	div--;</div><div class='del'>-</div><div class='del'>-	reg = CSCR() &amp; ~CCM_CSCR_USB_MASK;</div><div class='del'>-	reg |= div &lt;&lt; CCM_CSCR_USB_OFFSET;</div><div class='del'>-	__raw_writel(reg, CCM_CSCR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_ssix_recalc(struct clk *clk, unsigned long pdf)</div><div class='del'>-{</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	pdf = (pdf &lt; 2) ? 124UL : pdf;  /* MX21 &amp; MX27 TO1 */</div><div class='del'>-</div><div class='del'>-	return 2UL * parent_rate / pdf;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_ssi1_recalc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return _clk_ssix_recalc(clk,</div><div class='del'>-		(PCDR0() &amp; CCM_PCDR0_SSI1BAUDDIV_MASK)</div><div class='del'>-		&gt;&gt; CCM_PCDR0_SSI1BAUDDIV_OFFSET);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_ssi2_recalc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return _clk_ssix_recalc(clk,</div><div class='del'>-		(PCDR0() &amp; CCM_PCDR0_SSI2BAUDDIV_MASK) &gt;&gt;</div><div class='del'>-		CCM_PCDR0_SSI2BAUDDIV_OFFSET);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_nfc_recalc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long nfc_pdf;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	nfc_pdf = (PCDR0() &amp; CCM_PCDR0_NFCDIV_MASK)</div><div class='del'>-		&gt;&gt; CCM_PCDR0_NFCDIV_OFFSET;</div><div class='del'>-</div><div class='del'>-	return parent_rate / (nfc_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_parent_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return clk-&gt;parent-&gt;round_rate(clk-&gt;parent, rate);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_parent_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return clk-&gt;parent-&gt;set_rate(clk-&gt;parent, rate);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long external_high_reference; /* in Hz */</div><div class='del'>-</div><div class='del'>-static unsigned long get_high_reference_clock_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return external_high_reference;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * the high frequency external clock reference</div><div class='del'>- * Default case is 26MHz.</div><div class='del'>- */</div><div class='del'>-static struct clk ckih_clk = {</div><div class='del'>-	.get_rate = get_high_reference_clock_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long external_low_reference; /* in Hz */</div><div class='del'>-</div><div class='del'>-static unsigned long get_low_reference_clock_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return external_low_reference;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * the low frequency external clock reference</div><div class='del'>- * Default case is 32.768kHz.</div><div class='del'>- */</div><div class='del'>-static struct clk ckil_clk = {</div><div class='del'>-	.get_rate = get_low_reference_clock_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_fpm_recalc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) * 512;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Output of frequency pre multiplier */</div><div class='del'>-static struct clk fpm_clk = {</div><div class='del'>-	.parent = &amp;ckil_clk,</div><div class='del'>-	.get_rate = _clk_fpm_recalc,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long get_mpll_clk(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	uint32_t reg;</div><div class='del'>-	unsigned long ref_clk;</div><div class='del'>-	unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0;</div><div class='del'>-	unsigned long long temp;</div><div class='del'>-</div><div class='del'>-	ref_clk = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_MPCTL0);</div><div class='del'>-	pdf = (reg &amp; CCM_MPCTL0_PD_MASK)  &gt;&gt; CCM_MPCTL0_PD_OFFSET;</div><div class='del'>-	mfd = (reg &amp; CCM_MPCTL0_MFD_MASK) &gt;&gt; CCM_MPCTL0_MFD_OFFSET;</div><div class='del'>-	mfi = (reg &amp; CCM_MPCTL0_MFI_MASK) &gt;&gt; CCM_MPCTL0_MFI_OFFSET;</div><div class='del'>-	mfn = (reg &amp; CCM_MPCTL0_MFN_MASK) &gt;&gt; CCM_MPCTL0_MFN_OFFSET;</div><div class='del'>-</div><div class='del'>-	mfi = (mfi &lt;= 5) ? 5 : mfi;</div><div class='del'>-	temp = 2LL * ref_clk * mfn;</div><div class='del'>-	do_div(temp, mfd + 1);</div><div class='del'>-	temp = 2LL * ref_clk * mfi + temp;</div><div class='del'>-	do_div(temp, pdf + 1);</div><div class='del'>-</div><div class='del'>-	return (unsigned long)temp;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk mpll_clk = {</div><div class='del'>-	.parent = &amp;ckih_clk,</div><div class='del'>-	.get_rate = get_mpll_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_fclk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-	u32 div;</div><div class='del'>-</div><div class='del'>-	div = (CSCR() &amp; CCM_CSCR_PRESC_MASK) &gt;&gt; CCM_CSCR_PRESC_OFFSET;</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	return parent_rate / (div+1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk fclk_clk = {</div><div class='del'>-	.parent = &amp;mpll_clk,</div><div class='del'>-	.get_rate = _clk_fclk_get_rate</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long get_spll_clk(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	uint32_t reg;</div><div class='del'>-	unsigned long ref_clk;</div><div class='del'>-	unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0;</div><div class='del'>-	unsigned long long temp;</div><div class='del'>-</div><div class='del'>-	ref_clk = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_SPCTL0);</div><div class='del'>-	pdf = (reg &amp; CCM_SPCTL0_PD_MASK) &gt;&gt; CCM_SPCTL0_PD_OFFSET;</div><div class='del'>-	mfd = (reg &amp; CCM_SPCTL0_MFD_MASK) &gt;&gt; CCM_SPCTL0_MFD_OFFSET;</div><div class='del'>-	mfi = (reg &amp; CCM_SPCTL0_MFI_MASK) &gt;&gt; CCM_SPCTL0_MFI_OFFSET;</div><div class='del'>-	mfn = (reg &amp; CCM_SPCTL0_MFN_MASK) &gt;&gt; CCM_SPCTL0_MFN_OFFSET;</div><div class='del'>-</div><div class='del'>-	mfi = (mfi &lt;= 5) ? 5 : mfi;</div><div class='del'>-	temp = 2LL * ref_clk * mfn;</div><div class='del'>-	do_div(temp, mfd + 1);</div><div class='del'>-	temp = 2LL * ref_clk * mfi + temp;</div><div class='del'>-	do_div(temp, pdf + 1);</div><div class='del'>-</div><div class='del'>-	return (unsigned long)temp;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk spll_clk = {</div><div class='del'>-	.parent = &amp;ckih_clk,</div><div class='del'>-	.get_rate = get_spll_clk,</div><div class='del'>-	.enable = _clk_spll_enable,</div><div class='del'>-	.disable = _clk_spll_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long get_hclk_clk(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate;</div><div class='del'>-	unsigned long bclk_pdf;</div><div class='del'>-</div><div class='del'>-	bclk_pdf = (CSCR() &amp; CCM_CSCR_BCLK_MASK)</div><div class='del'>-		&gt;&gt; CCM_CSCR_BCLK_OFFSET;</div><div class='del'>-</div><div class='del'>-	rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	return rate / (bclk_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk hclk_clk = {</div><div class='del'>-	.parent = &amp;fclk_clk,</div><div class='del'>-	.get_rate = get_hclk_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long get_ipg_clk(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate;</div><div class='del'>-	unsigned long ipg_pdf;</div><div class='del'>-</div><div class='del'>-	ipg_pdf = (CSCR() &amp; CCM_CSCR_IPDIV) &gt;&gt; CCM_CSCR_IPDIV_OFFSET;</div><div class='del'>-</div><div class='del'>-	rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	return rate / (ipg_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk ipg_clk = {</div><div class='del'>-	.parent = &amp;hclk_clk,</div><div class='del'>-	.get_rate = get_ipg_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_perclkx_recalc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long perclk_pdf;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;id &lt; 0 || clk-&gt;id &gt; 3)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	perclk_pdf = (PCDR1() &gt;&gt; (clk-&gt;id &lt;&lt; 3)) &amp; CCM_PCDR1_PERDIV1_MASK;</div><div class='del'>-</div><div class='del'>-	return parent_rate / (perclk_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk per_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.id = 0,</div><div class='del'>-		.parent = &amp;mpll_clk,</div><div class='del'>-		.get_rate = _clk_perclkx_recalc,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 1,</div><div class='del'>-		.parent = &amp;mpll_clk,</div><div class='del'>-		.get_rate = _clk_perclkx_recalc,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 2,</div><div class='del'>-		.parent = &amp;mpll_clk,</div><div class='del'>-		.round_rate = _clk_perclkx_round_rate,</div><div class='del'>-		.set_rate = _clk_perclkx_set_rate,</div><div class='del'>-		.get_rate = _clk_perclkx_recalc,</div><div class='del'>-		/* Enable/Disable done via lcd_clkc[1] */</div><div class='del'>-	}, {</div><div class='del'>-		.id = 3,</div><div class='del'>-		.parent = &amp;mpll_clk,</div><div class='del'>-		.round_rate = _clk_perclkx_round_rate,</div><div class='del'>-		.set_rate = _clk_perclkx_set_rate,</div><div class='del'>-		.get_rate = _clk_perclkx_recalc,</div><div class='del'>-		/* Enable/Disable done via csi_clk[1] */</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk uart_ipg_clk[];</div><div class='del'>-</div><div class='del'>-static struct clk uart_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.id = 0,</div><div class='del'>-		.parent = &amp;per_clk[0],</div><div class='del'>-		.secondary = &amp;uart_ipg_clk[0],</div><div class='del'>-	}, {</div><div class='del'>-		.id = 1,</div><div class='del'>-		.parent = &amp;per_clk[0],</div><div class='del'>-		.secondary = &amp;uart_ipg_clk[1],</div><div class='del'>-	}, {</div><div class='del'>-		.id = 2,</div><div class='del'>-		.parent = &amp;per_clk[0],</div><div class='del'>-		.secondary = &amp;uart_ipg_clk[2],</div><div class='del'>-	}, {</div><div class='del'>-		.id = 3,</div><div class='del'>-		.parent = &amp;per_clk[0],</div><div class='del'>-		.secondary = &amp;uart_ipg_clk[3],</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk uart_ipg_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.id = 0,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_UART1_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_UART1_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 1,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_UART2_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_UART2_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 2,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_UART3_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_UART3_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 3,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_UART4_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_UART4_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk gpt_ipg_clk[];</div><div class='del'>-</div><div class='del'>-static struct clk gpt_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.id = 0,</div><div class='del'>-		.parent = &amp;per_clk[0],</div><div class='del'>-		.secondary = &amp;gpt_ipg_clk[0],</div><div class='del'>-	}, {</div><div class='del'>-		.id = 1,</div><div class='del'>-		.parent = &amp;per_clk[0],</div><div class='del'>-		.secondary = &amp;gpt_ipg_clk[1],</div><div class='del'>-	}, {</div><div class='del'>-		.id = 2,</div><div class='del'>-		.parent = &amp;per_clk[0],</div><div class='del'>-		.secondary = &amp;gpt_ipg_clk[2],</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk gpt_ipg_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.id = 0,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_GPT1_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_GPT1_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 1,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_GPT2_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_GPT2_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 2,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_GPT3_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_GPT3_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk pwm_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.parent = &amp;per_clk[0],</div><div class='del'>-		.secondary = &amp;pwm_clk[1],</div><div class='del'>-	}, {</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_PWM_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_PWM_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk sdhc_ipg_clk[];</div><div class='del'>-</div><div class='del'>-static struct clk sdhc_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.id = 0,</div><div class='del'>-		.parent = &amp;per_clk[1],</div><div class='del'>-		.secondary = &amp;sdhc_ipg_clk[0],</div><div class='del'>-	}, {</div><div class='del'>-		.id = 1,</div><div class='del'>-		.parent = &amp;per_clk[1],</div><div class='del'>-		.secondary = &amp;sdhc_ipg_clk[1],</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk sdhc_ipg_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.id = 0,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_SDHC1_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_SDHC1_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 1,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_SDHC2_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_SDHC2_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk cspi_ipg_clk[];</div><div class='del'>-</div><div class='del'>-static struct clk cspi_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.id = 0,</div><div class='del'>-		.parent = &amp;per_clk[1],</div><div class='del'>-		.secondary = &amp;cspi_ipg_clk[0],</div><div class='del'>-	}, {</div><div class='del'>-		.id = 1,</div><div class='del'>-		.parent = &amp;per_clk[1],</div><div class='del'>-		.secondary = &amp;cspi_ipg_clk[1],</div><div class='del'>-	}, {</div><div class='del'>-		.id = 2,</div><div class='del'>-		.parent = &amp;per_clk[1],</div><div class='del'>-		.secondary = &amp;cspi_ipg_clk[2],</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk cspi_ipg_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.id = 0,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_CSPI1_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_CSPI1_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 1,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_CSPI2_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_CSPI2_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 3,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_CSPI3_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_CSPI3_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk lcdc_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.parent = &amp;per_clk[2],</div><div class='del'>-		.secondary = &amp;lcdc_clk[1],</div><div class='del'>-		.round_rate = _clk_parent_round_rate,</div><div class='del'>-		.set_rate = _clk_parent_set_rate,</div><div class='del'>-	}, {</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.secondary = &amp;lcdc_clk[2],</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_LCDC_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_LCDC_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}, {</div><div class='del'>-		.parent = &amp;hclk_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_HCLK_LCDC_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_HCLK_LCDC_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk csi_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.parent = &amp;per_clk[3],</div><div class='del'>-		.secondary = &amp;csi_clk[1],</div><div class='del'>-		.round_rate = _clk_parent_round_rate,</div><div class='del'>-		.set_rate = _clk_parent_set_rate,</div><div class='del'>-	}, {</div><div class='del'>-		.parent = &amp;hclk_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_HCLK_CSI_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_HCLK_CSI_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk usb_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.parent = &amp;spll_clk,</div><div class='del'>-		.secondary = &amp;usb_clk[1],</div><div class='del'>-		.get_rate = _clk_usb_recalc,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_USBOTG_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_USBOTG_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-		.round_rate = _clk_usb_round_rate,</div><div class='del'>-		.set_rate = _clk_usb_set_rate,</div><div class='del'>-	}, {</div><div class='del'>-		.parent = &amp;hclk_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_HCLK_USBOTG_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_HCLK_USBOTG_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ssi_ipg_clk[];</div><div class='del'>-</div><div class='del'>-static struct clk ssi_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.id = 0,</div><div class='del'>-		.parent = &amp;mpll_clk,</div><div class='del'>-		.secondary = &amp;ssi_ipg_clk[0],</div><div class='del'>-		.get_rate = _clk_ssi1_recalc,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_SSI1_BAUD_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_SSI1_BAUD_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 1,</div><div class='del'>-		.parent = &amp;mpll_clk,</div><div class='del'>-		.secondary = &amp;ssi_ipg_clk[1],</div><div class='del'>-		.get_rate = _clk_ssi2_recalc,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_SSI2_BAUD_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_SSI2_BAUD_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ssi_ipg_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.id = 0,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_SSI1_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_SSI1_IPG_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}, {</div><div class='del'>-		.id = 1,</div><div class='del'>-		.parent = &amp;ipg_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_SSI2_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_SSI2_IPG_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static struct clk nfc_clk = {</div><div class='del'>-	.parent = &amp;fclk_clk,</div><div class='del'>-	.get_rate = _clk_nfc_recalc,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = CCM_PCCR_NFC_REG,</div><div class='del'>-	.enable_shift = CCM_PCCR_NFC_OFFSET,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk dma_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.parent = &amp;hclk_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_DMA_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_DMA_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-		.secondary = &amp;dma_clk[1],</div><div class='del'>-	},  {</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_HCLK_DMA_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_HCLK_DMA_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk brom_clk = {</div><div class='del'>-	.parent = &amp;hclk_clk,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = CCM_PCCR_HCLK_BROM_REG,</div><div class='del'>-	.enable_shift = CCM_PCCR_HCLK_BROM_OFFSET,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk emma_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.parent = &amp;hclk_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_EMMA_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_EMMA_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-		.secondary = &amp;emma_clk[1],</div><div class='del'>-	}, {</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_HCLK_EMMA_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_HCLK_EMMA_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk slcdc_clk[] = {</div><div class='del'>-	{</div><div class='del'>-		.parent = &amp;hclk_clk,</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_SLCDC_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_SLCDC_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-		.secondary = &amp;slcdc_clk[1],</div><div class='del'>-	}, {</div><div class='del'>-		.enable = _clk_enable,</div><div class='del'>-		.enable_reg = CCM_PCCR_HCLK_SLCDC_REG,</div><div class='del'>-		.enable_shift = CCM_PCCR_HCLK_SLCDC_OFFSET,</div><div class='del'>-		.disable = _clk_disable,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk wdog_clk = {</div><div class='del'>-	.parent = &amp;ipg_clk,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = CCM_PCCR_WDT_REG,</div><div class='del'>-	.enable_shift = CCM_PCCR_WDT_OFFSET,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk gpio_clk = {</div><div class='del'>-	.parent = &amp;ipg_clk,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = CCM_PCCR_GPIO_REG,</div><div class='del'>-	.enable_shift = CCM_PCCR_GPIO_OFFSET,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk i2c_clk = {</div><div class='del'>-	.id = 0,</div><div class='del'>-	.parent = &amp;ipg_clk,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = CCM_PCCR_I2C1_REG,</div><div class='del'>-	.enable_shift = CCM_PCCR_I2C1_OFFSET,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk kpp_clk = {</div><div class='del'>-	.parent = &amp;ipg_clk,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = CCM_PCCR_KPP_REG,</div><div class='del'>-	.enable_shift = CCM_PCCR_KPP_OFFSET,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk owire_clk = {</div><div class='del'>-	.parent = &amp;ipg_clk,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = CCM_PCCR_OWIRE_REG,</div><div class='del'>-	.enable_shift = CCM_PCCR_OWIRE_OFFSET,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk rtc_clk = {</div><div class='del'>-	.parent = &amp;ipg_clk,</div><div class='del'>-	.enable = _clk_enable,</div><div class='del'>-	.enable_reg = CCM_PCCR_RTC_REG,</div><div class='del'>-	.enable_shift = CCM_PCCR_RTC_OFFSET,</div><div class='del'>-	.disable = _clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_clko_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return _clk_generic_round_rate(clk, rate, 8);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_clko_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	u32 div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-</div><div class='del'>-	if (div &gt; 8 || div &lt; 1 || ((parent_rate / div) != rate))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	div--;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_PCDR0);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;parent == &amp;usb_clk[0]) {</div><div class='del'>-		reg &amp;= ~CCM_PCDR0_48MDIV_MASK;</div><div class='del'>-		reg |= div &lt;&lt; CCM_PCDR0_48MDIV_OFFSET;</div><div class='del'>-	}</div><div class='del'>-	__raw_writel(reg, CCM_PCDR0);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_clko_recalc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 div = 0;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;parent == &amp;usb_clk[0]) /* 48M */</div><div class='del'>-		div = __raw_readl(CCM_PCDR0) &amp; CCM_PCDR0_48MDIV_MASK</div><div class='del'>-			 &gt;&gt; CCM_PCDR0_48MDIV_OFFSET;</div><div class='del'>-	div++;</div><div class='del'>-</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk clko_clk;</div><div class='del'>-</div><div class='del'>-static int _clk_clko_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_CCSR) &amp; ~CCM_CCSR_CLKOSEL_MASK;</div><div class='del'>-</div><div class='del'>-	if (parent == &amp;ckil_clk)</div><div class='del'>-		reg |= 0 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;fpm_clk)</div><div class='del'>-		reg |= 1 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;ckih_clk)</div><div class='del'>-		reg |= 2 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == mpll_clk.parent)</div><div class='del'>-		reg |= 3 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == spll_clk.parent)</div><div class='del'>-		reg |= 4 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;mpll_clk)</div><div class='del'>-		reg |= 5 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;spll_clk)</div><div class='del'>-		reg |= 6 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;fclk_clk)</div><div class='del'>-		reg |= 7 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;hclk_clk)</div><div class='del'>-		reg |= 8 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;ipg_clk)</div><div class='del'>-		reg |= 9 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;per_clk[0])</div><div class='del'>-		reg |= 0xA &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;per_clk[1])</div><div class='del'>-		reg |= 0xB &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;per_clk[2])</div><div class='del'>-		reg |= 0xC &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;per_clk[3])</div><div class='del'>-		reg |= 0xD &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;ssi_clk[0])</div><div class='del'>-		reg |= 0xE &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;ssi_clk[1])</div><div class='del'>-		reg |= 0xF &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;nfc_clk)</div><div class='del'>-		reg |= 0x10 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;usb_clk[0])</div><div class='del'>-		reg |= 0x14 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else if (parent == &amp;clko_clk)</div><div class='del'>-		reg |= 0x15 &lt;&lt; CCM_CCSR_CLKOSEL_OFFSET;</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	__raw_writel(reg, CCM_CCSR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk clko_clk = {</div><div class='del'>-	.get_rate = _clk_clko_recalc,</div><div class='del'>-	.set_rate = _clk_clko_set_rate,</div><div class='del'>-	.round_rate = _clk_clko_round_rate,</div><div class='del'>-	.set_parent = _clk_clko_set_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define _REGISTER_CLOCK(d, n, c) \</div><div class='del'>-	{ \</div><div class='del'>-		.dev_id = d, \</div><div class='del'>-		.con_id = n, \</div><div class='del'>-		.clk = &amp;c, \</div><div class='del'>-	},</div><div class='del'>-static struct clk_lookup lookups[] = {</div><div class='del'>-/* It's unlikely that any driver wants one of them directly:</div><div class='del'>-	_REGISTER_CLOCK(NULL, "ckih", ckih_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "ckil", ckil_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "fpm", fpm_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "mpll", mpll_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "spll", spll_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "fclk", fclk_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "hclk", hclk_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "ipg", ipg_clk)</div><div class='del'>-*/</div><div class='del'>-	_REGISTER_CLOCK(NULL, "perclk1", per_clk[0])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "perclk2", per_clk[1])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "perclk3", per_clk[2])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "perclk4", per_clk[3])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "clko", clko_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.0", NULL, uart_clk[0])</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.1", NULL, uart_clk[1])</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.2", NULL, uart_clk[2])</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.3", NULL, uart_clk[3])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt1", gpt_clk[0])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt1", gpt_clk[1])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt1", gpt_clk[2])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "pwm", pwm_clk[0])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "sdhc1", sdhc_clk[0])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "sdhc2", sdhc_clk[1])</div><div class='del'>-	_REGISTER_CLOCK("imx21-cspi.0", NULL, cspi_clk[0])</div><div class='del'>-	_REGISTER_CLOCK("imx21-cspi.1", NULL, cspi_clk[1])</div><div class='del'>-	_REGISTER_CLOCK("imx21-cspi.2", NULL, cspi_clk[2])</div><div class='del'>-	_REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk[0])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "csi", csi_clk[0])</div><div class='del'>-	_REGISTER_CLOCK("imx21-hcd.0", NULL, usb_clk[0])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "ssi1", ssi_clk[0])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "ssi2", ssi_clk[1])</div><div class='del'>-	_REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "dma", dma_clk[0])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "brom", brom_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "emma", emma_clk[0])</div><div class='del'>-	_REGISTER_CLOCK(NULL, "slcdc", slcdc_clk[0])</div><div class='del'>-	_REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpio", gpio_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "owire", owire_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "rtc", rtc_clk)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * must be called very early to get information about the</div><div class='del'>- * available clock rate when the timer framework starts</div><div class='del'>- */</div><div class='del'>-int __init mx21_clocks_init(unsigned long lref, unsigned long href)</div><div class='del'>-{</div><div class='del'>-	u32 cscr;</div><div class='del'>-</div><div class='del'>-	external_low_reference = lref;</div><div class='del'>-	external_high_reference = href;</div><div class='del'>-</div><div class='del'>-	/* detect clock reference for both system PLL */</div><div class='del'>-	cscr = CSCR();</div><div class='del'>-	if (cscr &amp; CCM_CSCR_MCU)</div><div class='del'>-		mpll_clk.parent = &amp;ckih_clk;</div><div class='del'>-	else</div><div class='del'>-		mpll_clk.parent = &amp;fpm_clk;</div><div class='del'>-</div><div class='del'>-	if (cscr &amp; CCM_CSCR_SP)</div><div class='del'>-		spll_clk.parent = &amp;ckih_clk;</div><div class='del'>-	else</div><div class='del'>-		spll_clk.parent = &amp;fpm_clk;</div><div class='del'>-</div><div class='del'>-	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='del'>-</div><div class='del'>-	/* Turn off all clock gates */</div><div class='del'>-	__raw_writel(0, CCM_PCCR0);</div><div class='del'>-	__raw_writel(CCM_PCCR_GPT1_MASK, CCM_PCCR1);</div><div class='del'>-</div><div class='del'>-	/* This turns of the serial PLL as well */</div><div class='del'>-	spll_clk.disable(&amp;spll_clk);</div><div class='del'>-</div><div class='del'>-	/* This will propagate to all children and init all the clock rates. */</div><div class='del'>-	clk_enable(&amp;per_clk[0]);</div><div class='del'>-	clk_enable(&amp;gpio_clk);</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_DEBUG_LL) &amp;&amp; !defined(CONFIG_DEBUG_ICEDCC)</div><div class='del'>-	clk_enable(&amp;uart_clk[0]);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	mxc_timer_init(&amp;gpt_clk[0], MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR),</div><div class='del'>-			MX21_INT_GPT1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c<br/>deleted file mode 100644<br/>index b0fec74c8c91..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/clock-imx25.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/clock-imx25.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,346 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2009 by Sascha Hauer, Pengutronix</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation; either version 2</div><div class='del'>- * of the License, or (at your option) any later version.</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,</div><div class='del'>- * MA 02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/clock.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-#include &lt;mach/mx25.h&gt;</div><div class='del'>-</div><div class='del'>-#define CRM_BASE	MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)</div><div class='del'>-</div><div class='del'>-#define CCM_MPCTL	0x00</div><div class='del'>-#define CCM_UPCTL	0x04</div><div class='del'>-#define CCM_CCTL	0x08</div><div class='del'>-#define CCM_CGCR0	0x0C</div><div class='del'>-#define CCM_CGCR1	0x10</div><div class='del'>-#define CCM_CGCR2	0x14</div><div class='del'>-#define CCM_PCDR0	0x18</div><div class='del'>-#define CCM_PCDR1	0x1C</div><div class='del'>-#define CCM_PCDR2	0x20</div><div class='del'>-#define CCM_PCDR3	0x24</div><div class='del'>-#define CCM_RCSR	0x28</div><div class='del'>-#define CCM_CRDR	0x2C</div><div class='del'>-#define CCM_DCVR0	0x30</div><div class='del'>-#define CCM_DCVR1	0x34</div><div class='del'>-#define CCM_DCVR2	0x38</div><div class='del'>-#define CCM_DCVR3	0x3c</div><div class='del'>-#define CCM_LTR0	0x40</div><div class='del'>-#define CCM_LTR1	0x44</div><div class='del'>-#define CCM_LTR2	0x48</div><div class='del'>-#define CCM_LTR3	0x4c</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_mpll(void)</div><div class='del'>-{</div><div class='del'>-	ulong mpctl = __raw_readl(CRM_BASE + CCM_MPCTL);</div><div class='del'>-</div><div class='del'>-	return mxc_decode_pll(mpctl, 24000000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_upll(void)</div><div class='del'>-{</div><div class='del'>-	ulong mpctl = __raw_readl(CRM_BASE + CCM_UPCTL);</div><div class='del'>-</div><div class='del'>-	return mxc_decode_pll(mpctl, 24000000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned long get_rate_arm(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long cctl = readl(CRM_BASE + CCM_CCTL);</div><div class='del'>-	unsigned long rate = get_rate_mpll();</div><div class='del'>-</div><div class='del'>-	if (cctl &amp; (1 &lt;&lt; 14))</div><div class='del'>-		rate = (rate * 3) &gt;&gt; 2;</div><div class='del'>-</div><div class='del'>-	return rate / ((cctl &gt;&gt; 30) + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ahb(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long cctl = readl(CRM_BASE + CCM_CCTL);</div><div class='del'>-</div><div class='del'>-	return get_rate_arm(NULL) / (((cctl &gt;&gt; 28) &amp; 0x3) + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ipg(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_ahb(NULL) &gt;&gt; 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_per(int per)</div><div class='del'>-{</div><div class='del'>-	unsigned long ofs = (per &amp; 0x3) * 8;</div><div class='del'>-	unsigned long reg = per &amp; ~0x3;</div><div class='del'>-	unsigned long val = (readl(CRM_BASE + CCM_PCDR0 + reg) &gt;&gt; ofs) &amp; 0x3f;</div><div class='del'>-	unsigned long fref;</div><div class='del'>-</div><div class='del'>-	if (readl(CRM_BASE + 0x64) &amp; (1 &lt;&lt; per))</div><div class='del'>-		fref = get_rate_upll();</div><div class='del'>-	else</div><div class='del'>-		fref = get_rate_ahb(NULL);</div><div class='del'>-</div><div class='del'>-	return fref / (val + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_uart(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_per(15);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ssi2(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_per(14);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ssi1(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_per(13);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_i2c(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_per(6);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_nfc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_per(8);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_gpt(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_per(5);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_lcdc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_per(7);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_esdhc1(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_per(3);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_esdhc2(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_per(4);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_csi(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_per(0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_otg(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long cctl = readl(CRM_BASE + CCM_CCTL);</div><div class='del'>-	unsigned long rate = get_rate_upll();</div><div class='del'>-</div><div class='del'>-	return (cctl &amp; (1 &lt;&lt; 23)) ? 0 : rate / ((0x3F &amp; (cctl &gt;&gt; 16)) + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int clk_cgcr_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-	reg |= 1 &lt;&lt; clk-&gt;enable_shift;</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clk_cgcr_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-	reg &amp;= ~(1 &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define DEFINE_CLOCK(name, i, er, es, gr, sr, s)	\</div><div class='del'>-	static struct clk name = {			\</div><div class='del'>-		.id		= i,			\</div><div class='del'>-		.enable_reg	= CRM_BASE + er,	\</div><div class='del'>-		.enable_shift	= es,			\</div><div class='del'>-		.get_rate	= gr,			\</div><div class='del'>-		.set_rate	= sr,			\</div><div class='del'>-		.enable		= clk_cgcr_enable,	\</div><div class='del'>-		.disable	= clk_cgcr_disable,	\</div><div class='del'>-		.secondary	= s,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Note: the following IPG clock gating bits are wrongly marked "Reserved" in</div><div class='del'>- * the i.MX25 Reference Manual Rev 1, table 15-13. The information below is</div><div class='del'>- * taken from the Freescale released BSP.</div><div class='del'>- *</div><div class='del'>- * bit	reg	offset	clock</div><div class='del'>- *</div><div class='del'>- * 0	CGCR1	0	AUDMUX</div><div class='del'>- * 12	CGCR1	12	ESAI</div><div class='del'>- * 16	CGCR1	16	GPIO1</div><div class='del'>- * 17	CGCR1	17	GPIO2</div><div class='del'>- * 18	CGCR1	18	GPIO3</div><div class='del'>- * 23	CGCR1	23	I2C1</div><div class='del'>- * 24	CGCR1	24	I2C2</div><div class='del'>- * 25	CGCR1	25	I2C3</div><div class='del'>- * 27	CGCR1	27	IOMUXC</div><div class='del'>- * 28	CGCR1	28	KPP</div><div class='del'>- * 30	CGCR1	30	OWIRE</div><div class='del'>- * 36	CGCR2	4	RTIC</div><div class='del'>- * 51	CGCR2	19	WDOG</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(gpt_clk,    0, CCM_CGCR0,  5, get_rate_gpt, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(ssi1_per_clk, 0, CCM_CGCR0, 13, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(ssi2_per_clk, 0, CCM_CGCR0, 14, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(cspi1_clk,  0, CCM_CGCR1,  5, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(cspi2_clk,  0, CCM_CGCR1,  6, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(cspi3_clk,  0, CCM_CGCR1,  7, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(esdhc1_ahb_clk, 0, CCM_CGCR0, 21, get_rate_esdhc1,	 NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(esdhc1_per_clk, 0, CCM_CGCR0,  3, get_rate_esdhc1,	 NULL,</div><div class='del'>-		&amp;esdhc1_ahb_clk);</div><div class='del'>-DEFINE_CLOCK(esdhc2_ahb_clk, 0, CCM_CGCR0, 22, get_rate_esdhc2,	 NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(esdhc2_per_clk, 0, CCM_CGCR0,  4, get_rate_esdhc2,	 NULL,</div><div class='del'>-		&amp;esdhc2_ahb_clk);</div><div class='del'>-DEFINE_CLOCK(sdma_ahb_clk, 0, CCM_CGCR0, 26, NULL,	 NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL,	 NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(lcdc_ahb_clk, 0, CCM_CGCR0, 24, NULL,	 NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(lcdc_per_clk, 0, CCM_CGCR0,  7, NULL,	 NULL, &amp;lcdc_ahb_clk);</div><div class='del'>-DEFINE_CLOCK(csi_ahb_clk, 0, CCM_CGCR0, 18, get_rate_csi, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(csi_per_clk, 0, CCM_CGCR0, 0, get_rate_csi, NULL, &amp;csi_ahb_clk);</div><div class='del'>-DEFINE_CLOCK(uart1_clk,  0, CCM_CGCR2, 14, get_rate_uart, NULL, &amp;uart_per_clk);</div><div class='del'>-DEFINE_CLOCK(uart2_clk,  0, CCM_CGCR2, 15, get_rate_uart, NULL, &amp;uart_per_clk);</div><div class='del'>-DEFINE_CLOCK(uart3_clk,  0, CCM_CGCR2, 16, get_rate_uart, NULL, &amp;uart_per_clk);</div><div class='del'>-DEFINE_CLOCK(uart4_clk,  0, CCM_CGCR2, 17, get_rate_uart, NULL, &amp;uart_per_clk);</div><div class='del'>-DEFINE_CLOCK(uart5_clk,  0, CCM_CGCR2, 18, get_rate_uart, NULL, &amp;uart_per_clk);</div><div class='del'>-DEFINE_CLOCK(nfc_clk,    0, CCM_CGCR0,  8, get_rate_nfc, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(pwm1_clk,	 0, CCM_CGCR1, 31, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(pwm2_clk,	 0, CCM_CGCR2,  0, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(pwm3_clk,	 0, CCM_CGCR2,  1, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(pwm4_clk,	 0, CCM_CGCR2,  2, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(kpp_clk,	 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(tsc_clk,	 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(i2c_clk,	 0, CCM_CGCR0,  6, get_rate_i2c, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(fec_clk,	 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &amp;fec_ahb_clk);</div><div class='del'>-DEFINE_CLOCK(dryice_clk, 0, CCM_CGCR1,  8, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(lcdc_clk,	 0, CCM_CGCR1, 29, get_rate_lcdc, NULL, &amp;lcdc_per_clk);</div><div class='del'>-DEFINE_CLOCK(wdt_clk,    0, CCM_CGCR2, 19, get_rate_ipg, NULL,  NULL);</div><div class='del'>-DEFINE_CLOCK(ssi1_clk,  0, CCM_CGCR2, 11, get_rate_ssi1, NULL, &amp;ssi1_per_clk);</div><div class='del'>-DEFINE_CLOCK(ssi2_clk,  1, CCM_CGCR2, 12, get_rate_ssi2, NULL, &amp;ssi2_per_clk);</div><div class='del'>-DEFINE_CLOCK(sdma_clk, 0, CCM_CGCR2,  6, get_rate_ipg, NULL, &amp;sdma_ahb_clk);</div><div class='del'>-DEFINE_CLOCK(esdhc1_clk,  0, CCM_CGCR1, 13, get_rate_esdhc1, NULL,</div><div class='del'>-		&amp;esdhc1_per_clk);</div><div class='del'>-DEFINE_CLOCK(esdhc2_clk,  1, CCM_CGCR1, 14, get_rate_esdhc2, NULL,</div><div class='del'>-		&amp;esdhc2_per_clk);</div><div class='del'>-DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(csi_clk,    0, CCM_CGCR1,  4, get_rate_csi, NULL,  &amp;csi_per_clk);</div><div class='del'>-DEFINE_CLOCK(can1_clk,	 0, CCM_CGCR1,  2, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(can2_clk,	 1, CCM_CGCR1,  3, get_rate_ipg, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(iim_clk,    0, CCM_CGCR1, 26, NULL, NULL, NULL);</div><div class='del'>-</div><div class='del'>-#define _REGISTER_CLOCK(d, n, c)	\</div><div class='del'>-	{				\</div><div class='del'>-		.dev_id = d,		\</div><div class='del'>-		.con_id = n,		\</div><div class='del'>-		.clk = &amp;c,		\</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-static struct clk_lookup lookups[] = {</div><div class='del'>-	/* i.mx25 has the i.mx21 type uart */</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.0", "usb", usbotg_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)</div><div class='del'>-	_REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)</div><div class='del'>-	/* i.mx25 has the i.mx35 type cspi */</div><div class='del'>-	_REGISTER_CLOCK("imx35-cspi.0", NULL, cspi1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx35-cspi.1", NULL, cspi2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx35-cspi.2", NULL, cspi3_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_pwm.0", NULL, pwm1_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_pwm.3", NULL, pwm4_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-keypad", NULL, kpp_clk)</div><div class='del'>-	_REGISTER_CLOCK("mx25-adc", NULL, tsc_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx25-fec.0", NULL, fec_clk)</div><div class='del'>-	_REGISTER_CLOCK("imxdi_rtc.0", NULL, dryice_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx2-wdt.0", NULL, wdt_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx25.0", NULL, esdhc1_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx25.1", NULL, esdhc2_clk)</div><div class='del'>-	_REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "audmux", audmux_clk)</div><div class='del'>-	_REGISTER_CLOCK("flexcan.0", NULL, can1_clk)</div><div class='del'>-	_REGISTER_CLOCK("flexcan.1", NULL, can2_clk)</div><div class='del'>-	/* i.mx25 has the i.mx35 type sdma */</div><div class='del'>-	_REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "iim", iim_clk)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int __init mx25_clocks_init(void)</div><div class='del'>-{</div><div class='del'>-	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='del'>-</div><div class='del'>-	/* Turn off all clocks except the ones we need to survive, namely:</div><div class='del'>-	 * EMI, GPIO1-3 (CCM_CGCR1[18:16]), GPT1, IOMUXC (CCM_CGCR1[27]), IIM,</div><div class='del'>-	 * SCC</div><div class='del'>-	 */</div><div class='del'>-	__raw_writel((1 &lt;&lt; 19), CRM_BASE + CCM_CGCR0);</div><div class='del'>-	__raw_writel((0xf &lt;&lt; 16) | (3 &lt;&lt; 26), CRM_BASE + CCM_CGCR1);</div><div class='del'>-	__raw_writel((1 &lt;&lt; 5), CRM_BASE + CCM_CGCR2);</div><div class='del'>-#if defined(CONFIG_DEBUG_LL) &amp;&amp; !defined(CONFIG_DEBUG_ICEDCC)</div><div class='del'>-	clk_enable(&amp;uart1_clk);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* Clock source for lcdc and csi is upll */</div><div class='del'>-	__raw_writel(__raw_readl(CRM_BASE+0x64) | (1 &lt;&lt; 7) | (1 &lt;&lt; 0),</div><div class='del'>-			CRM_BASE + 0x64);</div><div class='del'>-</div><div class='del'>-	/* Clock source for gpt is ahb_div */</div><div class='del'>-	__raw_writel(__raw_readl(CRM_BASE+0x64) &amp; ~(1 &lt;&lt; 5), CRM_BASE + 0x64);</div><div class='del'>-</div><div class='del'>-	clk_enable(&amp;iim_clk);</div><div class='del'>-	imx_print_silicon_rev("i.MX25", mx25_revision());</div><div class='del'>-	clk_disable(&amp;iim_clk);</div><div class='del'>-</div><div class='del'>-	mxc_timer_init(&amp;gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c<br/>deleted file mode 100644<br/>index 98e04f5a87dd..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/clock-imx27.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/clock-imx27.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,785 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='del'>- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de</div><div class='del'>- * Copyright 2008 Martin Fuzzey, mfuzzey@gmail.com</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation; either version 2</div><div class='del'>- * of the License, or (at your option) any later version.</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,</div><div class='del'>- * MA 02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/div64.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/clock.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-#define IO_ADDR_CCM(off)	(MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))</div><div class='del'>-</div><div class='del'>-/* Register offsets */</div><div class='del'>-#define CCM_CSCR		IO_ADDR_CCM(0x0)</div><div class='del'>-#define CCM_MPCTL0		IO_ADDR_CCM(0x4)</div><div class='del'>-#define CCM_MPCTL1		IO_ADDR_CCM(0x8)</div><div class='del'>-#define CCM_SPCTL0		IO_ADDR_CCM(0xc)</div><div class='del'>-#define CCM_SPCTL1		IO_ADDR_CCM(0x10)</div><div class='del'>-#define CCM_OSC26MCTL		IO_ADDR_CCM(0x14)</div><div class='del'>-#define CCM_PCDR0		IO_ADDR_CCM(0x18)</div><div class='del'>-#define CCM_PCDR1		IO_ADDR_CCM(0x1c)</div><div class='del'>-#define CCM_PCCR0		IO_ADDR_CCM(0x20)</div><div class='del'>-#define CCM_PCCR1		IO_ADDR_CCM(0x24)</div><div class='del'>-#define CCM_CCSR		IO_ADDR_CCM(0x28)</div><div class='del'>-#define CCM_PMCTL		IO_ADDR_CCM(0x2c)</div><div class='del'>-#define CCM_PMCOUNT		IO_ADDR_CCM(0x30)</div><div class='del'>-#define CCM_WKGDCTL		IO_ADDR_CCM(0x34)</div><div class='del'>-</div><div class='del'>-#define CCM_CSCR_UPDATE_DIS	(1 &lt;&lt; 31)</div><div class='del'>-#define CCM_CSCR_SSI2		(1 &lt;&lt; 23)</div><div class='del'>-#define CCM_CSCR_SSI1		(1 &lt;&lt; 22)</div><div class='del'>-#define CCM_CSCR_VPU		(1 &lt;&lt; 21)</div><div class='del'>-#define CCM_CSCR_MSHC           (1 &lt;&lt; 20)</div><div class='del'>-#define CCM_CSCR_SPLLRES        (1 &lt;&lt; 19)</div><div class='del'>-#define CCM_CSCR_MPLLRES        (1 &lt;&lt; 18)</div><div class='del'>-#define CCM_CSCR_SP             (1 &lt;&lt; 17)</div><div class='del'>-#define CCM_CSCR_MCU            (1 &lt;&lt; 16)</div><div class='del'>-#define CCM_CSCR_OSC26MDIV      (1 &lt;&lt; 4)</div><div class='del'>-#define CCM_CSCR_OSC26M         (1 &lt;&lt; 3)</div><div class='del'>-#define CCM_CSCR_FPM            (1 &lt;&lt; 2)</div><div class='del'>-#define CCM_CSCR_SPEN           (1 &lt;&lt; 1)</div><div class='del'>-#define CCM_CSCR_MPEN           (1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* i.MX27 TO 2+ */</div><div class='del'>-#define CCM_CSCR_ARM_SRC        (1 &lt;&lt; 15)</div><div class='del'>-</div><div class='del'>-#define CCM_SPCTL1_LF           (1 &lt;&lt; 15)</div><div class='del'>-#define CCM_SPCTL1_BRMO         (1 &lt;&lt; 6)</div><div class='del'>-</div><div class='del'>-static struct clk mpll_main1_clk, mpll_main2_clk;</div><div class='del'>-</div><div class='del'>-static int clk_pccr_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long reg;</div><div class='del'>-</div><div class='del'>-	if (!clk-&gt;enable_reg)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-	reg |= 1 &lt;&lt; clk-&gt;enable_shift;</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clk_pccr_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long reg;</div><div class='del'>-</div><div class='del'>-	if (!clk-&gt;enable_reg)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-	reg &amp;= ~(1 &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int clk_spll_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_CSCR);</div><div class='del'>-	reg |= CCM_CSCR_SPEN;</div><div class='del'>-	__raw_writel(reg, CCM_CSCR);</div><div class='del'>-</div><div class='del'>-	while (!(__raw_readl(CCM_SPCTL1) &amp; CCM_SPCTL1_LF));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clk_spll_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_CSCR);</div><div class='del'>-	reg &amp;= ~CCM_CSCR_SPEN;</div><div class='del'>-	__raw_writel(reg, CCM_CSCR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int clk_cpu_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	int cscr = __raw_readl(CCM_CSCR);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;parent == parent)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0) {</div><div class='del'>-		if (parent == &amp;mpll_main1_clk) {</div><div class='del'>-			cscr |= CCM_CSCR_ARM_SRC;</div><div class='del'>-		} else {</div><div class='del'>-			if (parent == &amp;mpll_main2_clk)</div><div class='del'>-				cscr &amp;= ~CCM_CSCR_ARM_SRC;</div><div class='del'>-			else</div><div class='del'>-				return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-		__raw_writel(cscr, CCM_CSCR);</div><div class='del'>-		clk-&gt;parent = parent;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long round_rate_cpu(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	int div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-	if (parent_rate % rate)</div><div class='del'>-		div++;</div><div class='del'>-</div><div class='del'>-	if (div &gt; 4)</div><div class='del'>-		div = 4;</div><div class='del'>-</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int set_rate_cpu(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned int div;</div><div class='del'>-	uint32_t reg;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-</div><div class='del'>-	if (div &gt; 4 || div &lt; 1 || ((parent_rate / div) != rate))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div--;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_CSCR);</div><div class='del'>-	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0) {</div><div class='del'>-		reg &amp;= ~(3 &lt;&lt; 12);</div><div class='del'>-		reg |= div &lt;&lt; 12;</div><div class='del'>-		reg &amp;= ~(CCM_CSCR_FPM | CCM_CSCR_SPEN);</div><div class='del'>-		__raw_writel(reg | CCM_CSCR_UPDATE_DIS, CCM_CSCR);</div><div class='del'>-	} else {</div><div class='del'>-		printk(KERN_ERR "Can't set CPU frequency!\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long round_rate_per(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-	if (parent_rate % rate)</div><div class='del'>-		div++;</div><div class='del'>-</div><div class='del'>-	if (div &gt; 64)</div><div class='del'>-		div = 64;</div><div class='del'>-</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int set_rate_per(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	u32 div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;id &lt; 0 || clk-&gt;id &gt; 3)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-	if (div &gt; 64 || div &lt; 1 || ((parent_rate / div) != rate))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	div--;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_PCDR1) &amp; ~(0x3f &lt;&lt; (clk-&gt;id &lt;&lt; 3));</div><div class='del'>-	reg |= div &lt;&lt; (clk-&gt;id &lt;&lt; 3);</div><div class='del'>-	__raw_writel(reg, CCM_PCDR1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_usb(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long usb_pdf;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	usb_pdf = (__raw_readl(CCM_CSCR) &gt;&gt; 28) &amp; 0x7;</div><div class='del'>-</div><div class='del'>-	return parent_rate / (usb_pdf + 1U);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ssix(struct clk *clk, unsigned long pdf)</div><div class='del'>-{</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0)</div><div class='del'>-		pdf += 4;  /* MX27 TO2+ */</div><div class='del'>-	else</div><div class='del'>-		pdf = (pdf &lt; 2) ? 124UL : pdf;  /* MX21 &amp; MX27 TO1 */</div><div class='del'>-</div><div class='del'>-	return 2UL * parent_rate / pdf;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ssi1(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_ssix(clk, (__raw_readl(CCM_PCDR0) &gt;&gt; 16) &amp; 0x3f);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ssi2(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_ssix(clk, (__raw_readl(CCM_PCDR0) &gt;&gt; 26) &amp; 0x3f);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_nfc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long nfc_pdf;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0)</div><div class='del'>-		nfc_pdf = (__raw_readl(CCM_PCDR0) &gt;&gt; 6) &amp; 0xf;</div><div class='del'>-	else</div><div class='del'>-		nfc_pdf = (__raw_readl(CCM_PCDR0) &gt;&gt; 12) &amp; 0xf;</div><div class='del'>-</div><div class='del'>-	return parent_rate / (nfc_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_vpu(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long vpu_pdf;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0) {</div><div class='del'>-		vpu_pdf = (__raw_readl(CCM_PCDR0) &gt;&gt; 10) &amp; 0x3f;</div><div class='del'>-		vpu_pdf += 4;</div><div class='del'>-	} else {</div><div class='del'>-		vpu_pdf = (__raw_readl(CCM_PCDR0) &gt;&gt; 8) &amp; 0xf;</div><div class='del'>-		vpu_pdf = (vpu_pdf &lt; 2) ? 124 : vpu_pdf;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 2UL * parent_rate / vpu_pdf;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long round_rate_parent(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return clk-&gt;parent-&gt;round_rate(clk-&gt;parent, rate);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_parent(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int set_rate_parent(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	return clk-&gt;parent-&gt;set_rate(clk-&gt;parent, rate);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* in Hz */</div><div class='del'>-static unsigned long external_high_reference = 26000000;</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_high_reference(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return external_high_reference;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* in Hz */</div><div class='del'>-static unsigned long external_low_reference = 32768;</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_low_reference(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return external_low_reference;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_fpm(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) * 1024;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_mpll(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return mxc_decode_pll(__raw_readl(CCM_MPCTL0),</div><div class='del'>-			clk_get_rate(clk-&gt;parent));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_mpll_main(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	/* i.MX27 TO2:</div><div class='del'>-	 * clk-&gt;id == 0: arm clock source path 1 which is from 2 * MPLL / 2</div><div class='del'>-	 * clk-&gt;id == 1: arm clock source path 2 which is from 2 * MPLL / 3</div><div class='del'>-	 */</div><div class='del'>-	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0 &amp;&amp; clk-&gt;id == 1)</div><div class='del'>-		return 2UL * parent_rate / 3UL;</div><div class='del'>-</div><div class='del'>-	return parent_rate;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_spll(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	uint32_t reg;</div><div class='del'>-	unsigned long rate;</div><div class='del'>-</div><div class='del'>-	rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CCM_SPCTL0);</div><div class='del'>-</div><div class='del'>-	/* On TO2 we have to write the value back. Otherwise we</div><div class='del'>-	 * read 0 from this register the next time.</div><div class='del'>-	 */</div><div class='del'>-	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0)</div><div class='del'>-		__raw_writel(reg, CCM_SPCTL0);</div><div class='del'>-</div><div class='del'>-	return mxc_decode_pll(reg, rate);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_cpu(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 div;</div><div class='del'>-	unsigned long rate;</div><div class='del'>-</div><div class='del'>-	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0)</div><div class='del'>-		div = (__raw_readl(CCM_CSCR) &gt;&gt; 12) &amp; 0x3;</div><div class='del'>-	else</div><div class='del'>-		div = (__raw_readl(CCM_CSCR) &gt;&gt; 13) &amp; 0x7;</div><div class='del'>-</div><div class='del'>-	rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	return rate / (div + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ahb(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate, bclk_pdf;</div><div class='del'>-</div><div class='del'>-	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0)</div><div class='del'>-		bclk_pdf = (__raw_readl(CCM_CSCR) &gt;&gt; 8) &amp; 0x3;</div><div class='del'>-	else</div><div class='del'>-		bclk_pdf = (__raw_readl(CCM_CSCR) &gt;&gt; 9) &amp; 0xf;</div><div class='del'>-</div><div class='del'>-	rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	return rate / (bclk_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ipg(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate, ipg_pdf;</div><div class='del'>-</div><div class='del'>-	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0)</div><div class='del'>-		return clk_get_rate(clk-&gt;parent);</div><div class='del'>-	else</div><div class='del'>-		ipg_pdf = (__raw_readl(CCM_CSCR) &gt;&gt; 8) &amp; 1;</div><div class='del'>-</div><div class='del'>-	rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	return rate / (ipg_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_per(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long perclk_pdf, parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;id &lt; 0 || clk-&gt;id &gt; 3)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	perclk_pdf = (__raw_readl(CCM_PCDR1) &gt;&gt; (clk-&gt;id &lt;&lt; 3)) &amp; 0x3f;</div><div class='del'>-</div><div class='del'>-	return parent_rate / (perclk_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * the high frequency external clock reference</div><div class='del'>- * Default case is 26MHz. Could be changed at runtime</div><div class='del'>- * with a call to change_external_high_reference()</div><div class='del'>- */</div><div class='del'>-static struct clk ckih_clk = {</div><div class='del'>-	.get_rate	= get_rate_high_reference,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk mpll_clk = {</div><div class='del'>-	.parent		= &amp;ckih_clk,</div><div class='del'>-	.get_rate	= get_rate_mpll,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* For i.MX27 TO2, it is the MPLL path 1 of ARM core</div><div class='del'>- * It provides the clock source whose rate is same as MPLL</div><div class='del'>- */</div><div class='del'>-static struct clk mpll_main1_clk = {</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.parent		= &amp;mpll_clk,</div><div class='del'>-	.get_rate	= get_rate_mpll_main,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* For i.MX27 TO2, it is the MPLL path 2 of ARM core</div><div class='del'>- * It provides the clock source whose rate is same MPLL * 2 / 3</div><div class='del'>- */</div><div class='del'>-static struct clk mpll_main2_clk = {</div><div class='del'>-	.id		= 1,</div><div class='del'>-	.parent		= &amp;mpll_clk,</div><div class='del'>-	.get_rate	= get_rate_mpll_main,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ahb_clk = {</div><div class='del'>-	.parent		= &amp;mpll_main2_clk,</div><div class='del'>-	.get_rate	= get_rate_ahb,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ipg_clk = {</div><div class='del'>-	.parent		= &amp;ahb_clk,</div><div class='del'>-	.get_rate	= get_rate_ipg,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk cpu_clk = {</div><div class='del'>-	.parent = &amp;mpll_main2_clk,</div><div class='del'>-	.set_parent = clk_cpu_set_parent,</div><div class='del'>-	.round_rate = round_rate_cpu,</div><div class='del'>-	.get_rate = get_rate_cpu,</div><div class='del'>-	.set_rate = set_rate_cpu,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk spll_clk = {</div><div class='del'>-	.parent = &amp;ckih_clk,</div><div class='del'>-	.get_rate = get_rate_spll,</div><div class='del'>-	.enable = clk_spll_enable,</div><div class='del'>-	.disable = clk_spll_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * the low frequency external clock reference</div><div class='del'>- * Default case is 32.768kHz.</div><div class='del'>- */</div><div class='del'>-static struct clk ckil_clk = {</div><div class='del'>-	.get_rate = get_rate_low_reference,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Output of frequency pre multiplier */</div><div class='del'>-static struct clk fpm_clk = {</div><div class='del'>-	.parent = &amp;ckil_clk,</div><div class='del'>-	.get_rate = get_rate_fpm,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define PCCR0 CCM_PCCR0</div><div class='del'>-#define PCCR1 CCM_PCCR1</div><div class='del'>-</div><div class='del'>-#define DEFINE_CLOCK(name, i, er, es, gr, s, p)		\</div><div class='del'>-	static struct clk name = {			\</div><div class='del'>-		.id		= i,			\</div><div class='del'>-		.enable_reg	= er,			\</div><div class='del'>-		.enable_shift	= es,			\</div><div class='del'>-		.get_rate	= gr,			\</div><div class='del'>-		.enable		= clk_pccr_enable,	\</div><div class='del'>-		.disable	= clk_pccr_disable,	\</div><div class='del'>-		.secondary	= s,			\</div><div class='del'>-		.parent		= p,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define DEFINE_CLOCK1(name, i, er, es, getsetround, s, p)	\</div><div class='del'>-	static struct clk name = {				\</div><div class='del'>-		.id		= i,				\</div><div class='del'>-		.enable_reg	= er,				\</div><div class='del'>-		.enable_shift	= es,				\</div><div class='del'>-		.get_rate	= get_rate_##getsetround,	\</div><div class='del'>-		.set_rate	= set_rate_##getsetround,	\</div><div class='del'>-		.round_rate	= round_rate_##getsetround,	\</div><div class='del'>-		.enable		= clk_pccr_enable,		\</div><div class='del'>-		.disable	= clk_pccr_disable,		\</div><div class='del'>-		.secondary	= s,				\</div><div class='del'>-		.parent		= p,				\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-/* Forward declaration to keep the following list in order */</div><div class='del'>-static struct clk slcdc_clk1, sahara2_clk1, rtic_clk1, fec_clk1, emma_clk1,</div><div class='del'>-		  dma_clk1, lcdc_clk2, vpu_clk1;</div><div class='del'>-</div><div class='del'>-/* All clocks we can gate through PCCRx in the order of PCCRx bits */</div><div class='del'>-DEFINE_CLOCK(ssi2_clk1,    1, PCCR0,  0, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(ssi1_clk1,    0, PCCR0,  1, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(slcdc_clk,    0, PCCR0,  2, NULL, &amp;slcdc_clk1, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(sdhc3_clk1,   0, PCCR0,  3, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(sdhc2_clk1,   0, PCCR0,  4, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(sdhc1_clk1,   0, PCCR0,  5, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(scc_clk,      0, PCCR0,  6, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(sahara2_clk,  0, PCCR0,  7, NULL, &amp;sahara2_clk1, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(rtic_clk,     0, PCCR0,  8, NULL, &amp;rtic_clk1, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(rtc_clk,      0, PCCR0,  9, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(pwm_clk1,     0, PCCR0, 11, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(owire_clk,    0, PCCR0, 12, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(mstick_clk1,  0, PCCR0, 13, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(lcdc_clk1,    0, PCCR0, 14, NULL, &amp;lcdc_clk2, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(kpp_clk,      0, PCCR0, 15, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(iim_clk,      0, PCCR0, 16, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(i2c2_clk,     1, PCCR0, 17, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(i2c1_clk,     0, PCCR0, 18, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(gpt6_clk1,    0, PCCR0, 29, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(gpt5_clk1,    0, PCCR0, 20, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(gpt4_clk1,    0, PCCR0, 21, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(gpt3_clk1,    0, PCCR0, 22, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(gpt2_clk1,    0, PCCR0, 23, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(gpt1_clk1,    0, PCCR0, 24, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(gpio_clk,     0, PCCR0, 25, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(fec_clk,      0, PCCR0, 26, NULL, &amp;fec_clk1, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(emma_clk,     0, PCCR0, 27, NULL, &amp;emma_clk1, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(dma_clk,      0, PCCR0, 28, NULL, &amp;dma_clk1, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(cspi13_clk1,  0, PCCR0, 29, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(cspi2_clk1,   0, PCCR0, 30, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(cspi1_clk1,   0, PCCR0, 31, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(mstick_clk,   0, PCCR1,  2, NULL, &amp;mstick_clk1, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(nfc_clk,      0, PCCR1,  3, get_rate_nfc, NULL, &amp;cpu_clk);</div><div class='del'>-DEFINE_CLOCK(ssi2_clk,     1, PCCR1,  4, get_rate_ssi2, &amp;ssi2_clk1, &amp;mpll_main2_clk);</div><div class='del'>-DEFINE_CLOCK(ssi1_clk,     0, PCCR1,  5, get_rate_ssi1, &amp;ssi1_clk1, &amp;mpll_main2_clk);</div><div class='del'>-DEFINE_CLOCK(vpu_clk,      0, PCCR1,  6, get_rate_vpu, &amp;vpu_clk1, &amp;mpll_main2_clk);</div><div class='del'>-DEFINE_CLOCK1(per4_clk,    3, PCCR1,  7, per, NULL, &amp;mpll_main2_clk);</div><div class='del'>-DEFINE_CLOCK1(per3_clk,    2, PCCR1,  8, per, NULL, &amp;mpll_main2_clk);</div><div class='del'>-DEFINE_CLOCK1(per2_clk,    1, PCCR1,  9, per, NULL, &amp;mpll_main2_clk);</div><div class='del'>-DEFINE_CLOCK1(per1_clk,    0, PCCR1, 10, per, NULL, &amp;mpll_main2_clk);</div><div class='del'>-DEFINE_CLOCK(usb_clk1,     0, PCCR1, 11, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(slcdc_clk1,   0, PCCR1, 12, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(sahara2_clk1, 0, PCCR1, 13, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(rtic_clk1,    0, PCCR1, 14, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(lcdc_clk2,    0, PCCR1, 15, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(vpu_clk1,     0, PCCR1, 16, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(fec_clk1,     0, PCCR1, 17, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(emma_clk1,    0, PCCR1, 18, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(emi_clk,      0, PCCR1, 19, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(dma_clk1,     0, PCCR1, 20, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(csi_clk1,     0, PCCR1, 21, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(brom_clk,     0, PCCR1, 22, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(pata_clk,      0, PCCR1, 23, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(wdog_clk,     0, PCCR1, 24, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(usb_clk,      0, PCCR1, 25, get_rate_usb, &amp;usb_clk1, &amp;spll_clk);</div><div class='del'>-DEFINE_CLOCK(uart6_clk1,   0, PCCR1, 26, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(uart5_clk1,   0, PCCR1, 27, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(uart4_clk1,   0, PCCR1, 28, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(uart3_clk1,   0, PCCR1, 29, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(uart2_clk1,   0, PCCR1, 30, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(uart1_clk1,   0, PCCR1, 31, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-</div><div class='del'>-/* Clocks we cannot directly gate, but drivers need their rates */</div><div class='del'>-DEFINE_CLOCK(cspi1_clk,    0, NULL,   0, NULL, &amp;cspi1_clk1, &amp;per2_clk);</div><div class='del'>-DEFINE_CLOCK(cspi2_clk,    1, NULL,   0, NULL, &amp;cspi2_clk1, &amp;per2_clk);</div><div class='del'>-DEFINE_CLOCK(cspi3_clk,    2, NULL,   0, NULL, &amp;cspi13_clk1, &amp;per2_clk);</div><div class='del'>-DEFINE_CLOCK(sdhc1_clk,    0, NULL,   0, NULL, &amp;sdhc1_clk1, &amp;per2_clk);</div><div class='del'>-DEFINE_CLOCK(sdhc2_clk,    1, NULL,   0, NULL, &amp;sdhc2_clk1, &amp;per2_clk);</div><div class='del'>-DEFINE_CLOCK(sdhc3_clk,    2, NULL,   0, NULL, &amp;sdhc3_clk1, &amp;per2_clk);</div><div class='del'>-DEFINE_CLOCK(pwm_clk,      0, NULL,   0, NULL, &amp;pwm_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK(gpt1_clk,     0, NULL,   0, NULL, &amp;gpt1_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK(gpt2_clk,     1, NULL,   0, NULL, &amp;gpt2_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK(gpt3_clk,     2, NULL,   0, NULL, &amp;gpt3_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK(gpt4_clk,     3, NULL,   0, NULL, &amp;gpt4_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK(gpt5_clk,     4, NULL,   0, NULL, &amp;gpt5_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK(gpt6_clk,     5, NULL,   0, NULL, &amp;gpt6_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK(uart1_clk,    0, NULL,   0, NULL, &amp;uart1_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK(uart2_clk,    1, NULL,   0, NULL, &amp;uart2_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK(uart3_clk,    2, NULL,   0, NULL, &amp;uart3_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK(uart4_clk,    3, NULL,   0, NULL, &amp;uart4_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK(uart5_clk,    4, NULL,   0, NULL, &amp;uart5_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK(uart6_clk,    5, NULL,   0, NULL, &amp;uart6_clk1, &amp;per1_clk);</div><div class='del'>-DEFINE_CLOCK1(lcdc_clk,    0, NULL,   0, parent, &amp;lcdc_clk1, &amp;per3_clk);</div><div class='del'>-DEFINE_CLOCK1(csi_clk,     0, NULL,   0, parent, &amp;csi_clk1, &amp;per4_clk);</div><div class='del'>-</div><div class='del'>-#define _REGISTER_CLOCK(d, n, c) \</div><div class='del'>-	{ \</div><div class='del'>-		.dev_id = d, \</div><div class='del'>-		.con_id = n, \</div><div class='del'>-		.clk = &amp;c, \</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-static struct clk_lookup lookups[] = {</div><div class='del'>-	/* i.mx27 has the i.mx21 type uart */</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.5", NULL, uart6_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt1", gpt1_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt2", gpt2_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt3", gpt3_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt4", gpt4_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt5", gpt5_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt6", gpt6_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_pwm.0", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-mmc.2", NULL, sdhc3_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx27-cspi.0", NULL, cspi1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx27-cspi.1", NULL, cspi2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx27-cspi.2", NULL, cspi3_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)</div><div class='del'>-	_REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk)</div><div class='del'>-	_REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk)</div><div class='del'>-	_REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk1)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.0", "usb", usb_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_clk1)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.1", "usb", usb_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk1)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk1)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "vpu", vpu_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "dma", dma_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "rtic", rtic_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "brom", brom_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "emma", emma_clk)</div><div class='del'>-	_REGISTER_CLOCK("m2m-emmaprp.0", NULL, emma_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "slcdc", slcdc_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "emi", emi_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "sahara2", sahara2_clk)</div><div class='del'>-	_REGISTER_CLOCK("pata_imx", NULL, pata_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "mstick", mstick_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpio", gpio_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "iim", iim_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "kpp", kpp_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "rtc", rtc_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "scc", scc_clk)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Adjust the clock path for TO2 and later */</div><div class='del'>-static void __init to2_adjust_clocks(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long cscr = __raw_readl(CCM_CSCR);</div><div class='del'>-</div><div class='del'>-	if (mx27_revision() &gt;= IMX_CHIP_REVISION_2_0) {</div><div class='del'>-		if (cscr &amp; CCM_CSCR_ARM_SRC)</div><div class='del'>-			cpu_clk.parent = &amp;mpll_main1_clk;</div><div class='del'>-</div><div class='del'>-		if (!(cscr &amp; CCM_CSCR_SSI2))</div><div class='del'>-			ssi1_clk.parent = &amp;spll_clk;</div><div class='del'>-</div><div class='del'>-		if (!(cscr &amp; CCM_CSCR_SSI1))</div><div class='del'>-			ssi1_clk.parent = &amp;spll_clk;</div><div class='del'>-</div><div class='del'>-		if (!(cscr &amp; CCM_CSCR_VPU))</div><div class='del'>-			vpu_clk.parent = &amp;spll_clk;</div><div class='del'>-	} else {</div><div class='del'>-		cpu_clk.parent = &amp;mpll_clk;</div><div class='del'>-		cpu_clk.set_parent = NULL;</div><div class='del'>-		cpu_clk.round_rate = NULL;</div><div class='del'>-		cpu_clk.set_rate = NULL;</div><div class='del'>-		ahb_clk.parent = &amp;mpll_clk;</div><div class='del'>-</div><div class='del'>-		per1_clk.parent = &amp;mpll_clk;</div><div class='del'>-		per2_clk.parent = &amp;mpll_clk;</div><div class='del'>-		per3_clk.parent = &amp;mpll_clk;</div><div class='del'>-		per4_clk.parent = &amp;mpll_clk;</div><div class='del'>-</div><div class='del'>-		ssi1_clk.parent = &amp;mpll_clk;</div><div class='del'>-		ssi2_clk.parent = &amp;mpll_clk;</div><div class='del'>-</div><div class='del'>-		vpu_clk.parent = &amp;mpll_clk;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * must be called very early to get information about the</div><div class='del'>- * available clock rate when the timer framework starts</div><div class='del'>- */</div><div class='del'>-int __init mx27_clocks_init(unsigned long fref)</div><div class='del'>-{</div><div class='del'>-	u32 cscr = __raw_readl(CCM_CSCR);</div><div class='del'>-</div><div class='del'>-	external_high_reference = fref;</div><div class='del'>-</div><div class='del'>-	/* detect clock reference for both system PLLs */</div><div class='del'>-	if (cscr &amp; CCM_CSCR_MCU)</div><div class='del'>-		mpll_clk.parent = &amp;ckih_clk;</div><div class='del'>-	else</div><div class='del'>-		mpll_clk.parent = &amp;fpm_clk;</div><div class='del'>-</div><div class='del'>-	if (cscr &amp; CCM_CSCR_SP)</div><div class='del'>-		spll_clk.parent = &amp;ckih_clk;</div><div class='del'>-	else</div><div class='del'>-		spll_clk.parent = &amp;fpm_clk;</div><div class='del'>-</div><div class='del'>-	to2_adjust_clocks();</div><div class='del'>-</div><div class='del'>-	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='del'>-</div><div class='del'>-	/* Turn off all clocks we do not need */</div><div class='del'>-	__raw_writel(0, CCM_PCCR0);</div><div class='del'>-	__raw_writel((1 &lt;&lt; 10) | (1 &lt;&lt; 19), CCM_PCCR1);</div><div class='del'>-</div><div class='del'>-	spll_clk.disable(&amp;spll_clk);</div><div class='del'>-</div><div class='del'>-	/* enable basic clocks */</div><div class='del'>-	clk_enable(&amp;per1_clk);</div><div class='del'>-	clk_enable(&amp;gpio_clk);</div><div class='del'>-	clk_enable(&amp;emi_clk);</div><div class='del'>-	clk_enable(&amp;iim_clk);</div><div class='del'>-	imx_print_silicon_rev("i.MX27", mx27_revision());</div><div class='del'>-	clk_disable(&amp;iim_clk);</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_DEBUG_LL) &amp;&amp; !defined(CONFIG_DEBUG_ICEDCC)</div><div class='del'>-	clk_enable(&amp;uart1_clk);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	mxc_timer_init(&amp;gpt1_clk, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR),</div><div class='del'>-			MX27_INT_GPT1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_OF</div><div class='del'>-int __init mx27_clocks_init_dt(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np;</div><div class='del'>-	u32 fref = 26000000; /* default */</div><div class='del'>-</div><div class='del'>-	for_each_compatible_node(np, NULL, "fixed-clock") {</div><div class='del'>-		if (!of_device_is_compatible(np, "fsl,imx-osc26m"))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (!of_property_read_u32(np, "clock-frequency", &amp;fref))</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return mx27_clocks_init(fref);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-imx/clock-imx31.c b/arch/arm/mach-imx/clock-imx31.c<br/>deleted file mode 100644<br/>index 3a943cd4159f..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/clock-imx31.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/clock-imx31.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,630 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='del'>- * Copyright (C) 2008 by Sascha Hauer &lt;kernel@pengutronix.de&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation; either version 2</div><div class='del'>- * of the License, or (at your option) any later version.</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,</div><div class='del'>- * MA 02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/div64.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/clock.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/mx31.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-</div><div class='del'>-#include "crmregs-imx3.h"</div><div class='del'>-</div><div class='del'>-#define PRE_DIV_MIN_FREQ    10000000 /* Minimum Frequency after Predivider */</div><div class='del'>-</div><div class='del'>-static void __calc_pre_post_dividers(u32 div, u32 *pre, u32 *post)</div><div class='del'>-{</div><div class='del'>-	u32 min_pre, temp_pre, old_err, err;</div><div class='del'>-</div><div class='del'>-	if (div &gt;= 512) {</div><div class='del'>-		*pre = 8;</div><div class='del'>-		*post = 64;</div><div class='del'>-	} else if (div &gt;= 64) {</div><div class='del'>-		min_pre = (div - 1) / 64 + 1;</div><div class='del'>-		old_err = 8;</div><div class='del'>-		for (temp_pre = 8; temp_pre &gt;= min_pre; temp_pre--) {</div><div class='del'>-			err = div % temp_pre;</div><div class='del'>-			if (err == 0) {</div><div class='del'>-				*pre = temp_pre;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			err = temp_pre - err;</div><div class='del'>-			if (err &lt; old_err) {</div><div class='del'>-				old_err = err;</div><div class='del'>-				*pre = temp_pre;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		*post = (div + *pre - 1) / *pre;</div><div class='del'>-	} else if (div &lt;= 8) {</div><div class='del'>-		*pre = div;</div><div class='del'>-		*post = 1;</div><div class='del'>-	} else {</div><div class='del'>-		*pre = 1;</div><div class='del'>-		*post = div;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk mcu_pll_clk;</div><div class='del'>-static struct clk serial_pll_clk;</div><div class='del'>-static struct clk ipg_clk;</div><div class='del'>-static struct clk ckih_clk;</div><div class='del'>-</div><div class='del'>-static int cgr_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	if (!clk-&gt;enable_reg)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-	reg |= 3 &lt;&lt; clk-&gt;enable_shift;</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cgr_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	if (!clk-&gt;enable_reg)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-	reg &amp;= ~(3 &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-</div><div class='del'>-	/* special case for EMI clock */</div><div class='del'>-	if (clk-&gt;enable_reg == MXC_CCM_CGR2 &amp;&amp; clk-&gt;enable_shift == 8)</div><div class='del'>-		reg |= (1 &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long pll_ref_get_rate(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long ccmr;</div><div class='del'>-	unsigned int prcs;</div><div class='del'>-</div><div class='del'>-	ccmr = __raw_readl(MXC_CCM_CCMR);</div><div class='del'>-	prcs = (ccmr &amp; MXC_CCM_CCMR_PRCS_MASK) &gt;&gt; MXC_CCM_CCMR_PRCS_OFFSET;</div><div class='del'>-	if (prcs == 0x1)</div><div class='del'>-		return CKIL_CLK_FREQ * 1024;</div><div class='del'>-	else</div><div class='del'>-		return clk_get_rate(&amp;ckih_clk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long usb_pll_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_UPCTL);</div><div class='del'>-</div><div class='del'>-	return mxc_decode_pll(reg, pll_ref_get_rate());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long serial_pll_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_SRPCTL);</div><div class='del'>-</div><div class='del'>-	return mxc_decode_pll(reg, pll_ref_get_rate());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long mcu_pll_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long reg, ccmr;</div><div class='del'>-</div><div class='del'>-	ccmr = __raw_readl(MXC_CCM_CCMR);</div><div class='del'>-</div><div class='del'>-	if (!(ccmr &amp; MXC_CCM_CCMR_MPE) || (ccmr &amp; MXC_CCM_CCMR_MDS))</div><div class='del'>-		return clk_get_rate(&amp;ckih_clk);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_MPCTL);</div><div class='del'>-</div><div class='del'>-	return mxc_decode_pll(reg, pll_ref_get_rate());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int usb_pll_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CCMR);</div><div class='del'>-	reg |= MXC_CCM_CCMR_UPE;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CCMR);</div><div class='del'>-</div><div class='del'>-	/* No lock bit on MX31, so using max time from spec */</div><div class='del'>-	udelay(80);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void usb_pll_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CCMR);</div><div class='del'>-	reg &amp;= ~MXC_CCM_CCMR_UPE;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CCMR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int serial_pll_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CCMR);</div><div class='del'>-	reg |= MXC_CCM_CCMR_SPE;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CCMR);</div><div class='del'>-</div><div class='del'>-	/* No lock bit on MX31, so using max time from spec */</div><div class='del'>-	udelay(80);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void serial_pll_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CCMR);</div><div class='del'>-	reg &amp;= ~MXC_CCM_CCMR_SPE;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CCMR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define PDR0(mask, off) ((__raw_readl(MXC_CCM_PDR0) &amp; mask) &gt;&gt; off)</div><div class='del'>-#define PDR1(mask, off) ((__raw_readl(MXC_CCM_PDR1) &amp; mask) &gt;&gt; off)</div><div class='del'>-#define PDR2(mask, off) ((__raw_readl(MXC_CCM_PDR2) &amp; mask) &gt;&gt; off)</div><div class='del'>-</div><div class='del'>-static unsigned long mcu_main_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 pmcr0 = __raw_readl(MXC_CCM_PMCR0);</div><div class='del'>-</div><div class='del'>-	if ((pmcr0 &amp; MXC_CCM_PMCR0_DFSUP1) == MXC_CCM_PMCR0_DFSUP1_SPLL)</div><div class='del'>-		return clk_get_rate(&amp;serial_pll_clk);</div><div class='del'>-	else</div><div class='del'>-		return clk_get_rate(&amp;mcu_pll_clk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long ahb_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long max_pdf;</div><div class='del'>-</div><div class='del'>-	max_pdf = PDR0(MXC_CCM_PDR0_MAX_PODF_MASK,</div><div class='del'>-		       MXC_CCM_PDR0_MAX_PODF_OFFSET);</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (max_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long ipg_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long ipg_pdf;</div><div class='del'>-</div><div class='del'>-	ipg_pdf = PDR0(MXC_CCM_PDR0_IPG_PODF_MASK,</div><div class='del'>-		       MXC_CCM_PDR0_IPG_PODF_OFFSET);</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (ipg_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long nfc_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long nfc_pdf;</div><div class='del'>-</div><div class='del'>-	nfc_pdf = PDR0(MXC_CCM_PDR0_NFC_PODF_MASK,</div><div class='del'>-		       MXC_CCM_PDR0_NFC_PODF_OFFSET);</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (nfc_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long hsp_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long hsp_pdf;</div><div class='del'>-</div><div class='del'>-	hsp_pdf = PDR0(MXC_CCM_PDR0_HSP_PODF_MASK,</div><div class='del'>-		       MXC_CCM_PDR0_HSP_PODF_OFFSET);</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (hsp_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long usb_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long usb_pdf, usb_prepdf;</div><div class='del'>-</div><div class='del'>-	usb_pdf = PDR1(MXC_CCM_PDR1_USB_PODF_MASK,</div><div class='del'>-		       MXC_CCM_PDR1_USB_PODF_OFFSET);</div><div class='del'>-	usb_prepdf = PDR1(MXC_CCM_PDR1_USB_PRDF_MASK,</div><div class='del'>-			  MXC_CCM_PDR1_USB_PRDF_OFFSET);</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (usb_prepdf + 1) / (usb_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long csi_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg, pre, post;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_PDR0);</div><div class='del'>-	pre = (reg &amp; MXC_CCM_PDR0_CSI_PRDF_MASK) &gt;&gt;</div><div class='del'>-	    MXC_CCM_PDR0_CSI_PRDF_OFFSET;</div><div class='del'>-	pre++;</div><div class='del'>-	post = (reg &amp; MXC_CCM_PDR0_CSI_PODF_MASK) &gt;&gt;</div><div class='del'>-	    MXC_CCM_PDR0_CSI_PODF_OFFSET;</div><div class='del'>-	post++;</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (pre * post);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long csi_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 pre, post, parent = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	u32 div = parent / rate;</div><div class='del'>-</div><div class='del'>-	if (parent % rate)</div><div class='del'>-		div++;</div><div class='del'>-</div><div class='del'>-	__calc_pre_post_dividers(div, &amp;pre, &amp;post);</div><div class='del'>-</div><div class='del'>-	return parent / (pre * post);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int csi_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 reg, div, pre, post, parent = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent / rate;</div><div class='del'>-</div><div class='del'>-	if ((parent / div) != rate)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	__calc_pre_post_dividers(div, &amp;pre, &amp;post);</div><div class='del'>-</div><div class='del'>-	/* Set CSI clock divider */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_PDR0) &amp;</div><div class='del'>-	    ~(MXC_CCM_PDR0_CSI_PODF_MASK | MXC_CCM_PDR0_CSI_PRDF_MASK);</div><div class='del'>-	reg |= (post - 1) &lt;&lt; MXC_CCM_PDR0_CSI_PODF_OFFSET;</div><div class='del'>-	reg |= (pre - 1) &lt;&lt; MXC_CCM_PDR0_CSI_PRDF_OFFSET;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_PDR0);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long ssi1_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long ssi1_pdf, ssi1_prepdf;</div><div class='del'>-</div><div class='del'>-	ssi1_pdf = PDR1(MXC_CCM_PDR1_SSI1_PODF_MASK,</div><div class='del'>-			MXC_CCM_PDR1_SSI1_PODF_OFFSET);</div><div class='del'>-	ssi1_prepdf = PDR1(MXC_CCM_PDR1_SSI1_PRE_PODF_MASK,</div><div class='del'>-			   MXC_CCM_PDR1_SSI1_PRE_PODF_OFFSET);</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (ssi1_prepdf + 1) / (ssi1_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long ssi2_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long ssi2_pdf, ssi2_prepdf;</div><div class='del'>-</div><div class='del'>-	ssi2_pdf = PDR1(MXC_CCM_PDR1_SSI2_PODF_MASK,</div><div class='del'>-			MXC_CCM_PDR1_SSI2_PODF_OFFSET);</div><div class='del'>-	ssi2_prepdf = PDR1(MXC_CCM_PDR1_SSI2_PRE_PODF_MASK,</div><div class='del'>-			   MXC_CCM_PDR1_SSI2_PRE_PODF_OFFSET);</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (ssi2_prepdf + 1) / (ssi2_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long firi_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long firi_pdf, firi_prepdf;</div><div class='del'>-</div><div class='del'>-	firi_pdf = PDR1(MXC_CCM_PDR1_FIRI_PODF_MASK,</div><div class='del'>-			MXC_CCM_PDR1_FIRI_PODF_OFFSET);</div><div class='del'>-	firi_prepdf = PDR1(MXC_CCM_PDR1_FIRI_PRE_PODF_MASK,</div><div class='del'>-			   MXC_CCM_PDR1_FIRI_PRE_PODF_OFFSET);</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (firi_prepdf + 1) / (firi_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long firi_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 pre, post;</div><div class='del'>-	u32 parent = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	u32 div = parent / rate;</div><div class='del'>-</div><div class='del'>-	if (parent % rate)</div><div class='del'>-		div++;</div><div class='del'>-</div><div class='del'>-	__calc_pre_post_dividers(div, &amp;pre, &amp;post);</div><div class='del'>-</div><div class='del'>-	return parent / (pre * post);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int firi_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 reg, div, pre, post, parent = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent / rate;</div><div class='del'>-</div><div class='del'>-	if ((parent / div) != rate)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	__calc_pre_post_dividers(div, &amp;pre, &amp;post);</div><div class='del'>-</div><div class='del'>-	/* Set FIRI clock divider */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_PDR1) &amp;</div><div class='del'>-	    ~(MXC_CCM_PDR1_FIRI_PODF_MASK | MXC_CCM_PDR1_FIRI_PRE_PODF_MASK);</div><div class='del'>-	reg |= (pre - 1) &lt;&lt; MXC_CCM_PDR1_FIRI_PRE_PODF_OFFSET;</div><div class='del'>-	reg |= (post - 1) &lt;&lt; MXC_CCM_PDR1_FIRI_PODF_OFFSET;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_PDR1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long mbx_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / 2;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long mstick1_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long msti_pdf;</div><div class='del'>-</div><div class='del'>-	msti_pdf = PDR2(MXC_CCM_PDR2_MST1_PDF_MASK,</div><div class='del'>-			MXC_CCM_PDR2_MST1_PDF_OFFSET);</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (msti_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long mstick2_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long msti_pdf;</div><div class='del'>-</div><div class='del'>-	msti_pdf = PDR2(MXC_CCM_PDR2_MST2_PDF_MASK,</div><div class='del'>-			MXC_CCM_PDR2_MST2_PDF_OFFSET);</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (msti_pdf + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long ckih_rate;</div><div class='del'>-</div><div class='del'>-static unsigned long clk_ckih_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return ckih_rate;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk_ckil_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return CKIL_CLK_FREQ;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk ckih_clk = {</div><div class='del'>-	.get_rate = clk_ckih_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk mcu_pll_clk = {</div><div class='del'>-	.parent = &amp;ckih_clk,</div><div class='del'>-	.get_rate = mcu_pll_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk mcu_main_clk = {</div><div class='del'>-	.parent = &amp;mcu_pll_clk,</div><div class='del'>-	.get_rate = mcu_main_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk serial_pll_clk = {</div><div class='del'>-	.parent = &amp;ckih_clk,</div><div class='del'>-	.get_rate = serial_pll_get_rate,</div><div class='del'>-	.enable = serial_pll_enable,</div><div class='del'>-	.disable = serial_pll_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk usb_pll_clk = {</div><div class='del'>-	.parent = &amp;ckih_clk,</div><div class='del'>-	.get_rate = usb_pll_get_rate,</div><div class='del'>-	.enable = usb_pll_enable,</div><div class='del'>-	.disable = usb_pll_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ahb_clk = {</div><div class='del'>-	.parent = &amp;mcu_main_clk,</div><div class='del'>-	.get_rate = ahb_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define DEFINE_CLOCK(name, i, er, es, gr, s, p)		\</div><div class='del'>-	static struct clk name = {			\</div><div class='del'>-		.id		= i,			\</div><div class='del'>-		.enable_reg	= er,			\</div><div class='del'>-		.enable_shift	= es,			\</div><div class='del'>-		.get_rate	= gr,			\</div><div class='del'>-		.enable		= cgr_enable,		\</div><div class='del'>-		.disable	= cgr_disable,		\</div><div class='del'>-		.secondary	= s,			\</div><div class='del'>-		.parent		= p,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define DEFINE_CLOCK1(name, i, er, es, getsetround, s, p)	\</div><div class='del'>-	static struct clk name = {				\</div><div class='del'>-		.id		= i,				\</div><div class='del'>-		.enable_reg	= er,				\</div><div class='del'>-		.enable_shift	= es,				\</div><div class='del'>-		.get_rate	= getsetround##_get_rate,	\</div><div class='del'>-		.set_rate	= getsetround##_set_rate,	\</div><div class='del'>-		.round_rate	= getsetround##_round_rate,	\</div><div class='del'>-		.enable		= cgr_enable,			\</div><div class='del'>-		.disable	= cgr_disable,			\</div><div class='del'>-		.secondary	= s,				\</div><div class='del'>-		.parent		= p,				\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(perclk_clk,  0, NULL,          0, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(ckil_clk,    0, NULL,          0, clk_ckil_get_rate, NULL, NULL);</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(sdhc1_clk,   0, MXC_CCM_CGR0,  0, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(sdhc2_clk,   1, MXC_CCM_CGR0,  2, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(gpt_clk,     0, MXC_CCM_CGR0,  4, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(epit1_clk,   0, MXC_CCM_CGR0,  6, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(epit2_clk,   1, MXC_CCM_CGR0,  8, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(iim_clk,     0, MXC_CCM_CGR0, 10, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(pata_clk,     0, MXC_CCM_CGR0, 12, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(sdma_clk1,   0, MXC_CCM_CGR0, 14, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(cspi3_clk,   2, MXC_CCM_CGR0, 16, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(rng_clk,     0, MXC_CCM_CGR0, 18, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(uart1_clk,   0, MXC_CCM_CGR0, 20, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(uart2_clk,   1, MXC_CCM_CGR0, 22, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(ssi1_clk,    0, MXC_CCM_CGR0, 24, ssi1_get_rate, NULL, &amp;serial_pll_clk);</div><div class='del'>-DEFINE_CLOCK(i2c1_clk,    0, MXC_CCM_CGR0, 26, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(i2c2_clk,    1, MXC_CCM_CGR0, 28, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(i2c3_clk,    2, MXC_CCM_CGR0, 30, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(mpeg4_clk,   0, MXC_CCM_CGR1,  0, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1,  2, mstick1_get_rate, NULL, &amp;usb_pll_clk);</div><div class='del'>-DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1,  4, mstick2_get_rate, NULL, &amp;usb_pll_clk);</div><div class='del'>-DEFINE_CLOCK1(csi_clk,    0, MXC_CCM_CGR1,  6, csi, NULL, &amp;serial_pll_clk);</div><div class='del'>-DEFINE_CLOCK(rtc_clk,     0, MXC_CCM_CGR1,  8, NULL, NULL, &amp;ckil_clk);</div><div class='del'>-DEFINE_CLOCK(wdog_clk,    0, MXC_CCM_CGR1, 10, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(pwm_clk,     0, MXC_CCM_CGR1, 12, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(usb_clk2,    0, MXC_CCM_CGR1, 18, usb_get_rate, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(kpp_clk,     0, MXC_CCM_CGR1, 20, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(ipu_clk,     0, MXC_CCM_CGR1, 22, hsp_get_rate, NULL, &amp;mcu_main_clk);</div><div class='del'>-DEFINE_CLOCK(uart3_clk,   2, MXC_CCM_CGR1, 24, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(uart4_clk,   3, MXC_CCM_CGR1, 26, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(uart5_clk,   4, MXC_CCM_CGR1, 28, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-DEFINE_CLOCK(owire_clk,   0, MXC_CCM_CGR1, 30, NULL, NULL, &amp;perclk_clk);</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(ssi2_clk,    1, MXC_CCM_CGR2,  0, ssi2_get_rate, NULL, &amp;serial_pll_clk);</div><div class='del'>-DEFINE_CLOCK(cspi1_clk,   0, MXC_CCM_CGR2,  2, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(cspi2_clk,   1, MXC_CCM_CGR2,  4, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(mbx_clk,     0, MXC_CCM_CGR2,  6, mbx_get_rate, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(emi_clk,     0, MXC_CCM_CGR2,  8, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(rtic_clk,    0, MXC_CCM_CGR2, 10, NULL, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK1(firi_clk,   0, MXC_CCM_CGR2, 12, firi, NULL, &amp;usb_pll_clk);</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(sdma_clk2,   0, NULL,          0, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(usb_clk1,    0, NULL,          0, usb_get_rate, NULL, &amp;usb_pll_clk);</div><div class='del'>-DEFINE_CLOCK(nfc_clk,     0, NULL,          0, nfc_get_rate, NULL, &amp;ahb_clk);</div><div class='del'>-DEFINE_CLOCK(scc_clk,     0, NULL,          0, NULL, NULL, &amp;ipg_clk);</div><div class='del'>-DEFINE_CLOCK(ipg_clk,     0, NULL,          0, ipg_get_rate, NULL, &amp;ahb_clk);</div><div class='del'>-</div><div class='del'>-#define _REGISTER_CLOCK(d, n, c) \</div><div class='del'>-	{ \</div><div class='del'>-		.dev_id = d, \</div><div class='del'>-		.con_id = n, \</div><div class='del'>-		.clk = &amp;c, \</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-static struct clk_lookup lookups[] = {</div><div class='del'>-	_REGISTER_CLOCK(NULL, "emi", emi_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx31-cspi.0", NULL, cspi1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx31-cspi.1", NULL, cspi2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx31-cspi.2", NULL, cspi3_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt", gpt_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "pwm", pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "rtc", rtc_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "epit", epit1_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "epit", epit2_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)</div><div class='del'>-	_REGISTER_CLOCK("ipu-core", NULL, ipu_clk)</div><div class='del'>-	_REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "kpp", kpp_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.0", "usb", usb_clk1)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_clk2)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.1", "usb", usb_clk1)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk2)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk1)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk2)</div><div class='del'>-	_REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1)</div><div class='del'>-	_REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2)</div><div class='del'>-	_REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)</div><div class='del'>-	/* i.mx31 has the i.mx21 type uart */</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "firi", firi_clk)</div><div class='del'>-	_REGISTER_CLOCK("pata_imx", NULL, pata_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "rtic", rtic_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "rng", rng_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx31-sdma", NULL, sdma_clk1)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "sdma_ipg", sdma_clk2)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "mstick", mstick1_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "mstick", mstick2_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "scc", scc_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "iim", iim_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "mbx", mbx_clk)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int __init mx31_clocks_init(unsigned long fref)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	ckih_rate = fref;</div><div class='del'>-</div><div class='del'>-	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='del'>-</div><div class='del'>-	/* change the csi_clk parent if necessary */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CCMR);</div><div class='del'>-	if (!(reg &amp; MXC_CCM_CCMR_CSCS))</div><div class='del'>-		if (clk_set_parent(&amp;csi_clk, &amp;usb_pll_clk))</div><div class='del'>-			pr_err("%s: error changing csi_clk parent\n", __func__);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* Turn off all possible clocks */</div><div class='del'>-	__raw_writel((3 &lt;&lt; 4), MXC_CCM_CGR0);</div><div class='del'>-	__raw_writel(0, MXC_CCM_CGR1);</div><div class='del'>-	__raw_writel((3 &lt;&lt; 8) | (3 &lt;&lt; 14) | (3 &lt;&lt; 16)|</div><div class='del'>-		     1 &lt;&lt; 27 | 1 &lt;&lt; 28, /* Bit 27 and 28 are not defined for</div><div class='del'>-					   MX32, but still required to be set */</div><div class='del'>-		     MXC_CCM_CGR2);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Before turning off usb_pll make sure ipg_per_clk is generated</div><div class='del'>-	 * by ipg_clk and not usb_pll.</div><div class='del'>-	 */</div><div class='del'>-	__raw_writel(__raw_readl(MXC_CCM_CCMR) | (1 &lt;&lt; 24), MXC_CCM_CCMR);</div><div class='del'>-</div><div class='del'>-	usb_pll_disable(&amp;usb_pll_clk);</div><div class='del'>-</div><div class='del'>-	pr_info("Clock input source is %ld\n", clk_get_rate(&amp;ckih_clk));</div><div class='del'>-</div><div class='del'>-	clk_enable(&amp;gpt_clk);</div><div class='del'>-	clk_enable(&amp;emi_clk);</div><div class='del'>-	clk_enable(&amp;iim_clk);</div><div class='del'>-	mx31_revision();</div><div class='del'>-	clk_disable(&amp;iim_clk);</div><div class='del'>-</div><div class='del'>-	clk_enable(&amp;serial_pll_clk);</div><div class='del'>-</div><div class='del'>-	if (mx31_revision() &gt;= IMX_CHIP_REVISION_2_0) {</div><div class='del'>-		reg = __raw_readl(MXC_CCM_PMCR1);</div><div class='del'>-		/* No PLL restart on DVFS switch; enable auto EMI handshake */</div><div class='del'>-		reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN;</div><div class='del'>-		__raw_writel(reg, MXC_CCM_PMCR1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mxc_timer_init(&amp;ipg_clk, MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR),</div><div class='del'>-			MX31_INT_GPT);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c<br/>deleted file mode 100644<br/>index e56c1a83eee3..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/clock-imx35.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/clock-imx35.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,536 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2009 by Sascha Hauer, Pengutronix</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation; either version 2</div><div class='del'>- * of the License, or (at your option) any later version.</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,</div><div class='del'>- * MA 02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/clock.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-</div><div class='del'>-#include "crmregs-imx3.h"</div><div class='del'>-</div><div class='del'>-#ifdef HAVE_SET_RATE_SUPPORT</div><div class='del'>-static void calc_dividers(u32 div, u32 *pre, u32 *post, u32 maxpost)</div><div class='del'>-{</div><div class='del'>-	u32 min_pre, temp_pre, old_err, err;</div><div class='del'>-</div><div class='del'>-	min_pre = (div - 1) / maxpost + 1;</div><div class='del'>-	old_err = 8;</div><div class='del'>-</div><div class='del'>-	for (temp_pre = 8; temp_pre &gt;= min_pre; temp_pre--) {</div><div class='del'>-		if (div &gt; (temp_pre * maxpost))</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if (div &lt; (temp_pre * temp_pre))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		err = div % temp_pre;</div><div class='del'>-</div><div class='del'>-		if (err == 0) {</div><div class='del'>-			*pre = temp_pre;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		err = temp_pre - err;</div><div class='del'>-</div><div class='del'>-		if (err &lt; old_err) {</div><div class='del'>-			old_err = err;</div><div class='del'>-			*pre = temp_pre;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*post = (div + *pre - 1) / *pre;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* get the best values for a 3-bit divider combined with a 6-bit divider */</div><div class='del'>-static void calc_dividers_3_6(u32 div, u32 *pre, u32 *post)</div><div class='del'>-{</div><div class='del'>-	if (div &gt;= 512) {</div><div class='del'>-		*pre = 8;</div><div class='del'>-		*post = 64;</div><div class='del'>-	} else if (div &gt;= 64) {</div><div class='del'>-		calc_dividers(div, pre, post, 64);</div><div class='del'>-	} else if (div &lt;= 8) {</div><div class='del'>-		*pre = div;</div><div class='del'>-		*post = 1;</div><div class='del'>-	} else {</div><div class='del'>-		*pre = 1;</div><div class='del'>-		*post = div;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* get the best values for two cascaded 3-bit dividers */</div><div class='del'>-static void calc_dividers_3_3(u32 div, u32 *pre, u32 *post)</div><div class='del'>-{</div><div class='del'>-	if (div &gt;= 64) {</div><div class='del'>-		*pre = *post = 8;</div><div class='del'>-	} else if (div &gt; 8) {</div><div class='del'>-		calc_dividers(div, pre, post, 8);</div><div class='del'>-	} else {</div><div class='del'>-		*pre = 1;</div><div class='del'>-		*post = div;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_mpll(void)</div><div class='del'>-{</div><div class='del'>-	ulong mpctl = __raw_readl(MX35_CCM_MPCTL);</div><div class='del'>-</div><div class='del'>-	return mxc_decode_pll(mpctl, 24000000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ppll(void)</div><div class='del'>-{</div><div class='del'>-	ulong ppctl = __raw_readl(MX35_CCM_PPCTL);</div><div class='del'>-</div><div class='del'>-	return mxc_decode_pll(ppctl, 24000000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct arm_ahb_div {</div><div class='del'>-	unsigned char arm, ahb, sel;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct arm_ahb_div clk_consumer[] = {</div><div class='del'>-	{ .arm = 1, .ahb = 4, .sel = 0},</div><div class='del'>-	{ .arm = 1, .ahb = 3, .sel = 1},</div><div class='del'>-	{ .arm = 2, .ahb = 2, .sel = 0},</div><div class='del'>-	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='del'>-	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='del'>-	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='del'>-	{ .arm = 4, .ahb = 1, .sel = 0},</div><div class='del'>-	{ .arm = 1, .ahb = 5, .sel = 0},</div><div class='del'>-	{ .arm = 1, .ahb = 8, .sel = 0},</div><div class='del'>-	{ .arm = 1, .ahb = 6, .sel = 1},</div><div class='del'>-	{ .arm = 2, .ahb = 4, .sel = 0},</div><div class='del'>-	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='del'>-	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='del'>-	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='del'>-	{ .arm = 4, .ahb = 2, .sel = 0},</div><div class='del'>-	{ .arm = 0, .ahb = 0, .sel = 0},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_arm(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0);</div><div class='del'>-	struct arm_ahb_div *aad;</div><div class='del'>-	unsigned long fref = get_rate_mpll();</div><div class='del'>-</div><div class='del'>-	aad = &amp;clk_consumer[(pdr0 &gt;&gt; 16) &amp; 0xf];</div><div class='del'>-	if (aad-&gt;sel)</div><div class='del'>-		fref = fref * 3 / 4;</div><div class='del'>-</div><div class='del'>-	return fref / aad-&gt;arm;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ahb(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0);</div><div class='del'>-	struct arm_ahb_div *aad;</div><div class='del'>-	unsigned long fref = get_rate_arm();</div><div class='del'>-</div><div class='del'>-	aad = &amp;clk_consumer[(pdr0 &gt;&gt; 16) &amp; 0xf];</div><div class='del'>-</div><div class='del'>-	return fref / aad-&gt;ahb;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ipg(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return get_rate_ahb(NULL) &gt;&gt; 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_uart(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long pdr3 = __raw_readl(MX35_CCM_PDR3);</div><div class='del'>-	unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4);</div><div class='del'>-	unsigned long div = ((pdr4 &gt;&gt; 10) &amp; 0x3f) + 1;</div><div class='del'>-</div><div class='del'>-	if (pdr3 &amp; (1 &lt;&lt; 14))</div><div class='del'>-		return get_rate_arm() / div;</div><div class='del'>-	else</div><div class='del'>-		return get_rate_ppll() / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_sdhc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long pdr3 = __raw_readl(MX35_CCM_PDR3);</div><div class='del'>-	unsigned long div, rate;</div><div class='del'>-</div><div class='del'>-	if (pdr3 &amp; (1 &lt;&lt; 6))</div><div class='del'>-		rate = get_rate_arm();</div><div class='del'>-	else</div><div class='del'>-		rate = get_rate_ppll();</div><div class='del'>-</div><div class='del'>-	switch (clk-&gt;id) {</div><div class='del'>-	default:</div><div class='del'>-	case 0:</div><div class='del'>-		div = pdr3 &amp; 0x3f;</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		div = (pdr3 &gt;&gt; 8) &amp; 0x3f;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		div = (pdr3 &gt;&gt; 16) &amp; 0x3f;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return rate / (div + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_mshc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long pdr1 = __raw_readl(MXC_CCM_PDR1);</div><div class='del'>-	unsigned long div1, div2, rate;</div><div class='del'>-</div><div class='del'>-	if (pdr1 &amp; (1 &lt;&lt; 7))</div><div class='del'>-		rate = get_rate_arm();</div><div class='del'>-	else</div><div class='del'>-		rate = get_rate_ppll();</div><div class='del'>-</div><div class='del'>-	div1 = (pdr1 &gt;&gt; 29) &amp; 0x7;</div><div class='del'>-	div2 = (pdr1 &gt;&gt; 22) &amp; 0x3f;</div><div class='del'>-</div><div class='del'>-	return rate / ((div1 + 1) * (div2 + 1));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ssi(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long pdr2 = __raw_readl(MX35_CCM_PDR2);</div><div class='del'>-	unsigned long div1, div2, rate;</div><div class='del'>-</div><div class='del'>-	if (pdr2 &amp; (1 &lt;&lt; 6))</div><div class='del'>-		rate = get_rate_arm();</div><div class='del'>-	else</div><div class='del'>-		rate = get_rate_ppll();</div><div class='del'>-</div><div class='del'>-	switch (clk-&gt;id) {</div><div class='del'>-	default:</div><div class='del'>-	case 0:</div><div class='del'>-		div1 = pdr2 &amp; 0x3f;</div><div class='del'>-		div2 = (pdr2 &gt;&gt; 24) &amp; 0x7;</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		div1 = (pdr2 &gt;&gt; 8) &amp; 0x3f;</div><div class='del'>-		div2 = (pdr2 &gt;&gt; 27) &amp; 0x7;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return rate / ((div1 + 1) * (div2 + 1));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_csi(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long pdr2 = __raw_readl(MX35_CCM_PDR2);</div><div class='del'>-	unsigned long rate;</div><div class='del'>-</div><div class='del'>-	if (pdr2 &amp; (1 &lt;&lt; 7))</div><div class='del'>-		rate = get_rate_arm();</div><div class='del'>-	else</div><div class='del'>-		rate = get_rate_ppll();</div><div class='del'>-</div><div class='del'>-	return rate / (((pdr2 &gt;&gt; 16) &amp; 0x3f) + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_otg(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4);</div><div class='del'>-	unsigned long rate;</div><div class='del'>-</div><div class='del'>-	if (pdr4 &amp; (1 &lt;&lt; 9))</div><div class='del'>-		rate = get_rate_arm();</div><div class='del'>-	else</div><div class='del'>-		rate = get_rate_ppll();</div><div class='del'>-</div><div class='del'>-	return rate / (((pdr4 &gt;&gt; 22) &amp; 0x3f) + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_ipg_per(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0);</div><div class='del'>-	unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4);</div><div class='del'>-	unsigned long div;</div><div class='del'>-</div><div class='del'>-	if (pdr0 &amp; (1 &lt;&lt; 26)) {</div><div class='del'>-		div = (pdr4 &gt;&gt; 16) &amp; 0x3f;</div><div class='del'>-		return get_rate_arm() / (div + 1);</div><div class='del'>-	} else {</div><div class='del'>-		div = (pdr0 &gt;&gt; 12) &amp; 0x7;</div><div class='del'>-		return get_rate_ahb(NULL) / (div + 1);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_hsp(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long hsp_podf = (__raw_readl(MXC_CCM_PDR0) &gt;&gt; 20) &amp; 0x03;</div><div class='del'>-	unsigned long fref = get_rate_mpll();</div><div class='del'>-</div><div class='del'>-	if (fref &gt; 400 * 1000 * 1000) {</div><div class='del'>-		switch (hsp_podf) {</div><div class='del'>-		case 0:</div><div class='del'>-			return fref &gt;&gt; 2;</div><div class='del'>-		case 1:</div><div class='del'>-			return fref &gt;&gt; 3;</div><div class='del'>-		case 2:</div><div class='del'>-			return fref / 3;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		switch (hsp_podf) {</div><div class='del'>-		case 0:</div><div class='del'>-		case 2:</div><div class='del'>-			return fref / 3;</div><div class='del'>-		case 1:</div><div class='del'>-			return fref / 6;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int clk_cgr_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-	reg |= 3 &lt;&lt; clk-&gt;enable_shift;</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clk_cgr_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-	reg &amp;= ~(3 &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define DEFINE_CLOCK(name, i, er, es, gr, sr)		\</div><div class='del'>-	static struct clk name = {			\</div><div class='del'>-		.id		= i,			\</div><div class='del'>-		.enable_reg	= er,			\</div><div class='del'>-		.enable_shift	= es,			\</div><div class='del'>-		.get_rate	= gr,			\</div><div class='del'>-		.set_rate	= sr,			\</div><div class='del'>-		.enable		= clk_cgr_enable,	\</div><div class='del'>-		.disable	= clk_cgr_disable,	\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(asrc_clk,   0, MX35_CCM_CGR0,  0, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(pata_clk,    0, MX35_CCM_CGR0,  2, get_rate_ipg, NULL);</div><div class='del'>-/* DEFINE_CLOCK(audmux_clk, 0, MX35_CCM_CGR0,  4, NULL, NULL); */</div><div class='del'>-DEFINE_CLOCK(can1_clk,   0, MX35_CCM_CGR0,  6, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(can2_clk,   1, MX35_CCM_CGR0,  8, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(cspi1_clk,  0, MX35_CCM_CGR0, 10, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(cspi2_clk,  1, MX35_CCM_CGR0, 12, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(ect_clk,    0, MX35_CCM_CGR0, 14, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(edio_clk,   0, MX35_CCM_CGR0, 16, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(emi_clk,    0, MX35_CCM_CGR0, 18, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(epit1_clk,  0, MX35_CCM_CGR0, 20, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(epit2_clk,  1, MX35_CCM_CGR0, 22, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(esai_clk,   0, MX35_CCM_CGR0, 24, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(esdhc1_clk, 0, MX35_CCM_CGR0, 26, get_rate_sdhc, NULL);</div><div class='del'>-DEFINE_CLOCK(esdhc2_clk, 1, MX35_CCM_CGR0, 28, get_rate_sdhc, NULL);</div><div class='del'>-DEFINE_CLOCK(esdhc3_clk, 2, MX35_CCM_CGR0, 30, get_rate_sdhc, NULL);</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(fec_clk,    0, MX35_CCM_CGR1,  0, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(gpio1_clk,  0, MX35_CCM_CGR1,  2, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(gpio2_clk,  1, MX35_CCM_CGR1,  4, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(gpio3_clk,  2, MX35_CCM_CGR1,  6, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(gpt_clk,    0, MX35_CCM_CGR1,  8, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(i2c1_clk,   0, MX35_CCM_CGR1, 10, get_rate_ipg_per, NULL);</div><div class='del'>-DEFINE_CLOCK(i2c2_clk,   1, MX35_CCM_CGR1, 12, get_rate_ipg_per, NULL);</div><div class='del'>-DEFINE_CLOCK(i2c3_clk,   2, MX35_CCM_CGR1, 14, get_rate_ipg_per, NULL);</div><div class='del'>-DEFINE_CLOCK(iomuxc_clk, 0, MX35_CCM_CGR1, 16, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(ipu_clk,    0, MX35_CCM_CGR1, 18, get_rate_hsp, NULL);</div><div class='del'>-DEFINE_CLOCK(kpp_clk,    0, MX35_CCM_CGR1, 20, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(mlb_clk,    0, MX35_CCM_CGR1, 22, get_rate_ahb, NULL);</div><div class='del'>-DEFINE_CLOCK(mshc_clk,   0, MX35_CCM_CGR1, 24, get_rate_mshc, NULL);</div><div class='del'>-DEFINE_CLOCK(owire_clk,  0, MX35_CCM_CGR1, 26, get_rate_ipg_per, NULL);</div><div class='del'>-DEFINE_CLOCK(pwm_clk,    0, MX35_CCM_CGR1, 28, get_rate_ipg_per, NULL);</div><div class='del'>-DEFINE_CLOCK(rngc_clk,   0, MX35_CCM_CGR1, 30, get_rate_ipg, NULL);</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(rtc_clk,    0, MX35_CCM_CGR2,  0, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(rtic_clk,   0, MX35_CCM_CGR2,  2, get_rate_ahb, NULL);</div><div class='del'>-DEFINE_CLOCK(scc_clk,    0, MX35_CCM_CGR2,  4, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(sdma_clk,   0, MX35_CCM_CGR2,  6, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(spba_clk,   0, MX35_CCM_CGR2,  8, get_rate_ipg, NULL);</div><div class='del'>-DEFINE_CLOCK(spdif_clk,  0, MX35_CCM_CGR2, 10, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(ssi1_clk,   0, MX35_CCM_CGR2, 12, get_rate_ssi, NULL);</div><div class='del'>-DEFINE_CLOCK(ssi2_clk,   1, MX35_CCM_CGR2, 14, get_rate_ssi, NULL);</div><div class='del'>-DEFINE_CLOCK(uart1_clk,  0, MX35_CCM_CGR2, 16, get_rate_uart, NULL);</div><div class='del'>-DEFINE_CLOCK(uart2_clk,  1, MX35_CCM_CGR2, 18, get_rate_uart, NULL);</div><div class='del'>-DEFINE_CLOCK(uart3_clk,  2, MX35_CCM_CGR2, 20, get_rate_uart, NULL);</div><div class='del'>-DEFINE_CLOCK(usbotg_clk, 0, MX35_CCM_CGR2, 22, get_rate_otg, NULL);</div><div class='del'>-DEFINE_CLOCK(wdog_clk,   0, MX35_CCM_CGR2, 24, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(max_clk,    0, MX35_CCM_CGR2, 26, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(audmux_clk, 0, MX35_CCM_CGR2, 30, NULL, NULL);</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(csi_clk,    0, MX35_CCM_CGR3,  0, get_rate_csi, NULL);</div><div class='del'>-DEFINE_CLOCK(iim_clk,    0, MX35_CCM_CGR3,  2, NULL, NULL);</div><div class='del'>-DEFINE_CLOCK(gpu2d_clk,  0, MX35_CCM_CGR3,  4, NULL, NULL);</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(usbahb_clk, 0, 0,         0, get_rate_ahb, NULL);</div><div class='del'>-</div><div class='del'>-static int clk_dummy_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clk_dummy_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_rate_nfc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long div1;</div><div class='del'>-</div><div class='del'>-	div1 = (__raw_readl(MX35_CCM_PDR4) &gt;&gt; 28) + 1;</div><div class='del'>-</div><div class='del'>-	return get_rate_ahb(NULL) / div1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* NAND Controller: It seems it can't be disabled */</div><div class='del'>-static struct clk nfc_clk = {</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.enable_reg	= 0,</div><div class='del'>-	.enable_shift	= 0,</div><div class='del'>-	.get_rate	= get_rate_nfc,</div><div class='del'>-	.set_rate	= NULL, /* set_rate_nfc, */</div><div class='del'>-	.enable		= clk_dummy_enable,</div><div class='del'>-	.disable	= clk_dummy_disable</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define _REGISTER_CLOCK(d, n, c)	\</div><div class='del'>-	{				\</div><div class='del'>-		.dev_id = d,		\</div><div class='del'>-		.con_id = n,		\</div><div class='del'>-		.clk = &amp;c,		\</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-static struct clk_lookup lookups[] = {</div><div class='del'>-	_REGISTER_CLOCK(NULL, "asrc", asrc_clk)</div><div class='del'>-	_REGISTER_CLOCK("pata_imx", NULL, pata_clk)</div><div class='del'>-	_REGISTER_CLOCK("flexcan.0", NULL, can1_clk)</div><div class='del'>-	_REGISTER_CLOCK("flexcan.1", NULL, can2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx35-cspi.0", NULL, cspi1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx35-cspi.1", NULL, cspi2_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "ect", ect_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "edio", edio_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "emi", emi_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-epit.0", NULL, epit1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-epit.1", NULL, epit2_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "esai", esai_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx35.0", NULL, esdhc1_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx35.1", NULL, esdhc2_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx35.2", NULL, esdhc3_clk)</div><div class='del'>-	/* i.mx35 has the i.mx27 type fec */</div><div class='del'>-	_REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpio", gpio1_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpio", gpio2_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpio", gpio3_clk)</div><div class='del'>-	_REGISTER_CLOCK("gpt.0", NULL, gpt_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "iomuxc", iomuxc_clk)</div><div class='del'>-	_REGISTER_CLOCK("ipu-core", NULL, ipu_clk)</div><div class='del'>-	_REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "kpp", kpp_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "mlb", mlb_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "mshc", mshc_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_w1", NULL, owire_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "pwm", pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "rngc", rngc_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "rtc", rtc_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "rtic", rtic_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "scc", scc_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "spba", spba_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "spdif", spdif_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)</div><div class='del'>-	/* i.mx35 has the i.mx21 type uart */</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.0", "usb", usbotg_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)</div><div class='del'>-	_REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)</div><div class='del'>-	_REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usbahb_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "max", max_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "audmux", audmux_clk)</div><div class='del'>-	_REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "iim", iim_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int __init mx35_clocks_init()</div><div class='del'>-{</div><div class='del'>-	unsigned int cgr2 = 3 &lt;&lt; 26;</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_DEBUG_LL) &amp;&amp; !defined(CONFIG_DEBUG_ICEDCC)</div><div class='del'>-	cgr2 |= 3 &lt;&lt; 16;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='del'>-</div><div class='del'>-	/* Turn off all clocks except the ones we need to survive, namely:</div><div class='del'>-	 * EMI, GPIO1/2/3, GPT, IOMUX, MAX and eventually uart</div><div class='del'>-	 */</div><div class='del'>-	__raw_writel((3 &lt;&lt; 18), MX35_CCM_CGR0);</div><div class='del'>-	__raw_writel((3 &lt;&lt; 2) | (3 &lt;&lt; 4) | (3 &lt;&lt; 6) | (3 &lt;&lt; 8) | (3 &lt;&lt; 16),</div><div class='del'>-			MX35_CCM_CGR1);</div><div class='del'>-	__raw_writel(cgr2, MX35_CCM_CGR2);</div><div class='del'>-	__raw_writel(0, MX35_CCM_CGR3);</div><div class='del'>-</div><div class='del'>-	clk_enable(&amp;iim_clk);</div><div class='del'>-	imx_print_silicon_rev("i.MX35", mx35_revision());</div><div class='del'>-	clk_disable(&amp;iim_clk);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Check if we came up in internal boot mode. If yes, we need some</div><div class='del'>-	 * extra clocks turned on, otherwise the MX35 boot ROM code will</div><div class='del'>-	 * hang after a watchdog reset.</div><div class='del'>-	 */</div><div class='del'>-	if (!(__raw_readl(MX35_CCM_RCSR) &amp; (3 &lt;&lt; 10))) {</div><div class='del'>-		/* Additionally turn on UART1, SCC, and IIM clocks */</div><div class='del'>-		clk_enable(&amp;iim_clk);</div><div class='del'>-		clk_enable(&amp;uart1_clk);</div><div class='del'>-		clk_enable(&amp;scc_clk);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_MXC_USE_EPIT</div><div class='del'>-	epit_timer_init(&amp;epit1_clk,</div><div class='del'>-			MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);</div><div class='del'>-#else</div><div class='del'>-	mxc_timer_init(&amp;gpt_clk,</div><div class='del'>-			MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c<br/>deleted file mode 100644<br/>index 111c328f5420..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/clock-imx6q.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/clock-imx6q.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,2111 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright 2011 Freescale Semiconductor, Inc.</div><div class='del'>- * Copyright 2011 Linaro Ltd.</div><div class='del'>- *</div><div class='del'>- * The code contained herein is licensed under the GNU General Public</div><div class='del'>- * License. You may obtain a copy of the GNU General Public License</div><div class='del'>- * Version 2 or later at the following locations:</div><div class='del'>- *</div><div class='del'>- * http://www.opensource.org/licenses/gpl-license.html</div><div class='del'>- * http://www.gnu.org/copyleft/gpl.html</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-#include &lt;linux/of_irq.h&gt;</div><div class='del'>-#include &lt;asm/div64.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;mach/clock.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-#define PLL_BASE		IMX_IO_ADDRESS(MX6Q_ANATOP_BASE_ADDR)</div><div class='del'>-#define PLL1_SYS		(PLL_BASE + 0x000)</div><div class='del'>-#define PLL2_BUS		(PLL_BASE + 0x030)</div><div class='del'>-#define PLL3_USB_OTG		(PLL_BASE + 0x010)</div><div class='del'>-#define PLL4_AUDIO		(PLL_BASE + 0x070)</div><div class='del'>-#define PLL5_VIDEO		(PLL_BASE + 0x0a0)</div><div class='del'>-#define PLL6_MLB		(PLL_BASE + 0x0d0)</div><div class='del'>-#define PLL7_USB_HOST		(PLL_BASE + 0x020)</div><div class='del'>-#define PLL8_ENET		(PLL_BASE + 0x0e0)</div><div class='del'>-#define PFD_480			(PLL_BASE + 0x0f0)</div><div class='del'>-#define PFD_528			(PLL_BASE + 0x100)</div><div class='del'>-#define PLL_NUM_OFFSET		0x010</div><div class='del'>-#define PLL_DENOM_OFFSET	0x020</div><div class='del'>-</div><div class='del'>-#define PFD0			7</div><div class='del'>-#define PFD1			15</div><div class='del'>-#define PFD2			23</div><div class='del'>-#define PFD3			31</div><div class='del'>-#define PFD_FRAC_MASK		0x3f</div><div class='del'>-</div><div class='del'>-#define BM_PLL_BYPASS			(0x1 &lt;&lt; 16)</div><div class='del'>-#define BM_PLL_ENABLE			(0x1 &lt;&lt; 13)</div><div class='del'>-#define BM_PLL_POWER_DOWN		(0x1 &lt;&lt; 12)</div><div class='del'>-#define BM_PLL_LOCK			(0x1 &lt;&lt; 31)</div><div class='del'>-#define BP_PLL_SYS_DIV_SELECT		0</div><div class='del'>-#define BM_PLL_SYS_DIV_SELECT		(0x7f &lt;&lt; 0)</div><div class='del'>-#define BP_PLL_BUS_DIV_SELECT		0</div><div class='del'>-#define BM_PLL_BUS_DIV_SELECT		(0x1 &lt;&lt; 0)</div><div class='del'>-#define BP_PLL_USB_DIV_SELECT		0</div><div class='del'>-#define BM_PLL_USB_DIV_SELECT		(0x3 &lt;&lt; 0)</div><div class='del'>-#define BP_PLL_AV_DIV_SELECT		0</div><div class='del'>-#define BM_PLL_AV_DIV_SELECT		(0x7f &lt;&lt; 0)</div><div class='del'>-#define BP_PLL_ENET_DIV_SELECT		0</div><div class='del'>-#define BM_PLL_ENET_DIV_SELECT		(0x3 &lt;&lt; 0)</div><div class='del'>-#define BM_PLL_ENET_EN_PCIE		(0x1 &lt;&lt; 19)</div><div class='del'>-#define BM_PLL_ENET_EN_SATA		(0x1 &lt;&lt; 20)</div><div class='del'>-</div><div class='del'>-#define CCM_BASE	IMX_IO_ADDRESS(MX6Q_CCM_BASE_ADDR)</div><div class='del'>-#define CCR		(CCM_BASE + 0x00)</div><div class='del'>-#define CCDR		(CCM_BASE + 0x04)</div><div class='del'>-#define CSR		(CCM_BASE + 0x08)</div><div class='del'>-#define CCSR		(CCM_BASE + 0x0c)</div><div class='del'>-#define CACRR		(CCM_BASE + 0x10)</div><div class='del'>-#define CBCDR		(CCM_BASE + 0x14)</div><div class='del'>-#define CBCMR		(CCM_BASE + 0x18)</div><div class='del'>-#define CSCMR1		(CCM_BASE + 0x1c)</div><div class='del'>-#define CSCMR2		(CCM_BASE + 0x20)</div><div class='del'>-#define CSCDR1		(CCM_BASE + 0x24)</div><div class='del'>-#define CS1CDR		(CCM_BASE + 0x28)</div><div class='del'>-#define CS2CDR		(CCM_BASE + 0x2c)</div><div class='del'>-#define CDCDR		(CCM_BASE + 0x30)</div><div class='del'>-#define CHSCCDR		(CCM_BASE + 0x34)</div><div class='del'>-#define CSCDR2		(CCM_BASE + 0x38)</div><div class='del'>-#define CSCDR3		(CCM_BASE + 0x3c)</div><div class='del'>-#define CSCDR4		(CCM_BASE + 0x40)</div><div class='del'>-#define CWDR		(CCM_BASE + 0x44)</div><div class='del'>-#define CDHIPR		(CCM_BASE + 0x48)</div><div class='del'>-#define CDCR		(CCM_BASE + 0x4c)</div><div class='del'>-#define CTOR		(CCM_BASE + 0x50)</div><div class='del'>-#define CLPCR		(CCM_BASE + 0x54)</div><div class='del'>-#define CISR		(CCM_BASE + 0x58)</div><div class='del'>-#define CIMR		(CCM_BASE + 0x5c)</div><div class='del'>-#define CCOSR		(CCM_BASE + 0x60)</div><div class='del'>-#define CGPR		(CCM_BASE + 0x64)</div><div class='del'>-#define CCGR0		(CCM_BASE + 0x68)</div><div class='del'>-#define CCGR1		(CCM_BASE + 0x6c)</div><div class='del'>-#define CCGR2		(CCM_BASE + 0x70)</div><div class='del'>-#define CCGR3		(CCM_BASE + 0x74)</div><div class='del'>-#define CCGR4		(CCM_BASE + 0x78)</div><div class='del'>-#define CCGR5		(CCM_BASE + 0x7c)</div><div class='del'>-#define CCGR6		(CCM_BASE + 0x80)</div><div class='del'>-#define CCGR7		(CCM_BASE + 0x84)</div><div class='del'>-#define CMEOR		(CCM_BASE + 0x88)</div><div class='del'>-</div><div class='del'>-#define CG0		0</div><div class='del'>-#define CG1		2</div><div class='del'>-#define CG2		4</div><div class='del'>-#define CG3		6</div><div class='del'>-#define CG4		8</div><div class='del'>-#define CG5		10</div><div class='del'>-#define CG6		12</div><div class='del'>-#define CG7		14</div><div class='del'>-#define CG8		16</div><div class='del'>-#define CG9		18</div><div class='del'>-#define CG10		20</div><div class='del'>-#define CG11		22</div><div class='del'>-#define CG12		24</div><div class='del'>-#define CG13		26</div><div class='del'>-#define CG14		28</div><div class='del'>-#define CG15		30</div><div class='del'>-</div><div class='del'>-#define BM_CCSR_PLL1_SW_SEL		(0x1 &lt;&lt; 2)</div><div class='del'>-#define BM_CCSR_STEP_SEL		(0x1 &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-#define BP_CACRR_ARM_PODF		0</div><div class='del'>-#define BM_CACRR_ARM_PODF		(0x7 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define BP_CBCDR_PERIPH2_CLK2_PODF	0</div><div class='del'>-#define BM_CBCDR_PERIPH2_CLK2_PODF	(0x7 &lt;&lt; 0)</div><div class='del'>-#define BP_CBCDR_MMDC_CH1_AXI_PODF	3</div><div class='del'>-#define BM_CBCDR_MMDC_CH1_AXI_PODF	(0x7 &lt;&lt; 3)</div><div class='del'>-#define BP_CBCDR_AXI_SEL		6</div><div class='del'>-#define BM_CBCDR_AXI_SEL		(0x3 &lt;&lt; 6)</div><div class='del'>-#define BP_CBCDR_IPG_PODF		8</div><div class='del'>-#define BM_CBCDR_IPG_PODF		(0x3 &lt;&lt; 8)</div><div class='del'>-#define BP_CBCDR_AHB_PODF		10</div><div class='del'>-#define BM_CBCDR_AHB_PODF		(0x7 &lt;&lt; 10)</div><div class='del'>-#define BP_CBCDR_AXI_PODF		16</div><div class='del'>-#define BM_CBCDR_AXI_PODF		(0x7 &lt;&lt; 16)</div><div class='del'>-#define BP_CBCDR_MMDC_CH0_AXI_PODF	19</div><div class='del'>-#define BM_CBCDR_MMDC_CH0_AXI_PODF	(0x7 &lt;&lt; 19)</div><div class='del'>-#define BP_CBCDR_PERIPH_CLK_SEL		25</div><div class='del'>-#define BM_CBCDR_PERIPH_CLK_SEL		(0x1 &lt;&lt; 25)</div><div class='del'>-#define BP_CBCDR_PERIPH2_CLK_SEL	26</div><div class='del'>-#define BM_CBCDR_PERIPH2_CLK_SEL	(0x1 &lt;&lt; 26)</div><div class='del'>-#define BP_CBCDR_PERIPH_CLK2_PODF	27</div><div class='del'>-#define BM_CBCDR_PERIPH_CLK2_PODF	(0x7 &lt;&lt; 27)</div><div class='del'>-</div><div class='del'>-#define BP_CBCMR_GPU2D_AXI_SEL		0</div><div class='del'>-#define BM_CBCMR_GPU2D_AXI_SEL		(0x1 &lt;&lt; 0)</div><div class='del'>-#define BP_CBCMR_GPU3D_AXI_SEL		1</div><div class='del'>-#define BM_CBCMR_GPU3D_AXI_SEL		(0x1 &lt;&lt; 1)</div><div class='del'>-#define BP_CBCMR_GPU3D_CORE_SEL		4</div><div class='del'>-#define BM_CBCMR_GPU3D_CORE_SEL		(0x3 &lt;&lt; 4)</div><div class='del'>-#define BP_CBCMR_GPU3D_SHADER_SEL	8</div><div class='del'>-#define BM_CBCMR_GPU3D_SHADER_SEL	(0x3 &lt;&lt; 8)</div><div class='del'>-#define BP_CBCMR_PCIE_AXI_SEL		10</div><div class='del'>-#define BM_CBCMR_PCIE_AXI_SEL		(0x1 &lt;&lt; 10)</div><div class='del'>-#define BP_CBCMR_VDO_AXI_SEL		11</div><div class='del'>-#define BM_CBCMR_VDO_AXI_SEL		(0x1 &lt;&lt; 11)</div><div class='del'>-#define BP_CBCMR_PERIPH_CLK2_SEL	12</div><div class='del'>-#define BM_CBCMR_PERIPH_CLK2_SEL	(0x3 &lt;&lt; 12)</div><div class='del'>-#define BP_CBCMR_VPU_AXI_SEL		14</div><div class='del'>-#define BM_CBCMR_VPU_AXI_SEL		(0x3 &lt;&lt; 14)</div><div class='del'>-#define BP_CBCMR_GPU2D_CORE_SEL		16</div><div class='del'>-#define BM_CBCMR_GPU2D_CORE_SEL		(0x3 &lt;&lt; 16)</div><div class='del'>-#define BP_CBCMR_PRE_PERIPH_CLK_SEL	18</div><div class='del'>-#define BM_CBCMR_PRE_PERIPH_CLK_SEL	(0x3 &lt;&lt; 18)</div><div class='del'>-#define BP_CBCMR_PERIPH2_CLK2_SEL	20</div><div class='del'>-#define BM_CBCMR_PERIPH2_CLK2_SEL	(0x1 &lt;&lt; 20)</div><div class='del'>-#define BP_CBCMR_PRE_PERIPH2_CLK_SEL	21</div><div class='del'>-#define BM_CBCMR_PRE_PERIPH2_CLK_SEL	(0x3 &lt;&lt; 21)</div><div class='del'>-#define BP_CBCMR_GPU2D_CORE_PODF	23</div><div class='del'>-#define BM_CBCMR_GPU2D_CORE_PODF	(0x7 &lt;&lt; 23)</div><div class='del'>-#define BP_CBCMR_GPU3D_CORE_PODF	26</div><div class='del'>-#define BM_CBCMR_GPU3D_CORE_PODF	(0x7 &lt;&lt; 26)</div><div class='del'>-#define BP_CBCMR_GPU3D_SHADER_PODF	29</div><div class='del'>-#define BM_CBCMR_GPU3D_SHADER_PODF	(0x7 &lt;&lt; 29)</div><div class='del'>-</div><div class='del'>-#define BP_CSCMR1_PERCLK_PODF		0</div><div class='del'>-#define BM_CSCMR1_PERCLK_PODF		(0x3f &lt;&lt; 0)</div><div class='del'>-#define BP_CSCMR1_SSI1_SEL		10</div><div class='del'>-#define BM_CSCMR1_SSI1_SEL		(0x3 &lt;&lt; 10)</div><div class='del'>-#define BP_CSCMR1_SSI2_SEL		12</div><div class='del'>-#define BM_CSCMR1_SSI2_SEL		(0x3 &lt;&lt; 12)</div><div class='del'>-#define BP_CSCMR1_SSI3_SEL		14</div><div class='del'>-#define BM_CSCMR1_SSI3_SEL		(0x3 &lt;&lt; 14)</div><div class='del'>-#define BP_CSCMR1_USDHC1_SEL		16</div><div class='del'>-#define BM_CSCMR1_USDHC1_SEL		(0x1 &lt;&lt; 16)</div><div class='del'>-#define BP_CSCMR1_USDHC2_SEL		17</div><div class='del'>-#define BM_CSCMR1_USDHC2_SEL		(0x1 &lt;&lt; 17)</div><div class='del'>-#define BP_CSCMR1_USDHC3_SEL		18</div><div class='del'>-#define BM_CSCMR1_USDHC3_SEL		(0x1 &lt;&lt; 18)</div><div class='del'>-#define BP_CSCMR1_USDHC4_SEL		19</div><div class='del'>-#define BM_CSCMR1_USDHC4_SEL		(0x1 &lt;&lt; 19)</div><div class='del'>-#define BP_CSCMR1_EMI_PODF		20</div><div class='del'>-#define BM_CSCMR1_EMI_PODF		(0x7 &lt;&lt; 20)</div><div class='del'>-#define BP_CSCMR1_EMI_SLOW_PODF		23</div><div class='del'>-#define BM_CSCMR1_EMI_SLOW_PODF		(0x7 &lt;&lt; 23)</div><div class='del'>-#define BP_CSCMR1_EMI_SEL		27</div><div class='del'>-#define BM_CSCMR1_EMI_SEL		(0x3 &lt;&lt; 27)</div><div class='del'>-#define BP_CSCMR1_EMI_SLOW_SEL		29</div><div class='del'>-#define BM_CSCMR1_EMI_SLOW_SEL		(0x3 &lt;&lt; 29)</div><div class='del'>-</div><div class='del'>-#define BP_CSCMR2_CAN_PODF		2</div><div class='del'>-#define BM_CSCMR2_CAN_PODF		(0x3f &lt;&lt; 2)</div><div class='del'>-#define BM_CSCMR2_LDB_DI0_IPU_DIV	(0x1 &lt;&lt; 10)</div><div class='del'>-#define BM_CSCMR2_LDB_DI1_IPU_DIV	(0x1 &lt;&lt; 11)</div><div class='del'>-#define BP_CSCMR2_ESAI_SEL		19</div><div class='del'>-#define BM_CSCMR2_ESAI_SEL		(0x3 &lt;&lt; 19)</div><div class='del'>-</div><div class='del'>-#define BP_CSCDR1_UART_PODF		0</div><div class='del'>-#define BM_CSCDR1_UART_PODF		(0x3f &lt;&lt; 0)</div><div class='del'>-#define BP_CSCDR1_USDHC1_PODF		11</div><div class='del'>-#define BM_CSCDR1_USDHC1_PODF		(0x7 &lt;&lt; 11)</div><div class='del'>-#define BP_CSCDR1_USDHC2_PODF		16</div><div class='del'>-#define BM_CSCDR1_USDHC2_PODF		(0x7 &lt;&lt; 16)</div><div class='del'>-#define BP_CSCDR1_USDHC3_PODF		19</div><div class='del'>-#define BM_CSCDR1_USDHC3_PODF		(0x7 &lt;&lt; 19)</div><div class='del'>-#define BP_CSCDR1_USDHC4_PODF		22</div><div class='del'>-#define BM_CSCDR1_USDHC4_PODF		(0x7 &lt;&lt; 22)</div><div class='del'>-#define BP_CSCDR1_VPU_AXI_PODF		25</div><div class='del'>-#define BM_CSCDR1_VPU_AXI_PODF		(0x7 &lt;&lt; 25)</div><div class='del'>-</div><div class='del'>-#define BP_CS1CDR_SSI1_PODF		0</div><div class='del'>-#define BM_CS1CDR_SSI1_PODF		(0x3f &lt;&lt; 0)</div><div class='del'>-#define BP_CS1CDR_SSI1_PRED		6</div><div class='del'>-#define BM_CS1CDR_SSI1_PRED		(0x7 &lt;&lt; 6)</div><div class='del'>-#define BP_CS1CDR_ESAI_PRED		9</div><div class='del'>-#define BM_CS1CDR_ESAI_PRED		(0x7 &lt;&lt; 9)</div><div class='del'>-#define BP_CS1CDR_SSI3_PODF		16</div><div class='del'>-#define BM_CS1CDR_SSI3_PODF		(0x3f &lt;&lt; 16)</div><div class='del'>-#define BP_CS1CDR_SSI3_PRED		22</div><div class='del'>-#define BM_CS1CDR_SSI3_PRED		(0x7 &lt;&lt; 22)</div><div class='del'>-#define BP_CS1CDR_ESAI_PODF		25</div><div class='del'>-#define BM_CS1CDR_ESAI_PODF		(0x7 &lt;&lt; 25)</div><div class='del'>-</div><div class='del'>-#define BP_CS2CDR_SSI2_PODF		0</div><div class='del'>-#define BM_CS2CDR_SSI2_PODF		(0x3f &lt;&lt; 0)</div><div class='del'>-#define BP_CS2CDR_SSI2_PRED		6</div><div class='del'>-#define BM_CS2CDR_SSI2_PRED		(0x7 &lt;&lt; 6)</div><div class='del'>-#define BP_CS2CDR_LDB_DI0_SEL		9</div><div class='del'>-#define BM_CS2CDR_LDB_DI0_SEL		(0x7 &lt;&lt; 9)</div><div class='del'>-#define BP_CS2CDR_LDB_DI1_SEL		12</div><div class='del'>-#define BM_CS2CDR_LDB_DI1_SEL		(0x7 &lt;&lt; 12)</div><div class='del'>-#define BP_CS2CDR_ENFC_SEL		16</div><div class='del'>-#define BM_CS2CDR_ENFC_SEL		(0x3 &lt;&lt; 16)</div><div class='del'>-#define BP_CS2CDR_ENFC_PRED		18</div><div class='del'>-#define BM_CS2CDR_ENFC_PRED		(0x7 &lt;&lt; 18)</div><div class='del'>-#define BP_CS2CDR_ENFC_PODF		21</div><div class='del'>-#define BM_CS2CDR_ENFC_PODF		(0x3f &lt;&lt; 21)</div><div class='del'>-</div><div class='del'>-#define BP_CDCDR_ASRC_SERIAL_SEL	7</div><div class='del'>-#define BM_CDCDR_ASRC_SERIAL_SEL	(0x3 &lt;&lt; 7)</div><div class='del'>-#define BP_CDCDR_ASRC_SERIAL_PODF	9</div><div class='del'>-#define BM_CDCDR_ASRC_SERIAL_PODF	(0x7 &lt;&lt; 9)</div><div class='del'>-#define BP_CDCDR_ASRC_SERIAL_PRED	12</div><div class='del'>-#define BM_CDCDR_ASRC_SERIAL_PRED	(0x7 &lt;&lt; 12)</div><div class='del'>-#define BP_CDCDR_SPDIF_SEL		20</div><div class='del'>-#define BM_CDCDR_SPDIF_SEL		(0x3 &lt;&lt; 20)</div><div class='del'>-#define BP_CDCDR_SPDIF_PODF		22</div><div class='del'>-#define BM_CDCDR_SPDIF_PODF		(0x7 &lt;&lt; 22)</div><div class='del'>-#define BP_CDCDR_SPDIF_PRED		25</div><div class='del'>-#define BM_CDCDR_SPDIF_PRED		(0x7 &lt;&lt; 25)</div><div class='del'>-#define BP_CDCDR_HSI_TX_PODF		29</div><div class='del'>-#define BM_CDCDR_HSI_TX_PODF		(0x7 &lt;&lt; 29)</div><div class='del'>-#define BP_CDCDR_HSI_TX_SEL		28</div><div class='del'>-#define BM_CDCDR_HSI_TX_SEL		(0x1 &lt;&lt; 28)</div><div class='del'>-</div><div class='del'>-#define BP_CHSCCDR_IPU1_DI0_SEL		0</div><div class='del'>-#define BM_CHSCCDR_IPU1_DI0_SEL		(0x7 &lt;&lt; 0)</div><div class='del'>-#define BP_CHSCCDR_IPU1_DI0_PRE_PODF	3</div><div class='del'>-#define BM_CHSCCDR_IPU1_DI0_PRE_PODF	(0x7 &lt;&lt; 3)</div><div class='del'>-#define BP_CHSCCDR_IPU1_DI0_PRE_SEL	6</div><div class='del'>-#define BM_CHSCCDR_IPU1_DI0_PRE_SEL	(0x7 &lt;&lt; 6)</div><div class='del'>-#define BP_CHSCCDR_IPU1_DI1_SEL		9</div><div class='del'>-#define BM_CHSCCDR_IPU1_DI1_SEL		(0x7 &lt;&lt; 9)</div><div class='del'>-#define BP_CHSCCDR_IPU1_DI1_PRE_PODF	12</div><div class='del'>-#define BM_CHSCCDR_IPU1_DI1_PRE_PODF	(0x7 &lt;&lt; 12)</div><div class='del'>-#define BP_CHSCCDR_IPU1_DI1_PRE_SEL	15</div><div class='del'>-#define BM_CHSCCDR_IPU1_DI1_PRE_SEL	(0x7 &lt;&lt; 15)</div><div class='del'>-</div><div class='del'>-#define BP_CSCDR2_IPU2_DI0_SEL		0</div><div class='del'>-#define BM_CSCDR2_IPU2_DI0_SEL		(0x7)</div><div class='del'>-#define BP_CSCDR2_IPU2_DI0_PRE_PODF	3</div><div class='del'>-#define BM_CSCDR2_IPU2_DI0_PRE_PODF	(0x7 &lt;&lt; 3)</div><div class='del'>-#define BP_CSCDR2_IPU2_DI0_PRE_SEL	6</div><div class='del'>-#define BM_CSCDR2_IPU2_DI0_PRE_SEL	(0x7 &lt;&lt; 6)</div><div class='del'>-#define BP_CSCDR2_IPU2_DI1_SEL		9</div><div class='del'>-#define BM_CSCDR2_IPU2_DI1_SEL		(0x7 &lt;&lt; 9)</div><div class='del'>-#define BP_CSCDR2_IPU2_DI1_PRE_PODF	12</div><div class='del'>-#define BM_CSCDR2_IPU2_DI1_PRE_PODF	(0x7 &lt;&lt; 12)</div><div class='del'>-#define BP_CSCDR2_IPU2_DI1_PRE_SEL	15</div><div class='del'>-#define BM_CSCDR2_IPU2_DI1_PRE_SEL	(0x7 &lt;&lt; 15)</div><div class='del'>-#define BP_CSCDR2_ECSPI_CLK_PODF	19</div><div class='del'>-#define BM_CSCDR2_ECSPI_CLK_PODF	(0x3f &lt;&lt; 19)</div><div class='del'>-</div><div class='del'>-#define BP_CSCDR3_IPU1_HSP_SEL		9</div><div class='del'>-#define BM_CSCDR3_IPU1_HSP_SEL		(0x3 &lt;&lt; 9)</div><div class='del'>-#define BP_CSCDR3_IPU1_HSP_PODF		11</div><div class='del'>-#define BM_CSCDR3_IPU1_HSP_PODF		(0x7 &lt;&lt; 11)</div><div class='del'>-#define BP_CSCDR3_IPU2_HSP_SEL		14</div><div class='del'>-#define BM_CSCDR3_IPU2_HSP_SEL		(0x3 &lt;&lt; 14)</div><div class='del'>-#define BP_CSCDR3_IPU2_HSP_PODF		16</div><div class='del'>-#define BM_CSCDR3_IPU2_HSP_PODF		(0x7 &lt;&lt; 16)</div><div class='del'>-</div><div class='del'>-#define BM_CDHIPR_AXI_PODF_BUSY		(0x1 &lt;&lt; 0)</div><div class='del'>-#define BM_CDHIPR_AHB_PODF_BUSY		(0x1 &lt;&lt; 1)</div><div class='del'>-#define BM_CDHIPR_MMDC_CH1_PODF_BUSY	(0x1 &lt;&lt; 2)</div><div class='del'>-#define BM_CDHIPR_PERIPH2_SEL_BUSY	(0x1 &lt;&lt; 3)</div><div class='del'>-#define BM_CDHIPR_MMDC_CH0_PODF_BUSY	(0x1 &lt;&lt; 4)</div><div class='del'>-#define BM_CDHIPR_PERIPH_SEL_BUSY	(0x1 &lt;&lt; 5)</div><div class='del'>-#define BM_CDHIPR_ARM_PODF_BUSY		(0x1 &lt;&lt; 16)</div><div class='del'>-</div><div class='del'>-#define BP_CLPCR_LPM			0</div><div class='del'>-#define BM_CLPCR_LPM			(0x3 &lt;&lt; 0)</div><div class='del'>-#define BM_CLPCR_BYPASS_PMIC_READY	(0x1 &lt;&lt; 2)</div><div class='del'>-#define BM_CLPCR_ARM_CLK_DIS_ON_LPM	(0x1 &lt;&lt; 5)</div><div class='del'>-#define BM_CLPCR_SBYOS			(0x1 &lt;&lt; 6)</div><div class='del'>-#define BM_CLPCR_DIS_REF_OSC		(0x1 &lt;&lt; 7)</div><div class='del'>-#define BM_CLPCR_VSTBY			(0x1 &lt;&lt; 8)</div><div class='del'>-#define BP_CLPCR_STBY_COUNT		9</div><div class='del'>-#define BM_CLPCR_STBY_COUNT		(0x3 &lt;&lt; 9)</div><div class='del'>-#define BM_CLPCR_COSC_PWRDOWN		(0x1 &lt;&lt; 11)</div><div class='del'>-#define BM_CLPCR_WB_PER_AT_LPM		(0x1 &lt;&lt; 16)</div><div class='del'>-#define BM_CLPCR_WB_CORE_AT_LPM		(0x1 &lt;&lt; 17)</div><div class='del'>-#define BM_CLPCR_BYP_MMDC_CH0_LPM_HS	(0x1 &lt;&lt; 19)</div><div class='del'>-#define BM_CLPCR_BYP_MMDC_CH1_LPM_HS	(0x1 &lt;&lt; 21)</div><div class='del'>-#define BM_CLPCR_MASK_CORE0_WFI		(0x1 &lt;&lt; 22)</div><div class='del'>-#define BM_CLPCR_MASK_CORE1_WFI		(0x1 &lt;&lt; 23)</div><div class='del'>-#define BM_CLPCR_MASK_CORE2_WFI		(0x1 &lt;&lt; 24)</div><div class='del'>-#define BM_CLPCR_MASK_CORE3_WFI		(0x1 &lt;&lt; 25)</div><div class='del'>-#define BM_CLPCR_MASK_SCU_IDLE		(0x1 &lt;&lt; 26)</div><div class='del'>-#define BM_CLPCR_MASK_L2CC_IDLE		(0x1 &lt;&lt; 27)</div><div class='del'>-</div><div class='del'>-#define BP_CCOSR_CKO1_EN		7</div><div class='del'>-#define BP_CCOSR_CKO1_PODF		4</div><div class='del'>-#define BM_CCOSR_CKO1_PODF		(0x7 &lt;&lt; 4)</div><div class='del'>-#define BP_CCOSR_CKO1_SEL		0</div><div class='del'>-#define BM_CCOSR_CKO1_SEL		(0xf &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define FREQ_480M	480000000</div><div class='del'>-#define FREQ_528M	528000000</div><div class='del'>-#define FREQ_594M	594000000</div><div class='del'>-#define FREQ_650M	650000000</div><div class='del'>-#define FREQ_1300M	1300000000</div><div class='del'>-</div><div class='del'>-static struct clk pll1_sys;</div><div class='del'>-static struct clk pll2_bus;</div><div class='del'>-static struct clk pll3_usb_otg;</div><div class='del'>-static struct clk pll4_audio;</div><div class='del'>-static struct clk pll5_video;</div><div class='del'>-static struct clk pll6_mlb;</div><div class='del'>-static struct clk pll7_usb_host;</div><div class='del'>-static struct clk pll8_enet;</div><div class='del'>-static struct clk apbh_dma_clk;</div><div class='del'>-static struct clk arm_clk;</div><div class='del'>-static struct clk ipg_clk;</div><div class='del'>-static struct clk ahb_clk;</div><div class='del'>-static struct clk axi_clk;</div><div class='del'>-static struct clk mmdc_ch0_axi_clk;</div><div class='del'>-static struct clk mmdc_ch1_axi_clk;</div><div class='del'>-static struct clk periph_clk;</div><div class='del'>-static struct clk periph_pre_clk;</div><div class='del'>-static struct clk periph_clk2_clk;</div><div class='del'>-static struct clk periph2_clk;</div><div class='del'>-static struct clk periph2_pre_clk;</div><div class='del'>-static struct clk periph2_clk2_clk;</div><div class='del'>-static struct clk gpu2d_core_clk;</div><div class='del'>-static struct clk gpu3d_core_clk;</div><div class='del'>-static struct clk gpu3d_shader_clk;</div><div class='del'>-static struct clk ipg_perclk;</div><div class='del'>-static struct clk emi_clk;</div><div class='del'>-static struct clk emi_slow_clk;</div><div class='del'>-static struct clk can1_clk;</div><div class='del'>-static struct clk uart_clk;</div><div class='del'>-static struct clk usdhc1_clk;</div><div class='del'>-static struct clk usdhc2_clk;</div><div class='del'>-static struct clk usdhc3_clk;</div><div class='del'>-static struct clk usdhc4_clk;</div><div class='del'>-static struct clk vpu_clk;</div><div class='del'>-static struct clk hsi_tx_clk;</div><div class='del'>-static struct clk ipu1_di0_pre_clk;</div><div class='del'>-static struct clk ipu1_di1_pre_clk;</div><div class='del'>-static struct clk ipu2_di0_pre_clk;</div><div class='del'>-static struct clk ipu2_di1_pre_clk;</div><div class='del'>-static struct clk ipu1_clk;</div><div class='del'>-static struct clk ipu2_clk;</div><div class='del'>-static struct clk ssi1_clk;</div><div class='del'>-static struct clk ssi3_clk;</div><div class='del'>-static struct clk esai_clk;</div><div class='del'>-static struct clk ssi2_clk;</div><div class='del'>-static struct clk spdif_clk;</div><div class='del'>-static struct clk asrc_serial_clk;</div><div class='del'>-static struct clk gpu2d_axi_clk;</div><div class='del'>-static struct clk gpu3d_axi_clk;</div><div class='del'>-static struct clk pcie_clk;</div><div class='del'>-static struct clk vdo_axi_clk;</div><div class='del'>-static struct clk ldb_di0_clk;</div><div class='del'>-static struct clk ldb_di1_clk;</div><div class='del'>-static struct clk ipu1_di0_clk;</div><div class='del'>-static struct clk ipu1_di1_clk;</div><div class='del'>-static struct clk ipu2_di0_clk;</div><div class='del'>-static struct clk ipu2_di1_clk;</div><div class='del'>-static struct clk enfc_clk;</div><div class='del'>-static struct clk cko1_clk;</div><div class='del'>-static struct clk dummy_clk = {};</div><div class='del'>-</div><div class='del'>-static unsigned long external_high_reference;</div><div class='del'>-static unsigned long external_low_reference;</div><div class='del'>-static unsigned long oscillator_reference;</div><div class='del'>-</div><div class='del'>-static unsigned long get_oscillator_reference_clock_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return oscillator_reference;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_high_reference_clock_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return external_high_reference;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_low_reference_clock_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return external_low_reference;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk ckil_clk = {</div><div class='del'>-	.get_rate = get_low_reference_clock_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ckih_clk = {</div><div class='del'>-	.get_rate = get_high_reference_clock_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk osc_clk = {</div><div class='del'>-	.get_rate = get_oscillator_reference_clock_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline void __iomem *pll_get_reg_addr(struct clk *pll)</div><div class='del'>-{</div><div class='del'>-	if (pll == &amp;pll1_sys)</div><div class='del'>-		return PLL1_SYS;</div><div class='del'>-	else if (pll == &amp;pll2_bus)</div><div class='del'>-		return PLL2_BUS;</div><div class='del'>-	else if (pll == &amp;pll3_usb_otg)</div><div class='del'>-		return PLL3_USB_OTG;</div><div class='del'>-	else if (pll == &amp;pll4_audio)</div><div class='del'>-		return PLL4_AUDIO;</div><div class='del'>-	else if (pll == &amp;pll5_video)</div><div class='del'>-		return PLL5_VIDEO;</div><div class='del'>-	else if (pll == &amp;pll6_mlb)</div><div class='del'>-		return PLL6_MLB;</div><div class='del'>-	else if (pll == &amp;pll7_usb_host)</div><div class='del'>-		return PLL7_USB_HOST;</div><div class='del'>-	else if (pll == &amp;pll8_enet)</div><div class='del'>-		return PLL8_ENET;</div><div class='del'>-	else</div><div class='del'>-		BUG();</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pll_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	int timeout = 0x100000;</div><div class='del'>-	void __iomem *reg;</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	reg = pll_get_reg_addr(clk);</div><div class='del'>-	val = readl_relaxed(reg);</div><div class='del'>-	val &amp;= ~BM_PLL_BYPASS;</div><div class='del'>-	val &amp;= ~BM_PLL_POWER_DOWN;</div><div class='del'>-	/* 480MHz PLLs have the opposite definition for power bit */</div><div class='del'>-	if (clk == &amp;pll3_usb_otg || clk == &amp;pll7_usb_host)</div><div class='del'>-		val |= BM_PLL_POWER_DOWN;</div><div class='del'>-	writel_relaxed(val, reg);</div><div class='del'>-</div><div class='del'>-	/* Wait for PLL to lock */</div><div class='del'>-	while (!(readl_relaxed(reg) &amp; BM_PLL_LOCK) &amp;&amp; --timeout)</div><div class='del'>-		cpu_relax();</div><div class='del'>-</div><div class='del'>-	if (unlikely(!timeout))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	/* Enable the PLL output now */</div><div class='del'>-	val = readl_relaxed(reg);</div><div class='del'>-	val |= BM_PLL_ENABLE;</div><div class='del'>-	writel_relaxed(val, reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pll_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	void __iomem *reg;</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	reg = pll_get_reg_addr(clk);</div><div class='del'>-	val = readl_relaxed(reg);</div><div class='del'>-	val &amp;= ~BM_PLL_ENABLE;</div><div class='del'>-	val |= BM_PLL_BYPASS;</div><div class='del'>-	val |= BM_PLL_POWER_DOWN;</div><div class='del'>-	if (clk == &amp;pll3_usb_otg || clk == &amp;pll7_usb_host)</div><div class='del'>-		val &amp;= ~BM_PLL_POWER_DOWN;</div><div class='del'>-	writel_relaxed(val, reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long pll1_sys_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 div = (readl_relaxed(PLL1_SYS) &amp; BM_PLL_SYS_DIV_SELECT) &gt;&gt;</div><div class='del'>-		  BP_PLL_SYS_DIV_SELECT;</div><div class='del'>-</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) * div / 2;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pll1_sys_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 val, div;</div><div class='del'>-</div><div class='del'>-	if (rate &lt; FREQ_650M || rate &gt; FREQ_1300M)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div = rate * 2 / clk_get_rate(clk-&gt;parent);</div><div class='del'>-	val = readl_relaxed(PLL1_SYS);</div><div class='del'>-	val &amp;= ~BM_PLL_SYS_DIV_SELECT;</div><div class='del'>-	val |= div &lt;&lt; BP_PLL_SYS_DIV_SELECT;</div><div class='del'>-	writel_relaxed(val, PLL1_SYS);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long pll8_enet_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 div = (readl_relaxed(PLL8_ENET) &amp; BM_PLL_ENET_DIV_SELECT) &gt;&gt;</div><div class='del'>-		  BP_PLL_ENET_DIV_SELECT;</div><div class='del'>-</div><div class='del'>-	switch (div) {</div><div class='del'>-	case 0:</div><div class='del'>-		return 25000000;</div><div class='del'>-	case 1:</div><div class='del'>-		return 50000000;</div><div class='del'>-	case 2:</div><div class='del'>-		return 100000000;</div><div class='del'>-	case 3:</div><div class='del'>-		return 125000000;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pll8_enet_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 val, div;</div><div class='del'>-</div><div class='del'>-	switch (rate) {</div><div class='del'>-	case 25000000:</div><div class='del'>-		div = 0;</div><div class='del'>-		break;</div><div class='del'>-	case 50000000:</div><div class='del'>-		div = 1;</div><div class='del'>-		break;</div><div class='del'>-	case 100000000:</div><div class='del'>-		div = 2;</div><div class='del'>-		break;</div><div class='del'>-	case 125000000:</div><div class='del'>-		div = 3;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	val = readl_relaxed(PLL8_ENET);</div><div class='del'>-	val &amp;= ~BM_PLL_ENET_DIV_SELECT;</div><div class='del'>-	val |= div &lt;&lt; BP_PLL_ENET_DIV_SELECT;</div><div class='del'>-	writel_relaxed(val, PLL8_ENET);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long pll_av_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	void __iomem *reg = (clk == &amp;pll4_audio) ? PLL4_AUDIO : PLL5_VIDEO;</div><div class='del'>-	unsigned long parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	u32 mfn = readl_relaxed(reg + PLL_NUM_OFFSET);</div><div class='del'>-	u32 mfd = readl_relaxed(reg + PLL_DENOM_OFFSET);</div><div class='del'>-	u32 div = (readl_relaxed(reg) &amp; BM_PLL_AV_DIV_SELECT) &gt;&gt;</div><div class='del'>-		  BP_PLL_AV_DIV_SELECT;</div><div class='del'>-</div><div class='del'>-	return (parent_rate * div) + ((parent_rate / mfd) * mfn);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pll_av_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	void __iomem *reg = (clk == &amp;pll4_audio) ? PLL4_AUDIO : PLL5_VIDEO;</div><div class='del'>-	unsigned int parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	u32 val, div;</div><div class='del'>-	u32 mfn, mfd = 1000000;</div><div class='del'>-	s64 temp64;</div><div class='del'>-</div><div class='del'>-	if (rate &lt; FREQ_650M || rate &gt; FREQ_1300M)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div = rate / parent_rate;</div><div class='del'>-	temp64 = (u64) (rate - div * parent_rate);</div><div class='del'>-	temp64 *= mfd;</div><div class='del'>-	do_div(temp64, parent_rate);</div><div class='del'>-	mfn = temp64;</div><div class='del'>-</div><div class='del'>-	val = readl_relaxed(reg);</div><div class='del'>-	val &amp;= ~BM_PLL_AV_DIV_SELECT;</div><div class='del'>-	val |= div &lt;&lt; BP_PLL_AV_DIV_SELECT;</div><div class='del'>-	writel_relaxed(val, reg);</div><div class='del'>-	writel_relaxed(mfn, reg + PLL_NUM_OFFSET);</div><div class='del'>-	writel_relaxed(mfd, reg + PLL_DENOM_OFFSET);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __iomem *pll_get_div_reg_bit(struct clk *clk, u32 *bp, u32 *bm)</div><div class='del'>-{</div><div class='del'>-	void __iomem *reg;</div><div class='del'>-</div><div class='del'>-	if (clk == &amp;pll2_bus) {</div><div class='del'>-		reg = PLL2_BUS;</div><div class='del'>-		*bp = BP_PLL_BUS_DIV_SELECT;</div><div class='del'>-		*bm = BM_PLL_BUS_DIV_SELECT;</div><div class='del'>-	} else if (clk == &amp;pll3_usb_otg) {</div><div class='del'>-		reg = PLL3_USB_OTG;</div><div class='del'>-		*bp = BP_PLL_USB_DIV_SELECT;</div><div class='del'>-		*bm = BM_PLL_USB_DIV_SELECT;</div><div class='del'>-	} else if (clk == &amp;pll7_usb_host) {</div><div class='del'>-		reg = PLL7_USB_HOST;</div><div class='del'>-		*bp = BP_PLL_USB_DIV_SELECT;</div><div class='del'>-		*bm = BM_PLL_USB_DIV_SELECT;</div><div class='del'>-	} else {</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return reg;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long pll_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	void __iomem *reg;</div><div class='del'>-	u32 div, bp, bm;</div><div class='del'>-</div><div class='del'>-	reg = pll_get_div_reg_bit(clk, &amp;bp, &amp;bm);</div><div class='del'>-	div = (readl_relaxed(reg) &amp; bm) &gt;&gt; bp;</div><div class='del'>-</div><div class='del'>-	return (div == 1) ? clk_get_rate(clk-&gt;parent) * 22 :</div><div class='del'>-			    clk_get_rate(clk-&gt;parent) * 20;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pll_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	void __iomem *reg;</div><div class='del'>-	u32 val, div, bp, bm;</div><div class='del'>-</div><div class='del'>-	if (rate == FREQ_528M)</div><div class='del'>-		div = 1;</div><div class='del'>-	else if (rate == FREQ_480M)</div><div class='del'>-		div = 0;</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	reg = pll_get_div_reg_bit(clk, &amp;bp, &amp;bm);</div><div class='del'>-	val = readl_relaxed(reg);</div><div class='del'>-	val &amp;= ~bm;</div><div class='del'>-	val |= div &lt;&lt; bp;</div><div class='del'>-	writel_relaxed(val, reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define pll2_bus_get_rate	pll_get_rate</div><div class='del'>-#define pll2_bus_set_rate	pll_set_rate</div><div class='del'>-#define pll3_usb_otg_get_rate	pll_get_rate</div><div class='del'>-#define pll3_usb_otg_set_rate	pll_set_rate</div><div class='del'>-#define pll7_usb_host_get_rate	pll_get_rate</div><div class='del'>-#define pll7_usb_host_set_rate	pll_set_rate</div><div class='del'>-#define pll4_audio_get_rate	pll_av_get_rate</div><div class='del'>-#define pll4_audio_set_rate	pll_av_set_rate</div><div class='del'>-#define pll5_video_get_rate	pll_av_get_rate</div><div class='del'>-#define pll5_video_set_rate	pll_av_set_rate</div><div class='del'>-#define pll6_mlb_get_rate	NULL</div><div class='del'>-#define pll6_mlb_set_rate	NULL</div><div class='del'>-</div><div class='del'>-#define DEF_PLL(name)					\</div><div class='del'>-	static struct clk name = {			\</div><div class='del'>-		.enable		= pll_enable,		\</div><div class='del'>-		.disable	= pll_disable,		\</div><div class='del'>-		.get_rate	= name##_get_rate,	\</div><div class='del'>-		.set_rate	= name##_set_rate,	\</div><div class='del'>-		.parent		= &amp;osc_clk,		\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEF_PLL(pll1_sys);</div><div class='del'>-DEF_PLL(pll2_bus);</div><div class='del'>-DEF_PLL(pll3_usb_otg);</div><div class='del'>-DEF_PLL(pll4_audio);</div><div class='del'>-DEF_PLL(pll5_video);</div><div class='del'>-DEF_PLL(pll6_mlb);</div><div class='del'>-DEF_PLL(pll7_usb_host);</div><div class='del'>-DEF_PLL(pll8_enet);</div><div class='del'>-</div><div class='del'>-static unsigned long pfd_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u64 tmp = (u64) clk_get_rate(clk-&gt;parent) * 18;</div><div class='del'>-	u32 frac, bp_frac;</div><div class='del'>-</div><div class='del'>-	if (apbh_dma_clk.usecount == 0)</div><div class='del'>-		apbh_dma_clk.enable(&amp;apbh_dma_clk);</div><div class='del'>-</div><div class='del'>-	bp_frac = clk-&gt;enable_shift - 7;</div><div class='del'>-	frac = readl_relaxed(clk-&gt;enable_reg) &gt;&gt; bp_frac &amp; PFD_FRAC_MASK;</div><div class='del'>-	do_div(tmp, frac);</div><div class='del'>-</div><div class='del'>-	return tmp;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pfd_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 val, frac, bp_frac;</div><div class='del'>-	u64 tmp = (u64) clk_get_rate(clk-&gt;parent) * 18;</div><div class='del'>-</div><div class='del'>-	if (apbh_dma_clk.usecount == 0)</div><div class='del'>-		apbh_dma_clk.enable(&amp;apbh_dma_clk);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Round up the divider so that we don't set a rate</div><div class='del'>-	 * higher than what is requested</div><div class='del'>-	 */</div><div class='del'>-	tmp += rate / 2;</div><div class='del'>-	do_div(tmp, rate);</div><div class='del'>-	frac = tmp;</div><div class='del'>-	frac = (frac &lt; 12) ? 12 : frac;</div><div class='del'>-	frac = (frac &gt; 35) ? 35 : frac;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The frac field always starts from 7 bits lower</div><div class='del'>-	 * position of enable bit</div><div class='del'>-	 */</div><div class='del'>-	bp_frac = clk-&gt;enable_shift - 7;</div><div class='del'>-	val = readl_relaxed(clk-&gt;enable_reg);</div><div class='del'>-	val &amp;= ~(PFD_FRAC_MASK &lt;&lt; bp_frac);</div><div class='del'>-	val |= frac &lt;&lt; bp_frac;</div><div class='del'>-	writel_relaxed(val, clk-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	tmp = (u64) clk_get_rate(clk-&gt;parent) * 18;</div><div class='del'>-	do_div(tmp, frac);</div><div class='del'>-</div><div class='del'>-	if (apbh_dma_clk.usecount == 0)</div><div class='del'>-		apbh_dma_clk.disable(&amp;apbh_dma_clk);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long pfd_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 frac;</div><div class='del'>-	u64 tmp;</div><div class='del'>-</div><div class='del'>-	tmp = (u64) clk_get_rate(clk-&gt;parent) * 18;</div><div class='del'>-	tmp += rate / 2;</div><div class='del'>-	do_div(tmp, rate);</div><div class='del'>-	frac = tmp;</div><div class='del'>-	frac = (frac &lt; 12) ? 12 : frac;</div><div class='del'>-	frac = (frac &gt; 35) ? 35 : frac;</div><div class='del'>-	tmp = (u64) clk_get_rate(clk-&gt;parent) * 18;</div><div class='del'>-	do_div(tmp, frac);</div><div class='del'>-</div><div class='del'>-	return tmp;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pfd_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	if (apbh_dma_clk.usecount == 0)</div><div class='del'>-		apbh_dma_clk.enable(&amp;apbh_dma_clk);</div><div class='del'>-</div><div class='del'>-	val = readl_relaxed(clk-&gt;enable_reg);</div><div class='del'>-	val &amp;= ~(1 &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-	writel_relaxed(val, clk-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	if (apbh_dma_clk.usecount == 0)</div><div class='del'>-		apbh_dma_clk.disable(&amp;apbh_dma_clk);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pfd_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	if (apbh_dma_clk.usecount == 0)</div><div class='del'>-		apbh_dma_clk.enable(&amp;apbh_dma_clk);</div><div class='del'>-</div><div class='del'>-	val = readl_relaxed(clk-&gt;enable_reg);</div><div class='del'>-	val |= 1 &lt;&lt; clk-&gt;enable_shift;</div><div class='del'>-	writel_relaxed(val, clk-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	if (apbh_dma_clk.usecount == 0)</div><div class='del'>-		apbh_dma_clk.disable(&amp;apbh_dma_clk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define DEF_PFD(name, er, es, p)			\</div><div class='del'>-	static struct clk name = {			\</div><div class='del'>-		.enable_reg	= er,			\</div><div class='del'>-		.enable_shift	= es,			\</div><div class='del'>-		.enable		= pfd_enable,		\</div><div class='del'>-		.disable	= pfd_disable,		\</div><div class='del'>-		.get_rate	= pfd_get_rate,		\</div><div class='del'>-		.set_rate	= pfd_set_rate,		\</div><div class='del'>-		.round_rate	= pfd_round_rate,	\</div><div class='del'>-		.parent		= p,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEF_PFD(pll2_pfd_352m, PFD_528, PFD0, &amp;pll2_bus);</div><div class='del'>-DEF_PFD(pll2_pfd_594m, PFD_528, PFD1, &amp;pll2_bus);</div><div class='del'>-DEF_PFD(pll2_pfd_400m, PFD_528, PFD2, &amp;pll2_bus);</div><div class='del'>-DEF_PFD(pll3_pfd_720m, PFD_480, PFD0, &amp;pll3_usb_otg);</div><div class='del'>-DEF_PFD(pll3_pfd_540m, PFD_480, PFD1, &amp;pll3_usb_otg);</div><div class='del'>-DEF_PFD(pll3_pfd_508m, PFD_480, PFD2, &amp;pll3_usb_otg);</div><div class='del'>-DEF_PFD(pll3_pfd_454m, PFD_480, PFD3, &amp;pll3_usb_otg);</div><div class='del'>-</div><div class='del'>-static unsigned long twd_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / 2;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk twd_clk = {</div><div class='del'>-	.parent = &amp;arm_clk,</div><div class='del'>-	.get_rate = twd_clk_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long pll2_200m_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / 2;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk pll2_200m = {</div><div class='del'>-	.parent = &amp;pll2_pfd_400m,</div><div class='del'>-	.get_rate = pll2_200m_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long pll3_120m_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / 4;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk pll3_120m = {</div><div class='del'>-	.parent = &amp;pll3_usb_otg,</div><div class='del'>-	.get_rate = pll3_120m_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long pll3_80m_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / 6;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk pll3_80m = {</div><div class='del'>-	.parent = &amp;pll3_usb_otg,</div><div class='del'>-	.get_rate = pll3_80m_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long pll3_60m_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / 8;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk pll3_60m = {</div><div class='del'>-	.parent = &amp;pll3_usb_otg,</div><div class='del'>-	.get_rate = pll3_60m_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int pll1_sw_clk_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 val = readl_relaxed(CCSR);</div><div class='del'>-</div><div class='del'>-	if (parent == &amp;pll1_sys) {</div><div class='del'>-		val &amp;= ~BM_CCSR_PLL1_SW_SEL;</div><div class='del'>-		val &amp;= ~BM_CCSR_STEP_SEL;</div><div class='del'>-	} else if (parent == &amp;osc_clk) {</div><div class='del'>-		val |= BM_CCSR_PLL1_SW_SEL;</div><div class='del'>-		val &amp;= ~BM_CCSR_STEP_SEL;</div><div class='del'>-	} else if (parent == &amp;pll2_pfd_400m) {</div><div class='del'>-		val |= BM_CCSR_PLL1_SW_SEL;</div><div class='del'>-		val |= BM_CCSR_STEP_SEL;</div><div class='del'>-	} else {</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	writel_relaxed(val, CCSR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk pll1_sw_clk = {</div><div class='del'>-	.parent = &amp;pll1_sys,</div><div class='del'>-	.set_parent = pll1_sw_clk_set_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void calc_pred_podf_dividers(u32 div, u32 *pred, u32 *podf)</div><div class='del'>-{</div><div class='del'>-	u32 min_pred, temp_pred, old_err, err;</div><div class='del'>-</div><div class='del'>-	if (div &gt;= 512) {</div><div class='del'>-		*pred = 8;</div><div class='del'>-		*podf = 64;</div><div class='del'>-	} else if (div &gt;= 8) {</div><div class='del'>-		min_pred = (div - 1) / 64 + 1;</div><div class='del'>-		old_err = 8;</div><div class='del'>-		for (temp_pred = 8; temp_pred &gt;= min_pred; temp_pred--) {</div><div class='del'>-			err = div % temp_pred;</div><div class='del'>-			if (err == 0) {</div><div class='del'>-				*pred = temp_pred;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			err = temp_pred - err;</div><div class='del'>-			if (err &lt; old_err) {</div><div class='del'>-				old_err = err;</div><div class='del'>-				*pred = temp_pred;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		*podf = (div + *pred - 1) / *pred;</div><div class='del'>-	} else if (div &lt; 8) {</div><div class='del'>-		*pred = div;</div><div class='del'>-		*podf = 1;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	reg = readl_relaxed(clk-&gt;enable_reg);</div><div class='del'>-	reg |= 0x3 &lt;&lt; clk-&gt;enable_shift;</div><div class='del'>-	writel_relaxed(reg, clk-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	reg = readl_relaxed(clk-&gt;enable_reg);</div><div class='del'>-	reg &amp;= ~(0x3 &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-	writel_relaxed(reg, clk-&gt;enable_reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_enable_1b(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	reg = readl_relaxed(clk-&gt;enable_reg);</div><div class='del'>-	reg |= 0x1 &lt;&lt; clk-&gt;enable_shift;</div><div class='del'>-	writel_relaxed(reg, clk-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _clk_disable_1b(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	reg = readl_relaxed(clk-&gt;enable_reg);</div><div class='del'>-	reg &amp;= ~(0x1 &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-	writel_relaxed(reg, clk-&gt;enable_reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct divider {</div><div class='del'>-	struct clk *clk;</div><div class='del'>-	void __iomem *reg;</div><div class='del'>-	u32 bp_pred;</div><div class='del'>-	u32 bm_pred;</div><div class='del'>-	u32 bp_podf;</div><div class='del'>-	u32 bm_podf;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define DEF_CLK_DIV1(d, c, r, b)				\</div><div class='del'>-	static struct divider d = {				\</div><div class='del'>-		.clk = c,					\</div><div class='del'>-		.reg = r,					\</div><div class='del'>-		.bp_podf = BP_##r##_##b##_PODF,			\</div><div class='del'>-		.bm_podf = BM_##r##_##b##_PODF,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEF_CLK_DIV1(arm_div,		&amp;arm_clk,		CACRR,	ARM);</div><div class='del'>-DEF_CLK_DIV1(ipg_div,		&amp;ipg_clk,		CBCDR,	IPG);</div><div class='del'>-DEF_CLK_DIV1(ahb_div,		&amp;ahb_clk,		CBCDR,	AHB);</div><div class='del'>-DEF_CLK_DIV1(axi_div,		&amp;axi_clk,		CBCDR,	AXI);</div><div class='del'>-DEF_CLK_DIV1(mmdc_ch0_axi_div,	&amp;mmdc_ch0_axi_clk,	CBCDR,	MMDC_CH0_AXI);</div><div class='del'>-DEF_CLK_DIV1(mmdc_ch1_axi_div,	&amp;mmdc_ch1_axi_clk,	CBCDR,	MMDC_CH1_AXI);</div><div class='del'>-DEF_CLK_DIV1(periph_clk2_div,	&amp;periph_clk2_clk,	CBCDR,	PERIPH_CLK2);</div><div class='del'>-DEF_CLK_DIV1(periph2_clk2_div,	&amp;periph2_clk2_clk,	CBCDR,	PERIPH2_CLK2);</div><div class='del'>-DEF_CLK_DIV1(gpu2d_core_div,	&amp;gpu2d_core_clk,	CBCMR,	GPU2D_CORE);</div><div class='del'>-DEF_CLK_DIV1(gpu3d_core_div,	&amp;gpu3d_core_clk,	CBCMR,	GPU3D_CORE);</div><div class='del'>-DEF_CLK_DIV1(gpu3d_shader_div,	&amp;gpu3d_shader_clk,	CBCMR,	GPU3D_SHADER);</div><div class='del'>-DEF_CLK_DIV1(ipg_perclk_div,	&amp;ipg_perclk,		CSCMR1,	PERCLK);</div><div class='del'>-DEF_CLK_DIV1(emi_div,		&amp;emi_clk,		CSCMR1,	EMI);</div><div class='del'>-DEF_CLK_DIV1(emi_slow_div,	&amp;emi_slow_clk,		CSCMR1,	EMI_SLOW);</div><div class='del'>-DEF_CLK_DIV1(can_div,		&amp;can1_clk,		CSCMR2,	CAN);</div><div class='del'>-DEF_CLK_DIV1(uart_div,		&amp;uart_clk,		CSCDR1,	UART);</div><div class='del'>-DEF_CLK_DIV1(usdhc1_div,	&amp;usdhc1_clk,		CSCDR1,	USDHC1);</div><div class='del'>-DEF_CLK_DIV1(usdhc2_div,	&amp;usdhc2_clk,		CSCDR1,	USDHC2);</div><div class='del'>-DEF_CLK_DIV1(usdhc3_div,	&amp;usdhc3_clk,		CSCDR1,	USDHC3);</div><div class='del'>-DEF_CLK_DIV1(usdhc4_div,	&amp;usdhc4_clk,		CSCDR1,	USDHC4);</div><div class='del'>-DEF_CLK_DIV1(vpu_div,		&amp;vpu_clk,		CSCDR1,	VPU_AXI);</div><div class='del'>-DEF_CLK_DIV1(hsi_tx_div,	&amp;hsi_tx_clk,		CDCDR,	HSI_TX);</div><div class='del'>-DEF_CLK_DIV1(ipu1_di0_pre_div,	&amp;ipu1_di0_pre_clk,	CHSCCDR, IPU1_DI0_PRE);</div><div class='del'>-DEF_CLK_DIV1(ipu1_di1_pre_div,	&amp;ipu1_di1_pre_clk,	CHSCCDR, IPU1_DI1_PRE);</div><div class='del'>-DEF_CLK_DIV1(ipu2_di0_pre_div,	&amp;ipu2_di0_pre_clk,	CSCDR2,	IPU2_DI0_PRE);</div><div class='del'>-DEF_CLK_DIV1(ipu2_di1_pre_div,	&amp;ipu2_di1_pre_clk,	CSCDR2,	IPU2_DI1_PRE);</div><div class='del'>-DEF_CLK_DIV1(ipu1_div,		&amp;ipu1_clk,		CSCDR3,	IPU1_HSP);</div><div class='del'>-DEF_CLK_DIV1(ipu2_div,		&amp;ipu2_clk,		CSCDR3,	IPU2_HSP);</div><div class='del'>-DEF_CLK_DIV1(cko1_div,		&amp;cko1_clk,		CCOSR, CKO1);</div><div class='del'>-</div><div class='del'>-#define DEF_CLK_DIV2(d, c, r, b)				\</div><div class='del'>-	static struct divider d = {				\</div><div class='del'>-		.clk = c,					\</div><div class='del'>-		.reg = r,					\</div><div class='del'>-		.bp_pred = BP_##r##_##b##_PRED,			\</div><div class='del'>-		.bm_pred = BM_##r##_##b##_PRED,			\</div><div class='del'>-		.bp_podf = BP_##r##_##b##_PODF,			\</div><div class='del'>-		.bm_podf = BM_##r##_##b##_PODF,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEF_CLK_DIV2(ssi1_div,		&amp;ssi1_clk,		CS1CDR,	SSI1);</div><div class='del'>-DEF_CLK_DIV2(ssi3_div,		&amp;ssi3_clk,		CS1CDR,	SSI3);</div><div class='del'>-DEF_CLK_DIV2(esai_div,		&amp;esai_clk,		CS1CDR,	ESAI);</div><div class='del'>-DEF_CLK_DIV2(ssi2_div,		&amp;ssi2_clk,		CS2CDR,	SSI2);</div><div class='del'>-DEF_CLK_DIV2(enfc_div,		&amp;enfc_clk,		CS2CDR,	ENFC);</div><div class='del'>-DEF_CLK_DIV2(spdif_div,		&amp;spdif_clk,		CDCDR,	SPDIF);</div><div class='del'>-DEF_CLK_DIV2(asrc_serial_div,	&amp;asrc_serial_clk,	CDCDR,	ASRC_SERIAL);</div><div class='del'>-</div><div class='del'>-static struct divider *dividers[] = {</div><div class='del'>-	&amp;arm_div,</div><div class='del'>-	&amp;ipg_div,</div><div class='del'>-	&amp;ahb_div,</div><div class='del'>-	&amp;axi_div,</div><div class='del'>-	&amp;mmdc_ch0_axi_div,</div><div class='del'>-	&amp;mmdc_ch1_axi_div,</div><div class='del'>-	&amp;periph_clk2_div,</div><div class='del'>-	&amp;periph2_clk2_div,</div><div class='del'>-	&amp;gpu2d_core_div,</div><div class='del'>-	&amp;gpu3d_core_div,</div><div class='del'>-	&amp;gpu3d_shader_div,</div><div class='del'>-	&amp;ipg_perclk_div,</div><div class='del'>-	&amp;emi_div,</div><div class='del'>-	&amp;emi_slow_div,</div><div class='del'>-	&amp;can_div,</div><div class='del'>-	&amp;uart_div,</div><div class='del'>-	&amp;usdhc1_div,</div><div class='del'>-	&amp;usdhc2_div,</div><div class='del'>-	&amp;usdhc3_div,</div><div class='del'>-	&amp;usdhc4_div,</div><div class='del'>-	&amp;vpu_div,</div><div class='del'>-	&amp;hsi_tx_div,</div><div class='del'>-	&amp;ipu1_di0_pre_div,</div><div class='del'>-	&amp;ipu1_di1_pre_div,</div><div class='del'>-	&amp;ipu2_di0_pre_div,</div><div class='del'>-	&amp;ipu2_di1_pre_div,</div><div class='del'>-	&amp;ipu1_div,</div><div class='del'>-	&amp;ipu2_div,</div><div class='del'>-	&amp;ssi1_div,</div><div class='del'>-	&amp;ssi3_div,</div><div class='del'>-	&amp;esai_div,</div><div class='del'>-	&amp;ssi2_div,</div><div class='del'>-	&amp;enfc_div,</div><div class='del'>-	&amp;spdif_div,</div><div class='del'>-	&amp;asrc_serial_div,</div><div class='del'>-	&amp;cko1_div,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long ldb_di_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 val = readl_relaxed(CSCMR2);</div><div class='del'>-</div><div class='del'>-	val &amp;= (clk == &amp;ldb_di0_clk) ? BM_CSCMR2_LDB_DI0_IPU_DIV :</div><div class='del'>-				       BM_CSCMR2_LDB_DI1_IPU_DIV;</div><div class='del'>-	if (val)</div><div class='del'>-		return clk_get_rate(clk-&gt;parent) / 7;</div><div class='del'>-	else</div><div class='del'>-		return clk_get_rate(clk-&gt;parent) * 2 / 7;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ldb_di_clk_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned long parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	u32 val = readl_relaxed(CSCMR2);</div><div class='del'>-</div><div class='del'>-	if (rate * 7 &lt;= parent_rate + parent_rate / 20)</div><div class='del'>-		val |= BM_CSCMR2_LDB_DI0_IPU_DIV;</div><div class='del'>-	else</div><div class='del'>-		val &amp;= ~BM_CSCMR2_LDB_DI0_IPU_DIV;</div><div class='del'>-</div><div class='del'>-	writel_relaxed(val, CSCMR2);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long ldb_di_clk_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned long parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (rate * 7 &lt;= parent_rate + parent_rate / 20)</div><div class='del'>-		return parent_rate / 7;</div><div class='del'>-	else</div><div class='del'>-		return 2 * parent_rate / 7;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	struct divider *d;</div><div class='del'>-	u32 val, pred, podf;</div><div class='del'>-	int i, num;</div><div class='del'>-</div><div class='del'>-	if (clk == &amp;ldb_di0_clk || clk == &amp;ldb_di1_clk)</div><div class='del'>-		return ldb_di_clk_get_rate(clk);</div><div class='del'>-</div><div class='del'>-	num = ARRAY_SIZE(dividers);</div><div class='del'>-	for (i = 0; i &lt; num; i++)</div><div class='del'>-		if (dividers[i]-&gt;clk == clk) {</div><div class='del'>-			d = dividers[i];</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	if (i == num)</div><div class='del'>-		return clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	val = readl_relaxed(d-&gt;reg);</div><div class='del'>-	pred = ((val &amp; d-&gt;bm_pred) &gt;&gt; d-&gt;bp_pred) + 1;</div><div class='del'>-	podf = ((val &amp; d-&gt;bm_podf) &gt;&gt; d-&gt;bp_podf) + 1;</div><div class='del'>-</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / (pred * podf);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int clk_busy_wait(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	int timeout = 0x100000;</div><div class='del'>-	u32 bm;</div><div class='del'>-</div><div class='del'>-	if (clk == &amp;axi_clk)</div><div class='del'>-		bm = BM_CDHIPR_AXI_PODF_BUSY;</div><div class='del'>-	else if (clk == &amp;ahb_clk)</div><div class='del'>-		bm = BM_CDHIPR_AHB_PODF_BUSY;</div><div class='del'>-	else if (clk == &amp;mmdc_ch0_axi_clk)</div><div class='del'>-		bm = BM_CDHIPR_MMDC_CH0_PODF_BUSY;</div><div class='del'>-	else if (clk == &amp;periph_clk)</div><div class='del'>-		bm = BM_CDHIPR_PERIPH_SEL_BUSY;</div><div class='del'>-	else if (clk == &amp;arm_clk)</div><div class='del'>-		bm = BM_CDHIPR_ARM_PODF_BUSY;</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	while ((readl_relaxed(CDHIPR) &amp; bm) &amp;&amp; --timeout)</div><div class='del'>-		cpu_relax();</div><div class='del'>-</div><div class='del'>-	if (unlikely(!timeout))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned long parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	struct divider *d;</div><div class='del'>-	u32 val, div, max_div, pred = 0, podf;</div><div class='del'>-	int i, num;</div><div class='del'>-</div><div class='del'>-	if (clk == &amp;ldb_di0_clk || clk == &amp;ldb_di1_clk)</div><div class='del'>-		return ldb_di_clk_set_rate(clk, rate);</div><div class='del'>-</div><div class='del'>-	num = ARRAY_SIZE(dividers);</div><div class='del'>-	for (i = 0; i &lt; num; i++)</div><div class='del'>-		if (dividers[i]-&gt;clk == clk) {</div><div class='del'>-			d = dividers[i];</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	if (i == num)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	max_div = ((d-&gt;bm_pred &gt;&gt; d-&gt;bp_pred) + 1) *</div><div class='del'>-		  ((d-&gt;bm_podf &gt;&gt; d-&gt;bp_podf) + 1);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-	if (div == 0)</div><div class='del'>-		div++;</div><div class='del'>-</div><div class='del'>-	if ((parent_rate / div != rate) || div &gt; max_div)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (d-&gt;bm_pred) {</div><div class='del'>-		calc_pred_podf_dividers(div, &amp;pred, &amp;podf);</div><div class='del'>-	} else {</div><div class='del'>-		pred = 1;</div><div class='del'>-		podf = div;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	val = readl_relaxed(d-&gt;reg);</div><div class='del'>-	val &amp;= ~(d-&gt;bm_pred | d-&gt;bm_podf);</div><div class='del'>-	val |= (pred - 1) &lt;&lt; d-&gt;bp_pred | (podf - 1) &lt;&lt; d-&gt;bp_podf;</div><div class='del'>-	writel_relaxed(val, d-&gt;reg);</div><div class='del'>-</div><div class='del'>-	if (clk == &amp;axi_clk || clk == &amp;ahb_clk ||</div><div class='del'>-	    clk == &amp;mmdc_ch0_axi_clk || clk == &amp;arm_clk)</div><div class='del'>-		return clk_busy_wait(clk);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned long parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	u32 div = parent_rate / rate;</div><div class='del'>-	u32 div_max, pred = 0, podf;</div><div class='del'>-	struct divider *d;</div><div class='del'>-	int i, num;</div><div class='del'>-</div><div class='del'>-	if (clk == &amp;ldb_di0_clk || clk == &amp;ldb_di1_clk)</div><div class='del'>-		return ldb_di_clk_round_rate(clk, rate);</div><div class='del'>-</div><div class='del'>-	num = ARRAY_SIZE(dividers);</div><div class='del'>-	for (i = 0; i &lt; num; i++)</div><div class='del'>-		if (dividers[i]-&gt;clk == clk) {</div><div class='del'>-			d = dividers[i];</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	if (i == num)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (div == 0 || parent_rate % rate)</div><div class='del'>-		div++;</div><div class='del'>-</div><div class='del'>-	if (d-&gt;bm_pred) {</div><div class='del'>-		calc_pred_podf_dividers(div, &amp;pred, &amp;podf);</div><div class='del'>-		div = pred * podf;</div><div class='del'>-	} else {</div><div class='del'>-		div_max = (d-&gt;bm_podf &gt;&gt; d-&gt;bp_podf) + 1;</div><div class='del'>-		if (div &gt; div_max)</div><div class='del'>-			div = div_max;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct multiplexer {</div><div class='del'>-	struct clk *clk;</div><div class='del'>-	void __iomem *reg;</div><div class='del'>-	u32 bp;</div><div class='del'>-	u32 bm;</div><div class='del'>-	int pnum;</div><div class='del'>-	struct clk *parents[];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer axi_mux = {</div><div class='del'>-	.clk = &amp;axi_clk,</div><div class='del'>-	.reg = CBCDR,</div><div class='del'>-	.bp = BP_CBCDR_AXI_SEL,</div><div class='del'>-	.bm = BM_CBCDR_AXI_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;periph_clk,</div><div class='del'>-		&amp;pll2_pfd_400m,</div><div class='del'>-		&amp;pll3_pfd_540m,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer periph_mux = {</div><div class='del'>-	.clk = &amp;periph_clk,</div><div class='del'>-	.reg = CBCDR,</div><div class='del'>-	.bp = BP_CBCDR_PERIPH_CLK_SEL,</div><div class='del'>-	.bm = BM_CBCDR_PERIPH_CLK_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;periph_pre_clk,</div><div class='del'>-		&amp;periph_clk2_clk,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer periph_pre_mux = {</div><div class='del'>-	.clk = &amp;periph_pre_clk,</div><div class='del'>-	.reg = CBCMR,</div><div class='del'>-	.bp = BP_CBCMR_PRE_PERIPH_CLK_SEL,</div><div class='del'>-	.bm = BM_CBCMR_PRE_PERIPH_CLK_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;pll2_bus,</div><div class='del'>-		&amp;pll2_pfd_400m,</div><div class='del'>-		&amp;pll2_pfd_352m,</div><div class='del'>-		&amp;pll2_200m,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer periph_clk2_mux = {</div><div class='del'>-	.clk = &amp;periph_clk2_clk,</div><div class='del'>-	.reg = CBCMR,</div><div class='del'>-	.bp = BP_CBCMR_PERIPH_CLK2_SEL,</div><div class='del'>-	.bm = BM_CBCMR_PERIPH_CLK2_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;pll3_usb_otg,</div><div class='del'>-		&amp;osc_clk,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer periph2_mux = {</div><div class='del'>-	.clk = &amp;periph2_clk,</div><div class='del'>-	.reg = CBCDR,</div><div class='del'>-	.bp = BP_CBCDR_PERIPH2_CLK_SEL,</div><div class='del'>-	.bm = BM_CBCDR_PERIPH2_CLK_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;periph2_pre_clk,</div><div class='del'>-		&amp;periph2_clk2_clk,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer periph2_pre_mux = {</div><div class='del'>-	.clk = &amp;periph2_pre_clk,</div><div class='del'>-	.reg = CBCMR,</div><div class='del'>-	.bp = BP_CBCMR_PRE_PERIPH2_CLK_SEL,</div><div class='del'>-	.bm = BM_CBCMR_PRE_PERIPH2_CLK_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;pll2_bus,</div><div class='del'>-		&amp;pll2_pfd_400m,</div><div class='del'>-		&amp;pll2_pfd_352m,</div><div class='del'>-		&amp;pll2_200m,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer periph2_clk2_mux = {</div><div class='del'>-	.clk = &amp;periph2_clk2_clk,</div><div class='del'>-	.reg = CBCMR,</div><div class='del'>-	.bp = BP_CBCMR_PERIPH2_CLK2_SEL,</div><div class='del'>-	.bm = BM_CBCMR_PERIPH2_CLK2_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;pll3_usb_otg,</div><div class='del'>-		&amp;osc_clk,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer gpu2d_axi_mux = {</div><div class='del'>-	.clk = &amp;gpu2d_axi_clk,</div><div class='del'>-	.reg = CBCMR,</div><div class='del'>-	.bp = BP_CBCMR_GPU2D_AXI_SEL,</div><div class='del'>-	.bm = BM_CBCMR_GPU2D_AXI_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;axi_clk,</div><div class='del'>-		&amp;ahb_clk,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer gpu3d_axi_mux = {</div><div class='del'>-	.clk = &amp;gpu3d_axi_clk,</div><div class='del'>-	.reg = CBCMR,</div><div class='del'>-	.bp = BP_CBCMR_GPU3D_AXI_SEL,</div><div class='del'>-	.bm = BM_CBCMR_GPU3D_AXI_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;axi_clk,</div><div class='del'>-		&amp;ahb_clk,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer gpu3d_core_mux = {</div><div class='del'>-	.clk = &amp;gpu3d_core_clk,</div><div class='del'>-	.reg = CBCMR,</div><div class='del'>-	.bp = BP_CBCMR_GPU3D_CORE_SEL,</div><div class='del'>-	.bm = BM_CBCMR_GPU3D_CORE_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;mmdc_ch0_axi_clk,</div><div class='del'>-		&amp;pll3_usb_otg,</div><div class='del'>-		&amp;pll2_pfd_594m,</div><div class='del'>-		&amp;pll2_pfd_400m,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer gpu3d_shader_mux = {</div><div class='del'>-	.clk = &amp;gpu3d_shader_clk,</div><div class='del'>-	.reg = CBCMR,</div><div class='del'>-	.bp = BP_CBCMR_GPU3D_SHADER_SEL,</div><div class='del'>-	.bm = BM_CBCMR_GPU3D_SHADER_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;mmdc_ch0_axi_clk,</div><div class='del'>-		&amp;pll3_usb_otg,</div><div class='del'>-		&amp;pll2_pfd_594m,</div><div class='del'>-		&amp;pll3_pfd_720m,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer pcie_axi_mux = {</div><div class='del'>-	.clk = &amp;pcie_clk,</div><div class='del'>-	.reg = CBCMR,</div><div class='del'>-	.bp = BP_CBCMR_PCIE_AXI_SEL,</div><div class='del'>-	.bm = BM_CBCMR_PCIE_AXI_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;axi_clk,</div><div class='del'>-		&amp;ahb_clk,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer vdo_axi_mux = {</div><div class='del'>-	.clk = &amp;vdo_axi_clk,</div><div class='del'>-	.reg = CBCMR,</div><div class='del'>-	.bp = BP_CBCMR_VDO_AXI_SEL,</div><div class='del'>-	.bm = BM_CBCMR_VDO_AXI_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;axi_clk,</div><div class='del'>-		&amp;ahb_clk,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer vpu_axi_mux = {</div><div class='del'>-	.clk = &amp;vpu_clk,</div><div class='del'>-	.reg = CBCMR,</div><div class='del'>-	.bp = BP_CBCMR_VPU_AXI_SEL,</div><div class='del'>-	.bm = BM_CBCMR_VPU_AXI_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;axi_clk,</div><div class='del'>-		&amp;pll2_pfd_400m,</div><div class='del'>-		&amp;pll2_pfd_352m,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer gpu2d_core_mux = {</div><div class='del'>-	.clk = &amp;gpu2d_core_clk,</div><div class='del'>-	.reg = CBCMR,</div><div class='del'>-	.bp = BP_CBCMR_GPU2D_CORE_SEL,</div><div class='del'>-	.bm = BM_CBCMR_GPU2D_CORE_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;axi_clk,</div><div class='del'>-		&amp;pll3_usb_otg,</div><div class='del'>-		&amp;pll2_pfd_352m,</div><div class='del'>-		&amp;pll2_pfd_400m,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define DEF_SSI_MUX(id)							\</div><div class='del'>-	static struct multiplexer ssi##id##_mux = {			\</div><div class='del'>-		.clk = &amp;ssi##id##_clk,					\</div><div class='del'>-		.reg = CSCMR1,						\</div><div class='del'>-		.bp = BP_CSCMR1_SSI##id##_SEL,				\</div><div class='del'>-		.bm = BM_CSCMR1_SSI##id##_SEL,				\</div><div class='del'>-		.parents = {						\</div><div class='del'>-			&amp;pll3_pfd_508m,					\</div><div class='del'>-			&amp;pll3_pfd_454m,					\</div><div class='del'>-			&amp;pll4_audio,					\</div><div class='del'>-			NULL						\</div><div class='del'>-		},							\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEF_SSI_MUX(1);</div><div class='del'>-DEF_SSI_MUX(2);</div><div class='del'>-DEF_SSI_MUX(3);</div><div class='del'>-</div><div class='del'>-#define DEF_USDHC_MUX(id)						\</div><div class='del'>-	static struct multiplexer usdhc##id##_mux = {			\</div><div class='del'>-		.clk = &amp;usdhc##id##_clk,				\</div><div class='del'>-		.reg = CSCMR1,						\</div><div class='del'>-		.bp = BP_CSCMR1_USDHC##id##_SEL,			\</div><div class='del'>-		.bm = BM_CSCMR1_USDHC##id##_SEL,			\</div><div class='del'>-		.parents = {						\</div><div class='del'>-			&amp;pll2_pfd_400m,					\</div><div class='del'>-			&amp;pll2_pfd_352m,					\</div><div class='del'>-			NULL						\</div><div class='del'>-		},							\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEF_USDHC_MUX(1);</div><div class='del'>-DEF_USDHC_MUX(2);</div><div class='del'>-DEF_USDHC_MUX(3);</div><div class='del'>-DEF_USDHC_MUX(4);</div><div class='del'>-</div><div class='del'>-static struct multiplexer emi_mux = {</div><div class='del'>-	.clk = &amp;emi_clk,</div><div class='del'>-	.reg = CSCMR1,</div><div class='del'>-	.bp = BP_CSCMR1_EMI_SEL,</div><div class='del'>-	.bm = BM_CSCMR1_EMI_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;axi_clk,</div><div class='del'>-		&amp;pll3_usb_otg,</div><div class='del'>-		&amp;pll2_pfd_400m,</div><div class='del'>-		&amp;pll2_pfd_352m,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer emi_slow_mux = {</div><div class='del'>-	.clk = &amp;emi_slow_clk,</div><div class='del'>-	.reg = CSCMR1,</div><div class='del'>-	.bp = BP_CSCMR1_EMI_SLOW_SEL,</div><div class='del'>-	.bm = BM_CSCMR1_EMI_SLOW_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;axi_clk,</div><div class='del'>-		&amp;pll3_usb_otg,</div><div class='del'>-		&amp;pll2_pfd_400m,</div><div class='del'>-		&amp;pll2_pfd_352m,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer esai_mux = {</div><div class='del'>-	.clk = &amp;esai_clk,</div><div class='del'>-	.reg = CSCMR2,</div><div class='del'>-	.bp = BP_CSCMR2_ESAI_SEL,</div><div class='del'>-	.bm = BM_CSCMR2_ESAI_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;pll4_audio,</div><div class='del'>-		&amp;pll3_pfd_508m,</div><div class='del'>-		&amp;pll3_pfd_454m,</div><div class='del'>-		&amp;pll3_usb_otg,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define DEF_LDB_DI_MUX(id)						\</div><div class='del'>-	static struct multiplexer ldb_di##id##_mux = {			\</div><div class='del'>-		.clk = &amp;ldb_di##id##_clk,				\</div><div class='del'>-		.reg = CS2CDR,						\</div><div class='del'>-		.bp = BP_CS2CDR_LDB_DI##id##_SEL,			\</div><div class='del'>-		.bm = BM_CS2CDR_LDB_DI##id##_SEL,			\</div><div class='del'>-		.parents = {						\</div><div class='del'>-			&amp;pll5_video,					\</div><div class='del'>-			&amp;pll2_pfd_352m,					\</div><div class='del'>-			&amp;pll2_pfd_400m,					\</div><div class='del'>-			&amp;pll3_pfd_540m,					\</div><div class='del'>-			&amp;pll3_usb_otg,					\</div><div class='del'>-			NULL						\</div><div class='del'>-		},							\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEF_LDB_DI_MUX(0);</div><div class='del'>-DEF_LDB_DI_MUX(1);</div><div class='del'>-</div><div class='del'>-static struct multiplexer enfc_mux = {</div><div class='del'>-	.clk = &amp;enfc_clk,</div><div class='del'>-	.reg = CS2CDR,</div><div class='del'>-	.bp = BP_CS2CDR_ENFC_SEL,</div><div class='del'>-	.bm = BM_CS2CDR_ENFC_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;pll2_pfd_352m,</div><div class='del'>-		&amp;pll2_bus,</div><div class='del'>-		&amp;pll3_usb_otg,</div><div class='del'>-		&amp;pll2_pfd_400m,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer spdif_mux = {</div><div class='del'>-	.clk = &amp;spdif_clk,</div><div class='del'>-	.reg = CDCDR,</div><div class='del'>-	.bp = BP_CDCDR_SPDIF_SEL,</div><div class='del'>-	.bm = BM_CDCDR_SPDIF_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;pll4_audio,</div><div class='del'>-		&amp;pll3_pfd_508m,</div><div class='del'>-		&amp;pll3_pfd_454m,</div><div class='del'>-		&amp;pll3_usb_otg,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer asrc_serial_mux = {</div><div class='del'>-	.clk = &amp;asrc_serial_clk,</div><div class='del'>-	.reg = CDCDR,</div><div class='del'>-	.bp = BP_CDCDR_ASRC_SERIAL_SEL,</div><div class='del'>-	.bm = BM_CDCDR_ASRC_SERIAL_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;pll4_audio,</div><div class='del'>-		&amp;pll3_pfd_508m,</div><div class='del'>-		&amp;pll3_pfd_454m,</div><div class='del'>-		&amp;pll3_usb_otg,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer hsi_tx_mux = {</div><div class='del'>-	.clk = &amp;hsi_tx_clk,</div><div class='del'>-	.reg = CDCDR,</div><div class='del'>-	.bp = BP_CDCDR_HSI_TX_SEL,</div><div class='del'>-	.bm = BM_CDCDR_HSI_TX_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;pll3_120m,</div><div class='del'>-		&amp;pll2_pfd_400m,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define DEF_IPU_DI_PRE_MUX(r, i, d)					\</div><div class='del'>-	static struct multiplexer ipu##i##_di##d##_pre_mux = {		\</div><div class='del'>-		.clk = &amp;ipu##i##_di##d##_pre_clk,			\</div><div class='del'>-		.reg = r,						\</div><div class='del'>-		.bp = BP_##r##_IPU##i##_DI##d##_PRE_SEL,		\</div><div class='del'>-		.bm = BM_##r##_IPU##i##_DI##d##_PRE_SEL,		\</div><div class='del'>-		.parents = {						\</div><div class='del'>-			&amp;mmdc_ch0_axi_clk,				\</div><div class='del'>-			&amp;pll3_usb_otg,					\</div><div class='del'>-			&amp;pll5_video,					\</div><div class='del'>-			&amp;pll2_pfd_352m,					\</div><div class='del'>-			&amp;pll2_pfd_400m,					\</div><div class='del'>-			&amp;pll3_pfd_540m,					\</div><div class='del'>-			NULL						\</div><div class='del'>-		},							\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEF_IPU_DI_PRE_MUX(CHSCCDR, 1, 0);</div><div class='del'>-DEF_IPU_DI_PRE_MUX(CHSCCDR, 1, 1);</div><div class='del'>-DEF_IPU_DI_PRE_MUX(CSCDR2, 2, 0);</div><div class='del'>-DEF_IPU_DI_PRE_MUX(CSCDR2, 2, 1);</div><div class='del'>-</div><div class='del'>-#define DEF_IPU_DI_MUX(r, i, d)						\</div><div class='del'>-	static struct multiplexer ipu##i##_di##d##_mux = {		\</div><div class='del'>-		.clk = &amp;ipu##i##_di##d##_clk,				\</div><div class='del'>-		.reg = r,						\</div><div class='del'>-		.bp = BP_##r##_IPU##i##_DI##d##_SEL,			\</div><div class='del'>-		.bm = BM_##r##_IPU##i##_DI##d##_SEL,			\</div><div class='del'>-		.parents = {						\</div><div class='del'>-			&amp;ipu##i##_di##d##_pre_clk,			\</div><div class='del'>-			&amp;dummy_clk,					\</div><div class='del'>-			&amp;dummy_clk,					\</div><div class='del'>-			&amp;ldb_di0_clk,					\</div><div class='del'>-			&amp;ldb_di1_clk,					\</div><div class='del'>-			NULL						\</div><div class='del'>-		},							\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEF_IPU_DI_MUX(CHSCCDR, 1, 0);</div><div class='del'>-DEF_IPU_DI_MUX(CHSCCDR, 1, 1);</div><div class='del'>-DEF_IPU_DI_MUX(CSCDR2, 2, 0);</div><div class='del'>-DEF_IPU_DI_MUX(CSCDR2, 2, 1);</div><div class='del'>-</div><div class='del'>-#define DEF_IPU_MUX(id)							\</div><div class='del'>-	static struct multiplexer ipu##id##_mux = {			\</div><div class='del'>-		.clk = &amp;ipu##id##_clk,					\</div><div class='del'>-		.reg = CSCDR3,						\</div><div class='del'>-		.bp = BP_CSCDR3_IPU##id##_HSP_SEL,			\</div><div class='del'>-		.bm = BM_CSCDR3_IPU##id##_HSP_SEL,			\</div><div class='del'>-		.parents = {						\</div><div class='del'>-			&amp;mmdc_ch0_axi_clk,				\</div><div class='del'>-			&amp;pll2_pfd_400m,					\</div><div class='del'>-			&amp;pll3_120m,					\</div><div class='del'>-			&amp;pll3_pfd_540m,					\</div><div class='del'>-			NULL						\</div><div class='del'>-		},							\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEF_IPU_MUX(1);</div><div class='del'>-DEF_IPU_MUX(2);</div><div class='del'>-</div><div class='del'>-static struct multiplexer cko1_mux = {</div><div class='del'>-	.clk = &amp;cko1_clk,</div><div class='del'>-	.reg = CCOSR,</div><div class='del'>-	.bp = BP_CCOSR_CKO1_SEL,</div><div class='del'>-	.bm = BM_CCOSR_CKO1_SEL,</div><div class='del'>-	.parents = {</div><div class='del'>-		&amp;pll3_usb_otg,</div><div class='del'>-		&amp;pll2_bus,</div><div class='del'>-		&amp;pll1_sys,</div><div class='del'>-		&amp;pll5_video,</div><div class='del'>-		&amp;dummy_clk,</div><div class='del'>-		&amp;axi_clk,</div><div class='del'>-		&amp;enfc_clk,</div><div class='del'>-		&amp;ipu1_di0_clk,</div><div class='del'>-		&amp;ipu1_di1_clk,</div><div class='del'>-		&amp;ipu2_di0_clk,</div><div class='del'>-		&amp;ipu2_di1_clk,</div><div class='del'>-		&amp;ahb_clk,</div><div class='del'>-		&amp;ipg_clk,</div><div class='del'>-		&amp;ipg_perclk,</div><div class='del'>-		&amp;ckil_clk,</div><div class='del'>-		&amp;pll4_audio,</div><div class='del'>-		NULL</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct multiplexer *multiplexers[] = {</div><div class='del'>-	&amp;axi_mux,</div><div class='del'>-	&amp;periph_mux,</div><div class='del'>-	&amp;periph_pre_mux,</div><div class='del'>-	&amp;periph_clk2_mux,</div><div class='del'>-	&amp;periph2_mux,</div><div class='del'>-	&amp;periph2_pre_mux,</div><div class='del'>-	&amp;periph2_clk2_mux,</div><div class='del'>-	&amp;gpu2d_axi_mux,</div><div class='del'>-	&amp;gpu3d_axi_mux,</div><div class='del'>-	&amp;gpu3d_core_mux,</div><div class='del'>-	&amp;gpu3d_shader_mux,</div><div class='del'>-	&amp;pcie_axi_mux,</div><div class='del'>-	&amp;vdo_axi_mux,</div><div class='del'>-	&amp;vpu_axi_mux,</div><div class='del'>-	&amp;gpu2d_core_mux,</div><div class='del'>-	&amp;ssi1_mux,</div><div class='del'>-	&amp;ssi2_mux,</div><div class='del'>-	&amp;ssi3_mux,</div><div class='del'>-	&amp;usdhc1_mux,</div><div class='del'>-	&amp;usdhc2_mux,</div><div class='del'>-	&amp;usdhc3_mux,</div><div class='del'>-	&amp;usdhc4_mux,</div><div class='del'>-	&amp;emi_mux,</div><div class='del'>-	&amp;emi_slow_mux,</div><div class='del'>-	&amp;esai_mux,</div><div class='del'>-	&amp;ldb_di0_mux,</div><div class='del'>-	&amp;ldb_di1_mux,</div><div class='del'>-	&amp;enfc_mux,</div><div class='del'>-	&amp;spdif_mux,</div><div class='del'>-	&amp;asrc_serial_mux,</div><div class='del'>-	&amp;hsi_tx_mux,</div><div class='del'>-	&amp;ipu1_di0_pre_mux,</div><div class='del'>-	&amp;ipu1_di0_mux,</div><div class='del'>-	&amp;ipu1_di1_pre_mux,</div><div class='del'>-	&amp;ipu1_di1_mux,</div><div class='del'>-	&amp;ipu2_di0_pre_mux,</div><div class='del'>-	&amp;ipu2_di0_mux,</div><div class='del'>-	&amp;ipu2_di1_pre_mux,</div><div class='del'>-	&amp;ipu2_di1_mux,</div><div class='del'>-	&amp;ipu1_mux,</div><div class='del'>-	&amp;ipu2_mux,</div><div class='del'>-	&amp;cko1_mux,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int _clk_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	struct multiplexer *m;</div><div class='del'>-	int i, num;</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	num = ARRAY_SIZE(multiplexers);</div><div class='del'>-	for (i = 0; i &lt; num; i++)</div><div class='del'>-		if (multiplexers[i]-&gt;clk == clk) {</div><div class='del'>-			m = multiplexers[i];</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	if (i == num)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	i = 0;</div><div class='del'>-	while (m-&gt;parents[i]) {</div><div class='del'>-		if (parent == m-&gt;parents[i])</div><div class='del'>-			break;</div><div class='del'>-		i++;</div><div class='del'>-	}</div><div class='del'>-	if (!m-&gt;parents[i] || m-&gt;parents[i] == &amp;dummy_clk)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	val = readl_relaxed(m-&gt;reg);</div><div class='del'>-	val &amp;= ~m-&gt;bm;</div><div class='del'>-	val |= i &lt;&lt; m-&gt;bp;</div><div class='del'>-	writel_relaxed(val, m-&gt;reg);</div><div class='del'>-</div><div class='del'>-	if (clk == &amp;periph_clk)</div><div class='del'>-		return clk_busy_wait(clk);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define DEF_NG_CLK(name, p)				\</div><div class='del'>-	static struct clk name = {			\</div><div class='del'>-		.get_rate	= _clk_get_rate,	\</div><div class='del'>-		.set_rate	= _clk_set_rate,	\</div><div class='del'>-		.round_rate	= _clk_round_rate,	\</div><div class='del'>-		.set_parent	= _clk_set_parent,	\</div><div class='del'>-		.parent		= p,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEF_NG_CLK(periph_clk2_clk,	&amp;osc_clk);</div><div class='del'>-DEF_NG_CLK(periph_pre_clk,	&amp;pll2_bus);</div><div class='del'>-DEF_NG_CLK(periph_clk,		&amp;periph_pre_clk);</div><div class='del'>-DEF_NG_CLK(periph2_clk2_clk,	&amp;osc_clk);</div><div class='del'>-DEF_NG_CLK(periph2_pre_clk,	&amp;pll2_bus);</div><div class='del'>-DEF_NG_CLK(periph2_clk,		&amp;periph2_pre_clk);</div><div class='del'>-DEF_NG_CLK(axi_clk,		&amp;periph_clk);</div><div class='del'>-DEF_NG_CLK(emi_clk,		&amp;axi_clk);</div><div class='del'>-DEF_NG_CLK(arm_clk,		&amp;pll1_sw_clk);</div><div class='del'>-DEF_NG_CLK(ahb_clk,		&amp;periph_clk);</div><div class='del'>-DEF_NG_CLK(ipg_clk,		&amp;ahb_clk);</div><div class='del'>-DEF_NG_CLK(ipg_perclk,		&amp;ipg_clk);</div><div class='del'>-DEF_NG_CLK(ipu1_di0_pre_clk,	&amp;pll3_pfd_540m);</div><div class='del'>-DEF_NG_CLK(ipu1_di1_pre_clk,	&amp;pll3_pfd_540m);</div><div class='del'>-DEF_NG_CLK(ipu2_di0_pre_clk,	&amp;pll3_pfd_540m);</div><div class='del'>-DEF_NG_CLK(ipu2_di1_pre_clk,	&amp;pll3_pfd_540m);</div><div class='del'>-DEF_NG_CLK(asrc_serial_clk,	&amp;pll3_usb_otg);</div><div class='del'>-</div><div class='del'>-#define DEF_CLK(name, er, es, p, s)			\</div><div class='del'>-	static struct clk name = {			\</div><div class='del'>-		.enable_reg	= er,			\</div><div class='del'>-		.enable_shift	= es,			\</div><div class='del'>-		.enable		= _clk_enable,		\</div><div class='del'>-		.disable	= _clk_disable,		\</div><div class='del'>-		.get_rate	= _clk_get_rate,	\</div><div class='del'>-		.set_rate	= _clk_set_rate,	\</div><div class='del'>-		.round_rate	= _clk_round_rate,	\</div><div class='del'>-		.set_parent	= _clk_set_parent,	\</div><div class='del'>-		.parent		= p,			\</div><div class='del'>-		.secondary	= s,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define DEF_CLK_1B(name, er, es, p, s)			\</div><div class='del'>-	static struct clk name = {			\</div><div class='del'>-		.enable_reg	= er,			\</div><div class='del'>-		.enable_shift	= es,			\</div><div class='del'>-		.enable		= _clk_enable_1b,	\</div><div class='del'>-		.disable	= _clk_disable_1b,	\</div><div class='del'>-		.get_rate	= _clk_get_rate,	\</div><div class='del'>-		.set_rate	= _clk_set_rate,	\</div><div class='del'>-		.round_rate	= _clk_round_rate,	\</div><div class='del'>-		.set_parent	= _clk_set_parent,	\</div><div class='del'>-		.parent		= p,			\</div><div class='del'>-		.secondary	= s,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-DEF_CLK(aips_tz1_clk,	  CCGR0, CG0,  &amp;ahb_clk,	  NULL);</div><div class='del'>-DEF_CLK(aips_tz2_clk,	  CCGR0, CG1,  &amp;ahb_clk,	  NULL);</div><div class='del'>-DEF_CLK(apbh_dma_clk,	  CCGR0, CG2,  &amp;ahb_clk,	  NULL);</div><div class='del'>-DEF_CLK(asrc_clk,	  CCGR0, CG3,  &amp;pll4_audio,	  NULL);</div><div class='del'>-DEF_CLK(can1_serial_clk,  CCGR0, CG8,  &amp;pll3_usb_otg,	  NULL);</div><div class='del'>-DEF_CLK(can1_clk,	  CCGR0, CG7,  &amp;pll3_usb_otg,	  &amp;can1_serial_clk);</div><div class='del'>-DEF_CLK(can2_serial_clk,  CCGR0, CG10, &amp;pll3_usb_otg,	  NULL);</div><div class='del'>-DEF_CLK(can2_clk,	  CCGR0, CG9,  &amp;pll3_usb_otg,	  &amp;can2_serial_clk);</div><div class='del'>-DEF_CLK(ecspi1_clk,	  CCGR1, CG0,  &amp;pll3_60m,	  NULL);</div><div class='del'>-DEF_CLK(ecspi2_clk,	  CCGR1, CG1,  &amp;pll3_60m,	  NULL);</div><div class='del'>-DEF_CLK(ecspi3_clk,	  CCGR1, CG2,  &amp;pll3_60m,	  NULL);</div><div class='del'>-DEF_CLK(ecspi4_clk,	  CCGR1, CG3,  &amp;pll3_60m,	  NULL);</div><div class='del'>-DEF_CLK(ecspi5_clk,	  CCGR1, CG4,  &amp;pll3_60m,	  NULL);</div><div class='del'>-DEF_CLK(enet_clk,	  CCGR1, CG5,  &amp;ipg_clk,	  NULL);</div><div class='del'>-DEF_CLK(esai_clk,	  CCGR1, CG8,  &amp;pll3_usb_otg,	  NULL);</div><div class='del'>-DEF_CLK(gpt_serial_clk,	  CCGR1, CG11, &amp;ipg_perclk,	  NULL);</div><div class='del'>-DEF_CLK(gpt_clk,	  CCGR1, CG10, &amp;ipg_perclk,	  &amp;gpt_serial_clk);</div><div class='del'>-DEF_CLK(gpu2d_core_clk,	  CCGR1, CG12, &amp;pll2_pfd_352m,	  &amp;gpu2d_axi_clk);</div><div class='del'>-DEF_CLK(gpu3d_core_clk,	  CCGR1, CG13, &amp;pll2_pfd_594m,	  &amp;gpu3d_axi_clk);</div><div class='del'>-DEF_CLK(gpu3d_shader_clk, CCGR1, CG13, &amp;pll3_pfd_720m,	  &amp;gpu3d_axi_clk);</div><div class='del'>-DEF_CLK(hdmi_iahb_clk,	  CCGR2, CG0,  &amp;ahb_clk,	  NULL);</div><div class='del'>-DEF_CLK(hdmi_isfr_clk,	  CCGR2, CG2,  &amp;pll3_pfd_540m,	  &amp;hdmi_iahb_clk);</div><div class='del'>-DEF_CLK(i2c1_clk,	  CCGR2, CG3,  &amp;ipg_perclk,	  NULL);</div><div class='del'>-DEF_CLK(i2c2_clk,	  CCGR2, CG4,  &amp;ipg_perclk,	  NULL);</div><div class='del'>-DEF_CLK(i2c3_clk,	  CCGR2, CG5,  &amp;ipg_perclk,	  NULL);</div><div class='del'>-DEF_CLK(iim_clk,	  CCGR2, CG6,  &amp;ipg_clk,	  NULL);</div><div class='del'>-DEF_CLK(enfc_clk,	  CCGR2, CG7,  &amp;pll2_pfd_352m,	  NULL);</div><div class='del'>-DEF_CLK(ipu1_clk,	  CCGR3, CG0,  &amp;mmdc_ch0_axi_clk, NULL);</div><div class='del'>-DEF_CLK(ipu1_di0_clk,	  CCGR3, CG1,  &amp;ipu1_di0_pre_clk, NULL);</div><div class='del'>-DEF_CLK(ipu1_di1_clk,	  CCGR3, CG2,  &amp;ipu1_di1_pre_clk, NULL);</div><div class='del'>-DEF_CLK(ipu2_clk,	  CCGR3, CG3,  &amp;mmdc_ch0_axi_clk, NULL);</div><div class='del'>-DEF_CLK(ipu2_di0_clk,	  CCGR3, CG4,  &amp;ipu2_di0_pre_clk, NULL);</div><div class='del'>-DEF_CLK(ipu2_di1_clk,	  CCGR3, CG5,  &amp;ipu2_di1_pre_clk, NULL);</div><div class='del'>-DEF_CLK(ldb_di0_clk,	  CCGR3, CG6,  &amp;pll3_pfd_540m,	  NULL);</div><div class='del'>-DEF_CLK(ldb_di1_clk,	  CCGR3, CG7,  &amp;pll3_pfd_540m,	  NULL);</div><div class='del'>-DEF_CLK(hsi_tx_clk,	  CCGR3, CG8,  &amp;pll2_pfd_400m,	  NULL);</div><div class='del'>-DEF_CLK(mlb_clk,	  CCGR3, CG9,  &amp;pll6_mlb,	  NULL);</div><div class='del'>-DEF_CLK(mmdc_ch0_ipg_clk, CCGR3, CG12, &amp;ipg_clk,	  NULL);</div><div class='del'>-DEF_CLK(mmdc_ch0_axi_clk, CCGR3, CG10, &amp;periph_clk,	  &amp;mmdc_ch0_ipg_clk);</div><div class='del'>-DEF_CLK(mmdc_ch1_ipg_clk, CCGR3, CG13, &amp;ipg_clk,	  NULL);</div><div class='del'>-DEF_CLK(mmdc_ch1_axi_clk, CCGR3, CG11, &amp;periph2_clk,	  &amp;mmdc_ch1_ipg_clk);</div><div class='del'>-DEF_CLK(openvg_axi_clk,   CCGR3, CG13, &amp;axi_clk,	  NULL);</div><div class='del'>-DEF_CLK(pwm1_clk,	  CCGR4, CG8,  &amp;ipg_perclk,	  NULL);</div><div class='del'>-DEF_CLK(pwm2_clk,	  CCGR4, CG9,  &amp;ipg_perclk,	  NULL);</div><div class='del'>-DEF_CLK(pwm3_clk,	  CCGR4, CG10, &amp;ipg_perclk,	  NULL);</div><div class='del'>-DEF_CLK(pwm4_clk,	  CCGR4, CG11, &amp;ipg_perclk,	  NULL);</div><div class='del'>-DEF_CLK(gpmi_bch_apb_clk, CCGR4, CG12, &amp;usdhc3_clk,	  NULL);</div><div class='del'>-DEF_CLK(gpmi_bch_clk,	  CCGR4, CG13, &amp;usdhc4_clk,	  &amp;gpmi_bch_apb_clk);</div><div class='del'>-DEF_CLK(gpmi_apb_clk,	  CCGR4, CG15, &amp;usdhc3_clk,	  &amp;gpmi_bch_clk);</div><div class='del'>-DEF_CLK(gpmi_io_clk,	  CCGR4, CG14, &amp;enfc_clk,	  &amp;gpmi_apb_clk);</div><div class='del'>-DEF_CLK(sdma_clk,	  CCGR5, CG3,  &amp;ahb_clk,	  NULL);</div><div class='del'>-DEF_CLK(spba_clk,	  CCGR5, CG6,  &amp;ipg_clk,	  NULL);</div><div class='del'>-DEF_CLK(spdif_clk,	  CCGR5, CG7,  &amp;pll3_usb_otg,	  &amp;spba_clk);</div><div class='del'>-DEF_CLK(ssi1_clk,	  CCGR5, CG9,  &amp;pll3_pfd_508m,	  NULL);</div><div class='del'>-DEF_CLK(ssi2_clk,	  CCGR5, CG10, &amp;pll3_pfd_508m,	  NULL);</div><div class='del'>-DEF_CLK(ssi3_clk,	  CCGR5, CG11, &amp;pll3_pfd_508m,	  NULL);</div><div class='del'>-DEF_CLK(uart_serial_clk,  CCGR5, CG13, &amp;pll3_usb_otg,	  NULL);</div><div class='del'>-DEF_CLK(uart_clk,	  CCGR5, CG12, &amp;pll3_80m,	  &amp;uart_serial_clk);</div><div class='del'>-DEF_CLK(usboh3_clk,	  CCGR6, CG0,  &amp;ipg_clk,	  NULL);</div><div class='del'>-DEF_CLK(usdhc1_clk,	  CCGR6, CG1,  &amp;pll2_pfd_400m,	  NULL);</div><div class='del'>-DEF_CLK(usdhc2_clk,	  CCGR6, CG2,  &amp;pll2_pfd_400m,	  NULL);</div><div class='del'>-DEF_CLK(usdhc3_clk,	  CCGR6, CG3,  &amp;pll2_pfd_400m,	  NULL);</div><div class='del'>-DEF_CLK(usdhc4_clk,	  CCGR6, CG4,  &amp;pll2_pfd_400m,	  NULL);</div><div class='del'>-DEF_CLK(emi_slow_clk,	  CCGR6, CG5,  &amp;axi_clk,	  NULL);</div><div class='del'>-DEF_CLK(vdo_axi_clk,	  CCGR6, CG6,  &amp;axi_clk,	  NULL);</div><div class='del'>-DEF_CLK(vpu_clk,	  CCGR6, CG7,  &amp;axi_clk,	  NULL);</div><div class='del'>-DEF_CLK_1B(cko1_clk,	  CCOSR, BP_CCOSR_CKO1_EN, &amp;pll2_bus, NULL);</div><div class='del'>-</div><div class='del'>-static int pcie_clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	val = readl_relaxed(PLL8_ENET);</div><div class='del'>-	val |= BM_PLL_ENET_EN_PCIE;</div><div class='del'>-	writel_relaxed(val, PLL8_ENET);</div><div class='del'>-</div><div class='del'>-	return _clk_enable(clk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pcie_clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	_clk_disable(clk);</div><div class='del'>-</div><div class='del'>-	val = readl_relaxed(PLL8_ENET);</div><div class='del'>-	val &amp;= BM_PLL_ENET_EN_PCIE;</div><div class='del'>-	writel_relaxed(val, PLL8_ENET);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk pcie_clk = {</div><div class='del'>-	.enable_reg = CCGR4,</div><div class='del'>-	.enable_shift = CG0,</div><div class='del'>-	.enable = pcie_clk_enable,</div><div class='del'>-	.disable = pcie_clk_disable,</div><div class='del'>-	.set_parent = _clk_set_parent,</div><div class='del'>-	.parent = &amp;axi_clk,</div><div class='del'>-	.secondary = &amp;pll8_enet,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int sata_clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	val = readl_relaxed(PLL8_ENET);</div><div class='del'>-	val |= BM_PLL_ENET_EN_SATA;</div><div class='del'>-	writel_relaxed(val, PLL8_ENET);</div><div class='del'>-</div><div class='del'>-	return _clk_enable(clk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sata_clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	_clk_disable(clk);</div><div class='del'>-</div><div class='del'>-	val = readl_relaxed(PLL8_ENET);</div><div class='del'>-	val &amp;= BM_PLL_ENET_EN_SATA;</div><div class='del'>-	writel_relaxed(val, PLL8_ENET);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk sata_clk = {</div><div class='del'>-	.enable_reg = CCGR5,</div><div class='del'>-	.enable_shift = CG2,</div><div class='del'>-	.enable = sata_clk_enable,</div><div class='del'>-	.disable = sata_clk_disable,</div><div class='del'>-	.parent = &amp;ipg_clk,</div><div class='del'>-	.secondary = &amp;pll8_enet,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define _REGISTER_CLOCK(d, n, c) \</div><div class='del'>-	{ \</div><div class='del'>-		.dev_id = d, \</div><div class='del'>-		.con_id = n, \</div><div class='del'>-		.clk = &amp;c, \</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-static struct clk_lookup lookups[] = {</div><div class='del'>-	_REGISTER_CLOCK("2020000.uart", NULL, uart_clk),</div><div class='del'>-	_REGISTER_CLOCK("21e8000.uart", NULL, uart_clk),</div><div class='del'>-	_REGISTER_CLOCK("21ec000.uart", NULL, uart_clk),</div><div class='del'>-	_REGISTER_CLOCK("21f0000.uart", NULL, uart_clk),</div><div class='del'>-	_REGISTER_CLOCK("21f4000.uart", NULL, uart_clk),</div><div class='del'>-	_REGISTER_CLOCK("2188000.enet", NULL, enet_clk),</div><div class='del'>-	_REGISTER_CLOCK("2190000.usdhc", NULL, usdhc1_clk),</div><div class='del'>-	_REGISTER_CLOCK("2194000.usdhc", NULL, usdhc2_clk),</div><div class='del'>-	_REGISTER_CLOCK("2198000.usdhc", NULL, usdhc3_clk),</div><div class='del'>-	_REGISTER_CLOCK("219c000.usdhc", NULL, usdhc4_clk),</div><div class='del'>-	_REGISTER_CLOCK("21a0000.i2c", NULL, i2c1_clk),</div><div class='del'>-	_REGISTER_CLOCK("21a4000.i2c", NULL, i2c2_clk),</div><div class='del'>-	_REGISTER_CLOCK("21a8000.i2c", NULL, i2c3_clk),</div><div class='del'>-	_REGISTER_CLOCK("2008000.ecspi", NULL, ecspi1_clk),</div><div class='del'>-	_REGISTER_CLOCK("200c000.ecspi", NULL, ecspi2_clk),</div><div class='del'>-	_REGISTER_CLOCK("2010000.ecspi", NULL, ecspi3_clk),</div><div class='del'>-	_REGISTER_CLOCK("2014000.ecspi", NULL, ecspi4_clk),</div><div class='del'>-	_REGISTER_CLOCK("2018000.ecspi", NULL, ecspi5_clk),</div><div class='del'>-	_REGISTER_CLOCK("20ec000.sdma", NULL, sdma_clk),</div><div class='del'>-	_REGISTER_CLOCK("20bc000.wdog", NULL, dummy_clk),</div><div class='del'>-	_REGISTER_CLOCK("20c0000.wdog", NULL, dummy_clk),</div><div class='del'>-	_REGISTER_CLOCK("smp_twd", NULL, twd_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "ckih", ckih_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "ckil_clk", ckil_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "aips_tz1_clk", aips_tz1_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "aips_tz2_clk", aips_tz2_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "asrc_clk", asrc_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "can2_clk", can2_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "hdmi_isfr_clk", hdmi_isfr_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "iim_clk", iim_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "mlb_clk", mlb_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "openvg_axi_clk", openvg_axi_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "pwm1_clk", pwm1_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "pwm2_clk", pwm2_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "pwm3_clk", pwm3_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "pwm4_clk", pwm4_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpmi_io_clk", gpmi_io_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "sata_clk", sata_clk),</div><div class='del'>-	_REGISTER_CLOCK(NULL, "cko1_clk", cko1_clk),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)</div><div class='del'>-{</div><div class='del'>-	u32 val = readl_relaxed(CLPCR);</div><div class='del'>-</div><div class='del'>-	val &amp;= ~BM_CLPCR_LPM;</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case WAIT_CLOCKED:</div><div class='del'>-		break;</div><div class='del'>-	case WAIT_UNCLOCKED:</div><div class='del'>-		val |= 0x1 &lt;&lt; BP_CLPCR_LPM;</div><div class='del'>-		break;</div><div class='del'>-	case STOP_POWER_ON:</div><div class='del'>-		val |= 0x2 &lt;&lt; BP_CLPCR_LPM;</div><div class='del'>-		break;</div><div class='del'>-	case WAIT_UNCLOCKED_POWER_OFF:</div><div class='del'>-		val |= 0x1 &lt;&lt; BP_CLPCR_LPM;</div><div class='del'>-		val &amp;= ~BM_CLPCR_VSTBY;</div><div class='del'>-		val &amp;= ~BM_CLPCR_SBYOS;</div><div class='del'>-		break;</div><div class='del'>-	case STOP_POWER_OFF:</div><div class='del'>-		val |= 0x2 &lt;&lt; BP_CLPCR_LPM;</div><div class='del'>-		val |= 0x3 &lt;&lt; BP_CLPCR_STBY_COUNT;</div><div class='del'>-		val |= BM_CLPCR_VSTBY;</div><div class='del'>-		val |= BM_CLPCR_SBYOS;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	writel_relaxed(val, CLPCR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct map_desc imx6q_clock_desc[] = {</div><div class='del'>-	imx_map_entry(MX6Q, CCM, MT_DEVICE),</div><div class='del'>-	imx_map_entry(MX6Q, ANATOP, MT_DEVICE),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init imx6q_clock_map_io(void)</div><div class='del'>-{</div><div class='del'>-	iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init mx6q_clocks_init(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np;</div><div class='del'>-	void __iomem *base;</div><div class='del'>-	int i, irq;</div><div class='del'>-</div><div class='del'>-	/* retrieve the freqency of fixed clocks from device tree */</div><div class='del'>-	for_each_compatible_node(np, NULL, "fixed-clock") {</div><div class='del'>-		u32 rate;</div><div class='del'>-		if (of_property_read_u32(np, "clock-frequency", &amp;rate))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (of_device_is_compatible(np, "fsl,imx-ckil"))</div><div class='del'>-			external_low_reference = rate;</div><div class='del'>-		else if (of_device_is_compatible(np, "fsl,imx-ckih1"))</div><div class='del'>-			external_high_reference = rate;</div><div class='del'>-		else if (of_device_is_compatible(np, "fsl,imx-osc"))</div><div class='del'>-			oscillator_reference = rate;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(lookups); i++)</div><div class='del'>-		clkdev_add(&amp;lookups[i]);</div><div class='del'>-</div><div class='del'>-	/* only keep necessary clocks on */</div><div class='del'>-	writel_relaxed(0x3 &lt;&lt; CG0  | 0x3 &lt;&lt; CG1  | 0x3 &lt;&lt; CG2,	CCGR0);</div><div class='del'>-	writel_relaxed(0x3 &lt;&lt; CG8  | 0x3 &lt;&lt; CG9  | 0x3 &lt;&lt; CG10,	CCGR2);</div><div class='del'>-	writel_relaxed(0x3 &lt;&lt; CG10 | 0x3 &lt;&lt; CG12,		CCGR3);</div><div class='del'>-	writel_relaxed(0x3 &lt;&lt; CG4  | 0x3 &lt;&lt; CG6  | 0x3 &lt;&lt; CG7,	CCGR4);</div><div class='del'>-	writel_relaxed(0x3 &lt;&lt; CG0,				CCGR5);</div><div class='del'>-	writel_relaxed(0,					CCGR6);</div><div class='del'>-	writel_relaxed(0,					CCGR7);</div><div class='del'>-</div><div class='del'>-	clk_enable(&amp;uart_clk);</div><div class='del'>-	clk_enable(&amp;mmdc_ch0_axi_clk);</div><div class='del'>-</div><div class='del'>-	clk_set_rate(&amp;pll4_audio, FREQ_650M);</div><div class='del'>-	clk_set_rate(&amp;pll5_video, FREQ_650M);</div><div class='del'>-	clk_set_parent(&amp;ipu1_di0_clk, &amp;ipu1_di0_pre_clk);</div><div class='del'>-	clk_set_parent(&amp;ipu1_di0_pre_clk, &amp;pll5_video);</div><div class='del'>-	clk_set_parent(&amp;gpu3d_shader_clk, &amp;pll2_pfd_594m);</div><div class='del'>-	clk_set_rate(&amp;gpu3d_shader_clk, FREQ_594M);</div><div class='del'>-	clk_set_parent(&amp;gpu3d_core_clk, &amp;mmdc_ch0_axi_clk);</div><div class='del'>-	clk_set_rate(&amp;gpu3d_core_clk, FREQ_528M);</div><div class='del'>-	clk_set_parent(&amp;asrc_serial_clk, &amp;pll3_usb_otg);</div><div class='del'>-	clk_set_rate(&amp;asrc_serial_clk, 1500000);</div><div class='del'>-	clk_set_rate(&amp;enfc_clk, 11000000);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Before pinctrl API is available, we have to rely on the pad</div><div class='del'>-	 * configuration set up by bootloader.  For usdhc example here,</div><div class='del'>-	 * u-boot sets up the pads for 49.5 MHz case, and we have to lower</div><div class='del'>-	 * the usdhc clock from 198 to 49.5 MHz to match the pad configuration.</div><div class='del'>-	 *</div><div class='del'>-	 * FIXME: This is should be removed after pinctrl API is available.</div><div class='del'>-	 * At that time, usdhc driver can call pinctrl API to change pad</div><div class='del'>-	 * configuration dynamically per different usdhc clock settings.</div><div class='del'>-	 */</div><div class='del'>-	clk_set_rate(&amp;usdhc1_clk, 49500000);</div><div class='del'>-	clk_set_rate(&amp;usdhc2_clk, 49500000);</div><div class='del'>-	clk_set_rate(&amp;usdhc3_clk, 49500000);</div><div class='del'>-	clk_set_rate(&amp;usdhc4_clk, 49500000);</div><div class='del'>-</div><div class='del'>-	clk_set_parent(&amp;cko1_clk, &amp;ahb_clk);</div><div class='del'>-</div><div class='del'>-	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");</div><div class='del'>-	base = of_iomap(np, 0);</div><div class='del'>-	WARN_ON(!base);</div><div class='del'>-	irq = irq_of_parse_and_map(np, 0);</div><div class='del'>-	mxc_timer_init(&amp;gpt_clk, base, irq);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-imx/clock-mx51-mx53.c b/arch/arm/mach-imx/clock-mx51-mx53.c<br/>deleted file mode 100644<br/>index 08470504a088..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/clock-mx51-mx53.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/clock-mx51-mx53.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1675 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='del'>- * Copyright (C) 2009-2010 Amit Kucheria &lt;amit.kucheria@canonical.com&gt;</div><div class='del'>- *</div><div class='del'>- * The code contained herein is licensed under the GNU General Public</div><div class='del'>- * License. You may obtain a copy of the GNU General Public License</div><div class='del'>- * Version 2 or later at the following locations:</div><div class='del'>- *</div><div class='del'>- * http://www.opensource.org/licenses/gpl-license.html</div><div class='del'>- * http://www.gnu.org/copyleft/gpl.html</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/div64.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-#include &lt;mach/clock.h&gt;</div><div class='del'>-</div><div class='del'>-#include "crm-regs-imx5.h"</div><div class='del'>-</div><div class='del'>-/* External clock values passed-in by the board code */</div><div class='del'>-static unsigned long external_high_reference, external_low_reference;</div><div class='del'>-static unsigned long oscillator_reference, ckih2_reference;</div><div class='del'>-</div><div class='del'>-static struct clk osc_clk;</div><div class='del'>-static struct clk pll1_main_clk;</div><div class='del'>-static struct clk pll1_sw_clk;</div><div class='del'>-static struct clk pll2_sw_clk;</div><div class='del'>-static struct clk pll3_sw_clk;</div><div class='del'>-static struct clk mx53_pll4_sw_clk;</div><div class='del'>-static struct clk lp_apm_clk;</div><div class='del'>-static struct clk periph_apm_clk;</div><div class='del'>-static struct clk ahb_clk;</div><div class='del'>-static struct clk ipg_clk;</div><div class='del'>-static struct clk usboh3_clk;</div><div class='del'>-static struct clk emi_fast_clk;</div><div class='del'>-static struct clk ipu_clk;</div><div class='del'>-static struct clk mipi_hsc1_clk;</div><div class='del'>-static struct clk esdhc1_clk;</div><div class='del'>-static struct clk esdhc2_clk;</div><div class='del'>-static struct clk esdhc3_mx53_clk;</div><div class='del'>-</div><div class='del'>-#define MAX_DPLL_WAIT_TRIES	1000 /* 1000 * udelay(1) = 1ms */</div><div class='del'>-</div><div class='del'>-/* calculate best pre and post dividers to get the required divider */</div><div class='del'>-static void __calc_pre_post_dividers(u32 div, u32 *pre, u32 *post,</div><div class='del'>-	u32 max_pre, u32 max_post)</div><div class='del'>-{</div><div class='del'>-	if (div &gt;= max_pre * max_post) {</div><div class='del'>-		*pre = max_pre;</div><div class='del'>-		*post = max_post;</div><div class='del'>-	} else if (div &gt;= max_pre) {</div><div class='del'>-		u32 min_pre, temp_pre, old_err, err;</div><div class='del'>-		min_pre = DIV_ROUND_UP(div, max_post);</div><div class='del'>-		old_err = max_pre;</div><div class='del'>-		for (temp_pre = max_pre; temp_pre &gt;= min_pre; temp_pre--) {</div><div class='del'>-			err = div % temp_pre;</div><div class='del'>-			if (err == 0) {</div><div class='del'>-				*pre = temp_pre;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			err = temp_pre - err;</div><div class='del'>-			if (err &lt; old_err) {</div><div class='del'>-				old_err = err;</div><div class='del'>-				*pre = temp_pre;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		*post = DIV_ROUND_UP(div, *pre);</div><div class='del'>-	} else {</div><div class='del'>-		*pre = div;</div><div class='del'>-		*post = 1;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _clk_ccgr_setclk(struct clk *clk, unsigned mode)</div><div class='del'>-{</div><div class='del'>-	u32 reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	reg &amp;= ~(MXC_CCM_CCGRx_CG_MASK &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-	reg |= mode &lt;&lt; clk-&gt;enable_shift;</div><div class='del'>-</div><div class='del'>-	__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_ccgr_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	_clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_ON);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _clk_ccgr_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	_clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_OFF);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_ccgr_enable_inrun(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	_clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_IDLE);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _clk_ccgr_disable_inwait(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	_clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_IDLE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * For the 4-to-1 muxed input clock</div><div class='del'>- */</div><div class='del'>-static inline u32 _get_mux(struct clk *parent, struct clk *m0,</div><div class='del'>-			   struct clk *m1, struct clk *m2, struct clk *m3)</div><div class='del'>-{</div><div class='del'>-	if (parent == m0)</div><div class='del'>-		return 0;</div><div class='del'>-	else if (parent == m1)</div><div class='del'>-		return 1;</div><div class='del'>-	else if (parent == m2)</div><div class='del'>-		return 2;</div><div class='del'>-	else if (parent == m3)</div><div class='del'>-		return 3;</div><div class='del'>-	else</div><div class='del'>-		BUG();</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __iomem *_mx51_get_pll_base(struct clk *pll)</div><div class='del'>-{</div><div class='del'>-	if (pll == &amp;pll1_main_clk)</div><div class='del'>-		return MX51_DPLL1_BASE;</div><div class='del'>-	else if (pll == &amp;pll2_sw_clk)</div><div class='del'>-		return MX51_DPLL2_BASE;</div><div class='del'>-	else if (pll == &amp;pll3_sw_clk)</div><div class='del'>-		return MX51_DPLL3_BASE;</div><div class='del'>-	else</div><div class='del'>-		BUG();</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __iomem *_mx53_get_pll_base(struct clk *pll)</div><div class='del'>-{</div><div class='del'>-	if (pll == &amp;pll1_main_clk)</div><div class='del'>-		return MX53_DPLL1_BASE;</div><div class='del'>-	else if (pll == &amp;pll2_sw_clk)</div><div class='del'>-		return MX53_DPLL2_BASE;</div><div class='del'>-	else if (pll == &amp;pll3_sw_clk)</div><div class='del'>-		return MX53_DPLL3_BASE;</div><div class='del'>-	else if (pll == &amp;mx53_pll4_sw_clk)</div><div class='del'>-		return MX53_DPLL4_BASE;</div><div class='del'>-	else</div><div class='del'>-		BUG();</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __iomem *_get_pll_base(struct clk *pll)</div><div class='del'>-{</div><div class='del'>-	if (cpu_is_mx51())</div><div class='del'>-		return _mx51_get_pll_base(pll);</div><div class='del'>-	else</div><div class='del'>-		return _mx53_get_pll_base(pll);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk_pll_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	long mfi, mfn, mfd, pdf, ref_clk, mfn_abs;</div><div class='del'>-	unsigned long dp_op, dp_mfd, dp_mfn, dp_ctl, pll_hfsm, dbl;</div><div class='del'>-	void __iomem *pllbase;</div><div class='del'>-	s64 temp;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	pllbase = _get_pll_base(clk);</div><div class='del'>-</div><div class='del'>-	dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);</div><div class='del'>-	pll_hfsm = dp_ctl &amp; MXC_PLL_DP_CTL_HFSM;</div><div class='del'>-	dbl = dp_ctl &amp; MXC_PLL_DP_CTL_DPDCK0_2_EN;</div><div class='del'>-</div><div class='del'>-	if (pll_hfsm == 0) {</div><div class='del'>-		dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP);</div><div class='del'>-		dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_MFD);</div><div class='del'>-		dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_MFN);</div><div class='del'>-	} else {</div><div class='del'>-		dp_op = __raw_readl(pllbase + MXC_PLL_DP_HFS_OP);</div><div class='del'>-		dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFD);</div><div class='del'>-		dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFN);</div><div class='del'>-	}</div><div class='del'>-	pdf = dp_op &amp; MXC_PLL_DP_OP_PDF_MASK;</div><div class='del'>-	mfi = (dp_op &amp; MXC_PLL_DP_OP_MFI_MASK) &gt;&gt; MXC_PLL_DP_OP_MFI_OFFSET;</div><div class='del'>-	mfi = (mfi &lt;= 5) ? 5 : mfi;</div><div class='del'>-	mfd = dp_mfd &amp; MXC_PLL_DP_MFD_MASK;</div><div class='del'>-	mfn = mfn_abs = dp_mfn &amp; MXC_PLL_DP_MFN_MASK;</div><div class='del'>-	/* Sign extend to 32-bits */</div><div class='del'>-	if (mfn &gt;= 0x04000000) {</div><div class='del'>-		mfn |= 0xFC000000;</div><div class='del'>-		mfn_abs = -mfn;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ref_clk = 2 * parent_rate;</div><div class='del'>-	if (dbl != 0)</div><div class='del'>-		ref_clk *= 2;</div><div class='del'>-</div><div class='del'>-	ref_clk /= (pdf + 1);</div><div class='del'>-	temp = (u64) ref_clk * mfn_abs;</div><div class='del'>-	do_div(temp, mfd + 1);</div><div class='del'>-	if (mfn &lt; 0)</div><div class='del'>-		temp = -temp;</div><div class='del'>-	temp = (ref_clk * mfi) + temp;</div><div class='del'>-</div><div class='del'>-	return temp;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_pll_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	void __iomem *pllbase;</div><div class='del'>-</div><div class='del'>-	long mfi, pdf, mfn, mfd = 999999;</div><div class='del'>-	s64 temp64;</div><div class='del'>-	unsigned long quad_parent_rate;</div><div class='del'>-	unsigned long pll_hfsm, dp_ctl;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	pllbase = _get_pll_base(clk);</div><div class='del'>-</div><div class='del'>-	quad_parent_rate = 4 * parent_rate;</div><div class='del'>-	pdf = mfi = -1;</div><div class='del'>-	while (++pdf &lt; 16 &amp;&amp; mfi &lt; 5)</div><div class='del'>-		mfi = rate * (pdf+1) / quad_parent_rate;</div><div class='del'>-	if (mfi &gt; 15)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	pdf--;</div><div class='del'>-</div><div class='del'>-	temp64 = rate * (pdf+1) - quad_parent_rate * mfi;</div><div class='del'>-	do_div(temp64, quad_parent_rate/1000000);</div><div class='del'>-	mfn = (long)temp64;</div><div class='del'>-</div><div class='del'>-	dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);</div><div class='del'>-	/* use dpdck0_2 */</div><div class='del'>-	__raw_writel(dp_ctl | 0x1000L, pllbase + MXC_PLL_DP_CTL);</div><div class='del'>-	pll_hfsm = dp_ctl &amp; MXC_PLL_DP_CTL_HFSM;</div><div class='del'>-	if (pll_hfsm == 0) {</div><div class='del'>-		reg = mfi &lt;&lt; 4 | pdf;</div><div class='del'>-		__raw_writel(reg, pllbase + MXC_PLL_DP_OP);</div><div class='del'>-		__raw_writel(mfd, pllbase + MXC_PLL_DP_MFD);</div><div class='del'>-		__raw_writel(mfn, pllbase + MXC_PLL_DP_MFN);</div><div class='del'>-	} else {</div><div class='del'>-		reg = mfi &lt;&lt; 4 | pdf;</div><div class='del'>-		__raw_writel(reg, pllbase + MXC_PLL_DP_HFS_OP);</div><div class='del'>-		__raw_writel(mfd, pllbase + MXC_PLL_DP_HFS_MFD);</div><div class='del'>-		__raw_writel(mfn, pllbase + MXC_PLL_DP_HFS_MFN);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_pll_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	void __iomem *pllbase;</div><div class='del'>-	int i = 0;</div><div class='del'>-</div><div class='del'>-	pllbase = _get_pll_base(clk);</div><div class='del'>-	reg = __raw_readl(pllbase + MXC_PLL_DP_CTL);</div><div class='del'>-	if (reg &amp; MXC_PLL_DP_CTL_UPEN)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	reg |= MXC_PLL_DP_CTL_UPEN;</div><div class='del'>-	__raw_writel(reg, pllbase + MXC_PLL_DP_CTL);</div><div class='del'>-</div><div class='del'>-	/* Wait for lock */</div><div class='del'>-	do {</div><div class='del'>-		reg = __raw_readl(pllbase + MXC_PLL_DP_CTL);</div><div class='del'>-		if (reg &amp; MXC_PLL_DP_CTL_LRF)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		udelay(1);</div><div class='del'>-	} while (++i &lt; MAX_DPLL_WAIT_TRIES);</div><div class='del'>-</div><div class='del'>-	if (i == MAX_DPLL_WAIT_TRIES) {</div><div class='del'>-		pr_err("MX5: pll locking failed\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _clk_pll_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	void __iomem *pllbase;</div><div class='del'>-</div><div class='del'>-	pllbase = _get_pll_base(clk);</div><div class='del'>-	reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) &amp; ~MXC_PLL_DP_CTL_UPEN;</div><div class='del'>-	__raw_writel(reg, pllbase + MXC_PLL_DP_CTL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_pll1_sw_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 reg, step;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CCSR);</div><div class='del'>-</div><div class='del'>-	/* When switching from pll_main_clk to a bypass clock, first select a</div><div class='del'>-	 * multiplexed clock in 'step_sel', then shift the glitchless mux</div><div class='del'>-	 * 'pll1_sw_clk_sel'.</div><div class='del'>-	 *</div><div class='del'>-	 * When switching back, do it in reverse order</div><div class='del'>-	 */</div><div class='del'>-	if (parent == &amp;pll1_main_clk) {</div><div class='del'>-		/* Switch to pll1_main_clk */</div><div class='del'>-		reg &amp;= ~MXC_CCM_CCSR_PLL1_SW_CLK_SEL;</div><div class='del'>-		__raw_writel(reg, MXC_CCM_CCSR);</div><div class='del'>-		/* step_clk mux switched to lp_apm, to save power. */</div><div class='del'>-		reg = __raw_readl(MXC_CCM_CCSR);</div><div class='del'>-		reg &amp;= ~MXC_CCM_CCSR_STEP_SEL_MASK;</div><div class='del'>-		reg |= (MXC_CCM_CCSR_STEP_SEL_LP_APM &lt;&lt;</div><div class='del'>-				MXC_CCM_CCSR_STEP_SEL_OFFSET);</div><div class='del'>-	} else {</div><div class='del'>-		if (parent == &amp;lp_apm_clk) {</div><div class='del'>-			step = MXC_CCM_CCSR_STEP_SEL_LP_APM;</div><div class='del'>-		} else  if (parent == &amp;pll2_sw_clk) {</div><div class='del'>-			step = MXC_CCM_CCSR_STEP_SEL_PLL2_DIVIDED;</div><div class='del'>-		} else  if (parent == &amp;pll3_sw_clk) {</div><div class='del'>-			step = MXC_CCM_CCSR_STEP_SEL_PLL3_DIVIDED;</div><div class='del'>-		} else</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		reg &amp;= ~MXC_CCM_CCSR_STEP_SEL_MASK;</div><div class='del'>-		reg |= (step &lt;&lt; MXC_CCM_CCSR_STEP_SEL_OFFSET);</div><div class='del'>-</div><div class='del'>-		__raw_writel(reg, MXC_CCM_CCSR);</div><div class='del'>-		/* Switch to step_clk */</div><div class='del'>-		reg = __raw_readl(MXC_CCM_CCSR);</div><div class='del'>-		reg |= MXC_CCM_CCSR_PLL1_SW_CLK_SEL;</div><div class='del'>-	}</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CCSR);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk_pll1_sw_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg, div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CCSR);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;parent == &amp;pll2_sw_clk) {</div><div class='del'>-		div = ((reg &amp; MXC_CCM_CCSR_PLL2_PODF_MASK) &gt;&gt;</div><div class='del'>-		       MXC_CCM_CCSR_PLL2_PODF_OFFSET) + 1;</div><div class='del'>-	} else if (clk-&gt;parent == &amp;pll3_sw_clk) {</div><div class='del'>-		div = ((reg &amp; MXC_CCM_CCSR_PLL3_PODF_MASK) &gt;&gt;</div><div class='del'>-		       MXC_CCM_CCSR_PLL3_PODF_OFFSET) + 1;</div><div class='del'>-	} else</div><div class='del'>-		div = 1;</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_pll2_sw_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CCSR);</div><div class='del'>-</div><div class='del'>-	if (parent == &amp;pll2_sw_clk)</div><div class='del'>-		reg &amp;= ~MXC_CCM_CCSR_PLL2_SW_CLK_SEL;</div><div class='del'>-	else</div><div class='del'>-		reg |= MXC_CCM_CCSR_PLL2_SW_CLK_SEL;</div><div class='del'>-</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CCSR);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_lp_apm_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	if (parent == &amp;osc_clk)</div><div class='del'>-		reg = __raw_readl(MXC_CCM_CCSR) &amp; ~MXC_CCM_CCSR_LP_APM_SEL;</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CCSR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk_cpu_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 cacrr, div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	cacrr = __raw_readl(MXC_CCM_CACRR);</div><div class='del'>-	div = (cacrr &amp; MXC_CCM_CACRR_ARM_PODF_MASK) + 1;</div><div class='del'>-</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int clk_cpu_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 reg, cpu_podf;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-	cpu_podf = parent_rate / rate - 1;</div><div class='del'>-	/* use post divider to change freq */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CACRR);</div><div class='del'>-	reg &amp;= ~MXC_CCM_CACRR_ARM_PODF_MASK;</div><div class='del'>-	reg |= cpu_podf &lt;&lt; MXC_CCM_CACRR_ARM_PODF_OFFSET;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CACRR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_periph_apm_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 reg, mux;</div><div class='del'>-	int i = 0;</div><div class='del'>-</div><div class='del'>-	mux = _get_mux(parent, &amp;pll1_sw_clk, &amp;pll3_sw_clk, &amp;lp_apm_clk, NULL);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CBCMR) &amp; ~MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK;</div><div class='del'>-	reg |= mux &lt;&lt; MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CBCMR);</div><div class='del'>-</div><div class='del'>-	/* Wait for lock */</div><div class='del'>-	do {</div><div class='del'>-		reg = __raw_readl(MXC_CCM_CDHIPR);</div><div class='del'>-		if (!(reg &amp;  MXC_CCM_CDHIPR_PERIPH_CLK_SEL_BUSY))</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		udelay(1);</div><div class='del'>-	} while (++i &lt; MAX_DPLL_WAIT_TRIES);</div><div class='del'>-</div><div class='del'>-	if (i == MAX_DPLL_WAIT_TRIES) {</div><div class='del'>-		pr_err("MX5: Set parent for periph_apm clock failed\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_main_bus_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CBCDR);</div><div class='del'>-</div><div class='del'>-	if (parent == &amp;pll2_sw_clk)</div><div class='del'>-		reg &amp;= ~MXC_CCM_CBCDR_PERIPH_CLK_SEL;</div><div class='del'>-	else if (parent == &amp;periph_apm_clk)</div><div class='del'>-		reg |= MXC_CCM_CBCDR_PERIPH_CLK_SEL;</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CBCDR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk main_bus_clk = {</div><div class='del'>-	.parent = &amp;pll2_sw_clk,</div><div class='del'>-	.set_parent = _clk_main_bus_set_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long clk_ahb_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg, div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CBCDR);</div><div class='del'>-	div = ((reg &amp; MXC_CCM_CBCDR_AHB_PODF_MASK) &gt;&gt;</div><div class='del'>-	       MXC_CCM_CBCDR_AHB_PODF_OFFSET) + 1;</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int _clk_ahb_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 reg, div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-	int i = 0;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-	if (div &gt; 8 || div &lt; 1 || ((parent_rate / div) != rate))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CBCDR);</div><div class='del'>-	reg &amp;= ~MXC_CCM_CBCDR_AHB_PODF_MASK;</div><div class='del'>-	reg |= (div - 1) &lt;&lt; MXC_CCM_CBCDR_AHB_PODF_OFFSET;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CBCDR);</div><div class='del'>-</div><div class='del'>-	/* Wait for lock */</div><div class='del'>-	do {</div><div class='del'>-		reg = __raw_readl(MXC_CCM_CDHIPR);</div><div class='del'>-		if (!(reg &amp; MXC_CCM_CDHIPR_AHB_PODF_BUSY))</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		udelay(1);</div><div class='del'>-	} while (++i &lt; MAX_DPLL_WAIT_TRIES);</div><div class='del'>-</div><div class='del'>-	if (i == MAX_DPLL_WAIT_TRIES) {</div><div class='del'>-		pr_err("MX5: clk_ahb_set_rate failed\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_ahb_round_rate(struct clk *clk,</div><div class='del'>-						unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-	if (div &gt; 8)</div><div class='del'>-		div = 8;</div><div class='del'>-	else if (div == 0)</div><div class='del'>-		div++;</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int _clk_max_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	_clk_ccgr_enable(clk);</div><div class='del'>-</div><div class='del'>-	/* Handshake with MAX when LPM is entered. */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CLPCR);</div><div class='del'>-	if (cpu_is_mx51())</div><div class='del'>-		reg &amp;= ~MX51_CCM_CLPCR_BYPASS_MAX_LPM_HS;</div><div class='del'>-	else if (cpu_is_mx53())</div><div class='del'>-		reg &amp;= ~MX53_CCM_CLPCR_BYPASS_MAX_LPM_HS;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CLPCR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _clk_max_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	_clk_ccgr_disable_inwait(clk);</div><div class='del'>-</div><div class='del'>-	/* No Handshake with MAX when LPM is entered as its disabled. */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CLPCR);</div><div class='del'>-	if (cpu_is_mx51())</div><div class='del'>-		reg |= MX51_CCM_CLPCR_BYPASS_MAX_LPM_HS;</div><div class='del'>-	else if (cpu_is_mx53())</div><div class='del'>-		reg &amp;= ~MX53_CCM_CLPCR_BYPASS_MAX_LPM_HS;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CLPCR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk_ipg_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg, div;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CBCDR);</div><div class='del'>-	div = ((reg &amp; MXC_CCM_CBCDR_IPG_PODF_MASK) &gt;&gt;</div><div class='del'>-	       MXC_CCM_CBCDR_IPG_PODF_OFFSET) + 1;</div><div class='del'>-</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk_ipg_per_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg, prediv1, prediv2, podf;</div><div class='del'>-	unsigned long parent_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;parent == &amp;main_bus_clk || clk-&gt;parent == &amp;lp_apm_clk) {</div><div class='del'>-		/* the main_bus_clk is the one before the DVFS engine */</div><div class='del'>-		reg = __raw_readl(MXC_CCM_CBCDR);</div><div class='del'>-		prediv1 = ((reg &amp; MXC_CCM_CBCDR_PERCLK_PRED1_MASK) &gt;&gt;</div><div class='del'>-			   MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET) + 1;</div><div class='del'>-		prediv2 = ((reg &amp; MXC_CCM_CBCDR_PERCLK_PRED2_MASK) &gt;&gt;</div><div class='del'>-			   MXC_CCM_CBCDR_PERCLK_PRED2_OFFSET) + 1;</div><div class='del'>-		podf = ((reg &amp; MXC_CCM_CBCDR_PERCLK_PODF_MASK) &gt;&gt;</div><div class='del'>-			MXC_CCM_CBCDR_PERCLK_PODF_OFFSET) + 1;</div><div class='del'>-		return parent_rate / (prediv1 * prediv2 * podf);</div><div class='del'>-	} else if (clk-&gt;parent == &amp;ipg_clk)</div><div class='del'>-		return parent_rate;</div><div class='del'>-	else</div><div class='del'>-		BUG();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _clk_ipg_per_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CBCMR);</div><div class='del'>-</div><div class='del'>-	reg &amp;= ~MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL;</div><div class='del'>-	reg &amp;= ~MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL;</div><div class='del'>-</div><div class='del'>-	if (parent == &amp;ipg_clk)</div><div class='del'>-		reg |= MXC_CCM_CBCMR_PERCLK_IPG_CLK_SEL;</div><div class='del'>-	else if (parent == &amp;lp_apm_clk)</div><div class='del'>-		reg |= MXC_CCM_CBCMR_PERCLK_LP_APM_CLK_SEL;</div><div class='del'>-	else if (parent != &amp;main_bus_clk)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CBCMR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define clk_nfc_set_parent	NULL</div><div class='del'>-</div><div class='del'>-static unsigned long clk_nfc_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate;</div><div class='del'>-	u32 reg, div;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CBCDR);</div><div class='del'>-	div = ((reg &amp; MXC_CCM_CBCDR_NFC_PODF_MASK) &gt;&gt;</div><div class='del'>-	       MXC_CCM_CBCDR_NFC_PODF_OFFSET) + 1;</div><div class='del'>-	rate = clk_get_rate(clk-&gt;parent) / div;</div><div class='del'>-	WARN_ON(rate == 0);</div><div class='del'>-	return rate;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk_nfc_round_rate(struct clk *clk,</div><div class='del'>-						unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 div;</div><div class='del'>-	unsigned long parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (!rate)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	div = parent_rate / rate;</div><div class='del'>-</div><div class='del'>-	if (parent_rate % rate)</div><div class='del'>-		div++;</div><div class='del'>-</div><div class='del'>-	if (div &gt; 8)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return parent_rate / div;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int clk_nfc_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 reg, div;</div><div class='del'>-</div><div class='del'>-	div = clk_get_rate(clk-&gt;parent) / rate;</div><div class='del'>-	if (div == 0)</div><div class='del'>-		div++;</div><div class='del'>-	if (((clk_get_rate(clk-&gt;parent) / div) != rate) || (div &gt; 8))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CBCDR);</div><div class='del'>-	reg &amp;= ~MXC_CCM_CBCDR_NFC_PODF_MASK;</div><div class='del'>-	reg |= (div - 1) &lt;&lt; MXC_CCM_CBCDR_NFC_PODF_OFFSET;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CBCDR);</div><div class='del'>-</div><div class='del'>-	while (__raw_readl(MXC_CCM_CDHIPR) &amp;</div><div class='del'>-			MXC_CCM_CDHIPR_NFC_IPG_INT_MEM_PODF_BUSY){</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_high_reference_clock_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return external_high_reference;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_low_reference_clock_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return external_low_reference;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_oscillator_reference_clock_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return oscillator_reference;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long get_ckih2_reference_clock_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return ckih2_reference;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk_emi_slow_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg, div;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CBCDR);</div><div class='del'>-	div = ((reg &amp; MXC_CCM_CBCDR_EMI_PODF_MASK) &gt;&gt;</div><div class='del'>-	       MXC_CCM_CBCDR_EMI_PODF_OFFSET) + 1;</div><div class='del'>-</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long _clk_ddr_hf_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate;</div><div class='del'>-	u32 reg, div;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CBCDR);</div><div class='del'>-	div = ((reg &amp; MXC_CCM_CBCDR_DDR_PODF_MASK) &gt;&gt;</div><div class='del'>-		MXC_CCM_CBCDR_DDR_PODF_OFFSET) + 1;</div><div class='del'>-	rate = clk_get_rate(clk-&gt;parent) / div;</div><div class='del'>-</div><div class='del'>-	return rate;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* External high frequency clock */</div><div class='del'>-static struct clk ckih_clk = {</div><div class='del'>-	.get_rate = get_high_reference_clock_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ckih2_clk = {</div><div class='del'>-	.get_rate = get_ckih2_reference_clock_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk osc_clk = {</div><div class='del'>-	.get_rate = get_oscillator_reference_clock_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* External low frequency (32kHz) clock */</div><div class='del'>-static struct clk ckil_clk = {</div><div class='del'>-	.get_rate = get_low_reference_clock_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk pll1_main_clk = {</div><div class='del'>-	.parent = &amp;osc_clk,</div><div class='del'>-	.get_rate = clk_pll_get_rate,</div><div class='del'>-	.enable = _clk_pll_enable,</div><div class='del'>-	.disable = _clk_pll_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Clock tree block diagram (WIP):</div><div class='del'>- * 	CCM: Clock Controller Module</div><div class='del'>- *</div><div class='del'>- * PLL output -&gt; |</div><div class='del'>- *               | CCM Switcher -&gt; CCM_CLK_ROOT_GEN -&gt;</div><div class='del'>- * PLL bypass -&gt; |</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* PLL1 SW supplies to ARM core */</div><div class='del'>-static struct clk pll1_sw_clk = {</div><div class='del'>-	.parent = &amp;pll1_main_clk,</div><div class='del'>-	.set_parent = _clk_pll1_sw_set_parent,</div><div class='del'>-	.get_rate = clk_pll1_sw_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* PLL2 SW supplies to AXI/AHB/IP buses */</div><div class='del'>-static struct clk pll2_sw_clk = {</div><div class='del'>-	.parent = &amp;osc_clk,</div><div class='del'>-	.get_rate = clk_pll_get_rate,</div><div class='del'>-	.set_rate = _clk_pll_set_rate,</div><div class='del'>-	.set_parent = _clk_pll2_sw_set_parent,</div><div class='del'>-	.enable = _clk_pll_enable,</div><div class='del'>-	.disable = _clk_pll_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* PLL3 SW supplies to serial clocks like USB, SSI, etc. */</div><div class='del'>-static struct clk pll3_sw_clk = {</div><div class='del'>-	.parent = &amp;osc_clk,</div><div class='del'>-	.set_rate = _clk_pll_set_rate,</div><div class='del'>-	.get_rate = clk_pll_get_rate,</div><div class='del'>-	.enable = _clk_pll_enable,</div><div class='del'>-	.disable = _clk_pll_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* PLL4 SW supplies to LVDS Display Bridge(LDB) */</div><div class='del'>-static struct clk mx53_pll4_sw_clk = {</div><div class='del'>-	.parent = &amp;osc_clk,</div><div class='del'>-	.set_rate = _clk_pll_set_rate,</div><div class='del'>-	.enable = _clk_pll_enable,</div><div class='del'>-	.disable = _clk_pll_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Low-power Audio Playback Mode clock */</div><div class='del'>-static struct clk lp_apm_clk = {</div><div class='del'>-	.parent = &amp;osc_clk,</div><div class='del'>-	.set_parent = _clk_lp_apm_set_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk periph_apm_clk = {</div><div class='del'>-	.parent = &amp;pll1_sw_clk,</div><div class='del'>-	.set_parent = _clk_periph_apm_set_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk cpu_clk = {</div><div class='del'>-	.parent = &amp;pll1_sw_clk,</div><div class='del'>-	.get_rate = clk_cpu_get_rate,</div><div class='del'>-	.set_rate = clk_cpu_set_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ahb_clk = {</div><div class='del'>-	.parent = &amp;main_bus_clk,</div><div class='del'>-	.get_rate = clk_ahb_get_rate,</div><div class='del'>-	.set_rate = _clk_ahb_set_rate,</div><div class='del'>-	.round_rate = _clk_ahb_round_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk iim_clk = {</div><div class='del'>-	.parent = &amp;ipg_clk,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR0,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG15_OFFSET,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Main IP interface clock for access to registers */</div><div class='del'>-static struct clk ipg_clk = {</div><div class='del'>-	.parent = &amp;ahb_clk,</div><div class='del'>-	.get_rate = clk_ipg_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ipg_perclk = {</div><div class='del'>-	.parent = &amp;lp_apm_clk,</div><div class='del'>-	.get_rate = clk_ipg_per_get_rate,</div><div class='del'>-	.set_parent = _clk_ipg_per_set_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ahb_max_clk = {</div><div class='del'>-	.parent = &amp;ahb_clk,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR0,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG14_OFFSET,</div><div class='del'>-	.enable = _clk_max_enable,</div><div class='del'>-	.disable = _clk_max_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk aips_tz1_clk = {</div><div class='del'>-	.parent = &amp;ahb_clk,</div><div class='del'>-	.secondary = &amp;ahb_max_clk,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR0,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG12_OFFSET,</div><div class='del'>-	.enable = _clk_ccgr_enable,</div><div class='del'>-	.disable = _clk_ccgr_disable_inwait,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk aips_tz2_clk = {</div><div class='del'>-	.parent = &amp;ahb_clk,</div><div class='del'>-	.secondary = &amp;ahb_max_clk,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR0,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG13_OFFSET,</div><div class='del'>-	.enable = _clk_ccgr_enable,</div><div class='del'>-	.disable = _clk_ccgr_disable_inwait,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk gpc_dvfs_clk = {</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR5,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG12_OFFSET,</div><div class='del'>-	.enable = _clk_ccgr_enable,</div><div class='del'>-	.disable = _clk_ccgr_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk gpt_32k_clk = {</div><div class='del'>-	.id = 0,</div><div class='del'>-	.parent = &amp;ckil_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk dummy_clk = {</div><div class='del'>-	.id = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk emi_slow_clk = {</div><div class='del'>-	.parent = &amp;pll2_sw_clk,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR5,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG8_OFFSET,</div><div class='del'>-	.enable = _clk_ccgr_enable,</div><div class='del'>-	.disable = _clk_ccgr_disable_inwait,</div><div class='del'>-	.get_rate = clk_emi_slow_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int clk_ipu_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	_clk_ccgr_enable(clk);</div><div class='del'>-</div><div class='del'>-	/* Enable handshake with IPU when certain clock rates are changed */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CCDR);</div><div class='del'>-	reg &amp;= ~MXC_CCM_CCDR_IPU_HS_MASK;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CCDR);</div><div class='del'>-</div><div class='del'>-	/* Enable handshake with IPU when LPM is entered */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CLPCR);</div><div class='del'>-	reg &amp;= ~MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CLPCR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clk_ipu_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	_clk_ccgr_disable(clk);</div><div class='del'>-</div><div class='del'>-	/* Disable handshake with IPU whe dividers are changed */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CCDR);</div><div class='del'>-	reg |= MXC_CCM_CCDR_IPU_HS_MASK;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CCDR);</div><div class='del'>-</div><div class='del'>-	/* Disable handshake with IPU when LPM is entered */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CLPCR);</div><div class='del'>-	reg |= MXC_CCM_CLPCR_BYPASS_IPU_LPM_HS;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CLPCR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk ahbmux1_clk = {</div><div class='del'>-	.parent = &amp;ahb_clk,</div><div class='del'>-	.secondary = &amp;ahb_max_clk,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR0,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG8_OFFSET,</div><div class='del'>-	.enable = _clk_ccgr_enable,</div><div class='del'>-	.disable = _clk_ccgr_disable_inwait,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ipu_sec_clk = {</div><div class='del'>-	.parent = &amp;emi_fast_clk,</div><div class='del'>-	.secondary = &amp;ahbmux1_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ddr_hf_clk = {</div><div class='del'>-	.parent = &amp;pll1_sw_clk,</div><div class='del'>-	.get_rate = _clk_ddr_hf_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ddr_clk = {</div><div class='del'>-	.parent = &amp;ddr_hf_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock definitions for MIPI HSC unit which has been removed</div><div class='del'>- * from documentation, but not from hardware</div><div class='del'>- */</div><div class='del'>-static int _clk_hsc_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	_clk_ccgr_enable(clk);</div><div class='del'>-	/* Handshake with IPU when certain clock rates are changed. */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CCDR);</div><div class='del'>-	reg &amp;= ~MXC_CCM_CCDR_HSC_HS_MASK;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CCDR);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CLPCR);</div><div class='del'>-	reg &amp;= ~MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CLPCR);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _clk_hsc_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	_clk_ccgr_disable(clk);</div><div class='del'>-	/* No handshake with HSC as its not enabled. */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CCDR);</div><div class='del'>-	reg |= MXC_CCM_CCDR_HSC_HS_MASK;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CCDR);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CLPCR);</div><div class='del'>-	reg |= MXC_CCM_CLPCR_BYPASS_HSC_LPM_HS;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CLPCR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk mipi_hsp_clk = {</div><div class='del'>-	.parent = &amp;ipu_clk,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR4,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG6_OFFSET,</div><div class='del'>-	.enable = _clk_hsc_enable,</div><div class='del'>-	.disable = _clk_hsc_disable,</div><div class='del'>-	.secondary = &amp;mipi_hsc1_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define DEFINE_CLOCK_CCGR(name, i, er, es, pfx, p, s)	\</div><div class='del'>-	static struct clk name = {			\</div><div class='del'>-		.id		= i,			\</div><div class='del'>-		.enable_reg	= er,			\</div><div class='del'>-		.enable_shift	= es,			\</div><div class='del'>-		.get_rate	= pfx##_get_rate,	\</div><div class='del'>-		.set_rate	= pfx##_set_rate,	\</div><div class='del'>-		.round_rate	= pfx##_round_rate,	\</div><div class='del'>-		.set_parent	= pfx##_set_parent,	\</div><div class='del'>-		.enable		= _clk_ccgr_enable,	\</div><div class='del'>-		.disable	= _clk_ccgr_disable,	\</div><div class='del'>-		.parent		= p,			\</div><div class='del'>-		.secondary	= s,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define DEFINE_CLOCK_MAX(name, i, er, es, pfx, p, s)	\</div><div class='del'>-	static struct clk name = {			\</div><div class='del'>-		.id		= i,			\</div><div class='del'>-		.enable_reg	= er,			\</div><div class='del'>-		.enable_shift	= es,			\</div><div class='del'>-		.get_rate	= pfx##_get_rate,	\</div><div class='del'>-		.set_rate	= pfx##_set_rate,	\</div><div class='del'>-		.set_parent	= pfx##_set_parent,	\</div><div class='del'>-		.enable		= _clk_max_enable,	\</div><div class='del'>-		.disable	= _clk_max_disable,	\</div><div class='del'>-		.parent		= p,			\</div><div class='del'>-		.secondary	= s,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define CLK_GET_RATE(name, nr, bitsname)				\</div><div class='del'>-static unsigned long clk_##name##_get_rate(struct clk *clk)		\</div><div class='del'>-{									\</div><div class='del'>-	u32 reg, pred, podf;						\</div><div class='del'>-									\</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CSCDR##nr);				\</div><div class='del'>-	pred = (reg &amp; MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PRED_MASK)	\</div><div class='del'>-		&gt;&gt; MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PRED_OFFSET;	\</div><div class='del'>-	podf = (reg &amp; MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PODF_MASK)	\</div><div class='del'>-		&gt;&gt; MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PODF_OFFSET;	\</div><div class='del'>-									\</div><div class='del'>-	return DIV_ROUND_CLOSEST(clk_get_rate(clk-&gt;parent),		\</div><div class='del'>-			(pred + 1) * (podf + 1));			\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define CLK_SET_PARENT(name, nr, bitsname)				\</div><div class='del'>-static int clk_##name##_set_parent(struct clk *clk, struct clk *parent)	\</div><div class='del'>-{									\</div><div class='del'>-	u32 reg, mux;							\</div><div class='del'>-									\</div><div class='del'>-	mux = _get_mux(parent, &amp;pll1_sw_clk, &amp;pll2_sw_clk,		\</div><div class='del'>-			&amp;pll3_sw_clk, &amp;lp_apm_clk);			\</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CSCMR##nr) &amp;				\</div><div class='del'>-		~MXC_CCM_CSCMR##nr##_##bitsname##_CLK_SEL_MASK;		\</div><div class='del'>-	reg |= mux &lt;&lt; MXC_CCM_CSCMR##nr##_##bitsname##_CLK_SEL_OFFSET;	\</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CSCMR##nr);				\</div><div class='del'>-									\</div><div class='del'>-	return 0;							\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define CLK_SET_RATE(name, nr, bitsname)				\</div><div class='del'>-static int clk_##name##_set_rate(struct clk *clk, unsigned long rate)	\</div><div class='del'>-{									\</div><div class='del'>-	u32 reg, div, parent_rate;					\</div><div class='del'>-	u32 pre = 0, post = 0;						\</div><div class='del'>-									\</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);			\</div><div class='del'>-	div = parent_rate / rate;					\</div><div class='del'>-									\</div><div class='del'>-	if ((parent_rate / div) != rate)				\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-									\</div><div class='del'>-	__calc_pre_post_dividers(div, &amp;pre, &amp;post,			\</div><div class='del'>-		(MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PRED_MASK &gt;&gt;	\</div><div class='del'>-		MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PRED_OFFSET) + 1,	\</div><div class='del'>-		(MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PODF_MASK &gt;&gt;	\</div><div class='del'>-		MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PODF_OFFSET) + 1);\</div><div class='del'>-									\</div><div class='del'>-	/* Set sdhc1 clock divider */					\</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CSCDR##nr) &amp;				\</div><div class='del'>-		~(MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PRED_MASK	\</div><div class='del'>-		| MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PODF_MASK);	\</div><div class='del'>-	reg |= (post - 1) &lt;&lt;						\</div><div class='del'>-		MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PODF_OFFSET;	\</div><div class='del'>-	reg |= (pre - 1) &lt;&lt;						\</div><div class='del'>-		MXC_CCM_CSCDR##nr##_##bitsname##_CLK_PRED_OFFSET;	\</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CSCDR##nr);				\</div><div class='del'>-									\</div><div class='del'>-	return 0;							\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* UART */</div><div class='del'>-CLK_GET_RATE(uart, 1, UART)</div><div class='del'>-CLK_SET_PARENT(uart, 1, UART)</div><div class='del'>-</div><div class='del'>-static struct clk uart_root_clk = {</div><div class='del'>-	.parent = &amp;pll2_sw_clk,</div><div class='del'>-	.get_rate = clk_uart_get_rate,</div><div class='del'>-	.set_parent = clk_uart_set_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* USBOH3 */</div><div class='del'>-CLK_GET_RATE(usboh3, 1, USBOH3)</div><div class='del'>-CLK_SET_PARENT(usboh3, 1, USBOH3)</div><div class='del'>-</div><div class='del'>-static struct clk usboh3_clk = {</div><div class='del'>-	.parent = &amp;pll2_sw_clk,</div><div class='del'>-	.get_rate = clk_usboh3_get_rate,</div><div class='del'>-	.set_parent = clk_usboh3_set_parent,</div><div class='del'>-	.enable = _clk_ccgr_enable,</div><div class='del'>-	.disable = _clk_ccgr_disable,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR2,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG14_OFFSET,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk usb_ahb_clk = {</div><div class='del'>-	.parent = &amp;ipg_clk,</div><div class='del'>-	.enable = _clk_ccgr_enable,</div><div class='del'>-	.disable = _clk_ccgr_disable,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR2,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG13_OFFSET,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int clk_usb_phy1_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CSCMR1) &amp; ~MXC_CCM_CSCMR1_USB_PHY_CLK_SEL;</div><div class='del'>-</div><div class='del'>-	if (parent == &amp;pll3_sw_clk)</div><div class='del'>-		reg |= 1 &lt;&lt; MXC_CCM_CSCMR1_USB_PHY_CLK_SEL_OFFSET;</div><div class='del'>-</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CSCMR1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk usb_phy1_clk = {</div><div class='del'>-	.parent = &amp;pll3_sw_clk,</div><div class='del'>-	.set_parent = clk_usb_phy1_set_parent,</div><div class='del'>-	.enable = _clk_ccgr_enable,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR2,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG0_OFFSET,</div><div class='del'>-	.disable = _clk_ccgr_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* eCSPI */</div><div class='del'>-CLK_GET_RATE(ecspi, 2, CSPI)</div><div class='del'>-CLK_SET_PARENT(ecspi, 1, CSPI)</div><div class='del'>-</div><div class='del'>-static struct clk ecspi_main_clk = {</div><div class='del'>-	.parent = &amp;pll3_sw_clk,</div><div class='del'>-	.get_rate = clk_ecspi_get_rate,</div><div class='del'>-	.set_parent = clk_ecspi_set_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* eSDHC */</div><div class='del'>-CLK_GET_RATE(esdhc1, 1, ESDHC1_MSHC1)</div><div class='del'>-CLK_SET_PARENT(esdhc1, 1, ESDHC1_MSHC1)</div><div class='del'>-CLK_SET_RATE(esdhc1, 1, ESDHC1_MSHC1)</div><div class='del'>-</div><div class='del'>-/* mx51 specific */</div><div class='del'>-CLK_GET_RATE(esdhc2, 1, ESDHC2_MSHC2)</div><div class='del'>-CLK_SET_PARENT(esdhc2, 1, ESDHC2_MSHC2)</div><div class='del'>-CLK_SET_RATE(esdhc2, 1, ESDHC2_MSHC2)</div><div class='del'>-</div><div class='del'>-static int clk_esdhc3_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CSCMR1);</div><div class='del'>-	if (parent == &amp;esdhc1_clk)</div><div class='del'>-		reg &amp;= ~MXC_CCM_CSCMR1_ESDHC3_CLK_SEL;</div><div class='del'>-	else if (parent == &amp;esdhc2_clk)</div><div class='del'>-		reg |= MXC_CCM_CSCMR1_ESDHC3_CLK_SEL;</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CSCMR1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int clk_esdhc4_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CSCMR1);</div><div class='del'>-	if (parent == &amp;esdhc1_clk)</div><div class='del'>-		reg &amp;= ~MXC_CCM_CSCMR1_ESDHC4_CLK_SEL;</div><div class='del'>-	else if (parent == &amp;esdhc2_clk)</div><div class='del'>-		reg |= MXC_CCM_CSCMR1_ESDHC4_CLK_SEL;</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CSCMR1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* mx53 specific */</div><div class='del'>-static int clk_esdhc2_mx53_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CSCMR1);</div><div class='del'>-	if (parent == &amp;esdhc1_clk)</div><div class='del'>-		reg &amp;= ~MXC_CCM_CSCMR1_ESDHC2_MSHC2_MX53_CLK_SEL;</div><div class='del'>-	else if (parent == &amp;esdhc3_mx53_clk)</div><div class='del'>-		reg |= MXC_CCM_CSCMR1_ESDHC2_MSHC2_MX53_CLK_SEL;</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CSCMR1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-CLK_GET_RATE(esdhc3_mx53, 1, ESDHC3_MX53)</div><div class='del'>-CLK_SET_PARENT(esdhc3_mx53, 1, ESDHC3_MX53)</div><div class='del'>-CLK_SET_RATE(esdhc3_mx53, 1, ESDHC3_MX53)</div><div class='del'>-</div><div class='del'>-static int clk_esdhc4_mx53_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CSCMR1);</div><div class='del'>-	if (parent == &amp;esdhc1_clk)</div><div class='del'>-		reg &amp;= ~MXC_CCM_CSCMR1_ESDHC4_CLK_SEL;</div><div class='del'>-	else if (parent == &amp;esdhc3_mx53_clk)</div><div class='del'>-		reg |= MXC_CCM_CSCMR1_ESDHC4_CLK_SEL;</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CSCMR1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define DEFINE_CLOCK_FULL(name, i, er, es, gr, sr, e, d, p, s)		\</div><div class='del'>-	static struct clk name = {					\</div><div class='del'>-		.id		= i,					\</div><div class='del'>-		.enable_reg	= er,					\</div><div class='del'>-		.enable_shift	= es,					\</div><div class='del'>-		.get_rate	= gr,					\</div><div class='del'>-		.set_rate	= sr,					\</div><div class='del'>-		.enable		= e,					\</div><div class='del'>-		.disable	= d,					\</div><div class='del'>-		.parent		= p,					\</div><div class='del'>-		.secondary	= s,					\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s)			\</div><div class='del'>-	DEFINE_CLOCK_FULL(name, i, er, es, gr, sr, _clk_ccgr_enable, _clk_ccgr_disable, p, s)</div><div class='del'>-</div><div class='del'>-/* Shared peripheral bus arbiter */</div><div class='del'>-DEFINE_CLOCK(spba_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG0_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;ipg_clk, NULL);</div><div class='del'>-</div><div class='del'>-/* UART */</div><div class='del'>-DEFINE_CLOCK(uart1_ipg_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG3_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;ipg_clk, &amp;aips_tz1_clk);</div><div class='del'>-DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;ipg_clk, &amp;aips_tz1_clk);</div><div class='del'>-DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;ipg_clk, &amp;spba_clk);</div><div class='del'>-DEFINE_CLOCK(uart4_ipg_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG4_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;ipg_clk, &amp;spba_clk);</div><div class='del'>-DEFINE_CLOCK(uart5_ipg_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG6_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;ipg_clk, &amp;spba_clk);</div><div class='del'>-DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;uart_root_clk, &amp;uart1_ipg_clk);</div><div class='del'>-DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;uart_root_clk, &amp;uart2_ipg_clk);</div><div class='del'>-DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;uart_root_clk, &amp;uart3_ipg_clk);</div><div class='del'>-DEFINE_CLOCK(uart4_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG5_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;uart_root_clk, &amp;uart4_ipg_clk);</div><div class='del'>-DEFINE_CLOCK(uart5_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG7_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;uart_root_clk, &amp;uart5_ipg_clk);</div><div class='del'>-</div><div class='del'>-/* GPT */</div><div class='del'>-DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;ipg_clk, NULL);</div><div class='del'>-DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;ipg_clk, &amp;gpt_ipg_clk);</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET,</div><div class='del'>-	NULL, NULL, &amp;ipg_perclk, NULL);</div><div class='del'>-DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET,</div><div class='del'>-	NULL, NULL, &amp;ipg_perclk, NULL);</div><div class='del'>-</div><div class='del'>-/* I2C */</div><div class='del'>-DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET,</div><div class='del'>-	NULL, NULL, &amp;ipg_perclk, NULL);</div><div class='del'>-DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET,</div><div class='del'>-	NULL, NULL, &amp;ipg_perclk, NULL);</div><div class='del'>-DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET,</div><div class='del'>-	NULL, NULL, &amp;ipg_clk, NULL);</div><div class='del'>-DEFINE_CLOCK(i2c3_mx53_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET,</div><div class='del'>-	NULL, NULL, &amp;ipg_perclk, NULL);</div><div class='del'>-</div><div class='del'>-/* FEC */</div><div class='del'>-DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET,</div><div class='del'>-	NULL,  NULL, &amp;ipg_clk, NULL);</div><div class='del'>-</div><div class='del'>-/* NFC */</div><div class='del'>-DEFINE_CLOCK_CCGR(nfc_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG10_OFFSET,</div><div class='del'>-	clk_nfc, &amp;emi_slow_clk, NULL);</div><div class='del'>-</div><div class='del'>-/* SSI */</div><div class='del'>-DEFINE_CLOCK(ssi1_ipg_clk, 0, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG8_OFFSET,</div><div class='del'>-	NULL, NULL, &amp;ipg_clk, NULL);</div><div class='del'>-DEFINE_CLOCK(ssi1_clk, 0, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG9_OFFSET,</div><div class='del'>-	NULL, NULL, &amp;pll3_sw_clk, &amp;ssi1_ipg_clk);</div><div class='del'>-DEFINE_CLOCK(ssi2_ipg_clk, 1, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG10_OFFSET,</div><div class='del'>-	NULL, NULL, &amp;ipg_clk, NULL);</div><div class='del'>-DEFINE_CLOCK(ssi2_clk, 1, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG11_OFFSET,</div><div class='del'>-	NULL, NULL, &amp;pll3_sw_clk, &amp;ssi2_ipg_clk);</div><div class='del'>-DEFINE_CLOCK(ssi3_ipg_clk, 2, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG12_OFFSET,</div><div class='del'>-	NULL, NULL, &amp;ipg_clk, NULL);</div><div class='del'>-DEFINE_CLOCK(ssi3_clk, 2, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG13_OFFSET,</div><div class='del'>-	NULL, NULL, &amp;pll3_sw_clk, &amp;ssi3_ipg_clk);</div><div class='del'>-</div><div class='del'>-/* eCSPI */</div><div class='del'>-DEFINE_CLOCK_FULL(ecspi1_ipg_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG9_OFFSET,</div><div class='del'>-		NULL, NULL, _clk_ccgr_enable_inrun, _clk_ccgr_disable,</div><div class='del'>-		&amp;ipg_clk, &amp;spba_clk);</div><div class='del'>-DEFINE_CLOCK(ecspi1_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG10_OFFSET,</div><div class='del'>-		NULL, NULL, &amp;ecspi_main_clk, &amp;ecspi1_ipg_clk);</div><div class='del'>-DEFINE_CLOCK_FULL(ecspi2_ipg_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG11_OFFSET,</div><div class='del'>-		NULL, NULL, _clk_ccgr_enable_inrun, _clk_ccgr_disable,</div><div class='del'>-		&amp;ipg_clk, &amp;aips_tz2_clk);</div><div class='del'>-DEFINE_CLOCK(ecspi2_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG12_OFFSET,</div><div class='del'>-		NULL, NULL, &amp;ecspi_main_clk, &amp;ecspi2_ipg_clk);</div><div class='del'>-</div><div class='del'>-/* CSPI */</div><div class='del'>-DEFINE_CLOCK(cspi_ipg_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG9_OFFSET,</div><div class='del'>-		NULL, NULL, &amp;ipg_clk, &amp;aips_tz2_clk);</div><div class='del'>-DEFINE_CLOCK(cspi_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG13_OFFSET,</div><div class='del'>-		NULL, NULL, &amp;ipg_clk, &amp;cspi_ipg_clk);</div><div class='del'>-</div><div class='del'>-/* SDMA */</div><div class='del'>-DEFINE_CLOCK(sdma_clk, 1, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG15_OFFSET,</div><div class='del'>-		NULL, NULL, &amp;ahb_clk, NULL);</div><div class='del'>-</div><div class='del'>-/* eSDHC */</div><div class='del'>-DEFINE_CLOCK_FULL(esdhc1_ipg_clk, 0, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG0_OFFSET,</div><div class='del'>-	NULL,  NULL, _clk_max_enable, _clk_max_disable, &amp;ipg_clk, NULL);</div><div class='del'>-DEFINE_CLOCK_MAX(esdhc1_clk, 0, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG1_OFFSET,</div><div class='del'>-	clk_esdhc1, &amp;pll2_sw_clk, &amp;esdhc1_ipg_clk);</div><div class='del'>-DEFINE_CLOCK_FULL(esdhc2_ipg_clk, 1, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG2_OFFSET,</div><div class='del'>-	NULL,  NULL, _clk_max_enable, _clk_max_disable, &amp;ipg_clk, NULL);</div><div class='del'>-DEFINE_CLOCK_FULL(esdhc3_ipg_clk, 2, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG4_OFFSET,</div><div class='del'>-	NULL,  NULL, _clk_max_enable, _clk_max_disable, &amp;ipg_clk, NULL);</div><div class='del'>-DEFINE_CLOCK_FULL(esdhc4_ipg_clk, 3, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG6_OFFSET,</div><div class='del'>-	NULL,  NULL, _clk_max_enable, _clk_max_disable, &amp;ipg_clk, NULL);</div><div class='del'>-</div><div class='del'>-/* mx51 specific */</div><div class='del'>-DEFINE_CLOCK_MAX(esdhc2_clk, 1, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG3_OFFSET,</div><div class='del'>-	clk_esdhc2, &amp;pll2_sw_clk, &amp;esdhc2_ipg_clk);</div><div class='del'>-</div><div class='del'>-static struct clk esdhc3_clk = {</div><div class='del'>-	.id = 2,</div><div class='del'>-	.parent = &amp;esdhc1_clk,</div><div class='del'>-	.set_parent = clk_esdhc3_set_parent,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR3,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG5_OFFSET,</div><div class='del'>-	.enable  = _clk_max_enable,</div><div class='del'>-	.disable = _clk_max_disable,</div><div class='del'>-	.secondary = &amp;esdhc3_ipg_clk,</div><div class='del'>-};</div><div class='del'>-static struct clk esdhc4_clk = {</div><div class='del'>-	.id = 3,</div><div class='del'>-	.parent = &amp;esdhc1_clk,</div><div class='del'>-	.set_parent = clk_esdhc4_set_parent,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR3,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG7_OFFSET,</div><div class='del'>-	.enable  = _clk_max_enable,</div><div class='del'>-	.disable = _clk_max_disable,</div><div class='del'>-	.secondary = &amp;esdhc4_ipg_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mx53 specific */</div><div class='del'>-static struct clk esdhc2_mx53_clk = {</div><div class='del'>-	.id = 2,</div><div class='del'>-	.parent = &amp;esdhc1_clk,</div><div class='del'>-	.set_parent = clk_esdhc2_mx53_set_parent,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR3,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG3_OFFSET,</div><div class='del'>-	.enable  = _clk_max_enable,</div><div class='del'>-	.disable = _clk_max_disable,</div><div class='del'>-	.secondary = &amp;esdhc3_ipg_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK_MAX(esdhc3_mx53_clk, 2, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG5_OFFSET,</div><div class='del'>-	clk_esdhc3_mx53, &amp;pll2_sw_clk, &amp;esdhc2_ipg_clk);</div><div class='del'>-</div><div class='del'>-static struct clk esdhc4_mx53_clk = {</div><div class='del'>-	.id = 3,</div><div class='del'>-	.parent = &amp;esdhc1_clk,</div><div class='del'>-	.set_parent = clk_esdhc4_mx53_set_parent,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR3,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG7_OFFSET,</div><div class='del'>-	.enable  = _clk_max_enable,</div><div class='del'>-	.disable = _clk_max_disable,</div><div class='del'>-	.secondary = &amp;esdhc4_ipg_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk sata_clk = {</div><div class='del'>-	.parent = &amp;ipg_clk,</div><div class='del'>-	.enable = _clk_max_enable,</div><div class='del'>-	.enable_reg = MXC_CCM_CCGR4,</div><div class='del'>-	.enable_shift = MXC_CCM_CCGRx_CG1_OFFSET,</div><div class='del'>-	.disable = _clk_max_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ahci_phy_clk = {</div><div class='del'>-	.parent = &amp;usb_phy1_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk ahci_dma_clk = {</div><div class='del'>-	.parent = &amp;ahb_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(mipi_esc_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG5_OFFSET, NULL, NULL, NULL, &amp;pll2_sw_clk);</div><div class='del'>-DEFINE_CLOCK(mipi_hsc2_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG4_OFFSET, NULL, NULL, &amp;mipi_esc_clk, &amp;pll2_sw_clk);</div><div class='del'>-DEFINE_CLOCK(mipi_hsc1_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG3_OFFSET, NULL, NULL, &amp;mipi_hsc2_clk, &amp;pll2_sw_clk);</div><div class='del'>-</div><div class='del'>-/* IPU */</div><div class='del'>-DEFINE_CLOCK_FULL(ipu_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG5_OFFSET,</div><div class='del'>-	NULL,  NULL, clk_ipu_enable, clk_ipu_disable, &amp;ahb_clk, &amp;ipu_sec_clk);</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK_FULL(emi_fast_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG7_OFFSET,</div><div class='del'>-		NULL, NULL, _clk_ccgr_enable, _clk_ccgr_disable_inwait,</div><div class='del'>-		&amp;ddr_clk, NULL);</div><div class='del'>-</div><div class='del'>-DEFINE_CLOCK(ipu_di0_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG5_OFFSET,</div><div class='del'>-		NULL, NULL, &amp;pll3_sw_clk, NULL);</div><div class='del'>-DEFINE_CLOCK(ipu_di1_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG6_OFFSET,</div><div class='del'>-		NULL, NULL, &amp;pll3_sw_clk, NULL);</div><div class='del'>-</div><div class='del'>-/* PATA */</div><div class='del'>-DEFINE_CLOCK(pata_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG0_OFFSET,</div><div class='del'>-		NULL, NULL, &amp;ipg_clk, &amp;spba_clk);</div><div class='del'>-</div><div class='del'>-#define _REGISTER_CLOCK(d, n, c) \</div><div class='del'>-       { \</div><div class='del'>-		.dev_id = d, \</div><div class='del'>-		.con_id = n, \</div><div class='del'>-		.clk = &amp;c,   \</div><div class='del'>-       },</div><div class='del'>-</div><div class='del'>-static struct clk_lookup mx51_lookups[] = {</div><div class='del'>-	/* i.mx51 has the i.mx21 type uart */</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt", gpt_clk)</div><div class='del'>-	/* i.mx51 has the i.mx27 type fec */</div><div class='del'>-	_REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.2", NULL, hsi2c_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.0", "usb", usboh3_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_ahb_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.0", "usb_phy1", usb_phy1_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.1", "usb", usboh3_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_ahb_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.2", "usb", usboh3_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_ahb_clk)</div><div class='del'>-	_REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk)</div><div class='del'>-	_REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-keypad", NULL, dummy_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxc_nand", NULL, nfc_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)</div><div class='del'>-	/* i.mx51 has the i.mx35 type sdma */</div><div class='del'>-	_REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "ckih", ckih_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "ckih2", ckih2_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt_32k", gpt_32k_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk)</div><div class='del'>-	/* i.mx51 has the i.mx35 type cspi */</div><div class='del'>-	_REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx51.0", NULL, esdhc1_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx51.1", NULL, esdhc2_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx51.2", NULL, esdhc3_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx51.3", NULL, esdhc4_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "cpu_clk", cpu_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "iim_clk", iim_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "mipi_hsp", mipi_hsp_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk)</div><div class='del'>-	_REGISTER_CLOCK("pata_imx", NULL, pata_clk)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk_lookup mx53_lookups[] = {</div><div class='del'>-	/* i.mx53 has the i.mx21 type uart */</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.0", NULL, uart1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.1", NULL, uart2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.2", NULL, uart3_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.3", NULL, uart4_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx21-uart.4", NULL, uart5_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "gpt", gpt_clk)</div><div class='del'>-	/* i.mx53 has the i.mx25 type fec */</div><div class='del'>-	_REGISTER_CLOCK("imx25-fec.0", NULL, fec_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "iim_clk", iim_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_mx53_clk)</div><div class='del'>-	/* i.mx53 has the i.mx51 type ecspi */</div><div class='del'>-	_REGISTER_CLOCK("imx51-ecspi.0", NULL, ecspi1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx51-ecspi.1", NULL, ecspi2_clk)</div><div class='del'>-	/* i.mx53 has the i.mx25 type cspi */</div><div class='del'>-	_REGISTER_CLOCK("imx35-cspi.0", NULL, cspi_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx53.0", NULL, esdhc1_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx53.1", NULL, esdhc2_mx53_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx53.2", NULL, esdhc3_mx53_clk)</div><div class='del'>-	_REGISTER_CLOCK("sdhci-esdhc-imx53.3", NULL, esdhc4_mx53_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk)</div><div class='del'>-	/* i.mx53 has the i.mx35 type sdma */</div><div class='del'>-	_REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx-keypad", NULL, dummy_clk)</div><div class='del'>-	_REGISTER_CLOCK("pata_imx", NULL, pata_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx53-ahci.0", "ahci", sata_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx53-ahci.0", "ahci_phy", ahci_phy_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx53-ahci.0", "ahci_dma", ahci_dma_clk)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void clk_tree_init(void)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	ipg_perclk.set_parent(&amp;ipg_perclk, &amp;lp_apm_clk);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialise the IPG PER CLK dividers to 3. IPG_PER_CLK should be at</div><div class='del'>-	 * 8MHz, its derived from lp_apm.</div><div class='del'>-	 *</div><div class='del'>-	 * FIXME: Verify if true for all boards</div><div class='del'>-	 */</div><div class='del'>-	reg = __raw_readl(MXC_CCM_CBCDR);</div><div class='del'>-	reg &amp;= ~MXC_CCM_CBCDR_PERCLK_PRED1_MASK;</div><div class='del'>-	reg &amp;= ~MXC_CCM_CBCDR_PERCLK_PRED2_MASK;</div><div class='del'>-	reg &amp;= ~MXC_CCM_CBCDR_PERCLK_PODF_MASK;</div><div class='del'>-	reg |= (2 &lt;&lt; MXC_CCM_CBCDR_PERCLK_PRED1_OFFSET);</div><div class='del'>-	__raw_writel(reg, MXC_CCM_CBCDR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,</div><div class='del'>-			unsigned long ckih1, unsigned long ckih2)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	external_low_reference = ckil;</div><div class='del'>-	external_high_reference = ckih1;</div><div class='del'>-	ckih2_reference = ckih2;</div><div class='del'>-	oscillator_reference = osc;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(mx51_lookups); i++)</div><div class='del'>-		clkdev_add(&amp;mx51_lookups[i]);</div><div class='del'>-</div><div class='del'>-	clk_tree_init();</div><div class='del'>-</div><div class='del'>-	clk_enable(&amp;cpu_clk);</div><div class='del'>-	clk_enable(&amp;main_bus_clk);</div><div class='del'>-</div><div class='del'>-	clk_enable(&amp;iim_clk);</div><div class='del'>-	imx_print_silicon_rev("i.MX51", mx51_revision());</div><div class='del'>-	clk_disable(&amp;iim_clk);</div><div class='del'>-</div><div class='del'>-	/* move usb_phy_clk to 24MHz */</div><div class='del'>-	clk_set_parent(&amp;usb_phy1_clk, &amp;osc_clk);</div><div class='del'>-</div><div class='del'>-	/* set the usboh3_clk parent to pll2_sw_clk */</div><div class='del'>-	clk_set_parent(&amp;usboh3_clk, &amp;pll2_sw_clk);</div><div class='del'>-</div><div class='del'>-	/* Set SDHC parents to be PLL2 */</div><div class='del'>-	clk_set_parent(&amp;esdhc1_clk, &amp;pll2_sw_clk);</div><div class='del'>-	clk_set_parent(&amp;esdhc2_clk, &amp;pll2_sw_clk);</div><div class='del'>-</div><div class='del'>-	/* set SDHC root clock as 166.25MHZ*/</div><div class='del'>-	clk_set_rate(&amp;esdhc1_clk, 166250000);</div><div class='del'>-	clk_set_rate(&amp;esdhc2_clk, 166250000);</div><div class='del'>-</div><div class='del'>-	/* System timer */</div><div class='del'>-	mxc_timer_init(&amp;gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR),</div><div class='del'>-		MX51_INT_GPT);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,</div><div class='del'>-			unsigned long ckih1, unsigned long ckih2)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	external_low_reference = ckil;</div><div class='del'>-	external_high_reference = ckih1;</div><div class='del'>-	ckih2_reference = ckih2;</div><div class='del'>-	oscillator_reference = osc;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(mx53_lookups); i++)</div><div class='del'>-		clkdev_add(&amp;mx53_lookups[i]);</div><div class='del'>-</div><div class='del'>-	clk_tree_init();</div><div class='del'>-</div><div class='del'>-	clk_set_parent(&amp;uart_root_clk, &amp;pll3_sw_clk);</div><div class='del'>-	clk_enable(&amp;cpu_clk);</div><div class='del'>-	clk_enable(&amp;main_bus_clk);</div><div class='del'>-</div><div class='del'>-	clk_enable(&amp;iim_clk);</div><div class='del'>-	imx_print_silicon_rev("i.MX53", mx53_revision());</div><div class='del'>-	clk_disable(&amp;iim_clk);</div><div class='del'>-</div><div class='del'>-	/* Set SDHC parents to be PLL2 */</div><div class='del'>-	clk_set_parent(&amp;esdhc1_clk, &amp;pll2_sw_clk);</div><div class='del'>-	clk_set_parent(&amp;esdhc3_mx53_clk, &amp;pll2_sw_clk);</div><div class='del'>-</div><div class='del'>-	/* set SDHC root clock as 200MHZ*/</div><div class='del'>-	clk_set_rate(&amp;esdhc1_clk, 200000000);</div><div class='del'>-	clk_set_rate(&amp;esdhc3_mx53_clk, 200000000);</div><div class='del'>-</div><div class='del'>-	/* System timer */</div><div class='del'>-	mxc_timer_init(&amp;gpt_clk, MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR),</div><div class='del'>-		MX53_INT_GPT);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_OF</div><div class='del'>-static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc,</div><div class='del'>-				   unsigned long *ckih1, unsigned long *ckih2)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np;</div><div class='del'>-</div><div class='del'>-	/* retrieve the freqency of fixed clocks from device tree */</div><div class='del'>-	for_each_compatible_node(np, NULL, "fixed-clock") {</div><div class='del'>-		u32 rate;</div><div class='del'>-		if (of_property_read_u32(np, "clock-frequency", &amp;rate))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (of_device_is_compatible(np, "fsl,imx-ckil"))</div><div class='del'>-			*ckil = rate;</div><div class='del'>-		else if (of_device_is_compatible(np, "fsl,imx-osc"))</div><div class='del'>-			*osc = rate;</div><div class='del'>-		else if (of_device_is_compatible(np, "fsl,imx-ckih1"))</div><div class='del'>-			*ckih1 = rate;</div><div class='del'>-		else if (of_device_is_compatible(np, "fsl,imx-ckih2"))</div><div class='del'>-			*ckih2 = rate;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init mx51_clocks_init_dt(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long ckil, osc, ckih1, ckih2;</div><div class='del'>-</div><div class='del'>-	clk_get_freq_dt(&amp;ckil, &amp;osc, &amp;ckih1, &amp;ckih2);</div><div class='del'>-	return mx51_clocks_init(ckil, osc, ckih1, ckih2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init mx53_clocks_init_dt(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long ckil, osc, ckih1, ckih2;</div><div class='del'>-</div><div class='del'>-	clk_get_freq_dt(&amp;ckil, &amp;osc, &amp;ckih1, &amp;ckih2);</div><div class='del'>-	return mx53_clocks_init(ckil, osc, ckih1, ckih2);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c<br/>index aa15c517d06e..8eb15a2fcaf9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/cpu-imx5.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/cpu-imx5.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/cpu-imx5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/cpu-imx5.c</a></div><div class='hunk'>@@ -62,11 +62,8 @@ EXPORT_SYMBOL(mx51_revision);</div><div class='ctx'>  * Dependent on link order - so the assumption is that vfp_init is called</div><div class='ctx'>  * before us.</div><div class='ctx'>  */</div><div class='del'>-static int __init mx51_neon_fixup(void)</div><div class='add'>+int __init mx51_neon_fixup(void)</div><div class='ctx'> {</div><div class='del'>-	if (!cpu_is_mx51())</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	if (mx51_revision() &lt; IMX_CHIP_REVISION_3_0 &amp;&amp;</div><div class='ctx'> 			(elf_hwcap &amp; HWCAP_NEON)) {</div><div class='ctx'> 		elf_hwcap &amp;= ~HWCAP_NEON;</div><div class='hunk'>@@ -75,7 +72,6 @@ static int __init mx51_neon_fixup(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-late_initcall(mx51_neon_fixup);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static int get_mx53_srev(void)</div><div class='head'>diff --git a/arch/arm/mach-imx/crmregs-imx3.h b/arch/arm/mach-imx/crmregs-imx3.h<br/>index 53141273df45..a1dfde53e335 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/crmregs-imx3.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/crmregs-imx3.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/crmregs-imx3.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/crmregs-imx3.h</a></div><div class='hunk'>@@ -24,48 +24,47 @@</div><div class='ctx'> #define CKIH_CLK_FREQ_27MHZ     27000000</div><div class='ctx'> #define CKIL_CLK_FREQ           32768</div><div class='ctx'> </div><div class='del'>-#define MXC_CCM_BASE		(cpu_is_mx31() ? \</div><div class='del'>-MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR) : MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR))</div><div class='add'>+extern void __iomem *mx3_ccm_base;</div><div class='ctx'> </div><div class='ctx'> /* Register addresses */</div><div class='del'>-#define MXC_CCM_CCMR		(MXC_CCM_BASE + 0x00)</div><div class='del'>-#define MXC_CCM_PDR0		(MXC_CCM_BASE + 0x04)</div><div class='del'>-#define MXC_CCM_PDR1		(MXC_CCM_BASE + 0x08)</div><div class='del'>-#define MX35_CCM_PDR2		(MXC_CCM_BASE + 0x0C)</div><div class='del'>-#define MXC_CCM_RCSR		(MXC_CCM_BASE + 0x0C)</div><div class='del'>-#define MX35_CCM_PDR3		(MXC_CCM_BASE + 0x10)</div><div class='del'>-#define MXC_CCM_MPCTL		(MXC_CCM_BASE + 0x10)</div><div class='del'>-#define MX35_CCM_PDR4		(MXC_CCM_BASE + 0x14)</div><div class='del'>-#define MXC_CCM_UPCTL		(MXC_CCM_BASE + 0x14)</div><div class='del'>-#define MX35_CCM_RCSR		(MXC_CCM_BASE + 0x18)</div><div class='del'>-#define MXC_CCM_SRPCTL		(MXC_CCM_BASE + 0x18)</div><div class='del'>-#define MX35_CCM_MPCTL		(MXC_CCM_BASE + 0x1C)</div><div class='del'>-#define MXC_CCM_COSR		(MXC_CCM_BASE + 0x1C)</div><div class='del'>-#define MX35_CCM_PPCTL		(MXC_CCM_BASE + 0x20)</div><div class='del'>-#define MXC_CCM_CGR0		(MXC_CCM_BASE + 0x20)</div><div class='del'>-#define MX35_CCM_ACMR		(MXC_CCM_BASE + 0x24)</div><div class='del'>-#define MXC_CCM_CGR1		(MXC_CCM_BASE + 0x24)</div><div class='del'>-#define MX35_CCM_COSR		(MXC_CCM_BASE + 0x28)</div><div class='del'>-#define MXC_CCM_CGR2		(MXC_CCM_BASE + 0x28)</div><div class='del'>-#define MX35_CCM_CGR0		(MXC_CCM_BASE + 0x2C)</div><div class='del'>-#define MXC_CCM_WIMR		(MXC_CCM_BASE + 0x2C)</div><div class='del'>-#define MX35_CCM_CGR1		(MXC_CCM_BASE + 0x30)</div><div class='del'>-#define MXC_CCM_LDC		(MXC_CCM_BASE + 0x30)</div><div class='del'>-#define MX35_CCM_CGR2		(MXC_CCM_BASE + 0x34)</div><div class='del'>-#define MXC_CCM_DCVR0		(MXC_CCM_BASE + 0x34)</div><div class='del'>-#define MX35_CCM_CGR3		(MXC_CCM_BASE + 0x38)</div><div class='del'>-#define MXC_CCM_DCVR1		(MXC_CCM_BASE + 0x38)</div><div class='del'>-#define MXC_CCM_DCVR2		(MXC_CCM_BASE + 0x3C)</div><div class='del'>-#define MXC_CCM_DCVR3		(MXC_CCM_BASE + 0x40)</div><div class='del'>-#define MXC_CCM_LTR0		(MXC_CCM_BASE + 0x44)</div><div class='del'>-#define MXC_CCM_LTR1		(MXC_CCM_BASE + 0x48)</div><div class='del'>-#define MXC_CCM_LTR2		(MXC_CCM_BASE + 0x4C)</div><div class='del'>-#define MXC_CCM_LTR3		(MXC_CCM_BASE + 0x50)</div><div class='del'>-#define MXC_CCM_LTBR0		(MXC_CCM_BASE + 0x54)</div><div class='del'>-#define MXC_CCM_LTBR1		(MXC_CCM_BASE + 0x58)</div><div class='del'>-#define MXC_CCM_PMCR0		(MXC_CCM_BASE + 0x5C)</div><div class='del'>-#define MXC_CCM_PMCR1		(MXC_CCM_BASE + 0x60)</div><div class='del'>-#define MXC_CCM_PDR2		(MXC_CCM_BASE + 0x64)</div><div class='add'>+#define MXC_CCM_CCMR		0x00</div><div class='add'>+#define MXC_CCM_PDR0		0x04</div><div class='add'>+#define MXC_CCM_PDR1		0x08</div><div class='add'>+#define MX35_CCM_PDR2		0x0C</div><div class='add'>+#define MXC_CCM_RCSR		0x0C</div><div class='add'>+#define MX35_CCM_PDR3		0x10</div><div class='add'>+#define MXC_CCM_MPCTL		0x10</div><div class='add'>+#define MX35_CCM_PDR4		0x14</div><div class='add'>+#define MXC_CCM_UPCTL		0x14</div><div class='add'>+#define MX35_CCM_RCSR		0x18</div><div class='add'>+#define MXC_CCM_SRPCTL		0x18</div><div class='add'>+#define MX35_CCM_MPCTL		0x1C</div><div class='add'>+#define MXC_CCM_COSR		0x1C</div><div class='add'>+#define MX35_CCM_PPCTL		0x20</div><div class='add'>+#define MXC_CCM_CGR0		0x20</div><div class='add'>+#define MX35_CCM_ACMR		0x24</div><div class='add'>+#define MXC_CCM_CGR1		0x24</div><div class='add'>+#define MX35_CCM_COSR		0x28</div><div class='add'>+#define MXC_CCM_CGR2		0x28</div><div class='add'>+#define MX35_CCM_CGR0		0x2C</div><div class='add'>+#define MXC_CCM_WIMR		0x2C</div><div class='add'>+#define MX35_CCM_CGR1		0x30</div><div class='add'>+#define MXC_CCM_LDC		0x30</div><div class='add'>+#define MX35_CCM_CGR2		0x34</div><div class='add'>+#define MXC_CCM_DCVR0		0x34</div><div class='add'>+#define MX35_CCM_CGR3		0x38</div><div class='add'>+#define MXC_CCM_DCVR1		0x38</div><div class='add'>+#define MXC_CCM_DCVR2		0x3C</div><div class='add'>+#define MXC_CCM_DCVR3		0x40</div><div class='add'>+#define MXC_CCM_LTR0		0x44</div><div class='add'>+#define MXC_CCM_LTR1		0x48</div><div class='add'>+#define MXC_CCM_LTR2		0x4C</div><div class='add'>+#define MXC_CCM_LTR3		0x50</div><div class='add'>+#define MXC_CCM_LTBR0		0x54</div><div class='add'>+#define MXC_CCM_LTBR1		0x58</div><div class='add'>+#define MXC_CCM_PMCR0		0x5C</div><div class='add'>+#define MXC_CCM_PMCR1		0x60</div><div class='add'>+#define MXC_CCM_PDR2		0x64</div><div class='ctx'> </div><div class='ctx'> /* Register bit definitions */</div><div class='ctx'> #define MXC_CCM_CCMR_WBEN                       (1 &lt;&lt; 27)</div><div class='head'>diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c<br/>index 5f2f91d1798b..b46cab0ced53 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/eukrea_mbimx27-baseboard.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/eukrea_mbimx27-baseboard.c</a></div><div class='hunk'>@@ -243,7 +243,7 @@ static const struct imxuart_platform_data uart_pdata __initconst = {</div><div class='ctx'> static void __maybe_unused ads7846_dev_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (gpio_request(ADS7846_PENDOWN, "ADS7846 pendown") &lt; 0) {</div><div class='del'>-		printk(KERN_ERR "can't get ads746 pen down GPIO\n");</div><div class='add'>+		printk(KERN_ERR "can't get ads7846 pen down GPIO\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	gpio_direction_input(ADS7846_PENDOWN);</div><div class='head'>diff --git a/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c<br/>deleted file mode 100644<br/>index a6a3ab8f1b1c..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/eukrea_mbimx51-baseboard.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/eukrea_mbimx51-baseboard.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,206 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 Eric Bénard &lt;eric@eukrea.com&gt;</div><div class='del'>- *</div><div class='del'>- * The code contained herein is licensed under the GNU General Public</div><div class='del'>- * License. You may obtain a copy of the GNU General Public License</div><div class='del'>- * Version 2 or later at the following locations:</div><div class='del'>- *</div><div class='del'>- * http://www.opensource.org/licenses/gpl-license.html</div><div class='del'>- * http://www.gnu.org/copyleft/gpl.html</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/serial_8250.h&gt;</div><div class='del'>-#include &lt;linux/i2c.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/i2c/tsc2007.h&gt;</div><div class='del'>-#include &lt;linux/leds.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/iomux-mx51.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-</div><div class='del'>-#include "devices-imx51.h"</div><div class='del'>-</div><div class='del'>-#define MBIMX51_TSC2007_GPIO	IMX_GPIO_NR(3, 30)</div><div class='del'>-#define MBIMX51_LED0		IMX_GPIO_NR(3, 5)</div><div class='del'>-#define MBIMX51_LED1		IMX_GPIO_NR(3, 6)</div><div class='del'>-#define MBIMX51_LED2		IMX_GPIO_NR(3, 7)</div><div class='del'>-#define MBIMX51_LED3		IMX_GPIO_NR(3, 8)</div><div class='del'>-</div><div class='del'>-static const struct gpio_led mbimx51_leds[] __initconst = {</div><div class='del'>-	{</div><div class='del'>-		.name			= "led0",</div><div class='del'>-		.default_trigger	= "heartbeat",</div><div class='del'>-		.active_low		= 1,</div><div class='del'>-		.gpio			= MBIMX51_LED0,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name			= "led1",</div><div class='del'>-		.default_trigger	= "nand-disk",</div><div class='del'>-		.active_low		= 1,</div><div class='del'>-		.gpio			= MBIMX51_LED1,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name			= "led2",</div><div class='del'>-		.default_trigger	= "mmc0",</div><div class='del'>-		.active_low		= 1,</div><div class='del'>-		.gpio			= MBIMX51_LED2,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name			= "led3",</div><div class='del'>-		.default_trigger	= "default-on",</div><div class='del'>-		.active_low		= 1,</div><div class='del'>-		.gpio			= MBIMX51_LED3,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct gpio_led_platform_data mbimx51_leds_info __initconst = {</div><div class='del'>-	.leds		= mbimx51_leds,</div><div class='del'>-	.num_leds	= ARRAY_SIZE(mbimx51_leds),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static iomux_v3_cfg_t mbimx51_pads[] = {</div><div class='del'>-	/* UART2 */</div><div class='del'>-	MX51_PAD_UART2_RXD__UART2_RXD,</div><div class='del'>-	MX51_PAD_UART2_TXD__UART2_TXD,</div><div class='del'>-</div><div class='del'>-	/* UART3 */</div><div class='del'>-	MX51_PAD_UART3_RXD__UART3_RXD,</div><div class='del'>-	MX51_PAD_UART3_TXD__UART3_TXD,</div><div class='del'>-	MX51_PAD_KEY_COL4__UART3_RTS,</div><div class='del'>-	MX51_PAD_KEY_COL5__UART3_CTS,</div><div class='del'>-</div><div class='del'>-	/* TSC2007 IRQ */</div><div class='del'>-	MX51_PAD_NANDF_D10__GPIO3_30,</div><div class='del'>-</div><div class='del'>-	/* LEDS */</div><div class='del'>-	MX51_PAD_DISPB2_SER_DIN__GPIO3_5,</div><div class='del'>-	MX51_PAD_DISPB2_SER_DIO__GPIO3_6,</div><div class='del'>-	MX51_PAD_DISPB2_SER_CLK__GPIO3_7,</div><div class='del'>-	MX51_PAD_DISPB2_SER_RS__GPIO3_8,</div><div class='del'>-</div><div class='del'>-	/* KPP */</div><div class='del'>-	MX51_PAD_KEY_ROW0__KEY_ROW0,</div><div class='del'>-	MX51_PAD_KEY_ROW1__KEY_ROW1,</div><div class='del'>-	MX51_PAD_KEY_ROW2__KEY_ROW2,</div><div class='del'>-	MX51_PAD_KEY_ROW3__KEY_ROW3,</div><div class='del'>-	MX51_PAD_KEY_COL0__KEY_COL0,</div><div class='del'>-	MX51_PAD_KEY_COL1__KEY_COL1,</div><div class='del'>-	MX51_PAD_KEY_COL2__KEY_COL2,</div><div class='del'>-	MX51_PAD_KEY_COL3__KEY_COL3,</div><div class='del'>-</div><div class='del'>-	/* SD 1 */</div><div class='del'>-	MX51_PAD_SD1_CMD__SD1_CMD,</div><div class='del'>-	MX51_PAD_SD1_CLK__SD1_CLK,</div><div class='del'>-	MX51_PAD_SD1_DATA0__SD1_DATA0,</div><div class='del'>-	MX51_PAD_SD1_DATA1__SD1_DATA1,</div><div class='del'>-	MX51_PAD_SD1_DATA2__SD1_DATA2,</div><div class='del'>-	MX51_PAD_SD1_DATA3__SD1_DATA3,</div><div class='del'>-</div><div class='del'>-	/* SD 2 */</div><div class='del'>-	MX51_PAD_SD2_CMD__SD2_CMD,</div><div class='del'>-	MX51_PAD_SD2_CLK__SD2_CLK,</div><div class='del'>-	MX51_PAD_SD2_DATA0__SD2_DATA0,</div><div class='del'>-	MX51_PAD_SD2_DATA1__SD2_DATA1,</div><div class='del'>-	MX51_PAD_SD2_DATA2__SD2_DATA2,</div><div class='del'>-	MX51_PAD_SD2_DATA3__SD2_DATA3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct imxuart_platform_data uart_pdata __initconst = {</div><div class='del'>-	.flags = IMXUART_HAVE_RTSCTS,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int mbimx51_keymap[] = {</div><div class='del'>-	KEY(0, 0, KEY_1),</div><div class='del'>-	KEY(0, 1, KEY_2),</div><div class='del'>-	KEY(0, 2, KEY_3),</div><div class='del'>-	KEY(0, 3, KEY_UP),</div><div class='del'>-</div><div class='del'>-	KEY(1, 0, KEY_4),</div><div class='del'>-	KEY(1, 1, KEY_5),</div><div class='del'>-	KEY(1, 2, KEY_6),</div><div class='del'>-	KEY(1, 3, KEY_LEFT),</div><div class='del'>-</div><div class='del'>-	KEY(2, 0, KEY_7),</div><div class='del'>-	KEY(2, 1, KEY_8),</div><div class='del'>-	KEY(2, 2, KEY_9),</div><div class='del'>-	KEY(2, 3, KEY_RIGHT),</div><div class='del'>-</div><div class='del'>-	KEY(3, 0, KEY_0),</div><div class='del'>-	KEY(3, 1, KEY_DOWN),</div><div class='del'>-	KEY(3, 2, KEY_ESC),</div><div class='del'>-	KEY(3, 3, KEY_ENTER),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct matrix_keymap_data mbimx51_map_data __initconst = {</div><div class='del'>-	.keymap		= mbimx51_keymap,</div><div class='del'>-	.keymap_size	= ARRAY_SIZE(mbimx51_keymap),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int tsc2007_get_pendown_state(void)</div><div class='del'>-{</div><div class='del'>-	return !gpio_get_value(MBIMX51_TSC2007_GPIO);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct tsc2007_platform_data tsc2007_data = {</div><div class='del'>-	.model = 2007,</div><div class='del'>-	.x_plate_ohms = 180,</div><div class='del'>-	.get_pendown_state = tsc2007_get_pendown_state,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct i2c_board_info mbimx51_i2c_devices[] = {</div><div class='del'>-	{</div><div class='del'>-		I2C_BOARD_INFO("tsc2007", 0x49),</div><div class='del'>-		.irq  = IMX_GPIO_TO_IRQ(MBIMX51_TSC2007_GPIO),</div><div class='del'>-		.platform_data = &amp;tsc2007_data,</div><div class='del'>-	}, {</div><div class='del'>-		I2C_BOARD_INFO("tlv320aic23", 0x1a),</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * baseboard initialization.</div><div class='del'>- */</div><div class='del'>-void __init eukrea_mbimx51_baseboard_init(void)</div><div class='del'>-{</div><div class='del'>-	mxc_iomux_v3_setup_multiple_pads(mbimx51_pads,</div><div class='del'>-					ARRAY_SIZE(mbimx51_pads));</div><div class='del'>-</div><div class='del'>-	imx51_add_imx_uart(1, NULL);</div><div class='del'>-	imx51_add_imx_uart(2, &amp;uart_pdata);</div><div class='del'>-</div><div class='del'>-	gpio_request(MBIMX51_LED0, "LED0");</div><div class='del'>-	gpio_direction_output(MBIMX51_LED0, 1);</div><div class='del'>-	gpio_free(MBIMX51_LED0);</div><div class='del'>-	gpio_request(MBIMX51_LED1, "LED1");</div><div class='del'>-	gpio_direction_output(MBIMX51_LED1, 1);</div><div class='del'>-	gpio_free(MBIMX51_LED1);</div><div class='del'>-	gpio_request(MBIMX51_LED2, "LED2");</div><div class='del'>-	gpio_direction_output(MBIMX51_LED2, 1);</div><div class='del'>-	gpio_free(MBIMX51_LED2);</div><div class='del'>-	gpio_request(MBIMX51_LED3, "LED3");</div><div class='del'>-	gpio_direction_output(MBIMX51_LED3, 1);</div><div class='del'>-	gpio_free(MBIMX51_LED3);</div><div class='del'>-</div><div class='del'>-	gpio_led_register_device(-1, &amp;mbimx51_leds_info);</div><div class='del'>-</div><div class='del'>-	imx51_add_imx_keypad(&amp;mbimx51_map_data);</div><div class='del'>-</div><div class='del'>-	gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq");</div><div class='del'>-	gpio_direction_input(MBIMX51_TSC2007_GPIO);</div><div class='del'>-	irq_set_irq_type(gpio_to_irq(MBIMX51_TSC2007_GPIO),</div><div class='del'>-					IRQF_TRIGGER_FALLING);</div><div class='del'>-	i2c_register_board_info(1, mbimx51_i2c_devices,</div><div class='del'>-				ARRAY_SIZE(mbimx51_i2c_devices));</div><div class='del'>-</div><div class='del'>-	imx51_add_sdhci_esdhc_imx(0, NULL);</div><div class='del'>-	imx51_add_sdhci_esdhc_imx(1, NULL);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c<br/>index 2cf603e11c4f..dfd2da87c2df 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/leds.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='ctx'> #include &lt;video/platform_lcd.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='hunk'>@@ -87,12 +88,22 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {</div><div class='ctx'> 	/* CAN */</div><div class='ctx'> 	MX25_PAD_GPIO_D__CAN2_RX,</div><div class='ctx'> 	MX25_PAD_GPIO_C__CAN2_TX,</div><div class='add'>+	/* SPI1 */</div><div class='add'>+	MX25_PAD_CSPI1_MOSI__CSPI1_MOSI,</div><div class='add'>+	MX25_PAD_CSPI1_MISO__CSPI1_MISO,</div><div class='add'>+	MX25_PAD_CSPI1_SS0__GPIO_1_16,</div><div class='add'>+	MX25_PAD_CSPI1_SS1__GPIO_1_17,</div><div class='add'>+	MX25_PAD_CSPI1_SCLK__CSPI1_SCLK,</div><div class='add'>+	MX25_PAD_CSPI1_RDY__GPIO_2_22,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define GPIO_LED1	83</div><div class='del'>-#define GPIO_SWITCH1	82</div><div class='del'>-#define GPIO_SD1CD	52</div><div class='del'>-#define GPIO_LCDPWR	26</div><div class='add'>+#define GPIO_LED1		IMX_GPIO_NR(3, 19)</div><div class='add'>+#define GPIO_SWITCH1	IMX_GPIO_NR(3, 18)</div><div class='add'>+#define GPIO_SD1CD		IMX_GPIO_NR(2, 20)</div><div class='add'>+#define GPIO_LCDPWR		IMX_GPIO_NR(1, 26)</div><div class='add'>+#define	GPIO_SPI1_SS0	IMX_GPIO_NR(1, 16)</div><div class='add'>+#define	GPIO_SPI1_SS1	IMX_GPIO_NR(1, 17)</div><div class='add'>+#define	GPIO_SPI1_IRQ	IMX_GPIO_NR(2, 22)</div><div class='ctx'> </div><div class='ctx'> static struct imx_fb_videomode eukrea_mximxsd_modes[] = {</div><div class='ctx'> 	{</div><div class='hunk'>@@ -228,6 +239,30 @@ static struct esdhc_platform_data sd1_pdata = {</div><div class='ctx'> 	.wp_type = ESDHC_WP_NONE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct spi_board_info eukrea_mbimxsd25_spi_board_info[] __initdata = {</div><div class='add'>+	{</div><div class='add'>+		.modalias = "spidev",</div><div class='add'>+		.max_speed_hz = 20000000,</div><div class='add'>+		.bus_num = 0,</div><div class='add'>+		.chip_select = 0,</div><div class='add'>+		.mode = SPI_MODE_0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.modalias = "spidev",</div><div class='add'>+		.max_speed_hz = 20000000,</div><div class='add'>+		.bus_num = 0,</div><div class='add'>+		.chip_select = 1,</div><div class='add'>+		.mode = SPI_MODE_0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int eukrea_mbimxsd25_spi_cs[] = {GPIO_SPI1_SS0, GPIO_SPI1_SS1};</div><div class='add'>+</div><div class='add'>+static const struct spi_imx_master eukrea_mbimxsd25_spi0_data __initconst = {</div><div class='add'>+	.chipselect     = eukrea_mbimxsd25_spi_cs,</div><div class='add'>+	.num_chipselect = ARRAY_SIZE(eukrea_mbimxsd25_spi_cs),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * system init for baseboard usage. Will be called by cpuimx25 init.</div><div class='ctx'>  *</div><div class='hunk'>@@ -257,11 +292,17 @@ void __init eukrea_mbimxsd25_baseboard_init(void)</div><div class='ctx'> </div><div class='ctx'> 	gpio_request(GPIO_LCDPWR, "LCDPWR");</div><div class='ctx'> 	gpio_direction_output(GPIO_LCDPWR, 1);</div><div class='del'>-	gpio_free(GPIO_SWITCH1);</div><div class='ctx'> </div><div class='ctx'> 	i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,</div><div class='ctx'> 				ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));</div><div class='ctx'> </div><div class='add'>+	gpio_request(GPIO_SPI1_IRQ, "SPI1_IRQ");</div><div class='add'>+	gpio_direction_input(GPIO_SPI1_IRQ);</div><div class='add'>+	gpio_free(GPIO_SPI1_IRQ);</div><div class='add'>+	imx25_add_spi_imx0(&amp;eukrea_mbimxsd25_spi0_data);</div><div class='add'>+	spi_register_board_info(eukrea_mbimxsd25_spi_board_info,</div><div class='add'>+		ARRAY_SIZE(eukrea_mbimxsd25_spi_board_info));</div><div class='add'>+</div><div class='ctx'> 	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));</div><div class='ctx'> 	gpio_led_register_device(-1, &amp;eukrea_mbimxsd_led_info);</div><div class='ctx'> 	imx_add_gpio_keys(&amp;eukrea_mbimxsd_button_data);</div><div class='head'>diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c<br/>index fd8bf8a425a7..557f6c486053 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/leds.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='ctx'> #include &lt;video/platform_lcd.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -158,12 +159,22 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {</div><div class='ctx'> 	MX35_PAD_SD1_DATA3__ESDHC1_DAT3,</div><div class='ctx'> 	/* SD1 CD */</div><div class='ctx'> 	MX35_PAD_LD18__GPIO3_24,</div><div class='add'>+	/* SPI */</div><div class='add'>+	MX35_PAD_CSPI1_MOSI__CSPI1_MOSI,</div><div class='add'>+	MX35_PAD_CSPI1_MISO__CSPI1_MISO,</div><div class='add'>+	MX35_PAD_CSPI1_SS0__GPIO1_18,</div><div class='add'>+	MX35_PAD_CSPI1_SS1__GPIO1_19,</div><div class='add'>+	MX35_PAD_CSPI1_SCLK__CSPI1_SCLK,</div><div class='add'>+	MX35_PAD_CSPI1_SPI_RDY__GPIO3_5,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define GPIO_LED1	IMX_GPIO_NR(3, 29)</div><div class='ctx'> #define GPIO_SWITCH1	IMX_GPIO_NR(3, 25)</div><div class='ctx'> #define GPIO_LCDPWR	IMX_GPIO_NR(1, 4)</div><div class='ctx'> #define GPIO_SD1CD	IMX_GPIO_NR(3, 24)</div><div class='add'>+#define	GPIO_SPI1_SS0	IMX_GPIO_NR(1, 18)</div><div class='add'>+#define	GPIO_SPI1_SS1	IMX_GPIO_NR(1, 19)</div><div class='add'>+#define	GPIO_SPI1_IRQ	IMX_GPIO_NR(3, 5)</div><div class='ctx'> </div><div class='ctx'> static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,</div><div class='ctx'> 				   unsigned int power)</div><div class='hunk'>@@ -239,6 +250,30 @@ static struct esdhc_platform_data sd1_pdata = {</div><div class='ctx'> 	.wp_type = ESDHC_WP_NONE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct spi_board_info eukrea_mbimxsd35_spi_board_info[] __initdata = {</div><div class='add'>+	{</div><div class='add'>+		.modalias = "spidev",</div><div class='add'>+		.max_speed_hz = 20000000,</div><div class='add'>+		.bus_num = 0,</div><div class='add'>+		.chip_select = 0,</div><div class='add'>+		.mode = SPI_MODE_0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.modalias = "spidev",</div><div class='add'>+		.max_speed_hz = 20000000,</div><div class='add'>+		.bus_num = 0,</div><div class='add'>+		.chip_select = 1,</div><div class='add'>+		.mode = SPI_MODE_0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int eukrea_mbimxsd35_spi_cs[] = {GPIO_SPI1_SS0, GPIO_SPI1_SS1};</div><div class='add'>+</div><div class='add'>+static const struct spi_imx_master eukrea_mbimxsd35_spi0_data __initconst = {</div><div class='add'>+	.chipselect     = eukrea_mbimxsd35_spi_cs,</div><div class='add'>+	.num_chipselect = ARRAY_SIZE(eukrea_mbimxsd35_spi_cs),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * system init for baseboard usage. Will be called by cpuimx35 init.</div><div class='ctx'>  *</div><div class='hunk'>@@ -274,6 +309,13 @@ void __init eukrea_mbimxsd35_baseboard_init(void)</div><div class='ctx'> 	i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,</div><div class='ctx'> 				ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));</div><div class='ctx'> </div><div class='add'>+	gpio_request(GPIO_SPI1_IRQ, "SPI1_IRQ");</div><div class='add'>+	gpio_direction_input(GPIO_SPI1_IRQ);</div><div class='add'>+	gpio_free(GPIO_SPI1_IRQ);</div><div class='add'>+	imx35_add_spi_imx0(&amp;eukrea_mbimxsd35_spi0_data);</div><div class='add'>+	spi_register_board_info(eukrea_mbimxsd35_spi_board_info,</div><div class='add'>+		ARRAY_SIZE(eukrea_mbimxsd35_spi_board_info));</div><div class='add'>+</div><div class='ctx'> 	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));</div><div class='ctx'> 	gpio_led_register_device(-1, &amp;eukrea_mbimxsd_led_info);</div><div class='ctx'> 	imx_add_gpio_keys(&amp;eukrea_mbimxsd_button_data);</div><div class='head'>diff --git a/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c<br/>index aaa592fdb9ce..96a24b73dc23 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c</a></div><div class='hunk'>@@ -28,6 +28,8 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;video/platform_lcd.h&gt;</div><div class='add'>+#include &lt;linux/backlight.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='hunk'>@@ -40,7 +42,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "devices-imx51.h"</div><div class='ctx'> </div><div class='del'>-static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {</div><div class='add'>+static iomux_v3_cfg_t eukrea_mbimxsd51_pads[] = {</div><div class='ctx'> 	/* LED */</div><div class='ctx'> 	MX51_PAD_NANDF_D10__GPIO3_30,</div><div class='ctx'> 	/* SWITCH */</div><div class='hunk'>@@ -66,12 +68,64 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {</div><div class='ctx'> 	NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_PUS_22K_UP |</div><div class='ctx'> 			PAD_CTL_PKE | PAD_CTL_SRE_FAST |</div><div class='ctx'> 			PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),</div><div class='add'>+	/* SSI */</div><div class='add'>+	MX51_PAD_AUD3_BB_TXD__AUD3_TXD,</div><div class='add'>+	MX51_PAD_AUD3_BB_RXD__AUD3_RXD,</div><div class='add'>+	MX51_PAD_AUD3_BB_CK__AUD3_TXC,</div><div class='add'>+	MX51_PAD_AUD3_BB_FS__AUD3_TXFS,</div><div class='add'>+	/* LCD Backlight */</div><div class='add'>+	MX51_PAD_DI1_D1_CS__GPIO3_4,</div><div class='add'>+	/* LCD RST */</div><div class='add'>+	MX51_PAD_CSI1_D9__GPIO3_13,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define GPIO_LED1	IMX_GPIO_NR(3, 30)</div><div class='ctx'> #define GPIO_SWITCH1	IMX_GPIO_NR(3, 31)</div><div class='add'>+#define GPIO_LCDRST	IMX_GPIO_NR(3, 13)</div><div class='add'>+#define GPIO_LCDBL	IMX_GPIO_NR(3, 4)</div><div class='ctx'> </div><div class='del'>-static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = {</div><div class='add'>+static void eukrea_mbimxsd51_lcd_power_set(struct plat_lcd_data *pd,</div><div class='add'>+				   unsigned int power)</div><div class='add'>+{</div><div class='add'>+	if (power)</div><div class='add'>+		gpio_direction_output(GPIO_LCDRST, 1);</div><div class='add'>+	else</div><div class='add'>+		gpio_direction_output(GPIO_LCDRST, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct plat_lcd_data eukrea_mbimxsd51_lcd_power_data = {</div><div class='add'>+	.set_power		= eukrea_mbimxsd51_lcd_power_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device eukrea_mbimxsd51_lcd_powerdev = {</div><div class='add'>+	.name			= "platform-lcd",</div><div class='add'>+	.dev.platform_data	= &amp;eukrea_mbimxsd51_lcd_power_data,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void eukrea_mbimxsd51_bl_set_intensity(int intensity)</div><div class='add'>+{</div><div class='add'>+	if (intensity)</div><div class='add'>+		gpio_direction_output(GPIO_LCDBL, 1);</div><div class='add'>+	else</div><div class='add'>+		gpio_direction_output(GPIO_LCDBL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct generic_bl_info eukrea_mbimxsd51_bl_info = {</div><div class='add'>+	.name			= "eukrea_mbimxsd51-bl",</div><div class='add'>+	.max_intensity		= 0xff,</div><div class='add'>+	.default_intensity	= 0xff,</div><div class='add'>+	.set_bl_intensity	= eukrea_mbimxsd51_bl_set_intensity,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device eukrea_mbimxsd51_bl_dev = {</div><div class='add'>+	.name			= "generic-bl",</div><div class='add'>+	.id			= 1,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;eukrea_mbimxsd51_bl_info,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct gpio_led eukrea_mbimxsd51_leds[] __initconst = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name			= "led1",</div><div class='ctx'> 		.default_trigger	= "heartbeat",</div><div class='hunk'>@@ -81,12 +135,12 @@ static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct gpio_led_platform_data</div><div class='del'>-		eukrea_mbimxsd_led_info __initconst = {</div><div class='del'>-	.leds		= eukrea_mbimxsd_leds,</div><div class='del'>-	.num_leds	= ARRAY_SIZE(eukrea_mbimxsd_leds),</div><div class='add'>+		eukrea_mbimxsd51_led_info __initconst = {</div><div class='add'>+	.leds		= eukrea_mbimxsd51_leds,</div><div class='add'>+	.num_leds	= ARRAY_SIZE(eukrea_mbimxsd51_leds),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {</div><div class='add'>+static struct gpio_keys_button eukrea_mbimxsd51_gpio_buttons[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.gpio		= GPIO_SWITCH1,</div><div class='ctx'> 		.code		= BTN_0,</div><div class='hunk'>@@ -97,21 +151,39 @@ static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct gpio_keys_platform_data</div><div class='del'>-		eukrea_mbimxsd_button_data __initconst = {</div><div class='del'>-	.buttons	= eukrea_mbimxsd_gpio_buttons,</div><div class='del'>-	.nbuttons	= ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),</div><div class='add'>+		eukrea_mbimxsd51_button_data __initconst = {</div><div class='add'>+	.buttons	= eukrea_mbimxsd51_gpio_buttons,</div><div class='add'>+	.nbuttons	= ARRAY_SIZE(eukrea_mbimxsd51_gpio_buttons),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct imxuart_platform_data uart_pdata __initconst = {</div><div class='ctx'> 	.flags = IMXUART_HAVE_RTSCTS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {</div><div class='add'>+static struct i2c_board_info eukrea_mbimxsd51_i2c_devices[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		I2C_BOARD_INFO("tlv320aic23", 0x1a),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const</div><div class='add'>+struct imx_ssi_platform_data eukrea_mbimxsd51_ssi_pdata __initconst = {</div><div class='add'>+	.flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int screen_type;</div><div class='add'>+</div><div class='add'>+static int __init eukrea_mbimxsd51_screen_type(char *options)</div><div class='add'>+{</div><div class='add'>+	if (!strcmp(options, "dvi"))</div><div class='add'>+		screen_type = 1;</div><div class='add'>+	else if (!strcmp(options, "tft"))</div><div class='add'>+		screen_type = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+__setup("screen_type=", eukrea_mbimxsd51_screen_type);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * system init for baseboard usage. Will be called by cpuimx51sd init.</div><div class='ctx'>  *</div><div class='hunk'>@@ -120,8 +192,8 @@ static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {</div><div class='ctx'>  */</div><div class='ctx'> void __init eukrea_mbimxsd51_baseboard_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,</div><div class='del'>-			ARRAY_SIZE(eukrea_mbimxsd_pads)))</div><div class='add'>+	if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd51_pads,</div><div class='add'>+			ARRAY_SIZE(eukrea_mbimxsd51_pads)))</div><div class='ctx'> 		printk(KERN_ERR "error setting mbimxsd pads !\n");</div><div class='ctx'> </div><div class='ctx'> 	imx51_add_imx_uart(1, NULL);</div><div class='hunk'>@@ -129,6 +201,8 @@ void __init eukrea_mbimxsd51_baseboard_init(void)</div><div class='ctx'> </div><div class='ctx'> 	imx51_add_sdhci_esdhc_imx(0, NULL);</div><div class='ctx'> </div><div class='add'>+	imx51_add_imx_ssi(0, &amp;eukrea_mbimxsd51_ssi_pdata);</div><div class='add'>+</div><div class='ctx'> 	gpio_request(GPIO_LED1, "LED1");</div><div class='ctx'> 	gpio_direction_output(GPIO_LED1, 1);</div><div class='ctx'> 	gpio_free(GPIO_LED1);</div><div class='hunk'>@@ -137,9 +211,21 @@ void __init eukrea_mbimxsd51_baseboard_init(void)</div><div class='ctx'> 	gpio_direction_input(GPIO_SWITCH1);</div><div class='ctx'> 	gpio_free(GPIO_SWITCH1);</div><div class='ctx'> </div><div class='del'>-	i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,</div><div class='del'>-				ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));</div><div class='del'>-</div><div class='del'>-	gpio_led_register_device(-1, &amp;eukrea_mbimxsd_led_info);</div><div class='del'>-	imx_add_gpio_keys(&amp;eukrea_mbimxsd_button_data);</div><div class='add'>+	gpio_request(GPIO_LCDRST, "LCDRST");</div><div class='add'>+	gpio_direction_output(GPIO_LCDRST, 0);</div><div class='add'>+	gpio_request(GPIO_LCDBL, "LCDBL");</div><div class='add'>+	gpio_direction_output(GPIO_LCDBL, 0);</div><div class='add'>+	if (!screen_type) {</div><div class='add'>+		platform_device_register(&amp;eukrea_mbimxsd51_bl_dev);</div><div class='add'>+		platform_device_register(&amp;eukrea_mbimxsd51_lcd_powerdev);</div><div class='add'>+	} else {</div><div class='add'>+		gpio_free(GPIO_LCDRST);</div><div class='add'>+		gpio_free(GPIO_LCDBL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i2c_register_board_info(0, eukrea_mbimxsd51_i2c_devices,</div><div class='add'>+				ARRAY_SIZE(eukrea_mbimxsd51_i2c_devices));</div><div class='add'>+</div><div class='add'>+	gpio_led_register_device(-1, &amp;eukrea_mbimxsd51_led_info);</div><div class='add'>+	imx_add_gpio_keys(&amp;eukrea_mbimxsd51_button_data);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c<br/>index ed38d03c61f2..eee0cc8d92a4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/imx27-dt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/imx27-dt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/imx27-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/imx27-dt.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@ static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {</div><div class='ctx'> 	OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "mxc_nand.0", NULL),</div><div class='ctx'> 	{ /* sentinel */ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c<br/>index 5cca573964f0..18e78dba4298 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/imx51-dt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/imx51-dt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/imx51-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/imx51-dt.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/mach/time.h&gt;</div><div class='ctx'> #include &lt;mach/common.h&gt;</div><div class='hunk'>@@ -81,6 +82,8 @@ static void __init imx51_dt_init(void)</div><div class='ctx'> </div><div class='ctx'> 	of_irq_init(imx51_irq_match);</div><div class='ctx'> </div><div class='add'>+	pinctrl_provide_dummies();</div><div class='add'>+</div><div class='ctx'> 	node = of_find_matching_node(NULL, imx51_iomuxc_of_match);</div><div class='ctx'> 	if (node) {</div><div class='ctx'> 		of_id = of_match_node(imx51_iomuxc_of_match, node);</div><div class='hunk'>@@ -115,6 +118,7 @@ DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")</div><div class='ctx'> 	.handle_irq	= imx51_handle_irq,</div><div class='ctx'> 	.timer		= &amp;imx51_timer,</div><div class='ctx'> 	.init_machine	= imx51_dt_init,</div><div class='add'>+	.init_late	= imx51_init_late,</div><div class='ctx'> 	.dt_compat	= imx51_dt_board_compat,</div><div class='ctx'> 	.restart	= mxc_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c<br/>index 4172279b3900..eb04b6248e48 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/imx53-dt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/imx53-dt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/imx53-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/imx53-dt.c</a></div><div class='hunk'>@@ -10,11 +10,15 @@</div><div class='ctx'>  * http://www.gnu.org/copyleft/gpl.html</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/mach/time.h&gt;</div><div class='ctx'> #include &lt;mach/common.h&gt;</div><div class='hunk'>@@ -80,6 +84,19 @@ static const struct of_device_id imx53_iomuxc_of_match[] __initconst = {</div><div class='ctx'> 	{ /* sentinel */ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void __init imx53_qsb_init(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk;</div><div class='add'>+</div><div class='add'>+	clk = clk_get_sys(NULL, "ssi_ext1");</div><div class='add'>+	if (IS_ERR(clk)) {</div><div class='add'>+		pr_err("failed to get clk ssi_ext1\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk_register_clkdev(clk, NULL, "0-000a");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init imx53_dt_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *node;</div><div class='hunk'>@@ -88,6 +105,8 @@ static void __init imx53_dt_init(void)</div><div class='ctx'> </div><div class='ctx'> 	of_irq_init(imx53_irq_match);</div><div class='ctx'> </div><div class='add'>+	pinctrl_provide_dummies();</div><div class='add'>+</div><div class='ctx'> 	node = of_find_matching_node(NULL, imx53_iomuxc_of_match);</div><div class='ctx'> 	if (node) {</div><div class='ctx'> 		of_id = of_match_node(imx53_iomuxc_of_match, node);</div><div class='hunk'>@@ -96,6 +115,9 @@ static void __init imx53_dt_init(void)</div><div class='ctx'> 		of_node_put(node);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (of_machine_is_compatible("fsl,imx53-qsb"))</div><div class='add'>+		imx53_qsb_init();</div><div class='add'>+</div><div class='ctx'> 	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='ctx'> 			     imx53_auxdata_lookup, NULL);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c<br/>index 0213f8dcee81..c40a34c00489 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/lluart.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/lluart.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/lluart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/lluart.c</a></div><div class='hunk'>@@ -17,6 +17,12 @@</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> </div><div class='ctx'> static struct map_desc imx_lluart_desc = {</div><div class='add'>+#ifdef CONFIG_DEBUG_IMX6Q_UART2</div><div class='add'>+	.virtual	= MX6Q_IO_P2V(MX6Q_UART2_BASE_ADDR),</div><div class='add'>+	.pfn		= __phys_to_pfn(MX6Q_UART2_BASE_ADDR),</div><div class='add'>+	.length		= MX6Q_UART2_SIZE,</div><div class='add'>+	.type		= MT_DEVICE,</div><div class='add'>+#endif</div><div class='ctx'> #ifdef CONFIG_DEBUG_IMX6Q_UART4</div><div class='ctx'> 	.virtual	= MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR),</div><div class='ctx'> 	.pfn		= __phys_to_pfn(MX6Q_UART4_BASE_ADDR),</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c<br/>index 8ecc872b2547..c515f8ede1a1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-cpuimx35.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-cpuimx35.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-cpuimx35.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-cpuimx35.c</a></div><div class='hunk'>@@ -194,7 +194,7 @@ static void __init eukrea_cpuimx35_timer_init(void)</div><div class='ctx'> 	mx35_clocks_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct sys_timer eukrea_cpuimx35_timer = {</div><div class='add'>+static struct sys_timer eukrea_cpuimx35_timer = {</div><div class='ctx'> 	.init	= eukrea_cpuimx35_timer_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/mach-cpuimx51.c b/arch/arm/mach-imx/mach-cpuimx51.c<br/>deleted file mode 100644<br/>index 944025da8333..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-cpuimx51.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-cpuimx51.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,301 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 Eric Bénard &lt;eric@eukrea.com&gt;</div><div class='del'>- *</div><div class='del'>- * based on board-mx51_babbage.c which is</div><div class='del'>- * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='del'>- * Copyright (C) 2009-2010 Amit Kucheria &lt;amit.kucheria@canonical.com&gt;</div><div class='del'>- *</div><div class='del'>- * The code contained herein is licensed under the GNU General Public</div><div class='del'>- * License. You may obtain a copy of the GNU General Public License</div><div class='del'>- * Version 2 or later at the following locations:</div><div class='del'>- *</div><div class='del'>- * http://www.opensource.org/licenses/gpl-license.html</div><div class='del'>- * http://www.gnu.org/copyleft/gpl.html</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/serial_8250.h&gt;</div><div class='del'>-#include &lt;linux/i2c.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/eukrea-baseboards.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/iomux-mx51.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/setup.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach/time.h&gt;</div><div class='del'>-</div><div class='del'>-#include "devices-imx51.h"</div><div class='del'>-</div><div class='del'>-#define CPUIMX51_USBH1_STP	IMX_GPIO_NR(1, 27)</div><div class='del'>-#define CPUIMX51_QUARTA_GPIO	IMX_GPIO_NR(3, 28)</div><div class='del'>-#define CPUIMX51_QUARTB_GPIO	IMX_GPIO_NR(3, 25)</div><div class='del'>-#define CPUIMX51_QUARTC_GPIO	IMX_GPIO_NR(3, 26)</div><div class='del'>-#define CPUIMX51_QUARTD_GPIO	IMX_GPIO_NR(3, 27)</div><div class='del'>-#define CPUIMX51_QUART_XTAL	14745600</div><div class='del'>-#define CPUIMX51_QUART_REGSHIFT	17</div><div class='del'>-</div><div class='del'>-/* USB_CTRL_1 */</div><div class='del'>-#define MX51_USB_CTRL_1_OFFSET		0x10</div><div class='del'>-#define MX51_USB_CTRL_UH1_EXT_CLK_EN	(1 &lt;&lt; 25)</div><div class='del'>-</div><div class='del'>-#define	MX51_USB_PLLDIV_12_MHZ		0x00</div><div class='del'>-#define	MX51_USB_PLL_DIV_19_2_MHZ	0x01</div><div class='del'>-#define	MX51_USB_PLL_DIV_24_MHZ		0x02</div><div class='del'>-</div><div class='del'>-static struct plat_serial8250_port serial_platform_data[] = {</div><div class='del'>-	{</div><div class='del'>-		.mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000),</div><div class='del'>-		.irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTA_GPIO),</div><div class='del'>-		.irqflags = IRQF_TRIGGER_HIGH,</div><div class='del'>-		.uartclk = CPUIMX51_QUART_XTAL,</div><div class='del'>-		.regshift = CPUIMX51_QUART_REGSHIFT,</div><div class='del'>-		.iotype = UPIO_MEM,</div><div class='del'>-		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,</div><div class='del'>-	}, {</div><div class='del'>-		.mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000),</div><div class='del'>-		.irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTB_GPIO),</div><div class='del'>-		.irqflags = IRQF_TRIGGER_HIGH,</div><div class='del'>-		.uartclk = CPUIMX51_QUART_XTAL,</div><div class='del'>-		.regshift = CPUIMX51_QUART_REGSHIFT,</div><div class='del'>-		.iotype = UPIO_MEM,</div><div class='del'>-		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,</div><div class='del'>-	}, {</div><div class='del'>-		.mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000),</div><div class='del'>-		.irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTC_GPIO),</div><div class='del'>-		.irqflags = IRQF_TRIGGER_HIGH,</div><div class='del'>-		.uartclk = CPUIMX51_QUART_XTAL,</div><div class='del'>-		.regshift = CPUIMX51_QUART_REGSHIFT,</div><div class='del'>-		.iotype = UPIO_MEM,</div><div class='del'>-		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,</div><div class='del'>-	}, {</div><div class='del'>-		.mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000),</div><div class='del'>-		.irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTD_GPIO),</div><div class='del'>-		.irqflags = IRQF_TRIGGER_HIGH,</div><div class='del'>-		.uartclk = CPUIMX51_QUART_XTAL,</div><div class='del'>-		.regshift = CPUIMX51_QUART_REGSHIFT,</div><div class='del'>-		.iotype = UPIO_MEM,</div><div class='del'>-		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,</div><div class='del'>-	}, {</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device serial_device = {</div><div class='del'>-	.name = "serial8250",</div><div class='del'>-	.id = 0,</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = serial_platform_data,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *devices[] __initdata = {</div><div class='del'>-	&amp;serial_device,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static iomux_v3_cfg_t eukrea_cpuimx51_pads[] = {</div><div class='del'>-	/* UART1 */</div><div class='del'>-	MX51_PAD_UART1_RXD__UART1_RXD,</div><div class='del'>-	MX51_PAD_UART1_TXD__UART1_TXD,</div><div class='del'>-	MX51_PAD_UART1_RTS__UART1_RTS,</div><div class='del'>-	MX51_PAD_UART1_CTS__UART1_CTS,</div><div class='del'>-</div><div class='del'>-	/* I2C2 */</div><div class='del'>-	MX51_PAD_GPIO1_2__I2C2_SCL,</div><div class='del'>-	MX51_PAD_GPIO1_3__I2C2_SDA,</div><div class='del'>-	MX51_PAD_NANDF_D10__GPIO3_30,</div><div class='del'>-</div><div class='del'>-	/* QUART IRQ */</div><div class='del'>-	MX51_PAD_NANDF_D15__GPIO3_25,</div><div class='del'>-	MX51_PAD_NANDF_D14__GPIO3_26,</div><div class='del'>-	MX51_PAD_NANDF_D13__GPIO3_27,</div><div class='del'>-	MX51_PAD_NANDF_D12__GPIO3_28,</div><div class='del'>-</div><div class='del'>-	/* USB HOST1 */</div><div class='del'>-	MX51_PAD_USBH1_CLK__USBH1_CLK,</div><div class='del'>-	MX51_PAD_USBH1_DIR__USBH1_DIR,</div><div class='del'>-	MX51_PAD_USBH1_NXT__USBH1_NXT,</div><div class='del'>-	MX51_PAD_USBH1_DATA0__USBH1_DATA0,</div><div class='del'>-	MX51_PAD_USBH1_DATA1__USBH1_DATA1,</div><div class='del'>-	MX51_PAD_USBH1_DATA2__USBH1_DATA2,</div><div class='del'>-	MX51_PAD_USBH1_DATA3__USBH1_DATA3,</div><div class='del'>-	MX51_PAD_USBH1_DATA4__USBH1_DATA4,</div><div class='del'>-	MX51_PAD_USBH1_DATA5__USBH1_DATA5,</div><div class='del'>-	MX51_PAD_USBH1_DATA6__USBH1_DATA6,</div><div class='del'>-	MX51_PAD_USBH1_DATA7__USBH1_DATA7,</div><div class='del'>-	MX51_PAD_USBH1_STP__USBH1_STP,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct mxc_nand_platform_data</div><div class='del'>-		eukrea_cpuimx51_nand_board_info __initconst = {</div><div class='del'>-	.width		= 1,</div><div class='del'>-	.hw_ecc		= 1,</div><div class='del'>-	.flash_bbt	= 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct imxuart_platform_data uart_pdata __initconst = {</div><div class='del'>-	.flags = IMXUART_HAVE_RTSCTS,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const</div><div class='del'>-struct imxi2c_platform_data eukrea_cpuimx51_i2c_data __initconst = {</div><div class='del'>-	.bitrate = 100000,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct i2c_board_info eukrea_cpuimx51_i2c_devices[] = {</div><div class='del'>-	{</div><div class='del'>-		I2C_BOARD_INFO("pcf8563", 0x51),</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* This function is board specific as the bit mask for the plldiv will also</div><div class='del'>-be different for other Freescale SoCs, thus a common bitmask is not</div><div class='del'>-possible and cannot get place in /plat-mxc/ehci.c.*/</div><div class='del'>-static int initialize_otg_port(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	u32 v;</div><div class='del'>-	void __iomem *usb_base;</div><div class='del'>-	void __iomem *usbother_base;</div><div class='del'>-</div><div class='del'>-	usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);</div><div class='del'>-	if (!usb_base)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;</div><div class='del'>-</div><div class='del'>-	/* Set the PHY clock to 19.2MHz */</div><div class='del'>-	v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);</div><div class='del'>-	v &amp;= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;</div><div class='del'>-	v |= MX51_USB_PLL_DIV_19_2_MHZ;</div><div class='del'>-	__raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);</div><div class='del'>-	iounmap(usb_base);</div><div class='del'>-</div><div class='del'>-	mdelay(10);</div><div class='del'>-</div><div class='del'>-	return mx51_initialize_usb_hw(0, MXC_EHCI_INTERNAL_PHY);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int initialize_usbh1_port(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	u32 v;</div><div class='del'>-	void __iomem *usb_base;</div><div class='del'>-	void __iomem *usbother_base;</div><div class='del'>-</div><div class='del'>-	usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);</div><div class='del'>-	if (!usb_base)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;</div><div class='del'>-</div><div class='del'>-	/* The clock for the USBH1 ULPI port will come externally from the PHY. */</div><div class='del'>-	v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET);</div><div class='del'>-	__raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET);</div><div class='del'>-	iounmap(usb_base);</div><div class='del'>-</div><div class='del'>-	mdelay(10);</div><div class='del'>-</div><div class='del'>-	return mx51_initialize_usb_hw(1, MXC_EHCI_POWER_PINS_ENABLED |</div><div class='del'>-			MXC_EHCI_ITC_NO_THRESHOLD);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {</div><div class='del'>-	.init		= initialize_otg_port,</div><div class='del'>-	.portsc	= MXC_EHCI_UTMI_16BIT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct fsl_usb2_platform_data usb_pdata __initconst = {</div><div class='del'>-	.operating_mode	= FSL_USB2_DR_DEVICE,</div><div class='del'>-	.phy_mode	= FSL_USB2_PHY_UTMI_WIDE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct mxc_usbh_platform_data usbh1_config __initconst = {</div><div class='del'>-	.init		= initialize_usbh1_port,</div><div class='del'>-	.portsc	= MXC_EHCI_MODE_ULPI,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int otg_mode_host;</div><div class='del'>-</div><div class='del'>-static int __init eukrea_cpuimx51_otg_mode(char *options)</div><div class='del'>-{</div><div class='del'>-	if (!strcmp(options, "host"))</div><div class='del'>-		otg_mode_host = 1;</div><div class='del'>-	else if (!strcmp(options, "device"))</div><div class='del'>-		otg_mode_host = 0;</div><div class='del'>-	else</div><div class='del'>-		pr_info("otg_mode neither \"host\" nor \"device\". "</div><div class='del'>-			"Defaulting to device\n");</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-__setup("otg_mode=", eukrea_cpuimx51_otg_mode);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Board specific initialization.</div><div class='del'>- */</div><div class='del'>-static void __init eukrea_cpuimx51_init(void)</div><div class='del'>-{</div><div class='del'>-	imx51_soc_init();</div><div class='del'>-</div><div class='del'>-	mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads,</div><div class='del'>-					ARRAY_SIZE(eukrea_cpuimx51_pads));</div><div class='del'>-</div><div class='del'>-	imx51_add_imx_uart(0, &amp;uart_pdata);</div><div class='del'>-	imx51_add_mxc_nand(&amp;eukrea_cpuimx51_nand_board_info);</div><div class='del'>-</div><div class='del'>-	gpio_request(CPUIMX51_QUARTA_GPIO, "quarta_irq");</div><div class='del'>-	gpio_direction_input(CPUIMX51_QUARTA_GPIO);</div><div class='del'>-	gpio_free(CPUIMX51_QUARTA_GPIO);</div><div class='del'>-	gpio_request(CPUIMX51_QUARTB_GPIO, "quartb_irq");</div><div class='del'>-	gpio_direction_input(CPUIMX51_QUARTB_GPIO);</div><div class='del'>-	gpio_free(CPUIMX51_QUARTB_GPIO);</div><div class='del'>-	gpio_request(CPUIMX51_QUARTC_GPIO, "quartc_irq");</div><div class='del'>-	gpio_direction_input(CPUIMX51_QUARTC_GPIO);</div><div class='del'>-	gpio_free(CPUIMX51_QUARTC_GPIO);</div><div class='del'>-	gpio_request(CPUIMX51_QUARTD_GPIO, "quartd_irq");</div><div class='del'>-	gpio_direction_input(CPUIMX51_QUARTD_GPIO);</div><div class='del'>-	gpio_free(CPUIMX51_QUARTD_GPIO);</div><div class='del'>-</div><div class='del'>-	imx51_add_fec(NULL);</div><div class='del'>-	platform_add_devices(devices, ARRAY_SIZE(devices));</div><div class='del'>-</div><div class='del'>-	imx51_add_imx_i2c(1, &amp;eukrea_cpuimx51_i2c_data);</div><div class='del'>-	i2c_register_board_info(1, eukrea_cpuimx51_i2c_devices,</div><div class='del'>-				ARRAY_SIZE(eukrea_cpuimx51_i2c_devices));</div><div class='del'>-</div><div class='del'>-	if (otg_mode_host)</div><div class='del'>-		imx51_add_mxc_ehci_otg(&amp;dr_utmi_config);</div><div class='del'>-	else {</div><div class='del'>-		initialize_otg_port(NULL);</div><div class='del'>-		imx51_add_fsl_usb2_udc(&amp;usb_pdata);</div><div class='del'>-	}</div><div class='del'>-	imx51_add_mxc_ehci_hs(1, &amp;usbh1_config);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD</div><div class='del'>-	eukrea_mbimx51_baseboard_init();</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init eukrea_cpuimx51_timer_init(void)</div><div class='del'>-{</div><div class='del'>-	mx51_clocks_init(32768, 24000000, 22579200, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct sys_timer mxc_timer = {</div><div class='del'>-	.init	= eukrea_cpuimx51_timer_init,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module")</div><div class='del'>-	/* Maintainer: Eric Bénard &lt;eric@eukrea.com&gt; */</div><div class='del'>-	.atag_offset = 0x100,</div><div class='del'>-	.map_io = mx51_map_io,</div><div class='del'>-	.init_early = imx51_init_early,</div><div class='del'>-	.init_irq = mx51_init_irq,</div><div class='del'>-	.handle_irq = imx51_handle_irq,</div><div class='del'>-	.timer = &amp;mxc_timer,</div><div class='del'>-	.init_machine = eukrea_cpuimx51_init,</div><div class='del'>-	.restart	= mxc_restart,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c<br/>index 9fbe923c8b08..ac50f1671e38 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-cpuimx51sd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-cpuimx51sd.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-cpuimx51sd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-cpuimx51sd.c</a></div><div class='hunk'>@@ -41,11 +41,13 @@</div><div class='ctx'> </div><div class='ctx'> #define USBH1_RST		IMX_GPIO_NR(2, 28)</div><div class='ctx'> #define ETH_RST			IMX_GPIO_NR(2, 31)</div><div class='del'>-#define TSC2007_IRQGPIO		IMX_GPIO_NR(3, 12)</div><div class='add'>+#define TSC2007_IRQGPIO_REV2	IMX_GPIO_NR(3, 12)</div><div class='add'>+#define TSC2007_IRQGPIO_REV3	IMX_GPIO_NR(4, 0)</div><div class='ctx'> #define CAN_IRQGPIO		IMX_GPIO_NR(1, 1)</div><div class='ctx'> #define CAN_RST			IMX_GPIO_NR(4, 15)</div><div class='ctx'> #define CAN_NCS			IMX_GPIO_NR(4, 24)</div><div class='del'>-#define CAN_RXOBF		IMX_GPIO_NR(1, 4)</div><div class='add'>+#define CAN_RXOBF_REV2		IMX_GPIO_NR(1, 4)</div><div class='add'>+#define CAN_RXOBF_REV3		IMX_GPIO_NR(3, 12)</div><div class='ctx'> #define CAN_RX1BF		IMX_GPIO_NR(1, 6)</div><div class='ctx'> #define CAN_TXORTS		IMX_GPIO_NR(1, 7)</div><div class='ctx'> #define CAN_TX1RTS		IMX_GPIO_NR(1, 8)</div><div class='hunk'>@@ -90,6 +92,10 @@ static iomux_v3_cfg_t eukrea_cpuimx51sd_pads[] = {</div><div class='ctx'> 	MX51_PAD_I2C1_CLK__GPIO4_16,</div><div class='ctx'> 	MX51_PAD_I2C1_DAT__GPIO4_17,</div><div class='ctx'> </div><div class='add'>+	/* I2C1 */</div><div class='add'>+	MX51_PAD_SD2_CMD__I2C1_SCL,</div><div class='add'>+	MX51_PAD_SD2_CLK__I2C1_SDA,</div><div class='add'>+</div><div class='ctx'> 	/* CAN */</div><div class='ctx'> 	MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,</div><div class='ctx'> 	MX51_PAD_CSPI1_MISO__ECSPI1_MISO,</div><div class='hunk'>@@ -108,15 +114,27 @@ static iomux_v3_cfg_t eukrea_cpuimx51sd_pads[] = {</div><div class='ctx'> 	NEW_PAD_CTRL(MX51_PAD_GPIO_NAND__GPIO_NAND, PAD_CTL_PUS_22K_UP |</div><div class='ctx'> 			PAD_CTL_PKE | PAD_CTL_SRE_FAST |</div><div class='ctx'> 			PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),</div><div class='add'>+	NEW_PAD_CTRL(MX51_PAD_NANDF_D8__GPIO4_0, PAD_CTL_PUS_22K_UP |</div><div class='add'>+			PAD_CTL_PKE | PAD_CTL_SRE_FAST |</div><div class='add'>+			PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct imxuart_platform_data uart_pdata __initconst = {</div><div class='ctx'> 	.flags = IMXUART_HAVE_RTSCTS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int tsc2007_get_pendown_state(void)</div><div class='add'>+{</div><div class='add'>+	if (mx51_revision() &lt; IMX_CHIP_REVISION_3_0)</div><div class='add'>+		return !gpio_get_value(TSC2007_IRQGPIO_REV2);</div><div class='add'>+	else</div><div class='add'>+		return !gpio_get_value(TSC2007_IRQGPIO_REV3);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct tsc2007_platform_data tsc2007_info = {</div><div class='ctx'> 	.model			= 2007,</div><div class='ctx'> 	.x_plate_ohms		= 180,</div><div class='add'>+	.get_pendown_state	= tsc2007_get_pendown_state,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct i2c_board_info eukrea_cpuimx51sd_i2c_devices[] = {</div><div class='hunk'>@@ -126,7 +144,6 @@ static struct i2c_board_info eukrea_cpuimx51sd_i2c_devices[] = {</div><div class='ctx'> 		I2C_BOARD_INFO("tsc2007", 0x49),</div><div class='ctx'> 		.type		= "tsc2007",</div><div class='ctx'> 		.platform_data	= &amp;tsc2007_info,</div><div class='del'>-		.irq		= IMX_GPIO_TO_IRQ(TSC2007_IRQGPIO),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -255,10 +272,14 @@ static const struct spi_imx_master cpuimx51sd_ecspi1_pdata __initconst = {</div><div class='ctx'> 	.num_chipselect	= ARRAY_SIZE(cpuimx51sd_spi1_cs),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct platform_device *platform_devices[] __initdata = {</div><div class='add'>+static struct platform_device *rev2_platform_devices[] __initdata = {</div><div class='ctx'> 	&amp;hsi2c_gpio_device,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct imxi2c_platform_data cpuimx51sd_i2c_data __initconst = {</div><div class='add'>+	.bitrate = 100000,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void __init eukrea_cpuimx51sd_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	imx51_soc_init();</div><div class='hunk'>@@ -272,6 +293,7 @@ static void __init eukrea_cpuimx51sd_init(void)</div><div class='ctx'> </div><div class='ctx'> 	imx51_add_imx_uart(0, &amp;uart_pdata);</div><div class='ctx'> 	imx51_add_mxc_nand(&amp;eukrea_cpuimx51sd_nand_board_info);</div><div class='add'>+	imx51_add_imx2_wdt(0, NULL);</div><div class='ctx'> </div><div class='ctx'> 	gpio_request(ETH_RST, "eth_rst");</div><div class='ctx'> 	gpio_set_value(ETH_RST, 1);</div><div class='hunk'>@@ -291,13 +313,25 @@ static void __init eukrea_cpuimx51sd_init(void)</div><div class='ctx'> 	spi_register_board_info(cpuimx51sd_spi_device,</div><div class='ctx'> 				ARRAY_SIZE(cpuimx51sd_spi_device));</div><div class='ctx'> </div><div class='del'>-	gpio_request(TSC2007_IRQGPIO, "tsc2007_irq");</div><div class='del'>-	gpio_direction_input(TSC2007_IRQGPIO);</div><div class='del'>-	gpio_free(TSC2007_IRQGPIO);</div><div class='add'>+	if (mx51_revision() &lt; IMX_CHIP_REVISION_3_0) {</div><div class='add'>+		eukrea_cpuimx51sd_i2c_devices[1].irq =</div><div class='add'>+			gpio_to_irq(TSC2007_IRQGPIO_REV2),</div><div class='add'>+		platform_add_devices(rev2_platform_devices,</div><div class='add'>+			ARRAY_SIZE(rev2_platform_devices));</div><div class='add'>+		gpio_request(TSC2007_IRQGPIO_REV2, "tsc2007_irq");</div><div class='add'>+		gpio_direction_input(TSC2007_IRQGPIO_REV2);</div><div class='add'>+		gpio_free(TSC2007_IRQGPIO_REV2);</div><div class='add'>+	} else {</div><div class='add'>+		eukrea_cpuimx51sd_i2c_devices[1].irq =</div><div class='add'>+			gpio_to_irq(TSC2007_IRQGPIO_REV3),</div><div class='add'>+		imx51_add_imx_i2c(0, &amp;cpuimx51sd_i2c_data);</div><div class='add'>+		gpio_request(TSC2007_IRQGPIO_REV3, "tsc2007_irq");</div><div class='add'>+		gpio_direction_input(TSC2007_IRQGPIO_REV3);</div><div class='add'>+		gpio_free(TSC2007_IRQGPIO_REV3);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	i2c_register_board_info(0, eukrea_cpuimx51sd_i2c_devices,</div><div class='ctx'> 			ARRAY_SIZE(eukrea_cpuimx51sd_i2c_devices));</div><div class='del'>-	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));</div><div class='ctx'> </div><div class='ctx'> 	if (otg_mode_host)</div><div class='ctx'> 		imx51_add_mxc_ehci_otg(&amp;dr_utmi_config);</div><div class='hunk'>@@ -335,5 +369,6 @@ MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD")</div><div class='ctx'> 	.handle_irq = imx51_handle_irq,</div><div class='ctx'> 	.timer = &amp;mxc_timer,</div><div class='ctx'> 	.init_machine = eukrea_cpuimx51sd_init,</div><div class='add'>+	.init_late	= imx51_init_late,</div><div class='ctx'> 	.restart	= mxc_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c<br/>index 76a97a598b9e..d1e04e676e33 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-eukrea_cpuimx25.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-eukrea_cpuimx25.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-eukrea_cpuimx25.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-eukrea_cpuimx25.c</a></div><div class='hunk'>@@ -106,6 +106,7 @@ static const struct mxc_usbh_platform_data usbh2_pdata __initconst = {</div><div class='ctx'> static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {</div><div class='ctx'> 	.operating_mode = FSL_USB2_DR_DEVICE,</div><div class='ctx'> 	.phy_mode       = FSL_USB2_PHY_UTMI,</div><div class='add'>+	.workaround     = FLS_USB2_WORKAROUND_ENGCM09152,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int otg_mode_host;</div><div class='hunk'>@@ -135,6 +136,7 @@ static void __init eukrea_cpuimx25_init(void)</div><div class='ctx'> 	imx25_add_mxc_nand(&amp;eukrea_cpuimx25_nand_board_info);</div><div class='ctx'> 	imx25_add_imxdi_rtc(NULL);</div><div class='ctx'> 	imx25_add_fec(&amp;mx25_fec_pdata);</div><div class='add'>+	imx25_add_imx2_wdt(NULL);</div><div class='ctx'> </div><div class='ctx'> 	i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices,</div><div class='ctx'> 				ARRAY_SIZE(eukrea_cpuimx25_i2c_devices));</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c<br/>index f7b074f496f0..dff82eb57cd9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-imx27_visstrim_m10.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-imx27_visstrim_m10.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-imx27_visstrim_m10.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-imx27_visstrim_m10.c</a></div><div class='hunk'>@@ -38,6 +38,7 @@</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/mach/time.h&gt;</div><div class='add'>+#include &lt;asm/system.h&gt;</div><div class='ctx'> #include &lt;mach/common.h&gt;</div><div class='ctx'> #include &lt;mach/iomux-mx27.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -48,6 +49,14 @@</div><div class='ctx'> #define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)</div><div class='ctx'> #define SDHC1_IRQ IRQ_GPIOB(25)</div><div class='ctx'> </div><div class='add'>+#define MOTHERBOARD_BIT2	(GPIO_PORTD + 31)</div><div class='add'>+#define MOTHERBOARD_BIT1	(GPIO_PORTD + 30)</div><div class='add'>+#define MOTHERBOARD_BIT0	(GPIO_PORTD + 29)</div><div class='add'>+</div><div class='add'>+#define EXPBOARD_BIT2		(GPIO_PORTD + 25)</div><div class='add'>+#define EXPBOARD_BIT1		(GPIO_PORTD + 27)</div><div class='add'>+#define EXPBOARD_BIT0		(GPIO_PORTD + 28)</div><div class='add'>+</div><div class='ctx'> static const int visstrim_m10_pins[] __initconst = {</div><div class='ctx'> 	/* UART1 (console) */</div><div class='ctx'> 	PE12_PF_UART1_TXD,</div><div class='hunk'>@@ -119,6 +128,23 @@ static const int visstrim_m10_pins[] __initconst = {</div><div class='ctx'> 	PB19_PF_CSI_D7,</div><div class='ctx'> 	PB20_PF_CSI_VSYNC,</div><div class='ctx'> 	PB21_PF_CSI_HSYNC,</div><div class='add'>+	/* mother board version */</div><div class='add'>+	MOTHERBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,</div><div class='add'>+	MOTHERBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,</div><div class='add'>+	MOTHERBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,</div><div class='add'>+	/* expansion board version */</div><div class='add'>+	EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,</div><div class='add'>+	EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,</div><div class='add'>+	EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio visstrim_m10_version_gpios[] = {</div><div class='add'>+	{ EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },</div><div class='add'>+	{ EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },</div><div class='add'>+	{ EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },</div><div class='add'>+	{ MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },</div><div class='add'>+	{ MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },</div><div class='add'>+	{ MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Camera */</div><div class='hunk'>@@ -152,7 +178,7 @@ static struct soc_camera_link iclink_tvp5150 = {</div><div class='ctx'> </div><div class='ctx'> static struct mx2_camera_platform_data visstrim_camera = {</div><div class='ctx'> 	.flags = MX2_CAMERA_CCIR | MX2_CAMERA_CCIR_INTERLACE |</div><div class='del'>-			MX2_CAMERA_SWAP16 | MX2_CAMERA_PCLK_SAMPLE_RISING,</div><div class='add'>+		 MX2_CAMERA_PCLK_SAMPLE_RISING,</div><div class='ctx'> 	.clk = 100000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -369,11 +395,40 @@ static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {</div><div class='ctx'> 	.flags			= IMX_SSI_DMA | IMX_SSI_SYN,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void __init visstrim_m10_revision(void)</div><div class='add'>+{</div><div class='add'>+	int exp_version = 0;</div><div class='add'>+	int mo_version = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = gpio_request_array(visstrim_m10_version_gpios,</div><div class='add'>+				 ARRAY_SIZE(visstrim_m10_version_gpios));</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("Failed to request version gpios");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Get expansion board version (negative logic) */</div><div class='add'>+	exp_version |= !gpio_get_value(EXPBOARD_BIT2) &lt;&lt; 2;</div><div class='add'>+	exp_version |= !gpio_get_value(EXPBOARD_BIT1) &lt;&lt; 1;</div><div class='add'>+	exp_version |= !gpio_get_value(EXPBOARD_BIT0);</div><div class='add'>+</div><div class='add'>+	/* Get mother board version (negative logic) */</div><div class='add'>+	mo_version |= !gpio_get_value(MOTHERBOARD_BIT2) &lt;&lt; 2;</div><div class='add'>+	mo_version |= !gpio_get_value(MOTHERBOARD_BIT1) &lt;&lt; 1;</div><div class='add'>+	mo_version |= !gpio_get_value(MOTHERBOARD_BIT0);</div><div class='add'>+</div><div class='add'>+	system_rev = 0x27000;</div><div class='add'>+	system_rev |= (mo_version &lt;&lt; 4);</div><div class='add'>+	system_rev |= exp_version;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init visstrim_m10_board_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	imx27_soc_init();</div><div class='add'>+	visstrim_m10_revision();</div><div class='ctx'> </div><div class='ctx'> 	ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,</div><div class='ctx'> 			ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c<br/>index da6c1d9af768..b47e98b7d539 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-imx6q.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-imx6q.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-imx6q.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-imx6q.c</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'>  * http://www.gnu.org/copyleft/gpl.html</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='hunk'>@@ -19,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/micrel_phy.h&gt;</div><div class='ctx'> #include &lt;asm/smp_twd.h&gt;</div><div class='hunk'>@@ -63,23 +66,63 @@ soft:</div><div class='ctx'> /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */</div><div class='ctx'> static int ksz9021rn_phy_fixup(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	/* min rx data delay */</div><div class='del'>-	phy_write(phydev, 0x0b, 0x8105);</div><div class='del'>-	phy_write(phydev, 0x0c, 0x0000);</div><div class='add'>+	if (IS_ENABLED(CONFIG_PHYLIB)) {</div><div class='add'>+		/* min rx data delay */</div><div class='add'>+		phy_write(phydev, 0x0b, 0x8105);</div><div class='add'>+		phy_write(phydev, 0x0c, 0x0000);</div><div class='ctx'> </div><div class='del'>-	/* max rx/tx clock delay, min rx/tx control delay */</div><div class='del'>-	phy_write(phydev, 0x0b, 0x8104);</div><div class='del'>-	phy_write(phydev, 0x0c, 0xf0f0);</div><div class='del'>-	phy_write(phydev, 0x0b, 0x104);</div><div class='add'>+		/* max rx/tx clock delay, min rx/tx control delay */</div><div class='add'>+		phy_write(phydev, 0x0b, 0x8104);</div><div class='add'>+		phy_write(phydev, 0x0c, 0xf0f0);</div><div class='add'>+		phy_write(phydev, 0x0b, 0x104);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init imx6q_sabrelite_cko1_setup(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *cko1_sel, *ahb, *cko1;</div><div class='add'>+	unsigned long rate;</div><div class='add'>+</div><div class='add'>+	cko1_sel = clk_get_sys(NULL, "cko1_sel");</div><div class='add'>+	ahb = clk_get_sys(NULL, "ahb");</div><div class='add'>+	cko1 = clk_get_sys(NULL, "cko1");</div><div class='add'>+	if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {</div><div class='add'>+		pr_err("cko1 setup failed!\n");</div><div class='add'>+		goto put_clk;</div><div class='add'>+	}</div><div class='add'>+	clk_set_parent(cko1_sel, ahb);</div><div class='add'>+	rate = clk_round_rate(cko1, 16000000);</div><div class='add'>+	clk_set_rate(cko1, rate);</div><div class='add'>+	clk_register_clkdev(cko1, NULL, "0-000a");</div><div class='add'>+put_clk:</div><div class='add'>+	if (!IS_ERR(cko1_sel))</div><div class='add'>+		clk_put(cko1_sel);</div><div class='add'>+	if (!IS_ERR(ahb))</div><div class='add'>+		clk_put(ahb);</div><div class='add'>+	if (!IS_ERR(cko1))</div><div class='add'>+		clk_put(cko1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init imx6q_sabrelite_init(void)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_PHYLIB))</div><div class='add'>+		phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,</div><div class='add'>+				ksz9021rn_phy_fixup);</div><div class='add'>+	imx6q_sabrelite_cko1_setup();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init imx6q_init_machine(void)</div><div class='ctx'> {</div><div class='add'>+	/*</div><div class='add'>+	 * This should be removed when all imx6q boards have pinctrl</div><div class='add'>+	 * states for devices defined in device tree.</div><div class='add'>+	 */</div><div class='add'>+	pinctrl_provide_dummies();</div><div class='add'>+</div><div class='ctx'> 	if (of_machine_is_compatible("fsl,imx6q-sabrelite"))</div><div class='del'>-		phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,</div><div class='del'>-					   ksz9021rn_phy_fixup);</div><div class='add'>+		imx6q_sabrelite_init();</div><div class='ctx'> </div><div class='ctx'> 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);</div><div class='ctx'> </div><div class='hunk'>@@ -132,6 +175,7 @@ static struct sys_timer imx6q_timer = {</div><div class='ctx'> static const char *imx6q_dt_compat[] __initdata = {</div><div class='ctx'> 	"fsl,imx6q-arm2",</div><div class='ctx'> 	"fsl,imx6q-sabrelite",</div><div class='add'>+	"fsl,imx6q-sabresd",</div><div class='ctx'> 	"fsl,imx6q",</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c<br/>index 97046088ff1a..7274e7928136 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx1ads.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-mx1ads.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx1ads.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx1ads.c</a></div><div class='hunk'>@@ -134,7 +134,7 @@ static void __init mx1ads_timer_init(void)</div><div class='ctx'> 	mx1_clocks_init(32000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct sys_timer mx1ads_timer = {</div><div class='add'>+static struct sys_timer mx1ads_timer = {</div><div class='ctx'> 	.init	= mx1ads_timer_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c<br/>index e432d4acee1f..d14bbe949a4f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx21ads.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-mx21ads.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx21ads.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx21ads.c</a></div><div class='hunk'>@@ -304,8 +304,7 @@ static void __init mx21ads_board_init(void)</div><div class='ctx'> 	imx21_add_mxc_nand(&amp;mx21ads_nand_board_info);</div><div class='ctx'> </div><div class='ctx'> 	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));</div><div class='del'>-	platform_device_register_full(</div><div class='del'>-			(struct platform_device_info *)&amp;mx21ads_cs8900_devinfo);</div><div class='add'>+	platform_device_register_full(&amp;mx21ads_cs8900_devinfo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init mx21ads_timer_init(void)</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c<br/>index 4d1aab154400..4eafdf275ea2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx31_3ds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-mx31_3ds.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx31_3ds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx31_3ds.c</a></div><div class='hunk'>@@ -156,6 +156,11 @@ static int mx31_3ds_pins[] = {</div><div class='ctx'> 	MX31_PIN_CSI_VSYNC__CSI_VSYNC,</div><div class='ctx'> 	MX31_PIN_CSI_D5__GPIO3_5, /* CMOS PWDN */</div><div class='ctx'> 	IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_GPIO), /* CMOS reset */</div><div class='add'>+	/* SSI */</div><div class='add'>+	MX31_PIN_STXD4__STXD4,</div><div class='add'>+	MX31_PIN_SRXD4__SRXD4,</div><div class='add'>+	MX31_PIN_SCK4__SCK4,</div><div class='add'>+	MX31_PIN_SFS4__SFS4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -488,12 +493,23 @@ static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* MC13783 */</div><div class='add'>+static struct mc13xxx_codec_platform_data mx31_3ds_codec = {</div><div class='add'>+	.dac_ssi_port = MC13783_SSI1_PORT,</div><div class='add'>+	.adc_ssi_port = MC13783_SSI1_PORT,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct mc13xxx_platform_data mc13783_pdata = {</div><div class='ctx'> 	.regulators = {</div><div class='ctx'> 		.regulators = mx31_3ds_regulators,</div><div class='ctx'> 		.num_regulators = ARRAY_SIZE(mx31_3ds_regulators),</div><div class='ctx'> 	},</div><div class='del'>-	.flags  = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC,</div><div class='add'>+	.codec = &amp;mx31_3ds_codec,</div><div class='add'>+	.flags  = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC | MC13XXX_USE_CODEC,</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct imx_ssi_platform_data mx31_3ds_ssi_pdata = {</div><div class='add'>+	.flags = IMX_SSI_DMA | IMX_SSI_NET,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* SPI */</div><div class='hunk'>@@ -741,6 +757,10 @@ static void __init mx31_3ds_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mx31_3ds_init_camera();</div><div class='add'>+</div><div class='add'>+	imx31_add_imx_ssi(0, &amp;mx31_3ds_ssi_pdata);</div><div class='add'>+</div><div class='add'>+	imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init mx31_3ds_timer_init(void)</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c<br/>index 0abef5f13df5..686c60587980 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx31lite.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-mx31lite.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx31lite.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx31lite.c</a></div><div class='hunk'>@@ -283,7 +283,7 @@ static void __init mx31lite_timer_init(void)</div><div class='ctx'> 	mx31_clocks_init(26000000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct sys_timer mx31lite_timer = {</div><div class='add'>+static struct sys_timer mx31lite_timer = {</div><div class='ctx'> 	.init	= mx31lite_timer_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c<br/>index f17a15f28316..016791f038b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx31moboard.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-mx31moboard.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx31moboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx31moboard.c</a></div><div class='hunk'>@@ -47,6 +47,7 @@</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;mach/iomux-mx3.h&gt;</div><div class='ctx'> #include &lt;mach/ulpi.h&gt;</div><div class='add'>+#include &lt;mach/ssi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "devices-imx31.h"</div><div class='ctx'> </div><div class='hunk'>@@ -102,6 +103,9 @@ static unsigned int moboard_pins[] = {</div><div class='ctx'> 	MX31_PIN_CSPI3_MOSI__MOSI, MX31_PIN_CSPI3_MISO__MISO,</div><div class='ctx'> 	MX31_PIN_CSPI3_SCLK__SCLK, MX31_PIN_CSPI3_SPI_RDY__SPI_RDY,</div><div class='ctx'> 	MX31_PIN_CSPI2_SS1__CSPI3_SS1,</div><div class='add'>+	/* SSI */</div><div class='add'>+	MX31_PIN_STXD4__STXD4, MX31_PIN_SRXD4__SRXD4,</div><div class='add'>+	MX31_PIN_SCK4__SCK4, MX31_PIN_SFS4__SFS4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct physmap_flash_data mx31moboard_flash_data = {</div><div class='hunk'>@@ -276,6 +280,11 @@ static struct mc13xxx_buttons_platform_data moboard_buttons = {</div><div class='ctx'> 	.b1on_key = KEY_POWER,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct mc13xxx_codec_platform_data moboard_codec = {</div><div class='add'>+	.dac_ssi_port = MC13783_SSI1_PORT,</div><div class='add'>+	.adc_ssi_port = MC13783_SSI1_PORT,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct mc13xxx_platform_data moboard_pmic = {</div><div class='ctx'> 	.regulators = {</div><div class='ctx'> 		.regulators = moboard_regulators,</div><div class='hunk'>@@ -283,7 +292,12 @@ static struct mc13xxx_platform_data moboard_pmic = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.leds = &amp;moboard_leds,</div><div class='ctx'> 	.buttons = &amp;moboard_buttons,</div><div class='del'>-	.flags = MC13XXX_USE_RTC | MC13XXX_USE_ADC,</div><div class='add'>+	.codec = &amp;moboard_codec,</div><div class='add'>+	.flags = MC13XXX_USE_RTC | MC13XXX_USE_ADC | MC13XXX_USE_CODEC,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct imx_ssi_platform_data moboard_ssi_pdata = {</div><div class='add'>+	.flags = IMX_SSI_DMA | IMX_SSI_NET,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct spi_board_info moboard_spi_board_info[] __initdata = {</div><div class='hunk'>@@ -554,6 +568,10 @@ static void __init mx31moboard_init(void)</div><div class='ctx'> </div><div class='ctx'> 	moboard_usbh2_init();</div><div class='ctx'> </div><div class='add'>+	imx31_add_imx_ssi(0, &amp;moboard_ssi_pdata);</div><div class='add'>+</div><div class='add'>+	imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);</div><div class='add'>+</div><div class='ctx'> 	pm_power_off = mx31moboard_poweroff;</div><div class='ctx'> </div><div class='ctx'> 	switch (mx31moboard_baseboard) {</div><div class='hunk'>@@ -580,7 +598,7 @@ static void __init mx31moboard_timer_init(void)</div><div class='ctx'> 	mx31_clocks_init(26000000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct sys_timer mx31moboard_timer = {</div><div class='add'>+static struct sys_timer mx31moboard_timer = {</div><div class='ctx'> 	.init	= mx31moboard_timer_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c<br/>index 6ae51c6b95b7..28aa19476de7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx35_3ds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-mx35_3ds.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx35_3ds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx35_3ds.c</a></div><div class='hunk'>@@ -34,6 +34,8 @@</div><div class='ctx'> #include &lt;linux/usb/otg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='add'>+#include &lt;linux/mfd/mc13892.h&gt;</div><div class='add'>+#include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='hunk'>@@ -96,8 +98,7 @@ static struct i2c_board_info __initdata i2c_devices_3ds[] = {</div><div class='ctx'> </div><div class='ctx'> static int lcd_power_gpio = -ENXIO;</div><div class='ctx'> </div><div class='del'>-static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip,</div><div class='del'>-						     const void *data)</div><div class='add'>+static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	return !strcmp(chip-&gt;label, data);</div><div class='ctx'> }</div><div class='hunk'>@@ -253,6 +254,8 @@ static iomux_v3_cfg_t mx35pdk_pads[] = {</div><div class='ctx'> 	MX35_PAD_CSI_MCLK__IPU_CSI_MCLK,</div><div class='ctx'> 	MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK,</div><div class='ctx'> 	MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC,</div><div class='add'>+	/*PMIC IRQ*/</div><div class='add'>+	MX35_PAD_GPIO2_0__GPIO2_0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -317,6 +320,193 @@ static struct platform_device mx35_3ds_ov2640 = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct regulator_consumer_supply sw1_consumers[] = {</div><div class='add'>+	{</div><div class='add'>+		.supply = "cpu_vcc",</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_consumer_supply vcam_consumers[] = {</div><div class='add'>+	/* sgtl5000 */</div><div class='add'>+	REGULATOR_SUPPLY("VDDA", "0-000a"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_consumer_supply vaudio_consumers[] = {</div><div class='add'>+	REGULATOR_SUPPLY("cmos_vio", "soc-camera-pdrv.0"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data sw1_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "SW1",</div><div class='add'>+		.min_uV = 600000,</div><div class='add'>+		.max_uV = 1375000,</div><div class='add'>+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,</div><div class='add'>+		.valid_modes_mask = 0,</div><div class='add'>+		.always_on = 1,</div><div class='add'>+		.boot_on = 1,</div><div class='add'>+	},</div><div class='add'>+	.num_consumer_supplies = ARRAY_SIZE(sw1_consumers),</div><div class='add'>+	.consumer_supplies = sw1_consumers,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data sw2_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "SW2",</div><div class='add'>+		.always_on = 1,</div><div class='add'>+		.boot_on = 1,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data sw3_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "SW3",</div><div class='add'>+		.always_on = 1,</div><div class='add'>+		.boot_on = 1,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data sw4_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "SW4",</div><div class='add'>+		.always_on = 1,</div><div class='add'>+		.boot_on = 1,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data viohi_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "VIOHI",</div><div class='add'>+		.boot_on = 1,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data vusb_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "VUSB",</div><div class='add'>+		.boot_on = 1,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data vdig_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "VDIG",</div><div class='add'>+		.boot_on = 1,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data vpll_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "VPLL",</div><div class='add'>+		.boot_on = 1,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data vusb2_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "VUSB2",</div><div class='add'>+		.boot_on = 1,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data vvideo_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "VVIDEO",</div><div class='add'>+		.boot_on = 1</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data vaudio_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "VAUDIO",</div><div class='add'>+		.min_uV = 2300000,</div><div class='add'>+		.max_uV = 3000000,</div><div class='add'>+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,</div><div class='add'>+		.boot_on = 1</div><div class='add'>+	},</div><div class='add'>+	.num_consumer_supplies = ARRAY_SIZE(vaudio_consumers),</div><div class='add'>+	.consumer_supplies = vaudio_consumers,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data vcam_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "VCAM",</div><div class='add'>+		.min_uV = 2500000,</div><div class='add'>+		.max_uV = 3000000,</div><div class='add'>+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |</div><div class='add'>+					REGULATOR_CHANGE_MODE,</div><div class='add'>+		.valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL,</div><div class='add'>+		.boot_on = 1</div><div class='add'>+	},</div><div class='add'>+	.num_consumer_supplies = ARRAY_SIZE(vcam_consumers),</div><div class='add'>+	.consumer_supplies = vcam_consumers,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data vgen1_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "VGEN1",</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data vgen2_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "VGEN2",</div><div class='add'>+		.boot_on = 1,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data vgen3_init = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name = "VGEN3",</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mc13xxx_regulator_init_data mx35_3ds_regulators[] = {</div><div class='add'>+	{ .id = MC13892_SW1, .init_data = &amp;sw1_init },</div><div class='add'>+	{ .id = MC13892_SW2, .init_data = &amp;sw2_init },</div><div class='add'>+	{ .id = MC13892_SW3, .init_data = &amp;sw3_init },</div><div class='add'>+	{ .id = MC13892_SW4, .init_data = &amp;sw4_init },</div><div class='add'>+	{ .id = MC13892_VIOHI, .init_data = &amp;viohi_init },</div><div class='add'>+	{ .id = MC13892_VPLL, .init_data = &amp;vpll_init },</div><div class='add'>+	{ .id = MC13892_VDIG, .init_data = &amp;vdig_init },</div><div class='add'>+	{ .id = MC13892_VUSB2, .init_data = &amp;vusb2_init },</div><div class='add'>+	{ .id = MC13892_VVIDEO, .init_data = &amp;vvideo_init },</div><div class='add'>+	{ .id = MC13892_VAUDIO, .init_data = &amp;vaudio_init },</div><div class='add'>+	{ .id = MC13892_VCAM, .init_data = &amp;vcam_init },</div><div class='add'>+	{ .id = MC13892_VGEN1, .init_data = &amp;vgen1_init },</div><div class='add'>+	{ .id = MC13892_VGEN2, .init_data = &amp;vgen2_init },</div><div class='add'>+	{ .id = MC13892_VGEN3, .init_data = &amp;vgen3_init },</div><div class='add'>+	{ .id = MC13892_VUSB, .init_data = &amp;vusb_init },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mc13xxx_platform_data mx35_3ds_mc13892_data = {</div><div class='add'>+	.flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,</div><div class='add'>+	.regulators = {</div><div class='add'>+		.num_regulators = ARRAY_SIZE(mx35_3ds_regulators),</div><div class='add'>+		.regulators = mx35_3ds_regulators,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)</div><div class='add'>+</div><div class='add'>+static struct i2c_board_info mx35_3ds_i2c_mc13892 = {</div><div class='add'>+</div><div class='add'>+	I2C_BOARD_INFO("mc13892", 0x08),</div><div class='add'>+	.platform_data = &amp;mx35_3ds_mc13892_data,</div><div class='add'>+	.irq = IMX_GPIO_TO_IRQ(GPIO_PMIC_INT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init imx35_3ds_init_mc13892(void)</div><div class='add'>+{</div><div class='add'>+	int ret = gpio_request_one(GPIO_PMIC_INT, GPIOF_DIR_IN, "pmic irq");</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("failed to get pmic irq: %d\n", ret);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i2c_register_board_info(0, &amp;mx35_3ds_i2c_mc13892, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mx35_3ds_otg_init(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	return mx35_initialize_usb_hw(pdev-&gt;id, MXC_EHCI_INTERNAL_PHY);</div><div class='hunk'>@@ -412,6 +602,8 @@ static void __init mx35_3ds_init(void)</div><div class='ctx'> 	imx35_fb_pdev = imx35_add_mx3_sdc_fb(&amp;mx3fb_pdata);</div><div class='ctx'> 	mx35_3ds_lcd.dev.parent = &amp;imx35_fb_pdev-&gt;dev;</div><div class='ctx'> 	platform_device_register(&amp;mx35_3ds_lcd);</div><div class='add'>+</div><div class='add'>+	imx35_3ds_init_mc13892();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init mx35pdk_timer_init(void)</div><div class='hunk'>@@ -419,7 +611,7 @@ static void __init mx35pdk_timer_init(void)</div><div class='ctx'> 	mx35_clocks_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct sys_timer mx35pdk_timer = {</div><div class='add'>+static struct sys_timer mx35pdk_timer = {</div><div class='ctx'> 	.init	= mx35pdk_timer_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/mach-mx51_3ds.c b/arch/arm/mach-imx/mach-mx51_3ds.c<br/>index 83eab4176ca4..3c5b163923f6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx51_3ds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-mx51_3ds.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx51_3ds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx51_3ds.c</a></div><div class='hunk'>@@ -175,5 +175,6 @@ MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board")</div><div class='ctx'> 	.handle_irq = imx51_handle_irq,</div><div class='ctx'> 	.timer = &amp;mx51_3ds_timer,</div><div class='ctx'> 	.init_machine = mx51_3ds_init,</div><div class='add'>+	.init_late	= imx51_init_late,</div><div class='ctx'> 	.restart	= mxc_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c<br/>index e4b822e9f719..dde397014d4b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx51_babbage.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-mx51_babbage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx51_babbage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx51_babbage.c</a></div><div class='hunk'>@@ -163,6 +163,12 @@ static iomux_v3_cfg_t mx51babbage_pads[] = {</div><div class='ctx'> 	MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,</div><div class='ctx'> 	MX51_PAD_CSPI1_SS0__GPIO4_24,</div><div class='ctx'> 	MX51_PAD_CSPI1_SS1__GPIO4_25,</div><div class='add'>+</div><div class='add'>+	/* Audio */</div><div class='add'>+	MX51_PAD_AUD3_BB_TXD__AUD3_TXD,</div><div class='add'>+	MX51_PAD_AUD3_BB_RXD__AUD3_RXD,</div><div class='add'>+	MX51_PAD_AUD3_BB_CK__AUD3_TXC,</div><div class='add'>+	MX51_PAD_AUD3_BB_FS__AUD3_TXFS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Serial ports */</div><div class='hunk'>@@ -426,5 +432,6 @@ MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")</div><div class='ctx'> 	.handle_irq = imx51_handle_irq,</div><div class='ctx'> 	.timer = &amp;mx51_babbage_timer,</div><div class='ctx'> 	.init_machine = mx51_babbage_init,</div><div class='add'>+	.init_late	= imx51_init_late,</div><div class='ctx'> 	.restart	= mxc_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-mx51_efikamx.c b/arch/arm/mach-imx/mach-mx51_efikamx.c<br/>index 586e9f822124..8d09c0126cab 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx51_efikamx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-mx51_efikamx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx51_efikamx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx51_efikamx.c</a></div><div class='hunk'>@@ -207,29 +207,32 @@ static void mx51_efikamx_power_off(void)</div><div class='ctx'> </div><div class='ctx'> static int __init mx51_efikamx_power_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (machine_is_mx51_efikamx()) {</div><div class='del'>-		pwgt1 = regulator_get(NULL, "pwgt1");</div><div class='del'>-		pwgt2 = regulator_get(NULL, "pwgt2");</div><div class='del'>-		if (!IS_ERR(pwgt1) &amp;&amp; !IS_ERR(pwgt2)) {</div><div class='del'>-			regulator_enable(pwgt1);</div><div class='del'>-			regulator_enable(pwgt2);</div><div class='del'>-		}</div><div class='del'>-		gpio_request(EFIKAMX_POWEROFF, "poweroff");</div><div class='del'>-		pm_power_off = mx51_efikamx_power_off;</div><div class='del'>-</div><div class='del'>-		/* enable coincell charger. maybe need a small power driver ? */</div><div class='del'>-		coincell = regulator_get(NULL, "coincell");</div><div class='del'>-		if (!IS_ERR(coincell)) {</div><div class='del'>-			regulator_set_voltage(coincell, 3000000, 3000000);</div><div class='del'>-			regulator_enable(coincell);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		regulator_has_full_constraints();</div><div class='add'>+	pwgt1 = regulator_get(NULL, "pwgt1");</div><div class='add'>+	pwgt2 = regulator_get(NULL, "pwgt2");</div><div class='add'>+	if (!IS_ERR(pwgt1) &amp;&amp; !IS_ERR(pwgt2)) {</div><div class='add'>+		regulator_enable(pwgt1);</div><div class='add'>+		regulator_enable(pwgt2);</div><div class='add'>+	}</div><div class='add'>+	gpio_request(EFIKAMX_POWEROFF, "poweroff");</div><div class='add'>+	pm_power_off = mx51_efikamx_power_off;</div><div class='add'>+</div><div class='add'>+	/* enable coincell charger. maybe need a small power driver ? */</div><div class='add'>+	coincell = regulator_get(NULL, "coincell");</div><div class='add'>+	if (!IS_ERR(coincell)) {</div><div class='add'>+		regulator_set_voltage(coincell, 3000000, 3000000);</div><div class='add'>+		regulator_enable(coincell);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	regulator_has_full_constraints();</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-late_initcall(mx51_efikamx_power_init);</div><div class='add'>+</div><div class='add'>+static void __init mx51_efikamx_init_late(void)</div><div class='add'>+{</div><div class='add'>+	imx51_init_late();</div><div class='add'>+	mx51_efikamx_power_init();</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static void __init mx51_efikamx_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -284,8 +287,7 @@ static struct sys_timer mx51_efikamx_timer = {</div><div class='ctx'> 	.init = mx51_efikamx_timer_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")</div><div class='del'>-	/* Maintainer: Amit Kucheria &lt;amit.kucheria@linaro.org&gt; */</div><div class='add'>+MACHINE_START(MX51_EFIKAMX, "Genesi Efika MX (Smarttop)")</div><div class='ctx'> 	.atag_offset = 0x100,</div><div class='ctx'> 	.map_io = mx51_map_io,</div><div class='ctx'> 	.init_early = imx51_init_early,</div><div class='hunk'>@@ -293,5 +295,6 @@ MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")</div><div class='ctx'> 	.handle_irq = imx51_handle_irq,</div><div class='ctx'> 	.timer = &amp;mx51_efikamx_timer,</div><div class='ctx'> 	.init_machine = mx51_efikamx_init,</div><div class='add'>+	.init_late = mx51_efikamx_init_late,</div><div class='ctx'> 	.restart = mx51_efikamx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-mx51_efikasb.c b/arch/arm/mach-imx/mach-mx51_efikasb.c<br/>index 24aded9e109f..fdbd181b97ef 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx51_efikasb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-mx51_efikasb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-mx51_efikasb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-mx51_efikasb.c</a></div><div class='hunk'>@@ -211,22 +211,25 @@ static void mx51_efikasb_power_off(void)</div><div class='ctx'> </div><div class='ctx'> static int __init mx51_efikasb_power_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (machine_is_mx51_efikasb()) {</div><div class='del'>-		pwgt1 = regulator_get(NULL, "pwgt1");</div><div class='del'>-		pwgt2 = regulator_get(NULL, "pwgt2");</div><div class='del'>-		if (!IS_ERR(pwgt1) &amp;&amp; !IS_ERR(pwgt2)) {</div><div class='del'>-			regulator_enable(pwgt1);</div><div class='del'>-			regulator_enable(pwgt2);</div><div class='del'>-		}</div><div class='del'>-		gpio_request(EFIKASB_POWEROFF, "poweroff");</div><div class='del'>-		pm_power_off = mx51_efikasb_power_off;</div><div class='del'>-</div><div class='del'>-		regulator_has_full_constraints();</div><div class='add'>+	pwgt1 = regulator_get(NULL, "pwgt1");</div><div class='add'>+	pwgt2 = regulator_get(NULL, "pwgt2");</div><div class='add'>+	if (!IS_ERR(pwgt1) &amp;&amp; !IS_ERR(pwgt2)) {</div><div class='add'>+		regulator_enable(pwgt1);</div><div class='add'>+		regulator_enable(pwgt2);</div><div class='ctx'> 	}</div><div class='add'>+	gpio_request(EFIKASB_POWEROFF, "poweroff");</div><div class='add'>+	pm_power_off = mx51_efikasb_power_off;</div><div class='add'>+</div><div class='add'>+	regulator_has_full_constraints();</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-late_initcall(mx51_efikasb_power_init);</div><div class='add'>+</div><div class='add'>+static void __init mx51_efikasb_init_late(void)</div><div class='add'>+{</div><div class='add'>+	imx51_init_late();</div><div class='add'>+	mx51_efikasb_power_init();</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /* 01     R1.3 board</div><div class='ctx'>    10     R2.0 board */</div><div class='hunk'>@@ -280,13 +283,14 @@ static struct sys_timer mx51_efikasb_timer = {</div><div class='ctx'> 	.init	= mx51_efikasb_timer_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-MACHINE_START(MX51_EFIKASB, "Genesi Efika Smartbook")</div><div class='add'>+MACHINE_START(MX51_EFIKASB, "Genesi Efika MX (Smartbook)")</div><div class='ctx'> 	.atag_offset = 0x100,</div><div class='ctx'> 	.map_io = mx51_map_io,</div><div class='ctx'> 	.init_early = imx51_init_early,</div><div class='ctx'> 	.init_irq = mx51_init_irq,</div><div class='ctx'> 	.handle_irq = imx51_handle_irq,</div><div class='ctx'> 	.init_machine =  efikasb_board_init,</div><div class='add'>+	.init_late = mx51_efikasb_init_late,</div><div class='ctx'> 	.timer = &amp;mx51_efikasb_timer,</div><div class='ctx'> 	.restart	= mxc_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c<br/>index 5fddf94cc969..0a40004154f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-pcm037.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-pcm037.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-pcm037.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-pcm037.c</a></div><div class='hunk'>@@ -683,7 +683,7 @@ static void __init pcm037_timer_init(void)</div><div class='ctx'> 	mx31_clocks_init(26000000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct sys_timer pcm037_timer = {</div><div class='add'>+static struct sys_timer pcm037_timer = {</div><div class='ctx'> 	.init	= pcm037_timer_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -694,6 +694,11 @@ static void __init pcm037_reserve(void)</div><div class='ctx'> 			MX3_CAMERA_BUF_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init pcm037_init_late(void)</div><div class='add'>+{</div><div class='add'>+	pcm037_eet_init_devices();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> MACHINE_START(PCM037, "Phytec Phycore pcm037")</div><div class='ctx'> 	/* Maintainer: Pengutronix */</div><div class='ctx'> 	.atag_offset = 0x100,</div><div class='hunk'>@@ -704,5 +709,6 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037")</div><div class='ctx'> 	.handle_irq = imx31_handle_irq,</div><div class='ctx'> 	.timer = &amp;pcm037_timer,</div><div class='ctx'> 	.init_machine = pcm037_init,</div><div class='add'>+	.init_late = pcm037_init_late,</div><div class='ctx'> 	.restart	= mxc_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-pcm037_eet.c b/arch/arm/mach-imx/mach-pcm037_eet.c<br/>index 1b7606bef8f4..11ffa81ad17d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-pcm037_eet.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-pcm037_eet.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-pcm037_eet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-pcm037_eet.c</a></div><div class='hunk'>@@ -160,9 +160,9 @@ static const struct gpio_keys_platform_data</div><div class='ctx'> 	.rep		= 0, /* No auto-repeat */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init eet_init_devices(void)</div><div class='add'>+int __init pcm037_eet_init_devices(void)</div><div class='ctx'> {</div><div class='del'>-	if (!machine_is_pcm037() || pcm037_variant() != PCM037_EET)</div><div class='add'>+	if (pcm037_variant() != PCM037_EET)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	mxc_iomux_setup_multiple_pins(pcm037_eet_pins,</div><div class='hunk'>@@ -176,4 +176,3 @@ static int __init eet_init_devices(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-late_initcall(eet_init_devices);</div><div class='head'>diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c<br/>index 237474fcca23..73585f55cca0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-pcm043.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-pcm043.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-pcm043.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-pcm043.c</a></div><div class='hunk'>@@ -399,7 +399,7 @@ static void __init pcm043_timer_init(void)</div><div class='ctx'> 	mx35_clocks_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct sys_timer pcm043_timer = {</div><div class='add'>+static struct sys_timer pcm043_timer = {</div><div class='ctx'> 	.init	= pcm043_timer_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c<br/>index 033257e553ef..add8c69c6c1a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-vpr200.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mach-vpr200.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mach-vpr200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mach-vpr200.c</a></div><div class='hunk'>@@ -310,7 +310,7 @@ static void __init vpr200_timer_init(void)</div><div class='ctx'> 	mx35_clocks_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct sys_timer vpr200_timer = {</div><div class='add'>+static struct sys_timer vpr200_timer = {</div><div class='ctx'> 	.init	= vpr200_timer_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c<br/>index 2bded591d5c2..fcafd3dafb8c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mm-imx1.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mm-imx1.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mm-imx1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mm-imx1.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -58,4 +59,5 @@ void __init imx1_soc_init(void)</div><div class='ctx'> 						MX1_GPIO_INT_PORTC, 0);</div><div class='ctx'> 	mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256,</div><div class='ctx'> 						MX1_GPIO_INT_PORTD, 0);</div><div class='add'>+	pinctrl_provide_dummies();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c<br/>index 14d540edfd1e..5f43905e5290 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mm-imx21.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mm-imx21.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mm-imx21.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mm-imx21.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;mach/common.h&gt;</div><div class='ctx'> #include &lt;mach/devices-common.h&gt;</div><div class='hunk'>@@ -88,6 +89,7 @@ void __init imx21_soc_init(void)</div><div class='ctx'> 	mxc_register_gpio("imx21-gpio", 4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);</div><div class='ctx'> 	mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);</div><div class='ctx'> </div><div class='add'>+	pinctrl_provide_dummies();</div><div class='ctx'> 	imx_add_imx_dma();</div><div class='ctx'> 	platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res,</div><div class='ctx'> 					ARRAY_SIZE(imx21_audmux_res));</div><div class='head'>diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c<br/>index 153b457acdc0..6ff37140a4f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mm-imx25.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mm-imx25.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mm-imx25.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mm-imx25.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='hunk'>@@ -95,6 +96,7 @@ void __init imx25_soc_init(void)</div><div class='ctx'> 	mxc_register_gpio("imx31-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);</div><div class='ctx'> 	mxc_register_gpio("imx31-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);</div><div class='ctx'> </div><div class='add'>+	pinctrl_provide_dummies();</div><div class='ctx'> 	/* i.mx25 has the i.mx35 type sdma */</div><div class='ctx'> 	imx_add_imx_sdma("imx35-sdma", MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &amp;imx25_sdma_pdata);</div><div class='ctx'> 	/* i.mx25 has the i.mx31 type audmux */</div><div class='head'>diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c<br/>index 8cb3f5e3e569..25662558e018 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mm-imx27.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mm-imx27.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mm-imx27.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mm-imx27.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;mach/common.h&gt;</div><div class='ctx'> #include &lt;mach/devices-common.h&gt;</div><div class='hunk'>@@ -89,6 +90,7 @@ void __init imx27_soc_init(void)</div><div class='ctx'> 	mxc_register_gpio("imx21-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);</div><div class='ctx'> 	mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);</div><div class='ctx'> </div><div class='add'>+	pinctrl_provide_dummies();</div><div class='ctx'> 	imx_add_imx_dma();</div><div class='ctx'> 	/* imx27 has the imx21 type audmux */</div><div class='ctx'> 	platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res,</div><div class='head'>diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c<br/>index 74127389e7ab..967ed5b35a45 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mm-imx3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mm-imx3.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mm-imx3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mm-imx3.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/system_misc.h&gt;</div><div class='hunk'>@@ -31,6 +32,10 @@</div><div class='ctx'> #include &lt;mach/iomux-v3.h&gt;</div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "crmregs-imx3.h"</div><div class='add'>+</div><div class='add'>+void __iomem *mx3_ccm_base;</div><div class='add'>+</div><div class='ctx'> static void imx3_idle(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long reg = 0;</div><div class='hunk'>@@ -137,6 +142,7 @@ void __init imx31_init_early(void)</div><div class='ctx'> 	mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));</div><div class='ctx'> 	arch_ioremap_caller = imx3_ioremap_caller;</div><div class='ctx'> 	arm_pm_idle = imx3_idle;</div><div class='add'>+	mx3_ccm_base = MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init mx31_init_irq(void)</div><div class='hunk'>@@ -210,6 +216,7 @@ void __init imx35_init_early(void)</div><div class='ctx'> 	mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));</div><div class='ctx'> 	arm_pm_idle = imx3_idle;</div><div class='ctx'> 	arch_ioremap_caller = imx3_ioremap_caller;</div><div class='add'>+	mx3_ccm_base = MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init mx35_init_irq(void)</div><div class='hunk'>@@ -267,6 +274,7 @@ void __init imx35_soc_init(void)</div><div class='ctx'> 	mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);</div><div class='ctx'> 	mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);</div><div class='ctx'> </div><div class='add'>+	pinctrl_provide_dummies();</div><div class='ctx'> 	if (to_version == 1) {</div><div class='ctx'> 		strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin",</div><div class='ctx'> 			strlen(imx35_sdma_pdata.fw_name));</div><div class='head'>diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c<br/>index e10f3914fcfe..feeee17da96b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/mm-imx5.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/mm-imx5.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/mm-imx5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/mm-imx5.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/system_misc.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='hunk'>@@ -32,6 +33,7 @@ static void imx5_idle(void)</div><div class='ctx'> 		gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");</div><div class='ctx'> 		if (IS_ERR(gpc_dvfs_clk))</div><div class='ctx'> 			return;</div><div class='add'>+		clk_prepare(gpc_dvfs_clk);</div><div class='ctx'> 	}</div><div class='ctx'> 	clk_enable(gpc_dvfs_clk);</div><div class='ctx'> 	mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);</div><div class='hunk'>@@ -223,6 +225,7 @@ void __init imx53_soc_init(void)</div><div class='ctx'> 	mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);</div><div class='ctx'> 	mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);</div><div class='ctx'> </div><div class='add'>+	pinctrl_provide_dummies();</div><div class='ctx'> 	/* i.mx53 has the i.mx35 type sdma */</div><div class='ctx'> 	imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &amp;imx53_sdma_pdata);</div><div class='ctx'> </div><div class='hunk'>@@ -234,3 +237,8 @@ void __init imx53_soc_init(void)</div><div class='ctx'> 	platform_device_register_simple("imx31-audmux", 0, imx53_audmux_res,</div><div class='ctx'> 					ARRAY_SIZE(imx53_audmux_res));</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __init imx51_init_late(void)</div><div class='add'>+{</div><div class='add'>+	mx51_neon_fixup();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-imx/pcm037.h b/arch/arm/mach-imx/pcm037.h<br/>index d6929721a5fd..7d167690e17d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/pcm037.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/pcm037.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/pcm037.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/pcm037.h</a></div><div class='hunk'>@@ -8,4 +8,10 @@ enum pcm037_board_variant {</div><div class='ctx'> </div><div class='ctx'> extern enum pcm037_board_variant pcm037_variant(void);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MACH_PCM037_EET</div><div class='add'>+int pcm037_eet_init_devices(void);</div><div class='add'>+#else</div><div class='add'>+static inline int pcm037_eet_init_devices(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-imx/pm-imx3.c b/arch/arm/mach-imx/pm-imx3.c<br/>index b3752439632e..822103bdb709 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-imx/pm-imx3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-imx/pm-imx3.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-imx/pm-imx3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-imx/pm-imx3.c</a></div><div class='hunk'>@@ -21,14 +21,14 @@</div><div class='ctx'>  */</div><div class='ctx'> void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode)</div><div class='ctx'> {</div><div class='del'>-	int reg = __raw_readl(MXC_CCM_CCMR);</div><div class='add'>+	int reg = __raw_readl(mx3_ccm_base + MXC_CCM_CCMR);</div><div class='ctx'> 	reg &amp;= ~MXC_CCM_CCMR_LPM_MASK;</div><div class='ctx'> </div><div class='ctx'> 	switch (mode) {</div><div class='ctx'> 	case MX3_WAIT:</div><div class='ctx'> 		if (cpu_is_mx35())</div><div class='ctx'> 			reg |= MXC_CCM_CCMR_LPM_WAIT_MX35;</div><div class='del'>-		__raw_writel(reg, MXC_CCM_CCMR);</div><div class='add'>+		__raw_writel(reg, mx3_ccm_base + MXC_CCM_CCMR);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_err("Unknown cpu power mode: %d\n", mode);</div><div class='head'>diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c<br/>index 3e538da6cb1f..e428f3ab15c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-integrator/impd1.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-integrator/impd1.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-integrator/impd1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/impd1.c</a></div><div class='hunk'>@@ -398,24 +398,16 @@ static int impd1_probe(struct lm_device *dev)</div><div class='ctx'> 		struct impd1_device *idev = impd1_devs + i;</div><div class='ctx'> 		struct amba_device *d;</div><div class='ctx'> 		unsigned long pc_base;</div><div class='add'>+		char devname[32];</div><div class='ctx'> </div><div class='ctx'> 		pc_base = dev-&gt;resource.start + idev-&gt;offset;</div><div class='del'>-</div><div class='del'>-		d = amba_device_alloc(NULL, pc_base, SZ_4K);</div><div class='del'>-		if (!d)</div><div class='add'>+		snprintf(devname, 32, "lm%x:%5.5lx", dev-&gt;id, idev-&gt;offset &gt;&gt; 12);</div><div class='add'>+		d = amba_ahb_device_add(&amp;dev-&gt;dev, devname, pc_base, SZ_4K,</div><div class='add'>+					dev-&gt;irq, dev-&gt;irq,</div><div class='add'>+					idev-&gt;platform_data, idev-&gt;id);</div><div class='add'>+		if (IS_ERR(d)) {</div><div class='add'>+			dev_err(&amp;dev-&gt;dev, "unable to register device: %ld\n", PTR_ERR(d));</div><div class='ctx'> 			continue;</div><div class='del'>-</div><div class='del'>-		dev_set_name(&amp;d-&gt;dev, "lm%x:%5.5lx", dev-&gt;id, idev-&gt;offset &gt;&gt; 12);</div><div class='del'>-		d-&gt;dev.parent	= &amp;dev-&gt;dev;</div><div class='del'>-		d-&gt;irq[0]	= dev-&gt;irq;</div><div class='del'>-		d-&gt;irq[1]	= dev-&gt;irq;</div><div class='del'>-		d-&gt;periphid	= idev-&gt;id;</div><div class='del'>-		d-&gt;dev.platform_data = idev-&gt;platform_data;</div><div class='del'>-</div><div class='del'>-		ret = amba_device_add(d, &amp;dev-&gt;resource);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(&amp;d-&gt;dev, "unable to register device: %d\n", ret);</div><div class='del'>-			amba_device_put(d);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-integrator/include/mach/entry-macro.S b/arch/arm/mach-integrator/include/mach/entry-macro.S<br/>deleted file mode 100644<br/>index 5cc7b85ad9df..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-integrator/include/mach/entry-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-integrator/include/mach/entry-macro.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,39 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-integrator/include/mach/entry-macro.S</div><div class='del'>- *</div><div class='del'>- * Low-level IRQ helper macros for Integrator platforms</div><div class='del'>- *</div><div class='del'>- * This file is licensed under  the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/platform.h&gt;</div><div class='del'>-#include &lt;mach/irqs.h&gt;</div><div class='del'>-</div><div class='del'>-		.macro  get_irqnr_preamble, base, tmp</div><div class='del'>-		.endm</div><div class='del'>-</div><div class='del'>-		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp</div><div class='del'>-/* FIXME: should not be using soo many LDRs here */</div><div class='del'>-		ldr	\base, =IO_ADDRESS(INTEGRATOR_IC_BASE)</div><div class='del'>-		mov	\irqnr, #IRQ_PIC_START</div><div class='del'>-		ldr	\irqstat, [\base, #IRQ_STATUS]		@ get masked status</div><div class='del'>-		ldr	\base, =IO_ADDRESS(INTEGRATOR_HDR_BASE)</div><div class='del'>-		teq	\irqstat, #0</div><div class='del'>-		ldreq	\irqstat, [\base, #(INTEGRATOR_HDR_IC_OFFSET+IRQ_STATUS)]</div><div class='del'>-		moveq	\irqnr, #IRQ_CIC_START</div><div class='del'>-</div><div class='del'>-1001:		tst	\irqstat, #15</div><div class='del'>-		bne	1002f</div><div class='del'>-		add	\irqnr, \irqnr, #4</div><div class='del'>-		movs	\irqstat, \irqstat, lsr #4</div><div class='del'>-		bne	1001b</div><div class='del'>-1002:		tst	\irqstat, #1</div><div class='del'>-		bne	1003f</div><div class='del'>-		add	\irqnr, \irqnr, #1</div><div class='del'>-		movs	\irqstat, \irqstat, lsr #1</div><div class='del'>-		bne	1002b</div><div class='del'>-1003:		/* EQ will be set if no irqs pending */</div><div class='del'>-		.endm</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-integrator/include/mach/irqs.h b/arch/arm/mach-integrator/include/mach/irqs.h<br/>index a19a1a2fcf6b..7371018455d2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-integrator/include/mach/irqs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-integrator/include/mach/irqs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-integrator/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/include/mach/irqs.h</a></div><div class='hunk'>@@ -22,37 +22,37 @@</div><div class='ctx'> /* </div><div class='ctx'>  *  Interrupt numbers</div><div class='ctx'>  */</div><div class='del'>-#define IRQ_PIC_START			0</div><div class='del'>-#define IRQ_SOFTINT			0</div><div class='del'>-#define IRQ_UARTINT0			1</div><div class='del'>-#define IRQ_UARTINT1			2</div><div class='del'>-#define IRQ_KMIINT0			3</div><div class='del'>-#define IRQ_KMIINT1			4</div><div class='del'>-#define IRQ_TIMERINT0			5</div><div class='del'>-#define IRQ_TIMERINT1			6</div><div class='del'>-#define IRQ_TIMERINT2			7</div><div class='del'>-#define IRQ_RTCINT			8</div><div class='del'>-#define IRQ_AP_EXPINT0			9</div><div class='del'>-#define IRQ_AP_EXPINT1			10</div><div class='del'>-#define IRQ_AP_EXPINT2			11</div><div class='del'>-#define IRQ_AP_EXPINT3			12</div><div class='del'>-#define IRQ_AP_PCIINT0			13</div><div class='del'>-#define IRQ_AP_PCIINT1			14</div><div class='del'>-#define IRQ_AP_PCIINT2			15</div><div class='del'>-#define IRQ_AP_PCIINT3			16</div><div class='del'>-#define IRQ_AP_V3INT			17</div><div class='del'>-#define IRQ_AP_CPINT0			18</div><div class='del'>-#define IRQ_AP_CPINT1			19</div><div class='del'>-#define IRQ_AP_LBUSTIMEOUT 		20</div><div class='del'>-#define IRQ_AP_APCINT			21</div><div class='del'>-#define IRQ_CP_CLCDCINT			22</div><div class='del'>-#define IRQ_CP_MMCIINT0			23</div><div class='del'>-#define IRQ_CP_MMCIINT1			24</div><div class='del'>-#define IRQ_CP_AACIINT			25</div><div class='del'>-#define IRQ_CP_CPPLDINT			26</div><div class='del'>-#define IRQ_CP_ETHINT			27</div><div class='del'>-#define IRQ_CP_TSPENINT			28</div><div class='del'>-#define IRQ_PIC_END			31</div><div class='add'>+#define IRQ_PIC_START			1</div><div class='add'>+#define IRQ_SOFTINT			1</div><div class='add'>+#define IRQ_UARTINT0			2</div><div class='add'>+#define IRQ_UARTINT1			3</div><div class='add'>+#define IRQ_KMIINT0			4</div><div class='add'>+#define IRQ_KMIINT1			5</div><div class='add'>+#define IRQ_TIMERINT0			6</div><div class='add'>+#define IRQ_TIMERINT1			7</div><div class='add'>+#define IRQ_TIMERINT2			8</div><div class='add'>+#define IRQ_RTCINT			9</div><div class='add'>+#define IRQ_AP_EXPINT0			10</div><div class='add'>+#define IRQ_AP_EXPINT1			11</div><div class='add'>+#define IRQ_AP_EXPINT2			12</div><div class='add'>+#define IRQ_AP_EXPINT3			13</div><div class='add'>+#define IRQ_AP_PCIINT0			14</div><div class='add'>+#define IRQ_AP_PCIINT1			15</div><div class='add'>+#define IRQ_AP_PCIINT2			16</div><div class='add'>+#define IRQ_AP_PCIINT3			17</div><div class='add'>+#define IRQ_AP_V3INT			18</div><div class='add'>+#define IRQ_AP_CPINT0			19</div><div class='add'>+#define IRQ_AP_CPINT1			20</div><div class='add'>+#define IRQ_AP_LBUSTIMEOUT 		21</div><div class='add'>+#define IRQ_AP_APCINT			22</div><div class='add'>+#define IRQ_CP_CLCDCINT			23</div><div class='add'>+#define IRQ_CP_MMCIINT0			24</div><div class='add'>+#define IRQ_CP_MMCIINT1			25</div><div class='add'>+#define IRQ_CP_AACIINT			26</div><div class='add'>+#define IRQ_CP_CPPLDINT			27</div><div class='add'>+#define IRQ_CP_ETHINT			28</div><div class='add'>+#define IRQ_CP_TSPENINT			29</div><div class='add'>+#define IRQ_PIC_END			29</div><div class='ctx'> </div><div class='ctx'> #define IRQ_CIC_START			32</div><div class='ctx'> #define IRQ_CM_SOFTINT			32</div><div class='hunk'>@@ -80,4 +80,3 @@</div><div class='ctx'> </div><div class='ctx'> #define NR_IRQS_INTEGRATOR_AP		34</div><div class='ctx'> #define NR_IRQS_INTEGRATOR_CP		47</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c<br/>index 871f148ffd72..c857501c5783 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-integrator/integrator_ap.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-integrator/integrator_ap.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-integrator/integrator_ap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/integrator_ap.c</a></div><div class='hunk'>@@ -162,12 +162,6 @@ static void __init ap_map_io(void)</div><div class='ctx'> </div><div class='ctx'> #define INTEGRATOR_SC_VALID_INT	0x003fffff</div><div class='ctx'> </div><div class='del'>-static struct fpga_irq_data sc_irq_data = {</div><div class='del'>-	.base		= VA_IC_BASE,</div><div class='del'>-	.irq_start	= 0,</div><div class='del'>-	.chip.name	= "SC",</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void __init ap_init_irq(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Disable all interrupts initially. */</div><div class='hunk'>@@ -178,7 +172,8 @@ static void __init ap_init_irq(void)</div><div class='ctx'> 	writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);</div><div class='ctx'> 	writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);</div><div class='ctx'> </div><div class='del'>-	fpga_irq_init(-1, INTEGRATOR_SC_VALID_INT, &amp;sc_irq_data);</div><div class='add'>+	fpga_irq_init(VA_IC_BASE, "SC", IRQ_PIC_START,</div><div class='add'>+		-1, INTEGRATOR_SC_VALID_INT, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM</div><div class='hunk'>@@ -478,6 +473,7 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")</div><div class='ctx'> 	.nr_irqs	= NR_IRQS_INTEGRATOR_AP,</div><div class='ctx'> 	.init_early	= integrator_init_early,</div><div class='ctx'> 	.init_irq	= ap_init_irq,</div><div class='add'>+	.handle_irq	= fpga_handle_irq,</div><div class='ctx'> 	.timer		= &amp;ap_timer,</div><div class='ctx'> 	.init_machine	= ap_init,</div><div class='ctx'> 	.restart	= integrator_restart,</div><div class='head'>diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c<br/>index 48a115a91d9d..a56c53608939 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-integrator/integrator_cp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-integrator/integrator_cp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-integrator/integrator_cp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/integrator_cp.c</a></div><div class='hunk'>@@ -143,30 +143,14 @@ static void __init intcp_map_io(void)</div><div class='ctx'> 	iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct fpga_irq_data cic_irq_data = {</div><div class='del'>-	.base		= INTCP_VA_CIC_BASE,</div><div class='del'>-	.irq_start	= IRQ_CIC_START,</div><div class='del'>-	.chip.name	= "CIC",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct fpga_irq_data pic_irq_data = {</div><div class='del'>-	.base		= INTCP_VA_PIC_BASE,</div><div class='del'>-	.irq_start	= IRQ_PIC_START,</div><div class='del'>-	.chip.name	= "PIC",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct fpga_irq_data sic_irq_data = {</div><div class='del'>-	.base		= INTCP_VA_SIC_BASE,</div><div class='del'>-	.irq_start	= IRQ_SIC_START,</div><div class='del'>-	.chip.name	= "SIC",</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void __init intcp_init_irq(void)</div><div class='ctx'> {</div><div class='del'>-	u32 pic_mask, sic_mask;</div><div class='add'>+	u32 pic_mask, cic_mask, sic_mask;</div><div class='ctx'> </div><div class='add'>+	/* These masks are for the HW IRQ registers */</div><div class='ctx'> 	pic_mask = ~((~0u) &lt;&lt; (11 - IRQ_PIC_START));</div><div class='ctx'> 	pic_mask |= (~((~0u) &lt;&lt; (29 - 22))) &lt;&lt; 22;</div><div class='add'>+	cic_mask = ~((~0u) &lt;&lt; (1 + IRQ_CIC_END - IRQ_CIC_START));</div><div class='ctx'> 	sic_mask = ~((~0u) &lt;&lt; (1 + IRQ_SIC_END - IRQ_SIC_START));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -179,12 +163,14 @@ static void __init intcp_init_irq(void)</div><div class='ctx'> 	writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);</div><div class='ctx'> 	writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);</div><div class='ctx'> </div><div class='del'>-	fpga_irq_init(-1, pic_mask, &amp;pic_irq_data);</div><div class='add'>+	fpga_irq_init(INTCP_VA_PIC_BASE, "PIC", IRQ_PIC_START,</div><div class='add'>+		      -1, pic_mask, NULL);</div><div class='ctx'> </div><div class='del'>-	fpga_irq_init(-1, ~((~0u) &lt;&lt; (1 + IRQ_CIC_END - IRQ_CIC_START)),</div><div class='del'>-		&amp;cic_irq_data);</div><div class='add'>+	fpga_irq_init(INTCP_VA_CIC_BASE, "CIC", IRQ_CIC_START,</div><div class='add'>+		      -1, cic_mask, NULL);</div><div class='ctx'> </div><div class='del'>-	fpga_irq_init(IRQ_CP_CPPLDINT, sic_mask, &amp;sic_irq_data);</div><div class='add'>+	fpga_irq_init(INTCP_VA_SIC_BASE, "SIC", IRQ_SIC_START,</div><div class='add'>+		      IRQ_CP_CPPLDINT, sic_mask, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -467,6 +453,7 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")</div><div class='ctx'> 	.nr_irqs	= NR_IRQS_INTEGRATOR_CP,</div><div class='ctx'> 	.init_early	= intcp_init_early,</div><div class='ctx'> 	.init_irq	= intcp_init_irq,</div><div class='add'>+	.handle_irq	= fpga_handle_irq,</div><div class='ctx'> 	.timer		= &amp;cp_timer,</div><div class='ctx'> 	.init_machine	= intcp_init,</div><div class='ctx'> 	.restart	= integrator_restart,</div><div class='head'>diff --git a/arch/arm/mach-integrator/pci.c b/arch/arm/mach-integrator/pci.c<br/>index f1ca9c122861..6c1667e728f5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-integrator/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-integrator/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-integrator/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/pci.c</a></div><div class='hunk'>@@ -70,21 +70,10 @@</div><div class='ctx'>  */</div><div class='ctx'> static u8 __init integrator_swizzle(struct pci_dev *dev, u8 *pinp)</div><div class='ctx'> {</div><div class='del'>-	int pin = *pinp;</div><div class='add'>+	if (*pinp == 0)</div><div class='add'>+		*pinp = 1;</div><div class='ctx'> </div><div class='del'>-	if (pin == 0)</div><div class='del'>-		pin = 1;</div><div class='del'>-</div><div class='del'>-	while (dev-&gt;bus-&gt;self) {</div><div class='del'>-		pin = pci_swizzle_interrupt_pin(dev, pin);</div><div class='del'>-		/*</div><div class='del'>-		 * move up the chain of bridges, swizzling as we go.</div><div class='del'>-		 */</div><div class='del'>-		dev = dev-&gt;bus-&gt;self;</div><div class='del'>-	}</div><div class='del'>-	*pinp = pin;</div><div class='del'>-</div><div class='del'>-	return PCI_SLOT(dev-&gt;devfn);</div><div class='add'>+	return pci_common_swizzle(dev, pinp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int irq_tab[4] __initdata = {</div><div class='hunk'>@@ -109,7 +98,7 @@ static struct hw_pci integrator_pci __initdata = {</div><div class='ctx'> 	.map_irq		= integrator_map_irq,</div><div class='ctx'> 	.setup			= pci_v3_setup,</div><div class='ctx'> 	.nr_controllers		= 1,</div><div class='del'>-	.scan			= pci_v3_scan_bus,</div><div class='add'>+	.ops			= &amp;pci_v3_ops,</div><div class='ctx'> 	.preinit		= pci_v3_preinit,</div><div class='ctx'> 	.postinit		= pci_v3_postinit,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c<br/>index 67e6f9a9d1a0..b866880e82ac 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-integrator/pci_v3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-integrator/pci_v3.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-integrator/pci_v3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-integrator/pci_v3.c</a></div><div class='hunk'>@@ -340,7 +340,7 @@ static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='ctx'> 	return PCIBIOS_SUCCESSFUL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct pci_ops pci_v3_ops = {</div><div class='add'>+struct pci_ops pci_v3_ops = {</div><div class='ctx'> 	.read	= v3_read_config,</div><div class='ctx'> 	.write	= v3_write_config,</div><div class='ctx'> };</div><div class='hunk'>@@ -488,12 +488,6 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct pci_bus * __init pci_v3_scan_bus(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	return pci_scan_root_bus(NULL, sys-&gt;busnr, &amp;pci_v3_ops, sys,</div><div class='del'>-				 &amp;sys-&gt;resources);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * V3_LB_BASE? - local bus address</div><div class='ctx'>  * V3_LB_MAP?  - pci bus address</div><div class='head'>diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c<br/>index 5c96b73e6964..e3f3e7daa79e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-iop13xx/iq81340mc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-iop13xx/iq81340mc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-iop13xx/iq81340mc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop13xx/iq81340mc.c</a></div><div class='hunk'>@@ -54,7 +54,6 @@ iq81340mc_pcix_map_irq(const struct pci_dev *dev, u8 idsel, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci iq81340mc_pci __initdata = {</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.nr_controllers = 0,</div><div class='ctx'> 	.setup		= iop13xx_pci_setup,</div><div class='ctx'> 	.map_irq	= iq81340mc_pcix_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c<br/>index aa4dd750135a..060cddde2fd4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-iop13xx/iq81340sc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-iop13xx/iq81340sc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-iop13xx/iq81340sc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop13xx/iq81340sc.c</a></div><div class='hunk'>@@ -56,7 +56,6 @@ iq81340sc_atux_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci iq81340sc_pci __initdata = {</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.nr_controllers = 0,</div><div class='ctx'> 	.setup		= iop13xx_pci_setup,</div><div class='ctx'> 	.scan		= iop13xx_scan_bus,</div><div class='head'>diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c<br/>index 24069e03fdc1..9f369f09c29d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-iop32x/em7210.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-iop32x/em7210.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-iop32x/em7210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop32x/em7210.c</a></div><div class='hunk'>@@ -103,11 +103,10 @@ em7210_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci em7210_pci __initdata = {</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;iop3xx_ops,</div><div class='ctx'> 	.setup		= iop3xx_pci_setup,</div><div class='ctx'> 	.preinit	= iop3xx_pci_preinit,</div><div class='del'>-	.scan		= iop3xx_pci_scan_bus,</div><div class='ctx'> 	.map_irq	= em7210_pci_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c<br/>index 204e1d1cd766..c15a100ba779 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-iop32x/glantank.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-iop32x/glantank.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-iop32x/glantank.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop32x/glantank.c</a></div><div class='hunk'>@@ -96,11 +96,10 @@ glantank_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci glantank_pci __initdata = {</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;iop3xx_ops,</div><div class='ctx'> 	.setup		= iop3xx_pci_setup,</div><div class='ctx'> 	.preinit	= iop3xx_pci_preinit,</div><div class='del'>-	.scan		= iop3xx_pci_scan_bus,</div><div class='ctx'> 	.map_irq	= glantank_pci_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c<br/>index 3eb642af1cdc..ddd1c7ecfe57 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-iop32x/iq31244.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-iop32x/iq31244.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-iop32x/iq31244.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop32x/iq31244.c</a></div><div class='hunk'>@@ -130,11 +130,10 @@ ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci ep80219_pci __initdata = {</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;iop3xx_ops,</div><div class='ctx'> 	.setup		= iop3xx_pci_setup,</div><div class='ctx'> 	.preinit	= iop3xx_pci_preinit,</div><div class='del'>-	.scan		= iop3xx_pci_scan_bus,</div><div class='ctx'> 	.map_irq	= ep80219_pci_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -166,11 +165,10 @@ iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci iq31244_pci __initdata = {</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;iop3xx_ops,</div><div class='ctx'> 	.setup		= iop3xx_pci_setup,</div><div class='ctx'> 	.preinit	= iop3xx_pci_preinit,</div><div class='del'>-	.scan		= iop3xx_pci_scan_bus,</div><div class='ctx'> 	.map_irq	= iq31244_pci_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c<br/>index 2ec724b58a2c..bf155e6a3b45 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-iop32x/iq80321.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-iop32x/iq80321.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-iop32x/iq80321.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop32x/iq80321.c</a></div><div class='hunk'>@@ -101,11 +101,10 @@ iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci iq80321_pci __initdata = {</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;iop3xx_ops,</div><div class='ctx'> 	.setup		= iop3xx_pci_setup,</div><div class='ctx'> 	.preinit	= iop3xx_pci_preinit_cond,</div><div class='del'>-	.scan		= iop3xx_pci_scan_bus,</div><div class='ctx'> 	.map_irq	= iq80321_pci_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c<br/>index 6b6d55912444..5a7ae91e8849 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-iop32x/n2100.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-iop32x/n2100.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-iop32x/n2100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop32x/n2100.c</a></div><div class='hunk'>@@ -114,11 +114,10 @@ n2100_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci n2100_pci __initdata = {</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;iop3xx_ops,</div><div class='ctx'> 	.setup		= iop3xx_pci_setup,</div><div class='ctx'> 	.preinit	= iop3xx_pci_preinit,</div><div class='del'>-	.scan		= iop3xx_pci_scan_bus,</div><div class='ctx'> 	.map_irq	= n2100_pci_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c<br/>index abce934f3816..e74a7debe793 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-iop33x/iq80331.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-iop33x/iq80331.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-iop33x/iq80331.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop33x/iq80331.c</a></div><div class='hunk'>@@ -84,11 +84,10 @@ iq80331_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci iq80331_pci __initdata = {</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;iop3xx_ops,</div><div class='ctx'> 	.setup		= iop3xx_pci_setup,</div><div class='ctx'> 	.preinit	= iop3xx_pci_preinit_cond,</div><div class='del'>-	.scan		= iop3xx_pci_scan_bus,</div><div class='ctx'> 	.map_irq	= iq80331_pci_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c<br/>index 7513559e25bb..e2f5beece6e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-iop33x/iq80332.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-iop33x/iq80332.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-iop33x/iq80332.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-iop33x/iq80332.c</a></div><div class='hunk'>@@ -84,11 +84,10 @@ iq80332_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci iq80332_pci __initdata = {</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;iop3xx_ops,</div><div class='ctx'> 	.setup		= iop3xx_pci_setup,</div><div class='ctx'> 	.preinit	= iop3xx_pci_preinit_cond,</div><div class='del'>-	.scan		= iop3xx_pci_scan_bus,</div><div class='ctx'> 	.map_irq	= iq80332_pci_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp2000/Kconfig b/arch/arm/mach-ixp2000/Kconfig<br/>deleted file mode 100644<br/>index 08d2707f6ca8..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,72 +0,0 @@</div><div class='del'>-</div><div class='del'>-if ARCH_IXP2000</div><div class='del'>-</div><div class='del'>-config ARCH_SUPPORTS_BIG_ENDIAN</div><div class='del'>-	bool</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-menu "Intel IXP2400/2800 Implementation Options"</div><div class='del'>-</div><div class='del'>-comment "IXP2400/2800 Platforms"</div><div class='del'>-</div><div class='del'>-config ARCH_ENP2611</div><div class='del'>-	bool "Support Radisys ENP-2611"</div><div class='del'>-	help</div><div class='del'>-	  Say 'Y' here if you want your kernel to support the Radisys</div><div class='del'>-	  ENP2611 PCI network processing card. For more information on</div><div class='del'>-	  this card, see &lt;file:Documentation/arm/IXP2000&gt;.</div><div class='del'>-</div><div class='del'>-config ARCH_IXDP2400</div><div class='del'>-	bool "Support Intel IXDP2400"</div><div class='del'>-	help</div><div class='del'>-	  Say 'Y' here if you want your kernel to support the Intel</div><div class='del'>-	  IXDP2400 reference platform. For more information on</div><div class='del'>-	  this platform, see &lt;file:Documentation/arm/IXP2000&gt;.</div><div class='del'>-</div><div class='del'>-config ARCH_IXDP2800</div><div class='del'>-	bool "Support Intel IXDP2800"</div><div class='del'>-	help</div><div class='del'>-	  Say 'Y' here if you want your kernel to support the Intel</div><div class='del'>-	  IXDP2800 reference platform. For more information on</div><div class='del'>-	  this platform, see &lt;file:Documentation/arm/IXP2000&gt;.</div><div class='del'>-</div><div class='del'>-config ARCH_IXDP2X00</div><div class='del'>-	bool</div><div class='del'>-	depends on ARCH_IXDP2400 || ARCH_IXDP2800</div><div class='del'>-	default y	</div><div class='del'>-</div><div class='del'>-config ARCH_IXDP2401</div><div class='del'>-	bool "Support Intel IXDP2401"</div><div class='del'>-	help</div><div class='del'>-	  Say 'Y' here if you want your kernel to support the Intel</div><div class='del'>-	  IXDP2401 reference platform. For more information on</div><div class='del'>-	  this platform, see &lt;file:Documentation/arm/IXP2000&gt;.</div><div class='del'>-</div><div class='del'>-config ARCH_IXDP2801</div><div class='del'>-	bool "Support Intel IXDP2801 and IXDP28x5"</div><div class='del'>-	help</div><div class='del'>-	  Say 'Y' here if you want your kernel to support the Intel</div><div class='del'>-	  IXDP2801/2805/2855 reference platforms. For more information on</div><div class='del'>-	  this platform, see &lt;file:Documentation/arm/IXP2000&gt;.</div><div class='del'>-</div><div class='del'>-config MACH_IXDP28X5</div><div class='del'>-	bool</div><div class='del'>-	depends on ARCH_IXDP2801</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-config ARCH_IXDP2X01</div><div class='del'>-	bool</div><div class='del'>-	depends on ARCH_IXDP2401 || ARCH_IXDP2801</div><div class='del'>-	default y	</div><div class='del'>-</div><div class='del'>-config IXP2000_SUPPORT_BROKEN_PCI_IO</div><div class='del'>-	bool "Support broken PCI I/O on older IXP2000s"</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  Say 'N' here if you only intend to run your kernel on an</div><div class='del'>-	  IXP2000 B0 or later model and do not need the PCI I/O</div><div class='del'>-	  byteswap workaround.  Say 'Y' otherwise.</div><div class='del'>-</div><div class='del'>-endmenu</div><div class='del'>-</div><div class='del'>-endif</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/Makefile b/arch/arm/mach-ixp2000/Makefile<br/>deleted file mode 100644<br/>index 1e6139d42a92..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the linux kernel.</div><div class='del'>-#</div><div class='del'>-obj-y			:= core.o pci.o</div><div class='del'>-obj-m			:=</div><div class='del'>-obj-n			:=</div><div class='del'>-obj-			:=</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_ARCH_ENP2611)	+= enp2611.o</div><div class='del'>-obj-$(CONFIG_ARCH_IXDP2400)	+= ixdp2400.o</div><div class='del'>-obj-$(CONFIG_ARCH_IXDP2800)	+= ixdp2800.o</div><div class='del'>-obj-$(CONFIG_ARCH_IXDP2X00)	+= ixdp2x00.o</div><div class='del'>-obj-$(CONFIG_ARCH_IXDP2X01)	+= ixdp2x01.o</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/Makefile.boot b/arch/arm/mach-ixp2000/Makefile.boot<br/>deleted file mode 100644<br/>index 9c7af91d93da..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/Makefile.boot?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/Makefile.boot</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,3 +0,0 @@</div><div class='del'>-   zreladdr-y	+= 0x00008000</div><div class='del'>-params_phys-y	:= 0x00000100</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c<br/>deleted file mode 100644<br/>index f214cdff01cb..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/core.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,520 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/core.c</div><div class='del'>- *</div><div class='del'>- * Common routines used by all IXP2400/2800 based platforms.</div><div class='del'>- *</div><div class='del'>- * Author: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright 2004 (C) MontaVista Software, Inc. </div><div class='del'>- *</div><div class='del'>- * Based on work Copyright (C) 2002-2003 Intel Corporation</div><div class='del'>- * </div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any </div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/serial.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/serial_8250.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/types.h&gt;</div><div class='del'>-#include &lt;asm/setup.h&gt;</div><div class='del'>-#include &lt;asm/memory.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/mach/time.h&gt;</div><div class='del'>-#include &lt;asm/mach/irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/gpio-ixp2000.h&gt;</div><div class='del'>-</div><div class='del'>-static DEFINE_SPINLOCK(ixp2000_slowport_lock);</div><div class='del'>-static unsigned long ixp2000_slowport_irq_flags;</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * Slowport access routines</div><div class='del'>- *************************************************************************/</div><div class='del'>-void ixp2000_acquire_slowport(struct slowport_cfg *new_cfg, struct slowport_cfg *old_cfg)</div><div class='del'>-{</div><div class='del'>-	spin_lock_irqsave(&amp;ixp2000_slowport_lock, ixp2000_slowport_irq_flags);</div><div class='del'>-</div><div class='del'>-	old_cfg-&gt;CCR = *IXP2000_SLOWPORT_CCR;</div><div class='del'>-	old_cfg-&gt;WTC = *IXP2000_SLOWPORT_WTC2;</div><div class='del'>-	old_cfg-&gt;RTC = *IXP2000_SLOWPORT_RTC2;</div><div class='del'>-	old_cfg-&gt;PCR = *IXP2000_SLOWPORT_PCR;</div><div class='del'>-	old_cfg-&gt;ADC = *IXP2000_SLOWPORT_ADC;</div><div class='del'>-</div><div class='del'>-	ixp2000_reg_write(IXP2000_SLOWPORT_CCR, new_cfg-&gt;CCR);</div><div class='del'>-	ixp2000_reg_write(IXP2000_SLOWPORT_WTC2, new_cfg-&gt;WTC);</div><div class='del'>-	ixp2000_reg_write(IXP2000_SLOWPORT_RTC2, new_cfg-&gt;RTC);</div><div class='del'>-	ixp2000_reg_write(IXP2000_SLOWPORT_PCR, new_cfg-&gt;PCR);</div><div class='del'>-	ixp2000_reg_wrb(IXP2000_SLOWPORT_ADC, new_cfg-&gt;ADC);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ixp2000_release_slowport(struct slowport_cfg *old_cfg)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_write(IXP2000_SLOWPORT_CCR, old_cfg-&gt;CCR);</div><div class='del'>-	ixp2000_reg_write(IXP2000_SLOWPORT_WTC2, old_cfg-&gt;WTC);</div><div class='del'>-	ixp2000_reg_write(IXP2000_SLOWPORT_RTC2, old_cfg-&gt;RTC);</div><div class='del'>-	ixp2000_reg_write(IXP2000_SLOWPORT_PCR, old_cfg-&gt;PCR);</div><div class='del'>-	ixp2000_reg_wrb(IXP2000_SLOWPORT_ADC, old_cfg-&gt;ADC);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;ixp2000_slowport_lock, </div><div class='del'>-					ixp2000_slowport_irq_flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * Chip specific mappings shared by all IXP2000 systems</div><div class='del'>- *************************************************************************/</div><div class='del'>-static struct map_desc ixp2000_io_desc[] __initdata = {</div><div class='del'>-	{</div><div class='del'>-		.virtual	= IXP2000_CAP_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(IXP2000_CAP_PHYS_BASE),</div><div class='del'>-		.length		= IXP2000_CAP_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= IXP2000_INTCTL_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE),</div><div class='del'>-		.length		= IXP2000_INTCTL_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= IXP2000_PCI_CREG_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE),</div><div class='del'>-		.length		= IXP2000_PCI_CREG_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= IXP2000_PCI_CSR_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE),</div><div class='del'>-		.length		= IXP2000_PCI_CSR_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= IXP2000_MSF_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(IXP2000_MSF_PHYS_BASE),</div><div class='del'>-		.length		= IXP2000_MSF_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= IXP2000_SCRATCH_RING_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE),</div><div class='del'>-		.length		= IXP2000_SCRATCH_RING_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= IXP2000_SRAM0_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE),</div><div class='del'>-		.length		= IXP2000_SRAM0_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= IXP2000_PCI_IO_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE),</div><div class='del'>-		.length		= IXP2000_PCI_IO_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= IXP2000_PCI_CFG0_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE),</div><div class='del'>-		.length		= IXP2000_PCI_CFG0_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= IXP2000_PCI_CFG1_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE),</div><div class='del'>-		.length		= IXP2000_PCI_CFG1_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ixp2000_map_io(void)</div><div class='del'>-{</div><div class='del'>-	iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc));</div><div class='del'>-</div><div class='del'>-	/* Set slowport to 8-bit mode.  */</div><div class='del'>-	ixp2000_reg_wrb(IXP2000_SLOWPORT_FRM, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * Serial port support for IXP2000</div><div class='del'>- *************************************************************************/</div><div class='del'>-static struct plat_serial8250_port ixp2000_serial_port[] = {</div><div class='del'>-	{</div><div class='del'>-		.mapbase	= IXP2000_UART_PHYS_BASE,</div><div class='del'>-		.membase	= (char *)(IXP2000_UART_VIRT_BASE + 3),</div><div class='del'>-		.irq		= IRQ_IXP2000_UART,</div><div class='del'>-		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,</div><div class='del'>-		.iotype		= UPIO_MEM,</div><div class='del'>-		.regshift	= 2,</div><div class='del'>-		.uartclk	= 50000000,</div><div class='del'>-	},</div><div class='del'>-	{ },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ixp2000_uart_resource = {</div><div class='del'>-	.start		= IXP2000_UART_PHYS_BASE,</div><div class='del'>-	.end		= IXP2000_UART_PHYS_BASE + 0x1f,</div><div class='del'>-	.flags		= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device ixp2000_serial_device = {</div><div class='del'>-	.name		= "serial8250",</div><div class='del'>-	.id		= PLAT8250_DEV_PLATFORM,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data		= ixp2000_serial_port,</div><div class='del'>-	},</div><div class='del'>-	.num_resources	= 1,</div><div class='del'>-	.resource	= &amp;ixp2000_uart_resource,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ixp2000_uart_init(void)</div><div class='del'>-{</div><div class='del'>-	platform_device_register(&amp;ixp2000_serial_device);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * Timer-tick functions for IXP2000</div><div class='del'>- *************************************************************************/</div><div class='del'>-static unsigned ticks_per_jiffy;</div><div class='del'>-static unsigned ticks_per_usec;</div><div class='del'>-static unsigned next_jiffy_time;</div><div class='del'>-static volatile unsigned long *missing_jiffy_timer_csr;</div><div class='del'>-</div><div class='del'>-unsigned long ixp2000_gettimeoffset (void)</div><div class='del'>-{</div><div class='del'>- 	unsigned long offset;</div><div class='del'>-</div><div class='del'>-	offset = next_jiffy_time - *missing_jiffy_timer_csr;</div><div class='del'>-</div><div class='del'>-	return offset / ticks_per_usec;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t ixp2000_timer_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	/* clear timer 1 */</div><div class='del'>-	ixp2000_reg_wrb(IXP2000_T1_CLR, 1);</div><div class='del'>-</div><div class='del'>-	while ((signed long)(next_jiffy_time - *missing_jiffy_timer_csr)</div><div class='del'>-							&gt;= ticks_per_jiffy) {</div><div class='del'>-		timer_tick();</div><div class='del'>-		next_jiffy_time -= ticks_per_jiffy;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irqaction ixp2000_timer_irq = {</div><div class='del'>-	.name		= "IXP2000 Timer Tick",</div><div class='del'>-	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,</div><div class='del'>-	.handler	= ixp2000_timer_interrupt,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ixp2000_init_time(unsigned long tick_rate)</div><div class='del'>-{</div><div class='del'>-	ticks_per_jiffy = (tick_rate + HZ/2) / HZ;</div><div class='del'>-	ticks_per_usec = tick_rate / 1000000;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We use timer 1 as our timer interrupt.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_reg_write(IXP2000_T1_CLR, 0);</div><div class='del'>-	ixp2000_reg_write(IXP2000_T1_CLD, ticks_per_jiffy - 1);</div><div class='del'>-	ixp2000_reg_write(IXP2000_T1_CTL, (1 &lt;&lt; 7));</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We use a second timer as a monotonic counter for tracking</div><div class='del'>-	 * missed jiffies.  The IXP2000 has four timers, but if we're</div><div class='del'>-	 * on an A-step IXP2800, timer 2 and 3 don't work, so on those</div><div class='del'>-	 * chips we use timer 4.  Timer 4 is the only timer that can</div><div class='del'>-	 * be used for the watchdog, so we use timer 2 if we're on a</div><div class='del'>-	 * non-buggy chip.</div><div class='del'>-	 */</div><div class='del'>-	if ((*IXP2000_PRODUCT_ID &amp; 0x001ffef0) == 0x00000000) {</div><div class='del'>-		printk(KERN_INFO "Enabling IXP2800 erratum #25 workaround\n");</div><div class='del'>-</div><div class='del'>-		ixp2000_reg_write(IXP2000_T4_CLR, 0);</div><div class='del'>-		ixp2000_reg_write(IXP2000_T4_CLD, -1);</div><div class='del'>-		ixp2000_reg_wrb(IXP2000_T4_CTL, (1 &lt;&lt; 7));</div><div class='del'>-		missing_jiffy_timer_csr = IXP2000_T4_CSR;</div><div class='del'>-	} else {</div><div class='del'>-		ixp2000_reg_write(IXP2000_T2_CLR, 0);</div><div class='del'>-		ixp2000_reg_write(IXP2000_T2_CLD, -1);</div><div class='del'>-		ixp2000_reg_wrb(IXP2000_T2_CTL, (1 &lt;&lt; 7));</div><div class='del'>-		missing_jiffy_timer_csr = IXP2000_T2_CSR;</div><div class='del'>-	}</div><div class='del'>- 	next_jiffy_time = 0xffffffff;</div><div class='del'>-</div><div class='del'>-	/* register for interrupt */</div><div class='del'>-	setup_irq(IRQ_IXP2000_TIMER1, &amp;ixp2000_timer_irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * GPIO helpers</div><div class='del'>- *************************************************************************/</div><div class='del'>-static unsigned long GPIO_IRQ_falling_edge;</div><div class='del'>-static unsigned long GPIO_IRQ_rising_edge;</div><div class='del'>-static unsigned long GPIO_IRQ_level_low;</div><div class='del'>-static unsigned long GPIO_IRQ_level_high;</div><div class='del'>-</div><div class='del'>-static void update_gpio_int_csrs(void)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_FEDR, GPIO_IRQ_falling_edge);</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_REDR, GPIO_IRQ_rising_edge);</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_LSLR, GPIO_IRQ_level_low);</div><div class='del'>-	ixp2000_reg_wrb(IXP2000_GPIO_LSHR, GPIO_IRQ_level_high);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void gpio_line_config(int line, int direction)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	if (direction == GPIO_OUT) {</div><div class='del'>-		/* if it's an output, it ain't an interrupt anymore */</div><div class='del'>-		GPIO_IRQ_falling_edge &amp;= ~(1 &lt;&lt; line);</div><div class='del'>-		GPIO_IRQ_rising_edge &amp;= ~(1 &lt;&lt; line);</div><div class='del'>-		GPIO_IRQ_level_low &amp;= ~(1 &lt;&lt; line);</div><div class='del'>-		GPIO_IRQ_level_high &amp;= ~(1 &lt;&lt; line);</div><div class='del'>-		update_gpio_int_csrs();</div><div class='del'>-</div><div class='del'>-		ixp2000_reg_wrb(IXP2000_GPIO_PDSR, 1 &lt;&lt; line);</div><div class='del'>-	} else if (direction == GPIO_IN) {</div><div class='del'>-		ixp2000_reg_wrb(IXP2000_GPIO_PDCR, 1 &lt;&lt; line);</div><div class='del'>-	}</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(gpio_line_config);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IRQ handling IXP2000</div><div class='del'>- *************************************************************************/</div><div class='del'>-static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='del'>-{                               </div><div class='del'>-	int i;</div><div class='del'>-	unsigned long status = *IXP2000_GPIO_INST;</div><div class='del'>-		   </div><div class='del'>-	for (i = 0; i &lt;= 7; i++) {</div><div class='del'>-		if (status &amp; (1&lt;&lt;i)) {</div><div class='del'>-			generic_handle_irq(i + IRQ_IXP2000_GPIO0);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ixp2000_GPIO_irq_type(struct irq_data *d, unsigned int type)</div><div class='del'>-{</div><div class='del'>-	int line = d-&gt;irq - IRQ_IXP2000_GPIO0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * First, configure this GPIO line as an input.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_PDCR, 1 &lt;&lt; line);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Then, set the proper trigger type.</div><div class='del'>-	 */</div><div class='del'>-	if (type &amp; IRQ_TYPE_EDGE_FALLING)</div><div class='del'>-		GPIO_IRQ_falling_edge |= 1 &lt;&lt; line;</div><div class='del'>-	else</div><div class='del'>-		GPIO_IRQ_falling_edge &amp;= ~(1 &lt;&lt; line);</div><div class='del'>-	if (type &amp; IRQ_TYPE_EDGE_RISING)</div><div class='del'>-		GPIO_IRQ_rising_edge |= 1 &lt;&lt; line;</div><div class='del'>-	else</div><div class='del'>-		GPIO_IRQ_rising_edge &amp;= ~(1 &lt;&lt; line);</div><div class='del'>-	if (type &amp; IRQ_TYPE_LEVEL_LOW)</div><div class='del'>-		GPIO_IRQ_level_low |= 1 &lt;&lt; line;</div><div class='del'>-	else</div><div class='del'>-		GPIO_IRQ_level_low &amp;= ~(1 &lt;&lt; line);</div><div class='del'>-	if (type &amp; IRQ_TYPE_LEVEL_HIGH)</div><div class='del'>-		GPIO_IRQ_level_high |= 1 &lt;&lt; line;</div><div class='del'>-	else</div><div class='del'>-		GPIO_IRQ_level_high &amp;= ~(1 &lt;&lt; line);</div><div class='del'>-	update_gpio_int_csrs();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp2000_GPIO_irq_mask_ack(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned int irq = d-&gt;irq;</div><div class='del'>-</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_INCR, (1 &lt;&lt; (irq - IRQ_IXP2000_GPIO0)));</div><div class='del'>-</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_EDSR, (1 &lt;&lt; (irq - IRQ_IXP2000_GPIO0)));</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_LDSR, (1 &lt;&lt; (irq - IRQ_IXP2000_GPIO0)));</div><div class='del'>-	ixp2000_reg_wrb(IXP2000_GPIO_INST, (1 &lt;&lt; (irq - IRQ_IXP2000_GPIO0)));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp2000_GPIO_irq_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned int irq = d-&gt;irq;</div><div class='del'>-</div><div class='del'>-	ixp2000_reg_wrb(IXP2000_GPIO_INCR, (1 &lt;&lt; (irq - IRQ_IXP2000_GPIO0)));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp2000_GPIO_irq_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned int irq = d-&gt;irq;</div><div class='del'>-</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_INSR, (1 &lt;&lt; (irq - IRQ_IXP2000_GPIO0)));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip ixp2000_GPIO_irq_chip = {</div><div class='del'>-	.irq_ack	= ixp2000_GPIO_irq_mask_ack,</div><div class='del'>-	.irq_mask	= ixp2000_GPIO_irq_mask,</div><div class='del'>-	.irq_unmask	= ixp2000_GPIO_irq_unmask,</div><div class='del'>-	.irq_set_type	= ixp2000_GPIO_irq_type,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void ixp2000_pci_irq_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE;</div><div class='del'>-	if (d-&gt;irq == IRQ_IXP2000_PCIA)</div><div class='del'>-		ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp &amp; ~(1 &lt;&lt; 26)));</div><div class='del'>-	else if (d-&gt;irq == IRQ_IXP2000_PCIB)</div><div class='del'>-		ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp &amp; ~(1 &lt;&lt; 27)));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp2000_pci_irq_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE;</div><div class='del'>-	if (d-&gt;irq == IRQ_IXP2000_PCIA)</div><div class='del'>-		ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 &lt;&lt; 26)));</div><div class='del'>-	else if (d-&gt;irq == IRQ_IXP2000_PCIB)</div><div class='del'>-		ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 &lt;&lt; 27)));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Error interrupts. These are used extensively by the microengine drivers</div><div class='del'>- */</div><div class='del'>-static void ixp2000_err_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	unsigned long status = *IXP2000_IRQ_ERR_STATUS;</div><div class='del'>-</div><div class='del'>-	for(i = 31; i &gt;= 0; i--) {</div><div class='del'>-		if(status &amp; (1 &lt;&lt; i)) {</div><div class='del'>-			generic_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp2000_err_irq_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_CLR,</div><div class='del'>-			(1 &lt;&lt; (d-&gt;irq - IRQ_IXP2000_DRAM0_MIN_ERR)));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp2000_err_irq_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_SET,</div><div class='del'>-			(1 &lt;&lt; (d-&gt;irq - IRQ_IXP2000_DRAM0_MIN_ERR)));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip ixp2000_err_irq_chip = {</div><div class='del'>-	.irq_ack	= ixp2000_err_irq_mask,</div><div class='del'>-	.irq_mask	= ixp2000_err_irq_mask,</div><div class='del'>-	.irq_unmask	= ixp2000_err_irq_unmask</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct irq_chip ixp2000_pci_irq_chip = {</div><div class='del'>-	.irq_ack	= ixp2000_pci_irq_mask,</div><div class='del'>-	.irq_mask	= ixp2000_pci_irq_mask,</div><div class='del'>-	.irq_unmask	= ixp2000_pci_irq_unmask</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void ixp2000_irq_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_wrb(IXP2000_IRQ_ENABLE_CLR, (1 &lt;&lt; d-&gt;irq));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp2000_irq_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 &lt;&lt; d-&gt;irq));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip ixp2000_irq_chip = {</div><div class='del'>-	.irq_ack	= ixp2000_irq_mask,</div><div class='del'>-	.irq_mask	= ixp2000_irq_mask,</div><div class='del'>-	.irq_unmask	= ixp2000_irq_unmask</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ixp2000_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Mask all sources</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_reg_write(IXP2000_IRQ_ENABLE_CLR, 0xffffffff);</div><div class='del'>-	ixp2000_reg_write(IXP2000_FIQ_ENABLE_CLR, 0xffffffff);</div><div class='del'>-</div><div class='del'>-	/* clear all GPIO edge/level detects */</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_REDR, 0);</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_FEDR, 0);</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_LSHR, 0);</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_LSLR, 0);</div><div class='del'>-	ixp2000_reg_write(IXP2000_GPIO_INCR, -1);</div><div class='del'>-</div><div class='del'>-	/* clear PCI interrupt sources */</div><div class='del'>-	ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, 0);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Certain bits in the IRQ status register of the </div><div class='del'>-	 * IXP2000 are reserved. Instead of trying to map</div><div class='del'>-	 * things non 1:1 from bit position to IRQ number,</div><div class='del'>-	 * we mark the reserved IRQs as invalid. This makes</div><div class='del'>-	 * our mask/unmask code much simpler.</div><div class='del'>-	 */</div><div class='del'>-	for (irq = IRQ_IXP2000_SOFT_INT; irq &lt;= IRQ_IXP2000_THDB3; irq++) {</div><div class='del'>-		if ((1 &lt;&lt; irq) &amp; IXP2000_VALID_IRQ_MASK) {</div><div class='del'>-			irq_set_chip_and_handler(irq, &amp;ixp2000_irq_chip,</div><div class='del'>-						 handle_level_irq);</div><div class='del'>-			set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-		} else set_irq_flags(irq, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (irq = IRQ_IXP2000_DRAM0_MIN_ERR; irq &lt;= IRQ_IXP2000_SP_INT; irq++) {</div><div class='del'>-		if((1 &lt;&lt; (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) &amp;</div><div class='del'>-				IXP2000_VALID_ERR_IRQ_MASK) {</div><div class='del'>-			irq_set_chip_and_handler(irq, &amp;ixp2000_err_irq_chip,</div><div class='del'>-						 handle_level_irq);</div><div class='del'>-			set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-		}</div><div class='del'>-		else</div><div class='del'>-			set_irq_flags(irq, 0);</div><div class='del'>-	}</div><div class='del'>-	irq_set_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler);</div><div class='del'>-</div><div class='del'>-	for (irq = IRQ_IXP2000_GPIO0; irq &lt;= IRQ_IXP2000_GPIO7; irq++) {</div><div class='del'>-		irq_set_chip_and_handler(irq, &amp;ixp2000_GPIO_irq_chip,</div><div class='del'>-					 handle_level_irq);</div><div class='del'>-		set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-	}</div><div class='del'>-	irq_set_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Enable PCI irqs.  The actual PCI[AB] decoding is done in</div><div class='del'>-	 * entry-macro.S, so we don't need a chained handler for the</div><div class='del'>-	 * PCI interrupt source.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 &lt;&lt; IRQ_IXP2000_PCI));</div><div class='del'>-	for (irq = IRQ_IXP2000_PCIA; irq &lt;= IRQ_IXP2000_PCIB; irq++) {</div><div class='del'>-		irq_set_chip_and_handler(irq, &amp;ixp2000_pci_irq_chip,</div><div class='del'>-					 handle_level_irq);</div><div class='del'>-		set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ixp2000_restart(char mode, const char *cmd)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c<br/>deleted file mode 100644<br/>index 4867f408617c..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/enp2611.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/enp2611.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,265 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/enp2611.c</div><div class='del'>- *</div><div class='del'>- * Radisys ENP-2611 support.</div><div class='del'>- *</div><div class='del'>- * Created 2004 by Lennert Buytenhek from the ixdp2x01 code.  The</div><div class='del'>- * original version carries the following notices:</div><div class='del'>- *</div><div class='del'>- * Original Author: Andrzej Mialkowski &lt;andrzej.mialkowski@intel.com&gt;</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002-2003 Intel Corp.</div><div class='del'>- * Copyright (C) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- *  under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/serial.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='del'>-#include &lt;linux/serial_core.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/pci.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/mach/irq.h&gt;</div><div class='del'>-#include &lt;asm/mach/time.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach/flash.h&gt;</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * ENP-2611 timer tick configuration</div><div class='del'>- *************************************************************************/</div><div class='del'>-static void __init enp2611_timer_init(void)</div><div class='del'>-{</div><div class='del'>-	ixp2000_init_time(50 * 1000 * 1000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct sys_timer enp2611_timer = {</div><div class='del'>-	.init		= enp2611_timer_init,</div><div class='del'>-	.offset		= ixp2000_gettimeoffset,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * ENP-2611 I/O</div><div class='del'>- *************************************************************************/</div><div class='del'>-static struct map_desc enp2611_io_desc[] __initdata = {</div><div class='del'>-	{</div><div class='del'>-		.virtual	= ENP2611_CALEB_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(ENP2611_CALEB_PHYS_BASE),</div><div class='del'>-		.length		= ENP2611_CALEB_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= ENP2611_PM3386_0_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE),</div><div class='del'>-		.length		= ENP2611_PM3386_0_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= ENP2611_PM3386_1_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE),</div><div class='del'>-		.length		= ENP2611_PM3386_1_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init enp2611_map_io(void)</div><div class='del'>-{</div><div class='del'>-	ixp2000_map_io();</div><div class='del'>-	iotable_init(enp2611_io_desc, ARRAY_SIZE(enp2611_io_desc));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * ENP-2611 PCI</div><div class='del'>- *************************************************************************/</div><div class='del'>-static int enp2611_pci_setup(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	sys-&gt;mem_offset = 0xe0000000;</div><div class='del'>-	ixp2000_pci_setup(nr, sys);</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init enp2611_pci_preinit(void)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_write(IXP2000_PCI_ADDR_EXT, 0x00100000);</div><div class='del'>-	ixp2000_pci_preinit();</div><div class='del'>-	pcibios_setup("firmware");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int enp2611_pci_valid_device(struct pci_bus *bus,</div><div class='del'>-						unsigned int devfn)</div><div class='del'>-{</div><div class='del'>-	/* The 82559 ethernet controller appears at both PCI:1:0:0 and</div><div class='del'>-	 * PCI:1:2:0, so let's pretend the second one isn't there.</div><div class='del'>-	 */</div><div class='del'>-	if (bus-&gt;number == 0x01 &amp;&amp; devfn == 0x10)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enp2611_pci_read_config(struct pci_bus *bus, unsigned int devfn,</div><div class='del'>-					int where, int size, u32 *value)</div><div class='del'>-{</div><div class='del'>-	if (enp2611_pci_valid_device(bus, devfn))</div><div class='del'>-		return ixp2000_pci_read_config(bus, devfn, where, size, value);</div><div class='del'>-</div><div class='del'>-	return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enp2611_pci_write_config(struct pci_bus *bus, unsigned int devfn,</div><div class='del'>-					int where, int size, u32 value)</div><div class='del'>-{</div><div class='del'>-	if (enp2611_pci_valid_device(bus, devfn))</div><div class='del'>-		return ixp2000_pci_write_config(bus, devfn, where, size, value);</div><div class='del'>-</div><div class='del'>-	return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pci_ops enp2611_pci_ops = {</div><div class='del'>-	.read   = enp2611_pci_read_config,</div><div class='del'>-	.write  = enp2611_pci_write_config</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pci_bus * __init enp2611_pci_scan_bus(int nr,</div><div class='del'>-						struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	return pci_scan_root_bus(NULL, sys-&gt;busnr, &amp;enp2611_pci_ops, sys,</div><div class='del'>-				 &amp;sys-&gt;resources);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='del'>-	u8 pin)</div><div class='del'>-{</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;bus-&gt;number == 0 &amp;&amp; PCI_SLOT(dev-&gt;devfn) == 0) {</div><div class='del'>-		/* IXP2400. */</div><div class='del'>-		irq = IRQ_IXP2000_PCIA;</div><div class='del'>-	} else if (dev-&gt;bus-&gt;number == 0 &amp;&amp; PCI_SLOT(dev-&gt;devfn) == 1) {</div><div class='del'>-		/* 21555 non-transparent bridge.  */</div><div class='del'>-		irq = IRQ_IXP2000_PCIB;</div><div class='del'>-	} else if (dev-&gt;bus-&gt;number == 0 &amp;&amp; PCI_SLOT(dev-&gt;devfn) == 4) {</div><div class='del'>-		/* PCI2050B transparent bridge.  */</div><div class='del'>-		irq = -1;</div><div class='del'>-	} else if (dev-&gt;bus-&gt;number == 1 &amp;&amp; PCI_SLOT(dev-&gt;devfn) == 0) {</div><div class='del'>-		/* 82559 ethernet.  */</div><div class='del'>-		irq = IRQ_IXP2000_PCIA;</div><div class='del'>-	} else if (dev-&gt;bus-&gt;number == 1 &amp;&amp; PCI_SLOT(dev-&gt;devfn) == 1) {</div><div class='del'>-		/* SPI-3 option board.  */</div><div class='del'>-		irq = IRQ_IXP2000_PCIB;</div><div class='del'>-	} else {</div><div class='del'>-		printk(KERN_ERR "enp2611_pci_map_irq() called for unknown "</div><div class='del'>-				"device PCI:%d:%d:%d\n", dev-&gt;bus-&gt;number,</div><div class='del'>-				PCI_SLOT(dev-&gt;devfn), PCI_FUNC(dev-&gt;devfn));</div><div class='del'>-		irq = -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return irq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct hw_pci enp2611_pci __initdata = {</div><div class='del'>-	.nr_controllers	= 1,</div><div class='del'>-	.setup		= enp2611_pci_setup,</div><div class='del'>-	.preinit	= enp2611_pci_preinit,</div><div class='del'>-	.scan		= enp2611_pci_scan_bus,</div><div class='del'>-	.map_irq	= enp2611_pci_map_irq,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int __init enp2611_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	if (machine_is_enp2611())</div><div class='del'>-		pci_common_init(&amp;enp2611_pci);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-subsys_initcall(enp2611_pci_init);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * ENP-2611 Machine Initialization</div><div class='del'>- *************************************************************************/</div><div class='del'>-static struct flash_platform_data enp2611_flash_platform_data = {</div><div class='del'>-	.map_name	= "cfi_probe",</div><div class='del'>-	.width		= 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct ixp2000_flash_data enp2611_flash_data = {</div><div class='del'>-	.platform_data	= &amp;enp2611_flash_platform_data,</div><div class='del'>-	.nr_banks	= 1</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource enp2611_flash_resource = {</div><div class='del'>-	.start		= 0xc4000000,</div><div class='del'>-	.end		= 0xc4000000 + 0x00ffffff,</div><div class='del'>-	.flags		= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device enp2611_flash = {</div><div class='del'>-	.name		= "IXP2000-Flash",</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data = &amp;enp2611_flash_data,</div><div class='del'>-	},</div><div class='del'>-	.num_resources	= 1,</div><div class='del'>-	.resource	= &amp;enp2611_flash_resource,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct ixp2000_i2c_pins enp2611_i2c_gpio_pins = {</div><div class='del'>-	.sda_pin	= ENP2611_GPIO_SDA,</div><div class='del'>-	.scl_pin	= ENP2611_GPIO_SCL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device enp2611_i2c_controller = {</div><div class='del'>-	.name		= "IXP2000-I2C",</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data = &amp;enp2611_i2c_gpio_pins</div><div class='del'>-	},</div><div class='del'>-	.num_resources	= 0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *enp2611_devices[] __initdata = {</div><div class='del'>-	&amp;enp2611_flash,</div><div class='del'>-	&amp;enp2611_i2c_controller</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init enp2611_init_machine(void)</div><div class='del'>-{</div><div class='del'>-	platform_add_devices(enp2611_devices, ARRAY_SIZE(enp2611_devices));</div><div class='del'>-	ixp2000_uart_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-MACHINE_START(ENP2611, "Radisys ENP-2611 PCI network processor board")</div><div class='del'>-	/* Maintainer: Lennert Buytenhek &lt;buytenh@wantstofly.org&gt; */</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.map_io		= enp2611_map_io,</div><div class='del'>-	.init_irq	= ixp2000_init_irq,</div><div class='del'>-	.timer		= &amp;enp2611_timer,</div><div class='del'>-	.init_machine	= enp2611_init_machine,</div><div class='del'>-	.restart	= ixp2000_restart,</div><div class='del'>-MACHINE_END</div><div class='del'>-</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/debug-macro.S b/arch/arm/mach-ixp2000/include/mach/debug-macro.S<br/>deleted file mode 100644<br/>index bdd3ccdc2890..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/debug-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/debug-macro.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-/* arch/arm/mach-ixp2000/include/mach/debug-macro.S</div><div class='del'>- *</div><div class='del'>- * Debugging macro include header</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1994-1999 Russell King</div><div class='del'>- *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-		.macro  addruart, rp, rv, tmp</div><div class='del'>-		mov	\rp, #0x00030000</div><div class='del'>-#ifdef	__ARMEB__</div><div class='del'>-		orr	\rp, \rp, #0x00000003</div><div class='del'>-#endif</div><div class='del'>-		orr	\rv, \rp, #0xfe000000	@ virtual base</div><div class='del'>-		orr	\rv, \rv, #0x00f00000</div><div class='del'>-		orr	\rp, \rp, #0xc0000000	@ Physical base</div><div class='del'>-		.endm</div><div class='del'>-</div><div class='del'>-#define UART_SHIFT	2</div><div class='del'>-#include &lt;asm/hardware/debug-8250.S&gt;</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/enp2611.h b/arch/arm/mach-ixp2000/include/mach/enp2611.h<br/>deleted file mode 100644<br/>index 9ce3690061d5..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/enp2611.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/enp2611.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,46 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/enp2611.h</div><div class='del'>- *</div><div class='del'>- * Register and other defines for Radisys ENP-2611</div><div class='del'>- *</div><div class='del'>- * Created 2004 by Lennert Buytenhek from the ixdp2x01 code.  The</div><div class='del'>- * original version carries the following notices:</div><div class='del'>- *</div><div class='del'>- * Original Author: Naeem Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002 Intel Corp.</div><div class='del'>- * Copyright (C) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- *  under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ENP2611_H</div><div class='del'>-#define __ENP2611_H</div><div class='del'>-</div><div class='del'>-#define ENP2611_CALEB_PHYS_BASE		0xc5000000</div><div class='del'>-#define ENP2611_CALEB_VIRT_BASE		0xfe000000</div><div class='del'>-#define ENP2611_CALEB_SIZE		0x00100000</div><div class='del'>-</div><div class='del'>-#define ENP2611_PM3386_0_PHYS_BASE	0xc6000000</div><div class='del'>-#define ENP2611_PM3386_0_VIRT_BASE	0xfe100000</div><div class='del'>-#define ENP2611_PM3386_0_SIZE		0x00100000</div><div class='del'>-</div><div class='del'>-#define ENP2611_PM3386_1_PHYS_BASE	0xc6400000</div><div class='del'>-#define ENP2611_PM3386_1_VIRT_BASE	0xfe200000</div><div class='del'>-#define ENP2611_PM3386_1_SIZE		0x00100000</div><div class='del'>-</div><div class='del'>-#define ENP2611_GPIO_SCL		7</div><div class='del'>-#define ENP2611_GPIO_SDA		6</div><div class='del'>-</div><div class='del'>-#define IRQ_ENP2611_THERMAL		IRQ_IXP2000_GPIO4</div><div class='del'>-#define IRQ_ENP2611_OPTION_BOARD	IRQ_IXP2000_GPIO3</div><div class='del'>-#define IRQ_ENP2611_CALEB		IRQ_IXP2000_GPIO2</div><div class='del'>-#define IRQ_ENP2611_PM3386_1		IRQ_IXP2000_GPIO1</div><div class='del'>-#define IRQ_ENP2611_PM3386_0		IRQ_IXP2000_GPIO0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/entry-macro.S b/arch/arm/mach-ixp2000/include/mach/entry-macro.S<br/>deleted file mode 100644<br/>index c4444dff9202..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/entry-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/entry-macro.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,54 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/entry-macro.S</div><div class='del'>- *</div><div class='del'>- * Low-level IRQ helper macros for IXP2000-based platforms</div><div class='del'>- *</div><div class='del'>- * This file is licensed under  the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-#include &lt;mach/irqs.h&gt;</div><div class='del'>-</div><div class='del'>-		.macro  get_irqnr_preamble, base, tmp</div><div class='del'>-		.endm</div><div class='del'>-</div><div class='del'>-		.macro  get_irqnr_and_base, irqnr, irqstat, base, tmp</div><div class='del'>-</div><div class='del'>-		mov	\irqnr, #0x0              @clear out irqnr as default</div><div class='del'>-                mov	\base, #0xfe000000</div><div class='del'>-		orr	\base, \base, #0x00e00000</div><div class='del'>-		orr	\base, \base, #0x08</div><div class='del'>-		ldr	\irqstat, [\base]         @ get interrupts</div><div class='del'>-</div><div class='del'>-		cmp	\irqstat, #0</div><div class='del'>-		beq	1001f</div><div class='del'>-</div><div class='del'>-		clz     \irqnr, \irqstat</div><div class='del'>-		mov     \base, #31</div><div class='del'>-		subs    \irqnr, \base, \irqnr</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * We handle PCIA and PCIB here so we don't have an</div><div class='del'>-		 * extra layer of code just to check these two bits.</div><div class='del'>-		 */</div><div class='del'>-		cmp	\irqnr, #IRQ_IXP2000_PCI</div><div class='del'>-		bne	1001f</div><div class='del'>-</div><div class='del'>-		mov	\base, #0xfe000000</div><div class='del'>-		orr	\base, \base, #0x00c00000</div><div class='del'>-		orr	\base, \base, #0x00000100</div><div class='del'>-		orr	\base, \base, #0x00000058</div><div class='del'>-		ldr	\irqstat, [\base]</div><div class='del'>-</div><div class='del'>-		mov	\tmp, #(1&lt;&lt;26)</div><div class='del'>-		tst	\irqstat, \tmp</div><div class='del'>-		movne	\irqnr, #IRQ_IXP2000_PCIA</div><div class='del'>-		bne	1001f</div><div class='del'>-</div><div class='del'>-		mov	\tmp, #(1&lt;&lt;27)</div><div class='del'>-		tst	\irqstat, \tmp</div><div class='del'>-		movne	\irqnr, #IRQ_IXP2000_PCIB</div><div class='del'>-</div><div class='del'>-1001:</div><div class='del'>-		.endm</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h b/arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h<br/>deleted file mode 100644<br/>index af836c76c3f1..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,48 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/gpio.h</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002 Intel Corporation.</div><div class='del'>- *</div><div class='del'>- * This program is free software, you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXP2000 GPIO in/out, edge/level detection for IRQs:</div><div class='del'>- * IRQs are generated on Falling-edge, Rising-Edge, Level-low, Level-High</div><div class='del'>- * or both Falling-edge and Rising-edge.</div><div class='del'>- * This must be called *before* the corresponding IRQ is registerd.</div><div class='del'>- * Use this instead of directly setting the GPIO registers.</div><div class='del'>- * GPIOs may also be used as GPIOs (e.g. for emulating i2c/smb)</div><div class='del'>- */</div><div class='del'>-#ifndef __ASM_ARCH_GPIO_H</div><div class='del'>-#define __ASM_ARCH_GPIO_H</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-#define GPIO_IN				0</div><div class='del'>-#define GPIO_OUT			1</div><div class='del'>-</div><div class='del'>-#define IXP2000_GPIO_LOW		0</div><div class='del'>-#define IXP2000_GPIO_HIGH		1</div><div class='del'>-</div><div class='del'>-extern void gpio_line_config(int line, int direction);</div><div class='del'>-</div><div class='del'>-static inline int gpio_line_get(int line)</div><div class='del'>-{</div><div class='del'>-	return (((*IXP2000_GPIO_PLR) &gt;&gt; line) &amp; 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void gpio_line_set(int line, int value)</div><div class='del'>-{</div><div class='del'>-	if (value == IXP2000_GPIO_HIGH) {</div><div class='del'>-		ixp2000_reg_write(IXP2000_GPIO_POSR, 1 &lt;&lt; line);</div><div class='del'>-	} else if (value == IXP2000_GPIO_LOW) {</div><div class='del'>-		ixp2000_reg_write(IXP2000_GPIO_POCR, 1 &lt;&lt; line);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* !__ASSEMBLY__ */</div><div class='del'>-</div><div class='del'>-#endif /* ASM_ARCH_IXP2000_GPIO_H_ */</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/hardware.h b/arch/arm/mach-ixp2000/include/mach/hardware.h<br/>deleted file mode 100644<br/>index cdaf1db84003..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/hardware.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/hardware.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/hardware.h</div><div class='del'>- *</div><div class='del'>- * Hardware definitions for IXP2400/2800 based systems</div><div class='del'>- *</div><div class='del'>- * Original Author: Naeem M Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- *</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@mvista.com&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2001-2002 Intel Corp.</div><div class='del'>- * Copyright (C) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- *  under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_HARDWARE_H__</div><div class='del'>-#define __ASM_ARCH_HARDWARE_H__</div><div class='del'>-</div><div class='del'>-#include "ixp2000-regs.h"	/* Chipset Registers */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Platform helper functions</div><div class='del'>- */</div><div class='del'>-#include "platform.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Platform-specific bits</div><div class='del'>- */</div><div class='del'>-#include "enp2611.h"		/* ENP-2611 */</div><div class='del'>-#include "ixdp2x00.h"		/* IXDP2400/2800 */</div><div class='del'>-#include "ixdp2x01.h"		/* IXDP2401/2801 */</div><div class='del'>-</div><div class='del'>-#endif  /* _ASM_ARCH_HARDWARE_H__ */</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/io.h b/arch/arm/mach-ixp2000/include/mach/io.h<br/>deleted file mode 100644<br/>index f6552d6f35ab..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/io.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/io.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,133 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/io.h</div><div class='del'>- *</div><div class='del'>- * Original Author: Naeem M Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002  Intel Corp.</div><div class='del'>- * Copyrgiht (C) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARM_ARCH_IO_H</div><div class='del'>-#define __ASM_ARM_ARCH_IO_H</div><div class='del'>-</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-#define IO_SPACE_LIMIT		0xffffffff</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The A? revisions of the IXP2000s assert byte lanes for PCI I/O</div><div class='del'>- * transactions the other way round (MEM transactions don't have this</div><div class='del'>- * issue), so if we want to support those models, we need to override</div><div class='del'>- * the standard I/O functions.</div><div class='del'>- *</div><div class='del'>- * B0 and later have a bit that can be set to 1 to get the proper</div><div class='del'>- * behavior for I/O transactions, which then allows us to use the</div><div class='del'>- * standard I/O functions.  This is what we do if the user does not</div><div class='del'>- * explicitly ask for support for pre-B0.</div><div class='del'>- */</div><div class='del'>-#ifdef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO</div><div class='del'>-#define ___io(p)		((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))</div><div class='del'>-</div><div class='del'>-#define alignb(addr)		(void __iomem *)((unsigned long)(addr) ^ 3)</div><div class='del'>-#define alignw(addr)		(void __iomem *)((unsigned long)(addr) ^ 2)</div><div class='del'>-</div><div class='del'>-#define outb(v,p)		__raw_writeb((v),alignb(___io(p)))</div><div class='del'>-#define outw(v,p)		__raw_writew((v),alignw(___io(p)))</div><div class='del'>-#define outl(v,p)		__raw_writel((v),___io(p))</div><div class='del'>-</div><div class='del'>-#define inb(p)		({ unsigned int __v = __raw_readb(alignb(___io(p))); __v; })</div><div class='del'>-#define inw(p)		\</div><div class='del'>-	({ unsigned int __v = (__raw_readw(alignw(___io(p)))); __v; })</div><div class='del'>-#define inl(p)		\</div><div class='del'>-	({ unsigned int __v = (__raw_readl(___io(p))); __v; })</div><div class='del'>-</div><div class='del'>-#define outsb(p,d,l)		__raw_writesb(alignb(___io(p)),d,l)</div><div class='del'>-#define outsw(p,d,l)		__raw_writesw(alignw(___io(p)),d,l)</div><div class='del'>-#define outsl(p,d,l)		__raw_writesl(___io(p),d,l)</div><div class='del'>-</div><div class='del'>-#define insb(p,d,l)		__raw_readsb(alignb(___io(p)),d,l)</div><div class='del'>-#define insw(p,d,l)		__raw_readsw(alignw(___io(p)),d,l)</div><div class='del'>-#define insl(p,d,l)		__raw_readsl(___io(p),d,l)</div><div class='del'>-</div><div class='del'>-#define __is_io_address(p)	((((unsigned long)(p)) &amp; ~(IXP2000_PCI_IO_SIZE - 1)) == IXP2000_PCI_IO_VIRT_BASE)</div><div class='del'>-</div><div class='del'>-#define ioread8(p)						\</div><div class='del'>-	({							\</div><div class='del'>-		unsigned int __v;				\</div><div class='del'>-								\</div><div class='del'>-		if (__is_io_address(p)) {			\</div><div class='del'>-			__v = __raw_readb(alignb(p));		\</div><div class='del'>-		} else {					\</div><div class='del'>-			__v = __raw_readb(p);			\</div><div class='del'>-		}						\</div><div class='del'>-								\</div><div class='del'>-		__v;						\</div><div class='del'>-	})							\</div><div class='del'>-</div><div class='del'>-#define ioread16(p)						\</div><div class='del'>-	({							\</div><div class='del'>-		unsigned int __v;				\</div><div class='del'>-								\</div><div class='del'>-		if (__is_io_address(p)) {			\</div><div class='del'>-			__v = __raw_readw(alignw(p));		\</div><div class='del'>-		} else {					\</div><div class='del'>-			__v = le16_to_cpu(__raw_readw(p));	\</div><div class='del'>-		}						\</div><div class='del'>-								\</div><div class='del'>-		__v;						\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-#define ioread32(p)						\</div><div class='del'>-	({							\</div><div class='del'>-		unsigned int __v;				\</div><div class='del'>-								\</div><div class='del'>-		if (__is_io_address(p)) {			\</div><div class='del'>-			__v = __raw_readl(p);			\</div><div class='del'>-		} else {					\</div><div class='del'>-			__v = le32_to_cpu(__raw_readl(p));	\</div><div class='del'>-		}						\</div><div class='del'>-								\</div><div class='del'>-		 __v;						\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-#define iowrite8(v,p)						\</div><div class='del'>-	({							\</div><div class='del'>-		if (__is_io_address(p)) {			\</div><div class='del'>-			__raw_writeb((v), alignb(p));		\</div><div class='del'>-		} else {					\</div><div class='del'>-			__raw_writeb((v), p);			\</div><div class='del'>-		}						\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-#define iowrite16(v,p)						\</div><div class='del'>-	({							\</div><div class='del'>-		if (__is_io_address(p)) {			\</div><div class='del'>-			__raw_writew((v), alignw(p));		\</div><div class='del'>-		} else {					\</div><div class='del'>-			__raw_writew(cpu_to_le16(v), p);	\</div><div class='del'>-		}						\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-#define iowrite32(v,p)						\</div><div class='del'>-	({							\</div><div class='del'>-		if (__is_io_address(p)) {			\</div><div class='del'>-			__raw_writel((v), p);			\</div><div class='del'>-		} else {					\</div><div class='del'>-			__raw_writel(cpu_to_le32(v), p);	\</div><div class='del'>-		}						\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-#define ioport_map(port, nr)	___io(port)</div><div class='del'>-</div><div class='del'>-#define ioport_unmap(addr)</div><div class='del'>-#else</div><div class='del'>-#define __io(p)			((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE))</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/irqs.h b/arch/arm/mach-ixp2000/include/mach/irqs.h<br/>deleted file mode 100644<br/>index bee96bcafdca..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/irqs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/irqs.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,207 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/irqs.h</div><div class='del'>- *</div><div class='del'>- * Original Author: Naeem Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002 Intel Corp.</div><div class='del'>- * Copyright (C) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- * </div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _IRQS_H</div><div class='del'>-#define _IRQS_H</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Do NOT add #ifdef MACHINE_FOO in here.</div><div class='del'>- * Simpy add your machine IRQs here and increase NR_IRQS if needed to</div><div class='del'>- * hold your machine's IRQ table.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Some interrupt numbers go unused b/c the IRQ mask/ummask/status</div><div class='del'>- * register has those bit reserved. We just mark those interrupts</div><div class='del'>- * as invalid and this allows us to do mask/unmask with a single</div><div class='del'>- * shift operation instead of having to map the IRQ number to</div><div class='del'>- * a HW IRQ number.</div><div class='del'>- */</div><div class='del'>-#define	IRQ_IXP2000_SOFT_INT		0 /* soft interrupt */</div><div class='del'>-#define	IRQ_IXP2000_ERRSUM		1 /* OR of all bits in ErrorStatus reg*/</div><div class='del'>-#define	IRQ_IXP2000_UART		2</div><div class='del'>-#define	IRQ_IXP2000_GPIO		3</div><div class='del'>-#define	IRQ_IXP2000_TIMER1     		4</div><div class='del'>-#define	IRQ_IXP2000_TIMER2     		5</div><div class='del'>-#define	IRQ_IXP2000_TIMER3     		6</div><div class='del'>-#define	IRQ_IXP2000_TIMER4     		7</div><div class='del'>-#define	IRQ_IXP2000_PMU        		8               </div><div class='del'>-#define	IRQ_IXP2000_SPF        		9  /* Slow port framer IRQ */</div><div class='del'>-#define	IRQ_IXP2000_DMA1      		10</div><div class='del'>-#define	IRQ_IXP2000_DMA2      		11</div><div class='del'>-#define	IRQ_IXP2000_DMA3      		12</div><div class='del'>-#define	IRQ_IXP2000_PCI_DOORBELL	13</div><div class='del'>-#define	IRQ_IXP2000_ME_ATTN       	14 </div><div class='del'>-#define	IRQ_IXP2000_PCI   		15 /* PCI INTA or INTB */</div><div class='del'>-#define	IRQ_IXP2000_THDA0   		16 /* thread 0-31A */</div><div class='del'>-#define	IRQ_IXP2000_THDA1  		17 /* thread 32-63A, IXP2800 only */</div><div class='del'>-#define	IRQ_IXP2000_THDA2		18 /* thread 64-95A */</div><div class='del'>-#define	IRQ_IXP2000_THDA3 		19 /* thread 96-127A, IXP2800 only */</div><div class='del'>-#define	IRQ_IXP2000_THDB0		24 /* thread 0-31B */</div><div class='del'>-#define	IRQ_IXP2000_THDB1		25 /* thread 32-63B, IXP2800 only */</div><div class='del'>-#define	IRQ_IXP2000_THDB2		26 /* thread 64-95B */</div><div class='del'>-#define	IRQ_IXP2000_THDB3		27 /* thread 96-127B, IXP2800 only */</div><div class='del'>-</div><div class='del'>-/* define generic GPIOs */</div><div class='del'>-#define IRQ_IXP2000_GPIO0		32</div><div class='del'>-#define IRQ_IXP2000_GPIO1		33</div><div class='del'>-#define IRQ_IXP2000_GPIO2		34</div><div class='del'>-#define IRQ_IXP2000_GPIO3		35</div><div class='del'>-#define IRQ_IXP2000_GPIO4		36</div><div class='del'>-#define IRQ_IXP2000_GPIO5		37</div><div class='del'>-#define IRQ_IXP2000_GPIO6		38</div><div class='del'>-#define IRQ_IXP2000_GPIO7		39</div><div class='del'>-</div><div class='del'>-/* split off the 2 PCI sources */</div><div class='del'>-#define IRQ_IXP2000_PCIA		40</div><div class='del'>-#define IRQ_IXP2000_PCIB		41</div><div class='del'>-</div><div class='del'>-/* Int sources from IRQ_ERROR_STATUS */</div><div class='del'>-#define IRQ_IXP2000_DRAM0_MIN_ERR	42</div><div class='del'>-#define IRQ_IXP2000_DRAM0_MAJ_ERR	43</div><div class='del'>-#define IRQ_IXP2000_DRAM1_MIN_ERR	44</div><div class='del'>-#define IRQ_IXP2000_DRAM1_MAJ_ERR	45</div><div class='del'>-#define IRQ_IXP2000_DRAM2_MIN_ERR	46</div><div class='del'>-#define IRQ_IXP2000_DRAM2_MAJ_ERR	47</div><div class='del'>-/* 48-57 reserved */</div><div class='del'>-#define IRQ_IXP2000_SRAM0_ERR		58</div><div class='del'>-#define IRQ_IXP2000_SRAM1_ERR		59</div><div class='del'>-#define IRQ_IXP2000_SRAM2_ERR		60</div><div class='del'>-#define IRQ_IXP2000_SRAM3_ERR		61</div><div class='del'>-/* 62-65 reserved */</div><div class='del'>-#define IRQ_IXP2000_MEDIA_ERR		66</div><div class='del'>-#define IRQ_IXP2000_PCI_ERR			67</div><div class='del'>-#define IRQ_IXP2000_SP_INT			68</div><div class='del'>-</div><div class='del'>-#define NR_IXP2000_IRQS				69</div><div class='del'>-</div><div class='del'>-#define	IXP2000_BOARD_IRQ(x)		(NR_IXP2000_IRQS + (x))</div><div class='del'>-</div><div class='del'>-#define	IXP2000_BOARD_IRQ_MASK(irq)	(1 &lt;&lt; (irq - NR_IXP2000_IRQS))	</div><div class='del'>-</div><div class='del'>-#define IXP2000_ERR_IRQ_MASK(irq) ( 1 &lt;&lt; (irq - IRQ_IXP2000_DRAM0_MIN_ERR))</div><div class='del'>-#define IXP2000_VALID_ERR_IRQ_MASK (\</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MIN_ERR) | \</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MAJ_ERR) | \</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MIN_ERR) | \</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MAJ_ERR) | \</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MIN_ERR) | \</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MAJ_ERR) | \</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM0_ERR) | \</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM1_ERR) | \</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM2_ERR) | \</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM3_ERR) | \</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_MEDIA_ERR) | \</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_PCI_ERR) | \</div><div class='del'>-		IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SP_INT)	)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This allows for all the on-chip sources plus up to 32 CPLD based</div><div class='del'>- * IRQs. Should be more than enough.</div><div class='del'>- */</div><div class='del'>-#define	IXP2000_BOARD_IRQS		32</div><div class='del'>-#define NR_IRQS				(NR_IXP2000_IRQS + IXP2000_BOARD_IRQS)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* </div><div class='del'>- * IXDP2400 specific IRQs</div><div class='del'>- */</div><div class='del'>-#define	IRQ_IXDP2400_INGRESS_NPU	IXP2000_BOARD_IRQ(0) </div><div class='del'>-#define	IRQ_IXDP2400_ENET		IXP2000_BOARD_IRQ(1) </div><div class='del'>-#define	IRQ_IXDP2400_MEDIA_PCI		IXP2000_BOARD_IRQ(2) </div><div class='del'>-#define	IRQ_IXDP2400_MEDIA_SP		IXP2000_BOARD_IRQ(3) </div><div class='del'>-#define	IRQ_IXDP2400_SF_PCI		IXP2000_BOARD_IRQ(4) </div><div class='del'>-#define	IRQ_IXDP2400_SF_SP		IXP2000_BOARD_IRQ(5) </div><div class='del'>-#define	IRQ_IXDP2400_PMC		IXP2000_BOARD_IRQ(6) </div><div class='del'>-#define	IRQ_IXDP2400_TVM		IXP2000_BOARD_IRQ(7) </div><div class='del'>-</div><div class='del'>-#define	NR_IXDP2400_IRQS		((IRQ_IXDP2400_TVM)+1)  </div><div class='del'>-#define	IXDP2400_NR_IRQS		NR_IXDP2400_IRQS - NR_IXP2000_IRQS</div><div class='del'>-</div><div class='del'>-/* IXDP2800 specific IRQs */</div><div class='del'>-#define IRQ_IXDP2800_EGRESS_ENET	IXP2000_BOARD_IRQ(0)</div><div class='del'>-#define IRQ_IXDP2800_INGRESS_NPU	IXP2000_BOARD_IRQ(1)</div><div class='del'>-#define IRQ_IXDP2800_PMC		IXP2000_BOARD_IRQ(2)</div><div class='del'>-#define IRQ_IXDP2800_FABRIC_PCI		IXP2000_BOARD_IRQ(3)</div><div class='del'>-#define IRQ_IXDP2800_FABRIC		IXP2000_BOARD_IRQ(4)</div><div class='del'>-#define IRQ_IXDP2800_MEDIA		IXP2000_BOARD_IRQ(5)</div><div class='del'>-</div><div class='del'>-#define	NR_IXDP2800_IRQS		((IRQ_IXDP2800_MEDIA)+1)</div><div class='del'>-#define	IXDP2800_NR_IRQS		NR_IXDP2800_IRQS - NR_IXP2000_IRQS</div><div class='del'>-</div><div class='del'>-/* </div><div class='del'>- * IRQs on both IXDP2x01 boards</div><div class='del'>- */</div><div class='del'>-#define IRQ_IXDP2X01_SPCI_DB_0		IXP2000_BOARD_IRQ(2)</div><div class='del'>-#define IRQ_IXDP2X01_SPCI_DB_1		IXP2000_BOARD_IRQ(3)</div><div class='del'>-#define IRQ_IXDP2X01_SPCI_PMC_INTA	IXP2000_BOARD_IRQ(4)</div><div class='del'>-#define IRQ_IXDP2X01_SPCI_PMC_INTB	IXP2000_BOARD_IRQ(5)</div><div class='del'>-#define IRQ_IXDP2X01_SPCI_PMC_INTC	IXP2000_BOARD_IRQ(6)</div><div class='del'>-#define IRQ_IXDP2X01_SPCI_PMC_INTD	IXP2000_BOARD_IRQ(7)</div><div class='del'>-#define IRQ_IXDP2X01_SPCI_FIC_INT	IXP2000_BOARD_IRQ(8)</div><div class='del'>-#define IRQ_IXDP2X01_IPMI_FROM		IXP2000_BOARD_IRQ(16)</div><div class='del'>-#define IRQ_IXDP2X01_125US		IXP2000_BOARD_IRQ(17)</div><div class='del'>-#define IRQ_IXDP2X01_DB_0_ADD		IXP2000_BOARD_IRQ(18)</div><div class='del'>-#define IRQ_IXDP2X01_DB_1_ADD		IXP2000_BOARD_IRQ(19)</div><div class='del'>-#define IRQ_IXDP2X01_UART1		IXP2000_BOARD_IRQ(21)</div><div class='del'>-#define IRQ_IXDP2X01_UART2		IXP2000_BOARD_IRQ(22)</div><div class='del'>-#define IRQ_IXDP2X01_FIC_ADD_INT	IXP2000_BOARD_IRQ(24)</div><div class='del'>-#define IRQ_IXDP2X01_CS8900		IXP2000_BOARD_IRQ(25)</div><div class='del'>-#define IRQ_IXDP2X01_BBSRAM		IXP2000_BOARD_IRQ(26)</div><div class='del'>-</div><div class='del'>-#define IXDP2X01_VALID_IRQ_MASK ( \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_DB_0) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_DB_1) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTA) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTB) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTC) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTD) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_FIC_INT) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_IPMI_FROM) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_125US) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_DB_0_ADD) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_DB_1_ADD) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_UART1) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_UART2) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_FIC_ADD_INT) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_CS8900) | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_BBSRAM) )</div><div class='del'>-</div><div class='del'>-/* </div><div class='del'>- * IXDP2401 specific IRQs</div><div class='del'>- */</div><div class='del'>-#define IRQ_IXDP2401_INTA_82546		IXP2000_BOARD_IRQ(0)</div><div class='del'>-#define IRQ_IXDP2401_INTB_82546		IXP2000_BOARD_IRQ(1)</div><div class='del'>-</div><div class='del'>-#define	IXDP2401_VALID_IRQ_MASK ( \</div><div class='del'>-		IXDP2X01_VALID_IRQ_MASK | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2401_INTA_82546) |\</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2401_INTB_82546))</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXDP2801-specific IRQs</div><div class='del'>- */</div><div class='del'>-#define IRQ_IXDP2801_RIV		IXP2000_BOARD_IRQ(0)</div><div class='del'>-#define IRQ_IXDP2801_CNFG_MEDIA		IXP2000_BOARD_IRQ(27)</div><div class='del'>-#define IRQ_IXDP2801_CLOCK_REF		IXP2000_BOARD_IRQ(28)</div><div class='del'>-</div><div class='del'>-#define	IXDP2801_VALID_IRQ_MASK ( \</div><div class='del'>-		IXDP2X01_VALID_IRQ_MASK | \</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_RIV) |\</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_CNFG_MEDIA) |\</div><div class='del'>-		IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_CLOCK_REF))</div><div class='del'>-</div><div class='del'>-#define	NR_IXDP2X01_IRQS		((IRQ_IXDP2801_CLOCK_REF) + 1)</div><div class='del'>-</div><div class='del'>-#endif /*_IRQS_H*/</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/ixdp2x00.h b/arch/arm/mach-ixp2000/include/mach/ixdp2x00.h<br/>deleted file mode 100644<br/>index 5df8479d9481..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/ixdp2x00.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/ixdp2x00.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,92 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/ixdp2x00.h</div><div class='del'>- *</div><div class='del'>- * Register and other defines for IXDP2[48]00 platforms</div><div class='del'>- *</div><div class='del'>- * Original Author: Naeem Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002 Intel Corp.</div><div class='del'>- * Copyright (C) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- *  under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- */</div><div class='del'>-#ifndef _IXDP2X00_H_</div><div class='del'>-#define _IXDP2X00_H_</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * On board CPLD memory map</div><div class='del'>- */</div><div class='del'>-#define IXDP2X00_PHYS_CPLD_BASE		0xc7000000</div><div class='del'>-#define IXDP2X00_VIRT_CPLD_BASE		0xfe000000</div><div class='del'>-#define IXDP2X00_CPLD_SIZE		0x00100000</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define IXDP2X00_CPLD_REG(x)  	\</div><div class='del'>-	(volatile unsigned long *)(IXDP2X00_VIRT_CPLD_BASE | x)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXDP2400 CPLD registers</div><div class='del'>- */</div><div class='del'>-#define IXDP2400_CPLD_SYSLED		IXDP2X00_CPLD_REG(0x0)  </div><div class='del'>-#define IXDP2400_CPLD_DISP_DATA		IXDP2X00_CPLD_REG(0x4)</div><div class='del'>-#define IXDP2400_CPLD_CLOCK_SPEED	IXDP2X00_CPLD_REG(0x8)</div><div class='del'>-#define IXDP2400_CPLD_INT_STAT		IXDP2X00_CPLD_REG(0xc)</div><div class='del'>-#define IXDP2400_CPLD_REV		IXDP2X00_CPLD_REG(0x10)</div><div class='del'>-#define IXDP2400_CPLD_SYS_CLK_M		IXDP2X00_CPLD_REG(0x14)</div><div class='del'>-#define IXDP2400_CPLD_SYS_CLK_N		IXDP2X00_CPLD_REG(0x18)</div><div class='del'>-#define IXDP2400_CPLD_INT_MASK		IXDP2X00_CPLD_REG(0x48)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXDP2800 CPLD registers</div><div class='del'>- */</div><div class='del'>-#define IXDP2800_CPLD_INT_STAT		IXDP2X00_CPLD_REG(0x0)</div><div class='del'>-#define IXDP2800_CPLD_INT_MASK		IXDP2X00_CPLD_REG(0x140)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define	IXDP2X00_GPIO_I2C_ENABLE	0x02</div><div class='del'>-#define	IXDP2X00_GPIO_SCL		0x07</div><div class='del'>-#define	IXDP2X00_GPIO_SDA		0x06</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PCI devfns for on-board devices. We need these to be able to</div><div class='del'>- * properly translate IRQs and for device removal.</div><div class='del'>- */</div><div class='del'>-#define	IXDP2400_SLAVE_ENET_DEVFN	0x18	/* Bus 1 */</div><div class='del'>-#define	IXDP2400_MASTER_ENET_DEVFN	0x20	/* Bus 1 */</div><div class='del'>-#define	IXDP2400_MEDIA_DEVFN		0x28	/* Bus 1 */</div><div class='del'>-#define	IXDP2400_SWITCH_FABRIC_DEVFN	0x30	/* Bus 1 */</div><div class='del'>-</div><div class='del'>-#define	IXDP2800_SLAVE_ENET_DEVFN	0x20	/* Bus 1 */</div><div class='del'>-#define	IXDP2800_MASTER_ENET_DEVFN	0x18	/* Bus 1 */</div><div class='del'>-#define	IXDP2800_SWITCH_FABRIC_DEVFN	0x30	/* Bus 1 */</div><div class='del'>-</div><div class='del'>-#define	IXDP2X00_P2P_DEVFN		0x20	/* Bus 0 */</div><div class='del'>-#define	IXDP2X00_21555_DEVFN		0x30	/* Bus 0 */</div><div class='del'>-#define IXDP2X00_SLAVE_NPU_DEVFN	0x28	/* Bus 1 */</div><div class='del'>-#define	IXDP2X00_PMC_DEVFN		0x38	/* Bus 1 */</div><div class='del'>-#define IXDP2X00_MASTER_NPU_DEVFN	0x38	/* Bus 1 */</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-/*</div><div class='del'>- * The master NPU is always PCI master.</div><div class='del'>- */</div><div class='del'>-static inline unsigned int ixdp2x00_master_npu(void)</div><div class='del'>-{</div><div class='del'>-	return !!ixp2000_is_pcimaster();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Helper functions used by ixdp2400 and ixdp2800 specific code</div><div class='del'>- */</div><div class='del'>-void ixdp2x00_init_irq(volatile unsigned long*, volatile unsigned long *, unsigned long);</div><div class='del'>-void ixdp2x00_slave_pci_postinit(void);</div><div class='del'>-void ixdp2x00_init_machine(void);</div><div class='del'>-void ixdp2x00_map_io(void);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif /*_IXDP2X00_H_ */</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/ixdp2x01.h b/arch/arm/mach-ixp2000/include/mach/ixdp2x01.h<br/>deleted file mode 100644<br/>index 4c1f04083e54..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/ixdp2x01.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/ixdp2x01.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,57 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/ixdp2x01.h</div><div class='del'>- *</div><div class='del'>- * Platform definitions for IXDP2X01 &amp;&amp; IXDP2801 systems</div><div class='del'>- *</div><div class='del'>- * Author: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright 2004 (c) MontaVista Software, Inc. </div><div class='del'>- *</div><div class='del'>- * Based on original code Copyright (c) 2002-2003 Intel Corporation</div><div class='del'>- * </div><div class='del'>- * This file is licensed under  the terms of the GNU General Public </div><div class='del'>- * License version 2. This program is licensed "as is" without any </div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __IXDP2X01_H__</div><div class='del'>-#define __IXDP2X01_H__</div><div class='del'>-</div><div class='del'>-#define	IXDP2X01_PHYS_CPLD_BASE		0xc6024000</div><div class='del'>-#define	IXDP2X01_VIRT_CPLD_BASE		0xfe000000</div><div class='del'>-#define	IXDP2X01_CPLD_REGION_SIZE	0x00100000</div><div class='del'>-</div><div class='del'>-#define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg)</div><div class='del'>-#define IXDP2X01_CPLD_PHYS_REG(reg) (IXDP2X01_PHYS_CPLD_BASE | reg)</div><div class='del'>-</div><div class='del'>-#define IXDP2X01_UART1_VIRT_BASE	IXDP2X01_CPLD_VIRT_REG(0x40)</div><div class='del'>-#define IXDP2X01_UART1_PHYS_BASE	IXDP2X01_CPLD_PHYS_REG(0x40)</div><div class='del'>-</div><div class='del'>-#define IXDP2X01_UART2_VIRT_BASE	IXDP2X01_CPLD_VIRT_REG(0x60)</div><div class='del'>-#define IXDP2X01_UART2_PHYS_BASE	IXDP2X01_CPLD_PHYS_REG(0x60)</div><div class='del'>-</div><div class='del'>-#define IXDP2X01_CS8900_VIRT_BASE	IXDP2X01_CPLD_VIRT_REG(0x80)</div><div class='del'>-#define IXDP2X01_CS8900_VIRT_END	(IXDP2X01_CS8900_VIRT_BASE + 16)</div><div class='del'>-</div><div class='del'>-#define IXDP2X01_CPLD_RESET_REG         IXDP2X01_CPLD_VIRT_REG(0x00)</div><div class='del'>-#define IXDP2X01_INT_MASK_SET_REG	IXDP2X01_CPLD_VIRT_REG(0x08)</div><div class='del'>-#define IXDP2X01_INT_STAT_REG		IXDP2X01_CPLD_VIRT_REG(0x0C)</div><div class='del'>-#define IXDP2X01_INT_RAW_REG		IXDP2X01_CPLD_VIRT_REG(0x10) </div><div class='del'>-#define IXDP2X01_INT_MASK_CLR_REG	IXDP2X01_INT_RAW_REG</div><div class='del'>-#define IXDP2X01_INT_SIM_REG		IXDP2X01_CPLD_VIRT_REG(0x14)</div><div class='del'>-</div><div class='del'>-#define IXDP2X01_CPLD_FLASH_REG		IXDP2X01_CPLD_VIRT_REG(0x20)</div><div class='del'>-</div><div class='del'>-#define IXDP2X01_CPLD_FLASH_INTERN 	0x8000</div><div class='del'>-#define IXDP2X01_CPLD_FLASH_BANK_MASK 	0xF</div><div class='del'>-#define IXDP2X01_FLASH_WINDOW_BITS 	25</div><div class='del'>-#define IXDP2X01_FLASH_WINDOW_SIZE 	(1 &lt;&lt; IXDP2X01_FLASH_WINDOW_BITS)</div><div class='del'>-#define IXDP2X01_FLASH_WINDOW_MASK 	(IXDP2X01_FLASH_WINDOW_SIZE - 1)</div><div class='del'>-</div><div class='del'>-#define	IXDP2X01_UART_CLK		1843200</div><div class='del'>-</div><div class='del'>-#define	IXDP2X01_GPIO_I2C_ENABLE	0x02</div><div class='del'>-#define	IXDP2X01_GPIO_SCL		0x07</div><div class='del'>-#define	IXDP2X01_GPIO_SDA		0x06</div><div class='del'>-</div><div class='del'>-#endif /* __IXDP2x01_H__ */</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h b/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h<br/>deleted file mode 100644<br/>index 822f63f2f4a2..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,451 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h</div><div class='del'>- *</div><div class='del'>- * Chipset register definitions for IXP2400/2800 based systems.</div><div class='del'>- *</div><div class='del'>- * Original Author: Naeem Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- *</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002 Intel Corp.</div><div class='del'>- * Copyright (C) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- *  under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- */</div><div class='del'>-#ifndef _IXP2000_REGS_H_</div><div class='del'>-#define _IXP2000_REGS_H_</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXP2000 linux memory map:</div><div class='del'>- *</div><div class='del'>- * virt		phys		size</div><div class='del'>- * fb000000	db000000	16M		PCI CFG1</div><div class='del'>- * fc000000	da000000	16M		PCI CFG0</div><div class='del'>- * fd000000	d8000000	16M		PCI I/O</div><div class='del'>- * fe[0-7]00000			8M		per-platform mappings</div><div class='del'>- * fe900000	80000000	1M		SRAM #0 (first MB)</div><div class='del'>- * fea00000	cb400000	1M		SCRATCH ring get/put</div><div class='del'>- * feb00000	c8000000	1M		MSF</div><div class='del'>- * fec00000	df000000	1M		PCI CSRs</div><div class='del'>- * fed00000	de000000	1M		PCI CREG</div><div class='del'>- * fee00000	d6000000	1M		INTCTL</div><div class='del'>- * fef00000	c0000000	1M		CAP</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* </div><div class='del'>- * Static I/O regions.</div><div class='del'>- *</div><div class='del'>- * Most of the registers are clumped in 4K regions spread throughout</div><div class='del'>- * the 0xc0000000 -&gt; 0xc0100000 address range, but we just map in</div><div class='del'>- * the whole range using a single 1 MB section instead of small</div><div class='del'>- * 4K pages.</div><div class='del'>- *</div><div class='del'>- * CAP stands for CSR Access Proxy.</div><div class='del'>- *</div><div class='del'>- * If you change the virtual address of this mapping, please propagate</div><div class='del'>- * the change to arch/arm/kernel/debug.S, which hardcodes the virtual</div><div class='del'>- * address of the UART located in this region.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define	IXP2000_CAP_PHYS_BASE		0xc0000000</div><div class='del'>-#define	IXP2000_CAP_VIRT_BASE		0xfef00000</div><div class='del'>-#define	IXP2000_CAP_SIZE		0x00100000</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Addresses for specific on-chip peripherals.</div><div class='del'>- */</div><div class='del'>-#define	IXP2000_SLOWPORT_CSR_VIRT_BASE	0xfef80000</div><div class='del'>-#define	IXP2000_GLOBAL_REG_VIRT_BASE	0xfef04000</div><div class='del'>-#define	IXP2000_UART_PHYS_BASE		0xc0030000</div><div class='del'>-#define	IXP2000_UART_VIRT_BASE		0xfef30000</div><div class='del'>-#define	IXP2000_TIMER_VIRT_BASE		0xfef20000</div><div class='del'>-#define	IXP2000_UENGINE_CSR_VIRT_BASE	0xfef18000</div><div class='del'>-#define	IXP2000_GPIO_VIRT_BASE		0xfef10000</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Devices outside of the 0xc0000000 -&gt; 0xc0100000 range.  The virtual</div><div class='del'>- * addresses of the INTCTL and PCI_CSR mappings are hardcoded in</div><div class='del'>- * entry-macro.S, so if you ever change these please propagate</div><div class='del'>- * the change.</div><div class='del'>- */</div><div class='del'>-#define IXP2000_INTCTL_PHYS_BASE	0xd6000000</div><div class='del'>-#define	IXP2000_INTCTL_VIRT_BASE	0xfee00000</div><div class='del'>-#define	IXP2000_INTCTL_SIZE		0x00100000</div><div class='del'>-</div><div class='del'>-#define IXP2000_PCI_CREG_PHYS_BASE	0xde000000</div><div class='del'>-#define	IXP2000_PCI_CREG_VIRT_BASE	0xfed00000</div><div class='del'>-#define	IXP2000_PCI_CREG_SIZE		0x00100000</div><div class='del'>-</div><div class='del'>-#define IXP2000_PCI_CSR_PHYS_BASE	0xdf000000</div><div class='del'>-#define	IXP2000_PCI_CSR_VIRT_BASE	0xfec00000</div><div class='del'>-#define	IXP2000_PCI_CSR_SIZE		0x00100000</div><div class='del'>-</div><div class='del'>-#define IXP2000_MSF_PHYS_BASE		0xc8000000</div><div class='del'>-#define IXP2000_MSF_VIRT_BASE		0xfeb00000</div><div class='del'>-#define IXP2000_MSF_SIZE		0x00100000</div><div class='del'>-</div><div class='del'>-#define IXP2000_SCRATCH_RING_PHYS_BASE	0xcb400000</div><div class='del'>-#define IXP2000_SCRATCH_RING_VIRT_BASE	0xfea00000</div><div class='del'>-#define IXP2000_SCRATCH_RING_SIZE	0x00100000</div><div class='del'>-</div><div class='del'>-#define IXP2000_SRAM0_PHYS_BASE		0x80000000</div><div class='del'>-#define IXP2000_SRAM0_VIRT_BASE		0xfe900000</div><div class='del'>-#define IXP2000_SRAM0_SIZE		0x00100000</div><div class='del'>-</div><div class='del'>-#define IXP2000_PCI_IO_PHYS_BASE	0xd8000000</div><div class='del'>-#define	IXP2000_PCI_IO_VIRT_BASE	0xfd000000</div><div class='del'>-#define IXP2000_PCI_IO_SIZE     	0x01000000</div><div class='del'>-</div><div class='del'>-#define IXP2000_PCI_CFG0_PHYS_BASE	0xda000000</div><div class='del'>-#define IXP2000_PCI_CFG0_VIRT_BASE	0xfc000000</div><div class='del'>-#define IXP2000_PCI_CFG0_SIZE   	0x01000000</div><div class='del'>-</div><div class='del'>-#define IXP2000_PCI_CFG1_PHYS_BASE	0xdb000000</div><div class='del'>-#define IXP2000_PCI_CFG1_VIRT_BASE	0xfb000000</div><div class='del'>-#define IXP2000_PCI_CFG1_SIZE		0x01000000</div><div class='del'>-</div><div class='del'>-/* </div><div class='del'>- * Timers</div><div class='del'>- */</div><div class='del'>-#define	IXP2000_TIMER_REG(x)		((volatile unsigned long*)(IXP2000_TIMER_VIRT_BASE | (x)))</div><div class='del'>-/* Timer control */</div><div class='del'>-#define	IXP2000_T1_CTL			IXP2000_TIMER_REG(0x00)</div><div class='del'>-#define	IXP2000_T2_CTL			IXP2000_TIMER_REG(0x04)</div><div class='del'>-#define	IXP2000_T3_CTL			IXP2000_TIMER_REG(0x08)</div><div class='del'>-#define	IXP2000_T4_CTL			IXP2000_TIMER_REG(0x0c)</div><div class='del'>-/* Store initial value */</div><div class='del'>-#define	IXP2000_T1_CLD			IXP2000_TIMER_REG(0x10)</div><div class='del'>-#define	IXP2000_T2_CLD			IXP2000_TIMER_REG(0x14)</div><div class='del'>-#define	IXP2000_T3_CLD			IXP2000_TIMER_REG(0x18)</div><div class='del'>-#define	IXP2000_T4_CLD			IXP2000_TIMER_REG(0x1c)</div><div class='del'>-/* Read current value */</div><div class='del'>-#define	IXP2000_T1_CSR			IXP2000_TIMER_REG(0x20)</div><div class='del'>-#define	IXP2000_T2_CSR			IXP2000_TIMER_REG(0x24)</div><div class='del'>-#define	IXP2000_T3_CSR			IXP2000_TIMER_REG(0x28)</div><div class='del'>-#define	IXP2000_T4_CSR			IXP2000_TIMER_REG(0x2c)</div><div class='del'>-/* Clear associated timer interrupt */</div><div class='del'>-#define	IXP2000_T1_CLR			IXP2000_TIMER_REG(0x30)</div><div class='del'>-#define	IXP2000_T2_CLR			IXP2000_TIMER_REG(0x34)</div><div class='del'>-#define	IXP2000_T3_CLR			IXP2000_TIMER_REG(0x38)</div><div class='del'>-#define	IXP2000_T4_CLR			IXP2000_TIMER_REG(0x3c)</div><div class='del'>-/* Timer watchdog enable for T4 */</div><div class='del'>-#define	IXP2000_TWDE			IXP2000_TIMER_REG(0x40)</div><div class='del'>-</div><div class='del'>-#define	WDT_ENABLE			0x00000001</div><div class='del'>-#define	TIMER_DIVIDER_256		0x00000008</div><div class='del'>-#define	TIMER_ENABLE			0x00000080</div><div class='del'>-#define	IRQ_MASK_TIMER1         	(1 &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Interrupt controller registers</div><div class='del'>- */</div><div class='del'>-#define IXP2000_INTCTL_REG(x)		(volatile unsigned long*)(IXP2000_INTCTL_VIRT_BASE | (x))</div><div class='del'>-#define IXP2000_IRQ_STATUS		IXP2000_INTCTL_REG(0x08)</div><div class='del'>-#define IXP2000_IRQ_ENABLE		IXP2000_INTCTL_REG(0x10)</div><div class='del'>-#define IXP2000_IRQ_ENABLE_SET		IXP2000_INTCTL_REG(0x10)</div><div class='del'>-#define IXP2000_IRQ_ENABLE_CLR		IXP2000_INTCTL_REG(0x18)</div><div class='del'>-#define IXP2000_FIQ_ENABLE_CLR		IXP2000_INTCTL_REG(0x14)</div><div class='del'>-#define IXP2000_IRQ_ERR_STATUS		IXP2000_INTCTL_REG(0x24)</div><div class='del'>-#define IXP2000_IRQ_ERR_ENABLE_SET	IXP2000_INTCTL_REG(0x2c)</div><div class='del'>-#define IXP2000_FIQ_ERR_ENABLE_CLR	IXP2000_INTCTL_REG(0x30)</div><div class='del'>-#define IXP2000_IRQ_ERR_ENABLE_CLR	IXP2000_INTCTL_REG(0x34)</div><div class='del'>-#define IXP2000_IRQ_THD_RAW_STATUS_A_0	IXP2000_INTCTL_REG(0x60)</div><div class='del'>-#define IXP2000_IRQ_THD_RAW_STATUS_A_1	IXP2000_INTCTL_REG(0x64)</div><div class='del'>-#define IXP2000_IRQ_THD_RAW_STATUS_A_2	IXP2000_INTCTL_REG(0x68)</div><div class='del'>-#define IXP2000_IRQ_THD_RAW_STATUS_A_3	IXP2000_INTCTL_REG(0x6c)</div><div class='del'>-#define IXP2000_IRQ_THD_RAW_STATUS_B_0	IXP2000_INTCTL_REG(0x80)</div><div class='del'>-#define IXP2000_IRQ_THD_RAW_STATUS_B_1	IXP2000_INTCTL_REG(0x84)</div><div class='del'>-#define IXP2000_IRQ_THD_RAW_STATUS_B_2	IXP2000_INTCTL_REG(0x88)</div><div class='del'>-#define IXP2000_IRQ_THD_RAW_STATUS_B_3	IXP2000_INTCTL_REG(0x8c)</div><div class='del'>-#define IXP2000_IRQ_THD_STATUS_A_0	IXP2000_INTCTL_REG(0xe0)</div><div class='del'>-#define IXP2000_IRQ_THD_STATUS_A_1	IXP2000_INTCTL_REG(0xe4)</div><div class='del'>-#define IXP2000_IRQ_THD_STATUS_A_2	IXP2000_INTCTL_REG(0xe8)</div><div class='del'>-#define IXP2000_IRQ_THD_STATUS_A_3	IXP2000_INTCTL_REG(0xec)</div><div class='del'>-#define IXP2000_IRQ_THD_STATUS_B_0	IXP2000_INTCTL_REG(0x100)</div><div class='del'>-#define IXP2000_IRQ_THD_STATUS_B_1	IXP2000_INTCTL_REG(0x104)</div><div class='del'>-#define IXP2000_IRQ_THD_STATUS_B_2	IXP2000_INTCTL_REG(0x108)</div><div class='del'>-#define IXP2000_IRQ_THD_STATUS_B_3	IXP2000_INTCTL_REG(0x10c)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_SET_A_0	IXP2000_INTCTL_REG(0x160)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_SET_A_1	IXP2000_INTCTL_REG(0x164)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_SET_A_2	IXP2000_INTCTL_REG(0x168)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_SET_A_3	IXP2000_INTCTL_REG(0x16c)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_SET_B_0	IXP2000_INTCTL_REG(0x180)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_SET_B_1	IXP2000_INTCTL_REG(0x184)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_SET_B_2	IXP2000_INTCTL_REG(0x188)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_SET_B_3	IXP2000_INTCTL_REG(0x18c)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_0	IXP2000_INTCTL_REG(0x1e0)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_1	IXP2000_INTCTL_REG(0x1e4)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_2	IXP2000_INTCTL_REG(0x1e8)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_3	IXP2000_INTCTL_REG(0x1ec)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_0	IXP2000_INTCTL_REG(0x200)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_1	IXP2000_INTCTL_REG(0x204)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_2	IXP2000_INTCTL_REG(0x208)</div><div class='del'>-#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_3	IXP2000_INTCTL_REG(0x20c)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Mask of valid IRQs in the 32-bit IRQ register. We use</div><div class='del'>- * this to mark certain IRQs as being invalid.</div><div class='del'>- */</div><div class='del'>-#define	IXP2000_VALID_IRQ_MASK	0x0f0fffff</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PCI config register access from core</div><div class='del'>- */</div><div class='del'>-#define IXP2000_PCI_CREG(x)		(volatile unsigned long*)(IXP2000_PCI_CREG_VIRT_BASE | (x))</div><div class='del'>-#define IXP2000_PCI_CMDSTAT 		IXP2000_PCI_CREG(0x04)</div><div class='del'>-#define IXP2000_PCI_CSR_BAR		IXP2000_PCI_CREG(0x10)</div><div class='del'>-#define IXP2000_PCI_SRAM_BAR		IXP2000_PCI_CREG(0x14)</div><div class='del'>-#define IXP2000_PCI_SDRAM_BAR		IXP2000_PCI_CREG(0x18)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PCI CSRs</div><div class='del'>- */</div><div class='del'>-#define IXP2000_PCI_CSR(x)		(volatile unsigned long*)(IXP2000_PCI_CSR_VIRT_BASE | (x))</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PCI outbound interrupts</div><div class='del'>- */</div><div class='del'>-#define IXP2000_PCI_OUT_INT_STATUS	IXP2000_PCI_CSR(0x30)</div><div class='del'>-#define IXP2000_PCI_OUT_INT_MASK	IXP2000_PCI_CSR(0x34)</div><div class='del'>-/*</div><div class='del'>- * PCI communications</div><div class='del'>- */</div><div class='del'>-#define IXP2000_PCI_MAILBOX0		IXP2000_PCI_CSR(0x50)</div><div class='del'>-#define IXP2000_PCI_MAILBOX1		IXP2000_PCI_CSR(0x54)</div><div class='del'>-#define IXP2000_PCI_MAILBOX2		IXP2000_PCI_CSR(0x58)</div><div class='del'>-#define IXP2000_PCI_MAILBOX3		IXP2000_PCI_CSR(0x5C)</div><div class='del'>-#define IXP2000_XSCALE_DOORBELL		IXP2000_PCI_CSR(0x60)</div><div class='del'>-#define IXP2000_XSCALE_DOORBELL_SETUP	IXP2000_PCI_CSR(0x64)</div><div class='del'>-#define IXP2000_PCI_DOORBELL		IXP2000_PCI_CSR(0x70)</div><div class='del'>-#define IXP2000_PCI_DOORBELL_SETUP	IXP2000_PCI_CSR(0x74)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * DMA engines</div><div class='del'>- */</div><div class='del'>-#define IXP2000_PCI_CH1_BYTE_CNT	IXP2000_PCI_CSR(0x80)</div><div class='del'>-#define IXP2000_PCI_CH1_ADDR		IXP2000_PCI_CSR(0x84)</div><div class='del'>-#define IXP2000_PCI_CH1_DRAM_ADDR	IXP2000_PCI_CSR(0x88)</div><div class='del'>-#define IXP2000_PCI_CH1_DESC_PTR	IXP2000_PCI_CSR(0x8C)</div><div class='del'>-#define IXP2000_PCI_CH1_CNTRL		IXP2000_PCI_CSR(0x90)</div><div class='del'>-#define IXP2000_PCI_CH1_ME_PARAM	IXP2000_PCI_CSR(0x94)</div><div class='del'>-#define IXP2000_PCI_CH2_BYTE_CNT	IXP2000_PCI_CSR(0xA0)</div><div class='del'>-#define IXP2000_PCI_CH2_ADDR		IXP2000_PCI_CSR(0xA4)</div><div class='del'>-#define IXP2000_PCI_CH2_DRAM_ADDR	IXP2000_PCI_CSR(0xA8)</div><div class='del'>-#define IXP2000_PCI_CH2_DESC_PTR	IXP2000_PCI_CSR(0xAC)</div><div class='del'>-#define IXP2000_PCI_CH2_CNTRL		IXP2000_PCI_CSR(0xB0)</div><div class='del'>-#define IXP2000_PCI_CH2_ME_PARAM	IXP2000_PCI_CSR(0xB4)</div><div class='del'>-#define IXP2000_PCI_CH3_BYTE_CNT	IXP2000_PCI_CSR(0xC0)</div><div class='del'>-#define IXP2000_PCI_CH3_ADDR		IXP2000_PCI_CSR(0xC4)</div><div class='del'>-#define IXP2000_PCI_CH3_DRAM_ADDR	IXP2000_PCI_CSR(0xC8)</div><div class='del'>-#define IXP2000_PCI_CH3_DESC_PTR	IXP2000_PCI_CSR(0xCC)</div><div class='del'>-#define IXP2000_PCI_CH3_CNTRL		IXP2000_PCI_CSR(0xD0)</div><div class='del'>-#define IXP2000_PCI_CH3_ME_PARAM	IXP2000_PCI_CSR(0xD4)</div><div class='del'>-#define IXP2000_DMA_INF_MODE		IXP2000_PCI_CSR(0xE0)</div><div class='del'>-/*</div><div class='del'>- * Size masks for BARs</div><div class='del'>- */</div><div class='del'>-#define IXP2000_PCI_SRAM_BASE_ADDR_MASK	IXP2000_PCI_CSR(0xFC)</div><div class='del'>-#define IXP2000_PCI_DRAM_BASE_ADDR_MASK	IXP2000_PCI_CSR(0x100)</div><div class='del'>-/*</div><div class='del'>- * Control and uEngine related</div><div class='del'>- */</div><div class='del'>-#define IXP2000_PCI_CONTROL		IXP2000_PCI_CSR(0x13C)</div><div class='del'>-#define IXP2000_PCI_ADDR_EXT		IXP2000_PCI_CSR(0x140)</div><div class='del'>-#define IXP2000_PCI_ME_PUSH_STATUS	IXP2000_PCI_CSR(0x148)</div><div class='del'>-#define IXP2000_PCI_ME_PUSH_EN		IXP2000_PCI_CSR(0x14C)</div><div class='del'>-#define IXP2000_PCI_ERR_STATUS		IXP2000_PCI_CSR(0x150)</div><div class='del'>-#define IXP2000_PCI_ERR_ENABLE		IXP2000_PCI_CSR(0x154)</div><div class='del'>-/*</div><div class='del'>- * Inbound PCI interrupt control</div><div class='del'>- */</div><div class='del'>-#define IXP2000_PCI_XSCALE_INT_STATUS	IXP2000_PCI_CSR(0x158)</div><div class='del'>-#define IXP2000_PCI_XSCALE_INT_ENABLE	IXP2000_PCI_CSR(0x15C)</div><div class='del'>-</div><div class='del'>-#define IXP2000_PCICNTL_PNR		(1&lt;&lt;17)	/* PCI not Reset bit of PCI_CONTROL */</div><div class='del'>-#define IXP2000_PCICNTL_PCF		(1&lt;&lt;28)	/* PCI Central function bit */</div><div class='del'>-#define IXP2000_XSCALE_INT		(1&lt;&lt;1)	/* Interrupt from XScale to PCI */</div><div class='del'>-</div><div class='del'>-/* These are from the IRQ register in the PCI ISR register */</div><div class='del'>-#define PCI_CONTROL_BE_DEO		(1 &lt;&lt; 22)	/* Big Endian Data Enable Out */</div><div class='del'>-#define PCI_CONTROL_BE_DEI		(1 &lt;&lt; 21)	/* Big Endian Data Enable In  */</div><div class='del'>-#define PCI_CONTROL_BE_BEO		(1 &lt;&lt; 20)	/* Big Endian Byte Enable Out */</div><div class='del'>-#define PCI_CONTROL_BE_BEI		(1 &lt;&lt; 19)	/* Big Endian Byte Enable In  */</div><div class='del'>-#define PCI_CONTROL_IEE			(1 &lt;&lt; 17)	/* I/O cycle Endian swap Enable */</div><div class='del'>-</div><div class='del'>-#define IXP2000_PCI_RST_REL		(1 &lt;&lt; 2)</div><div class='del'>-#define CFG_RST_DIR			(*IXP2000_PCI_CONTROL &amp; IXP2000_PCICNTL_PCF)</div><div class='del'>-#define CFG_PCI_BOOT_HOST		(1 &lt;&lt; 2)</div><div class='del'>-#define CFG_BOOT_PROM			(1 &lt;&lt; 1)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SlowPort CSRs</div><div class='del'>- *</div><div class='del'>- * The slowport is used to access things like flash, SONET framer control</div><div class='del'>- * ports, slave microprocessors, CPLDs, and others of chip memory mapped</div><div class='del'>- * peripherals.</div><div class='del'>- */</div><div class='del'>-#define	SLOWPORT_CSR(x)		(volatile unsigned long*)(IXP2000_SLOWPORT_CSR_VIRT_BASE | (x))</div><div class='del'>-</div><div class='del'>-#define	IXP2000_SLOWPORT_CCR		SLOWPORT_CSR(0x00)</div><div class='del'>-#define	IXP2000_SLOWPORT_WTC1		SLOWPORT_CSR(0x04)</div><div class='del'>-#define	IXP2000_SLOWPORT_WTC2		SLOWPORT_CSR(0x08)</div><div class='del'>-#define	IXP2000_SLOWPORT_RTC1		SLOWPORT_CSR(0x0c)</div><div class='del'>-#define	IXP2000_SLOWPORT_RTC2		SLOWPORT_CSR(0x10)</div><div class='del'>-#define	IXP2000_SLOWPORT_FSR		SLOWPORT_CSR(0x14)</div><div class='del'>-#define	IXP2000_SLOWPORT_PCR		SLOWPORT_CSR(0x18)</div><div class='del'>-#define	IXP2000_SLOWPORT_ADC		SLOWPORT_CSR(0x1C)</div><div class='del'>-#define	IXP2000_SLOWPORT_FAC		SLOWPORT_CSR(0x20)</div><div class='del'>-#define	IXP2000_SLOWPORT_FRM		SLOWPORT_CSR(0x24)</div><div class='del'>-#define	IXP2000_SLOWPORT_FIN		SLOWPORT_CSR(0x28)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * CCR values.  </div><div class='del'>- * The CCR configures the clock division for the slowport interface.</div><div class='del'>- */</div><div class='del'>-#define	SLOWPORT_CCR_DIV_1		0x00</div><div class='del'>-#define	SLOWPORT_CCR_DIV_2		0x01</div><div class='del'>-#define	SLOWPORT_CCR_DIV_4		0x02</div><div class='del'>-#define	SLOWPORT_CCR_DIV_6		0x03</div><div class='del'>-#define	SLOWPORT_CCR_DIV_8		0x04</div><div class='del'>-#define	SLOWPORT_CCR_DIV_10		0x05</div><div class='del'>-#define	SLOWPORT_CCR_DIV_12		0x06</div><div class='del'>-#define	SLOWPORT_CCR_DIV_14		0x07</div><div class='del'>-#define	SLOWPORT_CCR_DIV_16		0x08</div><div class='del'>-#define	SLOWPORT_CCR_DIV_18		0x09</div><div class='del'>-#define	SLOWPORT_CCR_DIV_20		0x0a</div><div class='del'>-#define	SLOWPORT_CCR_DIV_22		0x0b</div><div class='del'>-#define	SLOWPORT_CCR_DIV_24		0x0c</div><div class='del'>-#define	SLOWPORT_CCR_DIV_26		0x0d</div><div class='del'>-#define	SLOWPORT_CCR_DIV_28		0x0e</div><div class='del'>-#define	SLOWPORT_CCR_DIV_30		0x0f</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PCR values.  PCR configure the mode of the interface.</div><div class='del'>- */</div><div class='del'>-#define	SLOWPORT_MODE_FLASH		0x00</div><div class='del'>-#define	SLOWPORT_MODE_LUCENT		0x01</div><div class='del'>-#define	SLOWPORT_MODE_PMC_SIERRA	0x02</div><div class='del'>-#define	SLOWPORT_MODE_INTEL_UP		0x03</div><div class='del'>-#define	SLOWPORT_MODE_MOTOROLA_UP	0x04</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ADC values.  Defines data and address bus widths.</div><div class='del'>- */</div><div class='del'>-#define	SLOWPORT_ADDR_WIDTH_8		0x00</div><div class='del'>-#define	SLOWPORT_ADDR_WIDTH_16		0x01</div><div class='del'>-#define	SLOWPORT_ADDR_WIDTH_24		0x02</div><div class='del'>-#define	SLOWPORT_ADDR_WIDTH_32		0x03</div><div class='del'>-#define	SLOWPORT_DATA_WIDTH_8		0x00</div><div class='del'>-#define	SLOWPORT_DATA_WIDTH_16		0x10</div><div class='del'>-#define	SLOWPORT_DATA_WIDTH_24		0x20</div><div class='del'>-#define	SLOWPORT_DATA_WIDTH_32		0x30</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Masks and shifts for various fields in the WTC and RTC registers.</div><div class='del'>- */</div><div class='del'>-#define	SLOWPORT_WRTC_MASK_HD		0x0003</div><div class='del'>-#define	SLOWPORT_WRTC_MASK_PW		0x003c</div><div class='del'>-#define	SLOWPORT_WRTC_MASK_SU		0x03c0</div><div class='del'>-</div><div class='del'>-#define	SLOWPORT_WRTC_SHIFT_HD		0x00</div><div class='del'>-#define	SLOWPORT_WRTC_SHIFT_SU		0x02</div><div class='del'>-#define	SLOWPORT_WRTC_SHFIT_PW		0x06</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * GPIO registers &amp; GPIO interface.</div><div class='del'>- */</div><div class='del'>-#define IXP2000_GPIO_REG(x)		((volatile unsigned long*)(IXP2000_GPIO_VIRT_BASE+(x)))</div><div class='del'>-#define IXP2000_GPIO_PLR		IXP2000_GPIO_REG(0x00)</div><div class='del'>-#define IXP2000_GPIO_PDPR		IXP2000_GPIO_REG(0x04)</div><div class='del'>-#define IXP2000_GPIO_PDSR		IXP2000_GPIO_REG(0x08)</div><div class='del'>-#define IXP2000_GPIO_PDCR		IXP2000_GPIO_REG(0x0c)</div><div class='del'>-#define IXP2000_GPIO_POPR		IXP2000_GPIO_REG(0x10)</div><div class='del'>-#define IXP2000_GPIO_POSR		IXP2000_GPIO_REG(0x14)</div><div class='del'>-#define IXP2000_GPIO_POCR		IXP2000_GPIO_REG(0x18)</div><div class='del'>-#define IXP2000_GPIO_REDR		IXP2000_GPIO_REG(0x1c)</div><div class='del'>-#define IXP2000_GPIO_FEDR		IXP2000_GPIO_REG(0x20)</div><div class='del'>-#define IXP2000_GPIO_EDSR		IXP2000_GPIO_REG(0x24)</div><div class='del'>-#define IXP2000_GPIO_LSHR		IXP2000_GPIO_REG(0x28)</div><div class='del'>-#define IXP2000_GPIO_LSLR		IXP2000_GPIO_REG(0x2c)</div><div class='del'>-#define IXP2000_GPIO_LDSR		IXP2000_GPIO_REG(0x30)</div><div class='del'>-#define IXP2000_GPIO_INER		IXP2000_GPIO_REG(0x34)</div><div class='del'>-#define IXP2000_GPIO_INSR		IXP2000_GPIO_REG(0x38)</div><div class='del'>-#define IXP2000_GPIO_INCR		IXP2000_GPIO_REG(0x3c)</div><div class='del'>-#define IXP2000_GPIO_INST		IXP2000_GPIO_REG(0x40)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * "Global" registers...whatever that's supposed to mean.</div><div class='del'>- */</div><div class='del'>-#define GLOBAL_REG_BASE			(IXP2000_GLOBAL_REG_VIRT_BASE + 0x0a00)</div><div class='del'>-#define GLOBAL_REG(x)			(volatile unsigned long*)(GLOBAL_REG_BASE | (x))</div><div class='del'>-</div><div class='del'>-#define IXP2000_MAJ_PROD_TYPE_MASK	0x001F0000</div><div class='del'>-#define IXP2000_MAJ_PROD_TYPE_IXP2000	0x00000000</div><div class='del'>-#define IXP2000_MIN_PROD_TYPE_MASK 	0x0000FF00</div><div class='del'>-#define IXP2000_MIN_PROD_TYPE_IXP2400	0x00000200</div><div class='del'>-#define IXP2000_MIN_PROD_TYPE_IXP2850	0x00000100</div><div class='del'>-#define IXP2000_MIN_PROD_TYPE_IXP2800	0x00000000</div><div class='del'>-#define IXP2000_MAJ_REV_MASK	      	0x000000F0</div><div class='del'>-#define IXP2000_MIN_REV_MASK	      	0x0000000F</div><div class='del'>-#define IXP2000_PROD_ID_MASK		0xFFFFFFFF</div><div class='del'>-</div><div class='del'>-#define IXP2000_PRODUCT_ID		GLOBAL_REG(0x00)</div><div class='del'>-#define IXP2000_MISC_CONTROL		GLOBAL_REG(0x04)</div><div class='del'>-#define IXP2000_MSF_CLK_CNTRL  		GLOBAL_REG(0x08)</div><div class='del'>-#define IXP2000_RESET0      		GLOBAL_REG(0x0c)</div><div class='del'>-#define IXP2000_RESET1      		GLOBAL_REG(0x10)</div><div class='del'>-#define IXP2000_CCR            		GLOBAL_REG(0x14)</div><div class='del'>-#define	IXP2000_STRAP_OPTIONS  		GLOBAL_REG(0x18)</div><div class='del'>-</div><div class='del'>-#define	RSTALL				(1 &lt;&lt; 16)</div><div class='del'>-#define	WDT_RESET_ENABLE		0x01000000</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * MSF registers.  The IXP2400 and IXP2800 have somewhat different MSF</div><div class='del'>- * units, but the registers that differ between the two don't overlap,</div><div class='del'>- * so we can have one register list for both.</div><div class='del'>- */</div><div class='del'>-#define IXP2000_MSF_REG(x)			((volatile unsigned long*)(IXP2000_MSF_VIRT_BASE + (x)))</div><div class='del'>-#define IXP2000_MSF_RX_CONTROL			IXP2000_MSF_REG(0x0000)</div><div class='del'>-#define IXP2000_MSF_TX_CONTROL			IXP2000_MSF_REG(0x0004)</div><div class='del'>-#define IXP2000_MSF_INTERRUPT_STATUS		IXP2000_MSF_REG(0x0008)</div><div class='del'>-#define IXP2000_MSF_INTERRUPT_ENABLE		IXP2000_MSF_REG(0x000c)</div><div class='del'>-#define IXP2000_MSF_CSIX_TYPE_MAP		IXP2000_MSF_REG(0x0010)</div><div class='del'>-#define IXP2000_MSF_FC_EGRESS_STATUS		IXP2000_MSF_REG(0x0014)</div><div class='del'>-#define IXP2000_MSF_FC_INGRESS_STATUS		IXP2000_MSF_REG(0x0018)</div><div class='del'>-#define IXP2000_MSF_HWM_CONTROL			IXP2000_MSF_REG(0x0024)</div><div class='del'>-#define IXP2000_MSF_FC_STATUS_OVERRIDE		IXP2000_MSF_REG(0x0028)</div><div class='del'>-#define IXP2000_MSF_CLOCK_CONTROL		IXP2000_MSF_REG(0x002c)</div><div class='del'>-#define IXP2000_MSF_RX_PORT_MAP			IXP2000_MSF_REG(0x0040)</div><div class='del'>-#define IXP2000_MSF_RBUF_ELEMENT_DONE		IXP2000_MSF_REG(0x0044)</div><div class='del'>-#define IXP2000_MSF_RX_MPHY_POLL_LIMIT		IXP2000_MSF_REG(0x0048)</div><div class='del'>-#define IXP2000_MSF_RX_CALENDAR_LENGTH		IXP2000_MSF_REG(0x0048)</div><div class='del'>-#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_0	IXP2000_MSF_REG(0x0050)</div><div class='del'>-#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_1	IXP2000_MSF_REG(0x0054)</div><div class='del'>-#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_2	IXP2000_MSF_REG(0x0058)</div><div class='del'>-#define IXP2000_MSF_TX_SEQUENCE_0		IXP2000_MSF_REG(0x0060)</div><div class='del'>-#define IXP2000_MSF_TX_SEQUENCE_1		IXP2000_MSF_REG(0x0064)</div><div class='del'>-#define IXP2000_MSF_TX_SEQUENCE_2		IXP2000_MSF_REG(0x0068)</div><div class='del'>-#define IXP2000_MSF_TX_MPHY_POLL_LIMIT		IXP2000_MSF_REG(0x0070)</div><div class='del'>-#define IXP2000_MSF_TX_CALENDAR_LENGTH		IXP2000_MSF_REG(0x0070)</div><div class='del'>-#define IXP2000_MSF_RX_UP_CONTROL_0		IXP2000_MSF_REG(0x0080)</div><div class='del'>-#define IXP2000_MSF_RX_UP_CONTROL_1		IXP2000_MSF_REG(0x0084)</div><div class='del'>-#define IXP2000_MSF_RX_UP_CONTROL_2		IXP2000_MSF_REG(0x0088)</div><div class='del'>-#define IXP2000_MSF_RX_UP_CONTROL_3		IXP2000_MSF_REG(0x008c)</div><div class='del'>-#define IXP2000_MSF_TX_UP_CONTROL_0		IXP2000_MSF_REG(0x0090)</div><div class='del'>-#define IXP2000_MSF_TX_UP_CONTROL_1		IXP2000_MSF_REG(0x0094)</div><div class='del'>-#define IXP2000_MSF_TX_UP_CONTROL_2		IXP2000_MSF_REG(0x0098)</div><div class='del'>-#define IXP2000_MSF_TX_UP_CONTROL_3		IXP2000_MSF_REG(0x009c)</div><div class='del'>-#define IXP2000_MSF_TRAIN_DATA			IXP2000_MSF_REG(0x00a0)</div><div class='del'>-#define IXP2000_MSF_TRAIN_CALENDAR		IXP2000_MSF_REG(0x00a4)</div><div class='del'>-#define IXP2000_MSF_TRAIN_FLOW_CONTROL		IXP2000_MSF_REG(0x00a8)</div><div class='del'>-#define IXP2000_MSF_TX_CALENDAR_0		IXP2000_MSF_REG(0x1000)</div><div class='del'>-#define IXP2000_MSF_RX_PORT_CALENDAR_STATUS	IXP2000_MSF_REG(0x1400)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif				/* _IXP2000_H_ */</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/memory.h b/arch/arm/mach-ixp2000/include/mach/memory.h<br/>deleted file mode 100644<br/>index 5f0c4fd4076a..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/memory.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/memory.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,31 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/memory.h</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2002 Intel Corp.</div><div class='del'>- * Copyright (c) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- *  under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_MEMORY_H</div><div class='del'>-#define __ASM_ARCH_MEMORY_H</div><div class='del'>-</div><div class='del'>-#define PLAT_PHYS_OFFSET	UL(0x00000000)</div><div class='del'>-</div><div class='del'>-#include &lt;mach/ixp2000-regs.h&gt;</div><div class='del'>-</div><div class='del'>-#define IXP2000_PCI_SDRAM_OFFSET	(*IXP2000_PCI_SDRAM_BAR &amp; 0xfffffff0)</div><div class='del'>-</div><div class='del'>-#define __phys_to_bus(x)	((x) + (IXP2000_PCI_SDRAM_OFFSET - PHYS_OFFSET))</div><div class='del'>-#define __bus_to_phys(x)	((x) - (IXP2000_PCI_SDRAM_OFFSET - PHYS_OFFSET))</div><div class='del'>-</div><div class='del'>-#define __virt_to_bus(v)	__phys_to_bus(__virt_to_phys(v))</div><div class='del'>-#define __bus_to_virt(b)	__phys_to_virt(__bus_to_phys(b))</div><div class='del'>-#define __pfn_to_bus(p)		__phys_to_bus(__pfn_to_phys(p))</div><div class='del'>-#define __bus_to_pfn(b)		__phys_to_pfn(__bus_to_phys(b))</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/platform.h b/arch/arm/mach-ixp2000/include/mach/platform.h<br/>deleted file mode 100644<br/>index bb0f8dcf9ee1..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/platform.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/platform.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,153 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/platform.h</div><div class='del'>- *</div><div class='del'>- * Various bits of code used by platform-level code.</div><div class='del'>- *</div><div class='del'>- * Author: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright 2004 (c) MontaVista Software, Inc. </div><div class='del'>- * </div><div class='del'>- * This file is licensed under  the terms of the GNU General Public </div><div class='del'>- * License version 2. This program is licensed "as is" without any </div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-static inline unsigned long ixp2000_reg_read(volatile void *reg)</div><div class='del'>-{</div><div class='del'>-	return *((volatile unsigned long *)reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void ixp2000_reg_write(volatile void *reg, unsigned long val)</div><div class='del'>-{</div><div class='del'>-	*((volatile unsigned long *)reg) = val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * On the IXP2400, we can't use XCB=000 due to chip bugs.  We use</div><div class='del'>- * XCB=101 instead, but that makes all I/O accesses bufferable.  This</div><div class='del'>- * is not a problem in general, but we do have to be slightly more</div><div class='del'>- * careful because I/O writes are no longer automatically flushed out</div><div class='del'>- * of the write buffer.</div><div class='del'>- *</div><div class='del'>- * In cases where we want to make sure that a write has been flushed</div><div class='del'>- * out of the write buffer before we proceed, for example when masking</div><div class='del'>- * a device interrupt before re-enabling IRQs in CPSR, we can use this</div><div class='del'>- * function, ixp2000_reg_wrb, which performs a write, a readback, and</div><div class='del'>- * issues a dummy instruction dependent on the value of the readback</div><div class='del'>- * (mov rX, rX) to make sure that the readback has completed before we</div><div class='del'>- * continue.</div><div class='del'>- */</div><div class='del'>-static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val)</div><div class='del'>-{</div><div class='del'>-	unsigned long dummy;</div><div class='del'>-</div><div class='del'>-	*((volatile unsigned long *)reg) = val;</div><div class='del'>-</div><div class='del'>-	dummy = *((volatile unsigned long *)reg);</div><div class='del'>-	__asm__ __volatile__("mov %0, %0" : "+r" (dummy));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Boards may multiplex different devices on the 2nd channel of </div><div class='del'>- * the slowport interface that each need different configuration </div><div class='del'>- * settings.  For example, the IXDP2400 uses channel 2 on the interface </div><div class='del'>- * to access the CPLD, the switch fabric card, and the media card.  Each</div><div class='del'>- * one needs a different mode so drivers must save/restore the mode </div><div class='del'>- * before and after each operation.  </div><div class='del'>- *</div><div class='del'>- * acquire_slowport(&amp;your_config);</div><div class='del'>- * ...</div><div class='del'>- * do slowport operations</div><div class='del'>- * ...</div><div class='del'>- * release_slowport();</div><div class='del'>- *</div><div class='del'>- * Note that while you have the slowport, you are holding a spinlock,</div><div class='del'>- * so your code should be written as if you explicitly acquired a lock.</div><div class='del'>- *</div><div class='del'>- * The configuration only affects device 2 on the slowport, so the</div><div class='del'>- * MTD map driver does not acquire/release the slowport.  </div><div class='del'>- */</div><div class='del'>-struct slowport_cfg {</div><div class='del'>-	unsigned long CCR;	/* Clock divide */</div><div class='del'>-	unsigned long WTC;	/* Write Timing Control */</div><div class='del'>-	unsigned long RTC;	/* Read Timing Control */</div><div class='del'>-	unsigned long PCR;	/* Protocol Control Register */</div><div class='del'>-	unsigned long ADC;	/* Address/Data Width Control */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-void ixp2000_acquire_slowport(struct slowport_cfg *, struct slowport_cfg *);</div><div class='del'>-void ixp2000_release_slowport(struct slowport_cfg *);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXP2400 A0/A1 and  IXP2800 A0/A1/A2 have broken slowport that requires</div><div class='del'>- * tweaking of addresses in the MTD driver.</div><div class='del'>- */</div><div class='del'>-static inline unsigned ixp2000_has_broken_slowport(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long id = *IXP2000_PRODUCT_ID;</div><div class='del'>-	unsigned long id_prod = id &amp; (IXP2000_MAJ_PROD_TYPE_MASK |</div><div class='del'>-				      IXP2000_MIN_PROD_TYPE_MASK);</div><div class='del'>-	return (((id_prod ==</div><div class='del'>-		  /* fixed in IXP2400-B0 */</div><div class='del'>-		  (IXP2000_MAJ_PROD_TYPE_IXP2000 |</div><div class='del'>-		   IXP2000_MIN_PROD_TYPE_IXP2400)) &amp;&amp;</div><div class='del'>-		 ((id &amp; IXP2000_MAJ_REV_MASK) == 0)) ||</div><div class='del'>-		((id_prod ==</div><div class='del'>-		  /* fixed in IXP2800-B0 */</div><div class='del'>-		  (IXP2000_MAJ_PROD_TYPE_IXP2000 |</div><div class='del'>-		   IXP2000_MIN_PROD_TYPE_IXP2800)) &amp;&amp;</div><div class='del'>-		 ((id &amp; IXP2000_MAJ_REV_MASK) == 0)) ||</div><div class='del'>-		((id_prod ==</div><div class='del'>-		  /* fixed in IXP2850-B0 */</div><div class='del'>-		  (IXP2000_MAJ_PROD_TYPE_IXP2000 |</div><div class='del'>-		   IXP2000_MIN_PROD_TYPE_IXP2850)) &amp;&amp;</div><div class='del'>-		 ((id &amp; IXP2000_MAJ_REV_MASK) == 0)));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int ixp2000_has_flash(void)</div><div class='del'>-{</div><div class='del'>-	return ((*IXP2000_STRAP_OPTIONS) &amp; (CFG_BOOT_PROM));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int ixp2000_is_pcimaster(void)</div><div class='del'>-{</div><div class='del'>-	return ((*IXP2000_STRAP_OPTIONS) &amp; (CFG_PCI_BOOT_HOST));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ixp2000_map_io(void);</div><div class='del'>-void ixp2000_uart_init(void);</div><div class='del'>-void ixp2000_init_irq(void);</div><div class='del'>-void ixp2000_init_time(unsigned long);</div><div class='del'>-void ixp2000_restart(char, const char *);</div><div class='del'>-unsigned long ixp2000_gettimeoffset(void);</div><div class='del'>-</div><div class='del'>-struct pci_sys_data;</div><div class='del'>-</div><div class='del'>-u32 *ixp2000_pci_config_addr(unsigned int bus, unsigned int devfn, int where);</div><div class='del'>-void ixp2000_pci_preinit(void);</div><div class='del'>-int ixp2000_pci_setup(int, struct pci_sys_data*);</div><div class='del'>-struct pci_bus* ixp2000_pci_scan_bus(int, struct pci_sys_data*);</div><div class='del'>-int ixp2000_pci_read_config(struct pci_bus*, unsigned int, int, int, u32 *);</div><div class='del'>-int ixp2000_pci_write_config(struct pci_bus*, unsigned int, int, int, u32);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Several of the IXP2000 systems have banked flash so we need to extend the</div><div class='del'>- * flash_platform_data structure with some private pointers</div><div class='del'>- */</div><div class='del'>-struct ixp2000_flash_data {</div><div class='del'>-	struct flash_platform_data *platform_data;</div><div class='del'>-	int nr_banks;</div><div class='del'>-	unsigned long (*bank_setup)(unsigned long);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ixp2000_i2c_pins {</div><div class='del'>-	unsigned long sda_pin;</div><div class='del'>-	unsigned long scl_pin;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif /*  !__ASSEMBLY__ */</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/timex.h b/arch/arm/mach-ixp2000/include/mach/timex.h<br/>deleted file mode 100644<br/>index 835e659f93d4..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/timex.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/timex.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/timex.h</div><div class='del'>- *</div><div class='del'>- * IXP2000 architecture timex specifications</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Default clock is 50MHz APB, but platform code can override this</div><div class='del'>- */</div><div class='del'>-#define CLOCK_TICK_RATE	50000000</div><div class='del'>-</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/include/mach/uncompress.h b/arch/arm/mach-ixp2000/include/mach/uncompress.h<br/>deleted file mode 100644<br/>index ce363087df78..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/include/mach/uncompress.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/include/mach/uncompress.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,47 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/include/mach/uncompress.h</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * Original Author: Naeem Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright 2002 Intel Corp.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- *  under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/serial_reg.h&gt;</div><div class='del'>-</div><div class='del'>-#define UART_BASE	0xc0030000</div><div class='del'>-</div><div class='del'>-#define PHYS(x)          ((volatile unsigned long *)(UART_BASE + x))</div><div class='del'>-</div><div class='del'>-#define UARTDR          PHYS(0x00)      /* Transmit reg dlab=0 */</div><div class='del'>-#define UARTDLL         PHYS(0x00)      /* Divisor Latch reg dlab=1*/</div><div class='del'>-#define UARTDLM         PHYS(0x04)      /* Divisor Latch reg dlab=1*/</div><div class='del'>-#define UARTIER         PHYS(0x04)      /* Interrupt enable reg */</div><div class='del'>-#define UARTFCR         PHYS(0x08)      /* FIFO control reg dlab =0*/</div><div class='del'>-#define UARTLCR         PHYS(0x0c)      /* Control reg */</div><div class='del'>-#define UARTSR          PHYS(0x14)      /* Status reg */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static inline void putc(int c)</div><div class='del'>-{</div><div class='del'>-	int j = 0x1000;</div><div class='del'>-</div><div class='del'>-	while (--j &amp;&amp; !(*UARTSR &amp; UART_LSR_THRE))</div><div class='del'>-		barrier();</div><div class='del'>-</div><div class='del'>-	*UARTDR = c;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void flush(void)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define arch_decomp_setup()</div><div class='del'>-#define arch_decomp_wdog()</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c<br/>deleted file mode 100644<br/>index 915ad49e3b8f..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/ixdp2400.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/ixdp2400.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,180 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/ixdp2400.c</div><div class='del'>- *</div><div class='del'>- * IXDP2400 platform support</div><div class='del'>- *</div><div class='del'>- * Original Author: Naeem Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002 Intel Corp.</div><div class='del'>- * Copyright (C) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- *  under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/pci.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/mach/irq.h&gt;</div><div class='del'>-#include &lt;asm/mach/time.h&gt;</div><div class='del'>-#include &lt;asm/mach/flash.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2400 timer tick</div><div class='del'>- *************************************************************************/</div><div class='del'>-static void __init ixdp2400_timer_init(void)</div><div class='del'>-{</div><div class='del'>-	int numerator, denominator;</div><div class='del'>-	int denom_array[] = {2, 4, 8, 16, 1, 2, 4, 8};</div><div class='del'>-</div><div class='del'>-	numerator = (*(IXDP2400_CPLD_SYS_CLK_M) &amp; 0xFF) *2;</div><div class='del'>-	denominator = denom_array[(*(IXDP2400_CPLD_SYS_CLK_N) &amp; 0x7)];</div><div class='del'>-</div><div class='del'>-	ixp2000_init_time(((3125000 * numerator) / (denominator)) / 2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct sys_timer ixdp2400_timer = {</div><div class='del'>-	.init		= ixdp2400_timer_init,</div><div class='del'>-	.offset		= ixp2000_gettimeoffset,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2400 PCI</div><div class='del'>- *************************************************************************/</div><div class='del'>-void __init ixdp2400_pci_preinit(void)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_write(IXP2000_PCI_ADDR_EXT, 0x00100000);</div><div class='del'>-	ixp2000_pci_preinit();</div><div class='del'>-	pcibios_setup("firmware");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int ixdp2400_pci_setup(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	sys-&gt;mem_offset = 0xe0000000;</div><div class='del'>-</div><div class='del'>-	ixp2000_pci_setup(nr, sys);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init ixdp2400_pci_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='del'>-	u8 pin)</div><div class='del'>-{</div><div class='del'>-	if (ixdp2x00_master_npu()) {</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Root bus devices.  Slave NPU is only one with interrupt.</div><div class='del'>-		 * Everything else, we just return -1 b/c nothing else</div><div class='del'>-		 * on the root bus has interrupts.</div><div class='del'>-		 */</div><div class='del'>-		if(!dev-&gt;bus-&gt;self) {</div><div class='del'>-			if(dev-&gt;devfn == IXDP2X00_SLAVE_NPU_DEVFN )</div><div class='del'>-				return IRQ_IXDP2400_INGRESS_NPU;</div><div class='del'>-</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Bridge behind the PMC slot.</div><div class='del'>-		 * NOTE: Only INTA from the PMC slot is routed. VERY BAD.</div><div class='del'>-		 */</div><div class='del'>-		if(dev-&gt;bus-&gt;self-&gt;devfn == IXDP2X00_PMC_DEVFN &amp;&amp;</div><div class='del'>-			dev-&gt;bus-&gt;parent-&gt;self-&gt;devfn == IXDP2X00_P2P_DEVFN &amp;&amp;</div><div class='del'>-			!dev-&gt;bus-&gt;parent-&gt;self-&gt;bus-&gt;parent)</div><div class='del'>-				  return IRQ_IXDP2400_PMC;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Device behind the first bridge</div><div class='del'>-		 */</div><div class='del'>-		if(dev-&gt;bus-&gt;self-&gt;devfn == IXDP2X00_P2P_DEVFN) {</div><div class='del'>-			switch(dev-&gt;devfn) {</div><div class='del'>-				case IXDP2400_MASTER_ENET_DEVFN:	</div><div class='del'>-					return IRQ_IXDP2400_ENET;	</div><div class='del'>-			</div><div class='del'>-				case IXDP2400_MEDIA_DEVFN:</div><div class='del'>-					return IRQ_IXDP2400_MEDIA_PCI;</div><div class='del'>-</div><div class='del'>-				case IXDP2400_SWITCH_FABRIC_DEVFN:</div><div class='del'>-					return IRQ_IXDP2400_SF_PCI;</div><div class='del'>-</div><div class='del'>-				case IXDP2X00_PMC_DEVFN:</div><div class='del'>-					return IRQ_IXDP2400_PMC;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		return -1;</div><div class='del'>-	} else return IRQ_IXP2000_PCIB; /* Slave NIC interrupt */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void ixdp2400_pci_postinit(void)</div><div class='del'>-{</div><div class='del'>-	struct pci_dev *dev;</div><div class='del'>-</div><div class='del'>-	if (ixdp2x00_master_npu()) {</div><div class='del'>-		dev = pci_get_bus_and_slot(1, IXDP2400_SLAVE_ENET_DEVFN);</div><div class='del'>-		pci_stop_and_remove_bus_device(dev);</div><div class='del'>-		pci_dev_put(dev);</div><div class='del'>-	} else {</div><div class='del'>-		dev = pci_get_bus_and_slot(1, IXDP2400_MASTER_ENET_DEVFN);</div><div class='del'>-		pci_stop_and_remove_bus_device(dev);</div><div class='del'>-		pci_dev_put(dev);</div><div class='del'>-</div><div class='del'>-		ixdp2x00_slave_pci_postinit();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct hw_pci ixdp2400_pci __initdata = {</div><div class='del'>-	.nr_controllers	= 1,</div><div class='del'>-	.setup		= ixdp2400_pci_setup,</div><div class='del'>-	.preinit	= ixdp2400_pci_preinit,</div><div class='del'>-	.postinit	= ixdp2400_pci_postinit,</div><div class='del'>-	.scan		= ixp2000_pci_scan_bus,</div><div class='del'>-	.map_irq	= ixdp2400_pci_map_irq,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int __init ixdp2400_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	if (machine_is_ixdp2400())</div><div class='del'>-		pci_common_init(&amp;ixdp2400_pci);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-subsys_initcall(ixdp2400_pci_init);</div><div class='del'>-</div><div class='del'>-void __init ixdp2400_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	ixdp2x00_init_irq(IXDP2400_CPLD_INT_STAT, IXDP2400_CPLD_INT_MASK, IXDP2400_NR_IRQS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(IXDP2400, "Intel IXDP2400 Development Platform")</div><div class='del'>-	/* Maintainer: MontaVista Software, Inc. */</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.map_io		= ixdp2x00_map_io,</div><div class='del'>-	.init_irq	= ixdp2400_init_irq,</div><div class='del'>-	.timer		= &amp;ixdp2400_timer,</div><div class='del'>-	.init_machine	= ixdp2x00_init_machine,</div><div class='del'>-	.restart	= ixp2000_restart,</div><div class='del'>-MACHINE_END</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c<br/>deleted file mode 100644<br/>index a9f1819ea049..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/ixdp2800.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/ixdp2800.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,295 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/ixdp2800.c</div><div class='del'>- *</div><div class='del'>- * IXDP2800 platform support</div><div class='del'>- *</div><div class='del'>- * Original Author: Jeffrey Daly &lt;jeffrey.daly@intel.com&gt;</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002 Intel Corp.</div><div class='del'>- * Copyright (C) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- *  under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/pci.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/mach/irq.h&gt;</div><div class='del'>-#include &lt;asm/mach/time.h&gt;</div><div class='del'>-#include &lt;asm/mach/flash.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2800 timer tick</div><div class='del'>- *************************************************************************/</div><div class='del'>-</div><div class='del'>-static void __init ixdp2800_timer_init(void)</div><div class='del'>-{</div><div class='del'>-	ixp2000_init_time(50000000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct sys_timer ixdp2800_timer = {</div><div class='del'>-	.init		= ixdp2800_timer_init,</div><div class='del'>-	.offset		= ixp2000_gettimeoffset,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2800 PCI</div><div class='del'>- *************************************************************************/</div><div class='del'>-static void __init ixdp2800_slave_disable_pci_master(void)</div><div class='del'>-{</div><div class='del'>-	*IXP2000_PCI_CMDSTAT &amp;= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init ixdp2800_master_wait_for_slave(void)</div><div class='del'>-{</div><div class='del'>-	volatile u32 *addr;</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "IXDP2800: waiting for slave NPU to configure "</div><div class='del'>-			 "its BAR sizes\n");</div><div class='del'>-</div><div class='del'>-	addr = ixp2000_pci_config_addr(0, IXDP2X00_SLAVE_NPU_DEVFN,</div><div class='del'>-					PCI_BASE_ADDRESS_1);</div><div class='del'>-	do {</div><div class='del'>-		*addr = 0xffffffff;</div><div class='del'>-		cpu_relax();</div><div class='del'>-	} while (*addr != 0xfe000008);</div><div class='del'>-</div><div class='del'>-	addr = ixp2000_pci_config_addr(0, IXDP2X00_SLAVE_NPU_DEVFN,</div><div class='del'>-					PCI_BASE_ADDRESS_2);</div><div class='del'>-	do {</div><div class='del'>-		*addr = 0xffffffff;</div><div class='del'>-		cpu_relax();</div><div class='del'>-	} while (*addr != 0xc0000008);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Configure the slave's SDRAM BAR by hand.</div><div class='del'>-	 */</div><div class='del'>-	*addr = 0x40000008;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init ixdp2800_slave_wait_for_master_enable(void)</div><div class='del'>-{</div><div class='del'>-	printk(KERN_INFO "IXDP2800: waiting for master NPU to enable us\n");</div><div class='del'>-</div><div class='del'>-	while ((*IXP2000_PCI_CMDSTAT &amp; PCI_COMMAND_MASTER) == 0)</div><div class='del'>-		cpu_relax();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init ixdp2800_pci_preinit(void)</div><div class='del'>-{</div><div class='del'>-	printk("ixdp2x00_pci_preinit called\n");</div><div class='del'>-</div><div class='del'>-	*IXP2000_PCI_ADDR_EXT = 0x0001e000;</div><div class='del'>-</div><div class='del'>-	if (!ixdp2x00_master_npu())</div><div class='del'>-		ixdp2800_slave_disable_pci_master();</div><div class='del'>-</div><div class='del'>-	*IXP2000_PCI_SRAM_BASE_ADDR_MASK = (0x2000000 - 1) &amp; ~0x3ffff;</div><div class='del'>-	*IXP2000_PCI_DRAM_BASE_ADDR_MASK = (0x40000000 - 1) &amp; ~0xfffff;</div><div class='del'>-</div><div class='del'>-	ixp2000_pci_preinit();</div><div class='del'>-</div><div class='del'>-	if (ixdp2x00_master_npu()) {</div><div class='del'>-		/*</div><div class='del'>-		 * Wait until the slave set its SRAM/SDRAM BAR sizes</div><div class='del'>-		 * correctly before we proceed to scan and enumerate</div><div class='del'>-		 * the bus.</div><div class='del'>-		 */</div><div class='del'>-		ixdp2800_master_wait_for_slave();</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * We configure the SDRAM BARs by hand because they</div><div class='del'>-		 * are 1G and fall outside of the regular allocated</div><div class='del'>-		 * PCI address space.</div><div class='del'>-		 */</div><div class='del'>-		*IXP2000_PCI_SDRAM_BAR = 0x00000008;</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * Wait for the master to complete scanning the bus</div><div class='del'>-		 * and assigning resources before we proceed to scan</div><div class='del'>-		 * the bus ourselves.  Set pci=firmware to honor the</div><div class='del'>-		 * master's resource assignment.</div><div class='del'>-		 */</div><div class='del'>-		ixdp2800_slave_wait_for_master_enable();</div><div class='del'>-		pcibios_setup("firmware");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We assign the SDRAM BARs for the two IXP2800 CPUs by hand, outside</div><div class='del'>- * of the regular PCI window, because there's only 512M of outbound PCI</div><div class='del'>- * memory window on each IXP, while we need 1G for each of the BARs.</div><div class='del'>- */</div><div class='del'>-static void __devinit ixp2800_pci_fixup(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	if (machine_is_ixdp2800()) {</div><div class='del'>-		dev-&gt;resource[2].start = 0;</div><div class='del'>-		dev-&gt;resource[2].end   = 0;</div><div class='del'>-		dev-&gt;resource[2].flags = 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP2800, ixp2800_pci_fixup);</div><div class='del'>-</div><div class='del'>-static int __init ixdp2800_pci_setup(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	sys-&gt;mem_offset = 0x00000000;</div><div class='del'>-</div><div class='del'>-	ixp2000_pci_setup(nr, sys);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init ixdp2800_pci_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='del'>-	u8 pin)</div><div class='del'>-{</div><div class='del'>-	if (ixdp2x00_master_npu()) {</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Root bus devices.  Slave NPU is only one with interrupt.</div><div class='del'>-		 * Everything else, we just return -1 which is invalid.</div><div class='del'>-		 */</div><div class='del'>-		if(!dev-&gt;bus-&gt;self) {</div><div class='del'>-			if(dev-&gt;devfn == IXDP2X00_SLAVE_NPU_DEVFN )</div><div class='del'>-				return IRQ_IXDP2800_INGRESS_NPU;</div><div class='del'>-</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Bridge behind the PMC slot.</div><div class='del'>-		 */</div><div class='del'>-		if(dev-&gt;bus-&gt;self-&gt;devfn == IXDP2X00_PMC_DEVFN &amp;&amp;</div><div class='del'>-			dev-&gt;bus-&gt;parent-&gt;self-&gt;devfn == IXDP2X00_P2P_DEVFN &amp;&amp;</div><div class='del'>-			!dev-&gt;bus-&gt;parent-&gt;self-&gt;bus-&gt;parent)</div><div class='del'>-				  return IRQ_IXDP2800_PMC;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Device behind the first bridge</div><div class='del'>-		 */</div><div class='del'>-		if(dev-&gt;bus-&gt;self-&gt;devfn == IXDP2X00_P2P_DEVFN) {</div><div class='del'>-			switch(dev-&gt;devfn) {</div><div class='del'>-				case IXDP2X00_PMC_DEVFN:</div><div class='del'>-					return IRQ_IXDP2800_PMC;	</div><div class='del'>-			</div><div class='del'>-				case IXDP2800_MASTER_ENET_DEVFN:</div><div class='del'>-					return IRQ_IXDP2800_EGRESS_ENET;</div><div class='del'>-</div><div class='del'>-				case IXDP2800_SWITCH_FABRIC_DEVFN:</div><div class='del'>-					return IRQ_IXDP2800_FABRIC;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		return -1;</div><div class='del'>-	} else return IRQ_IXP2000_PCIB; /* Slave NIC interrupt */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init ixdp2800_master_enable_slave(void)</div><div class='del'>-{</div><div class='del'>-	volatile u32 *addr;</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "IXDP2800: enabling slave NPU\n");</div><div class='del'>-</div><div class='del'>-	addr = (volatile u32 *)ixp2000_pci_config_addr(0,</div><div class='del'>-					IXDP2X00_SLAVE_NPU_DEVFN,</div><div class='del'>-					PCI_COMMAND);</div><div class='del'>-</div><div class='del'>-	*addr |= PCI_COMMAND_MASTER;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init ixdp2800_master_wait_for_slave_bus_scan(void)</div><div class='del'>-{</div><div class='del'>-	volatile u32 *addr;</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "IXDP2800: waiting for slave to finish bus scan\n");</div><div class='del'>-</div><div class='del'>-	addr = (volatile u32 *)ixp2000_pci_config_addr(0,</div><div class='del'>-					IXDP2X00_SLAVE_NPU_DEVFN,</div><div class='del'>-					PCI_COMMAND);</div><div class='del'>-	while ((*addr &amp; PCI_COMMAND_MEMORY) == 0)</div><div class='del'>-		cpu_relax();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init ixdp2800_slave_signal_bus_scan_completion(void)</div><div class='del'>-{</div><div class='del'>-	printk(KERN_INFO "IXDP2800: bus scan done, signaling master\n");</div><div class='del'>-	*IXP2000_PCI_CMDSTAT |= PCI_COMMAND_MEMORY;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init ixdp2800_pci_postinit(void)</div><div class='del'>-{</div><div class='del'>-	if (!ixdp2x00_master_npu()) {</div><div class='del'>-		ixdp2x00_slave_pci_postinit();</div><div class='del'>-		ixdp2800_slave_signal_bus_scan_completion();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct __initdata hw_pci ixdp2800_pci __initdata = {</div><div class='del'>-	.nr_controllers	= 1,</div><div class='del'>-	.setup		= ixdp2800_pci_setup,</div><div class='del'>-	.preinit	= ixdp2800_pci_preinit,</div><div class='del'>-	.postinit	= ixdp2800_pci_postinit,</div><div class='del'>-	.scan		= ixp2000_pci_scan_bus,</div><div class='del'>-	.map_irq	= ixdp2800_pci_map_irq,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int __init ixdp2800_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	if (machine_is_ixdp2800()) {</div><div class='del'>-		struct pci_dev *dev;</div><div class='del'>-</div><div class='del'>-		pci_common_init(&amp;ixdp2800_pci);</div><div class='del'>-		if (ixdp2x00_master_npu()) {</div><div class='del'>-			dev = pci_get_bus_and_slot(1, IXDP2800_SLAVE_ENET_DEVFN);</div><div class='del'>-			pci_stop_and_remove_bus_device(dev);</div><div class='del'>-			pci_dev_put(dev);</div><div class='del'>-</div><div class='del'>-			ixdp2800_master_enable_slave();</div><div class='del'>-			ixdp2800_master_wait_for_slave_bus_scan();</div><div class='del'>-		} else {</div><div class='del'>-			dev = pci_get_bus_and_slot(1, IXDP2800_MASTER_ENET_DEVFN);</div><div class='del'>-			pci_stop_and_remove_bus_device(dev);</div><div class='del'>-			pci_dev_put(dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-subsys_initcall(ixdp2800_pci_init);</div><div class='del'>-</div><div class='del'>-void __init ixdp2800_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	ixdp2x00_init_irq(IXDP2800_CPLD_INT_STAT, IXDP2800_CPLD_INT_MASK, IXDP2800_NR_IRQS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform")</div><div class='del'>-	/* Maintainer: MontaVista Software, Inc. */</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.map_io		= ixdp2x00_map_io,</div><div class='del'>-	.init_irq	= ixdp2800_init_irq,</div><div class='del'>-	.timer		= &amp;ixdp2800_timer,</div><div class='del'>-	.init_machine	= ixdp2x00_init_machine,</div><div class='del'>-	.restart	= ixp2000_restart,</div><div class='del'>-MACHINE_END</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c<br/>deleted file mode 100644<br/>index 421e38dc0fac..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/ixdp2x00.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/ixdp2x00.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,306 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/ixdp2x00.c</div><div class='del'>- *</div><div class='del'>- * Code common to IXDP2400 and IXDP2800 platforms.</div><div class='del'>- *</div><div class='del'>- * Original Author: Naeem Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002 Intel Corp.</div><div class='del'>- * Copyright (C) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- *  under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/pci.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/mach/irq.h&gt;</div><div class='del'>-#include &lt;asm/mach/time.h&gt;</div><div class='del'>-#include &lt;asm/mach/flash.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/gpio-ixp2000.h&gt;</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2x00 IRQ Initialization</div><div class='del'>- *************************************************************************/</div><div class='del'>-static volatile unsigned long *board_irq_mask;</div><div class='del'>-static volatile unsigned long *board_irq_stat;</div><div class='del'>-static unsigned long board_irq_count;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARCH_IXDP2400</div><div class='del'>-/*</div><div class='del'>- * Slowport configuration for accessing CPLD registers on IXDP2x00</div><div class='del'>- */</div><div class='del'>-static struct slowport_cfg slowport_cpld_cfg = {</div><div class='del'>-	.CCR =	SLOWPORT_CCR_DIV_2,</div><div class='del'>-	.WTC = 0x00000070,</div><div class='del'>-	.RTC = 0x00000070,</div><div class='del'>-	.PCR = SLOWPORT_MODE_FLASH,</div><div class='del'>-	.ADC = SLOWPORT_ADDR_WIDTH_24 | SLOWPORT_DATA_WIDTH_8</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void ixdp2x00_irq_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned long dummy;</div><div class='del'>-	static struct slowport_cfg old_cfg;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * This is ugly in common code but really don't know</div><div class='del'>-	 * of a better way to handle it. :(</div><div class='del'>-	 */</div><div class='del'>-#ifdef CONFIG_ARCH_IXDP2400</div><div class='del'>-	if (machine_is_ixdp2400())</div><div class='del'>-		ixp2000_acquire_slowport(&amp;slowport_cpld_cfg, &amp;old_cfg);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	dummy = *board_irq_mask;</div><div class='del'>-	dummy |=  IXP2000_BOARD_IRQ_MASK(d-&gt;irq);</div><div class='del'>-	ixp2000_reg_wrb(board_irq_mask, dummy);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARCH_IXDP2400</div><div class='del'>-	if (machine_is_ixdp2400())</div><div class='del'>-		ixp2000_release_slowport(&amp;old_cfg);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixdp2x00_irq_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned long dummy;</div><div class='del'>-	static struct slowport_cfg old_cfg;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARCH_IXDP2400</div><div class='del'>-	if (machine_is_ixdp2400())</div><div class='del'>-		ixp2000_acquire_slowport(&amp;slowport_cpld_cfg, &amp;old_cfg);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	dummy = *board_irq_mask;</div><div class='del'>-	dummy &amp;=  ~IXP2000_BOARD_IRQ_MASK(d-&gt;irq);</div><div class='del'>-	ixp2000_reg_wrb(board_irq_mask, dummy);</div><div class='del'>-</div><div class='del'>-	if (machine_is_ixdp2400()) </div><div class='del'>-		ixp2000_release_slowport(&amp;old_cfg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='del'>-{</div><div class='del'>-        volatile u32 ex_interrupt = 0;</div><div class='del'>-	static struct slowport_cfg old_cfg;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	desc-&gt;irq_data.chip-&gt;irq_mask(&amp;desc-&gt;irq_data);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARCH_IXDP2400</div><div class='del'>-	if (machine_is_ixdp2400())</div><div class='del'>-		ixp2000_acquire_slowport(&amp;slowport_cpld_cfg, &amp;old_cfg);</div><div class='del'>-#endif</div><div class='del'>-        ex_interrupt = *board_irq_stat &amp; 0xff;</div><div class='del'>-	if (machine_is_ixdp2400())</div><div class='del'>-		ixp2000_release_slowport(&amp;old_cfg);</div><div class='del'>-</div><div class='del'>-	if(!ex_interrupt) {</div><div class='del'>-		printk(KERN_ERR "Spurious IXDP2x00 CPLD interrupt!\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for(i = 0; i &lt; board_irq_count; i++) {</div><div class='del'>-		if(ex_interrupt &amp; (1 &lt;&lt; i))  {</div><div class='del'>-			int cpld_irq = IXP2000_BOARD_IRQ(0) + i;</div><div class='del'>-			generic_handle_irq(cpld_irq);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	desc-&gt;irq_data.chip-&gt;irq_unmask(&amp;desc-&gt;irq_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip ixdp2x00_cpld_irq_chip = {</div><div class='del'>-	.irq_ack	= ixdp2x00_irq_mask,</div><div class='del'>-	.irq_mask	= ixdp2x00_irq_mask,</div><div class='del'>-	.irq_unmask	= ixdp2x00_irq_unmask</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_of_irqs)</div><div class='del'>-{</div><div class='del'>-	unsigned int irq;</div><div class='del'>-</div><div class='del'>-	ixp2000_init_irq();</div><div class='del'>-	</div><div class='del'>-	if (!ixdp2x00_master_npu())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	board_irq_stat = stat_reg;</div><div class='del'>-	board_irq_mask = mask_reg;</div><div class='del'>-	board_irq_count = nr_of_irqs;</div><div class='del'>-</div><div class='del'>-	*board_irq_mask = 0xffffffff;</div><div class='del'>-</div><div class='del'>-	for(irq = IXP2000_BOARD_IRQ(0); irq &lt; IXP2000_BOARD_IRQ(board_irq_count); irq++) {</div><div class='del'>-		irq_set_chip_and_handler(irq, &amp;ixdp2x00_cpld_irq_chip,</div><div class='del'>-					 handle_level_irq);</div><div class='del'>-		set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Hook into PCI interrupt */</div><div class='del'>-	irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2x00 memory map</div><div class='del'>- *************************************************************************/</div><div class='del'>-static struct map_desc ixdp2x00_io_desc __initdata = {</div><div class='del'>-	.virtual	= IXDP2X00_VIRT_CPLD_BASE, </div><div class='del'>-	.pfn		= __phys_to_pfn(IXDP2X00_PHYS_CPLD_BASE),</div><div class='del'>-	.length		= IXDP2X00_CPLD_SIZE,</div><div class='del'>-	.type		= MT_DEVICE</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ixdp2x00_map_io(void)</div><div class='del'>-{</div><div class='del'>-	ixp2000_map_io();	</div><div class='del'>-</div><div class='del'>-	iotable_init(&amp;ixdp2x00_io_desc, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2x00-common PCI init</div><div class='del'>- *</div><div class='del'>- * The IXDP2[48]00 has a horrid PCI bus layout. Basically the board </div><div class='del'>- * contains two NPUs (ingress and egress) connected over PCI,  both running </div><div class='del'>- * instances  of the kernel. So far so good. Peers on the PCI bus running </div><div class='del'>- * Linux is a common design in telecom systems. The problem is that instead </div><div class='del'>- * of all the devices being controlled by a single host, different</div><div class='del'>- * devices are controlled by different NPUs on the same bus, leading to</div><div class='del'>- * multiple hosts on the bus. The exact bus layout looks like:</div><div class='del'>- *</div><div class='del'>- *                   Bus 0</div><div class='del'>- *    Master NPU &lt;-------------------+-------------------&gt; Slave NPU</div><div class='del'>- *                                   |</div><div class='del'>- *                                   |</div><div class='del'>- *                                  P2P </div><div class='del'>- *                                   |</div><div class='del'>- *</div><div class='del'>- *                  Bus 1            |</div><div class='del'>- *               &lt;--+------+---------+---------+------+--&gt;</div><div class='del'>- *                  |      |         |         |      |</div><div class='del'>- *                  |      |         |         |      |</div><div class='del'>- *             ... Dev    PMC       Media     Eth0   Eth1 ...</div><div class='del'>- *</div><div class='del'>- * The master controls all but Eth1, which is controlled by the</div><div class='del'>- * slave. What this means is that the both the master and the slave</div><div class='del'>- * have to scan the bus, but only one of them can enumerate the bus.</div><div class='del'>- * In addition, after the bus is scanned, each kernel must remove</div><div class='del'>- * the device(s) it does not control from the PCI dev list otherwise</div><div class='del'>- * a driver on each NPU will try to manage it and we will have horrible</div><div class='del'>- * conflicts. Oh..and the slave NPU needs to see the master NPU</div><div class='del'>- * for Intel's drivers to work properly. Closed source drivers...</div><div class='del'>- *</div><div class='del'>- * The way we deal with this is fairly simple but ugly:</div><div class='del'>- *</div><div class='del'>- * 1) Let master scan and enumerate the bus completely.</div><div class='del'>- * 2) Master deletes Eth1 from device list.</div><div class='del'>- * 3) Slave scans bus and then deletes all but Eth1 (Eth0 on slave)</div><div class='del'>- *    from device list.</div><div class='del'>- * 4) Find HW designers and LART them.</div><div class='del'>- *</div><div class='del'>- * The boards also do not do normal PCI IRQ routing, or any sort of </div><div class='del'>- * sensical  swizzling, so we just need to check where on the  bus a</div><div class='del'>- * device sits and figure out to which CPLD pin the interrupt is routed.</div><div class='del'>- * See ixdp2[48]00.c files.</div><div class='del'>- *</div><div class='del'>- *************************************************************************/</div><div class='del'>-void ixdp2x00_slave_pci_postinit(void)</div><div class='del'>-{</div><div class='del'>-	struct pci_dev *dev;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Remove PMC device is there is one</div><div class='del'>-	 */</div><div class='del'>-	if((dev = pci_get_bus_and_slot(1, IXDP2X00_PMC_DEVFN))) {</div><div class='del'>-		pci_stop_and_remove_bus_device(dev);</div><div class='del'>-		pci_dev_put(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev = pci_get_bus_and_slot(0, IXDP2X00_21555_DEVFN);</div><div class='del'>-	pci_stop_and_remove_bus_device(dev);</div><div class='del'>-	pci_dev_put(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**************************************************************************</div><div class='del'>- * IXDP2x00 Machine Setup</div><div class='del'>- *************************************************************************/</div><div class='del'>-static struct flash_platform_data ixdp2x00_platform_data = {</div><div class='del'>-	.map_name	= "cfi_probe",</div><div class='del'>-	.width		= 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct ixp2000_flash_data ixdp2x00_flash_data = {</div><div class='del'>-	.platform_data	= &amp;ixdp2x00_platform_data,</div><div class='del'>-	.nr_banks	= 1</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ixdp2x00_flash_resource = {</div><div class='del'>-	.start		= 0xc4000000,</div><div class='del'>-	.end		= 0xc4000000 + 0x00ffffff,</div><div class='del'>-	.flags		= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device ixdp2x00_flash = {</div><div class='del'>-	.name		= "IXP2000-Flash",</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data = &amp;ixdp2x00_flash_data,</div><div class='del'>-	},</div><div class='del'>-	.num_resources	= 1,</div><div class='del'>-	.resource	= &amp;ixdp2x00_flash_resource,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct ixp2000_i2c_pins ixdp2x00_i2c_gpio_pins = {</div><div class='del'>-	.sda_pin	= IXDP2X00_GPIO_SDA,</div><div class='del'>-	.scl_pin	= IXDP2X00_GPIO_SCL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device ixdp2x00_i2c_controller = {</div><div class='del'>-	.name		= "IXP2000-I2C",</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data = &amp;ixdp2x00_i2c_gpio_pins,</div><div class='del'>-	},</div><div class='del'>-	.num_resources	= 0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *ixdp2x00_devices[] __initdata = {</div><div class='del'>-	&amp;ixdp2x00_flash,</div><div class='del'>-	&amp;ixdp2x00_i2c_controller</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ixdp2x00_init_machine(void)</div><div class='del'>-{</div><div class='del'>-	gpio_line_set(IXDP2X00_GPIO_I2C_ENABLE, 1);</div><div class='del'>-	gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT);</div><div class='del'>-</div><div class='del'>-	platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices));</div><div class='del'>-	ixp2000_uart_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c<br/>deleted file mode 100644<br/>index 5196c39cdba4..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/ixdp2x01.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/ixdp2x01.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,483 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/ixdp2x01.c</div><div class='del'>- *</div><div class='del'>- * Code common to Intel IXDP2401 and IXDP2801 platforms</div><div class='del'>- *</div><div class='del'>- * Original Author: Andrzej Mialkowski &lt;andrzej.mialkowski@intel.com&gt;</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002-2003 Intel Corp.</div><div class='del'>- * Copyright (C) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- *  under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/serial.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='del'>-#include &lt;linux/serial_core.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/serial_8250.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/pci.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/mach/irq.h&gt;</div><div class='del'>-#include &lt;asm/mach/time.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach/flash.h&gt;</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2x01 IRQ Handling</div><div class='del'>- *************************************************************************/</div><div class='del'>-static void ixdp2x01_irq_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_wrb(IXDP2X01_INT_MASK_SET_REG,</div><div class='del'>-				IXP2000_BOARD_IRQ_MASK(d-&gt;irq));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixdp2x01_irq_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_write(IXDP2X01_INT_MASK_CLR_REG,</div><div class='del'>-				IXP2000_BOARD_IRQ_MASK(d-&gt;irq));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 valid_irq_mask;</div><div class='del'>-</div><div class='del'>-static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='del'>-{</div><div class='del'>-	u32 ex_interrupt;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	desc-&gt;irq_data.chip-&gt;irq_mask(&amp;desc-&gt;irq_data);</div><div class='del'>-</div><div class='del'>-	ex_interrupt = *IXDP2X01_INT_STAT_REG &amp; valid_irq_mask;</div><div class='del'>-</div><div class='del'>-	if (!ex_interrupt) {</div><div class='del'>-		printk(KERN_ERR "Spurious IXDP2X01 CPLD interrupt!\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; IXP2000_BOARD_IRQS; i++) {</div><div class='del'>-		if (ex_interrupt &amp; (1 &lt;&lt; i)) {</div><div class='del'>-			int cpld_irq = IXP2000_BOARD_IRQ(0) + i;</div><div class='del'>-			generic_handle_irq(cpld_irq);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	desc-&gt;irq_data.chip-&gt;irq_unmask(&amp;desc-&gt;irq_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip ixdp2x01_irq_chip = {</div><div class='del'>-	.irq_mask	= ixdp2x01_irq_mask,</div><div class='del'>-	.irq_ack	= ixdp2x01_irq_mask,</div><div class='del'>-	.irq_unmask	= ixdp2x01_irq_unmask</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We only do anything if we are the master NPU on the board.</div><div class='del'>- * The slave NPU only has the ethernet chip going directly to</div><div class='del'>- * the PCIB interrupt input.</div><div class='del'>- */</div><div class='del'>-void __init ixdp2x01_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	int irq = 0;</div><div class='del'>-</div><div class='del'>-	/* initialize chip specific interrupts */</div><div class='del'>-	ixp2000_init_irq();</div><div class='del'>-</div><div class='del'>-	if (machine_is_ixdp2401())</div><div class='del'>-		valid_irq_mask = IXDP2401_VALID_IRQ_MASK;</div><div class='del'>-	else</div><div class='del'>-		valid_irq_mask = IXDP2801_VALID_IRQ_MASK;</div><div class='del'>-</div><div class='del'>-	/* Mask all interrupts from CPLD, disable simulation */</div><div class='del'>-	ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG, 0xffffffff);</div><div class='del'>-	ixp2000_reg_wrb(IXDP2X01_INT_SIM_REG, 0);</div><div class='del'>-</div><div class='del'>-	for (irq = NR_IXP2000_IRQS; irq &lt; NR_IXDP2X01_IRQS; irq++) {</div><div class='del'>-		if (irq &amp; valid_irq_mask) {</div><div class='del'>-			irq_set_chip_and_handler(irq, &amp;ixdp2x01_irq_chip,</div><div class='del'>-						 handle_level_irq);</div><div class='del'>-			set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-		} else {</div><div class='del'>-			set_irq_flags(irq, 0);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Hook into PCI interrupts */</div><div class='del'>-	irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2x01 memory map</div><div class='del'>- *************************************************************************/</div><div class='del'>-static struct map_desc ixdp2x01_io_desc __initdata = {</div><div class='del'>-	.virtual	= IXDP2X01_VIRT_CPLD_BASE, </div><div class='del'>-	.pfn		= __phys_to_pfn(IXDP2X01_PHYS_CPLD_BASE),</div><div class='del'>-	.length		= IXDP2X01_CPLD_REGION_SIZE,</div><div class='del'>-	.type		= MT_DEVICE</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init ixdp2x01_map_io(void)</div><div class='del'>-{</div><div class='del'>-	ixp2000_map_io();</div><div class='del'>-	iotable_init(&amp;ixdp2x01_io_desc, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2x01 serial ports</div><div class='del'>- *************************************************************************/</div><div class='del'>-static struct plat_serial8250_port ixdp2x01_serial_port1[] = {</div><div class='del'>-	{</div><div class='del'>-		.mapbase	= (unsigned long)IXDP2X01_UART1_PHYS_BASE,</div><div class='del'>-		.membase	= (char *)IXDP2X01_UART1_VIRT_BASE,</div><div class='del'>-		.irq		= IRQ_IXDP2X01_UART1,</div><div class='del'>-		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,</div><div class='del'>-		.iotype		= UPIO_MEM32,</div><div class='del'>-		.regshift	= 2,</div><div class='del'>-		.uartclk	= IXDP2X01_UART_CLK,</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ixdp2x01_uart_resource1 = {</div><div class='del'>-	.start		= IXDP2X01_UART1_PHYS_BASE,</div><div class='del'>-	.end		= IXDP2X01_UART1_PHYS_BASE + 0xffff,</div><div class='del'>-	.flags		= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device ixdp2x01_serial_device1 = {</div><div class='del'>-	.name		= "serial8250",</div><div class='del'>-	.id		= PLAT8250_DEV_PLATFORM1,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data		= ixdp2x01_serial_port1,</div><div class='del'>-	},</div><div class='del'>-	.num_resources	= 1,</div><div class='del'>-	.resource	= &amp;ixdp2x01_uart_resource1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct plat_serial8250_port ixdp2x01_serial_port2[] = {</div><div class='del'>-	{</div><div class='del'>-		.mapbase	= (unsigned long)IXDP2X01_UART2_PHYS_BASE,</div><div class='del'>-		.membase	= (char *)IXDP2X01_UART2_VIRT_BASE,</div><div class='del'>-		.irq		= IRQ_IXDP2X01_UART2,</div><div class='del'>-		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,</div><div class='del'>-		.iotype		= UPIO_MEM32,</div><div class='del'>-		.regshift	= 2,</div><div class='del'>-		.uartclk	= IXDP2X01_UART_CLK,</div><div class='del'>-	}, </div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ixdp2x01_uart_resource2 = {</div><div class='del'>-	.start		= IXDP2X01_UART2_PHYS_BASE,</div><div class='del'>-	.end		= IXDP2X01_UART2_PHYS_BASE + 0xffff,</div><div class='del'>-	.flags		= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device ixdp2x01_serial_device2 = {</div><div class='del'>-	.name		= "serial8250",</div><div class='del'>-	.id		= PLAT8250_DEV_PLATFORM2,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data		= ixdp2x01_serial_port2,</div><div class='del'>-	},</div><div class='del'>-	.num_resources	= 1,</div><div class='del'>-	.resource	= &amp;ixdp2x01_uart_resource2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void ixdp2x01_uart_init(void)</div><div class='del'>-{</div><div class='del'>-	platform_device_register(&amp;ixdp2x01_serial_device1);</div><div class='del'>-	platform_device_register(&amp;ixdp2x01_serial_device2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2x01 timer tick configuration</div><div class='del'>- *************************************************************************/</div><div class='del'>-static unsigned int ixdp2x01_clock;</div><div class='del'>-</div><div class='del'>-static int __init ixdp2x01_clock_setup(char *str)</div><div class='del'>-{</div><div class='del'>-	ixdp2x01_clock = simple_strtoul(str, NULL, 10);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__setup("ixdp2x01_clock=", ixdp2x01_clock_setup);</div><div class='del'>-</div><div class='del'>-static void __init ixdp2x01_timer_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!ixdp2x01_clock)</div><div class='del'>-		ixdp2x01_clock = 50000000;</div><div class='del'>-</div><div class='del'>-	ixp2000_init_time(ixdp2x01_clock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct sys_timer ixdp2x01_timer = {</div><div class='del'>-	.init		= ixdp2x01_timer_init,</div><div class='del'>-	.offset		= ixp2000_gettimeoffset,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2x01 PCI</div><div class='del'>- *************************************************************************/</div><div class='del'>-void __init ixdp2x01_pci_preinit(void)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_write(IXP2000_PCI_ADDR_EXT, 0x00000000);</div><div class='del'>-	ixp2000_pci_preinit();</div><div class='del'>-	pcibios_setup("firmware");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define DEVPIN(dev, pin) ((pin) | ((dev) &lt;&lt; 3))</div><div class='del'>-</div><div class='del'>-static int __init ixdp2x01_pci_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='del'>-	u8 pin)</div><div class='del'>-{</div><div class='del'>-	u8 bus = dev-&gt;bus-&gt;number;</div><div class='del'>-	u32 devpin = DEVPIN(PCI_SLOT(dev-&gt;devfn), pin);</div><div class='del'>-	struct pci_bus *tmp_bus = dev-&gt;bus;</div><div class='del'>-</div><div class='del'>-	/* Primary bus, no interrupts here */</div><div class='del'>-	if (bus == 0) {</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Lookup first leaf in bus tree */</div><div class='del'>-	while ((tmp_bus-&gt;parent != NULL) &amp;&amp; (tmp_bus-&gt;parent-&gt;parent != NULL)) {</div><div class='del'>-		tmp_bus = tmp_bus-&gt;parent;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Select between known bridges */</div><div class='del'>-	switch (tmp_bus-&gt;self-&gt;devfn | (tmp_bus-&gt;self-&gt;bus-&gt;number &lt;&lt; 8)) {</div><div class='del'>-	/* Device is located after first MB bridge */</div><div class='del'>-	case 0x0008:</div><div class='del'>-		if (tmp_bus == dev-&gt;bus) {</div><div class='del'>-			/* Device is located directly after first MB bridge */</div><div class='del'>-			switch (devpin) {</div><div class='del'>-			case DEVPIN(1, 1):	/* Onboard 82546 ch 0 */</div><div class='del'>-				if (machine_is_ixdp2401())</div><div class='del'>-					return IRQ_IXDP2401_INTA_82546;</div><div class='del'>-				return -1;</div><div class='del'>-			case DEVPIN(1, 2):	/* Onboard 82546 ch 1 */</div><div class='del'>-				if (machine_is_ixdp2401())</div><div class='del'>-					return IRQ_IXDP2401_INTB_82546;</div><div class='del'>-				return -1;</div><div class='del'>-			case DEVPIN(0, 1):	/* PMC INTA# */</div><div class='del'>-				return IRQ_IXDP2X01_SPCI_PMC_INTA;</div><div class='del'>-			case DEVPIN(0, 2):	/* PMC INTB# */</div><div class='del'>-				return IRQ_IXDP2X01_SPCI_PMC_INTB;</div><div class='del'>-			case DEVPIN(0, 3):	/* PMC INTC# */</div><div class='del'>-				return IRQ_IXDP2X01_SPCI_PMC_INTC;</div><div class='del'>-			case DEVPIN(0, 4):	/* PMC INTD# */</div><div class='del'>-				return IRQ_IXDP2X01_SPCI_PMC_INTD;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 0x0010:</div><div class='del'>-		if (tmp_bus == dev-&gt;bus) {</div><div class='del'>-			/* Device is located directly after second MB bridge */</div><div class='del'>-			/* Secondary bus of second bridge */</div><div class='del'>-			switch (devpin) {</div><div class='del'>-			case DEVPIN(0, 1):	/* DB#0 */</div><div class='del'>-				return IRQ_IXDP2X01_SPCI_DB_0;</div><div class='del'>-			case DEVPIN(1, 1):	/* DB#1 */</div><div class='del'>-				return IRQ_IXDP2X01_SPCI_DB_1;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			/* Device is located indirectly after second MB bridge */</div><div class='del'>-			/* Not supported now */</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int ixdp2x01_pci_setup(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	sys-&gt;mem_offset = 0xe0000000;</div><div class='del'>-</div><div class='del'>-	if (machine_is_ixdp2801() || machine_is_ixdp28x5())</div><div class='del'>-		sys-&gt;mem_offset -= ((*IXP2000_PCI_ADDR_EXT &amp; 0xE000) &lt;&lt; 16);</div><div class='del'>-</div><div class='del'>-	return ixp2000_pci_setup(nr, sys);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct hw_pci ixdp2x01_pci __initdata = {</div><div class='del'>-	.nr_controllers	= 1,</div><div class='del'>-	.setup		= ixdp2x01_pci_setup,</div><div class='del'>-	.preinit	= ixdp2x01_pci_preinit,</div><div class='del'>-	.scan		= ixp2000_pci_scan_bus,</div><div class='del'>-	.map_irq	= ixdp2x01_pci_map_irq,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int __init ixdp2x01_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	if (machine_is_ixdp2401() || machine_is_ixdp2801() ||\</div><div class='del'>-		machine_is_ixdp28x5())</div><div class='del'>-		pci_common_init(&amp;ixdp2x01_pci);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-subsys_initcall(ixdp2x01_pci_init);</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXDP2x01 Machine Initialization</div><div class='del'>- *************************************************************************/</div><div class='del'>-static struct flash_platform_data ixdp2x01_flash_platform_data = {</div><div class='del'>-	.map_name	= "cfi_probe",</div><div class='del'>-	.width		= 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned long ixdp2x01_flash_bank_setup(unsigned long ofs)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_wrb(IXDP2X01_CPLD_FLASH_REG,</div><div class='del'>-		((ofs &gt;&gt; IXDP2X01_FLASH_WINDOW_BITS) | IXDP2X01_CPLD_FLASH_INTERN));</div><div class='del'>-	return (ofs &amp; IXDP2X01_FLASH_WINDOW_MASK);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct ixp2000_flash_data ixdp2x01_flash_data = {</div><div class='del'>-	.platform_data	= &amp;ixdp2x01_flash_platform_data,</div><div class='del'>-	.bank_setup	= ixdp2x01_flash_bank_setup</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ixdp2x01_flash_resource = {</div><div class='del'>-	.start		= 0xc4000000,</div><div class='del'>-	.end		= 0xc4000000 + 0x01ffffff,</div><div class='del'>-	.flags		= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device ixdp2x01_flash = {</div><div class='del'>-	.name		= "IXP2000-Flash",</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data = &amp;ixdp2x01_flash_data,</div><div class='del'>-	},</div><div class='del'>-	.num_resources	= 1,</div><div class='del'>-	.resource	= &amp;ixdp2x01_flash_resource,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct ixp2000_i2c_pins ixdp2x01_i2c_gpio_pins = {</div><div class='del'>-	.sda_pin	= IXDP2X01_GPIO_SDA,</div><div class='del'>-	.scl_pin	= IXDP2X01_GPIO_SCL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device ixdp2x01_i2c_controller = {</div><div class='del'>-	.name		= "IXP2000-I2C",</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data = &amp;ixdp2x01_i2c_gpio_pins,</div><div class='del'>-	},</div><div class='del'>-	.num_resources	= 0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *ixdp2x01_devices[] __initdata = {</div><div class='del'>-	&amp;ixdp2x01_flash,</div><div class='del'>-	&amp;ixdp2x01_i2c_controller</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init ixdp2x01_init_machine(void)</div><div class='del'>-{</div><div class='del'>-	ixp2000_reg_wrb(IXDP2X01_CPLD_FLASH_REG,</div><div class='del'>-		(IXDP2X01_CPLD_FLASH_BANK_MASK | IXDP2X01_CPLD_FLASH_INTERN));</div><div class='del'>-	</div><div class='del'>-	ixdp2x01_flash_data.nr_banks =</div><div class='del'>-		((*IXDP2X01_CPLD_FLASH_REG &amp; IXDP2X01_CPLD_FLASH_BANK_MASK) + 1);</div><div class='del'>-</div><div class='del'>-	platform_add_devices(ixdp2x01_devices, ARRAY_SIZE(ixdp2x01_devices));</div><div class='del'>-	ixp2000_uart_init();</div><div class='del'>-	ixdp2x01_uart_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixdp2401_restart(char mode, const char *cmd)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Reset flash banking register so that we are pointing at</div><div class='del'>-	 * RedBoot bank.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,</div><div class='del'>-				((0 &gt;&gt; IXDP2X01_FLASH_WINDOW_BITS)</div><div class='del'>-					| IXDP2X01_CPLD_FLASH_INTERN));</div><div class='del'>-	ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);</div><div class='del'>-</div><div class='del'>-	ixp2000_restart(mode, cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixdp280x_restart(char mode, const char *cmd)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * On IXDP2801 we need to write this magic sequence to the CPLD</div><div class='del'>-	 * to cause a complete reset of the CPU and all external devices</div><div class='del'>-	 * and move the flash bank register back to 0.</div><div class='del'>-	 */</div><div class='del'>-	unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;</div><div class='del'>-</div><div class='del'>-	reset_reg = 0x55AA0000 | (reset_reg &amp; 0x0000FFFF);</div><div class='del'>-	ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);</div><div class='del'>-	ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);</div><div class='del'>-</div><div class='del'>-	ixp2000_restart(mode, cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARCH_IXDP2401</div><div class='del'>-MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform")</div><div class='del'>-	/* Maintainer: MontaVista Software, Inc. */</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.map_io		= ixdp2x01_map_io,</div><div class='del'>-	.init_irq	= ixdp2x01_init_irq,</div><div class='del'>-	.timer		= &amp;ixdp2x01_timer,</div><div class='del'>-	.init_machine	= ixdp2x01_init_machine,</div><div class='del'>-	.restart	= ixdp2401_restart,</div><div class='del'>-MACHINE_END</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARCH_IXDP2801</div><div class='del'>-MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform")</div><div class='del'>-	/* Maintainer: MontaVista Software, Inc. */</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.map_io		= ixdp2x01_map_io,</div><div class='del'>-	.init_irq	= ixdp2x01_init_irq,</div><div class='del'>-	.timer		= &amp;ixdp2x01_timer,</div><div class='del'>-	.init_machine	= ixdp2x01_init_machine,</div><div class='del'>-	.restart	= ixdp280x_restart,</div><div class='del'>-MACHINE_END</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXDP28x5 is basically an IXDP2801 with a different CPU but Intel</div><div class='del'>- * changed the machine ID in the bootloader</div><div class='del'>- */</div><div class='del'>-MACHINE_START(IXDP28X5, "Intel IXDP2805/2855 Development Platform")</div><div class='del'>-	/* Maintainer: MontaVista Software, Inc. */</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.map_io		= ixdp2x01_map_io,</div><div class='del'>-	.init_irq	= ixdp2x01_init_irq,</div><div class='del'>-	.timer		= &amp;ixdp2x01_timer,</div><div class='del'>-	.init_machine	= ixdp2x01_init_machine,</div><div class='del'>-	.restart	= ixdp280x_restart,</div><div class='del'>-MACHINE_END</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c<br/>deleted file mode 100644<br/>index 9c02de932fac..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp2000/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp2000/pci.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,252 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp2000/pci.c</div><div class='del'>- *</div><div class='del'>- * PCI routines for IXDP2400/IXDP2800 boards</div><div class='del'>- *</div><div class='del'>- * Original Author: Naeem Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- * Maintained by: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright 2002 Intel Corp.</div><div class='del'>- * Copyright (C) 2003-2004 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- *  under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- *  option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/pci.h&gt;</div><div class='del'>-</div><div class='del'>-static volatile int pci_master_aborts = 0;</div><div class='del'>-</div><div class='del'>-static int clear_master_aborts(void);</div><div class='del'>-</div><div class='del'>-u32 *</div><div class='del'>-ixp2000_pci_config_addr(unsigned int bus_nr, unsigned int devfn, int where)</div><div class='del'>-{</div><div class='del'>-	u32 *paddress;</div><div class='del'>-</div><div class='del'>-	if (PCI_SLOT(devfn) &gt; 7)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Must be dword aligned */</div><div class='del'>-	where &amp;= ~3;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * For top bus, generate type 0, else type 1</div><div class='del'>-	 */</div><div class='del'>-	if (!bus_nr) {</div><div class='del'>-		/* only bits[23:16] are used for IDSEL */</div><div class='del'>-		paddress = (u32 *) (IXP2000_PCI_CFG0_VIRT_BASE</div><div class='del'>-				    | (1 &lt;&lt; (PCI_SLOT(devfn) + 16))</div><div class='del'>-				    | (PCI_FUNC(devfn) &lt;&lt; 8) | where);</div><div class='del'>-	} else {</div><div class='del'>-		paddress = (u32 *) (IXP2000_PCI_CFG1_VIRT_BASE </div><div class='del'>-				    | (bus_nr &lt;&lt; 16)</div><div class='del'>-				    | (PCI_SLOT(devfn) &lt;&lt; 11)</div><div class='del'>-				    | (PCI_FUNC(devfn) &lt;&lt; 8) | where);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return paddress;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Mask table, bits to mask for quantity of size 1, 2 or 4 bytes.</div><div class='del'>- * 0 and 3 are not valid indexes...</div><div class='del'>- */</div><div class='del'>-static u32 bytemask[] = {</div><div class='del'>-	/*0*/	0,</div><div class='del'>-	/*1*/	0xff,</div><div class='del'>-	/*2*/	0xffff,</div><div class='del'>-	/*3*/	0,</div><div class='del'>-	/*4*/	0xffffffff,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-int ixp2000_pci_read_config(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='del'>-				int size, u32 *value)</div><div class='del'>-{</div><div class='del'>-	u32 n;</div><div class='del'>-	u32 *addr;</div><div class='del'>-</div><div class='del'>-	n = where % 4;</div><div class='del'>-</div><div class='del'>-	addr = ixp2000_pci_config_addr(bus-&gt;number, devfn, where);</div><div class='del'>-	if (!addr)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	pci_master_aborts = 0;</div><div class='del'>-	*value = (*addr &gt;&gt; (8*n)) &amp; bytemask[size];</div><div class='del'>-	if (pci_master_aborts) {</div><div class='del'>-		pci_master_aborts = 0;</div><div class='del'>-		*value = 0xffffffff;</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We don't do error checks by calling clear_master_aborts() b/c the</div><div class='del'>- * assumption is that the caller did a read first to make sure a device</div><div class='del'>- * exists.</div><div class='del'>- */</div><div class='del'>-int ixp2000_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='del'>-				int size, u32 value)</div><div class='del'>-{</div><div class='del'>-	u32 mask;</div><div class='del'>-	u32 *addr;</div><div class='del'>-	u32 temp;</div><div class='del'>-</div><div class='del'>-	mask = ~(bytemask[size] &lt;&lt; ((where % 0x4) * 8));</div><div class='del'>-	addr = ixp2000_pci_config_addr(bus-&gt;number, devfn, where);</div><div class='del'>-	if (!addr)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-	temp = (u32) (value) &lt;&lt; ((where % 0x4) * 8);</div><div class='del'>-	*addr = (*addr &amp; mask) | temp;</div><div class='del'>-</div><div class='del'>-	clear_master_aborts();</div><div class='del'>-</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static struct pci_ops ixp2000_pci_ops = {</div><div class='del'>-	.read	= ixp2000_pci_read_config,</div><div class='del'>-	.write	= ixp2000_pci_write_config</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pci_bus *ixp2000_pci_scan_bus(int nr, struct pci_sys_data *sysdata)</div><div class='del'>-{</div><div class='del'>-	return pci_scan_root_bus(NULL, sysdata-&gt;busnr, &amp;ixp2000_pci_ops,</div><div class='del'>-				 sysdata, &amp;sysdata-&gt;resources);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-int ixp2000_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	volatile u32 temp;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	pci_master_aborts = 1;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	temp = *(IXP2000_PCI_CONTROL);</div><div class='del'>-	if (temp &amp; ((1 &lt;&lt; 8) | (1 &lt;&lt; 5))) {</div><div class='del'>-		ixp2000_reg_wrb(IXP2000_PCI_CONTROL, temp);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	temp = *(IXP2000_PCI_CMDSTAT);</div><div class='del'>-	if (temp &amp; (1 &lt;&lt; 29)) {</div><div class='del'>-		while (temp &amp; (1 &lt;&lt; 29)) {	</div><div class='del'>-			ixp2000_reg_write(IXP2000_PCI_CMDSTAT, temp);</div><div class='del'>-			temp = *(IXP2000_PCI_CMDSTAT);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If it was an imprecise abort, then we need to correct the</div><div class='del'>-	 * return address to be _after_ the instruction.</div><div class='del'>-	 */</div><div class='del'>-	if (fsr &amp; (1 &lt;&lt; 10))</div><div class='del'>-		regs-&gt;ARM_pc += 4;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-clear_master_aborts(void)</div><div class='del'>-{</div><div class='del'>-	volatile u32 temp;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	temp = *(IXP2000_PCI_CONTROL);</div><div class='del'>-	if (temp &amp; ((1 &lt;&lt; 8) | (1 &lt;&lt; 5))) {</div><div class='del'>-		ixp2000_reg_wrb(IXP2000_PCI_CONTROL, temp);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	temp = *(IXP2000_PCI_CMDSTAT);</div><div class='del'>-	if (temp &amp; (1 &lt;&lt; 29)) {</div><div class='del'>-		while (temp &amp; (1 &lt;&lt; 29)) {</div><div class='del'>-			ixp2000_reg_write(IXP2000_PCI_CMDSTAT, temp);</div><div class='del'>-			temp = *(IXP2000_PCI_CMDSTAT);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init</div><div class='del'>-ixp2000_pci_preinit(void)</div><div class='del'>-{</div><div class='del'>-	pci_set_flags(0);</div><div class='del'>-</div><div class='del'>-	pcibios_min_io = 0;</div><div class='del'>-	pcibios_min_mem = 0;</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO</div><div class='del'>-	/*</div><div class='del'>-	 * Configure the PCI unit to properly byteswap I/O transactions,</div><div class='del'>-	 * and verify that it worked.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_reg_write(IXP2000_PCI_CONTROL,</div><div class='del'>-			  (*IXP2000_PCI_CONTROL | PCI_CONTROL_IEE));</div><div class='del'>-</div><div class='del'>-	if ((*IXP2000_PCI_CONTROL &amp; PCI_CONTROL_IEE) == 0)</div><div class='del'>-		panic("IXP2000: PCI I/O is broken on this ixp model, and "</div><div class='del'>-			"the needed workaround has not been configured in");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	hook_fault_code(16+6, ixp2000_pci_abort_handler, SIGBUS, 0,</div><div class='del'>-				"PCI config cycle to non-existent device");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXP2000 systems often have large resource requirements, so we just</div><div class='del'>- * use our own resource space.</div><div class='del'>- */</div><div class='del'>-static struct resource ixp2000_pci_mem_space = {</div><div class='del'>-	.start	= 0xe0000000,</div><div class='del'>-	.end	= 0xffffffff,</div><div class='del'>-	.flags	= IORESOURCE_MEM,</div><div class='del'>-	.name	= "PCI Mem Space"</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ixp2000_pci_io_space = {</div><div class='del'>-	.start	= 0x00010000,</div><div class='del'>-	.end	= 0x0001ffff,</div><div class='del'>-	.flags	= IORESOURCE_IO,</div><div class='del'>-	.name	= "PCI I/O Space"</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int ixp2000_pci_setup(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	if (nr &gt;= 1)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	pci_add_resource_offset(&amp;sys-&gt;resources,</div><div class='del'>-				&amp;ixp2000_pci_io_space, sys-&gt;io_offset);</div><div class='del'>-	pci_add_resource_offset(&amp;sys-&gt;resources,</div><div class='del'>-				&amp;ixp2000_pci_mem_space, sys-&gt;mem_offset);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/Kconfig b/arch/arm/mach-ixp23xx/Kconfig<br/>deleted file mode 100644<br/>index 982670ec3866..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-if ARCH_IXP23XX</div><div class='del'>-</div><div class='del'>-config ARCH_SUPPORTS_BIG_ENDIAN</div><div class='del'>-	bool</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-menu "Intel IXP23xx Implementation Options"</div><div class='del'>-</div><div class='del'>-comment "IXP23xx Platforms"</div><div class='del'>-</div><div class='del'>-config MACH_ESPRESSO</div><div class='del'>-	bool "Support IP Fabrics Double Espresso platform"</div><div class='del'>-	help</div><div class='del'>-</div><div class='del'>-config MACH_IXDP2351</div><div class='del'>-	bool "Support Intel IXDP2351 platform"</div><div class='del'>-	help</div><div class='del'>-</div><div class='del'>-config MACH_ROADRUNNER</div><div class='del'>-	bool "Support ADI RoadRunner platform"</div><div class='del'>-	help</div><div class='del'>-</div><div class='del'>-endmenu</div><div class='del'>-</div><div class='del'>-endif</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/Makefile b/arch/arm/mach-ixp23xx/Makefile<br/>deleted file mode 100644<br/>index 288b371b6d03..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,11 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the linux kernel.</div><div class='del'>-#</div><div class='del'>-obj-y			:= core.o pci.o</div><div class='del'>-obj-m			:=</div><div class='del'>-obj-n			:=</div><div class='del'>-obj-			:=</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_MACH_ESPRESSO)	+= espresso.o</div><div class='del'>-obj-$(CONFIG_MACH_IXDP2351)	+= ixdp2351.o</div><div class='del'>-obj-$(CONFIG_MACH_ROADRUNNER)	+= roadrunner.o</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/Makefile.boot b/arch/arm/mach-ixp23xx/Makefile.boot<br/>deleted file mode 100644<br/>index 44fb4a717c3f..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/Makefile.boot?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/Makefile.boot</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,2 +0,0 @@</div><div class='del'>-   zreladdr-y	+= 0x00008000</div><div class='del'>-params_phys-y	:= 0x00000100</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c<br/>deleted file mode 100644<br/>index d34542425990..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/core.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,455 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/core.c</div><div class='del'>- *</div><div class='del'>- * Core routines for IXP23xx chips</div><div class='del'>- *</div><div class='del'>- * Author: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright 2005 (c) MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * Based on 2.4 code Copyright 2004 (c) Intel Corporation</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/serial.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/serial_8250.h&gt;</div><div class='del'>-#include &lt;linux/serial_core.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/time.h&gt;</div><div class='del'>-#include &lt;linux/timex.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/types.h&gt;</div><div class='del'>-#include &lt;asm/setup.h&gt;</div><div class='del'>-#include &lt;asm/memory.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/system_misc.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/mach/time.h&gt;</div><div class='del'>-#include &lt;asm/mach/irq.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * Chip specific mappings shared by all IXP23xx systems</div><div class='del'>- *************************************************************************/</div><div class='del'>-static struct map_desc ixp23xx_io_desc[] __initdata = {</div><div class='del'>-	{ /* XSI-CPP CSRs */</div><div class='del'>-	 	.virtual	= IXP23XX_XSI2CPP_CSR_VIRT,</div><div class='del'>-	 	.pfn		= __phys_to_pfn(IXP23XX_XSI2CPP_CSR_PHYS),</div><div class='del'>-	 	.length		= IXP23XX_XSI2CPP_CSR_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, { /* Expansion Bus Config */</div><div class='del'>-	 	.virtual	= IXP23XX_EXP_CFG_VIRT,</div><div class='del'>-	 	.pfn		= __phys_to_pfn(IXP23XX_EXP_CFG_PHYS),</div><div class='del'>-	 	.length		= IXP23XX_EXP_CFG_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, { /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACS,.... */</div><div class='del'>-	 	.virtual	= IXP23XX_PERIPHERAL_VIRT,</div><div class='del'>-	 	.pfn		= __phys_to_pfn(IXP23XX_PERIPHERAL_PHYS),</div><div class='del'>-	 	.length		= IXP23XX_PERIPHERAL_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, { /* CAP CSRs */</div><div class='del'>-	 	.virtual	= IXP23XX_CAP_CSR_VIRT,</div><div class='del'>-	 	.pfn		= __phys_to_pfn(IXP23XX_CAP_CSR_PHYS),</div><div class='del'>-	 	.length		= IXP23XX_CAP_CSR_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, { /* MSF CSRs */</div><div class='del'>-	 	.virtual	= IXP23XX_MSF_CSR_VIRT,</div><div class='del'>-	 	.pfn		= __phys_to_pfn(IXP23XX_MSF_CSR_PHYS),</div><div class='del'>-	 	.length		= IXP23XX_MSF_CSR_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, { /* PCI I/O Space */</div><div class='del'>-	 	.virtual	= IXP23XX_PCI_IO_VIRT,</div><div class='del'>-	 	.pfn		= __phys_to_pfn(IXP23XX_PCI_IO_PHYS),</div><div class='del'>-	 	.length		= IXP23XX_PCI_IO_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, { /* PCI Config Space */</div><div class='del'>-	 	.virtual	= IXP23XX_PCI_CFG_VIRT,</div><div class='del'>-	 	.pfn		= __phys_to_pfn(IXP23XX_PCI_CFG_PHYS),</div><div class='del'>-	 	.length		= IXP23XX_PCI_CFG_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, { /* PCI local CFG CSRs */</div><div class='del'>-	 	.virtual	= IXP23XX_PCI_CREG_VIRT,</div><div class='del'>-	 	.pfn		= __phys_to_pfn(IXP23XX_PCI_CREG_PHYS),</div><div class='del'>-	 	.length		= IXP23XX_PCI_CREG_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}, { /* PCI MEM Space */</div><div class='del'>-	 	.virtual	= IXP23XX_PCI_MEM_VIRT,</div><div class='del'>-	 	.pfn		= __phys_to_pfn(IXP23XX_PCI_MEM_PHYS),</div><div class='del'>-	 	.length		= IXP23XX_PCI_MEM_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ixp23xx_map_io(void)</div><div class='del'>-{</div><div class='del'>-	iotable_init(ixp23xx_io_desc, ARRAY_SIZE(ixp23xx_io_desc));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***************************************************************************</div><div class='del'>- * IXP23xx Interrupt Handling</div><div class='del'>- ***************************************************************************/</div><div class='del'>-enum ixp23xx_irq_type {</div><div class='del'>-	IXP23XX_IRQ_LEVEL, IXP23XX_IRQ_EDGE</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void ixp23xx_config_irq(unsigned int, enum ixp23xx_irq_type);</div><div class='del'>-</div><div class='del'>-static int ixp23xx_irq_set_type(struct irq_data *d, unsigned int type)</div><div class='del'>-{</div><div class='del'>-	int line = d-&gt;irq - IRQ_IXP23XX_GPIO6 + 6;</div><div class='del'>-	u32 int_style;</div><div class='del'>-	enum ixp23xx_irq_type irq_type;</div><div class='del'>-	volatile u32 *int_reg;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Only GPIOs 6-15 are wired to interrupts on IXP23xx</div><div class='del'>-	 */</div><div class='del'>-	if (line &lt; 6 || line &gt; 15)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	switch (type) {</div><div class='del'>-	case IRQ_TYPE_EDGE_BOTH:</div><div class='del'>-		int_style = IXP23XX_GPIO_STYLE_TRANSITIONAL;</div><div class='del'>-		irq_type = IXP23XX_IRQ_EDGE;</div><div class='del'>-		break;</div><div class='del'>-	case IRQ_TYPE_EDGE_RISING:</div><div class='del'>-		int_style = IXP23XX_GPIO_STYLE_RISING_EDGE;</div><div class='del'>-		irq_type = IXP23XX_IRQ_EDGE;</div><div class='del'>-		break;</div><div class='del'>-	case IRQ_TYPE_EDGE_FALLING:</div><div class='del'>-		int_style = IXP23XX_GPIO_STYLE_FALLING_EDGE;</div><div class='del'>-		irq_type = IXP23XX_IRQ_EDGE;</div><div class='del'>-		break;</div><div class='del'>-	case IRQ_TYPE_LEVEL_HIGH:</div><div class='del'>-		int_style = IXP23XX_GPIO_STYLE_ACTIVE_HIGH;</div><div class='del'>-		irq_type = IXP23XX_IRQ_LEVEL;</div><div class='del'>-		break;</div><div class='del'>-	case IRQ_TYPE_LEVEL_LOW:</div><div class='del'>-		int_style = IXP23XX_GPIO_STYLE_ACTIVE_LOW;</div><div class='del'>-		irq_type = IXP23XX_IRQ_LEVEL;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ixp23xx_config_irq(d-&gt;irq, irq_type);</div><div class='del'>-</div><div class='del'>-	if (line &gt;= 8) {	/* pins 8-15 */</div><div class='del'>-		line -= 8;</div><div class='del'>-		int_reg = (volatile u32 *)IXP23XX_GPIO_GPIT2R;</div><div class='del'>-	} else {		/* pins 0-7 */</div><div class='del'>-		int_reg = (volatile u32 *)IXP23XX_GPIO_GPIT1R;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Clear pending interrupts</div><div class='del'>-	 */</div><div class='del'>-	*IXP23XX_GPIO_GPISR = (1 &lt;&lt; line);</div><div class='del'>-</div><div class='del'>-	/* Clear the style for the appropriate pin */</div><div class='del'>-	*int_reg &amp;= ~(IXP23XX_GPIO_STYLE_MASK &lt;&lt;</div><div class='del'>-			(line * IXP23XX_GPIO_STYLE_SIZE));</div><div class='del'>-</div><div class='del'>-	/* Set the new style */</div><div class='del'>-	*int_reg |= (int_style &lt;&lt; (line * IXP23XX_GPIO_STYLE_SIZE));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp23xx_irq_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	volatile unsigned long *intr_reg;</div><div class='del'>-	unsigned int irq = d-&gt;irq;</div><div class='del'>-</div><div class='del'>-	if (irq &gt;= 56)</div><div class='del'>-		irq += 8;</div><div class='del'>-</div><div class='del'>-	intr_reg = IXP23XX_INTR_EN1 + (irq / 32);</div><div class='del'>-	*intr_reg &amp;= ~(1 &lt;&lt; (irq % 32));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp23xx_irq_ack(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	int line = d-&gt;irq - IRQ_IXP23XX_GPIO6 + 6;</div><div class='del'>-</div><div class='del'>-	if ((line &lt; 6) || (line &gt; 15))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	*IXP23XX_GPIO_GPISR = (1 &lt;&lt; line);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Level triggered interrupts on GPIO lines can only be cleared when the</div><div class='del'>- * interrupt condition disappears.</div><div class='del'>- */</div><div class='del'>-static void ixp23xx_irq_level_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	volatile unsigned long *intr_reg;</div><div class='del'>-	unsigned int irq = d-&gt;irq;</div><div class='del'>-</div><div class='del'>-	ixp23xx_irq_ack(d);</div><div class='del'>-</div><div class='del'>-	if (irq &gt;= 56)</div><div class='del'>-		irq += 8;</div><div class='del'>-</div><div class='del'>-	intr_reg = IXP23XX_INTR_EN1 + (irq / 32);</div><div class='del'>-	*intr_reg |= (1 &lt;&lt; (irq % 32));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp23xx_irq_edge_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	volatile unsigned long *intr_reg;</div><div class='del'>-	unsigned int irq = d-&gt;irq;</div><div class='del'>-</div><div class='del'>-	if (irq &gt;= 56)</div><div class='del'>-		irq += 8;</div><div class='del'>-</div><div class='del'>-	intr_reg = IXP23XX_INTR_EN1 + (irq / 32);</div><div class='del'>-	*intr_reg |= (1 &lt;&lt; (irq % 32));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip ixp23xx_irq_level_chip = {</div><div class='del'>-	.irq_ack	= ixp23xx_irq_mask,</div><div class='del'>-	.irq_mask	= ixp23xx_irq_mask,</div><div class='del'>-	.irq_unmask	= ixp23xx_irq_level_unmask,</div><div class='del'>-	.irq_set_type	= ixp23xx_irq_set_type</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct irq_chip ixp23xx_irq_edge_chip = {</div><div class='del'>-	.irq_ack	= ixp23xx_irq_ack,</div><div class='del'>-	.irq_mask	= ixp23xx_irq_mask,</div><div class='del'>-	.irq_unmask	= ixp23xx_irq_edge_unmask,</div><div class='del'>-	.irq_set_type	= ixp23xx_irq_set_type</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void ixp23xx_pci_irq_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned int irq = d-&gt;irq;</div><div class='del'>-</div><div class='del'>-	*IXP23XX_PCI_XSCALE_INT_ENABLE &amp;= ~(1 &lt;&lt; (IRQ_IXP23XX_INTA + 27 - irq));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp23xx_pci_irq_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	unsigned int irq = d-&gt;irq;</div><div class='del'>-</div><div class='del'>-	*IXP23XX_PCI_XSCALE_INT_ENABLE |= (1 &lt;&lt; (IRQ_IXP23XX_INTA + 27 - irq));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * TODO: Should this just be done at ASM level?</div><div class='del'>- */</div><div class='del'>-static void pci_handler(unsigned int irq, struct irq_desc *desc)</div><div class='del'>-{</div><div class='del'>-	u32 pci_interrupt;</div><div class='del'>-	unsigned int irqno;</div><div class='del'>-</div><div class='del'>-	pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS;</div><div class='del'>-</div><div class='del'>-	desc-&gt;irq_data.chip-&gt;irq_ack(&amp;desc-&gt;irq_data);</div><div class='del'>-</div><div class='del'>-	/* See which PCI_INTA, or PCI_INTB interrupted */</div><div class='del'>-	if (pci_interrupt &amp; (1 &lt;&lt; 26)) {</div><div class='del'>-		irqno = IRQ_IXP23XX_INTB;</div><div class='del'>-	} else if (pci_interrupt &amp; (1 &lt;&lt; 27)) {</div><div class='del'>-		irqno = IRQ_IXP23XX_INTA;</div><div class='del'>-	} else {</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	generic_handle_irq(irqno);</div><div class='del'>-</div><div class='del'>-	desc-&gt;irq_data.chip-&gt;irq_unmask(&amp;desc-&gt;irq_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip ixp23xx_pci_irq_chip = {</div><div class='del'>-	.irq_ack	= ixp23xx_pci_irq_mask,</div><div class='del'>-	.irq_mask	= ixp23xx_pci_irq_mask,</div><div class='del'>-	.irq_unmask	= ixp23xx_pci_irq_unmask</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type)</div><div class='del'>-{</div><div class='del'>-	switch (type) {</div><div class='del'>-	case IXP23XX_IRQ_LEVEL:</div><div class='del'>-		irq_set_chip_and_handler(irq, &amp;ixp23xx_irq_level_chip,</div><div class='del'>-					 handle_level_irq);</div><div class='del'>-		break;</div><div class='del'>-	case IXP23XX_IRQ_EDGE:</div><div class='del'>-		irq_set_chip_and_handler(irq, &amp;ixp23xx_irq_edge_chip,</div><div class='del'>-					 handle_edge_irq);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init ixp23xx_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	/* Route everything to IRQ */</div><div class='del'>-	*IXP23XX_INTR_SEL1 = 0x0;</div><div class='del'>-	*IXP23XX_INTR_SEL2 = 0x0;</div><div class='del'>-	*IXP23XX_INTR_SEL3 = 0x0;</div><div class='del'>-	*IXP23XX_INTR_SEL4 = 0x0;</div><div class='del'>-</div><div class='del'>-	/* Mask all sources */</div><div class='del'>-	*IXP23XX_INTR_EN1 = 0x0;</div><div class='del'>-	*IXP23XX_INTR_EN2 = 0x0;</div><div class='del'>-	*IXP23XX_INTR_EN3 = 0x0;</div><div class='del'>-	*IXP23XX_INTR_EN4 = 0x0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Configure all IRQs for level-sensitive operation</div><div class='del'>-	 */</div><div class='del'>-	for (irq = 0; irq &lt;= NUM_IXP23XX_RAW_IRQS; irq++) {</div><div class='del'>-		ixp23xx_config_irq(irq, IXP23XX_IRQ_LEVEL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (irq = IRQ_IXP23XX_INTA; irq &lt;= IRQ_IXP23XX_INTB; irq++) {</div><div class='del'>-		irq_set_chip_and_handler(irq, &amp;ixp23xx_pci_irq_chip,</div><div class='del'>-					 handle_level_irq);</div><div class='del'>-		set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	irq_set_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * Timer-tick functions for IXP23xx</div><div class='del'>- *************************************************************************/</div><div class='del'>-#define CLOCK_TICKS_PER_USEC	(CLOCK_TICK_RATE / USEC_PER_SEC)</div><div class='del'>-</div><div class='del'>-static unsigned long next_jiffy_time;</div><div class='del'>-</div><div class='del'>-static unsigned long</div><div class='del'>-ixp23xx_gettimeoffset(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long elapsed;</div><div class='del'>-</div><div class='del'>-	elapsed = *IXP23XX_TIMER_CONT - (next_jiffy_time - LATCH);</div><div class='del'>-</div><div class='del'>-	return elapsed / CLOCK_TICKS_PER_USEC;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t</div><div class='del'>-ixp23xx_timer_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	/* Clear Pending Interrupt by writing '1' to it */</div><div class='del'>-	*IXP23XX_TIMER_STATUS = IXP23XX_TIMER1_INT_PEND;</div><div class='del'>-	while ((signed long)(*IXP23XX_TIMER_CONT - next_jiffy_time) &gt;= LATCH) {</div><div class='del'>-		timer_tick();</div><div class='del'>-		next_jiffy_time += LATCH;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irqaction ixp23xx_timer_irq = {</div><div class='del'>-	.name		= "IXP23xx Timer Tick",</div><div class='del'>-	.handler	= ixp23xx_timer_interrupt,</div><div class='del'>-	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ixp23xx_init_timer(void)</div><div class='del'>-{</div><div class='del'>-	/* Clear Pending Interrupt by writing '1' to it */</div><div class='del'>-	*IXP23XX_TIMER_STATUS = IXP23XX_TIMER1_INT_PEND;</div><div class='del'>-</div><div class='del'>-	/* Setup the Timer counter value */</div><div class='del'>-	*IXP23XX_TIMER1_RELOAD =</div><div class='del'>-		(LATCH &amp; ~IXP23XX_TIMER_RELOAD_MASK) | IXP23XX_TIMER_ENABLE;</div><div class='del'>-</div><div class='del'>-	*IXP23XX_TIMER_CONT = 0;</div><div class='del'>-	next_jiffy_time = LATCH;</div><div class='del'>-</div><div class='del'>-	/* Connect the interrupt handler and enable the interrupt */</div><div class='del'>-	setup_irq(IRQ_IXP23XX_TIMER1, &amp;ixp23xx_timer_irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct sys_timer ixp23xx_timer = {</div><div class='del'>-	.init		= ixp23xx_init_timer,</div><div class='del'>-	.offset		= ixp23xx_gettimeoffset,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*************************************************************************</div><div class='del'>- * IXP23xx Platform Initialization</div><div class='del'>- *************************************************************************/</div><div class='del'>-static struct resource ixp23xx_uart_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.start		= IXP23XX_UART1_PHYS,</div><div class='del'>-		.end		= IXP23XX_UART1_PHYS + 0x0fff,</div><div class='del'>-		.flags		= IORESOURCE_MEM</div><div class='del'>-	}, {</div><div class='del'>-		.start		= IXP23XX_UART2_PHYS,</div><div class='del'>-		.end		= IXP23XX_UART2_PHYS + 0x0fff,</div><div class='del'>-		.flags		= IORESOURCE_MEM</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct plat_serial8250_port ixp23xx_uart_data[] = {</div><div class='del'>-	{</div><div class='del'>-		.mapbase	= IXP23XX_UART1_PHYS,</div><div class='del'>-		.membase	= (char *)(IXP23XX_UART1_VIRT + 3),</div><div class='del'>-		.irq		= IRQ_IXP23XX_UART1,</div><div class='del'>-		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,</div><div class='del'>-		.iotype		= UPIO_MEM,</div><div class='del'>-		.regshift	= 2,</div><div class='del'>-		.uartclk	= IXP23XX_UART_XTAL,</div><div class='del'>-	}, {</div><div class='del'>-		.mapbase	= IXP23XX_UART2_PHYS,</div><div class='del'>-		.membase	= (char *)(IXP23XX_UART2_VIRT + 3),</div><div class='del'>-		.irq		= IRQ_IXP23XX_UART2,</div><div class='del'>-		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,</div><div class='del'>-		.iotype		= UPIO_MEM,</div><div class='del'>-		.regshift	= 2,</div><div class='del'>-		.uartclk	= IXP23XX_UART_XTAL,</div><div class='del'>-	},</div><div class='del'>-	{ },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device ixp23xx_uart = {</div><div class='del'>-	.name			= "serial8250",</div><div class='del'>-	.id			= 0,</div><div class='del'>-	.dev.platform_data	= ixp23xx_uart_data,</div><div class='del'>-	.num_resources		= 2,</div><div class='del'>-	.resource		= ixp23xx_uart_resources,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *ixp23xx_devices[] __initdata = {</div><div class='del'>-	&amp;ixp23xx_uart,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ixp23xx_sys_init(void)</div><div class='del'>-{</div><div class='del'>-	/* by default, the idle code is disabled */</div><div class='del'>-	disable_hlt();</div><div class='del'>-</div><div class='del'>-	*IXP23XX_EXP_UNIT_FUSE |= 0xf;</div><div class='del'>-	platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ixp23xx_restart(char mode, const char *cmd)</div><div class='del'>-{</div><div class='del'>-	/* Use on-chip reset capability */</div><div class='del'>-	*IXP23XX_RESET0 |= IXP23XX_RST_ALL;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c<br/>deleted file mode 100644<br/>index d142d45dea12..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/espresso.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/espresso.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,93 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/espresso.c</div><div class='del'>- *</div><div class='del'>- * Double Espresso-specific routines</div><div class='del'>- *</div><div class='del'>- * Author: Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/serial.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/serial_8250.h&gt;</div><div class='del'>-#include &lt;linux/serial_core.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/mtd/physmap.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/types.h&gt;</div><div class='del'>-#include &lt;asm/setup.h&gt;</div><div class='del'>-#include &lt;asm/memory.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/mach/irq.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach/pci.h&gt;</div><div class='del'>-</div><div class='del'>-static int __init espresso_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	if (machine_is_espresso())</div><div class='del'>-		ixp23xx_pci_slave_init();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-};</div><div class='del'>-subsys_initcall(espresso_pci_init);</div><div class='del'>-</div><div class='del'>-static struct physmap_flash_data espresso_flash_data = {</div><div class='del'>-	.width		= 2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource espresso_flash_resource = {</div><div class='del'>-	.start		= 0x90000000,</div><div class='del'>-	.end		= 0x91ffffff,</div><div class='del'>-	.flags		= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device espresso_flash = {</div><div class='del'>-	.name		= "physmap-flash",</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data	= &amp;espresso_flash_data,</div><div class='del'>-	},</div><div class='del'>-	.num_resources	= 1,</div><div class='del'>-	.resource	= &amp;espresso_flash_resource,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init espresso_init(void)</div><div class='del'>-{</div><div class='del'>-	platform_device_register(&amp;espresso_flash);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Mark flash as writeable.</div><div class='del'>-	 */</div><div class='del'>-	IXP23XX_EXP_CS0[0] |= IXP23XX_FLASH_WRITABLE;</div><div class='del'>-	IXP23XX_EXP_CS0[1] |= IXP23XX_FLASH_WRITABLE;</div><div class='del'>-</div><div class='del'>-	ixp23xx_sys_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(ESPRESSO, "IP Fabrics Double Espresso")</div><div class='del'>-	/* Maintainer: Lennert Buytenhek */</div><div class='del'>-	.map_io		= ixp23xx_map_io,</div><div class='del'>-	.init_irq	= ixp23xx_init_irq,</div><div class='del'>-	.timer		= &amp;ixp23xx_timer,</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.init_machine	= espresso_init,</div><div class='del'>-	.restart	= ixp23xx_restart,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/include/mach/debug-macro.S b/arch/arm/mach-ixp23xx/include/mach/debug-macro.S<br/>deleted file mode 100644<br/>index 5ff524c13744..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/include/mach/debug-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/include/mach/debug-macro.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/include/mach/debug-macro.S</div><div class='del'>- *</div><div class='del'>- * Debugging macro include header</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1994-1999 Russell King</div><div class='del'>- * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-#include &lt;mach/ixp23xx.h&gt;</div><div class='del'>-</div><div class='del'>-		.macro	addruart, rp, rv, tmp</div><div class='del'>-		ldr	\rp, =IXP23XX_PERIPHERAL_PHYS 	@ physical</div><div class='del'>-		ldr	\rv, =IXP23XX_PERIPHERAL_VIRT	@ virtual</div><div class='del'>-#ifdef __ARMEB__</div><div class='del'>-		orr	\rp, \rp, #0x00000003</div><div class='del'>-		orr	\rv, \rv, #0x00000003</div><div class='del'>-#endif</div><div class='del'>-		.endm</div><div class='del'>-</div><div class='del'>-#define UART_SHIFT	2</div><div class='del'>-#include &lt;asm/hardware/debug-8250.S&gt;</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S b/arch/arm/mach-ixp23xx/include/mach/entry-macro.S<br/>deleted file mode 100644<br/>index 3fd2cb984e42..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/include/mach/entry-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/include/mach/entry-macro.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,31 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/include/mach/entry-macro.S</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-		.macro  get_irqnr_preamble, base, tmp</div><div class='del'>-		.endm</div><div class='del'>-</div><div class='del'>-		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp</div><div class='del'>-		ldr	\irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)</div><div class='del'>-		ldr	\irqnr, [\irqnr]	@ get interrupt number</div><div class='del'>-		cmp	\irqnr, #0x0		@ spurious interrupt ?</div><div class='del'>-		movne	\irqnr, \irqnr, lsr #2	@ skip unwanted low order bits</div><div class='del'>-		subne	\irqnr, \irqnr, #1	@ convert to 0 based</div><div class='del'>-</div><div class='del'>-#if 0</div><div class='del'>-		cmp	\irqnr, #IRQ_IXP23XX_PCI_INT_RPH</div><div class='del'>-		bne	1001f</div><div class='del'>-		mov	\irqnr, #IRQ_IXP23XX_INTA</div><div class='del'>-</div><div class='del'>-		ldr	\irqnr, =0xf5000030</div><div class='del'>-</div><div class='del'>-		mov	\tmp, #(1&lt;&lt;26)</div><div class='del'>-		tst	\irqnr, \tmp</div><div class='del'>-		movne	\irqnr, #IRQ_IXP23XX_INTB</div><div class='del'>-</div><div class='del'>-		mov	\tmp, #(1&lt;&lt;27)</div><div class='del'>-		tst	\irqnr, \tmp</div><div class='del'>-		movne	\irqnr, #IRQ_IXP23XX_INTA</div><div class='del'>-1001:</div><div class='del'>-#endif</div><div class='del'>-		.endm</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/include/mach/hardware.h b/arch/arm/mach-ixp23xx/include/mach/hardware.h<br/>deleted file mode 100644<br/>index 60e55fa10238..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/include/mach/hardware.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/include/mach/hardware.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,32 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/include/mach/hardware.h</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002-2004 Intel Corporation.</div><div class='del'>- * Copyricht (C) 2005 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * Hardware definitions for IXP23XX based systems</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_HARDWARE_H</div><div class='del'>-#define __ASM_ARCH_HARDWARE_H</div><div class='del'>-</div><div class='del'>-/* PCI IO info */</div><div class='del'>-</div><div class='del'>-#include "ixp23xx.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Platform helper functions</div><div class='del'>- */</div><div class='del'>-#include "platform.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Platform-specific headers</div><div class='del'>- */</div><div class='del'>-#include "ixdp2351.h"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h<br/>deleted file mode 100644<br/>index a7aceb55c130..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/include/mach/io.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/include/mach/io.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/include/mach/io.h</div><div class='del'>- *</div><div class='del'>- * Original Author: Naeem M Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2003-2005 Intel Corp.</div><div class='del'>- * Copyright (C) 2005 MontaVista Software, Inc</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_IO_H</div><div class='del'>-#define __ASM_ARCH_IO_H</div><div class='del'>-</div><div class='del'>-#define IO_SPACE_LIMIT 0xffffffff</div><div class='del'>-</div><div class='del'>-#define __io(p)		((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/include/mach/irqs.h b/arch/arm/mach-ixp23xx/include/mach/irqs.h<br/>deleted file mode 100644<br/>index 3af33a04b8a2..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/include/mach/irqs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/include/mach/irqs.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,223 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/include/mach/irqs.h</div><div class='del'>- *</div><div class='del'>- * IRQ definitions for IXP23XX based systems</div><div class='del'>- *</div><div class='del'>- * Author: Naeem Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2003-2004 Intel Corporation.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_IRQS_H</div><div class='del'>-#define __ASM_ARCH_IRQS_H</div><div class='del'>-</div><div class='del'>-#define NR_IXP23XX_IRQS			IRQ_IXP23XX_INTB+1</div><div class='del'>-#define IRQ_IXP23XX_EXTIRQS		NR_IXP23XX_IRQS</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define IRQ_IXP23XX_DBG0		0	/* Debug/Execution/MBox */</div><div class='del'>-#define IRQ_IXP23XX_DBG1		1	/* Debug/Execution/MBox */</div><div class='del'>-#define IRQ_IXP23XX_NPE_TRG		2	/* npe_trigger */</div><div class='del'>-#define IRQ_IXP23XX_TIMER1		3	/* Timer[0] */</div><div class='del'>-#define IRQ_IXP23XX_TIMER2		4	/* Timer[1] */</div><div class='del'>-#define IRQ_IXP23XX_TIMESTAMP		5	/* Timer[2], Time-stamp */</div><div class='del'>-#define IRQ_IXP23XX_WDOG		6	/* Time[3], Watchdog Timer */</div><div class='del'>-#define IRQ_IXP23XX_PCI_DBELL		7	/* PCI Doorbell */</div><div class='del'>-#define IRQ_IXP23XX_PCI_DMA1		8	/* PCI DMA Channel 1 */</div><div class='del'>-#define IRQ_IXP23XX_PCI_DMA2		9	/* PCI DMA Channel 2 */</div><div class='del'>-#define IRQ_IXP23XX_PCI_DMA3		10	/* PCI DMA Channel 3 */</div><div class='del'>-#define IRQ_IXP23XX_PCI_INT_RPH		11	/* pcxg_pci_int_rph */</div><div class='del'>-#define IRQ_IXP23XX_CPP_PMU		12	/* xpxg_pm_int_rpl */</div><div class='del'>-#define IRQ_IXP23XX_SWINT0		13	/* S/W Interrupt0 */</div><div class='del'>-#define IRQ_IXP23XX_SWINT1		14	/* S/W Interrupt1 */</div><div class='del'>-#define IRQ_IXP23XX_UART2		15	/* UART1 Interrupt */</div><div class='del'>-#define IRQ_IXP23XX_UART1		16	/* UART0 Interrupt */</div><div class='del'>-#define IRQ_IXP23XX_XSI_PMU_ROLLOVER	17	/* AHB Performance M. Unit counter rollover */</div><div class='del'>-#define IRQ_IXP23XX_XSI_AHB_PM0		18	/* intr_pm_o */</div><div class='del'>-#define IRQ_IXP23XX_XSI_AHB_ECE0	19	/* intr_ece_o */</div><div class='del'>-#define IRQ_IXP23XX_XSI_AHB_GASKET	20	/* gas_intr_o */</div><div class='del'>-#define IRQ_IXP23XX_XSI_CPP		21	/* xsi2cpp_int */</div><div class='del'>-#define IRQ_IXP23XX_CPP_XSI		22	/* cpp2xsi_int */</div><div class='del'>-#define IRQ_IXP23XX_ME_ATTN0		23	/* ME_ATTN */</div><div class='del'>-#define IRQ_IXP23XX_ME_ATTN1		24	/* ME_ATTN */</div><div class='del'>-#define IRQ_IXP23XX_ME_ATTN2		25	/* ME_ATTN */</div><div class='del'>-#define IRQ_IXP23XX_ME_ATTN3		26	/* ME_ATTN */</div><div class='del'>-#define IRQ_IXP23XX_PCI_ERR_RPH		27	/* PCXG_PCI_ERR_RPH */</div><div class='del'>-#define IRQ_IXP23XX_D0XG_ECC_CORR	28	/* D0XG_DRAM_ECC_CORR */</div><div class='del'>-#define IRQ_IXP23XX_D0XG_ECC_UNCORR	29	/* D0XG_DRAM_ECC_UNCORR */</div><div class='del'>-#define IRQ_IXP23XX_SRAM_ERR1		30	/* SRAM1_ERR */</div><div class='del'>-#define IRQ_IXP23XX_SRAM_ERR0		31	/* SRAM0_ERR */</div><div class='del'>-#define IRQ_IXP23XX_MEDIA_ERR		32	/* MEDIA_ERR */</div><div class='del'>-#define IRQ_IXP23XX_STH_DRAM_ECC_MAJ	33	/* STH_DRAM0_ECC_MAJ */</div><div class='del'>-#define IRQ_IXP23XX_GPIO6		34	/* GPIO0 interrupts */</div><div class='del'>-#define IRQ_IXP23XX_GPIO7		35	/* GPIO1 interrupts */</div><div class='del'>-#define IRQ_IXP23XX_GPIO8		36	/* GPIO2 interrupts */</div><div class='del'>-#define IRQ_IXP23XX_GPIO9		37	/* GPIO3 interrupts */</div><div class='del'>-#define IRQ_IXP23XX_GPIO10		38	/* GPIO4 interrupts */</div><div class='del'>-#define IRQ_IXP23XX_GPIO11		39	/* GPIO5 interrupts */</div><div class='del'>-#define IRQ_IXP23XX_GPIO12		40	/* GPIO6 interrupts */</div><div class='del'>-#define IRQ_IXP23XX_GPIO13		41	/* GPIO7 interrupts */</div><div class='del'>-#define IRQ_IXP23XX_GPIO14		42	/* GPIO8 interrupts */</div><div class='del'>-#define IRQ_IXP23XX_GPIO15		43	/* GPIO9 interrupts */</div><div class='del'>-#define IRQ_IXP23XX_SHAC_RING0		44	/* SHAC Ring Full */</div><div class='del'>-#define IRQ_IXP23XX_SHAC_RING1		45	/* SHAC Ring Full */</div><div class='del'>-#define IRQ_IXP23XX_SHAC_RING2		46	/* SHAC Ring Full */</div><div class='del'>-#define IRQ_IXP23XX_SHAC_RING3		47	/* SHAC Ring Full */</div><div class='del'>-#define IRQ_IXP23XX_SHAC_RING4		48	/* SHAC Ring Full */</div><div class='del'>-#define IRQ_IXP23XX_SHAC_RING5		49	/* SHAC Ring Full */</div><div class='del'>-#define IRQ_IXP23XX_SHAC_RING6		50	/* SHAC RING Full */</div><div class='del'>-#define IRQ_IXP23XX_SHAC_RING7		51	/* SHAC Ring Full */</div><div class='del'>-#define IRQ_IXP23XX_SHAC_RING8		52	/* SHAC Ring Full */</div><div class='del'>-#define IRQ_IXP23XX_SHAC_RING9		53	/* SHAC Ring Full */</div><div class='del'>-#define IRQ_IXP23XX_SHAC_RING10		54	/* SHAC Ring Full */</div><div class='del'>-#define IRQ_IXP23XX_SHAC_RING11		55	/* SHAC Ring Full */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A0_ME0	56	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A1_ME0	57	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A2_ME0	58	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A3_ME0	59	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A4_ME0	60	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A5_ME0	61	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A6_ME0	62	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A7_ME0	63	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A8_ME1	64	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A9_ME1	65	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A10_ME1	66	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A11_ME1	67	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A12_ME1	68	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A13_ME1	69	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A14_ME1	70	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A15_ME1	71	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A16_ME2	72	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A17_ME2	73	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A18_ME2	74	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A19_ME2	75	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A20_ME2	76	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A21_ME2	77	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A22_ME2	78	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A23_ME2	79	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A24_ME3	80	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A25_ME3	81	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A26_ME3	82	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A27_ME3	83	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A28_ME3	84	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A29_ME3	85	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A30_ME3	86	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_A31_ME3	87	/* ME_THREAD_A */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B0_ME0	88	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B1_ME0	89	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B2_ME0	90	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B3_ME0	91	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B4_ME0	92	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B5_ME0	93	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B6_ME0	94	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B7_ME0	95	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B8_ME1	96	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B9_ME1	97	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B10_ME1	98	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B11_ME1	99	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B12_ME1	100	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B13_ME1	101	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B14_ME1	102	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B15_ME1	103	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B16_ME2	104	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B17_ME2	105	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B18_ME2	106	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B19_ME2	107	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B20_ME2	108	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B21_ME2	109	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B22_ME2	110	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B23_ME2	111	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B24_ME3	112	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B25_ME3	113	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B26_ME3	114	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B27_ME3	115	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B28_ME3	116	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B29_ME3	117	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B30_ME3	118	/* ME_THREAD_B */</div><div class='del'>-#define IRQ_IXP23XX_ME_THREAD_B31_ME3	119	/* ME_THREAD_B */</div><div class='del'>-</div><div class='del'>-#define NUM_IXP23XX_RAW_IRQS		120</div><div class='del'>-</div><div class='del'>-#define IRQ_IXP23XX_INTA		120	/* Indirect pcxg_pci_int_rph */</div><div class='del'>-#define IRQ_IXP23XX_INTB		121	/* Indirect pcxg_pci_int_rph */</div><div class='del'>-</div><div class='del'>-#define NR_IXP23XX_IRQ			(IRQ_IXP23XX_INTB + 1)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We default to 32 per-board IRQs. Increase this number if you need</div><div class='del'>- * more, but keep it realistic.</div><div class='del'>- */</div><div class='del'>-#define NR_IXP23XX_MACH_IRQS 		32</div><div class='del'>-</div><div class='del'>-#define NR_IRQS				(NR_IXP23XX_IRQS + NR_IXP23XX_MACH_IRQS)</div><div class='del'>-</div><div class='del'>-#define IXP23XX_MACH_IRQ(irq) 		(NR_IXP23XX_IRQ + (irq))</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXDP2351-specific interrupts</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * External PCI interrupts signaled through INTB</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-#define IXDP2351_INTB_IRQ_BASE 		0</div><div class='del'>-#define IRQ_IXDP2351_INTA_82546		IXP23XX_MACH_IRQ(0)</div><div class='del'>-#define IRQ_IXDP2351_INTB_82546		IXP23XX_MACH_IRQ(1)</div><div class='del'>-#define IRQ_IXDP2351_SPCI_DB_0		IXP23XX_MACH_IRQ(2)</div><div class='del'>-#define IRQ_IXDP2351_SPCI_DB_1		IXP23XX_MACH_IRQ(3)</div><div class='del'>-#define IRQ_IXDP2351_SPCI_PMC_INTA	IXP23XX_MACH_IRQ(4)</div><div class='del'>-#define IRQ_IXDP2351_SPCI_PMC_INTB	IXP23XX_MACH_IRQ(5)</div><div class='del'>-#define IRQ_IXDP2351_SPCI_PMC_INTC	IXP23XX_MACH_IRQ(6)</div><div class='del'>-#define IRQ_IXDP2351_SPCI_PMC_INTD	IXP23XX_MACH_IRQ(7)</div><div class='del'>-#define IRQ_IXDP2351_SPCI_FIC		IXP23XX_MACH_IRQ(8)</div><div class='del'>-</div><div class='del'>-#define IXDP2351_INTB_IRQ_BIT(irq)	(irq - IXP23XX_MACH_IRQ(0))</div><div class='del'>-#define IXDP2351_INTB_IRQ_MASK(irq)	(1 &lt;&lt; IXDP2351_INTB_IRQ_BIT(irq))</div><div class='del'>-#define IXDP2351_INTB_IRQ_VALID		0x01FF</div><div class='del'>-#define IXDP2351_INTB_IRQ_NUM 		16</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Other external interrupts signaled through INTA</div><div class='del'>- */</div><div class='del'>-#define IXDP2351_INTA_IRQ_BASE 		16</div><div class='del'>-#define IRQ_IXDP2351_IPMI_FROM		IXP23XX_MACH_IRQ(16)</div><div class='del'>-#define IRQ_IXDP2351_125US		IXP23XX_MACH_IRQ(17)</div><div class='del'>-#define IRQ_IXDP2351_DB_0_ADD		IXP23XX_MACH_IRQ(18)</div><div class='del'>-#define IRQ_IXDP2351_DB_1_ADD		IXP23XX_MACH_IRQ(19)</div><div class='del'>-#define IRQ_IXDP2351_DEBUG1		IXP23XX_MACH_IRQ(20)</div><div class='del'>-#define IRQ_IXDP2351_ADD_UART		IXP23XX_MACH_IRQ(21)</div><div class='del'>-#define IRQ_IXDP2351_FIC_ADD		IXP23XX_MACH_IRQ(24)</div><div class='del'>-#define IRQ_IXDP2351_CS8900		IXP23XX_MACH_IRQ(25)</div><div class='del'>-#define IRQ_IXDP2351_BBSRAM		IXP23XX_MACH_IRQ(26)</div><div class='del'>-#define IRQ_IXDP2351_CONFIG_MEDIA	IXP23XX_MACH_IRQ(27)</div><div class='del'>-#define IRQ_IXDP2351_CLOCK_REF		IXP23XX_MACH_IRQ(28)</div><div class='del'>-#define IRQ_IXDP2351_A10_NP		IXP23XX_MACH_IRQ(29)</div><div class='del'>-#define IRQ_IXDP2351_A11_NP		IXP23XX_MACH_IRQ(30)</div><div class='del'>-#define IRQ_IXDP2351_DEBUG_NP		IXP23XX_MACH_IRQ(31)</div><div class='del'>-</div><div class='del'>-#define IXDP2351_INTA_IRQ_BIT(irq) 	(irq - IXP23XX_MACH_IRQ(16))</div><div class='del'>-#define IXDP2351_INTA_IRQ_MASK(irq) 	(1 &lt;&lt; IXDP2351_INTA_IRQ_BIT(irq))</div><div class='del'>-#define IXDP2351_INTA_IRQ_VALID 	0xFF3F</div><div class='del'>-#define IXDP2351_INTA_IRQ_NUM 		16</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ADI RoadRunner IRQs</div><div class='del'>- */</div><div class='del'>-#define IRQ_ROADRUNNER_PCI_INTA 	IRQ_IXP23XX_INTA</div><div class='del'>-#define IRQ_ROADRUNNER_PCI_INTB 	IRQ_IXP23XX_INTB</div><div class='del'>-#define IRQ_ROADRUNNER_PCI_INTC 	IRQ_IXP23XX_GPIO11</div><div class='del'>-#define IRQ_ROADRUNNER_PCI_INTD 	IRQ_IXP23XX_GPIO12</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Put new board definitions here</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/include/mach/ixdp2351.h b/arch/arm/mach-ixp23xx/include/mach/ixdp2351.h<br/>deleted file mode 100644<br/>index 663951027de5..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/include/mach/ixdp2351.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/include/mach/ixdp2351.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,89 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/include/mach/ixdp2351.h</div><div class='del'>- *</div><div class='del'>- * Register and other defines for IXDP2351</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2002-2004 Intel Corp.</div><div class='del'>- * Copytight (c) 2005 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the</div><div class='del'>- * Free Software Foundation; either version 2 of the License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_IXDP2351_H</div><div class='del'>-#define __ASM_ARCH_IXDP2351_H</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * NP module memory map</div><div class='del'>- */</div><div class='del'>-#define IXDP2351_NP_PHYS_BASE		(IXP23XX_EXP_BUS_CS4_BASE)</div><div class='del'>-#define IXDP2351_NP_PHYS_SIZE		0x00100000</div><div class='del'>-#define IXDP2351_NP_VIRT_BASE		0xeff00000</div><div class='del'>-</div><div class='del'>-#define IXDP2351_VIRT_CS8900_BASE	(IXDP2351_NP_VIRT_BASE)</div><div class='del'>-#define IXDP2351_VIRT_CS8900_END	(IXDP2351_VIRT_CS8900_BASE + 16)</div><div class='del'>-</div><div class='del'>-#define IXDP2351_VIRT_NP_CPLD_BASE 	(IXP23XX_EXP_BUS_CS4_BASE_VIRT + 0x00010000)</div><div class='del'>-</div><div class='del'>-#define IXDP2351_NP_CPLD_REG(reg) ((volatile u16 *)(IXDP2351_VIRT_NP_CPLD_BASE + reg))</div><div class='del'>-</div><div class='del'>-#define IXDP2351_NP_CPLD_RESET1_REG	IXDP2351_NP_CPLD_REG(0x00)</div><div class='del'>-#define IXDP2351_NP_CPLD_LED_REG	IXDP2351_NP_CPLD_REG(0x02)</div><div class='del'>-#define IXDP2351_NP_CPLD_VERSION_REG	IXDP2351_NP_CPLD_REG(0x04)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Base board module memory map</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define IXDP2351_BB_BASE_PHYS		(IXP23XX_EXP_BUS_CS5_BASE)</div><div class='del'>-#define IXDP2351_BB_SIZE		0x01000000</div><div class='del'>-#define IXDP2351_BB_BASE_VIRT		(0xee000000)</div><div class='del'>-</div><div class='del'>-#define IXDP2351_BB_AREA_BASE(offset)	(IXDP2351_BB_BASE_VIRT + offset)</div><div class='del'>-</div><div class='del'>-#define IXDP2351_VIRT_NVRAM_BASE	IXDP2351_BB_AREA_BASE(0x0)</div><div class='del'>-#define IXDP2351_NVRAM_SIZE		(0x20000)</div><div class='del'>-</div><div class='del'>-#define IXDP2351_VIRT_MB_IXF1104_BASE	IXDP2351_BB_AREA_BASE(0x00020000)</div><div class='del'>-#define IXDP2351_VIRT_ADD_UART_BASE	IXDP2351_BB_AREA_BASE(0x000240C0)</div><div class='del'>-#define IXDP2351_VIRT_FIC_BASE		IXDP2351_BB_AREA_BASE(0x00200000)</div><div class='del'>-#define IXDP2351_VIRT_DB0_BASE		IXDP2351_BB_AREA_BASE(0x00400000)</div><div class='del'>-#define IXDP2351_VIRT_DB1_BASE		IXDP2351_BB_AREA_BASE(0x00600000)</div><div class='del'>-#define IXDP2351_VIRT_CPLD_BASE		IXDP2351_BB_AREA_BASE(0x00024000)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * On board CPLD registers</div><div class='del'>- */</div><div class='del'>-#define IXDP2351_CPLD_BB_REG(reg) ((volatile u16 *)(IXDP2351_VIRT_CPLD_BASE + reg))</div><div class='del'>-</div><div class='del'>-#define IXDP2351_CPLD_RESET0_REG	IXDP2351_CPLD_BB_REG(0x00)</div><div class='del'>-#define IXDP2351_CPLD_RESET1_REG	IXDP2351_CPLD_BB_REG(0x04)</div><div class='del'>-</div><div class='del'>-#define IXDP2351_CPLD_RESET1_MAGIC 	0x55AA</div><div class='del'>-#define IXDP2351_CPLD_RESET1_ENABLE 	0x8000</div><div class='del'>-</div><div class='del'>-#define IXDP2351_CPLD_FPGA_CONFIG_REG	IXDP2351_CPLD_BB_REG(0x08)</div><div class='del'>-#define IXDP2351_CPLD_INTB_MASK_SET_REG	IXDP2351_CPLD_BB_REG(0x10)</div><div class='del'>-#define IXDP2351_CPLD_INTA_MASK_SET_REG	IXDP2351_CPLD_BB_REG(0x14)</div><div class='del'>-#define IXDP2351_CPLD_INTB_STAT_REG	IXDP2351_CPLD_BB_REG(0x18)</div><div class='del'>-#define IXDP2351_CPLD_INTA_STAT_REG	IXDP2351_CPLD_BB_REG(0x1C)</div><div class='del'>-#define IXDP2351_CPLD_INTB_RAW_REG	IXDP2351_CPLD_BB_REG(0x20)	/* read */</div><div class='del'>-#define IXDP2351_CPLD_INTA_RAW_REG	IXDP2351_CPLD_BB_REG(0x24)	/* read */</div><div class='del'>-#define IXDP2351_CPLD_INTB_MASK_CLR_REG	IXDP2351_CPLD_INTB_RAW_REG	/* write */</div><div class='del'>-#define IXDP2351_CPLD_INTA_MASK_CLR_REG	IXDP2351_CPLD_INTA_RAW_REG	/* write */</div><div class='del'>-#define IXDP2351_CPLD_INTB_SIM_REG	IXDP2351_CPLD_BB_REG(0x28)</div><div class='del'>-#define IXDP2351_CPLD_INTA_SIM_REG	IXDP2351_CPLD_BB_REG(0x2C)</div><div class='del'>-	/* Interrupt bits are defined in irqs.h */</div><div class='del'>-#define IXDP2351_CPLD_BB_GBE0_REG	IXDP2351_CPLD_BB_REG(0x30)</div><div class='del'>-#define IXDP2351_CPLD_BB_GBE1_REG	IXDP2351_CPLD_BB_REG(0x34)</div><div class='del'>-</div><div class='del'>-/* #define IXDP2351_CPLD_BB_MISC_REG	IXDP2351_CPLD_REG(0x1C) */</div><div class='del'>-/* #define IXDP2351_CPLD_BB_MISC_REV_MASK	0xFF		*/</div><div class='del'>-/* #define IXDP2351_CPLD_BB_GDXCS0_REG	IXDP2351_CPLD_REG(0x24) */</div><div class='del'>-/* #define IXDP2351_CPLD_BB_GDXCS1_REG	IXDP2351_CPLD_REG(0x28) */</div><div class='del'>-/* #define IXDP2351_CPLD_BB_CLOCK_REG	IXDP2351_CPLD_REG(0x04) */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/include/mach/ixp23xx.h b/arch/arm/mach-ixp23xx/include/mach/ixp23xx.h<br/>deleted file mode 100644<br/>index 6d02481b1d6d..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/include/mach/ixp23xx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/include/mach/ixp23xx.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,298 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/include/mach/ixp23xx.h</div><div class='del'>- *</div><div class='del'>- * Register definitions for IXP23XX</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2003-2005 Intel Corporation.</div><div class='del'>- * Copyright (C) 2005 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * Maintainer: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_IXP23XX_H</div><div class='del'>-#define __ASM_ARCH_IXP23XX_H</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXP2300 linux memory map:</div><div class='del'>- *</div><div class='del'>- * virt		phys		size</div><div class='del'>- * fffd0000	a0000000	64K		XSI2CPP_CSR</div><div class='del'>- * fffc0000	c4000000	4K		EXP_CFG</div><div class='del'>- * fff00000	c8000000	64K		PERIPHERAL</div><div class='del'>- * fe000000	1c0000000	16M		CAP_CSR</div><div class='del'>- * fd000000	1c8000000	16M		MSF_CSR</div><div class='del'>- * fb000000			16M		---</div><div class='del'>- * fa000000	1d8000000	32M		PCI_IO</div><div class='del'>- * f8000000	1da000000	32M		PCI_CFG</div><div class='del'>- * f6000000	1de000000	32M		PCI_CREG</div><div class='del'>- * f4000000			32M		---</div><div class='del'>- * f0000000	1e0000000	64M		PCI_MEM</div><div class='del'>- * e[c-f]000000					per-platform mappings</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/****************************************************************************</div><div class='del'>- * Static mappings.</div><div class='del'>- ****************************************************************************/</div><div class='del'>-#define IXP23XX_XSI2CPP_CSR_PHYS	0xa0000000</div><div class='del'>-#define IXP23XX_XSI2CPP_CSR_VIRT	0xfffd0000</div><div class='del'>-#define IXP23XX_XSI2CPP_CSR_SIZE	0x00010000</div><div class='del'>-</div><div class='del'>-#define IXP23XX_EXP_CFG_PHYS		0xc4000000</div><div class='del'>-#define IXP23XX_EXP_CFG_VIRT		0xfffc0000</div><div class='del'>-#define IXP23XX_EXP_CFG_SIZE		0x00001000</div><div class='del'>-</div><div class='del'>-#define IXP23XX_PERIPHERAL_PHYS		0xc8000000</div><div class='del'>-#define IXP23XX_PERIPHERAL_VIRT		0xfff00000</div><div class='del'>-#define IXP23XX_PERIPHERAL_SIZE		0x00010000</div><div class='del'>-</div><div class='del'>-#define IXP23XX_CAP_CSR_PHYS		0x1c0000000ULL</div><div class='del'>-#define IXP23XX_CAP_CSR_VIRT		0xfe000000</div><div class='del'>-#define IXP23XX_CAP_CSR_SIZE		0x01000000</div><div class='del'>-</div><div class='del'>-#define IXP23XX_MSF_CSR_PHYS		0x1c8000000ULL</div><div class='del'>-#define IXP23XX_MSF_CSR_VIRT		0xfd000000</div><div class='del'>-#define IXP23XX_MSF_CSR_SIZE		0x01000000</div><div class='del'>-</div><div class='del'>-#define IXP23XX_PCI_IO_PHYS		0x1d8000000ULL</div><div class='del'>-#define IXP23XX_PCI_IO_VIRT		0xfa000000</div><div class='del'>-#define IXP23XX_PCI_IO_SIZE		0x02000000</div><div class='del'>-</div><div class='del'>-#define IXP23XX_PCI_CFG_PHYS		0x1da000000ULL</div><div class='del'>-#define IXP23XX_PCI_CFG_VIRT		0xf8000000</div><div class='del'>-#define IXP23XX_PCI_CFG_SIZE		0x02000000</div><div class='del'>-#define IXP23XX_PCI_CFG0_VIRT		IXP23XX_PCI_CFG_VIRT</div><div class='del'>-#define IXP23XX_PCI_CFG1_VIRT		(IXP23XX_PCI_CFG_VIRT + 0x01000000)</div><div class='del'>-</div><div class='del'>-#define IXP23XX_PCI_CREG_PHYS		0x1de000000ULL</div><div class='del'>-#define IXP23XX_PCI_CREG_VIRT		0xf6000000</div><div class='del'>-#define IXP23XX_PCI_CREG_SIZE		0x02000000</div><div class='del'>-#define IXP23XX_PCI_CSR_VIRT		(IXP23XX_PCI_CREG_VIRT + 0x01000000)</div><div class='del'>-</div><div class='del'>-#define IXP23XX_PCI_MEM_START		0xe0000000</div><div class='del'>-#define IXP23XX_PCI_MEM_PHYS		0x1e0000000ULL</div><div class='del'>-#define IXP23XX_PCI_MEM_VIRT		0xf0000000</div><div class='del'>-#define IXP23XX_PCI_MEM_SIZE		0x04000000</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/****************************************************************************</div><div class='del'>- * XSI2CPP CSRs.</div><div class='del'>- ****************************************************************************/</div><div class='del'>-#define IXP23XX_XSI2CPP_REG(x)		((volatile unsigned long *)(IXP23XX_XSI2CPP_CSR_VIRT + (x)))</div><div class='del'>-#define IXP23XX_CPP2XSI_CURR_XFER_REG3	IXP23XX_XSI2CPP_REG(0xf8)</div><div class='del'>-#define IXP23XX_CPP2XSI_ADDR_31		(1 &lt;&lt; 19)</div><div class='del'>-#define IXP23XX_CPP2XSI_PSH_OFF		(1 &lt;&lt; 20)</div><div class='del'>-#define IXP23XX_CPP2XSI_COH_OFF		(1 &lt;&lt; 21)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/****************************************************************************</div><div class='del'>- * Expansion Bus Config.</div><div class='del'>- ****************************************************************************/</div><div class='del'>-#define IXP23XX_EXP_CFG_REG(x)		((volatile unsigned long *)(IXP23XX_EXP_CFG_VIRT + (x)))</div><div class='del'>-#define IXP23XX_EXP_CS0			IXP23XX_EXP_CFG_REG(0x00)</div><div class='del'>-#define IXP23XX_EXP_CS1			IXP23XX_EXP_CFG_REG(0x04)</div><div class='del'>-#define IXP23XX_EXP_CS2			IXP23XX_EXP_CFG_REG(0x08)</div><div class='del'>-#define IXP23XX_EXP_CS3			IXP23XX_EXP_CFG_REG(0x0c)</div><div class='del'>-#define IXP23XX_EXP_CS4			IXP23XX_EXP_CFG_REG(0x10)</div><div class='del'>-#define IXP23XX_EXP_CS5			IXP23XX_EXP_CFG_REG(0x14)</div><div class='del'>-#define IXP23XX_EXP_CS6			IXP23XX_EXP_CFG_REG(0x18)</div><div class='del'>-#define IXP23XX_EXP_CS7			IXP23XX_EXP_CFG_REG(0x1c)</div><div class='del'>-#define IXP23XX_FLASH_WRITABLE		(0x2)</div><div class='del'>-#define IXP23XX_FLASH_BUS8		(0x1)</div><div class='del'>-</div><div class='del'>-#define IXP23XX_EXP_CFG0		IXP23XX_EXP_CFG_REG(0x20)</div><div class='del'>-#define IXP23XX_EXP_CFG1		IXP23XX_EXP_CFG_REG(0x24)</div><div class='del'>-#define IXP23XX_EXP_CFG0_MEM_MAP		(1 &lt;&lt; 31)</div><div class='del'>-#define IXP23XX_EXP_CFG0_XSCALE_SPEED_SEL 	(3 &lt;&lt; 22)</div><div class='del'>-#define IXP23XX_EXP_CFG0_XSCALE_SPEED_EN	(1 &lt;&lt; 21)</div><div class='del'>-#define IXP23XX_EXP_CFG0_CPP_SPEED_SEL		(3 &lt;&lt; 19)</div><div class='del'>-#define IXP23XX_EXP_CFG0_CPP_SPEED_EN		(1 &lt;&lt; 18)</div><div class='del'>-#define IXP23XX_EXP_CFG0_PCI_SWIN		(3 &lt;&lt; 16)</div><div class='del'>-#define IXP23XX_EXP_CFG0_PCI_DWIN		(3 &lt;&lt; 14)</div><div class='del'>-#define IXP23XX_EXP_CFG0_PCI33_MODE		(1 &lt;&lt; 13)</div><div class='del'>-#define IXP23XX_EXP_CFG0_QDR_SPEED_SEL		(1 &lt;&lt; 12)</div><div class='del'>-#define IXP23XX_EXP_CFG0_CPP_DIV_SEL		(1 &lt;&lt; 5)</div><div class='del'>-#define IXP23XX_EXP_CFG0_XSI_NOT_PRES		(1 &lt;&lt; 4)</div><div class='del'>-#define IXP23XX_EXP_CFG0_PROM_BOOT		(1 &lt;&lt; 3)</div><div class='del'>-#define IXP23XX_EXP_CFG0_PCI_ARB		(1 &lt;&lt; 2)</div><div class='del'>-#define IXP23XX_EXP_CFG0_PCI_HOST		(1 &lt;&lt; 1)</div><div class='del'>-#define IXP23XX_EXP_CFG0_FLASH_WIDTH		(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define IXP23XX_EXP_UNIT_FUSE		IXP23XX_EXP_CFG_REG(0x28)</div><div class='del'>-#define IXP23XX_EXP_MSF_MUX		IXP23XX_EXP_CFG_REG(0x30)</div><div class='del'>-#define IXP23XX_EXP_CFG_FUSE		IXP23XX_EXP_CFG_REG(0x34)</div><div class='del'>-</div><div class='del'>-#define IXP23XX_EXP_BUS_PHYS		0x90000000</div><div class='del'>-#define IXP23XX_EXP_BUS_WINDOW_SIZE	0x01000000</div><div class='del'>-</div><div class='del'>-#define IXP23XX_EXP_BUS_CS0_BASE	(IXP23XX_EXP_BUS_PHYS + 0x00000000)</div><div class='del'>-#define IXP23XX_EXP_BUS_CS1_BASE	(IXP23XX_EXP_BUS_PHYS + 0x01000000)</div><div class='del'>-#define IXP23XX_EXP_BUS_CS2_BASE	(IXP23XX_EXP_BUS_PHYS + 0x02000000)</div><div class='del'>-#define IXP23XX_EXP_BUS_CS3_BASE	(IXP23XX_EXP_BUS_PHYS + 0x03000000)</div><div class='del'>-#define IXP23XX_EXP_BUS_CS4_BASE	(IXP23XX_EXP_BUS_PHYS + 0x04000000)</div><div class='del'>-#define IXP23XX_EXP_BUS_CS5_BASE	(IXP23XX_EXP_BUS_PHYS + 0x05000000)</div><div class='del'>-#define IXP23XX_EXP_BUS_CS6_BASE	(IXP23XX_EXP_BUS_PHYS + 0x06000000)</div><div class='del'>-#define IXP23XX_EXP_BUS_CS7_BASE	(IXP23XX_EXP_BUS_PHYS + 0x07000000)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/****************************************************************************</div><div class='del'>- * Peripherals.</div><div class='del'>- ****************************************************************************/</div><div class='del'>-#define IXP23XX_UART1_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x0000)</div><div class='del'>-#define IXP23XX_UART2_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x1000)</div><div class='del'>-#define IXP23XX_PMU_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x2000)</div><div class='del'>-#define IXP23XX_INTC_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x3000)</div><div class='del'>-#define IXP23XX_GPIO_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x4000)</div><div class='del'>-#define IXP23XX_TIMER_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x5000)</div><div class='del'>-#define IXP23XX_NPE0_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x6000)</div><div class='del'>-#define IXP23XX_DSR_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x7000)</div><div class='del'>-#define IXP23XX_NPE1_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x8000)</div><div class='del'>-#define IXP23XX_ETH0_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0x9000)</div><div class='del'>-#define IXP23XX_ETH1_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0xA000)</div><div class='del'>-#define IXP23XX_GIG0_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0xB000)</div><div class='del'>-#define IXP23XX_GIG1_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0xC000)</div><div class='del'>-#define IXP23XX_DDRS_VIRT		(IXP23XX_PERIPHERAL_VIRT + 0xD000)</div><div class='del'>-</div><div class='del'>-#define IXP23XX_UART1_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x0000)</div><div class='del'>-#define IXP23XX_UART2_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x1000)</div><div class='del'>-#define IXP23XX_PMU_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x2000)</div><div class='del'>-#define IXP23XX_INTC_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x3000)</div><div class='del'>-#define IXP23XX_GPIO_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x4000)</div><div class='del'>-#define IXP23XX_TIMER_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x5000)</div><div class='del'>-#define IXP23XX_NPE0_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x6000)</div><div class='del'>-#define IXP23XX_DSR_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x7000)</div><div class='del'>-#define IXP23XX_NPE1_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x8000)</div><div class='del'>-#define IXP23XX_ETH0_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0x9000)</div><div class='del'>-#define IXP23XX_ETH1_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0xA000)</div><div class='del'>-#define IXP23XX_GIG0_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0xB000)</div><div class='del'>-#define IXP23XX_GIG1_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0xC000)</div><div class='del'>-#define IXP23XX_DDRS_PHYS		(IXP23XX_PERIPHERAL_PHYS + 0xD000)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/****************************************************************************</div><div class='del'>- * Interrupt controller.</div><div class='del'>- ****************************************************************************/</div><div class='del'>-#define IXP23XX_INTC_REG(x)		 ((volatile unsigned long *)(IXP23XX_INTC_VIRT + (x)))</div><div class='del'>-#define IXP23XX_INTR_ST1		IXP23XX_INTC_REG(0x00)</div><div class='del'>-#define IXP23XX_INTR_ST2		IXP23XX_INTC_REG(0x04)</div><div class='del'>-#define IXP23XX_INTR_ST3		IXP23XX_INTC_REG(0x08)</div><div class='del'>-#define IXP23XX_INTR_ST4		IXP23XX_INTC_REG(0x0c)</div><div class='del'>-#define IXP23XX_INTR_EN1		IXP23XX_INTC_REG(0x10)</div><div class='del'>-#define IXP23XX_INTR_EN2		IXP23XX_INTC_REG(0x14)</div><div class='del'>-#define IXP23XX_INTR_EN3		IXP23XX_INTC_REG(0x18)</div><div class='del'>-#define IXP23XX_INTR_EN4		IXP23XX_INTC_REG(0x1c)</div><div class='del'>-#define IXP23XX_INTR_SEL1		IXP23XX_INTC_REG(0x20)</div><div class='del'>-#define IXP23XX_INTR_SEL2		IXP23XX_INTC_REG(0x24)</div><div class='del'>-#define IXP23XX_INTR_SEL3		IXP23XX_INTC_REG(0x28)</div><div class='del'>-#define IXP23XX_INTR_SEL4		IXP23XX_INTC_REG(0x2c)</div><div class='del'>-#define IXP23XX_INTR_IRQ_ST1		IXP23XX_INTC_REG(0x30)</div><div class='del'>-#define IXP23XX_INTR_IRQ_ST2		IXP23XX_INTC_REG(0x34)</div><div class='del'>-#define IXP23XX_INTR_IRQ_ST3		IXP23XX_INTC_REG(0x38)</div><div class='del'>-#define IXP23XX_INTR_IRQ_ST4		IXP23XX_INTC_REG(0x3c)</div><div class='del'>-#define IXP23XX_INTR_IRQ_ENC_ST_OFFSET	0x54</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/****************************************************************************</div><div class='del'>- * GPIO.</div><div class='del'>- ****************************************************************************/</div><div class='del'>-#define IXP23XX_GPIO_REG(x)		((volatile unsigned long *)(IXP23XX_GPIO_VIRT + (x)))</div><div class='del'>-#define IXP23XX_GPIO_GPOUTR		IXP23XX_GPIO_REG(0x00)</div><div class='del'>-#define IXP23XX_GPIO_GPOER		IXP23XX_GPIO_REG(0x04)</div><div class='del'>-#define IXP23XX_GPIO_GPINR		IXP23XX_GPIO_REG(0x08)</div><div class='del'>-#define IXP23XX_GPIO_GPISR		IXP23XX_GPIO_REG(0x0c)</div><div class='del'>-#define IXP23XX_GPIO_GPIT1R		IXP23XX_GPIO_REG(0x10)</div><div class='del'>-#define IXP23XX_GPIO_GPIT2R		IXP23XX_GPIO_REG(0x14)</div><div class='del'>-#define IXP23XX_GPIO_GPCLKR		IXP23XX_GPIO_REG(0x18)</div><div class='del'>-#define IXP23XX_GPIO_GPDBSELR 		IXP23XX_GPIO_REG(0x1c)</div><div class='del'>-</div><div class='del'>-#define IXP23XX_GPIO_STYLE_MASK		0x7</div><div class='del'>-#define IXP23XX_GPIO_STYLE_ACTIVE_HIGH	0x0</div><div class='del'>-#define IXP23XX_GPIO_STYLE_ACTIVE_LOW	0x1</div><div class='del'>-#define IXP23XX_GPIO_STYLE_RISING_EDGE	0x2</div><div class='del'>-#define IXP23XX_GPIO_STYLE_FALLING_EDGE	0x3</div><div class='del'>-#define IXP23XX_GPIO_STYLE_TRANSITIONAL	0x4</div><div class='del'>-</div><div class='del'>-#define IXP23XX_GPIO_STYLE_SIZE		3</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/****************************************************************************</div><div class='del'>- * Timer.</div><div class='del'>- ****************************************************************************/</div><div class='del'>-#define IXP23XX_TIMER_REG(x)		((volatile unsigned long *)(IXP23XX_TIMER_VIRT + (x)))</div><div class='del'>-#define IXP23XX_TIMER_CONT		IXP23XX_TIMER_REG(0x00)</div><div class='del'>-#define IXP23XX_TIMER1_TIMESTAMP	IXP23XX_TIMER_REG(0x04)</div><div class='del'>-#define IXP23XX_TIMER1_RELOAD		IXP23XX_TIMER_REG(0x08)</div><div class='del'>-#define IXP23XX_TIMER2_TIMESTAMP	IXP23XX_TIMER_REG(0x0c)</div><div class='del'>-#define IXP23XX_TIMER2_RELOAD		IXP23XX_TIMER_REG(0x10)</div><div class='del'>-#define IXP23XX_TIMER_WDOG		IXP23XX_TIMER_REG(0x14)</div><div class='del'>-#define IXP23XX_TIMER_WDOG_EN		IXP23XX_TIMER_REG(0x18)</div><div class='del'>-#define IXP23XX_TIMER_WDOG_KEY		IXP23XX_TIMER_REG(0x1c)</div><div class='del'>-#define IXP23XX_TIMER_WDOG_KEY_MAGIC	0x482e</div><div class='del'>-#define IXP23XX_TIMER_STATUS		IXP23XX_TIMER_REG(0x20)</div><div class='del'>-#define IXP23XX_TIMER_SOFT_RESET	IXP23XX_TIMER_REG(0x24)</div><div class='del'>-#define IXP23XX_TIMER_SOFT_RESET_EN	IXP23XX_TIMER_REG(0x28)</div><div class='del'>-</div><div class='del'>-#define IXP23XX_TIMER_ENABLE		(1 &lt;&lt; 0)</div><div class='del'>-#define IXP23XX_TIMER_ONE_SHOT		(1 &lt;&lt; 1)</div><div class='del'>-/* Low order bits of reload value ignored */</div><div class='del'>-#define IXP23XX_TIMER_RELOAD_MASK	(0x3)</div><div class='del'>-#define IXP23XX_TIMER_DISABLED		(0x0)</div><div class='del'>-#define IXP23XX_TIMER1_INT_PEND		(1 &lt;&lt; 0)</div><div class='del'>-#define IXP23XX_TIMER2_INT_PEND		(1 &lt;&lt; 1)</div><div class='del'>-#define IXP23XX_TIMER_STATUS_TS_PEND	(1 &lt;&lt; 2)</div><div class='del'>-#define IXP23XX_TIMER_STATUS_WDOG_PEND	(1 &lt;&lt; 3)</div><div class='del'>-#define IXP23XX_TIMER_STATUS_WARM_RESET	(1 &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/****************************************************************************</div><div class='del'>- * CAP CSRs.</div><div class='del'>- ****************************************************************************/</div><div class='del'>-#define IXP23XX_GLOBAL_REG(x)		((volatile unsigned long *)(IXP23XX_CAP_CSR_VIRT + 0x4a00 + (x)))</div><div class='del'>-#define IXP23XX_PRODUCT_ID		IXP23XX_GLOBAL_REG(0x00)</div><div class='del'>-#define IXP23XX_MISC_CONTROL		IXP23XX_GLOBAL_REG(0x04)</div><div class='del'>-#define IXP23XX_MSF_CLK_CNTRL		IXP23XX_GLOBAL_REG(0x08)</div><div class='del'>-#define IXP23XX_RESET0			IXP23XX_GLOBAL_REG(0x0c)</div><div class='del'>-#define IXP23XX_RESET1			IXP23XX_GLOBAL_REG(0x10)</div><div class='del'>-#define IXP23XX_STRAP_OPTIONS		IXP23XX_GLOBAL_REG(0x18)</div><div class='del'>-</div><div class='del'>-#define IXP23XX_ENABLE_WATCHDOG		(1 &lt;&lt; 24)</div><div class='del'>-#define IXP23XX_SHPC_INIT_COMP		(1 &lt;&lt; 21)</div><div class='del'>-#define IXP23XX_RST_ALL			(1 &lt;&lt; 16)</div><div class='del'>-#define IXP23XX_RESET_PCI		(1 &lt;&lt; 2)</div><div class='del'>-#define IXP23XX_PCI_UNIT_RESET		(1 &lt;&lt; 1)</div><div class='del'>-#define IXP23XX_XSCALE_RESET		(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define IXP23XX_UENGINE_CSR_VIRT_BASE	(IXP23XX_CAP_CSR_VIRT + 0x18000)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/****************************************************************************</div><div class='del'>- * PCI CSRs.</div><div class='del'>- ****************************************************************************/</div><div class='del'>-#define IXP23XX_PCI_CREG(x)		((volatile unsigned long *)(IXP23XX_PCI_CREG_VIRT + (x)))</div><div class='del'>-#define IXP23XX_PCI_CMDSTAT		IXP23XX_PCI_CREG(0x04)</div><div class='del'>-#define IXP23XX_PCI_SRAM_BAR		IXP23XX_PCI_CREG(0x14)</div><div class='del'>-#define IXP23XX_PCI_SDRAM_BAR		IXP23XX_PCI_CREG(0x18)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define IXP23XX_PCI_CSR(x)		((volatile unsigned long *)(IXP23XX_PCI_CREG_VIRT + 0x01000000 + (x)))</div><div class='del'>-#define IXP23XX_PCI_OUT_INT_STATUS	IXP23XX_PCI_CSR(0x0030)</div><div class='del'>-#define IXP23XX_PCI_OUT_INT_MASK	IXP23XX_PCI_CSR(0x0034)</div><div class='del'>-#define IXP23XX_PCI_SRAM_BASE_ADDR_MASK IXP23XX_PCI_CSR(0x00fc)</div><div class='del'>-#define IXP23XX_PCI_DRAM_BASE_ADDR_MASK IXP23XX_PCI_CSR(0x0100)</div><div class='del'>-#define IXP23XX_PCI_CONTROL		IXP23XX_PCI_CSR(0x013c)</div><div class='del'>-#define IXP23XX_PCI_ADDR_EXT		IXP23XX_PCI_CSR(0x0140)</div><div class='del'>-#define IXP23XX_PCI_ME_PUSH_STATUS	IXP23XX_PCI_CSR(0x0148)</div><div class='del'>-#define IXP23XX_PCI_ME_PUSH_EN		IXP23XX_PCI_CSR(0x014c)</div><div class='del'>-#define IXP23XX_PCI_ERR_STATUS		IXP23XX_PCI_CSR(0x0150)</div><div class='del'>-#define IXP23XX_PCI_ERROR_STATUS	IXP23XX_PCI_CSR(0x0150)</div><div class='del'>-#define IXP23XX_PCI_ERR_ENABLE		IXP23XX_PCI_CSR(0x0154)</div><div class='del'>-#define IXP23XX_PCI_XSCALE_INT_STATUS	IXP23XX_PCI_CSR(0x0158)</div><div class='del'>-#define IXP23XX_PCI_XSCALE_INT_ENABLE	IXP23XX_PCI_CSR(0x015c)</div><div class='del'>-#define IXP23XX_PCI_CPP_ADDR_BITS	IXP23XX_PCI_CSR(0x0160)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/include/mach/memory.h b/arch/arm/mach-ixp23xx/include/mach/memory.h<br/>deleted file mode 100644<br/>index 6cf0704e946a..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/include/mach/memory.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/include/mach/memory.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,34 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/include/mach/memory.h</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2003-2004 Intel Corp.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the</div><div class='del'>- * Free Software Foundation; either version 2 of the License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_MEMORY_H</div><div class='del'>-#define __ASM_ARCH_MEMORY_H</div><div class='del'>-</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Physical DRAM offset.</div><div class='del'>- */</div><div class='del'>-#define PLAT_PHYS_OFFSET		(0x00000000)</div><div class='del'>-</div><div class='del'>-#define IXP23XX_PCI_SDRAM_OFFSET (*((volatile int *)IXP23XX_PCI_SDRAM_BAR) &amp; 0xfffffff0)</div><div class='del'>-</div><div class='del'>-#define __phys_to_bus(x)	((x) + (IXP23XX_PCI_SDRAM_OFFSET - PHYS_OFFSET))</div><div class='del'>-#define __bus_to_phys(x)	((x) - (IXP23XX_PCI_SDRAM_OFFSET - PHYS_OFFSET))</div><div class='del'>-</div><div class='del'>-#define __virt_to_bus(v)	__phys_to_bus(__virt_to_phys(v))</div><div class='del'>-#define __bus_to_virt(b)	__phys_to_virt(__bus_to_phys(b))</div><div class='del'>-#define __pfn_to_bus(p)		__phys_to_bus(__pfn_to_phys(p))</div><div class='del'>-#define __bus_to_pfn(b)		__phys_to_pfn(__bus_to_phys(b))</div><div class='del'>-</div><div class='del'>-#define arch_is_coherent()	1</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/include/mach/platform.h b/arch/arm/mach-ixp23xx/include/mach/platform.h<br/>deleted file mode 100644<br/>index 50de558e722e..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/include/mach/platform.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/include/mach/platform.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,58 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/include/mach/platform.h</div><div class='del'>- *</div><div class='del'>- * Various bits of code used by platform-level code.</div><div class='del'>- *</div><div class='del'>- * Author: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright 2005 (c) MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-static inline unsigned long ixp2000_reg_read(volatile void *reg)</div><div class='del'>-{</div><div class='del'>-	return *((volatile unsigned long *)reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void ixp2000_reg_write(volatile void *reg, unsigned long val)</div><div class='del'>-{</div><div class='del'>-	*((volatile unsigned long *)reg) = val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val)</div><div class='del'>-{</div><div class='del'>-	*((volatile unsigned long *)reg) = val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct pci_sys_data;</div><div class='del'>-</div><div class='del'>-void ixp23xx_map_io(void);</div><div class='del'>-void ixp23xx_init_irq(void);</div><div class='del'>-void ixp23xx_sys_init(void);</div><div class='del'>-void ixp23xx_restart(char, const char *);</div><div class='del'>-int ixp23xx_pci_setup(int, struct pci_sys_data *);</div><div class='del'>-void ixp23xx_pci_preinit(void);</div><div class='del'>-struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*);</div><div class='del'>-void ixp23xx_pci_slave_init(void);</div><div class='del'>-</div><div class='del'>-extern struct sys_timer ixp23xx_timer;</div><div class='del'>-</div><div class='del'>-#define IXP23XX_UART_XTAL		14745600</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-/*</div><div class='del'>- * Is system memory on the XSI or CPP bus?</div><div class='del'>- */</div><div class='del'>-static inline unsigned ixp23xx_cpp_boot(void)</div><div class='del'>-{</div><div class='del'>-	return (*IXP23XX_EXP_CFG0 &amp; IXP23XX_EXP_CFG0_XSI_NOT_PRES);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/include/mach/time.h b/arch/arm/mach-ixp23xx/include/mach/time.h<br/>deleted file mode 100644<br/>index b61dafc884ac..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/include/mach/time.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/include/mach/time.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,3 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/include/mach/time.h</div><div class='del'>- */</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/include/mach/timex.h b/arch/arm/mach-ixp23xx/include/mach/timex.h<br/>deleted file mode 100644<br/>index e341e9cf9c37..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/include/mach/timex.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/include/mach/timex.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,7 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/include/mach/timex.h</div><div class='del'>- *</div><div class='del'>- * XScale architecture timex specifications</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define CLOCK_TICK_RATE 75000000</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/include/mach/uncompress.h b/arch/arm/mach-ixp23xx/include/mach/uncompress.h<br/>deleted file mode 100644<br/>index 8b4c358d2c04..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/include/mach/uncompress.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/include/mach/uncompress.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,40 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/include/mach/uncompress.h</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002-2004 Intel Corporation.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_UNCOMPRESS_H</div><div class='del'>-#define __ASM_ARCH_UNCOMPRESS_H</div><div class='del'>-</div><div class='del'>-#include &lt;mach/ixp23xx.h&gt;</div><div class='del'>-#include &lt;linux/serial_reg.h&gt;</div><div class='del'>-</div><div class='del'>-#define UART_BASE	((volatile u32 *)IXP23XX_UART1_PHYS)</div><div class='del'>-</div><div class='del'>-static inline void putc(char c)</div><div class='del'>-{</div><div class='del'>-	int j;</div><div class='del'>-</div><div class='del'>-	for (j = 0; j &lt; 0x1000; j++) {</div><div class='del'>-		if (UART_BASE[UART_LSR] &amp; UART_LSR_THRE)</div><div class='del'>-			break;</div><div class='del'>-		barrier();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	UART_BASE[UART_TX] = c;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void flush(void)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define arch_decomp_setup()</div><div class='del'>-#define arch_decomp_wdog()</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c<br/>deleted file mode 100644<br/>index b0e07db5ceaf..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/ixdp2351.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/ixdp2351.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,347 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/ixdp2351.c</div><div class='del'>- *</div><div class='del'>- * IXDP2351 board-specific routines</div><div class='del'>- *</div><div class='del'>- * Author: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright 2005 (c) MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * Based on 2.4 code Copyright 2004 (c) Intel Corporation</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/serial.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/serial_8250.h&gt;</div><div class='del'>-#include &lt;linux/serial_core.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/mtd/physmap.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/types.h&gt;</div><div class='del'>-#include &lt;asm/setup.h&gt;</div><div class='del'>-#include &lt;asm/memory.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/mach/irq.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach/pci.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXDP2351 Interrupt Handling</div><div class='del'>- */</div><div class='del'>-static void ixdp2351_inta_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	*IXDP2351_CPLD_INTA_MASK_SET_REG = IXDP2351_INTA_IRQ_MASK(d-&gt;irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixdp2351_inta_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	*IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(d-&gt;irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc)</div><div class='del'>-{</div><div class='del'>-	u16 ex_interrupt =</div><div class='del'>-		*IXDP2351_CPLD_INTA_STAT_REG &amp; IXDP2351_INTA_IRQ_VALID;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	desc-&gt;irq_data.chip-&gt;irq_mask(&amp;desc-&gt;irq_data);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; IXDP2351_INTA_IRQ_NUM; i++) {</div><div class='del'>-		if (ex_interrupt &amp; (1 &lt;&lt; i)) {</div><div class='del'>-			int cpld_irq =</div><div class='del'>-				IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i);</div><div class='del'>-			generic_handle_irq(cpld_irq);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	desc-&gt;irq_data.chip-&gt;irq_unmask(&amp;desc-&gt;irq_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip ixdp2351_inta_chip = {</div><div class='del'>-	.irq_ack	= ixdp2351_inta_mask,</div><div class='del'>-	.irq_mask	= ixdp2351_inta_mask,</div><div class='del'>-	.irq_unmask	= ixdp2351_inta_unmask</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void ixdp2351_intb_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	*IXDP2351_CPLD_INTB_MASK_SET_REG = IXDP2351_INTB_IRQ_MASK(d-&gt;irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixdp2351_intb_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	*IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(d-&gt;irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc)</div><div class='del'>-{</div><div class='del'>-	u16 ex_interrupt =</div><div class='del'>-		*IXDP2351_CPLD_INTB_STAT_REG &amp; IXDP2351_INTB_IRQ_VALID;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	desc-&gt;irq_data.chip-&gt;irq_ack(&amp;desc-&gt;irq_data);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; IXDP2351_INTB_IRQ_NUM; i++) {</div><div class='del'>-		if (ex_interrupt &amp; (1 &lt;&lt; i)) {</div><div class='del'>-			int cpld_irq =</div><div class='del'>-				IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i);</div><div class='del'>-			generic_handle_irq(cpld_irq);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	desc-&gt;irq_data.chip-&gt;irq_unmask(&amp;desc-&gt;irq_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip ixdp2351_intb_chip = {</div><div class='del'>-	.irq_ack	= ixdp2351_intb_mask,</div><div class='del'>-	.irq_mask	= ixdp2351_intb_mask,</div><div class='del'>-	.irq_unmask	= ixdp2351_intb_unmask</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ixdp2351_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	/* Mask all interrupts from CPLD, disable simulation */</div><div class='del'>-	*IXDP2351_CPLD_INTA_MASK_SET_REG = (u16) -1;</div><div class='del'>-	*IXDP2351_CPLD_INTB_MASK_SET_REG = (u16) -1;</div><div class='del'>-	*IXDP2351_CPLD_INTA_SIM_REG = 0;</div><div class='del'>-	*IXDP2351_CPLD_INTB_SIM_REG = 0;</div><div class='del'>-</div><div class='del'>-	ixp23xx_init_irq();</div><div class='del'>-</div><div class='del'>-	for (irq = IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE);</div><div class='del'>-	     irq &lt;</div><div class='del'>-	     IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + IXDP2351_INTA_IRQ_NUM);</div><div class='del'>-	     irq++) {</div><div class='del'>-		if (IXDP2351_INTA_IRQ_MASK(irq) &amp; IXDP2351_INTA_IRQ_VALID) {</div><div class='del'>-			set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-			irq_set_chip_and_handler(irq, &amp;ixdp2351_inta_chip,</div><div class='del'>-						 handle_level_irq);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (irq = IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE);</div><div class='del'>-	     irq &lt;</div><div class='del'>-	     IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + IXDP2351_INTB_IRQ_NUM);</div><div class='del'>-	     irq++) {</div><div class='del'>-		if (IXDP2351_INTB_IRQ_MASK(irq) &amp; IXDP2351_INTB_IRQ_VALID) {</div><div class='del'>-			set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-			irq_set_chip_and_handler(irq, &amp;ixdp2351_intb_chip,</div><div class='del'>-						 handle_level_irq);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	irq_set_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler);</div><div class='del'>-	irq_set_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXDP2351 PCI</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This board does not do normal PCI IRQ routing, or any</div><div class='del'>- * sort of swizzling, so we just need to check where on the</div><div class='del'>- * bus the device is and figure out what CPLD pin it is</div><div class='del'>- * being routed to.</div><div class='del'>- */</div><div class='del'>-#define DEVPIN(dev, pin) ((pin) | ((dev) &lt;&lt; 3))</div><div class='del'>-</div><div class='del'>-static int __init ixdp2351_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='del'>-{</div><div class='del'>-	u8 bus = dev-&gt;bus-&gt;number;</div><div class='del'>-	u32 devpin = DEVPIN(PCI_SLOT(dev-&gt;devfn), pin);</div><div class='del'>-	struct pci_bus *tmp_bus = dev-&gt;bus;</div><div class='del'>-</div><div class='del'>-	/* Primary bus, no interrupts here */</div><div class='del'>-	if (!bus)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	/* Lookup first leaf in bus tree */</div><div class='del'>-	while ((tmp_bus-&gt;parent != NULL) &amp;&amp; (tmp_bus-&gt;parent-&gt;parent != NULL))</div><div class='del'>-		tmp_bus = tmp_bus-&gt;parent;</div><div class='del'>-</div><div class='del'>-	/* Select between known bridges */</div><div class='del'>-	switch (tmp_bus-&gt;self-&gt;devfn | (tmp_bus-&gt;self-&gt;bus-&gt;number &lt;&lt; 8)) {</div><div class='del'>-		/* Device is located after first bridge */</div><div class='del'>-	case 0x0008:</div><div class='del'>-		if (tmp_bus == dev-&gt;bus) {</div><div class='del'>-			/* Device is located directy after first bridge */</div><div class='del'>-			switch (devpin) {</div><div class='del'>-				/* Onboard 82546 */</div><div class='del'>-			case DEVPIN(1, 1):	/* Onboard 82546 ch 0 */</div><div class='del'>-				return IRQ_IXDP2351_INTA_82546;</div><div class='del'>-			case DEVPIN(1, 2):	/* Onboard 82546 ch 1 */</div><div class='del'>-				return IRQ_IXDP2351_INTB_82546;</div><div class='del'>-				/* PMC SLOT */</div><div class='del'>-			case DEVPIN(0, 1):	/* PMCP INTA# */</div><div class='del'>-			case DEVPIN(2, 4):	/* PMCS INTD# */</div><div class='del'>-				return IRQ_IXDP2351_SPCI_PMC_INTA;</div><div class='del'>-			case DEVPIN(0, 2):	/* PMCP INTB# */</div><div class='del'>-			case DEVPIN(2, 1):	/* PMCS INTA# */</div><div class='del'>-				return IRQ_IXDP2351_SPCI_PMC_INTB;</div><div class='del'>-			case DEVPIN(0, 3):	/* PMCP INTC# */</div><div class='del'>-			case DEVPIN(2, 2):	/* PMCS INTB# */</div><div class='del'>-				return IRQ_IXDP2351_SPCI_PMC_INTC;</div><div class='del'>-			case DEVPIN(0, 4):	/* PMCP INTD# */</div><div class='del'>-			case DEVPIN(2, 3):	/* PMCS INTC# */</div><div class='del'>-				return IRQ_IXDP2351_SPCI_PMC_INTD;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			/* Device is located indirectly after first bridge */</div><div class='del'>-			/* Not supported now */</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 0x0010:</div><div class='del'>-		if (tmp_bus == dev-&gt;bus) {</div><div class='del'>-			/* Device is located directy after second bridge */</div><div class='del'>-			/* Secondary bus of second bridge */</div><div class='del'>-			switch (devpin) {</div><div class='del'>-			case DEVPIN(0, 1):	/* DB#0 */</div><div class='del'>-			case DEVPIN(0, 2):</div><div class='del'>-			case DEVPIN(0, 3):</div><div class='del'>-			case DEVPIN(0, 4):</div><div class='del'>-				return IRQ_IXDP2351_SPCI_DB_0;</div><div class='del'>-			case DEVPIN(1, 1):	/* DB#1 */</div><div class='del'>-			case DEVPIN(1, 2):</div><div class='del'>-			case DEVPIN(1, 3):</div><div class='del'>-			case DEVPIN(1, 4):</div><div class='del'>-				return IRQ_IXDP2351_SPCI_DB_1;</div><div class='del'>-			case DEVPIN(2, 1):	/* FIC1 */</div><div class='del'>-			case DEVPIN(2, 2):</div><div class='del'>-			case DEVPIN(2, 3):</div><div class='del'>-			case DEVPIN(2, 4):</div><div class='del'>-			case DEVPIN(3, 1):	/* FIC2 */</div><div class='del'>-			case DEVPIN(3, 2):</div><div class='del'>-			case DEVPIN(3, 3):</div><div class='del'>-			case DEVPIN(3, 4):</div><div class='del'>-				return IRQ_IXDP2351_SPCI_FIC;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			/* Device is located indirectly after second bridge */</div><div class='del'>-			/* Not supported now */</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct hw_pci ixdp2351_pci __initdata = {</div><div class='del'>-	.nr_controllers	= 1,</div><div class='del'>-	.preinit	= ixp23xx_pci_preinit,</div><div class='del'>-	.setup		= ixp23xx_pci_setup,</div><div class='del'>-	.scan		= ixp23xx_pci_scan_bus,</div><div class='del'>-	.map_irq	= ixdp2351_map_irq,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int __init ixdp2351_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	if (machine_is_ixdp2351())</div><div class='del'>-		pci_common_init(&amp;ixdp2351_pci);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-subsys_initcall(ixdp2351_pci_init);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXDP2351 Static Mapped I/O</div><div class='del'>- */</div><div class='del'>-static struct map_desc ixdp2351_io_desc[] __initdata = {</div><div class='del'>-	{</div><div class='del'>-		.virtual	= IXDP2351_NP_VIRT_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn((u64)IXDP2351_NP_PHYS_BASE),</div><div class='del'>-		.length		= IXDP2351_NP_PHYS_SIZE,</div><div class='del'>-		.type		= MT_DEVICE</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= IXDP2351_BB_BASE_VIRT,</div><div class='del'>-		.pfn		= __phys_to_pfn((u64)IXDP2351_BB_BASE_PHYS),</div><div class='del'>-		.length		= IXDP2351_BB_SIZE,</div><div class='del'>-		.type		= MT_DEVICE</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init ixdp2351_map_io(void)</div><div class='del'>-{</div><div class='del'>-	ixp23xx_map_io();</div><div class='del'>-	iotable_init(ixdp2351_io_desc, ARRAY_SIZE(ixdp2351_io_desc));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct physmap_flash_data ixdp2351_flash_data = {</div><div class='del'>-	.width		= 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ixdp2351_flash_resource = {</div><div class='del'>-	.start		= 0x90000000,</div><div class='del'>-	.end		= 0x93ffffff,</div><div class='del'>-	.flags		= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device ixdp2351_flash = {</div><div class='del'>-	.name		= "physmap-flash",</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data	= &amp;ixdp2351_flash_data,</div><div class='del'>-	},</div><div class='del'>-	.num_resources	= 1,</div><div class='del'>-	.resource	= &amp;ixdp2351_flash_resource,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init ixdp2351_init(void)</div><div class='del'>-{</div><div class='del'>-	platform_device_register(&amp;ixdp2351_flash);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Mark flash as writeable</div><div class='del'>-	 */</div><div class='del'>-	IXP23XX_EXP_CS0[0] |= IXP23XX_FLASH_WRITABLE;</div><div class='del'>-	IXP23XX_EXP_CS0[1] |= IXP23XX_FLASH_WRITABLE;</div><div class='del'>-	IXP23XX_EXP_CS0[2] |= IXP23XX_FLASH_WRITABLE;</div><div class='del'>-	IXP23XX_EXP_CS0[3] |= IXP23XX_FLASH_WRITABLE;</div><div class='del'>-</div><div class='del'>-	ixp23xx_sys_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixdp2351_restart(char mode, const char *cmd)</div><div class='del'>-{</div><div class='del'>-	/* First try machine specific support */</div><div class='del'>-</div><div class='del'>-	*IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC;</div><div class='del'>-	(void) *IXDP2351_CPLD_RESET1_REG;</div><div class='del'>-	*IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE;</div><div class='del'>-</div><div class='del'>-	ixp23xx_restart(mode, cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform")</div><div class='del'>-	/* Maintainer: MontaVista Software, Inc. */</div><div class='del'>-	.map_io		= ixdp2351_map_io,</div><div class='del'>-	.init_irq	= ixdp2351_init_irq,</div><div class='del'>-	.timer		= &amp;ixp23xx_timer,</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.init_machine	= ixdp2351_init,</div><div class='del'>-	.restart	= ixdp2351_restart,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c<br/>deleted file mode 100644<br/>index 911f5a58e006..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/pci.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,294 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/pci.c</div><div class='del'>- *</div><div class='del'>- * PCI routines for IXP23XX based systems</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2005 MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * based on original code:</div><div class='del'>- *</div><div class='del'>- * Author: Naeem Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- * Copyright 2002-2005 Intel Corp.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the</div><div class='del'>- * Free Software Foundation; either version 2 of the License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/sizes.h&gt;</div><div class='del'>-#include &lt;asm/mach/pci.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-extern int (*external_fault) (unsigned long, struct pt_regs *);</div><div class='del'>-</div><div class='del'>-static volatile int pci_master_aborts = 0;</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-#define DBG(x...)	printk(x)</div><div class='del'>-#else</div><div class='del'>-#define DBG(x...)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-int clear_master_aborts(void);</div><div class='del'>-</div><div class='del'>-static u32</div><div class='del'>-*ixp23xx_pci_config_addr(unsigned int bus_nr, unsigned int devfn, int where)</div><div class='del'>-{</div><div class='del'>-	u32 *paddress;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Must be dword aligned</div><div class='del'>-	 */</div><div class='del'>-	where &amp;= ~3;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * For top bus, generate type 0, else type 1</div><div class='del'>-	 */</div><div class='del'>-	if (!bus_nr) {</div><div class='del'>-		if (PCI_SLOT(devfn) &gt;= 8)</div><div class='del'>-			return 0;</div><div class='del'>-</div><div class='del'>-		paddress = (u32 *) (IXP23XX_PCI_CFG0_VIRT</div><div class='del'>-				    | (1 &lt;&lt; (PCI_SLOT(devfn) + 16))</div><div class='del'>-				    | (PCI_FUNC(devfn) &lt;&lt; 8) | where);</div><div class='del'>-	} else {</div><div class='del'>-		paddress = (u32 *) (IXP23XX_PCI_CFG1_VIRT</div><div class='del'>-				    | (bus_nr &lt;&lt; 16)</div><div class='del'>-				    | (PCI_SLOT(devfn) &lt;&lt; 11)</div><div class='del'>-				    | (PCI_FUNC(devfn) &lt;&lt; 8) | where);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return paddress;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Mask table, bits to mask for quantity of size 1, 2 or 4 bytes.</div><div class='del'>- * 0 and 3 are not valid indexes...</div><div class='del'>- */</div><div class='del'>-static u32 bytemask[] = {</div><div class='del'>-	/*0*/	0,</div><div class='del'>-	/*1*/	0xff,</div><div class='del'>-	/*2*/	0xffff,</div><div class='del'>-	/*3*/	0,</div><div class='del'>-	/*4*/	0xffffffff,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int ixp23xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,</div><div class='del'>-				int where, int size, u32 *value)</div><div class='del'>-{</div><div class='del'>-	u32 n;</div><div class='del'>-	u32 *addr;</div><div class='del'>-</div><div class='del'>-	n = where % 4;</div><div class='del'>-</div><div class='del'>-	DBG("In config_read(%d) %d from dev %d:%d:%d\n", size, where,</div><div class='del'>-		bus-&gt;number, PCI_SLOT(devfn), PCI_FUNC(devfn));</div><div class='del'>-</div><div class='del'>-	addr = ixp23xx_pci_config_addr(bus-&gt;number, devfn, where);</div><div class='del'>-	if (!addr)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	pci_master_aborts = 0;</div><div class='del'>-	*value = (*addr &gt;&gt; (8*n)) &amp; bytemask[size];</div><div class='del'>-	if (pci_master_aborts) {</div><div class='del'>-			pci_master_aborts = 0;</div><div class='del'>-			*value = 0xffffffff;</div><div class='del'>-			return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We don't do error checking on the address for writes.</div><div class='del'>- * It's assumed that the user checked for the device existing first</div><div class='del'>- * by doing a read first.</div><div class='del'>- */</div><div class='del'>-static int ixp23xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,</div><div class='del'>-					int where, int size, u32 value)</div><div class='del'>-{</div><div class='del'>-	u32 mask;</div><div class='del'>-	u32 *addr;</div><div class='del'>-	u32 temp;</div><div class='del'>-</div><div class='del'>-	mask = ~(bytemask[size] &lt;&lt; ((where % 0x4) * 8));</div><div class='del'>-	addr = ixp23xx_pci_config_addr(bus-&gt;number, devfn, where);</div><div class='del'>-	if (!addr)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-	temp = (u32) (value) &lt;&lt; ((where % 0x4) * 8);</div><div class='del'>-	*addr = (*addr &amp; mask) | temp;</div><div class='del'>-</div><div class='del'>-	clear_master_aborts();</div><div class='del'>-</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct pci_ops ixp23xx_pci_ops = {</div><div class='del'>-	.read	= ixp23xx_pci_read_config,</div><div class='del'>-	.write	= ixp23xx_pci_write_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pci_bus *ixp23xx_pci_scan_bus(int nr, struct pci_sys_data *sysdata)</div><div class='del'>-{</div><div class='del'>-	return pci_scan_root_bus(NULL, sysdata-&gt;busnr, &amp;ixp23xx_pci_ops,</div><div class='del'>-				 sysdata, &amp;sysdata-&gt;resources);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int ixp23xx_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	volatile unsigned long temp;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	pci_master_aborts = 1;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	temp = *IXP23XX_PCI_CONTROL;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * master abort and cmd tgt err</div><div class='del'>-	 */</div><div class='del'>-	if (temp &amp; ((1 &lt;&lt; 8) | (1 &lt;&lt; 5)))</div><div class='del'>-		*IXP23XX_PCI_CONTROL = temp;</div><div class='del'>-</div><div class='del'>-	temp = *IXP23XX_PCI_CMDSTAT;</div><div class='del'>-</div><div class='del'>-	if (temp &amp; (1 &lt;&lt; 29))</div><div class='del'>-		*IXP23XX_PCI_CMDSTAT = temp;</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If it was an imprecise abort, then we need to correct the</div><div class='del'>-	 * return address to be _after_ the instruction.</div><div class='del'>-	 */</div><div class='del'>-	if (fsr &amp; (1 &lt;&lt; 10))</div><div class='del'>-		regs-&gt;ARM_pc += 4;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int clear_master_aborts(void)</div><div class='del'>-{</div><div class='del'>-	volatile u32 temp;</div><div class='del'>-</div><div class='del'>-	temp = *IXP23XX_PCI_CONTROL;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * master abort and cmd tgt err</div><div class='del'>-	 */</div><div class='del'>-	if (temp &amp; ((1 &lt;&lt; 8) | (1 &lt;&lt; 5)))</div><div class='del'>-		*IXP23XX_PCI_CONTROL = temp;</div><div class='del'>-</div><div class='del'>-	temp = *IXP23XX_PCI_CMDSTAT;</div><div class='del'>-</div><div class='del'>-	if (temp &amp; (1 &lt;&lt; 29))</div><div class='del'>-		*IXP23XX_PCI_CMDSTAT = temp;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init ixp23xx_pci_common_init(void)</div><div class='del'>-{</div><div class='del'>-#ifdef __ARMEB__</div><div class='del'>-	*IXP23XX_PCI_CONTROL |= 0x20000;	/* set I/O swapping */</div><div class='del'>-#endif</div><div class='del'>-	/*</div><div class='del'>-	 * ADDR_31 needs to be clear for PCI memory access to CPP memory</div><div class='del'>-	 */</div><div class='del'>-	*IXP23XX_CPP2XSI_CURR_XFER_REG3 &amp;= ~IXP23XX_CPP2XSI_ADDR_31;</div><div class='del'>-	*IXP23XX_CPP2XSI_CURR_XFER_REG3 |= IXP23XX_CPP2XSI_PSH_OFF;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Select correct memory for PCI inbound transactions</div><div class='del'>-	 */</div><div class='del'>-	if (ixp23xx_cpp_boot()) {</div><div class='del'>-		*IXP23XX_PCI_CPP_ADDR_BITS &amp;= ~(1 &lt;&lt; 1);</div><div class='del'>-	} else {</div><div class='del'>-		*IXP23XX_PCI_CPP_ADDR_BITS |= (1 &lt;&lt; 1);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Enable coherency on A2 silicon.</div><div class='del'>-		 */</div><div class='del'>-		if (arch_is_coherent())</div><div class='del'>-			*IXP23XX_CPP2XSI_CURR_XFER_REG3 &amp;= ~IXP23XX_CPP2XSI_COH_OFF;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init ixp23xx_pci_preinit(void)</div><div class='del'>-{</div><div class='del'>-	pcibios_min_io = 0;</div><div class='del'>-	pcibios_min_mem = 0xe0000000;</div><div class='del'>-</div><div class='del'>-	pci_set_flags(0);</div><div class='del'>-</div><div class='del'>-	ixp23xx_pci_common_init();</div><div class='del'>-</div><div class='del'>-	hook_fault_code(16+6, ixp23xx_pci_abort_handler, SIGBUS, 0,</div><div class='del'>-			"PCI config cycle to non-existent device");</div><div class='del'>-</div><div class='del'>-	*IXP23XX_PCI_ADDR_EXT = 0x0000e000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Prevent PCI layer from seeing the inbound host-bridge resources</div><div class='del'>- */</div><div class='del'>-static void __devinit pci_fixup_ixp23xx(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	dev-&gt;class &amp;= 0xff;</div><div class='del'>-	dev-&gt;class |= PCI_CLASS_BRIDGE_HOST &lt;&lt; 8;</div><div class='del'>-	for (i = 0; i &lt; PCI_NUM_RESOURCES; i++) {</div><div class='del'>-		dev-&gt;resource[i].start = 0;</div><div class='del'>-		dev-&gt;resource[i].end   = 0;</div><div class='del'>-		dev-&gt;resource[i].flags = 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9002, pci_fixup_ixp23xx);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IXP2300 systems often have large resource requirements, so we just</div><div class='del'>- * use our own resource space.</div><div class='del'>- */</div><div class='del'>-static struct resource ixp23xx_pci_mem_space = {</div><div class='del'>-	.start	= IXP23XX_PCI_MEM_START,</div><div class='del'>-	.end	= IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE - 1,</div><div class='del'>-	.flags	= IORESOURCE_MEM,</div><div class='del'>-	.name	= "PCI Mem Space"</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ixp23xx_pci_io_space = {</div><div class='del'>-	.start	= 0x00000100,</div><div class='del'>-	.end	= 0x01ffffff,</div><div class='del'>-	.flags	= IORESOURCE_IO,</div><div class='del'>-	.name	= "PCI I/O Space"</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int ixp23xx_pci_setup(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	if (nr &gt;= 1)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	pci_add_resource_offset(&amp;sys-&gt;resources,</div><div class='del'>-				&amp;ixp23xx_pci_io_space, sys-&gt;io_offset);</div><div class='del'>-	pci_add_resource_offset(&amp;sys-&gt;resources,</div><div class='del'>-				&amp;ixp23xx_pci_mem_space, sys-&gt;mem_offset);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init ixp23xx_pci_slave_init(void)</div><div class='del'>-{</div><div class='del'>-	ixp23xx_pci_common_init();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c<br/>deleted file mode 100644<br/>index eaaa3fa9fd05..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp23xx/roadrunner.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp23xx/roadrunner.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,180 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp23xx/roadrunner.c</div><div class='del'>- *</div><div class='del'>- * RoadRunner board-specific routines</div><div class='del'>- *</div><div class='del'>- * Author: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright 2005 (c) MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * Based on 2.4 code Copyright 2005 (c) ADI Engineering Corporation</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/serial.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/serial_8250.h&gt;</div><div class='del'>-#include &lt;linux/serial_core.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/mtd/physmap.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/types.h&gt;</div><div class='del'>-#include &lt;asm/setup.h&gt;</div><div class='del'>-#include &lt;asm/memory.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/mach/irq.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach/pci.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Interrupt mapping</div><div class='del'>- */</div><div class='del'>-#define INTA		IRQ_ROADRUNNER_PCI_INTA</div><div class='del'>-#define INTB		IRQ_ROADRUNNER_PCI_INTB</div><div class='del'>-#define INTC		IRQ_ROADRUNNER_PCI_INTC</div><div class='del'>-#define INTD		IRQ_ROADRUNNER_PCI_INTD</div><div class='del'>-</div><div class='del'>-#define INTC_PIN	IXP23XX_GPIO_PIN_11</div><div class='del'>-#define INTD_PIN	IXP23XX_GPIO_PIN_12</div><div class='del'>-</div><div class='del'>-static int __init roadrunner_map_irq(const struct pci_dev *dev, u8 idsel,</div><div class='del'>-	u8 pin)</div><div class='del'>-{</div><div class='del'>-	static int pci_card_slot_irq[] = {INTB, INTC, INTD, INTA};</div><div class='del'>-	static int pmc_card_slot_irq[] = {INTA, INTB, INTC, INTD};</div><div class='del'>-	static int usb_irq[] = {INTB, INTC, INTD, -1};</div><div class='del'>-	static int mini_pci_1_irq[] = {INTB, INTC, -1, -1};</div><div class='del'>-	static int mini_pci_2_irq[] = {INTC, INTD, -1, -1};</div><div class='del'>-</div><div class='del'>-	switch(dev-&gt;bus-&gt;number) {</div><div class='del'>-		case 0:</div><div class='del'>-			switch(dev-&gt;devfn) {</div><div class='del'>-			case 0x0: // PCI-PCI bridge</div><div class='del'>-				break;</div><div class='del'>-			case 0x8: // PCI Card Slot</div><div class='del'>-				return pci_card_slot_irq[pin - 1];</div><div class='del'>-			case 0x10: // PMC Slot</div><div class='del'>-				return pmc_card_slot_irq[pin - 1];</div><div class='del'>-			case 0x18: // PMC Slot Secondary Agent</div><div class='del'>-				break;</div><div class='del'>-			case 0x20: // IXP Processor</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				return NO_IRQ;</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case 1:</div><div class='del'>-			switch(dev-&gt;devfn) {</div><div class='del'>-			case 0x0: // IDE Controller</div><div class='del'>-				return (pin == 1) ? INTC : -1;</div><div class='del'>-			case 0x8: // USB fun 0</div><div class='del'>-			case 0x9: // USB fun 1</div><div class='del'>-			case 0xa: // USB fun 2</div><div class='del'>-				return usb_irq[pin - 1];</div><div class='del'>-			case 0x10: // Mini PCI 1</div><div class='del'>-				return mini_pci_1_irq[pin-1];</div><div class='del'>-			case 0x18: // Mini PCI 2</div><div class='del'>-				return mini_pci_2_irq[pin-1];</div><div class='del'>-			case 0x20: // MEM slot</div><div class='del'>-				return (pin == 1) ? INTA : -1;</div><div class='del'>-			default:</div><div class='del'>-				return NO_IRQ;</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		default:</div><div class='del'>-			return NO_IRQ;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NO_IRQ;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init roadrunner_pci_preinit(void)</div><div class='del'>-{</div><div class='del'>-	irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW);</div><div class='del'>-	irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW);</div><div class='del'>-</div><div class='del'>-	ixp23xx_pci_preinit();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct hw_pci roadrunner_pci __initdata = {</div><div class='del'>-	.nr_controllers	= 1,</div><div class='del'>-	.preinit	= roadrunner_pci_preinit,</div><div class='del'>-	.setup		= ixp23xx_pci_setup,</div><div class='del'>-	.scan		= ixp23xx_pci_scan_bus,</div><div class='del'>-	.map_irq	= roadrunner_map_irq,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init roadrunner_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	if (machine_is_roadrunner())</div><div class='del'>-		pci_common_init(&amp;roadrunner_pci);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-subsys_initcall(roadrunner_pci_init);</div><div class='del'>-</div><div class='del'>-static struct physmap_flash_data roadrunner_flash_data = {</div><div class='del'>-	.width		= 2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource roadrunner_flash_resource = {</div><div class='del'>-	.start		= 0x90000000,</div><div class='del'>-	.end		= 0x93ffffff,</div><div class='del'>-	.flags		= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device roadrunner_flash = {</div><div class='del'>-	.name		= "physmap-flash",</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data	= &amp;roadrunner_flash_data,</div><div class='del'>-	},</div><div class='del'>-	.num_resources	= 1,</div><div class='del'>-	.resource	= &amp;roadrunner_flash_resource,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init roadrunner_init(void)</div><div class='del'>-{</div><div class='del'>-	platform_device_register(&amp;roadrunner_flash);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Mark flash as writeable</div><div class='del'>-	 */</div><div class='del'>-	IXP23XX_EXP_CS0[0] |= IXP23XX_FLASH_WRITABLE;</div><div class='del'>-	IXP23XX_EXP_CS0[1] |= IXP23XX_FLASH_WRITABLE;</div><div class='del'>-	IXP23XX_EXP_CS0[2] |= IXP23XX_FLASH_WRITABLE;</div><div class='del'>-	IXP23XX_EXP_CS0[3] |= IXP23XX_FLASH_WRITABLE;</div><div class='del'>-</div><div class='del'>-	ixp23xx_sys_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(ROADRUNNER, "ADI Engineering RoadRunner Development Platform")</div><div class='del'>-	/* Maintainer: Deepak Saxena */</div><div class='del'>-	.map_io		= ixp23xx_map_io,</div><div class='del'>-	.init_irq	= ixp23xx_init_irq,</div><div class='del'>-	.timer		= &amp;ixp23xx_timer,</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.init_machine	= roadrunner_init,</div><div class='del'>-	.restart	= ixp23xx_restart,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/avila-pci.c b/arch/arm/mach-ixp4xx/avila-pci.c<br/>index 8fea0a3c5246..548c7d43ade6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/avila-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/avila-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/avila-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/avila-pci.c</a></div><div class='hunk'>@@ -65,10 +65,9 @@ static int __init avila_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> struct hw_pci avila_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit	= avila_pci_preinit,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= ixp4xx_setup,</div><div class='del'>-	.scan		= ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq	= avila_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c<br/>index d5719eb42591..1694f01ce2b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/common-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/common-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/common-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/common-pci.c</a></div><div class='hunk'>@@ -480,12 +480,6 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	return pci_scan_root_bus(NULL, sys-&gt;busnr, &amp;ixp4xx_ops, sys,</div><div class='del'>-				 &amp;sys-&gt;resources);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int dma_set_coherent_mask(struct device *dev, u64 mask)</div><div class='ctx'> {</div><div class='ctx'> 	if (mask &gt;= SZ_64M - 1)</div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c<br/>index ebbd7fc90eb4..a9f80943d01f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/common.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;linux/clockchips.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/udc.h&gt;</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='hunk'>@@ -107,7 +108,7 @@ static signed char irq2gpio[32] = {</div><div class='ctx'> 	 7,  8,  9, 10, 11, 12, -1, -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int gpio_to_irq(int gpio)</div><div class='add'>+static int ixp4xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)</div><div class='ctx'> {</div><div class='ctx'> 	int irq;</div><div class='ctx'> </div><div class='hunk'>@@ -117,7 +118,6 @@ int gpio_to_irq(int gpio)</div><div class='ctx'> 	}</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(gpio_to_irq);</div><div class='ctx'> </div><div class='ctx'> int irq_to_gpio(unsigned int irq)</div><div class='ctx'> {</div><div class='hunk'>@@ -383,12 +383,56 @@ static struct platform_device *ixp46x_devices[] __initdata = {</div><div class='ctx'> unsigned long ixp4xx_exp_bus_size;</div><div class='ctx'> EXPORT_SYMBOL(ixp4xx_exp_bus_size);</div><div class='ctx'> </div><div class='add'>+static int ixp4xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)</div><div class='add'>+{</div><div class='add'>+	gpio_line_config(gpio, IXP4XX_GPIO_IN);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ixp4xx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,</div><div class='add'>+					int level)</div><div class='add'>+{</div><div class='add'>+	gpio_line_set(gpio, level);</div><div class='add'>+	gpio_line_config(gpio, IXP4XX_GPIO_OUT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ixp4xx_gpio_get_value(struct gpio_chip *chip, unsigned gpio)</div><div class='add'>+{</div><div class='add'>+	int value;</div><div class='add'>+</div><div class='add'>+	gpio_line_get(gpio, &amp;value);</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixp4xx_gpio_set_value(struct gpio_chip *chip, unsigned gpio,</div><div class='add'>+				  int value)</div><div class='add'>+{</div><div class='add'>+	gpio_line_set(gpio, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct gpio_chip ixp4xx_gpio_chip = {</div><div class='add'>+	.label			= "IXP4XX_GPIO_CHIP",</div><div class='add'>+	.direction_input	= ixp4xx_gpio_direction_input,</div><div class='add'>+	.direction_output	= ixp4xx_gpio_direction_output,</div><div class='add'>+	.get			= ixp4xx_gpio_get_value,</div><div class='add'>+	.set			= ixp4xx_gpio_set_value,</div><div class='add'>+	.to_irq			= ixp4xx_gpio_to_irq,</div><div class='add'>+	.base			= 0,</div><div class='add'>+	.ngpio			= 16,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> void __init ixp4xx_sys_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	ixp4xx_exp_bus_size = SZ_16M;</div><div class='ctx'> </div><div class='ctx'> 	platform_add_devices(ixp4xx_devices, ARRAY_SIZE(ixp4xx_devices));</div><div class='ctx'> </div><div class='add'>+	gpiochip_add(&amp;ixp4xx_gpio_chip);</div><div class='add'>+</div><div class='ctx'> 	if (cpu_is_ixp46x()) {</div><div class='ctx'> 		int region;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c<br/>index 71f5c9c60fc3..5d14ce2aee6d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/coyote-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/coyote-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/coyote-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/coyote-pci.c</a></div><div class='hunk'>@@ -48,10 +48,9 @@ static int __init coyote_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> struct hw_pci coyote_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit =        coyote_pci_preinit,</div><div class='del'>-	.swizzle =        pci_std_swizzle,</div><div class='ctx'> 	.setup =          ixp4xx_setup,</div><div class='del'>-	.scan =           ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq =        coyote_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/dsmg600-pci.c b/arch/arm/mach-ixp4xx/dsmg600-pci.c<br/>index 0532510b5e8c..8dca76937723 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/dsmg600-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/dsmg600-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/dsmg600-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/dsmg600-pci.c</a></div><div class='hunk'>@@ -62,10 +62,9 @@ static int __init dsmg600_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> struct hw_pci __initdata dsmg600_pci = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit	= dsmg600_pci_preinit,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= ixp4xx_setup,</div><div class='del'>-	.scan		= ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq	= dsmg600_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/fsg-pci.c b/arch/arm/mach-ixp4xx/fsg-pci.c<br/>index d2ac803328f7..fd4a8625b4ae 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/fsg-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/fsg-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/fsg-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/fsg-pci.c</a></div><div class='hunk'>@@ -59,10 +59,9 @@ static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> struct hw_pci fsg_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit =	  fsg_pci_preinit,</div><div class='del'>-	.swizzle =	  pci_std_swizzle,</div><div class='ctx'> 	.setup =	  ixp4xx_setup,</div><div class='del'>-	.scan =		  ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq =	  fsg_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/gateway7001-pci.c b/arch/arm/mach-ixp4xx/gateway7001-pci.c<br/>index 76581fb467c4..d9d6cc089707 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/gateway7001-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/gateway7001-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/gateway7001-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/gateway7001-pci.c</a></div><div class='hunk'>@@ -47,10 +47,9 @@ static int __init gateway7001_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> </div><div class='ctx'> struct hw_pci gateway7001_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit =        gateway7001_pci_preinit,</div><div class='del'>-	.swizzle =        pci_std_swizzle,</div><div class='ctx'> 	.setup =          ixp4xx_setup,</div><div class='del'>-	.scan =           ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq =        gateway7001_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c<br/>index 46bb924962ee..b800a031207c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/goramo_mlr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/goramo_mlr.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/goramo_mlr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/goramo_mlr.c</a></div><div class='hunk'>@@ -473,11 +473,10 @@ static int __init gmlr_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci gmlr_hw_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit	= gmlr_pci_preinit,</div><div class='ctx'> 	.postinit	= gmlr_pci_postinit,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= ixp4xx_setup,</div><div class='del'>-	.scan		= ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq	= gmlr_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c<br/>index d68fc068c38d..551d114c9e14 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/gtwx5715-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/gtwx5715-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/gtwx5715-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/gtwx5715-pci.c</a></div><div class='hunk'>@@ -67,10 +67,9 @@ static int __init gtwx5715_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> struct hw_pci gtwx5715_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit =        gtwx5715_pci_preinit,</div><div class='del'>-	.swizzle =        pci_std_swizzle,</div><div class='ctx'> 	.setup =          ixp4xx_setup,</div><div class='del'>-	.scan =           ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq =        gtwx5715_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/include/mach/gpio.h b/arch/arm/mach-ixp4xx/include/mach/gpio.h<br/>index 83d6b4ed60bb..ef37f2635b0e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/include/mach/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/include/mach/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/include/mach/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/include/mach/gpio.h</a></div><div class='hunk'>@@ -1,79 +1,2 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-ixp4xx/include/mach/gpio.h</div><div class='del'>- *</div><div class='del'>- * IXP4XX GPIO wrappers for arch-neutral GPIO calls</div><div class='del'>- *</div><div class='del'>- * Written by Milan Svoboda &lt;msvoboda@ra.rockwell.com&gt;</div><div class='del'>- * Based on PXA implementation by Philipp Zabel &lt;philipp.zabel@gmail.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_IXP4XX_GPIO_H</div><div class='del'>-#define __ASM_ARCH_IXP4XX_GPIO_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-#define __ARM_GPIOLIB_COMPLEX</div><div class='del'>-</div><div class='del'>-static inline int gpio_request(unsigned gpio, const char *label)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void gpio_free(unsigned gpio)</div><div class='del'>-{</div><div class='del'>-	might_sleep();</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_direction_input(unsigned gpio)</div><div class='del'>-{</div><div class='del'>-	gpio_line_config(gpio, IXP4XX_GPIO_IN);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_direction_output(unsigned gpio, int level)</div><div class='del'>-{</div><div class='del'>-	gpio_line_set(gpio, level);</div><div class='del'>-	gpio_line_config(gpio, IXP4XX_GPIO_OUT);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_get_value(unsigned gpio)</div><div class='del'>-{</div><div class='del'>-	int value;</div><div class='del'>-</div><div class='del'>-	gpio_line_get(gpio, &amp;value);</div><div class='del'>-</div><div class='del'>-	return value;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void gpio_set_value(unsigned gpio, int value)</div><div class='del'>-{</div><div class='del'>-	gpio_line_set(gpio, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#include &lt;asm-generic/gpio.h&gt;			/* cansleep wrappers */</div><div class='del'>-</div><div class='del'>-extern int gpio_to_irq(int gpio);</div><div class='del'>-#define gpio_to_irq gpio_to_irq</div><div class='del'>-extern int irq_to_gpio(unsigned int irq);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='add'>+/* empty */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h<br/>index 292d55ed2113..cf03614d250d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h</a></div><div class='hunk'>@@ -75,4 +75,7 @@ struct ixp46x_ts_regs {</div><div class='ctx'> #define TX_SNAPSHOT_LOCKED (1&lt;&lt;0)</div><div class='ctx'> #define RX_SNAPSHOT_LOCKED (1&lt;&lt;1)</div><div class='ctx'> </div><div class='add'>+/* The ptp_ixp46x module will set this variable */</div><div class='add'>+extern int ixp46x_phc_index;</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h<br/>index b66bedc64de1..5bce94aacca9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/include/mach/platform.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/include/mach/platform.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/include/mach/platform.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/include/mach/platform.h</a></div><div class='hunk'>@@ -130,7 +130,7 @@ extern void ixp4xx_restart(char, const char *);</div><div class='ctx'> extern void ixp4xx_pci_preinit(void);</div><div class='ctx'> struct pci_sys_data;</div><div class='ctx'> extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);</div><div class='del'>-extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);</div><div class='add'>+extern struct pci_ops ixp4xx_ops;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * GPIO-functions</div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c<br/>index fffd8c5e40bf..318424dd3c50 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/ixdp425-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/ixdp425-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/ixdp425-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/ixdp425-pci.c</a></div><div class='hunk'>@@ -60,10 +60,9 @@ static int __init ixdp425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> struct hw_pci ixdp425_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit	= ixdp425_pci_preinit,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= ixp4xx_setup,</div><div class='del'>-	.scan		= ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq	= ixdp425_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c<br/>index 3d742aee1773..108a9d3f382d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/ixdp425-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/ixdp425-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/ixdp425-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/ixdp425-setup.c</a></div><div class='hunk'>@@ -60,8 +60,6 @@ static struct platform_device ixdp425_flash = {</div><div class='ctx'> #if defined(CONFIG_MTD_NAND_PLATFORM) || \</div><div class='ctx'>     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)</div><div class='ctx'> </div><div class='del'>-const char *part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> static struct mtd_partition ixdp425_partitions[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name	= "ixp400 NAND FS 0",</div><div class='hunk'>@@ -100,8 +98,6 @@ static struct platform_nand_data ixdp425_flash_nand_data = {</div><div class='ctx'> 	.chip = {</div><div class='ctx'> 		.nr_chips		= 1,</div><div class='ctx'> 		.chip_delay		= 30,</div><div class='del'>-		.options		= NAND_NO_AUTOINCR,</div><div class='del'>-		.part_probe_types 	= part_probes,</div><div class='ctx'> 		.partitions	 	= ixdp425_partitions,</div><div class='ctx'> 		.nr_partitions	 	= ARRAY_SIZE(ixdp425_partitions),</div><div class='ctx'> 	},</div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c<br/>index 34efe75015ec..1f8717ba13dc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/ixdpg425-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/ixdpg425-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/ixdpg425-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/ixdpg425-pci.c</a></div><div class='hunk'>@@ -42,10 +42,9 @@ static int __init ixdpg425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> struct hw_pci ixdpg425_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit =        ixdpg425_pci_preinit,</div><div class='del'>-	.swizzle =        pci_std_swizzle,</div><div class='ctx'> 	.setup =          ixp4xx_setup,</div><div class='del'>-	.scan =           ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq =        ixdpg425_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/miccpt-pci.c b/arch/arm/mach-ixp4xx/miccpt-pci.c<br/>index ca0bae7fca90..d114ccd2017c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/miccpt-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/miccpt-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/miccpt-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/miccpt-pci.c</a></div><div class='hunk'>@@ -61,10 +61,9 @@ static int __init miccpt_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> struct hw_pci miccpt_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit	= miccpt_pci_preinit,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= ixp4xx_setup,</div><div class='del'>-	.scan		= ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq	= miccpt_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c<br/>index 5434ccf553eb..8f0eba0a6800 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/nas100d-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/nas100d-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/nas100d-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/nas100d-pci.c</a></div><div class='hunk'>@@ -58,10 +58,9 @@ static int __init nas100d_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> struct hw_pci __initdata nas100d_pci = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit	= nas100d_pci_preinit,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= ixp4xx_setup,</div><div class='del'>-	.scan		= ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq	= nas100d_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c<br/>index b57160535e47..032defe111aa 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/nslu2-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/nslu2-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/nslu2-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/nslu2-pci.c</a></div><div class='hunk'>@@ -54,10 +54,9 @@ static int __init nslu2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> struct hw_pci __initdata nslu2_pci = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit	= nslu2_pci_preinit,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= ixp4xx_setup,</div><div class='del'>-	.scan		= ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq	= nslu2_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/vulcan-pci.c b/arch/arm/mach-ixp4xx/vulcan-pci.c<br/>index 0bc3f34c282f..a4220fa5e0c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/vulcan-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/vulcan-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/vulcan-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/vulcan-pci.c</a></div><div class='hunk'>@@ -56,10 +56,9 @@ static int __init vulcan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> struct hw_pci vulcan_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 1,</div><div class='add'>+	.ops		= &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit	= vulcan_pci_preinit,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= ixp4xx_setup,</div><div class='del'>-	.scan		= ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq	= vulcan_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ixp4xx/wg302v2-pci.c b/arch/arm/mach-ixp4xx/wg302v2-pci.c<br/>index f27dfcfe811b..c92e5b82af36 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/wg302v2-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ixp4xx/wg302v2-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ixp4xx/wg302v2-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ixp4xx/wg302v2-pci.c</a></div><div class='hunk'>@@ -46,10 +46,9 @@ static int __init wg302v2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> struct hw_pci wg302v2_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='add'>+	.ops = &amp;ixp4xx_ops,</div><div class='ctx'> 	.preinit =        wg302v2_pci_preinit,</div><div class='del'>-	.swizzle =        pci_std_swizzle,</div><div class='ctx'> 	.setup =          ixp4xx_setup,</div><div class='del'>-	.scan =           ixp4xx_scan_bus,</div><div class='ctx'> 	.map_irq =        wg302v2_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig<br/>index 90ceab761929..199764fe0fb0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/Kconfig</a></div><div class='hunk'>@@ -58,6 +58,28 @@ config MACH_DREAMPLUG_DT</div><div class='ctx'> 	  Say 'Y' here if you want your kernel to support the</div><div class='ctx'> 	  Marvell DreamPlug (Flattened Device Tree).</div><div class='ctx'> </div><div class='add'>+config MACH_ICONNECT_DT</div><div class='add'>+	bool "Iomega Iconnect (Flattened Device Tree)"</div><div class='add'>+	select ARCH_KIRKWOOD_DT</div><div class='add'>+	help</div><div class='add'>+	  Say 'Y' here to enable Iomega Iconnect support.</div><div class='add'>+</div><div class='add'>+config MACH_DLINK_KIRKWOOD_DT</div><div class='add'>+	bool "D-Link Kirkwood-based NAS (Flattened Device Tree)"</div><div class='add'>+	select ARCH_KIRKWOOD_DT</div><div class='add'>+	help</div><div class='add'>+	  Say 'Y' here if you want your kernel to support the</div><div class='add'>+	  Kirkwood-based D-Link NASes such as DNS-320 &amp; DNS-325,</div><div class='add'>+	  using Flattened Device Tree.</div><div class='add'>+</div><div class='add'>+config MACH_IB62X0_DT</div><div class='add'>+	bool "RaidSonic IB-NAS6210, IB-NAS6220 (Flattened Device Tree)"</div><div class='add'>+	select ARCH_KIRKWOOD_DT</div><div class='add'>+	help</div><div class='add'>+	  Say 'Y' here if you want your kernel to support the</div><div class='add'>+	  RaidSonic IB-NAS6210 &amp; IB-NAS6220 devices, using</div><div class='add'>+	  Flattened Device Tree.</div><div class='add'>+</div><div class='ctx'> config MACH_TS219</div><div class='ctx'> 	bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS"</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile<br/>index e299a9576bf0..d2b05907b10e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/Makefile</a></div><div class='hunk'>@@ -22,3 +22,6 @@ obj-$(CONFIG_MACH_T5325)		+= t5325-setup.o</div><div class='ctx'> obj-$(CONFIG_CPU_IDLE)			+= cpuidle.o</div><div class='ctx'> obj-$(CONFIG_ARCH_KIRKWOOD_DT)		+= board-dt.o</div><div class='ctx'> obj-$(CONFIG_MACH_DREAMPLUG_DT)		+= board-dreamplug.o</div><div class='add'>+obj-$(CONFIG_MACH_ICONNECT_DT)		+= board-iconnect.o</div><div class='add'>+obj-$(CONFIG_MACH_DLINK_KIRKWOOD_DT)	+= board-dnskw.o</div><div class='add'>+obj-$(CONFIG_MACH_IB62X0_DT)		+= board-ib62x0.o</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/Makefile.boot b/arch/arm/mach-kirkwood/Makefile.boot<br/>index 16f938522304..02edbdf5b065 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/Makefile.boot?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/Makefile.boot</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/Makefile.boot</a></div><div class='hunk'>@@ -3,3 +3,7 @@ params_phys-y	:= 0x00000100</div><div class='ctx'> initrd_phys-y	:= 0x00800000</div><div class='ctx'> </div><div class='ctx'> dtb-$(CONFIG_MACH_DREAMPLUG_DT) += kirkwood-dreamplug.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/board-dnskw.c b/arch/arm/mach-kirkwood/board-dnskw.c<br/>new file mode 100644<br/>index 000000000000..58c2d68f9443<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/board-dnskw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/board-dnskw.c</a></div><div class='hunk'>@@ -0,0 +1,275 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 (C), Jamie Lentin &lt;jm@lentin.co.uk&gt;</div><div class='add'>+ *</div><div class='add'>+ * arch/arm/mach-kirkwood/board-dnskw.c</div><div class='add'>+ *</div><div class='add'>+ * D-link DNS-320 &amp; DNS-325 NAS Init for drivers not converted to</div><div class='add'>+ * flattened device tree yet.</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2.  This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/ata_platform.h&gt;</div><div class='add'>+#include &lt;linux/mv643xx_eth.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/gpio_keys.h&gt;</div><div class='add'>+#include &lt;linux/gpio-fan.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='add'>+#include &lt;asm/mach-types.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/mach/map.h&gt;</div><div class='add'>+#include &lt;mach/kirkwood.h&gt;</div><div class='add'>+#include &lt;mach/bridge-regs.h&gt;</div><div class='add'>+#include "common.h"</div><div class='add'>+#include "mpp.h"</div><div class='add'>+</div><div class='add'>+static struct mv643xx_eth_platform_data dnskw_ge00_data = {</div><div class='add'>+	.phy_addr	= MV643XX_ETH_PHY_ADDR(8),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mv_sata_platform_data dnskw_sata_data = {</div><div class='add'>+	.n_ports	= 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned int dnskw_mpp_config[] __initdata = {</div><div class='add'>+	MPP13_UART1_TXD,	/* Custom ... */</div><div class='add'>+	MPP14_UART1_RXD,	/* ... Controller (DNS-320 only) */</div><div class='add'>+	MPP20_SATA1_ACTn,	/* LED: White Right HDD */</div><div class='add'>+	MPP21_SATA0_ACTn,	/* LED: White Left HDD */</div><div class='add'>+	MPP24_GPIO,</div><div class='add'>+	MPP25_GPIO,</div><div class='add'>+	MPP26_GPIO,	/* LED: Power */</div><div class='add'>+	MPP27_GPIO,	/* LED: Red Right HDD */</div><div class='add'>+	MPP28_GPIO,	/* LED: Red Left HDD */</div><div class='add'>+	MPP29_GPIO,	/* LED: Red USB (DNS-325 only) */</div><div class='add'>+	MPP30_GPIO,</div><div class='add'>+	MPP31_GPIO,</div><div class='add'>+	MPP32_GPIO,</div><div class='add'>+	MPP33_GPO,</div><div class='add'>+	MPP34_GPIO,	/* Button: Front power */</div><div class='add'>+	MPP35_GPIO,	/* LED: Red USB (DNS-320 only) */</div><div class='add'>+	MPP36_GPIO,	/* Power: Turn off board */</div><div class='add'>+	MPP37_GPIO,	/* Power: Turn back on after power failure */</div><div class='add'>+	MPP38_GPIO,</div><div class='add'>+	MPP39_GPIO,	/* Power: SATA0 */</div><div class='add'>+	MPP40_GPIO,	/* Power: SATA1 */</div><div class='add'>+	MPP41_GPIO,	/* SATA0 present */</div><div class='add'>+	MPP42_GPIO,	/* SATA1 present */</div><div class='add'>+	MPP43_GPIO,	/* LED: White USB */</div><div class='add'>+	MPP44_GPIO,	/* Fan: Tachometer Pin */</div><div class='add'>+	MPP45_GPIO,	/* Fan: high speed */</div><div class='add'>+	MPP46_GPIO,	/* Fan: low speed */</div><div class='add'>+	MPP47_GPIO,	/* Button: Back unmount */</div><div class='add'>+	MPP48_GPIO,	/* Button: Back reset */</div><div class='add'>+	MPP49_GPIO,	/* Temp Alarm (DNS-325) Pin of U5 (DNS-320) */</div><div class='add'>+	0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_led dns325_led_pins[] = {</div><div class='add'>+	{</div><div class='add'>+		.name	= "dns325:white:power",</div><div class='add'>+		.gpio	= 26,</div><div class='add'>+		.active_low = 1,</div><div class='add'>+		.default_trigger = "default-on",</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= "dns325:white:usb",</div><div class='add'>+		.gpio	= 43,</div><div class='add'>+		.active_low = 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= "dns325:red:l_hdd",</div><div class='add'>+		.gpio	= 28,</div><div class='add'>+		.active_low = 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= "dns325:red:r_hdd",</div><div class='add'>+		.gpio	= 27,</div><div class='add'>+		.active_low = 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= "dns325:red:usb",</div><div class='add'>+		.gpio	= 29,</div><div class='add'>+		.active_low = 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_led_platform_data dns325_led_data = {</div><div class='add'>+	.num_leds	= ARRAY_SIZE(dns325_led_pins),</div><div class='add'>+	.leds		= dns325_led_pins,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device dns325_led_device = {</div><div class='add'>+	.name		= "leds-gpio",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;dns325_led_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_led dns320_led_pins[] = {</div><div class='add'>+	{</div><div class='add'>+		.name	= "dns320:blue:power",</div><div class='add'>+		.gpio	= 26,</div><div class='add'>+		.active_low = 1,</div><div class='add'>+		.default_trigger = "default-on",</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= "dns320:blue:usb",</div><div class='add'>+		.gpio	= 43,</div><div class='add'>+		.active_low = 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= "dns320:orange:l_hdd",</div><div class='add'>+		.gpio	= 28,</div><div class='add'>+		.active_low = 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= "dns320:orange:r_hdd",</div><div class='add'>+		.gpio	= 27,</div><div class='add'>+		.active_low = 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= "dns320:orange:usb",</div><div class='add'>+		.gpio	= 35,</div><div class='add'>+		.active_low = 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_led_platform_data dns320_led_data = {</div><div class='add'>+	.num_leds	= ARRAY_SIZE(dns320_led_pins),</div><div class='add'>+	.leds		= dns320_led_pins,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device dns320_led_device = {</div><div class='add'>+	.name		= "leds-gpio",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;dns320_led_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct i2c_board_info dns325_i2c_board_info[] __initdata = {</div><div class='add'>+	{</div><div class='add'>+		I2C_BOARD_INFO("lm75", 0x48),</div><div class='add'>+	},</div><div class='add'>+	/* Something at 0x0c also */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_keys_button dnskw_button_pins[] = {</div><div class='add'>+	{</div><div class='add'>+		.code		= KEY_POWER,</div><div class='add'>+		.gpio		= 34,</div><div class='add'>+		.desc		= "Power button",</div><div class='add'>+		.active_low	= 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.code		= KEY_EJECTCD,</div><div class='add'>+		.gpio		= 47,</div><div class='add'>+		.desc		= "USB unmount button",</div><div class='add'>+		.active_low	= 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.code		= KEY_RESTART,</div><div class='add'>+		.gpio		= 48,</div><div class='add'>+		.desc		= "Reset button",</div><div class='add'>+		.active_low	= 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_keys_platform_data dnskw_button_data = {</div><div class='add'>+	.buttons	= dnskw_button_pins,</div><div class='add'>+	.nbuttons	= ARRAY_SIZE(dnskw_button_pins),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device dnskw_button_device = {</div><div class='add'>+	.name		= "gpio-keys",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.num_resources	= 0,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;dnskw_button_data,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Fan: ADDA AD045HB-G73 40mm 6000rpm@5v */</div><div class='add'>+static struct gpio_fan_speed dnskw_fan_speed[] = {</div><div class='add'>+	{    0,  0 },</div><div class='add'>+	{ 3000,	 1 },</div><div class='add'>+	{ 6000,	 2 },</div><div class='add'>+};</div><div class='add'>+static unsigned dnskw_fan_pins[] = {46, 45};</div><div class='add'>+</div><div class='add'>+static struct gpio_fan_platform_data dnskw_fan_data = {</div><div class='add'>+	.num_ctrl	= ARRAY_SIZE(dnskw_fan_pins),</div><div class='add'>+	.ctrl		= dnskw_fan_pins,</div><div class='add'>+	.num_speed	= ARRAY_SIZE(dnskw_fan_speed),</div><div class='add'>+	.speed		= dnskw_fan_speed,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device dnskw_fan_device = {</div><div class='add'>+	.name	= "gpio-fan",</div><div class='add'>+	.id	= -1,</div><div class='add'>+	.dev	= {</div><div class='add'>+		.platform_data	= &amp;dnskw_fan_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void dnskw_power_off(void)</div><div class='add'>+{</div><div class='add'>+	gpio_set_value(36, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Register any GPIO for output and set the value */</div><div class='add'>+static void __init dnskw_gpio_register(unsigned gpio, char *name, int def)</div><div class='add'>+{</div><div class='add'>+	if (gpio_request(gpio, name) == 0 &amp;&amp;</div><div class='add'>+	    gpio_direction_output(gpio, 0) == 0) {</div><div class='add'>+		gpio_set_value(gpio, def);</div><div class='add'>+		if (gpio_export(gpio, 0) != 0)</div><div class='add'>+			pr_err("dnskw: Failed to export GPIO %s\n", name);</div><div class='add'>+	} else</div><div class='add'>+		pr_err("dnskw: Failed to register %s\n", name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init dnskw_init(void)</div><div class='add'>+{</div><div class='add'>+	kirkwood_mpp_conf(dnskw_mpp_config);</div><div class='add'>+</div><div class='add'>+	kirkwood_ehci_init();</div><div class='add'>+	kirkwood_ge00_init(&amp;dnskw_ge00_data);</div><div class='add'>+	kirkwood_sata_init(&amp;dnskw_sata_data);</div><div class='add'>+	kirkwood_i2c_init();</div><div class='add'>+</div><div class='add'>+	platform_device_register(&amp;dnskw_button_device);</div><div class='add'>+	platform_device_register(&amp;dnskw_fan_device);</div><div class='add'>+</div><div class='add'>+	if (of_machine_is_compatible("dlink,dns-325")) {</div><div class='add'>+		i2c_register_board_info(0, dns325_i2c_board_info,</div><div class='add'>+					ARRAY_SIZE(dns325_i2c_board_info));</div><div class='add'>+		platform_device_register(&amp;dns325_led_device);</div><div class='add'>+</div><div class='add'>+	} else if (of_machine_is_compatible("dlink,dns-320"))</div><div class='add'>+		platform_device_register(&amp;dns320_led_device);</div><div class='add'>+</div><div class='add'>+	/* Register power-off GPIO. */</div><div class='add'>+	if (gpio_request(36, "dnskw:power:off") == 0</div><div class='add'>+	    &amp;&amp; gpio_direction_output(36, 0) == 0)</div><div class='add'>+		pm_power_off = dnskw_power_off;</div><div class='add'>+	else</div><div class='add'>+		pr_err("dnskw: failed to configure power-off GPIO\n");</div><div class='add'>+</div><div class='add'>+	/* Ensure power is supplied to both HDDs */</div><div class='add'>+	dnskw_gpio_register(39, "dnskw:power:sata0", 1);</div><div class='add'>+	dnskw_gpio_register(40, "dnskw:power:sata1", 1);</div><div class='add'>+</div><div class='add'>+	/* Set NAS to turn back on after a power failure */</div><div class='add'>+	dnskw_gpio_register(37, "dnskw:power:recover", 1);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/board-dreamplug.c b/arch/arm/mach-kirkwood/board-dreamplug.c<br/>index 985453994dd3..55e357ab2923 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/board-dreamplug.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/board-dreamplug.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/board-dreamplug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/board-dreamplug.c</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='ctx'> #include &lt;linux/spi/flash.h&gt;</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='del'>-#include &lt;linux/spi/orion_spi.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c<br/>index 1c672d9e6656..edc3f8a9d45e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/board-dt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/board-dt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/board-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/board-dt.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/kexec.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> #include &lt;mach/bridge-regs.h&gt;</div><div class='hunk'>@@ -42,6 +43,9 @@ static void __init kirkwood_dt_init(void)</div><div class='ctx'> 	kirkwood_l2_init();</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+	/* Setup root of clk tree */</div><div class='add'>+	kirkwood_clk_init();</div><div class='add'>+</div><div class='ctx'> 	/* internal devices that every board has */</div><div class='ctx'> 	kirkwood_wdt_init();</div><div class='ctx'> 	kirkwood_xor0_init();</div><div class='hunk'>@@ -55,11 +59,24 @@ static void __init kirkwood_dt_init(void)</div><div class='ctx'> 	if (of_machine_is_compatible("globalscale,dreamplug"))</div><div class='ctx'> 		dreamplug_init();</div><div class='ctx'> </div><div class='add'>+	if (of_machine_is_compatible("dlink,dns-kirkwood"))</div><div class='add'>+		dnskw_init();</div><div class='add'>+</div><div class='add'>+	if (of_machine_is_compatible("iom,iconnect"))</div><div class='add'>+		iconnect_init();</div><div class='add'>+</div><div class='add'>+	if (of_machine_is_compatible("raidsonic,ib-nas62x0"))</div><div class='add'>+		ib62x0_init();</div><div class='add'>+</div><div class='ctx'> 	of_platform_populate(NULL, kirkwood_dt_match_table, NULL, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *kirkwood_dt_board_compat[] = {</div><div class='ctx'> 	"globalscale,dreamplug",</div><div class='add'>+	"dlink,dns-320",</div><div class='add'>+	"dlink,dns-325",</div><div class='add'>+	"iom,iconnect",</div><div class='add'>+	"raidsonic,ib-nas62x0",</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-kirkwood/board-ib62x0.c b/arch/arm/mach-kirkwood/board-ib62x0.c<br/>new file mode 100644<br/>index 000000000000..eddf1df8891f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/board-ib62x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/board-ib62x0.c</a></div><div class='hunk'>@@ -0,0 +1,143 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 (C), Simon Baatz &lt;gmbnomis@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * arch/arm/mach-kirkwood/board-ib62x0.c</div><div class='add'>+ *</div><div class='add'>+ * RaidSonic ICY BOX IB-NAS6210 &amp; IB-NAS6220 init for drivers not</div><div class='add'>+ * converted to flattened device tree yet.</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2.  This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mtd/partitions.h&gt;</div><div class='add'>+#include &lt;linux/ata_platform.h&gt;</div><div class='add'>+#include &lt;linux/mv643xx_eth.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/gpio_keys.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='add'>+#include &lt;asm/mach-types.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;mach/kirkwood.h&gt;</div><div class='add'>+#include "common.h"</div><div class='add'>+#include "mpp.h"</div><div class='add'>+</div><div class='add'>+#define IB62X0_GPIO_POWER_OFF	24</div><div class='add'>+</div><div class='add'>+static struct mv643xx_eth_platform_data ib62x0_ge00_data = {</div><div class='add'>+	.phy_addr	= MV643XX_ETH_PHY_ADDR(8),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mv_sata_platform_data ib62x0_sata_data = {</div><div class='add'>+	.n_ports	= 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned int ib62x0_mpp_config[] __initdata = {</div><div class='add'>+	MPP0_NF_IO2,</div><div class='add'>+	MPP1_NF_IO3,</div><div class='add'>+	MPP2_NF_IO4,</div><div class='add'>+	MPP3_NF_IO5,</div><div class='add'>+	MPP4_NF_IO6,</div><div class='add'>+	MPP5_NF_IO7,</div><div class='add'>+	MPP18_NF_IO0,</div><div class='add'>+	MPP19_NF_IO1,</div><div class='add'>+	MPP22_GPIO,	/* OS LED red */</div><div class='add'>+	MPP24_GPIO,	/* Power off device */</div><div class='add'>+	MPP25_GPIO,	/* OS LED green */</div><div class='add'>+	MPP27_GPIO,	/* USB transfer LED */</div><div class='add'>+	MPP28_GPIO,	/* Reset button */</div><div class='add'>+	MPP29_GPIO,	/* USB Copy button */</div><div class='add'>+	0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_led ib62x0_led_pins[] = {</div><div class='add'>+	{</div><div class='add'>+		.name			= "ib62x0:green:os",</div><div class='add'>+		.default_trigger	= "default-on",</div><div class='add'>+		.gpio			= 25,</div><div class='add'>+		.active_low		= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name			= "ib62x0:red:os",</div><div class='add'>+		.default_trigger	= "none",</div><div class='add'>+		.gpio			= 22,</div><div class='add'>+		.active_low		= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name			= "ib62x0:red:usb_copy",</div><div class='add'>+		.default_trigger	= "none",</div><div class='add'>+		.gpio			= 27,</div><div class='add'>+		.active_low		= 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_led_platform_data ib62x0_led_data = {</div><div class='add'>+	.leds		= ib62x0_led_pins,</div><div class='add'>+	.num_leds	= ARRAY_SIZE(ib62x0_led_pins),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device ib62x0_led_device = {</div><div class='add'>+	.name	= "leds-gpio",</div><div class='add'>+	.id	= -1,</div><div class='add'>+	.dev	= {</div><div class='add'>+		.platform_data	= &amp;ib62x0_led_data,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_keys_button ib62x0_button_pins[] = {</div><div class='add'>+	{</div><div class='add'>+		.code		= KEY_COPY,</div><div class='add'>+		.gpio		= 29,</div><div class='add'>+		.desc		= "USB Copy",</div><div class='add'>+		.active_low	= 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.code		= KEY_RESTART,</div><div class='add'>+		.gpio		= 28,</div><div class='add'>+		.desc		= "Reset",</div><div class='add'>+		.active_low	= 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_keys_platform_data ib62x0_button_data = {</div><div class='add'>+	.buttons	= ib62x0_button_pins,</div><div class='add'>+	.nbuttons	= ARRAY_SIZE(ib62x0_button_pins),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device ib62x0_button_device = {</div><div class='add'>+	.name		= "gpio-keys",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.num_resources	= 0,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;ib62x0_button_data,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ib62x0_power_off(void)</div><div class='add'>+{</div><div class='add'>+	gpio_set_value(IB62X0_GPIO_POWER_OFF, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init ib62x0_init(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Basic setup. Needs to be called early.</div><div class='add'>+	 */</div><div class='add'>+	kirkwood_mpp_conf(ib62x0_mpp_config);</div><div class='add'>+</div><div class='add'>+	kirkwood_ehci_init();</div><div class='add'>+	kirkwood_ge00_init(&amp;ib62x0_ge00_data);</div><div class='add'>+	kirkwood_sata_init(&amp;ib62x0_sata_data);</div><div class='add'>+	platform_device_register(&amp;ib62x0_led_device);</div><div class='add'>+	platform_device_register(&amp;ib62x0_button_device);</div><div class='add'>+	if (gpio_request(IB62X0_GPIO_POWER_OFF, "ib62x0:power:off") == 0 &amp;&amp;</div><div class='add'>+	    gpio_direction_output(IB62X0_GPIO_POWER_OFF, 0) == 0)</div><div class='add'>+		pm_power_off = ib62x0_power_off;</div><div class='add'>+	else</div><div class='add'>+		pr_err("board-ib62x0: failed to configure power-off GPIO\n");</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/board-iconnect.c b/arch/arm/mach-kirkwood/board-iconnect.c<br/>new file mode 100644<br/>index 000000000000..2222c5739519<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/board-iconnect.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/board-iconnect.c</a></div><div class='hunk'>@@ -0,0 +1,165 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-kirkwood/board-iconnect.c</div><div class='add'>+ *</div><div class='add'>+ * Iomega i-connect Board Setup</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2.  This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_fdt.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/mtd/partitions.h&gt;</div><div class='add'>+#include &lt;linux/mv643xx_eth.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='add'>+#include &lt;linux/spi/flash.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include &lt;linux/spi/orion_spi.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/gpio_keys.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;mach/kirkwood.h&gt;</div><div class='add'>+#include "common.h"</div><div class='add'>+#include "mpp.h"</div><div class='add'>+</div><div class='add'>+static struct mv643xx_eth_platform_data iconnect_ge00_data = {</div><div class='add'>+	.phy_addr	= MV643XX_ETH_PHY_ADDR(11),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_led iconnect_led_pins[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "led_level",</div><div class='add'>+		.gpio		= 41,</div><div class='add'>+		.default_trigger = "default-on",</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "power:blue",</div><div class='add'>+		.gpio		= 42,</div><div class='add'>+		.default_trigger = "timer",</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "power:red",</div><div class='add'>+		.gpio		= 43,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "usb1:blue",</div><div class='add'>+		.gpio		= 44,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "usb2:blue",</div><div class='add'>+		.gpio		= 45,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "usb3:blue",</div><div class='add'>+		.gpio		= 46,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "usb4:blue",</div><div class='add'>+		.gpio		= 47,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "otb:blue",</div><div class='add'>+		.gpio		= 48,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_led_platform_data iconnect_led_data = {</div><div class='add'>+	.leds		= iconnect_led_pins,</div><div class='add'>+	.num_leds	= ARRAY_SIZE(iconnect_led_pins),</div><div class='add'>+	.gpio_blink_set	= orion_gpio_led_blink_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device iconnect_leds = {</div><div class='add'>+	.name	= "leds-gpio",</div><div class='add'>+	.id	= -1,</div><div class='add'>+	.dev	= {</div><div class='add'>+		.platform_data	= &amp;iconnect_led_data,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned int iconnect_mpp_config[] __initdata = {</div><div class='add'>+	MPP12_GPIO,</div><div class='add'>+	MPP35_GPIO,</div><div class='add'>+	MPP41_GPIO,</div><div class='add'>+	MPP42_GPIO,</div><div class='add'>+	MPP43_GPIO,</div><div class='add'>+	MPP44_GPIO,</div><div class='add'>+	MPP45_GPIO,</div><div class='add'>+	MPP46_GPIO,</div><div class='add'>+	MPP47_GPIO,</div><div class='add'>+	MPP48_GPIO,</div><div class='add'>+	0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct i2c_board_info __initdata iconnect_board_info[] = {</div><div class='add'>+	{</div><div class='add'>+		I2C_BOARD_INFO("lm63", 0x4c),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mtd_partition iconnect_nand_parts[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "flash",</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.size = MTDPART_SIZ_FULL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* yikes... theses are the original input buttons */</div><div class='add'>+/* but I'm not convinced by the sw event choices  */</div><div class='add'>+static struct gpio_keys_button iconnect_buttons[] = {</div><div class='add'>+	{</div><div class='add'>+		.type		= EV_SW,</div><div class='add'>+		.code		= SW_LID,</div><div class='add'>+		.gpio		= 12,</div><div class='add'>+		.desc		= "Reset Button",</div><div class='add'>+		.active_low	= 1,</div><div class='add'>+		.debounce_interval = 100,</div><div class='add'>+	}, {</div><div class='add'>+		.type		= EV_SW,</div><div class='add'>+		.code		= SW_TABLET_MODE,</div><div class='add'>+		.gpio		= 35,</div><div class='add'>+		.desc		= "OTB Button",</div><div class='add'>+		.active_low	= 1,</div><div class='add'>+		.debounce_interval = 100,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_keys_platform_data iconnect_button_data = {</div><div class='add'>+	.buttons	= iconnect_buttons,</div><div class='add'>+	.nbuttons	= ARRAY_SIZE(iconnect_buttons),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device iconnect_button_device = {</div><div class='add'>+	.name		= "gpio-keys",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.num_resources	= 0,</div><div class='add'>+	.dev        = {</div><div class='add'>+		.platform_data  = &amp;iconnect_button_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init iconnect_init(void)</div><div class='add'>+{</div><div class='add'>+	kirkwood_mpp_conf(iconnect_mpp_config);</div><div class='add'>+	kirkwood_nand_init(ARRAY_AND_SIZE(iconnect_nand_parts), 25);</div><div class='add'>+	kirkwood_i2c_init();</div><div class='add'>+	i2c_register_board_info(0, iconnect_board_info,</div><div class='add'>+		ARRAY_SIZE(iconnect_board_info));</div><div class='add'>+</div><div class='add'>+	kirkwood_ehci_init();</div><div class='add'>+	kirkwood_ge00_init(&amp;iconnect_ge00_data);</div><div class='add'>+</div><div class='add'>+	platform_device_register(&amp;iconnect_button_device);</div><div class='add'>+	platform_device_register(&amp;iconnect_leds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init iconnect_pci_init(void)</div><div class='add'>+{</div><div class='add'>+	if (of_machine_is_compatible("iom,iconnect"))</div><div class='add'>+		kirkwood_pcie_init(KW_PCIE0);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(iconnect_pci_init);</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c<br/>index a02cae881f2f..25fb3fd418ef 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/common.c</a></div><div class='hunk'>@@ -15,6 +15,8 @@</div><div class='ctx'> #include &lt;linux/ata_platform.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/nand.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;net/dsa.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/timex.h&gt;</div><div class='hunk'>@@ -31,6 +33,7 @@</div><div class='ctx'> #include &lt;plat/common.h&gt;</div><div class='ctx'> #include &lt;plat/time.h&gt;</div><div class='ctx'> #include &lt;plat/addr-map.h&gt;</div><div class='add'>+#include &lt;plat/mv_xor.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -60,20 +63,188 @@ void __init kirkwood_map_io(void)</div><div class='ctx'> 	iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Default clock control bits.  Any bit _not_ set in this variable</div><div class='del'>- * will be cleared from the hardware after platform devices have been</div><div class='del'>- * registered.  Some reserved bits must be set to 1.</div><div class='del'>- */</div><div class='del'>-unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;</div><div class='add'>+/*****************************************************************************</div><div class='add'>+ * CLK tree</div><div class='add'>+ ****************************************************************************/</div><div class='add'>+</div><div class='add'>+static void disable_sata0(void)</div><div class='add'>+{</div><div class='add'>+	/* Disable PLL and IVREF */</div><div class='add'>+	writel(readl(SATA0_PHY_MODE_2) &amp; ~0xf, SATA0_PHY_MODE_2);</div><div class='add'>+	/* Disable PHY */</div><div class='add'>+	writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disable_sata1(void)</div><div class='add'>+{</div><div class='add'>+	/* Disable PLL and IVREF */</div><div class='add'>+	writel(readl(SATA1_PHY_MODE_2) &amp; ~0xf, SATA1_PHY_MODE_2);</div><div class='add'>+	/* Disable PHY */</div><div class='add'>+	writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disable_pcie0(void)</div><div class='add'>+{</div><div class='add'>+	writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);</div><div class='add'>+	while (1)</div><div class='add'>+		if (readl(PCIE_STATUS) &amp; 0x1)</div><div class='add'>+			break;</div><div class='add'>+	writel(readl(PCIE_LINK_CTRL) &amp; ~0x10, PCIE_LINK_CTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disable_pcie1(void)</div><div class='add'>+{</div><div class='add'>+	u32 dev, rev;</div><div class='add'>+</div><div class='add'>+	kirkwood_pcie_id(&amp;dev, &amp;rev);</div><div class='add'>+</div><div class='add'>+	if (dev == MV88F6282_DEV_ID) {</div><div class='add'>+		writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);</div><div class='add'>+		while (1)</div><div class='add'>+			if (readl(PCIE1_STATUS) &amp; 0x1)</div><div class='add'>+				break;</div><div class='add'>+		writel(readl(PCIE1_LINK_CTRL) &amp; ~0x10, PCIE1_LINK_CTRL);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* An extended version of the gated clk. This calls fn() before</div><div class='add'>+ * disabling the clock. We use this to turn off PHYs etc. */</div><div class='add'>+struct clk_gate_fn {</div><div class='add'>+	struct clk_gate gate;</div><div class='add'>+	void (*fn)(void);</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+#define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate)</div><div class='add'>+#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)</div><div class='add'>+</div><div class='add'>+static void clk_gate_fn_disable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_gate *gate = to_clk_gate(hw);</div><div class='add'>+	struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);</div><div class='add'>+</div><div class='add'>+	if (gate_fn-&gt;fn)</div><div class='add'>+		gate_fn-&gt;fn();</div><div class='add'>+</div><div class='add'>+	clk_gate_ops.disable(hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_ops clk_gate_fn_ops;</div><div class='add'>+</div><div class='add'>+static struct clk __init *clk_register_gate_fn(struct device *dev,</div><div class='add'>+		const char *name,</div><div class='add'>+		const char *parent_name, unsigned long flags,</div><div class='add'>+		void __iomem *reg, u8 bit_idx,</div><div class='add'>+		u8 clk_gate_flags, spinlock_t *lock,</div><div class='add'>+		void (*fn)(void))</div><div class='add'>+{</div><div class='add'>+	struct clk_gate_fn *gate_fn;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+</div><div class='add'>+	gate_fn = kzalloc(sizeof(struct clk_gate_fn), GFP_KERNEL);</div><div class='add'>+	if (!gate_fn) {</div><div class='add'>+		pr_err("%s: could not allocate gated clk\n", __func__);</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_gate_fn_ops;</div><div class='add'>+	init.flags = flags;</div><div class='add'>+	init.parent_names = (parent_name ? &amp;parent_name : NULL);</div><div class='add'>+	init.num_parents = (parent_name ? 1 : 0);</div><div class='add'>+</div><div class='add'>+	/* struct clk_gate assignments */</div><div class='add'>+	gate_fn-&gt;gate.reg = reg;</div><div class='add'>+	gate_fn-&gt;gate.bit_idx = bit_idx;</div><div class='add'>+	gate_fn-&gt;gate.flags = clk_gate_flags;</div><div class='add'>+	gate_fn-&gt;gate.lock = lock;</div><div class='add'>+	gate_fn-&gt;gate.hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	/* ops is the gate ops, but with our disable function */</div><div class='add'>+	if (clk_gate_fn_ops.disable != clk_gate_fn_disable) {</div><div class='add'>+		clk_gate_fn_ops = clk_gate_ops;</div><div class='add'>+		clk_gate_fn_ops.disable = clk_gate_fn_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk = clk_register(dev, &amp;gate_fn-&gt;gate.hw);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(gate_fn);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEFINE_SPINLOCK(gating_lock);</div><div class='add'>+static struct clk *tclk;</div><div class='add'>+</div><div class='add'>+static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)</div><div class='add'>+{</div><div class='add'>+	return clk_register_gate(NULL, name, "tclk", 0,</div><div class='add'>+				 (void __iomem *)CLOCK_GATING_CTRL,</div><div class='add'>+				 bit_idx, 0, &amp;gating_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk __init *kirkwood_register_gate_fn(const char *name,</div><div class='add'>+						    u8 bit_idx,</div><div class='add'>+						    void (*fn)(void))</div><div class='add'>+{</div><div class='add'>+	return clk_register_gate_fn(NULL, name, "tclk", 0,</div><div class='add'>+				    (void __iomem *)CLOCK_GATING_CTRL,</div><div class='add'>+				    bit_idx, 0, &amp;gating_lock, fn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init kirkwood_clk_init(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *runit, *ge0, *ge1, *sata0, *sata1, *usb0, *sdio;</div><div class='add'>+	struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio;</div><div class='add'>+</div><div class='add'>+	tclk = clk_register_fixed_rate(NULL, "tclk", NULL,</div><div class='add'>+				       CLK_IS_ROOT, kirkwood_tclk);</div><div class='add'>+</div><div class='add'>+	runit = kirkwood_register_gate("runit",  CGC_BIT_RUNIT);</div><div class='add'>+	ge0 = kirkwood_register_gate("ge0",    CGC_BIT_GE0);</div><div class='add'>+	ge1 = kirkwood_register_gate("ge1",    CGC_BIT_GE1);</div><div class='add'>+	sata0 = kirkwood_register_gate_fn("sata0",  CGC_BIT_SATA0,</div><div class='add'>+					  disable_sata0);</div><div class='add'>+	sata1 = kirkwood_register_gate_fn("sata1",  CGC_BIT_SATA1,</div><div class='add'>+					  disable_sata1);</div><div class='add'>+	usb0 = kirkwood_register_gate("usb0",   CGC_BIT_USB0);</div><div class='add'>+	sdio = kirkwood_register_gate("sdio",   CGC_BIT_SDIO);</div><div class='add'>+	crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);</div><div class='add'>+	xor0 = kirkwood_register_gate("xor0",   CGC_BIT_XOR0);</div><div class='add'>+	xor1 = kirkwood_register_gate("xor1",   CGC_BIT_XOR1);</div><div class='add'>+	pex0 = kirkwood_register_gate_fn("pex0",   CGC_BIT_PEX0,</div><div class='add'>+					 disable_pcie0);</div><div class='add'>+	pex1 = kirkwood_register_gate_fn("pex1",   CGC_BIT_PEX1,</div><div class='add'>+					 disable_pcie1);</div><div class='add'>+	audio = kirkwood_register_gate("audio",  CGC_BIT_AUDIO);</div><div class='add'>+	kirkwood_register_gate("tdm",    CGC_BIT_TDM);</div><div class='add'>+	kirkwood_register_gate("tsu",    CGC_BIT_TSU);</div><div class='add'>+</div><div class='add'>+	/* clkdev entries, mapping clks to devices */</div><div class='add'>+	orion_clkdev_add(NULL, "orion_spi.0", runit);</div><div class='add'>+	orion_clkdev_add(NULL, "orion_spi.1", runit);</div><div class='add'>+	orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0);</div><div class='add'>+	orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1);</div><div class='add'>+	orion_clkdev_add(NULL, "orion_wdt", tclk);</div><div class='add'>+	orion_clkdev_add("0", "sata_mv.0", sata0);</div><div class='add'>+	orion_clkdev_add("1", "sata_mv.0", sata1);</div><div class='add'>+	orion_clkdev_add(NULL, "orion-ehci.0", usb0);</div><div class='add'>+	orion_clkdev_add(NULL, "orion_nand", runit);</div><div class='add'>+	orion_clkdev_add(NULL, "mvsdio", sdio);</div><div class='add'>+	orion_clkdev_add(NULL, "mv_crypto", crypto);</div><div class='add'>+	orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0);</div><div class='add'>+	orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1);</div><div class='add'>+	orion_clkdev_add("0", "pcie", pex0);</div><div class='add'>+	orion_clkdev_add("1", "pcie", pex1);</div><div class='add'>+	orion_clkdev_add(NULL, "kirkwood-i2s", audio);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='ctx'>  * EHCI0</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init kirkwood_ehci_init(void)</div><div class='ctx'> {</div><div class='del'>-	kirkwood_clk_ctrl |= CGC_USB0;</div><div class='ctx'> 	orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -83,11 +254,9 @@ void __init kirkwood_ehci_init(void)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)</div><div class='ctx'> {</div><div class='del'>-	kirkwood_clk_ctrl |= CGC_GE0;</div><div class='del'>-</div><div class='ctx'> 	orion_ge00_init(eth_data,</div><div class='ctx'> 			GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,</div><div class='del'>-			IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);</div><div class='add'>+			IRQ_KIRKWOOD_GE00_ERR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -96,12 +265,9 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)</div><div class='ctx'> {</div><div class='del'>-</div><div class='del'>-	kirkwood_clk_ctrl |= CGC_GE1;</div><div class='del'>-</div><div class='ctx'> 	orion_ge01_init(eth_data,</div><div class='ctx'> 			GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,</div><div class='del'>-			IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);</div><div class='add'>+			IRQ_KIRKWOOD_GE01_ERR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -143,7 +309,6 @@ static struct platform_device kirkwood_nand_flash = {</div><div class='ctx'> void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,</div><div class='ctx'> 			       int chip_delay)</div><div class='ctx'> {</div><div class='del'>-	kirkwood_clk_ctrl |= CGC_RUNIT;</div><div class='ctx'> 	kirkwood_nand_data.parts = parts;</div><div class='ctx'> 	kirkwood_nand_data.nr_parts = nr_parts;</div><div class='ctx'> 	kirkwood_nand_data.chip_delay = chip_delay;</div><div class='hunk'>@@ -153,7 +318,6 @@ void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,</div><div class='ctx'> void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,</div><div class='ctx'> 				   int (*dev_ready)(struct mtd_info *))</div><div class='ctx'> {</div><div class='del'>-	kirkwood_clk_ctrl |= CGC_RUNIT;</div><div class='ctx'> 	kirkwood_nand_data.parts = parts;</div><div class='ctx'> 	kirkwood_nand_data.nr_parts = nr_parts;</div><div class='ctx'> 	kirkwood_nand_data.dev_ready = dev_ready;</div><div class='hunk'>@@ -174,10 +338,6 @@ static void __init kirkwood_rtc_init(void)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)</div><div class='ctx'> {</div><div class='del'>-	kirkwood_clk_ctrl |= CGC_SATA0;</div><div class='del'>-	if (sata_data-&gt;n_ports &gt; 1)</div><div class='del'>-		kirkwood_clk_ctrl |= CGC_SATA1;</div><div class='del'>-</div><div class='ctx'> 	orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -220,7 +380,6 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)</div><div class='ctx'> 		mvsdio_data-&gt;clock = 100000000;</div><div class='ctx'> 	else</div><div class='ctx'> 		mvsdio_data-&gt;clock = 200000000;</div><div class='del'>-	kirkwood_clk_ctrl |= CGC_SDIO;</div><div class='ctx'> 	kirkwood_sdio.dev.platform_data = mvsdio_data;</div><div class='ctx'> 	platform_device_register(&amp;kirkwood_sdio);</div><div class='ctx'> }</div><div class='hunk'>@@ -231,8 +390,7 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init kirkwood_spi_init()</div><div class='ctx'> {</div><div class='del'>-	kirkwood_clk_ctrl |= CGC_RUNIT;</div><div class='del'>-	orion_spi_init(SPI_PHYS_BASE, kirkwood_tclk);</div><div class='add'>+	orion_spi_init(SPI_PHYS_BASE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -252,7 +410,7 @@ void __init kirkwood_i2c_init(void)</div><div class='ctx'> void __init kirkwood_uart0_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,</div><div class='del'>-			 IRQ_KIRKWOOD_UART_0, kirkwood_tclk);</div><div class='add'>+			 IRQ_KIRKWOOD_UART_0, tclk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -262,7 +420,7 @@ void __init kirkwood_uart0_init(void)</div><div class='ctx'> void __init kirkwood_uart1_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,</div><div class='del'>-			 IRQ_KIRKWOOD_UART_1, kirkwood_tclk);</div><div class='add'>+			 IRQ_KIRKWOOD_UART_1, tclk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -270,7 +428,6 @@ void __init kirkwood_uart1_init(void)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init kirkwood_crypto_init(void)</div><div class='ctx'> {</div><div class='del'>-	kirkwood_clk_ctrl |= CGC_CRYPTO;</div><div class='ctx'> 	orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE,</div><div class='ctx'> 			  KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO);</div><div class='ctx'> }</div><div class='hunk'>@@ -281,8 +438,6 @@ void __init kirkwood_crypto_init(void)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init kirkwood_xor0_init(void)</div><div class='ctx'> {</div><div class='del'>-	kirkwood_clk_ctrl |= CGC_XOR0;</div><div class='del'>-</div><div class='ctx'> 	orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,</div><div class='ctx'> 			IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);</div><div class='ctx'> }</div><div class='hunk'>@@ -293,8 +448,6 @@ void __init kirkwood_xor0_init(void)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init kirkwood_xor1_init(void)</div><div class='ctx'> {</div><div class='del'>-	kirkwood_clk_ctrl |= CGC_XOR1;</div><div class='del'>-</div><div class='ctx'> 	orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,</div><div class='ctx'> 			IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);</div><div class='ctx'> }</div><div class='hunk'>@@ -305,7 +458,7 @@ void __init kirkwood_xor1_init(void)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init kirkwood_wdt_init(void)</div><div class='ctx'> {</div><div class='del'>-	orion_wdt_init(kirkwood_tclk);</div><div class='add'>+	orion_wdt_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -381,7 +534,6 @@ static struct platform_device kirkwood_pcm_device = {</div><div class='ctx'> </div><div class='ctx'> void __init kirkwood_audio_init(void)</div><div class='ctx'> {</div><div class='del'>-	kirkwood_clk_ctrl |= CGC_AUDIO;</div><div class='ctx'> 	platform_device_register(&amp;kirkwood_i2s_device);</div><div class='ctx'> 	platform_device_register(&amp;kirkwood_pcm_device);</div><div class='ctx'> }</div><div class='hunk'>@@ -465,6 +617,9 @@ void __init kirkwood_init(void)</div><div class='ctx'> 	kirkwood_l2_init();</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+	/* Setup root of clk tree */</div><div class='add'>+	kirkwood_clk_init();</div><div class='add'>+</div><div class='ctx'> 	/* internal devices that every board has */</div><div class='ctx'> 	kirkwood_rtc_init();</div><div class='ctx'> 	kirkwood_wdt_init();</div><div class='hunk'>@@ -477,61 +632,6 @@ void __init kirkwood_init(void)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init kirkwood_clock_gate(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int curr = readl(CLOCK_GATING_CTRL);</div><div class='del'>-	u32 dev, rev;</div><div class='del'>-</div><div class='del'>-	kirkwood_pcie_id(&amp;dev, &amp;rev);</div><div class='del'>-	printk(KERN_DEBUG "Gating clock of unused units\n");</div><div class='del'>-	printk(KERN_DEBUG "before: 0x%08x\n", curr);</div><div class='del'>-</div><div class='del'>-	/* Make sure those units are accessible */</div><div class='del'>-	writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);</div><div class='del'>-</div><div class='del'>-	/* For SATA: first shutdown the phy */</div><div class='del'>-	if (!(kirkwood_clk_ctrl &amp; CGC_SATA0)) {</div><div class='del'>-		/* Disable PLL and IVREF */</div><div class='del'>-		writel(readl(SATA0_PHY_MODE_2) &amp; ~0xf, SATA0_PHY_MODE_2);</div><div class='del'>-		/* Disable PHY */</div><div class='del'>-		writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);</div><div class='del'>-	}</div><div class='del'>-	if (!(kirkwood_clk_ctrl &amp; CGC_SATA1)) {</div><div class='del'>-		/* Disable PLL and IVREF */</div><div class='del'>-		writel(readl(SATA1_PHY_MODE_2) &amp; ~0xf, SATA1_PHY_MODE_2);</div><div class='del'>-		/* Disable PHY */</div><div class='del'>-		writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);</div><div class='del'>-	}</div><div class='del'>-	</div><div class='del'>-	/* For PCIe: first shutdown the phy */</div><div class='del'>-	if (!(kirkwood_clk_ctrl &amp; CGC_PEX0)) {</div><div class='del'>-		writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);</div><div class='del'>-		while (1)</div><div class='del'>-			if (readl(PCIE_STATUS) &amp; 0x1)</div><div class='del'>-				break;</div><div class='del'>-		writel(readl(PCIE_LINK_CTRL) &amp; ~0x10, PCIE_LINK_CTRL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* For PCIe 1: first shutdown the phy */</div><div class='del'>-	if (dev == MV88F6282_DEV_ID) {</div><div class='del'>-		if (!(kirkwood_clk_ctrl &amp; CGC_PEX1)) {</div><div class='del'>-			writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);</div><div class='del'>-			while (1)</div><div class='del'>-				if (readl(PCIE1_STATUS) &amp; 0x1)</div><div class='del'>-					break;</div><div class='del'>-			writel(readl(PCIE1_LINK_CTRL) &amp; ~0x10, PCIE1_LINK_CTRL);</div><div class='del'>-		}</div><div class='del'>-	} else  /* keep this bit set for devices that don't have PCIe1 */</div><div class='del'>-		kirkwood_clk_ctrl |= CGC_PEX1;</div><div class='del'>-</div><div class='del'>-	/* Now gate clock the required units */</div><div class='del'>-	writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);</div><div class='del'>-	printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-late_initcall(kirkwood_clock_gate);</div><div class='del'>-</div><div class='ctx'> void kirkwood_restart(char mode, const char *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h<br/>index fa8e7689c436..9248fa2c165b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/common.h</a></div><div class='hunk'>@@ -50,6 +50,7 @@ void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay);</div><div class='ctx'> void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *));</div><div class='ctx'> void kirkwood_audio_init(void);</div><div class='ctx'> void kirkwood_restart(char, const char *);</div><div class='add'>+void kirkwood_clk_init(void);</div><div class='ctx'> </div><div class='ctx'> /* board init functions for boards not fully converted to fdt */</div><div class='ctx'> #ifdef CONFIG_MACH_DREAMPLUG_DT</div><div class='hunk'>@@ -58,6 +59,24 @@ void dreamplug_init(void);</div><div class='ctx'> static inline void dreamplug_init(void) {};</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MACH_DLINK_KIRKWOOD_DT</div><div class='add'>+void dnskw_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline void dnskw_init(void) {};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MACH_ICONNECT_DT</div><div class='add'>+void iconnect_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline void iconnect_init(void) {};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MACH_IB62X0_DT</div><div class='add'>+void ib62x0_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline void ib62x0_init(void) {};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* early init functions not converted to fdt yet */</div><div class='ctx'> char *kirkwood_id(void);</div><div class='ctx'> void kirkwood_l2_init(void);</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h<br/>index 957bd7997d7e..3eee37a3b501 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/include/mach/bridge-regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/include/mach/bridge-regs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/include/mach/bridge-regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/include/mach/bridge-regs.h</a></div><div class='hunk'>@@ -43,6 +43,22 @@</div><div class='ctx'> #define L2_WRITETHROUGH		0x00000010</div><div class='ctx'> </div><div class='ctx'> #define CLOCK_GATING_CTRL	(BRIDGE_VIRT_BASE | 0x11c)</div><div class='add'>+#define CGC_BIT_GE0		(0)</div><div class='add'>+#define CGC_BIT_PEX0		(2)</div><div class='add'>+#define CGC_BIT_USB0		(3)</div><div class='add'>+#define CGC_BIT_SDIO		(4)</div><div class='add'>+#define CGC_BIT_TSU		(5)</div><div class='add'>+#define CGC_BIT_DUNIT		(6)</div><div class='add'>+#define CGC_BIT_RUNIT		(7)</div><div class='add'>+#define CGC_BIT_XOR0		(8)</div><div class='add'>+#define CGC_BIT_AUDIO		(9)</div><div class='add'>+#define CGC_BIT_SATA0		(14)</div><div class='add'>+#define CGC_BIT_SATA1		(15)</div><div class='add'>+#define CGC_BIT_XOR1		(16)</div><div class='add'>+#define CGC_BIT_CRYPTO		(17)</div><div class='add'>+#define CGC_BIT_PEX1		(18)</div><div class='add'>+#define CGC_BIT_GE1		(19)</div><div class='add'>+#define CGC_BIT_TDM		(20)</div><div class='ctx'> #define CGC_GE0			(1 &lt;&lt; 0)</div><div class='ctx'> #define CGC_PEX0		(1 &lt;&lt; 2)</div><div class='ctx'> #define CGC_USB0		(1 &lt;&lt; 3)</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c<br/>index 85f6169c2484..6d8364a97810 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> #include &lt;linux/gpio_keys.h&gt;</div><div class='ctx'> #include &lt;linux/spi/flash.h&gt;</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='del'>-#include &lt;linux/spi/orion_spi.h&gt;</div><div class='ctx'> #include &lt;net/dsa.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c<br/>index f56a0118c1bb..6e8b2efa3c35 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/pcie.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/pcie.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/pcie.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;video/vga.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/mach/pci.h&gt;</div><div class='hunk'>@@ -19,6 +20,23 @@</div><div class='ctx'> #include &lt;plat/addr-map.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='add'>+static void kirkwood_enable_pcie_clk(const char *port)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk;</div><div class='add'>+</div><div class='add'>+	clk = clk_get_sys("pcie", port);</div><div class='add'>+	if (IS_ERR(clk)) {</div><div class='add'>+		printk(KERN_ERR "PCIE clock %s missing\n", port);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	clk_prepare_enable(clk);</div><div class='add'>+	clk_put(clk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function is called very early in the boot when probing the</div><div class='add'>+   hardware to determine what we actually are, and what rate tclk is</div><div class='add'>+   ticking at. Hence calling kirkwood_enable_pcie_clk() is not</div><div class='add'>+   possible since the clk tree has not been created yet. */</div><div class='ctx'> void kirkwood_enable_pcie(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 curr = readl(CLOCK_GATING_CTRL);</div><div class='hunk'>@@ -26,7 +44,7 @@ void kirkwood_enable_pcie(void)</div><div class='ctx'> 		writel(curr | CGC_PEX0, CLOCK_GATING_CTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init kirkwood_pcie_id(u32 *dev, u32 *rev)</div><div class='add'>+void kirkwood_pcie_id(u32 *dev, u32 *rev)</div><div class='ctx'> {</div><div class='ctx'> 	kirkwood_enable_pcie();</div><div class='ctx'> 	*dev = orion_pcie_dev_id((void __iomem *)PCIE_VIRT_BASE);</div><div class='hunk'>@@ -44,12 +62,6 @@ struct pcie_port {</div><div class='ctx'> static int pcie_port_map[2];</div><div class='ctx'> static int num_pcie_ports;</div><div class='ctx'> </div><div class='del'>-static inline struct pcie_port *bus_to_port(struct pci_bus *bus)</div><div class='del'>-{</div><div class='del'>-	struct pci_sys_data *sys = bus-&gt;sysdata;</div><div class='del'>-	return sys-&gt;private_data;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -79,7 +91,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)</div><div class='ctx'> static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,</div><div class='ctx'> 			int size, u32 *val)</div><div class='ctx'> {</div><div class='del'>-	struct pcie_port *pp = bus_to_port(bus);</div><div class='add'>+	struct pci_sys_data *sys = bus-&gt;sysdata;</div><div class='add'>+	struct pcie_port *pp = sys-&gt;private_data;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -98,7 +111,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,</div><div class='ctx'> static int pcie_wr_conf(struct pci_bus *bus, u32 devfn,</div><div class='ctx'> 			int where, int size, u32 val)</div><div class='ctx'> {</div><div class='del'>-	struct pcie_port *pp = bus_to_port(bus);</div><div class='add'>+	struct pci_sys_data *sys = bus-&gt;sysdata;</div><div class='add'>+	struct pcie_port *pp = sys-&gt;private_data;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -163,7 +177,6 @@ static void __init pcie1_ioresources_init(struct pcie_port *pp)</div><div class='ctx'> </div><div class='ctx'> static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> {</div><div class='del'>-	extern unsigned int kirkwood_clk_ctrl;</div><div class='ctx'> 	struct pcie_port *pp;</div><div class='ctx'> 	int index;</div><div class='ctx'> </div><div class='hunk'>@@ -182,11 +195,11 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> </div><div class='ctx'> 	switch (index) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		kirkwood_clk_ctrl |= CGC_PEX0;</div><div class='add'>+		kirkwood_enable_pcie_clk("0");</div><div class='ctx'> 		pcie0_ioresources_init(pp);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='del'>-		kirkwood_clk_ctrl |= CGC_PEX1;</div><div class='add'>+		kirkwood_enable_pcie_clk("1");</div><div class='ctx'> 		pcie1_ioresources_init(pp);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -248,13 +261,13 @@ kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys)</div><div class='ctx'> static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> 	u8 pin)</div><div class='ctx'> {</div><div class='del'>-	struct pcie_port *pp = bus_to_port(dev-&gt;bus);</div><div class='add'>+	struct pci_sys_data *sys = dev-&gt;sysdata;</div><div class='add'>+	struct pcie_port *pp = sys-&gt;private_data;</div><div class='ctx'> </div><div class='ctx'> 	return pp-&gt;irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci kirkwood_pci __initdata = {</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= kirkwood_pcie_setup,</div><div class='ctx'> 	.scan		= kirkwood_pcie_scan_bus,</div><div class='ctx'> 	.map_irq	= kirkwood_pcie_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c<br/>index fd2c9c8b6831..f742a66a7045 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/rd88f6192-nas-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/rd88f6192-nas-setup.c</a></div><div class='hunk'>@@ -16,7 +16,6 @@</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/spi/flash.h&gt;</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='del'>-#include &lt;linux/spi/orion_spi.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;mach/kirkwood.h&gt;</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c<br/>index f9d2a11b7f96..bad738e44044 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/t5325-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/t5325-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/t5325-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/t5325-setup.c</a></div><div class='hunk'>@@ -16,7 +16,6 @@</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='ctx'> #include &lt;linux/spi/flash.h&gt;</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='del'>-#include &lt;linux/spi/orion_spi.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/mv643xx_eth.h&gt;</div><div class='ctx'> #include &lt;linux/ata_platform.h&gt;</div><div class='head'>diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c<br/>index 24294b2bc469..8943ede29b44 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/tsx1x-common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-kirkwood/tsx1x-common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-kirkwood/tsx1x-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-kirkwood/tsx1x-common.c</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='ctx'> #include &lt;linux/spi/flash.h&gt;</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='del'>-#include &lt;linux/spi/orion_spi.h&gt;</div><div class='ctx'> #include &lt;linux/serial_reg.h&gt;</div><div class='ctx'> #include &lt;mach/kirkwood.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='head'>diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c<br/>index acc701435817..bb18193b4bac 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ks8695/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ks8695/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ks8695/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ks8695/pci.c</a></div><div class='hunk'>@@ -141,12 +141,6 @@ static struct pci_ops ks8695_pci_ops = {</div><div class='ctx'> 	.write	= ks8695_pci_writeconfig,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct pci_bus* __init ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	return pci_scan_root_bus(NULL, sys-&gt;busnr, &amp;ks8695_pci_ops, sys,</div><div class='del'>-				 &amp;sys-&gt;resources);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct resource pci_mem = {</div><div class='ctx'> 	.name	= "PCI Memory space",</div><div class='ctx'> 	.start	= KS8695_PCIMEM_PA,</div><div class='hunk'>@@ -302,11 +296,10 @@ static void ks8695_show_pciregs(void)</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci ks8695_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 1,</div><div class='add'>+	.ops		= &amp;ks8695_pci_ops,</div><div class='ctx'> 	.preinit	= ks8695_pci_preinit,</div><div class='ctx'> 	.setup		= ks8695_pci_setup,</div><div class='del'>-	.scan		= ks8695_pci_scan_bus,</div><div class='ctx'> 	.postinit	= NULL,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.map_irq	= NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-lpc32xx/Kconfig b/arch/arm/mach-lpc32xx/Kconfig<br/>index 75946ac89ee9..e0b3eee83834 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-lpc32xx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/Kconfig</a></div><div class='hunk'>@@ -29,30 +29,4 @@ config ARCH_LPC32XX_UART6_SELECT</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='del'>-menu "LPC32XX chip components"</div><div class='del'>-</div><div class='del'>-config ARCH_LPC32XX_IRAM_FOR_NET</div><div class='del'>-	bool "Use IRAM for network buffers"</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  Say Y here to use the LPC internal fast IRAM (i.e. 256KB SRAM) as</div><div class='del'>-	  network buffer.  If the total combined required buffer sizes is</div><div class='del'>-	  larger than the size of IRAM, then SDRAM will be used instead.</div><div class='del'>-</div><div class='del'>-	  This can be enabled safely if the IRAM is not intended for other</div><div class='del'>-	  uses.</div><div class='del'>-</div><div class='del'>-config ARCH_LPC32XX_MII_SUPPORT</div><div class='del'>-	bool "Check to enable MII support or leave disabled for RMII support"</div><div class='del'>-	help</div><div class='del'>-	  Say Y here to enable MII support, or N for RMII support. Regardless of</div><div class='del'>-	  which support is selected, the ethernet interface driver needs to be</div><div class='del'>-	  selected in the device driver networking section.</div><div class='del'>-</div><div class='del'>-	  The PHY3250 reference board uses RMII, so users of this board should</div><div class='del'>-	  say N.</div><div class='del'>-</div><div class='del'>-endmenu</div><div class='del'>-</div><div class='ctx'> endif</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c<br/>index 2fc24ca12054..f6a3ffec1f4b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-lpc32xx/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/clock.c</a></div><div class='hunk'>@@ -1095,49 +1095,42 @@ struct clk *clk_get_parent(struct clk *clk)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(clk_get_parent);</div><div class='ctx'> </div><div class='del'>-#define _REGISTER_CLOCK(d, n, c) \</div><div class='del'>-	{ \</div><div class='del'>-		.dev_id = (d), \</div><div class='del'>-		.con_id = (n), \</div><div class='del'>-		.clk = &amp;(c), \</div><div class='del'>-	},</div><div class='del'>-</div><div class='ctx'> static struct clk_lookup lookups[] = {</div><div class='del'>-	_REGISTER_CLOCK(NULL, "osc_32KHz", osc_32KHz)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "osc_pll397", osc_pll397)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "osc_main", osc_main)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "sys_ck", clk_sys)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "arm_pll_ck", clk_armpll)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "ck_pll5", clk_usbpll)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "hclk_ck", clk_hclk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "pclk_ck", clk_pclk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "timer0_ck", clk_timer0)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "timer1_ck", clk_timer1)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "timer2_ck", clk_timer2)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "timer3_ck", clk_timer3)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "vfp9_ck", clk_vfp9)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "clk_dmac", clk_dma)</div><div class='del'>-	_REGISTER_CLOCK("pnx4008-watchdog", NULL, clk_wdt)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "uart3_ck", clk_uart3)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "uart4_ck", clk_uart4)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "uart5_ck", clk_uart5)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "uart6_ck", clk_uart6)</div><div class='del'>-	_REGISTER_CLOCK("pnx-i2c.0", NULL, clk_i2c0)</div><div class='del'>-	_REGISTER_CLOCK("pnx-i2c.1", NULL, clk_i2c1)</div><div class='del'>-	_REGISTER_CLOCK("pnx-i2c.2", NULL, clk_i2c2)</div><div class='del'>-	_REGISTER_CLOCK("dev:ssp0", NULL, clk_ssp0)</div><div class='del'>-	_REGISTER_CLOCK("dev:ssp1", NULL, clk_ssp1)</div><div class='del'>-	_REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan)</div><div class='del'>-	_REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand)</div><div class='del'>-	_REGISTER_CLOCK("lpc32xx-adc", NULL, clk_adc)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "i2s0_ck", clk_i2s0)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "i2s1_ck", clk_i2s1)</div><div class='del'>-	_REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)</div><div class='del'>-	_REGISTER_CLOCK("dev:mmc0", NULL, clk_mmc)</div><div class='del'>-	_REGISTER_CLOCK("lpc-eth.0", NULL, clk_net)</div><div class='del'>-	_REGISTER_CLOCK("dev:clcd", NULL, clk_lcd)</div><div class='del'>-	_REGISTER_CLOCK("lpc32xx_udc", "ck_usbd", clk_usbd)</div><div class='del'>-	_REGISTER_CLOCK("lpc32xx_rtc", NULL, clk_rtc)</div><div class='add'>+	CLKDEV_INIT(NULL, "osc_32KHz", &amp;osc_32KHz),</div><div class='add'>+	CLKDEV_INIT(NULL, "osc_pll397", &amp;osc_pll397),</div><div class='add'>+	CLKDEV_INIT(NULL, "osc_main", &amp;osc_main),</div><div class='add'>+	CLKDEV_INIT(NULL, "sys_ck", &amp;clk_sys),</div><div class='add'>+	CLKDEV_INIT(NULL, "arm_pll_ck", &amp;clk_armpll),</div><div class='add'>+	CLKDEV_INIT(NULL, "ck_pll5", &amp;clk_usbpll),</div><div class='add'>+	CLKDEV_INIT(NULL, "hclk_ck", &amp;clk_hclk),</div><div class='add'>+	CLKDEV_INIT(NULL, "pclk_ck", &amp;clk_pclk),</div><div class='add'>+	CLKDEV_INIT(NULL, "timer0_ck", &amp;clk_timer0),</div><div class='add'>+	CLKDEV_INIT(NULL, "timer1_ck", &amp;clk_timer1),</div><div class='add'>+	CLKDEV_INIT(NULL, "timer2_ck", &amp;clk_timer2),</div><div class='add'>+	CLKDEV_INIT(NULL, "timer3_ck", &amp;clk_timer3),</div><div class='add'>+	CLKDEV_INIT(NULL, "vfp9_ck", &amp;clk_vfp9),</div><div class='add'>+	CLKDEV_INIT("pl08xdmac", NULL, &amp;clk_dma),</div><div class='add'>+	CLKDEV_INIT("4003c000.watchdog", NULL, &amp;clk_wdt),</div><div class='add'>+	CLKDEV_INIT(NULL, "uart3_ck", &amp;clk_uart3),</div><div class='add'>+	CLKDEV_INIT(NULL, "uart4_ck", &amp;clk_uart4),</div><div class='add'>+	CLKDEV_INIT(NULL, "uart5_ck", &amp;clk_uart5),</div><div class='add'>+	CLKDEV_INIT(NULL, "uart6_ck", &amp;clk_uart6),</div><div class='add'>+	CLKDEV_INIT("400a0000.i2c", NULL, &amp;clk_i2c0),</div><div class='add'>+	CLKDEV_INIT("400a8000.i2c", NULL, &amp;clk_i2c1),</div><div class='add'>+	CLKDEV_INIT("31020300.i2c", NULL, &amp;clk_i2c2),</div><div class='add'>+	CLKDEV_INIT("dev:ssp0", NULL, &amp;clk_ssp0),</div><div class='add'>+	CLKDEV_INIT("dev:ssp1", NULL, &amp;clk_ssp1),</div><div class='add'>+	CLKDEV_INIT("lpc32xx_keys.0", NULL, &amp;clk_kscan),</div><div class='add'>+	CLKDEV_INIT("lpc32xx-nand.0", "nand_ck", &amp;clk_nand),</div><div class='add'>+	CLKDEV_INIT("40048000.adc", NULL, &amp;clk_adc),</div><div class='add'>+	CLKDEV_INIT(NULL, "i2s0_ck", &amp;clk_i2s0),</div><div class='add'>+	CLKDEV_INIT(NULL, "i2s1_ck", &amp;clk_i2s1),</div><div class='add'>+	CLKDEV_INIT("40048000.tsc", NULL, &amp;clk_tsc),</div><div class='add'>+	CLKDEV_INIT("20098000.sd", NULL, &amp;clk_mmc),</div><div class='add'>+	CLKDEV_INIT("31060000.ethernet", NULL, &amp;clk_net),</div><div class='add'>+	CLKDEV_INIT("dev:clcd", NULL, &amp;clk_lcd),</div><div class='add'>+	CLKDEV_INIT("31020000.usbd", "ck_usbd", &amp;clk_usbd),</div><div class='add'>+	CLKDEV_INIT("lpc32xx_rtc", NULL, &amp;clk_rtc),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init clk_init(void)</div><div class='head'>diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c<br/>index bbbf063a74c2..5c96057b6d78 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-lpc32xx/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/common.c</a></div><div class='hunk'>@@ -27,186 +27,11 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/i2c.h&gt;</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;mach/platform.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Watchdog timer</div><div class='del'>- */</div><div class='del'>-static struct resource watchdog_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = LPC32XX_WDTIM_BASE,</div><div class='del'>-		.end = LPC32XX_WDTIM_BASE + SZ_4K - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device lpc32xx_watchdog_device = {</div><div class='del'>-	.name = "pnx4008-watchdog",</div><div class='del'>-	.id = -1,</div><div class='del'>-	.num_resources = ARRAY_SIZE(watchdog_resources),</div><div class='del'>-	.resource = watchdog_resources,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * I2C busses</div><div class='del'>- */</div><div class='del'>-static struct i2c_pnx_data i2c0_data = {</div><div class='del'>-	.name = I2C_CHIP_NAME "1",</div><div class='del'>-	.base = LPC32XX_I2C1_BASE,</div><div class='del'>-	.irq = IRQ_LPC32XX_I2C_1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct i2c_pnx_data i2c1_data = {</div><div class='del'>-	.name = I2C_CHIP_NAME "2",</div><div class='del'>-	.base = LPC32XX_I2C2_BASE,</div><div class='del'>-	.irq = IRQ_LPC32XX_I2C_2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct i2c_pnx_data i2c2_data = {</div><div class='del'>-	.name = "USB-I2C",</div><div class='del'>-	.base = LPC32XX_OTG_I2C_BASE,</div><div class='del'>-	.irq = IRQ_LPC32XX_USB_I2C,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device lpc32xx_i2c0_device = {</div><div class='del'>-	.name = "pnx-i2c",</div><div class='del'>-	.id = 0,</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = &amp;i2c0_data,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device lpc32xx_i2c1_device = {</div><div class='del'>-	.name = "pnx-i2c",</div><div class='del'>-	.id = 1,</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = &amp;i2c1_data,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device lpc32xx_i2c2_device = {</div><div class='del'>-	.name = "pnx-i2c",</div><div class='del'>-	.id = 2,</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = &amp;i2c2_data,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* TSC (Touch Screen Controller) */</div><div class='del'>-</div><div class='del'>-static struct resource lpc32xx_tsc_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.start = LPC32XX_ADC_BASE,</div><div class='del'>-		.end = LPC32XX_ADC_BASE + SZ_4K - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	}, {</div><div class='del'>-		.start = IRQ_LPC32XX_TS_IRQ,</div><div class='del'>-		.end = IRQ_LPC32XX_TS_IRQ,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device lpc32xx_tsc_device = {</div><div class='del'>-	.name =  "ts-lpc32xx",</div><div class='del'>-	.id = -1,</div><div class='del'>-	.num_resources = ARRAY_SIZE(lpc32xx_tsc_resources),</div><div class='del'>-	.resource = lpc32xx_tsc_resources,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* RTC */</div><div class='del'>-</div><div class='del'>-static struct resource lpc32xx_rtc_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.start = LPC32XX_RTC_BASE,</div><div class='del'>-		.end = LPC32XX_RTC_BASE + SZ_4K - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},{</div><div class='del'>-		.start = IRQ_LPC32XX_RTC,</div><div class='del'>-		.end = IRQ_LPC32XX_RTC,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device lpc32xx_rtc_device = {</div><div class='del'>-	.name =  "rtc-lpc32xx",</div><div class='del'>-	.id = -1,</div><div class='del'>-	.num_resources = ARRAY_SIZE(lpc32xx_rtc_resources),</div><div class='del'>-	.resource = lpc32xx_rtc_resources,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ADC support</div><div class='del'>- */</div><div class='del'>-static struct resource adc_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.start = LPC32XX_ADC_BASE,</div><div class='del'>-		.end = LPC32XX_ADC_BASE + SZ_4K - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	}, {</div><div class='del'>-		.start = IRQ_LPC32XX_TS_IRQ,</div><div class='del'>-		.end = IRQ_LPC32XX_TS_IRQ,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct platform_device lpc32xx_adc_device = {</div><div class='del'>-	.name =  "lpc32xx-adc",</div><div class='del'>-	.id = -1,</div><div class='del'>-	.num_resources = ARRAY_SIZE(adc_resources),</div><div class='del'>-	.resource = adc_resources,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * USB support</div><div class='del'>- */</div><div class='del'>-/* The dmamask must be set for OHCI to work */</div><div class='del'>-static u64 ohci_dmamask = ~(u32) 0;</div><div class='del'>-static struct resource ohci_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.start = IO_ADDRESS(LPC32XX_USB_BASE),</div><div class='del'>-		.end = IO_ADDRESS(LPC32XX_USB_BASE + 0x100 - 1),</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	}, {</div><div class='del'>-		.start = IRQ_LPC32XX_USB_HOST,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-struct platform_device lpc32xx_ohci_device = {</div><div class='del'>-	.name = "usb-ohci",</div><div class='del'>-	.id = -1,</div><div class='del'>-	.dev = {</div><div class='del'>-		.dma_mask = &amp;ohci_dmamask,</div><div class='del'>-		.coherent_dma_mask = 0xFFFFFFFF,</div><div class='del'>-	},</div><div class='del'>-	.num_resources = ARRAY_SIZE(ohci_resources),</div><div class='del'>-	.resource = ohci_resources,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Network Support</div><div class='del'>- */</div><div class='del'>-static struct resource net_resources[] = {</div><div class='del'>-	[0] = DEFINE_RES_MEM(LPC32XX_ETHERNET_BASE, SZ_4K),</div><div class='del'>-	[1] = DEFINE_RES_MEM(LPC32XX_IRAM_BASE, SZ_128K),</div><div class='del'>-	[2] = DEFINE_RES_IRQ(IRQ_LPC32XX_ETHERNET),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static u64 lpc32xx_mac_dma_mask = 0xffffffffUL;</div><div class='del'>-struct platform_device lpc32xx_net_device = {</div><div class='del'>-	.name = "lpc-eth",</div><div class='del'>-	.id = 0,</div><div class='del'>-	.dev = {</div><div class='del'>-		.dma_mask = &amp;lpc32xx_mac_dma_mask,</div><div class='del'>-		.coherent_dma_mask = 0xffffffffUL,</div><div class='del'>-	},</div><div class='del'>-	.num_resources = ARRAY_SIZE(net_resources),</div><div class='del'>-	.resource = net_resources,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Returns the unique ID for the device</div><div class='ctx'>  */</div><div class='ctx'> void lpc32xx_get_uid(u32 devid[4])</div><div class='hunk'>@@ -398,3 +223,16 @@ void lpc23xx_restart(char mode, const char *cmd)</div><div class='ctx'> 	while (1)</div><div class='ctx'> 		;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static int __init lpc32xx_display_uid(void)</div><div class='add'>+{</div><div class='add'>+	u32 uid[4];</div><div class='add'>+</div><div class='add'>+	lpc32xx_get_uid(uid);</div><div class='add'>+</div><div class='add'>+	printk(KERN_INFO "LPC32XX unique ID: %08x%08x%08x%08x\n",</div><div class='add'>+		uid[3], uid[2], uid[1], uid[0]);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+arch_initcall(lpc32xx_display_uid);</div><div class='head'>diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h<br/>index 68e45e8c9486..afeac3b1fae6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-lpc32xx/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/common.h</a></div><div class='hunk'>@@ -23,26 +23,12 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Arch specific platform device structures</div><div class='del'>- */</div><div class='del'>-extern struct platform_device lpc32xx_watchdog_device;</div><div class='del'>-extern struct platform_device lpc32xx_i2c0_device;</div><div class='del'>-extern struct platform_device lpc32xx_i2c1_device;</div><div class='del'>-extern struct platform_device lpc32xx_i2c2_device;</div><div class='del'>-extern struct platform_device lpc32xx_tsc_device;</div><div class='del'>-extern struct platform_device lpc32xx_adc_device;</div><div class='del'>-extern struct platform_device lpc32xx_rtc_device;</div><div class='del'>-extern struct platform_device lpc32xx_ohci_device;</div><div class='del'>-extern struct platform_device lpc32xx_net_device;</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Other arch specific structures and functions</div><div class='ctx'>  */</div><div class='ctx'> extern struct sys_timer lpc32xx_timer;</div><div class='ctx'> extern void __init lpc32xx_init_irq(void);</div><div class='ctx'> extern void __init lpc32xx_map_io(void);</div><div class='ctx'> extern void __init lpc32xx_serial_init(void);</div><div class='del'>-extern void __init lpc32xx_gpio_init(void);</div><div class='ctx'> extern void lpc23xx_restart(char, const char *);</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-lpc32xx/include/mach/gpio.h b/arch/arm/mach-lpc32xx/include/mach/gpio.h<br/>index 40a8c178f10d..2ba6ca412bef 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/include/mach/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-lpc32xx/include/mach/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/include/mach/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/include/mach/gpio.h</a></div><div class='hunk'>@@ -1 +1,8 @@</div><div class='del'>-/* empty */</div><div class='add'>+#ifndef __MACH_GPIO_H</div><div class='add'>+#define __MACH_GPIO_H</div><div class='add'>+</div><div class='add'>+#include "gpio-lpc32xx.h"</div><div class='add'>+</div><div class='add'>+#define ARCH_NR_GPIOS (LPC32XX_GPO_P3_GRP + LPC32XX_GPO_P3_MAX)</div><div class='add'>+</div><div class='add'>+#endif /* __MACH_GPIO_H */</div><div class='head'>diff --git a/arch/arm/mach-lpc32xx/include/mach/i2c.h b/arch/arm/mach-lpc32xx/include/mach/i2c.h<br/>deleted file mode 100644<br/>index 034dc9286bcc..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/include/mach/i2c.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-lpc32xx/include/mach/i2c.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,63 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * PNX4008-specific tweaks for I2C IP3204 block</div><div class='del'>- *</div><div class='del'>- * Author: Vitaly Wool &lt;vwool@ru.mvista.com&gt;</div><div class='del'>- *</div><div class='del'>- * 2005 (c) MontaVista Software, Inc. This file is licensed under</div><div class='del'>- * the terms of the GNU General Public License version 2. This program</div><div class='del'>- * is licensed "as is" without any warranty of any kind, whether express</div><div class='del'>- * or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_I2C_H</div><div class='del'>-#define __ASM_ARCH_I2C_H</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	mstatus_tdi = 0x00000001,</div><div class='del'>-	mstatus_afi = 0x00000002,</div><div class='del'>-	mstatus_nai = 0x00000004,</div><div class='del'>-	mstatus_drmi = 0x00000008,</div><div class='del'>-	mstatus_active = 0x00000020,</div><div class='del'>-	mstatus_scl = 0x00000040,</div><div class='del'>-	mstatus_sda = 0x00000080,</div><div class='del'>-	mstatus_rff = 0x00000100,</div><div class='del'>-	mstatus_rfe = 0x00000200,</div><div class='del'>-	mstatus_tff = 0x00000400,</div><div class='del'>-	mstatus_tfe = 0x00000800,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	mcntrl_tdie = 0x00000001,</div><div class='del'>-	mcntrl_afie = 0x00000002,</div><div class='del'>-	mcntrl_naie = 0x00000004,</div><div class='del'>-	mcntrl_drmie = 0x00000008,</div><div class='del'>-	mcntrl_daie = 0x00000020,</div><div class='del'>-	mcntrl_rffie = 0x00000040,</div><div class='del'>-	mcntrl_tffie = 0x00000080,</div><div class='del'>-	mcntrl_reset = 0x00000100,</div><div class='del'>-	mcntrl_cdbmode = 0x00000400,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	rw_bit = 1 &lt;&lt; 0,</div><div class='del'>-	start_bit = 1 &lt;&lt; 8,</div><div class='del'>-	stop_bit = 1 &lt;&lt; 9,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define I2C_REG_RX(a)	((a)-&gt;ioaddr)		/* Rx FIFO reg (RO) */</div><div class='del'>-#define I2C_REG_TX(a)	((a)-&gt;ioaddr)		/* Tx FIFO reg (WO) */</div><div class='del'>-#define I2C_REG_STS(a)	((a)-&gt;ioaddr + 0x04)	/* Status reg (RO) */</div><div class='del'>-#define I2C_REG_CTL(a)	((a)-&gt;ioaddr + 0x08)	/* Ctl reg */</div><div class='del'>-#define I2C_REG_CKL(a)	((a)-&gt;ioaddr + 0x0c)	/* Clock divider low */</div><div class='del'>-#define I2C_REG_CKH(a)	((a)-&gt;ioaddr + 0x10)	/* Clock divider high */</div><div class='del'>-#define I2C_REG_ADR(a)	((a)-&gt;ioaddr + 0x14)	/* I2C address */</div><div class='del'>-#define I2C_REG_RFL(a)	((a)-&gt;ioaddr + 0x18)	/* Rx FIFO level (RO) */</div><div class='del'>-#define I2C_REG_TFL(a)	((a)-&gt;ioaddr + 0x1c)	/* Tx FIFO level (RO) */</div><div class='del'>-#define I2C_REG_RXB(a)	((a)-&gt;ioaddr + 0x20)	/* Num of bytes Rx-ed (RO) */</div><div class='del'>-#define I2C_REG_TXB(a)	((a)-&gt;ioaddr + 0x24)	/* Num of bytes Tx-ed (RO) */</div><div class='del'>-#define I2C_REG_TXS(a)	((a)-&gt;ioaddr + 0x28)	/* Tx slave FIFO (RO) */</div><div class='del'>-#define I2C_REG_STFL(a)	((a)-&gt;ioaddr + 0x2c)	/* Tx slave FIFO level (RO) */</div><div class='del'>-</div><div class='del'>-#define I2C_CHIP_NAME		"PNX4008-I2C"</div><div class='del'>-</div><div class='del'>-#endif				/* __ASM_ARCH_I2C_H */</div><div class='head'>diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c<br/>index d080cb1123dd..5b1cc35e6fba 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-lpc32xx/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/irq.c</a></div><div class='hunk'>@@ -22,6 +22,11 @@</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='hunk'>@@ -44,6 +49,9 @@</div><div class='ctx'> #define SIC1_ATR_DEFAULT	0x00026000</div><div class='ctx'> #define SIC2_ATR_DEFAULT	0x00000000</div><div class='ctx'> </div><div class='add'>+static struct irq_domain *lpc32xx_mic_domain;</div><div class='add'>+static struct device_node *lpc32xx_mic_np;</div><div class='add'>+</div><div class='ctx'> struct lpc32xx_event_group_regs {</div><div class='ctx'> 	void __iomem *enab_reg;</div><div class='ctx'> 	void __iomem *edge_reg;</div><div class='hunk'>@@ -203,7 +211,7 @@ static void lpc32xx_mask_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int reg, ctrl, mask;</div><div class='ctx'> </div><div class='del'>-	get_controller(d-&gt;irq, &amp;ctrl, &amp;mask);</div><div class='add'>+	get_controller(d-&gt;hwirq, &amp;ctrl, &amp;mask);</div><div class='ctx'> </div><div class='ctx'> 	reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) &amp; ~mask;</div><div class='ctx'> 	__raw_writel(reg, LPC32XX_INTC_MASK(ctrl));</div><div class='hunk'>@@ -213,7 +221,7 @@ static void lpc32xx_unmask_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int reg, ctrl, mask;</div><div class='ctx'> </div><div class='del'>-	get_controller(d-&gt;irq, &amp;ctrl, &amp;mask);</div><div class='add'>+	get_controller(d-&gt;hwirq, &amp;ctrl, &amp;mask);</div><div class='ctx'> </div><div class='ctx'> 	reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) | mask;</div><div class='ctx'> 	__raw_writel(reg, LPC32XX_INTC_MASK(ctrl));</div><div class='hunk'>@@ -223,14 +231,14 @@ static void lpc32xx_ack_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int ctrl, mask;</div><div class='ctx'> </div><div class='del'>-	get_controller(d-&gt;irq, &amp;ctrl, &amp;mask);</div><div class='add'>+	get_controller(d-&gt;hwirq, &amp;ctrl, &amp;mask);</div><div class='ctx'> </div><div class='ctx'> 	__raw_writel(mask, LPC32XX_INTC_RAW_STAT(ctrl));</div><div class='ctx'> </div><div class='ctx'> 	/* Also need to clear pending wake event */</div><div class='del'>-	if (lpc32xx_events[d-&gt;irq].mask != 0)</div><div class='del'>-		__raw_writel(lpc32xx_events[d-&gt;irq].mask,</div><div class='del'>-			lpc32xx_events[d-&gt;irq].event_group-&gt;rawstat_reg);</div><div class='add'>+	if (lpc32xx_events[d-&gt;hwirq].mask != 0)</div><div class='add'>+		__raw_writel(lpc32xx_events[d-&gt;hwirq].mask,</div><div class='add'>+			lpc32xx_events[d-&gt;hwirq].event_group-&gt;rawstat_reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __lpc32xx_set_irq_type(unsigned int irq, int use_high_level,</div><div class='hunk'>@@ -274,22 +282,22 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case IRQ_TYPE_EDGE_RISING:</div><div class='ctx'> 		/* Rising edge sensitive */</div><div class='del'>-		__lpc32xx_set_irq_type(d-&gt;irq, 1, 1);</div><div class='add'>+		__lpc32xx_set_irq_type(d-&gt;hwirq, 1, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IRQ_TYPE_EDGE_FALLING:</div><div class='ctx'> 		/* Falling edge sensitive */</div><div class='del'>-		__lpc32xx_set_irq_type(d-&gt;irq, 0, 1);</div><div class='add'>+		__lpc32xx_set_irq_type(d-&gt;hwirq, 0, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IRQ_TYPE_LEVEL_LOW:</div><div class='ctx'> 		/* Low level sensitive */</div><div class='del'>-		__lpc32xx_set_irq_type(d-&gt;irq, 0, 0);</div><div class='add'>+		__lpc32xx_set_irq_type(d-&gt;hwirq, 0, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IRQ_TYPE_LEVEL_HIGH:</div><div class='ctx'> 		/* High level sensitive */</div><div class='del'>-		__lpc32xx_set_irq_type(d-&gt;irq, 1, 0);</div><div class='add'>+		__lpc32xx_set_irq_type(d-&gt;hwirq, 1, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	/* Other modes are not supported */</div><div class='hunk'>@@ -298,7 +306,7 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Ok to use the level handler for all types */</div><div class='del'>-	irq_set_handler(d-&gt;irq, handle_level_irq);</div><div class='add'>+	irq_set_handler(d-&gt;hwirq, handle_level_irq);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -307,33 +315,33 @@ static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long eventreg;</div><div class='ctx'> </div><div class='del'>-	if (lpc32xx_events[d-&gt;irq].mask != 0) {</div><div class='del'>-		eventreg = __raw_readl(lpc32xx_events[d-&gt;irq].</div><div class='add'>+	if (lpc32xx_events[d-&gt;hwirq].mask != 0) {</div><div class='add'>+		eventreg = __raw_readl(lpc32xx_events[d-&gt;hwirq].</div><div class='ctx'> 			event_group-&gt;enab_reg);</div><div class='ctx'> </div><div class='ctx'> 		if (state)</div><div class='del'>-			eventreg |= lpc32xx_events[d-&gt;irq].mask;</div><div class='add'>+			eventreg |= lpc32xx_events[d-&gt;hwirq].mask;</div><div class='ctx'> 		else {</div><div class='del'>-			eventreg &amp;= ~lpc32xx_events[d-&gt;irq].mask;</div><div class='add'>+			eventreg &amp;= ~lpc32xx_events[d-&gt;hwirq].mask;</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='ctx'> 			 * When disabling the wakeup, clear the latched</div><div class='ctx'> 			 * event</div><div class='ctx'> 			 */</div><div class='del'>-			__raw_writel(lpc32xx_events[d-&gt;irq].mask,</div><div class='del'>-				lpc32xx_events[d-&gt;irq].</div><div class='add'>+			__raw_writel(lpc32xx_events[d-&gt;hwirq].mask,</div><div class='add'>+				lpc32xx_events[d-&gt;hwirq].</div><div class='ctx'> 				event_group-&gt;rawstat_reg);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		__raw_writel(eventreg,</div><div class='del'>-			lpc32xx_events[d-&gt;irq].event_group-&gt;enab_reg);</div><div class='add'>+			lpc32xx_events[d-&gt;hwirq].event_group-&gt;enab_reg);</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Clear event */</div><div class='del'>-	__raw_writel(lpc32xx_events[d-&gt;irq].mask,</div><div class='del'>-		lpc32xx_events[d-&gt;irq].event_group-&gt;rawstat_reg);</div><div class='add'>+	__raw_writel(lpc32xx_events[d-&gt;hwirq].mask,</div><div class='add'>+		lpc32xx_events[d-&gt;hwirq].event_group-&gt;rawstat_reg);</div><div class='ctx'> </div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> }</div><div class='hunk'>@@ -353,6 +361,7 @@ static void __init lpc32xx_set_default_mappings(unsigned int apr,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct irq_chip lpc32xx_irq_chip = {</div><div class='add'>+	.name = "MIC",</div><div class='ctx'> 	.irq_ack = lpc32xx_ack_irq,</div><div class='ctx'> 	.irq_mask = lpc32xx_mask_irq,</div><div class='ctx'> 	.irq_unmask = lpc32xx_unmask_irq,</div><div class='hunk'>@@ -386,9 +395,23 @@ static void lpc32xx_sic2_handler(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int __init __lpc32xx_mic_of_init(struct device_node *node,</div><div class='add'>+					struct device_node *parent)</div><div class='add'>+{</div><div class='add'>+	lpc32xx_mic_np = node;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mic_of_match[] __initconst = {</div><div class='add'>+	{ .compatible = "nxp,lpc3220-mic", .data = __lpc32xx_mic_of_init },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> void __init lpc32xx_init_irq(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='add'>+	int irq_base;</div><div class='ctx'> </div><div class='ctx'> 	/* Setup MIC */</div><div class='ctx'> 	__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_MIC_BASE));</div><div class='hunk'>@@ -448,4 +471,19 @@ void __init lpc32xx_init_irq(void)</div><div class='ctx'> 		LPC32XX_CLKPWR_PIN_RS);</div><div class='ctx'> 	__raw_writel(__raw_readl(LPC32XX_CLKPWR_INT_RS),</div><div class='ctx'> 		LPC32XX_CLKPWR_INT_RS);</div><div class='add'>+</div><div class='add'>+	of_irq_init(mic_of_match);</div><div class='add'>+</div><div class='add'>+	irq_base = irq_alloc_descs(-1, 0, NR_IRQS, 0);</div><div class='add'>+	if (irq_base &lt; 0) {</div><div class='add'>+		pr_warn("Cannot allocate irq_descs, assuming pre-allocated\n");</div><div class='add'>+		irq_base = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lpc32xx_mic_domain = irq_domain_add_legacy(lpc32xx_mic_np, NR_IRQS,</div><div class='add'>+						   irq_base, 0,</div><div class='add'>+						   &amp;irq_domain_simple_ops,</div><div class='add'>+						   NULL);</div><div class='add'>+	if (!lpc32xx_mic_domain)</div><div class='add'>+		panic("Unable to add MIC irq domain\n");</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c<br/>index 7f7401ec7487..540106cdb9ec 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/phy3250.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-lpc32xx/phy3250.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-lpc32xx/phy3250.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-lpc32xx/phy3250.c</a></div><div class='hunk'>@@ -1,8 +1,9 @@</div><div class='ctx'> /*</div><div class='del'>- * arch/arm/mach-lpc32xx/phy3250.c</div><div class='add'>+ * Platform support for LPC32xx SoC</div><div class='ctx'>  *</div><div class='ctx'>  * Author: Kevin Wells &lt;kevin.wells@nxp.com&gt;</div><div class='ctx'>  *</div><div class='add'>+ * Copyright (C) 2012 Roland Stigge &lt;stigge@antcom.de&gt;</div><div class='ctx'>  * Copyright (C) 2010 NXP Semiconductors</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='hunk'>@@ -25,11 +26,16 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='ctx'> #include &lt;linux/spi/eeprom.h&gt;</div><div class='del'>-#include &lt;linux/leds.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/amba/bus.h&gt;</div><div class='ctx'> #include &lt;linux/amba/clcd.h&gt;</div><div class='ctx'> #include &lt;linux/amba/pl022.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/amba/pl08x.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='hunk'>@@ -47,7 +53,6 @@</div><div class='ctx'> #define SPI0_CS_GPIO	LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5)</div><div class='ctx'> #define LCD_POWER_GPIO	LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 0)</div><div class='ctx'> #define BKL_POWER_GPIO	LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 4)</div><div class='del'>-#define LED_GPIO	LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 1)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * AMBA LCD controller</div><div class='hunk'>@@ -150,9 +155,6 @@ static struct clcd_board lpc32xx_clcd_data = {</div><div class='ctx'> 	.remove		= lpc32xx_clcd_remove,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0,</div><div class='del'>-	LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &amp;lpc32xx_clcd_data);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * AMBA SSP (SPI)</div><div class='ctx'>  */</div><div class='hunk'>@@ -180,8 +182,11 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = {</div><div class='ctx'> 	.enable_dma		= 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0,</div><div class='del'>-	LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &amp;lpc32xx_ssp0_data);</div><div class='add'>+static struct pl022_ssp_controller lpc32xx_ssp1_data = {</div><div class='add'>+	.bus_id			= 1,</div><div class='add'>+	.num_chipselect		= 1,</div><div class='add'>+	.enable_dma		= 0,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* AT25 driver registration */</div><div class='ctx'> static int __init phy3250_spi_board_register(void)</div><div class='hunk'>@@ -221,73 +226,20 @@ static int __init phy3250_spi_board_register(void)</div><div class='ctx'> }</div><div class='ctx'> arch_initcall(phy3250_spi_board_register);</div><div class='ctx'> </div><div class='del'>-static struct i2c_board_info __initdata phy3250_i2c_board_info[] = {</div><div class='del'>-	{</div><div class='del'>-		I2C_BOARD_INFO("pcf8563", 0x51),</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct gpio_led phy_leds[] = {</div><div class='del'>-	{</div><div class='del'>-		.name			= "led0",</div><div class='del'>-		.gpio			= LED_GPIO,</div><div class='del'>-		.active_low		= 1,</div><div class='del'>-		.default_trigger	= "heartbeat",</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct gpio_led_platform_data led_data = {</div><div class='del'>-	.leds = phy_leds,</div><div class='del'>-	.num_leds = ARRAY_SIZE(phy_leds),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device lpc32xx_gpio_led_device = {</div><div class='del'>-	.name			= "leds-gpio",</div><div class='del'>-	.id			= -1,</div><div class='del'>-	.dev.platform_data	= &amp;led_data,</div><div class='add'>+static struct pl08x_platform_data pl08x_pd = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct platform_device *phy3250_devs[] __initdata = {</div><div class='del'>-	&amp;lpc32xx_rtc_device,</div><div class='del'>-	&amp;lpc32xx_tsc_device,</div><div class='del'>-	&amp;lpc32xx_i2c0_device,</div><div class='del'>-	&amp;lpc32xx_i2c1_device,</div><div class='del'>-	&amp;lpc32xx_i2c2_device,</div><div class='del'>-	&amp;lpc32xx_watchdog_device,</div><div class='del'>-	&amp;lpc32xx_gpio_led_device,</div><div class='del'>-	&amp;lpc32xx_adc_device,</div><div class='del'>-	&amp;lpc32xx_ohci_device,</div><div class='del'>-	&amp;lpc32xx_net_device,</div><div class='add'>+static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = {</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl022", 0x20084000, "dev:ssp0", &amp;lpc32xx_ssp0_data),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", &amp;lpc32xx_ssp1_data),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl110", 0x31040000, "dev:clcd", &amp;lpc32xx_clcd_data),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &amp;pl08x_pd),</div><div class='add'>+	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct amba_device *amba_devs[] __initdata = {</div><div class='del'>-	&amp;lpc32xx_clcd_device,</div><div class='del'>-	&amp;lpc32xx_ssp0_device,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Board specific functions</div><div class='del'>- */</div><div class='del'>-static void __init phy3250_board_init(void)</div><div class='add'>+static void __init lpc3250_machine_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tmp;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	lpc32xx_gpio_init();</div><div class='del'>-</div><div class='del'>-	/* Register GPIOs used on this board */</div><div class='del'>-	if (gpio_request(SPI0_CS_GPIO, "spi0 cs"))</div><div class='del'>-		printk(KERN_ERR "Error requesting gpio %u",</div><div class='del'>-			SPI0_CS_GPIO);</div><div class='del'>-	else if (gpio_direction_output(SPI0_CS_GPIO, 1))</div><div class='del'>-		printk(KERN_ERR "Error setting gpio %u to output",</div><div class='del'>-			SPI0_CS_GPIO);</div><div class='del'>-</div><div class='del'>-	/* Setup network interface for RMII mode */</div><div class='del'>-	tmp = __raw_readl(LPC32XX_CLKPWR_MACCLK_CTRL);</div><div class='del'>-	tmp &amp;= ~LPC32XX_CLKPWR_MACCTRL_PINS_MSK;</div><div class='del'>-	tmp |= LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS;</div><div class='del'>-	__raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	/* Setup SLC NAND controller muxing */</div><div class='ctx'> 	__raw_writel(LPC32XX_CLKPWR_NANDCLK_SEL_SLC,</div><div class='hunk'>@@ -300,6 +252,12 @@ static void __init phy3250_board_init(void)</div><div class='ctx'> 	tmp |= LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT16;</div><div class='ctx'> 	__raw_writel(tmp, LPC32XX_CLKPWR_LCDCLK_CTRL);</div><div class='ctx'> </div><div class='add'>+	/* Set up USB power */</div><div class='add'>+	tmp = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);</div><div class='add'>+	tmp |= LPC32XX_CLKPWR_USBCTRL_HCLK_EN |</div><div class='add'>+		LPC32XX_CLKPWR_USBCTRL_USBI2C_EN;</div><div class='add'>+	__raw_writel(tmp, LPC32XX_CLKPWR_USB_CTRL);</div><div class='add'>+</div><div class='ctx'> 	/* Set up I2C pull levels */</div><div class='ctx'> 	tmp = __raw_readl(LPC32XX_CLKPWR_I2C_CLK_CTRL);</div><div class='ctx'> 	tmp |= LPC32XX_CLKPWR_I2CCLK_USBI2CHI_DRIVE |</div><div class='hunk'>@@ -321,54 +279,51 @@ static void __init phy3250_board_init(void)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * AMBA peripheral clocks need to be enabled prior to AMBA device</div><div class='ctx'> 	 * detection or a data fault will occur, so enable the clocks</div><div class='del'>-	 * here. However, we don't want to enable them if the peripheral</div><div class='del'>-	 * isn't included in the image</div><div class='add'>+	 * here.</div><div class='ctx'> 	 */</div><div class='del'>-#ifdef CONFIG_FB_ARMCLCD</div><div class='ctx'> 	tmp = __raw_readl(LPC32XX_CLKPWR_LCDCLK_CTRL);</div><div class='ctx'> 	__raw_writel((tmp | LPC32XX_CLKPWR_LCDCTRL_CLK_EN),</div><div class='ctx'> 		LPC32XX_CLKPWR_LCDCLK_CTRL);</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_SPI_PL022</div><div class='add'>+</div><div class='ctx'> 	tmp = __raw_readl(LPC32XX_CLKPWR_SSP_CLK_CTRL);</div><div class='ctx'> 	__raw_writel((tmp | LPC32XX_CLKPWR_SSPCTRL_SSPCLK0_EN),</div><div class='ctx'> 		LPC32XX_CLKPWR_SSP_CLK_CTRL);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-	platform_add_devices(phy3250_devs, ARRAY_SIZE(phy3250_devs));</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(amba_devs); i++) {</div><div class='del'>-		struct amba_device *d = amba_devs[i];</div><div class='del'>-		amba_device_register(d, &amp;iomem_resource);</div><div class='del'>-	}</div><div class='add'>+	tmp = __raw_readl(LPC32XX_CLKPWR_DMA_CLK_CTRL);</div><div class='add'>+	__raw_writel((tmp | LPC32XX_CLKPWR_DMACLKCTRL_CLK_EN),</div><div class='add'>+		     LPC32XX_CLKPWR_DMA_CLK_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	/* Test clock needed for UDA1380 initial init */</div><div class='ctx'> 	__raw_writel(LPC32XX_CLKPWR_TESTCLK2_SEL_MOSC |</div><div class='ctx'> 		LPC32XX_CLKPWR_TESTCLK_TESTCLK2_EN,</div><div class='ctx'> 		LPC32XX_CLKPWR_TEST_CLK_SEL);</div><div class='ctx'> </div><div class='del'>-	i2c_register_board_info(0, phy3250_i2c_board_info,</div><div class='del'>-		ARRAY_SIZE(phy3250_i2c_board_info));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init lpc32xx_display_uid(void)</div><div class='del'>-{</div><div class='del'>-	u32 uid[4];</div><div class='del'>-</div><div class='del'>-	lpc32xx_get_uid(uid);</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "LPC32XX unique ID: %08x%08x%08x%08x\n",</div><div class='del'>-		uid[3], uid[2], uid[1], uid[0]);</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='add'>+			     lpc32xx_auxdata_lookup, NULL);</div><div class='ctx'> </div><div class='del'>-	return 1;</div><div class='add'>+	/* Register GPIOs used on this board */</div><div class='add'>+	if (gpio_request(SPI0_CS_GPIO, "spi0 cs"))</div><div class='add'>+		printk(KERN_ERR "Error requesting gpio %u",</div><div class='add'>+			SPI0_CS_GPIO);</div><div class='add'>+	else if (gpio_direction_output(SPI0_CS_GPIO, 1))</div><div class='add'>+		printk(KERN_ERR "Error setting gpio %u to output",</div><div class='add'>+			SPI0_CS_GPIO);</div><div class='ctx'> }</div><div class='del'>-arch_initcall(lpc32xx_display_uid);</div><div class='ctx'> </div><div class='del'>-MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller")</div><div class='del'>-	/* Maintainer: Kevin Wells, NXP Semiconductors */</div><div class='add'>+static char const *lpc32xx_dt_compat[] __initdata = {</div><div class='add'>+	"nxp,lpc3220",</div><div class='add'>+	"nxp,lpc3230",</div><div class='add'>+	"nxp,lpc3240",</div><div class='add'>+	"nxp,lpc3250",</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(LPC32XX_DT, "LPC32XX SoC (Flattened Device Tree)")</div><div class='ctx'> 	.atag_offset	= 0x100,</div><div class='ctx'> 	.map_io		= lpc32xx_map_io,</div><div class='ctx'> 	.init_irq	= lpc32xx_init_irq,</div><div class='ctx'> 	.timer		= &amp;lpc32xx_timer,</div><div class='del'>-	.init_machine	= phy3250_board_init,</div><div class='add'>+	.init_machine	= lpc3250_machine_init,</div><div class='add'>+	.dt_compat	= lpc32xx_dt_compat,</div><div class='ctx'> 	.restart	= lpc23xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig<br/>index 5a90b9a3ab6e..7fddd01b85b9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/Kconfig</a></div><div class='hunk'>@@ -2,16 +2,6 @@ if ARCH_MMP</div><div class='ctx'> </div><div class='ctx'> menu "Marvell PXA168/910/MMP2 Implmentations"</div><div class='ctx'> </div><div class='del'>-config MACH_MMP_DT</div><div class='del'>-	bool "Support MMP2 platforms from device tree"</div><div class='del'>-	select CPU_PXA168</div><div class='del'>-	select CPU_PXA910</div><div class='del'>-	select USE_OF</div><div class='del'>-	help</div><div class='del'>-	  Include support for Marvell MMP2 based platforms using</div><div class='del'>-	  the device tree. Needn't select any other machine while</div><div class='del'>-	  MACH_MMP_DT is enabled.</div><div class='del'>-</div><div class='ctx'> config MACH_ASPENITE</div><div class='ctx'> 	bool "Marvell's PXA168 Aspenite Development Board"</div><div class='ctx'> 	select CPU_PXA168</div><div class='hunk'>@@ -94,6 +84,25 @@ config MACH_GPLUGD</div><div class='ctx'> 	  Say 'Y' here if you want to support the Marvell PXA168-based</div><div class='ctx'> 	  GuruPlug Display (gplugD) Board</div><div class='ctx'> </div><div class='add'>+config MACH_MMP_DT</div><div class='add'>+	bool "Support MMP (ARMv5) platforms from device tree"</div><div class='add'>+	select CPU_PXA168</div><div class='add'>+	select CPU_PXA910</div><div class='add'>+	select USE_OF</div><div class='add'>+	help</div><div class='add'>+	  Include support for Marvell MMP2 based platforms using</div><div class='add'>+	  the device tree. Needn't select any other machine while</div><div class='add'>+	  MACH_MMP_DT is enabled.</div><div class='add'>+</div><div class='add'>+config MACH_MMP2_DT</div><div class='add'>+	bool "Support MMP2 (ARMv7) platforms from device tree"</div><div class='add'>+	depends on !CPU_MOHAWK</div><div class='add'>+	select CPU_MMP2</div><div class='add'>+	select USE_OF</div><div class='add'>+	help</div><div class='add'>+	  Include support for Marvell MMP2 based platforms using</div><div class='add'>+	  the device tree.</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> config CPU_PXA168</div><div class='hunk'>@@ -113,4 +122,11 @@ config CPU_MMP2</div><div class='ctx'> 	select CPU_PJ4</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select code specific to MMP2. MMP2 is ARMv7 compatible.</div><div class='add'>+</div><div class='add'>+config USB_EHCI_MV_U2O</div><div class='add'>+        bool "EHCI support for PXA USB OTG controller"</div><div class='add'>+	depends on USB_EHCI_MV</div><div class='add'>+	help</div><div class='add'>+	  Enables support for OTG controller which can be switched to host mode.</div><div class='add'>+</div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile<br/>index 4fc0ff5dc96d..b786f7e6cd1f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/Makefile</a></div><div class='hunk'>@@ -2,12 +2,17 @@</div><div class='ctx'> # Makefile for Marvell's PXA168 processors line</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-y				+= common.o clock.o devices.o time.o</div><div class='add'>+obj-y				+= common.o clock.o devices.o time.o irq.o</div><div class='ctx'> </div><div class='ctx'> # SoC support</div><div class='del'>-obj-$(CONFIG_CPU_PXA168)	+= pxa168.o irq-pxa168.o</div><div class='del'>-obj-$(CONFIG_CPU_PXA910)	+= pxa910.o irq-pxa168.o</div><div class='del'>-obj-$(CONFIG_CPU_MMP2)		+= mmp2.o irq-mmp2.o sram.o</div><div class='add'>+obj-$(CONFIG_CPU_PXA168)	+= pxa168.o</div><div class='add'>+obj-$(CONFIG_CPU_PXA910)	+= pxa910.o</div><div class='add'>+obj-$(CONFIG_CPU_MMP2)		+= mmp2.o sram.o</div><div class='add'>+</div><div class='add'>+ifeq ($(CONFIG_PM),y)</div><div class='add'>+obj-$(CONFIG_CPU_PXA910)	+= pm-pxa910.o</div><div class='add'>+obj-$(CONFIG_CPU_MMP2)		+= pm-mmp2.o</div><div class='add'>+endif</div><div class='ctx'> </div><div class='ctx'> # board support</div><div class='ctx'> obj-$(CONFIG_MACH_ASPENITE)	+= aspenite.o</div><div class='hunk'>@@ -19,5 +24,6 @@ obj-$(CONFIG_MACH_BROWNSTONE)	+= brownstone.o</div><div class='ctx'> obj-$(CONFIG_MACH_FLINT)	+= flint.o</div><div class='ctx'> obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o</div><div class='ctx'> obj-$(CONFIG_MACH_MMP_DT)	+= mmp-dt.o</div><div class='add'>+obj-$(CONFIG_MACH_MMP2_DT)	+= mmp2-dt.o</div><div class='ctx'> obj-$(CONFIG_MACH_TETON_BGA)	+= teton_bga.o</div><div class='ctx'> obj-$(CONFIG_MACH_GPLUGD)	+= gplugd.o</div><div class='head'>diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c<br/>index bf5d8e195c3e..223090b1444d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/aspenite.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/aspenite.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/aspenite.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/aspenite.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/mtd/partitions.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/nand.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/mv_usb.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='hunk'>@@ -221,6 +222,21 @@ static struct pxa27x_keypad_platform_data aspenite_keypad_info __initdata = {</div><div class='ctx'> 	.debounce_interval	= 30,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_USB_EHCI_MV)</div><div class='add'>+static char *pxa168_sph_clock_name[] = {</div><div class='add'>+	[0] = "PXA168-USBCLK",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mv_usb_platform_data pxa168_sph_pdata = {</div><div class='add'>+	.clknum         = 1,</div><div class='add'>+	.clkname        = pxa168_sph_clock_name,</div><div class='add'>+	.mode           = MV_USB_MODE_HOST,</div><div class='add'>+	.phy_init	= pxa_usb_phy_init,</div><div class='add'>+	.phy_deinit	= pxa_usb_phy_deinit,</div><div class='add'>+	.set_vbus	= NULL,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static void __init common_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	mfp_config(ARRAY_AND_SIZE(common_pin_config));</div><div class='hunk'>@@ -236,6 +252,10 @@ static void __init common_init(void)</div><div class='ctx'> </div><div class='ctx'> 	/* off-chip devices */</div><div class='ctx'> 	platform_device_register(&amp;smc91x_device);</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_USB_EHCI_MV)</div><div class='add'>+	pxa168_add_usb_host(&amp;pxa168_sph_pdata);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")</div><div class='head'>diff --git a/arch/arm/mach-mmp/devices.c b/arch/arm/mach-mmp/devices.c<br/>index 191d9dea8731..dd2d8b103cc8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/devices.c</a></div><div class='hunk'>@@ -9,9 +9,13 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='add'>+#include &lt;mach/irqs.h&gt;</div><div class='ctx'> #include &lt;mach/devices.h&gt;</div><div class='add'>+#include &lt;mach/cputype.h&gt;</div><div class='add'>+#include &lt;mach/regs-usb.h&gt;</div><div class='ctx'> </div><div class='ctx'> int __init pxa_register_device(struct pxa_device_desc *desc,</div><div class='ctx'> 				void *data, size_t size)</div><div class='hunk'>@@ -67,3 +71,281 @@ int __init pxa_register_device(struct pxa_device_desc *desc,</div><div class='ctx'> </div><div class='ctx'> 	return platform_device_add(pdev);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_USB) || defined(CONFIG_USB_GADGET)</div><div class='add'>+</div><div class='add'>+/*****************************************************************************</div><div class='add'>+ * The registers read/write routines</div><div class='add'>+ *****************************************************************************/</div><div class='add'>+</div><div class='add'>+static unsigned int u2o_get(void __iomem *base, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	return readl_relaxed(base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void u2o_set(void __iomem *base, unsigned int offset,</div><div class='add'>+		unsigned int value)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = readl_relaxed(base + offset);</div><div class='add'>+	reg |= value;</div><div class='add'>+	writel_relaxed(reg, base + offset);</div><div class='add'>+	readl_relaxed(base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void u2o_clear(void __iomem *base, unsigned int offset,</div><div class='add'>+		unsigned int value)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = readl_relaxed(base + offset);</div><div class='add'>+	reg &amp;= ~value;</div><div class='add'>+	writel_relaxed(reg, base + offset);</div><div class='add'>+	readl_relaxed(base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void u2o_write(void __iomem *base, unsigned int offset,</div><div class='add'>+		unsigned int value)</div><div class='add'>+{</div><div class='add'>+	writel_relaxed(value, base + offset);</div><div class='add'>+	readl_relaxed(base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV)</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_PXA910) || defined(CONFIG_CPU_PXA168)</div><div class='add'>+</div><div class='add'>+static DEFINE_MUTEX(phy_lock);</div><div class='add'>+static int phy_init_cnt;</div><div class='add'>+</div><div class='add'>+static int usb_phy_init_internal(void __iomem *base)</div><div class='add'>+{</div><div class='add'>+	int loops;</div><div class='add'>+</div><div class='add'>+	pr_info("Init usb phy!!!\n");</div><div class='add'>+</div><div class='add'>+	/* Initialize the USB PHY power */</div><div class='add'>+	if (cpu_is_pxa910()) {</div><div class='add'>+		u2o_set(base, UTMI_CTRL, (1&lt;&lt;UTMI_CTRL_INPKT_DELAY_SOF_SHIFT)</div><div class='add'>+			| (1&lt;&lt;UTMI_CTRL_PU_REF_SHIFT));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	u2o_set(base, UTMI_CTRL, 1&lt;&lt;UTMI_CTRL_PLL_PWR_UP_SHIFT);</div><div class='add'>+	u2o_set(base, UTMI_CTRL, 1&lt;&lt;UTMI_CTRL_PWR_UP_SHIFT);</div><div class='add'>+</div><div class='add'>+	/* UTMI_PLL settings */</div><div class='add'>+	u2o_clear(base, UTMI_PLL, UTMI_PLL_PLLVDD18_MASK</div><div class='add'>+		| UTMI_PLL_PLLVDD12_MASK | UTMI_PLL_PLLCALI12_MASK</div><div class='add'>+		| UTMI_PLL_FBDIV_MASK | UTMI_PLL_REFDIV_MASK</div><div class='add'>+		| UTMI_PLL_ICP_MASK | UTMI_PLL_KVCO_MASK);</div><div class='add'>+</div><div class='add'>+	u2o_set(base, UTMI_PLL, 0xee&lt;&lt;UTMI_PLL_FBDIV_SHIFT</div><div class='add'>+		| 0xb&lt;&lt;UTMI_PLL_REFDIV_SHIFT | 3&lt;&lt;UTMI_PLL_PLLVDD18_SHIFT</div><div class='add'>+		| 3&lt;&lt;UTMI_PLL_PLLVDD12_SHIFT | 3&lt;&lt;UTMI_PLL_PLLCALI12_SHIFT</div><div class='add'>+		| 1&lt;&lt;UTMI_PLL_ICP_SHIFT | 3&lt;&lt;UTMI_PLL_KVCO_SHIFT);</div><div class='add'>+</div><div class='add'>+	/* UTMI_TX */</div><div class='add'>+	u2o_clear(base, UTMI_TX, UTMI_TX_REG_EXT_FS_RCAL_EN_MASK</div><div class='add'>+		| UTMI_TX_TXVDD12_MASK | UTMI_TX_CK60_PHSEL_MASK</div><div class='add'>+		| UTMI_TX_IMPCAL_VTH_MASK | UTMI_TX_REG_EXT_FS_RCAL_MASK</div><div class='add'>+		| UTMI_TX_AMP_MASK);</div><div class='add'>+	u2o_set(base, UTMI_TX, 3&lt;&lt;UTMI_TX_TXVDD12_SHIFT</div><div class='add'>+		| 4&lt;&lt;UTMI_TX_CK60_PHSEL_SHIFT | 4&lt;&lt;UTMI_TX_IMPCAL_VTH_SHIFT</div><div class='add'>+		| 8&lt;&lt;UTMI_TX_REG_EXT_FS_RCAL_SHIFT | 3&lt;&lt;UTMI_TX_AMP_SHIFT);</div><div class='add'>+</div><div class='add'>+	/* UTMI_RX */</div><div class='add'>+	u2o_clear(base, UTMI_RX, UTMI_RX_SQ_THRESH_MASK</div><div class='add'>+		| UTMI_REG_SQ_LENGTH_MASK);</div><div class='add'>+	u2o_set(base, UTMI_RX, 7&lt;&lt;UTMI_RX_SQ_THRESH_SHIFT</div><div class='add'>+		| 2&lt;&lt;UTMI_REG_SQ_LENGTH_SHIFT);</div><div class='add'>+</div><div class='add'>+	/* UTMI_IVREF */</div><div class='add'>+	if (cpu_is_pxa168())</div><div class='add'>+		/* fixing Microsoft Altair board interface with NEC hub issue -</div><div class='add'>+		 * Set UTMI_IVREF from 0x4a3 to 0x4bf */</div><div class='add'>+		u2o_write(base, UTMI_IVREF, 0x4bf);</div><div class='add'>+</div><div class='add'>+	/* toggle VCOCAL_START bit of UTMI_PLL */</div><div class='add'>+	udelay(200);</div><div class='add'>+	u2o_set(base, UTMI_PLL, VCOCAL_START);</div><div class='add'>+	udelay(40);</div><div class='add'>+	u2o_clear(base, UTMI_PLL, VCOCAL_START);</div><div class='add'>+</div><div class='add'>+	/* toggle REG_RCAL_START bit of UTMI_TX */</div><div class='add'>+	udelay(400);</div><div class='add'>+	u2o_set(base, UTMI_TX, REG_RCAL_START);</div><div class='add'>+	udelay(40);</div><div class='add'>+	u2o_clear(base, UTMI_TX, REG_RCAL_START);</div><div class='add'>+	udelay(400);</div><div class='add'>+</div><div class='add'>+	/* Make sure PHY PLL is ready */</div><div class='add'>+	loops = 0;</div><div class='add'>+	while ((u2o_get(base, UTMI_PLL) &amp; PLL_READY) == 0) {</div><div class='add'>+		mdelay(1);</div><div class='add'>+		loops++;</div><div class='add'>+		if (loops &gt; 100) {</div><div class='add'>+			printk(KERN_WARNING "calibrate timeout, UTMI_PLL %x\n",</div><div class='add'>+				u2o_get(base, UTMI_PLL));</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cpu_is_pxa168()) {</div><div class='add'>+		u2o_set(base, UTMI_RESERVE, 1 &lt;&lt; 5);</div><div class='add'>+		/* Turn on UTMI PHY OTG extension */</div><div class='add'>+		u2o_write(base, UTMI_OTG_ADDON, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int usb_phy_deinit_internal(void __iomem *base)</div><div class='add'>+{</div><div class='add'>+	pr_info("Deinit usb phy!!!\n");</div><div class='add'>+</div><div class='add'>+	if (cpu_is_pxa168())</div><div class='add'>+		u2o_clear(base, UTMI_OTG_ADDON, UTMI_OTG_ADDON_OTG_ON);</div><div class='add'>+</div><div class='add'>+	u2o_clear(base, UTMI_CTRL, UTMI_CTRL_RXBUF_PDWN);</div><div class='add'>+	u2o_clear(base, UTMI_CTRL, UTMI_CTRL_TXBUF_PDWN);</div><div class='add'>+	u2o_clear(base, UTMI_CTRL, UTMI_CTRL_USB_CLK_EN);</div><div class='add'>+	u2o_clear(base, UTMI_CTRL, 1&lt;&lt;UTMI_CTRL_PWR_UP_SHIFT);</div><div class='add'>+	u2o_clear(base, UTMI_CTRL, 1&lt;&lt;UTMI_CTRL_PLL_PWR_UP_SHIFT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pxa_usb_phy_init(void __iomem *phy_reg)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;phy_lock);</div><div class='add'>+	if (phy_init_cnt++ == 0)</div><div class='add'>+		usb_phy_init_internal(phy_reg);</div><div class='add'>+	mutex_unlock(&amp;phy_lock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pxa_usb_phy_deinit(void __iomem *phy_reg)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(phy_init_cnt == 0);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;phy_lock);</div><div class='add'>+	if (--phy_init_cnt == 0)</div><div class='add'>+		usb_phy_deinit_internal(phy_reg);</div><div class='add'>+	mutex_unlock(&amp;phy_lock);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_USB_SUPPORT</div><div class='add'>+static u64 usb_dma_mask = ~(u32)0;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_USB_MV_UDC</div><div class='add'>+struct resource pxa168_u2o_resources[] = {</div><div class='add'>+	/* regbase */</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,</div><div class='add'>+		.end	= PXA168_U2O_REGBASE + USB_REG_RANGE,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+		.name	= "capregs",</div><div class='add'>+	},</div><div class='add'>+	/* phybase */</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= PXA168_U2O_PHYBASE,</div><div class='add'>+		.end	= PXA168_U2O_PHYBASE + USB_PHY_RANGE,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+		.name	= "phyregs",</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.start	= IRQ_PXA168_USB1,</div><div class='add'>+		.end	= IRQ_PXA168_USB1,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct platform_device pxa168_device_u2o = {</div><div class='add'>+	.name		= "mv-udc",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.resource	= pxa168_u2o_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(pxa168_u2o_resources),</div><div class='add'>+	.dev		=  {</div><div class='add'>+		.dma_mask	= &amp;usb_dma_mask,</div><div class='add'>+		.coherent_dma_mask = 0xffffffff,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+#endif /* CONFIG_USB_MV_UDC */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_USB_EHCI_MV_U2O</div><div class='add'>+struct resource pxa168_u2oehci_resources[] = {</div><div class='add'>+	/* regbase */</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,</div><div class='add'>+		.end	= PXA168_U2O_REGBASE + USB_REG_RANGE,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+		.name	= "capregs",</div><div class='add'>+	},</div><div class='add'>+	/* phybase */</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= PXA168_U2O_PHYBASE,</div><div class='add'>+		.end	= PXA168_U2O_PHYBASE + USB_PHY_RANGE,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+		.name	= "phyregs",</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.start	= IRQ_PXA168_USB1,</div><div class='add'>+		.end	= IRQ_PXA168_USB1,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct platform_device pxa168_device_u2oehci = {</div><div class='add'>+	.name		= "pxa-u2oehci",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.dma_mask		= &amp;usb_dma_mask,</div><div class='add'>+		.coherent_dma_mask	= 0xffffffff,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	.num_resources	= ARRAY_SIZE(pxa168_u2oehci_resources),</div><div class='add'>+	.resource	= pxa168_u2oehci_resources,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_USB_MV_OTG)</div><div class='add'>+struct resource pxa168_u2ootg_resources[] = {</div><div class='add'>+	/* regbase */</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,</div><div class='add'>+		.end	= PXA168_U2O_REGBASE + USB_REG_RANGE,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+		.name	= "capregs",</div><div class='add'>+	},</div><div class='add'>+	/* phybase */</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= PXA168_U2O_PHYBASE,</div><div class='add'>+		.end	= PXA168_U2O_PHYBASE + USB_PHY_RANGE,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+		.name	= "phyregs",</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.start	= IRQ_PXA168_USB1,</div><div class='add'>+		.end	= IRQ_PXA168_USB1,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct platform_device pxa168_device_u2ootg = {</div><div class='add'>+	.name		= "mv-otg",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.dev  = {</div><div class='add'>+		.dma_mask          = &amp;usb_dma_mask,</div><div class='add'>+		.coherent_dma_mask = 0xffffffff,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	.num_resources	= ARRAY_SIZE(pxa168_u2ootg_resources),</div><div class='add'>+	.resource      = pxa168_u2ootg_resources,</div><div class='add'>+};</div><div class='add'>+#endif /* CONFIG_USB_MV_OTG */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h<br/>index b1ece08174e8..f88a44c0ef91 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/addr-map.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/include/mach/addr-map.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/addr-map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/addr-map.h</a></div><div class='hunk'>@@ -31,4 +31,16 @@</div><div class='ctx'> #define SMC_CS1_PHYS_BASE	0x90000000</div><div class='ctx'> #define SMC_CS1_PHYS_SIZE	0x10000000</div><div class='ctx'> </div><div class='add'>+#define APMU_VIRT_BASE		(AXI_VIRT_BASE + 0x82800)</div><div class='add'>+#define APMU_REG(x)		(APMU_VIRT_BASE + (x))</div><div class='add'>+</div><div class='add'>+#define APBC_VIRT_BASE		(APB_VIRT_BASE + 0x015000)</div><div class='add'>+#define APBC_REG(x)		(APBC_VIRT_BASE + (x))</div><div class='add'>+</div><div class='add'>+#define MPMU_VIRT_BASE		(APB_VIRT_BASE + 0x50000)</div><div class='add'>+#define MPMU_REG(x)		(MPMU_VIRT_BASE + (x))</div><div class='add'>+</div><div class='add'>+#define CIU_VIRT_BASE		(AXI_VIRT_BASE + 0x82c00)</div><div class='add'>+#define CIU_REG(x)		(CIU_VIRT_BASE + (x))</div><div class='add'>+</div><div class='ctx'> #endif /* __ASM_MACH_ADDR_MAP_H */</div><div class='head'>diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h<br/>index d0ec7dae88e4..21217ef11b64 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/devices.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/include/mach/devices.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/devices.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/devices.h</a></div><div class='hunk'>@@ -50,4 +50,7 @@ struct pxa_device_desc mmp2_device_##_name __initdata = {		\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern int pxa_register_device(struct pxa_device_desc *, void *, size_t);</div><div class='add'>+extern int pxa_usb_phy_init(void __iomem *phy_reg);</div><div class='add'>+extern void pxa_usb_phy_deinit(void __iomem *phy_reg);</div><div class='add'>+</div><div class='ctx'> #endif /* __MACH_DEVICE_H */</div><div class='head'>diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S<br/>index 9cff9e7a2b26..bd152e24e6d7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/entry-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/include/mach/entry-macro.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/entry-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/entry-macro.S</a></div><div class='hunk'>@@ -6,13 +6,15 @@</div><div class='ctx'>  * published by the Free Software Foundation.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;mach/regs-icu.h&gt;</div><div class='ctx'> </div><div class='ctx'> 	.macro	get_irqnr_preamble, base, tmp</div><div class='ctx'> 	mrc	p15, 0, \tmp, c0, c0, 0		@ CPUID</div><div class='ctx'> 	and	\tmp, \tmp, #0xff00</div><div class='ctx'> 	cmp	\tmp, #0x5800</div><div class='del'>-	ldr	\base, =ICU_VIRT_BASE</div><div class='add'>+	ldr	\base, =mmp_icu_base</div><div class='add'>+	ldr	\base, [\base, #0]</div><div class='ctx'> 	addne	\base, \base, #0x10c		@ PJ1 AP INT SEL register</div><div class='ctx'> 	addeq	\base, \base, #0x104		@ PJ4 IRQ SEL register</div><div class='ctx'> 	.endm</div><div class='head'>diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h<br/>index d0e746626a3d..fb492a50a817 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/irqs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/include/mach/irqs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/irqs.h</a></div><div class='hunk'>@@ -125,7 +125,7 @@</div><div class='ctx'> #define IRQ_MMP2_RTC_MUX		5</div><div class='ctx'> #define IRQ_MMP2_TWSI1			7</div><div class='ctx'> #define IRQ_MMP2_GPU			8</div><div class='del'>-#define IRQ_MMP2_KEYPAD			9</div><div class='add'>+#define IRQ_MMP2_KEYPAD_MUX		9</div><div class='ctx'> #define IRQ_MMP2_ROTARY			10</div><div class='ctx'> #define IRQ_MMP2_TRACKBALL		11</div><div class='ctx'> #define IRQ_MMP2_ONEWIRE		12</div><div class='hunk'>@@ -163,11 +163,11 @@</div><div class='ctx'> #define IRQ_MMP2_DMA_FIQ		47</div><div class='ctx'> #define IRQ_MMP2_DMA_RIQ		48</div><div class='ctx'> #define IRQ_MMP2_GPIO			49</div><div class='del'>-#define IRQ_MMP2_SSP_MUX		51</div><div class='add'>+#define IRQ_MMP2_MIPI_HSI1_MUX		51</div><div class='ctx'> #define IRQ_MMP2_MMC2			52</div><div class='ctx'> #define IRQ_MMP2_MMC3			53</div><div class='ctx'> #define IRQ_MMP2_MMC4			54</div><div class='del'>-#define IRQ_MMP2_MIPI_HSI		55</div><div class='add'>+#define IRQ_MMP2_MIPI_HSI0_MUX		55</div><div class='ctx'> #define IRQ_MMP2_MSP			58</div><div class='ctx'> #define IRQ_MMP2_MIPI_SLIM_DMA		59</div><div class='ctx'> #define IRQ_MMP2_PJ4_FREQ_CHG		60</div><div class='hunk'>@@ -186,8 +186,14 @@</div><div class='ctx'> #define IRQ_MMP2_RTC_ALARM		(IRQ_MMP2_RTC_BASE + 0)</div><div class='ctx'> #define IRQ_MMP2_RTC			(IRQ_MMP2_RTC_BASE + 1)</div><div class='ctx'> </div><div class='add'>+/* secondary interrupt of INT #9 */</div><div class='add'>+#define IRQ_MMP2_KEYPAD_BASE		(IRQ_MMP2_RTC_BASE + 2)</div><div class='add'>+#define IRQ_MMP2_KPC			(IRQ_MMP2_KEYPAD_BASE + 0)</div><div class='add'>+#define IRQ_MMP2_ROTORY			(IRQ_MMP2_KEYPAD_BASE + 1)</div><div class='add'>+#define IRQ_MMP2_TBALL			(IRQ_MMP2_KEYPAD_BASE + 2)</div><div class='add'>+</div><div class='ctx'> /* secondary interrupt of INT #17 */</div><div class='del'>-#define IRQ_MMP2_TWSI_BASE		(IRQ_MMP2_RTC_BASE + 2)</div><div class='add'>+#define IRQ_MMP2_TWSI_BASE		(IRQ_MMP2_KEYPAD_BASE + 3)</div><div class='ctx'> #define IRQ_MMP2_TWSI2			(IRQ_MMP2_TWSI_BASE + 0)</div><div class='ctx'> #define IRQ_MMP2_TWSI3			(IRQ_MMP2_TWSI_BASE + 1)</div><div class='ctx'> #define IRQ_MMP2_TWSI4			(IRQ_MMP2_TWSI_BASE + 2)</div><div class='hunk'>@@ -212,11 +218,16 @@</div><div class='ctx'> #define IRQ_MMP2_COMMRX			(IRQ_MMP2_MISC_BASE + 14)</div><div class='ctx'> </div><div class='ctx'> /* secondary interrupt of INT #51 */</div><div class='del'>-#define IRQ_MMP2_SSP_BASE		(IRQ_MMP2_MISC_BASE + 15)</div><div class='del'>-#define IRQ_MMP2_SSP1_SRDY		(IRQ_MMP2_SSP_BASE + 0)</div><div class='del'>-#define IRQ_MMP2_SSP3_SRDY		(IRQ_MMP2_SSP_BASE + 1)</div><div class='add'>+#define IRQ_MMP2_MIPI_HSI1_BASE		(IRQ_MMP2_MISC_BASE + 15)</div><div class='add'>+#define IRQ_MMP2_HSI1_CAWAKE		(IRQ_MMP2_MIPI_HSI1_BASE + 0)</div><div class='add'>+#define IRQ_MMP2_MIPI_HSI_INT1		(IRQ_MMP2_MIPI_HSI1_BASE + 1)</div><div class='add'>+</div><div class='add'>+/* secondary interrupt of INT #55 */</div><div class='add'>+#define IRQ_MMP2_MIPI_HSI0_BASE		(IRQ_MMP2_MIPI_HSI1_BASE + 2)</div><div class='add'>+#define IRQ_MMP2_HSI0_CAWAKE		(IRQ_MMP2_MIPI_HSI0_BASE + 0)</div><div class='add'>+#define IRQ_MMP2_MIPI_HSI_INT0		(IRQ_MMP2_MIPI_HSI0_BASE + 1)</div><div class='ctx'> </div><div class='del'>-#define IRQ_MMP2_MUX_END		(IRQ_MMP2_SSP_BASE + 2)</div><div class='add'>+#define IRQ_MMP2_MUX_END		(IRQ_MMP2_MIPI_HSI0_BASE + 2)</div><div class='ctx'> </div><div class='ctx'> #define IRQ_GPIO_START			128</div><div class='ctx'> #define MMP_NR_BUILTIN_GPIO		192</div><div class='head'>diff --git a/arch/arm/mach-mmp/include/mach/pm-mmp2.h b/arch/arm/mach-mmp/include/mach/pm-mmp2.h<br/>new file mode 100644<br/>index 000000000000..98bd66ce8006<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/pm-mmp2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/pm-mmp2.h</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+/*</div><div class='add'>+ * MMP2 Power Management Routines</div><div class='add'>+ *</div><div class='add'>+ * This software program is licensed subject to the GNU General Public License</div><div class='add'>+ * (GPL).Version 2,June 1991, available at http://www.fsf.org/copyleft/gpl.html</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright 2010 Marvell International Ltd.</div><div class='add'>+ * All Rights Reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MMP2_PM_H__</div><div class='add'>+#define __MMP2_PM_H__</div><div class='add'>+</div><div class='add'>+#include &lt;mach/addr-map.h&gt;</div><div class='add'>+</div><div class='add'>+#define APMU_PJ_IDLE_CFG			APMU_REG(0x018)</div><div class='add'>+#define APMU_PJ_IDLE_CFG_PJ_IDLE		(1 &lt;&lt; 1)</div><div class='add'>+#define APMU_PJ_IDLE_CFG_PJ_PWRDWN		(1 &lt;&lt; 5)</div><div class='add'>+#define APMU_PJ_IDLE_CFG_PWR_SW(x)		((x) &lt;&lt; 16)</div><div class='add'>+#define APMU_PJ_IDLE_CFG_L2_PWR_SW		(1 &lt;&lt; 19)</div><div class='add'>+#define APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK	(3 &lt;&lt; 28)</div><div class='add'>+</div><div class='add'>+#define APMU_SRAM_PWR_DWN			APMU_REG(0x08c)</div><div class='add'>+</div><div class='add'>+#define MPMU_SCCR				MPMU_REG(0x038)</div><div class='add'>+#define MPMU_PCR_PJ				MPMU_REG(0x1000)</div><div class='add'>+#define MPMU_PCR_PJ_AXISD			(1 &lt;&lt; 31)</div><div class='add'>+#define MPMU_PCR_PJ_SLPEN			(1 &lt;&lt; 29)</div><div class='add'>+#define MPMU_PCR_PJ_SPSD			(1 &lt;&lt; 28)</div><div class='add'>+#define MPMU_PCR_PJ_DDRCORSD			(1 &lt;&lt; 27)</div><div class='add'>+#define MPMU_PCR_PJ_APBSD			(1 &lt;&lt; 26)</div><div class='add'>+#define MPMU_PCR_PJ_INTCLR			(1 &lt;&lt; 24)</div><div class='add'>+#define MPMU_PCR_PJ_SLPWP0			(1 &lt;&lt; 23)</div><div class='add'>+#define MPMU_PCR_PJ_SLPWP1			(1 &lt;&lt; 22)</div><div class='add'>+#define MPMU_PCR_PJ_SLPWP2			(1 &lt;&lt; 21)</div><div class='add'>+#define MPMU_PCR_PJ_SLPWP3			(1 &lt;&lt; 20)</div><div class='add'>+#define MPMU_PCR_PJ_VCTCXOSD			(1 &lt;&lt; 19)</div><div class='add'>+#define MPMU_PCR_PJ_SLPWP4			(1 &lt;&lt; 18)</div><div class='add'>+#define MPMU_PCR_PJ_SLPWP5			(1 &lt;&lt; 17)</div><div class='add'>+#define MPMU_PCR_PJ_SLPWP6			(1 &lt;&lt; 16)</div><div class='add'>+#define MPMU_PCR_PJ_SLPWP7			(1 &lt;&lt; 15)</div><div class='add'>+</div><div class='add'>+#define MPMU_PLL2_CTRL1				MPMU_REG(0x0414)</div><div class='add'>+#define MPMU_CGR_PJ				MPMU_REG(0x1024)</div><div class='add'>+#define MPMU_WUCRM_PJ				MPMU_REG(0x104c)</div><div class='add'>+#define MPMU_WUCRM_PJ_WAKEUP(x)			(1 &lt;&lt; (x))</div><div class='add'>+#define MPMU_WUCRM_PJ_RTC_ALARM			(1 &lt;&lt; 17)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	POWER_MODE_ACTIVE = 0,</div><div class='add'>+	POWER_MODE_CORE_INTIDLE,</div><div class='add'>+	POWER_MODE_CORE_EXTIDLE,</div><div class='add'>+	POWER_MODE_APPS_IDLE,</div><div class='add'>+	POWER_MODE_APPS_SLEEP,</div><div class='add'>+	POWER_MODE_CHIP_SLEEP,</div><div class='add'>+	POWER_MODE_SYS_SLEEP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern void mmp2_pm_enter_lowpower_mode(int state);</div><div class='add'>+extern int mmp2_set_wake(struct irq_data *d, unsigned int on);</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-mmp/include/mach/pm-pxa910.h b/arch/arm/mach-mmp/include/mach/pm-pxa910.h<br/>new file mode 100644<br/>index 000000000000..8cac8ab5253d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/pm-pxa910.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/pm-pxa910.h</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+/*</div><div class='add'>+ * PXA910 Power Management Routines</div><div class='add'>+ *</div><div class='add'>+ * This software program is licensed subject to the GNU General Public License</div><div class='add'>+ * (GPL).Version 2,June 1991, available at http://www.fsf.org/copyleft/gpl.html</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright 2009 Marvell International Ltd.</div><div class='add'>+ * All Rights Reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __PXA910_PM_H__</div><div class='add'>+#define __PXA910_PM_H__</div><div class='add'>+</div><div class='add'>+#define APMU_MOH_IDLE_CFG			APMU_REG(0x0018)</div><div class='add'>+#define APMU_MOH_IDLE_CFG_MOH_IDLE		(1 &lt;&lt; 1)</div><div class='add'>+#define APMU_MOH_IDLE_CFG_MOH_PWRDWN		(1 &lt;&lt; 5)</div><div class='add'>+#define APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN	(1 &lt;&lt; 6)</div><div class='add'>+#define APMU_MOH_IDLE_CFG_MOH_PWR_SW(x)		(((x) &amp; 0x3) &lt;&lt; 16)</div><div class='add'>+#define APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(x)	(((x) &amp; 0x3) &lt;&lt; 18)</div><div class='add'>+#define APMU_MOH_IDLE_CFG_MOH_DIS_MC_SW_REQ	(1 &lt;&lt; 21)</div><div class='add'>+#define APMU_MOH_IDLE_CFG_MOH_MC_WAKE_EN	(1 &lt;&lt; 20)</div><div class='add'>+</div><div class='add'>+#define APMU_SQU_CLK_GATE_CTRL			APMU_REG(0x001c)</div><div class='add'>+#define APMU_MC_HW_SLP_TYPE			APMU_REG(0x00b0)</div><div class='add'>+</div><div class='add'>+#define MPMU_FCCR				MPMU_REG(0x0008)</div><div class='add'>+#define MPMU_APCR				MPMU_REG(0x1000)</div><div class='add'>+#define MPMU_APCR_AXISD				(1 &lt;&lt; 31)</div><div class='add'>+#define MPMU_APCR_DSPSD				(1 &lt;&lt; 30)</div><div class='add'>+#define MPMU_APCR_SLPEN				(1 &lt;&lt; 29)</div><div class='add'>+#define MPMU_APCR_DTCMSD			(1 &lt;&lt; 28)</div><div class='add'>+#define MPMU_APCR_DDRCORSD			(1 &lt;&lt; 27)</div><div class='add'>+#define MPMU_APCR_APBSD				(1 &lt;&lt; 26)</div><div class='add'>+#define MPMU_APCR_BBSD				(1 &lt;&lt; 25)</div><div class='add'>+#define MPMU_APCR_SLPWP0			(1 &lt;&lt; 23)</div><div class='add'>+#define MPMU_APCR_SLPWP1			(1 &lt;&lt; 22)</div><div class='add'>+#define MPMU_APCR_SLPWP2			(1 &lt;&lt; 21)</div><div class='add'>+#define MPMU_APCR_SLPWP3			(1 &lt;&lt; 20)</div><div class='add'>+#define MPMU_APCR_VCTCXOSD			(1 &lt;&lt; 19)</div><div class='add'>+#define MPMU_APCR_SLPWP4			(1 &lt;&lt; 18)</div><div class='add'>+#define MPMU_APCR_SLPWP5			(1 &lt;&lt; 17)</div><div class='add'>+#define MPMU_APCR_SLPWP6			(1 &lt;&lt; 16)</div><div class='add'>+#define MPMU_APCR_SLPWP7			(1 &lt;&lt; 15)</div><div class='add'>+#define MPMU_APCR_MSASLPEN			(1 &lt;&lt; 14)</div><div class='add'>+#define MPMU_APCR_STBYEN			(1 &lt;&lt; 13)</div><div class='add'>+</div><div class='add'>+#define MPMU_AWUCRM				MPMU_REG(0x104c)</div><div class='add'>+#define MPMU_AWUCRM_AP_ASYNC_INT		(1 &lt;&lt; 25)</div><div class='add'>+#define MPMU_AWUCRM_AP_FULL_IDLE		(1 &lt;&lt; 24)</div><div class='add'>+#define MPMU_AWUCRM_SDH1			(1 &lt;&lt; 23)</div><div class='add'>+#define MPMU_AWUCRM_SDH2			(1 &lt;&lt; 22)</div><div class='add'>+#define MPMU_AWUCRM_KEYPRESS			(1 &lt;&lt; 21)</div><div class='add'>+#define MPMU_AWUCRM_TRACKBALL			(1 &lt;&lt; 20)</div><div class='add'>+#define MPMU_AWUCRM_NEWROTARY			(1 &lt;&lt; 19)</div><div class='add'>+#define MPMU_AWUCRM_RTC_ALARM			(1 &lt;&lt; 17)</div><div class='add'>+#define MPMU_AWUCRM_AP2_TIMER_3			(1 &lt;&lt; 13)</div><div class='add'>+#define MPMU_AWUCRM_AP2_TIMER_2			(1 &lt;&lt; 12)</div><div class='add'>+#define MPMU_AWUCRM_AP2_TIMER_1			(1 &lt;&lt; 11)</div><div class='add'>+#define MPMU_AWUCRM_AP1_TIMER_3			(1 &lt;&lt; 10)</div><div class='add'>+#define MPMU_AWUCRM_AP1_TIMER_2			(1 &lt;&lt; 9)</div><div class='add'>+#define MPMU_AWUCRM_AP1_TIMER_1			(1 &lt;&lt; 8)</div><div class='add'>+#define MPMU_AWUCRM_WAKEUP(x)			(1 &lt;&lt; ((x) &amp; 0x7))</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	POWER_MODE_ACTIVE = 0,</div><div class='add'>+	POWER_MODE_CORE_INTIDLE,</div><div class='add'>+	POWER_MODE_CORE_EXTIDLE,</div><div class='add'>+	POWER_MODE_APPS_IDLE,</div><div class='add'>+	POWER_MODE_APPS_SLEEP,</div><div class='add'>+	POWER_MODE_SYS_SLEEP,</div><div class='add'>+	POWER_MODE_HIBERNATE,</div><div class='add'>+	POWER_MODE_UDR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern int pxa910_set_wake(struct irq_data *data, unsigned int on);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h<br/>index dc03d580a06d..09dcd6e2b6a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/pxa168.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/include/mach/pxa168.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/pxa168.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/pxa168.h</a></div><div class='hunk'>@@ -16,6 +16,7 @@ extern void pxa168_clear_keypad_wakeup(void);</div><div class='ctx'> #include &lt;plat/pxa27x_keypad.h&gt;</div><div class='ctx'> #include &lt;mach/cputype.h&gt;</div><div class='ctx'> #include &lt;linux/pxa168_eth.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/mv_usb.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern struct pxa_device_desc pxa168_device_uart1;</div><div class='ctx'> extern struct pxa_device_desc pxa168_device_uart2;</div><div class='hunk'>@@ -36,12 +37,9 @@ extern struct pxa_device_desc pxa168_device_fb;</div><div class='ctx'> extern struct pxa_device_desc pxa168_device_keypad;</div><div class='ctx'> extern struct pxa_device_desc pxa168_device_eth;</div><div class='ctx'> </div><div class='del'>-struct pxa168_usb_pdata {</div><div class='del'>-	/* If NULL, default phy init routine for PXA168 would be called */</div><div class='del'>-	int (*phy_init)(void __iomem *usb_phy_reg_base);</div><div class='del'>-};</div><div class='ctx'> /* pdata can be NULL */</div><div class='del'>-int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata);</div><div class='add'>+extern int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> extern struct platform_device pxa168_device_gpio;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h<br/>index e2e1f1e5e124..793634c837ef 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/pxa910.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/include/mach/pxa910.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/pxa910.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/pxa910.h</a></div><div class='hunk'>@@ -20,6 +20,9 @@ extern struct pxa_device_desc pxa910_device_pwm2;</div><div class='ctx'> extern struct pxa_device_desc pxa910_device_pwm3;</div><div class='ctx'> extern struct pxa_device_desc pxa910_device_pwm4;</div><div class='ctx'> extern struct pxa_device_desc pxa910_device_nand;</div><div class='add'>+extern struct platform_device pxa168_device_u2o;</div><div class='add'>+extern struct platform_device pxa168_device_u2ootg;</div><div class='add'>+extern struct platform_device pxa168_device_u2oehci;</div><div class='ctx'> </div><div class='ctx'> extern struct platform_device pxa910_device_gpio;</div><div class='ctx'> extern struct platform_device pxa910_device_rtc;</div><div class='head'>diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h<br/>index 8a37fb003655..68b0c93ec6a1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/regs-apbc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/include/mach/regs-apbc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/regs-apbc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/regs-apbc.h</a></div><div class='hunk'>@@ -13,9 +13,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/addr-map.h&gt;</div><div class='ctx'> </div><div class='del'>-#define APBC_VIRT_BASE	(APB_VIRT_BASE + 0x015000)</div><div class='del'>-#define APBC_REG(x)	(APBC_VIRT_BASE + (x))</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * APB clock register offsets for PXA168</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h<br/>index 8447ac63e28f..7af8deb63e83 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/regs-apmu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/include/mach/regs-apmu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/regs-apmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/regs-apmu.h</a></div><div class='hunk'>@@ -13,9 +13,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/addr-map.h&gt;</div><div class='ctx'> </div><div class='del'>-#define APMU_VIRT_BASE	(AXI_VIRT_BASE + 0x82800)</div><div class='del'>-#define APMU_REG(x)	(APMU_VIRT_BASE + (x))</div><div class='del'>-</div><div class='ctx'> /* Clock Reset Control */</div><div class='ctx'> #define APMU_IRE	APMU_REG(0x048)</div><div class='ctx'> #define APMU_LCD	APMU_REG(0x04c)</div><div class='head'>diff --git a/arch/arm/mach-mmp/include/mach/regs-usb.h b/arch/arm/mach-mmp/include/mach/regs-usb.h<br/>new file mode 100644<br/>index 000000000000..b047bf487506<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/include/mach/regs-usb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/include/mach/regs-usb.h</a></div><div class='hunk'>@@ -0,0 +1,253 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2011 Marvell International Ltd. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute  it and/or modify it</div><div class='add'>+ * under  the terms of  the GNU General  Public License as published by the</div><div class='add'>+ * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='add'>+ * option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_ARCH_REGS_USB_H</div><div class='add'>+#define __ASM_ARCH_REGS_USB_H</div><div class='add'>+</div><div class='add'>+#define PXA168_U2O_REGBASE	(0xd4208000)</div><div class='add'>+#define PXA168_U2O_PHYBASE	(0xd4207000)</div><div class='add'>+</div><div class='add'>+#define PXA168_U2H_REGBASE      (0xd4209000)</div><div class='add'>+#define PXA168_U2H_PHYBASE      (0xd4206000)</div><div class='add'>+</div><div class='add'>+#define MMP3_HSIC1_REGBASE	(0xf0001000)</div><div class='add'>+#define MMP3_HSIC1_PHYBASE	(0xf0001800)</div><div class='add'>+</div><div class='add'>+#define MMP3_HSIC2_REGBASE	(0xf0002000)</div><div class='add'>+#define MMP3_HSIC2_PHYBASE	(0xf0002800)</div><div class='add'>+</div><div class='add'>+#define MMP3_FSIC_REGBASE	(0xf0003000)</div><div class='add'>+#define MMP3_FSIC_PHYBASE	(0xf0003800)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define USB_REG_RANGE		(0x1ff)</div><div class='add'>+#define USB_PHY_RANGE		(0xff)</div><div class='add'>+</div><div class='add'>+/* registers */</div><div class='add'>+#define U2x_CAPREGS_OFFSET       0x100</div><div class='add'>+</div><div class='add'>+/* phy regs */</div><div class='add'>+#define UTMI_REVISION		0x0</div><div class='add'>+#define UTMI_CTRL		0x4</div><div class='add'>+#define UTMI_PLL		0x8</div><div class='add'>+#define UTMI_TX			0xc</div><div class='add'>+#define UTMI_RX			0x10</div><div class='add'>+#define UTMI_IVREF		0x14</div><div class='add'>+#define UTMI_T0			0x18</div><div class='add'>+#define UTMI_T1			0x1c</div><div class='add'>+#define UTMI_T2			0x20</div><div class='add'>+#define UTMI_T3			0x24</div><div class='add'>+#define UTMI_T4			0x28</div><div class='add'>+#define UTMI_T5			0x2c</div><div class='add'>+#define UTMI_RESERVE		0x30</div><div class='add'>+#define UTMI_USB_INT		0x34</div><div class='add'>+#define UTMI_DBG_CTL		0x38</div><div class='add'>+#define UTMI_OTG_ADDON		0x3c</div><div class='add'>+</div><div class='add'>+/* For UTMICTRL Register */</div><div class='add'>+#define UTMI_CTRL_USB_CLK_EN                    (1 &lt;&lt; 31)</div><div class='add'>+/* pxa168 */</div><div class='add'>+#define UTMI_CTRL_SUSPEND_SET1                  (1 &lt;&lt; 30)</div><div class='add'>+#define UTMI_CTRL_SUSPEND_SET2                  (1 &lt;&lt; 29)</div><div class='add'>+#define UTMI_CTRL_RXBUF_PDWN                    (1 &lt;&lt; 24)</div><div class='add'>+#define UTMI_CTRL_TXBUF_PDWN                    (1 &lt;&lt; 11)</div><div class='add'>+</div><div class='add'>+#define UTMI_CTRL_INPKT_DELAY_SHIFT             30</div><div class='add'>+#define UTMI_CTRL_INPKT_DELAY_SOF_SHIFT		28</div><div class='add'>+#define UTMI_CTRL_PU_REF_SHIFT			20</div><div class='add'>+#define UTMI_CTRL_ARC_PULLDN_SHIFT              12</div><div class='add'>+#define UTMI_CTRL_PLL_PWR_UP_SHIFT              1</div><div class='add'>+#define UTMI_CTRL_PWR_UP_SHIFT                  0</div><div class='add'>+</div><div class='add'>+/* For UTMI_PLL Register */</div><div class='add'>+#define UTMI_PLL_PLLCALI12_SHIFT		29</div><div class='add'>+#define UTMI_PLL_PLLCALI12_MASK			(0x3 &lt;&lt; 29)</div><div class='add'>+</div><div class='add'>+#define UTMI_PLL_PLLVDD18_SHIFT			27</div><div class='add'>+#define UTMI_PLL_PLLVDD18_MASK			(0x3 &lt;&lt; 27)</div><div class='add'>+</div><div class='add'>+#define UTMI_PLL_PLLVDD12_SHIFT			25</div><div class='add'>+#define UTMI_PLL_PLLVDD12_MASK			(0x3 &lt;&lt; 25)</div><div class='add'>+</div><div class='add'>+#define UTMI_PLL_CLK_BLK_EN_SHIFT               24</div><div class='add'>+#define CLK_BLK_EN                              (0x1 &lt;&lt; 24)</div><div class='add'>+#define PLL_READY                               (0x1 &lt;&lt; 23)</div><div class='add'>+#define KVCO_EXT                                (0x1 &lt;&lt; 22)</div><div class='add'>+#define VCOCAL_START                            (0x1 &lt;&lt; 21)</div><div class='add'>+</div><div class='add'>+#define UTMI_PLL_KVCO_SHIFT			15</div><div class='add'>+#define UTMI_PLL_KVCO_MASK                      (0x7 &lt;&lt; 15)</div><div class='add'>+</div><div class='add'>+#define UTMI_PLL_ICP_SHIFT			12</div><div class='add'>+#define UTMI_PLL_ICP_MASK                       (0x7 &lt;&lt; 12)</div><div class='add'>+</div><div class='add'>+#define UTMI_PLL_FBDIV_SHIFT                    4</div><div class='add'>+#define UTMI_PLL_FBDIV_MASK                     (0xFF &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+#define UTMI_PLL_REFDIV_SHIFT                   0</div><div class='add'>+#define UTMI_PLL_REFDIV_MASK                    (0xF &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* For UTMI_TX Register */</div><div class='add'>+#define UTMI_TX_REG_EXT_FS_RCAL_SHIFT		27</div><div class='add'>+#define UTMI_TX_REG_EXT_FS_RCAL_MASK		(0xf &lt;&lt; 27)</div><div class='add'>+</div><div class='add'>+#define UTMI_TX_REG_EXT_FS_RCAL_EN_SHIFT	26</div><div class='add'>+#define UTMI_TX_REG_EXT_FS_RCAL_EN_MASK		(0x1 &lt;&lt; 26)</div><div class='add'>+</div><div class='add'>+#define UTMI_TX_TXVDD12_SHIFT                   22</div><div class='add'>+#define UTMI_TX_TXVDD12_MASK                    (0x3 &lt;&lt; 22)</div><div class='add'>+</div><div class='add'>+#define UTMI_TX_CK60_PHSEL_SHIFT                17</div><div class='add'>+#define UTMI_TX_CK60_PHSEL_MASK                 (0xf &lt;&lt; 17)</div><div class='add'>+</div><div class='add'>+#define UTMI_TX_IMPCAL_VTH_SHIFT                14</div><div class='add'>+#define UTMI_TX_IMPCAL_VTH_MASK                 (0x7 &lt;&lt; 14)</div><div class='add'>+</div><div class='add'>+#define REG_RCAL_START                          (0x1 &lt;&lt; 12)</div><div class='add'>+</div><div class='add'>+#define UTMI_TX_LOW_VDD_EN_SHIFT                11</div><div class='add'>+</div><div class='add'>+#define UTMI_TX_AMP_SHIFT			0</div><div class='add'>+#define UTMI_TX_AMP_MASK			(0x7 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* For UTMI_RX Register */</div><div class='add'>+#define UTMI_REG_SQ_LENGTH_SHIFT                15</div><div class='add'>+#define UTMI_REG_SQ_LENGTH_MASK                 (0x3 &lt;&lt; 15)</div><div class='add'>+</div><div class='add'>+#define UTMI_RX_SQ_THRESH_SHIFT                 4</div><div class='add'>+#define UTMI_RX_SQ_THRESH_MASK                  (0xf &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+#define UTMI_OTG_ADDON_OTG_ON			(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* For MMP3 USB Phy */</div><div class='add'>+#define USB2_PLL_REG0		0x4</div><div class='add'>+#define USB2_PLL_REG1		0x8</div><div class='add'>+#define USB2_TX_REG0		0x10</div><div class='add'>+#define USB2_TX_REG1		0x14</div><div class='add'>+#define USB2_TX_REG2		0x18</div><div class='add'>+#define USB2_RX_REG0		0x20</div><div class='add'>+#define USB2_RX_REG1		0x24</div><div class='add'>+#define USB2_RX_REG2		0x28</div><div class='add'>+#define USB2_ANA_REG0		0x30</div><div class='add'>+#define USB2_ANA_REG1		0x34</div><div class='add'>+#define USB2_ANA_REG2		0x38</div><div class='add'>+#define USB2_DIG_REG0		0x3C</div><div class='add'>+#define USB2_DIG_REG1		0x40</div><div class='add'>+#define USB2_DIG_REG2		0x44</div><div class='add'>+#define USB2_DIG_REG3		0x48</div><div class='add'>+#define USB2_TEST_REG0		0x4C</div><div class='add'>+#define USB2_TEST_REG1		0x50</div><div class='add'>+#define USB2_TEST_REG2		0x54</div><div class='add'>+#define USB2_CHARGER_REG0	0x58</div><div class='add'>+#define USB2_OTG_REG0		0x5C</div><div class='add'>+#define USB2_PHY_MON0		0x60</div><div class='add'>+#define USB2_RESETVE_REG0	0x64</div><div class='add'>+#define USB2_ICID_REG0		0x78</div><div class='add'>+#define USB2_ICID_REG1		0x7C</div><div class='add'>+</div><div class='add'>+/* USB2_PLL_REG0 */</div><div class='add'>+/* This is for Ax stepping */</div><div class='add'>+#define USB2_PLL_FBDIV_SHIFT_MMP3		0</div><div class='add'>+#define USB2_PLL_FBDIV_MASK_MMP3		(0xFF &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+#define USB2_PLL_REFDIV_SHIFT_MMP3		8</div><div class='add'>+#define USB2_PLL_REFDIV_MASK_MMP3		(0xF &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+#define USB2_PLL_VDD12_SHIFT_MMP3		12</div><div class='add'>+#define USB2_PLL_VDD18_SHIFT_MMP3		14</div><div class='add'>+</div><div class='add'>+/* This is for B0 stepping */</div><div class='add'>+#define USB2_PLL_FBDIV_SHIFT_MMP3_B0		0</div><div class='add'>+#define USB2_PLL_REFDIV_SHIFT_MMP3_B0		9</div><div class='add'>+#define USB2_PLL_VDD18_SHIFT_MMP3_B0		14</div><div class='add'>+#define USB2_PLL_FBDIV_MASK_MMP3_B0		0x01FF</div><div class='add'>+#define USB2_PLL_REFDIV_MASK_MMP3_B0		0x3E00</div><div class='add'>+</div><div class='add'>+#define USB2_PLL_CAL12_SHIFT_MMP3		0</div><div class='add'>+#define USB2_PLL_CALI12_MASK_MMP3		(0x3 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+#define USB2_PLL_VCOCAL_START_SHIFT_MMP3	2</div><div class='add'>+</div><div class='add'>+#define USB2_PLL_KVCO_SHIFT_MMP3		4</div><div class='add'>+#define USB2_PLL_KVCO_MASK_MMP3			(0x7&lt;&lt;4)</div><div class='add'>+</div><div class='add'>+#define USB2_PLL_ICP_SHIFT_MMP3			8</div><div class='add'>+#define USB2_PLL_ICP_MASK_MMP3			(0x7&lt;&lt;8)</div><div class='add'>+</div><div class='add'>+#define USB2_PLL_LOCK_BYPASS_SHIFT_MMP3		12</div><div class='add'>+</div><div class='add'>+#define USB2_PLL_PU_PLL_SHIFT_MMP3		13</div><div class='add'>+#define USB2_PLL_PU_PLL_MASK			(0x1 &lt;&lt; 13)</div><div class='add'>+</div><div class='add'>+#define USB2_PLL_READY_MASK_MMP3		(0x1 &lt;&lt; 15)</div><div class='add'>+</div><div class='add'>+/* USB2_TX_REG0 */</div><div class='add'>+#define USB2_TX_IMPCAL_VTH_SHIFT_MMP3		8</div><div class='add'>+#define USB2_TX_IMPCAL_VTH_MASK_MMP3		(0x7 &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+#define USB2_TX_RCAL_START_SHIFT_MMP3		13</div><div class='add'>+</div><div class='add'>+/* USB2_TX_REG1 */</div><div class='add'>+#define USB2_TX_CK60_PHSEL_SHIFT_MMP3		0</div><div class='add'>+#define USB2_TX_CK60_PHSEL_MASK_MMP3		(0xf &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+#define USB2_TX_AMP_SHIFT_MMP3			4</div><div class='add'>+#define USB2_TX_AMP_MASK_MMP3			(0x7 &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+#define USB2_TX_VDD12_SHIFT_MMP3		8</div><div class='add'>+#define USB2_TX_VDD12_MASK_MMP3			(0x3 &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+/* USB2_TX_REG2 */</div><div class='add'>+#define USB2_TX_DRV_SLEWRATE_SHIFT		10</div><div class='add'>+</div><div class='add'>+/* USB2_RX_REG0 */</div><div class='add'>+#define USB2_RX_SQ_THRESH_SHIFT_MMP3		4</div><div class='add'>+#define USB2_RX_SQ_THRESH_MASK_MMP3		(0xf &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+#define USB2_RX_SQ_LENGTH_SHIFT_MMP3		10</div><div class='add'>+#define USB2_RX_SQ_LENGTH_MASK_MMP3		(0x3 &lt;&lt; 10)</div><div class='add'>+</div><div class='add'>+/* USB2_ANA_REG1*/</div><div class='add'>+#define USB2_ANA_PU_ANA_SHIFT_MMP3		14</div><div class='add'>+</div><div class='add'>+/* USB2_OTG_REG0 */</div><div class='add'>+#define USB2_OTG_PU_OTG_SHIFT_MMP3		3</div><div class='add'>+</div><div class='add'>+/* fsic registers */</div><div class='add'>+#define FSIC_MISC			0x4</div><div class='add'>+#define FSIC_INT			0x28</div><div class='add'>+#define FSIC_CTRL			0x30</div><div class='add'>+</div><div class='add'>+/* HSIC registers */</div><div class='add'>+#define HSIC_PAD_CTRL			0x4</div><div class='add'>+</div><div class='add'>+#define HSIC_CTRL			0x8</div><div class='add'>+#define HSIC_CTRL_HSIC_ENABLE		(1&lt;&lt;7)</div><div class='add'>+#define HSIC_CTRL_PLL_BYPASS		(1&lt;&lt;4)</div><div class='add'>+</div><div class='add'>+#define TEST_GRP_0			0xc</div><div class='add'>+#define TEST_GRP_1			0x10</div><div class='add'>+</div><div class='add'>+#define HSIC_INT			0x14</div><div class='add'>+#define HSIC_INT_READY_INT_EN		(1&lt;&lt;10)</div><div class='add'>+#define HSIC_INT_CONNECT_INT_EN		(1&lt;&lt;9)</div><div class='add'>+#define HSIC_INT_CORE_INT_EN		(1&lt;&lt;8)</div><div class='add'>+#define HSIC_INT_HS_READY		(1&lt;&lt;2)</div><div class='add'>+#define HSIC_INT_CONNECT		(1&lt;&lt;1)</div><div class='add'>+#define HSIC_INT_CORE			(1&lt;&lt;0)</div><div class='add'>+</div><div class='add'>+#define HSIC_CONFIG			0x18</div><div class='add'>+#define USBHSIC_CTRL			0x20</div><div class='add'>+</div><div class='add'>+#define HSIC_USB_CTRL			0x28</div><div class='add'>+#define HSIC_USB_CTRL_CLKEN		1</div><div class='add'>+#define	HSIC_USB_CLK_PHY		0x0</div><div class='add'>+#define HSIC_USB_CLK_PMU		0x1</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_ARCH_PXA_U2O_H */</div><div class='head'>diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c<br/>deleted file mode 100644<br/>index 7895d277421e..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/irq-mmp2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/irq-mmp2.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,158 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/arm/mach-mmp/irq-mmp2.c</div><div class='del'>- *</div><div class='del'>- *  Generic IRQ handling, GPIO IRQ demultiplexing, etc.</div><div class='del'>- *</div><div class='del'>- *  Author:	Haojian Zhuang &lt;haojian.zhuang@marvell.com&gt;</div><div class='del'>- *  Copyright:	Marvell International Ltd.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify</div><div class='del'>- *  it under the terms of the GNU General Public License version 2 as</div><div class='del'>- *  published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/irqs.h&gt;</div><div class='del'>-#include &lt;mach/regs-icu.h&gt;</div><div class='del'>-#include &lt;mach/mmp2.h&gt;</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-</div><div class='del'>-static void icu_mask_irq(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	uint32_t r = __raw_readl(ICU_INT_CONF(d-&gt;irq));</div><div class='del'>-</div><div class='del'>-	r &amp;= ~ICU_INT_ROUTE_PJ4_IRQ;</div><div class='del'>-	__raw_writel(r, ICU_INT_CONF(d-&gt;irq));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void icu_unmask_irq(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	uint32_t r = __raw_readl(ICU_INT_CONF(d-&gt;irq));</div><div class='del'>-</div><div class='del'>-	r |= ICU_INT_ROUTE_PJ4_IRQ;</div><div class='del'>-	__raw_writel(r, ICU_INT_CONF(d-&gt;irq));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip icu_irq_chip = {</div><div class='del'>-	.name		= "icu_irq",</div><div class='del'>-	.irq_mask	= icu_mask_irq,</div><div class='del'>-	.irq_mask_ack	= icu_mask_irq,</div><div class='del'>-	.irq_unmask	= icu_unmask_irq,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void pmic_irq_ack(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	if (d-&gt;irq == IRQ_MMP2_PMIC)</div><div class='del'>-		mmp2_clear_pmic_int();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define SECOND_IRQ_MASK(_name_, irq_base, prefix)			\</div><div class='del'>-static void _name_##_mask_irq(struct irq_data *d)			\</div><div class='del'>-{									\</div><div class='del'>-	uint32_t r;							\</div><div class='del'>-	r = __raw_readl(prefix##_MASK) | (1 &lt;&lt; (d-&gt;irq - irq_base));	\</div><div class='del'>-	__raw_writel(r, prefix##_MASK);					\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define SECOND_IRQ_UNMASK(_name_, irq_base, prefix)			\</div><div class='del'>-static void _name_##_unmask_irq(struct irq_data *d)			\</div><div class='del'>-{									\</div><div class='del'>-	uint32_t r;							\</div><div class='del'>-	r = __raw_readl(prefix##_MASK) &amp; ~(1 &lt;&lt; (d-&gt;irq - irq_base));	\</div><div class='del'>-	__raw_writel(r, prefix##_MASK);					\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define SECOND_IRQ_DEMUX(_name_, irq_base, prefix)			\</div><div class='del'>-static void _name_##_irq_demux(unsigned int irq, struct irq_desc *desc)	\</div><div class='del'>-{									\</div><div class='del'>-	unsigned long status, mask, n;					\</div><div class='del'>-	mask = __raw_readl(prefix##_MASK);				\</div><div class='del'>-	while (1) {							\</div><div class='del'>-		status = __raw_readl(prefix##_STATUS) &amp; ~mask;		\</div><div class='del'>-		if (status == 0)					\</div><div class='del'>-			break;						\</div><div class='del'>-		n = find_first_bit(&amp;status, BITS_PER_LONG);		\</div><div class='del'>-		while (n &lt; BITS_PER_LONG) {				\</div><div class='del'>-			generic_handle_irq(irq_base + n);		\</div><div class='del'>-			n = find_next_bit(&amp;status, BITS_PER_LONG, n+1);	\</div><div class='del'>-		}							\</div><div class='del'>-	}								\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define SECOND_IRQ_CHIP(_name_, irq_base, prefix)			\</div><div class='del'>-SECOND_IRQ_MASK(_name_, irq_base, prefix)				\</div><div class='del'>-SECOND_IRQ_UNMASK(_name_, irq_base, prefix)				\</div><div class='del'>-SECOND_IRQ_DEMUX(_name_, irq_base, prefix)				\</div><div class='del'>-static struct irq_chip _name_##_irq_chip = {				\</div><div class='del'>-	.name		= #_name_,					\</div><div class='del'>-	.irq_mask	= _name_##_mask_irq,				\</div><div class='del'>-	.irq_unmask	= _name_##_unmask_irq,				\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-SECOND_IRQ_CHIP(pmic, IRQ_MMP2_PMIC_BASE, MMP2_ICU_INT4);</div><div class='del'>-SECOND_IRQ_CHIP(rtc,  IRQ_MMP2_RTC_BASE,  MMP2_ICU_INT5);</div><div class='del'>-SECOND_IRQ_CHIP(twsi, IRQ_MMP2_TWSI_BASE, MMP2_ICU_INT17);</div><div class='del'>-SECOND_IRQ_CHIP(misc, IRQ_MMP2_MISC_BASE, MMP2_ICU_INT35);</div><div class='del'>-SECOND_IRQ_CHIP(ssp,  IRQ_MMP2_SSP_BASE,  MMP2_ICU_INT51);</div><div class='del'>-</div><div class='del'>-static void init_mux_irq(struct irq_chip *chip, int start, int num)</div><div class='del'>-{</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	for (irq = start; num &gt; 0; irq++, num--) {</div><div class='del'>-		struct irq_data *d = irq_get_irq_data(irq);</div><div class='del'>-</div><div class='del'>-		/* mask and clear the IRQ */</div><div class='del'>-		chip-&gt;irq_mask(d);</div><div class='del'>-		if (chip-&gt;irq_ack)</div><div class='del'>-			chip-&gt;irq_ack(d);</div><div class='del'>-</div><div class='del'>-		irq_set_chip(irq, chip);</div><div class='del'>-		set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-		irq_set_handler(irq, handle_level_irq);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init mmp2_init_icu(void)</div><div class='del'>-{</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	for (irq = 0; irq &lt; IRQ_MMP2_MUX_BASE; irq++) {</div><div class='del'>-		icu_mask_irq(irq_get_irq_data(irq));</div><div class='del'>-		irq_set_chip(irq, &amp;icu_irq_chip);</div><div class='del'>-		set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-</div><div class='del'>-		switch (irq) {</div><div class='del'>-		case IRQ_MMP2_PMIC_MUX:</div><div class='del'>-		case IRQ_MMP2_RTC_MUX:</div><div class='del'>-		case IRQ_MMP2_TWSI_MUX:</div><div class='del'>-		case IRQ_MMP2_MISC_MUX:</div><div class='del'>-		case IRQ_MMP2_SSP_MUX:</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			irq_set_handler(irq, handle_level_irq);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* NOTE: IRQ_MMP2_PMIC requires the PMIC MFPR register</div><div class='del'>-	 * to be written to clear the interrupt</div><div class='del'>-	 */</div><div class='del'>-	pmic_irq_chip.irq_ack = pmic_irq_ack;</div><div class='del'>-</div><div class='del'>-	init_mux_irq(&amp;pmic_irq_chip, IRQ_MMP2_PMIC_BASE, 2);</div><div class='del'>-	init_mux_irq(&amp;rtc_irq_chip, IRQ_MMP2_RTC_BASE, 2);</div><div class='del'>-	init_mux_irq(&amp;twsi_irq_chip, IRQ_MMP2_TWSI_BASE, 5);</div><div class='del'>-	init_mux_irq(&amp;misc_irq_chip, IRQ_MMP2_MISC_BASE, 15);</div><div class='del'>-	init_mux_irq(&amp;ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2);</div><div class='del'>-</div><div class='del'>-	irq_set_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux);</div><div class='del'>-	irq_set_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux);</div><div class='del'>-	irq_set_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux);</div><div class='del'>-	irq_set_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux);</div><div class='del'>-	irq_set_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-mmp/irq-pxa168.c b/arch/arm/mach-mmp/irq-pxa168.c<br/>deleted file mode 100644<br/>index 89706a0d08f1..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/irq-pxa168.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/irq-pxa168.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,54 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/arm/mach-mmp/irq.c</div><div class='del'>- *</div><div class='del'>- *  Generic IRQ handling, GPIO IRQ demultiplexing, etc.</div><div class='del'>- *</div><div class='del'>- *  Author:	Bin Yang &lt;bin.yang@marvell.com&gt;</div><div class='del'>- *  Created:	Sep 30, 2008</div><div class='del'>- *  Copyright:	Marvell International Ltd.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify</div><div class='del'>- *  it under the terms of the GNU General Public License version 2 as</div><div class='del'>- *  published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/regs-icu.h&gt;</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-</div><div class='del'>-#define IRQ_ROUTE_TO_AP		(ICU_INT_CONF_AP_INT | ICU_INT_CONF_IRQ)</div><div class='del'>-</div><div class='del'>-#define PRIORITY_DEFAULT	0x1</div><div class='del'>-#define PRIORITY_NONE		0x0	/* means IRQ disabled */</div><div class='del'>-</div><div class='del'>-static void icu_mask_irq(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(PRIORITY_NONE, ICU_INT_CONF(d-&gt;irq));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void icu_unmask_irq(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(IRQ_ROUTE_TO_AP | PRIORITY_DEFAULT, ICU_INT_CONF(d-&gt;irq));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip icu_irq_chip = {</div><div class='del'>-	.name		= "icu_irq",</div><div class='del'>-	.irq_ack	= icu_mask_irq,</div><div class='del'>-	.irq_mask	= icu_mask_irq,</div><div class='del'>-	.irq_unmask	= icu_unmask_irq,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init icu_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	for (irq = 0; irq &lt; 64; irq++) {</div><div class='del'>-		icu_mask_irq(irq_get_irq_data(irq));</div><div class='del'>-		irq_set_chip_and_handler(irq, &amp;icu_irq_chip, handle_level_irq);</div><div class='del'>-		set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-mmp/irq.c b/arch/arm/mach-mmp/irq.c<br/>new file mode 100644<br/>index 000000000000..fcfe0e3bd701<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/irq.c</a></div><div class='hunk'>@@ -0,0 +1,458 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/arm/mach-mmp/irq.c</div><div class='add'>+ *</div><div class='add'>+ *  Generic IRQ handling, GPIO IRQ demultiplexing, etc.</div><div class='add'>+ *  Copyright (C) 2008 - 2012 Marvell Technology Group Ltd.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Bin Yang &lt;bin.yang@marvell.com&gt;</div><div class='add'>+ *              Haojian Zhuang &lt;haojian.zhuang@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *  it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ *  published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/irqs.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CPU_MMP2</div><div class='add'>+#include &lt;mach/pm-mmp2.h&gt;</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_CPU_PXA910</div><div class='add'>+#include &lt;mach/pm-pxa910.h&gt;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='add'>+#define MAX_ICU_NR		16</div><div class='add'>+</div><div class='add'>+struct icu_chip_data {</div><div class='add'>+	int			nr_irqs;</div><div class='add'>+	unsigned int		virq_base;</div><div class='add'>+	unsigned int		cascade_irq;</div><div class='add'>+	void __iomem		*reg_status;</div><div class='add'>+	void __iomem		*reg_mask;</div><div class='add'>+	unsigned int		conf_enable;</div><div class='add'>+	unsigned int		conf_disable;</div><div class='add'>+	unsigned int		conf_mask;</div><div class='add'>+	unsigned int		clr_mfp_irq_base;</div><div class='add'>+	unsigned int		clr_mfp_hwirq;</div><div class='add'>+	struct irq_domain	*domain;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mmp_intc_conf {</div><div class='add'>+	unsigned int	conf_enable;</div><div class='add'>+	unsigned int	conf_disable;</div><div class='add'>+	unsigned int	conf_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __iomem *mmp_icu_base;</div><div class='add'>+static struct icu_chip_data icu_data[MAX_ICU_NR];</div><div class='add'>+static int max_icu_nr;</div><div class='add'>+</div><div class='add'>+extern void mmp2_clear_pmic_int(void);</div><div class='add'>+</div><div class='add'>+static void icu_mask_ack_irq(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct irq_domain *domain = d-&gt;domain;</div><div class='add'>+	struct icu_chip_data *data = (struct icu_chip_data *)domain-&gt;host_data;</div><div class='add'>+	int hwirq;</div><div class='add'>+	u32 r;</div><div class='add'>+</div><div class='add'>+	hwirq = d-&gt;irq - data-&gt;virq_base;</div><div class='add'>+	if (data == &amp;icu_data[0]) {</div><div class='add'>+		r = readl_relaxed(mmp_icu_base + (hwirq &lt;&lt; 2));</div><div class='add'>+		r &amp;= ~data-&gt;conf_mask;</div><div class='add'>+		r |= data-&gt;conf_disable;</div><div class='add'>+		writel_relaxed(r, mmp_icu_base + (hwirq &lt;&lt; 2));</div><div class='add'>+	} else {</div><div class='add'>+#ifdef CONFIG_CPU_MMP2</div><div class='add'>+		if ((data-&gt;virq_base == data-&gt;clr_mfp_irq_base)</div><div class='add'>+			&amp;&amp; (hwirq == data-&gt;clr_mfp_hwirq))</div><div class='add'>+			mmp2_clear_pmic_int();</div><div class='add'>+#endif</div><div class='add'>+		r = readl_relaxed(data-&gt;reg_mask) | (1 &lt;&lt; hwirq);</div><div class='add'>+		writel_relaxed(r, data-&gt;reg_mask);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void icu_mask_irq(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct irq_domain *domain = d-&gt;domain;</div><div class='add'>+	struct icu_chip_data *data = (struct icu_chip_data *)domain-&gt;host_data;</div><div class='add'>+	int hwirq;</div><div class='add'>+	u32 r;</div><div class='add'>+</div><div class='add'>+	hwirq = d-&gt;irq - data-&gt;virq_base;</div><div class='add'>+	if (data == &amp;icu_data[0]) {</div><div class='add'>+		r = readl_relaxed(mmp_icu_base + (hwirq &lt;&lt; 2));</div><div class='add'>+		r &amp;= ~data-&gt;conf_mask;</div><div class='add'>+		r |= data-&gt;conf_disable;</div><div class='add'>+		writel_relaxed(r, mmp_icu_base + (hwirq &lt;&lt; 2));</div><div class='add'>+	} else {</div><div class='add'>+		r = readl_relaxed(data-&gt;reg_mask) | (1 &lt;&lt; hwirq);</div><div class='add'>+		writel_relaxed(r, data-&gt;reg_mask);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void icu_unmask_irq(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct irq_domain *domain = d-&gt;domain;</div><div class='add'>+	struct icu_chip_data *data = (struct icu_chip_data *)domain-&gt;host_data;</div><div class='add'>+	int hwirq;</div><div class='add'>+	u32 r;</div><div class='add'>+</div><div class='add'>+	hwirq = d-&gt;irq - data-&gt;virq_base;</div><div class='add'>+	if (data == &amp;icu_data[0]) {</div><div class='add'>+		r = readl_relaxed(mmp_icu_base + (hwirq &lt;&lt; 2));</div><div class='add'>+		r &amp;= ~data-&gt;conf_mask;</div><div class='add'>+		r |= data-&gt;conf_enable;</div><div class='add'>+		writel_relaxed(r, mmp_icu_base + (hwirq &lt;&lt; 2));</div><div class='add'>+	} else {</div><div class='add'>+		r = readl_relaxed(data-&gt;reg_mask) &amp; ~(1 &lt;&lt; hwirq);</div><div class='add'>+		writel_relaxed(r, data-&gt;reg_mask);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_chip icu_irq_chip = {</div><div class='add'>+	.name		= "icu_irq",</div><div class='add'>+	.irq_mask	= icu_mask_irq,</div><div class='add'>+	.irq_mask_ack	= icu_mask_ack_irq,</div><div class='add'>+	.irq_unmask	= icu_unmask_irq,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void icu_mux_irq_demux(unsigned int irq, struct irq_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct irq_domain *domain;</div><div class='add'>+	struct icu_chip_data *data;</div><div class='add'>+	int i;</div><div class='add'>+	unsigned long mask, status, n;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; max_icu_nr; i++) {</div><div class='add'>+		if (irq == icu_data[i].cascade_irq) {</div><div class='add'>+			domain = icu_data[i].domain;</div><div class='add'>+			data = (struct icu_chip_data *)domain-&gt;host_data;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (i &gt;= max_icu_nr) {</div><div class='add'>+		pr_err("Spurious irq %d in MMP INTC\n", irq);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mask = readl_relaxed(data-&gt;reg_mask);</div><div class='add'>+	while (1) {</div><div class='add'>+		status = readl_relaxed(data-&gt;reg_status) &amp; ~mask;</div><div class='add'>+		if (status == 0)</div><div class='add'>+			break;</div><div class='add'>+		n = find_first_bit(&amp;status, BITS_PER_LONG);</div><div class='add'>+		while (n &lt; BITS_PER_LONG) {</div><div class='add'>+			generic_handle_irq(icu_data[i].virq_base + n);</div><div class='add'>+			n = find_next_bit(&amp;status, BITS_PER_LONG, n + 1);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mmp_irq_domain_map(struct irq_domain *d, unsigned int irq,</div><div class='add'>+			      irq_hw_number_t hw)</div><div class='add'>+{</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;icu_irq_chip, handle_level_irq);</div><div class='add'>+	set_irq_flags(irq, IRQF_VALID);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mmp_irq_domain_xlate(struct irq_domain *d, struct device_node *node,</div><div class='add'>+				const u32 *intspec, unsigned int intsize,</div><div class='add'>+				unsigned long *out_hwirq,</div><div class='add'>+				unsigned int *out_type)</div><div class='add'>+{</div><div class='add'>+	*out_hwirq = intspec[0];</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct irq_domain_ops mmp_irq_domain_ops = {</div><div class='add'>+	.map		= mmp_irq_domain_map,</div><div class='add'>+	.xlate		= mmp_irq_domain_xlate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mmp_intc_conf mmp_conf = {</div><div class='add'>+	.conf_enable	= 0x51,</div><div class='add'>+	.conf_disable	= 0x0,</div><div class='add'>+	.conf_mask	= 0x7f,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mmp_intc_conf mmp2_conf = {</div><div class='add'>+	.conf_enable	= 0x20,</div><div class='add'>+	.conf_disable	= 0x0,</div><div class='add'>+	.conf_mask	= 0x7f,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MMP (ARMv5) */</div><div class='add'>+void __init icu_init_irq(void)</div><div class='add'>+{</div><div class='add'>+	int irq;</div><div class='add'>+</div><div class='add'>+	max_icu_nr = 1;</div><div class='add'>+	mmp_icu_base = ioremap(0xd4282000, 0x1000);</div><div class='add'>+	icu_data[0].conf_enable = mmp_conf.conf_enable;</div><div class='add'>+	icu_data[0].conf_disable = mmp_conf.conf_disable;</div><div class='add'>+	icu_data[0].conf_mask = mmp_conf.conf_mask;</div><div class='add'>+	icu_data[0].nr_irqs = 64;</div><div class='add'>+	icu_data[0].virq_base = 0;</div><div class='add'>+	icu_data[0].domain = irq_domain_add_legacy(NULL, 64, 0, 0,</div><div class='add'>+						   &amp;irq_domain_simple_ops,</div><div class='add'>+						   &amp;icu_data[0]);</div><div class='add'>+	for (irq = 0; irq &lt; 64; irq++) {</div><div class='add'>+		icu_mask_irq(irq_get_irq_data(irq));</div><div class='add'>+		irq_set_chip_and_handler(irq, &amp;icu_irq_chip, handle_level_irq);</div><div class='add'>+		set_irq_flags(irq, IRQF_VALID);</div><div class='add'>+	}</div><div class='add'>+	irq_set_default_host(icu_data[0].domain);</div><div class='add'>+#ifdef CONFIG_CPU_PXA910</div><div class='add'>+	icu_irq_chip.irq_set_wake = pxa910_set_wake;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* MMP2 (ARMv7) */</div><div class='add'>+void __init mmp2_init_icu(void)</div><div class='add'>+{</div><div class='add'>+	int irq;</div><div class='add'>+</div><div class='add'>+	max_icu_nr = 8;</div><div class='add'>+	mmp_icu_base = ioremap(0xd4282000, 0x1000);</div><div class='add'>+	icu_data[0].conf_enable = mmp2_conf.conf_enable;</div><div class='add'>+	icu_data[0].conf_disable = mmp2_conf.conf_disable;</div><div class='add'>+	icu_data[0].conf_mask = mmp2_conf.conf_mask;</div><div class='add'>+	icu_data[0].nr_irqs = 64;</div><div class='add'>+	icu_data[0].virq_base = 0;</div><div class='add'>+	icu_data[0].domain = irq_domain_add_legacy(NULL, 64, 0, 0,</div><div class='add'>+						   &amp;irq_domain_simple_ops,</div><div class='add'>+						   &amp;icu_data[0]);</div><div class='add'>+	icu_data[1].reg_status = mmp_icu_base + 0x150;</div><div class='add'>+	icu_data[1].reg_mask = mmp_icu_base + 0x168;</div><div class='add'>+	icu_data[1].clr_mfp_irq_base = IRQ_MMP2_PMIC_BASE;</div><div class='add'>+	icu_data[1].clr_mfp_hwirq = IRQ_MMP2_PMIC - IRQ_MMP2_PMIC_BASE;</div><div class='add'>+	icu_data[1].nr_irqs = 2;</div><div class='add'>+	icu_data[1].virq_base = IRQ_MMP2_PMIC_BASE;</div><div class='add'>+	icu_data[1].domain = irq_domain_add_legacy(NULL, icu_data[1].nr_irqs,</div><div class='add'>+						   icu_data[1].virq_base, 0,</div><div class='add'>+						   &amp;irq_domain_simple_ops,</div><div class='add'>+						   &amp;icu_data[1]);</div><div class='add'>+	icu_data[2].reg_status = mmp_icu_base + 0x154;</div><div class='add'>+	icu_data[2].reg_mask = mmp_icu_base + 0x16c;</div><div class='add'>+	icu_data[2].nr_irqs = 2;</div><div class='add'>+	icu_data[2].virq_base = IRQ_MMP2_RTC_BASE;</div><div class='add'>+	icu_data[2].domain = irq_domain_add_legacy(NULL, icu_data[2].nr_irqs,</div><div class='add'>+						   icu_data[2].virq_base, 0,</div><div class='add'>+						   &amp;irq_domain_simple_ops,</div><div class='add'>+						   &amp;icu_data[2]);</div><div class='add'>+	icu_data[3].reg_status = mmp_icu_base + 0x180;</div><div class='add'>+	icu_data[3].reg_mask = mmp_icu_base + 0x17c;</div><div class='add'>+	icu_data[3].nr_irqs = 3;</div><div class='add'>+	icu_data[3].virq_base = IRQ_MMP2_KEYPAD_BASE;</div><div class='add'>+	icu_data[3].domain = irq_domain_add_legacy(NULL, icu_data[3].nr_irqs,</div><div class='add'>+						   icu_data[3].virq_base, 0,</div><div class='add'>+						   &amp;irq_domain_simple_ops,</div><div class='add'>+						   &amp;icu_data[3]);</div><div class='add'>+	icu_data[4].reg_status = mmp_icu_base + 0x158;</div><div class='add'>+	icu_data[4].reg_mask = mmp_icu_base + 0x170;</div><div class='add'>+	icu_data[4].nr_irqs = 5;</div><div class='add'>+	icu_data[4].virq_base = IRQ_MMP2_TWSI_BASE;</div><div class='add'>+	icu_data[4].domain = irq_domain_add_legacy(NULL, icu_data[4].nr_irqs,</div><div class='add'>+						   icu_data[4].virq_base, 0,</div><div class='add'>+						   &amp;irq_domain_simple_ops,</div><div class='add'>+						   &amp;icu_data[4]);</div><div class='add'>+	icu_data[5].reg_status = mmp_icu_base + 0x15c;</div><div class='add'>+	icu_data[5].reg_mask = mmp_icu_base + 0x174;</div><div class='add'>+	icu_data[5].nr_irqs = 15;</div><div class='add'>+	icu_data[5].virq_base = IRQ_MMP2_MISC_BASE;</div><div class='add'>+	icu_data[5].domain = irq_domain_add_legacy(NULL, icu_data[5].nr_irqs,</div><div class='add'>+						   icu_data[5].virq_base, 0,</div><div class='add'>+						   &amp;irq_domain_simple_ops,</div><div class='add'>+						   &amp;icu_data[5]);</div><div class='add'>+	icu_data[6].reg_status = mmp_icu_base + 0x160;</div><div class='add'>+	icu_data[6].reg_mask = mmp_icu_base + 0x178;</div><div class='add'>+	icu_data[6].nr_irqs = 2;</div><div class='add'>+	icu_data[6].virq_base = IRQ_MMP2_MIPI_HSI1_BASE;</div><div class='add'>+	icu_data[6].domain = irq_domain_add_legacy(NULL, icu_data[6].nr_irqs,</div><div class='add'>+						   icu_data[6].virq_base, 0,</div><div class='add'>+						   &amp;irq_domain_simple_ops,</div><div class='add'>+						   &amp;icu_data[6]);</div><div class='add'>+	icu_data[7].reg_status = mmp_icu_base + 0x188;</div><div class='add'>+	icu_data[7].reg_mask = mmp_icu_base + 0x184;</div><div class='add'>+	icu_data[7].nr_irqs = 2;</div><div class='add'>+	icu_data[7].virq_base = IRQ_MMP2_MIPI_HSI0_BASE;</div><div class='add'>+	icu_data[7].domain = irq_domain_add_legacy(NULL, icu_data[7].nr_irqs,</div><div class='add'>+						   icu_data[7].virq_base, 0,</div><div class='add'>+						   &amp;irq_domain_simple_ops,</div><div class='add'>+						   &amp;icu_data[7]);</div><div class='add'>+	for (irq = 0; irq &lt; IRQ_MMP2_MUX_END; irq++) {</div><div class='add'>+		icu_mask_irq(irq_get_irq_data(irq));</div><div class='add'>+		switch (irq) {</div><div class='add'>+		case IRQ_MMP2_PMIC_MUX:</div><div class='add'>+		case IRQ_MMP2_RTC_MUX:</div><div class='add'>+		case IRQ_MMP2_KEYPAD_MUX:</div><div class='add'>+		case IRQ_MMP2_TWSI_MUX:</div><div class='add'>+		case IRQ_MMP2_MISC_MUX:</div><div class='add'>+		case IRQ_MMP2_MIPI_HSI1_MUX:</div><div class='add'>+		case IRQ_MMP2_MIPI_HSI0_MUX:</div><div class='add'>+			irq_set_chip(irq, &amp;icu_irq_chip);</div><div class='add'>+			irq_set_chained_handler(irq, icu_mux_irq_demux);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			irq_set_chip_and_handler(irq, &amp;icu_irq_chip,</div><div class='add'>+						 handle_level_irq);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		set_irq_flags(irq, IRQF_VALID);</div><div class='add'>+	}</div><div class='add'>+	irq_set_default_host(icu_data[0].domain);</div><div class='add'>+#ifdef CONFIG_CPU_MMP2</div><div class='add'>+	icu_irq_chip.irq_set_wake = mmp2_set_wake;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static const struct of_device_id intc_ids[] __initconst = {</div><div class='add'>+	{ .compatible = "mrvl,mmp-intc", .data = &amp;mmp_conf },</div><div class='add'>+	{ .compatible = "mrvl,mmp2-intc", .data = &amp;mmp2_conf },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mmp_mux_irq_match[] __initconst = {</div><div class='add'>+	{ .compatible = "mrvl,mmp2-mux-intc" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __init mmp2_mux_init(struct device_node *parent)</div><div class='add'>+{</div><div class='add'>+	struct device_node *node;</div><div class='add'>+	const struct of_device_id *of_id;</div><div class='add'>+	struct resource res;</div><div class='add'>+	int i, irq_base, ret, irq;</div><div class='add'>+	u32 nr_irqs, mfp_irq;</div><div class='add'>+</div><div class='add'>+	node = parent;</div><div class='add'>+	max_icu_nr = 1;</div><div class='add'>+	for (i = 1; i &lt; MAX_ICU_NR; i++) {</div><div class='add'>+		node = of_find_matching_node(node, mmp_mux_irq_match);</div><div class='add'>+		if (!node)</div><div class='add'>+			break;</div><div class='add'>+		of_id = of_match_node(&amp;mmp_mux_irq_match[0], node);</div><div class='add'>+		ret = of_property_read_u32(node, "mrvl,intc-nr-irqs",</div><div class='add'>+					   &amp;nr_irqs);</div><div class='add'>+		if (ret) {</div><div class='add'>+			pr_err("Not found mrvl,intc-nr-irqs property\n");</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		ret = of_address_to_resource(node, 0, &amp;res);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			pr_err("Not found reg property\n");</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		icu_data[i].reg_status = mmp_icu_base + res.start;</div><div class='add'>+		ret = of_address_to_resource(node, 1, &amp;res);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			pr_err("Not found reg property\n");</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		icu_data[i].reg_mask = mmp_icu_base + res.start;</div><div class='add'>+		icu_data[i].cascade_irq = irq_of_parse_and_map(node, 0);</div><div class='add'>+		if (!icu_data[i].cascade_irq) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0);</div><div class='add'>+		if (irq_base &lt; 0) {</div><div class='add'>+			pr_err("Failed to allocate IRQ numbers for mux intc\n");</div><div class='add'>+			ret = irq_base;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		if (!of_property_read_u32(node, "mrvl,clr-mfp-irq",</div><div class='add'>+					  &amp;mfp_irq)) {</div><div class='add'>+			icu_data[i].clr_mfp_irq_base = irq_base;</div><div class='add'>+			icu_data[i].clr_mfp_hwirq = mfp_irq;</div><div class='add'>+		}</div><div class='add'>+		irq_set_chained_handler(icu_data[i].cascade_irq,</div><div class='add'>+					icu_mux_irq_demux);</div><div class='add'>+		icu_data[i].nr_irqs = nr_irqs;</div><div class='add'>+		icu_data[i].virq_base = irq_base;</div><div class='add'>+		icu_data[i].domain = irq_domain_add_legacy(node, nr_irqs,</div><div class='add'>+							   irq_base, 0,</div><div class='add'>+							   &amp;mmp_irq_domain_ops,</div><div class='add'>+							   &amp;icu_data[i]);</div><div class='add'>+		for (irq = irq_base; irq &lt; irq_base + nr_irqs; irq++)</div><div class='add'>+			icu_mask_irq(irq_get_irq_data(irq));</div><div class='add'>+	}</div><div class='add'>+	max_icu_nr = i;</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	of_node_put(node);</div><div class='add'>+	max_icu_nr = i;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init mmp_dt_irq_init(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *node;</div><div class='add'>+	const struct of_device_id *of_id;</div><div class='add'>+	struct mmp_intc_conf *conf;</div><div class='add'>+	int nr_irqs, irq_base, ret, irq;</div><div class='add'>+</div><div class='add'>+	node = of_find_matching_node(NULL, intc_ids);</div><div class='add'>+	if (!node) {</div><div class='add'>+		pr_err("Failed to find interrupt controller in arch-mmp\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	of_id = of_match_node(intc_ids, node);</div><div class='add'>+	conf = of_id-&gt;data;</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(node, "mrvl,intc-nr-irqs", &amp;nr_irqs);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("Not found mrvl,intc-nr-irqs property\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mmp_icu_base = of_iomap(node, 0);</div><div class='add'>+	if (!mmp_icu_base) {</div><div class='add'>+		pr_err("Failed to get interrupt controller register\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq_base = irq_alloc_descs(-1, 0, nr_irqs - NR_IRQS_LEGACY, 0);</div><div class='add'>+	if (irq_base &lt; 0) {</div><div class='add'>+		pr_err("Failed to allocate IRQ numbers\n");</div><div class='add'>+		goto err;</div><div class='add'>+	} else if (irq_base != NR_IRQS_LEGACY) {</div><div class='add'>+		pr_err("ICU's irqbase should be started from 0\n");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	icu_data[0].conf_enable = conf-&gt;conf_enable;</div><div class='add'>+	icu_data[0].conf_disable = conf-&gt;conf_disable;</div><div class='add'>+	icu_data[0].conf_mask = conf-&gt;conf_mask;</div><div class='add'>+	icu_data[0].nr_irqs = nr_irqs;</div><div class='add'>+	icu_data[0].virq_base = 0;</div><div class='add'>+	icu_data[0].domain = irq_domain_add_legacy(node, nr_irqs, 0, 0,</div><div class='add'>+						   &amp;mmp_irq_domain_ops,</div><div class='add'>+						   &amp;icu_data[0]);</div><div class='add'>+	irq_set_default_host(icu_data[0].domain);</div><div class='add'>+	for (irq = 0; irq &lt; nr_irqs; irq++)</div><div class='add'>+		icu_mask_irq(irq_get_irq_data(irq));</div><div class='add'>+	mmp2_mux_init(node);</div><div class='add'>+	return;</div><div class='add'>+err:</div><div class='add'>+	iounmap(mmp_icu_base);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-mmp/mmp-dt.c b/arch/arm/mach-mmp/mmp-dt.c<br/>index 67075395e400..033cc31b3c72 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/mmp-dt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/mmp-dt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/mmp-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/mmp-dt.c</a></div><div class='hunk'>@@ -14,14 +14,19 @@</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/mach/time.h&gt;</div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='del'>-extern struct sys_timer pxa168_timer;</div><div class='del'>-extern void __init icu_init_irq(void);</div><div class='add'>+extern void __init mmp_dt_irq_init(void);</div><div class='add'>+extern void __init mmp_dt_init_timer(void);</div><div class='ctx'> </div><div class='del'>-static const struct of_dev_auxdata mmp_auxdata_lookup[] __initconst = {</div><div class='add'>+static struct sys_timer mmp_dt_timer = {</div><div class='add'>+	.init	= mmp_dt_init_timer,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_dev_auxdata pxa168_auxdata_lookup[] __initconst = {</div><div class='ctx'> 	OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.0", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.1", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4026000, "pxa2xx-uart.2", NULL),</div><div class='hunk'>@@ -32,44 +37,47 @@ static const struct of_dev_auxdata mmp_auxdata_lookup[] __initconst = {</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init mmp_intc_add_irq_domain(struct device_node *np,</div><div class='del'>-					   struct device_node *parent)</div><div class='del'>-{</div><div class='del'>-	irq_domain_add_simple(np, 0);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init mmp_gpio_add_irq_domain(struct device_node *np,</div><div class='del'>-					   struct device_node *parent)</div><div class='del'>-{</div><div class='del'>-	irq_domain_add_simple(np, IRQ_GPIO_START);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct of_device_id mmp_irq_match[] __initconst = {</div><div class='del'>-	{ .compatible = "mrvl,mmp-intc", .data = mmp_intc_add_irq_domain, },</div><div class='del'>-	{ .compatible = "mrvl,mmp-gpio", .data = mmp_gpio_add_irq_domain, },</div><div class='add'>+static const struct of_dev_auxdata pxa910_auxdata_lookup[] __initconst = {</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.0", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.1", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4036000, "pxa2xx-uart.2", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4037000, "pxa2xx-i2c.1", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-gpio", 0xd4019000, "pxa-gpio", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL),</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void __init mmp_dt_init(void)</div><div class='add'>+static void __init pxa168_dt_init(void)</div><div class='ctx'> {</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='add'>+			     pxa168_auxdata_lookup, NULL);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	of_irq_init(mmp_irq_match);</div><div class='del'>-</div><div class='add'>+static void __init pxa910_dt_init(void)</div><div class='add'>+{</div><div class='ctx'> 	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='del'>-			     mmp_auxdata_lookup, NULL);</div><div class='add'>+			     pxa910_auxdata_lookup, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char *pxa168_dt_board_compat[] __initdata = {</div><div class='add'>+static const char *mmp_dt_board_compat[] __initdata = {</div><div class='ctx'> 	"mrvl,pxa168-aspenite",</div><div class='add'>+	"mrvl,pxa910-dkb",</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> DT_MACHINE_START(PXA168_DT, "Marvell PXA168 (Device Tree Support)")</div><div class='ctx'> 	.map_io		= mmp_map_io,</div><div class='del'>-	.init_irq	= icu_init_irq,</div><div class='del'>-	.timer		= &amp;pxa168_timer,</div><div class='del'>-	.init_machine	= mmp_dt_init,</div><div class='del'>-	.dt_compat	= pxa168_dt_board_compat,</div><div class='add'>+	.init_irq	= mmp_dt_irq_init,</div><div class='add'>+	.timer		= &amp;mmp_dt_timer,</div><div class='add'>+	.init_machine	= pxa168_dt_init,</div><div class='add'>+	.dt_compat	= mmp_dt_board_compat,</div><div class='add'>+MACHINE_END</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(PXA910_DT, "Marvell PXA910 (Device Tree Support)")</div><div class='add'>+	.map_io		= mmp_map_io,</div><div class='add'>+	.init_irq	= mmp_dt_irq_init,</div><div class='add'>+	.timer		= &amp;mmp_dt_timer,</div><div class='add'>+	.init_machine	= pxa910_dt_init,</div><div class='add'>+	.dt_compat	= mmp_dt_board_compat,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-mmp/mmp2-dt.c b/arch/arm/mach-mmp/mmp2-dt.c<br/>new file mode 100644<br/>index 000000000000..535a5ed5977b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/mmp2-dt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/mmp2-dt.c</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/arm/mach-mmp/mmp2-dt.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012 Marvell Technology Group Ltd.</div><div class='add'>+ *  Author: Haojian Zhuang &lt;haojian.zhuang@marvell.com&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *  it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ *  publishhed by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/mach/time.h&gt;</div><div class='add'>+#include &lt;mach/irqs.h&gt;</div><div class='add'>+#include &lt;mach/regs-apbc.h&gt;</div><div class='add'>+</div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='add'>+extern void __init mmp_dt_irq_init(void);</div><div class='add'>+extern void __init mmp_dt_init_timer(void);</div><div class='add'>+</div><div class='add'>+static struct sys_timer mmp_dt_timer = {</div><div class='add'>+	.init	= mmp_dt_init_timer,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_dev_auxdata mmp2_auxdata_lookup[] __initconst = {</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4030000, "pxa2xx-uart.0", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.1", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.2", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4016000, "pxa2xx-uart.3", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4025000, "pxa2xx-i2c.1", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-gpio", 0xd4019000, "pxa-gpio", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL),</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init mmp2_dt_init(void)</div><div class='add'>+{</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='add'>+			     mmp2_auxdata_lookup, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *mmp2_dt_board_compat[] __initdata = {</div><div class='add'>+	"mrvl,mmp2-brownstone",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(MMP2_DT, "Marvell MMP2 (Device Tree Support)")</div><div class='add'>+	.map_io		= mmp_map_io,</div><div class='add'>+	.init_irq	= mmp_dt_irq_init,</div><div class='add'>+	.timer		= &amp;mmp_dt_timer,</div><div class='add'>+	.init_machine	= mmp2_dt_init,</div><div class='add'>+	.dt_compat	= mmp2_dt_board_compat,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-mmp/pm-mmp2.c b/arch/arm/mach-mmp/pm-mmp2.c<br/>new file mode 100644<br/>index 000000000000..461a191a32d2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/pm-mmp2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/pm-mmp2.c</a></div><div class='hunk'>@@ -0,0 +1,264 @@</div><div class='add'>+/*</div><div class='add'>+ * MMP2 Power Management Routines</div><div class='add'>+ *</div><div class='add'>+ * This software program is licensed subject to the GNU General Public License</div><div class='add'>+ * (GPL).Version 2,June 1991, available at http://www.fsf.org/copyleft/gpl.html</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright 2012 Marvell International Ltd.</div><div class='add'>+ * All Rights Reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/time.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/suspend.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;asm/mach-types.h&gt;</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/cputype.h&gt;</div><div class='add'>+#include &lt;mach/addr-map.h&gt;</div><div class='add'>+#include &lt;mach/pm-mmp2.h&gt;</div><div class='add'>+#include &lt;mach/regs-icu.h&gt;</div><div class='add'>+#include &lt;mach/irqs.h&gt;</div><div class='add'>+</div><div class='add'>+int mmp2_set_wake(struct irq_data *d, unsigned int on)</div><div class='add'>+{</div><div class='add'>+	int irq = d-&gt;irq;</div><div class='add'>+	struct irq_desc *desc = irq_to_desc(irq);</div><div class='add'>+	unsigned long data = 0;</div><div class='add'>+</div><div class='add'>+	if (unlikely(irq &gt;= nr_irqs)) {</div><div class='add'>+		pr_err("IRQ nubmers are out of boundary!\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (on) {</div><div class='add'>+		if (desc-&gt;action)</div><div class='add'>+			desc-&gt;action-&gt;flags |= IRQF_NO_SUSPEND;</div><div class='add'>+	} else {</div><div class='add'>+		if (desc-&gt;action)</div><div class='add'>+			desc-&gt;action-&gt;flags &amp;= ~IRQF_NO_SUSPEND;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* enable wakeup sources */</div><div class='add'>+	switch (irq) {</div><div class='add'>+	case IRQ_MMP2_RTC:</div><div class='add'>+	case IRQ_MMP2_RTC_ALARM:</div><div class='add'>+		data = MPMU_WUCRM_PJ_WAKEUP(4) | MPMU_WUCRM_PJ_RTC_ALARM;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_MMP2_PMIC:</div><div class='add'>+		data = MPMU_WUCRM_PJ_WAKEUP(7);</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_MMP2_MMC2:</div><div class='add'>+		/* mmc use WAKEUP2, same as GPIO wakeup source */</div><div class='add'>+		data = MPMU_WUCRM_PJ_WAKEUP(2);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (on) {</div><div class='add'>+		if (data) {</div><div class='add'>+			data |= __raw_readl(MPMU_WUCRM_PJ);</div><div class='add'>+			__raw_writel(data, MPMU_WUCRM_PJ);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (data) {</div><div class='add'>+			data = ~data &amp; __raw_readl(MPMU_WUCRM_PJ);</div><div class='add'>+			__raw_writel(data, MPMU_WUCRM_PJ);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pm_scu_clk_disable(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	/* close AXI fabric clock gate */</div><div class='add'>+	__raw_writel(0x0, CIU_REG(0x64));</div><div class='add'>+	__raw_writel(0x0, CIU_REG(0x68));</div><div class='add'>+</div><div class='add'>+	/* close MCB master clock gate */</div><div class='add'>+	val = __raw_readl(CIU_REG(0x1c));</div><div class='add'>+	val |= 0xf0;</div><div class='add'>+	__raw_writel(val, CIU_REG(0x1c));</div><div class='add'>+</div><div class='add'>+	return ;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pm_scu_clk_enable(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	/* open AXI fabric clock gate */</div><div class='add'>+	__raw_writel(0x03003003, CIU_REG(0x64));</div><div class='add'>+	__raw_writel(0x00303030, CIU_REG(0x68));</div><div class='add'>+</div><div class='add'>+	/* open MCB master clock gate */</div><div class='add'>+	val = __raw_readl(CIU_REG(0x1c));</div><div class='add'>+	val &amp;= ~(0xf0);</div><div class='add'>+	__raw_writel(val, CIU_REG(0x1c));</div><div class='add'>+</div><div class='add'>+	return ;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pm_mpmu_clk_disable(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * disable clocks in MPMU_CGR_PJ register</div><div class='add'>+	 * except clock for APMU_PLL1, APMU_PLL1_2 and AP_26M</div><div class='add'>+	 */</div><div class='add'>+	__raw_writel(0x0000a010, MPMU_CGR_PJ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pm_mpmu_clk_enable(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	__raw_writel(0xdffefffe, MPMU_CGR_PJ);</div><div class='add'>+	val = __raw_readl(MPMU_PLL2_CTRL1);</div><div class='add'>+	val |= (1 &lt;&lt; 29);</div><div class='add'>+	__raw_writel(val, MPMU_PLL2_CTRL1);</div><div class='add'>+</div><div class='add'>+	return ;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mmp2_pm_enter_lowpower_mode(int state)</div><div class='add'>+{</div><div class='add'>+	uint32_t idle_cfg, apcr;</div><div class='add'>+</div><div class='add'>+	idle_cfg = __raw_readl(APMU_PJ_IDLE_CFG);</div><div class='add'>+	apcr = __raw_readl(MPMU_PCR_PJ);</div><div class='add'>+	apcr &amp;= ~(MPMU_PCR_PJ_SLPEN | MPMU_PCR_PJ_DDRCORSD | MPMU_PCR_PJ_APBSD</div><div class='add'>+		 | MPMU_PCR_PJ_AXISD | MPMU_PCR_PJ_VCTCXOSD | (1 &lt;&lt; 13));</div><div class='add'>+	idle_cfg &amp;= ~APMU_PJ_IDLE_CFG_PJ_IDLE;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case POWER_MODE_SYS_SLEEP:</div><div class='add'>+		apcr |= MPMU_PCR_PJ_SLPEN;		/* set the SLPEN bit */</div><div class='add'>+		apcr |= MPMU_PCR_PJ_VCTCXOSD;		/* set VCTCXOSD */</div><div class='add'>+		/* fall through */</div><div class='add'>+	case POWER_MODE_CHIP_SLEEP:</div><div class='add'>+		apcr |= MPMU_PCR_PJ_SLPEN;</div><div class='add'>+		/* fall through */</div><div class='add'>+	case POWER_MODE_APPS_SLEEP:</div><div class='add'>+		apcr |= MPMU_PCR_PJ_APBSD;		/* set APBSD */</div><div class='add'>+		/* fall through */</div><div class='add'>+	case POWER_MODE_APPS_IDLE:</div><div class='add'>+		apcr |= MPMU_PCR_PJ_AXISD;		/* set AXISDD bit */</div><div class='add'>+		apcr |= MPMU_PCR_PJ_DDRCORSD;		/* set DDRCORSD bit */</div><div class='add'>+		idle_cfg |= APMU_PJ_IDLE_CFG_PJ_PWRDWN;	/* PJ power down */</div><div class='add'>+		apcr |= MPMU_PCR_PJ_SPSD;</div><div class='add'>+		/* fall through */</div><div class='add'>+	case POWER_MODE_CORE_EXTIDLE:</div><div class='add'>+		idle_cfg |= APMU_PJ_IDLE_CFG_PJ_IDLE;	/* set the IDLE bit */</div><div class='add'>+		idle_cfg &amp;= ~APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK;</div><div class='add'>+		idle_cfg |= APMU_PJ_IDLE_CFG_PWR_SW(3)</div><div class='add'>+			| APMU_PJ_IDLE_CFG_L2_PWR_SW;</div><div class='add'>+		break;</div><div class='add'>+	case POWER_MODE_CORE_INTIDLE:</div><div class='add'>+		apcr &amp;= ~MPMU_PCR_PJ_SPSD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* set reserve bits */</div><div class='add'>+	apcr |= (1 &lt;&lt; 30) | (1 &lt;&lt; 25);</div><div class='add'>+</div><div class='add'>+	/* finally write the registers back */</div><div class='add'>+	__raw_writel(idle_cfg, APMU_PJ_IDLE_CFG);</div><div class='add'>+	__raw_writel(apcr, MPMU_PCR_PJ);	/* 0xfe086000 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mmp2_pm_enter(suspend_state_t state)</div><div class='add'>+{</div><div class='add'>+	int temp;</div><div class='add'>+</div><div class='add'>+	temp = __raw_readl(MMP2_ICU_INT4_MASK);</div><div class='add'>+	if (temp &amp; (1 &lt;&lt; 1)) {</div><div class='add'>+		printk(KERN_ERR "%s: PMIC interrupt is handling\n", __func__);</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	temp = __raw_readl(APMU_SRAM_PWR_DWN);</div><div class='add'>+	temp |= ((1 &lt;&lt; 19) | (1 &lt;&lt; 18));</div><div class='add'>+	__raw_writel(temp, APMU_SRAM_PWR_DWN);</div><div class='add'>+	pm_mpmu_clk_disable();</div><div class='add'>+	pm_scu_clk_disable();</div><div class='add'>+</div><div class='add'>+	printk(KERN_INFO "%s: before suspend\n", __func__);</div><div class='add'>+	cpu_do_idle();</div><div class='add'>+	printk(KERN_INFO "%s: after suspend\n", __func__);</div><div class='add'>+</div><div class='add'>+	pm_mpmu_clk_enable();		/* enable clocks in MPMU */</div><div class='add'>+	pm_scu_clk_enable();		/* enable clocks in SCU */</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called after processes are frozen, but before we shut down devices.</div><div class='add'>+ */</div><div class='add'>+static int mmp2_pm_prepare(void)</div><div class='add'>+{</div><div class='add'>+	mmp2_pm_enter_lowpower_mode(POWER_MODE_SYS_SLEEP);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called after devices are re-setup, but before processes are thawed.</div><div class='add'>+ */</div><div class='add'>+static void mmp2_pm_finish(void)</div><div class='add'>+{</div><div class='add'>+	mmp2_pm_enter_lowpower_mode(POWER_MODE_CORE_INTIDLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mmp2_pm_valid(suspend_state_t state)</div><div class='add'>+{</div><div class='add'>+	return ((state == PM_SUSPEND_STANDBY) || (state == PM_SUSPEND_MEM));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.</div><div class='add'>+ */</div><div class='add'>+static const struct platform_suspend_ops mmp2_pm_ops = {</div><div class='add'>+	.valid		= mmp2_pm_valid,</div><div class='add'>+	.prepare	= mmp2_pm_prepare,</div><div class='add'>+	.enter		= mmp2_pm_enter,</div><div class='add'>+	.finish		= mmp2_pm_finish,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init mmp2_pm_init(void)</div><div class='add'>+{</div><div class='add'>+	uint32_t apcr;</div><div class='add'>+</div><div class='add'>+	if (!cpu_is_mmp2())</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	suspend_set_ops(&amp;mmp2_pm_ops);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set bit 0, Slow clock Select 32K clock input instead of VCXO</div><div class='add'>+	 * VCXO is chosen by default, which would be disabled in suspend</div><div class='add'>+	 */</div><div class='add'>+	__raw_writel(0x5, MPMU_SCCR);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Clear bit 23 of CIU_CPU_CONF</div><div class='add'>+	 * direct PJ4 to DDR access through Memory Controller slow queue</div><div class='add'>+	 * fast queue has issue and cause lcd will flick</div><div class='add'>+	 */</div><div class='add'>+	__raw_writel(__raw_readl(CIU_REG(0x8)) &amp; ~(0x1 &lt;&lt; 23), CIU_REG(0x8));</div><div class='add'>+</div><div class='add'>+	/* Clear default low power control bit */</div><div class='add'>+	apcr = __raw_readl(MPMU_PCR_PJ);</div><div class='add'>+	apcr &amp;= ~(MPMU_PCR_PJ_SLPEN | MPMU_PCR_PJ_DDRCORSD</div><div class='add'>+			| MPMU_PCR_PJ_APBSD | MPMU_PCR_PJ_AXISD | 1 &lt;&lt; 13);</div><div class='add'>+	__raw_writel(apcr, MPMU_PCR_PJ);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+late_initcall(mmp2_pm_init);</div><div class='head'>diff --git a/arch/arm/mach-mmp/pm-pxa910.c b/arch/arm/mach-mmp/pm-pxa910.c<br/>new file mode 100644<br/>index 000000000000..48981ca801a5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/pm-pxa910.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/pm-pxa910.c</a></div><div class='hunk'>@@ -0,0 +1,285 @@</div><div class='add'>+/*</div><div class='add'>+ * PXA910 Power Management Routines</div><div class='add'>+ *</div><div class='add'>+ * This software program is licensed subject to the GNU General Public License</div><div class='add'>+ * (GPL).Version 2,June 1991, available at http://www.fsf.org/copyleft/gpl.html</div><div class='add'>+ *</div><div class='add'>+ * (C) Copyright 2009 Marvell International Ltd.</div><div class='add'>+ * All Rights Reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/time.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/suspend.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;asm/mach-types.h&gt;</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/cputype.h&gt;</div><div class='add'>+#include &lt;mach/addr-map.h&gt;</div><div class='add'>+#include &lt;mach/pm-pxa910.h&gt;</div><div class='add'>+#include &lt;mach/regs-icu.h&gt;</div><div class='add'>+#include &lt;mach/irqs.h&gt;</div><div class='add'>+</div><div class='add'>+int pxa910_set_wake(struct irq_data *data, unsigned int on)</div><div class='add'>+{</div><div class='add'>+	int irq = data-&gt;irq;</div><div class='add'>+	struct irq_desc *desc = irq_to_desc(data-&gt;irq);</div><div class='add'>+	uint32_t awucrm = 0, apcr = 0;</div><div class='add'>+</div><div class='add'>+	if (unlikely(irq &gt;= nr_irqs)) {</div><div class='add'>+		pr_err("IRQ nubmers are out of boundary!\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (on) {</div><div class='add'>+		if (desc-&gt;action)</div><div class='add'>+			desc-&gt;action-&gt;flags |= IRQF_NO_SUSPEND;</div><div class='add'>+	} else {</div><div class='add'>+		if (desc-&gt;action)</div><div class='add'>+			desc-&gt;action-&gt;flags &amp;= ~IRQF_NO_SUSPEND;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* setting wakeup sources */</div><div class='add'>+	switch (irq) {</div><div class='add'>+	/* wakeup line 2 */</div><div class='add'>+	case IRQ_PXA910_AP_GPIO:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(2);</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP2;</div><div class='add'>+		break;</div><div class='add'>+	/* wakeup line 3 */</div><div class='add'>+	case IRQ_PXA910_KEYPAD:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(3) | MPMU_AWUCRM_KEYPRESS;</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP3;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_PXA910_ROTARY:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(3) | MPMU_AWUCRM_NEWROTARY;</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP3;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_PXA910_TRACKBALL:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(3) | MPMU_AWUCRM_TRACKBALL;</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP3;</div><div class='add'>+		break;</div><div class='add'>+	/* wakeup line 4 */</div><div class='add'>+	case IRQ_PXA910_AP1_TIMER1:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP1_TIMER_1;</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP4;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_PXA910_AP1_TIMER2:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP1_TIMER_2;</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP4;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_PXA910_AP1_TIMER3:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP1_TIMER_3;</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP4;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_PXA910_AP2_TIMER1:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP2_TIMER_1;</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP4;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_PXA910_AP2_TIMER2:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP2_TIMER_2;</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP4;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_PXA910_AP2_TIMER3:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_AP2_TIMER_3;</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP4;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_PXA910_RTC_ALARM:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(4) | MPMU_AWUCRM_RTC_ALARM;</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP4;</div><div class='add'>+		break;</div><div class='add'>+	/* wakeup line 5 */</div><div class='add'>+	case IRQ_PXA910_USB1:</div><div class='add'>+	case IRQ_PXA910_USB2:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(5);</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP5;</div><div class='add'>+		break;</div><div class='add'>+	/* wakeup line 6 */</div><div class='add'>+	case IRQ_PXA910_MMC:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(6)</div><div class='add'>+			| MPMU_AWUCRM_SDH1</div><div class='add'>+			| MPMU_AWUCRM_SDH2;</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP6;</div><div class='add'>+		break;</div><div class='add'>+	/* wakeup line 7 */</div><div class='add'>+	case IRQ_PXA910_PMIC_INT:</div><div class='add'>+		awucrm = MPMU_AWUCRM_WAKEUP(7);</div><div class='add'>+		apcr |= MPMU_APCR_SLPWP7;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		if (irq &gt;= IRQ_GPIO_START &amp;&amp; irq &lt; IRQ_BOARD_START) {</div><div class='add'>+			awucrm = MPMU_AWUCRM_WAKEUP(2);</div><div class='add'>+			apcr |= MPMU_APCR_SLPWP2;</div><div class='add'>+		} else</div><div class='add'>+			printk(KERN_ERR "Error: no defined wake up source irq: %d\n",</div><div class='add'>+				irq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (on) {</div><div class='add'>+		if (awucrm) {</div><div class='add'>+			awucrm |= __raw_readl(MPMU_AWUCRM);</div><div class='add'>+			__raw_writel(awucrm, MPMU_AWUCRM);</div><div class='add'>+		}</div><div class='add'>+		if (apcr) {</div><div class='add'>+			apcr = ~apcr &amp; __raw_readl(MPMU_APCR);</div><div class='add'>+			__raw_writel(apcr, MPMU_APCR);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (awucrm) {</div><div class='add'>+			awucrm = ~awucrm &amp; __raw_readl(MPMU_AWUCRM);</div><div class='add'>+			__raw_writel(awucrm, MPMU_AWUCRM);</div><div class='add'>+		}</div><div class='add'>+		if (apcr) {</div><div class='add'>+			apcr |= __raw_readl(MPMU_APCR);</div><div class='add'>+			__raw_writel(apcr, MPMU_APCR);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pxa910_pm_enter_lowpower_mode(int state)</div><div class='add'>+{</div><div class='add'>+	uint32_t idle_cfg, apcr;</div><div class='add'>+</div><div class='add'>+	idle_cfg = __raw_readl(APMU_MOH_IDLE_CFG);</div><div class='add'>+	apcr = __raw_readl(MPMU_APCR);</div><div class='add'>+</div><div class='add'>+	apcr &amp;= ~(MPMU_APCR_DDRCORSD | MPMU_APCR_APBSD | MPMU_APCR_AXISD</div><div class='add'>+		| MPMU_APCR_VCTCXOSD | MPMU_APCR_STBYEN);</div><div class='add'>+	idle_cfg &amp;= ~(APMU_MOH_IDLE_CFG_MOH_IDLE</div><div class='add'>+		| APMU_MOH_IDLE_CFG_MOH_PWRDWN);</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case POWER_MODE_UDR:</div><div class='add'>+		/* only shutdown APB in UDR */</div><div class='add'>+		apcr |= MPMU_APCR_STBYEN | MPMU_APCR_APBSD;</div><div class='add'>+		/* fall through */</div><div class='add'>+	case POWER_MODE_SYS_SLEEP:</div><div class='add'>+		apcr |= MPMU_APCR_SLPEN;		/* set the SLPEN bit */</div><div class='add'>+		apcr |= MPMU_APCR_VCTCXOSD;		/* set VCTCXOSD */</div><div class='add'>+		/* fall through */</div><div class='add'>+	case POWER_MODE_APPS_SLEEP:</div><div class='add'>+		apcr |= MPMU_APCR_DDRCORSD;		/* set DDRCORSD */</div><div class='add'>+		/* fall through */</div><div class='add'>+	case POWER_MODE_APPS_IDLE:</div><div class='add'>+		apcr |= MPMU_APCR_AXISD;		/* set AXISDD bit */</div><div class='add'>+		/* fall through */</div><div class='add'>+	case POWER_MODE_CORE_EXTIDLE:</div><div class='add'>+		idle_cfg |= APMU_MOH_IDLE_CFG_MOH_IDLE;</div><div class='add'>+		idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN;</div><div class='add'>+		idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWR_SW(3)</div><div class='add'>+			| APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(3);</div><div class='add'>+		/* fall through */</div><div class='add'>+	case POWER_MODE_CORE_INTIDLE:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* program the memory controller hardware sleep type and auto wakeup */</div><div class='add'>+	idle_cfg |= APMU_MOH_IDLE_CFG_MOH_DIS_MC_SW_REQ;</div><div class='add'>+	idle_cfg |= APMU_MOH_IDLE_CFG_MOH_MC_WAKE_EN;</div><div class='add'>+	__raw_writel(0x0, APMU_MC_HW_SLP_TYPE);		/* auto refresh */</div><div class='add'>+</div><div class='add'>+	/* set DSPSD, DTCMSD, BBSD, MSASLPEN */</div><div class='add'>+	apcr |= MPMU_APCR_DSPSD | MPMU_APCR_DTCMSD | MPMU_APCR_BBSD</div><div class='add'>+		| MPMU_APCR_MSASLPEN;</div><div class='add'>+</div><div class='add'>+	/*always set SLEPEN bit mainly for MSA*/</div><div class='add'>+	apcr |= MPMU_APCR_SLPEN;</div><div class='add'>+</div><div class='add'>+	/* finally write the registers back */</div><div class='add'>+	__raw_writel(idle_cfg, APMU_MOH_IDLE_CFG);</div><div class='add'>+	__raw_writel(apcr, MPMU_APCR);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pxa910_pm_enter(suspend_state_t state)</div><div class='add'>+{</div><div class='add'>+	unsigned int idle_cfg, reg = 0;</div><div class='add'>+</div><div class='add'>+	/*pmic thread not completed,exit;otherwise system can't be waked up*/</div><div class='add'>+	reg = __raw_readl(ICU_INT_CONF(IRQ_PXA910_PMIC_INT));</div><div class='add'>+	if ((reg &amp; 0x3) == 0)</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	idle_cfg = __raw_readl(APMU_MOH_IDLE_CFG);</div><div class='add'>+	idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN</div><div class='add'>+		| APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN;</div><div class='add'>+	__raw_writel(idle_cfg, APMU_MOH_IDLE_CFG);</div><div class='add'>+</div><div class='add'>+	/* disable L2 */</div><div class='add'>+	outer_disable();</div><div class='add'>+	/* wait for l2 idle */</div><div class='add'>+	while (!(readl(CIU_REG(0x8)) &amp; (1 &lt;&lt; 16)))</div><div class='add'>+		udelay(1);</div><div class='add'>+</div><div class='add'>+	cpu_do_idle();</div><div class='add'>+</div><div class='add'>+	/* enable L2 */</div><div class='add'>+	outer_resume();</div><div class='add'>+	/* wait for l2 idle */</div><div class='add'>+	while (!(readl(CIU_REG(0x8)) &amp; (1 &lt;&lt; 16)))</div><div class='add'>+		udelay(1);</div><div class='add'>+</div><div class='add'>+	idle_cfg = __raw_readl(APMU_MOH_IDLE_CFG);</div><div class='add'>+	idle_cfg &amp;= ~(APMU_MOH_IDLE_CFG_MOH_PWRDWN</div><div class='add'>+		| APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN);</div><div class='add'>+	__raw_writel(idle_cfg, APMU_MOH_IDLE_CFG);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called after processes are frozen, but before we shut down devices.</div><div class='add'>+ */</div><div class='add'>+static int pxa910_pm_prepare(void)</div><div class='add'>+{</div><div class='add'>+	pxa910_pm_enter_lowpower_mode(POWER_MODE_UDR);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called after devices are re-setup, but before processes are thawed.</div><div class='add'>+ */</div><div class='add'>+static void pxa910_pm_finish(void)</div><div class='add'>+{</div><div class='add'>+	pxa910_pm_enter_lowpower_mode(POWER_MODE_CORE_INTIDLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pxa910_pm_valid(suspend_state_t state)</div><div class='add'>+{</div><div class='add'>+	return ((state == PM_SUSPEND_STANDBY) || (state == PM_SUSPEND_MEM));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct platform_suspend_ops pxa910_pm_ops = {</div><div class='add'>+	.valid		= pxa910_pm_valid,</div><div class='add'>+	.prepare	= pxa910_pm_prepare,</div><div class='add'>+	.enter		= pxa910_pm_enter,</div><div class='add'>+	.finish		= pxa910_pm_finish,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init pxa910_pm_init(void)</div><div class='add'>+{</div><div class='add'>+	uint32_t awucrm = 0;</div><div class='add'>+</div><div class='add'>+	if (!cpu_is_pxa910())</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	suspend_set_ops(&amp;pxa910_pm_ops);</div><div class='add'>+</div><div class='add'>+	/* Set the following bits for MMP3 playback with VCTXO on */</div><div class='add'>+	__raw_writel(__raw_readl(APMU_SQU_CLK_GATE_CTRL) | (1 &lt;&lt; 30),</div><div class='add'>+		APMU_SQU_CLK_GATE_CTRL);</div><div class='add'>+	__raw_writel(__raw_readl(MPMU_FCCR) | (1 &lt;&lt; 28), MPMU_FCCR);</div><div class='add'>+</div><div class='add'>+	awucrm |= MPMU_AWUCRM_AP_ASYNC_INT | MPMU_AWUCRM_AP_FULL_IDLE;</div><div class='add'>+	__raw_writel(awucrm, MPMU_AWUCRM);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+late_initcall(pxa910_pm_init);</div><div class='head'>diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c<br/>index b24d2c32cba9..62d787c34475 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/pxa168.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/pxa168.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/pxa168.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/pxa168.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/mv_usb.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach/time.h&gt;</div><div class='ctx'> #include &lt;asm/system_misc.h&gt;</div><div class='hunk'>@@ -27,6 +28,7 @@</div><div class='ctx'> #include &lt;mach/mfp.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;mach/pxa168.h&gt;</div><div class='add'>+#include &lt;mach/regs-usb.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include "clock.h"</div><div class='hunk'>@@ -93,7 +95,7 @@ static struct clk_lookup pxa168_clkregs[] = {</div><div class='ctx'> 	INIT_CLKREG(&amp;clk_gpio, "pxa-gpio", NULL),</div><div class='ctx'> 	INIT_CLKREG(&amp;clk_keypad, "pxa27x-keypad", NULL),</div><div class='ctx'> 	INIT_CLKREG(&amp;clk_eth, "pxa168-eth", "MFUCLK"),</div><div class='del'>-	INIT_CLKREG(&amp;clk_usb, "pxa168-ehci", "PXA168-USBCLK"),</div><div class='add'>+	INIT_CLKREG(&amp;clk_usb, NULL, "PXA168-USBCLK"),</div><div class='ctx'> 	INIT_CLKREG(&amp;clk_rtc, "sa1100-rtc", NULL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -184,17 +186,17 @@ struct platform_device pxa168_device_gpio = {</div><div class='ctx'> struct resource pxa168_usb_host_resources[] = {</div><div class='ctx'> 	/* USB Host conroller register base */</div><div class='ctx'> 	[0] = {</div><div class='del'>-		.start	= 0xd4209000,</div><div class='del'>-		.end	= 0xd4209000 + 0x200,</div><div class='add'>+		.start	= PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET,</div><div class='add'>+		.end	= PXA168_U2H_REGBASE + USB_REG_RANGE,</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='del'>-		.name	= "pxa168-usb-host",</div><div class='add'>+		.name	= "capregs",</div><div class='ctx'> 	},</div><div class='ctx'> 	/* USB PHY register base */</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 0xd4206000,</div><div class='del'>-		.end	= 0xd4206000 + 0xff,</div><div class='add'>+		.start	= PXA168_U2H_PHYBASE,</div><div class='add'>+		.end	= PXA168_U2H_PHYBASE + USB_PHY_RANGE,</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='del'>-		.name	= "pxa168-usb-phy",</div><div class='add'>+		.name	= "phyregs",</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='ctx'> 		.start	= IRQ_PXA168_USB2,</div><div class='hunk'>@@ -205,7 +207,7 @@ struct resource pxa168_usb_host_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);</div><div class='ctx'> struct platform_device pxa168_device_usb_host = {</div><div class='del'>-	.name = "pxa168-ehci",</div><div class='add'>+	.name = "pxa-sph",</div><div class='ctx'> 	.id   = -1,</div><div class='ctx'> 	.dev  = {</div><div class='ctx'> 		.dma_mask = &amp;pxa168_usb_host_dmamask,</div><div class='hunk'>@@ -216,7 +218,7 @@ struct platform_device pxa168_device_usb_host = {</div><div class='ctx'> 	.resource      = pxa168_usb_host_resources,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata)</div><div class='add'>+int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	pxa168_device_usb_host.dev.platform_data = pdata;</div><div class='ctx'> 	return platform_device_register(&amp;pxa168_device_usb_host);</div><div class='head'>diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c<br/>index 43f8bcc29b67..6da52e9f2bdc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/pxa910.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/pxa910.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/pxa910.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/pxa910.c</a></div><div class='hunk'>@@ -109,7 +109,7 @@ static struct clk_lookup pxa910_clkregs[] = {</div><div class='ctx'> 	INIT_CLKREG(&amp;clk_pwm4, "pxa910-pwm.3", NULL),</div><div class='ctx'> 	INIT_CLKREG(&amp;clk_nand, "pxa3xx-nand", NULL),</div><div class='ctx'> 	INIT_CLKREG(&amp;clk_gpio, "pxa-gpio", NULL),</div><div class='del'>-	INIT_CLKREG(&amp;clk_u2o, "pxa-u2o", "U2OCLK"),</div><div class='add'>+	INIT_CLKREG(&amp;clk_u2o, NULL, "U2OCLK"),</div><div class='ctx'> 	INIT_CLKREG(&amp;clk_rtc, "sa1100-rtc", NULL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c<br/>index 71fc4ee4602c..936447c70977 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/time.c</a></div><div class='hunk'>@@ -25,6 +25,9 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/sched_clock.h&gt;</div><div class='ctx'> #include &lt;mach/addr-map.h&gt;</div><div class='hunk'>@@ -41,6 +44,8 @@</div><div class='ctx'> #define MAX_DELTA		(0xfffffffe)</div><div class='ctx'> #define MIN_DELTA		(16)</div><div class='ctx'> </div><div class='add'>+static void __iomem *mmp_timer_base = TIMERS_VIRT_BASE;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * FIXME: the timer needs some delay to stablize the counter capture</div><div class='ctx'>  */</div><div class='hunk'>@@ -48,12 +53,12 @@ static inline uint32_t timer_read(void)</div><div class='ctx'> {</div><div class='ctx'> 	int delay = 100;</div><div class='ctx'> </div><div class='del'>-	__raw_writel(1, TIMERS_VIRT_BASE + TMR_CVWR(1));</div><div class='add'>+	__raw_writel(1, mmp_timer_base + TMR_CVWR(1));</div><div class='ctx'> </div><div class='ctx'> 	while (delay--)</div><div class='ctx'> 		cpu_relax();</div><div class='ctx'> </div><div class='del'>-	return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1));</div><div class='add'>+	return __raw_readl(mmp_timer_base + TMR_CVWR(1));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 notrace mmp_read_sched_clock(void)</div><div class='hunk'>@@ -68,12 +73,12 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Clear pending interrupt status.</div><div class='ctx'> 	 */</div><div class='del'>-	__raw_writel(0x01, TIMERS_VIRT_BASE + TMR_ICR(0));</div><div class='add'>+	__raw_writel(0x01, mmp_timer_base + TMR_ICR(0));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Disable timer 0.</div><div class='ctx'> 	 */</div><div class='del'>-	__raw_writel(0x02, TIMERS_VIRT_BASE + TMR_CER);</div><div class='add'>+	__raw_writel(0x02, mmp_timer_base + TMR_CER);</div><div class='ctx'> </div><div class='ctx'> 	c-&gt;event_handler(c);</div><div class='ctx'> </div><div class='hunk'>@@ -90,23 +95,23 @@ static int timer_set_next_event(unsigned long delta,</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Disable timer 0.</div><div class='ctx'> 	 */</div><div class='del'>-	__raw_writel(0x02, TIMERS_VIRT_BASE + TMR_CER);</div><div class='add'>+	__raw_writel(0x02, mmp_timer_base + TMR_CER);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Clear and enable timer match 0 interrupt.</div><div class='ctx'> 	 */</div><div class='del'>-	__raw_writel(0x01, TIMERS_VIRT_BASE + TMR_ICR(0));</div><div class='del'>-	__raw_writel(0x01, TIMERS_VIRT_BASE + TMR_IER(0));</div><div class='add'>+	__raw_writel(0x01, mmp_timer_base + TMR_ICR(0));</div><div class='add'>+	__raw_writel(0x01, mmp_timer_base + TMR_IER(0));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Setup new clockevent timer value.</div><div class='ctx'> 	 */</div><div class='del'>-	__raw_writel(delta - 1, TIMERS_VIRT_BASE + TMR_TN_MM(0, 0));</div><div class='add'>+	__raw_writel(delta - 1, mmp_timer_base + TMR_TN_MM(0, 0));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Enable timer 0.</div><div class='ctx'> 	 */</div><div class='del'>-	__raw_writel(0x03, TIMERS_VIRT_BASE + TMR_CER);</div><div class='add'>+	__raw_writel(0x03, mmp_timer_base + TMR_CER);</div><div class='ctx'> </div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> </div><div class='hunk'>@@ -124,7 +129,7 @@ static void timer_set_mode(enum clock_event_mode mode,</div><div class='ctx'> 	case CLOCK_EVT_MODE_UNUSED:</div><div class='ctx'> 	case CLOCK_EVT_MODE_SHUTDOWN:</div><div class='ctx'> 		/* disable the matching interrupt */</div><div class='del'>-		__raw_writel(0x00, TIMERS_VIRT_BASE + TMR_IER(0));</div><div class='add'>+		__raw_writel(0x00, mmp_timer_base + TMR_IER(0));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CLOCK_EVT_MODE_RESUME:</div><div class='ctx'> 	case CLOCK_EVT_MODE_PERIODIC:</div><div class='hunk'>@@ -157,27 +162,27 @@ static struct clocksource cksrc = {</div><div class='ctx'> </div><div class='ctx'> static void __init timer_config(void)</div><div class='ctx'> {</div><div class='del'>-	uint32_t ccr = __raw_readl(TIMERS_VIRT_BASE + TMR_CCR);</div><div class='add'>+	uint32_t ccr = __raw_readl(mmp_timer_base + TMR_CCR);</div><div class='ctx'> </div><div class='del'>-	__raw_writel(0x0, TIMERS_VIRT_BASE + TMR_CER); /* disable */</div><div class='add'>+	__raw_writel(0x0, mmp_timer_base + TMR_CER); /* disable */</div><div class='ctx'> </div><div class='ctx'> 	ccr &amp;= (cpu_is_mmp2()) ? (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) :</div><div class='ctx'> 		(TMR_CCR_CS_0(3) | TMR_CCR_CS_1(3));</div><div class='del'>-	__raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR);</div><div class='add'>+	__raw_writel(ccr, mmp_timer_base + TMR_CCR);</div><div class='ctx'> </div><div class='ctx'> 	/* set timer 0 to periodic mode, and timer 1 to free-running mode */</div><div class='del'>-	__raw_writel(0x2, TIMERS_VIRT_BASE + TMR_CMR);</div><div class='add'>+	__raw_writel(0x2, mmp_timer_base + TMR_CMR);</div><div class='ctx'> </div><div class='del'>-	__raw_writel(0x1, TIMERS_VIRT_BASE + TMR_PLCR(0)); /* periodic */</div><div class='del'>-	__raw_writel(0x7, TIMERS_VIRT_BASE + TMR_ICR(0));  /* clear status */</div><div class='del'>-	__raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(0));</div><div class='add'>+	__raw_writel(0x1, mmp_timer_base + TMR_PLCR(0)); /* periodic */</div><div class='add'>+	__raw_writel(0x7, mmp_timer_base + TMR_ICR(0));  /* clear status */</div><div class='add'>+	__raw_writel(0x0, mmp_timer_base + TMR_IER(0));</div><div class='ctx'> </div><div class='del'>-	__raw_writel(0x0, TIMERS_VIRT_BASE + TMR_PLCR(1)); /* free-running */</div><div class='del'>-	__raw_writel(0x7, TIMERS_VIRT_BASE + TMR_ICR(1));  /* clear status */</div><div class='del'>-	__raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(1));</div><div class='add'>+	__raw_writel(0x0, mmp_timer_base + TMR_PLCR(1)); /* free-running */</div><div class='add'>+	__raw_writel(0x7, mmp_timer_base + TMR_ICR(1));  /* clear status */</div><div class='add'>+	__raw_writel(0x0, mmp_timer_base + TMR_IER(1));</div><div class='ctx'> </div><div class='ctx'> 	/* enable timer 1 counter */</div><div class='del'>-	__raw_writel(0x2, TIMERS_VIRT_BASE + TMR_CER);</div><div class='add'>+	__raw_writel(0x2, mmp_timer_base + TMR_CER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct irqaction timer_irq = {</div><div class='hunk'>@@ -203,3 +208,37 @@ void __init timer_init(int irq)</div><div class='ctx'> 	clocksource_register_hz(&amp;cksrc, CLOCK_TICK_RATE);</div><div class='ctx'> 	clockevents_register_device(&amp;ckevt);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static struct of_device_id mmp_timer_dt_ids[] = {</div><div class='add'>+	{ .compatible = "mrvl,mmp-timer", },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init mmp_dt_init_timer(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	int irq, ret;</div><div class='add'>+</div><div class='add'>+	np = of_find_matching_node(NULL, mmp_timer_dt_ids);</div><div class='add'>+	if (!np) {</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq = irq_of_parse_and_map(np, 0);</div><div class='add'>+	if (!irq) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	mmp_timer_base = of_iomap(np, 0);</div><div class='add'>+	if (!mmp_timer_base) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	timer_init(irq);</div><div class='add'>+	return;</div><div class='add'>+out:</div><div class='add'>+	pr_err("Failed to get timer from device tree with error:%d\n", ret);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c<br/>index 3fc9ed21f97d..7a7de2b12a62 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mmp/ttc_dkb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mmp/ttc_dkb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mmp/ttc_dkb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mmp/ttc_dkb.c</a></div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/i2c/pca953x.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/mfd/88pm860x.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/mv_usb.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='hunk'>@@ -25,6 +27,7 @@</div><div class='ctx'> #include &lt;mach/mfp-pxa910.h&gt;</div><div class='ctx'> #include &lt;mach/pxa910.h&gt;</div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='add'>+#include &lt;mach/regs-usb.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='hunk'>@@ -135,8 +138,18 @@ static struct pca953x_platform_data max7312_data[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct pm860x_platform_data ttc_dkb_pm8607_info = {</div><div class='add'>+	.irq_base       = IRQ_BOARD_START,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct i2c_board_info ttc_dkb_i2c_info[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.type           = "88PM860x",</div><div class='add'>+		.addr           = 0x34,</div><div class='add'>+		.platform_data  = &amp;ttc_dkb_pm8607_info,</div><div class='add'>+		.irq            = IRQ_PXA910_PMIC_INT,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		.type		= "max7312",</div><div class='ctx'> 		.addr		= 0x23,</div><div class='ctx'> 		.irq		= MMP_GPIO_TO_IRQ(80),</div><div class='hunk'>@@ -144,6 +157,26 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_USB_SUPPORT</div><div class='add'>+#if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV_U2O)</div><div class='add'>+</div><div class='add'>+static char *pxa910_usb_clock_name[] = {</div><div class='add'>+	[0] = "U2OCLK",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mv_usb_platform_data ttc_usb_pdata = {</div><div class='add'>+	.clknum		= 1,</div><div class='add'>+	.clkname	= pxa910_usb_clock_name,</div><div class='add'>+	.vbus		= NULL,</div><div class='add'>+	.mode		= MV_USB_MODE_OTG,</div><div class='add'>+	.otg_force_a_bus_req = 1,</div><div class='add'>+	.phy_init	= pxa_usb_phy_init,</div><div class='add'>+	.phy_deinit	= pxa_usb_phy_deinit,</div><div class='add'>+	.set_vbus	= NULL,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static void __init ttc_dkb_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	mfp_config(ARRAY_AND_SIZE(ttc_dkb_pin_config));</div><div class='hunk'>@@ -154,6 +187,21 @@ static void __init ttc_dkb_init(void)</div><div class='ctx'> 	/* off-chip devices */</div><div class='ctx'> 	pxa910_add_twsi(0, NULL, ARRAY_AND_SIZE(ttc_dkb_i2c_info));</div><div class='ctx'> 	platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices));</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_USB_MV_UDC</div><div class='add'>+	pxa168_device_u2o.dev.platform_data = &amp;ttc_usb_pdata;</div><div class='add'>+	platform_device_register(&amp;pxa168_device_u2o);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_USB_EHCI_MV_U2O</div><div class='add'>+	pxa168_device_u2oehci.dev.platform_data = &amp;ttc_usb_pdata;</div><div class='add'>+	platform_device_register(&amp;pxa168_device_u2oehci);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_USB_MV_OTG</div><div class='add'>+	pxa168_device_u2ootg.dev.platform_data = &amp;ttc_usb_pdata;</div><div class='add'>+	platform_device_register(&amp;pxa168_device_u2ootg);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")</div><div class='head'>diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c<br/>index 26aac363a064..4fa3e99d9a62 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/board-halibut.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/board-halibut.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/board-halibut.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-halibut.c</a></div><div class='hunk'>@@ -94,6 +94,11 @@ static void __init halibut_map_io(void)</div><div class='ctx'> 	msm_clock_init(msm_clocks_7x01a, msm_num_clocks_7x01a);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init halibut_init_late(void)</div><div class='add'>+{</div><div class='add'>+	smd_debugfs_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")</div><div class='ctx'> 	.atag_offset	= 0x100,</div><div class='ctx'> 	.fixup		= halibut_fixup,</div><div class='hunk'>@@ -101,5 +106,6 @@ MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")</div><div class='ctx'> 	.init_early	= halibut_init_early,</div><div class='ctx'> 	.init_irq	= halibut_init_irq,</div><div class='ctx'> 	.init_machine	= halibut_init,</div><div class='add'>+	.init_late	= halibut_init_late,</div><div class='ctx'> 	.timer		= &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-msm/board-mahimahi.c b/arch/arm/mach-msm/board-mahimahi.c<br/>index 5a4882fc6f7a..cf1f89a5dc62 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/board-mahimahi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/board-mahimahi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/board-mahimahi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-mahimahi.c</a></div><div class='hunk'>@@ -71,6 +71,11 @@ static void __init mahimahi_map_io(void)</div><div class='ctx'> 	msm_clock_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init mahimahi_init_late(void)</div><div class='add'>+{</div><div class='add'>+	smd_debugfs_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> extern struct sys_timer msm_timer;</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(MAHIMAHI, "mahimahi")</div><div class='hunk'>@@ -79,5 +84,6 @@ MACHINE_START(MAHIMAHI, "mahimahi")</div><div class='ctx'> 	.map_io		= mahimahi_map_io,</div><div class='ctx'> 	.init_irq	= msm_init_irq,</div><div class='ctx'> 	.init_machine	= mahimahi_init,</div><div class='add'>+	.init_late	= mahimahi_init_late,</div><div class='ctx'> 	.timer		= &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-msm/board-msm7x27.c b/arch/arm/mach-msm/board-msm7x27.c<br/>index 6d84ee740df4..451ab1d43c92 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/board-msm7x27.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/board-msm7x27.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/board-msm7x27.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-msm7x27.c</a></div><div class='hunk'>@@ -128,11 +128,17 @@ static void __init msm7x2x_map_io(void)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init msm7x2x_init_late(void)</div><div class='add'>+{</div><div class='add'>+	smd_debugfs_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF")</div><div class='ctx'> 	.atag_offset	= 0x100,</div><div class='ctx'> 	.map_io		= msm7x2x_map_io,</div><div class='ctx'> 	.init_irq	= msm7x2x_init_irq,</div><div class='ctx'> 	.init_machine	= msm7x2x_init,</div><div class='add'>+	.init_late	= msm7x2x_init_late,</div><div class='ctx'> 	.timer		= &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -141,6 +147,7 @@ MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA")</div><div class='ctx'> 	.map_io		= msm7x2x_map_io,</div><div class='ctx'> 	.init_irq	= msm7x2x_init_irq,</div><div class='ctx'> 	.init_machine	= msm7x2x_init,</div><div class='add'>+	.init_late	= msm7x2x_init_late,</div><div class='ctx'> 	.timer		= &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -149,6 +156,7 @@ MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF")</div><div class='ctx'> 	.map_io		= msm7x2x_map_io,</div><div class='ctx'> 	.init_irq	= msm7x2x_init_irq,</div><div class='ctx'> 	.init_machine	= msm7x2x_init,</div><div class='add'>+	.init_late	= msm7x2x_init_late,</div><div class='ctx'> 	.timer		= &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -157,5 +165,6 @@ MACHINE_START(MSM7X25_FFA, "QCT MSM7x25 FFA")</div><div class='ctx'> 	.map_io		= msm7x2x_map_io,</div><div class='ctx'> 	.init_irq	= msm7x2x_init_irq,</div><div class='ctx'> 	.init_machine	= msm7x2x_init,</div><div class='add'>+	.init_late	= msm7x2x_init_late,</div><div class='ctx'> 	.timer		= &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c<br/>index db81ed531031..a5001378135d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/board-msm7x30.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/board-msm7x30.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/board-msm7x30.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-msm7x30.c</a></div><div class='hunk'>@@ -17,7 +17,6 @@</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='hunk'>@@ -120,6 +119,11 @@ static void __init msm7x30_map_io(void)</div><div class='ctx'> 	msm_clock_init(msm_clocks_7x30, msm_num_clocks_7x30);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init msm7x30_init_late(void)</div><div class='add'>+{</div><div class='add'>+	smd_debugfs_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF")</div><div class='ctx'> 	.atag_offset = 0x100,</div><div class='ctx'> 	.fixup = msm7x30_fixup,</div><div class='hunk'>@@ -127,6 +131,7 @@ MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF")</div><div class='ctx'> 	.map_io = msm7x30_map_io,</div><div class='ctx'> 	.init_irq = msm7x30_init_irq,</div><div class='ctx'> 	.init_machine = msm7x30_init,</div><div class='add'>+	.init_late = msm7x30_init_late,</div><div class='ctx'> 	.timer = &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -137,6 +142,7 @@ MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")</div><div class='ctx'> 	.map_io = msm7x30_map_io,</div><div class='ctx'> 	.init_irq = msm7x30_init_irq,</div><div class='ctx'> 	.init_machine = msm7x30_init,</div><div class='add'>+	.init_late = msm7x30_init_late,</div><div class='ctx'> 	.timer = &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -147,5 +153,6 @@ MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")</div><div class='ctx'> 	.map_io = msm7x30_map_io,</div><div class='ctx'> 	.init_irq = msm7x30_init_irq,</div><div class='ctx'> 	.init_machine = msm7x30_init,</div><div class='add'>+	.init_late = msm7x30_init_late,</div><div class='ctx'> 	.timer = &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c<br/>index ed3598128530..65f4a1daa2e5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/board-msm8960.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/board-msm8960.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/board-msm8960.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-msm8960.c</a></div><div class='hunk'>@@ -93,6 +93,11 @@ static void __init msm8960_rumi3_init(void)</div><div class='ctx'> 	platform_add_devices(rumi3_devices, ARRAY_SIZE(rumi3_devices));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init msm8960_init_late(void)</div><div class='add'>+{</div><div class='add'>+	smd_debugfs_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")</div><div class='ctx'> 	.fixup = msm8960_fixup,</div><div class='ctx'> 	.reserve = msm8960_reserve,</div><div class='hunk'>@@ -101,6 +106,7 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")</div><div class='ctx'> 	.timer = &amp;msm_timer,</div><div class='ctx'> 	.handle_irq = gic_handle_irq,</div><div class='ctx'> 	.init_machine = msm8960_sim_init,</div><div class='add'>+	.init_late = msm8960_init_late,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")</div><div class='hunk'>@@ -111,5 +117,6 @@ MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")</div><div class='ctx'> 	.timer = &amp;msm_timer,</div><div class='ctx'> 	.handle_irq = gic_handle_irq,</div><div class='ctx'> 	.init_machine = msm8960_rumi3_init,</div><div class='add'>+	.init_late = msm8960_init_late,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c<br/>index fb3496a52ef4..e37a724cd1eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/board-msm8x60.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/board-msm8x60.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/board-msm8x60.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-msm8x60.c</a></div><div class='hunk'>@@ -81,6 +81,11 @@ static void __init msm8x60_init(void)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init msm8x60_init_late(void)</div><div class='add'>+{</div><div class='add'>+	smd_debugfs_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_OF</div><div class='ctx'> static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {</div><div class='ctx'> 	{}</div><div class='hunk'>@@ -111,6 +116,7 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")</div><div class='ctx'> 	.init_irq = msm8x60_init_irq,</div><div class='ctx'> 	.handle_irq = gic_handle_irq,</div><div class='ctx'> 	.init_machine = msm8x60_init,</div><div class='add'>+	.init_late = msm8x60_init_late,</div><div class='ctx'> 	.timer = &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -121,6 +127,7 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")</div><div class='ctx'> 	.init_irq = msm8x60_init_irq,</div><div class='ctx'> 	.handle_irq = gic_handle_irq,</div><div class='ctx'> 	.init_machine = msm8x60_init,</div><div class='add'>+	.init_late = msm8x60_init_late,</div><div class='ctx'> 	.timer = &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -131,6 +138,7 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")</div><div class='ctx'> 	.init_irq = msm8x60_init_irq,</div><div class='ctx'> 	.handle_irq = gic_handle_irq,</div><div class='ctx'> 	.init_machine = msm8x60_init,</div><div class='add'>+	.init_late = msm8x60_init_late,</div><div class='ctx'> 	.timer = &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -141,6 +149,7 @@ MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")</div><div class='ctx'> 	.init_irq = msm8x60_init_irq,</div><div class='ctx'> 	.handle_irq = gic_handle_irq,</div><div class='ctx'> 	.init_machine = msm8x60_init,</div><div class='add'>+	.init_late = msm8x60_init_late,</div><div class='ctx'> 	.timer = &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -150,6 +159,7 @@ DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")</div><div class='ctx'> 	.map_io = msm8x60_map_io,</div><div class='ctx'> 	.init_irq = msm8x60_init_irq,</div><div class='ctx'> 	.init_machine = msm8x60_dt_init,</div><div class='add'>+	.init_late = msm8x60_init_late,</div><div class='ctx'> 	.timer = &amp;msm_timer,</div><div class='ctx'> 	.dt_compat = msm8x60_fluid_match,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c<br/>index 7e8909c978c3..c8fe0edb9761 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/board-qsd8x50.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/board-qsd8x50.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/board-qsd8x50.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-qsd8x50.c</a></div><div class='hunk'>@@ -17,7 +17,6 @@</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/usb/msm_hsusb.h&gt;</div><div class='hunk'>@@ -191,11 +190,17 @@ static void __init qsd8x50_init(void)</div><div class='ctx'> 	qsd8x50_init_mmc();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init qsd8x50_init_late(void)</div><div class='add'>+{</div><div class='add'>+	smd_debugfs_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")</div><div class='ctx'> 	.atag_offset = 0x100,</div><div class='ctx'> 	.map_io = qsd8x50_map_io,</div><div class='ctx'> 	.init_irq = qsd8x50_init_irq,</div><div class='ctx'> 	.init_machine = qsd8x50_init,</div><div class='add'>+	.init_late = qsd8x50_init_late,</div><div class='ctx'> 	.timer = &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -204,5 +209,6 @@ MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")</div><div class='ctx'> 	.map_io = qsd8x50_map_io,</div><div class='ctx'> 	.init_irq = qsd8x50_init_irq,</div><div class='ctx'> 	.init_machine = qsd8x50_init,</div><div class='add'>+	.init_late = qsd8x50_init_late,</div><div class='ctx'> 	.timer = &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c<br/>index 4a8ea0d40b6f..2e569ab10eef 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/board-sapphire.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/board-sapphire.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/board-sapphire.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-sapphire.c</a></div><div class='hunk'>@@ -101,6 +101,11 @@ static void __init sapphire_map_io(void)</div><div class='ctx'> 	msm_clock_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init sapphire_init_late(void)</div><div class='add'>+{</div><div class='add'>+	smd_debugfs_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> MACHINE_START(SAPPHIRE, "sapphire")</div><div class='ctx'> /* Maintainer: Brian Swetland &lt;swetland@google.com&gt; */</div><div class='ctx'> 	.atag_offset    = 0x100,</div><div class='hunk'>@@ -108,5 +113,6 @@ MACHINE_START(SAPPHIRE, "sapphire")</div><div class='ctx'> 	.map_io         = sapphire_map_io,</div><div class='ctx'> 	.init_irq       = sapphire_init_irq,</div><div class='ctx'> 	.init_machine   = sapphire_init,</div><div class='add'>+	.init_late      = sapphire_init_late,</div><div class='ctx'> 	.timer          = &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c<br/>index d4060a37e23d..bbe13f12fa01 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/board-trout.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/board-trout.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/board-trout.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/board-trout.c</a></div><div class='hunk'>@@ -98,6 +98,11 @@ static void __init trout_map_io(void)</div><div class='ctx'> 	msm_clock_init(msm_clocks_7x01a, msm_num_clocks_7x01a);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init trout_init_late(void)</div><div class='add'>+{</div><div class='add'>+	smd_debugfs_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> MACHINE_START(TROUT, "HTC Dream")</div><div class='ctx'> 	.atag_offset	= 0x100,</div><div class='ctx'> 	.fixup		= trout_fixup,</div><div class='hunk'>@@ -105,5 +110,6 @@ MACHINE_START(TROUT, "HTC Dream")</div><div class='ctx'> 	.init_early	= trout_init_early,</div><div class='ctx'> 	.init_irq	= trout_init_irq,</div><div class='ctx'> 	.init_machine	= trout_init,</div><div class='add'>+	.init_late	= trout_init_late,</div><div class='ctx'> 	.timer		= &amp;msm_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h<br/>index 2ce8f1f2fc4d..435f8edfafd1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/include/mach/board.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/include/mach/board.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/include/mach/board.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/include/mach/board.h</a></div><div class='hunk'>@@ -47,4 +47,10 @@ int __init msm_add_sdcc(unsigned int controller,</div><div class='ctx'> 			struct msm_mmc_platform_data *plat,</div><div class='ctx'> 			unsigned int stat_irq, unsigned long stat_irq_flags);</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_MSM_SMD) &amp;&amp; defined(CONFIG_DEBUG_FS)</div><div class='add'>+int smd_debugfs_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int smd_debugfs_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S<br/>index 3ffd8668c9a5..0e05f88abcd5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/include/mach/debug-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/include/mach/debug-macro.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/include/mach/debug-macro.S</a></div><div class='hunk'>@@ -30,8 +30,7 @@</div><div class='ctx'> 	@ Write the 1 character to UARTDM_TF</div><div class='ctx'> 	str	\rd, [\rx, #0x70]</div><div class='ctx'> #else</div><div class='del'>-	teq	\rx, #0</div><div class='del'>-	strne	\rd, [\rx, #0x0C]</div><div class='add'>+	str	\rd, [\rx, #0x0C]</div><div class='ctx'> #endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-msm/scm.c<br/>index bafabb502580..c536fd6bf827 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/scm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/scm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/scm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/scm.c</a></div><div class='hunk'>@@ -282,6 +282,9 @@ u32 scm_get_version(void)</div><div class='ctx'> 			__asmeq("%1", "r1")</div><div class='ctx'> 			__asmeq("%2", "r0")</div><div class='ctx'> 			__asmeq("%3", "r1")</div><div class='add'>+#ifdef REQUIRES_SEC</div><div class='add'>+			".arch_extension sec\n"</div><div class='add'>+#endif</div><div class='ctx'> 			"smc	#0	@ switch to secure world\n"</div><div class='ctx'> 			: "=r" (r0), "=r" (r1)</div><div class='ctx'> 			: "r" (r0), "r" (r1)</div><div class='head'>diff --git a/arch/arm/mach-msm/smd_debug.c b/arch/arm/mach-msm/smd_debug.c<br/>index c56df9e932ae..8056b3e5590f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-msm/smd_debug.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-msm/smd_debug.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-msm/smd_debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-msm/smd_debug.c</a></div><div class='hunk'>@@ -216,7 +216,7 @@ static void debug_create(const char *name, umode_t mode,</div><div class='ctx'> 	debugfs_create_file(name, mode, dent, fill, &amp;debug_ops);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int smd_debugfs_init(void)</div><div class='add'>+int __init smd_debugfs_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct dentry *dent;</div><div class='ctx'> </div><div class='hunk'>@@ -234,7 +234,6 @@ static int smd_debugfs_init(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-late_initcall(smd_debugfs_init);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c<br/>index a5dcf766a3f9..b4c53b846c9c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mv78xx0/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mv78xx0/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mv78xx0/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mv78xx0/common.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/serial_8250.h&gt;</div><div class='ctx'> #include &lt;linux/ata_platform.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> #include &lt;asm/mach/time.h&gt;</div><div class='hunk'>@@ -103,24 +104,24 @@ static void get_pclk_l2clk(int hclk, int core_index, int *pclk, int *l2clk)</div><div class='ctx'> </div><div class='ctx'> static int get_tclk(void)</div><div class='ctx'> {</div><div class='del'>-	int tclk;</div><div class='add'>+	int tclk_freq;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * TCLK tick rate is configured by DEV_A[2:0] strap pins.</div><div class='ctx'> 	 */</div><div class='ctx'> 	switch ((readl(SAMPLE_AT_RESET_HIGH) &gt;&gt; 6) &amp; 7) {</div><div class='ctx'> 	case 1:</div><div class='del'>-		tclk = 166666667;</div><div class='add'>+		tclk_freq = 166666667;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='del'>-		tclk = 200000000;</div><div class='add'>+		tclk_freq = 200000000;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		panic("unknown TCLK PLL setting: %.8x\n",</div><div class='ctx'> 			readl(SAMPLE_AT_RESET_HIGH));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return tclk;</div><div class='add'>+	return tclk_freq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -166,6 +167,19 @@ void __init mv78xx0_map_io(void)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='add'>+ * CLK tree</div><div class='add'>+ ****************************************************************************/</div><div class='add'>+static struct clk *tclk;</div><div class='add'>+</div><div class='add'>+static void __init clk_init(void)</div><div class='add'>+{</div><div class='add'>+	tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,</div><div class='add'>+				       get_tclk());</div><div class='add'>+</div><div class='add'>+	orion_clkdev_init(tclk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*****************************************************************************</div><div class='ctx'>  * EHCI</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init mv78xx0_ehci0_init(void)</div><div class='hunk'>@@ -199,7 +213,7 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)</div><div class='ctx'> {</div><div class='ctx'> 	orion_ge00_init(eth_data,</div><div class='ctx'> 			GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,</div><div class='del'>-			IRQ_MV78XX0_GE_ERR, get_tclk());</div><div class='add'>+			IRQ_MV78XX0_GE_ERR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -210,7 +224,7 @@ void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)</div><div class='ctx'> {</div><div class='ctx'> 	orion_ge01_init(eth_data,</div><div class='ctx'> 			GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,</div><div class='del'>-			NO_IRQ, get_tclk());</div><div class='add'>+			NO_IRQ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -234,7 +248,7 @@ void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)</div><div class='ctx'> </div><div class='ctx'> 	orion_ge10_init(eth_data,</div><div class='ctx'> 			GE10_PHYS_BASE, IRQ_MV78XX0_GE10_SUM,</div><div class='del'>-			NO_IRQ, get_tclk());</div><div class='add'>+			NO_IRQ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -258,7 +272,7 @@ void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)</div><div class='ctx'> </div><div class='ctx'> 	orion_ge11_init(eth_data,</div><div class='ctx'> 			GE11_PHYS_BASE, IRQ_MV78XX0_GE11_SUM,</div><div class='del'>-			NO_IRQ, get_tclk());</div><div class='add'>+			NO_IRQ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -285,7 +299,7 @@ void __init mv78xx0_sata_init(struct mv_sata_platform_data *sata_data)</div><div class='ctx'> void __init mv78xx0_uart0_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,</div><div class='del'>-			 IRQ_MV78XX0_UART_0, get_tclk());</div><div class='add'>+			 IRQ_MV78XX0_UART_0, tclk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -295,7 +309,7 @@ void __init mv78xx0_uart0_init(void)</div><div class='ctx'> void __init mv78xx0_uart1_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,</div><div class='del'>-			 IRQ_MV78XX0_UART_1, get_tclk());</div><div class='add'>+			 IRQ_MV78XX0_UART_1, tclk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -305,7 +319,7 @@ void __init mv78xx0_uart1_init(void)</div><div class='ctx'> void __init mv78xx0_uart2_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_uart2_init(UART2_VIRT_BASE, UART2_PHYS_BASE,</div><div class='del'>-			 IRQ_MV78XX0_UART_2, get_tclk());</div><div class='add'>+			 IRQ_MV78XX0_UART_2, tclk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -314,7 +328,7 @@ void __init mv78xx0_uart2_init(void)</div><div class='ctx'> void __init mv78xx0_uart3_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_uart3_init(UART3_VIRT_BASE, UART3_PHYS_BASE,</div><div class='del'>-			 IRQ_MV78XX0_UART_3, get_tclk());</div><div class='add'>+			 IRQ_MV78XX0_UART_3, tclk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -378,25 +392,26 @@ void __init mv78xx0_init(void)</div><div class='ctx'> 	int hclk;</div><div class='ctx'> 	int pclk;</div><div class='ctx'> 	int l2clk;</div><div class='del'>-	int tclk;</div><div class='ctx'> </div><div class='ctx'> 	core_index = mv78xx0_core_index();</div><div class='ctx'> 	hclk = get_hclk();</div><div class='ctx'> 	get_pclk_l2clk(hclk, core_index, &amp;pclk, &amp;l2clk);</div><div class='del'>-	tclk = get_tclk();</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO "%s ", mv78xx0_id());</div><div class='ctx'> 	printk("core #%d, ", core_index);</div><div class='ctx'> 	printk("PCLK = %dMHz, ", (pclk + 499999) / 1000000);</div><div class='ctx'> 	printk("L2 = %dMHz, ", (l2clk + 499999) / 1000000);</div><div class='ctx'> 	printk("HCLK = %dMHz, ", (hclk + 499999) / 1000000);</div><div class='del'>-	printk("TCLK = %dMHz\n", (tclk + 499999) / 1000000);</div><div class='add'>+	printk("TCLK = %dMHz\n", (get_tclk() + 499999) / 1000000);</div><div class='ctx'> </div><div class='ctx'> 	mv78xx0_setup_cpu_mbus();</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CACHE_FEROCEON_L2</div><div class='ctx'> 	feroceon_l2_init(is_l2_writethrough());</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+	/* Setup root of clk tree */</div><div class='add'>+	clk_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mv78xx0_restart(char mode, const char *cmd)</div><div class='head'>diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c<br/>index df3e38055a24..2e56e86b6d68 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mv78xx0/pcie.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mv78xx0/pcie.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mv78xx0/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mv78xx0/pcie.c</a></div><div class='hunk'>@@ -147,6 +147,7 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	pp = &amp;pcie_port[nr];</div><div class='add'>+	sys-&gt;private_data = pp;</div><div class='ctx'> 	pp-&gt;root_bus_nr = sys-&gt;busnr;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -161,19 +162,6 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct pcie_port *bus_to_port(int bus)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = num_pcie_ports - 1; i &gt;= 0; i--) {</div><div class='del'>-		int rbus = pcie_port[i].root_bus_nr;</div><div class='del'>-		if (rbus != -1 &amp;&amp; rbus &lt;= bus)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return i &gt;= 0 ? pcie_port + i : NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -189,7 +177,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)</div><div class='ctx'> static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,</div><div class='ctx'> 			int size, u32 *val)</div><div class='ctx'> {</div><div class='del'>-	struct pcie_port *pp = bus_to_port(bus-&gt;number);</div><div class='add'>+	struct pci_sys_data *sys = bus-&gt;sysdata;</div><div class='add'>+	struct pcie_port *pp = sys-&gt;private_data;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -208,7 +197,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,</div><div class='ctx'> static int pcie_wr_conf(struct pci_bus *bus, u32 devfn,</div><div class='ctx'> 			int where, int size, u32 val)</div><div class='ctx'> {</div><div class='del'>-	struct pcie_port *pp = bus_to_port(bus-&gt;number);</div><div class='add'>+	struct pci_sys_data *sys = bus-&gt;sysdata;</div><div class='add'>+	struct pcie_port *pp = sys-&gt;private_data;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -263,7 +253,8 @@ mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys)</div><div class='ctx'> static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> 	u8 pin)</div><div class='ctx'> {</div><div class='del'>-	struct pcie_port *pp = bus_to_port(dev-&gt;bus-&gt;number);</div><div class='add'>+	struct pci_sys_data *sys = dev-&gt;bus-&gt;sysdata;</div><div class='add'>+	struct pcie_port *pp = sys-&gt;private_data;</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_MV78XX0_PCIE_00 + (pp-&gt;maj &lt;&lt; 2) + pp-&gt;min;</div><div class='ctx'> }</div><div class='hunk'>@@ -271,7 +262,6 @@ static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> static struct hw_pci mv78xx0_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 8,</div><div class='ctx'> 	.preinit	= mv78xx0_pcie_preinit,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= mv78xx0_pcie_setup,</div><div class='ctx'> 	.scan		= mv78xx0_pcie_scan_bus,</div><div class='ctx'> 	.map_irq	= mv78xx0_pcie_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig<br/>index c57f9964a713..91cf0625819c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/Kconfig</a></div><div class='hunk'>@@ -7,16 +7,28 @@ config MXS_OCOTP</div><div class='ctx'> </div><div class='ctx'> config SOC_IMX23</div><div class='ctx'> 	bool</div><div class='add'>+	select ARM_AMBA</div><div class='ctx'> 	select CPU_ARM926T</div><div class='ctx'> 	select HAVE_PWM</div><div class='add'>+	select PINCTRL_IMX23</div><div class='ctx'> </div><div class='ctx'> config SOC_IMX28</div><div class='ctx'> 	bool</div><div class='add'>+	select ARM_AMBA</div><div class='ctx'> 	select CPU_ARM926T</div><div class='ctx'> 	select HAVE_PWM</div><div class='add'>+	select PINCTRL_IMX28</div><div class='ctx'> </div><div class='ctx'> comment "MXS platforms:"</div><div class='ctx'> </div><div class='add'>+config MACH_MXS_DT</div><div class='add'>+	bool "Support MXS platforms from device tree"</div><div class='add'>+	select SOC_IMX23</div><div class='add'>+	select SOC_IMX28</div><div class='add'>+	help</div><div class='add'>+	  Include support for Freescale MXS platforms(i.MX23 and i.MX28)</div><div class='add'>+	  using the device tree for discovery</div><div class='add'>+</div><div class='ctx'> config MACH_STMP378X_DEVB</div><div class='ctx'> 	bool "Support STMP378x_devb Platform"</div><div class='ctx'> 	select SOC_IMX23</div><div class='head'>diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile<br/>index 908bf9a567f1..e41590ccb437 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/Makefile</a></div><div class='hunk'>@@ -1,12 +1,10 @@</div><div class='ctx'> # Common support</div><div class='del'>-obj-y := clock.o devices.o icoll.o iomux.o system.o timer.o mm.o</div><div class='add'>+obj-y := devices.o icoll.o iomux.o system.o timer.o mm.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_MXS_OCOTP) += ocotp.o</div><div class='ctx'> obj-$(CONFIG_PM) += pm.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_SOC_IMX23) += clock-mx23.o</div><div class='del'>-obj-$(CONFIG_SOC_IMX28) += clock-mx28.o</div><div class='del'>-</div><div class='add'>+obj-$(CONFIG_MACH_MXS_DT) += mach-mxs.o</div><div class='ctx'> obj-$(CONFIG_MACH_STMP378X_DEVB) += mach-stmp378x_devb.o</div><div class='ctx'> obj-$(CONFIG_MACH_MX23EVK) += mach-mx23evk.o</div><div class='ctx'> obj-$(CONFIG_MACH_MX28EVK) += mach-mx28evk.o</div><div class='head'>diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c<br/>deleted file mode 100644<br/>index e3ac52c34019..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/clock-mx23.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/clock-mx23.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,536 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='del'>- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/clkdev.h&gt;</div><div class='del'>-#include &lt;asm/div64.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/mx23.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-#include &lt;mach/clock.h&gt;</div><div class='del'>-</div><div class='del'>-#include "regs-clkctrl-mx23.h"</div><div class='del'>-</div><div class='del'>-#define CLKCTRL_BASE_ADDR	MX23_IO_ADDRESS(MX23_CLKCTRL_BASE_ADDR)</div><div class='del'>-#define DIGCTRL_BASE_ADDR	MX23_IO_ADDRESS(MX23_DIGCTL_BASE_ADDR)</div><div class='del'>-</div><div class='del'>-#define PARENT_RATE_SHIFT	8</div><div class='del'>-</div><div class='del'>-static int _raw_clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;enable_reg) {</div><div class='del'>-		reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-		reg &amp;= ~(1 &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-		__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _raw_clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;enable_reg) {</div><div class='del'>-		reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-		reg |= 1 &lt;&lt; clk-&gt;enable_shift;</div><div class='del'>-		__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ref_xtal_clk</div><div class='del'>- */</div><div class='del'>-static unsigned long ref_xtal_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return 24000000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk ref_xtal_clk = {</div><div class='del'>-	.get_rate = ref_xtal_clk_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * pll_clk</div><div class='del'>- */</div><div class='del'>-static unsigned long pll_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return 480000000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pll_clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(BM_CLKCTRL_PLLCTRL0_POWER |</div><div class='del'>-			BM_CLKCTRL_PLLCTRL0_EN_USB_CLKS,</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_PLLCTRL0_SET);</div><div class='del'>-</div><div class='del'>-	/* Only a 10us delay is need. PLLCTRL1 LOCK bitfied is only a timer</div><div class='del'>-	 * and is incorrect (excessive). Per definition of the PLLCTRL0</div><div class='del'>-	 * POWER field, waiting at least 10us.</div><div class='del'>-	 */</div><div class='del'>-	udelay(10);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pll_clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(BM_CLKCTRL_PLLCTRL0_POWER |</div><div class='del'>-			BM_CLKCTRL_PLLCTRL0_EN_USB_CLKS,</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_PLLCTRL0_CLR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk pll_clk = {</div><div class='del'>-	 .get_rate = pll_clk_get_rate,</div><div class='del'>-	 .enable = pll_clk_enable,</div><div class='del'>-	 .disable = pll_clk_disable,</div><div class='del'>-	 .parent = &amp;ref_xtal_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ref_clk</div><div class='del'>- */</div><div class='del'>-#define _CLK_GET_RATE_REF(name, sr, ss)					\</div><div class='del'>-static unsigned long name##_get_rate(struct clk *clk)			\</div><div class='del'>-{									\</div><div class='del'>-	unsigned long parent_rate;					\</div><div class='del'>-	u32 reg, div;							\</div><div class='del'>-									\</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##sr);		\</div><div class='del'>-	div = (reg &gt;&gt; BP_CLKCTRL_##sr##_##ss##FRAC) &amp; 0x3f;		\</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);			\</div><div class='del'>-									\</div><div class='del'>-	return SH_DIV((parent_rate &gt;&gt; PARENT_RATE_SHIFT) * 18,		\</div><div class='del'>-			div, PARENT_RATE_SHIFT);			\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_GET_RATE_REF(ref_cpu_clk, FRAC, CPU)</div><div class='del'>-_CLK_GET_RATE_REF(ref_emi_clk, FRAC, EMI)</div><div class='del'>-_CLK_GET_RATE_REF(ref_pix_clk, FRAC, PIX)</div><div class='del'>-_CLK_GET_RATE_REF(ref_io_clk, FRAC, IO)</div><div class='del'>-</div><div class='del'>-#define _DEFINE_CLOCK_REF(name, er, es)					\</div><div class='del'>-	static struct clk name = {					\</div><div class='del'>-		.enable_reg	= CLKCTRL_BASE_ADDR + HW_CLKCTRL_##er,	\</div><div class='del'>-		.enable_shift	= BP_CLKCTRL_##er##_CLKGATE##es,	\</div><div class='del'>-		.get_rate	= name##_get_rate,			\</div><div class='del'>-		.enable		= _raw_clk_enable,			\</div><div class='del'>-		.disable	= _raw_clk_disable,			\</div><div class='del'>-		.parent		= &amp;pll_clk,				\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-_DEFINE_CLOCK_REF(ref_cpu_clk, FRAC, CPU);</div><div class='del'>-_DEFINE_CLOCK_REF(ref_emi_clk, FRAC, EMI);</div><div class='del'>-_DEFINE_CLOCK_REF(ref_pix_clk, FRAC, PIX);</div><div class='del'>-_DEFINE_CLOCK_REF(ref_io_clk, FRAC, IO);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * General clocks</div><div class='del'>- *</div><div class='del'>- * clk_get_rate</div><div class='del'>- */</div><div class='del'>-static unsigned long rtc_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	/* ref_xtal_clk is implemented as the only parent */</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / 768;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk32k_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk-&gt;parent-&gt;get_rate(clk-&gt;parent) / 750;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define _CLK_GET_RATE(name, rs)						\</div><div class='del'>-static unsigned long name##_get_rate(struct clk *clk)			\</div><div class='del'>-{									\</div><div class='del'>-	u32 reg, div;							\</div><div class='del'>-									\</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs);		\</div><div class='del'>-									\</div><div class='del'>-	if (clk-&gt;parent == &amp;ref_xtal_clk)				\</div><div class='del'>-		div = (reg &amp; BM_CLKCTRL_##rs##_DIV_XTAL) &gt;&gt;		\</div><div class='del'>-			BP_CLKCTRL_##rs##_DIV_XTAL;			\</div><div class='del'>-	else								\</div><div class='del'>-		div = (reg &amp; BM_CLKCTRL_##rs##_DIV_##rs) &gt;&gt;		\</div><div class='del'>-			BP_CLKCTRL_##rs##_DIV_##rs;			\</div><div class='del'>-									\</div><div class='del'>-	if (!div)							\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-									\</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / div;				\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_GET_RATE(cpu_clk, CPU)</div><div class='del'>-_CLK_GET_RATE(emi_clk, EMI)</div><div class='del'>-</div><div class='del'>-#define _CLK_GET_RATE1(name, rs)					\</div><div class='del'>-static unsigned long name##_get_rate(struct clk *clk)			\</div><div class='del'>-{									\</div><div class='del'>-	u32 reg, div;							\</div><div class='del'>-									\</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs);		\</div><div class='del'>-	div = (reg &amp; BM_CLKCTRL_##rs##_DIV) &gt;&gt; BP_CLKCTRL_##rs##_DIV;	\</div><div class='del'>-									\</div><div class='del'>-	if (!div)							\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-									\</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / div;				\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_GET_RATE1(hbus_clk, HBUS)</div><div class='del'>-_CLK_GET_RATE1(xbus_clk, XBUS)</div><div class='del'>-_CLK_GET_RATE1(ssp_clk, SSP)</div><div class='del'>-_CLK_GET_RATE1(gpmi_clk, GPMI)</div><div class='del'>-_CLK_GET_RATE1(lcdif_clk, PIX)</div><div class='del'>-</div><div class='del'>-#define _CLK_GET_RATE_STUB(name)					\</div><div class='del'>-static unsigned long name##_get_rate(struct clk *clk)			\</div><div class='del'>-{									\</div><div class='del'>-	return clk_get_rate(clk-&gt;parent);				\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_GET_RATE_STUB(uart_clk)</div><div class='del'>-_CLK_GET_RATE_STUB(audio_clk)</div><div class='del'>-_CLK_GET_RATE_STUB(pwm_clk)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * clk_set_rate</div><div class='del'>- */</div><div class='del'>-static int cpu_clk_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	u32 reg, bm_busy, div_max, d, f, div, frac;</div><div class='del'>-	unsigned long diff, parent_rate, calc_rate;</div><div class='del'>-</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;parent == &amp;ref_xtal_clk) {</div><div class='del'>-		div_max = BM_CLKCTRL_CPU_DIV_XTAL &gt;&gt; BP_CLKCTRL_CPU_DIV_XTAL;</div><div class='del'>-		bm_busy = BM_CLKCTRL_CPU_BUSY_REF_XTAL;</div><div class='del'>-		div = DIV_ROUND_UP(parent_rate, rate);</div><div class='del'>-		if (div == 0 || div &gt; div_max)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-	} else {</div><div class='del'>-		div_max = BM_CLKCTRL_CPU_DIV_CPU &gt;&gt; BP_CLKCTRL_CPU_DIV_CPU;</div><div class='del'>-		bm_busy = BM_CLKCTRL_CPU_BUSY_REF_CPU;</div><div class='del'>-		rate &gt;&gt;= PARENT_RATE_SHIFT;</div><div class='del'>-		parent_rate &gt;&gt;= PARENT_RATE_SHIFT;</div><div class='del'>-		diff = parent_rate;</div><div class='del'>-		div = frac = 1;</div><div class='del'>-		for (d = 1; d &lt;= div_max; d++) {</div><div class='del'>-			f = parent_rate * 18 / d / rate;</div><div class='del'>-			if ((parent_rate * 18 / d) % rate)</div><div class='del'>-				f++;</div><div class='del'>-			if (f &lt; 18 || f &gt; 35)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			calc_rate = parent_rate * 18 / f / d;</div><div class='del'>-			if (calc_rate &gt; rate)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			if (rate - calc_rate &lt; diff) {</div><div class='del'>-				frac = f;</div><div class='del'>-				div = d;</div><div class='del'>-				diff = rate - calc_rate;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (diff == 0)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (diff == parent_rate)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC);</div><div class='del'>-		reg &amp;= ~BM_CLKCTRL_FRAC_CPUFRAC;</div><div class='del'>-		reg |= frac;</div><div class='del'>-		__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_CPU_DIV_CPU;</div><div class='del'>-	reg |= div &lt;&lt; BP_CLKCTRL_CPU_DIV_CPU;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU);</div><div class='del'>-</div><div class='del'>-	mxs_clkctrl_timeout(HW_CLKCTRL_CPU, bm_busy);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define _CLK_SET_RATE(name, dr)						\</div><div class='del'>-static int name##_set_rate(struct clk *clk, unsigned long rate)		\</div><div class='del'>-{									\</div><div class='del'>-	u32 reg, div_max, div;						\</div><div class='del'>-	unsigned long parent_rate;					\</div><div class='del'>-									\</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);			\</div><div class='del'>-	div_max = BM_CLKCTRL_##dr##_DIV &gt;&gt; BP_CLKCTRL_##dr##_DIV;	\</div><div class='del'>-									\</div><div class='del'>-	div = DIV_ROUND_UP(parent_rate, rate);				\</div><div class='del'>-	if (div == 0 || div &gt; div_max)					\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-									\</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr);		\</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_##dr##_DIV;					\</div><div class='del'>-	reg |= div &lt;&lt; BP_CLKCTRL_##dr##_DIV;				\</div><div class='del'>-	if (reg &amp; (1 &lt;&lt; clk-&gt;enable_shift)) {				\</div><div class='del'>-		pr_err("%s: clock is gated\n", __func__);		\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-	}								\</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr);		\</div><div class='del'>-									\</div><div class='del'>-	mxs_clkctrl_timeout(HW_CLKCTRL_##dr, BM_CLKCTRL_##dr##_BUSY);	\</div><div class='del'>-	return 0;							\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_SET_RATE(xbus_clk, XBUS)</div><div class='del'>-_CLK_SET_RATE(ssp_clk, SSP)</div><div class='del'>-_CLK_SET_RATE(gpmi_clk, GPMI)</div><div class='del'>-_CLK_SET_RATE(lcdif_clk, PIX)</div><div class='del'>-</div><div class='del'>-#define _CLK_SET_RATE_STUB(name)					\</div><div class='del'>-static int name##_set_rate(struct clk *clk, unsigned long rate)		\</div><div class='del'>-{									\</div><div class='del'>-	return -EINVAL;							\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_SET_RATE_STUB(emi_clk)</div><div class='del'>-_CLK_SET_RATE_STUB(uart_clk)</div><div class='del'>-_CLK_SET_RATE_STUB(audio_clk)</div><div class='del'>-_CLK_SET_RATE_STUB(pwm_clk)</div><div class='del'>-_CLK_SET_RATE_STUB(clk32k_clk)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * clk_set_parent</div><div class='del'>- */</div><div class='del'>-#define _CLK_SET_PARENT(name, bit)					\</div><div class='del'>-static int name##_set_parent(struct clk *clk, struct clk *parent)	\</div><div class='del'>-{									\</div><div class='del'>-	if (parent != clk-&gt;parent) {					\</div><div class='del'>-		__raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit,		\</div><div class='del'>-			 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG);	\</div><div class='del'>-		clk-&gt;parent = parent;					\</div><div class='del'>-	}								\</div><div class='del'>-									\</div><div class='del'>-	return 0;							\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_SET_PARENT(cpu_clk, CPU)</div><div class='del'>-_CLK_SET_PARENT(emi_clk, EMI)</div><div class='del'>-_CLK_SET_PARENT(ssp_clk, SSP)</div><div class='del'>-_CLK_SET_PARENT(gpmi_clk, GPMI)</div><div class='del'>-_CLK_SET_PARENT(lcdif_clk, PIX)</div><div class='del'>-</div><div class='del'>-#define _CLK_SET_PARENT_STUB(name)					\</div><div class='del'>-static int name##_set_parent(struct clk *clk, struct clk *parent)	\</div><div class='del'>-{									\</div><div class='del'>-	if (parent != clk-&gt;parent)					\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-	else								\</div><div class='del'>-		return 0;						\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_SET_PARENT_STUB(uart_clk)</div><div class='del'>-_CLK_SET_PARENT_STUB(audio_clk)</div><div class='del'>-_CLK_SET_PARENT_STUB(pwm_clk)</div><div class='del'>-_CLK_SET_PARENT_STUB(clk32k_clk)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * clk definition</div><div class='del'>- */</div><div class='del'>-static struct clk cpu_clk = {</div><div class='del'>-	.get_rate = cpu_clk_get_rate,</div><div class='del'>-	.set_rate = cpu_clk_set_rate,</div><div class='del'>-	.set_parent = cpu_clk_set_parent,</div><div class='del'>-	.parent = &amp;ref_cpu_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk hbus_clk = {</div><div class='del'>-	.get_rate = hbus_clk_get_rate,</div><div class='del'>-	.parent = &amp;cpu_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk xbus_clk = {</div><div class='del'>-	.get_rate = xbus_clk_get_rate,</div><div class='del'>-	.set_rate = xbus_clk_set_rate,</div><div class='del'>-	.parent = &amp;ref_xtal_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk rtc_clk = {</div><div class='del'>-	.get_rate = rtc_clk_get_rate,</div><div class='del'>-	.parent = &amp;ref_xtal_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* usb_clk gate is controlled in DIGCTRL other than CLKCTRL */</div><div class='del'>-static struct clk usb_clk = {</div><div class='del'>-	.enable_reg = DIGCTRL_BASE_ADDR,</div><div class='del'>-	.enable_shift = 2,</div><div class='del'>-	.enable = _raw_clk_enable,</div><div class='del'>-	.disable = _raw_clk_disable,</div><div class='del'>-	.parent = &amp;pll_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define _DEFINE_CLOCK(name, er, es, p)					\</div><div class='del'>-	static struct clk name = {					\</div><div class='del'>-		.enable_reg	= CLKCTRL_BASE_ADDR + HW_CLKCTRL_##er,	\</div><div class='del'>-		.enable_shift	= BP_CLKCTRL_##er##_##es,		\</div><div class='del'>-		.get_rate	= name##_get_rate,			\</div><div class='del'>-		.set_rate	= name##_set_rate,			\</div><div class='del'>-		.set_parent	= name##_set_parent,			\</div><div class='del'>-		.enable		= _raw_clk_enable,			\</div><div class='del'>-		.disable	= _raw_clk_disable,			\</div><div class='del'>-		.parent		= p,					\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-_DEFINE_CLOCK(emi_clk, EMI, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(ssp_clk, SSP, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(gpmi_clk, GPMI, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(lcdif_clk, PIX, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(uart_clk, XTAL, UART_CLK_GATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(audio_clk, XTAL, FILT_CLK24M_GATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(pwm_clk, XTAL, PWM_CLK24M_GATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(clk32k_clk, XTAL, TIMROT_CLK32K_GATE, &amp;ref_xtal_clk);</div><div class='del'>-</div><div class='del'>-#define _REGISTER_CLOCK(d, n, c) \</div><div class='del'>-	{ \</div><div class='del'>-		.dev_id = d, \</div><div class='del'>-		.con_id = n, \</div><div class='del'>-		.clk = &amp;c, \</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-static struct clk_lookup lookups[] = {</div><div class='del'>-	/* for amba bus driver */</div><div class='del'>-	_REGISTER_CLOCK("duart", "apb_pclk", xbus_clk)</div><div class='del'>-	/* for amba-pl011 driver */</div><div class='del'>-	_REGISTER_CLOCK("duart", NULL, uart_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-auart.0", NULL, uart_clk)</div><div class='del'>-	_REGISTER_CLOCK("rtc", NULL, rtc_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-mmc.0", NULL, ssp_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-mmc.1", NULL, ssp_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "usb", usb_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "audio", audio_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.0", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.1", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.2", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.3", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.4", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx23-fb", NULL, lcdif_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx23-gpmi-nand", NULL, gpmi_clk)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int clk_misc_init(void)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* Fix up parent per register setting */</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ);</div><div class='del'>-	cpu_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_CPU) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_cpu_clk;</div><div class='del'>-	emi_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_EMI) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_emi_clk;</div><div class='del'>-	ssp_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_SSP) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_io_clk;</div><div class='del'>-	gpmi_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_GPMI) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_io_clk;</div><div class='del'>-	lcdif_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_PIX) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_pix_clk;</div><div class='del'>-</div><div class='del'>-	/* Use int div over frac when both are available */</div><div class='del'>-	__raw_writel(BM_CLKCTRL_CPU_DIV_XTAL_FRAC_EN,</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_CLR);</div><div class='del'>-	__raw_writel(BM_CLKCTRL_CPU_DIV_CPU_FRAC_EN,</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_CLR);</div><div class='del'>-	__raw_writel(BM_CLKCTRL_HBUS_DIV_FRAC_EN,</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_HBUS_CLR);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_XBUS);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_XBUS_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_XBUS);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SSP);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_SSP_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SSP);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_GPMI);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_GPMI_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_GPMI);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_PIX);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_PIX_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_PIX);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set safe hbus clock divider. A divider of 3 ensure that</div><div class='del'>-	 * the Vddd voltage required for the cpu clock is sufficiently</div><div class='del'>-	 * high for the hbus clock.</div><div class='del'>-	 */</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_HBUS);</div><div class='del'>-	reg &amp;= BM_CLKCTRL_HBUS_DIV;</div><div class='del'>-	reg |= 3 &lt;&lt; BP_CLKCTRL_HBUS_DIV;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_HBUS);</div><div class='del'>-</div><div class='del'>-	ret = mxs_clkctrl_timeout(HW_CLKCTRL_HBUS, BM_CLKCTRL_HBUS_BUSY);</div><div class='del'>-</div><div class='del'>-	/* Gate off cpu clock in WFI for power saving */</div><div class='del'>-	__raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT,</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * 480 MHz seems too high to be ssp clock source directly,</div><div class='del'>-	 * so set frac to get a 288 MHz ref_io.</div><div class='del'>-	 */</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_FRAC_IOFRAC;</div><div class='del'>-	reg |= 30 &lt;&lt; BP_CLKCTRL_FRAC_IOFRAC;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init mx23_clocks_init(void)</div><div class='del'>-{</div><div class='del'>-	clk_misc_init();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * source ssp clock from ref_io than ref_xtal,</div><div class='del'>-	 * as ref_xtal only provides 24 MHz as maximum.</div><div class='del'>-	 */</div><div class='del'>-	clk_set_parent(&amp;ssp_clk, &amp;ref_io_clk);</div><div class='del'>-</div><div class='del'>-	clk_prepare_enable(&amp;cpu_clk);</div><div class='del'>-	clk_prepare_enable(&amp;hbus_clk);</div><div class='del'>-	clk_prepare_enable(&amp;xbus_clk);</div><div class='del'>-	clk_prepare_enable(&amp;emi_clk);</div><div class='del'>-	clk_prepare_enable(&amp;uart_clk);</div><div class='del'>-</div><div class='del'>-	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='del'>-</div><div class='del'>-	mxs_timer_init(&amp;clk32k_clk, MX23_INT_TIMER0);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c<br/>deleted file mode 100644<br/>index cea29c99e214..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/clock-mx28.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/clock-mx28.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,803 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='del'>- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/clkdev.h&gt;</div><div class='del'>-#include &lt;asm/div64.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/mx28.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-#include &lt;mach/clock.h&gt;</div><div class='del'>-#include &lt;mach/digctl.h&gt;</div><div class='del'>-</div><div class='del'>-#include "regs-clkctrl-mx28.h"</div><div class='del'>-</div><div class='del'>-#define CLKCTRL_BASE_ADDR	MX28_IO_ADDRESS(MX28_CLKCTRL_BASE_ADDR)</div><div class='del'>-#define DIGCTRL_BASE_ADDR	MX28_IO_ADDRESS(MX28_DIGCTL_BASE_ADDR)</div><div class='del'>-</div><div class='del'>-#define PARENT_RATE_SHIFT	8</div><div class='del'>-</div><div class='del'>-static struct clk pll2_clk;</div><div class='del'>-static struct clk cpu_clk;</div><div class='del'>-static struct clk emi_clk;</div><div class='del'>-static struct clk saif0_clk;</div><div class='del'>-static struct clk saif1_clk;</div><div class='del'>-static struct clk clk32k_clk;</div><div class='del'>-static DEFINE_SPINLOCK(clkmux_lock);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * HW_SAIF_CLKMUX_SEL:</div><div class='del'>- *  DIRECT(0x0): SAIF0 clock pins selected for SAIF0 input clocks, and SAIF1</div><div class='del'>- *		clock pins selected for SAIF1 input clocks.</div><div class='del'>- *  CROSSINPUT(0x1): SAIF1 clock inputs selected for SAIF0 input clocks, and</div><div class='del'>- *		SAIF0 clock inputs selected for SAIF1 input clocks.</div><div class='del'>- *  EXTMSTR0(0x2): SAIF0 clock pin selected for both SAIF0 and SAIF1 input</div><div class='del'>- *		clocks.</div><div class='del'>- *  EXTMSTR1(0x3): SAIF1 clock pin selected for both SAIF0 and SAIF1 input</div><div class='del'>- *		clocks.</div><div class='del'>- */</div><div class='del'>-int mxs_saif_clkmux_select(unsigned int clkmux)</div><div class='del'>-{</div><div class='del'>-	if (clkmux &gt; 0x3)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;clkmux_lock);</div><div class='del'>-	__raw_writel(BM_DIGCTL_CTRL_SAIF_CLKMUX,</div><div class='del'>-			DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL + MXS_CLR_ADDR);</div><div class='del'>-	__raw_writel(clkmux &lt;&lt; BP_DIGCTL_CTRL_SAIF_CLKMUX,</div><div class='del'>-			DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL + MXS_SET_ADDR);</div><div class='del'>-	spin_unlock(&amp;clkmux_lock);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _raw_clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;enable_reg) {</div><div class='del'>-		reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-		reg &amp;= ~(1 &lt;&lt; clk-&gt;enable_shift);</div><div class='del'>-		__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _raw_clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;enable_reg) {</div><div class='del'>-		reg = __raw_readl(clk-&gt;enable_reg);</div><div class='del'>-		reg |= 1 &lt;&lt; clk-&gt;enable_shift;</div><div class='del'>-		__raw_writel(reg, clk-&gt;enable_reg);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ref_xtal_clk</div><div class='del'>- */</div><div class='del'>-static unsigned long ref_xtal_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return 24000000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct clk ref_xtal_clk = {</div><div class='del'>-	.get_rate = ref_xtal_clk_get_rate,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * pll_clk</div><div class='del'>- */</div><div class='del'>-static unsigned long pll0_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return 480000000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long pll1_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return 480000000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long pll2_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return 50000000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define _CLK_ENABLE_PLL(name, r, g)					\</div><div class='del'>-static int name##_enable(struct clk *clk)				\</div><div class='del'>-{									\</div><div class='del'>-	__raw_writel(BM_CLKCTRL_##r##CTRL0_POWER,			\</div><div class='del'>-		     CLKCTRL_BASE_ADDR + HW_CLKCTRL_##r##CTRL0_SET);	\</div><div class='del'>-	udelay(10);							\</div><div class='del'>-									\</div><div class='del'>-	if (clk == &amp;pll2_clk)						\</div><div class='del'>-		__raw_writel(BM_CLKCTRL_##r##CTRL0_##g,			\</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_##r##CTRL0_CLR);	\</div><div class='del'>-	else								\</div><div class='del'>-		__raw_writel(BM_CLKCTRL_##r##CTRL0_##g,			\</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_##r##CTRL0_SET);	\</div><div class='del'>-									\</div><div class='del'>-	return 0;							\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_ENABLE_PLL(pll0_clk, PLL0, EN_USB_CLKS)</div><div class='del'>-_CLK_ENABLE_PLL(pll1_clk, PLL1, EN_USB_CLKS)</div><div class='del'>-_CLK_ENABLE_PLL(pll2_clk, PLL2, CLKGATE)</div><div class='del'>-</div><div class='del'>-#define _CLK_DISABLE_PLL(name, r, g)					\</div><div class='del'>-static void name##_disable(struct clk *clk)				\</div><div class='del'>-{									\</div><div class='del'>-	__raw_writel(BM_CLKCTRL_##r##CTRL0_POWER,			\</div><div class='del'>-		     CLKCTRL_BASE_ADDR + HW_CLKCTRL_##r##CTRL0_CLR);	\</div><div class='del'>-									\</div><div class='del'>-	if (clk == &amp;pll2_clk)						\</div><div class='del'>-		__raw_writel(BM_CLKCTRL_##r##CTRL0_##g,			\</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_##r##CTRL0_SET);	\</div><div class='del'>-	else								\</div><div class='del'>-		__raw_writel(BM_CLKCTRL_##r##CTRL0_##g,			\</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_##r##CTRL0_CLR);	\</div><div class='del'>-									\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_DISABLE_PLL(pll0_clk, PLL0, EN_USB_CLKS)</div><div class='del'>-_CLK_DISABLE_PLL(pll1_clk, PLL1, EN_USB_CLKS)</div><div class='del'>-_CLK_DISABLE_PLL(pll2_clk, PLL2, CLKGATE)</div><div class='del'>-</div><div class='del'>-#define _DEFINE_CLOCK_PLL(name)						\</div><div class='del'>-	static struct clk name = {					\</div><div class='del'>-		.get_rate	= name##_get_rate,			\</div><div class='del'>-		.enable		= name##_enable,			\</div><div class='del'>-		.disable	= name##_disable,			\</div><div class='del'>-		.parent		= &amp;ref_xtal_clk,			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-_DEFINE_CLOCK_PLL(pll0_clk);</div><div class='del'>-_DEFINE_CLOCK_PLL(pll1_clk);</div><div class='del'>-_DEFINE_CLOCK_PLL(pll2_clk);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ref_clk</div><div class='del'>- */</div><div class='del'>-#define _CLK_GET_RATE_REF(name, sr, ss)					\</div><div class='del'>-static unsigned long name##_get_rate(struct clk *clk)			\</div><div class='del'>-{									\</div><div class='del'>-	unsigned long parent_rate;					\</div><div class='del'>-	u32 reg, div;							\</div><div class='del'>-									\</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##sr);		\</div><div class='del'>-	div = (reg &gt;&gt; BP_CLKCTRL_##sr##_##ss##FRAC) &amp; 0x3f;		\</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);			\</div><div class='del'>-									\</div><div class='del'>-	return SH_DIV((parent_rate &gt;&gt; PARENT_RATE_SHIFT) * 18,		\</div><div class='del'>-			div, PARENT_RATE_SHIFT);			\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_GET_RATE_REF(ref_cpu_clk, FRAC0, CPU)</div><div class='del'>-_CLK_GET_RATE_REF(ref_emi_clk, FRAC0, EMI)</div><div class='del'>-_CLK_GET_RATE_REF(ref_io0_clk, FRAC0, IO0)</div><div class='del'>-_CLK_GET_RATE_REF(ref_io1_clk, FRAC0, IO1)</div><div class='del'>-_CLK_GET_RATE_REF(ref_pix_clk, FRAC1, PIX)</div><div class='del'>-_CLK_GET_RATE_REF(ref_gpmi_clk, FRAC1, GPMI)</div><div class='del'>-</div><div class='del'>-#define _DEFINE_CLOCK_REF(name, er, es)					\</div><div class='del'>-	static struct clk name = {					\</div><div class='del'>-		.enable_reg	= CLKCTRL_BASE_ADDR + HW_CLKCTRL_##er,	\</div><div class='del'>-		.enable_shift	= BP_CLKCTRL_##er##_CLKGATE##es,	\</div><div class='del'>-		.get_rate	= name##_get_rate,			\</div><div class='del'>-		.enable		= _raw_clk_enable,			\</div><div class='del'>-		.disable	= _raw_clk_disable,			\</div><div class='del'>-		.parent		= &amp;pll0_clk,				\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-_DEFINE_CLOCK_REF(ref_cpu_clk, FRAC0, CPU);</div><div class='del'>-_DEFINE_CLOCK_REF(ref_emi_clk, FRAC0, EMI);</div><div class='del'>-_DEFINE_CLOCK_REF(ref_io0_clk, FRAC0, IO0);</div><div class='del'>-_DEFINE_CLOCK_REF(ref_io1_clk, FRAC0, IO1);</div><div class='del'>-_DEFINE_CLOCK_REF(ref_pix_clk, FRAC1, PIX);</div><div class='del'>-_DEFINE_CLOCK_REF(ref_gpmi_clk, FRAC1, GPMI);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * General clocks</div><div class='del'>- *</div><div class='del'>- * clk_get_rate</div><div class='del'>- */</div><div class='del'>-static unsigned long lradc_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / 16;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long rtc_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	/* ref_xtal_clk is implemented as the only parent */</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / 768;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long clk32k_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk-&gt;parent-&gt;get_rate(clk-&gt;parent) / 750;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long spdif_clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / 4;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define _CLK_GET_RATE(name, rs)						\</div><div class='del'>-static unsigned long name##_get_rate(struct clk *clk)			\</div><div class='del'>-{									\</div><div class='del'>-	u32 reg, div;							\</div><div class='del'>-									\</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs);		\</div><div class='del'>-									\</div><div class='del'>-	if (clk-&gt;parent == &amp;ref_xtal_clk)				\</div><div class='del'>-		div = (reg &amp; BM_CLKCTRL_##rs##_DIV_XTAL) &gt;&gt;		\</div><div class='del'>-			BP_CLKCTRL_##rs##_DIV_XTAL;			\</div><div class='del'>-	else								\</div><div class='del'>-		div = (reg &amp; BM_CLKCTRL_##rs##_DIV_##rs) &gt;&gt;		\</div><div class='del'>-			BP_CLKCTRL_##rs##_DIV_##rs;			\</div><div class='del'>-									\</div><div class='del'>-	if (!div)							\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-									\</div><div class='del'>-	return clk_get_rate(clk-&gt;parent) / div;				\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_GET_RATE(cpu_clk, CPU)</div><div class='del'>-_CLK_GET_RATE(emi_clk, EMI)</div><div class='del'>-</div><div class='del'>-#define _CLK_GET_RATE1(name, rs)					\</div><div class='del'>-static unsigned long name##_get_rate(struct clk *clk)			\</div><div class='del'>-{									\</div><div class='del'>-	u32 reg, div;							\</div><div class='del'>-									\</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs);		\</div><div class='del'>-	div = (reg &amp; BM_CLKCTRL_##rs##_DIV) &gt;&gt; BP_CLKCTRL_##rs##_DIV;	\</div><div class='del'>-									\</div><div class='del'>-	if (!div)							\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-									\</div><div class='del'>-	if (clk == &amp;saif0_clk || clk == &amp;saif1_clk)			\</div><div class='del'>-		return clk_get_rate(clk-&gt;parent) &gt;&gt; 16 * div;		\</div><div class='del'>-	else								\</div><div class='del'>-		return clk_get_rate(clk-&gt;parent) / div;			\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_GET_RATE1(hbus_clk, HBUS)</div><div class='del'>-_CLK_GET_RATE1(xbus_clk, XBUS)</div><div class='del'>-_CLK_GET_RATE1(ssp0_clk, SSP0)</div><div class='del'>-_CLK_GET_RATE1(ssp1_clk, SSP1)</div><div class='del'>-_CLK_GET_RATE1(ssp2_clk, SSP2)</div><div class='del'>-_CLK_GET_RATE1(ssp3_clk, SSP3)</div><div class='del'>-_CLK_GET_RATE1(gpmi_clk, GPMI)</div><div class='del'>-_CLK_GET_RATE1(lcdif_clk, DIS_LCDIF)</div><div class='del'>-_CLK_GET_RATE1(saif0_clk, SAIF0)</div><div class='del'>-_CLK_GET_RATE1(saif1_clk, SAIF1)</div><div class='del'>-</div><div class='del'>-#define _CLK_GET_RATE_STUB(name)					\</div><div class='del'>-static unsigned long name##_get_rate(struct clk *clk)			\</div><div class='del'>-{									\</div><div class='del'>-	return clk_get_rate(clk-&gt;parent);				\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_GET_RATE_STUB(uart_clk)</div><div class='del'>-_CLK_GET_RATE_STUB(pwm_clk)</div><div class='del'>-_CLK_GET_RATE_STUB(can0_clk)</div><div class='del'>-_CLK_GET_RATE_STUB(can1_clk)</div><div class='del'>-_CLK_GET_RATE_STUB(fec_clk)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * clk_set_rate</div><div class='del'>- */</div><div class='del'>-/* fool compiler */</div><div class='del'>-#define BM_CLKCTRL_CPU_DIV	0</div><div class='del'>-#define BP_CLKCTRL_CPU_DIV	0</div><div class='del'>-#define BM_CLKCTRL_CPU_BUSY	0</div><div class='del'>-</div><div class='del'>-#define _CLK_SET_RATE(name, dr, fr, fs)					\</div><div class='del'>-static int name##_set_rate(struct clk *clk, unsigned long rate)		\</div><div class='del'>-{									\</div><div class='del'>-	u32 reg, bm_busy, div_max, d, f, div, frac;			\</div><div class='del'>-	unsigned long diff, parent_rate, calc_rate;			\</div><div class='del'>-									\</div><div class='del'>-	div_max = BM_CLKCTRL_##dr##_DIV &gt;&gt; BP_CLKCTRL_##dr##_DIV;	\</div><div class='del'>-	bm_busy = BM_CLKCTRL_##dr##_BUSY;				\</div><div class='del'>-									\</div><div class='del'>-	if (clk-&gt;parent == &amp;ref_xtal_clk) {				\</div><div class='del'>-		parent_rate = clk_get_rate(clk-&gt;parent);		\</div><div class='del'>-		div = DIV_ROUND_UP(parent_rate, rate);			\</div><div class='del'>-		if (clk == &amp;cpu_clk) {					\</div><div class='del'>-			div_max = BM_CLKCTRL_CPU_DIV_XTAL &gt;&gt;		\</div><div class='del'>-				BP_CLKCTRL_CPU_DIV_XTAL;		\</div><div class='del'>-			bm_busy = BM_CLKCTRL_CPU_BUSY_REF_XTAL;		\</div><div class='del'>-		}							\</div><div class='del'>-		if (div == 0 || div &gt; div_max)				\</div><div class='del'>-			return -EINVAL;					\</div><div class='del'>-	} else {							\</div><div class='del'>-		/*							\</div><div class='del'>-		 * hack alert: this block modifies clk-&gt;parent, too,	\</div><div class='del'>-		 * so the base to use it the grand parent.		\</div><div class='del'>-		 */							\</div><div class='del'>-		parent_rate = clk_get_rate(clk-&gt;parent-&gt;parent);	\</div><div class='del'>-		rate &gt;&gt;= PARENT_RATE_SHIFT;				\</div><div class='del'>-		parent_rate &gt;&gt;= PARENT_RATE_SHIFT;			\</div><div class='del'>-		diff = parent_rate;					\</div><div class='del'>-		div = frac = 1;						\</div><div class='del'>-		if (clk == &amp;cpu_clk) {					\</div><div class='del'>-			div_max = BM_CLKCTRL_CPU_DIV_CPU &gt;&gt;		\</div><div class='del'>-				BP_CLKCTRL_CPU_DIV_CPU;			\</div><div class='del'>-			bm_busy = BM_CLKCTRL_CPU_BUSY_REF_CPU;		\</div><div class='del'>-		}							\</div><div class='del'>-		for (d = 1; d &lt;= div_max; d++) {			\</div><div class='del'>-			f = parent_rate * 18 / d / rate;		\</div><div class='del'>-			if ((parent_rate * 18 / d) % rate)		\</div><div class='del'>-				f++;					\</div><div class='del'>-			if (f &lt; 18 || f &gt; 35)				\</div><div class='del'>-				continue;				\</div><div class='del'>-									\</div><div class='del'>-			calc_rate = parent_rate * 18 / f / d;		\</div><div class='del'>-			if (calc_rate &gt; rate)				\</div><div class='del'>-				continue;				\</div><div class='del'>-									\</div><div class='del'>-			if (rate - calc_rate &lt; diff) {			\</div><div class='del'>-				frac = f;				\</div><div class='del'>-				div = d;				\</div><div class='del'>-				diff = rate - calc_rate;		\</div><div class='del'>-			}						\</div><div class='del'>-									\</div><div class='del'>-			if (diff == 0)					\</div><div class='del'>-				break;					\</div><div class='del'>-		}							\</div><div class='del'>-									\</div><div class='del'>-		if (diff == parent_rate)				\</div><div class='del'>-			return -EINVAL;					\</div><div class='del'>-									\</div><div class='del'>-		reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##fr);	\</div><div class='del'>-		reg &amp;= ~BM_CLKCTRL_##fr##_##fs##FRAC;			\</div><div class='del'>-		reg |= frac &lt;&lt; BP_CLKCTRL_##fr##_##fs##FRAC;		\</div><div class='del'>-		__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##fr);	\</div><div class='del'>-	}								\</div><div class='del'>-									\</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr);		\</div><div class='del'>-	if (clk == &amp;cpu_clk) {						\</div><div class='del'>-		reg &amp;= ~BM_CLKCTRL_CPU_DIV_CPU;				\</div><div class='del'>-		reg |= div &lt;&lt; BP_CLKCTRL_CPU_DIV_CPU;			\</div><div class='del'>-	} else {							\</div><div class='del'>-		reg &amp;= ~BM_CLKCTRL_##dr##_DIV;				\</div><div class='del'>-		reg |= div &lt;&lt; BP_CLKCTRL_##dr##_DIV;			\</div><div class='del'>-		if (reg &amp; (1 &lt;&lt; clk-&gt;enable_shift)) {			\</div><div class='del'>-			pr_err("%s: clock is gated\n", __func__);	\</div><div class='del'>-			return -EINVAL;					\</div><div class='del'>-		}							\</div><div class='del'>-	}								\</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr);		\</div><div class='del'>-									\</div><div class='del'>-	return mxs_clkctrl_timeout(HW_CLKCTRL_##dr, bm_busy);		\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_SET_RATE(cpu_clk, CPU, FRAC0, CPU)</div><div class='del'>-_CLK_SET_RATE(ssp0_clk, SSP0, FRAC0, IO0)</div><div class='del'>-_CLK_SET_RATE(ssp1_clk, SSP1, FRAC0, IO0)</div><div class='del'>-_CLK_SET_RATE(ssp2_clk, SSP2, FRAC0, IO1)</div><div class='del'>-_CLK_SET_RATE(ssp3_clk, SSP3, FRAC0, IO1)</div><div class='del'>-_CLK_SET_RATE(lcdif_clk, DIS_LCDIF, FRAC1, PIX)</div><div class='del'>-_CLK_SET_RATE(gpmi_clk, GPMI, FRAC1, GPMI)</div><div class='del'>-</div><div class='del'>-#define _CLK_SET_RATE1(name, dr)					\</div><div class='del'>-static int name##_set_rate(struct clk *clk, unsigned long rate)		\</div><div class='del'>-{									\</div><div class='del'>-	u32 reg, div_max, div;						\</div><div class='del'>-	unsigned long parent_rate;					\</div><div class='del'>-									\</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);			\</div><div class='del'>-	div_max = BM_CLKCTRL_##dr##_DIV &gt;&gt; BP_CLKCTRL_##dr##_DIV;	\</div><div class='del'>-									\</div><div class='del'>-	div = DIV_ROUND_UP(parent_rate, rate);				\</div><div class='del'>-	if (div == 0 || div &gt; div_max)					\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-									\</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr);		\</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_##dr##_DIV;					\</div><div class='del'>-	reg |= div &lt;&lt; BP_CLKCTRL_##dr##_DIV;				\</div><div class='del'>-	if (reg &amp; (1 &lt;&lt; clk-&gt;enable_shift)) {				\</div><div class='del'>-		pr_err("%s: clock is gated\n", __func__);		\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-	}								\</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr);		\</div><div class='del'>-									\</div><div class='del'>-	return mxs_clkctrl_timeout(HW_CLKCTRL_##dr, BM_CLKCTRL_##dr##_BUSY);\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_SET_RATE1(xbus_clk, XBUS)</div><div class='del'>-</div><div class='del'>-/* saif clock uses 16 bits frac div */</div><div class='del'>-#define _CLK_SET_RATE_SAIF(name, rs)					\</div><div class='del'>-static int name##_set_rate(struct clk *clk, unsigned long rate)		\</div><div class='del'>-{									\</div><div class='del'>-	u16 div;							\</div><div class='del'>-	u32 reg;							\</div><div class='del'>-	u64 lrate;							\</div><div class='del'>-	unsigned long parent_rate;					\</div><div class='del'>-									\</div><div class='del'>-	parent_rate = clk_get_rate(clk-&gt;parent);			\</div><div class='del'>-	if (rate &gt; parent_rate)						\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-									\</div><div class='del'>-	lrate = (u64)rate &lt;&lt; 16;					\</div><div class='del'>-	do_div(lrate, parent_rate);					\</div><div class='del'>-	div = (u16)lrate;						\</div><div class='del'>-									\</div><div class='del'>-	if (!div)							\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-									\</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs);		\</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_##rs##_DIV;					\</div><div class='del'>-	reg |= div &lt;&lt; BP_CLKCTRL_##rs##_DIV;				\</div><div class='del'>-	if (reg &amp; (1 &lt;&lt; clk-&gt;enable_shift)) {				\</div><div class='del'>-		pr_err("%s: clock is gated\n", __func__);		\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-	}								\</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs);		\</div><div class='del'>-									\</div><div class='del'>-	return mxs_clkctrl_timeout(HW_CLKCTRL_##rs, BM_CLKCTRL_##rs##_BUSY);\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_SET_RATE_SAIF(saif0_clk, SAIF0)</div><div class='del'>-_CLK_SET_RATE_SAIF(saif1_clk, SAIF1)</div><div class='del'>-</div><div class='del'>-#define _CLK_SET_RATE_STUB(name)					\</div><div class='del'>-static int name##_set_rate(struct clk *clk, unsigned long rate)		\</div><div class='del'>-{									\</div><div class='del'>-	return -EINVAL;							\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_SET_RATE_STUB(emi_clk)</div><div class='del'>-_CLK_SET_RATE_STUB(uart_clk)</div><div class='del'>-_CLK_SET_RATE_STUB(pwm_clk)</div><div class='del'>-_CLK_SET_RATE_STUB(spdif_clk)</div><div class='del'>-_CLK_SET_RATE_STUB(clk32k_clk)</div><div class='del'>-_CLK_SET_RATE_STUB(can0_clk)</div><div class='del'>-_CLK_SET_RATE_STUB(can1_clk)</div><div class='del'>-_CLK_SET_RATE_STUB(fec_clk)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * clk_set_parent</div><div class='del'>- */</div><div class='del'>-#define _CLK_SET_PARENT(name, bit)					\</div><div class='del'>-static int name##_set_parent(struct clk *clk, struct clk *parent)	\</div><div class='del'>-{									\</div><div class='del'>-	if (parent != clk-&gt;parent) {					\</div><div class='del'>-		__raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit,		\</div><div class='del'>-			 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG);	\</div><div class='del'>-		clk-&gt;parent = parent;					\</div><div class='del'>-	}								\</div><div class='del'>-									\</div><div class='del'>-	return 0;							\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_SET_PARENT(cpu_clk, CPU)</div><div class='del'>-_CLK_SET_PARENT(emi_clk, EMI)</div><div class='del'>-_CLK_SET_PARENT(ssp0_clk, SSP0)</div><div class='del'>-_CLK_SET_PARENT(ssp1_clk, SSP1)</div><div class='del'>-_CLK_SET_PARENT(ssp2_clk, SSP2)</div><div class='del'>-_CLK_SET_PARENT(ssp3_clk, SSP3)</div><div class='del'>-_CLK_SET_PARENT(lcdif_clk, DIS_LCDIF)</div><div class='del'>-_CLK_SET_PARENT(gpmi_clk, GPMI)</div><div class='del'>-_CLK_SET_PARENT(saif0_clk, SAIF0)</div><div class='del'>-_CLK_SET_PARENT(saif1_clk, SAIF1)</div><div class='del'>-</div><div class='del'>-#define _CLK_SET_PARENT_STUB(name)					\</div><div class='del'>-static int name##_set_parent(struct clk *clk, struct clk *parent)	\</div><div class='del'>-{									\</div><div class='del'>-	if (parent != clk-&gt;parent)					\</div><div class='del'>-		return -EINVAL;						\</div><div class='del'>-	else								\</div><div class='del'>-		return 0;						\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-_CLK_SET_PARENT_STUB(pwm_clk)</div><div class='del'>-_CLK_SET_PARENT_STUB(uart_clk)</div><div class='del'>-_CLK_SET_PARENT_STUB(clk32k_clk)</div><div class='del'>-_CLK_SET_PARENT_STUB(spdif_clk)</div><div class='del'>-_CLK_SET_PARENT_STUB(fec_clk)</div><div class='del'>-_CLK_SET_PARENT_STUB(can0_clk)</div><div class='del'>-_CLK_SET_PARENT_STUB(can1_clk)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * clk definition</div><div class='del'>- */</div><div class='del'>-static struct clk cpu_clk = {</div><div class='del'>-	.get_rate = cpu_clk_get_rate,</div><div class='del'>-	.set_rate = cpu_clk_set_rate,</div><div class='del'>-	.set_parent = cpu_clk_set_parent,</div><div class='del'>-	.parent = &amp;ref_cpu_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk hbus_clk = {</div><div class='del'>-	.get_rate = hbus_clk_get_rate,</div><div class='del'>-	.parent = &amp;cpu_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk xbus_clk = {</div><div class='del'>-	.get_rate = xbus_clk_get_rate,</div><div class='del'>-	.set_rate = xbus_clk_set_rate,</div><div class='del'>-	.parent = &amp;ref_xtal_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk lradc_clk = {</div><div class='del'>-	.get_rate = lradc_clk_get_rate,</div><div class='del'>-	.parent = &amp;clk32k_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk rtc_clk = {</div><div class='del'>-	.get_rate = rtc_clk_get_rate,</div><div class='del'>-	.parent = &amp;ref_xtal_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* usb_clk gate is controlled in DIGCTRL other than CLKCTRL */</div><div class='del'>-static struct clk usb0_clk = {</div><div class='del'>-	.enable_reg = DIGCTRL_BASE_ADDR,</div><div class='del'>-	.enable_shift = 2,</div><div class='del'>-	.enable = _raw_clk_enable,</div><div class='del'>-	.disable = _raw_clk_disable,</div><div class='del'>-	.parent = &amp;pll0_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk usb1_clk = {</div><div class='del'>-	.enable_reg = DIGCTRL_BASE_ADDR,</div><div class='del'>-	.enable_shift = 16,</div><div class='del'>-	.enable = _raw_clk_enable,</div><div class='del'>-	.disable = _raw_clk_disable,</div><div class='del'>-	.parent = &amp;pll1_clk,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define _DEFINE_CLOCK(name, er, es, p)					\</div><div class='del'>-	static struct clk name = {					\</div><div class='del'>-		.enable_reg	= CLKCTRL_BASE_ADDR + HW_CLKCTRL_##er,	\</div><div class='del'>-		.enable_shift	= BP_CLKCTRL_##er##_##es,		\</div><div class='del'>-		.get_rate	= name##_get_rate,			\</div><div class='del'>-		.set_rate	= name##_set_rate,			\</div><div class='del'>-		.set_parent	= name##_set_parent,			\</div><div class='del'>-		.enable		= _raw_clk_enable,			\</div><div class='del'>-		.disable	= _raw_clk_disable,			\</div><div class='del'>-		.parent		= p,					\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-_DEFINE_CLOCK(emi_clk, EMI, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(ssp0_clk, SSP0, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(ssp1_clk, SSP1, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(ssp2_clk, SSP2, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(ssp3_clk, SSP3, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(lcdif_clk, DIS_LCDIF, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(gpmi_clk, GPMI, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(saif0_clk, SAIF0, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(saif1_clk, SAIF1, CLKGATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(can0_clk, FLEXCAN, STOP_CAN0, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(can1_clk, FLEXCAN, STOP_CAN1, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(pwm_clk, XTAL, PWM_CLK24M_GATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(uart_clk, XTAL, UART_CLK_GATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(clk32k_clk, XTAL, TIMROT_CLK32K_GATE, &amp;ref_xtal_clk);</div><div class='del'>-_DEFINE_CLOCK(spdif_clk, SPDIF, CLKGATE, &amp;pll0_clk);</div><div class='del'>-_DEFINE_CLOCK(fec_clk, ENET, DISABLE, &amp;hbus_clk);</div><div class='del'>-</div><div class='del'>-#define _REGISTER_CLOCK(d, n, c) \</div><div class='del'>-	{ \</div><div class='del'>-		.dev_id = d, \</div><div class='del'>-		.con_id = n, \</div><div class='del'>-		.clk = &amp;c, \</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-static struct clk_lookup lookups[] = {</div><div class='del'>-	/* for amba bus driver */</div><div class='del'>-	_REGISTER_CLOCK("duart", "apb_pclk", xbus_clk)</div><div class='del'>-	/* for amba-pl011 driver */</div><div class='del'>-	_REGISTER_CLOCK("duart", NULL, uart_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx28-gpmi-nand", NULL, gpmi_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-auart.0", NULL, uart_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-auart.1", NULL, uart_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-auart.2", NULL, uart_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-auart.3", NULL, uart_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-auart.4", NULL, uart_clk)</div><div class='del'>-	_REGISTER_CLOCK("rtc", NULL, rtc_clk)</div><div class='del'>-	_REGISTER_CLOCK("pll2", NULL, pll2_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-mmc.0", NULL, ssp0_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-mmc.1", NULL, ssp1_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-mmc.2", NULL, ssp2_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-mmc.3", NULL, ssp3_clk)</div><div class='del'>-	_REGISTER_CLOCK("flexcan.0", NULL, can0_clk)</div><div class='del'>-	_REGISTER_CLOCK("flexcan.1", NULL, can1_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "usb0", usb0_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "usb1", usb1_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.0", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.1", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.2", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.3", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.4", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.5", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.6", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-pwm.7", NULL, pwm_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "lradc", lradc_clk)</div><div class='del'>-	_REGISTER_CLOCK(NULL, "spdif", spdif_clk)</div><div class='del'>-	_REGISTER_CLOCK("imx28-fb", NULL, lcdif_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-saif.0", NULL, saif0_clk)</div><div class='del'>-	_REGISTER_CLOCK("mxs-saif.1", NULL, saif1_clk)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int clk_misc_init(void)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* Fix up parent per register setting */</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ);</div><div class='del'>-	cpu_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_CPU) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_cpu_clk;</div><div class='del'>-	emi_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_EMI) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_emi_clk;</div><div class='del'>-	ssp0_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_SSP0) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_io0_clk;</div><div class='del'>-	ssp1_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_SSP1) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_io0_clk;</div><div class='del'>-	ssp2_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_SSP2) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_io1_clk;</div><div class='del'>-	ssp3_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_SSP3) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_io1_clk;</div><div class='del'>-	lcdif_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_pix_clk;</div><div class='del'>-	gpmi_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_GPMI) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;ref_gpmi_clk;</div><div class='del'>-	saif0_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_SAIF0) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;pll0_clk;</div><div class='del'>-	saif1_clk.parent = (reg &amp; BM_CLKCTRL_CLKSEQ_BYPASS_SAIF1) ?</div><div class='del'>-			&amp;ref_xtal_clk : &amp;pll0_clk;</div><div class='del'>-</div><div class='del'>-	/* Use int div over frac when both are available */</div><div class='del'>-	__raw_writel(BM_CLKCTRL_CPU_DIV_XTAL_FRAC_EN,</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_CLR);</div><div class='del'>-	__raw_writel(BM_CLKCTRL_CPU_DIV_CPU_FRAC_EN,</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_CLR);</div><div class='del'>-	__raw_writel(BM_CLKCTRL_HBUS_DIV_FRAC_EN,</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_HBUS_CLR);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_XBUS);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_XBUS_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_XBUS);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SSP0);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_SSP0_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SSP0);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SSP1);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_SSP1_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SSP1);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SSP2);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_SSP2_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SSP2);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SSP3);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_SSP3_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SSP3);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_GPMI);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_GPMI_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_GPMI);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_DIS_LCDIF);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_DIS_LCDIF_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_DIS_LCDIF);</div><div class='del'>-</div><div class='del'>-	/* SAIF has to use frac div for functional operation */</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF0);</div><div class='del'>-	reg |= BM_CLKCTRL_SAIF0_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF0);</div><div class='del'>-</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF1);</div><div class='del'>-	reg |= BM_CLKCTRL_SAIF1_DIV_FRAC_EN;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF1);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set safe hbus clock divider. A divider of 3 ensure that</div><div class='del'>-	 * the Vddd voltage required for the cpu clock is sufficiently</div><div class='del'>-	 * high for the hbus clock.</div><div class='del'>-	 */</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_HBUS);</div><div class='del'>-	reg &amp;= BM_CLKCTRL_HBUS_DIV;</div><div class='del'>-	reg |= 3 &lt;&lt; BP_CLKCTRL_HBUS_DIV;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_HBUS);</div><div class='del'>-</div><div class='del'>-	ret = mxs_clkctrl_timeout(HW_CLKCTRL_HBUS, BM_CLKCTRL_HBUS_ASM_BUSY);</div><div class='del'>-</div><div class='del'>-	/* Gate off cpu clock in WFI for power saving */</div><div class='del'>-	__raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT,</div><div class='del'>-			CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Extra fec clock setting</div><div class='del'>-	 * The DENX M28 uses an external clock source</div><div class='del'>-	 * and the clock output must not be enabled</div><div class='del'>-	 */</div><div class='del'>-	if (!machine_is_m28evk()) {</div><div class='del'>-		reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);</div><div class='del'>-		reg &amp;= ~BM_CLKCTRL_ENET_SLEEP;</div><div class='del'>-		reg |= BM_CLKCTRL_ENET_CLK_OUT_EN;</div><div class='del'>-		__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * 480 MHz seems too high to be ssp clock source directly,</div><div class='del'>-	 * so set frac0 to get a 288 MHz ref_io0.</div><div class='del'>-	 */</div><div class='del'>-	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC0);</div><div class='del'>-	reg &amp;= ~BM_CLKCTRL_FRAC0_IO0FRAC;</div><div class='del'>-	reg |= 30 &lt;&lt; BP_CLKCTRL_FRAC0_IO0FRAC;</div><div class='del'>-	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC0);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init mx28_clocks_init(void)</div><div class='del'>-{</div><div class='del'>-	clk_misc_init();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * source ssp clock from ref_io0 than ref_xtal,</div><div class='del'>-	 * as ref_xtal only provides 24 MHz as maximum.</div><div class='del'>-	 */</div><div class='del'>-	clk_set_parent(&amp;ssp0_clk, &amp;ref_io0_clk);</div><div class='del'>-	clk_set_parent(&amp;ssp1_clk, &amp;ref_io0_clk);</div><div class='del'>-	clk_set_parent(&amp;ssp2_clk, &amp;ref_io1_clk);</div><div class='del'>-	clk_set_parent(&amp;ssp3_clk, &amp;ref_io1_clk);</div><div class='del'>-</div><div class='del'>-	clk_prepare_enable(&amp;cpu_clk);</div><div class='del'>-	clk_prepare_enable(&amp;hbus_clk);</div><div class='del'>-	clk_prepare_enable(&amp;xbus_clk);</div><div class='del'>-	clk_prepare_enable(&amp;emi_clk);</div><div class='del'>-	clk_prepare_enable(&amp;uart_clk);</div><div class='del'>-</div><div class='del'>-	clk_set_parent(&amp;lcdif_clk, &amp;ref_pix_clk);</div><div class='del'>-	clk_set_parent(&amp;saif0_clk, &amp;pll0_clk);</div><div class='del'>-	clk_set_parent(&amp;saif1_clk, &amp;pll0_clk);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set an initial clock rate for the saif internal logic to work</div><div class='del'>-	 * properly. This is important when working in EXTMASTER mode that</div><div class='del'>-	 * uses the other saif's BITCLK&amp;LRCLK but it still needs a basic</div><div class='del'>-	 * clock which should be fast enough for the internal logic.</div><div class='del'>-	 */</div><div class='del'>-	clk_set_rate(&amp;saif0_clk, 24000000);</div><div class='del'>-	clk_set_rate(&amp;saif1_clk, 24000000);</div><div class='del'>-</div><div class='del'>-	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='del'>-</div><div class='del'>-	mxs_timer_init(&amp;clk32k_clk, MX28_INT_TIMER0);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-mxs/clock.c b/arch/arm/mach-mxs/clock.c<br/>deleted file mode 100644<br/>index 97a6f4acc6cc..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/clock.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,211 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Based on arch/arm/plat-omap/clock.c</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2004 - 2005 Nokia corporation</div><div class='del'>- * Written by Tuukka Tikkanen &lt;tuukka.tikkanen@elektrobit.com&gt;</div><div class='del'>- * Modified for omap shared clock framework by Tony Lindgren &lt;tony@atomide.com&gt;</div><div class='del'>- * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='del'>- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation; either version 2</div><div class='del'>- * of the License, or (at your option) any later version.</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,</div><div class='del'>- * MA  02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* #define DEBUG */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/proc_fs.h&gt;</div><div class='del'>-#include &lt;linux/semaphore.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/clock.h&gt;</div><div class='del'>-</div><div class='del'>-static LIST_HEAD(clocks);</div><div class='del'>-static DEFINE_MUTEX(clocks_mutex);</div><div class='del'>-</div><div class='del'>-/*-------------------------------------------------------------------------</div><div class='del'>- * Standard clock functions defined in include/linux/clk.h</div><div class='del'>- *-------------------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-static void __clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (clk == NULL || IS_ERR(clk))</div><div class='del'>-		return;</div><div class='del'>-	WARN_ON(!clk-&gt;usecount);</div><div class='del'>-</div><div class='del'>-	if (!(--clk-&gt;usecount)) {</div><div class='del'>-		if (clk-&gt;disable)</div><div class='del'>-			clk-&gt;disable(clk);</div><div class='del'>-		__clk_disable(clk-&gt;parent);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (clk == NULL || IS_ERR(clk))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;usecount++ == 0) {</div><div class='del'>-		__clk_enable(clk-&gt;parent);</div><div class='del'>-</div><div class='del'>-		if (clk-&gt;enable)</div><div class='del'>-			clk-&gt;enable(clk);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The clk_enable/clk_disable could be called by drivers in atomic context,</div><div class='del'>- * so they should not really hold mutex.  Instead, clk_prepare/clk_unprepare</div><div class='del'>- * can hold a mutex, as the pair will only be called in non-atomic context.</div><div class='del'>- * Before migrating to common clk framework, we can have __clk_enable and</div><div class='del'>- * __clk_disable called in clk_prepare/clk_unprepare with mutex held and</div><div class='del'>- * leave clk_enable/clk_disable as the dummy functions.</div><div class='del'>- */</div><div class='del'>-int clk_prepare(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (clk == NULL || IS_ERR(clk))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;clocks_mutex);</div><div class='del'>-	ret = __clk_enable(clk);</div><div class='del'>-	mutex_unlock(&amp;clocks_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_prepare);</div><div class='del'>-</div><div class='del'>-void clk_unprepare(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (clk == NULL || IS_ERR(clk))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;clocks_mutex);</div><div class='del'>-	__clk_disable(clk);</div><div class='del'>-	mutex_unlock(&amp;clocks_mutex);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_unprepare);</div><div class='del'>-</div><div class='del'>-int clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_enable);</div><div class='del'>-</div><div class='del'>-void clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	/* nothing to do */</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_disable);</div><div class='del'>-</div><div class='del'>-/* Retrieve the *current* clock rate. If the clock itself</div><div class='del'>- * does not provide a special calculation routine, ask</div><div class='del'>- * its parent and so on, until one is able to return</div><div class='del'>- * a valid clock rate</div><div class='del'>- */</div><div class='del'>-unsigned long clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (clk == NULL || IS_ERR(clk))</div><div class='del'>-		return 0UL;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;get_rate)</div><div class='del'>-		return clk-&gt;get_rate(clk);</div><div class='del'>-</div><div class='del'>-	return clk_get_rate(clk-&gt;parent);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_get_rate);</div><div class='del'>-</div><div class='del'>-/* Round the requested clock rate to the nearest supported</div><div class='del'>- * rate that is less than or equal to the requested rate.</div><div class='del'>- * This is dependent on the clock's current parent.</div><div class='del'>- */</div><div class='del'>-long clk_round_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	if (clk == NULL || IS_ERR(clk) || !clk-&gt;round_rate)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return clk-&gt;round_rate(clk, rate);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_round_rate);</div><div class='del'>-</div><div class='del'>-/* Set the clock to the requested clock rate. The rate must</div><div class='del'>- * match a supported rate exactly based on what clk_round_rate returns</div><div class='del'>- */</div><div class='del'>-int clk_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	int ret = -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (clk == NULL || IS_ERR(clk) || clk-&gt;set_rate == NULL || rate == 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;clocks_mutex);</div><div class='del'>-	ret = clk-&gt;set_rate(clk, rate);</div><div class='del'>-	mutex_unlock(&amp;clocks_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_set_rate);</div><div class='del'>-</div><div class='del'>-/* Set the clock's parent to another clock source */</div><div class='del'>-int clk_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	int ret = -EINVAL;</div><div class='del'>-	struct clk *old;</div><div class='del'>-</div><div class='del'>-	if (clk == NULL || IS_ERR(clk) || parent == NULL ||</div><div class='del'>-	    IS_ERR(parent) || clk-&gt;set_parent == NULL)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;usecount)</div><div class='del'>-		clk_prepare_enable(parent);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;clocks_mutex);</div><div class='del'>-	ret = clk-&gt;set_parent(clk, parent);</div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		old = clk-&gt;parent;</div><div class='del'>-		clk-&gt;parent = parent;</div><div class='del'>-	} else {</div><div class='del'>-		old = parent;</div><div class='del'>-	}</div><div class='del'>-	mutex_unlock(&amp;clocks_mutex);</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;usecount)</div><div class='del'>-		clk_disable(old);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_set_parent);</div><div class='del'>-</div><div class='del'>-/* Retrieve the clock's parent clock source */</div><div class='del'>-struct clk *clk_get_parent(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	struct clk *ret = NULL;</div><div class='del'>-</div><div class='del'>-	if (clk == NULL || IS_ERR(clk))</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return clk-&gt;parent;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_get_parent);</div><div class='head'>diff --git a/arch/arm/mach-mxs/devices-mx23.h b/arch/arm/mach-mxs/devices-mx23.h<br/>index 4d1329d59287..9acdd6387047 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices-mx23.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/devices-mx23.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices-mx23.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices-mx23.h</a></div><div class='hunk'>@@ -11,10 +11,16 @@</div><div class='ctx'> #include &lt;mach/mx23.h&gt;</div><div class='ctx'> #include &lt;mach/devices-common.h&gt;</div><div class='ctx'> #include &lt;mach/mxsfb.h&gt;</div><div class='add'>+#include &lt;linux/amba/bus.h&gt;</div><div class='ctx'> </div><div class='del'>-extern const struct amba_device mx23_duart_device __initconst;</div><div class='del'>-#define mx23_add_duart() \</div><div class='del'>-	mxs_add_duart(&amp;mx23_duart_device)</div><div class='add'>+static inline int mx23_add_duart(void)</div><div class='add'>+{</div><div class='add'>+	struct amba_device *d;</div><div class='add'>+</div><div class='add'>+	d = amba_ahb_device_add(NULL, "duart", MX23_DUART_BASE_ADDR, SZ_8K,</div><div class='add'>+				MX23_INT_DUART, 0, 0, 0);</div><div class='add'>+	return IS_ERR(d) ? PTR_ERR(d) : 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> extern const struct mxs_auart_data mx23_auart_data[] __initconst;</div><div class='ctx'> #define mx23_add_auart(id)	mxs_add_auart(&amp;mx23_auart_data[id])</div><div class='head'>diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h<br/>index 9dbeae130842..84b2960df117 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices-mx28.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/devices-mx28.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices-mx28.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices-mx28.h</a></div><div class='hunk'>@@ -11,10 +11,16 @@</div><div class='ctx'> #include &lt;mach/mx28.h&gt;</div><div class='ctx'> #include &lt;mach/devices-common.h&gt;</div><div class='ctx'> #include &lt;mach/mxsfb.h&gt;</div><div class='add'>+#include &lt;linux/amba/bus.h&gt;</div><div class='ctx'> </div><div class='del'>-extern const struct amba_device mx28_duart_device __initconst;</div><div class='del'>-#define mx28_add_duart() \</div><div class='del'>-	mxs_add_duart(&amp;mx28_duart_device)</div><div class='add'>+static inline int mx28_add_duart(void)</div><div class='add'>+{</div><div class='add'>+	struct amba_device *d;</div><div class='add'>+</div><div class='add'>+	d = amba_ahb_device_add(NULL, "duart", MX28_DUART_BASE_ADDR, SZ_8K,</div><div class='add'>+				MX28_INT_DUART, 0, 0, 0);</div><div class='add'>+	return IS_ERR(d) ? PTR_ERR(d) : 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> extern const struct mxs_auart_data mx28_auart_data[] __initconst;</div><div class='ctx'> #define mx28_add_auart(id)	mxs_add_auart(&amp;mx28_auart_data[id])</div><div class='head'>diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c<br/>index 01faffec3064..cf50b5a66dda 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices.c</a></div><div class='hunk'>@@ -75,22 +75,6 @@ err:</div><div class='ctx'> 	return pdev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __init mxs_add_amba_device(const struct amba_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct amba_device *adev = amba_device_alloc(dev-&gt;dev.init_name,</div><div class='del'>-		dev-&gt;res.start, resource_size(&amp;dev-&gt;res));</div><div class='del'>-</div><div class='del'>-	if (!adev) {</div><div class='del'>-		pr_err("%s: failed to allocate memory", __func__);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	adev-&gt;irq[0] = dev-&gt;irq[0];</div><div class='del'>-	adev-&gt;irq[1] = dev-&gt;irq[1];</div><div class='del'>-</div><div class='del'>-	return amba_device_add(adev, &amp;iomem_resource);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct device mxs_apbh_bus = {</div><div class='ctx'> 	.init_name	= "mxs_apbh",</div><div class='ctx'> 	.parent         = &amp;platform_bus,</div><div class='head'>diff --git a/arch/arm/mach-mxs/devices/Kconfig b/arch/arm/mach-mxs/devices/Kconfig<br/>index b8913df4cfa2..19659de1c4e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/devices/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices/Kconfig</a></div><div class='hunk'>@@ -1,6 +1,5 @@</div><div class='ctx'> config MXS_HAVE_AMBA_DUART</div><div class='ctx'> 	bool</div><div class='del'>-	select ARM_AMBA</div><div class='ctx'> </div><div class='ctx'> config MXS_HAVE_PLATFORM_AUART</div><div class='ctx'> 	bool</div><div class='head'>diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile<br/>index c8f5c9541a30..5f72d9787444 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/devices/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices/Makefile</a></div><div class='hunk'>@@ -1,4 +1,3 @@</div><div class='del'>-obj-$(CONFIG_MXS_HAVE_AMBA_DUART) += amba-duart.o</div><div class='ctx'> obj-$(CONFIG_MXS_HAVE_PLATFORM_AUART) += platform-auart.o</div><div class='ctx'> obj-y += platform-dma.o</div><div class='ctx'> obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o</div><div class='head'>diff --git a/arch/arm/mach-mxs/devices/amba-duart.c b/arch/arm/mach-mxs/devices/amba-duart.c<br/>deleted file mode 100644<br/>index a5479f766046..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices/amba-duart.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/devices/amba-duart.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,40 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2009-2010 Pengutronix</div><div class='del'>- * Uwe Kleine-Koenig &lt;u.kleine-koenig@pengutronix.de&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it under</div><div class='del'>- * the terms of the GNU General Public License version 2 as published by the</div><div class='del'>- * Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;mach/mx23.h&gt;</div><div class='del'>-#include &lt;mach/mx28.h&gt;</div><div class='del'>-#include &lt;mach/devices-common.h&gt;</div><div class='del'>-</div><div class='del'>-#define MXS_AMBA_DUART_DEVICE(name, soc)			\</div><div class='del'>-const struct amba_device name##_device __initconst = {		\</div><div class='del'>-	.dev = {						\</div><div class='del'>-		.init_name = "duart",				\</div><div class='del'>-	},							\</div><div class='del'>-	.res = {						\</div><div class='del'>-		.start = soc ## _DUART_BASE_ADDR,		\</div><div class='del'>-		.end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1,	\</div><div class='del'>-		.flags = IORESOURCE_MEM,			\</div><div class='del'>-	},							\</div><div class='del'>-	.irq = {soc ## _INT_DUART},				\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SOC_IMX23</div><div class='del'>-MXS_AMBA_DUART_DEVICE(mx23_duart, MX23);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SOC_IMX28</div><div class='del'>-MXS_AMBA_DUART_DEVICE(mx28_duart, MX28);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-int __init mxs_add_duart(const struct amba_device *dev)</div><div class='del'>-{</div><div class='del'>-	return mxs_add_amba_device(dev);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-mxs/devices/platform-dma.c b/arch/arm/mach-mxs/devices/platform-dma.c<br/>index 6a0202b1016c..46824501de00 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices/platform-dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/devices/platform-dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices/platform-dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices/platform-dma.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;mach/mx28.h&gt;</div><div class='ctx'> #include &lt;mach/devices-common.h&gt;</div><div class='ctx'> </div><div class='del'>-static struct platform_device *__init mxs_add_dma(const char *devid,</div><div class='add'>+struct platform_device *__init mxs_add_dma(const char *devid,</div><div class='ctx'> 						resource_size_t base)</div><div class='ctx'> {</div><div class='ctx'> 	struct resource res[] = {</div><div class='hunk'>@@ -29,22 +29,3 @@ static struct platform_device *__init mxs_add_dma(const char *devid,</div><div class='ctx'> 				res, ARRAY_SIZE(res), NULL, 0,</div><div class='ctx'> 				DMA_BIT_MASK(32));</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static int __init mxs_add_mxs_dma(void)</div><div class='del'>-{</div><div class='del'>-	char *apbh = "mxs-dma-apbh";</div><div class='del'>-	char *apbx = "mxs-dma-apbx";</div><div class='del'>-</div><div class='del'>-	if (cpu_is_mx23()) {</div><div class='del'>-		mxs_add_dma(apbh, MX23_APBH_DMA_BASE_ADDR);</div><div class='del'>-		mxs_add_dma(apbx, MX23_APBX_DMA_BASE_ADDR);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cpu_is_mx28()) {</div><div class='del'>-		mxs_add_dma(apbh, MX28_APBH_DMA_BASE_ADDR);</div><div class='del'>-		mxs_add_dma(apbx, MX28_APBX_DMA_BASE_ADDR);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-arch_initcall(mxs_add_mxs_dma);</div><div class='head'>diff --git a/arch/arm/mach-mxs/devices/platform-gpio-mxs.c b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c<br/>index ed0885e414e0..cd99f19ec637 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices/platform-gpio-mxs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/devices/platform-gpio-mxs.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices/platform-gpio-mxs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices/platform-gpio-mxs.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;mach/devices-common.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct platform_device *__init mxs_add_gpio(</div><div class='del'>-	int id, resource_size_t iobase, int irq)</div><div class='add'>+	char *name, int id, resource_size_t iobase, int irq)</div><div class='ctx'> {</div><div class='ctx'> 	struct resource res[] = {</div><div class='ctx'> 		{</div><div class='hunk'>@@ -29,25 +29,5 @@ struct platform_device *__init mxs_add_gpio(</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	return platform_device_register_resndata(&amp;mxs_apbh_bus,</div><div class='del'>-			"gpio-mxs", id, res, ARRAY_SIZE(res), NULL, 0);</div><div class='add'>+			name, id, res, ARRAY_SIZE(res), NULL, 0);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static int __init mxs_add_mxs_gpio(void)</div><div class='del'>-{</div><div class='del'>-	if (cpu_is_mx23()) {</div><div class='del'>-		mxs_add_gpio(0, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO0);</div><div class='del'>-		mxs_add_gpio(1, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO1);</div><div class='del'>-		mxs_add_gpio(2, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO2);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cpu_is_mx28()) {</div><div class='del'>-		mxs_add_gpio(0, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO0);</div><div class='del'>-		mxs_add_gpio(1, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO1);</div><div class='del'>-		mxs_add_gpio(2, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO2);</div><div class='del'>-		mxs_add_gpio(3, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO3);</div><div class='del'>-		mxs_add_gpio(4, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO4);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-postcore_initcall(mxs_add_mxs_gpio);</div><div class='head'>diff --git a/arch/arm/mach-mxs/devices/platform-mxs-mmc.c b/arch/arm/mach-mxs/devices/platform-mxs-mmc.c<br/>index bef9d923f54e..b33c9d05c552 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices/platform-mxs-mmc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/devices/platform-mxs-mmc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/devices/platform-mxs-mmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/devices/platform-mxs-mmc.c</a></div><div class='hunk'>@@ -17,8 +17,9 @@</div><div class='ctx'> #include &lt;mach/mx28.h&gt;</div><div class='ctx'> #include &lt;mach/devices-common.h&gt;</div><div class='ctx'> </div><div class='del'>-#define mxs_mxs_mmc_data_entry_single(soc, _id, hwid)			\</div><div class='add'>+#define mxs_mxs_mmc_data_entry_single(soc, _devid, _id, hwid)		\</div><div class='ctx'> 	{								\</div><div class='add'>+		.devid = _devid,					\</div><div class='ctx'> 		.id = _id,						\</div><div class='ctx'> 		.iobase = soc ## _SSP ## hwid ## _BASE_ADDR,		\</div><div class='ctx'> 		.dma = soc ## _DMA_SSP ## hwid,				\</div><div class='hunk'>@@ -26,23 +27,23 @@</div><div class='ctx'> 		.irq_dma = soc ## _INT_SSP ## hwid ## _DMA,		\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#define mxs_mxs_mmc_data_entry(soc, _id, hwid)				\</div><div class='del'>-	[_id] = mxs_mxs_mmc_data_entry_single(soc, _id, hwid)</div><div class='add'>+#define mxs_mxs_mmc_data_entry(soc, _devid, _id, hwid)			\</div><div class='add'>+	[_id] = mxs_mxs_mmc_data_entry_single(soc, _devid, _id, hwid)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SOC_IMX23</div><div class='ctx'> const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst = {</div><div class='del'>-	mxs_mxs_mmc_data_entry(MX23, 0, 1),</div><div class='del'>-	mxs_mxs_mmc_data_entry(MX23, 1, 2),</div><div class='add'>+	mxs_mxs_mmc_data_entry(MX23, "imx23-mmc", 0, 1),</div><div class='add'>+	mxs_mxs_mmc_data_entry(MX23, "imx23-mmc", 1, 2),</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SOC_IMX28</div><div class='ctx'> const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst = {</div><div class='del'>-	mxs_mxs_mmc_data_entry(MX28, 0, 0),</div><div class='del'>-	mxs_mxs_mmc_data_entry(MX28, 1, 1),</div><div class='del'>-	mxs_mxs_mmc_data_entry(MX28, 2, 2),</div><div class='del'>-	mxs_mxs_mmc_data_entry(MX28, 3, 3),</div><div class='add'>+	mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 0, 0),</div><div class='add'>+	mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 1, 1),</div><div class='add'>+	mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 2, 2),</div><div class='add'>+	mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 3, 3),</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -70,6 +71,6 @@ struct platform_device *__init mxs_add_mxs_mmc(</div><div class='ctx'> 		},</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	return mxs_add_platform_device("mxs-mmc", data-&gt;id,</div><div class='add'>+	return mxs_add_platform_device(data-&gt;devid, data-&gt;id,</div><div class='ctx'> 			res, ARRAY_SIZE(res), pdata, sizeof(*pdata));</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-mxs/include/mach/clock.h b/arch/arm/mach-mxs/include/mach/clock.h<br/>deleted file mode 100644<br/>index 592c9ab5d760..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/include/mach/clock.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/include/mach/clock.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,62 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='del'>- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation; either version 2</div><div class='del'>- * of the License, or (at your option) any later version.</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,</div><div class='del'>- * MA  02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_MXS_CLOCK_H__</div><div class='del'>-#define __MACH_MXS_CLOCK_H__</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-</div><div class='del'>-struct module;</div><div class='del'>-</div><div class='del'>-struct clk {</div><div class='del'>-	int id;</div><div class='del'>-	/* Source clock this clk depends on */</div><div class='del'>-	struct clk *parent;</div><div class='del'>-	/* Reference count of clock enable/disable */</div><div class='del'>-	__s8 usecount;</div><div class='del'>-	/* Register bit position for clock's enable/disable control. */</div><div class='del'>-	u8 enable_shift;</div><div class='del'>-	/* Register address for clock's enable/disable control. */</div><div class='del'>-	void __iomem *enable_reg;</div><div class='del'>-	u32 flags;</div><div class='del'>-	/* get the current clock rate (always a fresh value) */</div><div class='del'>-	unsigned long (*get_rate) (struct clk *);</div><div class='del'>-	/* Function ptr to set the clock to a new rate. The rate must match a</div><div class='del'>-	   supported rate returned from round_rate. Leave blank if clock is not</div><div class='del'>-	   programmable */</div><div class='del'>-	int (*set_rate) (struct clk *, unsigned long);</div><div class='del'>-	/* Function ptr to round the requested clock rate to the nearest</div><div class='del'>-	   supported rate that is less than or equal to the requested rate. */</div><div class='del'>-	unsigned long (*round_rate) (struct clk *, unsigned long);</div><div class='del'>-	/* Function ptr to enable the clock. Leave blank if clock can not</div><div class='del'>-	   be gated. */</div><div class='del'>-	int (*enable) (struct clk *);</div><div class='del'>-	/* Function ptr to disable the clock. Leave blank if clock can not</div><div class='del'>-	   be gated. */</div><div class='del'>-	void (*disable) (struct clk *);</div><div class='del'>-	/* Function ptr to set the parent clock of the clock. */</div><div class='del'>-	int (*set_parent) (struct clk *, struct clk *);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int clk_register(struct clk *clk);</div><div class='del'>-void clk_unregister(struct clk *clk);</div><div class='del'>-</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='del'>-#endif /* __MACH_MXS_CLOCK_H__ */</div><div class='head'>diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h<br/>index c50c3ea28a9d..de6c7ba42544 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/include/mach/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/include/mach/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/include/mach/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/include/mach/common.h</a></div><div class='hunk'>@@ -11,26 +11,27 @@</div><div class='ctx'> #ifndef __MACH_MXS_COMMON_H__</div><div class='ctx'> #define __MACH_MXS_COMMON_H__</div><div class='ctx'> </div><div class='del'>-struct clk;</div><div class='del'>-</div><div class='ctx'> extern const u32 *mxs_get_ocotp(void);</div><div class='ctx'> extern int mxs_reset_block(void __iomem *);</div><div class='del'>-extern void mxs_timer_init(struct clk *, int);</div><div class='add'>+extern void mxs_timer_init(int);</div><div class='ctx'> extern void mxs_restart(char, const char *);</div><div class='ctx'> extern int mxs_saif_clkmux_select(unsigned int clkmux);</div><div class='ctx'> </div><div class='del'>-extern int mx23_register_gpios(void);</div><div class='add'>+extern void mx23_soc_init(void);</div><div class='ctx'> extern int mx23_clocks_init(void);</div><div class='ctx'> extern void mx23_map_io(void);</div><div class='ctx'> extern void mx23_init_irq(void);</div><div class='ctx'> </div><div class='del'>-extern int mx28_register_gpios(void);</div><div class='add'>+extern void mx28_soc_init(void);</div><div class='ctx'> extern int mx28_clocks_init(void);</div><div class='ctx'> extern void mx28_map_io(void);</div><div class='ctx'> extern void mx28_init_irq(void);</div><div class='ctx'> </div><div class='ctx'> extern void icoll_init_irq(void);</div><div class='ctx'> </div><div class='del'>-extern int mxs_clkctrl_timeout(unsigned int reg_offset, unsigned int mask);</div><div class='add'>+extern struct platform_device *mxs_add_dma(const char *devid,</div><div class='add'>+						resource_size_t base);</div><div class='add'>+extern struct platform_device *mxs_add_gpio(char *name, int id,</div><div class='add'>+					    resource_size_t iobase, int irq);</div><div class='ctx'> </div><div class='ctx'> #endif /* __MACH_MXS_COMMON_H__ */</div><div class='head'>diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h<br/>index f2e383955d88..e8b1d958240b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/include/mach/devices-common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/include/mach/devices-common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/include/mach/devices-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/include/mach/devices-common.h</a></div><div class='hunk'>@@ -27,11 +27,6 @@ static inline struct platform_device *mxs_add_platform_device(</div><div class='ctx'> 			name, id, res, num_resources, data, size_data, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __init mxs_add_amba_device(const struct amba_device *dev);</div><div class='del'>-</div><div class='del'>-/* duart */</div><div class='del'>-int __init mxs_add_duart(const struct amba_device *dev);</div><div class='del'>-</div><div class='ctx'> /* auart */</div><div class='ctx'> struct mxs_auart_data {</div><div class='ctx'> 	int id;</div><div class='hunk'>@@ -87,8 +82,9 @@ struct platform_device * __init mxs_add_mxs_i2c(</div><div class='ctx'> 		const struct mxs_mxs_i2c_data *data);</div><div class='ctx'> </div><div class='ctx'> /* mmc */</div><div class='del'>-#include &lt;mach/mmc.h&gt;</div><div class='add'>+#include &lt;linux/mmc/mxs-mmc.h&gt;</div><div class='ctx'> struct mxs_mxs_mmc_data {</div><div class='add'>+	const char *devid;</div><div class='ctx'> 	int id;</div><div class='ctx'> 	resource_size_t iobase;</div><div class='ctx'> 	resource_size_t dma;</div><div class='head'>diff --git a/arch/arm/mach-mxs/mach-apx4devkit.c b/arch/arm/mach-mxs/mach-apx4devkit.c<br/>index 48a7fab571a6..5e90b9dcdef8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-apx4devkit.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/mach-apx4devkit.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-apx4devkit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-apx4devkit.c</a></div><div class='hunk'>@@ -207,6 +207,8 @@ static int apx4devkit_phy_fixup(struct phy_device *phy)</div><div class='ctx'> </div><div class='ctx'> static void __init apx4devkit_init(void)</div><div class='ctx'> {</div><div class='add'>+	mx28_soc_init();</div><div class='add'>+</div><div class='ctx'> 	mxs_iomux_setup_multiple_pads(apx4devkit_pads,</div><div class='ctx'> 			ARRAY_SIZE(apx4devkit_pads));</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c<br/>index 06d79963611c..4c00c879b893 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-m28evk.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/mach-m28evk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-m28evk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-m28evk.c</a></div><div class='hunk'>@@ -319,6 +319,8 @@ static struct mxs_mmc_platform_data m28evk_mmc_pdata[] __initdata = {</div><div class='ctx'> </div><div class='ctx'> static void __init m28evk_init(void)</div><div class='ctx'> {</div><div class='add'>+	mx28_soc_init();</div><div class='add'>+</div><div class='ctx'> 	mxs_iomux_setup_multiple_pads(m28evk_pads, ARRAY_SIZE(m28evk_pads));</div><div class='ctx'> </div><div class='ctx'> 	mx28_add_duart();</div><div class='head'>diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c<br/>index 5ea1c57d2606..e7272a41939d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-mx23evk.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/mach-mx23evk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-mx23evk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-mx23evk.c</a></div><div class='hunk'>@@ -141,6 +141,8 @@ static void __init mx23evk_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	mx23_soc_init();</div><div class='add'>+</div><div class='ctx'> 	mxs_iomux_setup_multiple_pads(mx23evk_pads, ARRAY_SIZE(mx23evk_pads));</div><div class='ctx'> </div><div class='ctx'> 	mx23_add_duart();</div><div class='head'>diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c<br/>index e386c142f93c..dafd48e86c8c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-mx28evk.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/mach-mx28evk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-mx28evk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-mx28evk.c</a></div><div class='hunk'>@@ -226,7 +226,7 @@ static void __init mx28evk_fec_reset(void)</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable fec phy clock */</div><div class='del'>-	clk = clk_get_sys("pll2", NULL);</div><div class='add'>+	clk = clk_get_sys("enet_out", NULL);</div><div class='ctx'> 	if (!IS_ERR(clk))</div><div class='ctx'> 		clk_prepare_enable(clk);</div><div class='ctx'> </div><div class='hunk'>@@ -413,6 +413,8 @@ static void __init mx28evk_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	mx28_soc_init();</div><div class='add'>+</div><div class='ctx'> 	mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));</div><div class='ctx'> </div><div class='ctx'> 	mx28_add_duart();</div><div class='head'>diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c<br/>new file mode 100644<br/>index 000000000000..8cac94b33020<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-mxs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-mxs.c</a></div><div class='hunk'>@@ -0,0 +1,121 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2012 Linaro Ltd.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/mach/time.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+</div><div class='add'>+static int __init mxs_icoll_add_irq_domain(struct device_node *np,</div><div class='add'>+				struct device_node *interrupt_parent)</div><div class='add'>+{</div><div class='add'>+	irq_domain_add_legacy(np, 128, 0, 0, &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init mxs_gpio_add_irq_domain(struct device_node *np,</div><div class='add'>+				struct device_node *interrupt_parent)</div><div class='add'>+{</div><div class='add'>+	static int gpio_irq_base = MXS_GPIO_IRQ_START;</div><div class='add'>+</div><div class='add'>+	irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+	gpio_irq_base += 32;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mxs_irq_match[] __initconst = {</div><div class='add'>+	{ .compatible = "fsl,mxs-icoll", .data = mxs_icoll_add_irq_domain, },</div><div class='add'>+	{ .compatible = "fsl,mxs-gpio", .data = mxs_gpio_add_irq_domain, },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init mxs_dt_init_irq(void)</div><div class='add'>+{</div><div class='add'>+	icoll_init_irq();</div><div class='add'>+	of_irq_init(mxs_irq_match);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init imx23_timer_init(void)</div><div class='add'>+{</div><div class='add'>+	mx23_clocks_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sys_timer imx23_timer = {</div><div class='add'>+	.init = imx23_timer_init,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init imx28_timer_init(void)</div><div class='add'>+{</div><div class='add'>+	mx28_clocks_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sys_timer imx28_timer = {</div><div class='add'>+	.init = imx28_timer_init,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init imx28_evk_init(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk;</div><div class='add'>+</div><div class='add'>+	/* Enable fec phy clock */</div><div class='add'>+	clk = clk_get_sys("enet_out", NULL);</div><div class='add'>+	if (!IS_ERR(clk))</div><div class='add'>+		clk_prepare_enable(clk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init mxs_machine_init(void)</div><div class='add'>+{</div><div class='add'>+	if (of_machine_is_compatible("fsl,imx28-evk"))</div><div class='add'>+		imx28_evk_init();</div><div class='add'>+</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='add'>+				NULL, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *imx23_dt_compat[] __initdata = {</div><div class='add'>+	"fsl,imx23-evk",</div><div class='add'>+	"fsl,imx23",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *imx28_dt_compat[] __initdata = {</div><div class='add'>+	"fsl,imx28-evk",</div><div class='add'>+	"fsl,imx28",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")</div><div class='add'>+	.map_io		= mx23_map_io,</div><div class='add'>+	.init_irq	= mxs_dt_init_irq,</div><div class='add'>+	.timer		= &amp;imx23_timer,</div><div class='add'>+	.init_machine	= mxs_machine_init,</div><div class='add'>+	.dt_compat	= imx23_dt_compat,</div><div class='add'>+	.restart	= mxs_restart,</div><div class='add'>+MACHINE_END</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")</div><div class='add'>+	.map_io		= mx28_map_io,</div><div class='add'>+	.init_irq	= mxs_dt_init_irq,</div><div class='add'>+	.timer		= &amp;imx28_timer,</div><div class='add'>+	.init_machine	= mxs_machine_init,</div><div class='add'>+	.dt_compat	= imx28_dt_compat,</div><div class='add'>+	.restart	= mxs_restart,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c<br/>index a626c07b8713..6548965e4a76 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-stmp378x_devb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/mach-stmp378x_devb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-stmp378x_devb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-stmp378x_devb.c</a></div><div class='hunk'>@@ -85,6 +85,8 @@ static void __init stmp378x_dvb_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	mx23_soc_init();</div><div class='add'>+</div><div class='ctx'> 	mxs_iomux_setup_multiple_pads(stmp378x_dvb_pads,</div><div class='ctx'> 			ARRAY_SIZE(stmp378x_dvb_pads));</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c<br/>index 2c0862e655ee..8837029de1a4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-tx28.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/mach-tx28.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/mach-tx28.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mach-tx28.c</a></div><div class='hunk'>@@ -146,6 +146,8 @@ static struct mxs_mmc_platform_data tx28_mmc0_pdata __initdata = {</div><div class='ctx'> </div><div class='ctx'> static void __init tx28_stk5v3_init(void)</div><div class='ctx'> {</div><div class='add'>+	mx28_soc_init();</div><div class='add'>+</div><div class='ctx'> 	mxs_iomux_setup_multiple_pads(tx28_stk5v3_pads,</div><div class='ctx'> 			ARRAY_SIZE(tx28_stk5v3_pads));</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-mxs/mm.c b/arch/arm/mach-mxs/mm.c<br/>index 50af5ceebf6d..dccb67a9e7c4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/mm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/mm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/mm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/mm.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -61,3 +62,29 @@ void __init mx28_init_irq(void)</div><div class='ctx'> {</div><div class='ctx'> 	icoll_init_irq();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __init mx23_soc_init(void)</div><div class='add'>+{</div><div class='add'>+	pinctrl_provide_dummies();</div><div class='add'>+</div><div class='add'>+	mxs_add_dma("imx23-dma-apbh", MX23_APBH_DMA_BASE_ADDR);</div><div class='add'>+	mxs_add_dma("imx23-dma-apbx", MX23_APBX_DMA_BASE_ADDR);</div><div class='add'>+</div><div class='add'>+	mxs_add_gpio("imx23-gpio", 0, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO0);</div><div class='add'>+	mxs_add_gpio("imx23-gpio", 1, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO1);</div><div class='add'>+	mxs_add_gpio("imx23-gpio", 2, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init mx28_soc_init(void)</div><div class='add'>+{</div><div class='add'>+	pinctrl_provide_dummies();</div><div class='add'>+</div><div class='add'>+	mxs_add_dma("imx28-dma-apbh", MX23_APBH_DMA_BASE_ADDR);</div><div class='add'>+	mxs_add_dma("imx28-dma-apbx", MX23_APBX_DMA_BASE_ADDR);</div><div class='add'>+</div><div class='add'>+	mxs_add_gpio("imx28-gpio", 0, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO0);</div><div class='add'>+	mxs_add_gpio("imx28-gpio", 1, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO1);</div><div class='add'>+	mxs_add_gpio("imx28-gpio", 2, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO2);</div><div class='add'>+	mxs_add_gpio("imx28-gpio", 3, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO3);</div><div class='add'>+	mxs_add_gpio("imx28-gpio", 4, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO4);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-mxs/regs-clkctrl-mx23.h b/arch/arm/mach-mxs/regs-clkctrl-mx23.h<br/>deleted file mode 100644<br/>index 0ea5c9d0e2b2..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/regs-clkctrl-mx23.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/regs-clkctrl-mx23.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,331 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Freescale CLKCTRL Register Definitions</div><div class='del'>- *</div><div class='del'>- * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.</div><div class='del'>- * Copyright 2008-2010 Freescale Semiconductor, Inc.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA</div><div class='del'>- *</div><div class='del'>- * This file is created by xml file. Don't Edit it.</div><div class='del'>- *</div><div class='del'>- * Xml Revision: 1.48</div><div class='del'>- * Template revision: 26195</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __REGS_CLKCTRL_MX23_H__</div><div class='del'>-#define __REGS_CLKCTRL_MX23_H__</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_PLLCTRL0	(0x00000000)</div><div class='del'>-#define HW_CLKCTRL_PLLCTRL0_SET	(0x00000004)</div><div class='del'>-#define HW_CLKCTRL_PLLCTRL0_CLR	(0x00000008)</div><div class='del'>-#define HW_CLKCTRL_PLLCTRL0_TOG	(0x0000000c)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_PLLCTRL0_LFR_SEL	28</div><div class='del'>-#define BM_CLKCTRL_PLLCTRL0_LFR_SEL	0x30000000</div><div class='del'>-#define BF_CLKCTRL_PLLCTRL0_LFR_SEL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 28) &amp; BM_CLKCTRL_PLLCTRL0_LFR_SEL)</div><div class='del'>-#define BV_CLKCTRL_PLLCTRL0_LFR_SEL__DEFAULT   0x0</div><div class='del'>-#define BV_CLKCTRL_PLLCTRL0_LFR_SEL__TIMES_2   0x1</div><div class='del'>-#define BV_CLKCTRL_PLLCTRL0_LFR_SEL__TIMES_05  0x2</div><div class='del'>-#define BV_CLKCTRL_PLLCTRL0_LFR_SEL__UNDEFINED 0x3</div><div class='del'>-#define BP_CLKCTRL_PLLCTRL0_CP_SEL	24</div><div class='del'>-#define BM_CLKCTRL_PLLCTRL0_CP_SEL	0x03000000</div><div class='del'>-#define BF_CLKCTRL_PLLCTRL0_CP_SEL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 24) &amp; BM_CLKCTRL_PLLCTRL0_CP_SEL)</div><div class='del'>-#define BV_CLKCTRL_PLLCTRL0_CP_SEL__DEFAULT   0x0</div><div class='del'>-#define BV_CLKCTRL_PLLCTRL0_CP_SEL__TIMES_2   0x1</div><div class='del'>-#define BV_CLKCTRL_PLLCTRL0_CP_SEL__TIMES_05  0x2</div><div class='del'>-#define BV_CLKCTRL_PLLCTRL0_CP_SEL__UNDEFINED 0x3</div><div class='del'>-#define BP_CLKCTRL_PLLCTRL0_DIV_SEL	20</div><div class='del'>-#define BM_CLKCTRL_PLLCTRL0_DIV_SEL	0x00300000</div><div class='del'>-#define BF_CLKCTRL_PLLCTRL0_DIV_SEL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 20) &amp; BM_CLKCTRL_PLLCTRL0_DIV_SEL)</div><div class='del'>-#define BV_CLKCTRL_PLLCTRL0_DIV_SEL__DEFAULT   0x0</div><div class='del'>-#define BV_CLKCTRL_PLLCTRL0_DIV_SEL__LOWER     0x1</div><div class='del'>-#define BV_CLKCTRL_PLLCTRL0_DIV_SEL__LOWEST    0x2</div><div class='del'>-#define BV_CLKCTRL_PLLCTRL0_DIV_SEL__UNDEFINED 0x3</div><div class='del'>-#define BM_CLKCTRL_PLLCTRL0_EN_USB_CLKS	0x00040000</div><div class='del'>-#define BM_CLKCTRL_PLLCTRL0_POWER	0x00010000</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_PLLCTRL1	(0x00000010)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_PLLCTRL1_LOCK	0x80000000</div><div class='del'>-#define BM_CLKCTRL_PLLCTRL1_FORCE_LOCK	0x40000000</div><div class='del'>-#define BP_CLKCTRL_PLLCTRL1_LOCK_COUNT	0</div><div class='del'>-#define BM_CLKCTRL_PLLCTRL1_LOCK_COUNT	0x0000FFFF</div><div class='del'>-#define BF_CLKCTRL_PLLCTRL1_LOCK_COUNT(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_PLLCTRL1_LOCK_COUNT)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_CPU	(0x00000020)</div><div class='del'>-#define HW_CLKCTRL_CPU_SET	(0x00000024)</div><div class='del'>-#define HW_CLKCTRL_CPU_CLR	(0x00000028)</div><div class='del'>-#define HW_CLKCTRL_CPU_TOG	(0x0000002c)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_CPU_BUSY_REF_XTAL	0x20000000</div><div class='del'>-#define BM_CLKCTRL_CPU_BUSY_REF_CPU	0x10000000</div><div class='del'>-#define BM_CLKCTRL_CPU_DIV_XTAL_FRAC_EN	0x04000000</div><div class='del'>-#define BP_CLKCTRL_CPU_DIV_XTAL	16</div><div class='del'>-#define BM_CLKCTRL_CPU_DIV_XTAL	0x03FF0000</div><div class='del'>-#define BF_CLKCTRL_CPU_DIV_XTAL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 16) &amp; BM_CLKCTRL_CPU_DIV_XTAL)</div><div class='del'>-#define BM_CLKCTRL_CPU_INTERRUPT_WAIT	0x00001000</div><div class='del'>-#define BM_CLKCTRL_CPU_DIV_CPU_FRAC_EN	0x00000400</div><div class='del'>-#define BP_CLKCTRL_CPU_DIV_CPU	0</div><div class='del'>-#define BM_CLKCTRL_CPU_DIV_CPU	0x0000003F</div><div class='del'>-#define BF_CLKCTRL_CPU_DIV_CPU(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_CPU_DIV_CPU)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_HBUS	(0x00000030)</div><div class='del'>-#define HW_CLKCTRL_HBUS_SET	(0x00000034)</div><div class='del'>-#define HW_CLKCTRL_HBUS_CLR	(0x00000038)</div><div class='del'>-#define HW_CLKCTRL_HBUS_TOG	(0x0000003c)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_HBUS_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_DCP_AS_ENABLE	0x10000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_PXP_AS_ENABLE	0x08000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_APBHDMA_AS_ENABLE	0x04000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_APBXDMA_AS_ENABLE	0x02000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_TRAFFIC_JAM_AS_ENABLE	0x01000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_TRAFFIC_AS_ENABLE	0x00800000</div><div class='del'>-#define BM_CLKCTRL_HBUS_CPU_DATA_AS_ENABLE	0x00400000</div><div class='del'>-#define BM_CLKCTRL_HBUS_CPU_INSTR_AS_ENABLE	0x00200000</div><div class='del'>-#define BM_CLKCTRL_HBUS_AUTO_SLOW_MODE	0x00100000</div><div class='del'>-#define BP_CLKCTRL_HBUS_SLOW_DIV	16</div><div class='del'>-#define BM_CLKCTRL_HBUS_SLOW_DIV	0x00070000</div><div class='del'>-#define BF_CLKCTRL_HBUS_SLOW_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 16) &amp; BM_CLKCTRL_HBUS_SLOW_DIV)</div><div class='del'>-#define BV_CLKCTRL_HBUS_SLOW_DIV__BY1  0x0</div><div class='del'>-#define BV_CLKCTRL_HBUS_SLOW_DIV__BY2  0x1</div><div class='del'>-#define BV_CLKCTRL_HBUS_SLOW_DIV__BY4  0x2</div><div class='del'>-#define BV_CLKCTRL_HBUS_SLOW_DIV__BY8  0x3</div><div class='del'>-#define BV_CLKCTRL_HBUS_SLOW_DIV__BY16 0x4</div><div class='del'>-#define BV_CLKCTRL_HBUS_SLOW_DIV__BY32 0x5</div><div class='del'>-#define BM_CLKCTRL_HBUS_DIV_FRAC_EN	0x00000020</div><div class='del'>-#define BP_CLKCTRL_HBUS_DIV	0</div><div class='del'>-#define BM_CLKCTRL_HBUS_DIV	0x0000001F</div><div class='del'>-#define BF_CLKCTRL_HBUS_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_HBUS_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_XBUS	(0x00000040)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_XBUS_BUSY	0x80000000</div><div class='del'>-#define BM_CLKCTRL_XBUS_DIV_FRAC_EN	0x00000400</div><div class='del'>-#define BP_CLKCTRL_XBUS_DIV	0</div><div class='del'>-#define BM_CLKCTRL_XBUS_DIV	0x000003FF</div><div class='del'>-#define BF_CLKCTRL_XBUS_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_XBUS_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_XTAL	(0x00000050)</div><div class='del'>-#define HW_CLKCTRL_XTAL_SET	(0x00000054)</div><div class='del'>-#define HW_CLKCTRL_XTAL_CLR	(0x00000058)</div><div class='del'>-#define HW_CLKCTRL_XTAL_TOG	(0x0000005c)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_XTAL_UART_CLK_GATE	31</div><div class='del'>-#define BM_CLKCTRL_XTAL_UART_CLK_GATE	0x80000000</div><div class='del'>-#define BP_CLKCTRL_XTAL_FILT_CLK24M_GATE	30</div><div class='del'>-#define BM_CLKCTRL_XTAL_FILT_CLK24M_GATE	0x40000000</div><div class='del'>-#define BP_CLKCTRL_XTAL_PWM_CLK24M_GATE	29</div><div class='del'>-#define BM_CLKCTRL_XTAL_PWM_CLK24M_GATE	0x20000000</div><div class='del'>-#define BM_CLKCTRL_XTAL_DRI_CLK24M_GATE	0x10000000</div><div class='del'>-#define BM_CLKCTRL_XTAL_DIGCTRL_CLK1M_GATE	0x08000000</div><div class='del'>-#define BP_CLKCTRL_XTAL_TIMROT_CLK32K_GATE	26</div><div class='del'>-#define BM_CLKCTRL_XTAL_TIMROT_CLK32K_GATE	0x04000000</div><div class='del'>-#define BP_CLKCTRL_XTAL_DIV_UART	0</div><div class='del'>-#define BM_CLKCTRL_XTAL_DIV_UART	0x00000003</div><div class='del'>-#define BF_CLKCTRL_XTAL_DIV_UART(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_XTAL_DIV_UART)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_PIX	(0x00000060)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_PIX_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_PIX_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_PIX_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_PIX_DIV_FRAC_EN	0x00001000</div><div class='del'>-#define BP_CLKCTRL_PIX_DIV	0</div><div class='del'>-#define BM_CLKCTRL_PIX_DIV	0x00000FFF</div><div class='del'>-#define BF_CLKCTRL_PIX_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_PIX_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_SSP	(0x00000070)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_SSP_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_SSP_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_SSP_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_SSP_DIV_FRAC_EN	0x00000200</div><div class='del'>-#define BP_CLKCTRL_SSP_DIV	0</div><div class='del'>-#define BM_CLKCTRL_SSP_DIV	0x000001FF</div><div class='del'>-#define BF_CLKCTRL_SSP_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_SSP_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_GPMI	(0x00000080)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_GPMI_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_GPMI_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_GPMI_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_GPMI_DIV_FRAC_EN	0x00000400</div><div class='del'>-#define BP_CLKCTRL_GPMI_DIV	0</div><div class='del'>-#define BM_CLKCTRL_GPMI_DIV	0x000003FF</div><div class='del'>-#define BF_CLKCTRL_GPMI_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_GPMI_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_SPDIF	(0x00000090)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_SPDIF_CLKGATE	0x80000000</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_EMI	(0x000000a0)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_EMI_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_EMI_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_EMI_SYNC_MODE_EN	0x40000000</div><div class='del'>-#define BM_CLKCTRL_EMI_BUSY_REF_XTAL	0x20000000</div><div class='del'>-#define BM_CLKCTRL_EMI_BUSY_REF_EMI	0x10000000</div><div class='del'>-#define BM_CLKCTRL_EMI_BUSY_REF_CPU	0x08000000</div><div class='del'>-#define BM_CLKCTRL_EMI_BUSY_SYNC_MODE	0x04000000</div><div class='del'>-#define BM_CLKCTRL_EMI_BUSY_DCC_RESYNC	0x00020000</div><div class='del'>-#define BM_CLKCTRL_EMI_DCC_RESYNC_ENABLE	0x00010000</div><div class='del'>-#define BP_CLKCTRL_EMI_DIV_XTAL	8</div><div class='del'>-#define BM_CLKCTRL_EMI_DIV_XTAL	0x00000F00</div><div class='del'>-#define BF_CLKCTRL_EMI_DIV_XTAL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 8) &amp; BM_CLKCTRL_EMI_DIV_XTAL)</div><div class='del'>-#define BP_CLKCTRL_EMI_DIV_EMI	0</div><div class='del'>-#define BM_CLKCTRL_EMI_DIV_EMI	0x0000003F</div><div class='del'>-#define BF_CLKCTRL_EMI_DIV_EMI(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_EMI_DIV_EMI)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_IR	(0x000000b0)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_IR_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_IR_AUTO_DIV	0x20000000</div><div class='del'>-#define BM_CLKCTRL_IR_IR_BUSY	0x10000000</div><div class='del'>-#define BM_CLKCTRL_IR_IROV_BUSY	0x08000000</div><div class='del'>-#define BP_CLKCTRL_IR_IROV_DIV	16</div><div class='del'>-#define BM_CLKCTRL_IR_IROV_DIV	0x01FF0000</div><div class='del'>-#define BF_CLKCTRL_IR_IROV_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 16) &amp; BM_CLKCTRL_IR_IROV_DIV)</div><div class='del'>-#define BP_CLKCTRL_IR_IR_DIV	0</div><div class='del'>-#define BM_CLKCTRL_IR_IR_DIV	0x000003FF</div><div class='del'>-#define BF_CLKCTRL_IR_IR_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_IR_IR_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_SAIF	(0x000000c0)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_SAIF_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_SAIF_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_SAIF_DIV_FRAC_EN	0x00010000</div><div class='del'>-#define BP_CLKCTRL_SAIF_DIV	0</div><div class='del'>-#define BM_CLKCTRL_SAIF_DIV	0x0000FFFF</div><div class='del'>-#define BF_CLKCTRL_SAIF_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_SAIF_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_TV	(0x000000d0)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_TV_CLK_TV108M_GATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_TV_CLK_TV_GATE	0x40000000</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_ETM	(0x000000e0)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_ETM_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_ETM_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_ETM_DIV_FRAC_EN	0x00000040</div><div class='del'>-#define BP_CLKCTRL_ETM_DIV	0</div><div class='del'>-#define BM_CLKCTRL_ETM_DIV	0x0000003F</div><div class='del'>-#define BF_CLKCTRL_ETM_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_ETM_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_FRAC	(0x000000f0)</div><div class='del'>-#define HW_CLKCTRL_FRAC_SET	(0x000000f4)</div><div class='del'>-#define HW_CLKCTRL_FRAC_CLR	(0x000000f8)</div><div class='del'>-#define HW_CLKCTRL_FRAC_TOG	(0x000000fc)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_FRAC_CLKGATEIO	31</div><div class='del'>-#define BM_CLKCTRL_FRAC_CLKGATEIO	0x80000000</div><div class='del'>-#define BM_CLKCTRL_FRAC_IO_STABLE	0x40000000</div><div class='del'>-#define BP_CLKCTRL_FRAC_IOFRAC	24</div><div class='del'>-#define BM_CLKCTRL_FRAC_IOFRAC	0x3F000000</div><div class='del'>-#define BF_CLKCTRL_FRAC_IOFRAC(v)  \</div><div class='del'>-		(((v) &lt;&lt; 24) &amp; BM_CLKCTRL_FRAC_IOFRAC)</div><div class='del'>-#define BP_CLKCTRL_FRAC_CLKGATEPIX	23</div><div class='del'>-#define BM_CLKCTRL_FRAC_CLKGATEPIX	0x00800000</div><div class='del'>-#define BM_CLKCTRL_FRAC_PIX_STABLE	0x00400000</div><div class='del'>-#define BP_CLKCTRL_FRAC_PIXFRAC	16</div><div class='del'>-#define BM_CLKCTRL_FRAC_PIXFRAC	0x003F0000</div><div class='del'>-#define BF_CLKCTRL_FRAC_PIXFRAC(v)  \</div><div class='del'>-		(((v) &lt;&lt; 16) &amp; BM_CLKCTRL_FRAC_PIXFRAC)</div><div class='del'>-#define BP_CLKCTRL_FRAC_CLKGATEEMI	15</div><div class='del'>-#define BM_CLKCTRL_FRAC_CLKGATEEMI	0x00008000</div><div class='del'>-#define BM_CLKCTRL_FRAC_EMI_STABLE	0x00004000</div><div class='del'>-#define BP_CLKCTRL_FRAC_EMIFRAC	8</div><div class='del'>-#define BM_CLKCTRL_FRAC_EMIFRAC	0x00003F00</div><div class='del'>-#define BF_CLKCTRL_FRAC_EMIFRAC(v)  \</div><div class='del'>-		(((v) &lt;&lt; 8) &amp; BM_CLKCTRL_FRAC_EMIFRAC)</div><div class='del'>-#define BP_CLKCTRL_FRAC_CLKGATECPU	7</div><div class='del'>-#define BM_CLKCTRL_FRAC_CLKGATECPU	0x00000080</div><div class='del'>-#define BM_CLKCTRL_FRAC_CPU_STABLE	0x00000040</div><div class='del'>-#define BP_CLKCTRL_FRAC_CPUFRAC	0</div><div class='del'>-#define BM_CLKCTRL_FRAC_CPUFRAC	0x0000003F</div><div class='del'>-#define BF_CLKCTRL_FRAC_CPUFRAC(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_FRAC_CPUFRAC)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_FRAC1	(0x00000100)</div><div class='del'>-#define HW_CLKCTRL_FRAC1_SET	(0x00000104)</div><div class='del'>-#define HW_CLKCTRL_FRAC1_CLR	(0x00000108)</div><div class='del'>-#define HW_CLKCTRL_FRAC1_TOG	(0x0000010c)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_FRAC1_CLKGATEVID	0x80000000</div><div class='del'>-#define BM_CLKCTRL_FRAC1_VID_STABLE	0x40000000</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_CLKSEQ	(0x00000110)</div><div class='del'>-#define HW_CLKCTRL_CLKSEQ_SET	(0x00000114)</div><div class='del'>-#define HW_CLKCTRL_CLKSEQ_CLR	(0x00000118)</div><div class='del'>-#define HW_CLKCTRL_CLKSEQ_TOG	(0x0000011c)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_ETM	0x00000100</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_CPU	0x00000080</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_EMI	0x00000040</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_SSP	0x00000020</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_GPMI	0x00000010</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_IR	0x00000008</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_PIX	0x00000002</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_SAIF	0x00000001</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_RESET	(0x00000120)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_RESET_CHIP	0x00000002</div><div class='del'>-#define BM_CLKCTRL_RESET_DIG	0x00000001</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_STATUS	(0x00000130)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_STATUS_CPU_LIMIT	30</div><div class='del'>-#define BM_CLKCTRL_STATUS_CPU_LIMIT	0xC0000000</div><div class='del'>-#define BF_CLKCTRL_STATUS_CPU_LIMIT(v) \</div><div class='del'>-		(((v) &lt;&lt; 30) &amp; BM_CLKCTRL_STATUS_CPU_LIMIT)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_VERSION	(0x00000140)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_VERSION_MAJOR	24</div><div class='del'>-#define BM_CLKCTRL_VERSION_MAJOR	0xFF000000</div><div class='del'>-#define BF_CLKCTRL_VERSION_MAJOR(v) \</div><div class='del'>-		(((v) &lt;&lt; 24) &amp; BM_CLKCTRL_VERSION_MAJOR)</div><div class='del'>-#define BP_CLKCTRL_VERSION_MINOR	16</div><div class='del'>-#define BM_CLKCTRL_VERSION_MINOR	0x00FF0000</div><div class='del'>-#define BF_CLKCTRL_VERSION_MINOR(v)  \</div><div class='del'>-		(((v) &lt;&lt; 16) &amp; BM_CLKCTRL_VERSION_MINOR)</div><div class='del'>-#define BP_CLKCTRL_VERSION_STEP	0</div><div class='del'>-#define BM_CLKCTRL_VERSION_STEP	0x0000FFFF</div><div class='del'>-#define BF_CLKCTRL_VERSION_STEP(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_VERSION_STEP)</div><div class='del'>-</div><div class='del'>-#endif /* __REGS_CLKCTRL_MX23_H__ */</div><div class='head'>diff --git a/arch/arm/mach-mxs/regs-clkctrl-mx28.h b/arch/arm/mach-mxs/regs-clkctrl-mx28.h<br/>deleted file mode 100644<br/>index 7d1b061d7943..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/regs-clkctrl-mx28.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/regs-clkctrl-mx28.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,486 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Freescale CLKCTRL Register Definitions</div><div class='del'>- *</div><div class='del'>- * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA</div><div class='del'>- *</div><div class='del'>- * This file is created by xml file. Don't Edit it.</div><div class='del'>- *</div><div class='del'>- * Xml Revision: 1.48</div><div class='del'>- * Template revision: 26195</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __REGS_CLKCTRL_MX28_H__</div><div class='del'>-#define __REGS_CLKCTRL_MX28_H__</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_PLL0CTRL0	(0x00000000)</div><div class='del'>-#define HW_CLKCTRL_PLL0CTRL0_SET	(0x00000004)</div><div class='del'>-#define HW_CLKCTRL_PLL0CTRL0_CLR	(0x00000008)</div><div class='del'>-#define HW_CLKCTRL_PLL0CTRL0_TOG	(0x0000000c)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_PLL0CTRL0_LFR_SEL	28</div><div class='del'>-#define BM_CLKCTRL_PLL0CTRL0_LFR_SEL	0x30000000</div><div class='del'>-#define BF_CLKCTRL_PLL0CTRL0_LFR_SEL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 28) &amp; BM_CLKCTRL_PLL0CTRL0_LFR_SEL)</div><div class='del'>-#define BV_CLKCTRL_PLL0CTRL0_LFR_SEL__DEFAULT   0x0</div><div class='del'>-#define BV_CLKCTRL_PLL0CTRL0_LFR_SEL__TIMES_2   0x1</div><div class='del'>-#define BV_CLKCTRL_PLL0CTRL0_LFR_SEL__TIMES_05  0x2</div><div class='del'>-#define BV_CLKCTRL_PLL0CTRL0_LFR_SEL__UNDEFINED 0x3</div><div class='del'>-#define BP_CLKCTRL_PLL0CTRL0_CP_SEL	24</div><div class='del'>-#define BM_CLKCTRL_PLL0CTRL0_CP_SEL	0x03000000</div><div class='del'>-#define BF_CLKCTRL_PLL0CTRL0_CP_SEL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 24) &amp; BM_CLKCTRL_PLL0CTRL0_CP_SEL)</div><div class='del'>-#define BV_CLKCTRL_PLL0CTRL0_CP_SEL__DEFAULT   0x0</div><div class='del'>-#define BV_CLKCTRL_PLL0CTRL0_CP_SEL__TIMES_2   0x1</div><div class='del'>-#define BV_CLKCTRL_PLL0CTRL0_CP_SEL__TIMES_05  0x2</div><div class='del'>-#define BV_CLKCTRL_PLL0CTRL0_CP_SEL__UNDEFINED 0x3</div><div class='del'>-#define BP_CLKCTRL_PLL0CTRL0_DIV_SEL	20</div><div class='del'>-#define BM_CLKCTRL_PLL0CTRL0_DIV_SEL	0x00300000</div><div class='del'>-#define BF_CLKCTRL_PLL0CTRL0_DIV_SEL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 20) &amp; BM_CLKCTRL_PLL0CTRL0_DIV_SEL)</div><div class='del'>-#define BV_CLKCTRL_PLL0CTRL0_DIV_SEL__DEFAULT   0x0</div><div class='del'>-#define BV_CLKCTRL_PLL0CTRL0_DIV_SEL__LOWER     0x1</div><div class='del'>-#define BV_CLKCTRL_PLL0CTRL0_DIV_SEL__LOWEST    0x2</div><div class='del'>-#define BV_CLKCTRL_PLL0CTRL0_DIV_SEL__UNDEFINED 0x3</div><div class='del'>-#define BM_CLKCTRL_PLL0CTRL0_EN_USB_CLKS	0x00040000</div><div class='del'>-#define BM_CLKCTRL_PLL0CTRL0_POWER	0x00020000</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_PLL0CTRL1	(0x00000010)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_PLL0CTRL1_LOCK	0x80000000</div><div class='del'>-#define BM_CLKCTRL_PLL0CTRL1_FORCE_LOCK	0x40000000</div><div class='del'>-#define BP_CLKCTRL_PLL0CTRL1_LOCK_COUNT	0</div><div class='del'>-#define BM_CLKCTRL_PLL0CTRL1_LOCK_COUNT	0x0000FFFF</div><div class='del'>-#define BF_CLKCTRL_PLL0CTRL1_LOCK_COUNT(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_PLL0CTRL1_LOCK_COUNT)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_PLL1CTRL0	(0x00000020)</div><div class='del'>-#define HW_CLKCTRL_PLL1CTRL0_SET	(0x00000024)</div><div class='del'>-#define HW_CLKCTRL_PLL1CTRL0_CLR	(0x00000028)</div><div class='del'>-#define HW_CLKCTRL_PLL1CTRL0_TOG	(0x0000002c)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_PLL1CTRL0_CLKGATEEMI	0x80000000</div><div class='del'>-#define BP_CLKCTRL_PLL1CTRL0_LFR_SEL	28</div><div class='del'>-#define BM_CLKCTRL_PLL1CTRL0_LFR_SEL	0x30000000</div><div class='del'>-#define BF_CLKCTRL_PLL1CTRL0_LFR_SEL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 28) &amp; BM_CLKCTRL_PLL1CTRL0_LFR_SEL)</div><div class='del'>-#define BV_CLKCTRL_PLL1CTRL0_LFR_SEL__DEFAULT   0x0</div><div class='del'>-#define BV_CLKCTRL_PLL1CTRL0_LFR_SEL__TIMES_2   0x1</div><div class='del'>-#define BV_CLKCTRL_PLL1CTRL0_LFR_SEL__TIMES_05  0x2</div><div class='del'>-#define BV_CLKCTRL_PLL1CTRL0_LFR_SEL__UNDEFINED 0x3</div><div class='del'>-#define BP_CLKCTRL_PLL1CTRL0_CP_SEL	24</div><div class='del'>-#define BM_CLKCTRL_PLL1CTRL0_CP_SEL	0x03000000</div><div class='del'>-#define BF_CLKCTRL_PLL1CTRL0_CP_SEL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 24) &amp; BM_CLKCTRL_PLL1CTRL0_CP_SEL)</div><div class='del'>-#define BV_CLKCTRL_PLL1CTRL0_CP_SEL__DEFAULT   0x0</div><div class='del'>-#define BV_CLKCTRL_PLL1CTRL0_CP_SEL__TIMES_2   0x1</div><div class='del'>-#define BV_CLKCTRL_PLL1CTRL0_CP_SEL__TIMES_05  0x2</div><div class='del'>-#define BV_CLKCTRL_PLL1CTRL0_CP_SEL__UNDEFINED 0x3</div><div class='del'>-#define BP_CLKCTRL_PLL1CTRL0_DIV_SEL	20</div><div class='del'>-#define BM_CLKCTRL_PLL1CTRL0_DIV_SEL	0x00300000</div><div class='del'>-#define BF_CLKCTRL_PLL1CTRL0_DIV_SEL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 20) &amp; BM_CLKCTRL_PLL1CTRL0_DIV_SEL)</div><div class='del'>-#define BV_CLKCTRL_PLL1CTRL0_DIV_SEL__DEFAULT   0x0</div><div class='del'>-#define BV_CLKCTRL_PLL1CTRL0_DIV_SEL__LOWER     0x1</div><div class='del'>-#define BV_CLKCTRL_PLL1CTRL0_DIV_SEL__LOWEST    0x2</div><div class='del'>-#define BV_CLKCTRL_PLL1CTRL0_DIV_SEL__UNDEFINED 0x3</div><div class='del'>-#define BM_CLKCTRL_PLL1CTRL0_EN_USB_CLKS	0x00040000</div><div class='del'>-#define BM_CLKCTRL_PLL1CTRL0_POWER	0x00020000</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_PLL1CTRL1	(0x00000030)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_PLL1CTRL1_LOCK	0x80000000</div><div class='del'>-#define BM_CLKCTRL_PLL1CTRL1_FORCE_LOCK	0x40000000</div><div class='del'>-#define BP_CLKCTRL_PLL1CTRL1_LOCK_COUNT	0</div><div class='del'>-#define BM_CLKCTRL_PLL1CTRL1_LOCK_COUNT	0x0000FFFF</div><div class='del'>-#define BF_CLKCTRL_PLL1CTRL1_LOCK_COUNT(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_PLL1CTRL1_LOCK_COUNT)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_PLL2CTRL0	(0x00000040)</div><div class='del'>-#define HW_CLKCTRL_PLL2CTRL0_SET	(0x00000044)</div><div class='del'>-#define HW_CLKCTRL_PLL2CTRL0_CLR	(0x00000048)</div><div class='del'>-#define HW_CLKCTRL_PLL2CTRL0_TOG	(0x0000004c)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_PLL2CTRL0_CLKGATE	0x80000000</div><div class='del'>-#define BP_CLKCTRL_PLL2CTRL0_LFR_SEL	28</div><div class='del'>-#define BM_CLKCTRL_PLL2CTRL0_LFR_SEL	0x30000000</div><div class='del'>-#define BF_CLKCTRL_PLL2CTRL0_LFR_SEL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 28) &amp; BM_CLKCTRL_PLL2CTRL0_LFR_SEL)</div><div class='del'>-#define BM_CLKCTRL_PLL2CTRL0_HOLD_RING_OFF_B	0x04000000</div><div class='del'>-#define BP_CLKCTRL_PLL2CTRL0_CP_SEL	24</div><div class='del'>-#define BM_CLKCTRL_PLL2CTRL0_CP_SEL	0x03000000</div><div class='del'>-#define BF_CLKCTRL_PLL2CTRL0_CP_SEL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 24) &amp; BM_CLKCTRL_PLL2CTRL0_CP_SEL)</div><div class='del'>-#define BM_CLKCTRL_PLL2CTRL0_POWER	0x00800000</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_CPU	(0x00000050)</div><div class='del'>-#define HW_CLKCTRL_CPU_SET	(0x00000054)</div><div class='del'>-#define HW_CLKCTRL_CPU_CLR	(0x00000058)</div><div class='del'>-#define HW_CLKCTRL_CPU_TOG	(0x0000005c)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_CPU_BUSY_REF_XTAL	0x20000000</div><div class='del'>-#define BM_CLKCTRL_CPU_BUSY_REF_CPU	0x10000000</div><div class='del'>-#define BM_CLKCTRL_CPU_DIV_XTAL_FRAC_EN	0x04000000</div><div class='del'>-#define BP_CLKCTRL_CPU_DIV_XTAL	16</div><div class='del'>-#define BM_CLKCTRL_CPU_DIV_XTAL	0x03FF0000</div><div class='del'>-#define BF_CLKCTRL_CPU_DIV_XTAL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 16) &amp; BM_CLKCTRL_CPU_DIV_XTAL)</div><div class='del'>-#define BM_CLKCTRL_CPU_INTERRUPT_WAIT	0x00001000</div><div class='del'>-#define BM_CLKCTRL_CPU_DIV_CPU_FRAC_EN	0x00000400</div><div class='del'>-#define BP_CLKCTRL_CPU_DIV_CPU	0</div><div class='del'>-#define BM_CLKCTRL_CPU_DIV_CPU	0x0000003F</div><div class='del'>-#define BF_CLKCTRL_CPU_DIV_CPU(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_CPU_DIV_CPU)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_HBUS	(0x00000060)</div><div class='del'>-#define HW_CLKCTRL_HBUS_SET	(0x00000064)</div><div class='del'>-#define HW_CLKCTRL_HBUS_CLR	(0x00000068)</div><div class='del'>-#define HW_CLKCTRL_HBUS_TOG	(0x0000006c)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_HBUS_ASM_BUSY	0x80000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_DCP_AS_ENABLE	0x40000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_PXP_AS_ENABLE	0x20000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_ASM_EMIPORT_AS_ENABLE	0x08000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_APBHDMA_AS_ENABLE	0x04000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_APBXDMA_AS_ENABLE	0x02000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_TRAFFIC_JAM_AS_ENABLE	0x01000000</div><div class='del'>-#define BM_CLKCTRL_HBUS_TRAFFIC_AS_ENABLE	0x00800000</div><div class='del'>-#define BM_CLKCTRL_HBUS_CPU_DATA_AS_ENABLE	0x00400000</div><div class='del'>-#define BM_CLKCTRL_HBUS_CPU_INSTR_AS_ENABLE	0x00200000</div><div class='del'>-#define BM_CLKCTRL_HBUS_ASM_ENABLE	0x00100000</div><div class='del'>-#define BM_CLKCTRL_HBUS_AUTO_CLEAR_DIV_ENABLE	0x00080000</div><div class='del'>-#define BP_CLKCTRL_HBUS_SLOW_DIV	16</div><div class='del'>-#define BM_CLKCTRL_HBUS_SLOW_DIV	0x00070000</div><div class='del'>-#define BF_CLKCTRL_HBUS_SLOW_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 16) &amp; BM_CLKCTRL_HBUS_SLOW_DIV)</div><div class='del'>-#define BV_CLKCTRL_HBUS_SLOW_DIV__BY1  0x0</div><div class='del'>-#define BV_CLKCTRL_HBUS_SLOW_DIV__BY2  0x1</div><div class='del'>-#define BV_CLKCTRL_HBUS_SLOW_DIV__BY4  0x2</div><div class='del'>-#define BV_CLKCTRL_HBUS_SLOW_DIV__BY8  0x3</div><div class='del'>-#define BV_CLKCTRL_HBUS_SLOW_DIV__BY16 0x4</div><div class='del'>-#define BV_CLKCTRL_HBUS_SLOW_DIV__BY32 0x5</div><div class='del'>-#define BM_CLKCTRL_HBUS_DIV_FRAC_EN	0x00000020</div><div class='del'>-#define BP_CLKCTRL_HBUS_DIV	0</div><div class='del'>-#define BM_CLKCTRL_HBUS_DIV	0x0000001F</div><div class='del'>-#define BF_CLKCTRL_HBUS_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_HBUS_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_XBUS	(0x00000070)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_XBUS_BUSY	0x80000000</div><div class='del'>-#define BM_CLKCTRL_XBUS_AUTO_CLEAR_DIV_ENABLE	0x00000800</div><div class='del'>-#define BM_CLKCTRL_XBUS_DIV_FRAC_EN	0x00000400</div><div class='del'>-#define BP_CLKCTRL_XBUS_DIV	0</div><div class='del'>-#define BM_CLKCTRL_XBUS_DIV	0x000003FF</div><div class='del'>-#define BF_CLKCTRL_XBUS_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_XBUS_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_XTAL	(0x00000080)</div><div class='del'>-#define HW_CLKCTRL_XTAL_SET	(0x00000084)</div><div class='del'>-#define HW_CLKCTRL_XTAL_CLR	(0x00000088)</div><div class='del'>-#define HW_CLKCTRL_XTAL_TOG	(0x0000008c)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_XTAL_UART_CLK_GATE	31</div><div class='del'>-#define BM_CLKCTRL_XTAL_UART_CLK_GATE	0x80000000</div><div class='del'>-#define BP_CLKCTRL_XTAL_PWM_CLK24M_GATE	29</div><div class='del'>-#define BM_CLKCTRL_XTAL_PWM_CLK24M_GATE	0x20000000</div><div class='del'>-#define BP_CLKCTRL_XTAL_TIMROT_CLK32K_GATE	26</div><div class='del'>-#define BM_CLKCTRL_XTAL_TIMROT_CLK32K_GATE	0x04000000</div><div class='del'>-#define BP_CLKCTRL_XTAL_DIV_UART	0</div><div class='del'>-#define BM_CLKCTRL_XTAL_DIV_UART	0x00000003</div><div class='del'>-#define BF_CLKCTRL_XTAL_DIV_UART(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_XTAL_DIV_UART)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_SSP0	(0x00000090)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_SSP0_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_SSP0_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_SSP0_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_SSP0_DIV_FRAC_EN	0x00000200</div><div class='del'>-#define BP_CLKCTRL_SSP0_DIV	0</div><div class='del'>-#define BM_CLKCTRL_SSP0_DIV	0x000001FF</div><div class='del'>-#define BF_CLKCTRL_SSP0_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_SSP0_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_SSP1	(0x000000a0)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_SSP1_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_SSP1_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_SSP1_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_SSP1_DIV_FRAC_EN	0x00000200</div><div class='del'>-#define BP_CLKCTRL_SSP1_DIV	0</div><div class='del'>-#define BM_CLKCTRL_SSP1_DIV	0x000001FF</div><div class='del'>-#define BF_CLKCTRL_SSP1_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_SSP1_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_SSP2	(0x000000b0)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_SSP2_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_SSP2_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_SSP2_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_SSP2_DIV_FRAC_EN	0x00000200</div><div class='del'>-#define BP_CLKCTRL_SSP2_DIV	0</div><div class='del'>-#define BM_CLKCTRL_SSP2_DIV	0x000001FF</div><div class='del'>-#define BF_CLKCTRL_SSP2_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_SSP2_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_SSP3	(0x000000c0)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_SSP3_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_SSP3_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_SSP3_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_SSP3_DIV_FRAC_EN	0x00000200</div><div class='del'>-#define BP_CLKCTRL_SSP3_DIV	0</div><div class='del'>-#define BM_CLKCTRL_SSP3_DIV	0x000001FF</div><div class='del'>-#define BF_CLKCTRL_SSP3_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_SSP3_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_GPMI	(0x000000d0)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_GPMI_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_GPMI_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_GPMI_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_GPMI_DIV_FRAC_EN	0x00000400</div><div class='del'>-#define BP_CLKCTRL_GPMI_DIV	0</div><div class='del'>-#define BM_CLKCTRL_GPMI_DIV	0x000003FF</div><div class='del'>-#define BF_CLKCTRL_GPMI_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_GPMI_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_SPDIF	(0x000000e0)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_SPDIF_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_SPDIF_CLKGATE	0x80000000</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_EMI	(0x000000f0)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_EMI_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_EMI_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_EMI_SYNC_MODE_EN	0x40000000</div><div class='del'>-#define BM_CLKCTRL_EMI_BUSY_REF_XTAL	0x20000000</div><div class='del'>-#define BM_CLKCTRL_EMI_BUSY_REF_EMI	0x10000000</div><div class='del'>-#define BM_CLKCTRL_EMI_BUSY_REF_CPU	0x08000000</div><div class='del'>-#define BM_CLKCTRL_EMI_BUSY_SYNC_MODE	0x04000000</div><div class='del'>-#define BM_CLKCTRL_EMI_BUSY_DCC_RESYNC	0x00020000</div><div class='del'>-#define BM_CLKCTRL_EMI_DCC_RESYNC_ENABLE	0x00010000</div><div class='del'>-#define BP_CLKCTRL_EMI_DIV_XTAL	8</div><div class='del'>-#define BM_CLKCTRL_EMI_DIV_XTAL	0x00000F00</div><div class='del'>-#define BF_CLKCTRL_EMI_DIV_XTAL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 8) &amp; BM_CLKCTRL_EMI_DIV_XTAL)</div><div class='del'>-#define BP_CLKCTRL_EMI_DIV_EMI	0</div><div class='del'>-#define BM_CLKCTRL_EMI_DIV_EMI	0x0000003F</div><div class='del'>-#define BF_CLKCTRL_EMI_DIV_EMI(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_EMI_DIV_EMI)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_SAIF0	(0x00000100)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_SAIF0_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_SAIF0_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_SAIF0_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_SAIF0_DIV_FRAC_EN	0x00010000</div><div class='del'>-#define BP_CLKCTRL_SAIF0_DIV	0</div><div class='del'>-#define BM_CLKCTRL_SAIF0_DIV	0x0000FFFF</div><div class='del'>-#define BF_CLKCTRL_SAIF0_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_SAIF0_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_SAIF1	(0x00000110)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_SAIF1_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_SAIF1_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_SAIF1_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_SAIF1_DIV_FRAC_EN	0x00010000</div><div class='del'>-#define BP_CLKCTRL_SAIF1_DIV	0</div><div class='del'>-#define BM_CLKCTRL_SAIF1_DIV	0x0000FFFF</div><div class='del'>-#define BF_CLKCTRL_SAIF1_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_SAIF1_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_DIS_LCDIF	(0x00000120)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_DIS_LCDIF_CLKGATE	31</div><div class='del'>-#define BM_CLKCTRL_DIS_LCDIF_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_DIS_LCDIF_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_DIS_LCDIF_DIV_FRAC_EN	0x00002000</div><div class='del'>-#define BP_CLKCTRL_DIS_LCDIF_DIV	0</div><div class='del'>-#define BM_CLKCTRL_DIS_LCDIF_DIV	0x00001FFF</div><div class='del'>-#define BF_CLKCTRL_DIS_LCDIF_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_DIS_LCDIF_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_ETM	(0x00000130)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_ETM_CLKGATE	0x80000000</div><div class='del'>-#define BM_CLKCTRL_ETM_BUSY	0x20000000</div><div class='del'>-#define BM_CLKCTRL_ETM_DIV_FRAC_EN	0x00000080</div><div class='del'>-#define BP_CLKCTRL_ETM_DIV	0</div><div class='del'>-#define BM_CLKCTRL_ETM_DIV	0x0000007F</div><div class='del'>-#define BF_CLKCTRL_ETM_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_ETM_DIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_ENET	(0x00000140)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_ENET_SLEEP	0x80000000</div><div class='del'>-#define BP_CLKCTRL_ENET_DISABLE	30</div><div class='del'>-#define BM_CLKCTRL_ENET_DISABLE	0x40000000</div><div class='del'>-#define BM_CLKCTRL_ENET_STATUS	0x20000000</div><div class='del'>-#define BM_CLKCTRL_ENET_BUSY_TIME	0x08000000</div><div class='del'>-#define BP_CLKCTRL_ENET_DIV_TIME	21</div><div class='del'>-#define BM_CLKCTRL_ENET_DIV_TIME	0x07E00000</div><div class='del'>-#define BF_CLKCTRL_ENET_DIV_TIME(v)  \</div><div class='del'>-		(((v) &lt;&lt; 21) &amp; BM_CLKCTRL_ENET_DIV_TIME)</div><div class='del'>-#define BM_CLKCTRL_ENET_BUSY	0x08000000</div><div class='del'>-#define BP_CLKCTRL_ENET_DIV	21</div><div class='del'>-#define BM_CLKCTRL_ENET_DIV	0x07E00000</div><div class='del'>-#define BF_CLKCTRL_ENET_DIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 21) &amp; BM_CLKCTRL_ENET_DIV)</div><div class='del'>-#define BP_CLKCTRL_ENET_TIME_SEL	19</div><div class='del'>-#define BM_CLKCTRL_ENET_TIME_SEL	0x00180000</div><div class='del'>-#define BF_CLKCTRL_ENET_TIME_SEL(v)  \</div><div class='del'>-		(((v) &lt;&lt; 19) &amp; BM_CLKCTRL_ENET_TIME_SEL)</div><div class='del'>-#define BV_CLKCTRL_ENET_TIME_SEL__XTAL      0x0</div><div class='del'>-#define BV_CLKCTRL_ENET_TIME_SEL__PLL       0x1</div><div class='del'>-#define BV_CLKCTRL_ENET_TIME_SEL__RMII_CLK  0x2</div><div class='del'>-#define BV_CLKCTRL_ENET_TIME_SEL__UNDEFINED 0x3</div><div class='del'>-#define BM_CLKCTRL_ENET_CLK_OUT_EN	0x00040000</div><div class='del'>-#define BM_CLKCTRL_ENET_RESET_BY_SW_CHIP	0x00020000</div><div class='del'>-#define BM_CLKCTRL_ENET_RESET_BY_SW	0x00010000</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_HSADC	(0x00000150)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_HSADC_RESETB	0x40000000</div><div class='del'>-#define BP_CLKCTRL_HSADC_FREQDIV	28</div><div class='del'>-#define BM_CLKCTRL_HSADC_FREQDIV	0x30000000</div><div class='del'>-#define BF_CLKCTRL_HSADC_FREQDIV(v)  \</div><div class='del'>-		(((v) &lt;&lt; 28) &amp; BM_CLKCTRL_HSADC_FREQDIV)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_FLEXCAN	(0x00000160)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_FLEXCAN_STOP_CAN0	30</div><div class='del'>-#define BM_CLKCTRL_FLEXCAN_STOP_CAN0	0x40000000</div><div class='del'>-#define BM_CLKCTRL_FLEXCAN_CAN0_STATUS	0x20000000</div><div class='del'>-#define BP_CLKCTRL_FLEXCAN_STOP_CAN1	28</div><div class='del'>-#define BM_CLKCTRL_FLEXCAN_STOP_CAN1	0x10000000</div><div class='del'>-#define BM_CLKCTRL_FLEXCAN_CAN1_STATUS	0x08000000</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_FRAC0	(0x000001b0)</div><div class='del'>-#define HW_CLKCTRL_FRAC0_SET	(0x000001b4)</div><div class='del'>-#define HW_CLKCTRL_FRAC0_CLR	(0x000001b8)</div><div class='del'>-#define HW_CLKCTRL_FRAC0_TOG	(0x000001bc)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_FRAC0_CLKGATEIO0	31</div><div class='del'>-#define BM_CLKCTRL_FRAC0_CLKGATEIO0	0x80000000</div><div class='del'>-#define BM_CLKCTRL_FRAC0_IO0_STABLE	0x40000000</div><div class='del'>-#define BP_CLKCTRL_FRAC0_IO0FRAC	24</div><div class='del'>-#define BM_CLKCTRL_FRAC0_IO0FRAC	0x3F000000</div><div class='del'>-#define BF_CLKCTRL_FRAC0_IO0FRAC(v)  \</div><div class='del'>-		(((v) &lt;&lt; 24) &amp; BM_CLKCTRL_FRAC0_IO0FRAC)</div><div class='del'>-#define BP_CLKCTRL_FRAC0_CLKGATEIO1	23</div><div class='del'>-#define BM_CLKCTRL_FRAC0_CLKGATEIO1	0x00800000</div><div class='del'>-#define BM_CLKCTRL_FRAC0_IO1_STABLE	0x00400000</div><div class='del'>-#define BP_CLKCTRL_FRAC0_IO1FRAC	16</div><div class='del'>-#define BM_CLKCTRL_FRAC0_IO1FRAC	0x003F0000</div><div class='del'>-#define BF_CLKCTRL_FRAC0_IO1FRAC(v)  \</div><div class='del'>-		(((v) &lt;&lt; 16) &amp; BM_CLKCTRL_FRAC0_IO1FRAC)</div><div class='del'>-#define BP_CLKCTRL_FRAC0_CLKGATEEMI	15</div><div class='del'>-#define BM_CLKCTRL_FRAC0_CLKGATEEMI	0x00008000</div><div class='del'>-#define BM_CLKCTRL_FRAC0_EMI_STABLE	0x00004000</div><div class='del'>-#define BP_CLKCTRL_FRAC0_EMIFRAC	8</div><div class='del'>-#define BM_CLKCTRL_FRAC0_EMIFRAC	0x00003F00</div><div class='del'>-#define BF_CLKCTRL_FRAC0_EMIFRAC(v)  \</div><div class='del'>-		(((v) &lt;&lt; 8) &amp; BM_CLKCTRL_FRAC0_EMIFRAC)</div><div class='del'>-#define BP_CLKCTRL_FRAC0_CLKGATECPU	7</div><div class='del'>-#define BM_CLKCTRL_FRAC0_CLKGATECPU	0x00000080</div><div class='del'>-#define BM_CLKCTRL_FRAC0_CPU_STABLE	0x00000040</div><div class='del'>-#define BP_CLKCTRL_FRAC0_CPUFRAC	0</div><div class='del'>-#define BM_CLKCTRL_FRAC0_CPUFRAC	0x0000003F</div><div class='del'>-#define BF_CLKCTRL_FRAC0_CPUFRAC(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_FRAC0_CPUFRAC)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_FRAC1	(0x000001c0)</div><div class='del'>-#define HW_CLKCTRL_FRAC1_SET	(0x000001c4)</div><div class='del'>-#define HW_CLKCTRL_FRAC1_CLR	(0x000001c8)</div><div class='del'>-#define HW_CLKCTRL_FRAC1_TOG	(0x000001cc)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_FRAC1_CLKGATEGPMI	23</div><div class='del'>-#define BM_CLKCTRL_FRAC1_CLKGATEGPMI	0x00800000</div><div class='del'>-#define BM_CLKCTRL_FRAC1_GPMI_STABLE	0x00400000</div><div class='del'>-#define BP_CLKCTRL_FRAC1_GPMIFRAC	16</div><div class='del'>-#define BM_CLKCTRL_FRAC1_GPMIFRAC	0x003F0000</div><div class='del'>-#define BF_CLKCTRL_FRAC1_GPMIFRAC(v)  \</div><div class='del'>-		(((v) &lt;&lt; 16) &amp; BM_CLKCTRL_FRAC1_GPMIFRAC)</div><div class='del'>-#define BP_CLKCTRL_FRAC1_CLKGATEHSADC	15</div><div class='del'>-#define BM_CLKCTRL_FRAC1_CLKGATEHSADC	0x00008000</div><div class='del'>-#define BM_CLKCTRL_FRAC1_HSADC_STABLE	0x00004000</div><div class='del'>-#define BP_CLKCTRL_FRAC1_HSADCFRAC	8</div><div class='del'>-#define BM_CLKCTRL_FRAC1_HSADCFRAC	0x00003F00</div><div class='del'>-#define BF_CLKCTRL_FRAC1_HSADCFRAC(v)  \</div><div class='del'>-		(((v) &lt;&lt; 8) &amp; BM_CLKCTRL_FRAC1_HSADCFRAC)</div><div class='del'>-#define BP_CLKCTRL_FRAC1_CLKGATEPIX	7</div><div class='del'>-#define BM_CLKCTRL_FRAC1_CLKGATEPIX	0x00000080</div><div class='del'>-#define BM_CLKCTRL_FRAC1_PIX_STABLE	0x00000040</div><div class='del'>-#define BP_CLKCTRL_FRAC1_PIXFRAC	0</div><div class='del'>-#define BM_CLKCTRL_FRAC1_PIXFRAC	0x0000003F</div><div class='del'>-#define BF_CLKCTRL_FRAC1_PIXFRAC(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_FRAC1_PIXFRAC)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_CLKSEQ	(0x000001d0)</div><div class='del'>-#define HW_CLKCTRL_CLKSEQ_SET	(0x000001d4)</div><div class='del'>-#define HW_CLKCTRL_CLKSEQ_CLR	(0x000001d8)</div><div class='del'>-#define HW_CLKCTRL_CLKSEQ_TOG	(0x000001dc)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_CPU	0x00040000</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF	0x00004000</div><div class='del'>-#define BV_CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF__BYPASS 0x1</div><div class='del'>-#define BV_CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF__PFD    0x0</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_ETM	0x00000100</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_EMI	0x00000080</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_SSP3	0x00000040</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_SSP2	0x00000020</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_SSP1	0x00000010</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_SSP0	0x00000008</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_GPMI	0x00000004</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_SAIF1	0x00000002</div><div class='del'>-#define BM_CLKCTRL_CLKSEQ_BYPASS_SAIF0	0x00000001</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_RESET	(0x000001e0)</div><div class='del'>-</div><div class='del'>-#define BM_CLKCTRL_RESET_WDOG_POR_DISABLE	0x00000020</div><div class='del'>-#define BM_CLKCTRL_RESET_EXTERNAL_RESET_ENABLE	0x00000010</div><div class='del'>-#define BM_CLKCTRL_RESET_THERMAL_RESET_ENABLE	0x00000008</div><div class='del'>-#define BM_CLKCTRL_RESET_THERMAL_RESET_DEFAULT	0x00000004</div><div class='del'>-#define BM_CLKCTRL_RESET_CHIP	0x00000002</div><div class='del'>-#define BM_CLKCTRL_RESET_DIG	0x00000001</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_STATUS	(0x000001f0)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_STATUS_CPU_LIMIT	30</div><div class='del'>-#define BM_CLKCTRL_STATUS_CPU_LIMIT	0xC0000000</div><div class='del'>-#define BF_CLKCTRL_STATUS_CPU_LIMIT(v) \</div><div class='del'>-		(((v) &lt;&lt; 30) &amp; BM_CLKCTRL_STATUS_CPU_LIMIT)</div><div class='del'>-</div><div class='del'>-#define HW_CLKCTRL_VERSION	(0x00000200)</div><div class='del'>-</div><div class='del'>-#define BP_CLKCTRL_VERSION_MAJOR	24</div><div class='del'>-#define BM_CLKCTRL_VERSION_MAJOR	0xFF000000</div><div class='del'>-#define BF_CLKCTRL_VERSION_MAJOR(v) \</div><div class='del'>-		(((v) &lt;&lt; 24) &amp; BM_CLKCTRL_VERSION_MAJOR)</div><div class='del'>-#define BP_CLKCTRL_VERSION_MINOR	16</div><div class='del'>-#define BM_CLKCTRL_VERSION_MINOR	0x00FF0000</div><div class='del'>-#define BF_CLKCTRL_VERSION_MINOR(v)  \</div><div class='del'>-		(((v) &lt;&lt; 16) &amp; BM_CLKCTRL_VERSION_MINOR)</div><div class='del'>-#define BP_CLKCTRL_VERSION_STEP	0</div><div class='del'>-#define BM_CLKCTRL_VERSION_STEP	0x0000FFFF</div><div class='del'>-#define BF_CLKCTRL_VERSION_STEP(v)  \</div><div class='del'>-		(((v) &lt;&lt; 0) &amp; BM_CLKCTRL_VERSION_STEP)</div><div class='del'>-</div><div class='del'>-#endif /* __REGS_CLKCTRL_MX28_H__ */</div><div class='head'>diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c<br/>index 80ac1fca8a00..30042e23bfa7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/system.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/system.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/system.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/system.c</a></div><div class='hunk'>@@ -37,8 +37,6 @@</div><div class='ctx'> #define MXS_MODULE_CLKGATE		(1 &lt;&lt; 30)</div><div class='ctx'> #define MXS_MODULE_SFTRST		(1 &lt;&lt; 31)</div><div class='ctx'> </div><div class='del'>-#define CLKCTRL_TIMEOUT		10	/* 10 ms */</div><div class='del'>-</div><div class='ctx'> static void __iomem *mxs_clkctrl_reset_addr;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -139,17 +137,3 @@ error:</div><div class='ctx'> 	return -ETIMEDOUT;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mxs_reset_block);</div><div class='del'>-</div><div class='del'>-int mxs_clkctrl_timeout(unsigned int reg_offset, unsigned int mask)</div><div class='del'>-{</div><div class='del'>-	unsigned long timeout = jiffies + msecs_to_jiffies(CLKCTRL_TIMEOUT);</div><div class='del'>-	while (readl_relaxed(MXS_IO_ADDRESS(MXS_CLKCTRL_BASE_ADDR)</div><div class='del'>-						+ reg_offset) &amp; mask) {</div><div class='del'>-		if (time_after(jiffies, timeout)) {</div><div class='del'>-			pr_err("Timeout at CLKCTRL + 0x%x\n", reg_offset);</div><div class='del'>-			return -ETIMEDOUT;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c<br/>index 564a63279f18..02d36de9c4e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-mxs/timer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-mxs/timer.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-mxs/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-mxs/timer.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'>  * MA 02110-1301, USA.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/clockchips.h&gt;</div><div class='hunk'>@@ -243,8 +244,16 @@ static int __init mxs_clocksource_init(struct clk *timer_clk)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init mxs_timer_init(struct clk *timer_clk, int irq)</div><div class='add'>+void __init mxs_timer_init(int irq)</div><div class='ctx'> {</div><div class='add'>+	struct clk *timer_clk;</div><div class='add'>+</div><div class='add'>+	timer_clk = clk_get_sys("timrot", NULL);</div><div class='add'>+	if (IS_ERR(timer_clk)) {</div><div class='add'>+		pr_err("%s: failed to get clk\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	clk_prepare_enable(timer_clk);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig<br/>index 3c5e0f522e9c..365879b47c0e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-nomadik/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-nomadik/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-nomadik/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-nomadik/Kconfig</a></div><div class='hunk'>@@ -15,6 +15,7 @@ config NOMADIK_8815</div><div class='ctx'> config I2C_BITBANG_8815NHK</div><div class='ctx'> 	tristate "Driver for bit-bang busses found on the 8815 NHK"</div><div class='ctx'> 	depends on I2C &amp;&amp; MACH_NOMADIK_8815NHK</div><div class='add'>+	depends on PINCTRL_NOMADIK</div><div class='ctx'> 	select I2C_ALGOBIT</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c<br/>index 58cacafcf662..2e8d3e176bc7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-nomadik/board-nhk8815.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-nomadik/board-nhk8815.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-nomadik/board-nhk8815.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-nomadik/board-nhk8815.c</a></div><div class='hunk'>@@ -111,7 +111,7 @@ static struct nomadik_nand_platform_data nhk8815_nand_data = {</div><div class='ctx'> 	.parts		= nhk8815_partitions,</div><div class='ctx'> 	.nparts		= ARRAY_SIZE(nhk8815_partitions),</div><div class='ctx'> 	.options	= NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING \</div><div class='del'>-			| NAND_NO_READRDY | NAND_NO_AUTOINCR,</div><div class='add'>+			| NAND_NO_READRDY,</div><div class='ctx'> 	.init		= nhk8815_nand_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig<br/>index dfab466ebd1d..cba3f7191cfc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/Kconfig</a></div><div class='hunk'>@@ -132,6 +132,7 @@ config MACH_OMAP_PALMTT</div><div class='ctx'> </div><div class='ctx'> config MACH_SX1</div><div class='ctx'> 	bool "Siemens SX1"</div><div class='add'>+	select I2C</div><div class='ctx'> 	depends on ARCH_OMAP1 &amp;&amp; ARCH_OMAP15XX</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for the Siemens SX1 phone. To boot the kernel,</div><div class='head'>diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile<br/>index 9923f92b5450..398e9e53e189 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/Makefile</a></div><div class='hunk'>@@ -12,6 +12,9 @@ endif</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_OMAP_32K_TIMER)	+= timer32k.o</div><div class='ctx'> </div><div class='add'>+# OCPI interconnect support for 1710, 1610 and 5912</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o</div><div class='add'>+</div><div class='ctx'> # Power Management</div><div class='ctx'> obj-$(CONFIG_PM) += pm.o sleep.o</div><div class='ctx'> </div><div class='hunk'>@@ -28,13 +31,15 @@ usb-fs-$(CONFIG_USB)			:= usb.o</div><div class='ctx'> obj-y					+= $(usb-fs-m) $(usb-fs-y)</div><div class='ctx'> </div><div class='ctx'> # Specific board support</div><div class='del'>-obj-$(CONFIG_MACH_OMAP_H2)		+= board-h2.o board-h2-mmc.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_H2)		+= board-h2.o board-h2-mmc.o \</div><div class='add'>+					   board-nand.o</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP_INNOVATOR)	+= board-innovator.o</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP_GENERIC)		+= board-generic.o</div><div class='del'>-obj-$(CONFIG_MACH_OMAP_PERSEUS2)	+= board-perseus2.o</div><div class='del'>-obj-$(CONFIG_MACH_OMAP_FSAMPLE)		+= board-fsample.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_PERSEUS2)	+= board-perseus2.o board-nand.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_FSAMPLE)		+= board-fsample.o board-nand.o</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP_OSK)		+= board-osk.o</div><div class='del'>-obj-$(CONFIG_MACH_OMAP_H3)		+= board-h3.o board-h3-mmc.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_H3)		+= board-h3.o board-h3-mmc.o \</div><div class='add'>+					   board-nand.o</div><div class='ctx'> obj-$(CONFIG_MACH_VOICEBLUE)		+= board-voiceblue.o</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP_PALMTE)		+= board-palmte.o</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP_PALMZ71)		+= board-palmz71.o</div><div class='head'>diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c<br/>index fcce7ff37630..68e8e5654c0a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/ams-delta-fiq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/ams-delta-fiq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/ams-delta-fiq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/ams-delta-fiq.c</a></div><div class='hunk'>@@ -48,7 +48,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)</div><div class='ctx'> 	struct irq_chip *irq_chip = NULL;</div><div class='ctx'> 	int gpio, irq_num, fiq_count;</div><div class='ctx'> </div><div class='del'>-	irq_desc = irq_to_desc(IH_GPIO_BASE);</div><div class='add'>+	irq_desc = irq_to_desc(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK));</div><div class='ctx'> 	if (irq_desc)</div><div class='ctx'> 		irq_chip = irq_desc-&gt;irq_data.chip;</div><div class='ctx'> </div><div class='hunk'>@@ -102,7 +102,7 @@ void __init ams_delta_init_fiq(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	retval = request_irq(INT_DEFERRED_FIQ, deferred_fiq,</div><div class='del'>-			IRQ_TYPE_EDGE_RISING, "deferred_fiq", 0);</div><div class='add'>+			IRQ_TYPE_EDGE_RISING, "deferred_fiq", NULL);</div><div class='ctx'> 	if (retval &lt; 0) {</div><div class='ctx'> 		pr_err("Failed to get deferred_fiq IRQ, ret=%d\n", retval);</div><div class='ctx'> 		release_fiq(&amp;fh);</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c<br/>index c1b681ef4cba..f2f8a5847018 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-ams-delta.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-ams-delta.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-ams-delta.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-ams-delta.c</a></div><div class='hunk'>@@ -595,7 +595,12 @@ gpio_free:</div><div class='ctx'> 	gpio_free(AMS_DELTA_GPIO_PIN_MODEM_IRQ);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-late_initcall(late_init);</div><div class='add'>+</div><div class='add'>+static void __init ams_delta_init_late(void)</div><div class='add'>+{</div><div class='add'>+	omap1_init_late();</div><div class='add'>+	late_init();</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static void __init ams_delta_map_io(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -611,6 +616,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= ams_delta_init,</div><div class='add'>+	.init_late	= ams_delta_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c<br/>index 80bd43c7f4ec..6872f3fd400f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-fsample.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-fsample.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-fsample.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-fsample.c</a></div><div class='hunk'>@@ -185,20 +185,6 @@ static struct platform_device nor_device = {</div><div class='ctx'> 	.resource	= &amp;nor_resource,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void nand_cmd_ctl(struct mtd_info *mtd, int cmd,	unsigned int ctrl)</div><div class='del'>-{</div><div class='del'>-	struct nand_chip *this = mtd-&gt;priv;</div><div class='del'>-	unsigned long mask;</div><div class='del'>-</div><div class='del'>-	if (cmd == NAND_CMD_NONE)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mask = (ctrl &amp; NAND_CLE) ? 0x02 : 0;</div><div class='del'>-	if (ctrl &amp; NAND_ALE)</div><div class='del'>-		mask |= 0x04;</div><div class='del'>-	writeb(cmd, (unsigned long)this-&gt;IO_ADDR_W | mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define FSAMPLE_NAND_RB_GPIO_PIN	62</div><div class='ctx'> </div><div class='ctx'> static int nand_dev_ready(struct mtd_info *mtd)</div><div class='hunk'>@@ -206,17 +192,14 @@ static int nand_dev_ready(struct mtd_info *mtd)</div><div class='ctx'> 	return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char *part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> static struct platform_nand_data nand_data = {</div><div class='ctx'> 	.chip	= {</div><div class='ctx'> 		.nr_chips		= 1,</div><div class='ctx'> 		.chip_offset		= 0,</div><div class='ctx'> 		.options		= NAND_SAMSUNG_LP_OPTIONS,</div><div class='del'>-		.part_probe_types	= part_probes,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl	= {</div><div class='del'>-		.cmd_ctrl	= nand_cmd_ctl,</div><div class='add'>+		.cmd_ctrl	= omap1_nand_cmd_ctl,</div><div class='ctx'> 		.dev_ready	= nand_dev_ready,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -383,6 +366,7 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= omap_fsample_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c<br/>index 9a5fe581bc1c..e75e2d55a2d7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-generic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-generic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-generic.c</a></div><div class='hunk'>@@ -88,6 +88,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= omap_generic_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c<br/>index 553a2e535764..a28e989a63f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-h2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-h2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-h2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-h2.c</a></div><div class='hunk'>@@ -179,20 +179,6 @@ static struct mtd_partition h2_nand_partitions[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void h2_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)</div><div class='del'>-{</div><div class='del'>-	struct nand_chip *this = mtd-&gt;priv;</div><div class='del'>-	unsigned long mask;</div><div class='del'>-</div><div class='del'>-	if (cmd == NAND_CMD_NONE)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mask = (ctrl &amp; NAND_CLE) ? 0x02 : 0;</div><div class='del'>-	if (ctrl &amp; NAND_ALE)</div><div class='del'>-		mask |= 0x04;</div><div class='del'>-	writeb(cmd, (unsigned long)this-&gt;IO_ADDR_W | mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define H2_NAND_RB_GPIO_PIN	62</div><div class='ctx'> </div><div class='ctx'> static int h2_nand_dev_ready(struct mtd_info *mtd)</div><div class='hunk'>@@ -200,8 +186,6 @@ static int h2_nand_dev_ready(struct mtd_info *mtd)</div><div class='ctx'> 	return gpio_get_value(H2_NAND_RB_GPIO_PIN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char *h2_part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> static struct platform_nand_data h2_nand_platdata = {</div><div class='ctx'> 	.chip	= {</div><div class='ctx'> 		.nr_chips		= 1,</div><div class='hunk'>@@ -209,12 +193,10 @@ static struct platform_nand_data h2_nand_platdata = {</div><div class='ctx'> 		.nr_partitions		= ARRAY_SIZE(h2_nand_partitions),</div><div class='ctx'> 		.partitions		= h2_nand_partitions,</div><div class='ctx'> 		.options		= NAND_SAMSUNG_LP_OPTIONS,</div><div class='del'>-		.part_probe_types	= h2_part_probes,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl	= {</div><div class='del'>-		.cmd_ctrl	= h2_nand_cmd_ctl,</div><div class='add'>+		.cmd_ctrl	= omap1_nand_cmd_ctl,</div><div class='ctx'> 		.dev_ready	= h2_nand_dev_ready,</div><div class='del'>-</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -446,6 +428,7 @@ MACHINE_START(OMAP_H2, "TI-H2")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= h2_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c<br/>index 4c19f4c06851..108a8640fc6f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-h3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-h3.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-h3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-h3.c</a></div><div class='hunk'>@@ -181,20 +181,6 @@ static struct mtd_partition nand_partitions[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)</div><div class='del'>-{</div><div class='del'>-	struct nand_chip *this = mtd-&gt;priv;</div><div class='del'>-	unsigned long mask;</div><div class='del'>-</div><div class='del'>-	if (cmd == NAND_CMD_NONE)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mask = (ctrl &amp; NAND_CLE) ? 0x02 : 0;</div><div class='del'>-	if (ctrl &amp; NAND_ALE)</div><div class='del'>-		mask |= 0x04;</div><div class='del'>-	writeb(cmd, (unsigned long)this-&gt;IO_ADDR_W | mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define H3_NAND_RB_GPIO_PIN	10</div><div class='ctx'> </div><div class='ctx'> static int nand_dev_ready(struct mtd_info *mtd)</div><div class='hunk'>@@ -202,8 +188,6 @@ static int nand_dev_ready(struct mtd_info *mtd)</div><div class='ctx'> 	return gpio_get_value(H3_NAND_RB_GPIO_PIN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char *part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> static struct platform_nand_data nand_platdata = {</div><div class='ctx'> 	.chip	= {</div><div class='ctx'> 		.nr_chips		= 1,</div><div class='hunk'>@@ -211,10 +195,9 @@ static struct platform_nand_data nand_platdata = {</div><div class='ctx'> 		.nr_partitions		= ARRAY_SIZE(nand_partitions),</div><div class='ctx'> 		.partitions		= nand_partitions,</div><div class='ctx'> 		.options		= NAND_SAMSUNG_LP_OPTIONS,</div><div class='del'>-		.part_probe_types	= part_probes,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl	= {</div><div class='del'>-		.cmd_ctrl	= nand_cmd_ctl,</div><div class='add'>+		.cmd_ctrl	= omap1_nand_cmd_ctl,</div><div class='ctx'> 		.dev_ready	= nand_dev_ready,</div><div class='ctx'> </div><div class='ctx'> 	},</div><div class='hunk'>@@ -439,6 +422,7 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= h3_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c<br/>index 60c06ee23855..118a9d4a4c54 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-htcherald.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-htcherald.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-htcherald.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-htcherald.c</a></div><div class='hunk'>@@ -605,6 +605,7 @@ MACHINE_START(HERALD, "HTC Herald")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq       = omap1_init_irq,</div><div class='ctx'> 	.init_machine   = htcherald_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer          = &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c<br/>index 67d7fd57a692..7970223a559d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-innovator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-innovator.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-innovator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-innovator.c</a></div><div class='hunk'>@@ -457,6 +457,7 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= innovator_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-nand.c b/arch/arm/mach-omap1/board-nand.c<br/>new file mode 100644<br/>index 000000000000..4d0835327d20<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-nand.c</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+/*</div><div class='add'>+ * linux/arch/arm/mach-omap1/board-nand.c</div><div class='add'>+ *</div><div class='add'>+ * Common OMAP1 board NAND code</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2004, 2012 Texas Instruments, Inc.</div><div class='add'>+ * Copyright (C) 2002 MontaVista Software, Inc.</div><div class='add'>+ * Copyright (C) 2001 RidgeRun, Inc.</div><div class='add'>+ * Author: RidgeRun, Inc.</div><div class='add'>+ *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/mtd/mtd.h&gt;</div><div class='add'>+#include &lt;linux/mtd/nand.h&gt;</div><div class='add'>+</div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='add'>+void omap1_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)</div><div class='add'>+{</div><div class='add'>+	struct nand_chip *this = mtd-&gt;priv;</div><div class='add'>+	unsigned long mask;</div><div class='add'>+</div><div class='add'>+	if (cmd == NAND_CMD_NONE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mask = (ctrl &amp; NAND_CLE) ? 0x02 : 0;</div><div class='add'>+	if (ctrl &amp; NAND_ALE)</div><div class='add'>+		mask |= 0x04;</div><div class='add'>+</div><div class='add'>+	writeb(cmd, this-&gt;IO_ADDR_W + mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c<br/>index d21dcc2fbc5a..7212ae97f44a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-nokia770.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-nokia770.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-nokia770.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-nokia770.c</a></div><div class='hunk'>@@ -255,6 +255,7 @@ MACHINE_START(NOKIA770, "Nokia 770")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= omap_nokia770_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c<br/>index a5f85dda3f69..da8d872d3d1c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-osk.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-osk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-osk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-osk.c</a></div><div class='hunk'>@@ -574,6 +574,7 @@ MACHINE_START(OMAP_OSK, "TI-OSK")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= osk_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c<br/>index a60e6c22f816..949b62a73693 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-palmte.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-palmte.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-palmte.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-palmte.c</a></div><div class='hunk'>@@ -267,6 +267,7 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= omap_palmte_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c<br/>index 8d854878547b..7f1e1cf2bf46 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-palmtt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-palmtt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-palmtt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-palmtt.c</a></div><div class='hunk'>@@ -313,6 +313,7 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= omap_palmtt_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c<br/>index a2c5abcd7c84..3c71c6bace2c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-palmz71.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-palmz71.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-palmz71.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-palmz71.c</a></div><div class='hunk'>@@ -289,10 +289,10 @@ palmz71_gpio_setup(int early)</div><div class='ctx'> 		gpio_direction_input(PALMZ71_USBDETECT_GPIO);</div><div class='ctx'> 		if (request_irq(gpio_to_irq(PALMZ71_USBDETECT_GPIO),</div><div class='ctx'> 				palmz71_powercable, IRQF_SAMPLE_RANDOM,</div><div class='del'>-				"palmz71-cable", 0))</div><div class='add'>+				"palmz71-cable", NULL))</div><div class='ctx'> 			printk(KERN_ERR</div><div class='ctx'> 					"IRQ request for power cable failed!\n");</div><div class='del'>-		palmz71_powercable(gpio_to_irq(PALMZ71_USBDETECT_GPIO), 0);</div><div class='add'>+		palmz71_powercable(gpio_to_irq(PALMZ71_USBDETECT_GPIO), NULL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -330,6 +330,7 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= omap_palmz71_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c<br/>index 76d4ee05a814..703d55ecffe2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-perseus2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-perseus2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-perseus2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-perseus2.c</a></div><div class='hunk'>@@ -143,20 +143,6 @@ static struct platform_device nor_device = {</div><div class='ctx'> 	.resource	= &amp;nor_resource,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void nand_cmd_ctl(struct mtd_info *mtd, int cmd,	unsigned int ctrl)</div><div class='del'>-{</div><div class='del'>-	struct nand_chip *this = mtd-&gt;priv;</div><div class='del'>-	unsigned long mask;</div><div class='del'>-</div><div class='del'>-	if (cmd == NAND_CMD_NONE)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mask = (ctrl &amp; NAND_CLE) ? 0x02 : 0;</div><div class='del'>-	if (ctrl &amp; NAND_ALE)</div><div class='del'>-		mask |= 0x04;</div><div class='del'>-	writeb(cmd, (unsigned long)this-&gt;IO_ADDR_W | mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define P2_NAND_RB_GPIO_PIN	62</div><div class='ctx'> </div><div class='ctx'> static int nand_dev_ready(struct mtd_info *mtd)</div><div class='hunk'>@@ -164,17 +150,14 @@ static int nand_dev_ready(struct mtd_info *mtd)</div><div class='ctx'> 	return gpio_get_value(P2_NAND_RB_GPIO_PIN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char *part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> static struct platform_nand_data nand_data = {</div><div class='ctx'> 	.chip	= {</div><div class='ctx'> 		.nr_chips		= 1,</div><div class='ctx'> 		.chip_offset		= 0,</div><div class='ctx'> 		.options		= NAND_SAMSUNG_LP_OPTIONS,</div><div class='del'>-		.part_probe_types	= part_probes,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl	= {</div><div class='del'>-		.cmd_ctrl	= nand_cmd_ctl,</div><div class='add'>+		.cmd_ctrl	= omap1_nand_cmd_ctl,</div><div class='ctx'> 		.dev_ready	= nand_dev_ready,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -345,6 +328,7 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= omap_perseus2_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c<br/>index f34cb74a9f41..3b7b82b13684 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-sx1.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-sx1.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-sx1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-sx1.c</a></div><div class='hunk'>@@ -407,6 +407,7 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= omap_sx1_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= omap1_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c<br/>index 37232d04233f..afd67f0ec495 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-voiceblue.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/board-voiceblue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/board-voiceblue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/board-voiceblue.c</a></div><div class='hunk'>@@ -294,6 +294,7 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")</div><div class='ctx'> 	.reserve	= omap_reserve,</div><div class='ctx'> 	.init_irq	= omap1_init_irq,</div><div class='ctx'> 	.init_machine	= voiceblue_init,</div><div class='add'>+	.init_late	= omap1_init_late,</div><div class='ctx'> 	.timer		= &amp;omap1_timer,</div><div class='ctx'> 	.restart	= voiceblue_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c<br/>index 67382ddd8c83..a9ee06b6cb42 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/clock.c</a></div><div class='hunk'>@@ -194,9 +194,8 @@ int omap1_select_table_rate(struct clk *clk, unsigned long rate)</div><div class='ctx'> {</div><div class='ctx'> 	/* Find the highest supported frequency &lt;= rate and switch to it */</div><div class='ctx'> 	struct mpu_rate * ptr;</div><div class='del'>-	unsigned long dpll1_rate, ref_rate;</div><div class='add'>+	unsigned long ref_rate;</div><div class='ctx'> </div><div class='del'>-	dpll1_rate = ck_dpll1_p-&gt;rate;</div><div class='ctx'> 	ref_rate = ck_ref_p-&gt;rate;</div><div class='ctx'> </div><div class='ctx'> 	for (ptr = omap1_rate_table; ptr-&gt;rate; ptr++) {</div><div class='head'>diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h<br/>index af658ad338ec..c2552b24f9f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/common.h</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #define __ARCH_ARM_MACH_OMAP1_COMMON_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/common.h&gt;</div><div class='add'>+#include &lt;linux/mtd/mtd.h&gt;</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)</div><div class='ctx'> void omap7xx_map_io(void);</div><div class='hunk'>@@ -52,12 +53,41 @@ static inline void omap16xx_map_io(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OMAP_SERIAL_WAKE</div><div class='add'>+int omap_serial_wakeup_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int omap_serial_wakeup_init(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> void omap1_init_early(void);</div><div class='ctx'> void omap1_init_irq(void);</div><div class='add'>+void omap1_init_late(void);</div><div class='ctx'> void omap1_restart(char, const char *);</div><div class='ctx'> </div><div class='add'>+extern void __init omap_check_revision(void);</div><div class='add'>+</div><div class='add'>+extern void omap1_nand_cmd_ctl(struct mtd_info *mtd, int cmd,</div><div class='add'>+			       unsigned int ctrl);</div><div class='add'>+</div><div class='ctx'> extern struct sys_timer omap1_timer;</div><div class='del'>-extern bool omap_32k_timer_init(void);</div><div class='del'>-extern void __init omap_init_consistent_dma_size(void);</div><div class='add'>+#ifdef CONFIG_OMAP_32K_TIMER</div><div class='add'>+extern int omap_32k_timer_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int __init omap_32k_timer_init(void)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+extern u32 omap_irq_flags;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARCH_OMAP16XX</div><div class='add'>+extern int ocpi_enable(void);</div><div class='add'>+#else</div><div class='add'>+static inline int ocpi_enable(void) { return 0; }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */</div><div class='head'>diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c<br/>index dcd8ddbec2bb..fa1fa4deb6aa 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/devices.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;plat/tc.h&gt;</div><div class='ctx'> #include &lt;plat/board.h&gt;</div><div class='ctx'> #include &lt;plat/mux.h&gt;</div><div class='add'>+#include &lt;plat/dma.h&gt;</div><div class='ctx'> #include &lt;plat/mmc.h&gt;</div><div class='ctx'> #include &lt;plat/omap7xx.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -31,6 +32,22 @@</div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include "clock.h"</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)</div><div class='add'>+</div><div class='add'>+static struct platform_device omap_pcm = {</div><div class='add'>+	.name	= "omap-pcm-audio",</div><div class='add'>+	.id	= -1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void omap_init_audio(void)</div><div class='add'>+{</div><div class='add'>+	platform_device_register(&amp;omap_pcm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+static inline void omap_init_audio(void) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*-------------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)</div><div class='hunk'>@@ -128,6 +145,56 @@ static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define OMAP_MMC_NR_RES		4</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Register MMC devices.</div><div class='add'>+ */</div><div class='add'>+static int __init omap_mmc_add(const char *name, int id, unsigned long base,</div><div class='add'>+				unsigned long size, unsigned int irq,</div><div class='add'>+				unsigned rx_req, unsigned tx_req,</div><div class='add'>+				struct omap_mmc_platform_data *data)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct resource res[OMAP_MMC_NR_RES];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pdev = platform_device_alloc(name, id);</div><div class='add'>+	if (!pdev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));</div><div class='add'>+	res[0].start = base;</div><div class='add'>+	res[0].end = base + size - 1;</div><div class='add'>+	res[0].flags = IORESOURCE_MEM;</div><div class='add'>+	res[1].start = res[1].end = irq;</div><div class='add'>+	res[1].flags = IORESOURCE_IRQ;</div><div class='add'>+	res[2].start = rx_req;</div><div class='add'>+	res[2].name = "rx";</div><div class='add'>+	res[2].flags = IORESOURCE_DMA;</div><div class='add'>+	res[3].start = tx_req;</div><div class='add'>+	res[3].name = "tx";</div><div class='add'>+	res[3].flags = IORESOURCE_DMA;</div><div class='add'>+</div><div class='add'>+	ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		ret = platform_device_add_data(pdev, data, sizeof(*data));</div><div class='add'>+	if (ret)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = platform_device_add(pdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	/* return device handle to board setup code */</div><div class='add'>+	data-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+fail:</div><div class='add'>+	platform_device_put(pdev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,</div><div class='ctx'> 			int nr_controllers)</div><div class='ctx'> {</div><div class='hunk'>@@ -135,6 +202,7 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; nr_controllers; i++) {</div><div class='ctx'> 		unsigned long base, size;</div><div class='add'>+		unsigned rx_req, tx_req;</div><div class='ctx'> 		unsigned int irq = 0;</div><div class='ctx'> </div><div class='ctx'> 		if (!mmc_data[i])</div><div class='hunk'>@@ -146,19 +214,24 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,</div><div class='ctx'> 		case 0:</div><div class='ctx'> 			base = OMAP1_MMC1_BASE;</div><div class='ctx'> 			irq = INT_MMC;</div><div class='add'>+			rx_req = OMAP_DMA_MMC_RX;</div><div class='add'>+			tx_req = OMAP_DMA_MMC_TX;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 1:</div><div class='ctx'> 			if (!cpu_is_omap16xx())</div><div class='ctx'> 				return;</div><div class='ctx'> 			base = OMAP1_MMC2_BASE;</div><div class='ctx'> 			irq = INT_1610_MMC2;</div><div class='add'>+			rx_req = OMAP_DMA_MMC2_RX;</div><div class='add'>+			tx_req = OMAP_DMA_MMC2_TX;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> 		size = OMAP1_MMC_SIZE;</div><div class='ctx'> </div><div class='del'>-		omap_mmc_add("mmci-omap", i, base, size, irq, mmc_data[i]);</div><div class='add'>+		omap_mmc_add("mmci-omap", i, base, size, irq,</div><div class='add'>+				rx_req, tx_req, mmc_data[i]);</div><div class='ctx'> 	};</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -242,23 +315,48 @@ void __init omap1_camera_init(void *info)</div><div class='ctx'> </div><div class='ctx'> static inline void omap_init_sti(void) {}</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)</div><div class='add'>+/* Numbering for the SPI-capable controllers when used for SPI:</div><div class='add'>+ * spi		= 1</div><div class='add'>+ * uwire	= 2</div><div class='add'>+ * mmc1..2	= 3..4</div><div class='add'>+ * mcbsp1..3	= 5..7</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-static struct platform_device omap_pcm = {</div><div class='del'>-	.name	= "omap-pcm-audio",</div><div class='del'>-	.id	= -1,</div><div class='add'>+#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)</div><div class='add'>+</div><div class='add'>+#define	OMAP_UWIRE_BASE		0xfffb3000</div><div class='add'>+</div><div class='add'>+static struct resource uwire_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start		= OMAP_UWIRE_BASE,</div><div class='add'>+		.end		= OMAP_UWIRE_BASE + 0x20,</div><div class='add'>+		.flags		= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void omap_init_audio(void)</div><div class='add'>+static struct platform_device omap_uwire_device = {</div><div class='add'>+	.name	   = "omap_uwire",</div><div class='add'>+	.id	     = -1,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(uwire_resources),</div><div class='add'>+	.resource	= uwire_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void omap_init_uwire(void)</div><div class='ctx'> {</div><div class='del'>-	platform_device_register(&amp;omap_pcm);</div><div class='del'>-}</div><div class='add'>+	/* FIXME define and use a boot tag; not all boards will be hooking</div><div class='add'>+	 * up devices to the microwire controller, and multi-board configs</div><div class='add'>+	 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='add'>+	/* board-specific code must configure chipselects (only a few</div><div class='add'>+	 * are normally used) and SCLK/SDI/SDO (each has two choices).</div><div class='add'>+	 */</div><div class='add'>+	(void) platform_device_register(&amp;omap_uwire_device);</div><div class='add'>+}</div><div class='ctx'> #else</div><div class='del'>-static inline void omap_init_audio(void) {}</div><div class='add'>+static inline void omap_init_uwire(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/*-------------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This gets called after board-specific INIT_MACHINE, and initializes most</div><div class='hunk'>@@ -292,11 +390,12 @@ static int __init omap1_init_devices(void)</div><div class='ctx'> 	 * in alphabetical order so they're easier to sort through.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='add'>+	omap_init_audio();</div><div class='ctx'> 	omap_init_mbox();</div><div class='ctx'> 	omap_init_rtc();</div><div class='ctx'> 	omap_init_spi100k();</div><div class='ctx'> 	omap_init_sti();</div><div class='del'>-	omap_init_audio();</div><div class='add'>+	omap_init_uwire();</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c<br/>index 76c67b3f9f61..29ec50fc688d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/fpga.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/fpga.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/fpga.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/fpga.c</a></div><div class='hunk'>@@ -87,7 +87,7 @@ static void fpga_mask_ack_irq(struct irq_data *d)</div><div class='ctx'> 	fpga_ack_irq(d);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)</div><div class='add'>+static void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	u32 stat;</div><div class='ctx'> 	int fpga_irq;</div><div class='head'>diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c<br/>index 634903ef8292..ebef15e5e7b7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/gpio15xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/gpio15xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/gpio15xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/gpio15xx.c</a></div><div class='hunk'>@@ -46,7 +46,6 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {</div><div class='del'>-	.virtual_irq_start	= IH_MPUIO_BASE,</div><div class='ctx'> 	.is_mpuio		= true,</div><div class='ctx'> 	.bank_width		= 16,</div><div class='ctx'> 	.bank_stride		= 1,</div><div class='hunk'>@@ -89,7 +88,6 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {</div><div class='del'>-	.virtual_irq_start	= IH_GPIO_BASE,</div><div class='ctx'> 	.bank_width		= 16,</div><div class='ctx'> 	.regs                   = &amp;omap15xx_gpio_regs,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c<br/>index 1fb3b9ad496e..2a48cd2e1754 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/gpio16xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/gpio16xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/gpio16xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/gpio16xx.c</a></div><div class='hunk'>@@ -52,7 +52,6 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {</div><div class='del'>-	.virtual_irq_start	= IH_MPUIO_BASE,</div><div class='ctx'> 	.is_mpuio		= true,</div><div class='ctx'> 	.bank_width		= 16,</div><div class='ctx'> 	.bank_stride		= 1,</div><div class='hunk'>@@ -99,7 +98,6 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {</div><div class='del'>-	.virtual_irq_start	= IH_GPIO_BASE,</div><div class='ctx'> 	.bank_width		= 16,</div><div class='ctx'> 	.regs                   = &amp;omap16xx_gpio_regs,</div><div class='ctx'> };</div><div class='hunk'>@@ -128,7 +126,6 @@ static struct __initdata resource omap16xx_gpio2_resources[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {</div><div class='del'>-	.virtual_irq_start	= IH_GPIO_BASE + 16,</div><div class='ctx'> 	.bank_width		= 16,</div><div class='ctx'> 	.regs                   = &amp;omap16xx_gpio_regs,</div><div class='ctx'> };</div><div class='hunk'>@@ -157,7 +154,6 @@ static struct __initdata resource omap16xx_gpio3_resources[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {</div><div class='del'>-	.virtual_irq_start	= IH_GPIO_BASE + 32,</div><div class='ctx'> 	.bank_width		= 16,</div><div class='ctx'> 	.regs                   = &amp;omap16xx_gpio_regs,</div><div class='ctx'> };</div><div class='hunk'>@@ -186,7 +182,6 @@ static struct __initdata resource omap16xx_gpio4_resources[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {</div><div class='del'>-	.virtual_irq_start	= IH_GPIO_BASE + 48,</div><div class='ctx'> 	.bank_width		= 16,</div><div class='ctx'> 	.regs                   = &amp;omap16xx_gpio_regs,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c<br/>index 4771d6b68b96..acf12b73eace 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/gpio7xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/gpio7xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/gpio7xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/gpio7xx.c</a></div><div class='hunk'>@@ -51,7 +51,6 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {</div><div class='del'>-	.virtual_irq_start	= IH_MPUIO_BASE,</div><div class='ctx'> 	.is_mpuio		= true,</div><div class='ctx'> 	.bank_width		= 16,</div><div class='ctx'> 	.bank_stride		= 2,</div><div class='hunk'>@@ -93,7 +92,6 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {</div><div class='del'>-	.virtual_irq_start	= IH_GPIO_BASE,</div><div class='ctx'> 	.bank_width		= 32,</div><div class='ctx'> 	.regs			= &amp;omap7xx_gpio_regs,</div><div class='ctx'> };</div><div class='hunk'>@@ -122,7 +120,6 @@ static struct __initdata resource omap7xx_gpio2_resources[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = {</div><div class='del'>-	.virtual_irq_start	= IH_GPIO_BASE + 32,</div><div class='ctx'> 	.bank_width		= 32,</div><div class='ctx'> 	.regs			= &amp;omap7xx_gpio_regs,</div><div class='ctx'> };</div><div class='hunk'>@@ -151,7 +148,6 @@ static struct __initdata resource omap7xx_gpio3_resources[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = {</div><div class='del'>-	.virtual_irq_start	= IH_GPIO_BASE + 64,</div><div class='ctx'> 	.bank_width		= 32,</div><div class='ctx'> 	.regs			= &amp;omap7xx_gpio_regs,</div><div class='ctx'> };</div><div class='hunk'>@@ -180,7 +176,6 @@ static struct __initdata resource omap7xx_gpio4_resources[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = {</div><div class='del'>-	.virtual_irq_start	= IH_GPIO_BASE + 96,</div><div class='ctx'> 	.bank_width		= 32,</div><div class='ctx'> 	.regs			= &amp;omap7xx_gpio_regs,</div><div class='ctx'> };</div><div class='hunk'>@@ -209,7 +204,6 @@ static struct __initdata resource omap7xx_gpio5_resources[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = {</div><div class='del'>-	.virtual_irq_start	= IH_GPIO_BASE + 128,</div><div class='ctx'> 	.bank_width		= 32,</div><div class='ctx'> 	.regs			= &amp;omap7xx_gpio_regs,</div><div class='ctx'> };</div><div class='hunk'>@@ -238,7 +232,6 @@ static struct __initdata resource omap7xx_gpio6_resources[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = {</div><div class='del'>-	.virtual_irq_start	= IH_GPIO_BASE + 160,</div><div class='ctx'> 	.bank_width		= 32,</div><div class='ctx'> 	.regs			= &amp;omap7xx_gpio_regs,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c<br/>index 2b28e1da14b0..a1b846aacdaf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/id.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/id.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/id.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/id.c</a></div><div class='hunk'>@@ -21,6 +21,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='ctx'> #define OMAP_DIE_ID_0		0xfffe1800</div><div class='ctx'> #define OMAP_DIE_ID_1		0xfffe1804</div><div class='ctx'> #define OMAP_PRODUCTION_ID_0	0xfffe2000</div><div class='head'>diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c<br/>index d969a7203d14..6c95a59f0f16 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/io.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/io.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/io.c</a></div><div class='hunk'>@@ -18,13 +18,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/mux.h&gt;</div><div class='ctx'> #include &lt;plat/tc.h&gt;</div><div class='add'>+#include &lt;plat/dma.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iomap.h"</div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include "clock.h"</div><div class='ctx'> </div><div class='del'>-extern void omap_check_revision(void);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The machine specific code may provide the extra mapping besides the</div><div class='ctx'>  * default mapping provided here.</div><div class='hunk'>@@ -138,6 +137,11 @@ void __init omap1_init_early(void)</div><div class='ctx'> 	omap_init_consistent_dma_size();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void __init omap1_init_late(void)</div><div class='add'>+{</div><div class='add'>+	omap_serial_wakeup_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * NOTE: Please use ioremap + __raw_read/write where possible instead of these</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c<br/>index 4448114fab72..6995fb6a3345 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/irq.c</a></div><div class='hunk'>@@ -49,6 +49,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='ctx'> #define IRQ_BANK(irq) ((irq) &gt;&gt; 5)</div><div class='ctx'> #define IRQ_BIT(irq)  ((irq) &amp; 0x1f)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c<br/>index 86ace9aaa663..5769c71815b2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/lcd_dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/lcd_dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/lcd_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/lcd_dma.c</a></div><div class='hunk'>@@ -57,7 +57,7 @@ static struct lcd_dma_info {</div><div class='ctx'> 	void *cb_data;</div><div class='ctx'> </div><div class='ctx'> 	int active;</div><div class='del'>-	unsigned long addr, size;</div><div class='add'>+	unsigned long addr;</div><div class='ctx'> 	int rotate, data_type, xres, yres;</div><div class='ctx'> 	int vxres;</div><div class='ctx'> 	int mirror;</div><div class='hunk'>@@ -77,11 +77,6 @@ void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(omap_set_lcd_dma_b1);</div><div class='ctx'> </div><div class='del'>-void omap_set_lcd_dma_src_port(int port)</div><div class='del'>-{</div><div class='del'>-	lcd_dma.src_port = port;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void omap_set_lcd_dma_ext_controller(int external)</div><div class='ctx'> {</div><div class='ctx'> 	lcd_dma.ext_ctrl = external;</div><div class='head'>diff --git a/arch/arm/plat-omap/ocpi.c b/arch/arm/mach-omap1/ocpi.c<br/>index ebe0c73c8901..238170cab5b7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/ocpi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/ocpi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/ocpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/ocpi.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  * Minimal OCP bus support for omap16xx</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2003 - 2005 Nokia Corporation</div><div class='add'>+ * Copyright (C) 2012 Texas Instruments, Inc.</div><div class='ctx'>  * Written by Tony Lindgren &lt;tony@atomide.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Modified for clock framework by Paul Mundt &lt;paul.mundt@nokia.com&gt;.</div><div class='hunk'>@@ -35,6 +36,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='ctx'> #define OCPI_BASE		0xfffec320</div><div class='ctx'> #define OCPI_FAULT		(OCPI_BASE + 0x00)</div><div class='ctx'> #define OCPI_CMD_FAULT		(OCPI_BASE + 0x04)</div><div class='hunk'>@@ -64,7 +67,7 @@ int ocpi_enable(void)</div><div class='ctx'> 	/* Enable access for OHCI in OCPI */</div><div class='ctx'> 	val = omap_readl(OCPI_PROT);</div><div class='ctx'> 	val &amp;= ~0xff;</div><div class='del'>-	//val &amp;= (1 &lt;&lt; 0);	/* Allow access only to EMIFS */</div><div class='add'>+	/* val &amp;= (1 &lt;&lt; 0);	 Allow access only to EMIFS */</div><div class='ctx'> 	omap_writel(val, OCPI_PROT);</div><div class='ctx'> </div><div class='ctx'> 	val = omap_readl(OCPI_SEC);</div><div class='hunk'>@@ -86,7 +89,7 @@ static int __init omap_ocpi_init(void)</div><div class='ctx'> </div><div class='ctx'> 	clk_enable(ocpi_ck);</div><div class='ctx'> 	ocpi_enable();</div><div class='del'>-	printk("OMAP OCPI interconnect driver loaded\n");</div><div class='add'>+	pr_info("OMAP OCPI interconnect driver loaded\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c<br/>index f66c32912b22..b2560d32b3a0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/pm.c</a></div><div class='hunk'>@@ -569,11 +569,10 @@ static int omap_pm_read_proc(</div><div class='ctx'> </div><div class='ctx'> static void omap_pm_init_proc(void)</div><div class='ctx'> {</div><div class='del'>-	struct proc_dir_entry *entry;</div><div class='del'>-</div><div class='del'>-	entry = create_proc_read_entry("driver/omap_pm",</div><div class='del'>-				       S_IWUSR | S_IRUGO, NULL,</div><div class='del'>-				       omap_pm_read_proc, NULL);</div><div class='add'>+	/* XXX Appears to leak memory */</div><div class='add'>+	create_proc_read_entry("driver/omap_pm",</div><div class='add'>+			       S_IWUSR | S_IRUGO, NULL,</div><div class='add'>+			       omap_pm_read_proc, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* DEBUG &amp;&amp; CONFIG_PROC_FS */</div><div class='head'>diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c<br/>index f255b153b863..b17709103866 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/reset.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/reset.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/reset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/reset.c</a></div><div class='hunk'>@@ -8,6 +8,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='ctx'> void omap1_restart(char mode, const char *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c<br/>index 93ae8f29727e..6809c9e56c93 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/serial.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/serial.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/serial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/serial.c</a></div><div class='hunk'>@@ -237,7 +237,7 @@ static void __init omap_serial_set_port_wakeup(int gpio_nr)</div><div class='ctx'> 	enable_irq_wake(gpio_to_irq(gpio_nr));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init omap_serial_wakeup_init(void)</div><div class='add'>+int __init omap_serial_wakeup_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!cpu_is_omap16xx())</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -251,7 +251,6 @@ static int __init omap_serial_wakeup_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-late_initcall(omap_serial_wakeup_init);</div><div class='ctx'> </div><div class='ctx'> #endif	/* CONFIG_OMAP_SERIAL_WAKE */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c<br/>index 4d8dd9a1b04c..4062480bfec7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/time.c</a></div><div class='hunk'>@@ -232,20 +232,6 @@ static inline void omap_mpu_timer_init(void)</div><div class='ctx'> }</div><div class='ctx'> #endif	/* CONFIG_OMAP_MPU_TIMER */</div><div class='ctx'> </div><div class='del'>-static inline int omap_32k_timer_usable(void)</div><div class='del'>-{</div><div class='del'>-	int res = false;</div><div class='del'>-</div><div class='del'>-	if (cpu_is_omap730() || cpu_is_omap15xx())</div><div class='del'>-		return res;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_OMAP_32K_TIMER</div><div class='del'>-	res = omap_32k_timer_init();</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * ---------------------------------------------------------------------------</div><div class='ctx'>  * Timer initialization</div><div class='hunk'>@@ -253,7 +239,7 @@ static inline int omap_32k_timer_usable(void)</div><div class='ctx'>  */</div><div class='ctx'> static void __init omap1_timer_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (!omap_32k_timer_usable())</div><div class='add'>+	if (omap_32k_timer_init() != 0)</div><div class='ctx'> 		omap_mpu_timer_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c<br/>index fb202af01d0d..64c65bcb2d67 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/timer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/timer.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/timer.c</a></div><div class='hunk'>@@ -54,8 +54,7 @@ static int omap1_dm_timer_set_src(struct platform_device *pdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-int __init omap1_dm_timer_init(void)</div><div class='add'>+static int __init omap1_dm_timer_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int ret;</div><div class='head'>diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c<br/>index 325b9a0aa4a0..eae49c3980c9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/timer32k.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/timer32k.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/timer32k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/timer32k.c</a></div><div class='hunk'>@@ -71,6 +71,7 @@</div><div class='ctx'> </div><div class='ctx'> /* 16xx specific defines */</div><div class='ctx'> #define OMAP1_32K_TIMER_BASE		0xfffb9000</div><div class='add'>+#define OMAP1_32KSYNC_TIMER_BASE	0xfffbc400</div><div class='ctx'> #define OMAP1_32K_TIMER_CR		0x08</div><div class='ctx'> #define OMAP1_32K_TIMER_TVR		0x00</div><div class='ctx'> #define OMAP1_32K_TIMER_TCR		0x04</div><div class='hunk'>@@ -182,10 +183,29 @@ static __init void omap_init_32k_timer(void)</div><div class='ctx'>  * Timer initialization</div><div class='ctx'>  * ---------------------------------------------------------------------------</div><div class='ctx'>  */</div><div class='del'>-bool __init omap_32k_timer_init(void)</div><div class='add'>+int __init omap_32k_timer_init(void)</div><div class='ctx'> {</div><div class='del'>-	omap_init_clocksource_32k();</div><div class='del'>-	omap_init_32k_timer();</div><div class='add'>+	int ret = -ENODEV;</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='add'>+	if (cpu_is_omap16xx()) {</div><div class='add'>+		void __iomem *base;</div><div class='add'>+		struct clk *sync32k_ick;</div><div class='add'>+</div><div class='add'>+		base = ioremap(OMAP1_32KSYNC_TIMER_BASE, SZ_1K);</div><div class='add'>+		if (!base) {</div><div class='add'>+			pr_err("32k_counter: failed to map base addr\n");</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		sync32k_ick = clk_get(NULL, "omap_32ksync_ick");</div><div class='add'>+		if (!IS_ERR(sync32k_ick))</div><div class='add'>+			clk_enable(sync32k_ick);</div><div class='add'>+</div><div class='add'>+		ret = omap_init_clocksource_32k(base);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		omap_init_32k_timer();</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c<br/>index 19de03b074e3..e61afd922766 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap1/usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap1/usb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap1/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap1/usb.c</a></div><div class='hunk'>@@ -29,6 +29,8 @@</div><div class='ctx'> #include &lt;plat/mux.h&gt;</div><div class='ctx'> #include &lt;plat/usb.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='ctx'> /* These routines should handle the standard chip-specific modes</div><div class='ctx'>  * for usb0/1/2 ports, covering basic mux and transceiver setup.</div><div class='ctx'>  *</div><div class='hunk'>@@ -138,6 +140,7 @@ static inline void ohci_device_init(struct omap_usb_config *pdata)</div><div class='ctx'> 	if (cpu_is_omap7xx())</div><div class='ctx'> 		ohci_resources[1].start = INT_7XX_USB_HHC_1;</div><div class='ctx'> 	pdata-&gt;ohci_device = &amp;ohci_device;</div><div class='add'>+	pdata-&gt;ocpi_enable = &amp;ocpi_enable;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig<br/>index 8141b76283a6..4cf5142f22cc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/Kconfig</a></div><div class='hunk'>@@ -17,6 +17,7 @@ config ARCH_OMAP2PLUS_TYPICAL</div><div class='ctx'> 	select MENELAUS if ARCH_OMAP2</div><div class='ctx'> 	select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4</div><div class='ctx'> 	select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4</div><div class='add'>+	select HIGHMEM</div><div class='ctx'> 	help</div><div class='ctx'> 	  Compile a kernel suitable for booting most boards</div><div class='ctx'> </div><div class='hunk'>@@ -77,12 +78,12 @@ config SOC_OMAP3430</div><div class='ctx'> 	default y</div><div class='ctx'> 	select ARCH_OMAP_OTG</div><div class='ctx'> </div><div class='del'>-config SOC_OMAPTI81XX</div><div class='add'>+config SOC_TI81XX</div><div class='ctx'> 	bool "TI81XX support"</div><div class='ctx'> 	depends on ARCH_OMAP3</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='del'>-config SOC_OMAPAM33XX</div><div class='add'>+config SOC_AM33XX</div><div class='ctx'> 	bool "AM33XX support"</div><div class='ctx'> 	depends on ARCH_OMAP3</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -319,12 +320,12 @@ config MACH_OMAP_3630SDP</div><div class='ctx'> </div><div class='ctx'> config MACH_TI8168EVM</div><div class='ctx'> 	bool "TI8168 Evaluation Module"</div><div class='del'>-	depends on SOC_OMAPTI81XX</div><div class='add'>+	depends on SOC_TI81XX</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='ctx'> config MACH_TI8148EVM</div><div class='ctx'> 	bool "TI8148 Evaluation Module"</div><div class='del'>-	depends on SOC_OMAPTI81XX</div><div class='add'>+	depends on SOC_TI81XX</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='ctx'> config MACH_OMAP_4430SDP</div><div class='head'>diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile<br/>index 49f92bc1c311..fa742f3c2629 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/Makefile</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> # Common support</div><div class='ctx'> obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \</div><div class='del'>-	 common.o gpio.o dma.o wd_timer.o display.o i2c.o</div><div class='add'>+	 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o</div><div class='ctx'> </div><div class='ctx'> omap-2-3-common				= irq.o sdrc.o</div><div class='ctx'> hwmod-common				= omap_hwmod.o \</div><div class='hunk'>@@ -24,10 +24,11 @@ endif</div><div class='ctx'> obj-$(CONFIG_TWL4030_CORE) += omap_twl.o</div><div class='ctx'> </div><div class='ctx'> # SMP support ONLY available for OMAP4</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_SMP)			+= omap-smp.o omap-headsmp.o</div><div class='ctx'> obj-$(CONFIG_HOTPLUG_CPU)		+= omap-hotplug.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP4)		+= omap4-common.o omap-wakeupgen.o \</div><div class='del'>-					   sleep44xx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= omap4-common.o omap-wakeupgen.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= sleep44xx.o</div><div class='ctx'> </div><div class='ctx'> plus_sec := $(call as-instr,.arch_extension sec,+sec)</div><div class='ctx'> AFLAGS_omap-headsmp.o			:=-Wa,-march=armv7-a$(plus_sec)</div><div class='hunk'>@@ -64,10 +65,10 @@ endif</div><div class='ctx'> ifeq ($(CONFIG_PM),y)</div><div class='ctx'> obj-$(CONFIG_ARCH_OMAP2)		+= pm24xx.o</div><div class='ctx'> obj-$(CONFIG_ARCH_OMAP2)		+= sleep24xx.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP3)		+= pm34xx.o sleep34xx.o \</div><div class='del'>-					   cpuidle34xx.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o omap-mpuss-lowpower.o \</div><div class='del'>-					   cpuidle44xx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= pm34xx.o sleep34xx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= cpuidle34xx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o omap-mpuss-lowpower.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= cpuidle44xx.o</div><div class='ctx'> obj-$(CONFIG_PM_DEBUG)			+= pm-debug.o</div><div class='ctx'> obj-$(CONFIG_OMAP_SMARTREFLEX)          += sr_device.o smartreflex.o</div><div class='ctx'> obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3)	+= smartreflex-class3.o</div><div class='hunk'>@@ -84,88 +85,86 @@ endif</div><div class='ctx'> # PRCM</div><div class='ctx'> obj-y					+= prm_common.o</div><div class='ctx'> obj-$(CONFIG_ARCH_OMAP2)		+= prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP3)		+= prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o \</div><div class='del'>-					   vc3xxx_data.o vp3xxx_data.o</div><div class='del'>-# XXX The presence of cm2xxx_3xxx.o on the line below is temporary and</div><div class='del'>-# will be removed once the OMAP4 part of the codebase is converted to</div><div class='del'>-# use OMAP4-specific PRCM functions.</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP4)		+= prcm.o cm2xxx_3xxx.o cminst44xx.o \</div><div class='del'>-					   cm44xx.o prcm_mpu44xx.o \</div><div class='del'>-					   prminst44xx.o vc44xx_data.o \</div><div class='del'>-					   vp44xx_data.o prm44xx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= vc3xxx_data.o vp3xxx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= prcm.o cminst44xx.o cm44xx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= prcm_mpu44xx.o prminst44xx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= vc44xx_data.o vp44xx_data.o prm44xx.o</div><div class='ctx'> </div><div class='ctx'> # OMAP voltage domains</div><div class='ctx'> voltagedomain-common			:= voltage.o vc.o vp.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP2)		+= $(voltagedomain-common) \</div><div class='del'>-					   voltagedomains2xxx_data.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP3)		+= $(voltagedomain-common) \</div><div class='del'>-					   voltagedomains3xxx_data.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP4)		+= $(voltagedomain-common) \</div><div class='del'>-					   voltagedomains44xx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= $(voltagedomain-common)</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= voltagedomains2xxx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= $(voltagedomain-common)</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= voltagedomains3xxx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= $(voltagedomain-common)</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= voltagedomains44xx_data.o</div><div class='ctx'> </div><div class='ctx'> # OMAP powerdomain framework</div><div class='ctx'> powerdomain-common			+= powerdomain.o powerdomain-common.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP2)		+= $(powerdomain-common) \</div><div class='del'>-					   powerdomain2xxx_3xxx.o \</div><div class='del'>-					   powerdomains2xxx_data.o \</div><div class='del'>-					   powerdomains2xxx_3xxx_data.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP3)		+= $(powerdomain-common) \</div><div class='del'>-					   powerdomain2xxx_3xxx.o \</div><div class='del'>-					   powerdomains3xxx_data.o \</div><div class='del'>-					   powerdomains2xxx_3xxx_data.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP4)		+= $(powerdomain-common) \</div><div class='del'>-					   powerdomain44xx.o \</div><div class='del'>-					   powerdomains44xx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= $(powerdomain-common)</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= powerdomains2xxx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= powerdomain2xxx_3xxx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= powerdomains2xxx_3xxx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= $(powerdomain-common)</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= powerdomain2xxx_3xxx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= powerdomains3xxx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= powerdomains2xxx_3xxx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= $(powerdomain-common)</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= powerdomain44xx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= powerdomains44xx_data.o</div><div class='ctx'> </div><div class='ctx'> # PRCM clockdomain control</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP2)		+= clockdomain.o \</div><div class='del'>-					   clockdomain2xxx_3xxx.o \</div><div class='del'>-					   clockdomains2xxx_3xxx_data.o</div><div class='add'>+clockdomain-common			+= clockdomain.o</div><div class='add'>+clockdomain-common			+= clockdomains_common_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= $(clockdomain-common)</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= clockdomain2xxx_3xxx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= clockdomains2xxx_3xxx_data.o</div><div class='ctx'> obj-$(CONFIG_SOC_OMAP2420)		+= clockdomains2420_data.o</div><div class='ctx'> obj-$(CONFIG_SOC_OMAP2430)		+= clockdomains2430_data.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP3)		+= clockdomain.o \</div><div class='del'>-					   clockdomain2xxx_3xxx.o \</div><div class='del'>-					   clockdomains2xxx_3xxx_data.o \</div><div class='del'>-					   clockdomains3xxx_data.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP4)		+= clockdomain.o \</div><div class='del'>-					   clockdomain44xx.o \</div><div class='del'>-					   clockdomains44xx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= $(clockdomain-common)</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= clockdomain2xxx_3xxx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= clockdomains2xxx_3xxx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= clockdomains3xxx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= $(clockdomain-common)</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= clockdomain44xx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= clockdomains44xx_data.o</div><div class='ctx'> </div><div class='ctx'> # Clock framework</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP2)		+= $(clock-common) clock2xxx.o \</div><div class='del'>-					   clkt2xxx_sys.o \</div><div class='del'>-					   clkt2xxx_dpllcore.o \</div><div class='del'>-					   clkt2xxx_virt_prcm_set.o \</div><div class='del'>-					   clkt2xxx_apll.o clkt2xxx_osc.o \</div><div class='del'>-					   clkt2xxx_dpll.o clkt_iclk.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= $(clock-common) clock2xxx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_sys.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_dpllcore.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_virt_prcm_set.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_apll.o clkt2xxx_osc.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_dpll.o clkt_iclk.o</div><div class='ctx'> obj-$(CONFIG_SOC_OMAP2420)		+= clock2420_data.o</div><div class='ctx'> obj-$(CONFIG_SOC_OMAP2430)		+= clock2430.o clock2430_data.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP3)		+= $(clock-common) clock3xxx.o \</div><div class='del'>-					   clock34xx.o clkt34xx_dpll3m2.o \</div><div class='del'>-					   clock3517.o clock36xx.o \</div><div class='del'>-					   dpll3xxx.o clock3xxx_data.o \</div><div class='del'>-					   clkt_iclk.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP4)		+= $(clock-common) clock44xx_data.o \</div><div class='del'>-					   dpll3xxx.o dpll44xx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= $(clock-common) clock3xxx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= clock34xx.o clkt34xx_dpll3m2.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= clock3517.o clock36xx.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= dpll3xxx.o clock3xxx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= clkt_iclk.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= $(clock-common) clock44xx_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP4)		+= dpll3xxx.o dpll44xx.o</div><div class='ctx'> </div><div class='ctx'> # OMAP2 clock rate set data (old "OPP" data)</div><div class='ctx'> obj-$(CONFIG_SOC_OMAP2420)		+= opp2420_data.o</div><div class='ctx'> obj-$(CONFIG_SOC_OMAP2430)		+= opp2430_data.o</div><div class='ctx'> </div><div class='ctx'> # hwmod data</div><div class='del'>-obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2xxx_ipblock_data.o \</div><div class='del'>-					   omap_hwmod_2xxx_3xxx_ipblock_data.o \</div><div class='del'>-					   omap_hwmod_2xxx_interconnect_data.o \</div><div class='del'>-					   omap_hwmod_2xxx_3xxx_interconnect_data.o \</div><div class='del'>-					   omap_hwmod_2420_data.o</div><div class='del'>-obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2xxx_ipblock_data.o \</div><div class='del'>-					   omap_hwmod_2xxx_3xxx_ipblock_data.o \</div><div class='del'>-					   omap_hwmod_2xxx_interconnect_data.o \</div><div class='del'>-					   omap_hwmod_2xxx_3xxx_interconnect_data.o \</div><div class='del'>-					   omap_hwmod_2430_data.o</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP3)		+= omap_hwmod_2xxx_3xxx_ipblock_data.o \</div><div class='del'>-					   omap_hwmod_2xxx_3xxx_interconnect_data.o \</div><div class='del'>-					   omap_hwmod_3xxx_data.o</div><div class='add'>+obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2xxx_ipblock_data.o</div><div class='add'>+obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2xxx_3xxx_ipblock_data.o</div><div class='add'>+obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2xxx_interconnect_data.o</div><div class='add'>+obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2xxx_3xxx_interconnect_data.o</div><div class='add'>+obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2420_data.o</div><div class='add'>+obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2xxx_ipblock_data.o</div><div class='add'>+obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2xxx_3xxx_ipblock_data.o</div><div class='add'>+obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2xxx_interconnect_data.o</div><div class='add'>+obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2xxx_3xxx_interconnect_data.o</div><div class='add'>+obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2430_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= omap_hwmod_2xxx_3xxx_ipblock_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= omap_hwmod_2xxx_3xxx_interconnect_data.o</div><div class='add'>+obj-$(CONFIG_ARCH_OMAP3)		+= omap_hwmod_3xxx_data.o</div><div class='ctx'> obj-$(CONFIG_ARCH_OMAP4)		+= omap_hwmod_44xx_data.o</div><div class='ctx'> </div><div class='ctx'> # EMU peripherals</div><div class='hunk'>@@ -187,6 +186,9 @@ ifneq ($(CONFIG_TIDSPBRIDGE),)</div><div class='ctx'> obj-y					+= dsp.o</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+# OMAP2420 MSDI controller integration support ("MMC")</div><div class='add'>+obj-$(CONFIG_SOC_OMAP2420)		+= msdi.o</div><div class='add'>+</div><div class='ctx'> # Specific board support</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP_GENERIC)		+= board-generic.o</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP_H4)		+= board-h4.o</div><div class='hunk'>@@ -203,23 +205,19 @@ obj-$(CONFIG_MACH_OMAP3EVM)		+= board-omap3evm.o</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP3_PANDORA)	+= board-omap3pandora.o</div><div class='ctx'> obj-$(CONFIG_MACH_OMAP_3430SDP)		+= board-3430sdp.o</div><div class='ctx'> obj-$(CONFIG_MACH_NOKIA_N8X0)		+= board-n8x0.o</div><div class='del'>-obj-$(CONFIG_MACH_NOKIA_RM680)		+= board-rm680.o \</div><div class='del'>-					   sdram-nokia.o</div><div class='del'>-obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51.o \</div><div class='del'>-					   sdram-nokia.o \</div><div class='del'>-					   board-rx51-peripherals.o \</div><div class='del'>-					   board-rx51-video.o</div><div class='del'>-obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom.o \</div><div class='del'>-					   board-zoom-peripherals.o \</div><div class='del'>-					   board-zoom-display.o \</div><div class='del'>-					   board-zoom-debugboard.o</div><div class='del'>-obj-$(CONFIG_MACH_OMAP_ZOOM3)		+= board-zoom.o \</div><div class='del'>-					   board-zoom-peripherals.o \</div><div class='del'>-					   board-zoom-display.o \</div><div class='del'>-					   board-zoom-debugboard.o</div><div class='del'>-obj-$(CONFIG_MACH_OMAP_3630SDP)		+= board-3630sdp.o \</div><div class='del'>-					   board-zoom-peripherals.o \</div><div class='del'>-					   board-zoom-display.o</div><div class='add'>+obj-$(CONFIG_MACH_NOKIA_RM680)		+= board-rm680.o sdram-nokia.o</div><div class='add'>+obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51.o sdram-nokia.o</div><div class='add'>+obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-peripherals.o</div><div class='add'>+obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51-video.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom.o board-zoom-peripherals.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom-display.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_ZOOM2)		+= board-zoom-debugboard.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_ZOOM3)		+= board-zoom.o board-zoom-peripherals.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_ZOOM3)		+= board-zoom-display.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_ZOOM3)		+= board-zoom-debugboard.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_3630SDP)		+= board-3630sdp.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_3630SDP)		+= board-zoom-peripherals.o</div><div class='add'>+obj-$(CONFIG_MACH_OMAP_3630SDP)		+= board-zoom-display.o</div><div class='ctx'> obj-$(CONFIG_MACH_CM_T35)		+= board-cm-t35.o</div><div class='ctx'> obj-$(CONFIG_MACH_CM_T3517)		+= board-cm-t3517.o</div><div class='ctx'> obj-$(CONFIG_MACH_IGEP0020)		+= board-igep0020.o</div><div class='head'>diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c<br/>index 1f97e7475206..447682c4e11c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/am35xx-emac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/am35xx-emac.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/am35xx-emac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/am35xx-emac.c</a></div><div class='hunk'>@@ -39,26 +39,23 @@ static struct platform_device am35xx_emac_mdio_device = {</div><div class='ctx'> </div><div class='ctx'> static void am35xx_enable_emac_int(void)</div><div class='ctx'> {</div><div class='del'>-	u32 regval;</div><div class='del'>-</div><div class='del'>-	regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);</div><div class='del'>-	regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |</div><div class='del'>-		  AM35XX_CPGMAC_C0_TX_PULSE_CLR |</div><div class='del'>-		  AM35XX_CPGMAC_C0_MISC_PULSE_CLR |</div><div class='del'>-		  AM35XX_CPGMAC_C0_RX_THRESH_CLR);</div><div class='del'>-	omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);</div><div class='del'>-	regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);</div><div class='add'>+	u32 v;</div><div class='add'>+</div><div class='add'>+	v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);</div><div class='add'>+	v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR |</div><div class='add'>+	      AM35XX_CPGMAC_C0_MISC_PULSE_CLR | AM35XX_CPGMAC_C0_RX_THRESH_CLR);</div><div class='add'>+	omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);</div><div class='add'>+	omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void am35xx_disable_emac_int(void)</div><div class='ctx'> {</div><div class='del'>-	u32 regval;</div><div class='add'>+	u32 v;</div><div class='ctx'> </div><div class='del'>-	regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);</div><div class='del'>-	regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |</div><div class='del'>-		  AM35XX_CPGMAC_C0_TX_PULSE_CLR);</div><div class='del'>-	omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);</div><div class='del'>-	regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);</div><div class='add'>+	v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);</div><div class='add'>+	v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR);</div><div class='add'>+	omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);</div><div class='add'>+	omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct emac_platform_data am35xx_emac_pdata = {</div><div class='hunk'>@@ -92,7 +89,7 @@ static struct platform_device am35xx_emac_device = {</div><div class='ctx'> </div><div class='ctx'> void __init am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en)</div><div class='ctx'> {</div><div class='del'>-	unsigned int regval;</div><div class='add'>+	u32 v;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	am35xx_emac_pdata.rmii_en = rmii_en;</div><div class='hunk'>@@ -110,8 +107,8 @@ void __init am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);</div><div class='del'>-	regval = regval &amp; (~(AM35XX_CPGMACSS_SW_RST));</div><div class='del'>-	omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);</div><div class='del'>-	regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);</div><div class='add'>+	v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);</div><div class='add'>+	v &amp;= ~AM35XX_CPGMACSS_SW_RST;</div><div class='add'>+	omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);</div><div class='add'>+	omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c<br/>index e658f835d0de..99ca6bad5c30 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-2430sdp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-2430sdp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-2430sdp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-2430sdp.c</a></div><div class='hunk'>@@ -303,6 +303,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")</div><div class='ctx'> 	.init_irq	= omap2_init_irq,</div><div class='ctx'> 	.handle_irq	= omap2_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_2430sdp_init,</div><div class='add'>+	.init_late	= omap2430_init_late,</div><div class='ctx'> 	.timer		= &amp;omap2_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c<br/>index da75f239873e..a98c688058a9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-3430sdp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-3430sdp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-3430sdp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-3430sdp.c</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> #include &lt;plat/dma.h&gt;</div><div class='ctx'> #include &lt;plat/gpmc.h&gt;</div><div class='ctx'> #include &lt;video/omapdss.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-dvi.h&gt;</div><div class='add'>+#include &lt;video/omap-panel-tfp410.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/gpmc-smc91x.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -113,9 +113,6 @@ static struct gpio sdp3430_dss_gpios[] __initdata = {</div><div class='ctx'> 	{SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int lcd_enabled;</div><div class='del'>-static int dvi_enabled;</div><div class='del'>-</div><div class='ctx'> static void __init sdp3430_display_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='hunk'>@@ -129,44 +126,18 @@ static void __init sdp3430_display_init(void)</div><div class='ctx'> </div><div class='ctx'> static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)</div><div class='ctx'> {</div><div class='del'>-	if (dvi_enabled) {</div><div class='del'>-		printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);</div><div class='ctx'> 	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);</div><div class='ctx'> </div><div class='del'>-	lcd_enabled = 1;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)</div><div class='ctx'> {</div><div class='del'>-	lcd_enabled = 0;</div><div class='del'>-</div><div class='ctx'> 	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);</div><div class='ctx'> 	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	if (lcd_enabled) {</div><div class='del'>-		printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dvi_enabled = 1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	dvi_enabled = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -186,15 +157,14 @@ static struct omap_dss_device sdp3430_lcd_device = {</div><div class='ctx'> 	.platform_disable	= sdp3430_panel_disable_lcd,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct panel_dvi_platform_data dvi_panel = {</div><div class='del'>-	.platform_enable	= sdp3430_panel_enable_dvi,</div><div class='del'>-	.platform_disable	= sdp3430_panel_disable_dvi,</div><div class='add'>+static struct tfp410_platform_data dvi_panel = {</div><div class='add'>+	.power_down_gpio	= -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_dss_device sdp3430_dvi_device = {</div><div class='ctx'> 	.name			= "dvi",</div><div class='ctx'> 	.type			= OMAP_DISPLAY_TYPE_DPI,</div><div class='del'>-	.driver_name		= "dvi",</div><div class='add'>+	.driver_name		= "tfp410",</div><div class='ctx'> 	.data			= &amp;dvi_panel,</div><div class='ctx'> 	.phy.dpi.data_lines	= 24,</div><div class='ctx'> };</div><div class='hunk'>@@ -635,6 +605,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_3430sdp_init,</div><div class='add'>+	.init_late	= omap3430_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c<br/>index 6ef350d1ae4f..2dc9ba523c7a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-3630sdp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-3630sdp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-3630sdp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-3630sdp.c</a></div><div class='hunk'>@@ -217,6 +217,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_sdp_init,</div><div class='add'>+	.init_late	= omap3630_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c<br/>index 130ab00c09a2..8e17284a803f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-4430sdp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-4430sdp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-4430sdp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-4430sdp.c</a></div><div class='hunk'>@@ -384,6 +384,11 @@ static struct platform_device sdp4430_dmic_codec = {</div><div class='ctx'> 	.id	= -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct platform_device sdp4430_hdmi_audio_codec = {</div><div class='add'>+	.name	= "hdmi-audio-codec",</div><div class='add'>+	.id	= -1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct omap_abe_twl6040_data sdp4430_abe_audio_data = {</div><div class='ctx'> 	.card_name = "SDP4430",</div><div class='ctx'> 	.has_hs		= ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,</div><div class='hunk'>@@ -418,6 +423,7 @@ static struct platform_device *sdp4430_devices[] __initdata = {</div><div class='ctx'> 	&amp;sdp4430_vbat,</div><div class='ctx'> 	&amp;sdp4430_dmic_codec,</div><div class='ctx'> 	&amp;sdp4430_abe_audio,</div><div class='add'>+	&amp;sdp4430_hdmi_audio_codec,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_musb_board_data musb_board_data = {</div><div class='hunk'>@@ -489,50 +495,6 @@ static struct platform_device omap_vwlan_device = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int omap4_twl6030_hsmmc_late_init(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	int irq = 0;</div><div class='del'>-	struct platform_device *pdev = container_of(dev,</div><div class='del'>-				struct platform_device, dev);</div><div class='del'>-	struct omap_mmc_platform_data *pdata = dev-&gt;platform_data;</div><div class='del'>-</div><div class='del'>-	/* Setting MMC1 Card detect Irq */</div><div class='del'>-	if (pdev-&gt;id == 0) {</div><div class='del'>-		irq = twl6030_mmc_card_detect_config();</div><div class='del'>-		if (irq &lt; 0) {</div><div class='del'>-			pr_err("Failed configuring MMC1 card detect\n");</div><div class='del'>-			return irq;</div><div class='del'>-		}</div><div class='del'>-		pdata-&gt;slots[0].card_detect_irq = irq;</div><div class='del'>-		pdata-&gt;slots[0].card_detect = twl6030_mmc_card_detect;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct omap_mmc_platform_data *pdata;</div><div class='del'>-</div><div class='del'>-	/* dev can be null if CONFIG_MMC_OMAP_HS is not set */</div><div class='del'>-	if (!dev) {</div><div class='del'>-		pr_err("Failed %s\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	pdata = dev-&gt;platform_data;</div><div class='del'>-	pdata-&gt;init =	omap4_twl6030_hsmmc_late_init;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)</div><div class='del'>-{</div><div class='del'>-	struct omap2_hsmmc_info *c;</div><div class='del'>-</div><div class='del'>-	omap_hsmmc_init(controllers);</div><div class='del'>-	for (c = controllers; c-&gt;mmc; c++)</div><div class='del'>-		omap4_twl6030_hsmmc_set_late_init(&amp;c-&gt;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct regulator_init_data sdp4430_vaux1 = {</div><div class='ctx'> 	.constraints = {</div><div class='ctx'> 		.min_uV			= 1000000,</div><div class='hunk'>@@ -615,7 +577,9 @@ static int __init omap4_i2c_init(void)</div><div class='ctx'> 			TWL_COMMON_REGULATOR_VANA |</div><div class='ctx'> 			TWL_COMMON_REGULATOR_VCXIO |</div><div class='ctx'> 			TWL_COMMON_REGULATOR_VUSB |</div><div class='del'>-			TWL_COMMON_REGULATOR_CLK32KG);</div><div class='add'>+			TWL_COMMON_REGULATOR_CLK32KG |</div><div class='add'>+			TWL_COMMON_REGULATOR_V1V8 |</div><div class='add'>+			TWL_COMMON_REGULATOR_V2V1);</div><div class='ctx'> 	omap4_pmic_init("twl6030", &amp;sdp4430_twldata,</div><div class='ctx'> 			&amp;twl6040_data, OMAP44XX_IRQ_SYS_2N);</div><div class='ctx'> 	omap_register_i2c_bus(2, 400, NULL, 0);</div><div class='hunk'>@@ -666,6 +630,10 @@ static struct nokia_dsi_panel_data dsi1_panel = {</div><div class='ctx'> 		.use_ext_te	= false,</div><div class='ctx'> 		.ext_te_gpio	= 101,</div><div class='ctx'> 		.esd_interval	= 0,</div><div class='add'>+		.pin_config = {</div><div class='add'>+			.num_pins	= 6,</div><div class='add'>+			.pins		= { 0, 1, 2, 3, 4, 5 },</div><div class='add'>+		},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_dss_device sdp4430_lcd_device = {</div><div class='hunk'>@@ -674,13 +642,6 @@ static struct omap_dss_device sdp4430_lcd_device = {</div><div class='ctx'> 	.type			= OMAP_DISPLAY_TYPE_DSI,</div><div class='ctx'> 	.data			= &amp;dsi1_panel,</div><div class='ctx'> 	.phy.dsi		= {</div><div class='del'>-		.clk_lane	= 1,</div><div class='del'>-		.clk_pol	= 0,</div><div class='del'>-		.data1_lane	= 2,</div><div class='del'>-		.data1_pol	= 0,</div><div class='del'>-		.data2_lane	= 3,</div><div class='del'>-		.data2_pol	= 0,</div><div class='del'>-</div><div class='ctx'> 		.module		= 0,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='hunk'>@@ -715,6 +676,10 @@ static struct nokia_dsi_panel_data dsi2_panel = {</div><div class='ctx'> 		.use_ext_te	= false,</div><div class='ctx'> 		.ext_te_gpio	= 103,</div><div class='ctx'> 		.esd_interval	= 0,</div><div class='add'>+		.pin_config = {</div><div class='add'>+			.num_pins	= 6,</div><div class='add'>+			.pins		= { 0, 1, 2, 3, 4, 5 },</div><div class='add'>+		},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_dss_device sdp4430_lcd2_device = {</div><div class='hunk'>@@ -723,12 +688,6 @@ static struct omap_dss_device sdp4430_lcd2_device = {</div><div class='ctx'> 	.type			= OMAP_DISPLAY_TYPE_DSI,</div><div class='ctx'> 	.data			= &amp;dsi2_panel,</div><div class='ctx'> 	.phy.dsi		= {</div><div class='del'>-		.clk_lane	= 1,</div><div class='del'>-		.clk_pol	= 0,</div><div class='del'>-		.data1_lane	= 2,</div><div class='del'>-		.data1_pol	= 0,</div><div class='del'>-		.data2_lane	= 3,</div><div class='del'>-		.data2_pol	= 0,</div><div class='ctx'> </div><div class='ctx'> 		.module		= 1,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -758,21 +717,6 @@ static struct omap_dss_device sdp4430_lcd2_device = {</div><div class='ctx'> 	.channel		= OMAP_DSS_CHANNEL_LCD2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void sdp4430_lcd_init(void)</div><div class='del'>-{</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	r = gpio_request_one(dsi1_panel.reset_gpio, GPIOF_DIR_OUT,</div><div class='del'>-		"lcd1_reset_gpio");</div><div class='del'>-	if (r)</div><div class='del'>-		pr_err("%s: Could not get lcd1_reset_gpio\n", __func__);</div><div class='del'>-</div><div class='del'>-	r = gpio_request_one(dsi2_panel.reset_gpio, GPIOF_DIR_OUT,</div><div class='del'>-		"lcd2_reset_gpio");</div><div class='del'>-	if (r)</div><div class='del'>-		pr_err("%s: Could not get lcd2_reset_gpio\n", __func__);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct omap_dss_hdmi_data sdp4430_hdmi_data = {</div><div class='ctx'> 	.hpd_gpio = HDMI_GPIO_HPD,</div><div class='ctx'> };</div><div class='hunk'>@@ -858,7 +802,6 @@ static void __init omap_4430sdp_display_init(void)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		pr_err("%s: Could not get display_sel GPIO\n", __func__);</div><div class='ctx'> </div><div class='del'>-	sdp4430_lcd_init();</div><div class='ctx'> 	sdp4430_picodlp_init();</div><div class='ctx'> 	omap_display_init(&amp;sdp4430_dss_data);</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -969,6 +912,7 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")</div><div class='ctx'> 	.init_irq	= gic_init_irq,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_4430sdp_init,</div><div class='add'>+	.init_late	= omap4430_init_late,</div><div class='ctx'> 	.timer		= &amp;omap4_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c<br/>index c3851e8de28b..92432c28673d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-am3517crane.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-am3517crane.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-am3517crane.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-am3517crane.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include &lt;plat/usb.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "am35xx-emac.h"</div><div class='ctx'> #include "mux.h"</div><div class='ctx'> #include "control.h"</div><div class='ctx'> </div><div class='hunk'>@@ -90,6 +91,7 @@ static void __init am3517_crane_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	usbhs_init(&amp;usbhs_bdata);</div><div class='add'>+	am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")</div><div class='hunk'>@@ -100,6 +102,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= am3517_crane_init,</div><div class='add'>+	.init_late	= am35xx_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c<br/>index 3645285a3e2b..18f601096ce1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-am3517evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-am3517evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-am3517evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-am3517evm.c</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> #include &lt;plat/usb.h&gt;</div><div class='ctx'> #include &lt;video/omapdss.h&gt;</div><div class='ctx'> #include &lt;video/omap-panel-generic-dpi.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-dvi.h&gt;</div><div class='add'>+#include &lt;video/omap-panel-tfp410.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "am35xx-emac.h"</div><div class='ctx'> #include "mux.h"</div><div class='hunk'>@@ -207,31 +207,14 @@ static struct omap_dss_device am3517_evm_tv_device = {</div><div class='ctx'> 	.platform_disable	= am3517_evm_panel_disable_tv,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int am3517_evm_panel_enable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	if (lcd_enabled) {</div><div class='del'>-		printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	dvi_enabled = 1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void am3517_evm_panel_disable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	dvi_enabled = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct panel_dvi_platform_data dvi_panel = {</div><div class='del'>-	.platform_enable	= am3517_evm_panel_enable_dvi,</div><div class='del'>-	.platform_disable	= am3517_evm_panel_disable_dvi,</div><div class='add'>+static struct tfp410_platform_data dvi_panel = {</div><div class='add'>+	.power_down_gpio	= -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_dss_device am3517_evm_dvi_device = {</div><div class='ctx'> 	.type			= OMAP_DISPLAY_TYPE_DPI,</div><div class='ctx'> 	.name			= "dvi",</div><div class='del'>-	.driver_name		= "dvi",</div><div class='add'>+	.driver_name		= "tfp410",</div><div class='ctx'> 	.data			= &amp;dvi_panel,</div><div class='ctx'> 	.phy.dpi.data_lines	= 24,</div><div class='ctx'> };</div><div class='hunk'>@@ -402,6 +385,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= am3517_evm_init,</div><div class='add'>+	.init_late	= am35xx_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c<br/>index 768ece2e9c3b..502c31e123be 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-apollon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-apollon.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-apollon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-apollon.c</a></div><div class='hunk'>@@ -356,6 +356,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")</div><div class='ctx'> 	.init_irq	= omap2_init_irq,</div><div class='ctx'> 	.handle_irq	= omap2_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_apollon_init,</div><div class='add'>+	.init_late	= omap2420_init_late,</div><div class='ctx'> 	.timer		= &amp;omap2_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c<br/>index 909a8b91b564..ded100c80a91 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-cm-t35.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-cm-t35.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-cm-t35.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-cm-t35.c</a></div><div class='hunk'>@@ -44,7 +44,7 @@</div><div class='ctx'> #include &lt;plat/usb.h&gt;</div><div class='ctx'> #include &lt;video/omapdss.h&gt;</div><div class='ctx'> #include &lt;video/omap-panel-generic-dpi.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-dvi.h&gt;</div><div class='add'>+#include &lt;video/omap-panel-tfp410.h&gt;</div><div class='ctx'> #include &lt;plat/mcspi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='hunk'>@@ -218,25 +218,6 @@ static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)</div><div class='ctx'> 	gpio_set_value(CM_T35_LCD_EN_GPIO, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	if (lcd_enabled) {</div><div class='del'>-		printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gpio_set_value(CM_T35_DVI_EN_GPIO, 0);</div><div class='del'>-	dvi_enabled = 1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	gpio_set_value(CM_T35_DVI_EN_GPIO, 1);</div><div class='del'>-	dvi_enabled = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -260,15 +241,14 @@ static struct omap_dss_device cm_t35_lcd_device = {</div><div class='ctx'> 	.phy.dpi.data_lines	= 18,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct panel_dvi_platform_data dvi_panel = {</div><div class='del'>-	.platform_enable	= cm_t35_panel_enable_dvi,</div><div class='del'>-	.platform_disable	= cm_t35_panel_disable_dvi,</div><div class='add'>+static struct tfp410_platform_data dvi_panel = {</div><div class='add'>+	.power_down_gpio	= CM_T35_DVI_EN_GPIO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_dss_device cm_t35_dvi_device = {</div><div class='ctx'> 	.name			= "dvi",</div><div class='ctx'> 	.type			= OMAP_DISPLAY_TYPE_DPI,</div><div class='del'>-	.driver_name		= "dvi",</div><div class='add'>+	.driver_name		= "tfp410",</div><div class='ctx'> 	.data			= &amp;dvi_panel,</div><div class='ctx'> 	.phy.dpi.data_lines	= 24,</div><div class='ctx'> };</div><div class='hunk'>@@ -316,7 +296,6 @@ static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {</div><div class='ctx'> static struct gpio cm_t35_dss_gpios[] __initdata = {</div><div class='ctx'> 	{ CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW,  "lcd enable"    },</div><div class='ctx'> 	{ CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW,  "lcd bl enable" },</div><div class='del'>-	{ CM_T35_DVI_EN_GPIO, GPIOF_OUT_INIT_HIGH, "dvi enable"    },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __init cm_t35_init_display(void)</div><div class='hunk'>@@ -335,7 +314,6 @@ static void __init cm_t35_init_display(void)</div><div class='ctx'> </div><div class='ctx'> 	gpio_export(CM_T35_LCD_EN_GPIO, 0);</div><div class='ctx'> 	gpio_export(CM_T35_LCD_BL_GPIO, 0);</div><div class='del'>-	gpio_export(CM_T35_DVI_EN_GPIO, 0);</div><div class='ctx'> </div><div class='ctx'> 	msleep(50);</div><div class='ctx'> 	gpio_set_value(CM_T35_LCD_EN_GPIO, 1);</div><div class='hunk'>@@ -498,6 +476,10 @@ static struct twl4030_gpio_platform_data cm_t35_gpio_data = {</div><div class='ctx'> 	.setup          = cm_t35_twl_gpio_setup,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct twl4030_power_data cm_t35_power_data = {</div><div class='add'>+	.use_poweroff	= true,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct twl4030_platform_data cm_t35_twldata = {</div><div class='ctx'> 	/* platform_data for children goes here */</div><div class='ctx'> 	.keypad		= &amp;cm_t35_kp_data,</div><div class='hunk'>@@ -505,6 +487,7 @@ static struct twl4030_platform_data cm_t35_twldata = {</div><div class='ctx'> 	.vmmc1		= &amp;cm_t35_vmmc1,</div><div class='ctx'> 	.vsim		= &amp;cm_t35_vsim,</div><div class='ctx'> 	.vio		= &amp;cm_t35_vio,</div><div class='add'>+	.power		= &amp;cm_t35_power_data,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __init cm_t35_init_i2c(void)</div><div class='hunk'>@@ -686,6 +669,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= cm_t35_init,</div><div class='add'>+	.init_late	= omap35xx_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='hunk'>@@ -698,6 +682,7 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")</div><div class='ctx'> 	.init_irq       = omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine   = cm_t3730_init,</div><div class='add'>+	.init_late     = omap3630_init_late,</div><div class='ctx'> 	.timer          = &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c<br/>index 9e66e167e4f3..a33ad4641d9a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-cm-t3517.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-cm-t3517.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-cm-t3517.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-cm-t3517.c</a></div><div class='hunk'>@@ -303,6 +303,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= cm_t3517_init,</div><div class='add'>+	.init_late	= am35xx_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c<br/>index a2010f07de31..6567c1cd5572 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-devkit8000.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-devkit8000.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-devkit8000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-devkit8000.c</a></div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> #include &lt;plat/usb.h&gt;</div><div class='ctx'> #include &lt;video/omapdss.h&gt;</div><div class='ctx'> #include &lt;video/omap-panel-generic-dpi.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-dvi.h&gt;</div><div class='add'>+#include &lt;video/omap-panel-tfp410.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/mcspi.h&gt;</div><div class='ctx'> #include &lt;linux/input/matrix_keypad.h&gt;</div><div class='hunk'>@@ -118,19 +118,6 @@ static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)</div><div class='ctx'> 		gpio_set_value_cansleep(dssdev-&gt;reset_gpio, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	if (gpio_is_valid(dssdev-&gt;reset_gpio))</div><div class='del'>-		gpio_set_value_cansleep(dssdev-&gt;reset_gpio, 1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	if (gpio_is_valid(dssdev-&gt;reset_gpio))</div><div class='del'>-		gpio_set_value_cansleep(dssdev-&gt;reset_gpio, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {</div><div class='ctx'> 	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),</div><div class='ctx'> };</div><div class='hunk'>@@ -154,15 +141,14 @@ static struct omap_dss_device devkit8000_lcd_device = {</div><div class='ctx'> 	.phy.dpi.data_lines     = 24,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct panel_dvi_platform_data dvi_panel = {</div><div class='del'>-	.platform_enable        = devkit8000_panel_enable_dvi,</div><div class='del'>-	.platform_disable       = devkit8000_panel_disable_dvi,</div><div class='add'>+static struct tfp410_platform_data dvi_panel = {</div><div class='add'>+	.power_down_gpio	= -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_dss_device devkit8000_dvi_device = {</div><div class='ctx'> 	.name                   = "dvi",</div><div class='ctx'> 	.type                   = OMAP_DISPLAY_TYPE_DPI,</div><div class='del'>-	.driver_name            = "dvi",</div><div class='add'>+	.driver_name            = "tfp410",</div><div class='ctx'> 	.data			= &amp;dvi_panel,</div><div class='ctx'> 	.phy.dpi.data_lines     = 24,</div><div class='ctx'> };</div><div class='hunk'>@@ -244,13 +230,7 @@ static int devkit8000_twl_gpio_setup(struct device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* gpio + 7 is "DVI_PD" (out, active low) */</div><div class='del'>-	devkit8000_dvi_device.reset_gpio = gpio + 7;</div><div class='del'>-	ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,</div><div class='del'>-			       GPIOF_OUT_INIT_LOW, "DVI PowerDown");</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		devkit8000_dvi_device.reset_gpio = -EINVAL;</div><div class='del'>-		printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");</div><div class='del'>-	}</div><div class='add'>+	dvi_panel.power_down_gpio = gpio + 7;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -664,6 +644,7 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= devkit8000_init,</div><div class='add'>+	.init_late	= omap35xx_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_secure_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c<br/>index 0349fd2b68d8..70a81f900bb5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-flash.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-flash.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-flash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-flash.c</a></div><div class='hunk'>@@ -87,7 +87,7 @@ static struct omap_onenand_platform_data board_onenand_data = {</div><div class='ctx'> 	.dma_channel	= -1,   /* disable DMA in OMAP OneNAND driver */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void</div><div class='add'>+void</div><div class='ctx'> __init board_onenand_init(struct mtd_partition *onenand_parts,</div><div class='ctx'> 				u8 nr_parts, u8 cs)</div><div class='ctx'> {</div><div class='hunk'>@@ -98,7 +98,7 @@ __init board_onenand_init(struct mtd_partition *onenand_parts,</div><div class='ctx'> 	gpmc_onenand_init(&amp;board_onenand_data);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='del'>-static void</div><div class='add'>+void</div><div class='ctx'> __init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-flash.h b/arch/arm/mach-omap2/board-flash.h<br/>index d25503a98417..c44b70d52021 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-flash.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-flash.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-flash.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-flash.h</a></div><div class='hunk'>@@ -47,3 +47,14 @@ static inline void board_nand_init(struct mtd_partition *nand_parts,</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \</div><div class='add'>+		defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)</div><div class='add'>+extern void board_onenand_init(struct mtd_partition *nand_parts,</div><div class='add'>+					u8 nr_parts, u8 cs);</div><div class='add'>+#else</div><div class='add'>+static inline void board_onenand_init(struct mtd_partition *nand_parts,</div><div class='add'>+					u8 nr_parts, u8 cs)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c<br/>index 098d183a0086..202934657867 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-generic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-generic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-generic.c</a></div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='ctx'> #include &lt;linux/irqdomain.h&gt;</div><div class='del'>-#include &lt;linux/i2c/twl.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;asm/hardware/gic.h&gt;</div><div class='hunk'>@@ -95,22 +94,6 @@ MACHINE_END</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_OMAP3</div><div class='del'>-static struct twl4030_platform_data beagle_twldata = {</div><div class='del'>-	.irq_base	= TWL4030_IRQ_BASE,</div><div class='del'>-	.irq_end	= TWL4030_IRQ_END,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init omap3_i2c_init(void)</div><div class='del'>-{</div><div class='del'>-	omap3_pmic_init("twl4030", &amp;beagle_twldata);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init omap3_init(void)</div><div class='del'>-{</div><div class='del'>-	omap3_i2c_init();</div><div class='del'>-	omap_generic_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const char *omap3_boards_compat[] __initdata = {</div><div class='ctx'> 	"ti,omap3",</div><div class='ctx'> 	NULL,</div><div class='hunk'>@@ -122,7 +105,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")</div><div class='ctx'> 	.init_early	= omap3430_init_early,</div><div class='ctx'> 	.init_irq	= omap_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='del'>-	.init_machine	= omap3_init,</div><div class='add'>+	.init_machine	= omap_generic_init,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.dt_compat	= omap3_boards_compat,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='hunk'>@@ -130,22 +113,6 @@ MACHINE_END</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_OMAP4</div><div class='del'>-static struct twl4030_platform_data sdp4430_twldata = {</div><div class='del'>-	.irq_base	= TWL6030_IRQ_BASE,</div><div class='del'>-	.irq_end	= TWL6030_IRQ_END,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init omap4_i2c_init(void)</div><div class='del'>-{</div><div class='del'>-	omap4_pmic_init("twl6030", &amp;sdp4430_twldata, NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init omap4_init(void)</div><div class='del'>-{</div><div class='del'>-	omap4_i2c_init();</div><div class='del'>-	omap_generic_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const char *omap4_boards_compat[] __initdata = {</div><div class='ctx'> 	"ti,omap4",</div><div class='ctx'> 	NULL,</div><div class='hunk'>@@ -157,7 +124,8 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")</div><div class='ctx'> 	.init_early	= omap4430_init_early,</div><div class='ctx'> 	.init_irq	= omap_init_irq,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='del'>-	.init_machine	= omap4_init,</div><div class='add'>+	.init_machine	= omap_generic_init,</div><div class='add'>+	.init_late	= omap4430_init_late,</div><div class='ctx'> 	.timer		= &amp;omap4_timer,</div><div class='ctx'> 	.dt_compat	= omap4_boards_compat,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c<br/>index 0bbbabe28fcc..876becf8205a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-h4.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-h4.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-h4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-h4.c</a></div><div class='hunk'>@@ -398,6 +398,7 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")</div><div class='ctx'> 	.init_irq	= omap2_init_irq,</div><div class='ctx'> 	.handle_irq	= omap2_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_h4_init,</div><div class='add'>+	.init_late	= omap2420_init_late,</div><div class='ctx'> 	.timer		= &amp;omap2_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c<br/>index 930c0d380435..74915295482e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-igep0020.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-igep0020.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-igep0020.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-igep0020.c</a></div><div class='hunk'>@@ -24,6 +24,8 @@</div><div class='ctx'> #include &lt;linux/i2c/twl.h&gt;</div><div class='ctx'> #include &lt;linux/mmc/host.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/mtd/nand.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -32,13 +34,15 @@</div><div class='ctx'> #include &lt;plat/gpmc.h&gt;</div><div class='ctx'> #include &lt;plat/usb.h&gt;</div><div class='ctx'> #include &lt;video/omapdss.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-dvi.h&gt;</div><div class='add'>+#include &lt;video/omap-panel-tfp410.h&gt;</div><div class='ctx'> #include &lt;plat/onenand.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mux.h"</div><div class='ctx'> #include "hsmmc.h"</div><div class='ctx'> #include "sdram-numonyx-m65kxxxxam.h"</div><div class='ctx'> #include "common-board-devices.h"</div><div class='add'>+#include "board-flash.h"</div><div class='add'>+#include "control.h"</div><div class='ctx'> </div><div class='ctx'> #define IGEP2_SMSC911X_CS       5</div><div class='ctx'> #define IGEP2_SMSC911X_GPIO     176</div><div class='hunk'>@@ -60,6 +64,10 @@</div><div class='ctx'> #define IGEP3_GPIO_LED1_RED	16</div><div class='ctx'> #define IGEP3_GPIO_USBH_NRESET  183</div><div class='ctx'> </div><div class='add'>+#define IGEP_SYSBOOT_MASK           0x1f</div><div class='add'>+#define IGEP_SYSBOOT_NAND           0x0f</div><div class='add'>+#define IGEP_SYSBOOT_ONENAND        0x10</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * IGEP2 Hardware Revision Table</div><div class='ctx'>  *</div><div class='hunk'>@@ -110,8 +118,10 @@ static void __init igep2_get_revision(void)</div><div class='ctx'> 	gpio_free(IGEP2_GPIO_LED1_RED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_MTD_ONENAND_OMAP2) || \</div><div class='del'>-	defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)</div><div class='add'>+#if defined(CONFIG_MTD_ONENAND_OMAP2) ||		\</div><div class='add'>+	defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) ||	\</div><div class='add'>+	defined(CONFIG_MTD_NAND_OMAP2) ||		\</div><div class='add'>+	defined(CONFIG_MTD_NAND_OMAP2_MODULE)</div><div class='ctx'> </div><div class='ctx'> #define ONENAND_MAP             0x20000000</div><div class='ctx'> </div><div class='hunk'>@@ -123,7 +133,7 @@ static void __init igep2_get_revision(void)</div><div class='ctx'>  * So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static struct mtd_partition igep_onenand_partitions[] = {</div><div class='add'>+static struct mtd_partition igep_flash_partitions[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name           = "X-Loader",</div><div class='ctx'> 		.offset         = 0,</div><div class='hunk'>@@ -151,50 +161,28 @@ static struct mtd_partition igep_onenand_partitions[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_onenand_platform_data igep_onenand_data = {</div><div class='del'>-	.parts = igep_onenand_partitions,</div><div class='del'>-	.nr_parts = ARRAY_SIZE(igep_onenand_partitions),</div><div class='del'>-	.dma_channel	= -1,	/* disable DMA in OMAP OneNAND driver */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device igep_onenand_device = {</div><div class='del'>-	.name		= "omap2-onenand",</div><div class='del'>-	.id		= -1,</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = &amp;igep_onenand_data,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='add'>+static inline u32 igep_get_sysboot_value(void)</div><div class='add'>+{</div><div class='add'>+	return omap_ctrl_readl(OMAP343X_CONTROL_STATUS) &amp; IGEP_SYSBOOT_MASK;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static void __init igep_flash_init(void)</div><div class='ctx'> {</div><div class='del'>-	u8 cs = 0;</div><div class='del'>-	u8 onenandcs = GPMC_CS_NUM + 1;</div><div class='del'>-</div><div class='del'>-	for (cs = 0; cs &lt; GPMC_CS_NUM; cs++) {</div><div class='del'>-		u32 ret;</div><div class='del'>-		ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);</div><div class='del'>-</div><div class='del'>-		/* Check if NAND/oneNAND is configured */</div><div class='del'>-		if ((ret &amp; 0xC00) == 0x800)</div><div class='del'>-			/* NAND found */</div><div class='del'>-			pr_err("IGEP: Unsupported NAND found\n");</div><div class='del'>-		else {</div><div class='del'>-			ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);</div><div class='del'>-			if ((ret &amp; 0x3F) == (ONENAND_MAP &gt;&gt; 24))</div><div class='del'>-				/* ONENAND found */</div><div class='del'>-				onenandcs = cs;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (onenandcs &gt; GPMC_CS_NUM) {</div><div class='del'>-		pr_err("IGEP: Unable to find configuration in GPMC\n");</div><div class='del'>-		return;</div><div class='add'>+	u32 mux;</div><div class='add'>+	mux = igep_get_sysboot_value();</div><div class='add'>+</div><div class='add'>+	if (mux == IGEP_SYSBOOT_NAND) {</div><div class='add'>+		pr_info("IGEP: initializing NAND memory device\n");</div><div class='add'>+		board_nand_init(igep_flash_partitions,</div><div class='add'>+				ARRAY_SIZE(igep_flash_partitions),</div><div class='add'>+				0, NAND_BUSWIDTH_16);</div><div class='add'>+	} else if (mux == IGEP_SYSBOOT_ONENAND) {</div><div class='add'>+		pr_info("IGEP: initializing OneNAND memory device\n");</div><div class='add'>+		board_onenand_init(igep_flash_partitions,</div><div class='add'>+				   ARRAY_SIZE(igep_flash_partitions), 0);</div><div class='add'>+	} else {</div><div class='add'>+		pr_err("IGEP: Flash: unsupported sysboot sequence found\n");</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	igep_onenand_data.cs = onenandcs;</div><div class='del'>-</div><div class='del'>-	if (platform_device_register(&amp;igep_onenand_device) &lt; 0)</div><div class='del'>-		pr_err("IGEP: Unable to register OneNAND device\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='hunk'>@@ -444,28 +432,15 @@ static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = {</div><div class='ctx'> 	.setup		= igep_twl_gpio_setup,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int igep2_enable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void igep2_disable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	gpio_direction_output(IGEP2_GPIO_DVI_PUP, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct panel_dvi_platform_data dvi_panel = {</div><div class='del'>-	.platform_enable	= igep2_enable_dvi,</div><div class='del'>-	.platform_disable	= igep2_disable_dvi,</div><div class='del'>-	.i2c_bus_num = 3,</div><div class='add'>+static struct tfp410_platform_data dvi_panel = {</div><div class='add'>+	.i2c_bus_num		= 3,</div><div class='add'>+	.power_down_gpio	= IGEP2_GPIO_DVI_PUP,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_dss_device igep2_dvi_device = {</div><div class='ctx'> 	.type			= OMAP_DISPLAY_TYPE_DPI,</div><div class='ctx'> 	.name			= "dvi",</div><div class='del'>-	.driver_name		= "dvi",</div><div class='add'>+	.driver_name		= "tfp410",</div><div class='ctx'> 	.data			= &amp;dvi_panel,</div><div class='ctx'> 	.phy.dpi.data_lines	= 24,</div><div class='ctx'> };</div><div class='hunk'>@@ -480,14 +455,6 @@ static struct omap_dss_board_info igep2_dss_data = {</div><div class='ctx'> 	.default_device	= &amp;igep2_dvi_device,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void __init igep2_display_init(void)</div><div class='del'>-{</div><div class='del'>-	int err = gpio_request_one(IGEP2_GPIO_DVI_PUP, GPIOF_OUT_INIT_HIGH,</div><div class='del'>-				   "GPIO_DVI_PUP");</div><div class='del'>-	if (err)</div><div class='del'>-		pr_err("IGEP v2: Could not obtain gpio GPIO_DVI_PUP\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct platform_device *igep_devices[] __initdata = {</div><div class='ctx'> 	&amp;igep_vwlan_device,</div><div class='ctx'> };</div><div class='hunk'>@@ -540,7 +507,10 @@ static void __init igep_i2c_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	omap3_pmic_get_config(&amp;igep_twldata, TWL_COMMON_PDATA_USB, 0);</div><div class='add'>+	omap3_pmic_get_config(&amp;igep_twldata, TWL_COMMON_PDATA_USB,</div><div class='add'>+			      TWL_COMMON_REGULATOR_VPLL2);</div><div class='add'>+	igep_twldata.vpll2-&gt;constraints.apply_uV = true;</div><div class='add'>+	igep_twldata.vpll2-&gt;constraints.name = "VDVI";</div><div class='ctx'> </div><div class='ctx'> 	if (machine_is_igep0020()) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -554,10 +524,7 @@ static void __init igep_i2c_init(void)</div><div class='ctx'> </div><div class='ctx'> 		igep_twldata.keypad	= &amp;igep2_keypad_pdata;</div><div class='ctx'> 		/* Get common pmic data */</div><div class='del'>-		omap3_pmic_get_config(&amp;igep_twldata, TWL_COMMON_PDATA_AUDIO,</div><div class='del'>-				      TWL_COMMON_REGULATOR_VPLL2);</div><div class='del'>-		igep_twldata.vpll2-&gt;constraints.apply_uV = true;</div><div class='del'>-		igep_twldata.vpll2-&gt;constraints.name = "VDVI";</div><div class='add'>+		omap3_pmic_get_config(&amp;igep_twldata, TWL_COMMON_PDATA_AUDIO, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	omap3_pmic_init("twl4030", &amp;igep_twldata);</div><div class='hunk'>@@ -641,7 +608,7 @@ static struct regulator_consumer_supply dummy_supplies[] = {</div><div class='ctx'> </div><div class='ctx'> static void __init igep_init(void)</div><div class='ctx'> {</div><div class='del'>-	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));</div><div class='add'>+	regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies));</div><div class='ctx'> 	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);</div><div class='ctx'> </div><div class='ctx'> 	/* Get IGEP2 hardware revision */</div><div class='hunk'>@@ -668,7 +635,6 @@ static void __init igep_init(void)</div><div class='ctx'> </div><div class='ctx'> 	if (machine_is_igep0020()) {</div><div class='ctx'> 		omap_display_init(&amp;igep2_dss_data);</div><div class='del'>-		igep2_display_init();</div><div class='ctx'> 		igep2_init_smsc911x();</div><div class='ctx'> 		usbhs_init(&amp;igep2_usbhs_bdata);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -684,6 +650,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= igep_init,</div><div class='add'>+	.init_late	= omap35xx_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='hunk'>@@ -696,6 +663,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= igep_init,</div><div class='add'>+	.init_late	= omap35xx_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c<br/>index 1b6049567ab4..ef9e82977499 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-ldp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-ldp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-ldp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-ldp.c</a></div><div class='hunk'>@@ -442,6 +442,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_ldp_init,</div><div class='add'>+	.init_late	= omap3430_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c<br/>index 518091c5f77c..8ca14e88a31a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-n8x0.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-n8x0.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-n8x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-n8x0.c</a></div><div class='hunk'>@@ -694,6 +694,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")</div><div class='ctx'> 	.init_irq	= omap2_init_irq,</div><div class='ctx'> 	.handle_irq	= omap2_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= n8x0_init_machine,</div><div class='add'>+	.init_late	= omap2420_init_late,</div><div class='ctx'> 	.timer		= &amp;omap2_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='hunk'>@@ -706,6 +707,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")</div><div class='ctx'> 	.init_irq	= omap2_init_irq,</div><div class='ctx'> 	.handle_irq	= omap2_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= n8x0_init_machine,</div><div class='add'>+	.init_late	= omap2420_init_late,</div><div class='ctx'> 	.timer		= &amp;omap2_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='hunk'>@@ -718,6 +720,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")</div><div class='ctx'> 	.init_irq	= omap2_init_irq,</div><div class='ctx'> 	.handle_irq	= omap2_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= n8x0_init_machine,</div><div class='add'>+	.init_late	= omap2420_init_late,</div><div class='ctx'> 	.timer		= &amp;omap2_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c<br/>index 7be8d659d91d..79c6909eeb78 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3beagle.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-omap3beagle.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3beagle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap3beagle.c</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> #include &lt;plat/board.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include &lt;video/omapdss.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-dvi.h&gt;</div><div class='add'>+#include &lt;video/omap-panel-tfp410.h&gt;</div><div class='ctx'> #include &lt;plat/gpmc.h&gt;</div><div class='ctx'> #include &lt;plat/nand.h&gt;</div><div class='ctx'> #include &lt;plat/usb.h&gt;</div><div class='hunk'>@@ -83,11 +83,13 @@ static struct {</div><div class='ctx'> 	int usb_pwr_level;</div><div class='ctx'> 	int reset_gpio;</div><div class='ctx'> 	int usr_button_gpio;</div><div class='add'>+	int mmc_caps;</div><div class='ctx'> } beagle_config = {</div><div class='ctx'> 	.mmc1_gpio_wp = -EINVAL,</div><div class='ctx'> 	.usb_pwr_level = GPIOF_OUT_INIT_LOW,</div><div class='ctx'> 	.reset_gpio = 129,</div><div class='ctx'> 	.usr_button_gpio = 4,</div><div class='add'>+	.mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct gpio omap3_beagle_rev_gpios[] __initdata = {</div><div class='hunk'>@@ -145,10 +147,12 @@ static void __init omap3_beagle_init_rev(void)</div><div class='ctx'> 		printk(KERN_INFO "OMAP3 Beagle Rev: xM Ax/Bx\n");</div><div class='ctx'> 		omap3_beagle_version = OMAP3BEAGLE_BOARD_XM;</div><div class='ctx'> 		beagle_config.usb_pwr_level = GPIOF_OUT_INIT_HIGH;</div><div class='add'>+		beagle_config.mmc_caps &amp;= ~MMC_CAP_8_BIT_DATA;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n");</div><div class='ctx'> 		omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC;</div><div class='add'>+		beagle_config.mmc_caps &amp;= ~MMC_CAP_8_BIT_DATA;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev);</div><div class='hunk'>@@ -189,33 +193,17 @@ static struct mtd_partition omap3beagle_nand_partitions[] = {</div><div class='ctx'> </div><div class='ctx'> /* DSS */</div><div class='ctx'> </div><div class='del'>-static int beagle_enable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	if (gpio_is_valid(dssdev-&gt;reset_gpio))</div><div class='del'>-		gpio_set_value(dssdev-&gt;reset_gpio, 1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void beagle_disable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	if (gpio_is_valid(dssdev-&gt;reset_gpio))</div><div class='del'>-		gpio_set_value(dssdev-&gt;reset_gpio, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct panel_dvi_platform_data dvi_panel = {</div><div class='del'>-	.platform_enable = beagle_enable_dvi,</div><div class='del'>-	.platform_disable = beagle_disable_dvi,</div><div class='add'>+static struct tfp410_platform_data dvi_panel = {</div><div class='ctx'> 	.i2c_bus_num = 3,</div><div class='add'>+	.power_down_gpio = -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_dss_device beagle_dvi_device = {</div><div class='ctx'> 	.type = OMAP_DISPLAY_TYPE_DPI,</div><div class='ctx'> 	.name = "dvi",</div><div class='del'>-	.driver_name = "dvi",</div><div class='add'>+	.driver_name = "tfp410",</div><div class='ctx'> 	.data = &amp;dvi_panel,</div><div class='ctx'> 	.phy.dpi.data_lines = 24,</div><div class='del'>-	.reset_gpio = -EINVAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_dss_device beagle_tv_device = {</div><div class='hunk'>@@ -236,22 +224,12 @@ static struct omap_dss_board_info beagle_dss_data = {</div><div class='ctx'> 	.default_device = &amp;beagle_dvi_device,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void __init beagle_display_init(void)</div><div class='del'>-{</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	r = gpio_request_one(beagle_dvi_device.reset_gpio, GPIOF_OUT_INIT_LOW,</div><div class='del'>-			     "DVI reset");</div><div class='del'>-	if (r &lt; 0)</div><div class='del'>-		printk(KERN_ERR "Unable to get DVI reset GPIO\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #include "sdram-micron-mt46h32m32lf-6.h"</div><div class='ctx'> </div><div class='ctx'> static struct omap2_hsmmc_info mmc[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.mmc		= 1,</div><div class='del'>-		.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,</div><div class='add'>+		.caps		= MMC_CAP_4_BIT_DATA,</div><div class='ctx'> 		.gpio_wp	= -EINVAL,</div><div class='ctx'> 		.deferred	= true,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -309,7 +287,7 @@ static int beagle_twl_gpio_setup(struct device *dev,</div><div class='ctx'> 		if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC"))</div><div class='ctx'> 			pr_err("%s: unable to configure EHCI_nOC\n", __func__);</div><div class='ctx'> 	}</div><div class='del'>-	beagle_dvi_device.reset_gpio = beagle_config.reset_gpio;</div><div class='add'>+	dvi_panel.power_down_gpio = beagle_config.reset_gpio;</div><div class='ctx'> </div><div class='ctx'> 	gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level,</div><div class='ctx'> 			"nEN_USB_PWR");</div><div class='hunk'>@@ -523,6 +501,7 @@ static void __init omap3_beagle_init(void)</div><div class='ctx'> </div><div class='ctx'> 	if (beagle_config.mmc1_gpio_wp != -EINVAL)</div><div class='ctx'> 		omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);</div><div class='add'>+	mmc[0].caps = beagle_config.mmc_caps;</div><div class='ctx'> 	omap_hsmmc_init(mmc);</div><div class='ctx'> </div><div class='ctx'> 	omap3_beagle_i2c_init();</div><div class='hunk'>@@ -552,7 +531,6 @@ static void __init omap3_beagle_init(void)</div><div class='ctx'> 	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);</div><div class='ctx'> 	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);</div><div class='ctx'> </div><div class='del'>-	beagle_display_init();</div><div class='ctx'> 	beagle_opp_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -565,6 +543,7 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap3_beagle_init,</div><div class='add'>+	.init_late	= omap3_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_secure_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c<br/>index 49df12735b41..639bd07ea38a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-omap3evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap3evm.c</a></div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include &lt;plat/mcspi.h&gt;</div><div class='ctx'> #include &lt;video/omapdss.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-dvi.h&gt;</div><div class='add'>+#include &lt;video/omap-panel-tfp410.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mux.h"</div><div class='ctx'> #include "sdram-micron-mt46h32m32lf-6.h"</div><div class='hunk'>@@ -219,35 +219,14 @@ static struct omap_dss_device omap3_evm_tv_device = {</div><div class='ctx'> 	.platform_disable	= omap3_evm_disable_tv,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int omap3_evm_enable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	if (lcd_enabled) {</div><div class='del'>-		printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gpio_set_value_cansleep(OMAP3EVM_DVI_PANEL_EN_GPIO, 1);</div><div class='del'>-</div><div class='del'>-	dvi_enabled = 1;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void omap3_evm_disable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	gpio_set_value_cansleep(OMAP3EVM_DVI_PANEL_EN_GPIO, 0);</div><div class='del'>-</div><div class='del'>-	dvi_enabled = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct panel_dvi_platform_data dvi_panel = {</div><div class='del'>-	.platform_enable	= omap3_evm_enable_dvi,</div><div class='del'>-	.platform_disable	= omap3_evm_disable_dvi,</div><div class='add'>+static struct tfp410_platform_data dvi_panel = {</div><div class='add'>+	.power_down_gpio	= OMAP3EVM_DVI_PANEL_EN_GPIO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_dss_device omap3_evm_dvi_device = {</div><div class='ctx'> 	.name			= "dvi",</div><div class='ctx'> 	.type			= OMAP_DISPLAY_TYPE_DPI,</div><div class='del'>-	.driver_name		= "dvi",</div><div class='add'>+	.driver_name		= "tfp410",</div><div class='ctx'> 	.data			= &amp;dvi_panel,</div><div class='ctx'> 	.phy.dpi.data_lines	= 24,</div><div class='ctx'> };</div><div class='hunk'>@@ -630,13 +609,13 @@ static struct regulator_consumer_supply dummy_supplies[] = {</div><div class='ctx'> </div><div class='ctx'> static void __init omap3_evm_init(void)</div><div class='ctx'> {</div><div class='add'>+	struct omap_board_mux *obm;</div><div class='add'>+</div><div class='ctx'> 	omap3_evm_get_revision();</div><div class='ctx'> 	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));</div><div class='ctx'> </div><div class='del'>-	if (cpu_is_omap3630())</div><div class='del'>-		omap3_mux_init(omap36x_board_mux, OMAP_PACKAGE_CBB);</div><div class='del'>-	else</div><div class='del'>-		omap3_mux_init(omap35x_board_mux, OMAP_PACKAGE_CBB);</div><div class='add'>+	obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;</div><div class='add'>+	omap3_mux_init(obm, OMAP_PACKAGE_CBB);</div><div class='ctx'> </div><div class='ctx'> 	omap_board_config = omap3_evm_config;</div><div class='ctx'> 	omap_board_config_size = ARRAY_SIZE(omap3_evm_config);</div><div class='hunk'>@@ -692,6 +671,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap3_evm_init,</div><div class='add'>+	.init_late	= omap35xx_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c<br/>index 9b3c141ff51b..932e1778aff9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3logic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-omap3logic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3logic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap3logic.c</a></div><div class='hunk'>@@ -4,8 +4,9 @@</div><div class='ctx'>  * Copyright (C) 2010 Li-Pro.Net</div><div class='ctx'>  * Stephan Linz &lt;linz@li-pro.net&gt;</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2010 Logic Product Development, Inc.</div><div class='add'>+ * Copyright (C) 2010-2012 Logic Product Development, Inc.</div><div class='ctx'>  * Peter Barada &lt;peter.barada@logicpd.com&gt;</div><div class='add'>+ * Ashwin BIhari &lt;ashwin.bihari@logicpd.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Modified from Beagle, EVM, and RX51</div><div class='ctx'>  *</div><div class='hunk'>@@ -45,6 +46,7 @@</div><div class='ctx'> #include &lt;plat/gpmc-smsc911x.h&gt;</div><div class='ctx'> #include &lt;plat/gpmc.h&gt;</div><div class='ctx'> #include &lt;plat/sdrc.h&gt;</div><div class='add'>+#include &lt;plat/usb.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define OMAP3LOGIC_SMSC911X_CS			1</div><div class='ctx'> </div><div class='hunk'>@@ -85,6 +87,11 @@ static struct twl4030_gpio_platform_data omap3logic_gpio_data = {</div><div class='ctx'> 			| BIT(13) | BIT(15) | BIT(16) | BIT(17),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct twl4030_usb_data omap3logic_usb_data = {</div><div class='add'>+	.usb_mode	= T2_USB_MODE_ULPI,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> static struct twl4030_platform_data omap3logic_twldata = {</div><div class='ctx'> 	.irq_base	= TWL4030_IRQ_BASE,</div><div class='ctx'> 	.irq_end	= TWL4030_IRQ_END,</div><div class='hunk'>@@ -92,6 +99,7 @@ static struct twl4030_platform_data omap3logic_twldata = {</div><div class='ctx'> 	/* platform_data for children goes here */</div><div class='ctx'> 	.gpio		= &amp;omap3logic_gpio_data,</div><div class='ctx'> 	.vmmc1		= &amp;omap3logic_vmmc1,</div><div class='add'>+	.usb		= &amp;omap3logic_usb_data,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init omap3logic_i2c_init(void)</div><div class='hunk'>@@ -185,6 +193,20 @@ static inline void __init board_smsc911x_init(void)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OMAP_MUX</div><div class='ctx'> static struct omap_board_mux board_mux[] __initdata = {</div><div class='add'>+	/* mUSB */</div><div class='add'>+	OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='add'>+	OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),</div><div class='add'>+	OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='add'>+	OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='add'>+	OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='add'>+	OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='add'>+	OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='add'>+	OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='add'>+	OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='add'>+	OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='add'>+	OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='add'>+	OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),</div><div class='add'>+</div><div class='ctx'> 	{ .reg_offset = OMAP_MUX_TERMINATOR },</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='hunk'>@@ -205,6 +227,8 @@ static void __init omap3logic_init(void)</div><div class='ctx'> 	board_mmc_init();</div><div class='ctx'> 	board_smsc911x_init();</div><div class='ctx'> </div><div class='add'>+	usb_musb_init(NULL);</div><div class='add'>+</div><div class='ctx'> 	/* Ensure SDRC pins are mux'd for self-refresh */</div><div class='ctx'> 	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);</div><div class='ctx'> 	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);</div><div class='hunk'>@@ -218,6 +242,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap3logic_init,</div><div class='add'>+	.init_late	= omap35xx_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='hunk'>@@ -230,6 +255,7 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap3logic_init,</div><div class='add'>+	.init_late	= omap35xx_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c<br/>index 33d995d0f075..57aebee44fd0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3pandora.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-omap3pandora.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3pandora.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap3pandora.c</a></div><div class='hunk'>@@ -622,6 +622,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap3pandora_init,</div><div class='add'>+	.init_late	= omap35xx_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c<br/>index 4dffc95bddd2..b318f5602e36 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3stalker.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-omap3stalker.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3stalker.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap3stalker.c</a></div><div class='hunk'>@@ -42,7 +42,7 @@</div><div class='ctx'> #include &lt;plat/usb.h&gt;</div><div class='ctx'> #include &lt;video/omapdss.h&gt;</div><div class='ctx'> #include &lt;video/omap-panel-generic-dpi.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-dvi.h&gt;</div><div class='add'>+#include &lt;video/omap-panel-tfp410.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/mcspi.h&gt;</div><div class='ctx'> #include &lt;linux/input/matrix_keypad.h&gt;</div><div class='hunk'>@@ -92,9 +92,6 @@ static inline void __init omap3stalker_init_eth(void)</div><div class='ctx'> #define LCD_PANEL_BKLIGHT_GPIO	210</div><div class='ctx'> #define ENABLE_VPLL2_DEV_GRP	0xE0</div><div class='ctx'> </div><div class='del'>-static int lcd_enabled;</div><div class='del'>-static int dvi_enabled;</div><div class='del'>-</div><div class='ctx'> static void __init omap3_stalker_display_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	return;</div><div class='hunk'>@@ -122,32 +119,14 @@ static struct omap_dss_device omap3_stalker_tv_device = {</div><div class='ctx'> 	.platform_disable	= omap3_stalker_disable_tv,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int omap3_stalker_enable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	if (lcd_enabled) {</div><div class='del'>-		printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	gpio_set_value(DSS_ENABLE_GPIO, 1);</div><div class='del'>-	dvi_enabled = 1;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void omap3_stalker_disable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	gpio_set_value(DSS_ENABLE_GPIO, 0);</div><div class='del'>-	dvi_enabled = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct panel_dvi_platform_data dvi_panel = {</div><div class='del'>-	.platform_enable	= omap3_stalker_enable_dvi,</div><div class='del'>-	.platform_disable	= omap3_stalker_disable_dvi,</div><div class='add'>+static struct tfp410_platform_data dvi_panel = {</div><div class='add'>+	.power_down_gpio	= DSS_ENABLE_GPIO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_dss_device omap3_stalker_dvi_device = {</div><div class='ctx'> 	.name			= "dvi",</div><div class='ctx'> 	.type			= OMAP_DISPLAY_TYPE_DPI,</div><div class='del'>-	.driver_name		= "dvi",</div><div class='add'>+	.driver_name		= "tfp410",</div><div class='ctx'> 	.data			= &amp;dvi_panel,</div><div class='ctx'> 	.phy.dpi.data_lines	= 24,</div><div class='ctx'> };</div><div class='hunk'>@@ -457,6 +436,7 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")</div><div class='ctx'> 	.init_irq		= omap3_init_irq,</div><div class='ctx'> 	.handle_irq		= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine		= omap3_stalker_init,</div><div class='add'>+	.init_late		= omap35xx_init_late,</div><div class='ctx'> 	.timer			= &amp;omap3_secure_timer,</div><div class='ctx'> 	.restart		= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c<br/>index ae2251fa4a69..485d14d6a8cd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3touchbook.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-omap3touchbook.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap3touchbook.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap3touchbook.c</a></div><div class='hunk'>@@ -387,6 +387,7 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap3_touchbook_init,</div><div class='add'>+	.init_late	= omap3430_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_secure_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c<br/>index 1b782ba53433..982fb2622ab8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap4panda.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-omap4panda.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-omap4panda.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-omap4panda.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;linux/mfd/twl6040.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/fixed.h&gt;</div><div class='add'>+#include &lt;linux/ti_wilink_st.h&gt;</div><div class='ctx'> #include &lt;linux/wl12xx.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/omap-abe-twl6040.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -42,7 +43,7 @@</div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include &lt;plat/usb.h&gt;</div><div class='ctx'> #include &lt;plat/mmc.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-dvi.h&gt;</div><div class='add'>+#include &lt;video/omap-panel-tfp410.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "hsmmc.h"</div><div class='ctx'> #include "control.h"</div><div class='hunk'>@@ -58,12 +59,21 @@</div><div class='ctx'> #define HDMI_GPIO_HPD  63 /* Hotplug detect */</div><div class='ctx'> </div><div class='ctx'> /* wl127x BT, FM, GPS connectivity chip */</div><div class='del'>-static int wl1271_gpios[] = {46, -1, -1};</div><div class='add'>+static struct ti_st_plat_data wilink_platform_data = {</div><div class='add'>+	.nshutdown_gpio	= 46,</div><div class='add'>+	.dev_name	= "/dev/ttyO1",</div><div class='add'>+	.flow_cntrl	= 1,</div><div class='add'>+	.baud_rate	= 3000000,</div><div class='add'>+	.chip_enable	= NULL,</div><div class='add'>+	.suspend	= NULL,</div><div class='add'>+	.resume		= NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct platform_device wl1271_device = {</div><div class='ctx'> 	.name	= "kim",</div><div class='ctx'> 	.id	= -1,</div><div class='ctx'> 	.dev	= {</div><div class='del'>-		.platform_data	= &amp;wl1271_gpios,</div><div class='add'>+		.platform_data	= &amp;wilink_platform_data,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -117,6 +127,11 @@ static struct platform_device panda_abe_audio = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct platform_device panda_hdmi_audio_codec = {</div><div class='add'>+	.name	= "hdmi-audio-codec",</div><div class='add'>+	.id	= -1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct platform_device btwilink_device = {</div><div class='ctx'> 	.name	= "btwilink",</div><div class='ctx'> 	.id	= -1,</div><div class='hunk'>@@ -126,6 +141,7 @@ static struct platform_device *panda_devices[] __initdata = {</div><div class='ctx'> 	&amp;leds_gpio,</div><div class='ctx'> 	&amp;wl1271_device,</div><div class='ctx'> 	&amp;panda_abe_audio,</div><div class='add'>+	&amp;panda_hdmi_audio_codec,</div><div class='ctx'> 	&amp;btwilink_device,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -231,60 +247,11 @@ static struct platform_device omap_vwlan_device = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct wl12xx_platform_data omap_panda_wlan_data  __initdata = {</div><div class='add'>+static struct wl12xx_platform_data omap_panda_wlan_data  __initdata = {</div><div class='ctx'> 	/* PANDA ref clock is 38.4 MHz */</div><div class='ctx'> 	.board_ref_clock = 2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int omap4_twl6030_hsmmc_late_init(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	int irq = 0;</div><div class='del'>-	struct platform_device *pdev = container_of(dev,</div><div class='del'>-				struct platform_device, dev);</div><div class='del'>-	struct omap_mmc_platform_data *pdata = dev-&gt;platform_data;</div><div class='del'>-</div><div class='del'>-	if (!pdata) {</div><div class='del'>-		dev_err(dev, "%s: NULL platform data\n", __func__);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	/* Setting MMC1 Card detect Irq */</div><div class='del'>-	if (pdev-&gt;id == 0) {</div><div class='del'>-		irq = twl6030_mmc_card_detect_config();</div><div class='del'>-		if (irq &lt; 0) {</div><div class='del'>-			dev_err(dev, "%s: Error card detect config(%d)\n",</div><div class='del'>-				__func__, irq);</div><div class='del'>-			return irq;</div><div class='del'>-		}</div><div class='del'>-		pdata-&gt;slots[0].card_detect = twl6030_mmc_card_detect;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct omap_mmc_platform_data *pdata;</div><div class='del'>-</div><div class='del'>-	/* dev can be null if CONFIG_MMC_OMAP_HS is not set */</div><div class='del'>-	if (!dev) {</div><div class='del'>-		pr_err("Failed omap4_twl6030_hsmmc_set_late_init\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	pdata = dev-&gt;platform_data;</div><div class='del'>-</div><div class='del'>-	pdata-&gt;init =	omap4_twl6030_hsmmc_late_init;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)</div><div class='del'>-{</div><div class='del'>-	struct omap2_hsmmc_info *c;</div><div class='del'>-</div><div class='del'>-	omap_hsmmc_init(controllers);</div><div class='del'>-	for (c = controllers; c-&gt;mmc; c++)</div><div class='del'>-		omap4_twl6030_hsmmc_set_late_init(&amp;c-&gt;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct twl6040_codec_data twl6040_codec = {</div><div class='ctx'> 	/* single-step ramp for headset and handsfree */</div><div class='ctx'> 	.hs_left_step	= 0x0f,</div><div class='hunk'>@@ -323,7 +290,9 @@ static int __init omap4_panda_i2c_init(void)</div><div class='ctx'> 			TWL_COMMON_REGULATOR_VANA |</div><div class='ctx'> 			TWL_COMMON_REGULATOR_VCXIO |</div><div class='ctx'> 			TWL_COMMON_REGULATOR_VUSB |</div><div class='del'>-			TWL_COMMON_REGULATOR_CLK32KG);</div><div class='add'>+			TWL_COMMON_REGULATOR_CLK32KG |</div><div class='add'>+			TWL_COMMON_REGULATOR_V1V8 |</div><div class='add'>+			TWL_COMMON_REGULATOR_V2V1);</div><div class='ctx'> 	omap4_pmic_init("twl6030", &amp;omap4_panda_twldata,</div><div class='ctx'> 			&amp;twl6040_data, OMAP44XX_IRQ_SYS_2N);</div><div class='ctx'> 	omap_register_i2c_bus(2, 400, NULL, 0);</div><div class='hunk'>@@ -420,47 +389,22 @@ static struct omap_board_mux board_mux[] __initdata = {</div><div class='ctx'> /* Display DVI */</div><div class='ctx'> #define PANDA_DVI_TFP410_POWER_DOWN_GPIO	0</div><div class='ctx'> </div><div class='del'>-static int omap4_panda_enable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	gpio_set_value(dssdev-&gt;reset_gpio, 1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void omap4_panda_disable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	gpio_set_value(dssdev-&gt;reset_gpio, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Using generic display panel */</div><div class='del'>-static struct panel_dvi_platform_data omap4_dvi_panel = {</div><div class='del'>-	.platform_enable	= omap4_panda_enable_dvi,</div><div class='del'>-	.platform_disable	= omap4_panda_disable_dvi,</div><div class='del'>-	.i2c_bus_num = 3,</div><div class='add'>+static struct tfp410_platform_data omap4_dvi_panel = {</div><div class='add'>+	.i2c_bus_num		= 3,</div><div class='add'>+	.power_down_gpio	= PANDA_DVI_TFP410_POWER_DOWN_GPIO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct omap_dss_device omap4_panda_dvi_device = {</div><div class='add'>+static struct omap_dss_device omap4_panda_dvi_device = {</div><div class='ctx'> 	.type			= OMAP_DISPLAY_TYPE_DPI,</div><div class='ctx'> 	.name			= "dvi",</div><div class='del'>-	.driver_name		= "dvi",</div><div class='add'>+	.driver_name		= "tfp410",</div><div class='ctx'> 	.data			= &amp;omap4_dvi_panel,</div><div class='ctx'> 	.phy.dpi.data_lines	= 24,</div><div class='ctx'> 	.reset_gpio		= PANDA_DVI_TFP410_POWER_DOWN_GPIO,</div><div class='ctx'> 	.channel		= OMAP_DSS_CHANNEL_LCD2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int __init omap4_panda_dvi_init(void)</div><div class='del'>-{</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	/* Requesting TFP410 DVI GPIO and disabling it, at bootup */</div><div class='del'>-	r = gpio_request_one(omap4_panda_dvi_device.reset_gpio,</div><div class='del'>-				GPIOF_OUT_INIT_LOW, "DVI PD");</div><div class='del'>-	if (r)</div><div class='del'>-		pr_err("Failed to get DVI powerdown GPIO\n");</div><div class='del'>-</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct gpio panda_hdmi_gpios[] = {</div><div class='ctx'> 	{ HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ct_cp_hpd" },</div><div class='ctx'> 	{ HDMI_GPIO_LS_OE,	GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" },</div><div class='hunk'>@@ -509,13 +453,8 @@ static struct omap_dss_board_info omap4_panda_dss_data = {</div><div class='ctx'> 	.default_device	= &amp;omap4_panda_dvi_device,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void __init omap4_panda_display_init(void)</div><div class='add'>+static void __init omap4_panda_display_init(void)</div><div class='ctx'> {</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	r = omap4_panda_dvi_init();</div><div class='del'>-	if (r)</div><div class='del'>-		pr_err("error initializing panda DVI\n");</div><div class='ctx'> </div><div class='ctx'> 	omap_display_init(&amp;omap4_panda_dss_data);</div><div class='ctx'> </div><div class='hunk'>@@ -582,6 +521,7 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")</div><div class='ctx'> 	.init_irq	= gic_init_irq,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= omap4_panda_init,</div><div class='add'>+	.init_late	= omap4430_init_late,</div><div class='ctx'> 	.timer		= &amp;omap4_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c<br/>index 33aa3910b09e..8fa2fc3a4c3c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-overo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-overo.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-overo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-overo.c</a></div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include &lt;video/omapdss.h&gt;</div><div class='ctx'> #include &lt;video/omap-panel-generic-dpi.h&gt;</div><div class='del'>-#include &lt;video/omap-panel-dvi.h&gt;</div><div class='add'>+#include &lt;video/omap-panel-tfp410.h&gt;</div><div class='ctx'> #include &lt;plat/gpmc.h&gt;</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;plat/nand.h&gt;</div><div class='hunk'>@@ -167,32 +167,15 @@ static void __init overo_display_init(void)</div><div class='ctx'> 	gpio_export(OVERO_GPIO_LCD_BL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int overo_panel_enable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	if (lcd_enabled) {</div><div class='del'>-		printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	dvi_enabled = 1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void overo_panel_disable_dvi(struct omap_dss_device *dssdev)</div><div class='del'>-{</div><div class='del'>-	dvi_enabled = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct panel_dvi_platform_data dvi_panel = {</div><div class='del'>-	.platform_enable	= overo_panel_enable_dvi,</div><div class='del'>-	.platform_disable	= overo_panel_disable_dvi,</div><div class='add'>+static struct tfp410_platform_data dvi_panel = {</div><div class='ctx'> 	.i2c_bus_num		= 3,</div><div class='add'>+	.power_down_gpio	= -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_dss_device overo_dvi_device = {</div><div class='ctx'> 	.name			= "dvi",</div><div class='ctx'> 	.type			= OMAP_DISPLAY_TYPE_DPI,</div><div class='del'>-	.driver_name		= "dvi",</div><div class='add'>+	.driver_name		= "tfp410",</div><div class='ctx'> 	.data			= &amp;dvi_panel,</div><div class='ctx'> 	.phy.dpi.data_lines	= 24,</div><div class='ctx'> };</div><div class='hunk'>@@ -571,6 +554,7 @@ MACHINE_START(OVERO, "Gumstix Overo")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= overo_init,</div><div class='add'>+	.init_late	= omap35xx_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c<br/>index ae53d71f0ce0..0ad1bb3bdb98 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-rm680.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-rm680.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-rm680.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-rm680.c</a></div><div class='hunk'>@@ -151,6 +151,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= rm680_init,</div><div class='add'>+	.init_late	= omap3630_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='hunk'>@@ -163,6 +164,7 @@ MACHINE_START(NOKIA_RM696, "Nokia RM-696 board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= rm680_init,</div><div class='add'>+	.init_late	= omap3630_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c<br/>index d87ee0612098..ff53deccecab 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-rx51-peripherals.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-rx51-peripherals.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-rx51-peripherals.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-rx51-peripherals.c</a></div><div class='hunk'>@@ -44,6 +44,7 @@</div><div class='ctx'> #include &lt;linux/leds-lp5523.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;../drivers/staging/iio/light/tsl2563.h&gt;</div><div class='add'>+#include &lt;linux/lis3lv02d.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mux.h"</div><div class='ctx'> #include "hsmmc.h"</div><div class='hunk'>@@ -63,6 +64,9 @@</div><div class='ctx'> #define RX51_TSC2005_RESET_GPIO         104</div><div class='ctx'> #define RX51_TSC2005_IRQ_GPIO           100</div><div class='ctx'> </div><div class='add'>+#define LIS302_IRQ1_GPIO 181</div><div class='add'>+#define LIS302_IRQ2_GPIO 180  /* Not yet in use */</div><div class='add'>+</div><div class='ctx'> /* list all spi devices here */</div><div class='ctx'> enum {</div><div class='ctx'> 	RX51_SPI_WL1251,</div><div class='hunk'>@@ -73,6 +77,77 @@ enum {</div><div class='ctx'> static struct wl12xx_platform_data wl1251_pdata;</div><div class='ctx'> static struct tsc2005_platform_data tsc2005_pdata;</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)</div><div class='add'>+static int lis302_setup(void)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	int irq1 = LIS302_IRQ1_GPIO;</div><div class='add'>+	int irq2 = LIS302_IRQ2_GPIO;</div><div class='add'>+</div><div class='add'>+	/* gpio for interrupt pin 1 */</div><div class='add'>+	err = gpio_request(irq1, "lis3lv02dl_irq1");</div><div class='add'>+	if (err) {</div><div class='add'>+		printk(KERN_ERR "lis3lv02dl: gpio request failed\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* gpio for interrupt pin 2 */</div><div class='add'>+	err = gpio_request(irq2, "lis3lv02dl_irq2");</div><div class='add'>+	if (err) {</div><div class='add'>+		gpio_free(irq1);</div><div class='add'>+		printk(KERN_ERR "lis3lv02dl: gpio request failed\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gpio_direction_input(irq1);</div><div class='add'>+	gpio_direction_input(irq2);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lis302_release(void)</div><div class='add'>+{</div><div class='add'>+	gpio_free(LIS302_IRQ1_GPIO);</div><div class='add'>+	gpio_free(LIS302_IRQ2_GPIO);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {</div><div class='add'>+	.click_flags    = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y |</div><div class='add'>+			  LIS3_CLICK_SINGLE_Z,</div><div class='add'>+	/* Limits are 0.5g * value */</div><div class='add'>+	.click_thresh_x = 8,</div><div class='add'>+	.click_thresh_y = 8,</div><div class='add'>+	.click_thresh_z = 10,</div><div class='add'>+	/* Click must be longer than time limit */</div><div class='add'>+	.click_time_limit = 9,</div><div class='add'>+	/* Kind of debounce filter */</div><div class='add'>+	.click_latency    = 50,</div><div class='add'>+</div><div class='add'>+	/* Limits for all axis. millig-value / 18 to get HW values */</div><div class='add'>+	.wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI,</div><div class='add'>+	.wakeup_thresh = 800 / 18,</div><div class='add'>+	.wakeup_flags2 = LIS3_WAKEUP_Z_HI ,</div><div class='add'>+	.wakeup_thresh2 = 900 / 18,</div><div class='add'>+</div><div class='add'>+	.hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE,</div><div class='add'>+</div><div class='add'>+	/* Interrupt line 2 for click detection, line 1 for thresholds */</div><div class='add'>+	.irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12,</div><div class='add'>+</div><div class='add'>+	.axis_x = LIS3_DEV_X,</div><div class='add'>+	.axis_y = LIS3_INV_DEV_Y,</div><div class='add'>+	.axis_z = LIS3_INV_DEV_Z,</div><div class='add'>+	.setup_resources = lis302_setup,</div><div class='add'>+	.release_resources = lis302_release,</div><div class='add'>+	.st_min_limits = {-32, 3, 3},</div><div class='add'>+	.st_max_limits = {-3, 32, 32},</div><div class='add'>+	.irq2 = OMAP_GPIO_IRQ(LIS302_IRQ2_GPIO),</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)</div><div class='ctx'> static struct tsl2563_platform_data rx51_tsl2563_platform_data = {</div><div class='ctx'> 	.cover_comp_gain = 16,</div><div class='hunk'>@@ -872,11 +947,11 @@ static struct twl4030_power_data rx51_t2scripts_data __initdata = {</div><div class='ctx'> 	.resource_config = twl4030_rconfig,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct twl4030_vibra_data rx51_vibra_data __initdata = {</div><div class='add'>+static struct twl4030_vibra_data rx51_vibra_data __initdata = {</div><div class='ctx'> 	.coexist	= 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct twl4030_audio_data rx51_audio_data __initdata = {</div><div class='add'>+static struct twl4030_audio_data rx51_audio_data __initdata = {</div><div class='ctx'> 	.audio_mclk	= 26000000,</div><div class='ctx'> 	.vibra		= &amp;rx51_vibra_data,</div><div class='ctx'> };</div><div class='hunk'>@@ -950,6 +1025,16 @@ static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {</div><div class='add'>+#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)</div><div class='add'>+	{</div><div class='add'>+		I2C_BOARD_INFO("lis3lv02d", 0x1d),</div><div class='add'>+		.platform_data = &amp;rx51_lis3lv02d_data,</div><div class='add'>+		.irq = OMAP_GPIO_IRQ(LIS302_IRQ1_GPIO),</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int __init rx51_i2c_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if ((system_rev &gt;= SYSTEM_REV_S_USES_VAUX3 &amp;&amp; system_rev &lt; 0x100) ||</div><div class='hunk'>@@ -971,7 +1056,8 @@ static int __init rx51_i2c_init(void)</div><div class='ctx'> 	omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &amp;rx51_twldata);</div><div class='ctx'> 	omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,</div><div class='ctx'> 			      ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));</div><div class='del'>-	omap_register_i2c_bus(3, 400, NULL, 0);</div><div class='add'>+	omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,</div><div class='add'>+			      ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c<br/>index 27f01f051dff..345dd931f76f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-rx51.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-rx51.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-rx51.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-rx51.c</a></div><div class='hunk'>@@ -59,25 +59,24 @@ static struct platform_device leds_gpio = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * cpuidle C-states definition override from the default values.</div><div class='del'>- * The 'exit_latency' field is the sum of sleep and wake-up latencies.</div><div class='del'>- */</div><div class='del'>-static struct cpuidle_params rx51_cpuidle_params[] = {</div><div class='del'>-	/* C1 */</div><div class='del'>-	{110 + 162, 5 , 1},</div><div class='del'>-	/* C2 */</div><div class='del'>-	{106 + 180, 309, 1},</div><div class='del'>-	/* C3 */</div><div class='del'>-	{107 + 410, 46057, 0},</div><div class='del'>-	/* C4 */</div><div class='del'>-	{121 + 3374, 46057, 0},</div><div class='del'>-	/* C5 */</div><div class='del'>-	{855 + 1146, 46057, 1},</div><div class='del'>-	/* C6 */</div><div class='del'>-	{7580 + 4134, 484329, 0},</div><div class='del'>-	/* C7 */</div><div class='del'>-	{7505 + 15274, 484329, 1},</div><div class='del'>-};</div><div class='add'>+ * cpuidle C-states definition for rx51.</div><div class='add'>+ *</div><div class='add'>+ * The 'exit_latency' field is the sum of sleep</div><div class='add'>+ * and wake-up latencies.</div><div class='add'>+</div><div class='add'>+    ---------------------------------------------</div><div class='add'>+   | state |  exit_latency  |  target_residency  |</div><div class='add'>+    ---------------------------------------------</div><div class='add'>+   |  C1   |    110 + 162   |            5       |</div><div class='add'>+   |  C2   |    106 + 180   |          309       |</div><div class='add'>+   |  C3   |    107 + 410   |        46057       |</div><div class='add'>+   |  C4   |    121 + 3374  |        46057       |</div><div class='add'>+   |  C5   |    855 + 1146  |        46057       |</div><div class='add'>+   |  C6   |   7580 + 4134  |       484329       |</div><div class='add'>+   |  C7   |   7505 + 15274 |       484329       |</div><div class='add'>+    ---------------------------------------------</div><div class='add'>+</div><div class='add'>+*/</div><div class='ctx'> </div><div class='ctx'> extern void __init rx51_peripherals_init(void);</div><div class='ctx'> </div><div class='hunk'>@@ -98,7 +97,6 @@ static void __init rx51_init(void)</div><div class='ctx'> 	struct omap_sdrc_params *sdrc_params;</div><div class='ctx'> </div><div class='ctx'> 	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);</div><div class='del'>-	omap3_pm_init_cpuidle(rx51_cpuidle_params);</div><div class='ctx'> 	omap_serial_init();</div><div class='ctx'> </div><div class='ctx'> 	sdrc_params = nokia_get_sdram_timings();</div><div class='hunk'>@@ -129,6 +127,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= rx51_init,</div><div class='add'>+	.init_late	= omap3430_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c<br/>index ab9a7a9e9d64..d4c8392cadb6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-ti8168evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-ti8168evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-ti8168evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-ti8168evm.c</a></div><div class='hunk'>@@ -52,6 +52,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")</div><div class='ctx'> 	.init_irq	= ti81xx_init_irq,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.init_machine	= ti81xx_evm_init,</div><div class='add'>+	.init_late	= ti81xx_init_late,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -63,5 +64,6 @@ MACHINE_START(TI8148EVM, "ti8148evm")</div><div class='ctx'> 	.init_irq	= ti81xx_init_irq,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.init_machine	= ti81xx_evm_init,</div><div class='add'>+	.init_late	= ti81xx_init_late,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c<br/>index a43a765dd092..28187f134fff 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-zoom-display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-zoom-display.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-zoom-display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-zoom-display.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='ctx'> #include &lt;plat/mcspi.h&gt;</div><div class='ctx'> #include &lt;video/omapdss.h&gt;</div><div class='add'>+#include &lt;mach/board-zoom.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define LCD_PANEL_RESET_GPIO_PROD	96</div><div class='ctx'> #define LCD_PANEL_RESET_GPIO_PILOT	55</div><div class='head'>diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c<br/>index 5c20bcc57f2b..4e7e56142e6f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-zoom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/board-zoom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/board-zoom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/board-zoom.c</a></div><div class='hunk'>@@ -137,6 +137,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_zoom_init,</div><div class='add'>+	.init_late	= omap3430_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='hunk'>@@ -149,6 +150,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")</div><div class='ctx'> 	.init_irq	= omap3_init_irq,</div><div class='ctx'> 	.handle_irq	= omap3_intc_handle_irq,</div><div class='ctx'> 	.init_machine	= omap_zoom_init,</div><div class='add'>+	.init_late	= omap3630_init_late,</div><div class='ctx'> 	.timer		= &amp;omap3_timer,</div><div class='ctx'> 	.restart	= omap_prcm_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c<br/>index d9f4931513f9..5c4e66542169 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clock.c</a></div><div class='hunk'>@@ -439,7 +439,7 @@ void omap2_clk_disable_unused(struct clk *clk)</div><div class='ctx'> 		clk-&gt;ops-&gt;disable(clk);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (clk-&gt;clkdm != NULL)</div><div class='del'>-		pwrdm_clkdm_state_switch(clk-&gt;clkdm);</div><div class='add'>+		pwrdm_state_switch(clk-&gt;clkdm-&gt;pwrdm.ptr);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c<br/>index f4a626f7c79e..4e1a3b0e8cc8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/clock3xxx_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/clock3xxx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/clock3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clock3xxx_data.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * OMAP3 clock data</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2007-2010 Texas Instruments, Inc.</div><div class='add'>+ * Copyright (C) 2007-2010, 2012 Texas Instruments, Inc.</div><div class='ctx'>  * Copyright (C) 2007-2011 Nokia Corporation</div><div class='ctx'>  *</div><div class='ctx'>  * Written by Paul Walmsley</div><div class='hunk'>@@ -1640,6 +1640,7 @@ static struct clk hdq_fck = {</div><div class='ctx'> 	.name		= "hdq_fck",</div><div class='ctx'> 	.ops		= &amp;clkops_omap2_dflt_wait,</div><div class='ctx'> 	.parent		= &amp;core_12m_fck,</div><div class='add'>+	.clkdm_name	= "core_l4_clkdm",</div><div class='ctx'> 	.enable_reg	= OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),</div><div class='ctx'> 	.enable_bit	= OMAP3430_EN_HDQ_SHIFT,</div><div class='ctx'> 	.recalc		= &amp;followparent_recalc,</div><div class='hunk'>@@ -3294,8 +3295,8 @@ static struct omap_clk omap3xxx_clks[] = {</div><div class='ctx'> 	CLK(NULL,	"gfx_l3_ick",	&amp;gfx_l3_ick,	CK_3430ES1),</div><div class='ctx'> 	CLK(NULL,	"gfx_cg1_ck",	&amp;gfx_cg1_ck,	CK_3430ES1),</div><div class='ctx'> 	CLK(NULL,	"gfx_cg2_ck",	&amp;gfx_cg2_ck,	CK_3430ES1),</div><div class='del'>-	CLK(NULL,	"sgx_fck",	&amp;sgx_fck,	CK_3430ES2PLUS | CK_3517 | CK_36XX),</div><div class='del'>-	CLK(NULL,	"sgx_ick",	&amp;sgx_ick,	CK_3430ES2PLUS | CK_3517 | CK_36XX),</div><div class='add'>+	CLK(NULL,	"sgx_fck",	&amp;sgx_fck,	CK_3430ES2PLUS | CK_AM35XX | CK_36XX),</div><div class='add'>+	CLK(NULL,	"sgx_ick",	&amp;sgx_ick,	CK_3430ES2PLUS | CK_AM35XX | CK_36XX),</div><div class='ctx'> 	CLK(NULL,	"d2d_26m_fck",	&amp;d2d_26m_fck,	CK_3430ES1),</div><div class='ctx'> 	CLK(NULL,	"modem_fck",	&amp;modem_fck,	CK_34XX | CK_36XX),</div><div class='ctx'> 	CLK(NULL,	"sad2d_ick",	&amp;sad2d_ick,	CK_34XX | CK_36XX),</div><div class='hunk'>@@ -3419,7 +3420,7 @@ static struct omap_clk omap3xxx_clks[] = {</div><div class='ctx'> 	CLK(NULL,	"per_48m_fck",	&amp;per_48m_fck,	CK_3XXX),</div><div class='ctx'> 	CLK(NULL,	"uart3_fck",	&amp;uart3_fck,	CK_3XXX),</div><div class='ctx'> 	CLK(NULL,	"uart4_fck",	&amp;uart4_fck,	CK_36XX),</div><div class='del'>-	CLK(NULL,	"uart4_fck",	&amp;uart4_fck_am35xx, CK_3505 | CK_3517),</div><div class='add'>+	CLK(NULL,	"uart4_fck",	&amp;uart4_fck_am35xx, CK_AM35XX),</div><div class='ctx'> 	CLK(NULL,	"gpt2_fck",	&amp;gpt2_fck,	CK_3XXX),</div><div class='ctx'> 	CLK(NULL,	"gpt3_fck",	&amp;gpt3_fck,	CK_3XXX),</div><div class='ctx'> 	CLK(NULL,	"gpt4_fck",	&amp;gpt4_fck,	CK_3XXX),</div><div class='hunk'>@@ -3513,21 +3514,9 @@ int __init omap3xxx_clk_init(void)</div><div class='ctx'> 	struct omap_clk *c;</div><div class='ctx'> 	u32 cpu_clkflg = 0;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * 3505 must be tested before 3517, since 3517 returns true</div><div class='del'>-	 * for both AM3517 chips and AM3517 family chips, which</div><div class='del'>-	 * includes 3505.  Unfortunately there's no obvious family</div><div class='del'>-	 * test for 3517/3505 :-(</div><div class='del'>-	 */</div><div class='del'>-	if (cpu_is_omap3505()) {</div><div class='del'>-		cpu_mask = RATE_IN_34XX;</div><div class='del'>-		cpu_clkflg = CK_3505;</div><div class='del'>-	} else if (cpu_is_omap3517()) {</div><div class='del'>-		cpu_mask = RATE_IN_34XX;</div><div class='del'>-		cpu_clkflg = CK_3517;</div><div class='del'>-	} else if (cpu_is_omap3505()) {</div><div class='add'>+	if (cpu_is_omap3517()) {</div><div class='ctx'> 		cpu_mask = RATE_IN_34XX;</div><div class='del'>-		cpu_clkflg = CK_3505;</div><div class='add'>+		cpu_clkflg = CK_AM35XX;</div><div class='ctx'> 	} else if (cpu_is_omap3630()) {</div><div class='ctx'> 		cpu_mask = (RATE_IN_34XX | RATE_IN_36XX);</div><div class='ctx'> 		cpu_clkflg = CK_36XX;</div><div class='head'>diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c<br/>index fa6ea65ad44b..2172f6603848 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/clock44xx_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/clock44xx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/clock44xx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clock44xx_data.c</a></div><div class='hunk'>@@ -3355,17 +3355,6 @@ static struct omap_clk omap44xx_clks[] = {</div><div class='ctx'> 	CLK(NULL,	"auxclk5_ck",			&amp;auxclk5_ck,	CK_443X),</div><div class='ctx'> 	CLK(NULL,	"auxclkreq5_ck",		&amp;auxclkreq5_ck,	CK_443X),</div><div class='ctx'> 	CLK(NULL,	"gpmc_ck",			&amp;dummy_ck,	CK_443X),</div><div class='del'>-	CLK(NULL,	"gpt1_ick",			&amp;dummy_ck,	CK_443X),</div><div class='del'>-	CLK(NULL,	"gpt2_ick",			&amp;dummy_ck,	CK_443X),</div><div class='del'>-	CLK(NULL,	"gpt3_ick",			&amp;dummy_ck,	CK_443X),</div><div class='del'>-	CLK(NULL,	"gpt4_ick",			&amp;dummy_ck,	CK_443X),</div><div class='del'>-	CLK(NULL,	"gpt5_ick",			&amp;dummy_ck,	CK_443X),</div><div class='del'>-	CLK(NULL,	"gpt6_ick",			&amp;dummy_ck,	CK_443X),</div><div class='del'>-	CLK(NULL,	"gpt7_ick",			&amp;dummy_ck,	CK_443X),</div><div class='del'>-	CLK(NULL,	"gpt8_ick",			&amp;dummy_ck,	CK_443X),</div><div class='del'>-	CLK(NULL,	"gpt9_ick",			&amp;dummy_ck,	CK_443X),</div><div class='del'>-	CLK(NULL,	"gpt10_ick",			&amp;dummy_ck,	CK_443X),</div><div class='del'>-	CLK(NULL,	"gpt11_ick",			&amp;dummy_ck,	CK_443X),</div><div class='ctx'> 	CLK("omap_i2c.1",	"ick",				&amp;dummy_ck,	CK_443X),</div><div class='ctx'> 	CLK("omap_i2c.2",	"ick",				&amp;dummy_ck,	CK_443X),</div><div class='ctx'> 	CLK("omap_i2c.3",	"ick",				&amp;dummy_ck,	CK_443X),</div><div class='head'>diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c<br/>index ad07689e1563..8664f5a8bfb6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/clockdomain.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/clockdomain.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/clockdomain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clockdomain.c</a></div><div class='hunk'>@@ -840,7 +840,7 @@ void clkdm_allow_idle(struct clockdomain *clkdm)</div><div class='ctx'> 	spin_lock_irqsave(&amp;clkdm-&gt;lock, flags);</div><div class='ctx'> 	clkdm-&gt;_flags |= _CLKDM_FLAG_HWSUP_ENABLED;</div><div class='ctx'> 	arch_clkdm-&gt;clkdm_allow_idle(clkdm);</div><div class='del'>-	pwrdm_clkdm_state_switch(clkdm);</div><div class='add'>+	pwrdm_state_switch(clkdm-&gt;pwrdm.ptr);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;clkdm-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -924,8 +924,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;clkdm-&gt;lock, flags);</div><div class='ctx'> 	arch_clkdm-&gt;clkdm_clk_enable(clkdm);</div><div class='del'>-	pwrdm_wait_transition(clkdm-&gt;pwrdm.ptr);</div><div class='del'>-	pwrdm_clkdm_state_switch(clkdm);</div><div class='add'>+	pwrdm_state_switch(clkdm-&gt;pwrdm.ptr);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;clkdm-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("clockdomain: clkdm %s: enabled\n", clkdm-&gt;name);</div><div class='hunk'>@@ -950,7 +949,7 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;clkdm-&gt;lock, flags);</div><div class='ctx'> 	arch_clkdm-&gt;clkdm_clk_disable(clkdm);</div><div class='del'>-	pwrdm_clkdm_state_switch(clkdm);</div><div class='add'>+	pwrdm_state_switch(clkdm-&gt;pwrdm.ptr);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;clkdm-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("clockdomain: clkdm %s: disabled\n", clkdm-&gt;name);</div><div class='head'>diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c<br/>index 935c7f03dab9..4f04dd11d655 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/clockdomain44xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/clockdomain44xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/clockdomain44xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clockdomain44xx.c</a></div><div class='hunk'>@@ -51,6 +51,9 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)</div><div class='ctx'> 	struct clkdm_dep *cd;</div><div class='ctx'> 	u32 mask = 0;</div><div class='ctx'> </div><div class='add'>+	if (!clkdm-&gt;prcm_partition)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	for (cd = clkdm-&gt;wkdep_srcs; cd &amp;&amp; cd-&gt;clkdm_name; cd++) {</div><div class='ctx'> 		if (!cd-&gt;clkdm)</div><div class='ctx'> 			continue; /* only happens if data is erroneous */</div><div class='hunk'>@@ -103,6 +106,9 @@ static int omap4_clkdm_clk_disable(struct clockdomain *clkdm)</div><div class='ctx'> {</div><div class='ctx'> 	bool hwsup = false;</div><div class='ctx'> </div><div class='add'>+	if (!clkdm-&gt;prcm_partition)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm-&gt;prcm_partition,</div><div class='ctx'> 					clkdm-&gt;cm_inst, clkdm-&gt;clkdm_offs);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c<br/>index 0a6a04897d89..839145e1cfbe 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c</a></div><div class='hunk'>@@ -89,13 +89,3 @@ struct clockdomain wkup_common_clkdm = {</div><div class='ctx'> 	.pwrdm		= { .name = "wkup_pwrdm" },</div><div class='ctx'> 	.dep_bit	= OMAP_EN_WKUP_SHIFT,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-struct clockdomain prm_common_clkdm = {</div><div class='del'>-	.name		= "prm_clkdm",</div><div class='del'>-	.pwrdm		= { .name = "wkup_pwrdm" },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct clockdomain cm_common_clkdm = {</div><div class='del'>-	.name		= "cm_clkdm",</div><div class='del'>-	.pwrdm		= { .name = "core_pwrdm" },</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c<br/>index b84e138d99c8..6038adb97710 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/clockdomains3xxx_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/clockdomains3xxx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/clockdomains3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clockdomains3xxx_data.c</a></div><div class='hunk'>@@ -53,9 +53,9 @@</div><div class='ctx'>  * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE</div><div class='ctx'>  */</div><div class='ctx'> static struct clkdm_dep gfx_sgx_3xxx_wkdeps[] = {</div><div class='del'>-	{ .clkdm_name = "iva2_clkdm", },</div><div class='del'>-	{ .clkdm_name = "mpu_clkdm", },</div><div class='del'>-	{ .clkdm_name = "wkup_clkdm", },</div><div class='add'>+	{ .clkdm_name = "iva2_clkdm" },</div><div class='add'>+	{ .clkdm_name = "mpu_clkdm" },</div><div class='add'>+	{ .clkdm_name = "wkup_clkdm" },</div><div class='ctx'> 	{ NULL },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c<br/>index bd7ed13515cc..c53425847493 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/clockdomains44xx_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/clockdomains44xx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/clockdomains44xx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clockdomains44xx_data.c</a></div><div class='hunk'>@@ -430,6 +430,8 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {</div><div class='ctx'> 	&amp;l4_wkup_44xx_clkdm,</div><div class='ctx'> 	&amp;emu_sys_44xx_clkdm,</div><div class='ctx'> 	&amp;l3_dma_44xx_clkdm,</div><div class='add'>+	&amp;prm_common_clkdm,</div><div class='add'>+	&amp;cm_common_clkdm,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/clockdomains_common_data.c b/arch/arm/mach-omap2/clockdomains_common_data.c<br/>new file mode 100644<br/>index 000000000000..615b1f04967d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/clockdomains_common_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/clockdomains_common_data.c</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+/*</div><div class='add'>+ * OMAP2+-common clockdomain data</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2008-2012 Texas Instruments, Inc.</div><div class='add'>+ * Copyright (C) 2008-2010 Nokia Corporation</div><div class='add'>+ *</div><div class='add'>+ * Paul Walmsley, Jouni Högander</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+</div><div class='add'>+#include "clockdomain.h"</div><div class='add'>+</div><div class='add'>+/* These are implicit clockdomains - they are never defined as such in TRM */</div><div class='add'>+struct clockdomain prm_common_clkdm = {</div><div class='add'>+	.name		= "prm_clkdm",</div><div class='add'>+	.pwrdm		= { .name = "wkup_pwrdm" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clockdomain cm_common_clkdm = {</div><div class='add'>+	.name		= "cm_clkdm",</div><div class='add'>+	.pwrdm		= { .name = "core_pwrdm" },</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h<br/>index b91275908f33..8083a8cdc55f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/cm-regbits-34xx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/cm-regbits-34xx.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/cm-regbits-34xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/cm-regbits-34xx.h</a></div><div class='hunk'>@@ -79,7 +79,7 @@</div><div class='ctx'> </div><div class='ctx'> /* CM_CLKSEL1_PLL_IVA2 */</div><div class='ctx'> #define OMAP3430_IVA2_CLK_SRC_SHIFT			19</div><div class='del'>-#define OMAP3430_IVA2_CLK_SRC_MASK			(0x3 &lt;&lt; 19)</div><div class='add'>+#define OMAP3430_IVA2_CLK_SRC_MASK			(0x7 &lt;&lt; 19)</div><div class='ctx'> #define OMAP3430_IVA2_DPLL_MULT_SHIFT			8</div><div class='ctx'> #define OMAP3430_IVA2_DPLL_MULT_MASK			(0x7ff &lt;&lt; 8)</div><div class='ctx'> #define OMAP3430_IVA2_DPLL_DIV_SHIFT			0</div><div class='hunk'>@@ -124,7 +124,7 @@</div><div class='ctx'> </div><div class='ctx'> /* CM_CLKSEL1_PLL_MPU */</div><div class='ctx'> #define OMAP3430_MPU_CLK_SRC_SHIFT			19</div><div class='del'>-#define OMAP3430_MPU_CLK_SRC_MASK			(0x3 &lt;&lt; 19)</div><div class='add'>+#define OMAP3430_MPU_CLK_SRC_MASK			(0x7 &lt;&lt; 19)</div><div class='ctx'> #define OMAP3430_MPU_DPLL_MULT_SHIFT			8</div><div class='ctx'> #define OMAP3430_MPU_DPLL_MULT_MASK			(0x7ff &lt;&lt; 8)</div><div class='ctx'> #define OMAP3430_MPU_DPLL_DIV_SHIFT			0</div><div class='head'>diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c<br/>index bd8810c3753f..8c86d294b1a3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/cminst44xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/cminst44xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/cminst44xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/cminst44xx.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> #include "prcm44xx.h"</div><div class='ctx'> #include "prm44xx.h"</div><div class='ctx'> #include "prcm_mpu44xx.h"</div><div class='add'>+#include "prcm-common.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:</div><div class='hunk'>@@ -49,14 +50,21 @@</div><div class='ctx'> #define CLKCTRL_IDLEST_INTERFACE_IDLE		0x2</div><div class='ctx'> #define CLKCTRL_IDLEST_DISABLED			0x3</div><div class='ctx'> </div><div class='del'>-static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {</div><div class='del'>-	[OMAP4430_INVALID_PRCM_PARTITION]	= 0,</div><div class='del'>-	[OMAP4430_PRM_PARTITION]		= OMAP4430_PRM_BASE,</div><div class='del'>-	[OMAP4430_CM1_PARTITION]		= OMAP4430_CM1_BASE,</div><div class='del'>-	[OMAP4430_CM2_PARTITION]		= OMAP4430_CM2_BASE,</div><div class='del'>-	[OMAP4430_SCRM_PARTITION]		= 0,</div><div class='del'>-	[OMAP4430_PRCM_MPU_PARTITION]		= OMAP4430_PRCM_MPU_BASE,</div><div class='del'>-};</div><div class='add'>+static void __iomem *_cm_bases[OMAP4_MAX_PRCM_PARTITIONS];</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * omap_cm_base_init - Populates the cm partitions</div><div class='add'>+ *</div><div class='add'>+ * Populates the base addresses of the _cm_bases</div><div class='add'>+ * array used for read/write of cm module registers.</div><div class='add'>+ */</div><div class='add'>+void omap_cm_base_init(void)</div><div class='add'>+{</div><div class='add'>+	_cm_bases[OMAP4430_PRM_PARTITION] = prm_base;</div><div class='add'>+	_cm_bases[OMAP4430_CM1_PARTITION] = cm_base;</div><div class='add'>+	_cm_bases[OMAP4430_CM2_PARTITION] = cm2_base;</div><div class='add'>+	_cm_bases[OMAP4430_PRCM_MPU_PARTITION] = prcm_mpu_base;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /* Private functions */</div><div class='ctx'> </div><div class='hunk'>@@ -106,7 +114,7 @@ u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx)</div><div class='ctx'> 	BUG_ON(part &gt;= OMAP4_MAX_PRCM_PARTITIONS ||</div><div class='ctx'> 	       part == OMAP4430_INVALID_PRCM_PARTITION ||</div><div class='ctx'> 	       !_cm_bases[part]);</div><div class='del'>-	return __raw_readl(OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx));</div><div class='add'>+	return __raw_readl(_cm_bases[part] + inst + idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Write into a register in a CM instance */</div><div class='hunk'>@@ -115,7 +123,7 @@ void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)</div><div class='ctx'> 	BUG_ON(part &gt;= OMAP4_MAX_PRCM_PARTITIONS ||</div><div class='ctx'> 	       part == OMAP4430_INVALID_PRCM_PARTITION ||</div><div class='ctx'> 	       !_cm_bases[part]);</div><div class='del'>-	__raw_writel(val, OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx));</div><div class='add'>+	__raw_writel(val, _cm_bases[part] + inst + idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Read-modify-write a register in CM1. Caller must lock */</div><div class='head'>diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c<br/>index 1549c11000d3..8a6953a34fe2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/common.c</a></div><div class='hunk'>@@ -166,6 +166,7 @@ static struct omap_globals omap4_globals = {</div><div class='ctx'> 	.prm	= OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),</div><div class='ctx'> 	.cm	= OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),</div><div class='ctx'> 	.cm2	= OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),</div><div class='add'>+	.prcm_mpu	= OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void __init omap2_set_globals_443x(void)</div><div class='head'>diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h<br/>index 57da7f406e28..be9dfd1abe60 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/common.h</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/i2c/twl.h&gt;</div><div class='ctx'> #include &lt;plat/common.h&gt;</div><div class='ctx'> #include &lt;asm/proc-fns.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -54,7 +55,7 @@ static inline void omap34xx_map_common_io(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SOC_OMAPTI81XX</div><div class='add'>+#ifdef CONFIG_SOC_TI81XX</div><div class='ctx'> extern void omapti81xx_map_common_io(void);</div><div class='ctx'> #else</div><div class='ctx'> static inline void omapti81xx_map_common_io(void)</div><div class='hunk'>@@ -62,7 +63,7 @@ static inline void omapti81xx_map_common_io(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SOC_OMAPAM33XX</div><div class='add'>+#ifdef CONFIG_SOC_AM33XX</div><div class='ctx'> extern void omapam33xx_map_common_io(void);</div><div class='ctx'> #else</div><div class='ctx'> static inline void omapam33xx_map_common_io(void)</div><div class='hunk'>@@ -78,6 +79,42 @@ static inline void omap44xx_map_common_io(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_PM) &amp;&amp; defined(CONFIG_ARCH_OMAP2)</div><div class='add'>+int omap2_pm_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int omap2_pm_init(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_PM) &amp;&amp; defined(CONFIG_ARCH_OMAP3)</div><div class='add'>+int omap3_pm_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int omap3_pm_init(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_PM) &amp;&amp; defined(CONFIG_ARCH_OMAP4)</div><div class='add'>+int omap4_pm_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int omap4_pm_init(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OMAP_MUX</div><div class='add'>+int omap_mux_late_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int omap_mux_late_init(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> extern void omap2_init_common_infrastructure(void);</div><div class='ctx'> </div><div class='ctx'> extern struct sys_timer omap2_timer;</div><div class='hunk'>@@ -94,6 +131,17 @@ void omap3_init_early(void);	/* Do not use this one */</div><div class='ctx'> void am35xx_init_early(void);</div><div class='ctx'> void ti81xx_init_early(void);</div><div class='ctx'> void omap4430_init_early(void);</div><div class='add'>+void omap3_init_late(void);	/* Do not use this one */</div><div class='add'>+void omap4430_init_late(void);</div><div class='add'>+void omap2420_init_late(void);</div><div class='add'>+void omap2430_init_late(void);</div><div class='add'>+void omap3430_init_late(void);</div><div class='add'>+void omap35xx_init_late(void);</div><div class='add'>+void omap3630_init_late(void);</div><div class='add'>+void am35xx_init_late(void);</div><div class='add'>+void ti81xx_init_late(void);</div><div class='add'>+void omap4430_init_late(void);</div><div class='add'>+int omap2_common_pm_late_init(void);</div><div class='ctx'> void omap_prcm_restart(char, const char *);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -111,6 +159,7 @@ struct omap_globals {</div><div class='ctx'> 	void __iomem	*prm;            /* Power and Reset Management */</div><div class='ctx'> 	void __iomem	*cm;             /* Clock Management */</div><div class='ctx'> 	void __iomem	*cm2;</div><div class='add'>+	void __iomem	*prcm_mpu;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void omap2_set_globals_242x(void);</div><div class='hunk'>@@ -134,8 +183,6 @@ void omap4_map_io(void);</div><div class='ctx'> void ti81xx_map_io(void);</div><div class='ctx'> void omap_barriers_init(void);</div><div class='ctx'> </div><div class='del'>-extern void __init omap_init_consistent_dma_size(void);</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * omap_test_timeout - busy-loop, testing a condition</div><div class='ctx'>  * @cond: condition to test until it evaluates to true</div><div class='hunk'>@@ -254,6 +301,8 @@ static inline u32 omap4_mpuss_read_prev_context_state(void)</div><div class='ctx'> struct omap_sdrc_params;</div><div class='ctx'> extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,</div><div class='ctx'> 				      struct omap_sdrc_params *sdrc_cs1);</div><div class='add'>+struct omap2_hsmmc_info;</div><div class='add'>+extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */</div><div class='head'>diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c<br/>index 535866489ce3..207bc1c7759f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/cpuidle34xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/cpuidle34xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/cpuidle34xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/cpuidle34xx.c</a></div><div class='hunk'>@@ -38,40 +38,44 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CPU_IDLE</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The latencies/thresholds for various C states have</div><div class='del'>- * to be configured from the respective board files.</div><div class='del'>- * These are some default values (which might not provide</div><div class='del'>- * the best power savings) used on boards which do not</div><div class='del'>- * pass these details from the board file.</div><div class='del'>- */</div><div class='del'>-static struct cpuidle_params cpuidle_params_table[] = {</div><div class='del'>-	/* C1 */</div><div class='del'>-	{2 + 2, 5, 1},</div><div class='del'>-	/* C2 */</div><div class='del'>-	{10 + 10, 30, 1},</div><div class='del'>-	/* C3 */</div><div class='del'>-	{50 + 50, 300, 1},</div><div class='del'>-	/* C4 */</div><div class='del'>-	{1500 + 1800, 4000, 1},</div><div class='del'>-	/* C5 */</div><div class='del'>-	{2500 + 7500, 12000, 1},</div><div class='del'>-	/* C6 */</div><div class='del'>-	{3000 + 8500, 15000, 1},</div><div class='del'>-	/* C7 */</div><div class='del'>-	{10000 + 30000, 300000, 1},</div><div class='del'>-};</div><div class='del'>-#define OMAP3_NUM_STATES ARRAY_SIZE(cpuidle_params_table)</div><div class='del'>-</div><div class='ctx'> /* Mach specific information to be recorded in the C-state driver_data */</div><div class='ctx'> struct omap3_idle_statedata {</div><div class='ctx'> 	u32 mpu_state;</div><div class='ctx'> 	u32 core_state;</div><div class='del'>-	u8 valid;</div><div class='ctx'> };</div><div class='del'>-struct omap3_idle_statedata omap3_idle_data[OMAP3_NUM_STATES];</div><div class='ctx'> </div><div class='del'>-struct powerdomain *mpu_pd, *core_pd, *per_pd, *cam_pd;</div><div class='add'>+static struct omap3_idle_statedata omap3_idle_data[] = {</div><div class='add'>+	{</div><div class='add'>+		.mpu_state = PWRDM_POWER_ON,</div><div class='add'>+		.core_state = PWRDM_POWER_ON,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.mpu_state = PWRDM_POWER_ON,</div><div class='add'>+		.core_state = PWRDM_POWER_ON,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.mpu_state = PWRDM_POWER_RET,</div><div class='add'>+		.core_state = PWRDM_POWER_ON,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.mpu_state = PWRDM_POWER_OFF,</div><div class='add'>+		.core_state = PWRDM_POWER_ON,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.mpu_state = PWRDM_POWER_RET,</div><div class='add'>+		.core_state = PWRDM_POWER_RET,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.mpu_state = PWRDM_POWER_OFF,</div><div class='add'>+		.core_state = PWRDM_POWER_RET,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.mpu_state = PWRDM_POWER_OFF,</div><div class='add'>+		.core_state = PWRDM_POWER_OFF,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct powerdomain *mpu_pd, *core_pd, *per_pd, *cam_pd;</div><div class='ctx'> </div><div class='ctx'> static int _cpuidle_allow_idle(struct powerdomain *pwrdm,</div><div class='ctx'> 				struct clockdomain *clkdm)</div><div class='hunk'>@@ -91,8 +95,7 @@ static int __omap3_enter_idle(struct cpuidle_device *dev,</div><div class='ctx'> 				struct cpuidle_driver *drv,</div><div class='ctx'> 				int index)</div><div class='ctx'> {</div><div class='del'>-	struct omap3_idle_statedata *cx =</div><div class='del'>-			cpuidle_get_statedata(&amp;dev-&gt;states_usage[index]);</div><div class='add'>+	struct omap3_idle_statedata *cx = &amp;omap3_idle_data[index];</div><div class='ctx'> 	u32 mpu_state = cx-&gt;mpu_state, core_state = cx-&gt;core_state;</div><div class='ctx'> </div><div class='ctx'> 	local_fiq_disable();</div><div class='hunk'>@@ -169,14 +172,12 @@ static inline int omap3_enter_idle(struct cpuidle_device *dev,</div><div class='ctx'>  * if it satisfies the enable_off_mode condition.</div><div class='ctx'>  */</div><div class='ctx'> static int next_valid_state(struct cpuidle_device *dev,</div><div class='del'>-			struct cpuidle_driver *drv,</div><div class='del'>-				int index)</div><div class='add'>+			    struct cpuidle_driver *drv, int index)</div><div class='ctx'> {</div><div class='del'>-	struct cpuidle_state_usage *curr_usage = &amp;dev-&gt;states_usage[index];</div><div class='del'>-	struct cpuidle_state *curr = &amp;drv-&gt;states[index];</div><div class='del'>-	struct omap3_idle_statedata *cx = cpuidle_get_statedata(curr_usage);</div><div class='add'>+	struct omap3_idle_statedata *cx = &amp;omap3_idle_data[index];</div><div class='ctx'> 	u32 mpu_deepest_state = PWRDM_POWER_RET;</div><div class='ctx'> 	u32 core_deepest_state = PWRDM_POWER_RET;</div><div class='add'>+	int idx;</div><div class='ctx'> 	int next_index = -1;</div><div class='ctx'> </div><div class='ctx'> 	if (enable_off_mode) {</div><div class='hunk'>@@ -191,45 +192,29 @@ static int next_valid_state(struct cpuidle_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check if current state is valid */</div><div class='del'>-	if ((cx-&gt;valid) &amp;&amp;</div><div class='del'>-	    (cx-&gt;mpu_state &gt;= mpu_deepest_state) &amp;&amp;</div><div class='del'>-	    (cx-&gt;core_state &gt;= core_deepest_state)) {</div><div class='add'>+	if ((cx-&gt;mpu_state &gt;= mpu_deepest_state) &amp;&amp;</div><div class='add'>+	    (cx-&gt;core_state &gt;= core_deepest_state))</div><div class='ctx'> 		return index;</div><div class='del'>-	} else {</div><div class='del'>-		int idx = OMAP3_NUM_STATES - 1;</div><div class='del'>-</div><div class='del'>-		/* Reach the current state starting at highest C-state */</div><div class='del'>-		for (; idx &gt;= 0; idx--) {</div><div class='del'>-			if (&amp;drv-&gt;states[idx] == curr) {</div><div class='del'>-				next_index = idx;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Should never hit this condition */</div><div class='del'>-		WARN_ON(next_index == -1);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Drop to next valid state.</div><div class='del'>-		 * Start search from the next (lower) state.</div><div class='del'>-		 */</div><div class='del'>-		idx--;</div><div class='del'>-		for (; idx &gt;= 0; idx--) {</div><div class='del'>-			cx = cpuidle_get_statedata(&amp;dev-&gt;states_usage[idx]);</div><div class='del'>-			if ((cx-&gt;valid) &amp;&amp;</div><div class='del'>-			    (cx-&gt;mpu_state &gt;= mpu_deepest_state) &amp;&amp;</div><div class='del'>-			    (cx-&gt;core_state &gt;= core_deepest_state)) {</div><div class='del'>-				next_index = idx;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='add'>+	/*</div><div class='add'>+	 * Drop to next valid state.</div><div class='add'>+	 * Start search from the next (lower) state.</div><div class='add'>+	 */</div><div class='add'>+	for (idx = index - 1; idx &gt;= 0; idx--) {</div><div class='add'>+		cx =  &amp;omap3_idle_data[idx];</div><div class='add'>+		if ((cx-&gt;mpu_state &gt;= mpu_deepest_state) &amp;&amp;</div><div class='add'>+		    (cx-&gt;core_state &gt;= core_deepest_state)) {</div><div class='add'>+			next_index = idx;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='del'>-		/*</div><div class='del'>-		 * C1 is always valid.</div><div class='del'>-		 * So, no need to check for 'next_index == -1' outside</div><div class='del'>-		 * this loop.</div><div class='del'>-		 */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * C1 is always valid.</div><div class='add'>+	 * So, no need to check for 'next_index == -1' outside</div><div class='add'>+	 * this loop.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='ctx'> 	return next_index;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -273,7 +258,7 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev,</div><div class='ctx'> 	 * Prevent PER off if CORE is not in retention or off as this</div><div class='ctx'> 	 * would disable PER wakeups completely.</div><div class='ctx'> 	 */</div><div class='del'>-	cx = cpuidle_get_statedata(&amp;dev-&gt;states_usage[index]);</div><div class='add'>+	cx = &amp;omap3_idle_data[index];</div><div class='ctx'> 	core_next_state = cx-&gt;core_state;</div><div class='ctx'> 	per_next_state = per_saved_state = pwrdm_read_next_pwrst(per_pd);</div><div class='ctx'> 	if ((per_next_state == PWRDM_POWER_OFF) &amp;&amp;</div><div class='hunk'>@@ -298,57 +283,71 @@ select_state:</div><div class='ctx'> </div><div class='ctx'> DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);</div><div class='ctx'> </div><div class='del'>-void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!cpuidle_board_params)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; OMAP3_NUM_STATES; i++) {</div><div class='del'>-		cpuidle_params_table[i].valid =	cpuidle_board_params[i].valid;</div><div class='del'>-		cpuidle_params_table[i].exit_latency =</div><div class='del'>-			cpuidle_board_params[i].exit_latency;</div><div class='del'>-		cpuidle_params_table[i].target_residency =</div><div class='del'>-			cpuidle_board_params[i].target_residency;</div><div class='del'>-	}</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct cpuidle_driver omap3_idle_driver = {</div><div class='ctx'> 	.name = 	"omap3_idle",</div><div class='ctx'> 	.owner = 	THIS_MODULE,</div><div class='add'>+	.states = {</div><div class='add'>+		{</div><div class='add'>+			.enter		  = omap3_enter_idle,</div><div class='add'>+			.exit_latency	  = 2 + 2,</div><div class='add'>+			.target_residency = 5,</div><div class='add'>+			.flags		  = CPUIDLE_FLAG_TIME_VALID,</div><div class='add'>+			.name		  = "C1",</div><div class='add'>+			.desc		  = "MPU ON + CORE ON",</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.enter		  = omap3_enter_idle_bm,</div><div class='add'>+			.exit_latency	  = 10 + 10,</div><div class='add'>+			.target_residency = 30,</div><div class='add'>+			.flags		  = CPUIDLE_FLAG_TIME_VALID,</div><div class='add'>+			.name		  = "C2",</div><div class='add'>+			.desc		  = "MPU ON + CORE ON",</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.enter		  = omap3_enter_idle_bm,</div><div class='add'>+			.exit_latency	  = 50 + 50,</div><div class='add'>+			.target_residency = 300,</div><div class='add'>+			.flags		  = CPUIDLE_FLAG_TIME_VALID,</div><div class='add'>+			.name		  = "C3",</div><div class='add'>+			.desc		  = "MPU RET + CORE ON",</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.enter		  = omap3_enter_idle_bm,</div><div class='add'>+			.exit_latency	  = 1500 + 1800,</div><div class='add'>+			.target_residency = 4000,</div><div class='add'>+			.flags		  = CPUIDLE_FLAG_TIME_VALID,</div><div class='add'>+			.name		  = "C4",</div><div class='add'>+			.desc		  = "MPU OFF + CORE ON",</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.enter		  = omap3_enter_idle_bm,</div><div class='add'>+			.exit_latency	  = 2500 + 7500,</div><div class='add'>+			.target_residency = 12000,</div><div class='add'>+			.flags		  = CPUIDLE_FLAG_TIME_VALID,</div><div class='add'>+			.name		  = "C5",</div><div class='add'>+			.desc		  = "MPU RET + CORE RET",</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.enter		  = omap3_enter_idle_bm,</div><div class='add'>+			.exit_latency	  = 3000 + 8500,</div><div class='add'>+			.target_residency = 15000,</div><div class='add'>+			.flags		  = CPUIDLE_FLAG_TIME_VALID,</div><div class='add'>+			.name		  = "C6",</div><div class='add'>+			.desc		  = "MPU OFF + CORE RET",</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.enter		  = omap3_enter_idle_bm,</div><div class='add'>+			.exit_latency	  = 10000 + 30000,</div><div class='add'>+			.target_residency = 30000,</div><div class='add'>+			.flags		  = CPUIDLE_FLAG_TIME_VALID,</div><div class='add'>+			.name		  = "C7",</div><div class='add'>+			.desc		  = "MPU OFF + CORE OFF",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.state_count = ARRAY_SIZE(omap3_idle_data),</div><div class='add'>+	.safe_state_index = 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Helper to fill the C-state common data*/</div><div class='del'>-static inline void _fill_cstate(struct cpuidle_driver *drv,</div><div class='del'>-					int idx, const char *descr)</div><div class='del'>-{</div><div class='del'>-	struct cpuidle_state *state = &amp;drv-&gt;states[idx];</div><div class='del'>-</div><div class='del'>-	state-&gt;exit_latency	= cpuidle_params_table[idx].exit_latency;</div><div class='del'>-	state-&gt;target_residency	= cpuidle_params_table[idx].target_residency;</div><div class='del'>-	state-&gt;flags		= CPUIDLE_FLAG_TIME_VALID;</div><div class='del'>-	state-&gt;enter		= omap3_enter_idle_bm;</div><div class='del'>-	sprintf(state-&gt;name, "C%d", idx + 1);</div><div class='del'>-	strncpy(state-&gt;desc, descr, CPUIDLE_DESC_LEN);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Helper to register the driver_data */</div><div class='del'>-static inline struct omap3_idle_statedata *_fill_cstate_usage(</div><div class='del'>-					struct cpuidle_device *dev,</div><div class='del'>-					int idx)</div><div class='del'>-{</div><div class='del'>-	struct omap3_idle_statedata *cx = &amp;omap3_idle_data[idx];</div><div class='del'>-	struct cpuidle_state_usage *state_usage = &amp;dev-&gt;states_usage[idx];</div><div class='del'>-</div><div class='del'>-	cx-&gt;valid		= cpuidle_params_table[idx].valid;</div><div class='del'>-	cpuidle_set_statedata(state_usage, cx);</div><div class='del'>-</div><div class='del'>-	return cx;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * omap3_idle_init - Init routine for OMAP3 idle</div><div class='ctx'>  *</div><div class='hunk'>@@ -358,77 +357,20 @@ static inline struct omap3_idle_statedata *_fill_cstate_usage(</div><div class='ctx'> int __init omap3_idle_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpuidle_device *dev;</div><div class='del'>-	struct cpuidle_driver *drv = &amp;omap3_idle_driver;</div><div class='del'>-	struct omap3_idle_statedata *cx;</div><div class='ctx'> </div><div class='ctx'> 	mpu_pd = pwrdm_lookup("mpu_pwrdm");</div><div class='ctx'> 	core_pd = pwrdm_lookup("core_pwrdm");</div><div class='ctx'> 	per_pd = pwrdm_lookup("per_pwrdm");</div><div class='ctx'> 	cam_pd = pwrdm_lookup("cam_pwrdm");</div><div class='ctx'> </div><div class='add'>+	if (!mpu_pd || !core_pd || !per_pd || !cam_pd)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	drv-&gt;safe_state_index = -1;</div><div class='del'>-	dev = &amp;per_cpu(omap3_idle_dev, smp_processor_id());</div><div class='del'>-</div><div class='del'>-	/* C1 . MPU WFI + Core active */</div><div class='del'>-	_fill_cstate(drv, 0, "MPU ON + CORE ON");</div><div class='del'>-	(&amp;drv-&gt;states[0])-&gt;enter = omap3_enter_idle;</div><div class='del'>-	drv-&gt;safe_state_index = 0;</div><div class='del'>-	cx = _fill_cstate_usage(dev, 0);</div><div class='del'>-	cx-&gt;valid = 1;	/* C1 is always valid */</div><div class='del'>-	cx-&gt;mpu_state = PWRDM_POWER_ON;</div><div class='del'>-	cx-&gt;core_state = PWRDM_POWER_ON;</div><div class='del'>-</div><div class='del'>-	/* C2 . MPU WFI + Core inactive */</div><div class='del'>-	_fill_cstate(drv, 1, "MPU ON + CORE ON");</div><div class='del'>-	cx = _fill_cstate_usage(dev, 1);</div><div class='del'>-	cx-&gt;mpu_state = PWRDM_POWER_ON;</div><div class='del'>-	cx-&gt;core_state = PWRDM_POWER_ON;</div><div class='del'>-</div><div class='del'>-	/* C3 . MPU CSWR + Core inactive */</div><div class='del'>-	_fill_cstate(drv, 2, "MPU RET + CORE ON");</div><div class='del'>-	cx = _fill_cstate_usage(dev, 2);</div><div class='del'>-	cx-&gt;mpu_state = PWRDM_POWER_RET;</div><div class='del'>-	cx-&gt;core_state = PWRDM_POWER_ON;</div><div class='del'>-</div><div class='del'>-	/* C4 . MPU OFF + Core inactive */</div><div class='del'>-	_fill_cstate(drv, 3, "MPU OFF + CORE ON");</div><div class='del'>-	cx = _fill_cstate_usage(dev, 3);</div><div class='del'>-	cx-&gt;mpu_state = PWRDM_POWER_OFF;</div><div class='del'>-	cx-&gt;core_state = PWRDM_POWER_ON;</div><div class='del'>-</div><div class='del'>-	/* C5 . MPU RET + Core RET */</div><div class='del'>-	_fill_cstate(drv, 4, "MPU RET + CORE RET");</div><div class='del'>-	cx = _fill_cstate_usage(dev, 4);</div><div class='del'>-	cx-&gt;mpu_state = PWRDM_POWER_RET;</div><div class='del'>-	cx-&gt;core_state = PWRDM_POWER_RET;</div><div class='del'>-</div><div class='del'>-	/* C6 . MPU OFF + Core RET */</div><div class='del'>-	_fill_cstate(drv, 5, "MPU OFF + CORE RET");</div><div class='del'>-	cx = _fill_cstate_usage(dev, 5);</div><div class='del'>-	cx-&gt;mpu_state = PWRDM_POWER_OFF;</div><div class='del'>-	cx-&gt;core_state = PWRDM_POWER_RET;</div><div class='del'>-</div><div class='del'>-	/* C7 . MPU OFF + Core OFF */</div><div class='del'>-	_fill_cstate(drv, 6, "MPU OFF + CORE OFF");</div><div class='del'>-	cx = _fill_cstate_usage(dev, 6);</div><div class='del'>-	/*</div><div class='del'>-	 * Erratum i583: implementation for ES rev &lt; Es1.2 on 3630. We cannot</div><div class='del'>-	 * enable OFF mode in a stable form for previous revisions.</div><div class='del'>-	 * We disable C7 state as a result.</div><div class='del'>-	 */</div><div class='del'>-	if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)) {</div><div class='del'>-		cx-&gt;valid = 0;</div><div class='del'>-		pr_warn("%s: core off state C7 disabled due to i583\n",</div><div class='del'>-			__func__);</div><div class='del'>-	}</div><div class='del'>-	cx-&gt;mpu_state = PWRDM_POWER_OFF;</div><div class='del'>-	cx-&gt;core_state = PWRDM_POWER_OFF;</div><div class='del'>-</div><div class='del'>-	drv-&gt;state_count = OMAP3_NUM_STATES;</div><div class='ctx'> 	cpuidle_register_driver(&amp;omap3_idle_driver);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;state_count = OMAP3_NUM_STATES;</div><div class='add'>+	dev = &amp;per_cpu(omap3_idle_dev, smp_processor_id());</div><div class='add'>+	dev-&gt;cpu = 0;</div><div class='add'>+</div><div class='ctx'> 	if (cpuidle_register_device(dev)) {</div><div class='ctx'> 		printk(KERN_ERR "%s: CPUidle register device failed\n",</div><div class='ctx'> 		       __func__);</div><div class='head'>diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c<br/>index f386cbe9c889..be1617ca84bd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/cpuidle44xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/cpuidle44xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/cpuidle44xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/cpuidle44xx.c</a></div><div class='hunk'>@@ -24,26 +24,31 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CPU_IDLE</div><div class='ctx'> </div><div class='del'>-/* Machine specific information to be recorded in the C-state driver_data */</div><div class='add'>+/* Machine specific information */</div><div class='ctx'> struct omap4_idle_statedata {</div><div class='ctx'> 	u32 cpu_state;</div><div class='ctx'> 	u32 mpu_logic_state;</div><div class='ctx'> 	u32 mpu_state;</div><div class='del'>-	u8 valid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct cpuidle_params cpuidle_params_table[] = {</div><div class='del'>-	/* C1 - CPU0 ON + CPU1 ON + MPU ON */</div><div class='del'>-	{.exit_latency = 2 + 2 , .target_residency = 5, .valid = 1},</div><div class='del'>-	/* C2- CPU0 OFF + CPU1 OFF + MPU CSWR */</div><div class='del'>-	{.exit_latency = 328 + 440 , .target_residency = 960, .valid = 1},</div><div class='del'>-	/* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */</div><div class='del'>-	{.exit_latency = 460 + 518 , .target_residency = 1100, .valid = 1},</div><div class='add'>+static struct omap4_idle_statedata omap4_idle_data[] = {</div><div class='add'>+	{</div><div class='add'>+		.cpu_state = PWRDM_POWER_ON,</div><div class='add'>+		.mpu_state = PWRDM_POWER_ON,</div><div class='add'>+		.mpu_logic_state = PWRDM_POWER_RET,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.cpu_state = PWRDM_POWER_OFF,</div><div class='add'>+		.mpu_state = PWRDM_POWER_RET,</div><div class='add'>+		.mpu_logic_state = PWRDM_POWER_RET,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.cpu_state = PWRDM_POWER_OFF,</div><div class='add'>+		.mpu_state = PWRDM_POWER_RET,</div><div class='add'>+		.mpu_logic_state = PWRDM_POWER_OFF,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define OMAP4_NUM_STATES ARRAY_SIZE(cpuidle_params_table)</div><div class='del'>-</div><div class='del'>-struct omap4_idle_statedata omap4_idle_data[OMAP4_NUM_STATES];</div><div class='ctx'> static struct powerdomain *mpu_pd, *cpu0_pd, *cpu1_pd;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -60,8 +65,7 @@ static int omap4_enter_idle(struct cpuidle_device *dev,</div><div class='ctx'> 			struct cpuidle_driver *drv,</div><div class='ctx'> 			int index)</div><div class='ctx'> {</div><div class='del'>-	struct omap4_idle_statedata *cx =</div><div class='del'>-			cpuidle_get_statedata(&amp;dev-&gt;states_usage[index]);</div><div class='add'>+	struct omap4_idle_statedata *cx = &amp;omap4_idle_data[index];</div><div class='ctx'> 	u32 cpu1_state;</div><div class='ctx'> 	int cpu_id = smp_processor_id();</div><div class='ctx'> </div><div class='hunk'>@@ -78,7 +82,7 @@ static int omap4_enter_idle(struct cpuidle_device *dev,</div><div class='ctx'> 	cpu1_state = pwrdm_read_pwrst(cpu1_pd);</div><div class='ctx'> 	if (cpu1_state != PWRDM_POWER_OFF) {</div><div class='ctx'> 		index = drv-&gt;safe_state_index;</div><div class='del'>-		cx = cpuidle_get_statedata(&amp;dev-&gt;states_usage[index]);</div><div class='add'>+		cx = &amp;omap4_idle_data[index];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (index &gt; 0)</div><div class='hunk'>@@ -133,36 +137,39 @@ struct cpuidle_driver omap4_idle_driver = {</div><div class='ctx'> 	.name				= "omap4_idle",</div><div class='ctx'> 	.owner				= THIS_MODULE,</div><div class='ctx'> 	.en_core_tk_irqen		= 1,</div><div class='add'>+	.states = {</div><div class='add'>+		{</div><div class='add'>+			/* C1 - CPU0 ON + CPU1 ON + MPU ON */</div><div class='add'>+			.exit_latency = 2 + 2,</div><div class='add'>+			.target_residency = 5,</div><div class='add'>+			.flags = CPUIDLE_FLAG_TIME_VALID,</div><div class='add'>+			.enter = omap4_enter_idle,</div><div class='add'>+			.name = "C1",</div><div class='add'>+			.desc = "MPUSS ON"</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+                        /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */</div><div class='add'>+			.exit_latency = 328 + 440,</div><div class='add'>+			.target_residency = 960,</div><div class='add'>+			.flags = CPUIDLE_FLAG_TIME_VALID,</div><div class='add'>+			.enter = omap4_enter_idle,</div><div class='add'>+			.name = "C2",</div><div class='add'>+			.desc = "MPUSS CSWR",</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			/* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */</div><div class='add'>+			.exit_latency = 460 + 518,</div><div class='add'>+			.target_residency = 1100,</div><div class='add'>+			.flags = CPUIDLE_FLAG_TIME_VALID,</div><div class='add'>+			.enter = omap4_enter_idle,</div><div class='add'>+			.name = "C3",</div><div class='add'>+			.desc = "MPUSS OSWR",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.state_count = ARRAY_SIZE(omap4_idle_data),</div><div class='add'>+	.safe_state_index = 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline void _fill_cstate(struct cpuidle_driver *drv,</div><div class='del'>-					int idx, const char *descr)</div><div class='del'>-{</div><div class='del'>-	struct cpuidle_state *state = &amp;drv-&gt;states[idx];</div><div class='del'>-</div><div class='del'>-	state-&gt;exit_latency	= cpuidle_params_table[idx].exit_latency;</div><div class='del'>-	state-&gt;target_residency	= cpuidle_params_table[idx].target_residency;</div><div class='del'>-	state-&gt;flags		= CPUIDLE_FLAG_TIME_VALID;</div><div class='del'>-	state-&gt;enter		= omap4_enter_idle;</div><div class='del'>-	sprintf(state-&gt;name, "C%d", idx + 1);</div><div class='del'>-	strncpy(state-&gt;desc, descr, CPUIDLE_DESC_LEN);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline struct omap4_idle_statedata *_fill_cstate_usage(</div><div class='del'>-					struct cpuidle_device *dev,</div><div class='del'>-					int idx)</div><div class='del'>-{</div><div class='del'>-	struct omap4_idle_statedata *cx = &amp;omap4_idle_data[idx];</div><div class='del'>-	struct cpuidle_state_usage *state_usage = &amp;dev-&gt;states_usage[idx];</div><div class='del'>-</div><div class='del'>-	cx-&gt;valid		= cpuidle_params_table[idx].valid;</div><div class='del'>-	cpuidle_set_statedata(state_usage, cx);</div><div class='del'>-</div><div class='del'>-	return cx;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * omap4_idle_init - Init routine for OMAP4 idle</div><div class='ctx'>  *</div><div class='hunk'>@@ -171,9 +178,7 @@ static inline struct omap4_idle_statedata *_fill_cstate_usage(</div><div class='ctx'>  */</div><div class='ctx'> int __init omap4_idle_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct omap4_idle_statedata *cx;</div><div class='ctx'> 	struct cpuidle_device *dev;</div><div class='del'>-	struct cpuidle_driver *drv = &amp;omap4_idle_driver;</div><div class='ctx'> 	unsigned int cpu_id = 0;</div><div class='ctx'> </div><div class='ctx'> 	mpu_pd = pwrdm_lookup("mpu_pwrdm");</div><div class='hunk'>@@ -182,42 +187,15 @@ int __init omap4_idle_init(void)</div><div class='ctx'> 	if ((!mpu_pd) || (!cpu0_pd) || (!cpu1_pd))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	drv-&gt;safe_state_index = -1;</div><div class='ctx'> 	dev = &amp;per_cpu(omap4_idle_dev, cpu_id);</div><div class='ctx'> 	dev-&gt;cpu = cpu_id;</div><div class='ctx'> </div><div class='del'>-	/* C1 - CPU0 ON + CPU1 ON + MPU ON */</div><div class='del'>-	_fill_cstate(drv, 0, "MPUSS ON");</div><div class='del'>-	drv-&gt;safe_state_index = 0;</div><div class='del'>-	cx = _fill_cstate_usage(dev, 0);</div><div class='del'>-	cx-&gt;valid = 1;	/* C1 is always valid */</div><div class='del'>-	cx-&gt;cpu_state = PWRDM_POWER_ON;</div><div class='del'>-	cx-&gt;mpu_state = PWRDM_POWER_ON;</div><div class='del'>-	cx-&gt;mpu_logic_state = PWRDM_POWER_RET;</div><div class='del'>-</div><div class='del'>-	/* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */</div><div class='del'>-	_fill_cstate(drv, 1, "MPUSS CSWR");</div><div class='del'>-	cx = _fill_cstate_usage(dev, 1);</div><div class='del'>-	cx-&gt;cpu_state = PWRDM_POWER_OFF;</div><div class='del'>-	cx-&gt;mpu_state = PWRDM_POWER_RET;</div><div class='del'>-	cx-&gt;mpu_logic_state = PWRDM_POWER_RET;</div><div class='del'>-</div><div class='del'>-	/* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */</div><div class='del'>-	_fill_cstate(drv, 2, "MPUSS OSWR");</div><div class='del'>-	cx = _fill_cstate_usage(dev, 2);</div><div class='del'>-	cx-&gt;cpu_state = PWRDM_POWER_OFF;</div><div class='del'>-	cx-&gt;mpu_state = PWRDM_POWER_RET;</div><div class='del'>-	cx-&gt;mpu_logic_state = PWRDM_POWER_OFF;</div><div class='del'>-</div><div class='del'>-	drv-&gt;state_count = OMAP4_NUM_STATES;</div><div class='ctx'> 	cpuidle_register_driver(&amp;omap4_idle_driver);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;state_count = OMAP4_NUM_STATES;</div><div class='ctx'> 	if (cpuidle_register_device(dev)) {</div><div class='ctx'> 		pr_err("%s: CPUidle register device failed\n", __func__);</div><div class='del'>-			return -EIO;</div><div class='del'>-		}</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c<br/>index e4336035c0ea..7b4b9327e543 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/devices.c</a></div><div class='hunk'>@@ -42,7 +42,6 @@</div><div class='ctx'> </div><div class='ctx'> static int __init omap3_l3_init(void)</div><div class='ctx'> {</div><div class='del'>-	int l;</div><div class='ctx'> 	struct omap_hwmod *oh;</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='ctx'> 	char oh_name[L3_MODULES_MAX_LEN];</div><div class='hunk'>@@ -54,7 +53,7 @@ static int __init omap3_l3_init(void)</div><div class='ctx'> 	if (!(cpu_is_omap34xx()))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");</div><div class='add'>+	snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");</div><div class='ctx'> </div><div class='ctx'> 	oh = omap_hwmod_lookup(oh_name);</div><div class='ctx'> </div><div class='hunk'>@@ -72,7 +71,7 @@ postcore_initcall(omap3_l3_init);</div><div class='ctx'> </div><div class='ctx'> static int __init omap4_l3_init(void)</div><div class='ctx'> {</div><div class='del'>-	int l, i;</div><div class='add'>+	int i;</div><div class='ctx'> 	struct omap_hwmod *oh[3];</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='ctx'> 	char oh_name[L3_MODULES_MAX_LEN];</div><div class='hunk'>@@ -89,7 +88,7 @@ static int __init omap4_l3_init(void)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; L3_MODULES; i++) {</div><div class='del'>-		l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);</div><div class='add'>+		snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);</div><div class='ctx'> </div><div class='ctx'> 		oh[i] = omap_hwmod_lookup(oh_name);</div><div class='ctx'> 		if (!(oh[i]))</div><div class='hunk'>@@ -355,6 +354,36 @@ static void __init omap_init_dmic(void)</div><div class='ctx'> static inline void omap_init_dmic(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI) || \</div><div class='add'>+		defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI_MODULE)</div><div class='add'>+</div><div class='add'>+static struct platform_device omap_hdmi_audio = {</div><div class='add'>+	.name	= "omap-hdmi-audio",</div><div class='add'>+	.id	= -1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init omap_init_hdmi_audio(void)</div><div class='add'>+{</div><div class='add'>+	struct omap_hwmod *oh;</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+</div><div class='add'>+	oh = omap_hwmod_lookup("dss_hdmi");</div><div class='add'>+	if (!oh) {</div><div class='add'>+		printk(KERN_ERR "Could not look up dss_hdmi hw_mod\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdev = omap_device_build("omap-hdmi-audio-dai",</div><div class='add'>+		-1, oh, NULL, 0, NULL, 0, 0);</div><div class='add'>+	WARN(IS_ERR(pdev),</div><div class='add'>+	     "Can't build omap_device for omap-hdmi-audio-dai.\n");</div><div class='add'>+</div><div class='add'>+	platform_device_register(&amp;omap_hdmi_audio);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline void omap_init_hdmi_audio(void) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/mcspi.h&gt;</div><div class='hunk'>@@ -616,7 +645,11 @@ static inline void omap242x_mmc_mux(struct omap_mmc_platform_data</div><div class='ctx'> </div><div class='ctx'> void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)</div><div class='ctx'> {</div><div class='del'>-	char *name = "mmci-omap";</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct omap_hwmod *oh;</div><div class='add'>+	int id = 0;</div><div class='add'>+	char *oh_name = "msdi1";</div><div class='add'>+	char *dev_name = "mmci-omap";</div><div class='ctx'> </div><div class='ctx'> 	if (!mmc_data[0]) {</div><div class='ctx'> 		pr_err("%s fails: Incomplete platform data\n", __func__);</div><div class='hunk'>@@ -624,8 +657,17 @@ void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	omap242x_mmc_mux(mmc_data[0]);</div><div class='del'>-	omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,</div><div class='del'>-					INT_24XX_MMC_IRQ, mmc_data[0]);</div><div class='add'>+</div><div class='add'>+	oh = omap_hwmod_lookup(oh_name);</div><div class='add'>+	if (!oh) {</div><div class='add'>+		pr_err("Could not look up %s\n", oh_name);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	pdev = omap_device_build(dev_name, id, oh, mmc_data[0],</div><div class='add'>+				 sizeof(struct omap_mmc_platform_data), NULL, 0, 0);</div><div class='add'>+	if (IS_ERR(pdev))</div><div class='add'>+		WARN(1, "Can'd build omap_device for %s:%s.\n",</div><div class='add'>+					dev_name, oh-&gt;name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='hunk'>@@ -701,11 +743,15 @@ static int __init omap2_init_devices(void)</div><div class='ctx'> 	 * in alphabetical order so they're easier to sort through.</div><div class='ctx'> 	 */</div><div class='ctx'> 	omap_init_audio();</div><div class='del'>-	omap_init_mcpdm();</div><div class='del'>-	omap_init_dmic();</div><div class='ctx'> 	omap_init_camera();</div><div class='add'>+	omap_init_hdmi_audio();</div><div class='ctx'> 	omap_init_mbox();</div><div class='del'>-	omap_init_mcspi();</div><div class='add'>+	/* If dtb is there, the devices will be created dynamically */</div><div class='add'>+	if (!of_have_populated_dt()) {</div><div class='add'>+		omap_init_dmic();</div><div class='add'>+		omap_init_mcpdm();</div><div class='add'>+		omap_init_mcspi();</div><div class='add'>+	}</div><div class='ctx'> 	omap_init_pmu();</div><div class='ctx'> 	omap_hdq_init();</div><div class='ctx'> 	omap_init_sti();</div><div class='head'>diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c<br/>index db5a88a36c63..54d49ddb9b81 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/display.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/display.c</a></div><div class='hunk'>@@ -180,16 +180,133 @@ static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)</div><div class='ctx'> 		omap4_dsi_mux_pads(dsi_id, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int omap_dss_set_min_bus_tput(struct device *dev, unsigned long tput)</div><div class='add'>+{</div><div class='add'>+	return omap_pm_set_min_bus_tput(dev, OCP_INITIATOR_AGENT, tput);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_device *create_dss_pdev(const char *pdev_name,</div><div class='add'>+		int pdev_id, const char *oh_name, void *pdata, int pdata_len,</div><div class='add'>+		struct platform_device *parent)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct omap_device *od;</div><div class='add'>+	struct omap_hwmod *ohs[1];</div><div class='add'>+	struct omap_hwmod *oh;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	oh = omap_hwmod_lookup(oh_name);</div><div class='add'>+	if (!oh) {</div><div class='add'>+		pr_err("Could not look up %s\n", oh_name);</div><div class='add'>+		r = -ENODEV;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdev = platform_device_alloc(pdev_name, pdev_id);</div><div class='add'>+	if (!pdev) {</div><div class='add'>+		pr_err("Could not create pdev for %s\n", pdev_name);</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (parent != NULL)</div><div class='add'>+		pdev-&gt;dev.parent = &amp;parent-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (pdev-&gt;id != -1)</div><div class='add'>+		dev_set_name(&amp;pdev-&gt;dev, "%s.%d", pdev-&gt;name, pdev-&gt;id);</div><div class='add'>+	else</div><div class='add'>+		dev_set_name(&amp;pdev-&gt;dev, "%s", pdev-&gt;name);</div><div class='add'>+</div><div class='add'>+	ohs[0] = oh;</div><div class='add'>+	od = omap_device_alloc(pdev, ohs, 1, NULL, 0);</div><div class='add'>+	if (!od) {</div><div class='add'>+		pr_err("Could not alloc omap_device for %s\n", pdev_name);</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = platform_device_add_data(pdev, pdata, pdata_len);</div><div class='add'>+	if (r) {</div><div class='add'>+		pr_err("Could not set pdata for %s\n", pdev_name);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = omap_device_register(pdev);</div><div class='add'>+	if (r) {</div><div class='add'>+		pr_err("Could not register omap_device for %s\n", pdev_name);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pdev;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	return ERR_PTR(r);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_device *create_simple_dss_pdev(const char *pdev_name,</div><div class='add'>+		int pdev_id, void *pdata, int pdata_len,</div><div class='add'>+		struct platform_device *parent)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	pdev = platform_device_alloc(pdev_name, pdev_id);</div><div class='add'>+	if (!pdev) {</div><div class='add'>+		pr_err("Could not create pdev for %s\n", pdev_name);</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (parent != NULL)</div><div class='add'>+		pdev-&gt;dev.parent = &amp;parent-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (pdev-&gt;id != -1)</div><div class='add'>+		dev_set_name(&amp;pdev-&gt;dev, "%s.%d", pdev-&gt;name, pdev-&gt;id);</div><div class='add'>+	else</div><div class='add'>+		dev_set_name(&amp;pdev-&gt;dev, "%s", pdev-&gt;name);</div><div class='add'>+</div><div class='add'>+	r = platform_device_add_data(pdev, pdata, pdata_len);</div><div class='add'>+	if (r) {</div><div class='add'>+		pr_err("Could not set pdata for %s\n", pdev_name);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = omap_device_register(pdev);</div><div class='add'>+	if (r) {</div><div class='add'>+		pr_err("Could not register omap_device for %s\n", pdev_name);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pdev;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	return ERR_PTR(r);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int __init omap_display_init(struct omap_dss_board_info *board_data)</div><div class='ctx'> {</div><div class='ctx'> 	int r = 0;</div><div class='del'>-	struct omap_hwmod *oh;</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='ctx'> 	int i, oh_count;</div><div class='del'>-	struct omap_display_platform_data pdata;</div><div class='ctx'> 	const struct omap_dss_hwmod_data *curr_dss_hwmod;</div><div class='add'>+	struct platform_device *dss_pdev;</div><div class='add'>+</div><div class='add'>+	/* create omapdss device */</div><div class='add'>+</div><div class='add'>+	board_data-&gt;dsi_enable_pads = omap_dsi_enable_pads;</div><div class='add'>+	board_data-&gt;dsi_disable_pads = omap_dsi_disable_pads;</div><div class='add'>+	board_data-&gt;get_context_loss_count = omap_pm_get_dev_context_loss_count;</div><div class='add'>+	board_data-&gt;set_min_bus_tput = omap_dss_set_min_bus_tput;</div><div class='add'>+</div><div class='add'>+	omap_display_device.dev.platform_data = board_data;</div><div class='add'>+</div><div class='add'>+	r = platform_device_register(&amp;omap_display_device);</div><div class='add'>+	if (r &lt; 0) {</div><div class='add'>+		pr_err("Unable to register omapdss device\n");</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	memset(&amp;pdata, 0, sizeof(pdata));</div><div class='add'>+	/* create devices for dss hwmods */</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_is_omap24xx()) {</div><div class='ctx'> 		curr_dss_hwmod = omap2_dss_hwmod_data;</div><div class='hunk'>@@ -202,39 +319,58 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)</div><div class='ctx'> 		oh_count = ARRAY_SIZE(omap4_dss_hwmod_data);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (board_data-&gt;dsi_enable_pads == NULL)</div><div class='del'>-		board_data-&gt;dsi_enable_pads = omap_dsi_enable_pads;</div><div class='del'>-	if (board_data-&gt;dsi_disable_pads == NULL)</div><div class='del'>-		board_data-&gt;dsi_disable_pads = omap_dsi_disable_pads;</div><div class='del'>-</div><div class='del'>-	pdata.board_data = board_data;</div><div class='del'>-	pdata.board_data-&gt;get_context_loss_count =</div><div class='del'>-		omap_pm_get_dev_context_loss_count;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; oh_count; i++) {</div><div class='del'>-		oh = omap_hwmod_lookup(curr_dss_hwmod[i].oh_name);</div><div class='del'>-		if (!oh) {</div><div class='del'>-			pr_err("Could not look up %s\n",</div><div class='del'>-				curr_dss_hwmod[i].oh_name);</div><div class='del'>-			return -ENODEV;</div><div class='add'>+	/*</div><div class='add'>+	 * First create the pdev for dss_core, which is used as a parent device</div><div class='add'>+	 * by the other dss pdevs. Note: dss_core has to be the first item in</div><div class='add'>+	 * the hwmod list.</div><div class='add'>+	 */</div><div class='add'>+	dss_pdev = create_dss_pdev(curr_dss_hwmod[0].dev_name,</div><div class='add'>+			curr_dss_hwmod[0].id,</div><div class='add'>+			curr_dss_hwmod[0].oh_name,</div><div class='add'>+			board_data, sizeof(*board_data),</div><div class='add'>+			NULL);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(dss_pdev)) {</div><div class='add'>+		pr_err("Could not build omap_device for %s\n",</div><div class='add'>+				curr_dss_hwmod[0].oh_name);</div><div class='add'>+</div><div class='add'>+		return PTR_ERR(dss_pdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; oh_count; i++) {</div><div class='add'>+		pdev = create_dss_pdev(curr_dss_hwmod[i].dev_name,</div><div class='add'>+				curr_dss_hwmod[i].id,</div><div class='add'>+				curr_dss_hwmod[i].oh_name,</div><div class='add'>+				board_data, sizeof(*board_data),</div><div class='add'>+				dss_pdev);</div><div class='add'>+</div><div class='add'>+		if (IS_ERR(pdev)) {</div><div class='add'>+			pr_err("Could not build omap_device for %s\n",</div><div class='add'>+					curr_dss_hwmod[i].oh_name);</div><div class='add'>+</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		pdev = omap_device_build(curr_dss_hwmod[i].dev_name,</div><div class='del'>-				curr_dss_hwmod[i].id, oh, &amp;pdata,</div><div class='del'>-				sizeof(struct omap_display_platform_data),</div><div class='del'>-				NULL, 0, 0);</div><div class='add'>+	/* Create devices for DPI and SDI */</div><div class='ctx'> </div><div class='del'>-		if (WARN((IS_ERR(pdev)), "Could not build omap_device for %s\n",</div><div class='del'>-				curr_dss_hwmod[i].oh_name))</div><div class='del'>-			return -ENODEV;</div><div class='add'>+	pdev = create_simple_dss_pdev("omapdss_dpi", -1,</div><div class='add'>+			board_data, sizeof(*board_data), dss_pdev);</div><div class='add'>+	if (IS_ERR(pdev)) {</div><div class='add'>+		pr_err("Could not build platform_device for omapdss_dpi\n");</div><div class='add'>+		return PTR_ERR(pdev);</div><div class='ctx'> 	}</div><div class='del'>-	omap_display_device.dev.platform_data = board_data;</div><div class='ctx'> </div><div class='del'>-	r = platform_device_register(&amp;omap_display_device);</div><div class='del'>-	if (r &lt; 0)</div><div class='del'>-		printk(KERN_ERR "Unable to register OMAP-Display device\n");</div><div class='add'>+	if (cpu_is_omap34xx()) {</div><div class='add'>+		pdev = create_simple_dss_pdev("omapdss_sdi", -1,</div><div class='add'>+				board_data, sizeof(*board_data), dss_pdev);</div><div class='add'>+		if (IS_ERR(pdev)) {</div><div class='add'>+			pr_err("Could not build platform_device for omapdss_sdi\n");</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return r;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dispc_disable_outputs(void)</div><div class='head'>diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c<br/>index b19d8496c16e..ff75abe60af2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/dma.c</a></div><div class='hunk'>@@ -227,10 +227,6 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)</div><div class='ctx'> </div><div class='ctx'> 	dma_stride		= OMAP2_DMA_STRIDE;</div><div class='ctx'> 	dma_common_ch_start	= CSDP;</div><div class='del'>-	if (cpu_is_omap3630() || cpu_is_omap44xx())</div><div class='del'>-		dma_common_ch_end = CCDN;</div><div class='del'>-	else</div><div class='del'>-		dma_common_ch_end = CCFN;</div><div class='ctx'> </div><div class='ctx'> 	p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);</div><div class='ctx'> 	if (!p) {</div><div class='hunk'>@@ -277,6 +273,13 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "%s: kzalloc fail\n", __func__);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* Check the capabilities register for descriptor loading feature */</div><div class='add'>+	if (dma_read(CAPS_0, 0) &amp; DMA_HAS_DESCRIPTOR_CAPS)</div><div class='add'>+		dma_common_ch_end = CCDN;</div><div class='add'>+	else</div><div class='add'>+		dma_common_ch_end = CCFN;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c<br/>index fc56745676fa..f0f10beeffe8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/dpll3xxx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/dpll3xxx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/dpll3xxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/dpll3xxx.c</a></div><div class='hunk'>@@ -142,7 +142,8 @@ static int _omap3_noncore_dpll_lock(struct clk *clk)</div><div class='ctx'> </div><div class='ctx'> 	ai = omap3_dpll_autoidle_read(clk);</div><div class='ctx'> </div><div class='del'>-	omap3_dpll_deny_idle(clk);</div><div class='add'>+	if (ai)</div><div class='add'>+		omap3_dpll_deny_idle(clk);</div><div class='ctx'> </div><div class='ctx'> 	_omap3_dpll_write_clken(clk, DPLL_LOCKED);</div><div class='ctx'> </div><div class='hunk'>@@ -186,8 +187,6 @@ static int _omap3_noncore_dpll_bypass(struct clk *clk)</div><div class='ctx'> </div><div class='ctx'> 	if (ai)</div><div class='ctx'> 		omap3_dpll_allow_idle(clk);</div><div class='del'>-	else</div><div class='del'>-		omap3_dpll_deny_idle(clk);</div><div class='ctx'> </div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='hunk'>@@ -216,8 +215,6 @@ static int _omap3_noncore_dpll_stop(struct clk *clk)</div><div class='ctx'> </div><div class='ctx'> 	if (ai)</div><div class='ctx'> 		omap3_dpll_allow_idle(clk);</div><div class='del'>-	else</div><div class='del'>-		omap3_dpll_deny_idle(clk);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -519,6 +516,9 @@ u32 omap3_dpll_autoidle_read(struct clk *clk)</div><div class='ctx'> </div><div class='ctx'> 	dd = clk-&gt;dpll_data;</div><div class='ctx'> </div><div class='add'>+	if (!dd-&gt;autoidle_reg)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	v = __raw_readl(dd-&gt;autoidle_reg);</div><div class='ctx'> 	v &amp;= dd-&gt;autoidle_mask;</div><div class='ctx'> 	v &gt;&gt;= __ffs(dd-&gt;autoidle_mask);</div><div class='hunk'>@@ -545,6 +545,12 @@ void omap3_dpll_allow_idle(struct clk *clk)</div><div class='ctx'> </div><div class='ctx'> 	dd = clk-&gt;dpll_data;</div><div class='ctx'> </div><div class='add'>+	if (!dd-&gt;autoidle_reg) {</div><div class='add'>+		pr_debug("clock: DPLL %s: autoidle not supported\n",</div><div class='add'>+			clk-&gt;name);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * REVISIT: CORE DPLL can optionally enter low-power bypass</div><div class='ctx'> 	 * by writing 0x5 instead of 0x1.  Add some mechanism to</div><div class='hunk'>@@ -554,6 +560,7 @@ void omap3_dpll_allow_idle(struct clk *clk)</div><div class='ctx'> 	v &amp;= ~dd-&gt;autoidle_mask;</div><div class='ctx'> 	v |= DPLL_AUTOIDLE_LOW_POWER_STOP &lt;&lt; __ffs(dd-&gt;autoidle_mask);</div><div class='ctx'> 	__raw_writel(v, dd-&gt;autoidle_reg);</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -572,6 +579,12 @@ void omap3_dpll_deny_idle(struct clk *clk)</div><div class='ctx'> </div><div class='ctx'> 	dd = clk-&gt;dpll_data;</div><div class='ctx'> </div><div class='add'>+	if (!dd-&gt;autoidle_reg) {</div><div class='add'>+		pr_debug("clock: DPLL %s: autoidle not supported\n",</div><div class='add'>+			clk-&gt;name);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	v = __raw_readl(dd-&gt;autoidle_reg);</div><div class='ctx'> 	v &amp;= ~dd-&gt;autoidle_mask;</div><div class='ctx'> 	v |= DPLL_AUTOIDLE_DISABLE &lt;&lt; __ffs(dd-&gt;autoidle_mask);</div><div class='head'>diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c<br/>index 74f18f2952df..845309f146fe 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/dsp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/dsp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/dsp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/dsp.c</a></div><div class='hunk'>@@ -28,8 +28,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/dsp.h&gt;</div><div class='ctx'> </div><div class='del'>-extern phys_addr_t omap_dsp_get_mempool_base(void);</div><div class='del'>-</div><div class='ctx'> static struct platform_device *omap_dsp_pdev;</div><div class='ctx'> </div><div class='ctx'> static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {</div><div class='hunk'>@@ -47,6 +45,31 @@ static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {</div><div class='ctx'> 	.dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static phys_addr_t omap_dsp_phys_mempool_base;</div><div class='add'>+</div><div class='add'>+void __init omap_dsp_reserve_sdram_memblock(void)</div><div class='add'>+{</div><div class='add'>+	phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;</div><div class='add'>+	phys_addr_t paddr;</div><div class='add'>+</div><div class='add'>+	if (!size)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	paddr = arm_memblock_steal(size, SZ_1M);</div><div class='add'>+	if (!paddr) {</div><div class='add'>+		pr_err("%s: failed to reserve %llx bytes\n",</div><div class='add'>+				__func__, (unsigned long long)size);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	omap_dsp_phys_mempool_base = paddr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static phys_addr_t omap_dsp_get_mempool_base(void)</div><div class='add'>+{</div><div class='add'>+	return omap_dsp_phys_mempool_base;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init omap_dsp_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='hunk'>@@ -57,8 +80,9 @@ static int __init omap_dsp_init(void)</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;phys_mempool_base) {</div><div class='ctx'> 		pdata-&gt;phys_mempool_size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;</div><div class='del'>-		pr_info("%s: %x bytes @ %x\n", __func__,</div><div class='del'>-			pdata-&gt;phys_mempool_size, pdata-&gt;phys_mempool_base);</div><div class='add'>+		pr_info("%s: %llx bytes @ %llx\n", __func__,</div><div class='add'>+			(unsigned long long)pdata-&gt;phys_mempool_size,</div><div class='add'>+			(unsigned long long)pdata-&gt;phys_mempool_base);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pdev = platform_device_alloc("omap-dsp", -1);</div><div class='head'>diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c<br/>index 2f994e5194e8..9ad7d489b0de 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/gpio.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/omap_hwmod.h&gt;</div><div class='ctx'> #include &lt;plat/omap_device.h&gt;</div><div class='hunk'>@@ -55,10 +56,9 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)</div><div class='ctx'> 	dev_attr = (struct omap_gpio_dev_attr *)oh-&gt;dev_attr;</div><div class='ctx'> 	pdata-&gt;bank_width = dev_attr-&gt;bank_width;</div><div class='ctx'> 	pdata-&gt;dbck_flag = dev_attr-&gt;dbck_flag;</div><div class='del'>-	pdata-&gt;virtual_irq_start = IH_GPIO_BASE + 32 * (id - 1);</div><div class='ctx'> 	pdata-&gt;get_context_loss_count = omap_pm_get_dev_context_loss_count;</div><div class='ctx'> 	pdata-&gt;regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL);</div><div class='del'>-	if (!pdata) {</div><div class='add'>+	if (!pdata-&gt;regs) {</div><div class='ctx'> 		pr_err("gpio%d: Memory allocation failed\n", id);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -102,6 +102,8 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)</div><div class='ctx'> 		pdata-&gt;regs-&gt;dataout = OMAP4_GPIO_DATAOUT;</div><div class='ctx'> 		pdata-&gt;regs-&gt;set_dataout = OMAP4_GPIO_SETDATAOUT;</div><div class='ctx'> 		pdata-&gt;regs-&gt;clr_dataout = OMAP4_GPIO_CLEARDATAOUT;</div><div class='add'>+		pdata-&gt;regs-&gt;irqstatus_raw0 = OMAP4_GPIO_IRQSTATUSRAW0;</div><div class='add'>+		pdata-&gt;regs-&gt;irqstatus_raw1 = OMAP4_GPIO_IRQSTATUSRAW1;</div><div class='ctx'> 		pdata-&gt;regs-&gt;irqstatus = OMAP4_GPIO_IRQSTATUS0;</div><div class='ctx'> 		pdata-&gt;regs-&gt;irqstatus2 = OMAP4_GPIO_IRQSTATUS1;</div><div class='ctx'> 		pdata-&gt;regs-&gt;irqenable = OMAP4_GPIO_IRQSTATUSSET0;</div><div class='hunk'>@@ -146,7 +148,10 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)</div><div class='ctx'>  */</div><div class='ctx'> static int __init omap2_gpio_init(void)</div><div class='ctx'> {</div><div class='del'>-	return omap_hwmod_for_each_by_class("gpio", omap2_gpio_dev_init,</div><div class='del'>-						NULL);</div><div class='add'>+	/* If dtb is there, the devices will be created dynamically */</div><div class='add'>+	if (of_have_populated_dt())</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return omap_hwmod_for_each_by_class("gpio", omap2_gpio_dev_init, NULL);</div><div class='ctx'> }</div><div class='ctx'> postcore_initcall(omap2_gpio_init);</div><div class='head'>diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c<br/>index 385b3e02c4a6..a0fa9bb2bda5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/gpmc-onenand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/gpmc-onenand.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/gpmc-onenand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/gpmc-onenand.c</a></div><div class='hunk'>@@ -176,7 +176,7 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,</div><div class='ctx'> 	const int t_wpl  = 40;</div><div class='ctx'> 	const int t_wph  = 30;</div><div class='ctx'> 	int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo;</div><div class='del'>-	int tick_ns, div, fclk_offset_ns, fclk_offset, gpmc_clk_ns, latency;</div><div class='add'>+	int div, fclk_offset_ns, fclk_offset, gpmc_clk_ns, latency;</div><div class='ctx'> 	int first_time = 0, hf = 0, vhf = 0, sync_read = 0, sync_write = 0;</div><div class='ctx'> 	int err, ticks_cez;</div><div class='ctx'> 	int cs = cfg-&gt;cs, freq = *freq_ptr;</div><div class='hunk'>@@ -240,7 +240,6 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tick_ns = gpmc_ticks_to_ns(1);</div><div class='ctx'> 	div = gpmc_cs_calc_divider(cs, min_gpmc_clk_period);</div><div class='ctx'> 	gpmc_clk_ns = gpmc_ticks_to_ns(div);</div><div class='ctx'> 	if (gpmc_clk_ns &lt; 15) /* &gt;66Mhz */</div><div class='head'>diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c<br/>index 00d510858e28..2286410671e7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/gpmc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/gpmc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/gpmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/gpmc.c</a></div><div class='hunk'>@@ -49,6 +49,20 @@</div><div class='ctx'> #define GPMC_ECC_CONTROL	0x1f8</div><div class='ctx'> #define GPMC_ECC_SIZE_CONFIG	0x1fc</div><div class='ctx'> #define GPMC_ECC1_RESULT        0x200</div><div class='add'>+#define GPMC_ECC_BCH_RESULT_0   0x240   /* not available on OMAP2 */</div><div class='add'>+</div><div class='add'>+/* GPMC ECC control settings */</div><div class='add'>+#define GPMC_ECC_CTRL_ECCCLEAR		0x100</div><div class='add'>+#define GPMC_ECC_CTRL_ECCDISABLE	0x000</div><div class='add'>+#define GPMC_ECC_CTRL_ECCREG1		0x001</div><div class='add'>+#define GPMC_ECC_CTRL_ECCREG2		0x002</div><div class='add'>+#define GPMC_ECC_CTRL_ECCREG3		0x003</div><div class='add'>+#define GPMC_ECC_CTRL_ECCREG4		0x004</div><div class='add'>+#define GPMC_ECC_CTRL_ECCREG5		0x005</div><div class='add'>+#define GPMC_ECC_CTRL_ECCREG6		0x006</div><div class='add'>+#define GPMC_ECC_CTRL_ECCREG7		0x007</div><div class='add'>+#define GPMC_ECC_CTRL_ECCREG8		0x008</div><div class='add'>+#define GPMC_ECC_CTRL_ECCREG9		0x009</div><div class='ctx'> </div><div class='ctx'> #define GPMC_CS0_OFFSET		0x60</div><div class='ctx'> #define GPMC_CS_SIZE		0x30</div><div class='hunk'>@@ -755,8 +769,7 @@ static int __init gpmc_init(void)</div><div class='ctx'> 		irq++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(gpmc_irq,</div><div class='del'>-			gpmc_handle_irq, IRQF_SHARED, "gpmc", gpmc_base);</div><div class='add'>+	ret = request_irq(gpmc_irq, gpmc_handle_irq, IRQF_SHARED, "gpmc", NULL);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		pr_err("gpmc: irq-%d could not claim: err %d\n",</div><div class='ctx'> 						gpmc_irq, ret);</div><div class='hunk'>@@ -861,8 +874,9 @@ int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)</div><div class='ctx'> 	gpmc_ecc_used = cs;</div><div class='ctx'> </div><div class='ctx'> 	/* clear ecc and enable bits */</div><div class='del'>-	val = ((0x00000001&lt;&lt;8) | 0x00000001);</div><div class='del'>-	gpmc_write_reg(GPMC_ECC_CONTROL, val);</div><div class='add'>+	gpmc_write_reg(GPMC_ECC_CONTROL,</div><div class='add'>+			GPMC_ECC_CTRL_ECCCLEAR |</div><div class='add'>+			GPMC_ECC_CTRL_ECCREG1);</div><div class='ctx'> </div><div class='ctx'> 	/* program ecc and result sizes */</div><div class='ctx'> 	val = ((((ecc_size &gt;&gt; 1) - 1) &lt;&lt; 22) | (0x0000000F));</div><div class='hunk'>@@ -870,13 +884,15 @@ int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)</div><div class='ctx'> </div><div class='ctx'> 	switch (mode) {</div><div class='ctx'> 	case GPMC_ECC_READ:</div><div class='del'>-		gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);</div><div class='add'>+	case GPMC_ECC_WRITE:</div><div class='add'>+		gpmc_write_reg(GPMC_ECC_CONTROL,</div><div class='add'>+				GPMC_ECC_CTRL_ECCCLEAR |</div><div class='add'>+				GPMC_ECC_CTRL_ECCREG1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case GPMC_ECC_READSYN:</div><div class='del'>-		 gpmc_write_reg(GPMC_ECC_CONTROL, 0x100);</div><div class='del'>-		break;</div><div class='del'>-	case GPMC_ECC_WRITE:</div><div class='del'>-		gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);</div><div class='add'>+		gpmc_write_reg(GPMC_ECC_CONTROL,</div><div class='add'>+				GPMC_ECC_CTRL_ECCCLEAR |</div><div class='add'>+				GPMC_ECC_CTRL_ECCDISABLE);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode);</div><div class='hunk'>@@ -920,3 +936,186 @@ int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(gpmc_calculate_ecc);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARCH_OMAP3</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * gpmc_init_hwecc_bch - initialize hardware BCH ecc functionality</div><div class='add'>+ * @cs: chip select number</div><div class='add'>+ * @nsectors: how many 512-byte sectors to process</div><div class='add'>+ * @nerrors: how many errors to correct per sector (4 or 8)</div><div class='add'>+ *</div><div class='add'>+ * This function must be executed before any call to gpmc_enable_hwecc_bch.</div><div class='add'>+ */</div><div class='add'>+int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors)</div><div class='add'>+{</div><div class='add'>+	/* check if ecc module is in use */</div><div class='add'>+	if (gpmc_ecc_used != -EINVAL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* support only OMAP3 class */</div><div class='add'>+	if (!cpu_is_omap34xx()) {</div><div class='add'>+		printk(KERN_ERR "BCH ecc is not supported on this CPU\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x&gt;=1.</div><div class='add'>+	 * Other chips may be added if confirmed to work.</div><div class='add'>+	 */</div><div class='add'>+	if ((nerrors == 4) &amp;&amp;</div><div class='add'>+	    (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) {</div><div class='add'>+		printk(KERN_ERR "BCH 4-bit mode is not supported on this CPU\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* sanity check */</div><div class='add'>+	if (nsectors &gt; 8) {</div><div class='add'>+		printk(KERN_ERR "BCH cannot process %d sectors (max is 8)\n",</div><div class='add'>+		       nsectors);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(gpmc_init_hwecc_bch);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * gpmc_enable_hwecc_bch - enable hardware BCH ecc functionality</div><div class='add'>+ * @cs: chip select number</div><div class='add'>+ * @mode: read/write mode</div><div class='add'>+ * @dev_width: device bus width(1 for x16, 0 for x8)</div><div class='add'>+ * @nsectors: how many 512-byte sectors to process</div><div class='add'>+ * @nerrors: how many errors to correct per sector (4 or 8)</div><div class='add'>+ */</div><div class='add'>+int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors,</div><div class='add'>+			  int nerrors)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	/* check if ecc module is in use */</div><div class='add'>+	if (gpmc_ecc_used != -EINVAL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	gpmc_ecc_used = cs;</div><div class='add'>+</div><div class='add'>+	/* clear ecc and enable bits */</div><div class='add'>+	gpmc_write_reg(GPMC_ECC_CONTROL, 0x1);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * When using BCH, sector size is hardcoded to 512 bytes.</div><div class='add'>+	 * Here we are using wrapping mode 6 both for reading and writing, with:</div><div class='add'>+	 *  size0 = 0  (no additional protected byte in spare area)</div><div class='add'>+	 *  size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)</div><div class='add'>+	 */</div><div class='add'>+	gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, (32 &lt;&lt; 22) | (0 &lt;&lt; 12));</div><div class='add'>+</div><div class='add'>+	/* BCH configuration */</div><div class='add'>+	val = ((1                        &lt;&lt; 16) | /* enable BCH */</div><div class='add'>+	       (((nerrors == 8) ? 1 : 0) &lt;&lt; 12) | /* 8 or 4 bits */</div><div class='add'>+	       (0x06                     &lt;&lt;  8) | /* wrap mode = 6 */</div><div class='add'>+	       (dev_width                &lt;&lt;  7) | /* bus width */</div><div class='add'>+	       (((nsectors-1) &amp; 0x7)     &lt;&lt;  4) | /* number of sectors */</div><div class='add'>+	       (cs                       &lt;&lt;  1) | /* ECC CS */</div><div class='add'>+	       (0x1));                            /* enable ECC */</div><div class='add'>+</div><div class='add'>+	gpmc_write_reg(GPMC_ECC_CONFIG, val);</div><div class='add'>+	gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(gpmc_enable_hwecc_bch);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * gpmc_calculate_ecc_bch4 - Generate 7 ecc bytes per sector of 512 data bytes</div><div class='add'>+ * @cs:  chip select number</div><div class='add'>+ * @dat: The pointer to data on which ecc is computed</div><div class='add'>+ * @ecc: The ecc output buffer</div><div class='add'>+ */</div><div class='add'>+int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	unsigned long nsectors, reg, val1, val2;</div><div class='add'>+</div><div class='add'>+	if (gpmc_ecc_used != cs)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) &gt;&gt; 4) &amp; 0x7) + 1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nsectors; i++) {</div><div class='add'>+</div><div class='add'>+		reg = GPMC_ECC_BCH_RESULT_0 + 16*i;</div><div class='add'>+</div><div class='add'>+		/* Read hw-computed remainder */</div><div class='add'>+		val1 = gpmc_read_reg(reg + 0);</div><div class='add'>+		val2 = gpmc_read_reg(reg + 4);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Add constant polynomial to remainder, in order to get an ecc</div><div class='add'>+		 * sequence of 0xFFs for a buffer filled with 0xFFs; and</div><div class='add'>+		 * left-justify the resulting polynomial.</div><div class='add'>+		 */</div><div class='add'>+		*ecc++ = 0x28 ^ ((val2 &gt;&gt; 12) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0x13 ^ ((val2 &gt;&gt;  4) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0xcc ^ (((val2 &amp; 0xF) &lt;&lt; 4)|((val1 &gt;&gt; 28) &amp; 0xF));</div><div class='add'>+		*ecc++ = 0x39 ^ ((val1 &gt;&gt; 20) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0x96 ^ ((val1 &gt;&gt; 12) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0xac ^ ((val1 &gt;&gt; 4) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0x7f ^ ((val1 &amp; 0xF) &lt;&lt; 4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gpmc_ecc_used = -EINVAL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch4);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * gpmc_calculate_ecc_bch8 - Generate 13 ecc bytes per block of 512 data bytes</div><div class='add'>+ * @cs:  chip select number</div><div class='add'>+ * @dat: The pointer to data on which ecc is computed</div><div class='add'>+ * @ecc: The ecc output buffer</div><div class='add'>+ */</div><div class='add'>+int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	unsigned long nsectors, reg, val1, val2, val3, val4;</div><div class='add'>+</div><div class='add'>+	if (gpmc_ecc_used != cs)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) &gt;&gt; 4) &amp; 0x7) + 1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nsectors; i++) {</div><div class='add'>+</div><div class='add'>+		reg = GPMC_ECC_BCH_RESULT_0 + 16*i;</div><div class='add'>+</div><div class='add'>+		/* Read hw-computed remainder */</div><div class='add'>+		val1 = gpmc_read_reg(reg + 0);</div><div class='add'>+		val2 = gpmc_read_reg(reg + 4);</div><div class='add'>+		val3 = gpmc_read_reg(reg + 8);</div><div class='add'>+		val4 = gpmc_read_reg(reg + 12);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Add constant polynomial to remainder, in order to get an ecc</div><div class='add'>+		 * sequence of 0xFFs for a buffer filled with 0xFFs.</div><div class='add'>+		 */</div><div class='add'>+		*ecc++ = 0xef ^ (val4 &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0x51 ^ ((val3 &gt;&gt; 24) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0x2e ^ ((val3 &gt;&gt; 16) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0x09 ^ ((val3 &gt;&gt; 8) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0xed ^ (val3 &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0x93 ^ ((val2 &gt;&gt; 24) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0x9a ^ ((val2 &gt;&gt; 16) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0xc2 ^ ((val2 &gt;&gt; 8) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0x97 ^ (val2 &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0x79 ^ ((val1 &gt;&gt; 24) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0xe5 ^ ((val1 &gt;&gt; 16) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0x24 ^ ((val1 &gt;&gt; 8) &amp; 0xFF);</div><div class='add'>+		*ecc++ = 0xb5 ^ (val1 &amp; 0xFF);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gpmc_ecc_used = -EINVAL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch8);</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_ARCH_OMAP3 */</div><div class='head'>diff --git a/arch/arm/mach-omap2/hdq1w.c b/arch/arm/mach-omap2/hdq1w.c<br/>new file mode 100644<br/>index 000000000000..297ebe03f09c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/hdq1w.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/hdq1w.c</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+/*</div><div class='add'>+ * IP block integration code for the HDQ1W/1-wire IP block</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Texas Instruments, Inc.</div><div class='add'>+ * Paul Walmsley</div><div class='add'>+ *</div><div class='add'>+ * Based on the I2C reset code in arch/arm/mach-omap2/i2c.c by</div><div class='add'>+ *     Avinash.H.M &lt;avinashhm@ti.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;plat/omap_hwmod.h&gt;</div><div class='add'>+#include &lt;plat/hdq1w.h&gt;</div><div class='add'>+</div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='add'>+/* Maximum microseconds to wait for OMAP module to softreset */</div><div class='add'>+#define MAX_MODULE_SOFTRESET_WAIT	10000</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * omap_hdq1w_reset - reset the OMAP HDQ1W module</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ *</div><div class='add'>+ * OCP soft reset the HDQ1W IP block.  Section 20.6.1.4 "HDQ1W/1-Wire</div><div class='add'>+ * Software Reset" of the OMAP34xx Technical Reference Manual Revision</div><div class='add'>+ * ZR (SWPU223R) does not include the rather important fact that, for</div><div class='add'>+ * the reset to succeed, the HDQ1W module's internal clock gate must be</div><div class='add'>+ * programmed to allow the clock to propagate to the rest of the</div><div class='add'>+ * module.  In this sense, it's rather similar to the I2C custom reset</div><div class='add'>+ * function.  Returns 0.</div><div class='add'>+ */</div><div class='add'>+int omap_hdq1w_reset(struct omap_hwmod *oh)</div><div class='add'>+{</div><div class='add'>+	u32 v;</div><div class='add'>+	int c = 0;</div><div class='add'>+</div><div class='add'>+	/* Write to the SOFTRESET bit */</div><div class='add'>+	omap_hwmod_softreset(oh);</div><div class='add'>+</div><div class='add'>+	/* Enable the module's internal clocks */</div><div class='add'>+	v = omap_hwmod_read(oh, HDQ_CTRL_STATUS_OFFSET);</div><div class='add'>+	v |= 1 &lt;&lt; HDQ_CTRL_STATUS_CLOCKENABLE_SHIFT;</div><div class='add'>+	omap_hwmod_write(v, oh, HDQ_CTRL_STATUS_OFFSET);</div><div class='add'>+</div><div class='add'>+	/* Poll on RESETDONE bit */</div><div class='add'>+	omap_test_timeout((omap_hwmod_read(oh,</div><div class='add'>+					   oh-&gt;class-&gt;sysc-&gt;syss_offs)</div><div class='add'>+			   &amp; SYSS_RESETDONE_MASK),</div><div class='add'>+			  MAX_MODULE_SOFTRESET_WAIT, c);</div><div class='add'>+</div><div class='add'>+	if (c == MAX_MODULE_SOFTRESET_WAIT)</div><div class='add'>+		pr_warning("%s: %s: softreset failed (waited %d usec)\n",</div><div class='add'>+			   __func__, oh-&gt;name, MAX_MODULE_SOFTRESET_WAIT);</div><div class='add'>+	else</div><div class='add'>+		pr_debug("%s: %s: softreset in %d usec\n", __func__,</div><div class='add'>+			 oh-&gt;name, c);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c<br/>index b0268eaffe13..be697d4e0843 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/hsmmc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/hsmmc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/hsmmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/hsmmc.c</a></div><div class='hunk'>@@ -355,7 +355,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * temporary HACK: ocr_mask instead of fixed supply</div><div class='ctx'> 	 */</div><div class='del'>-	if (cpu_is_omap3505() || cpu_is_omap3517())</div><div class='add'>+	if (soc_is_am35xx())</div><div class='ctx'> 		mmc-&gt;slots[0].ocr_mask = MMC_VDD_165_195 |</div><div class='ctx'> 					 MMC_VDD_26_27 |</div><div class='ctx'> 					 MMC_VDD_27_28 |</div><div class='hunk'>@@ -365,7 +365,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,</div><div class='ctx'> 	else</div><div class='ctx'> 		mmc-&gt;slots[0].ocr_mask = c-&gt;ocr_mask;</div><div class='ctx'> </div><div class='del'>-	if (!cpu_is_omap3517() &amp;&amp; !cpu_is_omap3505())</div><div class='add'>+	if (!soc_is_am35xx())</div><div class='ctx'> 		mmc-&gt;slots[0].features |= HSMMC_HAS_PBIAS;</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_is_omap44xx() &amp;&amp; (omap_rev() &gt; OMAP4430_REV_ES1_0))</div><div class='hunk'>@@ -388,7 +388,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (cpu_is_omap3517() || cpu_is_omap3505())</div><div class='add'>+		if (soc_is_am35xx())</div><div class='ctx'> 			mmc-&gt;slots[0].set_power = nop_mmc_set_power;</div><div class='ctx'> </div><div class='ctx'> 		/* OMAP3630 HSMMC1 supports only 4-bit */</div><div class='hunk'>@@ -400,7 +400,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='del'>-		if (cpu_is_omap3517() || cpu_is_omap3505())</div><div class='add'>+		if (soc_is_am35xx())</div><div class='ctx'> 			mmc-&gt;slots[0].set_power = am35x_hsmmc2_set_power;</div><div class='ctx'> </div><div class='ctx'> 		if (c-&gt;ext_clock)</div><div class='head'>diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c<br/>index 454dfce125ca..8763c8520dc2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/hwspinlock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/hwspinlock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/hwspinlock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/hwspinlock.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@ static struct hwspinlock_pdata omap_hwspinlock_pdata __initdata = {</div><div class='ctx'> 	.base_id = 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int __init hwspinlocks_init(void)</div><div class='add'>+static int __init hwspinlocks_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int retval = 0;</div><div class='ctx'> 	struct omap_hwmod *oh;</div><div class='head'>diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c<br/>index 0e79b7bc6aa4..0389b3264abe 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/id.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/id.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/id.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/id.c</a></div><div class='hunk'>@@ -185,8 +185,7 @@ static void __init omap3_cpuinfo(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpu_is_omap3630()) {</div><div class='ctx'> 		cpu_name = "OMAP3630";</div><div class='del'>-	} else if (cpu_is_omap3517()) {</div><div class='del'>-		/* AM35xx devices */</div><div class='add'>+	} else if (soc_is_am35xx()) {</div><div class='ctx'> 		cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";</div><div class='ctx'> 	} else if (cpu_is_ti816x()) {</div><div class='ctx'> 		cpu_name = "TI816X";</div><div class='hunk'>@@ -352,13 +351,13 @@ void __init omap3xxx_check_revision(void)</div><div class='ctx'> 		 */</div><div class='ctx'> 		switch (rev) {</div><div class='ctx'> 		case 0:</div><div class='del'>-			omap_revision = OMAP3517_REV_ES1_0;</div><div class='add'>+			omap_revision = AM35XX_REV_ES1_0;</div><div class='ctx'> 			cpu_rev = "1.0";</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 1:</div><div class='ctx'> 		/* FALLTHROUGH */</div><div class='ctx'> 		default:</div><div class='del'>-			omap_revision = OMAP3517_REV_ES1_1;</div><div class='add'>+			omap_revision = AM35XX_REV_ES1_1;</div><div class='ctx'> 			cpu_rev = "1.1";</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -478,9 +477,12 @@ void __init omap4xxx_check_revision(void)</div><div class='ctx'> 	case 0xb94e:</div><div class='ctx'> 		switch (rev) {</div><div class='ctx'> 		case 0:</div><div class='del'>-		default:</div><div class='ctx'> 			omap_revision = OMAP4460_REV_ES1_0;</div><div class='ctx'> 			break;</div><div class='add'>+		case 2:</div><div class='add'>+		default:</div><div class='add'>+			omap_revision = OMAP4460_REV_ES1_1;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0xb975:</div><div class='head'>diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h<br/>index 1e2d3322f33e..c88420de1151 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h</a></div><div class='hunk'>@@ -941,10 +941,10 @@</div><div class='ctx'> #define OMAP4_DSI2_LANEENABLE_MASK				(0x7 &lt;&lt; 29)</div><div class='ctx'> #define OMAP4_DSI1_LANEENABLE_SHIFT				24</div><div class='ctx'> #define OMAP4_DSI1_LANEENABLE_MASK				(0x1f &lt;&lt; 24)</div><div class='del'>-#define OMAP4_DSI2_PIPD_SHIFT					19</div><div class='del'>-#define OMAP4_DSI2_PIPD_MASK					(0x1f &lt;&lt; 19)</div><div class='del'>-#define OMAP4_DSI1_PIPD_SHIFT					14</div><div class='del'>-#define OMAP4_DSI1_PIPD_MASK					(0x1f &lt;&lt; 14)</div><div class='add'>+#define OMAP4_DSI1_PIPD_SHIFT					19</div><div class='add'>+#define OMAP4_DSI1_PIPD_MASK					(0x1f &lt;&lt; 19)</div><div class='add'>+#define OMAP4_DSI2_PIPD_SHIFT					14</div><div class='add'>+#define OMAP4_DSI2_PIPD_MASK					(0x1f &lt;&lt; 14)</div><div class='ctx'> </div><div class='ctx'> /* CONTROL_MCBSPLP */</div><div class='ctx'> #define OMAP4_ALBCTRLRX_FSX_SHIFT				31</div><div class='head'>diff --git a/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h b/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h<br/>index d79321b0f2a2..548de90b58c2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/include/mach/omap-wakeupgen.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/include/mach/omap-wakeupgen.h</a></div><div class='hunk'>@@ -16,18 +16,10 @@</div><div class='ctx'> #define OMAP_WKG_ENB_B_0			0x14</div><div class='ctx'> #define OMAP_WKG_ENB_C_0			0x18</div><div class='ctx'> #define OMAP_WKG_ENB_D_0			0x1c</div><div class='del'>-#define OMAP_WKG_ENB_SECURE_A_0			0x20</div><div class='del'>-#define OMAP_WKG_ENB_SECURE_B_0			0x24</div><div class='del'>-#define OMAP_WKG_ENB_SECURE_C_0			0x28</div><div class='del'>-#define OMAP_WKG_ENB_SECURE_D_0			0x2c</div><div class='ctx'> #define OMAP_WKG_ENB_A_1			0x410</div><div class='ctx'> #define OMAP_WKG_ENB_B_1			0x414</div><div class='ctx'> #define OMAP_WKG_ENB_C_1			0x418</div><div class='ctx'> #define OMAP_WKG_ENB_D_1			0x41c</div><div class='del'>-#define OMAP_WKG_ENB_SECURE_A_1			0x420</div><div class='del'>-#define OMAP_WKG_ENB_SECURE_B_1			0x424</div><div class='del'>-#define OMAP_WKG_ENB_SECURE_C_1			0x428</div><div class='del'>-#define OMAP_WKG_ENB_SECURE_D_1			0x42c</div><div class='ctx'> #define OMAP_AUX_CORE_BOOT_0			0x800</div><div class='ctx'> #define OMAP_AUX_CORE_BOOT_1			0x804</div><div class='ctx'> #define OMAP_PTMSYNCREQ_MASK			0xc00</div><div class='head'>diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c<br/>index 065bd768987c..8d014ba04abc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/io.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/io.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/io.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;plat/omap-pm.h&gt;</div><div class='ctx'> #include &lt;plat/omap_hwmod.h&gt;</div><div class='ctx'> #include &lt;plat/multi.h&gt;</div><div class='add'>+#include &lt;plat/dma.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iomap.h"</div><div class='ctx'> #include "voltage.h"</div><div class='hunk'>@@ -172,7 +173,7 @@ static struct map_desc omap34xx_io_desc[] __initdata = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SOC_OMAPTI81XX</div><div class='add'>+#ifdef CONFIG_SOC_TI81XX</div><div class='ctx'> static struct map_desc omapti81xx_io_desc[] __initdata = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.virtual	= L4_34XX_VIRT,</div><div class='hunk'>@@ -183,7 +184,7 @@ static struct map_desc omapti81xx_io_desc[] __initdata = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SOC_OMAPAM33XX</div><div class='add'>+#ifdef CONFIG_SOC_AM33XX</div><div class='ctx'> static struct map_desc omapam33xx_io_desc[] __initdata = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.virtual	= L4_34XX_VIRT,</div><div class='hunk'>@@ -215,41 +216,11 @@ static struct map_desc omap44xx_io_desc[] __initdata = {</div><div class='ctx'> 		.type		= MT_DEVICE,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.virtual	= OMAP44XX_GPMC_VIRT,</div><div class='del'>-		.pfn		= __phys_to_pfn(OMAP44XX_GPMC_PHYS),</div><div class='del'>-		.length		= OMAP44XX_GPMC_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.virtual	= OMAP44XX_EMIF1_VIRT,</div><div class='del'>-		.pfn		= __phys_to_pfn(OMAP44XX_EMIF1_PHYS),</div><div class='del'>-		.length		= OMAP44XX_EMIF1_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.virtual	= OMAP44XX_EMIF2_VIRT,</div><div class='del'>-		.pfn		= __phys_to_pfn(OMAP44XX_EMIF2_PHYS),</div><div class='del'>-		.length		= OMAP44XX_EMIF2_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.virtual	= OMAP44XX_DMM_VIRT,</div><div class='del'>-		.pfn		= __phys_to_pfn(OMAP44XX_DMM_PHYS),</div><div class='del'>-		.length		= OMAP44XX_DMM_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='ctx'> 		.virtual	= L4_PER_44XX_VIRT,</div><div class='ctx'> 		.pfn		= __phys_to_pfn(L4_PER_44XX_PHYS),</div><div class='ctx'> 		.length		= L4_PER_44XX_SIZE,</div><div class='ctx'> 		.type		= MT_DEVICE,</div><div class='ctx'> 	},</div><div class='del'>-	{</div><div class='del'>-		.virtual	= L4_EMU_44XX_VIRT,</div><div class='del'>-		.pfn		= __phys_to_pfn(L4_EMU_44XX_PHYS),</div><div class='del'>-		.length		= L4_EMU_44XX_SIZE,</div><div class='del'>-		.type		= MT_DEVICE,</div><div class='del'>-	},</div><div class='ctx'> #ifdef CONFIG_OMAP4_ERRATA_I688</div><div class='ctx'> 	{</div><div class='ctx'> 		.virtual	= OMAP4_SRAM_VA,</div><div class='hunk'>@@ -285,14 +256,14 @@ void __init omap34xx_map_common_io(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SOC_OMAPTI81XX</div><div class='add'>+#ifdef CONFIG_SOC_TI81XX</div><div class='ctx'> void __init omapti81xx_map_common_io(void)</div><div class='ctx'> {</div><div class='ctx'> 	iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SOC_OMAPAM33XX</div><div class='add'>+#ifdef CONFIG_SOC_AM33XX</div><div class='ctx'> void __init omapam33xx_map_common_io(void)</div><div class='ctx'> {</div><div class='ctx'> 	iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));</div><div class='hunk'>@@ -363,24 +334,6 @@ static void __init omap_hwmod_init_postsetup(void)</div><div class='ctx'> #endif</div><div class='ctx'> 	omap_hwmod_for_each(_set_hwmod_postsetup_state, &amp;postsetup_state);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Set the default postsetup state for unusual modules (like</div><div class='del'>-	 * MPU WDT).</div><div class='del'>-	 *</div><div class='del'>-	 * The postsetup_state is not actually used until</div><div class='del'>-	 * omap_hwmod_late_init(), so boards that desire full watchdog</div><div class='del'>-	 * coverage of kernel initialization can reprogram the</div><div class='del'>-	 * postsetup_state between the calls to</div><div class='del'>-	 * omap2_init_common_infra() and omap_sdrc_init().</div><div class='del'>-	 *</div><div class='del'>-	 * XXX ideally we could detect whether the MPU WDT was currently</div><div class='del'>-	 * enabled here and make this conditional</div><div class='del'>-	 */</div><div class='del'>-	postsetup_state = _HWMOD_STATE_DISABLED;</div><div class='del'>-	omap_hwmod_for_each_by_class("wd_timer",</div><div class='del'>-				     _set_hwmod_postsetup_state,</div><div class='del'>-				     &amp;postsetup_state);</div><div class='del'>-</div><div class='ctx'> 	omap_pm_if_early_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -397,6 +350,13 @@ void __init omap2420_init_early(void)</div><div class='ctx'> 	omap_hwmod_init_postsetup();</div><div class='ctx'> 	omap2420_clk_init();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __init omap2420_init_late(void)</div><div class='add'>+{</div><div class='add'>+	omap_mux_late_init();</div><div class='add'>+	omap2_common_pm_late_init();</div><div class='add'>+	omap2_pm_init();</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SOC_OMAP2430</div><div class='hunk'>@@ -412,6 +372,13 @@ void __init omap2430_init_early(void)</div><div class='ctx'> 	omap_hwmod_init_postsetup();</div><div class='ctx'> 	omap2430_clk_init();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __init omap2430_init_late(void)</div><div class='add'>+{</div><div class='add'>+	omap_mux_late_init();</div><div class='add'>+	omap2_common_pm_late_init();</div><div class='add'>+	omap2_pm_init();</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -466,6 +433,48 @@ void __init ti81xx_init_early(void)</div><div class='ctx'> 	omap_hwmod_init_postsetup();</div><div class='ctx'> 	omap3xxx_clk_init();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __init omap3_init_late(void)</div><div class='add'>+{</div><div class='add'>+	omap_mux_late_init();</div><div class='add'>+	omap2_common_pm_late_init();</div><div class='add'>+	omap3_pm_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init omap3430_init_late(void)</div><div class='add'>+{</div><div class='add'>+	omap_mux_late_init();</div><div class='add'>+	omap2_common_pm_late_init();</div><div class='add'>+	omap3_pm_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init omap35xx_init_late(void)</div><div class='add'>+{</div><div class='add'>+	omap_mux_late_init();</div><div class='add'>+	omap2_common_pm_late_init();</div><div class='add'>+	omap3_pm_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init omap3630_init_late(void)</div><div class='add'>+{</div><div class='add'>+	omap_mux_late_init();</div><div class='add'>+	omap2_common_pm_late_init();</div><div class='add'>+	omap3_pm_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init am35xx_init_late(void)</div><div class='add'>+{</div><div class='add'>+	omap_mux_late_init();</div><div class='add'>+	omap2_common_pm_late_init();</div><div class='add'>+	omap3_pm_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init ti81xx_init_late(void)</div><div class='add'>+{</div><div class='add'>+	omap_mux_late_init();</div><div class='add'>+	omap2_common_pm_late_init();</div><div class='add'>+	omap3_pm_init();</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_OMAP4</div><div class='hunk'>@@ -482,6 +491,13 @@ void __init omap4430_init_early(void)</div><div class='ctx'> 	omap_hwmod_init_postsetup();</div><div class='ctx'> 	omap4xxx_clk_init();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __init omap4430_init_late(void)</div><div class='add'>+{</div><div class='add'>+	omap_mux_late_init();</div><div class='add'>+	omap2_common_pm_late_init();</div><div class='add'>+	omap4_pm_init();</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,</div><div class='head'>diff --git a/arch/arm/mach-omap2/iomap.h b/arch/arm/mach-omap2/iomap.h<br/>index 0812b154f5b5..80b88921faba 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/iomap.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/iomap.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/iomap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/iomap.h</a></div><div class='hunk'>@@ -37,9 +37,6 @@</div><div class='ctx'> #define OMAP4_L3_PER_IO_OFFSET	0xb1100000</div><div class='ctx'> #define OMAP4_L3_PER_IO_ADDRESS(pa)	IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)</div><div class='ctx'> </div><div class='del'>-#define OMAP4_GPMC_IO_OFFSET		0xa9000000</div><div class='del'>-#define OMAP4_GPMC_IO_ADDRESS(pa)	IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)</div><div class='del'>-</div><div class='ctx'> #define OMAP2_EMU_IO_OFFSET		0xaa800000	/* Emulation */</div><div class='ctx'> #define OMAP2_EMU_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_EMU_IO_OFFSET)</div><div class='ctx'> </div><div class='hunk'>@@ -170,28 +167,3 @@</div><div class='ctx'> #define L4_ABE_44XX_VIRT	(L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)</div><div class='ctx'> #define L4_ABE_44XX_SIZE	SZ_1M</div><div class='ctx'> </div><div class='del'>-#define L4_EMU_44XX_PHYS	L4_EMU_44XX_BASE</div><div class='del'>-						/* 0x54000000 --&gt; 0xfe800000 */</div><div class='del'>-#define L4_EMU_44XX_VIRT	(L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)</div><div class='del'>-#define L4_EMU_44XX_SIZE	SZ_8M</div><div class='del'>-</div><div class='del'>-#define OMAP44XX_GPMC_PHYS	OMAP44XX_GPMC_BASE</div><div class='del'>-						/* 0x50000000 --&gt; 0xf9000000 */</div><div class='del'>-#define OMAP44XX_GPMC_VIRT	(OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)</div><div class='del'>-#define OMAP44XX_GPMC_SIZE	SZ_1M</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define OMAP44XX_EMIF1_PHYS	OMAP44XX_EMIF1_BASE</div><div class='del'>-						/* 0x4c000000 --&gt; 0xfd100000 */</div><div class='del'>-#define OMAP44XX_EMIF1_VIRT	(OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET)</div><div class='del'>-#define OMAP44XX_EMIF1_SIZE	SZ_1M</div><div class='del'>-</div><div class='del'>-#define OMAP44XX_EMIF2_PHYS	OMAP44XX_EMIF2_BASE</div><div class='del'>-						/* 0x4d000000 --&gt; 0xfd200000 */</div><div class='del'>-#define OMAP44XX_EMIF2_SIZE	SZ_1M</div><div class='del'>-#define OMAP44XX_EMIF2_VIRT	(OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF1_SIZE)</div><div class='del'>-</div><div class='del'>-#define OMAP44XX_DMM_PHYS	OMAP44XX_DMM_BASE</div><div class='del'>-						/* 0x4e000000 --&gt; 0xfd300000 */</div><div class='del'>-#define OMAP44XX_DMM_SIZE	SZ_1M</div><div class='del'>-#define OMAP44XX_DMM_VIRT	(OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE)</div><div class='head'>diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c<br/>index 65f0d2571c9a..fdc4303be563 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/irq.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iomap.h"</div><div class='add'>+#include "common.h"</div><div class='ctx'> </div><div class='ctx'> /* selected INTC register offsets */</div><div class='ctx'> </div><div class='hunk'>@@ -149,7 +150,6 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)</div><div class='ctx'> 	ct-&gt;chip.irq_mask = irq_gc_mask_disable_reg;</div><div class='ctx'> 	ct-&gt;chip.irq_unmask = irq_gc_unmask_enable_reg;</div><div class='ctx'> </div><div class='del'>-	ct-&gt;regs.ack = INTC_CONTROL;</div><div class='ctx'> 	ct-&gt;regs.enable = INTC_MIR_CLEAR0;</div><div class='ctx'> 	ct-&gt;regs.disable = INTC_MIR_SET0;</div><div class='ctx'> 	irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,</div><div class='hunk'>@@ -231,7 +231,7 @@ static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='ctx'> 		irqnr = readl_relaxed(base_addr + 0xd8);</div><div class='del'>-#ifdef CONFIG_SOC_OMAPTI816X</div><div class='add'>+#ifdef CONFIG_SOC_TI81XX</div><div class='ctx'> 		if (irqnr)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		irqnr = readl_relaxed(base_addr + 0xf8);</div><div class='hunk'>@@ -334,7 +334,7 @@ void omap_intc_restore_context(void)</div><div class='ctx'> void omap3_intc_suspend(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* A pending interrupt would prevent OMAP from entering suspend */</div><div class='del'>-	omap_ack_irq(0);</div><div class='add'>+	omap_ack_irq(NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void omap3_intc_prepare_idle(void)</div><div class='head'>diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c<br/>index 415a6f1cf419..19b8b6774862 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/mailbox.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/mailbox.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/mailbox.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/mailbox.c</a></div><div class='hunk'>@@ -26,9 +26,9 @@</div><div class='ctx'> #define MAILBOX_IRQSTATUS(u)		(0x100 + 8 * (u))</div><div class='ctx'> #define MAILBOX_IRQENABLE(u)		(0x104 + 8 * (u))</div><div class='ctx'> </div><div class='del'>-#define OMAP4_MAILBOX_IRQSTATUS(u)	(0x104 + 10 * (u))</div><div class='del'>-#define OMAP4_MAILBOX_IRQENABLE(u)	(0x108 + 10 * (u))</div><div class='del'>-#define OMAP4_MAILBOX_IRQENABLE_CLR(u)	(0x10c + 10 * (u))</div><div class='add'>+#define OMAP4_MAILBOX_IRQSTATUS(u)	(0x104 + 0x10 * (u))</div><div class='add'>+#define OMAP4_MAILBOX_IRQENABLE(u)	(0x108 + 0x10 * (u))</div><div class='add'>+#define OMAP4_MAILBOX_IRQENABLE_CLR(u)	(0x10c + 0x10 * (u))</div><div class='ctx'> </div><div class='ctx'> #define MAILBOX_IRQ_NEWMSG(m)		(1 &lt;&lt; (2 * (m)))</div><div class='ctx'> #define MAILBOX_IRQ_NOTFULL(m)		(1 &lt;&lt; (2 * (m) + 1))</div><div class='head'>diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c<br/>new file mode 100644<br/>index 000000000000..ef2a6924731a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/msdi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/msdi.c</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+/*</div><div class='add'>+ * MSDI IP block reset</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Texas Instruments, Inc.</div><div class='add'>+ * Paul Walmsley</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ * XXX What about pad muxing?</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;plat/omap_hwmod.h&gt;</div><div class='add'>+#include &lt;plat/mmc.h&gt;</div><div class='add'>+</div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * MSDI_CON_OFFSET: offset in bytes of the MSDI IP block's CON register</div><div class='add'>+ *     from the IP block's base address</div><div class='add'>+ */</div><div class='add'>+#define MSDI_CON_OFFSET				0x0c</div><div class='add'>+</div><div class='add'>+/* Register bitfields in the CON register */</div><div class='add'>+#define MSDI_CON_POW_MASK			BIT(11)</div><div class='add'>+#define MSDI_CON_CLKD_MASK			(0x3f &lt;&lt; 0)</div><div class='add'>+#define MSDI_CON_CLKD_SHIFT			0</div><div class='add'>+</div><div class='add'>+/* Maximum microseconds to wait for OMAP module to softreset */</div><div class='add'>+#define MAX_MODULE_SOFTRESET_WAIT	10000</div><div class='add'>+</div><div class='add'>+/* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */</div><div class='add'>+#define MSDI_TARGET_RESET_CLKD		0x3ff</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * omap_msdi_reset - reset the MSDI IP block</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ *</div><div class='add'>+ * The MSDI IP block on OMAP2420 has to have both the POW and CLKD</div><div class='add'>+ * fields set inside its CON register for a reset to complete</div><div class='add'>+ * successfully.  This is not documented in the TRM.  For CLKD, we use</div><div class='add'>+ * the value that results in the lowest possible clock rate, to attempt</div><div class='add'>+ * to avoid disturbing any cards.</div><div class='add'>+ */</div><div class='add'>+int omap_msdi_reset(struct omap_hwmod *oh)</div><div class='add'>+{</div><div class='add'>+	u16 v = 0;</div><div class='add'>+	int c = 0;</div><div class='add'>+</div><div class='add'>+	/* Write to the SOFTRESET bit */</div><div class='add'>+	omap_hwmod_softreset(oh);</div><div class='add'>+</div><div class='add'>+	/* Enable the MSDI core and internal clock */</div><div class='add'>+	v |= MSDI_CON_POW_MASK;</div><div class='add'>+	v |= MSDI_TARGET_RESET_CLKD &lt;&lt; MSDI_CON_CLKD_SHIFT;</div><div class='add'>+	omap_hwmod_write(v, oh, MSDI_CON_OFFSET);</div><div class='add'>+</div><div class='add'>+	/* Poll on RESETDONE bit */</div><div class='add'>+	omap_test_timeout((omap_hwmod_read(oh, oh-&gt;class-&gt;sysc-&gt;syss_offs)</div><div class='add'>+			   &amp; SYSS_RESETDONE_MASK),</div><div class='add'>+			  MAX_MODULE_SOFTRESET_WAIT, c);</div><div class='add'>+</div><div class='add'>+	if (c == MAX_MODULE_SOFTRESET_WAIT)</div><div class='add'>+		pr_warning("%s: %s: softreset failed (waited %d usec)\n",</div><div class='add'>+			   __func__, oh-&gt;name, MAX_MODULE_SOFTRESET_WAIT);</div><div class='add'>+	else</div><div class='add'>+		pr_debug("%s: %s: softreset in %d usec\n", __func__,</div><div class='add'>+			 oh-&gt;name, c);</div><div class='add'>+</div><div class='add'>+	/* Disable the MSDI internal clock */</div><div class='add'>+	v &amp;= ~MSDI_CON_CLKD_MASK;</div><div class='add'>+	omap_hwmod_write(v, oh, MSDI_CON_OFFSET);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c<br/>index 65c33911341f..80e55c5c9998 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/mux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/mux.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/mux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/mux.c</a></div><div class='hunk'>@@ -247,7 +247,7 @@ int __init omap_mux_init_signal(const char *muxname, int val)</div><div class='ctx'> 	int mux_mode;</div><div class='ctx'> </div><div class='ctx'> 	mux_mode = omap_mux_get_by_name(muxname, &amp;partition, &amp;mux);</div><div class='del'>-	if (mux_mode &lt; 0)</div><div class='add'>+	if (mux_mode &lt; 0 || !mux)</div><div class='ctx'> 		return mux_mode;</div><div class='ctx'> </div><div class='ctx'> 	old_mode = omap_mux_read(partition, mux-&gt;reg_offset);</div><div class='hunk'>@@ -788,7 +788,7 @@ static void __init omap_mux_free_names(struct omap_mux *m)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Free all data except for GPIO pins unless CONFIG_DEBUG_FS is set */</div><div class='del'>-static int __init omap_mux_late_init(void)</div><div class='add'>+int __init omap_mux_late_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct omap_mux_partition *partition;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -823,7 +823,6 @@ static int __init omap_mux_late_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-late_initcall(omap_mux_late_init);</div><div class='ctx'> </div><div class='ctx'> static void __init omap_mux_package_fixup(struct omap_mux *p,</div><div class='ctx'> 					struct omap_mux *superset)</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c<br/>index d8f8ef40290f..d9ae4a53d818 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap-secure.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap-secure.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap-secure.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap-secure.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/memblock.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;plat/omap-secure.h&gt;</div><div class='ctx'> #include &lt;mach/omap-secure.h&gt;</div><div class='ctx'> </div><div class='ctx'> static phys_addr_t omap_secure_memblock_base;</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c<br/>index 42cd7fb52414..d811c7790350 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap-wakeupgen.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap-wakeupgen.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap-wakeupgen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap-wakeupgen.c</a></div><div class='hunk'>@@ -259,7 +259,7 @@ static void irq_save_context(void)</div><div class='ctx'> /*</div><div class='ctx'>  * Clear WakeupGen SAR backup status.</div><div class='ctx'>  */</div><div class='del'>-void irq_sar_clear(void)</div><div class='add'>+static void irq_sar_clear(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	val = __raw_readl(sar_base + SAR_BACKUP_STATUS_OFFSET);</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c<br/>index 70de277f5c15..a8161e5f3204 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap4-common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap4-common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap4-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap4-common.c</a></div><div class='hunk'>@@ -25,11 +25,13 @@</div><div class='ctx'> #include &lt;plat/irqs.h&gt;</div><div class='ctx'> #include &lt;plat/sram.h&gt;</div><div class='ctx'> #include &lt;plat/omap-secure.h&gt;</div><div class='add'>+#include &lt;plat/mmc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;mach/omap-wakeupgen.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='add'>+#include "hsmmc.h"</div><div class='ctx'> #include "omap4-sar-layout.h"</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -207,3 +209,59 @@ static int __init omap4_sar_ram_init(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> early_initcall(omap4_sar_ram_init);</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)</div><div class='add'>+static int omap4_twl6030_hsmmc_late_init(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	int irq = 0;</div><div class='add'>+	struct platform_device *pdev = container_of(dev,</div><div class='add'>+				struct platform_device, dev);</div><div class='add'>+	struct omap_mmc_platform_data *pdata = dev-&gt;platform_data;</div><div class='add'>+</div><div class='add'>+	/* Setting MMC1 Card detect Irq */</div><div class='add'>+	if (pdev-&gt;id == 0) {</div><div class='add'>+		irq = twl6030_mmc_card_detect_config();</div><div class='add'>+		if (irq &lt; 0) {</div><div class='add'>+			dev_err(dev, "%s: Error card detect config(%d)\n",</div><div class='add'>+				__func__, irq);</div><div class='add'>+			return irq;</div><div class='add'>+		}</div><div class='add'>+		pdata-&gt;slots[0].card_detect_irq = irq;</div><div class='add'>+		pdata-&gt;slots[0].card_detect = twl6030_mmc_card_detect;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct omap_mmc_platform_data *pdata;</div><div class='add'>+</div><div class='add'>+	/* dev can be null if CONFIG_MMC_OMAP_HS is not set */</div><div class='add'>+	if (!dev) {</div><div class='add'>+		pr_err("Failed %s\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	pdata = dev-&gt;platform_data;</div><div class='add'>+	pdata-&gt;init =	omap4_twl6030_hsmmc_late_init;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)</div><div class='add'>+{</div><div class='add'>+	struct omap2_hsmmc_info *c;</div><div class='add'>+</div><div class='add'>+	omap_hsmmc_init(controllers);</div><div class='add'>+	for (c = controllers; c-&gt;mmc; c++) {</div><div class='add'>+		/* pdev can be null if CONFIG_MMC_OMAP_HS is not set */</div><div class='add'>+		if (!c-&gt;pdev)</div><div class='add'>+			continue;</div><div class='add'>+		omap4_twl6030_hsmmc_set_late_init(&amp;c-&gt;pdev-&gt;dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c<br/>index 7144ae651d3d..bf86f7e8f91f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap_hwmod.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod.c</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'>  * omap_hwmod implementation for OMAP2/3/4</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009-2011 Nokia Corporation</div><div class='del'>- * Copyright (C) 2011 Texas Instruments, Inc.</div><div class='add'>+ * Copyright (C) 2011-2012 Texas Instruments, Inc.</div><div class='ctx'>  *</div><div class='ctx'>  * Paul Walmsley, Benoît Cousson, Kevin Hilman</div><div class='ctx'>  *</div><div class='hunk'>@@ -137,6 +137,7 @@</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/bootmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include &lt;plat/cpu.h&gt;</div><div class='hunk'>@@ -159,16 +160,58 @@</div><div class='ctx'> /* Name of the OMAP hwmod for the MPU */</div><div class='ctx'> #define MPU_INITIATOR_NAME		"mpu"</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Number of struct omap_hwmod_link records per struct</div><div class='add'>+ * omap_hwmod_ocp_if record (master-&gt;slave and slave-&gt;master)</div><div class='add'>+ */</div><div class='add'>+#define LINKS_PER_OCP_IF		2</div><div class='add'>+</div><div class='ctx'> /* omap_hwmod_list contains all registered struct omap_hwmods */</div><div class='ctx'> static LIST_HEAD(omap_hwmod_list);</div><div class='ctx'> </div><div class='ctx'> /* mpu_oh: used to add/remove MPU initiator from sleepdep list */</div><div class='ctx'> static struct omap_hwmod *mpu_oh;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * linkspace: ptr to a buffer that struct omap_hwmod_link records are</div><div class='add'>+ * allocated from - used to reduce the number of small memory</div><div class='add'>+ * allocations, which has a significant impact on performance</div><div class='add'>+ */</div><div class='add'>+static struct omap_hwmod_link *linkspace;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * free_ls, max_ls: array indexes into linkspace; representing the</div><div class='add'>+ * next free struct omap_hwmod_link index, and the maximum number of</div><div class='add'>+ * struct omap_hwmod_link records allocated (respectively)</div><div class='add'>+ */</div><div class='add'>+static unsigned short free_ls, max_ls, ls_supp;</div><div class='ctx'> </div><div class='ctx'> /* Private functions */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * _fetch_next_ocp_if - return the next OCP interface in a list</div><div class='add'>+ * @p: ptr to a ptr to the list_head inside the ocp_if to return</div><div class='add'>+ * @i: pointer to the index of the element pointed to by @p in the list</div><div class='add'>+ *</div><div class='add'>+ * Return a pointer to the struct omap_hwmod_ocp_if record</div><div class='add'>+ * containing the struct list_head pointed to by @p, and increment</div><div class='add'>+ * @p such that a future call to this routine will return the next</div><div class='add'>+ * record.</div><div class='add'>+ */</div><div class='add'>+static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,</div><div class='add'>+						    int *i)</div><div class='add'>+{</div><div class='add'>+	struct omap_hwmod_ocp_if *oi;</div><div class='add'>+</div><div class='add'>+	oi = list_entry(*p, struct omap_hwmod_link, node)-&gt;ocp_if;</div><div class='add'>+	*p = (*p)-&gt;next;</div><div class='add'>+</div><div class='add'>+	*i = *i + 1;</div><div class='add'>+</div><div class='add'>+	return oi;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy</div><div class='ctx'>  * @oh: struct omap_hwmod *</div><div class='ctx'>  *</div><div class='hunk'>@@ -582,16 +625,16 @@ static int _init_main_clk(struct omap_hwmod *oh)</div><div class='ctx'>  */</div><div class='ctx'> static int _init_interface_clks(struct omap_hwmod *oh)</div><div class='ctx'> {</div><div class='add'>+	struct omap_hwmod_ocp_if *os;</div><div class='add'>+	struct list_head *p;</div><div class='ctx'> 	struct clk *c;</div><div class='del'>-	int i;</div><div class='add'>+	int i = 0;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (oh-&gt;slaves_cnt == 0)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; oh-&gt;slaves_cnt; i++) {</div><div class='del'>-		struct omap_hwmod_ocp_if *os = oh-&gt;slaves[i];</div><div class='add'>+	p = oh-&gt;slave_ports.next;</div><div class='ctx'> </div><div class='add'>+	while (i &lt; oh-&gt;slaves_cnt) {</div><div class='add'>+		os = _fetch_next_ocp_if(&amp;p, &amp;i);</div><div class='ctx'> 		if (!os-&gt;clk)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -643,21 +686,22 @@ static int _init_opt_clks(struct omap_hwmod *oh)</div><div class='ctx'>  */</div><div class='ctx'> static int _enable_clocks(struct omap_hwmod *oh)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	struct omap_hwmod_ocp_if *os;</div><div class='add'>+	struct list_head *p;</div><div class='add'>+	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("omap_hwmod: %s: enabling clocks\n", oh-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	if (oh-&gt;_clk)</div><div class='ctx'> 		clk_enable(oh-&gt;_clk);</div><div class='ctx'> </div><div class='del'>-	if (oh-&gt;slaves_cnt &gt; 0) {</div><div class='del'>-		for (i = 0; i &lt; oh-&gt;slaves_cnt; i++) {</div><div class='del'>-			struct omap_hwmod_ocp_if *os = oh-&gt;slaves[i];</div><div class='del'>-			struct clk *c = os-&gt;_clk;</div><div class='add'>+	p = oh-&gt;slave_ports.next;</div><div class='ctx'> </div><div class='del'>-			if (c &amp;&amp; (os-&gt;flags &amp; OCPIF_SWSUP_IDLE))</div><div class='del'>-				clk_enable(c);</div><div class='del'>-		}</div><div class='add'>+	while (i &lt; oh-&gt;slaves_cnt) {</div><div class='add'>+		os = _fetch_next_ocp_if(&amp;p, &amp;i);</div><div class='add'>+</div><div class='add'>+		if (os-&gt;_clk &amp;&amp; (os-&gt;flags &amp; OCPIF_SWSUP_IDLE))</div><div class='add'>+			clk_enable(os-&gt;_clk);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* The opt clocks are controlled by the device driver. */</div><div class='hunk'>@@ -673,21 +717,22 @@ static int _enable_clocks(struct omap_hwmod *oh)</div><div class='ctx'>  */</div><div class='ctx'> static int _disable_clocks(struct omap_hwmod *oh)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	struct omap_hwmod_ocp_if *os;</div><div class='add'>+	struct list_head *p;</div><div class='add'>+	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("omap_hwmod: %s: disabling clocks\n", oh-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	if (oh-&gt;_clk)</div><div class='ctx'> 		clk_disable(oh-&gt;_clk);</div><div class='ctx'> </div><div class='del'>-	if (oh-&gt;slaves_cnt &gt; 0) {</div><div class='del'>-		for (i = 0; i &lt; oh-&gt;slaves_cnt; i++) {</div><div class='del'>-			struct omap_hwmod_ocp_if *os = oh-&gt;slaves[i];</div><div class='del'>-			struct clk *c = os-&gt;_clk;</div><div class='add'>+	p = oh-&gt;slave_ports.next;</div><div class='ctx'> </div><div class='del'>-			if (c &amp;&amp; (os-&gt;flags &amp; OCPIF_SWSUP_IDLE))</div><div class='del'>-				clk_disable(c);</div><div class='del'>-		}</div><div class='add'>+	while (i &lt; oh-&gt;slaves_cnt) {</div><div class='add'>+		os = _fetch_next_ocp_if(&amp;p, &amp;i);</div><div class='add'>+</div><div class='add'>+		if (os-&gt;_clk &amp;&amp; (os-&gt;flags &amp; OCPIF_SWSUP_IDLE))</div><div class='add'>+			clk_disable(os-&gt;_clk);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* The opt clocks are controlled by the device driver. */</div><div class='hunk'>@@ -781,39 +826,6 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4</div><div class='del'>- * @oh: struct omap_hwmod *</div><div class='del'>- *</div><div class='del'>- * Disable the PRCM module mode related to the hwmod @oh.</div><div class='del'>- * Return EINVAL if the modulemode is not supported and 0 in case of success.</div><div class='del'>- */</div><div class='del'>-static int _omap4_disable_module(struct omap_hwmod *oh)</div><div class='del'>-{</div><div class='del'>-	int v;</div><div class='del'>-</div><div class='del'>-	/* The module mode does not exist prior OMAP4 */</div><div class='del'>-	if (!cpu_is_omap44xx())</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!oh-&gt;clkdm || !oh-&gt;prcm.omap4.modulemode)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	pr_debug("omap_hwmod: %s: %s\n", oh-&gt;name, __func__);</div><div class='del'>-</div><div class='del'>-	omap4_cminst_module_disable(oh-&gt;clkdm-&gt;prcm_partition,</div><div class='del'>-				    oh-&gt;clkdm-&gt;cm_inst,</div><div class='del'>-				    oh-&gt;clkdm-&gt;clkdm_offs,</div><div class='del'>-				    oh-&gt;prcm.omap4.clkctrl_offs);</div><div class='del'>-</div><div class='del'>-	v = _omap4_wait_target_disable(oh);</div><div class='del'>-	if (v)</div><div class='del'>-		pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",</div><div class='del'>-			oh-&gt;name);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh</div><div class='ctx'>  * @oh: struct omap_hwmod *oh</div><div class='ctx'>  *</div><div class='hunk'>@@ -883,59 +895,220 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use</div><div class='del'>- * @oh: struct omap_hwmod *</div><div class='add'>+ * _get_mpu_irq_by_name - fetch MPU interrupt line number by name</div><div class='add'>+ * @oh: struct omap_hwmod * to operate on</div><div class='add'>+ * @name: pointer to the name of the MPU interrupt number to fetch (optional)</div><div class='add'>+ * @irq: pointer to an unsigned int to store the MPU IRQ number to</div><div class='ctx'>  *</div><div class='del'>- * Returns the array index of the OCP slave port that the MPU</div><div class='del'>- * addresses the device on, or -EINVAL upon error or not found.</div><div class='add'>+ * Retrieve a MPU hardware IRQ line number named by @name associated</div><div class='add'>+ * with the IP block pointed to by @oh.  The IRQ number will be filled</div><div class='add'>+ * into the address pointed to by @dma.  When @name is non-null, the</div><div class='add'>+ * IRQ line number associated with the named entry will be returned.</div><div class='add'>+ * If @name is null, the first matching entry will be returned.  Data</div><div class='add'>+ * order is not meaningful in hwmod data, so callers are strongly</div><div class='add'>+ * encouraged to use a non-null @name whenever possible to avoid</div><div class='add'>+ * unpredictable effects if hwmod data is later added that causes data</div><div class='add'>+ * ordering to change.  Returns 0 upon success or a negative error</div><div class='add'>+ * code upon error.</div><div class='ctx'>  */</div><div class='del'>-static int __init _find_mpu_port_index(struct omap_hwmod *oh)</div><div class='add'>+static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,</div><div class='add'>+				unsigned int *irq)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	int found = 0;</div><div class='add'>+	bool found = false;</div><div class='ctx'> </div><div class='del'>-	if (!oh || oh-&gt;slaves_cnt == 0)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (!oh-&gt;mpu_irqs)</div><div class='add'>+		return -ENOENT;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; oh-&gt;slaves_cnt; i++) {</div><div class='del'>-		struct omap_hwmod_ocp_if *os = oh-&gt;slaves[i];</div><div class='add'>+	i = 0;</div><div class='add'>+	while (oh-&gt;mpu_irqs[i].irq != -1) {</div><div class='add'>+		if (name == oh-&gt;mpu_irqs[i].name ||</div><div class='add'>+		    !strcmp(name, oh-&gt;mpu_irqs[i].name)) {</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (os-&gt;user &amp; OCP_USER_MPU) {</div><div class='del'>-			found = 1;</div><div class='add'>+	if (!found)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	*irq = oh-&gt;mpu_irqs[i].irq;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _get_sdma_req_by_name - fetch SDMA request line ID by name</div><div class='add'>+ * @oh: struct omap_hwmod * to operate on</div><div class='add'>+ * @name: pointer to the name of the SDMA request line to fetch (optional)</div><div class='add'>+ * @dma: pointer to an unsigned int to store the request line ID to</div><div class='add'>+ *</div><div class='add'>+ * Retrieve an SDMA request line ID named by @name on the IP block</div><div class='add'>+ * pointed to by @oh.  The ID will be filled into the address pointed</div><div class='add'>+ * to by @dma.  When @name is non-null, the request line ID associated</div><div class='add'>+ * with the named entry will be returned.  If @name is null, the first</div><div class='add'>+ * matching entry will be returned.  Data order is not meaningful in</div><div class='add'>+ * hwmod data, so callers are strongly encouraged to use a non-null</div><div class='add'>+ * @name whenever possible to avoid unpredictable effects if hwmod</div><div class='add'>+ * data is later added that causes data ordering to change.  Returns 0</div><div class='add'>+ * upon success or a negative error code upon error.</div><div class='add'>+ */</div><div class='add'>+static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,</div><div class='add'>+				 unsigned int *dma)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	bool found = false;</div><div class='add'>+</div><div class='add'>+	if (!oh-&gt;sdma_reqs)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	i = 0;</div><div class='add'>+	while (oh-&gt;sdma_reqs[i].dma_req != -1) {</div><div class='add'>+		if (name == oh-&gt;sdma_reqs[i].name ||</div><div class='add'>+		    !strcmp(name, oh-&gt;sdma_reqs[i].name)) {</div><div class='add'>+			found = true;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='add'>+		i++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (found)</div><div class='del'>-		pr_debug("omap_hwmod: %s: MPU OCP slave port ID  %d\n",</div><div class='del'>-			 oh-&gt;name, i);</div><div class='del'>-	else</div><div class='del'>-		pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",</div><div class='del'>-			 oh-&gt;name);</div><div class='add'>+	if (!found)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	*dma = oh-&gt;sdma_reqs[i].dma_req;</div><div class='ctx'> </div><div class='del'>-	return (found) ? i : -EINVAL;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU</div><div class='del'>- * @oh: struct omap_hwmod *</div><div class='add'>+ * _get_addr_space_by_name - fetch address space start &amp; end by name</div><div class='add'>+ * @oh: struct omap_hwmod * to operate on</div><div class='add'>+ * @name: pointer to the name of the address space to fetch (optional)</div><div class='add'>+ * @pa_start: pointer to a u32 to store the starting address to</div><div class='add'>+ * @pa_end: pointer to a u32 to store the ending address to</div><div class='ctx'>  *</div><div class='del'>- * Return the virtual address of the base of the register target of</div><div class='del'>- * device @oh, or NULL on error.</div><div class='add'>+ * Retrieve address space start and end addresses for the IP block</div><div class='add'>+ * pointed to by @oh.  The data will be filled into the addresses</div><div class='add'>+ * pointed to by @pa_start and @pa_end.  When @name is non-null, the</div><div class='add'>+ * address space data associated with the named entry will be</div><div class='add'>+ * returned.  If @name is null, the first matching entry will be</div><div class='add'>+ * returned.  Data order is not meaningful in hwmod data, so callers</div><div class='add'>+ * are strongly encouraged to use a non-null @name whenever possible</div><div class='add'>+ * to avoid unpredictable effects if hwmod data is later added that</div><div class='add'>+ * causes data ordering to change.  Returns 0 upon success or a</div><div class='add'>+ * negative error code upon error.</div><div class='ctx'>  */</div><div class='del'>-static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)</div><div class='add'>+static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,</div><div class='add'>+				   u32 *pa_start, u32 *pa_end)</div><div class='ctx'> {</div><div class='add'>+	int i, j;</div><div class='ctx'> 	struct omap_hwmod_ocp_if *os;</div><div class='del'>-	struct omap_hwmod_addr_space *mem;</div><div class='del'>-	int i = 0, found = 0;</div><div class='del'>-	void __iomem *va_start;</div><div class='add'>+	struct list_head *p = NULL;</div><div class='add'>+	bool found = false;</div><div class='add'>+</div><div class='add'>+	p = oh-&gt;slave_ports.next;</div><div class='add'>+</div><div class='add'>+	i = 0;</div><div class='add'>+	while (i &lt; oh-&gt;slaves_cnt) {</div><div class='add'>+		os = _fetch_next_ocp_if(&amp;p, &amp;i);</div><div class='add'>+</div><div class='add'>+		if (!os-&gt;addr)</div><div class='add'>+			return -ENOENT;</div><div class='add'>+</div><div class='add'>+		j = 0;</div><div class='add'>+		while (os-&gt;addr[j].pa_start != os-&gt;addr[j].pa_end) {</div><div class='add'>+			if (name == os-&gt;addr[j].name ||</div><div class='add'>+			    !strcmp(name, os-&gt;addr[j].name)) {</div><div class='add'>+				found = true;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			j++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (found)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!found)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	*pa_start = os-&gt;addr[j].pa_start;</div><div class='add'>+	*pa_end = os-&gt;addr[j].pa_end;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _save_mpu_port_index - find and save the index to @oh's MPU port</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ *</div><div class='add'>+ * Determines the array index of the OCP slave port that the MPU uses</div><div class='add'>+ * to address the device, and saves it into the struct omap_hwmod.</div><div class='add'>+ * Intended to be called during hwmod registration only. No return</div><div class='add'>+ * value.</div><div class='add'>+ */</div><div class='add'>+static void __init _save_mpu_port_index(struct omap_hwmod *oh)</div><div class='add'>+{</div><div class='add'>+	struct omap_hwmod_ocp_if *os = NULL;</div><div class='add'>+	struct list_head *p;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	if (!oh)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	if (!oh || oh-&gt;slaves_cnt == 0)</div><div class='add'>+	oh-&gt;_int_flags |= _HWMOD_NO_MPU_PORT;</div><div class='add'>+</div><div class='add'>+	p = oh-&gt;slave_ports.next;</div><div class='add'>+</div><div class='add'>+	while (i &lt; oh-&gt;slaves_cnt) {</div><div class='add'>+		os = _fetch_next_ocp_if(&amp;p, &amp;i);</div><div class='add'>+		if (os-&gt;user &amp; OCP_USER_MPU) {</div><div class='add'>+			oh-&gt;_mpu_port = os;</div><div class='add'>+			oh-&gt;_int_flags &amp;= ~_HWMOD_NO_MPU_PORT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ *</div><div class='add'>+ * Given a pointer to a struct omap_hwmod record @oh, return a pointer</div><div class='add'>+ * to the struct omap_hwmod_ocp_if record that is used by the MPU to</div><div class='add'>+ * communicate with the IP block.  This interface need not be directly</div><div class='add'>+ * connected to the MPU (and almost certainly is not), but is directly</div><div class='add'>+ * connected to the IP block represented by @oh.  Returns a pointer</div><div class='add'>+ * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon</div><div class='add'>+ * error or if there does not appear to be a path from the MPU to this</div><div class='add'>+ * IP block.</div><div class='add'>+ */</div><div class='add'>+static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)</div><div class='add'>+{</div><div class='add'>+	if (!oh || oh-&gt;_int_flags &amp; _HWMOD_NO_MPU_PORT || oh-&gt;slaves_cnt == 0)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	os = oh-&gt;slaves[index];</div><div class='add'>+	return oh-&gt;_mpu_port;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _find_mpu_rt_addr_space - return MPU register target address space for @oh</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ *</div><div class='add'>+ * Returns a pointer to the struct omap_hwmod_addr_space record representing</div><div class='add'>+ * the register target MPU address space; or returns NULL upon error.</div><div class='add'>+ */</div><div class='add'>+static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)</div><div class='add'>+{</div><div class='add'>+	struct omap_hwmod_ocp_if *os;</div><div class='add'>+	struct omap_hwmod_addr_space *mem;</div><div class='add'>+	int found = 0, i = 0;</div><div class='ctx'> </div><div class='del'>-	if (!os-&gt;addr)</div><div class='add'>+	os = _find_mpu_rt_port(oh);</div><div class='add'>+	if (!os || !os-&gt;addr)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='hunk'>@@ -944,20 +1117,7 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)</div><div class='ctx'> 			found = 1;</div><div class='ctx'> 	} while (!found &amp;&amp; mem-&gt;pa_start != mem-&gt;pa_end);</div><div class='ctx'> </div><div class='del'>-	if (found) {</div><div class='del'>-		va_start = ioremap(mem-&gt;pa_start, mem-&gt;pa_end - mem-&gt;pa_start);</div><div class='del'>-		if (!va_start) {</div><div class='del'>-			pr_err("omap_hwmod: %s: Could not ioremap\n", oh-&gt;name);</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-		pr_debug("omap_hwmod: %s: MPU register target at va %p\n",</div><div class='del'>-			 oh-&gt;name, va_start);</div><div class='del'>-	} else {</div><div class='del'>-		pr_debug("omap_hwmod: %s: no MPU register target found\n",</div><div class='del'>-			 oh-&gt;name);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return (found) ? va_start : NULL;</div><div class='add'>+	return (found) ? mem : NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1205,12 +1365,11 @@ static int _wait_target_ready(struct omap_hwmod *oh)</div><div class='ctx'> 	if (!oh)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (oh-&gt;_int_flags &amp; _HWMOD_NO_MPU_PORT)</div><div class='add'>+	if (oh-&gt;flags &amp; HWMOD_NO_IDLEST)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	os = oh-&gt;slaves[oh-&gt;_mpu_port_index];</div><div class='del'>-</div><div class='del'>-	if (oh-&gt;flags &amp; HWMOD_NO_IDLEST)</div><div class='add'>+	os = _find_mpu_rt_port(oh);</div><div class='add'>+	if (!os)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* XXX check module SIDLEMODE */</div><div class='hunk'>@@ -1378,13 +1537,73 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ *</div><div class='add'>+ * If any hardreset line associated with @oh is asserted, then return true.</div><div class='add'>+ * Otherwise, if @oh has no hardreset lines associated with it, or if</div><div class='add'>+ * no hardreset lines associated with @oh are asserted, then return false.</div><div class='add'>+ * This function is used to avoid executing some parts of the IP block</div><div class='add'>+ * enable/disable sequence if a hardreset line is set.</div><div class='add'>+ */</div><div class='add'>+static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (oh-&gt;rst_lines_cnt == 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; oh-&gt;rst_lines_cnt; i++)</div><div class='add'>+		if (_read_hardreset(oh, oh-&gt;rst_lines[i].name) &gt; 0)</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ *</div><div class='add'>+ * Disable the PRCM module mode related to the hwmod @oh.</div><div class='add'>+ * Return EINVAL if the modulemode is not supported and 0 in case of success.</div><div class='add'>+ */</div><div class='add'>+static int _omap4_disable_module(struct omap_hwmod *oh)</div><div class='add'>+{</div><div class='add'>+	int v;</div><div class='add'>+</div><div class='add'>+	/* The module mode does not exist prior OMAP4 */</div><div class='add'>+	if (!cpu_is_omap44xx())</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!oh-&gt;clkdm || !oh-&gt;prcm.omap4.modulemode)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	pr_debug("omap_hwmod: %s: %s\n", oh-&gt;name, __func__);</div><div class='add'>+</div><div class='add'>+	omap4_cminst_module_disable(oh-&gt;clkdm-&gt;prcm_partition,</div><div class='add'>+				    oh-&gt;clkdm-&gt;cm_inst,</div><div class='add'>+				    oh-&gt;clkdm-&gt;clkdm_offs,</div><div class='add'>+				    oh-&gt;prcm.omap4.clkctrl_offs);</div><div class='add'>+</div><div class='add'>+	if (_are_any_hardreset_lines_asserted(oh))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	v = _omap4_wait_target_disable(oh);</div><div class='add'>+	if (v)</div><div class='add'>+		pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",</div><div class='add'>+			oh-&gt;name);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit</div><div class='ctx'>  * @oh: struct omap_hwmod *</div><div class='ctx'>  *</div><div class='ctx'>  * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit.  hwmod must be</div><div class='del'>- * enabled for this to work.  Returns -EINVAL if the hwmod cannot be</div><div class='del'>- * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if</div><div class='del'>- * the module did not reset in time, or 0 upon success.</div><div class='add'>+ * enabled for this to work.  Returns -ENOENT if the hwmod cannot be</div><div class='add'>+ * reset this way, -EINVAL if the hwmod is in the wrong state,</div><div class='add'>+ * -ETIMEDOUT if the module did not reset in time, or 0 upon success.</div><div class='ctx'>  *</div><div class='ctx'>  * In OMAP3 a specific SYSSTATUS register is used to get the reset status.</div><div class='ctx'>  * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead</div><div class='hunk'>@@ -1401,7 +1620,7 @@ static int _ocp_softreset(struct omap_hwmod *oh)</div><div class='ctx'> </div><div class='ctx'> 	if (!oh-&gt;class-&gt;sysc ||</div><div class='ctx'> 	    !(oh-&gt;class-&gt;sysc-&gt;sysc_flags &amp; SYSC_HAS_SOFTRESET))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return -ENOENT;</div><div class='ctx'> </div><div class='ctx'> 	/* clocks must be on for this operation */</div><div class='ctx'> 	if (oh-&gt;_state != _HWMOD_STATE_ENABLED) {</div><div class='hunk'>@@ -1462,32 +1681,60 @@ dis_opt_clks:</div><div class='ctx'>  * _reset - reset an omap_hwmod</div><div class='ctx'>  * @oh: struct omap_hwmod *</div><div class='ctx'>  *</div><div class='del'>- * Resets an omap_hwmod @oh.  The default software reset mechanism for</div><div class='del'>- * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET</div><div class='del'>- * bit.  However, some hwmods cannot be reset via this method: some</div><div class='del'>- * are not targets and therefore have no OCP header registers to</div><div class='del'>- * access; others (like the IVA) have idiosyncratic reset sequences.</div><div class='del'>- * So for these relatively rare cases, custom reset code can be</div><div class='del'>- * supplied in the struct omap_hwmod_class .reset function pointer.</div><div class='del'>- * Passes along the return value from either _reset() or the custom</div><div class='del'>- * reset function - these must return -EINVAL if the hwmod cannot be</div><div class='del'>- * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if</div><div class='del'>- * the module did not reset in time, or 0 upon success.</div><div class='add'>+ * Resets an omap_hwmod @oh.  If the module has a custom reset</div><div class='add'>+ * function pointer defined, then call it to reset the IP block, and</div><div class='add'>+ * pass along its return value to the caller.  Otherwise, if the IP</div><div class='add'>+ * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield</div><div class='add'>+ * associated with it, call a function to reset the IP block via that</div><div class='add'>+ * method, and pass along the return value to the caller.  Finally, if</div><div class='add'>+ * the IP block has some hardreset lines associated with it, assert</div><div class='add'>+ * all of those, but do _not_ deassert them. (This is because driver</div><div class='add'>+ * authors have expressed an apparent requirement to control the</div><div class='add'>+ * deassertion of the hardreset lines themselves.)</div><div class='add'>+ *</div><div class='add'>+ * The default software reset mechanism for most OMAP IP blocks is</div><div class='add'>+ * triggered via the OCP_SYSCONFIG.SOFTRESET bit.  However, some</div><div class='add'>+ * hwmods cannot be reset via this method.  Some are not targets and</div><div class='add'>+ * therefore have no OCP header registers to access.  Others (like the</div><div class='add'>+ * IVA) have idiosyncratic reset sequences.  So for these relatively</div><div class='add'>+ * rare cases, custom reset code can be supplied in the struct</div><div class='add'>+ * omap_hwmod_class .reset function pointer.  Passes along the return</div><div class='add'>+ * value from either _ocp_softreset() or the custom reset function -</div><div class='add'>+ * these must return -EINVAL if the hwmod cannot be reset this way or</div><div class='add'>+ * if the hwmod is in the wrong state, -ETIMEDOUT if the module did</div><div class='add'>+ * not reset in time, or 0 upon success.</div><div class='ctx'>  */</div><div class='ctx'> static int _reset(struct omap_hwmod *oh)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	int i, r;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("omap_hwmod: %s: resetting\n", oh-&gt;name);</div><div class='ctx'> </div><div class='del'>-	ret = (oh-&gt;class-&gt;reset) ? oh-&gt;class-&gt;reset(oh) : _ocp_softreset(oh);</div><div class='add'>+	if (oh-&gt;class-&gt;reset) {</div><div class='add'>+		r = oh-&gt;class-&gt;reset(oh);</div><div class='add'>+	} else {</div><div class='add'>+		if (oh-&gt;rst_lines_cnt &gt; 0) {</div><div class='add'>+			for (i = 0; i &lt; oh-&gt;rst_lines_cnt; i++)</div><div class='add'>+				_assert_hardreset(oh, oh-&gt;rst_lines[i].name);</div><div class='add'>+			return 0;</div><div class='add'>+		} else {</div><div class='add'>+			r = _ocp_softreset(oh);</div><div class='add'>+			if (r == -ENOENT)</div><div class='add'>+				r = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * OCP_SYSCONFIG bits need to be reprogrammed after a</div><div class='add'>+	 * softreset.  The _enable() function should be split to avoid</div><div class='add'>+	 * the rewrite of the OCP_SYSCONFIG register.</div><div class='add'>+	 */</div><div class='ctx'> 	if (oh-&gt;class-&gt;sysc) {</div><div class='ctx'> 		_update_sysc_cache(oh);</div><div class='ctx'> 		_enable_sysc(oh);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1506,10 +1753,9 @@ static int _enable(struct omap_hwmod *oh)</div><div class='ctx'> 	pr_debug("omap_hwmod: %s: enabling\n", oh-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * hwmods with HWMOD_INIT_NO_IDLE flag set are left</div><div class='del'>-	 * in enabled state at init.</div><div class='del'>-	 * Now that someone is really trying to enable them,</div><div class='del'>-	 * just ensure that the hwmod mux is set.</div><div class='add'>+	 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled</div><div class='add'>+	 * state at init.  Now that someone is really trying to enable</div><div class='add'>+	 * them, just ensure that the hwmod mux is set.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (oh-&gt;_int_flags &amp; _HWMOD_SKIP_ENABLE) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1532,15 +1778,17 @@ static int _enable(struct omap_hwmod *oh)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * If an IP contains only one HW reset line, then de-assert it in order</div><div class='del'>-	 * to allow the module state transition. Otherwise the PRCM will return</div><div class='del'>-	 * Intransition status, and the init will failed.</div><div class='add'>+	 * If an IP block contains HW reset lines and any of them are</div><div class='add'>+	 * asserted, we let integration code associated with that</div><div class='add'>+	 * block handle the enable.  We've received very little</div><div class='add'>+	 * information on what those driver authors need, and until</div><div class='add'>+	 * detailed information is provided and the driver code is</div><div class='add'>+	 * posted to the public lists, this is probably the best we</div><div class='add'>+	 * can do.</div><div class='ctx'> 	 */</div><div class='del'>-	if ((oh-&gt;_state == _HWMOD_STATE_INITIALIZED ||</div><div class='del'>-	     oh-&gt;_state == _HWMOD_STATE_DISABLED) &amp;&amp; oh-&gt;rst_lines_cnt == 1)</div><div class='del'>-		_deassert_hardreset(oh, oh-&gt;rst_lines[0].name);</div><div class='add'>+	if (_are_any_hardreset_lines_asserted(oh))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Mux pins for device runtime if populated */</div><div class='ctx'> 	if (oh-&gt;mux &amp;&amp; (!oh-&gt;mux-&gt;enabled ||</div><div class='hunk'>@@ -1615,6 +1863,9 @@ static int _idle(struct omap_hwmod *oh)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (_are_any_hardreset_lines_asserted(oh))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (oh-&gt;class-&gt;sysc)</div><div class='ctx'> 		_idle_sysc(oh);</div><div class='ctx'> 	_del_initiator_dep(oh, mpu_oh);</div><div class='hunk'>@@ -1687,7 +1938,7 @@ int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)</div><div class='ctx'>  */</div><div class='ctx'> static int _shutdown(struct omap_hwmod *oh)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, i;</div><div class='ctx'> 	u8 prev_state;</div><div class='ctx'> </div><div class='ctx'> 	if (oh-&gt;_state != _HWMOD_STATE_IDLE &amp;&amp;</div><div class='hunk'>@@ -1697,6 +1948,9 @@ static int _shutdown(struct omap_hwmod *oh)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (_are_any_hardreset_lines_asserted(oh))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	pr_debug("omap_hwmod: %s: disabling\n", oh-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	if (oh-&gt;class-&gt;pre_shutdown) {</div><div class='hunk'>@@ -1728,12 +1982,8 @@ static int _shutdown(struct omap_hwmod *oh)</div><div class='ctx'> 	}</div><div class='ctx'> 	/* XXX Should this code also force-disable the optional clocks? */</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If an IP contains only one HW reset line, then assert it</div><div class='del'>-	 * after disabling the clocks and before shutting down the IP.</div><div class='del'>-	 */</div><div class='del'>-	if (oh-&gt;rst_lines_cnt == 1)</div><div class='del'>-		_assert_hardreset(oh, oh-&gt;rst_lines[0].name);</div><div class='add'>+	for (i = 0; i &lt; oh-&gt;rst_lines_cnt; i++)</div><div class='add'>+		_assert_hardreset(oh, oh-&gt;rst_lines[i].name);</div><div class='ctx'> </div><div class='ctx'> 	/* Mux pins to safe mode or use populated off mode values */</div><div class='ctx'> 	if (oh-&gt;mux)</div><div class='hunk'>@@ -1745,59 +1995,186 @@ static int _shutdown(struct omap_hwmod *oh)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * _setup - do initial configuration of omap_hwmod</div><div class='del'>- * @oh: struct omap_hwmod *</div><div class='add'>+ * _init_mpu_rt_base - populate the virtual address for a hwmod</div><div class='add'>+ * @oh: struct omap_hwmod * to locate the virtual address</div><div class='ctx'>  *</div><div class='del'>- * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh</div><div class='del'>- * OCP_SYSCONFIG register.  Returns 0.</div><div class='add'>+ * Cache the virtual address used by the MPU to access this IP block's</div><div class='add'>+ * registers.  This address is needed early so the OCP registers that</div><div class='add'>+ * are part of the device's address space can be ioremapped properly.</div><div class='add'>+ * No return value.</div><div class='ctx'>  */</div><div class='del'>-static int _setup(struct omap_hwmod *oh, void *data)</div><div class='add'>+static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)</div><div class='ctx'> {</div><div class='del'>-	int i, r;</div><div class='del'>-	u8 postsetup_state;</div><div class='add'>+	struct omap_hwmod_addr_space *mem;</div><div class='add'>+	void __iomem *va_start;</div><div class='add'>+</div><div class='add'>+	if (!oh)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	_save_mpu_port_index(oh);</div><div class='ctx'> </div><div class='del'>-	if (oh-&gt;_state != _HWMOD_STATE_CLKS_INITED)</div><div class='add'>+	if (oh-&gt;_int_flags &amp; _HWMOD_NO_MPU_PORT)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mem = _find_mpu_rt_addr_space(oh);</div><div class='add'>+	if (!mem) {</div><div class='add'>+		pr_debug("omap_hwmod: %s: no MPU register target found\n",</div><div class='add'>+			 oh-&gt;name);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	va_start = ioremap(mem-&gt;pa_start, mem-&gt;pa_end - mem-&gt;pa_start);</div><div class='add'>+	if (!va_start) {</div><div class='add'>+		pr_err("omap_hwmod: %s: Could not ioremap\n", oh-&gt;name);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_debug("omap_hwmod: %s: MPU register target at va %p\n",</div><div class='add'>+		 oh-&gt;name, va_start);</div><div class='add'>+</div><div class='add'>+	oh-&gt;_mpu_rt_va = va_start;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _init - initialize internal data for the hwmod @oh</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ * @n: (unused)</div><div class='add'>+ *</div><div class='add'>+ * Look up the clocks and the address space used by the MPU to access</div><div class='add'>+ * registers belonging to the hwmod @oh.  @oh must already be</div><div class='add'>+ * registered at this point.  This is the first of two phases for</div><div class='add'>+ * hwmod initialization.  Code called here does not touch any hardware</div><div class='add'>+ * registers, it simply prepares internal data structures.  Returns 0</div><div class='add'>+ * upon success or if the hwmod isn't registered, or -EINVAL upon</div><div class='add'>+ * failure.</div><div class='add'>+ */</div><div class='add'>+static int __init _init(struct omap_hwmod *oh, void *data)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if (oh-&gt;_state != _HWMOD_STATE_REGISTERED)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* Set iclk autoidle mode */</div><div class='del'>-	if (oh-&gt;slaves_cnt &gt; 0) {</div><div class='del'>-		for (i = 0; i &lt; oh-&gt;slaves_cnt; i++) {</div><div class='del'>-			struct omap_hwmod_ocp_if *os = oh-&gt;slaves[i];</div><div class='del'>-			struct clk *c = os-&gt;_clk;</div><div class='add'>+	_init_mpu_rt_base(oh, NULL);</div><div class='ctx'> </div><div class='del'>-			if (!c)</div><div class='del'>-				continue;</div><div class='add'>+	r = _init_clocks(oh, NULL);</div><div class='add'>+	if (IS_ERR_VALUE(r)) {</div><div class='add'>+		WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh-&gt;name);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-			if (os-&gt;flags &amp; OCPIF_SWSUP_IDLE) {</div><div class='del'>-				/* XXX omap_iclk_deny_idle(c); */</div><div class='del'>-			} else {</div><div class='del'>-				/* XXX omap_iclk_allow_idle(c); */</div><div class='del'>-				clk_enable(c);</div><div class='del'>-			}</div><div class='add'>+	oh-&gt;_state = _HWMOD_STATE_INITIALIZED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _setup_iclk_autoidle - configure an IP block's interface clocks</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ *</div><div class='add'>+ * Set up the module's interface clocks.  XXX This function is still mostly</div><div class='add'>+ * a stub; implementing this properly requires iclk autoidle usecounting in</div><div class='add'>+ * the clock code.   No return value.</div><div class='add'>+ */</div><div class='add'>+static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)</div><div class='add'>+{</div><div class='add'>+	struct omap_hwmod_ocp_if *os;</div><div class='add'>+	struct list_head *p;</div><div class='add'>+	int i = 0;</div><div class='add'>+	if (oh-&gt;_state != _HWMOD_STATE_INITIALIZED)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	p = oh-&gt;slave_ports.next;</div><div class='add'>+</div><div class='add'>+	while (i &lt; oh-&gt;slaves_cnt) {</div><div class='add'>+		os = _fetch_next_ocp_if(&amp;p, &amp;i);</div><div class='add'>+		if (!os-&gt;_clk)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (os-&gt;flags &amp; OCPIF_SWSUP_IDLE) {</div><div class='add'>+			/* XXX omap_iclk_deny_idle(c); */</div><div class='add'>+		} else {</div><div class='add'>+			/* XXX omap_iclk_allow_idle(c); */</div><div class='add'>+			clk_enable(os-&gt;_clk);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	oh-&gt;_state = _HWMOD_STATE_INITIALIZED;</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * In the case of hwmod with hardreset that should not be</div><div class='del'>-	 * de-assert at boot time, we have to keep the module</div><div class='del'>-	 * initialized, because we cannot enable it properly with the</div><div class='del'>-	 * reset asserted. Exit without warning because that behavior is</div><div class='del'>-	 * expected.</div><div class='del'>-	 */</div><div class='del'>-	if ((oh-&gt;flags &amp; HWMOD_INIT_NO_RESET) &amp;&amp; oh-&gt;rst_lines_cnt == 1)</div><div class='del'>-		return 0;</div><div class='add'>+/**</div><div class='add'>+ * _setup_reset - reset an IP block during the setup process</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ *</div><div class='add'>+ * Reset the IP block corresponding to the hwmod @oh during the setup</div><div class='add'>+ * process.  The IP block is first enabled so it can be successfully</div><div class='add'>+ * reset.  Returns 0 upon success or a negative error code upon</div><div class='add'>+ * failure.</div><div class='add'>+ */</div><div class='add'>+static int __init _setup_reset(struct omap_hwmod *oh)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='ctx'> </div><div class='del'>-	r = _enable(oh);</div><div class='del'>-	if (r) {</div><div class='del'>-		pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",</div><div class='del'>-			   oh-&gt;name, oh-&gt;_state);</div><div class='del'>-		return 0;</div><div class='add'>+	if (oh-&gt;_state != _HWMOD_STATE_INITIALIZED)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (oh-&gt;rst_lines_cnt == 0) {</div><div class='add'>+		r = _enable(oh);</div><div class='add'>+		if (r) {</div><div class='add'>+			pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",</div><div class='add'>+				   oh-&gt;name, oh-&gt;_state);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!(oh-&gt;flags &amp; HWMOD_INIT_NO_RESET))</div><div class='del'>-		_reset(oh);</div><div class='add'>+		r = _reset(oh);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _setup_postsetup - transition to the appropriate state after _setup</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ *</div><div class='add'>+ * Place an IP block represented by @oh into a "post-setup" state --</div><div class='add'>+ * either IDLE, ENABLED, or DISABLED.  ("post-setup" simply means that</div><div class='add'>+ * this function is called at the end of _setup().)  The postsetup</div><div class='add'>+ * state for an IP block can be changed by calling</div><div class='add'>+ * omap_hwmod_enter_postsetup_state() early in the boot process,</div><div class='add'>+ * before one of the omap_hwmod_setup*() functions are called for the</div><div class='add'>+ * IP block.</div><div class='add'>+ *</div><div class='add'>+ * The IP block stays in this state until a PM runtime-based driver is</div><div class='add'>+ * loaded for that IP block.  A post-setup state of IDLE is</div><div class='add'>+ * appropriate for almost all IP blocks with runtime PM-enabled</div><div class='add'>+ * drivers, since those drivers are able to enable the IP block.  A</div><div class='add'>+ * post-setup state of ENABLED is appropriate for kernels with PM</div><div class='add'>+ * runtime disabled.  The DISABLED state is appropriate for unusual IP</div><div class='add'>+ * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers</div><div class='add'>+ * included, since the WDTIMER starts running on reset and will reset</div><div class='add'>+ * the MPU if left active.</div><div class='add'>+ *</div><div class='add'>+ * This post-setup mechanism is deprecated.  Once all of the OMAP</div><div class='add'>+ * drivers have been converted to use PM runtime, and all of the IP</div><div class='add'>+ * block data and interconnect data is available to the hwmod code, it</div><div class='add'>+ * should be possible to replace this mechanism with a "lazy reset"</div><div class='add'>+ * arrangement.  In a "lazy reset" setup, each IP block is enabled</div><div class='add'>+ * when the driver first probes, then all remaining IP blocks without</div><div class='add'>+ * drivers are either shut down or enabled after the drivers have</div><div class='add'>+ * loaded.  However, this cannot take place until the above</div><div class='add'>+ * preconditions have been met, since otherwise the late reset code</div><div class='add'>+ * has no way of knowing which IP blocks are in use by drivers, and</div><div class='add'>+ * which ones are unused.</div><div class='add'>+ *</div><div class='add'>+ * No return value.</div><div class='add'>+ */</div><div class='add'>+static void __init _setup_postsetup(struct omap_hwmod *oh)</div><div class='add'>+{</div><div class='add'>+	u8 postsetup_state;</div><div class='add'>+</div><div class='add'>+	if (oh-&gt;rst_lines_cnt &gt; 0)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	postsetup_state = oh-&gt;_postsetup_state;</div><div class='ctx'> 	if (postsetup_state == _HWMOD_STATE_UNKNOWN)</div><div class='hunk'>@@ -1821,6 +2198,35 @@ static int _setup(struct omap_hwmod *oh, void *data)</div><div class='ctx'> 		WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",</div><div class='ctx'> 		     oh-&gt;name, postsetup_state);</div><div class='ctx'> </div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _setup - prepare IP block hardware for use</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ * @n: (unused, pass NULL)</div><div class='add'>+ *</div><div class='add'>+ * Configure the IP block represented by @oh.  This may include</div><div class='add'>+ * enabling the IP block, resetting it, and placing it into a</div><div class='add'>+ * post-setup state, depending on the type of IP block and applicable</div><div class='add'>+ * flags.  IP blocks are reset to prevent any previous configuration</div><div class='add'>+ * by the bootloader or previous operating system from interfering</div><div class='add'>+ * with power management or other parts of the system.  The reset can</div><div class='add'>+ * be avoided; see omap_hwmod_no_setup_reset().  This is the second of</div><div class='add'>+ * two phases for hwmod initialization.  Code called here generally</div><div class='add'>+ * affects the IP block hardware, or system integration hardware</div><div class='add'>+ * associated with the IP block.  Returns 0.</div><div class='add'>+ */</div><div class='add'>+static int __init _setup(struct omap_hwmod *oh, void *data)</div><div class='add'>+{</div><div class='add'>+	if (oh-&gt;_state != _HWMOD_STATE_INITIALIZED)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	_setup_iclk_autoidle(oh);</div><div class='add'>+</div><div class='add'>+	if (!_setup_reset(oh))</div><div class='add'>+		_setup_postsetup(oh);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1843,8 +2249,6 @@ static int _setup(struct omap_hwmod *oh, void *data)</div><div class='ctx'>  */</div><div class='ctx'> static int __init _register(struct omap_hwmod *oh)</div><div class='ctx'> {</div><div class='del'>-	int ms_id;</div><div class='del'>-</div><div class='ctx'> 	if (!oh || !oh-&gt;name || !oh-&gt;class || !oh-&gt;class-&gt;name ||</div><div class='ctx'> 	    (oh-&gt;_state != _HWMOD_STATE_UNKNOWN))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1854,14 +2258,10 @@ static int __init _register(struct omap_hwmod *oh)</div><div class='ctx'> 	if (_lookup(oh-&gt;name))</div><div class='ctx'> 		return -EEXIST;</div><div class='ctx'> </div><div class='del'>-	ms_id = _find_mpu_port_index(oh);</div><div class='del'>-	if (!IS_ERR_VALUE(ms_id))</div><div class='del'>-		oh-&gt;_mpu_port_index = ms_id;</div><div class='del'>-	else</div><div class='del'>-		oh-&gt;_int_flags |= _HWMOD_NO_MPU_PORT;</div><div class='del'>-</div><div class='ctx'> 	list_add_tail(&amp;oh-&gt;node, &amp;omap_hwmod_list);</div><div class='ctx'> </div><div class='add'>+	INIT_LIST_HEAD(&amp;oh-&gt;master_ports);</div><div class='add'>+	INIT_LIST_HEAD(&amp;oh-&gt;slave_ports);</div><div class='ctx'> 	spin_lock_init(&amp;oh-&gt;_lock);</div><div class='ctx'> </div><div class='ctx'> 	oh-&gt;_state = _HWMOD_STATE_REGISTERED;</div><div class='hunk'>@@ -1876,6 +2276,160 @@ static int __init _register(struct omap_hwmod *oh)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * _alloc_links - return allocated memory for hwmod links</div><div class='add'>+ * @ml: pointer to a struct omap_hwmod_link * for the master link</div><div class='add'>+ * @sl: pointer to a struct omap_hwmod_link * for the slave link</div><div class='add'>+ *</div><div class='add'>+ * Return pointers to two struct omap_hwmod_link records, via the</div><div class='add'>+ * addresses pointed to by @ml and @sl.  Will first attempt to return</div><div class='add'>+ * memory allocated as part of a large initial block, but if that has</div><div class='add'>+ * been exhausted, will allocate memory itself.  Since ideally this</div><div class='add'>+ * second allocation path will never occur, the number of these</div><div class='add'>+ * 'supplemental' allocations will be logged when debugging is</div><div class='add'>+ * enabled.  Returns 0.</div><div class='add'>+ */</div><div class='add'>+static int __init _alloc_links(struct omap_hwmod_link **ml,</div><div class='add'>+			       struct omap_hwmod_link **sl)</div><div class='add'>+{</div><div class='add'>+	unsigned int sz;</div><div class='add'>+</div><div class='add'>+	if ((free_ls + LINKS_PER_OCP_IF) &lt;= max_ls) {</div><div class='add'>+		*ml = &amp;linkspace[free_ls++];</div><div class='add'>+		*sl = &amp;linkspace[free_ls++];</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;</div><div class='add'>+</div><div class='add'>+	*sl = NULL;</div><div class='add'>+	*ml = alloc_bootmem(sz);</div><div class='add'>+</div><div class='add'>+	memset(*ml, 0, sz);</div><div class='add'>+</div><div class='add'>+	*sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);</div><div class='add'>+</div><div class='add'>+	ls_supp++;</div><div class='add'>+	pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",</div><div class='add'>+		 ls_supp * LINKS_PER_OCP_IF);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _add_link - add an interconnect between two IP blocks</div><div class='add'>+ * @oi: pointer to a struct omap_hwmod_ocp_if record</div><div class='add'>+ *</div><div class='add'>+ * Add struct omap_hwmod_link records connecting the master IP block</div><div class='add'>+ * specified in @oi-&gt;master to @oi, and connecting the slave IP block</div><div class='add'>+ * specified in @oi-&gt;slave to @oi.  This code is assumed to run before</div><div class='add'>+ * preemption or SMP has been enabled, thus avoiding the need for</div><div class='add'>+ * locking in this code.  Changes to this assumption will require</div><div class='add'>+ * additional locking.  Returns 0.</div><div class='add'>+ */</div><div class='add'>+static int __init _add_link(struct omap_hwmod_ocp_if *oi)</div><div class='add'>+{</div><div class='add'>+	struct omap_hwmod_link *ml, *sl;</div><div class='add'>+</div><div class='add'>+	pr_debug("omap_hwmod: %s -&gt; %s: adding link\n", oi-&gt;master-&gt;name,</div><div class='add'>+		 oi-&gt;slave-&gt;name);</div><div class='add'>+</div><div class='add'>+	_alloc_links(&amp;ml, &amp;sl);</div><div class='add'>+</div><div class='add'>+	ml-&gt;ocp_if = oi;</div><div class='add'>+	INIT_LIST_HEAD(&amp;ml-&gt;node);</div><div class='add'>+	list_add(&amp;ml-&gt;node, &amp;oi-&gt;master-&gt;master_ports);</div><div class='add'>+	oi-&gt;master-&gt;masters_cnt++;</div><div class='add'>+</div><div class='add'>+	sl-&gt;ocp_if = oi;</div><div class='add'>+	INIT_LIST_HEAD(&amp;sl-&gt;node);</div><div class='add'>+	list_add(&amp;sl-&gt;node, &amp;oi-&gt;slave-&gt;slave_ports);</div><div class='add'>+	oi-&gt;slave-&gt;slaves_cnt++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _register_link - register a struct omap_hwmod_ocp_if</div><div class='add'>+ * @oi: struct omap_hwmod_ocp_if *</div><div class='add'>+ *</div><div class='add'>+ * Registers the omap_hwmod_ocp_if record @oi.  Returns -EEXIST if it</div><div class='add'>+ * has already been registered; -EINVAL if @oi is NULL or if the</div><div class='add'>+ * record pointed to by @oi is missing required fields; or 0 upon</div><div class='add'>+ * success.</div><div class='add'>+ *</div><div class='add'>+ * XXX The data should be copied into bootmem, so the original data</div><div class='add'>+ * should be marked __initdata and freed after init.  This would allow</div><div class='add'>+ * unneeded omap_hwmods to be freed on multi-OMAP configurations.</div><div class='add'>+ */</div><div class='add'>+static int __init _register_link(struct omap_hwmod_ocp_if *oi)</div><div class='add'>+{</div><div class='add'>+	if (!oi || !oi-&gt;master || !oi-&gt;slave || !oi-&gt;user)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (oi-&gt;_int_flags &amp; _OCPIF_INT_FLAGS_REGISTERED)</div><div class='add'>+		return -EEXIST;</div><div class='add'>+</div><div class='add'>+	pr_debug("omap_hwmod: registering link from %s to %s\n",</div><div class='add'>+		 oi-&gt;master-&gt;name, oi-&gt;slave-&gt;name);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Register the connected hwmods, if they haven't been</div><div class='add'>+	 * registered already</div><div class='add'>+	 */</div><div class='add'>+	if (oi-&gt;master-&gt;_state != _HWMOD_STATE_REGISTERED)</div><div class='add'>+		_register(oi-&gt;master);</div><div class='add'>+</div><div class='add'>+	if (oi-&gt;slave-&gt;_state != _HWMOD_STATE_REGISTERED)</div><div class='add'>+		_register(oi-&gt;slave);</div><div class='add'>+</div><div class='add'>+	_add_link(oi);</div><div class='add'>+</div><div class='add'>+	oi-&gt;_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _alloc_linkspace - allocate large block of hwmod links</div><div class='add'>+ * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count</div><div class='add'>+ *</div><div class='add'>+ * Allocate a large block of struct omap_hwmod_link records.  This</div><div class='add'>+ * improves boot time significantly by avoiding the need to allocate</div><div class='add'>+ * individual records one by one.  If the number of records to</div><div class='add'>+ * allocate in the block hasn't been manually specified, this function</div><div class='add'>+ * will count the number of struct omap_hwmod_ocp_if records in @ois</div><div class='add'>+ * and use that to determine the allocation size.  For SoC families</div><div class='add'>+ * that require multiple list registrations, such as OMAP3xxx, this</div><div class='add'>+ * estimation process isn't optimal, so manual estimation is advised</div><div class='add'>+ * in those cases.  Returns -EEXIST if the allocation has already occurred</div><div class='add'>+ * or 0 upon success.</div><div class='add'>+ */</div><div class='add'>+static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)</div><div class='add'>+{</div><div class='add'>+	unsigned int i = 0;</div><div class='add'>+	unsigned int sz;</div><div class='add'>+</div><div class='add'>+	if (linkspace) {</div><div class='add'>+		WARN(1, "linkspace already allocated\n");</div><div class='add'>+		return -EEXIST;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (max_ls == 0)</div><div class='add'>+		while (ois[i++])</div><div class='add'>+			max_ls += LINKS_PER_OCP_IF;</div><div class='add'>+</div><div class='add'>+	sz = sizeof(struct omap_hwmod_link) * max_ls;</div><div class='add'>+</div><div class='add'>+	pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",</div><div class='add'>+		 __func__, sz, max_ls);</div><div class='add'>+</div><div class='add'>+	linkspace = alloc_bootmem(sz);</div><div class='add'>+</div><div class='add'>+	memset(linkspace, 0, sz);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /* Public functions */</div><div class='ctx'> </div><div class='hunk'>@@ -2004,120 +2558,101 @@ int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * omap_hwmod_register - register an array of hwmods</div><div class='del'>- * @ohs: pointer to an array of omap_hwmods to register</div><div class='add'>+ * omap_hwmod_register_links - register an array of hwmod links</div><div class='add'>+ * @ois: pointer to an array of omap_hwmod_ocp_if to register</div><div class='ctx'>  *</div><div class='ctx'>  * Intended to be called early in boot before the clock framework is</div><div class='del'>- * initialized.  If @ohs is not null, will register all omap_hwmods</div><div class='del'>- * listed in @ohs that are valid for this chip.  Returns 0.</div><div class='add'>+ * initialized.  If @ois is not null, will register all omap_hwmods</div><div class='add'>+ * listed in @ois that are valid for this chip.  Returns 0.</div><div class='ctx'>  */</div><div class='del'>-int __init omap_hwmod_register(struct omap_hwmod **ohs)</div><div class='add'>+int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)</div><div class='ctx'> {</div><div class='ctx'> 	int r, i;</div><div class='ctx'> </div><div class='del'>-	if (!ohs)</div><div class='add'>+	if (!ois)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (!linkspace) {</div><div class='add'>+		if (_alloc_linkspace(ois)) {</div><div class='add'>+			pr_err("omap_hwmod: could not allocate link space\n");</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	i = 0;</div><div class='ctx'> 	do {</div><div class='del'>-		r = _register(ohs[i]);</div><div class='del'>-		WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]-&gt;name,</div><div class='del'>-		     r);</div><div class='del'>-	} while (ohs[++i]);</div><div class='add'>+		r = _register_link(ois[i]);</div><div class='add'>+		WARN(r &amp;&amp; r != -EEXIST,</div><div class='add'>+		     "omap_hwmod: _register_link(%s -&gt; %s) returned %d\n",</div><div class='add'>+		     ois[i]-&gt;master-&gt;name, ois[i]-&gt;slave-&gt;name, r);</div><div class='add'>+	} while (ois[++i]);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * _populate_mpu_rt_base - populate the virtual address for a hwmod</div><div class='add'>+/**</div><div class='add'>+ * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up</div><div class='add'>+ * @oh: pointer to the hwmod currently being set up (usually not the MPU)</div><div class='ctx'>  *</div><div class='del'>- * Must be called only from omap_hwmod_setup_*() so ioremap works properly.</div><div class='del'>- * Assumes the caller takes care of locking if needed.</div><div class='add'>+ * If the hwmod data corresponding to the MPU subsystem IP block</div><div class='add'>+ * hasn't been initialized and set up yet, do so now.  This must be</div><div class='add'>+ * done first since sleep dependencies may be added from other hwmods</div><div class='add'>+ * to the MPU.  Intended to be called only by omap_hwmod_setup*().  No</div><div class='add'>+ * return value.</div><div class='ctx'>  */</div><div class='del'>-static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)</div><div class='add'>+static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)</div><div class='ctx'> {</div><div class='del'>-	if (oh-&gt;_state != _HWMOD_STATE_REGISTERED)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (oh-&gt;_int_flags &amp; _HWMOD_NO_MPU_PORT)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	oh-&gt;_mpu_rt_va = _find_mpu_rt_base(oh, oh-&gt;_mpu_port_index);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	if (!mpu_oh || mpu_oh-&gt;_state == _HWMOD_STATE_UNKNOWN)</div><div class='add'>+		pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",</div><div class='add'>+		       __func__, MPU_INITIATOR_NAME);</div><div class='add'>+	else if (mpu_oh-&gt;_state == _HWMOD_STATE_REGISTERED &amp;&amp; oh != mpu_oh)</div><div class='add'>+		omap_hwmod_setup_one(MPU_INITIATOR_NAME);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * omap_hwmod_setup_one - set up a single hwmod</div><div class='ctx'>  * @oh_name: const char * name of the already-registered hwmod to set up</div><div class='ctx'>  *</div><div class='del'>- * Must be called after omap2_clk_init().  Resolves the struct clk</div><div class='del'>- * names to struct clk pointers for each registered omap_hwmod.  Also</div><div class='del'>- * calls _setup() on each hwmod.  Returns -EINVAL upon error or 0 upon</div><div class='del'>- * success.</div><div class='add'>+ * Initialize and set up a single hwmod.  Intended to be used for a</div><div class='add'>+ * small number of early devices, such as the timer IP blocks used for</div><div class='add'>+ * the scheduler clock.  Must be called after omap2_clk_init().</div><div class='add'>+ * Resolves the struct clk names to struct clk pointers for each</div><div class='add'>+ * registered omap_hwmod.  Also calls _setup() on each hwmod.  Returns</div><div class='add'>+ * -EINVAL upon error or 0 upon success.</div><div class='ctx'>  */</div><div class='ctx'> int __init omap_hwmod_setup_one(const char *oh_name)</div><div class='ctx'> {</div><div class='ctx'> 	struct omap_hwmod *oh;</div><div class='del'>-	int r;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);</div><div class='ctx'> </div><div class='del'>-	if (!mpu_oh) {</div><div class='del'>-		pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",</div><div class='del'>-		       oh_name, MPU_INITIATOR_NAME);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	oh = _lookup(oh_name);</div><div class='ctx'> 	if (!oh) {</div><div class='ctx'> 		WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mpu_oh-&gt;_state == _HWMOD_STATE_REGISTERED &amp;&amp; oh != mpu_oh)</div><div class='del'>-		omap_hwmod_setup_one(MPU_INITIATOR_NAME);</div><div class='del'>-</div><div class='del'>-	r = _populate_mpu_rt_base(oh, NULL);</div><div class='del'>-	if (IS_ERR_VALUE(r)) {</div><div class='del'>-		WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	r = _init_clocks(oh, NULL);</div><div class='del'>-	if (IS_ERR_VALUE(r)) {</div><div class='del'>-		WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	_ensure_mpu_hwmod_is_setup(oh);</div><div class='ctx'> </div><div class='add'>+	_init(oh, NULL);</div><div class='ctx'> 	_setup(oh, NULL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * omap_hwmod_setup - do some post-clock framework initialization</div><div class='add'>+ * omap_hwmod_setup_all - set up all registered IP blocks</div><div class='ctx'>  *</div><div class='del'>- * Must be called after omap2_clk_init().  Resolves the struct clk names</div><div class='del'>- * to struct clk pointers for each registered omap_hwmod.  Also calls</div><div class='del'>- * _setup() on each hwmod.  Returns 0 upon success.</div><div class='add'>+ * Initialize and set up all IP blocks registered with the hwmod code.</div><div class='add'>+ * Must be called after omap2_clk_init().  Resolves the struct clk</div><div class='add'>+ * names to struct clk pointers for each registered omap_hwmod.  Also</div><div class='add'>+ * calls _setup() on each hwmod.  Returns 0 upon success.</div><div class='ctx'>  */</div><div class='ctx'> static int __init omap_hwmod_setup_all(void)</div><div class='ctx'> {</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	if (!mpu_oh) {</div><div class='del'>-		pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",</div><div class='del'>-		       __func__, MPU_INITIATOR_NAME);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);</div><div class='del'>-</div><div class='del'>-	r = omap_hwmod_for_each(_init_clocks, NULL);</div><div class='del'>-	WARN(IS_ERR_VALUE(r),</div><div class='del'>-	     "omap_hwmod: %s: _init_clocks failed\n", __func__);</div><div class='add'>+	_ensure_mpu_hwmod_is_setup(NULL);</div><div class='ctx'> </div><div class='add'>+	omap_hwmod_for_each(_init, NULL);</div><div class='ctx'> 	omap_hwmod_for_each(_setup, NULL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2274,6 +2809,10 @@ int omap_hwmod_reset(struct omap_hwmod *oh)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * IP block data retrieval functions</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * omap_hwmod_count_resources - count number of struct resources needed by hwmod</div><div class='ctx'>  * @oh: struct omap_hwmod *</div><div class='hunk'>@@ -2292,12 +2831,19 @@ int omap_hwmod_reset(struct omap_hwmod *oh)</div><div class='ctx'>  */</div><div class='ctx'> int omap_hwmod_count_resources(struct omap_hwmod *oh)</div><div class='ctx'> {</div><div class='del'>-	int ret, i;</div><div class='add'>+	struct omap_hwmod_ocp_if *os;</div><div class='add'>+	struct list_head *p;</div><div class='add'>+	int ret;</div><div class='add'>+	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; oh-&gt;slaves_cnt; i++)</div><div class='del'>-		ret += _count_ocp_if_addr_spaces(oh-&gt;slaves[i]);</div><div class='add'>+	p = oh-&gt;slave_ports.next;</div><div class='add'>+</div><div class='add'>+	while (i &lt; oh-&gt;slaves_cnt) {</div><div class='add'>+		os = _fetch_next_ocp_if(&amp;p, &amp;i);</div><div class='add'>+		ret += _count_ocp_if_addr_spaces(os);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2314,7 +2860,9 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)</div><div class='ctx'>  */</div><div class='ctx'> int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)</div><div class='ctx'> {</div><div class='del'>-	int i, j, mpu_irqs_cnt, sdma_reqs_cnt;</div><div class='add'>+	struct omap_hwmod_ocp_if *os;</div><div class='add'>+	struct list_head *p;</div><div class='add'>+	int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;</div><div class='ctx'> 	int r = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* For each IRQ, DMA, memory area, fill in array.*/</div><div class='hunk'>@@ -2337,11 +2885,11 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)</div><div class='ctx'> 		r++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; oh-&gt;slaves_cnt; i++) {</div><div class='del'>-		struct omap_hwmod_ocp_if *os;</div><div class='del'>-		int addr_cnt;</div><div class='add'>+	p = oh-&gt;slave_ports.next;</div><div class='ctx'> </div><div class='del'>-		os = oh-&gt;slaves[i];</div><div class='add'>+	i = 0;</div><div class='add'>+	while (i &lt; oh-&gt;slaves_cnt) {</div><div class='add'>+		os = _fetch_next_ocp_if(&amp;p, &amp;i);</div><div class='ctx'> 		addr_cnt = _count_ocp_if_addr_spaces(os);</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; addr_cnt; j++) {</div><div class='hunk'>@@ -2357,6 +2905,69 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * omap_hwmod_get_resource_byname - fetch IP block integration data by name</div><div class='add'>+ * @oh: struct omap_hwmod * to operate on</div><div class='add'>+ * @type: one of the IORESOURCE_* constants from include/linux/ioport.h</div><div class='add'>+ * @name: pointer to the name of the data to fetch (optional)</div><div class='add'>+ * @rsrc: pointer to a struct resource, allocated by the caller</div><div class='add'>+ *</div><div class='add'>+ * Retrieve MPU IRQ, SDMA request line, or address space start/end</div><div class='add'>+ * data for the IP block pointed to by @oh.  The data will be filled</div><div class='add'>+ * into a struct resource record pointed to by @rsrc.  The struct</div><div class='add'>+ * resource must be allocated by the caller.  When @name is non-null,</div><div class='add'>+ * the data associated with the matching entry in the IRQ/SDMA/address</div><div class='add'>+ * space hwmod data arrays will be returned.  If @name is null, the</div><div class='add'>+ * first array entry will be returned.  Data order is not meaningful</div><div class='add'>+ * in hwmod data, so callers are strongly encouraged to use a non-null</div><div class='add'>+ * @name whenever possible to avoid unpredictable effects if hwmod</div><div class='add'>+ * data is later added that causes data ordering to change.  This</div><div class='add'>+ * function is only intended for use by OMAP core code.  Device</div><div class='add'>+ * drivers should not call this function - the appropriate bus-related</div><div class='add'>+ * data accessor functions should be used instead.  Returns 0 upon</div><div class='add'>+ * success or a negative error code upon error.</div><div class='add'>+ */</div><div class='add'>+int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,</div><div class='add'>+				   const char *name, struct resource *rsrc)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+	unsigned int irq, dma;</div><div class='add'>+	u32 pa_start, pa_end;</div><div class='add'>+</div><div class='add'>+	if (!oh || !rsrc)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (type == IORESOURCE_IRQ) {</div><div class='add'>+		r = _get_mpu_irq_by_name(oh, name, &amp;irq);</div><div class='add'>+		if (r)</div><div class='add'>+			return r;</div><div class='add'>+</div><div class='add'>+		rsrc-&gt;start = irq;</div><div class='add'>+		rsrc-&gt;end = irq;</div><div class='add'>+	} else if (type == IORESOURCE_DMA) {</div><div class='add'>+		r = _get_sdma_req_by_name(oh, name, &amp;dma);</div><div class='add'>+		if (r)</div><div class='add'>+			return r;</div><div class='add'>+</div><div class='add'>+		rsrc-&gt;start = dma;</div><div class='add'>+		rsrc-&gt;end = dma;</div><div class='add'>+	} else if (type == IORESOURCE_MEM) {</div><div class='add'>+		r = _get_addr_space_by_name(oh, name, &amp;pa_start, &amp;pa_end);</div><div class='add'>+		if (r)</div><div class='add'>+			return r;</div><div class='add'>+</div><div class='add'>+		rsrc-&gt;start = pa_start;</div><div class='add'>+		rsrc-&gt;end = pa_end;</div><div class='add'>+	} else {</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rsrc-&gt;flags = type;</div><div class='add'>+	rsrc-&gt;name = name;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain</div><div class='ctx'>  * @oh: struct omap_hwmod *</div><div class='ctx'>  *</div><div class='hunk'>@@ -2370,6 +2981,7 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)</div><div class='ctx'> struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk *c;</div><div class='add'>+	struct omap_hwmod_ocp_if *oi;</div><div class='ctx'> </div><div class='ctx'> 	if (!oh)</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -2377,9 +2989,10 @@ struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)</div><div class='ctx'> 	if (oh-&gt;_clk) {</div><div class='ctx'> 		c = oh-&gt;_clk;</div><div class='ctx'> 	} else {</div><div class='del'>-		if (oh-&gt;_int_flags &amp; _HWMOD_NO_MPU_PORT)</div><div class='add'>+		oi = _find_mpu_rt_port(oh);</div><div class='add'>+		if (!oi)</div><div class='ctx'> 			return NULL;</div><div class='del'>-		c = oh-&gt;slaves[oh-&gt;_mpu_port_index]-&gt;_clk;</div><div class='add'>+		c = oi-&gt;_clk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!c-&gt;clkdm)</div><div class='hunk'>@@ -2653,10 +3266,10 @@ int omap_hwmod_for_each_by_class(const char *classname,</div><div class='ctx'>  * @state: state that _setup() should leave the hwmod in</div><div class='ctx'>  *</div><div class='ctx'>  * Sets the hwmod state that @oh will enter at the end of _setup()</div><div class='del'>- * (called by omap_hwmod_setup_*()).  Only valid to call between</div><div class='del'>- * calling omap_hwmod_register() and omap_hwmod_setup_*().  Returns</div><div class='del'>- * 0 upon success or -EINVAL if there is a problem with the arguments</div><div class='del'>- * or if the hwmod is in the wrong state.</div><div class='add'>+ * (called by omap_hwmod_setup_*()).  See also the documentation</div><div class='add'>+ * for _setup_postsetup(), above.  Returns 0 upon success or</div><div class='add'>+ * -EINVAL if there is a problem with the arguments or if the hwmod is</div><div class='add'>+ * in the wrong state.</div><div class='ctx'>  */</div><div class='ctx'> int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c<br/>index a6bde34e443a..a7640d1b215e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2420_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap_hwmod_2420_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2420_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_2420_data.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'>  * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009-2011 Nokia Corporation</div><div class='add'>+ * Copyright (C) 2012 Texas Instruments, Inc.</div><div class='ctx'>  * Paul Walmsley</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='hunk'>@@ -22,6 +23,7 @@</div><div class='ctx'> #include &lt;plat/dmtimer.h&gt;</div><div class='ctx'> #include &lt;plat/l3_2xxx.h&gt;</div><div class='ctx'> #include &lt;plat/l4_2xxx.h&gt;</div><div class='add'>+#include &lt;plat/mmc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "omap_hwmod_common_data.h"</div><div class='ctx'> </div><div class='hunk'>@@ -32,707 +34,329 @@</div><div class='ctx'> /*</div><div class='ctx'>  * OMAP2420 hardware module integration data</div><div class='ctx'>  *</div><div class='del'>- * ALl of the data in this section should be autogeneratable from the</div><div class='add'>+ * All of the data in this section should be autogeneratable from the</div><div class='ctx'>  * TI hardware database or other technical documentation.  Data that</div><div class='ctx'>  * is driver-specific or driver-kernel integration-specific belongs</div><div class='ctx'>  * elsewhere.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap2420_mpu_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_iva_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_l3_main_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_l4_core_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_dss_core_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_dss_dispc_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_dss_rfbi_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_dss_venc_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_wd_timer2_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_gpio1_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_gpio2_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_gpio3_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_gpio4_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_dma_system_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_mcspi1_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_mcspi2_hwmod;</div><div class='del'>-</div><div class='del'>-/* L3 -&gt; L4_CORE interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {</div><div class='del'>-	.master	= &amp;omap2420_l3_main_hwmod,</div><div class='del'>-	.slave	= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* MPU -&gt; L3 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_mpu__l3_main = {</div><div class='del'>-	.master = &amp;omap2420_mpu_hwmod,</div><div class='del'>-	.slave	= &amp;omap2420_l3_main_hwmod,</div><div class='del'>-	.user	= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Slave interfaces on the L3 interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_l3_main_slaves[] = {</div><div class='del'>-	&amp;omap2420_mpu__l3_main,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* DSS -&gt; l3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_dss__l3 = {</div><div class='del'>-	.master		= &amp;omap2420_dss_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_l3_main_hwmod,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l3_perm_bit  = OMAP2_L3_CORE_FW_CONNID_DSS,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L3,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Master interfaces on the L3 interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_l3_main_masters[] = {</div><div class='del'>-	&amp;omap2420_l3_main__l4_core,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L3 */</div><div class='del'>-static struct omap_hwmod omap2420_l3_main_hwmod = {</div><div class='del'>-	.name		= "l3_main",</div><div class='del'>-	.class		= &amp;l3_hwmod_class,</div><div class='del'>-	.masters	= omap2420_l3_main_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2420_l3_main_masters),</div><div class='del'>-	.slaves		= omap2420_l3_main_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_l3_main_slaves),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_l4_wkup_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_uart1_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_uart2_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_uart3_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_i2c1_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_i2c2_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_mcbsp1_hwmod;</div><div class='del'>-static struct omap_hwmod omap2420_mcbsp2_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4 core -&gt; mcspi1 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_mcspi1_hwmod,</div><div class='del'>-	.clk		= "mcspi1_ick",</div><div class='del'>-	.addr		= omap2_mcspi1_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4 core -&gt; mcspi2 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_mcspi2_hwmod,</div><div class='del'>-	.clk		= "mcspi2_ick",</div><div class='del'>-	.addr		= omap2_mcspi2_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4_CORE -&gt; L4_WKUP interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {</div><div class='del'>-	.master	= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave	= &amp;omap2420_l4_wkup_hwmod,</div><div class='del'>-	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; UART1 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_uart1_hwmod,</div><div class='del'>-	.clk		= "uart1_ick",</div><div class='del'>-	.addr		= omap2xxx_uart1_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; UART2 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_uart2_hwmod,</div><div class='del'>-	.clk		= "uart2_ick",</div><div class='del'>-	.addr		= omap2xxx_uart2_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 PER -&gt; UART3 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_uart3_hwmod,</div><div class='del'>-	.clk		= "uart3_ick",</div><div class='del'>-	.addr		= omap2xxx_uart3_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; I2C1 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_i2c1_hwmod,</div><div class='del'>-	.clk		= "i2c1_ick",</div><div class='del'>-	.addr		= omap2_i2c1_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; I2C2 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_i2c2_hwmod,</div><div class='del'>-	.clk		= "i2c2_ick",</div><div class='del'>-	.addr		= omap2_i2c2_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Slave interfaces on the L4_CORE interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {</div><div class='del'>-	&amp;omap2420_l3_main__l4_core,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Master interfaces on the L4_CORE interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {</div><div class='del'>-	&amp;omap2420_l4_core__l4_wkup,</div><div class='del'>-	&amp;omap2_l4_core__uart1,</div><div class='del'>-	&amp;omap2_l4_core__uart2,</div><div class='del'>-	&amp;omap2_l4_core__uart3,</div><div class='del'>-	&amp;omap2420_l4_core__i2c1,</div><div class='del'>-	&amp;omap2420_l4_core__i2c2</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE */</div><div class='del'>-static struct omap_hwmod omap2420_l4_core_hwmod = {</div><div class='del'>-	.name		= "l4_core",</div><div class='del'>-	.class		= &amp;l4_hwmod_class,</div><div class='del'>-	.masters	= omap2420_l4_core_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2420_l4_core_masters),</div><div class='del'>-	.slaves		= omap2420_l4_core_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_l4_core_slaves),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Slave interfaces on the L4_WKUP interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_l4_wkup_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__l4_wkup,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Master interfaces on the L4_WKUP interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = {</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 WKUP */</div><div class='del'>-static struct omap_hwmod omap2420_l4_wkup_hwmod = {</div><div class='del'>-	.name		= "l4_wkup",</div><div class='del'>-	.class		= &amp;l4_hwmod_class,</div><div class='del'>-	.masters	= omap2420_l4_wkup_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2420_l4_wkup_masters),</div><div class='del'>-	.slaves		= omap2420_l4_wkup_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_l4_wkup_slaves),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Master interfaces on the MPU device */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = {</div><div class='del'>-	&amp;omap2420_mpu__l3_main,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* MPU */</div><div class='del'>-static struct omap_hwmod omap2420_mpu_hwmod = {</div><div class='del'>-	.name		= "mpu",</div><div class='del'>-	.class		= &amp;mpu_hwmod_class,</div><div class='del'>-	.main_clk	= "mpu_ck",</div><div class='del'>-	.masters	= omap2420_mpu_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2420_mpu_masters),</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /*</div><div class='del'>- * IVA1 interface data</div><div class='add'>+ * IP blocks</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/* IVA &lt;- L3 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l3__iva = {</div><div class='del'>-	.master		= &amp;omap2420_l3_main_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_iva_hwmod,</div><div class='del'>-	.clk		= "iva1_ifck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+/* IVA1 (IVA1) */</div><div class='add'>+static struct omap_hwmod_class iva1_hwmod_class = {</div><div class='add'>+	.name		= "iva1",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_iva_masters[] = {</div><div class='del'>-	&amp;omap2420_l3__iva,</div><div class='add'>+static struct omap_hwmod_rst_info omap2420_iva_resets[] = {</div><div class='add'>+	{ .name = "iva", .rst_shift = 8 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * IVA2 (IVA2)</div><div class='del'>- */</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2420_iva_hwmod = {</div><div class='ctx'> 	.name		= "iva",</div><div class='del'>-	.class		= &amp;iva_hwmod_class,</div><div class='del'>-	.masters	= omap2420_iva_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2420_iva_masters),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* always-on timers dev attribute */</div><div class='del'>-static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {</div><div class='del'>-	.timer_capability       = OMAP_TIMER_ALWON,</div><div class='add'>+	.class		= &amp;iva1_hwmod_class,</div><div class='add'>+	.clkdm_name	= "iva1_clkdm",</div><div class='add'>+	.rst_lines	= omap2420_iva_resets,</div><div class='add'>+	.rst_lines_cnt	= ARRAY_SIZE(omap2420_iva_resets),</div><div class='add'>+	.main_clk	= "iva1_ifck",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* pwm timers dev attribute */</div><div class='del'>-static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {</div><div class='del'>-	.timer_capability       = OMAP_TIMER_HAS_PWM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer1 */</div><div class='del'>-static struct omap_hwmod omap2420_timer1_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48028000,</div><div class='del'>-		.pa_end		= 0x48028000 + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='add'>+/* DSP */</div><div class='add'>+static struct omap_hwmod_class dsp_hwmod_class = {</div><div class='add'>+	.name		= "dsp",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_wkup -&gt; timer1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_timer1_hwmod,</div><div class='del'>-	.clk		= "gpt1_ick",</div><div class='del'>-	.addr		= omap2420_timer1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+static struct omap_hwmod_rst_info omap2420_dsp_resets[] = {</div><div class='add'>+	{ .name = "logic", .rst_shift = 0 },</div><div class='add'>+	{ .name = "mmu", .rst_shift = 1 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer1 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_wkup__timer1,</div><div class='add'>+static struct omap_hwmod omap2420_dsp_hwmod = {</div><div class='add'>+	.name		= "dsp",</div><div class='add'>+	.class		= &amp;dsp_hwmod_class,</div><div class='add'>+	.clkdm_name	= "dsp_clkdm",</div><div class='add'>+	.rst_lines	= omap2420_dsp_resets,</div><div class='add'>+	.rst_lines_cnt	= ARRAY_SIZE(omap2420_dsp_resets),</div><div class='add'>+	.main_clk	= "dsp_fck",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer1 hwmod */</div><div class='del'>-static struct omap_hwmod omap2420_timer1_hwmod = {</div><div class='del'>-	.name		= "timer1",</div><div class='del'>-	.mpu_irqs	= omap2_timer1_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt1_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT1_SHIFT,</div><div class='del'>-			.module_offs = WKUP_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2420_timer1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_timer1_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+/* I2C common */</div><div class='add'>+static struct omap_hwmod_class_sysconfig i2c_sysc = {</div><div class='add'>+	.rev_offs	= 0x00,</div><div class='add'>+	.sysc_offs	= 0x20,</div><div class='add'>+	.syss_offs	= 0x10,</div><div class='add'>+	.sysc_flags	= (SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer2 */</div><div class='del'>-static struct omap_hwmod omap2420_timer2_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_timer2_hwmod,</div><div class='del'>-	.clk		= "gpt2_ick",</div><div class='del'>-	.addr		= omap2xxx_timer2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+static struct omap_hwmod_class i2c_class = {</div><div class='add'>+	.name		= "i2c",</div><div class='add'>+	.sysc		= &amp;i2c_sysc,</div><div class='add'>+	.rev		= OMAP_I2C_IP_VERSION_1,</div><div class='add'>+	.reset		= &amp;omap_i2c_reset,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer2 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__timer2,</div><div class='add'>+static struct omap_i2c_dev_attr i2c_dev_attr = {</div><div class='add'>+	.flags		= OMAP_I2C_FLAG_NO_FIFO |</div><div class='add'>+			  OMAP_I2C_FLAG_SIMPLE_CLOCK |</div><div class='add'>+			  OMAP_I2C_FLAG_16BIT_DATA_REG |</div><div class='add'>+			  OMAP_I2C_FLAG_BUS_SHIFT_2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer2 hwmod */</div><div class='del'>-static struct omap_hwmod omap2420_timer2_hwmod = {</div><div class='del'>-	.name		= "timer2",</div><div class='del'>-	.mpu_irqs	= omap2_timer2_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt2_fck",</div><div class='add'>+/* I2C1 */</div><div class='add'>+static struct omap_hwmod omap2420_i2c1_hwmod = {</div><div class='add'>+	.name		= "i2c1",</div><div class='add'>+	.mpu_irqs	= omap2_i2c1_mpu_irqs,</div><div class='add'>+	.sdma_reqs	= omap2_i2c1_sdma_reqs,</div><div class='add'>+	.main_clk	= "i2c1_fck",</div><div class='ctx'> 	.prcm		= {</div><div class='ctx'> 		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT2_SHIFT,</div><div class='ctx'> 			.module_offs = CORE_MOD,</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP2420_EN_I2C1_SHIFT,</div><div class='ctx'> 			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,</div><div class='add'>+			.idlest_idle_bit = OMAP2420_ST_I2C1_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2420_timer2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_timer2_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer3 */</div><div class='del'>-static struct omap_hwmod omap2420_timer3_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_timer3_hwmod,</div><div class='del'>-	.clk		= "gpt3_ick",</div><div class='del'>-	.addr		= omap2xxx_timer3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer3 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__timer3,</div><div class='add'>+	.class		= &amp;i2c_class,</div><div class='add'>+	.dev_attr	= &amp;i2c_dev_attr,</div><div class='add'>+	.flags		= HWMOD_16BIT_REG,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer3 hwmod */</div><div class='del'>-static struct omap_hwmod omap2420_timer3_hwmod = {</div><div class='del'>-	.name		= "timer3",</div><div class='del'>-	.mpu_irqs	= omap2_timer3_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt3_fck",</div><div class='add'>+/* I2C2 */</div><div class='add'>+static struct omap_hwmod omap2420_i2c2_hwmod = {</div><div class='add'>+	.name		= "i2c2",</div><div class='add'>+	.mpu_irqs	= omap2_i2c2_mpu_irqs,</div><div class='add'>+	.sdma_reqs	= omap2_i2c2_sdma_reqs,</div><div class='add'>+	.main_clk	= "i2c2_fck",</div><div class='ctx'> 	.prcm		= {</div><div class='ctx'> 		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT3_SHIFT,</div><div class='ctx'> 			.module_offs = CORE_MOD,</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP2420_EN_I2C2_SHIFT,</div><div class='ctx'> 			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,</div><div class='add'>+			.idlest_idle_bit = OMAP2420_ST_I2C2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2420_timer3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_timer3_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+	.class		= &amp;i2c_class,</div><div class='add'>+	.dev_attr	= &amp;i2c_dev_attr,</div><div class='add'>+	.flags		= HWMOD_16BIT_REG,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer4 */</div><div class='del'>-static struct omap_hwmod omap2420_timer4_hwmod;</div><div class='add'>+/* dma attributes */</div><div class='add'>+static struct omap_dma_dev_attr dma_dev_attr = {</div><div class='add'>+	.dev_caps  = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |</div><div class='add'>+						IS_CSSA_32 | IS_CDSA_32,</div><div class='add'>+	.lch_count = 32,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* l4_core -&gt; timer4 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_timer4_hwmod,</div><div class='del'>-	.clk		= "gpt4_ick",</div><div class='del'>-	.addr		= omap2xxx_timer4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+static struct omap_hwmod omap2420_dma_system_hwmod = {</div><div class='add'>+	.name		= "dma",</div><div class='add'>+	.class		= &amp;omap2xxx_dma_hwmod_class,</div><div class='add'>+	.mpu_irqs	= omap2_dma_system_irqs,</div><div class='add'>+	.main_clk	= "core_l3_ck",</div><div class='add'>+	.dev_attr	= &amp;dma_dev_attr,</div><div class='add'>+	.flags		= HWMOD_NO_IDLEST,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer4 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__timer4,</div><div class='add'>+/* mailbox */</div><div class='add'>+static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {</div><div class='add'>+	{ .name = "dsp", .irq = 26 },</div><div class='add'>+	{ .name = "iva", .irq = 34 },</div><div class='add'>+	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer4 hwmod */</div><div class='del'>-static struct omap_hwmod omap2420_timer4_hwmod = {</div><div class='del'>-	.name		= "timer4",</div><div class='del'>-	.mpu_irqs	= omap2_timer4_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt4_fck",</div><div class='add'>+static struct omap_hwmod omap2420_mailbox_hwmod = {</div><div class='add'>+	.name		= "mailbox",</div><div class='add'>+	.class		= &amp;omap2xxx_mailbox_hwmod_class,</div><div class='add'>+	.mpu_irqs	= omap2420_mailbox_irqs,</div><div class='add'>+	.main_clk	= "mailboxes_ick",</div><div class='ctx'> 	.prcm		= {</div><div class='ctx'> 		.omap2 = {</div><div class='ctx'> 			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT4_SHIFT,</div><div class='add'>+			.module_bit = OMAP24XX_EN_MAILBOXES_SHIFT,</div><div class='ctx'> 			.module_offs = CORE_MOD,</div><div class='ctx'> 			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2420_timer4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_timer4_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer5 */</div><div class='del'>-static struct omap_hwmod omap2420_timer5_hwmod;</div><div class='add'>+/*</div><div class='add'>+ * 'mcbsp' class</div><div class='add'>+ * multi channel buffered serial port controller</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-/* l4_core -&gt; timer5 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_timer5_hwmod,</div><div class='del'>-	.clk		= "gpt5_ick",</div><div class='del'>-	.addr		= omap2xxx_timer5_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = {</div><div class='add'>+	.name = "mcbsp",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer5 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__timer5,</div><div class='add'>+/* mcbsp1 */</div><div class='add'>+static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {</div><div class='add'>+	{ .name = "tx", .irq = 59 },</div><div class='add'>+	{ .name = "rx", .irq = 60 },</div><div class='add'>+	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer5 hwmod */</div><div class='del'>-static struct omap_hwmod omap2420_timer5_hwmod = {</div><div class='del'>-	.name		= "timer5",</div><div class='del'>-	.mpu_irqs	= omap2_timer5_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt5_fck",</div><div class='add'>+static struct omap_hwmod omap2420_mcbsp1_hwmod = {</div><div class='add'>+	.name		= "mcbsp1",</div><div class='add'>+	.class		= &amp;omap2420_mcbsp_hwmod_class,</div><div class='add'>+	.mpu_irqs	= omap2420_mcbsp1_irqs,</div><div class='add'>+	.sdma_reqs	= omap2_mcbsp1_sdma_reqs,</div><div class='add'>+	.main_clk	= "mcbsp1_fck",</div><div class='ctx'> 	.prcm		= {</div><div class='ctx'> 		.omap2 = {</div><div class='ctx'> 			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT5_SHIFT,</div><div class='add'>+			.module_bit = OMAP24XX_EN_MCBSP1_SHIFT,</div><div class='ctx'> 			.module_offs = CORE_MOD,</div><div class='ctx'> 			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2420_timer5_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_timer5_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* timer6 */</div><div class='del'>-static struct omap_hwmod omap2420_timer6_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer6 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_timer6_hwmod,</div><div class='del'>-	.clk		= "gpt6_ick",</div><div class='del'>-	.addr		= omap2xxx_timer6_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer6 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__timer6,</div><div class='add'>+/* mcbsp2 */</div><div class='add'>+static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = {</div><div class='add'>+	{ .name = "tx", .irq = 62 },</div><div class='add'>+	{ .name = "rx", .irq = 63 },</div><div class='add'>+	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer6 hwmod */</div><div class='del'>-static struct omap_hwmod omap2420_timer6_hwmod = {</div><div class='del'>-	.name		= "timer6",</div><div class='del'>-	.mpu_irqs	= omap2_timer6_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt6_fck",</div><div class='add'>+static struct omap_hwmod omap2420_mcbsp2_hwmod = {</div><div class='add'>+	.name		= "mcbsp2",</div><div class='add'>+	.class		= &amp;omap2420_mcbsp_hwmod_class,</div><div class='add'>+	.mpu_irqs	= omap2420_mcbsp2_irqs,</div><div class='add'>+	.sdma_reqs	= omap2_mcbsp2_sdma_reqs,</div><div class='add'>+	.main_clk	= "mcbsp2_fck",</div><div class='ctx'> 	.prcm		= {</div><div class='ctx'> 		.omap2 = {</div><div class='ctx'> 			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT6_SHIFT,</div><div class='add'>+			.module_bit = OMAP24XX_EN_MCBSP2_SHIFT,</div><div class='ctx'> 			.module_offs = CORE_MOD,</div><div class='ctx'> 			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2420_timer6_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_timer6_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer7 */</div><div class='del'>-static struct omap_hwmod omap2420_timer7_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer7 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_timer7_hwmod,</div><div class='del'>-	.clk		= "gpt7_ick",</div><div class='del'>-	.addr		= omap2xxx_timer7_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer7 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__timer7,</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = {</div><div class='add'>+	.rev_offs	= 0x3c,</div><div class='add'>+	.sysc_offs	= 0x64,</div><div class='add'>+	.syss_offs	= 0x68,</div><div class='add'>+	.sysc_flags	= (SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer7 hwmod */</div><div class='del'>-static struct omap_hwmod omap2420_timer7_hwmod = {</div><div class='del'>-	.name		= "timer7",</div><div class='del'>-	.mpu_irqs	= omap2_timer7_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt7_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT7_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2420_timer7_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_timer7_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+static struct omap_hwmod_class omap2420_msdi_hwmod_class = {</div><div class='add'>+	.name	= "msdi",</div><div class='add'>+	.sysc	= &amp;omap2420_msdi_sysc,</div><div class='add'>+	.reset	= &amp;omap_msdi_reset,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer8 */</div><div class='del'>-static struct omap_hwmod omap2420_timer8_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer8 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_timer8_hwmod,</div><div class='del'>-	.clk		= "gpt8_ick",</div><div class='del'>-	.addr		= omap2xxx_timer8_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+/* msdi1 */</div><div class='add'>+static struct omap_hwmod_irq_info omap2420_msdi1_irqs[] = {</div><div class='add'>+	{ .irq = 83 },</div><div class='add'>+	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer8 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__timer8,</div><div class='add'>+static struct omap_hwmod_dma_info omap2420_msdi1_sdma_reqs[] = {</div><div class='add'>+	{ .name = "tx", .dma_req = 61 }, /* OMAP24XX_DMA_MMC1_TX */</div><div class='add'>+	{ .name = "rx", .dma_req = 62 }, /* OMAP24XX_DMA_MMC1_RX */</div><div class='add'>+	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer8 hwmod */</div><div class='del'>-static struct omap_hwmod omap2420_timer8_hwmod = {</div><div class='del'>-	.name		= "timer8",</div><div class='del'>-	.mpu_irqs	= omap2_timer8_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt8_fck",</div><div class='add'>+static struct omap_hwmod omap2420_msdi1_hwmod = {</div><div class='add'>+	.name		= "msdi1",</div><div class='add'>+	.class		= &amp;omap2420_msdi_hwmod_class,</div><div class='add'>+	.mpu_irqs	= omap2420_msdi1_irqs,</div><div class='add'>+	.sdma_reqs	= omap2420_msdi1_sdma_reqs,</div><div class='add'>+	.main_clk	= "mmc_fck",</div><div class='ctx'> 	.prcm		= {</div><div class='ctx'> 		.omap2 = {</div><div class='ctx'> 			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT8_SHIFT,</div><div class='add'>+			.module_bit = OMAP2420_EN_MMC_SHIFT,</div><div class='ctx'> 			.module_offs = CORE_MOD,</div><div class='ctx'> 			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,</div><div class='add'>+			.idlest_idle_bit = OMAP2420_ST_MMC_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2420_timer8_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_timer8_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer9 */</div><div class='del'>-static struct omap_hwmod omap2420_timer9_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer9 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_timer9_hwmod,</div><div class='del'>-	.clk		= "gpt9_ick",</div><div class='del'>-	.addr		= omap2xxx_timer9_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer9 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__timer9,</div><div class='add'>+	.flags		= HWMOD_16BIT_REG,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer9 hwmod */</div><div class='del'>-static struct omap_hwmod omap2420_timer9_hwmod = {</div><div class='del'>-	.name		= "timer9",</div><div class='del'>-	.mpu_irqs	= omap2_timer9_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt9_fck",</div><div class='add'>+/* HDQ1W/1-wire */</div><div class='add'>+static struct omap_hwmod omap2420_hdq1w_hwmod = {</div><div class='add'>+	.name		= "hdq1w",</div><div class='add'>+	.mpu_irqs	= omap2_hdq1w_mpu_irqs,</div><div class='add'>+	.main_clk	= "hdq_fck",</div><div class='ctx'> 	.prcm		= {</div><div class='ctx'> 		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT9_SHIFT,</div><div class='ctx'> 			.module_offs = CORE_MOD,</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_HDQ_SHIFT,</div><div class='ctx'> 			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap2420_timer9_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_timer9_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+	.class		= &amp;omap2_hdq1w_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer10 */</div><div class='del'>-static struct omap_hwmod omap2420_timer10_hwmod;</div><div class='add'>+/*</div><div class='add'>+ * interfaces</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-/* l4_core -&gt; timer10 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_timer10_hwmod,</div><div class='del'>-	.clk		= "gpt10_ick",</div><div class='del'>-	.addr		= omap2_timer10_addrs,</div><div class='add'>+/* L4 CORE -&gt; I2C1 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2420_i2c1_hwmod,</div><div class='add'>+	.clk		= "i2c1_ick",</div><div class='add'>+	.addr		= omap2_i2c1_addr_space,</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer10 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__timer10,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer10 hwmod */</div><div class='del'>-static struct omap_hwmod omap2420_timer10_hwmod = {</div><div class='del'>-	.name		= "timer10",</div><div class='del'>-	.mpu_irqs	= omap2_timer10_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt10_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT10_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap2420_timer10_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_timer10_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+/* L4 CORE -&gt; I2C2 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2420_i2c2_hwmod,</div><div class='add'>+	.clk		= "i2c2_ick",</div><div class='add'>+	.addr		= omap2_i2c2_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer11 */</div><div class='del'>-static struct omap_hwmod omap2420_timer11_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer11 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_timer11_hwmod,</div><div class='del'>-	.clk		= "gpt11_ick",</div><div class='del'>-	.addr		= omap2_timer11_addrs,</div><div class='add'>+/* IVA &lt;- L3 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2420_l3__iva = {</div><div class='add'>+	.master		= &amp;omap2xxx_l3_main_hwmod,</div><div class='add'>+	.slave		= &amp;omap2420_iva_hwmod,</div><div class='add'>+	.clk		= "core_l3_ck",</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer11 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__timer11,</div><div class='add'>+/* DSP &lt;- L3 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2420_l3__dsp = {</div><div class='add'>+	.master		= &amp;omap2xxx_l3_main_hwmod,</div><div class='add'>+	.slave		= &amp;omap2420_dsp_hwmod,</div><div class='add'>+	.clk		= "dsp_ick",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer11 hwmod */</div><div class='del'>-static struct omap_hwmod omap2420_timer11_hwmod = {</div><div class='del'>-	.name		= "timer11",</div><div class='del'>-	.mpu_irqs	= omap2_timer11_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt11_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT11_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT,</div><div class='del'>-		},</div><div class='add'>+static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48028000,</div><div class='add'>+		.pa_end		= 0x48028000 + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='ctx'> 	},</div><div class='del'>-	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap2420_timer11_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_timer11_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer12 */</div><div class='del'>-static struct omap_hwmod omap2420_timer12_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer12 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_timer12_hwmod,</div><div class='del'>-	.clk		= "gpt12_ick",</div><div class='del'>-	.addr		= omap2xxx_timer12_addrs,</div><div class='add'>+/* l4_wkup -&gt; timer1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer1_hwmod,</div><div class='add'>+	.clk		= "gpt1_ick",</div><div class='add'>+	.addr		= omap2420_timer1_addrs,</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer12 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__timer12,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer12 hwmod */</div><div class='del'>-static struct omap_hwmod omap2420_timer12_hwmod = {</div><div class='del'>-	.name		= "timer12",</div><div class='del'>-	.mpu_irqs	= omap2xxx_timer12_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt12_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT12_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap2420_timer12_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_timer12_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* l4_wkup -&gt; wd_timer2 */</div><div class='ctx'> static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = {</div><div class='ctx'> 	{</div><div class='hunk'>@@ -744,363 +368,13 @@ static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_wd_timer2_hwmod,</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_wd_timer2_hwmod,</div><div class='ctx'> 	.clk		= "mpu_wdt_ick",</div><div class='ctx'> 	.addr		= omap2420_wd_timer2_addrs,</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* wd_timer2 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_wkup__wd_timer2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_wd_timer2_hwmod = {</div><div class='del'>-	.name		= "wd_timer2",</div><div class='del'>-	.class		= &amp;omap2xxx_wd_timer_hwmod_class,</div><div class='del'>-	.main_clk	= "mpu_wdt_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_MPU_WDT_SHIFT,</div><div class='del'>-			.module_offs = WKUP_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_wd_timer2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_wd_timer2_slaves),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* UART1 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {</div><div class='del'>-	&amp;omap2_l4_core__uart1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_uart1_hwmod = {</div><div class='del'>-	.name		= "uart1",</div><div class='del'>-	.mpu_irqs	= omap2_uart1_mpu_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_uart1_sdma_reqs,</div><div class='del'>-	.main_clk	= "uart1_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_UART1_SHIFT,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_uart1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_uart1_slaves),</div><div class='del'>-	.class		= &amp;omap2_uart_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* UART2 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = {</div><div class='del'>-	&amp;omap2_l4_core__uart2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_uart2_hwmod = {</div><div class='del'>-	.name		= "uart2",</div><div class='del'>-	.mpu_irqs	= omap2_uart2_mpu_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_uart2_sdma_reqs,</div><div class='del'>-	.main_clk	= "uart2_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_UART2_SHIFT,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_uart2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_uart2_slaves),</div><div class='del'>-	.class		= &amp;omap2_uart_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* UART3 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = {</div><div class='del'>-	&amp;omap2_l4_core__uart3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_uart3_hwmod = {</div><div class='del'>-	.name		= "uart3",</div><div class='del'>-	.mpu_irqs	= omap2_uart3_mpu_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_uart3_sdma_reqs,</div><div class='del'>-	.main_clk	= "uart3_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 2,</div><div class='del'>-			.module_bit = OMAP24XX_EN_UART3_SHIFT,</div><div class='del'>-			.idlest_reg_id = 2,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_uart3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_uart3_slaves),</div><div class='del'>-	.class		= &amp;omap2_uart_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss */</div><div class='del'>-/* dss master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = {</div><div class='del'>-	&amp;omap2420_dss__l3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; dss */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__dss = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_dss_core_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_addrs,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_dss_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__dss,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_opt_clk dss_opt_clks[] = {</div><div class='del'>-	/*</div><div class='del'>-	 * The DSS HW needs all DSS clocks enabled during reset. The dss_core</div><div class='del'>-	 * driver does not use these clocks.</div><div class='del'>-	 */</div><div class='del'>-	{ .role = "tv_clk", .clk = "dss_54m_fck" },</div><div class='del'>-	{ .role = "sys_clk", .clk = "dss2_fck" },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_dss_core_hwmod = {</div><div class='del'>-	.name		= "dss_core",</div><div class='del'>-	.class		= &amp;omap2_dss_hwmod_class,</div><div class='del'>-	.main_clk	= "dss1_fck", /* instead of dss_fck */</div><div class='del'>-	.sdma_reqs	= omap2xxx_dss_sdma_chs,</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_DSS1_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.opt_clks	= dss_opt_clks,</div><div class='del'>-	.opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),</div><div class='del'>-	.slaves		= omap2420_dss_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_dss_slaves),</div><div class='del'>-	.masters	= omap2420_dss_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2420_dss_masters),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; dss_dispc */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_dss_dispc_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_dispc_addrs,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_dispc slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__dss_dispc,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_dss_dispc_hwmod = {</div><div class='del'>-	.name		= "dss_dispc",</div><div class='del'>-	.class		= &amp;omap2_dispc_hwmod_class,</div><div class='del'>-	.mpu_irqs	= omap2_dispc_irqs,</div><div class='del'>-	.main_clk	= "dss1_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_DSS1_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_dss_dispc_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_dss_dispc_slaves),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='del'>-	.dev_attr	= &amp;omap2_3_dss_dispc_dev_attr</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; dss_rfbi */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_dss_rfbi_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_rfbi_addrs,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_rfbi slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__dss_rfbi,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {</div><div class='del'>-	{ .role = "ick", .clk = "dss_ick" },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_dss_rfbi_hwmod = {</div><div class='del'>-	.name		= "dss_rfbi",</div><div class='del'>-	.class		= &amp;omap2_rfbi_hwmod_class,</div><div class='del'>-	.main_clk	= "dss1_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_DSS1_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.opt_clks	= dss_rfbi_opt_clks,</div><div class='del'>-	.opt_clks_cnt	= ARRAY_SIZE(dss_rfbi_opt_clks),</div><div class='del'>-	.slaves		= omap2420_dss_rfbi_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_dss_rfbi_slaves),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; dss_venc */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_dss_venc_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_venc_addrs,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_venc slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__dss_venc,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_dss_venc_hwmod = {</div><div class='del'>-	.name		= "dss_venc",</div><div class='del'>-	.class		= &amp;omap2_venc_hwmod_class,</div><div class='del'>-	.main_clk	= "dss_54m_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_DSS1_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_dss_venc_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_dss_venc_slaves),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* I2C common */</div><div class='del'>-static struct omap_hwmod_class_sysconfig i2c_sysc = {</div><div class='del'>-	.rev_offs	= 0x00,</div><div class='del'>-	.sysc_offs	= 0x20,</div><div class='del'>-	.syss_offs	= 0x10,</div><div class='del'>-	.sysc_flags	= (SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),</div><div class='del'>-	.sysc_fields	= &amp;omap_hwmod_sysc_type1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_class i2c_class = {</div><div class='del'>-	.name		= "i2c",</div><div class='del'>-	.sysc		= &amp;i2c_sysc,</div><div class='del'>-	.rev		= OMAP_I2C_IP_VERSION_1,</div><div class='del'>-	.reset		= &amp;omap_i2c_reset,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_i2c_dev_attr i2c_dev_attr = {</div><div class='del'>-	.flags		= OMAP_I2C_FLAG_NO_FIFO |</div><div class='del'>-			  OMAP_I2C_FLAG_SIMPLE_CLOCK |</div><div class='del'>-			  OMAP_I2C_FLAG_16BIT_DATA_REG |</div><div class='del'>-			  OMAP_I2C_FLAG_BUS_SHIFT_2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* I2C1 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__i2c1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_i2c1_hwmod = {</div><div class='del'>-	.name		= "i2c1",</div><div class='del'>-	.mpu_irqs	= omap2_i2c1_mpu_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_i2c1_sdma_reqs,</div><div class='del'>-	.main_clk	= "i2c1_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP2420_EN_I2C1_SHIFT,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP2420_ST_I2C1_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_i2c1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_i2c1_slaves),</div><div class='del'>-	.class		= &amp;i2c_class,</div><div class='del'>-	.dev_attr	= &amp;i2c_dev_attr,</div><div class='del'>-	.flags		= HWMOD_16BIT_REG,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* I2C2 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__i2c2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_i2c2_hwmod = {</div><div class='del'>-	.name		= "i2c2",</div><div class='del'>-	.mpu_irqs	= omap2_i2c2_mpu_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_i2c2_sdma_reqs,</div><div class='del'>-	.main_clk	= "i2c2_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP2420_EN_I2C2_SHIFT,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP2420_ST_I2C2_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_i2c2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_i2c2_slaves),</div><div class='del'>-	.class		= &amp;i2c_class,</div><div class='del'>-	.dev_attr	= &amp;i2c_dev_attr,</div><div class='del'>-	.flags		= HWMOD_16BIT_REG,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* l4_wkup -&gt; gpio1 */</div><div class='ctx'> static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = {</div><div class='ctx'> 	{</div><div class='hunk'>@@ -1112,8 +386,8 @@ static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_gpio1_hwmod,</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_gpio1_hwmod,</div><div class='ctx'> 	.clk		= "gpios_ick",</div><div class='ctx'> 	.addr		= omap2420_gpio1_addr_space,</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='hunk'>@@ -1130,8 +404,8 @@ static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_gpio2_hwmod,</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_gpio2_hwmod,</div><div class='ctx'> 	.clk		= "gpios_ick",</div><div class='ctx'> 	.addr		= omap2420_gpio2_addr_space,</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='hunk'>@@ -1148,8 +422,8 @@ static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_gpio3_hwmod,</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_gpio3_hwmod,</div><div class='ctx'> 	.clk		= "gpios_ick",</div><div class='ctx'> 	.addr		= omap2420_gpio3_addr_space,</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='hunk'>@@ -1166,408 +440,150 @@ static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_gpio4_hwmod,</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_gpio4_hwmod,</div><div class='ctx'> 	.clk		= "gpios_ick",</div><div class='ctx'> 	.addr		= omap2420_gpio4_addr_space,</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* gpio dev_attr */</div><div class='del'>-static struct omap_gpio_dev_attr gpio_dev_attr = {</div><div class='del'>-	.bank_width = 32,</div><div class='del'>-	.dbck_flag = false,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio1 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_wkup__gpio1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_gpio1_hwmod = {</div><div class='del'>-	.name		= "gpio1",</div><div class='del'>-	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='del'>-	.mpu_irqs	= omap2_gpio1_irqs,</div><div class='del'>-	.main_clk	= "gpios_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='del'>-			.module_offs = WKUP_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_gpio1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_gpio1_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='del'>-	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio2 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_wkup__gpio2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_gpio2_hwmod = {</div><div class='del'>-	.name		= "gpio2",</div><div class='del'>-	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='del'>-	.mpu_irqs	= omap2_gpio2_irqs,</div><div class='del'>-	.main_clk	= "gpios_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='del'>-			.module_offs = WKUP_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_gpio2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_gpio2_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='del'>-	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio3 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_wkup__gpio3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_gpio3_hwmod = {</div><div class='del'>-	.name		= "gpio3",</div><div class='del'>-	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='del'>-	.mpu_irqs	= omap2_gpio3_irqs,</div><div class='del'>-	.main_clk	= "gpios_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='del'>-			.module_offs = WKUP_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_gpio3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_gpio3_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='del'>-	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio4 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_wkup__gpio4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_gpio4_hwmod = {</div><div class='del'>-	.name		= "gpio4",</div><div class='del'>-	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='del'>-	.mpu_irqs	= omap2_gpio4_irqs,</div><div class='del'>-	.main_clk	= "gpios_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='del'>-			.module_offs = WKUP_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_gpio4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_gpio4_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='del'>-	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dma attributes */</div><div class='del'>-static struct omap_dma_dev_attr dma_dev_attr = {</div><div class='del'>-	.dev_caps  = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |</div><div class='del'>-						IS_CSSA_32 | IS_CDSA_32,</div><div class='del'>-	.lch_count = 32,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* dma_system -&gt; L3 */</div><div class='ctx'> static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {</div><div class='ctx'> 	.master		= &amp;omap2420_dma_system_hwmod,</div><div class='del'>-	.slave		= &amp;omap2420_l3_main_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_l3_main_hwmod,</div><div class='ctx'> 	.clk		= "core_l3_ck",</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* dma_system master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_dma_system_masters[] = {</div><div class='del'>-	&amp;omap2420_dma_system__l3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* l4_core -&gt; dma_system */</div><div class='ctx'> static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='ctx'> 	.slave		= &amp;omap2420_dma_system_hwmod,</div><div class='ctx'> 	.clk		= "sdma_ick",</div><div class='ctx'> 	.addr		= omap2_dma_system_addrs,</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* dma_system slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__dma_system,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_dma_system_hwmod = {</div><div class='del'>-	.name		= "dma",</div><div class='del'>-	.class		= &amp;omap2xxx_dma_hwmod_class,</div><div class='del'>-	.mpu_irqs	= omap2_dma_system_irqs,</div><div class='del'>-	.main_clk	= "core_l3_ck",</div><div class='del'>-	.slaves		= omap2420_dma_system_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_dma_system_slaves),</div><div class='del'>-	.masters	= omap2420_dma_system_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2420_dma_system_masters),</div><div class='del'>-	.dev_attr	= &amp;dma_dev_attr,</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mailbox */</div><div class='del'>-static struct omap_hwmod omap2420_mailbox_hwmod;</div><div class='del'>-static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {</div><div class='del'>-	{ .name = "dsp", .irq = 26 },</div><div class='del'>-	{ .name = "iva", .irq = 34 },</div><div class='del'>-	{ .irq = -1 }</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* l4_core -&gt; mailbox */</div><div class='ctx'> static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='ctx'> 	.slave		= &amp;omap2420_mailbox_hwmod,</div><div class='ctx'> 	.addr		= omap2_mailbox_addrs,</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* mailbox slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_mailbox_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__mailbox,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_mailbox_hwmod = {</div><div class='del'>-	.name		= "mailbox",</div><div class='del'>-	.class		= &amp;omap2xxx_mailbox_hwmod_class,</div><div class='del'>-	.mpu_irqs	= omap2420_mailbox_irqs,</div><div class='del'>-	.main_clk	= "mailboxes_ick",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_MAILBOXES_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_mailbox_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_mailbox_slaves),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcspi1 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__mcspi1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {</div><div class='del'>-	.num_chipselect = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_mcspi1_hwmod = {</div><div class='del'>-	.name		= "mcspi1_hwmod",</div><div class='del'>-	.mpu_irqs	= omap2_mcspi1_mpu_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_mcspi1_sdma_reqs,</div><div class='del'>-	.main_clk	= "mcspi1_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_MCSPI1_SHIFT,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_mcspi1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_mcspi1_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_mcspi_class,</div><div class='del'>-	.dev_attr	= &amp;omap_mcspi1_dev_attr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcspi2 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__mcspi2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {</div><div class='del'>-	.num_chipselect = 2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_mcspi2_hwmod = {</div><div class='del'>-	.name		= "mcspi2_hwmod",</div><div class='del'>-	.mpu_irqs	= omap2_mcspi2_mpu_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_mcspi2_sdma_reqs,</div><div class='del'>-	.main_clk	= "mcspi2_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_MCSPI2_SHIFT,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_mcspi2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_mcspi2_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_mcspi_class,</div><div class='del'>-	.dev_attr	= &amp;omap_mcspi2_dev_attr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 'mcbsp' class</div><div class='del'>- * multi channel buffered serial port controller</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = {</div><div class='del'>-	.name = "mcbsp",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp1 */</div><div class='del'>-static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {</div><div class='del'>-	{ .name = "tx", .irq = 59 },</div><div class='del'>-	{ .name = "rx", .irq = 60 },</div><div class='del'>-	{ .irq = -1 }</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* l4_core -&gt; mcbsp1 */</div><div class='ctx'> static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='ctx'> 	.slave		= &amp;omap2420_mcbsp1_hwmod,</div><div class='ctx'> 	.clk		= "mcbsp1_ick",</div><div class='ctx'> 	.addr		= omap2_mcbsp1_addrs,</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* mcbsp1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_mcbsp1_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__mcbsp1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_mcbsp1_hwmod = {</div><div class='del'>-	.name		= "mcbsp1",</div><div class='del'>-	.class		= &amp;omap2420_mcbsp_hwmod_class,</div><div class='del'>-	.mpu_irqs	= omap2420_mcbsp1_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_mcbsp1_sdma_reqs,</div><div class='del'>-	.main_clk	= "mcbsp1_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_MCBSP1_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2420_mcbsp1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_mcbsp1_slaves),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp2 */</div><div class='del'>-static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = {</div><div class='del'>-	{ .name = "tx", .irq = 62 },</div><div class='del'>-	{ .name = "rx", .irq = 63 },</div><div class='del'>-	{ .irq = -1 }</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* l4_core -&gt; mcbsp2 */</div><div class='ctx'> static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = {</div><div class='del'>-	.master		= &amp;omap2420_l4_core_hwmod,</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='ctx'> 	.slave		= &amp;omap2420_mcbsp2_hwmod,</div><div class='ctx'> 	.clk		= "mcbsp2_ick",</div><div class='ctx'> 	.addr		= omap2xxx_mcbsp2_addrs,</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* mcbsp2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2420_mcbsp2_slaves[] = {</div><div class='del'>-	&amp;omap2420_l4_core__mcbsp2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2420_mcbsp2_hwmod = {</div><div class='del'>-	.name		= "mcbsp2",</div><div class='del'>-	.class		= &amp;omap2420_mcbsp_hwmod_class,</div><div class='del'>-	.mpu_irqs	= omap2420_mcbsp2_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_mcbsp2_sdma_reqs,</div><div class='del'>-	.main_clk	= "mcbsp2_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_MCBSP2_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,</div><div class='del'>-		},</div><div class='add'>+static struct omap_hwmod_addr_space omap2420_msdi1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4809c000,</div><div class='add'>+		.pa_end		= 0x4809c000 + SZ_128 - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT,</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap2420_mcbsp2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2420_mcbsp2_slaves),</div><div class='add'>+	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static __initdata struct omap_hwmod *omap2420_hwmods[] = {</div><div class='del'>-	&amp;omap2420_l3_main_hwmod,</div><div class='del'>-	&amp;omap2420_l4_core_hwmod,</div><div class='del'>-	&amp;omap2420_l4_wkup_hwmod,</div><div class='del'>-	&amp;omap2420_mpu_hwmod,</div><div class='del'>-	&amp;omap2420_iva_hwmod,</div><div class='del'>-</div><div class='del'>-	&amp;omap2420_timer1_hwmod,</div><div class='del'>-	&amp;omap2420_timer2_hwmod,</div><div class='del'>-	&amp;omap2420_timer3_hwmod,</div><div class='del'>-	&amp;omap2420_timer4_hwmod,</div><div class='del'>-	&amp;omap2420_timer5_hwmod,</div><div class='del'>-	&amp;omap2420_timer6_hwmod,</div><div class='del'>-	&amp;omap2420_timer7_hwmod,</div><div class='del'>-	&amp;omap2420_timer8_hwmod,</div><div class='del'>-	&amp;omap2420_timer9_hwmod,</div><div class='del'>-	&amp;omap2420_timer10_hwmod,</div><div class='del'>-	&amp;omap2420_timer11_hwmod,</div><div class='del'>-	&amp;omap2420_timer12_hwmod,</div><div class='del'>-</div><div class='del'>-	&amp;omap2420_wd_timer2_hwmod,</div><div class='del'>-	&amp;omap2420_uart1_hwmod,</div><div class='del'>-	&amp;omap2420_uart2_hwmod,</div><div class='del'>-	&amp;omap2420_uart3_hwmod,</div><div class='del'>-	/* dss class */</div><div class='del'>-	&amp;omap2420_dss_core_hwmod,</div><div class='del'>-	&amp;omap2420_dss_dispc_hwmod,</div><div class='del'>-	&amp;omap2420_dss_rfbi_hwmod,</div><div class='del'>-	&amp;omap2420_dss_venc_hwmod,</div><div class='del'>-	/* i2c class */</div><div class='del'>-	&amp;omap2420_i2c1_hwmod,</div><div class='del'>-	&amp;omap2420_i2c2_hwmod,</div><div class='add'>+/* l4_core -&gt; msdi1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2420_l4_core__msdi1 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2420_msdi1_hwmod,</div><div class='add'>+	.clk		= "mmc_ick",</div><div class='add'>+	.addr		= omap2420_msdi1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* gpio class */</div><div class='del'>-	&amp;omap2420_gpio1_hwmod,</div><div class='del'>-	&amp;omap2420_gpio2_hwmod,</div><div class='del'>-	&amp;omap2420_gpio3_hwmod,</div><div class='del'>-	&amp;omap2420_gpio4_hwmod,</div><div class='add'>+/* l4_core -&gt; hdq1w interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2420_l4_core__hdq1w = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2420_hdq1w_hwmod,</div><div class='add'>+	.clk		= "hdq_ick",</div><div class='add'>+	.addr		= omap2_hdq1w_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+	.flags		= OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* dma_system class*/</div><div class='del'>-	&amp;omap2420_dma_system_hwmod,</div><div class='ctx'> </div><div class='del'>-	/* mailbox class */</div><div class='del'>-	&amp;omap2420_mailbox_hwmod,</div><div class='add'>+/* l4_wkup -&gt; 32ksync_counter */</div><div class='add'>+static struct omap_hwmod_addr_space omap2420_counter_32k_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48004000,</div><div class='add'>+		.pa_end		= 0x4800401f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* mcbsp class */</div><div class='del'>-	&amp;omap2420_mcbsp1_hwmod,</div><div class='del'>-	&amp;omap2420_mcbsp2_hwmod,</div><div class='add'>+static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_counter_32k_hwmod,</div><div class='add'>+	.clk		= "sync_32k_ick",</div><div class='add'>+	.addr		= omap2420_counter_32k_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* mcspi class */</div><div class='del'>-	&amp;omap2420_mcspi1_hwmod,</div><div class='del'>-	&amp;omap2420_mcspi2_hwmod,</div><div class='add'>+static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap2xxx_l3_main__l4_core,</div><div class='add'>+	&amp;omap2xxx_mpu__l3_main,</div><div class='add'>+	&amp;omap2xxx_dss__l3,</div><div class='add'>+	&amp;omap2xxx_l4_core__mcspi1,</div><div class='add'>+	&amp;omap2xxx_l4_core__mcspi2,</div><div class='add'>+	&amp;omap2xxx_l4_core__l4_wkup,</div><div class='add'>+	&amp;omap2_l4_core__uart1,</div><div class='add'>+	&amp;omap2_l4_core__uart2,</div><div class='add'>+	&amp;omap2_l4_core__uart3,</div><div class='add'>+	&amp;omap2420_l4_core__i2c1,</div><div class='add'>+	&amp;omap2420_l4_core__i2c2,</div><div class='add'>+	&amp;omap2420_l3__iva,</div><div class='add'>+	&amp;omap2420_l3__dsp,</div><div class='add'>+	&amp;omap2420_l4_wkup__timer1,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer2,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer3,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer4,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer5,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer6,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer7,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer8,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer9,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer10,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer11,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer12,</div><div class='add'>+	&amp;omap2420_l4_wkup__wd_timer2,</div><div class='add'>+	&amp;omap2xxx_l4_core__dss,</div><div class='add'>+	&amp;omap2xxx_l4_core__dss_dispc,</div><div class='add'>+	&amp;omap2xxx_l4_core__dss_rfbi,</div><div class='add'>+	&amp;omap2xxx_l4_core__dss_venc,</div><div class='add'>+	&amp;omap2420_l4_wkup__gpio1,</div><div class='add'>+	&amp;omap2420_l4_wkup__gpio2,</div><div class='add'>+	&amp;omap2420_l4_wkup__gpio3,</div><div class='add'>+	&amp;omap2420_l4_wkup__gpio4,</div><div class='add'>+	&amp;omap2420_dma_system__l3,</div><div class='add'>+	&amp;omap2420_l4_core__dma_system,</div><div class='add'>+	&amp;omap2420_l4_core__mailbox,</div><div class='add'>+	&amp;omap2420_l4_core__mcbsp1,</div><div class='add'>+	&amp;omap2420_l4_core__mcbsp2,</div><div class='add'>+	&amp;omap2420_l4_core__msdi1,</div><div class='add'>+	&amp;omap2420_l4_core__hdq1w,</div><div class='add'>+	&amp;omap2420_l4_wkup__counter_32k,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int __init omap2420_hwmod_init(void)</div><div class='ctx'> {</div><div class='del'>-	return omap_hwmod_register(omap2420_hwmods);</div><div class='add'>+	return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c<br/>index 04a3885f4475..4d7264981230 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2430_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap_hwmod_2430_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2430_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_2430_data.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'>  * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009-2011 Nokia Corporation</div><div class='add'>+ * Copyright (C) 2012 Texas Instruments, Inc.</div><div class='ctx'>  * Paul Walmsley</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='hunk'>@@ -33,1044 +34,29 @@</div><div class='ctx'> /*</div><div class='ctx'>  * OMAP2430 hardware module integration data</div><div class='ctx'>  *</div><div class='del'>- * ALl of the data in this section should be autogeneratable from the</div><div class='add'>+ * All of the data in this section should be autogeneratable from the</div><div class='ctx'>  * TI hardware database or other technical documentation.  Data that</div><div class='ctx'>  * is driver-specific or driver-kernel integration-specific belongs</div><div class='ctx'>  * elsewhere.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap2430_mpu_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_iva_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_l3_main_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_l4_core_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_dss_core_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_dss_dispc_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_dss_rfbi_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_dss_venc_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_wd_timer2_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_gpio1_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_gpio2_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_gpio3_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_gpio4_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_gpio5_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_dma_system_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_mcbsp1_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_mcbsp2_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_mcbsp3_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_mcbsp4_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_mcbsp5_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_mcspi1_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_mcspi2_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_mcspi3_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_mmc1_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_mmc2_hwmod;</div><div class='del'>-</div><div class='del'>-/* L3 -&gt; L4_CORE interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {</div><div class='del'>-	.master	= &amp;omap2430_l3_main_hwmod,</div><div class='del'>-	.slave	= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* MPU -&gt; L3 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = {</div><div class='del'>-	.master = &amp;omap2430_mpu_hwmod,</div><div class='del'>-	.slave	= &amp;omap2430_l3_main_hwmod,</div><div class='del'>-	.user	= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Slave interfaces on the L3 interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = {</div><div class='del'>-	&amp;omap2430_mpu__l3_main,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* DSS -&gt; l3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_dss__l3 = {</div><div class='del'>-	.master		= &amp;omap2430_dss_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_l3_main_hwmod,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l3_perm_bit  = OMAP2_L3_CORE_FW_CONNID_DSS,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L3,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Master interfaces on the L3 interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = {</div><div class='del'>-	&amp;omap2430_l3_main__l4_core,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L3 */</div><div class='del'>-static struct omap_hwmod omap2430_l3_main_hwmod = {</div><div class='del'>-	.name		= "l3_main",</div><div class='del'>-	.class		= &amp;l3_hwmod_class,</div><div class='del'>-	.masters	= omap2430_l3_main_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2430_l3_main_masters),</div><div class='del'>-	.slaves		= omap2430_l3_main_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_l3_main_slaves),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_l4_wkup_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_uart1_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_uart2_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_uart3_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_i2c1_hwmod;</div><div class='del'>-static struct omap_hwmod omap2430_i2c2_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_usbhsotg_hwmod;</div><div class='del'>-</div><div class='del'>-/* l3_core -&gt; usbhsotg  interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = {</div><div class='del'>-	.master		= &amp;omap2430_usbhsotg_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_l3_main_hwmod,</div><div class='del'>-	.clk		= "core_l3_ck",</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; I2C1 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_i2c1_hwmod,</div><div class='del'>-	.clk		= "i2c1_ick",</div><div class='del'>-	.addr		= omap2_i2c1_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; I2C2 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_i2c2_hwmod,</div><div class='del'>-	.clk		= "i2c2_ick",</div><div class='del'>-	.addr		= omap2_i2c2_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4_CORE -&gt; L4_WKUP interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {</div><div class='del'>-	.master	= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave	= &amp;omap2430_l4_wkup_hwmod,</div><div class='del'>-	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; UART1 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_uart1_hwmod,</div><div class='del'>-	.clk		= "uart1_ick",</div><div class='del'>-	.addr		= omap2xxx_uart1_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; UART2 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_uart2_hwmod,</div><div class='del'>-	.clk		= "uart2_ick",</div><div class='del'>-	.addr		= omap2xxx_uart2_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 PER -&gt; UART3 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_uart3_hwmod,</div><div class='del'>-	.clk		= "uart3_ick",</div><div class='del'>-	.addr		= omap2xxx_uart3_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-* usbhsotg interface data</div><div class='del'>-*/</div><div class='del'>-static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= OMAP243X_HS_BASE,</div><div class='del'>-		.pa_end		= OMAP243X_HS_BASE + SZ_4K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*  l4_core -&gt;usbhsotg  interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_usbhsotg_hwmod,</div><div class='del'>-	.clk		= "usb_l4_ick",</div><div class='del'>-	.addr		= omap2430_usbhsotg_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_usbhsotg_masters[] = {</div><div class='del'>-	&amp;omap2430_usbhsotg__l3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__usbhsotg,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; MMC1 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_mmc1_hwmod,</div><div class='del'>-	.clk		= "mmchs1_ick",</div><div class='del'>-	.addr		= omap2430_mmc1_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; MMC2 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_mmc2_hwmod,</div><div class='del'>-	.clk		= "mmchs2_ick",</div><div class='del'>-	.addr		= omap2430_mmc2_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Slave interfaces on the L4_CORE interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {</div><div class='del'>-	&amp;omap2430_l3_main__l4_core,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Master interfaces on the L4_CORE interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {</div><div class='del'>-	&amp;omap2430_l4_core__l4_wkup,</div><div class='del'>-	&amp;omap2430_l4_core__mmc1,</div><div class='del'>-	&amp;omap2430_l4_core__mmc2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE */</div><div class='del'>-static struct omap_hwmod omap2430_l4_core_hwmod = {</div><div class='del'>-	.name		= "l4_core",</div><div class='del'>-	.class		= &amp;l4_hwmod_class,</div><div class='del'>-	.masters	= omap2430_l4_core_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2430_l4_core_masters),</div><div class='del'>-	.slaves		= omap2430_l4_core_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_l4_core_slaves),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Slave interfaces on the L4_WKUP interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__l4_wkup,</div><div class='del'>-	&amp;omap2_l4_core__uart1,</div><div class='del'>-	&amp;omap2_l4_core__uart2,</div><div class='del'>-	&amp;omap2_l4_core__uart3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Master interfaces on the L4_WKUP interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4 core -&gt; mcspi1 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_mcspi1_hwmod,</div><div class='del'>-	.clk		= "mcspi1_ick",</div><div class='del'>-	.addr		= omap2_mcspi1_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4 core -&gt; mcspi2 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_mcspi2_hwmod,</div><div class='del'>-	.clk		= "mcspi2_ick",</div><div class='del'>-	.addr		= omap2_mcspi2_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4 core -&gt; mcspi3 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_mcspi3_hwmod,</div><div class='del'>-	.clk		= "mcspi3_ick",</div><div class='del'>-	.addr		= omap2430_mcspi3_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 WKUP */</div><div class='del'>-static struct omap_hwmod omap2430_l4_wkup_hwmod = {</div><div class='del'>-	.name		= "l4_wkup",</div><div class='del'>-	.class		= &amp;l4_hwmod_class,</div><div class='del'>-	.masters	= omap2430_l4_wkup_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2430_l4_wkup_masters),</div><div class='del'>-	.slaves		= omap2430_l4_wkup_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_l4_wkup_slaves),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Master interfaces on the MPU device */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {</div><div class='del'>-	&amp;omap2430_mpu__l3_main,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* MPU */</div><div class='del'>-static struct omap_hwmod omap2430_mpu_hwmod = {</div><div class='del'>-	.name		= "mpu",</div><div class='del'>-	.class		= &amp;mpu_hwmod_class,</div><div class='del'>-	.main_clk	= "mpu_ck",</div><div class='del'>-	.masters	= omap2430_mpu_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2430_mpu_masters),</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /*</div><div class='del'>- * IVA2_1 interface data</div><div class='add'>+ * IP blocks</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/* IVA2 &lt;- L3 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l3__iva = {</div><div class='del'>-	.master		= &amp;omap2430_l3_main_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_iva_hwmod,</div><div class='del'>-	.clk		= "dsp_fck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = {</div><div class='del'>-	&amp;omap2430_l3__iva,</div><div class='add'>+/* IVA2 (IVA2) */</div><div class='add'>+static struct omap_hwmod_rst_info omap2430_iva_resets[] = {</div><div class='add'>+	{ .name = "logic", .rst_shift = 0 },</div><div class='add'>+	{ .name = "mmu", .rst_shift = 1 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * IVA2 (IVA2)</div><div class='del'>- */</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2430_iva_hwmod = {</div><div class='ctx'> 	.name		= "iva",</div><div class='ctx'> 	.class		= &amp;iva_hwmod_class,</div><div class='del'>-	.masters	= omap2430_iva_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2430_iva_masters),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* always-on timers dev attribute */</div><div class='del'>-static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {</div><div class='del'>-	.timer_capability       = OMAP_TIMER_ALWON,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* pwm timers dev attribute */</div><div class='del'>-static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {</div><div class='del'>-	.timer_capability       = OMAP_TIMER_HAS_PWM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer1 */</div><div class='del'>-static struct omap_hwmod omap2430_timer1_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49018000,</div><div class='del'>-		.pa_end		= 0x49018000 + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_wkup -&gt; timer1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_timer1_hwmod,</div><div class='del'>-	.clk		= "gpt1_ick",</div><div class='del'>-	.addr		= omap2430_timer1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer1 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_wkup__timer1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer1 hwmod */</div><div class='del'>-static struct omap_hwmod omap2430_timer1_hwmod = {</div><div class='del'>-	.name		= "timer1",</div><div class='del'>-	.mpu_irqs	= omap2_timer1_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt1_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT1_SHIFT,</div><div class='del'>-			.module_offs = WKUP_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2430_timer1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_timer1_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer2 */</div><div class='del'>-static struct omap_hwmod omap2430_timer2_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_timer2_hwmod,</div><div class='del'>-	.clk		= "gpt2_ick",</div><div class='del'>-	.addr		= omap2xxx_timer2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer2 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__timer2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer2 hwmod */</div><div class='del'>-static struct omap_hwmod omap2430_timer2_hwmod = {</div><div class='del'>-	.name		= "timer2",</div><div class='del'>-	.mpu_irqs	= omap2_timer2_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt2_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT2_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2430_timer2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_timer2_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer3 */</div><div class='del'>-static struct omap_hwmod omap2430_timer3_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_timer3_hwmod,</div><div class='del'>-	.clk		= "gpt3_ick",</div><div class='del'>-	.addr		= omap2xxx_timer3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer3 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__timer3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer3 hwmod */</div><div class='del'>-static struct omap_hwmod omap2430_timer3_hwmod = {</div><div class='del'>-	.name		= "timer3",</div><div class='del'>-	.mpu_irqs	= omap2_timer3_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt3_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT3_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2430_timer3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_timer3_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer4 */</div><div class='del'>-static struct omap_hwmod omap2430_timer4_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer4 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_timer4_hwmod,</div><div class='del'>-	.clk		= "gpt4_ick",</div><div class='del'>-	.addr		= omap2xxx_timer4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer4 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__timer4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer4 hwmod */</div><div class='del'>-static struct omap_hwmod omap2430_timer4_hwmod = {</div><div class='del'>-	.name		= "timer4",</div><div class='del'>-	.mpu_irqs	= omap2_timer4_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt4_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT4_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2430_timer4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_timer4_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer5 */</div><div class='del'>-static struct omap_hwmod omap2430_timer5_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer5 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_timer5_hwmod,</div><div class='del'>-	.clk		= "gpt5_ick",</div><div class='del'>-	.addr		= omap2xxx_timer5_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer5 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__timer5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer5 hwmod */</div><div class='del'>-static struct omap_hwmod omap2430_timer5_hwmod = {</div><div class='del'>-	.name		= "timer5",</div><div class='del'>-	.mpu_irqs	= omap2_timer5_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt5_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT5_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2430_timer5_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_timer5_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer6 */</div><div class='del'>-static struct omap_hwmod omap2430_timer6_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer6 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_timer6_hwmod,</div><div class='del'>-	.clk		= "gpt6_ick",</div><div class='del'>-	.addr		= omap2xxx_timer6_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer6 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__timer6,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer6 hwmod */</div><div class='del'>-static struct omap_hwmod omap2430_timer6_hwmod = {</div><div class='del'>-	.name		= "timer6",</div><div class='del'>-	.mpu_irqs	= omap2_timer6_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt6_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT6_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2430_timer6_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_timer6_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer7 */</div><div class='del'>-static struct omap_hwmod omap2430_timer7_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer7 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_timer7_hwmod,</div><div class='del'>-	.clk		= "gpt7_ick",</div><div class='del'>-	.addr		= omap2xxx_timer7_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer7 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__timer7,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer7 hwmod */</div><div class='del'>-static struct omap_hwmod omap2430_timer7_hwmod = {</div><div class='del'>-	.name		= "timer7",</div><div class='del'>-	.mpu_irqs	= omap2_timer7_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt7_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT7_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2430_timer7_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_timer7_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer8 */</div><div class='del'>-static struct omap_hwmod omap2430_timer8_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer8 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_timer8_hwmod,</div><div class='del'>-	.clk		= "gpt8_ick",</div><div class='del'>-	.addr		= omap2xxx_timer8_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer8 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__timer8,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer8 hwmod */</div><div class='del'>-static struct omap_hwmod omap2430_timer8_hwmod = {</div><div class='del'>-	.name		= "timer8",</div><div class='del'>-	.mpu_irqs	= omap2_timer8_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt8_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT8_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap2430_timer8_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_timer8_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer9 */</div><div class='del'>-static struct omap_hwmod omap2430_timer9_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer9 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_timer9_hwmod,</div><div class='del'>-	.clk		= "gpt9_ick",</div><div class='del'>-	.addr		= omap2xxx_timer9_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer9 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__timer9,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer9 hwmod */</div><div class='del'>-static struct omap_hwmod omap2430_timer9_hwmod = {</div><div class='del'>-	.name		= "timer9",</div><div class='del'>-	.mpu_irqs	= omap2_timer9_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt9_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT9_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap2430_timer9_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_timer9_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer10 */</div><div class='del'>-static struct omap_hwmod omap2430_timer10_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer10 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_timer10_hwmod,</div><div class='del'>-	.clk		= "gpt10_ick",</div><div class='del'>-	.addr		= omap2_timer10_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer10 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__timer10,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer10 hwmod */</div><div class='del'>-static struct omap_hwmod omap2430_timer10_hwmod = {</div><div class='del'>-	.name		= "timer10",</div><div class='del'>-	.mpu_irqs	= omap2_timer10_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt10_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT10_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap2430_timer10_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_timer10_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer11 */</div><div class='del'>-static struct omap_hwmod omap2430_timer11_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer11 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_timer11_hwmod,</div><div class='del'>-	.clk		= "gpt11_ick",</div><div class='del'>-	.addr		= omap2_timer11_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer11 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__timer11,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer11 hwmod */</div><div class='del'>-static struct omap_hwmod omap2430_timer11_hwmod = {</div><div class='del'>-	.name		= "timer11",</div><div class='del'>-	.mpu_irqs	= omap2_timer11_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt11_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT11_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap2430_timer11_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_timer11_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer12 */</div><div class='del'>-static struct omap_hwmod omap2430_timer12_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer12 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_timer12_hwmod,</div><div class='del'>-	.clk		= "gpt12_ick",</div><div class='del'>-	.addr		= omap2xxx_timer12_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer12 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__timer12,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer12 hwmod */</div><div class='del'>-static struct omap_hwmod omap2430_timer12_hwmod = {</div><div class='del'>-	.name		= "timer12",</div><div class='del'>-	.mpu_irqs	= omap2xxx_timer12_mpu_irqs,</div><div class='del'>-	.main_clk	= "gpt12_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPT12_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap2430_timer12_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_timer12_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_wkup -&gt; wd_timer2 */</div><div class='del'>-static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49016000,</div><div class='del'>-		.pa_end		= 0x4901607f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_wd_timer2_hwmod,</div><div class='del'>-	.clk		= "mpu_wdt_ick",</div><div class='del'>-	.addr		= omap2430_wd_timer2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* wd_timer2 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_wkup__wd_timer2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_wd_timer2_hwmod = {</div><div class='del'>-	.name		= "wd_timer2",</div><div class='del'>-	.class		= &amp;omap2xxx_wd_timer_hwmod_class,</div><div class='del'>-	.main_clk	= "mpu_wdt_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_MPU_WDT_SHIFT,</div><div class='del'>-			.module_offs = WKUP_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2430_wd_timer2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_wd_timer2_slaves),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* UART1 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {</div><div class='del'>-	&amp;omap2_l4_core__uart1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_uart1_hwmod = {</div><div class='del'>-	.name		= "uart1",</div><div class='del'>-	.mpu_irqs	= omap2_uart1_mpu_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_uart1_sdma_reqs,</div><div class='del'>-	.main_clk	= "uart1_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_UART1_SHIFT,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2430_uart1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_uart1_slaves),</div><div class='del'>-	.class		= &amp;omap2_uart_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* UART2 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {</div><div class='del'>-	&amp;omap2_l4_core__uart2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_uart2_hwmod = {</div><div class='del'>-	.name		= "uart2",</div><div class='del'>-	.mpu_irqs	= omap2_uart2_mpu_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_uart2_sdma_reqs,</div><div class='del'>-	.main_clk	= "uart2_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_UART2_SHIFT,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2430_uart2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_uart2_slaves),</div><div class='del'>-	.class		= &amp;omap2_uart_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* UART3 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {</div><div class='del'>-	&amp;omap2_l4_core__uart3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_uart3_hwmod = {</div><div class='del'>-	.name		= "uart3",</div><div class='del'>-	.mpu_irqs	= omap2_uart3_mpu_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_uart3_sdma_reqs,</div><div class='del'>-	.main_clk	= "uart3_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 2,</div><div class='del'>-			.module_bit = OMAP24XX_EN_UART3_SHIFT,</div><div class='del'>-			.idlest_reg_id = 2,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2430_uart3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_uart3_slaves),</div><div class='del'>-	.class		= &amp;omap2_uart_class,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss */</div><div class='del'>-/* dss master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = {</div><div class='del'>-	&amp;omap2430_dss__l3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; dss */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__dss = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_dss_core_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__dss,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_opt_clk dss_opt_clks[] = {</div><div class='del'>-	/*</div><div class='del'>-	 * The DSS HW needs all DSS clocks enabled during reset. The dss_core</div><div class='del'>-	 * driver does not use these clocks.</div><div class='del'>-	 */</div><div class='del'>-	{ .role = "tv_clk", .clk = "dss_54m_fck" },</div><div class='del'>-	{ .role = "sys_clk", .clk = "dss2_fck" },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_dss_core_hwmod = {</div><div class='del'>-	.name		= "dss_core",</div><div class='del'>-	.class		= &amp;omap2_dss_hwmod_class,</div><div class='del'>-	.main_clk	= "dss1_fck", /* instead of dss_fck */</div><div class='del'>-	.sdma_reqs	= omap2xxx_dss_sdma_chs,</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_DSS1_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.opt_clks	= dss_opt_clks,</div><div class='del'>-	.opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),</div><div class='del'>-	.slaves		= omap2430_dss_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_dss_slaves),</div><div class='del'>-	.masters	= omap2430_dss_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2430_dss_masters),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; dss_dispc */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_dss_dispc_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_dispc_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_dispc slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__dss_dispc,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_dss_dispc_hwmod = {</div><div class='del'>-	.name		= "dss_dispc",</div><div class='del'>-	.class		= &amp;omap2_dispc_hwmod_class,</div><div class='del'>-	.mpu_irqs	= omap2_dispc_irqs,</div><div class='del'>-	.main_clk	= "dss1_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_DSS1_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2430_dss_dispc_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_dss_dispc_slaves),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='del'>-	.dev_attr	= &amp;omap2_3_dss_dispc_dev_attr</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; dss_rfbi */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_dss_rfbi_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_rfbi_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_rfbi slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__dss_rfbi,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {</div><div class='del'>-	{ .role = "ick", .clk = "dss_ick" },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_dss_rfbi_hwmod = {</div><div class='del'>-	.name		= "dss_rfbi",</div><div class='del'>-	.class		= &amp;omap2_rfbi_hwmod_class,</div><div class='del'>-	.main_clk	= "dss1_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_DSS1_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.opt_clks	= dss_rfbi_opt_clks,</div><div class='del'>-	.opt_clks_cnt	= ARRAY_SIZE(dss_rfbi_opt_clks),</div><div class='del'>-	.slaves		= omap2430_dss_rfbi_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_dss_rfbi_slaves),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; dss_venc */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_dss_venc_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_venc_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_venc slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__dss_venc,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_dss_venc_hwmod = {</div><div class='del'>-	.name		= "dss_venc",</div><div class='del'>-	.class		= &amp;omap2_venc_hwmod_class,</div><div class='del'>-	.main_clk	= "dss_54m_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_DSS1_SHIFT,</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2430_dss_venc_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_dss_venc_slaves),</div><div class='del'>-	.flags		= HWMOD_NO_IDLEST,</div><div class='add'>+	.clkdm_name	= "dsp_clkdm",</div><div class='add'>+	.rst_lines	= omap2430_iva_resets,</div><div class='add'>+	.rst_lines_cnt	= ARRAY_SIZE(omap2430_iva_resets),</div><div class='add'>+	.main_clk	= "dsp_fck",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* I2C common */</div><div class='hunk'>@@ -1098,11 +84,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* I2C1 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__i2c1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2430_i2c1_hwmod = {</div><div class='ctx'> 	.name		= "i2c1",</div><div class='ctx'> 	.flags		= HWMOD_16BIT_REG,</div><div class='hunk'>@@ -1126,18 +107,11 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap2430_i2c1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_i2c1_slaves),</div><div class='ctx'> 	.class		= &amp;i2c_class,</div><div class='ctx'> 	.dev_attr	= &amp;i2c_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* I2C2 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__i2c2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2430_i2c2_hwmod = {</div><div class='ctx'> 	.name		= "i2c2",</div><div class='ctx'> 	.flags		= HWMOD_16BIT_REG,</div><div class='hunk'>@@ -1153,218 +127,16 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap2430_i2c2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_i2c2_slaves),</div><div class='ctx'> 	.class		= &amp;i2c_class,</div><div class='ctx'> 	.dev_attr	= &amp;i2c_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_wkup -&gt; gpio1 */</div><div class='del'>-static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4900C000,</div><div class='del'>-		.pa_end		= 0x4900C1ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_gpio1_hwmod,</div><div class='del'>-	.clk		= "gpios_ick",</div><div class='del'>-	.addr		= omap2430_gpio1_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_wkup -&gt; gpio2 */</div><div class='del'>-static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4900E000,</div><div class='del'>-		.pa_end		= 0x4900E1ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_gpio2_hwmod,</div><div class='del'>-	.clk		= "gpios_ick",</div><div class='del'>-	.addr		= omap2430_gpio2_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_wkup -&gt; gpio3 */</div><div class='del'>-static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49010000,</div><div class='del'>-		.pa_end		= 0x490101ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_gpio3_hwmod,</div><div class='del'>-	.clk		= "gpios_ick",</div><div class='del'>-	.addr		= omap2430_gpio3_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_wkup -&gt; gpio4 */</div><div class='del'>-static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49012000,</div><div class='del'>-		.pa_end		= 0x490121ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_gpio4_hwmod,</div><div class='del'>-	.clk		= "gpios_ick",</div><div class='del'>-	.addr		= omap2430_gpio4_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; gpio5 */</div><div class='del'>-static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x480B6000,</div><div class='del'>-		.pa_end		= 0x480B61ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_gpio5_hwmod,</div><div class='del'>-	.clk		= "gpio5_ick",</div><div class='del'>-	.addr		= omap2430_gpio5_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio dev_attr */</div><div class='del'>-static struct omap_gpio_dev_attr gpio_dev_attr = {</div><div class='del'>-	.bank_width = 32,</div><div class='del'>-	.dbck_flag = false,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio1 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_wkup__gpio1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_gpio1_hwmod = {</div><div class='del'>-	.name		= "gpio1",</div><div class='del'>-	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='del'>-	.mpu_irqs	= omap2_gpio1_irqs,</div><div class='del'>-	.main_clk	= "gpios_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='del'>-			.module_offs = WKUP_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2430_gpio1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_gpio1_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='del'>-	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio2 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_wkup__gpio2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_gpio2_hwmod = {</div><div class='del'>-	.name		= "gpio2",</div><div class='del'>-	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='del'>-	.mpu_irqs	= omap2_gpio2_irqs,</div><div class='del'>-	.main_clk	= "gpios_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='del'>-			.module_offs = WKUP_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2430_gpio2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_gpio2_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='del'>-	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio3 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_wkup__gpio3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_gpio3_hwmod = {</div><div class='del'>-	.name		= "gpio3",</div><div class='del'>-	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='del'>-	.mpu_irqs	= omap2_gpio3_irqs,</div><div class='del'>-	.main_clk	= "gpios_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='del'>-			.module_offs = WKUP_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2430_gpio3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_gpio3_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='del'>-	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio4 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_wkup__gpio4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_gpio4_hwmod = {</div><div class='del'>-	.name		= "gpio4",</div><div class='del'>-	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='del'>-	.mpu_irqs	= omap2_gpio4_irqs,</div><div class='del'>-	.main_clk	= "gpios_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='del'>-			.module_offs = WKUP_MOD,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2430_gpio4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_gpio4_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='del'>-	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* gpio5 */</div><div class='ctx'> static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = {</div><div class='ctx'> 	{ .irq = 33 }, /* INT_24XX_GPIO_BANK5 */</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__gpio5,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2430_gpio5_hwmod = {</div><div class='ctx'> 	.name		= "gpio5",</div><div class='ctx'> 	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='hunk'>@@ -1379,10 +151,8 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap2430_gpio5_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_gpio5_slaves),</div><div class='ctx'> 	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='del'>-	.dev_attr	= &amp;gpio_dev_attr,</div><div class='add'>+	.dev_attr	= &amp;omap2xxx_gpio_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* dma attributes */</div><div class='hunk'>@@ -1392,66 +162,21 @@ static struct omap_dma_dev_attr dma_dev_attr = {</div><div class='ctx'> 	.lch_count = 32,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* dma_system -&gt; L3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {</div><div class='del'>-	.master		= &amp;omap2430_dma_system_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_l3_main_hwmod,</div><div class='del'>-	.clk		= "core_l3_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dma_system master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = {</div><div class='del'>-	&amp;omap2430_dma_system__l3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; dma_system */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_dma_system_hwmod,</div><div class='del'>-	.clk		= "sdma_ick",</div><div class='del'>-	.addr		= omap2_dma_system_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dma_system slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__dma_system,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2430_dma_system_hwmod = {</div><div class='ctx'> 	.name		= "dma",</div><div class='ctx'> 	.class		= &amp;omap2xxx_dma_hwmod_class,</div><div class='ctx'> 	.mpu_irqs	= omap2_dma_system_irqs,</div><div class='ctx'> 	.main_clk	= "core_l3_ck",</div><div class='del'>-	.slaves		= omap2430_dma_system_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_dma_system_slaves),</div><div class='del'>-	.masters	= omap2430_dma_system_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2430_dma_system_masters),</div><div class='ctx'> 	.dev_attr	= &amp;dma_dev_attr,</div><div class='ctx'> 	.flags		= HWMOD_NO_IDLEST,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mailbox */</div><div class='del'>-static struct omap_hwmod omap2430_mailbox_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {</div><div class='ctx'> 	{ .irq = 26 },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_core -&gt; mailbox */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_mailbox_hwmod,</div><div class='del'>-	.addr		= omap2_mailbox_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mailbox slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__mailbox,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2430_mailbox_hwmod = {</div><div class='ctx'> 	.name		= "mailbox",</div><div class='ctx'> 	.class		= &amp;omap2xxx_mailbox_hwmod_class,</div><div class='hunk'>@@ -1466,66 +191,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap2430_mailbox_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_mailbox_slaves),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcspi1 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__mcspi1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {</div><div class='del'>-	.num_chipselect = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_mcspi1_hwmod = {</div><div class='del'>-	.name		= "mcspi1_hwmod",</div><div class='del'>-	.mpu_irqs	= omap2_mcspi1_mpu_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_mcspi1_sdma_reqs,</div><div class='del'>-	.main_clk	= "mcspi1_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_MCSPI1_SHIFT,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2430_mcspi1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_mcspi1_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_mcspi_class,</div><div class='del'>-	.dev_attr	= &amp;omap_mcspi1_dev_attr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcspi2 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__mcspi2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {</div><div class='del'>-	.num_chipselect = 2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap2430_mcspi2_hwmod = {</div><div class='del'>-	.name		= "mcspi2_hwmod",</div><div class='del'>-	.mpu_irqs	= omap2_mcspi2_mpu_irqs,</div><div class='del'>-	.sdma_reqs	= omap2_mcspi2_sdma_reqs,</div><div class='del'>-	.main_clk	= "mcspi2_fck",</div><div class='del'>-	.prcm		= {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 1,</div><div class='del'>-			.module_bit = OMAP24XX_EN_MCSPI2_SHIFT,</div><div class='del'>-			.idlest_reg_id = 1,</div><div class='del'>-			.idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.slaves		= omap2430_mcspi2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_mcspi2_slaves),</div><div class='del'>-	.class		= &amp;omap2xxx_mcspi_class,</div><div class='del'>-	.dev_attr	= &amp;omap_mcspi2_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcspi3 */</div><div class='hunk'>@@ -1542,16 +207,12 @@ static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__mcspi3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {</div><div class='ctx'> 	.num_chipselect = 2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod omap2430_mcspi3_hwmod = {</div><div class='del'>-	.name		= "mcspi3_hwmod",</div><div class='add'>+	.name		= "mcspi3",</div><div class='ctx'> 	.mpu_irqs	= omap2430_mcspi3_mpu_irqs,</div><div class='ctx'> 	.sdma_reqs	= omap2430_mcspi3_sdma_reqs,</div><div class='ctx'> 	.main_clk	= "mcspi3_fck",</div><div class='hunk'>@@ -1564,15 +225,11 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap2430_mcspi3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_mcspi3_slaves),</div><div class='ctx'> 	.class		= &amp;omap2xxx_mcspi_class,</div><div class='ctx'> 	.dev_attr	= &amp;omap_mcspi3_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * usbhsotg</div><div class='del'>- */</div><div class='add'>+/* usbhsotg */</div><div class='ctx'> static struct omap_hwmod_class_sysconfig omap2430_usbhsotg_sysc = {</div><div class='ctx'> 	.rev_offs	= 0x0400,</div><div class='ctx'> 	.sysc_offs	= 0x0404,</div><div class='hunk'>@@ -1611,10 +268,6 @@ static struct omap_hwmod omap2430_usbhsotg_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.masters	= omap2430_usbhsotg_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap2430_usbhsotg_masters),</div><div class='del'>-	.slaves		= omap2430_usbhsotg_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_usbhsotg_slaves),</div><div class='ctx'> 	.class		= &amp;usbotg_class,</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Erratum ID: i479  idle_req / idle_ack mechanism potentially</div><div class='hunk'>@@ -1652,20 +305,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_core -&gt; mcbsp1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_mcbsp1_hwmod,</div><div class='del'>-	.clk		= "mcbsp1_ick",</div><div class='del'>-	.addr		= omap2_mcbsp1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_mcbsp1_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__mcbsp1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2430_mcbsp1_hwmod = {</div><div class='ctx'> 	.name		= "mcbsp1",</div><div class='ctx'> 	.class		= &amp;omap2430_mcbsp_hwmod_class,</div><div class='hunk'>@@ -1681,8 +320,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap2430_mcbsp1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_mcbsp1_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp2 */</div><div class='hunk'>@@ -1693,20 +330,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_core -&gt; mcbsp2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_mcbsp2_hwmod,</div><div class='del'>-	.clk		= "mcbsp2_ick",</div><div class='del'>-	.addr		= omap2xxx_mcbsp2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_mcbsp2_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__mcbsp2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2430_mcbsp2_hwmod = {</div><div class='ctx'> 	.name		= "mcbsp2",</div><div class='ctx'> 	.class		= &amp;omap2430_mcbsp_hwmod_class,</div><div class='hunk'>@@ -1722,8 +345,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap2430_mcbsp2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_mcbsp2_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp3 */</div><div class='hunk'>@@ -1734,30 +355,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "mpu",</div><div class='del'>-		.pa_start	= 0x4808C000,</div><div class='del'>-		.pa_end		= 0x4808C0ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; mcbsp3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_mcbsp3_hwmod,</div><div class='del'>-	.clk		= "mcbsp3_ick",</div><div class='del'>-	.addr		= omap2430_mcbsp3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp3 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_mcbsp3_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__mcbsp3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2430_mcbsp3_hwmod = {</div><div class='ctx'> 	.name		= "mcbsp3",</div><div class='ctx'> 	.class		= &amp;omap2430_mcbsp_hwmod_class,</div><div class='hunk'>@@ -1773,8 +370,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap2430_mcbsp3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_mcbsp3_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp4 */</div><div class='hunk'>@@ -1791,30 +386,6 @@ static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "mpu",</div><div class='del'>-		.pa_start	= 0x4808E000,</div><div class='del'>-		.pa_end		= 0x4808E0ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; mcbsp4 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_mcbsp4_hwmod,</div><div class='del'>-	.clk		= "mcbsp4_ick",</div><div class='del'>-	.addr		= omap2430_mcbsp4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp4 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_mcbsp4_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__mcbsp4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2430_mcbsp4_hwmod = {</div><div class='ctx'> 	.name		= "mcbsp4",</div><div class='ctx'> 	.class		= &amp;omap2430_mcbsp_hwmod_class,</div><div class='hunk'>@@ -1830,8 +401,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap2430_mcbsp4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_mcbsp4_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp5 */</div><div class='hunk'>@@ -1848,30 +417,6 @@ static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "mpu",</div><div class='del'>-		.pa_start	= 0x48096000,</div><div class='del'>-		.pa_end		= 0x480960ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; mcbsp5 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = {</div><div class='del'>-	.master		= &amp;omap2430_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap2430_mcbsp5_hwmod,</div><div class='del'>-	.clk		= "mcbsp5_ick",</div><div class='del'>-	.addr		= omap2430_mcbsp5_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp5 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_mcbsp5_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__mcbsp5,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2430_mcbsp5_hwmod = {</div><div class='ctx'> 	.name		= "mcbsp5",</div><div class='ctx'> 	.class		= &amp;omap2430_mcbsp_hwmod_class,</div><div class='hunk'>@@ -1887,12 +432,9 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap2430_mcbsp5_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_mcbsp5_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* MMC/SD/SDIO common */</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_class_sysconfig omap2430_mmc_sysc = {</div><div class='ctx'> 	.rev_offs	= 0x1fc,</div><div class='ctx'> 	.sysc_offs	= 0x10,</div><div class='hunk'>@@ -1910,7 +452,6 @@ static struct omap_hwmod_class omap2430_mmc_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* MMC/SD/SDIO1 */</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = {</div><div class='ctx'> 	{ .irq = 83 },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -1926,10 +467,6 @@ static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbck", .clk = "mmchsdb1_fck" },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_mmc1_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__mmc1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_mmc_dev_attr mmc1_dev_attr = {</div><div class='ctx'> 	.flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,</div><div class='ctx'> };</div><div class='hunk'>@@ -1952,13 +489,10 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;mmc1_dev_attr,</div><div class='del'>-	.slaves		= omap2430_mmc1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_mmc1_slaves),</div><div class='ctx'> 	.class		= &amp;omap2430_mmc_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* MMC/SD/SDIO2 */</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = {</div><div class='ctx'> 	{ .irq = 86 },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -1974,10 +508,6 @@ static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbck", .clk = "mmchsdb2_fck" },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap2430_mmc2_slaves[] = {</div><div class='del'>-	&amp;omap2430_l4_core__mmc2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap2430_mmc2_hwmod = {</div><div class='ctx'> 	.name		= "mmc2",</div><div class='ctx'> 	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='hunk'>@@ -1995,78 +525,418 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap2430_mmc2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap2430_mmc2_slaves),</div><div class='ctx'> 	.class		= &amp;omap2430_mmc_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static __initdata struct omap_hwmod *omap2430_hwmods[] = {</div><div class='del'>-	&amp;omap2430_l3_main_hwmod,</div><div class='del'>-	&amp;omap2430_l4_core_hwmod,</div><div class='del'>-	&amp;omap2430_l4_wkup_hwmod,</div><div class='del'>-	&amp;omap2430_mpu_hwmod,</div><div class='del'>-	&amp;omap2430_iva_hwmod,</div><div class='del'>-</div><div class='del'>-	&amp;omap2430_timer1_hwmod,</div><div class='del'>-	&amp;omap2430_timer2_hwmod,</div><div class='del'>-	&amp;omap2430_timer3_hwmod,</div><div class='del'>-	&amp;omap2430_timer4_hwmod,</div><div class='del'>-	&amp;omap2430_timer5_hwmod,</div><div class='del'>-	&amp;omap2430_timer6_hwmod,</div><div class='del'>-	&amp;omap2430_timer7_hwmod,</div><div class='del'>-	&amp;omap2430_timer8_hwmod,</div><div class='del'>-	&amp;omap2430_timer9_hwmod,</div><div class='del'>-	&amp;omap2430_timer10_hwmod,</div><div class='del'>-	&amp;omap2430_timer11_hwmod,</div><div class='del'>-	&amp;omap2430_timer12_hwmod,</div><div class='del'>-</div><div class='del'>-	&amp;omap2430_wd_timer2_hwmod,</div><div class='del'>-	&amp;omap2430_uart1_hwmod,</div><div class='del'>-	&amp;omap2430_uart2_hwmod,</div><div class='del'>-	&amp;omap2430_uart3_hwmod,</div><div class='del'>-	/* dss class */</div><div class='del'>-	&amp;omap2430_dss_core_hwmod,</div><div class='del'>-	&amp;omap2430_dss_dispc_hwmod,</div><div class='del'>-	&amp;omap2430_dss_rfbi_hwmod,</div><div class='del'>-	&amp;omap2430_dss_venc_hwmod,</div><div class='del'>-	/* i2c class */</div><div class='del'>-	&amp;omap2430_i2c1_hwmod,</div><div class='del'>-	&amp;omap2430_i2c2_hwmod,</div><div class='del'>-	&amp;omap2430_mmc1_hwmod,</div><div class='del'>-	&amp;omap2430_mmc2_hwmod,</div><div class='del'>-</div><div class='del'>-	/* gpio class */</div><div class='del'>-	&amp;omap2430_gpio1_hwmod,</div><div class='del'>-	&amp;omap2430_gpio2_hwmod,</div><div class='del'>-	&amp;omap2430_gpio3_hwmod,</div><div class='del'>-	&amp;omap2430_gpio4_hwmod,</div><div class='del'>-	&amp;omap2430_gpio5_hwmod,</div><div class='del'>-</div><div class='del'>-	/* dma_system class*/</div><div class='del'>-	&amp;omap2430_dma_system_hwmod,</div><div class='del'>-</div><div class='del'>-	/* mcbsp class */</div><div class='del'>-	&amp;omap2430_mcbsp1_hwmod,</div><div class='del'>-	&amp;omap2430_mcbsp2_hwmod,</div><div class='del'>-	&amp;omap2430_mcbsp3_hwmod,</div><div class='del'>-	&amp;omap2430_mcbsp4_hwmod,</div><div class='del'>-	&amp;omap2430_mcbsp5_hwmod,</div><div class='del'>-</div><div class='del'>-	/* mailbox class */</div><div class='del'>-	&amp;omap2430_mailbox_hwmod,</div><div class='del'>-</div><div class='del'>-	/* mcspi class */</div><div class='del'>-	&amp;omap2430_mcspi1_hwmod,</div><div class='del'>-	&amp;omap2430_mcspi2_hwmod,</div><div class='del'>-	&amp;omap2430_mcspi3_hwmod,</div><div class='del'>-</div><div class='del'>-	/* usbotg class*/</div><div class='del'>-	&amp;omap2430_usbhsotg_hwmod,</div><div class='add'>+/* HDQ1W/1-wire */</div><div class='add'>+static struct omap_hwmod omap2430_hdq1w_hwmod = {</div><div class='add'>+	.name		= "hdq1w",</div><div class='add'>+	.mpu_irqs	= omap2_hdq1w_mpu_irqs,</div><div class='add'>+	.main_clk	= "hdq_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_HDQ_SHIFT,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.class		= &amp;omap2_hdq1w_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * interfaces</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* L3 -&gt; L4_CORE interface */</div><div class='add'>+/* l3_core -&gt; usbhsotg  interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = {</div><div class='add'>+	.master		= &amp;omap2430_usbhsotg_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_l3_main_hwmod,</div><div class='add'>+	.clk		= "core_l3_ck",</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; I2C1 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_i2c1_hwmod,</div><div class='add'>+	.clk		= "i2c1_ick",</div><div class='add'>+	.addr		= omap2_i2c1_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; I2C2 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_i2c2_hwmod,</div><div class='add'>+	.clk		= "i2c2_ick",</div><div class='add'>+	.addr		= omap2_i2c2_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= OMAP243X_HS_BASE,</div><div class='add'>+		.pa_end		= OMAP243X_HS_BASE + SZ_4K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*  l4_core -&gt;usbhsotg  interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_usbhsotg_hwmod,</div><div class='add'>+	.clk		= "usb_l4_ick",</div><div class='add'>+	.addr		= omap2430_usbhsotg_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+/* L4 CORE -&gt; MMC1 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_mmc1_hwmod,</div><div class='add'>+	.clk		= "mmchs1_ick",</div><div class='add'>+	.addr		= omap2430_mmc1_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; MMC2 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_mmc2_hwmod,</div><div class='add'>+	.clk		= "mmchs2_ick",</div><div class='add'>+	.addr		= omap2430_mmc2_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4 core -&gt; mcspi3 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_mcspi3_hwmod,</div><div class='add'>+	.clk		= "mcspi3_ick",</div><div class='add'>+	.addr		= omap2430_mcspi3_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* IVA2 &lt;- L3 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l3__iva = {</div><div class='add'>+	.master		= &amp;omap2xxx_l3_main_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_iva_hwmod,</div><div class='add'>+	.clk		= "core_l3_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49018000,</div><div class='add'>+		.pa_end		= 0x49018000 + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; timer1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer1_hwmod,</div><div class='add'>+	.clk		= "gpt1_ick",</div><div class='add'>+	.addr		= omap2430_timer1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; wd_timer2 */</div><div class='add'>+static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49016000,</div><div class='add'>+		.pa_end		= 0x4901607f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_wd_timer2_hwmod,</div><div class='add'>+	.clk		= "mpu_wdt_ick",</div><div class='add'>+	.addr		= omap2430_wd_timer2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; gpio1 */</div><div class='add'>+static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4900C000,</div><div class='add'>+		.pa_end		= 0x4900C1ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_gpio1_hwmod,</div><div class='add'>+	.clk		= "gpios_ick",</div><div class='add'>+	.addr		= omap2430_gpio1_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; gpio2 */</div><div class='add'>+static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4900E000,</div><div class='add'>+		.pa_end		= 0x4900E1ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_gpio2_hwmod,</div><div class='add'>+	.clk		= "gpios_ick",</div><div class='add'>+	.addr		= omap2430_gpio2_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; gpio3 */</div><div class='add'>+static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49010000,</div><div class='add'>+		.pa_end		= 0x490101ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_gpio3_hwmod,</div><div class='add'>+	.clk		= "gpios_ick",</div><div class='add'>+	.addr		= omap2430_gpio3_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; gpio4 */</div><div class='add'>+static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49012000,</div><div class='add'>+		.pa_end		= 0x490121ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_gpio4_hwmod,</div><div class='add'>+	.clk		= "gpios_ick",</div><div class='add'>+	.addr		= omap2430_gpio4_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; gpio5 */</div><div class='add'>+static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x480B6000,</div><div class='add'>+		.pa_end		= 0x480B61ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_gpio5_hwmod,</div><div class='add'>+	.clk		= "gpio5_ick",</div><div class='add'>+	.addr		= omap2430_gpio5_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dma_system -&gt; L3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {</div><div class='add'>+	.master		= &amp;omap2430_dma_system_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_l3_main_hwmod,</div><div class='add'>+	.clk		= "core_l3_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; dma_system */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_dma_system_hwmod,</div><div class='add'>+	.clk		= "sdma_ick",</div><div class='add'>+	.addr		= omap2_dma_system_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; mailbox */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_mailbox_hwmod,</div><div class='add'>+	.addr		= omap2_mailbox_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; mcbsp1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_mcbsp1_hwmod,</div><div class='add'>+	.clk		= "mcbsp1_ick",</div><div class='add'>+	.addr		= omap2_mcbsp1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; mcbsp2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_mcbsp2_hwmod,</div><div class='add'>+	.clk		= "mcbsp2_ick",</div><div class='add'>+	.addr		= omap2xxx_mcbsp2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "mpu",</div><div class='add'>+		.pa_start	= 0x4808C000,</div><div class='add'>+		.pa_end		= 0x4808C0ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; mcbsp3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_mcbsp3_hwmod,</div><div class='add'>+	.clk		= "mcbsp3_ick",</div><div class='add'>+	.addr		= omap2430_mcbsp3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "mpu",</div><div class='add'>+		.pa_start	= 0x4808E000,</div><div class='add'>+		.pa_end		= 0x4808E0ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; mcbsp4 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_mcbsp4_hwmod,</div><div class='add'>+	.clk		= "mcbsp4_ick",</div><div class='add'>+	.addr		= omap2430_mcbsp4_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "mpu",</div><div class='add'>+		.pa_start	= 0x48096000,</div><div class='add'>+		.pa_end		= 0x480960ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; mcbsp5 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_mcbsp5_hwmod,</div><div class='add'>+	.clk		= "mcbsp5_ick",</div><div class='add'>+	.addr		= omap2430_mcbsp5_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; hdq1w */</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_core__hdq1w = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2430_hdq1w_hwmod,</div><div class='add'>+	.clk		= "hdq_ick",</div><div class='add'>+	.addr		= omap2_hdq1w_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+	.flags		= OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; 32ksync_counter */</div><div class='add'>+static struct omap_hwmod_addr_space omap2430_counter_32k_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49020000,</div><div class='add'>+		.pa_end		= 0x4902001f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap2430_l4_wkup__counter_32k = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_counter_32k_hwmod,</div><div class='add'>+	.clk		= "sync_32k_ick",</div><div class='add'>+	.addr		= omap2430_counter_32k_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap2xxx_l3_main__l4_core,</div><div class='add'>+	&amp;omap2xxx_mpu__l3_main,</div><div class='add'>+	&amp;omap2xxx_dss__l3,</div><div class='add'>+	&amp;omap2430_usbhsotg__l3,</div><div class='add'>+	&amp;omap2430_l4_core__i2c1,</div><div class='add'>+	&amp;omap2430_l4_core__i2c2,</div><div class='add'>+	&amp;omap2xxx_l4_core__l4_wkup,</div><div class='add'>+	&amp;omap2_l4_core__uart1,</div><div class='add'>+	&amp;omap2_l4_core__uart2,</div><div class='add'>+	&amp;omap2_l4_core__uart3,</div><div class='add'>+	&amp;omap2430_l4_core__usbhsotg,</div><div class='add'>+	&amp;omap2430_l4_core__mmc1,</div><div class='add'>+	&amp;omap2430_l4_core__mmc2,</div><div class='add'>+	&amp;omap2xxx_l4_core__mcspi1,</div><div class='add'>+	&amp;omap2xxx_l4_core__mcspi2,</div><div class='add'>+	&amp;omap2430_l4_core__mcspi3,</div><div class='add'>+	&amp;omap2430_l3__iva,</div><div class='add'>+	&amp;omap2430_l4_wkup__timer1,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer2,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer3,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer4,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer5,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer6,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer7,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer8,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer9,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer10,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer11,</div><div class='add'>+	&amp;omap2xxx_l4_core__timer12,</div><div class='add'>+	&amp;omap2430_l4_wkup__wd_timer2,</div><div class='add'>+	&amp;omap2xxx_l4_core__dss,</div><div class='add'>+	&amp;omap2xxx_l4_core__dss_dispc,</div><div class='add'>+	&amp;omap2xxx_l4_core__dss_rfbi,</div><div class='add'>+	&amp;omap2xxx_l4_core__dss_venc,</div><div class='add'>+	&amp;omap2430_l4_wkup__gpio1,</div><div class='add'>+	&amp;omap2430_l4_wkup__gpio2,</div><div class='add'>+	&amp;omap2430_l4_wkup__gpio3,</div><div class='add'>+	&amp;omap2430_l4_wkup__gpio4,</div><div class='add'>+	&amp;omap2430_l4_core__gpio5,</div><div class='add'>+	&amp;omap2430_dma_system__l3,</div><div class='add'>+	&amp;omap2430_l4_core__dma_system,</div><div class='add'>+	&amp;omap2430_l4_core__mailbox,</div><div class='add'>+	&amp;omap2430_l4_core__mcbsp1,</div><div class='add'>+	&amp;omap2430_l4_core__mcbsp2,</div><div class='add'>+	&amp;omap2430_l4_core__mcbsp3,</div><div class='add'>+	&amp;omap2430_l4_core__mcbsp4,</div><div class='add'>+	&amp;omap2430_l4_core__mcbsp5,</div><div class='add'>+	&amp;omap2430_l4_core__hdq1w,</div><div class='add'>+	&amp;omap2430_l4_wkup__counter_32k,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int __init omap2430_hwmod_init(void)</div><div class='ctx'> {</div><div class='del'>-	return omap_hwmod_register(omap2430_hwmods);</div><div class='add'>+	return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c<br/>index 04637fabadd2..cbb4ef6544ad 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c</a></div><div class='hunk'>@@ -171,3 +171,12 @@ struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+struct omap_hwmod_addr_space omap2_hdq1w_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start       = 0x480b2000,</div><div class='add'>+		.pa_end         = 0x480b2fff,</div><div class='add'>+		.flags          = ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c<br/>index f08e442af397..102d76e9e9ea 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'>  * omap_hwmod_2xxx_3xxx_ipblock_data.c - common IP block data for OMAP2/3</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2011 Nokia Corporation</div><div class='add'>+ * Copyright (C) 2012 Texas Instruments, Inc.</div><div class='ctx'>  * Paul Walmsley</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='hunk'>@@ -12,6 +13,7 @@</div><div class='ctx'> #include &lt;plat/serial.h&gt;</div><div class='ctx'> #include &lt;plat/dma.h&gt;</div><div class='ctx'> #include &lt;plat/common.h&gt;</div><div class='add'>+#include &lt;plat/hdq1w.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -302,3 +304,23 @@ struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct omap_hwmod_class_sysconfig omap2_hdq1w_sysc = {</div><div class='add'>+	.rev_offs	= 0x0,</div><div class='add'>+	.sysc_offs	= 0x14,</div><div class='add'>+	.syss_offs	= 0x18,</div><div class='add'>+	.sysc_flags	= (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |</div><div class='add'>+			   SYSS_HAS_RESET_STATUS),</div><div class='add'>+	.sysc_fields    = &amp;omap_hwmod_sysc_type1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct omap_hwmod_class omap2_hdq1w_class = {</div><div class='add'>+	.name	= "hdq1w",</div><div class='add'>+	.sysc	= &amp;omap2_hdq1w_sysc,</div><div class='add'>+	.reset	= &amp;omap_hdq1w_reset,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct omap_hwmod_irq_info omap2_hdq1w_mpu_irqs[] = {</div><div class='add'>+	{ .irq = 58, },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c<br/>index 4f3547c2a49e..5178e40e84f9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c</a></div><div class='hunk'>@@ -15,10 +15,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/omap_hwmod.h&gt;</div><div class='ctx'> #include &lt;plat/serial.h&gt;</div><div class='add'>+#include &lt;plat/l3_2xxx.h&gt;</div><div class='add'>+#include &lt;plat/l4_2xxx.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "omap_hwmod_common_data.h"</div><div class='ctx'> </div><div class='del'>-struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {</div><div class='add'>+static struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.pa_start	= OMAP2_UART1_BASE,</div><div class='ctx'> 		.pa_end		= OMAP2_UART1_BASE + SZ_8K - 1,</div><div class='hunk'>@@ -27,7 +29,7 @@ struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {</div><div class='add'>+static struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.pa_start	= OMAP2_UART2_BASE,</div><div class='ctx'> 		.pa_end		= OMAP2_UART2_BASE + SZ_1K - 1,</div><div class='hunk'>@@ -36,7 +38,7 @@ struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {</div><div class='add'>+static struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.pa_start	= OMAP2_UART3_BASE,</div><div class='ctx'> 		.pa_end		= OMAP2_UART3_BASE + SZ_1K - 1,</div><div class='hunk'>@@ -45,7 +47,7 @@ struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {</div><div class='add'>+static struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.pa_start	= 0x4802a000,</div><div class='ctx'> 		.pa_end		= 0x4802a000 + SZ_1K - 1,</div><div class='hunk'>@@ -54,7 +56,7 @@ struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {</div><div class='add'>+static struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.pa_start	= 0x48078000,</div><div class='ctx'> 		.pa_end		= 0x48078000 + SZ_1K - 1,</div><div class='hunk'>@@ -63,7 +65,7 @@ struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {</div><div class='add'>+static struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.pa_start	= 0x4807a000,</div><div class='ctx'> 		.pa_end		= 0x4807a000 + SZ_1K - 1,</div><div class='hunk'>@@ -72,7 +74,7 @@ struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {</div><div class='add'>+static struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.pa_start	= 0x4807c000,</div><div class='ctx'> 		.pa_end		= 0x4807c000 + SZ_1K - 1,</div><div class='hunk'>@@ -81,7 +83,7 @@ struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {</div><div class='add'>+static struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.pa_start	= 0x4807e000,</div><div class='ctx'> 		.pa_end		= 0x4807e000 + SZ_1K - 1,</div><div class='hunk'>@@ -90,7 +92,7 @@ struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {</div><div class='add'>+static struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.pa_start	= 0x48080000,</div><div class='ctx'> 		.pa_end		= 0x48080000 + SZ_1K - 1,</div><div class='hunk'>@@ -99,7 +101,7 @@ struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {</div><div class='add'>+static struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.pa_start	= 0x48082000,</div><div class='ctx'> 		.pa_end		= 0x48082000 + SZ_1K - 1,</div><div class='hunk'>@@ -108,7 +110,7 @@ struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {</div><div class='add'>+static struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.pa_start	= 0x48084000,</div><div class='ctx'> 		.pa_end		= 0x48084000 + SZ_1K - 1,</div><div class='hunk'>@@ -127,4 +129,246 @@ struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Common interconnect data</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* L3 -&gt; L4_CORE interface */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core = {</div><div class='add'>+	.master	= &amp;omap2xxx_l3_main_hwmod,</div><div class='add'>+	.slave	= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MPU -&gt; L3 interface */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_mpu__l3_main = {</div><div class='add'>+	.master = &amp;omap2xxx_mpu_hwmod,</div><div class='add'>+	.slave	= &amp;omap2xxx_l3_main_hwmod,</div><div class='add'>+	.user	= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* DSS -&gt; l3 */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_dss__l3 = {</div><div class='add'>+	.master		= &amp;omap2xxx_dss_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_l3_main_hwmod,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l3_perm_bit  = OMAP2_L3_CORE_FW_CONNID_DSS,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L3,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4_CORE -&gt; L4_WKUP interface */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__l4_wkup = {</div><div class='add'>+	.master	= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave	= &amp;omap2xxx_l4_wkup_hwmod,</div><div class='add'>+	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; UART1 interface */</div><div class='add'>+struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_uart1_hwmod,</div><div class='add'>+	.clk		= "uart1_ick",</div><div class='add'>+	.addr		= omap2xxx_uart1_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; UART2 interface */</div><div class='add'>+struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_uart2_hwmod,</div><div class='add'>+	.clk		= "uart2_ick",</div><div class='add'>+	.addr		= omap2xxx_uart2_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 PER -&gt; UART3 interface */</div><div class='add'>+struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_uart3_hwmod,</div><div class='add'>+	.clk		= "uart3_ick",</div><div class='add'>+	.addr		= omap2xxx_uart3_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4 core -&gt; mcspi1 interface */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_mcspi1_hwmod,</div><div class='add'>+	.clk		= "mcspi1_ick",</div><div class='add'>+	.addr		= omap2_mcspi1_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4 core -&gt; mcspi2 interface */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_mcspi2_hwmod,</div><div class='add'>+	.clk		= "mcspi2_ick",</div><div class='add'>+	.addr		= omap2_mcspi2_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer2 */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer2_hwmod,</div><div class='add'>+	.clk		= "gpt2_ick",</div><div class='add'>+	.addr		= omap2xxx_timer2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer3 */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer3_hwmod,</div><div class='add'>+	.clk		= "gpt3_ick",</div><div class='add'>+	.addr		= omap2xxx_timer3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer4 */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer4 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer4_hwmod,</div><div class='add'>+	.clk		= "gpt4_ick",</div><div class='add'>+	.addr		= omap2xxx_timer4_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer5 */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer5 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer5_hwmod,</div><div class='add'>+	.clk		= "gpt5_ick",</div><div class='add'>+	.addr		= omap2xxx_timer5_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer6 */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer6 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer6_hwmod,</div><div class='add'>+	.clk		= "gpt6_ick",</div><div class='add'>+	.addr		= omap2xxx_timer6_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer7 */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer7 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer7_hwmod,</div><div class='add'>+	.clk		= "gpt7_ick",</div><div class='add'>+	.addr		= omap2xxx_timer7_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer8 */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer8 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer8_hwmod,</div><div class='add'>+	.clk		= "gpt8_ick",</div><div class='add'>+	.addr		= omap2xxx_timer8_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer9 */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer9 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer9_hwmod,</div><div class='add'>+	.clk		= "gpt9_ick",</div><div class='add'>+	.addr		= omap2xxx_timer9_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer10 */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer10 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer10_hwmod,</div><div class='add'>+	.clk		= "gpt10_ick",</div><div class='add'>+	.addr		= omap2_timer10_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer11 */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer11 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer11_hwmod,</div><div class='add'>+	.clk		= "gpt11_ick",</div><div class='add'>+	.addr		= omap2_timer11_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer12 */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__timer12 = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_timer12_hwmod,</div><div class='add'>+	.clk		= "gpt12_ick",</div><div class='add'>+	.addr		= omap2xxx_timer12_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; dss */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__dss = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_dss_core_hwmod,</div><div class='add'>+	.clk		= "dss_ick",</div><div class='add'>+	.addr		= omap2_dss_addrs,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; dss_dispc */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_dss_dispc_hwmod,</div><div class='add'>+	.clk		= "dss_ick",</div><div class='add'>+	.addr		= omap2_dss_dispc_addrs,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; dss_rfbi */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_dss_rfbi_hwmod,</div><div class='add'>+	.clk		= "dss_ick",</div><div class='add'>+	.addr		= omap2_dss_rfbi_addrs,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; dss_venc */</div><div class='add'>+struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc = {</div><div class='add'>+	.master		= &amp;omap2xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap2xxx_dss_venc_hwmod,</div><div class='add'>+	.clk		= "dss_ick",</div><div class='add'>+	.addr		= omap2_dss_venc_addrs,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.flags		= OCPIF_SWSUP_IDLE,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c<br/>index 2a6729741b06..83eafd96ecaa 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;plat/omap_hwmod.h&gt;</div><div class='ctx'> #include &lt;plat/serial.h&gt;</div><div class='add'>+#include &lt;plat/gpio.h&gt;</div><div class='ctx'> #include &lt;plat/dma.h&gt;</div><div class='ctx'> #include &lt;plat/dmtimer.h&gt;</div><div class='ctx'> #include &lt;plat/mcspi.h&gt;</div><div class='hunk'>@@ -17,6 +18,8 @@</div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "omap_hwmod_common_data.h"</div><div class='add'>+#include "cm-regbits-24xx.h"</div><div class='add'>+#include "prm-regbits-24xx.h"</div><div class='ctx'> #include "wd_timer.h"</div><div class='ctx'> </div><div class='ctx'> struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = {</div><div class='hunk'>@@ -86,7 +89,8 @@ static struct omap_hwmod_class_sysconfig omap2xxx_wd_timer_sysc = {</div><div class='ctx'> struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = {</div><div class='ctx'> 	.name		= "wd_timer",</div><div class='ctx'> 	.sysc		= &amp;omap2xxx_wd_timer_sysc,</div><div class='del'>-	.pre_shutdown	= &amp;omap2_wd_timer_disable</div><div class='add'>+	.pre_shutdown	= &amp;omap2_wd_timer_disable,</div><div class='add'>+	.reset		= &amp;omap2_wd_timer_reset,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -170,3 +174,582 @@ struct omap_hwmod_class omap2xxx_mcspi_class = {</div><div class='ctx'> 	.sysc	= &amp;omap2xxx_mcspi_sysc,</div><div class='ctx'> 	.rev	= OMAP2_MCSPI_REV,</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * IP blocks</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* L3 */</div><div class='add'>+struct omap_hwmod omap2xxx_l3_main_hwmod = {</div><div class='add'>+	.name		= "l3_main",</div><div class='add'>+	.class		= &amp;l3_hwmod_class,</div><div class='add'>+	.flags		= HWMOD_NO_IDLEST,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE */</div><div class='add'>+struct omap_hwmod omap2xxx_l4_core_hwmod = {</div><div class='add'>+	.name		= "l4_core",</div><div class='add'>+	.class		= &amp;l4_hwmod_class,</div><div class='add'>+	.flags		= HWMOD_NO_IDLEST,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 WKUP */</div><div class='add'>+struct omap_hwmod omap2xxx_l4_wkup_hwmod = {</div><div class='add'>+	.name		= "l4_wkup",</div><div class='add'>+	.class		= &amp;l4_hwmod_class,</div><div class='add'>+	.flags		= HWMOD_NO_IDLEST,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MPU */</div><div class='add'>+struct omap_hwmod omap2xxx_mpu_hwmod = {</div><div class='add'>+	.name		= "mpu",</div><div class='add'>+	.class		= &amp;mpu_hwmod_class,</div><div class='add'>+	.main_clk	= "mpu_ck",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* IVA2 */</div><div class='add'>+struct omap_hwmod omap2xxx_iva_hwmod = {</div><div class='add'>+	.name		= "iva",</div><div class='add'>+	.class		= &amp;iva_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* always-on timers dev attribute */</div><div class='add'>+static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {</div><div class='add'>+	.timer_capability       = OMAP_TIMER_ALWON,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pwm timers dev attribute */</div><div class='add'>+static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {</div><div class='add'>+	.timer_capability       = OMAP_TIMER_HAS_PWM,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer1 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_timer1_hwmod = {</div><div class='add'>+	.name		= "timer1",</div><div class='add'>+	.mpu_irqs	= omap2_timer1_mpu_irqs,</div><div class='add'>+	.main_clk	= "gpt1_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPT1_SHIFT,</div><div class='add'>+			.module_offs = WKUP_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='add'>+	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer2 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_timer2_hwmod = {</div><div class='add'>+	.name		= "timer2",</div><div class='add'>+	.mpu_irqs	= omap2_timer2_mpu_irqs,</div><div class='add'>+	.main_clk	= "gpt2_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPT2_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='add'>+	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer3 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_timer3_hwmod = {</div><div class='add'>+	.name		= "timer3",</div><div class='add'>+	.mpu_irqs	= omap2_timer3_mpu_irqs,</div><div class='add'>+	.main_clk	= "gpt3_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPT3_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='add'>+	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer4 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_timer4_hwmod = {</div><div class='add'>+	.name		= "timer4",</div><div class='add'>+	.mpu_irqs	= omap2_timer4_mpu_irqs,</div><div class='add'>+	.main_clk	= "gpt4_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPT4_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='add'>+	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer5 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_timer5_hwmod = {</div><div class='add'>+	.name		= "timer5",</div><div class='add'>+	.mpu_irqs	= omap2_timer5_mpu_irqs,</div><div class='add'>+	.main_clk	= "gpt5_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPT5_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='add'>+	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer6 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_timer6_hwmod = {</div><div class='add'>+	.name		= "timer6",</div><div class='add'>+	.mpu_irqs	= omap2_timer6_mpu_irqs,</div><div class='add'>+	.main_clk	= "gpt6_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPT6_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='add'>+	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer7 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_timer7_hwmod = {</div><div class='add'>+	.name		= "timer7",</div><div class='add'>+	.mpu_irqs	= omap2_timer7_mpu_irqs,</div><div class='add'>+	.main_clk	= "gpt7_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPT7_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='add'>+	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer8 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_timer8_hwmod = {</div><div class='add'>+	.name		= "timer8",</div><div class='add'>+	.mpu_irqs	= omap2_timer8_mpu_irqs,</div><div class='add'>+	.main_clk	= "gpt8_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPT8_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='add'>+	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer9 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_timer9_hwmod = {</div><div class='add'>+	.name		= "timer9",</div><div class='add'>+	.mpu_irqs	= omap2_timer9_mpu_irqs,</div><div class='add'>+	.main_clk	= "gpt9_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPT9_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='add'>+	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer10 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_timer10_hwmod = {</div><div class='add'>+	.name		= "timer10",</div><div class='add'>+	.mpu_irqs	= omap2_timer10_mpu_irqs,</div><div class='add'>+	.main_clk	= "gpt10_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPT10_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='add'>+	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer11 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_timer11_hwmod = {</div><div class='add'>+	.name		= "timer11",</div><div class='add'>+	.mpu_irqs	= omap2_timer11_mpu_irqs,</div><div class='add'>+	.main_clk	= "gpt11_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPT11_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='add'>+	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer12 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_timer12_hwmod = {</div><div class='add'>+	.name		= "timer12",</div><div class='add'>+	.mpu_irqs	= omap2xxx_timer12_mpu_irqs,</div><div class='add'>+	.main_clk	= "gpt12_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPT12_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='add'>+	.class		= &amp;omap2xxx_timer_hwmod_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* wd_timer2 */</div><div class='add'>+struct omap_hwmod omap2xxx_wd_timer2_hwmod = {</div><div class='add'>+	.name		= "wd_timer2",</div><div class='add'>+	.class		= &amp;omap2xxx_wd_timer_hwmod_class,</div><div class='add'>+	.main_clk	= "mpu_wdt_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_MPU_WDT_SHIFT,</div><div class='add'>+			.module_offs = WKUP_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* UART1 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_uart1_hwmod = {</div><div class='add'>+	.name		= "uart1",</div><div class='add'>+	.mpu_irqs	= omap2_uart1_mpu_irqs,</div><div class='add'>+	.sdma_reqs	= omap2_uart1_sdma_reqs,</div><div class='add'>+	.main_clk	= "uart1_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_UART1_SHIFT,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.class		= &amp;omap2_uart_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* UART2 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_uart2_hwmod = {</div><div class='add'>+	.name		= "uart2",</div><div class='add'>+	.mpu_irqs	= omap2_uart2_mpu_irqs,</div><div class='add'>+	.sdma_reqs	= omap2_uart2_sdma_reqs,</div><div class='add'>+	.main_clk	= "uart2_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_UART2_SHIFT,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.class		= &amp;omap2_uart_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* UART3 */</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_uart3_hwmod = {</div><div class='add'>+	.name		= "uart3",</div><div class='add'>+	.mpu_irqs	= omap2_uart3_mpu_irqs,</div><div class='add'>+	.sdma_reqs	= omap2_uart3_sdma_reqs,</div><div class='add'>+	.main_clk	= "uart3_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.prcm_reg_id = 2,</div><div class='add'>+			.module_bit = OMAP24XX_EN_UART3_SHIFT,</div><div class='add'>+			.idlest_reg_id = 2,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.class		= &amp;omap2_uart_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dss */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_opt_clk dss_opt_clks[] = {</div><div class='add'>+	/*</div><div class='add'>+	 * The DSS HW needs all DSS clocks enabled during reset. The dss_core</div><div class='add'>+	 * driver does not use these clocks.</div><div class='add'>+	 */</div><div class='add'>+	{ .role = "tv_clk", .clk = "dss_54m_fck" },</div><div class='add'>+	{ .role = "sys_clk", .clk = "dss2_fck" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_dss_core_hwmod = {</div><div class='add'>+	.name		= "dss_core",</div><div class='add'>+	.class		= &amp;omap2_dss_hwmod_class,</div><div class='add'>+	.main_clk	= "dss1_fck", /* instead of dss_fck */</div><div class='add'>+	.sdma_reqs	= omap2xxx_dss_sdma_chs,</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_DSS1_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.opt_clks	= dss_opt_clks,</div><div class='add'>+	.opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),</div><div class='add'>+	.flags		= HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_dss_dispc_hwmod = {</div><div class='add'>+	.name		= "dss_dispc",</div><div class='add'>+	.class		= &amp;omap2_dispc_hwmod_class,</div><div class='add'>+	.mpu_irqs	= omap2_dispc_irqs,</div><div class='add'>+	.main_clk	= "dss1_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_DSS1_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.flags		= HWMOD_NO_IDLEST,</div><div class='add'>+	.dev_attr	= &amp;omap2_3_dss_dispc_dev_attr</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {</div><div class='add'>+	{ .role = "ick", .clk = "dss_ick" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_dss_rfbi_hwmod = {</div><div class='add'>+	.name		= "dss_rfbi",</div><div class='add'>+	.class		= &amp;omap2_rfbi_hwmod_class,</div><div class='add'>+	.main_clk	= "dss1_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_DSS1_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.opt_clks	= dss_rfbi_opt_clks,</div><div class='add'>+	.opt_clks_cnt	= ARRAY_SIZE(dss_rfbi_opt_clks),</div><div class='add'>+	.flags		= HWMOD_NO_IDLEST,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_dss_venc_hwmod = {</div><div class='add'>+	.name		= "dss_venc",</div><div class='add'>+	.class		= &amp;omap2_venc_hwmod_class,</div><div class='add'>+	.main_clk	= "dss_54m_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_DSS1_SHIFT,</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.flags		= HWMOD_NO_IDLEST,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio dev_attr */</div><div class='add'>+struct omap_gpio_dev_attr omap2xxx_gpio_dev_attr = {</div><div class='add'>+	.bank_width = 32,</div><div class='add'>+	.dbck_flag = false,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio1 */</div><div class='add'>+struct omap_hwmod omap2xxx_gpio1_hwmod = {</div><div class='add'>+	.name		= "gpio1",</div><div class='add'>+	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='add'>+	.mpu_irqs	= omap2_gpio1_irqs,</div><div class='add'>+	.main_clk	= "gpios_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='add'>+			.module_offs = WKUP_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='add'>+	.dev_attr	= &amp;omap2xxx_gpio_dev_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio2 */</div><div class='add'>+struct omap_hwmod omap2xxx_gpio2_hwmod = {</div><div class='add'>+	.name		= "gpio2",</div><div class='add'>+	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='add'>+	.mpu_irqs	= omap2_gpio2_irqs,</div><div class='add'>+	.main_clk	= "gpios_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='add'>+			.module_offs = WKUP_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='add'>+	.dev_attr	= &amp;omap2xxx_gpio_dev_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio3 */</div><div class='add'>+struct omap_hwmod omap2xxx_gpio3_hwmod = {</div><div class='add'>+	.name		= "gpio3",</div><div class='add'>+	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='add'>+	.mpu_irqs	= omap2_gpio3_irqs,</div><div class='add'>+	.main_clk	= "gpios_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='add'>+			.module_offs = WKUP_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='add'>+	.dev_attr	= &amp;omap2xxx_gpio_dev_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio4 */</div><div class='add'>+struct omap_hwmod omap2xxx_gpio4_hwmod = {</div><div class='add'>+	.name		= "gpio4",</div><div class='add'>+	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='add'>+	.mpu_irqs	= omap2_gpio4_irqs,</div><div class='add'>+	.main_clk	= "gpios_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_GPIOS_SHIFT,</div><div class='add'>+			.module_offs = WKUP_MOD,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.class		= &amp;omap2xxx_gpio_hwmod_class,</div><div class='add'>+	.dev_attr	= &amp;omap2xxx_gpio_dev_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mcspi1 */</div><div class='add'>+static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {</div><div class='add'>+	.num_chipselect = 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_mcspi1_hwmod = {</div><div class='add'>+	.name		= "mcspi1",</div><div class='add'>+	.mpu_irqs	= omap2_mcspi1_mpu_irqs,</div><div class='add'>+	.sdma_reqs	= omap2_mcspi1_sdma_reqs,</div><div class='add'>+	.main_clk	= "mcspi1_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_MCSPI1_SHIFT,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.class		= &amp;omap2xxx_mcspi_class,</div><div class='add'>+	.dev_attr	= &amp;omap_mcspi1_dev_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mcspi2 */</div><div class='add'>+static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {</div><div class='add'>+	.num_chipselect = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_mcspi2_hwmod = {</div><div class='add'>+	.name		= "mcspi2",</div><div class='add'>+	.mpu_irqs	= omap2_mcspi2_mpu_irqs,</div><div class='add'>+	.sdma_reqs	= omap2_mcspi2_sdma_reqs,</div><div class='add'>+	.main_clk	= "mcspi2_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_EN_MCSPI2_SHIFT,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.class		= &amp;omap2xxx_mcspi_class,</div><div class='add'>+	.dev_attr	= &amp;omap_mcspi2_dev_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap2xxx_counter_hwmod_class = {</div><div class='add'>+	.name	= "counter",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct omap_hwmod omap2xxx_counter_32k_hwmod = {</div><div class='add'>+	.name		= "counter_32k",</div><div class='add'>+	.main_clk	= "func_32k_ck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2	= {</div><div class='add'>+			.module_offs = WKUP_MOD,</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP24XX_ST_32KSYNC_SHIFT,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP24XX_ST_32KSYNC_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.class		= &amp;omap2xxx_counter_hwmod_class,</div><div class='add'>+};</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c<br/>index db86ce90c69f..b26d3c9bca16 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap_hwmod_3xxx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_3xxx_data.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'>  * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009-2011 Nokia Corporation</div><div class='add'>+ * Copyright (C) 2012 Texas Instruments, Inc.</div><div class='ctx'>  * Paul Walmsley</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='hunk'>@@ -38,491 +39,56 @@</div><div class='ctx'> /*</div><div class='ctx'>  * OMAP3xxx hardware module integration data</div><div class='ctx'>  *</div><div class='del'>- * ALl of the data in this section should be autogeneratable from the</div><div class='add'>+ * All of the data in this section should be autogeneratable from the</div><div class='ctx'>  * TI hardware database or other technical documentation.  Data that</div><div class='ctx'>  * is driver-specific or driver-kernel integration-specific belongs</div><div class='ctx'>  * elsewhere.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap3xxx_mpu_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_iva_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_l3_main_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_l4_core_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_l4_per_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_wd_timer2_hwmod;</div><div class='del'>-static struct omap_hwmod omap3430es1_dss_core_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_dss_core_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_dss_dispc_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_dss_dsi1_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_dss_rfbi_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_dss_venc_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_i2c1_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_i2c2_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_i2c3_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_gpio1_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_gpio2_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_gpio3_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_gpio4_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_gpio5_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_gpio6_hwmod;</div><div class='del'>-static struct omap_hwmod omap34xx_sr1_hwmod;</div><div class='del'>-static struct omap_hwmod omap34xx_sr2_hwmod;</div><div class='del'>-static struct omap_hwmod omap34xx_mcspi1;</div><div class='del'>-static struct omap_hwmod omap34xx_mcspi2;</div><div class='del'>-static struct omap_hwmod omap34xx_mcspi3;</div><div class='del'>-static struct omap_hwmod omap34xx_mcspi4;</div><div class='del'>-static struct omap_hwmod omap3xxx_mmc1_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_mmc2_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_mmc3_hwmod;</div><div class='del'>-static struct omap_hwmod am35xx_usbhsotg_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap3xxx_dma_system_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap3xxx_mcbsp1_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_mcbsp2_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_mcbsp3_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_mcbsp4_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_mcbsp5_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_usb_host_hs_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod;</div><div class='del'>-</div><div class='del'>-/* L3 -&gt; L4_CORE interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {</div><div class='del'>-	.master	= &amp;omap3xxx_l3_main_hwmod,</div><div class='del'>-	.slave	= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L3 -&gt; L4_PER interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = {</div><div class='del'>-	.master = &amp;omap3xxx_l3_main_hwmod,</div><div class='del'>-	.slave	= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='add'>+/*</div><div class='add'>+ * IP blocks</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-/* L3 taret configuration and error log registers */</div><div class='add'>+/* L3 */</div><div class='ctx'> static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = {</div><div class='ctx'> 	{ .irq = INT_34XX_L3_DBG_IRQ },</div><div class='ctx'> 	{ .irq = INT_34XX_L3_APP_IRQ },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start       = 0x68000000,</div><div class='del'>-		.pa_end         = 0x6800ffff,</div><div class='del'>-		.flags          = ADDR_TYPE_RT,</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* MPU -&gt; L3 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = {</div><div class='del'>-	.master   = &amp;omap3xxx_mpu_hwmod,</div><div class='del'>-	.slave    = &amp;omap3xxx_l3_main_hwmod,</div><div class='del'>-	.addr     = omap3xxx_l3_main_addrs,</div><div class='del'>-	.user	= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Slave interfaces on the L3 interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_l3_main_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_mpu__l3_main,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* DSS -&gt; l3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_dss__l3 = {</div><div class='del'>-	.master		= &amp;omap3xxx_dss_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_l3_main_hwmod,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l3_perm_bit  = OMAP3_L3_CORE_FW_INIT_ID_DSS,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L3,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Master interfaces on the L3 interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = {</div><div class='del'>-	&amp;omap3xxx_l3_main__l4_core,</div><div class='del'>-	&amp;omap3xxx_l3_main__l4_per,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L3 */</div><div class='ctx'> static struct omap_hwmod omap3xxx_l3_main_hwmod = {</div><div class='ctx'> 	.name		= "l3_main",</div><div class='ctx'> 	.class		= &amp;l3_hwmod_class,</div><div class='ctx'> 	.mpu_irqs	= omap3xxx_l3_main_irqs,</div><div class='del'>-	.masters	= omap3xxx_l3_main_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap3xxx_l3_main_masters),</div><div class='del'>-	.slaves		= omap3xxx_l3_main_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_l3_main_slaves),</div><div class='ctx'> 	.flags		= HWMOD_NO_IDLEST,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap3xxx_l4_wkup_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_uart1_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_uart2_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_uart3_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_uart4_hwmod;</div><div class='del'>-static struct omap_hwmod am35xx_uart4_hwmod;</div><div class='del'>-static struct omap_hwmod omap3xxx_usbhsotg_hwmod;</div><div class='del'>-</div><div class='del'>-/* l3_core -&gt; usbhsotg interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_usbhsotg__l3 = {</div><div class='del'>-	.master		= &amp;omap3xxx_usbhsotg_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_l3_main_hwmod,</div><div class='del'>-	.clk		= "core_l3_ick",</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_core -&gt; am35xx_usbhsotg interface */</div><div class='del'>-static struct omap_hwmod_ocp_if am35xx_usbhsotg__l3 = {</div><div class='del'>-	.master		= &amp;am35xx_usbhsotg_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_l3_main_hwmod,</div><div class='del'>-	.clk		= "core_l3_ick",</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-/* L4_CORE -&gt; L4_WKUP interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {</div><div class='del'>-	.master	= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave	= &amp;omap3xxx_l4_wkup_hwmod,</div><div class='del'>-	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; MMC1 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_mmc1_hwmod,</div><div class='del'>-	.clk		= "mmchs1_ick",</div><div class='del'>-	.addr		= omap2430_mmc1_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-	.flags		= OMAP_FIREWALL_L4</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; MMC2 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_mmc2_hwmod,</div><div class='del'>-	.clk		= "mmchs2_ick",</div><div class='del'>-	.addr		= omap2430_mmc2_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-	.flags		= OMAP_FIREWALL_L4</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; MMC3 interface */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_mmc3_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x480ad000,</div><div class='del'>-		.pa_end		= 0x480ad1ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT,</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_mmc3_hwmod,</div><div class='del'>-	.clk		= "mmchs3_ick",</div><div class='del'>-	.addr		= omap3xxx_mmc3_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-	.flags		= OMAP_FIREWALL_L4</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; UART1 interface */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_uart1_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= OMAP3_UART1_BASE,</div><div class='del'>-		.pa_end		= OMAP3_UART1_BASE + SZ_8K - 1,</div><div class='del'>-		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_uart1_hwmod,</div><div class='del'>-	.clk		= "uart1_ick",</div><div class='del'>-	.addr		= omap3xxx_uart1_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; UART2 interface */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_uart2_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= OMAP3_UART2_BASE,</div><div class='del'>-		.pa_end		= OMAP3_UART2_BASE + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_uart2_hwmod,</div><div class='del'>-	.clk		= "uart2_ick",</div><div class='del'>-	.addr		= omap3xxx_uart2_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 PER -&gt; UART3 interface */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_uart3_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= OMAP3_UART3_BASE,</div><div class='del'>-		.pa_end		= OMAP3_UART3_BASE + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_uart3_hwmod,</div><div class='del'>-	.clk		= "uart3_ick",</div><div class='del'>-	.addr		= omap3xxx_uart3_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 PER -&gt; UART4 interface */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_uart4_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= OMAP3_UART4_BASE,</div><div class='del'>-		.pa_end		= OMAP3_UART4_BASE + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_uart4_hwmod,</div><div class='del'>-	.clk		= "uart4_ick",</div><div class='del'>-	.addr		= omap3xxx_uart4_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* AM35xx: L4 CORE -&gt; UART4 interface */</div><div class='del'>-static struct omap_hwmod_addr_space am35xx_uart4_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start       = OMAP3_UART4_AM35XX_BASE,</div><div class='del'>-		.pa_end         = OMAP3_UART4_AM35XX_BASE + SZ_1K - 1,</div><div class='del'>-		.flags          = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if am35xx_l4_core__uart4 = {</div><div class='del'>-	.master         = &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave          = &amp;am35xx_uart4_hwmod,</div><div class='del'>-	.clk            = "uart4_ick",</div><div class='del'>-	.addr           = am35xx_uart4_addr_space,</div><div class='del'>-	.user           = OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; I2C1 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_i2c1_hwmod,</div><div class='del'>-	.clk		= "i2c1_ick",</div><div class='del'>-	.addr		= omap2_i2c1_addr_space,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP3_L4_CORE_FW_I2C1_REGION,</div><div class='del'>-			.l4_prot_group = 7,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; I2C2 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_i2c2_hwmod,</div><div class='del'>-	.clk		= "i2c2_ick",</div><div class='del'>-	.addr		= omap2_i2c2_addr_space,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP3_L4_CORE_FW_I2C2_REGION,</div><div class='del'>-			.l4_prot_group = 7,</div><div class='del'>-			.flags = OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; I2C3 interface */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48060000,</div><div class='del'>-		.pa_end		= 0x48060000 + SZ_128 - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT,</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_i2c3_hwmod,</div><div class='del'>-	.clk		= "i2c3_ick",</div><div class='del'>-	.addr		= omap3xxx_i2c3_addr_space,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP3_L4_CORE_FW_I2C3_REGION,</div><div class='del'>-			.l4_prot_group = 7,</div><div class='del'>-			.flags = OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = {</div><div class='del'>-	{ .irq = 18},</div><div class='del'>-	{ .irq = -1 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = {</div><div class='del'>-	{ .irq = 19},</div><div class='del'>-	{ .irq = -1 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; SR1 interface */</div><div class='del'>-static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= OMAP34XX_SR1_BASE,</div><div class='del'>-		.pa_end		= OMAP34XX_SR1_BASE + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT,</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap34xx_sr1_hwmod,</div><div class='del'>-	.clk		= "sr_l4_ick",</div><div class='del'>-	.addr		= omap3_sr1_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* L4 CORE -&gt; SR1 interface */</div><div class='del'>-static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= OMAP34XX_SR2_BASE,</div><div class='del'>-		.pa_end		= OMAP34XX_SR2_BASE + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT,</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap34xx_sr2_hwmod,</div><div class='del'>-	.clk		= "sr_l4_ick",</div><div class='del'>-	.addr		= omap3_sr2_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-* usbhsotg interface data</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= OMAP34XX_HSUSB_OTG_BASE,</div><div class='del'>-		.pa_end		= OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; usbhsotg  */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_usbhsotg_hwmod,</div><div class='del'>-	.clk		= "l4_ick",</div><div class='del'>-	.addr		= omap3xxx_usbhsotg_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_usbhsotg_masters[] = {</div><div class='del'>-	&amp;omap3xxx_usbhsotg__l3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_usbhsotg_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__usbhsotg,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= AM35XX_IPSS_USBOTGSS_BASE,</div><div class='del'>-		.pa_end		= AM35XX_IPSS_USBOTGSS_BASE + SZ_4K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; usbhsotg  */</div><div class='del'>-static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;am35xx_usbhsotg_hwmod,</div><div class='del'>-	.clk		= "l4_ick",</div><div class='del'>-	.addr		= am35xx_usbhsotg_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *am35xx_usbhsotg_masters[] = {</div><div class='del'>-	&amp;am35xx_usbhsotg__l3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *am35xx_usbhsotg_slaves[] = {</div><div class='del'>-	&amp;am35xx_l4_core__usbhsotg,</div><div class='del'>-};</div><div class='del'>-/* Slave interfaces on the L4_CORE interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l3_main__l4_core,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* L4 CORE */</div><div class='ctx'> static struct omap_hwmod omap3xxx_l4_core_hwmod = {</div><div class='ctx'> 	.name		= "l4_core",</div><div class='ctx'> 	.class		= &amp;l4_hwmod_class,</div><div class='del'>-	.slaves		= omap3xxx_l4_core_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_l4_core_slaves),</div><div class='ctx'> 	.flags		= HWMOD_NO_IDLEST,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Slave interfaces on the L4_PER interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_l4_per_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l3_main__l4_per,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* L4 PER */</div><div class='ctx'> static struct omap_hwmod omap3xxx_l4_per_hwmod = {</div><div class='ctx'> 	.name		= "l4_per",</div><div class='ctx'> 	.class		= &amp;l4_hwmod_class,</div><div class='del'>-	.slaves		= omap3xxx_l4_per_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_l4_per_slaves),</div><div class='ctx'> 	.flags		= HWMOD_NO_IDLEST,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Slave interfaces on the L4_WKUP interconnect */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_l4_wkup_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__l4_wkup,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* L4 WKUP */</div><div class='ctx'> static struct omap_hwmod omap3xxx_l4_wkup_hwmod = {</div><div class='ctx'> 	.name		= "l4_wkup",</div><div class='ctx'> 	.class		= &amp;l4_hwmod_class,</div><div class='del'>-	.slaves		= omap3xxx_l4_wkup_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_l4_wkup_slaves),</div><div class='ctx'> 	.flags		= HWMOD_NO_IDLEST,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Master interfaces on the MPU device */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_mpu_masters[] = {</div><div class='del'>-	&amp;omap3xxx_mpu__l3_main,</div><div class='add'>+/* L4 SEC */</div><div class='add'>+static struct omap_hwmod omap3xxx_l4_sec_hwmod = {</div><div class='add'>+	.name		= "l4_sec",</div><div class='add'>+	.class		= &amp;l4_hwmod_class,</div><div class='add'>+	.flags		= HWMOD_NO_IDLEST,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* MPU */</div><div class='hunk'>@@ -530,35 +96,22 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = {</div><div class='ctx'> 	.name		= "mpu",</div><div class='ctx'> 	.class		= &amp;mpu_hwmod_class,</div><div class='ctx'> 	.main_clk	= "arm_fck",</div><div class='del'>-	.masters	= omap3xxx_mpu_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap3xxx_mpu_masters),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * IVA2_2 interface data</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* IVA2 &lt;- L3 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l3__iva = {</div><div class='del'>-	.master		= &amp;omap3xxx_l3_main_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_iva_hwmod,</div><div class='del'>-	.clk		= "iva2_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+/* IVA2 (IVA2) */</div><div class='add'>+static struct omap_hwmod_rst_info omap3xxx_iva_resets[] = {</div><div class='add'>+	{ .name = "logic", .rst_shift = 0 },</div><div class='add'>+	{ .name = "seq0", .rst_shift = 1 },</div><div class='add'>+	{ .name = "seq1", .rst_shift = 2 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_iva_masters[] = {</div><div class='del'>-	&amp;omap3xxx_l3__iva,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IVA2 (IVA2)</div><div class='del'>- */</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_iva_hwmod = {</div><div class='ctx'> 	.name		= "iva",</div><div class='ctx'> 	.class		= &amp;iva_hwmod_class,</div><div class='del'>-	.masters	= omap3xxx_iva_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap3xxx_iva_masters),</div><div class='add'>+	.clkdm_name	= "iva2_clkdm",</div><div class='add'>+	.rst_lines	= omap3xxx_iva_resets,</div><div class='add'>+	.rst_lines_cnt	= ARRAY_SIZE(omap3xxx_iva_resets),</div><div class='add'>+	.main_clk	= "iva2_ck",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer class */</div><div class='hunk'>@@ -597,46 +150,20 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {</div><div class='ctx'> </div><div class='ctx'> /* secure timers dev attribute */</div><div class='ctx'> static struct omap_timer_capability_dev_attr capability_secure_dev_attr = {</div><div class='del'>-	.timer_capability       = OMAP_TIMER_SECURE,</div><div class='add'>+	.timer_capability	= OMAP_TIMER_SECURE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* always-on timers dev attribute */</div><div class='ctx'> static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {</div><div class='del'>-	.timer_capability       = OMAP_TIMER_ALWON,</div><div class='add'>+	.timer_capability	= OMAP_TIMER_ALWON,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* pwm timers dev attribute */</div><div class='ctx'> static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {</div><div class='del'>-	.timer_capability       = OMAP_TIMER_HAS_PWM,</div><div class='add'>+	.timer_capability	= OMAP_TIMER_HAS_PWM,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer1 */</div><div class='del'>-static struct omap_hwmod omap3xxx_timer1_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48318000,</div><div class='del'>-		.pa_end		= 0x48318000 + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_wkup -&gt; timer1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_timer1_hwmod,</div><div class='del'>-	.clk		= "gpt1_ick",</div><div class='del'>-	.addr		= omap3xxx_timer1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer1 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_wkup__timer1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer1 hwmod */</div><div class='ctx'> static struct omap_hwmod omap3xxx_timer1_hwmod = {</div><div class='ctx'> 	.name		= "timer1",</div><div class='ctx'> 	.mpu_irqs	= omap2_timer1_mpu_irqs,</div><div class='hunk'>@@ -651,38 +178,10 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_timer1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_timer1_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_timer_1ms_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer2 */</div><div class='del'>-static struct omap_hwmod omap3xxx_timer2_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49032000,</div><div class='del'>-		.pa_end		= 0x49032000 + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_timer2_hwmod,</div><div class='del'>-	.clk		= "gpt2_ick",</div><div class='del'>-	.addr		= omap3xxx_timer2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer2 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__timer2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer2 hwmod */</div><div class='ctx'> static struct omap_hwmod omap3xxx_timer2_hwmod = {</div><div class='ctx'> 	.name		= "timer2",</div><div class='ctx'> 	.mpu_irqs	= omap2_timer2_mpu_irqs,</div><div class='hunk'>@@ -697,38 +196,10 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_timer2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_timer2_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_timer_1ms_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer3 */</div><div class='del'>-static struct omap_hwmod omap3xxx_timer3_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49034000,</div><div class='del'>-		.pa_end		= 0x49034000 + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_timer3_hwmod,</div><div class='del'>-	.clk		= "gpt3_ick",</div><div class='del'>-	.addr		= omap3xxx_timer3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer3 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__timer3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer3 hwmod */</div><div class='ctx'> static struct omap_hwmod omap3xxx_timer3_hwmod = {</div><div class='ctx'> 	.name		= "timer3",</div><div class='ctx'> 	.mpu_irqs	= omap2_timer3_mpu_irqs,</div><div class='hunk'>@@ -743,38 +214,10 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_timer3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_timer3_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_timer_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer4 */</div><div class='del'>-static struct omap_hwmod omap3xxx_timer4_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49036000,</div><div class='del'>-		.pa_end		= 0x49036000 + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer4 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer4 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_timer4_hwmod,</div><div class='del'>-	.clk		= "gpt4_ick",</div><div class='del'>-	.addr		= omap3xxx_timer4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer4 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__timer4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer4 hwmod */</div><div class='ctx'> static struct omap_hwmod omap3xxx_timer4_hwmod = {</div><div class='ctx'> 	.name		= "timer4",</div><div class='ctx'> 	.mpu_irqs	= omap2_timer4_mpu_irqs,</div><div class='hunk'>@@ -789,38 +232,10 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_timer4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_timer4_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_timer_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer5 */</div><div class='del'>-static struct omap_hwmod omap3xxx_timer5_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49038000,</div><div class='del'>-		.pa_end		= 0x49038000 + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer5 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer5 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_timer5_hwmod,</div><div class='del'>-	.clk		= "gpt5_ick",</div><div class='del'>-	.addr		= omap3xxx_timer5_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer5 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__timer5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer5 hwmod */</div><div class='ctx'> static struct omap_hwmod omap3xxx_timer5_hwmod = {</div><div class='ctx'> 	.name		= "timer5",</div><div class='ctx'> 	.mpu_irqs	= omap2_timer5_mpu_irqs,</div><div class='hunk'>@@ -835,38 +250,10 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_timer5_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_timer5_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_timer_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer6 */</div><div class='del'>-static struct omap_hwmod omap3xxx_timer6_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4903A000,</div><div class='del'>-		.pa_end		= 0x4903A000 + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer6 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer6 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_timer6_hwmod,</div><div class='del'>-	.clk		= "gpt6_ick",</div><div class='del'>-	.addr		= omap3xxx_timer6_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer6 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__timer6,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer6 hwmod */</div><div class='ctx'> static struct omap_hwmod omap3xxx_timer6_hwmod = {</div><div class='ctx'> 	.name		= "timer6",</div><div class='ctx'> 	.mpu_irqs	= omap2_timer6_mpu_irqs,</div><div class='hunk'>@@ -881,38 +268,10 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_timer6_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_timer6_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_timer_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer7 */</div><div class='del'>-static struct omap_hwmod omap3xxx_timer7_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4903C000,</div><div class='del'>-		.pa_end		= 0x4903C000 + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer7 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer7 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_timer7_hwmod,</div><div class='del'>-	.clk		= "gpt7_ick",</div><div class='del'>-	.addr		= omap3xxx_timer7_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer7 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__timer7,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer7 hwmod */</div><div class='ctx'> static struct omap_hwmod omap3xxx_timer7_hwmod = {</div><div class='ctx'> 	.name		= "timer7",</div><div class='ctx'> 	.mpu_irqs	= omap2_timer7_mpu_irqs,</div><div class='hunk'>@@ -927,38 +286,10 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_timer7_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_timer7_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_timer_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer8 */</div><div class='del'>-static struct omap_hwmod omap3xxx_timer8_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4903E000,</div><div class='del'>-		.pa_end		= 0x4903E000 + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer8 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer8 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_timer8_hwmod,</div><div class='del'>-	.clk		= "gpt8_ick",</div><div class='del'>-	.addr		= omap3xxx_timer8_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer8 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__timer8,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer8 hwmod */</div><div class='ctx'> static struct omap_hwmod omap3xxx_timer8_hwmod = {</div><div class='ctx'> 	.name		= "timer8",</div><div class='ctx'> 	.mpu_irqs	= omap2_timer8_mpu_irqs,</div><div class='hunk'>@@ -973,38 +304,10 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_timer8_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_timer8_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_timer_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer9 */</div><div class='del'>-static struct omap_hwmod omap3xxx_timer9_hwmod;</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49040000,</div><div class='del'>-		.pa_end		= 0x49040000 + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer9 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer9 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_timer9_hwmod,</div><div class='del'>-	.clk		= "gpt9_ick",</div><div class='del'>-	.addr		= omap3xxx_timer9_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer9 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__timer9,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer9 hwmod */</div><div class='ctx'> static struct omap_hwmod omap3xxx_timer9_hwmod = {</div><div class='ctx'> 	.name		= "timer9",</div><div class='ctx'> 	.mpu_irqs	= omap2_timer9_mpu_irqs,</div><div class='hunk'>@@ -1019,29 +322,10 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_timer9_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_timer9_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_timer_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer10 */</div><div class='del'>-static struct omap_hwmod omap3xxx_timer10_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer10 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_timer10_hwmod,</div><div class='del'>-	.clk		= "gpt10_ick",</div><div class='del'>-	.addr		= omap2_timer10_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer10 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__timer10,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer10 hwmod */</div><div class='ctx'> static struct omap_hwmod omap3xxx_timer10_hwmod = {</div><div class='ctx'> 	.name		= "timer10",</div><div class='ctx'> 	.mpu_irqs	= omap2_timer10_mpu_irqs,</div><div class='hunk'>@@ -1056,29 +340,10 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_timer10_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_timer10_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_timer_1ms_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer11 */</div><div class='del'>-static struct omap_hwmod omap3xxx_timer11_hwmod;</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer11 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_timer11_hwmod,</div><div class='del'>-	.clk		= "gpt11_ick",</div><div class='del'>-	.addr		= omap2_timer11_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer11 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__timer11,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer11 hwmod */</div><div class='ctx'> static struct omap_hwmod omap3xxx_timer11_hwmod = {</div><div class='ctx'> 	.name		= "timer11",</div><div class='ctx'> 	.mpu_irqs	= omap2_timer11_mpu_irqs,</div><div class='hunk'>@@ -1093,42 +358,15 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_timer11_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_timer11_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_timer_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* timer12*/</div><div class='del'>-static struct omap_hwmod omap3xxx_timer12_hwmod;</div><div class='add'>+/* timer12 */</div><div class='ctx'> static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = {</div><div class='ctx'> 	{ .irq = 95, },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48304000,</div><div class='del'>-		.pa_end		= 0x48304000 + SZ_1K - 1,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; timer12 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer12 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_timer12_hwmod,</div><div class='del'>-	.clk		= "gpt12_ick",</div><div class='del'>-	.addr		= omap3xxx_timer12_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer12 slave port */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_timer12_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__timer12,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer12 hwmod */</div><div class='ctx'> static struct omap_hwmod omap3xxx_timer12_hwmod = {</div><div class='ctx'> 	.name		= "timer12",</div><div class='ctx'> 	.mpu_irqs	= omap3xxx_timer12_mpu_irqs,</div><div class='hunk'>@@ -1143,29 +381,9 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_secure_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_timer12_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_timer12_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_timer_hwmod_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_wkup -&gt; wd_timer2 */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48314000,</div><div class='del'>-		.pa_end		= 0x4831407f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_wd_timer2_hwmod,</div><div class='del'>-	.clk		= "wdt2_ick",</div><div class='del'>-	.addr		= omap3xxx_wd_timer2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * 'wd_timer' class</div><div class='ctx'>  * 32-bit watchdog upward counter that generates a pulse on the reset pin on</div><div class='hunk'>@@ -1200,12 +418,8 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {</div><div class='ctx'> static struct omap_hwmod_class omap3xxx_wd_timer_hwmod_class = {</div><div class='ctx'> 	.name		= "wd_timer",</div><div class='ctx'> 	.sysc		= &amp;omap3xxx_wd_timer_sysc,</div><div class='del'>-	.pre_shutdown	= &amp;omap2_wd_timer_disable</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* wd_timer2 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_wd_timer2_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_wkup__wd_timer2,</div><div class='add'>+	.pre_shutdown	= &amp;omap2_wd_timer_disable,</div><div class='add'>+	.reset		= &amp;omap2_wd_timer_reset,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {</div><div class='hunk'>@@ -1221,8 +435,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_WDT2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_wd_timer2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_wd_timer2_slaves),</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * XXX: Use software supervised mode, HW supervised smartidle seems to</div><div class='ctx'> 	 * block CORE power domain idle transitions. Maybe a HW bug in wdt2?</div><div class='hunk'>@@ -1231,11 +443,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* UART1 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = {</div><div class='del'>-	&amp;omap3_l4_core__uart1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_uart1_hwmod = {</div><div class='ctx'> 	.name		= "uart1",</div><div class='ctx'> 	.mpu_irqs	= omap2_uart1_mpu_irqs,</div><div class='hunk'>@@ -1250,17 +457,10 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_EN_UART1_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_uart1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_uart1_slaves),</div><div class='ctx'> 	.class		= &amp;omap2_uart_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* UART2 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = {</div><div class='del'>-	&amp;omap3_l4_core__uart2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_uart2_hwmod = {</div><div class='ctx'> 	.name		= "uart2",</div><div class='ctx'> 	.mpu_irqs	= omap2_uart2_mpu_irqs,</div><div class='hunk'>@@ -1275,17 +475,10 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_EN_UART2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_uart2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_uart2_slaves),</div><div class='ctx'> 	.class		= &amp;omap2_uart_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* UART3 */</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = {</div><div class='del'>-	&amp;omap3_l4_per__uart3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_uart3_hwmod = {</div><div class='ctx'> 	.name		= "uart3",</div><div class='ctx'> 	.mpu_irqs	= omap2_uart3_mpu_irqs,</div><div class='hunk'>@@ -1300,13 +493,10 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_EN_UART3_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_uart3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_uart3_slaves),</div><div class='ctx'> 	.class		= &amp;omap2_uart_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* UART4 */</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_irq_info uart4_mpu_irqs[] = {</div><div class='ctx'> 	{ .irq = INT_36XX_UART4_IRQ, },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -1318,11 +508,7 @@ static struct omap_hwmod_dma_info uart4_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = {</div><div class='del'>-	&amp;omap3_l4_per__uart4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap3xxx_uart4_hwmod = {</div><div class='add'>+static struct omap_hwmod omap36xx_uart4_hwmod = {</div><div class='ctx'> 	.name		= "uart4",</div><div class='ctx'> 	.mpu_irqs	= uart4_mpu_irqs,</div><div class='ctx'> 	.sdma_reqs	= uart4_sdma_reqs,</div><div class='hunk'>@@ -1336,8 +522,6 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3630_EN_UART4_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_uart4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_uart4_slaves),</div><div class='ctx'> 	.class		= &amp;omap2_uart_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1350,16 +534,12 @@ static struct omap_hwmod_dma_info am35xx_uart4_sdma_reqs[] = {</div><div class='ctx'> 	{ .name = "tx", .dma_req = AM35XX_DMA_UART4_TX, },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *am35xx_uart4_slaves[] = {</div><div class='del'>-	&amp;am35xx_l4_core__uart4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod am35xx_uart4_hwmod = {</div><div class='del'>-	.name           = "uart4",</div><div class='del'>-	.mpu_irqs       = am35xx_uart4_mpu_irqs,</div><div class='del'>-	.sdma_reqs      = am35xx_uart4_sdma_reqs,</div><div class='del'>-	.main_clk       = "uart4_fck",</div><div class='del'>-	.prcm           = {</div><div class='add'>+	.name		= "uart4",</div><div class='add'>+	.mpu_irqs	= am35xx_uart4_mpu_irqs,</div><div class='add'>+	.sdma_reqs	= am35xx_uart4_sdma_reqs,</div><div class='add'>+	.main_clk	= "uart4_fck",</div><div class='add'>+	.prcm		= {</div><div class='ctx'> 		.omap2 = {</div><div class='ctx'> 			.module_offs = CORE_MOD,</div><div class='ctx'> 			.prcm_reg_id = 1,</div><div class='hunk'>@@ -1368,12 +548,9 @@ static struct omap_hwmod am35xx_uart4_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_EN_UART4_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves         = am35xx_uart4_slaves,</div><div class='del'>-	.slaves_cnt     = ARRAY_SIZE(am35xx_uart4_slaves),</div><div class='del'>-	.class          = &amp;omap2_uart_class,</div><div class='add'>+	.class		= &amp;omap2_uart_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_class i2c_class = {</div><div class='ctx'> 	.name	= "i2c",</div><div class='ctx'> 	.sysc	= &amp;i2c_sysc,</div><div class='hunk'>@@ -1388,51 +565,6 @@ static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* dss */</div><div class='del'>-/* dss master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_dss_masters[] = {</div><div class='del'>-	&amp;omap3xxx_dss__l3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; dss */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3430es1_dss_core_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_addrs,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION,</div><div class='del'>-			.l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_dss_core_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_addrs,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP3_L4_CORE_FW_DSS_CORE_REGION,</div><div class='del'>-			.l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3430es1_dss_slaves[] = {</div><div class='del'>-	&amp;omap3430es1_l4_core__dss,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__dss,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk dss_opt_clks[] = {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The DSS HW needs all DSS clocks enabled during reset. The dss_core</div><div class='hunk'>@@ -1460,10 +592,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= dss_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),</div><div class='del'>-	.slaves		= omap3430es1_dss_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3430es1_dss_slaves),</div><div class='del'>-	.masters	= omap3xxx_dss_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap3xxx_dss_masters),</div><div class='ctx'> 	.flags		= HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1485,10 +613,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= dss_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),</div><div class='del'>-	.slaves		= omap3xxx_dss_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_dss_slaves),</div><div class='del'>-	.masters	= omap3xxx_dss_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap3xxx_dss_masters),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1513,27 +637,6 @@ static struct omap_hwmod_class omap3_dispc_hwmod_class = {</div><div class='ctx'> 	.sysc	= &amp;omap3_dispc_sysc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_core -&gt; dss_dispc */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_dss_dispc_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_dispc_addrs,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP3_L4_CORE_FW_DSS_DISPC_REGION,</div><div class='del'>-			.l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_dispc slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__dss_dispc,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {</div><div class='ctx'> 	.name		= "dss_dispc",</div><div class='ctx'> 	.class		= &amp;omap3_dispc_hwmod_class,</div><div class='hunk'>@@ -1546,8 +649,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {</div><div class='ctx'> 			.module_offs = OMAP3430_DSS_MOD,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_dss_dispc_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_dss_dispc_slaves),</div><div class='ctx'> 	.flags		= HWMOD_NO_IDLEST,</div><div class='ctx'> 	.dev_attr	= &amp;omap2_3_dss_dispc_dev_attr</div><div class='ctx'> };</div><div class='hunk'>@@ -1567,36 +668,6 @@ static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* dss_dsi1 */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4804FC00,</div><div class='del'>-		.pa_end		= 0x4804FFFF,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; dss_dsi1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_dss_dsi1_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap3xxx_dss_dsi1_addrs,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP3_L4_CORE_FW_DSS_DSI_REGION,</div><div class='del'>-			.l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_dsi1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__dss_dsi1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {</div><div class='ctx'> 	{ .role = "sys_clk", .clk = "dss2_alwon_fck" },</div><div class='ctx'> };</div><div class='hunk'>@@ -1615,32 +686,9 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= dss_dsi1_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(dss_dsi1_opt_clks),</div><div class='del'>-	.slaves		= omap3xxx_dss_dsi1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),</div><div class='ctx'> 	.flags		= HWMOD_NO_IDLEST,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_core -&gt; dss_rfbi */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_dss_rfbi_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_rfbi_addrs,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP3_L4_CORE_FW_DSS_RFBI_REGION,</div><div class='del'>-			.l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP ,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_rfbi slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__dss_rfbi,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {</div><div class='ctx'> 	{ .role = "ick", .clk = "dss_ick" },</div><div class='ctx'> };</div><div class='hunk'>@@ -1658,32 +706,9 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= dss_rfbi_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(dss_rfbi_opt_clks),</div><div class='del'>-	.slaves		= omap3xxx_dss_rfbi_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),</div><div class='ctx'> 	.flags		= HWMOD_NO_IDLEST,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_core -&gt; dss_venc */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_dss_venc_hwmod,</div><div class='del'>-	.clk		= "dss_ick",</div><div class='del'>-	.addr		= omap2_dss_venc_addrs,</div><div class='del'>-	.fw = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.l4_fw_region  = OMAP3_L4_CORE_FW_DSS_VENC_REGION,</div><div class='del'>-			.l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,</div><div class='del'>-			.flags	= OMAP_FIREWALL_L4,</div><div class='del'>-		}</div><div class='del'>-	},</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_venc slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__dss_venc,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = {</div><div class='ctx'> 	/* required only on OMAP3430 */</div><div class='ctx'> 	{ .role = "tv_dac_clk", .clk = "dss_96m_fck" },</div><div class='hunk'>@@ -1702,13 +727,10 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= dss_venc_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(dss_venc_opt_clks),</div><div class='del'>-	.slaves		= omap3xxx_dss_venc_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_dss_venc_slaves),</div><div class='ctx'> 	.flags		= HWMOD_NO_IDLEST,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* I2C1 */</div><div class='del'>-</div><div class='ctx'> static struct omap_i2c_dev_attr i2c1_dev_attr = {</div><div class='ctx'> 	.fifo_depth	= 8, /* bytes */</div><div class='ctx'> 	.flags		= OMAP_I2C_FLAG_APPLY_ERRATA_I207 |</div><div class='hunk'>@@ -1716,10 +738,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = {</div><div class='ctx'> 			  OMAP_I2C_FLAG_BUS_SHIFT_2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {</div><div class='del'>-	&amp;omap3_l4_core__i2c1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_i2c1_hwmod = {</div><div class='ctx'> 	.name		= "i2c1",</div><div class='ctx'> 	.flags		= HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,</div><div class='hunk'>@@ -1735,14 +753,11 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_I2C1_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_i2c1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_i2c1_slaves),</div><div class='ctx'> 	.class		= &amp;i2c_class,</div><div class='ctx'> 	.dev_attr	= &amp;i2c1_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* I2C2 */</div><div class='del'>-</div><div class='ctx'> static struct omap_i2c_dev_attr i2c2_dev_attr = {</div><div class='ctx'> 	.fifo_depth	= 8, /* bytes */</div><div class='ctx'> 	.flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 |</div><div class='hunk'>@@ -1750,10 +765,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = {</div><div class='ctx'> 		 OMAP_I2C_FLAG_BUS_SHIFT_2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {</div><div class='del'>-	&amp;omap3_l4_core__i2c2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_i2c2_hwmod = {</div><div class='ctx'> 	.name		= "i2c2",</div><div class='ctx'> 	.flags		= HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,</div><div class='hunk'>@@ -1769,14 +780,11 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_I2C2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_i2c2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_i2c2_slaves),</div><div class='ctx'> 	.class		= &amp;i2c_class,</div><div class='ctx'> 	.dev_attr	= &amp;i2c2_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* I2C3 */</div><div class='del'>-</div><div class='ctx'> static struct omap_i2c_dev_attr i2c3_dev_attr = {</div><div class='ctx'> 	.fifo_depth	= 64, /* bytes */</div><div class='ctx'> 	.flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 |</div><div class='hunk'>@@ -1795,10 +803,6 @@ static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {</div><div class='del'>-	&amp;omap3_l4_core__i2c3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_i2c3_hwmod = {</div><div class='ctx'> 	.name		= "i2c3",</div><div class='ctx'> 	.flags		= HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,</div><div class='hunk'>@@ -1814,114 +818,10 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_I2C3_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_i2c3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_i2c3_slaves),</div><div class='ctx'> 	.class		= &amp;i2c_class,</div><div class='ctx'> 	.dev_attr	= &amp;i2c3_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_wkup -&gt; gpio1 */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_gpio1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48310000,</div><div class='del'>-		.pa_end		= 0x483101ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__gpio1 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_gpio1_hwmod,</div><div class='del'>-	.addr		= omap3xxx_gpio1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; gpio2 */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_gpio2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49050000,</div><div class='del'>-		.pa_end		= 0x490501ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio2 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_gpio2_hwmod,</div><div class='del'>-	.addr		= omap3xxx_gpio2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; gpio3 */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_gpio3_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49052000,</div><div class='del'>-		.pa_end		= 0x490521ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio3 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_gpio3_hwmod,</div><div class='del'>-	.addr		= omap3xxx_gpio3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; gpio4 */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49054000,</div><div class='del'>-		.pa_end		= 0x490541ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio4 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_gpio4_hwmod,</div><div class='del'>-	.addr		= omap3xxx_gpio4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; gpio5 */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_gpio5_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49056000,</div><div class='del'>-		.pa_end		= 0x490561ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio5 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_gpio5_hwmod,</div><div class='del'>-	.addr		= omap3xxx_gpio5_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; gpio6 */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_gpio6_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49058000,</div><div class='del'>-		.pa_end		= 0x490581ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio6 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_gpio6_hwmod,</div><div class='del'>-	.addr		= omap3xxx_gpio6_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * 'gpio' class</div><div class='ctx'>  * general purpose io module</div><div class='hunk'>@@ -1944,7 +844,7 @@ static struct omap_hwmod_class omap3xxx_gpio_hwmod_class = {</div><div class='ctx'> 	.rev = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* gpio_dev_attr*/</div><div class='add'>+/* gpio_dev_attr */</div><div class='ctx'> static struct omap_gpio_dev_attr gpio_dev_attr = {</div><div class='ctx'> 	.bank_width = 32,</div><div class='ctx'> 	.dbck_flag = true,</div><div class='hunk'>@@ -1955,10 +855,6 @@ static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbclk", .clk = "gpio1_dbck", },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_wkup__gpio1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_gpio1_hwmod = {</div><div class='ctx'> 	.name		= "gpio1",</div><div class='ctx'> 	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='hunk'>@@ -1975,8 +871,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_GPIO1_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_gpio1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_gpio1_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_gpio_hwmod_class,</div><div class='ctx'> 	.dev_attr	= &amp;gpio_dev_attr,</div><div class='ctx'> };</div><div class='hunk'>@@ -1986,10 +880,6 @@ static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbclk", .clk = "gpio2_dbck", },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__gpio2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_gpio2_hwmod = {</div><div class='ctx'> 	.name		= "gpio2",</div><div class='ctx'> 	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='hunk'>@@ -2006,8 +896,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_GPIO2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_gpio2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_gpio2_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_gpio_hwmod_class,</div><div class='ctx'> 	.dev_attr	= &amp;gpio_dev_attr,</div><div class='ctx'> };</div><div class='hunk'>@@ -2017,10 +905,6 @@ static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbclk", .clk = "gpio3_dbck", },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__gpio3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_gpio3_hwmod = {</div><div class='ctx'> 	.name		= "gpio3",</div><div class='ctx'> 	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='hunk'>@@ -2037,8 +921,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_GPIO3_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_gpio3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_gpio3_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_gpio_hwmod_class,</div><div class='ctx'> 	.dev_attr	= &amp;gpio_dev_attr,</div><div class='ctx'> };</div><div class='hunk'>@@ -2048,10 +930,6 @@ static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbclk", .clk = "gpio4_dbck", },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__gpio4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_gpio4_hwmod = {</div><div class='ctx'> 	.name		= "gpio4",</div><div class='ctx'> 	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='hunk'>@@ -2068,8 +946,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_GPIO4_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_gpio4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_gpio4_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_gpio_hwmod_class,</div><div class='ctx'> 	.dev_attr	= &amp;gpio_dev_attr,</div><div class='ctx'> };</div><div class='hunk'>@@ -2084,10 +960,6 @@ static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbclk", .clk = "gpio5_dbck", },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_gpio5_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__gpio5,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_gpio5_hwmod = {</div><div class='ctx'> 	.name		= "gpio5",</div><div class='ctx'> 	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='hunk'>@@ -2104,8 +976,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_GPIO5_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_gpio5_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_gpio5_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_gpio_hwmod_class,</div><div class='ctx'> 	.dev_attr	= &amp;gpio_dev_attr,</div><div class='ctx'> };</div><div class='hunk'>@@ -2120,10 +990,6 @@ static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbclk", .clk = "gpio6_dbck", },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_gpio6_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__gpio6,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_gpio6_hwmod = {</div><div class='ctx'> 	.name		= "gpio6",</div><div class='ctx'> 	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,</div><div class='hunk'>@@ -2140,20 +1006,10 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_GPIO6_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_gpio6_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_gpio6_slaves),</div><div class='ctx'> 	.class		= &amp;omap3xxx_gpio_hwmod_class,</div><div class='ctx'> 	.dev_attr	= &amp;gpio_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* dma_system -&gt; L3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_dma_system__l3 = {</div><div class='del'>-	.master		= &amp;omap3xxx_dma_system_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_l3_main_hwmod,</div><div class='del'>-	.clk		= "core_l3_ick",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* dma attributes */</div><div class='ctx'> static struct omap_dma_dev_attr dma_dev_attr = {</div><div class='ctx'> 	.dev_caps  = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |</div><div class='hunk'>@@ -2180,34 +1036,6 @@ static struct omap_hwmod_class omap3xxx_dma_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* dma_system */</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48056000,</div><div class='del'>-		.pa_end		= 0x48056fff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dma_system master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_dma_system_masters[] = {</div><div class='del'>-	&amp;omap3xxx_dma_system__l3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; dma_system */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_dma_system_hwmod,</div><div class='del'>-	.clk		= "core_l4_ick",</div><div class='del'>-	.addr		= omap3xxx_dma_system_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dma_system slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_dma_system_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__dma_system,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_dma_system_hwmod = {</div><div class='ctx'> 	.name		= "dma",</div><div class='ctx'> 	.class		= &amp;omap3xxx_dma_hwmod_class,</div><div class='hunk'>@@ -2222,10 +1050,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit	= OMAP3430_ST_SDMA_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_dma_system_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_dma_system_slaves),</div><div class='del'>-	.masters	= omap3xxx_dma_system_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap3xxx_dma_system_masters),</div><div class='ctx'> 	.dev_attr	= &amp;dma_dev_attr,</div><div class='ctx'> 	.flags		= HWMOD_NO_IDLEST,</div><div class='ctx'> };</div><div class='hunk'>@@ -2252,36 +1076,12 @@ static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = {</div><div class='ctx'> </div><div class='ctx'> /* mcbsp1 */</div><div class='ctx'> static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = {</div><div class='del'>-	{ .name = "irq", .irq = 16 },</div><div class='add'>+	{ .name = "common", .irq = 16 },</div><div class='ctx'> 	{ .name = "tx", .irq = 59 },</div><div class='ctx'> 	{ .name = "rx", .irq = 60 },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "mpu",</div><div class='del'>-		.pa_start	= 0x48074000,</div><div class='del'>-		.pa_end		= 0x480740ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; mcbsp1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_mcbsp1_hwmod,</div><div class='del'>-	.clk		= "mcbsp1_ick",</div><div class='del'>-	.addr		= omap3xxx_mcbsp1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_mcbsp1_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__mcbsp1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {</div><div class='ctx'> 	.name		= "mcbsp1",</div><div class='ctx'> 	.class		= &amp;omap3xxx_mcbsp_hwmod_class,</div><div class='hunk'>@@ -2297,42 +1097,16 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_mcbsp1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mcbsp1_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp2 */</div><div class='ctx'> static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = {</div><div class='del'>-	{ .name = "irq", .irq = 17 },</div><div class='add'>+	{ .name = "common", .irq = 17 },</div><div class='ctx'> 	{ .name = "tx", .irq = 62 },</div><div class='ctx'> 	{ .name = "rx", .irq = 63 },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "mpu",</div><div class='del'>-		.pa_start	= 0x49022000,</div><div class='del'>-		.pa_end		= 0x490220ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mcbsp2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_mcbsp2_hwmod,</div><div class='del'>-	.clk		= "mcbsp2_ick",</div><div class='del'>-	.addr		= omap3xxx_mcbsp2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_mcbsp2_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__mcbsp2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_mcbsp_dev_attr omap34xx_mcbsp2_dev_attr = {</div><div class='ctx'> 	.sidetone	= "mcbsp2_sidetone",</div><div class='ctx'> };</div><div class='hunk'>@@ -2352,45 +1126,19 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_mcbsp2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mcbsp2_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;omap34xx_mcbsp2_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp3 */</div><div class='ctx'> static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = {</div><div class='del'>-	{ .name = "irq", .irq = 22 },</div><div class='add'>+	{ .name = "common", .irq = 22 },</div><div class='ctx'> 	{ .name = "tx", .irq = 89 },</div><div class='ctx'> 	{ .name = "rx", .irq = 90 },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "mpu",</div><div class='del'>-		.pa_start	= 0x49024000,</div><div class='del'>-		.pa_end		= 0x490240ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mcbsp3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_mcbsp3_hwmod,</div><div class='del'>-	.clk		= "mcbsp3_ick",</div><div class='del'>-	.addr		= omap3xxx_mcbsp3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp3 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_mcbsp3_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__mcbsp3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_mcbsp_dev_attr omap34xx_mcbsp3_dev_attr = {</div><div class='del'>-	.sidetone       = "mcbsp3_sidetone",</div><div class='add'>+	.sidetone	= "mcbsp3_sidetone",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {</div><div class='hunk'>@@ -2408,14 +1156,12 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_mcbsp3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mcbsp3_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;omap34xx_mcbsp3_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp4 */</div><div class='ctx'> static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = {</div><div class='del'>-	{ .name = "irq", .irq = 23 },</div><div class='add'>+	{ .name = "common", .irq = 23 },</div><div class='ctx'> 	{ .name = "tx", .irq = 54 },</div><div class='ctx'> 	{ .name = "rx", .irq = 55 },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -2427,30 +1173,6 @@ static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "mpu",</div><div class='del'>-		.pa_start	= 0x49026000,</div><div class='del'>-		.pa_end		= 0x490260ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mcbsp4 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_mcbsp4_hwmod,</div><div class='del'>-	.clk		= "mcbsp4_ick",</div><div class='del'>-	.addr		= omap3xxx_mcbsp4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp4 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_mcbsp4_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__mcbsp4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {</div><div class='ctx'> 	.name		= "mcbsp4",</div><div class='ctx'> 	.class		= &amp;omap3xxx_mcbsp_hwmod_class,</div><div class='hunk'>@@ -2466,13 +1188,11 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_mcbsp4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mcbsp4_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp5 */</div><div class='ctx'> static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = {</div><div class='del'>-	{ .name = "irq", .irq = 27 },</div><div class='add'>+	{ .name = "common", .irq = 27 },</div><div class='ctx'> 	{ .name = "tx", .irq = 81 },</div><div class='ctx'> 	{ .name = "rx", .irq = 82 },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -2484,30 +1204,6 @@ static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "mpu",</div><div class='del'>-		.pa_start	= 0x48096000,</div><div class='del'>-		.pa_end		= 0x480960ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; mcbsp5 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_mcbsp5_hwmod,</div><div class='del'>-	.clk		= "mcbsp5_ick",</div><div class='del'>-	.addr		= omap3xxx_mcbsp5_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp5 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_mcbsp5_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__mcbsp5,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {</div><div class='ctx'> 	.name		= "mcbsp5",</div><div class='ctx'> 	.class		= &amp;omap3xxx_mcbsp_hwmod_class,</div><div class='hunk'>@@ -2523,11 +1219,9 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_mcbsp5_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mcbsp5_slaves),</div><div class='ctx'> };</div><div class='del'>-/* 'mcbsp sidetone' class */</div><div class='ctx'> </div><div class='add'>+/* 'mcbsp sidetone' class */</div><div class='ctx'> static struct omap_hwmod_class_sysconfig omap3xxx_mcbsp_sidetone_sysc = {</div><div class='ctx'> 	.sysc_offs	= 0x0010,</div><div class='ctx'> 	.sysc_flags	= SYSC_HAS_AUTOIDLE,</div><div class='hunk'>@@ -2545,30 +1239,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "sidetone",</div><div class='del'>-		.pa_start	= 0x49028000,</div><div class='del'>-		.pa_end		= 0x490280ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mcbsp2_sidetone */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_sidetone = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_mcbsp2_sidetone_hwmod,</div><div class='del'>-	.clk		= "mcbsp2_ick",</div><div class='del'>-	.addr		= omap3xxx_mcbsp2_sidetone_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp2_sidetone slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_mcbsp2_sidetone_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__mcbsp2_sidetone,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {</div><div class='ctx'> 	.name		= "mcbsp2_sidetone",</div><div class='ctx'> 	.class		= &amp;omap3xxx_mcbsp_sidetone_hwmod_class,</div><div class='hunk'>@@ -2583,8 +1253,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_mcbsp2_sidetone_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp3_sidetone */</div><div class='hunk'>@@ -2593,30 +1261,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "sidetone",</div><div class='del'>-		.pa_start	= 0x4902A000,</div><div class='del'>-		.pa_end		= 0x4902A0ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mcbsp3_sidetone */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_sidetone = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_mcbsp3_sidetone_hwmod,</div><div class='del'>-	.clk		= "mcbsp3_ick",</div><div class='del'>-	.addr		= omap3xxx_mcbsp3_sidetone_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp3_sidetone slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_mcbsp3_sidetone_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_per__mcbsp3_sidetone,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {</div><div class='ctx'> 	.name		= "mcbsp3_sidetone",</div><div class='ctx'> 	.class		= &amp;omap3xxx_mcbsp_sidetone_hwmod_class,</div><div class='hunk'>@@ -2631,11 +1275,8 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_mcbsp3_sidetone_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /* SR common */</div><div class='ctx'> static struct omap_hwmod_sysc_fields omap34xx_sr_sysc_fields = {</div><div class='ctx'> 	.clkact_shift	= 20,</div><div class='hunk'>@@ -2656,7 +1297,7 @@ static struct omap_hwmod_class omap34xx_smartreflex_hwmod_class = {</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_sysc_fields omap36xx_sr_sysc_fields = {</div><div class='ctx'> 	.sidle_shift	= 24,</div><div class='del'>-	.enwkup_shift	= 26</div><div class='add'>+	.enwkup_shift	= 26,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_class_sysconfig omap36xx_sr_sysc = {</div><div class='hunk'>@@ -2678,12 +1319,13 @@ static struct omap_smartreflex_dev_attr sr1_dev_attr = {</div><div class='ctx'> 	.sensor_voltdm_name   = "mpu_iva",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3_sr1_slaves[] = {</div><div class='del'>-	&amp;omap3_l4_core__sr1,</div><div class='add'>+static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = {</div><div class='add'>+	{ .irq = 18 },</div><div class='add'>+	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod omap34xx_sr1_hwmod = {</div><div class='del'>-	.name		= "sr1_hwmod",</div><div class='add'>+	.name		= "sr1",</div><div class='ctx'> 	.class		= &amp;omap34xx_smartreflex_hwmod_class,</div><div class='ctx'> 	.main_clk	= "sr1_fck",</div><div class='ctx'> 	.prcm		= {</div><div class='hunk'>@@ -2695,15 +1337,13 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_EN_SR1_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3_sr1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3_sr1_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;sr1_dev_attr,</div><div class='ctx'> 	.mpu_irqs	= omap3_smartreflex_mpu_irqs,</div><div class='ctx'> 	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod omap36xx_sr1_hwmod = {</div><div class='del'>-	.name		= "sr1_hwmod",</div><div class='add'>+	.name		= "sr1",</div><div class='ctx'> 	.class		= &amp;omap36xx_smartreflex_hwmod_class,</div><div class='ctx'> 	.main_clk	= "sr1_fck",</div><div class='ctx'> 	.prcm		= {</div><div class='hunk'>@@ -2715,8 +1355,6 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_EN_SR1_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3_sr1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3_sr1_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;sr1_dev_attr,</div><div class='ctx'> 	.mpu_irqs	= omap3_smartreflex_mpu_irqs,</div><div class='ctx'> };</div><div class='hunk'>@@ -2726,12 +1364,13 @@ static struct omap_smartreflex_dev_attr sr2_dev_attr = {</div><div class='ctx'> 	.sensor_voltdm_name	= "core",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3_sr2_slaves[] = {</div><div class='del'>-	&amp;omap3_l4_core__sr2,</div><div class='add'>+static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = {</div><div class='add'>+	{ .irq = 19 },</div><div class='add'>+	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod omap34xx_sr2_hwmod = {</div><div class='del'>-	.name		= "sr2_hwmod",</div><div class='add'>+	.name		= "sr2",</div><div class='ctx'> 	.class		= &amp;omap34xx_smartreflex_hwmod_class,</div><div class='ctx'> 	.main_clk	= "sr2_fck",</div><div class='ctx'> 	.prcm		= {</div><div class='hunk'>@@ -2743,15 +1382,13 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_EN_SR2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3_sr2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3_sr2_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;sr2_dev_attr,</div><div class='ctx'> 	.mpu_irqs	= omap3_smartreflex_core_irqs,</div><div class='ctx'> 	.flags		= HWMOD_SET_DEFAULT_CLOCKACT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod omap36xx_sr2_hwmod = {</div><div class='del'>-	.name		= "sr2_hwmod",</div><div class='add'>+	.name		= "sr2",</div><div class='ctx'> 	.class		= &amp;omap36xx_smartreflex_hwmod_class,</div><div class='ctx'> 	.main_clk	= "sr2_fck",</div><div class='ctx'> 	.prcm		= {</div><div class='hunk'>@@ -2763,8 +1400,6 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_EN_SR2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3_sr2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3_sr2_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;sr2_dev_attr,</div><div class='ctx'> 	.mpu_irqs	= omap3_smartreflex_core_irqs,</div><div class='ctx'> };</div><div class='hunk'>@@ -2790,34 +1425,11 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = {</div><div class='ctx'> 	.sysc = &amp;omap3xxx_mailbox_sysc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap3xxx_mailbox_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = {</div><div class='ctx'> 	{ .irq = 26 },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48094000,</div><div class='del'>-		.pa_end		= 0x480941ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT,</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_core -&gt; mailbox */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__mailbox = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_mailbox_hwmod,</div><div class='del'>-	.addr		= omap3xxx_mailbox_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mailbox slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_mailbox_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__mailbox,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_mailbox_hwmod = {</div><div class='ctx'> 	.name		= "mailbox",</div><div class='ctx'> 	.class		= &amp;omap3xxx_mailbox_hwmod_class,</div><div class='hunk'>@@ -2832,53 +1444,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MAILBOXES_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_mailbox_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mailbox_slaves),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4 core -&gt; mcspi1 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap34xx_mcspi1,</div><div class='del'>-	.clk		= "mcspi1_ick",</div><div class='del'>-	.addr		= omap2_mcspi1_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4 core -&gt; mcspi2 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap34xx_mcspi2,</div><div class='del'>-	.clk		= "mcspi2_ick",</div><div class='del'>-	.addr		= omap2_mcspi2_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4 core -&gt; mcspi3 interface */</div><div class='del'>-static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap34xx_mcspi3,</div><div class='del'>-	.clk		= "mcspi3_ick",</div><div class='del'>-	.addr		= omap2430_mcspi3_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4 core -&gt; mcspi4 interface */</div><div class='del'>-static struct omap_hwmod_addr_space omap34xx_mcspi4_addr_space[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x480ba000,</div><div class='del'>-		.pa_end		= 0x480ba0ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT,</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap34xx_mcspi4,</div><div class='del'>-	.clk		= "mcspi4_ick",</div><div class='del'>-	.addr		= omap34xx_mcspi4_addr_space,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2905,10 +1470,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcspi1 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = {</div><div class='del'>-	&amp;omap34xx_l4_core__mcspi1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {</div><div class='ctx'> 	.num_chipselect = 4,</div><div class='ctx'> };</div><div class='hunk'>@@ -2927,17 +1488,11 @@ static struct omap_hwmod omap34xx_mcspi1 = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MCSPI1_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap34xx_mcspi1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap34xx_mcspi1_slaves),</div><div class='ctx'> 	.class		= &amp;omap34xx_mcspi_class,</div><div class='ctx'> 	.dev_attr       = &amp;omap_mcspi1_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcspi2 */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = {</div><div class='del'>-	&amp;omap34xx_l4_core__mcspi2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {</div><div class='ctx'> 	.num_chipselect = 2,</div><div class='ctx'> };</div><div class='hunk'>@@ -2956,8 +1511,6 @@ static struct omap_hwmod omap34xx_mcspi2 = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MCSPI2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap34xx_mcspi2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap34xx_mcspi2_slaves),</div><div class='ctx'> 	.class		= &amp;omap34xx_mcspi_class,</div><div class='ctx'> 	.dev_attr       = &amp;omap_mcspi2_dev_attr,</div><div class='ctx'> };</div><div class='hunk'>@@ -2976,10 +1529,6 @@ static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap34xx_mcspi3_slaves[] = {</div><div class='del'>-	&amp;omap34xx_l4_core__mcspi3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {</div><div class='ctx'> 	.num_chipselect = 2,</div><div class='ctx'> };</div><div class='hunk'>@@ -2998,13 +1547,11 @@ static struct omap_hwmod omap34xx_mcspi3 = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MCSPI3_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap34xx_mcspi3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap34xx_mcspi3_slaves),</div><div class='ctx'> 	.class		= &amp;omap34xx_mcspi_class,</div><div class='ctx'> 	.dev_attr       = &amp;omap_mcspi3_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* SPI4 */</div><div class='add'>+/* mcspi4 */</div><div class='ctx'> static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = {</div><div class='ctx'> 	{ .name = "irq", .irq = INT_34XX_SPI4_IRQ }, /* 48 */</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -3016,10 +1563,6 @@ static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap34xx_mcspi4_slaves[] = {</div><div class='del'>-	&amp;omap34xx_l4_core__mcspi4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = {</div><div class='ctx'> 	.num_chipselect = 1,</div><div class='ctx'> };</div><div class='hunk'>@@ -3038,15 +1581,11 @@ static struct omap_hwmod omap34xx_mcspi4 = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MCSPI4_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap34xx_mcspi4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap34xx_mcspi4_slaves),</div><div class='ctx'> 	.class		= &amp;omap34xx_mcspi_class,</div><div class='ctx'> 	.dev_attr       = &amp;omap_mcspi4_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * usbhsotg</div><div class='del'>- */</div><div class='add'>+/* usbhsotg */</div><div class='ctx'> static struct omap_hwmod_class_sysconfig omap3xxx_usbhsotg_sysc = {</div><div class='ctx'> 	.rev_offs	= 0x0400,</div><div class='ctx'> 	.sysc_offs	= 0x0404,</div><div class='hunk'>@@ -3063,6 +1602,7 @@ static struct omap_hwmod_class usbotg_class = {</div><div class='ctx'> 	.name = "usbotg",</div><div class='ctx'> 	.sysc = &amp;omap3xxx_usbhsotg_sysc,</div><div class='ctx'> };</div><div class='add'>+</div><div class='ctx'> /* usb_otg_hs */</div><div class='ctx'> static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = {</div><div class='ctx'> </div><div class='hunk'>@@ -3085,10 +1625,6 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {</div><div class='ctx'> 			.idlest_stdby_bit = OMAP3430ES2_ST_HSOTGUSB_STDBY_SHIFT</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.masters	= omap3xxx_usbhsotg_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap3xxx_usbhsotg_masters),</div><div class='del'>-	.slaves		= omap3xxx_usbhsotg_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_usbhsotg_slaves),</div><div class='ctx'> 	.class		= &amp;usbotg_class,</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -3120,15 +1656,10 @@ static struct omap_hwmod am35xx_usbhsotg_hwmod = {</div><div class='ctx'> 		.omap2 = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.masters	= am35xx_usbhsotg_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(am35xx_usbhsotg_masters),</div><div class='del'>-	.slaves		= am35xx_usbhsotg_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(am35xx_usbhsotg_slaves),</div><div class='ctx'> 	.class		= &amp;am35xx_usbotg_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* MMC/SD/SDIO common */</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_class_sysconfig omap34xx_mmc_sysc = {</div><div class='ctx'> 	.rev_offs	= 0x1fc,</div><div class='ctx'> 	.sysc_offs	= 0x10,</div><div class='hunk'>@@ -3162,10 +1693,6 @@ static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbck", .clk = "omap_32k_fck", },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_mmc1_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__mmc1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_mmc_dev_attr mmc1_dev_attr = {</div><div class='ctx'> 	.flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,</div><div class='ctx'> };</div><div class='hunk'>@@ -3193,8 +1720,6 @@ static struct omap_hwmod omap3xxx_pre_es3_mmc1_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;mmc1_pre_es3_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_mmc1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mmc1_slaves),</div><div class='ctx'> 	.class		= &amp;omap34xx_mmc_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3215,8 +1740,6 @@ static struct omap_hwmod omap3xxx_es3plus_mmc1_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;mmc1_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_mmc1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mmc1_slaves),</div><div class='ctx'> 	.class		= &amp;omap34xx_mmc_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3237,10 +1760,6 @@ static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbck", .clk = "omap_32k_fck", },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__mmc2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* See 35xx errata 2.1.1.128 in SPRZ278F */</div><div class='ctx'> static struct omap_mmc_dev_attr mmc2_pre_es3_dev_attr = {</div><div class='ctx'> 	.flags = OMAP_HSMMC_BROKEN_MULTIBLOCK_READ,</div><div class='hunk'>@@ -3263,8 +1782,6 @@ static struct omap_hwmod omap3xxx_pre_es3_mmc2_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;mmc2_pre_es3_dev_attr,</div><div class='del'>-	.slaves		= omap3xxx_mmc2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mmc2_slaves),</div><div class='ctx'> 	.class		= &amp;omap34xx_mmc_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3284,8 +1801,6 @@ static struct omap_hwmod omap3xxx_es3plus_mmc2_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MMC2_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_mmc2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mmc2_slaves),</div><div class='ctx'> 	.class		= &amp;omap34xx_mmc_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3306,10 +1821,6 @@ static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbck", .clk = "omap_32k_fck", },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_mmc3_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__mmc3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap3xxx_mmc3_hwmod = {</div><div class='ctx'> 	.name		= "mmc3",</div><div class='ctx'> 	.mpu_irqs	= omap34xx_mmc3_mpu_irqs,</div><div class='hunk'>@@ -3325,8 +1836,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {</div><div class='ctx'> 			.idlest_idle_bit = OMAP3430_ST_MMC3_SHIFT,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_mmc3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_mmc3_slaves),</div><div class='ctx'> 	.class		= &amp;omap34xx_mmc_class,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3334,12 +1843,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {</div><div class='ctx'>  * 'usb_host_hs' class</div><div class='ctx'>  * high-speed multi-port usb host controller</div><div class='ctx'>  */</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_usb_host_hs__l3_main_2 = {</div><div class='del'>-	.master		= &amp;omap3xxx_usb_host_hs_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_l3_main_hwmod,</div><div class='del'>-	.clk		= "core_l3_ick",</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_class_sysconfig omap3xxx_usb_host_hs_sysc = {</div><div class='ctx'> 	.rev_offs	= 0x0000,</div><div class='hunk'>@@ -3358,42 +1861,6 @@ static struct omap_hwmod_class omap3xxx_usb_host_hs_hwmod_class = {</div><div class='ctx'> 	.sysc = &amp;omap3xxx_usb_host_hs_sysc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_usb_host_hs_masters[] = {</div><div class='del'>-	&amp;omap3xxx_usb_host_hs__l3_main_2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap3xxx_usb_host_hs_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "uhh",</div><div class='del'>-		.pa_start	= 0x48064000,</div><div class='del'>-		.pa_end		= 0x480643ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "ohci",</div><div class='del'>-		.pa_start	= 0x48064400,</div><div class='del'>-		.pa_end		= 0x480647ff,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "ehci",</div><div class='del'>-		.pa_start	= 0x48064800,</div><div class='del'>-		.pa_end		= 0x48064cff,</div><div class='del'>-	},</div><div class='del'>-	{}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_host_hs = {</div><div class='del'>-	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	.slave		= &amp;omap3xxx_usb_host_hs_hwmod,</div><div class='del'>-	.clk		= "usbhost_ick",</div><div class='del'>-	.addr		= omap3xxx_usb_host_hs_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_usb_host_hs_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__usb_host_hs,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk omap3xxx_usb_host_hs_opt_clks[] = {</div><div class='ctx'> 	  { .role = "ehci_logic_fck", .clk = "usbhost_120m_fck", },</div><div class='ctx'> };</div><div class='hunk'>@@ -3422,10 +1889,6 @@ static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= omap3xxx_usb_host_hs_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(omap3xxx_usb_host_hs_opt_clks),</div><div class='del'>-	.slaves		= omap3xxx_usb_host_hs_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_usb_host_hs_slaves),</div><div class='del'>-	.masters	= omap3xxx_usb_host_hs_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap3xxx_usb_host_hs_masters),</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock</div><div class='hunk'>@@ -3501,6 +1964,1134 @@ static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {</div><div class='add'>+	.name		= "usb_tll_hs",</div><div class='add'>+	.class		= &amp;omap3xxx_usb_tll_hs_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l3_init_clkdm",</div><div class='add'>+	.mpu_irqs	= omap3xxx_usb_tll_hs_irqs,</div><div class='add'>+	.main_clk	= "usbtll_fck",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.prcm_reg_id = 3,</div><div class='add'>+			.module_bit = OMAP3430ES2_EN_USBTLL_SHIFT,</div><div class='add'>+			.idlest_reg_id = 3,</div><div class='add'>+			.idlest_idle_bit = OMAP3430ES2_ST_USBTLL_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap3xxx_hdq1w_hwmod = {</div><div class='add'>+	.name		= "hdq1w",</div><div class='add'>+	.mpu_irqs	= omap2_hdq1w_mpu_irqs,</div><div class='add'>+	.main_clk	= "hdq_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.module_offs = CORE_MOD,</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP3430_EN_HDQ_SHIFT,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP3430_ST_HDQ_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.class		= &amp;omap2_hdq1w_class,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * '32K sync counter' class</div><div class='add'>+ * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock</div><div class='add'>+ */</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap3xxx_counter_sysc = {</div><div class='add'>+	.rev_offs	= 0x0000,</div><div class='add'>+	.sysc_offs	= 0x0004,</div><div class='add'>+	.sysc_flags	= SYSC_HAS_SIDLEMODE,</div><div class='add'>+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap3xxx_counter_hwmod_class = {</div><div class='add'>+	.name	= "counter",</div><div class='add'>+	.sysc	= &amp;omap3xxx_counter_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap3xxx_counter_32k_hwmod = {</div><div class='add'>+	.name		= "counter_32k",</div><div class='add'>+	.class		= &amp;omap3xxx_counter_hwmod_class,</div><div class='add'>+	.clkdm_name	= "wkup_clkdm",</div><div class='add'>+	.flags		= HWMOD_SWSUP_SIDLE,</div><div class='add'>+	.main_clk	= "wkup_32k_fck",</div><div class='add'>+	.prcm		= {</div><div class='add'>+		.omap2	= {</div><div class='add'>+			.module_offs = WKUP_MOD,</div><div class='add'>+			.prcm_reg_id = 1,</div><div class='add'>+			.module_bit = OMAP3430_ST_32KSYNC_SHIFT,</div><div class='add'>+			.idlest_reg_id = 1,</div><div class='add'>+			.idlest_idle_bit = OMAP3430_ST_32KSYNC_SHIFT,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * interfaces</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* L3 -&gt; L4_CORE interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {</div><div class='add'>+	.master	= &amp;omap3xxx_l3_main_hwmod,</div><div class='add'>+	.slave	= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L3 -&gt; L4_PER interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = {</div><div class='add'>+	.master = &amp;omap3xxx_l3_main_hwmod,</div><div class='add'>+	.slave	= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x68000000,</div><div class='add'>+		.pa_end		= 0x6800ffff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MPU -&gt; L3 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = {</div><div class='add'>+	.master   = &amp;omap3xxx_mpu_hwmod,</div><div class='add'>+	.slave    = &amp;omap3xxx_l3_main_hwmod,</div><div class='add'>+	.addr     = omap3xxx_l3_main_addrs,</div><div class='add'>+	.user	= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* DSS -&gt; l3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3430es1_dss__l3 = {</div><div class='add'>+	.master		= &amp;omap3430es1_dss_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_l3_main_hwmod,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_dss__l3 = {</div><div class='add'>+	.master		= &amp;omap3xxx_dss_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_l3_main_hwmod,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l3_perm_bit  = OMAP3_L3_CORE_FW_INIT_ID_DSS,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L3,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_core -&gt; usbhsotg interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_usbhsotg__l3 = {</div><div class='add'>+	.master		= &amp;omap3xxx_usbhsotg_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_l3_main_hwmod,</div><div class='add'>+	.clk		= "core_l3_ick",</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_core -&gt; am35xx_usbhsotg interface */</div><div class='add'>+static struct omap_hwmod_ocp_if am35xx_usbhsotg__l3 = {</div><div class='add'>+	.master		= &amp;am35xx_usbhsotg_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_l3_main_hwmod,</div><div class='add'>+	.clk		= "core_l3_ick",</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+/* L4_CORE -&gt; L4_WKUP interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {</div><div class='add'>+	.master	= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave	= &amp;omap3xxx_l4_wkup_hwmod,</div><div class='add'>+	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; MMC1 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__pre_es3_mmc1 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_pre_es3_mmc1_hwmod,</div><div class='add'>+	.clk		= "mmchs1_ick",</div><div class='add'>+	.addr		= omap2430_mmc1_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+	.flags		= OMAP_FIREWALL_L4</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__es3plus_mmc1 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_es3plus_mmc1_hwmod,</div><div class='add'>+	.clk		= "mmchs1_ick",</div><div class='add'>+	.addr		= omap2430_mmc1_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+	.flags		= OMAP_FIREWALL_L4</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; MMC2 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__pre_es3_mmc2 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_pre_es3_mmc2_hwmod,</div><div class='add'>+	.clk		= "mmchs2_ick",</div><div class='add'>+	.addr		= omap2430_mmc2_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+	.flags		= OMAP_FIREWALL_L4</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__es3plus_mmc2 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_es3plus_mmc2_hwmod,</div><div class='add'>+	.clk		= "mmchs2_ick",</div><div class='add'>+	.addr		= omap2430_mmc2_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+	.flags		= OMAP_FIREWALL_L4</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; MMC3 interface */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_mmc3_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x480ad000,</div><div class='add'>+		.pa_end		= 0x480ad1ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_mmc3_hwmod,</div><div class='add'>+	.clk		= "mmchs3_ick",</div><div class='add'>+	.addr		= omap3xxx_mmc3_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+	.flags		= OMAP_FIREWALL_L4</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; UART1 interface */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_uart1_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= OMAP3_UART1_BASE,</div><div class='add'>+		.pa_end		= OMAP3_UART1_BASE + SZ_8K - 1,</div><div class='add'>+		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_uart1_hwmod,</div><div class='add'>+	.clk		= "uart1_ick",</div><div class='add'>+	.addr		= omap3xxx_uart1_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; UART2 interface */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_uart2_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= OMAP3_UART2_BASE,</div><div class='add'>+		.pa_end		= OMAP3_UART2_BASE + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_uart2_hwmod,</div><div class='add'>+	.clk		= "uart2_ick",</div><div class='add'>+	.addr		= omap3xxx_uart2_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 PER -&gt; UART3 interface */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_uart3_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= OMAP3_UART3_BASE,</div><div class='add'>+		.pa_end		= OMAP3_UART3_BASE + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_uart3_hwmod,</div><div class='add'>+	.clk		= "uart3_ick",</div><div class='add'>+	.addr		= omap3xxx_uart3_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 PER -&gt; UART4 interface */</div><div class='add'>+static struct omap_hwmod_addr_space omap36xx_uart4_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= OMAP3_UART4_BASE,</div><div class='add'>+		.pa_end		= OMAP3_UART4_BASE + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap36xx_l4_per__uart4 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap36xx_uart4_hwmod,</div><div class='add'>+	.clk		= "uart4_ick",</div><div class='add'>+	.addr		= omap36xx_uart4_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* AM35xx: L4 CORE -&gt; UART4 interface */</div><div class='add'>+static struct omap_hwmod_addr_space am35xx_uart4_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= OMAP3_UART4_AM35XX_BASE,</div><div class='add'>+		.pa_end		= OMAP3_UART4_AM35XX_BASE + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_MAP_ON_INIT | ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if am35xx_l4_core__uart4 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;am35xx_uart4_hwmod,</div><div class='add'>+	.clk		= "uart4_ick",</div><div class='add'>+	.addr		= am35xx_uart4_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; I2C1 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_i2c1_hwmod,</div><div class='add'>+	.clk		= "i2c1_ick",</div><div class='add'>+	.addr		= omap2_i2c1_addr_space,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP3_L4_CORE_FW_I2C1_REGION,</div><div class='add'>+			.l4_prot_group = 7,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; I2C2 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_i2c2_hwmod,</div><div class='add'>+	.clk		= "i2c2_ick",</div><div class='add'>+	.addr		= omap2_i2c2_addr_space,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP3_L4_CORE_FW_I2C2_REGION,</div><div class='add'>+			.l4_prot_group = 7,</div><div class='add'>+			.flags = OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; I2C3 interface */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48060000,</div><div class='add'>+		.pa_end		= 0x48060000 + SZ_128 - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_i2c3_hwmod,</div><div class='add'>+	.clk		= "i2c3_ick",</div><div class='add'>+	.addr		= omap3xxx_i2c3_addr_space,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP3_L4_CORE_FW_I2C3_REGION,</div><div class='add'>+			.l4_prot_group = 7,</div><div class='add'>+			.flags = OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; SR1 interface */</div><div class='add'>+static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= OMAP34XX_SR1_BASE,</div><div class='add'>+		.pa_end		= OMAP34XX_SR1_BASE + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap34xx_l4_core__sr1 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap34xx_sr1_hwmod,</div><div class='add'>+	.clk		= "sr_l4_ick",</div><div class='add'>+	.addr		= omap3_sr1_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap36xx_l4_core__sr1 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap36xx_sr1_hwmod,</div><div class='add'>+	.clk		= "sr_l4_ick",</div><div class='add'>+	.addr		= omap3_sr1_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4 CORE -&gt; SR1 interface */</div><div class='add'>+static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= OMAP34XX_SR2_BASE,</div><div class='add'>+		.pa_end		= OMAP34XX_SR2_BASE + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap34xx_l4_core__sr2 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap34xx_sr2_hwmod,</div><div class='add'>+	.clk		= "sr_l4_ick",</div><div class='add'>+	.addr		= omap3_sr2_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap36xx_l4_core__sr2 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap36xx_sr2_hwmod,</div><div class='add'>+	.clk		= "sr_l4_ick",</div><div class='add'>+	.addr		= omap3_sr2_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= OMAP34XX_HSUSB_OTG_BASE,</div><div class='add'>+		.pa_end		= OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; usbhsotg  */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_usbhsotg_hwmod,</div><div class='add'>+	.clk		= "l4_ick",</div><div class='add'>+	.addr		= omap3xxx_usbhsotg_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= AM35XX_IPSS_USBOTGSS_BASE,</div><div class='add'>+		.pa_end		= AM35XX_IPSS_USBOTGSS_BASE + SZ_4K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; usbhsotg  */</div><div class='add'>+static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;am35xx_usbhsotg_hwmod,</div><div class='add'>+	.clk		= "l4_ick",</div><div class='add'>+	.addr		= am35xx_usbhsotg_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* L4_WKUP -&gt; L4_SEC interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__l4_sec = {</div><div class='add'>+	.master = &amp;omap3xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave	= &amp;omap3xxx_l4_sec_hwmod,</div><div class='add'>+	.user	= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* IVA2 &lt;- L3 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l3__iva = {</div><div class='add'>+	.master		= &amp;omap3xxx_l3_main_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_iva_hwmod,</div><div class='add'>+	.clk		= "core_l3_ick",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48318000,</div><div class='add'>+		.pa_end		= 0x48318000 + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; timer1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_timer1_hwmod,</div><div class='add'>+	.clk		= "gpt1_ick",</div><div class='add'>+	.addr		= omap3xxx_timer1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49032000,</div><div class='add'>+		.pa_end		= 0x49032000 + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_timer2_hwmod,</div><div class='add'>+	.clk		= "gpt2_ick",</div><div class='add'>+	.addr		= omap3xxx_timer2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49034000,</div><div class='add'>+		.pa_end		= 0x49034000 + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_timer3_hwmod,</div><div class='add'>+	.clk		= "gpt3_ick",</div><div class='add'>+	.addr		= omap3xxx_timer3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49036000,</div><div class='add'>+		.pa_end		= 0x49036000 + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer4 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer4 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_timer4_hwmod,</div><div class='add'>+	.clk		= "gpt4_ick",</div><div class='add'>+	.addr		= omap3xxx_timer4_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49038000,</div><div class='add'>+		.pa_end		= 0x49038000 + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer5 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer5 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_timer5_hwmod,</div><div class='add'>+	.clk		= "gpt5_ick",</div><div class='add'>+	.addr		= omap3xxx_timer5_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4903A000,</div><div class='add'>+		.pa_end		= 0x4903A000 + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer6 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer6 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_timer6_hwmod,</div><div class='add'>+	.clk		= "gpt6_ick",</div><div class='add'>+	.addr		= omap3xxx_timer6_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4903C000,</div><div class='add'>+		.pa_end		= 0x4903C000 + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer7 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer7 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_timer7_hwmod,</div><div class='add'>+	.clk		= "gpt7_ick",</div><div class='add'>+	.addr		= omap3xxx_timer7_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4903E000,</div><div class='add'>+		.pa_end		= 0x4903E000 + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer8 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer8 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_timer8_hwmod,</div><div class='add'>+	.clk		= "gpt8_ick",</div><div class='add'>+	.addr		= omap3xxx_timer8_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49040000,</div><div class='add'>+		.pa_end		= 0x49040000 + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer9 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer9 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_timer9_hwmod,</div><div class='add'>+	.clk		= "gpt9_ick",</div><div class='add'>+	.addr		= omap3xxx_timer9_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer10 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_timer10_hwmod,</div><div class='add'>+	.clk		= "gpt10_ick",</div><div class='add'>+	.addr		= omap2_timer10_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer11 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_timer11_hwmod,</div><div class='add'>+	.clk		= "gpt11_ick",</div><div class='add'>+	.addr		= omap2_timer11_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48304000,</div><div class='add'>+		.pa_end		= 0x48304000 + SZ_1K - 1,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; timer12 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_sec__timer12 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_sec_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_timer12_hwmod,</div><div class='add'>+	.clk		= "gpt12_ick",</div><div class='add'>+	.addr		= omap3xxx_timer12_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; wd_timer2 */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48314000,</div><div class='add'>+		.pa_end		= 0x4831407f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_wd_timer2_hwmod,</div><div class='add'>+	.clk		= "wdt2_ick",</div><div class='add'>+	.addr		= omap3xxx_wd_timer2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; dss */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3430es1_dss_core_hwmod,</div><div class='add'>+	.clk		= "dss_ick",</div><div class='add'>+	.addr		= omap2_dss_addrs,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION,</div><div class='add'>+			.l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_dss_core_hwmod,</div><div class='add'>+	.clk		= "dss_ick",</div><div class='add'>+	.addr		= omap2_dss_addrs,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP3_L4_CORE_FW_DSS_CORE_REGION,</div><div class='add'>+			.l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; dss_dispc */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_dss_dispc_hwmod,</div><div class='add'>+	.clk		= "dss_ick",</div><div class='add'>+	.addr		= omap2_dss_dispc_addrs,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP3_L4_CORE_FW_DSS_DISPC_REGION,</div><div class='add'>+			.l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4804FC00,</div><div class='add'>+		.pa_end		= 0x4804FFFF,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; dss_dsi1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_dss_dsi1_hwmod,</div><div class='add'>+	.clk		= "dss_ick",</div><div class='add'>+	.addr		= omap3xxx_dss_dsi1_addrs,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP3_L4_CORE_FW_DSS_DSI_REGION,</div><div class='add'>+			.l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; dss_rfbi */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_dss_rfbi_hwmod,</div><div class='add'>+	.clk		= "dss_ick",</div><div class='add'>+	.addr		= omap2_dss_rfbi_addrs,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP3_L4_CORE_FW_DSS_RFBI_REGION,</div><div class='add'>+			.l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP ,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; dss_venc */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_dss_venc_hwmod,</div><div class='add'>+	.clk		= "dss_ick",</div><div class='add'>+	.addr		= omap2_dss_venc_addrs,</div><div class='add'>+	.fw = {</div><div class='add'>+		.omap2 = {</div><div class='add'>+			.l4_fw_region  = OMAP3_L4_CORE_FW_DSS_VENC_REGION,</div><div class='add'>+			.l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,</div><div class='add'>+			.flags	= OMAP_FIREWALL_L4,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	.flags		= OCPIF_SWSUP_IDLE,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; gpio1 */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_gpio1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48310000,</div><div class='add'>+		.pa_end		= 0x483101ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__gpio1 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_gpio1_hwmod,</div><div class='add'>+	.addr		= omap3xxx_gpio1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; gpio2 */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_gpio2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49050000,</div><div class='add'>+		.pa_end		= 0x490501ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio2 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_gpio2_hwmod,</div><div class='add'>+	.addr		= omap3xxx_gpio2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; gpio3 */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_gpio3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49052000,</div><div class='add'>+		.pa_end		= 0x490521ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio3 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_gpio3_hwmod,</div><div class='add'>+	.addr		= omap3xxx_gpio3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; gpio4 */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49054000,</div><div class='add'>+		.pa_end		= 0x490541ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio4 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_gpio4_hwmod,</div><div class='add'>+	.addr		= omap3xxx_gpio4_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; gpio5 */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_gpio5_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49056000,</div><div class='add'>+		.pa_end		= 0x490561ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio5 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_gpio5_hwmod,</div><div class='add'>+	.addr		= omap3xxx_gpio5_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; gpio6 */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_gpio6_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49058000,</div><div class='add'>+		.pa_end		= 0x490581ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio6 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_gpio6_hwmod,</div><div class='add'>+	.addr		= omap3xxx_gpio6_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dma_system -&gt; L3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_dma_system__l3 = {</div><div class='add'>+	.master		= &amp;omap3xxx_dma_system_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_l3_main_hwmod,</div><div class='add'>+	.clk		= "core_l3_ick",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48056000,</div><div class='add'>+		.pa_end		= 0x48056fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; dma_system */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_dma_system_hwmod,</div><div class='add'>+	.clk		= "core_l4_ick",</div><div class='add'>+	.addr		= omap3xxx_dma_system_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "mpu",</div><div class='add'>+		.pa_start	= 0x48074000,</div><div class='add'>+		.pa_end		= 0x480740ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; mcbsp1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_mcbsp1_hwmod,</div><div class='add'>+	.clk		= "mcbsp1_ick",</div><div class='add'>+	.addr		= omap3xxx_mcbsp1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "mpu",</div><div class='add'>+		.pa_start	= 0x49022000,</div><div class='add'>+		.pa_end		= 0x490220ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mcbsp2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_mcbsp2_hwmod,</div><div class='add'>+	.clk		= "mcbsp2_ick",</div><div class='add'>+	.addr		= omap3xxx_mcbsp2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "mpu",</div><div class='add'>+		.pa_start	= 0x49024000,</div><div class='add'>+		.pa_end		= 0x490240ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mcbsp3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_mcbsp3_hwmod,</div><div class='add'>+	.clk		= "mcbsp3_ick",</div><div class='add'>+	.addr		= omap3xxx_mcbsp3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "mpu",</div><div class='add'>+		.pa_start	= 0x49026000,</div><div class='add'>+		.pa_end		= 0x490260ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mcbsp4 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_mcbsp4_hwmod,</div><div class='add'>+	.clk		= "mcbsp4_ick",</div><div class='add'>+	.addr		= omap3xxx_mcbsp4_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "mpu",</div><div class='add'>+		.pa_start	= 0x48096000,</div><div class='add'>+		.pa_end		= 0x480960ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; mcbsp5 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_mcbsp5_hwmod,</div><div class='add'>+	.clk		= "mcbsp5_ick",</div><div class='add'>+	.addr		= omap3xxx_mcbsp5_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "sidetone",</div><div class='add'>+		.pa_start	= 0x49028000,</div><div class='add'>+		.pa_end		= 0x490280ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mcbsp2_sidetone */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_sidetone = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_mcbsp2_sidetone_hwmod,</div><div class='add'>+	.clk		= "mcbsp2_ick",</div><div class='add'>+	.addr		= omap3xxx_mcbsp2_sidetone_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "sidetone",</div><div class='add'>+		.pa_start	= 0x4902A000,</div><div class='add'>+		.pa_end		= 0x4902A0ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mcbsp3_sidetone */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_sidetone = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_mcbsp3_sidetone_hwmod,</div><div class='add'>+	.clk		= "mcbsp3_ick",</div><div class='add'>+	.addr		= omap3xxx_mcbsp3_sidetone_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48094000,</div><div class='add'>+		.pa_end		= 0x480941ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_core -&gt; mailbox */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__mailbox = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_mailbox_hwmod,</div><div class='add'>+	.addr		= omap3xxx_mailbox_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4 core -&gt; mcspi1 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap34xx_mcspi1,</div><div class='add'>+	.clk		= "mcspi1_ick",</div><div class='add'>+	.addr		= omap2_mcspi1_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4 core -&gt; mcspi2 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap34xx_mcspi2,</div><div class='add'>+	.clk		= "mcspi2_ick",</div><div class='add'>+	.addr		= omap2_mcspi2_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4 core -&gt; mcspi3 interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap34xx_mcspi3,</div><div class='add'>+	.clk		= "mcspi3_ick",</div><div class='add'>+	.addr		= omap2430_mcspi3_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4 core -&gt; mcspi4 interface */</div><div class='add'>+static struct omap_hwmod_addr_space omap34xx_mcspi4_addr_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x480ba000,</div><div class='add'>+		.pa_end		= 0x480ba0ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap34xx_mcspi4,</div><div class='add'>+	.clk		= "mcspi4_ick",</div><div class='add'>+	.addr		= omap34xx_mcspi4_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_usb_host_hs__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap3xxx_usb_host_hs_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_l3_main_hwmod,</div><div class='add'>+	.clk		= "core_l3_ick",</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_usb_host_hs_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "uhh",</div><div class='add'>+		.pa_start	= 0x48064000,</div><div class='add'>+		.pa_end		= 0x480643ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "ohci",</div><div class='add'>+		.pa_start	= 0x48064400,</div><div class='add'>+		.pa_end		= 0x480647ff,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "ehci",</div><div class='add'>+		.pa_start	= 0x48064800,</div><div class='add'>+		.pa_end		= 0x48064cff,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_host_hs = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_usb_host_hs_hwmod,</div><div class='add'>+	.clk		= "usbhost_ick",</div><div class='add'>+	.addr		= omap3xxx_usb_host_hs_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct omap_hwmod_addr_space omap3xxx_usb_tll_hs_addrs[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name		= "tll",</div><div class='hunk'>@@ -3519,183 +3110,187 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_tll_hs = {</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap3xxx_usb_tll_hs_slaves[] = {</div><div class='del'>-	&amp;omap3xxx_l4_core__usb_tll_hs,</div><div class='add'>+/* l4_core -&gt; hdq1w interface */</div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_core__hdq1w = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_core_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_hdq1w_hwmod,</div><div class='add'>+	.clk		= "hdq_ick",</div><div class='add'>+	.addr		= omap2_hdq1w_addr_space,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+	.flags		= OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {</div><div class='del'>-	.name		= "usb_tll_hs",</div><div class='del'>-	.class		= &amp;omap3xxx_usb_tll_hs_hwmod_class,</div><div class='del'>-	.clkdm_name	= "l3_init_clkdm",</div><div class='del'>-	.mpu_irqs	= omap3xxx_usb_tll_hs_irqs,</div><div class='del'>-	.main_clk	= "usbtll_fck",</div><div class='del'>-	.prcm = {</div><div class='del'>-		.omap2 = {</div><div class='del'>-			.module_offs = CORE_MOD,</div><div class='del'>-			.prcm_reg_id = 3,</div><div class='del'>-			.module_bit = OMAP3430ES2_EN_USBTLL_SHIFT,</div><div class='del'>-			.idlest_reg_id = 3,</div><div class='del'>-			.idlest_idle_bit = OMAP3430ES2_ST_USBTLL_SHIFT,</div><div class='del'>-		},</div><div class='add'>+/* l4_wkup -&gt; 32ksync_counter */</div><div class='add'>+static struct omap_hwmod_addr_space omap3xxx_counter_32k_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48320000,</div><div class='add'>+		.pa_end		= 0x4832001f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap3xxx_usb_tll_hs_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap3xxx_usb_tll_hs_slaves),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {</div><div class='del'>-	&amp;omap3xxx_l3_main_hwmod,</div><div class='del'>-	&amp;omap3xxx_l4_core_hwmod,</div><div class='del'>-	&amp;omap3xxx_l4_per_hwmod,</div><div class='del'>-	&amp;omap3xxx_l4_wkup_hwmod,</div><div class='del'>-	&amp;omap3xxx_mmc3_hwmod,</div><div class='del'>-	&amp;omap3xxx_mpu_hwmod,</div><div class='del'>-</div><div class='del'>-	&amp;omap3xxx_timer1_hwmod,</div><div class='del'>-	&amp;omap3xxx_timer2_hwmod,</div><div class='del'>-	&amp;omap3xxx_timer3_hwmod,</div><div class='del'>-	&amp;omap3xxx_timer4_hwmod,</div><div class='del'>-	&amp;omap3xxx_timer5_hwmod,</div><div class='del'>-	&amp;omap3xxx_timer6_hwmod,</div><div class='del'>-	&amp;omap3xxx_timer7_hwmod,</div><div class='del'>-	&amp;omap3xxx_timer8_hwmod,</div><div class='del'>-	&amp;omap3xxx_timer9_hwmod,</div><div class='del'>-	&amp;omap3xxx_timer10_hwmod,</div><div class='del'>-	&amp;omap3xxx_timer11_hwmod,</div><div class='del'>-</div><div class='del'>-	&amp;omap3xxx_wd_timer2_hwmod,</div><div class='del'>-	&amp;omap3xxx_uart1_hwmod,</div><div class='del'>-	&amp;omap3xxx_uart2_hwmod,</div><div class='del'>-	&amp;omap3xxx_uart3_hwmod,</div><div class='del'>-</div><div class='del'>-	/* i2c class */</div><div class='del'>-	&amp;omap3xxx_i2c1_hwmod,</div><div class='del'>-	&amp;omap3xxx_i2c2_hwmod,</div><div class='del'>-	&amp;omap3xxx_i2c3_hwmod,</div><div class='del'>-</div><div class='del'>-	/* gpio class */</div><div class='del'>-	&amp;omap3xxx_gpio1_hwmod,</div><div class='del'>-	&amp;omap3xxx_gpio2_hwmod,</div><div class='del'>-	&amp;omap3xxx_gpio3_hwmod,</div><div class='del'>-	&amp;omap3xxx_gpio4_hwmod,</div><div class='del'>-	&amp;omap3xxx_gpio5_hwmod,</div><div class='del'>-	&amp;omap3xxx_gpio6_hwmod,</div><div class='del'>-</div><div class='del'>-	/* dma_system class*/</div><div class='del'>-	&amp;omap3xxx_dma_system_hwmod,</div><div class='del'>-</div><div class='del'>-	/* mcbsp class */</div><div class='del'>-	&amp;omap3xxx_mcbsp1_hwmod,</div><div class='del'>-	&amp;omap3xxx_mcbsp2_hwmod,</div><div class='del'>-	&amp;omap3xxx_mcbsp3_hwmod,</div><div class='del'>-	&amp;omap3xxx_mcbsp4_hwmod,</div><div class='del'>-	&amp;omap3xxx_mcbsp5_hwmod,</div><div class='del'>-	&amp;omap3xxx_mcbsp2_sidetone_hwmod,</div><div class='del'>-	&amp;omap3xxx_mcbsp3_sidetone_hwmod,</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* mcspi class */</div><div class='del'>-	&amp;omap34xx_mcspi1,</div><div class='del'>-	&amp;omap34xx_mcspi2,</div><div class='del'>-	&amp;omap34xx_mcspi3,</div><div class='del'>-	&amp;omap34xx_mcspi4,</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__counter_32k = {</div><div class='add'>+	.master		= &amp;omap3xxx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap3xxx_counter_32k_hwmod,</div><div class='add'>+	.clk		= "omap_32ksync_ick",</div><div class='add'>+	.addr		= omap3xxx_counter_32k_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_l3_main__l4_core,</div><div class='add'>+	&amp;omap3xxx_l3_main__l4_per,</div><div class='add'>+	&amp;omap3xxx_mpu__l3_main,</div><div class='add'>+	&amp;omap3xxx_l4_core__l4_wkup,</div><div class='add'>+	&amp;omap3xxx_l4_core__mmc3,</div><div class='add'>+	&amp;omap3_l4_core__uart1,</div><div class='add'>+	&amp;omap3_l4_core__uart2,</div><div class='add'>+	&amp;omap3_l4_per__uart3,</div><div class='add'>+	&amp;omap3_l4_core__i2c1,</div><div class='add'>+	&amp;omap3_l4_core__i2c2,</div><div class='add'>+	&amp;omap3_l4_core__i2c3,</div><div class='add'>+	&amp;omap3xxx_l4_wkup__l4_sec,</div><div class='add'>+	&amp;omap3xxx_l4_wkup__timer1,</div><div class='add'>+	&amp;omap3xxx_l4_per__timer2,</div><div class='add'>+	&amp;omap3xxx_l4_per__timer3,</div><div class='add'>+	&amp;omap3xxx_l4_per__timer4,</div><div class='add'>+	&amp;omap3xxx_l4_per__timer5,</div><div class='add'>+	&amp;omap3xxx_l4_per__timer6,</div><div class='add'>+	&amp;omap3xxx_l4_per__timer7,</div><div class='add'>+	&amp;omap3xxx_l4_per__timer8,</div><div class='add'>+	&amp;omap3xxx_l4_per__timer9,</div><div class='add'>+	&amp;omap3xxx_l4_core__timer10,</div><div class='add'>+	&amp;omap3xxx_l4_core__timer11,</div><div class='add'>+	&amp;omap3xxx_l4_wkup__wd_timer2,</div><div class='add'>+	&amp;omap3xxx_l4_wkup__gpio1,</div><div class='add'>+	&amp;omap3xxx_l4_per__gpio2,</div><div class='add'>+	&amp;omap3xxx_l4_per__gpio3,</div><div class='add'>+	&amp;omap3xxx_l4_per__gpio4,</div><div class='add'>+	&amp;omap3xxx_l4_per__gpio5,</div><div class='add'>+	&amp;omap3xxx_l4_per__gpio6,</div><div class='add'>+	&amp;omap3xxx_dma_system__l3,</div><div class='add'>+	&amp;omap3xxx_l4_core__dma_system,</div><div class='add'>+	&amp;omap3xxx_l4_core__mcbsp1,</div><div class='add'>+	&amp;omap3xxx_l4_per__mcbsp2,</div><div class='add'>+	&amp;omap3xxx_l4_per__mcbsp3,</div><div class='add'>+	&amp;omap3xxx_l4_per__mcbsp4,</div><div class='add'>+	&amp;omap3xxx_l4_core__mcbsp5,</div><div class='add'>+	&amp;omap3xxx_l4_per__mcbsp2_sidetone,</div><div class='add'>+	&amp;omap3xxx_l4_per__mcbsp3_sidetone,</div><div class='add'>+	&amp;omap34xx_l4_core__mcspi1,</div><div class='add'>+	&amp;omap34xx_l4_core__mcspi2,</div><div class='add'>+	&amp;omap34xx_l4_core__mcspi3,</div><div class='add'>+	&amp;omap34xx_l4_core__mcspi4,</div><div class='add'>+	&amp;omap3xxx_l4_wkup__counter_32k,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* GP-only hwmods */</div><div class='del'>-static __initdata struct omap_hwmod *omap3xxx_gp_hwmods[] = {</div><div class='del'>-	&amp;omap3xxx_timer12_hwmod,</div><div class='add'>+/* GP-only hwmod links */</div><div class='add'>+static struct omap_hwmod_ocp_if *omap3xxx_gp_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_l4_sec__timer12,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* 3430ES1-only hwmods */</div><div class='del'>-static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {</div><div class='del'>-	&amp;omap3430es1_dss_core_hwmod,</div><div class='add'>+/* 3430ES1-only hwmod links */</div><div class='add'>+static struct omap_hwmod_ocp_if *omap3430es1_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3430es1_dss__l3,</div><div class='add'>+	&amp;omap3430es1_l4_core__dss,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* 3430ES2+-only hwmods */</div><div class='del'>-static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {</div><div class='del'>-	&amp;omap3xxx_dss_core_hwmod,</div><div class='del'>-	&amp;omap3xxx_usbhsotg_hwmod,</div><div class='del'>-	&amp;omap3xxx_usb_host_hs_hwmod,</div><div class='del'>-	&amp;omap3xxx_usb_tll_hs_hwmod,</div><div class='add'>+/* 3430ES2+-only hwmod links */</div><div class='add'>+static struct omap_hwmod_ocp_if *omap3430es2plus_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_dss__l3,</div><div class='add'>+	&amp;omap3xxx_l4_core__dss,</div><div class='add'>+	&amp;omap3xxx_usbhsotg__l3,</div><div class='add'>+	&amp;omap3xxx_l4_core__usbhsotg,</div><div class='add'>+	&amp;omap3xxx_usb_host_hs__l3_main_2,</div><div class='add'>+	&amp;omap3xxx_l4_core__usb_host_hs,</div><div class='add'>+	&amp;omap3xxx_l4_core__usb_tll_hs,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* &lt;= 3430ES3-only hwmods */</div><div class='del'>-static struct omap_hwmod *omap3430_pre_es3_hwmods[] __initdata = {</div><div class='del'>-	&amp;omap3xxx_pre_es3_mmc1_hwmod,</div><div class='del'>-	&amp;omap3xxx_pre_es3_mmc2_hwmod,</div><div class='add'>+/* &lt;= 3430ES3-only hwmod links */</div><div class='add'>+static struct omap_hwmod_ocp_if *omap3430_pre_es3_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_l4_core__pre_es3_mmc1,</div><div class='add'>+	&amp;omap3xxx_l4_core__pre_es3_mmc2,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* 3430ES3+-only hwmods */</div><div class='del'>-static struct omap_hwmod *omap3430_es3plus_hwmods[] __initdata = {</div><div class='del'>-	&amp;omap3xxx_es3plus_mmc1_hwmod,</div><div class='del'>-	&amp;omap3xxx_es3plus_mmc2_hwmod,</div><div class='add'>+/* 3430ES3+-only hwmod links */</div><div class='add'>+static struct omap_hwmod_ocp_if *omap3430_es3plus_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_l4_core__es3plus_mmc1,</div><div class='add'>+	&amp;omap3xxx_l4_core__es3plus_mmc2,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* 34xx-only hwmods (all ES revisions) */</div><div class='del'>-static __initdata struct omap_hwmod *omap34xx_hwmods[] = {</div><div class='del'>-	&amp;omap3xxx_iva_hwmod,</div><div class='del'>-	&amp;omap34xx_sr1_hwmod,</div><div class='del'>-	&amp;omap34xx_sr2_hwmod,</div><div class='del'>-	&amp;omap3xxx_mailbox_hwmod,</div><div class='add'>+/* 34xx-only hwmod links (all ES revisions) */</div><div class='add'>+static struct omap_hwmod_ocp_if *omap34xx_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_l3__iva,</div><div class='add'>+	&amp;omap34xx_l4_core__sr1,</div><div class='add'>+	&amp;omap34xx_l4_core__sr2,</div><div class='add'>+	&amp;omap3xxx_l4_core__mailbox,</div><div class='add'>+	&amp;omap3xxx_l4_core__hdq1w,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* 36xx-only hwmods (all ES revisions) */</div><div class='del'>-static __initdata struct omap_hwmod *omap36xx_hwmods[] = {</div><div class='del'>-	&amp;omap3xxx_iva_hwmod,</div><div class='del'>-	&amp;omap3xxx_uart4_hwmod,</div><div class='del'>-	&amp;omap3xxx_dss_core_hwmod,</div><div class='del'>-	&amp;omap36xx_sr1_hwmod,</div><div class='del'>-	&amp;omap36xx_sr2_hwmod,</div><div class='del'>-	&amp;omap3xxx_usbhsotg_hwmod,</div><div class='del'>-	&amp;omap3xxx_mailbox_hwmod,</div><div class='del'>-	&amp;omap3xxx_usb_host_hs_hwmod,</div><div class='del'>-	&amp;omap3xxx_usb_tll_hs_hwmod,</div><div class='del'>-	&amp;omap3xxx_es3plus_mmc1_hwmod,</div><div class='del'>-	&amp;omap3xxx_es3plus_mmc2_hwmod,</div><div class='add'>+/* 36xx-only hwmod links (all ES revisions) */</div><div class='add'>+static struct omap_hwmod_ocp_if *omap36xx_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_l3__iva,</div><div class='add'>+	&amp;omap36xx_l4_per__uart4,</div><div class='add'>+	&amp;omap3xxx_dss__l3,</div><div class='add'>+	&amp;omap3xxx_l4_core__dss,</div><div class='add'>+	&amp;omap36xx_l4_core__sr1,</div><div class='add'>+	&amp;omap36xx_l4_core__sr2,</div><div class='add'>+	&amp;omap3xxx_usbhsotg__l3,</div><div class='add'>+	&amp;omap3xxx_l4_core__usbhsotg,</div><div class='add'>+	&amp;omap3xxx_l4_core__mailbox,</div><div class='add'>+	&amp;omap3xxx_usb_host_hs__l3_main_2,</div><div class='add'>+	&amp;omap3xxx_l4_core__usb_host_hs,</div><div class='add'>+	&amp;omap3xxx_l4_core__usb_tll_hs,</div><div class='add'>+	&amp;omap3xxx_l4_core__es3plus_mmc1,</div><div class='add'>+	&amp;omap3xxx_l4_core__es3plus_mmc2,</div><div class='add'>+	&amp;omap3xxx_l4_core__hdq1w,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static __initdata struct omap_hwmod *am35xx_hwmods[] = {</div><div class='del'>-	&amp;omap3xxx_dss_core_hwmod, /* XXX ??? */</div><div class='del'>-	&amp;am35xx_usbhsotg_hwmod,</div><div class='del'>-	&amp;am35xx_uart4_hwmod,</div><div class='del'>-	&amp;omap3xxx_usb_host_hs_hwmod,</div><div class='del'>-	&amp;omap3xxx_usb_tll_hs_hwmod,</div><div class='del'>-	&amp;omap3xxx_es3plus_mmc1_hwmod,</div><div class='del'>-	&amp;omap3xxx_es3plus_mmc2_hwmod,</div><div class='add'>+static struct omap_hwmod_ocp_if *am35xx_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_dss__l3,</div><div class='add'>+	&amp;omap3xxx_l4_core__dss,</div><div class='add'>+	&amp;am35xx_usbhsotg__l3,</div><div class='add'>+	&amp;am35xx_l4_core__usbhsotg,</div><div class='add'>+	&amp;am35xx_l4_core__uart4,</div><div class='add'>+	&amp;omap3xxx_usb_host_hs__l3_main_2,</div><div class='add'>+	&amp;omap3xxx_l4_core__usb_host_hs,</div><div class='add'>+	&amp;omap3xxx_l4_core__usb_tll_hs,</div><div class='add'>+	&amp;omap3xxx_l4_core__es3plus_mmc1,</div><div class='add'>+	&amp;omap3xxx_l4_core__es3plus_mmc2,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static __initdata struct omap_hwmod *omap3xxx_dss_hwmods[] = {</div><div class='del'>-	/* dss class */</div><div class='del'>-	&amp;omap3xxx_dss_dispc_hwmod,</div><div class='del'>-	&amp;omap3xxx_dss_dsi1_hwmod,</div><div class='del'>-	&amp;omap3xxx_dss_rfbi_hwmod,</div><div class='del'>-	&amp;omap3xxx_dss_venc_hwmod,</div><div class='add'>+static struct omap_hwmod_ocp_if *omap3xxx_dss_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap3xxx_l4_core__dss_dispc,</div><div class='add'>+	&amp;omap3xxx_l4_core__dss_dsi1,</div><div class='add'>+	&amp;omap3xxx_l4_core__dss_rfbi,</div><div class='add'>+	&amp;omap3xxx_l4_core__dss_venc,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int __init omap3xxx_hwmod_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='del'>-	struct omap_hwmod **h = NULL;</div><div class='add'>+	struct omap_hwmod_ocp_if **h = NULL;</div><div class='ctx'> 	unsigned int rev;</div><div class='ctx'> </div><div class='del'>-	/* Register hwmods common to all OMAP3 */</div><div class='del'>-	r = omap_hwmod_register(omap3xxx_hwmods);</div><div class='add'>+	/* Register hwmod links common to all OMAP3 */</div><div class='add'>+	r = omap_hwmod_register_links(omap3xxx_hwmod_ocp_ifs);</div><div class='ctx'> 	if (r &lt; 0)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	/* Register GP-only hwmods. */</div><div class='add'>+	/* Register GP-only hwmod links. */</div><div class='ctx'> 	if (omap_type() == OMAP2_DEVICE_TYPE_GP) {</div><div class='del'>-		r = omap_hwmod_register(omap3xxx_gp_hwmods);</div><div class='add'>+		r = omap_hwmod_register_links(omap3xxx_gp_hwmod_ocp_ifs);</div><div class='ctx'> 		if (r &lt; 0)</div><div class='ctx'> 			return r;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3703,43 +3298,43 @@ int __init omap3xxx_hwmod_init(void)</div><div class='ctx'> 	rev = omap_rev();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Register hwmods common to individual OMAP3 families, all</div><div class='add'>+	 * Register hwmod links common to individual OMAP3 families, all</div><div class='ctx'> 	 * silicon revisions (e.g., 34xx, or AM3505/3517, or 36xx)</div><div class='ctx'> 	 * All possible revisions should be included in this conditional.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 ||</div><div class='ctx'> 	    rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 ||</div><div class='ctx'> 	    rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) {</div><div class='del'>-		h = omap34xx_hwmods;</div><div class='del'>-	} else if (rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1) {</div><div class='del'>-		h = am35xx_hwmods;</div><div class='add'>+		h = omap34xx_hwmod_ocp_ifs;</div><div class='add'>+	} else if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) {</div><div class='add'>+		h = am35xx_hwmod_ocp_ifs;</div><div class='ctx'> 	} else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 ||</div><div class='ctx'> 		   rev == OMAP3630_REV_ES1_2) {</div><div class='del'>-		h = omap36xx_hwmods;</div><div class='add'>+		h = omap36xx_hwmod_ocp_ifs;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		WARN(1, "OMAP3 hwmod family init: unknown chip type\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	r = omap_hwmod_register(h);</div><div class='add'>+	r = omap_hwmod_register_links(h);</div><div class='ctx'> 	if (r &lt; 0)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Register hwmods specific to certain ES levels of a</div><div class='add'>+	 * Register hwmod links specific to certain ES levels of a</div><div class='ctx'> 	 * particular family of silicon (e.g., 34xx ES1.0)</div><div class='ctx'> 	 */</div><div class='ctx'> 	h = NULL;</div><div class='ctx'> 	if (rev == OMAP3430_REV_ES1_0) {</div><div class='del'>-		h = omap3430es1_hwmods;</div><div class='add'>+		h = omap3430es1_hwmod_ocp_ifs;</div><div class='ctx'> 	} else if (rev == OMAP3430_REV_ES2_0 || rev == OMAP3430_REV_ES2_1 ||</div><div class='ctx'> 		   rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||</div><div class='ctx'> 		   rev == OMAP3430_REV_ES3_1_2) {</div><div class='del'>-		h = omap3430es2plus_hwmods;</div><div class='add'>+		h = omap3430es2plus_hwmod_ocp_ifs;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	if (h) {</div><div class='del'>-		r = omap_hwmod_register(h);</div><div class='add'>+		r = omap_hwmod_register_links(h);</div><div class='ctx'> 		if (r &lt; 0)</div><div class='ctx'> 			return r;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3747,29 +3342,29 @@ int __init omap3xxx_hwmod_init(void)</div><div class='ctx'> 	h = NULL;</div><div class='ctx'> 	if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 ||</div><div class='ctx'> 	    rev == OMAP3430_REV_ES2_1) {</div><div class='del'>-		h = omap3430_pre_es3_hwmods;</div><div class='add'>+		h = omap3430_pre_es3_hwmod_ocp_ifs;</div><div class='ctx'> 	} else if (rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||</div><div class='ctx'> 		   rev == OMAP3430_REV_ES3_1_2) {</div><div class='del'>-		h = omap3430_es3plus_hwmods;</div><div class='add'>+		h = omap3430_es3plus_hwmod_ocp_ifs;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	if (h)</div><div class='del'>-		r = omap_hwmod_register(h);</div><div class='add'>+		r = omap_hwmod_register_links(h);</div><div class='ctx'> 	if (r &lt; 0)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * DSS code presumes that dss_core hwmod is handled first,</div><div class='ctx'> 	 * _before_ any other DSS related hwmods so register common</div><div class='del'>-	 * DSS hwmods last to ensure that dss_core is already registered.</div><div class='del'>-	 * Otherwise some change things may happen, for ex. if dispc</div><div class='del'>-	 * is handled before dss_core and DSS is enabled in bootloader</div><div class='del'>-	 * DIPSC will be reset with outputs enabled which sometimes leads</div><div class='del'>-	 * to unrecoverable L3 error.</div><div class='del'>-	 * XXX The long-term fix to this is to ensure modules are set up</div><div class='del'>-	 * in dependency order in the hwmod core code.</div><div class='add'>+	 * DSS hwmod links last to ensure that dss_core is already</div><div class='add'>+	 * registered.  Otherwise some change things may happen, for</div><div class='add'>+	 * ex. if dispc is handled before dss_core and DSS is enabled</div><div class='add'>+	 * in bootloader DISPC will be reset with outputs enabled</div><div class='add'>+	 * which sometimes leads to unrecoverable L3 error.  XXX The</div><div class='add'>+	 * long-term fix to this is to ensure hwmods are set up in</div><div class='add'>+	 * dependency order in the hwmod core code.</div><div class='ctx'> 	 */</div><div class='del'>-	r = omap_hwmod_register(omap3xxx_dss_hwmods);</div><div class='add'>+	r = omap_hwmod_register_links(omap3xxx_dss_hwmod_ocp_ifs);</div><div class='ctx'> </div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c<br/>index 6abc75753e42..950454a3fa31 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_44xx_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap_hwmod_44xx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_44xx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_44xx_data.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Hardware modules present on the OMAP44xx chips</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2009-2011 Texas Instruments, Inc.</div><div class='add'>+ * Copyright (C) 2009-2012 Texas Instruments, Inc.</div><div class='ctx'>  * Copyright (C) 2009-2010 Nokia Corporation</div><div class='ctx'>  *</div><div class='ctx'>  * Paul Walmsley</div><div class='hunk'>@@ -44,41 +44,34 @@</div><div class='ctx'> #define OMAP44XX_IRQ_GIC_START	32</div><div class='ctx'> </div><div class='ctx'> /* Base offset for all OMAP4 dma requests */</div><div class='del'>-#define OMAP44XX_DMA_REQ_START  1</div><div class='del'>-</div><div class='del'>-/* Backward references (IPs with Bus Master capability) */</div><div class='del'>-static struct omap_hwmod omap44xx_aess_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_dma_system_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_dmm_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_dsp_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_dss_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_emif_fw_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_hsi_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_ipu_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_iss_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_iva_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_l3_instr_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_l3_main_1_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_l3_main_2_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_l3_main_3_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_l4_abe_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_l4_cfg_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_l4_per_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_l4_wkup_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_mmc1_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_mmc2_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_mpu_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_mpu_private_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_usb_otg_hs_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_usb_host_hs_hwmod;</div><div class='del'>-static struct omap_hwmod omap44xx_usb_tll_hs_hwmod;</div><div class='add'>+#define OMAP44XX_DMA_REQ_START	1</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Interconnects omap_hwmod structures</div><div class='del'>- * hwmods that compose the global OMAP interconnect</div><div class='add'>+ * IP blocks</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * 'c2c_target_fw' class</div><div class='add'>+ * instance(s): c2c_target_fw</div><div class='add'>+ */</div><div class='add'>+static struct omap_hwmod_class omap44xx_c2c_target_fw_hwmod_class = {</div><div class='add'>+	.name	= "c2c_target_fw",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* c2c_target_fw */</div><div class='add'>+static struct omap_hwmod omap44xx_c2c_target_fw_hwmod = {</div><div class='add'>+	.name		= "c2c_target_fw",</div><div class='add'>+	.class		= &amp;omap44xx_c2c_target_fw_hwmod_class,</div><div class='add'>+	.clkdm_name	= "d2d_clkdm",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * 'dmm' class</div><div class='ctx'>  * instance(s): dmm</div><div class='ctx'>  */</div><div class='hunk'>@@ -92,51 +85,17 @@ static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l3_main_1 -&gt; dmm */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dmm_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4e000000,</div><div class='del'>-		.pa_end		= 0x4e0007ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mpu -&gt; dmm */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = {</div><div class='del'>-	.master		= &amp;omap44xx_mpu_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dmm_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.addr		= omap44xx_dmm_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dmm slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_1__dmm,</div><div class='del'>-	&amp;omap44xx_mpu__dmm,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_dmm_hwmod = {</div><div class='ctx'> 	.name		= "dmm",</div><div class='ctx'> 	.class		= &amp;omap44xx_dmm_hwmod_class,</div><div class='ctx'> 	.clkdm_name	= "l3_emif_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_dmm_irqs,</div><div class='ctx'> 	.prcm = {</div><div class='ctx'> 		.omap4 = {</div><div class='ctx'> 			.clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET,</div><div class='ctx'> 			.context_offs = OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_dmm_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_dmm_slaves),</div><div class='del'>-	.mpu_irqs	= omap44xx_dmm_irqs,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -148,38 +107,6 @@ static struct omap_hwmod_class omap44xx_emif_fw_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* emif_fw */</div><div class='del'>-/* dmm -&gt; emif_fw */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = {</div><div class='del'>-	.master		= &amp;omap44xx_dmm_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_emif_fw_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a20c000,</div><div class='del'>-		.pa_end		= 0x4a20c0ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; emif_fw */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_emif_fw_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_emif_fw_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* emif_fw slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_emif_fw_slaves[] = {</div><div class='del'>-	&amp;omap44xx_dmm__emif_fw,</div><div class='del'>-	&amp;omap44xx_l4_cfg__emif_fw,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_emif_fw_hwmod = {</div><div class='ctx'> 	.name		= "emif_fw",</div><div class='ctx'> 	.class		= &amp;omap44xx_emif_fw_hwmod_class,</div><div class='hunk'>@@ -190,8 +117,6 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = {</div><div class='ctx'> 			.context_offs = OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_emif_fw_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_emif_fw_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -203,28 +128,6 @@ static struct omap_hwmod_class omap44xx_l3_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* l3_instr */</div><div class='del'>-/* iva -&gt; l3_instr */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = {</div><div class='del'>-	.master		= &amp;omap44xx_iva_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_instr_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_3 -&gt; l3_instr */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_3__l3_instr = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_3_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_instr_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_instr slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_l3_instr_slaves[] = {</div><div class='del'>-	&amp;omap44xx_iva__l3_instr,</div><div class='del'>-	&amp;omap44xx_l3_main_3__l3_instr,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_l3_instr_hwmod = {</div><div class='ctx'> 	.name		= "l3_instr",</div><div class='ctx'> 	.class		= &amp;omap44xx_l3_hwmod_class,</div><div class='hunk'>@@ -236,8 +139,6 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_HWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_l3_instr_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_l3_instr_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* l3_main_1 */</div><div class='hunk'>@@ -247,83 +148,6 @@ static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* dsp -&gt; l3_main_1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = {</div><div class='del'>-	.master		= &amp;omap44xx_dsp_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss -&gt; l3_main_1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_dss__l3_main_1 = {</div><div class='del'>-	.master		= &amp;omap44xx_dss_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_2 -&gt; l3_main_1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_1 = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; l3_main_1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_1 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mmc1 -&gt; l3_main_1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_mmc1__l3_main_1 = {</div><div class='del'>-	.master		= &amp;omap44xx_mmc1_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mmc2 -&gt; l3_main_1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = {</div><div class='del'>-	.master		= &amp;omap44xx_mmc2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x44000000,</div><div class='del'>-		.pa_end		= 0x44000fff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mpu -&gt; l3_main_1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {</div><div class='del'>-	.master		= &amp;omap44xx_mpu_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.addr		= omap44xx_l3_main_1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {</div><div class='del'>-	&amp;omap44xx_dsp__l3_main_1,</div><div class='del'>-	&amp;omap44xx_dss__l3_main_1,</div><div class='del'>-	&amp;omap44xx_l3_main_2__l3_main_1,</div><div class='del'>-	&amp;omap44xx_l4_cfg__l3_main_1,</div><div class='del'>-	&amp;omap44xx_mmc1__l3_main_1,</div><div class='del'>-	&amp;omap44xx_mmc2__l3_main_1,</div><div class='del'>-	&amp;omap44xx_mpu__l3_main_1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_l3_main_1_hwmod = {</div><div class='ctx'> 	.name		= "l3_main_1",</div><div class='ctx'> 	.class		= &amp;omap44xx_l3_hwmod_class,</div><div class='hunk'>@@ -335,97 +159,9 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = {</div><div class='ctx'> 			.context_offs = OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_l3_main_1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_l3_main_1_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* l3_main_2 */</div><div class='del'>-/* dma_system -&gt; l3_main_2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = {</div><div class='del'>-	.master		= &amp;omap44xx_dma_system_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hsi -&gt; l3_main_2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_hsi__l3_main_2 = {</div><div class='del'>-	.master		= &amp;omap44xx_hsi_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ipu -&gt; l3_main_2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_ipu__l3_main_2 = {</div><div class='del'>-	.master		= &amp;omap44xx_ipu_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* iss -&gt; l3_main_2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_iss__l3_main_2 = {</div><div class='del'>-	.master		= &amp;omap44xx_iss_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* iva -&gt; l3_main_2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_iva__l3_main_2 = {</div><div class='del'>-	.master		= &amp;omap44xx_iva_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x44800000,</div><div class='del'>-		.pa_end		= 0x44801fff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_1 -&gt; l3_main_2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.addr		= omap44xx_l3_main_2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; l3_main_2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* usb_otg_hs -&gt; l3_main_2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_usb_otg_hs__l3_main_2 = {</div><div class='del'>-	.master		= &amp;omap44xx_usb_otg_hs_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = {</div><div class='del'>-	&amp;omap44xx_dma_system__l3_main_2,</div><div class='del'>-	&amp;omap44xx_hsi__l3_main_2,</div><div class='del'>-	&amp;omap44xx_ipu__l3_main_2,</div><div class='del'>-	&amp;omap44xx_iss__l3_main_2,</div><div class='del'>-	&amp;omap44xx_iva__l3_main_2,</div><div class='del'>-	&amp;omap44xx_l3_main_1__l3_main_2,</div><div class='del'>-	&amp;omap44xx_l4_cfg__l3_main_2,</div><div class='del'>-	&amp;omap44xx_usb_otg_hs__l3_main_2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_l3_main_2_hwmod = {</div><div class='ctx'> 	.name		= "l3_main_2",</div><div class='ctx'> 	.class		= &amp;omap44xx_l3_hwmod_class,</div><div class='hunk'>@@ -436,52 +172,9 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = {</div><div class='ctx'> 			.context_offs = OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_l3_main_2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_l3_main_2_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* l3_main_3 */</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x45000000,</div><div class='del'>-		.pa_end		= 0x45000fff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_1 -&gt; l3_main_3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_3_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.addr		= omap44xx_l3_main_3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_2 -&gt; l3_main_3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_3 = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_3_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; l3_main_3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_3_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_3 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_l3_main_3_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_1__l3_main_3,</div><div class='del'>-	&amp;omap44xx_l3_main_2__l3_main_3,</div><div class='del'>-	&amp;omap44xx_l4_cfg__l3_main_3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_l3_main_3_hwmod = {</div><div class='ctx'> 	.name		= "l3_main_3",</div><div class='ctx'> 	.class		= &amp;omap44xx_l3_hwmod_class,</div><div class='hunk'>@@ -493,8 +186,6 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_HWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_l3_main_3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_l3_main_3_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -506,46 +197,6 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* l4_abe */</div><div class='del'>-/* aess -&gt; l4_abe */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = {</div><div class='del'>-	.master		= &amp;omap44xx_aess_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dsp -&gt; l4_abe */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_dsp__l4_abe = {</div><div class='del'>-	.master		= &amp;omap44xx_dsp_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_1 -&gt; l4_abe */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_abe = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mpu -&gt; l4_abe */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_mpu__l4_abe = {</div><div class='del'>-	.master		= &amp;omap44xx_mpu_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_l4_abe_slaves[] = {</div><div class='del'>-	&amp;omap44xx_aess__l4_abe,</div><div class='del'>-	&amp;omap44xx_dsp__l4_abe,</div><div class='del'>-	&amp;omap44xx_l3_main_1__l4_abe,</div><div class='del'>-	&amp;omap44xx_mpu__l4_abe,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_l4_abe_hwmod = {</div><div class='ctx'> 	.name		= "l4_abe",</div><div class='ctx'> 	.class		= &amp;omap44xx_l4_hwmod_class,</div><div class='hunk'>@@ -555,24 +206,9 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = {</div><div class='ctx'> 			.clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_l4_abe_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_l4_abe_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* l4_cfg */</div><div class='del'>-/* l3_main_1 -&gt; l4_cfg */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_l4_cfg_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_1__l4_cfg,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_l4_cfg_hwmod = {</div><div class='ctx'> 	.name		= "l4_cfg",</div><div class='ctx'> 	.class		= &amp;omap44xx_l4_hwmod_class,</div><div class='hunk'>@@ -583,24 +219,9 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = {</div><div class='ctx'> 			.context_offs = OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_l4_cfg_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_l4_cfg_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* l4_per */</div><div class='del'>-/* l3_main_2 -&gt; l4_per */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_l4_per_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_2__l4_per,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_l4_per_hwmod = {</div><div class='ctx'> 	.name		= "l4_per",</div><div class='ctx'> 	.class		= &amp;omap44xx_l4_hwmod_class,</div><div class='hunk'>@@ -611,24 +232,9 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = {</div><div class='ctx'> 			.context_offs = OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_l4_per_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_l4_per_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* l4_wkup */</div><div class='del'>-/* l4_cfg -&gt; l4_wkup */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_wkup slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_l4_wkup_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_cfg__l4_wkup,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_l4_wkup_hwmod = {</div><div class='ctx'> 	.name		= "l4_wkup",</div><div class='ctx'> 	.class		= &amp;omap44xx_l4_hwmod_class,</div><div class='hunk'>@@ -639,8 +245,6 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {</div><div class='ctx'> 			.context_offs = OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_l4_wkup_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_l4_wkup_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -652,25 +256,32 @@ static struct omap_hwmod_class omap44xx_mpu_bus_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mpu_private */</div><div class='del'>-/* mpu -&gt; mpu_private */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = {</div><div class='del'>-	.master		= &amp;omap44xx_mpu_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mpu_private_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mpu_private slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mpu_private_slaves[] = {</div><div class='del'>-	&amp;omap44xx_mpu__mpu_private,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_mpu_private_hwmod = {</div><div class='ctx'> 	.name		= "mpu_private",</div><div class='ctx'> 	.class		= &amp;omap44xx_mpu_bus_hwmod_class,</div><div class='ctx'> 	.clkdm_name	= "mpuss_clkdm",</div><div class='del'>-	.slaves		= omap44xx_mpu_private_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mpu_private_slaves),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'ocp_wp_noc' class</div><div class='add'>+ * instance(s): ocp_wp_noc</div><div class='add'>+ */</div><div class='add'>+static struct omap_hwmod_class omap44xx_ocp_wp_noc_hwmod_class = {</div><div class='add'>+	.name	= "ocp_wp_noc",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ocp_wp_noc */</div><div class='add'>+static struct omap_hwmod omap44xx_ocp_wp_noc_hwmod = {</div><div class='add'>+	.name		= "ocp_wp_noc",</div><div class='add'>+	.class		= &amp;omap44xx_ocp_wp_noc_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l3_instr_clkdm",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_L3INSTR_OCP_WP1_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_HWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -681,41 +292,7 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {</div><div class='ctx'>  * - They still need to be validated with the driver</div><div class='ctx'>  *   properly adapted to omap_hwmod / omap_device</div><div class='ctx'>  *</div><div class='del'>- *  c2c</div><div class='del'>- *  c2c_target_fw</div><div class='del'>- *  cm_core</div><div class='del'>- *  cm_core_aon</div><div class='del'>- *  ctrl_module_core</div><div class='del'>- *  ctrl_module_pad_core</div><div class='del'>- *  ctrl_module_pad_wkup</div><div class='del'>- *  ctrl_module_wkup</div><div class='del'>- *  debugss</div><div class='del'>- *  efuse_ctrl_cust</div><div class='del'>- *  efuse_ctrl_std</div><div class='del'>- *  elm</div><div class='del'>- *  emif1</div><div class='del'>- *  emif2</div><div class='del'>- *  fdif</div><div class='del'>- *  gpmc</div><div class='del'>- *  gpu</div><div class='del'>- *  hdq1w</div><div class='del'>- *  mcasp</div><div class='del'>- *  mpu_c0</div><div class='del'>- *  mpu_c1</div><div class='del'>- *  ocmc_ram</div><div class='del'>- *  ocp2scp_usb_phy</div><div class='del'>- *  ocp_wp_noc</div><div class='del'>- *  prcm_mpu</div><div class='del'>- *  prm</div><div class='del'>- *  scrm</div><div class='del'>- *  sl2if</div><div class='del'>- *  slimbus1</div><div class='del'>- *  slimbus2</div><div class='del'>- *  usb_host_fs</div><div class='del'>- *  usb_host_hs</div><div class='del'>- *  usb_phy_cm</div><div class='del'>- *  usb_tll_hs</div><div class='del'>- *  usim</div><div class='add'>+ * usim</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -756,53 +333,6 @@ static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* aess master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_aess_masters[] = {</div><div class='del'>-	&amp;omap44xx_aess__l4_abe,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x401f1000,</div><div class='del'>-		.pa_end		= 0x401f13ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; aess */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_aess_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_aess_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x490f1000,</div><div class='del'>-		.pa_end		= 0x490f13ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; aess (dma) */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_aess_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_aess_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* aess slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_aess_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_abe__aess,</div><div class='del'>-	&amp;omap44xx_l4_abe__aess_dma,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_aess_hwmod = {</div><div class='ctx'> 	.name		= "aess",</div><div class='ctx'> 	.class		= &amp;omap44xx_aess_hwmod_class,</div><div class='hunk'>@@ -817,37 +347,41 @@ static struct omap_hwmod omap44xx_aess_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_aess_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_aess_slaves),</div><div class='del'>-	.masters	= omap44xx_aess_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_aess_masters),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * 'bandgap' class</div><div class='del'>- * bangap reference for ldo regulators</div><div class='add'>+ * 'c2c' class</div><div class='add'>+ * chip 2 chip interface used to plug the ape soc (omap) with an external modem</div><div class='add'>+ * soc</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_class omap44xx_bandgap_hwmod_class = {</div><div class='del'>-	.name	= "bandgap",</div><div class='add'>+static struct omap_hwmod_class omap44xx_c2c_hwmod_class = {</div><div class='add'>+	.name	= "c2c",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* bandgap */</div><div class='del'>-static struct omap_hwmod_opt_clk bandgap_opt_clks[] = {</div><div class='del'>-	{ .role = "fclk", .clk = "bandgap_fclk" },</div><div class='add'>+/* c2c */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_c2c_irqs[] = {</div><div class='add'>+	{ .irq = 88 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap44xx_bandgap_hwmod = {</div><div class='del'>-	.name		= "bandgap",</div><div class='del'>-	.class		= &amp;omap44xx_bandgap_hwmod_class,</div><div class='del'>-	.clkdm_name	= "l4_wkup_clkdm",</div><div class='add'>+static struct omap_hwmod_dma_info omap44xx_c2c_sdma_reqs[] = {</div><div class='add'>+	{ .dma_req = 68 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .dma_req = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_c2c_hwmod = {</div><div class='add'>+	.name		= "c2c",</div><div class='add'>+	.class		= &amp;omap44xx_c2c_hwmod_class,</div><div class='add'>+	.clkdm_name	= "d2d_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_c2c_irqs,</div><div class='add'>+	.sdma_reqs	= omap44xx_c2c_sdma_reqs,</div><div class='ctx'> 	.prcm = {</div><div class='ctx'> 		.omap4 = {</div><div class='del'>-			.clkctrl_offs = OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET,</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.opt_clks	= bandgap_opt_clks,</div><div class='del'>-	.opt_clks_cnt	= ARRAY_SIZE(bandgap_opt_clks),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -870,30 +404,6 @@ static struct omap_hwmod_class omap44xx_counter_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* counter_32k */</div><div class='del'>-static struct omap_hwmod omap44xx_counter_32k_hwmod;</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a304000,</div><div class='del'>-		.pa_end		= 0x4a30401f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_wkup -&gt; counter_32k */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_counter_32k_hwmod,</div><div class='del'>-	.clk		= "l4_wkup_clk_mux_ck",</div><div class='del'>-	.addr		= omap44xx_counter_32k_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* counter_32k slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_counter_32k_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_wkup__counter_32k,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_counter_32k_hwmod = {</div><div class='ctx'> 	.name		= "counter_32k",</div><div class='ctx'> 	.class		= &amp;omap44xx_counter_hwmod_class,</div><div class='hunk'>@@ -906,8 +416,83 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = {</div><div class='ctx'> 			.context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_counter_32k_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_counter_32k_slaves),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'ctrl_module' class</div><div class='add'>+ * attila core control module + core pad control module + wkup pad control</div><div class='add'>+ * module + attila wkup control module</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap44xx_ctrl_module_sysc = {</div><div class='add'>+	.rev_offs	= 0x0000,</div><div class='add'>+	.sysc_offs	= 0x0010,</div><div class='add'>+	.sysc_flags	= SYSC_HAS_SIDLEMODE,</div><div class='add'>+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |</div><div class='add'>+			   SIDLE_SMART_WKUP),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_ctrl_module_hwmod_class = {</div><div class='add'>+	.name	= "ctrl_module",</div><div class='add'>+	.sysc	= &amp;omap44xx_ctrl_module_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ctrl_module_core */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_ctrl_module_core_irqs[] = {</div><div class='add'>+	{ .irq = 8 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_ctrl_module_core_hwmod = {</div><div class='add'>+	.name		= "ctrl_module_core",</div><div class='add'>+	.class		= &amp;omap44xx_ctrl_module_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l4_cfg_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_ctrl_module_core_irqs,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ctrl_module_pad_core */</div><div class='add'>+static struct omap_hwmod omap44xx_ctrl_module_pad_core_hwmod = {</div><div class='add'>+	.name		= "ctrl_module_pad_core",</div><div class='add'>+	.class		= &amp;omap44xx_ctrl_module_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l4_cfg_clkdm",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ctrl_module_wkup */</div><div class='add'>+static struct omap_hwmod omap44xx_ctrl_module_wkup_hwmod = {</div><div class='add'>+	.name		= "ctrl_module_wkup",</div><div class='add'>+	.class		= &amp;omap44xx_ctrl_module_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l4_wkup_clkdm",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ctrl_module_pad_wkup */</div><div class='add'>+static struct omap_hwmod omap44xx_ctrl_module_pad_wkup_hwmod = {</div><div class='add'>+	.name		= "ctrl_module_pad_wkup",</div><div class='add'>+	.class		= &amp;omap44xx_ctrl_module_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l4_wkup_clkdm",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'debugss' class</div><div class='add'>+ * debug and emulation sub system</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_debugss_hwmod_class = {</div><div class='add'>+	.name	= "debugss",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* debugss */</div><div class='add'>+static struct omap_hwmod omap44xx_debugss_hwmod = {</div><div class='add'>+	.name		= "debugss",</div><div class='add'>+	.class		= &amp;omap44xx_debugss_hwmod_class,</div><div class='add'>+	.clkdm_name	= "emu_sys_clkdm",</div><div class='add'>+	.main_clk	= "trace_clk_div_ck",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_EMU_DEBUGSS_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_EMU_DEBUGSS_CONTEXT_OFFSET,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -950,34 +535,6 @@ static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* dma_system master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dma_system_masters[] = {</div><div class='del'>-	&amp;omap44xx_dma_system__l3_main_2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a056000,</div><div class='del'>-		.pa_end		= 0x4a056fff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; dma_system */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dma_system_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_dma_system_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dma_system slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dma_system_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_cfg__dma_system,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_dma_system_hwmod = {</div><div class='ctx'> 	.name		= "dma_system",</div><div class='ctx'> 	.class		= &amp;omap44xx_dma_hwmod_class,</div><div class='hunk'>@@ -991,10 +548,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;dma_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_dma_system_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_dma_system_slaves),</div><div class='del'>-	.masters	= omap44xx_dma_system_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_dma_system_masters),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1018,7 +571,6 @@ static struct omap_hwmod_class omap44xx_dmic_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* dmic */</div><div class='del'>-static struct omap_hwmod omap44xx_dmic_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = {</div><div class='ctx'> 	{ .irq = 114 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -1029,50 +581,6 @@ static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "mpu",</div><div class='del'>-		.pa_start	= 0x4012e000,</div><div class='del'>-		.pa_end		= 0x4012e07f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; dmic */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dmic_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_dmic_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "dma",</div><div class='del'>-		.pa_start	= 0x4902e000,</div><div class='del'>-		.pa_end		= 0x4902e07f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; dmic (dma) */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dmic_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_dmic_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dmic slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dmic_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_abe__dmic,</div><div class='del'>-	&amp;omap44xx_l4_abe__dmic_dma,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_dmic_hwmod = {</div><div class='ctx'> 	.name		= "dmic",</div><div class='ctx'> 	.class		= &amp;omap44xx_dmic_hwmod_class,</div><div class='hunk'>@@ -1087,8 +595,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_dmic_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_dmic_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1107,53 +613,8 @@ static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = {</div><div class='del'>-	{ .name = "mmu_cache", .rst_shift = 1 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_rst_info omap44xx_dsp_c0_resets[] = {</div><div class='ctx'> 	{ .name = "dsp", .rst_shift = 0 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dsp -&gt; iva */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_dsp__iva = {</div><div class='del'>-	.master		= &amp;omap44xx_dsp_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_iva_hwmod,</div><div class='del'>-	.clk		= "dpll_iva_m5x2_ck",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dsp master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dsp_masters[] = {</div><div class='del'>-	&amp;omap44xx_dsp__l3_main_1,</div><div class='del'>-	&amp;omap44xx_dsp__l4_abe,</div><div class='del'>-	&amp;omap44xx_dsp__iva,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; dsp */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dsp = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dsp_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dsp slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dsp_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_cfg__dsp,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Pseudo hwmod for reset control purpose only */</div><div class='del'>-static struct omap_hwmod omap44xx_dsp_c0_hwmod = {</div><div class='del'>-	.name		= "dsp_c0",</div><div class='del'>-	.class		= &amp;omap44xx_dsp_hwmod_class,</div><div class='del'>-	.clkdm_name	= "tesla_clkdm",</div><div class='del'>-	.flags		= HWMOD_INIT_NO_RESET,</div><div class='del'>-	.rst_lines	= omap44xx_dsp_c0_resets,</div><div class='del'>-	.rst_lines_cnt	= ARRAY_SIZE(omap44xx_dsp_c0_resets),</div><div class='del'>-	.prcm = {</div><div class='del'>-		.omap4 = {</div><div class='del'>-			.rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='add'>+	{ .name = "mmu_cache", .rst_shift = 1 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod omap44xx_dsp_hwmod = {</div><div class='hunk'>@@ -1172,10 +633,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_HWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_dsp_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_dsp_slaves),</div><div class='del'>-	.masters	= omap44xx_dsp_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_dsp_masters),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1196,53 +653,6 @@ static struct omap_hwmod_class omap44xx_dss_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* dss */</div><div class='del'>-/* dss master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dss_masters[] = {</div><div class='del'>-	&amp;omap44xx_dss__l3_main_1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x58000000,</div><div class='del'>-		.pa_end		= 0x5800007f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_2 -&gt; dss */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_hwmod,</div><div class='del'>-	.clk		= "dss_fck",</div><div class='del'>-	.addr		= omap44xx_dss_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48040000,</div><div class='del'>-		.pa_end		= 0x4804007f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; dss */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_dss_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_2__dss,</div><div class='del'>-	&amp;omap44xx_l4_per__dss,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk dss_opt_clks[] = {</div><div class='ctx'> 	{ .role = "sys_clk", .clk = "dss_sys_clk" },</div><div class='ctx'> 	{ .role = "tv_clk", .clk = "dss_tv_clk" },</div><div class='hunk'>@@ -1263,10 +673,6 @@ static struct omap_hwmod omap44xx_dss_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= dss_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(dss_opt_clks),</div><div class='del'>-	.slaves		= omap44xx_dss_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_dss_slaves),</div><div class='del'>-	.masters	= omap44xx_dss_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_dss_masters),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1293,7 +699,6 @@ static struct omap_hwmod_class omap44xx_dispc_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* dss_dispc */</div><div class='del'>-static struct omap_hwmod omap44xx_dss_dispc_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = {</div><div class='ctx'> 	{ .irq = 25 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -1304,53 +709,11 @@ static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x58001000,</div><div class='del'>-		.pa_end		= 0x58001fff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_2 -&gt; dss_dispc */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_dispc_hwmod,</div><div class='del'>-	.clk		= "dss_fck",</div><div class='del'>-	.addr		= omap44xx_dss_dispc_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48041000,</div><div class='del'>-		.pa_end		= 0x48041fff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_dss_dispc_dev_attr omap44xx_dss_dispc_dev_attr = {</div><div class='ctx'> 	.manager_count		= 3,</div><div class='ctx'> 	.has_framedonetv_irq	= 1</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_per -&gt; dss_dispc */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_dispc_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_dss_dispc_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_dispc slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_2__dss_dispc,</div><div class='del'>-	&amp;omap44xx_l4_per__dss_dispc,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_dss_dispc_hwmod = {</div><div class='ctx'> 	.name		= "dss_dispc",</div><div class='ctx'> 	.class		= &amp;omap44xx_dispc_hwmod_class,</div><div class='hunk'>@@ -1364,8 +727,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {</div><div class='ctx'> 			.context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_dss_dispc_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_dss_dispc_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;omap44xx_dss_dispc_dev_attr</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1391,7 +752,6 @@ static struct omap_hwmod_class omap44xx_dsi_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* dss_dsi1 */</div><div class='del'>-static struct omap_hwmod omap44xx_dss_dsi1_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = {</div><div class='ctx'> 	{ .irq = 53 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -1402,48 +762,6 @@ static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x58004000,</div><div class='del'>-		.pa_end		= 0x580041ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_2 -&gt; dss_dsi1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_dsi1_hwmod,</div><div class='del'>-	.clk		= "dss_fck",</div><div class='del'>-	.addr		= omap44xx_dss_dsi1_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48044000,</div><div class='del'>-		.pa_end		= 0x480441ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; dss_dsi1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_dsi1_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_dss_dsi1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_dsi1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_2__dss_dsi1,</div><div class='del'>-	&amp;omap44xx_l4_per__dss_dsi1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {</div><div class='ctx'> 	{ .role = "sys_clk", .clk = "dss_sys_clk" },</div><div class='ctx'> };</div><div class='hunk'>@@ -1463,12 +781,9 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= dss_dsi1_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(dss_dsi1_opt_clks),</div><div class='del'>-	.slaves		= omap44xx_dss_dsi1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_dss_dsi1_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* dss_dsi2 */</div><div class='del'>-static struct omap_hwmod omap44xx_dss_dsi2_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = {</div><div class='ctx'> 	{ .irq = 84 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -1479,48 +794,6 @@ static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x58005000,</div><div class='del'>-		.pa_end		= 0x580051ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_2 -&gt; dss_dsi2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_dsi2_hwmod,</div><div class='del'>-	.clk		= "dss_fck",</div><div class='del'>-	.addr		= omap44xx_dss_dsi2_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48045000,</div><div class='del'>-		.pa_end		= 0x480451ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; dss_dsi2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_dsi2_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_dss_dsi2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_dsi2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_2__dss_dsi2,</div><div class='del'>-	&amp;omap44xx_l4_per__dss_dsi2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = {</div><div class='ctx'> 	{ .role = "sys_clk", .clk = "dss_sys_clk" },</div><div class='ctx'> };</div><div class='hunk'>@@ -1540,8 +813,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= dss_dsi2_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(dss_dsi2_opt_clks),</div><div class='del'>-	.slaves		= omap44xx_dss_dsi2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_dss_dsi2_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1565,7 +836,6 @@ static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* dss_hdmi */</div><div class='del'>-static struct omap_hwmod omap44xx_dss_hdmi_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = {</div><div class='ctx'> 	{ .irq = 101 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -1576,48 +846,6 @@ static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x58006000,</div><div class='del'>-		.pa_end		= 0x58006fff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_2 -&gt; dss_hdmi */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_hdmi_hwmod,</div><div class='del'>-	.clk		= "dss_fck",</div><div class='del'>-	.addr		= omap44xx_dss_hdmi_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48046000,</div><div class='del'>-		.pa_end		= 0x48046fff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; dss_hdmi */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_hdmi_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_dss_hdmi_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_hdmi slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_2__dss_hdmi,</div><div class='del'>-	&amp;omap44xx_l4_per__dss_hdmi,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = {</div><div class='ctx'> 	{ .role = "sys_clk", .clk = "dss_sys_clk" },</div><div class='ctx'> };</div><div class='hunk'>@@ -1637,8 +865,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= dss_hdmi_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(dss_hdmi_opt_clks),</div><div class='del'>-	.slaves		= omap44xx_dss_hdmi_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_dss_hdmi_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1662,54 +888,11 @@ static struct omap_hwmod_class omap44xx_rfbi_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* dss_rfbi */</div><div class='del'>-static struct omap_hwmod omap44xx_dss_rfbi_hwmod;</div><div class='ctx'> static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = 13 + OMAP44XX_DMA_REQ_START },</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x58002000,</div><div class='del'>-		.pa_end		= 0x580020ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_2 -&gt; dss_rfbi */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_rfbi_hwmod,</div><div class='del'>-	.clk		= "dss_fck",</div><div class='del'>-	.addr		= omap44xx_dss_rfbi_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48042000,</div><div class='del'>-		.pa_end		= 0x480420ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; dss_rfbi */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_rfbi_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_dss_rfbi_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dss_rfbi slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_2__dss_rfbi,</div><div class='del'>-	&amp;omap44xx_l4_per__dss_rfbi,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {</div><div class='ctx'> 	{ .role = "ick", .clk = "dss_fck" },</div><div class='ctx'> };</div><div class='hunk'>@@ -1728,8 +911,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= dss_rfbi_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(dss_rfbi_opt_clks),</div><div class='del'>-	.slaves		= omap44xx_dss_rfbi_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_dss_rfbi_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1742,62 +923,165 @@ static struct omap_hwmod_class omap44xx_venc_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* dss_venc */</div><div class='del'>-static struct omap_hwmod omap44xx_dss_venc_hwmod;</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x58003000,</div><div class='del'>-		.pa_end		= 0x580030ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='add'>+static struct omap_hwmod omap44xx_dss_venc_hwmod = {</div><div class='add'>+	.name		= "dss_venc",</div><div class='add'>+	.class		= &amp;omap44xx_venc_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l3_dss_clkdm",</div><div class='add'>+	.main_clk	= "dss_tv_clk",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,</div><div class='add'>+		},</div><div class='ctx'> 	},</div><div class='del'>-	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l3_main_2 -&gt; dss_venc */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_venc_hwmod,</div><div class='del'>-	.clk		= "dss_fck",</div><div class='del'>-	.addr		= omap44xx_dss_venc_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='add'>+/*</div><div class='add'>+ * 'elm' class</div><div class='add'>+ * bch error location module</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap44xx_elm_sysc = {</div><div class='add'>+	.rev_offs	= 0x0000,</div><div class='add'>+	.sysc_offs	= 0x0010,</div><div class='add'>+	.syss_offs	= 0x0014,</div><div class='add'>+	.sysc_flags	= (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |</div><div class='add'>+			   SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |</div><div class='add'>+			   SYSS_HAS_RESET_STATUS),</div><div class='add'>+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48043000,</div><div class='del'>-		.pa_end		= 0x480430ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='add'>+static struct omap_hwmod_class omap44xx_elm_hwmod_class = {</div><div class='add'>+	.name	= "elm",</div><div class='add'>+	.sysc	= &amp;omap44xx_elm_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* elm */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_elm_irqs[] = {</div><div class='add'>+	{ .irq = 4 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_elm_hwmod = {</div><div class='add'>+	.name		= "elm",</div><div class='add'>+	.class		= &amp;omap44xx_elm_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l4_per_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_elm_irqs,</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_L4PER_ELM_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_L4PER_ELM_CONTEXT_OFFSET,</div><div class='add'>+		},</div><div class='ctx'> 	},</div><div class='del'>-	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_per -&gt; dss_venc */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_dss_venc_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_dss_venc_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='add'>+/*</div><div class='add'>+ * 'emif' class</div><div class='add'>+ * external memory interface no1</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap44xx_emif_sysc = {</div><div class='add'>+	.rev_offs	= 0x0000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* dss_venc slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_2__dss_venc,</div><div class='del'>-	&amp;omap44xx_l4_per__dss_venc,</div><div class='add'>+static struct omap_hwmod_class omap44xx_emif_hwmod_class = {</div><div class='add'>+	.name	= "emif",</div><div class='add'>+	.sysc	= &amp;omap44xx_emif_sysc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap44xx_dss_venc_hwmod = {</div><div class='del'>-	.name		= "dss_venc",</div><div class='del'>-	.class		= &amp;omap44xx_venc_hwmod_class,</div><div class='del'>-	.clkdm_name	= "l3_dss_clkdm",</div><div class='del'>-	.main_clk	= "dss_tv_clk",</div><div class='add'>+/* emif1 */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_emif1_irqs[] = {</div><div class='add'>+	{ .irq = 110 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_emif1_hwmod = {</div><div class='add'>+	.name		= "emif1",</div><div class='add'>+	.class		= &amp;omap44xx_emif_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l3_emif_clkdm",</div><div class='add'>+	.flags		= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,</div><div class='add'>+	.mpu_irqs	= omap44xx_emif1_irqs,</div><div class='add'>+	.main_clk	= "ddrphy_ck",</div><div class='ctx'> 	.prcm = {</div><div class='ctx'> 		.omap4 = {</div><div class='del'>-			.clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,</div><div class='del'>-			.context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_MEMIF_EMIF_1_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_MEMIF_EMIF_1_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_HWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* emif2 */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_emif2_irqs[] = {</div><div class='add'>+	{ .irq = 111 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_emif2_hwmod = {</div><div class='add'>+	.name		= "emif2",</div><div class='add'>+	.class		= &amp;omap44xx_emif_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l3_emif_clkdm",</div><div class='add'>+	.flags		= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,</div><div class='add'>+	.mpu_irqs	= omap44xx_emif2_irqs,</div><div class='add'>+	.main_clk	= "ddrphy_ck",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_MEMIF_EMIF_2_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_MEMIF_EMIF_2_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_HWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'fdif' class</div><div class='add'>+ * face detection hw accelerator module</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap44xx_fdif_sysc = {</div><div class='add'>+	.rev_offs	= 0x0000,</div><div class='add'>+	.sysc_offs	= 0x0010,</div><div class='add'>+	/*</div><div class='add'>+	 * FDIF needs 100 OCP clk cycles delay after a softreset before</div><div class='add'>+	 * accessing sysconfig again.</div><div class='add'>+	 * The lowest frequency at the moment for L3 bus is 100 MHz, so</div><div class='add'>+	 * 1usec delay is needed. Add an x2 margin to be safe (2 usecs).</div><div class='add'>+	 *</div><div class='add'>+	 * TODO: Indicate errata when available.</div><div class='add'>+	 */</div><div class='add'>+	.srst_udelay	= 2,</div><div class='add'>+	.sysc_flags	= (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |</div><div class='add'>+			   SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),</div><div class='add'>+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |</div><div class='add'>+			   MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_fdif_hwmod_class = {</div><div class='add'>+	.name	= "fdif",</div><div class='add'>+	.sysc	= &amp;omap44xx_fdif_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* fdif */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_fdif_irqs[] = {</div><div class='add'>+	{ .irq = 69 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_fdif_hwmod = {</div><div class='add'>+	.name		= "fdif",</div><div class='add'>+	.class		= &amp;omap44xx_fdif_hwmod_class,</div><div class='add'>+	.clkdm_name	= "iss_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_fdif_irqs,</div><div class='add'>+	.main_clk	= "fdif_fck",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_CAM_FDIF_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_CAM_FDIF_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_dss_venc_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_dss_venc_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1830,35 +1114,11 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* gpio1 */</div><div class='del'>-static struct omap_hwmod omap44xx_gpio1_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = {</div><div class='ctx'> 	{ .irq = 29 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a310000,</div><div class='del'>-		.pa_end		= 0x4a3101ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_wkup -&gt; gpio1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_gpio1_hwmod,</div><div class='del'>-	.clk		= "l4_wkup_clk_mux_ck",</div><div class='del'>-	.addr		= omap44xx_gpio1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_gpio1_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_wkup__gpio1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbclk", .clk = "gpio1_dbclk" },</div><div class='ctx'> };</div><div class='hunk'>@@ -1879,40 +1139,14 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {</div><div class='ctx'> 	.opt_clks	= gpio1_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(gpio1_opt_clks),</div><div class='ctx'> 	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_gpio1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_gpio1_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* gpio2 */</div><div class='del'>-static struct omap_hwmod omap44xx_gpio2_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = {</div><div class='ctx'> 	{ .irq = 30 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48055000,</div><div class='del'>-		.pa_end		= 0x480551ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; gpio2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_gpio2_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_gpio2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_gpio2_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__gpio2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbclk", .clk = "gpio2_dbclk" },</div><div class='ctx'> };</div><div class='hunk'>@@ -1934,40 +1168,14 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {</div><div class='ctx'> 	.opt_clks	= gpio2_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(gpio2_opt_clks),</div><div class='ctx'> 	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_gpio2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_gpio2_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* gpio3 */</div><div class='del'>-static struct omap_hwmod omap44xx_gpio3_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = {</div><div class='ctx'> 	{ .irq = 31 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48057000,</div><div class='del'>-		.pa_end		= 0x480571ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; gpio3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_gpio3_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_gpio3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio3 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_gpio3_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__gpio3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbclk", .clk = "gpio3_dbclk" },</div><div class='ctx'> };</div><div class='hunk'>@@ -1989,40 +1197,14 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {</div><div class='ctx'> 	.opt_clks	= gpio3_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(gpio3_opt_clks),</div><div class='ctx'> 	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_gpio3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_gpio3_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* gpio4 */</div><div class='del'>-static struct omap_hwmod omap44xx_gpio4_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = {</div><div class='ctx'> 	{ .irq = 32 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48059000,</div><div class='del'>-		.pa_end		= 0x480591ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; gpio4 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_gpio4_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_gpio4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio4 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_gpio4_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__gpio4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbclk", .clk = "gpio4_dbclk" },</div><div class='ctx'> };</div><div class='hunk'>@@ -2044,40 +1226,14 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {</div><div class='ctx'> 	.opt_clks	= gpio4_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(gpio4_opt_clks),</div><div class='ctx'> 	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_gpio4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_gpio4_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* gpio5 */</div><div class='del'>-static struct omap_hwmod omap44xx_gpio5_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = {</div><div class='ctx'> 	{ .irq = 33 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4805b000,</div><div class='del'>-		.pa_end		= 0x4805b1ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; gpio5 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_gpio5_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_gpio5_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio5 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_gpio5_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__gpio5,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbclk", .clk = "gpio5_dbclk" },</div><div class='ctx'> };</div><div class='hunk'>@@ -2099,40 +1255,14 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {</div><div class='ctx'> 	.opt_clks	= gpio5_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(gpio5_opt_clks),</div><div class='ctx'> 	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_gpio5_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_gpio5_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* gpio6 */</div><div class='del'>-static struct omap_hwmod omap44xx_gpio6_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = {</div><div class='ctx'> 	{ .irq = 34 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4805d000,</div><div class='del'>-		.pa_end		= 0x4805d1ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; gpio6 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_gpio6_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_gpio6_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio6 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_gpio6_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__gpio6,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {</div><div class='ctx'> 	{ .role = "dbclk", .clk = "gpio6_dbclk" },</div><div class='ctx'> };</div><div class='hunk'>@@ -2154,8 +1284,135 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {</div><div class='ctx'> 	.opt_clks	= gpio6_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(gpio6_opt_clks),</div><div class='ctx'> 	.dev_attr	= &amp;gpio_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_gpio6_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_gpio6_slaves),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'gpmc' class</div><div class='add'>+ * general purpose memory controller</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap44xx_gpmc_sysc = {</div><div class='add'>+	.rev_offs	= 0x0000,</div><div class='add'>+	.sysc_offs	= 0x0010,</div><div class='add'>+	.syss_offs	= 0x0014,</div><div class='add'>+	.sysc_flags	= (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |</div><div class='add'>+			   SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),</div><div class='add'>+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_gpmc_hwmod_class = {</div><div class='add'>+	.name	= "gpmc",</div><div class='add'>+	.sysc	= &amp;omap44xx_gpmc_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpmc */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_gpmc_irqs[] = {</div><div class='add'>+	{ .irq = 20 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_dma_info omap44xx_gpmc_sdma_reqs[] = {</div><div class='add'>+	{ .dma_req = 3 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .dma_req = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_gpmc_hwmod = {</div><div class='add'>+	.name		= "gpmc",</div><div class='add'>+	.class		= &amp;omap44xx_gpmc_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l3_2_clkdm",</div><div class='add'>+	.flags		= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,</div><div class='add'>+	.mpu_irqs	= omap44xx_gpmc_irqs,</div><div class='add'>+	.sdma_reqs	= omap44xx_gpmc_sdma_reqs,</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_L3_2_GPMC_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_L3_2_GPMC_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_HWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'gpu' class</div><div class='add'>+ * 2d/3d graphics accelerator</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap44xx_gpu_sysc = {</div><div class='add'>+	.rev_offs	= 0x1fc00,</div><div class='add'>+	.sysc_offs	= 0x1fc10,</div><div class='add'>+	.sysc_flags	= (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),</div><div class='add'>+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |</div><div class='add'>+			   SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |</div><div class='add'>+			   MSTANDBY_SMART | MSTANDBY_SMART_WKUP),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_gpu_hwmod_class = {</div><div class='add'>+	.name	= "gpu",</div><div class='add'>+	.sysc	= &amp;omap44xx_gpu_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpu */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_gpu_irqs[] = {</div><div class='add'>+	{ .irq = 21 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_gpu_hwmod = {</div><div class='add'>+	.name		= "gpu",</div><div class='add'>+	.class		= &amp;omap44xx_gpu_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l3_gfx_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_gpu_irqs,</div><div class='add'>+	.main_clk	= "gpu_fck",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_GFX_GFX_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_GFX_GFX_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_SWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'hdq1w' class</div><div class='add'>+ * hdq / 1-wire serial interface controller</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap44xx_hdq1w_sysc = {</div><div class='add'>+	.rev_offs	= 0x0000,</div><div class='add'>+	.sysc_offs	= 0x0014,</div><div class='add'>+	.syss_offs	= 0x0018,</div><div class='add'>+	.sysc_flags	= (SYSC_HAS_AUTOIDLE | SYSC_HAS_SOFTRESET |</div><div class='add'>+			   SYSS_HAS_RESET_STATUS),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_hdq1w_hwmod_class = {</div><div class='add'>+	.name	= "hdq1w",</div><div class='add'>+	.sysc	= &amp;omap44xx_hdq1w_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* hdq1w */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_hdq1w_irqs[] = {</div><div class='add'>+	{ .irq = 58 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_hdq1w_hwmod = {</div><div class='add'>+	.name		= "hdq1w",</div><div class='add'>+	.class		= &amp;omap44xx_hdq1w_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l4_per_clkdm",</div><div class='add'>+	.flags		= HWMOD_INIT_NO_RESET, /* XXX temporary */</div><div class='add'>+	.mpu_irqs	= omap44xx_hdq1w_irqs,</div><div class='add'>+	.main_clk	= "hdq1w_fck",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_L4PER_HDQ1W_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_L4PER_HDQ1W_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_SWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2190,34 +1447,6 @@ static struct omap_hwmod_irq_info omap44xx_hsi_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* hsi master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_hsi_masters[] = {</div><div class='del'>-	&amp;omap44xx_hsi__l3_main_2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_hsi_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a058000,</div><div class='del'>-		.pa_end		= 0x4a05bfff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; hsi */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_hsi_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_hsi_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hsi slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_hsi_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_cfg__hsi,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_hsi_hwmod = {</div><div class='ctx'> 	.name		= "hsi",</div><div class='ctx'> 	.class		= &amp;omap44xx_hsi_hwmod_class,</div><div class='hunk'>@@ -2231,10 +1460,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_HWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_hsi_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_hsi_slaves),</div><div class='del'>-	.masters	= omap44xx_hsi_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_hsi_masters),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2262,11 +1487,11 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_i2c_dev_attr i2c_dev_attr = {</div><div class='del'>-	.flags	= OMAP_I2C_FLAG_BUS_SHIFT_NONE,</div><div class='add'>+	.flags	= OMAP_I2C_FLAG_BUS_SHIFT_NONE |</div><div class='add'>+			OMAP_I2C_FLAG_RESET_REGS_POSTIDLE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* i2c1 */</div><div class='del'>-static struct omap_hwmod omap44xx_i2c1_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = {</div><div class='ctx'> 	{ .irq = 56 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -2278,29 +1503,6 @@ static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48070000,</div><div class='del'>-		.pa_end		= 0x480700ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; i2c1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_i2c1_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_i2c1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* i2c1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__i2c1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_i2c1_hwmod = {</div><div class='ctx'> 	.name		= "i2c1",</div><div class='ctx'> 	.class		= &amp;omap44xx_i2c_hwmod_class,</div><div class='hunk'>@@ -2316,13 +1518,10 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_i2c1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_i2c1_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;i2c_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* i2c2 */</div><div class='del'>-static struct omap_hwmod omap44xx_i2c2_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = {</div><div class='ctx'> 	{ .irq = 57 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -2334,29 +1533,6 @@ static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48072000,</div><div class='del'>-		.pa_end		= 0x480720ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; i2c2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_i2c2_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_i2c2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* i2c2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__i2c2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_i2c2_hwmod = {</div><div class='ctx'> 	.name		= "i2c2",</div><div class='ctx'> 	.class		= &amp;omap44xx_i2c_hwmod_class,</div><div class='hunk'>@@ -2372,13 +1548,10 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_i2c2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_i2c2_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;i2c_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* i2c3 */</div><div class='del'>-static struct omap_hwmod omap44xx_i2c3_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = {</div><div class='ctx'> 	{ .irq = 61 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -2390,29 +1563,6 @@ static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48060000,</div><div class='del'>-		.pa_end		= 0x480600ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; i2c3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_i2c3_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_i2c3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* i2c3 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__i2c3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_i2c3_hwmod = {</div><div class='ctx'> 	.name		= "i2c3",</div><div class='ctx'> 	.class		= &amp;omap44xx_i2c_hwmod_class,</div><div class='hunk'>@@ -2428,13 +1578,10 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_i2c3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_i2c3_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;i2c_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* i2c4 */</div><div class='del'>-static struct omap_hwmod omap44xx_i2c4_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = {</div><div class='ctx'> 	{ .irq = 62 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -2446,29 +1593,6 @@ static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48350000,</div><div class='del'>-		.pa_end		= 0x483500ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; i2c4 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_i2c4_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_i2c4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* i2c4 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__i2c4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_i2c4_hwmod = {</div><div class='ctx'> 	.name		= "i2c4",</div><div class='ctx'> 	.class		= &amp;omap44xx_i2c_hwmod_class,</div><div class='hunk'>@@ -2484,8 +1608,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_i2c4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_i2c4_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;i2c_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -2504,66 +1626,12 @@ static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_rst_info omap44xx_ipu_c0_resets[] = {</div><div class='add'>+static struct omap_hwmod_rst_info omap44xx_ipu_resets[] = {</div><div class='ctx'> 	{ .name = "cpu0", .rst_shift = 0 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_rst_info omap44xx_ipu_c1_resets[] = {</div><div class='ctx'> 	{ .name = "cpu1", .rst_shift = 1 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_rst_info omap44xx_ipu_resets[] = {</div><div class='ctx'> 	{ .name = "mmu_cache", .rst_shift = 2 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* ipu master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_ipu_masters[] = {</div><div class='del'>-	&amp;omap44xx_ipu__l3_main_2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_2 -&gt; ipu */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ipu = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_ipu_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ipu slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_ipu_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_2__ipu,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Pseudo hwmod for reset control purpose only */</div><div class='del'>-static struct omap_hwmod omap44xx_ipu_c0_hwmod = {</div><div class='del'>-	.name		= "ipu_c0",</div><div class='del'>-	.class		= &amp;omap44xx_ipu_hwmod_class,</div><div class='del'>-	.clkdm_name	= "ducati_clkdm",</div><div class='del'>-	.flags		= HWMOD_INIT_NO_RESET,</div><div class='del'>-	.rst_lines	= omap44xx_ipu_c0_resets,</div><div class='del'>-	.rst_lines_cnt	= ARRAY_SIZE(omap44xx_ipu_c0_resets),</div><div class='del'>-	.prcm = {</div><div class='del'>-		.omap4 = {</div><div class='del'>-			.rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Pseudo hwmod for reset control purpose only */</div><div class='del'>-static struct omap_hwmod omap44xx_ipu_c1_hwmod = {</div><div class='del'>-	.name		= "ipu_c1",</div><div class='del'>-	.class		= &amp;omap44xx_ipu_hwmod_class,</div><div class='del'>-	.clkdm_name	= "ducati_clkdm",</div><div class='del'>-	.flags		= HWMOD_INIT_NO_RESET,</div><div class='del'>-	.rst_lines	= omap44xx_ipu_c1_resets,</div><div class='del'>-	.rst_lines_cnt	= ARRAY_SIZE(omap44xx_ipu_c1_resets),</div><div class='del'>-	.prcm = {</div><div class='del'>-		.omap4 = {</div><div class='del'>-			.rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_ipu_hwmod = {</div><div class='ctx'> 	.name		= "ipu",</div><div class='ctx'> 	.class		= &amp;omap44xx_ipu_hwmod_class,</div><div class='hunk'>@@ -2580,10 +1648,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_HWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_ipu_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_ipu_slaves),</div><div class='del'>-	.masters	= omap44xx_ipu_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_ipu_masters),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2630,34 +1694,6 @@ static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* iss master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_iss_masters[] = {</div><div class='del'>-	&amp;omap44xx_iss__l3_main_2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_iss_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x52000000,</div><div class='del'>-		.pa_end		= 0x520000ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_2 -&gt; iss */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_iss_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.addr		= omap44xx_iss_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* iss slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_iss_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l3_main_2__iss,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk iss_opt_clks[] = {</div><div class='ctx'> 	{ .role = "ctrlclk", .clk = "iss_ctrlclk" },</div><div class='ctx'> };</div><div class='hunk'>@@ -2678,10 +1714,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= iss_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(iss_opt_clks),</div><div class='del'>-	.slaves		= omap44xx_iss_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_iss_slaves),</div><div class='del'>-	.masters	= omap44xx_iss_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_iss_masters),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2702,75 +1734,9 @@ static struct omap_hwmod_irq_info omap44xx_iva_irqs[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_rst_info omap44xx_iva_resets[] = {</div><div class='del'>-	{ .name = "logic", .rst_shift = 2 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_rst_info omap44xx_iva_seq0_resets[] = {</div><div class='ctx'> 	{ .name = "seq0", .rst_shift = 0 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_rst_info omap44xx_iva_seq1_resets[] = {</div><div class='ctx'> 	{ .name = "seq1", .rst_shift = 1 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* iva master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_iva_masters[] = {</div><div class='del'>-	&amp;omap44xx_iva__l3_main_2,</div><div class='del'>-	&amp;omap44xx_iva__l3_instr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x5a000000,</div><div class='del'>-		.pa_end		= 0x5a07ffff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l3_main_2 -&gt; iva */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = {</div><div class='del'>-	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_iva_hwmod,</div><div class='del'>-	.clk		= "l3_div_ck",</div><div class='del'>-	.addr		= omap44xx_iva_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* iva slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_iva_slaves[] = {</div><div class='del'>-	&amp;omap44xx_dsp__iva,</div><div class='del'>-	&amp;omap44xx_l3_main_2__iva,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Pseudo hwmod for reset control purpose only */</div><div class='del'>-static struct omap_hwmod omap44xx_iva_seq0_hwmod = {</div><div class='del'>-	.name		= "iva_seq0",</div><div class='del'>-	.class		= &amp;omap44xx_iva_hwmod_class,</div><div class='del'>-	.clkdm_name	= "ivahd_clkdm",</div><div class='del'>-	.flags		= HWMOD_INIT_NO_RESET,</div><div class='del'>-	.rst_lines	= omap44xx_iva_seq0_resets,</div><div class='del'>-	.rst_lines_cnt	= ARRAY_SIZE(omap44xx_iva_seq0_resets),</div><div class='del'>-	.prcm = {</div><div class='del'>-		.omap4 = {</div><div class='del'>-			.rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Pseudo hwmod for reset control purpose only */</div><div class='del'>-static struct omap_hwmod omap44xx_iva_seq1_hwmod = {</div><div class='del'>-	.name		= "iva_seq1",</div><div class='del'>-	.class		= &amp;omap44xx_iva_hwmod_class,</div><div class='del'>-	.clkdm_name	= "ivahd_clkdm",</div><div class='del'>-	.flags		= HWMOD_INIT_NO_RESET,</div><div class='del'>-	.rst_lines	= omap44xx_iva_seq1_resets,</div><div class='del'>-	.rst_lines_cnt	= ARRAY_SIZE(omap44xx_iva_seq1_resets),</div><div class='del'>-	.prcm = {</div><div class='del'>-		.omap4 = {</div><div class='del'>-			.rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='add'>+	{ .name = "logic", .rst_shift = 2 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod omap44xx_iva_hwmod = {</div><div class='hunk'>@@ -2789,10 +1755,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_HWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_iva_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_iva_slaves),</div><div class='del'>-	.masters	= omap44xx_iva_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_iva_masters),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2818,35 +1780,11 @@ static struct omap_hwmod_class omap44xx_kbd_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* kbd */</div><div class='del'>-static struct omap_hwmod omap44xx_kbd_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = {</div><div class='ctx'> 	{ .irq = 120 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a31c000,</div><div class='del'>-		.pa_end		= 0x4a31c07f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_wkup -&gt; kbd */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_kbd_hwmod,</div><div class='del'>-	.clk		= "l4_wkup_clk_mux_ck",</div><div class='del'>-	.addr		= omap44xx_kbd_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* kbd slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_kbd_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_wkup__kbd,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_kbd_hwmod = {</div><div class='ctx'> 	.name		= "kbd",</div><div class='ctx'> 	.class		= &amp;omap44xx_kbd_hwmod_class,</div><div class='hunk'>@@ -2860,8 +1798,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_kbd_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_kbd_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2885,35 +1821,11 @@ static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mailbox */</div><div class='del'>-static struct omap_hwmod omap44xx_mailbox_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = {</div><div class='ctx'> 	{ .irq = 26 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a0f4000,</div><div class='del'>-		.pa_end		= 0x4a0f41ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; mailbox */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mailbox_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_mailbox_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mailbox slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mailbox_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_cfg__mailbox,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_mailbox_hwmod = {</div><div class='ctx'> 	.name		= "mailbox",</div><div class='ctx'> 	.class		= &amp;omap44xx_mailbox_hwmod_class,</div><div class='hunk'>@@ -2925,8 +1837,58 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = {</div><div class='ctx'> 			.context_offs = OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_mailbox_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mailbox_slaves),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'mcasp' class</div><div class='add'>+ * multi-channel audio serial port controller</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* The IP is not compliant to type1 / type2 scheme */</div><div class='add'>+static struct omap_hwmod_sysc_fields omap_hwmod_sysc_type_mcasp = {</div><div class='add'>+	.sidle_shift	= 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap44xx_mcasp_sysc = {</div><div class='add'>+	.sysc_offs	= 0x0004,</div><div class='add'>+	.sysc_flags	= SYSC_HAS_SIDLEMODE,</div><div class='add'>+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |</div><div class='add'>+			   SIDLE_SMART_WKUP),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type_mcasp,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_mcasp_hwmod_class = {</div><div class='add'>+	.name	= "mcasp",</div><div class='add'>+	.sysc	= &amp;omap44xx_mcasp_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mcasp */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_mcasp_irqs[] = {</div><div class='add'>+	{ .name = "arevt", .irq = 108 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .name = "axevt", .irq = 109 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_dma_info omap44xx_mcasp_sdma_reqs[] = {</div><div class='add'>+	{ .name = "axevt", .dma_req = 7 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "arevt", .dma_req = 10 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .dma_req = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_mcasp_hwmod = {</div><div class='add'>+	.name		= "mcasp",</div><div class='add'>+	.class		= &amp;omap44xx_mcasp_hwmod_class,</div><div class='add'>+	.clkdm_name	= "abe_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_mcasp_irqs,</div><div class='add'>+	.sdma_reqs	= omap44xx_mcasp_sdma_reqs,</div><div class='add'>+	.main_clk	= "mcasp_fck",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM1_ABE_MCASP_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_ABE_MCASP_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_SWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2949,9 +1911,8 @@ static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp1 */</div><div class='del'>-static struct omap_hwmod omap44xx_mcbsp1_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = {</div><div class='del'>-	{ .irq = 17 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .name = "common", .irq = 17 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -2961,50 +1922,6 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "mpu",</div><div class='del'>-		.pa_start	= 0x40122000,</div><div class='del'>-		.pa_end		= 0x401220ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; mcbsp1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcbsp1_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_mcbsp1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "dma",</div><div class='del'>-		.pa_start	= 0x49022000,</div><div class='del'>-		.pa_end		= 0x490220ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; mcbsp1 (dma) */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcbsp1_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_mcbsp1_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_abe__mcbsp1,</div><div class='del'>-	&amp;omap44xx_l4_abe__mcbsp1_dma,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {</div><div class='ctx'> 	{ .role = "pad_fck", .clk = "pad_clks_ck" },</div><div class='ctx'> 	{ .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" },</div><div class='hunk'>@@ -3024,16 +1941,13 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_mcbsp1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp1_slaves),</div><div class='ctx'> 	.opt_clks	= mcbsp1_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(mcbsp1_opt_clks),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp2 */</div><div class='del'>-static struct omap_hwmod omap44xx_mcbsp2_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = {</div><div class='del'>-	{ .irq = 22 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .name = "common", .irq = 22 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3043,50 +1957,6 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "mpu",</div><div class='del'>-		.pa_start	= 0x40124000,</div><div class='del'>-		.pa_end		= 0x401240ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; mcbsp2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcbsp2_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_mcbsp2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "dma",</div><div class='del'>-		.pa_start	= 0x49024000,</div><div class='del'>-		.pa_end		= 0x490240ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; mcbsp2 (dma) */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcbsp2_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_mcbsp2_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_abe__mcbsp2,</div><div class='del'>-	&amp;omap44xx_l4_abe__mcbsp2_dma,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {</div><div class='ctx'> 	{ .role = "pad_fck", .clk = "pad_clks_ck" },</div><div class='ctx'> 	{ .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" },</div><div class='hunk'>@@ -3106,16 +1976,13 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_mcbsp2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp2_slaves),</div><div class='ctx'> 	.opt_clks	= mcbsp2_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(mcbsp2_opt_clks),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp3 */</div><div class='del'>-static struct omap_hwmod omap44xx_mcbsp3_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = {</div><div class='del'>-	{ .irq = 23 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .name = "common", .irq = 23 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3125,50 +1992,6 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "mpu",</div><div class='del'>-		.pa_start	= 0x40126000,</div><div class='del'>-		.pa_end		= 0x401260ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; mcbsp3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcbsp3_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_mcbsp3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "dma",</div><div class='del'>-		.pa_start	= 0x49026000,</div><div class='del'>-		.pa_end		= 0x490260ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; mcbsp3 (dma) */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcbsp3_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_mcbsp3_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp3 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_abe__mcbsp3,</div><div class='del'>-	&amp;omap44xx_l4_abe__mcbsp3_dma,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {</div><div class='ctx'> 	{ .role = "pad_fck", .clk = "pad_clks_ck" },</div><div class='ctx'> 	{ .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" },</div><div class='hunk'>@@ -3188,16 +2011,13 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_mcbsp3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp3_slaves),</div><div class='ctx'> 	.opt_clks	= mcbsp3_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(mcbsp3_opt_clks),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcbsp4 */</div><div class='del'>-static struct omap_hwmod omap44xx_mcbsp4_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = {</div><div class='del'>-	{ .irq = 16 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .name = "common", .irq = 16 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3207,29 +2027,6 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48096000,</div><div class='del'>-		.pa_end		= 0x480960ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mcbsp4 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcbsp4_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_mcbsp4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcbsp4 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__mcbsp4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {</div><div class='ctx'> 	{ .role = "pad_fck", .clk = "pad_clks_ck" },</div><div class='ctx'> 	{ .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" },</div><div class='hunk'>@@ -3249,8 +2046,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_mcbsp4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp4_slaves),</div><div class='ctx'> 	.opt_clks	= mcbsp4_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(mcbsp4_opt_clks),</div><div class='ctx'> };</div><div class='hunk'>@@ -3277,7 +2072,6 @@ static struct omap_hwmod_class omap44xx_mcpdm_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcpdm */</div><div class='del'>-static struct omap_hwmod omap44xx_mcpdm_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = {</div><div class='ctx'> 	{ .irq = 112 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -3289,48 +2083,6 @@ static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x40132000,</div><div class='del'>-		.pa_end		= 0x4013207f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; mcpdm */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcpdm_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_mcpdm_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcpdm_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49032000,</div><div class='del'>-		.pa_end		= 0x4903207f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; mcpdm (dma) */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcpdm_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_mcpdm_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcpdm slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mcpdm_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_abe__mcpdm,</div><div class='del'>-	&amp;omap44xx_l4_abe__mcpdm_dma,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_mcpdm_hwmod = {</div><div class='ctx'> 	.name		= "mcpdm",</div><div class='ctx'> 	.class		= &amp;omap44xx_mcpdm_hwmod_class,</div><div class='hunk'>@@ -3345,8 +2097,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_mcpdm_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcpdm_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -3372,7 +2122,6 @@ static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcspi1 */</div><div class='del'>-static struct omap_hwmod omap44xx_mcspi1_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = {</div><div class='ctx'> 	{ .irq = 65 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -3390,29 +2139,6 @@ static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48098000,</div><div class='del'>-		.pa_end		= 0x480981ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mcspi1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi1 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcspi1_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_mcspi1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcspi1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mcspi1_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__mcspi1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* mcspi1 dev_attr */</div><div class='ctx'> static struct omap2_mcspi_dev_attr mcspi1_dev_attr = {</div><div class='ctx'> 	.num_chipselect	= 4,</div><div class='hunk'>@@ -3433,12 +2159,9 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;mcspi1_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_mcspi1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcspi1_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcspi2 */</div><div class='del'>-static struct omap_hwmod omap44xx_mcspi2_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = {</div><div class='ctx'> 	{ .irq = 66 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -3452,29 +2175,6 @@ static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4809a000,</div><div class='del'>-		.pa_end		= 0x4809a1ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mcspi2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi2 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcspi2_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_mcspi2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcspi2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mcspi2_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__mcspi2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* mcspi2 dev_attr */</div><div class='ctx'> static struct omap2_mcspi_dev_attr mcspi2_dev_attr = {</div><div class='ctx'> 	.num_chipselect	= 2,</div><div class='hunk'>@@ -3495,12 +2195,9 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;mcspi2_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_mcspi2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcspi2_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcspi3 */</div><div class='del'>-static struct omap_hwmod omap44xx_mcspi3_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = {</div><div class='ctx'> 	{ .irq = 91 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -3514,29 +2211,6 @@ static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x480b8000,</div><div class='del'>-		.pa_end		= 0x480b81ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mcspi3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi3 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcspi3_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_mcspi3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcspi3 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mcspi3_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__mcspi3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* mcspi3 dev_attr */</div><div class='ctx'> static struct omap2_mcspi_dev_attr mcspi3_dev_attr = {</div><div class='ctx'> 	.num_chipselect	= 2,</div><div class='hunk'>@@ -3557,12 +2231,9 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;mcspi3_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_mcspi3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcspi3_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mcspi4 */</div><div class='del'>-static struct omap_hwmod omap44xx_mcspi4_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = {</div><div class='ctx'> 	{ .irq = 48 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -3574,29 +2245,6 @@ static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x480ba000,</div><div class='del'>-		.pa_end		= 0x480ba1ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mcspi4 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi4 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mcspi4_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_mcspi4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mcspi4 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mcspi4_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__mcspi4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* mcspi4 dev_attr */</div><div class='ctx'> static struct omap2_mcspi_dev_attr mcspi4_dev_attr = {</div><div class='ctx'> 	.num_chipselect	= 1,</div><div class='hunk'>@@ -3617,8 +2265,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;mcspi4_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_mcspi4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcspi4_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -3655,34 +2301,6 @@ static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* mmc1 master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mmc1_masters[] = {</div><div class='del'>-	&amp;omap44xx_mmc1__l3_main_1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4809c000,</div><div class='del'>-		.pa_end		= 0x4809c3ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mmc1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mmc1_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_mmc1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mmc1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mmc1_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__mmc1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* mmc1 dev_attr */</div><div class='ctx'> static struct omap_mmc_dev_attr mmc1_dev_attr = {</div><div class='ctx'> 	.flags	= OMAP_HSMMC_SUPPORTS_DUAL_VOLT,</div><div class='hunk'>@@ -3703,10 +2321,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;mmc1_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_mmc1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mmc1_slaves),</div><div class='del'>-	.masters	= omap44xx_mmc1_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_mmc1_masters),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mmc2 */</div><div class='hunk'>@@ -3721,34 +2335,6 @@ static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* mmc2 master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mmc2_masters[] = {</div><div class='del'>-	&amp;omap44xx_mmc2__l3_main_1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x480b4000,</div><div class='del'>-		.pa_end		= 0x480b43ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mmc2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mmc2_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_mmc2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mmc2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mmc2_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__mmc2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_mmc2_hwmod = {</div><div class='ctx'> 	.name		= "mmc2",</div><div class='ctx'> 	.class		= &amp;omap44xx_mmc_hwmod_class,</div><div class='hunk'>@@ -3763,14 +2349,9 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_mmc2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mmc2_slaves),</div><div class='del'>-	.masters	= omap44xx_mmc2_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_mmc2_masters),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mmc3 */</div><div class='del'>-static struct omap_hwmod omap44xx_mmc3_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = {</div><div class='ctx'> 	{ .irq = 94 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -3782,29 +2363,6 @@ static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x480ad000,</div><div class='del'>-		.pa_end		= 0x480ad3ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mmc3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mmc3_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_mmc3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mmc3 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mmc3_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__mmc3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_mmc3_hwmod = {</div><div class='ctx'> 	.name		= "mmc3",</div><div class='ctx'> 	.class		= &amp;omap44xx_mmc_hwmod_class,</div><div class='hunk'>@@ -3819,12 +2377,9 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_mmc3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mmc3_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mmc4 */</div><div class='del'>-static struct omap_hwmod omap44xx_mmc4_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = {</div><div class='ctx'> 	{ .irq = 96 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -3836,35 +2391,11 @@ static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x480d1000,</div><div class='del'>-		.pa_end		= 0x480d13ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mmc4 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mmc4_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_mmc4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mmc4 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mmc4_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__mmc4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_mmc4_hwmod = {</div><div class='ctx'> 	.name		= "mmc4",</div><div class='ctx'> 	.class		= &amp;omap44xx_mmc_hwmod_class,</div><div class='ctx'> 	.clkdm_name	= "l4_per_clkdm",</div><div class='ctx'> 	.mpu_irqs	= omap44xx_mmc4_irqs,</div><div class='del'>-</div><div class='ctx'> 	.sdma_reqs	= omap44xx_mmc4_sdma_reqs,</div><div class='ctx'> 	.main_clk	= "mmc4_fck",</div><div class='ctx'> 	.prcm = {</div><div class='hunk'>@@ -3874,12 +2405,9 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_mmc4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mmc4_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mmc5 */</div><div class='del'>-static struct omap_hwmod omap44xx_mmc5_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = {</div><div class='ctx'> 	{ .irq = 59 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -3891,29 +2419,6 @@ static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x480d5000,</div><div class='del'>-		.pa_end		= 0x480d53ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; mmc5 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_mmc5_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_mmc5_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mmc5 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mmc5_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__mmc5,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_mmc5_hwmod = {</div><div class='ctx'> 	.name		= "mmc5",</div><div class='ctx'> 	.class		= &amp;omap44xx_mmc_hwmod_class,</div><div class='hunk'>@@ -3928,8 +2433,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_mmc5_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_mmc5_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -3949,13 +2452,6 @@ static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* mpu master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = {</div><div class='del'>-	&amp;omap44xx_mpu__l3_main_1,</div><div class='del'>-	&amp;omap44xx_mpu__l4_abe,</div><div class='del'>-	&amp;omap44xx_mpu__dmm,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_mpu_hwmod = {</div><div class='ctx'> 	.name		= "mpu",</div><div class='ctx'> 	.class		= &amp;omap44xx_mpu_hwmod_class,</div><div class='hunk'>@@ -3969,8 +2465,252 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {</div><div class='ctx'> 			.context_offs = OMAP4_RM_MPU_MPU_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.masters	= omap44xx_mpu_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_mpu_masters),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'ocmc_ram' class</div><div class='add'>+ * top-level core on-chip ram</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_ocmc_ram_hwmod_class = {</div><div class='add'>+	.name	= "ocmc_ram",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ocmc_ram */</div><div class='add'>+static struct omap_hwmod omap44xx_ocmc_ram_hwmod = {</div><div class='add'>+	.name		= "ocmc_ram",</div><div class='add'>+	.class		= &amp;omap44xx_ocmc_ram_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l3_2_clkdm",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_L3_2_OCMC_RAM_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'ocp2scp' class</div><div class='add'>+ * bridge to transform ocp interface protocol to scp (serial control port)</div><div class='add'>+ * protocol</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_ocp2scp_hwmod_class = {</div><div class='add'>+	.name	= "ocp2scp",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ocp2scp_usb_phy */</div><div class='add'>+static struct omap_hwmod_opt_clk ocp2scp_usb_phy_opt_clks[] = {</div><div class='add'>+	{ .role = "phy_48m", .clk = "ocp2scp_usb_phy_phy_48m" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {</div><div class='add'>+	.name		= "ocp2scp_usb_phy",</div><div class='add'>+	.class		= &amp;omap44xx_ocp2scp_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l3_init_clkdm",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_L3INIT_USBPHYOCP2SCP_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_HWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.opt_clks	= ocp2scp_usb_phy_opt_clks,</div><div class='add'>+	.opt_clks_cnt	= ARRAY_SIZE(ocp2scp_usb_phy_opt_clks),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'prcm' class</div><div class='add'>+ * power and reset manager (part of the prcm infrastructure) + clock manager 2</div><div class='add'>+ * + clock manager 1 (in always on power domain) + local prm in mpu</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_prcm_hwmod_class = {</div><div class='add'>+	.name	= "prcm",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* prcm_mpu */</div><div class='add'>+static struct omap_hwmod omap44xx_prcm_mpu_hwmod = {</div><div class='add'>+	.name		= "prcm_mpu",</div><div class='add'>+	.class		= &amp;omap44xx_prcm_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l4_wkup_clkdm",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* cm_core_aon */</div><div class='add'>+static struct omap_hwmod omap44xx_cm_core_aon_hwmod = {</div><div class='add'>+	.name		= "cm_core_aon",</div><div class='add'>+	.class		= &amp;omap44xx_prcm_hwmod_class,</div><div class='add'>+	.clkdm_name	= "cm_clkdm",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* cm_core */</div><div class='add'>+static struct omap_hwmod omap44xx_cm_core_hwmod = {</div><div class='add'>+	.name		= "cm_core",</div><div class='add'>+	.class		= &amp;omap44xx_prcm_hwmod_class,</div><div class='add'>+	.clkdm_name	= "cm_clkdm",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* prm */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_prm_irqs[] = {</div><div class='add'>+	{ .irq = 11 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_rst_info omap44xx_prm_resets[] = {</div><div class='add'>+	{ .name = "rst_global_warm_sw", .rst_shift = 0 },</div><div class='add'>+	{ .name = "rst_global_cold_sw", .rst_shift = 1 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_prm_hwmod = {</div><div class='add'>+	.name		= "prm",</div><div class='add'>+	.class		= &amp;omap44xx_prcm_hwmod_class,</div><div class='add'>+	.clkdm_name	= "prm_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_prm_irqs,</div><div class='add'>+	.rst_lines	= omap44xx_prm_resets,</div><div class='add'>+	.rst_lines_cnt	= ARRAY_SIZE(omap44xx_prm_resets),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'scrm' class</div><div class='add'>+ * system clock and reset manager</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_scrm_hwmod_class = {</div><div class='add'>+	.name	= "scrm",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* scrm */</div><div class='add'>+static struct omap_hwmod omap44xx_scrm_hwmod = {</div><div class='add'>+	.name		= "scrm",</div><div class='add'>+	.class		= &amp;omap44xx_scrm_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l4_wkup_clkdm",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'sl2if' class</div><div class='add'>+ * shared level 2 memory interface</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_sl2if_hwmod_class = {</div><div class='add'>+	.name	= "sl2if",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* sl2if */</div><div class='add'>+static struct omap_hwmod omap44xx_sl2if_hwmod = {</div><div class='add'>+	.name		= "sl2if",</div><div class='add'>+	.class		= &amp;omap44xx_sl2if_hwmod_class,</div><div class='add'>+	.clkdm_name	= "ivahd_clkdm",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_IVAHD_SL2_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_IVAHD_SL2_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_HWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'slimbus' class</div><div class='add'>+ * bidirectional, multi-drop, multi-channel two-line serial interface between</div><div class='add'>+ * the device and external components</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap44xx_slimbus_sysc = {</div><div class='add'>+	.rev_offs	= 0x0000,</div><div class='add'>+	.sysc_offs	= 0x0010,</div><div class='add'>+	.sysc_flags	= (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE |</div><div class='add'>+			   SYSC_HAS_SOFTRESET),</div><div class='add'>+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |</div><div class='add'>+			   SIDLE_SMART_WKUP),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_slimbus_hwmod_class = {</div><div class='add'>+	.name	= "slimbus",</div><div class='add'>+	.sysc	= &amp;omap44xx_slimbus_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* slimbus1 */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_slimbus1_irqs[] = {</div><div class='add'>+	{ .irq = 97 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_dma_info omap44xx_slimbus1_sdma_reqs[] = {</div><div class='add'>+	{ .name = "tx0", .dma_req = 84 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "tx1", .dma_req = 85 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "tx2", .dma_req = 86 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "tx3", .dma_req = 87 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "rx0", .dma_req = 88 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "rx1", .dma_req = 89 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "rx2", .dma_req = 90 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "rx3", .dma_req = 91 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .dma_req = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_opt_clk slimbus1_opt_clks[] = {</div><div class='add'>+	{ .role = "fclk_1", .clk = "slimbus1_fclk_1" },</div><div class='add'>+	{ .role = "fclk_0", .clk = "slimbus1_fclk_0" },</div><div class='add'>+	{ .role = "fclk_2", .clk = "slimbus1_fclk_2" },</div><div class='add'>+	{ .role = "slimbus_clk", .clk = "slimbus1_slimbus_clk" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_slimbus1_hwmod = {</div><div class='add'>+	.name		= "slimbus1",</div><div class='add'>+	.class		= &amp;omap44xx_slimbus_hwmod_class,</div><div class='add'>+	.clkdm_name	= "abe_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_slimbus1_irqs,</div><div class='add'>+	.sdma_reqs	= omap44xx_slimbus1_sdma_reqs,</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM1_ABE_SLIMBUS_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_ABE_SLIMBUS_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_SWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.opt_clks	= slimbus1_opt_clks,</div><div class='add'>+	.opt_clks_cnt	= ARRAY_SIZE(slimbus1_opt_clks),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* slimbus2 */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_slimbus2_irqs[] = {</div><div class='add'>+	{ .irq = 98 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_dma_info omap44xx_slimbus2_sdma_reqs[] = {</div><div class='add'>+	{ .name = "tx0", .dma_req = 92 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "tx1", .dma_req = 93 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "tx2", .dma_req = 94 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "tx3", .dma_req = 95 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "rx0", .dma_req = 96 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "rx1", .dma_req = 97 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "rx2", .dma_req = 98 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .name = "rx3", .dma_req = 99 + OMAP44XX_DMA_REQ_START },</div><div class='add'>+	{ .dma_req = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_opt_clk slimbus2_opt_clks[] = {</div><div class='add'>+	{ .role = "fclk_1", .clk = "slimbus2_fclk_1" },</div><div class='add'>+	{ .role = "fclk_0", .clk = "slimbus2_fclk_0" },</div><div class='add'>+	{ .role = "slimbus_clk", .clk = "slimbus2_slimbus_clk" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_slimbus2_hwmod = {</div><div class='add'>+	.name		= "slimbus2",</div><div class='add'>+	.class		= &amp;omap44xx_slimbus_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l4_per_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_slimbus2_irqs,</div><div class='add'>+	.sdma_reqs	= omap44xx_slimbus2_sdma_reqs,</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_L4PER_SLIMBUS2_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_L4PER_SLIMBUS2_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_SWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.opt_clks	= slimbus2_opt_clks,</div><div class='add'>+	.opt_clks_cnt	= ARRAY_SIZE(slimbus2_opt_clks),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -4004,35 +2744,11 @@ static struct omap_smartreflex_dev_attr smartreflex_core_dev_attr = {</div><div class='ctx'> 	.sensor_voltdm_name   = "core",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap44xx_smartreflex_core_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = {</div><div class='ctx'> 	{ .irq = 19 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a0dd000,</div><div class='del'>-		.pa_end		= 0x4a0dd03f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; smartreflex_core */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_smartreflex_core_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_smartreflex_core_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* smartreflex_core slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_smartreflex_core_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_cfg__smartreflex_core,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {</div><div class='ctx'> 	.name		= "smartreflex_core",</div><div class='ctx'> 	.class		= &amp;omap44xx_smartreflex_hwmod_class,</div><div class='hunk'>@@ -4047,8 +2763,6 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_smartreflex_core_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_smartreflex_core_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;smartreflex_core_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -4057,35 +2771,11 @@ static struct omap_smartreflex_dev_attr smartreflex_iva_dev_attr = {</div><div class='ctx'> 	.sensor_voltdm_name	= "iva",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap44xx_smartreflex_iva_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = {</div><div class='ctx'> 	{ .irq = 102 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a0db000,</div><div class='del'>-		.pa_end		= 0x4a0db03f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; smartreflex_iva */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_smartreflex_iva_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_smartreflex_iva_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* smartreflex_iva slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_smartreflex_iva_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_cfg__smartreflex_iva,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {</div><div class='ctx'> 	.name		= "smartreflex_iva",</div><div class='ctx'> 	.class		= &amp;omap44xx_smartreflex_hwmod_class,</div><div class='hunk'>@@ -4099,8 +2789,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_smartreflex_iva_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_smartreflex_iva_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;smartreflex_iva_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -4109,35 +2797,11 @@ static struct omap_smartreflex_dev_attr smartreflex_mpu_dev_attr = {</div><div class='ctx'> 	.sensor_voltdm_name	= "mpu",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = {</div><div class='ctx'> 	{ .irq = 18 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a0d9000,</div><div class='del'>-		.pa_end		= 0x4a0d903f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; smartreflex_mpu */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_mpu = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_smartreflex_mpu_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_smartreflex_mpu_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* smartreflex_mpu slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_smartreflex_mpu_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_cfg__smartreflex_mpu,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {</div><div class='ctx'> 	.name		= "smartreflex_mpu",</div><div class='ctx'> 	.class		= &amp;omap44xx_smartreflex_hwmod_class,</div><div class='hunk'>@@ -4151,8 +2815,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_smartreflex_mpu_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves),</div><div class='ctx'> 	.dev_attr	= &amp;smartreflex_mpu_dev_attr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -4180,30 +2842,6 @@ static struct omap_hwmod_class omap44xx_spinlock_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* spinlock */</div><div class='del'>-static struct omap_hwmod omap44xx_spinlock_hwmod;</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_spinlock_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a0f6000,</div><div class='del'>-		.pa_end		= 0x4a0f6fff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; spinlock */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__spinlock = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_spinlock_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_spinlock_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* spinlock slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_spinlock_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_cfg__spinlock,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_spinlock_hwmod = {</div><div class='ctx'> 	.name		= "spinlock",</div><div class='ctx'> 	.class		= &amp;omap44xx_spinlock_hwmod_class,</div><div class='hunk'>@@ -4214,8 +2852,6 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = {</div><div class='ctx'> 			.context_offs = OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_spinlock_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_spinlock_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -4267,35 +2903,11 @@ static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer1 */</div><div class='del'>-static struct omap_hwmod omap44xx_timer1_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = {</div><div class='ctx'> 	{ .irq = 37 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a318000,</div><div class='del'>-		.pa_end		= 0x4a31807f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_wkup -&gt; timer1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer1_hwmod,</div><div class='del'>-	.clk		= "l4_wkup_clk_mux_ck",</div><div class='del'>-	.addr		= omap44xx_timer1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_timer1_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_wkup__timer1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_timer1_hwmod = {</div><div class='ctx'> 	.name		= "timer1",</div><div class='ctx'> 	.class		= &amp;omap44xx_timer_1ms_hwmod_class,</div><div class='hunk'>@@ -4310,40 +2922,14 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_timer1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_timer1_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer2 */</div><div class='del'>-static struct omap_hwmod omap44xx_timer2_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = {</div><div class='ctx'> 	{ .irq = 38 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48032000,</div><div class='del'>-		.pa_end		= 0x4803207f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer2_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_timer2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_timer2_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__timer2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_timer2_hwmod = {</div><div class='ctx'> 	.name		= "timer2",</div><div class='ctx'> 	.class		= &amp;omap44xx_timer_1ms_hwmod_class,</div><div class='hunk'>@@ -4358,40 +2944,14 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_timer2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_timer2_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer3 */</div><div class='del'>-static struct omap_hwmod omap44xx_timer3_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = {</div><div class='ctx'> 	{ .irq = 39 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48034000,</div><div class='del'>-		.pa_end		= 0x4803407f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer3_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_timer3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer3 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_timer3_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__timer3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_timer3_hwmod = {</div><div class='ctx'> 	.name		= "timer3",</div><div class='ctx'> 	.class		= &amp;omap44xx_timer_hwmod_class,</div><div class='hunk'>@@ -4406,40 +2966,14 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_timer3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_timer3_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer4 */</div><div class='del'>-static struct omap_hwmod omap44xx_timer4_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = {</div><div class='ctx'> 	{ .irq = 40 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48036000,</div><div class='del'>-		.pa_end		= 0x4803607f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer4 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer4_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_timer4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer4 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_timer4_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__timer4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_timer4_hwmod = {</div><div class='ctx'> 	.name		= "timer4",</div><div class='ctx'> 	.class		= &amp;omap44xx_timer_hwmod_class,</div><div class='hunk'>@@ -4454,59 +2988,14 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_timer4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_timer4_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer5 */</div><div class='del'>-static struct omap_hwmod omap44xx_timer5_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = {</div><div class='ctx'> 	{ .irq = 41 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x40138000,</div><div class='del'>-		.pa_end		= 0x4013807f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; timer5 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer5_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_timer5_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer5_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x49038000,</div><div class='del'>-		.pa_end		= 0x4903807f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; timer5 (dma) */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer5_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_timer5_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer5 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_timer5_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_abe__timer5,</div><div class='del'>-	&amp;omap44xx_l4_abe__timer5_dma,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_timer5_hwmod = {</div><div class='ctx'> 	.name		= "timer5",</div><div class='ctx'> 	.class		= &amp;omap44xx_timer_hwmod_class,</div><div class='hunk'>@@ -4521,59 +3010,14 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_timer5_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_timer5_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer6 */</div><div class='del'>-static struct omap_hwmod omap44xx_timer6_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = {</div><div class='ctx'> 	{ .irq = 42 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4013a000,</div><div class='del'>-		.pa_end		= 0x4013a07f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; timer6 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer6_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_timer6_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer6_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4903a000,</div><div class='del'>-		.pa_end		= 0x4903a07f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; timer6 (dma) */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer6_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_timer6_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer6 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_timer6_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_abe__timer6,</div><div class='del'>-	&amp;omap44xx_l4_abe__timer6_dma,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_timer6_hwmod = {</div><div class='ctx'> 	.name		= "timer6",</div><div class='ctx'> 	.class		= &amp;omap44xx_timer_hwmod_class,</div><div class='hunk'>@@ -4589,59 +3033,14 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_timer6_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_timer6_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer7 */</div><div class='del'>-static struct omap_hwmod omap44xx_timer7_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = {</div><div class='ctx'> 	{ .irq = 43 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4013c000,</div><div class='del'>-		.pa_end		= 0x4013c07f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; timer7 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer7_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_timer7_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer7_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4903c000,</div><div class='del'>-		.pa_end		= 0x4903c07f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; timer7 (dma) */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer7_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_timer7_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer7 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_timer7_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_abe__timer7,</div><div class='del'>-	&amp;omap44xx_l4_abe__timer7_dma,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_timer7_hwmod = {</div><div class='ctx'> 	.name		= "timer7",</div><div class='ctx'> 	.class		= &amp;omap44xx_timer_hwmod_class,</div><div class='hunk'>@@ -4656,59 +3055,14 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_alwon_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_timer7_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_timer7_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer8 */</div><div class='del'>-static struct omap_hwmod omap44xx_timer8_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = {</div><div class='ctx'> 	{ .irq = 44 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4013e000,</div><div class='del'>-		.pa_end		= 0x4013e07f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; timer8 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer8_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_timer8_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer8_dma_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4903e000,</div><div class='del'>-		.pa_end		= 0x4903e07f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_abe -&gt; timer8 (dma) */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer8_hwmod,</div><div class='del'>-	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_timer8_dma_addrs,</div><div class='del'>-	.user		= OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer8 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_timer8_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_abe__timer8,</div><div class='del'>-	&amp;omap44xx_l4_abe__timer8_dma,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_timer8_hwmod = {</div><div class='ctx'> 	.name		= "timer8",</div><div class='ctx'> 	.class		= &amp;omap44xx_timer_hwmod_class,</div><div class='hunk'>@@ -4723,40 +3077,14 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_timer8_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_timer8_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer9 */</div><div class='del'>-static struct omap_hwmod omap44xx_timer9_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = {</div><div class='ctx'> 	{ .irq = 45 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4803e000,</div><div class='del'>-		.pa_end		= 0x4803e07f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer9 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer9_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_timer9_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer9 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_timer9_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__timer9,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_timer9_hwmod = {</div><div class='ctx'> 	.name		= "timer9",</div><div class='ctx'> 	.class		= &amp;omap44xx_timer_hwmod_class,</div><div class='hunk'>@@ -4771,40 +3099,14 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_timer9_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_timer9_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer10 */</div><div class='del'>-static struct omap_hwmod omap44xx_timer10_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = {</div><div class='ctx'> 	{ .irq = 46 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48086000,</div><div class='del'>-		.pa_end		= 0x4808607f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer10 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer10_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_timer10_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer10 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_timer10_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__timer10,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_timer10_hwmod = {</div><div class='ctx'> 	.name		= "timer10",</div><div class='ctx'> 	.class		= &amp;omap44xx_timer_1ms_hwmod_class,</div><div class='hunk'>@@ -4819,40 +3121,14 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_timer10_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_timer10_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* timer11 */</div><div class='del'>-static struct omap_hwmod omap44xx_timer11_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = {</div><div class='ctx'> 	{ .irq = 47 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48088000,</div><div class='del'>-		.pa_end		= 0x4808807f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; timer11 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_timer11_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_timer11_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* timer11 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_timer11_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__timer11,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_timer11_hwmod = {</div><div class='ctx'> 	.name		= "timer11",</div><div class='ctx'> 	.class		= &amp;omap44xx_timer_hwmod_class,</div><div class='hunk'>@@ -4867,8 +3143,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = {</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.dev_attr	= &amp;capability_pwm_dev_attr,</div><div class='del'>-	.slaves		= omap44xx_timer11_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_timer11_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -4894,7 +3168,6 @@ static struct omap_hwmod_class omap44xx_uart_hwmod_class = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* uart1 */</div><div class='del'>-static struct omap_hwmod omap44xx_uart1_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = {</div><div class='ctx'> 	{ .irq = 72 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -4906,29 +3179,6 @@ static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4806a000,</div><div class='del'>-		.pa_end		= 0x4806a0ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; uart1 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_uart1_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_uart1_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart1 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__uart1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_uart1_hwmod = {</div><div class='ctx'> 	.name		= "uart1",</div><div class='ctx'> 	.class		= &amp;omap44xx_uart_hwmod_class,</div><div class='hunk'>@@ -4943,12 +3193,9 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_uart1_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_uart1_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* uart2 */</div><div class='del'>-static struct omap_hwmod omap44xx_uart2_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = {</div><div class='ctx'> 	{ .irq = 73 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -4960,29 +3207,6 @@ static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4806c000,</div><div class='del'>-		.pa_end		= 0x4806c0ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; uart2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_uart2_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_uart2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__uart2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_uart2_hwmod = {</div><div class='ctx'> 	.name		= "uart2",</div><div class='ctx'> 	.class		= &amp;omap44xx_uart_hwmod_class,</div><div class='hunk'>@@ -4997,12 +3221,9 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_uart2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_uart2_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* uart3 */</div><div class='del'>-static struct omap_hwmod omap44xx_uart3_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = {</div><div class='ctx'> 	{ .irq = 74 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -5014,29 +3235,6 @@ static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x48020000,</div><div class='del'>-		.pa_end		= 0x480200ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; uart3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_uart3_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_uart3_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart3 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__uart3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_uart3_hwmod = {</div><div class='ctx'> 	.name		= "uart3",</div><div class='ctx'> 	.class		= &amp;omap44xx_uart_hwmod_class,</div><div class='hunk'>@@ -5052,12 +3250,9 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_uart3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_uart3_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* uart4 */</div><div class='del'>-static struct omap_hwmod omap44xx_uart4_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = {</div><div class='ctx'> 	{ .irq = 70 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='hunk'>@@ -5069,29 +3264,6 @@ static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = {</div><div class='ctx'> 	{ .dma_req = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4806e000,</div><div class='del'>-		.pa_end		= 0x4806e0ff,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_per -&gt; uart4 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_uart4_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_uart4_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart4 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_per__uart4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_uart4_hwmod = {</div><div class='ctx'> 	.name		= "uart4",</div><div class='ctx'> 	.class		= &amp;omap44xx_uart_hwmod_class,</div><div class='hunk'>@@ -5106,8 +3278,147 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_uart4_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_uart4_slaves),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'usb_host_fs' class</div><div class='add'>+ * full-speed usb host controller</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* The IP is not compliant to type1 / type2 scheme */</div><div class='add'>+static struct omap_hwmod_sysc_fields omap_hwmod_sysc_type_usb_host_fs = {</div><div class='add'>+	.midle_shift	= 4,</div><div class='add'>+	.sidle_shift	= 2,</div><div class='add'>+	.srst_shift	= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap44xx_usb_host_fs_sysc = {</div><div class='add'>+	.rev_offs	= 0x0000,</div><div class='add'>+	.sysc_offs	= 0x0210,</div><div class='add'>+	.sysc_flags	= (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |</div><div class='add'>+			   SYSC_HAS_SOFTRESET),</div><div class='add'>+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |</div><div class='add'>+			   SIDLE_SMART_WKUP),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type_usb_host_fs,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_usb_host_fs_hwmod_class = {</div><div class='add'>+	.name	= "usb_host_fs",</div><div class='add'>+	.sysc	= &amp;omap44xx_usb_host_fs_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* usb_host_fs */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_usb_host_fs_irqs[] = {</div><div class='add'>+	{ .name = "std", .irq = 89 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .name = "smi", .irq = 90 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_usb_host_fs_hwmod = {</div><div class='add'>+	.name		= "usb_host_fs",</div><div class='add'>+	.class		= &amp;omap44xx_usb_host_fs_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l3_init_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_usb_host_fs_irqs,</div><div class='add'>+	.main_clk	= "usb_host_fs_fck",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_L3INIT_USB_HOST_FS_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_L3INIT_USB_HOST_FS_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_SWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'usb_host_hs' class</div><div class='add'>+ * high-speed multi-port usb host controller</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = {</div><div class='add'>+	.rev_offs	= 0x0000,</div><div class='add'>+	.sysc_offs	= 0x0010,</div><div class='add'>+	.syss_offs	= 0x0014,</div><div class='add'>+	.sysc_flags	= (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |</div><div class='add'>+			   SYSC_HAS_SOFTRESET),</div><div class='add'>+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |</div><div class='add'>+			   SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |</div><div class='add'>+			   MSTANDBY_SMART | MSTANDBY_SMART_WKUP),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = {</div><div class='add'>+	.name	= "usb_host_hs",</div><div class='add'>+	.sysc	= &amp;omap44xx_usb_host_hs_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* usb_host_hs */</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = {</div><div class='add'>+	{ .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {</div><div class='add'>+	.name		= "usb_host_hs",</div><div class='add'>+	.class		= &amp;omap44xx_usb_host_hs_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l3_init_clkdm",</div><div class='add'>+	.main_clk	= "usb_host_hs_fck",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_SWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.mpu_irqs	= omap44xx_usb_host_hs_irqs,</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock</div><div class='add'>+	 * id: i660</div><div class='add'>+	 *</div><div class='add'>+	 * Description:</div><div class='add'>+	 * In the following configuration :</div><div class='add'>+	 * - USBHOST module is set to smart-idle mode</div><div class='add'>+	 * - PRCM asserts idle_req to the USBHOST module ( This typically</div><div class='add'>+	 *   happens when the system is going to a low power mode : all ports</div><div class='add'>+	 *   have been suspended, the master part of the USBHOST module has</div><div class='add'>+	 *   entered the standby state, and SW has cut the functional clocks)</div><div class='add'>+	 * - an USBHOST interrupt occurs before the module is able to answer</div><div class='add'>+	 *   idle_ack, typically a remote wakeup IRQ.</div><div class='add'>+	 * Then the USB HOST module will enter a deadlock situation where it</div><div class='add'>+	 * is no more accessible nor functional.</div><div class='add'>+	 *</div><div class='add'>+	 * Workaround:</div><div class='add'>+	 * Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Errata: USB host EHCI may stall when entering smart-standby mode</div><div class='add'>+	 * Id: i571</div><div class='add'>+	 *</div><div class='add'>+	 * Description:</div><div class='add'>+	 * When the USBHOST module is set to smart-standby mode, and when it is</div><div class='add'>+	 * ready to enter the standby state (i.e. all ports are suspended and</div><div class='add'>+	 * all attached devices are in suspend mode), then it can wrongly assert</div><div class='add'>+	 * the Mstandby signal too early while there are still some residual OCP</div><div class='add'>+	 * transactions ongoing. If this condition occurs, the internal state</div><div class='add'>+	 * machine may go to an undefined state and the USB link may be stuck</div><div class='add'>+	 * upon the next resume.</div><div class='add'>+	 *</div><div class='add'>+	 * Workaround:</div><div class='add'>+	 * Don't use smart standby; use only force standby,</div><div class='add'>+	 * hence HWMOD_SWSUP_MSTANDBY</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * During system boot; If the hwmod framework resets the module</div><div class='add'>+	 * the module will have smart idle settings; which can lead to deadlock</div><div class='add'>+	 * (above Errata Id:i660); so, dont reset the module during boot;</div><div class='add'>+	 * Use HWMOD_INIT_NO_RESET.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	.flags		= HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |</div><div class='add'>+			  HWMOD_INIT_NO_RESET,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -5140,34 +3451,6 @@ static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = {</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* usb_otg_hs master ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_usb_otg_hs_masters[] = {</div><div class='del'>-	&amp;omap44xx_usb_otg_hs__l3_main_2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a0ab000,</div><div class='del'>-		.pa_end		= 0x4a0ab003,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_cfg -&gt; usb_otg_hs */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_usb_otg_hs_hwmod,</div><div class='del'>-	.clk		= "l4_div_ck",</div><div class='del'>-	.addr		= omap44xx_usb_otg_hs_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* usb_otg_hs slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_usb_otg_hs_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_cfg__usb_otg_hs,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod_opt_clk usb_otg_hs_opt_clks[] = {</div><div class='ctx'> 	{ .role = "xclk", .clk = "usb_otg_hs_xclk" },</div><div class='ctx'> };</div><div class='hunk'>@@ -5188,10 +3471,47 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.opt_clks	= usb_otg_hs_opt_clks,</div><div class='ctx'> 	.opt_clks_cnt	= ARRAY_SIZE(usb_otg_hs_opt_clks),</div><div class='del'>-	.slaves		= omap44xx_usb_otg_hs_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_usb_otg_hs_slaves),</div><div class='del'>-	.masters	= omap44xx_usb_otg_hs_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_usb_otg_hs_masters),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 'usb_tll_hs' class</div><div class='add'>+ * usb_tll_hs module is the adapter on the usb_host_hs ports</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = {</div><div class='add'>+	.rev_offs	= 0x0000,</div><div class='add'>+	.sysc_offs	= 0x0010,</div><div class='add'>+	.syss_offs	= 0x0014,</div><div class='add'>+	.sysc_flags	= (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |</div><div class='add'>+			   SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |</div><div class='add'>+			   SYSC_HAS_AUTOIDLE),</div><div class='add'>+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),</div><div class='add'>+	.sysc_fields	= &amp;omap_hwmod_sysc_type1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = {</div><div class='add'>+	.name	= "usb_tll_hs",</div><div class='add'>+	.sysc	= &amp;omap44xx_usb_tll_hs_sysc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = {</div><div class='add'>+	{ .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START },</div><div class='add'>+	{ .irq = -1 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = {</div><div class='add'>+	.name		= "usb_tll_hs",</div><div class='add'>+	.class		= &amp;omap44xx_usb_tll_hs_hwmod_class,</div><div class='add'>+	.clkdm_name	= "l3_init_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_usb_tll_hs_irqs,</div><div class='add'>+	.main_clk	= "usb_tll_hs_ick",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_HWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -5215,38 +3535,15 @@ static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = {</div><div class='ctx'> 	.name		= "wd_timer",</div><div class='ctx'> 	.sysc		= &amp;omap44xx_wd_timer_sysc,</div><div class='ctx'> 	.pre_shutdown	= &amp;omap2_wd_timer_disable,</div><div class='add'>+	.reset		= &amp;omap2_wd_timer_reset,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* wd_timer2 */</div><div class='del'>-static struct omap_hwmod omap44xx_wd_timer2_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = {</div><div class='ctx'> 	{ .irq = 80 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = {</div><div class='del'>-	{</div><div class='del'>-		.pa_start	= 0x4a314000,</div><div class='del'>-		.pa_end		= 0x4a31407f,</div><div class='del'>-		.flags		= ADDR_TYPE_RT</div><div class='del'>-	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* l4_wkup -&gt; wd_timer2 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = {</div><div class='del'>-	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_wd_timer2_hwmod,</div><div class='del'>-	.clk		= "l4_wkup_clk_mux_ck",</div><div class='del'>-	.addr		= omap44xx_wd_timer2_addrs,</div><div class='del'>-	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* wd_timer2 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_wkup__wd_timer2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct omap_hwmod omap44xx_wd_timer2_hwmod = {</div><div class='ctx'> 	.name		= "wd_timer2",</div><div class='ctx'> 	.class		= &amp;omap44xx_wd_timer_hwmod_class,</div><div class='hunk'>@@ -5260,106 +3557,2308 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {</div><div class='ctx'> 			.modulemode   = MODULEMODE_SWCTRL,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_wd_timer2_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_wd_timer2_slaves),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* wd_timer3 */</div><div class='del'>-static struct omap_hwmod omap44xx_wd_timer3_hwmod;</div><div class='ctx'> static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = {</div><div class='ctx'> 	{ .irq = 36 + OMAP44XX_IRQ_GIC_START },</div><div class='ctx'> 	{ .irq = -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = {</div><div class='add'>+static struct omap_hwmod omap44xx_wd_timer3_hwmod = {</div><div class='add'>+	.name		= "wd_timer3",</div><div class='add'>+	.class		= &amp;omap44xx_wd_timer_hwmod_class,</div><div class='add'>+	.clkdm_name	= "abe_clkdm",</div><div class='add'>+	.mpu_irqs	= omap44xx_wd_timer3_irqs,</div><div class='add'>+	.main_clk	= "wd_timer3_fck",</div><div class='add'>+	.prcm = {</div><div class='add'>+		.omap4 = {</div><div class='add'>+			.clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET,</div><div class='add'>+			.context_offs = OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET,</div><div class='add'>+			.modulemode   = MODULEMODE_SWCTRL,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * interfaces</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_c2c_target_fw_addrs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.pa_start	= 0x40130000,</div><div class='del'>-		.pa_end		= 0x4013007f,</div><div class='add'>+		.pa_start	= 0x4a204000,</div><div class='add'>+		.pa_end		= 0x4a2040ff,</div><div class='ctx'> 		.flags		= ADDR_TYPE_RT</div><div class='ctx'> 	},</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_abe -&gt; wd_timer3 */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = {</div><div class='add'>+/* c2c -&gt; c2c_target_fw */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_c2c__c2c_target_fw = {</div><div class='add'>+	.master		= &amp;omap44xx_c2c_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_c2c_target_fw_hwmod,</div><div class='add'>+	.clk		= "div_core_ck",</div><div class='add'>+	.addr		= omap44xx_c2c_target_fw_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; c2c_target_fw */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__c2c_target_fw = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_c2c_target_fw_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_1 -&gt; dmm */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dmm_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4e000000,</div><div class='add'>+		.pa_end		= 0x4e0007ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mpu -&gt; dmm */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = {</div><div class='add'>+	.master		= &amp;omap44xx_mpu_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dmm_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.addr		= omap44xx_dmm_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* c2c -&gt; emif_fw */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_c2c__emif_fw = {</div><div class='add'>+	.master		= &amp;omap44xx_c2c_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_emif_fw_hwmod,</div><div class='add'>+	.clk		= "div_core_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dmm -&gt; emif_fw */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = {</div><div class='add'>+	.master		= &amp;omap44xx_dmm_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_emif_fw_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a20c000,</div><div class='add'>+		.pa_end		= 0x4a20c0ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; emif_fw */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_emif_fw_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_emif_fw_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* iva -&gt; l3_instr */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = {</div><div class='add'>+	.master		= &amp;omap44xx_iva_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_instr_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_3 -&gt; l3_instr */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_3__l3_instr = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_3_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_instr_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ocp_wp_noc -&gt; l3_instr */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_ocp_wp_noc__l3_instr = {</div><div class='add'>+	.master		= &amp;omap44xx_ocp_wp_noc_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_instr_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dsp -&gt; l3_main_1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = {</div><div class='add'>+	.master		= &amp;omap44xx_dsp_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dss -&gt; l3_main_1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_dss__l3_main_1 = {</div><div class='add'>+	.master		= &amp;omap44xx_dss_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; l3_main_1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_1 = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; l3_main_1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_1 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mmc1 -&gt; l3_main_1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_mmc1__l3_main_1 = {</div><div class='add'>+	.master		= &amp;omap44xx_mmc1_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mmc2 -&gt; l3_main_1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = {</div><div class='add'>+	.master		= &amp;omap44xx_mmc2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x44000000,</div><div class='add'>+		.pa_end		= 0x44000fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mpu -&gt; l3_main_1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {</div><div class='add'>+	.master		= &amp;omap44xx_mpu_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.addr		= omap44xx_l3_main_1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* c2c_target_fw -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_c2c_target_fw__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_c2c_target_fw_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* debugss -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_debugss__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_debugss_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "dbgclk_mux_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dma_system -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_dma_system_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* fdif -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_fdif__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_fdif_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpu -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_gpu__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_gpu_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* hsi -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_hsi__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_hsi_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ipu -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_ipu__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_ipu_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* iss -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_iss__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_iss_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* iva -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_iva__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_iva_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x44800000,</div><div class='add'>+		.pa_end		= 0x44801fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_1 -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.addr		= omap44xx_l3_main_2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* usb_host_fs -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_usb_host_fs__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_usb_host_fs_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* usb_host_hs -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_usb_host_hs_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* usb_otg_hs -&gt; l3_main_2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_usb_otg_hs__l3_main_2 = {</div><div class='add'>+	.master		= &amp;omap44xx_usb_otg_hs_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x45000000,</div><div class='add'>+		.pa_end		= 0x45000fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_1 -&gt; l3_main_3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_3_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.addr		= omap44xx_l3_main_3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; l3_main_3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_3 = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_3_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; l3_main_3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l3_main_3_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* aess -&gt; l4_abe */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = {</div><div class='add'>+	.master		= &amp;omap44xx_aess_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dsp -&gt; l4_abe */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_dsp__l4_abe = {</div><div class='add'>+	.master		= &amp;omap44xx_dsp_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_1 -&gt; l4_abe */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_abe = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mpu -&gt; l4_abe */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_mpu__l4_abe = {</div><div class='add'>+	.master		= &amp;omap44xx_mpu_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_1 -&gt; l4_cfg */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_1_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; l4_per */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; l4_wkup */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mpu -&gt; mpu_private */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = {</div><div class='add'>+	.master		= &amp;omap44xx_mpu_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mpu_private_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_ocp_wp_noc_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a102000,</div><div class='add'>+		.pa_end		= 0x4a10207f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; ocp_wp_noc */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp_wp_noc = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_ocp_wp_noc_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_ocp_wp_noc_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x401f1000,</div><div class='add'>+		.pa_end		= 0x401f13ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; aess */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = {</div><div class='ctx'> 	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_wd_timer3_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_aess_hwmod,</div><div class='ctx'> 	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_wd_timer3_addrs,</div><div class='add'>+	.addr		= omap44xx_aess_addrs,</div><div class='ctx'> 	.user		= OCP_USER_MPU,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = {</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.pa_start	= 0x49030000,</div><div class='del'>-		.pa_end		= 0x4903007f,</div><div class='add'>+		.pa_start	= 0x490f1000,</div><div class='add'>+		.pa_end		= 0x490f13ff,</div><div class='ctx'> 		.flags		= ADDR_TYPE_RT</div><div class='ctx'> 	},</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* l4_abe -&gt; wd_timer3 (dma) */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = {</div><div class='add'>+/* l4_abe -&gt; aess (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = {</div><div class='ctx'> 	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_wd_timer3_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_aess_hwmod,</div><div class='ctx'> 	.clk		= "ocp_abe_iclk",</div><div class='del'>-	.addr		= omap44xx_wd_timer3_dma_addrs,</div><div class='add'>+	.addr		= omap44xx_aess_dma_addrs,</div><div class='ctx'> 	.user		= OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* wd_timer3 slave ports */</div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_abe__wd_timer3,</div><div class='del'>-	&amp;omap44xx_l4_abe__wd_timer3_dma,</div><div class='add'>+/* l3_main_2 -&gt; c2c */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__c2c = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_c2c_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap44xx_wd_timer3_hwmod = {</div><div class='del'>-	.name		= "wd_timer3",</div><div class='del'>-	.class		= &amp;omap44xx_wd_timer_hwmod_class,</div><div class='del'>-	.clkdm_name	= "abe_clkdm",</div><div class='del'>-	.mpu_irqs	= omap44xx_wd_timer3_irqs,</div><div class='del'>-	.main_clk	= "wd_timer3_fck",</div><div class='del'>-	.prcm = {</div><div class='del'>-		.omap4 = {</div><div class='del'>-			.clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET,</div><div class='del'>-			.context_offs = OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET,</div><div class='del'>-			.modulemode   = MODULEMODE_SWCTRL,</div><div class='del'>-		},</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a304000,</div><div class='add'>+		.pa_end		= 0x4a30401f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='ctx'> 	},</div><div class='del'>-	.slaves		= omap44xx_wd_timer3_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_wd_timer3_slaves),</div><div class='add'>+	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * 'usb_host_hs' class</div><div class='del'>- * high-speed multi-port usb host controller</div><div class='del'>- */</div><div class='del'>-static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = {</div><div class='del'>-	.master		= &amp;omap44xx_usb_host_hs_hwmod,</div><div class='del'>-	.slave		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+/* l4_wkup -&gt; counter_32k */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_counter_32k_hwmod,</div><div class='add'>+	.clk		= "l4_wkup_clk_mux_ck",</div><div class='add'>+	.addr		= omap44xx_counter_32k_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_ctrl_module_core_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a002000,</div><div class='add'>+		.pa_end		= 0x4a0027ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; ctrl_module_core */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ctrl_module_core = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_ctrl_module_core_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_ctrl_module_core_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_ctrl_module_pad_core_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a100000,</div><div class='add'>+		.pa_end		= 0x4a1007ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; ctrl_module_pad_core */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ctrl_module_pad_core = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_ctrl_module_pad_core_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_ctrl_module_pad_core_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_ctrl_module_wkup_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a30c000,</div><div class='add'>+		.pa_end		= 0x4a30c7ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; ctrl_module_wkup */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__ctrl_module_wkup = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_ctrl_module_wkup_hwmod,</div><div class='add'>+	.clk		= "l4_wkup_clk_mux_ck",</div><div class='add'>+	.addr		= omap44xx_ctrl_module_wkup_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_ctrl_module_pad_wkup_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a31e000,</div><div class='add'>+		.pa_end		= 0x4a31e7ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; ctrl_module_pad_wkup */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__ctrl_module_pad_wkup = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_ctrl_module_pad_wkup_hwmod,</div><div class='add'>+	.clk		= "l4_wkup_clk_mux_ck",</div><div class='add'>+	.addr		= omap44xx_ctrl_module_pad_wkup_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_debugss_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x54160000,</div><div class='add'>+		.pa_end		= 0x54167fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_instr -&gt; debugss */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_instr__debugss = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_instr_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_debugss_hwmod,</div><div class='ctx'> 	.clk		= "l3_div_ck",</div><div class='add'>+	.addr		= omap44xx_debugss_addrs,</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = {</div><div class='del'>-	.rev_offs	= 0x0000,</div><div class='del'>-	.sysc_offs	= 0x0010,</div><div class='del'>-	.syss_offs	= 0x0014,</div><div class='del'>-	.sysc_flags	= (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |</div><div class='del'>-			   SYSC_HAS_SOFTRESET),</div><div class='del'>-	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |</div><div class='del'>-			   SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |</div><div class='del'>-			   MSTANDBY_SMART | MSTANDBY_SMART_WKUP),</div><div class='del'>-	.sysc_fields	= &amp;omap_hwmod_sysc_type2,</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a056000,</div><div class='add'>+		.pa_end		= 0x4a056fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = {</div><div class='del'>-	.name = "usb_host_hs",</div><div class='del'>-	.sysc = &amp;omap44xx_usb_host_hs_sysc,</div><div class='add'>+/* l4_cfg -&gt; dma_system */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dma_system_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_dma_system_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_masters[] = {</div><div class='del'>-	&amp;omap44xx_usb_host_hs__l3_main_2,</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "mpu",</div><div class='add'>+		.pa_start	= 0x4012e000,</div><div class='add'>+		.pa_end		= 0x4012e07f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; dmic */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dmic_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_dmic_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "dma",</div><div class='add'>+		.pa_start	= 0x4902e000,</div><div class='add'>+		.pa_end		= 0x4902e07f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; dmic (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dmic_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_dmic_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dsp -&gt; iva */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_dsp__iva = {</div><div class='add'>+	.master		= &amp;omap44xx_dsp_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_iva_hwmod,</div><div class='add'>+	.clk		= "dpll_iva_m5x2_ck",</div><div class='add'>+	.user		= OCP_USER_DSP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dsp -&gt; sl2if */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_dsp__sl2if = {</div><div class='add'>+	.master		= &amp;omap44xx_dsp_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_sl2if_hwmod,</div><div class='add'>+	.clk		= "dpll_iva_m5x2_ck",</div><div class='add'>+	.user		= OCP_USER_DSP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; dsp */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dsp = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dsp_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x58000000,</div><div class='add'>+		.pa_end		= 0x5800007f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; dss */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_hwmod,</div><div class='add'>+	.clk		= "dss_fck",</div><div class='add'>+	.addr		= omap44xx_dss_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48040000,</div><div class='add'>+		.pa_end		= 0x4804007f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; dss */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_dss_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x58001000,</div><div class='add'>+		.pa_end		= 0x58001fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; dss_dispc */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_dispc_hwmod,</div><div class='add'>+	.clk		= "dss_fck",</div><div class='add'>+	.addr		= omap44xx_dss_dispc_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48041000,</div><div class='add'>+		.pa_end		= 0x48041fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; dss_dispc */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_dispc_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_dss_dispc_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x58004000,</div><div class='add'>+		.pa_end		= 0x580041ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; dss_dsi1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_dsi1_hwmod,</div><div class='add'>+	.clk		= "dss_fck",</div><div class='add'>+	.addr		= omap44xx_dss_dsi1_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48044000,</div><div class='add'>+		.pa_end		= 0x480441ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; dss_dsi1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_dsi1_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_dss_dsi1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x58005000,</div><div class='add'>+		.pa_end		= 0x580051ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; dss_dsi2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_dsi2_hwmod,</div><div class='add'>+	.clk		= "dss_fck",</div><div class='add'>+	.addr		= omap44xx_dss_dsi2_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48045000,</div><div class='add'>+		.pa_end		= 0x480451ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; dss_dsi2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_dsi2_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_dss_dsi2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x58006000,</div><div class='add'>+		.pa_end		= 0x58006fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; dss_hdmi */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_hdmi_hwmod,</div><div class='add'>+	.clk		= "dss_fck",</div><div class='add'>+	.addr		= omap44xx_dss_hdmi_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48046000,</div><div class='add'>+		.pa_end		= 0x48046fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; dss_hdmi */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_hdmi_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_dss_hdmi_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x58002000,</div><div class='add'>+		.pa_end		= 0x580020ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; dss_rfbi */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_rfbi_hwmod,</div><div class='add'>+	.clk		= "dss_fck",</div><div class='add'>+	.addr		= omap44xx_dss_rfbi_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48042000,</div><div class='add'>+		.pa_end		= 0x480420ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; dss_rfbi */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_rfbi_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_dss_rfbi_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x58003000,</div><div class='add'>+		.pa_end		= 0x580030ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; dss_venc */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_venc_hwmod,</div><div class='add'>+	.clk		= "dss_fck",</div><div class='add'>+	.addr		= omap44xx_dss_venc_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48043000,</div><div class='add'>+		.pa_end		= 0x480430ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; dss_venc */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_dss_venc_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_dss_venc_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_elm_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48078000,</div><div class='add'>+		.pa_end		= 0x48078fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; elm */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__elm = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_elm_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_elm_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_emif1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4c000000,</div><div class='add'>+		.pa_end		= 0x4c0000ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* emif_fw -&gt; emif1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_emif_fw__emif1 = {</div><div class='add'>+	.master		= &amp;omap44xx_emif_fw_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_emif1_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.addr		= omap44xx_emif1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_emif2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4d000000,</div><div class='add'>+		.pa_end		= 0x4d0000ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* emif_fw -&gt; emif2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_emif_fw__emif2 = {</div><div class='add'>+	.master		= &amp;omap44xx_emif_fw_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_emif2_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.addr		= omap44xx_emif2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_fdif_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a10a000,</div><div class='add'>+		.pa_end		= 0x4a10a1ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; fdif */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__fdif = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_fdif_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_fdif_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a310000,</div><div class='add'>+		.pa_end		= 0x4a3101ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; gpio1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_gpio1_hwmod,</div><div class='add'>+	.clk		= "l4_wkup_clk_mux_ck",</div><div class='add'>+	.addr		= omap44xx_gpio1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48055000,</div><div class='add'>+		.pa_end		= 0x480551ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; gpio2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_gpio2_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_gpio2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48057000,</div><div class='add'>+		.pa_end		= 0x480571ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; gpio3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_gpio3_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_gpio3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48059000,</div><div class='add'>+		.pa_end		= 0x480591ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; gpio4 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_gpio4_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_gpio4_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4805b000,</div><div class='add'>+		.pa_end		= 0x4805b1ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; gpio5 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_gpio5_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_gpio5_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4805d000,</div><div class='add'>+		.pa_end		= 0x4805d1ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; gpio6 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_gpio6_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_gpio6_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_gpmc_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x50000000,</div><div class='add'>+		.pa_end		= 0x500003ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; gpmc */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__gpmc = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_gpmc_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.addr		= omap44xx_gpmc_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_gpu_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x56000000,</div><div class='add'>+		.pa_end		= 0x5600ffff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; gpu */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__gpu = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_gpu_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.addr		= omap44xx_gpu_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_hdq1w_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x480b2000,</div><div class='add'>+		.pa_end		= 0x480b201f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; hdq1w */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__hdq1w = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_hdq1w_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_hdq1w_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_hsi_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a058000,</div><div class='add'>+		.pa_end		= 0x4a05bfff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; hsi */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_hsi_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_hsi_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48070000,</div><div class='add'>+		.pa_end		= 0x480700ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; i2c1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_i2c1_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_i2c1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48072000,</div><div class='add'>+		.pa_end		= 0x480720ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; i2c2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_i2c2_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_i2c2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48060000,</div><div class='add'>+		.pa_end		= 0x480600ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; i2c3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_i2c3_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_i2c3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48350000,</div><div class='add'>+		.pa_end		= 0x483500ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; i2c4 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_i2c4_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_i2c4_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; ipu */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ipu = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_ipu_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_iss_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x52000000,</div><div class='add'>+		.pa_end		= 0x520000ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; iss */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_iss_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.addr		= omap44xx_iss_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* iva -&gt; sl2if */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_iva__sl2if = {</div><div class='add'>+	.master		= &amp;omap44xx_iva_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_sl2if_hwmod,</div><div class='add'>+	.clk		= "dpll_iva_m5x2_ck",</div><div class='add'>+	.user		= OCP_USER_IVA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x5a000000,</div><div class='add'>+		.pa_end		= 0x5a07ffff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; iva */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_iva_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.addr		= omap44xx_iva_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a31c000,</div><div class='add'>+		.pa_end		= 0x4a31c07f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; kbd */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_kbd_hwmod,</div><div class='add'>+	.clk		= "l4_wkup_clk_mux_ck",</div><div class='add'>+	.addr		= omap44xx_kbd_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a0f4000,</div><div class='add'>+		.pa_end		= 0x4a0f41ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; mailbox */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mailbox_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_mailbox_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcasp_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x40128000,</div><div class='add'>+		.pa_end		= 0x401283ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; mcasp */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcasp = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcasp_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_mcasp_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcasp_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49028000,</div><div class='add'>+		.pa_end		= 0x490283ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; mcasp (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcasp_dma = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcasp_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_mcasp_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "mpu",</div><div class='add'>+		.pa_start	= 0x40122000,</div><div class='add'>+		.pa_end		= 0x401220ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; mcbsp1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcbsp1_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_mcbsp1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "dma",</div><div class='add'>+		.pa_start	= 0x49022000,</div><div class='add'>+		.pa_end		= 0x490220ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; mcbsp1 (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcbsp1_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_mcbsp1_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "mpu",</div><div class='add'>+		.pa_start	= 0x40124000,</div><div class='add'>+		.pa_end		= 0x401240ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; mcbsp2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcbsp2_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_mcbsp2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "dma",</div><div class='add'>+		.pa_start	= 0x49024000,</div><div class='add'>+		.pa_end		= 0x490240ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; mcbsp2 (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcbsp2_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_mcbsp2_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "mpu",</div><div class='add'>+		.pa_start	= 0x40126000,</div><div class='add'>+		.pa_end		= 0x401260ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; mcbsp3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcbsp3_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_mcbsp3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "dma",</div><div class='add'>+		.pa_start	= 0x49026000,</div><div class='add'>+		.pa_end		= 0x490260ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; mcbsp3 (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcbsp3_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_mcbsp3_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48096000,</div><div class='add'>+		.pa_end		= 0x480960ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mcbsp4 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcbsp4_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_mcbsp4_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x40132000,</div><div class='add'>+		.pa_end		= 0x4013207f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; mcpdm */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcpdm_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_mcpdm_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcpdm_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49032000,</div><div class='add'>+		.pa_end		= 0x4903207f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; mcpdm (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcpdm_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_mcpdm_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48098000,</div><div class='add'>+		.pa_end		= 0x480981ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mcspi1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi1 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcspi1_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_mcspi1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4809a000,</div><div class='add'>+		.pa_end		= 0x4809a1ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mcspi2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcspi2_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_mcspi2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x480b8000,</div><div class='add'>+		.pa_end		= 0x480b81ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mcspi3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi3 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcspi3_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_mcspi3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x480ba000,</div><div class='add'>+		.pa_end		= 0x480ba1ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mcspi4 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi4 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mcspi4_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_mcspi4_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4809c000,</div><div class='add'>+		.pa_end		= 0x4809c3ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mmc1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mmc1_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_mmc1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x480b4000,</div><div class='add'>+		.pa_end		= 0x480b43ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mmc2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mmc2_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_mmc2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x480ad000,</div><div class='add'>+		.pa_end		= 0x480ad3ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mmc3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mmc3_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_mmc3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x480d1000,</div><div class='add'>+		.pa_end		= 0x480d13ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mmc4 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mmc4_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_mmc4_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x480d5000,</div><div class='add'>+		.pa_end		= 0x480d53ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; mmc5 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_mmc5_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_mmc5_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; ocmc_ram */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ocmc_ram = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_ocmc_ram_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; ocp2scp_usb_phy */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp2scp_usb_phy = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_ocp2scp_usb_phy_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_prcm_mpu_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48243000,</div><div class='add'>+		.pa_end		= 0x48243fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mpu_private -&gt; prcm_mpu */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_mpu_private__prcm_mpu = {</div><div class='add'>+	.master		= &amp;omap44xx_mpu_private_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_prcm_mpu_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.addr		= omap44xx_prcm_mpu_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_cm_core_aon_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a004000,</div><div class='add'>+		.pa_end		= 0x4a004fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; cm_core_aon */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__cm_core_aon = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_cm_core_aon_hwmod,</div><div class='add'>+	.clk		= "l4_wkup_clk_mux_ck",</div><div class='add'>+	.addr		= omap44xx_cm_core_aon_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_cm_core_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a008000,</div><div class='add'>+		.pa_end		= 0x4a009fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; cm_core */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__cm_core = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_cm_core_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_cm_core_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_prm_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a306000,</div><div class='add'>+		.pa_end		= 0x4a307fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; prm */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__prm = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_prm_hwmod,</div><div class='add'>+	.clk		= "l4_wkup_clk_mux_ck",</div><div class='add'>+	.addr		= omap44xx_prm_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_scrm_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a30a000,</div><div class='add'>+		.pa_end		= 0x4a30a7ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; scrm */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__scrm = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_scrm_hwmod,</div><div class='add'>+	.clk		= "l4_wkup_clk_mux_ck",</div><div class='add'>+	.addr		= omap44xx_scrm_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l3_main_2 -&gt; sl2if */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__sl2if = {</div><div class='add'>+	.master		= &amp;omap44xx_l3_main_2_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_sl2if_hwmod,</div><div class='add'>+	.clk		= "l3_div_ck",</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_slimbus1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4012c000,</div><div class='add'>+		.pa_end		= 0x4012c3ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; slimbus1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__slimbus1 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_slimbus1_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_slimbus1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_slimbus1_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4902c000,</div><div class='add'>+		.pa_end		= 0x4902c3ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; slimbus1 (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__slimbus1_dma = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_slimbus1_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_slimbus1_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_slimbus2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48076000,</div><div class='add'>+		.pa_end		= 0x480763ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; slimbus2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__slimbus2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_slimbus2_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_slimbus2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a0dd000,</div><div class='add'>+		.pa_end		= 0x4a0dd03f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; smartreflex_core */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_smartreflex_core_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_smartreflex_core_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a0db000,</div><div class='add'>+		.pa_end		= 0x4a0db03f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; smartreflex_iva */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_smartreflex_iva_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_smartreflex_iva_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a0d9000,</div><div class='add'>+		.pa_end		= 0x4a0d903f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; smartreflex_mpu */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_mpu = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_smartreflex_mpu_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_smartreflex_mpu_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_spinlock_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a0f6000,</div><div class='add'>+		.pa_end		= 0x4a0f6fff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; spinlock */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__spinlock = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_spinlock_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_spinlock_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a318000,</div><div class='add'>+		.pa_end		= 0x4a31807f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_wkup -&gt; timer1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer1_hwmod,</div><div class='add'>+	.clk		= "l4_wkup_clk_mux_ck",</div><div class='add'>+	.addr		= omap44xx_timer1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48032000,</div><div class='add'>+		.pa_end		= 0x4803207f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer2_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_timer2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48034000,</div><div class='add'>+		.pa_end		= 0x4803407f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer3_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_timer3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48036000,</div><div class='add'>+		.pa_end		= 0x4803607f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer4 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer4_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_timer4_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x40138000,</div><div class='add'>+		.pa_end		= 0x4013807f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; timer5 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer5_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_timer5_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer5_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49038000,</div><div class='add'>+		.pa_end		= 0x4903807f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; timer5 (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer5_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_timer5_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4013a000,</div><div class='add'>+		.pa_end		= 0x4013a07f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; timer6 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer6_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_timer6_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer6_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4903a000,</div><div class='add'>+		.pa_end		= 0x4903a07f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; timer6 (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer6_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_timer6_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4013c000,</div><div class='add'>+		.pa_end		= 0x4013c07f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; timer7 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer7_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_timer7_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer7_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4903c000,</div><div class='add'>+		.pa_end		= 0x4903c07f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; timer7 (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer7_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_timer7_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4013e000,</div><div class='add'>+		.pa_end		= 0x4013e07f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; timer8 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer8_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_timer8_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer8_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4903e000,</div><div class='add'>+		.pa_end		= 0x4903e07f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; timer8 (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer8_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_timer8_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4803e000,</div><div class='add'>+		.pa_end		= 0x4803e07f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer9 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer9_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_timer9_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48086000,</div><div class='add'>+		.pa_end		= 0x4808607f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer10 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer10_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_timer10_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48088000,</div><div class='add'>+		.pa_end		= 0x4808807f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; timer11 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_timer11_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_timer11_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4806a000,</div><div class='add'>+		.pa_end		= 0x4806a0ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; uart1 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_uart1_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_uart1_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4806c000,</div><div class='add'>+		.pa_end		= 0x4806c0ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; uart2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_uart2_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_uart2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x48020000,</div><div class='add'>+		.pa_end		= 0x480200ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; uart3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_uart3_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_uart3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4806e000,</div><div class='add'>+		.pa_end		= 0x4806e0ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_per -&gt; uart4 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_per_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_uart4_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_uart4_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_usb_host_fs_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a0a9000,</div><div class='add'>+		.pa_end		= 0x4a0a93ff,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_cfg -&gt; usb_host_fs */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_fs = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_usb_host_fs_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_usb_host_fs_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = {</div><div class='hunk'>@@ -5382,12 +5881,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = {</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = {</div><div class='del'>-	{ .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START },</div><div class='del'>-	{ .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START },</div><div class='del'>-	{ .irq = -1 }</div><div class='del'>-};</div><div class='del'>-</div><div class='add'>+/* l4_cfg -&gt; usb_host_hs */</div><div class='ctx'> static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = {</div><div class='ctx'> 	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='ctx'> 	.slave		= &amp;omap44xx_usb_host_hs_hwmod,</div><div class='hunk'>@@ -5396,100 +5890,22 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = {</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_cfg__usb_host_hs,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {</div><div class='del'>-	.name		= "usb_host_hs",</div><div class='del'>-	.class		= &amp;omap44xx_usb_host_hs_hwmod_class,</div><div class='del'>-	.clkdm_name	= "l3_init_clkdm",</div><div class='del'>-	.main_clk	= "usb_host_hs_fck",</div><div class='del'>-	.prcm = {</div><div class='del'>-		.omap4 = {</div><div class='del'>-			.clkctrl_offs = OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_OFFSET,</div><div class='del'>-			.context_offs = OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET,</div><div class='del'>-			.modulemode   = MODULEMODE_SWCTRL,</div><div class='del'>-		},</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a0ab000,</div><div class='add'>+		.pa_end		= 0x4a0ab003,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='ctx'> 	},</div><div class='del'>-	.mpu_irqs	= omap44xx_usb_host_hs_irqs,</div><div class='del'>-	.slaves		= omap44xx_usb_host_hs_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_usb_host_hs_slaves),</div><div class='del'>-	.masters	= omap44xx_usb_host_hs_masters,</div><div class='del'>-	.masters_cnt	= ARRAY_SIZE(omap44xx_usb_host_hs_masters),</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock</div><div class='del'>-	 * id: i660</div><div class='del'>-	 *</div><div class='del'>-	 * Description:</div><div class='del'>-	 * In the following configuration :</div><div class='del'>-	 * - USBHOST module is set to smart-idle mode</div><div class='del'>-	 * - PRCM asserts idle_req to the USBHOST module ( This typically</div><div class='del'>-	 *   happens when the system is going to a low power mode : all ports</div><div class='del'>-	 *   have been suspended, the master part of the USBHOST module has</div><div class='del'>-	 *   entered the standby state, and SW has cut the functional clocks)</div><div class='del'>-	 * - an USBHOST interrupt occurs before the module is able to answer</div><div class='del'>-	 *   idle_ack, typically a remote wakeup IRQ.</div><div class='del'>-	 * Then the USB HOST module will enter a deadlock situation where it</div><div class='del'>-	 * is no more accessible nor functional.</div><div class='del'>-	 *</div><div class='del'>-	 * Workaround:</div><div class='del'>-	 * Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Errata: USB host EHCI may stall when entering smart-standby mode</div><div class='del'>-	 * Id: i571</div><div class='del'>-	 *</div><div class='del'>-	 * Description:</div><div class='del'>-	 * When the USBHOST module is set to smart-standby mode, and when it is</div><div class='del'>-	 * ready to enter the standby state (i.e. all ports are suspended and</div><div class='del'>-	 * all attached devices are in suspend mode), then it can wrongly assert</div><div class='del'>-	 * the Mstandby signal too early while there are still some residual OCP</div><div class='del'>-	 * transactions ongoing. If this condition occurs, the internal state</div><div class='del'>-	 * machine may go to an undefined state and the USB link may be stuck</div><div class='del'>-	 * upon the next resume.</div><div class='del'>-	 *</div><div class='del'>-	 * Workaround:</div><div class='del'>-	 * Don't use smart standby; use only force standby,</div><div class='del'>-	 * hence HWMOD_SWSUP_MSTANDBY</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * During system boot; If the hwmod framework resets the module</div><div class='del'>-	 * the module will have smart idle settings; which can lead to deadlock</div><div class='del'>-	 * (above Errata Id:i660); so, dont reset the module during boot;</div><div class='del'>-	 * Use HWMOD_INIT_NO_RESET.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	.flags		= HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |</div><div class='del'>-			  HWMOD_INIT_NO_RESET,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 'usb_tll_hs' class</div><div class='del'>- * usb_tll_hs module is the adapter on the usb_host_hs ports</div><div class='del'>- */</div><div class='del'>-static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = {</div><div class='del'>-	.rev_offs	= 0x0000,</div><div class='del'>-	.sysc_offs	= 0x0010,</div><div class='del'>-	.syss_offs	= 0x0014,</div><div class='del'>-	.sysc_flags	= (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |</div><div class='del'>-			   SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |</div><div class='del'>-			   SYSC_HAS_AUTOIDLE),</div><div class='del'>-	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),</div><div class='del'>-	.sysc_fields	= &amp;omap_hwmod_sysc_type1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = {</div><div class='del'>-	.name = "usb_tll_hs",</div><div class='del'>-	.sysc = &amp;omap44xx_usb_tll_hs_sysc,</div><div class='add'>+	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = {</div><div class='del'>-	{ .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START },</div><div class='del'>-	{ .irq = -1 }</div><div class='add'>+/* l4_cfg -&gt; usb_otg_hs */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_usb_otg_hs_hwmod,</div><div class='add'>+	.clk		= "l4_div_ck",</div><div class='add'>+	.addr		= omap44xx_usb_otg_hs_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = {</div><div class='hunk'>@@ -5502,6 +5918,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = {</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* l4_cfg -&gt; usb_tll_hs */</div><div class='ctx'> static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = {</div><div class='ctx'> 	.master		= &amp;omap44xx_l4_cfg_hwmod,</div><div class='ctx'> 	.slave		= &amp;omap44xx_usb_tll_hs_hwmod,</div><div class='hunk'>@@ -5510,181 +5927,223 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = {</div><div class='ctx'> 	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod_ocp_if *omap44xx_usb_tll_hs_slaves[] = {</div><div class='del'>-	&amp;omap44xx_l4_cfg__usb_tll_hs,</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x4a314000,</div><div class='add'>+		.pa_end		= 0x4a31407f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = {</div><div class='del'>-	.name		= "usb_tll_hs",</div><div class='del'>-	.class		= &amp;omap44xx_usb_tll_hs_hwmod_class,</div><div class='del'>-	.clkdm_name	= "l3_init_clkdm",</div><div class='del'>-	.main_clk	= "usb_tll_hs_ick",</div><div class='del'>-	.prcm = {</div><div class='del'>-		.omap4 = {</div><div class='del'>-			.clkctrl_offs = OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_OFFSET,</div><div class='del'>-			.context_offs = OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET,</div><div class='del'>-			.modulemode   = MODULEMODE_HWCTRL,</div><div class='del'>-		},</div><div class='add'>+/* l4_wkup -&gt; wd_timer2 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_wkup_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_wd_timer2_hwmod,</div><div class='add'>+	.clk		= "l4_wkup_clk_mux_ck",</div><div class='add'>+	.addr		= omap44xx_wd_timer2_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU | OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x40130000,</div><div class='add'>+		.pa_end		= 0x4013007f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='ctx'> 	},</div><div class='del'>-	.mpu_irqs	= omap44xx_usb_tll_hs_irqs,</div><div class='del'>-	.slaves		= omap44xx_usb_tll_hs_slaves,</div><div class='del'>-	.slaves_cnt	= ARRAY_SIZE(omap44xx_usb_tll_hs_slaves),</div><div class='add'>+	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static __initdata struct omap_hwmod *omap44xx_hwmods[] = {</div><div class='del'>-</div><div class='del'>-	/* dmm class */</div><div class='del'>-	&amp;omap44xx_dmm_hwmod,</div><div class='del'>-</div><div class='del'>-	/* emif_fw class */</div><div class='del'>-	&amp;omap44xx_emif_fw_hwmod,</div><div class='del'>-</div><div class='del'>-	/* l3 class */</div><div class='del'>-	&amp;omap44xx_l3_instr_hwmod,</div><div class='del'>-	&amp;omap44xx_l3_main_1_hwmod,</div><div class='del'>-	&amp;omap44xx_l3_main_2_hwmod,</div><div class='del'>-	&amp;omap44xx_l3_main_3_hwmod,</div><div class='del'>-</div><div class='del'>-	/* l4 class */</div><div class='del'>-	&amp;omap44xx_l4_abe_hwmod,</div><div class='del'>-	&amp;omap44xx_l4_cfg_hwmod,</div><div class='del'>-	&amp;omap44xx_l4_per_hwmod,</div><div class='del'>-	&amp;omap44xx_l4_wkup_hwmod,</div><div class='del'>-</div><div class='del'>-	/* mpu_bus class */</div><div class='del'>-	&amp;omap44xx_mpu_private_hwmod,</div><div class='del'>-</div><div class='del'>-	/* aess class */</div><div class='del'>-/*	&amp;omap44xx_aess_hwmod, */</div><div class='del'>-</div><div class='del'>-	/* bandgap class */</div><div class='del'>-	&amp;omap44xx_bandgap_hwmod,</div><div class='del'>-</div><div class='del'>-	/* counter class */</div><div class='del'>-/*	&amp;omap44xx_counter_32k_hwmod, */</div><div class='del'>-</div><div class='del'>-	/* dma class */</div><div class='del'>-	&amp;omap44xx_dma_system_hwmod,</div><div class='del'>-</div><div class='del'>-	/* dmic class */</div><div class='del'>-	&amp;omap44xx_dmic_hwmod,</div><div class='del'>-</div><div class='del'>-	/* dsp class */</div><div class='del'>-	&amp;omap44xx_dsp_hwmod,</div><div class='del'>-	&amp;omap44xx_dsp_c0_hwmod,</div><div class='del'>-</div><div class='del'>-	/* dss class */</div><div class='del'>-	&amp;omap44xx_dss_hwmod,</div><div class='del'>-	&amp;omap44xx_dss_dispc_hwmod,</div><div class='del'>-	&amp;omap44xx_dss_dsi1_hwmod,</div><div class='del'>-	&amp;omap44xx_dss_dsi2_hwmod,</div><div class='del'>-	&amp;omap44xx_dss_hdmi_hwmod,</div><div class='del'>-	&amp;omap44xx_dss_rfbi_hwmod,</div><div class='del'>-	&amp;omap44xx_dss_venc_hwmod,</div><div class='del'>-</div><div class='del'>-	/* gpio class */</div><div class='del'>-	&amp;omap44xx_gpio1_hwmod,</div><div class='del'>-	&amp;omap44xx_gpio2_hwmod,</div><div class='del'>-	&amp;omap44xx_gpio3_hwmod,</div><div class='del'>-	&amp;omap44xx_gpio4_hwmod,</div><div class='del'>-	&amp;omap44xx_gpio5_hwmod,</div><div class='del'>-	&amp;omap44xx_gpio6_hwmod,</div><div class='del'>-</div><div class='del'>-	/* hsi class */</div><div class='del'>-/*	&amp;omap44xx_hsi_hwmod, */</div><div class='del'>-</div><div class='del'>-	/* i2c class */</div><div class='del'>-	&amp;omap44xx_i2c1_hwmod,</div><div class='del'>-	&amp;omap44xx_i2c2_hwmod,</div><div class='del'>-	&amp;omap44xx_i2c3_hwmod,</div><div class='del'>-	&amp;omap44xx_i2c4_hwmod,</div><div class='del'>-</div><div class='del'>-	/* ipu class */</div><div class='del'>-	&amp;omap44xx_ipu_hwmod,</div><div class='del'>-	&amp;omap44xx_ipu_c0_hwmod,</div><div class='del'>-	&amp;omap44xx_ipu_c1_hwmod,</div><div class='del'>-</div><div class='del'>-	/* iss class */</div><div class='del'>-/*	&amp;omap44xx_iss_hwmod, */</div><div class='del'>-</div><div class='del'>-	/* iva class */</div><div class='del'>-	&amp;omap44xx_iva_hwmod,</div><div class='del'>-	&amp;omap44xx_iva_seq0_hwmod,</div><div class='del'>-	&amp;omap44xx_iva_seq1_hwmod,</div><div class='del'>-</div><div class='del'>-	/* kbd class */</div><div class='del'>-	&amp;omap44xx_kbd_hwmod,</div><div class='del'>-</div><div class='del'>-	/* mailbox class */</div><div class='del'>-	&amp;omap44xx_mailbox_hwmod,</div><div class='del'>-</div><div class='del'>-	/* mcbsp class */</div><div class='del'>-	&amp;omap44xx_mcbsp1_hwmod,</div><div class='del'>-	&amp;omap44xx_mcbsp2_hwmod,</div><div class='del'>-	&amp;omap44xx_mcbsp3_hwmod,</div><div class='del'>-	&amp;omap44xx_mcbsp4_hwmod,</div><div class='del'>-</div><div class='del'>-	/* mcpdm class */</div><div class='del'>-	&amp;omap44xx_mcpdm_hwmod,</div><div class='del'>-</div><div class='del'>-	/* mcspi class */</div><div class='del'>-	&amp;omap44xx_mcspi1_hwmod,</div><div class='del'>-	&amp;omap44xx_mcspi2_hwmod,</div><div class='del'>-	&amp;omap44xx_mcspi3_hwmod,</div><div class='del'>-	&amp;omap44xx_mcspi4_hwmod,</div><div class='del'>-</div><div class='del'>-	/* mmc class */</div><div class='del'>-	&amp;omap44xx_mmc1_hwmod,</div><div class='del'>-	&amp;omap44xx_mmc2_hwmod,</div><div class='del'>-	&amp;omap44xx_mmc3_hwmod,</div><div class='del'>-	&amp;omap44xx_mmc4_hwmod,</div><div class='del'>-	&amp;omap44xx_mmc5_hwmod,</div><div class='del'>-</div><div class='del'>-	/* mpu class */</div><div class='del'>-	&amp;omap44xx_mpu_hwmod,</div><div class='del'>-</div><div class='del'>-	/* smartreflex class */</div><div class='del'>-	&amp;omap44xx_smartreflex_core_hwmod,</div><div class='del'>-	&amp;omap44xx_smartreflex_iva_hwmod,</div><div class='del'>-	&amp;omap44xx_smartreflex_mpu_hwmod,</div><div class='del'>-</div><div class='del'>-	/* spinlock class */</div><div class='del'>-	&amp;omap44xx_spinlock_hwmod,</div><div class='del'>-</div><div class='del'>-	/* timer class */</div><div class='del'>-	&amp;omap44xx_timer1_hwmod,</div><div class='del'>-	&amp;omap44xx_timer2_hwmod,</div><div class='del'>-	&amp;omap44xx_timer3_hwmod,</div><div class='del'>-	&amp;omap44xx_timer4_hwmod,</div><div class='del'>-	&amp;omap44xx_timer5_hwmod,</div><div class='del'>-	&amp;omap44xx_timer6_hwmod,</div><div class='del'>-	&amp;omap44xx_timer7_hwmod,</div><div class='del'>-	&amp;omap44xx_timer8_hwmod,</div><div class='del'>-	&amp;omap44xx_timer9_hwmod,</div><div class='del'>-	&amp;omap44xx_timer10_hwmod,</div><div class='del'>-	&amp;omap44xx_timer11_hwmod,</div><div class='del'>-</div><div class='del'>-	/* uart class */</div><div class='del'>-	&amp;omap44xx_uart1_hwmod,</div><div class='del'>-	&amp;omap44xx_uart2_hwmod,</div><div class='del'>-	&amp;omap44xx_uart3_hwmod,</div><div class='del'>-	&amp;omap44xx_uart4_hwmod,</div><div class='del'>-</div><div class='del'>-	/* usb host class */</div><div class='del'>-	&amp;omap44xx_usb_host_hs_hwmod,</div><div class='del'>-	&amp;omap44xx_usb_tll_hs_hwmod,</div><div class='del'>-</div><div class='del'>-	/* usb_otg_hs class */</div><div class='del'>-	&amp;omap44xx_usb_otg_hs_hwmod,</div><div class='del'>-</div><div class='del'>-	/* wd_timer class */</div><div class='del'>-	&amp;omap44xx_wd_timer2_hwmod,</div><div class='del'>-	&amp;omap44xx_wd_timer3_hwmod,</div><div class='add'>+/* l4_abe -&gt; wd_timer3 */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_wd_timer3_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_wd_timer3_addrs,</div><div class='add'>+	.user		= OCP_USER_MPU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = {</div><div class='add'>+	{</div><div class='add'>+		.pa_start	= 0x49030000,</div><div class='add'>+		.pa_end		= 0x4903007f,</div><div class='add'>+		.flags		= ADDR_TYPE_RT</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* l4_abe -&gt; wd_timer3 (dma) */</div><div class='add'>+static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = {</div><div class='add'>+	.master		= &amp;omap44xx_l4_abe_hwmod,</div><div class='add'>+	.slave		= &amp;omap44xx_wd_timer3_hwmod,</div><div class='add'>+	.clk		= "ocp_abe_iclk",</div><div class='add'>+	.addr		= omap44xx_wd_timer3_dma_addrs,</div><div class='add'>+	.user		= OCP_USER_SDMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {</div><div class='add'>+	&amp;omap44xx_c2c__c2c_target_fw,</div><div class='add'>+	&amp;omap44xx_l4_cfg__c2c_target_fw,</div><div class='add'>+	&amp;omap44xx_l3_main_1__dmm,</div><div class='add'>+	&amp;omap44xx_mpu__dmm,</div><div class='add'>+	&amp;omap44xx_c2c__emif_fw,</div><div class='add'>+	&amp;omap44xx_dmm__emif_fw,</div><div class='add'>+	&amp;omap44xx_l4_cfg__emif_fw,</div><div class='add'>+	&amp;omap44xx_iva__l3_instr,</div><div class='add'>+	&amp;omap44xx_l3_main_3__l3_instr,</div><div class='add'>+	&amp;omap44xx_ocp_wp_noc__l3_instr,</div><div class='add'>+	&amp;omap44xx_dsp__l3_main_1,</div><div class='add'>+	&amp;omap44xx_dss__l3_main_1,</div><div class='add'>+	&amp;omap44xx_l3_main_2__l3_main_1,</div><div class='add'>+	&amp;omap44xx_l4_cfg__l3_main_1,</div><div class='add'>+	&amp;omap44xx_mmc1__l3_main_1,</div><div class='add'>+	&amp;omap44xx_mmc2__l3_main_1,</div><div class='add'>+	&amp;omap44xx_mpu__l3_main_1,</div><div class='add'>+	&amp;omap44xx_c2c_target_fw__l3_main_2,</div><div class='add'>+	&amp;omap44xx_debugss__l3_main_2,</div><div class='add'>+	&amp;omap44xx_dma_system__l3_main_2,</div><div class='add'>+	&amp;omap44xx_fdif__l3_main_2,</div><div class='add'>+	&amp;omap44xx_gpu__l3_main_2,</div><div class='add'>+	&amp;omap44xx_hsi__l3_main_2,</div><div class='add'>+	&amp;omap44xx_ipu__l3_main_2,</div><div class='add'>+	&amp;omap44xx_iss__l3_main_2,</div><div class='add'>+	&amp;omap44xx_iva__l3_main_2,</div><div class='add'>+	&amp;omap44xx_l3_main_1__l3_main_2,</div><div class='add'>+	&amp;omap44xx_l4_cfg__l3_main_2,</div><div class='add'>+	&amp;omap44xx_usb_host_fs__l3_main_2,</div><div class='add'>+	&amp;omap44xx_usb_host_hs__l3_main_2,</div><div class='add'>+	&amp;omap44xx_usb_otg_hs__l3_main_2,</div><div class='add'>+	&amp;omap44xx_l3_main_1__l3_main_3,</div><div class='add'>+	&amp;omap44xx_l3_main_2__l3_main_3,</div><div class='add'>+	&amp;omap44xx_l4_cfg__l3_main_3,</div><div class='add'>+	&amp;omap44xx_aess__l4_abe,</div><div class='add'>+	&amp;omap44xx_dsp__l4_abe,</div><div class='add'>+	&amp;omap44xx_l3_main_1__l4_abe,</div><div class='add'>+	&amp;omap44xx_mpu__l4_abe,</div><div class='add'>+	&amp;omap44xx_l3_main_1__l4_cfg,</div><div class='add'>+	&amp;omap44xx_l3_main_2__l4_per,</div><div class='add'>+	&amp;omap44xx_l4_cfg__l4_wkup,</div><div class='add'>+	&amp;omap44xx_mpu__mpu_private,</div><div class='add'>+	&amp;omap44xx_l4_cfg__ocp_wp_noc,</div><div class='add'>+	&amp;omap44xx_l4_abe__aess,</div><div class='add'>+	&amp;omap44xx_l4_abe__aess_dma,</div><div class='add'>+	&amp;omap44xx_l3_main_2__c2c,</div><div class='add'>+	&amp;omap44xx_l4_wkup__counter_32k,</div><div class='add'>+	&amp;omap44xx_l4_cfg__ctrl_module_core,</div><div class='add'>+	&amp;omap44xx_l4_cfg__ctrl_module_pad_core,</div><div class='add'>+	&amp;omap44xx_l4_wkup__ctrl_module_wkup,</div><div class='add'>+	&amp;omap44xx_l4_wkup__ctrl_module_pad_wkup,</div><div class='add'>+	&amp;omap44xx_l3_instr__debugss,</div><div class='add'>+	&amp;omap44xx_l4_cfg__dma_system,</div><div class='add'>+	&amp;omap44xx_l4_abe__dmic,</div><div class='add'>+	&amp;omap44xx_l4_abe__dmic_dma,</div><div class='add'>+	&amp;omap44xx_dsp__iva,</div><div class='add'>+	&amp;omap44xx_dsp__sl2if,</div><div class='add'>+	&amp;omap44xx_l4_cfg__dsp,</div><div class='add'>+	&amp;omap44xx_l3_main_2__dss,</div><div class='add'>+	&amp;omap44xx_l4_per__dss,</div><div class='add'>+	&amp;omap44xx_l3_main_2__dss_dispc,</div><div class='add'>+	&amp;omap44xx_l4_per__dss_dispc,</div><div class='add'>+	&amp;omap44xx_l3_main_2__dss_dsi1,</div><div class='add'>+	&amp;omap44xx_l4_per__dss_dsi1,</div><div class='add'>+	&amp;omap44xx_l3_main_2__dss_dsi2,</div><div class='add'>+	&amp;omap44xx_l4_per__dss_dsi2,</div><div class='add'>+	&amp;omap44xx_l3_main_2__dss_hdmi,</div><div class='add'>+	&amp;omap44xx_l4_per__dss_hdmi,</div><div class='add'>+	&amp;omap44xx_l3_main_2__dss_rfbi,</div><div class='add'>+	&amp;omap44xx_l4_per__dss_rfbi,</div><div class='add'>+	&amp;omap44xx_l3_main_2__dss_venc,</div><div class='add'>+	&amp;omap44xx_l4_per__dss_venc,</div><div class='add'>+	&amp;omap44xx_l4_per__elm,</div><div class='add'>+	&amp;omap44xx_emif_fw__emif1,</div><div class='add'>+	&amp;omap44xx_emif_fw__emif2,</div><div class='add'>+	&amp;omap44xx_l4_cfg__fdif,</div><div class='add'>+	&amp;omap44xx_l4_wkup__gpio1,</div><div class='add'>+	&amp;omap44xx_l4_per__gpio2,</div><div class='add'>+	&amp;omap44xx_l4_per__gpio3,</div><div class='add'>+	&amp;omap44xx_l4_per__gpio4,</div><div class='add'>+	&amp;omap44xx_l4_per__gpio5,</div><div class='add'>+	&amp;omap44xx_l4_per__gpio6,</div><div class='add'>+	&amp;omap44xx_l3_main_2__gpmc,</div><div class='add'>+	&amp;omap44xx_l3_main_2__gpu,</div><div class='add'>+	&amp;omap44xx_l4_per__hdq1w,</div><div class='add'>+	&amp;omap44xx_l4_cfg__hsi,</div><div class='add'>+	&amp;omap44xx_l4_per__i2c1,</div><div class='add'>+	&amp;omap44xx_l4_per__i2c2,</div><div class='add'>+	&amp;omap44xx_l4_per__i2c3,</div><div class='add'>+	&amp;omap44xx_l4_per__i2c4,</div><div class='add'>+	&amp;omap44xx_l3_main_2__ipu,</div><div class='add'>+	&amp;omap44xx_l3_main_2__iss,</div><div class='add'>+	&amp;omap44xx_iva__sl2if,</div><div class='add'>+	&amp;omap44xx_l3_main_2__iva,</div><div class='add'>+	&amp;omap44xx_l4_wkup__kbd,</div><div class='add'>+	&amp;omap44xx_l4_cfg__mailbox,</div><div class='add'>+	&amp;omap44xx_l4_abe__mcasp,</div><div class='add'>+	&amp;omap44xx_l4_abe__mcasp_dma,</div><div class='add'>+	&amp;omap44xx_l4_abe__mcbsp1,</div><div class='add'>+	&amp;omap44xx_l4_abe__mcbsp1_dma,</div><div class='add'>+	&amp;omap44xx_l4_abe__mcbsp2,</div><div class='add'>+	&amp;omap44xx_l4_abe__mcbsp2_dma,</div><div class='add'>+	&amp;omap44xx_l4_abe__mcbsp3,</div><div class='add'>+	&amp;omap44xx_l4_abe__mcbsp3_dma,</div><div class='add'>+	&amp;omap44xx_l4_per__mcbsp4,</div><div class='add'>+	&amp;omap44xx_l4_abe__mcpdm,</div><div class='add'>+	&amp;omap44xx_l4_abe__mcpdm_dma,</div><div class='add'>+	&amp;omap44xx_l4_per__mcspi1,</div><div class='add'>+	&amp;omap44xx_l4_per__mcspi2,</div><div class='add'>+	&amp;omap44xx_l4_per__mcspi3,</div><div class='add'>+	&amp;omap44xx_l4_per__mcspi4,</div><div class='add'>+	&amp;omap44xx_l4_per__mmc1,</div><div class='add'>+	&amp;omap44xx_l4_per__mmc2,</div><div class='add'>+	&amp;omap44xx_l4_per__mmc3,</div><div class='add'>+	&amp;omap44xx_l4_per__mmc4,</div><div class='add'>+	&amp;omap44xx_l4_per__mmc5,</div><div class='add'>+	&amp;omap44xx_l3_main_2__ocmc_ram,</div><div class='add'>+	&amp;omap44xx_l4_cfg__ocp2scp_usb_phy,</div><div class='add'>+	&amp;omap44xx_mpu_private__prcm_mpu,</div><div class='add'>+	&amp;omap44xx_l4_wkup__cm_core_aon,</div><div class='add'>+	&amp;omap44xx_l4_cfg__cm_core,</div><div class='add'>+	&amp;omap44xx_l4_wkup__prm,</div><div class='add'>+	&amp;omap44xx_l4_wkup__scrm,</div><div class='add'>+	&amp;omap44xx_l3_main_2__sl2if,</div><div class='add'>+	&amp;omap44xx_l4_abe__slimbus1,</div><div class='add'>+	&amp;omap44xx_l4_abe__slimbus1_dma,</div><div class='add'>+	&amp;omap44xx_l4_per__slimbus2,</div><div class='add'>+	&amp;omap44xx_l4_cfg__smartreflex_core,</div><div class='add'>+	&amp;omap44xx_l4_cfg__smartreflex_iva,</div><div class='add'>+	&amp;omap44xx_l4_cfg__smartreflex_mpu,</div><div class='add'>+	&amp;omap44xx_l4_cfg__spinlock,</div><div class='add'>+	&amp;omap44xx_l4_wkup__timer1,</div><div class='add'>+	&amp;omap44xx_l4_per__timer2,</div><div class='add'>+	&amp;omap44xx_l4_per__timer3,</div><div class='add'>+	&amp;omap44xx_l4_per__timer4,</div><div class='add'>+	&amp;omap44xx_l4_abe__timer5,</div><div class='add'>+	&amp;omap44xx_l4_abe__timer5_dma,</div><div class='add'>+	&amp;omap44xx_l4_abe__timer6,</div><div class='add'>+	&amp;omap44xx_l4_abe__timer6_dma,</div><div class='add'>+	&amp;omap44xx_l4_abe__timer7,</div><div class='add'>+	&amp;omap44xx_l4_abe__timer7_dma,</div><div class='add'>+	&amp;omap44xx_l4_abe__timer8,</div><div class='add'>+	&amp;omap44xx_l4_abe__timer8_dma,</div><div class='add'>+	&amp;omap44xx_l4_per__timer9,</div><div class='add'>+	&amp;omap44xx_l4_per__timer10,</div><div class='add'>+	&amp;omap44xx_l4_per__timer11,</div><div class='add'>+	&amp;omap44xx_l4_per__uart1,</div><div class='add'>+	&amp;omap44xx_l4_per__uart2,</div><div class='add'>+	&amp;omap44xx_l4_per__uart3,</div><div class='add'>+	&amp;omap44xx_l4_per__uart4,</div><div class='add'>+	&amp;omap44xx_l4_cfg__usb_host_fs,</div><div class='add'>+	&amp;omap44xx_l4_cfg__usb_host_hs,</div><div class='add'>+	&amp;omap44xx_l4_cfg__usb_otg_hs,</div><div class='add'>+	&amp;omap44xx_l4_cfg__usb_tll_hs,</div><div class='add'>+	&amp;omap44xx_l4_wkup__wd_timer2,</div><div class='add'>+	&amp;omap44xx_l4_abe__wd_timer3,</div><div class='add'>+	&amp;omap44xx_l4_abe__wd_timer3_dma,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int __init omap44xx_hwmod_init(void)</div><div class='ctx'> {</div><div class='del'>-	return omap_hwmod_register(omap44xx_hwmods);</div><div class='add'>+	return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h<br/>index ad5d8f04c0b8..e7e8eeae95e5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_common_data.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/omap_hwmod_common_data.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/omap_hwmod_common_data.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/omap_hwmod_common_data.h</a></div><div class='hunk'>@@ -19,18 +19,6 @@</div><div class='ctx'> #include "display.h"</div><div class='ctx'> </div><div class='ctx'> /* Common address space across OMAP2xxx */</div><div class='del'>-extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[];</div><div class='del'>-extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[];</div><div class='del'>-extern struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[];</div><div class='del'>-extern struct omap_hwmod_addr_space omap2xxx_timer2_addrs[];</div><div class='del'>-extern struct omap_hwmod_addr_space omap2xxx_timer3_addrs[];</div><div class='del'>-extern struct omap_hwmod_addr_space omap2xxx_timer4_addrs[];</div><div class='del'>-extern struct omap_hwmod_addr_space omap2xxx_timer5_addrs[];</div><div class='del'>-extern struct omap_hwmod_addr_space omap2xxx_timer6_addrs[];</div><div class='del'>-extern struct omap_hwmod_addr_space omap2xxx_timer7_addrs[];</div><div class='del'>-extern struct omap_hwmod_addr_space omap2xxx_timer8_addrs[];</div><div class='del'>-extern struct omap_hwmod_addr_space omap2xxx_timer9_addrs[];</div><div class='del'>-extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[];</div><div class='ctx'> extern struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[];</div><div class='ctx'> </div><div class='ctx'> /* Common address space across OMAP2xxx/3xxx */</div><div class='hunk'>@@ -50,10 +38,70 @@ extern struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[];</div><div class='ctx'> extern struct omap_hwmod_addr_space omap2_dma_system_addrs[];</div><div class='ctx'> extern struct omap_hwmod_addr_space omap2_mailbox_addrs[];</div><div class='ctx'> extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[];</div><div class='add'>+extern struct omap_hwmod_addr_space omap2_hdq1w_addr_space[];</div><div class='ctx'> </div><div class='ctx'> /* Common IP block data across OMAP2xxx */</div><div class='ctx'> extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[];</div><div class='ctx'> extern struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[];</div><div class='add'>+extern struct omap_gpio_dev_attr omap2xxx_gpio_dev_attr;</div><div class='add'>+extern struct omap_hwmod omap2xxx_l3_main_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_l4_core_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_l4_wkup_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_mpu_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_iva_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_timer1_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_timer2_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_timer3_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_timer4_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_timer5_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_timer6_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_timer7_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_timer8_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_timer9_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_timer10_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_timer11_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_timer12_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_wd_timer2_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_uart1_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_uart2_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_uart3_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_dss_core_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_dss_dispc_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_dss_rfbi_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_dss_venc_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_gpio1_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_gpio2_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_gpio3_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_gpio4_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_mcspi1_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_mcspi2_hwmod;</div><div class='add'>+extern struct omap_hwmod omap2xxx_counter_32k_hwmod;</div><div class='add'>+</div><div class='add'>+/* Common interface data across OMAP2xxx */</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_mpu__l3_main;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_dss__l3;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__l4_wkup;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2_l4_core__uart1;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2_l4_core__uart2;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2_l4_core__uart3;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer4;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer5;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer6;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer7;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer8;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer9;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer10;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer11;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer12;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi;</div><div class='add'>+extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc;</div><div class='ctx'> </div><div class='ctx'> /* Common IP block data */</div><div class='ctx'> extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[];</div><div class='hunk'>@@ -94,6 +142,8 @@ extern struct omap_hwmod_irq_info omap2_gpio4_irqs[];</div><div class='ctx'> extern struct omap_hwmod_irq_info omap2_dma_system_irqs[];</div><div class='ctx'> extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[];</div><div class='ctx'> extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[];</div><div class='add'>+extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[];</div><div class='add'>+extern struct omap_hwmod_irq_info omap2_hdq1w_mpu_irqs[];</div><div class='ctx'> </div><div class='ctx'> /* OMAP hwmod classes - forward declarations */</div><div class='ctx'> extern struct omap_hwmod_class l3_hwmod_class;</div><div class='hunk'>@@ -105,6 +155,8 @@ extern struct omap_hwmod_class omap2_dss_hwmod_class;</div><div class='ctx'> extern struct omap_hwmod_class omap2_dispc_hwmod_class;</div><div class='ctx'> extern struct omap_hwmod_class omap2_rfbi_hwmod_class;</div><div class='ctx'> extern struct omap_hwmod_class omap2_venc_hwmod_class;</div><div class='add'>+extern struct omap_hwmod_class_sysconfig omap2_hdq1w_sysc;</div><div class='add'>+extern struct omap_hwmod_class omap2_hdq1w_class;</div><div class='ctx'> </div><div class='ctx'> extern struct omap_hwmod_class omap2xxx_timer_hwmod_class;</div><div class='ctx'> extern struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class;</div><div class='head'>diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c<br/>index d0c1c9695996..9cb5cede0f50 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/pm.c</a></div><div class='hunk'>@@ -295,7 +295,7 @@ static int __init omap2_common_pm_init(void)</div><div class='ctx'> }</div><div class='ctx'> postcore_initcall(omap2_common_pm_init);</div><div class='ctx'> </div><div class='del'>-static int __init omap2_common_pm_late_init(void)</div><div class='add'>+int __init omap2_common_pm_late_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * In the case of DT, the PMIC and SR initialization will be done using</div><div class='hunk'>@@ -322,4 +322,3 @@ static int __init omap2_common_pm_late_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-late_initcall(omap2_common_pm_late_init);</div><div class='head'>diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h<br/>index 36fa90b6ece8..78564895e914 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/pm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/pm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/pm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/pm.h</a></div><div class='hunk'>@@ -38,27 +38,6 @@ static inline int omap4_opp_init(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * cpuidle mach specific parameters</div><div class='del'>- *</div><div class='del'>- * The board code can override the default C-states definition using</div><div class='del'>- * omap3_pm_init_cpuidle</div><div class='del'>- */</div><div class='del'>-struct cpuidle_params {</div><div class='del'>-	u32 exit_latency;	/* exit_latency = sleep + wake-up latencies */</div><div class='del'>-	u32 target_residency;</div><div class='del'>-	u8 valid;		/* validates the C-state */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_PM) &amp;&amp; defined(CONFIG_CPU_IDLE)</div><div class='del'>-extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params);</div><div class='del'>-#else</div><div class='del'>-static</div><div class='del'>-inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);</div><div class='ctx'> extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c<br/>index 95442b69ae27..2edeffc923a6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/pm24xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/pm24xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/pm24xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/pm24xx.c</a></div><div class='hunk'>@@ -171,8 +171,6 @@ static int omap2_allow_mpu_retention(void)</div><div class='ctx'> </div><div class='ctx'> static void omap2_enter_mpu_retention(void)</div><div class='ctx'> {</div><div class='del'>-	int only_idle = 0;</div><div class='del'>-</div><div class='ctx'> 	/* Putting MPU into the WFI state while a transfer is active</div><div class='ctx'> 	 * seems to cause the I2C block to timeout. Why? Good question. */</div><div class='ctx'> 	if (omap2_i2c_active())</div><div class='hunk'>@@ -195,7 +193,6 @@ static void omap2_enter_mpu_retention(void)</div><div class='ctx'> </div><div class='ctx'> 		omap2_prm_write_mod_reg(OMAP_LOGICRETSTATE_MASK, MPU_MOD,</div><div class='ctx'> 						 OMAP2_PM_PWSTCTRL);</div><div class='del'>-		only_idle = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	omap2_sram_idle();</div><div class='hunk'>@@ -301,13 +298,10 @@ static void __init prcm_setup_regs(void)</div><div class='ctx'> 				WKUP_MOD, PM_WKEN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init omap2_pm_init(void)</div><div class='add'>+int __init omap2_pm_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 l;</div><div class='ctx'> </div><div class='del'>-	if (!cpu_is_omap24xx())</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	printk(KERN_INFO "Power Management for OMAP2 initializing\n");</div><div class='ctx'> 	l = omap2_prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_REVISION_OFFSET);</div><div class='ctx'> 	printk(KERN_INFO "PRCM revision %d.%d\n", (l &gt;&gt; 4) &amp; 0x0f, l &amp; 0x0f);</div><div class='hunk'>@@ -373,17 +367,13 @@ static int __init omap2_pm_init(void)</div><div class='ctx'> 	 * These routines need to be in SRAM as that's the only</div><div class='ctx'> 	 * memory the MPU can see when it wakes up.</div><div class='ctx'> 	 */</div><div class='del'>-	if (cpu_is_omap24xx()) {</div><div class='del'>-		omap2_sram_idle = omap_sram_push(omap24xx_idle_loop_suspend,</div><div class='del'>-						 omap24xx_idle_loop_suspend_sz);</div><div class='add'>+	omap2_sram_idle = omap_sram_push(omap24xx_idle_loop_suspend,</div><div class='add'>+					 omap24xx_idle_loop_suspend_sz);</div><div class='ctx'> </div><div class='del'>-		omap2_sram_suspend = omap_sram_push(omap24xx_cpu_suspend,</div><div class='del'>-						    omap24xx_cpu_suspend_sz);</div><div class='del'>-	}</div><div class='add'>+	omap2_sram_suspend = omap_sram_push(omap24xx_cpu_suspend,</div><div class='add'>+					    omap24xx_cpu_suspend_sz);</div><div class='ctx'> </div><div class='ctx'> 	arm_pm_idle = omap2_pm_idle;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-late_initcall(omap2_pm_init);</div><div class='head'>diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c<br/>index 703bd1099259..a34023d0ca7c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/pm34xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/pm34xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/pm34xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/pm34xx.c</a></div><div class='hunk'>@@ -273,7 +273,7 @@ void omap_sram_idle(void)</div><div class='ctx'> 	int per_next_state = PWRDM_POWER_ON;</div><div class='ctx'> 	int core_next_state = PWRDM_POWER_ON;</div><div class='ctx'> 	int per_going_off;</div><div class='del'>-	int core_prev_state, per_prev_state;</div><div class='add'>+	int core_prev_state;</div><div class='ctx'> 	u32 sdrc_pwr = 0;</div><div class='ctx'> </div><div class='ctx'> 	mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);</div><div class='hunk'>@@ -375,10 +375,8 @@ void omap_sram_idle(void)</div><div class='ctx'> 	pwrdm_post_transition();</div><div class='ctx'> </div><div class='ctx'> 	/* PER */</div><div class='del'>-	if (per_next_state &lt; PWRDM_POWER_ON) {</div><div class='del'>-		per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);</div><div class='add'>+	if (per_next_state &lt; PWRDM_POWER_ON)</div><div class='ctx'> 		omap2_gpio_resume_after_idle();</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* Disable IO-PAD and IO-CHAIN wakeup */</div><div class='ctx'> 	if (omap3_has_io_wakeup() &amp;&amp;</div><div class='hunk'>@@ -699,15 +697,12 @@ static void __init pm_errata_configure(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init omap3_pm_init(void)</div><div class='add'>+int __init omap3_pm_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct power_state *pwrst, *tmp;</div><div class='del'>-	struct clockdomain *neon_clkdm, *per_clkdm, *mpu_clkdm, *core_clkdm;</div><div class='add'>+	struct clockdomain *neon_clkdm, *mpu_clkdm;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!cpu_is_omap34xx())</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	if (!omap3_has_io_chain_ctrl())</div><div class='ctx'> 		pr_warning("PM: no software I/O chain control; some wakeups may be lost\n");</div><div class='ctx'> </div><div class='hunk'>@@ -757,8 +752,6 @@ static int __init omap3_pm_init(void)</div><div class='ctx'> </div><div class='ctx'> 	neon_clkdm = clkdm_lookup("neon_clkdm");</div><div class='ctx'> 	mpu_clkdm = clkdm_lookup("mpu_clkdm");</div><div class='del'>-	per_clkdm = clkdm_lookup("per_clkdm");</div><div class='del'>-	core_clkdm = clkdm_lookup("core_clkdm");</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SUSPEND</div><div class='ctx'> 	omap_pm_suspend = omap3_pm_suspend;</div><div class='hunk'>@@ -808,5 +801,3 @@ err2:</div><div class='ctx'> err1:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-late_initcall(omap3_pm_init);</div><div class='head'>diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c<br/>index 885625352429..ea24174f5707 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/pm44xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/pm44xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/pm44xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/pm44xx.c</a></div><div class='hunk'>@@ -141,15 +141,12 @@ static void omap_default_idle(void)</div><div class='ctx'>  * Initializes all powerdomain and clockdomain target states</div><div class='ctx'>  * and all PRCM settings.</div><div class='ctx'>  */</div><div class='del'>-static int __init omap4_pm_init(void)</div><div class='add'>+int __init omap4_pm_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm, *l4wkup;</div><div class='ctx'> 	struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm;</div><div class='ctx'> </div><div class='del'>-	if (!cpu_is_omap44xx())</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	if (omap_rev() == OMAP4430_REV_ES1_0) {</div><div class='ctx'> 		WARN(1, "Power Management not supported on OMAP4430 ES1.0\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -217,4 +214,3 @@ static int __init omap4_pm_init(void)</div><div class='ctx'> err2:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-late_initcall(omap4_pm_init);</div><div class='head'>diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c<br/>index 96ad3dbeac34..96114901b932 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/powerdomain.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/powerdomain.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/powerdomain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/powerdomain.c</a></div><div class='hunk'>@@ -981,16 +981,6 @@ int pwrdm_state_switch(struct powerdomain *pwrdm)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)</div><div class='del'>-{</div><div class='del'>-	if (clkdm != NULL &amp;&amp; clkdm-&gt;pwrdm.ptr != NULL) {</div><div class='del'>-		pwrdm_wait_transition(clkdm-&gt;pwrdm.ptr);</div><div class='del'>-		return pwrdm_state_switch(clkdm-&gt;pwrdm.ptr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int pwrdm_pre_transition(void)</div><div class='ctx'> {</div><div class='ctx'> 	pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);</div><div class='head'>diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h<br/>index 0d72a8a8ce4d..8f88d65c46ea 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/powerdomain.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/powerdomain.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/powerdomain.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/powerdomain.h</a></div><div class='hunk'>@@ -213,7 +213,6 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);</div><div class='ctx'> int pwrdm_wait_transition(struct powerdomain *pwrdm);</div><div class='ctx'> </div><div class='ctx'> int pwrdm_state_switch(struct powerdomain *pwrdm);</div><div class='del'>-int pwrdm_clkdm_state_switch(struct clockdomain *clkdm);</div><div class='ctx'> int pwrdm_pre_transition(void);</div><div class='ctx'> int pwrdm_post_transition(void);</div><div class='ctx'> int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);</div><div class='head'>diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c<br/>index b7ea468eea32..fb0a0a6869d1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/powerdomains3xxx_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/powerdomains3xxx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/powerdomains3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/powerdomains3xxx_data.c</a></div><div class='hunk'>@@ -311,7 +311,7 @@ void __init omap3xxx_powerdomains_init(void)</div><div class='ctx'> 		 rev == OMAP3430_REV_ES3_0 || rev == OMAP3630_REV_ES1_0)</div><div class='ctx'> 		pwrdm_register_pwrdms(powerdomains_omap3430es2_es3_0);</div><div class='ctx'> 	else if (rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2 ||</div><div class='del'>-		 rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1 ||</div><div class='add'>+		 rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1 ||</div><div class='ctx'> 		 rev == OMAP3630_REV_ES1_1 || rev == OMAP3630_REV_ES1_2)</div><div class='ctx'> 		pwrdm_register_pwrdms(powerdomains_omap3430es3_1plus);</div><div class='ctx'> 	else</div><div class='head'>diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h<br/>index 5aa5435e3ff1..6da3ba483ad1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/prcm-common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/prcm-common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/prcm-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/prcm-common.h</a></div><div class='hunk'>@@ -177,6 +177,8 @@</div><div class='ctx'> /* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */</div><div class='ctx'> #define OMAP24XX_ST_GPIOS_SHIFT				2</div><div class='ctx'> #define OMAP24XX_ST_GPIOS_MASK				(1 &lt;&lt; 2)</div><div class='add'>+#define OMAP24XX_ST_32KSYNC_SHIFT			1</div><div class='add'>+#define OMAP24XX_ST_32KSYNC_MASK			(1 &lt;&lt; 1)</div><div class='ctx'> #define OMAP24XX_ST_GPT1_SHIFT				0</div><div class='ctx'> #define OMAP24XX_ST_GPT1_MASK				(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='hunk'>@@ -307,6 +309,8 @@</div><div class='ctx'> #define OMAP3430_ST_SR1_MASK				(1 &lt;&lt; 6)</div><div class='ctx'> #define OMAP3430_ST_GPIO1_SHIFT				3</div><div class='ctx'> #define OMAP3430_ST_GPIO1_MASK				(1 &lt;&lt; 3)</div><div class='add'>+#define OMAP3430_ST_32KSYNC_SHIFT			2</div><div class='add'>+#define OMAP3430_ST_32KSYNC_MASK			(1 &lt;&lt; 2)</div><div class='ctx'> #define OMAP3430_ST_GPT12_SHIFT				1</div><div class='ctx'> #define OMAP3430_ST_GPT12_MASK				(1 &lt;&lt; 1)</div><div class='ctx'> #define OMAP3430_ST_GPT1_SHIFT				0</div><div class='hunk'>@@ -410,6 +414,19 @@</div><div class='ctx'> extern void __iomem *prm_base;</div><div class='ctx'> extern void __iomem *cm_base;</div><div class='ctx'> extern void __iomem *cm2_base;</div><div class='add'>+extern void __iomem *prcm_mpu_base;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_OMAP5)</div><div class='add'>+extern void omap_prm_base_init(void);</div><div class='add'>+extern void omap_cm_base_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline void omap_prm_base_init(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+static inline void omap_cm_base_init(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct omap_prcm_irq - describes a PRCM interrupt bit</div><div class='head'>diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c<br/>index 626acfad7190..480f40a5ee42 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/prcm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/prcm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/prcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/prcm.c</a></div><div class='hunk'>@@ -42,6 +42,7 @@</div><div class='ctx'> void __iomem *prm_base;</div><div class='ctx'> void __iomem *cm_base;</div><div class='ctx'> void __iomem *cm2_base;</div><div class='add'>+void __iomem *prcm_mpu_base;</div><div class='ctx'> </div><div class='ctx'> #define MAX_MODULE_ENABLE_WAIT		100000</div><div class='ctx'> </div><div class='hunk'>@@ -155,4 +156,11 @@ void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)</div><div class='ctx'> 		cm_base = omap2_globals-&gt;cm;</div><div class='ctx'> 	if (omap2_globals-&gt;cm2)</div><div class='ctx'> 		cm2_base = omap2_globals-&gt;cm2;</div><div class='add'>+	if (omap2_globals-&gt;prcm_mpu)</div><div class='add'>+		prcm_mpu_base = omap2_globals-&gt;prcm_mpu;</div><div class='add'>+</div><div class='add'>+	if (cpu_is_omap44xx()) {</div><div class='add'>+		omap_prm_base_init();</div><div class='add'>+		omap_cm_base_init();</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c<br/>index d28f848897d6..dfe00ddb5c60 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/prm_common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/prm_common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/prm_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/prm_common.c</a></div><div class='hunk'>@@ -237,7 +237,7 @@ void omap_prcm_irq_complete(void)</div><div class='ctx'>  */</div><div class='ctx'> int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)</div><div class='ctx'> {</div><div class='del'>-	int nr_regs = irq_setup-&gt;nr_regs;</div><div class='add'>+	int nr_regs;</div><div class='ctx'> 	u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG];</div><div class='ctx'> 	int offset, i;</div><div class='ctx'> 	struct irq_chip_generic *gc;</div><div class='hunk'>@@ -246,6 +246,8 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)</div><div class='ctx'> 	if (!irq_setup)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	nr_regs = irq_setup-&gt;nr_regs;</div><div class='add'>+</div><div class='ctx'> 	if (prcm_irq_setup) {</div><div class='ctx'> 		pr_err("PRCM: already initialized; won't reinitialize\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='head'>diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c<br/>index 9b3898a3ac9b..c12320c0ae95 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/prminst44xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/prminst44xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/prminst44xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/prminst44xx.c</a></div><div class='hunk'>@@ -18,20 +18,26 @@</div><div class='ctx'> </div><div class='ctx'> #include "iomap.h"</div><div class='ctx'> #include "common.h"</div><div class='add'>+#include "prcm-common.h"</div><div class='ctx'> #include "prm44xx.h"</div><div class='ctx'> #include "prminst44xx.h"</div><div class='ctx'> #include "prm-regbits-44xx.h"</div><div class='ctx'> #include "prcm44xx.h"</div><div class='ctx'> #include "prcm_mpu44xx.h"</div><div class='ctx'> </div><div class='del'>-static u32 _prm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {</div><div class='del'>-	[OMAP4430_INVALID_PRCM_PARTITION]	= 0,</div><div class='del'>-	[OMAP4430_PRM_PARTITION]		= OMAP4430_PRM_BASE,</div><div class='del'>-	[OMAP4430_CM1_PARTITION]		= 0,</div><div class='del'>-	[OMAP4430_CM2_PARTITION]		= 0,</div><div class='del'>-	[OMAP4430_SCRM_PARTITION]		= 0,</div><div class='del'>-	[OMAP4430_PRCM_MPU_PARTITION]		= OMAP4430_PRCM_MPU_BASE,</div><div class='del'>-};</div><div class='add'>+static void __iomem *_prm_bases[OMAP4_MAX_PRCM_PARTITIONS];</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * omap_prm_base_init - Populates the prm partitions</div><div class='add'>+ *</div><div class='add'>+ * Populates the base addresses of the _prm_bases</div><div class='add'>+ * array used for read/write of prm module registers.</div><div class='add'>+ */</div><div class='add'>+void omap_prm_base_init(void)</div><div class='add'>+{</div><div class='add'>+	_prm_bases[OMAP4430_PRM_PARTITION] = prm_base;</div><div class='add'>+	_prm_bases[OMAP4430_PRCM_MPU_PARTITION] = prcm_mpu_base;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /* Read a register in a PRM instance */</div><div class='ctx'> u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)</div><div class='hunk'>@@ -39,8 +45,7 @@ u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)</div><div class='ctx'> 	BUG_ON(part &gt;= OMAP4_MAX_PRCM_PARTITIONS ||</div><div class='ctx'> 	       part == OMAP4430_INVALID_PRCM_PARTITION ||</div><div class='ctx'> 	       !_prm_bases[part]);</div><div class='del'>-	return __raw_readl(OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst +</div><div class='del'>-					       idx));</div><div class='add'>+	return __raw_readl(_prm_bases[part] + inst + idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Write into a register in a PRM instance */</div><div class='hunk'>@@ -49,7 +54,7 @@ void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)</div><div class='ctx'> 	BUG_ON(part &gt;= OMAP4_MAX_PRCM_PARTITIONS ||</div><div class='ctx'> 	       part == OMAP4430_INVALID_PRCM_PARTITION ||</div><div class='ctx'> 	       !_prm_bases[part]);</div><div class='del'>-	__raw_writel(val, OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst + idx));</div><div class='add'>+	__raw_writel(val, _prm_bases[part] + inst + idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Read-modify-write a register in PRM. Caller must lock */</div><div class='head'>diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c<br/>index 9fc2f44188cb..292d4aaca068 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/serial.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/serial.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/serial.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/serial.c</a></div><div class='hunk'>@@ -133,7 +133,7 @@ static void omap_serial_fill_default_pads(struct omap_board_data *bdata)</div><div class='ctx'> static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-char *cmdline_find_option(char *str)</div><div class='add'>+static char *cmdline_find_option(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	extern char *saved_command_line;</div><div class='ctx'> </div><div class='hunk'>@@ -245,14 +245,6 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,</div><div class='ctx'> 	omap_up.dma_rx_poll_rate = info-&gt;dma_rx_poll_rate;</div><div class='ctx'> 	omap_up.autosuspend_timeout = info-&gt;autosuspend_timeout;</div><div class='ctx'> </div><div class='del'>-	/* Enable the MDR1 Errata i202 for OMAP2430/3xxx/44xx */</div><div class='del'>-	if (!cpu_is_omap2420() &amp;&amp; !cpu_is_ti816x())</div><div class='del'>-		omap_up.errata |= UART_ERRATA_i202_MDR1_ACCESS;</div><div class='del'>-</div><div class='del'>-	/* Enable DMA Mode Force Idle Errata i291 for omap34xx/3630 */</div><div class='del'>-	if (cpu_is_omap34xx() || cpu_is_omap3630())</div><div class='del'>-		omap_up.errata |= UART_ERRATA_i291_DMA_FORCEIDLE;</div><div class='del'>-</div><div class='ctx'> 	pdata = &amp;omap_up;</div><div class='ctx'> 	pdata_size = sizeof(struct omap_uart_port_info);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c<br/>index c512bac69ec5..840929bd9dae 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/timer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/timer.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/timer.c</a></div><div class='hunk'>@@ -90,7 +90,7 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct irqaction omap2_gp_timer_irq = {</div><div class='del'>-	.name		= "gp timer",</div><div class='add'>+	.name		= "gp_timer",</div><div class='ctx'> 	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,</div><div class='ctx'> 	.handler	= omap2_gp_timer_interrupt,</div><div class='ctx'> };</div><div class='hunk'>@@ -132,7 +132,7 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct clock_event_device clockevent_gpt = {</div><div class='del'>-	.name		= "gp timer",</div><div class='add'>+	.name		= "gp_timer",</div><div class='ctx'> 	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,</div><div class='ctx'> 	.shift		= 32,</div><div class='ctx'> 	.set_next_event	= omap2_gp_timer_set_next_event,</div><div class='hunk'>@@ -145,8 +145,10 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,</div><div class='ctx'> {</div><div class='ctx'> 	char name[10]; /* 10 = sizeof("gptXX_Xck0") */</div><div class='ctx'> 	struct omap_hwmod *oh;</div><div class='add'>+	struct resource irq_rsrc, mem_rsrc;</div><div class='ctx'> 	size_t size;</div><div class='ctx'> 	int res = 0;</div><div class='add'>+	int r;</div><div class='ctx'> </div><div class='ctx'> 	sprintf(name, "timer%d", gptimer_id);</div><div class='ctx'> 	omap_hwmod_setup_one(name);</div><div class='hunk'>@@ -154,9 +156,16 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,</div><div class='ctx'> 	if (!oh)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	timer-&gt;irq = oh-&gt;mpu_irqs[0].irq;</div><div class='del'>-	timer-&gt;phys_base = oh-&gt;slaves[0]-&gt;addr-&gt;pa_start;</div><div class='del'>-	size = oh-&gt;slaves[0]-&gt;addr-&gt;pa_end - timer-&gt;phys_base;</div><div class='add'>+	r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL, &amp;irq_rsrc);</div><div class='add'>+	if (r)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	timer-&gt;irq = irq_rsrc.start;</div><div class='add'>+</div><div class='add'>+	r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL, &amp;mem_rsrc);</div><div class='add'>+	if (r)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	timer-&gt;phys_base = mem_rsrc.start;</div><div class='add'>+	size = mem_rsrc.end - mem_rsrc.start;</div><div class='ctx'> </div><div class='ctx'> 	/* Static mapping, never released */</div><div class='ctx'> 	timer-&gt;io_base = ioremap(timer-&gt;phys_base, size);</div><div class='hunk'>@@ -169,13 +178,6 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,</div><div class='ctx'> 	if (IS_ERR(timer-&gt;fclk))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	sprintf(name, "gpt%d_ick", gptimer_id);</div><div class='del'>-	timer-&gt;iclk = clk_get(NULL, name);</div><div class='del'>-	if (IS_ERR(timer-&gt;iclk)) {</div><div class='del'>-		clk_put(timer-&gt;fclk);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	omap_hwmod_enable(oh);</div><div class='ctx'> </div><div class='ctx'> 	sys_timer_reserved |= (1 &lt;&lt; (gptimer_id - 1));</div><div class='hunk'>@@ -234,22 +236,8 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Clocksource code */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_OMAP_32K_TIMER</div><div class='del'>-/*</div><div class='del'>- * When 32k-timer is enabled, don't use GPTimer for clocksource</div><div class='del'>- * instead, just leave default clocksource which uses the 32k</div><div class='del'>- * sync counter.  See clocksource setup in plat-omap/counter_32k.c</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void __init omap2_gp_clocksource_init(int unused, const char *dummy)</div><div class='del'>-{</div><div class='del'>-	omap_init_clocksource_32k();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='ctx'> static struct omap_dm_timer clksrc;</div><div class='add'>+static bool use_gptimer_clksrc;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * clocksource</div><div class='hunk'>@@ -260,7 +248,7 @@ static cycle_t clocksource_read_cycles(struct clocksource *cs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct clocksource clocksource_gpt = {</div><div class='del'>-	.name		= "gp timer",</div><div class='add'>+	.name		= "gp_timer",</div><div class='ctx'> 	.rating		= 300,</div><div class='ctx'> 	.read		= clocksource_read_cycles,</div><div class='ctx'> 	.mask		= CLOCKSOURCE_MASK(32),</div><div class='hunk'>@@ -276,7 +264,46 @@ static u32 notrace dmtimer_read_sched_clock(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Setup free-running counter for clocksource */</div><div class='del'>-static void __init omap2_gp_clocksource_init(int gptimer_id,</div><div class='add'>+static int __init omap2_sync32k_clocksource_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct omap_hwmod *oh;</div><div class='add'>+	void __iomem *vbase;</div><div class='add'>+	const char *oh_name = "counter_32k";</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * First check hwmod data is available for sync32k counter</div><div class='add'>+	 */</div><div class='add'>+	oh = omap_hwmod_lookup(oh_name);</div><div class='add'>+	if (!oh || oh-&gt;slaves_cnt == 0)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	omap_hwmod_setup_one(oh_name);</div><div class='add'>+</div><div class='add'>+	vbase = omap_hwmod_get_mpu_rt_va(oh);</div><div class='add'>+	if (!vbase) {</div><div class='add'>+		pr_warn("%s: failed to get counter_32k resource\n", __func__);</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = omap_hwmod_enable(oh);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_warn("%s: failed to enable counter_32k module (%d)\n",</div><div class='add'>+							__func__, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = omap_init_clocksource_32k(vbase);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",</div><div class='add'>+							__func__, ret);</div><div class='add'>+		omap_hwmod_idle(oh);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init omap2_gptimer_clocksource_init(int gptimer_id,</div><div class='ctx'> 						const char *fck_source)</div><div class='ctx'> {</div><div class='ctx'> 	int res;</div><div class='hunk'>@@ -284,9 +311,6 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,</div><div class='ctx'> 	res = omap_dm_timer_init_one(&amp;clksrc, gptimer_id, fck_source);</div><div class='ctx'> 	BUG_ON(res);</div><div class='ctx'> </div><div class='del'>-	pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",</div><div class='del'>-		gptimer_id, clksrc.rate);</div><div class='del'>-</div><div class='ctx'> 	__omap_dm_timer_load_start(&amp;clksrc,</div><div class='ctx'> 			OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);</div><div class='ctx'> 	setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);</div><div class='hunk'>@@ -294,15 +318,36 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,</div><div class='ctx'> 	if (clocksource_register_hz(&amp;clocksource_gpt, clksrc.rate))</div><div class='ctx'> 		pr_err("Could not register clocksource %s\n",</div><div class='ctx'> 			clocksource_gpt.name);</div><div class='add'>+	else</div><div class='add'>+		pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",</div><div class='add'>+			gptimer_id, clksrc.rate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init omap2_clocksource_init(int gptimer_id,</div><div class='add'>+						const char *fck_source)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * First give preference to kernel parameter configuration</div><div class='add'>+	 * by user (clocksource="gp_timer").</div><div class='add'>+	 *</div><div class='add'>+	 * In case of missing kernel parameter for clocksource,</div><div class='add'>+	 * first check for availability for 32k-sync timer, in case</div><div class='add'>+	 * of failure in finding 32k_counter module or registering</div><div class='add'>+	 * it as clocksource, execution will fallback to gp-timer.</div><div class='add'>+	 */</div><div class='add'>+	if (use_gptimer_clksrc == true)</div><div class='add'>+		omap2_gptimer_clocksource_init(gptimer_id, fck_source);</div><div class='add'>+	else if (omap2_sync32k_clocksource_init())</div><div class='add'>+		/* Fall back to gp-timer code */</div><div class='add'>+		omap2_gptimer_clocksource_init(gptimer_id, fck_source);</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src,			\</div><div class='ctx'> 				clksrc_nr, clksrc_src)			\</div><div class='ctx'> static void __init omap##name##_timer_init(void)			\</div><div class='ctx'> {									\</div><div class='ctx'> 	omap2_gp_clockevent_init((clkev_nr), clkev_src);		\</div><div class='del'>-	omap2_gp_clocksource_init((clksrc_nr), clksrc_src);		\</div><div class='add'>+	omap2_clocksource_init((clksrc_nr), clksrc_src);		\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define OMAP_SYS_TIMER(name)						\</div><div class='hunk'>@@ -333,7 +378,7 @@ static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,</div><div class='ctx'> static void __init omap4_timer_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);</div><div class='del'>-	omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE);</div><div class='add'>+	omap2_clocksource_init(2, OMAP4_MPU_SOURCE);</div><div class='ctx'> #ifdef CONFIG_LOCAL_TIMERS</div><div class='ctx'> 	/* Local timers are not supprted on OMAP4430 ES1.0 */</div><div class='ctx'> 	if (omap_rev() != OMAP4430_REV_ES1_0) {</div><div class='hunk'>@@ -501,3 +546,28 @@ static int __init omap2_dm_timer_init(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> arch_initcall(omap2_dm_timer_init);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * omap2_override_clocksource - clocksource override with user configuration</div><div class='add'>+ *</div><div class='add'>+ * Allows user to override default clocksource, using kernel parameter</div><div class='add'>+ *   clocksource="gp_timer"	(For all OMAP2PLUS architectures)</div><div class='add'>+ *</div><div class='add'>+ * Note that, here we are using same standard kernel parameter "clocksource=",</div><div class='add'>+ * and not introducing any OMAP specific interface.</div><div class='add'>+ */</div><div class='add'>+static int __init omap2_override_clocksource(char *str)</div><div class='add'>+{</div><div class='add'>+	if (!str)</div><div class='add'>+		return 0;</div><div class='add'>+	/*</div><div class='add'>+	 * For OMAP architecture, we only have two options</div><div class='add'>+	 *    - sync_32k (default)</div><div class='add'>+	 *    - gp_timer (sys_clk based)</div><div class='add'>+	 */</div><div class='add'>+	if (!strcmp(str, "gp_timer"))</div><div class='add'>+		use_gptimer_clksrc = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+early_param("clocksource", omap2_override_clocksource);</div><div class='head'>diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c<br/>index 7a7b89304c48..119d5a910f3a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/twl-common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/twl-common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/twl-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/twl-common.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "twl-common.h"</div><div class='ctx'> #include "pm.h"</div><div class='add'>+#include "voltage.h"</div><div class='ctx'> </div><div class='ctx'> static struct i2c_board_info __initdata pmic_i2c_board_info = {</div><div class='ctx'> 	.addr		= 0x48,</div><div class='hunk'>@@ -47,6 +48,18 @@ static struct i2c_board_info __initdata omap4_i2c1_board_info[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int twl_set_voltage(void *data, int target_uV)</div><div class='add'>+{</div><div class='add'>+	struct voltagedomain *voltdm = (struct voltagedomain *)data;</div><div class='add'>+	return voltdm_scale(voltdm, target_uV);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int twl_get_voltage(void *data)</div><div class='add'>+{</div><div class='add'>+	struct voltagedomain *voltdm = (struct voltagedomain *)data;</div><div class='add'>+	return voltdm_get_voltage(voltdm);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init omap_pmic_init(int bus, u32 clkrate,</div><div class='ctx'> 			   const char *pmic_type, int pmic_irq,</div><div class='ctx'> 			   struct twl4030_platform_data *pmic_data)</div><div class='hunk'>@@ -153,6 +166,48 @@ static struct regulator_init_data omap3_vpll2_idata = {</div><div class='ctx'> 	.consumer_supplies		= omap3_vpll2_supplies,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct regulator_consumer_supply omap3_vdd1_supply[] = {</div><div class='add'>+	REGULATOR_SUPPLY("vcc", "mpu.0"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_consumer_supply omap3_vdd2_supply[] = {</div><div class='add'>+	REGULATOR_SUPPLY("vcc", "l3_main.0"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data omap3_vdd1 = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name			= "vdd_mpu_iva",</div><div class='add'>+		.min_uV			= 600000,</div><div class='add'>+		.max_uV			= 1450000,</div><div class='add'>+		.valid_modes_mask	= REGULATOR_MODE_NORMAL,</div><div class='add'>+		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE,</div><div class='add'>+	},</div><div class='add'>+	.num_consumer_supplies		= ARRAY_SIZE(omap3_vdd1_supply),</div><div class='add'>+	.consumer_supplies		= omap3_vdd1_supply,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data omap3_vdd2 = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name			= "vdd_core",</div><div class='add'>+		.min_uV			= 600000,</div><div class='add'>+		.max_uV			= 1450000,</div><div class='add'>+		.valid_modes_mask	= REGULATOR_MODE_NORMAL,</div><div class='add'>+		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE,</div><div class='add'>+	},</div><div class='add'>+	.num_consumer_supplies		= ARRAY_SIZE(omap3_vdd2_supply),</div><div class='add'>+	.consumer_supplies		= omap3_vdd2_supply,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct twl_regulator_driver_data omap3_vdd1_drvdata = {</div><div class='add'>+	.get_voltage = twl_get_voltage,</div><div class='add'>+	.set_voltage = twl_set_voltage,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct twl_regulator_driver_data omap3_vdd2_drvdata = {</div><div class='add'>+	.get_voltage = twl_get_voltage,</div><div class='add'>+	.set_voltage = twl_set_voltage,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,</div><div class='ctx'> 				  u32 pdata_flags, u32 regulators_flags)</div><div class='ctx'> {</div><div class='hunk'>@@ -160,6 +215,16 @@ void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,</div><div class='ctx'> 		pmic_data-&gt;irq_base = TWL4030_IRQ_BASE;</div><div class='ctx'> 	if (!pmic_data-&gt;irq_end)</div><div class='ctx'> 		pmic_data-&gt;irq_end = TWL4030_IRQ_END;</div><div class='add'>+	if (!pmic_data-&gt;vdd1) {</div><div class='add'>+		omap3_vdd1.driver_data = &amp;omap3_vdd1_drvdata;</div><div class='add'>+		omap3_vdd1_drvdata.data = voltdm_lookup("mpu_iva");</div><div class='add'>+		pmic_data-&gt;vdd1 = &amp;omap3_vdd1;</div><div class='add'>+	}</div><div class='add'>+	if (!pmic_data-&gt;vdd2) {</div><div class='add'>+		omap3_vdd2.driver_data = &amp;omap3_vdd2_drvdata;</div><div class='add'>+		omap3_vdd2_drvdata.data = voltdm_lookup("core");</div><div class='add'>+		pmic_data-&gt;vdd2 = &amp;omap3_vdd2;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Common platform data configurations */</div><div class='ctx'> 	if (pdata_flags &amp; TWL_COMMON_PDATA_USB &amp;&amp; !pmic_data-&gt;usb)</div><div class='hunk'>@@ -201,6 +266,7 @@ static struct regulator_init_data omap4_vdac_idata = {</div><div class='ctx'> 		.valid_ops_mask		= REGULATOR_CHANGE_MODE</div><div class='ctx'> 					| REGULATOR_CHANGE_STATUS,</div><div class='ctx'> 	},</div><div class='add'>+	.supply_regulator	= "V2V1",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data omap4_vaux2_idata = {</div><div class='hunk'>@@ -291,6 +357,7 @@ static struct regulator_init_data omap4_vcxio_idata = {</div><div class='ctx'> 	},</div><div class='ctx'> 	.num_consumer_supplies	= ARRAY_SIZE(omap4_vcxio_supply),</div><div class='ctx'> 	.consumer_supplies	= omap4_vcxio_supply,</div><div class='add'>+	.supply_regulator	= "V2V1",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data omap4_vusb_idata = {</div><div class='hunk'>@@ -310,6 +377,105 @@ static struct regulator_init_data omap4_clk32kg_idata = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct regulator_consumer_supply omap4_vdd1_supply[] = {</div><div class='add'>+	REGULATOR_SUPPLY("vcc", "mpu.0"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_consumer_supply omap4_vdd2_supply[] = {</div><div class='add'>+	REGULATOR_SUPPLY("vcc", "iva.0"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_consumer_supply omap4_vdd3_supply[] = {</div><div class='add'>+	REGULATOR_SUPPLY("vcc", "l3_main.0"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data omap4_vdd1 = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name			= "vdd_mpu",</div><div class='add'>+		.min_uV			= 500000,</div><div class='add'>+		.max_uV			= 1500000,</div><div class='add'>+		.valid_modes_mask	= REGULATOR_MODE_NORMAL,</div><div class='add'>+		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE,</div><div class='add'>+	},</div><div class='add'>+	.num_consumer_supplies		= ARRAY_SIZE(omap4_vdd1_supply),</div><div class='add'>+	.consumer_supplies		= omap4_vdd1_supply,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data omap4_vdd2 = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name			= "vdd_iva",</div><div class='add'>+		.min_uV			= 500000,</div><div class='add'>+		.max_uV			= 1500000,</div><div class='add'>+		.valid_modes_mask	= REGULATOR_MODE_NORMAL,</div><div class='add'>+		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE,</div><div class='add'>+	},</div><div class='add'>+	.num_consumer_supplies		= ARRAY_SIZE(omap4_vdd2_supply),</div><div class='add'>+	.consumer_supplies		= omap4_vdd2_supply,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data omap4_vdd3 = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.name			= "vdd_core",</div><div class='add'>+		.min_uV			= 500000,</div><div class='add'>+		.max_uV			= 1500000,</div><div class='add'>+		.valid_modes_mask	= REGULATOR_MODE_NORMAL,</div><div class='add'>+		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE,</div><div class='add'>+	},</div><div class='add'>+	.num_consumer_supplies		= ARRAY_SIZE(omap4_vdd3_supply),</div><div class='add'>+	.consumer_supplies		= omap4_vdd3_supply,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static struct twl_regulator_driver_data omap4_vdd1_drvdata = {</div><div class='add'>+	.get_voltage = twl_get_voltage,</div><div class='add'>+	.set_voltage = twl_set_voltage,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct twl_regulator_driver_data omap4_vdd2_drvdata = {</div><div class='add'>+	.get_voltage = twl_get_voltage,</div><div class='add'>+	.set_voltage = twl_set_voltage,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct twl_regulator_driver_data omap4_vdd3_drvdata = {</div><div class='add'>+	.get_voltage = twl_get_voltage,</div><div class='add'>+	.set_voltage = twl_set_voltage,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_consumer_supply omap4_v1v8_supply[] = {</div><div class='add'>+	REGULATOR_SUPPLY("vio", "1-004b"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data omap4_v1v8_idata = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.min_uV			= 1800000,</div><div class='add'>+		.max_uV			= 1800000,</div><div class='add'>+		.valid_modes_mask	= REGULATOR_MODE_NORMAL</div><div class='add'>+					| REGULATOR_MODE_STANDBY,</div><div class='add'>+		.valid_ops_mask		= REGULATOR_CHANGE_MODE</div><div class='add'>+					| REGULATOR_CHANGE_STATUS,</div><div class='add'>+		.always_on		= true,</div><div class='add'>+	},</div><div class='add'>+	.num_consumer_supplies	= ARRAY_SIZE(omap4_v1v8_supply),</div><div class='add'>+	.consumer_supplies	= omap4_v1v8_supply,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_consumer_supply omap4_v2v1_supply[] = {</div><div class='add'>+	REGULATOR_SUPPLY("v2v1", "1-004b"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_init_data omap4_v2v1_idata = {</div><div class='add'>+	.constraints = {</div><div class='add'>+		.min_uV			= 2100000,</div><div class='add'>+		.max_uV			= 2100000,</div><div class='add'>+		.valid_modes_mask	= REGULATOR_MODE_NORMAL</div><div class='add'>+					| REGULATOR_MODE_STANDBY,</div><div class='add'>+		.valid_ops_mask		= REGULATOR_CHANGE_MODE</div><div class='add'>+					| REGULATOR_CHANGE_STATUS,</div><div class='add'>+	},</div><div class='add'>+	.num_consumer_supplies	= ARRAY_SIZE(omap4_v2v1_supply),</div><div class='add'>+	.consumer_supplies	= omap4_v2v1_supply,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,</div><div class='ctx'> 				  u32 pdata_flags, u32 regulators_flags)</div><div class='ctx'> {</div><div class='hunk'>@@ -318,6 +484,24 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,</div><div class='ctx'> 	if (!pmic_data-&gt;irq_end)</div><div class='ctx'> 		pmic_data-&gt;irq_end = TWL6030_IRQ_END;</div><div class='ctx'> </div><div class='add'>+	if (!pmic_data-&gt;vdd1) {</div><div class='add'>+		omap4_vdd1.driver_data = &amp;omap4_vdd1_drvdata;</div><div class='add'>+		omap4_vdd1_drvdata.data = voltdm_lookup("mpu");</div><div class='add'>+		pmic_data-&gt;vdd1 = &amp;omap4_vdd1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pmic_data-&gt;vdd2) {</div><div class='add'>+		omap4_vdd2.driver_data = &amp;omap4_vdd2_drvdata;</div><div class='add'>+		omap4_vdd2_drvdata.data = voltdm_lookup("iva");</div><div class='add'>+		pmic_data-&gt;vdd2 = &amp;omap4_vdd2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pmic_data-&gt;vdd3) {</div><div class='add'>+		omap4_vdd3.driver_data = &amp;omap4_vdd3_drvdata;</div><div class='add'>+		omap4_vdd3_drvdata.data = voltdm_lookup("core");</div><div class='add'>+		pmic_data-&gt;vdd3 = &amp;omap4_vdd3;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Common platform data configurations */</div><div class='ctx'> 	if (pdata_flags &amp; TWL_COMMON_PDATA_USB &amp;&amp; !pmic_data-&gt;usb)</div><div class='ctx'> 		pmic_data-&gt;usb = &amp;omap4_usb_pdata;</div><div class='hunk'>@@ -350,5 +534,11 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,</div><div class='ctx'> 	if (regulators_flags &amp; TWL_COMMON_REGULATOR_CLK32KG &amp;&amp;</div><div class='ctx'> 	    !pmic_data-&gt;clk32kg)</div><div class='ctx'> 		pmic_data-&gt;clk32kg = &amp;omap4_clk32kg_idata;</div><div class='add'>+</div><div class='add'>+	if (regulators_flags &amp; TWL_COMMON_REGULATOR_V1V8 &amp;&amp; !pmic_data-&gt;v1v8)</div><div class='add'>+		pmic_data-&gt;v1v8 = &amp;omap4_v1v8_idata;</div><div class='add'>+</div><div class='add'>+	if (regulators_flags &amp; TWL_COMMON_REGULATOR_V2V1 &amp;&amp; !pmic_data-&gt;v2v1)</div><div class='add'>+		pmic_data-&gt;v2v1 = &amp;omap4_v2v1_idata;</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_ARCH_OMAP4 */</div><div class='head'>diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h<br/>index 09627483a57f..8fe71cfd002c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/twl-common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/twl-common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/twl-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/twl-common.h</a></div><div class='hunk'>@@ -22,6 +22,8 @@</div><div class='ctx'> #define TWL_COMMON_REGULATOR_VCXIO	(1 &lt;&lt; 8)</div><div class='ctx'> #define TWL_COMMON_REGULATOR_VUSB	(1 &lt;&lt; 9)</div><div class='ctx'> #define TWL_COMMON_REGULATOR_CLK32KG	(1 &lt;&lt; 10)</div><div class='add'>+#define TWL_COMMON_REGULATOR_V1V8	(1 &lt;&lt; 11)</div><div class='add'>+#define TWL_COMMON_REGULATOR_V2V1	(1 &lt;&lt; 12)</div><div class='ctx'> </div><div class='ctx'> /* TWL4030 LDO regulators */</div><div class='ctx'> #define TWL_COMMON_REGULATOR_VPLL1	(1 &lt;&lt; 4)</div><div class='head'>diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c<br/>index 8d5ed775dd56..b19d1b43c12e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/usb-musb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/usb-musb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/usb-musb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/usb-musb.c</a></div><div class='hunk'>@@ -90,7 +90,7 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)</div><div class='ctx'> 	musb_plat.mode = board_data-&gt;mode;</div><div class='ctx'> 	musb_plat.extvbus = board_data-&gt;extvbus;</div><div class='ctx'> </div><div class='del'>-	if (cpu_is_omap3517() || cpu_is_omap3505()) {</div><div class='add'>+	if (soc_is_am35xx()) {</div><div class='ctx'> 		oh_name = "am35x_otg_hs";</div><div class='ctx'> 		name = "musb-am35x";</div><div class='ctx'> 	} else if (cpu_is_ti81xx()) {</div><div class='head'>diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c<br/>index 994d8f591a1d..db84a46ce7fd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/usb-tusb6010.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/usb-tusb6010.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/usb-tusb6010.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/usb-tusb6010.c</a></div><div class='hunk'>@@ -126,7 +126,7 @@ static int tusb_set_sync_mode(unsigned sysclk_ps, unsigned fclk_ps)</div><div class='ctx'> 	tmp = (t.sync_clk + fclk_ps - 1) / fclk_ps;</div><div class='ctx'> 	if (tmp &gt; 4)</div><div class='ctx'> 		return -ERANGE;</div><div class='del'>-	if (tmp &lt;= 0)</div><div class='add'>+	if (tmp == 0)</div><div class='ctx'> 		tmp = 1;</div><div class='ctx'> 	t.page_burst_access = (fclk_ps * tmp) / 1000;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c<br/>index a5ec7f8f2ea8..5d8eaf31569c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/vc3xxx_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/vc3xxx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/vc3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/vc3xxx_data.c</a></div><div class='hunk'>@@ -46,6 +46,7 @@ static struct omap_vc_common omap3_vc_common = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct omap_vc_channel omap3_vc_mpu = {</div><div class='add'>+	.flags = OMAP_VC_CHANNEL_DEFAULT,</div><div class='ctx'> 	.common = &amp;omap3_vc_common,</div><div class='ctx'> 	.smps_sa_reg	 = OMAP3_PRM_VC_SMPS_SA_OFFSET,</div><div class='ctx'> 	.smps_volra_reg	 = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,</div><div class='head'>diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c<br/>index 8a36342e60d2..4dc60e83e00d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/voltage.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/voltage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/voltage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/voltage.c</a></div><div class='hunk'>@@ -73,7 +73,8 @@ unsigned long voltdm_get_voltage(struct voltagedomain *voltdm)</div><div class='ctx'> int voltdm_scale(struct voltagedomain *voltdm,</div><div class='ctx'> 		 unsigned long target_volt)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, i;</div><div class='add'>+	unsigned long volt = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!voltdm || IS_ERR(voltdm)) {</div><div class='ctx'> 		pr_warning("%s: VDD specified does not exist!\n", __func__);</div><div class='hunk'>@@ -86,9 +87,23 @@ int voltdm_scale(struct voltagedomain *voltdm,</div><div class='ctx'> 		return -ENODATA;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = voltdm-&gt;scale(voltdm, target_volt);</div><div class='add'>+	/* Adjust voltage to the exact voltage from the OPP table */</div><div class='add'>+	for (i = 0; voltdm-&gt;volt_data[i].volt_nominal != 0; i++) {</div><div class='add'>+		if (voltdm-&gt;volt_data[i].volt_nominal &gt;= target_volt) {</div><div class='add'>+			volt = voltdm-&gt;volt_data[i].volt_nominal;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!volt) {</div><div class='add'>+		pr_warning("%s: not scaling. OPP voltage for %lu, not found.\n",</div><div class='add'>+			   __func__, target_volt);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = voltdm-&gt;scale(voltdm, volt);</div><div class='ctx'> 	if (!ret)</div><div class='del'>-		voltdm-&gt;nominal_volt = target_volt;</div><div class='add'>+		voltdm-&gt;nominal_volt = volt;</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c<br/>index 57db2038b23c..d0103c80d040 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/voltagedomains3xxx_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/voltagedomains3xxx_data.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/voltagedomains3xxx_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/voltagedomains3xxx_data.c</a></div><div class='hunk'>@@ -118,7 +118,7 @@ void __init omap3xxx_voltagedomains_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	if (cpu_is_omap3517() || cpu_is_omap3505())</div><div class='add'>+	if (soc_is_am35xx())</div><div class='ctx'> 		voltdms = voltagedomains_am35xx;</div><div class='ctx'> 	else</div><div class='ctx'> 		voltdms = voltagedomains_omap3;</div><div class='head'>diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c<br/>index 4067669d96c4..b2f1c67043a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/wd_timer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/wd_timer.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/wd_timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/wd_timer.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;plat/omap_hwmod.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "wd_timer.h"</div><div class='add'>+#include "common.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * In order to avoid any assumptions from bootloader regarding WDT</div><div class='hunk'>@@ -25,6 +26,8 @@</div><div class='ctx'> #define OMAP_WDT_WPS		0x34</div><div class='ctx'> #define OMAP_WDT_SPR		0x48</div><div class='ctx'> </div><div class='add'>+/* Maximum microseconds to wait for OMAP module to softreset */</div><div class='add'>+#define MAX_MODULE_SOFTRESET_WAIT	10000</div><div class='ctx'> </div><div class='ctx'> int omap2_wd_timer_disable(struct omap_hwmod *oh)</div><div class='ctx'> {</div><div class='hunk'>@@ -54,3 +57,45 @@ int omap2_wd_timer_disable(struct omap_hwmod *oh)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * omap2_wdtimer_reset - reset and disable the WDTIMER IP block</div><div class='add'>+ * @oh: struct omap_hwmod *</div><div class='add'>+ *</div><div class='add'>+ * After the WDTIMER IP blocks are reset on OMAP2/3, we must also take</div><div class='add'>+ * care to execute the special watchdog disable sequence.  This is</div><div class='add'>+ * because the watchdog is re-armed upon OCP softreset.  (On OMAP4,</div><div class='add'>+ * this behavior was apparently changed and the watchdog is no longer</div><div class='add'>+ * re-armed after an OCP soft-reset.)  Returns -ETIMEDOUT if the reset</div><div class='add'>+ * did not complete, or 0 upon success.</div><div class='add'>+ *</div><div class='add'>+ * XXX Most of this code should be moved to the omap_hwmod.c layer</div><div class='add'>+ * during a normal merge window.  omap_hwmod_softreset() should be</div><div class='add'>+ * renamed to omap_hwmod_set_ocp_softreset(), and omap_hwmod_softreset()</div><div class='add'>+ * should call the hwmod _ocp_softreset() code.</div><div class='add'>+ */</div><div class='add'>+int omap2_wd_timer_reset(struct omap_hwmod *oh)</div><div class='add'>+{</div><div class='add'>+	int c = 0;</div><div class='add'>+</div><div class='add'>+	/* Write to the SOFTRESET bit */</div><div class='add'>+	omap_hwmod_softreset(oh);</div><div class='add'>+</div><div class='add'>+	/* Poll on RESETDONE bit */</div><div class='add'>+	omap_test_timeout((omap_hwmod_read(oh,</div><div class='add'>+					   oh-&gt;class-&gt;sysc-&gt;syss_offs)</div><div class='add'>+			   &amp; SYSS_RESETDONE_MASK),</div><div class='add'>+			  MAX_MODULE_SOFTRESET_WAIT, c);</div><div class='add'>+</div><div class='add'>+	if (oh-&gt;class-&gt;sysc-&gt;srst_udelay)</div><div class='add'>+		udelay(oh-&gt;class-&gt;sysc-&gt;srst_udelay);</div><div class='add'>+</div><div class='add'>+	if (c == MAX_MODULE_SOFTRESET_WAIT)</div><div class='add'>+		pr_warning("%s: %s: softreset failed (waited %d usec)\n",</div><div class='add'>+			   __func__, oh-&gt;name, MAX_MODULE_SOFTRESET_WAIT);</div><div class='add'>+	else</div><div class='add'>+		pr_debug("%s: %s: softreset in %d usec\n", __func__,</div><div class='add'>+			 oh-&gt;name, c);</div><div class='add'>+</div><div class='add'>+	return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT :</div><div class='add'>+		omap2_wd_timer_disable(oh);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-omap2/wd_timer.h b/arch/arm/mach-omap2/wd_timer.h<br/>index e0054a2d5505..f6bbba73b535 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-omap2/wd_timer.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-omap2/wd_timer.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-omap2/wd_timer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-omap2/wd_timer.h</a></div><div class='hunk'>@@ -13,5 +13,6 @@</div><div class='ctx'> #include &lt;plat/omap_hwmod.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern int omap2_wd_timer_disable(struct omap_hwmod *oh);</div><div class='add'>+extern int omap2_wd_timer_reset(struct omap_hwmod *oh);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig<br/>index 6604fc6ca58a..0673f0c10432 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/Kconfig</a></div><div class='hunk'>@@ -86,7 +86,6 @@ config MACH_WRT350N_V2</div><div class='ctx'> </div><div class='ctx'> config MACH_TS78XX</div><div class='ctx'> 	bool "Technologic Systems TS-78xx"</div><div class='del'>-	select PM</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say 'Y' here if you want your kernel to support the</div><div class='ctx'> 	  Technologic Systems TS-78xx platform.</div><div class='head'>diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c<br/>index 3638e5c12b7e..eaac83d1df6f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/addr-map.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/addr-map.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/addr-map.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/addr-map.c</a></div><div class='hunk'>@@ -76,7 +76,7 @@ static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,</div><div class='ctx'> /*</div><div class='ctx'>  * Description of the windows needed by the platform code</div><div class='ctx'>  */</div><div class='del'>-static struct __initdata orion_addr_map_cfg addr_map_cfg = {</div><div class='add'>+static struct orion_addr_map_cfg addr_map_cfg __initdata = {</div><div class='ctx'> 	.num_wins = 8,</div><div class='ctx'> 	.cpu_win_can_remap = cpu_win_can_remap,</div><div class='ctx'> 	.bridge_virt_base = ORION5X_BRIDGE_VIRT_BASE,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c<br/>index 24481666d2cd..9148b229d0de 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/common.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/mv643xx_i2c.h&gt;</div><div class='ctx'> #include &lt;linux/ata_platform.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='ctx'> #include &lt;net/dsa.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='hunk'>@@ -70,6 +71,19 @@ void __init orion5x_map_io(void)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='add'>+ * CLK tree</div><div class='add'>+ ****************************************************************************/</div><div class='add'>+static struct clk *tclk;</div><div class='add'>+</div><div class='add'>+static void __init clk_init(void)</div><div class='add'>+{</div><div class='add'>+	tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,</div><div class='add'>+				       orion5x_tclk);</div><div class='add'>+</div><div class='add'>+	orion_clkdev_init(tclk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*****************************************************************************</div><div class='ctx'>  * EHCI0</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init orion5x_ehci0_init(void)</div><div class='hunk'>@@ -95,7 +109,7 @@ void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)</div><div class='ctx'> {</div><div class='ctx'> 	orion_ge00_init(eth_data,</div><div class='ctx'> 			ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,</div><div class='del'>-			IRQ_ORION5X_ETH_ERR, orion5x_tclk);</div><div class='add'>+			IRQ_ORION5X_ETH_ERR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -132,7 +146,7 @@ void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init orion5x_spi_init()</div><div class='ctx'> {</div><div class='del'>-	orion_spi_init(SPI_PHYS_BASE, orion5x_tclk);</div><div class='add'>+	orion_spi_init(SPI_PHYS_BASE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -142,7 +156,7 @@ void __init orion5x_spi_init()</div><div class='ctx'> void __init orion5x_uart0_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,</div><div class='del'>-			 IRQ_ORION5X_UART0, orion5x_tclk);</div><div class='add'>+			 IRQ_ORION5X_UART0, tclk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -151,7 +165,7 @@ void __init orion5x_uart0_init(void)</div><div class='ctx'> void __init orion5x_uart1_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,</div><div class='del'>-			 IRQ_ORION5X_UART1, orion5x_tclk);</div><div class='add'>+			 IRQ_ORION5X_UART1, tclk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -179,7 +193,7 @@ static void __init orion5x_crypto_init(void)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> void __init orion5x_wdt_init(void)</div><div class='ctx'> {</div><div class='del'>-	orion_wdt_init(orion5x_tclk);</div><div class='add'>+	orion_wdt_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -205,7 +219,7 @@ int __init orion5x_find_tclk(void)</div><div class='ctx'> 	return 166666667;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void orion5x_timer_init(void)</div><div class='add'>+static void __init orion5x_timer_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	orion5x_tclk = orion5x_find_tclk();</div><div class='ctx'> </div><div class='hunk'>@@ -276,6 +290,9 @@ void __init orion5x_init(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	orion5x_setup_cpu_mbus_bridge();</div><div class='ctx'> </div><div class='add'>+	/* Setup root of clk tree */</div><div class='add'>+	clk_init();</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Don't issue "Wait for Interrupt" instruction if we are</div><div class='ctx'> 	 * running on D0 5281 silicon.</div><div class='head'>diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h<br/>index 2e6454c8d4ba..31bab92ce038 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/common.h</a></div><div class='hunk'>@@ -45,6 +45,7 @@ void orion5x_restart(char, const char *);</div><div class='ctx'>  */</div><div class='ctx'> struct pci_bus;</div><div class='ctx'> struct pci_sys_data;</div><div class='add'>+struct pci_dev;</div><div class='ctx'> </div><div class='ctx'> void orion5x_pcie_id(u32 *dev, u32 *rev);</div><div class='ctx'> void orion5x_pci_disable(void);</div><div class='head'>diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c<br/>index e52108c9aaea..49a3fd630313 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/db88f5281-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/db88f5281-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/db88f5281-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/db88f5281-setup.c</a></div><div class='hunk'>@@ -265,7 +265,6 @@ static int __init db88f5281_pci_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> static struct hw_pci db88f5281_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 2,</div><div class='ctx'> 	.preinit	= db88f5281_pci_preinit,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan		= orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq	= db88f5281_pci_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c<br/>index c3ed15b8ea25..d470864b4e42 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/dns323-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/dns323-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/dns323-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/dns323-setup.c</a></div><div class='hunk'>@@ -86,7 +86,6 @@ static int __init dns323_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci dns323_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 2,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan		= orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq	= dns323_pci_map_irq,</div><div class='hunk'>@@ -253,27 +252,6 @@ error_fail:</div><div class='ctx'>  * GPIO LEDs (simple - doesn't use hardware blinking support)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define ORION_BLINK_HALF_PERIOD 100 /* ms */</div><div class='del'>-</div><div class='del'>-static int dns323_gpio_blink_set(unsigned gpio, int state,</div><div class='del'>-	unsigned long *delay_on, unsigned long *delay_off)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	if (delay_on &amp;&amp; delay_off &amp;&amp; !*delay_on &amp;&amp; !*delay_off)</div><div class='del'>-		*delay_on = *delay_off = ORION_BLINK_HALF_PERIOD;</div><div class='del'>-</div><div class='del'>-	switch(state) {</div><div class='del'>-	case GPIO_LED_NO_BLINK_LOW:</div><div class='del'>-	case GPIO_LED_NO_BLINK_HIGH:</div><div class='del'>-		orion_gpio_set_blink(gpio, 0);</div><div class='del'>-		gpio_set_value(gpio, state);</div><div class='del'>-		break;</div><div class='del'>-	case GPIO_LED_BLINK:</div><div class='del'>-		orion_gpio_set_blink(gpio, 1);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct gpio_led dns323ab_leds[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "power:blue",</div><div class='hunk'>@@ -312,13 +290,13 @@ static struct gpio_led dns323c_leds[] = {</div><div class='ctx'> static struct gpio_led_platform_data dns323ab_led_data = {</div><div class='ctx'> 	.num_leds	= ARRAY_SIZE(dns323ab_leds),</div><div class='ctx'> 	.leds		= dns323ab_leds,</div><div class='del'>-	.gpio_blink_set = dns323_gpio_blink_set,</div><div class='add'>+	.gpio_blink_set = orion_gpio_led_blink_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct gpio_led_platform_data dns323c_led_data = {</div><div class='ctx'> 	.num_leds	= ARRAY_SIZE(dns323c_leds),</div><div class='ctx'> 	.leds		= dns323c_leds,</div><div class='del'>-	.gpio_blink_set = dns323_gpio_blink_set,</div><div class='add'>+	.gpio_blink_set = orion_gpio_led_blink_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device dns323_gpio_leds = {</div><div class='head'>diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c<br/>index 47587b832842..1e458efafb9a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/kurobox_pro-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/kurobox_pro-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/kurobox_pro-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/kurobox_pro-setup.c</a></div><div class='hunk'>@@ -138,7 +138,6 @@ static int __init kurobox_pro_pci_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci kurobox_pro_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 2,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan		= orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq	= kurobox_pro_pci_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/mpp.h b/arch/arm/mach-orion5x/mpp.h<br/>index eac68978a2c2..db70e79a1198 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/mpp.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/mpp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/mpp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/mpp.h</a></div><div class='hunk'>@@ -65,8 +65,8 @@</div><div class='ctx'> #define MPP8_GIGE               MPP(8,  0x1, 0, 0, 1,   1,   1)</div><div class='ctx'> </div><div class='ctx'> #define MPP9_UNUSED		MPP(9,  0x0, 0, 0, 1,   1,   1)</div><div class='del'>-#define MPP9_GPIO		MPP(9,  0x0, 0, 0, 1,   1,   1)</div><div class='del'>-#define MPP9_GIGE               MPP(9,  0x1, 1, 1, 1,   1,   1)</div><div class='add'>+#define MPP9_GPIO		MPP(9,  0x0, 1, 1, 1,   1,   1)</div><div class='add'>+#define MPP9_GIGE               MPP(9,  0x1, 0, 0, 1,   1,   1)</div><div class='ctx'> </div><div class='ctx'> #define MPP10_UNUSED		MPP(10, 0x0, 0, 0, 1,   1,   1)</div><div class='ctx'> #define MPP10_GPIO		MPP(10, 0x0, 1, 1, 1,   1,   1)</div><div class='head'>diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c<br/>index 65faaa34de61..1c16d045333e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/mss2-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/mss2-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/mss2-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/mss2-setup.c</a></div><div class='hunk'>@@ -89,7 +89,6 @@ static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci mss2_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 2,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan		= orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq	= mss2_pci_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c<br/>index 292038fc59fd..78a6a11d8216 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c</a></div><div class='hunk'>@@ -149,7 +149,6 @@ rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci rd88f5181l_fxo_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 2,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan		= orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq	= rd88f5181l_fxo_pci_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c<br/>index c44eabaabc16..2f5dc54cd4cd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/rd88f5181l-ge-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/rd88f5181l-ge-setup.c</a></div><div class='hunk'>@@ -161,7 +161,6 @@ rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci rd88f5181l_ge_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 2,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan		= orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq	= rd88f5181l_ge_pci_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c<br/>index e3ce61711478..399130fac0b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/rd88f5182-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/rd88f5182-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/rd88f5182-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/rd88f5182-setup.c</a></div><div class='hunk'>@@ -200,7 +200,6 @@ static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> static struct hw_pci rd88f5182_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 2,</div><div class='ctx'> 	.preinit	= rd88f5182_pci_preinit,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan		= orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq	= rd88f5182_pci_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c<br/>index 2c5fab00d205..92df49c1b62a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c</a></div><div class='hunk'>@@ -16,7 +16,6 @@</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='ctx'> #include &lt;linux/mv643xx_eth.h&gt;</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='del'>-#include &lt;linux/spi/orion_spi.h&gt;</div><div class='ctx'> #include &lt;linux/spi/flash.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;net/dsa.h&gt;</div><div class='hunk'>@@ -102,7 +101,6 @@ static void __init rd88f6183ap_ge_init(void)</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci rd88f6183ap_ge_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 2,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan		= orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq	= orion5x_pci_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c<br/>index 632a861ef82b..90e571dc4deb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/terastation_pro2-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/terastation_pro2-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/terastation_pro2-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/terastation_pro2-setup.c</a></div><div class='hunk'>@@ -122,7 +122,6 @@ static int __init tsp2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> static struct hw_pci tsp2_pci __initdata = {</div><div class='ctx'> 	.nr_controllers = 2,</div><div class='ctx'> 	.preinit        = tsp2_pci_preinit,</div><div class='del'>-	.swizzle        = pci_std_swizzle,</div><div class='ctx'> 	.setup          = orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan           = orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq        = tsp2_pci_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c<br/>index 5d6408745582..b184f680e0db 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/ts209-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/ts209-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/ts209-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/ts209-setup.c</a></div><div class='hunk'>@@ -170,7 +170,6 @@ static int __init qnap_ts209_pci_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> static struct hw_pci qnap_ts209_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 2,</div><div class='ctx'> 	.preinit	= qnap_ts209_pci_preinit,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan		= orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq	= qnap_ts209_pci_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c<br/>index 4e6ff759cd32..a5c2e64c4ece 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/ts409-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/ts409-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/ts409-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/ts409-setup.c</a></div><div class='hunk'>@@ -140,7 +140,6 @@ static int __init qnap_ts409_pci_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci qnap_ts409_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 2,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan		= orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq	= qnap_ts409_pci_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/ts78xx-fpga.h b/arch/arm/mach-orion5x/ts78xx-fpga.h<br/>index 151e89e1e676..97c393d39ae2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/ts78xx-fpga.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/ts78xx-fpga.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/ts78xx-fpga.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/ts78xx-fpga.h</a></div><div class='hunk'>@@ -28,9 +28,9 @@ struct fpga_device {</div><div class='ctx'> </div><div class='ctx'> struct fpga_devices {</div><div class='ctx'> 	/* Technologic Systems */</div><div class='del'>-	struct fpga_device 	ts_rtc;</div><div class='del'>-	struct fpga_device 	ts_nand;</div><div class='del'>-	struct fpga_device 	ts_rng;</div><div class='add'>+	struct fpga_device	ts_rtc;</div><div class='add'>+	struct fpga_device	ts_nand;</div><div class='add'>+	struct fpga_device	ts_rng;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ts78xx_fpga_data {</div><div class='head'>diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c<br/>index c96f37472eda..b4203277f3cd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/ts78xx-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/ts78xx-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/ts78xx-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/ts78xx-setup.c</a></div><div class='hunk'>@@ -8,6 +8,8 @@</div><div class='ctx'>  * warranty of any kind, whether express or implied.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/sysfs.h&gt;</div><div class='hunk'>@@ -115,7 +117,7 @@ static struct platform_device ts78xx_ts_rtc_device = {</div><div class='ctx'>  * I've used the method TS use in their rtc7800.c example for the detection</div><div class='ctx'>  *</div><div class='ctx'>  * TODO: track down a guinea pig without an RTC to see if we can work out a</div><div class='del'>- * 		better RTC detection routine</div><div class='add'>+ *		better RTC detection routine</div><div class='ctx'>  */</div><div class='ctx'> static int ts78xx_ts_rtc_load(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -141,10 +143,14 @@ static int ts78xx_ts_rtc_load(void)</div><div class='ctx'> 			} else</div><div class='ctx'> 				rc = platform_device_add(&amp;ts78xx_ts_rtc_device);</div><div class='ctx'> </div><div class='add'>+			if (rc)</div><div class='add'>+				pr_info("RTC could not be registered: %d\n",</div><div class='add'>+					rc);</div><div class='ctx'> 			return rc;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	pr_info("RTC not found\n");</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -245,8 +251,6 @@ static void ts78xx_ts_nand_read_buf(struct mtd_info *mtd,</div><div class='ctx'> 		readsb(io_base, buf, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-const char *ts_nand_part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> static struct mtd_partition ts78xx_ts_nand_parts[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name		= "mbr",</div><div class='hunk'>@@ -271,7 +275,6 @@ static struct mtd_partition ts78xx_ts_nand_parts[] = {</div><div class='ctx'> static struct platform_nand_data ts78xx_ts_nand_data = {</div><div class='ctx'> 	.chip	= {</div><div class='ctx'> 		.nr_chips		= 1,</div><div class='del'>-		.part_probe_types	= ts_nand_part_probes,</div><div class='ctx'> 		.partitions		= ts78xx_ts_nand_parts,</div><div class='ctx'> 		.nr_partitions		= ARRAY_SIZE(ts78xx_ts_nand_parts),</div><div class='ctx'> 		.chip_delay		= 15,</div><div class='hunk'>@@ -292,11 +295,8 @@ static struct platform_nand_data ts78xx_ts_nand_data = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct resource ts78xx_ts_nand_resources = {</div><div class='del'>-	.start		= TS_NAND_DATA,</div><div class='del'>-	.end		= TS_NAND_DATA + 4,</div><div class='del'>-	.flags		= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='add'>+static struct resource ts78xx_ts_nand_resources</div><div class='add'>+			= DEFINE_RES_MEM(TS_NAND_DATA, 4);</div><div class='ctx'> </div><div class='ctx'> static struct platform_device ts78xx_ts_nand_device = {</div><div class='ctx'> 	.name		= "gen_nand",</div><div class='hunk'>@@ -319,6 +319,8 @@ static int ts78xx_ts_nand_load(void)</div><div class='ctx'> 	} else</div><div class='ctx'> 		rc = platform_device_add(&amp;ts78xx_ts_nand_device);</div><div class='ctx'> </div><div class='add'>+	if (rc)</div><div class='add'>+		pr_info("NAND could not be registered: %d\n", rc);</div><div class='ctx'> 	return rc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -332,11 +334,8 @@ static void ts78xx_ts_nand_unload(void)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> #define TS_RNG_DATA	(TS78XX_FPGA_REGS_PHYS_BASE | 0x044)</div><div class='ctx'> </div><div class='del'>-static struct resource ts78xx_ts_rng_resource = {</div><div class='del'>-	.flags		= IORESOURCE_MEM,</div><div class='del'>-	.start		= TS_RNG_DATA,</div><div class='del'>-	.end		= TS_RNG_DATA + 4 - 1,</div><div class='del'>-};</div><div class='add'>+static struct resource ts78xx_ts_rng_resource</div><div class='add'>+			= DEFINE_RES_MEM(TS_RNG_DATA, 4);</div><div class='ctx'> </div><div class='ctx'> static struct timeriomem_rng_data ts78xx_ts_rng_data = {</div><div class='ctx'> 	.period		= 1000000, /* one second */</div><div class='hunk'>@@ -363,6 +362,8 @@ static int ts78xx_ts_rng_load(void)</div><div class='ctx'> 	} else</div><div class='ctx'> 		rc = platform_device_add(&amp;ts78xx_ts_rng_device);</div><div class='ctx'> </div><div class='add'>+	if (rc)</div><div class='add'>+		pr_info("RNG could not be registered: %d\n", rc);</div><div class='ctx'> 	return rc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -402,7 +403,7 @@ static void ts78xx_fpga_supports(void)</div><div class='ctx'> 		/* enable devices if magic matches */</div><div class='ctx'> 		switch ((ts78xx_fpga.id &gt;&gt; 8) &amp; 0xffffff) {</div><div class='ctx'> 		case TS7800_FPGA_MAGIC:</div><div class='del'>-			pr_warning("TS-7800 FPGA: unrecognized revision 0x%.2x\n",</div><div class='add'>+			pr_warning("unrecognised FPGA revision 0x%.2x\n",</div><div class='ctx'> 					ts78xx_fpga.id &amp; 0xff);</div><div class='ctx'> 			ts78xx_fpga.supports.ts_rtc.present = 1;</div><div class='ctx'> 			ts78xx_fpga.supports.ts_nand.present = 1;</div><div class='hunk'>@@ -422,26 +423,20 @@ static int ts78xx_fpga_load_devices(void)</div><div class='ctx'> </div><div class='ctx'> 	if (ts78xx_fpga.supports.ts_rtc.present == 1) {</div><div class='ctx'> 		tmp = ts78xx_ts_rtc_load();</div><div class='del'>-		if (tmp) {</div><div class='del'>-			pr_info("TS-78xx: RTC not registered\n");</div><div class='add'>+		if (tmp)</div><div class='ctx'> 			ts78xx_fpga.supports.ts_rtc.present = 0;</div><div class='del'>-		}</div><div class='ctx'> 		ret |= tmp;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ts78xx_fpga.supports.ts_nand.present == 1) {</div><div class='ctx'> 		tmp = ts78xx_ts_nand_load();</div><div class='del'>-		if (tmp) {</div><div class='del'>-			pr_info("TS-78xx: NAND not registered\n");</div><div class='add'>+		if (tmp)</div><div class='ctx'> 			ts78xx_fpga.supports.ts_nand.present = 0;</div><div class='del'>-		}</div><div class='ctx'> 		ret |= tmp;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ts78xx_fpga.supports.ts_rng.present == 1) {</div><div class='ctx'> 		tmp = ts78xx_ts_rng_load();</div><div class='del'>-		if (tmp) {</div><div class='del'>-			pr_info("TS-78xx: RNG not registered\n");</div><div class='add'>+		if (tmp)</div><div class='ctx'> 			ts78xx_fpga.supports.ts_rng.present = 0;</div><div class='del'>-		}</div><div class='ctx'> 		ret |= tmp;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -466,7 +461,7 @@ static int ts78xx_fpga_load(void)</div><div class='ctx'> {</div><div class='ctx'> 	ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE);</div><div class='ctx'> </div><div class='del'>-	pr_info("TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n",</div><div class='add'>+	pr_info("FPGA magic=0x%.6x, rev=0x%.2x\n",</div><div class='ctx'> 			(ts78xx_fpga.id &gt;&gt; 8) &amp; 0xffffff,</div><div class='ctx'> 			ts78xx_fpga.id &amp; 0xff);</div><div class='ctx'> </div><div class='hunk'>@@ -494,7 +489,7 @@ static int ts78xx_fpga_unload(void)</div><div class='ctx'> 	 * UrJTAG SVN since r1381 can be used to reprogram the FPGA</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (ts78xx_fpga.id != fpga_id) {</div><div class='del'>-		pr_err("TS-78xx FPGA: magic/rev mismatch\n"</div><div class='add'>+		pr_err("FPGA magic/rev mismatch\n"</div><div class='ctx'> 			"TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n",</div><div class='ctx'> 			(ts78xx_fpga.id &gt;&gt; 8) &amp; 0xffffff, ts78xx_fpga.id &amp; 0xff,</div><div class='ctx'> 			(fpga_id &gt;&gt; 8) &amp; 0xffffff, fpga_id &amp; 0xff);</div><div class='hunk'>@@ -525,7 +520,7 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj,</div><div class='ctx'> 	int value, ret;</div><div class='ctx'> </div><div class='ctx'> 	if (ts78xx_fpga.state &lt; 0) {</div><div class='del'>-		pr_err("TS-78xx FPGA: borked, you must powercycle asap\n");</div><div class='add'>+		pr_err("FPGA borked, you must powercycle ASAP\n");</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -533,10 +528,8 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj,</div><div class='ctx'> 		value = 1;</div><div class='ctx'> 	else if (strncmp(buf, "offline", sizeof("offline") - 1) == 0)</div><div class='ctx'> 		value = 0;</div><div class='del'>-	else {</div><div class='del'>-		pr_err("ts78xx_fpga_store: Invalid value\n");</div><div class='add'>+	else</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (ts78xx_fpga.state == value)</div><div class='ctx'> 		return n;</div><div class='hunk'>@@ -614,7 +607,7 @@ static void __init ts78xx_init(void)</div><div class='ctx'> 	/* FPGA init */</div><div class='ctx'> 	ts78xx_fpga_devices_zero_init();</div><div class='ctx'> 	ret = ts78xx_fpga_load();</div><div class='del'>-	ret = sysfs_create_file(power_kobj, &amp;ts78xx_fpga_attr.attr);</div><div class='add'>+	ret = sysfs_create_file(firmware_kobj, &amp;ts78xx_fpga_attr.attr);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		pr_err("sysfs_create_file failed: %d\n", ret);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c<br/>index 078c03f7cd52..754c12b6abf0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/wnr854t-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/wnr854t-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/wnr854t-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/wnr854t-setup.c</a></div><div class='hunk'>@@ -155,7 +155,6 @@ static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci wnr854t_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 2,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan		= orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq	= wnr854t_pci_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c<br/>index 46a9778171ce..45c21251eb1e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-orion5x/wrt350n-v2-setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-orion5x/wrt350n-v2-setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-orion5x/wrt350n-v2-setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-orion5x/wrt350n-v2-setup.c</a></div><div class='hunk'>@@ -243,7 +243,6 @@ static int __init wrt350n_v2_pci_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci wrt350n_v2_pci __initdata = {</div><div class='ctx'> 	.nr_controllers	= 2,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.setup		= orion5x_pci_sys_setup,</div><div class='ctx'> 	.scan		= orion5x_pci_sys_scan_bus,</div><div class='ctx'> 	.map_irq	= wrt350n_v2_pci_map_irq,</div><div class='head'>diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c<br/>index be4c92858509..a00d2f1254ed 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pnx4008/core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pnx4008/core.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pnx4008/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pnx4008/core.c</a></div><div class='hunk'>@@ -265,6 +265,17 @@ static void pnx4008_restart(char mode, const char *cmd)</div><div class='ctx'> 	soft_restart(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+extern int pnx4008_pm_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int pnx4008_pm_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void __init pnx4008_init_late(void)</div><div class='add'>+{</div><div class='add'>+	pnx4008_pm_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> extern struct sys_timer pnx4008_timer;</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(PNX4008, "Philips PNX4008")</div><div class='hunk'>@@ -273,6 +284,7 @@ MACHINE_START(PNX4008, "Philips PNX4008")</div><div class='ctx'> 	.map_io 		= pnx4008_map_io,</div><div class='ctx'> 	.init_irq 		= pnx4008_init_irq,</div><div class='ctx'> 	.init_machine 		= pnx4008_init,</div><div class='add'>+	.init_late		= pnx4008_init_late,</div><div class='ctx'> 	.timer 			= &amp;pnx4008_timer,</div><div class='ctx'> 	.restart		= pnx4008_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-pnx4008/i2c.c b/arch/arm/mach-pnx4008/i2c.c<br/>index 8103f9644e2d..550cfc2a1f2e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pnx4008/i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pnx4008/i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pnx4008/i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pnx4008/i2c.c</a></div><div class='hunk'>@@ -16,48 +16,62 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;mach/platform.h&gt;</div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='del'>-#include &lt;mach/i2c.h&gt;</div><div class='ctx'> </div><div class='del'>-static struct i2c_pnx_data i2c0_data = {</div><div class='del'>-	.name = I2C_CHIP_NAME "0",</div><div class='del'>-	.base = PNX4008_I2C1_BASE,</div><div class='del'>-	.irq = I2C_1_INT,</div><div class='add'>+static struct resource i2c0_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = PNX4008_I2C1_BASE,</div><div class='add'>+		.end = PNX4008_I2C1_BASE + SZ_4K - 1,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	}, {</div><div class='add'>+		.start = I2C_1_INT,</div><div class='add'>+		.end = I2C_1_INT,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_pnx_data i2c1_data = {</div><div class='del'>-	.name = I2C_CHIP_NAME "1",</div><div class='del'>-	.base = PNX4008_I2C2_BASE,</div><div class='del'>-	.irq = I2C_2_INT,</div><div class='add'>+static struct resource i2c1_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = PNX4008_I2C2_BASE,</div><div class='add'>+		.end = PNX4008_I2C2_BASE + SZ_4K - 1,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	}, {</div><div class='add'>+		.start = I2C_2_INT,</div><div class='add'>+		.end = I2C_2_INT,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_pnx_data i2c2_data = {</div><div class='del'>-	.name = "USB-I2C",</div><div class='del'>-	.base = (PNX4008_USB_CONFIG_BASE + 0x300),</div><div class='del'>-	.irq = USB_I2C_INT,</div><div class='add'>+static struct resource i2c2_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = PNX4008_USB_CONFIG_BASE + 0x300,</div><div class='add'>+		.end = PNX4008_USB_CONFIG_BASE + 0x300 + SZ_4K - 1,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	}, {</div><div class='add'>+		.start = USB_I2C_INT,</div><div class='add'>+		.end = USB_I2C_INT,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device i2c0_device = {</div><div class='del'>-	.name = "pnx-i2c",</div><div class='add'>+	.name = "pnx-i2c.0",</div><div class='ctx'> 	.id = 0,</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = &amp;i2c0_data,</div><div class='del'>-	},</div><div class='add'>+	.resource = i2c0_resources,</div><div class='add'>+	.num_resources = ARRAY_SIZE(i2c0_resources),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device i2c1_device = {</div><div class='del'>-	.name = "pnx-i2c",</div><div class='add'>+	.name = "pnx-i2c.1",</div><div class='ctx'> 	.id = 1,</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = &amp;i2c1_data,</div><div class='del'>-	},</div><div class='add'>+	.resource = i2c1_resources,</div><div class='add'>+	.num_resources = ARRAY_SIZE(i2c1_resources),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device i2c2_device = {</div><div class='del'>-	.name = "pnx-i2c",</div><div class='add'>+	.name = "pnx-i2c.2",</div><div class='ctx'> 	.id = 2,</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = &amp;i2c2_data,</div><div class='del'>-	},</div><div class='add'>+	.resource = i2c2_resources,</div><div class='add'>+	.num_resources = ARRAY_SIZE(i2c2_resources),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device *devices[] __initdata = {</div><div class='head'>diff --git a/arch/arm/mach-pnx4008/include/mach/i2c.h b/arch/arm/mach-pnx4008/include/mach/i2c.h<br/>deleted file mode 100644<br/>index 259ac53abf40..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pnx4008/include/mach/i2c.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pnx4008/include/mach/i2c.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,64 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * PNX4008-specific tweaks for I2C IP3204 block</div><div class='del'>- *</div><div class='del'>- * Author: Vitaly Wool &lt;vwool@ru.mvista.com&gt;</div><div class='del'>- *</div><div class='del'>- * 2005 (c) MontaVista Software, Inc. This file is licensed under</div><div class='del'>- * the terms of the GNU General Public License version 2. This program</div><div class='del'>- * is licensed "as is" without any warranty of any kind, whether express</div><div class='del'>- * or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_ARCH_I2C_H__</div><div class='del'>-#define __ASM_ARCH_I2C_H__</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	mstatus_tdi = 0x00000001,</div><div class='del'>-	mstatus_afi = 0x00000002,</div><div class='del'>-	mstatus_nai = 0x00000004,</div><div class='del'>-	mstatus_drmi = 0x00000008,</div><div class='del'>-	mstatus_active = 0x00000020,</div><div class='del'>-	mstatus_scl = 0x00000040,</div><div class='del'>-	mstatus_sda = 0x00000080,</div><div class='del'>-	mstatus_rff = 0x00000100,</div><div class='del'>-	mstatus_rfe = 0x00000200,</div><div class='del'>-	mstatus_tff = 0x00000400,</div><div class='del'>-	mstatus_tfe = 0x00000800,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	mcntrl_tdie = 0x00000001,</div><div class='del'>-	mcntrl_afie = 0x00000002,</div><div class='del'>-	mcntrl_naie = 0x00000004,</div><div class='del'>-	mcntrl_drmie = 0x00000008,</div><div class='del'>-	mcntrl_daie = 0x00000020,</div><div class='del'>-	mcntrl_rffie = 0x00000040,</div><div class='del'>-	mcntrl_tffie = 0x00000080,</div><div class='del'>-	mcntrl_reset = 0x00000100,</div><div class='del'>-	mcntrl_cdbmode = 0x00000400,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	rw_bit = 1 &lt;&lt; 0,</div><div class='del'>-	start_bit = 1 &lt;&lt; 8,</div><div class='del'>-	stop_bit = 1 &lt;&lt; 9,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define I2C_REG_RX(a)	((a)-&gt;ioaddr)		/* Rx FIFO reg (RO) */</div><div class='del'>-#define I2C_REG_TX(a)	((a)-&gt;ioaddr)		/* Tx FIFO reg (WO) */</div><div class='del'>-#define I2C_REG_STS(a)	((a)-&gt;ioaddr + 0x04)	/* Status reg (RO) */</div><div class='del'>-#define I2C_REG_CTL(a)	((a)-&gt;ioaddr + 0x08)	/* Ctl reg */</div><div class='del'>-#define I2C_REG_CKL(a)	((a)-&gt;ioaddr + 0x0c)	/* Clock divider low */</div><div class='del'>-#define I2C_REG_CKH(a)	((a)-&gt;ioaddr + 0x10)	/* Clock divider high */</div><div class='del'>-#define I2C_REG_ADR(a)	((a)-&gt;ioaddr + 0x14)	/* I2C address */</div><div class='del'>-#define I2C_REG_RFL(a)	((a)-&gt;ioaddr + 0x18)	/* Rx FIFO level (RO) */</div><div class='del'>-#define I2C_REG_TFL(a)	((a)-&gt;ioaddr + 0x1c)	/* Tx FIFO level (RO) */</div><div class='del'>-#define I2C_REG_RXB(a)	((a)-&gt;ioaddr + 0x20)	/* Num of bytes Rx-ed (RO) */</div><div class='del'>-#define I2C_REG_TXB(a)	((a)-&gt;ioaddr + 0x24)	/* Num of bytes Tx-ed (RO) */</div><div class='del'>-#define I2C_REG_TXS(a)	((a)-&gt;ioaddr + 0x28)	/* Tx slave FIFO (RO) */</div><div class='del'>-#define I2C_REG_STFL(a)	((a)-&gt;ioaddr + 0x2c)	/* Tx slave FIFO level (RO) */</div><div class='del'>-</div><div class='del'>-#define HCLK_MHZ		13</div><div class='del'>-#define I2C_CHIP_NAME		"PNX4008-I2C"</div><div class='del'>-</div><div class='del'>-#endif				/* __ASM_ARCH_I2C_H___ */</div><div class='head'>diff --git a/arch/arm/mach-pnx4008/pm.c b/arch/arm/mach-pnx4008/pm.c<br/>index f3e60a049f98..26f8d06b142a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pnx4008/pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pnx4008/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pnx4008/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pnx4008/pm.c</a></div><div class='hunk'>@@ -124,7 +124,7 @@ static const struct platform_suspend_ops pnx4008_pm_ops = {</div><div class='ctx'> 	.valid = pnx4008_pm_valid,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init pnx4008_pm_init(void)</div><div class='add'>+int __init pnx4008_pm_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 sram_size_to_allocate;</div><div class='ctx'> </div><div class='hunk'>@@ -151,5 +151,3 @@ static int __init pnx4008_pm_init(void)</div><div class='ctx'> 	suspend_set_ops(&amp;pnx4008_pm_ops);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-late_initcall(pnx4008_pm_init);</div><div class='head'>diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h<br/>index b28a930d4f8a..60d826fc2185 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-prima2/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-prima2/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-prima2/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-prima2/common.h</a></div><div class='hunk'>@@ -24,4 +24,10 @@ static inline void sirfsoc_map_lluart(void)  {}</div><div class='ctx'> extern void __init sirfsoc_map_lluart(void);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_SUSPEND</div><div class='add'>+extern int sirfsoc_pm_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int sirfsoc_pm_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c<br/>index 37c2de9b6f26..a7b9415d30f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-prima2/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-prima2/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-prima2/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-prima2/irq.c</a></div><div class='hunk'>@@ -42,7 +42,8 @@ sirfsoc_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)</div><div class='ctx'> static __init void sirfsoc_irq_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	sirfsoc_alloc_gc(sirfsoc_intc_base, 0, 32);</div><div class='del'>-	sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32, SIRFSOC_INTENAL_IRQ_END - 32);</div><div class='add'>+	sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32,</div><div class='add'>+			SIRFSOC_INTENAL_IRQ_END + 1 - 32);</div><div class='ctx'> </div><div class='ctx'> 	writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL0);</div><div class='ctx'> 	writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL1);</div><div class='hunk'>@@ -68,7 +69,8 @@ void __init sirfsoc_of_irq_init(void)</div><div class='ctx'> 	if (!sirfsoc_intc_base)</div><div class='ctx'> 		panic("unable to map intc cpu registers\n");</div><div class='ctx'> </div><div class='del'>-	irq_domain_add_legacy(np, 32, 0, 0, &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+	irq_domain_add_legacy(np, SIRFSOC_INTENAL_IRQ_END + 1, 0, 0,</div><div class='add'>+		&amp;irq_domain_simple_ops, NULL);</div><div class='ctx'> </div><div class='ctx'> 	of_node_put(np);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c<br/>index 26ebb57719df..fb5a7910af35 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-prima2/pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-prima2/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-prima2/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-prima2/pm.c</a></div><div class='hunk'>@@ -85,12 +85,11 @@ static const struct platform_suspend_ops sirfsoc_pm_ops = {</div><div class='ctx'> 	.valid = suspend_valid_only_mem,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init sirfsoc_pm_init(void)</div><div class='add'>+int __init sirfsoc_pm_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	suspend_set_ops(&amp;sirfsoc_pm_ops);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-late_initcall(sirfsoc_pm_init);</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id pwrc_ids[] = {</div><div class='ctx'> 	{ .compatible = "sirf,prima2-pwrc" },</div><div class='head'>diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c<br/>index 02b9c05ff990..8f0429d4b79f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-prima2/prima2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-prima2/prima2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-prima2/prima2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-prima2/prima2.c</a></div><div class='hunk'>@@ -25,6 +25,11 @@ void __init sirfsoc_mach_init(void)</div><div class='ctx'> 	of_platform_bus_probe(NULL, sirfsoc_of_bus_ids, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void __init sirfsoc_init_late(void)</div><div class='add'>+{</div><div class='add'>+	sirfsoc_pm_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const char *prima2cb_dt_match[] __initdata = {</div><div class='ctx'>        "sirf,prima2-cb",</div><div class='ctx'>        NULL</div><div class='hunk'>@@ -39,6 +44,7 @@ MACHINE_START(PRIMA2_EVB, "prima2cb")</div><div class='ctx'> 	.timer		= &amp;sirfsoc_timer,</div><div class='ctx'> 	.dma_zone_size	= SZ_256M,</div><div class='ctx'> 	.init_machine	= sirfsoc_mach_init,</div><div class='add'>+	.init_late	= sirfsoc_init_late,</div><div class='ctx'> 	.dt_compat      = prima2cb_dt_match,</div><div class='ctx'> 	.restart	= sirfsoc_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c<br/>index c35456f02acb..9244493dbcb7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/balloon3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/balloon3.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/balloon3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/balloon3.c</a></div><div class='hunk'>@@ -679,8 +679,6 @@ static struct mtd_partition balloon3_partition_info[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char *balloon3_part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> struct platform_nand_data balloon3_nand_pdata = {</div><div class='ctx'> 	.chip = {</div><div class='ctx'> 		.nr_chips	= 4,</div><div class='hunk'>@@ -688,7 +686,6 @@ struct platform_nand_data balloon3_nand_pdata = {</div><div class='ctx'> 		.nr_partitions	= ARRAY_SIZE(balloon3_partition_info),</div><div class='ctx'> 		.partitions	= balloon3_partition_info,</div><div class='ctx'> 		.chip_delay	= 50,</div><div class='del'>-		.part_probe_types = balloon3_part_probes,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl = {</div><div class='ctx'> 		.hwcontrol	= 0,</div><div class='hunk'>@@ -732,9 +729,7 @@ static inline void balloon3_nand_init(void) {}</div><div class='ctx'> #if defined(CONFIG_REGULATOR_MAX1586) || \</div><div class='ctx'>     defined(CONFIG_REGULATOR_MAX1586_MODULE)</div><div class='ctx'> static struct regulator_consumer_supply balloon3_max1587a_consumers[] = {</div><div class='del'>-	{</div><div class='del'>-		.supply	= "vcc_core",</div><div class='del'>-	}</div><div class='add'>+	REGULATOR_SUPPLY("vcc_core", NULL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data balloon3_max1587a_v3_info = {</div><div class='head'>diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c<br/>index ebd9259f5ac9..d8f816c24a2f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/cm-x2xx-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/cm-x2xx-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/cm-x2xx-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/cm-x2xx-pci.c</a></div><div class='hunk'>@@ -181,11 +181,10 @@ static void cmx2xx_pci_preinit(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci cmx2xx_pci __initdata = {</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.map_irq	= cmx2xx_pci_map_irq,</div><div class='ctx'> 	.nr_controllers	= 1,</div><div class='add'>+	.ops		= &amp;it8152_ops,</div><div class='ctx'> 	.setup		= it8152_pci_setup,</div><div class='del'>-	.scan		= it8152_pci_scan_bus,</div><div class='ctx'> 	.preinit	= cmx2xx_pci_preinit,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c<br/>index 313274016277..3e4e9fe2d462 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/cm-x300.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/cm-x300.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/cm-x300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/cm-x300.c</a></div><div class='hunk'>@@ -713,9 +713,7 @@ struct da9030_battery_info cm_x300_battery_info = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_consumer_supply buck2_consumers[] = {</div><div class='del'>-	{</div><div class='del'>-		.supply = "vcc_core",</div><div class='del'>-	},</div><div class='add'>+	REGULATOR_SUPPLY("vcc_core", NULL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data buck2_data = {</div><div class='head'>diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c<br/>index 16ec557b8e43..97f82ad341bf 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/em-x270.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/em-x270.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/em-x270.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/em-x270.c</a></div><div class='hunk'>@@ -338,8 +338,6 @@ static struct mtd_partition em_x270_partition_info[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char *em_x270_part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> struct platform_nand_data em_x270_nand_platdata = {</div><div class='ctx'> 	.chip = {</div><div class='ctx'> 		.nr_chips = 1,</div><div class='hunk'>@@ -347,7 +345,6 @@ struct platform_nand_data em_x270_nand_platdata = {</div><div class='ctx'> 		.nr_partitions = ARRAY_SIZE(em_x270_partition_info),</div><div class='ctx'> 		.partitions = em_x270_partition_info,</div><div class='ctx'> 		.chip_delay = 20,</div><div class='del'>-		.part_probe_types = em_x270_part_probes,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl = {</div><div class='ctx'> 		.hwcontrol = 0,</div><div class='hunk'>@@ -1085,10 +1082,7 @@ static void __init em_x270_userspace_consumers_init(void)</div><div class='ctx'> /* DA9030 related initializations */</div><div class='ctx'> #define REGULATOR_CONSUMER(_name, _dev_name, _supply)		        \</div><div class='ctx'> 	static struct regulator_consumer_supply _name##_consumers[] = {	\</div><div class='del'>-		{							\</div><div class='del'>-			.dev_name = _dev_name,				\</div><div class='del'>-			.supply = _supply,				\</div><div class='del'>-		},							\</div><div class='add'>+		REGULATOR_SUPPLY(_supply, _dev_name),			\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> REGULATOR_CONSUMER(ldo3, "reg-userspace-consumer.0", "vcc gps");</div><div class='head'>diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c<br/>index b83b95a29503..d09da6a746b8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/hx4700.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/hx4700.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/hx4700.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/hx4700.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/gpio_keys.h&gt;</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/input/navpoint.h&gt;</div><div class='ctx'> #include &lt;linux/lcd.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/htc-egpio.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/asic3.h&gt;</div><div class='hunk'>@@ -102,6 +103,10 @@ static unsigned long hx4700_pin_config[] __initdata = {</div><div class='ctx'> 	GPIO44_BTUART_CTS,</div><div class='ctx'> 	GPIO45_BTUART_RTS_LPM_LOW,</div><div class='ctx'> </div><div class='add'>+	/* STUART (IRDA) */</div><div class='add'>+	GPIO46_STUART_RXD,</div><div class='add'>+	GPIO47_STUART_TXD,</div><div class='add'>+</div><div class='ctx'> 	/* PWM 1 (Backlight) */</div><div class='ctx'> 	GPIO17_PWM1_OUT,</div><div class='ctx'> </div><div class='hunk'>@@ -113,7 +118,7 @@ static unsigned long hx4700_pin_config[] __initdata = {</div><div class='ctx'> 	GPIO113_I2S_SYSCLK,</div><div class='ctx'> </div><div class='ctx'> 	/* SSP 1 (NavPoint) */</div><div class='del'>-	GPIO23_SSP1_SCLK,</div><div class='add'>+	GPIO23_SSP1_SCLK_IN,</div><div class='ctx'> 	GPIO24_SSP1_SFRM,</div><div class='ctx'> 	GPIO25_SSP1_TXD,</div><div class='ctx'> 	GPIO26_SSP1_RXD,</div><div class='hunk'>@@ -125,10 +130,13 @@ static unsigned long hx4700_pin_config[] __initdata = {</div><div class='ctx'> 	GPIO88_GPIO,</div><div class='ctx'> </div><div class='ctx'> 	/* HX4700 specific input GPIOs */</div><div class='del'>-	GPIO12_GPIO,	/* ASIC3_IRQ */</div><div class='add'>+	GPIO12_GPIO | WAKEUP_ON_EDGE_RISE,	/* ASIC3_IRQ */</div><div class='ctx'> 	GPIO13_GPIO,	/* W3220_IRQ */</div><div class='ctx'> 	GPIO14_GPIO,	/* nWLAN_IRQ */</div><div class='ctx'> </div><div class='add'>+	/* HX4700 specific output GPIOs */</div><div class='add'>+	GPIO102_GPIO | MFP_LPM_DRIVE_LOW,	/* SYNAPTICS_POWER_ON */</div><div class='add'>+</div><div class='ctx'> 	GPIO10_GPIO,	/* GSM_IRQ */</div><div class='ctx'> 	GPIO13_GPIO,	/* CPLD_IRQ */</div><div class='ctx'> 	GPIO107_GPIO,	/* DS1WM_IRQ */</div><div class='hunk'>@@ -183,6 +191,23 @@ static struct platform_device gpio_keys = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Synaptics NavPoint connected to SSP1</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct navpoint_platform_data navpoint_platform_data = {</div><div class='add'>+	.port	= 1,</div><div class='add'>+	.gpio	= GPIO102_HX4700_SYNAPTICS_POWER_ON,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device navpoint = {</div><div class='add'>+	.name	= "navpoint",</div><div class='add'>+	.id	= -1,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;navpoint_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * ASIC3</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -227,7 +252,6 @@ static u16 asic3_gpio_config[] = {</div><div class='ctx'> 	ASIC3_GPIOC0_LED0,		/* red */</div><div class='ctx'> 	ASIC3_GPIOC1_LED1,		/* green */</div><div class='ctx'> 	ASIC3_GPIOC2_LED2,		/* blue */</div><div class='del'>-	ASIC3_GPIOC4_CF_nCD,</div><div class='ctx'> 	ASIC3_GPIOC5_nCIOW,</div><div class='ctx'> 	ASIC3_GPIOC6_nCIOR,</div><div class='ctx'> 	ASIC3_GPIOC7_nPCE_1,</div><div class='hunk'>@@ -241,6 +265,7 @@ static u16 asic3_gpio_config[] = {</div><div class='ctx'> 	ASIC3_GPIOC15_nPIOR,</div><div class='ctx'> </div><div class='ctx'> 	/* GPIOD: input GPIOs, CF */</div><div class='add'>+	ASIC3_GPIOD4_CF_nCD,</div><div class='ctx'> 	ASIC3_GPIOD11_nCIOIS16,</div><div class='ctx'> 	ASIC3_GPIOD12_nCWAIT,</div><div class='ctx'> 	ASIC3_GPIOD15_nPIOW,</div><div class='hunk'>@@ -291,6 +316,7 @@ static struct asic3_platform_data asic3_platform_data = {</div><div class='ctx'> 	.gpio_config_num = ARRAY_SIZE(asic3_gpio_config),</div><div class='ctx'> 	.irq_base        = IRQ_BOARD_START,</div><div class='ctx'> 	.gpio_base       = HX4700_ASIC3_GPIO_BASE,</div><div class='add'>+	.clock_rate      = 4000000,</div><div class='ctx'> 	.leds            = asic3_leds,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -680,12 +706,8 @@ static struct platform_device power_supply = {</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static struct regulator_consumer_supply bq24022_consumers[] = {</div><div class='del'>-	{</div><div class='del'>-		.supply = "vbus_draw",</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.supply = "ac_draw",</div><div class='del'>-	},</div><div class='add'>+	REGULATOR_SUPPLY("vbus_draw", NULL),</div><div class='add'>+	REGULATOR_SUPPLY("ac_draw", NULL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data bq24022_init_data = {</div><div class='hunk'>@@ -764,9 +786,8 @@ static struct platform_device strataflash = {</div><div class='ctx'>  * Maxim MAX1587A on PI2C</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static struct regulator_consumer_supply max1587a_consumer = {</div><div class='del'>-	.supply = "vcc_core",</div><div class='del'>-};</div><div class='add'>+static struct regulator_consumer_supply max1587a_consumer =</div><div class='add'>+	REGULATOR_SUPPLY("vcc_core", NULL);</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data max1587a_v3_info = {</div><div class='ctx'> 	.constraints = {</div><div class='hunk'>@@ -828,6 +849,7 @@ static struct platform_device audio = {</div><div class='ctx'> static struct platform_device *devices[] __initdata = {</div><div class='ctx'> 	&amp;asic3,</div><div class='ctx'> 	&amp;gpio_keys,</div><div class='add'>+	&amp;navpoint,</div><div class='ctx'> 	&amp;backlight,</div><div class='ctx'> 	&amp;w3220,</div><div class='ctx'> 	&amp;hx4700_lcd,</div><div class='hunk'>@@ -859,6 +881,7 @@ static void __init hx4700_init(void)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));</div><div class='add'>+	gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1);</div><div class='ctx'> 	ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios));</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		pr_err ("hx4700: Failed to request GPIOs.\n");</div><div class='head'>diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h<br/>index a65867209aa0..a611ad3153c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/include/mach/mfp-pxa27x.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/include/mach/mfp-pxa27x.h</a></div><div class='hunk'>@@ -208,6 +208,7 @@</div><div class='ctx'> #define GPIO113_I2S_SYSCLK	MFP_CFG_OUT(GPIO113, AF1, DRIVE_LOW)</div><div class='ctx'> </div><div class='ctx'> /* SSP 1 */</div><div class='add'>+#define GPIO23_SSP1_SCLK_IN	MFP_CFG_IN(GPIO23, AF2)</div><div class='ctx'> #define GPIO23_SSP1_SCLK	MFP_CFG_OUT(GPIO23, AF2, DRIVE_LOW)</div><div class='ctx'> #define GPIO29_SSP1_SCLK	MFP_CFG_IN(GPIO29, AF3)</div><div class='ctx'> #define GPIO27_SSP1_SYSCLK	MFP_CFG_OUT(GPIO27, AF1, DRIVE_LOW)</div><div class='head'>diff --git a/arch/arm/mach-pxa/include/mach/mioa701.h b/arch/arm/mach-pxa/include/mach/mioa701.h<br/>index 02868447b0b1..e57f5c724e8a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/include/mach/mioa701.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/include/mach/mioa701.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/include/mach/mioa701.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/include/mach/mioa701.h</a></div><div class='hunk'>@@ -61,6 +61,9 @@</div><div class='ctx'> #define GPIO93_KEY_VOLUME_UP			93</div><div class='ctx'> #define GPIO94_KEY_VOLUME_DOWN			94</div><div class='ctx'> </div><div class='add'>+/* Camera */</div><div class='add'>+#define GPIO56_MT9M111_nOE			56</div><div class='add'>+</div><div class='ctx'> extern struct input_dev *mioa701_evdev;</div><div class='ctx'> extern void mioa701_gpio_lpm_set(unsigned long mfp_pin);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h<br/>index d72791695b26..0260aaa2fc17 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/include/mach/pcm990_baseboard.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/include/mach/pcm990_baseboard.h</a></div><div class='hunk'>@@ -31,7 +31,6 @@</div><div class='ctx'> #define PCM990_CTRL_INT_IRQ		PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)</div><div class='ctx'> #define PCM990_CTRL_INT_IRQ_EDGE	IRQ_TYPE_EDGE_RISING</div><div class='ctx'> #define PCM990_CTRL_PHYS		PXA_CS1_PHYS	/* 16-Bit */</div><div class='del'>-#define PCM990_CTRL_BASE		0xea000000</div><div class='ctx'> #define PCM990_CTRL_SIZE		(1*1024*1024)</div><div class='ctx'> </div><div class='ctx'> #define PCM990_CTRL_PWR_IRQ_GPIO	14</div><div class='hunk'>@@ -69,13 +68,13 @@</div><div class='ctx'> #define PCM990_CTRL_MMC2DE	0x0004	/* R MMC2 Card detect */</div><div class='ctx'> #define PCM990_CTRL_MMC2WP	0x0008	/* R MMC2 Card write protect */</div><div class='ctx'> </div><div class='del'>-#define PCM990_CTRL_REG6	0x000C	/* Interrupt Clear REGISTER */</div><div class='add'>+#define PCM990_CTRL_INTSETCLR	0x000C	/* Interrupt Clear REGISTER */</div><div class='ctx'> #define PCM990_CTRL_INTC0	0x0001	/* Clear Reg BT Detect */</div><div class='ctx'> #define PCM990_CTRL_INTC1	0x0002	/* Clear Reg FR RI */</div><div class='ctx'> #define PCM990_CTRL_INTC2	0x0004	/* Clear Reg MMC1 Detect */</div><div class='ctx'> #define PCM990_CTRL_INTC3	0x0008	/* Clear Reg PM_5V off */</div><div class='ctx'> </div><div class='del'>-#define PCM990_CTRL_REG7	0x000E	/* Interrupt Enable REGISTER */</div><div class='add'>+#define PCM990_CTRL_INTMSKENA	0x000E	/* Interrupt Enable REGISTER */</div><div class='ctx'> #define PCM990_CTRL_ENAINT0	0x0001	/* Enable Int BT Detect */</div><div class='ctx'> #define PCM990_CTRL_ENAINT1	0x0002	/* Enable Int FR RI */</div><div class='ctx'> #define PCM990_CTRL_ENAINT2	0x0004	/* Enable Int MMC1 Detect */</div><div class='hunk'>@@ -102,32 +101,6 @@</div><div class='ctx'> #define PCM990_CTRL_ACPRES	0x0004	/* DC Present */</div><div class='ctx'> #define PCM990_CTRL_ACALARM	0x0008	/* Error Akku */</div><div class='ctx'> </div><div class='del'>-#define PCM990_CTRL_P2V(x)	((x) - PCM990_CTRL_PHYS + PCM990_CTRL_BASE)</div><div class='del'>-#define PCM990_CTRL_V2P(x)	((x) - PCM990_CTRL_BASE + PCM990_CTRL_PHYS)</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-#  define __PCM990_CTRL_REG(x) \</div><div class='del'>-		(*((volatile unsigned char *)PCM990_CTRL_P2V(x)))</div><div class='del'>-#else</div><div class='del'>-#  define __PCM990_CTRL_REG(x)	PCM990_CTRL_P2V(x)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define PCM990_INTMSKENA __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG7)</div><div class='del'>-#define PCM990_INTSETCLR __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG6)</div><div class='del'>-#define PCM990_CTRL0	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG0)</div><div class='del'>-#define PCM990_CTRL1	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG1)</div><div class='del'>-#define PCM990_CTRL2	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG2)</div><div class='del'>-#define PCM990_CTRL3	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3)</div><div class='del'>-#define PCM990_CTRL4	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG4)</div><div class='del'>-#define PCM990_CTRL5	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5)</div><div class='del'>-#define PCM990_CTRL6	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG6)</div><div class='del'>-#define PCM990_CTRL7	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG7)</div><div class='del'>-#define PCM990_CTRL8	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG8)</div><div class='del'>-#define PCM990_CTRL9	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG9)</div><div class='del'>-#define PCM990_CTRL10	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG10)</div><div class='del'>-#define PCM990_CTRL11	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG11)</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * IDE</div><div class='ctx'>  */</div><div class='hunk'>@@ -166,24 +139,6 @@</div><div class='ctx'> #define PCM990_IDE_PLD_P2V(x) ((x) - PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_BASE)</div><div class='ctx'> #define PCM990_IDE_PLD_V2P(x) ((x) - PCM990_IDE_PLD_BASE + PCM990_IDE_PLD_PHYS)</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-# define  __PCM990_IDE_PLD_REG(x) \</div><div class='del'>-	(*((volatile unsigned char *)PCM990_IDE_PLD_P2V(x)))</div><div class='del'>-#else</div><div class='del'>-# define  __PCM990_IDE_PLD_REG(x)	PCM990_IDE_PLD_P2V(x)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define PCM990_IDE0 \</div><div class='del'>-	__PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG0)</div><div class='del'>-#define PCM990_IDE1 \</div><div class='del'>-	__PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG1)</div><div class='del'>-#define PCM990_IDE2 \</div><div class='del'>-	__PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG2)</div><div class='del'>-#define PCM990_IDE3 \</div><div class='del'>-	__PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG3)</div><div class='del'>-#define PCM990_IDE4 \</div><div class='del'>-	__PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG4)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Compact Flash</div><div class='ctx'>  */</div><div class='hunk'>@@ -196,10 +151,6 @@</div><div class='ctx'> #define PCM990_CF_CD_EDGE	IRQ_TYPE_EDGE_RISING</div><div class='ctx'> </div><div class='ctx'> #define PCM990_CF_PLD_PHYS	0x30000000	/* 16 bit wide */</div><div class='del'>-#define PCM990_CF_PLD_BASE	0xef000000</div><div class='del'>-#define PCM990_CF_PLD_SIZE	(1*1024*1024)</div><div class='del'>-#define PCM990_CF_PLD_P2V(x)	((x) - PCM990_CF_PLD_PHYS + PCM990_CF_PLD_BASE)</div><div class='del'>-#define PCM990_CF_PLD_V2P(x)	((x) - PCM990_CF_PLD_BASE + PCM990_CF_PLD_PHYS)</div><div class='ctx'> </div><div class='ctx'> /* visible CPLD (U6) registers */</div><div class='ctx'> #define PCM990_CF_PLD_REG0	0x1000	/* OFFSET CF REGISTER 0 */</div><div class='hunk'>@@ -239,21 +190,6 @@</div><div class='ctx'> #define PCM990_CF_REG6_CD1	0x0001	/* R CF Card_Detect1 */</div><div class='ctx'> #define PCM990_CF_REG6_CD2	0x0002	/* R CF Card_Detect2 */</div><div class='ctx'> </div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-#  define  __PCM990_CF_PLD_REG(x) \</div><div class='del'>-	(*((volatile unsigned char *)PCM990_CF_PLD_P2V(x)))</div><div class='del'>-#else</div><div class='del'>-#  define  __PCM990_CF_PLD_REG(x)	PCM990_CF_PLD_P2V(x)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define PCM990_CF0 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG0)</div><div class='del'>-#define PCM990_CF1 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG1)</div><div class='del'>-#define PCM990_CF2 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG2)</div><div class='del'>-#define PCM990_CF3 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG3)</div><div class='del'>-#define PCM990_CF4 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG4)</div><div class='del'>-#define PCM990_CF5 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG5)</div><div class='del'>-#define PCM990_CF6 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG6)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Wolfson AC97 Touch</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c<br/>index 8de0651d7efb..2db697cd2b4e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/magician.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/magician.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/magician.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/magician.c</a></div><div class='hunk'>@@ -579,12 +579,8 @@ static struct platform_device power_supply = {</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static struct regulator_consumer_supply bq24022_consumers[] = {</div><div class='del'>-	{</div><div class='del'>-		.supply = "vbus_draw",</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.supply = "ac_draw",</div><div class='del'>-	},</div><div class='add'>+	REGULATOR_SUPPLY("vbus_draw", NULL),</div><div class='add'>+	REGULATOR_SUPPLY("ac_draw", NULL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data bq24022_init_data = {</div><div class='head'>diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c<br/>index 061d57009cee..bf99022b021f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/mioa701.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/mioa701.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/mioa701.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/mioa701.c</a></div><div class='hunk'>@@ -103,6 +103,7 @@ static unsigned long mioa701_pin_config[] = {</div><div class='ctx'> 	GPIO82_CIF_DD_5,</div><div class='ctx'> 	GPIO84_CIF_FV,</div><div class='ctx'> 	GPIO85_CIF_LV,</div><div class='add'>+	MIO_CFG_OUT(GPIO56_MT9M111_nOE, AF0, DRIVE_LOW),</div><div class='ctx'> </div><div class='ctx'> 	/* Bluetooth */</div><div class='ctx'> 	MIO_CFG_IN(GPIO14_BT_nACTIVITY, AF0),</div><div class='hunk'>@@ -581,9 +582,7 @@ static struct wm97xx_pdata mioa701_wm97xx_pdata = {</div><div class='ctx'>  * Voltage regulation</div><div class='ctx'>  */</div><div class='ctx'> static struct regulator_consumer_supply max1586_consumers[] = {</div><div class='del'>-	{</div><div class='del'>-		.supply = "vcc_core",</div><div class='del'>-	}</div><div class='add'>+	REGULATOR_SUPPLY("vcc_core", NULL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data max1586_v3_info = {</div><div class='hunk'>@@ -705,6 +704,7 @@ static struct gpio global_gpios[] = {</div><div class='ctx'> 	{ GPIO9_CHARGE_EN, GPIOF_OUT_INIT_HIGH, "Charger enable" },</div><div class='ctx'> 	{ GPIO18_POWEROFF, GPIOF_OUT_INIT_LOW, "Power Off" },</div><div class='ctx'> 	{ GPIO87_LCD_POWER, GPIOF_OUT_INIT_LOW, "LCD Power" },</div><div class='add'>+	{ GPIO56_MT9M111_nOE, GPIOF_OUT_INIT_LOW, "Camera nOE" },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __init mioa701_machine_init(void)</div><div class='head'>diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c<br/>index fbc10d7b95d1..dad71cfa34c8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/palm27x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/palm27x.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/palm27x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/palm27x.c</a></div><div class='hunk'>@@ -429,9 +429,7 @@ void __init palm27x_power_init(int ac, int usb)</div><div class='ctx'> #if defined(CONFIG_REGULATOR_MAX1586) || \</div><div class='ctx'>     defined(CONFIG_REGULATOR_MAX1586_MODULE)</div><div class='ctx'> static struct regulator_consumer_supply palm27x_max1587a_consumers[] = {</div><div class='del'>-	{</div><div class='del'>-		.supply	= "vcc_core",</div><div class='del'>-	}</div><div class='add'>+	REGULATOR_SUPPLY("vcc_core", NULL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data palm27x_max1587a_v3_info = {</div><div class='head'>diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c<br/>index 9507605ed547..0da35dccfd89 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/palmtx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/palmtx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/palmtx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/palmtx.c</a></div><div class='hunk'>@@ -268,8 +268,6 @@ static struct mtd_partition palmtx_partition_info[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char *palmtx_part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> struct platform_nand_data palmtx_nand_platdata = {</div><div class='ctx'> 	.chip	= {</div><div class='ctx'> 		.nr_chips		= 1,</div><div class='hunk'>@@ -277,7 +275,6 @@ struct platform_nand_data palmtx_nand_platdata = {</div><div class='ctx'> 		.nr_partitions		= ARRAY_SIZE(palmtx_partition_info),</div><div class='ctx'> 		.partitions		= palmtx_partition_info,</div><div class='ctx'> 		.chip_delay		= 20,</div><div class='del'>-		.part_probe_types 	= palmtx_part_probes,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl	= {</div><div class='ctx'> 		.cmd_ctrl	= palmtx_nand_cmd_ctl,</div><div class='head'>diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c<br/>index abab4e2b122c..cb723e84bc27 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/pcm990-baseboard.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/pcm990-baseboard.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/pcm990-baseboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/pcm990-baseboard.c</a></div><div class='hunk'>@@ -65,6 +65,18 @@ static unsigned long pcm990_pin_config[] __initdata = {</div><div class='ctx'> 	GPIO31_AC97_SYNC,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void __iomem *pcm990_cpld_base;</div><div class='add'>+</div><div class='add'>+static u8 pcm990_cpld_readb(unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	return readb(pcm990_cpld_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pcm990_cpld_writeb(u8 value, unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	writeb(value, pcm990_cpld_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * pcm990_lcd_power - control power supply to the LCD</div><div class='ctx'>  * @on: 0 = switch off, 1 = switch on</div><div class='hunk'>@@ -78,13 +90,13 @@ static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)</div><div class='ctx'> 		/* enable LCD-Latches</div><div class='ctx'> 		 * power on LCD</div><div class='ctx'> 		 */</div><div class='del'>-		__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) =</div><div class='del'>-			PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON;</div><div class='add'>+		pcm990_cpld_writeb(PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON,</div><div class='add'>+				PCM990_CTRL_REG3);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* disable LCD-Latches</div><div class='ctx'> 		 * power off LCD</div><div class='ctx'> 		 */</div><div class='del'>-		__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00;</div><div class='add'>+		pcm990_cpld_writeb(0, PCM990_CTRL_REG3);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -243,15 +255,26 @@ static unsigned long pcm990_irq_enabled;</div><div class='ctx'> static void pcm990_mask_ack_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	int pcm990_irq = (d-&gt;irq - PCM027_IRQ(0));</div><div class='del'>-	PCM990_INTMSKENA = (pcm990_irq_enabled &amp;= ~(1 &lt;&lt; pcm990_irq));</div><div class='add'>+</div><div class='add'>+	pcm990_irq_enabled &amp;= ~(1 &lt;&lt; pcm990_irq);</div><div class='add'>+</div><div class='add'>+	pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pcm990_unmask_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	int pcm990_irq = (d-&gt;irq - PCM027_IRQ(0));</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='ctx'> 	/* the irq can be acknowledged only if deasserted, so it's done here */</div><div class='del'>-	PCM990_INTSETCLR |= 1 &lt;&lt; pcm990_irq;</div><div class='del'>-	PCM990_INTMSKENA  = (pcm990_irq_enabled |= (1 &lt;&lt; pcm990_irq));</div><div class='add'>+</div><div class='add'>+	pcm990_irq_enabled |= (1 &lt;&lt; pcm990_irq);</div><div class='add'>+</div><div class='add'>+	val = pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);</div><div class='add'>+	val |= 1 &lt;&lt; pcm990_irq;</div><div class='add'>+	pcm990_cpld_writeb(val, PCM990_CTRL_INTSETCLR);</div><div class='add'>+</div><div class='add'>+	pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct irq_chip pcm990_irq_chip = {</div><div class='hunk'>@@ -261,7 +284,10 @@ static struct irq_chip pcm990_irq_chip = {</div><div class='ctx'> </div><div class='ctx'> static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	unsigned long pending = (~PCM990_INTSETCLR) &amp; pcm990_irq_enabled;</div><div class='add'>+	unsigned long pending;</div><div class='add'>+</div><div class='add'>+	pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);</div><div class='add'>+	pending &amp;= pcm990_irq_enabled;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		/* clear our parent IRQ */</div><div class='hunk'>@@ -270,7 +296,8 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 			irq = PCM027_IRQ(0) + __ffs(pending);</div><div class='ctx'> 			generic_handle_irq(irq);</div><div class='ctx'> 		}</div><div class='del'>-		pending = (~PCM990_INTSETCLR) &amp; pcm990_irq_enabled;</div><div class='add'>+		pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);</div><div class='add'>+		pending &amp;= pcm990_irq_enabled;</div><div class='ctx'> 	} while (pending);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -285,8 +312,9 @@ static void __init pcm990_init_irq(void)</div><div class='ctx'> 		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	PCM990_INTMSKENA = 0x00;	/* disable all Interrupts */</div><div class='del'>-	PCM990_INTSETCLR = 0xFF;</div><div class='add'>+	/* disable all Interrupts */</div><div class='add'>+	pcm990_cpld_writeb(0x0, PCM990_CTRL_INTMSKENA);</div><div class='add'>+	pcm990_cpld_writeb(0xff, PCM990_CTRL_INTSETCLR);</div><div class='ctx'> </div><div class='ctx'> 	irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);</div><div class='ctx'> 	irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);</div><div class='hunk'>@@ -309,13 +337,16 @@ static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,</div><div class='ctx'> static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)</div><div class='ctx'> {</div><div class='ctx'> 	struct pxamci_platform_data *p_d = dev-&gt;platform_data;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	val = pcm990_cpld_readb(PCM990_CTRL_REG5);</div><div class='ctx'> </div><div class='ctx'> 	if ((1 &lt;&lt; vdd) &amp; p_d-&gt;ocr_mask)</div><div class='del'>-		__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =</div><div class='del'>-						PCM990_CTRL_MMC2PWR;</div><div class='add'>+		val |= PCM990_CTRL_MMC2PWR;</div><div class='ctx'> 	else</div><div class='del'>-		__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =</div><div class='del'>-						~PCM990_CTRL_MMC2PWR;</div><div class='add'>+		val &amp;= ~PCM990_CTRL_MMC2PWR;</div><div class='add'>+</div><div class='add'>+	pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pcm990_mci_exit(struct device *dev, void *data)</div><div class='hunk'>@@ -481,23 +512,6 @@ static struct platform_device pcm990_camera[] = {</div><div class='ctx'> #endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * enable generic access to the base board control CPLDs U6 and U7</div><div class='del'>- */</div><div class='del'>-static struct map_desc pcm990_io_desc[] __initdata = {</div><div class='del'>-	{</div><div class='del'>-		.virtual	= PCM990_CTRL_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(PCM990_CTRL_PHYS),</div><div class='del'>-		.length		= PCM990_CTRL_SIZE,</div><div class='del'>-		.type		= MT_DEVICE	/* CPLD */</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= PCM990_CF_PLD_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(PCM990_CF_PLD_PHYS),</div><div class='del'>-		.length		= PCM990_CF_PLD_SIZE,</div><div class='del'>-		.type		= MT_DEVICE	/* CPLD */</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * system init for baseboard usage. Will be called by pcm027 init.</div><div class='ctx'>  *</div><div class='ctx'>  * Add platform devices present on this baseboard and init</div><div class='hunk'>@@ -507,8 +521,11 @@ void __init pcm990_baseboard_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));</div><div class='ctx'> </div><div class='del'>-	/* register CPLD access */</div><div class='del'>-	iotable_init(ARRAY_AND_SIZE(pcm990_io_desc));</div><div class='add'>+	pcm990_cpld_base = ioremap(PCM990_CTRL_PHYS, PCM990_CTRL_SIZE);</div><div class='add'>+	if (!pcm990_cpld_base) {</div><div class='add'>+		pr_err("pcm990: failed to ioremap cpld\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* register CPLD's IRQ controller */</div><div class='ctx'> 	pcm990_init_irq();</div><div class='head'>diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c<br/>index df2ab0fb2ace..363d91b44ecb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/spitz.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/spitz.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/spitz.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/spitz.c</a></div><div class='hunk'>@@ -877,9 +877,7 @@ static struct i2c_board_info spitz_i2c_devs[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_consumer_supply isl6271a_consumers[] = {</div><div class='del'>-	{</div><div class='del'>-		.supply	= "vcc_core",</div><div class='del'>-	}</div><div class='add'>+	REGULATOR_SUPPLY("vcc_core", NULL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data isl6271a_info[] = {</div><div class='head'>diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c<br/>index 4cd645e29b64..30b1b0b3c7f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/stargate2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/stargate2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/stargate2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/stargate2.c</a></div><div class='hunk'>@@ -151,10 +151,7 @@ static struct platform_device sht15 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_consumer_supply stargate2_sensor_3_con[] = {</div><div class='del'>-	{</div><div class='del'>-		.dev_name = "sht15",</div><div class='del'>-		.supply = "vcc",</div><div class='del'>-	},</div><div class='add'>+	REGULATOR_SUPPLY("vcc", "sht15"),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum stargate2_ldos{</div><div class='head'>diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c<br/>index c57ab636ea9c..e1740acd15f1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/vpac270.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/vpac270.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/vpac270.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/vpac270.c</a></div><div class='hunk'>@@ -640,9 +640,7 @@ static inline void vpac270_ide_init(void) {}</div><div class='ctx'> #if defined(CONFIG_REGULATOR_MAX1586) || \</div><div class='ctx'>     defined(CONFIG_REGULATOR_MAX1586_MODULE)</div><div class='ctx'> static struct regulator_consumer_supply vpac270_max1587a_consumers[] = {</div><div class='del'>-	{</div><div class='del'>-		.supply	= "vcc_core",</div><div class='del'>-	}</div><div class='add'>+	REGULATOR_SUPPLY("vcc_core", NULL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data vpac270_max1587a_v3_info = {</div><div class='head'>diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c<br/>index fa8619970841..b9320cb8a11f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-pxa/z2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-pxa/z2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-pxa/z2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-pxa/z2.c</a></div><div class='hunk'>@@ -615,9 +615,7 @@ static inline void z2_spi_init(void) {}</div><div class='ctx'> #if defined(CONFIG_REGULATOR_TPS65023) || \</div><div class='ctx'> 	defined(CONFIG_REGULATOR_TPS65023_MODULE)</div><div class='ctx'> static struct regulator_consumer_supply z2_tps65021_consumers[] = {</div><div class='del'>-	{</div><div class='del'>-		.supply	= "vcc_core",</div><div class='del'>-	}</div><div class='add'>+	REGULATOR_SUPPLY("vcc_core", NULL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data z2_tps65021_info[] = {</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig<br/>index b34287ab5afd..e24961109b70 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/Kconfig</a></div><div class='hunk'>@@ -518,6 +518,11 @@ config S3C2443_DMA</div><div class='ctx'> 	help</div><div class='ctx'> 	  Internal config node for S3C2443 DMA support</div><div class='ctx'> </div><div class='add'>+config S3C2443_SETUP_SPI</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Common setup code for SPI GPIO configurations</div><div class='add'>+</div><div class='ctx'> endif	# CPU_S3C2443 || CPU_S3C2416</div><div class='ctx'> </div><div class='ctx'> if CPU_S3C2443</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile<br/>index 3518fe812d5f..0ab6ab15da4c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/Makefile</a></div><div class='hunk'>@@ -14,6 +14,8 @@ obj-				:=</div><div class='ctx'> </div><div class='ctx'> # core</div><div class='ctx'> </div><div class='add'>+obj-y				+= common.o</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_CPU_S3C2410)	+= s3c2410.o</div><div class='ctx'> obj-$(CONFIG_S3C2410_DMA)	+= dma-s3c2410.o</div><div class='ctx'> obj-$(CONFIG_S3C2410_PM)	+= pm-s3c2410.o sleep-s3c2410.o</div><div class='hunk'>@@ -33,6 +35,10 @@ obj-$(CONFIG_S3C2440_DMA)	+= dma-s3c2440.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CPU_S3C2443)	+= s3c2443.o irq-s3c2443.o clock-s3c2443.o</div><div class='ctx'> </div><div class='add'>+# PM</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_PM)		+= pm.o irq-pm.o sleep.o</div><div class='add'>+</div><div class='ctx'> # common code</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_S3C2443_COMMON)	+= common-s3c2443.o</div><div class='hunk'>@@ -91,5 +97,6 @@ obj-$(CONFIG_MACH_OSIRIS_DVS)		+= mach-osiris-dvs.o</div><div class='ctx'> # device setup</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o</div><div class='add'>+obj-$(CONFIG_S3C2443_SETUP_SPI)		+= setup-spi.o</div><div class='ctx'> obj-$(CONFIG_ARCH_S3C24XX)		+= setup-i2c.o</div><div class='ctx'> obj-$(CONFIG_S3C24XX_SETUP_TS)		+= setup-ts.o</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/bast-ide.c b/arch/arm/mach-s3c24xx/bast-ide.c<br/>index 298ececfa366..ba02cf8d80a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/bast-ide.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/bast-ide.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/bast-ide.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/bast-ide.c</a></div><div class='hunk'>@@ -37,21 +37,9 @@ static struct pata_platform_info bast_ide_platdata = {</div><div class='ctx'> #define IDE_CS	S3C2410_CS5</div><div class='ctx'> </div><div class='ctx'> static struct resource bast_ide0_resource[] = {</div><div class='del'>-	[0]	= {</div><div class='del'>-		.start	= IDE_CS + BAST_PA_IDEPRI,</div><div class='del'>-		.end	= IDE_CS + BAST_PA_IDEPRI + (8 * 0x20) - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1]	= {</div><div class='del'>-		.start	= IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20) ,</div><div class='del'>-		.end	= IDE_CS + BAST_PA_IDEPRIAUX + (7 * 0x20) - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[2]	= {</div><div class='del'>-		.start	= IRQ_IDE0,</div><div class='del'>-		.end	= IRQ_IDE0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDEPRI, 8 * 0x20),</div><div class='add'>+	[1] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20),</div><div class='add'>+	[2] = DEFINE_RES_IRQ(IRQ_IDE0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device bast_device_ide0 = {</div><div class='hunk'>@@ -67,21 +55,9 @@ static struct platform_device bast_device_ide0 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource bast_ide1_resource[] = {</div><div class='del'>-	[0]	= {</div><div class='del'>-		.start	= IDE_CS + BAST_PA_IDESEC,</div><div class='del'>-		.end	= IDE_CS + BAST_PA_IDESEC + (8 * 0x20) - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1]	= {</div><div class='del'>-		.start	= IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20),</div><div class='del'>-		.end	= IDE_CS + BAST_PA_IDESECAUX + (7 * 0x20) - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[2]	= {</div><div class='del'>-		.start	= IRQ_IDE1,</div><div class='del'>-		.end	= IRQ_IDE1,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDESEC, 8 * 0x20),</div><div class='add'>+	[1] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20),</div><div class='add'>+	[2] = DEFINE_RES_IRQ(IRQ_IDE1),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device bast_device_ide1 = {</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/clock-s3c2416.c b/arch/arm/mach-s3c24xx/clock-s3c2416.c<br/>index dbc9ab4aaca2..8702ecfaab30 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/clock-s3c2416.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/clock-s3c2416.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/clock-s3c2416.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/clock-s3c2416.c</a></div><div class='hunk'>@@ -144,6 +144,7 @@ static struct clk_lookup s3c2416_clk_lookup[] = {</div><div class='ctx'> 	CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &amp;hsmmc0_clk),</div><div class='ctx'> 	CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &amp;hsmmc_mux0.clk),</div><div class='ctx'> 	CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &amp;hsmmc_mux1.clk),</div><div class='add'>+	CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &amp;hsspi_mux.clk),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void __init s3c2416_init_clocks(int xtal)</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c<br/>index efb3ac359566..a4c5a520d994 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/clock-s3c2443.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/clock-s3c2443.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/clock-s3c2443.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/clock-s3c2443.c</a></div><div class='hunk'>@@ -179,6 +179,11 @@ static struct clk *clks[] __initdata = {</div><div class='ctx'> 	&amp;clk_hsmmc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct clk_lookup s3c2443_clk_lookup[] = {</div><div class='add'>+	CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &amp;clk_hsmmc),</div><div class='add'>+	CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &amp;clk_hsspi.clk),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> void __init s3c2443_init_clocks(int xtal)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);</div><div class='hunk'>@@ -210,6 +215,7 @@ void __init s3c2443_init_clocks(int xtal)</div><div class='ctx'> </div><div class='ctx'> 	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));</div><div class='ctx'> 	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));</div><div class='add'>+	clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));</div><div class='ctx'> </div><div class='ctx'> 	s3c_pwmclk_init();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/common-s3c2443.c b/arch/arm/mach-s3c24xx/common-s3c2443.c<br/>index 460431589f39..aeeb2be283fa 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/common-s3c2443.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/common-s3c2443.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/common-s3c2443.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/common-s3c2443.c</a></div><div class='hunk'>@@ -424,11 +424,6 @@ static struct clk init_clocks_off[] = {</div><div class='ctx'> 		.enable		= s3c2443_clkcon_enable_p,</div><div class='ctx'> 		.ctrlbit	= S3C2443_PCLKCON_IIS,</div><div class='ctx'> 	}, {</div><div class='del'>-		.name		= "hsspi",</div><div class='del'>-		.parent		= &amp;clk_p,</div><div class='del'>-		.enable		= s3c2443_clkcon_enable_p,</div><div class='del'>-		.ctrlbit	= S3C2443_PCLKCON_HSSPI,</div><div class='del'>-	}, {</div><div class='ctx'> 		.name		= "adc",</div><div class='ctx'> 		.parent		= &amp;clk_p,</div><div class='ctx'> 		.enable		= s3c2443_clkcon_enable_p,</div><div class='hunk'>@@ -562,6 +557,14 @@ static struct clk hsmmc1_clk = {</div><div class='ctx'> 	.ctrlbit	= S3C2443_HCLKCON_HSMMC,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct clk hsspi_clk = {</div><div class='add'>+	.name		= "spi",</div><div class='add'>+	.devname	= "s3c64xx-spi.0",</div><div class='add'>+	.parent		= &amp;clk_p,</div><div class='add'>+	.enable		= s3c2443_clkcon_enable_p,</div><div class='add'>+	.ctrlbit	= S3C2443_PCLKCON_HSSPI,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* EPLLCON compatible enough to get on/off information */</div><div class='ctx'> </div><div class='ctx'> void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll)</div><div class='hunk'>@@ -612,6 +615,7 @@ static struct clk *clks[] __initdata = {</div><div class='ctx'> 	&amp;clk_usb_bus,</div><div class='ctx'> 	&amp;clk_armdiv,</div><div class='ctx'> 	&amp;hsmmc1_clk,</div><div class='add'>+	&amp;hsspi_clk,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct clksrc_clk *clksrcs[] __initdata = {</div><div class='hunk'>@@ -629,6 +633,7 @@ static struct clk_lookup s3c2443_clk_lookup[] = {</div><div class='ctx'> 	CLKDEV_INIT(NULL, "clk_uart_baud2", &amp;clk_p),</div><div class='ctx'> 	CLKDEV_INIT(NULL, "clk_uart_baud3", &amp;clk_esys_uart.clk),</div><div class='ctx'> 	CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &amp;hsmmc1_clk),</div><div class='add'>+	CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", &amp;hsspi_clk),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,</div><div class='head'>diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/mach-s3c24xx/common.c<br/>index 290942d9adda..56cdd34cce41 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s3c24xx/cpu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s3c24xx/cpu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/common.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  *	http://www.simtec.co.uk/products/SWLINUX/</div><div class='ctx'>  *	Ben Dooks &lt;ben@simtec.co.uk&gt;</div><div class='ctx'>  *</div><div class='del'>- * S3C24XX CPU Support</div><div class='add'>+ * Common code for S3C24XX machines</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='hunk'>@@ -41,6 +41,7 @@</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;mach/regs-clock.h&gt;</div><div class='ctx'> #include &lt;mach/regs-gpio.h&gt;</div><div class='ctx'> #include &lt;plat/regs-serial.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -52,6 +53,8 @@</div><div class='ctx'> #include &lt;plat/s3c2416.h&gt;</div><div class='ctx'> #include &lt;plat/s3c244x.h&gt;</div><div class='ctx'> #include &lt;plat/s3c2443.h&gt;</div><div class='add'>+#include &lt;plat/cpu-freq.h&gt;</div><div class='add'>+#include &lt;plat/pll.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* table of supported CPUs */</div><div class='ctx'> </div><div class='hunk'>@@ -234,3 +237,67 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)</div><div class='ctx'> </div><div class='ctx'> 	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/* Serial port registrations */</div><div class='add'>+</div><div class='add'>+static struct resource s3c2410_uart0_resource[] = {</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K),</div><div class='add'>+	[1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX0, \</div><div class='add'>+			IRQ_S3CUART_ERR0 - IRQ_S3CUART_RX0 + 1, \</div><div class='add'>+			NULL, IORESOURCE_IRQ)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource s3c2410_uart1_resource[] = {</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_PA_UART1, SZ_16K),</div><div class='add'>+	[1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX1, \</div><div class='add'>+			IRQ_S3CUART_ERR1 - IRQ_S3CUART_RX1 + 1, \</div><div class='add'>+			NULL, IORESOURCE_IRQ)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource s3c2410_uart2_resource[] = {</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_PA_UART2, SZ_16K),</div><div class='add'>+	[1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX2, \</div><div class='add'>+			IRQ_S3CUART_ERR2 - IRQ_S3CUART_RX2 + 1, \</div><div class='add'>+			NULL, IORESOURCE_IRQ)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource s3c2410_uart3_resource[] = {</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2443_PA_UART3, SZ_16K),</div><div class='add'>+	[1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX3, \</div><div class='add'>+			IRQ_S3CUART_ERR3 - IRQ_S3CUART_RX3 + 1, \</div><div class='add'>+			NULL, IORESOURCE_IRQ)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.resources	= s3c2410_uart0_resource,</div><div class='add'>+		.nr_resources	= ARRAY_SIZE(s3c2410_uart0_resource),</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.resources	= s3c2410_uart1_resource,</div><div class='add'>+		.nr_resources	= ARRAY_SIZE(s3c2410_uart1_resource),</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.resources	= s3c2410_uart2_resource,</div><div class='add'>+		.nr_resources	= ARRAY_SIZE(s3c2410_uart2_resource),</div><div class='add'>+	},</div><div class='add'>+	[3] = {</div><div class='add'>+		.resources	= s3c2410_uart3_resource,</div><div class='add'>+		.nr_resources	= ARRAY_SIZE(s3c2410_uart3_resource),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* initialise all the clocks */</div><div class='add'>+</div><div class='add'>+void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,</div><div class='add'>+					   unsigned long hclk,</div><div class='add'>+					   unsigned long pclk)</div><div class='add'>+{</div><div class='add'>+	clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON),</div><div class='add'>+					clk_xtal.rate);</div><div class='add'>+</div><div class='add'>+	clk_mpll.rate = fclk;</div><div class='add'>+	clk_h.rate = hclk;</div><div class='add'>+	clk_p.rate = pclk;</div><div class='add'>+	clk_f.rate = fclk;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/dma-s3c2443.c b/arch/arm/mach-s3c24xx/dma-s3c2443.c<br/>index e227c472a40a..2d94228d2866 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/dma-s3c2443.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/dma-s3c2443.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/dma-s3c2443.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/dma-s3c2443.c</a></div><div class='hunk'>@@ -55,12 +55,20 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = {</div><div class='ctx'> 		.name		= "sdi",</div><div class='ctx'> 		.channels	= MAP(S3C2443_DMAREQSEL_SDI),</div><div class='ctx'> 	},</div><div class='del'>-	[DMACH_SPI0] = {</div><div class='del'>-		.name		= "spi0",</div><div class='add'>+	[DMACH_SPI0_RX] = {</div><div class='add'>+		.name		= "spi0-rx",</div><div class='add'>+		.channels	= MAP(S3C2443_DMAREQSEL_SPI0RX),</div><div class='add'>+	},</div><div class='add'>+	[DMACH_SPI0_TX] = {</div><div class='add'>+		.name		= "spi0-tx",</div><div class='ctx'> 		.channels	= MAP(S3C2443_DMAREQSEL_SPI0TX),</div><div class='ctx'> 	},</div><div class='del'>-	[DMACH_SPI1] = { /* only on S3C2443/S3C2450 */</div><div class='del'>-		.name		= "spi1",</div><div class='add'>+	[DMACH_SPI1_RX] = { /* only on S3C2443/S3C2450 */</div><div class='add'>+		.name		= "spi1-rx",</div><div class='add'>+		.channels	= MAP(S3C2443_DMAREQSEL_SPI1RX),</div><div class='add'>+	},</div><div class='add'>+	[DMACH_SPI1_TX] = { /* only on S3C2443/S3C2450 */</div><div class='add'>+		.name		= "spi1-tx",</div><div class='ctx'> 		.channels	= MAP(S3C2443_DMAREQSEL_SPI1TX),</div><div class='ctx'> 	},</div><div class='ctx'> 	[DMACH_UART0] = {</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/include/mach/dma.h b/arch/arm/mach-s3c24xx/include/mach/dma.h<br/>index acbdfecd4186..454831b66037 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/include/mach/dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/include/mach/dma.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/include/mach/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/include/mach/dma.h</a></div><div class='hunk'>@@ -47,6 +47,10 @@ enum dma_ch {</div><div class='ctx'> 	DMACH_UART2_SRC2,</div><div class='ctx'> 	DMACH_UART3,		/* s3c2443 has extra uart */</div><div class='ctx'> 	DMACH_UART3_SRC2,</div><div class='add'>+	DMACH_SPI0_TX,		/* s3c2443/2416/2450 hsspi0 */</div><div class='add'>+	DMACH_SPI0_RX,		/* s3c2443/2416/2450 hsspi0 */</div><div class='add'>+	DMACH_SPI1_TX,		/* s3c2443/2450 hsspi1 */</div><div class='add'>+	DMACH_SPI1_RX,		/* s3c2443/2450 hsspi1 */</div><div class='ctx'> 	DMACH_MAX,		/* the end entry */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/include/mach/irqs.h b/arch/arm/mach-s3c24xx/include/mach/irqs.h<br/>index e53b2177319e..b7a9f4d469e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/include/mach/irqs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/include/mach/irqs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/include/mach/irqs.h</a></div><div class='hunk'>@@ -134,6 +134,17 @@</div><div class='ctx'> #define IRQ_S32416_WDT		S3C2410_IRQSUB(27)</div><div class='ctx'> #define IRQ_S32416_AC97		S3C2410_IRQSUB(28)</div><div class='ctx'> </div><div class='add'>+/* second interrupt-register of s3c2416/s3c2450 */</div><div class='add'>+</div><div class='add'>+#define S3C2416_IRQ(x)		S3C2410_IRQ((x) + 54 + 29)</div><div class='add'>+#define IRQ_S3C2416_2D		S3C2416_IRQ(0)</div><div class='add'>+#define IRQ_S3C2416_IIC1	S3C2416_IRQ(1)</div><div class='add'>+#define IRQ_S3C2416_RESERVED2	S3C2416_IRQ(2)</div><div class='add'>+#define IRQ_S3C2416_RESERVED3	S3C2416_IRQ(3)</div><div class='add'>+#define IRQ_S3C2416_PCM0	S3C2416_IRQ(4)</div><div class='add'>+#define IRQ_S3C2416_PCM1	S3C2416_IRQ(5)</div><div class='add'>+#define IRQ_S3C2416_I2S0	S3C2416_IRQ(6)</div><div class='add'>+#define IRQ_S3C2416_I2S1	S3C2416_IRQ(7)</div><div class='ctx'> </div><div class='ctx'> /* extra irqs for s3c2440 */</div><div class='ctx'> </div><div class='hunk'>@@ -175,7 +186,9 @@</div><div class='ctx'> #define IRQ_S3C2443_WDT		S3C2410_IRQSUB(27)</div><div class='ctx'> #define IRQ_S3C2443_AC97	S3C2410_IRQSUB(28)</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416)</div><div class='add'>+#if defined(CONFIG_CPU_S3C2416)</div><div class='add'>+#define NR_IRQS (IRQ_S3C2416_I2S1 + 1)</div><div class='add'>+#elif defined(CONFIG_CPU_S3C2443)</div><div class='ctx'> #define NR_IRQS (IRQ_S3C2443_AC97+1)</div><div class='ctx'> #else</div><div class='ctx'> #define NR_IRQS (IRQ_S3C2440_AC97+1)</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/include/mach/map.h b/arch/arm/mach-s3c24xx/include/mach/map.h<br/>index 78ae807f1281..8ba381f2dbe1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/include/mach/map.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/include/mach/map.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/include/mach/map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/include/mach/map.h</a></div><div class='hunk'>@@ -98,6 +98,8 @@</div><div class='ctx'> </div><div class='ctx'> /* SPI */</div><div class='ctx'> #define S3C2410_PA_SPI	   (0x59000000)</div><div class='add'>+#define S3C2443_PA_SPI0		(0x52000000)</div><div class='add'>+#define S3C2443_PA_SPI1		S3C2410_PA_SPI</div><div class='ctx'> </div><div class='ctx'> /* SDI */</div><div class='ctx'> #define S3C2410_PA_SDI	   (0x5A000000)</div><div class='hunk'>@@ -162,4 +164,7 @@</div><div class='ctx'> #define S3C_PA_WDT	    S3C2410_PA_WATCHDOG</div><div class='ctx'> #define S3C_PA_NAND	    S3C24XX_PA_NAND</div><div class='ctx'> </div><div class='add'>+#define S3C_PA_SPI0		S3C2443_PA_SPI0</div><div class='add'>+#define S3C_PA_SPI1		S3C2443_PA_SPI1</div><div class='add'>+</div><div class='ctx'> #endif /* __ASM_ARCH_MAP_H */</div><div class='head'>diff --git a/arch/arm/plat-s3c24xx/irq-pm.c b/arch/arm/mach-s3c24xx/irq-pm.c<br/>index 0efb2e2848c8..0efb2e2848c8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s3c24xx/irq-pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s3c24xx/irq-pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/irq-pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/irq-pm.c</a></div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/irq-s3c2416.c b/arch/arm/mach-s3c24xx/irq-s3c2416.c<br/>index fd49f35e448e..23ec97370f32 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/irq-s3c2416.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/irq-s3c2416.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/irq-s3c2416.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/irq-s3c2416.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/syscore_ops.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='hunk'>@@ -192,6 +193,43 @@ static struct irq_chip s3c2416_irq_uart3 = {</div><div class='ctx'> 	.irq_ack	= s3c2416_irq_uart3_ack,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* second interrupt register */</div><div class='add'>+</div><div class='add'>+static inline void s3c2416_irq_ack_second(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	unsigned long bitval = 1UL &lt;&lt; (data-&gt;irq - IRQ_S3C2416_2D);</div><div class='add'>+</div><div class='add'>+	__raw_writel(bitval, S3C2416_SRCPND2);</div><div class='add'>+	__raw_writel(bitval, S3C2416_INTPND2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void s3c2416_irq_mask_second(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	unsigned long bitval = 1UL &lt;&lt; (data-&gt;irq - IRQ_S3C2416_2D);</div><div class='add'>+	unsigned long mask;</div><div class='add'>+</div><div class='add'>+	mask = __raw_readl(S3C2416_INTMSK2);</div><div class='add'>+	mask |= bitval;</div><div class='add'>+	__raw_writel(mask, S3C2416_INTMSK2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void s3c2416_irq_unmask_second(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	unsigned long bitval = 1UL &lt;&lt; (data-&gt;irq - IRQ_S3C2416_2D);</div><div class='add'>+	unsigned long mask;</div><div class='add'>+</div><div class='add'>+	mask = __raw_readl(S3C2416_INTMSK2);</div><div class='add'>+	mask &amp;= ~bitval;</div><div class='add'>+	__raw_writel(mask, S3C2416_INTMSK2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct irq_chip s3c2416_irq_second = {</div><div class='add'>+	.irq_ack	= s3c2416_irq_ack_second,</div><div class='add'>+	.irq_mask	= s3c2416_irq_mask_second,</div><div class='add'>+	.irq_unmask	= s3c2416_irq_unmask_second,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /* IRQ initialisation code */</div><div class='ctx'> </div><div class='ctx'> static int __init s3c2416_add_sub(unsigned int base,</div><div class='hunk'>@@ -213,6 +251,42 @@ static int __init s3c2416_add_sub(unsigned int base,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init s3c2416_irq_add_second(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long pend;</div><div class='add'>+	unsigned long last;</div><div class='add'>+	int irqno;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* first, clear all interrupts pending... */</div><div class='add'>+	last = 0;</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		pend = __raw_readl(S3C2416_INTPND2);</div><div class='add'>+</div><div class='add'>+		if (pend == 0 || pend == last)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		__raw_writel(pend, S3C2416_SRCPND2);</div><div class='add'>+		__raw_writel(pend, S3C2416_INTPND2);</div><div class='add'>+		printk(KERN_INFO "irq: clearing pending status %08x\n",</div><div class='add'>+		       (int)pend);</div><div class='add'>+		last = pend;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (irqno = IRQ_S3C2416_2D; irqno &lt;= IRQ_S3C2416_I2S1; irqno++) {</div><div class='add'>+		switch (irqno) {</div><div class='add'>+		case IRQ_S3C2416_RESERVED2:</div><div class='add'>+		case IRQ_S3C2416_RESERVED3:</div><div class='add'>+			/* no IRQ here */</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			irq_set_chip_and_handler(irqno, &amp;s3c2416_irq_second,</div><div class='add'>+						 handle_edge_irq);</div><div class='add'>+			set_irq_flags(irqno, IRQF_VALID);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init s3c2416_irq_add(struct device *dev,</div><div class='ctx'> 				  struct subsys_interface *sif)</div><div class='ctx'> {</div><div class='hunk'>@@ -232,6 +306,8 @@ static int __init s3c2416_irq_add(struct device *dev,</div><div class='ctx'> 			&amp;s3c2416_irq_wdtac97,</div><div class='ctx'> 			IRQ_S3C2443_WDT, IRQ_S3C2443_AC97);</div><div class='ctx'> </div><div class='add'>+	s3c2416_irq_add_second();</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -248,3 +324,25 @@ static int __init s3c2416_irq_init(void)</div><div class='ctx'> </div><div class='ctx'> arch_initcall(s3c2416_irq_init);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+static struct sleep_save irq_save[] = {</div><div class='add'>+	SAVE_ITEM(S3C2416_INTMSK2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int s3c2416_irq_suspend(void)</div><div class='add'>+{</div><div class='add'>+	s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void s3c2416_irq_resume(void)</div><div class='add'>+{</div><div class='add'>+	s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct syscore_ops s3c2416_irq_syscore_ops = {</div><div class='add'>+	.suspend	= s3c2416_irq_suspend,</div><div class='add'>+	.resume		= s3c2416_irq_resume,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-amlm5900.c b/arch/arm/mach-s3c24xx/mach-amlm5900.c<br/>index 4220cc60de3c..ea2c4b003d58 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-amlm5900.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-amlm5900.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-amlm5900.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-amlm5900.c</a></div><div class='hunk'>@@ -65,13 +65,8 @@</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='del'>-static struct resource amlm5900_nor_resource = {</div><div class='del'>-		.start = 0x00000000,</div><div class='del'>-		.end   = 0x01000000 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='add'>+static struct resource amlm5900_nor_resource =</div><div class='add'>+			DEFINE_RES_MEM(0x00000000, SZ_16M);</div><div class='ctx'> </div><div class='ctx'> static struct mtd_partition amlm5900_mtd_partitions[] = {</div><div class='ctx'> 	{</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c<br/>index 60c72c54c21e..5a7d0c0010f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-anubis.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-anubis.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-anubis.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-anubis.c</a></div><div class='hunk'>@@ -235,19 +235,9 @@ static struct pata_platform_info anubis_ide_platdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource anubis_ide0_resource[] = {</div><div class='del'>-	{</div><div class='del'>-		.start	= S3C2410_CS3,</div><div class='del'>-		.end	= S3C2410_CS3 + (8*32) - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	}, {</div><div class='del'>-		.start	= S3C2410_CS3 + (1&lt;&lt;26) + (6*32),</div><div class='del'>-		.end	= S3C2410_CS3 + (1&lt;&lt;26) + (7*32) - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	}, {</div><div class='del'>-		.start	= IRQ_IDE0,</div><div class='del'>-		.end	= IRQ_IDE0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32),</div><div class='add'>+	[2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 &lt;&lt; 26) + (6 * 32), 32),</div><div class='add'>+	[3] = DEFINE_RES_IRQ(IRQ_IDE0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device anubis_device_ide0 = {</div><div class='hunk'>@@ -262,19 +252,9 @@ static struct platform_device anubis_device_ide0 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource anubis_ide1_resource[] = {</div><div class='del'>-	{</div><div class='del'>-		.start	= S3C2410_CS4,</div><div class='del'>-		.end	= S3C2410_CS4 + (8*32) - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	}, {</div><div class='del'>-		.start	= S3C2410_CS4 + (1&lt;&lt;26) + (6*32),</div><div class='del'>-		.end	= S3C2410_CS4 + (1&lt;&lt;26) + (7*32) - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	}, {</div><div class='del'>-		.start	= IRQ_IDE0,</div><div class='del'>-		.end	= IRQ_IDE0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32),</div><div class='add'>+	[1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 &lt;&lt; 26) + (6 * 32), 32),</div><div class='add'>+	[2] = DEFINE_RES_IRQ(IRQ_IDE0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device anubis_device_ide1 = {</div><div class='hunk'>@@ -298,16 +278,8 @@ static struct ax_plat_data anubis_asix_platdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource anubis_asix_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_CS5,</div><div class='del'>-		.end   = S3C2410_CS5 + (0x20 * 0x20) -1,</div><div class='del'>-		.flags = IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = IRQ_ASIX,</div><div class='del'>-		.end   = IRQ_ASIX,</div><div class='del'>-		.flags = IORESOURCE_IRQ</div><div class='del'>-	}</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_ASIX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device anubis_device_asix = {</div><div class='hunk'>@@ -323,21 +295,9 @@ static struct platform_device anubis_device_asix = {</div><div class='ctx'> /* SM501 */</div><div class='ctx'> </div><div class='ctx'> static struct resource anubis_sm501_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S3C2410_CS2,</div><div class='del'>-		.end	= S3C2410_CS2 + SZ_8M,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= S3C2410_CS2 + SZ_64M - SZ_2M,</div><div class='del'>-		.end	= S3C2410_CS2 + SZ_64M - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= IRQ_EINT0,</div><div class='del'>-		.end	= IRQ_EINT0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS2, SZ_8M),</div><div class='add'>+	[1] = DEFINE_RES_MEM(S3C2410_CS2 + SZ_64M - SZ_2M, SZ_2M),</div><div class='add'>+	[2] = DEFINE_RES_IRQ(IRQ_EINT0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct sm501_initdata anubis_sm501_initdata = {</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c<br/>index d7ae49c90118..7a05abf1270b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-at2440evb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-at2440evb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-at2440evb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-at2440evb.c</a></div><div class='hunk'>@@ -118,21 +118,10 @@ static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {</div><div class='ctx'> /* DM9000AEP 10/100 ethernet controller */</div><div class='ctx'> </div><div class='ctx'> static struct resource at2440evb_dm9k_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_CS3,</div><div class='del'>-		.end   = S3C2410_CS3 + 3,</div><div class='del'>-		.flags = IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = S3C2410_CS3 + 4,</div><div class='del'>-		.end   = S3C2410_CS3 + 7,</div><div class='del'>-		.flags = IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = IRQ_EINT7,</div><div class='del'>-		.end   = IRQ_EINT7,</div><div class='del'>-		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,</div><div class='del'>-	}</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS3, 4),</div><div class='add'>+	[1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4),</div><div class='add'>+	[2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+					| IORESOURCE_IRQ_HIGHEDGE),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct dm9000_plat_data at2440evb_dm9k_pdata = {</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c<br/>index 53219c02eca0..1cf1720682d3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-bast.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-bast.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-bast.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-bast.c</a></div><div class='hunk'>@@ -310,22 +310,10 @@ static struct s3c2410_platform_nand __initdata bast_nand_info = {</div><div class='ctx'> /* DM9000 */</div><div class='ctx'> </div><div class='ctx'> static struct resource bast_dm9k_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_CS5 + BAST_PA_DM9000,</div><div class='del'>-		.end   = S3C2410_CS5 + BAST_PA_DM9000 + 3,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = S3C2410_CS5 + BAST_PA_DM9000 + 0x40,</div><div class='del'>-		.end   = S3C2410_CS5 + BAST_PA_DM9000 + 0x40 + 0x3f,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = IRQ_DM9000,</div><div class='del'>-		.end   = IRQ_DM9000,</div><div class='del'>-		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000, 4),</div><div class='add'>+	[1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000 + 0x40, 0x40),</div><div class='add'>+	[2] = DEFINE_RES_NAMED(IRQ_DM9000 , 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+					| IORESOURCE_IRQ_HIGHLEVEL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* for the moment we limit ourselves to 16bit IO until some</div><div class='hunk'>@@ -400,21 +388,9 @@ static struct ax_plat_data bast_asix_platdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource bast_asix_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_CS5 + BAST_PA_ASIXNET,</div><div class='del'>-		.end   = S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20) - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20),</div><div class='del'>-		.end   = S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20),</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = IRQ_ASIX,</div><div class='del'>-		.end   = IRQ_ASIX,</div><div class='del'>-		.flags = IORESOURCE_IRQ</div><div class='del'>-	}</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET, 0x18 * 0x20),</div><div class='add'>+	[1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), 1),</div><div class='add'>+	[2] = DEFINE_RES_IRQ(IRQ_ASIX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device bast_device_asix = {</div><div class='hunk'>@@ -430,11 +406,8 @@ static struct platform_device bast_device_asix = {</div><div class='ctx'> /* Asix AX88796 10/100 ethernet controller parallel port */</div><div class='ctx'> </div><div class='ctx'> static struct resource bast_asixpp_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20),</div><div class='del'>-		.end   = S3C2410_CS5 + BAST_PA_ASIXNET + (0x1b * 0x20) - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	}</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20), \</div><div class='add'>+					0x30 * 0x20),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device bast_device_axpp = {</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c<br/>index ba5d85394105..0f29f64a3eeb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-gta02.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-gta02.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-gta02.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-gta02.c</a></div><div class='hunk'>@@ -387,11 +387,8 @@ static struct physmap_flash_data gta02_nor_flash_data = {</div><div class='ctx'> 	.width		= 2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct resource gta02_nor_flash_resource = {</div><div class='del'>-	.start		= GTA02_FLASH_BASE,</div><div class='del'>-	.end		= GTA02_FLASH_BASE + GTA02_FLASH_SIZE - 1,</div><div class='del'>-	.flags		= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='add'>+static struct resource gta02_nor_flash_resource =</div><div class='add'>+	DEFINE_RES_MEM(GTA02_FLASH_BASE, GTA02_FLASH_SIZE);</div><div class='ctx'> </div><div class='ctx'> static struct platform_device gta02_nor_flash = {</div><div class='ctx'> 	.name		= "physmap-flash",</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c<br/>index 6b21ba107eab..bb8d008d5a5c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-h1940.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-h1940.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-h1940.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-h1940.c</a></div><div class='hunk'>@@ -253,13 +253,8 @@ static struct pda_power_pdata power_supply_info = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource power_supply_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-			.name	= "ac",</div><div class='del'>-			.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE |</div><div class='del'>-					  IORESOURCE_IRQ_HIGHEDGE,</div><div class='del'>-			.start	= IRQ_EINT2,</div><div class='del'>-			.end	= IRQ_EINT2,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_NAMED(IRQ_EINT2, 1, "ac", IORESOURCE_IRQ \</div><div class='add'>+			| IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device power_supply = {</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c<br/>index 5d66fb218a41..f092b188ab70 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-mini2440.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-mini2440.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-mini2440.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-mini2440.c</a></div><div class='hunk'>@@ -292,21 +292,10 @@ static struct s3c2410_platform_nand mini2440_nand_info __initdata = {</div><div class='ctx'> /* DM9000AEP 10/100 ethernet controller */</div><div class='ctx'> </div><div class='ctx'> static struct resource mini2440_dm9k_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = MACH_MINI2440_DM9K_BASE,</div><div class='del'>-		.end   = MACH_MINI2440_DM9K_BASE + 3,</div><div class='del'>-		.flags = IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = MACH_MINI2440_DM9K_BASE + 4,</div><div class='del'>-		.end   = MACH_MINI2440_DM9K_BASE + 7,</div><div class='del'>-		.flags = IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = IRQ_EINT7,</div><div class='del'>-		.end   = IRQ_EINT7,</div><div class='del'>-		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,</div><div class='del'>-	}</div><div class='add'>+	[0] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE, 4),</div><div class='add'>+	[1] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE + 4, 4),</div><div class='add'>+	[2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+						| IORESOURCE_IRQ_HIGHEDGE),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-nexcoder.c b/arch/arm/mach-s3c24xx/mach-nexcoder.c<br/>index 5198e3e1c5be..5c05ba1c330f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-nexcoder.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-nexcoder.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-nexcoder.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-nexcoder.c</a></div><div class='hunk'>@@ -84,11 +84,7 @@ static struct s3c2410_uartcfg nexcoder_uartcfgs[] __initdata = {</div><div class='ctx'> /* NOR Flash on NexVision NexCoder 2440 board */</div><div class='ctx'> </div><div class='ctx'> static struct resource nexcoder_nor_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_CS0,</div><div class='del'>-		.end   = S3C2410_CS0 + (8*1024*1024) - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	}</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS0, SZ_8M),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct map_info nexcoder_nor_map = {</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c<br/>index c5daeb612a88..95d077255024 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-osiris.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-osiris.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-osiris.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-osiris.c</a></div><div class='hunk'>@@ -244,16 +244,8 @@ static struct s3c2410_platform_nand __initdata osiris_nand_info = {</div><div class='ctx'> /* PCMCIA control and configuration */</div><div class='ctx'> </div><div class='ctx'> static struct resource osiris_pcmcia_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= 0x0f000000,</div><div class='del'>-		.end	= 0x0f100000,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= 0x0c000000,</div><div class='del'>-		.end	= 0x0c100000,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	}</div><div class='add'>+	[0] = DEFINE_RES_MEM(0x0f000000, SZ_1M),</div><div class='add'>+	[1] = DEFINE_RES_MEM(0x0c000000, SZ_1M),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device osiris_pcmcia = {</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-otom.c b/arch/arm/mach-s3c24xx/mach-otom.c<br/>index 5f1e0eeb38a9..bc4b6efb3b27 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-otom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-otom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-otom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-otom.c</a></div><div class='hunk'>@@ -77,11 +77,7 @@ static struct s3c2410_uartcfg otom11_uartcfgs[] __initdata = {</div><div class='ctx'> /* NOR Flash on NexVision OTOM board */</div><div class='ctx'> </div><div class='ctx'> static struct resource otom_nor_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_CS0,</div><div class='del'>-		.end   = S3C2410_CS0 + (4*1024*1024) - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	}</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS0, SZ_4M),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device otom_device_nor = {</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c<br/>index 91c16d9d2459..b868dddcb836 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-qt2410.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-qt2410.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-qt2410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-qt2410.c</a></div><div class='hunk'>@@ -180,16 +180,8 @@ static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {</div><div class='ctx'> /* CS8900 */</div><div class='ctx'> </div><div class='ctx'> static struct resource qt2410_cs89x0_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= 0x19000000,</div><div class='del'>-		.end	= 0x19000000 + 16,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_EINT9,</div><div class='del'>-		.end	= IRQ_EINT9,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(0x19000000, 17),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_EINT9),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device qt2410_cs89x0 = {</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c<br/>index 200debb4c72d..a6762aae4727 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-rx1950.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-rx1950.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-rx1950.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-rx1950.c</a></div><div class='hunk'>@@ -152,13 +152,8 @@ static struct pda_power_pdata power_supply_info = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource power_supply_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-			.name	= "ac",</div><div class='del'>-			.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE |</div><div class='del'>-					  IORESOURCE_IRQ_HIGHEDGE,</div><div class='del'>-			.start	= IRQ_EINT2,</div><div class='del'>-			.end	= IRQ_EINT2,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_NAMED(IRQ_EINT2, 1, "ac", IORESOURCE_IRQ \</div><div class='add'>+			| IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device power_supply = {</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c b/arch/arm/mach-s3c24xx/mach-smdk2416.c<br/>index 30a44f806e01..c3100a044fbe 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-smdk2416.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-smdk2416.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-smdk2416.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-smdk2416.c</a></div><div class='hunk'>@@ -148,23 +148,25 @@ static struct s3c24xx_hsudc_platdata smdk2416_hsudc_platdata = {</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_pd_win smdk2416_fb_win[] = {</div><div class='ctx'> 	[0] = {</div><div class='del'>-		/* think this is the same as the smdk6410 */</div><div class='del'>-		.win_mode	= {</div><div class='del'>-			.pixclock	= 41094,</div><div class='del'>-			.left_margin	= 8,</div><div class='del'>-			.right_margin	= 13,</div><div class='del'>-			.upper_margin	= 7,</div><div class='del'>-			.lower_margin	= 5,</div><div class='del'>-			.hsync_len	= 3,</div><div class='del'>-			.vsync_len	= 1,</div><div class='del'>-			.xres           = 800,</div><div class='del'>-			.yres           = 480,</div><div class='del'>-		},</div><div class='ctx'> 		.default_bpp	= 16,</div><div class='ctx'> 		.max_bpp	= 32,</div><div class='add'>+		.xres           = 800,</div><div class='add'>+		.yres           = 480,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct fb_videomode smdk2416_lcd_timing = {</div><div class='add'>+	.pixclock	= 41094,</div><div class='add'>+	.left_margin	= 8,</div><div class='add'>+	.right_margin	= 13,</div><div class='add'>+	.upper_margin	= 7,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.hsync_len	= 3,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres           = 800,</div><div class='add'>+	.yres           = 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void s3c2416_fb_gpio_setup_24bpp(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int gpio;</div><div class='hunk'>@@ -187,6 +189,7 @@ static void s3c2416_fb_gpio_setup_24bpp(void)</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_platdata smdk2416_fb_platdata = {</div><div class='ctx'> 	.win[0]		= &amp;smdk2416_fb_win[0],</div><div class='add'>+	.vtiming	= &amp;smdk2416_lcd_timing,</div><div class='ctx'> 	.setup_gpio	= s3c2416_fb_gpio_setup_24bpp,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-tct_hammer.c b/arch/arm/mach-s3c24xx/mach-tct_hammer.c<br/>index 1114666f0efb..fe990289ee7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-tct_hammer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-tct_hammer.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-tct_hammer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-tct_hammer.c</a></div><div class='hunk'>@@ -56,11 +56,8 @@</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='del'>-static struct resource tct_hammer_nor_resource = {</div><div class='del'>-		.start = 0x00000000,</div><div class='del'>-		.end   = 0x01000000 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-};</div><div class='add'>+static struct resource tct_hammer_nor_resource =</div><div class='add'>+			DEFINE_RES_MEM(0x00000000, SZ_16M);</div><div class='ctx'> </div><div class='ctx'> static struct mtd_partition tct_hammer_mtd_partitions[] = {</div><div class='ctx'> 	{</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/mach-vr1000.c b/arch/arm/mach-s3c24xx/mach-vr1000.c<br/>index 87608d45dac4..bd5f189f0424 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-vr1000.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/mach-vr1000.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/mach-vr1000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/mach-vr1000.c</a></div><div class='hunk'>@@ -187,40 +187,17 @@ static struct platform_device serial_device = {</div><div class='ctx'> /* DM9000 ethernet devices */</div><div class='ctx'> </div><div class='ctx'> static struct resource vr1000_dm9k0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_CS5 + VR1000_PA_DM9000,</div><div class='del'>-		.end   = S3C2410_CS5 + VR1000_PA_DM9000 + 3,</div><div class='del'>-		.flags = IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,</div><div class='del'>-		.end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,</div><div class='del'>-		.flags = IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = IRQ_VR1000_DM9000A,</div><div class='del'>-		.end   = IRQ_VR1000_DM9000A,</div><div class='del'>-		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4),</div><div class='add'>+	[1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40),</div><div class='add'>+	[2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000A, 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+						| IORESOURCE_IRQ_HIGHLEVEL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource vr1000_dm9k1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,</div><div class='del'>-		.end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,</div><div class='del'>-		.flags = IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,</div><div class='del'>-		.end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,</div><div class='del'>-		.flags = IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = IRQ_VR1000_DM9000N,</div><div class='del'>-		.end   = IRQ_VR1000_DM9000N,</div><div class='del'>-		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,</div><div class='del'>-	}</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4),</div><div class='add'>+	[1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40),</div><div class='add'>+	[2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000N, 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+						| IORESOURCE_IRQ_HIGHLEVEL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* for the moment we limit ourselves to 16bit IO until some</div><div class='head'>diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/mach-s3c24xx/pm.c<br/>index 60627e63a254..60627e63a254 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s3c24xx/pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s3c24xx/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/pm.c</a></div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c<br/>index 7743fade50df..ed5a95ece9eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/s3c2416.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/s3c2416.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/s3c2416.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/s3c2416.c</a></div><div class='hunk'>@@ -106,6 +106,7 @@ int __init s3c2416_init(void)</div><div class='ctx'> 	register_syscore_ops(&amp;s3c2416_pm_syscore_ops);</div><div class='ctx'> #endif</div><div class='ctx'> 	register_syscore_ops(&amp;s3c24xx_irq_syscore_ops);</div><div class='add'>+	register_syscore_ops(&amp;s3c2416_irq_syscore_ops);</div><div class='ctx'> </div><div class='ctx'> 	return device_register(&amp;s3c2416_dev);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/setup-spi.c b/arch/arm/mach-s3c24xx/setup-spi.c<br/>new file mode 100644<br/>index 000000000000..5712c85f39b1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/setup-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/setup-spi.c</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+/*</div><div class='add'>+ * HS-SPI device setup for S3C2443/S3C2416</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011 Samsung Electronics Ltd.</div><div class='add'>+ *		http://www.samsung.com/</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;plat/gpio-cfg.h&gt;</div><div class='add'>+#include &lt;plat/s3c64xx-spi.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/regs-gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_S3C64XX_DEV_SPI0</div><div class='add'>+struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {</div><div class='add'>+	.fifo_lvl_mask	= 0x7f,</div><div class='add'>+	.rx_lvl_offset	= 13,</div><div class='add'>+	.tx_st_done	= 21,</div><div class='add'>+	.high_speed	= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int s3c64xx_spi0_cfg_gpio(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	/* enable hsspi bit in misccr */</div><div class='add'>+	s3c2410_modify_misccr(S3C2416_MISCCR_HSSPI_EN2, 1);</div><div class='add'>+</div><div class='add'>+	s3c_gpio_cfgall_range(S3C2410_GPE(11), 3,</div><div class='add'>+			      S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-s3c24xx/simtec-nor.c b/arch/arm/mach-s3c24xx/simtec-nor.c<br/>index b9d6d4f92c03..029744fcaacb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/simtec-nor.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c24xx/simtec-nor.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/simtec-nor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/simtec-nor.c</a></div><div class='hunk'>@@ -55,11 +55,7 @@ static struct physmap_flash_data simtec_nor_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource simtec_nor_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_CS1 + 0x4000000,</div><div class='del'>-		.end   = S3C2410_CS1 + 0x4000000 + SZ_8M - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	}</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C2410_CS1 + 0x4000000, SZ_8M),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device simtec_device_nor = {</div><div class='head'>diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/mach-s3c24xx/sleep.S<br/>index c56612569b40..c56612569b40 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s3c24xx/sleep.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s3c24xx/sleep.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c24xx/sleep.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c24xx/sleep.S</a></div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig<br/>index 82c0915729ee..06ca1cd4cae2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/Kconfig</a></div><div class='hunk'>@@ -210,7 +210,7 @@ config SMDK6410_WM1190_EV1</div><div class='ctx'> 	  and audio daughtercard for the Samsung SMDK6410 reference</div><div class='ctx'> 	  platform.  Enabling this option will build support for this</div><div class='ctx'> 	  module into the kernel.  The presence of the module will be</div><div class='del'>-	  detected at runtime so the the resulting kernel can be used</div><div class='add'>+	  detected at runtime so the resulting kernel can be used</div><div class='ctx'> 	  with or without the 1190-EV1 fitted.</div><div class='ctx'> </div><div class='ctx'> config SMDK6410_WM1192_EV1</div><div class='hunk'>@@ -226,7 +226,7 @@ config SMDK6410_WM1192_EV1</div><div class='ctx'> 	  daughtercard for the Samsung SMDK6410 reference platform.</div><div class='ctx'> 	  Enabling this option will build support for this module into</div><div class='ctx'> 	  the kernel.  The presence of the daughtercard will be</div><div class='del'>-	  detected at runtime so the the resulting kernel can be used</div><div class='add'>+	  detected at runtime so the resulting kernel can be used</div><div class='ctx'> 	  with or without the 1192-EV1 fitted.</div><div class='ctx'> </div><div class='ctx'> config MACH_NCP</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c<br/>index b313380342a5..be746e33e86c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/common.c</a></div><div class='hunk'>@@ -384,3 +384,8 @@ void s3c64xx_restart(char mode, const char *cmd)</div><div class='ctx'> 	/* if all else fails, or mode was for soft, jump to 0 */</div><div class='ctx'> 	soft_restart(0);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __init s3c64xx_init_late(void)</div><div class='add'>+{</div><div class='add'>+	s3c64xx_pm_late_initcall();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h<br/>index 7a10be629aba..6cfc99bdfb37 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/common.h</a></div><div class='hunk'>@@ -24,6 +24,7 @@ void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);</div><div class='ctx'> void s3c64xx_setup_clocks(void);</div><div class='ctx'> </div><div class='ctx'> void s3c64xx_restart(char mode, const char *cmd);</div><div class='add'>+void s3c64xx_init_late(void);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CPU_S3C6400</div><div class='ctx'> </div><div class='hunk'>@@ -51,4 +52,10 @@ extern void s3c6410_init_clocks(int xtal);</div><div class='ctx'> #define s3c6410_init NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+int __init s3c64xx_pm_late_initcall(void);</div><div class='add'>+#else</div><div class='add'>+static inline int s3c64xx_pm_late_initcall(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/cpuidle.c b/arch/arm/mach-s3c64xx/cpuidle.c<br/>index 179460f38db7..acb197ccf3f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/cpuidle.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/cpuidle.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/cpuidle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/cpuidle.c</a></div><div class='hunk'>@@ -27,12 +27,7 @@ static int s3c64xx_enter_idle(struct cpuidle_device *dev,</div><div class='ctx'> 			      struct cpuidle_driver *drv,</div><div class='ctx'> 			      int index)</div><div class='ctx'> {</div><div class='del'>-	struct timeval before, after;</div><div class='ctx'> 	unsigned long tmp;</div><div class='del'>-	int idle_time;</div><div class='del'>-</div><div class='del'>-	local_irq_disable();</div><div class='del'>-	do_gettimeofday(&amp;before);</div><div class='ctx'> </div><div class='ctx'> 	/* Setup PWRCFG to enter idle mode */</div><div class='ctx'> 	tmp = __raw_readl(S3C64XX_PWR_CFG);</div><div class='hunk'>@@ -42,42 +37,32 @@ static int s3c64xx_enter_idle(struct cpuidle_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	cpu_do_idle();</div><div class='ctx'> </div><div class='del'>-	do_gettimeofday(&amp;after);</div><div class='del'>-	local_irq_enable();</div><div class='del'>-	idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +</div><div class='del'>-		    (after.tv_usec - before.tv_usec);</div><div class='del'>-</div><div class='del'>-	dev-&gt;last_residency = idle_time;</div><div class='ctx'> 	return index;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct cpuidle_state s3c64xx_cpuidle_set[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.enter			= s3c64xx_enter_idle,</div><div class='del'>-		.exit_latency		= 1,</div><div class='del'>-		.target_residency	= 1,</div><div class='del'>-		.flags			= CPUIDLE_FLAG_TIME_VALID,</div><div class='del'>-		.name			= "IDLE",</div><div class='del'>-		.desc			= "System active, ARM gated",</div><div class='del'>-	},</div><div class='del'>-};</div><div class='add'>+static DEFINE_PER_CPU(struct cpuidle_device, s3c64xx_cpuidle_device);</div><div class='ctx'> </div><div class='ctx'> static struct cpuidle_driver s3c64xx_cpuidle_driver = {</div><div class='del'>-	.name		= "s3c64xx_cpuidle",</div><div class='del'>-	.owner		= THIS_MODULE,</div><div class='del'>-	.state_count	= ARRAY_SIZE(s3c64xx_cpuidle_set),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct cpuidle_device s3c64xx_cpuidle_device = {</div><div class='del'>-	.state_count	= ARRAY_SIZE(s3c64xx_cpuidle_set),</div><div class='add'>+	.name	= "s3c64xx_cpuidle",</div><div class='add'>+	.owner  = THIS_MODULE,</div><div class='add'>+	.en_core_tk_irqen = 1,</div><div class='add'>+	.states = {</div><div class='add'>+		{</div><div class='add'>+			.enter            = s3c64xx_enter_idle,</div><div class='add'>+			.exit_latency     = 1,</div><div class='add'>+			.target_residency = 1,</div><div class='add'>+			.flags            = CPUIDLE_FLAG_TIME_VALID,</div><div class='add'>+			.name             = "IDLE",</div><div class='add'>+			.desc             = "System active, ARM gated",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.state_count = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init s3c64xx_init_cpuidle(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	memcpy(s3c64xx_cpuidle_driver.states, s3c64xx_cpuidle_set,</div><div class='del'>-	       sizeof(s3c64xx_cpuidle_set));</div><div class='ctx'> 	cpuidle_register_driver(&amp;s3c64xx_cpuidle_driver);</div><div class='ctx'> </div><div class='ctx'> 	ret = cpuidle_register_device(&amp;s3c64xx_cpuidle_device);</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c<br/>index 93470b158a4e..124fd5d63006 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/dev-audio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/dev-audio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/dev-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/dev-audio.c</a></div><div class='hunk'>@@ -57,21 +57,9 @@ static int s3c64xx_i2s_cfg_gpio(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource s3c64xx_iis0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C64XX_PA_IIS0,</div><div class='del'>-		.end   = S3C64XX_PA_IIS0 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_I2S0_OUT,</div><div class='del'>-		.end   = DMACH_I2S0_OUT,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_I2S0_IN,</div><div class='del'>-		.end   = DMACH_I2S0_IN,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C64XX_PA_IIS0, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S0_OUT),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S0_IN),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_audio_pdata i2sv3_pdata = {</div><div class='hunk'>@@ -95,21 +83,9 @@ struct platform_device s3c64xx_device_iis0 = {</div><div class='ctx'> EXPORT_SYMBOL(s3c64xx_device_iis0);</div><div class='ctx'> </div><div class='ctx'> static struct resource s3c64xx_iis1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C64XX_PA_IIS1,</div><div class='del'>-		.end   = S3C64XX_PA_IIS1 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_I2S1_OUT,</div><div class='del'>-		.end   = DMACH_I2S1_OUT,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_I2S1_IN,</div><div class='del'>-		.end   = DMACH_I2S1_IN,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C64XX_PA_IIS1, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S1_OUT),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S1_IN),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s3c64xx_device_iis1 = {</div><div class='hunk'>@@ -124,21 +100,9 @@ struct platform_device s3c64xx_device_iis1 = {</div><div class='ctx'> EXPORT_SYMBOL(s3c64xx_device_iis1);</div><div class='ctx'> </div><div class='ctx'> static struct resource s3c64xx_iisv4_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C64XX_PA_IISV4,</div><div class='del'>-		.end   = S3C64XX_PA_IISV4 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_HSI_I2SV40_TX,</div><div class='del'>-		.end   = DMACH_HSI_I2SV40_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_HSI_I2SV40_RX,</div><div class='del'>-		.end   = DMACH_HSI_I2SV40_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C64XX_PA_IISV4, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_HSI_I2SV40_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_HSI_I2SV40_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_audio_pdata i2sv4_pdata = {</div><div class='hunk'>@@ -187,21 +151,9 @@ static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource s3c64xx_pcm0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C64XX_PA_PCM0,</div><div class='del'>-		.end   = S3C64XX_PA_PCM0 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_PCM0_TX,</div><div class='del'>-		.end   = DMACH_PCM0_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_PCM0_RX,</div><div class='del'>-		.end   = DMACH_PCM0_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C64XX_PA_PCM0, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_PCM0_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_PCM0_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_audio_pdata s3c_pcm0_pdata = {</div><div class='hunk'>@@ -220,21 +172,9 @@ struct platform_device s3c64xx_device_pcm0 = {</div><div class='ctx'> EXPORT_SYMBOL(s3c64xx_device_pcm0);</div><div class='ctx'> </div><div class='ctx'> static struct resource s3c64xx_pcm1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C64XX_PA_PCM1,</div><div class='del'>-		.end   = S3C64XX_PA_PCM1 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_PCM1_TX,</div><div class='del'>-		.end   = DMACH_PCM1_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_PCM1_RX,</div><div class='del'>-		.end   = DMACH_PCM1_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C64XX_PA_PCM1, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_PCM1_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_PCM1_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_audio_pdata s3c_pcm1_pdata = {</div><div class='hunk'>@@ -265,31 +205,11 @@ static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource s3c64xx_ac97_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C64XX_PA_AC97,</div><div class='del'>-		.end   = S3C64XX_PA_AC97 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_AC97_PCMOUT,</div><div class='del'>-		.end   = DMACH_AC97_PCMOUT,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_AC97_PCMIN,</div><div class='del'>-		.end   = DMACH_AC97_PCMIN,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[3] = {</div><div class='del'>-		.start = DMACH_AC97_MICIN,</div><div class='del'>-		.end   = DMACH_AC97_MICIN,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[4] = {</div><div class='del'>-		.start = IRQ_AC97,</div><div class='del'>-		.end   = IRQ_AC97,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C64XX_PA_AC97, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN),</div><div class='add'>+	[3] = DEFINE_RES_DMA(DMACH_AC97_MICIN),</div><div class='add'>+	[4] = DEFINE_RES_IRQ(IRQ_AC97),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_audio_pdata s3c_ac97_pdata;</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/dev-uart.c b/arch/arm/mach-s3c64xx/dev-uart.c<br/>index c681b99eda08..46e18d77ea93 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/dev-uart.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/dev-uart.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/dev-uart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/dev-uart.c</a></div><div class='hunk'>@@ -31,55 +31,23 @@</div><div class='ctx'> /* 64xx uarts are closer together */</div><div class='ctx'> </div><div class='ctx'> static struct resource s3c64xx_uart0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S3C_PA_UART0,</div><div class='del'>-		.end	= S3C_PA_UART0 + 0x100,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_UART0,</div><div class='del'>-		.end	= IRQ_UART0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C_PA_UART0, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_UART0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s3c64xx_uart1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C_PA_UART1,</div><div class='del'>-		.end   = S3C_PA_UART1 + 0x100,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_UART1,</div><div class='del'>-		.end	= IRQ_UART1,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C_PA_UART1, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_UART1),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s3c6xx_uart2_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C_PA_UART2,</div><div class='del'>-		.end   = S3C_PA_UART2 + 0x100,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_UART2,</div><div class='del'>-		.end	= IRQ_UART2,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C_PA_UART2, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_UART2),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s3c64xx_uart3_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C_PA_UART3,</div><div class='del'>-		.end   = S3C_PA_UART3 + 0x100,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_UART3,</div><div class='del'>-		.end	= IRQ_UART3,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C_PA_UART3, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_UART3),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c<br/>index b86f2779e4e6..ffa29ddfdfce 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-anw6410.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/mach-anw6410.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-anw6410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-anw6410.c</a></div><div class='hunk'>@@ -134,24 +134,27 @@ static struct platform_device anw6410_lcd_powerdev = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_pd_win anw6410_fb_win0 = {</div><div class='del'>-	/* this is to ensure we use win0 */</div><div class='del'>-	.win_mode	= {</div><div class='del'>-		.left_margin	= 8,</div><div class='del'>-		.right_margin	= 13,</div><div class='del'>-		.upper_margin	= 7,</div><div class='del'>-		.lower_margin	= 5,</div><div class='del'>-		.hsync_len	= 3,</div><div class='del'>-		.vsync_len	= 1,</div><div class='del'>-		.xres		= 800,</div><div class='del'>-		.yres		= 480,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 32,</div><div class='ctx'> 	.default_bpp	= 16,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode anw6410_lcd_timing = {</div><div class='add'>+	.left_margin	= 8,</div><div class='add'>+	.right_margin	= 13,</div><div class='add'>+	.upper_margin	= 7,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.hsync_len	= 3,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* 405566 clocks per frame =&gt; 60Hz refresh requires 24333960Hz clock */</div><div class='ctx'> static struct s3c_fb_platdata anw6410_lcd_pdata __initdata = {</div><div class='ctx'> 	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,</div><div class='add'>+	.vtiming	= &amp;anw6410_lcd_timing,</div><div class='ctx'> 	.win[0]		= &amp;anw6410_fb_win0,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='hunk'>@@ -165,21 +168,10 @@ static void __init anw6410_dm9000_enable(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource anw6410_dm9000_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = ANW6410_PA_DM9000,</div><div class='del'>-		.end   = ANW6410_PA_DM9000 + 3,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = ANW6410_PA_DM9000 + 4,</div><div class='del'>-		.end   = ANW6410_PA_DM9000 + 4 + 500,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = IRQ_EINT(15),</div><div class='del'>-		.end   = IRQ_EINT(15),</div><div class='del'>-		.flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(ANW6410_PA_DM9000, 4),</div><div class='add'>+	[1] = DEFINE_RES_MEM(ANW6410_PA_DM9000 + 4, 501),</div><div class='add'>+	[2] = DEFINE_RES_NAMED(IRQ_EINT(15), 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+					| IRQF_TRIGGER_HIGH),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct dm9000_plat_data anw6410_dm9000_pdata = {</div><div class='hunk'>@@ -241,6 +233,7 @@ MACHINE_START(ANW6410, "A&amp;W6410")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.map_io		= anw6410_map_io,</div><div class='ctx'> 	.init_machine	= anw6410_machine_init,</div><div class='add'>+	.init_late	= s3c64xx_init_late,</div><div class='ctx'> 	.timer		= &amp;s3c24xx_timer,</div><div class='ctx'> 	.restart	= s3c64xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c<br/>index 0ace108c3e3d..7a27f5603c74 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-crag6410-module.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/mach-crag6410-module.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-crag6410-module.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-crag6410-module.c</a></div><div class='hunk'>@@ -182,6 +182,11 @@ static const struct i2c_board_info wm1277_devs[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct i2c_board_info wm6230_i2c_devs[] = {</div><div class='add'>+	{ I2C_BOARD_INFO("wm9081", 0x6c),</div><div class='add'>+	  .platform_data = &amp;wm9081_pdata, },</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static __devinitdata const struct {</div><div class='ctx'> 	u8 id;</div><div class='ctx'> 	const char *name;</div><div class='hunk'>@@ -195,7 +200,9 @@ static __devinitdata const struct {</div><div class='ctx'> 	{ .id = 0x03, .name = "1252-EV1 Glenlivet" },</div><div class='ctx'> 	{ .id = 0x11, .name = "6249-EV2 Glenfarclas", },</div><div class='ctx'> 	{ .id = 0x14, .name = "6271-EV1 Lochnagar" },</div><div class='del'>-	{ .id = 0x15, .name = "XXXX-EV1 Bells" },</div><div class='add'>+	{ .id = 0x15, .name = "6320-EV1 Bells",</div><div class='add'>+	  .i2c_devs = wm6230_i2c_devs,</div><div class='add'>+	  .num_i2c_devs = ARRAY_SIZE(wm6230_i2c_devs) },</div><div class='ctx'> 	{ .id = 0x21, .name = "1275-EV1 Mortlach" },</div><div class='ctx'> 	{ .id = 0x25, .name = "1274-EV1 Glencadam" },</div><div class='ctx'> 	{ .id = 0x31, .name = "1253-EV1 Tomatin",</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c<br/>index e20bf5835365..d0c352d861f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-crag6410.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/mach-crag6410.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-crag6410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-crag6410.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/i2c/pca953x.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/s3c-hsotg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;video/platform_lcd.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -61,7 +62,6 @@</div><div class='ctx'> #include &lt;plat/sdhci.h&gt;</div><div class='ctx'> #include &lt;plat/gpio-cfg.h&gt;</div><div class='ctx'> #include &lt;plat/s3c64xx-spi.h&gt;</div><div class='del'>-#include &lt;plat/udc-hs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/keypad.h&gt;</div><div class='ctx'> #include &lt;plat/clock.h&gt;</div><div class='hunk'>@@ -151,26 +151,29 @@ static struct platform_device crag6410_lcd_powerdev = {</div><div class='ctx'> </div><div class='ctx'> /* 640x480 URT */</div><div class='ctx'> static struct s3c_fb_pd_win crag6410_fb_win0 = {</div><div class='del'>-	/* this is to ensure we use win0 */</div><div class='del'>-	.win_mode	= {</div><div class='del'>-		.left_margin	= 150,</div><div class='del'>-		.right_margin	= 80,</div><div class='del'>-		.upper_margin	= 40,</div><div class='del'>-		.lower_margin	= 5,</div><div class='del'>-		.hsync_len	= 40,</div><div class='del'>-		.vsync_len	= 5,</div><div class='del'>-		.xres		= 640,</div><div class='del'>-		.yres		= 480,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 32,</div><div class='ctx'> 	.default_bpp	= 16,</div><div class='add'>+	.xres		= 640,</div><div class='add'>+	.yres		= 480,</div><div class='ctx'> 	.virtual_y	= 480 * 2,</div><div class='ctx'> 	.virtual_x	= 640,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct fb_videomode crag6410_lcd_timing = {</div><div class='add'>+	.left_margin	= 150,</div><div class='add'>+	.right_margin	= 80,</div><div class='add'>+	.upper_margin	= 40,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.hsync_len	= 40,</div><div class='add'>+	.vsync_len	= 5,</div><div class='add'>+	.xres		= 640,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* 405566 clocks per frame =&gt; 60Hz refresh requires 24333960Hz clock */</div><div class='ctx'> static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {</div><div class='ctx'> 	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,</div><div class='add'>+	.vtiming	= &amp;crag6410_lcd_timing,</div><div class='ctx'> 	.win[0]		= &amp;crag6410_fb_win0,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='hunk'>@@ -232,21 +235,10 @@ static struct platform_device crag6410_gpio_keydev = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource crag6410_dm9k_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S3C64XX_PA_XM0CSN5,</div><div class='del'>-		.end	= S3C64XX_PA_XM0CSN5 + 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= S3C64XX_PA_XM0CSN5 + (1 &lt;&lt; 8),</div><div class='del'>-		.end	= S3C64XX_PA_XM0CSN5 + (1 &lt;&lt; 8) + 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= S3C_EINT(17),</div><div class='del'>-		.end	= S3C_EINT(17),</div><div class='del'>-		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),</div><div class='add'>+	[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 &lt;&lt; 8), 2),</div><div class='add'>+	[2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+				| IORESOURCE_IRQ_HIGHLEVEL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct dm9000_plat_data mini6410_dm9k_pdata = {</div><div class='hunk'>@@ -262,12 +254,7 @@ static struct platform_device crag6410_dm9k_device = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource crag6410_mmgpio_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.name	= "dat",</div><div class='del'>-		.start	= S3C64XX_PA_XM0CSN4 + 1,</div><div class='del'>-		.end	= S3C64XX_PA_XM0CSN4 + 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device crag6410_mmgpio = {</div><div class='hunk'>@@ -306,6 +293,24 @@ static struct regulator_consumer_supply wallvdd_consumers[] = {</div><div class='ctx'> 	REGULATOR_SUPPLY("SPKVDD2", "1-001a"),</div><div class='ctx'> 	REGULATOR_SUPPLY("SPKVDDL", "1-001a"),</div><div class='ctx'> 	REGULATOR_SUPPLY("SPKVDDR", "1-001a"),</div><div class='add'>+</div><div class='add'>+	REGULATOR_SUPPLY("DC1VDD", "0-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("DC2VDD", "0-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("DC3VDD", "0-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("LDO1VDD", "0-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("LDO2VDD", "0-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("LDO4VDD", "0-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("LDO5VDD", "0-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("LDO6VDD", "0-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("LDO7VDD", "0-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("LDO8VDD", "0-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("LDO9VDD", "0-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("LDO10VDD", "0-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("LDO11VDD", "0-0034"),</div><div class='add'>+</div><div class='add'>+	REGULATOR_SUPPLY("DC1VDD", "1-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("DC2VDD", "1-0034"),</div><div class='add'>+	REGULATOR_SUPPLY("DC3VDD", "1-0034"),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_init_data wallvdd_data = {</div><div class='hunk'>@@ -669,6 +674,7 @@ static struct i2c_board_info i2c_devs1[] __initdata = {</div><div class='ctx'> 	  .irq = S3C_EINT(0),</div><div class='ctx'> 	  .platform_data = &amp;glenfarclas_pmic_pdata },</div><div class='ctx'> </div><div class='add'>+	{ I2C_BOARD_INFO("wlf-gf-module", 0x22) },</div><div class='ctx'> 	{ I2C_BOARD_INFO("wlf-gf-module", 0x24) },</div><div class='ctx'> 	{ I2C_BOARD_INFO("wlf-gf-module", 0x25) },</div><div class='ctx'> 	{ I2C_BOARD_INFO("wlf-gf-module", 0x26) },</div><div class='hunk'>@@ -811,6 +817,7 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.map_io		= crag6410_map_io,</div><div class='ctx'> 	.init_machine	= crag6410_machine_init,</div><div class='add'>+	.init_late	= s3c64xx_init_late,</div><div class='ctx'> 	.timer		= &amp;s3c24xx_timer,</div><div class='ctx'> 	.restart	= s3c64xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c<br/>index 521e07b8501b..689088162f77 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-hmt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/mach-hmt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-hmt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-hmt.c</a></div><div class='hunk'>@@ -129,23 +129,27 @@ static struct platform_device hmt_backlight_device = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_pd_win hmt_fb_win0 = {</div><div class='del'>-	.win_mode	= {</div><div class='del'>-		.left_margin	= 8,</div><div class='del'>-		.right_margin	= 13,</div><div class='del'>-		.upper_margin	= 7,</div><div class='del'>-		.lower_margin	= 5,</div><div class='del'>-		.hsync_len	= 3,</div><div class='del'>-		.vsync_len	= 1,</div><div class='del'>-		.xres		= 800,</div><div class='del'>-		.yres		= 480,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 32,</div><div class='ctx'> 	.default_bpp	= 16,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode hmt_lcd_timing = {</div><div class='add'>+	.left_margin	= 8,</div><div class='add'>+	.right_margin	= 13,</div><div class='add'>+	.upper_margin	= 7,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.hsync_len	= 3,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* 405566 clocks per frame =&gt; 60Hz refresh requires 24333960Hz clock */</div><div class='ctx'> static struct s3c_fb_platdata hmt_lcd_pdata __initdata = {</div><div class='ctx'> 	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,</div><div class='add'>+	.vtiming	= &amp;hmt_lcd_timing,</div><div class='ctx'> 	.win[0]		= &amp;hmt_fb_win0,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='hunk'>@@ -272,6 +276,7 @@ MACHINE_START(HMT, "Airgoo-HMT")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.map_io		= hmt_map_io,</div><div class='ctx'> 	.init_machine	= hmt_machine_init,</div><div class='add'>+	.init_late	= s3c64xx_init_late,</div><div class='ctx'> 	.timer		= &amp;s3c24xx_timer,</div><div class='ctx'> 	.restart	= s3c64xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c<br/>index c34c2ab22ead..5539a255a704 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-mini6410.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/mach-mini6410.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-mini6410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-mini6410.c</a></div><div class='hunk'>@@ -85,21 +85,10 @@ static struct s3c2410_uartcfg mini6410_uartcfgs[] __initdata = {</div><div class='ctx'> /* DM9000AEP 10/100 ethernet controller */</div><div class='ctx'> </div><div class='ctx'> static struct resource mini6410_dm9k_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S3C64XX_PA_XM0CSN1,</div><div class='del'>-		.end	= S3C64XX_PA_XM0CSN1 + 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= S3C64XX_PA_XM0CSN1 + 4,</div><div class='del'>-		.end	= S3C64XX_PA_XM0CSN1 + 5,</div><div class='del'>-		.flags	= IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= S3C_EINT(7),</div><div class='del'>-		.end	= S3C_EINT(7),</div><div class='del'>-		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL</div><div class='del'>-	}</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),</div><div class='add'>+	[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),</div><div class='add'>+	[2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+					| IORESOURCE_IRQ_HIGHLEVEL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct dm9000_plat_data mini6410_dm9k_pdata = {</div><div class='hunk'>@@ -151,41 +140,59 @@ static struct s3c2410_platform_nand mini6410_nand_info = {</div><div class='ctx'> 	.sets		= mini6410_nand_sets,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct s3c_fb_pd_win mini6410_fb_win[] = {</div><div class='add'>+static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = {</div><div class='add'>+	.max_bpp	= 32,</div><div class='add'>+	.default_bpp	= 16,</div><div class='add'>+	.xres		= 480,</div><div class='add'>+	.yres		= 272,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode mini6410_lcd_type0_timing = {</div><div class='add'>+	/* 4.3" 480x272 */</div><div class='add'>+	.left_margin	= 3,</div><div class='add'>+	.right_margin	= 2,</div><div class='add'>+	.upper_margin	= 1,</div><div class='add'>+	.lower_margin	= 1,</div><div class='add'>+	.hsync_len	= 40,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 480,</div><div class='add'>+	.yres		= 272,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win = {</div><div class='add'>+	.max_bpp	= 32,</div><div class='add'>+	.default_bpp	= 16,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode mini6410_lcd_type1_timing = {</div><div class='add'>+	/* 7.0" 800x480 */</div><div class='add'>+	.left_margin	= 8,</div><div class='add'>+	.right_margin	= 13,</div><div class='add'>+	.upper_margin	= 7,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.hsync_len	= 3,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct s3c_fb_platdata mini6410_lcd_pdata[] __initdata = {</div><div class='ctx'> 	{</div><div class='del'>-		.win_mode	= {	/* 4.3" 480x272 */</div><div class='del'>-			.left_margin	= 3,</div><div class='del'>-			.right_margin	= 2,</div><div class='del'>-			.upper_margin	= 1,</div><div class='del'>-			.lower_margin	= 1,</div><div class='del'>-			.hsync_len	= 40,</div><div class='del'>-			.vsync_len	= 1,</div><div class='del'>-			.xres		= 480,</div><div class='del'>-			.yres		= 272,</div><div class='del'>-		},</div><div class='del'>-		.max_bpp	= 32,</div><div class='del'>-		.default_bpp	= 16,</div><div class='add'>+		.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,</div><div class='add'>+		.vtiming	= &amp;mini6410_lcd_type0_timing,</div><div class='add'>+		.win[0]		= &amp;mini6410_lcd_type0_fb_win,</div><div class='add'>+		.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='add'>+		.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='ctx'> 	}, {</div><div class='del'>-		.win_mode	= {	/* 7.0" 800x480 */</div><div class='del'>-			.left_margin	= 8,</div><div class='del'>-			.right_margin	= 13,</div><div class='del'>-			.upper_margin	= 7,</div><div class='del'>-			.lower_margin	= 5,</div><div class='del'>-			.hsync_len	= 3,</div><div class='del'>-			.vsync_len	= 1,</div><div class='del'>-			.xres		= 800,</div><div class='del'>-			.yres		= 480,</div><div class='del'>-		},</div><div class='del'>-		.max_bpp	= 32,</div><div class='del'>-		.default_bpp	= 16,</div><div class='add'>+		.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,</div><div class='add'>+		.vtiming	= &amp;mini6410_lcd_type1_timing,</div><div class='add'>+		.win[0]		= &amp;mini6410_lcd_type1_fb_win,</div><div class='add'>+		.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='add'>+		.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='ctx'> 	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct s3c_fb_platdata mini6410_lcd_pdata __initdata = {</div><div class='del'>-	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,</div><div class='del'>-	.win[0]		= &amp;mini6410_fb_win[0],</div><div class='del'>-	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='del'>-	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='add'>+	{ },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void mini6410_lcd_power_set(struct plat_lcd_data *pd,</div><div class='hunk'>@@ -283,7 +290,7 @@ static void mini6410_parse_features(</div><div class='ctx'> 					"screen type already set\n", f);</div><div class='ctx'> 			} else {</div><div class='ctx'> 				int li = f - '0';</div><div class='del'>-				if (li &gt;= ARRAY_SIZE(mini6410_fb_win))</div><div class='add'>+				if (li &gt;= ARRAY_SIZE(mini6410_lcd_pdata))</div><div class='ctx'> 					printk(KERN_INFO "MINI6410: '%c' out "</div><div class='ctx'> 						"of range LCD mode\n", f);</div><div class='ctx'> 				else {</div><div class='hunk'>@@ -307,14 +314,12 @@ static void __init mini6410_machine_init(void)</div><div class='ctx'> 	/* Parse the feature string */</div><div class='ctx'> 	mini6410_parse_features(&amp;features, mini6410_features_str);</div><div class='ctx'> </div><div class='del'>-	mini6410_lcd_pdata.win[0] = &amp;mini6410_fb_win[features.lcd_index];</div><div class='del'>-</div><div class='ctx'> 	printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n",</div><div class='del'>-		mini6410_lcd_pdata.win[0]-&gt;win_mode.xres,</div><div class='del'>-		mini6410_lcd_pdata.win[0]-&gt;win_mode.yres);</div><div class='add'>+		mini6410_lcd_pdata[features.lcd_index].win[0]-&gt;xres,</div><div class='add'>+		mini6410_lcd_pdata[features.lcd_index].win[0]-&gt;yres);</div><div class='ctx'> </div><div class='ctx'> 	s3c_nand_set_platdata(&amp;mini6410_nand_info);</div><div class='del'>-	s3c_fb_set_platdata(&amp;mini6410_lcd_pdata);</div><div class='add'>+	s3c_fb_set_platdata(&amp;mini6410_lcd_pdata[features.lcd_index]);</div><div class='ctx'> 	s3c24xx_ts_set_platdata(NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* configure nCS1 width to 16 bits */</div><div class='hunk'>@@ -350,6 +355,7 @@ MACHINE_START(MINI6410, "MINI6410")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.map_io		= mini6410_map_io,</div><div class='ctx'> 	.init_machine	= mini6410_machine_init,</div><div class='add'>+	.init_late	= s3c64xx_init_late,</div><div class='ctx'> 	.timer		= &amp;s3c24xx_timer,</div><div class='ctx'> 	.restart	= s3c64xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c<br/>index 0efa2ba783b2..cad2e05eddf7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-ncp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/mach-ncp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-ncp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-ncp.c</a></div><div class='hunk'>@@ -104,6 +104,7 @@ MACHINE_START(NCP, "NCP")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.map_io		= ncp_map_io,</div><div class='ctx'> 	.init_machine	= ncp_machine_init,</div><div class='add'>+	.init_late	= s3c64xx_init_late,</div><div class='ctx'> 	.timer		= &amp;s3c24xx_timer,</div><div class='ctx'> 	.restart	= s3c64xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c<br/>index be2a9a22ab74..326b21604bc3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-real6410.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/mach-real6410.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-real6410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-real6410.c</a></div><div class='hunk'>@@ -86,21 +86,10 @@ static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {</div><div class='ctx'> /* DM9000AEP 10/100 ethernet controller */</div><div class='ctx'> </div><div class='ctx'> static struct resource real6410_dm9k_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S3C64XX_PA_XM0CSN1,</div><div class='del'>-		.end	= S3C64XX_PA_XM0CSN1 + 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= S3C64XX_PA_XM0CSN1 + 4,</div><div class='del'>-		.end	= S3C64XX_PA_XM0CSN1 + 5,</div><div class='del'>-		.flags	= IORESOURCE_MEM</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= S3C_EINT(7),</div><div class='del'>-		.end	= S3C_EINT(7),</div><div class='del'>-		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL</div><div class='del'>-	}</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),</div><div class='add'>+	[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),</div><div class='add'>+	[2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+					| IORESOURCE_IRQ_HIGHLEVEL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct dm9000_plat_data real6410_dm9k_pdata = {</div><div class='hunk'>@@ -117,41 +106,57 @@ static struct platform_device real6410_device_eth = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct s3c_fb_pd_win real6410_fb_win[] = {</div><div class='add'>+static struct s3c_fb_pd_win real6410_lcd_type0_fb_win = {</div><div class='add'>+	.max_bpp	= 32,</div><div class='add'>+	.default_bpp	= 16,</div><div class='add'>+	.xres		= 480,</div><div class='add'>+	.yres		= 272,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode real6410_lcd_type0_timing = {</div><div class='add'>+	/* 4.3" 480x272 */</div><div class='add'>+	.left_margin	= 3,</div><div class='add'>+	.right_margin	= 2,</div><div class='add'>+	.upper_margin	= 1,</div><div class='add'>+	.lower_margin	= 1,</div><div class='add'>+	.hsync_len	= 40,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct s3c_fb_pd_win real6410_lcd_type1_fb_win = {</div><div class='add'>+	.max_bpp	= 32,</div><div class='add'>+	.default_bpp	= 16,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode real6410_lcd_type1_timing = {</div><div class='add'>+	/* 7.0" 800x480 */</div><div class='add'>+	.left_margin	= 8,</div><div class='add'>+	.right_margin	= 13,</div><div class='add'>+	.upper_margin	= 7,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.hsync_len	= 3,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct s3c_fb_platdata real6410_lcd_pdata[] __initdata = {</div><div class='ctx'> 	{</div><div class='del'>-		.win_mode	= {	/* 4.3" 480x272 */</div><div class='del'>-			.left_margin	= 3,</div><div class='del'>-			.right_margin	= 2,</div><div class='del'>-			.upper_margin	= 1,</div><div class='del'>-			.lower_margin	= 1,</div><div class='del'>-			.hsync_len	= 40,</div><div class='del'>-			.vsync_len	= 1,</div><div class='del'>-			.xres		= 480,</div><div class='del'>-			.yres		= 272,</div><div class='del'>-		},</div><div class='del'>-		.max_bpp	= 32,</div><div class='del'>-		.default_bpp	= 16,</div><div class='add'>+		.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,</div><div class='add'>+		.vtiming	= &amp;real6410_lcd_type0_timing,</div><div class='add'>+		.win[0]		= &amp;real6410_lcd_type0_fb_win,</div><div class='add'>+		.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='add'>+		.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='ctx'> 	}, {</div><div class='del'>-		.win_mode	= {	/* 7.0" 800x480 */</div><div class='del'>-			.left_margin	= 8,</div><div class='del'>-			.right_margin	= 13,</div><div class='del'>-			.upper_margin	= 7,</div><div class='del'>-			.lower_margin	= 5,</div><div class='del'>-			.hsync_len	= 3,</div><div class='del'>-			.vsync_len	= 1,</div><div class='del'>-			.xres		= 800,</div><div class='del'>-			.yres		= 480,</div><div class='del'>-		},</div><div class='del'>-		.max_bpp	= 32,</div><div class='del'>-		.default_bpp	= 16,</div><div class='add'>+		.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,</div><div class='add'>+		.vtiming	= &amp;real6410_lcd_type1_timing,</div><div class='add'>+		.win[0]		= &amp;real6410_lcd_type1_fb_win,</div><div class='add'>+		.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='add'>+		.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='ctx'> 	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct s3c_fb_platdata real6410_lcd_pdata __initdata = {</div><div class='del'>-	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,</div><div class='del'>-	.win[0]		= &amp;real6410_fb_win[0],</div><div class='del'>-	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='del'>-	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='add'>+	{ },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct mtd_partition real6410_nand_part[] = {</div><div class='hunk'>@@ -264,7 +269,7 @@ static void real6410_parse_features(</div><div class='ctx'> 					"screen type already set\n", f);</div><div class='ctx'> 			} else {</div><div class='ctx'> 				int li = f - '0';</div><div class='del'>-				if (li &gt;= ARRAY_SIZE(real6410_fb_win))</div><div class='add'>+				if (li &gt;= ARRAY_SIZE(real6410_lcd_pdata))</div><div class='ctx'> 					printk(KERN_INFO "REAL6410: '%c' out "</div><div class='ctx'> 						"of range LCD mode\n", f);</div><div class='ctx'> 				else {</div><div class='hunk'>@@ -288,13 +293,11 @@ static void __init real6410_machine_init(void)</div><div class='ctx'> 	/* Parse the feature string */</div><div class='ctx'> 	real6410_parse_features(&amp;features, real6410_features_str);</div><div class='ctx'> </div><div class='del'>-	real6410_lcd_pdata.win[0] = &amp;real6410_fb_win[features.lcd_index];</div><div class='del'>-</div><div class='ctx'> 	printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n",</div><div class='del'>-		real6410_lcd_pdata.win[0]-&gt;win_mode.xres,</div><div class='del'>-		real6410_lcd_pdata.win[0]-&gt;win_mode.yres);</div><div class='add'>+		real6410_lcd_pdata[features.lcd_index].win[0]-&gt;xres,</div><div class='add'>+		real6410_lcd_pdata[features.lcd_index].win[0]-&gt;yres);</div><div class='ctx'> </div><div class='del'>-	s3c_fb_set_platdata(&amp;real6410_lcd_pdata);</div><div class='add'>+	s3c_fb_set_platdata(&amp;real6410_lcd_pdata[features.lcd_index]);</div><div class='ctx'> 	s3c_nand_set_platdata(&amp;real6410_nand_info);</div><div class='ctx'> 	s3c24xx_ts_set_platdata(NULL);</div><div class='ctx'> </div><div class='hunk'>@@ -331,6 +334,7 @@ MACHINE_START(REAL6410, "REAL6410")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.map_io		= real6410_map_io,</div><div class='ctx'> 	.init_machine	= real6410_machine_init,</div><div class='add'>+	.init_late	= s3c64xx_init_late,</div><div class='ctx'> 	.timer		= &amp;s3c24xx_timer,</div><div class='ctx'> 	.restart	= s3c64xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c<br/>index ce745e19aa27..ceeb1de40376 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-smartq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/mach-smartq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-smartq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-smartq.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/serial_core.h&gt;</div><div class='ctx'> #include &lt;linux/spi/spi_gpio.h&gt;</div><div class='ctx'> #include &lt;linux/usb/gpio_vbus.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/s3c-hsotg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='hunk'>@@ -33,7 +34,6 @@</div><div class='ctx'> #include &lt;plat/gpio-cfg.h&gt;</div><div class='ctx'> #include &lt;plat/hwmon.h&gt;</div><div class='ctx'> #include &lt;plat/regs-serial.h&gt;</div><div class='del'>-#include &lt;plat/udc-hs.h&gt;</div><div class='ctx'> #include &lt;plat/usb-control.h&gt;</div><div class='ctx'> #include &lt;plat/sdhci.h&gt;</div><div class='ctx'> #include &lt;plat/ts.h&gt;</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c<br/>index 3f42431d4dda..d6266d8b43c9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-smartq5.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/mach-smartq5.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-smartq5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-smartq5.c</a></div><div class='hunk'>@@ -108,23 +108,27 @@ static struct platform_device smartq5_buttons_device  = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_pd_win smartq5_fb_win0 = {</div><div class='del'>-	.win_mode	= {</div><div class='del'>-		.left_margin	= 216,</div><div class='del'>-		.right_margin	= 40,</div><div class='del'>-		.upper_margin	= 35,</div><div class='del'>-		.lower_margin	= 10,</div><div class='del'>-		.hsync_len	= 1,</div><div class='del'>-		.vsync_len	= 1,</div><div class='del'>-		.xres		= 800,</div><div class='del'>-		.yres		= 480,</div><div class='del'>-		.refresh	= 80,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 32,</div><div class='ctx'> 	.default_bpp	= 16,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode smartq5_lcd_timing = {</div><div class='add'>+	.left_margin	= 216,</div><div class='add'>+	.right_margin	= 40,</div><div class='add'>+	.upper_margin	= 35,</div><div class='add'>+	.lower_margin	= 10,</div><div class='add'>+	.hsync_len	= 1,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+	.refresh	= 80,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_platdata smartq5_lcd_pdata __initdata = {</div><div class='ctx'> 	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,</div><div class='add'>+	.vtiming	= &amp;smartq5_lcd_timing,</div><div class='ctx'> 	.win[0]		= &amp;smartq5_fb_win0,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |</div><div class='hunk'>@@ -152,6 +156,7 @@ MACHINE_START(SMARTQ5, "SmartQ 5")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.map_io		= smartq_map_io,</div><div class='ctx'> 	.init_machine	= smartq5_machine_init,</div><div class='add'>+	.init_late	= s3c64xx_init_late,</div><div class='ctx'> 	.timer		= &amp;s3c24xx_timer,</div><div class='ctx'> 	.restart	= s3c64xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c<br/>index e5c09b6db967..0957d2a980e1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-smartq7.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/mach-smartq7.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-smartq7.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-smartq7.c</a></div><div class='hunk'>@@ -124,23 +124,27 @@ static struct platform_device smartq7_buttons_device  = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_pd_win smartq7_fb_win0 = {</div><div class='del'>-	.win_mode	= {</div><div class='del'>-		.left_margin	= 3,</div><div class='del'>-		.right_margin	= 5,</div><div class='del'>-		.upper_margin	= 1,</div><div class='del'>-		.lower_margin	= 20,</div><div class='del'>-		.hsync_len	= 10,</div><div class='del'>-		.vsync_len	= 3,</div><div class='del'>-		.xres		= 800,</div><div class='del'>-		.yres		= 480,</div><div class='del'>-		.refresh	= 80,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 32,</div><div class='ctx'> 	.default_bpp	= 16,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode smartq7_lcd_timing = {</div><div class='add'>+	.left_margin	= 3,</div><div class='add'>+	.right_margin	= 5,</div><div class='add'>+	.upper_margin	= 1,</div><div class='add'>+	.lower_margin	= 20,</div><div class='add'>+	.hsync_len	= 10,</div><div class='add'>+	.vsync_len	= 3,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+	.refresh	= 80,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_platdata smartq7_lcd_pdata __initdata = {</div><div class='ctx'> 	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,</div><div class='add'>+	.vtiming	= &amp;smartq7_lcd_timing,</div><div class='ctx'> 	.win[0]		= &amp;smartq7_fb_win0,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |</div><div class='hunk'>@@ -168,6 +172,7 @@ MACHINE_START(SMARTQ7, "SmartQ 7")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.map_io		= smartq_map_io,</div><div class='ctx'> 	.init_machine	= smartq7_machine_init,</div><div class='add'>+	.init_late	= s3c64xx_init_late,</div><div class='ctx'> 	.timer		= &amp;s3c24xx_timer,</div><div class='ctx'> 	.restart	= s3c64xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c<br/>index 5f096534f4c4..b0f4525c66bd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-smdk6400.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/mach-smdk6400.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-smdk6400.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-smdk6400.c</a></div><div class='hunk'>@@ -93,6 +93,7 @@ MACHINE_START(SMDK6400, "SMDK6400")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.map_io		= smdk6400_map_io,</div><div class='ctx'> 	.init_machine	= smdk6400_machine_init,</div><div class='add'>+	.init_late	= s3c64xx_init_late,</div><div class='ctx'> 	.timer		= &amp;s3c24xx_timer,</div><div class='ctx'> 	.restart	= s3c64xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c<br/>index d55bc96d9582..df3103d450e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-smdk6410.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/mach-smdk6410.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/mach-smdk6410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/mach-smdk6410.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include &lt;linux/regulator/fixed.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> #include &lt;linux/pwm_backlight.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/s3c-hsotg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMDK6410_WM1190_EV1</div><div class='ctx'> #include &lt;linux/mfd/wm8350/core.h&gt;</div><div class='hunk'>@@ -72,7 +73,6 @@</div><div class='ctx'> #include &lt;plat/keypad.h&gt;</div><div class='ctx'> #include &lt;plat/backlight.h&gt;</div><div class='ctx'> #include &lt;plat/regs-fb-v4.h&gt;</div><div class='del'>-#include &lt;plat/udc-hs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='hunk'>@@ -146,26 +146,29 @@ static struct platform_device smdk6410_lcd_powerdev = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_pd_win smdk6410_fb_win0 = {</div><div class='del'>-	/* this is to ensure we use win0 */</div><div class='del'>-	.win_mode	= {</div><div class='del'>-		.left_margin	= 8,</div><div class='del'>-		.right_margin	= 13,</div><div class='del'>-		.upper_margin	= 7,</div><div class='del'>-		.lower_margin	= 5,</div><div class='del'>-		.hsync_len	= 3,</div><div class='del'>-		.vsync_len	= 1,</div><div class='del'>-		.xres		= 800,</div><div class='del'>-		.yres		= 480,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 32,</div><div class='ctx'> 	.default_bpp	= 16,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='ctx'> 	.virtual_y	= 480 * 2,</div><div class='ctx'> 	.virtual_x	= 800,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct fb_videomode smdk6410_lcd_timing = {</div><div class='add'>+	.left_margin	= 8,</div><div class='add'>+	.right_margin	= 13,</div><div class='add'>+	.upper_margin	= 7,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.hsync_len	= 3,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* 405566 clocks per frame =&gt; 60Hz refresh requires 24333960Hz clock */</div><div class='ctx'> static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {</div><div class='ctx'> 	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,</div><div class='add'>+	.vtiming	= &amp;smdk6410_lcd_timing,</div><div class='ctx'> 	.win[0]		= &amp;smdk6410_fb_win0,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='hunk'>@@ -182,16 +185,9 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static struct resource smdk6410_smsc911x_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C64XX_PA_XM0CSN1,</div><div class='del'>-		.end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = S3C_EINT(10),</div><div class='del'>-		.end   = S3C_EINT(10),</div><div class='del'>-		.flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K),</div><div class='add'>+	[1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+					| IRQ_TYPE_LEVEL_LOW),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {</div><div class='hunk'>@@ -709,6 +705,7 @@ MACHINE_START(SMDK6410, "SMDK6410")</div><div class='ctx'> 	.handle_irq	= vic_handle_irq,</div><div class='ctx'> 	.map_io		= smdk6410_map_io,</div><div class='ctx'> 	.init_machine	= smdk6410_machine_init,</div><div class='add'>+	.init_late	= s3c64xx_init_late,</div><div class='ctx'> 	.timer		= &amp;s3c24xx_timer,</div><div class='ctx'> 	.restart	= s3c64xx_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c<br/>index 7d3e81b9dd06..7feb426fc202 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s3c64xx/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s3c64xx/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s3c64xx/pm.c</a></div><div class='hunk'>@@ -365,10 +365,9 @@ static __init int s3c64xx_pm_initcall(void)</div><div class='ctx'> }</div><div class='ctx'> arch_initcall(s3c64xx_pm_initcall);</div><div class='ctx'> </div><div class='del'>-static __init int s3c64xx_pm_late_initcall(void)</div><div class='add'>+int __init s3c64xx_pm_late_initcall(void)</div><div class='ctx'> {</div><div class='ctx'> 	pm_genpd_poweroff_unused();</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-late_initcall(s3c64xx_pm_late_initcall);</div><div class='head'>diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c<br/>index 35f1f226dabb..91113ddc51da 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s5p64x0/dev-audio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s5p64x0/dev-audio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s5p64x0/dev-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5p64x0/dev-audio.c</a></div><div class='hunk'>@@ -51,21 +51,9 @@ static struct s3c_audio_pdata s5p6440_i2s_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5p64x0_i2s0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5P64X0_PA_I2S,</div><div class='del'>-		.end	= S5P64X0_PA_I2S + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_I2S0_TX,</div><div class='del'>-		.end	= DMACH_I2S0_TX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= DMACH_I2S0_RX,</div><div class='del'>-		.end	= DMACH_I2S0_RX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5P64X0_PA_I2S, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S0_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S0_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5p6440_device_iis = {</div><div class='hunk'>@@ -130,21 +118,9 @@ static struct s3c_audio_pdata s5p6450_i2s_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5p6450_i2s1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5P6450_PA_I2S1,</div><div class='del'>-		.end	= S5P6450_PA_I2S1 + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_I2S1_TX,</div><div class='del'>-		.end	= DMACH_I2S1_TX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= DMACH_I2S1_RX,</div><div class='del'>-		.end	= DMACH_I2S1_RX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5P6450_PA_I2S1, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S1_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S1_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5p6450_device_iis1 = {</div><div class='hunk'>@@ -158,21 +134,9 @@ struct platform_device s5p6450_device_iis1 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5p6450_i2s2_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5P6450_PA_I2S2,</div><div class='del'>-		.end	= S5P6450_PA_I2S2 + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_I2S2_TX,</div><div class='del'>-		.end	= DMACH_I2S2_TX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= DMACH_I2S2_RX,</div><div class='del'>-		.end	= DMACH_I2S2_RX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5P6450_PA_I2S2, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S2_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S2_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5p6450_device_iis2 = {</div><div class='hunk'>@@ -208,21 +172,9 @@ static struct s3c_audio_pdata s5p6440_pcm_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5p6440_pcm0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5P64X0_PA_PCM,</div><div class='del'>-		.end	= S5P64X0_PA_PCM + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_PCM0_TX,</div><div class='del'>-		.end	= DMACH_PCM0_TX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= DMACH_PCM0_RX,</div><div class='del'>-		.end	= DMACH_PCM0_RX,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5P64X0_PA_PCM, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_PCM0_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_PCM0_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5p6440_device_pcm = {</div><div class='head'>diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c<br/>index a40e325d62c8..92fefad505cc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s5p64x0/mach-smdk6440.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s5p64x0/mach-smdk6440.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s5p64x0/mach-smdk6440.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5p64x0/mach-smdk6440.c</a></div><div class='hunk'>@@ -103,22 +103,26 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {</div><div class='ctx'> </div><div class='ctx'> /* Frame Buffer */</div><div class='ctx'> static struct s3c_fb_pd_win smdk6440_fb_win0 = {</div><div class='del'>-	.win_mode = {</div><div class='del'>-		.left_margin	= 8,</div><div class='del'>-		.right_margin	= 13,</div><div class='del'>-		.upper_margin	= 7,</div><div class='del'>-		.lower_margin	= 5,</div><div class='del'>-		.hsync_len	= 3,</div><div class='del'>-		.vsync_len	= 1,</div><div class='del'>-		.xres		= 800,</div><div class='del'>-		.yres		= 480,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 32,</div><div class='ctx'> 	.default_bpp	= 24,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode smdk6440_lcd_timing = {</div><div class='add'>+	.left_margin	= 8,</div><div class='add'>+	.right_margin	= 13,</div><div class='add'>+	.upper_margin	= 7,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.hsync_len	= 3,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_platdata smdk6440_lcd_pdata __initdata = {</div><div class='ctx'> 	.win[0]		= &amp;smdk6440_fb_win0,</div><div class='add'>+	.vtiming	= &amp;smdk6440_lcd_timing,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='ctx'> 	.setup_gpio	= s5p64x0_fb_gpio_setup_24bpp,</div><div class='head'>diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c<br/>index efb69e2f2afe..e2335ecf6eae 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s5p64x0/mach-smdk6450.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s5p64x0/mach-smdk6450.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s5p64x0/mach-smdk6450.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5p64x0/mach-smdk6450.c</a></div><div class='hunk'>@@ -121,22 +121,26 @@ static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = {</div><div class='ctx'> </div><div class='ctx'> /* Frame Buffer */</div><div class='ctx'> static struct s3c_fb_pd_win smdk6450_fb_win0 = {</div><div class='del'>-	.win_mode	= {</div><div class='del'>-		.left_margin	= 8,</div><div class='del'>-		.right_margin	= 13,</div><div class='del'>-		.upper_margin	= 7,</div><div class='del'>-		.lower_margin	= 5,</div><div class='del'>-		.hsync_len	= 3,</div><div class='del'>-		.vsync_len	= 1,</div><div class='del'>-		.xres		= 800,</div><div class='del'>-		.yres		= 480,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 32,</div><div class='ctx'> 	.default_bpp	= 24,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode smdk6450_lcd_timing = {</div><div class='add'>+	.left_margin	= 8,</div><div class='add'>+	.right_margin	= 13,</div><div class='add'>+	.upper_margin	= 7,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.hsync_len	= 3,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_platdata smdk6450_lcd_pdata __initdata = {</div><div class='ctx'> 	.win[0]		= &amp;smdk6450_fb_win0,</div><div class='add'>+	.vtiming	= &amp;smdk6450_lcd_timing,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='ctx'> 	.setup_gpio	= s5p64x0_fb_gpio_setup_24bpp,</div><div class='head'>diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c<br/>index ab2d27172cbc..9d4bde3f1110 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s5pc100/dev-audio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s5pc100/dev-audio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s5pc100/dev-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pc100/dev-audio.c</a></div><div class='hunk'>@@ -56,26 +56,10 @@ static struct s3c_audio_pdata i2sv5_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pc100_iis0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PC100_PA_I2S0,</div><div class='del'>-		.end   = S5PC100_PA_I2S0 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_I2S0_TX,</div><div class='del'>-		.end   = DMACH_I2S0_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_I2S0_RX,</div><div class='del'>-		.end   = DMACH_I2S0_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[3] = {</div><div class='del'>-		.start = DMACH_I2S0S_TX,</div><div class='del'>-		.end = DMACH_I2S0S_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PC100_PA_I2S0, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S0_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S0_RX),</div><div class='add'>+	[3] = DEFINE_RES_DMA(DMACH_I2S0S_TX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5pc100_device_iis0 = {</div><div class='hunk'>@@ -103,21 +87,9 @@ static struct s3c_audio_pdata i2sv3_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pc100_iis1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PC100_PA_I2S1,</div><div class='del'>-		.end   = S5PC100_PA_I2S1 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_I2S1_TX,</div><div class='del'>-		.end   = DMACH_I2S1_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_I2S1_RX,</div><div class='del'>-		.end   = DMACH_I2S1_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PC100_PA_I2S1, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S1_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S1_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5pc100_device_iis1 = {</div><div class='hunk'>@@ -131,21 +103,9 @@ struct platform_device s5pc100_device_iis1 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pc100_iis2_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PC100_PA_I2S2,</div><div class='del'>-		.end   = S5PC100_PA_I2S2 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_I2S2_TX,</div><div class='del'>-		.end   = DMACH_I2S2_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_I2S2_RX,</div><div class='del'>-		.end   = DMACH_I2S2_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PC100_PA_I2S2, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S2_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S2_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5pc100_device_iis2 = {</div><div class='hunk'>@@ -184,21 +144,9 @@ static struct s3c_audio_pdata s3c_pcm_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pc100_pcm0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PC100_PA_PCM0,</div><div class='del'>-		.end   = S5PC100_PA_PCM0 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_PCM0_TX,</div><div class='del'>-		.end   = DMACH_PCM0_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_PCM0_RX,</div><div class='del'>-		.end   = DMACH_PCM0_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PC100_PA_PCM0, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_PCM0_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_PCM0_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5pc100_device_pcm0 = {</div><div class='hunk'>@@ -212,21 +160,9 @@ struct platform_device s5pc100_device_pcm0 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pc100_pcm1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PC100_PA_PCM1,</div><div class='del'>-		.end   = S5PC100_PA_PCM1 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_PCM1_TX,</div><div class='del'>-		.end   = DMACH_PCM1_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_PCM1_RX,</div><div class='del'>-		.end   = DMACH_PCM1_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PC100_PA_PCM1, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_PCM1_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_PCM1_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5pc100_device_pcm1 = {</div><div class='hunk'>@@ -247,31 +183,11 @@ static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pc100_ac97_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PC100_PA_AC97,</div><div class='del'>-		.end   = S5PC100_PA_AC97 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_AC97_PCMOUT,</div><div class='del'>-		.end   = DMACH_AC97_PCMOUT,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_AC97_PCMIN,</div><div class='del'>-		.end   = DMACH_AC97_PCMIN,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[3] = {</div><div class='del'>-		.start = DMACH_AC97_MICIN,</div><div class='del'>-		.end   = DMACH_AC97_MICIN,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[4] = {</div><div class='del'>-		.start = IRQ_AC97,</div><div class='del'>-		.end   = IRQ_AC97,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PC100_PA_AC97, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN),</div><div class='add'>+	[3] = DEFINE_RES_DMA(DMACH_AC97_MICIN),</div><div class='add'>+	[4] = DEFINE_RES_IRQ(IRQ_AC97),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_audio_pdata s3c_ac97_pdata = {</div><div class='hunk'>@@ -308,16 +224,8 @@ static int s5pc100_spdif_cfg_gpg3(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pc100_spdif_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5PC100_PA_SPDIF,</div><div class='del'>-		.end	= S5PC100_PA_SPDIF + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_SPDIF,</div><div class='del'>-		.end	= DMACH_SPDIF,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PC100_PA_SPDIF, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_SPDIF),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_audio_pdata s5p_spdif_pdata = {</div><div class='head'>diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c<br/>index 674d22992f3c..0c3ae38d27ca 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s5pc100/mach-smdkc100.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s5pc100/mach-smdkc100.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s5pc100/mach-smdkc100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pc100/mach-smdkc100.c</a></div><div class='hunk'>@@ -136,24 +136,27 @@ static struct platform_device smdkc100_lcd_powerdev = {</div><div class='ctx'> </div><div class='ctx'> /* Frame Buffer */</div><div class='ctx'> static struct s3c_fb_pd_win smdkc100_fb_win0 = {</div><div class='del'>-	/* this is to ensure we use win0 */</div><div class='del'>-	.win_mode	= {</div><div class='del'>-		.left_margin	= 8,</div><div class='del'>-		.right_margin	= 13,</div><div class='del'>-		.upper_margin	= 7,</div><div class='del'>-		.lower_margin	= 5,</div><div class='del'>-		.hsync_len	= 3,</div><div class='del'>-		.vsync_len	= 1,</div><div class='del'>-		.xres		= 800,</div><div class='del'>-		.yres		= 480,</div><div class='del'>-		.refresh	= 80,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 32,</div><div class='ctx'> 	.default_bpp	= 16,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode smdkc100_lcd_timing = {</div><div class='add'>+	.left_margin	= 8,</div><div class='add'>+	.right_margin	= 13,</div><div class='add'>+	.upper_margin	= 7,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.hsync_len	= 3,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+	.refresh	= 80,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_platdata smdkc100_lcd_pdata __initdata = {</div><div class='ctx'> 	.win[0]		= &amp;smdkc100_fb_win0,</div><div class='add'>+	.vtiming	= &amp;smdkc100_lcd_timing,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='ctx'> 	.setup_gpio	= s5pc100_fb_gpio_setup_24bpp,</div><div class='head'>diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig<br/>index 29594fc4fdf4..88e983b0c82e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s5pv210/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s5pv210/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s5pv210/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pv210/Kconfig</a></div><div class='hunk'>@@ -85,6 +85,7 @@ config MACH_AQUILA</div><div class='ctx'> 	select S5P_DEV_ONENAND</div><div class='ctx'> 	select S5PV210_SETUP_FB_24BPP</div><div class='ctx'> 	select S5PV210_SETUP_SDHCI</div><div class='add'>+	select S5PV210_SETUP_USB_PHY</div><div class='ctx'> 	help</div><div class='ctx'> 	  Machine support for the Samsung Aquila target based on S5PC110 SoC</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c<br/>index 63f5d82004b5..8367749c3eec 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s5pv210/dev-audio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s5pv210/dev-audio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s5pv210/dev-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pv210/dev-audio.c</a></div><div class='hunk'>@@ -59,26 +59,10 @@ static struct s3c_audio_pdata i2sv5_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pv210_iis0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PV210_PA_IIS0,</div><div class='del'>-		.end   = S5PV210_PA_IIS0 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_I2S0_TX,</div><div class='del'>-		.end   = DMACH_I2S0_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_I2S0_RX,</div><div class='del'>-		.end   = DMACH_I2S0_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[3] = {</div><div class='del'>-		.start = DMACH_I2S0S_TX,</div><div class='del'>-		.end = DMACH_I2S0S_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PV210_PA_IIS0, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S0_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S0_RX),</div><div class='add'>+	[3] = DEFINE_RES_DMA(DMACH_I2S0S_TX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5pv210_device_iis0 = {</div><div class='hunk'>@@ -106,21 +90,9 @@ static struct s3c_audio_pdata i2sv3_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pv210_iis1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PV210_PA_IIS1,</div><div class='del'>-		.end   = S5PV210_PA_IIS1 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_I2S1_TX,</div><div class='del'>-		.end   = DMACH_I2S1_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_I2S1_RX,</div><div class='del'>-		.end   = DMACH_I2S1_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PV210_PA_IIS1, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S1_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S1_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5pv210_device_iis1 = {</div><div class='hunk'>@@ -134,21 +106,9 @@ struct platform_device s5pv210_device_iis1 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pv210_iis2_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PV210_PA_IIS2,</div><div class='del'>-		.end   = S5PV210_PA_IIS2 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_I2S2_TX,</div><div class='del'>-		.end   = DMACH_I2S2_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_I2S2_RX,</div><div class='del'>-		.end   = DMACH_I2S2_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PV210_PA_IIS2, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_I2S2_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_I2S2_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5pv210_device_iis2 = {</div><div class='hunk'>@@ -188,21 +148,9 @@ static struct s3c_audio_pdata s3c_pcm_pdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pv210_pcm0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PV210_PA_PCM0,</div><div class='del'>-		.end   = S5PV210_PA_PCM0 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_PCM0_TX,</div><div class='del'>-		.end   = DMACH_PCM0_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_PCM0_RX,</div><div class='del'>-		.end   = DMACH_PCM0_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PV210_PA_PCM0, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_PCM0_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_PCM0_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5pv210_device_pcm0 = {</div><div class='hunk'>@@ -216,21 +164,9 @@ struct platform_device s5pv210_device_pcm0 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pv210_pcm1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PV210_PA_PCM1,</div><div class='del'>-		.end   = S5PV210_PA_PCM1 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_PCM1_TX,</div><div class='del'>-		.end   = DMACH_PCM1_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_PCM1_RX,</div><div class='del'>-		.end   = DMACH_PCM1_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PV210_PA_PCM1, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_PCM1_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_PCM1_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5pv210_device_pcm1 = {</div><div class='hunk'>@@ -244,21 +180,9 @@ struct platform_device s5pv210_device_pcm1 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pv210_pcm2_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PV210_PA_PCM2,</div><div class='del'>-		.end   = S5PV210_PA_PCM2 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_PCM2_TX,</div><div class='del'>-		.end   = DMACH_PCM2_TX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_PCM2_RX,</div><div class='del'>-		.end   = DMACH_PCM2_RX,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PV210_PA_PCM2, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_PCM2_TX),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_PCM2_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5pv210_device_pcm2 = {</div><div class='hunk'>@@ -279,31 +203,11 @@ static int s5pv210_ac97_cfg_gpio(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pv210_ac97_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S5PV210_PA_AC97,</div><div class='del'>-		.end   = S5PV210_PA_AC97 + 0x100 - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = DMACH_AC97_PCMOUT,</div><div class='del'>-		.end   = DMACH_AC97_PCMOUT,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = DMACH_AC97_PCMIN,</div><div class='del'>-		.end   = DMACH_AC97_PCMIN,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[3] = {</div><div class='del'>-		.start = DMACH_AC97_MICIN,</div><div class='del'>-		.end   = DMACH_AC97_MICIN,</div><div class='del'>-		.flags = IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='del'>-	[4] = {</div><div class='del'>-		.start = IRQ_AC97,</div><div class='del'>-		.end   = IRQ_AC97,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PV210_PA_AC97, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT),</div><div class='add'>+	[2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN),</div><div class='add'>+	[3] = DEFINE_RES_DMA(DMACH_AC97_MICIN),</div><div class='add'>+	[4] = DEFINE_RES_IRQ(IRQ_AC97),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_audio_pdata s3c_ac97_pdata = {</div><div class='hunk'>@@ -334,16 +238,8 @@ static int s5pv210_spdif_cfg_gpio(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource s5pv210_spdif_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5PV210_PA_SPDIF,</div><div class='del'>-		.end	= S5PV210_PA_SPDIF + 0x100 - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= DMACH_SPDIF,</div><div class='del'>-		.end	= DMACH_SPDIF,</div><div class='del'>-		.flags	= IORESOURCE_DMA,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PV210_PA_SPDIF, SZ_256),</div><div class='add'>+	[1] = DEFINE_RES_DMA(DMACH_SPDIF),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_audio_pdata samsung_spdif_pdata = {</div><div class='head'>diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c<br/>index 48d018f2332b..af528f9e97f9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s5pv210/mach-aquila.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s5pv210/mach-aquila.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s5pv210/mach-aquila.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pv210/mach-aquila.c</a></div><div class='hunk'>@@ -96,38 +96,34 @@ static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {</div><div class='ctx'> </div><div class='ctx'> /* Frame Buffer */</div><div class='ctx'> static struct s3c_fb_pd_win aquila_fb_win0 = {</div><div class='del'>-	.win_mode = {</div><div class='del'>-		.left_margin = 16,</div><div class='del'>-		.right_margin = 16,</div><div class='del'>-		.upper_margin = 3,</div><div class='del'>-		.lower_margin = 28,</div><div class='del'>-		.hsync_len = 2,</div><div class='del'>-		.vsync_len = 2,</div><div class='del'>-		.xres = 480,</div><div class='del'>-		.yres = 800,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp = 32,</div><div class='ctx'> 	.default_bpp = 16,</div><div class='add'>+	.xres = 480,</div><div class='add'>+	.yres = 800,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_pd_win aquila_fb_win1 = {</div><div class='del'>-	.win_mode = {</div><div class='del'>-		.left_margin = 16,</div><div class='del'>-		.right_margin = 16,</div><div class='del'>-		.upper_margin = 3,</div><div class='del'>-		.lower_margin = 28,</div><div class='del'>-		.hsync_len = 2,</div><div class='del'>-		.vsync_len = 2,</div><div class='del'>-		.xres = 480,</div><div class='del'>-		.yres = 800,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp = 32,</div><div class='ctx'> 	.default_bpp = 16,</div><div class='add'>+	.xres = 480,</div><div class='add'>+	.yres = 800,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode aquila_lcd_timing = {</div><div class='add'>+	.left_margin = 16,</div><div class='add'>+	.right_margin = 16,</div><div class='add'>+	.upper_margin = 3,</div><div class='add'>+	.lower_margin = 28,</div><div class='add'>+	.hsync_len = 2,</div><div class='add'>+	.vsync_len = 2,</div><div class='add'>+	.xres = 480,</div><div class='add'>+	.yres = 800,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {</div><div class='ctx'> 	.win[0]		= &amp;aquila_fb_win0,</div><div class='ctx'> 	.win[1]		= &amp;aquila_fb_win1,</div><div class='add'>+	.vtiming	= &amp;aquila_lcd_timing,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |</div><div class='ctx'> 			  VIDCON1_INV_VCLK | VIDCON1_INV_VDEN,</div><div class='head'>diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c<br/>index 32395664e879..bf5087c2b7fe 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s5pv210/mach-goni.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s5pv210/mach-goni.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s5pv210/mach-goni.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pv210/mach-goni.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/mmc/host.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/s3c-hsotg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/hardware/vic.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='hunk'>@@ -106,25 +107,29 @@ static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = {</div><div class='ctx'> </div><div class='ctx'> /* Frame Buffer */</div><div class='ctx'> static struct s3c_fb_pd_win goni_fb_win0 = {</div><div class='del'>-	.win_mode = {</div><div class='del'>-		.left_margin	= 16,</div><div class='del'>-		.right_margin	= 16,</div><div class='del'>-		.upper_margin	= 2,</div><div class='del'>-		.lower_margin	= 28,</div><div class='del'>-		.hsync_len	= 2,</div><div class='del'>-		.vsync_len	= 1,</div><div class='del'>-		.xres		= 480,</div><div class='del'>-		.yres		= 800,</div><div class='del'>-		.refresh	= 55,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 32,</div><div class='ctx'> 	.default_bpp	= 16,</div><div class='add'>+	.xres		= 480,</div><div class='add'>+	.yres		= 800,</div><div class='ctx'> 	.virtual_x	= 480,</div><div class='ctx'> 	.virtual_y	= 2 * 800,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct fb_videomode goni_lcd_timing = {</div><div class='add'>+	.left_margin	= 16,</div><div class='add'>+	.right_margin	= 16,</div><div class='add'>+	.upper_margin	= 2,</div><div class='add'>+	.lower_margin	= 28,</div><div class='add'>+	.hsync_len	= 2,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 480,</div><div class='add'>+	.yres		= 800,</div><div class='add'>+	.refresh	= 55,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct s3c_fb_platdata goni_lcd_pdata __initdata = {</div><div class='ctx'> 	.win[0]		= &amp;goni_fb_win0,</div><div class='add'>+	.vtiming	= &amp;goni_lcd_timing,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |</div><div class='ctx'> 			  VIDCON0_CLKSEL_LCD,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_VCLK | VIDCON1_INV_VDEN</div><div class='hunk'>@@ -278,6 +283,9 @@ static void __init goni_tsp_init(void)</div><div class='ctx'> 	i2c2_devs[0].irq = gpio_to_irq(gpio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* USB OTG */</div><div class='add'>+static struct s3c_hsotg_plat goni_hsotg_pdata;</div><div class='add'>+</div><div class='ctx'> static void goni_camera_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	s5pv210_fimc_setup_gpio(S5P_CAMPORT_A);</div><div class='hunk'>@@ -941,6 +949,8 @@ static void __init goni_machine_init(void)</div><div class='ctx'> 	s3c_set_platdata(&amp;goni_fimc_md_platdata, sizeof(goni_fimc_md_platdata),</div><div class='ctx'> 			 &amp;s5p_device_fimc_md);</div><div class='ctx'> </div><div class='add'>+	s3c_hsotg_set_platdata(&amp;goni_hsotg_pdata);</div><div class='add'>+</div><div class='ctx'> 	goni_camera_init();</div><div class='ctx'> </div><div class='ctx'> 	/* SPI */</div><div class='head'>diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c<br/>index 91d4ad8bcc73..0d7ddec88eb7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-s5pv210/mach-smdkv210.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-s5pv210/mach-smdkv210.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-s5pv210/mach-smdkv210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-s5pv210/mach-smdkv210.c</a></div><div class='hunk'>@@ -119,21 +119,10 @@ static struct samsung_keypad_platdata smdkv210_keypad_data __initdata = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource smdkv210_dm9000_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5PV210_PA_SROM_BANK5,</div><div class='del'>-		.end	= S5PV210_PA_SROM_BANK5,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= S5PV210_PA_SROM_BANK5 + 2,</div><div class='del'>-		.end	= S5PV210_PA_SROM_BANK5 + 2,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start	= IRQ_EINT(9),</div><div class='del'>-		.end	= IRQ_EINT(9),</div><div class='del'>-		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5PV210_PA_SROM_BANK5, 1),</div><div class='add'>+	[1] = DEFINE_RES_MEM(S5PV210_PA_SROM_BANK5 + 2, 1),</div><div class='add'>+	[2] = DEFINE_RES_NAMED(IRQ_EINT(9), 1, NULL, IORESOURCE_IRQ \</div><div class='add'>+				| IORESOURCE_IRQ_HIGHLEVEL),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct dm9000_plat_data smdkv210_dm9000_platdata = {</div><div class='hunk'>@@ -189,22 +178,26 @@ static struct platform_device smdkv210_lcd_lte480wv = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_pd_win smdkv210_fb_win0 = {</div><div class='del'>-	.win_mode = {</div><div class='del'>-		.left_margin	= 13,</div><div class='del'>-		.right_margin	= 8,</div><div class='del'>-		.upper_margin	= 7,</div><div class='del'>-		.lower_margin	= 5,</div><div class='del'>-		.hsync_len	= 3,</div><div class='del'>-		.vsync_len	= 1,</div><div class='del'>-		.xres		= 800,</div><div class='del'>-		.yres		= 480,</div><div class='del'>-	},</div><div class='ctx'> 	.max_bpp	= 32,</div><div class='ctx'> 	.default_bpp	= 24,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct fb_videomode smdkv210_lcd_timing = {</div><div class='add'>+	.left_margin	= 13,</div><div class='add'>+	.right_margin	= 8,</div><div class='add'>+	.upper_margin	= 7,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.hsync_len	= 3,</div><div class='add'>+	.vsync_len	= 1,</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct s3c_fb_platdata smdkv210_lcd0_pdata __initdata = {</div><div class='ctx'> 	.win[0]		= &amp;smdkv210_fb_win0,</div><div class='add'>+	.vtiming	= &amp;smdkv210_lcd_timing,</div><div class='ctx'> 	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,</div><div class='ctx'> 	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,</div><div class='ctx'> 	.setup_gpio	= s5pv210_fb_gpio_setup_24bpp,</div><div class='head'>diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c<br/>index 375d3f779a88..d1dc7f1a239c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/assabet.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/assabet.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/assabet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/assabet.c</a></div><div class='hunk'>@@ -538,6 +538,7 @@ MACHINE_START(ASSABET, "Intel-Assabet")</div><div class='ctx'> 	.init_irq	= sa1100_init_irq,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> 	.init_machine	= assabet_init,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> #ifdef CONFIG_SA1111</div><div class='ctx'> 	.dma_zone_size	= SZ_1M,</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c<br/>index e0f0c030258c..b30fb99b587c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/badge4.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/badge4.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/badge4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/badge4.c</a></div><div class='hunk'>@@ -305,6 +305,7 @@ MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")</div><div class='ctx'> 	.map_io		= badge4_map_io,</div><div class='ctx'> 	.nr_irqs	= SA1100_NR_IRQS,</div><div class='ctx'> 	.init_irq	= sa1100_init_irq,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> #ifdef CONFIG_SA1111</div><div class='ctx'> 	.dma_zone_size	= SZ_1M,</div><div class='head'>diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c<br/>index 4a61f60e0502..09d7f4b4b354 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/cerf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/cerf.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/cerf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/cerf.c</a></div><div class='hunk'>@@ -134,5 +134,6 @@ MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")</div><div class='ctx'> 	.init_irq	= cerf_init_irq,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> 	.init_machine	= cerf_init,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> 	.restart	= sa11x0_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c<br/>index c7f418b0cde9..ea5cff38745c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/collie.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/collie.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/collie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/collie.c</a></div><div class='hunk'>@@ -401,5 +401,6 @@ MACHINE_START(COLLIE, "Sharp-Collie")</div><div class='ctx'> 	.init_irq	= sa1100_init_irq,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> 	.init_machine	= collie_init,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> 	.restart	= sa11x0_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c<br/>index 16be4c56abe3..9db3e98e8b85 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/generic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/generic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/generic.c</a></div><div class='hunk'>@@ -359,6 +359,10 @@ static int __init sa1100_init(void)</div><div class='ctx'> </div><div class='ctx'> arch_initcall(sa1100_init);</div><div class='ctx'> </div><div class='add'>+void __init sa11x0_init_late(void)</div><div class='add'>+{</div><div class='add'>+	sa11x0_pm_init();</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Common I/O mapping:</div><div class='head'>diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h<br/>index 9eb3b3cd5a63..a5b7c13da3e3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/generic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/generic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/generic.h</a></div><div class='hunk'>@@ -11,6 +11,7 @@ extern void __init sa1100_map_io(void);</div><div class='ctx'> extern void __init sa1100_init_irq(void);</div><div class='ctx'> extern void __init sa1100_init_gpio(void);</div><div class='ctx'> extern void sa11x0_restart(char, const char *);</div><div class='add'>+extern void sa11x0_init_late(void);</div><div class='ctx'> </div><div class='ctx'> #define SET_BANK(__nr,__start,__size) \</div><div class='ctx'> 	mi-&gt;bank[__nr].start = (__start), \</div><div class='hunk'>@@ -41,3 +42,9 @@ void sa11x0_register_mcp(struct mcp_plat_data *data);</div><div class='ctx'> </div><div class='ctx'> struct sa1100fb_mach_info;</div><div class='ctx'> void sa11x0_register_lcd(struct sa1100fb_mach_info *inf);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+int sa11x0_pm_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int sa11x0_pm_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c<br/>index b2e8d0f418e0..e1571eab08ae 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/h3100.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/h3100.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/h3100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/h3100.c</a></div><div class='hunk'>@@ -110,6 +110,7 @@ MACHINE_START(H3100, "Compaq iPAQ H3100")</div><div class='ctx'> 	.init_irq	= sa1100_init_irq,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> 	.init_machine	= h3100_mach_init,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> 	.restart	= sa11x0_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c<br/>index cb6659f294fe..ba7a2901ab88 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/h3600.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/h3600.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/h3600.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/h3600.c</a></div><div class='hunk'>@@ -160,6 +160,7 @@ MACHINE_START(H3600, "Compaq iPAQ H3600")</div><div class='ctx'> 	.init_irq	= sa1100_init_irq,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> 	.init_machine	= h3600_mach_init,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> 	.restart	= sa11x0_restart,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c<br/>index 5535475bf583..7f86bd911826 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/hackkit.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/hackkit.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/hackkit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/hackkit.c</a></div><div class='hunk'>@@ -199,5 +199,6 @@ MACHINE_START(HACKKIT, "HackKit Cpu Board")</div><div class='ctx'> 	.init_irq	= sa1100_init_irq,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> 	.init_machine	= hackkit_init,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> 	.restart	= sa11x0_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c<br/>index ca7a7e834720..e3084f47027d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/jornada720.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/jornada720.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/jornada720.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/jornada720.c</a></div><div class='hunk'>@@ -348,6 +348,7 @@ MACHINE_START(JORNADA720, "HP Jornada 720")</div><div class='ctx'> 	.init_irq	= sa1100_init_irq,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> 	.init_machine	= jornada720_mach_init,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> #ifdef CONFIG_SA1111</div><div class='ctx'> 	.dma_zone_size	= SZ_1M,</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c<br/>index eb6534e0b0d0..b775a0abec0a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/lart.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/lart.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/lart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/lart.c</a></div><div class='hunk'>@@ -147,6 +147,7 @@ MACHINE_START(LART, "LART")</div><div class='ctx'> 	.nr_irqs	= SA1100_NR_IRQS,</div><div class='ctx'> 	.init_irq	= sa1100_init_irq,</div><div class='ctx'> 	.init_machine	= lart_init,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> 	.restart	= sa11x0_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c<br/>index 8f6446b9f025..41f69d97066f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/nanoengine.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/nanoengine.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/nanoengine.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/nanoengine.c</a></div><div class='hunk'>@@ -112,5 +112,6 @@ MACHINE_START(NANOENGINE, "BSE nanoEngine")</div><div class='ctx'> 	.init_irq	= sa1100_init_irq,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> 	.init_machine	= nanoengine_init,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> 	.restart	= sa11x0_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c<br/>index 6c58f01b358a..266db873a4e4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/neponset.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/neponset.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/neponset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/neponset.c</a></div><div class='hunk'>@@ -89,6 +89,7 @@ void neponset_ncr_frob(unsigned int mask, unsigned int val)</div><div class='ctx'> 		WARN(1, "nep_base unset\n");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(neponset_ncr_frob);</div><div class='ctx'> </div><div class='ctx'> static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c<br/>index b49108b890a8..ff02e2da99f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/pci-nanoengine.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/pci-nanoengine.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/pci-nanoengine.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/pci-nanoengine.c</a></div><div class='hunk'>@@ -129,12 +129,6 @@ static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot,</div><div class='ctx'> 	return NANOENGINE_IRQ_GPIO_PCI;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct pci_bus * __init pci_nanoengine_scan_bus(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	return pci_scan_root_bus(NULL, sys-&gt;busnr, &amp;pci_nano_ops, sys,</div><div class='del'>-				 &amp;sys-&gt;resources);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct resource pci_io_ports =</div><div class='ctx'> 	DEFINE_RES_IO_NAMED(0x400, 0x400, "PCI IO");</div><div class='ctx'> </div><div class='hunk'>@@ -274,7 +268,7 @@ int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> static struct hw_pci nanoengine_pci __initdata = {</div><div class='ctx'> 	.map_irq		= pci_nanoengine_map_irq,</div><div class='ctx'> 	.nr_controllers		= 1,</div><div class='del'>-	.scan			= pci_nanoengine_scan_bus,</div><div class='add'>+	.ops			= &amp;pci_nano_ops,</div><div class='ctx'> 	.setup			= pci_nanoengine_setup,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c<br/>index 1602575a0d5c..37fe0a0a5369 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/pleb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/pleb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/pleb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/pleb.c</a></div><div class='hunk'>@@ -135,5 +135,6 @@ MACHINE_START(PLEB, "PLEB")</div><div class='ctx'> 	.init_irq	= sa1100_init_irq,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> 	.init_machine   = pleb_init,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> 	.restart	= sa11x0_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c<br/>index 2fa499ec6afe..690cf0ce5c0c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/pm.c</a></div><div class='hunk'>@@ -117,10 +117,8 @@ static const struct platform_suspend_ops sa11x0_pm_ops = {</div><div class='ctx'> 	.valid		= suspend_valid_only_mem,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init sa11x0_pm_init(void)</div><div class='add'>+int __init sa11x0_pm_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	suspend_set_ops(&amp;sa11x0_pm_ops);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-late_initcall(sa11x0_pm_init);</div><div class='head'>diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c<br/>index ca8bf59b9047..5d33fc3108ef 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/shannon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/shannon.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/shannon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/shannon.c</a></div><div class='hunk'>@@ -104,5 +104,6 @@ MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")</div><div class='ctx'> 	.init_irq	= sa1100_init_irq,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> 	.init_machine	= shannon_init,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> 	.restart	= sa11x0_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c<br/>index 3efae03cb3d7..fbd53593be54 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-sa1100/simpad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-sa1100/simpad.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-sa1100/simpad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-sa1100/simpad.c</a></div><div class='hunk'>@@ -395,6 +395,7 @@ MACHINE_START(SIMPAD, "Simpad")</div><div class='ctx'> 	.map_io		= simpad_map_io,</div><div class='ctx'> 	.nr_irqs	= SA1100_NR_IRQS,</div><div class='ctx'> 	.init_irq	= sa1100_init_irq,</div><div class='add'>+	.init_late	= sa11x0_init_late,</div><div class='ctx'> 	.timer		= &amp;sa1100_timer,</div><div class='ctx'> 	.restart	= sa11x0_restart,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-shark/pci.c b/arch/arm/mach-shark/pci.c<br/>index 7cb79a092f31..9089407d5326 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shark/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shark/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shark/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shark/pci.c</a></div><div class='hunk'>@@ -29,10 +29,9 @@ extern void __init via82c505_preinit(void);</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci shark_pci __initdata = {</div><div class='ctx'> 	.setup		= via82c505_setup,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.map_irq	= shark_map_irq,</div><div class='ctx'> 	.nr_controllers = 1,</div><div class='del'>-	.scan		= via82c505_scan_bus,</div><div class='add'>+	.ops		= &amp;via82c505_ops,</div><div class='ctx'> 	.preinit	= via82c505_preinit,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig<br/>index 34560cab45d9..df33909205e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/Kconfig</a></div><div class='hunk'>@@ -41,6 +41,12 @@ config ARCH_R8A7779</div><div class='ctx'> 	select ARM_GIC</div><div class='ctx'> 	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='ctx'> </div><div class='add'>+config ARCH_EMEV2</div><div class='add'>+	bool "Emma Mobile EV2"</div><div class='add'>+	select CPU_V7</div><div class='add'>+	select ARM_GIC</div><div class='add'>+	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='add'>+</div><div class='ctx'> comment "SH-Mobile Board Type"</div><div class='ctx'> </div><div class='ctx'> config MACH_G3EVM</div><div class='hunk'>@@ -58,6 +64,7 @@ config MACH_AP4EVB</div><div class='ctx'> 	depends on ARCH_SH7372</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	select SH_LCD_MIPI_DSI</div><div class='add'>+	select SND_SOC_AK4642 if SND_SIMPLE_CARD</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='ctx'> 	prompt "AP4EVB LCD panel selection"</div><div class='hunk'>@@ -82,6 +89,7 @@ config MACH_MACKEREL</div><div class='ctx'> 	bool "mackerel board"</div><div class='ctx'> 	depends on ARCH_SH7372</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='add'>+	select SND_SOC_AK4642 if SND_SIMPLE_CARD</div><div class='ctx'> </div><div class='ctx'> config MACH_KOTA2</div><div class='ctx'> 	bool "KOTA2 board"</div><div class='hunk'>@@ -93,11 +101,28 @@ config MACH_BONITO</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	depends on ARCH_R8A7740</div><div class='ctx'> </div><div class='add'>+config MACH_ARMADILLO800EVA</div><div class='add'>+	bool "Armadillo-800 EVA board"</div><div class='add'>+	depends on ARCH_R8A7740</div><div class='add'>+	select ARCH_REQUIRE_GPIOLIB</div><div class='add'>+	select USE_OF</div><div class='add'>+</div><div class='ctx'> config MACH_MARZEN</div><div class='ctx'> 	bool "MARZEN board"</div><div class='ctx'> 	depends on ARCH_R8A7779</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> </div><div class='add'>+config MACH_KZM9D</div><div class='add'>+	bool "KZM9D board"</div><div class='add'>+	depends on ARCH_EMEV2</div><div class='add'>+	select USE_OF</div><div class='add'>+</div><div class='add'>+config MACH_KZM9G</div><div class='add'>+	bool "KZM-A9-GT board"</div><div class='add'>+	depends on ARCH_SH73A0</div><div class='add'>+	select ARCH_REQUIRE_GPIOLIB</div><div class='add'>+	select USE_OF</div><div class='add'>+</div><div class='ctx'> comment "SH-Mobile System Configuration"</div><div class='ctx'> </div><div class='ctx'> config CPU_HAS_INTEVT</div><div class='hunk'>@@ -110,7 +135,8 @@ config MEMORY_START</div><div class='ctx'> 	hex "Physical memory start address"</div><div class='ctx'> 	default "0x50000000" if MACH_G3EVM</div><div class='ctx'> 	default "0x40000000" if MACH_G4EVM || MACH_AP4EVB || MACH_AG5EVM || \</div><div class='del'>-				MACH_MACKEREL || MACH_BONITO</div><div class='add'>+				MACH_MACKEREL || MACH_BONITO || \</div><div class='add'>+				MACH_ARMADILLO800EVA</div><div class='ctx'> 	default "0x41000000" if MACH_KOTA2</div><div class='ctx'> 	default "0x00000000"</div><div class='ctx'> 	---help---</div><div class='hunk'>@@ -122,7 +148,8 @@ config MEMORY_SIZE</div><div class='ctx'> 	hex "Physical memory size"</div><div class='ctx'> 	default "0x08000000" if MACH_G3EVM</div><div class='ctx'> 	default "0x08000000" if MACH_G4EVM</div><div class='del'>-	default "0x20000000" if MACH_AG5EVM || MACH_BONITO</div><div class='add'>+	default "0x20000000" if MACH_AG5EVM || MACH_BONITO || \</div><div class='add'>+				MACH_ARMADILLO800EVA</div><div class='ctx'> 	default "0x1e000000" if MACH_KOTA2</div><div class='ctx'> 	default "0x10000000" if MACH_AP4EVB || MACH_MACKEREL</div><div class='ctx'> 	default "0x04000000"</div><div class='hunk'>@@ -159,6 +186,12 @@ config SH_TIMER_TMU</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables build of the TMU timer driver.</div><div class='ctx'> </div><div class='add'>+config EM_TIMER_STI</div><div class='add'>+	bool "STI timer driver"</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  This enables build of the STI timer driver.</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> config SH_CLK_CPG</div><div class='head'>diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile<br/>index e7c2590b75d9..8aa1962c22a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/Makefile</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> # Common objects</div><div class='del'>-obj-y				:= timer.o console.o clock.o</div><div class='add'>+obj-y				:= timer.o console.o clock.o common.o</div><div class='ctx'> </div><div class='ctx'> # CPU objects</div><div class='ctx'> obj-$(CONFIG_ARCH_SH7367)	+= setup-sh7367.o clock-sh7367.o intc-sh7367.o</div><div class='hunk'>@@ -12,12 +12,14 @@ obj-$(CONFIG_ARCH_SH7372)	+= setup-sh7372.o clock-sh7372.o intc-sh7372.o</div><div class='ctx'> obj-$(CONFIG_ARCH_SH73A0)	+= setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o</div><div class='ctx'> obj-$(CONFIG_ARCH_R8A7740)	+= setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o</div><div class='ctx'> obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o clock-r8a7779.o intc-r8a7779.o</div><div class='add'>+obj-$(CONFIG_ARCH_EMEV2)	+= setup-emev2.o clock-emev2.o</div><div class='ctx'> </div><div class='ctx'> # SMP objects</div><div class='ctx'> smp-y				:= platsmp.o headsmp.o</div><div class='ctx'> smp-$(CONFIG_HOTPLUG_CPU)	+= hotplug.o</div><div class='ctx'> smp-$(CONFIG_ARCH_SH73A0)	+= smp-sh73a0.o</div><div class='ctx'> smp-$(CONFIG_ARCH_R8A7779)	+= smp-r8a7779.o</div><div class='add'>+smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o</div><div class='ctx'> </div><div class='ctx'> # Pinmux setup</div><div class='ctx'> pfc-y				:=</div><div class='hunk'>@@ -49,6 +51,9 @@ obj-$(CONFIG_MACH_MACKEREL)	+= board-mackerel.o</div><div class='ctx'> obj-$(CONFIG_MACH_KOTA2)	+= board-kota2.o</div><div class='ctx'> obj-$(CONFIG_MACH_BONITO)	+= board-bonito.o</div><div class='ctx'> obj-$(CONFIG_MACH_MARZEN)	+= board-marzen.o</div><div class='add'>+obj-$(CONFIG_MACH_ARMADILLO800EVA)	+= board-armadillo800eva.o</div><div class='add'>+obj-$(CONFIG_MACH_KZM9D)	+= board-kzm9d.o</div><div class='add'>+obj-$(CONFIG_MACH_KZM9G)	+= board-kzm9g.o</div><div class='ctx'> </div><div class='ctx'> # Framework support</div><div class='ctx'> obj-$(CONFIG_SMP)		+= $(smp-y)</div><div class='head'>diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c<br/>index cb224a344af0..5a6f22f05e99 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-ag5evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/board-ag5evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-ag5evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-ag5evm.c</a></div><div class='hunk'>@@ -365,23 +365,13 @@ static struct platform_device mipidsi0_device = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* SDHI0 */</div><div class='del'>-static irqreturn_t ag5evm_sdhi0_gpio_cd(int irq, void *arg)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = arg;</div><div class='del'>-	struct sh_mobile_sdhi_info *info = dev-&gt;platform_data;</div><div class='del'>-	struct tmio_mmc_data *pdata = info-&gt;pdata;</div><div class='del'>-</div><div class='del'>-	tmio_mmc_cd_wakeup(pdata);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct sh_mobile_sdhi_info sdhi0_info = {</div><div class='ctx'> 	.dma_slave_tx	= SHDMA_SLAVE_SDHI0_TX,</div><div class='ctx'> 	.dma_slave_rx	= SHDMA_SLAVE_SDHI0_RX,</div><div class='del'>-	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT,</div><div class='add'>+	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,</div><div class='ctx'> 	.tmio_caps	= MMC_CAP_SD_HIGHSPEED,</div><div class='ctx'> 	.tmio_ocr_mask	= MMC_VDD_27_28 | MMC_VDD_28_29,</div><div class='add'>+	.cd_gpio	= GPIO_PORT251,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource sdhi0_resources[] = {</div><div class='hunk'>@@ -557,7 +547,6 @@ static void __init ag5evm_init(void)</div><div class='ctx'> 	lcd_backlight_reset();</div><div class='ctx'> </div><div class='ctx'> 	/* enable SDHI0 on CN15 [SD I/F] */</div><div class='del'>-	gpio_request(GPIO_FN_SDHICD0, NULL);</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHIWP0, NULL);</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHICMD0, NULL);</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHICLK0, NULL);</div><div class='hunk'>@@ -566,13 +555,6 @@ static void __init ag5evm_init(void)</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHID0_1, NULL);</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHID0_0, NULL);</div><div class='ctx'> </div><div class='del'>-	if (!request_irq(intcs_evt2irq(0x3c0), ag5evm_sdhi0_gpio_cd,</div><div class='del'>-			 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,</div><div class='del'>-			 "sdhi0 cd", &amp;sdhi0_device.dev))</div><div class='del'>-		sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;</div><div class='del'>-	else</div><div class='del'>-		pr_warn("Unable to setup SDHI0 GPIO IRQ\n");</div><div class='del'>-</div><div class='ctx'> 	/* enable SDHI1 on CN4 [WLAN I/F] */</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHICLK1, NULL);</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHICMD1_PU, NULL);</div><div class='hunk'>@@ -598,5 +580,6 @@ MACHINE_START(AG5EVM, "ag5evm")</div><div class='ctx'> 	.init_irq	= sh73a0_init_irq,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= ag5evm_init,</div><div class='add'>+	.init_late	= shmobile_init_late,</div><div class='ctx'> 	.timer		= &amp;shmobile_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c<br/>index b56dde2732bb..ace60246a5df 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-ap4evb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/board-ap4evb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-ap4evb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-ap4evb.c</a></div><div class='hunk'>@@ -50,6 +50,7 @@</div><div class='ctx'> #include &lt;media/soc_camera.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;sound/sh_fsi.h&gt;</div><div class='add'>+#include &lt;sound/simple_card.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;video/sh_mobile_hdmi.h&gt;</div><div class='ctx'> #include &lt;video/sh_mobile_lcdc.h&gt;</div><div class='hunk'>@@ -785,17 +786,25 @@ static struct platform_device fsi_device = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct fsi_ak4642_info fsi2_ak4643_info = {</div><div class='add'>+static struct asoc_simple_dai_init_info fsi2_ak4643_init_info = {</div><div class='add'>+	.fmt		= SND_SOC_DAIFMT_LEFT_J,</div><div class='add'>+	.codec_daifmt	= SND_SOC_DAIFMT_CBM_CFM,</div><div class='add'>+	.cpu_daifmt	= SND_SOC_DAIFMT_CBS_CFS,</div><div class='add'>+	.sysclk		= 11289600,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct asoc_simple_card_info fsi2_ak4643_info = {</div><div class='ctx'> 	.name		= "AK4643",</div><div class='ctx'> 	.card		= "FSI2A-AK4643",</div><div class='ctx'> 	.cpu_dai	= "fsia-dai",</div><div class='ctx'> 	.codec		= "ak4642-codec.0-0013",</div><div class='ctx'> 	.platform	= "sh_fsi2",</div><div class='del'>-	.id		= FSI_PORT_A,</div><div class='add'>+	.codec_dai	= "ak4642-hifi",</div><div class='add'>+	.init		= &amp;fsi2_ak4643_init_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device fsi_ak4643_device = {</div><div class='del'>-	.name	= "fsi-ak4642-audio",</div><div class='add'>+	.name	= "asoc-simple-card",</div><div class='ctx'> 	.dev	= {</div><div class='ctx'> 		.platform_data	= &amp;fsi2_ak4643_info,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -900,8 +909,26 @@ static struct platform_device lcdc1_device = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {</div><div class='add'>+	.cpu_daifmt	= SND_SOC_DAIFMT_CBM_CFM,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct asoc_simple_card_info fsi2_hdmi_info = {</div><div class='add'>+	.name		= "HDMI",</div><div class='add'>+	.card		= "FSI2B-HDMI",</div><div class='add'>+	.cpu_dai	= "fsib-dai",</div><div class='add'>+	.codec		= "sh-mobile-hdmi",</div><div class='add'>+	.platform	= "sh_fsi2",</div><div class='add'>+	.codec_dai	= "sh_mobile_hdmi-hifi",</div><div class='add'>+	.init		= &amp;fsi2_hdmi_init_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct platform_device fsi_hdmi_device = {</div><div class='del'>-	.name		= "sh_fsi2_b_hdmi",</div><div class='add'>+	.name	= "asoc-simple-card",</div><div class='add'>+	.id	= 1,</div><div class='add'>+	.dev	= {</div><div class='add'>+		.platform_data	= &amp;fsi2_hdmi_info,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct gpio_led ap4evb_leds[] = {</div><div class='hunk'>@@ -997,6 +1024,8 @@ static struct sh_mobile_ceu_companion csi2 = {</div><div class='ctx'> </div><div class='ctx'> static struct sh_mobile_ceu_info sh_mobile_ceu_info = {</div><div class='ctx'> 	.flags = SH_CEU_FLAG_USE_8BIT_BUS,</div><div class='add'>+	.max_width = 8188,</div><div class='add'>+	.max_height = 8188,</div><div class='ctx'> 	.csi2 = &amp;csi2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1440,5 +1469,6 @@ MACHINE_START(AP4EVB, "ap4evb")</div><div class='ctx'> 	.init_irq	= sh7372_init_irq,</div><div class='ctx'> 	.handle_irq	= shmobile_handle_irq_intc,</div><div class='ctx'> 	.init_machine	= ap4evb_init,</div><div class='add'>+	.init_late	= shmobile_init_late,</div><div class='ctx'> 	.timer		= &amp;shmobile_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c<br/>new file mode 100644<br/>index 000000000000..9e37026ef9dd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-armadillo800eva.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-armadillo800eva.c</a></div><div class='hunk'>@@ -0,0 +1,784 @@</div><div class='add'>+/*</div><div class='add'>+ * armadillo 800 eva board support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Renesas Solutions Corp.</div><div class='add'>+ * Copyright (C) 2012 Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 of the License.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/gpio_keys.h&gt;</div><div class='add'>+#include &lt;linux/sh_eth.h&gt;</div><div class='add'>+#include &lt;linux/videodev2.h&gt;</div><div class='add'>+#include &lt;linux/usb/renesas_usbhs.h&gt;</div><div class='add'>+#include &lt;linux/mfd/tmio.h&gt;</div><div class='add'>+#include &lt;linux/mmc/host.h&gt;</div><div class='add'>+#include &lt;linux/mmc/sh_mmcif.h&gt;</div><div class='add'>+#include &lt;linux/mmc/sh_mobile_sdhi.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include &lt;mach/irqs.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+#include &lt;asm/mach-types.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/mach/map.h&gt;</div><div class='add'>+#include &lt;asm/mach/time.h&gt;</div><div class='add'>+#include &lt;asm/hardware/cache-l2x0.h&gt;</div><div class='add'>+#include &lt;mach/r8a7740.h&gt;</div><div class='add'>+#include &lt;video/sh_mobile_lcdc.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * CON1		Camera Module</div><div class='add'>+ * CON2		Extension Bus</div><div class='add'>+ * CON3		HDMI Output</div><div class='add'>+ * CON4		Composite Video Output</div><div class='add'>+ * CON5		H-UDI JTAG</div><div class='add'>+ * CON6		ARM JTAG</div><div class='add'>+ * CON7		SD1</div><div class='add'>+ * CON8		SD2</div><div class='add'>+ * CON9		RTC BackUp</div><div class='add'>+ * CON10	Monaural Mic Input</div><div class='add'>+ * CON11	Stereo Headphone Output</div><div class='add'>+ * CON12	Audio Line Output(L)</div><div class='add'>+ * CON13	Audio Line Output(R)</div><div class='add'>+ * CON14	AWL13 Module</div><div class='add'>+ * CON15	Extension</div><div class='add'>+ * CON16	LCD1</div><div class='add'>+ * CON17	LCD2</div><div class='add'>+ * CON19	Power Input</div><div class='add'>+ * CON20	USB1</div><div class='add'>+ * CON21	USB2</div><div class='add'>+ * CON22	Serial</div><div class='add'>+ * CON23	LAN</div><div class='add'>+ * CON24	USB3</div><div class='add'>+ * LED1		Camera LED(Yellow)</div><div class='add'>+ * LED2		Power LED (Green)</div><div class='add'>+ * ED3-LED6	User LED(Yellow)</div><div class='add'>+ * LED7		LAN link LED(Green)</div><div class='add'>+ * LED8		LAN activity LED(Yellow)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DipSwitch</div><div class='add'>+ *</div><div class='add'>+ *                    SW1</div><div class='add'>+ *</div><div class='add'>+ * -12345678-+---------------+----------------------------</div><div class='add'>+ *  1        | boot          | hermit</div><div class='add'>+ *  0        | boot          | OS auto boot</div><div class='add'>+ * -12345678-+---------------+----------------------------</div><div class='add'>+ *   00      | boot device   | eMMC</div><div class='add'>+ *   10      | boot device   | SDHI0 (CON7)</div><div class='add'>+ *   01      | boot device   | -</div><div class='add'>+ *   11      | boot device   | Extension Buss (CS0)</div><div class='add'>+ * -12345678-+---------------+----------------------------</div><div class='add'>+ *     0     | Extension Bus | D8-D15 disable, eMMC enable</div><div class='add'>+ *     1     | Extension Bus | D8-D15 enable,  eMMC disable</div><div class='add'>+ * -12345678-+---------------+----------------------------</div><div class='add'>+ *      0    | SDHI1         | COM8 disable, COM14 enable</div><div class='add'>+ *      1    | SDHI1         | COM8 enable,  COM14 disable</div><div class='add'>+ * -12345678-+---------------+----------------------------</div><div class='add'>+ *       0   | USB0          | COM20 enable,  COM24 disable</div><div class='add'>+ *       1   | USB0          | COM20 disable, COM24 enable</div><div class='add'>+ * -12345678-+---------------+----------------------------</div><div class='add'>+ *        00 | JTAG          | SH-X2</div><div class='add'>+ *        10 | JTAG          | ARM</div><div class='add'>+ *        01 | JTAG          | -</div><div class='add'>+ *        11 | JTAG          | Boundary Scan</div><div class='add'>+ *-----------+---------------+----------------------------</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * USB function</div><div class='add'>+ *</div><div class='add'>+ * When you use USB Function,</div><div class='add'>+ * set SW1.6 ON, and connect cable to CN24.</div><div class='add'>+ *</div><div class='add'>+ * USBF needs workaround on R8A7740 chip.</div><div class='add'>+ * These are a little bit complex.</div><div class='add'>+ * see</div><div class='add'>+ *	usbhsf_power_ctrl()</div><div class='add'>+ *</div><div class='add'>+ * CAUTION</div><div class='add'>+ *</div><div class='add'>+ * It uses autonomy mode for USB hotplug at this point</div><div class='add'>+ * (= usbhs_private.platform_callback.get_vbus is NULL),</div><div class='add'>+ * since we don't know what's happen on PM control</div><div class='add'>+ * on this workaround.</div><div class='add'>+ */</div><div class='add'>+#define USBCR1		0xe605810a</div><div class='add'>+#define USBH		0xC6700000</div><div class='add'>+#define USBH_USBCTR	0x10834</div><div class='add'>+</div><div class='add'>+struct usbhsf_private {</div><div class='add'>+	struct clk *phy;</div><div class='add'>+	struct clk *usb24;</div><div class='add'>+	struct clk *pci;</div><div class='add'>+	struct clk *func;</div><div class='add'>+	struct clk *host;</div><div class='add'>+	void __iomem *usbh_base;</div><div class='add'>+	struct renesas_usbhs_platform_info info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define usbhsf_get_priv(pdev)				\</div><div class='add'>+	container_of(renesas_usbhs_get_info(pdev),	\</div><div class='add'>+		     struct usbhsf_private, info)</div><div class='add'>+</div><div class='add'>+static int usbhsf_get_id(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return USBHS_GADGET;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void usbhsf_power_ctrl(struct platform_device *pdev,</div><div class='add'>+			      void __iomem *base, int enable)</div><div class='add'>+{</div><div class='add'>+	struct usbhsf_private *priv = usbhsf_get_priv(pdev);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Work around for USB Function.</div><div class='add'>+	 * It needs USB host clock, and settings</div><div class='add'>+	 */</div><div class='add'>+	if (enable) {</div><div class='add'>+		/*</div><div class='add'>+		 * enable all the related usb clocks</div><div class='add'>+		 * for usb workaround</div><div class='add'>+		 */</div><div class='add'>+		clk_enable(priv-&gt;usb24);</div><div class='add'>+		clk_enable(priv-&gt;pci);</div><div class='add'>+		clk_enable(priv-&gt;host);</div><div class='add'>+		clk_enable(priv-&gt;func);</div><div class='add'>+		clk_enable(priv-&gt;phy);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * set USBCR1</div><div class='add'>+		 *</div><div class='add'>+		 * Port1 is driven by USB function,</div><div class='add'>+		 * Port2 is driven by USB HOST</div><div class='add'>+		 * One HOST (Port1 or Port2 is HOST)</div><div class='add'>+		 * USB PLL input clock = 24MHz</div><div class='add'>+		 */</div><div class='add'>+		__raw_writew(0xd750, USBCR1);</div><div class='add'>+		mdelay(1);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * start USB Host</div><div class='add'>+		 */</div><div class='add'>+		__raw_writel(0x0000000c, priv-&gt;usbh_base + USBH_USBCTR);</div><div class='add'>+		__raw_writel(0x00000008, priv-&gt;usbh_base + USBH_USBCTR);</div><div class='add'>+		mdelay(10);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * USB PHY Power ON</div><div class='add'>+		 */</div><div class='add'>+		__raw_writew(0xd770, USBCR1);</div><div class='add'>+		__raw_writew(0x4000, base + 0x102); /* USBF :: SUSPMODE */</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		__raw_writel(0x0000010f, priv-&gt;usbh_base + USBH_USBCTR);</div><div class='add'>+		__raw_writew(0xd7c0, USBCR1); /* GPIO */</div><div class='add'>+</div><div class='add'>+		clk_disable(priv-&gt;phy);</div><div class='add'>+		clk_disable(priv-&gt;func);	/* usb work around */</div><div class='add'>+		clk_disable(priv-&gt;host);	/* usb work around */</div><div class='add'>+		clk_disable(priv-&gt;pci);		/* usb work around */</div><div class='add'>+		clk_disable(priv-&gt;usb24);	/* usb work around */</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void usbhsf_hardware_exit(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct usbhsf_private *priv = usbhsf_get_priv(pdev);</div><div class='add'>+</div><div class='add'>+	if (!IS_ERR(priv-&gt;phy))</div><div class='add'>+		clk_put(priv-&gt;phy);</div><div class='add'>+	if (!IS_ERR(priv-&gt;usb24))</div><div class='add'>+		clk_put(priv-&gt;usb24);</div><div class='add'>+	if (!IS_ERR(priv-&gt;pci))</div><div class='add'>+		clk_put(priv-&gt;pci);</div><div class='add'>+	if (!IS_ERR(priv-&gt;host))</div><div class='add'>+		clk_put(priv-&gt;host);</div><div class='add'>+	if (!IS_ERR(priv-&gt;func))</div><div class='add'>+		clk_put(priv-&gt;func);</div><div class='add'>+	if (priv-&gt;usbh_base)</div><div class='add'>+		iounmap(priv-&gt;usbh_base);</div><div class='add'>+</div><div class='add'>+	priv-&gt;phy	= NULL;</div><div class='add'>+	priv-&gt;usb24	= NULL;</div><div class='add'>+	priv-&gt;pci	= NULL;</div><div class='add'>+	priv-&gt;host	= NULL;</div><div class='add'>+	priv-&gt;func	= NULL;</div><div class='add'>+	priv-&gt;usbh_base	= NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int usbhsf_hardware_init(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct usbhsf_private *priv = usbhsf_get_priv(pdev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;phy	= clk_get(&amp;pdev-&gt;dev, "phy");</div><div class='add'>+	priv-&gt;usb24	= clk_get(&amp;pdev-&gt;dev, "usb24");</div><div class='add'>+	priv-&gt;pci	= clk_get(&amp;pdev-&gt;dev, "pci");</div><div class='add'>+	priv-&gt;func	= clk_get(&amp;pdev-&gt;dev, "func");</div><div class='add'>+	priv-&gt;host	= clk_get(&amp;pdev-&gt;dev, "host");</div><div class='add'>+	priv-&gt;usbh_base	= ioremap_nocache(USBH, 0x20000);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(priv-&gt;phy)		||</div><div class='add'>+	    IS_ERR(priv-&gt;usb24)		||</div><div class='add'>+	    IS_ERR(priv-&gt;pci)		||</div><div class='add'>+	    IS_ERR(priv-&gt;host)		||</div><div class='add'>+	    IS_ERR(priv-&gt;func)		||</div><div class='add'>+	    !priv-&gt;usbh_base) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "USB clock setting failed\n");</div><div class='add'>+		usbhsf_hardware_exit(pdev);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* usb24 use 1/1 of parent clock (= usb24s = 24MHz) */</div><div class='add'>+	clk_set_rate(priv-&gt;usb24,</div><div class='add'>+		     clk_get_rate(clk_get_parent(priv-&gt;usb24)));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct usbhsf_private usbhsf_private = {</div><div class='add'>+	.info = {</div><div class='add'>+		.platform_callback = {</div><div class='add'>+			.get_id		= usbhsf_get_id,</div><div class='add'>+			.hardware_init	= usbhsf_hardware_init,</div><div class='add'>+			.hardware_exit	= usbhsf_hardware_exit,</div><div class='add'>+			.power_ctrl	= usbhsf_power_ctrl,</div><div class='add'>+		},</div><div class='add'>+		.driver_param = {</div><div class='add'>+			.buswait_bwait		= 5,</div><div class='add'>+			.detection_delay	= 5,</div><div class='add'>+		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource usbhsf_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.name	= "USBHS",</div><div class='add'>+		.start	= 0xe6890000,</div><div class='add'>+		.end	= 0xe6890104 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start	= evt2irq(0x0A20),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device usbhsf_device = {</div><div class='add'>+	.name	= "renesas_usbhs",</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;usbhsf_private.info,</div><div class='add'>+	},</div><div class='add'>+	.id = -1,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(usbhsf_resources),</div><div class='add'>+	.resource	= usbhsf_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Ether */</div><div class='add'>+static struct sh_eth_plat_data sh_eth_platdata = {</div><div class='add'>+	.phy			= 0x00, /* LAN8710A */</div><div class='add'>+	.edmac_endian		= EDMAC_LITTLE_ENDIAN,</div><div class='add'>+	.register_type		= SH_ETH_REG_GIGABIT,</div><div class='add'>+	.phy_interface		= PHY_INTERFACE_MODE_MII,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource sh_eth_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start	= 0xe9a00000,</div><div class='add'>+		.end	= 0xe9a00800 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	}, {</div><div class='add'>+		.start	= 0xe9a01800,</div><div class='add'>+		.end	= 0xe9a02000 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	}, {</div><div class='add'>+		.start	= evt2irq(0x0500),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device sh_eth_device = {</div><div class='add'>+	.name = "sh-eth",</div><div class='add'>+	.id = -1,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;sh_eth_platdata,</div><div class='add'>+	},</div><div class='add'>+	.resource = sh_eth_resources,</div><div class='add'>+	.num_resources = ARRAY_SIZE(sh_eth_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* LCDC */</div><div class='add'>+static struct fb_videomode lcdc0_mode = {</div><div class='add'>+	.name		= "AMPIER/AM-800480",</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+	.left_margin	= 88,</div><div class='add'>+	.right_margin	= 40,</div><div class='add'>+	.hsync_len	= 128,</div><div class='add'>+	.upper_margin	= 20,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.vsync_len	= 5,</div><div class='add'>+	.sync		= 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_mobile_lcdc_info lcdc0_info = {</div><div class='add'>+	.clock_source	= LCDC_CLK_BUS,</div><div class='add'>+	.ch[0] = {</div><div class='add'>+		.chan		= LCDC_CHAN_MAINLCD,</div><div class='add'>+		.fourcc		= V4L2_PIX_FMT_RGB565,</div><div class='add'>+		.interface_type	= RGB24,</div><div class='add'>+		.clock_divider	= 5,</div><div class='add'>+		.flags		= 0,</div><div class='add'>+		.lcd_modes	= &amp;lcdc0_mode,</div><div class='add'>+		.num_modes	= 1,</div><div class='add'>+		.panel_cfg = {</div><div class='add'>+			.width	= 111,</div><div class='add'>+			.height = 68,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource lcdc0_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "LCD0",</div><div class='add'>+		.start	= 0xfe940000,</div><div class='add'>+		.end	= 0xfe943fff,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= intcs_evt2irq(0x580),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device lcdc0_device = {</div><div class='add'>+	.name		= "sh_mobile_lcdc_fb",</div><div class='add'>+	.num_resources	= ARRAY_SIZE(lcdc0_resources),</div><div class='add'>+	.resource	= lcdc0_resources,</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.dev	= {</div><div class='add'>+		.platform_data	= &amp;lcdc0_info,</div><div class='add'>+		.coherent_dma_mask = ~0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* GPIO KEY */</div><div class='add'>+#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }</div><div class='add'>+</div><div class='add'>+static struct gpio_keys_button gpio_buttons[] = {</div><div class='add'>+	GPIO_KEY(KEY_POWER,	GPIO_PORT99,	"SW1"),</div><div class='add'>+	GPIO_KEY(KEY_BACK,	GPIO_PORT100,	"SW2"),</div><div class='add'>+	GPIO_KEY(KEY_MENU,	GPIO_PORT97,	"SW3"),</div><div class='add'>+	GPIO_KEY(KEY_HOME,	GPIO_PORT98,	"SW4"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_keys_platform_data gpio_key_info = {</div><div class='add'>+	.buttons	= gpio_buttons,</div><div class='add'>+	.nbuttons	= ARRAY_SIZE(gpio_buttons),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device gpio_keys_device = {</div><div class='add'>+	.name   = "gpio-keys",</div><div class='add'>+	.id     = -1,</div><div class='add'>+	.dev    = {</div><div class='add'>+		.platform_data  = &amp;gpio_key_info,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SDHI0 */</div><div class='add'>+/*</div><div class='add'>+ * FIXME</div><div class='add'>+ *</div><div class='add'>+ * It use polling mode here, since</div><div class='add'>+ * CD (= Card Detect) pin is not connected to SDHI0_CD.</div><div class='add'>+ * We can use IRQ31 as card detect irq,</div><div class='add'>+ * but it needs chattering removal operation</div><div class='add'>+ */</div><div class='add'>+#define IRQ31	evt2irq(0x33E0)</div><div class='add'>+static struct sh_mobile_sdhi_info sdhi0_info = {</div><div class='add'>+	.tmio_caps	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |\</div><div class='add'>+			  MMC_CAP_NEEDS_POLL,</div><div class='add'>+	.tmio_ocr_mask	= MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,</div><div class='add'>+	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource sdhi0_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.name	= "SDHI0",</div><div class='add'>+		.start	= 0xe6850000,</div><div class='add'>+		.end	= 0xe6850100 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	/*</div><div class='add'>+	 * no SH_MOBILE_SDHI_IRQ_CARD_DETECT here</div><div class='add'>+	 */</div><div class='add'>+	{</div><div class='add'>+		.name	= SH_MOBILE_SDHI_IRQ_SDCARD,</div><div class='add'>+		.start	= evt2irq(0x0E20),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= SH_MOBILE_SDHI_IRQ_SDIO,</div><div class='add'>+		.start	= evt2irq(0x0E40),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device sdhi0_device = {</div><div class='add'>+	.name		= "sh_mobile_sdhi",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;sdhi0_info,</div><div class='add'>+	},</div><div class='add'>+	.num_resources	= ARRAY_SIZE(sdhi0_resources),</div><div class='add'>+	.resource	= sdhi0_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SDHI1 */</div><div class='add'>+static struct sh_mobile_sdhi_info sdhi1_info = {</div><div class='add'>+	.tmio_caps	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,</div><div class='add'>+	.tmio_ocr_mask	= MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,</div><div class='add'>+	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource sdhi1_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "SDHI1",</div><div class='add'>+		.start	= 0xe6860000,</div><div class='add'>+		.end	= 0xe6860100 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= evt2irq(0x0E80),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.start	= evt2irq(0x0EA0),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	[3] = {</div><div class='add'>+		.start	= evt2irq(0x0EC0),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device sdhi1_device = {</div><div class='add'>+	.name		= "sh_mobile_sdhi",</div><div class='add'>+	.id		= 1,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;sdhi1_info,</div><div class='add'>+	},</div><div class='add'>+	.num_resources	= ARRAY_SIZE(sdhi1_resources),</div><div class='add'>+	.resource	= sdhi1_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MMCIF */</div><div class='add'>+static struct sh_mmcif_plat_data sh_mmcif_plat = {</div><div class='add'>+	.sup_pclk	= 0,</div><div class='add'>+	.ocr		= MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,</div><div class='add'>+	.caps		= MMC_CAP_4_BIT_DATA |</div><div class='add'>+			  MMC_CAP_8_BIT_DATA |</div><div class='add'>+			  MMC_CAP_NONREMOVABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource sh_mmcif_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "MMCIF",</div><div class='add'>+		.start	= 0xe6bd0000,</div><div class='add'>+		.end	= 0xe6bd0100 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		/* MMC ERR */</div><div class='add'>+		.start	= evt2irq(0x1AC0),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		/* MMC NOR */</div><div class='add'>+		.start	= evt2irq(0x1AE0),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device sh_mmcif_device = {</div><div class='add'>+	.name		= "sh_mmcif",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;sh_mmcif_plat,</div><div class='add'>+	},</div><div class='add'>+	.num_resources	= ARRAY_SIZE(sh_mmcif_resources),</div><div class='add'>+	.resource	= sh_mmcif_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C */</div><div class='add'>+static struct i2c_board_info i2c0_devices[] = {</div><div class='add'>+	{</div><div class='add'>+		I2C_BOARD_INFO("st1232-ts", 0x55),</div><div class='add'>+		.irq = evt2irq(0x0340),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * board devices</div><div class='add'>+ */</div><div class='add'>+static struct platform_device *eva_devices[] __initdata = {</div><div class='add'>+	&amp;lcdc0_device,</div><div class='add'>+	&amp;gpio_keys_device,</div><div class='add'>+	&amp;sh_eth_device,</div><div class='add'>+	&amp;sdhi0_device,</div><div class='add'>+	&amp;sh_mmcif_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init eva_clock_init(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *system	= clk_get(NULL, "system_clk");</div><div class='add'>+	struct clk *xtal1	= clk_get(NULL, "extal1");</div><div class='add'>+	struct clk *usb24s	= clk_get(NULL, "usb24s");</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(system)	||</div><div class='add'>+	    IS_ERR(xtal1)	||</div><div class='add'>+	    IS_ERR(usb24s)) {</div><div class='add'>+		pr_err("armadillo800eva board clock init failed\n");</div><div class='add'>+		goto clock_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* armadillo 800 eva extal1 is 24MHz */</div><div class='add'>+	clk_set_rate(xtal1, 24000000);</div><div class='add'>+</div><div class='add'>+	/* usb24s use extal1 (= system) clock (= 24MHz) */</div><div class='add'>+	clk_set_parent(usb24s, system);</div><div class='add'>+</div><div class='add'>+clock_error:</div><div class='add'>+	if (!IS_ERR(system))</div><div class='add'>+		clk_put(system);</div><div class='add'>+	if (!IS_ERR(xtal1))</div><div class='add'>+		clk_put(xtal1);</div><div class='add'>+	if (!IS_ERR(usb24s))</div><div class='add'>+		clk_put(usb24s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * board init</div><div class='add'>+ */</div><div class='add'>+static void __init eva_init(void)</div><div class='add'>+{</div><div class='add'>+	eva_clock_init();</div><div class='add'>+</div><div class='add'>+	r8a7740_pinmux_init();</div><div class='add'>+</div><div class='add'>+	/* SCIFA1 */</div><div class='add'>+	gpio_request(GPIO_FN_SCIFA1_RXD, NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SCIFA1_TXD, NULL);</div><div class='add'>+</div><div class='add'>+	/* LCDC0 */</div><div class='add'>+	gpio_request(GPIO_FN_LCDC0_SELECT,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D0,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D1,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D2,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D3,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D4,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D5,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D6,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D7,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D8,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D9,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D10,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D11,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D12,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D13,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D14,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D15,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D16,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D17,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D18_PORT40,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D19_PORT4,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D20_PORT3,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D21_PORT2,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D22_PORT0,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_D23_PORT1,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_DCK,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_VSYN,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_HSYN,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_DISP,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCD0_LCLK_PORT165,	NULL);</div><div class='add'>+</div><div class='add'>+	gpio_request(GPIO_PORT61, NULL); /* LCDDON */</div><div class='add'>+	gpio_direction_output(GPIO_PORT61, 1);</div><div class='add'>+</div><div class='add'>+	gpio_request(GPIO_PORT202, NULL); /* LCD0_LED_CONT */</div><div class='add'>+	gpio_direction_output(GPIO_PORT202, 0);</div><div class='add'>+</div><div class='add'>+	/* Touchscreen */</div><div class='add'>+	gpio_request(GPIO_FN_IRQ10,	NULL); /* TP_INT */</div><div class='add'>+	gpio_request(GPIO_PORT166,	NULL); /* TP_RST_B */</div><div class='add'>+	gpio_direction_output(GPIO_PORT166, 1);</div><div class='add'>+</div><div class='add'>+	/* GETHER */</div><div class='add'>+	gpio_request(GPIO_FN_ET_CRS,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_MDC,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_MDIO,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_TX_ER,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_RX_ER,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_ERXD0,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_ERXD1,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_ERXD2,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_ERXD3,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_TX_CLK,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_TX_EN,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_ETXD0,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_ETXD1,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_ETXD2,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_ETXD3,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_PHY_INT,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_COL,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_RX_DV,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_ET_RX_CLK,		NULL);</div><div class='add'>+</div><div class='add'>+	gpio_request(GPIO_PORT18, NULL); /* PHY_RST */</div><div class='add'>+	gpio_direction_output(GPIO_PORT18, 1);</div><div class='add'>+</div><div class='add'>+	/* USB */</div><div class='add'>+	gpio_request(GPIO_PORT159, NULL); /* USB_DEVICE_MODE */</div><div class='add'>+	gpio_direction_input(GPIO_PORT159);</div><div class='add'>+</div><div class='add'>+	if (gpio_get_value(GPIO_PORT159)) {</div><div class='add'>+		/* USB Host */</div><div class='add'>+	} else {</div><div class='add'>+		/* USB Func */</div><div class='add'>+		gpio_request(GPIO_FN_VBUS, NULL);</div><div class='add'>+		platform_device_register(&amp;usbhsf_device);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* SDHI0 */</div><div class='add'>+	gpio_request(GPIO_FN_SDHI0_CMD, NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHI0_CLK, NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHI0_D0, NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHI0_D1, NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHI0_D2, NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHI0_D3, NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHI0_WP, NULL);</div><div class='add'>+</div><div class='add'>+	gpio_request(GPIO_PORT17, NULL);	/* SDHI0_18/33_B */</div><div class='add'>+	gpio_request(GPIO_PORT74, NULL);	/* SDHI0_PON */</div><div class='add'>+	gpio_request(GPIO_PORT75, NULL);	/* SDSLOT1_PON */</div><div class='add'>+	gpio_direction_output(GPIO_PORT17, 0);</div><div class='add'>+	gpio_direction_output(GPIO_PORT74, 1);</div><div class='add'>+	gpio_direction_output(GPIO_PORT75, 1);</div><div class='add'>+</div><div class='add'>+	/* we can use GPIO_FN_IRQ31_PORT167 here for SDHI0 CD irq */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * MMCIF</div><div class='add'>+	 *</div><div class='add'>+	 * Here doesn't care SW1.4 status,</div><div class='add'>+	 * since CON2 is not mounted.</div><div class='add'>+	 */</div><div class='add'>+	gpio_request(GPIO_FN_MMC1_CLK_PORT103,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMC1_CMD_PORT104,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMC1_D0_PORT149,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMC1_D1_PORT148,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMC1_D2_PORT147,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMC1_D3_PORT146,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMC1_D4_PORT145,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMC1_D5_PORT144,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMC1_D6_PORT143,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMC1_D7_PORT142,	NULL);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * CAUTION</div><div class='add'>+	 *</div><div class='add'>+	 * DBGMD/LCDC0/FSIA MUX</div><div class='add'>+	 * DBGMD_SELECT_B should be set after setting PFC Function.</div><div class='add'>+	 */</div><div class='add'>+	gpio_request(GPIO_PORT176, NULL);</div><div class='add'>+	gpio_direction_output(GPIO_PORT176, 1);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We can switch CON8/CON14 by SW1.5,</div><div class='add'>+	 * but it needs after DBGMD_SELECT_B</div><div class='add'>+	 */</div><div class='add'>+	gpio_request(GPIO_PORT6, NULL);</div><div class='add'>+	gpio_direction_input(GPIO_PORT6);</div><div class='add'>+	if (gpio_get_value(GPIO_PORT6)) {</div><div class='add'>+		/* CON14 enable */</div><div class='add'>+	} else {</div><div class='add'>+		/* CON8 (SDHI1) enable */</div><div class='add'>+		gpio_request(GPIO_FN_SDHI1_CLK,	NULL);</div><div class='add'>+		gpio_request(GPIO_FN_SDHI1_CMD,	NULL);</div><div class='add'>+		gpio_request(GPIO_FN_SDHI1_D0,	NULL);</div><div class='add'>+		gpio_request(GPIO_FN_SDHI1_D1,	NULL);</div><div class='add'>+		gpio_request(GPIO_FN_SDHI1_D2,	NULL);</div><div class='add'>+		gpio_request(GPIO_FN_SDHI1_D3,	NULL);</div><div class='add'>+		gpio_request(GPIO_FN_SDHI1_CD,	NULL);</div><div class='add'>+		gpio_request(GPIO_FN_SDHI1_WP,	NULL);</div><div class='add'>+</div><div class='add'>+		gpio_request(GPIO_PORT16, NULL); /* SDSLOT2_PON */</div><div class='add'>+		gpio_direction_output(GPIO_PORT16, 1);</div><div class='add'>+</div><div class='add'>+		platform_device_register(&amp;sdhi1_device);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CACHE_L2X0</div><div class='add'>+	/* Early BRESP enable, Shared attribute override enable, 32K*8way */</div><div class='add'>+	l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));</div><div class='add'>+</div><div class='add'>+	r8a7740_add_standard_devices();</div><div class='add'>+</div><div class='add'>+	platform_add_devices(eva_devices,</div><div class='add'>+			     ARRAY_SIZE(eva_devices));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init eva_earlytimer_init(void)</div><div class='add'>+{</div><div class='add'>+	r8a7740_clock_init(MD_CK0 | MD_CK2);</div><div class='add'>+	shmobile_earlytimer_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init eva_add_early_devices(void)</div><div class='add'>+{</div><div class='add'>+	r8a7740_add_early_devices();</div><div class='add'>+</div><div class='add'>+	/* override timer setup with board-specific code */</div><div class='add'>+	shmobile_timer.init = eva_earlytimer_init;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *eva_boards_compat_dt[] __initdata = {</div><div class='add'>+	"renesas,armadillo800eva",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")</div><div class='add'>+	.map_io		= r8a7740_map_io,</div><div class='add'>+	.init_early	= eva_add_early_devices,</div><div class='add'>+	.init_irq	= r8a7740_init_irq,</div><div class='add'>+	.handle_irq	= shmobile_handle_irq_intc,</div><div class='add'>+	.init_machine	= eva_init,</div><div class='add'>+	.timer		= &amp;shmobile_timer,</div><div class='add'>+	.dt_compat	= eva_boards_compat_dt,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c<br/>index 81fd95f7f52a..e9b32cfbf741 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-bonito.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/board-bonito.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-bonito.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-bonito.c</a></div><div class='hunk'>@@ -486,7 +486,7 @@ static void __init bonito_earlytimer_init(void)</div><div class='ctx'> 	shmobile_earlytimer_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init bonito_add_early_devices(void)</div><div class='add'>+static void __init bonito_add_early_devices(void)</div><div class='ctx'> {</div><div class='ctx'> 	r8a7740_add_early_devices();</div><div class='ctx'> </div><div class='hunk'>@@ -500,5 +500,6 @@ MACHINE_START(BONITO, "bonito")</div><div class='ctx'> 	.init_irq	= r8a7740_init_irq,</div><div class='ctx'> 	.handle_irq	= shmobile_handle_irq_intc,</div><div class='ctx'> 	.init_machine	= bonito_init,</div><div class='add'>+	.init_late	= shmobile_init_late,</div><div class='ctx'> 	.timer		= &amp;shmobile_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c<br/>index 39b6cf85ced6..796fa00ad3c4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-g3evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/board-g3evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-g3evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-g3evm.c</a></div><div class='hunk'>@@ -338,5 +338,6 @@ MACHINE_START(G3EVM, "g3evm")</div><div class='ctx'> 	.init_irq	= sh7367_init_irq,</div><div class='ctx'> 	.handle_irq	= shmobile_handle_irq_intc,</div><div class='ctx'> 	.init_machine	= g3evm_init,</div><div class='add'>+	.init_late	= shmobile_init_late,</div><div class='ctx'> 	.timer		= &amp;shmobile_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c<br/>index 0e5a39c670bc..f1257321999a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-g4evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/board-g4evm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-g4evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-g4evm.c</a></div><div class='hunk'>@@ -381,5 +381,6 @@ MACHINE_START(G4EVM, "g4evm")</div><div class='ctx'> 	.init_irq	= sh7377_init_irq,</div><div class='ctx'> 	.handle_irq	= shmobile_handle_irq_intc,</div><div class='ctx'> 	.init_machine	= g4evm_init,</div><div class='add'>+	.init_late	= shmobile_init_late,</div><div class='ctx'> 	.timer		= &amp;shmobile_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c<br/>index 200dcd42a3a0..f60f1b281cc4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-kota2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/board-kota2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-kota2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-kota2.c</a></div><div class='hunk'>@@ -521,5 +521,6 @@ MACHINE_START(KOTA2, "kota2")</div><div class='ctx'> 	.init_irq	= sh73a0_init_irq,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= kota2_init,</div><div class='add'>+	.init_late	= shmobile_init_late,</div><div class='ctx'> 	.timer		= &amp;shmobile_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c<br/>new file mode 100644<br/>index 000000000000..7bc5e7d39f9b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-kzm9d.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-kzm9d.c</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+/*</div><div class='add'>+ * kzm9d board support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012  Renesas Solutions Corp.</div><div class='add'>+ * Copyright (C) 2012  Magnus Damm</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 of the License.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/smsc911x.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include &lt;mach/emev2.h&gt;</div><div class='add'>+#include &lt;asm/mach-types.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/hardware/gic.h&gt;</div><div class='add'>+</div><div class='add'>+/* Ether */</div><div class='add'>+static struct resource smsc911x_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0x20000000,</div><div class='add'>+		.end	= 0x2000ffff,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= EMEV2_GPIO_IRQ(1),</div><div class='add'>+		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct smsc911x_platform_config smsc911x_platdata = {</div><div class='add'>+	.flags		= SMSC911X_USE_32BIT,</div><div class='add'>+	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,</div><div class='add'>+	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device smsc91x_device = {</div><div class='add'>+	.name	= "smsc911x",</div><div class='add'>+	.id	= 0,</div><div class='add'>+	.dev	= {</div><div class='add'>+		  .platform_data = &amp;smsc911x_platdata,</div><div class='add'>+		},</div><div class='add'>+	.num_resources	= ARRAY_SIZE(smsc911x_resources),</div><div class='add'>+	.resource	= smsc911x_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *kzm9d_devices[] __initdata = {</div><div class='add'>+	&amp;smsc91x_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init kzm9d_add_standard_devices(void)</div><div class='add'>+{</div><div class='add'>+	emev2_add_standard_devices();</div><div class='add'>+</div><div class='add'>+	platform_add_devices(kzm9d_devices, ARRAY_SIZE(kzm9d_devices));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *kzm9d_boards_compat_dt[] __initdata = {</div><div class='add'>+	"renesas,kzm9d",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(KZM9D_DT, "kzm9d")</div><div class='add'>+	.map_io		= emev2_map_io,</div><div class='add'>+	.init_early	= emev2_add_early_devices,</div><div class='add'>+	.nr_irqs	= NR_IRQS_LEGACY,</div><div class='add'>+	.init_irq	= emev2_init_irq,</div><div class='add'>+	.handle_irq	= gic_handle_irq,</div><div class='add'>+	.init_machine	= kzm9d_add_standard_devices,</div><div class='add'>+	.timer		= &amp;shmobile_timer,</div><div class='add'>+	.dt_compat	= kzm9d_boards_compat_dt,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c<br/>new file mode 100644<br/>index 000000000000..d8e33b682832<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-kzm9g.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-kzm9g.c</a></div><div class='hunk'>@@ -0,0 +1,460 @@</div><div class='add'>+/*</div><div class='add'>+ * KZM-A9-GT board support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012	Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 of the License.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/gpio_keys.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/i2c/pcf857x.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/mmc/host.h&gt;</div><div class='add'>+#include &lt;linux/mmc/sh_mmcif.h&gt;</div><div class='add'>+#include &lt;linux/mmc/sh_mobile_sdhi.h&gt;</div><div class='add'>+#include &lt;linux/mfd/tmio.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/smsc911x.h&gt;</div><div class='add'>+#include &lt;linux/usb/r8a66597.h&gt;</div><div class='add'>+#include &lt;linux/videodev2.h&gt;</div><div class='add'>+#include &lt;mach/irqs.h&gt;</div><div class='add'>+#include &lt;mach/sh73a0.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include &lt;asm/hardware/cache-l2x0.h&gt;</div><div class='add'>+#include &lt;asm/hardware/gic.h&gt;</div><div class='add'>+#include &lt;asm/mach-types.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;video/sh_mobile_lcdc.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * external GPIO</div><div class='add'>+ */</div><div class='add'>+#define GPIO_PCF8575_BASE	(GPIO_NR)</div><div class='add'>+#define GPIO_PCF8575_PORT10	(GPIO_NR + 8)</div><div class='add'>+#define GPIO_PCF8575_PORT11	(GPIO_NR + 9)</div><div class='add'>+#define GPIO_PCF8575_PORT12	(GPIO_NR + 10)</div><div class='add'>+#define GPIO_PCF8575_PORT13	(GPIO_NR + 11)</div><div class='add'>+#define GPIO_PCF8575_PORT14	(GPIO_NR + 12)</div><div class='add'>+#define GPIO_PCF8575_PORT15	(GPIO_NR + 13)</div><div class='add'>+#define GPIO_PCF8575_PORT16	(GPIO_NR + 14)</div><div class='add'>+</div><div class='add'>+/* SMSC 9221 */</div><div class='add'>+static struct resource smsc9221_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0x10000000, /* CS4 */</div><div class='add'>+		.end	= 0x100000ff,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= intcs_evt2irq(0x260), /* IRQ3 */</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct smsc911x_platform_config smsc9221_platdata = {</div><div class='add'>+	.flags		= SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,</div><div class='add'>+	.phy_interface	= PHY_INTERFACE_MODE_MII,</div><div class='add'>+	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,</div><div class='add'>+	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device smsc_device = {</div><div class='add'>+	.name		= "smsc911x",</div><div class='add'>+	.dev  = {</div><div class='add'>+		.platform_data = &amp;smsc9221_platdata,</div><div class='add'>+	},</div><div class='add'>+	.resource	= smsc9221_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(smsc9221_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB external chip */</div><div class='add'>+static struct r8a66597_platdata usb_host_data = {</div><div class='add'>+	.on_chip	= 0,</div><div class='add'>+	.xtal		= R8A66597_PLATDATA_XTAL_48MHZ,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource usb_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0x10010000,</div><div class='add'>+		.end	= 0x1001ffff - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= intcs_evt2irq(0x220), /* IRQ1 */</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device usb_host_device = {</div><div class='add'>+	.name	= "r8a66597_hcd",</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data		= &amp;usb_host_data,</div><div class='add'>+		.dma_mask		= NULL,</div><div class='add'>+		.coherent_dma_mask	= 0xffffffff,</div><div class='add'>+	},</div><div class='add'>+	.num_resources	= ARRAY_SIZE(usb_resources),</div><div class='add'>+	.resource	= usb_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* LCDC */</div><div class='add'>+static struct fb_videomode kzm_lcdc_mode = {</div><div class='add'>+	.name		= "WVGA Panel",</div><div class='add'>+	.xres		= 800,</div><div class='add'>+	.yres		= 480,</div><div class='add'>+	.left_margin	= 220,</div><div class='add'>+	.right_margin	= 110,</div><div class='add'>+	.hsync_len	= 70,</div><div class='add'>+	.upper_margin	= 20,</div><div class='add'>+	.lower_margin	= 5,</div><div class='add'>+	.vsync_len	= 5,</div><div class='add'>+	.sync		= 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_mobile_lcdc_info lcdc_info = {</div><div class='add'>+	.clock_source = LCDC_CLK_BUS,</div><div class='add'>+	.ch[0] = {</div><div class='add'>+		.chan		= LCDC_CHAN_MAINLCD,</div><div class='add'>+		.fourcc		= V4L2_PIX_FMT_RGB565,</div><div class='add'>+		.interface_type	= RGB24,</div><div class='add'>+		.lcd_modes	= &amp;kzm_lcdc_mode,</div><div class='add'>+		.num_modes	= 1,</div><div class='add'>+		.clock_divider	= 5,</div><div class='add'>+		.flags		= 0,</div><div class='add'>+		.panel_cfg = {</div><div class='add'>+			.width	= 152,</div><div class='add'>+			.height	= 91,</div><div class='add'>+		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource lcdc_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "LCDC",</div><div class='add'>+		.start	= 0xfe940000,</div><div class='add'>+		.end	= 0xfe943fff,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= intcs_evt2irq(0x580),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device lcdc_device = {</div><div class='add'>+	.name		= "sh_mobile_lcdc_fb",</div><div class='add'>+	.num_resources	= ARRAY_SIZE(lcdc_resources),</div><div class='add'>+	.resource	= lcdc_resources,</div><div class='add'>+	.dev	= {</div><div class='add'>+		.platform_data	= &amp;lcdc_info,</div><div class='add'>+		.coherent_dma_mask = ~0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MMCIF */</div><div class='add'>+static struct resource sh_mmcif_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "MMCIF",</div><div class='add'>+		.start	= 0xe6bd0000,</div><div class='add'>+		.end	= 0xe6bd00ff,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= gic_spi(141),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.start	= gic_spi(140),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_mmcif_plat_data sh_mmcif_platdata = {</div><div class='add'>+	.ocr		= MMC_VDD_165_195,</div><div class='add'>+	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device mmc_device = {</div><div class='add'>+	.name		= "sh_mmcif",</div><div class='add'>+	.dev		= {</div><div class='add'>+		.dma_mask		= NULL,</div><div class='add'>+		.coherent_dma_mask	= 0xffffffff,</div><div class='add'>+		.platform_data		= &amp;sh_mmcif_platdata,</div><div class='add'>+	},</div><div class='add'>+	.num_resources	= ARRAY_SIZE(sh_mmcif_resources),</div><div class='add'>+	.resource	= sh_mmcif_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SDHI */</div><div class='add'>+static struct sh_mobile_sdhi_info sdhi0_info = {</div><div class='add'>+	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT,</div><div class='add'>+	.tmio_caps	= MMC_CAP_SD_HIGHSPEED,</div><div class='add'>+	.tmio_ocr_mask	= MMC_VDD_27_28 | MMC_VDD_28_29,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource sdhi0_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "SDHI0",</div><div class='add'>+		.start	= 0xee100000,</div><div class='add'>+		.end	= 0xee1000ff,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.name	= SH_MOBILE_SDHI_IRQ_CARD_DETECT,</div><div class='add'>+		.start	= gic_spi(83),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.name	= SH_MOBILE_SDHI_IRQ_SDCARD,</div><div class='add'>+		.start	= gic_spi(84),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	[3] = {</div><div class='add'>+		.name	= SH_MOBILE_SDHI_IRQ_SDIO,</div><div class='add'>+		.start	= gic_spi(85),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device sdhi0_device = {</div><div class='add'>+	.name		= "sh_mobile_sdhi",</div><div class='add'>+	.num_resources	= ARRAY_SIZE(sdhi0_resources),</div><div class='add'>+	.resource	= sdhi0_resources,</div><div class='add'>+	.dev	= {</div><div class='add'>+		.platform_data	= &amp;sdhi0_info,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* KEY */</div><div class='add'>+#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }</div><div class='add'>+</div><div class='add'>+static struct gpio_keys_button gpio_buttons[] = {</div><div class='add'>+	GPIO_KEY(KEY_BACK,	GPIO_PCF8575_PORT10,	"SW3"),</div><div class='add'>+	GPIO_KEY(KEY_RIGHT,	GPIO_PCF8575_PORT11,	"SW2-R"),</div><div class='add'>+	GPIO_KEY(KEY_LEFT,	GPIO_PCF8575_PORT12,	"SW2-L"),</div><div class='add'>+	GPIO_KEY(KEY_ENTER,	GPIO_PCF8575_PORT13,	"SW2-P"),</div><div class='add'>+	GPIO_KEY(KEY_UP,	GPIO_PCF8575_PORT14,	"SW2-U"),</div><div class='add'>+	GPIO_KEY(KEY_DOWN,	GPIO_PCF8575_PORT15,	"SW2-D"),</div><div class='add'>+	GPIO_KEY(KEY_HOME,	GPIO_PCF8575_PORT16,	"SW1"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_keys_platform_data gpio_key_info = {</div><div class='add'>+	.buttons	= gpio_buttons,</div><div class='add'>+	.nbuttons	= ARRAY_SIZE(gpio_buttons),</div><div class='add'>+	.poll_interval	= 250, /* poling at this point */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device gpio_keys_device = {</div><div class='add'>+	/* gpio-pcf857x.c driver doesn't support gpio_to_irq() */</div><div class='add'>+	.name	= "gpio-keys-polled",</div><div class='add'>+	.dev	= {</div><div class='add'>+		.platform_data  = &amp;gpio_key_info,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C */</div><div class='add'>+static struct pcf857x_platform_data pcf8575_pdata = {</div><div class='add'>+	.gpio_base	= GPIO_PCF8575_BASE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct i2c_board_info i2c1_devices[] = {</div><div class='add'>+	{</div><div class='add'>+		I2C_BOARD_INFO("st1232-ts", 0x55),</div><div class='add'>+		.irq = intcs_evt2irq(0x300), /* IRQ8 */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct i2c_board_info i2c3_devices[] = {</div><div class='add'>+	{</div><div class='add'>+		I2C_BOARD_INFO("pcf8575", 0x20),</div><div class='add'>+		.platform_data = &amp;pcf8575_pdata,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *kzm_devices[] __initdata = {</div><div class='add'>+	&amp;smsc_device,</div><div class='add'>+	&amp;usb_host_device,</div><div class='add'>+	&amp;lcdc_device,</div><div class='add'>+	&amp;mmc_device,</div><div class='add'>+	&amp;sdhi0_device,</div><div class='add'>+	&amp;gpio_keys_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * FIXME</div><div class='add'>+ *</div><div class='add'>+ * This is quick hack for enabling LCDC backlight</div><div class='add'>+ */</div><div class='add'>+static int __init as3711_enable_lcdc_backlight(void)</div><div class='add'>+{</div><div class='add'>+	struct i2c_adapter *a = i2c_get_adapter(0);</div><div class='add'>+	struct i2c_msg msg;</div><div class='add'>+	int i, ret;</div><div class='add'>+	__u8 magic[] = {</div><div class='add'>+		0x40, 0x2a,</div><div class='add'>+		0x43, 0x3c,</div><div class='add'>+		0x44, 0x3c,</div><div class='add'>+		0x45, 0x3c,</div><div class='add'>+		0x54, 0x03,</div><div class='add'>+		0x51, 0x00,</div><div class='add'>+		0x51, 0x01,</div><div class='add'>+		0xff, 0x00, /* wait */</div><div class='add'>+		0x43, 0xf0,</div><div class='add'>+		0x44, 0xf0,</div><div class='add'>+		0x45, 0xf0,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (!machine_is_kzm9g())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!a)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	msg.addr	= 0x40;</div><div class='add'>+	msg.len		= 2;</div><div class='add'>+	msg.flags	= 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(magic); i += 2) {</div><div class='add'>+		msg.buf = magic + i;</div><div class='add'>+</div><div class='add'>+		if (0xff == msg.buf[0]) {</div><div class='add'>+			udelay(500);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = i2c_transfer(a, &amp;msg, 1);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			pr_err("i2c transfer fail\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+device_initcall(as3711_enable_lcdc_backlight);</div><div class='add'>+</div><div class='add'>+static void __init kzm_init(void)</div><div class='add'>+{</div><div class='add'>+	sh73a0_pinmux_init();</div><div class='add'>+</div><div class='add'>+	/* enable SCIFA4 */</div><div class='add'>+	gpio_request(GPIO_FN_SCIFA4_TXD, NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SCIFA4_RXD, NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SCIFA4_RTS_, NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SCIFA4_CTS_, NULL);</div><div class='add'>+</div><div class='add'>+	/* CS4 for SMSC/USB */</div><div class='add'>+	gpio_request(GPIO_FN_CS4_, NULL); /* CS4 */</div><div class='add'>+</div><div class='add'>+	/* SMSC */</div><div class='add'>+	gpio_request(GPIO_PORT224, NULL); /* IRQ3 */</div><div class='add'>+	gpio_direction_input(GPIO_PORT224);</div><div class='add'>+</div><div class='add'>+	/* LCDC */</div><div class='add'>+	gpio_request(GPIO_FN_LCDD23,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD22,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD21,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD20,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD19,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD18,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD17,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD16,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD15,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD14,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD13,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD12,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD11,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD10,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD9,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD8,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD7,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD6,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD5,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD4,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD3,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD2,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD1,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDD0,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDDISP,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_LCDDCK,	NULL);</div><div class='add'>+</div><div class='add'>+	gpio_request(GPIO_PORT222,	NULL); /* LCDCDON */</div><div class='add'>+	gpio_request(GPIO_PORT226,	NULL); /* SC */</div><div class='add'>+	gpio_direction_output(GPIO_PORT222, 1);</div><div class='add'>+	gpio_direction_output(GPIO_PORT226, 1);</div><div class='add'>+</div><div class='add'>+	/* Touchscreen */</div><div class='add'>+	gpio_request(GPIO_PORT223, NULL); /* IRQ8 */</div><div class='add'>+	gpio_direction_input(GPIO_PORT223);</div><div class='add'>+</div><div class='add'>+	/* enable MMCIF */</div><div class='add'>+	gpio_request(GPIO_FN_MMCCLK0,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMCCMD0_PU,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMCD0_0_PU,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMCD0_1_PU,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMCD0_2_PU,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMCD0_3_PU,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMCD0_4_PU,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMCD0_5_PU,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMCD0_6_PU,	NULL);</div><div class='add'>+	gpio_request(GPIO_FN_MMCD0_7_PU,	NULL);</div><div class='add'>+</div><div class='add'>+	/* enable SD */</div><div class='add'>+	gpio_request(GPIO_FN_SDHIWP0,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHICD0,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHICMD0,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHICLK0,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHID0_3,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHID0_2,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHID0_1,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHID0_0,		NULL);</div><div class='add'>+	gpio_request(GPIO_FN_SDHI0_VCCQ_MC0_ON,	NULL);</div><div class='add'>+	gpio_request(GPIO_PORT15, NULL);</div><div class='add'>+	gpio_direction_output(GPIO_PORT15, 1); /* power */</div><div class='add'>+</div><div class='add'>+	/* I2C 3 */</div><div class='add'>+	gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL);</div><div class='add'>+	gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CACHE_L2X0</div><div class='add'>+	/* Early BRESP enable, Shared attribute override enable, 64K*8way */</div><div class='add'>+	l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	i2c_register_board_info(1, i2c1_devices, ARRAY_SIZE(i2c1_devices));</div><div class='add'>+	i2c_register_board_info(3, i2c3_devices, ARRAY_SIZE(i2c3_devices));</div><div class='add'>+</div><div class='add'>+	sh73a0_add_standard_devices();</div><div class='add'>+	platform_add_devices(kzm_devices, ARRAY_SIZE(kzm_devices));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *kzm9g_boards_compat_dt[] __initdata = {</div><div class='add'>+	"renesas,kzm9g",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(KZM9G_DT, "kzm9g")</div><div class='add'>+	.map_io		= sh73a0_map_io,</div><div class='add'>+	.init_early	= sh73a0_add_early_devices,</div><div class='add'>+	.nr_irqs	= NR_IRQS_LEGACY,</div><div class='add'>+	.init_irq	= sh73a0_init_irq,</div><div class='add'>+	.handle_irq	= gic_handle_irq,</div><div class='add'>+	.init_machine	= kzm_init,</div><div class='add'>+	.timer		= &amp;shmobile_timer,</div><div class='add'>+	.dt_compat	= kzm9g_boards_compat_dt,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c<br/>index f49e28abe0ab..b577f7c44678 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-mackerel.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/board-mackerel.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-mackerel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-mackerel.c</a></div><div class='hunk'>@@ -53,6 +53,7 @@</div><div class='ctx'> #include &lt;media/soc_camera.h&gt;</div><div class='ctx'> #include &lt;media/soc_camera_platform.h&gt;</div><div class='ctx'> #include &lt;sound/sh_fsi.h&gt;</div><div class='add'>+#include &lt;sound/simple_card.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/common.h&gt;</div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='hunk'>@@ -502,8 +503,26 @@ static struct platform_device hdmi_lcdc_device = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {</div><div class='add'>+	.cpu_daifmt	= SND_SOC_DAIFMT_CBM_CFM,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct asoc_simple_card_info fsi2_hdmi_info = {</div><div class='add'>+	.name		= "HDMI",</div><div class='add'>+	.card		= "FSI2B-HDMI",</div><div class='add'>+	.cpu_dai	= "fsib-dai",</div><div class='add'>+	.codec		= "sh-mobile-hdmi",</div><div class='add'>+	.platform	= "sh_fsi2",</div><div class='add'>+	.codec_dai	= "sh_mobile_hdmi-hifi",</div><div class='add'>+	.init		= &amp;fsi2_hdmi_init_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct platform_device fsi_hdmi_device = {</div><div class='del'>-	.name		= "sh_fsi2_b_hdmi",</div><div class='add'>+	.name	= "asoc-simple-card",</div><div class='add'>+	.id	= 1,</div><div class='add'>+	.dev	= {</div><div class='add'>+		.platform_data	= &amp;fsi2_hdmi_info,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __init hdmi_init_pm_clock(void)</div><div class='hunk'>@@ -908,6 +927,8 @@ fsi_set_rate_end:</div><div class='ctx'> static struct sh_fsi_platform_info fsi_info = {</div><div class='ctx'> 	.port_a = {</div><div class='ctx'> 		.flags = SH_FSI_BRS_INV,</div><div class='add'>+		.tx_id = SHDMA_SLAVE_FSIA_TX,</div><div class='add'>+		.rx_id = SHDMA_SLAVE_FSIA_RX,</div><div class='ctx'> 	},</div><div class='ctx'> 	.port_b = {</div><div class='ctx'> 		.flags = SH_FSI_BRS_INV	|</div><div class='hunk'>@@ -920,9 +941,11 @@ static struct sh_fsi_platform_info fsi_info = {</div><div class='ctx'> </div><div class='ctx'> static struct resource fsi_resources[] = {</div><div class='ctx'> 	[0] = {</div><div class='add'>+		/* we need 0xFE1F0000 to access DMA</div><div class='add'>+		 * instead of 0xFE3C0000 */</div><div class='ctx'> 		.name	= "FSI",</div><div class='del'>-		.start	= 0xFE3C0000,</div><div class='del'>-		.end	= 0xFE3C0400 - 1,</div><div class='add'>+		.start  = 0xFE1F0000,</div><div class='add'>+		.end    = 0xFE1F0400 - 1,</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='hunk'>@@ -941,17 +964,25 @@ static struct platform_device fsi_device = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct fsi_ak4642_info fsi2_ak4643_info = {</div><div class='add'>+static struct asoc_simple_dai_init_info fsi2_ak4643_init_info = {</div><div class='add'>+	.fmt		= SND_SOC_DAIFMT_LEFT_J,</div><div class='add'>+	.codec_daifmt	= SND_SOC_DAIFMT_CBM_CFM,</div><div class='add'>+	.cpu_daifmt	= SND_SOC_DAIFMT_CBS_CFS,</div><div class='add'>+	.sysclk		= 11289600,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct asoc_simple_card_info fsi2_ak4643_info = {</div><div class='ctx'> 	.name		= "AK4643",</div><div class='ctx'> 	.card		= "FSI2A-AK4643",</div><div class='ctx'> 	.cpu_dai	= "fsia-dai",</div><div class='ctx'> 	.codec		= "ak4642-codec.0-0013",</div><div class='ctx'> 	.platform	= "sh_fsi2",</div><div class='del'>-	.id		= FSI_PORT_A,</div><div class='add'>+	.codec_dai	= "ak4642-hifi",</div><div class='add'>+	.init		= &amp;fsi2_ak4643_init_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device fsi_ak4643_device = {</div><div class='del'>-	.name	= "fsi-ak4642-audio",</div><div class='add'>+	.name	= "asoc-simple-card",</div><div class='ctx'> 	.dev	= {</div><div class='ctx'> 		.platform_data	= &amp;fsi2_ak4643_info,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -1011,21 +1042,12 @@ static int slot_cn7_get_cd(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* SDHI0 */</div><div class='del'>-static irqreturn_t mackerel_sdhi0_gpio_cd(int irq, void *arg)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = arg;</div><div class='del'>-	struct sh_mobile_sdhi_info *info = dev-&gt;platform_data;</div><div class='del'>-	struct tmio_mmc_data *pdata = info-&gt;pdata;</div><div class='del'>-</div><div class='del'>-	tmio_mmc_cd_wakeup(pdata);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct sh_mobile_sdhi_info sdhi0_info = {</div><div class='ctx'> 	.dma_slave_tx	= SHDMA_SLAVE_SDHI0_TX,</div><div class='ctx'> 	.dma_slave_rx	= SHDMA_SLAVE_SDHI0_RX,</div><div class='add'>+	.tmio_flags	= TMIO_MMC_USE_GPIO_CD,</div><div class='ctx'> 	.tmio_caps	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,</div><div class='add'>+	.cd_gpio	= GPIO_PORT172,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource sdhi0_resources[] = {</div><div class='hunk'>@@ -1257,6 +1279,8 @@ static void mackerel_camera_del(struct soc_camera_device *icd)</div><div class='ctx'> </div><div class='ctx'> static struct sh_mobile_ceu_info sh_mobile_ceu_info = {</div><div class='ctx'> 	.flags = SH_CEU_FLAG_USE_8BIT_BUS,</div><div class='add'>+	.max_width = 8188,</div><div class='add'>+	.max_height = 8188,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource ceu_resources[] = {</div><div class='hunk'>@@ -1384,7 +1408,6 @@ static void __init mackerel_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 srcr4;</div><div class='ctx'> 	struct clk *clk;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* External clock source */</div><div class='ctx'> 	clk_set_rate(&amp;sh7372_dv_clki_clk, 27000000);</div><div class='hunk'>@@ -1481,7 +1504,6 @@ static void __init mackerel_init(void)</div><div class='ctx'> 	irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);</div><div class='ctx'> </div><div class='ctx'> 	/* enable SDHI0 */</div><div class='del'>-	gpio_request(GPIO_FN_SDHICD0, NULL);</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHIWP0, NULL);</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHICMD0, NULL);</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHICLK0, NULL);</div><div class='hunk'>@@ -1490,13 +1512,6 @@ static void __init mackerel_init(void)</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHID0_1, NULL);</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHID0_0, NULL);</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(evt2irq(0x3340), mackerel_sdhi0_gpio_cd,</div><div class='del'>-			  IRQF_TRIGGER_FALLING, "sdhi0 cd", &amp;sdhi0_device.dev);</div><div class='del'>-	if (!ret)</div><div class='del'>-		sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;</div><div class='del'>-	else</div><div class='del'>-		pr_err("Cannot get IRQ #%d: %d\n", evt2irq(0x3340), ret);</div><div class='del'>-</div><div class='ctx'> #if !defined(CONFIG_MMC_SH_MMCIF) &amp;&amp; !defined(CONFIG_MMC_SH_MMCIF_MODULE)</div><div class='ctx'> 	/* enable SDHI1 */</div><div class='ctx'> 	gpio_request(GPIO_FN_SDHICMD1, NULL);</div><div class='hunk'>@@ -1623,5 +1638,6 @@ MACHINE_START(MACKEREL, "mackerel")</div><div class='ctx'> 	.init_irq	= sh7372_init_irq,</div><div class='ctx'> 	.handle_irq	= shmobile_handle_irq_intc,</div><div class='ctx'> 	.init_machine	= mackerel_init,</div><div class='add'>+	.init_late	= shmobile_init_late,</div><div class='ctx'> 	.timer		= &amp;shmobile_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c<br/>index ef0e13bf0b3a..14de3787cafc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-marzen.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/board-marzen.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/board-marzen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/board-marzen.c</a></div><div class='hunk'>@@ -98,5 +98,6 @@ MACHINE_START(MARZEN, "marzen")</div><div class='ctx'> 	.init_irq	= r8a7779_init_irq,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= marzen_init,</div><div class='add'>+	.init_late	= shmobile_init_late,</div><div class='ctx'> 	.timer		= &amp;shmobile_timer,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-shmobile/clock-emev2.c b/arch/arm/mach-shmobile/clock-emev2.c<br/>new file mode 100644<br/>index 000000000000..4710f1847bb7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/clock-emev2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/clock-emev2.c</a></div><div class='hunk'>@@ -0,0 +1,249 @@</div><div class='add'>+/*</div><div class='add'>+ * Emma Mobile EV2 clock framework support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012  Magnus Damm</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 of the License.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/sh_clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+</div><div class='add'>+#define EMEV2_SMU_BASE 0xe0110000</div><div class='add'>+</div><div class='add'>+/* EMEV2 SMU registers */</div><div class='add'>+#define USIAU0_RSTCTRL 0x094</div><div class='add'>+#define USIBU1_RSTCTRL 0x0ac</div><div class='add'>+#define USIBU2_RSTCTRL 0x0b0</div><div class='add'>+#define USIBU3_RSTCTRL 0x0b4</div><div class='add'>+#define STI_RSTCTRL 0x124</div><div class='add'>+#define USIAU0GCLKCTRL 0x4a0</div><div class='add'>+#define USIBU1GCLKCTRL 0x4b8</div><div class='add'>+#define USIBU2GCLKCTRL 0x4bc</div><div class='add'>+#define USIBU3GCLKCTRL 0x04c0</div><div class='add'>+#define STIGCLKCTRL 0x528</div><div class='add'>+#define USIAU0SCLKDIV 0x61c</div><div class='add'>+#define USIB2SCLKDIV 0x65c</div><div class='add'>+#define USIB3SCLKDIV 0x660</div><div class='add'>+#define STI_CLKSEL 0x688</div><div class='add'>+#define SMU_GENERAL_REG0 0x7c0</div><div class='add'>+</div><div class='add'>+/* not pretty, but hey */</div><div class='add'>+static void __iomem *smu_base;</div><div class='add'>+</div><div class='add'>+static void emev2_smu_write(unsigned long value, int offs)</div><div class='add'>+{</div><div class='add'>+	BUG_ON(!smu_base || (offs &gt;= PAGE_SIZE));</div><div class='add'>+	iowrite32(value, smu_base + offs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void emev2_set_boot_vector(unsigned long value)</div><div class='add'>+{</div><div class='add'>+	emev2_smu_write(value, SMU_GENERAL_REG0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_mapping smu_mapping = {</div><div class='add'>+	.phys	= EMEV2_SMU_BASE,</div><div class='add'>+	.len	= PAGE_SIZE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Fixed 32 KHz root clock from C32K pin */</div><div class='add'>+static struct clk c32k_clk = {</div><div class='add'>+	.rate           = 32768,</div><div class='add'>+	.mapping	= &amp;smu_mapping,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PLL3 multiplies C32K with 7000 */</div><div class='add'>+static unsigned long pll3_recalc(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	return clk-&gt;parent-&gt;rate * 7000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sh_clk_ops pll3_clk_ops = {</div><div class='add'>+	.recalc		= pll3_recalc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk pll3_clk = {</div><div class='add'>+	.ops		= &amp;pll3_clk_ops,</div><div class='add'>+	.parent		= &amp;c32k_clk,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *main_clks[] = {</div><div class='add'>+	&amp;c32k_clk,</div><div class='add'>+	&amp;pll3_clk,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum { SCLKDIV_USIAU0, SCLKDIV_USIBU2, SCLKDIV_USIBU1, SCLKDIV_USIBU3,</div><div class='add'>+	SCLKDIV_NR };</div><div class='add'>+</div><div class='add'>+#define SCLKDIV(_reg, _shift)			\</div><div class='add'>+{								\</div><div class='add'>+	.parent		= &amp;pll3_clk,				\</div><div class='add'>+	.enable_reg	= IOMEM(EMEV2_SMU_BASE + (_reg)),	\</div><div class='add'>+	.enable_bit	= _shift,				\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk sclkdiv_clks[SCLKDIV_NR] = {</div><div class='add'>+	[SCLKDIV_USIAU0] = SCLKDIV(USIAU0SCLKDIV, 0),</div><div class='add'>+	[SCLKDIV_USIBU2] = SCLKDIV(USIB2SCLKDIV, 16),</div><div class='add'>+	[SCLKDIV_USIBU1] = SCLKDIV(USIB2SCLKDIV, 0),</div><div class='add'>+	[SCLKDIV_USIBU3] = SCLKDIV(USIB3SCLKDIV, 0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum { GCLK_USIAU0_SCLK, GCLK_USIBU1_SCLK, GCLK_USIBU2_SCLK, GCLK_USIBU3_SCLK,</div><div class='add'>+	GCLK_STI_SCLK,</div><div class='add'>+	GCLK_NR };</div><div class='add'>+</div><div class='add'>+#define GCLK_SCLK(_parent, _reg) \</div><div class='add'>+{								\</div><div class='add'>+	.parent		= _parent,				\</div><div class='add'>+	.enable_reg	= IOMEM(EMEV2_SMU_BASE + (_reg)),	\</div><div class='add'>+	.enable_bit	= 1, /* SCLK_GCC */			\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk gclk_clks[GCLK_NR] = {</div><div class='add'>+	[GCLK_USIAU0_SCLK] = GCLK_SCLK(&amp;sclkdiv_clks[SCLKDIV_USIAU0],</div><div class='add'>+				       USIAU0GCLKCTRL),</div><div class='add'>+	[GCLK_USIBU1_SCLK] = GCLK_SCLK(&amp;sclkdiv_clks[SCLKDIV_USIBU1],</div><div class='add'>+				       USIBU1GCLKCTRL),</div><div class='add'>+	[GCLK_USIBU2_SCLK] = GCLK_SCLK(&amp;sclkdiv_clks[SCLKDIV_USIBU2],</div><div class='add'>+				       USIBU2GCLKCTRL),</div><div class='add'>+	[GCLK_USIBU3_SCLK] = GCLK_SCLK(&amp;sclkdiv_clks[SCLKDIV_USIBU3],</div><div class='add'>+				       USIBU3GCLKCTRL),</div><div class='add'>+	[GCLK_STI_SCLK] = GCLK_SCLK(&amp;c32k_clk, STIGCLKCTRL),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int emev2_gclk_enable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	iowrite32(ioread32(clk-&gt;mapped_reg) | (1 &lt;&lt; clk-&gt;enable_bit),</div><div class='add'>+		  clk-&gt;mapped_reg);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emev2_gclk_disable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	iowrite32(ioread32(clk-&gt;mapped_reg) &amp; ~(1 &lt;&lt; clk-&gt;enable_bit),</div><div class='add'>+		  clk-&gt;mapped_reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sh_clk_ops emev2_gclk_clk_ops = {</div><div class='add'>+	.enable		= emev2_gclk_enable,</div><div class='add'>+	.disable	= emev2_gclk_disable,</div><div class='add'>+	.recalc		= followparent_recalc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init emev2_gclk_register(struct clk *clks, int nr)</div><div class='add'>+{</div><div class='add'>+	struct clk *clkp;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int k;</div><div class='add'>+</div><div class='add'>+	for (k = 0; !ret &amp;&amp; (k &lt; nr); k++) {</div><div class='add'>+		clkp = clks + k;</div><div class='add'>+		clkp-&gt;ops = &amp;emev2_gclk_clk_ops;</div><div class='add'>+		ret |= clk_register(clkp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long emev2_sclkdiv_recalc(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	unsigned int sclk_div;</div><div class='add'>+</div><div class='add'>+	sclk_div = (ioread32(clk-&gt;mapped_reg) &gt;&gt; clk-&gt;enable_bit) &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	return clk-&gt;parent-&gt;rate / (sclk_div + 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sh_clk_ops emev2_sclkdiv_clk_ops = {</div><div class='add'>+	.recalc		= emev2_sclkdiv_recalc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init emev2_sclkdiv_register(struct clk *clks, int nr)</div><div class='add'>+{</div><div class='add'>+	struct clk *clkp;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int k;</div><div class='add'>+</div><div class='add'>+	for (k = 0; !ret &amp;&amp; (k &lt; nr); k++) {</div><div class='add'>+		clkp = clks + k;</div><div class='add'>+		clkp-&gt;ops = &amp;emev2_sclkdiv_clk_ops;</div><div class='add'>+		ret |= clk_register(clkp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_lookup lookups[] = {</div><div class='add'>+	CLKDEV_DEV_ID("serial8250-em.0", &amp;gclk_clks[GCLK_USIAU0_SCLK]),</div><div class='add'>+	CLKDEV_DEV_ID("e1020000.uart", &amp;gclk_clks[GCLK_USIAU0_SCLK]),</div><div class='add'>+	CLKDEV_DEV_ID("serial8250-em.1", &amp;gclk_clks[GCLK_USIBU1_SCLK]),</div><div class='add'>+	CLKDEV_DEV_ID("e1030000.uart", &amp;gclk_clks[GCLK_USIBU1_SCLK]),</div><div class='add'>+	CLKDEV_DEV_ID("serial8250-em.2", &amp;gclk_clks[GCLK_USIBU2_SCLK]),</div><div class='add'>+	CLKDEV_DEV_ID("e1040000.uart", &amp;gclk_clks[GCLK_USIBU2_SCLK]),</div><div class='add'>+	CLKDEV_DEV_ID("serial8250-em.3", &amp;gclk_clks[GCLK_USIBU3_SCLK]),</div><div class='add'>+	CLKDEV_DEV_ID("e1050000.uart", &amp;gclk_clks[GCLK_USIBU3_SCLK]),</div><div class='add'>+	CLKDEV_DEV_ID("em_sti.0", &amp;gclk_clks[GCLK_STI_SCLK]),</div><div class='add'>+	CLKDEV_DEV_ID("e0180000.sti", &amp;gclk_clks[GCLK_STI_SCLK]),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init emev2_clock_init(void)</div><div class='add'>+{</div><div class='add'>+	int k, ret = 0;</div><div class='add'>+	static int is_setup;</div><div class='add'>+</div><div class='add'>+	/* yuck, this is ugly as hell, but the non-smp case of clocks</div><div class='add'>+	 * code is now designed to rely on ioremap() instead of static</div><div class='add'>+	 * entity maps. in the case of smp we need access to the SMU</div><div class='add'>+	 * register earlier than ioremap() is actually working without</div><div class='add'>+	 * any static maps. to enable SMP in ugly but with dynamic</div><div class='add'>+	 * mappings we have to call emev2_clock_init() from different</div><div class='add'>+	 * places depending on UP and SMP...</div><div class='add'>+	 */</div><div class='add'>+	if (is_setup++)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	smu_base = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);</div><div class='add'>+	BUG_ON(!smu_base);</div><div class='add'>+</div><div class='add'>+	/* setup STI timer to run on 37.768 kHz and deassert reset */</div><div class='add'>+	emev2_smu_write(0, STI_CLKSEL);</div><div class='add'>+	emev2_smu_write(1, STI_RSTCTRL);</div><div class='add'>+</div><div class='add'>+	/* deassert reset for UART0-&gt;UART3 */</div><div class='add'>+	emev2_smu_write(2, USIAU0_RSTCTRL);</div><div class='add'>+	emev2_smu_write(2, USIBU1_RSTCTRL);</div><div class='add'>+	emev2_smu_write(2, USIBU2_RSTCTRL);</div><div class='add'>+	emev2_smu_write(2, USIBU3_RSTCTRL);</div><div class='add'>+</div><div class='add'>+	for (k = 0; !ret &amp;&amp; (k &lt; ARRAY_SIZE(main_clks)); k++)</div><div class='add'>+		ret = clk_register(main_clks[k]);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = emev2_sclkdiv_register(sclkdiv_clks, SCLKDIV_NR);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = emev2_gclk_register(gclk_clks, GCLK_NR);</div><div class='add'>+</div><div class='add'>+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		shmobile_clk_init();</div><div class='add'>+	else</div><div class='add'>+		panic("failed to setup emev2 clocks\n");</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c<br/>index 99c4d743a99c..26eea5f21054 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/clock-r8a7740.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/clock-r8a7740.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/clock-r8a7740.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/clock-r8a7740.c</a></div><div class='hunk'>@@ -47,6 +47,7 @@</div><div class='ctx'> #define PLLC01CR	0xe6150028</div><div class='ctx'> </div><div class='ctx'> #define SUBCKCR		0xe6150080</div><div class='add'>+#define USBCKCR		0xe615008c</div><div class='ctx'> </div><div class='ctx'> #define MSTPSR0		0xe6150030</div><div class='ctx'> #define MSTPSR1		0xe6150038</div><div class='hunk'>@@ -181,6 +182,95 @@ static struct clk pllc1_div2_clk = {</div><div class='ctx'> 	.parent		= &amp;pllc1_clk,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* USB clock */</div><div class='add'>+static struct clk *usb24s_parents[] = {</div><div class='add'>+	[0] = &amp;system_clk,</div><div class='add'>+	[1] = &amp;extal2_clk</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int usb24s_enable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	__raw_writel(__raw_readl(USBCKCR) &amp; ~(1 &lt;&lt; 8), USBCKCR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void usb24s_disable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	__raw_writel(__raw_readl(USBCKCR) | (1 &lt;&lt; 8), USBCKCR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int usb24s_set_parent(struct clk *clk, struct clk *parent)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (!clk-&gt;parent_table || !clk-&gt;parent_num)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Search the parent */</div><div class='add'>+	for (i = 0; i &lt; clk-&gt;parent_num; i++)</div><div class='add'>+		if (clk-&gt;parent_table[i] == parent)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+	if (i == clk-&gt;parent_num)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	ret = clk_reparent(clk, parent);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = __raw_readl(USBCKCR);</div><div class='add'>+	val &amp;= ~(1 &lt;&lt; 7);</div><div class='add'>+	val |= i &lt;&lt; 7;</div><div class='add'>+	__raw_writel(val, USBCKCR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sh_clk_ops usb24s_clk_ops = {</div><div class='add'>+	.recalc		= followparent_recalc,</div><div class='add'>+	.enable		= usb24s_enable,</div><div class='add'>+	.disable	= usb24s_disable,</div><div class='add'>+	.set_parent	= usb24s_set_parent,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk usb24s_clk = {</div><div class='add'>+	.ops		= &amp;usb24s_clk_ops,</div><div class='add'>+	.parent_table	= usb24s_parents,</div><div class='add'>+	.parent_num	= ARRAY_SIZE(usb24s_parents),</div><div class='add'>+	.parent		= &amp;system_clk,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned long usb24_recalc(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	return clk-&gt;parent-&gt;rate /</div><div class='add'>+		((__raw_readl(USBCKCR) &amp; (1 &lt;&lt; 6)) ? 1 : 2);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int usb24_set_rate(struct clk *clk, unsigned long rate)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* closer to which ? parent-&gt;rate or parent-&gt;rate/2 */</div><div class='add'>+	val = __raw_readl(USBCKCR);</div><div class='add'>+	val &amp;= ~(1 &lt;&lt; 6);</div><div class='add'>+	val |= (rate &gt; (clk-&gt;parent-&gt;rate / 4) * 3) &lt;&lt; 6;</div><div class='add'>+	__raw_writel(val, USBCKCR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sh_clk_ops usb24_clk_ops = {</div><div class='add'>+	.recalc		= usb24_recalc,</div><div class='add'>+	.set_rate	= usb24_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk usb24_clk = {</div><div class='add'>+	.ops		= &amp;usb24_clk_ops,</div><div class='add'>+	.parent		= &amp;usb24s_clk,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct clk *main_clks[] = {</div><div class='ctx'> 	&amp;extalr_clk,</div><div class='ctx'> 	&amp;extal1_clk,</div><div class='hunk'>@@ -196,6 +286,8 @@ struct clk *main_clks[] = {</div><div class='ctx'> 	&amp;pllc0_clk,</div><div class='ctx'> 	&amp;pllc1_clk,</div><div class='ctx'> 	&amp;pllc1_div2_clk,</div><div class='add'>+	&amp;usb24s_clk,</div><div class='add'>+	&amp;usb24_clk,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void div4_kick(struct clk *clk)</div><div class='hunk'>@@ -223,7 +315,7 @@ static struct clk_div4_table div4_table = {</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='ctx'> 	DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP,</div><div class='del'>-	DIV4_HPP, DIV4_S, DIV4_ZB, DIV4_M3, DIV4_CP,</div><div class='add'>+	DIV4_HPP, DIV4_USBP, DIV4_S, DIV4_ZB, DIV4_M3, DIV4_CP,</div><div class='ctx'> 	DIV4_NR</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -234,6 +326,7 @@ struct clk div4_clks[DIV4_NR] = {</div><div class='ctx'> 	[DIV4_M1]	= SH_CLK_DIV4(&amp;pllc1_clk, FRQCRA,  4, 0x6fff, CLK_ENABLE_ON_INIT),</div><div class='ctx'> 	[DIV4_HP]	= SH_CLK_DIV4(&amp;pllc1_clk, FRQCRB,  4, 0x6fff, 0),</div><div class='ctx'> 	[DIV4_HPP]	= SH_CLK_DIV4(&amp;pllc1_clk, FRQCRC, 20, 0x6fff, 0),</div><div class='add'>+	[DIV4_USBP]	= SH_CLK_DIV4(&amp;pllc1_clk, FRQCRC, 16, 0x6fff, 0),</div><div class='ctx'> 	[DIV4_S]	= SH_CLK_DIV4(&amp;pllc1_clk, FRQCRC, 12, 0x6fff, 0),</div><div class='ctx'> 	[DIV4_ZB]	= SH_CLK_DIV4(&amp;pllc1_clk, FRQCRC,  8, 0x6fff, 0),</div><div class='ctx'> 	[DIV4_M3]	= SH_CLK_DIV4(&amp;pllc1_clk, FRQCRC,  4, 0x6fff, 0),</div><div class='hunk'>@@ -257,7 +350,11 @@ enum {</div><div class='ctx'> 	MSTP222,</div><div class='ctx'> 	MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,</div><div class='ctx'> </div><div class='del'>-	MSTP329, MSTP323,</div><div class='add'>+	MSTP329, MSTP328, MSTP323, MSTP320,</div><div class='add'>+	MSTP314, MSTP313, MSTP312,</div><div class='add'>+	MSTP309,</div><div class='add'>+</div><div class='add'>+	MSTP416, MSTP415, MSTP407, MSTP406,</div><div class='ctx'> </div><div class='ctx'> 	MSTP_NR</div><div class='ctx'> };</div><div class='hunk'>@@ -280,7 +377,18 @@ static struct clk mstp_clks[MSTP_NR] = {</div><div class='ctx'> 	[MSTP200] = SH_CLK_MSTP32(&amp;div6_clks[DIV6_SUB],	SMSTPCR2,  0, 0), /* SCIFA4 */</div><div class='ctx'> </div><div class='ctx'> 	[MSTP329] = SH_CLK_MSTP32(&amp;r_clk,		SMSTPCR3, 29, 0), /* CMT10 */</div><div class='add'>+	[MSTP328] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_HP],	SMSTPCR3, 28, 0), /* FSI */</div><div class='ctx'> 	[MSTP323] = SH_CLK_MSTP32(&amp;div6_clks[DIV6_SUB],	SMSTPCR3, 23, 0), /* IIC1 */</div><div class='add'>+	[MSTP320] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_HP],	SMSTPCR3, 20, 0), /* USBF */</div><div class='add'>+	[MSTP314] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_HP],	SMSTPCR3, 14, 0), /* SDHI0 */</div><div class='add'>+	[MSTP313] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_HP],	SMSTPCR3, 13, 0), /* SDHI1 */</div><div class='add'>+	[MSTP312] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_HP],	SMSTPCR3, 12, 0), /* MMC */</div><div class='add'>+	[MSTP309] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_HP],	SMSTPCR3,  9, 0), /* GEther */</div><div class='add'>+</div><div class='add'>+	[MSTP416] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_HP],	SMSTPCR4, 16, 0), /* USBHOST */</div><div class='add'>+	[MSTP415] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_HP],	SMSTPCR4, 15, 0), /* SDHI2 */</div><div class='add'>+	[MSTP407] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_HP],	SMSTPCR4,  7, 0), /* USB-Func */</div><div class='add'>+	[MSTP406] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_HP],	SMSTPCR4,  6, 0), /* USB Phy */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct clk_lookup lookups[] = {</div><div class='hunk'>@@ -299,6 +407,7 @@ static struct clk_lookup lookups[] = {</div><div class='ctx'> 	CLKDEV_CON_ID("pllc0_clk",		&amp;pllc0_clk),</div><div class='ctx'> 	CLKDEV_CON_ID("pllc1_clk",		&amp;pllc1_clk),</div><div class='ctx'> 	CLKDEV_CON_ID("pllc1_div2_clk",		&amp;pllc1_div2_clk),</div><div class='add'>+	CLKDEV_CON_ID("usb24s",			&amp;usb24s_clk),</div><div class='ctx'> </div><div class='ctx'> 	/* DIV4 clocks */</div><div class='ctx'> 	CLKDEV_CON_ID("i_clk",			&amp;div4_clks[DIV4_I]),</div><div class='hunk'>@@ -334,7 +443,22 @@ static struct clk_lookup lookups[] = {</div><div class='ctx'> 	CLKDEV_DEV_ID("sh-sci.6",		&amp;mstp_clks[MSTP230]),</div><div class='ctx'> </div><div class='ctx'> 	CLKDEV_DEV_ID("sh_cmt.10",		&amp;mstp_clks[MSTP329]),</div><div class='add'>+	CLKDEV_DEV_ID("sh_fsi2",		&amp;mstp_clks[MSTP328]),</div><div class='ctx'> 	CLKDEV_DEV_ID("i2c-sh_mobile.1",	&amp;mstp_clks[MSTP323]),</div><div class='add'>+	CLKDEV_DEV_ID("renesas_usbhs",		&amp;mstp_clks[MSTP320]),</div><div class='add'>+	CLKDEV_DEV_ID("sh_mobile_sdhi.0",	&amp;mstp_clks[MSTP314]),</div><div class='add'>+	CLKDEV_DEV_ID("sh_mobile_sdhi.1",	&amp;mstp_clks[MSTP313]),</div><div class='add'>+	CLKDEV_DEV_ID("sh_mmcif",		&amp;mstp_clks[MSTP312]),</div><div class='add'>+	CLKDEV_DEV_ID("sh-eth",			&amp;mstp_clks[MSTP309]),</div><div class='add'>+</div><div class='add'>+	CLKDEV_DEV_ID("sh_mobile_sdhi.2",	&amp;mstp_clks[MSTP415]),</div><div class='add'>+</div><div class='add'>+	/* ICK */</div><div class='add'>+	CLKDEV_ICK_ID("host",	"renesas_usbhs",	&amp;mstp_clks[MSTP416]),</div><div class='add'>+	CLKDEV_ICK_ID("func",	"renesas_usbhs",	&amp;mstp_clks[MSTP407]),</div><div class='add'>+	CLKDEV_ICK_ID("phy",	"renesas_usbhs",	&amp;mstp_clks[MSTP406]),</div><div class='add'>+	CLKDEV_ICK_ID("pci",	"renesas_usbhs",	&amp;div4_clks[DIV4_USBP]),</div><div class='add'>+	CLKDEV_ICK_ID("usb24",	"renesas_usbhs",	&amp;usb24_clk),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void __init r8a7740_clock_init(u8 md_ck)</div><div class='head'>diff --git a/arch/arm/mach-shmobile/common.c b/arch/arm/mach-shmobile/common.c<br/>new file mode 100644<br/>index 000000000000..608aba9d60d7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/common.c</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+/*</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 of the License.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+</div><div class='add'>+void __init shmobile_init_late(void)</div><div class='add'>+{</div><div class='add'>+	shmobile_suspend_init();</div><div class='add'>+	shmobile_cpuidle_init();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-shmobile/cpuidle.c b/arch/arm/mach-shmobile/cpuidle.c<br/>index 7e6559105d40..7b541e911ab4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/cpuidle.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/cpuidle.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/cpuidle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/cpuidle.c</a></div><div class='hunk'>@@ -46,7 +46,7 @@ static struct cpuidle_driver shmobile_cpuidle_driver = {</div><div class='ctx'> </div><div class='ctx'> void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);</div><div class='ctx'> </div><div class='del'>-static int shmobile_cpuidle_init(void)</div><div class='add'>+int shmobile_cpuidle_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpuidle_device *dev = &amp;shmobile_cpuidle_dev;</div><div class='ctx'> 	struct cpuidle_driver *drv = &amp;shmobile_cpuidle_driver;</div><div class='hunk'>@@ -65,4 +65,3 @@ static int shmobile_cpuidle_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-late_initcall(shmobile_cpuidle_init);</div><div class='head'>diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S<br/>index 6ac015c89206..b202c1272526 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/headsmp.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/headsmp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/headsmp.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/headsmp.S</a></div><div class='hunk'>@@ -16,6 +16,59 @@</div><div class='ctx'> </div><div class='ctx'> 	__CPUINIT</div><div class='ctx'> </div><div class='add'>+/* Cache invalidation nicked from arch/arm/mach-imx/head-v7.S, thanks!</div><div class='add'>+ *</div><div class='add'>+ * The secondary kernel init calls v7_flush_dcache_all before it enables</div><div class='add'>+ * the L1; however, the L1 comes out of reset in an undefined state, so</div><div class='add'>+ * the clean + invalidate performed by v7_flush_dcache_all causes a bunch</div><div class='add'>+ * of cache lines with uninitialized data and uninitialized tags to get</div><div class='add'>+ * written out to memory, which does really unpleasant things to the main</div><div class='add'>+ * processor.  We fix this by performing an invalidate, rather than a</div><div class='add'>+ * clean + invalidate, before jumping into the kernel.</div><div class='add'>+ *</div><div class='add'>+ * This funciton is cloned from arch/arm/mach-tegra/headsmp.S, and needs</div><div class='add'>+ * to be called for both secondary cores startup and primary core resume</div><div class='add'>+ * procedures.  Ideally, it should be moved into arch/arm/mm/cache-v7.S.</div><div class='add'>+ */</div><div class='add'>+ENTRY(v7_invalidate_l1)</div><div class='add'>+	mov	r0, #0</div><div class='add'>+	mcr	p15, 0, r0, c7, c5, 0	@ invalidate I cache</div><div class='add'>+	mcr	p15, 2, r0, c0, c0, 0</div><div class='add'>+	mrc	p15, 1, r0, c0, c0, 0</div><div class='add'>+</div><div class='add'>+	ldr	r1, =0x7fff</div><div class='add'>+	and	r2, r1, r0, lsr #13</div><div class='add'>+</div><div class='add'>+	ldr	r1, =0x3ff</div><div class='add'>+</div><div class='add'>+	and	r3, r1, r0, lsr #3	@ NumWays - 1</div><div class='add'>+	add	r2, r2, #1		@ NumSets</div><div class='add'>+</div><div class='add'>+	and	r0, r0, #0x7</div><div class='add'>+	add	r0, r0, #4	@ SetShift</div><div class='add'>+</div><div class='add'>+	clz	r1, r3		@ WayShift</div><div class='add'>+	add	r4, r3, #1	@ NumWays</div><div class='add'>+1:	sub	r2, r2, #1	@ NumSets--</div><div class='add'>+	mov	r3, r4		@ Temp = NumWays</div><div class='add'>+2:	subs	r3, r3, #1	@ Temp--</div><div class='add'>+	mov	r5, r3, lsl r1</div><div class='add'>+	mov	r6, r2, lsl r0</div><div class='add'>+	orr	r5, r5, r6	@ Reg = (Temp&lt;&lt;WayShift)|(NumSets&lt;&lt;SetShift)</div><div class='add'>+	mcr	p15, 0, r5, c7, c6, 2</div><div class='add'>+	bgt	2b</div><div class='add'>+	cmp	r2, #0</div><div class='add'>+	bgt	1b</div><div class='add'>+	dsb</div><div class='add'>+	isb</div><div class='add'>+	mov	pc, lr</div><div class='add'>+ENDPROC(v7_invalidate_l1)</div><div class='add'>+</div><div class='add'>+ENTRY(shmobile_invalidate_start)</div><div class='add'>+	bl	v7_invalidate_l1</div><div class='add'>+	b	secondary_startup</div><div class='add'>+ENDPROC(shmobile_invalidate_start)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Reset vector for secondary CPUs.</div><div class='ctx'>  * This will be mapped at address 0 by SBAR register.</div><div class='hunk'>@@ -24,4 +77,5 @@</div><div class='ctx'> 	.align  12</div><div class='ctx'> ENTRY(shmobile_secondary_vector)</div><div class='ctx'> 	ldr     pc, 1f</div><div class='del'>-1:	.long   secondary_startup - PAGE_OFFSET + PLAT_PHYS_OFFSET</div><div class='add'>+1:	.long   shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET</div><div class='add'>+ENDPROC(shmobile_secondary_vector)</div><div class='head'>diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h<br/>index 83ad3fe0a75f..01e2bc014f15 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/include/mach/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/include/mach/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/include/mach/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/include/mach/common.h</a></div><div class='hunk'>@@ -3,8 +3,9 @@</div><div class='ctx'> </div><div class='ctx'> extern void shmobile_earlytimer_init(void);</div><div class='ctx'> extern struct sys_timer shmobile_timer;</div><div class='add'>+extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,</div><div class='add'>+				 unsigned int mult, unsigned int div);</div><div class='ctx'> struct twd_local_timer;</div><div class='del'>-void shmobile_twd_init(struct twd_local_timer *twd_local_timer);</div><div class='ctx'> extern void shmobile_setup_console(void);</div><div class='ctx'> extern void shmobile_secondary_vector(void);</div><div class='ctx'> extern int shmobile_platform_cpu_kill(unsigned int cpu);</div><div class='hunk'>@@ -82,5 +83,20 @@ extern int r8a7779_platform_cpu_kill(unsigned int cpu);</div><div class='ctx'> extern void r8a7779_secondary_init(unsigned int cpu);</div><div class='ctx'> extern int r8a7779_boot_secondary(unsigned int cpu);</div><div class='ctx'> extern void r8a7779_smp_prepare_cpus(void);</div><div class='add'>+extern void r8a7779_register_twd(void);</div><div class='add'>+</div><div class='add'>+extern void shmobile_init_late(void);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SUSPEND</div><div class='add'>+int shmobile_suspend_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int shmobile_suspend_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CPU_IDLE</div><div class='add'>+int shmobile_cpuidle_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int shmobile_cpuidle_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __ARCH_MACH_COMMON_H */</div><div class='head'>diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h<br/>new file mode 100644<br/>index 000000000000..e6b0c1bf4b7e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/include/mach/emev2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/include/mach/emev2.h</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+#ifndef __ASM_EMEV2_H__</div><div class='add'>+#define __ASM_EMEV2_H__</div><div class='add'>+</div><div class='add'>+extern void emev2_map_io(void);</div><div class='add'>+extern void emev2_init_irq(void);</div><div class='add'>+extern void emev2_add_early_devices(void);</div><div class='add'>+extern void emev2_add_standard_devices(void);</div><div class='add'>+extern void emev2_clock_init(void);</div><div class='add'>+extern void emev2_set_boot_vector(unsigned long value);</div><div class='add'>+extern unsigned int emev2_get_core_count(void);</div><div class='add'>+extern int emev2_platform_cpu_kill(unsigned int cpu);</div><div class='add'>+extern void emev2_secondary_init(unsigned int cpu);</div><div class='add'>+extern int emev2_boot_secondary(unsigned int cpu);</div><div class='add'>+extern void emev2_smp_prepare_cpus(void);</div><div class='add'>+</div><div class='add'>+#define EMEV2_GPIO_BASE 200</div><div class='add'>+#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n))</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_EMEV2_H__ */</div><div class='head'>diff --git a/arch/arm/mach-shmobile/include/mach/intc.h b/arch/arm/mach-shmobile/include/mach/intc.h<br/>index 8b22258c8caa..a5603c76cfe0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/include/mach/intc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/include/mach/intc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/include/mach/intc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/include/mach/intc.h</a></div><div class='hunk'>@@ -142,6 +142,50 @@ static struct intc_desc p ## _desc __initdata = {			\</div><div class='ctx'> 			     p ## _sense_registers, p ## _ack_registers) \</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define INTC_IRQ_PINS_16H(p, base, vect, str)				\</div><div class='add'>+									\</div><div class='add'>+static struct resource p ## _resources[] __initdata = {			\</div><div class='add'>+	[0] = {								\</div><div class='add'>+		.start	= base,						\</div><div class='add'>+		.end	= base + 0x64,					\</div><div class='add'>+		.flags	= IORESOURCE_MEM,				\</div><div class='add'>+	},								\</div><div class='add'>+};									\</div><div class='add'>+									\</div><div class='add'>+enum {									\</div><div class='add'>+	p ## _UNUSED = 0,						\</div><div class='add'>+	INTC_IRQ_PINS_ENUM_16H(p),					\</div><div class='add'>+};									\</div><div class='add'>+									\</div><div class='add'>+static struct intc_vect p ## _vectors[] __initdata = {			\</div><div class='add'>+	INTC_IRQ_PINS_VECT_16H(p, vect),				\</div><div class='add'>+};									\</div><div class='add'>+									\</div><div class='add'>+static struct intc_mask_reg p ## _mask_registers[] __initdata = {	\</div><div class='add'>+	INTC_IRQ_PINS_MASK_16H(p, base),				\</div><div class='add'>+};									\</div><div class='add'>+									\</div><div class='add'>+static struct intc_prio_reg p ## _prio_registers[] __initdata = {	\</div><div class='add'>+	INTC_IRQ_PINS_PRIO_16H(p, base),				\</div><div class='add'>+};									\</div><div class='add'>+									\</div><div class='add'>+static struct intc_sense_reg p ## _sense_registers[] __initdata = {	\</div><div class='add'>+	INTC_IRQ_PINS_SENSE_16H(p, base),				\</div><div class='add'>+};									\</div><div class='add'>+									\</div><div class='add'>+static struct intc_mask_reg p ## _ack_registers[] __initdata = {	\</div><div class='add'>+	INTC_IRQ_PINS_ACK_16H(p, base),					\</div><div class='add'>+};									\</div><div class='add'>+									\</div><div class='add'>+static struct intc_desc p ## _desc __initdata = {			\</div><div class='add'>+	.name = str,							\</div><div class='add'>+	.resource = p ## _resources,					\</div><div class='add'>+	.num_resources = ARRAY_SIZE(p ## _resources),			\</div><div class='add'>+	.hw = INTC_HW_DESC(p ## _vectors, NULL,				\</div><div class='add'>+			     p ## _mask_registers, p ## _prio_registers, \</div><div class='add'>+			     p ## _sense_registers, p ## _ack_registers) \</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define INTC_IRQ_PINS_32(p, base, vect, str)				\</div><div class='ctx'> 									\</div><div class='ctx'> static struct resource p ## _resources[] __initdata = {			\</div><div class='head'>diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h<br/>index 4e686cc201fc..06a5da3c3050 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/include/mach/irqs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/include/mach/irqs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/include/mach/irqs.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #define gic_spi(nr)		((nr) + 32)</div><div class='ctx'> </div><div class='ctx'> /* INTCS */</div><div class='del'>-#define INTCS_VECT_BASE		0x2200</div><div class='add'>+#define INTCS_VECT_BASE		0x3400</div><div class='ctx'> #define INTCS_VECT(n, vect)	INTC_VECT((n), INTCS_VECT_BASE + (vect))</div><div class='ctx'> #define intcs_evt2irq(evt)	evt2irq(INTCS_VECT_BASE + (evt))</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h<br/>index 8254ab86f6cd..915d0093da08 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/include/mach/sh7372.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/include/mach/sh7372.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/include/mach/sh7372.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/include/mach/sh7372.h</a></div><div class='hunk'>@@ -457,6 +457,8 @@ enum {</div><div class='ctx'> 	SHDMA_SLAVE_SDHI1_TX,</div><div class='ctx'> 	SHDMA_SLAVE_SDHI2_RX,</div><div class='ctx'> 	SHDMA_SLAVE_SDHI2_TX,</div><div class='add'>+	SHDMA_SLAVE_FSIA_RX,</div><div class='add'>+	SHDMA_SLAVE_FSIA_TX,</div><div class='ctx'> 	SHDMA_SLAVE_MMCIF_RX,</div><div class='ctx'> 	SHDMA_SLAVE_MMCIF_TX,</div><div class='ctx'> 	SHDMA_SLAVE_USB0_TX,</div><div class='head'>diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h<br/>index cad57578ceed..398e2c10913b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/include/mach/sh73a0.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/include/mach/sh73a0.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/include/mach/sh73a0.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/include/mach/sh73a0.h</a></div><div class='hunk'>@@ -482,6 +482,9 @@ enum {</div><div class='ctx'> 	GPIO_FN_FSIAILR_PU,</div><div class='ctx'> 	GPIO_FN_FSIAIBT_PU,</div><div class='ctx'> 	GPIO_FN_FSIAISLD_PU,</div><div class='add'>+</div><div class='add'>+	/* end of GPIO */</div><div class='add'>+	GPIO_NR,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* DMA slave IDs */</div><div class='hunk'>@@ -515,8 +518,36 @@ enum {</div><div class='ctx'> 	SHDMA_SLAVE_MMCIF_RX,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* PINT interrupts are located at Linux IRQ 800 and up */</div><div class='del'>-#define SH73A0_PINT0_IRQ(irq) ((irq) + 800)</div><div class='del'>-#define SH73A0_PINT1_IRQ(irq) ((irq) + 832)</div><div class='add'>+/*</div><div class='add'>+ *		SH73A0 IRQ LOCATION TABLE</div><div class='add'>+ *</div><div class='add'>+ * 416	-----------------------------------------</div><div class='add'>+ *		IRQ0-IRQ15</div><div class='add'>+ * 431	-----------------------------------------</div><div class='add'>+ * ...</div><div class='add'>+ * 448	-----------------------------------------</div><div class='add'>+ *		sh73a0-intcs</div><div class='add'>+ *		sh73a0-intca-irq-pins</div><div class='add'>+ * 680	-----------------------------------------</div><div class='add'>+ * ...</div><div class='add'>+ * 700	-----------------------------------------</div><div class='add'>+ *		sh73a0-pint0</div><div class='add'>+ * 731	-----------------------------------------</div><div class='add'>+ * 732	-----------------------------------------</div><div class='add'>+ *		sh73a0-pint1</div><div class='add'>+ * 739	-----------------------------------------</div><div class='add'>+ * ...</div><div class='add'>+ * 800	-----------------------------------------</div><div class='add'>+ *		IRQ16-IRQ31</div><div class='add'>+ * 815	-----------------------------------------</div><div class='add'>+ * ...</div><div class='add'>+ * 928	-----------------------------------------</div><div class='add'>+ *		sh73a0-intca-irq-pins</div><div class='add'>+ * 943	-----------------------------------------</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* PINT interrupts are located at Linux IRQ 700 and up */</div><div class='add'>+#define SH73A0_PINT0_IRQ(irq) ((irq) + 700)</div><div class='add'>+#define SH73A0_PINT1_IRQ(irq) ((irq) + 732)</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_SH73A0_H__ */</div><div class='head'>diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c<br/>index 6447e0af52d4..2587a22842f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/intc-sh7372.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/intc-sh7372.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/intc-sh7372.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/intc-sh7372.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/sh_intc.h&gt;</div><div class='hunk'>@@ -305,14 +306,16 @@ static DECLARE_INTC_DESC(intca_desc, "sh7372-intca",</div><div class='ctx'> 			 intca_mask_registers, intca_prio_registers,</div><div class='ctx'> 			 NULL);</div><div class='ctx'> </div><div class='del'>-INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,</div><div class='del'>-		 INTC_VECT, "sh7372-intca-irq-pins");</div><div class='add'>+INTC_IRQ_PINS_16(intca_irq_pins_lo, 0xe6900000,</div><div class='add'>+		 INTC_VECT, "sh7372-intca-irq-lo");</div><div class='add'>+</div><div class='add'>+INTC_IRQ_PINS_16H(intca_irq_pins_hi, 0xe6900000,</div><div class='add'>+		 INTC_VECT, "sh7372-intca-irq-hi");</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> 	UNUSED_INTCS = 0,</div><div class='ctx'> 	ENABLED_INTCS,</div><div class='ctx'> </div><div class='del'>-	INTCS,</div><div class='del'>-</div><div class='ctx'> 	/* interrupt sources INTCS */</div><div class='ctx'> </div><div class='ctx'> 	/* IRQ0S - IRQ31S */</div><div class='hunk'>@@ -426,8 +429,6 @@ static struct intc_vect intcs_vectors[] = {</div><div class='ctx'> 	INTCS_VECT(CPORTS2R, 0x1a20),</div><div class='ctx'> 	/* CEC */</div><div class='ctx'> 	INTCS_VECT(JPU6E, 0x1a80),</div><div class='del'>-</div><div class='del'>-	INTC_VECT(INTCS, 0xf80),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct intc_group intcs_groups[] __initdata = {</div><div class='hunk'>@@ -490,9 +491,6 @@ static struct intc_mask_reg intcs_mask_registers[] = {</div><div class='ctx'> 	{ 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */</div><div class='ctx'> 	  { MFIS2_INTCS, CPORTS2R, 0, 0,</div><div class='ctx'> 	    JPU6E, 0, 0, 0 } },</div><div class='del'>-	{ 0xffd20104, 0, 16, /* INTAMASK */</div><div class='del'>-	  { 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='del'>-	    0, 0, 0, 0, 0, 0, 0, INTCS } },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Priority is needed for INTCA to receive the INTCS interrupt */</div><div class='hunk'>@@ -557,18 +555,30 @@ static void __iomem *intcs_ffd5;</div><div class='ctx'> void __init sh7372_init_irq(void)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *intevtsa;</div><div class='add'>+	int n;</div><div class='ctx'> </div><div class='ctx'> 	intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE);</div><div class='ctx'> 	intevtsa = intcs_ffd2 + 0x100;</div><div class='ctx'> 	intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	register_intc_controller(&amp;intca_desc);</div><div class='del'>-	register_intc_controller(&amp;intca_irq_pins_desc);</div><div class='add'>+	register_intc_controller(&amp;intca_irq_pins_lo_desc);</div><div class='add'>+	register_intc_controller(&amp;intca_irq_pins_hi_desc);</div><div class='ctx'> 	register_intc_controller(&amp;intcs_desc);</div><div class='ctx'> </div><div class='add'>+	/* setup dummy cascade chip for INTCS */</div><div class='add'>+	n = evt2irq(0xf80);</div><div class='add'>+	irq_alloc_desc_at(n, numa_node_id());</div><div class='add'>+	irq_set_chip_and_handler_name(n, &amp;dummy_irq_chip,</div><div class='add'>+				      handle_level_irq, "level");</div><div class='add'>+	set_irq_flags(n, IRQF_VALID); /* yuck */</div><div class='add'>+</div><div class='ctx'> 	/* demux using INTEVTSA */</div><div class='del'>-	irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa);</div><div class='del'>-	irq_set_chained_handler(evt2irq(0xf80), intcs_demux);</div><div class='add'>+	irq_set_handler_data(n, (void *)intevtsa);</div><div class='add'>+	irq_set_chained_handler(n, intcs_demux);</div><div class='add'>+</div><div class='add'>+	/* unmask INTCS in INTAMASK */</div><div class='add'>+	iowrite16(0, intcs_ffd2 + 0x104);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned short ffd2[0x200];</div><div class='head'>diff --git a/arch/arm/mach-shmobile/pfc-r8a7740.c b/arch/arm/mach-shmobile/pfc-r8a7740.c<br/>index a4fff6950b03..670fe1869dbc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/pfc-r8a7740.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/pfc-r8a7740.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/pfc-r8a7740.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/pfc-r8a7740.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;mach/r8a7740.h&gt;</div><div class='add'>+#include &lt;mach/irqs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define CPU_ALL_PORT(fn, pfx, sfx)					\</div><div class='ctx'> 	PORT_10(fn, pfx, sfx),		PORT_90(fn, pfx, sfx),		\</div><div class='hunk'>@@ -2527,6 +2528,41 @@ static struct pinmux_data_reg pinmux_data_regs[] = {</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct pinmux_irq pinmux_irqs[] = {</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x0200), PORT2_FN0,	 PORT13_FN0),	/* IRQ0A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x0220), PORT20_FN0),		/* IRQ1A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x0240), PORT11_FN0,	 PORT12_FN0),	/* IRQ2A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x0260), PORT10_FN0,	 PORT14_FN0),	/* IRQ3A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x0280), PORT15_FN0,	 PORT172_FN0),	/* IRQ4A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x02A0), PORT0_FN0,	 PORT1_FN0),	/* IRQ5A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x02C0), PORT121_FN0, PORT173_FN0),	/* IRQ6A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x02E0), PORT120_FN0, PORT209_FN0),	/* IRQ7A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x0300), PORT119_FN0),		/* IRQ8A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x0320), PORT118_FN0, PORT210_FN0),	/* IRQ9A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x0340), PORT19_FN0),		/* IRQ10A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x0360), PORT104_FN0),		/* IRQ11A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x0380), PORT42_FN0,	 PORT97_FN0),	/* IRQ12A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x03A0), PORT64_FN0,	 PORT98_FN0),	/* IRQ13A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x03C0), PORT63_FN0,	 PORT99_FN0),	/* IRQ14A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x03E0), PORT62_FN0,	 PORT100_FN0),	/* IRQ15A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x3200), PORT68_FN0,	 PORT211_FN0),	/* IRQ16A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x3220), PORT69_FN0),		/* IRQ17A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x3240), PORT70_FN0),		/* IRQ18A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x3260), PORT71_FN0),		/* IRQ19A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x3280), PORT67_FN0),		/* IRQ20A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x32A0), PORT202_FN0),		/* IRQ21A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x32C0), PORT95_FN0),		/* IRQ22A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x32E0), PORT96_FN0),		/* IRQ23A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x3300), PORT180_FN0),		/* IRQ24A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x3320), PORT38_FN0),		/* IRQ25A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x3340), PORT58_FN0,	 PORT81_FN0),	/* IRQ26A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x3360), PORT57_FN0,	 PORT168_FN0),	/* IRQ27A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x3380), PORT56_FN0,	 PORT169_FN0),	/* IRQ28A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x33A0), PORT50_FN0,	 PORT170_FN0),	/* IRQ29A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x33C0), PORT49_FN0,	 PORT171_FN0),	/* IRQ30A */</div><div class='add'>+	PINMUX_IRQ(evt2irq(0x33E0), PORT41_FN0,	 PORT167_FN0),	/* IRQ31A */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct pinmux_info r8a7740_pinmux_info = {</div><div class='ctx'> 	.name		= "r8a7740_pfc",</div><div class='ctx'> 	.reserved_id	= PINMUX_RESERVED,</div><div class='hunk'>@@ -2554,6 +2590,9 @@ static struct pinmux_info r8a7740_pinmux_info = {</div><div class='ctx'> </div><div class='ctx'> 	.gpio_data	= pinmux_data,</div><div class='ctx'> 	.gpio_data_size	= ARRAY_SIZE(pinmux_data),</div><div class='add'>+</div><div class='add'>+	.gpio_irq	= pinmux_irqs,</div><div class='add'>+	.gpio_irq_size	= ARRAY_SIZE(pinmux_irqs),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void r8a7740_pinmux_init(void)</div><div class='head'>diff --git a/arch/arm/mach-shmobile/pfc-sh73a0.c b/arch/arm/mach-shmobile/pfc-sh73a0.c<br/>index e05634ce2e0d..4a547b803268 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/pfc-sh73a0.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/pfc-sh73a0.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/pfc-sh73a0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/pfc-sh73a0.c</a></div><div class='hunk'>@@ -829,14 +829,14 @@ static pinmux_enum_t pinmux_data[] = {</div><div class='ctx'> 	PINMUX_DATA(PORT27_I2C_SCL2_MARK, PORT27_FN2, MSEL2CR_MSEL17_0,</div><div class='ctx'> 		MSEL2CR_MSEL16_1), \</div><div class='ctx'> 	PINMUX_DATA(PORT27_I2C_SCL3_MARK, PORT27_FN3, MSEL2CR_MSEL19_0,</div><div class='del'>-		MSEL2CR_MSEL18_0), \</div><div class='add'>+		MSEL2CR_MSEL18_1), \</div><div class='ctx'> 	PINMUX_DATA(MFG0_OUT1_MARK, PORT27_FN4), \</div><div class='ctx'> 	PINMUX_DATA(PORT27_IROUT_MARK, PORT27_FN7),</div><div class='ctx'> 	PINMUX_DATA(XDVFS2_MARK, PORT28_FN1), \</div><div class='ctx'> 	PINMUX_DATA(PORT28_I2C_SDA2_MARK, PORT28_FN2, MSEL2CR_MSEL17_0,</div><div class='ctx'> 		MSEL2CR_MSEL16_1), \</div><div class='ctx'> 	PINMUX_DATA(PORT28_I2C_SDA3_MARK, PORT28_FN3, MSEL2CR_MSEL19_0,</div><div class='del'>-		MSEL2CR_MSEL18_0), \</div><div class='add'>+		MSEL2CR_MSEL18_1), \</div><div class='ctx'> 	PINMUX_DATA(PORT28_TPU1TO1_MARK, PORT28_FN7),</div><div class='ctx'> 	PINMUX_DATA(SIM_RST_MARK, PORT29_FN1), \</div><div class='ctx'> 	PINMUX_DATA(PORT29_TPU1TO1_MARK, PORT29_FN4),</div><div class='head'>diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c<br/>index 45fa3924c6a1..bacdd667e3b1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/platsmp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/platsmp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/platsmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/platsmp.c</a></div><div class='hunk'>@@ -16,12 +16,16 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;asm/hardware/gic.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;mach/common.h&gt;</div><div class='add'>+#include &lt;mach/emev2.h&gt;</div><div class='ctx'> </div><div class='del'>-#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2())</div><div class='add'>+#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \</div><div class='add'>+			of_machine_is_compatible("renesas,sh73a0"))</div><div class='ctx'> #define is_r8a7779() machine_is_marzen()</div><div class='add'>+#define is_emev2() of_machine_is_compatible("renesas,emev2")</div><div class='ctx'> </div><div class='ctx'> static unsigned int __init shmobile_smp_get_core_count(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -31,6 +35,9 @@ static unsigned int __init shmobile_smp_get_core_count(void)</div><div class='ctx'> 	if (is_r8a7779())</div><div class='ctx'> 		return r8a7779_get_core_count();</div><div class='ctx'> </div><div class='add'>+	if (is_emev2())</div><div class='add'>+		return emev2_get_core_count();</div><div class='add'>+</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -41,6 +48,9 @@ static void __init shmobile_smp_prepare_cpus(void)</div><div class='ctx'> </div><div class='ctx'> 	if (is_r8a7779())</div><div class='ctx'> 		r8a7779_smp_prepare_cpus();</div><div class='add'>+</div><div class='add'>+	if (is_emev2())</div><div class='add'>+		emev2_smp_prepare_cpus();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int shmobile_platform_cpu_kill(unsigned int cpu)</div><div class='hunk'>@@ -48,6 +58,9 @@ int shmobile_platform_cpu_kill(unsigned int cpu)</div><div class='ctx'> 	if (is_r8a7779())</div><div class='ctx'> 		return r8a7779_platform_cpu_kill(cpu);</div><div class='ctx'> </div><div class='add'>+	if (is_emev2())</div><div class='add'>+		return emev2_platform_cpu_kill(cpu);</div><div class='add'>+</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -60,6 +73,9 @@ void __cpuinit platform_secondary_init(unsigned int cpu)</div><div class='ctx'> </div><div class='ctx'> 	if (is_r8a7779())</div><div class='ctx'> 		r8a7779_secondary_init(cpu);</div><div class='add'>+</div><div class='add'>+	if (is_emev2())</div><div class='add'>+		emev2_secondary_init(cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='hunk'>@@ -70,6 +86,9 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> 	if (is_r8a7779())</div><div class='ctx'> 		return r8a7779_boot_secondary(cpu);</div><div class='ctx'> </div><div class='add'>+	if (is_emev2())</div><div class='add'>+		return emev2_boot_secondary(cpu);</div><div class='add'>+</div><div class='ctx'> 	return -ENOSYS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c<br/>new file mode 100644<br/>index 000000000000..dae9aa68bb09<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/setup-emev2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/setup-emev2.c</a></div><div class='hunk'>@@ -0,0 +1,452 @@</div><div class='add'>+/*</div><div class='add'>+ * Emma Mobile EV2 processor support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012  Magnus Damm</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 of the License.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/gpio-em.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include &lt;mach/emev2.h&gt;</div><div class='add'>+#include &lt;mach/irqs.h&gt;</div><div class='add'>+#include &lt;asm/mach-types.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/mach/map.h&gt;</div><div class='add'>+#include &lt;asm/mach/time.h&gt;</div><div class='add'>+#include &lt;asm/hardware/gic.h&gt;</div><div class='add'>+</div><div class='add'>+static struct map_desc emev2_io_desc[] __initdata = {</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	/* 128K entity map for 0xe0100000 (SMU) */</div><div class='add'>+	{</div><div class='add'>+		.virtual	= 0xe0100000,</div><div class='add'>+		.pfn		= __phys_to_pfn(0xe0100000),</div><div class='add'>+		.length		= SZ_128K,</div><div class='add'>+		.type		= MT_DEVICE</div><div class='add'>+	},</div><div class='add'>+	/* 2M mapping for SCU + L2 controller */</div><div class='add'>+	{</div><div class='add'>+		.virtual	= 0xf0000000,</div><div class='add'>+		.pfn		= __phys_to_pfn(0x1e000000),</div><div class='add'>+		.length		= SZ_2M,</div><div class='add'>+		.type		= MT_DEVICE</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init emev2_map_io(void)</div><div class='add'>+{</div><div class='add'>+	iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* UART */</div><div class='add'>+static struct resource uart0_resources[] = {</div><div class='add'>+	[0]	= {</div><div class='add'>+		.start	= 0xe1020000,</div><div class='add'>+		.end	= 0xe1020037,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1]	= {</div><div class='add'>+		.start	= 40,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device uart0_device = {</div><div class='add'>+	.name		= "serial8250-em",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(uart0_resources),</div><div class='add'>+	.resource	= uart0_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource uart1_resources[] = {</div><div class='add'>+	[0]	= {</div><div class='add'>+		.start	= 0xe1030000,</div><div class='add'>+		.end	= 0xe1030037,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1]	= {</div><div class='add'>+		.start	= 41,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device uart1_device = {</div><div class='add'>+	.name		= "serial8250-em",</div><div class='add'>+	.id		= 1,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(uart1_resources),</div><div class='add'>+	.resource	= uart1_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource uart2_resources[] = {</div><div class='add'>+	[0]	= {</div><div class='add'>+		.start	= 0xe1040000,</div><div class='add'>+		.end	= 0xe1040037,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1]	= {</div><div class='add'>+		.start	= 42,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device uart2_device = {</div><div class='add'>+	.name		= "serial8250-em",</div><div class='add'>+	.id		= 2,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(uart2_resources),</div><div class='add'>+	.resource	= uart2_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource uart3_resources[] = {</div><div class='add'>+	[0]	= {</div><div class='add'>+		.start	= 0xe1050000,</div><div class='add'>+		.end	= 0xe1050037,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1]	= {</div><div class='add'>+		.start	= 43,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device uart3_device = {</div><div class='add'>+	.name		= "serial8250-em",</div><div class='add'>+	.id		= 3,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(uart3_resources),</div><div class='add'>+	.resource	= uart3_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* STI */</div><div class='add'>+static struct resource sti_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "STI",</div><div class='add'>+		.start	= 0xe0180000,</div><div class='add'>+		.end	= 0xe0180053,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= 157,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device sti_device = {</div><div class='add'>+	.name		= "em_sti",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.resource	= sti_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(sti_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* GIO */</div><div class='add'>+static struct gpio_em_config gio0_config = {</div><div class='add'>+	.gpio_base = 0,</div><div class='add'>+	.irq_base = EMEV2_GPIO_IRQ(0),</div><div class='add'>+	.number_of_pins = 32,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource gio0_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "GIO_000",</div><div class='add'>+		.start	= 0xe0050000,</div><div class='add'>+		.end	= 0xe005002b,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.name	= "GIO_000",</div><div class='add'>+		.start	= 0xe0050040,</div><div class='add'>+		.end	= 0xe005005f,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.start	= 99,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	[3] = {</div><div class='add'>+		.start	= 100,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device gio0_device = {</div><div class='add'>+	.name		= "em_gio",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.resource	= gio0_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(gio0_resources),</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;gio0_config,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_em_config gio1_config = {</div><div class='add'>+	.gpio_base = 32,</div><div class='add'>+	.irq_base = EMEV2_GPIO_IRQ(32),</div><div class='add'>+	.number_of_pins = 32,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource gio1_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "GIO_032",</div><div class='add'>+		.start	= 0xe0050080,</div><div class='add'>+		.end	= 0xe00500ab,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.name	= "GIO_032",</div><div class='add'>+		.start	= 0xe00500c0,</div><div class='add'>+		.end	= 0xe00500df,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.start	= 101,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	[3] = {</div><div class='add'>+		.start	= 102,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device gio1_device = {</div><div class='add'>+	.name		= "em_gio",</div><div class='add'>+	.id		= 1,</div><div class='add'>+	.resource	= gio1_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(gio1_resources),</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;gio1_config,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_em_config gio2_config = {</div><div class='add'>+	.gpio_base = 64,</div><div class='add'>+	.irq_base = EMEV2_GPIO_IRQ(64),</div><div class='add'>+	.number_of_pins = 32,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource gio2_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "GIO_064",</div><div class='add'>+		.start	= 0xe0050100,</div><div class='add'>+		.end	= 0xe005012b,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.name	= "GIO_064",</div><div class='add'>+		.start	= 0xe0050140,</div><div class='add'>+		.end	= 0xe005015f,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.start	= 103,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	[3] = {</div><div class='add'>+		.start	= 104,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device gio2_device = {</div><div class='add'>+	.name		= "em_gio",</div><div class='add'>+	.id		= 2,</div><div class='add'>+	.resource	= gio2_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(gio2_resources),</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;gio2_config,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_em_config gio3_config = {</div><div class='add'>+	.gpio_base = 96,</div><div class='add'>+	.irq_base = EMEV2_GPIO_IRQ(96),</div><div class='add'>+	.number_of_pins = 32,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource gio3_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "GIO_096",</div><div class='add'>+		.start	= 0xe0050100,</div><div class='add'>+		.end	= 0xe005012b,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.name	= "GIO_096",</div><div class='add'>+		.start	= 0xe0050140,</div><div class='add'>+		.end	= 0xe005015f,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.start	= 105,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	[3] = {</div><div class='add'>+		.start	= 106,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device gio3_device = {</div><div class='add'>+	.name		= "em_gio",</div><div class='add'>+	.id		= 3,</div><div class='add'>+	.resource	= gio3_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(gio3_resources),</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;gio3_config,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_em_config gio4_config = {</div><div class='add'>+	.gpio_base = 128,</div><div class='add'>+	.irq_base = EMEV2_GPIO_IRQ(128),</div><div class='add'>+	.number_of_pins = 31,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource gio4_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "GIO_128",</div><div class='add'>+		.start	= 0xe0050200,</div><div class='add'>+		.end	= 0xe005022b,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.name	= "GIO_128",</div><div class='add'>+		.start	= 0xe0050240,</div><div class='add'>+		.end	= 0xe005025f,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.start	= 107,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	[3] = {</div><div class='add'>+		.start	= 108,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device gio4_device = {</div><div class='add'>+	.name		= "em_gio",</div><div class='add'>+	.id		= 4,</div><div class='add'>+	.resource	= gio4_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(gio4_resources),</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;gio4_config,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *emev2_early_devices[] __initdata = {</div><div class='add'>+	&amp;uart0_device,</div><div class='add'>+	&amp;uart1_device,</div><div class='add'>+	&amp;uart2_device,</div><div class='add'>+	&amp;uart3_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *emev2_late_devices[] __initdata = {</div><div class='add'>+	&amp;sti_device,</div><div class='add'>+	&amp;gio0_device,</div><div class='add'>+	&amp;gio1_device,</div><div class='add'>+	&amp;gio2_device,</div><div class='add'>+	&amp;gio3_device,</div><div class='add'>+	&amp;gio4_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init emev2_add_standard_devices(void)</div><div class='add'>+{</div><div class='add'>+	emev2_clock_init();</div><div class='add'>+</div><div class='add'>+	platform_add_devices(emev2_early_devices,</div><div class='add'>+			     ARRAY_SIZE(emev2_early_devices));</div><div class='add'>+</div><div class='add'>+	platform_add_devices(emev2_late_devices,</div><div class='add'>+			     ARRAY_SIZE(emev2_late_devices));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init emev2_init_delay(void)</div><div class='add'>+{</div><div class='add'>+	shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init emev2_add_early_devices(void)</div><div class='add'>+{</div><div class='add'>+	emev2_init_delay();</div><div class='add'>+</div><div class='add'>+	early_platform_add_devices(emev2_early_devices,</div><div class='add'>+				   ARRAY_SIZE(emev2_early_devices));</div><div class='add'>+</div><div class='add'>+	/* setup early console here as well */</div><div class='add'>+	shmobile_setup_console();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init emev2_init_irq(void)</div><div class='add'>+{</div><div class='add'>+	void __iomem *gic_dist_base;</div><div class='add'>+	void __iomem *gic_cpu_base;</div><div class='add'>+</div><div class='add'>+	/* Static mappings, never released */</div><div class='add'>+	gic_dist_base = ioremap(0xe0028000, PAGE_SIZE);</div><div class='add'>+	gic_cpu_base = ioremap(0xe0020000, PAGE_SIZE);</div><div class='add'>+	BUG_ON(!gic_dist_base || !gic_cpu_base);</div><div class='add'>+</div><div class='add'>+	/* Use GIC to handle interrupts */</div><div class='add'>+	gic_init(0, 29, gic_dist_base, gic_cpu_base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_USE_OF</div><div class='add'>+static const struct of_dev_auxdata emev2_auxdata_lookup[] __initconst = {</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init emev2_add_standard_devices_dt(void)</div><div class='add'>+{</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='add'>+			     emev2_auxdata_lookup, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id emev2_dt_irq_match[] = {</div><div class='add'>+	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *emev2_boards_compat_dt[] __initdata = {</div><div class='add'>+	"renesas,emev2",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init emev2_init_irq_dt(void)</div><div class='add'>+{</div><div class='add'>+	of_irq_init(emev2_dt_irq_match);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")</div><div class='add'>+	.init_early	= emev2_init_delay,</div><div class='add'>+	.nr_irqs	= NR_IRQS_LEGACY,</div><div class='add'>+	.init_irq	= emev2_init_irq_dt,</div><div class='add'>+	.handle_irq	= gic_handle_irq,</div><div class='add'>+	.init_machine	= emev2_add_standard_devices_dt,</div><div class='add'>+	.timer		= &amp;shmobile_timer,</div><div class='add'>+	.dt_compat	= emev2_boards_compat_dt,</div><div class='add'>+MACHINE_END</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_USE_OF */</div><div class='head'>diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c<br/>index 14edb5cffa7f..ec4eb49c1693 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/setup-r8a7740.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/setup-r8a7740.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/setup-r8a7740.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/setup-r8a7740.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'>  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='hunk'>@@ -60,6 +61,12 @@ static struct map_desc r8a7740_io_desc[] __initdata = {</div><div class='ctx'> void __init r8a7740_map_io(void)</div><div class='ctx'> {</div><div class='ctx'> 	iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't</div><div class='add'>+	 * enough to allocate the frame buffer memory.</div><div class='add'>+	 */</div><div class='add'>+	init_consistent_dma_size(12 &lt;&lt; 20);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* SCIFA0 */</div><div class='hunk'>@@ -350,19 +357,19 @@ static void r8a7740_i2c_workaround(struct platform_device *pdev)</div><div class='ctx'> 	i2c_write(reg, ICSTART, i2c_read(reg, ICSTART) | 0x10);</div><div class='ctx'> 	i2c_read(reg, ICSTART); /* dummy read */</div><div class='ctx'> </div><div class='del'>-	mdelay(100);</div><div class='add'>+	udelay(10);</div><div class='ctx'> </div><div class='ctx'> 	i2c_write(reg, ICCR, 0x01);</div><div class='del'>-	i2c_read(reg, ICCR);</div><div class='ctx'> 	i2c_write(reg, ICSTART, 0x00);</div><div class='del'>-	i2c_read(reg, ICSTART);</div><div class='add'>+</div><div class='add'>+	udelay(10);</div><div class='ctx'> </div><div class='ctx'> 	i2c_write(reg, ICCR, 0x10);</div><div class='del'>-	mdelay(100);</div><div class='add'>+	udelay(10);</div><div class='ctx'> 	i2c_write(reg, ICCR, 0x00);</div><div class='del'>-	mdelay(100);</div><div class='add'>+	udelay(10);</div><div class='ctx'> 	i2c_write(reg, ICCR, 0x10);</div><div class='del'>-	mdelay(100);</div><div class='add'>+	udelay(10);</div><div class='ctx'> </div><div class='ctx'> 	iounmap(reg);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c<br/>index 12c6f529ab89..e98e46f6cf55 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/setup-r8a7779.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/setup-r8a7779.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/setup-r8a7779.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/setup-r8a7779.c</a></div><div class='hunk'>@@ -262,10 +262,14 @@ void __init r8a7779_add_standard_devices(void)</div><div class='ctx'> 			    ARRAY_SIZE(r8a7779_late_devices));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */</div><div class='add'>+void __init __weak r8a7779_register_twd(void) { }</div><div class='add'>+</div><div class='ctx'> static void __init r8a7779_earlytimer_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	r8a7779_clock_init();</div><div class='ctx'> 	shmobile_earlytimer_init();</div><div class='add'>+	r8a7779_register_twd();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init r8a7779_add_early_devices(void)</div><div class='head'>diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c<br/>index 2fe8f83ca124..6a4bd582c028 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/setup-sh7372.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/setup-sh7372.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/setup-sh7372.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/setup-sh7372.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='ctx'> #include &lt;linux/uio_driver.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='hunk'>@@ -461,6 +462,16 @@ static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {</div><div class='ctx'> 		.chcr		= DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),</div><div class='ctx'> 		.mid_rid	= 0xce,</div><div class='ctx'> 	}, {</div><div class='add'>+		.slave_id	= SHDMA_SLAVE_FSIA_TX,</div><div class='add'>+		.addr		= 0xfe1f0024,</div><div class='add'>+		.chcr		= DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),</div><div class='add'>+		.mid_rid	= 0xb1,</div><div class='add'>+	}, {</div><div class='add'>+		.slave_id	= SHDMA_SLAVE_FSIA_RX,</div><div class='add'>+		.addr		= 0xfe1f0020,</div><div class='add'>+		.chcr		= DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),</div><div class='add'>+		.mid_rid	= 0xb2,</div><div class='add'>+	}, {</div><div class='ctx'> 		.slave_id	= SHDMA_SLAVE_MMCIF_TX,</div><div class='ctx'> 		.addr		= 0xe6bd0034,</div><div class='ctx'> 		.chcr		= DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),</div><div class='hunk'>@@ -1092,3 +1103,50 @@ void __init sh7372_add_early_devices(void)</div><div class='ctx'> 	/* override timer setup with soc-specific code */</div><div class='ctx'> 	shmobile_timer.init = sh7372_earlytimer_init;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_USE_OF</div><div class='add'>+</div><div class='add'>+void __init sh7372_add_early_devices_dt(void)</div><div class='add'>+{</div><div class='add'>+	shmobile_setup_delay(800, 1, 3); /* Cortex-A8 @ 800MHz */</div><div class='add'>+</div><div class='add'>+	early_platform_add_devices(sh7372_early_devices,</div><div class='add'>+				   ARRAY_SIZE(sh7372_early_devices));</div><div class='add'>+</div><div class='add'>+	/* setup early console here as well */</div><div class='add'>+	shmobile_setup_console();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_dev_auxdata sh7372_auxdata_lookup[] __initconst = {</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init sh7372_add_standard_devices_dt(void)</div><div class='add'>+{</div><div class='add'>+	/* clocks are setup late during boot in the case of DT */</div><div class='add'>+	sh7372_clock_init();</div><div class='add'>+</div><div class='add'>+	platform_add_devices(sh7372_early_devices,</div><div class='add'>+			    ARRAY_SIZE(sh7372_early_devices));</div><div class='add'>+</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='add'>+			     sh7372_auxdata_lookup, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *sh7372_boards_compat_dt[] __initdata = {</div><div class='add'>+	"renesas,sh7372",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")</div><div class='add'>+	.map_io		= sh7372_map_io,</div><div class='add'>+	.init_early	= sh7372_add_early_devices_dt,</div><div class='add'>+	.nr_irqs	= NR_IRQS_LEGACY,</div><div class='add'>+	.init_irq	= sh7372_init_irq,</div><div class='add'>+	.handle_irq	= shmobile_handle_irq_intc,</div><div class='add'>+	.init_machine	= sh7372_add_standard_devices_dt,</div><div class='add'>+	.timer		= &amp;shmobile_timer,</div><div class='add'>+	.dt_compat	= sh7372_boards_compat_dt,</div><div class='add'>+MACHINE_END</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_USE_OF */</div><div class='head'>diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c<br/>index 5bebffc10455..04a0dfe75493 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/setup-sh73a0.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/setup-sh73a0.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/setup-sh73a0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/setup-sh73a0.c</a></div><div class='hunk'>@@ -688,10 +688,14 @@ void __init sh73a0_add_standard_devices(void)</div><div class='ctx'> 			    ARRAY_SIZE(sh73a0_late_devices));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */</div><div class='add'>+void __init __weak sh73a0_register_twd(void) { }</div><div class='add'>+</div><div class='ctx'> static void __init sh73a0_earlytimer_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	sh73a0_clock_init();</div><div class='ctx'> 	shmobile_earlytimer_init();</div><div class='add'>+	sh73a0_register_twd();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init sh73a0_add_early_devices(void)</div><div class='head'>diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c<br/>new file mode 100644<br/>index 000000000000..6a35c4a31e6c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/smp-emev2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/smp-emev2.c</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+/*</div><div class='add'>+ * SMP support for Emma Mobile EV2</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012  Renesas Solutions Corp.</div><div class='add'>+ * Copyright (C) 2012  Magnus Damm</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 of the License.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include &lt;mach/emev2.h&gt;</div><div class='add'>+#include &lt;asm/smp_plat.h&gt;</div><div class='add'>+#include &lt;asm/smp_scu.h&gt;</div><div class='add'>+#include &lt;asm/hardware/gic.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+</div><div class='add'>+#define EMEV2_SCU_BASE 0x1e000000</div><div class='add'>+</div><div class='add'>+static DEFINE_SPINLOCK(scu_lock);</div><div class='add'>+static void __iomem *scu_base;</div><div class='add'>+</div><div class='add'>+static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)</div><div class='add'>+{</div><div class='add'>+	unsigned long tmp;</div><div class='add'>+</div><div class='add'>+	/* we assume this code is running on a different cpu</div><div class='add'>+	 * than the one that is changing coherency setting */</div><div class='add'>+	spin_lock(&amp;scu_lock);</div><div class='add'>+	tmp = readl(scu_base + 8);</div><div class='add'>+	tmp &amp;= ~clr;</div><div class='add'>+	tmp |= set;</div><div class='add'>+	writel(tmp, scu_base + 8);</div><div class='add'>+	spin_unlock(&amp;scu_lock);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int __init emev2_get_core_count(void)</div><div class='add'>+{</div><div class='add'>+	if (!scu_base) {</div><div class='add'>+		scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);</div><div class='add'>+		emev2_clock_init(); /* need ioremapped SMU */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(!scu_base);</div><div class='add'>+</div><div class='add'>+	return scu_base ? scu_get_core_count(scu_base) : 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int emev2_platform_cpu_kill(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	return 0; /* not supported yet */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __cpuinit emev2_secondary_init(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	gic_secondary_init(0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __cpuinit emev2_boot_secondary(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	cpu = cpu_logical_map(cpu);</div><div class='add'>+</div><div class='add'>+	/* enable cache coherency */</div><div class='add'>+	modify_scu_cpu_psr(0, 3 &lt;&lt; (cpu * 8));</div><div class='add'>+</div><div class='add'>+	/* Tell ROM loader about our vector (in headsmp.S) */</div><div class='add'>+	emev2_set_boot_vector(__pa(shmobile_secondary_vector));</div><div class='add'>+</div><div class='add'>+	gic_raise_softirq(cpumask_of(cpu), 1);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init emev2_smp_prepare_cpus(void)</div><div class='add'>+{</div><div class='add'>+	int cpu = cpu_logical_map(0);</div><div class='add'>+</div><div class='add'>+	scu_enable(scu_base);</div><div class='add'>+</div><div class='add'>+	/* enable cache coherency on CPU0 */</div><div class='add'>+	modify_scu_cpu_psr(0, 3 &lt;&lt; (cpu * 8));</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c<br/>index b62e19d4c9af..6d1d0238cbf7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/smp-r8a7779.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/smp-r8a7779.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/smp-r8a7779.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/smp-r8a7779.c</a></div><div class='hunk'>@@ -64,8 +64,15 @@ static void __iomem *scu_base_addr(void)</div><div class='ctx'> static DEFINE_SPINLOCK(scu_lock);</div><div class='ctx'> static unsigned long tmp;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HAVE_ARM_TWD</div><div class='ctx'> static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);</div><div class='ctx'> </div><div class='add'>+void __init r8a7779_register_twd(void)</div><div class='add'>+{</div><div class='add'>+	twd_local_timer_register(&amp;twd_local_timer);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *scu_base = scu_base_addr();</div><div class='hunk'>@@ -84,7 +91,6 @@ unsigned int __init r8a7779_get_core_count(void)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *scu_base = scu_base_addr();</div><div class='ctx'> </div><div class='del'>-	shmobile_twd_init(&amp;twd_local_timer);</div><div class='ctx'> 	return scu_get_core_count(scu_base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c<br/>index 14ad8b052f1a..e36c41c4ab40 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/smp-sh73a0.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/smp-sh73a0.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/smp-sh73a0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/smp-sh73a0.c</a></div><div class='hunk'>@@ -42,7 +42,13 @@ static void __iomem *scu_base_addr(void)</div><div class='ctx'> static DEFINE_SPINLOCK(scu_lock);</div><div class='ctx'> static unsigned long tmp;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HAVE_ARM_TWD</div><div class='ctx'> static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);</div><div class='add'>+void __init sh73a0_register_twd(void)</div><div class='add'>+{</div><div class='add'>+	twd_local_timer_register(&amp;twd_local_timer);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)</div><div class='ctx'> {</div><div class='hunk'>@@ -62,7 +68,6 @@ unsigned int __init sh73a0_get_core_count(void)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *scu_base = scu_base_addr();</div><div class='ctx'> </div><div class='del'>-	shmobile_twd_init(&amp;twd_local_timer);</div><div class='ctx'> 	return scu_get_core_count(scu_base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-shmobile/suspend.c b/arch/arm/mach-shmobile/suspend.c<br/>index 4d1b86a49923..47d83f7a70b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/suspend.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/suspend.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/suspend.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/suspend.c</a></div><div class='hunk'>@@ -39,9 +39,8 @@ struct platform_suspend_ops shmobile_suspend_ops = {</div><div class='ctx'> 	.valid		= suspend_valid_only_mem,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init shmobile_suspend_init(void)</div><div class='add'>+int __init shmobile_suspend_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	suspend_set_ops(&amp;shmobile_suspend_ops);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-late_initcall(shmobile_suspend_init);</div><div class='head'>diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c<br/>index 2fba5f3d1c8a..a68919727e24 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-shmobile/timer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-shmobile/timer.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-shmobile/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-shmobile/timer.c</a></div><div class='hunk'>@@ -19,9 +19,27 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;asm/mach/time.h&gt;</div><div class='ctx'> #include &lt;asm/smp_twd.h&gt;</div><div class='ctx'> </div><div class='add'>+void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,</div><div class='add'>+				 unsigned int mult, unsigned int div)</div><div class='add'>+{</div><div class='add'>+	/* calculate a worst-case loops-per-jiffy value</div><div class='add'>+	 * based on maximum cpu core mhz setting and the</div><div class='add'>+	 * __delay() implementation in arch/arm/lib/delay.S</div><div class='add'>+	 *</div><div class='add'>+	 * this will result in a longer delay than expected</div><div class='add'>+	 * when the cpu core runs on lower frequencies.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	unsigned int value = (1000000 * mult) / (HZ * div);</div><div class='add'>+</div><div class='add'>+	if (!preset_lpj)</div><div class='add'>+		preset_lpj = max_cpu_core_mhz * value;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init shmobile_late_time_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -46,15 +64,6 @@ static void __init shmobile_timer_init(void)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init shmobile_twd_init(struct twd_local_timer *twd_local_timer)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_HAVE_ARM_TWD</div><div class='del'>-	int err = twd_local_timer_register(twd_local_timer);</div><div class='del'>-	if (err)</div><div class='del'>-		pr_err("twd_local_timer_register failed %d\n", err);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct sys_timer shmobile_timer = {</div><div class='ctx'> 	.init		= shmobile_timer_init,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/Kconfig b/arch/arm/mach-spear13xx/Kconfig<br/>new file mode 100644<br/>index 000000000000..eaadc66d96b3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+#</div><div class='add'>+# SPEAr13XX Machine configuration file</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+if ARCH_SPEAR13XX</div><div class='add'>+</div><div class='add'>+menu "SPEAr13xx Implementations"</div><div class='add'>+config MACH_SPEAR1310</div><div class='add'>+	bool "SPEAr1310 Machine support with Device Tree"</div><div class='add'>+	select PINCTRL_SPEAR1310</div><div class='add'>+	help</div><div class='add'>+	  Supports ST SPEAr1310 machine configured via the device-tree</div><div class='add'>+</div><div class='add'>+config MACH_SPEAR1340</div><div class='add'>+	bool "SPEAr1340 Machine support with Device Tree"</div><div class='add'>+	select PINCTRL_SPEAR1340</div><div class='add'>+	help</div><div class='add'>+	  Supports ST SPEAr1340 machine configured via the device-tree</div><div class='add'>+endmenu</div><div class='add'>+endif #ARCH_SPEAR13XX</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/Makefile b/arch/arm/mach-spear13xx/Makefile<br/>new file mode 100644<br/>index 000000000000..3435ea78c15d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/Makefile</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+#</div><div class='add'>+# Makefile for SPEAr13XX machine series</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_SMP)		+= headsmp.o platsmp.o</div><div class='add'>+obj-$(CONFIG_HOTPLUG_CPU)	+= hotplug.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_ARCH_SPEAR13XX)	+= spear13xx.o</div><div class='add'>+obj-$(CONFIG_MACH_SPEAR1310)	+= spear1310.o</div><div class='add'>+obj-$(CONFIG_MACH_SPEAR1340)	+= spear1340.o</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/Makefile.boot b/arch/arm/mach-spear13xx/Makefile.boot<br/>new file mode 100644<br/>index 000000000000..403efd7e6d27<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/Makefile.boot</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+zreladdr-y	+= 0x00008000</div><div class='add'>+params_phys-y	:= 0x00000100</div><div class='add'>+initrd_phys-y	:= 0x00800000</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_MACH_SPEAR1310)	+= spear1310-evb.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_SPEAR1340)	+= spear1340-evb.dtb</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/headsmp.S b/arch/arm/mach-spear13xx/headsmp.S<br/>new file mode 100644<br/>index 000000000000..ed85473a047f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/headsmp.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/headsmp.S</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13XX/headsmp.S</div><div class='add'>+ *</div><div class='add'>+ * Picked from realview</div><div class='add'>+ * Copyright (c) 2012 ST Microelectronics Limited</div><div class='add'>+ * Shiraz Hashim &lt;shiraz.hashim@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+</div><div class='add'>+	__INIT</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * spear13xx specific entry point for secondary CPUs. This provides</div><div class='add'>+ * a "holding pen" into which all secondary cores are held until we're</div><div class='add'>+ * ready for them to initialise.</div><div class='add'>+ */</div><div class='add'>+ENTRY(spear13xx_secondary_startup)</div><div class='add'>+	mrc	p15, 0, r0, c0, c0, 5</div><div class='add'>+	and	r0, r0, #15</div><div class='add'>+	adr	r4, 1f</div><div class='add'>+	ldmia	r4, {r5, r6}</div><div class='add'>+	sub	r4, r4, r5</div><div class='add'>+	add	r6, r6, r4</div><div class='add'>+pen:	ldr	r7, [r6]</div><div class='add'>+	cmp	r7, r0</div><div class='add'>+	bne	pen</div><div class='add'>+</div><div class='add'>+	/* re-enable coherency */</div><div class='add'>+	mrc	p15, 0, r0, c1, c0, 1</div><div class='add'>+	orr	r0, r0, #(1 &lt;&lt; 6) | (1 &lt;&lt; 0)</div><div class='add'>+	mcr	p15, 0, r0, c1, c0, 1</div><div class='add'>+	/*</div><div class='add'>+	 * we've been released from the holding pen: secondary_stack</div><div class='add'>+	 * should now contain the SVC stack for this core</div><div class='add'>+	 */</div><div class='add'>+	b	secondary_startup</div><div class='add'>+</div><div class='add'>+	.align</div><div class='add'>+1:	.long	.</div><div class='add'>+	.long	pen_release</div><div class='add'>+ENDPROC(spear13xx_secondary_startup)</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/hotplug.c b/arch/arm/mach-spear13xx/hotplug.c<br/>new file mode 100644<br/>index 000000000000..5c6867b46d09<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/hotplug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/hotplug.c</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+/*</div><div class='add'>+ * linux/arch/arm/mach-spear13xx/hotplug.c</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics Ltd.</div><div class='add'>+ * Deepak Sikri &lt;deepak.sikri@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * based upon linux/arch/arm/mach-realview/hotplug.c</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/cp15.h&gt;</div><div class='add'>+#include &lt;asm/smp_plat.h&gt;</div><div class='add'>+</div><div class='add'>+extern volatile int pen_release;</div><div class='add'>+</div><div class='add'>+static inline void cpu_enter_lowpower(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int v;</div><div class='add'>+</div><div class='add'>+	flush_cache_all();</div><div class='add'>+	asm volatile(</div><div class='add'>+	"	mcr	p15, 0, %1, c7, c5, 0\n"</div><div class='add'>+	"	dsb\n"</div><div class='add'>+	/*</div><div class='add'>+	 * Turn off coherency</div><div class='add'>+	 */</div><div class='add'>+	"	mrc	p15, 0, %0, c1, c0, 1\n"</div><div class='add'>+	"	bic	%0, %0, #0x20\n"</div><div class='add'>+	"	mcr	p15, 0, %0, c1, c0, 1\n"</div><div class='add'>+	"	mrc	p15, 0, %0, c1, c0, 0\n"</div><div class='add'>+	"	bic	%0, %0, %2\n"</div><div class='add'>+	"	mcr	p15, 0, %0, c1, c0, 0\n"</div><div class='add'>+	: "=&amp;r" (v)</div><div class='add'>+	: "r" (0), "Ir" (CR_C)</div><div class='add'>+	: "cc", "memory");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void cpu_leave_lowpower(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int v;</div><div class='add'>+</div><div class='add'>+	asm volatile("mrc	p15, 0, %0, c1, c0, 0\n"</div><div class='add'>+	"	orr	%0, %0, %1\n"</div><div class='add'>+	"	mcr	p15, 0, %0, c1, c0, 0\n"</div><div class='add'>+	"	mrc	p15, 0, %0, c1, c0, 1\n"</div><div class='add'>+	"	orr	%0, %0, #0x20\n"</div><div class='add'>+	"	mcr	p15, 0, %0, c1, c0, 1\n"</div><div class='add'>+	: "=&amp;r" (v)</div><div class='add'>+	: "Ir" (CR_C)</div><div class='add'>+	: "cc");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void platform_do_lowpower(unsigned int cpu, int *spurious)</div><div class='add'>+{</div><div class='add'>+	for (;;) {</div><div class='add'>+		wfi();</div><div class='add'>+</div><div class='add'>+		if (pen_release == cpu) {</div><div class='add'>+			/*</div><div class='add'>+			 * OK, proper wakeup, we're done</div><div class='add'>+			 */</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Getting here, means that we have come out of WFI without</div><div class='add'>+		 * having been woken up - this shouldn't happen</div><div class='add'>+		 *</div><div class='add'>+		 * Just note it happening - when we're woken, we can report</div><div class='add'>+		 * its occurrence.</div><div class='add'>+		 */</div><div class='add'>+		(*spurious)++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int platform_cpu_kill(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * platform-specific code to shutdown a CPU</div><div class='add'>+ *</div><div class='add'>+ * Called with IRQs disabled</div><div class='add'>+ */</div><div class='add'>+void __cpuinit platform_cpu_die(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	int spurious = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * we're ready for shutdown now, so do it</div><div class='add'>+	 */</div><div class='add'>+	cpu_enter_lowpower();</div><div class='add'>+	platform_do_lowpower(cpu, &amp;spurious);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * bring this CPU back into the world of cache</div><div class='add'>+	 * coherency, and then restore interrupts</div><div class='add'>+	 */</div><div class='add'>+	cpu_leave_lowpower();</div><div class='add'>+</div><div class='add'>+	if (spurious)</div><div class='add'>+		pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int platform_cpu_disable(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * we don't allow CPU 0 to be shutdown (it is still too special</div><div class='add'>+	 * e.g. clock tick interrupts)</div><div class='add'>+	 */</div><div class='add'>+	return cpu == 0 ? -EPERM : 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/include/mach/debug-macro.S b/arch/arm/mach-spear13xx/include/mach/debug-macro.S<br/>new file mode 100644<br/>index 000000000000..ea1564609bd4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/debug-macro.S</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/include/mach/debug-macro.S</div><div class='add'>+ *</div><div class='add'>+ * Debugging macro include header spear13xx machine family</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;plat/debug-macro.S&gt;</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/include/mach/dma.h b/arch/arm/mach-spear13xx/include/mach/dma.h<br/>new file mode 100644<br/>index 000000000000..383ab04dc6c9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/include/mach/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/dma.h</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/include/mach/dma.h</div><div class='add'>+ *</div><div class='add'>+ * DMA information for SPEAr13xx machine family</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MACH_DMA_H</div><div class='add'>+#define __MACH_DMA_H</div><div class='add'>+</div><div class='add'>+/* request id of all the peripherals */</div><div class='add'>+enum dma_master_info {</div><div class='add'>+	/* Accessible from only one master */</div><div class='add'>+	DMA_MASTER_MCIF = 0,</div><div class='add'>+	DMA_MASTER_FSMC = 1,</div><div class='add'>+	/* Accessible from both 0 &amp; 1 */</div><div class='add'>+	DMA_MASTER_MEMORY = 0,</div><div class='add'>+	DMA_MASTER_ADC = 0,</div><div class='add'>+	DMA_MASTER_UART0 = 0,</div><div class='add'>+	DMA_MASTER_SSP0 = 0,</div><div class='add'>+	DMA_MASTER_I2C0 = 0,</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MACH_SPEAR1310</div><div class='add'>+	/* Accessible from only one master */</div><div class='add'>+	SPEAR1310_DMA_MASTER_JPEG = 1,</div><div class='add'>+</div><div class='add'>+	/* Accessible from both 0 &amp; 1 */</div><div class='add'>+	SPEAR1310_DMA_MASTER_I2S = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_UART1 = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_UART2 = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_UART3 = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_UART4 = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_UART5 = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_I2C1 = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_I2C2 = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_I2C3 = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_I2C4 = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_I2C5 = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_I2C6 = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_I2C7 = 0,</div><div class='add'>+	SPEAR1310_DMA_MASTER_SSP1 = 0,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MACH_SPEAR1340</div><div class='add'>+	/* Accessible from only one master */</div><div class='add'>+	SPEAR1340_DMA_MASTER_I2S_PLAY = 1,</div><div class='add'>+	SPEAR1340_DMA_MASTER_I2S_REC = 1,</div><div class='add'>+	SPEAR1340_DMA_MASTER_I2C1 = 1,</div><div class='add'>+	SPEAR1340_DMA_MASTER_UART1 = 1,</div><div class='add'>+</div><div class='add'>+	/* following are accessible from both master 0 &amp; 1 */</div><div class='add'>+	SPEAR1340_DMA_MASTER_SPDIF = 0,</div><div class='add'>+	SPEAR1340_DMA_MASTER_CAM = 1,</div><div class='add'>+	SPEAR1340_DMA_MASTER_VIDEO_IN = 0,</div><div class='add'>+	SPEAR1340_DMA_MASTER_MALI = 0,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum request_id {</div><div class='add'>+	DMA_REQ_ADC = 0,</div><div class='add'>+	DMA_REQ_SSP0_TX = 4,</div><div class='add'>+	DMA_REQ_SSP0_RX = 5,</div><div class='add'>+	DMA_REQ_UART0_TX = 6,</div><div class='add'>+	DMA_REQ_UART0_RX = 7,</div><div class='add'>+	DMA_REQ_I2C0_TX = 8,</div><div class='add'>+	DMA_REQ_I2C0_RX = 9,</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MACH_SPEAR1310</div><div class='add'>+	SPEAR1310_DMA_REQ_FROM_JPEG = 2,</div><div class='add'>+	SPEAR1310_DMA_REQ_TO_JPEG = 3,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2S_TX = 10,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2S_RX = 11,</div><div class='add'>+</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C1_RX = 0,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C1_TX = 1,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C2_RX = 2,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C2_TX = 3,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C3_RX = 4,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C3_TX = 5,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C4_RX = 6,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C4_TX = 7,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C5_RX = 8,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C5_TX = 9,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C6_RX = 10,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C6_TX = 11,</div><div class='add'>+	SPEAR1310_DMA_REQ_UART1_RX = 12,</div><div class='add'>+	SPEAR1310_DMA_REQ_UART1_TX = 13,</div><div class='add'>+	SPEAR1310_DMA_REQ_UART2_RX = 14,</div><div class='add'>+	SPEAR1310_DMA_REQ_UART2_TX = 15,</div><div class='add'>+	SPEAR1310_DMA_REQ_UART5_RX = 16,</div><div class='add'>+	SPEAR1310_DMA_REQ_UART5_TX = 17,</div><div class='add'>+	SPEAR1310_DMA_REQ_SSP1_RX = 18,</div><div class='add'>+	SPEAR1310_DMA_REQ_SSP1_TX = 19,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C7_RX = 20,</div><div class='add'>+	SPEAR1310_DMA_REQ_I2C7_TX = 21,</div><div class='add'>+	SPEAR1310_DMA_REQ_UART3_RX = 28,</div><div class='add'>+	SPEAR1310_DMA_REQ_UART3_TX = 29,</div><div class='add'>+	SPEAR1310_DMA_REQ_UART4_RX = 30,</div><div class='add'>+	SPEAR1310_DMA_REQ_UART4_TX = 31,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MACH_SPEAR1340</div><div class='add'>+	SPEAR1340_DMA_REQ_SPDIF_TX = 2,</div><div class='add'>+	SPEAR1340_DMA_REQ_SPDIF_RX = 3,</div><div class='add'>+	SPEAR1340_DMA_REQ_I2S_TX = 10,</div><div class='add'>+	SPEAR1340_DMA_REQ_I2S_RX = 11,</div><div class='add'>+	SPEAR1340_DMA_REQ_UART1_TX = 12,</div><div class='add'>+	SPEAR1340_DMA_REQ_UART1_RX = 13,</div><div class='add'>+	SPEAR1340_DMA_REQ_I2C1_TX = 14,</div><div class='add'>+	SPEAR1340_DMA_REQ_I2C1_RX = 15,</div><div class='add'>+	SPEAR1340_DMA_REQ_CAM0_EVEN = 0,</div><div class='add'>+	SPEAR1340_DMA_REQ_CAM0_ODD = 1,</div><div class='add'>+	SPEAR1340_DMA_REQ_CAM1_EVEN = 2,</div><div class='add'>+	SPEAR1340_DMA_REQ_CAM1_ODD = 3,</div><div class='add'>+	SPEAR1340_DMA_REQ_CAM2_EVEN = 4,</div><div class='add'>+	SPEAR1340_DMA_REQ_CAM2_ODD = 5,</div><div class='add'>+	SPEAR1340_DMA_REQ_CAM3_EVEN = 6,</div><div class='add'>+	SPEAR1340_DMA_REQ_CAM3_ODD = 7,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* __MACH_DMA_H */</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/include/mach/generic.h b/arch/arm/mach-spear13xx/include/mach/generic.h<br/>new file mode 100644<br/>index 000000000000..6d8c45b9f298<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/include/mach/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/generic.h</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/include/mach/generic.h</div><div class='add'>+ *</div><div class='add'>+ * spear13xx machine family generic header file</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MACH_GENERIC_H</div><div class='add'>+#define __MACH_GENERIC_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dmaengine.h&gt;</div><div class='add'>+#include &lt;asm/mach/time.h&gt;</div><div class='add'>+</div><div class='add'>+/* Add spear13xx structure declarations here */</div><div class='add'>+extern struct sys_timer spear13xx_timer;</div><div class='add'>+extern struct pl022_ssp_controller pl022_plat_data;</div><div class='add'>+extern struct dw_dma_platform_data dmac_plat_data;</div><div class='add'>+extern struct dw_dma_slave cf_dma_priv;</div><div class='add'>+extern struct dw_dma_slave nand_read_dma_priv;</div><div class='add'>+extern struct dw_dma_slave nand_write_dma_priv;</div><div class='add'>+</div><div class='add'>+/* Add spear13xx family function declarations here */</div><div class='add'>+void __init spear_setup_of_timer(void);</div><div class='add'>+void __init spear13xx_map_io(void);</div><div class='add'>+void __init spear13xx_dt_init_irq(void);</div><div class='add'>+void __init spear13xx_l2x0_init(void);</div><div class='add'>+bool dw_dma_filter(struct dma_chan *chan, void *slave);</div><div class='add'>+void spear_restart(char, const char *);</div><div class='add'>+void spear13xx_secondary_startup(void);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MACH_SPEAR1310</div><div class='add'>+void __init spear1310_clk_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline void spear1310_clk_init(void) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MACH_SPEAR1340</div><div class='add'>+void __init spear1340_clk_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline void spear1340_clk_init(void) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* __MACH_GENERIC_H */</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/include/mach/gpio.h b/arch/arm/mach-spear13xx/include/mach/gpio.h<br/>new file mode 100644<br/>index 000000000000..cd6f4f86a56b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/include/mach/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/gpio.h</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/include/mach/gpio.h</div><div class='add'>+ *</div><div class='add'>+ * GPIO macros for SPEAr13xx machine family</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MACH_GPIO_H</div><div class='add'>+#define __MACH_GPIO_H</div><div class='add'>+</div><div class='add'>+#include &lt;plat/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#endif /* __MACH_GPIO_H */</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/include/mach/hardware.h b/arch/arm/mach-spear13xx/include/mach/hardware.h<br/>new file mode 100644<br/>index 000000000000..40a8c178f10d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/hardware.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+/* empty */</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/include/mach/irqs.h b/arch/arm/mach-spear13xx/include/mach/irqs.h<br/>new file mode 100644<br/>index 000000000000..f542a24aa5f2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/irqs.h</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/include/mach/irqs.h</div><div class='add'>+ *</div><div class='add'>+ * IRQ helper macros for spear13xx machine family</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MACH_IRQS_H</div><div class='add'>+#define __MACH_IRQS_H</div><div class='add'>+</div><div class='add'>+#define IRQ_GIC_END			160</div><div class='add'>+#define NR_IRQS				IRQ_GIC_END</div><div class='add'>+</div><div class='add'>+#endif /* __MACH_IRQS_H */</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/include/mach/spear.h b/arch/arm/mach-spear13xx/include/mach/spear.h<br/>new file mode 100644<br/>index 000000000000..30c57ef72686<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/include/mach/spear.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/spear.h</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/include/mach/spear.h</div><div class='add'>+ *</div><div class='add'>+ * spear13xx Machine family specific definition</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MACH_SPEAR13XX_H</div><div class='add'>+#define __MACH_SPEAR13XX_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/memory.h&gt;</div><div class='add'>+</div><div class='add'>+#define PERIP_GRP2_BASE				UL(0xB3000000)</div><div class='add'>+#define VA_PERIP_GRP2_BASE			UL(0xFE000000)</div><div class='add'>+#define MCIF_SDHCI_BASE				UL(0xB3000000)</div><div class='add'>+#define SYSRAM0_BASE				UL(0xB3800000)</div><div class='add'>+#define VA_SYSRAM0_BASE				UL(0xFE800000)</div><div class='add'>+#define SYS_LOCATION				(VA_SYSRAM0_BASE + 0x600)</div><div class='add'>+</div><div class='add'>+#define PERIP_GRP1_BASE				UL(0xE0000000)</div><div class='add'>+#define VA_PERIP_GRP1_BASE			UL(0xFD000000)</div><div class='add'>+#define UART_BASE				UL(0xE0000000)</div><div class='add'>+#define VA_UART_BASE				UL(0xFD000000)</div><div class='add'>+#define SSP_BASE				UL(0xE0100000)</div><div class='add'>+#define MISC_BASE				UL(0xE0700000)</div><div class='add'>+#define VA_MISC_BASE				IOMEM(UL(0xFD700000))</div><div class='add'>+</div><div class='add'>+#define A9SM_AND_MPMC_BASE			UL(0xEC000000)</div><div class='add'>+#define VA_A9SM_AND_MPMC_BASE			UL(0xFC000000)</div><div class='add'>+</div><div class='add'>+/* A9SM peripheral offsets */</div><div class='add'>+#define A9SM_PERIP_BASE				UL(0xEC800000)</div><div class='add'>+#define VA_A9SM_PERIP_BASE			UL(0xFC800000)</div><div class='add'>+#define VA_SCU_BASE				(VA_A9SM_PERIP_BASE + 0x00)</div><div class='add'>+</div><div class='add'>+#define L2CC_BASE				UL(0xED000000)</div><div class='add'>+#define VA_L2CC_BASE				IOMEM(UL(0xFB000000))</div><div class='add'>+</div><div class='add'>+/* others */</div><div class='add'>+#define DMAC0_BASE				UL(0xEA800000)</div><div class='add'>+#define DMAC1_BASE				UL(0xEB000000)</div><div class='add'>+#define MCIF_CF_BASE				UL(0xB2800000)</div><div class='add'>+</div><div class='add'>+/* Devices present in SPEAr1310 */</div><div class='add'>+#ifdef CONFIG_MACH_SPEAR1310</div><div class='add'>+#define SPEAR1310_RAS_GRP1_BASE			UL(0xD8000000)</div><div class='add'>+#define VA_SPEAR1310_RAS_GRP1_BASE		UL(0xFA000000)</div><div class='add'>+#define SPEAR1310_RAS_BASE			UL(0xD8400000)</div><div class='add'>+#define VA_SPEAR1310_RAS_BASE			IOMEM(UL(0xFA400000))</div><div class='add'>+#endif /* CONFIG_MACH_SPEAR1310 */</div><div class='add'>+</div><div class='add'>+/* Debug uart for linux, will be used for debug and uncompress messages */</div><div class='add'>+#define SPEAR_DBG_UART_BASE			UART_BASE</div><div class='add'>+#define VA_SPEAR_DBG_UART_BASE			VA_UART_BASE</div><div class='add'>+</div><div class='add'>+#endif /* __MACH_SPEAR13XX_H */</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h b/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h<br/>new file mode 100644<br/>index 000000000000..e69de29bb2d1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h</a></div><div class='head'>diff --git a/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h b/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h<br/>new file mode 100644<br/>index 000000000000..e69de29bb2d1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h</a></div><div class='head'>diff --git a/arch/arm/mach-spear13xx/include/mach/timex.h b/arch/arm/mach-spear13xx/include/mach/timex.h<br/>new file mode 100644<br/>index 000000000000..31af3e8d976e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/include/mach/timex.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/timex.h</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear3xx/include/mach/timex.h</div><div class='add'>+ *</div><div class='add'>+ * SPEAr3XX machine family specific timex definitions</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MACH_TIMEX_H</div><div class='add'>+#define __MACH_TIMEX_H</div><div class='add'>+</div><div class='add'>+#include &lt;plat/timex.h&gt;</div><div class='add'>+</div><div class='add'>+#endif /* __MACH_TIMEX_H */</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/include/mach/uncompress.h b/arch/arm/mach-spear13xx/include/mach/uncompress.h<br/>new file mode 100644<br/>index 000000000000..c7840896ae6e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/include/mach/uncompress.h</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/include/mach/uncompress.h</div><div class='add'>+ *</div><div class='add'>+ * Serial port stubs for kernel decompress status messages</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MACH_UNCOMPRESS_H</div><div class='add'>+#define __MACH_UNCOMPRESS_H</div><div class='add'>+</div><div class='add'>+#include &lt;plat/uncompress.h&gt;</div><div class='add'>+</div><div class='add'>+#endif /* __MACH_UNCOMPRESS_H */</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/platsmp.c b/arch/arm/mach-spear13xx/platsmp.c<br/>new file mode 100644<br/>index 000000000000..f5d07f2663d7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/platsmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/platsmp.c</a></div><div class='hunk'>@@ -0,0 +1,127 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/platsmp.c</div><div class='add'>+ *</div><div class='add'>+ * based upon linux/arch/arm/mach-realview/platsmp.c</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics Ltd.</div><div class='add'>+ * Shiraz Hashim &lt;shiraz.hashim@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/hardware/gic.h&gt;</div><div class='add'>+#include &lt;asm/smp_scu.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * control for which core is the next to come out of the secondary</div><div class='add'>+ * boot "holding pen"</div><div class='add'>+ */</div><div class='add'>+volatile int __cpuinitdata pen_release = -1;</div><div class='add'>+static DEFINE_SPINLOCK(boot_lock);</div><div class='add'>+</div><div class='add'>+static void __iomem *scu_base = IOMEM(VA_SCU_BASE);</div><div class='add'>+extern void spear13xx_secondary_startup(void);</div><div class='add'>+</div><div class='add'>+void __cpuinit platform_secondary_init(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * if any interrupts are already enabled for the primary</div><div class='add'>+	 * core (e.g. timer irq), then they will not have been enabled</div><div class='add'>+	 * for us: do so</div><div class='add'>+	 */</div><div class='add'>+	gic_secondary_init(0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * let the primary processor know we're out of the</div><div class='add'>+	 * pen, then head off into the C entry point</div><div class='add'>+	 */</div><div class='add'>+	pen_release = -1;</div><div class='add'>+	smp_wmb();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Synchronise with the boot thread.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock(&amp;boot_lock);</div><div class='add'>+	spin_unlock(&amp;boot_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)</div><div class='add'>+{</div><div class='add'>+	unsigned long timeout;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * set synchronisation state between this boot processor</div><div class='add'>+	 * and the secondary one</div><div class='add'>+	 */</div><div class='add'>+	spin_lock(&amp;boot_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The secondary processor is waiting to be released from</div><div class='add'>+	 * the holding pen - release it, then wait for it to flag</div><div class='add'>+	 * that it has been released by resetting pen_release.</div><div class='add'>+	 *</div><div class='add'>+	 * Note that "pen_release" is the hardware CPU ID, whereas</div><div class='add'>+	 * "cpu" is Linux's internal ID.</div><div class='add'>+	 */</div><div class='add'>+	pen_release = cpu;</div><div class='add'>+	flush_cache_all();</div><div class='add'>+	outer_flush_all();</div><div class='add'>+</div><div class='add'>+	timeout = jiffies + (1 * HZ);</div><div class='add'>+	while (time_before(jiffies, timeout)) {</div><div class='add'>+		smp_rmb();</div><div class='add'>+		if (pen_release == -1)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		udelay(10);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * now the secondary core is starting up let it run its</div><div class='add'>+	 * calibrations, then wait for it to finish</div><div class='add'>+	 */</div><div class='add'>+	spin_unlock(&amp;boot_lock);</div><div class='add'>+</div><div class='add'>+	return pen_release != -1 ? -ENOSYS : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initialise the CPU possible map early - this describes the CPUs</div><div class='add'>+ * which may be present or become present in the system.</div><div class='add'>+ */</div><div class='add'>+void __init smp_init_cpus(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int i, ncores = scu_get_core_count(scu_base);</div><div class='add'>+</div><div class='add'>+	if (ncores &gt; nr_cpu_ids) {</div><div class='add'>+		pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",</div><div class='add'>+			ncores, nr_cpu_ids);</div><div class='add'>+		ncores = nr_cpu_ids;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ncores; i++)</div><div class='add'>+		set_cpu_possible(i, true);</div><div class='add'>+</div><div class='add'>+	set_smp_cross_call(gic_raise_softirq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init platform_smp_prepare_cpus(unsigned int max_cpus)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	scu_enable(scu_base);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Write the address of secondary startup into the system-wide location</div><div class='add'>+	 * (presently it is in SRAM). The BootMonitor waits until it receives a</div><div class='add'>+	 * soft interrupt, and then the secondary CPU branches to this address.</div><div class='add'>+	 */</div><div class='add'>+	__raw_writel(virt_to_phys(spear13xx_secondary_startup), SYS_LOCATION);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/spear1310.c b/arch/arm/mach-spear13xx/spear1310.c<br/>new file mode 100644<br/>index 000000000000..fefd15b2f380<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/spear1310.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/spear1310.c</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/spear1310.c</div><div class='add'>+ *</div><div class='add'>+ * SPEAr1310 machine source file</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "SPEAr1310: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/amba/pl022.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;asm/hardware/gic.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/mach/map.h&gt;</div><div class='add'>+#include &lt;mach/generic.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='add'>+</div><div class='add'>+/* Base addresses */</div><div class='add'>+#define SPEAR1310_SSP1_BASE			UL(0x5D400000)</div><div class='add'>+#define SPEAR1310_SATA0_BASE			UL(0xB1000000)</div><div class='add'>+#define SPEAR1310_SATA1_BASE			UL(0xB1800000)</div><div class='add'>+#define SPEAR1310_SATA2_BASE			UL(0xB4000000)</div><div class='add'>+</div><div class='add'>+/* ssp device registration */</div><div class='add'>+static struct pl022_ssp_controller ssp1_plat_data = {</div><div class='add'>+	.bus_id = 0,</div><div class='add'>+	.enable_dma = 0,</div><div class='add'>+	.num_chipselect = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Add SPEAr1310 auxdata to pass platform data */</div><div class='add'>+static struct of_dev_auxdata spear1310_auxdata_lookup[] __initdata = {</div><div class='add'>+	OF_DEV_AUXDATA("arasan,cf-spear1340", MCIF_CF_BASE, NULL, &amp;cf_dma_priv),</div><div class='add'>+	OF_DEV_AUXDATA("snps,dma-spear1340", DMAC0_BASE, NULL, &amp;dmac_plat_data),</div><div class='add'>+	OF_DEV_AUXDATA("snps,dma-spear1340", DMAC1_BASE, NULL, &amp;dmac_plat_data),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl022", SSP_BASE, NULL, &amp;pl022_plat_data),</div><div class='add'>+</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl022", SPEAR1310_SSP1_BASE, NULL, &amp;ssp1_plat_data),</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init spear1310_dt_init(void)</div><div class='add'>+{</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='add'>+			spear1310_auxdata_lookup, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const spear1310_dt_board_compat[] = {</div><div class='add'>+	"st,spear1310",</div><div class='add'>+	"st,spear1310-evb",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Following will create 16MB static virtual/physical mappings</div><div class='add'>+ * PHYSICAL		VIRTUAL</div><div class='add'>+ * 0xD8000000		0xFA000000</div><div class='add'>+ */</div><div class='add'>+struct map_desc spear1310_io_desc[] __initdata = {</div><div class='add'>+	{</div><div class='add'>+		.virtual	= VA_SPEAR1310_RAS_GRP1_BASE,</div><div class='add'>+		.pfn		= __phys_to_pfn(SPEAR1310_RAS_GRP1_BASE),</div><div class='add'>+		.length		= SZ_16M,</div><div class='add'>+		.type		= MT_DEVICE</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init spear1310_map_io(void)</div><div class='add'>+{</div><div class='add'>+	iotable_init(spear1310_io_desc, ARRAY_SIZE(spear1310_io_desc));</div><div class='add'>+	spear13xx_map_io();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(SPEAR1310_DT, "ST SPEAr1310 SoC with Flattened Device Tree")</div><div class='add'>+	.map_io		=	spear1310_map_io,</div><div class='add'>+	.init_irq	=	spear13xx_dt_init_irq,</div><div class='add'>+	.handle_irq	=	gic_handle_irq,</div><div class='add'>+	.timer		=	&amp;spear13xx_timer,</div><div class='add'>+	.init_machine	=	spear1310_dt_init,</div><div class='add'>+	.restart	=	spear_restart,</div><div class='add'>+	.dt_compat	=	spear1310_dt_board_compat,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/spear1340.c b/arch/arm/mach-spear13xx/spear1340.c<br/>new file mode 100644<br/>index 000000000000..ee38cbc56869<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/spear1340.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/spear1340.c</a></div><div class='hunk'>@@ -0,0 +1,192 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/spear1340.c</div><div class='add'>+ *</div><div class='add'>+ * SPEAr1340 machine source file</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "SPEAr1340: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ahci_platform.h&gt;</div><div class='add'>+#include &lt;linux/amba/serial.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/dw_dmac.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;asm/hardware/gic.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;mach/dma.h&gt;</div><div class='add'>+#include &lt;mach/generic.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='add'>+</div><div class='add'>+/* Base addresses */</div><div class='add'>+#define SPEAR1340_SATA_BASE			UL(0xB1000000)</div><div class='add'>+#define SPEAR1340_UART1_BASE			UL(0xB4100000)</div><div class='add'>+</div><div class='add'>+/* Power Management Registers */</div><div class='add'>+#define SPEAR1340_PCM_CFG			(VA_MISC_BASE + 0x100)</div><div class='add'>+#define SPEAR1340_PCM_WKUP_CFG			(VA_MISC_BASE + 0x104)</div><div class='add'>+#define SPEAR1340_SWITCH_CTR			(VA_MISC_BASE + 0x108)</div><div class='add'>+</div><div class='add'>+#define SPEAR1340_PERIP1_SW_RST			(VA_MISC_BASE + 0x318)</div><div class='add'>+#define SPEAR1340_PERIP2_SW_RST			(VA_MISC_BASE + 0x31C)</div><div class='add'>+#define SPEAR1340_PERIP3_SW_RST			(VA_MISC_BASE + 0x320)</div><div class='add'>+</div><div class='add'>+/* PCIE - SATA configuration registers */</div><div class='add'>+#define SPEAR1340_PCIE_SATA_CFG			(VA_MISC_BASE + 0x424)</div><div class='add'>+	/* PCIE CFG MASks */</div><div class='add'>+	#define SPEAR1340_PCIE_CFG_DEVICE_PRESENT	(1 &lt;&lt; 11)</div><div class='add'>+	#define SPEAR1340_PCIE_CFG_POWERUP_RESET	(1 &lt;&lt; 10)</div><div class='add'>+	#define SPEAR1340_PCIE_CFG_CORE_CLK_EN		(1 &lt;&lt; 9)</div><div class='add'>+	#define SPEAR1340_PCIE_CFG_AUX_CLK_EN		(1 &lt;&lt; 8)</div><div class='add'>+	#define SPEAR1340_SATA_CFG_TX_CLK_EN		(1 &lt;&lt; 4)</div><div class='add'>+	#define SPEAR1340_SATA_CFG_RX_CLK_EN		(1 &lt;&lt; 3)</div><div class='add'>+	#define SPEAR1340_SATA_CFG_POWERUP_RESET	(1 &lt;&lt; 2)</div><div class='add'>+	#define SPEAR1340_SATA_CFG_PM_CLK_EN		(1 &lt;&lt; 1)</div><div class='add'>+	#define SPEAR1340_PCIE_SATA_SEL_PCIE		(0)</div><div class='add'>+	#define SPEAR1340_PCIE_SATA_SEL_SATA		(1)</div><div class='add'>+	#define SPEAR1340_SATA_PCIE_CFG_MASK		0xF1F</div><div class='add'>+	#define SPEAR1340_PCIE_CFG_VAL	(SPEAR1340_PCIE_SATA_SEL_PCIE | \</div><div class='add'>+			SPEAR1340_PCIE_CFG_AUX_CLK_EN | \</div><div class='add'>+			SPEAR1340_PCIE_CFG_CORE_CLK_EN | \</div><div class='add'>+			SPEAR1340_PCIE_CFG_POWERUP_RESET | \</div><div class='add'>+			SPEAR1340_PCIE_CFG_DEVICE_PRESENT)</div><div class='add'>+	#define SPEAR1340_SATA_CFG_VAL	(SPEAR1340_PCIE_SATA_SEL_SATA | \</div><div class='add'>+			SPEAR1340_SATA_CFG_PM_CLK_EN | \</div><div class='add'>+			SPEAR1340_SATA_CFG_POWERUP_RESET | \</div><div class='add'>+			SPEAR1340_SATA_CFG_RX_CLK_EN | \</div><div class='add'>+			SPEAR1340_SATA_CFG_TX_CLK_EN)</div><div class='add'>+</div><div class='add'>+#define SPEAR1340_PCIE_MIPHY_CFG		(VA_MISC_BASE + 0x428)</div><div class='add'>+	#define SPEAR1340_MIPHY_OSC_BYPASS_EXT		(1 &lt;&lt; 31)</div><div class='add'>+	#define SPEAR1340_MIPHY_CLK_REF_DIV2		(1 &lt;&lt; 27)</div><div class='add'>+	#define SPEAR1340_MIPHY_CLK_REF_DIV4		(2 &lt;&lt; 27)</div><div class='add'>+	#define SPEAR1340_MIPHY_CLK_REF_DIV8		(3 &lt;&lt; 27)</div><div class='add'>+	#define SPEAR1340_MIPHY_PLL_RATIO_TOP(x)	(x &lt;&lt; 0)</div><div class='add'>+	#define SPEAR1340_PCIE_SATA_MIPHY_CFG_SATA \</div><div class='add'>+			(SPEAR1340_MIPHY_OSC_BYPASS_EXT | \</div><div class='add'>+			SPEAR1340_MIPHY_CLK_REF_DIV2 | \</div><div class='add'>+			SPEAR1340_MIPHY_PLL_RATIO_TOP(60))</div><div class='add'>+	#define SPEAR1340_PCIE_SATA_MIPHY_CFG_SATA_25M_CRYSTAL_CLK \</div><div class='add'>+			(SPEAR1340_MIPHY_PLL_RATIO_TOP(120))</div><div class='add'>+	#define SPEAR1340_PCIE_SATA_MIPHY_CFG_PCIE \</div><div class='add'>+			(SPEAR1340_MIPHY_OSC_BYPASS_EXT | \</div><div class='add'>+			SPEAR1340_MIPHY_PLL_RATIO_TOP(25))</div><div class='add'>+</div><div class='add'>+static struct dw_dma_slave uart1_dma_param[] = {</div><div class='add'>+	{</div><div class='add'>+		/* Tx */</div><div class='add'>+		.cfg_hi = DWC_CFGH_DST_PER(SPEAR1340_DMA_REQ_UART1_TX),</div><div class='add'>+		.cfg_lo = 0,</div><div class='add'>+		.src_master = DMA_MASTER_MEMORY,</div><div class='add'>+		.dst_master = SPEAR1340_DMA_MASTER_UART1,</div><div class='add'>+	}, {</div><div class='add'>+		/* Rx */</div><div class='add'>+		.cfg_hi = DWC_CFGH_SRC_PER(SPEAR1340_DMA_REQ_UART1_RX),</div><div class='add'>+		.cfg_lo = 0,</div><div class='add'>+		.src_master = SPEAR1340_DMA_MASTER_UART1,</div><div class='add'>+		.dst_master = DMA_MASTER_MEMORY,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct amba_pl011_data uart1_data = {</div><div class='add'>+	.dma_filter = dw_dma_filter,</div><div class='add'>+	.dma_tx_param = &amp;uart1_dma_param[0],</div><div class='add'>+	.dma_rx_param = &amp;uart1_dma_param[1],</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SATA device registration */</div><div class='add'>+static int sata_miphy_init(struct device *dev, void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	writel(SPEAR1340_SATA_CFG_VAL, SPEAR1340_PCIE_SATA_CFG);</div><div class='add'>+	writel(SPEAR1340_PCIE_SATA_MIPHY_CFG_SATA_25M_CRYSTAL_CLK,</div><div class='add'>+			SPEAR1340_PCIE_MIPHY_CFG);</div><div class='add'>+	/* Switch on sata power domain */</div><div class='add'>+	writel((readl(SPEAR1340_PCM_CFG) | (0x800)), SPEAR1340_PCM_CFG);</div><div class='add'>+	msleep(20);</div><div class='add'>+	/* Disable PCIE SATA Controller reset */</div><div class='add'>+	writel((readl(SPEAR1340_PERIP1_SW_RST) &amp; (~0x1000)),</div><div class='add'>+			SPEAR1340_PERIP1_SW_RST);</div><div class='add'>+	msleep(20);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sata_miphy_exit(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	writel(0, SPEAR1340_PCIE_SATA_CFG);</div><div class='add'>+	writel(0, SPEAR1340_PCIE_MIPHY_CFG);</div><div class='add'>+</div><div class='add'>+	/* Enable PCIE SATA Controller reset */</div><div class='add'>+	writel((readl(SPEAR1340_PERIP1_SW_RST) | (0x1000)),</div><div class='add'>+			SPEAR1340_PERIP1_SW_RST);</div><div class='add'>+	msleep(20);</div><div class='add'>+	/* Switch off sata power domain */</div><div class='add'>+	writel((readl(SPEAR1340_PCM_CFG) &amp; (~0x800)), SPEAR1340_PCM_CFG);</div><div class='add'>+	msleep(20);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sata_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;power.power_state.event == PM_EVENT_FREEZE)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	sata_miphy_exit(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sata_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;power.power_state.event == PM_EVENT_THAW)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return sata_miphy_init(dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ahci_platform_data sata_pdata = {</div><div class='add'>+	.init = sata_miphy_init,</div><div class='add'>+	.exit = sata_miphy_exit,</div><div class='add'>+	.suspend = sata_suspend,</div><div class='add'>+	.resume = sata_resume,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Add SPEAr1340 auxdata to pass platform data */</div><div class='add'>+static struct of_dev_auxdata spear1340_auxdata_lookup[] __initdata = {</div><div class='add'>+	OF_DEV_AUXDATA("arasan,cf-spear1340", MCIF_CF_BASE, NULL, &amp;cf_dma_priv),</div><div class='add'>+	OF_DEV_AUXDATA("snps,dma-spear1340", DMAC0_BASE, NULL, &amp;dmac_plat_data),</div><div class='add'>+	OF_DEV_AUXDATA("snps,dma-spear1340", DMAC1_BASE, NULL, &amp;dmac_plat_data),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl022", SSP_BASE, NULL, &amp;pl022_plat_data),</div><div class='add'>+</div><div class='add'>+	OF_DEV_AUXDATA("snps,spear-ahci", SPEAR1340_SATA_BASE, NULL,</div><div class='add'>+			&amp;sata_pdata),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl011", SPEAR1340_UART1_BASE, NULL, &amp;uart1_data),</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init spear1340_dt_init(void)</div><div class='add'>+{</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='add'>+			spear1340_auxdata_lookup, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const spear1340_dt_board_compat[] = {</div><div class='add'>+	"st,spear1340",</div><div class='add'>+	"st,spear1340-evb",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(SPEAR1340_DT, "ST SPEAr1340 SoC with Flattened Device Tree")</div><div class='add'>+	.map_io		=	spear13xx_map_io,</div><div class='add'>+	.init_irq	=	spear13xx_dt_init_irq,</div><div class='add'>+	.handle_irq	=	gic_handle_irq,</div><div class='add'>+	.timer		=	&amp;spear13xx_timer,</div><div class='add'>+	.init_machine	=	spear1340_dt_init,</div><div class='add'>+	.restart	=	spear_restart,</div><div class='add'>+	.dt_compat	=	spear1340_dt_board_compat,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c<br/>new file mode 100644<br/>index 000000000000..50b349ae863d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear13xx/spear13xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear13xx/spear13xx.c</a></div><div class='hunk'>@@ -0,0 +1,197 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/spear13xx.c</div><div class='add'>+ *</div><div class='add'>+ * SPEAr13XX machines common source file</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "SPEAr13xx: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/amba/pl022.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/dw_dmac.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;asm/hardware/cache-l2x0.h&gt;</div><div class='add'>+#include &lt;asm/hardware/gic.h&gt;</div><div class='add'>+#include &lt;asm/mach/map.h&gt;</div><div class='add'>+#include &lt;asm/smp_twd.h&gt;</div><div class='add'>+#include &lt;mach/dma.h&gt;</div><div class='add'>+#include &lt;mach/generic.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='add'>+</div><div class='add'>+/* common dw_dma filter routine to be used by peripherals */</div><div class='add'>+bool dw_dma_filter(struct dma_chan *chan, void *slave)</div><div class='add'>+{</div><div class='add'>+	struct dw_dma_slave *dws = (struct dw_dma_slave *)slave;</div><div class='add'>+</div><div class='add'>+	if (chan-&gt;device-&gt;dev == dws-&gt;dma_dev) {</div><div class='add'>+		chan-&gt;private = slave;</div><div class='add'>+		return true;</div><div class='add'>+	} else {</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ssp device registration */</div><div class='add'>+static struct dw_dma_slave ssp_dma_param[] = {</div><div class='add'>+	{</div><div class='add'>+		/* Tx */</div><div class='add'>+		.cfg_hi = DWC_CFGH_DST_PER(DMA_REQ_SSP0_TX),</div><div class='add'>+		.cfg_lo = 0,</div><div class='add'>+		.src_master = DMA_MASTER_MEMORY,</div><div class='add'>+		.dst_master = DMA_MASTER_SSP0,</div><div class='add'>+	}, {</div><div class='add'>+		/* Rx */</div><div class='add'>+		.cfg_hi = DWC_CFGH_SRC_PER(DMA_REQ_SSP0_RX),</div><div class='add'>+		.cfg_lo = 0,</div><div class='add'>+		.src_master = DMA_MASTER_SSP0,</div><div class='add'>+		.dst_master = DMA_MASTER_MEMORY,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pl022_ssp_controller pl022_plat_data = {</div><div class='add'>+	.bus_id = 0,</div><div class='add'>+	.enable_dma = 1,</div><div class='add'>+	.dma_filter = dw_dma_filter,</div><div class='add'>+	.dma_rx_param = &amp;ssp_dma_param[1],</div><div class='add'>+	.dma_tx_param = &amp;ssp_dma_param[0],</div><div class='add'>+	.num_chipselect = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CF device registration */</div><div class='add'>+struct dw_dma_slave cf_dma_priv = {</div><div class='add'>+	.cfg_hi = 0,</div><div class='add'>+	.cfg_lo = 0,</div><div class='add'>+	.src_master = 0,</div><div class='add'>+	.dst_master = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dmac device registeration */</div><div class='add'>+struct dw_dma_platform_data dmac_plat_data = {</div><div class='add'>+	.nr_channels = 8,</div><div class='add'>+	.chan_allocation_order = CHAN_ALLOCATION_DESCENDING,</div><div class='add'>+	.chan_priority = CHAN_PRIORITY_DESCENDING,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init spear13xx_l2x0_init(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * 512KB (64KB/way), 8-way associativity, parity supported</div><div class='add'>+	 *</div><div class='add'>+	 * FIXME: 9th bit, of Auxillary Controller register must be set</div><div class='add'>+	 * for some spear13xx devices for stable L2 operation.</div><div class='add'>+	 *</div><div class='add'>+	 * Enable Early BRESP, L2 prefetch for Instruction and Data,</div><div class='add'>+	 * write alloc and 'Full line of zero' options</div><div class='add'>+	 *</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	writel_relaxed(0x06, VA_L2CC_BASE + L2X0_PREFETCH_CTRL);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Program following latencies in order to make</div><div class='add'>+	 * SPEAr1340 work at 600 MHz</div><div class='add'>+	 */</div><div class='add'>+	writel_relaxed(0x221, VA_L2CC_BASE + L2X0_TAG_LATENCY_CTRL);</div><div class='add'>+	writel_relaxed(0x441, VA_L2CC_BASE + L2X0_DATA_LATENCY_CTRL);</div><div class='add'>+	l2x0_init(VA_L2CC_BASE, 0x70A60001, 0xfe00ffff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Following will create 16MB static virtual/physical mappings</div><div class='add'>+ * PHYSICAL		VIRTUAL</div><div class='add'>+ * 0xB3000000		0xFE000000</div><div class='add'>+ * 0xE0000000		0xFD000000</div><div class='add'>+ * 0xEC000000		0xFC000000</div><div class='add'>+ * 0xED000000		0xFB000000</div><div class='add'>+ */</div><div class='add'>+struct map_desc spear13xx_io_desc[] __initdata = {</div><div class='add'>+	{</div><div class='add'>+		.virtual	= VA_PERIP_GRP2_BASE,</div><div class='add'>+		.pfn		= __phys_to_pfn(PERIP_GRP2_BASE),</div><div class='add'>+		.length		= SZ_16M,</div><div class='add'>+		.type		= MT_DEVICE</div><div class='add'>+	}, {</div><div class='add'>+		.virtual	= VA_PERIP_GRP1_BASE,</div><div class='add'>+		.pfn		= __phys_to_pfn(PERIP_GRP1_BASE),</div><div class='add'>+		.length		= SZ_16M,</div><div class='add'>+		.type		= MT_DEVICE</div><div class='add'>+	}, {</div><div class='add'>+		.virtual	= VA_A9SM_AND_MPMC_BASE,</div><div class='add'>+		.pfn		= __phys_to_pfn(A9SM_AND_MPMC_BASE),</div><div class='add'>+		.length		= SZ_16M,</div><div class='add'>+		.type		= MT_DEVICE</div><div class='add'>+	}, {</div><div class='add'>+		.virtual	= (unsigned long)VA_L2CC_BASE,</div><div class='add'>+		.pfn		= __phys_to_pfn(L2CC_BASE),</div><div class='add'>+		.length		= SZ_4K,</div><div class='add'>+		.type		= MT_DEVICE</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This will create static memory mapping for selected devices */</div><div class='add'>+void __init spear13xx_map_io(void)</div><div class='add'>+{</div><div class='add'>+	iotable_init(spear13xx_io_desc, ARRAY_SIZE(spear13xx_io_desc));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init spear13xx_clk_init(void)</div><div class='add'>+{</div><div class='add'>+	if (of_machine_is_compatible("st,spear1310"))</div><div class='add'>+		spear1310_clk_init();</div><div class='add'>+	else if (of_machine_is_compatible("st,spear1340"))</div><div class='add'>+		spear1340_clk_init();</div><div class='add'>+	else</div><div class='add'>+		pr_err("%s: Unknown machine\n", __func__);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init spear13xx_timer_init(void)</div><div class='add'>+{</div><div class='add'>+	char pclk_name[] = "osc_24m_clk";</div><div class='add'>+	struct clk *gpt_clk, *pclk;</div><div class='add'>+</div><div class='add'>+	spear13xx_clk_init();</div><div class='add'>+</div><div class='add'>+	/* get the system timer clock */</div><div class='add'>+	gpt_clk = clk_get_sys("gpt0", NULL);</div><div class='add'>+	if (IS_ERR(gpt_clk)) {</div><div class='add'>+		pr_err("%s:couldn't get clk for gpt\n", __func__);</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* get the suitable parent clock for timer*/</div><div class='add'>+	pclk = clk_get(NULL, pclk_name);</div><div class='add'>+	if (IS_ERR(pclk)) {</div><div class='add'>+		pr_err("%s:couldn't get %s as parent for gpt\n", __func__,</div><div class='add'>+				pclk_name);</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk_set_parent(gpt_clk, pclk);</div><div class='add'>+	clk_put(gpt_clk);</div><div class='add'>+	clk_put(pclk);</div><div class='add'>+</div><div class='add'>+	spear_setup_of_timer();</div><div class='add'>+	twd_local_timer_of_register();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct sys_timer spear13xx_timer = {</div><div class='add'>+	.init = spear13xx_timer_init,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id gic_of_match[] __initconst = {</div><div class='add'>+	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init },</div><div class='add'>+	{ /* Sentinel */ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init spear13xx_dt_init_irq(void)</div><div class='add'>+{</div><div class='add'>+	of_irq_init(gic_of_match);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/Kconfig b/arch/arm/mach-spear3xx/Kconfig<br/>index 2cee6b0de371..8bd37291fa4f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/Kconfig</a></div><div class='hunk'>@@ -5,39 +5,22 @@</div><div class='ctx'> if ARCH_SPEAR3XX</div><div class='ctx'> </div><div class='ctx'> menu "SPEAr3xx Implementations"</div><div class='del'>-config BOARD_SPEAR300_EVB</div><div class='del'>-	bool "SPEAr300 Evaluation Board"</div><div class='del'>-	select MACH_SPEAR300</div><div class='del'>-	help</div><div class='del'>-	  Supports ST SPEAr300 Evaluation Board</div><div class='del'>-</div><div class='del'>-config BOARD_SPEAR310_EVB</div><div class='del'>-	bool "SPEAr310 Evaluation Board"</div><div class='del'>-	select MACH_SPEAR310</div><div class='del'>-	help</div><div class='del'>-	  Supports ST SPEAr310 Evaluation Board</div><div class='del'>-</div><div class='del'>-config BOARD_SPEAR320_EVB</div><div class='del'>-	bool "SPEAr320 Evaluation Board"</div><div class='del'>-	select MACH_SPEAR320</div><div class='del'>-	help</div><div class='del'>-	  Supports ST SPEAr320 Evaluation Board</div><div class='del'>-</div><div class='del'>-endmenu</div><div class='del'>-</div><div class='ctx'> config MACH_SPEAR300</div><div class='del'>-	bool "SPEAr300"</div><div class='add'>+	bool "SPEAr300 Machine support with Device Tree"</div><div class='add'>+	select PINCTRL_SPEAR300</div><div class='ctx'> 	help</div><div class='del'>-	  Supports ST SPEAr300 Machine</div><div class='add'>+	  Supports ST SPEAr300 machine configured via the device-tree</div><div class='ctx'> </div><div class='ctx'> config MACH_SPEAR310</div><div class='del'>-	bool "SPEAr310"</div><div class='add'>+	bool "SPEAr310 Machine support with Device Tree"</div><div class='add'>+	select PINCTRL_SPEAR310</div><div class='ctx'> 	help</div><div class='del'>-	  Supports ST SPEAr310 Machine</div><div class='add'>+	  Supports ST SPEAr310 machine configured via the device-tree</div><div class='ctx'> </div><div class='ctx'> config MACH_SPEAR320</div><div class='del'>-	bool "SPEAr320"</div><div class='add'>+	bool "SPEAr320 Machine support with Device Tree"</div><div class='add'>+	select PINCTRL_SPEAR320</div><div class='ctx'> 	help</div><div class='del'>-	  Supports ST SPEAr320 Machine</div><div class='del'>-</div><div class='add'>+	  Supports ST SPEAr320 machine configured via the device-tree</div><div class='add'>+endmenu</div><div class='ctx'> endif #ARCH_SPEAR3XX</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/Makefile b/arch/arm/mach-spear3xx/Makefile<br/>index b24862489704..8d12faa178fd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/Makefile</a></div><div class='hunk'>@@ -3,24 +3,13 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> # common files</div><div class='del'>-obj-y	+= spear3xx.o clock.o</div><div class='add'>+obj-$(CONFIG_ARCH_SPEAR3XX)	+= spear3xx.o</div><div class='ctx'> </div><div class='ctx'> # spear300 specific files</div><div class='ctx'> obj-$(CONFIG_MACH_SPEAR300) += spear300.o</div><div class='ctx'> </div><div class='del'>-# spear300 boards files</div><div class='del'>-obj-$(CONFIG_BOARD_SPEAR300_EVB) += spear300_evb.o</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> # spear310 specific files</div><div class='ctx'> obj-$(CONFIG_MACH_SPEAR310) += spear310.o</div><div class='ctx'> </div><div class='del'>-# spear310 boards files</div><div class='del'>-obj-$(CONFIG_BOARD_SPEAR310_EVB) += spear310_evb.o</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> # spear320 specific files</div><div class='ctx'> obj-$(CONFIG_MACH_SPEAR320) += spear320.o</div><div class='del'>-</div><div class='del'>-# spear320 boards files</div><div class='del'>-obj-$(CONFIG_BOARD_SPEAR320_EVB) += spear320_evb.o</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/Makefile.boot b/arch/arm/mach-spear3xx/Makefile.boot<br/>index 4674a4c221db..d93e2177e6ec 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/Makefile.boot?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/Makefile.boot</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/Makefile.boot</a></div><div class='hunk'>@@ -1,3 +1,7 @@</div><div class='ctx'> zreladdr-y	+= 0x00008000</div><div class='ctx'> params_phys-y	:= 0x00000100</div><div class='ctx'> initrd_phys-y	:= 0x00800000</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_MACH_SPEAR300)	+= spear300-evb.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_SPEAR310)	+= spear310-evb.dtb</div><div class='add'>+dtb-$(CONFIG_MACH_SPEAR320)	+= spear320-evb.dtb</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c<br/>deleted file mode 100644<br/>index 6c4841f55223..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/clock.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,760 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-spear3xx/clock.c</div><div class='del'>- *</div><div class='del'>- * SPEAr3xx machines clock framework source file</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;plat/clock.h&gt;</div><div class='del'>-#include &lt;mach/misc_regs.h&gt;</div><div class='del'>-</div><div class='del'>-/* root clks */</div><div class='del'>-/* 32 KHz oscillator clock */</div><div class='del'>-static struct clk osc_32k_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.rate = 32000,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* 24 MHz oscillator clock */</div><div class='del'>-static struct clk osc_24m_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.rate = 24000000,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock derived from 32 KHz osc clk */</div><div class='del'>-/* rtc clock */</div><div class='del'>-static struct clk rtc_clk = {</div><div class='del'>-	.pclk = &amp;osc_32k_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = RTC_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock derived from 24 MHz osc clk */</div><div class='del'>-/* pll masks structure */</div><div class='del'>-static struct pll_clk_masks pll1_masks = {</div><div class='del'>-	.mode_mask = PLL_MODE_MASK,</div><div class='del'>-	.mode_shift = PLL_MODE_SHIFT,</div><div class='del'>-	.norm_fdbk_m_mask = PLL_NORM_FDBK_M_MASK,</div><div class='del'>-	.norm_fdbk_m_shift = PLL_NORM_FDBK_M_SHIFT,</div><div class='del'>-	.dith_fdbk_m_mask = PLL_DITH_FDBK_M_MASK,</div><div class='del'>-	.dith_fdbk_m_shift = PLL_DITH_FDBK_M_SHIFT,</div><div class='del'>-	.div_p_mask = PLL_DIV_P_MASK,</div><div class='del'>-	.div_p_shift = PLL_DIV_P_SHIFT,</div><div class='del'>-	.div_n_mask = PLL_DIV_N_MASK,</div><div class='del'>-	.div_n_shift = PLL_DIV_N_SHIFT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* pll1 configuration structure */</div><div class='del'>-static struct pll_clk_config pll1_config = {</div><div class='del'>-	.mode_reg = PLL1_CTR,</div><div class='del'>-	.cfg_reg = PLL1_FRQ,</div><div class='del'>-	.masks = &amp;pll1_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* pll rate configuration table, in ascending order of rates */</div><div class='del'>-struct pll_rate_tbl pll_rtbl[] = {</div><div class='del'>-	{.mode = 0, .m = 0x85, .n = 0x0C, .p = 0x1}, /* 266 MHz */</div><div class='del'>-	{.mode = 0, .m = 0xA6, .n = 0x0C, .p = 0x1}, /* 332 MHz */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* PLL1 clock */</div><div class='del'>-static struct clk pll1_clk = {</div><div class='del'>-	.flags = ENABLED_ON_INIT,</div><div class='del'>-	.pclk = &amp;osc_24m_clk,</div><div class='del'>-	.en_reg = PLL1_CTR,</div><div class='del'>-	.en_reg_bit = PLL_ENABLE,</div><div class='del'>-	.calc_rate = &amp;pll_calc_rate,</div><div class='del'>-	.recalc = &amp;pll_clk_recalc,</div><div class='del'>-	.set_rate = &amp;pll_clk_set_rate,</div><div class='del'>-	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 1},</div><div class='del'>-	.private_data = &amp;pll1_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* PLL3 48 MHz clock */</div><div class='del'>-static struct clk pll3_48m_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;osc_24m_clk,</div><div class='del'>-	.rate = 48000000,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* watch dog timer clock */</div><div class='del'>-static struct clk wdt_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;osc_24m_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock derived from pll1 clk */</div><div class='del'>-/* cpu clock */</div><div class='del'>-static struct clk cpu_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ahb masks structure */</div><div class='del'>-static struct bus_clk_masks ahb_masks = {</div><div class='del'>-	.mask = PLL_HCLK_RATIO_MASK,</div><div class='del'>-	.shift = PLL_HCLK_RATIO_SHIFT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ahb configuration structure */</div><div class='del'>-static struct bus_clk_config ahb_config = {</div><div class='del'>-	.reg = CORE_CLK_CFG,</div><div class='del'>-	.masks = &amp;ahb_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ahb rate configuration table, in ascending order of rates */</div><div class='del'>-struct bus_rate_tbl bus_rtbl[] = {</div><div class='del'>-	{.div = 3}, /* == parent divided by 4 */</div><div class='del'>-	{.div = 2}, /* == parent divided by 3 */</div><div class='del'>-	{.div = 1}, /* == parent divided by 2 */</div><div class='del'>-	{.div = 0}, /* == parent divided by 1 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ahb clock */</div><div class='del'>-static struct clk ahb_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;bus_calc_rate,</div><div class='del'>-	.recalc = &amp;bus_clk_recalc,</div><div class='del'>-	.set_rate = &amp;bus_clk_set_rate,</div><div class='del'>-	.rate_config = {bus_rtbl, ARRAY_SIZE(bus_rtbl), 2},</div><div class='del'>-	.private_data = &amp;ahb_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* auxiliary synthesizers masks */</div><div class='del'>-static struct aux_clk_masks aux_masks = {</div><div class='del'>-	.eq_sel_mask = AUX_EQ_SEL_MASK,</div><div class='del'>-	.eq_sel_shift = AUX_EQ_SEL_SHIFT,</div><div class='del'>-	.eq1_mask = AUX_EQ1_SEL,</div><div class='del'>-	.eq2_mask = AUX_EQ2_SEL,</div><div class='del'>-	.xscale_sel_mask = AUX_XSCALE_MASK,</div><div class='del'>-	.xscale_sel_shift = AUX_XSCALE_SHIFT,</div><div class='del'>-	.yscale_sel_mask = AUX_YSCALE_MASK,</div><div class='del'>-	.yscale_sel_shift = AUX_YSCALE_SHIFT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart synth configurations */</div><div class='del'>-static struct aux_clk_config uart_synth_config = {</div><div class='del'>-	.synth_reg = UART_CLK_SYNT,</div><div class='del'>-	.masks = &amp;aux_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* aux rate configuration table, in ascending order of rates */</div><div class='del'>-struct aux_rate_tbl aux_rtbl[] = {</div><div class='del'>-	/* For PLL1 = 332 MHz */</div><div class='del'>-	{.xscale = 1, .yscale = 8, .eq = 1}, /* 41.5 MHz */</div><div class='del'>-	{.xscale = 1, .yscale = 4, .eq = 1}, /* 83 MHz */</div><div class='del'>-	{.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart synth clock */</div><div class='del'>-static struct clk uart_synth_clk = {</div><div class='del'>-	.en_reg = UART_CLK_SYNT,</div><div class='del'>-	.en_reg_bit = AUX_SYNT_ENB,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;aux_calc_rate,</div><div class='del'>-	.recalc = &amp;aux_clk_recalc,</div><div class='del'>-	.set_rate = &amp;aux_clk_set_rate,</div><div class='del'>-	.rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 1},</div><div class='del'>-	.private_data = &amp;uart_synth_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart parents */</div><div class='del'>-static struct pclk_info uart_pclk_info[] = {</div><div class='del'>-	{</div><div class='del'>-		.pclk = &amp;uart_synth_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL1_VAL,</div><div class='del'>-	}, {</div><div class='del'>-		.pclk = &amp;pll3_48m_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL3_VAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart parent select structure */</div><div class='del'>-static struct pclk_sel uart_pclk_sel = {</div><div class='del'>-	.pclk_info = uart_pclk_info,</div><div class='del'>-	.pclk_count = ARRAY_SIZE(uart_pclk_info),</div><div class='del'>-	.pclk_sel_reg = PERIP_CLK_CFG,</div><div class='del'>-	.pclk_sel_mask = UART_CLK_MASK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart clock */</div><div class='del'>-static struct clk uart_clk = {</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = UART_CLK_ENB,</div><div class='del'>-	.pclk_sel = &amp;uart_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = UART_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* firda configurations */</div><div class='del'>-static struct aux_clk_config firda_synth_config = {</div><div class='del'>-	.synth_reg = FIRDA_CLK_SYNT,</div><div class='del'>-	.masks = &amp;aux_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* firda synth clock */</div><div class='del'>-static struct clk firda_synth_clk = {</div><div class='del'>-	.en_reg = FIRDA_CLK_SYNT,</div><div class='del'>-	.en_reg_bit = AUX_SYNT_ENB,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;aux_calc_rate,</div><div class='del'>-	.recalc = &amp;aux_clk_recalc,</div><div class='del'>-	.set_rate = &amp;aux_clk_set_rate,</div><div class='del'>-	.rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 1},</div><div class='del'>-	.private_data = &amp;firda_synth_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* firda parents */</div><div class='del'>-static struct pclk_info firda_pclk_info[] = {</div><div class='del'>-	{</div><div class='del'>-		.pclk = &amp;firda_synth_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL1_VAL,</div><div class='del'>-	}, {</div><div class='del'>-		.pclk = &amp;pll3_48m_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL3_VAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* firda parent select structure */</div><div class='del'>-static struct pclk_sel firda_pclk_sel = {</div><div class='del'>-	.pclk_info = firda_pclk_info,</div><div class='del'>-	.pclk_count = ARRAY_SIZE(firda_pclk_info),</div><div class='del'>-	.pclk_sel_reg = PERIP_CLK_CFG,</div><div class='del'>-	.pclk_sel_mask = FIRDA_CLK_MASK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* firda clock */</div><div class='del'>-static struct clk firda_clk = {</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = FIRDA_CLK_ENB,</div><div class='del'>-	.pclk_sel = &amp;firda_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = FIRDA_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt synthesizer masks */</div><div class='del'>-static struct gpt_clk_masks gpt_masks = {</div><div class='del'>-	.mscale_sel_mask = GPT_MSCALE_MASK,</div><div class='del'>-	.mscale_sel_shift = GPT_MSCALE_SHIFT,</div><div class='del'>-	.nscale_sel_mask = GPT_NSCALE_MASK,</div><div class='del'>-	.nscale_sel_shift = GPT_NSCALE_SHIFT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt rate configuration table, in ascending order of rates */</div><div class='del'>-struct gpt_rate_tbl gpt_rtbl[] = {</div><div class='del'>-	/* For pll1 = 332 MHz */</div><div class='del'>-	{.mscale = 4, .nscale = 0}, /* 41.5 MHz */</div><div class='del'>-	{.mscale = 2, .nscale = 0}, /* 55.3 MHz */</div><div class='del'>-	{.mscale = 1, .nscale = 0}, /* 83 MHz */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt0 synth clk config*/</div><div class='del'>-static struct gpt_clk_config gpt0_synth_config = {</div><div class='del'>-	.synth_reg = PRSC1_CLK_CFG,</div><div class='del'>-	.masks = &amp;gpt_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt synth clock */</div><div class='del'>-static struct clk gpt0_synth_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;gpt_calc_rate,</div><div class='del'>-	.recalc = &amp;gpt_clk_recalc,</div><div class='del'>-	.set_rate = &amp;gpt_clk_set_rate,</div><div class='del'>-	.rate_config = {gpt_rtbl, ARRAY_SIZE(gpt_rtbl), 2},</div><div class='del'>-	.private_data = &amp;gpt0_synth_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt parents */</div><div class='del'>-static struct pclk_info gpt0_pclk_info[] = {</div><div class='del'>-	{</div><div class='del'>-		.pclk = &amp;gpt0_synth_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL1_VAL,</div><div class='del'>-	}, {</div><div class='del'>-		.pclk = &amp;pll3_48m_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL3_VAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt parent select structure */</div><div class='del'>-static struct pclk_sel gpt0_pclk_sel = {</div><div class='del'>-	.pclk_info = gpt0_pclk_info,</div><div class='del'>-	.pclk_count = ARRAY_SIZE(gpt0_pclk_info),</div><div class='del'>-	.pclk_sel_reg = PERIP_CLK_CFG,</div><div class='del'>-	.pclk_sel_mask = GPT_CLK_MASK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt0 timer clock */</div><div class='del'>-static struct clk gpt0_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk_sel = &amp;gpt0_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = GPT0_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt1 synth clk configurations */</div><div class='del'>-static struct gpt_clk_config gpt1_synth_config = {</div><div class='del'>-	.synth_reg = PRSC2_CLK_CFG,</div><div class='del'>-	.masks = &amp;gpt_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt1 synth clock */</div><div class='del'>-static struct clk gpt1_synth_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;gpt_calc_rate,</div><div class='del'>-	.recalc = &amp;gpt_clk_recalc,</div><div class='del'>-	.set_rate = &amp;gpt_clk_set_rate,</div><div class='del'>-	.rate_config = {gpt_rtbl, ARRAY_SIZE(gpt_rtbl), 2},</div><div class='del'>-	.private_data = &amp;gpt1_synth_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pclk_info gpt1_pclk_info[] = {</div><div class='del'>-	{</div><div class='del'>-		.pclk = &amp;gpt1_synth_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL1_VAL,</div><div class='del'>-	}, {</div><div class='del'>-		.pclk = &amp;pll3_48m_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL3_VAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt parent select structure */</div><div class='del'>-static struct pclk_sel gpt1_pclk_sel = {</div><div class='del'>-	.pclk_info = gpt1_pclk_info,</div><div class='del'>-	.pclk_count = ARRAY_SIZE(gpt1_pclk_info),</div><div class='del'>-	.pclk_sel_reg = PERIP_CLK_CFG,</div><div class='del'>-	.pclk_sel_mask = GPT_CLK_MASK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt1 timer clock */</div><div class='del'>-static struct clk gpt1_clk = {</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = GPT1_CLK_ENB,</div><div class='del'>-	.pclk_sel = &amp;gpt1_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = GPT1_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt2 synth clk configurations */</div><div class='del'>-static struct gpt_clk_config gpt2_synth_config = {</div><div class='del'>-	.synth_reg = PRSC3_CLK_CFG,</div><div class='del'>-	.masks = &amp;gpt_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt1 synth clock */</div><div class='del'>-static struct clk gpt2_synth_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;gpt_calc_rate,</div><div class='del'>-	.recalc = &amp;gpt_clk_recalc,</div><div class='del'>-	.set_rate = &amp;gpt_clk_set_rate,</div><div class='del'>-	.rate_config = {gpt_rtbl, ARRAY_SIZE(gpt_rtbl), 2},</div><div class='del'>-	.private_data = &amp;gpt2_synth_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pclk_info gpt2_pclk_info[] = {</div><div class='del'>-	{</div><div class='del'>-		.pclk = &amp;gpt2_synth_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL1_VAL,</div><div class='del'>-	}, {</div><div class='del'>-		.pclk = &amp;pll3_48m_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL3_VAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt parent select structure */</div><div class='del'>-static struct pclk_sel gpt2_pclk_sel = {</div><div class='del'>-	.pclk_info = gpt2_pclk_info,</div><div class='del'>-	.pclk_count = ARRAY_SIZE(gpt2_pclk_info),</div><div class='del'>-	.pclk_sel_reg = PERIP_CLK_CFG,</div><div class='del'>-	.pclk_sel_mask = GPT_CLK_MASK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt2 timer clock */</div><div class='del'>-static struct clk gpt2_clk = {</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = GPT2_CLK_ENB,</div><div class='del'>-	.pclk_sel = &amp;gpt2_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = GPT2_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock derived from pll3 clk */</div><div class='del'>-/* usbh clock */</div><div class='del'>-static struct clk usbh_clk = {</div><div class='del'>-	.pclk = &amp;pll3_48m_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = USBH_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* usbd clock */</div><div class='del'>-static struct clk usbd_clk = {</div><div class='del'>-	.pclk = &amp;pll3_48m_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = USBD_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock derived from ahb clk */</div><div class='del'>-/* apb masks structure */</div><div class='del'>-static struct bus_clk_masks apb_masks = {</div><div class='del'>-	.mask = HCLK_PCLK_RATIO_MASK,</div><div class='del'>-	.shift = HCLK_PCLK_RATIO_SHIFT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* apb configuration structure */</div><div class='del'>-static struct bus_clk_config apb_config = {</div><div class='del'>-	.reg = CORE_CLK_CFG,</div><div class='del'>-	.masks = &amp;apb_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* apb clock */</div><div class='del'>-static struct clk apb_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.calc_rate = &amp;bus_calc_rate,</div><div class='del'>-	.recalc = &amp;bus_clk_recalc,</div><div class='del'>-	.set_rate = &amp;bus_clk_set_rate,</div><div class='del'>-	.rate_config = {bus_rtbl, ARRAY_SIZE(bus_rtbl), 2},</div><div class='del'>-	.private_data = &amp;apb_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* i2c clock */</div><div class='del'>-static struct clk i2c_clk = {</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = I2C_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dma clock */</div><div class='del'>-static struct clk dma_clk = {</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = DMA_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* jpeg clock */</div><div class='del'>-static struct clk jpeg_clk = {</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = JPEG_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gmac clock */</div><div class='del'>-static struct clk gmac_clk = {</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = GMAC_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* smi clock */</div><div class='del'>-static struct clk smi_clk = {</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = SMI_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* c3 clock */</div><div class='del'>-static struct clk c3_clk = {</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = C3_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock derived from apb clk */</div><div class='del'>-/* adc clock */</div><div class='del'>-static struct clk adc_clk = {</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = ADC_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)</div><div class='del'>-/* emi clock */</div><div class='del'>-static struct clk emi_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* ssp clock */</div><div class='del'>-static struct clk ssp0_clk = {</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = SSP_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio clock */</div><div class='del'>-static struct clk gpio_clk = {</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = GPIO_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk dummy_apb_pclk;</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR310) || \</div><div class='del'>-	defined(CONFIG_MACH_SPEAR320)</div><div class='del'>-/* fsmc clock */</div><div class='del'>-static struct clk fsmc_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* common clocks to spear310 and spear320 */</div><div class='del'>-#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)</div><div class='del'>-/* uart1 clock */</div><div class='del'>-static struct clk uart1_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart2 clock */</div><div class='del'>-static struct clk uart2_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-#endif /* CONFIG_MACH_SPEAR310 || CONFIG_MACH_SPEAR320 */</div><div class='del'>-</div><div class='del'>-/* common clocks to spear300 and spear320 */</div><div class='del'>-#if defined(CONFIG_MACH_SPEAR300) || defined(CONFIG_MACH_SPEAR320)</div><div class='del'>-/* clcd clock */</div><div class='del'>-static struct clk clcd_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;pll3_48m_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* sdhci clock */</div><div class='del'>-static struct clk sdhci_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-#endif /* CONFIG_MACH_SPEAR300 || CONFIG_MACH_SPEAR320 */</div><div class='del'>-</div><div class='del'>-/* spear300 machine specific clock structures */</div><div class='del'>-#ifdef CONFIG_MACH_SPEAR300</div><div class='del'>-/* gpio1 clock */</div><div class='del'>-static struct clk gpio1_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* keyboard clock */</div><div class='del'>-static struct clk kbd_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* spear310 machine specific clock structures */</div><div class='del'>-#ifdef CONFIG_MACH_SPEAR310</div><div class='del'>-/* uart3 clock */</div><div class='del'>-static struct clk uart3_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart4 clock */</div><div class='del'>-static struct clk uart4_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart5 clock */</div><div class='del'>-static struct clk uart5_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* spear320 machine specific clock structures */</div><div class='del'>-#ifdef CONFIG_MACH_SPEAR320</div><div class='del'>-/* can0 clock */</div><div class='del'>-static struct clk can0_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* can1 clock */</div><div class='del'>-static struct clk can1_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* i2c1 clock */</div><div class='del'>-static struct clk i2c1_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ssp1 clock */</div><div class='del'>-static struct clk ssp1_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ssp2 clock */</div><div class='del'>-static struct clk ssp2_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* pwm clock */</div><div class='del'>-static struct clk pwm_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* array of all spear 3xx clock lookups */</div><div class='del'>-static struct clk_lookup spear_clk_lookups[] = {</div><div class='del'>-	{ .con_id = "apb_pclk",		.clk = &amp;dummy_apb_pclk},</div><div class='del'>-	/* root clks */</div><div class='del'>-	{ .con_id = "osc_32k_clk",	.clk = &amp;osc_32k_clk},</div><div class='del'>-	{ .con_id = "osc_24m_clk",	.clk = &amp;osc_24m_clk},</div><div class='del'>-	/* clock derived from 32 KHz osc clk */</div><div class='del'>-	{ .dev_id = "rtc-spear",	.clk = &amp;rtc_clk},</div><div class='del'>-	/* clock derived from 24 MHz osc clk */</div><div class='del'>-	{ .con_id = "pll1_clk",		.clk = &amp;pll1_clk},</div><div class='del'>-	{ .con_id = "pll3_48m_clk",	.clk = &amp;pll3_48m_clk},</div><div class='del'>-	{ .dev_id = "wdt",		.clk = &amp;wdt_clk},</div><div class='del'>-	/* clock derived from pll1 clk */</div><div class='del'>-	{ .con_id = "cpu_clk",		.clk = &amp;cpu_clk},</div><div class='del'>-	{ .con_id = "ahb_clk",		.clk = &amp;ahb_clk},</div><div class='del'>-	{ .con_id = "uart_synth_clk",	.clk = &amp;uart_synth_clk},</div><div class='del'>-	{ .con_id = "firda_synth_clk",	.clk = &amp;firda_synth_clk},</div><div class='del'>-	{ .con_id = "gpt0_synth_clk",	.clk = &amp;gpt0_synth_clk},</div><div class='del'>-	{ .con_id = "gpt1_synth_clk",	.clk = &amp;gpt1_synth_clk},</div><div class='del'>-	{ .con_id = "gpt2_synth_clk",	.clk = &amp;gpt2_synth_clk},</div><div class='del'>-	{ .dev_id = "uart",		.clk = &amp;uart_clk},</div><div class='del'>-	{ .dev_id = "firda",		.clk = &amp;firda_clk},</div><div class='del'>-	{ .dev_id = "gpt0",		.clk = &amp;gpt0_clk},</div><div class='del'>-	{ .dev_id = "gpt1",		.clk = &amp;gpt1_clk},</div><div class='del'>-	{ .dev_id = "gpt2",		.clk = &amp;gpt2_clk},</div><div class='del'>-	/* clock derived from pll3 clk */</div><div class='del'>-	{ .dev_id = "designware_udc",   .clk = &amp;usbd_clk},</div><div class='del'>-	{ .con_id = "usbh_clk",		.clk = &amp;usbh_clk},</div><div class='del'>-	/* clock derived from ahb clk */</div><div class='del'>-	{ .con_id = "apb_clk",		.clk = &amp;apb_clk},</div><div class='del'>-	{ .dev_id = "i2c_designware.0",	.clk = &amp;i2c_clk},</div><div class='del'>-	{ .dev_id = "dma",		.clk = &amp;dma_clk},</div><div class='del'>-	{ .dev_id = "jpeg",		.clk = &amp;jpeg_clk},</div><div class='del'>-	{ .dev_id = "gmac",		.clk = &amp;gmac_clk},</div><div class='del'>-	{ .dev_id = "smi",		.clk = &amp;smi_clk},</div><div class='del'>-	{ .dev_id = "c3",		.clk = &amp;c3_clk},</div><div class='del'>-	/* clock derived from apb clk */</div><div class='del'>-	{ .dev_id = "adc",		.clk = &amp;adc_clk},</div><div class='del'>-	{ .dev_id = "ssp-pl022.0",	.clk = &amp;ssp0_clk},</div><div class='del'>-	{ .dev_id = "gpio",		.clk = &amp;gpio_clk},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* array of all spear 300 clock lookups */</div><div class='del'>-#ifdef CONFIG_MACH_SPEAR300</div><div class='del'>-static struct clk_lookup spear300_clk_lookups[] = {</div><div class='del'>-	{ .dev_id = "clcd",		.clk = &amp;clcd_clk},</div><div class='del'>-	{ .con_id = "fsmc",		.clk = &amp;fsmc_clk},</div><div class='del'>-	{ .dev_id = "gpio1",		.clk = &amp;gpio1_clk},</div><div class='del'>-	{ .dev_id = "keyboard",		.clk = &amp;kbd_clk},</div><div class='del'>-	{ .dev_id = "sdhci",		.clk = &amp;sdhci_clk},</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* array of all spear 310 clock lookups */</div><div class='del'>-#ifdef CONFIG_MACH_SPEAR310</div><div class='del'>-static struct clk_lookup spear310_clk_lookups[] = {</div><div class='del'>-	{ .con_id = "fsmc",		.clk = &amp;fsmc_clk},</div><div class='del'>-	{ .con_id = "emi",		.clk = &amp;emi_clk},</div><div class='del'>-	{ .dev_id = "uart1",		.clk = &amp;uart1_clk},</div><div class='del'>-	{ .dev_id = "uart2",		.clk = &amp;uart2_clk},</div><div class='del'>-	{ .dev_id = "uart3",		.clk = &amp;uart3_clk},</div><div class='del'>-	{ .dev_id = "uart4",		.clk = &amp;uart4_clk},</div><div class='del'>-	{ .dev_id = "uart5",		.clk = &amp;uart5_clk},</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* array of all spear 320 clock lookups */</div><div class='del'>-#ifdef CONFIG_MACH_SPEAR320</div><div class='del'>-static struct clk_lookup spear320_clk_lookups[] = {</div><div class='del'>-	{ .dev_id = "clcd",		.clk = &amp;clcd_clk},</div><div class='del'>-	{ .con_id = "fsmc",		.clk = &amp;fsmc_clk},</div><div class='del'>-	{ .dev_id = "i2c_designware.1",	.clk = &amp;i2c1_clk},</div><div class='del'>-	{ .con_id = "emi",		.clk = &amp;emi_clk},</div><div class='del'>-	{ .dev_id = "pwm",		.clk = &amp;pwm_clk},</div><div class='del'>-	{ .dev_id = "sdhci",		.clk = &amp;sdhci_clk},</div><div class='del'>-	{ .dev_id = "c_can_platform.0",	.clk = &amp;can0_clk},</div><div class='del'>-	{ .dev_id = "c_can_platform.1",	.clk = &amp;can1_clk},</div><div class='del'>-	{ .dev_id = "ssp-pl022.1",	.clk = &amp;ssp1_clk},</div><div class='del'>-	{ .dev_id = "ssp-pl022.2",	.clk = &amp;ssp2_clk},</div><div class='del'>-	{ .dev_id = "uart1",		.clk = &amp;uart1_clk},</div><div class='del'>-	{ .dev_id = "uart2",		.clk = &amp;uart2_clk},</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-void __init spear3xx_clk_init(void)</div><div class='del'>-{</div><div class='del'>-	int i, cnt;</div><div class='del'>-	struct clk_lookup *lookups;</div><div class='del'>-</div><div class='del'>-	if (machine_is_spear300()) {</div><div class='del'>-		cnt = ARRAY_SIZE(spear300_clk_lookups);</div><div class='del'>-		lookups = spear300_clk_lookups;</div><div class='del'>-	} else if (machine_is_spear310()) {</div><div class='del'>-		cnt = ARRAY_SIZE(spear310_clk_lookups);</div><div class='del'>-		lookups = spear310_clk_lookups;</div><div class='del'>-	} else {</div><div class='del'>-		cnt = ARRAY_SIZE(spear320_clk_lookups);</div><div class='del'>-		lookups = spear320_clk_lookups;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(spear_clk_lookups); i++)</div><div class='del'>-		clk_register(&amp;spear_clk_lookups[i]);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; cnt; i++)</div><div class='del'>-		clk_register(&amp;lookups[i]);</div><div class='del'>-</div><div class='del'>-	clk_init();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h<br/>index 14276e5a98d2..4a95b9453c2a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/generic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/include/mach/generic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/generic.h</a></div><div class='hunk'>@@ -14,189 +14,24 @@</div><div class='ctx'> #ifndef __MACH_GENERIC_H</div><div class='ctx'> #define __MACH_GENERIC_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/amba/pl08x.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/amba/bus.h&gt;</div><div class='ctx'> #include &lt;asm/mach/time.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;plat/padmux.h&gt;</div><div class='del'>-</div><div class='del'>-/* spear3xx declarations */</div><div class='del'>-/*</div><div class='del'>- * Each GPT has 2 timer channels</div><div class='del'>- * Following GPT channels will be used as clock source and clockevent</div><div class='del'>- */</div><div class='del'>-#define SPEAR_GPT0_BASE		SPEAR3XX_ML1_TMR_BASE</div><div class='del'>-#define SPEAR_GPT0_CHAN0_IRQ	SPEAR3XX_IRQ_CPU_GPT1_1</div><div class='del'>-#define SPEAR_GPT0_CHAN1_IRQ	SPEAR3XX_IRQ_CPU_GPT1_2</div><div class='ctx'> </div><div class='ctx'> /* Add spear3xx family device structure declarations here */</div><div class='del'>-extern struct amba_device spear3xx_gpio_device;</div><div class='del'>-extern struct amba_device spear3xx_uart_device;</div><div class='ctx'> extern struct sys_timer spear3xx_timer;</div><div class='add'>+extern struct pl022_ssp_controller pl022_plat_data;</div><div class='add'>+extern struct pl08x_platform_data pl080_plat_data;</div><div class='ctx'> </div><div class='ctx'> /* Add spear3xx family function declarations here */</div><div class='add'>+void __init spear_setup_of_timer(void);</div><div class='ctx'> void __init spear3xx_clk_init(void);</div><div class='del'>-void __init spear_setup_timer(void);</div><div class='ctx'> void __init spear3xx_map_io(void);</div><div class='del'>-void __init spear3xx_init_irq(void);</div><div class='del'>-void __init spear3xx_init(void);</div><div class='add'>+void __init spear3xx_dt_init_irq(void);</div><div class='ctx'> </div><div class='ctx'> void spear_restart(char, const char *);</div><div class='ctx'> </div><div class='del'>-/* pad mux declarations */</div><div class='del'>-#define PMX_FIRDA_MASK		(1 &lt;&lt; 14)</div><div class='del'>-#define PMX_I2C_MASK		(1 &lt;&lt; 13)</div><div class='del'>-#define PMX_SSP_CS_MASK		(1 &lt;&lt; 12)</div><div class='del'>-#define PMX_SSP_MASK		(1 &lt;&lt; 11)</div><div class='del'>-#define PMX_MII_MASK		(1 &lt;&lt; 10)</div><div class='del'>-#define PMX_GPIO_PIN0_MASK	(1 &lt;&lt; 9)</div><div class='del'>-#define PMX_GPIO_PIN1_MASK	(1 &lt;&lt; 8)</div><div class='del'>-#define PMX_GPIO_PIN2_MASK	(1 &lt;&lt; 7)</div><div class='del'>-#define PMX_GPIO_PIN3_MASK	(1 &lt;&lt; 6)</div><div class='del'>-#define PMX_GPIO_PIN4_MASK	(1 &lt;&lt; 5)</div><div class='del'>-#define PMX_GPIO_PIN5_MASK	(1 &lt;&lt; 4)</div><div class='del'>-#define PMX_UART0_MODEM_MASK	(1 &lt;&lt; 3)</div><div class='del'>-#define PMX_UART0_MASK		(1 &lt;&lt; 2)</div><div class='del'>-#define PMX_TIMER_3_4_MASK	(1 &lt;&lt; 1)</div><div class='del'>-#define PMX_TIMER_1_2_MASK	(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* pad mux devices */</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_firda;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_i2c;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_ssp_cs;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_ssp;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_mii;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_gpio_pin0;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_gpio_pin1;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_gpio_pin2;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_gpio_pin3;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_gpio_pin4;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_gpio_pin5;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_uart0_modem;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_uart0;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_timer_3_4;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_timer_1_2;</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)</div><div class='del'>-/* padmux plgpio devices */</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_0_1;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_2_3;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_4_5;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_6_9;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_10_27;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_28;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_29;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_30;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_31;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_32;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_33;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_34_36;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_37_42;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_43_44_47_48;</div><div class='del'>-extern struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* spear300 declarations */</div><div class='del'>-#ifdef CONFIG_MACH_SPEAR300</div><div class='del'>-/* Add spear300 machine device structure declarations here */</div><div class='del'>-extern struct amba_device spear300_gpio1_device;</div><div class='del'>-</div><div class='del'>-/* pad mux modes */</div><div class='del'>-extern struct pmx_mode spear300_nand_mode;</div><div class='del'>-extern struct pmx_mode spear300_nor_mode;</div><div class='del'>-extern struct pmx_mode spear300_photo_frame_mode;</div><div class='del'>-extern struct pmx_mode spear300_lend_ip_phone_mode;</div><div class='del'>-extern struct pmx_mode spear300_hend_ip_phone_mode;</div><div class='del'>-extern struct pmx_mode spear300_lend_wifi_phone_mode;</div><div class='del'>-extern struct pmx_mode spear300_hend_wifi_phone_mode;</div><div class='del'>-extern struct pmx_mode spear300_ata_pabx_wi2s_mode;</div><div class='del'>-extern struct pmx_mode spear300_ata_pabx_i2s_mode;</div><div class='del'>-extern struct pmx_mode spear300_caml_lcdw_mode;</div><div class='del'>-extern struct pmx_mode spear300_camu_lcd_mode;</div><div class='del'>-extern struct pmx_mode spear300_camu_wlcd_mode;</div><div class='del'>-extern struct pmx_mode spear300_caml_lcd_mode;</div><div class='del'>-</div><div class='del'>-/* pad mux devices */</div><div class='del'>-extern struct pmx_dev spear300_pmx_fsmc_2_chips;</div><div class='del'>-extern struct pmx_dev spear300_pmx_fsmc_4_chips;</div><div class='del'>-extern struct pmx_dev spear300_pmx_keyboard;</div><div class='del'>-extern struct pmx_dev spear300_pmx_clcd;</div><div class='del'>-extern struct pmx_dev spear300_pmx_telecom_gpio;</div><div class='del'>-extern struct pmx_dev spear300_pmx_telecom_tdm;</div><div class='del'>-extern struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk;</div><div class='del'>-extern struct pmx_dev spear300_pmx_telecom_camera;</div><div class='del'>-extern struct pmx_dev spear300_pmx_telecom_dac;</div><div class='del'>-extern struct pmx_dev spear300_pmx_telecom_i2s;</div><div class='del'>-extern struct pmx_dev spear300_pmx_telecom_boot_pins;</div><div class='del'>-extern struct pmx_dev spear300_pmx_telecom_sdhci_4bit;</div><div class='del'>-extern struct pmx_dev spear300_pmx_telecom_sdhci_8bit;</div><div class='del'>-extern struct pmx_dev spear300_pmx_gpio1;</div><div class='del'>-</div><div class='del'>-/* Add spear300 machine function declarations here */</div><div class='del'>-void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,</div><div class='del'>-		u8 pmx_dev_count);</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MACH_SPEAR300 */</div><div class='del'>-</div><div class='del'>-/* spear310 declarations */</div><div class='del'>-#ifdef CONFIG_MACH_SPEAR310</div><div class='del'>-/* Add spear310 machine device structure declarations here */</div><div class='del'>-</div><div class='del'>-/* pad mux devices */</div><div class='del'>-extern struct pmx_dev spear310_pmx_emi_cs_0_1_4_5;</div><div class='del'>-extern struct pmx_dev spear310_pmx_emi_cs_2_3;</div><div class='del'>-extern struct pmx_dev spear310_pmx_uart1;</div><div class='del'>-extern struct pmx_dev spear310_pmx_uart2;</div><div class='del'>-extern struct pmx_dev spear310_pmx_uart3_4_5;</div><div class='del'>-extern struct pmx_dev spear310_pmx_fsmc;</div><div class='del'>-extern struct pmx_dev spear310_pmx_rs485_0_1;</div><div class='del'>-extern struct pmx_dev spear310_pmx_tdm0;</div><div class='del'>-</div><div class='del'>-/* Add spear310 machine function declarations here */</div><div class='del'>-void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,</div><div class='del'>-		u8 pmx_dev_count);</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MACH_SPEAR310 */</div><div class='del'>-</div><div class='del'>-/* spear320 declarations */</div><div class='del'>-#ifdef CONFIG_MACH_SPEAR320</div><div class='del'>-/* Add spear320 machine device structure declarations here */</div><div class='del'>-</div><div class='del'>-/* pad mux modes */</div><div class='del'>-extern struct pmx_mode spear320_auto_net_smii_mode;</div><div class='del'>-extern struct pmx_mode spear320_auto_net_mii_mode;</div><div class='del'>-extern struct pmx_mode spear320_auto_exp_mode;</div><div class='del'>-extern struct pmx_mode spear320_small_printers_mode;</div><div class='del'>-</div><div class='del'>-/* pad mux devices */</div><div class='del'>-extern struct pmx_dev spear320_pmx_clcd;</div><div class='del'>-extern struct pmx_dev spear320_pmx_emi;</div><div class='del'>-extern struct pmx_dev spear320_pmx_fsmc;</div><div class='del'>-extern struct pmx_dev spear320_pmx_spp;</div><div class='del'>-extern struct pmx_dev spear320_pmx_sdhci;</div><div class='del'>-extern struct pmx_dev spear320_pmx_i2s;</div><div class='del'>-extern struct pmx_dev spear320_pmx_uart1;</div><div class='del'>-extern struct pmx_dev spear320_pmx_uart1_modem;</div><div class='del'>-extern struct pmx_dev spear320_pmx_uart2;</div><div class='del'>-extern struct pmx_dev spear320_pmx_touchscreen;</div><div class='del'>-extern struct pmx_dev spear320_pmx_can;</div><div class='del'>-extern struct pmx_dev spear320_pmx_sdhci_led;</div><div class='del'>-extern struct pmx_dev spear320_pmx_pwm0;</div><div class='del'>-extern struct pmx_dev spear320_pmx_pwm1;</div><div class='del'>-extern struct pmx_dev spear320_pmx_pwm2;</div><div class='del'>-extern struct pmx_dev spear320_pmx_pwm3;</div><div class='del'>-extern struct pmx_dev spear320_pmx_ssp1;</div><div class='del'>-extern struct pmx_dev spear320_pmx_ssp2;</div><div class='del'>-extern struct pmx_dev spear320_pmx_mii1;</div><div class='del'>-extern struct pmx_dev spear320_pmx_smii0;</div><div class='del'>-extern struct pmx_dev spear320_pmx_smii1;</div><div class='del'>-extern struct pmx_dev spear320_pmx_i2c1;</div><div class='del'>-</div><div class='del'>-/* Add spear320 machine function declarations here */</div><div class='del'>-void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,</div><div class='del'>-		u8 pmx_dev_count);</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MACH_SPEAR320 */</div><div class='del'>-</div><div class='ctx'> #endif /* __MACH_GENERIC_H */</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/include/mach/hardware.h b/arch/arm/mach-spear3xx/include/mach/hardware.h<br/>index 4660c0d8ec0d..40a8c178f10d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/hardware.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/include/mach/hardware.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/hardware.h</a></div><div class='hunk'>@@ -1,23 +1 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-spear3xx/include/mach/hardware.h</div><div class='del'>- *</div><div class='del'>- * Hardware definitions for SPEAr3xx machine family</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_HARDWARE_H</div><div class='del'>-#define __MACH_HARDWARE_H</div><div class='del'>-</div><div class='del'>-#include &lt;plat/hardware.h&gt;</div><div class='del'>-#include &lt;mach/spear.h&gt;</div><div class='del'>-</div><div class='del'>-/* Vitual to physical translation of statically mapped space */</div><div class='del'>-#define IO_ADDRESS(x)		(x | 0xF0000000)</div><div class='del'>-</div><div class='del'>-#endif /* __MACH_HARDWARE_H */</div><div class='add'>+/* empty */</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h<br/>index 6e265442808e..51bd62a0254c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/irqs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/include/mach/irqs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/irqs.h</a></div><div class='hunk'>@@ -14,141 +14,14 @@</div><div class='ctx'> #ifndef __MACH_IRQS_H</div><div class='ctx'> #define __MACH_IRQS_H</div><div class='ctx'> </div><div class='del'>-/* SPEAr3xx IRQ definitions */</div><div class='del'>-#define SPEAR3XX_IRQ_HW_ACCEL_MOD_0		0</div><div class='add'>+/* FIXME: probe all these from DT */</div><div class='ctx'> #define SPEAR3XX_IRQ_INTRCOMM_RAS_ARM		1</div><div class='del'>-#define SPEAR3XX_IRQ_CPU_GPT1_1			2</div><div class='del'>-#define SPEAR3XX_IRQ_CPU_GPT1_2			3</div><div class='del'>-#define SPEAR3XX_IRQ_BASIC_GPT1_1		4</div><div class='del'>-#define SPEAR3XX_IRQ_BASIC_GPT1_2		5</div><div class='del'>-#define SPEAR3XX_IRQ_BASIC_GPT2_1		6</div><div class='del'>-#define SPEAR3XX_IRQ_BASIC_GPT2_2		7</div><div class='del'>-#define SPEAR3XX_IRQ_BASIC_DMA			8</div><div class='del'>-#define SPEAR3XX_IRQ_BASIC_SMI			9</div><div class='del'>-#define SPEAR3XX_IRQ_BASIC_RTC			10</div><div class='del'>-#define SPEAR3XX_IRQ_BASIC_GPIO			11</div><div class='del'>-#define SPEAR3XX_IRQ_BASIC_WDT			12</div><div class='del'>-#define SPEAR3XX_IRQ_DDR_CONTROLLER		13</div><div class='del'>-#define SPEAR3XX_IRQ_SYS_ERROR			14</div><div class='del'>-#define SPEAR3XX_IRQ_WAKEUP_RCV			15</div><div class='del'>-#define SPEAR3XX_IRQ_JPEG			16</div><div class='del'>-#define SPEAR3XX_IRQ_IRDA			17</div><div class='del'>-#define SPEAR3XX_IRQ_ADC			18</div><div class='del'>-#define SPEAR3XX_IRQ_UART			19</div><div class='del'>-#define SPEAR3XX_IRQ_SSP			20</div><div class='del'>-#define SPEAR3XX_IRQ_I2C			21</div><div class='del'>-#define SPEAR3XX_IRQ_MAC_1			22</div><div class='del'>-#define SPEAR3XX_IRQ_MAC_2			23</div><div class='del'>-#define SPEAR3XX_IRQ_USB_DEV			24</div><div class='del'>-#define SPEAR3XX_IRQ_USB_H_OHCI_0		25</div><div class='del'>-#define SPEAR3XX_IRQ_USB_H_EHCI_0		26</div><div class='del'>-#define SPEAR3XX_IRQ_USB_H_EHCI_1		SPEAR3XX_IRQ_USB_H_EHCI_0</div><div class='del'>-#define SPEAR3XX_IRQ_USB_H_OHCI_1		27</div><div class='ctx'> #define SPEAR3XX_IRQ_GEN_RAS_1			28</div><div class='ctx'> #define SPEAR3XX_IRQ_GEN_RAS_2			29</div><div class='ctx'> #define SPEAR3XX_IRQ_GEN_RAS_3			30</div><div class='del'>-#define SPEAR3XX_IRQ_HW_ACCEL_MOD_1		31</div><div class='ctx'> #define SPEAR3XX_IRQ_VIC_END			32</div><div class='del'>-</div><div class='ctx'> #define SPEAR3XX_VIRQ_START			SPEAR3XX_IRQ_VIC_END</div><div class='ctx'> </div><div class='del'>-/* SPEAr300 Virtual irq definitions */</div><div class='del'>-/* IRQs sharing IRQ_GEN_RAS_1 */</div><div class='del'>-#define SPEAR300_VIRQ_IT_PERS_S			(SPEAR3XX_VIRQ_START + 0)</div><div class='del'>-#define SPEAR300_VIRQ_IT_CHANGE_S		(SPEAR3XX_VIRQ_START + 1)</div><div class='del'>-#define SPEAR300_VIRQ_I2S			(SPEAR3XX_VIRQ_START + 2)</div><div class='del'>-#define SPEAR300_VIRQ_TDM			(SPEAR3XX_VIRQ_START + 3)</div><div class='del'>-#define SPEAR300_VIRQ_CAMERA_L			(SPEAR3XX_VIRQ_START + 4)</div><div class='del'>-#define SPEAR300_VIRQ_CAMERA_F			(SPEAR3XX_VIRQ_START + 5)</div><div class='del'>-#define SPEAR300_VIRQ_CAMERA_V			(SPEAR3XX_VIRQ_START + 6)</div><div class='del'>-#define SPEAR300_VIRQ_KEYBOARD			(SPEAR3XX_VIRQ_START + 7)</div><div class='del'>-#define SPEAR300_VIRQ_GPIO1			(SPEAR3XX_VIRQ_START + 8)</div><div class='del'>-</div><div class='del'>-/* IRQs sharing IRQ_GEN_RAS_3 */</div><div class='del'>-#define SPEAR300_IRQ_CLCD			SPEAR3XX_IRQ_GEN_RAS_3</div><div class='del'>-</div><div class='del'>-/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */</div><div class='del'>-#define SPEAR300_IRQ_SDHCI			SPEAR3XX_IRQ_INTRCOMM_RAS_ARM</div><div class='del'>-</div><div class='del'>-/* SPEAr310 Virtual irq definitions */</div><div class='del'>-/* IRQs sharing IRQ_GEN_RAS_1 */</div><div class='del'>-#define SPEAR310_VIRQ_SMII0			(SPEAR3XX_VIRQ_START + 0)</div><div class='del'>-#define SPEAR310_VIRQ_SMII1			(SPEAR3XX_VIRQ_START + 1)</div><div class='del'>-#define SPEAR310_VIRQ_SMII2			(SPEAR3XX_VIRQ_START + 2)</div><div class='del'>-#define SPEAR310_VIRQ_SMII3			(SPEAR3XX_VIRQ_START + 3)</div><div class='del'>-#define SPEAR310_VIRQ_WAKEUP_SMII0		(SPEAR3XX_VIRQ_START + 4)</div><div class='del'>-#define SPEAR310_VIRQ_WAKEUP_SMII1		(SPEAR3XX_VIRQ_START + 5)</div><div class='del'>-#define SPEAR310_VIRQ_WAKEUP_SMII2		(SPEAR3XX_VIRQ_START + 6)</div><div class='del'>-#define SPEAR310_VIRQ_WAKEUP_SMII3		(SPEAR3XX_VIRQ_START + 7)</div><div class='del'>-</div><div class='del'>-/* IRQs sharing IRQ_GEN_RAS_2 */</div><div class='del'>-#define SPEAR310_VIRQ_UART1			(SPEAR3XX_VIRQ_START + 8)</div><div class='del'>-#define SPEAR310_VIRQ_UART2			(SPEAR3XX_VIRQ_START + 9)</div><div class='del'>-#define SPEAR310_VIRQ_UART3			(SPEAR3XX_VIRQ_START + 10)</div><div class='del'>-#define SPEAR310_VIRQ_UART4			(SPEAR3XX_VIRQ_START + 11)</div><div class='del'>-#define SPEAR310_VIRQ_UART5			(SPEAR3XX_VIRQ_START + 12)</div><div class='del'>-</div><div class='del'>-/* IRQs sharing IRQ_GEN_RAS_3 */</div><div class='del'>-#define SPEAR310_VIRQ_EMI			(SPEAR3XX_VIRQ_START + 13)</div><div class='del'>-#define SPEAR310_VIRQ_PLGPIO			(SPEAR3XX_VIRQ_START + 14)</div><div class='del'>-</div><div class='del'>-/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */</div><div class='del'>-#define SPEAR310_VIRQ_TDM_HDLC			(SPEAR3XX_VIRQ_START + 15)</div><div class='del'>-#define SPEAR310_VIRQ_RS485_0			(SPEAR3XX_VIRQ_START + 16)</div><div class='del'>-#define SPEAR310_VIRQ_RS485_1			(SPEAR3XX_VIRQ_START + 17)</div><div class='del'>-</div><div class='del'>-/* SPEAr320 Virtual irq definitions */</div><div class='del'>-/* IRQs sharing IRQ_GEN_RAS_1 */</div><div class='del'>-#define SPEAR320_VIRQ_EMI			(SPEAR3XX_VIRQ_START + 0)</div><div class='del'>-#define SPEAR320_VIRQ_CLCD			(SPEAR3XX_VIRQ_START + 1)</div><div class='del'>-#define SPEAR320_VIRQ_SPP			(SPEAR3XX_VIRQ_START + 2)</div><div class='del'>-</div><div class='del'>-/* IRQs sharing IRQ_GEN_RAS_2 */</div><div class='del'>-#define SPEAR320_IRQ_SDHCI			SPEAR3XX_IRQ_GEN_RAS_2</div><div class='del'>-</div><div class='del'>-/* IRQs sharing IRQ_GEN_RAS_3 */</div><div class='del'>-#define SPEAR320_VIRQ_PLGPIO			(SPEAR3XX_VIRQ_START + 3)</div><div class='del'>-#define SPEAR320_VIRQ_I2S_PLAY			(SPEAR3XX_VIRQ_START + 4)</div><div class='del'>-#define SPEAR320_VIRQ_I2S_REC			(SPEAR3XX_VIRQ_START + 5)</div><div class='del'>-</div><div class='del'>-/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */</div><div class='del'>-#define SPEAR320_VIRQ_CANU			(SPEAR3XX_VIRQ_START + 6)</div><div class='del'>-#define SPEAR320_VIRQ_CANL			(SPEAR3XX_VIRQ_START + 7)</div><div class='del'>-#define SPEAR320_VIRQ_UART1			(SPEAR3XX_VIRQ_START + 8)</div><div class='del'>-#define SPEAR320_VIRQ_UART2			(SPEAR3XX_VIRQ_START + 9)</div><div class='del'>-#define SPEAR320_VIRQ_SSP1			(SPEAR3XX_VIRQ_START + 10)</div><div class='del'>-#define SPEAR320_VIRQ_SSP2			(SPEAR3XX_VIRQ_START + 11)</div><div class='del'>-#define SPEAR320_VIRQ_SMII0			(SPEAR3XX_VIRQ_START + 12)</div><div class='del'>-#define SPEAR320_VIRQ_MII1_SMII1		(SPEAR3XX_VIRQ_START + 13)</div><div class='del'>-#define SPEAR320_VIRQ_WAKEUP_SMII0		(SPEAR3XX_VIRQ_START + 14)</div><div class='del'>-#define SPEAR320_VIRQ_WAKEUP_MII1_SMII1		(SPEAR3XX_VIRQ_START + 15)</div><div class='del'>-#define SPEAR320_VIRQ_I2C1			(SPEAR3XX_VIRQ_START + 16)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * GPIO pins virtual irqs</div><div class='del'>- * Use the lowest number for the GPIO virtual IRQs base on which subarchs</div><div class='del'>- * we have compiled in</div><div class='del'>- */</div><div class='del'>-#if defined(CONFIG_MACH_SPEAR310)</div><div class='del'>-#define SPEAR3XX_GPIO_INT_BASE			(SPEAR3XX_VIRQ_START + 18)</div><div class='del'>-#elif defined(CONFIG_MACH_SPEAR320)</div><div class='del'>-#define SPEAR3XX_GPIO_INT_BASE			(SPEAR3XX_VIRQ_START + 17)</div><div class='del'>-#else</div><div class='del'>-#define SPEAR3XX_GPIO_INT_BASE			(SPEAR3XX_VIRQ_START + 9)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define SPEAR300_GPIO1_INT_BASE			(SPEAR3XX_GPIO_INT_BASE + 8)</div><div class='del'>-#define SPEAR3XX_PLGPIO_COUNT	102</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)</div><div class='del'>-#define SPEAR3XX_PLGPIO_INT_BASE		(SPEAR3XX_GPIO_INT_BASE + 8)</div><div class='del'>-#define SPEAR3XX_GPIO_INT_END			(SPEAR3XX_PLGPIO_INT_BASE + \</div><div class='del'>-							SPEAR3XX_PLGPIO_COUNT)</div><div class='del'>-#else</div><div class='del'>-#define SPEAR3XX_GPIO_INT_END	(SPEAR300_GPIO1_INT_BASE + 8)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define SPEAR3XX_VIRQ_END	SPEAR3XX_GPIO_INT_END</div><div class='del'>-#define NR_IRQS			SPEAR3XX_VIRQ_END</div><div class='add'>+#define NR_IRQS			160</div><div class='ctx'> </div><div class='ctx'> #endif /* __MACH_IRQS_H */</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/include/mach/misc_regs.h b/arch/arm/mach-spear3xx/include/mach/misc_regs.h<br/>index 5bd8cd8d4852..18e2ac576f25 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/misc_regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/include/mach/misc_regs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/misc_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/misc_regs.h</a></div><div class='hunk'>@@ -14,151 +14,9 @@</div><div class='ctx'> #ifndef __MACH_MISC_REGS_H</div><div class='ctx'> #define __MACH_MISC_REGS_H</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define MISC_BASE		IOMEM(VA_SPEAR3XX_ICM3_MISC_REG_BASE)</div><div class='del'>-</div><div class='del'>-#define SOC_CFG_CTR		(MISC_BASE + 0x000)</div><div class='del'>-#define DIAG_CFG_CTR		(MISC_BASE + 0x004)</div><div class='del'>-#define PLL1_CTR		(MISC_BASE + 0x008)</div><div class='del'>-#define PLL1_FRQ		(MISC_BASE + 0x00C)</div><div class='del'>-#define PLL1_MOD		(MISC_BASE + 0x010)</div><div class='del'>-#define PLL2_CTR		(MISC_BASE + 0x014)</div><div class='del'>-/* PLL_CTR register masks */</div><div class='del'>-#define PLL_ENABLE		2</div><div class='del'>-#define PLL_MODE_SHIFT		4</div><div class='del'>-#define PLL_MODE_MASK		0x3</div><div class='del'>-#define PLL_MODE_NORMAL		0</div><div class='del'>-#define PLL_MODE_FRACTION	1</div><div class='del'>-#define PLL_MODE_DITH_DSB	2</div><div class='del'>-#define PLL_MODE_DITH_SSB	3</div><div class='del'>-</div><div class='del'>-#define PLL2_FRQ		(MISC_BASE + 0x018)</div><div class='del'>-/* PLL FRQ register masks */</div><div class='del'>-#define PLL_DIV_N_SHIFT		0</div><div class='del'>-#define PLL_DIV_N_MASK		0xFF</div><div class='del'>-#define PLL_DIV_P_SHIFT		8</div><div class='del'>-#define PLL_DIV_P_MASK		0x7</div><div class='del'>-#define PLL_NORM_FDBK_M_SHIFT	24</div><div class='del'>-#define PLL_NORM_FDBK_M_MASK	0xFF</div><div class='del'>-#define PLL_DITH_FDBK_M_SHIFT	16</div><div class='del'>-#define PLL_DITH_FDBK_M_MASK	0xFFFF</div><div class='del'>-</div><div class='del'>-#define PLL2_MOD		(MISC_BASE + 0x01C)</div><div class='del'>-#define PLL_CLK_CFG		(MISC_BASE + 0x020)</div><div class='del'>-#define CORE_CLK_CFG		(MISC_BASE + 0x024)</div><div class='del'>-/* CORE CLK CFG register masks */</div><div class='del'>-#define PLL_HCLK_RATIO_SHIFT	10</div><div class='del'>-#define PLL_HCLK_RATIO_MASK	0x3</div><div class='del'>-#define HCLK_PCLK_RATIO_SHIFT	8</div><div class='del'>-#define HCLK_PCLK_RATIO_MASK	0x3</div><div class='del'>-</div><div class='del'>-#define PERIP_CLK_CFG		(MISC_BASE + 0x028)</div><div class='del'>-/* PERIP_CLK_CFG register masks */</div><div class='del'>-#define UART_CLK_SHIFT		4</div><div class='del'>-#define UART_CLK_MASK		0x1</div><div class='del'>-#define FIRDA_CLK_SHIFT		5</div><div class='del'>-#define FIRDA_CLK_MASK		0x3</div><div class='del'>-#define GPT0_CLK_SHIFT		8</div><div class='del'>-#define GPT1_CLK_SHIFT		11</div><div class='del'>-#define GPT2_CLK_SHIFT		12</div><div class='del'>-#define GPT_CLK_MASK		0x1</div><div class='del'>-#define AUX_CLK_PLL3_VAL	0</div><div class='del'>-#define AUX_CLK_PLL1_VAL	1</div><div class='del'>-</div><div class='del'>-#define PERIP1_CLK_ENB		(MISC_BASE + 0x02C)</div><div class='del'>-/* PERIP1_CLK_ENB register masks */</div><div class='del'>-#define UART_CLK_ENB		3</div><div class='del'>-#define SSP_CLK_ENB		5</div><div class='del'>-#define I2C_CLK_ENB		7</div><div class='del'>-#define JPEG_CLK_ENB		8</div><div class='del'>-#define FIRDA_CLK_ENB		10</div><div class='del'>-#define GPT1_CLK_ENB		11</div><div class='del'>-#define GPT2_CLK_ENB		12</div><div class='del'>-#define ADC_CLK_ENB		15</div><div class='del'>-#define RTC_CLK_ENB		17</div><div class='del'>-#define GPIO_CLK_ENB		18</div><div class='del'>-#define DMA_CLK_ENB		19</div><div class='del'>-#define SMI_CLK_ENB		21</div><div class='del'>-#define GMAC_CLK_ENB		23</div><div class='del'>-#define USBD_CLK_ENB		24</div><div class='del'>-#define USBH_CLK_ENB		25</div><div class='del'>-#define C3_CLK_ENB		31</div><div class='del'>-</div><div class='del'>-#define SOC_CORE_ID		(MISC_BASE + 0x030)</div><div class='del'>-#define RAS_CLK_ENB		(MISC_BASE + 0x034)</div><div class='del'>-#define PERIP1_SOF_RST		(MISC_BASE + 0x038)</div><div class='del'>-/* PERIP1_SOF_RST register masks */</div><div class='del'>-#define JPEG_SOF_RST		8</div><div class='del'>-</div><div class='del'>-#define SOC_USER_ID		(MISC_BASE + 0x03C)</div><div class='del'>-#define RAS_SOF_RST		(MISC_BASE + 0x040)</div><div class='del'>-#define PRSC1_CLK_CFG		(MISC_BASE + 0x044)</div><div class='del'>-#define PRSC2_CLK_CFG		(MISC_BASE + 0x048)</div><div class='del'>-#define PRSC3_CLK_CFG		(MISC_BASE + 0x04C)</div><div class='del'>-/* gpt synthesizer register masks */</div><div class='del'>-#define GPT_MSCALE_SHIFT	0</div><div class='del'>-#define GPT_MSCALE_MASK		0xFFF</div><div class='del'>-#define GPT_NSCALE_SHIFT	12</div><div class='del'>-#define GPT_NSCALE_MASK		0xF</div><div class='del'>-</div><div class='del'>-#define AMEM_CLK_CFG		(MISC_BASE + 0x050)</div><div class='del'>-#define EXPI_CLK_CFG		(MISC_BASE + 0x054)</div><div class='del'>-#define CLCD_CLK_SYNT		(MISC_BASE + 0x05C)</div><div class='del'>-#define FIRDA_CLK_SYNT		(MISC_BASE + 0x060)</div><div class='del'>-#define UART_CLK_SYNT		(MISC_BASE + 0x064)</div><div class='del'>-#define GMAC_CLK_SYNT		(MISC_BASE + 0x068)</div><div class='del'>-#define RAS1_CLK_SYNT		(MISC_BASE + 0x06C)</div><div class='del'>-#define RAS2_CLK_SYNT		(MISC_BASE + 0x070)</div><div class='del'>-#define RAS3_CLK_SYNT		(MISC_BASE + 0x074)</div><div class='del'>-#define RAS4_CLK_SYNT		(MISC_BASE + 0x078)</div><div class='del'>-/* aux clk synthesiser register masks for irda to ras4 */</div><div class='del'>-#define AUX_SYNT_ENB		31</div><div class='del'>-#define AUX_EQ_SEL_SHIFT	30</div><div class='del'>-#define AUX_EQ_SEL_MASK		1</div><div class='del'>-#define AUX_EQ1_SEL		0</div><div class='del'>-#define AUX_EQ2_SEL		1</div><div class='del'>-#define AUX_XSCALE_SHIFT	16</div><div class='del'>-#define AUX_XSCALE_MASK		0xFFF</div><div class='del'>-#define AUX_YSCALE_SHIFT	0</div><div class='del'>-#define AUX_YSCALE_MASK		0xFFF</div><div class='del'>-</div><div class='del'>-#define ICM1_ARB_CFG		(MISC_BASE + 0x07C)</div><div class='del'>-#define ICM2_ARB_CFG		(MISC_BASE + 0x080)</div><div class='del'>-#define ICM3_ARB_CFG		(MISC_BASE + 0x084)</div><div class='del'>-#define ICM4_ARB_CFG		(MISC_BASE + 0x088)</div><div class='del'>-#define ICM5_ARB_CFG		(MISC_BASE + 0x08C)</div><div class='del'>-#define ICM6_ARB_CFG		(MISC_BASE + 0x090)</div><div class='del'>-#define ICM7_ARB_CFG		(MISC_BASE + 0x094)</div><div class='del'>-#define ICM8_ARB_CFG		(MISC_BASE + 0x098)</div><div class='del'>-#define ICM9_ARB_CFG		(MISC_BASE + 0x09C)</div><div class='ctx'> #define DMA_CHN_CFG		(MISC_BASE + 0x0A0)</div><div class='del'>-#define USB2_PHY_CFG		(MISC_BASE + 0x0A4)</div><div class='del'>-#define GMAC_CFG_CTR		(MISC_BASE + 0x0A8)</div><div class='del'>-#define EXPI_CFG_CTR		(MISC_BASE + 0x0AC)</div><div class='del'>-#define PRC1_LOCK_CTR		(MISC_BASE + 0x0C0)</div><div class='del'>-#define PRC2_LOCK_CTR		(MISC_BASE + 0x0C4)</div><div class='del'>-#define PRC3_LOCK_CTR		(MISC_BASE + 0x0C8)</div><div class='del'>-#define PRC4_LOCK_CTR		(MISC_BASE + 0x0CC)</div><div class='del'>-#define PRC1_IRQ_CTR		(MISC_BASE + 0x0D0)</div><div class='del'>-#define PRC2_IRQ_CTR		(MISC_BASE + 0x0D4)</div><div class='del'>-#define PRC3_IRQ_CTR		(MISC_BASE + 0x0D8)</div><div class='del'>-#define PRC4_IRQ_CTR		(MISC_BASE + 0x0DC)</div><div class='del'>-#define PWRDOWN_CFG_CTR		(MISC_BASE + 0x0E0)</div><div class='del'>-#define COMPSSTL_1V8_CFG	(MISC_BASE + 0x0E4)</div><div class='del'>-#define COMPSSTL_2V5_CFG	(MISC_BASE + 0x0E8)</div><div class='del'>-#define COMPCOR_3V3_CFG		(MISC_BASE + 0x0EC)</div><div class='del'>-#define SSTLPAD_CFG_CTR		(MISC_BASE + 0x0F0)</div><div class='del'>-#define BIST1_CFG_CTR		(MISC_BASE + 0x0F4)</div><div class='del'>-#define BIST2_CFG_CTR		(MISC_BASE + 0x0F8)</div><div class='del'>-#define BIST3_CFG_CTR		(MISC_BASE + 0x0FC)</div><div class='del'>-#define BIST4_CFG_CTR		(MISC_BASE + 0x100)</div><div class='del'>-#define BIST5_CFG_CTR		(MISC_BASE + 0x104)</div><div class='del'>-#define BIST1_STS_RES		(MISC_BASE + 0x108)</div><div class='del'>-#define BIST2_STS_RES		(MISC_BASE + 0x10C)</div><div class='del'>-#define BIST3_STS_RES		(MISC_BASE + 0x110)</div><div class='del'>-#define BIST4_STS_RES		(MISC_BASE + 0x114)</div><div class='del'>-#define BIST5_STS_RES		(MISC_BASE + 0x118)</div><div class='del'>-#define SYSERR_CFG_CTR		(MISC_BASE + 0x11C)</div><div class='ctx'> </div><div class='ctx'> #endif /* __MACH_MISC_REGS_H */</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h<br/>index 63fd98356919..51eb953148a9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/spear.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/include/mach/spear.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/spear.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/include/mach/spear.h</a></div><div class='hunk'>@@ -15,60 +15,26 @@</div><div class='ctx'> #define __MACH_SPEAR3XX_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='del'>-#include &lt;mach/spear300.h&gt;</div><div class='del'>-#include &lt;mach/spear310.h&gt;</div><div class='del'>-#include &lt;mach/spear320.h&gt;</div><div class='del'>-</div><div class='del'>-#define SPEAR3XX_ML_SDRAM_BASE		UL(0x00000000)</div><div class='del'>-</div><div class='del'>-#define SPEAR3XX_ICM9_BASE		UL(0xC0000000)</div><div class='ctx'> </div><div class='ctx'> /* ICM1 - Low speed connection */</div><div class='ctx'> #define SPEAR3XX_ICM1_2_BASE		UL(0xD0000000)</div><div class='add'>+#define VA_SPEAR3XX_ICM1_2_BASE		UL(0xFD000000)</div><div class='ctx'> #define SPEAR3XX_ICM1_UART_BASE		UL(0xD0000000)</div><div class='del'>-#define VA_SPEAR3XX_ICM1_UART_BASE	IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE)</div><div class='del'>-#define SPEAR3XX_ICM1_ADC_BASE		UL(0xD0080000)</div><div class='add'>+#define VA_SPEAR3XX_ICM1_UART_BASE	(VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE)</div><div class='ctx'> #define SPEAR3XX_ICM1_SSP_BASE		UL(0xD0100000)</div><div class='del'>-#define SPEAR3XX_ICM1_I2C_BASE		UL(0xD0180000)</div><div class='del'>-#define SPEAR3XX_ICM1_JPEG_BASE		UL(0xD0800000)</div><div class='del'>-#define SPEAR3XX_ICM1_IRDA_BASE		UL(0xD1000000)</div><div class='del'>-#define SPEAR3XX_ICM1_SRAM_BASE		UL(0xD2800000)</div><div class='del'>-</div><div class='del'>-/* ICM2 - Application Subsystem */</div><div class='del'>-#define SPEAR3XX_ICM2_HWACCEL0_BASE	UL(0xD8800000)</div><div class='del'>-#define SPEAR3XX_ICM2_HWACCEL1_BASE	UL(0xD9000000)</div><div class='del'>-</div><div class='del'>-/* ICM4 - High Speed Connection */</div><div class='del'>-#define SPEAR3XX_ICM4_BASE		UL(0xE0000000)</div><div class='del'>-#define SPEAR3XX_ICM4_MII_BASE		UL(0xE0800000)</div><div class='del'>-#define SPEAR3XX_ICM4_USBD_FIFO_BASE	UL(0xE1000000)</div><div class='del'>-#define SPEAR3XX_ICM4_USBD_CSR_BASE	UL(0xE1100000)</div><div class='del'>-#define SPEAR3XX_ICM4_USBD_PLDT_BASE	UL(0xE1200000)</div><div class='del'>-#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE	UL(0xE1800000)</div><div class='del'>-#define SPEAR3XX_ICM4_USB_OHCI0_BASE	UL(0xE1900000)</div><div class='del'>-#define SPEAR3XX_ICM4_USB_OHCI1_BASE	UL(0xE2100000)</div><div class='del'>-#define SPEAR3XX_ICM4_USB_ARB_BASE	UL(0xE2800000)</div><div class='ctx'> </div><div class='ctx'> /* ML1 - Multi Layer CPU Subsystem */</div><div class='ctx'> #define SPEAR3XX_ICM3_ML1_2_BASE	UL(0xF0000000)</div><div class='del'>-#define SPEAR3XX_ML1_TMR_BASE		UL(0xF0000000)</div><div class='del'>-#define SPEAR3XX_ML1_VIC_BASE		UL(0xF1100000)</div><div class='del'>-#define VA_SPEAR3XX_ML1_VIC_BASE	IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE)</div><div class='add'>+#define VA_SPEAR6XX_ML_CPU_BASE		UL(0xF0000000)</div><div class='ctx'> </div><div class='ctx'> /* ICM3 - Basic Subsystem */</div><div class='del'>-#define SPEAR3XX_ICM3_SMEM_BASE		UL(0xF8000000)</div><div class='ctx'> #define SPEAR3XX_ICM3_SMI_CTRL_BASE	UL(0xFC000000)</div><div class='add'>+#define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE	UL(0xFC000000)</div><div class='ctx'> #define SPEAR3XX_ICM3_DMA_BASE		UL(0xFC400000)</div><div class='del'>-#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE	UL(0xFC600000)</div><div class='del'>-#define SPEAR3XX_ICM3_TMR0_BASE		UL(0xFC800000)</div><div class='del'>-#define SPEAR3XX_ICM3_WDT_BASE		UL(0xFC880000)</div><div class='del'>-#define SPEAR3XX_ICM3_RTC_BASE		UL(0xFC900000)</div><div class='del'>-#define SPEAR3XX_ICM3_GPIO_BASE		UL(0xFC980000)</div><div class='ctx'> #define SPEAR3XX_ICM3_SYS_CTRL_BASE	UL(0xFCA00000)</div><div class='del'>-#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE	IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE)</div><div class='add'>+#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE	(VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE)</div><div class='ctx'> #define SPEAR3XX_ICM3_MISC_REG_BASE	UL(0xFCA80000)</div><div class='del'>-#define VA_SPEAR3XX_ICM3_MISC_REG_BASE	IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE)</div><div class='del'>-#define SPEAR3XX_ICM3_TMR1_BASE		UL(0xFCB00000)</div><div class='add'>+#define VA_SPEAR3XX_ICM3_MISC_REG_BASE	(VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE)</div><div class='ctx'> </div><div class='ctx'> /* Debug uart for linux, will be used for debug and uncompress messages */</div><div class='ctx'> #define SPEAR_DBG_UART_BASE		SPEAR3XX_ICM1_UART_BASE</div><div class='hunk'>@@ -78,4 +44,17 @@</div><div class='ctx'> #define SPEAR_SYS_CTRL_BASE		SPEAR3XX_ICM3_SYS_CTRL_BASE</div><div class='ctx'> #define VA_SPEAR_SYS_CTRL_BASE		VA_SPEAR3XX_ICM3_SYS_CTRL_BASE</div><div class='ctx'> </div><div class='add'>+/* SPEAr320 Macros */</div><div class='add'>+#define SPEAR320_SOC_CONFIG_BASE	UL(0xB3000000)</div><div class='add'>+#define VA_SPEAR320_SOC_CONFIG_BASE	UL(0xFE000000)</div><div class='add'>+#define SPEAR320_CONTROL_REG		IOMEM(VA_SPEAR320_SOC_CONFIG_BASE)</div><div class='add'>+#define SPEAR320_EXT_CTRL_REG		IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018)</div><div class='add'>+	#define SPEAR320_UARTX_PCLK_MASK		0x1</div><div class='add'>+	#define SPEAR320_UART2_PCLK_SHIFT		8</div><div class='add'>+	#define SPEAR320_UART3_PCLK_SHIFT		9</div><div class='add'>+	#define SPEAR320_UART4_PCLK_SHIFT		10</div><div class='add'>+	#define SPEAR320_UART5_PCLK_SHIFT		11</div><div class='add'>+	#define SPEAR320_UART6_PCLK_SHIFT		12</div><div class='add'>+	#define SPEAR320_RS485_PCLK_SHIFT		13</div><div class='add'>+</div><div class='ctx'> #endif /* __MACH_SPEAR3XX_H */</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h<br/>deleted file mode 100644<br/>index 3b6ea0729040..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/spear300.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/include/mach/spear300.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,54 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-spear3xx/include/mach/spear300.h</div><div class='del'>- *</div><div class='del'>- * SPEAr300 Machine specific definition</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef	CONFIG_MACH_SPEAR300</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_SPEAR300_H</div><div class='del'>-#define __MACH_SPEAR300_H</div><div class='del'>-</div><div class='del'>-/* Base address of various IPs */</div><div class='del'>-#define SPEAR300_TELECOM_BASE		UL(0x50000000)</div><div class='del'>-</div><div class='del'>-/* Interrupt registers offsets and masks */</div><div class='del'>-#define SPEAR300_INT_ENB_MASK_REG	0x54</div><div class='del'>-#define SPEAR300_INT_STS_MASK_REG	0x58</div><div class='del'>-#define SPEAR300_IT_PERS_S_IRQ_MASK	(1 &lt;&lt; 0)</div><div class='del'>-#define SPEAR300_IT_CHANGE_S_IRQ_MASK	(1 &lt;&lt; 1)</div><div class='del'>-#define SPEAR300_I2S_IRQ_MASK		(1 &lt;&lt; 2)</div><div class='del'>-#define SPEAR300_TDM_IRQ_MASK		(1 &lt;&lt; 3)</div><div class='del'>-#define SPEAR300_CAMERA_L_IRQ_MASK	(1 &lt;&lt; 4)</div><div class='del'>-#define SPEAR300_CAMERA_F_IRQ_MASK	(1 &lt;&lt; 5)</div><div class='del'>-#define SPEAR300_CAMERA_V_IRQ_MASK	(1 &lt;&lt; 6)</div><div class='del'>-#define SPEAR300_KEYBOARD_IRQ_MASK	(1 &lt;&lt; 7)</div><div class='del'>-#define SPEAR300_GPIO1_IRQ_MASK		(1 &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-#define SPEAR300_SHIRQ_RAS1_MASK	0x1FF</div><div class='del'>-</div><div class='del'>-#define SPEAR300_CLCD_BASE		UL(0x60000000)</div><div class='del'>-#define SPEAR300_SDHCI_BASE		UL(0x70000000)</div><div class='del'>-#define SPEAR300_NAND_0_BASE		UL(0x80000000)</div><div class='del'>-#define SPEAR300_NAND_1_BASE		UL(0x84000000)</div><div class='del'>-#define SPEAR300_NAND_2_BASE		UL(0x88000000)</div><div class='del'>-#define SPEAR300_NAND_3_BASE		UL(0x8c000000)</div><div class='del'>-#define SPEAR300_NOR_0_BASE		UL(0x90000000)</div><div class='del'>-#define SPEAR300_NOR_1_BASE		UL(0x91000000)</div><div class='del'>-#define SPEAR300_NOR_2_BASE		UL(0x92000000)</div><div class='del'>-#define SPEAR300_NOR_3_BASE		UL(0x93000000)</div><div class='del'>-#define SPEAR300_FSMC_BASE		UL(0x94000000)</div><div class='del'>-#define SPEAR300_SOC_CONFIG_BASE	UL(0x99000000)</div><div class='del'>-#define SPEAR300_KEYBOARD_BASE		UL(0xA0000000)</div><div class='del'>-#define SPEAR300_GPIO_BASE		UL(0xA9000000)</div><div class='del'>-</div><div class='del'>-#endif /* __MACH_SPEAR300_H */</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MACH_SPEAR300 */</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/include/mach/spear310.h b/arch/arm/mach-spear3xx/include/mach/spear310.h<br/>deleted file mode 100644<br/>index 1567d0da725f..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/spear310.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/include/mach/spear310.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,58 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-spear3xx/include/mach/spear310.h</div><div class='del'>- *</div><div class='del'>- * SPEAr310 Machine specific definition</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef	CONFIG_MACH_SPEAR310</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_SPEAR310_H</div><div class='del'>-#define __MACH_SPEAR310_H</div><div class='del'>-</div><div class='del'>-#define SPEAR310_NAND_BASE		UL(0x40000000)</div><div class='del'>-#define SPEAR310_FSMC_BASE		UL(0x44000000)</div><div class='del'>-#define SPEAR310_UART1_BASE		UL(0xB2000000)</div><div class='del'>-#define SPEAR310_UART2_BASE		UL(0xB2080000)</div><div class='del'>-#define SPEAR310_UART3_BASE		UL(0xB2100000)</div><div class='del'>-#define SPEAR310_UART4_BASE		UL(0xB2180000)</div><div class='del'>-#define SPEAR310_UART5_BASE		UL(0xB2200000)</div><div class='del'>-#define SPEAR310_HDLC_BASE		UL(0xB2800000)</div><div class='del'>-#define SPEAR310_RS485_0_BASE		UL(0xB3000000)</div><div class='del'>-#define SPEAR310_RS485_1_BASE		UL(0xB3800000)</div><div class='del'>-#define SPEAR310_SOC_CONFIG_BASE	UL(0xB4000000)</div><div class='del'>-</div><div class='del'>-/* Interrupt registers offsets and masks */</div><div class='del'>-#define SPEAR310_INT_STS_MASK_REG	0x04</div><div class='del'>-#define SPEAR310_SMII0_IRQ_MASK		(1 &lt;&lt; 0)</div><div class='del'>-#define SPEAR310_SMII1_IRQ_MASK		(1 &lt;&lt; 1)</div><div class='del'>-#define SPEAR310_SMII2_IRQ_MASK		(1 &lt;&lt; 2)</div><div class='del'>-#define SPEAR310_SMII3_IRQ_MASK		(1 &lt;&lt; 3)</div><div class='del'>-#define SPEAR310_WAKEUP_SMII0_IRQ_MASK	(1 &lt;&lt; 4)</div><div class='del'>-#define SPEAR310_WAKEUP_SMII1_IRQ_MASK	(1 &lt;&lt; 5)</div><div class='del'>-#define SPEAR310_WAKEUP_SMII2_IRQ_MASK	(1 &lt;&lt; 6)</div><div class='del'>-#define SPEAR310_WAKEUP_SMII3_IRQ_MASK	(1 &lt;&lt; 7)</div><div class='del'>-#define SPEAR310_UART1_IRQ_MASK		(1 &lt;&lt; 8)</div><div class='del'>-#define SPEAR310_UART2_IRQ_MASK		(1 &lt;&lt; 9)</div><div class='del'>-#define SPEAR310_UART3_IRQ_MASK		(1 &lt;&lt; 10)</div><div class='del'>-#define SPEAR310_UART4_IRQ_MASK		(1 &lt;&lt; 11)</div><div class='del'>-#define SPEAR310_UART5_IRQ_MASK		(1 &lt;&lt; 12)</div><div class='del'>-#define SPEAR310_EMI_IRQ_MASK		(1 &lt;&lt; 13)</div><div class='del'>-#define SPEAR310_TDM_HDLC_IRQ_MASK	(1 &lt;&lt; 14)</div><div class='del'>-#define SPEAR310_RS485_0_IRQ_MASK	(1 &lt;&lt; 15)</div><div class='del'>-#define SPEAR310_RS485_1_IRQ_MASK	(1 &lt;&lt; 16)</div><div class='del'>-</div><div class='del'>-#define SPEAR310_SHIRQ_RAS1_MASK	0x000FF</div><div class='del'>-#define SPEAR310_SHIRQ_RAS2_MASK	0x01F00</div><div class='del'>-#define SPEAR310_SHIRQ_RAS3_MASK	0x02000</div><div class='del'>-#define SPEAR310_SHIRQ_INTRCOMM_RAS_MASK	0x1C000</div><div class='del'>-</div><div class='del'>-#endif /* __MACH_SPEAR310_H */</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MACH_SPEAR310 */</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h<br/>deleted file mode 100644<br/>index 8cfa83fa1296..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/include/mach/spear320.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/include/mach/spear320.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,67 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-spear3xx/include/mach/spear320.h</div><div class='del'>- *</div><div class='del'>- * SPEAr320 Machine specific definition</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef	CONFIG_MACH_SPEAR320</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_SPEAR320_H</div><div class='del'>-#define __MACH_SPEAR320_H</div><div class='del'>-</div><div class='del'>-#define SPEAR320_EMI_CTRL_BASE		UL(0x40000000)</div><div class='del'>-#define SPEAR320_FSMC_BASE		UL(0x4C000000)</div><div class='del'>-#define SPEAR320_NAND_BASE		UL(0x50000000)</div><div class='del'>-#define SPEAR320_I2S_BASE		UL(0x60000000)</div><div class='del'>-#define SPEAR320_SDHCI_BASE		UL(0x70000000)</div><div class='del'>-#define SPEAR320_CLCD_BASE		UL(0x90000000)</div><div class='del'>-#define SPEAR320_PAR_PORT_BASE		UL(0xA0000000)</div><div class='del'>-#define SPEAR320_CAN0_BASE		UL(0xA1000000)</div><div class='del'>-#define SPEAR320_CAN1_BASE		UL(0xA2000000)</div><div class='del'>-#define SPEAR320_UART1_BASE		UL(0xA3000000)</div><div class='del'>-#define SPEAR320_UART2_BASE		UL(0xA4000000)</div><div class='del'>-#define SPEAR320_SSP0_BASE		UL(0xA5000000)</div><div class='del'>-#define SPEAR320_SSP1_BASE		UL(0xA6000000)</div><div class='del'>-#define SPEAR320_I2C_BASE		UL(0xA7000000)</div><div class='del'>-#define SPEAR320_PWM_BASE		UL(0xA8000000)</div><div class='del'>-#define SPEAR320_SMII0_BASE		UL(0xAA000000)</div><div class='del'>-#define SPEAR320_SMII1_BASE		UL(0xAB000000)</div><div class='del'>-#define SPEAR320_SOC_CONFIG_BASE	UL(0xB3000000)</div><div class='del'>-</div><div class='del'>-/* Interrupt registers offsets and masks */</div><div class='del'>-#define SPEAR320_INT_STS_MASK_REG		0x04</div><div class='del'>-#define SPEAR320_INT_CLR_MASK_REG		0x04</div><div class='del'>-#define SPEAR320_INT_ENB_MASK_REG		0x08</div><div class='del'>-#define SPEAR320_GPIO_IRQ_MASK			(1 &lt;&lt; 0)</div><div class='del'>-#define SPEAR320_I2S_PLAY_IRQ_MASK		(1 &lt;&lt; 1)</div><div class='del'>-#define SPEAR320_I2S_REC_IRQ_MASK		(1 &lt;&lt; 2)</div><div class='del'>-#define SPEAR320_EMI_IRQ_MASK			(1 &lt;&lt; 7)</div><div class='del'>-#define SPEAR320_CLCD_IRQ_MASK			(1 &lt;&lt; 8)</div><div class='del'>-#define SPEAR320_SPP_IRQ_MASK			(1 &lt;&lt; 9)</div><div class='del'>-#define SPEAR320_SDHCI_IRQ_MASK			(1 &lt;&lt; 10)</div><div class='del'>-#define SPEAR320_CAN_U_IRQ_MASK			(1 &lt;&lt; 11)</div><div class='del'>-#define SPEAR320_CAN_L_IRQ_MASK			(1 &lt;&lt; 12)</div><div class='del'>-#define SPEAR320_UART1_IRQ_MASK			(1 &lt;&lt; 13)</div><div class='del'>-#define SPEAR320_UART2_IRQ_MASK			(1 &lt;&lt; 14)</div><div class='del'>-#define SPEAR320_SSP1_IRQ_MASK			(1 &lt;&lt; 15)</div><div class='del'>-#define SPEAR320_SSP2_IRQ_MASK			(1 &lt;&lt; 16)</div><div class='del'>-#define SPEAR320_SMII0_IRQ_MASK			(1 &lt;&lt; 17)</div><div class='del'>-#define SPEAR320_MII1_SMII1_IRQ_MASK		(1 &lt;&lt; 18)</div><div class='del'>-#define SPEAR320_WAKEUP_SMII0_IRQ_MASK		(1 &lt;&lt; 19)</div><div class='del'>-#define SPEAR320_WAKEUP_MII1_SMII1_IRQ_MASK	(1 &lt;&lt; 20)</div><div class='del'>-#define SPEAR320_I2C1_IRQ_MASK			(1 &lt;&lt; 21)</div><div class='del'>-</div><div class='del'>-#define SPEAR320_SHIRQ_RAS1_MASK		0x000380</div><div class='del'>-#define SPEAR320_SHIRQ_RAS3_MASK		0x000007</div><div class='del'>-#define SPEAR320_SHIRQ_INTRCOMM_RAS_MASK	0x3FF800</div><div class='del'>-</div><div class='del'>-#endif /* __MACH_SPEAR320_H */</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MACH_SPEAR320 */</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c<br/>index f7db66812abb..f74a05bdb829 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/spear300.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/spear300.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/spear300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/spear300.c</a></div><div class='hunk'>@@ -3,372 +3,62 @@</div><div class='ctx'>  *</div><div class='ctx'>  * SPEAr300 machine source file</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='add'>+ * Copyright (C) 2009-2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='ctx'>  * warranty of any kind, whether express or implied.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/amba/pl061.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='add'>+#define pr_fmt(fmt) "SPEAr300: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/amba/pl08x.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;asm/hardware/vic.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;plat/shirq.h&gt;</div><div class='ctx'> #include &lt;mach/generic.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-/* pad multiplexing support */</div><div class='del'>-/* muxing registers */</div><div class='del'>-#define PAD_MUX_CONFIG_REG	0x00</div><div class='del'>-#define MODE_CONFIG_REG		0x04</div><div class='del'>-</div><div class='del'>-/* modes */</div><div class='del'>-#define NAND_MODE			(1 &lt;&lt; 0)</div><div class='del'>-#define NOR_MODE			(1 &lt;&lt; 1)</div><div class='del'>-#define PHOTO_FRAME_MODE		(1 &lt;&lt; 2)</div><div class='del'>-#define LEND_IP_PHONE_MODE		(1 &lt;&lt; 3)</div><div class='del'>-#define HEND_IP_PHONE_MODE		(1 &lt;&lt; 4)</div><div class='del'>-#define LEND_WIFI_PHONE_MODE		(1 &lt;&lt; 5)</div><div class='del'>-#define HEND_WIFI_PHONE_MODE		(1 &lt;&lt; 6)</div><div class='del'>-#define ATA_PABX_WI2S_MODE		(1 &lt;&lt; 7)</div><div class='del'>-#define ATA_PABX_I2S_MODE		(1 &lt;&lt; 8)</div><div class='del'>-#define CAML_LCDW_MODE			(1 &lt;&lt; 9)</div><div class='del'>-#define CAMU_LCD_MODE			(1 &lt;&lt; 10)</div><div class='del'>-#define CAMU_WLCD_MODE			(1 &lt;&lt; 11)</div><div class='del'>-#define CAML_LCD_MODE			(1 &lt;&lt; 12)</div><div class='del'>-#define ALL_MODES			0x1FFF</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_nand_mode = {</div><div class='del'>-	.id = NAND_MODE,</div><div class='del'>-	.name = "nand mode",</div><div class='del'>-	.mask = 0x00,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_nor_mode = {</div><div class='del'>-	.id = NOR_MODE,</div><div class='del'>-	.name = "nor mode",</div><div class='del'>-	.mask = 0x01,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_photo_frame_mode = {</div><div class='del'>-	.id = PHOTO_FRAME_MODE,</div><div class='del'>-	.name = "photo frame mode",</div><div class='del'>-	.mask = 0x02,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_lend_ip_phone_mode = {</div><div class='del'>-	.id = LEND_IP_PHONE_MODE,</div><div class='del'>-	.name = "lend ip phone mode",</div><div class='del'>-	.mask = 0x03,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_hend_ip_phone_mode = {</div><div class='del'>-	.id = HEND_IP_PHONE_MODE,</div><div class='del'>-	.name = "hend ip phone mode",</div><div class='del'>-	.mask = 0x04,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_lend_wifi_phone_mode = {</div><div class='del'>-	.id = LEND_WIFI_PHONE_MODE,</div><div class='del'>-	.name = "lend wifi phone mode",</div><div class='del'>-	.mask = 0x05,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_hend_wifi_phone_mode = {</div><div class='del'>-	.id = HEND_WIFI_PHONE_MODE,</div><div class='del'>-	.name = "hend wifi phone mode",</div><div class='del'>-	.mask = 0x06,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_ata_pabx_wi2s_mode = {</div><div class='del'>-	.id = ATA_PABX_WI2S_MODE,</div><div class='del'>-	.name = "ata pabx wi2s mode",</div><div class='del'>-	.mask = 0x07,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_ata_pabx_i2s_mode = {</div><div class='del'>-	.id = ATA_PABX_I2S_MODE,</div><div class='del'>-	.name = "ata pabx i2s mode",</div><div class='del'>-	.mask = 0x08,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_caml_lcdw_mode = {</div><div class='del'>-	.id = CAML_LCDW_MODE,</div><div class='del'>-	.name = "caml lcdw mode",</div><div class='del'>-	.mask = 0x0C,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_camu_lcd_mode = {</div><div class='del'>-	.id = CAMU_LCD_MODE,</div><div class='del'>-	.name = "camu lcd mode",</div><div class='del'>-	.mask = 0x0D,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_camu_wlcd_mode = {</div><div class='del'>-	.id = CAMU_WLCD_MODE,</div><div class='del'>-	.name = "camu wlcd mode",</div><div class='del'>-	.mask = 0x0E,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear300_caml_lcd_mode = {</div><div class='del'>-	.id = CAML_LCD_MODE,</div><div class='del'>-	.name = "caml lcd mode",</div><div class='del'>-	.mask = 0x0F,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* devices */</div><div class='del'>-static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |</div><div class='del'>-			ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,</div><div class='del'>-		.mask = PMX_FIRDA_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_fsmc_2_chips = {</div><div class='del'>-	.name = "fsmc_2_chips",</div><div class='del'>-	.modes = pmx_fsmc_2_chips_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |</div><div class='del'>-			ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,</div><div class='del'>-		.mask = PMX_FIRDA_MASK | PMX_UART0_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_fsmc_4_chips = {</div><div class='del'>-	.name = "fsmc_4_chips",</div><div class='del'>-	.modes = pmx_fsmc_4_chips_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_keyboard_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |</div><div class='del'>-			LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |</div><div class='del'>-			CAML_LCDW_MODE | CAMU_LCD_MODE | CAMU_WLCD_MODE |</div><div class='del'>-			CAML_LCD_MODE,</div><div class='del'>-		.mask = 0x0,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_keyboard = {</div><div class='del'>-	.name = "keyboard",</div><div class='del'>-	.modes = pmx_keyboard_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_keyboard_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_clcd_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = PHOTO_FRAME_MODE,</div><div class='del'>-		.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK ,</div><div class='del'>-	}, {</div><div class='del'>-		.ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE |</div><div class='del'>-			CAMU_LCD_MODE | CAML_LCD_MODE,</div><div class='del'>-		.mask = PMX_TIMER_3_4_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_clcd = {</div><div class='del'>-	.name = "clcd",</div><div class='del'>-	.modes = pmx_clcd_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_clcd_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_telecom_gpio_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	}, {</div><div class='del'>-		.ids = LEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,</div><div class='del'>-	}, {</div><div class='del'>-		.ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_WLCD_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK | PMX_TIMER_3_4_MASK,</div><div class='del'>-	}, {</div><div class='del'>-		.ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK,</div><div class='del'>-	}, {</div><div class='del'>-		.ids = ATA_PABX_WI2S_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK</div><div class='del'>-			| PMX_UART0_MODEM_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_telecom_gpio = {</div><div class='del'>-	.name = "telecom_gpio",</div><div class='del'>-	.modes = pmx_telecom_gpio_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_telecom_tdm_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |</div><div class='del'>-			HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE</div><div class='del'>-			| HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE</div><div class='del'>-			| ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE</div><div class='del'>-			| CAMU_WLCD_MODE | CAML_LCD_MODE,</div><div class='del'>-		.mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_telecom_tdm = {</div><div class='del'>-	.name = "telecom_tdm",</div><div class='del'>-	.modes = pmx_telecom_tdm_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |</div><div class='del'>-			LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE</div><div class='del'>-			| ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE |</div><div class='del'>-			CAML_LCDW_MODE | CAML_LCD_MODE,</div><div class='del'>-		.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk = {</div><div class='del'>-	.name = "telecom_spi_cs_i2c_clk",</div><div class='del'>-	.modes = pmx_telecom_spi_cs_i2c_clk_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_telecom_camera_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = CAML_LCDW_MODE | CAML_LCD_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	}, {</div><div class='del'>-		.ids = CAMU_LCD_MODE | CAMU_WLCD_MODE,</div><div class='del'>-		.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_telecom_camera = {</div><div class='del'>-	.name = "telecom_camera",</div><div class='del'>-	.modes = pmx_telecom_camera_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_telecom_dac_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE</div><div class='del'>-			| CAMU_WLCD_MODE | CAML_LCD_MODE,</div><div class='del'>-		.mask = PMX_TIMER_1_2_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_telecom_dac = {</div><div class='del'>-	.name = "telecom_dac",</div><div class='del'>-	.modes = pmx_telecom_dac_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_telecom_i2s_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE</div><div class='del'>-			| LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |</div><div class='del'>-			ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE</div><div class='del'>-			| CAMU_WLCD_MODE | CAML_LCD_MODE,</div><div class='del'>-		.mask = PMX_UART0_MODEM_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_telecom_i2s = {</div><div class='del'>-	.name = "telecom_i2s",</div><div class='del'>-	.modes = pmx_telecom_i2s_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = NAND_MODE | NOR_MODE,</div><div class='del'>-		.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |</div><div class='del'>-			PMX_TIMER_3_4_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_telecom_boot_pins = {</div><div class='del'>-	.name = "telecom_boot_pins",</div><div class='del'>-	.modes = pmx_telecom_boot_pins_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |</div><div class='del'>-			HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |</div><div class='del'>-			HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |</div><div class='del'>-			CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE |</div><div class='del'>-			ATA_PABX_I2S_MODE,</div><div class='del'>-		.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |</div><div class='del'>-			PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |</div><div class='del'>-			PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_telecom_sdhci_4bit = {</div><div class='del'>-	.name = "telecom_sdhci_4bit",</div><div class='del'>-	.modes = pmx_telecom_sdhci_4bit_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |</div><div class='del'>-			HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |</div><div class='del'>-			HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |</div><div class='del'>-			CAMU_WLCD_MODE | CAML_LCD_MODE,</div><div class='del'>-		.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |</div><div class='del'>-			PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |</div><div class='del'>-			PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_telecom_sdhci_8bit = {</div><div class='del'>-	.name = "telecom_sdhci_8bit",</div><div class='del'>-	.modes = pmx_telecom_sdhci_8bit_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_gpio1_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = PHOTO_FRAME_MODE,</div><div class='del'>-		.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |</div><div class='del'>-			PMX_TIMER_3_4_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear300_pmx_gpio1 = {</div><div class='del'>-	.name = "arm gpio1",</div><div class='del'>-	.modes = pmx_gpio1_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_gpio1_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* pmx driver structure */</div><div class='del'>-static struct pmx_driver pmx_driver = {</div><div class='del'>-	.mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f},</div><div class='del'>-	.mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},</div><div class='del'>-};</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='add'>+</div><div class='add'>+/* Base address of various IPs */</div><div class='add'>+#define SPEAR300_TELECOM_BASE		UL(0x50000000)</div><div class='add'>+</div><div class='add'>+/* Interrupt registers offsets and masks */</div><div class='add'>+#define SPEAR300_INT_ENB_MASK_REG	0x54</div><div class='add'>+#define SPEAR300_INT_STS_MASK_REG	0x58</div><div class='add'>+#define SPEAR300_IT_PERS_S_IRQ_MASK	(1 &lt;&lt; 0)</div><div class='add'>+#define SPEAR300_IT_CHANGE_S_IRQ_MASK	(1 &lt;&lt; 1)</div><div class='add'>+#define SPEAR300_I2S_IRQ_MASK		(1 &lt;&lt; 2)</div><div class='add'>+#define SPEAR300_TDM_IRQ_MASK		(1 &lt;&lt; 3)</div><div class='add'>+#define SPEAR300_CAMERA_L_IRQ_MASK	(1 &lt;&lt; 4)</div><div class='add'>+#define SPEAR300_CAMERA_F_IRQ_MASK	(1 &lt;&lt; 5)</div><div class='add'>+#define SPEAR300_CAMERA_V_IRQ_MASK	(1 &lt;&lt; 6)</div><div class='add'>+#define SPEAR300_KEYBOARD_IRQ_MASK	(1 &lt;&lt; 7)</div><div class='add'>+#define SPEAR300_GPIO1_IRQ_MASK		(1 &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+#define SPEAR300_SHIRQ_RAS1_MASK	0x1FF</div><div class='add'>+</div><div class='add'>+#define SPEAR300_SOC_CONFIG_BASE	UL(0x99000000)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* SPEAr300 Virtual irq definitions */</div><div class='add'>+/* IRQs sharing IRQ_GEN_RAS_1 */</div><div class='add'>+#define SPEAR300_VIRQ_IT_PERS_S			(SPEAR3XX_VIRQ_START + 0)</div><div class='add'>+#define SPEAR300_VIRQ_IT_CHANGE_S		(SPEAR3XX_VIRQ_START + 1)</div><div class='add'>+#define SPEAR300_VIRQ_I2S			(SPEAR3XX_VIRQ_START + 2)</div><div class='add'>+#define SPEAR300_VIRQ_TDM			(SPEAR3XX_VIRQ_START + 3)</div><div class='add'>+#define SPEAR300_VIRQ_CAMERA_L			(SPEAR3XX_VIRQ_START + 4)</div><div class='add'>+#define SPEAR300_VIRQ_CAMERA_F			(SPEAR3XX_VIRQ_START + 5)</div><div class='add'>+#define SPEAR300_VIRQ_CAMERA_V			(SPEAR3XX_VIRQ_START + 6)</div><div class='add'>+#define SPEAR300_VIRQ_KEYBOARD			(SPEAR3XX_VIRQ_START + 7)</div><div class='add'>+#define SPEAR300_VIRQ_GPIO1			(SPEAR3XX_VIRQ_START + 8)</div><div class='add'>+</div><div class='add'>+/* IRQs sharing IRQ_GEN_RAS_3 */</div><div class='add'>+#define SPEAR300_IRQ_CLCD			SPEAR3XX_IRQ_GEN_RAS_3</div><div class='add'>+</div><div class='add'>+/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */</div><div class='add'>+#define SPEAR300_IRQ_SDHCI			SPEAR3XX_IRQ_INTRCOMM_RAS_ARM</div><div class='ctx'> </div><div class='ctx'> /* spear3xx shared irq */</div><div class='ctx'> static struct shirq_dev_config shirq_ras1_config[] = {</div><div class='hunk'>@@ -423,45 +113,238 @@ static struct spear_shirq shirq_ras1 = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Add spear300 specific devices here */</div><div class='del'>-/* arm gpio1 device registration */</div><div class='del'>-static struct pl061_platform_data gpio1_plat_data = {</div><div class='del'>-	.gpio_base	= 8,</div><div class='del'>-	.irq_base	= SPEAR300_GPIO1_INT_BASE,</div><div class='add'>+/* DMAC platform data's slave info */</div><div class='add'>+struct pl08x_channel_data spear300_dma_info[] = {</div><div class='add'>+	{</div><div class='add'>+		.bus_id = "uart0_rx",</div><div class='add'>+		.min_signal = 2,</div><div class='add'>+		.max_signal = 2,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart0_tx",</div><div class='add'>+		.min_signal = 3,</div><div class='add'>+		.max_signal = 3,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp0_rx",</div><div class='add'>+		.min_signal = 8,</div><div class='add'>+		.max_signal = 8,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp0_tx",</div><div class='add'>+		.min_signal = 9,</div><div class='add'>+		.max_signal = 9,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2c_rx",</div><div class='add'>+		.min_signal = 10,</div><div class='add'>+		.max_signal = 10,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2c_tx",</div><div class='add'>+		.min_signal = 11,</div><div class='add'>+		.max_signal = 11,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "irda",</div><div class='add'>+		.min_signal = 12,</div><div class='add'>+		.max_signal = 12,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "adc",</div><div class='add'>+		.min_signal = 13,</div><div class='add'>+		.max_signal = 13,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "to_jpeg",</div><div class='add'>+		.min_signal = 14,</div><div class='add'>+		.max_signal = 14,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "from_jpeg",</div><div class='add'>+		.min_signal = 15,</div><div class='add'>+		.max_signal = 15,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras0_rx",</div><div class='add'>+		.min_signal = 0,</div><div class='add'>+		.max_signal = 0,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras0_tx",</div><div class='add'>+		.min_signal = 1,</div><div class='add'>+		.max_signal = 1,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras1_rx",</div><div class='add'>+		.min_signal = 2,</div><div class='add'>+		.max_signal = 2,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras1_tx",</div><div class='add'>+		.min_signal = 3,</div><div class='add'>+		.max_signal = 3,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras2_rx",</div><div class='add'>+		.min_signal = 4,</div><div class='add'>+		.max_signal = 4,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras2_tx",</div><div class='add'>+		.min_signal = 5,</div><div class='add'>+		.max_signal = 5,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras3_rx",</div><div class='add'>+		.min_signal = 6,</div><div class='add'>+		.max_signal = 6,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras3_tx",</div><div class='add'>+		.min_signal = 7,</div><div class='add'>+		.max_signal = 7,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras4_rx",</div><div class='add'>+		.min_signal = 8,</div><div class='add'>+		.max_signal = 8,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras4_tx",</div><div class='add'>+		.min_signal = 9,</div><div class='add'>+		.max_signal = 9,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras5_rx",</div><div class='add'>+		.min_signal = 10,</div><div class='add'>+		.max_signal = 10,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras5_tx",</div><div class='add'>+		.min_signal = 11,</div><div class='add'>+		.max_signal = 11,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras6_rx",</div><div class='add'>+		.min_signal = 12,</div><div class='add'>+		.max_signal = 12,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras6_tx",</div><div class='add'>+		.min_signal = 13,</div><div class='add'>+		.max_signal = 13,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras7_rx",</div><div class='add'>+		.min_signal = 14,</div><div class='add'>+		.max_signal = 14,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras7_tx",</div><div class='add'>+		.min_signal = 15,</div><div class='add'>+		.max_signal = 15,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-AMBA_APB_DEVICE(spear300_gpio1, "gpio1", 0, SPEAR300_GPIO_BASE,</div><div class='del'>-	{SPEAR300_VIRQ_GPIO1}, &amp;gpio1_plat_data);</div><div class='add'>+/* Add SPEAr300 auxdata to pass platform data */</div><div class='add'>+static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,</div><div class='add'>+			&amp;pl022_plat_data),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,</div><div class='add'>+			&amp;pl080_plat_data),</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* spear300 routines */</div><div class='del'>-void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,</div><div class='del'>-		u8 pmx_dev_count)</div><div class='add'>+static void __init spear300_dt_init(void)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pl080_plat_data.slave_channels = spear300_dma_info;</div><div class='add'>+	pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info);</div><div class='ctx'> </div><div class='del'>-	/* call spear3xx family common init function */</div><div class='del'>-	spear3xx_init();</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='add'>+			spear300_auxdata_lookup, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* shared irq registration */</div><div class='ctx'> 	shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K);</div><div class='ctx'> 	if (shirq_ras1.regs.base) {</div><div class='ctx'> 		ret = spear_shirq_register(&amp;shirq_ras1);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			printk(KERN_ERR "Error registering Shared IRQ\n");</div><div class='add'>+			pr_err("Error registering Shared IRQ\n");</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* pmx initialization */</div><div class='del'>-	pmx_driver.mode = pmx_mode;</div><div class='del'>-	pmx_driver.devs = pmx_devs;</div><div class='del'>-	pmx_driver.devs_count = pmx_dev_count;</div><div class='add'>+static const char * const spear300_dt_board_compat[] = {</div><div class='add'>+	"st,spear300",</div><div class='add'>+	"st,spear300-evb",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K);</div><div class='del'>-	if (pmx_driver.base) {</div><div class='del'>-		ret = pmx_register(&amp;pmx_driver);</div><div class='del'>-		if (ret)</div><div class='del'>-			printk(KERN_ERR "padmux: registration failed. err no"</div><div class='del'>-					": %d\n", ret);</div><div class='del'>-		/* Free Mapping, device selection already done */</div><div class='del'>-		iounmap(pmx_driver.base);</div><div class='del'>-	}</div><div class='add'>+static void __init spear300_map_io(void)</div><div class='add'>+{</div><div class='add'>+	spear3xx_map_io();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")</div><div class='add'>+	.map_io		=	spear300_map_io,</div><div class='add'>+	.init_irq	=	spear3xx_dt_init_irq,</div><div class='add'>+	.handle_irq	=	vic_handle_irq,</div><div class='add'>+	.timer		=	&amp;spear3xx_timer,</div><div class='add'>+	.init_machine	=	spear300_dt_init,</div><div class='add'>+	.restart	=	spear_restart,</div><div class='add'>+	.dt_compat	=	spear300_dt_board_compat,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c<br/>deleted file mode 100644<br/>index 3462ab9d6122..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/spear300_evb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/spear300_evb.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,75 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-spear3xx/spear300_evb.c</div><div class='del'>- *</div><div class='del'>- * SPEAr300 evaluation board source file</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hardware/vic.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;mach/generic.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-/* padmux devices to enable */</div><div class='del'>-static struct pmx_dev *pmx_devs[] = {</div><div class='del'>-	/* spear3xx specific devices */</div><div class='del'>-	&amp;spear3xx_pmx_i2c,</div><div class='del'>-	&amp;spear3xx_pmx_ssp_cs,</div><div class='del'>-	&amp;spear3xx_pmx_ssp,</div><div class='del'>-	&amp;spear3xx_pmx_mii,</div><div class='del'>-	&amp;spear3xx_pmx_uart0,</div><div class='del'>-</div><div class='del'>-	/* spear300 specific devices */</div><div class='del'>-	&amp;spear300_pmx_fsmc_2_chips,</div><div class='del'>-	&amp;spear300_pmx_clcd,</div><div class='del'>-	&amp;spear300_pmx_telecom_sdhci_4bit,</div><div class='del'>-	&amp;spear300_pmx_gpio1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct amba_device *amba_devs[] __initdata = {</div><div class='del'>-	/* spear3xx specific devices */</div><div class='del'>-	&amp;spear3xx_gpio_device,</div><div class='del'>-	&amp;spear3xx_uart_device,</div><div class='del'>-</div><div class='del'>-	/* spear300 specific devices */</div><div class='del'>-	&amp;spear300_gpio1_device,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *plat_devs[] __initdata = {</div><div class='del'>-	/* spear3xx specific devices */</div><div class='del'>-</div><div class='del'>-	/* spear300 specific devices */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init spear300_evb_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	/* call spear300 machine init function */</div><div class='del'>-	spear300_init(&amp;spear300_photo_frame_mode, pmx_devs,</div><div class='del'>-			ARRAY_SIZE(pmx_devs));</div><div class='del'>-</div><div class='del'>-	/* Add Platform Devices */</div><div class='del'>-	platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));</div><div class='del'>-</div><div class='del'>-	/* Add Amba Devices */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(amba_devs); i++)</div><div class='del'>-		amba_device_register(amba_devs[i], &amp;iomem_resource);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")</div><div class='del'>-	.atag_offset	=	0x100,</div><div class='del'>-	.map_io		=	spear3xx_map_io,</div><div class='del'>-	.init_irq	=	spear3xx_init_irq,</div><div class='del'>-	.handle_irq	=	vic_handle_irq,</div><div class='del'>-	.timer		=	&amp;spear3xx_timer,</div><div class='del'>-	.init_machine	=	spear300_evb_init,</div><div class='del'>-	.restart	=	spear_restart,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c<br/>index febaa6fcfb6a..84dfb0900747 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/spear310.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/spear310.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/spear310.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/spear310.c</a></div><div class='hunk'>@@ -3,141 +3,84 @@</div><div class='ctx'>  *</div><div class='ctx'>  * SPEAr310 machine source file</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='add'>+ * Copyright (C) 2009-2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='ctx'>  * warranty of any kind, whether express or implied.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='add'>+#define pr_fmt(fmt) "SPEAr310: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/amba/pl08x.h&gt;</div><div class='add'>+#include &lt;linux/amba/serial.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;asm/hardware/vic.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;plat/shirq.h&gt;</div><div class='ctx'> #include &lt;mach/generic.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-/* pad multiplexing support */</div><div class='del'>-/* muxing registers */</div><div class='del'>-#define PAD_MUX_CONFIG_REG	0x08</div><div class='del'>-</div><div class='del'>-/* devices */</div><div class='del'>-static struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_TIMER_3_4_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear310_pmx_emi_cs_0_1_4_5 = {</div><div class='del'>-	.name = "emi_cs_0_1_4_5",</div><div class='del'>-	.modes = pmx_emi_cs_0_1_4_5_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_emi_cs_0_1_4_5_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_TIMER_1_2_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear310_pmx_emi_cs_2_3 = {</div><div class='del'>-	.name = "emi_cs_2_3",</div><div class='del'>-	.modes = pmx_emi_cs_2_3_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_emi_cs_2_3_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_uart1_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_FIRDA_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear310_pmx_uart1 = {</div><div class='del'>-	.name = "uart1",</div><div class='del'>-	.modes = pmx_uart1_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_uart1_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_uart2_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_TIMER_1_2_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear310_pmx_uart2 = {</div><div class='del'>-	.name = "uart2",</div><div class='del'>-	.modes = pmx_uart2_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_uart2_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_uart3_4_5_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_UART0_MODEM_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear310_pmx_uart3_4_5 = {</div><div class='del'>-	.name = "uart3_4_5",</div><div class='del'>-	.modes = pmx_uart3_4_5_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_uart3_4_5_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_fsmc_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_SSP_CS_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear310_pmx_fsmc = {</div><div class='del'>-	.name = "fsmc",</div><div class='del'>-	.modes = pmx_fsmc_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_fsmc_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_rs485_0_1_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear310_pmx_rs485_0_1 = {</div><div class='del'>-	.name = "rs485_0_1",</div><div class='del'>-	.modes = pmx_rs485_0_1_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_rs485_0_1_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_tdm0_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear310_pmx_tdm0 = {</div><div class='del'>-	.name = "tdm0",</div><div class='del'>-	.modes = pmx_tdm0_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_tdm0_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='add'>+</div><div class='add'>+#define SPEAR310_UART1_BASE		UL(0xB2000000)</div><div class='add'>+#define SPEAR310_UART2_BASE		UL(0xB2080000)</div><div class='add'>+#define SPEAR310_UART3_BASE		UL(0xB2100000)</div><div class='add'>+#define SPEAR310_UART4_BASE		UL(0xB2180000)</div><div class='add'>+#define SPEAR310_UART5_BASE		UL(0xB2200000)</div><div class='add'>+#define SPEAR310_SOC_CONFIG_BASE	UL(0xB4000000)</div><div class='add'>+</div><div class='add'>+/* Interrupt registers offsets and masks */</div><div class='add'>+#define SPEAR310_INT_STS_MASK_REG	0x04</div><div class='add'>+#define SPEAR310_SMII0_IRQ_MASK		(1 &lt;&lt; 0)</div><div class='add'>+#define SPEAR310_SMII1_IRQ_MASK		(1 &lt;&lt; 1)</div><div class='add'>+#define SPEAR310_SMII2_IRQ_MASK		(1 &lt;&lt; 2)</div><div class='add'>+#define SPEAR310_SMII3_IRQ_MASK		(1 &lt;&lt; 3)</div><div class='add'>+#define SPEAR310_WAKEUP_SMII0_IRQ_MASK	(1 &lt;&lt; 4)</div><div class='add'>+#define SPEAR310_WAKEUP_SMII1_IRQ_MASK	(1 &lt;&lt; 5)</div><div class='add'>+#define SPEAR310_WAKEUP_SMII2_IRQ_MASK	(1 &lt;&lt; 6)</div><div class='add'>+#define SPEAR310_WAKEUP_SMII3_IRQ_MASK	(1 &lt;&lt; 7)</div><div class='add'>+#define SPEAR310_UART1_IRQ_MASK		(1 &lt;&lt; 8)</div><div class='add'>+#define SPEAR310_UART2_IRQ_MASK		(1 &lt;&lt; 9)</div><div class='add'>+#define SPEAR310_UART3_IRQ_MASK		(1 &lt;&lt; 10)</div><div class='add'>+#define SPEAR310_UART4_IRQ_MASK		(1 &lt;&lt; 11)</div><div class='add'>+#define SPEAR310_UART5_IRQ_MASK		(1 &lt;&lt; 12)</div><div class='add'>+#define SPEAR310_EMI_IRQ_MASK		(1 &lt;&lt; 13)</div><div class='add'>+#define SPEAR310_TDM_HDLC_IRQ_MASK	(1 &lt;&lt; 14)</div><div class='add'>+#define SPEAR310_RS485_0_IRQ_MASK	(1 &lt;&lt; 15)</div><div class='add'>+#define SPEAR310_RS485_1_IRQ_MASK	(1 &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+#define SPEAR310_SHIRQ_RAS1_MASK	0x000FF</div><div class='add'>+#define SPEAR310_SHIRQ_RAS2_MASK	0x01F00</div><div class='add'>+#define SPEAR310_SHIRQ_RAS3_MASK	0x02000</div><div class='add'>+#define SPEAR310_SHIRQ_INTRCOMM_RAS_MASK	0x1C000</div><div class='add'>+</div><div class='add'>+/* SPEAr310 Virtual irq definitions */</div><div class='add'>+/* IRQs sharing IRQ_GEN_RAS_1 */</div><div class='add'>+#define SPEAR310_VIRQ_SMII0			(SPEAR3XX_VIRQ_START + 0)</div><div class='add'>+#define SPEAR310_VIRQ_SMII1			(SPEAR3XX_VIRQ_START + 1)</div><div class='add'>+#define SPEAR310_VIRQ_SMII2			(SPEAR3XX_VIRQ_START + 2)</div><div class='add'>+#define SPEAR310_VIRQ_SMII3			(SPEAR3XX_VIRQ_START + 3)</div><div class='add'>+#define SPEAR310_VIRQ_WAKEUP_SMII0		(SPEAR3XX_VIRQ_START + 4)</div><div class='add'>+#define SPEAR310_VIRQ_WAKEUP_SMII1		(SPEAR3XX_VIRQ_START + 5)</div><div class='add'>+#define SPEAR310_VIRQ_WAKEUP_SMII2		(SPEAR3XX_VIRQ_START + 6)</div><div class='add'>+#define SPEAR310_VIRQ_WAKEUP_SMII3		(SPEAR3XX_VIRQ_START + 7)</div><div class='add'>+</div><div class='add'>+/* IRQs sharing IRQ_GEN_RAS_2 */</div><div class='add'>+#define SPEAR310_VIRQ_UART1			(SPEAR3XX_VIRQ_START + 8)</div><div class='add'>+#define SPEAR310_VIRQ_UART2			(SPEAR3XX_VIRQ_START + 9)</div><div class='add'>+#define SPEAR310_VIRQ_UART3			(SPEAR3XX_VIRQ_START + 10)</div><div class='add'>+#define SPEAR310_VIRQ_UART4			(SPEAR3XX_VIRQ_START + 11)</div><div class='add'>+#define SPEAR310_VIRQ_UART5			(SPEAR3XX_VIRQ_START + 12)</div><div class='add'>+</div><div class='add'>+/* IRQs sharing IRQ_GEN_RAS_3 */</div><div class='add'>+#define SPEAR310_VIRQ_EMI			(SPEAR3XX_VIRQ_START + 13)</div><div class='add'>+#define SPEAR310_VIRQ_PLGPIO			(SPEAR3XX_VIRQ_START + 14)</div><div class='add'>+</div><div class='add'>+/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */</div><div class='add'>+#define SPEAR310_VIRQ_TDM_HDLC			(SPEAR3XX_VIRQ_START + 15)</div><div class='add'>+#define SPEAR310_VIRQ_RS485_0			(SPEAR3XX_VIRQ_START + 16)</div><div class='add'>+#define SPEAR310_VIRQ_RS485_1			(SPEAR3XX_VIRQ_START + 17)</div><div class='ctx'> </div><div class='del'>-/* pmx driver structure */</div><div class='del'>-static struct pmx_driver pmx_driver = {</div><div class='del'>-	.mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},</div><div class='del'>-};</div><div class='ctx'> </div><div class='ctx'> /* spear3xx shared irq */</div><div class='ctx'> static struct shirq_dev_config shirq_ras1_config[] = {</div><div class='hunk'>@@ -255,17 +198,247 @@ static struct spear_shirq shirq_intrcomm_ras = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Add spear310 specific devices here */</div><div class='add'>+/* DMAC platform data's slave info */</div><div class='add'>+struct pl08x_channel_data spear310_dma_info[] = {</div><div class='add'>+	{</div><div class='add'>+		.bus_id = "uart0_rx",</div><div class='add'>+		.min_signal = 2,</div><div class='add'>+		.max_signal = 2,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart0_tx",</div><div class='add'>+		.min_signal = 3,</div><div class='add'>+		.max_signal = 3,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp0_rx",</div><div class='add'>+		.min_signal = 8,</div><div class='add'>+		.max_signal = 8,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp0_tx",</div><div class='add'>+		.min_signal = 9,</div><div class='add'>+		.max_signal = 9,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2c_rx",</div><div class='add'>+		.min_signal = 10,</div><div class='add'>+		.max_signal = 10,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2c_tx",</div><div class='add'>+		.min_signal = 11,</div><div class='add'>+		.max_signal = 11,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "irda",</div><div class='add'>+		.min_signal = 12,</div><div class='add'>+		.max_signal = 12,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "adc",</div><div class='add'>+		.min_signal = 13,</div><div class='add'>+		.max_signal = 13,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "to_jpeg",</div><div class='add'>+		.min_signal = 14,</div><div class='add'>+		.max_signal = 14,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "from_jpeg",</div><div class='add'>+		.min_signal = 15,</div><div class='add'>+		.max_signal = 15,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart1_rx",</div><div class='add'>+		.min_signal = 0,</div><div class='add'>+		.max_signal = 0,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart1_tx",</div><div class='add'>+		.min_signal = 1,</div><div class='add'>+		.max_signal = 1,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart2_rx",</div><div class='add'>+		.min_signal = 2,</div><div class='add'>+		.max_signal = 2,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart2_tx",</div><div class='add'>+		.min_signal = 3,</div><div class='add'>+		.max_signal = 3,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart3_rx",</div><div class='add'>+		.min_signal = 4,</div><div class='add'>+		.max_signal = 4,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart3_tx",</div><div class='add'>+		.min_signal = 5,</div><div class='add'>+		.max_signal = 5,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart4_rx",</div><div class='add'>+		.min_signal = 6,</div><div class='add'>+		.max_signal = 6,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart4_tx",</div><div class='add'>+		.min_signal = 7,</div><div class='add'>+		.max_signal = 7,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart5_rx",</div><div class='add'>+		.min_signal = 8,</div><div class='add'>+		.max_signal = 8,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart5_tx",</div><div class='add'>+		.min_signal = 9,</div><div class='add'>+		.max_signal = 9,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras5_rx",</div><div class='add'>+		.min_signal = 10,</div><div class='add'>+		.max_signal = 10,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras5_tx",</div><div class='add'>+		.min_signal = 11,</div><div class='add'>+		.max_signal = 11,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras6_rx",</div><div class='add'>+		.min_signal = 12,</div><div class='add'>+		.max_signal = 12,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras6_tx",</div><div class='add'>+		.min_signal = 13,</div><div class='add'>+		.max_signal = 13,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras7_rx",</div><div class='add'>+		.min_signal = 14,</div><div class='add'>+		.max_signal = 14,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras7_tx",</div><div class='add'>+		.min_signal = 15,</div><div class='add'>+		.max_signal = 15,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* spear310 routines */</div><div class='del'>-void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,</div><div class='del'>-		u8 pmx_dev_count)</div><div class='add'>+/* uart devices plat data */</div><div class='add'>+static struct amba_pl011_data spear310_uart_data[] = {</div><div class='add'>+	{</div><div class='add'>+		.dma_filter = pl08x_filter_id,</div><div class='add'>+		.dma_tx_param = "uart1_tx",</div><div class='add'>+		.dma_rx_param = "uart1_rx",</div><div class='add'>+	}, {</div><div class='add'>+		.dma_filter = pl08x_filter_id,</div><div class='add'>+		.dma_tx_param = "uart2_tx",</div><div class='add'>+		.dma_rx_param = "uart2_rx",</div><div class='add'>+	}, {</div><div class='add'>+		.dma_filter = pl08x_filter_id,</div><div class='add'>+		.dma_tx_param = "uart3_tx",</div><div class='add'>+		.dma_rx_param = "uart3_rx",</div><div class='add'>+	}, {</div><div class='add'>+		.dma_filter = pl08x_filter_id,</div><div class='add'>+		.dma_tx_param = "uart4_tx",</div><div class='add'>+		.dma_rx_param = "uart4_rx",</div><div class='add'>+	}, {</div><div class='add'>+		.dma_filter = pl08x_filter_id,</div><div class='add'>+		.dma_tx_param = "uart5_tx",</div><div class='add'>+		.dma_rx_param = "uart5_rx",</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Add SPEAr310 auxdata to pass platform data */</div><div class='add'>+static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = {</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,</div><div class='add'>+			&amp;pl022_plat_data),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,</div><div class='add'>+			&amp;pl080_plat_data),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL,</div><div class='add'>+			&amp;spear310_uart_data[0]),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART2_BASE, NULL,</div><div class='add'>+			&amp;spear310_uart_data[1]),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART3_BASE, NULL,</div><div class='add'>+			&amp;spear310_uart_data[2]),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART4_BASE, NULL,</div><div class='add'>+			&amp;spear310_uart_data[3]),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART5_BASE, NULL,</div><div class='add'>+			&amp;spear310_uart_data[4]),</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init spear310_dt_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *base;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	/* call spear3xx family common init function */</div><div class='del'>-	spear3xx_init();</div><div class='add'>+	pl080_plat_data.slave_channels = spear310_dma_info;</div><div class='add'>+	pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear310_dma_info);</div><div class='add'>+</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='add'>+			spear310_auxdata_lookup, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* shared irq registration */</div><div class='ctx'> 	base = ioremap(SPEAR310_SOC_CONFIG_BASE, SZ_4K);</div><div class='hunk'>@@ -274,35 +447,45 @@ void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,</div><div class='ctx'> 		shirq_ras1.regs.base = base;</div><div class='ctx'> 		ret = spear_shirq_register(&amp;shirq_ras1);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			printk(KERN_ERR "Error registering Shared IRQ 1\n");</div><div class='add'>+			pr_err("Error registering Shared IRQ 1\n");</div><div class='ctx'> </div><div class='ctx'> 		/* shirq 2 */</div><div class='ctx'> 		shirq_ras2.regs.base = base;</div><div class='ctx'> 		ret = spear_shirq_register(&amp;shirq_ras2);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			printk(KERN_ERR "Error registering Shared IRQ 2\n");</div><div class='add'>+			pr_err("Error registering Shared IRQ 2\n");</div><div class='ctx'> </div><div class='ctx'> 		/* shirq 3 */</div><div class='ctx'> 		shirq_ras3.regs.base = base;</div><div class='ctx'> 		ret = spear_shirq_register(&amp;shirq_ras3);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			printk(KERN_ERR "Error registering Shared IRQ 3\n");</div><div class='add'>+			pr_err("Error registering Shared IRQ 3\n");</div><div class='ctx'> </div><div class='ctx'> 		/* shirq 4 */</div><div class='ctx'> 		shirq_intrcomm_ras.regs.base = base;</div><div class='ctx'> 		ret = spear_shirq_register(&amp;shirq_intrcomm_ras);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			printk(KERN_ERR "Error registering Shared IRQ 4\n");</div><div class='add'>+			pr_err("Error registering Shared IRQ 4\n");</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* pmx initialization */</div><div class='del'>-	pmx_driver.base = base;</div><div class='del'>-	pmx_driver.mode = pmx_mode;</div><div class='del'>-	pmx_driver.devs = pmx_devs;</div><div class='del'>-	pmx_driver.devs_count = pmx_dev_count;</div><div class='add'>+static const char * const spear310_dt_board_compat[] = {</div><div class='add'>+	"st,spear310",</div><div class='add'>+	"st,spear310-evb",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ret = pmx_register(&amp;pmx_driver);</div><div class='del'>-	if (ret)</div><div class='del'>-		printk(KERN_ERR "padmux: registration failed. err no: %d\n",</div><div class='del'>-				ret);</div><div class='add'>+static void __init spear310_map_io(void)</div><div class='add'>+{</div><div class='add'>+	spear3xx_map_io();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree")</div><div class='add'>+	.map_io		=	spear310_map_io,</div><div class='add'>+	.init_irq	=	spear3xx_dt_init_irq,</div><div class='add'>+	.handle_irq	=	vic_handle_irq,</div><div class='add'>+	.timer		=	&amp;spear3xx_timer,</div><div class='add'>+	.init_machine	=	spear310_dt_init,</div><div class='add'>+	.restart	=	spear_restart,</div><div class='add'>+	.dt_compat	=	spear310_dt_board_compat,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c<br/>deleted file mode 100644<br/>index f92c4993f65a..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/spear310_evb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/spear310_evb.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,81 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-spear3xx/spear310_evb.c</div><div class='del'>- *</div><div class='del'>- * SPEAr310 evaluation board source file</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hardware/vic.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;mach/generic.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-/* padmux devices to enable */</div><div class='del'>-static struct pmx_dev *pmx_devs[] = {</div><div class='del'>-	/* spear3xx specific devices */</div><div class='del'>-	&amp;spear3xx_pmx_i2c,</div><div class='del'>-	&amp;spear3xx_pmx_ssp,</div><div class='del'>-	&amp;spear3xx_pmx_gpio_pin0,</div><div class='del'>-	&amp;spear3xx_pmx_gpio_pin1,</div><div class='del'>-	&amp;spear3xx_pmx_gpio_pin2,</div><div class='del'>-	&amp;spear3xx_pmx_gpio_pin3,</div><div class='del'>-	&amp;spear3xx_pmx_gpio_pin4,</div><div class='del'>-	&amp;spear3xx_pmx_gpio_pin5,</div><div class='del'>-	&amp;spear3xx_pmx_uart0,</div><div class='del'>-</div><div class='del'>-	/* spear310 specific devices */</div><div class='del'>-	&amp;spear310_pmx_emi_cs_0_1_4_5,</div><div class='del'>-	&amp;spear310_pmx_emi_cs_2_3,</div><div class='del'>-	&amp;spear310_pmx_uart1,</div><div class='del'>-	&amp;spear310_pmx_uart2,</div><div class='del'>-	&amp;spear310_pmx_uart3_4_5,</div><div class='del'>-	&amp;spear310_pmx_fsmc,</div><div class='del'>-	&amp;spear310_pmx_rs485_0_1,</div><div class='del'>-	&amp;spear310_pmx_tdm0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct amba_device *amba_devs[] __initdata = {</div><div class='del'>-	/* spear3xx specific devices */</div><div class='del'>-	&amp;spear3xx_gpio_device,</div><div class='del'>-	&amp;spear3xx_uart_device,</div><div class='del'>-</div><div class='del'>-	/* spear310 specific devices */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *plat_devs[] __initdata = {</div><div class='del'>-	/* spear3xx specific devices */</div><div class='del'>-</div><div class='del'>-	/* spear310 specific devices */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init spear310_evb_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	/* call spear310 machine init function */</div><div class='del'>-	spear310_init(NULL, pmx_devs, ARRAY_SIZE(pmx_devs));</div><div class='del'>-</div><div class='del'>-	/* Add Platform Devices */</div><div class='del'>-	platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));</div><div class='del'>-</div><div class='del'>-	/* Add Amba Devices */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(amba_devs); i++)</div><div class='del'>-		amba_device_register(amba_devs[i], &amp;iomem_resource);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")</div><div class='del'>-	.atag_offset	=	0x100,</div><div class='del'>-	.map_io		=	spear3xx_map_io,</div><div class='del'>-	.init_irq	=	spear3xx_init_irq,</div><div class='del'>-	.handle_irq	=	vic_handle_irq,</div><div class='del'>-	.timer		=	&amp;spear3xx_timer,</div><div class='del'>-	.init_machine	=	spear310_evb_init,</div><div class='del'>-	.restart	=	spear_restart,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c<br/>index deaaf199612c..a88fa841d29d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/spear320.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/spear320.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/spear320.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/spear320.c</a></div><div class='hunk'>@@ -3,386 +3,84 @@</div><div class='ctx'>  *</div><div class='ctx'>  * SPEAr320 machine source file</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='add'>+ * Copyright (C) 2009-2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='ctx'>  * warranty of any kind, whether express or implied.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='add'>+#define pr_fmt(fmt) "SPEAr320: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/amba/pl022.h&gt;</div><div class='add'>+#include &lt;linux/amba/pl08x.h&gt;</div><div class='add'>+#include &lt;linux/amba/serial.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;asm/hardware/vic.h&gt;</div><div class='add'>+#include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;plat/shirq.h&gt;</div><div class='ctx'> #include &lt;mach/generic.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-/* pad multiplexing support */</div><div class='del'>-/* muxing registers */</div><div class='del'>-#define PAD_MUX_CONFIG_REG	0x0C</div><div class='del'>-#define MODE_CONFIG_REG		0x10</div><div class='del'>-</div><div class='del'>-/* modes */</div><div class='del'>-#define AUTO_NET_SMII_MODE	(1 &lt;&lt; 0)</div><div class='del'>-#define AUTO_NET_MII_MODE	(1 &lt;&lt; 1)</div><div class='del'>-#define AUTO_EXP_MODE		(1 &lt;&lt; 2)</div><div class='del'>-#define SMALL_PRINTERS_MODE	(1 &lt;&lt; 3)</div><div class='del'>-#define ALL_MODES		0xF</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear320_auto_net_smii_mode = {</div><div class='del'>-	.id = AUTO_NET_SMII_MODE,</div><div class='del'>-	.name = "Automation Networking SMII Mode",</div><div class='del'>-	.mask = 0x00,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear320_auto_net_mii_mode = {</div><div class='del'>-	.id = AUTO_NET_MII_MODE,</div><div class='del'>-	.name = "Automation Networking MII Mode",</div><div class='del'>-	.mask = 0x01,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear320_auto_exp_mode = {</div><div class='del'>-	.id = AUTO_EXP_MODE,</div><div class='del'>-	.name = "Automation Expanded Mode",</div><div class='del'>-	.mask = 0x02,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_mode spear320_small_printers_mode = {</div><div class='del'>-	.id = SMALL_PRINTERS_MODE,</div><div class='del'>-	.name = "Small Printers Mode",</div><div class='del'>-	.mask = 0x03,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* devices */</div><div class='del'>-static struct pmx_dev_mode pmx_clcd_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_SMII_MODE,</div><div class='del'>-		.mask = 0x0,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_clcd = {</div><div class='del'>-	.name = "clcd",</div><div class='del'>-	.modes = pmx_clcd_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_clcd_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_emi_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_EXP_MODE,</div><div class='del'>-		.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_emi = {</div><div class='del'>-	.name = "emi",</div><div class='del'>-	.modes = pmx_emi_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_emi_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_fsmc_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = ALL_MODES,</div><div class='del'>-		.mask = 0x0,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_fsmc = {</div><div class='del'>-	.name = "fsmc",</div><div class='del'>-	.modes = pmx_fsmc_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_fsmc_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_spp_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = SMALL_PRINTERS_MODE,</div><div class='del'>-		.mask = 0x0,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_spp = {</div><div class='del'>-	.name = "spp",</div><div class='del'>-	.modes = pmx_spp_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_spp_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_sdhci_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE |</div><div class='del'>-			SMALL_PRINTERS_MODE,</div><div class='del'>-		.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_sdhci = {</div><div class='del'>-	.name = "sdhci",</div><div class='del'>-	.modes = pmx_sdhci_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_sdhci_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_i2s_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,</div><div class='del'>-		.mask = PMX_UART0_MODEM_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_i2s = {</div><div class='del'>-	.name = "i2s",</div><div class='del'>-	.modes = pmx_i2s_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_i2s_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_uart1_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = ALL_MODES,</div><div class='del'>-		.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_uart1 = {</div><div class='del'>-	.name = "uart1",</div><div class='del'>-	.modes = pmx_uart1_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_uart1_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_uart1_modem_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_EXP_MODE,</div><div class='del'>-		.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK |</div><div class='del'>-			PMX_SSP_CS_MASK,</div><div class='del'>-	}, {</div><div class='del'>-		.ids = SMALL_PRINTERS_MODE,</div><div class='del'>-		.mask = PMX_GPIO_PIN3_MASK | PMX_GPIO_PIN4_MASK |</div><div class='del'>-			PMX_GPIO_PIN5_MASK | PMX_SSP_CS_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_uart1_modem = {</div><div class='del'>-	.name = "uart1_modem",</div><div class='del'>-	.modes = pmx_uart1_modem_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_uart1_modem_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_uart2_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = ALL_MODES,</div><div class='del'>-		.mask = PMX_FIRDA_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_uart2 = {</div><div class='del'>-	.name = "uart2",</div><div class='del'>-	.modes = pmx_uart2_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_uart2_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_touchscreen_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_SMII_MODE,</div><div class='del'>-		.mask = PMX_SSP_CS_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_touchscreen = {</div><div class='del'>-	.name = "touchscreen",</div><div class='del'>-	.modes = pmx_touchscreen_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_touchscreen_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_can_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE,</div><div class='del'>-		.mask = PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |</div><div class='del'>-			PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_can = {</div><div class='del'>-	.name = "can",</div><div class='del'>-	.modes = pmx_can_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_can_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_sdhci_led_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,</div><div class='del'>-		.mask = PMX_SSP_CS_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_sdhci_led = {</div><div class='del'>-	.name = "sdhci_led",</div><div class='del'>-	.modes = pmx_sdhci_led_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_sdhci_led_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_pwm0_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,</div><div class='del'>-		.mask = PMX_UART0_MODEM_MASK,</div><div class='del'>-	}, {</div><div class='del'>-		.ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_pwm0 = {</div><div class='del'>-	.name = "pwm0",</div><div class='del'>-	.modes = pmx_pwm0_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_pwm0_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_pwm1_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,</div><div class='del'>-		.mask = PMX_UART0_MODEM_MASK,</div><div class='del'>-	}, {</div><div class='del'>-		.ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_pwm1 = {</div><div class='del'>-	.name = "pwm1",</div><div class='del'>-	.modes = pmx_pwm1_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_pwm1_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_pwm2_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,</div><div class='del'>-		.mask = PMX_SSP_CS_MASK,</div><div class='del'>-	}, {</div><div class='del'>-		.ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_pwm2 = {</div><div class='del'>-	.name = "pwm2",</div><div class='del'>-	.modes = pmx_pwm2_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_pwm2_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_pwm3_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_pwm3 = {</div><div class='del'>-	.name = "pwm3",</div><div class='del'>-	.modes = pmx_pwm3_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_pwm3_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_ssp1_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_ssp1 = {</div><div class='del'>-	.name = "ssp1",</div><div class='del'>-	.modes = pmx_ssp1_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_ssp1_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_ssp2_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_SMII_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_ssp2 = {</div><div class='del'>-	.name = "ssp2",</div><div class='del'>-	.modes = pmx_ssp2_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_ssp2_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_mii1_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_MII_MODE,</div><div class='del'>-		.mask = 0x0,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_mii1 = {</div><div class='del'>-	.name = "mii1",</div><div class='del'>-	.modes = pmx_mii1_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_mii1_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_smii0_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_SMII_MODE | AUTO_EXP_MODE | SMALL_PRINTERS_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_smii0 = {</div><div class='del'>-	.name = "smii0",</div><div class='del'>-	.modes = pmx_smii0_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_smii0_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_smii1_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_NET_SMII_MODE | SMALL_PRINTERS_MODE,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_smii1 = {</div><div class='del'>-	.name = "smii1",</div><div class='del'>-	.modes = pmx_smii1_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_smii1_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_i2c1_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = AUTO_EXP_MODE,</div><div class='del'>-		.mask = 0x0,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear320_pmx_i2c1 = {</div><div class='del'>-	.name = "i2c1",</div><div class='del'>-	.modes = pmx_i2c1_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_i2c1_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* pmx driver structure */</div><div class='del'>-static struct pmx_driver pmx_driver = {</div><div class='del'>-	.mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x00000007},</div><div class='del'>-	.mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},</div><div class='del'>-};</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='add'>+</div><div class='add'>+#define SPEAR320_UART1_BASE		UL(0xA3000000)</div><div class='add'>+#define SPEAR320_UART2_BASE		UL(0xA4000000)</div><div class='add'>+#define SPEAR320_SSP0_BASE		UL(0xA5000000)</div><div class='add'>+#define SPEAR320_SSP1_BASE		UL(0xA6000000)</div><div class='add'>+</div><div class='add'>+/* Interrupt registers offsets and masks */</div><div class='add'>+#define SPEAR320_INT_STS_MASK_REG		0x04</div><div class='add'>+#define SPEAR320_INT_CLR_MASK_REG		0x04</div><div class='add'>+#define SPEAR320_INT_ENB_MASK_REG		0x08</div><div class='add'>+#define SPEAR320_GPIO_IRQ_MASK			(1 &lt;&lt; 0)</div><div class='add'>+#define SPEAR320_I2S_PLAY_IRQ_MASK		(1 &lt;&lt; 1)</div><div class='add'>+#define SPEAR320_I2S_REC_IRQ_MASK		(1 &lt;&lt; 2)</div><div class='add'>+#define SPEAR320_EMI_IRQ_MASK			(1 &lt;&lt; 7)</div><div class='add'>+#define SPEAR320_CLCD_IRQ_MASK			(1 &lt;&lt; 8)</div><div class='add'>+#define SPEAR320_SPP_IRQ_MASK			(1 &lt;&lt; 9)</div><div class='add'>+#define SPEAR320_SDHCI_IRQ_MASK			(1 &lt;&lt; 10)</div><div class='add'>+#define SPEAR320_CAN_U_IRQ_MASK			(1 &lt;&lt; 11)</div><div class='add'>+#define SPEAR320_CAN_L_IRQ_MASK			(1 &lt;&lt; 12)</div><div class='add'>+#define SPEAR320_UART1_IRQ_MASK			(1 &lt;&lt; 13)</div><div class='add'>+#define SPEAR320_UART2_IRQ_MASK			(1 &lt;&lt; 14)</div><div class='add'>+#define SPEAR320_SSP1_IRQ_MASK			(1 &lt;&lt; 15)</div><div class='add'>+#define SPEAR320_SSP2_IRQ_MASK			(1 &lt;&lt; 16)</div><div class='add'>+#define SPEAR320_SMII0_IRQ_MASK			(1 &lt;&lt; 17)</div><div class='add'>+#define SPEAR320_MII1_SMII1_IRQ_MASK		(1 &lt;&lt; 18)</div><div class='add'>+#define SPEAR320_WAKEUP_SMII0_IRQ_MASK		(1 &lt;&lt; 19)</div><div class='add'>+#define SPEAR320_WAKEUP_MII1_SMII1_IRQ_MASK	(1 &lt;&lt; 20)</div><div class='add'>+#define SPEAR320_I2C1_IRQ_MASK			(1 &lt;&lt; 21)</div><div class='add'>+</div><div class='add'>+#define SPEAR320_SHIRQ_RAS1_MASK		0x000380</div><div class='add'>+#define SPEAR320_SHIRQ_RAS3_MASK		0x000007</div><div class='add'>+#define SPEAR320_SHIRQ_INTRCOMM_RAS_MASK	0x3FF800</div><div class='add'>+</div><div class='add'>+/* SPEAr320 Virtual irq definitions */</div><div class='add'>+/* IRQs sharing IRQ_GEN_RAS_1 */</div><div class='add'>+#define SPEAR320_VIRQ_EMI			(SPEAR3XX_VIRQ_START + 0)</div><div class='add'>+#define SPEAR320_VIRQ_CLCD			(SPEAR3XX_VIRQ_START + 1)</div><div class='add'>+#define SPEAR320_VIRQ_SPP			(SPEAR3XX_VIRQ_START + 2)</div><div class='add'>+</div><div class='add'>+/* IRQs sharing IRQ_GEN_RAS_2 */</div><div class='add'>+#define SPEAR320_IRQ_SDHCI			SPEAR3XX_IRQ_GEN_RAS_2</div><div class='add'>+</div><div class='add'>+/* IRQs sharing IRQ_GEN_RAS_3 */</div><div class='add'>+#define SPEAR320_VIRQ_PLGPIO			(SPEAR3XX_VIRQ_START + 3)</div><div class='add'>+#define SPEAR320_VIRQ_I2S_PLAY			(SPEAR3XX_VIRQ_START + 4)</div><div class='add'>+#define SPEAR320_VIRQ_I2S_REC			(SPEAR3XX_VIRQ_START + 5)</div><div class='add'>+</div><div class='add'>+/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */</div><div class='add'>+#define SPEAR320_VIRQ_CANU			(SPEAR3XX_VIRQ_START + 6)</div><div class='add'>+#define SPEAR320_VIRQ_CANL			(SPEAR3XX_VIRQ_START + 7)</div><div class='add'>+#define SPEAR320_VIRQ_UART1			(SPEAR3XX_VIRQ_START + 8)</div><div class='add'>+#define SPEAR320_VIRQ_UART2			(SPEAR3XX_VIRQ_START + 9)</div><div class='add'>+#define SPEAR320_VIRQ_SSP1			(SPEAR3XX_VIRQ_START + 10)</div><div class='add'>+#define SPEAR320_VIRQ_SSP2			(SPEAR3XX_VIRQ_START + 11)</div><div class='add'>+#define SPEAR320_VIRQ_SMII0			(SPEAR3XX_VIRQ_START + 12)</div><div class='add'>+#define SPEAR320_VIRQ_MII1_SMII1		(SPEAR3XX_VIRQ_START + 13)</div><div class='add'>+#define SPEAR320_VIRQ_WAKEUP_SMII0		(SPEAR3XX_VIRQ_START + 14)</div><div class='add'>+#define SPEAR320_VIRQ_WAKEUP_MII1_SMII1		(SPEAR3XX_VIRQ_START + 15)</div><div class='add'>+#define SPEAR320_VIRQ_I2C1			(SPEAR3XX_VIRQ_START + 16)</div><div class='ctx'> </div><div class='ctx'> /* spear3xx shared irq */</div><div class='ctx'> static struct shirq_dev_config shirq_ras1_config[] = {</div><div class='hunk'>@@ -508,17 +206,250 @@ static struct spear_shirq shirq_intrcomm_ras = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Add spear320 specific devices here */</div><div class='add'>+/* DMAC platform data's slave info */</div><div class='add'>+struct pl08x_channel_data spear320_dma_info[] = {</div><div class='add'>+	{</div><div class='add'>+		.bus_id = "uart0_rx",</div><div class='add'>+		.min_signal = 2,</div><div class='add'>+		.max_signal = 2,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart0_tx",</div><div class='add'>+		.min_signal = 3,</div><div class='add'>+		.max_signal = 3,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp0_rx",</div><div class='add'>+		.min_signal = 8,</div><div class='add'>+		.max_signal = 8,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp0_tx",</div><div class='add'>+		.min_signal = 9,</div><div class='add'>+		.max_signal = 9,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2c0_rx",</div><div class='add'>+		.min_signal = 10,</div><div class='add'>+		.max_signal = 10,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2c0_tx",</div><div class='add'>+		.min_signal = 11,</div><div class='add'>+		.max_signal = 11,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "irda",</div><div class='add'>+		.min_signal = 12,</div><div class='add'>+		.max_signal = 12,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "adc",</div><div class='add'>+		.min_signal = 13,</div><div class='add'>+		.max_signal = 13,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "to_jpeg",</div><div class='add'>+		.min_signal = 14,</div><div class='add'>+		.max_signal = 14,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "from_jpeg",</div><div class='add'>+		.min_signal = 15,</div><div class='add'>+		.max_signal = 15,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp1_rx",</div><div class='add'>+		.min_signal = 0,</div><div class='add'>+		.max_signal = 0,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp1_tx",</div><div class='add'>+		.min_signal = 1,</div><div class='add'>+		.max_signal = 1,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp2_rx",</div><div class='add'>+		.min_signal = 2,</div><div class='add'>+		.max_signal = 2,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp2_tx",</div><div class='add'>+		.min_signal = 3,</div><div class='add'>+		.max_signal = 3,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart1_rx",</div><div class='add'>+		.min_signal = 4,</div><div class='add'>+		.max_signal = 4,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart1_tx",</div><div class='add'>+		.min_signal = 5,</div><div class='add'>+		.max_signal = 5,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart2_rx",</div><div class='add'>+		.min_signal = 6,</div><div class='add'>+		.max_signal = 6,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart2_tx",</div><div class='add'>+		.min_signal = 7,</div><div class='add'>+		.max_signal = 7,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2c1_rx",</div><div class='add'>+		.min_signal = 8,</div><div class='add'>+		.max_signal = 8,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2c1_tx",</div><div class='add'>+		.min_signal = 9,</div><div class='add'>+		.max_signal = 9,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2c2_rx",</div><div class='add'>+		.min_signal = 10,</div><div class='add'>+		.max_signal = 10,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2c2_tx",</div><div class='add'>+		.min_signal = 11,</div><div class='add'>+		.max_signal = 11,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2s_rx",</div><div class='add'>+		.min_signal = 12,</div><div class='add'>+		.max_signal = 12,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2s_tx",</div><div class='add'>+		.min_signal = 13,</div><div class='add'>+		.max_signal = 13,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "rs485_rx",</div><div class='add'>+		.min_signal = 14,</div><div class='add'>+		.max_signal = 14,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "rs485_tx",</div><div class='add'>+		.min_signal = 15,</div><div class='add'>+		.max_signal = 15,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pl022_ssp_controller spear320_ssp_data[] = {</div><div class='add'>+	{</div><div class='add'>+		.bus_id = 1,</div><div class='add'>+		.enable_dma = 1,</div><div class='add'>+		.dma_filter = pl08x_filter_id,</div><div class='add'>+		.dma_tx_param = "ssp1_tx",</div><div class='add'>+		.dma_rx_param = "ssp1_rx",</div><div class='add'>+		.num_chipselect = 2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = 2,</div><div class='add'>+		.enable_dma = 1,</div><div class='add'>+		.dma_filter = pl08x_filter_id,</div><div class='add'>+		.dma_tx_param = "ssp2_tx",</div><div class='add'>+		.dma_rx_param = "ssp2_rx",</div><div class='add'>+		.num_chipselect = 2,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct amba_pl011_data spear320_uart_data[] = {</div><div class='add'>+	{</div><div class='add'>+		.dma_filter = pl08x_filter_id,</div><div class='add'>+		.dma_tx_param = "uart1_tx",</div><div class='add'>+		.dma_rx_param = "uart1_rx",</div><div class='add'>+	}, {</div><div class='add'>+		.dma_filter = pl08x_filter_id,</div><div class='add'>+		.dma_tx_param = "uart2_tx",</div><div class='add'>+		.dma_rx_param = "uart2_rx",</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* spear320 routines */</div><div class='del'>-void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,</div><div class='del'>-		u8 pmx_dev_count)</div><div class='add'>+/* Add SPEAr310 auxdata to pass platform data */</div><div class='add'>+static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = {</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,</div><div class='add'>+			&amp;pl022_plat_data),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,</div><div class='add'>+			&amp;pl080_plat_data),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL,</div><div class='add'>+			&amp;spear320_ssp_data[0]),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP1_BASE, NULL,</div><div class='add'>+			&amp;spear320_ssp_data[1]),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART1_BASE, NULL,</div><div class='add'>+			&amp;spear320_uart_data[0]),</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART2_BASE, NULL,</div><div class='add'>+			&amp;spear320_uart_data[1]),</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init spear320_dt_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *base;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	/* call spear3xx family common init function */</div><div class='del'>-	spear3xx_init();</div><div class='add'>+	pl080_plat_data.slave_channels = spear320_dma_info;</div><div class='add'>+	pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear320_dma_info);</div><div class='add'>+</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='add'>+			spear320_auxdata_lookup, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* shared irq registration */</div><div class='ctx'> 	base = ioremap(SPEAR320_SOC_CONFIG_BASE, SZ_4K);</div><div class='hunk'>@@ -527,29 +458,49 @@ void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,</div><div class='ctx'> 		shirq_ras1.regs.base = base;</div><div class='ctx'> 		ret = spear_shirq_register(&amp;shirq_ras1);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			printk(KERN_ERR "Error registering Shared IRQ 1\n");</div><div class='add'>+			pr_err("Error registering Shared IRQ 1\n");</div><div class='ctx'> </div><div class='ctx'> 		/* shirq 3 */</div><div class='ctx'> 		shirq_ras3.regs.base = base;</div><div class='ctx'> 		ret = spear_shirq_register(&amp;shirq_ras3);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			printk(KERN_ERR "Error registering Shared IRQ 3\n");</div><div class='add'>+			pr_err("Error registering Shared IRQ 3\n");</div><div class='ctx'> </div><div class='ctx'> 		/* shirq 4 */</div><div class='ctx'> 		shirq_intrcomm_ras.regs.base = base;</div><div class='ctx'> 		ret = spear_shirq_register(&amp;shirq_intrcomm_ras);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			printk(KERN_ERR "Error registering Shared IRQ 4\n");</div><div class='add'>+			pr_err("Error registering Shared IRQ 4\n");</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const spear320_dt_board_compat[] = {</div><div class='add'>+	"st,spear320",</div><div class='add'>+	"st,spear320-evb",</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* pmx initialization */</div><div class='del'>-	pmx_driver.base = base;</div><div class='del'>-	pmx_driver.mode = pmx_mode;</div><div class='del'>-	pmx_driver.devs = pmx_devs;</div><div class='del'>-	pmx_driver.devs_count = pmx_dev_count;</div><div class='add'>+struct map_desc spear320_io_desc[] __initdata = {</div><div class='add'>+	{</div><div class='add'>+		.virtual	= VA_SPEAR320_SOC_CONFIG_BASE,</div><div class='add'>+		.pfn		= __phys_to_pfn(SPEAR320_SOC_CONFIG_BASE),</div><div class='add'>+		.length		= SZ_16M,</div><div class='add'>+		.type		= MT_DEVICE</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ret = pmx_register(&amp;pmx_driver);</div><div class='del'>-	if (ret)</div><div class='del'>-		printk(KERN_ERR "padmux: registration failed. err no: %d\n",</div><div class='del'>-				ret);</div><div class='add'>+static void __init spear320_map_io(void)</div><div class='add'>+{</div><div class='add'>+	iotable_init(spear320_io_desc, ARRAY_SIZE(spear320_io_desc));</div><div class='add'>+	spear3xx_map_io();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree")</div><div class='add'>+	.map_io		=	spear320_map_io,</div><div class='add'>+	.init_irq	=	spear3xx_dt_init_irq,</div><div class='add'>+	.handle_irq	=	vic_handle_irq,</div><div class='add'>+	.timer		=	&amp;spear3xx_timer,</div><div class='add'>+	.init_machine	=	spear320_dt_init,</div><div class='add'>+	.restart	=	spear_restart,</div><div class='add'>+	.dt_compat	=	spear320_dt_board_compat,</div><div class='add'>+MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c<br/>deleted file mode 100644<br/>index 105334ab7021..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/spear320_evb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/spear320_evb.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,79 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-spear3xx/spear320_evb.c</div><div class='del'>- *</div><div class='del'>- * SPEAr320 evaluation board source file</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hardware/vic.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;mach/generic.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-/* padmux devices to enable */</div><div class='del'>-static struct pmx_dev *pmx_devs[] = {</div><div class='del'>-	/* spear3xx specific devices */</div><div class='del'>-	&amp;spear3xx_pmx_i2c,</div><div class='del'>-	&amp;spear3xx_pmx_ssp,</div><div class='del'>-	&amp;spear3xx_pmx_mii,</div><div class='del'>-	&amp;spear3xx_pmx_uart0,</div><div class='del'>-</div><div class='del'>-	/* spear320 specific devices */</div><div class='del'>-	&amp;spear320_pmx_fsmc,</div><div class='del'>-	&amp;spear320_pmx_sdhci,</div><div class='del'>-	&amp;spear320_pmx_i2s,</div><div class='del'>-	&amp;spear320_pmx_uart1,</div><div class='del'>-	&amp;spear320_pmx_uart2,</div><div class='del'>-	&amp;spear320_pmx_can,</div><div class='del'>-	&amp;spear320_pmx_pwm0,</div><div class='del'>-	&amp;spear320_pmx_pwm1,</div><div class='del'>-	&amp;spear320_pmx_pwm2,</div><div class='del'>-	&amp;spear320_pmx_mii1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct amba_device *amba_devs[] __initdata = {</div><div class='del'>-	/* spear3xx specific devices */</div><div class='del'>-	&amp;spear3xx_gpio_device,</div><div class='del'>-	&amp;spear3xx_uart_device,</div><div class='del'>-</div><div class='del'>-	/* spear320 specific devices */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *plat_devs[] __initdata = {</div><div class='del'>-	/* spear3xx specific devices */</div><div class='del'>-</div><div class='del'>-	/* spear320 specific devices */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init spear320_evb_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	/* call spear320 machine init function */</div><div class='del'>-	spear320_init(&amp;spear320_auto_net_mii_mode, pmx_devs,</div><div class='del'>-			ARRAY_SIZE(pmx_devs));</div><div class='del'>-</div><div class='del'>-	/* Add Platform Devices */</div><div class='del'>-	platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));</div><div class='del'>-</div><div class='del'>-	/* Add Amba Devices */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(amba_devs); i++)</div><div class='del'>-		amba_device_register(amba_devs[i], &amp;iomem_resource);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")</div><div class='del'>-	.atag_offset	=	0x100,</div><div class='del'>-	.map_io		=	spear3xx_map_io,</div><div class='del'>-	.init_irq	=	spear3xx_init_irq,</div><div class='del'>-	.handle_irq	=	vic_handle_irq,</div><div class='del'>-	.timer		=	&amp;spear3xx_timer,</div><div class='del'>-	.init_machine	=	spear320_evb_init,</div><div class='del'>-	.restart	=	spear_restart,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c<br/>index b1733c37f209..f22419ed74a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/spear3xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear3xx/spear3xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear3xx/spear3xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear3xx/spear3xx.c</a></div><div class='hunk'>@@ -3,71 +3,78 @@</div><div class='ctx'>  *</div><div class='ctx'>  * SPEAr3XX machines common source file</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='add'>+ * Copyright (C) 2009-2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This file is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2. This program is licensed "as is" without any</div><div class='ctx'>  * warranty of any kind, whether express or implied.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/amba/pl061.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='add'>+#define pr_fmt(fmt) "SPEAr3xx: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/amba/pl022.h&gt;</div><div class='add'>+#include &lt;linux/amba/pl08x.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;asm/hardware/pl080.h&gt;</div><div class='ctx'> #include &lt;asm/hardware/vic.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;plat/pl080.h&gt;</div><div class='ctx'> #include &lt;mach/generic.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-/* Add spear3xx machines common devices here */</div><div class='del'>-/* gpio device registration */</div><div class='del'>-static struct pl061_platform_data gpio_plat_data = {</div><div class='del'>-	.gpio_base	= 0,</div><div class='del'>-	.irq_base	= SPEAR3XX_GPIO_INT_BASE,</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='add'>+</div><div class='add'>+/* ssp device registration */</div><div class='add'>+struct pl022_ssp_controller pl022_plat_data = {</div><div class='add'>+	.bus_id = 0,</div><div class='add'>+	.enable_dma = 1,</div><div class='add'>+	.dma_filter = pl08x_filter_id,</div><div class='add'>+	.dma_tx_param = "ssp0_tx",</div><div class='add'>+	.dma_rx_param = "ssp0_rx",</div><div class='add'>+	/*</div><div class='add'>+	 * This is number of spi devices that can be connected to spi. There are</div><div class='add'>+	 * two type of chipselects on which slave devices can work. One is chip</div><div class='add'>+	 * select provided by spi masters other is controlled through external</div><div class='add'>+	 * gpio's. We can't use chipselect provided from spi master (because as</div><div class='add'>+	 * soon as FIFO becomes empty, CS is disabled and transfer ends). So</div><div class='add'>+	 * this number now depends on number of gpios available for spi. each</div><div class='add'>+	 * slave on each master requires a separate gpio pin.</div><div class='add'>+	 */</div><div class='add'>+	.num_chipselect = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dmac device registration */</div><div class='add'>+struct pl08x_platform_data pl080_plat_data = {</div><div class='add'>+	.memcpy_channel = {</div><div class='add'>+		.bus_id = "memcpy",</div><div class='add'>+		.cctl = (PL080_BSIZE_16 &lt;&lt; PL080_CONTROL_SB_SIZE_SHIFT | \</div><div class='add'>+			PL080_BSIZE_16 &lt;&lt; PL080_CONTROL_DB_SIZE_SHIFT | \</div><div class='add'>+			PL080_WIDTH_32BIT &lt;&lt; PL080_CONTROL_SWIDTH_SHIFT | \</div><div class='add'>+			PL080_WIDTH_32BIT &lt;&lt; PL080_CONTROL_DWIDTH_SHIFT | \</div><div class='add'>+			PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE | \</div><div class='add'>+			PL080_CONTROL_PROT_SYS),</div><div class='add'>+	},</div><div class='add'>+	.lli_buses = PL08X_AHB1,</div><div class='add'>+	.mem_buses = PL08X_AHB1,</div><div class='add'>+	.get_signal = pl080_get_signal,</div><div class='add'>+	.put_signal = pl080_put_signal,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-AMBA_APB_DEVICE(spear3xx_gpio, "gpio", 0, SPEAR3XX_ICM3_GPIO_BASE,</div><div class='del'>-	{SPEAR3XX_IRQ_BASIC_GPIO}, &amp;gpio_plat_data);</div><div class='del'>-</div><div class='del'>-/* uart device registration */</div><div class='del'>-AMBA_APB_DEVICE(spear3xx_uart, "uart", 0, SPEAR3XX_ICM1_UART_BASE,</div><div class='del'>-	{SPEAR3XX_IRQ_UART}, NULL);</div><div class='del'>-</div><div class='del'>-/* Do spear3xx familiy common initialization part here */</div><div class='del'>-void __init spear3xx_init(void)</div><div class='del'>-{</div><div class='del'>-	/* nothing to do for now */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* This will initialize vic */</div><div class='del'>-void __init spear3xx_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	vic_init((void __iomem *)VA_SPEAR3XX_ML1_VIC_BASE, 0, ~0, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Following will create static virtual/physical mappings */</div><div class='add'>+/*</div><div class='add'>+ * Following will create 16MB static virtual/physical mappings</div><div class='add'>+ * PHYSICAL		VIRTUAL</div><div class='add'>+ * 0xD0000000		0xFD000000</div><div class='add'>+ * 0xFC000000		0xFC000000</div><div class='add'>+ */</div><div class='ctx'> struct map_desc spear3xx_io_desc[] __initdata = {</div><div class='ctx'> 	{</div><div class='del'>-		.virtual	= VA_SPEAR3XX_ICM1_UART_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(SPEAR3XX_ICM1_UART_BASE),</div><div class='del'>-		.length		= SZ_4K,</div><div class='del'>-		.type		= MT_DEVICE</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= VA_SPEAR3XX_ML1_VIC_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(SPEAR3XX_ML1_VIC_BASE),</div><div class='del'>-		.length		= SZ_4K,</div><div class='del'>-		.type		= MT_DEVICE</div><div class='del'>-	}, {</div><div class='del'>-		.virtual	= VA_SPEAR3XX_ICM3_SYS_CTRL_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(SPEAR3XX_ICM3_SYS_CTRL_BASE),</div><div class='del'>-		.length		= SZ_4K,</div><div class='add'>+		.virtual	= VA_SPEAR3XX_ICM1_2_BASE,</div><div class='add'>+		.pfn		= __phys_to_pfn(SPEAR3XX_ICM1_2_BASE),</div><div class='add'>+		.length		= SZ_16M,</div><div class='ctx'> 		.type		= MT_DEVICE</div><div class='ctx'> 	}, {</div><div class='del'>-		.virtual	= VA_SPEAR3XX_ICM3_MISC_REG_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(SPEAR3XX_ICM3_MISC_REG_BASE),</div><div class='del'>-		.length		= SZ_4K,</div><div class='add'>+		.virtual	= VA_SPEAR3XX_ICM3_SMI_CTRL_BASE,</div><div class='add'>+		.pfn		= __phys_to_pfn(SPEAR3XX_ICM3_SMI_CTRL_BASE),</div><div class='add'>+		.length		= SZ_16M,</div><div class='ctx'> 		.type		= MT_DEVICE</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -76,441 +83,15 @@ struct map_desc spear3xx_io_desc[] __initdata = {</div><div class='ctx'> void __init spear3xx_map_io(void)</div><div class='ctx'> {</div><div class='ctx'> 	iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc));</div><div class='del'>-</div><div class='del'>-	/* This will initialize clock framework */</div><div class='del'>-	spear3xx_clk_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* pad multiplexing support */</div><div class='del'>-/* devices */</div><div class='del'>-static struct pmx_dev_mode pmx_firda_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_FIRDA_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_firda = {</div><div class='del'>-	.name = "firda",</div><div class='del'>-	.modes = pmx_firda_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_firda_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_i2c_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_I2C_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_i2c = {</div><div class='del'>-	.name = "i2c",</div><div class='del'>-	.modes = pmx_i2c_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_i2c_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_ssp_cs_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_SSP_CS_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_ssp_cs = {</div><div class='del'>-	.name = "ssp_chip_selects",</div><div class='del'>-	.modes = pmx_ssp_cs_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_ssp_cs_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_ssp_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_SSP_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_ssp = {</div><div class='del'>-	.name = "ssp",</div><div class='del'>-	.modes = pmx_ssp_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_ssp_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_mii_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_mii = {</div><div class='del'>-	.name = "mii",</div><div class='del'>-	.modes = pmx_mii_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_mii_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_gpio_pin0_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_GPIO_PIN0_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_gpio_pin0 = {</div><div class='del'>-	.name = "gpio_pin0",</div><div class='del'>-	.modes = pmx_gpio_pin0_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_gpio_pin0_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_gpio_pin1_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_GPIO_PIN1_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_gpio_pin1 = {</div><div class='del'>-	.name = "gpio_pin1",</div><div class='del'>-	.modes = pmx_gpio_pin1_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_gpio_pin1_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_gpio_pin2_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_GPIO_PIN2_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_gpio_pin2 = {</div><div class='del'>-	.name = "gpio_pin2",</div><div class='del'>-	.modes = pmx_gpio_pin2_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_gpio_pin2_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_gpio_pin3_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_GPIO_PIN3_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_gpio_pin3 = {</div><div class='del'>-	.name = "gpio_pin3",</div><div class='del'>-	.modes = pmx_gpio_pin3_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_gpio_pin3_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_gpio_pin4_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_GPIO_PIN4_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_gpio_pin4 = {</div><div class='del'>-	.name = "gpio_pin4",</div><div class='del'>-	.modes = pmx_gpio_pin4_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_gpio_pin4_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_gpio_pin5_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_GPIO_PIN5_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_gpio_pin5 = {</div><div class='del'>-	.name = "gpio_pin5",</div><div class='del'>-	.modes = pmx_gpio_pin5_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_gpio_pin5_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_uart0_modem_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_UART0_MODEM_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_uart0_modem = {</div><div class='del'>-	.name = "uart0_modem",</div><div class='del'>-	.modes = pmx_uart0_modem_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_uart0_modem_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_uart0_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_UART0_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_uart0 = {</div><div class='del'>-	.name = "uart0",</div><div class='del'>-	.modes = pmx_uart0_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_uart0_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_timer_3_4_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_TIMER_3_4_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_timer_3_4 = {</div><div class='del'>-	.name = "timer_3_4",</div><div class='del'>-	.modes = pmx_timer_3_4_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_timer_3_4_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_timer_1_2_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0xffffffff,</div><div class='del'>-		.mask = PMX_TIMER_1_2_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_timer_1_2 = {</div><div class='del'>-	.name = "timer_1_2",</div><div class='del'>-	.modes = pmx_timer_1_2_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_timer_1_2_modes),</div><div class='del'>-	.enb_on_reset = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)</div><div class='del'>-/* plgpios devices */</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_0_1_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_FIRDA_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_0_1 = {</div><div class='del'>-	.name = "plgpio 0 and 1",</div><div class='del'>-	.modes = pmx_plgpio_0_1_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_0_1_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_2_3_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_UART0_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_2_3 = {</div><div class='del'>-	.name = "plgpio 2 and 3",</div><div class='del'>-	.modes = pmx_plgpio_2_3_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_2_3_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_4_5_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_I2C_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_4_5 = {</div><div class='del'>-	.name = "plgpio 4 and 5",</div><div class='del'>-	.modes = pmx_plgpio_4_5_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_4_5_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_6_9_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_SSP_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_6_9 = {</div><div class='del'>-	.name = "plgpio 6 to 9",</div><div class='del'>-	.modes = pmx_plgpio_6_9_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_6_9_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_10_27_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_MII_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_10_27 = {</div><div class='del'>-	.name = "plgpio 10 to 27",</div><div class='del'>-	.modes = pmx_plgpio_10_27_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_10_27_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_28_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_GPIO_PIN0_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_28 = {</div><div class='del'>-	.name = "plgpio 28",</div><div class='del'>-	.modes = pmx_plgpio_28_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_28_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_29_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_GPIO_PIN1_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_29 = {</div><div class='del'>-	.name = "plgpio 29",</div><div class='del'>-	.modes = pmx_plgpio_29_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_29_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_30_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_GPIO_PIN2_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_30 = {</div><div class='del'>-	.name = "plgpio 30",</div><div class='del'>-	.modes = pmx_plgpio_30_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_30_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_31_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_GPIO_PIN3_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_31 = {</div><div class='del'>-	.name = "plgpio 31",</div><div class='del'>-	.modes = pmx_plgpio_31_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_31_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_32_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_GPIO_PIN4_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_32 = {</div><div class='del'>-	.name = "plgpio 32",</div><div class='del'>-	.modes = pmx_plgpio_32_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_32_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_33_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_GPIO_PIN5_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_33 = {</div><div class='del'>-	.name = "plgpio 33",</div><div class='del'>-	.modes = pmx_plgpio_33_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_33_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_34_36_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_SSP_CS_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_34_36 = {</div><div class='del'>-	.name = "plgpio 34 to 36",</div><div class='del'>-	.modes = pmx_plgpio_34_36_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_34_36_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_37_42_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_UART0_MODEM_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_37_42 = {</div><div class='del'>-	.name = "plgpio 37 to 42",</div><div class='del'>-	.modes = pmx_plgpio_37_42_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_37_42_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_TIMER_1_2_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_43_44_47_48 = {</div><div class='del'>-	.name = "plgpio 43, 44, 47 and 48",</div><div class='del'>-	.modes = pmx_plgpio_43_44_47_48_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_43_44_47_48_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {</div><div class='del'>-	{</div><div class='del'>-		.ids = 0x00,</div><div class='del'>-		.mask = PMX_TIMER_3_4_MASK,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50 = {</div><div class='del'>-	.name = "plgpio 45, 46, 49 and 50",</div><div class='del'>-	.modes = pmx_plgpio_45_46_49_50_modes,</div><div class='del'>-	.mode_count = ARRAY_SIZE(pmx_plgpio_45_46_49_50_modes),</div><div class='del'>-	.enb_on_reset = 1,</div><div class='del'>-};</div><div class='del'>-#endif /* CONFIG_MACH_SPEAR310 || CONFIG_MACH_SPEAR320 */</div><div class='del'>-</div><div class='ctx'> static void __init spear3xx_timer_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	char pclk_name[] = "pll3_48m_clk";</div><div class='ctx'> 	struct clk *gpt_clk, *pclk;</div><div class='ctx'> </div><div class='add'>+	spear3xx_clk_init();</div><div class='add'>+</div><div class='ctx'> 	/* get the system timer clock */</div><div class='ctx'> 	gpt_clk = clk_get_sys("gpt0", NULL);</div><div class='ctx'> 	if (IS_ERR(gpt_clk)) {</div><div class='hunk'>@@ -530,9 +111,19 @@ static void __init spear3xx_timer_init(void)</div><div class='ctx'> 	clk_put(gpt_clk);</div><div class='ctx'> 	clk_put(pclk);</div><div class='ctx'> </div><div class='del'>-	spear_setup_timer();</div><div class='add'>+	spear_setup_of_timer();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct sys_timer spear3xx_timer = {</div><div class='ctx'> 	.init = spear3xx_timer_init,</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+static const struct of_device_id vic_of_match[] __initconst = {</div><div class='add'>+	{ .compatible = "arm,pl190-vic", .data = vic_of_init, },</div><div class='add'>+	{ /* Sentinel */ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init spear3xx_dt_init_irq(void)</div><div class='add'>+{</div><div class='add'>+	of_irq_init(vic_of_match);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-spear6xx/Kconfig b/arch/arm/mach-spear6xx/Kconfig<br/>index fbe298bd1d92..339f397dea70 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear6xx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/Kconfig</a></div><div class='hunk'>@@ -2,21 +2,9 @@</div><div class='ctx'> # SPEAr6XX Machine configuration file</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-if ARCH_SPEAR6XX</div><div class='del'>-</div><div class='del'>-menu "SPEAr6xx Implementations"</div><div class='del'>-config BOARD_SPEAR600_DT</div><div class='del'>-	bool "SPEAr600 generic board configured via device-tree"</div><div class='del'>-	select MACH_SPEAR600</div><div class='add'>+config MACH_SPEAR600</div><div class='add'>+	def_bool y</div><div class='add'>+	depends on ARCH_SPEAR6XX</div><div class='ctx'> 	select USE_OF</div><div class='ctx'> 	help</div><div class='ctx'> 	  Supports ST SPEAr600 boards configured via the device-tree</div><div class='del'>-</div><div class='del'>-endmenu</div><div class='del'>-</div><div class='del'>-config MACH_SPEAR600</div><div class='del'>-	bool "SPEAr600"</div><div class='del'>-	help</div><div class='del'>-	  Supports ST SPEAr600 Machine</div><div class='del'>-</div><div class='del'>-endif #ARCH_SPEAR6XX</div><div class='head'>diff --git a/arch/arm/mach-spear6xx/Makefile b/arch/arm/mach-spear6xx/Makefile<br/>index 76e5750552fc..898831d93f37 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear6xx/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/Makefile</a></div><div class='hunk'>@@ -3,4 +3,4 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> # common files</div><div class='del'>-obj-y	+= clock.o spear6xx.o</div><div class='add'>+obj-y	+= spear6xx.o</div><div class='head'>diff --git a/arch/arm/mach-spear6xx/Makefile.boot b/arch/arm/mach-spear6xx/Makefile.boot<br/>index 4674a4c221db..af493da37ab6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/Makefile.boot?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear6xx/Makefile.boot</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/Makefile.boot?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/Makefile.boot</a></div><div class='hunk'>@@ -1,3 +1,5 @@</div><div class='ctx'> zreladdr-y	+= 0x00008000</div><div class='ctx'> params_phys-y	:= 0x00000100</div><div class='ctx'> initrd_phys-y	:= 0x00800000</div><div class='add'>+</div><div class='add'>+dtb-$(CONFIG_BOARD_SPEAR600_DT)	+= spear600-evb.dtb</div><div class='head'>diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c<br/>deleted file mode 100644<br/>index a86499a8a15f..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear6xx/clock.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,683 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-spear6xx/clock.c</div><div class='del'>- *</div><div class='del'>- * SPEAr6xx machines clock framework source file</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;plat/clock.h&gt;</div><div class='del'>-#include &lt;mach/misc_regs.h&gt;</div><div class='del'>-</div><div class='del'>-/* root clks */</div><div class='del'>-/* 32 KHz oscillator clock */</div><div class='del'>-static struct clk osc_32k_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.rate = 32000,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* 30 MHz oscillator clock */</div><div class='del'>-static struct clk osc_30m_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.rate = 30000000,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock derived from 32 KHz osc clk */</div><div class='del'>-/* rtc clock */</div><div class='del'>-static struct clk rtc_clk = {</div><div class='del'>-	.pclk = &amp;osc_32k_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = RTC_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock derived from 30 MHz osc clk */</div><div class='del'>-/* pll masks structure */</div><div class='del'>-static struct pll_clk_masks pll1_masks = {</div><div class='del'>-	.mode_mask = PLL_MODE_MASK,</div><div class='del'>-	.mode_shift = PLL_MODE_SHIFT,</div><div class='del'>-	.norm_fdbk_m_mask = PLL_NORM_FDBK_M_MASK,</div><div class='del'>-	.norm_fdbk_m_shift = PLL_NORM_FDBK_M_SHIFT,</div><div class='del'>-	.dith_fdbk_m_mask = PLL_DITH_FDBK_M_MASK,</div><div class='del'>-	.dith_fdbk_m_shift = PLL_DITH_FDBK_M_SHIFT,</div><div class='del'>-	.div_p_mask = PLL_DIV_P_MASK,</div><div class='del'>-	.div_p_shift = PLL_DIV_P_SHIFT,</div><div class='del'>-	.div_n_mask = PLL_DIV_N_MASK,</div><div class='del'>-	.div_n_shift = PLL_DIV_N_SHIFT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* pll1 configuration structure */</div><div class='del'>-static struct pll_clk_config pll1_config = {</div><div class='del'>-	.mode_reg = PLL1_CTR,</div><div class='del'>-	.cfg_reg = PLL1_FRQ,</div><div class='del'>-	.masks = &amp;pll1_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* pll rate configuration table, in ascending order of rates */</div><div class='del'>-struct pll_rate_tbl pll_rtbl[] = {</div><div class='del'>-	{.mode = 0, .m = 0x85, .n = 0x0C, .p = 0x1}, /* 266 MHz */</div><div class='del'>-	{.mode = 0, .m = 0xA6, .n = 0x0C, .p = 0x1}, /* 332 MHz */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* PLL1 clock */</div><div class='del'>-static struct clk pll1_clk = {</div><div class='del'>-	.flags = ENABLED_ON_INIT,</div><div class='del'>-	.pclk = &amp;osc_30m_clk,</div><div class='del'>-	.en_reg = PLL1_CTR,</div><div class='del'>-	.en_reg_bit = PLL_ENABLE,</div><div class='del'>-	.calc_rate = &amp;pll_calc_rate,</div><div class='del'>-	.recalc = &amp;pll_clk_recalc,</div><div class='del'>-	.set_rate = &amp;pll_clk_set_rate,</div><div class='del'>-	.rate_config = {pll_rtbl, ARRAY_SIZE(pll_rtbl), 1},</div><div class='del'>-	.private_data = &amp;pll1_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* PLL3 48 MHz clock */</div><div class='del'>-static struct clk pll3_48m_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;osc_30m_clk,</div><div class='del'>-	.rate = 48000000,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* watch dog timer clock */</div><div class='del'>-static struct clk wdt_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;osc_30m_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock derived from pll1 clk */</div><div class='del'>-/* cpu clock */</div><div class='del'>-static struct clk cpu_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ahb masks structure */</div><div class='del'>-static struct bus_clk_masks ahb_masks = {</div><div class='del'>-	.mask = PLL_HCLK_RATIO_MASK,</div><div class='del'>-	.shift = PLL_HCLK_RATIO_SHIFT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ahb configuration structure */</div><div class='del'>-static struct bus_clk_config ahb_config = {</div><div class='del'>-	.reg = CORE_CLK_CFG,</div><div class='del'>-	.masks = &amp;ahb_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ahb rate configuration table, in ascending order of rates */</div><div class='del'>-struct bus_rate_tbl bus_rtbl[] = {</div><div class='del'>-	{.div = 3}, /* == parent divided by 4 */</div><div class='del'>-	{.div = 2}, /* == parent divided by 3 */</div><div class='del'>-	{.div = 1}, /* == parent divided by 2 */</div><div class='del'>-	{.div = 0}, /* == parent divided by 1 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ahb clock */</div><div class='del'>-static struct clk ahb_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;bus_calc_rate,</div><div class='del'>-	.recalc = &amp;bus_clk_recalc,</div><div class='del'>-	.set_rate = &amp;bus_clk_set_rate,</div><div class='del'>-	.rate_config = {bus_rtbl, ARRAY_SIZE(bus_rtbl), 2},</div><div class='del'>-	.private_data = &amp;ahb_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* auxiliary synthesizers masks */</div><div class='del'>-static struct aux_clk_masks aux_masks = {</div><div class='del'>-	.eq_sel_mask = AUX_EQ_SEL_MASK,</div><div class='del'>-	.eq_sel_shift = AUX_EQ_SEL_SHIFT,</div><div class='del'>-	.eq1_mask = AUX_EQ1_SEL,</div><div class='del'>-	.eq2_mask = AUX_EQ2_SEL,</div><div class='del'>-	.xscale_sel_mask = AUX_XSCALE_MASK,</div><div class='del'>-	.xscale_sel_shift = AUX_XSCALE_SHIFT,</div><div class='del'>-	.yscale_sel_mask = AUX_YSCALE_MASK,</div><div class='del'>-	.yscale_sel_shift = AUX_YSCALE_SHIFT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart configurations */</div><div class='del'>-static struct aux_clk_config uart_synth_config = {</div><div class='del'>-	.synth_reg = UART_CLK_SYNT,</div><div class='del'>-	.masks = &amp;aux_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* aux rate configuration table, in ascending order of rates */</div><div class='del'>-struct aux_rate_tbl aux_rtbl[] = {</div><div class='del'>-	/* For PLL1 = 332 MHz */</div><div class='del'>-	{.xscale = 1, .yscale = 8, .eq = 1}, /* 41.5 MHz */</div><div class='del'>-	{.xscale = 1, .yscale = 4, .eq = 1}, /* 83 MHz */</div><div class='del'>-	{.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart synth clock */</div><div class='del'>-static struct clk uart_synth_clk = {</div><div class='del'>-	.en_reg = UART_CLK_SYNT,</div><div class='del'>-	.en_reg_bit = AUX_SYNT_ENB,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;aux_calc_rate,</div><div class='del'>-	.recalc = &amp;aux_clk_recalc,</div><div class='del'>-	.set_rate = &amp;aux_clk_set_rate,</div><div class='del'>-	.rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 2},</div><div class='del'>-	.private_data = &amp;uart_synth_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart parents */</div><div class='del'>-static struct pclk_info uart_pclk_info[] = {</div><div class='del'>-	{</div><div class='del'>-		.pclk = &amp;uart_synth_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL1_VAL,</div><div class='del'>-	}, {</div><div class='del'>-		.pclk = &amp;pll3_48m_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL3_VAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart parent select structure */</div><div class='del'>-static struct pclk_sel uart_pclk_sel = {</div><div class='del'>-	.pclk_info = uart_pclk_info,</div><div class='del'>-	.pclk_count = ARRAY_SIZE(uart_pclk_info),</div><div class='del'>-	.pclk_sel_reg = PERIP_CLK_CFG,</div><div class='del'>-	.pclk_sel_mask = UART_CLK_MASK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart0 clock */</div><div class='del'>-static struct clk uart0_clk = {</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = UART0_CLK_ENB,</div><div class='del'>-	.pclk_sel = &amp;uart_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = UART_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uart1 clock */</div><div class='del'>-static struct clk uart1_clk = {</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = UART1_CLK_ENB,</div><div class='del'>-	.pclk_sel = &amp;uart_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = UART_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* firda configurations */</div><div class='del'>-static struct aux_clk_config firda_synth_config = {</div><div class='del'>-	.synth_reg = FIRDA_CLK_SYNT,</div><div class='del'>-	.masks = &amp;aux_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* firda synth clock */</div><div class='del'>-static struct clk firda_synth_clk = {</div><div class='del'>-	.en_reg = FIRDA_CLK_SYNT,</div><div class='del'>-	.en_reg_bit = AUX_SYNT_ENB,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;aux_calc_rate,</div><div class='del'>-	.recalc = &amp;aux_clk_recalc,</div><div class='del'>-	.set_rate = &amp;aux_clk_set_rate,</div><div class='del'>-	.rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 2},</div><div class='del'>-	.private_data = &amp;firda_synth_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* firda parents */</div><div class='del'>-static struct pclk_info firda_pclk_info[] = {</div><div class='del'>-	{</div><div class='del'>-		.pclk = &amp;firda_synth_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL1_VAL,</div><div class='del'>-	}, {</div><div class='del'>-		.pclk = &amp;pll3_48m_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL3_VAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* firda parent select structure */</div><div class='del'>-static struct pclk_sel firda_pclk_sel = {</div><div class='del'>-	.pclk_info = firda_pclk_info,</div><div class='del'>-	.pclk_count = ARRAY_SIZE(firda_pclk_info),</div><div class='del'>-	.pclk_sel_reg = PERIP_CLK_CFG,</div><div class='del'>-	.pclk_sel_mask = FIRDA_CLK_MASK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* firda clock */</div><div class='del'>-static struct clk firda_clk = {</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = FIRDA_CLK_ENB,</div><div class='del'>-	.pclk_sel = &amp;firda_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = FIRDA_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clcd configurations */</div><div class='del'>-static struct aux_clk_config clcd_synth_config = {</div><div class='del'>-	.synth_reg = CLCD_CLK_SYNT,</div><div class='del'>-	.masks = &amp;aux_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* firda synth clock */</div><div class='del'>-static struct clk clcd_synth_clk = {</div><div class='del'>-	.en_reg = CLCD_CLK_SYNT,</div><div class='del'>-	.en_reg_bit = AUX_SYNT_ENB,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;aux_calc_rate,</div><div class='del'>-	.recalc = &amp;aux_clk_recalc,</div><div class='del'>-	.set_rate = &amp;aux_clk_set_rate,</div><div class='del'>-	.rate_config = {aux_rtbl, ARRAY_SIZE(aux_rtbl), 2},</div><div class='del'>-	.private_data = &amp;clcd_synth_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clcd parents */</div><div class='del'>-static struct pclk_info clcd_pclk_info[] = {</div><div class='del'>-	{</div><div class='del'>-		.pclk = &amp;clcd_synth_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL1_VAL,</div><div class='del'>-	}, {</div><div class='del'>-		.pclk = &amp;pll3_48m_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL3_VAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clcd parent select structure */</div><div class='del'>-static struct pclk_sel clcd_pclk_sel = {</div><div class='del'>-	.pclk_info = clcd_pclk_info,</div><div class='del'>-	.pclk_count = ARRAY_SIZE(clcd_pclk_info),</div><div class='del'>-	.pclk_sel_reg = PERIP_CLK_CFG,</div><div class='del'>-	.pclk_sel_mask = CLCD_CLK_MASK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clcd clock */</div><div class='del'>-static struct clk clcd_clk = {</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = CLCD_CLK_ENB,</div><div class='del'>-	.pclk_sel = &amp;clcd_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = CLCD_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt synthesizer masks */</div><div class='del'>-static struct gpt_clk_masks gpt_masks = {</div><div class='del'>-	.mscale_sel_mask = GPT_MSCALE_MASK,</div><div class='del'>-	.mscale_sel_shift = GPT_MSCALE_SHIFT,</div><div class='del'>-	.nscale_sel_mask = GPT_NSCALE_MASK,</div><div class='del'>-	.nscale_sel_shift = GPT_NSCALE_SHIFT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt rate configuration table, in ascending order of rates */</div><div class='del'>-struct gpt_rate_tbl gpt_rtbl[] = {</div><div class='del'>-	/* For pll1 = 332 MHz */</div><div class='del'>-	{.mscale = 4, .nscale = 0}, /* 41.5 MHz */</div><div class='del'>-	{.mscale = 2, .nscale = 0}, /* 55.3 MHz */</div><div class='del'>-	{.mscale = 1, .nscale = 0}, /* 83 MHz */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt0 synth clk config*/</div><div class='del'>-static struct gpt_clk_config gpt0_synth_config = {</div><div class='del'>-	.synth_reg = PRSC1_CLK_CFG,</div><div class='del'>-	.masks = &amp;gpt_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt synth clock */</div><div class='del'>-static struct clk gpt0_synth_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;gpt_calc_rate,</div><div class='del'>-	.recalc = &amp;gpt_clk_recalc,</div><div class='del'>-	.set_rate = &amp;gpt_clk_set_rate,</div><div class='del'>-	.rate_config = {gpt_rtbl, ARRAY_SIZE(gpt_rtbl), 2},</div><div class='del'>-	.private_data = &amp;gpt0_synth_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt parents */</div><div class='del'>-static struct pclk_info gpt0_pclk_info[] = {</div><div class='del'>-	{</div><div class='del'>-		.pclk = &amp;gpt0_synth_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL1_VAL,</div><div class='del'>-	}, {</div><div class='del'>-		.pclk = &amp;pll3_48m_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL3_VAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt parent select structure */</div><div class='del'>-static struct pclk_sel gpt0_pclk_sel = {</div><div class='del'>-	.pclk_info = gpt0_pclk_info,</div><div class='del'>-	.pclk_count = ARRAY_SIZE(gpt0_pclk_info),</div><div class='del'>-	.pclk_sel_reg = PERIP_CLK_CFG,</div><div class='del'>-	.pclk_sel_mask = GPT_CLK_MASK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt0 ARM1 subsystem timer clock */</div><div class='del'>-static struct clk gpt0_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk_sel = &amp;gpt0_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = GPT0_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Note: gpt0 and gpt1 share same parent clocks */</div><div class='del'>-/* gpt parent select structure */</div><div class='del'>-static struct pclk_sel gpt1_pclk_sel = {</div><div class='del'>-	.pclk_info = gpt0_pclk_info,</div><div class='del'>-	.pclk_count = ARRAY_SIZE(gpt0_pclk_info),</div><div class='del'>-	.pclk_sel_reg = PERIP_CLK_CFG,</div><div class='del'>-	.pclk_sel_mask = GPT_CLK_MASK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt1 timer clock */</div><div class='del'>-static struct clk gpt1_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk_sel = &amp;gpt1_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = GPT1_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt2 synth clk config*/</div><div class='del'>-static struct gpt_clk_config gpt2_synth_config = {</div><div class='del'>-	.synth_reg = PRSC2_CLK_CFG,</div><div class='del'>-	.masks = &amp;gpt_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt synth clock */</div><div class='del'>-static struct clk gpt2_synth_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;gpt_calc_rate,</div><div class='del'>-	.recalc = &amp;gpt_clk_recalc,</div><div class='del'>-	.set_rate = &amp;gpt_clk_set_rate,</div><div class='del'>-	.rate_config = {gpt_rtbl, ARRAY_SIZE(gpt_rtbl), 2},</div><div class='del'>-	.private_data = &amp;gpt2_synth_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt parents */</div><div class='del'>-static struct pclk_info gpt2_pclk_info[] = {</div><div class='del'>-	{</div><div class='del'>-		.pclk = &amp;gpt2_synth_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL1_VAL,</div><div class='del'>-	}, {</div><div class='del'>-		.pclk = &amp;pll3_48m_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL3_VAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt parent select structure */</div><div class='del'>-static struct pclk_sel gpt2_pclk_sel = {</div><div class='del'>-	.pclk_info = gpt2_pclk_info,</div><div class='del'>-	.pclk_count = ARRAY_SIZE(gpt2_pclk_info),</div><div class='del'>-	.pclk_sel_reg = PERIP_CLK_CFG,</div><div class='del'>-	.pclk_sel_mask = GPT_CLK_MASK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt2 timer clock */</div><div class='del'>-static struct clk gpt2_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk_sel = &amp;gpt2_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = GPT2_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt3 synth clk config*/</div><div class='del'>-static struct gpt_clk_config gpt3_synth_config = {</div><div class='del'>-	.synth_reg = PRSC3_CLK_CFG,</div><div class='del'>-	.masks = &amp;gpt_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt synth clock */</div><div class='del'>-static struct clk gpt3_synth_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;pll1_clk,</div><div class='del'>-	.calc_rate = &amp;gpt_calc_rate,</div><div class='del'>-	.recalc = &amp;gpt_clk_recalc,</div><div class='del'>-	.set_rate = &amp;gpt_clk_set_rate,</div><div class='del'>-	.rate_config = {gpt_rtbl, ARRAY_SIZE(gpt_rtbl), 2},</div><div class='del'>-	.private_data = &amp;gpt3_synth_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt parents */</div><div class='del'>-static struct pclk_info gpt3_pclk_info[] = {</div><div class='del'>-	{</div><div class='del'>-		.pclk = &amp;gpt3_synth_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL1_VAL,</div><div class='del'>-	}, {</div><div class='del'>-		.pclk = &amp;pll3_48m_clk,</div><div class='del'>-		.pclk_val = AUX_CLK_PLL3_VAL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt parent select structure */</div><div class='del'>-static struct pclk_sel gpt3_pclk_sel = {</div><div class='del'>-	.pclk_info = gpt3_pclk_info,</div><div class='del'>-	.pclk_count = ARRAY_SIZE(gpt3_pclk_info),</div><div class='del'>-	.pclk_sel_reg = PERIP_CLK_CFG,</div><div class='del'>-	.pclk_sel_mask = GPT_CLK_MASK,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt3 timer clock */</div><div class='del'>-static struct clk gpt3_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk_sel = &amp;gpt3_pclk_sel,</div><div class='del'>-	.pclk_sel_shift = GPT3_CLK_SHIFT,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock derived from pll3 clk */</div><div class='del'>-/* usbh0 clock */</div><div class='del'>-static struct clk usbh0_clk = {</div><div class='del'>-	.pclk = &amp;pll3_48m_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = USBH0_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* usbh1 clock */</div><div class='del'>-static struct clk usbh1_clk = {</div><div class='del'>-	.pclk = &amp;pll3_48m_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = USBH1_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* usbd clock */</div><div class='del'>-static struct clk usbd_clk = {</div><div class='del'>-	.pclk = &amp;pll3_48m_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = USBD_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock derived from ahb clk */</div><div class='del'>-/* apb masks structure */</div><div class='del'>-static struct bus_clk_masks apb_masks = {</div><div class='del'>-	.mask = HCLK_PCLK_RATIO_MASK,</div><div class='del'>-	.shift = HCLK_PCLK_RATIO_SHIFT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* apb configuration structure */</div><div class='del'>-static struct bus_clk_config apb_config = {</div><div class='del'>-	.reg = CORE_CLK_CFG,</div><div class='del'>-	.masks = &amp;apb_masks,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* apb clock */</div><div class='del'>-static struct clk apb_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.calc_rate = &amp;bus_calc_rate,</div><div class='del'>-	.recalc = &amp;bus_clk_recalc,</div><div class='del'>-	.set_rate = &amp;bus_clk_set_rate,</div><div class='del'>-	.rate_config = {bus_rtbl, ARRAY_SIZE(bus_rtbl), 2},</div><div class='del'>-	.private_data = &amp;apb_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* i2c clock */</div><div class='del'>-static struct clk i2c_clk = {</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = I2C_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dma clock */</div><div class='del'>-static struct clk dma_clk = {</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = DMA_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* jpeg clock */</div><div class='del'>-static struct clk jpeg_clk = {</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = JPEG_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gmac clock */</div><div class='del'>-static struct clk gmac_clk = {</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = GMAC_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* smi clock */</div><div class='del'>-static struct clk smi_clk = {</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = SMI_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* fsmc clock */</div><div class='del'>-static struct clk fsmc_clk = {</div><div class='del'>-	.pclk = &amp;ahb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = FSMC_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clock derived from apb clk */</div><div class='del'>-/* adc clock */</div><div class='del'>-static struct clk adc_clk = {</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = ADC_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ssp0 clock */</div><div class='del'>-static struct clk ssp0_clk = {</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = SSP0_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ssp1 clock */</div><div class='del'>-static struct clk ssp1_clk = {</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = SSP1_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ssp2 clock */</div><div class='del'>-static struct clk ssp2_clk = {</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = SSP2_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio0 ARM subsystem clock */</div><div class='del'>-static struct clk gpio0_clk = {</div><div class='del'>-	.flags = ALWAYS_ENABLED,</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio1 clock */</div><div class='del'>-static struct clk gpio1_clk = {</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = GPIO1_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpio2 clock */</div><div class='del'>-static struct clk gpio2_clk = {</div><div class='del'>-	.pclk = &amp;apb_clk,</div><div class='del'>-	.en_reg = PERIP1_CLK_ENB,</div><div class='del'>-	.en_reg_bit = GPIO2_CLK_ENB,</div><div class='del'>-	.recalc = &amp;follow_parent,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct clk dummy_apb_pclk;</div><div class='del'>-</div><div class='del'>-/* array of all spear 6xx clock lookups */</div><div class='del'>-static struct clk_lookup spear_clk_lookups[] = {</div><div class='del'>-	{ .con_id = "apb_pclk",		.clk = &amp;dummy_apb_pclk},</div><div class='del'>-	/* root clks */</div><div class='del'>-	{ .con_id = "osc_32k_clk",	.clk = &amp;osc_32k_clk},</div><div class='del'>-	{ .con_id = "osc_30m_clk",	.clk = &amp;osc_30m_clk},</div><div class='del'>-	/* clock derived from 32 KHz os		 clk */</div><div class='del'>-	{ .dev_id = "rtc-spear",	.clk = &amp;rtc_clk},</div><div class='del'>-	/* clock derived from 30 MHz os		 clk */</div><div class='del'>-	{ .con_id = "pll1_clk",		.clk = &amp;pll1_clk},</div><div class='del'>-	{ .con_id = "pll3_48m_clk",	.clk = &amp;pll3_48m_clk},</div><div class='del'>-	{ .dev_id = "wdt",		.clk = &amp;wdt_clk},</div><div class='del'>-	/* clock derived from pll1 clk */</div><div class='del'>-	{ .con_id = "cpu_clk",		.clk = &amp;cpu_clk},</div><div class='del'>-	{ .con_id = "ahb_clk",		.clk = &amp;ahb_clk},</div><div class='del'>-	{ .con_id = "uart_synth_clk",	.clk = &amp;uart_synth_clk},</div><div class='del'>-	{ .con_id = "firda_synth_clk",	.clk = &amp;firda_synth_clk},</div><div class='del'>-	{ .con_id = "clcd_synth_clk",	.clk = &amp;clcd_synth_clk},</div><div class='del'>-	{ .con_id = "gpt0_synth_clk",	.clk = &amp;gpt0_synth_clk},</div><div class='del'>-	{ .con_id = "gpt2_synth_clk",	.clk = &amp;gpt2_synth_clk},</div><div class='del'>-	{ .con_id = "gpt3_synth_clk",	.clk = &amp;gpt3_synth_clk},</div><div class='del'>-	{ .dev_id = "d0000000.serial",	.clk = &amp;uart0_clk},</div><div class='del'>-	{ .dev_id = "d0080000.serial",	.clk = &amp;uart1_clk},</div><div class='del'>-	{ .dev_id = "firda",		.clk = &amp;firda_clk},</div><div class='del'>-	{ .dev_id = "clcd",		.clk = &amp;clcd_clk},</div><div class='del'>-	{ .dev_id = "gpt0",		.clk = &amp;gpt0_clk},</div><div class='del'>-	{ .dev_id = "gpt1",		.clk = &amp;gpt1_clk},</div><div class='del'>-	{ .dev_id = "gpt2",		.clk = &amp;gpt2_clk},</div><div class='del'>-	{ .dev_id = "gpt3",		.clk = &amp;gpt3_clk},</div><div class='del'>-	/* clock derived from pll3 clk */</div><div class='del'>-	{ .dev_id = "designware_udc",	.clk = &amp;usbd_clk},</div><div class='del'>-	{ .con_id = "usbh.0_clk",	.clk = &amp;usbh0_clk},</div><div class='del'>-	{ .con_id = "usbh.1_clk",	.clk = &amp;usbh1_clk},</div><div class='del'>-	/* clock derived from ahb clk */</div><div class='del'>-	{ .con_id = "apb_clk",		.clk = &amp;apb_clk},</div><div class='del'>-	{ .dev_id = "d0200000.i2c",	.clk = &amp;i2c_clk},</div><div class='del'>-	{ .dev_id = "dma",		.clk = &amp;dma_clk},</div><div class='del'>-	{ .dev_id = "jpeg",		.clk = &amp;jpeg_clk},</div><div class='del'>-	{ .dev_id = "gmac",		.clk = &amp;gmac_clk},</div><div class='del'>-	{ .dev_id = "smi",		.clk = &amp;smi_clk},</div><div class='del'>-	{ .dev_id = "fsmc-nand",	.clk = &amp;fsmc_clk},</div><div class='del'>-	/* clock derived from apb clk */</div><div class='del'>-	{ .dev_id = "adc",		.clk = &amp;adc_clk},</div><div class='del'>-	{ .dev_id = "ssp-pl022.0",	.clk = &amp;ssp0_clk},</div><div class='del'>-	{ .dev_id = "ssp-pl022.1",	.clk = &amp;ssp1_clk},</div><div class='del'>-	{ .dev_id = "ssp-pl022.2",	.clk = &amp;ssp2_clk},</div><div class='del'>-	{ .dev_id = "f0100000.gpio",	.clk = &amp;gpio0_clk},</div><div class='del'>-	{ .dev_id = "fc980000.gpio",	.clk = &amp;gpio1_clk},</div><div class='del'>-	{ .dev_id = "d8100000.gpio",	.clk = &amp;gpio2_clk},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init spear6xx_clk_init(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(spear_clk_lookups); i++)</div><div class='del'>-		clk_register(&amp;spear_clk_lookups[i]);</div><div class='del'>-</div><div class='del'>-	clk_init();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h<br/>index 116b99301cf5..65514b159370 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/include/mach/generic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear6xx/include/mach/generic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/include/mach/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/include/mach/generic.h</a></div><div class='hunk'>@@ -15,34 +15,9 @@</div><div class='ctx'> #define __MACH_GENERIC_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/amba/bus.h&gt;</div><div class='del'>-#include &lt;asm/mach/time.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Each GPT has 2 timer channels</div><div class='del'>- * Following GPT channels will be used as clock source and clockevent</div><div class='del'>- */</div><div class='del'>-#define SPEAR_GPT0_BASE		SPEAR6XX_CPU_TMR_BASE</div><div class='del'>-#define SPEAR_GPT0_CHAN0_IRQ	IRQ_CPU_GPT1_1</div><div class='del'>-#define SPEAR_GPT0_CHAN1_IRQ	IRQ_CPU_GPT1_2</div><div class='del'>-</div><div class='del'>-/* Add spear6xx family device structure declarations here */</div><div class='del'>-extern struct amba_device gpio_device[];</div><div class='del'>-extern struct amba_device uart_device[];</div><div class='del'>-extern struct sys_timer spear6xx_timer;</div><div class='del'>-</div><div class='del'>-/* Add spear6xx family function declarations here */</div><div class='del'>-void __init spear_setup_timer(void);</div><div class='del'>-void __init spear6xx_map_io(void);</div><div class='del'>-void __init spear6xx_init_irq(void);</div><div class='del'>-void __init spear6xx_init(void);</div><div class='del'>-void __init spear600_init(void);</div><div class='del'>-void __init spear6xx_clk_init(void);</div><div class='ctx'> </div><div class='add'>+void __init spear_setup_of_timer(void);</div><div class='ctx'> void spear_restart(char, const char *);</div><div class='del'>-</div><div class='del'>-/* Add spear600 machine device structure declarations here */</div><div class='add'>+void __init spear6xx_clk_init(void);</div><div class='ctx'> </div><div class='ctx'> #endif /* __MACH_GENERIC_H */</div><div class='head'>diff --git a/arch/arm/mach-spear6xx/include/mach/hardware.h b/arch/arm/mach-spear6xx/include/mach/hardware.h<br/>index 0b3f96ae2848..40a8c178f10d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/include/mach/hardware.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear6xx/include/mach/hardware.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/include/mach/hardware.h</a></div><div class='hunk'>@@ -1,23 +1 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-spear6xx/include/mach/hardware.h</div><div class='del'>- *</div><div class='del'>- * Hardware definitions for SPEAr6xx machine family</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Rajeev Kumar&lt;rajeev-dlh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_HARDWARE_H</div><div class='del'>-#define __MACH_HARDWARE_H</div><div class='del'>-</div><div class='del'>-#include &lt;plat/hardware.h&gt;</div><div class='del'>-#include &lt;mach/spear.h&gt;</div><div class='del'>-</div><div class='del'>-/* Vitual to physical translation of statically mapped space */</div><div class='del'>-#define IO_ADDRESS(x)		(x | 0xF0000000)</div><div class='del'>-</div><div class='del'>-#endif /* __MACH_HARDWARE_H */</div><div class='add'>+/* empty */</div><div class='head'>diff --git a/arch/arm/mach-spear6xx/include/mach/irqs.h b/arch/arm/mach-spear6xx/include/mach/irqs.h<br/>index 8f214b03d75d..37a5c411a866 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/include/mach/irqs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear6xx/include/mach/irqs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/include/mach/irqs.h</a></div><div class='hunk'>@@ -16,82 +16,10 @@</div><div class='ctx'> </div><div class='ctx'> /* IRQ definitions */</div><div class='ctx'> /* VIC 1 */</div><div class='del'>-#define IRQ_INTRCOMM_SW_IRQ			0</div><div class='del'>-#define IRQ_INTRCOMM_CPU_1			1</div><div class='del'>-#define IRQ_INTRCOMM_CPU_2			2</div><div class='del'>-#define IRQ_INTRCOMM_RAS2A11_1			3</div><div class='del'>-#define IRQ_INTRCOMM_RAS2A11_2			4</div><div class='del'>-#define IRQ_INTRCOMM_RAS2A12_1			5</div><div class='del'>-#define IRQ_INTRCOMM_RAS2A12_2			6</div><div class='del'>-#define IRQ_GEN_RAS_0				7</div><div class='del'>-#define IRQ_GEN_RAS_1				8</div><div class='del'>-#define IRQ_GEN_RAS_2				9</div><div class='del'>-#define IRQ_GEN_RAS_3				10</div><div class='del'>-#define IRQ_GEN_RAS_4				11</div><div class='del'>-#define IRQ_GEN_RAS_5				12</div><div class='del'>-#define IRQ_GEN_RAS_6				13</div><div class='del'>-#define IRQ_GEN_RAS_7				14</div><div class='del'>-#define IRQ_GEN_RAS_8				15</div><div class='del'>-#define IRQ_CPU_GPT1_1				16</div><div class='del'>-#define IRQ_CPU_GPT1_2				17</div><div class='del'>-#define IRQ_LOCAL_GPIO				18</div><div class='del'>-#define IRQ_PLL_UNLOCK				19</div><div class='del'>-#define IRQ_JPEG				20</div><div class='del'>-#define IRQ_FSMC				21</div><div class='del'>-#define IRQ_IRDA				22</div><div class='del'>-#define IRQ_RESERVED				23</div><div class='del'>-#define IRQ_UART_0				24</div><div class='del'>-#define IRQ_UART_1				25</div><div class='del'>-#define IRQ_SSP_1				26</div><div class='del'>-#define IRQ_SSP_2				27</div><div class='del'>-#define IRQ_I2C					28</div><div class='del'>-#define IRQ_GEN_RAS_9				29</div><div class='del'>-#define IRQ_GEN_RAS_10				30</div><div class='del'>-#define IRQ_GEN_RAS_11				31</div><div class='del'>-</div><div class='del'>-/* VIC 2 */</div><div class='del'>-#define IRQ_APPL_GPT1_1				32</div><div class='del'>-#define IRQ_APPL_GPT1_2				33</div><div class='del'>-#define IRQ_APPL_GPT2_1				34</div><div class='del'>-#define IRQ_APPL_GPT2_2				35</div><div class='del'>-#define IRQ_APPL_GPIO				36</div><div class='del'>-#define IRQ_APPL_SSP				37</div><div class='del'>-#define IRQ_APPL_ADC				38</div><div class='del'>-#define IRQ_APPL_RESERVED			39</div><div class='del'>-#define IRQ_AHB_EXP_MASTER			40</div><div class='del'>-#define IRQ_DDR_CONTROLLER			41</div><div class='del'>-#define IRQ_BASIC_DMA				42</div><div class='del'>-#define IRQ_BASIC_RESERVED1			43</div><div class='del'>-#define IRQ_BASIC_SMI				44</div><div class='del'>-#define IRQ_BASIC_CLCD				45</div><div class='del'>-#define IRQ_EXP_AHB_1				46</div><div class='del'>-#define IRQ_EXP_AHB_2				47</div><div class='del'>-#define IRQ_BASIC_GPT1_1			48</div><div class='del'>-#define IRQ_BASIC_GPT1_2			49</div><div class='del'>-#define IRQ_BASIC_RTC				50</div><div class='del'>-#define IRQ_BASIC_GPIO				51</div><div class='del'>-#define IRQ_BASIC_WDT				52</div><div class='del'>-#define IRQ_BASIC_RESERVED			53</div><div class='del'>-#define IRQ_AHB_EXP_SLAVE			54</div><div class='del'>-#define IRQ_GMAC_1				55</div><div class='del'>-#define IRQ_GMAC_2				56</div><div class='del'>-#define IRQ_USB_DEV				57</div><div class='del'>-#define IRQ_USB_H_OHCI_0			58</div><div class='del'>-#define IRQ_USB_H_EHCI_0			59</div><div class='del'>-#define IRQ_USB_H_OHCI_1			60</div><div class='del'>-#define IRQ_USB_H_EHCI_1			61</div><div class='del'>-#define IRQ_EXP_AHB_3				62</div><div class='del'>-#define IRQ_EXP_AHB_4				63</div><div class='del'>-</div><div class='ctx'> #define IRQ_VIC_END				64</div><div class='ctx'> </div><div class='ctx'> /* GPIO pins virtual irqs */</div><div class='del'>-#define SPEAR_GPIO_INT_BASE	IRQ_VIC_END</div><div class='del'>-#define SPEAR_GPIO0_INT_BASE	SPEAR_GPIO_INT_BASE</div><div class='del'>-#define SPEAR_GPIO1_INT_BASE	(SPEAR_GPIO0_INT_BASE + 8)</div><div class='del'>-#define SPEAR_GPIO2_INT_BASE	(SPEAR_GPIO1_INT_BASE + 8)</div><div class='del'>-#define SPEAR_GPIO_INT_END	(SPEAR_GPIO2_INT_BASE + 8)</div><div class='del'>-#define VIRTUAL_IRQS		(SPEAR_GPIO_INT_END - IRQ_VIC_END)</div><div class='del'>-#define NR_IRQS			(IRQ_VIC_END + VIRTUAL_IRQS)</div><div class='add'>+#define VIRTUAL_IRQS				24</div><div class='add'>+#define NR_IRQS					(IRQ_VIC_END + VIRTUAL_IRQS)</div><div class='ctx'> </div><div class='ctx'> #endif	/* __MACH_IRQS_H */</div><div class='head'>diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h<br/>index 68c20a007b0d..179e45774b3a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/include/mach/misc_regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear6xx/include/mach/misc_regs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/include/mach/misc_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/include/mach/misc_regs.h</a></div><div class='hunk'>@@ -14,161 +14,9 @@</div><div class='ctx'> #ifndef __MACH_MISC_REGS_H</div><div class='ctx'> #define __MACH_MISC_REGS_H</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define MISC_BASE		IOMEM(VA_SPEAR6XX_ICM3_MISC_REG_BASE)</div><div class='del'>-</div><div class='del'>-#define SOC_CFG_CTR		(MISC_BASE + 0x000)</div><div class='del'>-#define DIAG_CFG_CTR		(MISC_BASE + 0x004)</div><div class='del'>-#define PLL1_CTR		(MISC_BASE + 0x008)</div><div class='del'>-#define PLL1_FRQ		(MISC_BASE + 0x00C)</div><div class='del'>-#define PLL1_MOD		(MISC_BASE + 0x010)</div><div class='del'>-#define PLL2_CTR		(MISC_BASE + 0x014)</div><div class='del'>-/* PLL_CTR register masks */</div><div class='del'>-#define PLL_ENABLE		2</div><div class='del'>-#define PLL_MODE_SHIFT		4</div><div class='del'>-#define PLL_MODE_MASK		0x3</div><div class='del'>-#define PLL_MODE_NORMAL		0</div><div class='del'>-#define PLL_MODE_FRACTION	1</div><div class='del'>-#define PLL_MODE_DITH_DSB	2</div><div class='del'>-#define PLL_MODE_DITH_SSB	3</div><div class='del'>-</div><div class='del'>-#define PLL2_FRQ		(MISC_BASE + 0x018)</div><div class='del'>-/* PLL FRQ register masks */</div><div class='del'>-#define PLL_DIV_N_SHIFT		0</div><div class='del'>-#define PLL_DIV_N_MASK		0xFF</div><div class='del'>-#define PLL_DIV_P_SHIFT		8</div><div class='del'>-#define PLL_DIV_P_MASK		0x7</div><div class='del'>-#define PLL_NORM_FDBK_M_SHIFT	24</div><div class='del'>-#define PLL_NORM_FDBK_M_MASK	0xFF</div><div class='del'>-#define PLL_DITH_FDBK_M_SHIFT	16</div><div class='del'>-#define PLL_DITH_FDBK_M_MASK	0xFFFF</div><div class='del'>-</div><div class='del'>-#define PLL2_MOD		(MISC_BASE + 0x01C)</div><div class='del'>-#define PLL_CLK_CFG		(MISC_BASE + 0x020)</div><div class='del'>-#define CORE_CLK_CFG		(MISC_BASE + 0x024)</div><div class='del'>-/* CORE CLK CFG register masks */</div><div class='del'>-#define PLL_HCLK_RATIO_SHIFT	10</div><div class='del'>-#define PLL_HCLK_RATIO_MASK	0x3</div><div class='del'>-#define HCLK_PCLK_RATIO_SHIFT	8</div><div class='del'>-#define HCLK_PCLK_RATIO_MASK	0x3</div><div class='del'>-</div><div class='del'>-#define PERIP_CLK_CFG		(MISC_BASE + 0x028)</div><div class='del'>-/* PERIP_CLK_CFG register masks */</div><div class='del'>-#define CLCD_CLK_SHIFT		2</div><div class='del'>-#define CLCD_CLK_MASK		0x3</div><div class='del'>-#define UART_CLK_SHIFT		4</div><div class='del'>-#define UART_CLK_MASK		0x1</div><div class='del'>-#define FIRDA_CLK_SHIFT		5</div><div class='del'>-#define FIRDA_CLK_MASK		0x3</div><div class='del'>-#define GPT0_CLK_SHIFT		8</div><div class='del'>-#define GPT1_CLK_SHIFT		10</div><div class='del'>-#define GPT2_CLK_SHIFT		11</div><div class='del'>-#define GPT3_CLK_SHIFT		12</div><div class='del'>-#define GPT_CLK_MASK		0x1</div><div class='del'>-#define AUX_CLK_PLL3_VAL	0</div><div class='del'>-#define AUX_CLK_PLL1_VAL	1</div><div class='del'>-</div><div class='del'>-#define PERIP1_CLK_ENB		(MISC_BASE + 0x02C)</div><div class='del'>-/* PERIP1_CLK_ENB register masks */</div><div class='del'>-#define UART0_CLK_ENB		3</div><div class='del'>-#define UART1_CLK_ENB		4</div><div class='del'>-#define SSP0_CLK_ENB		5</div><div class='del'>-#define SSP1_CLK_ENB		6</div><div class='del'>-#define I2C_CLK_ENB		7</div><div class='del'>-#define JPEG_CLK_ENB		8</div><div class='del'>-#define FSMC_CLK_ENB		9</div><div class='del'>-#define FIRDA_CLK_ENB		10</div><div class='del'>-#define GPT2_CLK_ENB		11</div><div class='del'>-#define GPT3_CLK_ENB		12</div><div class='del'>-#define GPIO2_CLK_ENB		13</div><div class='del'>-#define SSP2_CLK_ENB		14</div><div class='del'>-#define ADC_CLK_ENB		15</div><div class='del'>-#define GPT1_CLK_ENB		11</div><div class='del'>-#define RTC_CLK_ENB		17</div><div class='del'>-#define GPIO1_CLK_ENB		18</div><div class='del'>-#define DMA_CLK_ENB		19</div><div class='del'>-#define SMI_CLK_ENB		21</div><div class='del'>-#define CLCD_CLK_ENB		22</div><div class='del'>-#define GMAC_CLK_ENB		23</div><div class='del'>-#define USBD_CLK_ENB		24</div><div class='del'>-#define USBH0_CLK_ENB		25</div><div class='del'>-#define USBH1_CLK_ENB		26</div><div class='del'>-</div><div class='del'>-#define SOC_CORE_ID		(MISC_BASE + 0x030)</div><div class='del'>-#define RAS_CLK_ENB		(MISC_BASE + 0x034)</div><div class='del'>-#define PERIP1_SOF_RST		(MISC_BASE + 0x038)</div><div class='del'>-/* PERIP1_SOF_RST register masks */</div><div class='del'>-#define JPEG_SOF_RST		8</div><div class='del'>-</div><div class='del'>-#define SOC_USER_ID		(MISC_BASE + 0x03C)</div><div class='del'>-#define RAS_SOF_RST		(MISC_BASE + 0x040)</div><div class='del'>-#define PRSC1_CLK_CFG		(MISC_BASE + 0x044)</div><div class='del'>-#define PRSC2_CLK_CFG		(MISC_BASE + 0x048)</div><div class='del'>-#define PRSC3_CLK_CFG		(MISC_BASE + 0x04C)</div><div class='del'>-/* gpt synthesizer register masks */</div><div class='del'>-#define GPT_MSCALE_SHIFT	0</div><div class='del'>-#define GPT_MSCALE_MASK		0xFFF</div><div class='del'>-#define GPT_NSCALE_SHIFT	12</div><div class='del'>-#define GPT_NSCALE_MASK		0xF</div><div class='del'>-</div><div class='del'>-#define AMEM_CLK_CFG		(MISC_BASE + 0x050)</div><div class='del'>-#define EXPI_CLK_CFG		(MISC_BASE + 0x054)</div><div class='del'>-#define CLCD_CLK_SYNT		(MISC_BASE + 0x05C)</div><div class='del'>-#define FIRDA_CLK_SYNT		(MISC_BASE + 0x060)</div><div class='del'>-#define UART_CLK_SYNT		(MISC_BASE + 0x064)</div><div class='del'>-#define GMAC_CLK_SYNT		(MISC_BASE + 0x068)</div><div class='del'>-#define RAS1_CLK_SYNT		(MISC_BASE + 0x06C)</div><div class='del'>-#define RAS2_CLK_SYNT		(MISC_BASE + 0x070)</div><div class='del'>-#define RAS3_CLK_SYNT		(MISC_BASE + 0x074)</div><div class='del'>-#define RAS4_CLK_SYNT		(MISC_BASE + 0x078)</div><div class='del'>-/* aux clk synthesiser register masks for irda to ras4 */</div><div class='del'>-#define AUX_SYNT_ENB		31</div><div class='del'>-#define AUX_EQ_SEL_SHIFT	30</div><div class='del'>-#define AUX_EQ_SEL_MASK		1</div><div class='del'>-#define AUX_EQ1_SEL		0</div><div class='del'>-#define AUX_EQ2_SEL		1</div><div class='del'>-#define AUX_XSCALE_SHIFT	16</div><div class='del'>-#define AUX_XSCALE_MASK		0xFFF</div><div class='del'>-#define AUX_YSCALE_SHIFT	0</div><div class='del'>-#define AUX_YSCALE_MASK		0xFFF</div><div class='del'>-</div><div class='del'>-#define ICM1_ARB_CFG		(MISC_BASE + 0x07C)</div><div class='del'>-#define ICM2_ARB_CFG		(MISC_BASE + 0x080)</div><div class='del'>-#define ICM3_ARB_CFG		(MISC_BASE + 0x084)</div><div class='del'>-#define ICM4_ARB_CFG		(MISC_BASE + 0x088)</div><div class='del'>-#define ICM5_ARB_CFG		(MISC_BASE + 0x08C)</div><div class='del'>-#define ICM6_ARB_CFG		(MISC_BASE + 0x090)</div><div class='del'>-#define ICM7_ARB_CFG		(MISC_BASE + 0x094)</div><div class='del'>-#define ICM8_ARB_CFG		(MISC_BASE + 0x098)</div><div class='del'>-#define ICM9_ARB_CFG		(MISC_BASE + 0x09C)</div><div class='ctx'> #define DMA_CHN_CFG		(MISC_BASE + 0x0A0)</div><div class='del'>-#define USB2_PHY_CFG		(MISC_BASE + 0x0A4)</div><div class='del'>-#define GMAC_CFG_CTR		(MISC_BASE + 0x0A8)</div><div class='del'>-#define EXPI_CFG_CTR		(MISC_BASE + 0x0AC)</div><div class='del'>-#define PRC1_LOCK_CTR		(MISC_BASE + 0x0C0)</div><div class='del'>-#define PRC2_LOCK_CTR		(MISC_BASE + 0x0C4)</div><div class='del'>-#define PRC3_LOCK_CTR		(MISC_BASE + 0x0C8)</div><div class='del'>-#define PRC4_LOCK_CTR		(MISC_BASE + 0x0CC)</div><div class='del'>-#define PRC1_IRQ_CTR		(MISC_BASE + 0x0D0)</div><div class='del'>-#define PRC2_IRQ_CTR		(MISC_BASE + 0x0D4)</div><div class='del'>-#define PRC3_IRQ_CTR		(MISC_BASE + 0x0D8)</div><div class='del'>-#define PRC4_IRQ_CTR		(MISC_BASE + 0x0DC)</div><div class='del'>-#define PWRDOWN_CFG_CTR		(MISC_BASE + 0x0E0)</div><div class='del'>-#define COMPSSTL_1V8_CFG	(MISC_BASE + 0x0E4)</div><div class='del'>-#define COMPSSTL_2V5_CFG	(MISC_BASE + 0x0E8)</div><div class='del'>-#define COMPCOR_3V3_CFG		(MISC_BASE + 0x0EC)</div><div class='del'>-#define SSTLPAD_CFG_CTR		(MISC_BASE + 0x0F0)</div><div class='del'>-#define BIST1_CFG_CTR		(MISC_BASE + 0x0F4)</div><div class='del'>-#define BIST2_CFG_CTR		(MISC_BASE + 0x0F8)</div><div class='del'>-#define BIST3_CFG_CTR		(MISC_BASE + 0x0FC)</div><div class='del'>-#define BIST4_CFG_CTR		(MISC_BASE + 0x100)</div><div class='del'>-#define BIST5_CFG_CTR		(MISC_BASE + 0x104)</div><div class='del'>-#define BIST1_STS_RES		(MISC_BASE + 0x108)</div><div class='del'>-#define BIST2_STS_RES		(MISC_BASE + 0x10C)</div><div class='del'>-#define BIST3_STS_RES		(MISC_BASE + 0x110)</div><div class='del'>-#define BIST4_STS_RES		(MISC_BASE + 0x114)</div><div class='del'>-#define BIST5_STS_RES		(MISC_BASE + 0x118)</div><div class='del'>-#define SYSERR_CFG_CTR		(MISC_BASE + 0x11C)</div><div class='ctx'> </div><div class='ctx'> #endif /* __MACH_MISC_REGS_H */</div><div class='head'>diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h<br/>index 7fd621532def..cb8ed2f4dc85 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/include/mach/spear.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear6xx/include/mach/spear.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/include/mach/spear.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/include/mach/spear.h</a></div><div class='hunk'>@@ -15,69 +15,25 @@</div><div class='ctx'> #define __MACH_SPEAR6XX_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='del'>-#include &lt;mach/spear600.h&gt;</div><div class='ctx'> </div><div class='del'>-#define SPEAR6XX_ML_SDRAM_BASE		UL(0x00000000)</div><div class='ctx'> /* ICM1 - Low speed connection */</div><div class='ctx'> #define SPEAR6XX_ICM1_BASE		UL(0xD0000000)</div><div class='del'>-</div><div class='add'>+#define VA_SPEAR6XX_ICM1_BASE		UL(0xFD000000)</div><div class='ctx'> #define SPEAR6XX_ICM1_UART0_BASE	UL(0xD0000000)</div><div class='del'>-#define VA_SPEAR6XX_ICM1_UART0_BASE	IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE)</div><div class='del'>-</div><div class='del'>-#define SPEAR6XX_ICM1_UART1_BASE	UL(0xD0080000)</div><div class='del'>-#define SPEAR6XX_ICM1_SSP0_BASE		UL(0xD0100000)</div><div class='del'>-#define SPEAR6XX_ICM1_SSP1_BASE		UL(0xD0180000)</div><div class='del'>-#define SPEAR6XX_ICM1_I2C_BASE		UL(0xD0200000)</div><div class='del'>-#define SPEAR6XX_ICM1_JPEG_BASE		UL(0xD0800000)</div><div class='del'>-#define SPEAR6XX_ICM1_IRDA_BASE		UL(0xD1000000)</div><div class='del'>-#define SPEAR6XX_ICM1_FSMC_BASE		UL(0xD1800000)</div><div class='del'>-#define SPEAR6XX_ICM1_NAND_BASE		UL(0xD2000000)</div><div class='del'>-#define SPEAR6XX_ICM1_SRAM_BASE		UL(0xD2800000)</div><div class='del'>-</div><div class='del'>-/* ICM2 - Application Subsystem */</div><div class='del'>-#define SPEAR6XX_ICM2_BASE		UL(0xD8000000)</div><div class='del'>-#define SPEAR6XX_ICM2_TMR0_BASE		UL(0xD8000000)</div><div class='del'>-#define SPEAR6XX_ICM2_TMR1_BASE		UL(0xD8080000)</div><div class='del'>-#define SPEAR6XX_ICM2_GPIO_BASE		UL(0xD8100000)</div><div class='del'>-#define SPEAR6XX_ICM2_SSP2_BASE		UL(0xD8180000)</div><div class='del'>-#define SPEAR6XX_ICM2_ADC_BASE		UL(0xD8200000)</div><div class='add'>+#define VA_SPEAR6XX_ICM1_UART0_BASE	(VA_SPEAR6XX_ICM1_2_BASE | SPEAR6XX_ICM1_UART0_BASE)</div><div class='ctx'> </div><div class='ctx'> /* ML-1, 2 - Multi Layer CPU Subsystem */</div><div class='ctx'> #define SPEAR6XX_ML_CPU_BASE		UL(0xF0000000)</div><div class='del'>-#define SPEAR6XX_CPU_TMR_BASE		UL(0xF0000000)</div><div class='del'>-#define SPEAR6XX_CPU_GPIO_BASE		UL(0xF0100000)</div><div class='del'>-#define SPEAR6XX_CPU_VIC_SEC_BASE	UL(0xF1000000)</div><div class='del'>-#define VA_SPEAR6XX_CPU_VIC_SEC_BASE	IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE)</div><div class='del'>-#define SPEAR6XX_CPU_VIC_PRI_BASE	UL(0xF1100000)</div><div class='del'>-#define VA_SPEAR6XX_CPU_VIC_PRI_BASE	IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE)</div><div class='add'>+#define VA_SPEAR6XX_ML_CPU_BASE		UL(0xF0000000)</div><div class='ctx'> </div><div class='ctx'> /* ICM3 - Basic Subsystem */</div><div class='del'>-#define SPEAR6XX_ICM3_BASE		UL(0xF8000000)</div><div class='del'>-#define SPEAR6XX_ICM3_SMEM_BASE		UL(0xF8000000)</div><div class='ctx'> #define SPEAR6XX_ICM3_SMI_CTRL_BASE	UL(0xFC000000)</div><div class='del'>-#define SPEAR6XX_ICM3_CLCD_BASE		UL(0xFC200000)</div><div class='add'>+#define VA_SPEAR6XX_ICM3_SMI_CTRL_BASE	UL(0xFC000000)</div><div class='ctx'> #define SPEAR6XX_ICM3_DMA_BASE		UL(0xFC400000)</div><div class='del'>-#define SPEAR6XX_ICM3_SDRAM_CTRL_BASE	UL(0xFC600000)</div><div class='del'>-#define SPEAR6XX_ICM3_TMR_BASE		UL(0xFC800000)</div><div class='del'>-#define SPEAR6XX_ICM3_WDT_BASE		UL(0xFC880000)</div><div class='del'>-#define SPEAR6XX_ICM3_RTC_BASE		UL(0xFC900000)</div><div class='del'>-#define SPEAR6XX_ICM3_GPIO_BASE		UL(0xFC980000)</div><div class='ctx'> #define SPEAR6XX_ICM3_SYS_CTRL_BASE	UL(0xFCA00000)</div><div class='del'>-#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE	IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE)</div><div class='add'>+#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE	(VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_SYS_CTRL_BASE)</div><div class='ctx'> #define SPEAR6XX_ICM3_MISC_REG_BASE	UL(0xFCA80000)</div><div class='del'>-#define VA_SPEAR6XX_ICM3_MISC_REG_BASE	IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE)</div><div class='del'>-</div><div class='del'>-/* ICM4 - High Speed Connection */</div><div class='del'>-#define SPEAR6XX_ICM4_BASE		UL(0xE0000000)</div><div class='del'>-#define SPEAR6XX_ICM4_GMAC_BASE		UL(0xE0800000)</div><div class='del'>-#define SPEAR6XX_ICM4_USBD_FIFO_BASE	UL(0xE1000000)</div><div class='del'>-#define SPEAR6XX_ICM4_USBD_CSR_BASE	UL(0xE1100000)</div><div class='del'>-#define SPEAR6XX_ICM4_USBD_PLDT_BASE	UL(0xE1200000)</div><div class='del'>-#define SPEAR6XX_ICM4_USB_EHCI0_BASE	UL(0xE1800000)</div><div class='del'>-#define SPEAR6XX_ICM4_USB_OHCI0_BASE	UL(0xE1900000)</div><div class='del'>-#define SPEAR6XX_ICM4_USB_EHCI1_BASE	UL(0xE2000000)</div><div class='del'>-#define SPEAR6XX_ICM4_USB_OHCI1_BASE	UL(0xE2100000)</div><div class='del'>-#define SPEAR6XX_ICM4_USB_ARB_BASE	UL(0xE2800000)</div><div class='add'>+#define VA_SPEAR6XX_ICM3_MISC_REG_BASE	(VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_MISC_REG_BASE)</div><div class='ctx'> </div><div class='ctx'> /* Debug uart for linux, will be used for debug and uncompress messages */</div><div class='ctx'> #define SPEAR_DBG_UART_BASE		SPEAR6XX_ICM1_UART0_BASE</div><div class='head'>diff --git a/arch/arm/mach-spear6xx/include/mach/spear600.h b/arch/arm/mach-spear6xx/include/mach/spear600.h<br/>deleted file mode 100644<br/>index c068cc50b0fb..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/include/mach/spear600.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear6xx/include/mach/spear600.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,21 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/mach-spear66xx/include/mach/spear600.h</div><div class='del'>- *</div><div class='del'>- * SPEAr600 Machine specific definition</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef	CONFIG_MACH_SPEAR600</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_SPEAR600_H</div><div class='del'>-#define __MACH_SPEAR600_H</div><div class='del'>-</div><div class='del'>-#endif /* __MACH_SPEAR600_H */</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MACH_SPEAR600 */</div><div class='head'>diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c<br/>index 2ed8b14c82c8..2e2e3596583e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/spear6xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-spear6xx/spear6xx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-spear6xx/spear6xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-spear6xx/spear6xx.c</a></div><div class='hunk'>@@ -13,41 +13,404 @@</div><div class='ctx'>  * warranty of any kind, whether express or implied.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/amba/pl08x.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;asm/hardware/pl080.h&gt;</div><div class='ctx'> #include &lt;asm/hardware/vic.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/mach/time.h&gt;</div><div class='add'>+#include &lt;asm/mach/map.h&gt;</div><div class='add'>+#include &lt;plat/pl080.h&gt;</div><div class='ctx'> #include &lt;mach/generic.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='ctx'> </div><div class='del'>-/* Following will create static virtual/physical mappings */</div><div class='del'>-static struct map_desc spear6xx_io_desc[] __initdata = {</div><div class='add'>+/* dmac device registration */</div><div class='add'>+static struct pl08x_channel_data spear600_dma_info[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.virtual	= VA_SPEAR6XX_ICM1_UART0_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),</div><div class='del'>-		.length		= SZ_4K,</div><div class='del'>-		.type		= MT_DEVICE</div><div class='add'>+		.bus_id = "ssp1_rx",</div><div class='add'>+		.min_signal = 0,</div><div class='add'>+		.max_signal = 0,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='ctx'> 	}, {</div><div class='del'>-		.virtual	= VA_SPEAR6XX_CPU_VIC_PRI_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),</div><div class='del'>-		.length		= SZ_4K,</div><div class='del'>-		.type		= MT_DEVICE</div><div class='add'>+		.bus_id = "ssp1_tx",</div><div class='add'>+		.min_signal = 1,</div><div class='add'>+		.max_signal = 1,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='ctx'> 	}, {</div><div class='del'>-		.virtual	= VA_SPEAR6XX_CPU_VIC_SEC_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),</div><div class='del'>-		.length		= SZ_4K,</div><div class='del'>-		.type		= MT_DEVICE</div><div class='add'>+		.bus_id = "uart0_rx",</div><div class='add'>+		.min_signal = 2,</div><div class='add'>+		.max_signal = 2,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart0_tx",</div><div class='add'>+		.min_signal = 3,</div><div class='add'>+		.max_signal = 3,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart1_rx",</div><div class='add'>+		.min_signal = 4,</div><div class='add'>+		.max_signal = 4,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "uart1_tx",</div><div class='add'>+		.min_signal = 5,</div><div class='add'>+		.max_signal = 5,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp2_rx",</div><div class='add'>+		.min_signal = 6,</div><div class='add'>+		.max_signal = 6,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp2_tx",</div><div class='add'>+		.min_signal = 7,</div><div class='add'>+		.max_signal = 7,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp0_rx",</div><div class='add'>+		.min_signal = 8,</div><div class='add'>+		.max_signal = 8,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ssp0_tx",</div><div class='add'>+		.min_signal = 9,</div><div class='add'>+		.max_signal = 9,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2c_rx",</div><div class='add'>+		.min_signal = 10,</div><div class='add'>+		.max_signal = 10,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "i2c_tx",</div><div class='add'>+		.min_signal = 11,</div><div class='add'>+		.max_signal = 11,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "irda",</div><div class='add'>+		.min_signal = 12,</div><div class='add'>+		.max_signal = 12,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "adc",</div><div class='add'>+		.min_signal = 13,</div><div class='add'>+		.max_signal = 13,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "to_jpeg",</div><div class='add'>+		.min_signal = 14,</div><div class='add'>+		.max_signal = 14,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "from_jpeg",</div><div class='add'>+		.min_signal = 15,</div><div class='add'>+		.max_signal = 15,</div><div class='add'>+		.muxval = 0,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras0_rx",</div><div class='add'>+		.min_signal = 0,</div><div class='add'>+		.max_signal = 0,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras0_tx",</div><div class='add'>+		.min_signal = 1,</div><div class='add'>+		.max_signal = 1,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras1_rx",</div><div class='add'>+		.min_signal = 2,</div><div class='add'>+		.max_signal = 2,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras1_tx",</div><div class='add'>+		.min_signal = 3,</div><div class='add'>+		.max_signal = 3,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras2_rx",</div><div class='add'>+		.min_signal = 4,</div><div class='add'>+		.max_signal = 4,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras2_tx",</div><div class='add'>+		.min_signal = 5,</div><div class='add'>+		.max_signal = 5,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras3_rx",</div><div class='add'>+		.min_signal = 6,</div><div class='add'>+		.max_signal = 6,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras3_tx",</div><div class='add'>+		.min_signal = 7,</div><div class='add'>+		.max_signal = 7,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras4_rx",</div><div class='add'>+		.min_signal = 8,</div><div class='add'>+		.max_signal = 8,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras4_tx",</div><div class='add'>+		.min_signal = 9,</div><div class='add'>+		.max_signal = 9,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras5_rx",</div><div class='add'>+		.min_signal = 10,</div><div class='add'>+		.max_signal = 10,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras5_tx",</div><div class='add'>+		.min_signal = 11,</div><div class='add'>+		.max_signal = 11,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras6_rx",</div><div class='add'>+		.min_signal = 12,</div><div class='add'>+		.max_signal = 12,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras6_tx",</div><div class='add'>+		.min_signal = 13,</div><div class='add'>+		.max_signal = 13,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras7_rx",</div><div class='add'>+		.min_signal = 14,</div><div class='add'>+		.max_signal = 14,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ras7_tx",</div><div class='add'>+		.min_signal = 15,</div><div class='add'>+		.max_signal = 15,</div><div class='add'>+		.muxval = 1,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB1,</div><div class='ctx'> 	}, {</div><div class='del'>-		.virtual	= VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),</div><div class='del'>-		.length		= SZ_4K,</div><div class='add'>+		.bus_id = "ext0_rx",</div><div class='add'>+		.min_signal = 0,</div><div class='add'>+		.max_signal = 0,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext0_tx",</div><div class='add'>+		.min_signal = 1,</div><div class='add'>+		.max_signal = 1,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext1_rx",</div><div class='add'>+		.min_signal = 2,</div><div class='add'>+		.max_signal = 2,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext1_tx",</div><div class='add'>+		.min_signal = 3,</div><div class='add'>+		.max_signal = 3,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext2_rx",</div><div class='add'>+		.min_signal = 4,</div><div class='add'>+		.max_signal = 4,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext2_tx",</div><div class='add'>+		.min_signal = 5,</div><div class='add'>+		.max_signal = 5,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext3_rx",</div><div class='add'>+		.min_signal = 6,</div><div class='add'>+		.max_signal = 6,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext3_tx",</div><div class='add'>+		.min_signal = 7,</div><div class='add'>+		.max_signal = 7,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext4_rx",</div><div class='add'>+		.min_signal = 8,</div><div class='add'>+		.max_signal = 8,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext4_tx",</div><div class='add'>+		.min_signal = 9,</div><div class='add'>+		.max_signal = 9,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext5_rx",</div><div class='add'>+		.min_signal = 10,</div><div class='add'>+		.max_signal = 10,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext5_tx",</div><div class='add'>+		.min_signal = 11,</div><div class='add'>+		.max_signal = 11,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext6_rx",</div><div class='add'>+		.min_signal = 12,</div><div class='add'>+		.max_signal = 12,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext6_tx",</div><div class='add'>+		.min_signal = 13,</div><div class='add'>+		.max_signal = 13,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext7_rx",</div><div class='add'>+		.min_signal = 14,</div><div class='add'>+		.max_signal = 14,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	}, {</div><div class='add'>+		.bus_id = "ext7_tx",</div><div class='add'>+		.min_signal = 15,</div><div class='add'>+		.max_signal = 15,</div><div class='add'>+		.muxval = 2,</div><div class='add'>+		.cctl = 0,</div><div class='add'>+		.periph_buses = PL08X_AHB2,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pl08x_platform_data pl080_plat_data = {</div><div class='add'>+	.memcpy_channel = {</div><div class='add'>+		.bus_id = "memcpy",</div><div class='add'>+		.cctl = (PL080_BSIZE_16 &lt;&lt; PL080_CONTROL_SB_SIZE_SHIFT | \</div><div class='add'>+			PL080_BSIZE_16 &lt;&lt; PL080_CONTROL_DB_SIZE_SHIFT | \</div><div class='add'>+			PL080_WIDTH_32BIT &lt;&lt; PL080_CONTROL_SWIDTH_SHIFT | \</div><div class='add'>+			PL080_WIDTH_32BIT &lt;&lt; PL080_CONTROL_DWIDTH_SHIFT | \</div><div class='add'>+			PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE | \</div><div class='add'>+			PL080_CONTROL_PROT_SYS),</div><div class='add'>+	},</div><div class='add'>+	.lli_buses = PL08X_AHB1,</div><div class='add'>+	.mem_buses = PL08X_AHB1,</div><div class='add'>+	.get_signal = pl080_get_signal,</div><div class='add'>+	.put_signal = pl080_put_signal,</div><div class='add'>+	.slave_channels = spear600_dma_info,</div><div class='add'>+	.num_slave_channels = ARRAY_SIZE(spear600_dma_info),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Following will create 16MB static virtual/physical mappings</div><div class='add'>+ * PHYSICAL		VIRTUAL</div><div class='add'>+ * 0xF0000000		0xF0000000</div><div class='add'>+ * 0xF1000000		0xF1000000</div><div class='add'>+ * 0xD0000000		0xFD000000</div><div class='add'>+ * 0xFC000000		0xFC000000</div><div class='add'>+ */</div><div class='add'>+struct map_desc spear6xx_io_desc[] __initdata = {</div><div class='add'>+	{</div><div class='add'>+		.virtual	= VA_SPEAR6XX_ML_CPU_BASE,</div><div class='add'>+		.pfn		= __phys_to_pfn(SPEAR6XX_ML_CPU_BASE),</div><div class='add'>+		.length		= 2 * SZ_16M,</div><div class='add'>+		.type		= MT_DEVICE</div><div class='add'>+	},	{</div><div class='add'>+		.virtual	= VA_SPEAR6XX_ICM1_BASE,</div><div class='add'>+		.pfn		= __phys_to_pfn(SPEAR6XX_ICM1_BASE),</div><div class='add'>+		.length		= SZ_16M,</div><div class='ctx'> 		.type		= MT_DEVICE</div><div class='ctx'> 	}, {</div><div class='del'>-		.virtual	= VA_SPEAR6XX_ICM3_MISC_REG_BASE,</div><div class='del'>-		.pfn		= __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),</div><div class='del'>-		.length		= SZ_4K,</div><div class='add'>+		.virtual	= VA_SPEAR6XX_ICM3_SMI_CTRL_BASE,</div><div class='add'>+		.pfn		= __phys_to_pfn(SPEAR6XX_ICM3_SMI_CTRL_BASE),</div><div class='add'>+		.length		= SZ_16M,</div><div class='ctx'> 		.type		= MT_DEVICE</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -56,9 +419,6 @@ static struct map_desc spear6xx_io_desc[] __initdata = {</div><div class='ctx'> void __init spear6xx_map_io(void)</div><div class='ctx'> {</div><div class='ctx'> 	iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));</div><div class='del'>-</div><div class='del'>-	/* This will initialize clock framework */</div><div class='del'>-	spear6xx_clk_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init spear6xx_timer_init(void)</div><div class='hunk'>@@ -66,6 +426,8 @@ static void __init spear6xx_timer_init(void)</div><div class='ctx'> 	char pclk_name[] = "pll3_48m_clk";</div><div class='ctx'> 	struct clk *gpt_clk, *pclk;</div><div class='ctx'> </div><div class='add'>+	spear6xx_clk_init();</div><div class='add'>+</div><div class='ctx'> 	/* get the system timer clock */</div><div class='ctx'> 	gpt_clk = clk_get_sys("gpt0", NULL);</div><div class='ctx'> 	if (IS_ERR(gpt_clk)) {</div><div class='hunk'>@@ -85,16 +447,24 @@ static void __init spear6xx_timer_init(void)</div><div class='ctx'> 	clk_put(gpt_clk);</div><div class='ctx'> 	clk_put(pclk);</div><div class='ctx'> </div><div class='del'>-	spear_setup_timer();</div><div class='add'>+	spear_setup_of_timer();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct sys_timer spear6xx_timer = {</div><div class='ctx'> 	.init = spear6xx_timer_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Add auxdata to pass platform data */</div><div class='add'>+struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = {</div><div class='add'>+	OF_DEV_AUXDATA("arm,pl080", SPEAR6XX_ICM3_DMA_BASE, NULL,</div><div class='add'>+			&amp;pl080_plat_data),</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void __init spear600_dt_init(void)</div><div class='ctx'> {</div><div class='del'>-	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);</div><div class='add'>+	of_platform_populate(NULL, of_default_bus_match_table,</div><div class='add'>+			spear6xx_auxdata_lookup, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *spear600_dt_board_compat[] = {</div><div class='head'>diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig<br/>index d0f2546706ca..6a113a9bb87a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/Kconfig</a></div><div class='hunk'>@@ -50,6 +50,14 @@ config TEGRA_PCI</div><div class='ctx'> 	depends on ARCH_TEGRA_2x_SOC</div><div class='ctx'> 	select PCI</div><div class='ctx'> </div><div class='add'>+config TEGRA_AHB</div><div class='add'>+	bool "Enable AHB driver for NVIDIA Tegra SoCs"</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Adds AHB configuration functionality for NVIDIA Tegra SoCs,</div><div class='add'>+	  which controls AHB bus master arbitration and some</div><div class='add'>+	  perfomance parameters(priority, prefech size).</div><div class='add'>+</div><div class='ctx'> comment "Tegra board type"</div><div class='ctx'> </div><div class='ctx'> config MACH_HARMONY</div><div class='hunk'>@@ -111,7 +119,7 @@ config MACH_VENTANA</div><div class='ctx'>          Support for the nVidia Ventana development platform</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='del'>-        prompt "Low-level debug console UART"</div><div class='add'>+        prompt "Default low-level debug console UART"</div><div class='ctx'>         default TEGRA_DEBUG_UART_NONE</div><div class='ctx'> </div><div class='ctx'> config TEGRA_DEBUG_UART_NONE</div><div class='hunk'>@@ -134,6 +142,33 @@ config TEGRA_DEBUG_UARTE</div><div class='ctx'> </div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='add'>+choice</div><div class='add'>+	prompt "Automatic low-level debug console UART"</div><div class='add'>+	default TEGRA_DEBUG_UART_AUTO_NONE</div><div class='add'>+</div><div class='add'>+config TEGRA_DEBUG_UART_AUTO_NONE</div><div class='add'>+	bool "None"</div><div class='add'>+</div><div class='add'>+config TEGRA_DEBUG_UART_AUTO_ODMDATA</div><div class='add'>+	bool "Via ODMDATA"</div><div class='add'>+	help</div><div class='add'>+	  Automatically determines which UART to use for low-level debug based</div><div class='add'>+	  on the ODMDATA value. This value is part of the BCT, and is written</div><div class='add'>+	  to the boot memory device using nvflash, or other flashing tool.</div><div class='add'>+	  When bits 19:18 are 3, then bits 17:15 indicate which UART to use;</div><div class='add'>+	  0/1/2/3/4 are UART A/B/C/D/E.</div><div class='add'>+</div><div class='add'>+config TEGRA_DEBUG_UART_AUTO_SCRATCH</div><div class='add'>+	bool "Via UART scratch register"</div><div class='add'>+	help</div><div class='add'>+	  Automatically determines which UART to use for low-level debug based</div><div class='add'>+	  on the UART scratch register value. Some bootloaders put ASCII 'D'</div><div class='add'>+	  in this register when they initialize their own console UART output.</div><div class='add'>+	  Using this option allows the kernel to automatically pick the same</div><div class='add'>+	  UART.</div><div class='add'>+</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='ctx'> config TEGRA_SYSTEM_DMA</div><div class='ctx'> 	bool "Enable system DMA driver for NVIDIA Tegra SoCs"</div><div class='ctx'> 	default y</div><div class='head'>diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile<br/>index d87d968115ec..2eb4445ddb14 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/Makefile</a></div><div class='hunk'>@@ -5,7 +5,6 @@ obj-y                                   += io.o</div><div class='ctx'> obj-y                                   += irq.o</div><div class='ctx'> obj-y                                   += clock.o</div><div class='ctx'> obj-y                                   += timer.o</div><div class='del'>-obj-y                                   += pinmux.o</div><div class='ctx'> obj-y					+= fuse.o</div><div class='ctx'> obj-y					+= pmc.o</div><div class='ctx'> obj-y					+= flowctrl.o</div><div class='hunk'>@@ -14,8 +13,6 @@ obj-$(CONFIG_CPU_IDLE)			+= sleep.o</div><div class='ctx'> obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= powergate.o</div><div class='ctx'> obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra2_clocks.o</div><div class='ctx'> obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= tegra2_emc.o</div><div class='del'>-obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= pinmux-tegra20-tables.o</div><div class='del'>-obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= pinmux-tegra30-tables.o</div><div class='ctx'> obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= board-dt-tegra30.o</div><div class='ctx'> obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= tegra30_clocks.o</div><div class='ctx'> obj-$(CONFIG_SMP)			+= platsmp.o headsmp.o</div><div class='head'>diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c<br/>index 0952494f481a..eb7249db50a5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-dt-tegra20.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board-dt-tegra20.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-dt-tegra20.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-dt-tegra20.c</a></div><div class='hunk'>@@ -37,7 +37,6 @@</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/mach/time.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='del'>-#include &lt;asm/hardware/gic.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/iomap.h&gt;</div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='hunk'>@@ -47,15 +46,7 @@</div><div class='ctx'> #include "clock.h"</div><div class='ctx'> #include "devices.h"</div><div class='ctx'> </div><div class='del'>-void harmony_pinmux_init(void);</div><div class='del'>-void paz00_pinmux_init(void);</div><div class='del'>-void seaboard_pinmux_init(void);</div><div class='del'>-void trimslice_pinmux_init(void);</div><div class='del'>-void ventana_pinmux_init(void);</div><div class='del'>-</div><div class='ctx'> struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {</div><div class='del'>-	OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE + 0x14, "tegra-pinmux", NULL),</div><div class='del'>-	OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),</div><div class='hunk'>@@ -64,9 +55,9 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {</div><div class='ctx'> 	OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),</div><div class='del'>-	OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),</div><div class='del'>-	OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL),</div><div class='del'>-	OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra20-i2s.0", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra20-i2s.1", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra20-das", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",</div><div class='ctx'> 		       &amp;tegra_ehci1_pdata),</div><div class='ctx'> 	OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",</div><div class='hunk'>@@ -95,33 +86,10 @@ static struct of_device_id tegra_dt_match_table[] __initdata = {</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct {</div><div class='del'>-	char *machine;</div><div class='del'>-	void (*init)(void);</div><div class='del'>-} pinmux_configs[] = {</div><div class='del'>-	{ "compulab,trimslice", trimslice_pinmux_init },</div><div class='del'>-	{ "nvidia,harmony", harmony_pinmux_init },</div><div class='del'>-	{ "compal,paz00", paz00_pinmux_init },</div><div class='del'>-	{ "nvidia,seaboard", seaboard_pinmux_init },</div><div class='del'>-	{ "nvidia,ventana", ventana_pinmux_init },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void __init tegra_dt_init(void)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='ctx'> 	tegra_clk_init_from_table(tegra_dt_clk_init_table);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(pinmux_configs); i++) {</div><div class='del'>-		if (of_machine_is_compatible(pinmux_configs[i].machine)) {</div><div class='del'>-			pinmux_configs[i].init();</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	WARN(i == ARRAY_SIZE(pinmux_configs),</div><div class='del'>-		"Unknown platform! Pinmuxing not initialized\n");</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Finished with the static registrations now; fill in the missing</div><div class='ctx'> 	 * devices</div><div class='hunk'>@@ -142,6 +110,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;tegra_timer,</div><div class='ctx'> 	.init_machine	= tegra_dt_init,</div><div class='add'>+	.init_late	= tegra_init_late,</div><div class='ctx'> 	.restart	= tegra_assert_system_reset,</div><div class='ctx'> 	.dt_compat	= tegra20_dt_board_compat,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c<br/>index 5f7c03e972f3..4f76fa7a5da3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-dt-tegra30.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board-dt-tegra30.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-dt-tegra30.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-dt-tegra30.c</a></div><div class='hunk'>@@ -51,12 +51,22 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {</div><div class='ctx'> 	OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C500, "tegra-i2c.2", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C700, "tegra-i2c.3", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000D000, "tegra-i2c.4", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL),</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {</div><div class='ctx'> 	/* name		parent		rate		enabled */</div><div class='ctx'> 	{ "uarta",	"pll_p",	408000000,	true },</div><div class='add'>+	{ "pll_a",	"pll_p_out1",	564480000,	true },</div><div class='add'>+	{ "pll_a_out0",	"pll_a",	11289600,	true },</div><div class='add'>+	{ "extern1",	"pll_a_out0",	0,		true },</div><div class='add'>+	{ "clk_out_1",	"extern1",	0,		true },</div><div class='add'>+	{ "i2s0",	"pll_a_out0",	11289600,	false},</div><div class='add'>+	{ "i2s1",	"pll_a_out0",	11289600,	false},</div><div class='add'>+	{ "i2s2",	"pll_a_out0",	11289600,	false},</div><div class='add'>+	{ "i2s3",	"pll_a_out0",	11289600,	false},</div><div class='add'>+	{ "i2s4",	"pll_a_out0",	11289600,	false},</div><div class='ctx'> 	{ NULL,		NULL,		0,		0},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -80,6 +90,7 @@ DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)")</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.timer		= &amp;tegra_timer,</div><div class='ctx'> 	.init_machine	= tegra30_dt_init,</div><div class='add'>+	.init_late	= tegra_init_late,</div><div class='ctx'> 	.restart	= tegra_assert_system_reset,</div><div class='ctx'> 	.dt_compat	= tegra30_dt_board_compat,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c<br/>index 1af85bccc0f1..83d420fbc58c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-harmony-pinmux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board-harmony-pinmux.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-harmony-pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-harmony-pinmux.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'>  * arch/arm/mach-tegra/board-harmony-pinmux.c</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2010 Google, Inc.</div><div class='add'>+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * This software is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2, as published by the Free Software Foundation, and</div><div class='hunk'>@@ -15,153 +16,138 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/pinmux.h&gt;</div><div class='del'>-#include &lt;mach/pinmux-tegra20.h&gt;</div><div class='del'>-</div><div class='del'>-#include "gpio-names.h"</div><div class='ctx'> #include "board-harmony.h"</div><div class='ctx'> #include "board-pinmux.h"</div><div class='ctx'> </div><div class='del'>-static struct tegra_pingroup_config harmony_pinmux[] = {</div><div class='del'>-	{TEGRA_PINGROUP_ATA,   TEGRA_MUX_IDE,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATB,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATC,   TEGRA_MUX_NAND,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATD,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATE,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4,     TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_CRTP,  TEGRA_MUX_CRT,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_CSUS,  TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DAP1,  TEGRA_MUX_DAP1,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DAP2,  TEGRA_MUX_DAP2,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DAP3,  TEGRA_MUX_DAP3,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DAP4,  TEGRA_MUX_DAP4,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DDC,   TEGRA_MUX_I2C2,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DTA,   TEGRA_MUX_SDIO2,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DTB,   TEGRA_MUX_RSVD1,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DTC,   TEGRA_MUX_RSVD1,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTD,   TEGRA_MUX_SDIO2,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DTE,   TEGRA_MUX_RSVD1,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTF,   TEGRA_MUX_I2C3,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_GMA,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMB,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMC,   TEGRA_MUX_UARTD,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMD,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GME,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GPU,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_GPU7,  TEGRA_MUX_RTCK,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_I2CP,  TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_IRRX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_IRTX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_KBCA,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCB,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCC,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCD,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCE,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCF,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LCSN,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LD0,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD1,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD10,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD11,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD12,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD13,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD14,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD15,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD16,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD17,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD2,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD3,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD4,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD5,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD6,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD7,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD8,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD9,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LDC,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LDI,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHP0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHP1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHP2,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHS,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LM0,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LM1,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LPP,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LPW0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LPW1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LPW2,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LSC0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LSC1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSCK,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSDA,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSDI,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSPI,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LVP0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LVP1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LVS,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_OWC,   TEGRA_MUX_RSVD2,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_PMC,   TEGRA_MUX_PWR_ON,        TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PTA,   TEGRA_MUX_HDMI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_RM,    TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SDB,   TEGRA_MUX_PWM,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SDC,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SDD,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SLXC,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SLXD,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SLXK,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPDI,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPDO,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIA,  TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPIB,  TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPIC,  TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPID,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIE,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIF,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIG,  TEGRA_MUX_SPI2_ALT,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIH,  TEGRA_MUX_SPI2_ALT,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UAA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UAB,   TEGRA_MUX_ULPI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UAC,   TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UAD,   TEGRA_MUX_IRDA,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UCA,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UCB,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UDA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_CK32,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DDRC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCA,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCB,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCD,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCE,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_XM2C,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_XM2D,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct tegra_gpio_table gpio_table[] = {</div><div class='del'>-	{ .gpio = TEGRA_GPIO_SD2_CD,		.enable = true	},</div><div class='del'>-	{ .gpio = TEGRA_GPIO_SD2_WP,		.enable = true	},</div><div class='del'>-	{ .gpio = TEGRA_GPIO_SD2_POWER,		.enable = true	},</div><div class='del'>-	{ .gpio = TEGRA_GPIO_SD4_CD,		.enable = true	},</div><div class='del'>-	{ .gpio = TEGRA_GPIO_SD4_WP,		.enable = true	},</div><div class='del'>-	{ .gpio = TEGRA_GPIO_SD4_POWER,		.enable = true	},</div><div class='del'>-	{ .gpio = TEGRA_GPIO_CDC_IRQ,		.enable = true	},</div><div class='del'>-	{ .gpio = TEGRA_GPIO_HP_DET,		.enable = true	},</div><div class='del'>-	{ .gpio = TEGRA_GPIO_INT_MIC_EN,	.enable = true	},</div><div class='del'>-	{ .gpio = TEGRA_GPIO_EXT_MIC_EN,	.enable = true	},</div><div class='add'>+static struct pinctrl_map harmony_map[] = {</div><div class='add'>+	TEGRA_MAP_MUXCONF("ata",   "ide",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("atb",   "sdio4",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("atc",   "nand",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("atd",   "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ate",   "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("cdev1", "plla_out",      none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("cdev2", "pllp_out4",     down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("crtp",  "crt",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("csus",  "vi_sensor_clk", down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap1",  "dap1",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap2",  "dap2",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap3",  "dap3",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap4",  "dap4",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ddc",   "i2c2",          up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dta",   "sdio2",         up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtb",   "rsvd1",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtc",   "rsvd1",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtd",   "sdio2",         up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dte",   "rsvd1",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtf",   "i2c3",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gma",   "sdio4",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmb",   "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmc",   "uartd",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmd",   "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gme",   "sdio4",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gpu",   "gmi",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gpu7",  "rtck",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gpv",   "pcie",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("hdint", "hdmi",          na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("i2cp",  "i2cp",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("irrx",  "uarta",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("irtx",  "uarta",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbca",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcb",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcc",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcd",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbce",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcf",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lcsn",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld0",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld1",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld10",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld11",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld12",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld13",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld14",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld15",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld16",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld17",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld2",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld3",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld4",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld5",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld6",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld7",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld8",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld9",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ldc",   "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ldi",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhp0",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhp1",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhp2",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhs",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lm0",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lm1",   "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpp",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw0",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw1",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw2",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsc0",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsc1",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsck",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsda",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsdi",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lspi",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lvp0",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lvp1",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lvs",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("owc",   "rsvd2",         na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("pmc",   "pwr_on",        na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("pta",   "hdmi",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("rm",    "i2c1",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdb",   "pwm",           na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdc",   "pwm",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdd",   "pwm",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdio1", "sdio1",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxa",  "pcie",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxc",  "spdif",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxd",  "spdif",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxk",  "pcie",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spdi",  "rsvd2",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spdo",  "rsvd2",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spia",  "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spib",  "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spic",  "gmi",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spid",  "spi1",          down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spie",  "spi1",          up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spif",  "spi1",          down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spig",  "spi2_alt",      none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spih",  "spi2_alt",      up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uaa",   "ulpi",          up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uab",   "ulpi",          up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uac",   "rsvd2",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uad",   "irda",          up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uca",   "uartc",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ucb",   "uartc",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uda",   "ulpi",          none, tristate),</div><div class='add'>+	TEGRA_MAP_CONF("ck32",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("ddrc",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmca",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmcb",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmcc",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmcd",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmce",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("xm2c",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("xm2d",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("ls",      up,   na),</div><div class='add'>+	TEGRA_MAP_CONF("lc",      up,   na),</div><div class='add'>+	TEGRA_MAP_CONF("ld17_0",  down, na),</div><div class='add'>+	TEGRA_MAP_CONF("ld19_18", down, na),</div><div class='add'>+	TEGRA_MAP_CONF("ld21_20", down, na),</div><div class='add'>+	TEGRA_MAP_CONF("ld23_22", down, na),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct tegra_board_pinmux_conf conf = {</div><div class='del'>-	.pgs = harmony_pinmux,</div><div class='del'>-	.pg_count = ARRAY_SIZE(harmony_pinmux),</div><div class='del'>-	.gpios = gpio_table,</div><div class='del'>-	.gpio_count = ARRAY_SIZE(gpio_table),</div><div class='add'>+	.maps = harmony_map,</div><div class='add'>+	.map_count = ARRAY_SIZE(harmony_map),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void harmony_pinmux_init(void)</div><div class='head'>diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c<br/>index c00aadb01e09..e65e837f4013 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-harmony.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board-harmony.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-harmony.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-harmony.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/serial_8250.h&gt;</div><div class='add'>+#include &lt;linux/of_serial.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/pda_power.h&gt;</div><div class='hunk'>@@ -52,6 +53,7 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {</div><div class='ctx'> 		.irq		= INT_UARTD,</div><div class='ctx'> 		.flags		= UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,</div><div class='ctx'> 		.type		= PORT_TEGRA,</div><div class='add'>+		.handle_break	= tegra_serial_handle_break,</div><div class='ctx'> 		.iotype		= UPIO_MEM,</div><div class='ctx'> 		.regshift	= 2,</div><div class='ctx'> 		.uartclk	= 216000000,</div><div class='hunk'>@@ -122,7 +124,6 @@ static struct platform_device *harmony_devices[] __initdata = {</div><div class='ctx'> 	&amp;tegra_ehci3_device,</div><div class='ctx'> 	&amp;tegra_i2s_device1,</div><div class='ctx'> 	&amp;tegra_das_device,</div><div class='del'>-	&amp;tegra_pcm_device,</div><div class='ctx'> 	&amp;harmony_audio_device,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -191,5 +192,6 @@ MACHINE_START(HARMONY, "harmony")</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.timer          = &amp;tegra_timer,</div><div class='ctx'> 	.init_machine   = tegra_harmony_init,</div><div class='add'>+	.init_late	= tegra_init_late,</div><div class='ctx'> 	.restart	= tegra_assert_system_reset,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c<br/>index c775572dcea4..6f1111b48e7c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-paz00-pinmux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board-paz00-pinmux.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-paz00-pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-paz00-pinmux.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'>  * arch/arm/mach-tegra/board-paz00-pinmux.c</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2010 Marc Dietrich &lt;marvin24@gmx.de&gt;</div><div class='add'>+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * This software is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2, as published by the Free Software Foundation, and</div><div class='hunk'>@@ -15,150 +16,138 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/pinmux.h&gt;</div><div class='del'>-#include &lt;mach/pinmux-tegra20.h&gt;</div><div class='del'>-</div><div class='del'>-#include "gpio-names.h"</div><div class='ctx'> #include "board-paz00.h"</div><div class='ctx'> #include "board-pinmux.h"</div><div class='ctx'> </div><div class='del'>-static struct tegra_pingroup_config paz00_pinmux[] = {</div><div class='del'>-	{TEGRA_PINGROUP_ATA,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATB,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATC,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATD,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATE,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4,     TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_CRTP,  TEGRA_MUX_CRT,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_CSUS,  TEGRA_MUX_PLLC_OUT1,     TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DAP1,  TEGRA_MUX_DAP1,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DAP2,  TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DAP3,  TEGRA_MUX_DAP3,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DAP4,  TEGRA_MUX_DAP4,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DDC,   TEGRA_MUX_I2C2,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DTA,   TEGRA_MUX_RSVD1,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTB,   TEGRA_MUX_RSVD1,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTC,   TEGRA_MUX_RSVD1,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTD,   TEGRA_MUX_RSVD1,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTE,   TEGRA_MUX_RSVD1,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTF,   TEGRA_MUX_I2C3,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMA,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMB,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMC,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMD,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GME,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GPU,   TEGRA_MUX_PWM,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GPU7,  TEGRA_MUX_RTCK,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_I2CP,  TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_IRRX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_IRTX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCA,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCB,  TEGRA_MUX_SDIO2,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCC,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCD,  TEGRA_MUX_SDIO2,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCE,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCF,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LCSN,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LD0,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD1,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD10,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD11,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD12,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD13,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD14,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD15,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD16,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD17,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD2,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD3,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD4,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD5,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD6,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD7,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD8,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD9,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LDC,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LDI,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHP0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LHP1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LHP2,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LHS,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LM0,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LM1,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LPP,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LPW0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LPW1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LPW2,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSC0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LSC1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSCK,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSDA,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSDI,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSPI,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LVP0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LVP1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LVS,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_OWC,   TEGRA_MUX_OWR,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_PMC,   TEGRA_MUX_PWR_ON,        TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PTA,   TEGRA_MUX_HDMI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_RM,    TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SDB,   TEGRA_MUX_PWM,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SDC,   TEGRA_MUX_TWC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SDD,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SLXC,  TEGRA_MUX_SPI4,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SLXD,  TEGRA_MUX_SPI4,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SLXK,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPDI,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPDO,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPIA,  TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIB,  TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIC,  TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPID,  TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIE,  TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIF,  TEGRA_MUX_RSVD4,         TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIG,  TEGRA_MUX_SPI2_ALT,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPIH,  TEGRA_MUX_SPI2_ALT,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UAA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_UAB,   TEGRA_MUX_ULPI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_UAC,   TEGRA_MUX_RSVD4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_UAD,   TEGRA_MUX_SPDIF,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UCA,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UCB,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UDA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_CK32,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DDRC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCA,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCB,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCD,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCE,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_XM2C,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_XM2D,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct tegra_gpio_table gpio_table[] = {</div><div class='del'>-	{ .gpio = TEGRA_GPIO_SD1_CD,	.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_GPIO_SD1_WP,	.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_GPIO_SD1_POWER,	.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_ULPI_RST,	.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_WIFI_PWRN,	.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_WIFI_RST,	.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_WIFI_LED,	.enable = true },</div><div class='add'>+static struct pinctrl_map paz00_map[] = {</div><div class='add'>+	TEGRA_MAP_MUXCONF("ata",   "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("atb",   "sdio4",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("atc",   "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("atd",   "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ate",   "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("cdev1", "plla_out",      none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("cdev2", "pllp_out4",     down, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("crtp",  "crt",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("csus",  "pllc_out1",     down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap1",  "dap1",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap2",  "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap3",  "dap3",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap4",  "dap4",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ddc",   "i2c2",          up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dta",   "rsvd1",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtb",   "rsvd1",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtc",   "rsvd1",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtd",   "rsvd1",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dte",   "rsvd1",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtf",   "i2c3",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gma",   "sdio4",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmb",   "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmc",   "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmd",   "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gme",   "sdio4",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gpu",   "pwm",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gpu7",  "rtck",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gpv",   "pcie",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("hdint", "hdmi",          na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("i2cp",  "i2cp",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("irrx",  "uarta",         up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("irtx",  "uarta",         up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbca",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcb",  "sdio2",         up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcc",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcd",  "sdio2",         up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbce",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcf",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lcsn",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld0",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld1",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld10",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld11",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld12",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld13",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld14",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld15",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld16",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld17",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld2",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld3",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld4",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld5",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld6",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld7",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld8",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld9",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ldc",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ldi",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhp0",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhp1",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhp2",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhs",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lm0",   "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lm1",   "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpp",   "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw0",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw1",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw2",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsc0",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsc1",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsck",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsda",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsdi",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lspi",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lvp0",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lvp1",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lvs",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("owc",   "owr",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("pmc",   "pwr_on",        na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("pta",   "hdmi",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("rm",    "i2c1",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdb",   "pwm",           na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdc",   "twc",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdd",   "pwm",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdio1", "sdio1",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxa",  "pcie",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxc",  "spi4",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxd",  "spi4",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxk",  "pcie",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spdi",  "rsvd2",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spdo",  "rsvd2",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spia",  "gmi",           down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spib",  "gmi",           down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spic",  "gmi",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spid",  "gmi",           down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spie",  "gmi",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spif",  "rsvd4",         down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spig",  "spi2_alt",      up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spih",  "spi2_alt",      up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uaa",   "ulpi",          up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uab",   "ulpi",          up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uac",   "rsvd4",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uad",   "spdif",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uca",   "uartc",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ucb",   "uartc",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uda",   "ulpi",          none, driven),</div><div class='add'>+	TEGRA_MAP_CONF("ck32",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("ddrc",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmca",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmcb",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmcc",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmcd",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmce",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("xm2c",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("xm2d",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("ls",      up,   na),</div><div class='add'>+	TEGRA_MAP_CONF("lc",      up,   na),</div><div class='add'>+	TEGRA_MAP_CONF("ld17_0",  down, na),</div><div class='add'>+	TEGRA_MAP_CONF("ld19_18", down, na),</div><div class='add'>+	TEGRA_MAP_CONF("ld21_20", down, na),</div><div class='add'>+	TEGRA_MAP_CONF("ld23_22", down, na),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct tegra_board_pinmux_conf conf = {</div><div class='del'>-	.pgs = paz00_pinmux,</div><div class='del'>-	.pg_count = ARRAY_SIZE(paz00_pinmux),</div><div class='del'>-	.gpios = gpio_table,</div><div class='del'>-	.gpio_count = ARRAY_SIZE(gpio_table),</div><div class='add'>+	.maps = paz00_map,</div><div class='add'>+	.map_count = ARRAY_SIZE(paz00_map),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void paz00_pinmux_init(void)</div><div class='head'>diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c<br/>index 330afdfa2475..bbc1907e98a6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-paz00.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board-paz00.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-paz00.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-paz00.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/serial_8250.h&gt;</div><div class='add'>+#include &lt;linux/of_serial.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/gpio_keys.h&gt;</div><div class='hunk'>@@ -55,6 +56,7 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {</div><div class='ctx'> 		.irq		= INT_UARTA,</div><div class='ctx'> 		.flags		= UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,</div><div class='ctx'> 		.type		= PORT_TEGRA,</div><div class='add'>+		.handle_break	= tegra_serial_handle_break,</div><div class='ctx'> 		.iotype		= UPIO_MEM,</div><div class='ctx'> 		.regshift	= 2,</div><div class='ctx'> 		.uartclk	= 216000000,</div><div class='hunk'>@@ -65,6 +67,7 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {</div><div class='ctx'> 		.irq		= INT_UARTC,</div><div class='ctx'> 		.flags		= UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,</div><div class='ctx'> 		.type		= PORT_TEGRA,</div><div class='add'>+		.handle_break	= tegra_serial_handle_break,</div><div class='ctx'> 		.iotype		= UPIO_MEM,</div><div class='ctx'> 		.regshift	= 2,</div><div class='ctx'> 		.uartclk	= 216000000,</div><div class='hunk'>@@ -159,6 +162,8 @@ static void paz00_i2c_init(void)</div><div class='ctx'> </div><div class='ctx'> static void paz00_usb_init(void)</div><div class='ctx'> {</div><div class='add'>+	tegra_ehci2_ulpi_phy_config.reset_gpio = TEGRA_ULPI_RST;</div><div class='add'>+</div><div class='ctx'> 	platform_device_register(&amp;tegra_ehci2_device);</div><div class='ctx'> 	platform_device_register(&amp;tegra_ehci3_device);</div><div class='ctx'> }</div><div class='hunk'>@@ -176,7 +181,6 @@ static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {</div><div class='ctx'> 	{ "uarta",	"pll_p",	216000000,	true },</div><div class='ctx'> 	{ "uartc",	"pll_p",	216000000,	true },</div><div class='ctx'> </div><div class='del'>-	{ "pll_p_out4",	"pll_p",	24000000,	true },</div><div class='ctx'> 	{ "usbd",	"clk_m",	12000000,	false },</div><div class='ctx'> 	{ "usb2",	"clk_m",	12000000,	false },</div><div class='ctx'> 	{ "usb3",	"clk_m",	12000000,	false },</div><div class='hunk'>@@ -221,5 +225,6 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.timer          = &amp;tegra_timer,</div><div class='ctx'> 	.init_machine   = tegra_paz00_init,</div><div class='add'>+	.init_late	= tegra_init_late,</div><div class='ctx'> 	.restart	= tegra_assert_system_reset,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-tegra/board-pinmux.c b/arch/arm/mach-tegra/board-pinmux.c<br/>index adc3efe979b3..a5574c71b931 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-pinmux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board-pinmux.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-pinmux.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2011, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ * Copyright (c) 2011,2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * This software is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2, as published by the Free Software Foundation, and</div><div class='hunk'>@@ -15,75 +15,59 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/notifier.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/gpio-tegra.h&gt;</div><div class='del'>-#include &lt;mach/pinmux.h&gt;</div><div class='del'>-</div><div class='ctx'> #include "board-pinmux.h"</div><div class='ctx'> #include "devices.h"</div><div class='ctx'> </div><div class='del'>-struct tegra_board_pinmux_conf *confs[2];</div><div class='del'>-</div><div class='del'>-static void tegra_board_pinmux_setup_gpios(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(confs); i++) {</div><div class='del'>-		if (!confs[i])</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		tegra_gpio_config(confs[i]-&gt;gpios, confs[i]-&gt;gpio_count);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tegra_board_pinmux_setup_pinmux(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='add'>+unsigned long tegra_pincfg_pullnone_driven[2] = {</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_PULL, TEGRA_PINCONFIG_PULL_NONE),</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_TRISTATE, TEGRA_PINCONFIG_DRIVEN),</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(confs); i++) {</div><div class='del'>-		if (!confs[i])</div><div class='del'>-			continue;</div><div class='add'>+unsigned long tegra_pincfg_pullnone_tristate[2] = {</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_PULL, TEGRA_PINCONFIG_PULL_NONE),</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_TRISTATE, TEGRA_PINCONFIG_TRISTATE),</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		tegra_pinmux_config_table(confs[i]-&gt;pgs, confs[i]-&gt;pg_count);</div><div class='add'>+unsigned long tegra_pincfg_pullnone_na[1] = {</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_PULL, TEGRA_PINCONFIG_PULL_NONE),</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		if (confs[i]-&gt;drives)</div><div class='del'>-			tegra_drive_pinmux_config_table(confs[i]-&gt;drives,</div><div class='del'>-							confs[i]-&gt;drive_count);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+unsigned long tegra_pincfg_pullup_driven[2] = {</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_PULL, TEGRA_PINCONFIG_PULL_UP),</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_TRISTATE, TEGRA_PINCONFIG_DRIVEN),</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static int tegra_board_pinmux_bus_notify(struct notifier_block *nb,</div><div class='del'>-					 unsigned long event, void *vdev)</div><div class='del'>-{</div><div class='del'>-	static bool had_gpio;</div><div class='del'>-	static bool had_pinmux;</div><div class='add'>+unsigned long tegra_pincfg_pullup_tristate[2] = {</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_PULL, TEGRA_PINCONFIG_PULL_UP),</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_TRISTATE, TEGRA_PINCONFIG_TRISTATE),</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	struct device *dev = vdev;</div><div class='del'>-	const char *devname;</div><div class='add'>+unsigned long tegra_pincfg_pullup_na[1] = {</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_PULL, TEGRA_PINCONFIG_PULL_UP),</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	if (event != BUS_NOTIFY_BOUND_DRIVER)</div><div class='del'>-		return NOTIFY_DONE;</div><div class='add'>+unsigned long tegra_pincfg_pulldown_driven[2] = {</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_PULL, TEGRA_PINCONFIG_PULL_DOWN),</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_TRISTATE, TEGRA_PINCONFIG_DRIVEN),</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	devname = dev_name(dev);</div><div class='add'>+unsigned long tegra_pincfg_pulldown_tristate[2] = {</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_PULL, TEGRA_PINCONFIG_PULL_DOWN),</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_TRISTATE, TEGRA_PINCONFIG_TRISTATE),</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	if (!had_gpio &amp;&amp; !strcmp(devname, GPIO_DEV)) {</div><div class='del'>-		tegra_board_pinmux_setup_gpios();</div><div class='del'>-		had_gpio = true;</div><div class='del'>-	} else if (!had_pinmux &amp;&amp; !strcmp(devname, PINMUX_DEV)) {</div><div class='del'>-		tegra_board_pinmux_setup_pinmux();</div><div class='del'>-		had_pinmux = true;</div><div class='del'>-	}</div><div class='add'>+unsigned long tegra_pincfg_pulldown_na[1] = {</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_PULL, TEGRA_PINCONFIG_PULL_DOWN),</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	if (had_gpio &amp;&amp; had_pinmux)</div><div class='del'>-		return NOTIFY_STOP_MASK;</div><div class='del'>-	else</div><div class='del'>-		return NOTIFY_DONE;</div><div class='del'>-}</div><div class='add'>+unsigned long tegra_pincfg_pullna_driven[1] = {</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_TRISTATE, TEGRA_PINCONFIG_DRIVEN),</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static struct notifier_block nb = {</div><div class='del'>-	.notifier_call = tegra_board_pinmux_bus_notify,</div><div class='add'>+unsigned long tegra_pincfg_pullna_tristate[1] = {</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_TRISTATE, TEGRA_PINCONFIG_TRISTATE),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device *devices[] = {</div><div class='hunk'>@@ -94,11 +78,10 @@ static struct platform_device *devices[] = {</div><div class='ctx'> void tegra_board_pinmux_init(struct tegra_board_pinmux_conf *conf_a,</div><div class='ctx'> 			     struct tegra_board_pinmux_conf *conf_b)</div><div class='ctx'> {</div><div class='del'>-	confs[0] = conf_a;</div><div class='del'>-	confs[1] = conf_b;</div><div class='del'>-</div><div class='del'>-	bus_register_notifier(&amp;platform_bus_type, &amp;nb);</div><div class='add'>+	if (conf_a)</div><div class='add'>+		pinctrl_register_mappings(conf_a-&gt;maps, conf_a-&gt;map_count);</div><div class='add'>+	if (conf_b)</div><div class='add'>+		pinctrl_register_mappings(conf_b-&gt;maps, conf_b-&gt;map_count);</div><div class='ctx'> </div><div class='del'>-	if (!of_machine_is_compatible("nvidia,tegra20"))</div><div class='del'>-		platform_add_devices(devices, ARRAY_SIZE(devices));</div><div class='add'>+	platform_add_devices(devices, ARRAY_SIZE(devices));</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-tegra/board-pinmux.h b/arch/arm/mach-tegra/board-pinmux.h<br/>index 4aac73546f54..c5f3f3381e86 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-pinmux.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board-pinmux.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-pinmux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-pinmux.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2011, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ * Copyright (c) 2011,2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * This software is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2, as published by the Free Software Foundation, and</div><div class='hunk'>@@ -15,21 +15,37 @@</div><div class='ctx'> #ifndef __MACH_TEGRA_BOARD_PINMUX_H</div><div class='ctx'> #define __MACH_TEGRA_BOARD_PINMUX_H</div><div class='ctx'> </div><div class='del'>-#define GPIO_DEV "tegra-gpio"</div><div class='del'>-#define PINMUX_DEV "tegra-pinmux"</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> </div><div class='del'>-struct tegra_pingroup_config;</div><div class='del'>-struct tegra_gpio_table;</div><div class='add'>+#include &lt;mach/pinconf-tegra.h&gt;</div><div class='ctx'> </div><div class='del'>-struct tegra_board_pinmux_conf {</div><div class='del'>-	struct tegra_pingroup_config *pgs;</div><div class='del'>-	int pg_count;</div><div class='add'>+#define PINMUX_DEV "tegra20-pinctrl"</div><div class='add'>+</div><div class='add'>+#define TEGRA_MAP_MUX(_group_, _function_) \</div><div class='add'>+	PIN_MAP_MUX_GROUP_HOG_DEFAULT(PINMUX_DEV, _group_, _function_)</div><div class='add'>+</div><div class='add'>+#define TEGRA_MAP_CONF(_group_, _pull_, _drive_) \</div><div class='add'>+	PIN_MAP_CONFIGS_GROUP_HOG_DEFAULT(PINMUX_DEV, _group_, tegra_pincfg_pull##_pull_##_##_drive_)</div><div class='ctx'> </div><div class='del'>-	struct tegra_drive_pingroup_config *drives;</div><div class='del'>-	int drive_count;</div><div class='add'>+#define TEGRA_MAP_MUXCONF(_group_, _function_, _pull_, _drive_) \</div><div class='add'>+	TEGRA_MAP_MUX(_group_, _function_), \</div><div class='add'>+	TEGRA_MAP_CONF(_group_, _pull_, _drive_)</div><div class='ctx'> </div><div class='del'>-	struct tegra_gpio_table *gpios;</div><div class='del'>-	int gpio_count;</div><div class='add'>+extern unsigned long tegra_pincfg_pullnone_driven[2];</div><div class='add'>+extern unsigned long tegra_pincfg_pullnone_tristate[2];</div><div class='add'>+extern unsigned long tegra_pincfg_pullnone_na[1];</div><div class='add'>+extern unsigned long tegra_pincfg_pullup_driven[2];</div><div class='add'>+extern unsigned long tegra_pincfg_pullup_tristate[2];</div><div class='add'>+extern unsigned long tegra_pincfg_pullup_na[1];</div><div class='add'>+extern unsigned long tegra_pincfg_pulldown_driven[2];</div><div class='add'>+extern unsigned long tegra_pincfg_pulldown_tristate[2];</div><div class='add'>+extern unsigned long tegra_pincfg_pulldown_na[1];</div><div class='add'>+extern unsigned long tegra_pincfg_pullna_driven[1];</div><div class='add'>+extern unsigned long tegra_pincfg_pullna_tristate[1];</div><div class='add'>+</div><div class='add'>+struct tegra_board_pinmux_conf {</div><div class='add'>+	struct pinctrl_map *maps;</div><div class='add'>+	int map_count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void tegra_board_pinmux_init(struct tegra_board_pinmux_conf *conf_a,</div><div class='head'>diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c<br/>index 55e7e43a14ad..11fc8a568c64 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-seaboard-pinmux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board-seaboard-pinmux.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-seaboard-pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-seaboard-pinmux.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2010,2011 NVIDIA Corporation</div><div class='add'>+ * Copyright (C) 2010-2012 NVIDIA Corporation</div><div class='ctx'>  * Copyright (C) 2011 Google, Inc.</div><div class='ctx'>  *</div><div class='ctx'>  * This software is licensed under the terms of the GNU General Public</div><div class='hunk'>@@ -14,216 +14,176 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/pinmux.h&gt;</div><div class='del'>-#include &lt;mach/pinmux-tegra20.h&gt;</div><div class='del'>-</div><div class='del'>-#include "gpio-names.h"</div><div class='del'>-#include "board-pinmux.h"</div><div class='ctx'> #include "board-seaboard.h"</div><div class='add'>+#include "board-pinmux.h"</div><div class='ctx'> </div><div class='del'>-#define DEFAULT_DRIVE(_name)					\</div><div class='del'>-	{							\</div><div class='del'>-		.pingroup = TEGRA_DRIVE_PINGROUP_##_name,	\</div><div class='del'>-		.hsm = TEGRA_HSM_DISABLE,			\</div><div class='del'>-		.schmitt = TEGRA_SCHMITT_ENABLE,		\</div><div class='del'>-		.drive = TEGRA_DRIVE_DIV_1,			\</div><div class='del'>-		.pull_down = TEGRA_PULL_31,			\</div><div class='del'>-		.pull_up = TEGRA_PULL_31,			\</div><div class='del'>-		.slew_rising = TEGRA_SLEW_SLOWEST,		\</div><div class='del'>-		.slew_falling = TEGRA_SLEW_SLOWEST,		\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-static struct tegra_drive_pingroup_config seaboard_drive_pinmux[] = {</div><div class='del'>-	DEFAULT_DRIVE(SDIO1),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct tegra_pingroup_config common_pinmux[] = {</div><div class='del'>-	{TEGRA_PINGROUP_ATA,   TEGRA_MUX_IDE,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATB,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATC,   TEGRA_MUX_NAND,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATD,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATE,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4,     TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_CRTP,  TEGRA_MUX_CRT,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_CSUS,  TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DAP1,  TEGRA_MUX_DAP1,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DAP2,  TEGRA_MUX_DAP2,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DAP3,  TEGRA_MUX_DAP3,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DAP4,  TEGRA_MUX_DAP4,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DTA,   TEGRA_MUX_VI,            TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DTB,   TEGRA_MUX_VI,            TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DTC,   TEGRA_MUX_VI,            TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DTD,   TEGRA_MUX_VI,            TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DTE,   TEGRA_MUX_VI,            TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTF,   TEGRA_MUX_I2C3,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMA,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMB,   TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_GMC,   TEGRA_MUX_UARTD,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GME,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GPU,   TEGRA_MUX_PWM,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GPU7,  TEGRA_MUX_RTCK,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_I2CP,  TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_IRRX,  TEGRA_MUX_UARTB,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_IRTX,  TEGRA_MUX_UARTB,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCA,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCB,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCC,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCD,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCE,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_KBCF,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LCSN,  TEGRA_MUX_RSVD4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LD0,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD1,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD10,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD11,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD12,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD13,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD14,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD15,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD16,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD17,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD2,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD3,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD4,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD5,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD6,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD7,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD8,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD9,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LDC,   TEGRA_MUX_RSVD4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LDI,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHP0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHP1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHP2,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHS,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LM0,   TEGRA_MUX_RSVD4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LM1,   TEGRA_MUX_CRT,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LPP,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LPW1,  TEGRA_MUX_RSVD4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSC0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LSDI,  TEGRA_MUX_RSVD4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSPI,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LVP0,  TEGRA_MUX_RSVD4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LVP1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LVS,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_OWC,   TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_PMC,   TEGRA_MUX_PWR_ON,        TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_RM,    TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SDB,   TEGRA_MUX_SDIO3,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SDC,   TEGRA_MUX_SDIO3,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SDD,   TEGRA_MUX_SDIO3,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SLXD,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPDI,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPDO,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPIB,  TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPID,  TEGRA_MUX_SPI1,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIE,  TEGRA_MUX_SPI1,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIF,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIH,  TEGRA_MUX_SPI2_ALT,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UAA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_UAB,   TEGRA_MUX_ULPI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_UAC,   TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_UAD,   TEGRA_MUX_IRDA,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_UCA,   TEGRA_MUX_UARTC,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_UCB,   TEGRA_MUX_UARTC,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_UDA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_CK32,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DDRC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCA,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCB,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCD,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCE,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_XM2C,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_XM2D,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct tegra_pingroup_config seaboard_pinmux[] = {</div><div class='del'>-	{TEGRA_PINGROUP_DDC,   TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_GMD,   TEGRA_MUX_SFLASH,        TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LPW0,  TEGRA_MUX_HDMI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LPW2,  TEGRA_MUX_HDMI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LSC1,  TEGRA_MUX_HDMI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSCK,  TEGRA_MUX_HDMI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSDA,  TEGRA_MUX_HDMI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_PTA,   TEGRA_MUX_HDMI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SLXC,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SLXK,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPIA,  TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIC,  TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPIG,  TEGRA_MUX_SPI2_ALT,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct tegra_pingroup_config ventana_pinmux[] = {</div><div class='del'>-	{TEGRA_PINGROUP_DDC,  TEGRA_MUX_RSVD2,    TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMD,  TEGRA_MUX_SFLASH,   TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4,    TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4,    TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LSC1, TEGRA_MUX_RSVD4,    TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LSCK, TEGRA_MUX_RSVD4,    TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSDA, TEGRA_MUX_RSVD4,    TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_PTA,  TEGRA_MUX_RSVD2,    TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SLXC, TEGRA_MUX_SDIO3,    TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SLXK, TEGRA_MUX_SDIO3,    TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},</div><div class='add'>+static unsigned long seaboard_pincfg_drive_sdio1[] = {</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE, 0),</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SCHMITT, 0),</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_LOW_POWER_MODE, 3),</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH, 31),</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH, 31),</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING, 3),</div><div class='add'>+	TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SLEW_RATE_RISING, 3),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct tegra_gpio_table common_gpio_table[] = {</div><div class='del'>-	{ .gpio = TEGRA_GPIO_SD2_CD,		.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_GPIO_SD2_WP,		.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_GPIO_SD2_POWER,		.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_GPIO_CDC_IRQ,		.enable = true },</div><div class='add'>+static struct pinctrl_map common_map[] = {</div><div class='add'>+	TEGRA_MAP_MUXCONF("ata",   "ide",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("atb",   "sdio4",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("atc",   "nand",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("atd",   "gmi",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ate",   "gmi",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("cdev1", "plla_out",      none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("cdev2", "pllp_out4",     none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("crtp",  "crt",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("csus",  "vi_sensor_clk", none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap1",  "dap1",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap2",  "dap2",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap3",  "dap3",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap4",  "dap4",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dta",   "vi",            down, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtb",   "vi",            down, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtc",   "vi",            down, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtd",   "vi",            down, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dte",   "vi",            down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtf",   "i2c3",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gma",   "sdio4",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmb",   "gmi",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmc",   "uartd",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gme",   "sdio4",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gpu",   "pwm",           none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gpu7",  "rtck",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gpv",   "pcie",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("hdint", "hdmi",          na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("i2cp",  "i2cp",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("irrx",  "uartb",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("irtx",  "uartb",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbca",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcb",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcc",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcd",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbce",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcf",  "kbc",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lcsn",  "rsvd4",         na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld0",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld1",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld10",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld11",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld12",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld13",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld14",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld15",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld16",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld17",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld2",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld3",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld4",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld5",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld6",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld7",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld8",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld9",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ldc",   "rsvd4",         na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ldi",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhp0",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhp1",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhp2",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhs",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lm0",   "rsvd4",         na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lm1",   "crt",           na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpp",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw1",  "rsvd4",         na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsc0",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsdi",  "rsvd4",         na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lspi",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lvp0",  "rsvd4",         na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lvp1",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lvs",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("owc",   "rsvd2",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("pmc",   "pwr_on",        na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("pta",   "hdmi",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("rm",    "i2c1",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdb",   "sdio3",         na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdc",   "sdio3",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdd",   "sdio3",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdio1", "sdio1",         up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxa",  "pcie",          up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxd",  "spdif",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxk",  "pcie",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spdi",  "rsvd2",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spdo",  "rsvd2",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spib",  "gmi",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spid",  "spi1",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spie",  "spi1",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spif",  "spi1",          down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spih",  "spi2_alt",      up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uaa",   "ulpi",          up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uab",   "ulpi",          up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uac",   "rsvd2",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uad",   "irda",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uca",   "uartc",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ucb",   "uartc",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uda",   "ulpi",          none, driven),</div><div class='add'>+	TEGRA_MAP_CONF("ck32",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("ddrc",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmca",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmcb",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmcc",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmcd",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmce",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("xm2c",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("xm2d",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("ls",      up,   na),</div><div class='add'>+	TEGRA_MAP_CONF("lc",      up,   na),</div><div class='add'>+	TEGRA_MAP_CONF("ld17_0",  down, na),</div><div class='add'>+	TEGRA_MAP_CONF("ld19_18", down, na),</div><div class='add'>+	TEGRA_MAP_CONF("ld21_20", down, na),</div><div class='add'>+	TEGRA_MAP_CONF("ld23_22", down, na),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct tegra_gpio_table seaboard_gpio_table[] = {</div><div class='del'>-	{ .gpio = TEGRA_GPIO_LIDSWITCH,		.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_GPIO_POWERKEY,		.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_GPIO_HP_DET,		.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_GPIO_ISL29018_IRQ,	.enable = true },</div><div class='del'>-	{ .gpio = TEGRA_GPIO_USB1,		.enable = true },</div><div class='add'>+static struct pinctrl_map seaboard_map[] = {</div><div class='add'>+	TEGRA_MAP_MUXCONF("ddc",   "rsvd2",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmd",   "sflash",        none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw0",  "hdmi",          na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw2",  "hdmi",          na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsc1",  "hdmi",          na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsck",  "hdmi",          na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsda",  "hdmi",          na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxc",  "spdif",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spia",  "gmi",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spic",  "gmi",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spig",  "spi2_alt",      up,   tristate),</div><div class='add'>+	PIN_MAP_CONFIGS_GROUP_HOG_DEFAULT(PINMUX_DEV, "drive_sdio1", seaboard_pincfg_drive_sdio1),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct tegra_gpio_table ventana_gpio_table[] = {</div><div class='del'>-	/* hp_det */</div><div class='del'>-	{ .gpio = TEGRA_GPIO_PW2,		.enable = true },</div><div class='del'>-	/* int_mic_en */</div><div class='del'>-	{ .gpio = TEGRA_GPIO_PX0,		.enable = true },</div><div class='del'>-	/* ext_mic_en */</div><div class='del'>-	{ .gpio = TEGRA_GPIO_PX1,		.enable = true },</div><div class='add'>+static struct pinctrl_map ventana_map[] = {</div><div class='add'>+	TEGRA_MAP_MUXCONF("ddc",   "rsvd2",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmd",   "sflash",        none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw0",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw2",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsc1",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsck",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsda",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxc",  "sdio3",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spia",  "gmi",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spic",  "gmi",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spig",  "spi2_alt",      none, tristate),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct tegra_board_pinmux_conf common_conf = {</div><div class='del'>-	.pgs = common_pinmux,</div><div class='del'>-	.pg_count = ARRAY_SIZE(common_pinmux),</div><div class='del'>-	.gpios = common_gpio_table,</div><div class='del'>-	.gpio_count = ARRAY_SIZE(common_gpio_table),</div><div class='add'>+	.maps = common_map,</div><div class='add'>+	.map_count = ARRAY_SIZE(common_map),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct tegra_board_pinmux_conf seaboard_conf = {</div><div class='del'>-	.pgs = seaboard_pinmux,</div><div class='del'>-	.pg_count = ARRAY_SIZE(seaboard_pinmux),</div><div class='del'>-	.drives = seaboard_drive_pinmux,</div><div class='del'>-	.drive_count = ARRAY_SIZE(seaboard_drive_pinmux),</div><div class='del'>-	.gpios = seaboard_gpio_table,</div><div class='del'>-	.gpio_count = ARRAY_SIZE(seaboard_gpio_table),</div><div class='add'>+	.maps = seaboard_map,</div><div class='add'>+	.map_count = ARRAY_SIZE(seaboard_map),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct tegra_board_pinmux_conf ventana_conf = {</div><div class='del'>-	.pgs = ventana_pinmux,</div><div class='del'>-	.pg_count = ARRAY_SIZE(ventana_pinmux),</div><div class='del'>-	.gpios = ventana_gpio_table,</div><div class='del'>-	.gpio_count = ARRAY_SIZE(ventana_gpio_table),</div><div class='add'>+	.maps = ventana_map,</div><div class='add'>+	.map_count = ARRAY_SIZE(ventana_map),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void seaboard_pinmux_init(void)</div><div class='head'>diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c<br/>index d669847f0485..71e9f3fc7fba 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-seaboard.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board-seaboard.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-seaboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-seaboard.c</a></div><div class='hunk'>@@ -18,12 +18,14 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/serial_8250.h&gt;</div><div class='add'>+#include &lt;linux/of_serial.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/gpio_keys.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/tegra_usb.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;sound/wm8903.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -47,6 +49,7 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {</div><div class='ctx'> 		/* Memory and IRQ filled in before registration */</div><div class='ctx'> 		.flags		= UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,</div><div class='ctx'> 		.type		= PORT_TEGRA,</div><div class='add'>+		.handle_break	= tegra_serial_handle_break,</div><div class='ctx'> 		.iotype		= UPIO_MEM,</div><div class='ctx'> 		.regshift	= 2,</div><div class='ctx'> 		.uartclk	= 216000000,</div><div class='hunk'>@@ -153,7 +156,6 @@ static struct platform_device *seaboard_devices[] __initdata = {</div><div class='ctx'> 	&amp;seaboard_gpio_keys_device,</div><div class='ctx'> 	&amp;tegra_i2s_device1,</div><div class='ctx'> 	&amp;tegra_das_device,</div><div class='del'>-	&amp;tegra_pcm_device,</div><div class='ctx'> 	&amp;seaboard_audio_device,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -186,20 +188,10 @@ static struct i2c_board_info __initdata wm8903_device = {</div><div class='ctx'> </div><div class='ctx'> static int seaboard_ehci_init(void)</div><div class='ctx'> {</div><div class='del'>-	int gpio_status;</div><div class='add'>+	struct tegra_ehci_platform_data *pdata;</div><div class='ctx'> </div><div class='del'>-	gpio_status = gpio_request(TEGRA_GPIO_USB1, "VBUS_USB1");</div><div class='del'>-	if (gpio_status &lt; 0) {</div><div class='del'>-		pr_err("VBUS_USB1 request GPIO FAILED\n");</div><div class='del'>-		WARN_ON(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gpio_status = gpio_direction_output(TEGRA_GPIO_USB1, 1);</div><div class='del'>-	if (gpio_status &lt; 0) {</div><div class='del'>-		pr_err("VBUS_USB1 request GPIO DIRECTION FAILED\n");</div><div class='del'>-		WARN_ON(1);</div><div class='del'>-	}</div><div class='del'>-	gpio_set_value(TEGRA_GPIO_USB1, 1);</div><div class='add'>+	pdata = tegra_ehci1_device.dev.platform_data;</div><div class='add'>+	pdata-&gt;vbus_gpio = TEGRA_GPIO_USB1;</div><div class='ctx'> </div><div class='ctx'> 	platform_device_register(&amp;tegra_ehci1_device);</div><div class='ctx'> 	platform_device_register(&amp;tegra_ehci3_device);</div><div class='hunk'>@@ -209,9 +201,6 @@ static int seaboard_ehci_init(void)</div><div class='ctx'> </div><div class='ctx'> static void __init seaboard_i2c_init(void)</div><div class='ctx'> {</div><div class='del'>-	gpio_request(TEGRA_GPIO_ISL29018_IRQ, "isl29018");</div><div class='del'>-	gpio_direction_input(TEGRA_GPIO_ISL29018_IRQ);</div><div class='del'>-</div><div class='ctx'> 	isl29018_device.irq = gpio_to_irq(TEGRA_GPIO_ISL29018_IRQ);</div><div class='ctx'> 	i2c_register_board_info(0, &amp;isl29018_device, 1);</div><div class='ctx'> </div><div class='hunk'>@@ -261,7 +250,6 @@ static void __init tegra_kaen_init(void)</div><div class='ctx'> 	debug_uart_platform_data[0].irq = INT_UARTB;</div><div class='ctx'> </div><div class='ctx'> 	seaboard_audio_pdata.gpio_hp_mute = TEGRA_GPIO_KAEN_HP_MUTE;</div><div class='del'>-	tegra_gpio_enable(TEGRA_GPIO_KAEN_HP_MUTE);</div><div class='ctx'> </div><div class='ctx'> 	seaboard_common_init();</div><div class='ctx'> </div><div class='hunk'>@@ -289,6 +277,7 @@ MACHINE_START(SEABOARD, "seaboard")</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.timer          = &amp;tegra_timer,</div><div class='ctx'> 	.init_machine   = tegra_seaboard_init,</div><div class='add'>+	.init_late	= tegra_init_late,</div><div class='ctx'> 	.restart	= tegra_assert_system_reset,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -300,6 +289,7 @@ MACHINE_START(KAEN, "kaen")</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.timer          = &amp;tegra_timer,</div><div class='ctx'> 	.init_machine   = tegra_kaen_init,</div><div class='add'>+	.init_late	= tegra_init_late,</div><div class='ctx'> 	.restart	= tegra_assert_system_reset,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='hunk'>@@ -311,5 +301,6 @@ MACHINE_START(WARIO, "wario")</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.timer          = &amp;tegra_timer,</div><div class='ctx'> 	.init_machine   = tegra_wario_init,</div><div class='add'>+	.init_late	= tegra_init_late,</div><div class='ctx'> 	.restart	= tegra_assert_system_reset,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c<br/>index a21a2be57cb6..7b39511c0d4d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-trimslice-pinmux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board-trimslice-pinmux.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-trimslice-pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-trimslice-pinmux.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'>  * arch/arm/mach-tegra/board-trimslice-pinmux.c</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2011 CompuLab, Ltd.</div><div class='add'>+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * This software is licensed under the terms of the GNU General Public</div><div class='ctx'>  * License version 2, as published by the Free Software Foundation, and</div><div class='hunk'>@@ -13,150 +14,139 @@</div><div class='ctx'>  * GNU General Public License for more details.</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/pinmux.h&gt;</div><div class='del'>-#include &lt;mach/pinmux-tegra20.h&gt;</div><div class='del'>-</div><div class='del'>-#include "gpio-names.h"</div><div class='del'>-#include "board-pinmux.h"</div><div class='ctx'> #include "board-trimslice.h"</div><div class='add'>+#include "board-pinmux.h"</div><div class='ctx'> </div><div class='del'>-static struct tegra_pingroup_config trimslice_pinmux[] = {</div><div class='del'>-	{TEGRA_PINGROUP_ATA,   TEGRA_MUX_IDE,           TEGRA_PUPD_NORMAL,	TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_ATB,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,	TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_ATC,   TEGRA_MUX_NAND,          TEGRA_PUPD_NORMAL,	TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_ATD,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,	TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_ATE,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,	TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT,      TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4,     TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_CRTP,  TEGRA_MUX_CRT,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_CSUS,  TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DAP1,  TEGRA_MUX_DAP1,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DAP2,  TEGRA_MUX_DAP2,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DAP3,  TEGRA_MUX_DAP3,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DAP4,  TEGRA_MUX_DAP4,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DDC,   TEGRA_MUX_I2C2,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DTA,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTB,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTC,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTD,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTE,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_DTF,   TEGRA_MUX_I2C3,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMA,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMB,   TEGRA_MUX_NAND,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_GMC,   TEGRA_MUX_SFLASH,        TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GMD,   TEGRA_MUX_SFLASH,        TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GME,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_GPU,   TEGRA_MUX_UARTA,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GPU7,  TEGRA_MUX_RTCK,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_I2CP,  TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_IRRX,  TEGRA_MUX_UARTB,         TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_IRTX,  TEGRA_MUX_UARTB,         TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_KBCA,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_KBCB,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_KBCC,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_KBCD,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_KBCE,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_KBCF,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LCSN,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LD0,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD1,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD2,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD3,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD4,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD5,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD6,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD7,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD8,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD9,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD10,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD11,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD12,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD13,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD14,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD15,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD16,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LD17,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LDC,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LDI,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHP0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHP1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHP2,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LHS,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LM0,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LM1,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LPP,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LPW0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LPW1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LPW2,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LSC0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LSC1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSCK,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSDA,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSDI,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LSPI,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LVP0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_LVP1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_LVS,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_OWC,   TEGRA_MUX_RSVD2,         TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_PMC,   TEGRA_MUX_PWR_ON,        TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_PTA,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_RM,    TEGRA_MUX_I2C,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SDB,   TEGRA_MUX_PWM,           TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SDC,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SDD,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SLXC,  TEGRA_MUX_SDIO3,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SLXD,  TEGRA_MUX_SDIO3,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SLXK,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_SPDI,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPDO,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIA,  TEGRA_MUX_SPI2,          TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIB,  TEGRA_MUX_SPI2,          TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIC,  TEGRA_MUX_SPI2,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPID,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIE,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIF,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_DOWN,   TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIG,  TEGRA_MUX_SPI2_ALT,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_SPIH,  TEGRA_MUX_SPI2_ALT,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UAA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UAB,   TEGRA_MUX_ULPI,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UAC,   TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_UAD,   TEGRA_MUX_IRDA,          TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UCA,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UCB,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,     TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_UDA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_TRISTATE},</div><div class='del'>-	{TEGRA_PINGROUP_CK32,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_DDRC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCA,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCB,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCD,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_PMCE,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_XM2C,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-	{TEGRA_PINGROUP_XM2D,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct tegra_gpio_table gpio_table[] = {</div><div class='del'>-	{ .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true	}, /* mmc4 cd */</div><div class='del'>-	{ .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true	}, /* mmc4 wp */</div><div class='del'>-</div><div class='del'>-	{ .gpio = TRIMSLICE_GPIO_USB1_MODE, .enable = true }, /* USB1 mode */</div><div class='del'>-	{ .gpio = TRIMSLICE_GPIO_USB2_RST,  .enable = true }, /* USB2 PHY rst */</div><div class='add'>+static struct pinctrl_map trimslice_map[] = {</div><div class='add'>+	TEGRA_MAP_MUXCONF("ata",   "ide",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("atb",   "sdio4",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("atc",   "nand",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("atd",   "gmi",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ate",   "gmi",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("cdev1", "plla_out",      none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("cdev2", "pllp_out4",     down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("crtp",  "crt",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("csus",  "vi_sensor_clk", down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap1",  "dap1",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap2",  "dap2",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap3",  "dap3",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dap4",  "dap4",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ddc",   "i2c2",          up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dta",   "vi",            none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtb",   "vi",            none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtc",   "vi",            none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtd",   "vi",            none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dte",   "vi",            none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("dtf",   "i2c3",          up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gma",   "sdio4",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmb",   "nand",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmc",   "sflash",        none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gmd",   "sflash",        none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gme",   "gmi",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gpu",   "uarta",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gpu7",  "rtck",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("gpv",   "pcie",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("hdint", "hdmi",          na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("i2cp",  "i2cp",          none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("irrx",  "uartb",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("irtx",  "uartb",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbca",  "kbc",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcb",  "kbc",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcc",  "kbc",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcd",  "kbc",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbce",  "kbc",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("kbcf",  "kbc",           up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lcsn",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld0",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld1",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld10",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld11",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld12",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld13",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld14",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld15",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld16",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld17",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld2",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld3",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld4",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld5",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld6",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld7",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld8",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ld9",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ldc",   "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ldi",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhp0",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhp1",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhp2",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lhs",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lm0",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lm1",   "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpp",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw0",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw1",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lpw2",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsc0",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsc1",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsck",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsda",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lsdi",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lspi",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lvp0",  "displaya",      na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lvp1",  "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("lvs",   "displaya",      na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("owc",   "rsvd2",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("pmc",   "pwr_on",        na,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("pta",   "gmi",           none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("rm",    "i2c1",          up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdb",   "pwm",           na,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdc",   "pwm",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdd",   "pwm",           up,   driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("sdio1", "sdio1",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxa",  "pcie",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxc",  "sdio3",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxd",  "sdio3",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("slxk",  "pcie",          none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spdi",  "spdif",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spdo",  "spdif",         none, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spia",  "spi2",          down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spib",  "spi2",          down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spic",  "spi2",          up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spid",  "spi1",          down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spie",  "spi1",          up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spif",  "spi1",          down, tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spig",  "spi2_alt",      up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("spih",  "spi2_alt",      up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uaa",   "ulpi",          up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uab",   "ulpi",          up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uac",   "rsvd2",         none, driven),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uad",   "irda",          up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uca",   "uartc",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("ucb",   "uartc",         up,   tristate),</div><div class='add'>+	TEGRA_MAP_MUXCONF("uda",   "ulpi",          none, tristate),</div><div class='add'>+	TEGRA_MAP_CONF("ck32",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("ddrc",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmca",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmcb",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmcc",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmcd",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("pmce",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("xm2c",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("xm2d",    none, na),</div><div class='add'>+	TEGRA_MAP_CONF("ls",      up,   na),</div><div class='add'>+	TEGRA_MAP_CONF("lc",      up,   na),</div><div class='add'>+	TEGRA_MAP_CONF("ld17_0",  down, na),</div><div class='add'>+	TEGRA_MAP_CONF("ld19_18", down, na),</div><div class='add'>+	TEGRA_MAP_CONF("ld21_20", down, na),</div><div class='add'>+	TEGRA_MAP_CONF("ld23_22", down, na),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct tegra_board_pinmux_conf conf = {</div><div class='del'>-	.pgs = trimslice_pinmux,</div><div class='del'>-	.pg_count = ARRAY_SIZE(trimslice_pinmux),</div><div class='del'>-	.gpios = gpio_table,</div><div class='del'>-	.gpio_count = ARRAY_SIZE(gpio_table),</div><div class='add'>+	.maps = trimslice_map,</div><div class='add'>+	.map_count = ARRAY_SIZE(trimslice_map),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void trimslice_pinmux_init(void)</div><div class='head'>diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c<br/>index cd52820a3e37..776aa9564d5d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-trimslice.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board-trimslice.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board-trimslice.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board-trimslice.c</a></div><div class='hunk'>@@ -22,9 +22,11 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/serial_8250.h&gt;</div><div class='add'>+#include &lt;linux/of_serial.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/tegra_usb.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/hardware/gic.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='hunk'>@@ -48,6 +50,7 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {</div><div class='ctx'> 		.irq		= INT_UARTA,</div><div class='ctx'> 		.flags		= UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,</div><div class='ctx'> 		.type		= PORT_TEGRA,</div><div class='add'>+		.handle_break	= tegra_serial_handle_break,</div><div class='ctx'> 		.iotype		= UPIO_MEM,</div><div class='ctx'> 		.regshift	= 2,</div><div class='ctx'> 		.uartclk	= 216000000,</div><div class='hunk'>@@ -86,7 +89,6 @@ static struct platform_device *trimslice_devices[] __initdata = {</div><div class='ctx'> 	&amp;tegra_sdhci_device4,</div><div class='ctx'> 	&amp;tegra_i2s_device1,</div><div class='ctx'> 	&amp;tegra_das_device,</div><div class='del'>-	&amp;tegra_pcm_device,</div><div class='ctx'> 	&amp;trimslice_audio_device,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -111,19 +113,15 @@ static void trimslice_i2c_init(void)</div><div class='ctx'> </div><div class='ctx'> static void trimslice_usb_init(void)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='add'>+	struct tegra_ehci_platform_data *pdata;</div><div class='ctx'> </div><div class='del'>-	platform_device_register(&amp;tegra_ehci3_device);</div><div class='del'>-</div><div class='del'>-	platform_device_register(&amp;tegra_ehci2_device);</div><div class='add'>+	pdata = tegra_ehci1_device.dev.platform_data;</div><div class='add'>+	pdata-&gt;vbus_gpio = TRIMSLICE_GPIO_USB1_MODE;</div><div class='ctx'> </div><div class='del'>-	err = gpio_request_one(TRIMSLICE_GPIO_USB1_MODE, GPIOF_OUT_INIT_HIGH,</div><div class='del'>-			       "usb1mode");</div><div class='del'>-	if (err) {</div><div class='del'>-		pr_err("TrimSlice: failed to obtain USB1 mode gpio: %d\n", err);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	tegra_ehci2_ulpi_phy_config.reset_gpio = TEGRA_GPIO_PV0;</div><div class='ctx'> </div><div class='add'>+	platform_device_register(&amp;tegra_ehci3_device);</div><div class='add'>+	platform_device_register(&amp;tegra_ehci2_device);</div><div class='ctx'> 	platform_device_register(&amp;tegra_ehci1_device);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -180,5 +178,6 @@ MACHINE_START(TRIMSLICE, "trimslice")</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.timer          = &amp;tegra_timer,</div><div class='ctx'> 	.init_machine   = tegra_trimslice_init,</div><div class='add'>+	.init_late	= tegra_init_late,</div><div class='ctx'> 	.restart	= tegra_assert_system_reset,</div><div class='ctx'> MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h<br/>index 75d1543d77c0..65014968fc6c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/board.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/board.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/board.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/board.h</a></div><div class='hunk'>@@ -32,5 +32,19 @@ void __init tegra_init_irq(void);</div><div class='ctx'> void __init tegra_dt_init_irq(void);</div><div class='ctx'> int __init tegra_pcie_init(bool init_port0, bool init_port1);</div><div class='ctx'> </div><div class='add'>+void tegra_init_late(void);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+int tegra_clk_debugfs_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int tegra_clk_debugfs_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_ARCH_TEGRA_2x_SOC) &amp;&amp; defined(CONFIG_DEBUG_FS)</div><div class='add'>+int __init tegra_powergate_debugfs_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int tegra_powergate_debugfs_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> extern struct sys_timer tegra_timer;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c<br/>index 8dad8d18cb49..58f981c0819c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/clock.c</a></div><div class='hunk'>@@ -642,7 +642,7 @@ static int clk_debugfs_register(struct clk *c)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init clk_debugfs_init(void)</div><div class='add'>+int __init tegra_clk_debugfs_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk *c;</div><div class='ctx'> 	struct dentry *d;</div><div class='hunk'>@@ -669,5 +669,4 @@ err_out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-late_initcall(clk_debugfs_init);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c<br/>index 22df10fb9972..204a5c8b0b57 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/common.c</a></div><div class='hunk'>@@ -82,10 +82,12 @@ static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {</div><div class='ctx'> 	{ "pll_p_out1",	"pll_p",	28800000,	true },</div><div class='ctx'> 	{ "pll_p_out2",	"pll_p",	48000000,	true },</div><div class='ctx'> 	{ "pll_p_out3",	"pll_p",	72000000,	true },</div><div class='del'>-	{ "pll_p_out4",	"pll_p",	108000000,	true },</div><div class='del'>-	{ "sclk",	"pll_p_out4",	108000000,	true },</div><div class='del'>-	{ "hclk",	"sclk",		108000000,	true },</div><div class='del'>-	{ "pclk",	"hclk",		54000000,	true },</div><div class='add'>+	{ "pll_p_out4",	"pll_p",	24000000,	true },</div><div class='add'>+	{ "pll_c",	"clk_m",	600000000,	true },</div><div class='add'>+	{ "pll_c_out1",	"pll_c",	120000000,	true },</div><div class='add'>+	{ "sclk",	"pll_c_out1",	120000000,	true },</div><div class='add'>+	{ "hclk",	"sclk",		120000000,	true },</div><div class='add'>+	{ "pclk",	"hclk",		60000000,	true },</div><div class='ctx'> 	{ "csite",	NULL,		0,		true },</div><div class='ctx'> 	{ "emc",	NULL,		0,		true },</div><div class='ctx'> 	{ "cpu",	NULL,		0,		true },</div><div class='hunk'>@@ -93,6 +95,17 @@ static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ARCH_TEGRA_3x_SOC</div><div class='add'>+static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {</div><div class='add'>+	/* name		parent		rate		enabled */</div><div class='add'>+	{ "clk_m",	NULL,		0,		true },</div><div class='add'>+	{ "pll_p",	"clk_m",	408000000,	true },</div><div class='add'>+	{ "pll_p_out1",	"pll_p",	9600000,	true },</div><div class='add'>+	{ NULL,		NULL,		0,		0},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_CACHE_L2X0</div><div class='hunk'>@@ -127,8 +140,15 @@ void __init tegra30_init_early(void)</div><div class='ctx'> {</div><div class='ctx'> 	tegra_init_fuse();</div><div class='ctx'> 	tegra30_init_clocks();</div><div class='add'>+	tegra_clk_init_from_table(tegra30_clk_init_table);</div><div class='ctx'> 	tegra_init_cache(0x441, 0x551);</div><div class='ctx'> 	tegra_pmc_init();</div><div class='ctx'> 	tegra_powergate_init();</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+void __init tegra_init_late(void)</div><div class='add'>+{</div><div class='add'>+	tegra_clk_debugfs_init();</div><div class='add'>+	tegra_powergate_debugfs_init();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c<br/>index 5f6b867e20b4..c70e65ffa36b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/devices.c</a></div><div class='hunk'>@@ -110,7 +110,7 @@ static struct resource pinmux_resource[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device tegra_pinmux_device = {</div><div class='del'>-	.name		= "tegra-pinmux",</div><div class='add'>+	.name		= "tegra20-pinctrl",</div><div class='ctx'> 	.id		= -1,</div><div class='ctx'> 	.resource	= pinmux_resource,</div><div class='ctx'> 	.num_resources	= ARRAY_SIZE(pinmux_resource),</div><div class='hunk'>@@ -439,26 +439,28 @@ static struct resource tegra_usb3_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {</div><div class='del'>-	/* All existing boards use GPIO PV0 for phy reset */</div><div class='del'>-	.reset_gpio = TEGRA_GPIO_PV0,</div><div class='add'>+struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {</div><div class='add'>+	.reset_gpio = -1,</div><div class='ctx'> 	.clk = "cdev2",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct tegra_ehci_platform_data tegra_ehci1_pdata = {</div><div class='ctx'> 	.operating_mode = TEGRA_USB_OTG,</div><div class='ctx'> 	.power_down_on_bus_suspend = 1,</div><div class='add'>+	.vbus_gpio = -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct tegra_ehci_platform_data tegra_ehci2_pdata = {</div><div class='ctx'> 	.phy_config = &amp;tegra_ehci2_ulpi_phy_config,</div><div class='ctx'> 	.operating_mode = TEGRA_USB_HOST,</div><div class='ctx'> 	.power_down_on_bus_suspend = 1,</div><div class='add'>+	.vbus_gpio = -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct tegra_ehci_platform_data tegra_ehci3_pdata = {</div><div class='ctx'> 	.operating_mode = TEGRA_USB_HOST,</div><div class='ctx'> 	.power_down_on_bus_suspend = 1,</div><div class='add'>+	.vbus_gpio = -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);</div><div class='hunk'>@@ -671,14 +673,14 @@ static struct resource i2s_resource2[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device tegra_i2s_device1 = {</div><div class='del'>-	.name		= "tegra-i2s",</div><div class='add'>+	.name		= "tegra20-i2s",</div><div class='ctx'> 	.id		= 0,</div><div class='ctx'> 	.resource	= i2s_resource1,</div><div class='ctx'> 	.num_resources	= ARRAY_SIZE(i2s_resource1),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device tegra_i2s_device2 = {</div><div class='del'>-	.name		= "tegra-i2s",</div><div class='add'>+	.name		= "tegra20-i2s",</div><div class='ctx'> 	.id		= 1,</div><div class='ctx'> 	.resource	= i2s_resource2,</div><div class='ctx'> 	.num_resources	= ARRAY_SIZE(i2s_resource2),</div><div class='hunk'>@@ -693,13 +695,8 @@ static struct resource tegra_das_resources[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device tegra_das_device = {</div><div class='del'>-	.name		= "tegra-das",</div><div class='add'>+	.name		= "tegra20-das",</div><div class='ctx'> 	.id		= -1,</div><div class='ctx'> 	.num_resources	= ARRAY_SIZE(tegra_das_resources),</div><div class='ctx'> 	.resource	= tegra_das_resources,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-struct platform_device tegra_pcm_device = {</div><div class='del'>-	.name = "tegra-pcm-audio",</div><div class='del'>-	.id = -1,</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h<br/>index ec455679b219..4f5052726495 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/devices.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/devices.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/devices.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/devices.h</a></div><div class='hunk'>@@ -22,6 +22,10 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/tegra_usb.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;mach/usb_phy.h&gt;</div><div class='add'>+</div><div class='add'>+extern struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config;</div><div class='add'>+</div><div class='ctx'> extern struct tegra_ehci_platform_data tegra_ehci1_pdata;</div><div class='ctx'> extern struct tegra_ehci_platform_data tegra_ehci2_pdata;</div><div class='ctx'> extern struct tegra_ehci_platform_data tegra_ehci3_pdata;</div><div class='hunk'>@@ -52,6 +56,5 @@ extern struct platform_device tegra_pmu_device;</div><div class='ctx'> extern struct platform_device tegra_i2s_device1;</div><div class='ctx'> extern struct platform_device tegra_i2s_device2;</div><div class='ctx'> extern struct platform_device tegra_das_device;</div><div class='del'>-extern struct platform_device tegra_pcm_device;</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c<br/>index fef66a7486ed..f07488e0bd32 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/flowctrl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/flowctrl.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/flowctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/flowctrl.c</a></div><div class='hunk'>@@ -53,10 +53,10 @@ static void flowctrl_update(u8 offset, u32 value)</div><div class='ctx'> </div><div class='ctx'> void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)</div><div class='ctx'> {</div><div class='del'>-	return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);</div><div class='add'>+	return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value)</div><div class='ctx'> {</div><div class='del'>-	return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);</div><div class='add'>+	return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h<br/>index 3c9339058bec..9077092812c0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/include/mach/dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/include/mach/dma.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/include/mach/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/dma.h</a></div><div class='hunk'>@@ -51,8 +51,6 @@</div><div class='ctx'> #define TEGRA_DMA_REQ_SEL_OWR			25</div><div class='ctx'> #define TEGRA_DMA_REQ_SEL_INVALID		31</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_TEGRA_SYSTEM_DMA)</div><div class='del'>-</div><div class='ctx'> struct tegra_dma_req;</div><div class='ctx'> struct tegra_dma_channel;</div><div class='ctx'> </div><div class='hunk'>@@ -151,5 +149,3 @@ void tegra_dma_free_channel(struct tegra_dma_channel *ch);</div><div class='ctx'> int __init tegra_dma_init(void);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-tegra/include/mach/gpio-tegra.h b/arch/arm/mach-tegra/include/mach/gpio-tegra.h<br/>index 6140820555e1..a978b3cc3a8d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/include/mach/gpio-tegra.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/include/mach/gpio-tegra.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/include/mach/gpio-tegra.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/gpio-tegra.h</a></div><div class='hunk'>@@ -25,13 +25,4 @@</div><div class='ctx'> </div><div class='ctx'> #define TEGRA_NR_GPIOS		INT_GPIO_NR</div><div class='ctx'> </div><div class='del'>-struct tegra_gpio_table {</div><div class='del'>-	int	gpio;	/* GPIO number */</div><div class='del'>-	bool	enable;	/* Enable for GPIO at init? */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void tegra_gpio_config(struct tegra_gpio_table *table, int num);</div><div class='del'>-void tegra_gpio_enable(int gpio);</div><div class='del'>-void tegra_gpio_disable(int gpio);</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-tegra/include/mach/pinmux-tegra20.h b/arch/arm/mach-tegra/include/mach/pinmux-tegra20.h<br/>deleted file mode 100644<br/>index 6a40c1dbab17..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/include/mach/pinmux-tegra20.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/include/mach/pinmux-tegra20.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,184 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/arch/arm/mach-tegra/include/mach/pinmux-tegra20.h</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 Google, Inc.</div><div class='del'>- *</div><div class='del'>- * This software is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2, as published by the Free Software Foundation, and</div><div class='del'>- * may be copied, distributed, and modified under those terms.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_TEGRA_PINMUX_TEGRA20_H</div><div class='del'>-#define __MACH_TEGRA_PINMUX_TEGRA20_H</div><div class='del'>-</div><div class='del'>-enum tegra_pingroup {</div><div class='del'>-	TEGRA_PINGROUP_ATA = 0,</div><div class='del'>-	TEGRA_PINGROUP_ATB,</div><div class='del'>-	TEGRA_PINGROUP_ATC,</div><div class='del'>-	TEGRA_PINGROUP_ATD,</div><div class='del'>-	TEGRA_PINGROUP_ATE,</div><div class='del'>-	TEGRA_PINGROUP_CDEV1,</div><div class='del'>-	TEGRA_PINGROUP_CDEV2,</div><div class='del'>-	TEGRA_PINGROUP_CRTP,</div><div class='del'>-	TEGRA_PINGROUP_CSUS,</div><div class='del'>-	TEGRA_PINGROUP_DAP1,</div><div class='del'>-	TEGRA_PINGROUP_DAP2,</div><div class='del'>-	TEGRA_PINGROUP_DAP3,</div><div class='del'>-	TEGRA_PINGROUP_DAP4,</div><div class='del'>-	TEGRA_PINGROUP_DDC,</div><div class='del'>-	TEGRA_PINGROUP_DTA,</div><div class='del'>-	TEGRA_PINGROUP_DTB,</div><div class='del'>-	TEGRA_PINGROUP_DTC,</div><div class='del'>-	TEGRA_PINGROUP_DTD,</div><div class='del'>-	TEGRA_PINGROUP_DTE,</div><div class='del'>-	TEGRA_PINGROUP_DTF,</div><div class='del'>-	TEGRA_PINGROUP_GMA,</div><div class='del'>-	TEGRA_PINGROUP_GMB,</div><div class='del'>-	TEGRA_PINGROUP_GMC,</div><div class='del'>-	TEGRA_PINGROUP_GMD,</div><div class='del'>-	TEGRA_PINGROUP_GME,</div><div class='del'>-	TEGRA_PINGROUP_GPU,</div><div class='del'>-	TEGRA_PINGROUP_GPU7,</div><div class='del'>-	TEGRA_PINGROUP_GPV,</div><div class='del'>-	TEGRA_PINGROUP_HDINT,</div><div class='del'>-	TEGRA_PINGROUP_I2CP,</div><div class='del'>-	TEGRA_PINGROUP_IRRX,</div><div class='del'>-	TEGRA_PINGROUP_IRTX,</div><div class='del'>-	TEGRA_PINGROUP_KBCA,</div><div class='del'>-	TEGRA_PINGROUP_KBCB,</div><div class='del'>-	TEGRA_PINGROUP_KBCC,</div><div class='del'>-	TEGRA_PINGROUP_KBCD,</div><div class='del'>-	TEGRA_PINGROUP_KBCE,</div><div class='del'>-	TEGRA_PINGROUP_KBCF,</div><div class='del'>-	TEGRA_PINGROUP_LCSN,</div><div class='del'>-	TEGRA_PINGROUP_LD0,</div><div class='del'>-	TEGRA_PINGROUP_LD1,</div><div class='del'>-	TEGRA_PINGROUP_LD10,</div><div class='del'>-	TEGRA_PINGROUP_LD11,</div><div class='del'>-	TEGRA_PINGROUP_LD12,</div><div class='del'>-	TEGRA_PINGROUP_LD13,</div><div class='del'>-	TEGRA_PINGROUP_LD14,</div><div class='del'>-	TEGRA_PINGROUP_LD15,</div><div class='del'>-	TEGRA_PINGROUP_LD16,</div><div class='del'>-	TEGRA_PINGROUP_LD17,</div><div class='del'>-	TEGRA_PINGROUP_LD2,</div><div class='del'>-	TEGRA_PINGROUP_LD3,</div><div class='del'>-	TEGRA_PINGROUP_LD4,</div><div class='del'>-	TEGRA_PINGROUP_LD5,</div><div class='del'>-	TEGRA_PINGROUP_LD6,</div><div class='del'>-	TEGRA_PINGROUP_LD7,</div><div class='del'>-	TEGRA_PINGROUP_LD8,</div><div class='del'>-	TEGRA_PINGROUP_LD9,</div><div class='del'>-	TEGRA_PINGROUP_LDC,</div><div class='del'>-	TEGRA_PINGROUP_LDI,</div><div class='del'>-	TEGRA_PINGROUP_LHP0,</div><div class='del'>-	TEGRA_PINGROUP_LHP1,</div><div class='del'>-	TEGRA_PINGROUP_LHP2,</div><div class='del'>-	TEGRA_PINGROUP_LHS,</div><div class='del'>-	TEGRA_PINGROUP_LM0,</div><div class='del'>-	TEGRA_PINGROUP_LM1,</div><div class='del'>-	TEGRA_PINGROUP_LPP,</div><div class='del'>-	TEGRA_PINGROUP_LPW0,</div><div class='del'>-	TEGRA_PINGROUP_LPW1,</div><div class='del'>-	TEGRA_PINGROUP_LPW2,</div><div class='del'>-	TEGRA_PINGROUP_LSC0,</div><div class='del'>-	TEGRA_PINGROUP_LSC1,</div><div class='del'>-	TEGRA_PINGROUP_LSCK,</div><div class='del'>-	TEGRA_PINGROUP_LSDA,</div><div class='del'>-	TEGRA_PINGROUP_LSDI,</div><div class='del'>-	TEGRA_PINGROUP_LSPI,</div><div class='del'>-	TEGRA_PINGROUP_LVP0,</div><div class='del'>-	TEGRA_PINGROUP_LVP1,</div><div class='del'>-	TEGRA_PINGROUP_LVS,</div><div class='del'>-	TEGRA_PINGROUP_OWC,</div><div class='del'>-	TEGRA_PINGROUP_PMC,</div><div class='del'>-	TEGRA_PINGROUP_PTA,</div><div class='del'>-	TEGRA_PINGROUP_RM,</div><div class='del'>-	TEGRA_PINGROUP_SDB,</div><div class='del'>-	TEGRA_PINGROUP_SDC,</div><div class='del'>-	TEGRA_PINGROUP_SDD,</div><div class='del'>-	TEGRA_PINGROUP_SDIO1,</div><div class='del'>-	TEGRA_PINGROUP_SLXA,</div><div class='del'>-	TEGRA_PINGROUP_SLXC,</div><div class='del'>-	TEGRA_PINGROUP_SLXD,</div><div class='del'>-	TEGRA_PINGROUP_SLXK,</div><div class='del'>-	TEGRA_PINGROUP_SPDI,</div><div class='del'>-	TEGRA_PINGROUP_SPDO,</div><div class='del'>-	TEGRA_PINGROUP_SPIA,</div><div class='del'>-	TEGRA_PINGROUP_SPIB,</div><div class='del'>-	TEGRA_PINGROUP_SPIC,</div><div class='del'>-	TEGRA_PINGROUP_SPID,</div><div class='del'>-	TEGRA_PINGROUP_SPIE,</div><div class='del'>-	TEGRA_PINGROUP_SPIF,</div><div class='del'>-	TEGRA_PINGROUP_SPIG,</div><div class='del'>-	TEGRA_PINGROUP_SPIH,</div><div class='del'>-	TEGRA_PINGROUP_UAA,</div><div class='del'>-	TEGRA_PINGROUP_UAB,</div><div class='del'>-	TEGRA_PINGROUP_UAC,</div><div class='del'>-	TEGRA_PINGROUP_UAD,</div><div class='del'>-	TEGRA_PINGROUP_UCA,</div><div class='del'>-	TEGRA_PINGROUP_UCB,</div><div class='del'>-	TEGRA_PINGROUP_UDA,</div><div class='del'>-	/* these pin groups only have pullup and pull down control */</div><div class='del'>-	TEGRA_PINGROUP_CK32,</div><div class='del'>-	TEGRA_PINGROUP_DDRC,</div><div class='del'>-	TEGRA_PINGROUP_PMCA,</div><div class='del'>-	TEGRA_PINGROUP_PMCB,</div><div class='del'>-	TEGRA_PINGROUP_PMCC,</div><div class='del'>-	TEGRA_PINGROUP_PMCD,</div><div class='del'>-	TEGRA_PINGROUP_PMCE,</div><div class='del'>-	TEGRA_PINGROUP_XM2C,</div><div class='del'>-	TEGRA_PINGROUP_XM2D,</div><div class='del'>-	TEGRA_MAX_PINGROUP,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum tegra_drive_pingroup {</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_AO1 = 0,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_AO2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_AT1,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_AT2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_CDEV1,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_CDEV2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_CSUS,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DAP1,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DAP2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DAP3,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DAP4,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DBG,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_LCD1,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_LCD2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_SDMMC2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_SDMMC3,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_SPI,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_UAA,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_UAB,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_UART2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_UART3,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_VI1,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_VI2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_XM2A,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_XM2C,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_XM2D,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_XM2CLK,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_MEMCOMP,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_SDIO1,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_CRT,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DDC,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GMA,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GMB,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GMC,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GMD,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GME,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_OWR,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_UAD,</div><div class='del'>-	TEGRA_MAX_DRIVE_PINGROUP,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h b/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h<br/>deleted file mode 100644<br/>index c1aee3eb2df1..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/include/mach/pinmux-tegra30.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,320 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 Google, Inc.</div><div class='del'>- * Copyright (C) 2010,2011 Nvidia, Inc.</div><div class='del'>- *</div><div class='del'>- * This software is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2, as published by the Free Software Foundation, and</div><div class='del'>- * may be copied, distributed, and modified under those terms.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_TEGRA_PINMUX_TEGRA30_H</div><div class='del'>-#define __MACH_TEGRA_PINMUX_TEGRA30_H</div><div class='del'>-</div><div class='del'>-enum tegra_pingroup {</div><div class='del'>-	TEGRA_PINGROUP_ULPI_DATA0 = 0,</div><div class='del'>-	TEGRA_PINGROUP_ULPI_DATA1,</div><div class='del'>-	TEGRA_PINGROUP_ULPI_DATA2,</div><div class='del'>-	TEGRA_PINGROUP_ULPI_DATA3,</div><div class='del'>-	TEGRA_PINGROUP_ULPI_DATA4,</div><div class='del'>-	TEGRA_PINGROUP_ULPI_DATA5,</div><div class='del'>-	TEGRA_PINGROUP_ULPI_DATA6,</div><div class='del'>-	TEGRA_PINGROUP_ULPI_DATA7,</div><div class='del'>-	TEGRA_PINGROUP_ULPI_CLK,</div><div class='del'>-	TEGRA_PINGROUP_ULPI_DIR,</div><div class='del'>-	TEGRA_PINGROUP_ULPI_NXT,</div><div class='del'>-	TEGRA_PINGROUP_ULPI_STP,</div><div class='del'>-	TEGRA_PINGROUP_DAP3_FS,</div><div class='del'>-	TEGRA_PINGROUP_DAP3_DIN,</div><div class='del'>-	TEGRA_PINGROUP_DAP3_DOUT,</div><div class='del'>-	TEGRA_PINGROUP_DAP3_SCLK,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PV0,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PV1,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC1_CLK,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC1_CMD,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC1_DAT3,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC1_DAT2,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC1_DAT1,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC1_DAT0,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PV2,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PV3,</div><div class='del'>-	TEGRA_PINGROUP_CLK2_OUT,</div><div class='del'>-	TEGRA_PINGROUP_CLK2_REQ,</div><div class='del'>-	TEGRA_PINGROUP_LCD_PWR1,</div><div class='del'>-	TEGRA_PINGROUP_LCD_PWR2,</div><div class='del'>-	TEGRA_PINGROUP_LCD_SDIN,</div><div class='del'>-	TEGRA_PINGROUP_LCD_SDOUT,</div><div class='del'>-	TEGRA_PINGROUP_LCD_WR_N,</div><div class='del'>-	TEGRA_PINGROUP_LCD_CS0_N,</div><div class='del'>-	TEGRA_PINGROUP_LCD_DC0,</div><div class='del'>-	TEGRA_PINGROUP_LCD_SCK,</div><div class='del'>-	TEGRA_PINGROUP_LCD_PWR0,</div><div class='del'>-	TEGRA_PINGROUP_LCD_PCLK,</div><div class='del'>-	TEGRA_PINGROUP_LCD_DE,</div><div class='del'>-	TEGRA_PINGROUP_LCD_HSYNC,</div><div class='del'>-	TEGRA_PINGROUP_LCD_VSYNC,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D0,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D1,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D2,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D3,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D4,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D5,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D6,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D7,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D8,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D9,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D10,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D11,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D12,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D13,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D14,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D15,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D16,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D17,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D18,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D19,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D20,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D21,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D22,</div><div class='del'>-	TEGRA_PINGROUP_LCD_D23,</div><div class='del'>-	TEGRA_PINGROUP_LCD_CS1_N,</div><div class='del'>-	TEGRA_PINGROUP_LCD_M1,</div><div class='del'>-	TEGRA_PINGROUP_LCD_DC1,</div><div class='del'>-	TEGRA_PINGROUP_HDMI_INT,</div><div class='del'>-	TEGRA_PINGROUP_DDC_SCL,</div><div class='del'>-	TEGRA_PINGROUP_DDC_SDA,</div><div class='del'>-	TEGRA_PINGROUP_CRT_HSYNC,</div><div class='del'>-	TEGRA_PINGROUP_CRT_VSYNC,</div><div class='del'>-	TEGRA_PINGROUP_VI_D0,</div><div class='del'>-	TEGRA_PINGROUP_VI_D1,</div><div class='del'>-	TEGRA_PINGROUP_VI_D2,</div><div class='del'>-	TEGRA_PINGROUP_VI_D3,</div><div class='del'>-	TEGRA_PINGROUP_VI_D4,</div><div class='del'>-	TEGRA_PINGROUP_VI_D5,</div><div class='del'>-	TEGRA_PINGROUP_VI_D6,</div><div class='del'>-	TEGRA_PINGROUP_VI_D7,</div><div class='del'>-	TEGRA_PINGROUP_VI_D8,</div><div class='del'>-	TEGRA_PINGROUP_VI_D9,</div><div class='del'>-	TEGRA_PINGROUP_VI_D10,</div><div class='del'>-	TEGRA_PINGROUP_VI_D11,</div><div class='del'>-	TEGRA_PINGROUP_VI_PCLK,</div><div class='del'>-	TEGRA_PINGROUP_VI_MCLK,</div><div class='del'>-	TEGRA_PINGROUP_VI_VSYNC,</div><div class='del'>-	TEGRA_PINGROUP_VI_HSYNC,</div><div class='del'>-	TEGRA_PINGROUP_UART2_RXD,</div><div class='del'>-	TEGRA_PINGROUP_UART2_TXD,</div><div class='del'>-	TEGRA_PINGROUP_UART2_RTS_N,</div><div class='del'>-	TEGRA_PINGROUP_UART2_CTS_N,</div><div class='del'>-	TEGRA_PINGROUP_UART3_TXD,</div><div class='del'>-	TEGRA_PINGROUP_UART3_RXD,</div><div class='del'>-	TEGRA_PINGROUP_UART3_CTS_N,</div><div class='del'>-	TEGRA_PINGROUP_UART3_RTS_N,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PU0,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PU1,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PU2,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PU3,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PU4,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PU5,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PU6,</div><div class='del'>-	TEGRA_PINGROUP_GEN1_I2C_SDA,</div><div class='del'>-	TEGRA_PINGROUP_GEN1_I2C_SCL,</div><div class='del'>-	TEGRA_PINGROUP_DAP4_FS,</div><div class='del'>-	TEGRA_PINGROUP_DAP4_DIN,</div><div class='del'>-	TEGRA_PINGROUP_DAP4_DOUT,</div><div class='del'>-	TEGRA_PINGROUP_DAP4_SCLK,</div><div class='del'>-	TEGRA_PINGROUP_CLK3_OUT,</div><div class='del'>-	TEGRA_PINGROUP_CLK3_REQ,</div><div class='del'>-	TEGRA_PINGROUP_GMI_WP_N,</div><div class='del'>-	TEGRA_PINGROUP_GMI_IORDY,</div><div class='del'>-	TEGRA_PINGROUP_GMI_WAIT,</div><div class='del'>-	TEGRA_PINGROUP_GMI_ADV_N,</div><div class='del'>-	TEGRA_PINGROUP_GMI_CLK,</div><div class='del'>-	TEGRA_PINGROUP_GMI_CS0_N,</div><div class='del'>-	TEGRA_PINGROUP_GMI_CS1_N,</div><div class='del'>-	TEGRA_PINGROUP_GMI_CS2_N,</div><div class='del'>-	TEGRA_PINGROUP_GMI_CS3_N,</div><div class='del'>-	TEGRA_PINGROUP_GMI_CS4_N,</div><div class='del'>-	TEGRA_PINGROUP_GMI_CS6_N,</div><div class='del'>-	TEGRA_PINGROUP_GMI_CS7_N,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD0,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD1,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD2,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD3,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD4,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD5,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD6,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD7,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD8,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD9,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD10,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD11,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD12,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD13,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD14,</div><div class='del'>-	TEGRA_PINGROUP_GMI_AD15,</div><div class='del'>-	TEGRA_PINGROUP_GMI_A16,</div><div class='del'>-	TEGRA_PINGROUP_GMI_A17,</div><div class='del'>-	TEGRA_PINGROUP_GMI_A18,</div><div class='del'>-	TEGRA_PINGROUP_GMI_A19,</div><div class='del'>-	TEGRA_PINGROUP_GMI_WR_N,</div><div class='del'>-	TEGRA_PINGROUP_GMI_OE_N,</div><div class='del'>-	TEGRA_PINGROUP_GMI_DQS,</div><div class='del'>-	TEGRA_PINGROUP_GMI_RST_N,</div><div class='del'>-	TEGRA_PINGROUP_GEN2_I2C_SCL,</div><div class='del'>-	TEGRA_PINGROUP_GEN2_I2C_SDA,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC4_CLK,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC4_CMD,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC4_DAT0,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC4_DAT1,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC4_DAT2,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC4_DAT3,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC4_DAT4,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC4_DAT5,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC4_DAT6,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC4_DAT7,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC4_RST_N,</div><div class='del'>-	TEGRA_PINGROUP_CAM_MCLK,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PCC1,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PBB0,</div><div class='del'>-	TEGRA_PINGROUP_CAM_I2C_SCL,</div><div class='del'>-	TEGRA_PINGROUP_CAM_I2C_SDA,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PBB3,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PBB4,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PBB5,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PBB6,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PBB7,</div><div class='del'>-	TEGRA_PINGROUP_GPIO_PCC2,</div><div class='del'>-	TEGRA_PINGROUP_JTAG_RTCK,</div><div class='del'>-	TEGRA_PINGROUP_PWR_I2C_SCL,</div><div class='del'>-	TEGRA_PINGROUP_PWR_I2C_SDA,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW0,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW1,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW2,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW3,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW4,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW5,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW6,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW7,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW8,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW9,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW10,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW11,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW12,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW13,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW14,</div><div class='del'>-	TEGRA_PINGROUP_KB_ROW15,</div><div class='del'>-	TEGRA_PINGROUP_KB_COL0,</div><div class='del'>-	TEGRA_PINGROUP_KB_COL1,</div><div class='del'>-	TEGRA_PINGROUP_KB_COL2,</div><div class='del'>-	TEGRA_PINGROUP_KB_COL3,</div><div class='del'>-	TEGRA_PINGROUP_KB_COL4,</div><div class='del'>-	TEGRA_PINGROUP_KB_COL5,</div><div class='del'>-	TEGRA_PINGROUP_KB_COL6,</div><div class='del'>-	TEGRA_PINGROUP_KB_COL7,</div><div class='del'>-	TEGRA_PINGROUP_CLK_32K_OUT,</div><div class='del'>-	TEGRA_PINGROUP_SYS_CLK_REQ,</div><div class='del'>-	TEGRA_PINGROUP_CORE_PWR_REQ,</div><div class='del'>-	TEGRA_PINGROUP_CPU_PWR_REQ,</div><div class='del'>-	TEGRA_PINGROUP_PWR_INT_N,</div><div class='del'>-	TEGRA_PINGROUP_CLK_32K_IN,</div><div class='del'>-	TEGRA_PINGROUP_OWR,</div><div class='del'>-	TEGRA_PINGROUP_DAP1_FS,</div><div class='del'>-	TEGRA_PINGROUP_DAP1_DIN,</div><div class='del'>-	TEGRA_PINGROUP_DAP1_DOUT,</div><div class='del'>-	TEGRA_PINGROUP_DAP1_SCLK,</div><div class='del'>-	TEGRA_PINGROUP_CLK1_REQ,</div><div class='del'>-	TEGRA_PINGROUP_CLK1_OUT,</div><div class='del'>-	TEGRA_PINGROUP_SPDIF_IN,</div><div class='del'>-	TEGRA_PINGROUP_SPDIF_OUT,</div><div class='del'>-	TEGRA_PINGROUP_DAP2_FS,</div><div class='del'>-	TEGRA_PINGROUP_DAP2_DIN,</div><div class='del'>-	TEGRA_PINGROUP_DAP2_DOUT,</div><div class='del'>-	TEGRA_PINGROUP_DAP2_SCLK,</div><div class='del'>-	TEGRA_PINGROUP_SPI2_MOSI,</div><div class='del'>-	TEGRA_PINGROUP_SPI2_MISO,</div><div class='del'>-	TEGRA_PINGROUP_SPI2_CS0_N,</div><div class='del'>-	TEGRA_PINGROUP_SPI2_SCK,</div><div class='del'>-	TEGRA_PINGROUP_SPI1_MOSI,</div><div class='del'>-	TEGRA_PINGROUP_SPI1_SCK,</div><div class='del'>-	TEGRA_PINGROUP_SPI1_CS0_N,</div><div class='del'>-	TEGRA_PINGROUP_SPI1_MISO,</div><div class='del'>-	TEGRA_PINGROUP_SPI2_CS1_N,</div><div class='del'>-	TEGRA_PINGROUP_SPI2_CS2_N,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC3_CLK,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC3_CMD,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC3_DAT0,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC3_DAT1,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC3_DAT2,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC3_DAT3,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC3_DAT4,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC3_DAT5,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC3_DAT6,</div><div class='del'>-	TEGRA_PINGROUP_SDMMC3_DAT7,</div><div class='del'>-	TEGRA_PINGROUP_PEX_L0_PRSNT_N,</div><div class='del'>-	TEGRA_PINGROUP_PEX_L0_RST_N,</div><div class='del'>-	TEGRA_PINGROUP_PEX_L0_CLKREQ_N,</div><div class='del'>-	TEGRA_PINGROUP_PEX_WAKE_N,</div><div class='del'>-	TEGRA_PINGROUP_PEX_L1_PRSNT_N,</div><div class='del'>-	TEGRA_PINGROUP_PEX_L1_RST_N,</div><div class='del'>-	TEGRA_PINGROUP_PEX_L1_CLKREQ_N,</div><div class='del'>-	TEGRA_PINGROUP_PEX_L2_PRSNT_N,</div><div class='del'>-	TEGRA_PINGROUP_PEX_L2_RST_N,</div><div class='del'>-	TEGRA_PINGROUP_PEX_L2_CLKREQ_N,</div><div class='del'>-	TEGRA_PINGROUP_HDMI_CEC,</div><div class='del'>-	TEGRA_MAX_PINGROUP,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum tegra_drive_pingroup {</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_AO1 = 0,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_AO2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_AT1,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_AT2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_AT3,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_AT4,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_AT5,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_CDEV1,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_CDEV2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_CSUS,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DAP1,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DAP2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DAP3,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DAP4,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DBG,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_LCD1,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_LCD2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_SDIO2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_SDIO3,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_SPI,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_UAA,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_UAB,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_UART2,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_UART3,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_VI1,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_SDIO1,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_CRT,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DDC,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GMA,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GMB,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GMC,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GMD,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GME,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GMF,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GMG,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GMH,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_OWR,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_UAD,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_GPV,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_DEV3,</div><div class='del'>-	TEGRA_DRIVE_PINGROUP_CEC,</div><div class='del'>-	TEGRA_MAX_DRIVE_PINGROUP,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-tegra/include/mach/pinmux.h b/arch/arm/mach-tegra/include/mach/pinmux.h<br/>deleted file mode 100644<br/>index 055f1792c8ff..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/include/mach/pinmux.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/include/mach/pinmux.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,302 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/arch/arm/mach-tegra/include/mach/pinmux.h</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 Google, Inc.</div><div class='del'>- * Copyright (C) 2010,2011 Nvidia, Inc.</div><div class='del'>- *</div><div class='del'>- * This software is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2, as published by the Free Software Foundation, and</div><div class='del'>- * may be copied, distributed, and modified under those terms.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_TEGRA_PINMUX_H</div><div class='del'>-#define __MACH_TEGRA_PINMUX_H</div><div class='del'>-</div><div class='del'>-enum tegra_mux_func {</div><div class='del'>-	TEGRA_MUX_RSVD = 0x8000,</div><div class='del'>-	TEGRA_MUX_RSVD1 = 0x8000,</div><div class='del'>-	TEGRA_MUX_RSVD2 = 0x8001,</div><div class='del'>-	TEGRA_MUX_RSVD3 = 0x8002,</div><div class='del'>-	TEGRA_MUX_RSVD4 = 0x8003,</div><div class='del'>-	TEGRA_MUX_INVALID = 0x4000,</div><div class='del'>-	TEGRA_MUX_NONE = -1,</div><div class='del'>-	TEGRA_MUX_AHB_CLK,</div><div class='del'>-	TEGRA_MUX_APB_CLK,</div><div class='del'>-	TEGRA_MUX_AUDIO_SYNC,</div><div class='del'>-	TEGRA_MUX_CRT,</div><div class='del'>-	TEGRA_MUX_DAP1,</div><div class='del'>-	TEGRA_MUX_DAP2,</div><div class='del'>-	TEGRA_MUX_DAP3,</div><div class='del'>-	TEGRA_MUX_DAP4,</div><div class='del'>-	TEGRA_MUX_DAP5,</div><div class='del'>-	TEGRA_MUX_DISPLAYA,</div><div class='del'>-	TEGRA_MUX_DISPLAYB,</div><div class='del'>-	TEGRA_MUX_EMC_TEST0_DLL,</div><div class='del'>-	TEGRA_MUX_EMC_TEST1_DLL,</div><div class='del'>-	TEGRA_MUX_GMI,</div><div class='del'>-	TEGRA_MUX_GMI_INT,</div><div class='del'>-	TEGRA_MUX_HDMI,</div><div class='del'>-	TEGRA_MUX_I2C,</div><div class='del'>-	TEGRA_MUX_I2C2,</div><div class='del'>-	TEGRA_MUX_I2C3,</div><div class='del'>-	TEGRA_MUX_IDE,</div><div class='del'>-	TEGRA_MUX_IRDA,</div><div class='del'>-	TEGRA_MUX_KBC,</div><div class='del'>-	TEGRA_MUX_MIO,</div><div class='del'>-	TEGRA_MUX_MIPI_HS,</div><div class='del'>-	TEGRA_MUX_NAND,</div><div class='del'>-	TEGRA_MUX_OSC,</div><div class='del'>-	TEGRA_MUX_OWR,</div><div class='del'>-	TEGRA_MUX_PCIE,</div><div class='del'>-	TEGRA_MUX_PLLA_OUT,</div><div class='del'>-	TEGRA_MUX_PLLC_OUT1,</div><div class='del'>-	TEGRA_MUX_PLLM_OUT1,</div><div class='del'>-	TEGRA_MUX_PLLP_OUT2,</div><div class='del'>-	TEGRA_MUX_PLLP_OUT3,</div><div class='del'>-	TEGRA_MUX_PLLP_OUT4,</div><div class='del'>-	TEGRA_MUX_PWM,</div><div class='del'>-	TEGRA_MUX_PWR_INTR,</div><div class='del'>-	TEGRA_MUX_PWR_ON,</div><div class='del'>-	TEGRA_MUX_RTCK,</div><div class='del'>-	TEGRA_MUX_SDIO1,</div><div class='del'>-	TEGRA_MUX_SDIO2,</div><div class='del'>-	TEGRA_MUX_SDIO3,</div><div class='del'>-	TEGRA_MUX_SDIO4,</div><div class='del'>-	TEGRA_MUX_SFLASH,</div><div class='del'>-	TEGRA_MUX_SPDIF,</div><div class='del'>-	TEGRA_MUX_SPI1,</div><div class='del'>-	TEGRA_MUX_SPI2,</div><div class='del'>-	TEGRA_MUX_SPI2_ALT,</div><div class='del'>-	TEGRA_MUX_SPI3,</div><div class='del'>-	TEGRA_MUX_SPI4,</div><div class='del'>-	TEGRA_MUX_TRACE,</div><div class='del'>-	TEGRA_MUX_TWC,</div><div class='del'>-	TEGRA_MUX_UARTA,</div><div class='del'>-	TEGRA_MUX_UARTB,</div><div class='del'>-	TEGRA_MUX_UARTC,</div><div class='del'>-	TEGRA_MUX_UARTD,</div><div class='del'>-	TEGRA_MUX_UARTE,</div><div class='del'>-	TEGRA_MUX_ULPI,</div><div class='del'>-	TEGRA_MUX_VI,</div><div class='del'>-	TEGRA_MUX_VI_SENSOR_CLK,</div><div class='del'>-	TEGRA_MUX_XIO,</div><div class='del'>-	TEGRA_MUX_BLINK,</div><div class='del'>-	TEGRA_MUX_CEC,</div><div class='del'>-	TEGRA_MUX_CLK12,</div><div class='del'>-	TEGRA_MUX_DAP,</div><div class='del'>-	TEGRA_MUX_DAPSDMMC2,</div><div class='del'>-	TEGRA_MUX_DDR,</div><div class='del'>-	TEGRA_MUX_DEV3,</div><div class='del'>-	TEGRA_MUX_DTV,</div><div class='del'>-	TEGRA_MUX_VI_ALT1,</div><div class='del'>-	TEGRA_MUX_VI_ALT2,</div><div class='del'>-	TEGRA_MUX_VI_ALT3,</div><div class='del'>-	TEGRA_MUX_EMC_DLL,</div><div class='del'>-	TEGRA_MUX_EXTPERIPH1,</div><div class='del'>-	TEGRA_MUX_EXTPERIPH2,</div><div class='del'>-	TEGRA_MUX_EXTPERIPH3,</div><div class='del'>-	TEGRA_MUX_GMI_ALT,</div><div class='del'>-	TEGRA_MUX_HDA,</div><div class='del'>-	TEGRA_MUX_HSI,</div><div class='del'>-	TEGRA_MUX_I2C4,</div><div class='del'>-	TEGRA_MUX_I2C5,</div><div class='del'>-	TEGRA_MUX_I2CPWR,</div><div class='del'>-	TEGRA_MUX_I2S0,</div><div class='del'>-	TEGRA_MUX_I2S1,</div><div class='del'>-	TEGRA_MUX_I2S2,</div><div class='del'>-	TEGRA_MUX_I2S3,</div><div class='del'>-	TEGRA_MUX_I2S4,</div><div class='del'>-	TEGRA_MUX_NAND_ALT,</div><div class='del'>-	TEGRA_MUX_POPSDIO4,</div><div class='del'>-	TEGRA_MUX_POPSDMMC4,</div><div class='del'>-	TEGRA_MUX_PWM0,</div><div class='del'>-	TEGRA_MUX_PWM1,</div><div class='del'>-	TEGRA_MUX_PWM2,</div><div class='del'>-	TEGRA_MUX_PWM3,</div><div class='del'>-	TEGRA_MUX_SATA,</div><div class='del'>-	TEGRA_MUX_SPI5,</div><div class='del'>-	TEGRA_MUX_SPI6,</div><div class='del'>-	TEGRA_MUX_SYSCLK,</div><div class='del'>-	TEGRA_MUX_VGP1,</div><div class='del'>-	TEGRA_MUX_VGP2,</div><div class='del'>-	TEGRA_MUX_VGP3,</div><div class='del'>-	TEGRA_MUX_VGP4,</div><div class='del'>-	TEGRA_MUX_VGP5,</div><div class='del'>-	TEGRA_MUX_VGP6,</div><div class='del'>-	TEGRA_MUX_SAFE,</div><div class='del'>-	TEGRA_MAX_MUX,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum tegra_pullupdown {</div><div class='del'>-	TEGRA_PUPD_NORMAL = 0,</div><div class='del'>-	TEGRA_PUPD_PULL_DOWN,</div><div class='del'>-	TEGRA_PUPD_PULL_UP,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum tegra_tristate {</div><div class='del'>-	TEGRA_TRI_NORMAL = 0,</div><div class='del'>-	TEGRA_TRI_TRISTATE = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum tegra_pin_io {</div><div class='del'>-	TEGRA_PIN_OUTPUT = 0,</div><div class='del'>-	TEGRA_PIN_INPUT = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum tegra_vddio {</div><div class='del'>-	TEGRA_VDDIO_BB = 0,</div><div class='del'>-	TEGRA_VDDIO_LCD,</div><div class='del'>-	TEGRA_VDDIO_VI,</div><div class='del'>-	TEGRA_VDDIO_UART,</div><div class='del'>-	TEGRA_VDDIO_DDR,</div><div class='del'>-	TEGRA_VDDIO_NAND,</div><div class='del'>-	TEGRA_VDDIO_SYS,</div><div class='del'>-	TEGRA_VDDIO_AUDIO,</div><div class='del'>-	TEGRA_VDDIO_SD,</div><div class='del'>-	TEGRA_VDDIO_CAM,</div><div class='del'>-	TEGRA_VDDIO_GMI,</div><div class='del'>-	TEGRA_VDDIO_PEXCTL,</div><div class='del'>-	TEGRA_VDDIO_SDMMC1,</div><div class='del'>-	TEGRA_VDDIO_SDMMC3,</div><div class='del'>-	TEGRA_VDDIO_SDMMC4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct tegra_pingroup_config {</div><div class='del'>-	int pingroup;</div><div class='del'>-	enum tegra_mux_func	func;</div><div class='del'>-	enum tegra_pullupdown	pupd;</div><div class='del'>-	enum tegra_tristate	tristate;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum tegra_slew {</div><div class='del'>-	TEGRA_SLEW_FASTEST = 0,</div><div class='del'>-	TEGRA_SLEW_FAST,</div><div class='del'>-	TEGRA_SLEW_SLOW,</div><div class='del'>-	TEGRA_SLEW_SLOWEST,</div><div class='del'>-	TEGRA_MAX_SLEW,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum tegra_pull_strength {</div><div class='del'>-	TEGRA_PULL_0 = 0,</div><div class='del'>-	TEGRA_PULL_1,</div><div class='del'>-	TEGRA_PULL_2,</div><div class='del'>-	TEGRA_PULL_3,</div><div class='del'>-	TEGRA_PULL_4,</div><div class='del'>-	TEGRA_PULL_5,</div><div class='del'>-	TEGRA_PULL_6,</div><div class='del'>-	TEGRA_PULL_7,</div><div class='del'>-	TEGRA_PULL_8,</div><div class='del'>-	TEGRA_PULL_9,</div><div class='del'>-	TEGRA_PULL_10,</div><div class='del'>-	TEGRA_PULL_11,</div><div class='del'>-	TEGRA_PULL_12,</div><div class='del'>-	TEGRA_PULL_13,</div><div class='del'>-	TEGRA_PULL_14,</div><div class='del'>-	TEGRA_PULL_15,</div><div class='del'>-	TEGRA_PULL_16,</div><div class='del'>-	TEGRA_PULL_17,</div><div class='del'>-	TEGRA_PULL_18,</div><div class='del'>-	TEGRA_PULL_19,</div><div class='del'>-	TEGRA_PULL_20,</div><div class='del'>-	TEGRA_PULL_21,</div><div class='del'>-	TEGRA_PULL_22,</div><div class='del'>-	TEGRA_PULL_23,</div><div class='del'>-	TEGRA_PULL_24,</div><div class='del'>-	TEGRA_PULL_25,</div><div class='del'>-	TEGRA_PULL_26,</div><div class='del'>-	TEGRA_PULL_27,</div><div class='del'>-	TEGRA_PULL_28,</div><div class='del'>-	TEGRA_PULL_29,</div><div class='del'>-	TEGRA_PULL_30,</div><div class='del'>-	TEGRA_PULL_31,</div><div class='del'>-	TEGRA_MAX_PULL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum tegra_drive {</div><div class='del'>-	TEGRA_DRIVE_DIV_8 = 0,</div><div class='del'>-	TEGRA_DRIVE_DIV_4,</div><div class='del'>-	TEGRA_DRIVE_DIV_2,</div><div class='del'>-	TEGRA_DRIVE_DIV_1,</div><div class='del'>-	TEGRA_MAX_DRIVE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum tegra_hsm {</div><div class='del'>-	TEGRA_HSM_DISABLE = 0,</div><div class='del'>-	TEGRA_HSM_ENABLE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum tegra_schmitt {</div><div class='del'>-	TEGRA_SCHMITT_DISABLE = 0,</div><div class='del'>-	TEGRA_SCHMITT_ENABLE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct tegra_drive_pingroup_config {</div><div class='del'>-	int pingroup;</div><div class='del'>-	enum tegra_hsm hsm;</div><div class='del'>-	enum tegra_schmitt schmitt;</div><div class='del'>-	enum tegra_drive drive;</div><div class='del'>-	enum tegra_pull_strength pull_down;</div><div class='del'>-	enum tegra_pull_strength pull_up;</div><div class='del'>-	enum tegra_slew slew_rising;</div><div class='del'>-	enum tegra_slew slew_falling;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct tegra_drive_pingroup_desc {</div><div class='del'>-	const char *name;</div><div class='del'>-	s16 reg_bank;</div><div class='del'>-	s16 reg;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct tegra_pingroup_desc {</div><div class='del'>-	const char *name;</div><div class='del'>-	int funcs[4];</div><div class='del'>-	int func_safe;</div><div class='del'>-	int vddio;</div><div class='del'>-	enum tegra_pin_io io_default;</div><div class='del'>-	s16 tri_bank;	/* Register bank the tri_reg exists within */</div><div class='del'>-	s16 mux_bank;	/* Register bank the mux_reg exists within */</div><div class='del'>-	s16 pupd_bank;	/* Register bank the pupd_reg exists within */</div><div class='del'>-	s16 tri_reg; 	/* offset into the TRISTATE_REG_* register bank */</div><div class='del'>-	s16 mux_reg;	/* offset into the PIN_MUX_CTL_* register bank */</div><div class='del'>-	s16 pupd_reg;	/* offset into the PULL_UPDOWN_REG_* register bank */</div><div class='del'>-	s8 tri_bit; 	/* offset into the TRISTATE_REG_* register bit */</div><div class='del'>-	s8 mux_bit;	/* offset into the PIN_MUX_CTL_* register bit */</div><div class='del'>-	s8 pupd_bit;	/* offset into the PULL_UPDOWN_REG_* register bit */</div><div class='del'>-	s8 lock_bit;	/* offset of the LOCK bit into mux register bit */</div><div class='del'>-	s8 od_bit;	/* offset of the OD bit into mux register bit */</div><div class='del'>-	s8 ioreset_bit;	/* offset of the IO_RESET bit into mux register bit */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-typedef void (*pinmux_init) (const struct tegra_pingroup_desc **pg,</div><div class='del'>-	int *pg_max, const struct tegra_drive_pingroup_desc **pgdrive,</div><div class='del'>-	int *pgdrive_max);</div><div class='del'>-</div><div class='del'>-void tegra20_pinmux_init(const struct tegra_pingroup_desc **pg, int *pg_max,</div><div class='del'>-	const struct tegra_drive_pingroup_desc **pgdrive, int *pgdrive_max);</div><div class='del'>-</div><div class='del'>-void tegra30_pinmux_init(const struct tegra_pingroup_desc **pg, int *pg_max,</div><div class='del'>-	const struct tegra_drive_pingroup_desc **pgdrive, int *pgdrive_max);</div><div class='del'>-</div><div class='del'>-int tegra_pinmux_set_tristate(int pg, enum tegra_tristate tristate);</div><div class='del'>-int tegra_pinmux_set_pullupdown(int pg, enum tegra_pullupdown pupd);</div><div class='del'>-</div><div class='del'>-void tegra_pinmux_config_table(const struct tegra_pingroup_config *config,</div><div class='del'>-	int len);</div><div class='del'>-</div><div class='del'>-void tegra_drive_pinmux_config_table(struct tegra_drive_pingroup_config *config,</div><div class='del'>-	int len);</div><div class='del'>-void tegra_pinmux_set_safe_pinmux_table(const struct tegra_pingroup_config *config,</div><div class='del'>-	int len);</div><div class='del'>-void tegra_pinmux_config_pinmux_table(const struct tegra_pingroup_config *config,</div><div class='del'>-	int len);</div><div class='del'>-void tegra_pinmux_config_tristate_table(const struct tegra_pingroup_config *config,</div><div class='del'>-	int len, enum tegra_tristate tristate);</div><div class='del'>-void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *config,</div><div class='del'>-	int len, enum tegra_pullupdown pupd);</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-tegra/include/mach/tegra-ahb.h b/arch/arm/mach-tegra/include/mach/tegra-ahb.h<br/>new file mode 100644<br/>index 000000000000..e0f8c84b1d8c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/include/mach/tegra-ahb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/tegra-ahb.h</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MACH_TEGRA_AHB_H__</div><div class='add'>+#define __MACH_TEGRA_AHB_H__</div><div class='add'>+</div><div class='add'>+extern int tegra_ahb_enable_smmu(struct device_node *ahb);</div><div class='add'>+</div><div class='add'>+#endif	/* __MACH_TEGRA_AHB_H__ */</div><div class='head'>diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h<br/>index 5a440f315e57..937c4c50219e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/include/mach/uncompress.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/include/mach/uncompress.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/uncompress.h</a></div><div class='hunk'>@@ -63,52 +63,86 @@ static inline void save_uart_address(void)</div><div class='ctx'> 		buf[0] = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Setup before decompression.  This is where we do UART selection for</div><div class='del'>- * earlyprintk and init the uart_base register.</div><div class='del'>- */</div><div class='del'>-static inline void arch_decomp_setup(void)</div><div class='add'>+static const struct {</div><div class='add'>+	u32 base;</div><div class='add'>+	u32 reset_reg;</div><div class='add'>+	u32 clock_reg;</div><div class='add'>+	u32 bit;</div><div class='add'>+} uarts[] = {</div><div class='add'>+	{</div><div class='add'>+		TEGRA_UARTA_BASE,</div><div class='add'>+		TEGRA_CLK_RESET_BASE + 0x04,</div><div class='add'>+		TEGRA_CLK_RESET_BASE + 0x10,</div><div class='add'>+		6,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		TEGRA_UARTB_BASE,</div><div class='add'>+		TEGRA_CLK_RESET_BASE + 0x04,</div><div class='add'>+		TEGRA_CLK_RESET_BASE + 0x10,</div><div class='add'>+		7,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		TEGRA_UARTC_BASE,</div><div class='add'>+		TEGRA_CLK_RESET_BASE + 0x08,</div><div class='add'>+		TEGRA_CLK_RESET_BASE + 0x14,</div><div class='add'>+		23,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		TEGRA_UARTD_BASE,</div><div class='add'>+		TEGRA_CLK_RESET_BASE + 0x0c,</div><div class='add'>+		TEGRA_CLK_RESET_BASE + 0x18,</div><div class='add'>+		1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		TEGRA_UARTE_BASE,</div><div class='add'>+		TEGRA_CLK_RESET_BASE + 0x0c,</div><div class='add'>+		TEGRA_CLK_RESET_BASE + 0x18,</div><div class='add'>+		2,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline bool uart_clocked(int i)</div><div class='add'>+{</div><div class='add'>+	if (*(u8 *)uarts[i].reset_reg &amp; BIT(uarts[i].bit))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!(*(u8 *)uarts[i].clock_reg &amp; BIT(uarts[i].bit)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA</div><div class='add'>+int auto_odmdata(void)</div><div class='add'>+{</div><div class='add'>+	volatile u32 *pmc = (volatile u32 *)TEGRA_PMC_BASE;</div><div class='add'>+	u32 odmdata = pmc[0xa0 / 4];</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Bits 19:18 are the console type: 0=default, 1=none, 2==DCC, 3==UART</div><div class='add'>+	 * Some boards apparently swap the last two values, but we don't have</div><div class='add'>+	 * any way of catering for that here, so we just accept either. If this</div><div class='add'>+	 * doesn't make sense for your board, just don't enable this feature.</div><div class='add'>+	 *</div><div class='add'>+	 * Bits 17:15 indicate the UART to use, 0/1/2/3/4 are UART A/B/C/D/E.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	switch  ((odmdata &gt;&gt; 18) &amp; 3) {</div><div class='add'>+	case 2:</div><div class='add'>+	case 3:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return (odmdata &gt;&gt; 15) &amp; 7;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH</div><div class='add'>+int auto_scratch(void)</div><div class='ctx'> {</div><div class='del'>-	static const struct {</div><div class='del'>-		u32 base;</div><div class='del'>-		u32 reset_reg;</div><div class='del'>-		u32 clock_reg;</div><div class='del'>-		u32 bit;</div><div class='del'>-	} uarts[] = {</div><div class='del'>-		{</div><div class='del'>-			TEGRA_UARTA_BASE,</div><div class='del'>-			TEGRA_CLK_RESET_BASE + 0x04,</div><div class='del'>-			TEGRA_CLK_RESET_BASE + 0x10,</div><div class='del'>-			6,</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			TEGRA_UARTB_BASE,</div><div class='del'>-			TEGRA_CLK_RESET_BASE + 0x04,</div><div class='del'>-			TEGRA_CLK_RESET_BASE + 0x10,</div><div class='del'>-			7,</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			TEGRA_UARTC_BASE,</div><div class='del'>-			TEGRA_CLK_RESET_BASE + 0x08,</div><div class='del'>-			TEGRA_CLK_RESET_BASE + 0x14,</div><div class='del'>-			23,</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			TEGRA_UARTD_BASE,</div><div class='del'>-			TEGRA_CLK_RESET_BASE + 0x0c,</div><div class='del'>-			TEGRA_CLK_RESET_BASE + 0x18,</div><div class='del'>-			1,</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			TEGRA_UARTE_BASE,</div><div class='del'>-			TEGRA_CLK_RESET_BASE + 0x0c,</div><div class='del'>-			TEGRA_CLK_RESET_BASE + 0x18,</div><div class='del'>-			2,</div><div class='del'>-		},</div><div class='del'>-	};</div><div class='ctx'> 	int i;</div><div class='del'>-	volatile u32 *apb_misc = (volatile u32 *)TEGRA_APB_MISC_BASE;</div><div class='del'>-	u32 chip, div;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Look for the first UART that:</div><div class='hunk'>@@ -125,20 +159,60 @@ static inline void arch_decomp_setup(void)</div><div class='ctx'> 	 * back to what's specified in TEGRA_DEBUG_UART_BASE.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(uarts); i++) {</div><div class='del'>-		if (*(u8 *)uarts[i].reset_reg &amp; BIT(uarts[i].bit))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (!(*(u8 *)uarts[i].clock_reg &amp; BIT(uarts[i].bit)))</div><div class='add'>+		if (!uart_clocked(i))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		uart = (volatile u8 *)uarts[i].base;</div><div class='ctx'> 		if (uart[UART_SCR &lt;&lt; DEBUG_UART_SHIFT] != 'D')</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		break;</div><div class='add'>+		return i;</div><div class='ctx'> 	}</div><div class='del'>-	if (i == ARRAY_SIZE(uarts))</div><div class='del'>-		uart = (volatile u8 *)TEGRA_DEBUG_UART_BASE;</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Setup before decompression.  This is where we do UART selection for</div><div class='add'>+ * earlyprintk and init the uart_base register.</div><div class='add'>+ */</div><div class='add'>+static inline void arch_decomp_setup(void)</div><div class='add'>+{</div><div class='add'>+	int uart_id, auto_uart_id;</div><div class='add'>+	volatile u32 *apb_misc = (volatile u32 *)TEGRA_APB_MISC_BASE;</div><div class='add'>+	u32 chip, div;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_TEGRA_DEBUG_UARTA)</div><div class='add'>+	uart_id = 0;</div><div class='add'>+#elif defined(CONFIG_TEGRA_DEBUG_UARTB)</div><div class='add'>+	uart_id = 1;</div><div class='add'>+#elif defined(CONFIG_TEGRA_DEBUG_UARTC)</div><div class='add'>+	uart_id = 2;</div><div class='add'>+#elif defined(CONFIG_TEGRA_DEBUG_UARTD)</div><div class='add'>+	uart_id = 3;</div><div class='add'>+#elif defined(CONFIG_TEGRA_DEBUG_UARTE)</div><div class='add'>+	uart_id = 4;</div><div class='add'>+#else</div><div class='add'>+	uart_id = -1;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA)</div><div class='add'>+	auto_uart_id = auto_odmdata();</div><div class='add'>+#elif defined(CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH)</div><div class='add'>+	auto_uart_id = auto_scratch();</div><div class='add'>+#else</div><div class='add'>+	auto_uart_id = -1;</div><div class='add'>+#endif</div><div class='add'>+	if (auto_uart_id != -1)</div><div class='add'>+		uart_id = auto_uart_id;</div><div class='add'>+</div><div class='add'>+	if (uart_id &lt; 0 || uart_id &gt;= ARRAY_SIZE(uarts) ||</div><div class='add'>+	    !uart_clocked(uart_id))</div><div class='add'>+		uart = NULL;</div><div class='add'>+	else</div><div class='add'>+		uart = (volatile u8 *)uarts[uart_id].base;</div><div class='add'>+</div><div class='ctx'> 	save_uart_address();</div><div class='ctx'> 	if (uart == NULL)</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/arm/mach-tegra/include/mach/usb_phy.h b/arch/arm/mach-tegra/include/mach/usb_phy.h<br/>index de1a0f602b28..935ce9f65590 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/include/mach/usb_phy.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/include/mach/usb_phy.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/include/mach/usb_phy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/include/mach/usb_phy.h</a></div><div class='hunk'>@@ -61,8 +61,8 @@ struct tegra_usb_phy {</div><div class='ctx'> 	struct usb_phy *ulpi;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs,</div><div class='del'>-			void *config, enum tegra_usb_phy_mode phy_mode);</div><div class='add'>+struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,</div><div class='add'>+	void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode);</div><div class='ctx'> </div><div class='ctx'> int tegra_usb_phy_power_on(struct tegra_usb_phy *phy);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c<br/>index 54a816ff3847..0e09137506ec 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/pcie.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/pcie.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/pcie.c</a></div><div class='hunk'>@@ -475,7 +475,6 @@ static struct hw_pci tegra_pcie_hw __initdata = {</div><div class='ctx'> 	.nr_controllers	= 2,</div><div class='ctx'> 	.setup		= tegra_pcie_setup,</div><div class='ctx'> 	.scan		= tegra_pcie_scan_bus,</div><div class='del'>-	.swizzle	= pci_std_swizzle,</div><div class='ctx'> 	.map_irq	= tegra_pcie_map_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-tegra/pinmux-tegra20-tables.c b/arch/arm/mach-tegra/pinmux-tegra20-tables.c<br/>deleted file mode 100644<br/>index 734add1280b7..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/pinmux-tegra20-tables.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/pinmux-tegra20-tables.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,244 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/arch/arm/mach-tegra/pinmux-tegra20-tables.c</div><div class='del'>- *</div><div class='del'>- * Common pinmux configurations for Tegra20 SoCs</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 NVIDIA Corporation</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='del'>- * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/iomap.h&gt;</div><div class='del'>-#include &lt;mach/pinmux.h&gt;</div><div class='del'>-#include &lt;mach/pinmux-tegra20.h&gt;</div><div class='del'>-#include &lt;mach/suspend.h&gt;</div><div class='del'>-</div><div class='del'>-#define TRISTATE_REG_A		0x14</div><div class='del'>-#define PIN_MUX_CTL_REG_A	0x80</div><div class='del'>-#define PULLUPDOWN_REG_A	0xa0</div><div class='del'>-#define PINGROUP_REG_A		0x868</div><div class='del'>-</div><div class='del'>-#define DRIVE_PINGROUP(pg_name, r)				\</div><div class='del'>-	[TEGRA_DRIVE_PINGROUP_ ## pg_name] = {			\</div><div class='del'>-		.name = #pg_name,				\</div><div class='del'>-		.reg_bank = 3,					\</div><div class='del'>-		.reg = ((r) - PINGROUP_REG_A)			\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-static const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = {</div><div class='del'>-	DRIVE_PINGROUP(AO1,		0x868),</div><div class='del'>-	DRIVE_PINGROUP(AO2,		0x86c),</div><div class='del'>-	DRIVE_PINGROUP(AT1,		0x870),</div><div class='del'>-	DRIVE_PINGROUP(AT2,		0x874),</div><div class='del'>-	DRIVE_PINGROUP(CDEV1,		0x878),</div><div class='del'>-	DRIVE_PINGROUP(CDEV2,		0x87c),</div><div class='del'>-	DRIVE_PINGROUP(CSUS,		0x880),</div><div class='del'>-	DRIVE_PINGROUP(DAP1,		0x884),</div><div class='del'>-	DRIVE_PINGROUP(DAP2,		0x888),</div><div class='del'>-	DRIVE_PINGROUP(DAP3,		0x88c),</div><div class='del'>-	DRIVE_PINGROUP(DAP4,		0x890),</div><div class='del'>-	DRIVE_PINGROUP(DBG,		0x894),</div><div class='del'>-	DRIVE_PINGROUP(LCD1,		0x898),</div><div class='del'>-	DRIVE_PINGROUP(LCD2,		0x89c),</div><div class='del'>-	DRIVE_PINGROUP(SDMMC2,		0x8a0),</div><div class='del'>-	DRIVE_PINGROUP(SDMMC3,		0x8a4),</div><div class='del'>-	DRIVE_PINGROUP(SPI,		0x8a8),</div><div class='del'>-	DRIVE_PINGROUP(UAA,		0x8ac),</div><div class='del'>-	DRIVE_PINGROUP(UAB,		0x8b0),</div><div class='del'>-	DRIVE_PINGROUP(UART2,		0x8b4),</div><div class='del'>-	DRIVE_PINGROUP(UART3,		0x8b8),</div><div class='del'>-	DRIVE_PINGROUP(VI1,		0x8bc),</div><div class='del'>-	DRIVE_PINGROUP(VI2,		0x8c0),</div><div class='del'>-	DRIVE_PINGROUP(XM2A,		0x8c4),</div><div class='del'>-	DRIVE_PINGROUP(XM2C,		0x8c8),</div><div class='del'>-	DRIVE_PINGROUP(XM2D,		0x8cc),</div><div class='del'>-	DRIVE_PINGROUP(XM2CLK,		0x8d0),</div><div class='del'>-	DRIVE_PINGROUP(MEMCOMP,		0x8d4),</div><div class='del'>-	DRIVE_PINGROUP(SDIO1,		0x8e0),</div><div class='del'>-	DRIVE_PINGROUP(CRT,		0x8ec),</div><div class='del'>-	DRIVE_PINGROUP(DDC,		0x8f0),</div><div class='del'>-	DRIVE_PINGROUP(GMA,		0x8f4),</div><div class='del'>-	DRIVE_PINGROUP(GMB,		0x8f8),</div><div class='del'>-	DRIVE_PINGROUP(GMC,		0x8fc),</div><div class='del'>-	DRIVE_PINGROUP(GMD,		0x900),</div><div class='del'>-	DRIVE_PINGROUP(GME,		0x904),</div><div class='del'>-	DRIVE_PINGROUP(OWR,		0x908),</div><div class='del'>-	DRIVE_PINGROUP(UAD,		0x90c),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define PINGROUP(pg_name, vdd, f0, f1, f2, f3, f_safe,		\</div><div class='del'>-		 tri_r, tri_b, mux_r, mux_b, pupd_r, pupd_b)	\</div><div class='del'>-	[TEGRA_PINGROUP_ ## pg_name] = {			\</div><div class='del'>-		.name = #pg_name,				\</div><div class='del'>-		.vddio = TEGRA_VDDIO_ ## vdd,			\</div><div class='del'>-		.funcs = {					\</div><div class='del'>-			TEGRA_MUX_ ## f0,			\</div><div class='del'>-			TEGRA_MUX_ ## f1,			\</div><div class='del'>-			TEGRA_MUX_ ## f2,			\</div><div class='del'>-			TEGRA_MUX_ ## f3,			\</div><div class='del'>-		},						\</div><div class='del'>-		.func_safe = TEGRA_MUX_ ## f_safe,		\</div><div class='del'>-		.tri_bank = 0,					\</div><div class='del'>-		.tri_reg = ((tri_r) - TRISTATE_REG_A),		\</div><div class='del'>-		.tri_bit = tri_b,				\</div><div class='del'>-		.mux_bank = 1,					\</div><div class='del'>-		.mux_reg = ((mux_r) - PIN_MUX_CTL_REG_A),	\</div><div class='del'>-		.mux_bit = mux_b,				\</div><div class='del'>-		.pupd_bank = 2,				\</div><div class='del'>-		.pupd_reg = ((pupd_r) - PULLUPDOWN_REG_A),	\</div><div class='del'>-		.pupd_bit = pupd_b,				\</div><div class='del'>-		.lock_bit = -1,					\</div><div class='del'>-		.od_bit = -1,					\</div><div class='del'>-		.ioreset_bit = -1,				\</div><div class='del'>-		.io_default = -1,				\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-static const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = {</div><div class='del'>-	PINGROUP(ATA,   NAND,  IDE,       NAND,      GMI,       RSVD,          IDE,       0x14, 0,  0x80, 24, 0xA0, 0),</div><div class='del'>-	PINGROUP(ATB,   NAND,  IDE,       NAND,      GMI,       SDIO4,         IDE,       0x14, 1,  0x80, 16, 0xA0, 2),</div><div class='del'>-	PINGROUP(ATC,   NAND,  IDE,       NAND,      GMI,       SDIO4,         IDE,       0x14, 2,  0x80, 22, 0xA0, 4),</div><div class='del'>-	PINGROUP(ATD,   NAND,  IDE,       NAND,      GMI,       SDIO4,         IDE,       0x14, 3,  0x80, 20, 0xA0, 6),</div><div class='del'>-	PINGROUP(ATE,   NAND,  IDE,       NAND,      GMI,       RSVD,          IDE,       0x18, 25, 0x80, 12, 0xA0, 8),</div><div class='del'>-	PINGROUP(CDEV1, AUDIO, OSC,       PLLA_OUT,  PLLM_OUT1, AUDIO_SYNC,    OSC,       0x14, 4,  0x88, 2,  0xA8, 0),</div><div class='del'>-	PINGROUP(CDEV2, AUDIO, OSC,       AHB_CLK,   APB_CLK,   PLLP_OUT4,     OSC,       0x14, 5,  0x88, 4,  0xA8, 2),</div><div class='del'>-	PINGROUP(CRTP,  LCD,   CRT,       RSVD,      RSVD,      RSVD,          RSVD,      0x20, 14, 0x98, 20, 0xA4, 24),</div><div class='del'>-	PINGROUP(CSUS,  VI,    PLLC_OUT1, PLLP_OUT2, PLLP_OUT3, VI_SENSOR_CLK, PLLC_OUT1, 0x14, 6,  0x88, 6,  0xAC, 24),</div><div class='del'>-	PINGROUP(DAP1,  AUDIO, DAP1,      RSVD,      GMI,       SDIO2,         DAP1,      0x14, 7,  0x88, 20, 0xA0, 10),</div><div class='del'>-	PINGROUP(DAP2,  AUDIO, DAP2,      TWC,       RSVD,      GMI,           DAP2,      0x14, 8,  0x88, 22, 0xA0, 12),</div><div class='del'>-	PINGROUP(DAP3,  BB,    DAP3,      RSVD,      RSVD,      RSVD,          DAP3,      0x14, 9,  0x88, 24, 0xA0, 14),</div><div class='del'>-	PINGROUP(DAP4,  UART,  DAP4,      RSVD,      GMI,       RSVD,          DAP4,      0x14, 10, 0x88, 26, 0xA0, 16),</div><div class='del'>-	PINGROUP(DDC,   LCD,   I2C2,      RSVD,      RSVD,      RSVD,          RSVD4,     0x18, 31, 0x88, 0,  0xB0, 28),</div><div class='del'>-	PINGROUP(DTA,   VI,    RSVD,      SDIO2,     VI,        RSVD,          RSVD4,     0x14, 11, 0x84, 20, 0xA0, 18),</div><div class='del'>-	PINGROUP(DTB,   VI,    RSVD,      RSVD,      VI,        SPI1,          RSVD1,     0x14, 12, 0x84, 22, 0xA0, 20),</div><div class='del'>-	PINGROUP(DTC,   VI,    RSVD,      RSVD,      VI,        RSVD,          RSVD1,     0x14, 13, 0x84, 26, 0xA0, 22),</div><div class='del'>-	PINGROUP(DTD,   VI,    RSVD,      SDIO2,     VI,        RSVD,          RSVD1,     0x14, 14, 0x84, 28, 0xA0, 24),</div><div class='del'>-	PINGROUP(DTE,   VI,    RSVD,      RSVD,      VI,        SPI1,          RSVD1,     0x14, 15, 0x84, 30, 0xA0, 26),</div><div class='del'>-	PINGROUP(DTF,   VI,    I2C3,      RSVD,      VI,        RSVD,          RSVD4,     0x20, 12, 0x98, 30, 0xA0, 28),</div><div class='del'>-	PINGROUP(GMA,   NAND,  UARTE,     SPI3,      GMI,       SDIO4,         SPI3,      0x14, 28, 0x84, 0,  0xB0, 20),</div><div class='del'>-	PINGROUP(GMB,   NAND,  IDE,       NAND,      GMI,       GMI_INT,       GMI,       0x18, 29, 0x88, 28, 0xB0, 22),</div><div class='del'>-	PINGROUP(GMC,   NAND,  UARTD,     SPI4,      GMI,       SFLASH,        SPI4,      0x14, 29, 0x84, 2,  0xB0, 24),</div><div class='del'>-	PINGROUP(GMD,   NAND,  RSVD,      NAND,      GMI,       SFLASH,        GMI,       0x18, 30, 0x88, 30, 0xB0, 26),</div><div class='del'>-	PINGROUP(GME,   NAND,  RSVD,      DAP5,      GMI,       SDIO4,         GMI,       0x18, 0,  0x8C, 0,  0xA8, 24),</div><div class='del'>-	PINGROUP(GPU,   UART,  PWM,       UARTA,     GMI,       RSVD,          RSVD4,     0x14, 16, 0x8C, 4,  0xA4, 20),</div><div class='del'>-	PINGROUP(GPU7,  SYS,   RTCK,      RSVD,      RSVD,      RSVD,          RTCK,      0x20, 11, 0x98, 28, 0xA4, 6),</div><div class='del'>-	PINGROUP(GPV,   SD,    PCIE,      RSVD,      RSVD,      RSVD,          PCIE,      0x14, 17, 0x8C, 2,  0xA0, 30),</div><div class='del'>-	PINGROUP(HDINT, LCD,   HDMI,      RSVD,      RSVD,      RSVD,          HDMI,      0x1C, 23, 0x84, 4,  0xAC, 22),</div><div class='del'>-	PINGROUP(I2CP,  SYS,   I2C,       RSVD,      RSVD,      RSVD,          RSVD4,     0x14, 18, 0x88, 8,  0xA4, 2),</div><div class='del'>-	PINGROUP(IRRX,  UART,  UARTA,     UARTB,     GMI,       SPI4,          UARTB,     0x14, 20, 0x88, 18, 0xA8, 22),</div><div class='del'>-	PINGROUP(IRTX,  UART,  UARTA,     UARTB,     GMI,       SPI4,          UARTB,     0x14, 19, 0x88, 16, 0xA8, 20),</div><div class='del'>-	PINGROUP(KBCA,  SYS,   KBC,       NAND,      SDIO2,     EMC_TEST0_DLL, KBC,       0x14, 22, 0x88, 10, 0xA4, 8),</div><div class='del'>-	PINGROUP(KBCB,  SYS,   KBC,       NAND,      SDIO2,     MIO,           KBC,       0x14, 21, 0x88, 12, 0xA4, 10),</div><div class='del'>-	PINGROUP(KBCC,  SYS,   KBC,       NAND,      TRACE,     EMC_TEST1_DLL, KBC,       0x18, 26, 0x88, 14, 0xA4, 12),</div><div class='del'>-	PINGROUP(KBCD,  SYS,   KBC,       NAND,      SDIO2,     MIO,           KBC,       0x20, 10, 0x98, 26, 0xA4, 14),</div><div class='del'>-	PINGROUP(KBCE,  SYS,   KBC,       NAND,      OWR,       RSVD,          KBC,       0x14, 26, 0x80, 28, 0xB0, 2),</div><div class='del'>-	PINGROUP(KBCF,  SYS,   KBC,       NAND,      TRACE,     MIO,           KBC,       0x14, 27, 0x80, 26, 0xB0, 0),</div><div class='del'>-	PINGROUP(LCSN,  LCD,   DISPLAYA,  DISPLAYB,  SPI3,      RSVD,          RSVD4,     0x1C, 31, 0x90, 12, 0xAC, 20),</div><div class='del'>-	PINGROUP(LD0,   LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 0,  0x94, 0,  0xAC, 12),</div><div class='del'>-	PINGROUP(LD1,   LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 1,  0x94, 2,  0xAC, 12),</div><div class='del'>-	PINGROUP(LD10,  LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 10, 0x94, 20, 0xAC, 12),</div><div class='del'>-	PINGROUP(LD11,  LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 11, 0x94, 22, 0xAC, 12),</div><div class='del'>-	PINGROUP(LD12,  LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 12, 0x94, 24, 0xAC, 12),</div><div class='del'>-	PINGROUP(LD13,  LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 13, 0x94, 26, 0xAC, 12),</div><div class='del'>-	PINGROUP(LD14,  LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 14, 0x94, 28, 0xAC, 12),</div><div class='del'>-	PINGROUP(LD15,  LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 15, 0x94, 30, 0xAC, 12),</div><div class='del'>-	PINGROUP(LD16,  LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 16, 0x98, 0,  0xAC, 12),</div><div class='del'>-	PINGROUP(LD17,  LCD,   DISPLAYA,  DISPLAYB,  RSVD,      RSVD,          RSVD4,     0x1C, 17, 0x98, 2,  0xAC, 12),</div><div class='del'>-	PINGROUP(LD2,   LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 2,  0x94, 4,  0xAC, 12),</div><div class='del'>-	PINGROUP(LD3,   LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 3,  0x94, 6,  0xAC, 12),</div><div class='del'>-	PINGROUP(LD4,   LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 4,  0x94, 8,  0xAC, 12),</div><div class='del'>-	PINGROUP(LD5,   LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 5,  0x94, 10, 0xAC, 12),</div><div class='del'>-	PINGROUP(LD6,   LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 6,  0x94, 12, 0xAC, 12),</div><div class='del'>-	PINGROUP(LD7,   LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 7,  0x94, 14, 0xAC, 12),</div><div class='del'>-	PINGROUP(LD8,   LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 8,  0x94, 16, 0xAC, 12),</div><div class='del'>-	PINGROUP(LD9,   LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 9,  0x94, 18, 0xAC, 12),</div><div class='del'>-	PINGROUP(LDC,   LCD,   DISPLAYA,  DISPLAYB,  RSVD,      RSVD,          RSVD4,     0x1C, 30, 0x90, 14, 0xAC, 20),</div><div class='del'>-	PINGROUP(LDI,   LCD,   DISPLAYA,  DISPLAYB,  RSVD,      RSVD,          RSVD4,     0x20, 6,  0x98, 16, 0xAC, 18),</div><div class='del'>-	PINGROUP(LHP0,  LCD,   DISPLAYA,  DISPLAYB,  RSVD,      RSVD,          RSVD4,     0x1C, 18, 0x98, 10, 0xAC, 16),</div><div class='del'>-	PINGROUP(LHP1,  LCD,   DISPLAYA,  DISPLAYB,  RSVD,      RSVD,          RSVD4,     0x1C, 19, 0x98, 4,  0xAC, 14),</div><div class='del'>-	PINGROUP(LHP2,  LCD,   DISPLAYA,  DISPLAYB,  RSVD,      RSVD,          RSVD4,     0x1C, 20, 0x98, 6,  0xAC, 14),</div><div class='del'>-	PINGROUP(LHS,   LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x20, 7,  0x90, 22, 0xAC, 22),</div><div class='del'>-	PINGROUP(LM0,   LCD,   DISPLAYA,  DISPLAYB,  SPI3,      RSVD,          RSVD4,     0x1C, 24, 0x90, 26, 0xAC, 22),</div><div class='del'>-	PINGROUP(LM1,   LCD,   DISPLAYA,  DISPLAYB,  RSVD,      CRT,           RSVD3,     0x1C, 25, 0x90, 28, 0xAC, 22),</div><div class='del'>-	PINGROUP(LPP,   LCD,   DISPLAYA,  DISPLAYB,  RSVD,      RSVD,          RSVD4,     0x20, 8,  0x98, 14, 0xAC, 18),</div><div class='del'>-	PINGROUP(LPW0,  LCD,   DISPLAYA,  DISPLAYB,  SPI3,      HDMI,          DISPLAYA,  0x20, 3,  0x90, 0,  0xAC, 20),</div><div class='del'>-	PINGROUP(LPW1,  LCD,   DISPLAYA,  DISPLAYB,  RSVD,      RSVD,          RSVD4,     0x20, 4,  0x90, 2,  0xAC, 20),</div><div class='del'>-	PINGROUP(LPW2,  LCD,   DISPLAYA,  DISPLAYB,  SPI3,      HDMI,          DISPLAYA,  0x20, 5,  0x90, 4,  0xAC, 20),</div><div class='del'>-	PINGROUP(LSC0,  LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 27, 0x90, 18, 0xAC, 22),</div><div class='del'>-	PINGROUP(LSC1,  LCD,   DISPLAYA,  DISPLAYB,  SPI3,      HDMI,          DISPLAYA,  0x1C, 28, 0x90, 20, 0xAC, 20),</div><div class='del'>-	PINGROUP(LSCK,  LCD,   DISPLAYA,  DISPLAYB,  SPI3,      HDMI,          DISPLAYA,  0x1C, 29, 0x90, 16, 0xAC, 20),</div><div class='del'>-	PINGROUP(LSDA,  LCD,   DISPLAYA,  DISPLAYB,  SPI3,      HDMI,          DISPLAYA,  0x20, 1,  0x90, 8,  0xAC, 20),</div><div class='del'>-	PINGROUP(LSDI,  LCD,   DISPLAYA,  DISPLAYB,  SPI3,      RSVD,          DISPLAYA,  0x20, 2,  0x90, 6,  0xAC, 20),</div><div class='del'>-	PINGROUP(LSPI,  LCD,   DISPLAYA,  DISPLAYB,  XIO,       HDMI,          DISPLAYA,  0x20, 0,  0x90, 10, 0xAC, 22),</div><div class='del'>-	PINGROUP(LVP0,  LCD,   DISPLAYA,  DISPLAYB,  RSVD,      RSVD,          RSVD4,     0x1C, 21, 0x90, 30, 0xAC, 22),</div><div class='del'>-	PINGROUP(LVP1,  LCD,   DISPLAYA,  DISPLAYB,  RSVD,      RSVD,          RSVD4,     0x1C, 22, 0x98, 8,  0xAC, 16),</div><div class='del'>-	PINGROUP(LVS,   LCD,   DISPLAYA,  DISPLAYB,  XIO,       RSVD,          RSVD4,     0x1C, 26, 0x90, 24, 0xAC, 22),</div><div class='del'>-	PINGROUP(OWC,   SYS,   OWR,       RSVD,      RSVD,      RSVD,          OWR,       0x14, 31, 0x84, 8,  0xB0, 30),</div><div class='del'>-	PINGROUP(PMC,   SYS,   PWR_ON,    PWR_INTR,  RSVD,      RSVD,          PWR_ON,    0x14, 23, 0x98, 18, -1,   -1),</div><div class='del'>-	PINGROUP(PTA,   NAND,  I2C2,      HDMI,      GMI,       RSVD,          RSVD4,     0x14, 24, 0x98, 22, 0xA4, 4),</div><div class='del'>-	PINGROUP(RM,    UART,  I2C,       RSVD,      RSVD,      RSVD,          RSVD4,     0x14, 25, 0x80, 14, 0xA4, 0),</div><div class='del'>-	PINGROUP(SDB,   SD,    UARTA,     PWM,       SDIO3,     SPI2,          PWM,       0x20, 15, 0x8C, 10, -1,   -1),</div><div class='del'>-	PINGROUP(SDC,   SD,    PWM,       TWC,       SDIO3,     SPI3,          TWC,       0x18, 1,  0x8C, 12, 0xAC, 28),</div><div class='del'>-	PINGROUP(SDD,   SD,    UARTA,     PWM,       SDIO3,     SPI3,          PWM,       0x18, 2,  0x8C, 14, 0xAC, 30),</div><div class='del'>-	PINGROUP(SDIO1, BB,    SDIO1,     RSVD,      UARTE,     UARTA,         RSVD2,     0x14, 30, 0x80, 30, 0xB0, 18),</div><div class='del'>-	PINGROUP(SLXA,  SD,    PCIE,      SPI4,      SDIO3,     SPI2,          PCIE,      0x18, 3,  0x84, 6,  0xA4, 22),</div><div class='del'>-	PINGROUP(SLXC,  SD,    SPDIF,     SPI4,      SDIO3,     SPI2,          SPI4,      0x18, 5,  0x84, 10, 0xA4, 26),</div><div class='del'>-	PINGROUP(SLXD,  SD,    SPDIF,     SPI4,      SDIO3,     SPI2,          SPI4,      0x18, 6,  0x84, 12, 0xA4, 28),</div><div class='del'>-	PINGROUP(SLXK,  SD,    PCIE,      SPI4,      SDIO3,     SPI2,          PCIE,      0x18, 7,  0x84, 14, 0xA4, 30),</div><div class='del'>-	PINGROUP(SPDI,  AUDIO, SPDIF,     RSVD,      I2C,       SDIO2,         RSVD2,     0x18, 8,  0x8C, 8,  0xA4, 16),</div><div class='del'>-	PINGROUP(SPDO,  AUDIO, SPDIF,     RSVD,      I2C,       SDIO2,         RSVD2,     0x18, 9,  0x8C, 6,  0xA4, 18),</div><div class='del'>-	PINGROUP(SPIA,  AUDIO, SPI1,      SPI2,      SPI3,      GMI,           GMI,       0x18, 10, 0x8C, 30, 0xA8, 4),</div><div class='del'>-	PINGROUP(SPIB,  AUDIO, SPI1,      SPI2,      SPI3,      GMI,           GMI,       0x18, 11, 0x8C, 28, 0xA8, 6),</div><div class='del'>-	PINGROUP(SPIC,  AUDIO, SPI1,      SPI2,      SPI3,      GMI,           GMI,       0x18, 12, 0x8C, 26, 0xA8, 8),</div><div class='del'>-	PINGROUP(SPID,  AUDIO, SPI2,      SPI1,      SPI2_ALT,  GMI,           GMI,       0x18, 13, 0x8C, 24, 0xA8, 10),</div><div class='del'>-	PINGROUP(SPIE,  AUDIO, SPI2,      SPI1,      SPI2_ALT,  GMI,           GMI,       0x18, 14, 0x8C, 22, 0xA8, 12),</div><div class='del'>-	PINGROUP(SPIF,  AUDIO, SPI3,      SPI1,      SPI2,      RSVD,          RSVD4,     0x18, 15, 0x8C, 20, 0xA8, 14),</div><div class='del'>-	PINGROUP(SPIG,  AUDIO, SPI3,      SPI2,      SPI2_ALT,  I2C,           SPI2_ALT,  0x18, 16, 0x8C, 18, 0xA8, 16),</div><div class='del'>-	PINGROUP(SPIH,  AUDIO, SPI3,      SPI2,      SPI2_ALT,  I2C,           SPI2_ALT,  0x18, 17, 0x8C, 16, 0xA8, 18),</div><div class='del'>-	PINGROUP(UAA,   BB,    SPI3,      MIPI_HS,   UARTA,     ULPI,          MIPI_HS,   0x18, 18, 0x80, 0,  0xAC, 0),</div><div class='del'>-	PINGROUP(UAB,   BB,    SPI2,      MIPI_HS,   UARTA,     ULPI,          MIPI_HS,   0x18, 19, 0x80, 2,  0xAC, 2),</div><div class='del'>-	PINGROUP(UAC,   BB,    OWR,       RSVD,      RSVD,      RSVD,          RSVD4,     0x18, 20, 0x80, 4,  0xAC, 4),</div><div class='del'>-	PINGROUP(UAD,   UART,  IRDA,      SPDIF,     UARTA,     SPI4,          SPDIF,     0x18, 21, 0x80, 6,  0xAC, 6),</div><div class='del'>-	PINGROUP(UCA,   UART,  UARTC,     RSVD,      GMI,       RSVD,          RSVD4,     0x18, 22, 0x84, 16, 0xAC, 8),</div><div class='del'>-	PINGROUP(UCB,   UART,  UARTC,     PWM,       GMI,       RSVD,          RSVD4,     0x18, 23, 0x84, 18, 0xAC, 10),</div><div class='del'>-	PINGROUP(UDA,   BB,    SPI1,      RSVD,      UARTD,     ULPI,          RSVD2,     0x20, 13, 0x80, 8,  0xB0, 16),</div><div class='del'>-	/* these pin groups only have pullup and pull down control */</div><div class='del'>-	PINGROUP(CK32,  SYS,   RSVD,      RSVD,      RSVD,      RSVD,          RSVD,      -1,   -1, -1,   -1, 0xB0, 14),</div><div class='del'>-	PINGROUP(DDRC,  DDR,   RSVD,      RSVD,      RSVD,      RSVD,          RSVD,      -1,   -1, -1,   -1, 0xAC, 26),</div><div class='del'>-	PINGROUP(PMCA,  SYS,   RSVD,      RSVD,      RSVD,      RSVD,          RSVD,      -1,   -1, -1,   -1, 0xB0, 4),</div><div class='del'>-	PINGROUP(PMCB,  SYS,   RSVD,      RSVD,      RSVD,      RSVD,          RSVD,      -1,   -1, -1,   -1, 0xB0, 6),</div><div class='del'>-	PINGROUP(PMCC,  SYS,   RSVD,      RSVD,      RSVD,      RSVD,          RSVD,      -1,   -1, -1,   -1, 0xB0, 8),</div><div class='del'>-	PINGROUP(PMCD,  SYS,   RSVD,      RSVD,      RSVD,      RSVD,          RSVD,      -1,   -1, -1,   -1, 0xB0, 10),</div><div class='del'>-	PINGROUP(PMCE,  SYS,   RSVD,      RSVD,      RSVD,      RSVD,          RSVD,      -1,   -1, -1,   -1, 0xB0, 12),</div><div class='del'>-	PINGROUP(XM2C,  DDR,   RSVD,      RSVD,      RSVD,      RSVD,          RSVD,      -1,   -1, -1,   -1, 0xA8, 30),</div><div class='del'>-	PINGROUP(XM2D,  DDR,   RSVD,      RSVD,      RSVD,      RSVD,          RSVD,      -1,   -1, -1,   -1, 0xA8, 28),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __devinit tegra20_pinmux_init(const struct tegra_pingroup_desc **pg,</div><div class='del'>-		int *pg_max, const struct tegra_drive_pingroup_desc **pgdrive,</div><div class='del'>-		int *pgdrive_max)</div><div class='del'>-{</div><div class='del'>-	*pg = tegra_soc_pingroups;</div><div class='del'>-	*pg_max = TEGRA_MAX_PINGROUP;</div><div class='del'>-	*pgdrive = tegra_soc_drive_pingroups;</div><div class='del'>-	*pgdrive_max = TEGRA_MAX_DRIVE_PINGROUP;</div><div class='del'>-}</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-tegra/pinmux-tegra30-tables.c b/arch/arm/mach-tegra/pinmux-tegra30-tables.c<br/>deleted file mode 100644<br/>index 14fc0e4c1c44..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/pinmux-tegra30-tables.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/pinmux-tegra30-tables.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,376 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/arch/arm/mach-tegra/pinmux-tegra30-tables.c</div><div class='del'>- *</div><div class='del'>- * Common pinmux configurations for Tegra30 SoCs</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010,2011 NVIDIA Corporation</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='del'>- * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/iomap.h&gt;</div><div class='del'>-#include &lt;mach/pinmux.h&gt;</div><div class='del'>-#include &lt;mach/pinmux-tegra30.h&gt;</div><div class='del'>-#include &lt;mach/suspend.h&gt;</div><div class='del'>-</div><div class='del'>-#define PINGROUP_REG_A	0x868</div><div class='del'>-#define MUXCTL_REG_A	0x3000</div><div class='del'>-</div><div class='del'>-#define DRIVE_PINGROUP(pg_name, r)		\</div><div class='del'>-	[TEGRA_DRIVE_PINGROUP_ ## pg_name] = {	\</div><div class='del'>-		.name = #pg_name,		\</div><div class='del'>-		.reg_bank = 0,			\</div><div class='del'>-		.reg = ((r) - PINGROUP_REG_A)	\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-static const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = {</div><div class='del'>-	DRIVE_PINGROUP(AO1,		0x868),</div><div class='del'>-	DRIVE_PINGROUP(AO2,		0x86c),</div><div class='del'>-	DRIVE_PINGROUP(AT1,		0x870),</div><div class='del'>-	DRIVE_PINGROUP(AT2,		0x874),</div><div class='del'>-	DRIVE_PINGROUP(AT3,		0x878),</div><div class='del'>-	DRIVE_PINGROUP(AT4,		0x87c),</div><div class='del'>-	DRIVE_PINGROUP(AT5,		0x880),</div><div class='del'>-	DRIVE_PINGROUP(CDEV1,		0x884),</div><div class='del'>-	DRIVE_PINGROUP(CDEV2,		0x888),</div><div class='del'>-	DRIVE_PINGROUP(CSUS,		0x88c),</div><div class='del'>-	DRIVE_PINGROUP(DAP1,		0x890),</div><div class='del'>-	DRIVE_PINGROUP(DAP2,		0x894),</div><div class='del'>-	DRIVE_PINGROUP(DAP3,		0x898),</div><div class='del'>-	DRIVE_PINGROUP(DAP4,		0x89c),</div><div class='del'>-	DRIVE_PINGROUP(DBG,		0x8a0),</div><div class='del'>-	DRIVE_PINGROUP(LCD1,		0x8a4),</div><div class='del'>-	DRIVE_PINGROUP(LCD2,		0x8a8),</div><div class='del'>-	DRIVE_PINGROUP(SDIO2,		0x8ac),</div><div class='del'>-	DRIVE_PINGROUP(SDIO3,		0x8b0),</div><div class='del'>-	DRIVE_PINGROUP(SPI,		0x8b4),</div><div class='del'>-	DRIVE_PINGROUP(UAA,		0x8b8),</div><div class='del'>-	DRIVE_PINGROUP(UAB,		0x8bc),</div><div class='del'>-	DRIVE_PINGROUP(UART2,		0x8c0),</div><div class='del'>-	DRIVE_PINGROUP(UART3,		0x8c4),</div><div class='del'>-	DRIVE_PINGROUP(VI1,		0x8c8),</div><div class='del'>-	DRIVE_PINGROUP(SDIO1,		0x8ec),</div><div class='del'>-	DRIVE_PINGROUP(CRT,		0x8f8),</div><div class='del'>-	DRIVE_PINGROUP(DDC,		0x8fc),</div><div class='del'>-	DRIVE_PINGROUP(GMA,		0x900),</div><div class='del'>-	DRIVE_PINGROUP(GMB,		0x904),</div><div class='del'>-	DRIVE_PINGROUP(GMC,		0x908),</div><div class='del'>-	DRIVE_PINGROUP(GMD,		0x90c),</div><div class='del'>-	DRIVE_PINGROUP(GME,		0x910),</div><div class='del'>-	DRIVE_PINGROUP(GMF,		0x914),</div><div class='del'>-	DRIVE_PINGROUP(GMG,		0x918),</div><div class='del'>-	DRIVE_PINGROUP(GMH,		0x91c),</div><div class='del'>-	DRIVE_PINGROUP(OWR,		0x920),</div><div class='del'>-	DRIVE_PINGROUP(UAD,		0x924),</div><div class='del'>-	DRIVE_PINGROUP(GPV,		0x928),</div><div class='del'>-	DRIVE_PINGROUP(DEV3,		0x92c),</div><div class='del'>-	DRIVE_PINGROUP(CEC,		0x938),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define PINGROUP(pg_name, vdd, f0, f1, f2, f3, fs, iod, reg)	\</div><div class='del'>-	[TEGRA_PINGROUP_ ## pg_name] = {			\</div><div class='del'>-		.name = #pg_name,				\</div><div class='del'>-		.vddio = TEGRA_VDDIO_ ## vdd,			\</div><div class='del'>-		.funcs = {					\</div><div class='del'>-			TEGRA_MUX_ ## f0,			\</div><div class='del'>-			TEGRA_MUX_ ## f1,			\</div><div class='del'>-			TEGRA_MUX_ ## f2,			\</div><div class='del'>-			TEGRA_MUX_ ## f3,			\</div><div class='del'>-		},						\</div><div class='del'>-		.func_safe = TEGRA_MUX_ ## fs,			\</div><div class='del'>-		.tri_bank = 1,					\</div><div class='del'>-		.tri_reg = ((reg) - MUXCTL_REG_A),		\</div><div class='del'>-		.tri_bit = 4,					\</div><div class='del'>-		.mux_bank = 1,					\</div><div class='del'>-		.mux_reg = ((reg) - MUXCTL_REG_A),		\</div><div class='del'>-		.mux_bit = 0,					\</div><div class='del'>-		.pupd_bank = 1,					\</div><div class='del'>-		.pupd_reg = ((reg) - MUXCTL_REG_A),		\</div><div class='del'>-		.pupd_bit = 2,					\</div><div class='del'>-		.io_default = TEGRA_PIN_ ## iod,		\</div><div class='del'>-		.od_bit = 6,					\</div><div class='del'>-		.lock_bit = 7,					\</div><div class='del'>-		.ioreset_bit = 8,				\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-static const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = {</div><div class='del'>-	/*       NAME		  VDD	    f0		f1          f2          f3          fSafe       io	reg */</div><div class='del'>-	PINGROUP(ULPI_DATA0,	  BB,	    SPI3,	HSI,	    UARTA,	ULPI,	    RSVD,	INPUT,	0x3000),</div><div class='del'>-	PINGROUP(ULPI_DATA1,	  BB,	    SPI3,	HSI,	    UARTA,	ULPI,	    RSVD,	INPUT,	0x3004),</div><div class='del'>-	PINGROUP(ULPI_DATA2,	  BB,	    SPI3,	HSI,	    UARTA,	ULPI,	    RSVD,	INPUT,	0x3008),</div><div class='del'>-	PINGROUP(ULPI_DATA3,	  BB,	    SPI3,	HSI,	    UARTA,	ULPI,	    RSVD,	INPUT,	0x300c),</div><div class='del'>-	PINGROUP(ULPI_DATA4,	  BB,	    SPI2,	HSI,	    UARTA,	ULPI,	    RSVD,	INPUT,	0x3010),</div><div class='del'>-	PINGROUP(ULPI_DATA5,	  BB,	    SPI2,	HSI,	    UARTA,	ULPI,	    RSVD,	INPUT,	0x3014),</div><div class='del'>-	PINGROUP(ULPI_DATA6,	  BB,	    SPI2,	HSI,	    UARTA,	ULPI,	    RSVD,	INPUT,	0x3018),</div><div class='del'>-	PINGROUP(ULPI_DATA7,	  BB,	    SPI2,	HSI,	    UARTA,	ULPI,	    RSVD,	INPUT,	0x301c),</div><div class='del'>-	PINGROUP(ULPI_CLK,	  BB,	    SPI1,	RSVD,	    UARTD,	ULPI,	    RSVD,	INPUT,	0x3020),</div><div class='del'>-	PINGROUP(ULPI_DIR,	  BB,	    SPI1,	RSVD,	    UARTD,	ULPI,	    RSVD,	INPUT,	0x3024),</div><div class='del'>-	PINGROUP(ULPI_NXT,	  BB,	    SPI1,	RSVD,	    UARTD,	ULPI,	    RSVD,	INPUT,	0x3028),</div><div class='del'>-	PINGROUP(ULPI_STP,	  BB,	    SPI1,	RSVD,	    UARTD,	ULPI,	    RSVD,	INPUT,	0x302c),</div><div class='del'>-	PINGROUP(DAP3_FS,	  BB,	    I2S2,	RSVD1,	    DISPLAYA,	DISPLAYB,   RSVD,	INPUT,	0x3030),</div><div class='del'>-	PINGROUP(DAP3_DIN,	  BB,	    I2S2,	RSVD1,	    DISPLAYA,	DISPLAYB,   RSVD,	INPUT,	0x3034),</div><div class='del'>-	PINGROUP(DAP3_DOUT,	  BB,	    I2S2,	RSVD1,	    DISPLAYA,	DISPLAYB,   RSVD,	INPUT,	0x3038),</div><div class='del'>-	PINGROUP(DAP3_SCLK,	  BB,	    I2S2,	RSVD1,	    DISPLAYA,	DISPLAYB,   RSVD,	INPUT,	0x303c),</div><div class='del'>-	PINGROUP(GPIO_PV0,	  BB,	    RSVD,	RSVD,	    RSVD,	RSVD,	    RSVD,	INPUT,	0x3040),</div><div class='del'>-	PINGROUP(GPIO_PV1,	  BB,	    RSVD,	RSVD,	    RSVD,	RSVD,	    RSVD,	INPUT,	0x3044),</div><div class='del'>-	PINGROUP(SDMMC1_CLK,	  SDMMC1,   SDIO1,	RSVD1,	    RSVD2,	INVALID,    RSVD,	INPUT,	0x3048),</div><div class='del'>-	PINGROUP(SDMMC1_CMD,	  SDMMC1,   SDIO1,	RSVD1,	    RSVD2,	INVALID,    RSVD,	INPUT,	0x304c),</div><div class='del'>-	PINGROUP(SDMMC1_DAT3,	  SDMMC1,   SDIO1,	RSVD1,	    UARTE,	INVALID,    RSVD,	INPUT,	0x3050),</div><div class='del'>-	PINGROUP(SDMMC1_DAT2,	  SDMMC1,   SDIO1,	RSVD1,	    UARTE,	INVALID,    RSVD,	INPUT,	0x3054),</div><div class='del'>-	PINGROUP(SDMMC1_DAT1,	  SDMMC1,   SDIO1,	RSVD1,	    UARTE,	INVALID,    RSVD,	INPUT,	0x3058),</div><div class='del'>-	PINGROUP(SDMMC1_DAT0,	  SDMMC1,   SDIO1,	RSVD1,	    UARTE,	INVALID,    RSVD,	INPUT,	0x305c),</div><div class='del'>-	PINGROUP(GPIO_PV2,	  SDMMC1,   OWR,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x3060),</div><div class='del'>-	PINGROUP(GPIO_PV3,	  SDMMC1,   INVALID,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x3064),</div><div class='del'>-	PINGROUP(CLK2_OUT,	  SDMMC1,   EXTPERIPH2,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x3068),</div><div class='del'>-	PINGROUP(CLK2_REQ,	  SDMMC1,   DAP,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x306c),</div><div class='del'>-	PINGROUP(LCD_PWR1,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x3070),</div><div class='del'>-	PINGROUP(LCD_PWR2,	  LCD,	    DISPLAYA,	DISPLAYB,   SPI5,	INVALID,    RSVD,	OUTPUT,	0x3074),</div><div class='del'>-	PINGROUP(LCD_SDIN,	  LCD,	    DISPLAYA,	DISPLAYB,   SPI5,	RSVD,	    RSVD,	OUTPUT,	0x3078),</div><div class='del'>-	PINGROUP(LCD_SDOUT,	  LCD,	    DISPLAYA,	DISPLAYB,   SPI5,	INVALID,    RSVD,	OUTPUT,	0x307c),</div><div class='del'>-	PINGROUP(LCD_WR_N,	  LCD,	    DISPLAYA,	DISPLAYB,   SPI5,	INVALID,    RSVD,	OUTPUT,	0x3080),</div><div class='del'>-	PINGROUP(LCD_CS0_N,	  LCD,	    DISPLAYA,	DISPLAYB,   SPI5,	RSVD,	    RSVD,	OUTPUT,	0x3084),</div><div class='del'>-	PINGROUP(LCD_DC0,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x3088),</div><div class='del'>-	PINGROUP(LCD_SCK,	  LCD,	    DISPLAYA,	DISPLAYB,   SPI5,	INVALID,    RSVD,	OUTPUT,	0x308c),</div><div class='del'>-	PINGROUP(LCD_PWR0,	  LCD,	    DISPLAYA,	DISPLAYB,   SPI5,	INVALID,    RSVD,	OUTPUT,	0x3090),</div><div class='del'>-	PINGROUP(LCD_PCLK,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x3094),</div><div class='del'>-	PINGROUP(LCD_DE,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x3098),</div><div class='del'>-	PINGROUP(LCD_HSYNC,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x309c),</div><div class='del'>-	PINGROUP(LCD_VSYNC,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30a0),</div><div class='del'>-	PINGROUP(LCD_D0,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30a4),</div><div class='del'>-	PINGROUP(LCD_D1,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30a8),</div><div class='del'>-	PINGROUP(LCD_D2,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30ac),</div><div class='del'>-	PINGROUP(LCD_D3,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30b0),</div><div class='del'>-	PINGROUP(LCD_D4,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30b4),</div><div class='del'>-	PINGROUP(LCD_D5,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30b8),</div><div class='del'>-	PINGROUP(LCD_D6,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30bc),</div><div class='del'>-	PINGROUP(LCD_D7,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30c0),</div><div class='del'>-	PINGROUP(LCD_D8,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30c4),</div><div class='del'>-	PINGROUP(LCD_D9,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30c8),</div><div class='del'>-	PINGROUP(LCD_D10,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30cc),</div><div class='del'>-	PINGROUP(LCD_D11,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30d0),</div><div class='del'>-	PINGROUP(LCD_D12,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30d4),</div><div class='del'>-	PINGROUP(LCD_D13,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30d8),</div><div class='del'>-	PINGROUP(LCD_D14,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30dc),</div><div class='del'>-	PINGROUP(LCD_D15,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30e0),</div><div class='del'>-	PINGROUP(LCD_D16,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30e4),</div><div class='del'>-	PINGROUP(LCD_D17,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30e8),</div><div class='del'>-	PINGROUP(LCD_D18,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30ec),</div><div class='del'>-	PINGROUP(LCD_D19,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30f0),</div><div class='del'>-	PINGROUP(LCD_D20,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30f4),</div><div class='del'>-	PINGROUP(LCD_D21,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30f8),</div><div class='del'>-	PINGROUP(LCD_D22,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x30fc),</div><div class='del'>-	PINGROUP(LCD_D23,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x3100),</div><div class='del'>-	PINGROUP(LCD_CS1_N,	  LCD,	    DISPLAYA,	DISPLAYB,   SPI5,	RSVD2,	    RSVD,	OUTPUT,	0x3104),</div><div class='del'>-	PINGROUP(LCD_M1,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x3108),</div><div class='del'>-	PINGROUP(LCD_DC1,	  LCD,	    DISPLAYA,	DISPLAYB,   RSVD1,	RSVD2,	    RSVD,	OUTPUT,	0x310c),</div><div class='del'>-	PINGROUP(HDMI_INT,	  LCD,	    RSVD,	RSVD,	    RSVD,	RSVD,	    RSVD,	INPUT,	0x3110),</div><div class='del'>-	PINGROUP(DDC_SCL,	  LCD,	    I2C4,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x3114),</div><div class='del'>-	PINGROUP(DDC_SDA,	  LCD,	    I2C4,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x3118),</div><div class='del'>-	PINGROUP(CRT_HSYNC,	  LCD,	    CRT,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x311c),</div><div class='del'>-	PINGROUP(CRT_VSYNC,	  LCD,	    CRT,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x3120),</div><div class='del'>-	PINGROUP(VI_D0,		  VI,	    INVALID,	RSVD1,	    VI,		RSVD2,	    RSVD,	INPUT,	0x3124),</div><div class='del'>-	PINGROUP(VI_D1,		  VI,	    INVALID,	SDIO2,	    VI,		RSVD1,	    RSVD,	INPUT,	0x3128),</div><div class='del'>-	PINGROUP(VI_D2,		  VI,	    INVALID,	SDIO2,	    VI,		RSVD1,	    RSVD,	INPUT,	0x312c),</div><div class='del'>-	PINGROUP(VI_D3,		  VI,	    INVALID,	SDIO2,	    VI,		RSVD1,	    RSVD,	INPUT,	0x3130),</div><div class='del'>-	PINGROUP(VI_D4,		  VI,	    INVALID,	SDIO2,	    VI,		RSVD1,	    RSVD,	INPUT,	0x3134),</div><div class='del'>-	PINGROUP(VI_D5,		  VI,	    INVALID,	SDIO2,	    VI,		RSVD1,	    RSVD,	INPUT,	0x3138),</div><div class='del'>-	PINGROUP(VI_D6,		  VI,	    INVALID,	SDIO2,	    VI,		RSVD1,	    RSVD,	INPUT,	0x313c),</div><div class='del'>-	PINGROUP(VI_D7,		  VI,	    INVALID,	SDIO2,	    VI,		RSVD1,	    RSVD,	INPUT,	0x3140),</div><div class='del'>-	PINGROUP(VI_D8,		  VI,	    INVALID,	SDIO2,	    VI,		RSVD1,	    RSVD,	INPUT,	0x3144),</div><div class='del'>-	PINGROUP(VI_D9,		  VI,	    INVALID,	SDIO2,	    VI,		RSVD1,	    RSVD,	INPUT,	0x3148),</div><div class='del'>-	PINGROUP(VI_D10,	  VI,	    INVALID,	RSVD1,	    VI,		RSVD2,	    RSVD,	INPUT,	0x314c),</div><div class='del'>-	PINGROUP(VI_D11,	  VI,	    INVALID,	RSVD1,	    VI,		RSVD2,	    RSVD,	INPUT,	0x3150),</div><div class='del'>-	PINGROUP(VI_PCLK,	  VI,	    RSVD1,	SDIO2,	    VI,		RSVD2,	    RSVD,	INPUT,	0x3154),</div><div class='del'>-	PINGROUP(VI_MCLK,	  VI,	    VI,		INVALID,    INVALID,	INVALID,    RSVD,	INPUT,	0x3158),</div><div class='del'>-	PINGROUP(VI_VSYNC,	  VI,	    INVALID,	RSVD1,	    VI,		RSVD2,	    RSVD,	INPUT,	0x315c),</div><div class='del'>-	PINGROUP(VI_HSYNC,	  VI,	    INVALID,	RSVD1,	    VI,		RSVD2,	    RSVD,	INPUT,	0x3160),</div><div class='del'>-	PINGROUP(UART2_RXD,	  UART,	    IRDA,	SPDIF,	    UARTA,	SPI4,	    RSVD,	INPUT,	0x3164),</div><div class='del'>-	PINGROUP(UART2_TXD,	  UART,	    IRDA,	SPDIF,	    UARTA,	SPI4,	    RSVD,	INPUT,	0x3168),</div><div class='del'>-	PINGROUP(UART2_RTS_N,	  UART,	    UARTA,	UARTB,	    GMI,	SPI4,	    RSVD,	INPUT,	0x316c),</div><div class='del'>-	PINGROUP(UART2_CTS_N,	  UART,	    UARTA,	UARTB,	    GMI,	SPI4,	    RSVD,	INPUT,	0x3170),</div><div class='del'>-	PINGROUP(UART3_TXD,	  UART,	    UARTC,	RSVD1,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3174),</div><div class='del'>-	PINGROUP(UART3_RXD,	  UART,	    UARTC,	RSVD1,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3178),</div><div class='del'>-	PINGROUP(UART3_CTS_N,	  UART,	    UARTC,	RSVD1,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x317c),</div><div class='del'>-	PINGROUP(UART3_RTS_N,	  UART,	    UARTC,	PWM0,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3180),</div><div class='del'>-	PINGROUP(GPIO_PU0,	  UART,	    OWR,	UARTA,	    GMI,	RSVD1,	    RSVD,	INPUT,	0x3184),</div><div class='del'>-	PINGROUP(GPIO_PU1,	  UART,	    RSVD1,	UARTA,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3188),</div><div class='del'>-	PINGROUP(GPIO_PU2,	  UART,	    RSVD1,	UARTA,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x318c),</div><div class='del'>-	PINGROUP(GPIO_PU3,	  UART,	    PWM0,	UARTA,	    GMI,	RSVD1,	    RSVD,	INPUT,	0x3190),</div><div class='del'>-	PINGROUP(GPIO_PU4,	  UART,	    PWM1,	UARTA,	    GMI,	RSVD1,	    RSVD,	INPUT,	0x3194),</div><div class='del'>-	PINGROUP(GPIO_PU5,	  UART,	    PWM2,	UARTA,	    GMI,	RSVD1,	    RSVD,	INPUT,	0x3198),</div><div class='del'>-	PINGROUP(GPIO_PU6,	  UART,	    PWM3,	UARTA,	    GMI,	RSVD1,	    RSVD,	INPUT,	0x319c),</div><div class='del'>-	PINGROUP(GEN1_I2C_SDA,	  UART,	    I2C,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x31a0),</div><div class='del'>-	PINGROUP(GEN1_I2C_SCL,	  UART,	    I2C,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x31a4),</div><div class='del'>-	PINGROUP(DAP4_FS,	  UART,	    I2S3,	RSVD1,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31a8),</div><div class='del'>-	PINGROUP(DAP4_DIN,	  UART,	    I2S3,	RSVD1,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31ac),</div><div class='del'>-	PINGROUP(DAP4_DOUT,	  UART,	    I2S3,	RSVD1,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31b0),</div><div class='del'>-	PINGROUP(DAP4_SCLK,	  UART,	    I2S3,	RSVD1,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31b4),</div><div class='del'>-	PINGROUP(CLK3_OUT,	  UART,	    EXTPERIPH3,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x31b8),</div><div class='del'>-	PINGROUP(CLK3_REQ,	  UART,	    DEV3,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x31bc),</div><div class='del'>-	PINGROUP(GMI_WP_N,	  GMI,	    RSVD1,	NAND,	    GMI,	GMI_ALT,    RSVD,	INPUT,	0x31c0),</div><div class='del'>-	PINGROUP(GMI_IORDY,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31c4),</div><div class='del'>-	PINGROUP(GMI_WAIT,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31c8),</div><div class='del'>-	PINGROUP(GMI_ADV_N,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31cc),</div><div class='del'>-	PINGROUP(GMI_CLK,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31d0),</div><div class='del'>-	PINGROUP(GMI_CS0_N,	  GMI,	    RSVD1,	NAND,	    GMI,	INVALID,    RSVD,	INPUT,	0x31d4),</div><div class='del'>-	PINGROUP(GMI_CS1_N,	  GMI,	    RSVD1,	NAND,	    GMI,	DTV,	    RSVD,	INPUT,	0x31d8),</div><div class='del'>-	PINGROUP(GMI_CS2_N,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31dc),</div><div class='del'>-	PINGROUP(GMI_CS3_N,	  GMI,	    RSVD1,	NAND,	    GMI,	GMI_ALT,    RSVD,	INPUT,	0x31e0),</div><div class='del'>-	PINGROUP(GMI_CS4_N,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31e4),</div><div class='del'>-	PINGROUP(GMI_CS6_N,	  GMI,	    NAND,	NAND_ALT,   GMI,	SATA,	    RSVD,	INPUT,	0x31e8),</div><div class='del'>-	PINGROUP(GMI_CS7_N,	  GMI,	    NAND,	NAND_ALT,   GMI,	GMI_ALT,    RSVD,	INPUT,	0x31ec),</div><div class='del'>-	PINGROUP(GMI_AD0,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31f0),</div><div class='del'>-	PINGROUP(GMI_AD1,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31f4),</div><div class='del'>-	PINGROUP(GMI_AD2,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31f8),</div><div class='del'>-	PINGROUP(GMI_AD3,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x31fc),</div><div class='del'>-	PINGROUP(GMI_AD4,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3200),</div><div class='del'>-	PINGROUP(GMI_AD5,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3204),</div><div class='del'>-	PINGROUP(GMI_AD6,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3208),</div><div class='del'>-	PINGROUP(GMI_AD7,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x320c),</div><div class='del'>-	PINGROUP(GMI_AD8,	  GMI,	    PWM0,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3210),</div><div class='del'>-	PINGROUP(GMI_AD9,	  GMI,	    PWM1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3214),</div><div class='del'>-	PINGROUP(GMI_AD10,	  GMI,	    PWM2,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3218),</div><div class='del'>-	PINGROUP(GMI_AD11,	  GMI,	    PWM3,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x321c),</div><div class='del'>-	PINGROUP(GMI_AD12,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3220),</div><div class='del'>-	PINGROUP(GMI_AD13,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3224),</div><div class='del'>-	PINGROUP(GMI_AD14,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x3228),</div><div class='del'>-	PINGROUP(GMI_AD15,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD2,	    RSVD,	INPUT,	0x322c),</div><div class='del'>-	PINGROUP(GMI_A16,	  GMI,	    UARTD,	SPI4,	    GMI,	GMI_ALT,    RSVD,	INPUT,	0x3230),</div><div class='del'>-	PINGROUP(GMI_A17,	  GMI,	    UARTD,	SPI4,	    GMI,	INVALID,    RSVD,	INPUT,	0x3234),</div><div class='del'>-	PINGROUP(GMI_A18,	  GMI,	    UARTD,	SPI4,	    GMI,	INVALID,    RSVD,	INPUT,	0x3238),</div><div class='del'>-	PINGROUP(GMI_A19,	  GMI,	    UARTD,	SPI4,	    GMI,	RSVD3,	    RSVD,	INPUT,	0x323c),</div><div class='del'>-	PINGROUP(GMI_WR_N,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD3,	    RSVD,	INPUT,	0x3240),</div><div class='del'>-	PINGROUP(GMI_OE_N,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD3,	    RSVD,	INPUT,	0x3244),</div><div class='del'>-	PINGROUP(GMI_DQS,	  GMI,	    RSVD1,	NAND,	    GMI,	RSVD3,	    RSVD,	INPUT,	0x3248),</div><div class='del'>-	PINGROUP(GMI_RST_N,	  GMI,	    NAND,	NAND_ALT,   GMI,	RSVD3,	    RSVD,	INPUT,	0x324c),</div><div class='del'>-	PINGROUP(GEN2_I2C_SCL,	  GMI,	    I2C2,	INVALID,    GMI,	RSVD3,	    RSVD,	INPUT,	0x3250),</div><div class='del'>-	PINGROUP(GEN2_I2C_SDA,	  GMI,	    I2C2,	INVALID,    GMI,	RSVD3,	    RSVD,	INPUT,	0x3254),</div><div class='del'>-	PINGROUP(SDMMC4_CLK,	  SDMMC4,   INVALID,	NAND,	    GMI,	SDIO4,	    RSVD,	INPUT,	0x3258),</div><div class='del'>-	PINGROUP(SDMMC4_CMD,	  SDMMC4,   I2C3,	NAND,	    GMI,	SDIO4,	    RSVD,	INPUT,	0x325c),</div><div class='del'>-	PINGROUP(SDMMC4_DAT0,	  SDMMC4,   UARTE,	SPI3,	    GMI,	SDIO4,	    RSVD,	INPUT,	0x3260),</div><div class='del'>-	PINGROUP(SDMMC4_DAT1,	  SDMMC4,   UARTE,	SPI3,	    GMI,	SDIO4,	    RSVD,	INPUT,	0x3264),</div><div class='del'>-	PINGROUP(SDMMC4_DAT2,	  SDMMC4,   UARTE,	SPI3,	    GMI,	SDIO4,	    RSVD,	INPUT,	0x3268),</div><div class='del'>-	PINGROUP(SDMMC4_DAT3,	  SDMMC4,   UARTE,	SPI3,	    GMI,	SDIO4,	    RSVD,	INPUT,	0x326c),</div><div class='del'>-	PINGROUP(SDMMC4_DAT4,	  SDMMC4,   I2C3,	I2S4,	    GMI,	SDIO4,	    RSVD,	INPUT,	0x3270),</div><div class='del'>-	PINGROUP(SDMMC4_DAT5,	  SDMMC4,   VGP3,	I2S4,	    GMI,	SDIO4,	    RSVD,	INPUT,	0x3274),</div><div class='del'>-	PINGROUP(SDMMC4_DAT6,	  SDMMC4,   VGP4,	I2S4,	    GMI,	SDIO4,	    RSVD,	INPUT,	0x3278),</div><div class='del'>-	PINGROUP(SDMMC4_DAT7,	  SDMMC4,   VGP5,	I2S4,	    GMI,	SDIO4,	    RSVD,	INPUT,	0x327c),</div><div class='del'>-	PINGROUP(SDMMC4_RST_N,	  SDMMC4,   VGP6,	RSVD1,	    RSVD2,	POPSDMMC4,  RSVD,	INPUT,	0x3280),</div><div class='del'>-	PINGROUP(CAM_MCLK,	  CAM,	    VI,		INVALID,    VI_ALT2,	POPSDMMC4,  RSVD,	INPUT,	0x3284),</div><div class='del'>-	PINGROUP(GPIO_PCC1,	  CAM,	    I2S4,	RSVD1,	    RSVD2,	POPSDMMC4,  RSVD,	INPUT,	0x3288),</div><div class='del'>-	PINGROUP(GPIO_PBB0,	  CAM,	    I2S4,	RSVD1,	    RSVD2,	POPSDMMC4,  RSVD,	INPUT,	0x328c),</div><div class='del'>-	PINGROUP(CAM_I2C_SCL,	  CAM,	    INVALID,	I2C3,	    RSVD2,	POPSDMMC4,  RSVD,	INPUT,	0x3290),</div><div class='del'>-	PINGROUP(CAM_I2C_SDA,	  CAM,	    INVALID,	I2C3,	    RSVD2,	POPSDMMC4,  RSVD,	INPUT,	0x3294),</div><div class='del'>-	PINGROUP(GPIO_PBB3,	  CAM,	    VGP3,	DISPLAYA,   DISPLAYB,	POPSDMMC4,  RSVD,	INPUT,	0x3298),</div><div class='del'>-	PINGROUP(GPIO_PBB4,	  CAM,	    VGP4,	DISPLAYA,   DISPLAYB,	POPSDMMC4,  RSVD,	INPUT,	0x329c),</div><div class='del'>-	PINGROUP(GPIO_PBB5,	  CAM,	    VGP5,	DISPLAYA,   DISPLAYB,	POPSDMMC4,  RSVD,	INPUT,	0x32a0),</div><div class='del'>-	PINGROUP(GPIO_PBB6,	  CAM,	    VGP6,	DISPLAYA,   DISPLAYB,	POPSDMMC4,  RSVD,	INPUT,	0x32a4),</div><div class='del'>-	PINGROUP(GPIO_PBB7,	  CAM,	    I2S4,	RSVD1,	    RSVD2,	POPSDMMC4,  RSVD,	INPUT,	0x32a8),</div><div class='del'>-	PINGROUP(GPIO_PCC2,	  CAM,	    I2S4,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x32ac),</div><div class='del'>-	PINGROUP(JTAG_RTCK,	  SYS,	    RTCK,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x32b0),</div><div class='del'>-	PINGROUP(PWR_I2C_SCL,	  SYS,	    I2CPWR,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x32b4),</div><div class='del'>-	PINGROUP(PWR_I2C_SDA,	  SYS,	    I2CPWR,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x32b8),</div><div class='del'>-	PINGROUP(KB_ROW0,	  SYS,	    KBC,	INVALID,    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x32bc),</div><div class='del'>-	PINGROUP(KB_ROW1,	  SYS,	    KBC,	INVALID,    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x32c0),</div><div class='del'>-	PINGROUP(KB_ROW2,	  SYS,	    KBC,	INVALID,    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x32c4),</div><div class='del'>-	PINGROUP(KB_ROW3,	  SYS,	    KBC,	INVALID,    RSVD2,	INVALID,    RSVD,	INPUT,	0x32c8),</div><div class='del'>-	PINGROUP(KB_ROW4,	  SYS,	    KBC,	INVALID,    TRACE,	RSVD3,	    RSVD,	INPUT,	0x32cc),</div><div class='del'>-	PINGROUP(KB_ROW5,	  SYS,	    KBC,	INVALID,    TRACE,	OWR,	    RSVD,	INPUT,	0x32d0),</div><div class='del'>-	PINGROUP(KB_ROW6,	  SYS,	    KBC,	INVALID,    SDIO2,	INVALID,    RSVD,	INPUT,	0x32d4),</div><div class='del'>-	PINGROUP(KB_ROW7,	  SYS,	    KBC,	INVALID,    SDIO2,	INVALID,    RSVD,	INPUT,	0x32d8),</div><div class='del'>-	PINGROUP(KB_ROW8,	  SYS,	    KBC,	INVALID,    SDIO2,	INVALID,    RSVD,	INPUT,	0x32dc),</div><div class='del'>-	PINGROUP(KB_ROW9,	  SYS,	    KBC,	INVALID,    SDIO2,	INVALID,    RSVD,	INPUT,	0x32e0),</div><div class='del'>-	PINGROUP(KB_ROW10,	  SYS,	    KBC,	INVALID,    SDIO2,	INVALID,    RSVD,	INPUT,	0x32e4),</div><div class='del'>-	PINGROUP(KB_ROW11,	  SYS,	    KBC,	INVALID,    SDIO2,	INVALID,    RSVD,	INPUT,	0x32e8),</div><div class='del'>-	PINGROUP(KB_ROW12,	  SYS,	    KBC,	INVALID,    SDIO2,	INVALID,    RSVD,	INPUT,	0x32ec),</div><div class='del'>-	PINGROUP(KB_ROW13,	  SYS,	    KBC,	INVALID,    SDIO2,	INVALID,    RSVD,	INPUT,	0x32f0),</div><div class='del'>-	PINGROUP(KB_ROW14,	  SYS,	    KBC,	INVALID,    SDIO2,	INVALID,    RSVD,	INPUT,	0x32f4),</div><div class='del'>-	PINGROUP(KB_ROW15,	  SYS,	    KBC,	INVALID,    SDIO2,	INVALID,    RSVD,	INPUT,	0x32f8),</div><div class='del'>-	PINGROUP(KB_COL0,	  SYS,	    KBC,	INVALID,    TRACE,	INVALID,    RSVD,	INPUT,	0x32fc),</div><div class='del'>-	PINGROUP(KB_COL1,	  SYS,	    KBC,	INVALID,    TRACE,	INVALID,    RSVD,	INPUT,	0x3300),</div><div class='del'>-	PINGROUP(KB_COL2,	  SYS,	    KBC,	INVALID,    TRACE,	RSVD,	    RSVD,	INPUT,	0x3304),</div><div class='del'>-	PINGROUP(KB_COL3,	  SYS,	    KBC,	INVALID,    TRACE,	RSVD,	    RSVD,	INPUT,	0x3308),</div><div class='del'>-	PINGROUP(KB_COL4,	  SYS,	    KBC,	INVALID,    TRACE,	RSVD,	    RSVD,	INPUT,	0x330c),</div><div class='del'>-	PINGROUP(KB_COL5,	  SYS,	    KBC,	INVALID,    TRACE,	RSVD,	    RSVD,	INPUT,	0x3310),</div><div class='del'>-	PINGROUP(KB_COL6,	  SYS,	    KBC,	INVALID,    TRACE,	INVALID,    RSVD,	INPUT,	0x3314),</div><div class='del'>-	PINGROUP(KB_COL7,	  SYS,	    KBC,	INVALID,    TRACE,	INVALID,    RSVD,	INPUT,	0x3318),</div><div class='del'>-	PINGROUP(CLK_32K_OUT,	  SYS,	    BLINK,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x331c),</div><div class='del'>-	PINGROUP(SYS_CLK_REQ,	  SYS,	    SYSCLK,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x3320),</div><div class='del'>-	PINGROUP(CORE_PWR_REQ,	  SYS,	    RSVD,	RSVD,	    RSVD,	RSVD,	    RSVD,	INPUT,	0x3324),</div><div class='del'>-	PINGROUP(CPU_PWR_REQ,	  SYS,	    RSVD,	RSVD,	    RSVD,	RSVD,	    RSVD,	INPUT,	0x3328),</div><div class='del'>-	PINGROUP(PWR_INT_N,	  SYS,	    RSVD,	RSVD,	    RSVD,	RSVD,	    RSVD,	INPUT,	0x332c),</div><div class='del'>-	PINGROUP(CLK_32K_IN,	  SYS,	    RSVD,	RSVD,	    RSVD,	RSVD,	    RSVD,	INPUT,	0x3330),</div><div class='del'>-	PINGROUP(OWR,		  SYS,	    OWR,	RSVD,	    RSVD,	RSVD,	    RSVD,	INPUT,	0x3334),</div><div class='del'>-	PINGROUP(DAP1_FS,	  AUDIO,    I2S0,	HDA,	    GMI,	SDIO2,	    RSVD,	INPUT,	0x3338),</div><div class='del'>-	PINGROUP(DAP1_DIN,	  AUDIO,    I2S0,	HDA,	    GMI,	SDIO2,	    RSVD,	INPUT,	0x333c),</div><div class='del'>-	PINGROUP(DAP1_DOUT,	  AUDIO,    I2S0,	HDA,	    GMI,	SDIO2,	    RSVD,	INPUT,	0x3340),</div><div class='del'>-	PINGROUP(DAP1_SCLK,	  AUDIO,    I2S0,	HDA,	    GMI,	SDIO2,	    RSVD,	INPUT,	0x3344),</div><div class='del'>-	PINGROUP(CLK1_REQ,	  AUDIO,    DAP,	HDA,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x3348),</div><div class='del'>-	PINGROUP(CLK1_OUT,	  AUDIO,    EXTPERIPH1,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x334c),</div><div class='del'>-	PINGROUP(SPDIF_IN,	  AUDIO,    SPDIF,	HDA,	    INVALID,	DAPSDMMC2,  RSVD,	INPUT,	0x3350),</div><div class='del'>-	PINGROUP(SPDIF_OUT,	  AUDIO,    SPDIF,	RSVD1,	    INVALID,	DAPSDMMC2,  RSVD,	INPUT,	0x3354),</div><div class='del'>-	PINGROUP(DAP2_FS,	  AUDIO,    I2S1,	HDA,	    RSVD2,	GMI,	    RSVD,	INPUT,	0x3358),</div><div class='del'>-	PINGROUP(DAP2_DIN,	  AUDIO,    I2S1,	HDA,	    RSVD2,	GMI,	    RSVD,	INPUT,	0x335c),</div><div class='del'>-	PINGROUP(DAP2_DOUT,	  AUDIO,    I2S1,	HDA,	    RSVD2,	GMI,	    RSVD,	INPUT,	0x3360),</div><div class='del'>-	PINGROUP(DAP2_SCLK,	  AUDIO,    I2S1,	HDA,	    RSVD2,	GMI,	    RSVD,	INPUT,	0x3364),</div><div class='del'>-	PINGROUP(SPI2_MOSI,	  AUDIO,    SPI6,	SPI2,	    INVALID,	GMI,	    RSVD,	INPUT,	0x3368),</div><div class='del'>-	PINGROUP(SPI2_MISO,	  AUDIO,    SPI6,	SPI2,	    INVALID,	GMI,	    RSVD,	INPUT,	0x336c),</div><div class='del'>-	PINGROUP(SPI2_CS0_N,	  AUDIO,    SPI6,	SPI2,	    INVALID,	GMI,	    RSVD,	INPUT,	0x3370),</div><div class='del'>-	PINGROUP(SPI2_SCK,	  AUDIO,    SPI6,	SPI2,	    INVALID,	GMI,	    RSVD,	INPUT,	0x3374),</div><div class='del'>-	PINGROUP(SPI1_MOSI,	  AUDIO,    SPI2,	SPI1,	    INVALID,	GMI,	    RSVD,	INPUT,	0x3378),</div><div class='del'>-	PINGROUP(SPI1_SCK,	  AUDIO,    SPI2,	SPI1,	    INVALID,	GMI,	    RSVD,	INPUT,	0x337c),</div><div class='del'>-	PINGROUP(SPI1_CS0_N,	  AUDIO,    SPI2,	SPI1,	    INVALID,	GMI,	    RSVD,	INPUT,	0x3380),</div><div class='del'>-	PINGROUP(SPI1_MISO,	  AUDIO,    INVALID,	SPI1,	    INVALID,	RSVD3,	    RSVD,	INPUT,	0x3384),</div><div class='del'>-	PINGROUP(SPI2_CS1_N,	  AUDIO,    INVALID,	SPI2,	    INVALID,	INVALID,    RSVD,	INPUT,	0x3388),</div><div class='del'>-	PINGROUP(SPI2_CS2_N,	  AUDIO,    INVALID,	SPI2,	    INVALID,	INVALID,    RSVD,	INPUT,	0x338c),</div><div class='del'>-	PINGROUP(SDMMC3_CLK,	  SDMMC3,   UARTA,	PWM2,	    SDIO3,	INVALID,    RSVD,	INPUT,	0x3390),</div><div class='del'>-	PINGROUP(SDMMC3_CMD,	  SDMMC3,   UARTA,	PWM3,	    SDIO3,	INVALID,    RSVD,	INPUT,	0x3394),</div><div class='del'>-	PINGROUP(SDMMC3_DAT0,	  SDMMC3,   RSVD,	RSVD1,	    SDIO3,	INVALID,    RSVD,	INPUT,	0x3398),</div><div class='del'>-	PINGROUP(SDMMC3_DAT1,	  SDMMC3,   RSVD,	RSVD1,	    SDIO3,	INVALID,    RSVD,	INPUT,	0x339c),</div><div class='del'>-	PINGROUP(SDMMC3_DAT2,	  SDMMC3,   RSVD,	PWM1,	    SDIO3,	INVALID,    RSVD,	INPUT,	0x33a0),</div><div class='del'>-	PINGROUP(SDMMC3_DAT3,	  SDMMC3,   RSVD,	PWM0,	    SDIO3,	INVALID,    RSVD,	INPUT,	0x33a4),</div><div class='del'>-	PINGROUP(SDMMC3_DAT4,	  SDMMC3,   PWM1,	INVALID,    SDIO3,	INVALID,    RSVD,	INPUT,	0x33a8),</div><div class='del'>-	PINGROUP(SDMMC3_DAT5,	  SDMMC3,   PWM0,	INVALID,    SDIO3,	INVALID,    RSVD,	INPUT,	0x33ac),</div><div class='del'>-	PINGROUP(SDMMC3_DAT6,	  SDMMC3,   SPDIF,	INVALID,    SDIO3,	INVALID,    RSVD,	INPUT,	0x33b0),</div><div class='del'>-	PINGROUP(SDMMC3_DAT7,	  SDMMC3,   SPDIF,	INVALID,    SDIO3,	INVALID,    RSVD,	INPUT,	0x33b4),</div><div class='del'>-	PINGROUP(PEX_L0_PRSNT_N,  PEXCTL,   PCIE,	HDA,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x33b8),</div><div class='del'>-	PINGROUP(PEX_L0_RST_N,	  PEXCTL,   PCIE,	HDA,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x33bc),</div><div class='del'>-	PINGROUP(PEX_L0_CLKREQ_N, PEXCTL,   PCIE,	HDA,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x33c0),</div><div class='del'>-	PINGROUP(PEX_WAKE_N,	  PEXCTL,   PCIE,	HDA,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x33c4),</div><div class='del'>-	PINGROUP(PEX_L1_PRSNT_N,  PEXCTL,   PCIE,	HDA,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x33c8),</div><div class='del'>-	PINGROUP(PEX_L1_RST_N,	  PEXCTL,   PCIE,	HDA,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x33cc),</div><div class='del'>-	PINGROUP(PEX_L1_CLKREQ_N, PEXCTL,   PCIE,	HDA,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x33d0),</div><div class='del'>-	PINGROUP(PEX_L2_PRSNT_N,  PEXCTL,   PCIE,	HDA,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x33d4),</div><div class='del'>-	PINGROUP(PEX_L2_RST_N,	  PEXCTL,   PCIE,	HDA,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x33d8),</div><div class='del'>-	PINGROUP(PEX_L2_CLKREQ_N, PEXCTL,   PCIE,	HDA,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x33dc),</div><div class='del'>-	PINGROUP(HDMI_CEC,	  SYS,      CEC,	RSVD1,	    RSVD2,	RSVD3,	    RSVD,	INPUT,	0x33e0),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __devinit tegra30_pinmux_init(const struct tegra_pingroup_desc **pg,</div><div class='del'>-		int *pg_max, const struct tegra_drive_pingroup_desc **pgdrive,</div><div class='del'>-		int *pgdrive_max)</div><div class='del'>-{</div><div class='del'>-	*pg = tegra_soc_pingroups;</div><div class='del'>-	*pg_max = TEGRA_MAX_PINGROUP;</div><div class='del'>-	*pgdrive = tegra_soc_drive_pingroups;</div><div class='del'>-	*pgdrive_max = TEGRA_MAX_DRIVE_PINGROUP;</div><div class='del'>-}</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c<br/>deleted file mode 100644<br/>index ac35d2b76850..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/pinmux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/pinmux.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,987 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/arch/arm/mach-tegra/pinmux.c</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 Google, Inc.</div><div class='del'>- *</div><div class='del'>- * This software is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2, as published by the Free Software Foundation, and</div><div class='del'>- * may be copied, distributed, and modified under those terms.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/of_device.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/iomap.h&gt;</div><div class='del'>-#include &lt;mach/pinmux.h&gt;</div><div class='del'>-</div><div class='del'>-#define HSM_EN(reg)	(((reg) &gt;&gt; 2) &amp; 0x1)</div><div class='del'>-#define SCHMT_EN(reg)	(((reg) &gt;&gt; 3) &amp; 0x1)</div><div class='del'>-#define LPMD(reg)	(((reg) &gt;&gt; 4) &amp; 0x3)</div><div class='del'>-#define DRVDN(reg)	(((reg) &gt;&gt; 12) &amp; 0x1f)</div><div class='del'>-#define DRVUP(reg)	(((reg) &gt;&gt; 20) &amp; 0x1f)</div><div class='del'>-#define SLWR(reg)	(((reg) &gt;&gt; 28) &amp; 0x3)</div><div class='del'>-#define SLWF(reg)	(((reg) &gt;&gt; 30) &amp; 0x3)</div><div class='del'>-</div><div class='del'>-static const struct tegra_pingroup_desc *pingroups;</div><div class='del'>-static const struct tegra_drive_pingroup_desc *drive_pingroups;</div><div class='del'>-static int pingroup_max;</div><div class='del'>-static int drive_max;</div><div class='del'>-</div><div class='del'>-static char *tegra_mux_names[TEGRA_MAX_MUX] = {</div><div class='del'>-	[TEGRA_MUX_AHB_CLK] = "AHB_CLK",</div><div class='del'>-	[TEGRA_MUX_APB_CLK] = "APB_CLK",</div><div class='del'>-	[TEGRA_MUX_AUDIO_SYNC] = "AUDIO_SYNC",</div><div class='del'>-	[TEGRA_MUX_CRT] = "CRT",</div><div class='del'>-	[TEGRA_MUX_DAP1] = "DAP1",</div><div class='del'>-	[TEGRA_MUX_DAP2] = "DAP2",</div><div class='del'>-	[TEGRA_MUX_DAP3] = "DAP3",</div><div class='del'>-	[TEGRA_MUX_DAP4] = "DAP4",</div><div class='del'>-	[TEGRA_MUX_DAP5] = "DAP5",</div><div class='del'>-	[TEGRA_MUX_DISPLAYA] = "DISPLAYA",</div><div class='del'>-	[TEGRA_MUX_DISPLAYB] = "DISPLAYB",</div><div class='del'>-	[TEGRA_MUX_EMC_TEST0_DLL] = "EMC_TEST0_DLL",</div><div class='del'>-	[TEGRA_MUX_EMC_TEST1_DLL] = "EMC_TEST1_DLL",</div><div class='del'>-	[TEGRA_MUX_GMI] = "GMI",</div><div class='del'>-	[TEGRA_MUX_GMI_INT] = "GMI_INT",</div><div class='del'>-	[TEGRA_MUX_HDMI] = "HDMI",</div><div class='del'>-	[TEGRA_MUX_I2C] = "I2C",</div><div class='del'>-	[TEGRA_MUX_I2C2] = "I2C2",</div><div class='del'>-	[TEGRA_MUX_I2C3] = "I2C3",</div><div class='del'>-	[TEGRA_MUX_IDE] = "IDE",</div><div class='del'>-	[TEGRA_MUX_IRDA] = "IRDA",</div><div class='del'>-	[TEGRA_MUX_KBC] = "KBC",</div><div class='del'>-	[TEGRA_MUX_MIO] = "MIO",</div><div class='del'>-	[TEGRA_MUX_MIPI_HS] = "MIPI_HS",</div><div class='del'>-	[TEGRA_MUX_NAND] = "NAND",</div><div class='del'>-	[TEGRA_MUX_OSC] = "OSC",</div><div class='del'>-	[TEGRA_MUX_OWR] = "OWR",</div><div class='del'>-	[TEGRA_MUX_PCIE] = "PCIE",</div><div class='del'>-	[TEGRA_MUX_PLLA_OUT] = "PLLA_OUT",</div><div class='del'>-	[TEGRA_MUX_PLLC_OUT1] = "PLLC_OUT1",</div><div class='del'>-	[TEGRA_MUX_PLLM_OUT1] = "PLLM_OUT1",</div><div class='del'>-	[TEGRA_MUX_PLLP_OUT2] = "PLLP_OUT2",</div><div class='del'>-	[TEGRA_MUX_PLLP_OUT3] = "PLLP_OUT3",</div><div class='del'>-	[TEGRA_MUX_PLLP_OUT4] = "PLLP_OUT4",</div><div class='del'>-	[TEGRA_MUX_PWM] = "PWM",</div><div class='del'>-	[TEGRA_MUX_PWR_INTR] = "PWR_INTR",</div><div class='del'>-	[TEGRA_MUX_PWR_ON] = "PWR_ON",</div><div class='del'>-	[TEGRA_MUX_RTCK] = "RTCK",</div><div class='del'>-	[TEGRA_MUX_SDIO1] = "SDIO1",</div><div class='del'>-	[TEGRA_MUX_SDIO2] = "SDIO2",</div><div class='del'>-	[TEGRA_MUX_SDIO3] = "SDIO3",</div><div class='del'>-	[TEGRA_MUX_SDIO4] = "SDIO4",</div><div class='del'>-	[TEGRA_MUX_SFLASH] = "SFLASH",</div><div class='del'>-	[TEGRA_MUX_SPDIF] = "SPDIF",</div><div class='del'>-	[TEGRA_MUX_SPI1] = "SPI1",</div><div class='del'>-	[TEGRA_MUX_SPI2] = "SPI2",</div><div class='del'>-	[TEGRA_MUX_SPI2_ALT] = "SPI2_ALT",</div><div class='del'>-	[TEGRA_MUX_SPI3] = "SPI3",</div><div class='del'>-	[TEGRA_MUX_SPI4] = "SPI4",</div><div class='del'>-	[TEGRA_MUX_TRACE] = "TRACE",</div><div class='del'>-	[TEGRA_MUX_TWC] = "TWC",</div><div class='del'>-	[TEGRA_MUX_UARTA] = "UARTA",</div><div class='del'>-	[TEGRA_MUX_UARTB] = "UARTB",</div><div class='del'>-	[TEGRA_MUX_UARTC] = "UARTC",</div><div class='del'>-	[TEGRA_MUX_UARTD] = "UARTD",</div><div class='del'>-	[TEGRA_MUX_UARTE] = "UARTE",</div><div class='del'>-	[TEGRA_MUX_ULPI] = "ULPI",</div><div class='del'>-	[TEGRA_MUX_VI] = "VI",</div><div class='del'>-	[TEGRA_MUX_VI_SENSOR_CLK] = "VI_SENSOR_CLK",</div><div class='del'>-	[TEGRA_MUX_XIO] = "XIO",</div><div class='del'>-	[TEGRA_MUX_BLINK] = "BLINK",</div><div class='del'>-	[TEGRA_MUX_CEC] = "CEC",</div><div class='del'>-	[TEGRA_MUX_CLK12] = "CLK12",</div><div class='del'>-	[TEGRA_MUX_DAP] = "DAP",</div><div class='del'>-	[TEGRA_MUX_DAPSDMMC2] = "DAPSDMMC2",</div><div class='del'>-	[TEGRA_MUX_DDR] = "DDR",</div><div class='del'>-	[TEGRA_MUX_DEV3] = "DEV3",</div><div class='del'>-	[TEGRA_MUX_DTV] = "DTV",</div><div class='del'>-	[TEGRA_MUX_VI_ALT1] = "VI_ALT1",</div><div class='del'>-	[TEGRA_MUX_VI_ALT2] = "VI_ALT2",</div><div class='del'>-	[TEGRA_MUX_VI_ALT3] = "VI_ALT3",</div><div class='del'>-	[TEGRA_MUX_EMC_DLL] = "EMC_DLL",</div><div class='del'>-	[TEGRA_MUX_EXTPERIPH1] = "EXTPERIPH1",</div><div class='del'>-	[TEGRA_MUX_EXTPERIPH2] = "EXTPERIPH2",</div><div class='del'>-	[TEGRA_MUX_EXTPERIPH3] = "EXTPERIPH3",</div><div class='del'>-	[TEGRA_MUX_GMI_ALT] = "GMI_ALT",</div><div class='del'>-	[TEGRA_MUX_HDA] = "HDA",</div><div class='del'>-	[TEGRA_MUX_HSI] = "HSI",</div><div class='del'>-	[TEGRA_MUX_I2C4] = "I2C4",</div><div class='del'>-	[TEGRA_MUX_I2C5] = "I2C5",</div><div class='del'>-	[TEGRA_MUX_I2CPWR] = "I2CPWR",</div><div class='del'>-	[TEGRA_MUX_I2S0] = "I2S0",</div><div class='del'>-	[TEGRA_MUX_I2S1] = "I2S1",</div><div class='del'>-	[TEGRA_MUX_I2S2] = "I2S2",</div><div class='del'>-	[TEGRA_MUX_I2S3] = "I2S3",</div><div class='del'>-	[TEGRA_MUX_I2S4] = "I2S4",</div><div class='del'>-	[TEGRA_MUX_NAND_ALT] = "NAND_ALT",</div><div class='del'>-	[TEGRA_MUX_POPSDIO4] = "POPSDIO4",</div><div class='del'>-	[TEGRA_MUX_POPSDMMC4] = "POPSDMMC4",</div><div class='del'>-	[TEGRA_MUX_PWM0] = "PWM0",</div><div class='del'>-	[TEGRA_MUX_PWM1] = "PWM2",</div><div class='del'>-	[TEGRA_MUX_PWM2] = "PWM2",</div><div class='del'>-	[TEGRA_MUX_PWM3] = "PWM3",</div><div class='del'>-	[TEGRA_MUX_SATA] = "SATA",</div><div class='del'>-	[TEGRA_MUX_SPI5] = "SPI5",</div><div class='del'>-	[TEGRA_MUX_SPI6] = "SPI6",</div><div class='del'>-	[TEGRA_MUX_SYSCLK] = "SYSCLK",</div><div class='del'>-	[TEGRA_MUX_VGP1] = "VGP1",</div><div class='del'>-	[TEGRA_MUX_VGP2] = "VGP2",</div><div class='del'>-	[TEGRA_MUX_VGP3] = "VGP3",</div><div class='del'>-	[TEGRA_MUX_VGP4] = "VGP4",</div><div class='del'>-	[TEGRA_MUX_VGP5] = "VGP5",</div><div class='del'>-	[TEGRA_MUX_VGP6] = "VGP6",</div><div class='del'>-	[TEGRA_MUX_SAFE] = "&lt;safe&gt;",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const char *tegra_drive_names[TEGRA_MAX_DRIVE] = {</div><div class='del'>-	[TEGRA_DRIVE_DIV_8] = "DIV_8",</div><div class='del'>-	[TEGRA_DRIVE_DIV_4] = "DIV_4",</div><div class='del'>-	[TEGRA_DRIVE_DIV_2] = "DIV_2",</div><div class='del'>-	[TEGRA_DRIVE_DIV_1] = "DIV_1",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const char *tegra_slew_names[TEGRA_MAX_SLEW] = {</div><div class='del'>-	[TEGRA_SLEW_FASTEST] = "FASTEST",</div><div class='del'>-	[TEGRA_SLEW_FAST] = "FAST",</div><div class='del'>-	[TEGRA_SLEW_SLOW] = "SLOW",</div><div class='del'>-	[TEGRA_SLEW_SLOWEST] = "SLOWEST",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static DEFINE_SPINLOCK(mux_lock);</div><div class='del'>-</div><div class='del'>-static const char *pingroup_name(int pg)</div><div class='del'>-{</div><div class='del'>-	if (pg &lt; 0 || pg &gt;=  pingroup_max)</div><div class='del'>-		return "&lt;UNKNOWN&gt;";</div><div class='del'>-</div><div class='del'>-	return pingroups[pg].name;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const char *func_name(enum tegra_mux_func func)</div><div class='del'>-{</div><div class='del'>-	if (func == TEGRA_MUX_RSVD1)</div><div class='del'>-		return "RSVD1";</div><div class='del'>-</div><div class='del'>-	if (func == TEGRA_MUX_RSVD2)</div><div class='del'>-		return "RSVD2";</div><div class='del'>-</div><div class='del'>-	if (func == TEGRA_MUX_RSVD3)</div><div class='del'>-		return "RSVD3";</div><div class='del'>-</div><div class='del'>-	if (func == TEGRA_MUX_RSVD4)</div><div class='del'>-		return "RSVD4";</div><div class='del'>-</div><div class='del'>-	if (func == TEGRA_MUX_NONE)</div><div class='del'>-		return "NONE";</div><div class='del'>-</div><div class='del'>-	if (func &lt; 0 || func &gt;=  TEGRA_MAX_MUX)</div><div class='del'>-		return "&lt;UNKNOWN&gt;";</div><div class='del'>-</div><div class='del'>-	return tegra_mux_names[func];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static const char *tri_name(unsigned long val)</div><div class='del'>-{</div><div class='del'>-	return val ? "TRISTATE" : "NORMAL";</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const char *pupd_name(unsigned long val)</div><div class='del'>-{</div><div class='del'>-	switch (val) {</div><div class='del'>-	case 0:</div><div class='del'>-		return "NORMAL";</div><div class='del'>-</div><div class='del'>-	case 1:</div><div class='del'>-		return "PULL_DOWN";</div><div class='del'>-</div><div class='del'>-	case 2:</div><div class='del'>-		return "PULL_UP";</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return "RSVD";</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int nbanks;</div><div class='del'>-static void __iomem **regs;</div><div class='del'>-</div><div class='del'>-static inline u32 pg_readl(u32 bank, u32 reg)</div><div class='del'>-{</div><div class='del'>-	return readl(regs[bank] + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void pg_writel(u32 val, u32 bank, u32 reg)</div><div class='del'>-{</div><div class='del'>-	writel(val, regs[bank] + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tegra_pinmux_set_func(const struct tegra_pingroup_config *config)</div><div class='del'>-{</div><div class='del'>-	int mux = -1;</div><div class='del'>-	int i;</div><div class='del'>-	unsigned long reg;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int pg = config-&gt;pingroup;</div><div class='del'>-	enum tegra_mux_func func = config-&gt;func;</div><div class='del'>-</div><div class='del'>-	if (pg &lt; 0 || pg &gt;=  pingroup_max)</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	if (pingroups[pg].mux_reg &lt; 0)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (func &lt; 0)</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	if (func == TEGRA_MUX_SAFE)</div><div class='del'>-		func = pingroups[pg].func_safe;</div><div class='del'>-</div><div class='del'>-	if (func &amp; TEGRA_MUX_RSVD) {</div><div class='del'>-		mux = func &amp; 0x3;</div><div class='del'>-	} else {</div><div class='del'>-		for (i = 0; i &lt; 4; i++) {</div><div class='del'>-			if (pingroups[pg].funcs[i] == func) {</div><div class='del'>-				mux = i;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (mux &lt; 0)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	reg = pg_readl(pingroups[pg].mux_bank, pingroups[pg].mux_reg);</div><div class='del'>-	reg &amp;= ~(0x3 &lt;&lt; pingroups[pg].mux_bit);</div><div class='del'>-	reg |= mux &lt;&lt; pingroups[pg].mux_bit;</div><div class='del'>-	pg_writel(reg, pingroups[pg].mux_bank, pingroups[pg].mux_reg);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int tegra_pinmux_set_tristate(int pg, enum tegra_tristate tristate)</div><div class='del'>-{</div><div class='del'>-	unsigned long reg;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (pg &lt; 0 || pg &gt;=  pingroup_max)</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	if (pingroups[pg].tri_reg &lt; 0)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	reg = pg_readl(pingroups[pg].tri_bank, pingroups[pg].tri_reg);</div><div class='del'>-	reg &amp;= ~(0x1 &lt;&lt; pingroups[pg].tri_bit);</div><div class='del'>-	if (tristate)</div><div class='del'>-		reg |= 1 &lt;&lt; pingroups[pg].tri_bit;</div><div class='del'>-	pg_writel(reg, pingroups[pg].tri_bank, pingroups[pg].tri_reg);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int tegra_pinmux_set_pullupdown(int pg, enum tegra_pullupdown pupd)</div><div class='del'>-{</div><div class='del'>-	unsigned long reg;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (pg &lt; 0 || pg &gt;=  pingroup_max)</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	if (pingroups[pg].pupd_reg &lt; 0)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (pupd != TEGRA_PUPD_NORMAL &amp;&amp;</div><div class='del'>-	    pupd != TEGRA_PUPD_PULL_DOWN &amp;&amp;</div><div class='del'>-	    pupd != TEGRA_PUPD_PULL_UP)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	reg = pg_readl(pingroups[pg].pupd_bank, pingroups[pg].pupd_reg);</div><div class='del'>-	reg &amp;= ~(0x3 &lt;&lt; pingroups[pg].pupd_bit);</div><div class='del'>-	reg |= pupd &lt;&lt; pingroups[pg].pupd_bit;</div><div class='del'>-	pg_writel(reg, pingroups[pg].pupd_bank, pingroups[pg].pupd_reg);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tegra_pinmux_config_pingroup(const struct tegra_pingroup_config *config)</div><div class='del'>-{</div><div class='del'>-	int pingroup = config-&gt;pingroup;</div><div class='del'>-	enum tegra_mux_func func     = config-&gt;func;</div><div class='del'>-	enum tegra_pullupdown pupd   = config-&gt;pupd;</div><div class='del'>-	enum tegra_tristate tristate = config-&gt;tristate;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (pingroups[pingroup].mux_reg &gt;= 0) {</div><div class='del'>-		err = tegra_pinmux_set_func(config);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			pr_err("pinmux: can't set pingroup %s func to %s: %d\n",</div><div class='del'>-			       pingroup_name(pingroup), func_name(func), err);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (pingroups[pingroup].pupd_reg &gt;= 0) {</div><div class='del'>-		err = tegra_pinmux_set_pullupdown(pingroup, pupd);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			pr_err("pinmux: can't set pingroup %s pullupdown to %s: %d\n",</div><div class='del'>-			       pingroup_name(pingroup), pupd_name(pupd), err);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (pingroups[pingroup].tri_reg &gt;= 0) {</div><div class='del'>-		err = tegra_pinmux_set_tristate(pingroup, tristate);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			pr_err("pinmux: can't set pingroup %s tristate to %s: %d\n",</div><div class='del'>-			       pingroup_name(pingroup), tri_name(func), err);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void tegra_pinmux_config_table(const struct tegra_pingroup_config *config, int len)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; len; i++)</div><div class='del'>-		tegra_pinmux_config_pingroup(&amp;config[i]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const char *drive_pinmux_name(int pg)</div><div class='del'>-{</div><div class='del'>-	if (pg &lt; 0 || pg &gt;=  drive_max)</div><div class='del'>-		return "&lt;UNKNOWN&gt;";</div><div class='del'>-</div><div class='del'>-	return drive_pingroups[pg].name;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const char *enable_name(unsigned long val)</div><div class='del'>-{</div><div class='del'>-	return val ? "ENABLE" : "DISABLE";</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const char *drive_name(unsigned long val)</div><div class='del'>-{</div><div class='del'>-	if (val &gt;= TEGRA_MAX_DRIVE)</div><div class='del'>-		return "&lt;UNKNOWN&gt;";</div><div class='del'>-</div><div class='del'>-	return tegra_drive_names[val];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const char *slew_name(unsigned long val)</div><div class='del'>-{</div><div class='del'>-	if (val &gt;= TEGRA_MAX_SLEW)</div><div class='del'>-		return "&lt;UNKNOWN&gt;";</div><div class='del'>-</div><div class='del'>-	return tegra_slew_names[val];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tegra_drive_pinmux_set_hsm(int pg, enum tegra_hsm hsm)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 reg;</div><div class='del'>-	if (pg &lt; 0 || pg &gt;=  drive_max)</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	if (hsm != TEGRA_HSM_ENABLE &amp;&amp; hsm != TEGRA_HSM_DISABLE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-	if (hsm == TEGRA_HSM_ENABLE)</div><div class='del'>-		reg |= (1 &lt;&lt; 2);</div><div class='del'>-	else</div><div class='del'>-		reg &amp;= ~(1 &lt;&lt; 2);</div><div class='del'>-	pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tegra_drive_pinmux_set_schmitt(int pg, enum tegra_schmitt schmitt)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 reg;</div><div class='del'>-	if (pg &lt; 0 || pg &gt;=  drive_max)</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	if (schmitt != TEGRA_SCHMITT_ENABLE &amp;&amp; schmitt != TEGRA_SCHMITT_DISABLE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-	if (schmitt == TEGRA_SCHMITT_ENABLE)</div><div class='del'>-		reg |= (1 &lt;&lt; 3);</div><div class='del'>-	else</div><div class='del'>-		reg &amp;= ~(1 &lt;&lt; 3);</div><div class='del'>-	pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tegra_drive_pinmux_set_drive(int pg, enum tegra_drive drive)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 reg;</div><div class='del'>-	if (pg &lt; 0 || pg &gt;=  drive_max)</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	if (drive &lt; 0 || drive &gt;= TEGRA_MAX_DRIVE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-	reg &amp;= ~(0x3 &lt;&lt; 4);</div><div class='del'>-	reg |= drive &lt;&lt; 4;</div><div class='del'>-	pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tegra_drive_pinmux_set_pull_down(int pg,</div><div class='del'>-	enum tegra_pull_strength pull_down)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 reg;</div><div class='del'>-	if (pg &lt; 0 || pg &gt;=  drive_max)</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	if (pull_down &lt; 0 || pull_down &gt;= TEGRA_MAX_PULL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-	reg &amp;= ~(0x1f &lt;&lt; 12);</div><div class='del'>-	reg |= pull_down &lt;&lt; 12;</div><div class='del'>-	pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tegra_drive_pinmux_set_pull_up(int pg,</div><div class='del'>-	enum tegra_pull_strength pull_up)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 reg;</div><div class='del'>-	if (pg &lt; 0 || pg &gt;=  drive_max)</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	if (pull_up &lt; 0 || pull_up &gt;= TEGRA_MAX_PULL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-	reg &amp;= ~(0x1f &lt;&lt; 12);</div><div class='del'>-	reg |= pull_up &lt;&lt; 12;</div><div class='del'>-	pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tegra_drive_pinmux_set_slew_rising(int pg,</div><div class='del'>-	enum tegra_slew slew_rising)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 reg;</div><div class='del'>-	if (pg &lt; 0 || pg &gt;=  drive_max)</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	if (slew_rising &lt; 0 || slew_rising &gt;= TEGRA_MAX_SLEW)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-	reg &amp;= ~(0x3 &lt;&lt; 28);</div><div class='del'>-	reg |= slew_rising &lt;&lt; 28;</div><div class='del'>-	pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tegra_drive_pinmux_set_slew_falling(int pg,</div><div class='del'>-	enum tegra_slew slew_falling)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 reg;</div><div class='del'>-	if (pg &lt; 0 || pg &gt;=  drive_max)</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	if (slew_falling &lt; 0 || slew_falling &gt;= TEGRA_MAX_SLEW)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-	reg &amp;= ~(0x3 &lt;&lt; 30);</div><div class='del'>-	reg |= slew_falling &lt;&lt; 30;</div><div class='del'>-	pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;mux_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tegra_drive_pinmux_config_pingroup(int pingroup,</div><div class='del'>-					  enum tegra_hsm hsm,</div><div class='del'>-					  enum tegra_schmitt schmitt,</div><div class='del'>-					  enum tegra_drive drive,</div><div class='del'>-					  enum tegra_pull_strength pull_down,</div><div class='del'>-					  enum tegra_pull_strength pull_up,</div><div class='del'>-					  enum tegra_slew slew_rising,</div><div class='del'>-					  enum tegra_slew slew_falling)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = tegra_drive_pinmux_set_hsm(pingroup, hsm);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		pr_err("pinmux: can't set pingroup %s hsm to %s: %d\n",</div><div class='del'>-			drive_pinmux_name(pingroup),</div><div class='del'>-			enable_name(hsm), err);</div><div class='del'>-</div><div class='del'>-	err = tegra_drive_pinmux_set_schmitt(pingroup, schmitt);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		pr_err("pinmux: can't set pingroup %s schmitt to %s: %d\n",</div><div class='del'>-			drive_pinmux_name(pingroup),</div><div class='del'>-			enable_name(schmitt), err);</div><div class='del'>-</div><div class='del'>-	err = tegra_drive_pinmux_set_drive(pingroup, drive);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		pr_err("pinmux: can't set pingroup %s drive to %s: %d\n",</div><div class='del'>-			drive_pinmux_name(pingroup),</div><div class='del'>-			drive_name(drive), err);</div><div class='del'>-</div><div class='del'>-	err = tegra_drive_pinmux_set_pull_down(pingroup, pull_down);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		pr_err("pinmux: can't set pingroup %s pull down to %d: %d\n",</div><div class='del'>-			drive_pinmux_name(pingroup),</div><div class='del'>-			pull_down, err);</div><div class='del'>-</div><div class='del'>-	err = tegra_drive_pinmux_set_pull_up(pingroup, pull_up);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		pr_err("pinmux: can't set pingroup %s pull up to %d: %d\n",</div><div class='del'>-			drive_pinmux_name(pingroup),</div><div class='del'>-			pull_up, err);</div><div class='del'>-</div><div class='del'>-	err = tegra_drive_pinmux_set_slew_rising(pingroup, slew_rising);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		pr_err("pinmux: can't set pingroup %s rising slew to %s: %d\n",</div><div class='del'>-			drive_pinmux_name(pingroup),</div><div class='del'>-			slew_name(slew_rising), err);</div><div class='del'>-</div><div class='del'>-	err = tegra_drive_pinmux_set_slew_falling(pingroup, slew_falling);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		pr_err("pinmux: can't set pingroup %s falling slew to %s: %d\n",</div><div class='del'>-			drive_pinmux_name(pingroup),</div><div class='del'>-			slew_name(slew_falling), err);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void tegra_drive_pinmux_config_table(struct tegra_drive_pingroup_config *config,</div><div class='del'>-	int len)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; len; i++)</div><div class='del'>-		tegra_drive_pinmux_config_pingroup(config[i].pingroup,</div><div class='del'>-						     config[i].hsm,</div><div class='del'>-						     config[i].schmitt,</div><div class='del'>-						     config[i].drive,</div><div class='del'>-						     config[i].pull_down,</div><div class='del'>-						     config[i].pull_up,</div><div class='del'>-						     config[i].slew_rising,</div><div class='del'>-						     config[i].slew_falling);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void tegra_pinmux_set_safe_pinmux_table(const struct tegra_pingroup_config *config,</div><div class='del'>-	int len)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	struct tegra_pingroup_config c;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		int err;</div><div class='del'>-		c = config[i];</div><div class='del'>-		if (c.pingroup &lt; 0 || c.pingroup &gt;= pingroup_max) {</div><div class='del'>-			WARN_ON(1);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		c.func = pingroups[c.pingroup].func_safe;</div><div class='del'>-		err = tegra_pinmux_set_func(&amp;c);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			pr_err("%s: tegra_pinmux_set_func returned %d setting "</div><div class='del'>-			       "%s to %s\n", __func__, err,</div><div class='del'>-			       pingroup_name(c.pingroup), func_name(c.func));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void tegra_pinmux_config_pinmux_table(const struct tegra_pingroup_config *config,</div><div class='del'>-	int len)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		int err;</div><div class='del'>-		if (config[i].pingroup &lt; 0 ||</div><div class='del'>-		    config[i].pingroup &gt;= pingroup_max) {</div><div class='del'>-			WARN_ON(1);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		err = tegra_pinmux_set_func(&amp;config[i]);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			pr_err("%s: tegra_pinmux_set_func returned %d setting "</div><div class='del'>-			       "%s to %s\n", __func__, err,</div><div class='del'>-			       pingroup_name(config[i].pingroup),</div><div class='del'>-			       func_name(config[i].func));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void tegra_pinmux_config_tristate_table(const struct tegra_pingroup_config *config,</div><div class='del'>-	int len, enum tegra_tristate tristate)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-	int pingroup;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		pingroup = config[i].pingroup;</div><div class='del'>-		if (pingroups[pingroup].tri_reg &gt;= 0) {</div><div class='del'>-			err = tegra_pinmux_set_tristate(pingroup, tristate);</div><div class='del'>-			if (err &lt; 0)</div><div class='del'>-				pr_err("pinmux: can't set pingroup %s tristate"</div><div class='del'>-					" to %s: %d\n",	pingroup_name(pingroup),</div><div class='del'>-					tri_name(tristate), err);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *config,</div><div class='del'>-	int len, enum tegra_pullupdown pupd)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-	int pingroup;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		pingroup = config[i].pingroup;</div><div class='del'>-		if (pingroups[pingroup].pupd_reg &gt;= 0) {</div><div class='del'>-			err = tegra_pinmux_set_pullupdown(pingroup, pupd);</div><div class='del'>-			if (err &lt; 0)</div><div class='del'>-				pr_err("pinmux: can't set pingroup %s pullupdown"</div><div class='del'>-					" to %s: %d\n",	pingroup_name(pingroup),</div><div class='del'>-					pupd_name(pupd), err);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct of_device_id tegra_pinmux_of_match[] __devinitdata = {</div><div class='del'>-#ifdef CONFIG_ARCH_TEGRA_2x_SOC</div><div class='del'>-	{ .compatible = "nvidia,tegra20-pinmux", tegra20_pinmux_init },</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_ARCH_TEGRA_3x_SOC</div><div class='del'>-	{ .compatible = "nvidia,tegra30-pinmux", tegra30_pinmux_init },</div><div class='del'>-#endif</div><div class='del'>-	{ },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __devinit tegra_pinmux_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct resource *res;</div><div class='del'>-	int i;</div><div class='del'>-	int config_bad = 0;</div><div class='del'>-	const struct of_device_id *match;</div><div class='del'>-</div><div class='del'>-	match = of_match_device(tegra_pinmux_of_match, &amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	if (match)</div><div class='del'>-		((pinmux_init)(match-&gt;data))(&amp;pingroups, &amp;pingroup_max,</div><div class='del'>-			&amp;drive_pingroups, &amp;drive_max);</div><div class='del'>-#ifdef CONFIG_ARCH_TEGRA_2x_SOC</div><div class='del'>-	else</div><div class='del'>-		/* no device tree available, so we must be on tegra20 */</div><div class='del'>-		tegra20_pinmux_init(&amp;pingroups, &amp;pingroup_max,</div><div class='del'>-					&amp;drive_pingroups, &amp;drive_max);</div><div class='del'>-#else</div><div class='del'>-	pr_warn("non Tegra20 platform requires pinmux devicetree node\n");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	for (i = 0; ; i++) {</div><div class='del'>-		res = platform_get_resource(pdev, IORESOURCE_MEM, i);</div><div class='del'>-		if (!res)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	nbanks = i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; pingroup_max; i++) {</div><div class='del'>-		if (pingroups[i].tri_bank &gt;= nbanks) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "pingroup %d: bad tri_bank\n", i);</div><div class='del'>-			config_bad = 1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (pingroups[i].mux_bank &gt;= nbanks) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "pingroup %d: bad mux_bank\n", i);</div><div class='del'>-			config_bad = 1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (pingroups[i].pupd_bank &gt;= nbanks) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "pingroup %d: bad pupd_bank\n", i);</div><div class='del'>-			config_bad = 1;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; drive_max; i++) {</div><div class='del'>-		if (drive_pingroups[i].reg_bank &gt;= nbanks) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-				"drive pingroup %d: bad reg_bank\n", i);</div><div class='del'>-			config_bad = 1;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (config_bad)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	regs = devm_kzalloc(&amp;pdev-&gt;dev, nbanks * sizeof(*regs), GFP_KERNEL);</div><div class='del'>-	if (!regs) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Can't alloc regs pointer\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; nbanks; i++) {</div><div class='del'>-		res = platform_get_resource(pdev, IORESOURCE_MEM, i);</div><div class='del'>-		if (!res) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "Missing MEM resource\n");</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (!devm_request_mem_region(&amp;pdev-&gt;dev, res-&gt;start,</div><div class='del'>-					    resource_size(res),</div><div class='del'>-					    dev_name(&amp;pdev-&gt;dev))) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-				"Couldn't request MEM resource %d\n", i);</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		regs[i] = devm_ioremap(&amp;pdev-&gt;dev, res-&gt;start,</div><div class='del'>-					resource_size(res));</div><div class='del'>-		if (!regs) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "Couldn't ioremap regs %d\n", i);</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_driver tegra_pinmux_driver = {</div><div class='del'>-	.driver		= {</div><div class='del'>-		.name	= "tegra-pinmux",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='del'>-		.of_match_table = tegra_pinmux_of_match,</div><div class='del'>-	},</div><div class='del'>-	.probe		= tegra_pinmux_probe,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init tegra_pinmux_init(void)</div><div class='del'>-{</div><div class='del'>-	return platform_driver_register(&amp;tegra_pinmux_driver);</div><div class='del'>-}</div><div class='del'>-postcore_initcall(tegra_pinmux_init);</div><div class='del'>-</div><div class='del'>-#ifdef	CONFIG_DEBUG_FS</div><div class='del'>-</div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='del'>-</div><div class='del'>-static void dbg_pad_field(struct seq_file *s, int len)</div><div class='del'>-{</div><div class='del'>-	seq_putc(s, ',');</div><div class='del'>-</div><div class='del'>-	while (len-- &gt; -1)</div><div class='del'>-		seq_putc(s, ' ');</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int dbg_pinmux_show(struct seq_file *s, void *unused)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int len;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; pingroup_max; i++) {</div><div class='del'>-		unsigned long reg;</div><div class='del'>-		unsigned long tri;</div><div class='del'>-		unsigned long mux;</div><div class='del'>-		unsigned long pupd;</div><div class='del'>-</div><div class='del'>-		seq_printf(s, "\t{TEGRA_PINGROUP_%s", pingroups[i].name);</div><div class='del'>-		len = strlen(pingroups[i].name);</div><div class='del'>-		dbg_pad_field(s, 5 - len);</div><div class='del'>-</div><div class='del'>-		if (pingroups[i].mux_reg &lt; 0) {</div><div class='del'>-			seq_printf(s, "TEGRA_MUX_NONE");</div><div class='del'>-			len = strlen("NONE");</div><div class='del'>-		} else {</div><div class='del'>-			reg = pg_readl(pingroups[i].mux_bank,</div><div class='del'>-					pingroups[i].mux_reg);</div><div class='del'>-			mux = (reg &gt;&gt; pingroups[i].mux_bit) &amp; 0x3;</div><div class='del'>-			if (pingroups[i].funcs[mux] == TEGRA_MUX_RSVD) {</div><div class='del'>-				seq_printf(s, "TEGRA_MUX_RSVD%1lu", mux+1);</div><div class='del'>-				len = 5;</div><div class='del'>-			} else {</div><div class='del'>-				seq_printf(s, "TEGRA_MUX_%s",</div><div class='del'>-					   tegra_mux_names[pingroups[i].funcs[mux]]);</div><div class='del'>-				len = strlen(tegra_mux_names[pingroups[i].funcs[mux]]);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		dbg_pad_field(s, 13-len);</div><div class='del'>-</div><div class='del'>-		if (pingroups[i].pupd_reg &lt; 0) {</div><div class='del'>-			seq_printf(s, "TEGRA_PUPD_NORMAL");</div><div class='del'>-			len = strlen("NORMAL");</div><div class='del'>-		} else {</div><div class='del'>-			reg = pg_readl(pingroups[i].pupd_bank,</div><div class='del'>-					pingroups[i].pupd_reg);</div><div class='del'>-			pupd = (reg &gt;&gt; pingroups[i].pupd_bit) &amp; 0x3;</div><div class='del'>-			seq_printf(s, "TEGRA_PUPD_%s", pupd_name(pupd));</div><div class='del'>-			len = strlen(pupd_name(pupd));</div><div class='del'>-		}</div><div class='del'>-		dbg_pad_field(s, 9 - len);</div><div class='del'>-</div><div class='del'>-		if (pingroups[i].tri_reg &lt; 0) {</div><div class='del'>-			seq_printf(s, "TEGRA_TRI_NORMAL");</div><div class='del'>-		} else {</div><div class='del'>-			reg = pg_readl(pingroups[i].tri_bank,</div><div class='del'>-					pingroups[i].tri_reg);</div><div class='del'>-			tri = (reg &gt;&gt; pingroups[i].tri_bit) &amp; 0x1;</div><div class='del'>-</div><div class='del'>-			seq_printf(s, "TEGRA_TRI_%s", tri_name(tri));</div><div class='del'>-		}</div><div class='del'>-		seq_printf(s, "},\n");</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int dbg_pinmux_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, dbg_pinmux_show, &amp;inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations debug_fops = {</div><div class='del'>-	.open		= dbg_pinmux_open,</div><div class='del'>-	.read		= seq_read,</div><div class='del'>-	.llseek		= seq_lseek,</div><div class='del'>-	.release	= single_release,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int dbg_drive_pinmux_show(struct seq_file *s, void *unused)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int len;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; drive_max; i++) {</div><div class='del'>-		u32 reg;</div><div class='del'>-</div><div class='del'>-		seq_printf(s, "\t{TEGRA_DRIVE_PINGROUP_%s",</div><div class='del'>-			drive_pingroups[i].name);</div><div class='del'>-		len = strlen(drive_pingroups[i].name);</div><div class='del'>-		dbg_pad_field(s, 7 - len);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		reg = pg_readl(drive_pingroups[i].reg_bank,</div><div class='del'>-				drive_pingroups[i].reg);</div><div class='del'>-		if (HSM_EN(reg)) {</div><div class='del'>-			seq_printf(s, "TEGRA_HSM_ENABLE");</div><div class='del'>-			len = 16;</div><div class='del'>-		} else {</div><div class='del'>-			seq_printf(s, "TEGRA_HSM_DISABLE");</div><div class='del'>-			len = 17;</div><div class='del'>-		}</div><div class='del'>-		dbg_pad_field(s, 17 - len);</div><div class='del'>-</div><div class='del'>-		if (SCHMT_EN(reg)) {</div><div class='del'>-			seq_printf(s, "TEGRA_SCHMITT_ENABLE");</div><div class='del'>-			len = 21;</div><div class='del'>-		} else {</div><div class='del'>-			seq_printf(s, "TEGRA_SCHMITT_DISABLE");</div><div class='del'>-			len = 22;</div><div class='del'>-		}</div><div class='del'>-		dbg_pad_field(s, 22 - len);</div><div class='del'>-</div><div class='del'>-		seq_printf(s, "TEGRA_DRIVE_%s", drive_name(LPMD(reg)));</div><div class='del'>-		len = strlen(drive_name(LPMD(reg)));</div><div class='del'>-		dbg_pad_field(s, 5 - len);</div><div class='del'>-</div><div class='del'>-		seq_printf(s, "TEGRA_PULL_%d", DRVDN(reg));</div><div class='del'>-		len = DRVDN(reg) &lt; 10 ? 1 : 2;</div><div class='del'>-		dbg_pad_field(s, 2 - len);</div><div class='del'>-</div><div class='del'>-		seq_printf(s, "TEGRA_PULL_%d", DRVUP(reg));</div><div class='del'>-		len = DRVUP(reg) &lt; 10 ? 1 : 2;</div><div class='del'>-		dbg_pad_field(s, 2 - len);</div><div class='del'>-</div><div class='del'>-		seq_printf(s, "TEGRA_SLEW_%s", slew_name(SLWR(reg)));</div><div class='del'>-		len = strlen(slew_name(SLWR(reg)));</div><div class='del'>-		dbg_pad_field(s, 7 - len);</div><div class='del'>-</div><div class='del'>-		seq_printf(s, "TEGRA_SLEW_%s", slew_name(SLWF(reg)));</div><div class='del'>-</div><div class='del'>-		seq_printf(s, "},\n");</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int dbg_drive_pinmux_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, dbg_drive_pinmux_show, &amp;inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations debug_drive_fops = {</div><div class='del'>-	.open		= dbg_drive_pinmux_open,</div><div class='del'>-	.read		= seq_read,</div><div class='del'>-	.llseek		= seq_lseek,</div><div class='del'>-	.release	= single_release,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init tegra_pinmux_debuginit(void)</div><div class='del'>-{</div><div class='del'>-	(void) debugfs_create_file("tegra_pinmux", S_IRUGO,</div><div class='del'>-					NULL, NULL, &amp;debug_fops);</div><div class='del'>-	(void) debugfs_create_file("tegra_pinmux_drive", S_IRUGO,</div><div class='del'>-					NULL, NULL, &amp;debug_drive_fops);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-late_initcall(tegra_pinmux_debuginit);</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c<br/>index c238699ae86f..f5b12fb4ff12 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/powergate.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/powergate.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/powergate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/powergate.c</a></div><div class='hunk'>@@ -234,7 +234,7 @@ static const struct file_operations powergate_fops = {</div><div class='ctx'> 	.release	= single_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init powergate_debugfs_init(void)</div><div class='add'>+int __init tegra_powergate_debugfs_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct dentry *d;</div><div class='ctx'> 	int err = -ENOMEM;</div><div class='hunk'>@@ -247,6 +247,4 @@ static int __init powergate_debugfs_init(void)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-late_initcall(powergate_debugfs_init);</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c<br/>index 592a4eeb5328..b59315ce3691 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/tegra2_clocks.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/tegra2_clocks.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/tegra2_clocks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/tegra2_clocks.c</a></div><div class='hunk'>@@ -1486,6 +1486,10 @@ static struct clk tegra_clk_m = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct clk_pll_freq_table tegra_pll_c_freq_table[] = {</div><div class='add'>+	{ 12000000, 600000000, 600, 12, 1, 8 },</div><div class='add'>+	{ 13000000, 600000000, 600, 13, 1, 8 },</div><div class='add'>+	{ 19200000, 600000000, 500, 16, 1, 6 },</div><div class='add'>+	{ 26000000, 600000000, 600, 26, 1, 8 },</div><div class='ctx'> 	{ 0, 0, 0, 0, 0, 0 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1764,6 +1768,12 @@ static struct clk_pll_freq_table tegra_pll_x_freq_table[] = {</div><div class='ctx'> 	{ 19200000, 760000000,  950,  24, 1, 8},</div><div class='ctx'> 	{ 26000000, 760000000,  760,  26, 1, 12},</div><div class='ctx'> </div><div class='add'>+	/* 750 MHz */</div><div class='add'>+	{ 12000000, 750000000,  750,  12, 1, 12},</div><div class='add'>+	{ 13000000, 750000000,  750,  13, 1, 12},</div><div class='add'>+	{ 19200000, 750000000,  625,  16, 1, 8},</div><div class='add'>+	{ 26000000, 750000000,  750,  26, 1, 12},</div><div class='add'>+</div><div class='ctx'> 	/* 608 MHz */</div><div class='ctx'> 	{ 12000000, 608000000,  608,  12, 1, 12},</div><div class='ctx'> 	{ 13000000, 608000000,  608,  13, 1, 12},</div><div class='hunk'>@@ -2142,8 +2152,8 @@ static struct clk tegra_list_clks[] = {</div><div class='ctx'> 	PERIPH_CLK("apbdma",	"tegra-dma",		NULL,	34,	0,	108000000, mux_pclk,			0),</div><div class='ctx'> 	PERIPH_CLK("rtc",	"rtc-tegra",		NULL,	4,	0,	32768,     mux_clk_32k,			PERIPH_NO_RESET),</div><div class='ctx'> 	PERIPH_CLK("timer",	"timer",		NULL,	5,	0,	26000000,  mux_clk_m,			0),</div><div class='del'>-	PERIPH_CLK("i2s1",	"tegra-i2s.0",		NULL,	11,	0x100,	26000000,  mux_pllaout0_audio2x_pllp_clkm,	MUX | DIV_U71),</div><div class='del'>-	PERIPH_CLK("i2s2",	"tegra-i2s.1",		NULL,	18,	0x104,	26000000,  mux_pllaout0_audio2x_pllp_clkm,	MUX | DIV_U71),</div><div class='add'>+	PERIPH_CLK("i2s1",	"tegra20-i2s.0",	NULL,	11,	0x100,	26000000,  mux_pllaout0_audio2x_pllp_clkm,	MUX | DIV_U71),</div><div class='add'>+	PERIPH_CLK("i2s2",	"tegra20-i2s.1",	NULL,	18,	0x104,	26000000,  mux_pllaout0_audio2x_pllp_clkm,	MUX | DIV_U71),</div><div class='ctx'> 	PERIPH_CLK("spdif_out",	"spdif_out",		NULL,	10,	0x108,	100000000, mux_pllaout0_audio2x_pllp_clkm,	MUX | DIV_U71),</div><div class='ctx'> 	PERIPH_CLK("spdif_in",	"spdif_in",		NULL,	10,	0x10c,	100000000, mux_pllp_pllc_pllm,		MUX | DIV_U71),</div><div class='ctx'> 	PERIPH_CLK("pwm",	"pwm",			NULL,	17,	0x110,	432000000, mux_pllp_pllc_audio_clkm_clk32,	MUX | DIV_U71),</div><div class='head'>diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c<br/>index 6d08b53f92d2..e33fe4b14a2a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/tegra30_clocks.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/tegra30_clocks.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/tegra30_clocks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/tegra30_clocks.c</a></div><div class='hunk'>@@ -3015,6 +3015,15 @@ struct clk_duplicate tegra_clk_duplicates[] = {</div><div class='ctx'> 	CLK_DUPLICATE("sbc6", "spi_slave_tegra.5", NULL),</div><div class='ctx'> 	CLK_DUPLICATE("twd", "smp_twd", NULL),</div><div class='ctx'> 	CLK_DUPLICATE("vcp", "nvavp", "vcp"),</div><div class='add'>+	CLK_DUPLICATE("i2s0", NULL, "i2s0"),</div><div class='add'>+	CLK_DUPLICATE("i2s1", NULL, "i2s1"),</div><div class='add'>+	CLK_DUPLICATE("i2s2", NULL, "i2s2"),</div><div class='add'>+	CLK_DUPLICATE("i2s3", NULL, "i2s3"),</div><div class='add'>+	CLK_DUPLICATE("i2s4", NULL, "i2s4"),</div><div class='add'>+	CLK_DUPLICATE("dam0", NULL, "dam0"),</div><div class='add'>+	CLK_DUPLICATE("dam1", NULL, "dam1"),</div><div class='add'>+	CLK_DUPLICATE("dam2", NULL, "dam2"),</div><div class='add'>+	CLK_DUPLICATE("spdif_in", NULL, "spdif_in"),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct clk *tegra_ptr_clks[] = {</div><div class='head'>diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c<br/>index 1eed8d4a80ef..315672c7bd48 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/timer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/timer.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/timer.c</a></div><div class='hunk'>@@ -124,7 +124,7 @@ static u64 tegra_rtc_read_ms(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * read_persistent_clock -  Return time from a persistent clock.</div><div class='add'>+ * tegra_read_persistent_clock -  Return time from a persistent clock.</div><div class='ctx'>  *</div><div class='ctx'>  * Reads the time from a source which isn't disabled during PM, the</div><div class='ctx'>  * 32k sync timer.  Convert the cycles elapsed since last read into</div><div class='hunk'>@@ -133,7 +133,7 @@ static u64 tegra_rtc_read_ms(void)</div><div class='ctx'>  * tegra_rtc driver could be executing to avoid race conditions</div><div class='ctx'>  * on the RTC shadow register</div><div class='ctx'>  */</div><div class='del'>-void read_persistent_clock(struct timespec *ts)</div><div class='add'>+static void tegra_read_persistent_clock(struct timespec *ts)</div><div class='ctx'> {</div><div class='ctx'> 	u64 delta;</div><div class='ctx'> 	struct timespec *tsp = &amp;persistent_ts;</div><div class='hunk'>@@ -243,6 +243,7 @@ static void __init tegra_init_timer(void)</div><div class='ctx'> 	tegra_clockevent.irq = tegra_timer_irq.irq;</div><div class='ctx'> 	clockevents_register_device(&amp;tegra_clockevent);</div><div class='ctx'> 	tegra_twd_init();</div><div class='add'>+	register_persistent_clock(NULL, tegra_read_persistent_clock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct sys_timer tegra_timer = {</div><div class='head'>diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c<br/>index c5b2ac04e2a0..54e353c8e304 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-tegra/usb_phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-tegra/usb_phy.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-tegra/usb_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-tegra/usb_phy.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/of_gpio.h&gt;</div><div class='ctx'> #include &lt;linux/usb/otg.h&gt;</div><div class='ctx'> #include &lt;linux/usb/ulpi.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='hunk'>@@ -654,8 +655,8 @@ static void ulpi_phy_power_off(struct tegra_usb_phy *phy)</div><div class='ctx'> 	clk_disable(phy-&gt;clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs,</div><div class='del'>-			void *config, enum tegra_usb_phy_mode phy_mode)</div><div class='add'>+struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance,</div><div class='add'>+	void __iomem *regs, void *config, enum tegra_usb_phy_mode phy_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct tegra_usb_phy *phy;</div><div class='ctx'> 	struct tegra_ulpi_config *ulpi_config;</div><div class='hunk'>@@ -711,7 +712,16 @@ struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs,</div><div class='ctx'> 			err = -ENXIO;</div><div class='ctx'> 			goto err1;</div><div class='ctx'> 		}</div><div class='del'>-		tegra_gpio_enable(ulpi_config-&gt;reset_gpio);</div><div class='add'>+		if (!gpio_is_valid(ulpi_config-&gt;reset_gpio))</div><div class='add'>+			ulpi_config-&gt;reset_gpio =</div><div class='add'>+				of_get_named_gpio(dev-&gt;of_node,</div><div class='add'>+						  "nvidia,phy-reset-gpio", 0);</div><div class='add'>+		if (!gpio_is_valid(ulpi_config-&gt;reset_gpio)) {</div><div class='add'>+			pr_err("%s: invalid reset gpio: %d\n", __func__,</div><div class='add'>+			       ulpi_config-&gt;reset_gpio);</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto err1;</div><div class='add'>+		}</div><div class='ctx'> 		gpio_request(ulpi_config-&gt;reset_gpio, "ulpi_phy_reset_b");</div><div class='ctx'> 		gpio_direction_output(ulpi_config-&gt;reset_gpio, 0);</div><div class='ctx'> 		phy-&gt;ulpi = otg_ulpi_create(&amp;ulpi_viewport_access_ops, 0);</div><div class='head'>diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig<br/>index ef7099eea0f2..53d3d46dec12 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/Kconfig</a></div><div class='hunk'>@@ -9,10 +9,8 @@ config UX500_SOC_COMMON</div><div class='ctx'> 	select ARM_ERRATA_754322</div><div class='ctx'> 	select ARM_ERRATA_764369</div><div class='ctx'> 	select CACHE_L2X0</div><div class='del'>-</div><div class='del'>-config UX500_SOC_DB5500</div><div class='del'>-	bool</div><div class='del'>-	select MFD_DB5500_PRCMU</div><div class='add'>+	select PINCTRL</div><div class='add'>+	select PINCTRL_NOMADIK</div><div class='ctx'> </div><div class='ctx'> config UX500_SOC_DB8500</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -20,6 +18,7 @@ config UX500_SOC_DB8500</div><div class='ctx'> 	select REGULATOR</div><div class='ctx'> 	select REGULATOR_DB8500_PRCMU</div><div class='ctx'> 	select CPU_FREQ_TABLE if CPU_FREQ</div><div class='add'>+	select PINCTRL_DB8500</div><div class='ctx'> </div><div class='ctx'> menu "Ux500 target platform (boards)"</div><div class='ctx'> </div><div class='hunk'>@@ -45,15 +44,8 @@ config MACH_SNOWBALL</div><div class='ctx'> 	help</div><div class='ctx'> 	  Include support for the snowball development platform.</div><div class='ctx'> </div><div class='del'>-config MACH_U5500</div><div class='del'>-	bool "U5500 Development platform"</div><div class='del'>-	select UX500_SOC_DB5500</div><div class='del'>-	help</div><div class='del'>-	  Include support for the U5500 development platform.</div><div class='del'>-</div><div class='ctx'> config UX500_AUTO_PLATFORM</div><div class='ctx'> 	def_bool y</div><div class='del'>-	depends on !MACH_U5500</div><div class='ctx'> 	select MACH_MOP500</div><div class='ctx'> 	help</div><div class='ctx'> 	  At least one platform needs to be selected in order to build</div><div class='hunk'>@@ -74,18 +66,4 @@ config UX500_DEBUG_UART</div><div class='ctx'> 	  Choose the UART on which kernel low-level debug messages should be</div><div class='ctx'> 	  output.</div><div class='ctx'> </div><div class='del'>-config U5500_MODEM_IRQ</div><div class='del'>-	bool "Modem IRQ support"</div><div class='del'>-	depends on UX500_SOC_DB5500</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  Add support for handling IRQ:s from modem side</div><div class='del'>-</div><div class='del'>-config U5500_MBOX</div><div class='del'>-	bool "Mailbox support"</div><div class='del'>-	depends on U5500_MODEM_IRQ</div><div class='del'>-	default y</div><div class='del'>-	help</div><div class='del'>-	  Add support for U5500 mailbox communication with modem side</div><div class='del'>-</div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile<br/>index 465b9ec9510a..026086ff9e6c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/Makefile</a></div><div class='hunk'>@@ -4,17 +4,14 @@</div><div class='ctx'> </div><div class='ctx'> obj-y				:= clock.o cpu.o devices.o devices-common.o \</div><div class='ctx'> 				   id.o usb.o timer.o</div><div class='add'>+obj-$(CONFIG_CPU_IDLE)          += cpuidle.o</div><div class='ctx'> obj-$(CONFIG_CACHE_L2X0)	+= cache-l2x0.o</div><div class='del'>-obj-$(CONFIG_UX500_SOC_DB5500)	+= cpu-db5500.o dma-db5500.o</div><div class='ctx'> obj-$(CONFIG_UX500_SOC_DB8500)	+= cpu-db8500.o devices-db8500.o</div><div class='ctx'> obj-$(CONFIG_MACH_MOP500)	+= board-mop500.o board-mop500-sdi.o \</div><div class='ctx'> 				board-mop500-regulators.o \</div><div class='ctx'> 				board-mop500-uib.o board-mop500-stuib.o \</div><div class='ctx'> 				board-mop500-u8500uib.o \</div><div class='del'>-				board-mop500-pins.o</div><div class='del'>-obj-$(CONFIG_MACH_U5500)	+= board-u5500.o board-u5500-sdi.o</div><div class='add'>+				board-mop500-pins.o \</div><div class='add'>+				board-mop500-msp.o</div><div class='ctx'> obj-$(CONFIG_SMP)		+= platsmp.o headsmp.o</div><div class='ctx'> obj-$(CONFIG_HOTPLUG_CPU)	+= hotplug.o</div><div class='del'>-obj-$(CONFIG_U5500_MODEM_IRQ)	+= modem-irq-db5500.o</div><div class='del'>-obj-$(CONFIG_U5500_MBOX)	+= mbox-db5500.o</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/mach-ux500/board-mop500-msp.c b/arch/arm/mach-ux500/board-mop500-msp.c<br/>new file mode 100644<br/>index 000000000000..996048038743<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/board-mop500-msp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-mop500-msp.c</a></div><div class='hunk'>@@ -0,0 +1,267 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+ *</div><div class='add'>+ * License terms: GNU General Public License (GPL), version 2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;plat/gpio-nomadik.h&gt;</div><div class='add'>+#include &lt;plat/pincfg.h&gt;</div><div class='add'>+#include &lt;plat/ste_dma40.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/devices.h&gt;</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/irqs.h&gt;</div><div class='add'>+#include &lt;mach/msp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ste-dma40-db8500.h"</div><div class='add'>+#include "board-mop500.h"</div><div class='add'>+#include "devices-db8500.h"</div><div class='add'>+#include "pins-db8500.h"</div><div class='add'>+</div><div class='add'>+/* MSP1/3 Tx/Rx usage protection */</div><div class='add'>+static DEFINE_SPINLOCK(msp_rxtx_lock);</div><div class='add'>+</div><div class='add'>+/* Reference Count */</div><div class='add'>+static int msp_rxtx_ref;</div><div class='add'>+</div><div class='add'>+/* Pin modes */</div><div class='add'>+struct pinctrl *msp1_p;</div><div class='add'>+struct pinctrl_state *msp1_def;</div><div class='add'>+struct pinctrl_state *msp1_sleep;</div><div class='add'>+</div><div class='add'>+int msp13_i2s_init(void)</div><div class='add'>+{</div><div class='add'>+	int retval = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;msp_rxtx_lock, flags);</div><div class='add'>+	if (msp_rxtx_ref == 0 &amp;&amp; !(IS_ERR(msp1_p) || IS_ERR(msp1_def))) {</div><div class='add'>+		retval = pinctrl_select_state(msp1_p, msp1_def);</div><div class='add'>+		if (retval)</div><div class='add'>+			pr_err("could not set MSP1 defstate\n");</div><div class='add'>+	}</div><div class='add'>+	if (!retval)</div><div class='add'>+		msp_rxtx_ref++;</div><div class='add'>+	spin_unlock_irqrestore(&amp;msp_rxtx_lock, flags);</div><div class='add'>+</div><div class='add'>+	return retval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int msp13_i2s_exit(void)</div><div class='add'>+{</div><div class='add'>+	int retval = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;msp_rxtx_lock, flags);</div><div class='add'>+	WARN_ON(!msp_rxtx_ref);</div><div class='add'>+	msp_rxtx_ref--;</div><div class='add'>+	if (msp_rxtx_ref == 0 &amp;&amp; !(IS_ERR(msp1_p) || IS_ERR(msp1_sleep))) {</div><div class='add'>+		retval = pinctrl_select_state(msp1_p, msp1_sleep);</div><div class='add'>+		if (retval)</div><div class='add'>+			pr_err("could not set MSP1 sleepstate\n");</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;msp_rxtx_lock, flags);</div><div class='add'>+</div><div class='add'>+	return retval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct stedma40_chan_cfg msp0_dma_rx = {</div><div class='add'>+	.high_priority = true,</div><div class='add'>+	.dir = STEDMA40_PERIPH_TO_MEM,</div><div class='add'>+</div><div class='add'>+	.src_dev_type = DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX,</div><div class='add'>+	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,</div><div class='add'>+</div><div class='add'>+	.src_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+	.dst_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+</div><div class='add'>+	/* data_width is set during configuration */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct stedma40_chan_cfg msp0_dma_tx = {</div><div class='add'>+	.high_priority = true,</div><div class='add'>+	.dir = STEDMA40_MEM_TO_PERIPH,</div><div class='add'>+</div><div class='add'>+	.src_dev_type = STEDMA40_DEV_DST_MEMORY,</div><div class='add'>+	.dst_dev_type = DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX,</div><div class='add'>+</div><div class='add'>+	.src_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+	.dst_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+</div><div class='add'>+	/* data_width is set during configuration */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct msp_i2s_platform_data msp0_platform_data = {</div><div class='add'>+	.id = MSP_I2S_0,</div><div class='add'>+	.msp_i2s_dma_rx = &amp;msp0_dma_rx,</div><div class='add'>+	.msp_i2s_dma_tx = &amp;msp0_dma_tx,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct stedma40_chan_cfg msp1_dma_rx = {</div><div class='add'>+	.high_priority = true,</div><div class='add'>+	.dir = STEDMA40_PERIPH_TO_MEM,</div><div class='add'>+</div><div class='add'>+	.src_dev_type = DB8500_DMA_DEV30_MSP3_RX,</div><div class='add'>+	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,</div><div class='add'>+</div><div class='add'>+	.src_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+	.dst_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+</div><div class='add'>+	/* data_width is set during configuration */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct stedma40_chan_cfg msp1_dma_tx = {</div><div class='add'>+	.high_priority = true,</div><div class='add'>+	.dir = STEDMA40_MEM_TO_PERIPH,</div><div class='add'>+</div><div class='add'>+	.src_dev_type = STEDMA40_DEV_DST_MEMORY,</div><div class='add'>+	.dst_dev_type = DB8500_DMA_DEV30_MSP1_TX,</div><div class='add'>+</div><div class='add'>+	.src_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+	.dst_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+</div><div class='add'>+	/* data_width is set during configuration */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct msp_i2s_platform_data msp1_platform_data = {</div><div class='add'>+	.id = MSP_I2S_1,</div><div class='add'>+	.msp_i2s_dma_rx = NULL,</div><div class='add'>+	.msp_i2s_dma_tx = &amp;msp1_dma_tx,</div><div class='add'>+	.msp_i2s_init = msp13_i2s_init,</div><div class='add'>+	.msp_i2s_exit = msp13_i2s_exit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct stedma40_chan_cfg msp2_dma_rx = {</div><div class='add'>+	.high_priority = true,</div><div class='add'>+	.dir = STEDMA40_PERIPH_TO_MEM,</div><div class='add'>+</div><div class='add'>+	.src_dev_type = DB8500_DMA_DEV14_MSP2_RX,</div><div class='add'>+	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,</div><div class='add'>+</div><div class='add'>+	/* MSP2 DMA doesn't work with PSIZE == 4 on DB8500v2 */</div><div class='add'>+	.src_info.psize = STEDMA40_PSIZE_LOG_1,</div><div class='add'>+	.dst_info.psize = STEDMA40_PSIZE_LOG_1,</div><div class='add'>+</div><div class='add'>+	/* data_width is set during configuration */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct stedma40_chan_cfg msp2_dma_tx = {</div><div class='add'>+	.high_priority = true,</div><div class='add'>+	.dir = STEDMA40_MEM_TO_PERIPH,</div><div class='add'>+</div><div class='add'>+	.src_dev_type = STEDMA40_DEV_DST_MEMORY,</div><div class='add'>+	.dst_dev_type = DB8500_DMA_DEV14_MSP2_TX,</div><div class='add'>+</div><div class='add'>+	.src_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+	.dst_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+</div><div class='add'>+	.use_fixed_channel = true,</div><div class='add'>+	.phy_channel = 1,</div><div class='add'>+</div><div class='add'>+	/* data_width is set during configuration */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *db8500_add_msp_i2s(struct device *parent,</div><div class='add'>+			int id,</div><div class='add'>+			resource_size_t base, int irq,</div><div class='add'>+			struct msp_i2s_platform_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct resource res[] = {</div><div class='add'>+		DEFINE_RES_MEM(base, SZ_4K),</div><div class='add'>+		DEFINE_RES_IRQ(irq),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pr_info("Register platform-device 'ux500-msp-i2s', id %d, irq %d\n",</div><div class='add'>+		id, irq);</div><div class='add'>+	pdev = platform_device_register_resndata(parent, "ux500-msp-i2s", id,</div><div class='add'>+						res, ARRAY_SIZE(res),</div><div class='add'>+						pdata, sizeof(*pdata));</div><div class='add'>+	if (!pdev) {</div><div class='add'>+		pr_err("Failed to register platform-device 'ux500-msp-i2s.%d'!\n",</div><div class='add'>+			id);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pdev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Platform device for ASoC U8500 machine */</div><div class='add'>+static struct platform_device snd_soc_u8500 = {</div><div class='add'>+		.name = "snd-soc-u8500",</div><div class='add'>+		.id = 0,</div><div class='add'>+		.dev = {</div><div class='add'>+			.platform_data = NULL,</div><div class='add'>+		},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Platform device for Ux500-PCM */</div><div class='add'>+static struct platform_device ux500_pcm = {</div><div class='add'>+		.name = "ux500-pcm",</div><div class='add'>+		.id = 0,</div><div class='add'>+		.dev = {</div><div class='add'>+			.platform_data = NULL,</div><div class='add'>+		},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct msp_i2s_platform_data msp2_platform_data = {</div><div class='add'>+	.id = MSP_I2S_2,</div><div class='add'>+	.msp_i2s_dma_rx = &amp;msp2_dma_rx,</div><div class='add'>+	.msp_i2s_dma_tx = &amp;msp2_dma_tx,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct msp_i2s_platform_data msp3_platform_data = {</div><div class='add'>+	.id		= MSP_I2S_3,</div><div class='add'>+	.msp_i2s_dma_rx	= &amp;msp1_dma_rx,</div><div class='add'>+	.msp_i2s_dma_tx	= NULL,</div><div class='add'>+	.msp_i2s_init = msp13_i2s_init,</div><div class='add'>+	.msp_i2s_exit = msp13_i2s_exit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mop500_msp_init(struct device *parent)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *msp1;</div><div class='add'>+</div><div class='add'>+	pr_info("%s: Register platform-device 'snd-soc-u8500'.\n", __func__);</div><div class='add'>+	platform_device_register(&amp;snd_soc_u8500);</div><div class='add'>+</div><div class='add'>+	pr_info("Initialize MSP I2S-devices.\n");</div><div class='add'>+	db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,</div><div class='add'>+			   &amp;msp0_platform_data);</div><div class='add'>+	msp1 = db8500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1,</div><div class='add'>+			   &amp;msp1_platform_data);</div><div class='add'>+	db8500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2,</div><div class='add'>+			   &amp;msp2_platform_data);</div><div class='add'>+	db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1,</div><div class='add'>+			   &amp;msp3_platform_data);</div><div class='add'>+</div><div class='add'>+	/* Get the pinctrl handle for MSP1 */</div><div class='add'>+	if (msp1) {</div><div class='add'>+		msp1_p = pinctrl_get(&amp;msp1-&gt;dev);</div><div class='add'>+		if (IS_ERR(msp1_p))</div><div class='add'>+			dev_err(&amp;msp1-&gt;dev, "could not get MSP1 pinctrl\n");</div><div class='add'>+		else {</div><div class='add'>+			msp1_def = pinctrl_lookup_state(msp1_p,</div><div class='add'>+							PINCTRL_STATE_DEFAULT);</div><div class='add'>+			if (IS_ERR(msp1_def)) {</div><div class='add'>+				dev_err(&amp;msp1-&gt;dev,</div><div class='add'>+					"could not get MSP1 defstate\n");</div><div class='add'>+			}</div><div class='add'>+			msp1_sleep = pinctrl_lookup_state(msp1_p,</div><div class='add'>+							  PINCTRL_STATE_SLEEP);</div><div class='add'>+			if (IS_ERR(msp1_sleep))</div><div class='add'>+				dev_err(&amp;msp1-&gt;dev,</div><div class='add'>+					"could not get MSP1 idlestate\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_info("%s: Register platform-device 'ux500-pcm'\n", __func__);</div><div class='add'>+	platform_device_register(&amp;ux500_pcm);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-ux500/board-mop500-msp.h b/arch/arm/mach-ux500/board-mop500-msp.h<br/>new file mode 100644<br/>index 000000000000..6fcfb5e2cc94<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/board-mop500-msp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-mop500-msp.h</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2012</div><div class='add'>+ *</div><div class='add'>+ * Author: Ola Lilja &lt;ola.o.lilja@stericsson.com&gt;,</div><div class='add'>+ *         for ST-Ericsson.</div><div class='add'>+ *</div><div class='add'>+ * License terms:</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ * by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+void mop500_msp_init(struct device *parent);</div><div class='head'>diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c<br/>index f5413dca532c..32fd99204464 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/board-mop500-pins.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/board-mop500-pins.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/board-mop500-pins.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-mop500-pins.c</a></div><div class='hunk'>@@ -7,299 +7,508 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;plat/pincfg.h&gt;</div><div class='ctx'> #include &lt;plat/gpio-nomadik.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "pins-db8500.h"</div><div class='add'>+#include "board-mop500.h"</div><div class='ctx'> </div><div class='del'>-static pin_cfg_t mop500_pins_common[] = {</div><div class='del'>-	/* I2C */</div><div class='del'>-	GPIO147_I2C0_SCL,</div><div class='del'>-	GPIO148_I2C0_SDA,</div><div class='del'>-	GPIO16_I2C1_SCL,</div><div class='del'>-	GPIO17_I2C1_SDA,</div><div class='del'>-	GPIO10_I2C2_SDA,</div><div class='del'>-	GPIO11_I2C2_SCL,</div><div class='del'>-	GPIO229_I2C3_SDA,</div><div class='del'>-	GPIO230_I2C3_SCL,</div><div class='del'>-</div><div class='del'>-	/* MSP0 */</div><div class='del'>-	GPIO12_MSP0_TXD,</div><div class='del'>-	GPIO13_MSP0_TFS,</div><div class='del'>-	GPIO14_MSP0_TCK,</div><div class='del'>-	GPIO15_MSP0_RXD,</div><div class='del'>-</div><div class='del'>-	/* MSP2: HDMI */</div><div class='del'>-	GPIO193_MSP2_TXD,</div><div class='del'>-	GPIO194_MSP2_TCK,</div><div class='del'>-	GPIO195_MSP2_TFS,</div><div class='del'>-	GPIO196_MSP2_RXD | PIN_OUTPUT_LOW,</div><div class='del'>-</div><div class='del'>-	/* Touch screen INTERFACE */</div><div class='del'>-	GPIO84_GPIO	| PIN_INPUT_PULLUP, /* TOUCH_INT1 */</div><div class='del'>-</div><div class='del'>-	/* STMPE1601/tc35893 keypad  IRQ */</div><div class='del'>-	GPIO218_GPIO	| PIN_INPUT_PULLUP,</div><div class='del'>-</div><div class='del'>-	/* MMC0 (MicroSD card) */</div><div class='del'>-	GPIO18_MC0_CMDDIR	| PIN_OUTPUT_HIGH,</div><div class='del'>-	GPIO19_MC0_DAT0DIR	| PIN_OUTPUT_HIGH,</div><div class='del'>-	GPIO20_MC0_DAT2DIR	| PIN_OUTPUT_HIGH,</div><div class='del'>-</div><div class='del'>-	GPIO22_MC0_FBCLK	| PIN_INPUT_NOPULL,</div><div class='del'>-	GPIO23_MC0_CLK		| PIN_OUTPUT_LOW,</div><div class='del'>-	GPIO24_MC0_CMD		| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO25_MC0_DAT0		| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO26_MC0_DAT1		| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO27_MC0_DAT2		| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO28_MC0_DAT3		| PIN_INPUT_PULLUP,</div><div class='del'>-</div><div class='del'>-	/* SDI1 (SDIO) */</div><div class='del'>-	GPIO208_MC1_CLK		| PIN_OUTPUT_LOW,</div><div class='del'>-	GPIO209_MC1_FBCLK	| PIN_INPUT_NOPULL,</div><div class='del'>-	GPIO210_MC1_CMD		| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO211_MC1_DAT0	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO212_MC1_DAT1	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO213_MC1_DAT2	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO214_MC1_DAT3	| PIN_INPUT_PULLUP,</div><div class='del'>-</div><div class='del'>-	/* MMC2 (On-board DATA INTERFACE eMMC) */</div><div class='del'>-	GPIO128_MC2_CLK		| PIN_OUTPUT_LOW,</div><div class='del'>-	GPIO129_MC2_CMD		| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO130_MC2_FBCLK	| PIN_INPUT_NOPULL,</div><div class='del'>-	GPIO131_MC2_DAT0	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO132_MC2_DAT1	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO133_MC2_DAT2	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO134_MC2_DAT3	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO135_MC2_DAT4	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO136_MC2_DAT5	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO137_MC2_DAT6	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO138_MC2_DAT7	| PIN_INPUT_PULLUP,</div><div class='del'>-</div><div class='del'>-	/* MMC4 (On-board STORAGE INTERFACE eMMC) */</div><div class='del'>-	GPIO197_MC4_DAT3	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO198_MC4_DAT2	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO199_MC4_DAT1	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO200_MC4_DAT0	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO201_MC4_CMD		| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO202_MC4_FBCLK	| PIN_INPUT_NOPULL,</div><div class='del'>-	GPIO203_MC4_CLK		| PIN_OUTPUT_LOW,</div><div class='del'>-	GPIO204_MC4_DAT7	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO205_MC4_DAT6	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO206_MC4_DAT5	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO207_MC4_DAT4	| PIN_INPUT_PULLUP,</div><div class='del'>-</div><div class='del'>-	/* SKE keypad */</div><div class='del'>-	GPIO153_KP_I7,</div><div class='del'>-	GPIO154_KP_I6,</div><div class='del'>-	GPIO155_KP_I5,</div><div class='del'>-	GPIO156_KP_I4,</div><div class='del'>-	GPIO157_KP_O7,</div><div class='del'>-	GPIO158_KP_O6,</div><div class='del'>-	GPIO159_KP_O5,</div><div class='del'>-	GPIO160_KP_O4,</div><div class='del'>-	GPIO161_KP_I3,</div><div class='del'>-	GPIO162_KP_I2,</div><div class='del'>-	GPIO163_KP_I1,</div><div class='del'>-	GPIO164_KP_I0,</div><div class='del'>-	GPIO165_KP_O3,</div><div class='del'>-	GPIO166_KP_O2,</div><div class='del'>-	GPIO167_KP_O1,</div><div class='del'>-	GPIO168_KP_O0,</div><div class='add'>+enum custom_pin_cfg_t {</div><div class='add'>+	PINS_FOR_DEFAULT,</div><div class='add'>+	PINS_FOR_U9500,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* UART */</div><div class='del'>-	/* uart-0 pins gpio configuration should be</div><div class='del'>-	 * kept intact to prevent glitch in tx line</div><div class='del'>-	 * when tty dev is opened. Later these pins</div><div class='add'>+static enum custom_pin_cfg_t pinsfor;</div><div class='add'>+</div><div class='add'>+/* These simply sets bias for pins */</div><div class='add'>+#define BIAS(a,b) static unsigned long a[] = { b }</div><div class='add'>+</div><div class='add'>+BIAS(pd, PIN_PULL_DOWN);</div><div class='add'>+BIAS(slpm_gpio_nopull, PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);</div><div class='add'>+BIAS(in_nopull, PIN_INPUT_NOPULL);</div><div class='add'>+BIAS(in_nopull_sleep_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE);</div><div class='add'>+BIAS(in_pu, PIN_INPUT_PULLUP);</div><div class='add'>+BIAS(in_pd, PIN_INPUT_PULLDOWN);</div><div class='add'>+BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP);</div><div class='add'>+BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW);</div><div class='add'>+BIAS(out_hi, PIN_OUTPUT_HIGH);</div><div class='add'>+BIAS(out_lo, PIN_OUTPUT_LOW);</div><div class='add'>+BIAS(out_lo_sleep_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE);</div><div class='add'>+/* These also force them into GPIO mode */</div><div class='add'>+BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);</div><div class='add'>+BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);</div><div class='add'>+BIAS(gpio_in_pu_slpm_gpio_nopull, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);</div><div class='add'>+BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);</div><div class='add'>+BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);</div><div class='add'>+BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);</div><div class='add'>+/* Sleep modes */</div><div class='add'>+BIAS(sleep_in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);</div><div class='add'>+BIAS(sleep_in_nopull_wkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE);</div><div class='add'>+BIAS(sleep_out_hi_wkup_pdis, PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);</div><div class='add'>+BIAS(sleep_out_lo_wkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE);</div><div class='add'>+BIAS(sleep_out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);</div><div class='add'>+</div><div class='add'>+/* We use these to define hog settings that are always done on boot */</div><div class='add'>+#define DB8500_MUX_HOG(group,func) \</div><div class='add'>+	PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func)</div><div class='add'>+#define DB8500_PIN_HOG(pin,conf) \</div><div class='add'>+	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf)</div><div class='add'>+</div><div class='add'>+/* These are default states associated with device and changed runtime */</div><div class='add'>+#define DB8500_MUX(group,func,dev) \</div><div class='add'>+	PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)</div><div class='add'>+#define DB8500_PIN(pin,conf,dev) \</div><div class='add'>+	PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)</div><div class='add'>+</div><div class='add'>+#define DB8500_PIN_SLEEP(pin,conf,dev) \</div><div class='add'>+	PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500",	\</div><div class='add'>+			    pin, conf)</div><div class='add'>+</div><div class='add'>+/* Pin control settings */</div><div class='add'>+static struct pinctrl_map __initdata mop500_family_pinmap[] = {</div><div class='add'>+	/*</div><div class='add'>+	 * uMSP0, mux in 4 pins, regular placement of RX/TX</div><div class='add'>+	 * explicitly set the pins to no pull</div><div class='add'>+	 */</div><div class='add'>+	DB8500_MUX_HOG("msp0txrx_a_1", "msp0"),</div><div class='add'>+	DB8500_MUX_HOG("msp0tfstck_a_1", "msp0"),</div><div class='add'>+	DB8500_PIN_HOG("GPIO12_AC4", in_nopull), /* TXD */</div><div class='add'>+	DB8500_PIN_HOG("GPIO15_AC3", in_nopull), /* RXD */</div><div class='add'>+	DB8500_PIN_HOG("GPIO13_AF3", in_nopull), /* TFS */</div><div class='add'>+	DB8500_PIN_HOG("GPIO14_AE3", in_nopull), /* TCK */</div><div class='add'>+	/* MSP2 for HDMI, pull down TXD, TCK, TFS  */</div><div class='add'>+	DB8500_MUX_HOG("msp2_a_1", "msp2"),</div><div class='add'>+	DB8500_PIN_HOG("GPIO193_AH27", in_pd), /* TXD */</div><div class='add'>+	DB8500_PIN_HOG("GPIO194_AF27", in_pd), /* TCK */</div><div class='add'>+	DB8500_PIN_HOG("GPIO195_AG28", in_pd), /* TFS */</div><div class='add'>+	DB8500_PIN_HOG("GPIO196_AG26", out_lo), /* RXD */</div><div class='add'>+	/*</div><div class='add'>+	 * LCD, set TE0 (using LCD VSI0) and D14 (touch screen interrupt) to</div><div class='add'>+	 * pull-up</div><div class='add'>+	 * TODO: is this really correct? Snowball doesn't have a LCD.</div><div class='add'>+	 */</div><div class='add'>+	DB8500_MUX_HOG("lcdvsi0_a_1", "lcd"),</div><div class='add'>+	DB8500_PIN_HOG("GPIO68_E1", in_pu),</div><div class='add'>+	DB8500_PIN_HOG("GPIO84_C2", gpio_in_pu),</div><div class='add'>+	/*</div><div class='add'>+	 * STMPE1601/tc35893 keypad IRQ GPIO 218</div><div class='add'>+	 * TODO: set for snowball and HREF really??</div><div class='add'>+	 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO218_AH11", gpio_in_pu),</div><div class='add'>+	/*</div><div class='add'>+	 * UART0, we do not mux in u0 here.</div><div class='add'>+	 * uart-0 pins gpio configuration should be kept intact to prevent</div><div class='add'>+	 * a glitch in tx line when the tty dev is opened. Later these pins</div><div class='ctx'> 	 * are configured to uart mop500_pins_uart0</div><div class='del'>-	 *</div><div class='del'>-	 * It will be replaced with uart configuration</div><div class='del'>-	 * once the issue is solved.</div><div class='ctx'> 	 */</div><div class='del'>-	GPIO0_GPIO	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO1_GPIO	| PIN_OUTPUT_HIGH,</div><div class='del'>-	GPIO2_GPIO	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO3_GPIO	| PIN_OUTPUT_HIGH,</div><div class='del'>-</div><div class='del'>-	GPIO29_U2_RXD	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO30_U2_TXD	| PIN_OUTPUT_HIGH,</div><div class='del'>-	GPIO31_U2_CTSn	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO32_U2_RTSn	| PIN_OUTPUT_HIGH,</div><div class='del'>-</div><div class='del'>-	/* Display &amp; HDMI HW sync */</div><div class='del'>-	GPIO68_LCD_VSI0	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO69_LCD_VSI1	| PIN_INPUT_PULLUP,</div><div class='add'>+	DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */</div><div class='add'>+	DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */</div><div class='add'>+	DB8500_PIN_HOG("GPIO2_AH4", in_pu), /* RXD */</div><div class='add'>+	DB8500_PIN_HOG("GPIO3_AH3", out_hi), /* TXD */</div><div class='add'>+	/*</div><div class='add'>+	 * Mux in UART2 on altfunction C and set pull-ups.</div><div class='add'>+	 * TODO: is this used on U8500 variants and Snowball really?</div><div class='add'>+	 * The setting on GPIO31 conflicts with magnetometer use on hrefv60</div><div class='add'>+	 */</div><div class='add'>+	DB8500_MUX_HOG("u2rxtx_c_1", "u2"),</div><div class='add'>+	DB8500_MUX_HOG("u2ctsrts_c_1", "u2"),</div><div class='add'>+	DB8500_PIN_HOG("GPIO29_W2", in_pu), /* RXD */</div><div class='add'>+	DB8500_PIN_HOG("GPIO30_W3", out_hi), /* TXD */</div><div class='add'>+	DB8500_PIN_HOG("GPIO31_V3", in_pu), /* CTS */</div><div class='add'>+	DB8500_PIN_HOG("GPIO32_V2", out_hi), /* RTS */</div><div class='add'>+	/*</div><div class='add'>+	 * The following pin sets were known as "runtime pins" before being</div><div class='add'>+	 * converted to the pinctrl model. Here we model them as "default"</div><div class='add'>+	 * states.</div><div class='add'>+	 */</div><div class='add'>+	/* Mux in UART0 after initialization */</div><div class='add'>+	DB8500_MUX("u0_a_1", "u0", "uart0"),</div><div class='add'>+	DB8500_PIN("GPIO0_AJ5", in_pu, "uart0"), /* CTS */</div><div class='add'>+	DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */</div><div class='add'>+	DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */</div><div class='add'>+	DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */</div><div class='add'>+	/* UART0 sleep state */</div><div class='add'>+	DB8500_PIN_SLEEP("GPIO0_AJ5", sleep_in_wkup_pdis, "uart0"),</div><div class='add'>+	DB8500_PIN_SLEEP("GPIO1_AJ3", sleep_out_hi_wkup_pdis, "uart0"),</div><div class='add'>+	DB8500_PIN_SLEEP("GPIO2_AH4", sleep_in_wkup_pdis, "uart0"),</div><div class='add'>+	DB8500_PIN_SLEEP("GPIO3_AH3", sleep_out_wkup_pdis, "uart0"),</div><div class='add'>+	/* MSP1 for ALSA codec */</div><div class='add'>+	DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"),</div><div class='add'>+	DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"),</div><div class='add'>+	DB8500_PIN("GPIO33_AF2", out_lo_sleep_nowkup, "ux500-msp-i2s.1"),</div><div class='add'>+	DB8500_PIN("GPIO34_AE1", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"),</div><div class='add'>+	DB8500_PIN("GPIO35_AE2", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"),</div><div class='add'>+	DB8500_PIN("GPIO36_AG2", in_nopull_sleep_nowkup, "ux500-msp-i2s.1"),</div><div class='add'>+	/* MSP1 sleep state */</div><div class='add'>+	DB8500_PIN_SLEEP("GPIO33_AF2", sleep_out_lo_wkup, "ux500-msp-i2s.1"),</div><div class='add'>+	DB8500_PIN_SLEEP("GPIO34_AE1", sleep_in_nopull_wkup, "ux500-msp-i2s.1"),</div><div class='add'>+	DB8500_PIN_SLEEP("GPIO35_AE2", sleep_in_nopull_wkup, "ux500-msp-i2s.1"),</div><div class='add'>+	DB8500_PIN_SLEEP("GPIO36_AG2", sleep_in_nopull_wkup, "ux500-msp-i2s.1"),</div><div class='add'>+	/* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */</div><div class='add'>+	DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),</div><div class='add'>+	DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),</div><div class='add'>+	/* Mux in LCD VSI1 and pull it up for MCDE HDMI output */</div><div class='add'>+	DB8500_MUX("lcdvsi1_a_1", "lcd", "av8100-hdmi"),</div><div class='add'>+	/* Mux in I2C blocks, put pins into GPIO in sleepmode no pull-up */</div><div class='add'>+	DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"),</div><div class='add'>+	DB8500_PIN("GPIO147_C15", slpm_gpio_nopull, "nmk-i2c.0"),</div><div class='add'>+	DB8500_PIN("GPIO148_B16", slpm_gpio_nopull, "nmk-i2c.0"),</div><div class='add'>+	DB8500_MUX("i2c1_b_2", "i2c1", "nmk-i2c.1"),</div><div class='add'>+	DB8500_PIN("GPIO16_AD3", slpm_gpio_nopull, "nmk-i2c.1"),</div><div class='add'>+	DB8500_PIN("GPIO17_AD4", slpm_gpio_nopull, "nmk-i2c.1"),</div><div class='add'>+	DB8500_MUX("i2c2_b_2", "i2c2", "nmk-i2c.2"),</div><div class='add'>+	DB8500_PIN("GPIO10_AF5", slpm_gpio_nopull, "nmk-i2c.2"),</div><div class='add'>+	DB8500_PIN("GPIO11_AG4", slpm_gpio_nopull, "nmk-i2c.2"),</div><div class='add'>+	DB8500_MUX("i2c3_c_2", "i2c3", "nmk-i2c.3"),</div><div class='add'>+	DB8500_PIN("GPIO229_AG7", slpm_gpio_nopull, "nmk-i2c.3"),</div><div class='add'>+	DB8500_PIN("GPIO230_AF7", slpm_gpio_nopull, "nmk-i2c.3"),</div><div class='add'>+	/* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */</div><div class='add'>+	DB8500_MUX("mc0_a_1", "mc0", "sdi0"),</div><div class='add'>+	DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */</div><div class='add'>+	DB8500_PIN("GPIO19_AC1", out_hi, "sdi0"), /* DAT0DIR */</div><div class='add'>+	DB8500_PIN("GPIO20_AB4", out_hi, "sdi0"), /* DAT2DIR */</div><div class='add'>+	DB8500_PIN("GPIO22_AA3", in_nopull, "sdi0"), /* FBCLK */</div><div class='add'>+	DB8500_PIN("GPIO23_AA4", out_lo, "sdi0"), /* CLK */</div><div class='add'>+	DB8500_PIN("GPIO24_AB2", in_pu, "sdi0"), /* CMD */</div><div class='add'>+	DB8500_PIN("GPIO25_Y4", in_pu, "sdi0"), /* DAT0 */</div><div class='add'>+	DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */</div><div class='add'>+	DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */</div><div class='add'>+	DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */</div><div class='add'>+	/* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */</div><div class='add'>+	DB8500_MUX("mc1_a_1", "mc1", "sdi1"),</div><div class='add'>+	DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */</div><div class='add'>+	DB8500_PIN("GPIO209_AG15", in_nopull, "sdi1"), /* FBCLK */</div><div class='add'>+	DB8500_PIN("GPIO210_AJ15", in_pu, "sdi1"), /* CMD */</div><div class='add'>+	DB8500_PIN("GPIO211_AG14", in_pu, "sdi1"), /* DAT0 */</div><div class='add'>+	DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */</div><div class='add'>+	DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */</div><div class='add'>+	DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */</div><div class='add'>+	/* Mux in SDI2 (here called MC2) used for for PoP eMMC */</div><div class='add'>+	DB8500_MUX("mc2_a_1", "mc2", "sdi2"),</div><div class='add'>+	DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */</div><div class='add'>+	DB8500_PIN("GPIO129_B4", in_pu, "sdi2"), /* CMD */</div><div class='add'>+	DB8500_PIN("GPIO130_C8", in_nopull, "sdi2"), /* FBCLK */</div><div class='add'>+	DB8500_PIN("GPIO131_A12", in_pu, "sdi2"), /* DAT0 */</div><div class='add'>+	DB8500_PIN("GPIO132_C10", in_pu, "sdi2"), /* DAT1 */</div><div class='add'>+	DB8500_PIN("GPIO133_B10", in_pu, "sdi2"), /* DAT2 */</div><div class='add'>+	DB8500_PIN("GPIO134_B9", in_pu, "sdi2"), /* DAT3 */</div><div class='add'>+	DB8500_PIN("GPIO135_A9", in_pu, "sdi2"), /* DAT4 */</div><div class='add'>+	DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */</div><div class='add'>+	DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */</div><div class='add'>+	DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */</div><div class='add'>+	/* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */</div><div class='add'>+	DB8500_MUX("mc4_a_1", "mc4", "sdi4"),</div><div class='add'>+	DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */</div><div class='add'>+	DB8500_PIN("GPIO198_AG25", in_pu, "sdi4"), /* DAT2 */</div><div class='add'>+	DB8500_PIN("GPIO199_AH23", in_pu, "sdi4"), /* DAT1 */</div><div class='add'>+	DB8500_PIN("GPIO200_AH26", in_pu, "sdi4"), /* DAT0 */</div><div class='add'>+	DB8500_PIN("GPIO201_AF24", in_pu, "sdi4"), /* CMD */</div><div class='add'>+	DB8500_PIN("GPIO202_AF25", in_nopull, "sdi4"), /* FBCLK */</div><div class='add'>+	DB8500_PIN("GPIO203_AE23", out_lo, "sdi4"), /* CLK */</div><div class='add'>+	DB8500_PIN("GPIO204_AF23", in_pu, "sdi4"), /* DAT7 */</div><div class='add'>+	DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */</div><div class='add'>+	DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */</div><div class='add'>+	DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */</div><div class='add'>+	/* Mux in USB pins, drive STP high */</div><div class='add'>+	DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"),</div><div class='add'>+	DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */</div><div class='add'>+	/* Mux in SPI2 pins on the "other C1" altfunction */</div><div class='add'>+	DB8500_MUX("spi2_oc1_1", "spi2", "spi2"),</div><div class='add'>+	DB8500_PIN("GPIO216_AG12", gpio_out_hi, "spi2"), /* FRM */</div><div class='add'>+	DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */</div><div class='add'>+	DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */</div><div class='add'>+	DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static pin_cfg_t mop500_pins_default[] = {</div><div class='del'>-	/* SSP0 */</div><div class='del'>-	GPIO143_SSP0_CLK,</div><div class='del'>-	GPIO144_SSP0_FRM,</div><div class='del'>-	GPIO145_SSP0_RXD | PIN_PULL_DOWN,</div><div class='del'>-	GPIO146_SSP0_TXD,</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	GPIO217_GPIO	| PIN_INPUT_PULLUP, /* TC35892 IRQ */</div><div class='del'>-</div><div class='del'>-	/* SDI0 (MicroSD card) */</div><div class='del'>-	GPIO21_MC0_DAT31DIR	| PIN_OUTPUT_HIGH,</div><div class='del'>-</div><div class='del'>-	/* UART */</div><div class='del'>-	GPIO4_U1_RXD	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO5_U1_TXD	| PIN_OUTPUT_HIGH,</div><div class='del'>-	GPIO6_U1_CTSn	| PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO7_U1_RTSn	| PIN_OUTPUT_HIGH,</div><div class='add'>+/*</div><div class='add'>+ * These are specifically for the MOP500 and HREFP (pre-v60) version of the</div><div class='add'>+ * board, which utilized a TC35892 GPIO expander instead of using a lot of</div><div class='add'>+ * on-chip pins as the HREFv60 and later does.</div><div class='add'>+ */</div><div class='add'>+static struct pinctrl_map __initdata mop500_pinmap[] = {</div><div class='add'>+	/* Mux in SSP0, pull down RXD pin */</div><div class='add'>+	DB8500_MUX_HOG("ssp0_a_1", "ssp0"),</div><div class='add'>+	DB8500_PIN_HOG("GPIO145_C13", pd),</div><div class='add'>+	/*</div><div class='add'>+	 * XENON Flashgun on image processor GPIO (controlled from image</div><div class='add'>+	 * processor firmware), mux in these image processor GPIO lines 0</div><div class='add'>+	 * (XENON_FLASH_ID) and 1 (XENON_READY) on altfunction C and pull up</div><div class='add'>+	 * the pins.</div><div class='add'>+	 */</div><div class='add'>+	DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),</div><div class='add'>+	DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),</div><div class='add'>+	DB8500_PIN_HOG("GPIO6_AF6", in_pu),</div><div class='add'>+	DB8500_PIN_HOG("GPIO7_AG5", in_pu),</div><div class='add'>+	/* TC35892 IRQ, pull up the line, let the driver mux in the pin */</div><div class='add'>+	DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu),</div><div class='add'>+	/* Mux in UART1 and set the pull-ups */</div><div class='add'>+	DB8500_MUX_HOG("u1rxtx_a_1", "u1"),</div><div class='add'>+	DB8500_MUX_HOG("u1ctsrts_a_1", "u1"),</div><div class='add'>+	DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */</div><div class='add'>+	DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */</div><div class='add'>+	DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* CTS */</div><div class='add'>+	DB8500_PIN_HOG("GPIO7_AG5", out_hi), /* RTS */</div><div class='add'>+	/*</div><div class='add'>+	 * Runtime stuff: make it possible to mux in the SKE keypad</div><div class='add'>+	 * and bias the pins</div><div class='add'>+	 */</div><div class='add'>+	DB8500_MUX("kp_a_2", "kp", "ske"),</div><div class='add'>+	DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */</div><div class='add'>+	DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */</div><div class='add'>+	DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */</div><div class='add'>+	DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */</div><div class='add'>+	DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */</div><div class='add'>+	DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */</div><div class='add'>+	DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */</div><div class='add'>+	DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */</div><div class='add'>+	DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */</div><div class='add'>+	DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */</div><div class='add'>+	DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */</div><div class='add'>+	DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */</div><div class='add'>+	DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */</div><div class='add'>+	DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */</div><div class='add'>+	DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */</div><div class='add'>+	DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */</div><div class='add'>+	/* Mux in and drive the SDI0 DAT31DIR line high at runtime */</div><div class='add'>+	DB8500_MUX("mc0dat31dir_a_1", "mc0", "sdi0"),</div><div class='add'>+	DB8500_PIN("GPIO21_AB3", out_hi, "sdi0"),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static pin_cfg_t hrefv60_pins[] = {</div><div class='del'>-	/* WLAN */</div><div class='del'>-	GPIO4_GPIO		| PIN_INPUT_PULLUP,/* WLAN_IRQ */</div><div class='del'>-	GPIO85_GPIO		| PIN_OUTPUT_LOW,/* WLAN_ENA */</div><div class='del'>-</div><div class='del'>-	/* XENON Flashgun INTERFACE */</div><div class='del'>-	GPIO6_IP_GPIO0	| PIN_INPUT_PULLUP,/* XENON_FLASH_ID */</div><div class='del'>-	GPIO7_IP_GPIO1	| PIN_INPUT_PULLUP,/* XENON_READY */</div><div class='del'>-	GPIO170_GPIO	| PIN_OUTPUT_LOW, /* XENON_CHARGE */</div><div class='del'>-</div><div class='del'>-	/* Assistant LED INTERFACE */</div><div class='del'>-	GPIO21_GPIO | PIN_OUTPUT_LOW,  /* XENON_EN1 */</div><div class='del'>-	GPIO64_IP_GPIO4 | PIN_OUTPUT_LOW,  /* XENON_EN2 */</div><div class='del'>-</div><div class='del'>-	/* Magnetometer */</div><div class='del'>-	GPIO31_GPIO | PIN_INPUT_PULLUP,  /* magnetometer_INT */</div><div class='del'>-	GPIO32_GPIO | PIN_INPUT_PULLDOWN, /* Magnetometer DRDY */</div><div class='del'>-</div><div class='del'>-	/* Display Interface */</div><div class='del'>-	GPIO65_GPIO		| PIN_OUTPUT_LOW, /* DISP1 RST */</div><div class='del'>-	GPIO66_GPIO		| PIN_OUTPUT_LOW, /* DISP2 RST */</div><div class='del'>-</div><div class='del'>-	/* Touch screen INTERFACE */</div><div class='del'>-	GPIO143_GPIO	| PIN_OUTPUT_LOW,/*TOUCH_RST1 */</div><div class='del'>-</div><div class='del'>-	/* Touch screen INTERFACE 2 */</div><div class='del'>-	GPIO67_GPIO	| PIN_INPUT_PULLUP, /* TOUCH_INT2 */</div><div class='del'>-	GPIO146_GPIO	| PIN_OUTPUT_LOW,/*TOUCH_RST2 */</div><div class='del'>-</div><div class='del'>-	/* ETM_PTM_TRACE INTERFACE */</div><div class='del'>-	GPIO70_GPIO	| PIN_OUTPUT_LOW,/* ETM_PTM_DATA23 */</div><div class='del'>-	GPIO71_GPIO	| PIN_OUTPUT_LOW,/* ETM_PTM_DATA22 */</div><div class='del'>-	GPIO72_GPIO	| PIN_OUTPUT_LOW,/* ETM_PTM_DATA21 */</div><div class='del'>-	GPIO73_GPIO	| PIN_OUTPUT_LOW,/* ETM_PTM_DATA20 */</div><div class='del'>-	GPIO74_GPIO	| PIN_OUTPUT_LOW,/* ETM_PTM_DATA19 */</div><div class='del'>-</div><div class='del'>-	/* NAHJ INTERFACE */</div><div class='del'>-	GPIO76_GPIO	| PIN_OUTPUT_LOW,/* NAHJ_CTRL */</div><div class='del'>-	GPIO216_GPIO	| PIN_OUTPUT_HIGH,/* NAHJ_CTRL_INV */</div><div class='del'>-</div><div class='del'>-	/* NFC INTERFACE */</div><div class='del'>-	GPIO77_GPIO	| PIN_OUTPUT_LOW, /* NFC_ENA */</div><div class='del'>-	GPIO144_GPIO	| PIN_INPUT_PULLDOWN, /* NFC_IRQ */</div><div class='del'>-	GPIO142_GPIO	| PIN_OUTPUT_LOW, /* NFC_RESET */</div><div class='del'>-</div><div class='del'>-	/* Keyboard MATRIX INTERFACE */</div><div class='del'>-	GPIO90_MC5_CMD	| PIN_OUTPUT_LOW, /* KP_O_1 */</div><div class='del'>-	GPIO87_MC5_DAT1	| PIN_OUTPUT_LOW, /* KP_O_2 */</div><div class='del'>-	GPIO86_MC5_DAT0	| PIN_OUTPUT_LOW, /* KP_O_3 */</div><div class='del'>-	GPIO96_KP_O6	| PIN_OUTPUT_LOW, /* KP_O_6 */</div><div class='del'>-	GPIO94_KP_O7	| PIN_OUTPUT_LOW, /* KP_O_7 */</div><div class='del'>-	GPIO93_MC5_DAT4	| PIN_INPUT_PULLUP, /* KP_I_0 */</div><div class='del'>-	GPIO89_MC5_DAT3	| PIN_INPUT_PULLUP, /* KP_I_2 */</div><div class='del'>-	GPIO88_MC5_DAT2	| PIN_INPUT_PULLUP, /* KP_I_3 */</div><div class='del'>-	GPIO91_GPIO	| PIN_INPUT_PULLUP, /* FORCE_SENSING_INT */</div><div class='del'>-	GPIO92_GPIO	| PIN_OUTPUT_LOW, /* FORCE_SENSING_RST */</div><div class='del'>-	GPIO97_GPIO	| PIN_OUTPUT_LOW, /* FORCE_SENSING_WU */</div><div class='del'>-</div><div class='del'>-	/* DiPro Sensor Interface */</div><div class='del'>-	GPIO139_GPIO	| PIN_INPUT_PULLUP, /* DIPRO_INT */</div><div class='del'>-</div><div class='del'>-	/* HAL SWITCH INTERFACE */</div><div class='del'>-	GPIO145_GPIO	| PIN_INPUT_PULLDOWN,/* HAL_SW */</div><div class='del'>-</div><div class='del'>-	/* Audio Amplifier Interface */</div><div class='del'>-	GPIO149_GPIO	| PIN_OUTPUT_LOW, /* VAUDIO_HF_EN */</div><div class='del'>-</div><div class='del'>-	/* GBF INTERFACE */</div><div class='del'>-	GPIO171_GPIO	| PIN_OUTPUT_LOW, /* GBF_ENA_RESET */</div><div class='del'>-</div><div class='del'>-	/* MSP : HDTV INTERFACE */</div><div class='del'>-	GPIO192_GPIO	| PIN_INPUT_PULLDOWN,</div><div class='del'>-</div><div class='del'>-	/* ACCELEROMETER_INTERFACE */</div><div class='del'>-	GPIO82_GPIO		| PIN_INPUT_PULLUP, /* ACC_INT1 */</div><div class='del'>-	GPIO83_GPIO		| PIN_INPUT_PULLUP, /* ACC_INT2 */</div><div class='del'>-</div><div class='del'>-	/* Proximity Sensor */</div><div class='del'>-	GPIO217_GPIO		| PIN_INPUT_PULLUP,</div><div class='del'>-</div><div class='del'>-</div><div class='add'>+/*</div><div class='add'>+ * The HREFv60 series of platforms is using available pins on the DB8500</div><div class='add'>+ * insteaf of the Toshiba I2C GPIO expander, reusing some pins like the SSP0</div><div class='add'>+ * and SSP1 ports (previously connected to the AB8500) as generic GPIO lines.</div><div class='add'>+ */</div><div class='add'>+static struct pinctrl_map __initdata hrefv60_pinmap[] = {</div><div class='add'>+	/* Drive WLAN_ENA low */</div><div class='add'>+	DB8500_PIN_HOG("GPIO85_D5", gpio_out_lo), /* WLAN_ENA */</div><div class='add'>+	/*</div><div class='add'>+	 * XENON Flashgun on image processor GPIO (controlled from image</div><div class='add'>+	 * processor firmware), mux in these image processor GPIO lines 0</div><div class='add'>+	 * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant</div><div class='add'>+	 * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias</div><div class='add'>+	 * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.</div><div class='add'>+	 */</div><div class='add'>+	DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),</div><div class='add'>+	DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),</div><div class='add'>+	DB8500_MUX_HOG("ipgpio4_c_1", "ipgpio"),</div><div class='add'>+	DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* XENON_FLASH_ID */</div><div class='add'>+	DB8500_PIN_HOG("GPIO7_AG5", in_pu), /* XENON_READY */</div><div class='add'>+	DB8500_PIN_HOG("GPIO21_AB3", gpio_out_lo), /* XENON_EN1 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO64_F3", out_lo), /* XENON_EN2 */</div><div class='add'>+	/* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */</div><div class='add'>+	DB8500_PIN_HOG("GPIO31_V3", gpio_in_pu), /* EN1 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO32_V2", gpio_in_pd), /* DRDY */</div><div class='add'>+	/*</div><div class='add'>+	 * Display Interface 1 uses GPIO 65 for RST (reset).</div><div class='add'>+	 * Display Interface 2 uses GPIO 66 for RST (reset).</div><div class='add'>+	 * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)</div><div class='add'>+	 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO65_F1", gpio_out_hi), /* DISP1 NO RST */</div><div class='add'>+	DB8500_PIN_HOG("GPIO66_G3", gpio_out_lo), /* DISP2 RST */</div><div class='add'>+	/*</div><div class='add'>+	 * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and</div><div class='add'>+	 * GPIO 67 for interrupts. Pull-up the IRQ line and drive both</div><div class='add'>+	 * reset signals low.</div><div class='add'>+	 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO143_D12", gpio_out_lo), /* TOUCH_RST1 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO67_G2", gpio_in_pu), /* TOUCH_INT2 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO146_D13", gpio_out_lo), /* TOUCH_RST2 */</div><div class='add'>+	/*</div><div class='add'>+	 * Drive D19-D23 for the ETM PTM trace interface low,</div><div class='add'>+	 * (presumably pins are unconnected therefore grounded here,</div><div class='add'>+	 * the "other alt C1" setting enables these pins)</div><div class='add'>+	 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO70_G5", gpio_out_lo),</div><div class='add'>+	DB8500_PIN_HOG("GPIO71_G4", gpio_out_lo),</div><div class='add'>+	DB8500_PIN_HOG("GPIO72_H4", gpio_out_lo),</div><div class='add'>+	DB8500_PIN_HOG("GPIO73_H3", gpio_out_lo),</div><div class='add'>+	DB8500_PIN_HOG("GPIO74_J3", gpio_out_lo),</div><div class='add'>+	/* NAHJ CTRL on GPIO 76 to low, CTRL_INV on GPIO216 to high */</div><div class='add'>+	DB8500_PIN_HOG("GPIO76_J2", gpio_out_lo), /* CTRL */</div><div class='add'>+	DB8500_PIN_HOG("GPIO216_AG12", gpio_out_hi), /* CTRL_INV */</div><div class='add'>+	/* NFC ENA and RESET to low, pulldown IRQ line */</div><div class='add'>+	DB8500_PIN_HOG("GPIO77_H1", gpio_out_lo), /* NFC_ENA */</div><div class='add'>+	DB8500_PIN_HOG("GPIO144_B13", gpio_in_pd), /* NFC_IRQ */</div><div class='add'>+	DB8500_PIN_HOG("GPIO142_C11", gpio_out_lo), /* NFC_RESET */</div><div class='add'>+	/*</div><div class='add'>+	 * SKE keyboard partly on alt A and partly on "Other alt C1"</div><div class='add'>+	 * Driver KP_O1,2,3,6,7 low and pull up KP_I 0,2,3 for three</div><div class='add'>+	 * rows of 6 keys, then pull up force sensing interrup and</div><div class='add'>+	 * drive reset and force sensing WU low.</div><div class='add'>+	 */</div><div class='add'>+	DB8500_MUX_HOG("kp_a_1", "kp"),</div><div class='add'>+	DB8500_MUX_HOG("kp_oc1_1", "kp"),</div><div class='add'>+	DB8500_PIN_HOG("GPIO90_A3", out_lo), /* KP_O1 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO87_B3", out_lo), /* KP_O2 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO86_C6", out_lo), /* KP_O3 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO96_D8", out_lo), /* KP_O6 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO94_D7", out_lo), /* KP_O7 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO93_B7", in_pu), /* KP_I0 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO89_E6", in_pu), /* KP_I2 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO88_C4", in_pu), /* KP_I3 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO91_B6", gpio_in_pu), /* FORCE_SENSING_INT */</div><div class='add'>+	DB8500_PIN_HOG("GPIO92_D6", gpio_out_lo), /* FORCE_SENSING_RST */</div><div class='add'>+	DB8500_PIN_HOG("GPIO97_D9", gpio_out_lo), /* FORCE_SENSING_WU */</div><div class='add'>+	/* DiPro Sensor interrupt */</div><div class='add'>+	DB8500_PIN_HOG("GPIO139_C9", gpio_in_pu), /* DIPRO_INT */</div><div class='add'>+	/* Audio Amplifier HF enable */</div><div class='add'>+	DB8500_PIN_HOG("GPIO149_B14", gpio_out_hi), /* VAUDIO_HF_EN, enable MAX8968 */</div><div class='add'>+	/* GBF interface, pull low to reset state */</div><div class='add'>+	DB8500_PIN_HOG("GPIO171_D23", gpio_out_lo), /* GBF_ENA_RESET */</div><div class='add'>+	/* MSP : HDTV INTERFACE GPIO line */</div><div class='add'>+	DB8500_PIN_HOG("GPIO192_AJ27", gpio_in_pd),</div><div class='add'>+	/* Accelerometer interrupt lines */</div><div class='add'>+	DB8500_PIN_HOG("GPIO82_C1", gpio_in_pu), /* ACC_INT1 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */</div><div class='add'>+	/* SD card detect GPIO pin */</div><div class='add'>+	DB8500_PIN_HOG("GPIO95_E8", gpio_in_pu),</div><div class='add'>+	/*</div><div class='add'>+	 * Runtime stuff</div><div class='add'>+	 * Pull up/down of some sensor GPIO pins, for proximity, HAL sensor</div><div class='add'>+	 * etc.</div><div class='add'>+	 */</div><div class='add'>+	DB8500_PIN("GPIO217_AH12", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),</div><div class='add'>+	DB8500_PIN("GPIO145_C13", gpio_in_pd_slpm_gpio_nopull, "gpio-keys.0"),</div><div class='add'>+	DB8500_PIN("GPIO139_C9", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),</div><div class='add'>+	/*</div><div class='add'>+	 * Make it possible to mux in the SKE keypad and bias the pins</div><div class='add'>+	 * FIXME: what's the point with this on HREFv60? KP/SKE is already</div><div class='add'>+	 * muxed in at another place! Enabling this will bork.</div><div class='add'>+	 */</div><div class='add'>+	DB8500_MUX("kp_a_2", "kp", "ske"),</div><div class='add'>+	DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */</div><div class='add'>+	DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */</div><div class='add'>+	DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */</div><div class='add'>+	DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */</div><div class='add'>+	DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */</div><div class='add'>+	DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */</div><div class='add'>+	DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */</div><div class='add'>+	DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */</div><div class='add'>+	DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */</div><div class='add'>+	DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */</div><div class='add'>+	DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */</div><div class='add'>+	DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */</div><div class='add'>+	DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */</div><div class='add'>+	DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */</div><div class='add'>+	DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */</div><div class='add'>+	DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static pin_cfg_t snowball_pins[] = {</div><div class='del'>-	/* SSP0, to AB8500 */</div><div class='del'>-	GPIO143_SSP0_CLK,</div><div class='del'>-	GPIO144_SSP0_FRM,</div><div class='del'>-	GPIO145_SSP0_RXD	| PIN_PULL_DOWN,</div><div class='del'>-	GPIO146_SSP0_TXD,</div><div class='add'>+static struct pinctrl_map __initdata u9500_pinmap[] = {</div><div class='add'>+	/* Mux in UART1 (just RX/TX) and set the pull-ups */</div><div class='add'>+	DB8500_MUX_HOG("u1rxtx_a_1", "u1"),</div><div class='add'>+	DB8500_PIN_HOG("GPIO4_AH6", in_pu),</div><div class='add'>+	DB8500_PIN_HOG("GPIO5_AG6", out_hi),</div><div class='add'>+	/* WLAN_IRQ line */</div><div class='add'>+	DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu),</div><div class='add'>+	/* HSI */</div><div class='add'>+	DB8500_MUX_HOG("hsir_a_1", "hsi"),</div><div class='add'>+	DB8500_MUX_HOG("hsit_a_1", "hsi"),</div><div class='add'>+	DB8500_PIN_HOG("GPIO219_AG10", in_pd), /* RX FLA0 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO220_AH10", in_pd), /* RX DAT0 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO221_AJ11", out_lo), /* RX RDY0 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO222_AJ9", out_lo), /* TX FLA0 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO223_AH9", out_lo), /* TX DAT0 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO224_AG9", in_pd), /* TX RDY0 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO225_AG8", in_pd), /* CAWAKE0 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO226_AF8", out_hi), /* ACWAKE0 */</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* MMC0: MicroSD card */</div><div class='del'>-	GPIO21_MC0_DAT31DIR     | PIN_OUTPUT_HIGH,</div><div class='add'>+static struct pinctrl_map __initdata u8500_pinmap[] = {</div><div class='add'>+	DB8500_PIN_HOG("GPIO226_AF8", gpio_out_lo), /* WLAN_PMU_EN */</div><div class='add'>+	DB8500_PIN_HOG("GPIO4_AH6", gpio_in_pu), /* WLAN_IRQ */</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* MMC2: LAN */</div><div class='del'>-	GPIO86_SM_ADQ0,</div><div class='del'>-	GPIO87_SM_ADQ1,</div><div class='del'>-	GPIO88_SM_ADQ2,</div><div class='del'>-	GPIO89_SM_ADQ3,</div><div class='del'>-	GPIO90_SM_ADQ4,</div><div class='del'>-	GPIO91_SM_ADQ5,</div><div class='del'>-	GPIO92_SM_ADQ6,</div><div class='del'>-	GPIO93_SM_ADQ7,</div><div class='add'>+static struct pinctrl_map __initdata snowball_pinmap[] = {</div><div class='add'>+	/* Mux in SSP0 connected to AB8500, pull down RXD pin */</div><div class='add'>+	DB8500_MUX_HOG("ssp0_a_1", "ssp0"),</div><div class='add'>+	DB8500_PIN_HOG("GPIO145_C13", pd),</div><div class='add'>+	/* Always drive the MC0 DAT31DIR line high on these boards */</div><div class='add'>+	DB8500_PIN_HOG("GPIO21_AB3", out_hi),</div><div class='add'>+	/* Mux in "SM" which is used for the SMSC911x Ethernet adapter */</div><div class='add'>+	DB8500_MUX_HOG("sm_b_1", "sm"),</div><div class='add'>+	/* Drive RSTn_LAN high */</div><div class='add'>+	DB8500_PIN_HOG("GPIO141_C12", gpio_out_hi),</div><div class='add'>+	/*  Accelerometer/Magnetometer */</div><div class='add'>+	DB8500_PIN_HOG("GPIO163_C20", gpio_in_pu), /* ACCEL_IRQ1 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO164_B21", gpio_in_pu), /* ACCEL_IRQ2 */</div><div class='add'>+	DB8500_PIN_HOG("GPIO165_C21", gpio_in_pu), /* MAG_DRDY */</div><div class='add'>+	/* WLAN/GBF */</div><div class='add'>+	DB8500_PIN_HOG("GPIO161_D21", gpio_out_lo), /* WLAN_PMU_EN */</div><div class='add'>+	DB8500_PIN_HOG("GPIO171_D23", gpio_out_hi), /* GBF_ENA */</div><div class='add'>+	DB8500_PIN_HOG("GPIO215_AH13", gpio_out_lo), /* WLAN_ENA */</div><div class='add'>+	DB8500_PIN_HOG("GPIO216_AG12", gpio_in_pu), /* WLAN_IRQ */</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	GPIO94_SM_ADVn,</div><div class='del'>-	GPIO95_SM_CS0n,</div><div class='del'>-	GPIO96_SM_OEn,</div><div class='del'>-	GPIO97_SM_WEn,</div><div class='add'>+/*</div><div class='add'>+ * passing "pinsfor=" in kernel cmdline allows for custom</div><div class='add'>+ * configuration of GPIOs on u8500 derived boards.</div><div class='add'>+ */</div><div class='add'>+static int __init early_pinsfor(char *p)</div><div class='add'>+{</div><div class='add'>+	pinsfor = PINS_FOR_DEFAULT;</div><div class='ctx'> </div><div class='del'>-	GPIO128_SM_CKO,</div><div class='del'>-	GPIO130_SM_FBCLK,</div><div class='del'>-	GPIO131_SM_ADQ8,</div><div class='del'>-	GPIO132_SM_ADQ9,</div><div class='del'>-	GPIO133_SM_ADQ10,</div><div class='del'>-	GPIO134_SM_ADQ11,</div><div class='del'>-	GPIO135_SM_ADQ12,</div><div class='del'>-	GPIO136_SM_ADQ13,</div><div class='del'>-	GPIO137_SM_ADQ14,</div><div class='del'>-	GPIO138_SM_ADQ15,</div><div class='add'>+	if (strcmp(p, "u9500-21") == 0)</div><div class='add'>+		pinsfor = PINS_FOR_U9500;</div><div class='ctx'> </div><div class='del'>-	/* RSTn_LAN */</div><div class='del'>-	GPIO141_GPIO		| PIN_OUTPUT_HIGH,</div><div class='del'>-};</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+early_param("pinsfor", early_pinsfor);</div><div class='ctx'> </div><div class='del'>-void __init mop500_pins_init(void)</div><div class='add'>+int pins_for_u9500(void)</div><div class='ctx'> {</div><div class='del'>-	nmk_config_pins(mop500_pins_common,</div><div class='del'>-			ARRAY_SIZE(mop500_pins_common));</div><div class='add'>+	if (pinsfor == PINS_FOR_U9500)</div><div class='add'>+		return 1;</div><div class='ctx'> </div><div class='del'>-	nmk_config_pins(mop500_pins_default,</div><div class='del'>-			ARRAY_SIZE(mop500_pins_default));</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init snowball_pins_init(void)</div><div class='add'>+static void __init mop500_href_family_pinmaps_init(void)</div><div class='ctx'> {</div><div class='del'>-	nmk_config_pins(mop500_pins_common,</div><div class='del'>-			ARRAY_SIZE(mop500_pins_common));</div><div class='add'>+	switch (pinsfor) {</div><div class='add'>+	case PINS_FOR_U9500:</div><div class='add'>+		pinctrl_register_mappings(u9500_pinmap,</div><div class='add'>+					  ARRAY_SIZE(u9500_pinmap));</div><div class='add'>+		break;</div><div class='add'>+	case PINS_FOR_DEFAULT:</div><div class='add'>+		pinctrl_register_mappings(u8500_pinmap,</div><div class='add'>+					  ARRAY_SIZE(u8500_pinmap));</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	nmk_config_pins(snowball_pins,</div><div class='del'>-			ARRAY_SIZE(snowball_pins));</div><div class='add'>+void __init mop500_pinmaps_init(void)</div><div class='add'>+{</div><div class='add'>+	pinctrl_register_mappings(mop500_family_pinmap,</div><div class='add'>+				  ARRAY_SIZE(mop500_family_pinmap));</div><div class='add'>+	pinctrl_register_mappings(mop500_pinmap,</div><div class='add'>+				  ARRAY_SIZE(mop500_pinmap));</div><div class='add'>+	mop500_href_family_pinmaps_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init hrefv60_pins_init(void)</div><div class='add'>+void __init snowball_pinmaps_init(void)</div><div class='ctx'> {</div><div class='del'>-	nmk_config_pins(mop500_pins_common,</div><div class='del'>-			ARRAY_SIZE(mop500_pins_common));</div><div class='add'>+	pinctrl_register_mappings(mop500_family_pinmap,</div><div class='add'>+				  ARRAY_SIZE(mop500_family_pinmap));</div><div class='add'>+	pinctrl_register_mappings(snowball_pinmap,</div><div class='add'>+				  ARRAY_SIZE(snowball_pinmap));</div><div class='add'>+	pinctrl_register_mappings(u8500_pinmap,</div><div class='add'>+				  ARRAY_SIZE(u8500_pinmap));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	nmk_config_pins(hrefv60_pins,</div><div class='del'>-			ARRAY_SIZE(hrefv60_pins));</div><div class='add'>+void __init hrefv60_pinmaps_init(void)</div><div class='add'>+{</div><div class='add'>+	pinctrl_register_mappings(mop500_family_pinmap,</div><div class='add'>+				  ARRAY_SIZE(mop500_family_pinmap));</div><div class='add'>+	pinctrl_register_mappings(hrefv60_pinmap,</div><div class='add'>+				  ARRAY_SIZE(hrefv60_pinmap));</div><div class='add'>+	mop500_href_family_pinmaps_init();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/mach-ux500/board-mop500-uib.c b/arch/arm/mach-ux500/board-mop500-uib.c<br/>index 5af36aa56c08..1f47d962e3a1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/board-mop500-uib.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/board-mop500-uib.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/board-mop500-uib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-mop500-uib.c</a></div><div class='hunk'>@@ -96,13 +96,13 @@ static void __init __mop500_uib_init(struct uib *uib, const char *why)</div><div class='ctx'> /*</div><div class='ctx'>  * Detect the UIB attached based on the presence or absence of i2c devices.</div><div class='ctx'>  */</div><div class='del'>-static int __init mop500_uib_init(void)</div><div class='add'>+int __init mop500_uib_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct uib *uib = mop500_uib;</div><div class='ctx'> 	struct i2c_adapter *i2c0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!cpu_is_u8500())</div><div class='add'>+	if (!cpu_is_u8500_family())</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (uib) {</div><div class='hunk'>@@ -131,5 +131,3 @@ static int __init mop500_uib_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(mop500_uib_init);</div><div class='head'>diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c<br/>index 77d03c1fbd04..9c74ac545849 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/board-mop500.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/board-mop500.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/board-mop500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-mop500.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2008-2009 ST-Ericsson</div><div class='ctx'>  *</div><div class='hunk'>@@ -29,30 +30,30 @@</div><div class='ctx'> #include &lt;linux/smsc911x.h&gt;</div><div class='ctx'> #include &lt;linux/gpio_keys.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='del'>-</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='del'>-</div><div class='ctx'> #include &lt;linux/leds.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/hardware/gic.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/i2c.h&gt;</div><div class='ctx'> #include &lt;plat/ste_dma40.h&gt;</div><div class='del'>-#include &lt;plat/pincfg.h&gt;</div><div class='ctx'> #include &lt;plat/gpio-nomadik.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;mach/setup.h&gt;</div><div class='ctx'> #include &lt;mach/devices.h&gt;</div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='add'>+#include &lt;mach/crypto-ux500.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "pins-db8500.h"</div><div class='ctx'> #include "ste-dma40-db8500.h"</div><div class='ctx'> #include "devices-db8500.h"</div><div class='ctx'> #include "board-mop500.h"</div><div class='ctx'> #include "board-mop500-regulators.h"</div><div class='add'>+#include "board-mop500-msp.h"</div><div class='ctx'> </div><div class='ctx'> static struct gpio_led snowball_led_array[] = {</div><div class='ctx'> 	{</div><div class='hunk'>@@ -205,7 +206,7 @@ static struct resource ab8500_resources[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device ab8500_device = {</div><div class='del'>-	.name = "ab8500-i2c",</div><div class='add'>+	.name = "ab8500-core",</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.dev = {</div><div class='ctx'> 		.platform_data = &amp;ab8500_platdata,</div><div class='hunk'>@@ -417,6 +418,45 @@ static void mop500_prox_deactivate(struct device *dev)</div><div class='ctx'> 	regulator_put(prox_regulator);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct cryp_platform_data u8500_cryp1_platform_data = {</div><div class='add'>+		.mem_to_engine = {</div><div class='add'>+				.dir = STEDMA40_MEM_TO_PERIPH,</div><div class='add'>+				.src_dev_type = STEDMA40_DEV_SRC_MEMORY,</div><div class='add'>+				.dst_dev_type = DB8500_DMA_DEV48_CAC1_TX,</div><div class='add'>+				.src_info.data_width = STEDMA40_WORD_WIDTH,</div><div class='add'>+				.dst_info.data_width = STEDMA40_WORD_WIDTH,</div><div class='add'>+				.mode = STEDMA40_MODE_LOGICAL,</div><div class='add'>+				.src_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+				.dst_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+		},</div><div class='add'>+		.engine_to_mem = {</div><div class='add'>+				.dir = STEDMA40_PERIPH_TO_MEM,</div><div class='add'>+				.src_dev_type = DB8500_DMA_DEV48_CAC1_RX,</div><div class='add'>+				.dst_dev_type = STEDMA40_DEV_DST_MEMORY,</div><div class='add'>+				.src_info.data_width = STEDMA40_WORD_WIDTH,</div><div class='add'>+				.dst_info.data_width = STEDMA40_WORD_WIDTH,</div><div class='add'>+				.mode = STEDMA40_MODE_LOGICAL,</div><div class='add'>+				.src_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+				.dst_info.psize = STEDMA40_PSIZE_LOG_4,</div><div class='add'>+		}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = {</div><div class='add'>+		.dir = STEDMA40_MEM_TO_PERIPH,</div><div class='add'>+		.src_dev_type = STEDMA40_DEV_SRC_MEMORY,</div><div class='add'>+		.dst_dev_type = DB8500_DMA_DEV50_HAC1_TX,</div><div class='add'>+		.src_info.data_width = STEDMA40_WORD_WIDTH,</div><div class='add'>+		.dst_info.data_width = STEDMA40_WORD_WIDTH,</div><div class='add'>+		.mode = STEDMA40_MODE_LOGICAL,</div><div class='add'>+		.src_info.psize = STEDMA40_PSIZE_LOG_16,</div><div class='add'>+		.dst_info.psize = STEDMA40_PSIZE_LOG_16,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct hash_platform_data u8500_hash1_platform_data = {</div><div class='add'>+		.mem_to_engine = &amp;u8500_hash_dma_cfg_tx,</div><div class='add'>+		.dma_filter = stedma40_filter,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* add any platform devices here - TODO */</div><div class='ctx'> static struct platform_device *mop500_platform_devs[] __initdata = {</div><div class='ctx'> 	&amp;mop500_gpio_keys_device,</div><div class='hunk'>@@ -520,14 +560,6 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static pin_cfg_t mop500_pins_uart0[] = {</div><div class='del'>-	GPIO0_U0_CTSn   | PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO1_U0_RTSn   | PIN_OUTPUT_HIGH,</div><div class='del'>-	GPIO2_U0_RXD    | PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO3_U0_TXD    | PIN_OUTPUT_HIGH,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define PRCC_K_SOFTRST_SET      0x18</div><div class='ctx'> #define PRCC_K_SOFTRST_CLEAR    0x1C</div><div class='ctx'> static void ux500_uart0_reset(void)</div><div class='hunk'>@@ -548,24 +580,33 @@ static void ux500_uart0_reset(void)</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* This needs to be referenced by callbacks */</div><div class='add'>+struct pinctrl *u0_p;</div><div class='add'>+struct pinctrl_state *u0_def;</div><div class='add'>+struct pinctrl_state *u0_sleep;</div><div class='add'>+</div><div class='ctx'> static void ux500_uart0_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = nmk_config_pins(mop500_pins_uart0,</div><div class='del'>-			ARRAY_SIZE(mop500_pins_uart0));</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		pr_err("pl011: uart pins_enable failed\n");</div><div class='add'>+	if (IS_ERR(u0_p) || IS_ERR(u0_def))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = pinctrl_select_state(u0_p, u0_def);</div><div class='add'>+	if (ret)</div><div class='add'>+		pr_err("could not set UART0 defstate\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ux500_uart0_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = nmk_config_pins_sleep(mop500_pins_uart0,</div><div class='del'>-			ARRAY_SIZE(mop500_pins_uart0));</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		pr_err("pl011: uart pins_disable failed\n");</div><div class='add'>+	if (IS_ERR(u0_p) || IS_ERR(u0_sleep))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = pinctrl_select_state(u0_p, u0_sleep);</div><div class='add'>+	if (ret)</div><div class='add'>+		pr_err("could not set UART0 idlestate\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct amba_pl011_data uart0_plat = {</div><div class='hunk'>@@ -597,11 +638,38 @@ static struct amba_pl011_data uart2_plat = {</div><div class='ctx'> </div><div class='ctx'> static void __init mop500_uart_init(struct device *parent)</div><div class='ctx'> {</div><div class='del'>-	db8500_add_uart0(parent, &amp;uart0_plat);</div><div class='add'>+	struct amba_device *uart0_device;</div><div class='add'>+</div><div class='add'>+	uart0_device = db8500_add_uart0(parent, &amp;uart0_plat);</div><div class='add'>+	if (uart0_device) {</div><div class='add'>+		u0_p = pinctrl_get(&amp;uart0_device-&gt;dev);</div><div class='add'>+		if (IS_ERR(u0_p))</div><div class='add'>+			dev_err(&amp;uart0_device-&gt;dev,</div><div class='add'>+				"could not get UART0 pinctrl\n");</div><div class='add'>+		else {</div><div class='add'>+			u0_def = pinctrl_lookup_state(u0_p,</div><div class='add'>+						      PINCTRL_STATE_DEFAULT);</div><div class='add'>+			if (IS_ERR(u0_def)) {</div><div class='add'>+				dev_err(&amp;uart0_device-&gt;dev,</div><div class='add'>+					"could not get UART0 defstate\n");</div><div class='add'>+			}</div><div class='add'>+			u0_sleep = pinctrl_lookup_state(u0_p,</div><div class='add'>+							PINCTRL_STATE_SLEEP);</div><div class='add'>+			if (IS_ERR(u0_sleep))</div><div class='add'>+				dev_err(&amp;uart0_device-&gt;dev,</div><div class='add'>+					"could not get UART0 idlestate\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	db8500_add_uart1(parent, &amp;uart1_plat);</div><div class='ctx'> 	db8500_add_uart2(parent, &amp;uart2_plat);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init u8500_cryp1_hash1_init(struct device *parent)</div><div class='add'>+{</div><div class='add'>+	db8500_add_cryp1(parent, &amp;u8500_cryp1_platform_data);</div><div class='add'>+	db8500_add_hash1(parent, &amp;u8500_hash1_platform_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct platform_device *snowball_platform_devs[] __initdata = {</div><div class='ctx'> 	&amp;snowball_led_dev,</div><div class='ctx'> 	&amp;snowball_key_dev,</div><div class='hunk'>@@ -609,6 +677,11 @@ static struct platform_device *snowball_platform_devs[] __initdata = {</div><div class='ctx'> 	&amp;ab8500_device,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct platform_device *snowball_of_platform_devs[] __initdata = {</div><div class='add'>+	&amp;snowball_led_dev,</div><div class='add'>+	&amp;snowball_key_dev,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void __init mop500_init_machine(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *parent = NULL;</div><div class='hunk'>@@ -617,10 +690,9 @@ static void __init mop500_init_machine(void)</div><div class='ctx'> </div><div class='ctx'> 	mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;</div><div class='ctx'> </div><div class='add'>+	mop500_pinmaps_init();</div><div class='ctx'> 	parent = u8500_init_devices();</div><div class='ctx'> </div><div class='del'>-	mop500_pins_init();</div><div class='del'>-</div><div class='ctx'> 	/* FIXME: parent of ab8500 should be prcmu */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(mop500_platform_devs); i++)</div><div class='ctx'> 		mop500_platform_devs[i]-&gt;dev.parent = parent;</div><div class='hunk'>@@ -631,8 +703,11 @@ static void __init mop500_init_machine(void)</div><div class='ctx'> 	mop500_i2c_init(parent);</div><div class='ctx'> 	mop500_sdi_init(parent);</div><div class='ctx'> 	mop500_spi_init(parent);</div><div class='add'>+	mop500_msp_init(parent);</div><div class='ctx'> 	mop500_uart_init(parent);</div><div class='ctx'> </div><div class='add'>+	u8500_cryp1_hash1_init(parent);</div><div class='add'>+</div><div class='ctx'> 	i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);</div><div class='ctx'> </div><div class='ctx'> 	i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);</div><div class='hunk'>@@ -641,18 +716,18 @@ static void __init mop500_init_machine(void)</div><div class='ctx'> </div><div class='ctx'> 	/* This board has full regulator constraints */</div><div class='ctx'> 	regulator_has_full_constraints();</div><div class='add'>+</div><div class='add'>+	mop500_uib_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init snowball_init_machine(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *parent = NULL;</div><div class='del'>-	int i2c0_devs;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	snowball_pinmaps_init();</div><div class='ctx'> 	parent = u8500_init_devices();</div><div class='ctx'> </div><div class='del'>-	snowball_pins_init();</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(snowball_platform_devs); i++)</div><div class='ctx'> 		snowball_platform_devs[i]-&gt;dev.parent = parent;</div><div class='ctx'> </div><div class='hunk'>@@ -662,13 +737,9 @@ static void __init snowball_init_machine(void)</div><div class='ctx'> 	mop500_i2c_init(parent);</div><div class='ctx'> 	snowball_sdi_init(parent);</div><div class='ctx'> 	mop500_spi_init(parent);</div><div class='add'>+	mop500_msp_init(parent);</div><div class='ctx'> 	mop500_uart_init(parent);</div><div class='ctx'> </div><div class='del'>-	i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);</div><div class='del'>-	i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);</div><div class='del'>-	i2c_register_board_info(2, mop500_i2c2_devices,</div><div class='del'>-				ARRAY_SIZE(mop500_i2c2_devices));</div><div class='del'>-</div><div class='ctx'> 	/* This board has full regulator constraints */</div><div class='ctx'> 	regulator_has_full_constraints();</div><div class='ctx'> }</div><div class='hunk'>@@ -686,10 +757,9 @@ static void __init hrefv60_init_machine(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;</div><div class='ctx'> </div><div class='add'>+	hrefv60_pinmaps_init();</div><div class='ctx'> 	parent = u8500_init_devices();</div><div class='ctx'> </div><div class='del'>-	hrefv60_pins_init();</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(mop500_platform_devs); i++)</div><div class='ctx'> 		mop500_platform_devs[i]-&gt;dev.parent = parent;</div><div class='ctx'> </div><div class='hunk'>@@ -699,6 +769,7 @@ static void __init hrefv60_init_machine(void)</div><div class='ctx'> 	mop500_i2c_init(parent);</div><div class='ctx'> 	hrefv60_sdi_init(parent);</div><div class='ctx'> 	mop500_spi_init(parent);</div><div class='add'>+	mop500_msp_init(parent);</div><div class='ctx'> 	mop500_uart_init(parent);</div><div class='ctx'> </div><div class='ctx'> 	i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);</div><div class='hunk'>@@ -711,6 +782,8 @@ static void __init hrefv60_init_machine(void)</div><div class='ctx'> </div><div class='ctx'> 	/* This board has full regulator constraints */</div><div class='ctx'> 	regulator_has_full_constraints();</div><div class='add'>+</div><div class='add'>+	mop500_uib_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(U8500, "ST-Ericsson MOP500 platform")</div><div class='hunk'>@@ -722,6 +795,7 @@ MACHINE_START(U8500, "ST-Ericsson MOP500 platform")</div><div class='ctx'> 	.timer		= &amp;ux500_timer,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= mop500_init_machine,</div><div class='add'>+	.init_late	= ux500_init_late,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")</div><div class='hunk'>@@ -731,6 +805,7 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")</div><div class='ctx'> 	.timer		= &amp;ux500_timer,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= hrefv60_init_machine,</div><div class='add'>+	.init_late	= ux500_init_late,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='ctx'> MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")</div><div class='hunk'>@@ -741,21 +816,39 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")</div><div class='ctx'> 	.timer		= &amp;ux500_timer,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= snowball_init_machine,</div><div class='add'>+	.init_late	= ux500_init_late,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MACH_UX500_DT</div><div class='ctx'> </div><div class='ctx'> struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {</div><div class='add'>+	/* Requires DMA and call-back bindings. */</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &amp;uart0_plat),</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &amp;uart1_plat),</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &amp;uart2_plat),</div><div class='add'>+	/* Requires DMA bindings. */</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0",  &amp;ssp0_plat),</div><div class='add'>+	/* Requires clock name bindings. */</div><div class='add'>+	OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct of_device_id u8500_soc_node[] = {</div><div class='add'>+static const struct of_device_id u8500_local_bus_nodes[] = {</div><div class='ctx'> 	/* only create devices below soc node */</div><div class='ctx'> 	{ .compatible = "stericsson,db8500", },</div><div class='add'>+	{ .compatible = "stericsson,db8500-prcmu", },</div><div class='add'>+	{ .compatible = "stericsson,db8500-prcmu-regulator", },</div><div class='add'>+	{ .compatible = "stericsson,ab8500", },</div><div class='add'>+	{ .compatible = "stericsson,ab8500-regulator", },</div><div class='add'>+	{ .compatible = "simple-bus"},</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -765,8 +858,15 @@ static void __init u8500_init_machine(void)</div><div class='ctx'> 	int i2c0_devs;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	parent = u8500_init_devices();</div><div class='del'>-	i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);</div><div class='add'>+	/* Pinmaps must be in place before devices register */</div><div class='add'>+	if (of_machine_is_compatible("st-ericsson,mop500"))</div><div class='add'>+		mop500_pinmaps_init();</div><div class='add'>+	else if (of_machine_is_compatible("calaosystems,snowball-a9500"))</div><div class='add'>+		snowball_pinmaps_init();</div><div class='add'>+	else if (of_machine_is_compatible("st-ericsson,hrefv60+"))</div><div class='add'>+		hrefv60_pinmaps_init();</div><div class='add'>+</div><div class='add'>+	parent = u8500_of_init_devices();</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(mop500_platform_devs); i++)</div><div class='ctx'> 		mop500_platform_devs[i]-&gt;dev.parent = parent;</div><div class='hunk'>@@ -774,20 +874,32 @@ static void __init u8500_init_machine(void)</div><div class='ctx'> 		snowball_platform_devs[i]-&gt;dev.parent = parent;</div><div class='ctx'> </div><div class='ctx'> 	/* automatically probe child nodes of db8500 device */</div><div class='del'>-	of_platform_populate(NULL, u8500_soc_node, u8500_auxdata_lookup, parent);</div><div class='add'>+	of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent);</div><div class='ctx'> </div><div class='ctx'> 	if (of_machine_is_compatible("st-ericsson,mop500")) {</div><div class='ctx'> 		mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;</div><div class='del'>-		mop500_pins_init();</div><div class='ctx'> </div><div class='ctx'> 		platform_add_devices(mop500_platform_devs,</div><div class='ctx'> 				ARRAY_SIZE(mop500_platform_devs));</div><div class='ctx'> </div><div class='ctx'> 		mop500_sdi_init(parent);</div><div class='add'>+		i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);</div><div class='add'>+		i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);</div><div class='add'>+		i2c_register_board_info(2, mop500_i2c2_devices,</div><div class='add'>+					ARRAY_SIZE(mop500_i2c2_devices));</div><div class='add'>+</div><div class='add'>+		mop500_uib_init();</div><div class='add'>+</div><div class='ctx'> 	} else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {</div><div class='del'>-		snowball_pins_init();</div><div class='del'>-		platform_add_devices(snowball_platform_devs,</div><div class='del'>-				ARRAY_SIZE(snowball_platform_devs));</div><div class='add'>+		/*</div><div class='add'>+		 * Devices to be DT:ed:</div><div class='add'>+		 *   snowball_led_dev   = todo</div><div class='add'>+		 *   snowball_key_dev   = todo</div><div class='add'>+		 *   snowball_sbnet_dev = done</div><div class='add'>+		 *   ab8500_device      = done</div><div class='add'>+		 */</div><div class='add'>+		platform_add_devices(snowball_of_platform_devs,</div><div class='add'>+				ARRAY_SIZE(snowball_of_platform_devs));</div><div class='ctx'> </div><div class='ctx'> 		snowball_sdi_init(parent);</div><div class='ctx'> 	} else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {</div><div class='hunk'>@@ -797,19 +909,22 @@ static void __init u8500_init_machine(void)</div><div class='ctx'> 		 * instead.</div><div class='ctx'> 		 */</div><div class='ctx'> 		mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;</div><div class='del'>-		i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;</div><div class='del'>-		hrefv60_pins_init();</div><div class='ctx'> 		platform_add_devices(mop500_platform_devs,</div><div class='ctx'> 				ARRAY_SIZE(mop500_platform_devs));</div><div class='ctx'> </div><div class='ctx'> 		hrefv60_sdi_init(parent);</div><div class='add'>+</div><div class='add'>+		i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);</div><div class='add'>+		i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;</div><div class='add'>+</div><div class='add'>+		i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);</div><div class='add'>+		i2c_register_board_info(2, mop500_i2c2_devices,</div><div class='add'>+					ARRAY_SIZE(mop500_i2c2_devices));</div><div class='add'>+</div><div class='add'>+		mop500_uib_init();</div><div class='ctx'> 	}</div><div class='ctx'> 	mop500_i2c_init(parent);</div><div class='ctx'> </div><div class='del'>-	i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);</div><div class='del'>-	i2c_register_board_info(2, mop500_i2c2_devices,</div><div class='del'>-				ARRAY_SIZE(mop500_i2c2_devices));</div><div class='del'>-</div><div class='ctx'> 	/* This board has full regulator constraints */</div><div class='ctx'> 	regulator_has_full_constraints();</div><div class='ctx'> }</div><div class='hunk'>@@ -830,6 +945,7 @@ DT_MACHINE_START(U8500_DT, "ST-Ericsson U8500 platform (Device Tree Support)")</div><div class='ctx'> 	.timer		= &amp;ux500_timer,</div><div class='ctx'> 	.handle_irq	= gic_handle_irq,</div><div class='ctx'> 	.init_machine	= u8500_init_machine,</div><div class='add'>+	.init_late	= ux500_init_late,</div><div class='ctx'> 	.dt_compat      = u8500_dt_board_compat,</div><div class='ctx'> MACHINE_END</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h<br/>index fdcfa8721bb4..2f87b25a908a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/board-mop500.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/board-mop500.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/board-mop500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/board-mop500.h</a></div><div class='hunk'>@@ -7,6 +7,9 @@</div><div class='ctx'> #ifndef __BOARD_MOP500_H</div><div class='ctx'> #define __BOARD_MOP500_H</div><div class='ctx'> </div><div class='add'>+/* For NOMADIK_NR_GPIO */</div><div class='add'>+#include &lt;mach/irqs.h&gt;</div><div class='add'>+</div><div class='ctx'> /* Snowball specific GPIO assignments, this board has no GPIO expander */</div><div class='ctx'> #define SNOWBALL_ACCEL_INT1_GPIO	163</div><div class='ctx'> #define SNOWBALL_ACCEL_INT2_GPIO	164</div><div class='hunk'>@@ -73,6 +76,7 @@</div><div class='ctx'> #define SNOWBALL_PME_ETH_GPIO		MOP500_AB8500_PIN_GPIO(24)	/* SYSCLKREQ7/GPIO24 */</div><div class='ctx'> #define SNOWBALL_EN_3V3_ETH_GPIO	MOP500_AB8500_PIN_GPIO(26)	/* GPIO26 */</div><div class='ctx'> </div><div class='add'>+struct device;</div><div class='ctx'> struct i2c_board_info;</div><div class='ctx'> </div><div class='ctx'> extern void mop500_sdi_init(struct device *parent);</div><div class='hunk'>@@ -81,11 +85,15 @@ extern void hrefv60_sdi_init(struct device *parent);</div><div class='ctx'> extern void mop500_sdi_tc35892_init(struct device *parent);</div><div class='ctx'> void __init mop500_u8500uib_init(void);</div><div class='ctx'> void __init mop500_stuib_init(void);</div><div class='del'>-void __init mop500_pins_init(void);</div><div class='del'>-void __init hrefv60_pins_init(void);</div><div class='del'>-void __init snowball_pins_init(void);</div><div class='add'>+void __init mop500_pinmaps_init(void);</div><div class='add'>+void __init snowball_pinmaps_init(void);</div><div class='add'>+void __init hrefv60_pinmaps_init(void);</div><div class='ctx'> </div><div class='add'>+int __init mop500_uib_init(void);</div><div class='ctx'> void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,</div><div class='ctx'> 		unsigned n);</div><div class='ctx'> </div><div class='add'>+/* TODO: Once all pieces are DT:ed, remove completely. */</div><div class='add'>+struct device * __init u8500_of_init_devices(void);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/board-u5500-sdi.c b/arch/arm/mach-ux500/board-u5500-sdi.c<br/>deleted file mode 100644<br/>index 836112eedde7..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/board-u5500-sdi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/board-u5500-sdi.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,74 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- *</div><div class='del'>- * Author: Hanumath Prasad &lt;ulf.hansson@stericsson.com&gt;</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/amba/mmci.h&gt;</div><div class='del'>-#include &lt;linux/mmc/host.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;plat/pincfg.h&gt;</div><div class='del'>-#include &lt;plat/gpio-nomadik.h&gt;</div><div class='del'>-#include &lt;mach/db5500-regs.h&gt;</div><div class='del'>-#include &lt;plat/ste_dma40.h&gt;</div><div class='del'>-</div><div class='del'>-#include "pins-db5500.h"</div><div class='del'>-#include "devices-db5500.h"</div><div class='del'>-#include "ste-dma40-db5500.h"</div><div class='del'>-</div><div class='del'>-static pin_cfg_t u5500_sdi_pins[] = {</div><div class='del'>-	/* SDI0 (POP eMMC) */</div><div class='del'>-	GPIO5_MC0_DAT0		| PIN_DIR_INPUT | PIN_PULL_UP,</div><div class='del'>-	GPIO6_MC0_DAT1		| PIN_DIR_INPUT | PIN_PULL_UP,</div><div class='del'>-	GPIO7_MC0_DAT2		| PIN_DIR_INPUT | PIN_PULL_UP,</div><div class='del'>-	GPIO8_MC0_DAT3		| PIN_DIR_INPUT | PIN_PULL_UP,</div><div class='del'>-	GPIO9_MC0_DAT4		| PIN_DIR_INPUT | PIN_PULL_UP,</div><div class='del'>-	GPIO10_MC0_DAT5		| PIN_DIR_INPUT | PIN_PULL_UP,</div><div class='del'>-	GPIO11_MC0_DAT6		| PIN_DIR_INPUT | PIN_PULL_UP,</div><div class='del'>-	GPIO12_MC0_DAT7		| PIN_DIR_INPUT | PIN_PULL_UP,</div><div class='del'>-	GPIO13_MC0_CMD		| PIN_DIR_INPUT | PIN_PULL_UP,</div><div class='del'>-	GPIO14_MC0_CLK		| PIN_DIR_OUTPUT | PIN_VAL_LOW,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_STE_DMA40</div><div class='del'>-struct stedma40_chan_cfg u5500_sdi0_dma_cfg_rx = {</div><div class='del'>-	.mode = STEDMA40_MODE_LOGICAL,</div><div class='del'>-	.dir = STEDMA40_PERIPH_TO_MEM,</div><div class='del'>-	.src_dev_type = DB5500_DMA_DEV24_SDMMC0_RX,</div><div class='del'>-	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,</div><div class='del'>-	.src_info.data_width = STEDMA40_WORD_WIDTH,</div><div class='del'>-	.dst_info.data_width = STEDMA40_WORD_WIDTH,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct stedma40_chan_cfg u5500_sdi0_dma_cfg_tx = {</div><div class='del'>-	.mode = STEDMA40_MODE_LOGICAL,</div><div class='del'>-	.dir = STEDMA40_MEM_TO_PERIPH,</div><div class='del'>-	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,</div><div class='del'>-	.dst_dev_type = DB5500_DMA_DEV24_SDMMC0_TX,</div><div class='del'>-	.src_info.data_width = STEDMA40_WORD_WIDTH,</div><div class='del'>-	.dst_info.data_width = STEDMA40_WORD_WIDTH,</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static struct mmci_platform_data u5500_sdi0_data = {</div><div class='del'>-	.ocr_mask	= MMC_VDD_165_195,</div><div class='del'>-	.f_max		= 50000000,</div><div class='del'>-	.capabilities	= MMC_CAP_4_BIT_DATA |</div><div class='del'>-				MMC_CAP_8_BIT_DATA |</div><div class='del'>-				MMC_CAP_MMC_HIGHSPEED,</div><div class='del'>-	.gpio_cd	= -1,</div><div class='del'>-	.gpio_wp	= -1,</div><div class='del'>-#ifdef CONFIG_STE_DMA40</div><div class='del'>-	.dma_filter	= stedma40_filter,</div><div class='del'>-	.dma_rx_param	= &amp;u5500_sdi0_dma_cfg_rx,</div><div class='del'>-	.dma_tx_param	= &amp;u5500_sdi0_dma_cfg_tx,</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init u5500_sdi_init(struct device *parent)</div><div class='del'>-{</div><div class='del'>-	nmk_config_pins(u5500_sdi_pins, ARRAY_SIZE(u5500_sdi_pins));</div><div class='del'>-</div><div class='del'>-	db5500_add_sdi0(parent, &amp;u5500_sdi0_data);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c<br/>deleted file mode 100644<br/>index 0ff4be72a809..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/board-u5500.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/board-u5500.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,162 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- *</div><div class='del'>- * Author: Rabin Vincent &lt;rabin.vincent@stericsson.com&gt; for ST-Ericsson</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/amba/bus.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/i2c.h&gt;</div><div class='del'>-#include &lt;linux/mfd/abx500/ab5500.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hardware/gic.h&gt;</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;plat/pincfg.h&gt;</div><div class='del'>-#include &lt;plat/i2c.h&gt;</div><div class='del'>-#include &lt;plat/gpio-nomadik.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/devices.h&gt;</div><div class='del'>-#include &lt;mach/setup.h&gt;</div><div class='del'>-</div><div class='del'>-#include "pins-db5500.h"</div><div class='del'>-#include "devices-db5500.h"</div><div class='del'>-#include &lt;linux/led-lm3530.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * GPIO</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static pin_cfg_t u5500_pins[] = {</div><div class='del'>-	/* I2C */</div><div class='del'>-	GPIO218_I2C2_SCL        | PIN_INPUT_PULLUP,</div><div class='del'>-	GPIO219_I2C2_SDA        | PIN_INPUT_PULLUP,</div><div class='del'>-</div><div class='del'>-	/* DISPLAY_ENABLE */</div><div class='del'>-	GPIO226_GPIO        | PIN_OUTPUT_LOW,</div><div class='del'>-</div><div class='del'>-	/* Backlight Enbale */</div><div class='del'>-	GPIO224_GPIO        | PIN_OUTPUT_HIGH,</div><div class='del'>-};</div><div class='del'>-/*</div><div class='del'>- * I2C</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define U5500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, _sm) \</div><div class='del'>-static struct nmk_i2c_controller u5500_i2c##id##_data = { \</div><div class='del'>-	/*				\</div><div class='del'>-	 * slave data setup time, which is	\</div><div class='del'>-	 * 250 ns,100ns,10ns which is 14,6,2	\</div><div class='del'>-	 * respectively for a 48 Mhz	\</div><div class='del'>-	 * i2c clock			\</div><div class='del'>-	 */				\</div><div class='del'>-	.slsu		= _slsu,	\</div><div class='del'>-	/* Tx FIFO threshold */		\</div><div class='del'>-	.tft		= _tft,		\</div><div class='del'>-	/* Rx FIFO threshold */		\</div><div class='del'>-	.rft		= _rft,		\</div><div class='del'>-	/* std. mode operation */	\</div><div class='del'>-	.clk_freq	= clk,		\</div><div class='del'>-	.sm		= _sm,		\</div><div class='del'>-}</div><div class='del'>-/*</div><div class='del'>- * The board uses TODO &lt;3&gt; i2c controllers, initialize all of</div><div class='del'>- * them with slave data setup time of 250 ns,</div><div class='del'>- * Tx &amp; Rx FIFO threshold values as 1 and standard</div><div class='del'>- * mode of operation</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-U5500_I2C_CONTROLLER(2,	0xe, 1, 1, 400000, I2C_FREQ_MODE_FAST);</div><div class='del'>-</div><div class='del'>-static struct lm3530_platform_data u5500_als_platform_data = {</div><div class='del'>-	.mode = LM3530_BL_MODE_MANUAL,</div><div class='del'>-	.als_input_mode = LM3530_INPUT_ALS1,</div><div class='del'>-	.max_current = LM3530_FS_CURR_26mA,</div><div class='del'>-	.pwm_pol_hi = true,</div><div class='del'>-	.als_avrg_time = LM3530_ALS_AVRG_TIME_512ms,</div><div class='del'>-	.brt_ramp_law = 1,      /* Linear */</div><div class='del'>-	.brt_ramp_fall = LM3530_RAMP_TIME_8s,</div><div class='del'>-	.brt_ramp_rise = LM3530_RAMP_TIME_8s,</div><div class='del'>-	.als1_resistor_sel = LM3530_ALS_IMPD_13_53kOhm,</div><div class='del'>-	.als2_resistor_sel = LM3530_ALS_IMPD_Z,</div><div class='del'>-	.als_vmin = 730,	/* mV */</div><div class='del'>-	.als_vmax = 1020,	/* mV */</div><div class='del'>-	.brt_val = 0x7F,	/* Max brightness */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct i2c_board_info __initdata u5500_i2c2_devices[] = {</div><div class='del'>-	{</div><div class='del'>-		/* Backlight */</div><div class='del'>-		I2C_BOARD_INFO("lm3530-led", 0x36),</div><div class='del'>-		.platform_data = &amp;u5500_als_platform_data,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init u5500_i2c_init(struct device *parent)</div><div class='del'>-{</div><div class='del'>-	db5500_add_i2c2(parent, &amp;u5500_i2c2_data);</div><div class='del'>-	i2c_register_board_info(2, ARRAY_AND_SIZE(u5500_i2c2_devices));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct ab5500_platform_data ab5500_plf_data = {</div><div class='del'>-	.irq = {</div><div class='del'>-		.base = 0,</div><div class='del'>-		.count = 0,</div><div class='del'>-	},</div><div class='del'>-	.init_settings = NULL,</div><div class='del'>-	.init_settings_sz = 0,</div><div class='del'>-	.pm_power_off = false,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device ab5500_device = {</div><div class='del'>-	.name = "ab5500-core",</div><div class='del'>-	.id = 0,</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = &amp;ab5500_plf_data,</div><div class='del'>-	},</div><div class='del'>-	.num_resources = 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *u5500_platform_devices[] __initdata = {</div><div class='del'>-	&amp;ab5500_device,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init u5500_uart_init(struct device *parent)</div><div class='del'>-{</div><div class='del'>-	db5500_add_uart0(parent, NULL);</div><div class='del'>-	db5500_add_uart1(parent, NULL);</div><div class='del'>-	db5500_add_uart2(parent, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init u5500_init_machine(void)</div><div class='del'>-{</div><div class='del'>-	struct device *parent = NULL;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	parent = u5500_init_devices();</div><div class='del'>-	nmk_config_pins(u5500_pins, ARRAY_SIZE(u5500_pins));</div><div class='del'>-</div><div class='del'>-	u5500_i2c_init(parent);</div><div class='del'>-	u5500_sdi_init(parent);</div><div class='del'>-	u5500_uart_init(parent);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(u5500_platform_devices); i++)</div><div class='del'>-		u5500_platform_devices[i]-&gt;dev.parent = parent;</div><div class='del'>-</div><div class='del'>-	platform_add_devices(u5500_platform_devices,</div><div class='del'>-		ARRAY_SIZE(u5500_platform_devices));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MACHINE_START(U5500, "ST-Ericsson U5500 Platform")</div><div class='del'>-	.atag_offset	= 0x100,</div><div class='del'>-	.map_io		= u5500_map_io,</div><div class='del'>-	.init_irq	= ux500_init_irq,</div><div class='del'>-	.timer		= &amp;ux500_timer,</div><div class='del'>-	.handle_irq	= gic_handle_irq,</div><div class='del'>-	.init_machine	= u5500_init_machine,</div><div class='del'>-MACHINE_END</div><div class='head'>diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c<br/>index 77a75ed0df67..dc12394295d5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/cache-l2x0.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/cache-l2x0.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/cache-l2x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/cache-l2x0.c</a></div><div class='hunk'>@@ -36,9 +36,9 @@ static int __init ux500_l2x0_unlock(void)</div><div class='ctx'> </div><div class='ctx'> static int __init ux500_l2x0_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (cpu_is_u5500())</div><div class='del'>-		l2x0_base = __io_address(U5500_L2CC_BASE);</div><div class='del'>-	else if (cpu_is_u8500())</div><div class='add'>+	u32 aux_val = 0x3e000000;</div><div class='add'>+</div><div class='add'>+	if (cpu_is_u8500_family())</div><div class='ctx'> 		l2x0_base = __io_address(U8500_L2CC_BASE);</div><div class='ctx'> 	else</div><div class='ctx'> 		ux500_unknown_soc();</div><div class='hunk'>@@ -46,11 +46,19 @@ static int __init ux500_l2x0_init(void)</div><div class='ctx'> 	/* Unlock before init */</div><div class='ctx'> 	ux500_l2x0_unlock();</div><div class='ctx'> </div><div class='add'>+	/* DB9540's L2 has 128KB way size */</div><div class='add'>+	if (cpu_is_u9540())</div><div class='add'>+		/* 128KB way size */</div><div class='add'>+		aux_val |= (0x4 &lt;&lt; L2X0_AUX_CTRL_WAY_SIZE_SHIFT);</div><div class='add'>+	else</div><div class='add'>+		/* 64KB way size */</div><div class='add'>+		aux_val |= (0x3 &lt;&lt; L2X0_AUX_CTRL_WAY_SIZE_SHIFT);</div><div class='add'>+</div><div class='ctx'> 	/* 64KB way size, 8 way associativity, force WA */</div><div class='ctx'> 	if (of_have_populated_dt())</div><div class='del'>-		l2x0_of_init(0x3e060000, 0xc0000fff);</div><div class='add'>+		l2x0_of_init(aux_val, 0xc0000fff);</div><div class='ctx'> 	else</div><div class='del'>-		l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);</div><div class='add'>+		l2x0_init(l2x0_base, aux_val, 0xc0000fff);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We can't disable l2 as we are in non secure mode, currently</div><div class='head'>diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c<br/>index ec35f0aa5665..8d73b066a18d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/clock.c</a></div><div class='hunk'>@@ -149,9 +149,7 @@ static unsigned long clk_mtu_get_rate(struct clk *clk)</div><div class='ctx'> 	unsigned long mturate;</div><div class='ctx'> 	unsigned long retclk;</div><div class='ctx'> </div><div class='del'>-	if (cpu_is_u5500())</div><div class='del'>-		addr = __io_address(U5500_PRCMU_BASE);</div><div class='del'>-	else if (cpu_is_u8500())</div><div class='add'>+	if (cpu_is_u8500_family())</div><div class='ctx'> 		addr = __io_address(U8500_PRCMU_BASE);</div><div class='ctx'> 	else</div><div class='ctx'> 		ux500_unknown_soc();</div><div class='hunk'>@@ -336,6 +334,7 @@ static DEFINE_PRCMU_CLK(uiccclk,	0x4, 1, UICCCLK); /* v1 */</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* Peripheral Cluster #1 */</div><div class='add'>+static DEFINE_PRCC_CLK(1, msp3,		11, 10, &amp;clk_msp1clk);</div><div class='ctx'> static DEFINE_PRCC_CLK(1, i2c4,		10, 9, &amp;clk_i2cclk);</div><div class='ctx'> static DEFINE_PRCC_CLK(1, gpio0,	9, -1, NULL);</div><div class='ctx'> static DEFINE_PRCC_CLK(1, slimbus0,	8,  8, &amp;clk_slimclk);</div><div class='hunk'>@@ -382,14 +381,15 @@ static DEFINE_PRCC_CLK(5, usb,		0,  0, NULL);</div><div class='ctx'> /* Peripheral Cluster #6 */</div><div class='ctx'> </div><div class='ctx'> /* MTU ID in data */</div><div class='del'>-static DEFINE_PRCC_CLK_CUSTOM(6, mtu1, 8, -1, NULL, clk_mtu_get_rate, 1);</div><div class='del'>-static DEFINE_PRCC_CLK_CUSTOM(6, mtu0, 7, -1, NULL, clk_mtu_get_rate, 0);</div><div class='del'>-static DEFINE_PRCC_CLK(6, cfgreg,	6,  6, NULL);</div><div class='del'>-static DEFINE_PRCC_CLK(6, hash1,	5, -1, NULL);</div><div class='del'>-static DEFINE_PRCC_CLK(6, unipro,	4,  1, &amp;clk_uniproclk);</div><div class='del'>-static DEFINE_PRCC_CLK(6, pka,		3, -1, NULL);</div><div class='del'>-static DEFINE_PRCC_CLK(6, hash0,	2, -1, NULL);</div><div class='del'>-static DEFINE_PRCC_CLK(6, cryp0,	1, -1, NULL);</div><div class='add'>+static DEFINE_PRCC_CLK_CUSTOM(6, mtu1, 9, -1, NULL, clk_mtu_get_rate, 1);</div><div class='add'>+static DEFINE_PRCC_CLK_CUSTOM(6, mtu0, 8, -1, NULL, clk_mtu_get_rate, 0);</div><div class='add'>+static DEFINE_PRCC_CLK(6, cfgreg,	7,  7, NULL);</div><div class='add'>+static DEFINE_PRCC_CLK(6, hash1,	6, -1, NULL);</div><div class='add'>+static DEFINE_PRCC_CLK(6, unipro,	5,  1, &amp;clk_uniproclk);</div><div class='add'>+static DEFINE_PRCC_CLK(6, pka,		4, -1, NULL);</div><div class='add'>+static DEFINE_PRCC_CLK(6, hash0,	3, -1, NULL);</div><div class='add'>+static DEFINE_PRCC_CLK(6, cryp0,	2, -1, NULL);</div><div class='add'>+static DEFINE_PRCC_CLK(6, cryp1,    1, -1, NULL);</div><div class='ctx'> static DEFINE_PRCC_CLK(6, rng,	0,  0, &amp;clk_rngclk);</div><div class='ctx'> </div><div class='ctx'> static struct clk clk_dummy_apb_pclk = {</div><div class='hunk'>@@ -405,7 +405,7 @@ static struct clk_lookup u8500_clks[] = {</div><div class='ctx'> 	CLK(slimbus0,	"slimbus0",	NULL),</div><div class='ctx'> 	CLK(i2c2,	"nmk-i2c.2",	NULL),</div><div class='ctx'> 	CLK(sdi0,	"sdi0",		NULL),</div><div class='del'>-	CLK(msp0,	"msp0",		NULL),</div><div class='add'>+	CLK(msp0,	"ux500-msp-i2s.0",	NULL),</div><div class='ctx'> 	CLK(i2c1,	"nmk-i2c.1",	NULL),</div><div class='ctx'> 	CLK(uart1,	"uart1",	NULL),</div><div class='ctx'> 	CLK(uart0,	"uart0",	NULL),</div><div class='hunk'>@@ -431,6 +431,7 @@ static struct clk_lookup u8500_clks[] = {</div><div class='ctx'> 	CLK(pka,	"pka",		NULL),</div><div class='ctx'> 	CLK(hash0,	"hash0",	NULL),</div><div class='ctx'> 	CLK(cryp0,	"cryp0",	NULL),</div><div class='add'>+	CLK(cryp1,  "cryp1",    NULL),</div><div class='ctx'> </div><div class='ctx'> 	/* PRCMU level clock gating */</div><div class='ctx'> </div><div class='hunk'>@@ -455,7 +456,8 @@ static struct clk_lookup u8500_clks[] = {</div><div class='ctx'> 	/* Peripheral Cluster #1 */</div><div class='ctx'> 	CLK(i2c4,	"nmk-i2c.4",	NULL),</div><div class='ctx'> 	CLK(spi3,	"spi3",		NULL),</div><div class='del'>-	CLK(msp1,	"msp1",		NULL),</div><div class='add'>+	CLK(msp1,	"ux500-msp-i2s.1",	NULL),</div><div class='add'>+	CLK(msp3,	"ux500-msp-i2s.3",	NULL),</div><div class='ctx'> </div><div class='ctx'> 	/* Peripheral Cluster #2 */</div><div class='ctx'> 	CLK(gpio1,	"gpio.6",	NULL),</div><div class='hunk'>@@ -465,7 +467,7 @@ static struct clk_lookup u8500_clks[] = {</div><div class='ctx'> 	CLK(spi0,	"spi0",		NULL),</div><div class='ctx'> 	CLK(sdi3,	"sdi3",		NULL),</div><div class='ctx'> 	CLK(sdi1,	"sdi1",		NULL),</div><div class='del'>-	CLK(msp2,	"msp2",		NULL),</div><div class='add'>+	CLK(msp2,	"ux500-msp-i2s.2",	NULL),</div><div class='ctx'> 	CLK(sdi4,	"sdi4",		NULL),</div><div class='ctx'> 	CLK(pwl,	"pwl",		NULL),</div><div class='ctx'> 	CLK(spi1,	"spi1",		NULL),</div><div class='hunk'>@@ -633,7 +635,7 @@ static int clk_debugfs_register(struct clk *c)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init clk_debugfs_init(void)</div><div class='add'>+int __init clk_debugfs_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk *c;</div><div class='ctx'> 	struct dentry *d;</div><div class='hunk'>@@ -655,7 +657,6 @@ err_out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-late_initcall(clk_debugfs_init);</div><div class='ctx'> #endif /* defined(CONFIG_DEBUG_FS) */</div><div class='ctx'> </div><div class='ctx'> unsigned long clk_smp_twd_rate = 500000000;</div><div class='hunk'>@@ -694,25 +695,16 @@ static struct notifier_block clk_twd_cpufreq_nb = {</div><div class='ctx'> 	.notifier_call = clk_twd_cpufreq_transition,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int clk_init_smp_twd_cpufreq(void)</div><div class='add'>+int clk_init_smp_twd_cpufreq(void)</div><div class='ctx'> {</div><div class='ctx'> 	return cpufreq_register_notifier(&amp;clk_twd_cpufreq_nb,</div><div class='ctx'> 				  CPUFREQ_TRANSITION_NOTIFIER);</div><div class='ctx'> }</div><div class='del'>-late_initcall(clk_init_smp_twd_cpufreq);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> int __init clk_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (cpu_is_u5500()) {</div><div class='del'>-		/* Clock tree for U5500 not implemented yet */</div><div class='del'>-		clk_prcc_ops.enable = clk_prcc_ops.disable = NULL;</div><div class='del'>-		clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL;</div><div class='del'>-		clk_uartclk.rate = 36360000;</div><div class='del'>-		clk_sdmmcclk.rate = 99900000;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	clkdev_add_table(u8500_clks, ARRAY_SIZE(u8500_clks));</div><div class='ctx'> 	clkdev_add(&amp;clk_smp_twd_lookup);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ux500/clock.h b/arch/arm/mach-ux500/clock.h<br/>index d776ada08dbf..65d27a13f46d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/clock.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/clock.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/clock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/clock.h</a></div><div class='hunk'>@@ -150,3 +150,15 @@ struct clk clk_##_name = {						\</div><div class='ctx'> </div><div class='ctx'> int __init clk_db8500_ed_fixup(void);</div><div class='ctx'> int __init clk_init(void);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+int clk_debugfs_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int clk_debugfs_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CPU_FREQ</div><div class='add'>+int clk_init_smp_twd_cpufreq(void);</div><div class='add'>+#else</div><div class='add'>+static inline int clk_init_smp_twd_cpufreq(void) { return 0; }</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c<br/>deleted file mode 100644<br/>index bca47f32082f..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/cpu-db5500.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/cpu-db5500.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,247 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- *</div><div class='del'>- * Author: Rabin Vincent &lt;rabin.vincent@stericsson.com&gt; for ST-Ericsson</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/amba/bus.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/pmu.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;plat/gpio-nomadik.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/devices.h&gt;</div><div class='del'>-#include &lt;mach/setup.h&gt;</div><div class='del'>-#include &lt;mach/irqs.h&gt;</div><div class='del'>-#include &lt;mach/usb.h&gt;</div><div class='del'>-</div><div class='del'>-#include "devices-db5500.h"</div><div class='del'>-#include "ste-dma40-db5500.h"</div><div class='del'>-</div><div class='del'>-static struct map_desc u5500_uart_io_desc[] __initdata = {</div><div class='del'>-	__IO_DEV_DESC(U5500_UART0_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U5500_UART2_BASE, SZ_4K),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct map_desc u5500_io_desc[] __initdata = {</div><div class='del'>-	/* SCU base also covers GIC CPU BASE and TWD with its 4K page */</div><div class='del'>-	__IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U5500_GIC_DIST_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U5500_L2CC_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U5500_MTU0_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U5500_BACKUPRAM0_BASE, SZ_8K),</div><div class='del'>-</div><div class='del'>-	__IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U5500_GPIO1_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U5500_GPIO2_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U5500_GPIO3_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U5500_GPIO4_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U5500_PRCMU_BASE, SZ_4K),</div><div class='del'>-	__IO_DEV_DESC(U5500_PRCMU_TCDM_BASE, SZ_4K),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource mbox0_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.name = "mbox_peer",</div><div class='del'>-		.start = U5500_MBOX0_PEER_START,</div><div class='del'>-		.end = U5500_MBOX0_PEER_END,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "mbox_local",</div><div class='del'>-		.start = U5500_MBOX0_LOCAL_START,</div><div class='del'>-		.end = U5500_MBOX0_LOCAL_END,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "mbox_irq",</div><div class='del'>-		.start = MBOX_PAIR0_VIRT_IRQ,</div><div class='del'>-		.end = MBOX_PAIR0_VIRT_IRQ,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource mbox1_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.name = "mbox_peer",</div><div class='del'>-		.start = U5500_MBOX1_PEER_START,</div><div class='del'>-		.end = U5500_MBOX1_PEER_END,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "mbox_local",</div><div class='del'>-		.start = U5500_MBOX1_LOCAL_START,</div><div class='del'>-		.end = U5500_MBOX1_LOCAL_END,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "mbox_irq",</div><div class='del'>-		.start = MBOX_PAIR1_VIRT_IRQ,</div><div class='del'>-		.end = MBOX_PAIR1_VIRT_IRQ,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource mbox2_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.name = "mbox_peer",</div><div class='del'>-		.start = U5500_MBOX2_PEER_START,</div><div class='del'>-		.end = U5500_MBOX2_PEER_END,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "mbox_local",</div><div class='del'>-		.start = U5500_MBOX2_LOCAL_START,</div><div class='del'>-		.end = U5500_MBOX2_LOCAL_END,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "mbox_irq",</div><div class='del'>-		.start = MBOX_PAIR2_VIRT_IRQ,</div><div class='del'>-		.end = MBOX_PAIR2_VIRT_IRQ,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device mbox0_device = {</div><div class='del'>-	.id = 0,</div><div class='del'>-	.name = "mbox",</div><div class='del'>-	.resource = mbox0_resources,</div><div class='del'>-	.num_resources = ARRAY_SIZE(mbox0_resources),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device mbox1_device = {</div><div class='del'>-	.id = 1,</div><div class='del'>-	.name = "mbox",</div><div class='del'>-	.resource = mbox1_resources,</div><div class='del'>-	.num_resources = ARRAY_SIZE(mbox1_resources),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device mbox2_device = {</div><div class='del'>-	.id = 2,</div><div class='del'>-	.name = "mbox",</div><div class='del'>-	.resource = mbox2_resources,</div><div class='del'>-	.num_resources = ARRAY_SIZE(mbox2_resources),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device *db5500_platform_devs[] __initdata = {</div><div class='del'>-	&amp;mbox0_device,</div><div class='del'>-	&amp;mbox1_device,</div><div class='del'>-	&amp;mbox2_device,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static resource_size_t __initdata db5500_gpio_base[] = {</div><div class='del'>-	U5500_GPIOBANK0_BASE,</div><div class='del'>-	U5500_GPIOBANK1_BASE,</div><div class='del'>-	U5500_GPIOBANK2_BASE,</div><div class='del'>-	U5500_GPIOBANK3_BASE,</div><div class='del'>-	U5500_GPIOBANK4_BASE,</div><div class='del'>-	U5500_GPIOBANK5_BASE,</div><div class='del'>-	U5500_GPIOBANK6_BASE,</div><div class='del'>-	U5500_GPIOBANK7_BASE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init db5500_add_gpios(struct device *parent)</div><div class='del'>-{</div><div class='del'>-	struct nmk_gpio_platform_data pdata = {</div><div class='del'>-		/* No custom data yet */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dbx500_add_gpios(parent, ARRAY_AND_SIZE(db5500_gpio_base),</div><div class='del'>-			 IRQ_DB5500_GPIO0, &amp;pdata);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init u5500_map_io(void)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Map the UARTs early so that the DEBUG_LL stuff continues to work.</div><div class='del'>-	 */</div><div class='del'>-	iotable_init(u5500_uart_io_desc, ARRAY_SIZE(u5500_uart_io_desc));</div><div class='del'>-</div><div class='del'>-	ux500_map_io();</div><div class='del'>-</div><div class='del'>-	iotable_init(u5500_io_desc, ARRAY_SIZE(u5500_io_desc));</div><div class='del'>-</div><div class='del'>-	_PRCMU_BASE = __io_address(U5500_PRCMU_BASE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init db5500_pmu_init(void)</div><div class='del'>-{</div><div class='del'>-	struct resource res[] = {</div><div class='del'>-		[0] = {</div><div class='del'>-			.start		= IRQ_DB5500_PMU0,</div><div class='del'>-			.end		= IRQ_DB5500_PMU0,</div><div class='del'>-			.flags		= IORESOURCE_IRQ,</div><div class='del'>-		},</div><div class='del'>-		[1] = {</div><div class='del'>-			.start		= IRQ_DB5500_PMU1,</div><div class='del'>-			.end		= IRQ_DB5500_PMU1,</div><div class='del'>-			.flags		= IORESOURCE_IRQ,</div><div class='del'>-		},</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	platform_device_register_simple("arm-pmu", ARM_PMU_DEVICE_CPU,</div><div class='del'>-					res, ARRAY_SIZE(res));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int usb_db5500_rx_dma_cfg[] = {</div><div class='del'>-	DB5500_DMA_DEV4_USB_OTG_IEP_1_9,</div><div class='del'>-	DB5500_DMA_DEV5_USB_OTG_IEP_2_10,</div><div class='del'>-	DB5500_DMA_DEV6_USB_OTG_IEP_3_11,</div><div class='del'>-	DB5500_DMA_DEV20_USB_OTG_IEP_4_12,</div><div class='del'>-	DB5500_DMA_DEV21_USB_OTG_IEP_5_13,</div><div class='del'>-	DB5500_DMA_DEV22_USB_OTG_IEP_6_14,</div><div class='del'>-	DB5500_DMA_DEV23_USB_OTG_IEP_7_15,</div><div class='del'>-	DB5500_DMA_DEV38_USB_OTG_IEP_8</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int usb_db5500_tx_dma_cfg[] = {</div><div class='del'>-	DB5500_DMA_DEV4_USB_OTG_OEP_1_9,</div><div class='del'>-	DB5500_DMA_DEV5_USB_OTG_OEP_2_10,</div><div class='del'>-	DB5500_DMA_DEV6_USB_OTG_OEP_3_11,</div><div class='del'>-	DB5500_DMA_DEV20_USB_OTG_OEP_4_12,</div><div class='del'>-	DB5500_DMA_DEV21_USB_OTG_OEP_5_13,</div><div class='del'>-	DB5500_DMA_DEV22_USB_OTG_OEP_6_14,</div><div class='del'>-	DB5500_DMA_DEV23_USB_OTG_OEP_7_15,</div><div class='del'>-	DB5500_DMA_DEV38_USB_OTG_OEP_8</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const char *db5500_read_soc_id(void)</div><div class='del'>-{</div><div class='del'>-	return kasprintf(GFP_KERNEL, "u5500 currently unsupported\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct device * __init db5500_soc_device_init(void)</div><div class='del'>-{</div><div class='del'>-	const char *soc_id = db5500_read_soc_id();</div><div class='del'>-</div><div class='del'>-	return ux500_soc_device_init(soc_id);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct device * __init u5500_init_devices(void)</div><div class='del'>-{</div><div class='del'>-	struct device *parent;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	parent = db5500_soc_device_init();</div><div class='del'>-</div><div class='del'>-	db5500_add_gpios(parent);</div><div class='del'>-	db5500_pmu_init();</div><div class='del'>-	db5500_dma_init(parent);</div><div class='del'>-	db5500_add_rtc(parent);</div><div class='del'>-	db5500_add_usb(parent, usb_db5500_rx_dma_cfg, usb_db5500_tx_dma_cfg);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(db5500_platform_devs); i++)</div><div class='del'>-		db5500_platform_devs[i]-&gt;dev.parent = parent;</div><div class='del'>-</div><div class='del'>-	platform_add_devices(db5500_platform_devs,</div><div class='del'>-			     ARRAY_SIZE(db5500_platform_devs));</div><div class='del'>-</div><div class='del'>-	return parent;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c<br/>index 9bd8163896cf..33275eb4c689 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/cpu-db8500.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/cpu-db8500.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/cpu-db8500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/cpu-db8500.c</a></div><div class='hunk'>@@ -34,8 +34,8 @@ static struct map_desc u8500_uart_io_desc[] __initdata = {</div><div class='ctx'> 	__IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),</div><div class='ctx'> 	__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-static struct map_desc u8500_io_desc[] __initdata = {</div><div class='add'>+/*  U8500 and U9540 common io_desc */</div><div class='add'>+static struct map_desc u8500_common_io_desc[] __initdata = {</div><div class='ctx'> 	/* SCU base also covers GIC CPU BASE and TWD with its 4K page */</div><div class='ctx'> 	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),</div><div class='ctx'> 	__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),</div><div class='hunk'>@@ -49,12 +49,23 @@ static struct map_desc u8500_io_desc[] __initdata = {</div><div class='ctx'> 	__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),</div><div class='ctx'> 	__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),</div><div class='ctx'> </div><div class='del'>-	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),</div><div class='ctx'> 	__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),</div><div class='ctx'> 	__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),</div><div class='ctx'> 	__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),</div><div class='ctx'> 	__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* U8500 IO map specific description */</div><div class='add'>+static struct map_desc u8500_io_desc[] __initdata = {</div><div class='add'>+	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),</div><div class='ctx'> 	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* U9540 IO map specific description */</div><div class='add'>+static struct map_desc u9540_io_desc[] __initdata = {</div><div class='add'>+	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),</div><div class='add'>+	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void __init u8500_map_io(void)</div><div class='hunk'>@@ -66,7 +77,12 @@ void __init u8500_map_io(void)</div><div class='ctx'> </div><div class='ctx'> 	ux500_map_io();</div><div class='ctx'> </div><div class='del'>-	iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));</div><div class='add'>+	iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));</div><div class='add'>+</div><div class='add'>+	if (cpu_is_u9540())</div><div class='add'>+		iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));</div><div class='add'>+	else</div><div class='add'>+		iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));</div><div class='ctx'> </div><div class='ctx'> 	_PRCMU_BASE = __io_address(U8500_PRCMU_BASE);</div><div class='ctx'> }</div><div class='hunk'>@@ -121,6 +137,11 @@ static struct platform_device *platform_devs[] __initdata = {</div><div class='ctx'> 	&amp;db8500_prcmu_device,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct platform_device *of_platform_devs[] __initdata = {</div><div class='add'>+	&amp;u8500_dma40_device,</div><div class='add'>+	&amp;db8500_pmu_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static resource_size_t __initdata db8500_gpio_base[] = {</div><div class='ctx'> 	U8500_GPIOBANK0_BASE,</div><div class='ctx'> 	U8500_GPIOBANK1_BASE,</div><div class='hunk'>@@ -141,6 +162,7 @@ static void __init db8500_add_gpios(struct device *parent)</div><div class='ctx'> </div><div class='ctx'> 	dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),</div><div class='ctx'> 			 IRQ_DB8500_GPIO0, &amp;pdata);</div><div class='add'>+	dbx500_add_pinctrl(parent, "pinctrl-db8500");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int usb_db8500_rx_dma_cfg[] = {</div><div class='hunk'>@@ -206,3 +228,31 @@ struct device * __init u8500_init_devices(void)</div><div class='ctx'> </div><div class='ctx'> 	return parent;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/* TODO: Once all pieces are DT:ed, remove completely. */</div><div class='add'>+struct device * __init u8500_of_init_devices(void)</div><div class='add'>+{</div><div class='add'>+	struct device *parent;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	parent = db8500_soc_device_init();</div><div class='add'>+</div><div class='add'>+	db8500_add_rtc(parent);</div><div class='add'>+	db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);</div><div class='add'>+</div><div class='add'>+	platform_device_register_data(parent,</div><div class='add'>+		"cpufreq-u8500", -1, NULL, 0);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(of_platform_devs); i++)</div><div class='add'>+		of_platform_devs[i]-&gt;dev.parent = parent;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Devices to be DT:ed:</div><div class='add'>+	 *   u8500_dma40_device  = todo</div><div class='add'>+	 *   db8500_pmu_device   = todo</div><div class='add'>+	 *   db8500_prcmu_device = done</div><div class='add'>+	 */</div><div class='add'>+	platform_add_devices(of_platform_devs, ARRAY_SIZE(of_platform_devs));</div><div class='add'>+</div><div class='add'>+	return parent;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c<br/>index d11f3892a27d..e2360e7c770d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/cpu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/cpu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/cpu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/cpu.c</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/db8500-prcmu.h&gt;</div><div class='del'>-#include &lt;linux/mfd/db5500-prcmu.h&gt;</div><div class='ctx'> #include &lt;linux/clksrc-dbx500-prcmu.h&gt;</div><div class='ctx'> #include &lt;linux/sys_soc.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='hunk'>@@ -30,6 +29,18 @@</div><div class='ctx'> </div><div class='ctx'> void __iomem *_PRCMU_BASE;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * FIXME: Should we set up the GPIO domain here?</div><div class='add'>+ *</div><div class='add'>+ * The problem is that we cannot put the interrupt resources into the platform</div><div class='add'>+ * device until the irqdomain has been added. Right now, we set the GIC interrupt</div><div class='add'>+ * domain from init_irq(), then load the gpio driver from</div><div class='add'>+ * core_initcall(nmk_gpio_init) and add the platform devices from</div><div class='add'>+ * arch_initcall(customize_machine).</div><div class='add'>+ *</div><div class='add'>+ * This feels fragile because it depends on the gpio device getting probed</div><div class='add'>+ * _before_ any device uses the gpio interrupts.</div><div class='add'>+*/</div><div class='ctx'> static const struct of_device_id ux500_dt_irq_match[] = {</div><div class='ctx'> 	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },</div><div class='ctx'> 	{},</div><div class='hunk'>@@ -40,10 +51,7 @@ void __init ux500_init_irq(void)</div><div class='ctx'> 	void __iomem *dist_base;</div><div class='ctx'> 	void __iomem *cpu_base;</div><div class='ctx'> </div><div class='del'>-	if (cpu_is_u5500()) {</div><div class='del'>-		dist_base = __io_address(U5500_GIC_DIST_BASE);</div><div class='del'>-		cpu_base = __io_address(U5500_GIC_CPU_BASE);</div><div class='del'>-	} else if (cpu_is_u8500()) {</div><div class='add'>+	if (cpu_is_u8500_family()) {</div><div class='ctx'> 		dist_base = __io_address(U8500_GIC_DIST_BASE);</div><div class='ctx'> 		cpu_base = __io_address(U8500_GIC_CPU_BASE);</div><div class='ctx'> 	} else</div><div class='hunk'>@@ -60,13 +68,17 @@ void __init ux500_init_irq(void)</div><div class='ctx'> 	 * Init clocks here so that they are available for system timer</div><div class='ctx'> 	 * initialization.</div><div class='ctx'> 	 */</div><div class='del'>-	if (cpu_is_u5500())</div><div class='del'>-		db5500_prcmu_early_init();</div><div class='del'>-	if (cpu_is_u8500())</div><div class='add'>+	if (cpu_is_u8500_family())</div><div class='ctx'> 		db8500_prcmu_early_init();</div><div class='ctx'> 	clk_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void __init ux500_init_late(void)</div><div class='add'>+{</div><div class='add'>+	clk_debugfs_init();</div><div class='add'>+	clk_init_smp_twd_cpufreq();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const char * __init ux500_get_machine(void)</div><div class='ctx'> {</div><div class='ctx'> 	return kasprintf(GFP_KERNEL, "DB%4x", dbx500_partnumber());</div><div class='head'>diff --git a/arch/arm/mach-ux500/cpuidle.c b/arch/arm/mach-ux500/cpuidle.c<br/>new file mode 100644<br/>index 000000000000..b54884bd2549<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/cpuidle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/cpuidle.c</a></div><div class='hunk'>@@ -0,0 +1,171 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2012 Linaro : Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt; (IBM)</div><div class='add'>+ *</div><div class='add'>+ * Based on the work of Rickard Andersson &lt;rickard.andersson@stericsson.com&gt;</div><div class='add'>+ * and Jonas Aaberg &lt;jonas.aberg@stericsson.com&gt;.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/cpuidle.h&gt;</div><div class='add'>+#include &lt;linux/clockchips.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/atomic.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/mfd/dbx500-prcmu.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cpuidle.h&gt;</div><div class='add'>+#include &lt;asm/proc-fns.h&gt;</div><div class='add'>+</div><div class='add'>+static atomic_t master = ATOMIC_INIT(0);</div><div class='add'>+static DEFINE_SPINLOCK(master_lock);</div><div class='add'>+static DEFINE_PER_CPU(struct cpuidle_device, ux500_cpuidle_device);</div><div class='add'>+</div><div class='add'>+static inline int ux500_enter_idle(struct cpuidle_device *dev,</div><div class='add'>+				   struct cpuidle_driver *drv, int index)</div><div class='add'>+{</div><div class='add'>+	int this_cpu = smp_processor_id();</div><div class='add'>+	bool recouple = false;</div><div class='add'>+</div><div class='add'>+	clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &amp;this_cpu);</div><div class='add'>+</div><div class='add'>+	if (atomic_inc_return(&amp;master) == num_online_cpus()) {</div><div class='add'>+</div><div class='add'>+		/* With this lock, we prevent the other cpu to exit and enter</div><div class='add'>+		 * this function again and become the master */</div><div class='add'>+		if (!spin_trylock(&amp;master_lock))</div><div class='add'>+			goto wfi;</div><div class='add'>+</div><div class='add'>+		/* decouple the gic from the A9 cores */</div><div class='add'>+		if (prcmu_gic_decouple())</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* If an error occur, we will have to recouple the gic</div><div class='add'>+		 * manually */</div><div class='add'>+		recouple = true;</div><div class='add'>+</div><div class='add'>+		/* At this state, as the gic is decoupled, if the other</div><div class='add'>+		 * cpu is in WFI, we have the guarantee it won't be wake</div><div class='add'>+		 * up, so we can safely go to retention */</div><div class='add'>+		if (!prcmu_is_cpu_in_wfi(this_cpu ? 0 : 1))</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* The prcmu will be in charge of watching the interrupts</div><div class='add'>+		 * and wake up the cpus */</div><div class='add'>+		if (prcmu_copy_gic_settings())</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* Check in the meantime an interrupt did</div><div class='add'>+		 * not occur on the gic ... */</div><div class='add'>+		if (prcmu_gic_pending_irq())</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* ... and the prcmu */</div><div class='add'>+		if (prcmu_pending_irq())</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* Go to the retention state, the prcmu will wait for the</div><div class='add'>+		 * cpu to go WFI and this is what happens after exiting this</div><div class='add'>+		 * 'master' critical section */</div><div class='add'>+		if (prcmu_set_power_state(PRCMU_AP_IDLE, true, true))</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* When we switch to retention, the prcmu is in charge</div><div class='add'>+		 * of recoupling the gic automatically */</div><div class='add'>+		recouple = false;</div><div class='add'>+</div><div class='add'>+		spin_unlock(&amp;master_lock);</div><div class='add'>+	}</div><div class='add'>+wfi:</div><div class='add'>+	cpu_do_idle();</div><div class='add'>+out:</div><div class='add'>+	atomic_dec(&amp;master);</div><div class='add'>+</div><div class='add'>+	if (recouple) {</div><div class='add'>+		prcmu_gic_recouple();</div><div class='add'>+		spin_unlock(&amp;master_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &amp;this_cpu);</div><div class='add'>+</div><div class='add'>+	return index;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct cpuidle_driver ux500_idle_driver = {</div><div class='add'>+	.name = "ux500_idle",</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.en_core_tk_irqen = 1,</div><div class='add'>+	.states = {</div><div class='add'>+		ARM_CPUIDLE_WFI_STATE,</div><div class='add'>+		{</div><div class='add'>+			.enter		  = ux500_enter_idle,</div><div class='add'>+			.exit_latency	  = 70,</div><div class='add'>+			.target_residency = 260,</div><div class='add'>+			.flags		  = CPUIDLE_FLAG_TIME_VALID,</div><div class='add'>+			.name		  = "ApIdle",</div><div class='add'>+			.desc		  = "ARM Retention",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.safe_state_index = 0,</div><div class='add'>+	.state_count = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For each cpu, setup the broadcast timer because we will</div><div class='add'>+ * need to migrate the timers for the states &gt;= ApIdle.</div><div class='add'>+ */</div><div class='add'>+static void ux500_setup_broadcast_timer(void *arg)</div><div class='add'>+{</div><div class='add'>+	int cpu = smp_processor_id();</div><div class='add'>+	clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &amp;cpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init ux500_idle_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret, cpu;</div><div class='add'>+	struct cpuidle_device *device;</div><div class='add'>+</div><div class='add'>+        /* Configure wake up reasons */</div><div class='add'>+	prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) |</div><div class='add'>+			     PRCMU_WAKEUP(ABB));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Configure the timer broadcast for each cpu, that must</div><div class='add'>+	 * be done from the cpu context, so we use a smp cross</div><div class='add'>+	 * call with 'on_each_cpu'.</div><div class='add'>+	 */</div><div class='add'>+	on_each_cpu(ux500_setup_broadcast_timer, NULL, 1);</div><div class='add'>+</div><div class='add'>+	ret = cpuidle_register_driver(&amp;ux500_idle_driver);</div><div class='add'>+	if (ret) {</div><div class='add'>+		printk(KERN_ERR "failed to register ux500 idle driver\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_online_cpu(cpu) {</div><div class='add'>+		device = &amp;per_cpu(ux500_cpuidle_device, cpu);</div><div class='add'>+		device-&gt;cpu = cpu;</div><div class='add'>+		ret = cpuidle_register_device(device);</div><div class='add'>+		if (ret) {</div><div class='add'>+			printk(KERN_ERR "Failed to register cpuidle "</div><div class='add'>+			       "device for cpu%d\n", cpu);</div><div class='add'>+			goto out_unregister;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+out_unregister:</div><div class='add'>+	for_each_online_cpu(cpu) {</div><div class='add'>+		device = &amp;per_cpu(ux500_cpuidle_device, cpu);</div><div class='add'>+		cpuidle_unregister_device(device);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpuidle_unregister_driver(&amp;ux500_idle_driver);</div><div class='add'>+	goto out;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+device_initcall(ux500_idle_init);</div><div class='head'>diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c<br/>index c5312a4b49f5..dfdd4a54668d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/devices-common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/devices-common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/devices-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/devices-common.c</a></div><div class='hunk'>@@ -11,7 +11,6 @@</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/amba/bus.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/gpio-nomadik.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -19,38 +18,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "devices-common.h"</div><div class='ctx'> </div><div class='del'>-struct amba_device *</div><div class='del'>-dbx500_add_amba_device(struct device *parent, const char *name,</div><div class='del'>-		       resource_size_t base, int irq, void *pdata,</div><div class='del'>-		       unsigned int periphid)</div><div class='del'>-{</div><div class='del'>-	struct amba_device *dev;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	dev = amba_device_alloc(name, base, SZ_4K);</div><div class='del'>-	if (!dev)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	dev-&gt;dma_mask = DMA_BIT_MASK(32);</div><div class='del'>-	dev-&gt;dev.coherent_dma_mask = DMA_BIT_MASK(32);</div><div class='del'>-</div><div class='del'>-	dev-&gt;irq[0] = irq;</div><div class='del'>-</div><div class='del'>-	dev-&gt;periphid = periphid;</div><div class='del'>-</div><div class='del'>-	dev-&gt;dev.platform_data = pdata;</div><div class='del'>-</div><div class='del'>-	dev-&gt;dev.parent = parent;</div><div class='del'>-</div><div class='del'>-	ret = amba_device_add(dev, &amp;iomem_resource);</div><div class='del'>-	if (ret) {</div><div class='del'>-		amba_device_put(dev);</div><div class='del'>-		return ERR_PTR(ret);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return dev;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct platform_device *</div><div class='ctx'> dbx500_add_gpio(struct device *parent, int id, resource_size_t addr, int irq,</div><div class='ctx'> 		struct nmk_gpio_platform_data *pdata)</div><div class='head'>diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h<br/>index 39c74ec82add..6e4706560266 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/devices-common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/devices-common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/devices-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/devices-common.h</a></div><div class='hunk'>@@ -11,12 +11,9 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/sys_soc.h&gt;</div><div class='add'>+#include &lt;linux/amba/bus.h&gt;</div><div class='ctx'> #include &lt;plat/i2c.h&gt;</div><div class='del'>-</div><div class='del'>-extern struct amba_device *</div><div class='del'>-dbx500_add_amba_device(struct device *parent, const char *name,</div><div class='del'>-		       resource_size_t base, int irq, void *pdata,</div><div class='del'>-		       unsigned int periphid);</div><div class='add'>+#include &lt;mach/crypto-ux500.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct spi_master_cntlr;</div><div class='ctx'> </div><div class='hunk'>@@ -25,8 +22,8 @@ dbx500_add_msp_spi(struct device *parent, const char *name,</div><div class='ctx'> 		   resource_size_t base, int irq,</div><div class='ctx'> 		   struct spi_master_cntlr *pdata)</div><div class='ctx'> {</div><div class='del'>-	return dbx500_add_amba_device(parent, name, base, irq,</div><div class='del'>-				      pdata, 0);</div><div class='add'>+	return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0,</div><div class='add'>+				   pdata, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline struct amba_device *</div><div class='hunk'>@@ -34,8 +31,8 @@ dbx500_add_spi(struct device *parent, const char *name, resource_size_t base,</div><div class='ctx'> 	       int irq, struct spi_master_cntlr *pdata,</div><div class='ctx'> 	       u32 periphid)</div><div class='ctx'> {</div><div class='del'>-	return dbx500_add_amba_device(parent, name, base, irq,</div><div class='del'>-				      pdata, periphid);</div><div class='add'>+	return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0,</div><div class='add'>+				   pdata, periphid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct mmci_platform_data;</div><div class='hunk'>@@ -44,8 +41,8 @@ static inline struct amba_device *</div><div class='ctx'> dbx500_add_sdi(struct device *parent, const char *name, resource_size_t base,</div><div class='ctx'> 	       int irq, struct mmci_platform_data *pdata, u32 periphid)</div><div class='ctx'> {</div><div class='del'>-	return dbx500_add_amba_device(parent, name, base, irq,</div><div class='del'>-				      pdata, periphid);</div><div class='add'>+	return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0,</div><div class='add'>+				   pdata, periphid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct amba_pl011_data;</div><div class='hunk'>@@ -54,7 +51,7 @@ static inline struct amba_device *</div><div class='ctx'> dbx500_add_uart(struct device *parent, const char *name, resource_size_t base,</div><div class='ctx'> 		int irq, struct amba_pl011_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	return dbx500_add_amba_device(parent, name, base, irq, pdata, 0);</div><div class='add'>+	return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0, pdata, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct nmk_i2c_controller;</div><div class='hunk'>@@ -85,7 +82,57 @@ dbx500_add_i2c(struct device *parent, int id, resource_size_t base, int irq,</div><div class='ctx'> static inline struct amba_device *</div><div class='ctx'> dbx500_add_rtc(struct device *parent, resource_size_t base, int irq)</div><div class='ctx'> {</div><div class='del'>-	return dbx500_add_amba_device(parent, "rtc-pl031", base, irq, NULL, 0);</div><div class='add'>+	return amba_apb_device_add(parent, "rtc-pl031", base, SZ_4K, irq,</div><div class='add'>+				0, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct cryp_platform_data;</div><div class='add'>+</div><div class='add'>+static inline struct platform_device *</div><div class='add'>+dbx500_add_cryp1(struct device *parent, int id, resource_size_t base, int irq,</div><div class='add'>+		struct cryp_platform_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct resource res[] = {</div><div class='add'>+			DEFINE_RES_MEM(base, SZ_4K),</div><div class='add'>+			DEFINE_RES_IRQ(irq),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	struct platform_device_info pdevinfo = {</div><div class='add'>+			.parent = parent,</div><div class='add'>+			.name = "cryp1",</div><div class='add'>+			.id = id,</div><div class='add'>+			.res = res,</div><div class='add'>+			.num_res = ARRAY_SIZE(res),</div><div class='add'>+			.data = pdata,</div><div class='add'>+			.size_data = sizeof(*pdata),</div><div class='add'>+			.dma_mask = DMA_BIT_MASK(32),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return platform_device_register_full(&amp;pdevinfo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct hash_platform_data;</div><div class='add'>+</div><div class='add'>+static inline struct platform_device *</div><div class='add'>+dbx500_add_hash1(struct device *parent, int id, resource_size_t base,</div><div class='add'>+		struct hash_platform_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct resource res[] = {</div><div class='add'>+			DEFINE_RES_MEM(base, SZ_4K),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	struct platform_device_info pdevinfo = {</div><div class='add'>+			.parent = parent,</div><div class='add'>+			.name = "hash1",</div><div class='add'>+			.id = id,</div><div class='add'>+			.res = res,</div><div class='add'>+			.num_res = ARRAY_SIZE(res),</div><div class='add'>+			.data = pdata,</div><div class='add'>+			.size_data = sizeof(*pdata),</div><div class='add'>+			.dma_mask = DMA_BIT_MASK(32),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return platform_device_register_full(&amp;pdevinfo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct nmk_gpio_platform_data;</div><div class='hunk'>@@ -93,4 +140,16 @@ struct nmk_gpio_platform_data;</div><div class='ctx'> void dbx500_add_gpios(struct device *parent, resource_size_t *base, int num,</div><div class='ctx'> 		      int irq, struct nmk_gpio_platform_data *pdata);</div><div class='ctx'> </div><div class='add'>+static inline void</div><div class='add'>+dbx500_add_pinctrl(struct device *parent, const char *name)</div><div class='add'>+{</div><div class='add'>+	struct platform_device_info pdevinfo = {</div><div class='add'>+		.parent = parent,</div><div class='add'>+		.name = name,</div><div class='add'>+		.id = -1,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	platform_device_register_full(&amp;pdevinfo);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/devices-db5500.h b/arch/arm/mach-ux500/devices-db5500.h<br/>deleted file mode 100644<br/>index e70955502c35..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/devices-db5500.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/devices-db5500.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,99 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- *</div><div class='del'>- * Author: Rabin Vincent &lt;rabin.vincent@stericsson.com&gt; for ST-Ericsson</div><div class='del'>- * License terms: GNU General Public License (GPL), version 2.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __DEVICES_DB5500_H</div><div class='del'>-#define __DEVICES_DB5500_H</div><div class='del'>-</div><div class='del'>-#include "devices-common.h"</div><div class='del'>-</div><div class='del'>-#define db5500_add_i2c1(parent, pdata) \</div><div class='del'>-	dbx500_add_i2c(parent, 1, U5500_I2C1_BASE, IRQ_DB5500_I2C1, pdata)</div><div class='del'>-#define db5500_add_i2c2(parent, pdata) \</div><div class='del'>-	dbx500_add_i2c(parent, 2, U5500_I2C2_BASE, IRQ_DB5500_I2C2, pdata)</div><div class='del'>-#define db5500_add_i2c3(parent, pdata) \</div><div class='del'>-	dbx500_add_i2c(parent, 3, U5500_I2C3_BASE, IRQ_DB5500_I2C3, pdata)</div><div class='del'>-</div><div class='del'>-#define db5500_add_msp0_spi(parent, pdata) \</div><div class='del'>-	dbx500_add_msp_spi(parent, "msp0", U5500_MSP0_BASE, \</div><div class='del'>-			   IRQ_DB5500_MSP0, pdata)</div><div class='del'>-#define db5500_add_msp1_spi(parent, pdata) \</div><div class='del'>-	dbx500_add_msp_spi(parent, "msp1", U5500_MSP1_BASE, \</div><div class='del'>-			   IRQ_DB5500_MSP1, pdata)</div><div class='del'>-#define db5500_add_msp2_spi(parent, pdata) \</div><div class='del'>-	dbx500_add_msp_spi(parent, "msp2", U5500_MSP2_BASE, \</div><div class='del'>-			   IRQ_DB5500_MSP2, pdata)</div><div class='del'>-</div><div class='del'>-#define db5500_add_msp0_spi(parent, pdata) \</div><div class='del'>-	dbx500_add_msp_spi(parent, "msp0", U5500_MSP0_BASE, \</div><div class='del'>-			  IRQ_DB5500_MSP0, pdata)</div><div class='del'>-#define db5500_add_msp1_spi(parent, pdata) \</div><div class='del'>-	dbx500_add_msp_spi(parent, "msp1", U5500_MSP1_BASE, \</div><div class='del'>-			  IRQ_DB5500_MSP1, pdata)</div><div class='del'>-#define db5500_add_msp2_spi(parent, pdata) \</div><div class='del'>-	dbx500_add_msp_spi(parent, "msp2", U5500_MSP2_BASE, \</div><div class='del'>-			  IRQ_DB5500_MSP2, pdata)</div><div class='del'>-</div><div class='del'>-#define db5500_add_rtc(parent) \</div><div class='del'>-	dbx500_add_rtc(parent, U5500_RTC_BASE, IRQ_DB5500_RTC);</div><div class='del'>-</div><div class='del'>-#define db5500_add_usb(parent, rx_cfg, tx_cfg) \</div><div class='del'>-	ux500_add_usb(parent, U5500_USBOTG_BASE, \</div><div class='del'>-		      IRQ_DB5500_USBOTG, rx_cfg, tx_cfg)</div><div class='del'>-</div><div class='del'>-#define db5500_add_sdi0(parent, pdata) \</div><div class='del'>-	dbx500_add_sdi(parent, "sdi0", U5500_SDI0_BASE, \</div><div class='del'>-		       IRQ_DB5500_SDMMC0, pdata,	\</div><div class='del'>-		       0x10480180)</div><div class='del'>-#define db5500_add_sdi1(parent, pdata) \</div><div class='del'>-	dbx500_add_sdi(parent, "sdi1", U5500_SDI1_BASE, \</div><div class='del'>-		       IRQ_DB5500_SDMMC1, pdata,	\</div><div class='del'>-		       0x10480180)</div><div class='del'>-#define db5500_add_sdi2(parent, pdata) \</div><div class='del'>-	dbx500_add_sdi(parent, "sdi2", U5500_SDI2_BASE, \</div><div class='del'>-		       IRQ_DB5500_SDMMC2, pdata		\</div><div class='del'>-		       0x10480180)</div><div class='del'>-#define db5500_add_sdi3(parent, pdata) \</div><div class='del'>-	dbx500_add_sdi(parent, "sdi3", U5500_SDI3_BASE, \</div><div class='del'>-		       IRQ_DB5500_SDMMC3, pdata		\</div><div class='del'>-		       0x10480180)</div><div class='del'>-#define db5500_add_sdi4(parent, pdata) \</div><div class='del'>-	dbx500_add_sdi(parent, "sdi4", U5500_SDI4_BASE, \</div><div class='del'>-		       IRQ_DB5500_SDMMC4, pdata		\</div><div class='del'>-		       0x10480180)</div><div class='del'>-</div><div class='del'>-/* This one has a bad peripheral ID in the U5500 silicon */</div><div class='del'>-#define db5500_add_spi0(parent, pdata) \</div><div class='del'>-	dbx500_add_spi(parent, "spi0", U5500_SPI0_BASE, \</div><div class='del'>-		       IRQ_DB5500_SPI0, pdata,		\</div><div class='del'>-		       0x10080023)</div><div class='del'>-#define db5500_add_spi1(parent, pdata) \</div><div class='del'>-	dbx500_add_spi(parent, "spi1", U5500_SPI1_BASE, \</div><div class='del'>-		       IRQ_DB5500_SPI1, pdata,		\</div><div class='del'>-		       0x10080023)</div><div class='del'>-#define db5500_add_spi2(parent, pdata) \</div><div class='del'>-	dbx500_add_spi(parent, "spi2", U5500_SPI2_BASE, \</div><div class='del'>-		       IRQ_DB5500_SPI2, pdata		\</div><div class='del'>-		       0x10080023)</div><div class='del'>-#define db5500_add_spi3(parent, pdata) \</div><div class='del'>-	dbx500_add_spi(parent, "spi3", U5500_SPI3_BASE, \</div><div class='del'>-		       IRQ_DB5500_SPI3, pdata		\</div><div class='del'>-		       0x10080023)</div><div class='del'>-</div><div class='del'>-#define db5500_add_uart0(parent, plat) \</div><div class='del'>-	dbx500_add_uart(parent, "uart0", U5500_UART0_BASE, \</div><div class='del'>-			IRQ_DB5500_UART0, plat)</div><div class='del'>-#define db5500_add_uart1(parent, plat) \</div><div class='del'>-	dbx500_add_uart(parent, "uart1", U5500_UART1_BASE, \</div><div class='del'>-			IRQ_DB5500_UART1, plat)</div><div class='del'>-#define db5500_add_uart2(parent, plat) \</div><div class='del'>-	dbx500_add_uart(parent, "uart2", U5500_UART2_BASE, \</div><div class='del'>-			IRQ_DB5500_UART2, plat)</div><div class='del'>-#define db5500_add_uart3(parent, plat) \</div><div class='del'>-	dbx500_add_uart(parent, "uart3", U5500_UART3_BASE, \</div><div class='del'>-			IRQ_DB5500_UART3, plat)</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c<br/>index 6e66d3777ed5..91754a8a0d49 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/devices-db8500.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/devices-db8500.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/devices-db8500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/devices-db8500.c</a></div><div class='hunk'>@@ -104,6 +104,8 @@ static const dma_addr_t dma40_tx_map[DB8500_DMA_NR_DEV] = {</div><div class='ctx'> 	[DB8500_DMA_DEV14_MSP2_TX] = U8500_MSP2_BASE + MSP_TX_RX_REG_OFFSET,</div><div class='ctx'> 	[DB8500_DMA_DEV30_MSP1_TX] = U8500_MSP1_BASE + MSP_TX_RX_REG_OFFSET,</div><div class='ctx'> 	[DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX] = U8500_MSP0_BASE + MSP_TX_RX_REG_OFFSET,</div><div class='add'>+	[DB8500_DMA_DEV48_CAC1_TX] = U8500_CRYP1_BASE + CRYP1_TX_REG_OFFSET,</div><div class='add'>+	[DB8500_DMA_DEV50_HAC1_TX] = U8500_HASH1_BASE + HASH1_TX_REG_OFFSET,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Mapping between source event lines and physical device address */</div><div class='hunk'>@@ -139,6 +141,7 @@ static const dma_addr_t dma40_rx_map[DB8500_DMA_NR_DEV] = {</div><div class='ctx'> 	[DB8500_DMA_DEV14_MSP2_RX] = U8500_MSP2_BASE + MSP_TX_RX_REG_OFFSET,</div><div class='ctx'> 	[DB8500_DMA_DEV30_MSP3_RX] = U8500_MSP3_BASE + MSP_TX_RX_REG_OFFSET,</div><div class='ctx'> 	[DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX] = U8500_MSP0_BASE + MSP_TX_RX_REG_OFFSET,</div><div class='add'>+	[DB8500_DMA_DEV48_CAC1_RX] = U8500_CRYP1_BASE + CRYP1_RX_REG_OFFSET,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Reserved event lines for memcpy only */</div><div class='head'>diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h<br/>index 9fd93e9da529..3c8010f4fb3f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/devices-db8500.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/devices-db8500.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/devices-db8500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/devices-db8500.h</a></div><div class='hunk'>@@ -31,10 +31,9 @@ static inline struct amba_device *</div><div class='ctx'> db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,</div><div class='ctx'> 	       int irq, struct pl022_ssp_controller *pdata)</div><div class='ctx'> {</div><div class='del'>-	return dbx500_add_amba_device(parent, name, base, irq, pdata, 0);</div><div class='add'>+	return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0, pdata, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #define db8500_add_i2c0(parent, pdata) \</div><div class='ctx'> 	dbx500_add_i2c(parent, 0, U8500_I2C0_BASE, IRQ_DB8500_I2C0, pdata)</div><div class='ctx'> #define db8500_add_i2c1(parent, pdata) \</div><div class='hunk'>@@ -46,15 +45,6 @@ db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,</div><div class='ctx'> #define db8500_add_i2c4(parent, pdata) \</div><div class='ctx'> 	dbx500_add_i2c(parent, 4, U8500_I2C4_BASE, IRQ_DB8500_I2C4, pdata)</div><div class='ctx'> </div><div class='del'>-#define db8500_add_msp0_i2s(parent, pdata) \</div><div class='del'>-	dbx500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0, pdata)</div><div class='del'>-#define db8500_add_msp1_i2s(parent, pdata) \</div><div class='del'>-	dbx500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1, pdata)</div><div class='del'>-#define db8500_add_msp2_i2s(parent, pdata) \</div><div class='del'>-	dbx500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2, pdata)</div><div class='del'>-#define db8500_add_msp3_i2s(parent, pdata) \</div><div class='del'>-	dbx500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1, pdata)</div><div class='del'>-</div><div class='ctx'> #define db8500_add_msp0_spi(parent, pdata) \</div><div class='ctx'> 	dbx500_add_msp_spi(parent, "msp0", U8500_MSP0_BASE, \</div><div class='ctx'> 			   IRQ_DB8500_MSP0, pdata)</div><div class='hunk'>@@ -124,4 +114,8 @@ db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,</div><div class='ctx'> 	dbx500_add_uart(parent, "uart2", U8500_UART2_BASE, \</div><div class='ctx'> 			IRQ_DB8500_UART2, pdata)</div><div class='ctx'> </div><div class='add'>+#define db8500_add_cryp1(parent, pdata) \</div><div class='add'>+	dbx500_add_cryp1(parent, -1, U8500_CRYP1_BASE, IRQ_DB8500_CRYP1, pdata)</div><div class='add'>+#define db8500_add_hash1(parent, pdata) \</div><div class='add'>+	dbx500_add_hash1(parent, -1, U8500_HASH1_BASE, pdata)</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/dma-db5500.c b/arch/arm/mach-ux500/dma-db5500.c<br/>deleted file mode 100644<br/>index 41e9470fa0e6..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/dma-db5500.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/dma-db5500.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,137 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- *</div><div class='del'>- * Author: Per Forlin &lt;per.forlin@stericsson.com&gt; for ST-Ericsson</div><div class='del'>- * Author: Jonas Aaberg &lt;jonas.aberg@stericsson.com&gt; for ST-Ericsson</div><div class='del'>- * Author: Rabin Vincent &lt;rabinv.vincent@stericsson.com&gt; for ST-Ericsson</div><div class='del'>- *</div><div class='del'>- * License terms: GNU General Public License (GPL), version 2</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;plat/ste_dma40.h&gt;</div><div class='del'>-#include &lt;mach/setup.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-#include "ste-dma40-db5500.h"</div><div class='del'>-</div><div class='del'>-static struct resource dma40_resources[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = U5500_DMA_BASE,</div><div class='del'>-		.end   = U5500_DMA_BASE + SZ_4K - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-		.name  = "base",</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = U5500_DMA_LCPA_BASE,</div><div class='del'>-		.end   = U5500_DMA_LCPA_BASE + 2 * SZ_1K - 1,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-		.name  = "lcpa",</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.start = IRQ_DB5500_DMA,</div><div class='del'>-		.end   = IRQ_DB5500_DMA,</div><div class='del'>-		.flags = IORESOURCE_IRQ</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Default configuration for physical memcpy */</div><div class='del'>-static struct stedma40_chan_cfg dma40_memcpy_conf_phy = {</div><div class='del'>-	.mode = STEDMA40_MODE_PHYSICAL,</div><div class='del'>-	.dir = STEDMA40_MEM_TO_MEM,</div><div class='del'>-</div><div class='del'>-	.src_info.data_width = STEDMA40_BYTE_WIDTH,</div><div class='del'>-	.src_info.psize = STEDMA40_PSIZE_PHY_1,</div><div class='del'>-	.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,</div><div class='del'>-</div><div class='del'>-	.dst_info.data_width = STEDMA40_BYTE_WIDTH,</div><div class='del'>-	.dst_info.psize = STEDMA40_PSIZE_PHY_1,</div><div class='del'>-	.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Default configuration for logical memcpy */</div><div class='del'>-static struct stedma40_chan_cfg dma40_memcpy_conf_log = {</div><div class='del'>-	.dir = STEDMA40_MEM_TO_MEM,</div><div class='del'>-</div><div class='del'>-	.src_info.data_width = STEDMA40_BYTE_WIDTH,</div><div class='del'>-	.src_info.psize = STEDMA40_PSIZE_LOG_1,</div><div class='del'>-	.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,</div><div class='del'>-</div><div class='del'>-	.dst_info.data_width = STEDMA40_BYTE_WIDTH,</div><div class='del'>-	.dst_info.psize = STEDMA40_PSIZE_LOG_1,</div><div class='del'>-	.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Mapping between soruce event lines and physical device address This was</div><div class='del'>- * created assuming that the event line is tied to a device and therefore the</div><div class='del'>- * address is constant, however this is not true for at least USB, and the</div><div class='del'>- * values are just placeholders for USB.  This table is preserved and used for</div><div class='del'>- * now.</div><div class='del'>- */</div><div class='del'>-static const dma_addr_t dma40_rx_map[DB5500_DMA_NR_DEV] = {</div><div class='del'>-	[DB5500_DMA_DEV24_SDMMC0_RX] = -1,</div><div class='del'>-	[DB5500_DMA_DEV38_USB_OTG_IEP_8] = -1,</div><div class='del'>-	[DB5500_DMA_DEV23_USB_OTG_IEP_7_15] = -1,</div><div class='del'>-	[DB5500_DMA_DEV22_USB_OTG_IEP_6_14] = -1,</div><div class='del'>-	[DB5500_DMA_DEV21_USB_OTG_IEP_5_13] = -1,</div><div class='del'>-	[DB5500_DMA_DEV20_USB_OTG_IEP_4_12] = -1,</div><div class='del'>-	[DB5500_DMA_DEV6_USB_OTG_IEP_3_11] = -1,</div><div class='del'>-	[DB5500_DMA_DEV5_USB_OTG_IEP_2_10] = -1,</div><div class='del'>-	[DB5500_DMA_DEV4_USB_OTG_IEP_1_9] = -1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Mapping between destination event lines and physical device address */</div><div class='del'>-static const dma_addr_t dma40_tx_map[DB5500_DMA_NR_DEV] = {</div><div class='del'>-	[DB5500_DMA_DEV24_SDMMC0_TX] = -1,</div><div class='del'>-	[DB5500_DMA_DEV38_USB_OTG_OEP_8] = -1,</div><div class='del'>-	[DB5500_DMA_DEV23_USB_OTG_OEP_7_15] = -1,</div><div class='del'>-	[DB5500_DMA_DEV22_USB_OTG_OEP_6_14] = -1,</div><div class='del'>-	[DB5500_DMA_DEV21_USB_OTG_OEP_5_13] = -1,</div><div class='del'>-	[DB5500_DMA_DEV20_USB_OTG_OEP_4_12] = -1,</div><div class='del'>-	[DB5500_DMA_DEV6_USB_OTG_OEP_3_11] = -1,</div><div class='del'>-	[DB5500_DMA_DEV5_USB_OTG_OEP_2_10] = -1,</div><div class='del'>-	[DB5500_DMA_DEV4_USB_OTG_OEP_1_9] = -1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int dma40_memcpy_event[] = {</div><div class='del'>-	DB5500_DMA_MEMCPY_TX_1,</div><div class='del'>-	DB5500_DMA_MEMCPY_TX_2,</div><div class='del'>-	DB5500_DMA_MEMCPY_TX_3,</div><div class='del'>-	DB5500_DMA_MEMCPY_TX_4,</div><div class='del'>-	DB5500_DMA_MEMCPY_TX_5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct stedma40_platform_data dma40_plat_data = {</div><div class='del'>-	.dev_len		= ARRAY_SIZE(dma40_rx_map),</div><div class='del'>-	.dev_rx			= dma40_rx_map,</div><div class='del'>-	.dev_tx			= dma40_tx_map,</div><div class='del'>-	.memcpy			= dma40_memcpy_event,</div><div class='del'>-	.memcpy_len		= ARRAY_SIZE(dma40_memcpy_event),</div><div class='del'>-	.memcpy_conf_phy	= &amp;dma40_memcpy_conf_phy,</div><div class='del'>-	.memcpy_conf_log	= &amp;dma40_memcpy_conf_log,</div><div class='del'>-	.disabled_channels	= {-1},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device dma40_device = {</div><div class='del'>-	.dev = {</div><div class='del'>-		.platform_data = &amp;dma40_plat_data,</div><div class='del'>-	},</div><div class='del'>-	.name		= "dma40",</div><div class='del'>-	.id		= 0,</div><div class='del'>-	.num_resources	= ARRAY_SIZE(dma40_resources),</div><div class='del'>-	.resource	= dma40_resources</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init db5500_dma_init(struct device *parent)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	dma40_device.dev.parent = parent;</div><div class='del'>-	ret = platform_device_register(&amp;dma40_device);</div><div class='del'>-	if (ret)</div><div class='del'>-		dev_err(&amp;dma40_device.dev, "unable to register device: %d\n", ret);</div><div class='del'>-</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/mach-ux500/id.c b/arch/arm/mach-ux500/id.c<br/>index 15a0f63b2e2b..d1579920139f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/id.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/id.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/id.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/id.c</a></div><div class='hunk'>@@ -23,7 +23,7 @@ static unsigned int ux500_read_asicid(phys_addr_t addr)</div><div class='ctx'> {</div><div class='ctx'> 	phys_addr_t base = addr &amp; ~0xfff;</div><div class='ctx'> 	struct map_desc desc = {</div><div class='del'>-		.virtual	= IO_ADDRESS(base),</div><div class='add'>+		.virtual	= UX500_VIRT_ROM,</div><div class='ctx'> 		.pfn		= __phys_to_pfn(base),</div><div class='ctx'> 		.length		= SZ_16K,</div><div class='ctx'> 		.type		= MT_DEVICE,</div><div class='hunk'>@@ -35,7 +35,7 @@ static unsigned int ux500_read_asicid(phys_addr_t addr)</div><div class='ctx'> 	local_flush_tlb_all();</div><div class='ctx'> 	flush_cache_all();</div><div class='ctx'> </div><div class='del'>-	return readl(__io_address(addr));</div><div class='add'>+	return readl(IOMEM(UX500_VIRT_ROM + (addr &amp; 0xfff)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ux500_print_soc_info(unsigned int asicid)</div><div class='hunk'>@@ -67,6 +67,7 @@ static unsigned int partnumber(unsigned int asicid)</div><div class='ctx'>  * DB8500v2	0x412fc091	0x9001DBF4		0x008500B0</div><div class='ctx'>  * DB8520v2.2	0x412fc091	0x9001DBF4		0x008500B2</div><div class='ctx'>  * DB5500v1	0x412fc091	0x9001FFF4		0x005500A0</div><div class='add'>+ * DB9540	0x413fc090	0xFFFFDBF4		0x009540xx</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> void __init ux500_map_io(void)</div><div class='hunk'>@@ -91,6 +92,10 @@ void __init ux500_map_io(void)</div><div class='ctx'> 		/* DB5500v1 */</div><div class='ctx'> 		addr = 0x9001FFF4;</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	case 0x413fc090: /* DB9540 */</div><div class='add'>+		addr = 0xFFFFDBF4;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (addr)</div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/crypto-ux500.h b/arch/arm/mach-ux500/include/mach/crypto-ux500.h<br/>new file mode 100644<br/>index 000000000000..5b2d0817e26a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/crypto-ux500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/crypto-ux500.h</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2011</div><div class='add'>+ *</div><div class='add'>+ * Author: Joakim Bech &lt;joakim.xx.bech@stericsson.com&gt; for ST-Ericsson</div><div class='add'>+ * License terms: GNU General Public License (GPL) version 2</div><div class='add'>+ */</div><div class='add'>+#ifndef _CRYPTO_UX500_H</div><div class='add'>+#define _CRYPTO_UX500_H</div><div class='add'>+#include &lt;linux/dmaengine.h&gt;</div><div class='add'>+#include &lt;plat/ste_dma40.h&gt;</div><div class='add'>+</div><div class='add'>+struct hash_platform_data {</div><div class='add'>+	void *mem_to_engine;</div><div class='add'>+	bool (*dma_filter)(struct dma_chan *chan, void *filter_param);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cryp_platform_data {</div><div class='add'>+	struct stedma40_chan_cfg mem_to_engine;</div><div class='add'>+	struct stedma40_chan_cfg engine_to_mem;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/db5500-regs.h b/arch/arm/mach-ux500/include/mach/db5500-regs.h<br/>deleted file mode 100644<br/>index 8e714bcb099f..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/db5500-regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/include/mach/db5500-regs.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,143 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- *</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_DB5500_REGS_H</div><div class='del'>-#define __MACH_DB5500_REGS_H</div><div class='del'>-</div><div class='del'>-#define U5500_PER1_BASE		0xA0020000</div><div class='del'>-#define U5500_PER2_BASE		0xA0010000</div><div class='del'>-#define U5500_PER3_BASE		0x80140000</div><div class='del'>-#define U5500_PER4_BASE		0x80150000</div><div class='del'>-#define U5500_PER5_BASE		0x80100000</div><div class='del'>-#define U5500_PER6_BASE		0x80120000</div><div class='del'>-</div><div class='del'>-#define U5500_GIC_DIST_BASE	0xA0411000</div><div class='del'>-#define U5500_GIC_CPU_BASE	0xA0410100</div><div class='del'>-#define U5500_DMA_BASE		0x90030000</div><div class='del'>-#define U5500_STM_BASE		0x90020000</div><div class='del'>-#define U5500_STM_REG_BASE	(U5500_STM_BASE + 0xF000)</div><div class='del'>-#define U5500_MCDE_BASE		0xA0400000</div><div class='del'>-#define U5500_MODEM_BASE	0xB0000000</div><div class='del'>-#define U5500_L2CC_BASE		0xA0412000</div><div class='del'>-#define U5500_SCU_BASE		0xA0410000</div><div class='del'>-#define U5500_DSI1_BASE		0xA0401000</div><div class='del'>-#define U5500_DSI2_BASE		0xA0402000</div><div class='del'>-#define U5500_SIA_BASE		0xA0100000</div><div class='del'>-#define U5500_SVA_BASE		0x80200000</div><div class='del'>-#define U5500_HSEM_BASE		0xA0000000</div><div class='del'>-#define U5500_NAND0_BASE	0x60000000</div><div class='del'>-#define U5500_NAND1_BASE	0x70000000</div><div class='del'>-#define U5500_TWD_BASE		0xa0410600</div><div class='del'>-#define U5500_ICN_BASE		0xA0040000</div><div class='del'>-#define U5500_B2R2_BASE		0xa0200000</div><div class='del'>-#define U5500_BOOT_ROM_BASE	0x90000000</div><div class='del'>-</div><div class='del'>-#define U5500_FSMC_BASE		(U5500_PER1_BASE + 0x0000)</div><div class='del'>-#define U5500_SDI0_BASE		(U5500_PER1_BASE + 0x1000)</div><div class='del'>-#define U5500_SDI2_BASE		(U5500_PER1_BASE + 0x2000)</div><div class='del'>-#define U5500_UART0_BASE	(U5500_PER1_BASE + 0x3000)</div><div class='del'>-#define U5500_I2C1_BASE		(U5500_PER1_BASE + 0x4000)</div><div class='del'>-#define U5500_MSP0_BASE		(U5500_PER1_BASE + 0x5000)</div><div class='del'>-#define U5500_GPIO0_BASE	(U5500_PER1_BASE + 0xE000)</div><div class='del'>-#define U5500_CLKRST1_BASE	(U5500_PER1_BASE + 0xF000)</div><div class='del'>-</div><div class='del'>-#define U5500_USBOTG_BASE	(U5500_PER2_BASE + 0x0000)</div><div class='del'>-#define U5500_GPIO1_BASE	(U5500_PER2_BASE + 0xE000)</div><div class='del'>-#define U5500_CLKRST2_BASE	(U5500_PER2_BASE + 0xF000)</div><div class='del'>-</div><div class='del'>-#define U5500_KEYPAD_BASE	(U5500_PER3_BASE + 0x0000)</div><div class='del'>-#define U5500_PWM_BASE		(U5500_PER3_BASE + 0x1000)</div><div class='del'>-#define U5500_GPIO3_BASE	(U5500_PER3_BASE + 0xE000)</div><div class='del'>-#define U5500_CLKRST3_BASE	(U5500_PER3_BASE + 0xF000)</div><div class='del'>-</div><div class='del'>-#define U5500_BACKUPRAM0_BASE	(U5500_PER4_BASE + 0x0000)</div><div class='del'>-#define U5500_BACKUPRAM1_BASE	(U5500_PER4_BASE + 0x1000)</div><div class='del'>-#define U5500_RTT0_BASE		(U5500_PER4_BASE + 0x2000)</div><div class='del'>-#define U5500_RTT1_BASE		(U5500_PER4_BASE + 0x3000)</div><div class='del'>-#define U5500_RTC_BASE		(U5500_PER4_BASE + 0x4000)</div><div class='del'>-#define U5500_SCR_BASE		(U5500_PER4_BASE + 0x5000)</div><div class='del'>-#define U5500_DMC_BASE		(U5500_PER4_BASE + 0x6000)</div><div class='del'>-#define U5500_PRCMU_BASE	(U5500_PER4_BASE + 0x7000)</div><div class='del'>-#define U5500_PRCMU_TIMER_3_BASE (U5500_PER4_BASE + 0x07338)</div><div class='del'>-#define U5500_PRCMU_TIMER_4_BASE (U5500_PER4_BASE + 0x07450)</div><div class='del'>-#define U5500_MSP1_BASE		(U5500_PER4_BASE + 0x9000)</div><div class='del'>-#define U5500_GPIO2_BASE	(U5500_PER4_BASE + 0xA000)</div><div class='del'>-#define U5500_MTIMER_BASE	(U5500_PER4_BASE + 0xC000)</div><div class='del'>-#define U5500_CDETECT_BASE	(U5500_PER4_BASE + 0xF000)</div><div class='del'>-#define U5500_PRCMU_TCDM_BASE	(U5500_PER4_BASE + 0x18000)</div><div class='del'>-#define U5500_PRCMU_TCPM_BASE	(U5500_PER4_BASE + 0x10000)</div><div class='del'>-#define U5500_TPIU_BASE		(U5500_PER4_BASE + 0x50000)</div><div class='del'>-</div><div class='del'>-#define U5500_SPI0_BASE		(U5500_PER5_BASE + 0x0000)</div><div class='del'>-#define U5500_SPI1_BASE		(U5500_PER5_BASE + 0x1000)</div><div class='del'>-#define U5500_SPI2_BASE		(U5500_PER5_BASE + 0x2000)</div><div class='del'>-#define U5500_SPI3_BASE		(U5500_PER5_BASE + 0x3000)</div><div class='del'>-#define U5500_UART1_BASE	(U5500_PER5_BASE + 0x4000)</div><div class='del'>-#define U5500_UART2_BASE	(U5500_PER5_BASE + 0x5000)</div><div class='del'>-#define U5500_UART3_BASE	(U5500_PER5_BASE + 0x6000)</div><div class='del'>-#define U5500_SDI1_BASE		(U5500_PER5_BASE + 0x7000)</div><div class='del'>-#define U5500_SDI3_BASE		(U5500_PER5_BASE + 0x8000)</div><div class='del'>-#define U5500_SDI4_BASE		(U5500_PER5_BASE + 0x9000)</div><div class='del'>-#define U5500_I2C2_BASE		(U5500_PER5_BASE + 0xA000)</div><div class='del'>-#define U5500_I2C3_BASE		(U5500_PER5_BASE + 0xB000)</div><div class='del'>-#define U5500_MSP2_BASE		(U5500_PER5_BASE + 0xC000)</div><div class='del'>-#define U5500_IRDA_BASE		(U5500_PER5_BASE + 0xD000)</div><div class='del'>-#define U5500_IRRC_BASE		(U5500_PER5_BASE + 0x10000)</div><div class='del'>-#define U5500_GPIO4_BASE	(U5500_PER5_BASE + 0x1E000)</div><div class='del'>-#define U5500_CLKRST5_BASE	(U5500_PER5_BASE + 0x1F000)</div><div class='del'>-</div><div class='del'>-#define U5500_RNG_BASE		(U5500_PER6_BASE + 0x0000)</div><div class='del'>-#define U5500_HASH0_BASE	(U5500_PER6_BASE + 0x1000)</div><div class='del'>-#define U5500_HASH1_BASE	(U5500_PER6_BASE + 0x2000)</div><div class='del'>-#define U5500_PKA_BASE		(U5500_PER6_BASE + 0x4000)</div><div class='del'>-#define U5500_PKAM_BASE		(U5500_PER6_BASE + 0x5100)</div><div class='del'>-#define U5500_MTU0_BASE		(U5500_PER6_BASE + 0x6000)</div><div class='del'>-#define U5500_MTU1_BASE		(U5500_PER6_BASE + 0x7000)</div><div class='del'>-#define U5500_CR_BASE		(U5500_PER6_BASE + 0x8000)</div><div class='del'>-#define U5500_CRYP0_BASE	(U5500_PER6_BASE + 0xA000)</div><div class='del'>-#define U5500_CRYP1_BASE	(U5500_PER6_BASE + 0xB000)</div><div class='del'>-#define U5500_CLKRST6_BASE	(U5500_PER6_BASE + 0xF000)</div><div class='del'>-</div><div class='del'>-#define U5500_GPIOBANK0_BASE	U5500_GPIO0_BASE</div><div class='del'>-#define U5500_GPIOBANK1_BASE	(U5500_GPIO0_BASE + 0x80)</div><div class='del'>-#define U5500_GPIOBANK2_BASE	U5500_GPIO1_BASE</div><div class='del'>-#define U5500_GPIOBANK3_BASE	U5500_GPIO2_BASE</div><div class='del'>-#define U5500_GPIOBANK4_BASE	U5500_GPIO3_BASE</div><div class='del'>-#define U5500_GPIOBANK5_BASE	U5500_GPIO4_BASE</div><div class='del'>-#define U5500_GPIOBANK6_BASE	(U5500_GPIO4_BASE + 0x80)</div><div class='del'>-#define U5500_GPIOBANK7_BASE	(U5500_GPIO4_BASE + 0x100)</div><div class='del'>-</div><div class='del'>-#define U5500_MBOX_BASE		(U5500_MODEM_BASE + 0xFFD1000)</div><div class='del'>-#define U5500_MBOX0_PEER_START	(U5500_MBOX_BASE + 0x40)</div><div class='del'>-#define U5500_MBOX0_PEER_END	(U5500_MBOX_BASE + 0x5F)</div><div class='del'>-#define U5500_MBOX0_LOCAL_START	(U5500_MBOX_BASE + 0x60)</div><div class='del'>-#define U5500_MBOX0_LOCAL_END	(U5500_MBOX_BASE + 0x7F)</div><div class='del'>-#define U5500_MBOX1_PEER_START	(U5500_MBOX_BASE + 0x80)</div><div class='del'>-#define U5500_MBOX1_PEER_END	(U5500_MBOX_BASE + 0x9F)</div><div class='del'>-#define U5500_MBOX1_LOCAL_START	(U5500_MBOX_BASE + 0xA0)</div><div class='del'>-#define U5500_MBOX1_LOCAL_END	(U5500_MBOX_BASE + 0xBF)</div><div class='del'>-#define U5500_MBOX2_PEER_START	(U5500_MBOX_BASE + 0x00)</div><div class='del'>-#define U5500_MBOX2_PEER_END	(U5500_MBOX_BASE + 0x1F)</div><div class='del'>-#define U5500_MBOX2_LOCAL_START	(U5500_MBOX_BASE + 0x20)</div><div class='del'>-#define U5500_MBOX2_LOCAL_END	(U5500_MBOX_BASE + 0x3F)</div><div class='del'>-</div><div class='del'>-#define U5500_ACCCON_BASE_SEC	(0xBFFF0000)</div><div class='del'>-#define U5500_ACCCON_BASE		(0xBFFF1000)</div><div class='del'>-#define U5500_ACCCON_CPUVEC_RESET_ADDR_OFFSET (0x00000020)</div><div class='del'>-#define U5500_ACCCON_ACC_CPU_CTRL_OFFSET (0x000000BC)</div><div class='del'>-#define U5500_INTCON_MBOX1_INT_RESET_ADDR	(0xBFFD31A4)</div><div class='del'>-</div><div class='del'>-#define U5500_ESRAM_BASE	        0x40000000</div><div class='del'>-#define U5500_ESRAM_DMA_LCPA_OFFSET	0x10000</div><div class='del'>-#define U5500_DMA_LCPA_BASE    (U5500_ESRAM_BASE + U5500_ESRAM_DMA_LCPA_OFFSET)</div><div class='del'>-</div><div class='del'>-#define U5500_MCDE_SIZE		0x1000</div><div class='del'>-#define U5500_DSI_LINK_SIZE	0x1000</div><div class='del'>-#define U5500_DSI_LINK_COUNT	0x2</div><div class='del'>-#define U5500_DSI_LINK1_BASE	(U5500_MCDE_BASE + U5500_MCDE_SIZE)</div><div class='del'>-#define U5500_DSI_LINK2_BASE	(U5500_DSI_LINK1_BASE + U5500_DSI_LINK_SIZE)</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h<br/>index 9ec20b96d8f2..1530d493879d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/db8500-regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/include/mach/db8500-regs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/db8500-regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/db8500-regs.h</a></div><div class='hunk'>@@ -41,6 +41,10 @@</div><div class='ctx'> /* ASIC ID is at 0xbf4 offset within this region */</div><div class='ctx'> #define U8500_ASIC_ID_BASE	0x9001D000</div><div class='ctx'> </div><div class='add'>+#define U9540_BOOT_ROM_BASE	0xFFFE0000</div><div class='add'>+/* ASIC ID is at 0xbf4 offset within this region */</div><div class='add'>+#define U9540_ASIC_ID_BASE	0xFFFFD000</div><div class='add'>+</div><div class='ctx'> #define U8500_PER6_BASE		0xa03c0000</div><div class='ctx'> #define U8500_PER7_BASE		0xa03d0000</div><div class='ctx'> #define U8500_PER5_BASE		0xa03e0000</div><div class='hunk'>@@ -96,7 +100,9 @@</div><div class='ctx'> #define U8500_SCR_BASE		(U8500_PER4_BASE + 0x05000)</div><div class='ctx'> #define U8500_DMC_BASE		(U8500_PER4_BASE + 0x06000)</div><div class='ctx'> #define U8500_PRCMU_BASE	(U8500_PER4_BASE + 0x07000)</div><div class='add'>+#define U9540_DMC1_BASE		(U8500_PER4_BASE + 0x0A000)</div><div class='ctx'> #define U8500_PRCMU_TCDM_BASE	(U8500_PER4_BASE + 0x68000)</div><div class='add'>+#define U9540_PRCMU_TCDM_BASE	(U8500_PER4_BASE + 0x6A000)</div><div class='ctx'> #define U8500_PRCMU_TCPM_BASE   (U8500_PER4_BASE + 0x60000)</div><div class='ctx'> #define U8500_PRCMU_TIMER_3_BASE (U8500_PER4_BASE + 0x07338)</div><div class='ctx'> #define U8500_PRCMU_TIMER_4_BASE (U8500_PER4_BASE + 0x07450)</div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S<br/>index 8d74d927d4e2..67035223334a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/debug-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/include/mach/debug-macro.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/debug-macro.S</a></div><div class='hunk'>@@ -20,10 +20,6 @@</div><div class='ctx'>  * built, so that there's some hint during the build that something is wrong.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_UX500_SOC_DB5500</div><div class='del'>-#define __UX500_UART(n)	U5500_UART##n##_BASE</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_UX500_SOC_DB8500</div><div class='ctx'> #define __UX500_UART(n)	U8500_UART##n##_BASE</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/devices.h b/arch/arm/mach-ux500/include/mach/devices.h<br/>index 5f6cb71fc62d..cbc6f1e4104d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/devices.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/include/mach/devices.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/devices.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/devices.h</a></div><div class='hunk'>@@ -10,11 +10,13 @@</div><div class='ctx'> struct platform_device;</div><div class='ctx'> struct amba_device;</div><div class='ctx'> </div><div class='del'>-extern struct platform_device u5500_gpio_devs[];</div><div class='ctx'> extern struct platform_device u8500_gpio_devs[];</div><div class='ctx'> </div><div class='ctx'> extern struct amba_device ux500_pl031_device;</div><div class='ctx'> </div><div class='add'>+extern struct platform_device ux500_hash1_device;</div><div class='add'>+extern struct platform_device ux500_cryp1_device;</div><div class='add'>+</div><div class='ctx'> extern struct platform_device u8500_dma40_device;</div><div class='ctx'> extern struct platform_device ux500_ske_keypad_device;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h<br/>index f84698936d36..28d16e744bfd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/hardware.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/include/mach/hardware.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/hardware.h</a></div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'>  */</div><div class='ctx'> #define U8500_IO_VIRTUAL	0xf0000000</div><div class='ctx'> #define U8500_IO_PHYSICAL	0xa0000000</div><div class='add'>+/* This is where we map in the ROM to check ASIC IDs */</div><div class='add'>+#define UX500_VIRT_ROM		0xf0000000</div><div class='ctx'> </div><div class='ctx'> /* This macro is used in assembly, so no cast */</div><div class='ctx'> #define IO_ADDRESS(x)           \</div><div class='hunk'>@@ -24,13 +26,16 @@</div><div class='ctx'> </div><div class='ctx'> /* typesafe io address */</div><div class='ctx'> #define __io_address(n)		IOMEM(IO_ADDRESS(n))</div><div class='add'>+</div><div class='ctx'> /* Used by some plat-nomadik code */</div><div class='ctx'> #define io_p2v(n)		__io_address(n)</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/db8500-regs.h&gt;</div><div class='del'>-#include &lt;mach/db5500-regs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define MSP_TX_RX_REG_OFFSET	0</div><div class='add'>+#define CRYP1_RX_REG_OFFSET	0x10</div><div class='add'>+#define CRYP1_TX_REG_OFFSET	0x8</div><div class='add'>+#define HASH1_TX_REG_OFFSET	0x4</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/id.h b/arch/arm/mach-ux500/include/mach/id.h<br/>index 833d6a6edc9b..c6e2db9e9e51 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/id.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/include/mach/id.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/id.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/id.h</a></div><div class='hunk'>@@ -41,6 +41,16 @@ static inline bool __attribute_const__ cpu_is_u8500(void)</div><div class='ctx'> 	return dbx500_partnumber() == 0x8500;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool __attribute_const__ cpu_is_u9540(void)</div><div class='add'>+{</div><div class='add'>+	return dbx500_partnumber() == 0x9540;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool cpu_is_u8500_family(void)</div><div class='add'>+{</div><div class='add'>+	return cpu_is_u8500() || cpu_is_u9540();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool __attribute_const__ cpu_is_u5500(void)</div><div class='ctx'> {</div><div class='ctx'> 	return dbx500_partnumber() == 0x5500;</div><div class='hunk'>@@ -111,7 +121,12 @@ static inline bool cpu_is_u8500v21(void)</div><div class='ctx'> </div><div class='ctx'> static inline bool cpu_is_u8500v20_or_later(void)</div><div class='ctx'> {</div><div class='del'>-	return cpu_is_u8500() &amp;&amp; !cpu_is_u8500v10() &amp;&amp; !cpu_is_u8500v11();</div><div class='add'>+	/*</div><div class='add'>+	 * U9540 has so much in common with U8500 that is is considered a</div><div class='add'>+	 * U8500 variant.</div><div class='add'>+	 */</div><div class='add'>+	return cpu_is_u9540() ||</div><div class='add'>+		(cpu_is_u8500() &amp;&amp; !cpu_is_u8500v10() &amp;&amp; !cpu_is_u8500v11());</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool ux500_is_svp(void)</div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/irqs-board-u5500.h b/arch/arm/mach-ux500/include/mach/irqs-board-u5500.h<br/>deleted file mode 100644<br/>index 29d972c7717b..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/irqs-board-u5500.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/include/mach/irqs-board-u5500.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,21 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- *</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_IRQS_BOARD_U5500_H</div><div class='del'>-#define __MACH_IRQS_BOARD_U5500_H</div><div class='del'>-</div><div class='del'>-#define AB5500_NR_IRQS		5</div><div class='del'>-#define IRQ_AB5500_BASE		IRQ_BOARD_START</div><div class='del'>-#define IRQ_AB5500_END		(IRQ_AB5500_BASE + AB5500_NR_IRQS)</div><div class='del'>-</div><div class='del'>-#define U5500_IRQ_END		IRQ_AB5500_END</div><div class='del'>-</div><div class='del'>-#if IRQ_BOARD_END &lt; U5500_IRQ_END</div><div class='del'>-#undef IRQ_BOARD_END</div><div class='del'>-#define IRQ_BOARD_END		U5500_IRQ_END</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/irqs-db5500.h b/arch/arm/mach-ux500/include/mach/irqs-db5500.h<br/>deleted file mode 100644<br/>index 77239776a6f2..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/irqs-db5500.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/include/mach/irqs-db5500.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,113 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- *</div><div class='del'>- * Author: Rabin Vincent &lt;rabin.vincent@stericsson.com&gt;</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_IRQS_DB5500_H</div><div class='del'>-#define __MACH_IRQS_DB5500_H</div><div class='del'>-</div><div class='del'>-#define IRQ_DB5500_MTU0			(IRQ_SHPI_START + 4)</div><div class='del'>-#define IRQ_DB5500_SPI2			(IRQ_SHPI_START + 6)</div><div class='del'>-#define IRQ_DB5500_PMU0			(IRQ_SHPI_START + 7)</div><div class='del'>-#define IRQ_DB5500_SPI0			(IRQ_SHPI_START + 8)</div><div class='del'>-#define IRQ_DB5500_RTT			(IRQ_SHPI_START + 9)</div><div class='del'>-#define IRQ_DB5500_PKA			(IRQ_SHPI_START + 10)</div><div class='del'>-#define IRQ_DB5500_UART0		(IRQ_SHPI_START + 11)</div><div class='del'>-#define IRQ_DB5500_I2C3			(IRQ_SHPI_START + 12)</div><div class='del'>-#define IRQ_DB5500_L2CC			(IRQ_SHPI_START + 13)</div><div class='del'>-#define IRQ_DB5500_MSP0			(IRQ_SHPI_START + 14)</div><div class='del'>-#define IRQ_DB5500_CRYP1		(IRQ_SHPI_START + 15)</div><div class='del'>-#define IRQ_DB5500_PMU1			(IRQ_SHPI_START + 16)</div><div class='del'>-#define IRQ_DB5500_MTU1			(IRQ_SHPI_START + 17)</div><div class='del'>-#define IRQ_DB5500_RTC			(IRQ_SHPI_START + 18)</div><div class='del'>-#define IRQ_DB5500_UART1		(IRQ_SHPI_START + 19)</div><div class='del'>-#define IRQ_DB5500_USB_WAKEUP		(IRQ_SHPI_START + 20)</div><div class='del'>-#define IRQ_DB5500_I2C0			(IRQ_SHPI_START + 21)</div><div class='del'>-#define IRQ_DB5500_I2C1			(IRQ_SHPI_START + 22)</div><div class='del'>-#define IRQ_DB5500_USBOTG		(IRQ_SHPI_START + 23)</div><div class='del'>-#define IRQ_DB5500_DMA_SECURE		(IRQ_SHPI_START + 24)</div><div class='del'>-#define IRQ_DB5500_DMA			(IRQ_SHPI_START + 25)</div><div class='del'>-#define IRQ_DB5500_UART2		(IRQ_SHPI_START + 26)</div><div class='del'>-#define IRQ_DB5500_ICN_PMU1		(IRQ_SHPI_START + 27)</div><div class='del'>-#define IRQ_DB5500_ICN_PMU2		(IRQ_SHPI_START + 28)</div><div class='del'>-#define IRQ_DB5500_UART3		(IRQ_SHPI_START + 29)</div><div class='del'>-#define IRQ_DB5500_SPI3			(IRQ_SHPI_START + 30)</div><div class='del'>-#define IRQ_DB5500_SDMMC4		(IRQ_SHPI_START + 31)</div><div class='del'>-#define IRQ_DB5500_IRRC			(IRQ_SHPI_START + 33)</div><div class='del'>-#define IRQ_DB5500_IRDA_FT		(IRQ_SHPI_START + 34)</div><div class='del'>-#define IRQ_DB5500_IRDA_SD		(IRQ_SHPI_START + 35)</div><div class='del'>-#define IRQ_DB5500_IRDA_FI		(IRQ_SHPI_START + 36)</div><div class='del'>-#define IRQ_DB5500_IRDA_FD		(IRQ_SHPI_START + 37)</div><div class='del'>-#define IRQ_DB5500_FSMC_CODEREADY	(IRQ_SHPI_START + 38)</div><div class='del'>-#define IRQ_DB5500_FSMC_NANDWAIT	(IRQ_SHPI_START + 39)</div><div class='del'>-#define IRQ_DB5500_AB5500		(IRQ_SHPI_START + 40)</div><div class='del'>-#define IRQ_DB5500_SDMMC2		(IRQ_SHPI_START + 41)</div><div class='del'>-#define IRQ_DB5500_SIA			(IRQ_SHPI_START + 42)</div><div class='del'>-#define IRQ_DB5500_SIA2			(IRQ_SHPI_START + 43)</div><div class='del'>-#define IRQ_DB5500_HVA			(IRQ_SHPI_START + 44)</div><div class='del'>-#define IRQ_DB5500_HVA2			(IRQ_SHPI_START + 45)</div><div class='del'>-#define IRQ_DB5500_PRCMU0		(IRQ_SHPI_START + 46)</div><div class='del'>-#define IRQ_DB5500_PRCMU1		(IRQ_SHPI_START + 47)</div><div class='del'>-#define IRQ_DB5500_DISP			(IRQ_SHPI_START + 48)</div><div class='del'>-#define IRQ_DB5500_SDMMC1		(IRQ_SHPI_START + 50)</div><div class='del'>-#define IRQ_DB5500_MSP1			(IRQ_SHPI_START + 52)</div><div class='del'>-#define IRQ_DB5500_KBD			(IRQ_SHPI_START + 53)</div><div class='del'>-#define IRQ_DB5500_I2C2			(IRQ_SHPI_START + 55)</div><div class='del'>-#define IRQ_DB5500_B2R2			(IRQ_SHPI_START + 56)</div><div class='del'>-#define IRQ_DB5500_CRYP0		(IRQ_SHPI_START + 57)</div><div class='del'>-#define IRQ_DB5500_SDMMC3		(IRQ_SHPI_START + 59)</div><div class='del'>-#define IRQ_DB5500_SDMMC0		(IRQ_SHPI_START + 60)</div><div class='del'>-#define IRQ_DB5500_HSEM			(IRQ_SHPI_START + 61)</div><div class='del'>-#define IRQ_DB5500_SBAG			(IRQ_SHPI_START + 63)</div><div class='del'>-#define IRQ_DB5500_MODEM		(IRQ_SHPI_START + 65)</div><div class='del'>-#define IRQ_DB5500_SPI1			(IRQ_SHPI_START + 96)</div><div class='del'>-#define IRQ_DB5500_MSP2			(IRQ_SHPI_START + 98)</div><div class='del'>-#define IRQ_DB5500_SRPTIMER		(IRQ_SHPI_START + 101)</div><div class='del'>-#define IRQ_DB5500_CTI0			(IRQ_SHPI_START + 108)</div><div class='del'>-#define IRQ_DB5500_CTI1			(IRQ_SHPI_START + 109)</div><div class='del'>-#define IRQ_DB5500_ICN_ERR		(IRQ_SHPI_START + 110)</div><div class='del'>-#define IRQ_DB5500_MALI_PPMMU		(IRQ_SHPI_START + 112)</div><div class='del'>-#define IRQ_DB5500_MALI_PP		(IRQ_SHPI_START + 113)</div><div class='del'>-#define IRQ_DB5500_MALI_GPMMU		(IRQ_SHPI_START + 114)</div><div class='del'>-#define IRQ_DB5500_MALI_GP		(IRQ_SHPI_START + 115)</div><div class='del'>-#define IRQ_DB5500_MALI			(IRQ_SHPI_START + 116)</div><div class='del'>-#define IRQ_DB5500_PRCMU_SEM		(IRQ_SHPI_START + 118)</div><div class='del'>-#define IRQ_DB5500_GPIO0		(IRQ_SHPI_START + 119)</div><div class='del'>-#define IRQ_DB5500_GPIO1		(IRQ_SHPI_START + 120)</div><div class='del'>-#define IRQ_DB5500_GPIO2		(IRQ_SHPI_START + 121)</div><div class='del'>-#define IRQ_DB5500_GPIO3		(IRQ_SHPI_START + 122)</div><div class='del'>-#define IRQ_DB5500_GPIO4		(IRQ_SHPI_START + 123)</div><div class='del'>-#define IRQ_DB5500_GPIO5		(IRQ_SHPI_START + 124)</div><div class='del'>-#define IRQ_DB5500_GPIO6		(IRQ_SHPI_START + 125)</div><div class='del'>-#define IRQ_DB5500_GPIO7		(IRQ_SHPI_START + 126)</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_UX500_SOC_DB5500</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * After the GPIO ones we reserve a range of IRQ:s in which virtual</div><div class='del'>- * IRQ:s representing modem IRQ:s can be allocated</div><div class='del'>- */</div><div class='del'>-#define IRQ_MODEM_EVENTS_BASE	IRQ_SOC_START</div><div class='del'>-#define IRQ_MODEM_EVENTS_NBR	72</div><div class='del'>-#define IRQ_MODEM_EVENTS_END	(IRQ_MODEM_EVENTS_BASE + IRQ_MODEM_EVENTS_NBR)</div><div class='del'>-</div><div class='del'>-/* List of virtual IRQ:s that are allocated from the range above */</div><div class='del'>-#define MBOX_PAIR0_VIRT_IRQ	(IRQ_MODEM_EVENTS_BASE + 43)</div><div class='del'>-#define MBOX_PAIR1_VIRT_IRQ	(IRQ_MODEM_EVENTS_BASE + 45)</div><div class='del'>-#define MBOX_PAIR2_VIRT_IRQ	(IRQ_MODEM_EVENTS_BASE + 41)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We may have several SoCs, but only one will run at a</div><div class='del'>- * time, so the one with most IRQs will bump this ahead,</div><div class='del'>- * but the IRQ_SOC_START remains the same for either SoC.</div><div class='del'>- */</div><div class='del'>-#if IRQ_SOC_END &lt; IRQ_MODEM_EVENTS_END</div><div class='del'>-#undef IRQ_SOC_END</div><div class='del'>-#define IRQ_SOC_END		IRQ_MODEM_EVENTS_END</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_UX500_SOC_DB5500 */</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h<br/>index c23a6b5f0c4e..e8928548b6a3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/irqs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/include/mach/irqs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/irqs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/irqs.h</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define IRQ_MTU0		(IRQ_SHPI_START + 4)</div><div class='ctx'> </div><div class='del'>-#define DBX500_NR_INTERNAL_IRQS		160</div><div class='add'>+#define DBX500_NR_INTERNAL_IRQS		166</div><div class='ctx'> </div><div class='ctx'> /* After chip-specific IRQ numbers we have the GPIO ones */</div><div class='ctx'> #define NOMADIK_NR_GPIO			288</div><div class='hunk'>@@ -36,7 +36,6 @@</div><div class='ctx'> /* This will be overridden by SoC-specific irq headers */</div><div class='ctx'> #define IRQ_SOC_END		IRQ_SOC_START</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/irqs-db5500.h&gt;</div><div class='ctx'> #include &lt;mach/irqs-db8500.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define IRQ_BOARD_START		IRQ_SOC_END</div><div class='hunk'>@@ -47,10 +46,6 @@</div><div class='ctx'> #include &lt;mach/irqs-board-mop500.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MACH_U5500</div><div class='del'>-#include &lt;mach/irqs-board-u5500.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define NR_IRQS			IRQ_BOARD_END</div><div class='ctx'> </div><div class='ctx'> #endif /* ASM_ARCH_IRQS_H */</div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/mbox-db5500.h b/arch/arm/mach-ux500/include/mach/mbox-db5500.h<br/>deleted file mode 100644<br/>index 7f9da4d2fbda..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/mbox-db5500.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/include/mach/mbox-db5500.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,88 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- * Author: Stefan Nilsson &lt;stefan.xk.nilsson@stericsson.com&gt; for ST-Ericsson.</div><div class='del'>- * Author: Martin Persson &lt;martin.persson@stericsson.com&gt; for ST-Ericsson.</div><div class='del'>- * License terms: GNU General Public License (GPL), version 2.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __INC_STE_MBOX_H</div><div class='del'>-#define __INC_STE_MBOX_H</div><div class='del'>-</div><div class='del'>-#define MBOX_BUF_SIZE 16</div><div class='del'>-#define MBOX_NAME_SIZE 8</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>-  * mbox_recv_cb_t - Definition of the mailbox callback.</div><div class='del'>-  * @mbox_msg:	The mailbox message.</div><div class='del'>-  * @priv:	The clients private data as specified in the call to mbox_setup.</div><div class='del'>-  *</div><div class='del'>-  * This function will be called upon reception of new mailbox messages.</div><div class='del'>-  */</div><div class='del'>-typedef void mbox_recv_cb_t (u32 mbox_msg, void *priv);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>-  * struct mbox - Mailbox instance struct</div><div class='del'>-  * @list:		Linked list head.</div><div class='del'>-  * @pdev:		Pointer to device struct.</div><div class='del'>-  * @cb:		Callback function. Will be called</div><div class='del'>-  *			when new data is received.</div><div class='del'>-  * @client_data:	Clients private data. Will be sent back</div><div class='del'>-  *			in the callback function.</div><div class='del'>-  * @virtbase_peer:	Virtual address for outgoing mailbox.</div><div class='del'>-  * @virtbase_local:	Virtual address for incoming mailbox.</div><div class='del'>-  * @buffer:		Then internal queue for outgoing messages.</div><div class='del'>-  * @name:		Name of this mailbox.</div><div class='del'>-  * @buffer_available:	Completion variable to achieve "blocking send".</div><div class='del'>-  *			This variable will be signaled when there is</div><div class='del'>-  *			internal buffer space available.</div><div class='del'>-  * @client_blocked:	To keep track if any client is currently</div><div class='del'>-  *			blocked.</div><div class='del'>-  * @lock:		Spinlock to protect this mailbox instance.</div><div class='del'>-  * @write_index:	Index in internal buffer to write to.</div><div class='del'>-  * @read_index:	Index in internal buffer to read from.</div><div class='del'>-  * @allocated:		Indicates whether this particular mailbox</div><div class='del'>-  *			id has been allocated by someone.</div><div class='del'>-  */</div><div class='del'>-struct mbox {</div><div class='del'>-	struct list_head list;</div><div class='del'>-	struct platform_device *pdev;</div><div class='del'>-	mbox_recv_cb_t *cb;</div><div class='del'>-	void *client_data;</div><div class='del'>-	void __iomem *virtbase_peer;</div><div class='del'>-	void __iomem *virtbase_local;</div><div class='del'>-	u32 buffer[MBOX_BUF_SIZE];</div><div class='del'>-	char name[MBOX_NAME_SIZE];</div><div class='del'>-	struct completion buffer_available;</div><div class='del'>-	u8 client_blocked;</div><div class='del'>-	spinlock_t lock;</div><div class='del'>-	u8 write_index;</div><div class='del'>-	u8 read_index;</div><div class='del'>-	bool allocated;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>-  * mbox_setup - Set up a mailbox and return its instance.</div><div class='del'>-  * @mbox_id:	The ID number of the mailbox. 0 or 1 for modem CPU,</div><div class='del'>-  *		2 for modem DSP.</div><div class='del'>-  * @mbox_cb:	Pointer to the callback function to be called when a new message</div><div class='del'>-  *		is received.</div><div class='del'>-  * @priv:	Client user data which will be returned in the callback.</div><div class='del'>-  *</div><div class='del'>-  * Returns a mailbox instance to be specified in subsequent calls to mbox_send.</div><div class='del'>-  */</div><div class='del'>-struct mbox *mbox_setup(u8 mbox_id, mbox_recv_cb_t *mbox_cb, void *priv);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>-  * mbox_send - Send a mailbox message.</div><div class='del'>-  * @mbox:	Mailbox instance (returned by mbox_setup)</div><div class='del'>-  * @mbox_msg:	The mailbox message to send.</div><div class='del'>-  * @block:	Specifies whether this call will block until send is possible,</div><div class='del'>-  *		or return an error if the mailbox buffer is full.</div><div class='del'>-  *</div><div class='del'>-  * Returns 0 on success or a negative error code on error. -ENOMEM indicates</div><div class='del'>-  * that the internal buffer is full and you have to try again later (or</div><div class='del'>-  * specify "block" in order to block until send is possible).</div><div class='del'>-  */</div><div class='del'>-int mbox_send(struct mbox *mbox, u32 mbox_msg, bool block);</div><div class='del'>-</div><div class='del'>-#endif /*INC_STE_MBOX_H*/</div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/msp.h b/arch/arm/mach-ux500/include/mach/msp.h<br/>new file mode 100644<br/>index 000000000000..798be19129ef<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/msp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/msp.h</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+ *</div><div class='add'>+ * Author: Rabin Vincent &lt;rabin.vincent@stericsson.com&gt; for ST-Ericsson</div><div class='add'>+ * License terms: GNU General Public License (GPL), version 2.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MSP_H</div><div class='add'>+#define __MSP_H</div><div class='add'>+</div><div class='add'>+#include &lt;plat/ste_dma40.h&gt;</div><div class='add'>+</div><div class='add'>+enum msp_i2s_id {</div><div class='add'>+	MSP_I2S_0 = 0,</div><div class='add'>+	MSP_I2S_1,</div><div class='add'>+	MSP_I2S_2,</div><div class='add'>+	MSP_I2S_3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Platform data structure for a MSP I2S-device */</div><div class='add'>+struct msp_i2s_platform_data {</div><div class='add'>+	enum msp_i2s_id id;</div><div class='add'>+	struct stedma40_chan_cfg *msp_i2s_dma_rx;</div><div class='add'>+	struct stedma40_chan_cfg *msp_i2s_dma_tx;</div><div class='add'>+	int (*msp_i2s_init) (void);</div><div class='add'>+	int (*msp_i2s_exit) (void);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/include/mach/setup.h<br/>index 3dc00ffa7bfa..8b7ed82a2866 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/setup.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/include/mach/setup.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/setup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/setup.h</a></div><div class='hunk'>@@ -15,17 +15,12 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> </div><div class='ctx'> void __init ux500_map_io(void);</div><div class='del'>-extern void __init u5500_map_io(void);</div><div class='ctx'> extern void __init u8500_map_io(void);</div><div class='ctx'> </div><div class='del'>-extern struct device * __init u5500_init_devices(void);</div><div class='ctx'> extern struct device * __init u8500_init_devices(void);</div><div class='ctx'> </div><div class='ctx'> extern void __init ux500_init_irq(void);</div><div class='del'>-</div><div class='del'>-extern void __init u5500_sdi_init(struct device *parent);</div><div class='del'>-</div><div class='del'>-extern void __init db5500_dma_init(struct device *parent);</div><div class='add'>+extern void __init ux500_init_late(void);</div><div class='ctx'> </div><div class='ctx'> extern struct device *ux500_soc_device_init(const char *soc_id);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h<br/>index 6fb3c4b0105d..34775baadaea 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/uncompress.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/include/mach/uncompress.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/include/mach/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/include/mach/uncompress.h</a></div><div class='hunk'>@@ -50,11 +50,8 @@ static void flush(void)</div><div class='ctx'> </div><div class='ctx'> static inline void arch_decomp_setup(void)</div><div class='ctx'> {</div><div class='del'>-	/* Check in run time if we run on an U8500 or U5500 */</div><div class='del'>-	if (machine_is_u5500())</div><div class='del'>-		ux500_uart_base = U5500_UART0_BASE;</div><div class='del'>-	else</div><div class='del'>-		ux500_uart_base = U8500_UART2_BASE;</div><div class='add'>+	/* Use machine_is_foo() macro if you need to switch base someday */</div><div class='add'>+	ux500_uart_base = U8500_UART2_BASE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define arch_decomp_wdog() /* nothing to do here */</div><div class='head'>diff --git a/arch/arm/mach-ux500/mbox-db5500.c b/arch/arm/mach-ux500/mbox-db5500.c<br/>deleted file mode 100644<br/>index 0127490218cd..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/mbox-db5500.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/mbox-db5500.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,565 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- * Author: Stefan Nilsson &lt;stefan.xk.nilsson@stericsson.com&gt; for ST-Ericsson.</div><div class='del'>- * Author: Martin Persson &lt;martin.persson@stericsson.com&gt; for ST-Ericsson.</div><div class='del'>- * License terms: GNU General Public License (GPL), version 2.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Mailbox nomenclature:</div><div class='del'>- *</div><div class='del'>- *       APE           MODEM</div><div class='del'>- *           mbox pairX</div><div class='del'>- *   ..........................</div><div class='del'>- *   .                       .</div><div class='del'>- *   .           peer        .</div><div class='del'>- *   .     send  ----        .</div><div class='del'>- *   .      --&gt;  |  |        .</div><div class='del'>- *   .           |  |        .</div><div class='del'>- *   .           ----        .</div><div class='del'>- *   .                       .</div><div class='del'>- *   .           local       .</div><div class='del'>- *   .     rec   ----        .</div><div class='del'>- *   .           |  | &lt;--    .</div><div class='del'>- *   .           |  |        .</div><div class='del'>- *   .           ----        .</div><div class='del'>- *   .........................</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;linux/completion.h&gt;</div><div class='del'>-#include &lt;mach/mbox-db5500.h&gt;</div><div class='del'>-</div><div class='del'>-#define MBOX_NAME "mbox"</div><div class='del'>-</div><div class='del'>-#define MBOX_FIFO_DATA        0x000</div><div class='del'>-#define MBOX_FIFO_ADD         0x004</div><div class='del'>-#define MBOX_FIFO_REMOVE      0x008</div><div class='del'>-#define MBOX_FIFO_THRES_FREE  0x00C</div><div class='del'>-#define MBOX_FIFO_THRES_OCCUP 0x010</div><div class='del'>-#define MBOX_FIFO_STATUS      0x014</div><div class='del'>-</div><div class='del'>-#define MBOX_DISABLE_IRQ 0x4</div><div class='del'>-#define MBOX_ENABLE_IRQ  0x0</div><div class='del'>-#define MBOX_LATCH 1</div><div class='del'>-</div><div class='del'>-/* Global list of all mailboxes */</div><div class='del'>-static struct list_head mboxs = LIST_HEAD_INIT(mboxs);</div><div class='del'>-</div><div class='del'>-static struct mbox *get_mbox_with_id(u8 id)</div><div class='del'>-{</div><div class='del'>-	u8 i;</div><div class='del'>-	struct list_head *pos = &amp;mboxs;</div><div class='del'>-	for (i = 0; i &lt;= id; i++)</div><div class='del'>-		pos = pos-&gt;next;</div><div class='del'>-</div><div class='del'>-	return (struct mbox *) list_entry(pos, struct mbox, list);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mbox_send(struct mbox *mbox, u32 mbox_msg, bool block)</div><div class='del'>-{</div><div class='del'>-	int res = 0;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;mbox-&gt;lock);</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-		"About to buffer 0x%X to mailbox 0x%X."</div><div class='del'>-		" ri = %d, wi = %d\n",</div><div class='del'>-		mbox_msg, (u32)mbox, mbox-&gt;read_index,</div><div class='del'>-		mbox-&gt;write_index);</div><div class='del'>-</div><div class='del'>-	/* Check if write buffer is full */</div><div class='del'>-	while (((mbox-&gt;write_index + 1) % MBOX_BUF_SIZE) == mbox-&gt;read_index) {</div><div class='del'>-		if (!block) {</div><div class='del'>-			dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-			"Buffer full in non-blocking call! "</div><div class='del'>-			"Returning -ENOMEM!\n");</div><div class='del'>-			res = -ENOMEM;</div><div class='del'>-			goto exit;</div><div class='del'>-		}</div><div class='del'>-		spin_unlock(&amp;mbox-&gt;lock);</div><div class='del'>-		dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-			"Buffer full in blocking call! Sleeping...\n");</div><div class='del'>-		mbox-&gt;client_blocked = 1;</div><div class='del'>-		wait_for_completion(&amp;mbox-&gt;buffer_available);</div><div class='del'>-		dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-			"Blocking send was woken up! Trying again...\n");</div><div class='del'>-		spin_lock(&amp;mbox-&gt;lock);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mbox-&gt;buffer[mbox-&gt;write_index] = mbox_msg;</div><div class='del'>-	mbox-&gt;write_index = (mbox-&gt;write_index + 1) % MBOX_BUF_SIZE;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Indicate that we want an IRQ as soon as there is a slot</div><div class='del'>-	 * in the FIFO</div><div class='del'>-	 */</div><div class='del'>-	writel(MBOX_ENABLE_IRQ, mbox-&gt;virtbase_peer + MBOX_FIFO_THRES_FREE);</div><div class='del'>-</div><div class='del'>-exit:</div><div class='del'>-	spin_unlock(&amp;mbox-&gt;lock);</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mbox_send);</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_DEBUG_FS)</div><div class='del'>-/*</div><div class='del'>- * Expected input: &lt;value&gt; &lt;nbr sends&gt;</div><div class='del'>- * Example: "echo 0xdeadbeef 4 &gt; mbox-node" sends 0xdeadbeef 4 times</div><div class='del'>- */</div><div class='del'>-static ssize_t mbox_write_fifo(struct device *dev,</div><div class='del'>-			       struct device_attribute *attr,</div><div class='del'>-			       const char *buf,</div><div class='del'>-			       size_t count)</div><div class='del'>-{</div><div class='del'>-	unsigned long mbox_mess;</div><div class='del'>-	unsigned long nbr_sends;</div><div class='del'>-	unsigned long i;</div><div class='del'>-	char int_buf[16];</div><div class='del'>-	char *token;</div><div class='del'>-	char *val;</div><div class='del'>-</div><div class='del'>-	struct mbox *mbox = (struct mbox *) dev-&gt;platform_data;</div><div class='del'>-</div><div class='del'>-	strncpy((char *) &amp;int_buf, buf, sizeof(int_buf));</div><div class='del'>-	token = (char *) &amp;int_buf;</div><div class='del'>-</div><div class='del'>-	/* Parse message */</div><div class='del'>-	val = strsep(&amp;token, " ");</div><div class='del'>-	if ((val == NULL) || (strict_strtoul(val, 16, &amp;mbox_mess) != 0))</div><div class='del'>-		mbox_mess = 0xDEADBEEF;</div><div class='del'>-</div><div class='del'>-	val = strsep(&amp;token, " ");</div><div class='del'>-	if ((val == NULL) || (strict_strtoul(val, 10, &amp;nbr_sends) != 0))</div><div class='del'>-		nbr_sends = 1;</div><div class='del'>-</div><div class='del'>-	dev_dbg(dev, "Will write 0x%lX %ld times using data struct at 0x%X\n",</div><div class='del'>-		mbox_mess, nbr_sends, (u32) mbox);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; nbr_sends; i++)</div><div class='del'>-		mbox_send(mbox, mbox_mess, true);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t mbox_read_fifo(struct device *dev,</div><div class='del'>-			      struct device_attribute *attr,</div><div class='del'>-			      char *buf)</div><div class='del'>-{</div><div class='del'>-	int mbox_value;</div><div class='del'>-	struct mbox *mbox = (struct mbox *) dev-&gt;platform_data;</div><div class='del'>-</div><div class='del'>-	if ((readl(mbox-&gt;virtbase_local + MBOX_FIFO_STATUS) &amp; 0x7) &lt;= 0)</div><div class='del'>-		return sprintf(buf, "Mailbox is empty\n");</div><div class='del'>-</div><div class='del'>-	mbox_value = readl(mbox-&gt;virtbase_local + MBOX_FIFO_DATA);</div><div class='del'>-	writel(MBOX_LATCH, (mbox-&gt;virtbase_local + MBOX_FIFO_REMOVE));</div><div class='del'>-</div><div class='del'>-	return sprintf(buf, "0x%X\n", mbox_value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DEVICE_ATTR(fifo, S_IWUSR | S_IRUGO, mbox_read_fifo, mbox_write_fifo);</div><div class='del'>-</div><div class='del'>-static int mbox_show(struct seq_file *s, void *data)</div><div class='del'>-{</div><div class='del'>-	struct list_head *pos;</div><div class='del'>-	u8 mbox_index = 0;</div><div class='del'>-</div><div class='del'>-	list_for_each(pos, &amp;mboxs) {</div><div class='del'>-		struct mbox *m =</div><div class='del'>-			(struct mbox *) list_entry(pos, struct mbox, list);</div><div class='del'>-		if (m == NULL) {</div><div class='del'>-			seq_printf(s,</div><div class='del'>-				   "Unable to retrieve mailbox %d\n",</div><div class='del'>-				   mbox_index);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		spin_lock(&amp;m-&gt;lock);</div><div class='del'>-		if ((m-&gt;virtbase_peer == NULL) || (m-&gt;virtbase_local == NULL)) {</div><div class='del'>-			seq_printf(s, "MAILBOX %d not setup or corrupt\n",</div><div class='del'>-				   mbox_index);</div><div class='del'>-			spin_unlock(&amp;m-&gt;lock);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		seq_printf(s,</div><div class='del'>-		"===========================\n"</div><div class='del'>-		" MAILBOX %d\n"</div><div class='del'>-		" PEER MAILBOX DUMP\n"</div><div class='del'>-		"---------------------------\n"</div><div class='del'>-		"FIFO:                 0x%X (%d)\n"</div><div class='del'>-		"Free     Threshold:   0x%.2X (%d)\n"</div><div class='del'>-		"Occupied Threshold:   0x%.2X (%d)\n"</div><div class='del'>-		"Status:               0x%.2X (%d)\n"</div><div class='del'>-		"   Free spaces  (ot):    %d (%d)\n"</div><div class='del'>-		"   Occup spaces (ot):    %d (%d)\n"</div><div class='del'>-		"===========================\n"</div><div class='del'>-		" LOCAL MAILBOX DUMP\n"</div><div class='del'>-		"---------------------------\n"</div><div class='del'>-		"FIFO:                 0x%.X (%d)\n"</div><div class='del'>-		"Free     Threshold:   0x%.2X (%d)\n"</div><div class='del'>-		"Occupied Threshold:   0x%.2X (%d)\n"</div><div class='del'>-		"Status:               0x%.2X (%d)\n"</div><div class='del'>-		"   Free spaces  (ot):    %d (%d)\n"</div><div class='del'>-		"   Occup spaces (ot):    %d (%d)\n"</div><div class='del'>-		"===========================\n"</div><div class='del'>-		"write_index: %d\n"</div><div class='del'>-		"read_index : %d\n"</div><div class='del'>-		"===========================\n"</div><div class='del'>-		"\n",</div><div class='del'>-		mbox_index,</div><div class='del'>-		readl(m-&gt;virtbase_peer + MBOX_FIFO_DATA),</div><div class='del'>-		readl(m-&gt;virtbase_peer + MBOX_FIFO_DATA),</div><div class='del'>-		readl(m-&gt;virtbase_peer + MBOX_FIFO_THRES_FREE),</div><div class='del'>-		readl(m-&gt;virtbase_peer + MBOX_FIFO_THRES_FREE),</div><div class='del'>-		readl(m-&gt;virtbase_peer + MBOX_FIFO_THRES_OCCUP),</div><div class='del'>-		readl(m-&gt;virtbase_peer + MBOX_FIFO_THRES_OCCUP),</div><div class='del'>-		readl(m-&gt;virtbase_peer + MBOX_FIFO_STATUS),</div><div class='del'>-		readl(m-&gt;virtbase_peer + MBOX_FIFO_STATUS),</div><div class='del'>-		(readl(m-&gt;virtbase_peer + MBOX_FIFO_STATUS) &gt;&gt; 4) &amp; 0x7,</div><div class='del'>-		(readl(m-&gt;virtbase_peer + MBOX_FIFO_STATUS) &gt;&gt; 7) &amp; 0x1,</div><div class='del'>-		(readl(m-&gt;virtbase_peer + MBOX_FIFO_STATUS) &gt;&gt; 0) &amp; 0x7,</div><div class='del'>-		(readl(m-&gt;virtbase_peer + MBOX_FIFO_STATUS) &gt;&gt; 3) &amp; 0x1,</div><div class='del'>-		readl(m-&gt;virtbase_local + MBOX_FIFO_DATA),</div><div class='del'>-		readl(m-&gt;virtbase_local + MBOX_FIFO_DATA),</div><div class='del'>-		readl(m-&gt;virtbase_local + MBOX_FIFO_THRES_FREE),</div><div class='del'>-		readl(m-&gt;virtbase_local + MBOX_FIFO_THRES_FREE),</div><div class='del'>-		readl(m-&gt;virtbase_local + MBOX_FIFO_THRES_OCCUP),</div><div class='del'>-		readl(m-&gt;virtbase_local + MBOX_FIFO_THRES_OCCUP),</div><div class='del'>-		readl(m-&gt;virtbase_local + MBOX_FIFO_STATUS),</div><div class='del'>-		readl(m-&gt;virtbase_local + MBOX_FIFO_STATUS),</div><div class='del'>-		(readl(m-&gt;virtbase_local + MBOX_FIFO_STATUS) &gt;&gt; 4) &amp; 0x7,</div><div class='del'>-		(readl(m-&gt;virtbase_local + MBOX_FIFO_STATUS) &gt;&gt; 7) &amp; 0x1,</div><div class='del'>-		(readl(m-&gt;virtbase_local + MBOX_FIFO_STATUS) &gt;&gt; 0) &amp; 0x7,</div><div class='del'>-		(readl(m-&gt;virtbase_local + MBOX_FIFO_STATUS) &gt;&gt; 3) &amp; 0x1,</div><div class='del'>-		m-&gt;write_index, m-&gt;read_index);</div><div class='del'>-		mbox_index++;</div><div class='del'>-		spin_unlock(&amp;m-&gt;lock);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mbox_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, mbox_show, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations mbox_operations = {</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-	.open = mbox_open,</div><div class='del'>-	.read = seq_read,</div><div class='del'>-	.llseek = seq_lseek,</div><div class='del'>-	.release = single_release,</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static irqreturn_t mbox_irq(int irq, void *arg)</div><div class='del'>-{</div><div class='del'>-	u32 mbox_value;</div><div class='del'>-	int nbr_occup;</div><div class='del'>-	int nbr_free;</div><div class='del'>-	struct mbox *mbox = (struct mbox *) arg;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;mbox-&gt;lock);</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-		"mbox IRQ [%d] received. ri = %d, wi = %d\n",</div><div class='del'>-		irq, mbox-&gt;read_index, mbox-&gt;write_index);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Check if we have any outgoing messages, and if there is space for</div><div class='del'>-	 * them in the FIFO.</div><div class='del'>-	 */</div><div class='del'>-	if (mbox-&gt;read_index != mbox-&gt;write_index) {</div><div class='del'>-		/*</div><div class='del'>-		 * Check by reading FREE for LOCAL since that indicates</div><div class='del'>-		 * OCCUP for PEER</div><div class='del'>-		 */</div><div class='del'>-		nbr_free = (readl(mbox-&gt;virtbase_local + MBOX_FIFO_STATUS)</div><div class='del'>-			    &gt;&gt; 4) &amp; 0x7;</div><div class='del'>-		dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-			"Status indicates %d empty spaces in the FIFO!\n",</div><div class='del'>-			nbr_free);</div><div class='del'>-</div><div class='del'>-		while ((nbr_free &gt; 0) &amp;&amp;</div><div class='del'>-		       (mbox-&gt;read_index != mbox-&gt;write_index)) {</div><div class='del'>-			/* Write the message and latch it into the FIFO */</div><div class='del'>-			writel(mbox-&gt;buffer[mbox-&gt;read_index],</div><div class='del'>-			       (mbox-&gt;virtbase_peer + MBOX_FIFO_DATA));</div><div class='del'>-			writel(MBOX_LATCH,</div><div class='del'>-			       (mbox-&gt;virtbase_peer + MBOX_FIFO_ADD));</div><div class='del'>-			dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-				"Wrote message 0x%X to addr 0x%X\n",</div><div class='del'>-				mbox-&gt;buffer[mbox-&gt;read_index],</div><div class='del'>-				(u32) (mbox-&gt;virtbase_peer + MBOX_FIFO_DATA));</div><div class='del'>-</div><div class='del'>-			nbr_free--;</div><div class='del'>-			mbox-&gt;read_index =</div><div class='del'>-				(mbox-&gt;read_index + 1) % MBOX_BUF_SIZE;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Check if we still want IRQ:s when there is free</div><div class='del'>-		 * space to send</div><div class='del'>-		 */</div><div class='del'>-		if (mbox-&gt;read_index != mbox-&gt;write_index) {</div><div class='del'>-			dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-				"Still have messages to send, but FIFO full. "</div><div class='del'>-				"Request IRQ again!\n");</div><div class='del'>-			writel(MBOX_ENABLE_IRQ,</div><div class='del'>-			       mbox-&gt;virtbase_peer + MBOX_FIFO_THRES_FREE);</div><div class='del'>-		} else {</div><div class='del'>-			dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-				"No more messages to send. "</div><div class='del'>-				"Do not request IRQ again!\n");</div><div class='del'>-			writel(MBOX_DISABLE_IRQ,</div><div class='del'>-			       mbox-&gt;virtbase_peer + MBOX_FIFO_THRES_FREE);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Check if we can signal any blocked clients that it is OK to</div><div class='del'>-		 * start buffering again</div><div class='del'>-		 */</div><div class='del'>-		if (mbox-&gt;client_blocked &amp;&amp;</div><div class='del'>-		    (((mbox-&gt;write_index + 1) % MBOX_BUF_SIZE)</div><div class='del'>-		     != mbox-&gt;read_index)) {</div><div class='del'>-			dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-				"Waking up blocked client\n");</div><div class='del'>-			complete(&amp;mbox-&gt;buffer_available);</div><div class='del'>-			mbox-&gt;client_blocked = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Check if we have any incoming messages */</div><div class='del'>-	nbr_occup = readl(mbox-&gt;virtbase_local + MBOX_FIFO_STATUS) &amp; 0x7;</div><div class='del'>-	if (nbr_occup == 0)</div><div class='del'>-		goto exit;</div><div class='del'>-</div><div class='del'>-	if (mbox-&gt;cb == NULL) {</div><div class='del'>-		dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev), "No receive callback registered, "</div><div class='del'>-			"leaving %d incoming messages in fifo!\n", nbr_occup);</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Read and acknowledge the message */</div><div class='del'>-	mbox_value = readl(mbox-&gt;virtbase_local + MBOX_FIFO_DATA);</div><div class='del'>-	writel(MBOX_LATCH, (mbox-&gt;virtbase_local + MBOX_FIFO_REMOVE));</div><div class='del'>-</div><div class='del'>-	/* Notify consumer of new mailbox message */</div><div class='del'>-	dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev), "Calling callback for message 0x%X!\n",</div><div class='del'>-		mbox_value);</div><div class='del'>-	mbox-&gt;cb(mbox_value, mbox-&gt;client_data);</div><div class='del'>-</div><div class='del'>-exit:</div><div class='del'>-	dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev), "Exit mbox IRQ. ri = %d, wi = %d\n",</div><div class='del'>-		mbox-&gt;read_index, mbox-&gt;write_index);</div><div class='del'>-	spin_unlock(&amp;mbox-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Setup is executed once for each mbox pair */</div><div class='del'>-struct mbox *mbox_setup(u8 mbox_id, mbox_recv_cb_t *mbox_cb, void *priv)</div><div class='del'>-{</div><div class='del'>-	struct resource *resource;</div><div class='del'>-	int irq;</div><div class='del'>-	int res;</div><div class='del'>-	struct mbox *mbox;</div><div class='del'>-</div><div class='del'>-	mbox = get_mbox_with_id(mbox_id);</div><div class='del'>-	if (mbox == NULL) {</div><div class='del'>-		dev_err(&amp;(mbox-&gt;pdev-&gt;dev), "Incorrect mailbox id: %d!\n",</div><div class='del'>-			mbox_id);</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Check if mailbox has been allocated to someone else,</div><div class='del'>-	 * otherwise allocate it</div><div class='del'>-	 */</div><div class='del'>-	if (mbox-&gt;allocated) {</div><div class='del'>-		dev_err(&amp;(mbox-&gt;pdev-&gt;dev), "Mailbox number %d is busy!\n",</div><div class='del'>-			mbox_id);</div><div class='del'>-		mbox = NULL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-	mbox-&gt;allocated = true;</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev), "Initiating mailbox number %d: 0x%X...\n",</div><div class='del'>-		mbox_id, (u32)mbox);</div><div class='del'>-</div><div class='del'>-	mbox-&gt;client_data = priv;</div><div class='del'>-	mbox-&gt;cb = mbox_cb;</div><div class='del'>-</div><div class='del'>-	/* Get addr for peer mailbox and ioremap it */</div><div class='del'>-	resource = platform_get_resource_byname(mbox-&gt;pdev,</div><div class='del'>-						IORESOURCE_MEM,</div><div class='del'>-						"mbox_peer");</div><div class='del'>-	if (resource == NULL) {</div><div class='del'>-		dev_err(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-			"Unable to retrieve mbox peer resource\n");</div><div class='del'>-		mbox = NULL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-	dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-		"Resource name: %s start: 0x%X, end: 0x%X\n",</div><div class='del'>-		resource-&gt;name, resource-&gt;start, resource-&gt;end);</div><div class='del'>-	mbox-&gt;virtbase_peer = ioremap(resource-&gt;start, resource_size(resource));</div><div class='del'>-	if (!mbox-&gt;virtbase_peer) {</div><div class='del'>-		dev_err(&amp;(mbox-&gt;pdev-&gt;dev), "Unable to ioremap peer mbox\n");</div><div class='del'>-		mbox = NULL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-	dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-		"ioremapped peer physical: (0x%X-0x%X) to virtual: 0x%X\n",</div><div class='del'>-		resource-&gt;start, resource-&gt;end, (u32) mbox-&gt;virtbase_peer);</div><div class='del'>-</div><div class='del'>-	/* Get addr for local mailbox and ioremap it */</div><div class='del'>-	resource = platform_get_resource_byname(mbox-&gt;pdev,</div><div class='del'>-						IORESOURCE_MEM,</div><div class='del'>-						"mbox_local");</div><div class='del'>-	if (resource == NULL) {</div><div class='del'>-		dev_err(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-			"Unable to retrieve mbox local resource\n");</div><div class='del'>-		mbox = NULL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-	dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-		"Resource name: %s start: 0x%X, end: 0x%X\n",</div><div class='del'>-		resource-&gt;name, resource-&gt;start, resource-&gt;end);</div><div class='del'>-	mbox-&gt;virtbase_local = ioremap(resource-&gt;start, resource_size(resource));</div><div class='del'>-	if (!mbox-&gt;virtbase_local) {</div><div class='del'>-		dev_err(&amp;(mbox-&gt;pdev-&gt;dev), "Unable to ioremap local mbox\n");</div><div class='del'>-		mbox = NULL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-	dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-		"ioremapped local physical: (0x%X-0x%X) to virtual: 0x%X\n",</div><div class='del'>-		resource-&gt;start, resource-&gt;end, (u32) mbox-&gt;virtbase_peer);</div><div class='del'>-</div><div class='del'>-	init_completion(&amp;mbox-&gt;buffer_available);</div><div class='del'>-	mbox-&gt;client_blocked = 0;</div><div class='del'>-</div><div class='del'>-	/* Get IRQ for mailbox and allocate it */</div><div class='del'>-	irq = platform_get_irq_byname(mbox-&gt;pdev, "mbox_irq");</div><div class='del'>-	if (irq &lt; 0) {</div><div class='del'>-		dev_err(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-			"Unable to retrieve mbox irq resource\n");</div><div class='del'>-		mbox = NULL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;(mbox-&gt;pdev-&gt;dev), "Allocating irq %d...\n", irq);</div><div class='del'>-	res = request_irq(irq, mbox_irq, 0, mbox-&gt;name, (void *) mbox);</div><div class='del'>-	if (res &lt; 0) {</div><div class='del'>-		dev_err(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-			"Unable to allocate mbox irq %d\n", irq);</div><div class='del'>-		mbox = NULL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set up mailbox to not launch IRQ on free space in mailbox */</div><div class='del'>-	writel(MBOX_DISABLE_IRQ, mbox-&gt;virtbase_peer + MBOX_FIFO_THRES_FREE);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set up mailbox to launch IRQ on new message if we have</div><div class='del'>-	 * a callback set. If not, do not raise IRQ, but keep message</div><div class='del'>-	 * in FIFO for manual retrieval</div><div class='del'>-	 */</div><div class='del'>-	if (mbox_cb != NULL)</div><div class='del'>-		writel(MBOX_ENABLE_IRQ,</div><div class='del'>-		       mbox-&gt;virtbase_local + MBOX_FIFO_THRES_OCCUP);</div><div class='del'>-	else</div><div class='del'>-		writel(MBOX_DISABLE_IRQ,</div><div class='del'>-		       mbox-&gt;virtbase_local + MBOX_FIFO_THRES_OCCUP);</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_DEBUG_FS)</div><div class='del'>-	res = device_create_file(&amp;(mbox-&gt;pdev-&gt;dev), &amp;dev_attr_fifo);</div><div class='del'>-	if (res != 0)</div><div class='del'>-		dev_warn(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-			 "Unable to create mbox sysfs entry");</div><div class='del'>-</div><div class='del'>-	(void) debugfs_create_file("mbox", S_IFREG | S_IRUGO, NULL,</div><div class='del'>-				   NULL, &amp;mbox_operations);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	dev_info(&amp;(mbox-&gt;pdev-&gt;dev),</div><div class='del'>-		 "Mailbox driver with index %d initiated!\n", mbox_id);</div><div class='del'>-</div><div class='del'>-exit:</div><div class='del'>-	return mbox;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mbox_setup);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-int __init mbox_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct mbox local_mbox;</div><div class='del'>-	struct mbox *mbox;</div><div class='del'>-	int res = 0;</div><div class='del'>-	dev_dbg(&amp;(pdev-&gt;dev), "Probing mailbox (pdev = 0x%X)...\n", (u32) pdev);</div><div class='del'>-</div><div class='del'>-	memset(&amp;local_mbox, 0x0, sizeof(struct mbox));</div><div class='del'>-</div><div class='del'>-	/* Associate our mbox data with the platform device */</div><div class='del'>-	res = platform_device_add_data(pdev,</div><div class='del'>-				       (void *) &amp;local_mbox,</div><div class='del'>-				       sizeof(struct mbox));</div><div class='del'>-	if (res != 0) {</div><div class='del'>-		dev_err(&amp;(pdev-&gt;dev),</div><div class='del'>-			"Unable to allocate driver platform data!\n");</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mbox = (struct mbox *) pdev-&gt;dev.platform_data;</div><div class='del'>-	mbox-&gt;pdev = pdev;</div><div class='del'>-	mbox-&gt;write_index = 0;</div><div class='del'>-	mbox-&gt;read_index = 0;</div><div class='del'>-</div><div class='del'>-	INIT_LIST_HEAD(&amp;(mbox-&gt;list));</div><div class='del'>-	list_add_tail(&amp;(mbox-&gt;list), &amp;mboxs);</div><div class='del'>-</div><div class='del'>-	sprintf(mbox-&gt;name, "%s", MBOX_NAME);</div><div class='del'>-	spin_lock_init(&amp;mbox-&gt;lock);</div><div class='del'>-</div><div class='del'>-	dev_info(&amp;(pdev-&gt;dev), "Mailbox driver loaded\n");</div><div class='del'>-</div><div class='del'>-exit:</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_driver mbox_driver = {</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = MBOX_NAME,</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mbox_init(void)</div><div class='del'>-{</div><div class='del'>-	return platform_driver_probe(&amp;mbox_driver, mbox_probe);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(mbox_init);</div><div class='del'>-</div><div class='del'>-void __exit mbox_exit(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;mbox_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_exit(mbox_exit);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("MBOX driver");</div><div class='head'>diff --git a/arch/arm/mach-ux500/modem-irq-db5500.c b/arch/arm/mach-ux500/modem-irq-db5500.c<br/>deleted file mode 100644<br/>index 6b86416c94c9..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/modem-irq-db5500.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/modem-irq-db5500.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,143 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- * Author: Stefan Nilsson &lt;stefan.xk.nilsson@stericsson.com&gt; for ST-Ericsson.</div><div class='del'>- * Author: Martin Persson &lt;martin.persson@stericsson.com&gt; for ST-Ericsson.</div><div class='del'>- * License terms: GNU General Public License (GPL), version 2.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/id.h&gt;</div><div class='del'>-</div><div class='del'>-#define MODEM_INTCON_BASE_ADDR 0xBFFD3000</div><div class='del'>-#define MODEM_INTCON_SIZE 0xFFF</div><div class='del'>-</div><div class='del'>-#define DEST_IRQ41_OFFSET 0x2A4</div><div class='del'>-#define DEST_IRQ43_OFFSET 0x2AC</div><div class='del'>-#define DEST_IRQ45_OFFSET 0x2B4</div><div class='del'>-</div><div class='del'>-#define PRIO_IRQ41_OFFSET 0x6A4</div><div class='del'>-#define PRIO_IRQ43_OFFSET 0x6AC</div><div class='del'>-#define PRIO_IRQ45_OFFSET 0x6B4</div><div class='del'>-</div><div class='del'>-#define ALLOW_IRQ_OFFSET 0x104</div><div class='del'>-</div><div class='del'>-#define MODEM_INTCON_CPU_NBR 0x1</div><div class='del'>-#define MODEM_INTCON_PRIO_HIGH 0x0</div><div class='del'>-</div><div class='del'>-#define MODEM_INTCON_ALLOW_IRQ41 0x0200</div><div class='del'>-#define MODEM_INTCON_ALLOW_IRQ43 0x0800</div><div class='del'>-#define MODEM_INTCON_ALLOW_IRQ45 0x2000</div><div class='del'>-</div><div class='del'>-#define MODEM_IRQ_REG_OFFSET 0x4</div><div class='del'>-</div><div class='del'>-struct modem_irq {</div><div class='del'>-	void __iomem *modem_intcon_base;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void setup_modem_intcon(void __iomem *modem_intcon_base)</div><div class='del'>-{</div><div class='del'>-	/* IC_DESTINATION_BASE_ARRAY - Which CPU to receive the IRQ */</div><div class='del'>-	writel(MODEM_INTCON_CPU_NBR, modem_intcon_base + DEST_IRQ41_OFFSET);</div><div class='del'>-	writel(MODEM_INTCON_CPU_NBR, modem_intcon_base + DEST_IRQ43_OFFSET);</div><div class='del'>-	writel(MODEM_INTCON_CPU_NBR, modem_intcon_base + DEST_IRQ45_OFFSET);</div><div class='del'>-</div><div class='del'>-	/* IC_PRIORITY_BASE_ARRAY - IRQ priority in modem IRQ controller */</div><div class='del'>-	writel(MODEM_INTCON_PRIO_HIGH, modem_intcon_base + PRIO_IRQ41_OFFSET);</div><div class='del'>-	writel(MODEM_INTCON_PRIO_HIGH, modem_intcon_base + PRIO_IRQ43_OFFSET);</div><div class='del'>-	writel(MODEM_INTCON_PRIO_HIGH, modem_intcon_base + PRIO_IRQ45_OFFSET);</div><div class='del'>-</div><div class='del'>-	/* IC_ALLOW_ARRAY - IRQ enable */</div><div class='del'>-	writel(MODEM_INTCON_ALLOW_IRQ41 |</div><div class='del'>-		   MODEM_INTCON_ALLOW_IRQ43 |</div><div class='del'>-		   MODEM_INTCON_ALLOW_IRQ45,</div><div class='del'>-		   modem_intcon_base + ALLOW_IRQ_OFFSET);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t modem_cpu_irq_handler(int irq, void *data)</div><div class='del'>-{</div><div class='del'>-	int real_irq;</div><div class='del'>-	int virt_irq;</div><div class='del'>-	struct modem_irq *mi = (struct modem_irq *)data;</div><div class='del'>-</div><div class='del'>-	/* Read modem side IRQ number from modem IRQ controller */</div><div class='del'>-	real_irq = readl(mi-&gt;modem_intcon_base + MODEM_IRQ_REG_OFFSET) &amp; 0xFF;</div><div class='del'>-	virt_irq = IRQ_MODEM_EVENTS_BASE + real_irq;</div><div class='del'>-</div><div class='del'>-	pr_debug("modem_irq: Worker read addr 0x%X and got value 0x%X "</div><div class='del'>-		 "which will be 0x%X (%d) which translates to "</div><div class='del'>-		 "virtual IRQ 0x%X (%d)!\n",</div><div class='del'>-		   (u32)mi-&gt;modem_intcon_base + MODEM_IRQ_REG_OFFSET,</div><div class='del'>-		   real_irq,</div><div class='del'>-		   real_irq &amp; 0xFF,</div><div class='del'>-		   real_irq &amp; 0xFF,</div><div class='del'>-		   virt_irq,</div><div class='del'>-		   virt_irq);</div><div class='del'>-</div><div class='del'>-	if (virt_irq != 0)</div><div class='del'>-		generic_handle_irq(virt_irq);</div><div class='del'>-</div><div class='del'>-	pr_debug("modem_irq: Done handling virtual IRQ %d!\n", virt_irq);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void create_virtual_irq(int irq, struct irq_chip *modem_irq_chip)</div><div class='del'>-{</div><div class='del'>-	irq_set_chip_and_handler(irq, modem_irq_chip, handle_simple_irq);</div><div class='del'>-	set_irq_flags(irq, IRQF_VALID);</div><div class='del'>-</div><div class='del'>-	pr_debug("modem_irq: Created virtual IRQ %d\n", irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int modem_irq_init(void)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	static struct irq_chip  modem_irq_chip;</div><div class='del'>-	struct modem_irq *mi;</div><div class='del'>-</div><div class='del'>-	if (!cpu_is_u5500())</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	pr_info("modem_irq: Set up IRQ handler for incoming modem IRQ %d\n",</div><div class='del'>-		   IRQ_DB5500_MODEM);</div><div class='del'>-</div><div class='del'>-	mi = kmalloc(sizeof(struct modem_irq), GFP_KERNEL);</div><div class='del'>-	if (!mi) {</div><div class='del'>-		pr_err("modem_irq: Could not allocate device\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mi-&gt;modem_intcon_base =</div><div class='del'>-		ioremap(MODEM_INTCON_BASE_ADDR, MODEM_INTCON_SIZE);</div><div class='del'>-	pr_debug("modem_irq: ioremapped modem_intcon_base from "</div><div class='del'>-		 "phy 0x%x to virt 0x%x\n", MODEM_INTCON_BASE_ADDR,</div><div class='del'>-		 (u32)mi-&gt;modem_intcon_base);</div><div class='del'>-</div><div class='del'>-	setup_modem_intcon(mi-&gt;modem_intcon_base);</div><div class='del'>-</div><div class='del'>-	modem_irq_chip = dummy_irq_chip;</div><div class='del'>-	modem_irq_chip.name = "modem_irq";</div><div class='del'>-</div><div class='del'>-	/* Create the virtual IRQ:s needed */</div><div class='del'>-	create_virtual_irq(MBOX_PAIR0_VIRT_IRQ, &amp;modem_irq_chip);</div><div class='del'>-	create_virtual_irq(MBOX_PAIR1_VIRT_IRQ, &amp;modem_irq_chip);</div><div class='del'>-	create_virtual_irq(MBOX_PAIR2_VIRT_IRQ, &amp;modem_irq_chip);</div><div class='del'>-</div><div class='del'>-	err = request_threaded_irq(IRQ_DB5500_MODEM, NULL,</div><div class='del'>-				   modem_cpu_irq_handler, IRQF_ONESHOT,</div><div class='del'>-				   "modem_irq", mi);</div><div class='del'>-	if (err)</div><div class='del'>-		pr_err("modem_irq: Could not register IRQ %d\n",</div><div class='del'>-		       IRQ_DB5500_MODEM);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-arch_initcall(modem_irq_init);</div><div class='head'>diff --git a/arch/arm/mach-ux500/pins-db5500.h b/arch/arm/mach-ux500/pins-db5500.h<br/>deleted file mode 100644<br/>index bf50c21fe69d..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/pins-db5500.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/pins-db5500.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,620 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- *</div><div class='del'>- * License terms: GNU General Public License, version 2</div><div class='del'>- * Author: Rabin Vincent &lt;rabin.vincent@stericsson.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MACH_DB5500_PINS_H</div><div class='del'>-#define __MACH_DB5500_PINS_H</div><div class='del'>-</div><div class='del'>-#define GPIO0_GPIO		PIN_CFG(0, GPIO)</div><div class='del'>-#define GPIO0_SM_CS3n		PIN_CFG(0, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO1_GPIO		PIN_CFG(1, GPIO)</div><div class='del'>-#define GPIO1_SM_A3		PIN_CFG(1, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO2_GPIO		PIN_CFG(2, GPIO)</div><div class='del'>-#define GPIO2_SM_A4		PIN_CFG(2, ALT_A)</div><div class='del'>-#define GPIO2_SM_AVD		PIN_CFG(2, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO3_GPIO		PIN_CFG(3, GPIO)</div><div class='del'>-#define GPIO3_I2C1_SCL		PIN_CFG(3, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO4_GPIO		PIN_CFG(4, GPIO)</div><div class='del'>-#define GPIO4_I2C1_SDA		PIN_CFG(4, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO5_GPIO		PIN_CFG(5, GPIO)</div><div class='del'>-#define GPIO5_MC0_DAT0		PIN_CFG(5, ALT_A)</div><div class='del'>-#define GPIO5_SM_ADQ8		PIN_CFG(5, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO6_GPIO		PIN_CFG(6, GPIO)</div><div class='del'>-#define GPIO6_MC0_DAT1		PIN_CFG(6, ALT_A)</div><div class='del'>-#define GPIO6_SM_ADQ0		PIN_CFG(6, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO7_GPIO		PIN_CFG(7, GPIO)</div><div class='del'>-#define GPIO7_MC0_DAT2		PIN_CFG(7, ALT_A)</div><div class='del'>-#define GPIO7_SM_ADQ9		PIN_CFG(7, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO8_GPIO		PIN_CFG(8, GPIO)</div><div class='del'>-#define GPIO8_MC0_DAT3		PIN_CFG(8, ALT_A)</div><div class='del'>-#define GPIO8_SM_ADQ1		PIN_CFG(8, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO9_GPIO		PIN_CFG(9, GPIO)</div><div class='del'>-#define GPIO9_MC0_DAT4		PIN_CFG(9, ALT_A)</div><div class='del'>-#define GPIO9_SM_ADQ10		PIN_CFG(9, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO10_GPIO		PIN_CFG(10, GPIO)</div><div class='del'>-#define GPIO10_MC0_DAT5		PIN_CFG(10, ALT_A)</div><div class='del'>-#define GPIO10_SM_ADQ2		PIN_CFG(10, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO11_GPIO		PIN_CFG(11, GPIO)</div><div class='del'>-#define GPIO11_MC0_DAT6		PIN_CFG(11, ALT_A)</div><div class='del'>-#define GPIO11_SM_ADQ11		PIN_CFG(11, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO12_GPIO		PIN_CFG(12, GPIO)</div><div class='del'>-#define GPIO12_MC0_DAT7		PIN_CFG(12, ALT_A)</div><div class='del'>-#define GPIO12_SM_ADQ3		PIN_CFG(12, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO13_GPIO		PIN_CFG(13, GPIO)</div><div class='del'>-#define GPIO13_MC0_CMD		PIN_CFG(13, ALT_A)</div><div class='del'>-#define GPIO13_SM_BUSY0n	PIN_CFG(13, ALT_B)</div><div class='del'>-#define GPIO13_SM_WAIT0n	PIN_CFG(13, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO14_GPIO		PIN_CFG(14, GPIO)</div><div class='del'>-#define GPIO14_MC0_CLK		PIN_CFG(14, ALT_A)</div><div class='del'>-#define GPIO14_SM_CS1n		PIN_CFG(14, ALT_B)</div><div class='del'>-#define GPIO14_SM_CKO		PIN_CFG(14, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO15_GPIO		PIN_CFG(15, GPIO)</div><div class='del'>-#define GPIO15_SM_A5		PIN_CFG(15, ALT_A)</div><div class='del'>-#define GPIO15_SM_CLE		PIN_CFG(15, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO16_GPIO		PIN_CFG(16, GPIO)</div><div class='del'>-#define GPIO16_MC2_CMD		PIN_CFG(16, ALT_A)</div><div class='del'>-#define GPIO16_SM_OEn		PIN_CFG(16, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO17_GPIO		PIN_CFG(17, GPIO)</div><div class='del'>-#define GPIO17_MC2_CLK		PIN_CFG(17, ALT_A)</div><div class='del'>-#define GPIO17_SM_WEn		PIN_CFG(17, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO18_GPIO		PIN_CFG(18, GPIO)</div><div class='del'>-#define GPIO18_SM_A6		PIN_CFG(18, ALT_A)</div><div class='del'>-#define GPIO18_SM_ALE		PIN_CFG(18, ALT_B)</div><div class='del'>-#define GPIO18_SM_AVDn		PIN_CFG(18, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO19_GPIO		PIN_CFG(19, GPIO)</div><div class='del'>-#define GPIO19_MC2_DAT1		PIN_CFG(19, ALT_A)</div><div class='del'>-#define GPIO19_SM_ADQ4		PIN_CFG(19, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO20_GPIO		PIN_CFG(20, GPIO)</div><div class='del'>-#define GPIO20_MC2_DAT3		PIN_CFG(20, ALT_A)</div><div class='del'>-#define GPIO20_SM_ADQ5		PIN_CFG(20, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO21_GPIO		PIN_CFG(21, GPIO)</div><div class='del'>-#define GPIO21_MC2_DAT5		PIN_CFG(21, ALT_A)</div><div class='del'>-#define GPIO21_SM_ADQ6		PIN_CFG(21, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO22_GPIO		PIN_CFG(22, GPIO)</div><div class='del'>-#define GPIO22_MC2_DAT7		PIN_CFG(22, ALT_A)</div><div class='del'>-#define GPIO22_SM_ADQ7		PIN_CFG(22, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO23_GPIO		PIN_CFG(23, GPIO)</div><div class='del'>-#define GPIO23_MC2_DAT0		PIN_CFG(23, ALT_A)</div><div class='del'>-#define GPIO23_SM_ADQ12		PIN_CFG(23, ALT_B)</div><div class='del'>-#define GPIO23_MC0_DAT1		PIN_CFG(23, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO24_GPIO		PIN_CFG(24, GPIO)</div><div class='del'>-#define GPIO24_MC2_DAT2		PIN_CFG(24, ALT_A)</div><div class='del'>-#define GPIO24_SM_ADQ13		PIN_CFG(24, ALT_B)</div><div class='del'>-#define GPIO24_MC0_DAT3		PIN_CFG(24, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO25_GPIO		PIN_CFG(25, GPIO)</div><div class='del'>-#define GPIO25_MC2_DAT4		PIN_CFG(25, ALT_A)</div><div class='del'>-#define GPIO25_SM_ADQ14		PIN_CFG(25, ALT_B)</div><div class='del'>-#define GPIO25_MC0_CMD		PIN_CFG(25, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO26_GPIO		PIN_CFG(26, GPIO)</div><div class='del'>-#define GPIO26_MC2_DAT6		PIN_CFG(26, ALT_A)</div><div class='del'>-#define GPIO26_SM_ADQ15		PIN_CFG(26, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO27_GPIO		PIN_CFG(27, GPIO)</div><div class='del'>-#define GPIO27_SM_CS0n		PIN_CFG(27, ALT_A)</div><div class='del'>-#define GPIO27_SM_PS0n		PIN_CFG(27, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO28_GPIO		PIN_CFG(28, GPIO)</div><div class='del'>-#define GPIO28_U0_TXD		PIN_CFG(28, ALT_A)</div><div class='del'>-#define GPIO28_SM_A0		PIN_CFG(28, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO29_GPIO		PIN_CFG(29, GPIO)</div><div class='del'>-#define GPIO29_U0_RXD		PIN_CFG(29, ALT_A)</div><div class='del'>-#define GPIO29_SM_A1		PIN_CFG(29, ALT_B)</div><div class='del'>-#define GPIO29_PWM_0		PIN_CFG(29, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO30_GPIO		PIN_CFG(30, GPIO)</div><div class='del'>-#define GPIO30_MC0_DAT5		PIN_CFG(30, ALT_A)</div><div class='del'>-#define GPIO30_SM_A2		PIN_CFG(30, ALT_B)</div><div class='del'>-#define GPIO30_PWM_1		PIN_CFG(30, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO31_GPIO		PIN_CFG(31, GPIO)</div><div class='del'>-#define GPIO31_MC0_DAT7		PIN_CFG(31, ALT_A)</div><div class='del'>-#define GPIO31_SM_CS2n		PIN_CFG(31, ALT_B)</div><div class='del'>-#define GPIO31_PWM_2		PIN_CFG(31, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO32_GPIO		PIN_CFG(32, GPIO)</div><div class='del'>-#define GPIO32_MSP0_TCK		PIN_CFG(32, ALT_A)</div><div class='del'>-#define GPIO32_ACCI2S0_SCK	PIN_CFG(32, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO33_GPIO		PIN_CFG(33, GPIO)</div><div class='del'>-#define GPIO33_MSP0_TFS		PIN_CFG(33, ALT_A)</div><div class='del'>-#define GPIO33_ACCI2S0_WS	PIN_CFG(33, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO34_GPIO		PIN_CFG(34, GPIO)</div><div class='del'>-#define GPIO34_MSP0_TXD		PIN_CFG(34, ALT_A)</div><div class='del'>-#define GPIO34_ACCI2S0_DLD	PIN_CFG(34, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO35_GPIO		PIN_CFG(35, GPIO)</div><div class='del'>-#define GPIO35_MSP0_RXD		PIN_CFG(35, ALT_A)</div><div class='del'>-#define GPIO35_ACCI2S0_ULD	PIN_CFG(35, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO64_GPIO		PIN_CFG(64, GPIO)</div><div class='del'>-#define GPIO64_USB_DAT0		PIN_CFG(64, ALT_A)</div><div class='del'>-#define GPIO64_U0_TXD		PIN_CFG(64, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO65_GPIO		PIN_CFG(65, GPIO)</div><div class='del'>-#define GPIO65_USB_DAT1		PIN_CFG(65, ALT_A)</div><div class='del'>-#define GPIO65_U0_RXD		PIN_CFG(65, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO66_GPIO		PIN_CFG(66, GPIO)</div><div class='del'>-#define GPIO66_USB_DAT2		PIN_CFG(66, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO67_GPIO		PIN_CFG(67, GPIO)</div><div class='del'>-#define GPIO67_USB_DAT3		PIN_CFG(67, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO68_GPIO		PIN_CFG(68, GPIO)</div><div class='del'>-#define GPIO68_USB_DAT4		PIN_CFG(68, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO69_GPIO		PIN_CFG(69, GPIO)</div><div class='del'>-#define GPIO69_USB_DAT5		PIN_CFG(69, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO70_GPIO		PIN_CFG(70, GPIO)</div><div class='del'>-#define GPIO70_USB_DAT6		PIN_CFG(70, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO71_GPIO		PIN_CFG(71, GPIO)</div><div class='del'>-#define GPIO71_USB_DAT7		PIN_CFG(71, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO72_GPIO		PIN_CFG(72, GPIO)</div><div class='del'>-#define GPIO72_USB_STP		PIN_CFG(72, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO73_GPIO		PIN_CFG(73, GPIO)</div><div class='del'>-#define GPIO73_USB_DIR		PIN_CFG(73, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO74_GPIO		PIN_CFG(74, GPIO)</div><div class='del'>-#define GPIO74_USB_NXT		PIN_CFG(74, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO75_GPIO		PIN_CFG(75, GPIO)</div><div class='del'>-#define GPIO75_USB_XCLK		PIN_CFG(75, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO76_GPIO		PIN_CFG(76, GPIO)</div><div class='del'>-</div><div class='del'>-#define GPIO77_GPIO		PIN_CFG(77, GPIO)</div><div class='del'>-#define GPIO77_ACCTX_ON		PIN_CFG(77, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO78_GPIO		PIN_CFG(78, GPIO)</div><div class='del'>-#define GPIO78_IRQn		PIN_CFG(78, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO79_GPIO		PIN_CFG(79, GPIO)</div><div class='del'>-#define GPIO79_ACCSIM_Clk	PIN_CFG(79, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO80_GPIO		PIN_CFG(80, GPIO)</div><div class='del'>-#define GPIO80_ACCSIM_Da	PIN_CFG(80, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO81_GPIO		PIN_CFG(81, GPIO)</div><div class='del'>-#define GPIO81_ACCSIM_Reset	PIN_CFG(81, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO82_GPIO		PIN_CFG(82, GPIO)</div><div class='del'>-#define GPIO82_ACCSIM_DDir	PIN_CFG(82, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO96_GPIO		PIN_CFG(96, GPIO)</div><div class='del'>-#define GPIO96_MSP1_TCK		PIN_CFG(96, ALT_A)</div><div class='del'>-#define GPIO96_PRCMU_DEBUG3	PIN_CFG(96, ALT_B)</div><div class='del'>-#define GPIO96_PRCMU_DEBUG7	PIN_CFG(96, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO97_GPIO		PIN_CFG(97, GPIO)</div><div class='del'>-#define GPIO97_MSP1_TFS		PIN_CFG(97, ALT_A)</div><div class='del'>-#define GPIO97_PRCMU_DEBUG2	PIN_CFG(97, ALT_B)</div><div class='del'>-#define GPIO97_PRCMU_DEBUG6	PIN_CFG(97, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO98_GPIO		PIN_CFG(98, GPIO)</div><div class='del'>-#define GPIO98_MSP1_TXD		PIN_CFG(98, ALT_A)</div><div class='del'>-#define GPIO98_PRCMU_DEBUG1	PIN_CFG(98, ALT_B)</div><div class='del'>-#define GPIO98_PRCMU_DEBUG5	PIN_CFG(98, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO99_GPIO		PIN_CFG(99, GPIO)</div><div class='del'>-#define GPIO99_MSP1_RXD		PIN_CFG(99, ALT_A)</div><div class='del'>-#define GPIO99_PRCMU_DEBUG0	PIN_CFG(99, ALT_B)</div><div class='del'>-#define GPIO99_PRCMU_DEBUG4	PIN_CFG(99, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO100_GPIO		PIN_CFG(100, GPIO)</div><div class='del'>-#define GPIO100_I2C0_SCL	PIN_CFG(100, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO101_GPIO		PIN_CFG(101, GPIO)</div><div class='del'>-#define GPIO101_I2C0_SDA	PIN_CFG(101, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO128_GPIO		PIN_CFG(128, GPIO)</div><div class='del'>-#define GPIO128_KP_I0		PIN_CFG(128, ALT_A)</div><div class='del'>-#define GPIO128_BUSMON_D0	PIN_CFG(128, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO129_GPIO		PIN_CFG(129, GPIO)</div><div class='del'>-#define GPIO129_KP_O0		PIN_CFG(129, ALT_A)</div><div class='del'>-#define GPIO129_BUSMON_D1	PIN_CFG(129, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO130_GPIO		PIN_CFG(130, GPIO)</div><div class='del'>-#define GPIO130_KP_I1		PIN_CFG(130, ALT_A)</div><div class='del'>-#define GPIO130_BUSMON_D2	PIN_CFG(130, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO131_GPIO		PIN_CFG(131, GPIO)</div><div class='del'>-#define GPIO131_KP_O1		PIN_CFG(131, ALT_A)</div><div class='del'>-#define GPIO131_BUSMON_D3	PIN_CFG(131, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO132_GPIO		PIN_CFG(132, GPIO)</div><div class='del'>-#define GPIO132_KP_I2		PIN_CFG(132, ALT_A)</div><div class='del'>-#define GPIO132_ETM_D15		PIN_CFG(132, ALT_B)</div><div class='del'>-#define GPIO132_STMAPE_CLK	PIN_CFG(132, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO133_GPIO		PIN_CFG(133, GPIO)</div><div class='del'>-#define GPIO133_KP_O2		PIN_CFG(133, ALT_A)</div><div class='del'>-#define GPIO133_ETM_D14		PIN_CFG(133, ALT_B)</div><div class='del'>-#define GPIO133_U0_RXD		PIN_CFG(133, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO134_GPIO		PIN_CFG(134, GPIO)</div><div class='del'>-#define GPIO134_KP_I3		PIN_CFG(134, ALT_A)</div><div class='del'>-#define GPIO134_ETM_D13		PIN_CFG(134, ALT_B)</div><div class='del'>-#define GPIO134_STMAPE_DAT0	PIN_CFG(134, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO135_GPIO		PIN_CFG(135, GPIO)</div><div class='del'>-#define GPIO135_KP_O3		PIN_CFG(135, ALT_A)</div><div class='del'>-#define GPIO135_ETM_D12		PIN_CFG(135, ALT_B)</div><div class='del'>-#define GPIO135_STMAPE_DAT1	PIN_CFG(135, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO136_GPIO		PIN_CFG(136, GPIO)</div><div class='del'>-#define GPIO136_KP_I4		PIN_CFG(136, ALT_A)</div><div class='del'>-#define GPIO136_ETM_D11		PIN_CFG(136, ALT_B)</div><div class='del'>-#define GPIO136_STMAPE_DAT2	PIN_CFG(136, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO137_GPIO		PIN_CFG(137, GPIO)</div><div class='del'>-#define GPIO137_KP_O4		PIN_CFG(137, ALT_A)</div><div class='del'>-#define GPIO137_ETM_D10		PIN_CFG(137, ALT_B)</div><div class='del'>-#define GPIO137_STMAPE_DAT3	PIN_CFG(137, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO138_GPIO		PIN_CFG(138, GPIO)</div><div class='del'>-#define GPIO138_KP_I5		PIN_CFG(138, ALT_A)</div><div class='del'>-#define GPIO138_ETM_D9		PIN_CFG(138, ALT_B)</div><div class='del'>-#define GPIO138_U0_TXD		PIN_CFG(138, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO139_GPIO		PIN_CFG(139, GPIO)</div><div class='del'>-#define GPIO139_KP_O5		PIN_CFG(139, ALT_A)</div><div class='del'>-#define GPIO139_ETM_D8		PIN_CFG(139, ALT_B)</div><div class='del'>-#define GPIO139_BUSMON_D11	PIN_CFG(139, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO140_GPIO		PIN_CFG(140, GPIO)</div><div class='del'>-#define GPIO140_KP_I6		PIN_CFG(140, ALT_A)</div><div class='del'>-#define GPIO140_ETM_D7		PIN_CFG(140, ALT_B)</div><div class='del'>-#define GPIO140_STMAPE_CLK	PIN_CFG(140, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO141_GPIO		PIN_CFG(141, GPIO)</div><div class='del'>-#define GPIO141_KP_O6		PIN_CFG(141, ALT_A)</div><div class='del'>-#define GPIO141_ETM_D6		PIN_CFG(141, ALT_B)</div><div class='del'>-#define GPIO141_U0_RXD		PIN_CFG(141, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO142_GPIO		PIN_CFG(142, GPIO)</div><div class='del'>-#define GPIO142_KP_I7		PIN_CFG(142, ALT_A)</div><div class='del'>-#define GPIO142_ETM_D5		PIN_CFG(142, ALT_B)</div><div class='del'>-#define GPIO142_STMAPE_DAT0	PIN_CFG(142, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO143_GPIO		PIN_CFG(143, GPIO)</div><div class='del'>-#define GPIO143_KP_O7		PIN_CFG(143, ALT_A)</div><div class='del'>-#define GPIO143_ETM_D4		PIN_CFG(143, ALT_B)</div><div class='del'>-#define GPIO143_STMAPE_DAT1	PIN_CFG(143, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO144_GPIO		PIN_CFG(144, GPIO)</div><div class='del'>-#define GPIO144_I2C3_SCL	PIN_CFG(144, ALT_A)</div><div class='del'>-#define GPIO144_ETM_D3		PIN_CFG(144, ALT_B)</div><div class='del'>-#define GPIO144_STMAPE_DAT2	PIN_CFG(144, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO145_GPIO		PIN_CFG(145, GPIO)</div><div class='del'>-#define GPIO145_I2C3_SDA	PIN_CFG(145, ALT_A)</div><div class='del'>-#define GPIO145_ETM_D2		PIN_CFG(145, ALT_B)</div><div class='del'>-#define GPIO145_STMAPE_DAT3	PIN_CFG(145, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO146_GPIO		PIN_CFG(146, GPIO)</div><div class='del'>-#define GPIO146_PWM_0		PIN_CFG(146, ALT_A)</div><div class='del'>-#define GPIO146_ETM_D1		PIN_CFG(146, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO147_GPIO		PIN_CFG(147, GPIO)</div><div class='del'>-#define GPIO147_PWM_1		PIN_CFG(147, ALT_A)</div><div class='del'>-#define GPIO147_ETM_D0		PIN_CFG(147, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO148_GPIO		PIN_CFG(148, GPIO)</div><div class='del'>-#define GPIO148_PWM_2		PIN_CFG(148, ALT_A)</div><div class='del'>-#define GPIO148_ETM_CLK		PIN_CFG(148, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO160_GPIO		PIN_CFG(160, GPIO)</div><div class='del'>-#define GPIO160_CLKOUT_REQn	PIN_CFG(160, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO161_GPIO		PIN_CFG(161, GPIO)</div><div class='del'>-#define GPIO161_CLKOUT_0	PIN_CFG(161, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO162_GPIO		PIN_CFG(162, GPIO)</div><div class='del'>-#define GPIO162_CLKOUT_1	PIN_CFG(162, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO163_GPIO		PIN_CFG(163, GPIO)</div><div class='del'>-</div><div class='del'>-#define GPIO164_GPIO		PIN_CFG(164, GPIO)</div><div class='del'>-#define GPIO164_GPS_START	PIN_CFG(164, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO165_GPIO		PIN_CFG(165, GPIO)</div><div class='del'>-#define GPIO165_SPI1_CS2n	PIN_CFG(165, ALT_A)</div><div class='del'>-#define GPIO165_U3_RXD		PIN_CFG(165, ALT_B)</div><div class='del'>-#define GPIO165_BUSMON_D20	PIN_CFG(165, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO166_GPIO		PIN_CFG(166, GPIO)</div><div class='del'>-#define GPIO166_SPI1_CS1n	PIN_CFG(166, ALT_A)</div><div class='del'>-#define GPIO166_U3_TXD		PIN_CFG(166, ALT_B)</div><div class='del'>-#define GPIO166_BUSMON_D21	PIN_CFG(166, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO167_GPIO		PIN_CFG(167, GPIO)</div><div class='del'>-#define GPIO167_SPI1_CS0n	PIN_CFG(167, ALT_A)</div><div class='del'>-#define GPIO167_U3_RTSn		PIN_CFG(167, ALT_B)</div><div class='del'>-#define GPIO167_BUSMON_D22	PIN_CFG(167, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO168_GPIO		PIN_CFG(168, GPIO)</div><div class='del'>-#define GPIO168_SPI1_RXD	PIN_CFG(168, ALT_A)</div><div class='del'>-#define GPIO168_U3_CTSn		PIN_CFG(168, ALT_B)</div><div class='del'>-#define GPIO168_BUSMON_D23	PIN_CFG(168, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO169_GPIO		PIN_CFG(169, GPIO)</div><div class='del'>-#define GPIO169_SPI1_TXD	PIN_CFG(169, ALT_A)</div><div class='del'>-#define GPIO169_DDR_RC		PIN_CFG(169, ALT_B)</div><div class='del'>-#define GPIO169_BUSMON_D24	PIN_CFG(169, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO170_GPIO		PIN_CFG(170, GPIO)</div><div class='del'>-#define GPIO170_SPI1_CLK	PIN_CFG(170, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO171_GPIO		PIN_CFG(171, GPIO)</div><div class='del'>-#define GPIO171_MC3_DAT0	PIN_CFG(171, ALT_A)</div><div class='del'>-#define GPIO171_SPI3_RXD	PIN_CFG(171, ALT_B)</div><div class='del'>-#define GPIO171_BUSMON_D25	PIN_CFG(171, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO172_GPIO		PIN_CFG(172, GPIO)</div><div class='del'>-#define GPIO172_MC3_DAT1	PIN_CFG(172, ALT_A)</div><div class='del'>-#define GPIO172_SPI3_CS1n	PIN_CFG(172, ALT_B)</div><div class='del'>-#define GPIO172_BUSMON_D26	PIN_CFG(172, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO173_GPIO		PIN_CFG(173, GPIO)</div><div class='del'>-#define GPIO173_MC3_DAT2	PIN_CFG(173, ALT_A)</div><div class='del'>-#define GPIO173_SPI3_CS2n	PIN_CFG(173, ALT_B)</div><div class='del'>-#define GPIO173_BUSMON_D27	PIN_CFG(173, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO174_GPIO		PIN_CFG(174, GPIO)</div><div class='del'>-#define GPIO174_MC3_DAT3	PIN_CFG(174, ALT_A)</div><div class='del'>-#define GPIO174_SPI3_CS0n	PIN_CFG(174, ALT_B)</div><div class='del'>-#define GPIO174_BUSMON_D28	PIN_CFG(174, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO175_GPIO		PIN_CFG(175, GPIO)</div><div class='del'>-#define GPIO175_MC3_CMD		PIN_CFG(175, ALT_A)</div><div class='del'>-#define GPIO175_SPI3_TXD	PIN_CFG(175, ALT_B)</div><div class='del'>-#define GPIO175_BUSMON_D29	PIN_CFG(175, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO176_GPIO		PIN_CFG(176, GPIO)</div><div class='del'>-#define GPIO176_MC3_CLK		PIN_CFG(176, ALT_A)</div><div class='del'>-#define GPIO176_SPI3_CLK	PIN_CFG(176, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO177_GPIO		PIN_CFG(177, GPIO)</div><div class='del'>-#define GPIO177_U2_RXD		PIN_CFG(177, ALT_A)</div><div class='del'>-#define GPIO177_I2C3_SCL	PIN_CFG(177, ALT_B)</div><div class='del'>-#define GPIO177_BUSMON_D30	PIN_CFG(177, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO178_GPIO		PIN_CFG(178, GPIO)</div><div class='del'>-#define GPIO178_U2_TXD		PIN_CFG(178, ALT_A)</div><div class='del'>-#define GPIO178_I2C3_SDA	PIN_CFG(178, ALT_B)</div><div class='del'>-#define GPIO178_BUSMON_D31	PIN_CFG(178, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO179_GPIO		PIN_CFG(179, GPIO)</div><div class='del'>-#define GPIO179_U2_CTSn		PIN_CFG(179, ALT_A)</div><div class='del'>-#define GPIO179_U3_RXD		PIN_CFG(179, ALT_B)</div><div class='del'>-#define GPIO179_BUSMON_D32	PIN_CFG(179, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO180_GPIO		PIN_CFG(180, GPIO)</div><div class='del'>-#define GPIO180_U2_RTSn		PIN_CFG(180, ALT_A)</div><div class='del'>-#define GPIO180_U3_TXD		PIN_CFG(180, ALT_B)</div><div class='del'>-#define GPIO180_BUSMON_D33	PIN_CFG(180, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO185_GPIO		PIN_CFG(185, GPIO)</div><div class='del'>-#define GPIO185_SPI3_CS2n	PIN_CFG(185, ALT_A)</div><div class='del'>-#define GPIO185_MC4_DAT0	PIN_CFG(185, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO186_GPIO		PIN_CFG(186, GPIO)</div><div class='del'>-#define GPIO186_SPI3_CS1n	PIN_CFG(186, ALT_A)</div><div class='del'>-#define GPIO186_MC4_DAT1	PIN_CFG(186, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO187_GPIO		PIN_CFG(187, GPIO)</div><div class='del'>-#define GPIO187_SPI3_CS0n	PIN_CFG(187, ALT_A)</div><div class='del'>-#define GPIO187_MC4_DAT2	PIN_CFG(187, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO188_GPIO		PIN_CFG(188, GPIO)</div><div class='del'>-#define GPIO188_SPI3_RXD	PIN_CFG(188, ALT_A)</div><div class='del'>-#define GPIO188_MC4_DAT3	PIN_CFG(188, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO189_GPIO		PIN_CFG(189, GPIO)</div><div class='del'>-#define GPIO189_SPI3_TXD	PIN_CFG(189, ALT_A)</div><div class='del'>-#define GPIO189_MC4_CMD		PIN_CFG(189, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO190_GPIO		PIN_CFG(190, GPIO)</div><div class='del'>-#define GPIO190_SPI3_CLK	PIN_CFG(190, ALT_A)</div><div class='del'>-#define GPIO190_MC4_CLK		PIN_CFG(190, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO191_GPIO		PIN_CFG(191, GPIO)</div><div class='del'>-#define GPIO191_MC1_DAT0	PIN_CFG(191, ALT_A)</div><div class='del'>-#define GPIO191_MC4_DAT4	PIN_CFG(191, ALT_B)</div><div class='del'>-#define GPIO191_STMAPE_DAT0	PIN_CFG(191, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO192_GPIO		PIN_CFG(192, GPIO)</div><div class='del'>-#define GPIO192_MC1_DAT1	PIN_CFG(192, ALT_A)</div><div class='del'>-#define GPIO192_MC4_DAT5	PIN_CFG(192, ALT_B)</div><div class='del'>-#define GPIO192_STMAPE_DAT1	PIN_CFG(192, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO193_GPIO		PIN_CFG(193, GPIO)</div><div class='del'>-#define GPIO193_MC1_DAT2	PIN_CFG(193, ALT_A)</div><div class='del'>-#define GPIO193_MC4_DAT6	PIN_CFG(193, ALT_B)</div><div class='del'>-#define GPIO193_STMAPE_DAT2	PIN_CFG(193, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO194_GPIO		PIN_CFG(194, GPIO)</div><div class='del'>-#define GPIO194_MC1_DAT3	PIN_CFG(194, ALT_A)</div><div class='del'>-#define GPIO194_MC4_DAT7	PIN_CFG(194, ALT_B)</div><div class='del'>-#define GPIO194_STMAPE_DAT3	PIN_CFG(194, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO195_GPIO		PIN_CFG(195, GPIO)</div><div class='del'>-#define GPIO195_MC1_CLK		PIN_CFG(195, ALT_A)</div><div class='del'>-#define GPIO195_STMAPE_CLK	PIN_CFG(195, ALT_B)</div><div class='del'>-#define GPIO195_BUSMON_CLK	PIN_CFG(195, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO196_GPIO		PIN_CFG(196, GPIO)</div><div class='del'>-#define GPIO196_MC1_CMD		PIN_CFG(196, ALT_A)</div><div class='del'>-#define GPIO196_U0_RXD		PIN_CFG(196, ALT_B)</div><div class='del'>-#define GPIO196_BUSMON_D38	PIN_CFG(196, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO197_GPIO		PIN_CFG(197, GPIO)</div><div class='del'>-#define GPIO197_MC1_CMDDIR	PIN_CFG(197, ALT_A)</div><div class='del'>-#define GPIO197_BUSMON_D39	PIN_CFG(197, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO198_GPIO		PIN_CFG(198, GPIO)</div><div class='del'>-#define GPIO198_MC1_FBCLK	PIN_CFG(198, ALT_A)</div><div class='del'>-</div><div class='del'>-#define GPIO199_GPIO		PIN_CFG(199, GPIO)</div><div class='del'>-#define GPIO199_MC1_DAT0DIR	PIN_CFG(199, ALT_A)</div><div class='del'>-#define GPIO199_BUSMON_D40	PIN_CFG(199, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO200_GPIO		PIN_CFG(200, GPIO)</div><div class='del'>-#define GPIO200_U1_TXD		PIN_CFG(200, ALT_A)</div><div class='del'>-#define GPIO200_ACCU0_RTSn	PIN_CFG(200, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO201_GPIO		PIN_CFG(201, GPIO)</div><div class='del'>-#define GPIO201_U1_RXD		PIN_CFG(201, ALT_A)</div><div class='del'>-#define GPIO201_ACCU0_CTSn	PIN_CFG(201, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO202_GPIO		PIN_CFG(202, GPIO)</div><div class='del'>-#define GPIO202_U1_CTSn		PIN_CFG(202, ALT_A)</div><div class='del'>-#define GPIO202_ACCU0_RXD	PIN_CFG(202, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO203_GPIO		PIN_CFG(203, GPIO)</div><div class='del'>-#define GPIO203_U1_RTSn		PIN_CFG(203, ALT_A)</div><div class='del'>-#define GPIO203_ACCU0_TXD	PIN_CFG(203, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO204_GPIO		PIN_CFG(204, GPIO)</div><div class='del'>-#define GPIO204_SPI0_CS2n	PIN_CFG(204, ALT_A)</div><div class='del'>-#define GPIO204_ACCGPIO_000	PIN_CFG(204, ALT_B)</div><div class='del'>-#define GPIO204_LCD_VSI1	PIN_CFG(204, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO205_GPIO		PIN_CFG(205, GPIO)</div><div class='del'>-#define GPIO205_SPI0_CS1n	PIN_CFG(205, ALT_A)</div><div class='del'>-#define GPIO205_ACCGPIO_001	PIN_CFG(205, ALT_B)</div><div class='del'>-#define GPIO205_LCD_D3		PIN_CFG(205, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO206_GPIO		PIN_CFG(206, GPIO)</div><div class='del'>-#define GPIO206_SPI0_CS0n	PIN_CFG(206, ALT_A)</div><div class='del'>-#define GPIO206_ACCGPIO_002	PIN_CFG(206, ALT_B)</div><div class='del'>-#define GPIO206_LCD_D2		PIN_CFG(206, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO207_GPIO		PIN_CFG(207, GPIO)</div><div class='del'>-#define GPIO207_SPI0_RXD	PIN_CFG(207, ALT_A)</div><div class='del'>-#define GPIO207_ACCGPIO_003	PIN_CFG(207, ALT_B)</div><div class='del'>-#define GPIO207_LCD_D1		PIN_CFG(207, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO208_GPIO		PIN_CFG(208, GPIO)</div><div class='del'>-#define GPIO208_SPI0_TXD	PIN_CFG(208, ALT_A)</div><div class='del'>-#define GPIO208_ACCGPIO_004	PIN_CFG(208, ALT_B)</div><div class='del'>-#define GPIO208_LCD_D0		PIN_CFG(208, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO209_GPIO		PIN_CFG(209, GPIO)</div><div class='del'>-#define GPIO209_SPI0_CLK	PIN_CFG(209, ALT_A)</div><div class='del'>-#define GPIO209_ACCGPIO_005	PIN_CFG(209, ALT_B)</div><div class='del'>-#define GPIO209_LCD_CLK		PIN_CFG(209, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO210_GPIO		PIN_CFG(210, GPIO)</div><div class='del'>-#define GPIO210_LCD_VSO		PIN_CFG(210, ALT_A)</div><div class='del'>-#define GPIO210_PRCMU_PWRCTRL1	PIN_CFG(210, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO211_GPIO		PIN_CFG(211, GPIO)</div><div class='del'>-#define GPIO211_LCD_VSI0	PIN_CFG(211, ALT_A)</div><div class='del'>-#define GPIO211_PRCMU_PWRCTRL2	PIN_CFG(211, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO212_GPIO		PIN_CFG(212, GPIO)</div><div class='del'>-#define GPIO212_SPI2_CS2n	PIN_CFG(212, ALT_A)</div><div class='del'>-#define GPIO212_LCD_HSO		PIN_CFG(212, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO213_GPIO		PIN_CFG(213, GPIO)</div><div class='del'>-#define GPIO213_SPI2_CS1n	PIN_CFG(213, ALT_A)</div><div class='del'>-#define GPIO213_LCD_DE		PIN_CFG(213, ALT_B)</div><div class='del'>-#define GPIO213_BUSMON_D16	PIN_CFG(213, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO214_GPIO		PIN_CFG(214, GPIO)</div><div class='del'>-#define GPIO214_SPI2_CS0n	PIN_CFG(214, ALT_A)</div><div class='del'>-#define GPIO214_LCD_D7		PIN_CFG(214, ALT_B)</div><div class='del'>-#define GPIO214_BUSMON_D17	PIN_CFG(214, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO215_GPIO		PIN_CFG(215, GPIO)</div><div class='del'>-#define GPIO215_SPI2_RXD	PIN_CFG(215, ALT_A)</div><div class='del'>-#define GPIO215_LCD_D6		PIN_CFG(215, ALT_B)</div><div class='del'>-#define GPIO215_BUSMON_D18	PIN_CFG(215, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO216_GPIO		PIN_CFG(216, GPIO)</div><div class='del'>-#define GPIO216_SPI2_CLK	PIN_CFG(216, ALT_A)</div><div class='del'>-#define GPIO216_LCD_D5		PIN_CFG(216, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO217_GPIO		PIN_CFG(217, GPIO)</div><div class='del'>-#define GPIO217_SPI2_TXD	PIN_CFG(217, ALT_A)</div><div class='del'>-#define GPIO217_LCD_D4		PIN_CFG(217, ALT_B)</div><div class='del'>-#define GPIO217_BUSMON_D19	PIN_CFG(217, ALT_C)</div><div class='del'>-</div><div class='del'>-#define GPIO218_GPIO		PIN_CFG(218, GPIO)</div><div class='del'>-#define GPIO218_I2C2_SCL	PIN_CFG(218, ALT_A)</div><div class='del'>-#define GPIO218_LCD_VSO		PIN_CFG(218, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO219_GPIO		PIN_CFG(219, GPIO)</div><div class='del'>-#define GPIO219_I2C2_SDA	PIN_CFG(219, ALT_A)</div><div class='del'>-#define GPIO219_LCD_D3		PIN_CFG(219, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO220_GPIO		PIN_CFG(220, GPIO)</div><div class='del'>-#define GPIO220_MSP2_TCK	PIN_CFG(220, ALT_A)</div><div class='del'>-#define GPIO220_LCD_D2		PIN_CFG(220, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO221_GPIO		PIN_CFG(221, GPIO)</div><div class='del'>-#define GPIO221_MSP2_TFS	PIN_CFG(221, ALT_A)</div><div class='del'>-#define GPIO221_LCD_D1		PIN_CFG(221, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO222_GPIO		PIN_CFG(222, GPIO)</div><div class='del'>-#define GPIO222_MSP2_TXD	PIN_CFG(222, ALT_A)</div><div class='del'>-#define GPIO222_LCD_D0		PIN_CFG(222, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO223_GPIO		PIN_CFG(223, GPIO)</div><div class='del'>-#define GPIO223_MSP2_RXD	PIN_CFG(223, ALT_A)</div><div class='del'>-#define GPIO223_LCD_CLK		PIN_CFG(223, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO224_GPIO		PIN_CFG(224, GPIO)</div><div class='del'>-#define GPIO224_PRCMU_PWRCTRL0	PIN_CFG(224, ALT_A)</div><div class='del'>-#define GPIO224_LCD_VSI1	PIN_CFG(224, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO225_GPIO		PIN_CFG(225, GPIO)</div><div class='del'>-#define GPIO225_PRCMU_PWRCTRL1	PIN_CFG(225, ALT_A)</div><div class='del'>-#define GPIO225_IRDA_RXD	PIN_CFG(225, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO226_GPIO		PIN_CFG(226, GPIO)</div><div class='del'>-#define GPIO226_PRCMU_PWRCTRL2	PIN_CFG(226, ALT_A)</div><div class='del'>-#define GPIO226_IRRC_DAT	PIN_CFG(226, ALT_B)</div><div class='del'>-</div><div class='del'>-#define GPIO227_GPIO		PIN_CFG(227, GPIO)</div><div class='del'>-#define GPIO227_IRRC_DAT	PIN_CFG(227, ALT_A)</div><div class='del'>-#define GPIO227_IRDA_TXD	PIN_CFG(227, ALT_B)</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/pins-db8500.h b/arch/arm/mach-ux500/pins-db8500.h<br/>index 8b1d1a7a679e..062c7acf4576 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/pins-db8500.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/pins-db8500.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/pins-db8500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/pins-db8500.h</a></div><div class='hunk'>@@ -35,40 +35,40 @@</div><div class='ctx'> </div><div class='ctx'> #define GPIO4_GPIO		PIN_CFG(4, GPIO)</div><div class='ctx'> #define GPIO4_U1_RXD		PIN_CFG(4, ALT_A)</div><div class='del'>-#define GPIO4_I2C4_SCL		PIN_CFG_INPUT(4, ALT_B, PULLUP)</div><div class='add'>+#define GPIO4_I2C4_SCL		PIN_CFG(4, ALT_B)</div><div class='ctx'> #define GPIO4_IP_TRSTn		PIN_CFG(4, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO5_GPIO		PIN_CFG(5, GPIO)</div><div class='ctx'> #define GPIO5_U1_TXD		PIN_CFG(5, ALT_A)</div><div class='del'>-#define GPIO5_I2C4_SDA		PIN_CFG_INPUT(5, ALT_B, PULLUP)</div><div class='add'>+#define GPIO5_I2C4_SDA		PIN_CFG(5, ALT_B)</div><div class='ctx'> #define GPIO5_IP_GPIO6		PIN_CFG(5, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO6_GPIO		PIN_CFG(6, GPIO)</div><div class='ctx'> #define GPIO6_U1_CTSn		PIN_CFG(6, ALT_A)</div><div class='del'>-#define GPIO6_I2C1_SCL		PIN_CFG_INPUT(6, ALT_B, PULLUP)</div><div class='add'>+#define GPIO6_I2C1_SCL		PIN_CFG(6, ALT_B)</div><div class='ctx'> #define GPIO6_IP_GPIO0		PIN_CFG(6, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO7_GPIO		PIN_CFG(7, GPIO)</div><div class='ctx'> #define GPIO7_U1_RTSn		PIN_CFG(7, ALT_A)</div><div class='del'>-#define GPIO7_I2C1_SDA		PIN_CFG_INPUT(7, ALT_B, PULLUP)</div><div class='add'>+#define GPIO7_I2C1_SDA		PIN_CFG(7, ALT_B)</div><div class='ctx'> #define GPIO7_IP_GPIO1		PIN_CFG(7, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO8_GPIO		PIN_CFG(8, GPIO)</div><div class='del'>-#define GPIO8_IPI2C_SDA		PIN_CFG_INPUT(8, ALT_A, PULLUP)</div><div class='del'>-#define GPIO8_I2C2_SDA		PIN_CFG_INPUT(8, ALT_B, PULLUP)</div><div class='add'>+#define GPIO8_IPI2C_SDA		PIN_CFG(8, ALT_A)</div><div class='add'>+#define GPIO8_I2C2_SDA		PIN_CFG(8, ALT_B)</div><div class='ctx'> </div><div class='ctx'> #define GPIO9_GPIO		PIN_CFG(9, GPIO)</div><div class='del'>-#define GPIO9_IPI2C_SCL		PIN_CFG_INPUT(9, ALT_A, PULLUP)</div><div class='del'>-#define GPIO9_I2C2_SCL		PIN_CFG_INPUT(9, ALT_B, PULLUP)</div><div class='add'>+#define GPIO9_IPI2C_SCL		PIN_CFG(9, ALT_A)</div><div class='add'>+#define GPIO9_I2C2_SCL		PIN_CFG(9, ALT_B)</div><div class='ctx'> </div><div class='ctx'> #define GPIO10_GPIO		PIN_CFG(10, GPIO)</div><div class='del'>-#define GPIO10_IPI2C_SDA	PIN_CFG_INPUT(10, ALT_A, PULLUP)</div><div class='del'>-#define GPIO10_I2C2_SDA		PIN_CFG_INPUT(10, ALT_B, PULLUP)</div><div class='add'>+#define GPIO10_IPI2C_SDA	PIN_CFG(10, ALT_A)</div><div class='add'>+#define GPIO10_I2C2_SDA		PIN_CFG(10, ALT_B)</div><div class='ctx'> #define GPIO10_IP_GPIO3		PIN_CFG(10, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO11_GPIO		PIN_CFG(11, GPIO)</div><div class='del'>-#define GPIO11_IPI2C_SCL	PIN_CFG_INPUT(11, ALT_A, PULLUP)</div><div class='del'>-#define GPIO11_I2C2_SCL		PIN_CFG_INPUT(11, ALT_B, PULLUP)</div><div class='add'>+#define GPIO11_IPI2C_SCL	PIN_CFG(11, ALT_A)</div><div class='add'>+#define GPIO11_I2C2_SCL		PIN_CFG(11, ALT_B)</div><div class='ctx'> #define GPIO11_IP_GPIO2		PIN_CFG(11, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO12_GPIO		PIN_CFG(12, GPIO)</div><div class='hunk'>@@ -87,12 +87,12 @@</div><div class='ctx'> </div><div class='ctx'> #define GPIO16_GPIO		PIN_CFG(16, GPIO)</div><div class='ctx'> #define GPIO16_MSP0_RFS		PIN_CFG(16, ALT_A)</div><div class='del'>-#define GPIO16_I2C1_SCL		PIN_CFG_INPUT(16, ALT_B, PULLUP)</div><div class='add'>+#define GPIO16_I2C1_SCL		PIN_CFG(16, ALT_B)</div><div class='ctx'> #define GPIO16_SLIM0_DAT	PIN_CFG(16, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO17_GPIO		PIN_CFG(17, GPIO)</div><div class='ctx'> #define GPIO17_MSP0_RCK		PIN_CFG(17, ALT_A)</div><div class='del'>-#define GPIO17_I2C1_SDA		PIN_CFG_INPUT(17, ALT_B, PULLUP)</div><div class='add'>+#define GPIO17_I2C1_SDA		PIN_CFG(17, ALT_B)</div><div class='ctx'> #define GPIO17_SLIM0_CLK	PIN_CFG(17, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO18_GPIO		PIN_CFG(18, GPIO)</div><div class='hunk'>@@ -434,10 +434,10 @@</div><div class='ctx'> #define GPIO146_SSP0_TXD	PIN_CFG(146, ALT_A)</div><div class='ctx'> </div><div class='ctx'> #define GPIO147_GPIO		PIN_CFG(147, GPIO)</div><div class='del'>-#define GPIO147_I2C0_SCL	PIN_CFG_INPUT(147, ALT_A, PULLUP)</div><div class='add'>+#define GPIO147_I2C0_SCL	PIN_CFG(147, ALT_A)</div><div class='ctx'> </div><div class='ctx'> #define GPIO148_GPIO		PIN_CFG(148, GPIO)</div><div class='del'>-#define GPIO148_I2C0_SDA	PIN_CFG_INPUT(148, ALT_A, PULLUP)</div><div class='add'>+#define GPIO148_I2C0_SDA	PIN_CFG(148, ALT_A)</div><div class='ctx'> </div><div class='ctx'> #define GPIO149_GPIO		PIN_CFG(149, GPIO)</div><div class='ctx'> #define GPIO149_IP_GPIO0	PIN_CFG(149, ALT_A)</div><div class='hunk'>@@ -459,82 +459,82 @@</div><div class='ctx'> #define GPIO152_KP_O9		PIN_CFG(152, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO153_GPIO		PIN_CFG(153, GPIO)</div><div class='del'>-#define GPIO153_KP_I7		PIN_CFG_INPUT(153, ALT_A, PULLDOWN)</div><div class='add'>+#define GPIO153_KP_I7		PIN_CFG(153, ALT_A)</div><div class='ctx'> #define GPIO153_LCD_D24		PIN_CFG(153, ALT_B)</div><div class='ctx'> #define GPIO153_U2_RXD		PIN_CFG(153, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO154_GPIO		PIN_CFG(154, GPIO)</div><div class='del'>-#define GPIO154_KP_I6		PIN_CFG_INPUT(154, ALT_A, PULLDOWN)</div><div class='add'>+#define GPIO154_KP_I6		PIN_CFG(154, ALT_A)</div><div class='ctx'> #define GPIO154_LCD_D25		PIN_CFG(154, ALT_B)</div><div class='ctx'> #define GPIO154_U2_TXD		PIN_CFG(154, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO155_GPIO		PIN_CFG(155, GPIO)</div><div class='del'>-#define GPIO155_KP_I5		PIN_CFG_INPUT(155, ALT_A, PULLDOWN)</div><div class='add'>+#define GPIO155_KP_I5		PIN_CFG(155, ALT_A)</div><div class='ctx'> #define GPIO155_LCD_D26		PIN_CFG(155, ALT_B)</div><div class='ctx'> #define GPIO155_STMAPE_CLK	PIN_CFG(155, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO156_GPIO		PIN_CFG(156, GPIO)</div><div class='del'>-#define GPIO156_KP_I4		PIN_CFG_INPUT(156, ALT_A, PULLDOWN)</div><div class='add'>+#define GPIO156_KP_I4		PIN_CFG(156, ALT_A)</div><div class='ctx'> #define GPIO156_LCD_D27		PIN_CFG(156, ALT_B)</div><div class='ctx'> #define GPIO156_STMAPE_DAT3	PIN_CFG(156, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO157_GPIO		PIN_CFG(157, GPIO)</div><div class='del'>-#define GPIO157_KP_O7		PIN_CFG_INPUT(157, ALT_A, PULLUP)</div><div class='add'>+#define GPIO157_KP_O7		PIN_CFG(157, ALT_A)</div><div class='ctx'> #define GPIO157_LCD_D28		PIN_CFG(157, ALT_B)</div><div class='ctx'> #define GPIO157_STMAPE_DAT2	PIN_CFG(157, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO158_GPIO		PIN_CFG(158, GPIO)</div><div class='del'>-#define GPIO158_KP_O6		PIN_CFG_INPUT(158, ALT_A, PULLUP)</div><div class='add'>+#define GPIO158_KP_O6		PIN_CFG(158, ALT_A)</div><div class='ctx'> #define GPIO158_LCD_D29		PIN_CFG(158, ALT_B)</div><div class='ctx'> #define GPIO158_STMAPE_DAT1	PIN_CFG(158, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO159_GPIO		PIN_CFG(159, GPIO)</div><div class='del'>-#define GPIO159_KP_O5		PIN_CFG_INPUT(159, ALT_A, PULLUP)</div><div class='add'>+#define GPIO159_KP_O5		PIN_CFG(159, ALT_A)</div><div class='ctx'> #define GPIO159_LCD_D30		PIN_CFG(159, ALT_B)</div><div class='ctx'> #define GPIO159_STMAPE_DAT0	PIN_CFG(159, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO160_GPIO		PIN_CFG(160, GPIO)</div><div class='del'>-#define GPIO160_KP_O4		PIN_CFG_INPUT(160, ALT_A, PULLUP)</div><div class='add'>+#define GPIO160_KP_O4		PIN_CFG(160, ALT_A)</div><div class='ctx'> #define GPIO160_LCD_D31		PIN_CFG(160, ALT_B)</div><div class='ctx'> #define GPIO160_NONE		PIN_CFG(160, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO161_GPIO		PIN_CFG(161, GPIO)</div><div class='del'>-#define GPIO161_KP_I3		PIN_CFG_INPUT(161, ALT_A, PULLDOWN)</div><div class='add'>+#define GPIO161_KP_I3		PIN_CFG(161, ALT_A)</div><div class='ctx'> #define GPIO161_LCD_D32		PIN_CFG(161, ALT_B)</div><div class='ctx'> #define GPIO161_UARTMOD_RXD	PIN_CFG(161, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO162_GPIO		PIN_CFG(162, GPIO)</div><div class='del'>-#define GPIO162_KP_I2		PIN_CFG_INPUT(162, ALT_A, PULLDOWN)</div><div class='add'>+#define GPIO162_KP_I2		PIN_CFG(162, ALT_A)</div><div class='ctx'> #define GPIO162_LCD_D33		PIN_CFG(162, ALT_B)</div><div class='ctx'> #define GPIO162_UARTMOD_TXD	PIN_CFG(162, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO163_GPIO		PIN_CFG(163, GPIO)</div><div class='del'>-#define GPIO163_KP_I1		PIN_CFG_INPUT(163, ALT_A, PULLDOWN)</div><div class='add'>+#define GPIO163_KP_I1		PIN_CFG(163, ALT_A)</div><div class='ctx'> #define GPIO163_LCD_D34		PIN_CFG(163, ALT_B)</div><div class='ctx'> #define GPIO163_STMMOD_CLK	PIN_CFG(163, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO164_GPIO		PIN_CFG(164, GPIO)</div><div class='del'>-#define GPIO164_KP_I0		PIN_CFG_INPUT(164, ALT_A, PULLUP)</div><div class='add'>+#define GPIO164_KP_I0		PIN_CFG(164, ALT_A)</div><div class='ctx'> #define GPIO164_LCD_D35		PIN_CFG(164, ALT_B)</div><div class='ctx'> #define GPIO164_STMMOD_DAT3	PIN_CFG(164, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO165_GPIO		PIN_CFG(165, GPIO)</div><div class='del'>-#define GPIO165_KP_O3		PIN_CFG_INPUT(165, ALT_A, PULLUP)</div><div class='add'>+#define GPIO165_KP_O3		PIN_CFG(165, ALT_A)</div><div class='ctx'> #define GPIO165_LCD_D36		PIN_CFG(165, ALT_B)</div><div class='ctx'> #define GPIO165_STMMOD_DAT2	PIN_CFG(165, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO166_GPIO		PIN_CFG(166, GPIO)</div><div class='del'>-#define GPIO166_KP_O2		PIN_CFG_INPUT(166, ALT_A, PULLUP)</div><div class='add'>+#define GPIO166_KP_O2		PIN_CFG(166, ALT_A)</div><div class='ctx'> #define GPIO166_LCD_D37		PIN_CFG(166, ALT_B)</div><div class='ctx'> #define GPIO166_STMMOD_DAT1	PIN_CFG(166, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO167_GPIO		PIN_CFG(167, GPIO)</div><div class='del'>-#define GPIO167_KP_O1		PIN_CFG_INPUT(167, ALT_A, PULLUP)</div><div class='add'>+#define GPIO167_KP_O1		PIN_CFG(167, ALT_A)</div><div class='ctx'> #define GPIO167_LCD_D38		PIN_CFG(167, ALT_B)</div><div class='ctx'> #define GPIO167_STMMOD_DAT0	PIN_CFG(167, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO168_GPIO		PIN_CFG(168, GPIO)</div><div class='del'>-#define GPIO168_KP_O0		PIN_CFG_INPUT(168, ALT_A, PULLUP)</div><div class='add'>+#define GPIO168_KP_O0		PIN_CFG(168, ALT_A)</div><div class='ctx'> #define GPIO168_LCD_D39		PIN_CFG(168, ALT_B)</div><div class='ctx'> #define GPIO168_NONE		PIN_CFG(168, ALT_C)</div><div class='ctx'> </div><div class='hunk'>@@ -637,7 +637,7 @@</div><div class='ctx'> #define GPIO216_GPIO		PIN_CFG(216, GPIO)</div><div class='ctx'> #define GPIO216_MC1_DAT2DIR	PIN_CFG(216, ALT_A)</div><div class='ctx'> #define GPIO216_MC3_CMDDIR	PIN_CFG(216, ALT_B)</div><div class='del'>-#define GPIO216_I2C3_SDA	PIN_CFG_INPUT(216, ALT_C, PULLUP)</div><div class='add'>+#define GPIO216_I2C3_SDA	PIN_CFG(216, ALT_C)</div><div class='ctx'> #define GPIO216_SPI2_FRM	PIN_CFG(216, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO217_GPIO		PIN_CFG(217, GPIO)</div><div class='hunk'>@@ -649,7 +649,7 @@</div><div class='ctx'> #define GPIO218_GPIO		PIN_CFG(218, GPIO)</div><div class='ctx'> #define GPIO218_MC1_DAT31DIR	PIN_CFG(218, ALT_A)</div><div class='ctx'> #define GPIO218_MC3_DAT0DIR	PIN_CFG(218, ALT_B)</div><div class='del'>-#define GPIO218_I2C3_SCL	PIN_CFG_INPUT(218, ALT_C, PULLUP)</div><div class='add'>+#define GPIO218_I2C3_SCL	PIN_CFG(218, ALT_C)</div><div class='ctx'> #define GPIO218_SPI2_RXD	PIN_CFG(218, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO219_GPIO		PIN_CFG(219, GPIO)</div><div class='hunk'>@@ -698,12 +698,12 @@</div><div class='ctx'> #define GPIO229_GPIO		PIN_CFG(229, GPIO)</div><div class='ctx'> #define GPIO229_CLKOUT1		PIN_CFG(229, ALT_A)</div><div class='ctx'> #define GPIO229_PWL		PIN_CFG(229, ALT_B)</div><div class='del'>-#define GPIO229_I2C3_SDA	PIN_CFG_INPUT(229, ALT_C, PULLUP)</div><div class='add'>+#define GPIO229_I2C3_SDA	PIN_CFG(229, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO230_GPIO		PIN_CFG(230, GPIO)</div><div class='ctx'> #define GPIO230_CLKOUT2		PIN_CFG(230, ALT_A)</div><div class='ctx'> #define GPIO230_PWL		PIN_CFG(230, ALT_B)</div><div class='del'>-#define GPIO230_I2C3_SCL	PIN_CFG_INPUT(230, ALT_C, PULLUP)</div><div class='add'>+#define GPIO230_I2C3_SCL	PIN_CFG(230, ALT_C)</div><div class='ctx'> </div><div class='ctx'> #define GPIO256_GPIO		PIN_CFG(256, GPIO)</div><div class='ctx'> #define GPIO256_USB_NXT		PIN_CFG(256, ALT_A)</div><div class='head'>diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c<br/>index eff5842f6232..da1d5ad5bd45 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/platsmp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/platsmp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/platsmp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/platsmp.c</a></div><div class='hunk'>@@ -48,9 +48,7 @@ static void write_pen_release(int val)</div><div class='ctx'> </div><div class='ctx'> static void __iomem *scu_base_addr(void)</div><div class='ctx'> {</div><div class='del'>-	if (cpu_is_u5500())</div><div class='del'>-		return __io_address(U5500_SCU_BASE);</div><div class='del'>-	else if (cpu_is_u8500())</div><div class='add'>+	if (cpu_is_u8500_family())</div><div class='ctx'> 		return __io_address(U8500_SCU_BASE);</div><div class='ctx'> 	else</div><div class='ctx'> 		ux500_unknown_soc();</div><div class='hunk'>@@ -120,9 +118,7 @@ static void __init wakeup_secondary(void)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *backupram;</div><div class='ctx'> </div><div class='del'>-	if (cpu_is_u5500())</div><div class='del'>-		backupram = __io_address(U5500_BACKUPRAM0_BASE);</div><div class='del'>-	else if (cpu_is_u8500())</div><div class='add'>+	if (cpu_is_u8500_family())</div><div class='ctx'> 		backupram = __io_address(U8500_BACKUPRAM0_BASE);</div><div class='ctx'> 	else</div><div class='ctx'> 		ux500_unknown_soc();</div><div class='head'>diff --git a/arch/arm/mach-ux500/ste-dma40-db5500.h b/arch/arm/mach-ux500/ste-dma40-db5500.h<br/>deleted file mode 100644<br/>index cb2110c32858..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/ste-dma40-db5500.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/ste-dma40-db5500.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,135 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- *</div><div class='del'>- * Author: Rabin Vincent &lt;rabin.vincent@stericsson.com&gt; for ST-Ericsson</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2</div><div class='del'>- *</div><div class='del'>- * DB5500-SoC-specific configuration for DMA40</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef STE_DMA40_DB5500_H</div><div class='del'>-#define STE_DMA40_DB5500_H</div><div class='del'>-</div><div class='del'>-#define DB5500_DMA_NR_DEV 64</div><div class='del'>-</div><div class='del'>-enum dma_src_dev_type {</div><div class='del'>-	DB5500_DMA_DEV0_SPI0_RX = 0,</div><div class='del'>-	DB5500_DMA_DEV1_SPI1_RX = 1,</div><div class='del'>-	DB5500_DMA_DEV2_SPI2_RX = 2,</div><div class='del'>-	DB5500_DMA_DEV3_SPI3_RX = 3,</div><div class='del'>-	DB5500_DMA_DEV4_USB_OTG_IEP_1_9 = 4,</div><div class='del'>-	DB5500_DMA_DEV5_USB_OTG_IEP_2_10 = 5,</div><div class='del'>-	DB5500_DMA_DEV6_USB_OTG_IEP_3_11 = 6,</div><div class='del'>-	DB5500_DMA_DEV7_IRDA_RFS = 7,</div><div class='del'>-	DB5500_DMA_DEV8_IRDA_FIFO_RX = 8,</div><div class='del'>-	DB5500_DMA_DEV9_MSP0_RX = 9,</div><div class='del'>-	DB5500_DMA_DEV10_MSP1_RX = 10,</div><div class='del'>-	DB5500_DMA_DEV11_MSP2_RX = 11,</div><div class='del'>-	DB5500_DMA_DEV12_UART0_RX = 12,</div><div class='del'>-	DB5500_DMA_DEV13_UART1_RX = 13,</div><div class='del'>-	DB5500_DMA_DEV14_UART2_RX = 14,</div><div class='del'>-	DB5500_DMA_DEV15_UART3_RX = 15,</div><div class='del'>-	DB5500_DMA_DEV16_USB_OTG_IEP_8 = 16,</div><div class='del'>-	DB5500_DMA_DEV17_USB_OTG_IEP_1_9 = 17,</div><div class='del'>-	DB5500_DMA_DEV18_USB_OTG_IEP_2_10 = 18,</div><div class='del'>-	DB5500_DMA_DEV19_USB_OTG_IEP_3_11 = 19,</div><div class='del'>-	DB5500_DMA_DEV20_USB_OTG_IEP_4_12 = 20,</div><div class='del'>-	DB5500_DMA_DEV21_USB_OTG_IEP_5_13 = 21,</div><div class='del'>-	DB5500_DMA_DEV22_USB_OTG_IEP_6_14 = 22,</div><div class='del'>-	DB5500_DMA_DEV23_USB_OTG_IEP_7_15 = 23,</div><div class='del'>-	DB5500_DMA_DEV24_SDMMC0_RX = 24,</div><div class='del'>-	DB5500_DMA_DEV25_SDMMC1_RX = 25,</div><div class='del'>-	DB5500_DMA_DEV26_SDMMC2_RX = 26,</div><div class='del'>-	DB5500_DMA_DEV27_SDMMC3_RX = 27,</div><div class='del'>-	DB5500_DMA_DEV28_SDMMC4_RX = 28,</div><div class='del'>-	/* 29 - 32 not used */</div><div class='del'>-	DB5500_DMA_DEV33_SDMMC0_RX = 33,</div><div class='del'>-	DB5500_DMA_DEV34_SDMMC1_RX = 34,</div><div class='del'>-	DB5500_DMA_DEV35_SDMMC2_RX = 35,</div><div class='del'>-	DB5500_DMA_DEV36_SDMMC3_RX = 36,</div><div class='del'>-	DB5500_DMA_DEV37_SDMMC4_RX = 37,</div><div class='del'>-	DB5500_DMA_DEV38_USB_OTG_IEP_8 = 38,</div><div class='del'>-	DB5500_DMA_DEV39_USB_OTG_IEP_1_9 = 39,</div><div class='del'>-	DB5500_DMA_DEV40_USB_OTG_IEP_2_10 = 40,</div><div class='del'>-	DB5500_DMA_DEV41_USB_OTG_IEP_3_11 = 41,</div><div class='del'>-	DB5500_DMA_DEV42_USB_OTG_IEP_4_12 = 42,</div><div class='del'>-	DB5500_DMA_DEV43_USB_OTG_IEP_5_13 = 43,</div><div class='del'>-	DB5500_DMA_DEV44_USB_OTG_IEP_6_14 = 44,</div><div class='del'>-	DB5500_DMA_DEV45_USB_OTG_IEP_7_15 = 45,</div><div class='del'>-	/* 46 not used */</div><div class='del'>-	DB5500_DMA_DEV47_MCDE_RX = 47,</div><div class='del'>-	DB5500_DMA_DEV48_CRYPTO1_RX = 48,</div><div class='del'>-	/* 49, 50 not used */</div><div class='del'>-	DB5500_DMA_DEV49_I2C1_RX = 51,</div><div class='del'>-	DB5500_DMA_DEV50_I2C3_RX = 52,</div><div class='del'>-	DB5500_DMA_DEV51_I2C2_RX = 53,</div><div class='del'>-	/* 54 - 60 not used */</div><div class='del'>-	DB5500_DMA_DEV61_CRYPTO0_RX = 61,</div><div class='del'>-	/* 62, 63 not used */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum dma_dest_dev_type {</div><div class='del'>-	DB5500_DMA_DEV0_SPI0_TX = 0,</div><div class='del'>-	DB5500_DMA_DEV1_SPI1_TX = 1,</div><div class='del'>-	DB5500_DMA_DEV2_SPI2_TX = 2,</div><div class='del'>-	DB5500_DMA_DEV3_SPI3_TX = 3,</div><div class='del'>-	DB5500_DMA_DEV4_USB_OTG_OEP_1_9 = 4,</div><div class='del'>-	DB5500_DMA_DEV5_USB_OTG_OEP_2_10 = 5,</div><div class='del'>-	DB5500_DMA_DEV6_USB_OTG_OEP_3_11 = 6,</div><div class='del'>-	DB5500_DMA_DEV7_IRRC_TX = 7,</div><div class='del'>-	DB5500_DMA_DEV8_IRDA_FIFO_TX = 8,</div><div class='del'>-	DB5500_DMA_DEV9_MSP0_TX = 9,</div><div class='del'>-	DB5500_DMA_DEV10_MSP1_TX = 10,</div><div class='del'>-	DB5500_DMA_DEV11_MSP2_TX = 11,</div><div class='del'>-	DB5500_DMA_DEV12_UART0_TX = 12,</div><div class='del'>-	DB5500_DMA_DEV13_UART1_TX = 13,</div><div class='del'>-	DB5500_DMA_DEV14_UART2_TX = 14,</div><div class='del'>-	DB5500_DMA_DEV15_UART3_TX = 15,</div><div class='del'>-	DB5500_DMA_DEV16_USB_OTG_OEP_8 = 16,</div><div class='del'>-	DB5500_DMA_DEV17_USB_OTG_OEP_1_9 = 17,</div><div class='del'>-	DB5500_DMA_DEV18_USB_OTG_OEP_2_10 = 18,</div><div class='del'>-	DB5500_DMA_DEV19_USB_OTG_OEP_3_11 = 19,</div><div class='del'>-	DB5500_DMA_DEV20_USB_OTG_OEP_4_12 = 20,</div><div class='del'>-	DB5500_DMA_DEV21_USB_OTG_OEP_5_13 = 21,</div><div class='del'>-	DB5500_DMA_DEV22_USB_OTG_OEP_6_14 = 22,</div><div class='del'>-	DB5500_DMA_DEV23_USB_OTG_OEP_7_15 = 23,</div><div class='del'>-	DB5500_DMA_DEV24_SDMMC0_TX = 24,</div><div class='del'>-	DB5500_DMA_DEV25_SDMMC1_TX = 25,</div><div class='del'>-	DB5500_DMA_DEV26_SDMMC2_TX = 26,</div><div class='del'>-	DB5500_DMA_DEV27_SDMMC3_TX = 27,</div><div class='del'>-	DB5500_DMA_DEV28_SDMMC4_TX = 28,</div><div class='del'>-	/* 29 - 31 not used */</div><div class='del'>-	DB5500_DMA_DEV32_FSMC_TX = 32,</div><div class='del'>-	DB5500_DMA_DEV33_SDMMC0_TX = 33,</div><div class='del'>-	DB5500_DMA_DEV34_SDMMC1_TX = 34,</div><div class='del'>-	DB5500_DMA_DEV35_SDMMC2_TX = 35,</div><div class='del'>-	DB5500_DMA_DEV36_SDMMC3_TX = 36,</div><div class='del'>-	DB5500_DMA_DEV37_SDMMC4_TX = 37,</div><div class='del'>-	DB5500_DMA_DEV38_USB_OTG_OEP_8 = 38,</div><div class='del'>-	DB5500_DMA_DEV39_USB_OTG_OEP_1_9 = 39,</div><div class='del'>-	DB5500_DMA_DEV40_USB_OTG_OEP_2_10 = 40,</div><div class='del'>-	DB5500_DMA_DEV41_USB_OTG_OEP_3_11 = 41,</div><div class='del'>-	DB5500_DMA_DEV42_USB_OTG_OEP_4_12 = 42,</div><div class='del'>-	DB5500_DMA_DEV43_USB_OTG_OEP_5_13 = 43,</div><div class='del'>-	DB5500_DMA_DEV44_USB_OTG_OEP_6_14 = 44,</div><div class='del'>-	DB5500_DMA_DEV45_USB_OTG_OEP_7_15 = 45,</div><div class='del'>-	/* 46 not used */</div><div class='del'>-	DB5500_DMA_DEV47_STM_TX = 47,</div><div class='del'>-	DB5500_DMA_DEV48_CRYPTO1_TX = 48,</div><div class='del'>-	DB5500_DMA_DEV49_CRYPTO1_TX_HASH1_TX = 49,</div><div class='del'>-	DB5500_DMA_DEV50_HASH1_TX = 50,</div><div class='del'>-	DB5500_DMA_DEV51_I2C1_TX = 51,</div><div class='del'>-	DB5500_DMA_DEV52_I2C3_TX = 52,</div><div class='del'>-	DB5500_DMA_DEV53_I2C2_TX = 53,</div><div class='del'>-	/* 54, 55 not used */</div><div class='del'>-	DB5500_DMA_MEMCPY_TX_1 = 56,</div><div class='del'>-	DB5500_DMA_MEMCPY_TX_2 = 57,</div><div class='del'>-	DB5500_DMA_MEMCPY_TX_3 = 58,</div><div class='del'>-	DB5500_DMA_MEMCPY_TX_4 = 59,</div><div class='del'>-	DB5500_DMA_MEMCPY_TX_5 = 60,</div><div class='del'>-	DB5500_DMA_DEV61_CRYPTO0_TX = 61,</div><div class='del'>-	DB5500_DMA_DEV62_CRYPTO0_TX_HASH0_TX = 62,</div><div class='del'>-	DB5500_DMA_DEV63_HASH0_TX = 63,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c<br/>index d37df98b5c32..741e71feca78 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-ux500/timer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-ux500/timer.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-ux500/timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-ux500/timer.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/clksrc-dbx500-prcmu.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/smp_twd.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -18,8 +19,6 @@</div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HAVE_ARM_TWD</div><div class='del'>-static DEFINE_TWD_LOCAL_TIMER(u5500_twd_local_timer,</div><div class='del'>-			      U5500_TWD_BASE, IRQ_LOCALTIMER);</div><div class='ctx'> static DEFINE_TWD_LOCAL_TIMER(u8500_twd_local_timer,</div><div class='ctx'> 			      U8500_TWD_BASE, IRQ_LOCALTIMER);</div><div class='ctx'> </div><div class='hunk'>@@ -28,8 +27,8 @@ static void __init ux500_twd_init(void)</div><div class='ctx'> 	struct twd_local_timer *twd_local_timer;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	twd_local_timer = cpu_is_u5500() ? &amp;u5500_twd_local_timer :</div><div class='del'>-					   &amp;u8500_twd_local_timer;</div><div class='add'>+	/* Use this to switch local timer base if changed in new ASICs */</div><div class='add'>+	twd_local_timer = &amp;u8500_twd_local_timer;</div><div class='ctx'> </div><div class='ctx'> 	if (of_have_populated_dt())</div><div class='ctx'> 		twd_local_timer_of_register();</div><div class='hunk'>@@ -43,21 +42,41 @@ static void __init ux500_twd_init(void)</div><div class='ctx'> #define ux500_twd_init()	do { } while(0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+const static struct of_device_id prcmu_timer_of_match[] __initconst = {</div><div class='add'>+	{ .compatible = "stericsson,db8500-prcmu-timer-4", },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void __init ux500_timer_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *mtu_timer_base;</div><div class='ctx'> 	void __iomem *prcmu_timer_base;</div><div class='add'>+	void __iomem *tmp_base;</div><div class='add'>+	struct device_node *np;</div><div class='ctx'> </div><div class='del'>-	if (cpu_is_u5500()) {</div><div class='del'>-		mtu_timer_base = __io_address(U5500_MTU0_BASE);</div><div class='del'>-		prcmu_timer_base = __io_address(U5500_PRCMU_TIMER_3_BASE);</div><div class='del'>-	} else if (cpu_is_u8500()) {</div><div class='add'>+	if (cpu_is_u8500_family()) {</div><div class='ctx'> 		mtu_timer_base = __io_address(U8500_MTU0_BASE);</div><div class='ctx'> 		prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ux500_unknown_soc();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* TODO: Once MTU has been DT:ed place code above into else. */</div><div class='add'>+	if (of_have_populated_dt()) {</div><div class='add'>+		np = of_find_matching_node(NULL, prcmu_timer_of_match);</div><div class='add'>+		if (!np)</div><div class='add'>+			goto dt_fail;</div><div class='add'>+</div><div class='add'>+		tmp_base = of_iomap(np, 0);</div><div class='add'>+		if (!tmp_base)</div><div class='add'>+			goto dt_fail;</div><div class='add'>+</div><div class='add'>+		prcmu_timer_base = tmp_base;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+dt_fail:</div><div class='add'>+	/* Doing it the old fashioned way. */</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Here we register the timerblocks active in the system.</div><div class='ctx'> 	 * Localtimers (twd) is started when both cpu is up and running.</div><div class='hunk'>@@ -70,7 +89,7 @@ static void __init ux500_timer_init(void)</div><div class='ctx'> 	 * depending on delay which is not yet calibrated. RTC-RTT is in the</div><div class='ctx'> 	 * always-on powerdomain and is used as clockevent instead of twd when</div><div class='ctx'> 	 * sleeping.</div><div class='del'>-	 * The PRCMU timer 4(3 for DB5500) register a clocksource and</div><div class='add'>+	 * The PRCMU timer 4 register a clocksource and</div><div class='ctx'> 	 * sched_clock with higher rating then MTU since is always-on.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c<br/>index 6bbd74e950ab..cf4687ee2a7b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-versatile/core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-versatile/core.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-versatile/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-versatile/core.c</a></div><div class='hunk'>@@ -66,12 +66,6 @@</div><div class='ctx'> #define VA_VIC_BASE		__io_address(VERSATILE_VIC_BASE)</div><div class='ctx'> #define VA_SIC_BASE		__io_address(VERSATILE_SIC_BASE)</div><div class='ctx'> </div><div class='del'>-static struct fpga_irq_data sic_irq = {</div><div class='del'>-	.base		= VA_SIC_BASE,</div><div class='del'>-	.irq_start	= IRQ_SIC_START,</div><div class='del'>-	.chip.name	= "SIC",</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #if 1</div><div class='ctx'> #define IRQ_MMCI0A	IRQ_VICSOURCE22</div><div class='ctx'> #define IRQ_AACI	IRQ_VICSOURCE24</div><div class='hunk'>@@ -105,8 +99,11 @@ void __init versatile_init_irq(void)</div><div class='ctx'> </div><div class='ctx'> 	writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);</div><div class='ctx'> </div><div class='del'>-	fpga_irq_init(IRQ_VICSOURCE31, ~PIC_MASK, &amp;sic_irq);</div><div class='del'>-	irq_domain_generate_simple(sic_of_match, VERSATILE_SIC_BASE, IRQ_SIC_START);</div><div class='add'>+	np = of_find_matching_node_by_address(NULL, sic_of_match,</div><div class='add'>+					      VERSATILE_SIC_BASE);</div><div class='add'>+</div><div class='add'>+	fpga_irq_init(VA_SIC_BASE, "SIC", IRQ_SIC_START,</div><div class='add'>+		IRQ_VICSOURCE31, ~PIC_MASK, np);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Interrupts on secondary controller from 0 to 8 are routed to</div><div class='hunk'>@@ -666,17 +663,18 @@ static struct amba_device *amba_devs[] __initdata = {</div><div class='ctx'>  * having a specific name.</div><div class='ctx'>  */</div><div class='ctx'> struct of_dev_auxdata versatile_auxdata_lookup[] __initdata = {</div><div class='del'>-	OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI0_BASE, "fpga:05", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI0_BASE, "fpga:05", &amp;mmc0_plat_data),</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,primecell", VERSATILE_KMI0_BASE, "fpga:06", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,primecell", VERSATILE_KMI1_BASE, "fpga:07", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART3_BASE, "fpga:09", NULL),</div><div class='add'>+	/* FIXME: this is buggy, the platform data is needed for this MMC instance too */</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI1_BASE, "fpga:0b", NULL),</div><div class='ctx'> </div><div class='ctx'> 	OF_DEV_AUXDATA("arm,primecell", VERSATILE_CLCD_BASE, "dev:20", &amp;clcd_plat_data),</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART0_BASE, "dev:f1", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART1_BASE, "dev:f2", NULL),</div><div class='ctx'> 	OF_DEV_AUXDATA("arm,primecell", VERSATILE_UART2_BASE, "dev:f3", NULL),</div><div class='del'>-	OF_DEV_AUXDATA("arm,primecell", VERSATILE_SSP_BASE, "dev:f4", NULL),</div><div class='add'>+	OF_DEV_AUXDATA("arm,primecell", VERSATILE_SSP_BASE, "dev:f4", &amp;ssp0_plat_data),</div><div class='ctx'> </div><div class='ctx'> #if 0</div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c<br/>index d2268be8c34c..15c6a00000ec 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-versatile/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-versatile/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-versatile/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-versatile/pci.c</a></div><div class='hunk'>@@ -303,12 +303,6 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-struct pci_bus * __init pci_versatile_scan_bus(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	return pci_scan_root_bus(NULL, sys-&gt;busnr, &amp;pci_versatile_ops, sys,</div><div class='del'>-				 &amp;sys-&gt;resources);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init pci_versatile_preinit(void)</div><div class='ctx'> {</div><div class='ctx'> 	pcibios_min_io = 0x44000000;</div><div class='hunk'>@@ -339,19 +333,16 @@ static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> 	 *  26     1     29</div><div class='ctx'> 	 *  27     1     30</div><div class='ctx'> 	 */</div><div class='del'>-	irq = 27 + ((slot + pin - 1) &amp; 3);</div><div class='del'>-</div><div class='del'>-	printk("PCI map irq: slot %d, pin %d, devslot %d, irq: %d\n",slot,pin,devslot,irq);</div><div class='add'>+	irq = 27 + ((slot - 24 + pin - 1) &amp; 3);</div><div class='ctx'> </div><div class='ctx'> 	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hw_pci versatile_pci __initdata = {</div><div class='del'>-	.swizzle		= NULL,</div><div class='ctx'> 	.map_irq		= versatile_map_irq,</div><div class='ctx'> 	.nr_controllers		= 1,</div><div class='add'>+	.ops			= &amp;pci_versatile_ops,</div><div class='ctx'> 	.setup			= pci_versatile_setup,</div><div class='del'>-	.scan			= pci_versatile_scan_bus,</div><div class='ctx'> 	.preinit		= pci_versatile_preinit,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c<br/>index 47cdcca5a7e7..fde26adaef32 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mach-vexpress/v2m.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mach-vexpress/v2m.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mach-vexpress/v2m.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mach-vexpress/v2m.c</a></div><div class='hunk'>@@ -14,13 +14,14 @@</div><div class='ctx'> #include &lt;linux/ata_platform.h&gt;</div><div class='ctx'> #include &lt;linux/smsc911x.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/usb/isp1760.h&gt;</div><div class='ctx'> #include &lt;linux/clkdev.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/arch_timer.h&gt;</div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/sizes.h&gt;</div><div class='add'>+#include &lt;asm/smp_twd.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='ctx'> #include &lt;asm/mach/map.h&gt;</div><div class='ctx'> #include &lt;asm/mach/time.h&gt;</div><div class='hunk'>@@ -29,7 +30,6 @@</div><div class='ctx'> #include &lt;asm/hardware/gic.h&gt;</div><div class='ctx'> #include &lt;asm/hardware/timer-sp.h&gt;</div><div class='ctx'> #include &lt;asm/hardware/sp810.h&gt;</div><div class='del'>-#include &lt;asm/hardware/gic.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/ct-ca9x4.h&gt;</div><div class='ctx'> #include &lt;mach/motherboard.h&gt;</div><div class='hunk'>@@ -616,7 +616,6 @@ void __init v2m_dt_init_early(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	clkdev_add_table(v2m_dt_lookups, ARRAY_SIZE(v2m_dt_lookups));</div><div class='del'>-	versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static  struct of_device_id vexpress_irq_match[] __initdata = {</div><div class='hunk'>@@ -643,6 +642,11 @@ static void __init v2m_dt_timer_init(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	node = of_find_node_by_path(path);</div><div class='ctx'> 	v2m_sp804_init(of_iomap(node, 0), irq_of_parse_and_map(node, 0));</div><div class='add'>+	if (arch_timer_of_register() != 0)</div><div class='add'>+		twd_local_timer_of_register();</div><div class='add'>+</div><div class='add'>+	if (arch_timer_sched_clock_init() != 0)</div><div class='add'>+		versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct sys_timer v2m_dt_timer = {</div><div class='head'>diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig<br/>index 7c8a7d8467bf..101b9681c08c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/Kconfig</a></div><div class='hunk'>@@ -4,23 +4,6 @@ comment "Processor Type"</div><div class='ctx'> # which CPUs we support in the kernel image, and the compiler instruction</div><div class='ctx'> # optimiser behaviour.</div><div class='ctx'> </div><div class='del'>-# ARM610</div><div class='del'>-config CPU_ARM610</div><div class='del'>-	bool "Support ARM610 processor" if ARCH_RPC</div><div class='del'>-	select CPU_32v3</div><div class='del'>-	select CPU_CACHE_V3</div><div class='del'>-	select CPU_CACHE_VIVT</div><div class='del'>-	select CPU_CP15_MMU</div><div class='del'>-	select CPU_COPY_V3 if MMU</div><div class='del'>-	select CPU_TLB_V3 if MMU</div><div class='del'>-	select CPU_PABRT_LEGACY</div><div class='del'>-	help</div><div class='del'>-	  The ARM610 is the successor to the ARM3 processor</div><div class='del'>-	  and was produced by VLSI Technology Inc.</div><div class='del'>-</div><div class='del'>-	  Say Y if you want support for the ARM610 processor.</div><div class='del'>-	  Otherwise, say N.</div><div class='del'>-</div><div class='ctx'> # ARM7TDMI</div><div class='ctx'> config CPU_ARM7TDMI</div><div class='ctx'> 	bool "Support ARM7TDMI processor"</div><div class='hunk'>@@ -36,25 +19,6 @@ config CPU_ARM7TDMI</div><div class='ctx'> 	  Say Y if you want support for the ARM7TDMI processor.</div><div class='ctx'> 	  Otherwise, say N.</div><div class='ctx'> </div><div class='del'>-# ARM710</div><div class='del'>-config CPU_ARM710</div><div class='del'>-	bool "Support ARM710 processor" if ARCH_RPC</div><div class='del'>-	select CPU_32v3</div><div class='del'>-	select CPU_CACHE_V3</div><div class='del'>-	select CPU_CACHE_VIVT</div><div class='del'>-	select CPU_CP15_MMU</div><div class='del'>-	select CPU_COPY_V3 if MMU</div><div class='del'>-	select CPU_TLB_V3 if MMU</div><div class='del'>-	select CPU_PABRT_LEGACY</div><div class='del'>-	help</div><div class='del'>-	  A 32-bit RISC microprocessor based on the ARM7 processor core</div><div class='del'>-	  designed by Advanced RISC Machines Ltd. The ARM710 is the</div><div class='del'>-	  successor to the ARM610 processor. It was released in</div><div class='del'>-	  July 1994 by VLSI Technology Inc.</div><div class='del'>-</div><div class='del'>-	  Say Y if you want support for the ARM710 processor.</div><div class='del'>-	  Otherwise, say N.</div><div class='del'>-</div><div class='ctx'> # ARM720T</div><div class='ctx'> config CPU_ARM720T</div><div class='ctx'> 	bool "Support ARM720T processor" if ARCH_INTEGRATOR</div><div class='hunk'>@@ -530,9 +494,6 @@ config CPU_CACHE_FA</div><div class='ctx'> </div><div class='ctx'> if MMU</div><div class='ctx'> # The copy-page model</div><div class='del'>-config CPU_COPY_V3</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> config CPU_COPY_V4WT</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='hunk'>@@ -549,11 +510,6 @@ config CPU_COPY_V6</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='ctx'> # This selects the TLB model</div><div class='del'>-config CPU_TLB_V3</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  ARM Architecture Version 3 TLB.</div><div class='del'>-</div><div class='ctx'> config CPU_TLB_V4WT</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='hunk'>@@ -731,7 +687,7 @@ config CPU_HIGH_VECTOR</div><div class='ctx'> </div><div class='ctx'> config CPU_ICACHE_DISABLE</div><div class='ctx'> 	bool "Disable I-Cache (I-bit)"</div><div class='del'>-	depends on CPU_CP15 &amp;&amp; !(CPU_ARM610 || CPU_ARM710 || CPU_ARM720T || CPU_ARM740T || CPU_XSCALE || CPU_XSC3)</div><div class='add'>+	depends on CPU_CP15 &amp;&amp; !(CPU_ARM720T || CPU_ARM740T || CPU_XSCALE || CPU_XSC3)</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here to disable the processor instruction cache. Unless</div><div class='ctx'> 	  you have a reason not to or are unsure, say N.</div><div class='head'>diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile<br/>index bca7e61928c7..8a9c4cb50a93 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/Makefile</a></div><div class='hunk'>@@ -44,7 +44,6 @@ obj-$(CONFIG_CPU_CACHE_FA)	+= cache-fa.o</div><div class='ctx'> AFLAGS_cache-v6.o	:=-Wa,-march=armv6</div><div class='ctx'> AFLAGS_cache-v7.o	:=-Wa,-march=armv7-a</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CPU_COPY_V3)	+= copypage-v3.o</div><div class='ctx'> obj-$(CONFIG_CPU_COPY_V4WT)	+= copypage-v4wt.o</div><div class='ctx'> obj-$(CONFIG_CPU_COPY_V4WB)	+= copypage-v4wb.o</div><div class='ctx'> obj-$(CONFIG_CPU_COPY_FEROCEON)	+= copypage-feroceon.o</div><div class='hunk'>@@ -54,7 +53,6 @@ obj-$(CONFIG_CPU_XSCALE)	+= copypage-xscale.o</div><div class='ctx'> obj-$(CONFIG_CPU_XSC3)		+= copypage-xsc3.o</div><div class='ctx'> obj-$(CONFIG_CPU_COPY_FA)	+= copypage-fa.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CPU_TLB_V3)	+= tlb-v3.o</div><div class='ctx'> obj-$(CONFIG_CPU_TLB_V4WT)	+= tlb-v4.o</div><div class='ctx'> obj-$(CONFIG_CPU_TLB_V4WB)	+= tlb-v4wb.o</div><div class='ctx'> obj-$(CONFIG_CPU_TLB_V4WBI)	+= tlb-v4wbi.o</div><div class='hunk'>@@ -66,8 +64,6 @@ obj-$(CONFIG_CPU_TLB_FA)	+= tlb-fa.o</div><div class='ctx'> AFLAGS_tlb-v6.o		:=-Wa,-march=armv6</div><div class='ctx'> AFLAGS_tlb-v7.o		:=-Wa,-march=armv7-a</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CPU_ARM610)	+= proc-arm6_7.o</div><div class='del'>-obj-$(CONFIG_CPU_ARM710)	+= proc-arm6_7.o</div><div class='ctx'> obj-$(CONFIG_CPU_ARM7TDMI)	+= proc-arm7tdmi.o</div><div class='ctx'> obj-$(CONFIG_CPU_ARM720T)	+= proc-arm720.o</div><div class='ctx'> obj-$(CONFIG_CPU_ARM740T)	+= proc-arm740.o</div><div class='head'>diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S<br/>index ff1f7cc11f87..80741992a9fc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/abort-ev6.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/abort-ev6.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/abort-ev6.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/abort-ev6.S</a></div><div class='hunk'>@@ -26,18 +26,23 @@ ENTRY(v6_early_abort)</div><div class='ctx'> 	mrc	p15, 0, r1, c5, c0, 0		@ get FSR</div><div class='ctx'> 	mrc	p15, 0, r0, c6, c0, 0		@ get FAR</div><div class='ctx'> /*</div><div class='del'>- * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR (erratum 326103).</div><div class='del'>- * The test below covers all the write situations, including Java bytecodes</div><div class='add'>+ * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR.</div><div class='ctx'>  */</div><div class='del'>-	bic	r1, r1, #1 &lt;&lt; 11		@ clear bit 11 of FSR</div><div class='add'>+#ifdef CONFIG_ARM_ERRATA_326103</div><div class='add'>+	ldr	ip, =0x4107b36</div><div class='add'>+	mrc	p15, 0, r3, c0, c0, 0		@ get processor id</div><div class='add'>+	teq	ip, r3, lsr #4			@ r0 ARM1136?</div><div class='add'>+	bne	do_DataAbort</div><div class='ctx'> 	tst	r5, #PSR_J_BIT			@ Java?</div><div class='add'>+	tsteq	r5, #PSR_T_BIT			@ Thumb?</div><div class='ctx'> 	bne	do_DataAbort</div><div class='del'>-	do_thumb_abort fsr=r1, pc=r4, psr=r5, tmp=r3</div><div class='del'>-	ldreq	r3, [r4]			@ read aborted ARM instruction</div><div class='add'>+	bic	r1, r1, #1 &lt;&lt; 11		@ clear bit 11 of FSR</div><div class='add'>+	ldr	r3, [r4]			@ read aborted ARM instruction</div><div class='ctx'> #ifdef CONFIG_CPU_ENDIAN_BE8</div><div class='del'>-	reveq	r3, r3</div><div class='add'>+	rev	r3, r3</div><div class='ctx'> #endif</div><div class='ctx'> 	do_ldrd_abort tmp=ip, insn=r3</div><div class='ctx'> 	tst	r3, #1 &lt;&lt; 20			@ L = 0 -&gt; write</div><div class='ctx'> 	orreq	r1, r1, #1 &lt;&lt; 11		@ yes.</div><div class='add'>+#endif</div><div class='ctx'> 	b	do_DataAbort</div><div class='head'>diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c<br/>index a53fd2aaa2f4..2a8e380501e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/cache-l2x0.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/cache-l2x0.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/cache-l2x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-l2x0.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@ static void __iomem *l2x0_base;</div><div class='ctx'> static DEFINE_RAW_SPINLOCK(l2x0_lock);</div><div class='ctx'> static u32 l2x0_way_mask;	/* Bitmask of active ways */</div><div class='ctx'> static u32 l2x0_size;</div><div class='add'>+static unsigned long sync_reg_offset = L2X0_CACHE_SYNC;</div><div class='ctx'> </div><div class='ctx'> struct l2x0_regs l2x0_saved_regs;</div><div class='ctx'> </div><div class='hunk'>@@ -61,12 +62,7 @@ static inline void cache_sync(void)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *base = l2x0_base;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PL310_ERRATA_753970</div><div class='del'>-	/* write to an unmmapped register */</div><div class='del'>-	writel_relaxed(0, base + L2X0_DUMMY_REG);</div><div class='del'>-#else</div><div class='del'>-	writel_relaxed(0, base + L2X0_CACHE_SYNC);</div><div class='del'>-#endif</div><div class='add'>+	writel_relaxed(0, base + sync_reg_offset);</div><div class='ctx'> 	cache_wait(base + L2X0_CACHE_SYNC, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -85,10 +81,13 @@ static inline void l2x0_inv_line(unsigned long addr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915)</div><div class='add'>+static inline void debug_writel(unsigned long val)</div><div class='add'>+{</div><div class='add'>+	if (outer_cache.set_debug)</div><div class='add'>+		outer_cache.set_debug(val);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#define debug_writel(val)	outer_cache.set_debug(val)</div><div class='del'>-</div><div class='del'>-static void l2x0_set_debug(unsigned long val)</div><div class='add'>+static void pl310_set_debug(unsigned long val)</div><div class='ctx'> {</div><div class='ctx'> 	writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL);</div><div class='ctx'> }</div><div class='hunk'>@@ -98,7 +97,7 @@ static inline void debug_writel(unsigned long val)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define l2x0_set_debug	NULL</div><div class='add'>+#define pl310_set_debug	NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PL310_ERRATA_588369</div><div class='hunk'>@@ -331,6 +330,11 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)</div><div class='ctx'> 		else</div><div class='ctx'> 			ways = 8;</div><div class='ctx'> 		type = "L310";</div><div class='add'>+#ifdef CONFIG_PL310_ERRATA_753970</div><div class='add'>+		/* Unmapped register. */</div><div class='add'>+		sync_reg_offset = L2X0_DUMMY_REG;</div><div class='add'>+#endif</div><div class='add'>+		outer_cache.set_debug = pl310_set_debug;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case L2X0_CACHE_ID_PART_L210:</div><div class='ctx'> 		ways = (aux &gt;&gt; 13) &amp; 0xf;</div><div class='hunk'>@@ -379,7 +383,6 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)</div><div class='ctx'> 	outer_cache.flush_all = l2x0_flush_all;</div><div class='ctx'> 	outer_cache.inv_all = l2x0_inv_all;</div><div class='ctx'> 	outer_cache.disable = l2x0_disable;</div><div class='del'>-	outer_cache.set_debug = l2x0_set_debug;</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO "%s cache controller enabled\n", type);</div><div class='ctx'> 	printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n",</div><div class='head'>diff --git a/arch/arm/mm/cache-tauros2.c b/arch/arm/mm/cache-tauros2.c<br/>index 1fbca05fe906..23a7643e9a87 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/cache-tauros2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/cache-tauros2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/cache-tauros2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-tauros2.c</a></div><div class='hunk'>@@ -108,6 +108,26 @@ static void tauros2_flush_range(unsigned long start, unsigned long end)</div><div class='ctx'> </div><div class='ctx'> 	dsb();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void tauros2_disable(void)</div><div class='add'>+{</div><div class='add'>+	__asm__ __volatile__ (</div><div class='add'>+	"mcr	p15, 1, %0, c7, c11, 0 @L2 Cache Clean All\n\t"</div><div class='add'>+	"mrc	p15, 0, %0, c1, c0, 0\n\t"</div><div class='add'>+	"bic	%0, %0, #(1 &lt;&lt; 26)\n\t"</div><div class='add'>+	"mcr	p15, 0, %0, c1, c0, 0  @Disable L2 Cache\n\t"</div><div class='add'>+	: : "r" (0x0));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tauros2_resume(void)</div><div class='add'>+{</div><div class='add'>+	__asm__ __volatile__ (</div><div class='add'>+	"mcr	p15, 1, %0, c7, c7, 0 @L2 Cache Invalidate All\n\t"</div><div class='add'>+	"mrc	p15, 0, %0, c1, c0, 0\n\t"</div><div class='add'>+	"orr	%0, %0, #(1 &lt;&lt; 26)\n\t"</div><div class='add'>+	"mcr	p15, 0, %0, c1, c0, 0 @Enable L2 Cache\n\t"</div><div class='add'>+	: : "r" (0x0));</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static inline u32 __init read_extra_features(void)</div><div class='hunk'>@@ -194,6 +214,8 @@ void __init tauros2_init(void)</div><div class='ctx'> 		outer_cache.inv_range = tauros2_inv_range;</div><div class='ctx'> 		outer_cache.clean_range = tauros2_clean_range;</div><div class='ctx'> 		outer_cache.flush_range = tauros2_flush_range;</div><div class='add'>+		outer_cache.disable = tauros2_disable;</div><div class='add'>+		outer_cache.resume = tauros2_resume;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -219,6 +241,8 @@ void __init tauros2_init(void)</div><div class='ctx'> 		outer_cache.inv_range = tauros2_inv_range;</div><div class='ctx'> 		outer_cache.clean_range = tauros2_clean_range;</div><div class='ctx'> 		outer_cache.flush_range = tauros2_flush_range;</div><div class='add'>+		outer_cache.disable = tauros2_disable;</div><div class='add'>+		outer_cache.resume = tauros2_resume;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S<br/>index c2301f226100..52e35f32eefb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/cache-v3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/cache-v3.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/cache-v3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-v3.S</a></div><div class='hunk'>@@ -78,6 +78,7 @@ ENTRY(v3_coherent_kern_range)</div><div class='ctx'>  *	- end	 - virtual end address</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(v3_coherent_user_range)</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S<br/>index fd9bb7addc8d..022135d2b7e4 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/cache-v4.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/cache-v4.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/cache-v4.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-v4.S</a></div><div class='hunk'>@@ -88,6 +88,7 @@ ENTRY(v4_coherent_kern_range)</div><div class='ctx'>  *	- end	 - virtual end address</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(v4_coherent_user_range)</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S<br/>index 4f2c14151ccb..8f1eeae340c8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/cache-v4wb.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/cache-v4wb.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/cache-v4wb.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-v4wb.S</a></div><div class='hunk'>@@ -167,9 +167,9 @@ ENTRY(v4wb_coherent_user_range)</div><div class='ctx'> 	add	r0, r0, #CACHE_DLINESIZE</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='del'>-	mov	ip, #0</div><div class='del'>-	mcr	p15, 0, ip, c7, c5, 0		@ invalidate I cache</div><div class='del'>-	mcr	p15, 0, ip, c7, c10, 4		@ drain WB</div><div class='add'>+	mov	r0, #0</div><div class='add'>+	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache</div><div class='add'>+	mcr	p15, 0, r0, c7, c10, 4		@ drain WB</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S<br/>index 4d7b467631ce..b34a5f908a82 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/cache-v4wt.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/cache-v4wt.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/cache-v4wt.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-v4wt.S</a></div><div class='hunk'>@@ -125,6 +125,7 @@ ENTRY(v4wt_coherent_user_range)</div><div class='ctx'> 	add	r0, r0, #CACHE_DLINESIZE</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S<br/>index 74c2e5a33a4d..4b10760c56d6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/cache-v6.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/cache-v6.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/cache-v6.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-v6.S</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;asm/assembler.h&gt;</div><div class='add'>+#include &lt;asm/errno.h&gt;</div><div class='ctx'> #include &lt;asm/unwind.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "proc-macros.S"</div><div class='hunk'>@@ -135,7 +136,6 @@ ENTRY(v6_coherent_user_range)</div><div class='ctx'> 1:</div><div class='ctx'>  USER(	mcr	p15, 0, r0, c7, c10, 1	)	@ clean D line</div><div class='ctx'> 	add	r0, r0, #CACHE_LINE_SIZE</div><div class='del'>-2:</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='ctx'> #endif</div><div class='hunk'>@@ -154,13 +154,11 @@ ENTRY(v6_coherent_user_range)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Fault handling for the cache operation above. If the virtual address in r0</div><div class='del'>- * isn't mapped, just try the next page.</div><div class='add'>+ * isn't mapped, fail with -EFAULT.</div><div class='ctx'>  */</div><div class='ctx'> 9001:</div><div class='del'>-	mov	r0, r0, lsr #12</div><div class='del'>-	mov	r0, r0, lsl #12</div><div class='del'>-	add	r0, r0, #4096</div><div class='del'>-	b	2b</div><div class='add'>+	mov	r0, #-EFAULT</div><div class='add'>+	mov	pc, lr</div><div class='ctx'>  UNWIND(.fnend		)</div><div class='ctx'> ENDPROC(v6_coherent_user_range)</div><div class='ctx'> ENDPROC(v6_coherent_kern_range)</div><div class='head'>diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S<br/>index a655d3da386d..39e3fb3db801 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/cache-v7.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/cache-v7.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/cache-v7.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/cache-v7.S</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;asm/assembler.h&gt;</div><div class='add'>+#include &lt;asm/errno.h&gt;</div><div class='ctx'> #include &lt;asm/unwind.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "proc-macros.S"</div><div class='hunk'>@@ -198,7 +199,6 @@ ENTRY(v7_coherent_user_range)</div><div class='ctx'> 	add	r12, r12, r2</div><div class='ctx'> 	cmp	r12, r1</div><div class='ctx'> 	blo	2b</div><div class='del'>-3:</div><div class='ctx'> 	mov	r0, #0</div><div class='ctx'> 	ALT_SMP(mcr	p15, 0, r0, c7, c1, 6)	@ invalidate BTB Inner Shareable</div><div class='ctx'> 	ALT_UP(mcr	p15, 0, r0, c7, c5, 6)	@ invalidate BTB</div><div class='hunk'>@@ -208,13 +208,11 @@ ENTRY(v7_coherent_user_range)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Fault handling for the cache operation above. If the virtual address in r0</div><div class='del'>- * isn't mapped, just try the next page.</div><div class='add'>+ * isn't mapped, fail with -EFAULT.</div><div class='ctx'>  */</div><div class='ctx'> 9001:</div><div class='del'>-	mov	r12, r12, lsr #12</div><div class='del'>-	mov	r12, r12, lsl #12</div><div class='del'>-	add	r12, r12, #4096</div><div class='del'>-	b	3b</div><div class='add'>+	mov	r0, #-EFAULT</div><div class='add'>+	mov	pc, lr</div><div class='ctx'>  UNWIND(.fnend		)</div><div class='ctx'> ENDPROC(v7_coherent_kern_range)</div><div class='ctx'> ENDPROC(v7_coherent_user_range)</div><div class='head'>diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c<br/>index ee9bb363d606..806cc4f63516 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/context.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/context.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/context.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/context.c</a></div><div class='hunk'>@@ -18,30 +18,39 @@</div><div class='ctx'> </div><div class='ctx'> static DEFINE_RAW_SPINLOCK(cpu_asid_lock);</div><div class='ctx'> unsigned int cpu_last_asid = ASID_FIRST_VERSION;</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-DEFINE_PER_CPU(struct mm_struct *, current_mm);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARM_LPAE</div><div class='del'>-#define cpu_set_asid(asid) {						\</div><div class='del'>-	unsigned long ttbl, ttbh;					\</div><div class='del'>-	asm volatile(							\</div><div class='del'>-	"	mrrc	p15, 0, %0, %1, c2		@ read TTBR0\n"	\</div><div class='del'>-	"	mov	%1, %2, lsl #(48 - 32)		@ set ASID\n"	\</div><div class='del'>-	"	mcrr	p15, 0, %0, %1, c2		@ set TTBR0\n"	\</div><div class='del'>-	: "=&amp;r" (ttbl), "=&amp;r" (ttbh)					\</div><div class='del'>-	: "r" (asid &amp; ~ASID_MASK));					\</div><div class='add'>+void cpu_set_reserved_ttbr0(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long ttbl = __pa(swapper_pg_dir);</div><div class='add'>+	unsigned long ttbh = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set TTBR0 to swapper_pg_dir which contains only global entries. The</div><div class='add'>+	 * ASID is set to 0.</div><div class='add'>+	 */</div><div class='add'>+	asm volatile(</div><div class='add'>+	"	mcrr	p15, 0, %0, %1, c2		@ set TTBR0\n"</div><div class='add'>+	:</div><div class='add'>+	: "r" (ttbl), "r" (ttbh));</div><div class='add'>+	isb();</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='del'>-#define cpu_set_asid(asid) \</div><div class='del'>-	asm("	mcr	p15, 0, %0, c13, c0, 1\n" : : "r" (asid))</div><div class='add'>+void cpu_set_reserved_ttbr0(void)</div><div class='add'>+{</div><div class='add'>+	u32 ttb;</div><div class='add'>+	/* Copy TTBR1 into TTBR0 */</div><div class='add'>+	asm volatile(</div><div class='add'>+	"	mrc	p15, 0, %0, c2, c0, 1		@ read TTBR1\n"</div><div class='add'>+	"	mcr	p15, 0, %0, c2, c0, 0		@ set TTBR0\n"</div><div class='add'>+	: "=r" (ttb));</div><div class='add'>+	isb();</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * We fork()ed a process, and we need a new context for the child</div><div class='del'>- * to run in.  We reserve version 0 for initial tasks so we will</div><div class='del'>- * always allocate an ASID. The ASID 0 is reserved for the TTBR</div><div class='del'>- * register changing sequence.</div><div class='add'>+ * to run in.</div><div class='ctx'>  */</div><div class='ctx'> void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)</div><div class='ctx'> {</div><div class='hunk'>@@ -51,9 +60,7 @@ void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)</div><div class='ctx'> </div><div class='ctx'> static void flush_context(void)</div><div class='ctx'> {</div><div class='del'>-	/* set the reserved ASID before flushing the TLB */</div><div class='del'>-	cpu_set_asid(0);</div><div class='del'>-	isb();</div><div class='add'>+	cpu_set_reserved_ttbr0();</div><div class='ctx'> 	local_flush_tlb_all();</div><div class='ctx'> 	if (icache_is_vivt_asid_tagged()) {</div><div class='ctx'> 		__flush_icache_all();</div><div class='hunk'>@@ -98,14 +105,7 @@ static void reset_context(void *info)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int asid;</div><div class='ctx'> 	unsigned int cpu = smp_processor_id();</div><div class='del'>-	struct mm_struct *mm = per_cpu(current_mm, cpu);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Check if a current_mm was set on this CPU as it might still</div><div class='del'>-	 * be in the early booting stages and using the reserved ASID.</div><div class='del'>-	 */</div><div class='del'>-	if (!mm)</div><div class='del'>-		return;</div><div class='add'>+	struct mm_struct *mm = current-&gt;active_mm;</div><div class='ctx'> </div><div class='ctx'> 	smp_rmb();</div><div class='ctx'> 	asid = cpu_last_asid + cpu + 1;</div><div class='hunk'>@@ -114,8 +114,7 @@ static void reset_context(void *info)</div><div class='ctx'> 	set_mm_context(mm, asid);</div><div class='ctx'> </div><div class='ctx'> 	/* set the new ASID */</div><div class='del'>-	cpu_set_asid(mm-&gt;context.id);</div><div class='del'>-	isb();</div><div class='add'>+	cpu_switch_mm(mm-&gt;pgd, mm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/arm/mm/copypage-v3.c b/arch/arm/mm/copypage-v3.c<br/>deleted file mode 100644<br/>index 3935bddd4769..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/copypage-v3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/copypage-v3.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,81 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/arm/mm/copypage-v3.c</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1995-1999 Russell King</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/highmem.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ARMv3 optimised copy_user_highpage</div><div class='del'>- *</div><div class='del'>- * FIXME: do we need to handle cache stuff...</div><div class='del'>- */</div><div class='del'>-static void __naked</div><div class='del'>-v3_copy_user_page(void *kto, const void *kfrom)</div><div class='del'>-{</div><div class='del'>-	asm("\n\</div><div class='del'>-	stmfd	sp!, {r4, lr}			@	2\n\</div><div class='del'>-	mov	r2, %2				@	1\n\</div><div class='del'>-	ldmia	%0!, {r3, r4, ip, lr}		@	4+1\n\</div><div class='del'>-1:	stmia	%1!, {r3, r4, ip, lr}		@	4\n\</div><div class='del'>-	ldmia	%0!, {r3, r4, ip, lr}		@	4+1\n\</div><div class='del'>-	stmia	%1!, {r3, r4, ip, lr}		@	4\n\</div><div class='del'>-	ldmia	%0!, {r3, r4, ip, lr}		@	4+1\n\</div><div class='del'>-	stmia	%1!, {r3, r4, ip, lr}		@	4\n\</div><div class='del'>-	ldmia	%0!, {r3, r4, ip, lr}		@	4\n\</div><div class='del'>-	subs	r2, r2, #1			@	1\n\</div><div class='del'>-	stmia	%1!, {r3, r4, ip, lr}		@	4\n\</div><div class='del'>-	ldmneia	%0!, {r3, r4, ip, lr}		@	4\n\</div><div class='del'>-	bne	1b				@	1\n\</div><div class='del'>-	ldmfd	sp!, {r4, pc}			@	3"</div><div class='del'>-	:</div><div class='del'>-	: "r" (kfrom), "r" (kto), "I" (PAGE_SIZE / 64));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void v3_copy_user_highpage(struct page *to, struct page *from,</div><div class='del'>-	unsigned long vaddr, struct vm_area_struct *vma)</div><div class='del'>-{</div><div class='del'>-	void *kto, *kfrom;</div><div class='del'>-</div><div class='del'>-	kto = kmap_atomic(to);</div><div class='del'>-	kfrom = kmap_atomic(from);</div><div class='del'>-	v3_copy_user_page(kto, kfrom);</div><div class='del'>-	kunmap_atomic(kfrom);</div><div class='del'>-	kunmap_atomic(kto);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ARMv3 optimised clear_user_page</div><div class='del'>- *</div><div class='del'>- * FIXME: do we need to handle cache stuff...</div><div class='del'>- */</div><div class='del'>-void v3_clear_user_highpage(struct page *page, unsigned long vaddr)</div><div class='del'>-{</div><div class='del'>-	void *ptr, *kaddr = kmap_atomic(page);</div><div class='del'>-	asm volatile("\n\</div><div class='del'>-	mov	r1, %2				@ 1\n\</div><div class='del'>-	mov	r2, #0				@ 1\n\</div><div class='del'>-	mov	r3, #0				@ 1\n\</div><div class='del'>-	mov	ip, #0				@ 1\n\</div><div class='del'>-	mov	lr, #0				@ 1\n\</div><div class='del'>-1:	stmia	%0!, {r2, r3, ip, lr}		@ 4\n\</div><div class='del'>-	stmia	%0!, {r2, r3, ip, lr}		@ 4\n\</div><div class='del'>-	stmia	%0!, {r2, r3, ip, lr}		@ 4\n\</div><div class='del'>-	stmia	%0!, {r2, r3, ip, lr}		@ 4\n\</div><div class='del'>-	subs	r1, r1, #1			@ 1\n\</div><div class='del'>-	bne	1b				@ 1"</div><div class='del'>-	: "=r" (ptr)</div><div class='del'>-	: "0" (kaddr), "I" (PAGE_SIZE / 64)</div><div class='del'>-	: "r1", "r2", "r3", "ip", "lr");</div><div class='del'>-	kunmap_atomic(kaddr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct cpu_user_fns v3_user_fns __initdata = {</div><div class='del'>-	.cpu_clear_user_highpage = v3_clear_user_highpage,</div><div class='del'>-	.cpu_copy_user_highpage	= v3_copy_user_highpage,</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c<br/>index db23ae4aaaab..106c4c0ebccd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/dma-mapping.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/dma-mapping.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/dma-mapping.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/dma-mapping.c</a></div><div class='hunk'>@@ -17,8 +17,12 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/dma-contiguous.h&gt;</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/iommu.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='ctx'> #include &lt;asm/highmem.h&gt;</div><div class='hunk'>@@ -26,9 +30,112 @@</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/sizes.h&gt;</div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='add'>+#include &lt;asm/dma-iommu.h&gt;</div><div class='add'>+#include &lt;asm/mach/map.h&gt;</div><div class='add'>+#include &lt;asm/system_info.h&gt;</div><div class='add'>+#include &lt;asm/dma-contiguous.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mm.h"</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * The DMA API is built upon the notion of "buffer ownership".  A buffer</div><div class='add'>+ * is either exclusively owned by the CPU (and therefore may be accessed</div><div class='add'>+ * by it) or exclusively owned by the DMA device.  These helper functions</div><div class='add'>+ * represent the transitions between these two ownership states.</div><div class='add'>+ *</div><div class='add'>+ * Note, however, that on later ARMs, this notion does not work due to</div><div class='add'>+ * speculative prefetches.  We model our approach on the assumption that</div><div class='add'>+ * the CPU does do speculative prefetches, which means we clean caches</div><div class='add'>+ * before transfers and delay cache invalidation until transfer completion.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static void __dma_page_cpu_to_dev(struct page *, unsigned long,</div><div class='add'>+		size_t, enum dma_data_direction);</div><div class='add'>+static void __dma_page_dev_to_cpu(struct page *, unsigned long,</div><div class='add'>+		size_t, enum dma_data_direction);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arm_dma_map_page - map a portion of a page for streaming DMA</div><div class='add'>+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='add'>+ * @page: page that buffer resides in</div><div class='add'>+ * @offset: offset into page for start of buffer</div><div class='add'>+ * @size: size of buffer to map</div><div class='add'>+ * @dir: DMA transfer direction</div><div class='add'>+ *</div><div class='add'>+ * Ensure that any data held in the cache is appropriately discarded</div><div class='add'>+ * or written back.</div><div class='add'>+ *</div><div class='add'>+ * The device owns this memory once this call has completed.  The CPU</div><div class='add'>+ * can regain ownership by calling dma_unmap_page().</div><div class='add'>+ */</div><div class='add'>+static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,</div><div class='add'>+	     unsigned long offset, size_t size, enum dma_data_direction dir,</div><div class='add'>+	     struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	if (!arch_is_coherent())</div><div class='add'>+		__dma_page_cpu_to_dev(page, offset, size, dir);</div><div class='add'>+	return pfn_to_dma(dev, page_to_pfn(page)) + offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()</div><div class='add'>+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='add'>+ * @handle: DMA address of buffer</div><div class='add'>+ * @size: size of buffer (same as passed to dma_map_page)</div><div class='add'>+ * @dir: DMA transfer direction (same as passed to dma_map_page)</div><div class='add'>+ *</div><div class='add'>+ * Unmap a page streaming mode DMA translation.  The handle and size</div><div class='add'>+ * must match what was provided in the previous dma_map_page() call.</div><div class='add'>+ * All other usages are undefined.</div><div class='add'>+ *</div><div class='add'>+ * After this call, reads by the CPU to the buffer are guaranteed to see</div><div class='add'>+ * whatever the device wrote there.</div><div class='add'>+ */</div><div class='add'>+static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,</div><div class='add'>+		size_t size, enum dma_data_direction dir,</div><div class='add'>+		struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	if (!arch_is_coherent())</div><div class='add'>+		__dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),</div><div class='add'>+				      handle &amp; ~PAGE_MASK, size, dir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void arm_dma_sync_single_for_cpu(struct device *dev,</div><div class='add'>+		dma_addr_t handle, size_t size, enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset = handle &amp; (PAGE_SIZE - 1);</div><div class='add'>+	struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));</div><div class='add'>+	if (!arch_is_coherent())</div><div class='add'>+		__dma_page_dev_to_cpu(page, offset, size, dir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void arm_dma_sync_single_for_device(struct device *dev,</div><div class='add'>+		dma_addr_t handle, size_t size, enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset = handle &amp; (PAGE_SIZE - 1);</div><div class='add'>+	struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));</div><div class='add'>+	if (!arch_is_coherent())</div><div class='add'>+		__dma_page_cpu_to_dev(page, offset, size, dir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int arm_dma_set_mask(struct device *dev, u64 dma_mask);</div><div class='add'>+</div><div class='add'>+struct dma_map_ops arm_dma_ops = {</div><div class='add'>+	.alloc			= arm_dma_alloc,</div><div class='add'>+	.free			= arm_dma_free,</div><div class='add'>+	.mmap			= arm_dma_mmap,</div><div class='add'>+	.map_page		= arm_dma_map_page,</div><div class='add'>+	.unmap_page		= arm_dma_unmap_page,</div><div class='add'>+	.map_sg			= arm_dma_map_sg,</div><div class='add'>+	.unmap_sg		= arm_dma_unmap_sg,</div><div class='add'>+	.sync_single_for_cpu	= arm_dma_sync_single_for_cpu,</div><div class='add'>+	.sync_single_for_device	= arm_dma_sync_single_for_device,</div><div class='add'>+	.sync_sg_for_cpu	= arm_dma_sync_sg_for_cpu,</div><div class='add'>+	.sync_sg_for_device	= arm_dma_sync_sg_for_device,</div><div class='add'>+	.set_dma_mask		= arm_dma_set_mask,</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL(arm_dma_ops);</div><div class='add'>+</div><div class='ctx'> static u64 get_coherent_dma_mask(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	u64 mask = (u64)arm_dma_limit;</div><div class='hunk'>@@ -56,6 +163,21 @@ static u64 get_coherent_dma_mask(struct device *dev)</div><div class='ctx'> 	return mask;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __dma_clear_buffer(struct page *page, size_t size)</div><div class='add'>+{</div><div class='add'>+	void *ptr;</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure that the allocated pages are zeroed, and that any data</div><div class='add'>+	 * lurking in the kernel direct-mapped region is invalidated.</div><div class='add'>+	 */</div><div class='add'>+	ptr = page_address(page);</div><div class='add'>+	if (ptr) {</div><div class='add'>+		memset(ptr, 0, size);</div><div class='add'>+		dmac_flush_range(ptr, ptr + size);</div><div class='add'>+		outer_flush_range(__pa(ptr), __pa(ptr) + size);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Allocate a DMA buffer for 'dev' of size 'size' using the</div><div class='ctx'>  * specified gfp mask.  Note that 'size' must be page aligned.</div><div class='hunk'>@@ -64,23 +186,6 @@ static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gf</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long order = get_order(size);</div><div class='ctx'> 	struct page *page, *p, *e;</div><div class='del'>-	void *ptr;</div><div class='del'>-	u64 mask = get_coherent_dma_mask(dev);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DMA_API_DEBUG</div><div class='del'>-	u64 limit = (mask + 1) &amp; ~mask;</div><div class='del'>-	if (limit &amp;&amp; size &gt;= limit) {</div><div class='del'>-		dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",</div><div class='del'>-			size, mask);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (!mask)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	if (mask &lt; 0xffffffffULL)</div><div class='del'>-		gfp |= GFP_DMA;</div><div class='ctx'> </div><div class='ctx'> 	page = alloc_pages(gfp, order);</div><div class='ctx'> 	if (!page)</div><div class='hunk'>@@ -93,14 +198,7 @@ static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gf</div><div class='ctx'> 	for (p = page + (size &gt;&gt; PAGE_SHIFT), e = page + (1 &lt;&lt; order); p &lt; e; p++)</div><div class='ctx'> 		__free_page(p);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Ensure that the allocated pages are zeroed, and that any data</div><div class='del'>-	 * lurking in the kernel direct-mapped region is invalidated.</div><div class='del'>-	 */</div><div class='del'>-	ptr = page_address(page);</div><div class='del'>-	memset(ptr, 0, size);</div><div class='del'>-	dmac_flush_range(ptr, ptr + size);</div><div class='del'>-	outer_flush_range(__pa(ptr), __pa(ptr) + size);</div><div class='add'>+	__dma_clear_buffer(page, size);</div><div class='ctx'> </div><div class='ctx'> 	return page;</div><div class='ctx'> }</div><div class='hunk'>@@ -170,6 +268,9 @@ static int __init consistent_init(void)</div><div class='ctx'> 	unsigned long base = consistent_base;</div><div class='ctx'> 	unsigned long num_ptes = (CONSISTENT_END - base) &gt;&gt; PMD_SHIFT;</div><div class='ctx'> </div><div class='add'>+	if (IS_ENABLED(CONFIG_CMA) &amp;&amp; !IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);</div><div class='ctx'> 	if (!consistent_pte) {</div><div class='ctx'> 		pr_err("%s: no memory\n", __func__);</div><div class='hunk'>@@ -184,14 +285,14 @@ static int __init consistent_init(void)</div><div class='ctx'> </div><div class='ctx'> 		pud = pud_alloc(&amp;init_mm, pgd, base);</div><div class='ctx'> 		if (!pud) {</div><div class='del'>-			printk(KERN_ERR "%s: no pud tables\n", __func__);</div><div class='add'>+			pr_err("%s: no pud tables\n", __func__);</div><div class='ctx'> 			ret = -ENOMEM;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		pmd = pmd_alloc(&amp;init_mm, pud, base);</div><div class='ctx'> 		if (!pmd) {</div><div class='del'>-			printk(KERN_ERR "%s: no pmd tables\n", __func__);</div><div class='add'>+			pr_err("%s: no pmd tables\n", __func__);</div><div class='ctx'> 			ret = -ENOMEM;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -199,7 +300,7 @@ static int __init consistent_init(void)</div><div class='ctx'> </div><div class='ctx'> 		pte = pte_alloc_kernel(pmd, base);</div><div class='ctx'> 		if (!pte) {</div><div class='del'>-			printk(KERN_ERR "%s: no pte tables\n", __func__);</div><div class='add'>+			pr_err("%s: no pte tables\n", __func__);</div><div class='ctx'> 			ret = -ENOMEM;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -210,9 +311,101 @@ static int __init consistent_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> core_initcall(consistent_init);</div><div class='ctx'> </div><div class='add'>+static void *__alloc_from_contiguous(struct device *dev, size_t size,</div><div class='add'>+				     pgprot_t prot, struct page **ret_page);</div><div class='add'>+</div><div class='add'>+static struct arm_vmregion_head coherent_head = {</div><div class='add'>+	.vm_lock	= __SPIN_LOCK_UNLOCKED(&amp;coherent_head.vm_lock),</div><div class='add'>+	.vm_list	= LIST_HEAD_INIT(coherent_head.vm_list),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+size_t coherent_pool_size = DEFAULT_CONSISTENT_DMA_SIZE / 8;</div><div class='add'>+</div><div class='add'>+static int __init early_coherent_pool(char *p)</div><div class='add'>+{</div><div class='add'>+	coherent_pool_size = memparse(p, &amp;p);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+early_param("coherent_pool", early_coherent_pool);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initialise the coherent pool for atomic allocations.</div><div class='add'>+ */</div><div class='add'>+static int __init coherent_init(void)</div><div class='add'>+{</div><div class='add'>+	pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);</div><div class='add'>+	size_t size = coherent_pool_size;</div><div class='add'>+	struct page *page;</div><div class='add'>+	void *ptr;</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_CMA))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ptr = __alloc_from_contiguous(NULL, size, prot, &amp;page);</div><div class='add'>+	if (ptr) {</div><div class='add'>+		coherent_head.vm_start = (unsigned long) ptr;</div><div class='add'>+		coherent_head.vm_end = (unsigned long) ptr + size;</div><div class='add'>+		printk(KERN_INFO "DMA: preallocated %u KiB pool for atomic coherent allocations\n",</div><div class='add'>+		       (unsigned)size / 1024);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	printk(KERN_ERR "DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",</div><div class='add'>+	       (unsigned)size / 1024);</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+/*</div><div class='add'>+ * CMA is activated by core_initcall, so we must be called after it.</div><div class='add'>+ */</div><div class='add'>+postcore_initcall(coherent_init);</div><div class='add'>+</div><div class='add'>+struct dma_contig_early_reserve {</div><div class='add'>+	phys_addr_t base;</div><div class='add'>+	unsigned long size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;</div><div class='add'>+</div><div class='add'>+static int dma_mmu_remap_num __initdata;</div><div class='add'>+</div><div class='add'>+void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)</div><div class='add'>+{</div><div class='add'>+	dma_mmu_remap[dma_mmu_remap_num].base = base;</div><div class='add'>+	dma_mmu_remap[dma_mmu_remap_num].size = size;</div><div class='add'>+	dma_mmu_remap_num++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init dma_contiguous_remap(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	for (i = 0; i &lt; dma_mmu_remap_num; i++) {</div><div class='add'>+		phys_addr_t start = dma_mmu_remap[i].base;</div><div class='add'>+		phys_addr_t end = start + dma_mmu_remap[i].size;</div><div class='add'>+		struct map_desc map;</div><div class='add'>+		unsigned long addr;</div><div class='add'>+</div><div class='add'>+		if (end &gt; arm_lowmem_limit)</div><div class='add'>+			end = arm_lowmem_limit;</div><div class='add'>+		if (start &gt;= end)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		map.pfn = __phys_to_pfn(start);</div><div class='add'>+		map.virtual = __phys_to_virt(start);</div><div class='add'>+		map.length = end - start;</div><div class='add'>+		map.type = MT_MEMORY_DMA_READY;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Clear previous low-memory mapping</div><div class='add'>+		 */</div><div class='add'>+		for (addr = __phys_to_virt(start); addr &lt; __phys_to_virt(end);</div><div class='add'>+		     addr += PMD_SIZE)</div><div class='add'>+			pmd_clear(pmd_off_k(addr));</div><div class='add'>+</div><div class='add'>+		iotable_init(&amp;map, 1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void *</div><div class='ctx'> __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,</div><div class='ctx'> 	const void *caller)</div><div class='hunk'>@@ -222,7 +415,7 @@ __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,</div><div class='ctx'> 	int bit;</div><div class='ctx'> </div><div class='ctx'> 	if (!consistent_pte) {</div><div class='del'>-		printk(KERN_ERR "%s: not initialised\n", __func__);</div><div class='add'>+		pr_err("%s: not initialised\n", __func__);</div><div class='ctx'> 		dump_stack();</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -249,7 +442,7 @@ __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,</div><div class='ctx'> 		u32 off = CONSISTENT_OFFSET(c-&gt;vm_start) &amp; (PTRS_PER_PTE-1);</div><div class='ctx'> </div><div class='ctx'> 		pte = consistent_pte[idx] + off;</div><div class='del'>-		c-&gt;vm_pages = page;</div><div class='add'>+		c-&gt;priv = page;</div><div class='ctx'> </div><div class='ctx'> 		do {</div><div class='ctx'> 			BUG_ON(!pte_none(*pte));</div><div class='hunk'>@@ -281,14 +474,14 @@ static void __dma_free_remap(void *cpu_addr, size_t size)</div><div class='ctx'> </div><div class='ctx'> 	c = arm_vmregion_find_remove(&amp;consistent_head, (unsigned long)cpu_addr);</div><div class='ctx'> 	if (!c) {</div><div class='del'>-		printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",</div><div class='add'>+		pr_err("%s: trying to free invalid coherent area: %p\n",</div><div class='ctx'> 		       __func__, cpu_addr);</div><div class='ctx'> 		dump_stack();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((c-&gt;vm_end - c-&gt;vm_start) != size) {</div><div class='del'>-		printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",</div><div class='add'>+		pr_err("%s: freeing wrong coherent size (%ld != %d)\n",</div><div class='ctx'> 		       __func__, c-&gt;vm_end - c-&gt;vm_start, size);</div><div class='ctx'> 		dump_stack();</div><div class='ctx'> 		size = c-&gt;vm_end - c-&gt;vm_start;</div><div class='hunk'>@@ -310,8 +503,8 @@ static void __dma_free_remap(void *cpu_addr, size_t size)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (pte_none(pte) || !pte_present(pte))</div><div class='del'>-			printk(KERN_CRIT "%s: bad page in kernel page table\n",</div><div class='del'>-			       __func__);</div><div class='add'>+			pr_crit("%s: bad page in kernel page table\n",</div><div class='add'>+				__func__);</div><div class='ctx'> 	} while (size -= PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	flush_tlb_kernel_range(c-&gt;vm_start, c-&gt;vm_end);</div><div class='hunk'>@@ -319,20 +512,182 @@ static void __dma_free_remap(void *cpu_addr, size_t size)</div><div class='ctx'> 	arm_vmregion_free(&amp;consistent_head, c);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,</div><div class='add'>+			    void *data)</div><div class='add'>+{</div><div class='add'>+	struct page *page = virt_to_page(addr);</div><div class='add'>+	pgprot_t prot = *(pgprot_t *)data;</div><div class='add'>+</div><div class='add'>+	set_pte_ext(pte, mk_pte(page, prot), 0);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __dma_remap(struct page *page, size_t size, pgprot_t prot)</div><div class='add'>+{</div><div class='add'>+	unsigned long start = (unsigned long) page_address(page);</div><div class='add'>+	unsigned end = start + size;</div><div class='add'>+</div><div class='add'>+	apply_to_page_range(&amp;init_mm, start, size, __dma_update_pte, &amp;prot);</div><div class='add'>+	dsb();</div><div class='add'>+	flush_tlb_kernel_range(start, end);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,</div><div class='add'>+				 pgprot_t prot, struct page **ret_page,</div><div class='add'>+				 const void *caller)</div><div class='add'>+{</div><div class='add'>+	struct page *page;</div><div class='add'>+	void *ptr;</div><div class='add'>+	page = __dma_alloc_buffer(dev, size, gfp);</div><div class='add'>+	if (!page)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ptr = __dma_alloc_remap(page, size, gfp, prot, caller);</div><div class='add'>+	if (!ptr) {</div><div class='add'>+		__dma_free_buffer(page, size);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*ret_page = page;</div><div class='add'>+	return ptr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *__alloc_from_pool(struct device *dev, size_t size,</div><div class='add'>+			       struct page **ret_page, const void *caller)</div><div class='add'>+{</div><div class='add'>+	struct arm_vmregion *c;</div><div class='add'>+	size_t align;</div><div class='add'>+</div><div class='add'>+	if (!coherent_head.vm_start) {</div><div class='add'>+		printk(KERN_ERR "%s: coherent pool not initialised!\n",</div><div class='add'>+		       __func__);</div><div class='add'>+		dump_stack();</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Align the region allocation - allocations from pool are rather</div><div class='add'>+	 * small, so align them to their order in pages, minimum is a page</div><div class='add'>+	 * size. This helps reduce fragmentation of the DMA space.</div><div class='add'>+	 */</div><div class='add'>+	align = PAGE_SIZE &lt;&lt; get_order(size);</div><div class='add'>+	c = arm_vmregion_alloc(&amp;coherent_head, align, size, 0, caller);</div><div class='add'>+	if (c) {</div><div class='add'>+		void *ptr = (void *)c-&gt;vm_start;</div><div class='add'>+		struct page *page = virt_to_page(ptr);</div><div class='add'>+		*ret_page = page;</div><div class='add'>+		return ptr;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __free_from_pool(void *cpu_addr, size_t size)</div><div class='add'>+{</div><div class='add'>+	unsigned long start = (unsigned long)cpu_addr;</div><div class='add'>+	unsigned long end = start + size;</div><div class='add'>+	struct arm_vmregion *c;</div><div class='add'>+</div><div class='add'>+	if (start &lt; coherent_head.vm_start || end &gt; coherent_head.vm_end)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	c = arm_vmregion_find_remove(&amp;coherent_head, (unsigned long)start);</div><div class='add'>+</div><div class='add'>+	if ((c-&gt;vm_end - c-&gt;vm_start) != size) {</div><div class='add'>+		printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",</div><div class='add'>+		       __func__, c-&gt;vm_end - c-&gt;vm_start, size);</div><div class='add'>+		dump_stack();</div><div class='add'>+		size = c-&gt;vm_end - c-&gt;vm_start;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	arm_vmregion_free(&amp;coherent_head, c);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *__alloc_from_contiguous(struct device *dev, size_t size,</div><div class='add'>+				     pgprot_t prot, struct page **ret_page)</div><div class='add'>+{</div><div class='add'>+	unsigned long order = get_order(size);</div><div class='add'>+	size_t count = size &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	struct page *page;</div><div class='add'>+</div><div class='add'>+	page = dma_alloc_from_contiguous(dev, count, order);</div><div class='add'>+	if (!page)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	__dma_clear_buffer(page, size);</div><div class='add'>+	__dma_remap(page, size, prot);</div><div class='add'>+</div><div class='add'>+	*ret_page = page;</div><div class='add'>+	return page_address(page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __free_from_contiguous(struct device *dev, struct page *page,</div><div class='add'>+				   size_t size)</div><div class='add'>+{</div><div class='add'>+	__dma_remap(page, size, pgprot_kernel);</div><div class='add'>+	dma_release_from_contiguous(dev, page, size &gt;&gt; PAGE_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)</div><div class='add'>+{</div><div class='add'>+	prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?</div><div class='add'>+			    pgprot_writecombine(prot) :</div><div class='add'>+			    pgprot_dmacoherent(prot);</div><div class='add'>+	return prot;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define nommu() 0</div><div class='add'>+</div><div class='ctx'> #else	/* !CONFIG_MMU */</div><div class='ctx'> </div><div class='del'>-#define __dma_alloc_remap(page, size, gfp, prot, c)	page_address(page)</div><div class='del'>-#define __dma_free_remap(addr, size)			do { } while (0)</div><div class='add'>+#define nommu() 1</div><div class='add'>+</div><div class='add'>+#define __get_dma_pgprot(attrs, prot)	__pgprot(0)</div><div class='add'>+#define __alloc_remap_buffer(dev, size, gfp, prot, ret, c)	NULL</div><div class='add'>+#define __alloc_from_pool(dev, size, ret_page, c)		NULL</div><div class='add'>+#define __alloc_from_contiguous(dev, size, prot, ret)		NULL</div><div class='add'>+#define __free_from_pool(cpu_addr, size)			0</div><div class='add'>+#define __free_from_contiguous(dev, page, size)			do { } while (0)</div><div class='add'>+#define __dma_free_remap(cpu_addr, size)			do { } while (0)</div><div class='ctx'> </div><div class='ctx'> #endif	/* CONFIG_MMU */</div><div class='ctx'> </div><div class='del'>-static void *</div><div class='del'>-__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,</div><div class='del'>-	    pgprot_t prot, const void *caller)</div><div class='add'>+static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,</div><div class='add'>+				   struct page **ret_page)</div><div class='add'>+{</div><div class='add'>+	struct page *page;</div><div class='add'>+	page = __dma_alloc_buffer(dev, size, gfp);</div><div class='add'>+	if (!page)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	*ret_page = page;</div><div class='add'>+	return page_address(page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,</div><div class='add'>+			 gfp_t gfp, pgprot_t prot, const void *caller)</div><div class='ctx'> {</div><div class='add'>+	u64 mask = get_coherent_dma_mask(dev);</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> 	void *addr;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DMA_API_DEBUG</div><div class='add'>+	u64 limit = (mask + 1) &amp; ~mask;</div><div class='add'>+	if (limit &amp;&amp; size &gt;= limit) {</div><div class='add'>+		dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",</div><div class='add'>+			size, mask);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (!mask)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (mask &lt; 0xffffffffULL)</div><div class='add'>+		gfp |= GFP_DMA;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Following is a work-around (a.k.a. hack) to prevent pages</div><div class='ctx'> 	 * with __GFP_COMP being passed to split_page() which cannot</div><div class='hunk'>@@ -342,22 +697,20 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,</div><div class='ctx'> 	 */</div><div class='ctx'> 	gfp &amp;= ~(__GFP_COMP);</div><div class='ctx'> </div><div class='del'>-	*handle = ~0;</div><div class='add'>+	*handle = DMA_ERROR_CODE;</div><div class='ctx'> 	size = PAGE_ALIGN(size);</div><div class='ctx'> </div><div class='del'>-	page = __dma_alloc_buffer(dev, size, gfp);</div><div class='del'>-	if (!page)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	if (!arch_is_coherent())</div><div class='del'>-		addr = __dma_alloc_remap(page, size, gfp, prot, caller);</div><div class='add'>+	if (arch_is_coherent() || nommu())</div><div class='add'>+		addr = __alloc_simple_buffer(dev, size, gfp, &amp;page);</div><div class='add'>+	else if (!IS_ENABLED(CONFIG_CMA))</div><div class='add'>+		addr = __alloc_remap_buffer(dev, size, gfp, prot, &amp;page, caller);</div><div class='add'>+	else if (gfp &amp; GFP_ATOMIC)</div><div class='add'>+		addr = __alloc_from_pool(dev, size, &amp;page, caller);</div><div class='ctx'> 	else</div><div class='del'>-		addr = page_address(page);</div><div class='add'>+		addr = __alloc_from_contiguous(dev, size, prot, &amp;page);</div><div class='ctx'> </div><div class='ctx'> 	if (addr)</div><div class='ctx'> 		*handle = pfn_to_dma(dev, page_to_pfn(page));</div><div class='del'>-	else</div><div class='del'>-		__dma_free_buffer(page, size);</div><div class='ctx'> </div><div class='ctx'> 	return addr;</div><div class='ctx'> }</div><div class='hunk'>@@ -366,138 +719,71 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,</div><div class='ctx'>  * Allocate DMA-coherent memory space and return both the kernel remapped</div><div class='ctx'>  * virtual and bus address for that space.</div><div class='ctx'>  */</div><div class='del'>-void *</div><div class='del'>-dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)</div><div class='add'>+void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,</div><div class='add'>+		    gfp_t gfp, struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='add'>+	pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);</div><div class='ctx'> 	void *memory;</div><div class='ctx'> </div><div class='ctx'> 	if (dma_alloc_from_coherent(dev, size, handle, &amp;memory))</div><div class='ctx'> 		return memory;</div><div class='ctx'> </div><div class='del'>-	return __dma_alloc(dev, size, handle, gfp,</div><div class='del'>-			   pgprot_dmacoherent(pgprot_kernel),</div><div class='add'>+	return __dma_alloc(dev, size, handle, gfp, prot,</div><div class='ctx'> 			   __builtin_return_address(0));</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(dma_alloc_coherent);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Allocate a writecombining region, in much the same way as</div><div class='del'>- * dma_alloc_coherent above.</div><div class='add'>+ * Create userspace mapping for the DMA-coherent memory.</div><div class='ctx'>  */</div><div class='del'>-void *</div><div class='del'>-dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)</div><div class='del'>-{</div><div class='del'>-	return __dma_alloc(dev, size, handle, gfp,</div><div class='del'>-			   pgprot_writecombine(pgprot_kernel),</div><div class='del'>-			   __builtin_return_address(0));</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_alloc_writecombine);</div><div class='del'>-</div><div class='del'>-static int dma_mmap(struct device *dev, struct vm_area_struct *vma,</div><div class='del'>-		    void *cpu_addr, dma_addr_t dma_addr, size_t size)</div><div class='add'>+int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,</div><div class='add'>+		 void *cpu_addr, dma_addr_t dma_addr, size_t size,</div><div class='add'>+		 struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = -ENXIO;</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='del'>-	unsigned long user_size, kern_size;</div><div class='del'>-	struct arm_vmregion *c;</div><div class='add'>+	unsigned long pfn = dma_to_pfn(dev, dma_addr);</div><div class='add'>+	vma-&gt;vm_page_prot = __get_dma_pgprot(attrs, vma-&gt;vm_page_prot);</div><div class='ctx'> </div><div class='del'>-	user_size = (vma-&gt;vm_end - vma-&gt;vm_start) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &amp;ret))</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	c = arm_vmregion_find(&amp;consistent_head, (unsigned long)cpu_addr);</div><div class='del'>-	if (c) {</div><div class='del'>-		unsigned long off = vma-&gt;vm_pgoff;</div><div class='del'>-</div><div class='del'>-		kern_size = (c-&gt;vm_end - c-&gt;vm_start) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-</div><div class='del'>-		if (off &lt; kern_size &amp;&amp;</div><div class='del'>-		    user_size &lt;= (kern_size - off)) {</div><div class='del'>-			ret = remap_pfn_range(vma, vma-&gt;vm_start,</div><div class='del'>-					      page_to_pfn(c-&gt;vm_pages) + off,</div><div class='del'>-					      user_size &lt;&lt; PAGE_SHIFT,</div><div class='del'>-					      vma-&gt;vm_page_prot);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	ret = remap_pfn_range(vma, vma-&gt;vm_start,</div><div class='add'>+			      pfn + vma-&gt;vm_pgoff,</div><div class='add'>+			      vma-&gt;vm_end - vma-&gt;vm_start,</div><div class='add'>+			      vma-&gt;vm_page_prot);</div><div class='ctx'> #endif	/* CONFIG_MMU */</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,</div><div class='del'>-		      void *cpu_addr, dma_addr_t dma_addr, size_t size)</div><div class='del'>-{</div><div class='del'>-	vma-&gt;vm_page_prot = pgprot_dmacoherent(vma-&gt;vm_page_prot);</div><div class='del'>-	return dma_mmap(dev, vma, cpu_addr, dma_addr, size);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_mmap_coherent);</div><div class='del'>-</div><div class='del'>-int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,</div><div class='del'>-			  void *cpu_addr, dma_addr_t dma_addr, size_t size)</div><div class='del'>-{</div><div class='del'>-	vma-&gt;vm_page_prot = pgprot_writecombine(vma-&gt;vm_page_prot);</div><div class='del'>-	return dma_mmap(dev, vma, cpu_addr, dma_addr, size);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_mmap_writecombine);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='del'>- * free a page as defined by the above mapping.</div><div class='del'>- * Must not be called with IRQs disabled.</div><div class='add'>+ * Free a buffer as defined by the above mapping.</div><div class='ctx'>  */</div><div class='del'>-void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)</div><div class='add'>+void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,</div><div class='add'>+		  dma_addr_t handle, struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='del'>-	WARN_ON(irqs_disabled());</div><div class='add'>+	struct page *page = pfn_to_page(dma_to_pfn(dev, handle));</div><div class='ctx'> </div><div class='ctx'> 	if (dma_release_from_coherent(dev, get_order(size), cpu_addr))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	size = PAGE_ALIGN(size);</div><div class='ctx'> </div><div class='del'>-	if (!arch_is_coherent())</div><div class='add'>+	if (arch_is_coherent() || nommu()) {</div><div class='add'>+		__dma_free_buffer(page, size);</div><div class='add'>+	} else if (!IS_ENABLED(CONFIG_CMA)) {</div><div class='ctx'> 		__dma_free_remap(cpu_addr, size);</div><div class='del'>-</div><div class='del'>-	__dma_free_buffer(pfn_to_page(dma_to_pfn(dev, handle)), size);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_free_coherent);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Make an area consistent for devices.</div><div class='del'>- * Note: Drivers should NOT use this function directly, as it will break</div><div class='del'>- * platforms with CONFIG_DMABOUNCE.</div><div class='del'>- * Use the driver DMA support - see dma-mapping.h (dma_sync_*)</div><div class='del'>- */</div><div class='del'>-void ___dma_single_cpu_to_dev(const void *kaddr, size_t size,</div><div class='del'>-	enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	unsigned long paddr;</div><div class='del'>-</div><div class='del'>-	BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));</div><div class='del'>-</div><div class='del'>-	dmac_map_area(kaddr, size, dir);</div><div class='del'>-</div><div class='del'>-	paddr = __pa(kaddr);</div><div class='del'>-	if (dir == DMA_FROM_DEVICE) {</div><div class='del'>-		outer_inv_range(paddr, paddr + size);</div><div class='add'>+		__dma_free_buffer(page, size);</div><div class='ctx'> 	} else {</div><div class='del'>-		outer_clean_range(paddr, paddr + size);</div><div class='del'>-	}</div><div class='del'>-	/* FIXME: non-speculating: flush on bidirectional mappings? */</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(___dma_single_cpu_to_dev);</div><div class='del'>-</div><div class='del'>-void ___dma_single_dev_to_cpu(const void *kaddr, size_t size,</div><div class='del'>-	enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));</div><div class='del'>-</div><div class='del'>-	/* FIXME: non-speculating: not required */</div><div class='del'>-	/* don't bother invalidating if DMA to device */</div><div class='del'>-	if (dir != DMA_TO_DEVICE) {</div><div class='del'>-		unsigned long paddr = __pa(kaddr);</div><div class='del'>-		outer_inv_range(paddr, paddr + size);</div><div class='add'>+		if (__free_from_pool(cpu_addr, size))</div><div class='add'>+			return;</div><div class='add'>+		/*</div><div class='add'>+		 * Non-atomic allocations cannot be freed with IRQs disabled</div><div class='add'>+		 */</div><div class='add'>+		WARN_ON(irqs_disabled());</div><div class='add'>+		__free_from_contiguous(dev, page, size);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	dmac_unmap_area(kaddr, size, dir);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(___dma_single_dev_to_cpu);</div><div class='ctx'> </div><div class='ctx'> static void dma_cache_maint_page(struct page *page, unsigned long offset,</div><div class='ctx'> 	size_t size, enum dma_data_direction dir,</div><div class='hunk'>@@ -543,7 +829,13 @@ static void dma_cache_maint_page(struct page *page, unsigned long offset,</div><div class='ctx'> 	} while (left);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ___dma_page_cpu_to_dev(struct page *page, unsigned long off,</div><div class='add'>+/*</div><div class='add'>+ * Make an area consistent for devices.</div><div class='add'>+ * Note: Drivers should NOT use this function directly, as it will break</div><div class='add'>+ * platforms with CONFIG_DMABOUNCE.</div><div class='add'>+ * Use the driver DMA support - see dma-mapping.h (dma_sync_*)</div><div class='add'>+ */</div><div class='add'>+static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,</div><div class='ctx'> 	size_t size, enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long paddr;</div><div class='hunk'>@@ -558,9 +850,8 @@ void ___dma_page_cpu_to_dev(struct page *page, unsigned long off,</div><div class='ctx'> 	}</div><div class='ctx'> 	/* FIXME: non-speculating: flush on bidirectional mappings? */</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(___dma_page_cpu_to_dev);</div><div class='ctx'> </div><div class='del'>-void ___dma_page_dev_to_cpu(struct page *page, unsigned long off,</div><div class='add'>+static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,</div><div class='ctx'> 	size_t size, enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long paddr = page_to_phys(page) + off;</div><div class='hunk'>@@ -578,10 +869,9 @@ void ___dma_page_dev_to_cpu(struct page *page, unsigned long off,</div><div class='ctx'> 	if (dir != DMA_TO_DEVICE &amp;&amp; off == 0 &amp;&amp; size &gt;= PAGE_SIZE)</div><div class='ctx'> 		set_bit(PG_dcache_clean, &amp;page-&gt;flags);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(___dma_page_dev_to_cpu);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * dma_map_sg - map a set of SG buffers for streaming mode DMA</div><div class='add'>+ * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA</div><div class='ctx'>  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='ctx'>  * @sg: list of buffers</div><div class='ctx'>  * @nents: number of buffers to map</div><div class='hunk'>@@ -596,32 +886,32 @@ EXPORT_SYMBOL(___dma_page_dev_to_cpu);</div><div class='ctx'>  * Device ownership issues as mentioned for dma_map_single are the same</div><div class='ctx'>  * here.</div><div class='ctx'>  */</div><div class='del'>-int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='del'>-		enum dma_data_direction dir)</div><div class='add'>+int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='add'>+		enum dma_data_direction dir, struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='ctx'> 	struct scatterlist *s;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-</div><div class='ctx'> 	for_each_sg(sg, s, nents, i) {</div><div class='del'>-		s-&gt;dma_address = __dma_map_page(dev, sg_page(s), s-&gt;offset,</div><div class='del'>-						s-&gt;length, dir);</div><div class='add'>+#ifdef CONFIG_NEED_SG_DMA_LENGTH</div><div class='add'>+		s-&gt;dma_length = s-&gt;length;</div><div class='add'>+#endif</div><div class='add'>+		s-&gt;dma_address = ops-&gt;map_page(dev, sg_page(s), s-&gt;offset,</div><div class='add'>+						s-&gt;length, dir, attrs);</div><div class='ctx'> 		if (dma_mapping_error(dev, s-&gt;dma_address))</div><div class='ctx'> 			goto bad_mapping;</div><div class='ctx'> 	}</div><div class='del'>-	debug_dma_map_sg(dev, sg, nents, nents, dir);</div><div class='ctx'> 	return nents;</div><div class='ctx'> </div><div class='ctx'>  bad_mapping:</div><div class='ctx'> 	for_each_sg(sg, s, i, j)</div><div class='del'>-		__dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);</div><div class='add'>+		ops-&gt;unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(dma_map_sg);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg</div><div class='add'>+ * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg</div><div class='ctx'>  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='ctx'>  * @sg: list of buffers</div><div class='ctx'>  * @nents: number of buffers to unmap (same as was passed to dma_map_sg)</div><div class='hunk'>@@ -630,70 +920,55 @@ EXPORT_SYMBOL(dma_map_sg);</div><div class='ctx'>  * Unmap a set of streaming mode DMA translations.  Again, CPU access</div><div class='ctx'>  * rules concerning calls here are the same as for dma_unmap_single().</div><div class='ctx'>  */</div><div class='del'>-void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='del'>-		enum dma_data_direction dir)</div><div class='add'>+void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='add'>+		enum dma_data_direction dir, struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='ctx'> 	struct scatterlist *s;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='del'>-	debug_dma_unmap_sg(dev, sg, nents, dir);</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	for_each_sg(sg, s, nents, i)</div><div class='del'>-		__dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);</div><div class='add'>+		ops-&gt;unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(dma_unmap_sg);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * dma_sync_sg_for_cpu</div><div class='add'>+ * arm_dma_sync_sg_for_cpu</div><div class='ctx'>  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='ctx'>  * @sg: list of buffers</div><div class='ctx'>  * @nents: number of buffers to map (returned from dma_map_sg)</div><div class='ctx'>  * @dir: DMA transfer direction (same as was passed to dma_map_sg)</div><div class='ctx'>  */</div><div class='del'>-void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,</div><div class='add'>+void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,</div><div class='ctx'> 			int nents, enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='ctx'> 	struct scatterlist *s;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for_each_sg(sg, s, nents, i) {</div><div class='del'>-		if (!dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0,</div><div class='del'>-					    sg_dma_len(s), dir))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		__dma_page_dev_to_cpu(sg_page(s), s-&gt;offset,</div><div class='del'>-				      s-&gt;length, dir);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	debug_dma_sync_sg_for_cpu(dev, sg, nents, dir);</div><div class='add'>+	for_each_sg(sg, s, nents, i)</div><div class='add'>+		ops-&gt;sync_single_for_cpu(dev, sg_dma_address(s), s-&gt;length,</div><div class='add'>+					 dir);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(dma_sync_sg_for_cpu);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * dma_sync_sg_for_device</div><div class='add'>+ * arm_dma_sync_sg_for_device</div><div class='ctx'>  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices</div><div class='ctx'>  * @sg: list of buffers</div><div class='ctx'>  * @nents: number of buffers to map (returned from dma_map_sg)</div><div class='ctx'>  * @dir: DMA transfer direction (same as was passed to dma_map_sg)</div><div class='ctx'>  */</div><div class='del'>-void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,</div><div class='add'>+void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,</div><div class='ctx'> 			int nents, enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='ctx'> 	struct scatterlist *s;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for_each_sg(sg, s, nents, i) {</div><div class='del'>-		if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0,</div><div class='del'>-					sg_dma_len(s), dir))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		__dma_page_cpu_to_dev(sg_page(s), s-&gt;offset,</div><div class='del'>-				      s-&gt;length, dir);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	debug_dma_sync_sg_for_device(dev, sg, nents, dir);</div><div class='add'>+	for_each_sg(sg, s, nents, i)</div><div class='add'>+		ops-&gt;sync_single_for_device(dev, sg_dma_address(s), s-&gt;length,</div><div class='add'>+					    dir);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(dma_sync_sg_for_device);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Return whether the given device DMA address mask can be supported</div><div class='hunk'>@@ -709,18 +984,15 @@ int dma_supported(struct device *dev, u64 mask)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_supported);</div><div class='ctx'> </div><div class='del'>-int dma_set_mask(struct device *dev, u64 dma_mask)</div><div class='add'>+static int arm_dma_set_mask(struct device *dev, u64 dma_mask)</div><div class='ctx'> {</div><div class='ctx'> 	if (!dev-&gt;dma_mask || !dma_supported(dev, dma_mask))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_DMABOUNCE</div><div class='ctx'> 	*dev-&gt;dma_mask = dma_mask;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(dma_set_mask);</div><div class='ctx'> </div><div class='ctx'> #define PREALLOC_DMA_DEBUG_ENTRIES	4096</div><div class='ctx'> </div><div class='hunk'>@@ -733,3 +1005,679 @@ static int __init dma_debug_do_init(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> fs_initcall(dma_debug_do_init);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARM_DMA_USE_IOMMU</div><div class='add'>+</div><div class='add'>+/* IOMMU */</div><div class='add'>+</div><div class='add'>+static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,</div><div class='add'>+				      size_t size)</div><div class='add'>+{</div><div class='add'>+	unsigned int order = get_order(size);</div><div class='add'>+	unsigned int align = 0;</div><div class='add'>+	unsigned int count, start;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	count = ((PAGE_ALIGN(size) &gt;&gt; PAGE_SHIFT) +</div><div class='add'>+		 (1 &lt;&lt; mapping-&gt;order) - 1) &gt;&gt; mapping-&gt;order;</div><div class='add'>+</div><div class='add'>+	if (order &gt; mapping-&gt;order)</div><div class='add'>+		align = (1 &lt;&lt; (order - mapping-&gt;order)) - 1;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;mapping-&gt;lock, flags);</div><div class='add'>+	start = bitmap_find_next_zero_area(mapping-&gt;bitmap, mapping-&gt;bits, 0,</div><div class='add'>+					   count, align);</div><div class='add'>+	if (start &gt; mapping-&gt;bits) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;mapping-&gt;lock, flags);</div><div class='add'>+		return DMA_ERROR_CODE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bitmap_set(mapping-&gt;bitmap, start, count);</div><div class='add'>+	spin_unlock_irqrestore(&amp;mapping-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return mapping-&gt;base + (start &lt;&lt; (mapping-&gt;order + PAGE_SHIFT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __free_iova(struct dma_iommu_mapping *mapping,</div><div class='add'>+			       dma_addr_t addr, size_t size)</div><div class='add'>+{</div><div class='add'>+	unsigned int start = (addr - mapping-&gt;base) &gt;&gt;</div><div class='add'>+			     (mapping-&gt;order + PAGE_SHIFT);</div><div class='add'>+	unsigned int count = ((size &gt;&gt; PAGE_SHIFT) +</div><div class='add'>+			      (1 &lt;&lt; mapping-&gt;order) - 1) &gt;&gt; mapping-&gt;order;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;mapping-&gt;lock, flags);</div><div class='add'>+	bitmap_clear(mapping-&gt;bitmap, start, count);</div><div class='add'>+	spin_unlock_irqrestore(&amp;mapping-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	struct page **pages;</div><div class='add'>+	int count = size &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	int array_size = count * sizeof(struct page *);</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	if (array_size &lt;= PAGE_SIZE)</div><div class='add'>+		pages = kzalloc(array_size, gfp);</div><div class='add'>+	else</div><div class='add'>+		pages = vzalloc(array_size);</div><div class='add'>+	if (!pages)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	while (count) {</div><div class='add'>+		int j, order = __ffs(count);</div><div class='add'>+</div><div class='add'>+		pages[i] = alloc_pages(gfp | __GFP_NOWARN, order);</div><div class='add'>+		while (!pages[i] &amp;&amp; order)</div><div class='add'>+			pages[i] = alloc_pages(gfp | __GFP_NOWARN, --order);</div><div class='add'>+		if (!pages[i])</div><div class='add'>+			goto error;</div><div class='add'>+</div><div class='add'>+		if (order)</div><div class='add'>+			split_page(pages[i], order);</div><div class='add'>+		j = 1 &lt;&lt; order;</div><div class='add'>+		while (--j)</div><div class='add'>+			pages[i + j] = pages[i] + j;</div><div class='add'>+</div><div class='add'>+		__dma_clear_buffer(pages[i], PAGE_SIZE &lt;&lt; order);</div><div class='add'>+		i += 1 &lt;&lt; order;</div><div class='add'>+		count -= 1 &lt;&lt; order;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pages;</div><div class='add'>+error:</div><div class='add'>+	while (--i)</div><div class='add'>+		if (pages[i])</div><div class='add'>+			__free_pages(pages[i], 0);</div><div class='add'>+	if (array_size &lt; PAGE_SIZE)</div><div class='add'>+		kfree(pages);</div><div class='add'>+	else</div><div class='add'>+		vfree(pages);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t size)</div><div class='add'>+{</div><div class='add'>+	int count = size &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	int array_size = count * sizeof(struct page *);</div><div class='add'>+	int i;</div><div class='add'>+	for (i = 0; i &lt; count; i++)</div><div class='add'>+		if (pages[i])</div><div class='add'>+			__free_pages(pages[i], 0);</div><div class='add'>+	if (array_size &lt; PAGE_SIZE)</div><div class='add'>+		kfree(pages);</div><div class='add'>+	else</div><div class='add'>+		vfree(pages);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Create a CPU mapping for a specified pages</div><div class='add'>+ */</div><div class='add'>+static void *</div><div class='add'>+__iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot)</div><div class='add'>+{</div><div class='add'>+	struct arm_vmregion *c;</div><div class='add'>+	size_t align;</div><div class='add'>+	size_t count = size &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	int bit;</div><div class='add'>+</div><div class='add'>+	if (!consistent_pte[0]) {</div><div class='add'>+		pr_err("%s: not initialised\n", __func__);</div><div class='add'>+		dump_stack();</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Align the virtual region allocation - maximum alignment is</div><div class='add'>+	 * a section size, minimum is a page size.  This helps reduce</div><div class='add'>+	 * fragmentation of the DMA space, and also prevents allocations</div><div class='add'>+	 * smaller than a section from crossing a section boundary.</div><div class='add'>+	 */</div><div class='add'>+	bit = fls(size - 1);</div><div class='add'>+	if (bit &gt; SECTION_SHIFT)</div><div class='add'>+		bit = SECTION_SHIFT;</div><div class='add'>+	align = 1 &lt;&lt; bit;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Allocate a virtual address in the consistent mapping region.</div><div class='add'>+	 */</div><div class='add'>+	c = arm_vmregion_alloc(&amp;consistent_head, align, size,</div><div class='add'>+			    gfp &amp; ~(__GFP_DMA | __GFP_HIGHMEM), NULL);</div><div class='add'>+	if (c) {</div><div class='add'>+		pte_t *pte;</div><div class='add'>+		int idx = CONSISTENT_PTE_INDEX(c-&gt;vm_start);</div><div class='add'>+		int i = 0;</div><div class='add'>+		u32 off = CONSISTENT_OFFSET(c-&gt;vm_start) &amp; (PTRS_PER_PTE-1);</div><div class='add'>+</div><div class='add'>+		pte = consistent_pte[idx] + off;</div><div class='add'>+		c-&gt;priv = pages;</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			BUG_ON(!pte_none(*pte));</div><div class='add'>+</div><div class='add'>+			set_pte_ext(pte, mk_pte(pages[i], prot), 0);</div><div class='add'>+			pte++;</div><div class='add'>+			off++;</div><div class='add'>+			i++;</div><div class='add'>+			if (off &gt;= PTRS_PER_PTE) {</div><div class='add'>+				off = 0;</div><div class='add'>+				pte = consistent_pte[++idx];</div><div class='add'>+			}</div><div class='add'>+		} while (i &lt; count);</div><div class='add'>+</div><div class='add'>+		dsb();</div><div class='add'>+</div><div class='add'>+		return (void *)c-&gt;vm_start;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Create a mapping in device IO address space for specified pages</div><div class='add'>+ */</div><div class='add'>+static dma_addr_t</div><div class='add'>+__iommu_create_mapping(struct device *dev, struct page **pages, size_t size)</div><div class='add'>+{</div><div class='add'>+	struct dma_iommu_mapping *mapping = dev-&gt;archdata.mapping;</div><div class='add'>+	unsigned int count = PAGE_ALIGN(size) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	dma_addr_t dma_addr, iova;</div><div class='add'>+	int i, ret = DMA_ERROR_CODE;</div><div class='add'>+</div><div class='add'>+	dma_addr = __alloc_iova(mapping, size);</div><div class='add'>+	if (dma_addr == DMA_ERROR_CODE)</div><div class='add'>+		return dma_addr;</div><div class='add'>+</div><div class='add'>+	iova = dma_addr;</div><div class='add'>+	for (i = 0; i &lt; count; ) {</div><div class='add'>+		unsigned int next_pfn = page_to_pfn(pages[i]) + 1;</div><div class='add'>+		phys_addr_t phys = page_to_phys(pages[i]);</div><div class='add'>+		unsigned int len, j;</div><div class='add'>+</div><div class='add'>+		for (j = i + 1; j &lt; count; j++, next_pfn++)</div><div class='add'>+			if (page_to_pfn(pages[j]) != next_pfn)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+		len = (j - i) &lt;&lt; PAGE_SHIFT;</div><div class='add'>+		ret = iommu_map(mapping-&gt;domain, iova, phys, len, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto fail;</div><div class='add'>+		iova += len;</div><div class='add'>+		i = j;</div><div class='add'>+	}</div><div class='add'>+	return dma_addr;</div><div class='add'>+fail:</div><div class='add'>+	iommu_unmap(mapping-&gt;domain, dma_addr, iova-dma_addr);</div><div class='add'>+	__free_iova(mapping, dma_addr, size);</div><div class='add'>+	return DMA_ERROR_CODE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)</div><div class='add'>+{</div><div class='add'>+	struct dma_iommu_mapping *mapping = dev-&gt;archdata.mapping;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * add optional in-page offset from iova to size and align</div><div class='add'>+	 * result to page size</div><div class='add'>+	 */</div><div class='add'>+	size = PAGE_ALIGN((iova &amp; ~PAGE_MASK) + size);</div><div class='add'>+	iova &amp;= PAGE_MASK;</div><div class='add'>+</div><div class='add'>+	iommu_unmap(mapping-&gt;domain, iova, size);</div><div class='add'>+	__free_iova(mapping, iova, size);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,</div><div class='add'>+	    dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);</div><div class='add'>+	struct page **pages;</div><div class='add'>+	void *addr = NULL;</div><div class='add'>+</div><div class='add'>+	*handle = DMA_ERROR_CODE;</div><div class='add'>+	size = PAGE_ALIGN(size);</div><div class='add'>+</div><div class='add'>+	pages = __iommu_alloc_buffer(dev, size, gfp);</div><div class='add'>+	if (!pages)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	*handle = __iommu_create_mapping(dev, pages, size);</div><div class='add'>+	if (*handle == DMA_ERROR_CODE)</div><div class='add'>+		goto err_buffer;</div><div class='add'>+</div><div class='add'>+	addr = __iommu_alloc_remap(pages, size, gfp, prot);</div><div class='add'>+	if (!addr)</div><div class='add'>+		goto err_mapping;</div><div class='add'>+</div><div class='add'>+	return addr;</div><div class='add'>+</div><div class='add'>+err_mapping:</div><div class='add'>+	__iommu_remove_mapping(dev, *handle, size);</div><div class='add'>+err_buffer:</div><div class='add'>+	__iommu_free_buffer(dev, pages, size);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,</div><div class='add'>+		    void *cpu_addr, dma_addr_t dma_addr, size_t size,</div><div class='add'>+		    struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct arm_vmregion *c;</div><div class='add'>+</div><div class='add'>+	vma-&gt;vm_page_prot = __get_dma_pgprot(attrs, vma-&gt;vm_page_prot);</div><div class='add'>+	c = arm_vmregion_find(&amp;consistent_head, (unsigned long)cpu_addr);</div><div class='add'>+</div><div class='add'>+	if (c) {</div><div class='add'>+		struct page **pages = c-&gt;priv;</div><div class='add'>+</div><div class='add'>+		unsigned long uaddr = vma-&gt;vm_start;</div><div class='add'>+		unsigned long usize = vma-&gt;vm_end - vma-&gt;vm_start;</div><div class='add'>+		int i = 0;</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			int ret;</div><div class='add'>+</div><div class='add'>+			ret = vm_insert_page(vma, uaddr, pages[i++]);</div><div class='add'>+			if (ret) {</div><div class='add'>+				pr_err("Remapping memory, error: %d\n", ret);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			uaddr += PAGE_SIZE;</div><div class='add'>+			usize -= PAGE_SIZE;</div><div class='add'>+		} while (usize &gt; 0);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * free a page as defined by the above mapping.</div><div class='add'>+ * Must not be called with IRQs disabled.</div><div class='add'>+ */</div><div class='add'>+void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,</div><div class='add'>+			  dma_addr_t handle, struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct arm_vmregion *c;</div><div class='add'>+	size = PAGE_ALIGN(size);</div><div class='add'>+</div><div class='add'>+	c = arm_vmregion_find(&amp;consistent_head, (unsigned long)cpu_addr);</div><div class='add'>+	if (c) {</div><div class='add'>+		struct page **pages = c-&gt;priv;</div><div class='add'>+		__dma_free_remap(cpu_addr, size);</div><div class='add'>+		__iommu_remove_mapping(dev, handle, size);</div><div class='add'>+		__iommu_free_buffer(dev, pages, size);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Map a part of the scatter-gather list into contiguous io address space</div><div class='add'>+ */</div><div class='add'>+static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,</div><div class='add'>+			  size_t size, dma_addr_t *handle,</div><div class='add'>+			  enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	struct dma_iommu_mapping *mapping = dev-&gt;archdata.mapping;</div><div class='add'>+	dma_addr_t iova, iova_base;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	unsigned int count;</div><div class='add'>+	struct scatterlist *s;</div><div class='add'>+</div><div class='add'>+	size = PAGE_ALIGN(size);</div><div class='add'>+	*handle = DMA_ERROR_CODE;</div><div class='add'>+</div><div class='add'>+	iova_base = iova = __alloc_iova(mapping, size);</div><div class='add'>+	if (iova == DMA_ERROR_CODE)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (count = 0, s = sg; count &lt; (size &gt;&gt; PAGE_SHIFT); s = sg_next(s)) {</div><div class='add'>+		phys_addr_t phys = page_to_phys(sg_page(s));</div><div class='add'>+		unsigned int len = PAGE_ALIGN(s-&gt;offset + s-&gt;length);</div><div class='add'>+</div><div class='add'>+		if (!arch_is_coherent())</div><div class='add'>+			__dma_page_cpu_to_dev(sg_page(s), s-&gt;offset, s-&gt;length, dir);</div><div class='add'>+</div><div class='add'>+		ret = iommu_map(mapping-&gt;domain, iova, phys, len, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto fail;</div><div class='add'>+		count += len &gt;&gt; PAGE_SHIFT;</div><div class='add'>+		iova += len;</div><div class='add'>+	}</div><div class='add'>+	*handle = iova_base;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+fail:</div><div class='add'>+	iommu_unmap(mapping-&gt;domain, iova_base, count * PAGE_SIZE);</div><div class='add'>+	__free_iova(mapping, iova_base, size);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA</div><div class='add'>+ * @dev: valid struct device pointer</div><div class='add'>+ * @sg: list of buffers</div><div class='add'>+ * @nents: number of buffers to map</div><div class='add'>+ * @dir: DMA transfer direction</div><div class='add'>+ *</div><div class='add'>+ * Map a set of buffers described by scatterlist in streaming mode for DMA.</div><div class='add'>+ * The scatter gather list elements are merged together (if possible) and</div><div class='add'>+ * tagged with the appropriate dma address and length. They are obtained via</div><div class='add'>+ * sg_dma_{address,length}.</div><div class='add'>+ */</div><div class='add'>+int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='add'>+		     enum dma_data_direction dir, struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct scatterlist *s = sg, *dma = sg, *start = sg;</div><div class='add'>+	int i, count = 0;</div><div class='add'>+	unsigned int offset = s-&gt;offset;</div><div class='add'>+	unsigned int size = s-&gt;offset + s-&gt;length;</div><div class='add'>+	unsigned int max = dma_get_max_seg_size(dev);</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; nents; i++) {</div><div class='add'>+		s = sg_next(s);</div><div class='add'>+</div><div class='add'>+		s-&gt;dma_address = DMA_ERROR_CODE;</div><div class='add'>+		s-&gt;dma_length = 0;</div><div class='add'>+</div><div class='add'>+		if (s-&gt;offset || (size &amp; ~PAGE_MASK) || size + s-&gt;length &gt; max) {</div><div class='add'>+			if (__map_sg_chunk(dev, start, size, &amp;dma-&gt;dma_address,</div><div class='add'>+			    dir) &lt; 0)</div><div class='add'>+				goto bad_mapping;</div><div class='add'>+</div><div class='add'>+			dma-&gt;dma_address += offset;</div><div class='add'>+			dma-&gt;dma_length = size - offset;</div><div class='add'>+</div><div class='add'>+			size = offset = s-&gt;offset;</div><div class='add'>+			start = s;</div><div class='add'>+			dma = sg_next(dma);</div><div class='add'>+			count += 1;</div><div class='add'>+		}</div><div class='add'>+		size += s-&gt;length;</div><div class='add'>+	}</div><div class='add'>+	if (__map_sg_chunk(dev, start, size, &amp;dma-&gt;dma_address, dir) &lt; 0)</div><div class='add'>+		goto bad_mapping;</div><div class='add'>+</div><div class='add'>+	dma-&gt;dma_address += offset;</div><div class='add'>+	dma-&gt;dma_length = size - offset;</div><div class='add'>+</div><div class='add'>+	return count+1;</div><div class='add'>+</div><div class='add'>+bad_mapping:</div><div class='add'>+	for_each_sg(sg, s, count, i)</div><div class='add'>+		__iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg</div><div class='add'>+ * @dev: valid struct device pointer</div><div class='add'>+ * @sg: list of buffers</div><div class='add'>+ * @nents: number of buffers to unmap (same as was passed to dma_map_sg)</div><div class='add'>+ * @dir: DMA transfer direction (same as was passed to dma_map_sg)</div><div class='add'>+ *</div><div class='add'>+ * Unmap a set of streaming mode DMA translations.  Again, CPU access</div><div class='add'>+ * rules concerning calls here are the same as for dma_unmap_single().</div><div class='add'>+ */</div><div class='add'>+void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='add'>+			enum dma_data_direction dir, struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct scatterlist *s;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for_each_sg(sg, s, nents, i) {</div><div class='add'>+		if (sg_dma_len(s))</div><div class='add'>+			__iommu_remove_mapping(dev, sg_dma_address(s),</div><div class='add'>+					       sg_dma_len(s));</div><div class='add'>+		if (!arch_is_coherent())</div><div class='add'>+			__dma_page_dev_to_cpu(sg_page(s), s-&gt;offset,</div><div class='add'>+					      s-&gt;length, dir);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arm_iommu_sync_sg_for_cpu</div><div class='add'>+ * @dev: valid struct device pointer</div><div class='add'>+ * @sg: list of buffers</div><div class='add'>+ * @nents: number of buffers to map (returned from dma_map_sg)</div><div class='add'>+ * @dir: DMA transfer direction (same as was passed to dma_map_sg)</div><div class='add'>+ */</div><div class='add'>+void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,</div><div class='add'>+			int nents, enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	struct scatterlist *s;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for_each_sg(sg, s, nents, i)</div><div class='add'>+		if (!arch_is_coherent())</div><div class='add'>+			__dma_page_dev_to_cpu(sg_page(s), s-&gt;offset, s-&gt;length, dir);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arm_iommu_sync_sg_for_device</div><div class='add'>+ * @dev: valid struct device pointer</div><div class='add'>+ * @sg: list of buffers</div><div class='add'>+ * @nents: number of buffers to map (returned from dma_map_sg)</div><div class='add'>+ * @dir: DMA transfer direction (same as was passed to dma_map_sg)</div><div class='add'>+ */</div><div class='add'>+void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,</div><div class='add'>+			int nents, enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	struct scatterlist *s;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for_each_sg(sg, s, nents, i)</div><div class='add'>+		if (!arch_is_coherent())</div><div class='add'>+			__dma_page_cpu_to_dev(sg_page(s), s-&gt;offset, s-&gt;length, dir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arm_iommu_map_page</div><div class='add'>+ * @dev: valid struct device pointer</div><div class='add'>+ * @page: page that buffer resides in</div><div class='add'>+ * @offset: offset into page for start of buffer</div><div class='add'>+ * @size: size of buffer to map</div><div class='add'>+ * @dir: DMA transfer direction</div><div class='add'>+ *</div><div class='add'>+ * IOMMU aware version of arm_dma_map_page()</div><div class='add'>+ */</div><div class='add'>+static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,</div><div class='add'>+	     unsigned long offset, size_t size, enum dma_data_direction dir,</div><div class='add'>+	     struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct dma_iommu_mapping *mapping = dev-&gt;archdata.mapping;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	int ret, len = PAGE_ALIGN(size + offset);</div><div class='add'>+</div><div class='add'>+	if (!arch_is_coherent())</div><div class='add'>+		__dma_page_cpu_to_dev(page, offset, size, dir);</div><div class='add'>+</div><div class='add'>+	dma_addr = __alloc_iova(mapping, len);</div><div class='add'>+	if (dma_addr == DMA_ERROR_CODE)</div><div class='add'>+		return dma_addr;</div><div class='add'>+</div><div class='add'>+	ret = iommu_map(mapping-&gt;domain, dma_addr, page_to_phys(page), len, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	return dma_addr + offset;</div><div class='add'>+fail:</div><div class='add'>+	__free_iova(mapping, dma_addr, len);</div><div class='add'>+	return DMA_ERROR_CODE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arm_iommu_unmap_page</div><div class='add'>+ * @dev: valid struct device pointer</div><div class='add'>+ * @handle: DMA address of buffer</div><div class='add'>+ * @size: size of buffer (same as passed to dma_map_page)</div><div class='add'>+ * @dir: DMA transfer direction (same as passed to dma_map_page)</div><div class='add'>+ *</div><div class='add'>+ * IOMMU aware version of arm_dma_unmap_page()</div><div class='add'>+ */</div><div class='add'>+static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,</div><div class='add'>+		size_t size, enum dma_data_direction dir,</div><div class='add'>+		struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	struct dma_iommu_mapping *mapping = dev-&gt;archdata.mapping;</div><div class='add'>+	dma_addr_t iova = handle &amp; PAGE_MASK;</div><div class='add'>+	struct page *page = phys_to_page(iommu_iova_to_phys(mapping-&gt;domain, iova));</div><div class='add'>+	int offset = handle &amp; ~PAGE_MASK;</div><div class='add'>+	int len = PAGE_ALIGN(size + offset);</div><div class='add'>+</div><div class='add'>+	if (!iova)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!arch_is_coherent())</div><div class='add'>+		__dma_page_dev_to_cpu(page, offset, size, dir);</div><div class='add'>+</div><div class='add'>+	iommu_unmap(mapping-&gt;domain, iova, len);</div><div class='add'>+	__free_iova(mapping, iova, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void arm_iommu_sync_single_for_cpu(struct device *dev,</div><div class='add'>+		dma_addr_t handle, size_t size, enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	struct dma_iommu_mapping *mapping = dev-&gt;archdata.mapping;</div><div class='add'>+	dma_addr_t iova = handle &amp; PAGE_MASK;</div><div class='add'>+	struct page *page = phys_to_page(iommu_iova_to_phys(mapping-&gt;domain, iova));</div><div class='add'>+	unsigned int offset = handle &amp; ~PAGE_MASK;</div><div class='add'>+</div><div class='add'>+	if (!iova)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!arch_is_coherent())</div><div class='add'>+		__dma_page_dev_to_cpu(page, offset, size, dir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void arm_iommu_sync_single_for_device(struct device *dev,</div><div class='add'>+		dma_addr_t handle, size_t size, enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	struct dma_iommu_mapping *mapping = dev-&gt;archdata.mapping;</div><div class='add'>+	dma_addr_t iova = handle &amp; PAGE_MASK;</div><div class='add'>+	struct page *page = phys_to_page(iommu_iova_to_phys(mapping-&gt;domain, iova));</div><div class='add'>+	unsigned int offset = handle &amp; ~PAGE_MASK;</div><div class='add'>+</div><div class='add'>+	if (!iova)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	__dma_page_cpu_to_dev(page, offset, size, dir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct dma_map_ops iommu_ops = {</div><div class='add'>+	.alloc		= arm_iommu_alloc_attrs,</div><div class='add'>+	.free		= arm_iommu_free_attrs,</div><div class='add'>+	.mmap		= arm_iommu_mmap_attrs,</div><div class='add'>+</div><div class='add'>+	.map_page		= arm_iommu_map_page,</div><div class='add'>+	.unmap_page		= arm_iommu_unmap_page,</div><div class='add'>+	.sync_single_for_cpu	= arm_iommu_sync_single_for_cpu,</div><div class='add'>+	.sync_single_for_device	= arm_iommu_sync_single_for_device,</div><div class='add'>+</div><div class='add'>+	.map_sg			= arm_iommu_map_sg,</div><div class='add'>+	.unmap_sg		= arm_iommu_unmap_sg,</div><div class='add'>+	.sync_sg_for_cpu	= arm_iommu_sync_sg_for_cpu,</div><div class='add'>+	.sync_sg_for_device	= arm_iommu_sync_sg_for_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arm_iommu_create_mapping</div><div class='add'>+ * @bus: pointer to the bus holding the client device (for IOMMU calls)</div><div class='add'>+ * @base: start address of the valid IO address space</div><div class='add'>+ * @size: size of the valid IO address space</div><div class='add'>+ * @order: accuracy of the IO addresses allocations</div><div class='add'>+ *</div><div class='add'>+ * Creates a mapping structure which holds information about used/unused</div><div class='add'>+ * IO address ranges, which is required to perform memory allocation and</div><div class='add'>+ * mapping with IOMMU aware functions.</div><div class='add'>+ *</div><div class='add'>+ * The client device need to be attached to the mapping with</div><div class='add'>+ * arm_iommu_attach_device function.</div><div class='add'>+ */</div><div class='add'>+struct dma_iommu_mapping *</div><div class='add'>+arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,</div><div class='add'>+			 int order)</div><div class='add'>+{</div><div class='add'>+	unsigned int count = size &gt;&gt; (PAGE_SHIFT + order);</div><div class='add'>+	unsigned int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);</div><div class='add'>+	struct dma_iommu_mapping *mapping;</div><div class='add'>+	int err = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (!count)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);</div><div class='add'>+	if (!mapping)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	mapping-&gt;bitmap = kzalloc(bitmap_size, GFP_KERNEL);</div><div class='add'>+	if (!mapping-&gt;bitmap)</div><div class='add'>+		goto err2;</div><div class='add'>+</div><div class='add'>+	mapping-&gt;base = base;</div><div class='add'>+	mapping-&gt;bits = BITS_PER_BYTE * bitmap_size;</div><div class='add'>+	mapping-&gt;order = order;</div><div class='add'>+	spin_lock_init(&amp;mapping-&gt;lock);</div><div class='add'>+</div><div class='add'>+	mapping-&gt;domain = iommu_domain_alloc(bus);</div><div class='add'>+	if (!mapping-&gt;domain)</div><div class='add'>+		goto err3;</div><div class='add'>+</div><div class='add'>+	kref_init(&amp;mapping-&gt;kref);</div><div class='add'>+	return mapping;</div><div class='add'>+err3:</div><div class='add'>+	kfree(mapping-&gt;bitmap);</div><div class='add'>+err2:</div><div class='add'>+	kfree(mapping);</div><div class='add'>+err:</div><div class='add'>+	return ERR_PTR(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void release_iommu_mapping(struct kref *kref)</div><div class='add'>+{</div><div class='add'>+	struct dma_iommu_mapping *mapping =</div><div class='add'>+		container_of(kref, struct dma_iommu_mapping, kref);</div><div class='add'>+</div><div class='add'>+	iommu_domain_free(mapping-&gt;domain);</div><div class='add'>+	kfree(mapping-&gt;bitmap);</div><div class='add'>+	kfree(mapping);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)</div><div class='add'>+{</div><div class='add'>+	if (mapping)</div><div class='add'>+		kref_put(&amp;mapping-&gt;kref, release_iommu_mapping);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arm_iommu_attach_device</div><div class='add'>+ * @dev: valid struct device pointer</div><div class='add'>+ * @mapping: io address space mapping structure (returned from</div><div class='add'>+ *	arm_iommu_create_mapping)</div><div class='add'>+ *</div><div class='add'>+ * Attaches specified io address space mapping to the provided device,</div><div class='add'>+ * this replaces the dma operations (dma_map_ops pointer) with the</div><div class='add'>+ * IOMMU aware version. More than one client might be attached to</div><div class='add'>+ * the same io address space mapping.</div><div class='add'>+ */</div><div class='add'>+int arm_iommu_attach_device(struct device *dev,</div><div class='add'>+			    struct dma_iommu_mapping *mapping)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = iommu_attach_device(mapping-&gt;domain, dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	kref_get(&amp;mapping-&gt;kref);</div><div class='add'>+	dev-&gt;archdata.mapping = mapping;</div><div class='add'>+	set_dma_ops(dev, &amp;iommu_ops);</div><div class='add'>+</div><div class='add'>+	pr_info("Attached IOMMU controller to %s device.\n", dev_name(dev));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c<br/>index f07467533365..c3bd83450227 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/fault.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/fault.c</a></div><div class='hunk'>@@ -247,7 +247,9 @@ good_area:</div><div class='ctx'> 	return handle_mm_fault(mm, vma, addr &amp; PAGE_MASK, flags);</div><div class='ctx'> </div><div class='ctx'> check_stack:</div><div class='del'>-	if (vma-&gt;vm_flags &amp; VM_GROWSDOWN &amp;&amp; !expand_stack(vma, addr))</div><div class='add'>+	/* Don't allow expansion below FIRST_USER_ADDRESS */</div><div class='add'>+	if (vma-&gt;vm_flags &amp; VM_GROWSDOWN &amp;&amp;</div><div class='add'>+	    addr &gt;= FIRST_USER_ADDRESS &amp;&amp; !expand_stack(vma, addr))</div><div class='ctx'> 		goto good_area;</div><div class='ctx'> out:</div><div class='ctx'> 	return fault;</div><div class='hunk'>@@ -430,9 +432,6 @@ do_translation_fault(unsigned long addr, unsigned int fsr,</div><div class='ctx'> </div><div class='ctx'> 	index = pgd_index(addr);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * FIXME: CP15 C1 is write only on ARMv3 architectures.</div><div class='del'>-	 */</div><div class='ctx'> 	pgd = cpu_get_pgd() + index;</div><div class='ctx'> 	pgd_k = init_mm.pgd + index;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c<br/>index 595079fa9d1d..c21d06c7dd7e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/init.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;linux/dma-contiguous.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach-types.h&gt;</div><div class='ctx'> #include &lt;asm/memblock.h&gt;</div><div class='hunk'>@@ -226,6 +227,17 @@ static void __init arm_adjust_dma_zone(unsigned long *size, unsigned long *hole,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+void __init setup_dma_zone(struct machine_desc *mdesc)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_ZONE_DMA</div><div class='add'>+	if (mdesc-&gt;dma_zone_size) {</div><div class='add'>+		arm_dma_zone_size = mdesc-&gt;dma_zone_size;</div><div class='add'>+		arm_dma_limit = PHYS_OFFSET + arm_dma_zone_size - 1;</div><div class='add'>+	} else</div><div class='add'>+		arm_dma_limit = 0xffffffff;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init arm_bootmem_free(unsigned long min, unsigned long max_low,</div><div class='ctx'> 	unsigned long max_high)</div><div class='ctx'> {</div><div class='hunk'>@@ -273,12 +285,9 @@ static void __init arm_bootmem_free(unsigned long min, unsigned long max_low,</div><div class='ctx'> 	 * Adjust the sizes according to any special requirements for</div><div class='ctx'> 	 * this machine type.</div><div class='ctx'> 	 */</div><div class='del'>-	if (arm_dma_zone_size) {</div><div class='add'>+	if (arm_dma_zone_size)</div><div class='ctx'> 		arm_adjust_dma_zone(zone_size, zhole_size,</div><div class='ctx'> 			arm_dma_zone_size &gt;&gt; PAGE_SHIFT);</div><div class='del'>-		arm_dma_limit = PHYS_OFFSET + arm_dma_zone_size - 1;</div><div class='del'>-	} else</div><div class='del'>-		arm_dma_limit = 0xffffffff;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	free_area_init_node(0, zone_size, min, zhole_size);</div><div class='hunk'>@@ -293,11 +302,11 @@ EXPORT_SYMBOL(pfn_valid);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_SPARSEMEM</div><div class='del'>-static void arm_memory_present(void)</div><div class='add'>+static void __init arm_memory_present(void)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='del'>-static void arm_memory_present(void)</div><div class='add'>+static void __init arm_memory_present(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct memblock_region *reg;</div><div class='ctx'> </div><div class='hunk'>@@ -364,6 +373,12 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)</div><div class='ctx'> 	if (mdesc-&gt;reserve)</div><div class='ctx'> 		mdesc-&gt;reserve();</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * reserve memory for DMA contigouos allocations,</div><div class='add'>+	 * must come from DMA area inside low memory</div><div class='add'>+	 */</div><div class='add'>+	dma_contiguous_reserve(min(arm_dma_limit, arm_lowmem_limit));</div><div class='add'>+</div><div class='ctx'> 	arm_memblock_steal_permitted = false;</div><div class='ctx'> 	memblock_allow_resize();</div><div class='ctx'> 	memblock_dump_all();</div><div class='head'>diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h<br/>index 27f4a619b35d..93dc0c17cdcb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/mm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/mm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/mm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/mm.h</a></div><div class='hunk'>@@ -67,5 +67,8 @@ extern u32 arm_dma_limit;</div><div class='ctx'> #define arm_dma_limit ((u32)~0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+extern phys_addr_t arm_lowmem_limit;</div><div class='add'>+</div><div class='ctx'> void __init bootmem_init(void);</div><div class='ctx'> void arm_mm_memblock_reserve(void);</div><div class='add'>+void dma_contiguous_remap(void);</div><div class='head'>diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c<br/>index b86f8933ff91..e5dad60b558b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/mmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/mmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/mmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/mmu.c</a></div><div class='hunk'>@@ -288,6 +288,11 @@ static struct mem_type mem_types[] = {</div><div class='ctx'> 				PMD_SECT_UNCACHED | PMD_SECT_XN,</div><div class='ctx'> 		.domain    = DOMAIN_KERNEL,</div><div class='ctx'> 	},</div><div class='add'>+	[MT_MEMORY_DMA_READY] = {</div><div class='add'>+		.prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY,</div><div class='add'>+		.prot_l1   = PMD_TYPE_TABLE,</div><div class='add'>+		.domain    = DOMAIN_KERNEL,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct mem_type *get_mem_type(unsigned int type)</div><div class='hunk'>@@ -429,6 +434,7 @@ static void __init build_mem_type_table(void)</div><div class='ctx'> 	if (arch_is_coherent() &amp;&amp; cpu_is_xsc3()) {</div><div class='ctx'> 		mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;</div><div class='ctx'> 		mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;</div><div class='add'>+		mem_types[MT_MEMORY_DMA_READY].prot_pte |= L_PTE_SHARED;</div><div class='ctx'> 		mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;</div><div class='ctx'> 		mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -460,6 +466,7 @@ static void __init build_mem_type_table(void)</div><div class='ctx'> 			mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;</div><div class='ctx'> 			mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;</div><div class='ctx'> 			mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;</div><div class='add'>+			mem_types[MT_MEMORY_DMA_READY].prot_pte |= L_PTE_SHARED;</div><div class='ctx'> 			mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;</div><div class='ctx'> 			mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -489,7 +496,8 @@ static void __init build_mem_type_table(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(mem_types); i++) {</div><div class='ctx'> 		mem_types[i].prot_pte |= PTE_EXT_AF;</div><div class='del'>-		mem_types[i].prot_sect |= PMD_SECT_AF;</div><div class='add'>+		if (mem_types[i].prot_sect)</div><div class='add'>+			mem_types[i].prot_sect |= PMD_SECT_AF;</div><div class='ctx'> 	}</div><div class='ctx'> 	kern_pgprot |= PTE_EXT_AF;</div><div class='ctx'> 	vecs_pgprot |= PTE_EXT_AF;</div><div class='hunk'>@@ -511,6 +519,7 @@ static void __init build_mem_type_table(void)</div><div class='ctx'> 	mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;</div><div class='ctx'> 	mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp-&gt;pmd;</div><div class='ctx'> 	mem_types[MT_MEMORY].prot_pte |= kern_pgprot;</div><div class='add'>+	mem_types[MT_MEMORY_DMA_READY].prot_pte |= kern_pgprot;</div><div class='ctx'> 	mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask;</div><div class='ctx'> 	mem_types[MT_ROM].prot_sect |= cp-&gt;pmd;</div><div class='ctx'> </div><div class='hunk'>@@ -595,7 +604,7 @@ static void __init alloc_init_section(pud_t *pud, unsigned long addr,</div><div class='ctx'> 	 * L1 entries, whereas PGDs refer to a group of L1 entries making</div><div class='ctx'> 	 * up one logical pointer to an L2 table.</div><div class='ctx'> 	 */</div><div class='del'>-	if (((addr | end | phys) &amp; ~SECTION_MASK) == 0) {</div><div class='add'>+	if (type-&gt;prot_sect &amp;&amp; ((addr | end | phys) &amp; ~SECTION_MASK) == 0) {</div><div class='ctx'> 		pmd_t *p = pmd;</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_ARM_LPAE</div><div class='hunk'>@@ -618,8 +627,8 @@ static void __init alloc_init_section(pud_t *pud, unsigned long addr,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,</div><div class='del'>-	unsigned long phys, const struct mem_type *type)</div><div class='add'>+static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr,</div><div class='add'>+	unsigned long end, unsigned long phys, const struct mem_type *type)</div><div class='ctx'> {</div><div class='ctx'> 	pud_t *pud = pud_offset(pgd, addr);</div><div class='ctx'> 	unsigned long next;</div><div class='hunk'>@@ -813,7 +822,7 @@ static int __init early_vmalloc(char *arg)</div><div class='ctx'> }</div><div class='ctx'> early_param("vmalloc", early_vmalloc);</div><div class='ctx'> </div><div class='del'>-static phys_addr_t lowmem_limit __initdata = 0;</div><div class='add'>+phys_addr_t arm_lowmem_limit __initdata = 0;</div><div class='ctx'> </div><div class='ctx'> void __init sanity_check_meminfo(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -896,8 +905,8 @@ void __init sanity_check_meminfo(void)</div><div class='ctx'> 			bank-&gt;size = newsize;</div><div class='ctx'> 		}</div><div class='ctx'> #endif</div><div class='del'>-		if (!bank-&gt;highmem &amp;&amp; bank-&gt;start + bank-&gt;size &gt; lowmem_limit)</div><div class='del'>-			lowmem_limit = bank-&gt;start + bank-&gt;size;</div><div class='add'>+		if (!bank-&gt;highmem &amp;&amp; bank-&gt;start + bank-&gt;size &gt; arm_lowmem_limit)</div><div class='add'>+			arm_lowmem_limit = bank-&gt;start + bank-&gt;size;</div><div class='ctx'> </div><div class='ctx'> 		j++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -922,8 +931,8 @@ void __init sanity_check_meminfo(void)</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> 	meminfo.nr_banks = j;</div><div class='del'>-	high_memory = __va(lowmem_limit - 1) + 1;</div><div class='del'>-	memblock_set_current_limit(lowmem_limit);</div><div class='add'>+	high_memory = __va(arm_lowmem_limit - 1) + 1;</div><div class='add'>+	memblock_set_current_limit(arm_lowmem_limit);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void prepare_page_table(void)</div><div class='hunk'>@@ -948,8 +957,8 @@ static inline void prepare_page_table(void)</div><div class='ctx'> 	 * Find the end of the first block of lowmem.</div><div class='ctx'> 	 */</div><div class='ctx'> 	end = memblock.memory.regions[0].base + memblock.memory.regions[0].size;</div><div class='del'>-	if (end &gt;= lowmem_limit)</div><div class='del'>-		end = lowmem_limit;</div><div class='add'>+	if (end &gt;= arm_lowmem_limit)</div><div class='add'>+		end = arm_lowmem_limit;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Clear out all the kernel space mappings, except for the first</div><div class='hunk'>@@ -1092,8 +1101,8 @@ static void __init map_lowmem(void)</div><div class='ctx'> 		phys_addr_t end = start + reg-&gt;size;</div><div class='ctx'> 		struct map_desc map;</div><div class='ctx'> </div><div class='del'>-		if (end &gt; lowmem_limit)</div><div class='del'>-			end = lowmem_limit;</div><div class='add'>+		if (end &gt; arm_lowmem_limit)</div><div class='add'>+			end = arm_lowmem_limit;</div><div class='ctx'> 		if (start &gt;= end)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -1114,11 +1123,12 @@ void __init paging_init(struct machine_desc *mdesc)</div><div class='ctx'> {</div><div class='ctx'> 	void *zero_page;</div><div class='ctx'> </div><div class='del'>-	memblock_set_current_limit(lowmem_limit);</div><div class='add'>+	memblock_set_current_limit(arm_lowmem_limit);</div><div class='ctx'> </div><div class='ctx'> 	build_mem_type_table();</div><div class='ctx'> 	prepare_page_table();</div><div class='ctx'> 	map_lowmem();</div><div class='add'>+	dma_contiguous_remap();</div><div class='ctx'> 	devicemaps_init(mdesc);</div><div class='ctx'> 	kmap_init();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S<br/>index 234951345eb3..0650bb87c1e3 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-arm1020.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-arm1020.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-arm1020.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm1020.S</a></div><div class='hunk'>@@ -241,6 +241,7 @@ ENTRY(arm1020_coherent_user_range)</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='ctx'> 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S<br/>index c244b06caac9..4188478325a6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-arm1020e.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-arm1020e.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-arm1020e.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm1020e.S</a></div><div class='hunk'>@@ -235,6 +235,7 @@ ENTRY(arm1020e_coherent_user_range)</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='ctx'> 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S<br/>index 38fe22efd18f..33c68824bff0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-arm1022.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-arm1022.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-arm1022.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm1022.S</a></div><div class='hunk'>@@ -224,6 +224,7 @@ ENTRY(arm1022_coherent_user_range)</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='ctx'> 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S<br/>index 3eb9c3c26c75..fbc1d5fc24dc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-arm1026.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-arm1026.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-arm1026.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm1026.S</a></div><div class='hunk'>@@ -218,6 +218,7 @@ ENTRY(arm1026_coherent_user_range)</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='ctx'> 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S<br/>deleted file mode 100644<br/>index 4fbeb5b8e6c2..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-arm6_7.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-arm6_7.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,327 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/arm/mm/proc-arm6,7.S</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1997-2000 Russell King</div><div class='del'>- *  hacked for non-paged-MM by Hyok S. Choi, 2003.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  These are the low level assembler for performing cache and TLB</div><div class='del'>- *  functions on the ARM610 &amp; ARM710.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;asm/assembler.h&gt;</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/pgtable-hwdef.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-</div><div class='del'>-#include "proc-macros.S"</div><div class='del'>-</div><div class='del'>-ENTRY(cpu_arm6_dcache_clean_area)</div><div class='del'>-ENTRY(cpu_arm7_dcache_clean_area)</div><div class='del'>-		mov	pc, lr</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Function: arm6_7_data_abort ()</div><div class='del'>- *</div><div class='del'>- * Params  : r2 = pt_regs</div><div class='del'>- *	   : r4 = aborted context pc</div><div class='del'>- *	   : r5 = aborted context psr</div><div class='del'>- *</div><div class='del'>- * Purpose : obtain information about current aborted instruction</div><div class='del'>- *</div><div class='del'>- * Returns : r4-r5, r10-r11, r13 preserved</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-ENTRY(cpu_arm7_data_abort)</div><div class='del'>-	mrc	p15, 0, r1, c5, c0, 0		@ get FSR</div><div class='del'>-	mrc	p15, 0, r0, c6, c0, 0		@ get FAR</div><div class='del'>-	ldr	r8, [r4]			@ read arm instruction</div><div class='del'>-	tst	r8, #1 &lt;&lt; 20			@ L = 0 -&gt; write?</div><div class='del'>-	orreq	r1, r1, #1 &lt;&lt; 11		@ yes.</div><div class='del'>-	and	r7, r8, #15 &lt;&lt; 24</div><div class='del'>-	add	pc, pc, r7, lsr #22		@ Now branch to the relevant processing routine</div><div class='del'>-	nop</div><div class='del'>-</div><div class='del'>-/* 0 */	b	.data_unknown</div><div class='del'>-/* 1 */	b	do_DataAbort			@ swp</div><div class='del'>-/* 2 */	b	.data_unknown</div><div class='del'>-/* 3 */	b	.data_unknown</div><div class='del'>-/* 4 */	b	.data_arm_lateldrpostconst	@ ldr	rd, [rn], #m</div><div class='del'>-/* 5 */	b	.data_arm_lateldrpreconst	@ ldr	rd, [rn, #m]</div><div class='del'>-/* 6 */	b	.data_arm_lateldrpostreg	@ ldr	rd, [rn], rm</div><div class='del'>-/* 7 */	b	.data_arm_lateldrprereg		@ ldr	rd, [rn, rm]</div><div class='del'>-/* 8 */	b	.data_arm_ldmstm		@ ldm*a	rn, &lt;rlist&gt;</div><div class='del'>-/* 9 */	b	.data_arm_ldmstm		@ ldm*b	rn, &lt;rlist&gt;</div><div class='del'>-/* a */	b	.data_unknown</div><div class='del'>-/* b */	b	.data_unknown</div><div class='del'>-/* c */	b	do_DataAbort			@ ldc	rd, [rn], #m	@ Same as ldr	rd, [rn], #m</div><div class='del'>-/* d */	b	do_DataAbort			@ ldc	rd, [rn, #m]</div><div class='del'>-/* e */	b	.data_unknown</div><div class='del'>-/* f */</div><div class='del'>-.data_unknown:	@ Part of jumptable</div><div class='del'>-	mov	r0, r4</div><div class='del'>-	mov	r1, r8</div><div class='del'>-	b	baddataabort</div><div class='del'>-</div><div class='del'>-ENTRY(cpu_arm6_data_abort)</div><div class='del'>-	mrc	p15, 0, r1, c5, c0, 0		@ get FSR</div><div class='del'>-	mrc	p15, 0, r0, c6, c0, 0		@ get FAR</div><div class='del'>-	ldr	r8, [r4]			@ read arm instruction</div><div class='del'>-	tst	r8, #1 &lt;&lt; 20			@ L = 0 -&gt; write?</div><div class='del'>-	orreq	r1, r1, #1 &lt;&lt; 11		@ yes.</div><div class='del'>-	and	r7, r8, #14 &lt;&lt; 24</div><div class='del'>-	teq	r7, #8 &lt;&lt; 24			@ was it ldm/stm</div><div class='del'>-	bne	do_DataAbort</div><div class='del'>-</div><div class='del'>-.data_arm_ldmstm:</div><div class='del'>-	tst	r8, #1 &lt;&lt; 21			@ check writeback bit</div><div class='del'>-	beq	do_DataAbort			@ no writeback -&gt; no fixup</div><div class='del'>-	mov	r7, #0x11</div><div class='del'>-	orr	r7, r7, #0x1100</div><div class='del'>-	and	r6, r8, r7</div><div class='del'>-	and	r9, r8, r7, lsl #1</div><div class='del'>-	add	r6, r6, r9, lsr #1</div><div class='del'>-	and	r9, r8, r7, lsl #2</div><div class='del'>-	add	r6, r6, r9, lsr #2</div><div class='del'>-	and	r9, r8, r7, lsl #3</div><div class='del'>-	add	r6, r6, r9, lsr #3</div><div class='del'>-	add	r6, r6, r6, lsr #8</div><div class='del'>-	add	r6, r6, r6, lsr #4</div><div class='del'>-	and	r6, r6, #15			@ r6 = no. of registers to transfer.</div><div class='del'>-	and	r9, r8, #15 &lt;&lt; 16		@ Extract 'n' from instruction</div><div class='del'>-	ldr	r7, [r2, r9, lsr #14]		@ Get register 'Rn'</div><div class='del'>-	tst	r8, #1 &lt;&lt; 23			@ Check U bit</div><div class='del'>-	subne	r7, r7, r6, lsl #2		@ Undo increment</div><div class='del'>-	addeq	r7, r7, r6, lsl #2		@ Undo decrement</div><div class='del'>-	str	r7, [r2, r9, lsr #14]		@ Put register 'Rn'</div><div class='del'>-	b	do_DataAbort</div><div class='del'>-</div><div class='del'>-.data_arm_apply_r6_and_rn:</div><div class='del'>-	and	r9, r8, #15 &lt;&lt; 16		@ Extract 'n' from instruction</div><div class='del'>-	ldr	r7, [r2, r9, lsr #14]		@ Get register 'Rn'</div><div class='del'>-	tst	r8, #1 &lt;&lt; 23			@ Check U bit</div><div class='del'>-	subne	r7, r7, r6			@ Undo incrmenet</div><div class='del'>-	addeq	r7, r7, r6			@ Undo decrement</div><div class='del'>-	str	r7, [r2, r9, lsr #14]		@ Put register 'Rn'</div><div class='del'>-	b	do_DataAbort</div><div class='del'>-</div><div class='del'>-.data_arm_lateldrpreconst:</div><div class='del'>-	tst	r8, #1 &lt;&lt; 21			@ check writeback bit</div><div class='del'>-	beq	do_DataAbort			@ no writeback -&gt; no fixup</div><div class='del'>-.data_arm_lateldrpostconst:</div><div class='del'>-	movs	r6, r8, lsl #20			@ Get offset</div><div class='del'>-	beq	do_DataAbort			@ zero -&gt; no fixup</div><div class='del'>-	and	r9, r8, #15 &lt;&lt; 16		@ Extract 'n' from instruction</div><div class='del'>-	ldr	r7, [r2, r9, lsr #14]		@ Get register 'Rn'</div><div class='del'>-	tst	r8, #1 &lt;&lt; 23			@ Check U bit</div><div class='del'>-	subne	r7, r7, r6, lsr #20		@ Undo increment</div><div class='del'>-	addeq	r7, r7, r6, lsr #20		@ Undo decrement</div><div class='del'>-	str	r7, [r2, r9, lsr #14]		@ Put register 'Rn'</div><div class='del'>-	b	do_DataAbort</div><div class='del'>-</div><div class='del'>-.data_arm_lateldrprereg:</div><div class='del'>-	tst	r8, #1 &lt;&lt; 21			@ check writeback bit</div><div class='del'>-	beq	do_DataAbort			@ no writeback -&gt; no fixup</div><div class='del'>-.data_arm_lateldrpostreg:</div><div class='del'>-	and	r7, r8, #15			@ Extract 'm' from instruction</div><div class='del'>-	ldr	r6, [r2, r7, lsl #2]		@ Get register 'Rm'</div><div class='del'>-	mov	r9, r8, lsr #7			@ get shift count</div><div class='del'>-	ands	r9, r9, #31</div><div class='del'>-	and	r7, r8, #0x70			@ get shift type</div><div class='del'>-	orreq	r7, r7, #8			@ shift count = 0</div><div class='del'>-	add	pc, pc, r7</div><div class='del'>-	nop</div><div class='del'>-</div><div class='del'>-	mov	r6, r6, lsl r9			@ 0: LSL #!0</div><div class='del'>-	b	.data_arm_apply_r6_and_rn</div><div class='del'>-	b	.data_arm_apply_r6_and_rn	@ 1: LSL #0</div><div class='del'>-	nop</div><div class='del'>-	b	.data_unknown			@ 2: MUL?</div><div class='del'>-	nop</div><div class='del'>-	b	.data_unknown			@ 3: MUL?</div><div class='del'>-	nop</div><div class='del'>-	mov	r6, r6, lsr r9			@ 4: LSR #!0</div><div class='del'>-	b	.data_arm_apply_r6_and_rn</div><div class='del'>-	mov	r6, r6, lsr #32			@ 5: LSR #32</div><div class='del'>-	b	.data_arm_apply_r6_and_rn</div><div class='del'>-	b	.data_unknown			@ 6: MUL?</div><div class='del'>-	nop</div><div class='del'>-	b	.data_unknown			@ 7: MUL?</div><div class='del'>-	nop</div><div class='del'>-	mov	r6, r6, asr r9			@ 8: ASR #!0</div><div class='del'>-	b	.data_arm_apply_r6_and_rn</div><div class='del'>-	mov	r6, r6, asr #32			@ 9: ASR #32</div><div class='del'>-	b	.data_arm_apply_r6_and_rn</div><div class='del'>-	b	.data_unknown			@ A: MUL?</div><div class='del'>-	nop</div><div class='del'>-	b	.data_unknown			@ B: MUL?</div><div class='del'>-	nop</div><div class='del'>-	mov	r6, r6, ror r9			@ C: ROR #!0</div><div class='del'>-	b	.data_arm_apply_r6_and_rn</div><div class='del'>-	mov	r6, r6, rrx			@ D: RRX</div><div class='del'>-	b	.data_arm_apply_r6_and_rn</div><div class='del'>-	b	.data_unknown			@ E: MUL?</div><div class='del'>-	nop</div><div class='del'>-	b	.data_unknown			@ F: MUL?</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Function: arm6_7_proc_init (void)</div><div class='del'>- *	   : arm6_7_proc_fin (void)</div><div class='del'>- *</div><div class='del'>- * Notes   : This processor does not require these</div><div class='del'>- */</div><div class='del'>-ENTRY(cpu_arm6_proc_init)</div><div class='del'>-ENTRY(cpu_arm7_proc_init)</div><div class='del'>-		mov	pc, lr</div><div class='del'>-</div><div class='del'>-ENTRY(cpu_arm6_proc_fin)</div><div class='del'>-ENTRY(cpu_arm7_proc_fin)</div><div class='del'>-		mov	r0, #0x31			@ ....S..DP...M</div><div class='del'>-		mcr	p15, 0, r0, c1, c0, 0		@ disable caches</div><div class='del'>-		mov	pc, lr</div><div class='del'>-</div><div class='del'>-ENTRY(cpu_arm6_do_idle)</div><div class='del'>-ENTRY(cpu_arm7_do_idle)</div><div class='del'>-		mov	pc, lr</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Function: arm6_7_switch_mm(unsigned long pgd_phys)</div><div class='del'>- * Params  : pgd_phys	Physical address of page table</div><div class='del'>- * Purpose : Perform a task switch, saving the old processes state, and restoring</div><div class='del'>- *	     the new.</div><div class='del'>- */</div><div class='del'>-ENTRY(cpu_arm6_switch_mm)</div><div class='del'>-ENTRY(cpu_arm7_switch_mm)</div><div class='del'>-#ifdef CONFIG_MMU</div><div class='del'>-		mov	r1, #0</div><div class='del'>-		mcr	p15, 0, r1, c7, c0, 0		@ flush cache</div><div class='del'>-		mcr	p15, 0, r0, c2, c0, 0		@ update page table ptr</div><div class='del'>-		mcr	p15, 0, r1, c5, c0, 0		@ flush TLBs</div><div class='del'>-#endif</div><div class='del'>-		mov	pc, lr</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Function: arm6_7_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext)</div><div class='del'>- * Params  : r0 = Address to set</div><div class='del'>- *	   : r1 = value to set</div><div class='del'>- * Purpose : Set a PTE and flush it out of any WB cache</div><div class='del'>- */</div><div class='del'>-	.align	5</div><div class='del'>-ENTRY(cpu_arm6_set_pte_ext)</div><div class='del'>-ENTRY(cpu_arm7_set_pte_ext)</div><div class='del'>-#ifdef CONFIG_MMU</div><div class='del'>-	armv3_set_pte_ext wc_disable=0</div><div class='del'>-#endif /* CONFIG_MMU */</div><div class='del'>-	mov	pc, lr</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Function: _arm6_7_reset</div><div class='del'>- * Params  : r0 = address to jump to</div><div class='del'>- * Notes   : This sets up everything for a reset</div><div class='del'>- */</div><div class='del'>-		.pushsection	.idmap.text, "ax"</div><div class='del'>-ENTRY(cpu_arm6_reset)</div><div class='del'>-ENTRY(cpu_arm7_reset)</div><div class='del'>-		mov	r1, #0</div><div class='del'>-		mcr	p15, 0, r1, c7, c0, 0		@ flush cache</div><div class='del'>-#ifdef CONFIG_MMU</div><div class='del'>-		mcr	p15, 0, r1, c5, c0, 0		@ flush TLB</div><div class='del'>-#endif</div><div class='del'>-		mov	r1, #0x30</div><div class='del'>-		mcr	p15, 0, r1, c1, c0, 0		@ turn off MMU etc</div><div class='del'>-		mov	pc, r0</div><div class='del'>-ENDPROC(cpu_arm6_reset)</div><div class='del'>-ENDPROC(cpu_arm7_reset)</div><div class='del'>-		.popsection</div><div class='del'>-</div><div class='del'>-		__CPUINIT</div><div class='del'>-</div><div class='del'>-		.type	__arm6_setup, #function</div><div class='del'>-__arm6_setup:	mov	r0, #0</div><div class='del'>-		mcr	p15, 0, r0, c7, c0		@ flush caches on v3</div><div class='del'>-#ifdef CONFIG_MMU</div><div class='del'>-		mcr	p15, 0, r0, c5, c0		@ flush TLBs on v3</div><div class='del'>-		mov	r0, #0x3d			@ . ..RS BLDP WCAM</div><div class='del'>-		orr	r0, r0, #0x100			@ . ..01 0011 1101</div><div class='del'>-#else</div><div class='del'>-		mov	r0, #0x3c			@ . ..RS BLDP WCA.</div><div class='del'>-#endif</div><div class='del'>-		mov	pc, lr</div><div class='del'>-		.size	__arm6_setup, . - __arm6_setup</div><div class='del'>-</div><div class='del'>-		.type	__arm7_setup, #function</div><div class='del'>-__arm7_setup:	mov	r0, #0</div><div class='del'>-		mcr	p15, 0, r0, c7, c0		@ flush caches on v3</div><div class='del'>-#ifdef CONFIG_MMU</div><div class='del'>-		mcr	p15, 0, r0, c5, c0		@ flush TLBs on v3</div><div class='del'>-		mcr	p15, 0, r0, c3, c0		@ load domain access register</div><div class='del'>-		mov	r0, #0x7d			@ . ..RS BLDP WCAM</div><div class='del'>-		orr	r0, r0, #0x100			@ . ..01 0111 1101</div><div class='del'>-#else</div><div class='del'>-		mov	r0, #0x7c			@ . ..RS BLDP WCA.</div><div class='del'>-#endif</div><div class='del'>-		mov	pc, lr</div><div class='del'>-		.size	__arm7_setup, . - __arm7_setup</div><div class='del'>-</div><div class='del'>-		__INITDATA</div><div class='del'>-</div><div class='del'>-		@ define struct processor (see &lt;asm/proc-fns.h&gt; and proc-macros.S)</div><div class='del'>-		define_processor_functions arm6, dabort=cpu_arm6_data_abort, pabort=legacy_pabort</div><div class='del'>-		define_processor_functions arm7, dabort=cpu_arm7_data_abort, pabort=legacy_pabort</div><div class='del'>-</div><div class='del'>-		.section ".rodata"</div><div class='del'>-</div><div class='del'>-		string	cpu_arch_name, "armv3"</div><div class='del'>-		string	cpu_elf_name, "v3"</div><div class='del'>-		string	cpu_arm6_name, "ARM6"</div><div class='del'>-		string	cpu_arm610_name, "ARM610"</div><div class='del'>-		string	cpu_arm7_name, "ARM7"</div><div class='del'>-		string	cpu_arm710_name, "ARM710"</div><div class='del'>-</div><div class='del'>-		.align</div><div class='del'>-</div><div class='del'>-		.section ".proc.info.init", #alloc, #execinstr</div><div class='del'>-</div><div class='del'>-.macro arm67_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, \</div><div class='del'>-	cpu_mm_mmu_flags:req, cpu_flush:req, cpu_proc_funcs:req</div><div class='del'>-		.type	__\name\()_proc_info, #object</div><div class='del'>-__\name\()_proc_info:</div><div class='del'>-		.long	\cpu_val</div><div class='del'>-		.long	\cpu_mask</div><div class='del'>-		.long	\cpu_mm_mmu_flags</div><div class='del'>-		.long   PMD_TYPE_SECT | \</div><div class='del'>-			PMD_BIT4 | \</div><div class='del'>-			PMD_SECT_AP_WRITE | \</div><div class='del'>-			PMD_SECT_AP_READ</div><div class='del'>-		b	\cpu_flush</div><div class='del'>-		.long	cpu_arch_name</div><div class='del'>-		.long	cpu_elf_name</div><div class='del'>-		.long	HWCAP_SWP | HWCAP_26BIT</div><div class='del'>-		.long	\cpu_name</div><div class='del'>-		.long	\cpu_proc_funcs</div><div class='del'>-		.long	v3_tlb_fns</div><div class='del'>-		.long	v3_user_fns</div><div class='del'>-		.long	v3_cache_fns</div><div class='del'>-		.size	__\name\()_proc_info, . - __\name\()_proc_info</div><div class='del'>-.endm</div><div class='del'>-</div><div class='del'>-	arm67_proc_info	arm6,	0x41560600, 0xfffffff0, cpu_arm6_name, \</div><div class='del'>-		0x00000c1e, __arm6_setup, arm6_processor_functions</div><div class='del'>-	arm67_proc_info	arm610,	0x41560610, 0xfffffff0, cpu_arm610_name, \</div><div class='del'>-		0x00000c1e, __arm6_setup, arm6_processor_functions</div><div class='del'>-	arm67_proc_info	arm7,	0x41007000, 0xffffff00, cpu_arm7_name, \</div><div class='del'>-		0x00000c1e, __arm7_setup, arm7_processor_functions</div><div class='del'>-	arm67_proc_info	arm710,	0x41007100, 0xfff8ff00, cpu_arm710_name, \</div><div class='del'>-			PMD_TYPE_SECT | \</div><div class='del'>-			PMD_SECT_BUFFERABLE | \</div><div class='del'>-			PMD_SECT_CACHEABLE | \</div><div class='del'>-			PMD_BIT4 | \</div><div class='del'>-			PMD_SECT_AP_WRITE | \</div><div class='del'>-			PMD_SECT_AP_READ, \</div><div class='del'>-		__arm7_setup, arm7_processor_functions</div><div class='head'>diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S<br/>index cb941ae95f66..1a8c138eb897 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-arm920.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-arm920.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-arm920.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm920.S</a></div><div class='hunk'>@@ -210,6 +210,7 @@ ENTRY(arm920_coherent_user_range)</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='ctx'> 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S<br/>index 4ec0e074dd55..4c44d7e1c3ca 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-arm922.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-arm922.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-arm922.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm922.S</a></div><div class='hunk'>@@ -212,6 +212,7 @@ ENTRY(arm922_coherent_user_range)</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='ctx'> 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S<br/>index 9dccd9a365b3..ec5b1180994f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-arm925.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-arm925.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-arm925.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm925.S</a></div><div class='hunk'>@@ -258,6 +258,7 @@ ENTRY(arm925_coherent_user_range)</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='ctx'> 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S<br/>index 820259b81a1f..c31e62c606c0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-arm926.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-arm926.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-arm926.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm926.S</a></div><div class='hunk'>@@ -221,6 +221,7 @@ ENTRY(arm926_coherent_user_range)</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='ctx'> 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S<br/>index 9fdc0a170974..a613a7dd7146 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-arm940.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-arm940.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-arm940.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm940.S</a></div><div class='hunk'>@@ -160,7 +160,7 @@ ENTRY(arm940_coherent_user_range)</div><div class='ctx'>  *	- size	- region size</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(arm940_flush_kern_dcache_area)</div><div class='del'>-	mov	ip, #0</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	r1, #(CACHE_DSEGMENTS - 1) &lt;&lt; 4	@ 4 segments</div><div class='ctx'> 1:	orr	r3, r1, #(CACHE_DENTRIES - 1) &lt;&lt; 26 @ 64 entries</div><div class='ctx'> 2:	mcr	p15, 0, r3, c7, c14, 2		@ clean/flush D index</div><div class='hunk'>@@ -168,8 +168,8 @@ ENTRY(arm940_flush_kern_dcache_area)</div><div class='ctx'> 	bcs	2b				@ entries 63 to 0</div><div class='ctx'> 	subs	r1, r1, #1 &lt;&lt; 4</div><div class='ctx'> 	bcs	1b				@ segments 7 to 0</div><div class='del'>-	mcr	p15, 0, ip, c7, c5, 0		@ invalidate I cache</div><div class='del'>-	mcr	p15, 0, ip, c7, c10, 4		@ drain WB</div><div class='add'>+	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache</div><div class='add'>+	mcr	p15, 0, r0, c7, c10, 4		@ drain WB</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S<br/>index f684cfedcca9..9f4f2999fdd0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-arm946.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-arm946.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-arm946.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-arm946.S</a></div><div class='hunk'>@@ -190,6 +190,7 @@ ENTRY(arm946_coherent_user_range)</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='ctx'> 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S<br/>index ba3c500584ac..23a8e4c7f2bd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-feroceon.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-feroceon.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-feroceon.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-feroceon.S</a></div><div class='hunk'>@@ -232,6 +232,7 @@ ENTRY(feroceon_coherent_user_range)</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='ctx'> 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S<br/>index cdfedc5b8ad8..fbb2124a547d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-mohawk.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-mohawk.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-mohawk.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-mohawk.S</a></div><div class='hunk'>@@ -193,6 +193,7 @@ ENTRY(mohawk_coherent_user_range)</div><div class='ctx'> 	cmp	r0, r1</div><div class='ctx'> 	blo	1b</div><div class='ctx'> 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB</div><div class='add'>+	mov	r0, #0</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -344,6 +345,41 @@ ENTRY(cpu_mohawk_set_pte_ext)</div><div class='ctx'> 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> </div><div class='add'>+.globl	cpu_mohawk_suspend_size</div><div class='add'>+.equ	cpu_mohawk_suspend_size, 4 * 6</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+ENTRY(cpu_mohawk_do_suspend)</div><div class='add'>+	stmfd	sp!, {r4 - r9, lr}</div><div class='add'>+	mrc	p14, 0, r4, c6, c0, 0	@ clock configuration, for turbo mode</div><div class='add'>+	mrc	p15, 0, r5, c15, c1, 0	@ CP access reg</div><div class='add'>+	mrc	p15, 0, r6, c13, c0, 0	@ PID</div><div class='add'>+	mrc 	p15, 0, r7, c3, c0, 0	@ domain ID</div><div class='add'>+	mrc	p15, 0, r8, c1, c0, 1	@ auxiliary control reg</div><div class='add'>+	mrc 	p15, 0, r9, c1, c0, 0	@ control reg</div><div class='add'>+	bic	r4, r4, #2		@ clear frequency change bit</div><div class='add'>+	stmia	r0, {r4 - r9}		@ store cp regs</div><div class='add'>+	ldmia	sp!, {r4 - r9, pc}</div><div class='add'>+ENDPROC(cpu_mohawk_do_suspend)</div><div class='add'>+</div><div class='add'>+ENTRY(cpu_mohawk_do_resume)</div><div class='add'>+	ldmia	r0, {r4 - r9}		@ load cp regs</div><div class='add'>+	mov	ip, #0</div><div class='add'>+	mcr	p15, 0, ip, c7, c7, 0	@ invalidate I &amp; D caches, BTB</div><div class='add'>+	mcr	p15, 0, ip, c7, c10, 4	@ drain write (&amp;fill) buffer</div><div class='add'>+	mcr	p15, 0, ip, c7, c5, 4	@ flush prefetch buffer</div><div class='add'>+	mcr	p15, 0, ip, c8, c7, 0	@ invalidate I &amp; D TLBs</div><div class='add'>+	mcr	p14, 0, r4, c6, c0, 0	@ clock configuration, turbo mode.</div><div class='add'>+	mcr	p15, 0, r5, c15, c1, 0	@ CP access reg</div><div class='add'>+	mcr	p15, 0, r6, c13, c0, 0	@ PID</div><div class='add'>+	mcr	p15, 0, r7, c3, c0, 0	@ domain ID</div><div class='add'>+	orr	r1, r1, #0x18		@ cache the page table in L2</div><div class='add'>+	mcr	p15, 0, r1, c2, c0, 0	@ translation table base addr</div><div class='add'>+	mcr	p15, 0, r8, c1, c0, 1	@ auxiliary control reg</div><div class='add'>+	mov	r0, r9			@ control register</div><div class='add'>+	b	cpu_resume_mmu</div><div class='add'>+ENDPROC(cpu_mohawk_do_resume)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	__CPUINIT</div><div class='ctx'> </div><div class='ctx'> 	.type	__mohawk_setup, #function</div><div class='head'>diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S<br/>index 3a4b3e7b888c..42ac069c8012 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/proc-v7-2level.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/proc-v7-2level.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/proc-v7-2level.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/proc-v7-2level.S</a></div><div class='hunk'>@@ -49,15 +49,10 @@ ENTRY(cpu_v7_switch_mm)</div><div class='ctx'> #ifdef CONFIG_ARM_ERRATA_754322</div><div class='ctx'> 	dsb</div><div class='ctx'> #endif</div><div class='del'>-	mcr	p15, 0, r2, c13, c0, 1		@ set reserved context ID</div><div class='del'>-	isb</div><div class='del'>-1:	mcr	p15, 0, r0, c2, c0, 0		@ set TTB 0</div><div class='del'>-	isb</div><div class='del'>-#ifdef CONFIG_ARM_ERRATA_754322</div><div class='del'>-	dsb</div><div class='del'>-#endif</div><div class='ctx'> 	mcr	p15, 0, r1, c13, c0, 1		@ set context ID</div><div class='ctx'> 	isb</div><div class='add'>+	mcr	p15, 0, r0, c2, c0, 0		@ set TTB 0</div><div class='add'>+	isb</div><div class='ctx'> #endif</div><div class='ctx'> 	mov	pc, lr</div><div class='ctx'> ENDPROC(cpu_v7_switch_mm)</div><div class='head'>diff --git a/arch/arm/mm/tlb-v3.S b/arch/arm/mm/tlb-v3.S<br/>deleted file mode 100644<br/>index d253995ec4ca..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/tlb-v3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/tlb-v3.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,48 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/arm/mm/tlbv3.S</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1997-2002 Russell King</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  ARM architecture version 3 TLB handling functions.</div><div class='del'>- *</div><div class='del'>- * Processors: ARM610, ARM710.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;asm/asm-offsets.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-#include "proc-macros.S"</div><div class='del'>-</div><div class='del'>-	.align	5</div><div class='del'>-/*</div><div class='del'>- *	v3_flush_user_tlb_range(start, end, mm)</div><div class='del'>- *</div><div class='del'>- *	Invalidate a range of TLB entries in the specified address space.</div><div class='del'>- *</div><div class='del'>- *	- start - range start address</div><div class='del'>- *	- end   - range end address</div><div class='del'>- *	- mm    - mm_struct describing address space</div><div class='del'>- */</div><div class='del'>-	.align	5</div><div class='del'>-ENTRY(v3_flush_user_tlb_range)</div><div class='del'>-	vma_vm_mm r2, r2</div><div class='del'>-	act_mm	r3				@ get current-&gt;active_mm</div><div class='del'>-	teq	r2, r3				@ == mm ?</div><div class='del'>-	movne	pc, lr				@ no, we dont do anything</div><div class='del'>-ENTRY(v3_flush_kern_tlb_range)</div><div class='del'>-	bic	r0, r0, #0x0ff</div><div class='del'>-	bic	r0, r0, #0xf00</div><div class='del'>-1:	mcr	p15, 0, r0, c6, c0, 0		@ invalidate TLB entry</div><div class='del'>-	add	r0, r0, #PAGE_SZ</div><div class='del'>-	cmp	r0, r1</div><div class='del'>-	blo	1b</div><div class='del'>-	mov	pc, lr</div><div class='del'>-</div><div class='del'>-	__INITDATA</div><div class='del'>-</div><div class='del'>-	/* define struct cpu_tlb_fns (see &lt;asm/tlbflush.h&gt; and proc-macros.S) */</div><div class='del'>-	define_tlb_functions v3, v3_tlb_flags</div><div class='head'>diff --git a/arch/arm/mm/vmregion.h b/arch/arm/mm/vmregion.h<br/>index 162be662c088..bf312c354a21 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/mm/vmregion.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/mm/vmregion.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/mm/vmregion.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/mm/vmregion.h</a></div><div class='hunk'>@@ -17,7 +17,7 @@ struct arm_vmregion {</div><div class='ctx'> 	struct list_head	vm_list;</div><div class='ctx'> 	unsigned long		vm_start;</div><div class='ctx'> 	unsigned long		vm_end;</div><div class='del'>-	struct page		*vm_pages;</div><div class='add'>+	void			*priv;</div><div class='ctx'> 	int			vm_active;</div><div class='ctx'> 	const void		*caller;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/nwfpe/fpmodule.c b/arch/arm/nwfpe/fpmodule.c<br/>index cb7658e8acc5..4e729f055a81 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/nwfpe/fpmodule.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/nwfpe/fpmodule.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/nwfpe/fpmodule.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/nwfpe/fpmodule.c</a></div><div class='hunk'>@@ -147,7 +147,7 @@ void float_raise(signed char flags)</div><div class='ctx'> #ifdef CONFIG_DEBUG_USER</div><div class='ctx'> 	if (flags &amp; debug)</div><div class='ctx'>  		printk(KERN_DEBUG</div><div class='del'>-		       "NWFPE: %s[%d] takes exception %08x at %p from %08lx\n",</div><div class='add'>+		       "NWFPE: %s[%d] takes exception %08x at %pf from %08lx\n",</div><div class='ctx'> 		       current-&gt;comm, current-&gt;pid, flags,</div><div class='ctx'> 		       __builtin_return_address(0), GET_USERREG()-&gt;ARM_pc);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c<br/>index 0da42058a20f..8daae9b230ea 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-iop/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-iop/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-iop/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-iop/pci.c</a></div><div class='hunk'>@@ -160,7 +160,7 @@ iop3xx_write_config(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='ctx'> 	return PCIBIOS_SUCCESSFUL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct pci_ops iop3xx_ops = {</div><div class='add'>+struct pci_ops iop3xx_ops = {</div><div class='ctx'> 	.read	= iop3xx_read_config,</div><div class='ctx'> 	.write	= iop3xx_write_config,</div><div class='ctx'> };</div><div class='hunk'>@@ -220,12 +220,6 @@ int iop3xx_pci_setup(int nr, struct pci_sys_data *sys)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *sys)</div><div class='del'>-{</div><div class='del'>-	return pci_scan_root_bus(NULL, sys-&gt;busnr, &amp;iop3xx_ops, sys,</div><div class='del'>-				 &amp;sys-&gt;resources);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init iop3xx_atu_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* BAR 0 ( Disabled ) */</div><div class='head'>diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c<br/>index 2ed3ab173add..5079787273d2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-mxc/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-mxc/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-mxc/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/clock.c</a></div><div class='hunk'>@@ -41,6 +41,7 @@</div><div class='ctx'> #include &lt;mach/clock.h&gt;</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_COMMON_CLK</div><div class='ctx'> static LIST_HEAD(clocks);</div><div class='ctx'> static DEFINE_MUTEX(clocks_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -200,6 +201,16 @@ struct clk *clk_get_parent(struct clk *clk)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(clk_get_parent);</div><div class='ctx'> </div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Lock to protect the clock module (ccm) registers. Used</div><div class='add'>+ * on all i.MXs</div><div class='add'>+ */</div><div class='add'>+DEFINE_SPINLOCK(imx_ccm_lock);</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_COMMON_CLK */</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Get the resulting clock rate from a PLL register value and the input</div><div class='ctx'>  * frequency. PLLs with this register layout can at least be found on</div><div class='head'>diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h<br/>index 753a5988d85c..bd940c795cbb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/clock.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-mxc/include/mach/clock.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/clock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/clock.h</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_COMMON_CLK</div><div class='ctx'> struct module;</div><div class='ctx'> </div><div class='ctx'> struct clk {</div><div class='hunk'>@@ -59,6 +60,9 @@ struct clk {</div><div class='ctx'> </div><div class='ctx'> int clk_register(struct clk *clk);</div><div class='ctx'> void clk_unregister(struct clk *clk);</div><div class='add'>+#endif /* CONFIG_COMMON_CLK */</div><div class='add'>+</div><div class='add'>+extern spinlock_t imx_ccm_lock;</div><div class='ctx'> </div><div class='ctx'> unsigned long mxc_decode_pll(unsigned int pll, u32 f_ref);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h<br/>index 0319c4a0cafa..cf663d84e7c1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-mxc/include/mach/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/common.h</a></div><div class='hunk'>@@ -53,6 +53,7 @@ extern void imx35_soc_init(void);</div><div class='ctx'> extern void imx50_soc_init(void);</div><div class='ctx'> extern void imx51_soc_init(void);</div><div class='ctx'> extern void imx53_soc_init(void);</div><div class='add'>+extern void imx51_init_late(void);</div><div class='ctx'> extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq);</div><div class='ctx'> extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int);</div><div class='ctx'> extern int mx1_clocks_init(unsigned long fref);</div><div class='hunk'>@@ -149,4 +150,10 @@ extern void imx6q_pm_init(void);</div><div class='ctx'> static inline void imx6q_pm_init(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_NEON</div><div class='add'>+extern int mx51_neon_fixup(void);</div><div class='add'>+#else</div><div class='add'>+static inline int mx51_neon_fixup(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S<br/>index 8ddda365f1a0..761e45f9456f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/debug-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-mxc/include/mach/debug-macro.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/debug-macro.S</a></div><div class='hunk'>@@ -24,6 +24,8 @@</div><div class='ctx'> #define UART_PADDR	MX51_UART1_BASE_ADDR</div><div class='ctx'> #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)</div><div class='ctx'> #define UART_PADDR	MX53_UART1_BASE_ADDR</div><div class='add'>+#elif defined (CONFIG_DEBUG_IMX6Q_UART2)</div><div class='add'>+#define UART_PADDR	MX6Q_UART2_BASE_ADDR</div><div class='ctx'> #elif defined (CONFIG_DEBUG_IMX6Q_UART4)</div><div class='ctx'> #define UART_PADDR	MX6Q_UART4_BASE_ADDR</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h<br/>index c7f5169a6a54..36c8989d9de6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/iomux-mx51.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-mxc/include/mach/iomux-mx51.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/iomux-mx51.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/iomux-mx51.h</a></div><div class='hunk'>@@ -256,13 +256,13 @@</div><div class='ctx'> #define MX51_PAD_NANDF_RB1__GPIO3_9		IOMUX_PAD(0x4fc, 0x120, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_RB1__NANDF_RB1		IOMUX_PAD(0x4fc, 0x120, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_RB1__PATA_IORDY		IOMUX_PAD(0x4fc, 0x120, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_NANDF_RB1__SD4_CMD		IOMUX_PAD(0x4fc, 0x120, 5, __NA_, 0, MX51_SDHCI_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_NANDF_RB1__SD4_CMD		IOMUX_PAD(0x4fc, 0x120, 0x15, __NA_, 0, MX51_SDHCI_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_RB2__DISP2_WAIT		IOMUX_PAD(0x500, 0x124, 5, 0x9a8, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_RB2__ECSPI2_SCLK		IOMUX_PAD(0x500, 0x124, 2, __NA_, 0, MX51_ECSPI_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_RB2__FEC_COL		IOMUX_PAD(0x500, 0x124, 1, 0x94c, 0, MX51_PAD_CTRL_2)</div><div class='ctx'> #define MX51_PAD_NANDF_RB2__GPIO3_10		IOMUX_PAD(0x500, 0x124, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_RB2__NANDF_RB2		IOMUX_PAD(0x500, 0x124, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_NANDF_RB2__USBH3_H3_DP		IOMUX_PAD(0x500, 0x124, 7, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_NANDF_RB2__USBH3_H3_DP		IOMUX_PAD(0x500, 0x124, 0x17, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_RB2__USBH3_NXT		IOMUX_PAD(0x500, 0x124, 6, 0xa20, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_RB3__DISP1_WAIT		IOMUX_PAD(0x504, 0x128, 5, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_RB3__ECSPI2_MISO		IOMUX_PAD(0x504, 0x128, 2, __NA_, 0, MX51_ECSPI_PAD_CTRL)</div><div class='hunk'>@@ -270,7 +270,7 @@</div><div class='ctx'> #define MX51_PAD_NANDF_RB3__GPIO3_11		IOMUX_PAD(0x504, 0x128, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_RB3__NANDF_RB3		IOMUX_PAD(0x504, 0x128, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_RB3__USBH3_CLK		IOMUX_PAD(0x504, 0x128, 6, 0x9f8, 0, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_NANDF_RB3__USBH3_H3_DM		IOMUX_PAD(0x504, 0x128, 7, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_NANDF_RB3__USBH3_H3_DM		IOMUX_PAD(0x504, 0x128, 0x17, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO_NAND__GPIO_NAND		IOMUX_PAD(0x514, 0x12c, 0, 0x998, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO_NAND__PATA_INTRQ		IOMUX_PAD(0x514, 0x12c, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_CS0__GPIO3_16		IOMUX_PAD(0x518, 0x130, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='hunk'>@@ -283,13 +283,13 @@</div><div class='ctx'> #define MX51_PAD_NANDF_CS2__NANDF_CS2		IOMUX_PAD(0x520, 0x138, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_CS2__PATA_CS_0		IOMUX_PAD(0x520, 0x138, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_CS2__SD4_CLK		IOMUX_PAD(0x520, 0x138, 5, __NA_, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS)</div><div class='del'>-#define MX51_PAD_NANDF_CS2__USBH3_H1_DP		IOMUX_PAD(0x520, 0x138, 7, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_NANDF_CS2__USBH3_H1_DP		IOMUX_PAD(0x520, 0x138, 0x17, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_CS3__FEC_MDC		IOMUX_PAD(0x524, 0x13c, 2, __NA_, 0, MX51_PAD_CTRL_5)</div><div class='ctx'> #define MX51_PAD_NANDF_CS3__GPIO3_19		IOMUX_PAD(0x524, 0x13c, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_CS3__NANDF_CS3		IOMUX_PAD(0x524, 0x13c, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_CS3__PATA_CS_1		IOMUX_PAD(0x524, 0x13c, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_CS3__SD4_DAT0		IOMUX_PAD(0x524, 0x13c, 5, __NA_, 0, MX51_SDHCI_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_NANDF_CS3__USBH3_H1_DM		IOMUX_PAD(0x524, 0x13c, 7, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_NANDF_CS3__USBH3_H1_DM		IOMUX_PAD(0x524, 0x13c, 0x17, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_CS4__FEC_TDATA1		IOMUX_PAD(0x528, 0x140, 2, __NA_, 0, MX51_PAD_CTRL_5)</div><div class='ctx'> #define MX51_PAD_NANDF_CS4__GPIO3_20		IOMUX_PAD(0x528, 0x140, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_CS4__NANDF_CS4		IOMUX_PAD(0x528, 0x140, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='hunk'>@@ -316,7 +316,7 @@</div><div class='ctx'> #define MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK	IOMUX_PAD(0x538, 0x150, 1, 0x974, 0, MX51_PAD_CTRL_4)</div><div class='ctx'> #define MX51_PAD_NANDF_RDY_INT__GPIO3_24	IOMUX_PAD(0x538, 0x150, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_RDY_INT__NANDF_RDY_INT	IOMUX_PAD(0x538, 0x150, 0, 0x938, 0, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_NANDF_RDY_INT__SD3_CMD		IOMUX_PAD(0x538, 0x150, 5, __NA_, 0, MX51_SDHCI_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_NANDF_RDY_INT__SD3_CMD		IOMUX_PAD(0x538, 0x150, 0x15, __NA_, 0, MX51_SDHCI_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_D15__ECSPI2_MOSI		IOMUX_PAD(0x53c, 0x154, 2, __NA_, 0, MX51_ECSPI_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_D15__GPIO3_25		IOMUX_PAD(0x53c, 0x154, 3, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_NANDF_D15__NANDF_D15		IOMUX_PAD(0x53c, 0x154, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='hunk'>@@ -672,23 +672,23 @@</div><div class='ctx'> #define MX51_PAD_DISP2_DAT5__DISP2_DAT5		IOMUX_PAD(0x770, 0x368, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT6__DISP2_DAT6		IOMUX_PAD(0x774, 0x36c, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT6__FEC_TDATA1		IOMUX_PAD(0x774, 0x36c, 2, __NA_, 0, MX51_PAD_CTRL_5)</div><div class='del'>-#define MX51_PAD_DISP2_DAT6__GPIO1_19		IOMUX_PAD(0x774, 0x36c, 5, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_DISP2_DAT6__GPIO1_19		IOMUX_PAD(0x774, 0x36c, 5, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT6__KEY_ROW4		IOMUX_PAD(0x774, 0x36c, 4, 0x9d0, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT6__USBH3_STP		IOMUX_PAD(0x774, 0x36c, 3, 0xa24, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT7__DISP2_DAT7		IOMUX_PAD(0x778, 0x370, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT7__FEC_TDATA2		IOMUX_PAD(0x778, 0x370, 2, __NA_, 0, MX51_PAD_CTRL_5)</div><div class='del'>-#define MX51_PAD_DISP2_DAT7__GPIO1_29		IOMUX_PAD(0x778, 0x370, 5, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_DISP2_DAT7__GPIO1_29		IOMUX_PAD(0x778, 0x370, 5, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT7__KEY_ROW5		IOMUX_PAD(0x778, 0x370, 4, 0x9d4, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT7__USBH3_NXT		IOMUX_PAD(0x778, 0x370, 3, 0xa20, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT8__DISP2_DAT8		IOMUX_PAD(0x77c, 0x374, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT8__FEC_TDATA3		IOMUX_PAD(0x77c, 0x374, 2, __NA_, 0, MX51_PAD_CTRL_5)</div><div class='del'>-#define MX51_PAD_DISP2_DAT8__GPIO1_30		IOMUX_PAD(0x77c, 0x374, 5, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_DISP2_DAT8__GPIO1_30		IOMUX_PAD(0x77c, 0x374, 5, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT8__KEY_ROW6		IOMUX_PAD(0x77c, 0x374, 4, 0x9d8, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT8__USBH3_DATA0	IOMUX_PAD(0x77c, 0x374, 3, 0x9fc, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT9__AUD6_RXC		IOMUX_PAD(0x780, 0x378, 4, 0x8f4, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT9__DISP2_DAT9		IOMUX_PAD(0x780, 0x378, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT9__FEC_TX_EN		IOMUX_PAD(0x780, 0x378, 2, __NA_, 0, MX51_PAD_CTRL_5)</div><div class='del'>-#define MX51_PAD_DISP2_DAT9__GPIO1_31		IOMUX_PAD(0x780, 0x378, 5, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_DISP2_DAT9__GPIO1_31		IOMUX_PAD(0x780, 0x378, 5, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT9__USBH3_DATA1	IOMUX_PAD(0x780, 0x378, 3, 0xa00, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT10__DISP2_DAT10	IOMUX_PAD(0x784, 0x37c, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT10__DISP2_SER_CS	IOMUX_PAD(0x784, 0x37c, 5, __NA_, 0, NO_PAD_CTRL)</div><div class='hunk'>@@ -698,7 +698,7 @@</div><div class='ctx'> #define MX51_PAD_DISP2_DAT11__AUD6_TXD		IOMUX_PAD(0x788, 0x380, 4, 0x8f0, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT11__DISP2_DAT11	IOMUX_PAD(0x788, 0x380, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT11__FEC_RX_CLK	IOMUX_PAD(0x788, 0x380, 2, 0x968, 1, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_DISP2_DAT11__GPIO1_10		IOMUX_PAD(0x788, 0x380, 7, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_DISP2_DAT11__GPIO1_10		IOMUX_PAD(0x788, 0x380, 7, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT11__USBH3_DATA3	IOMUX_PAD(0x788, 0x380, 3, 0xa08, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT12__AUD6_RXD		IOMUX_PAD(0x78c, 0x384, 4, 0x8ec, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_DISP2_DAT12__DISP2_DAT12	IOMUX_PAD(0x78c, 0x384, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='hunk'>@@ -746,16 +746,16 @@</div><div class='ctx'> #define MX51_PAD_SD1_DATA3__CSPI_SS1		IOMUX_PAD(0x7b0, 0x3a8, 2, 0x920, 1, MX51_ECSPI_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_SD1_DATA3__SD1_DATA3		IOMUX_PAD(0x7b0, 0x3a8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_0__CSPI_SS2		IOMUX_PAD(0x7b4, 0x3ac, 2, 0x924, 0, MX51_ECSPI_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_GPIO1_0__GPIO1_0		IOMUX_PAD(0x7b4, 0x3ac, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_GPIO1_0__GPIO1_0		IOMUX_PAD(0x7b4, 0x3ac, 1, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_0__SD1_CD		IOMUX_PAD(0x7b4, 0x3ac, 0, __NA_, 0, MX51_ESDHC_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_1__CSPI_MISO		IOMUX_PAD(0x7b8, 0x3b0, 2, 0x918, 2, MX51_ECSPI_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_GPIO1_1__GPIO1_1		IOMUX_PAD(0x7b8, 0x3b0, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_GPIO1_1__GPIO1_1		IOMUX_PAD(0x7b8, 0x3b0, 1, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_1__SD1_WP		IOMUX_PAD(0x7b8, 0x3b0, 0, __NA_, 0, MX51_ESDHC_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_EIM_DA12__EIM_DA12		IOMUX_PAD(__NA_, 0x04c, 0, 0x000, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_EIM_DA13__EIM_DA13		IOMUX_PAD(__NA_, 0x050, 0, 0x000, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_EIM_DA14__EIM_DA14		IOMUX_PAD(__NA_, 0x054, 0, 0x000, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_EIM_DA15__EIM_DA15		IOMUX_PAD(__NA_, 0x058, 0, 0x000, 0, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_SD2_CMD__CSPI_MOSI		IOMUX_PAD(__NA_, 0x3b4, 2, 0x91c, 3, MX51_ECSPI_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_SD2_CMD__CSPI_MOSI		IOMUX_PAD(0x7bc, 0x3b4, 2, 0x91c, 3, MX51_ECSPI_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_SD2_CMD__I2C1_SCL		IOMUX_PAD(0x7bc, 0x3b4, 0x11, 0x9b0, 2, MX51_I2C_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_SD2_CMD__SD2_CMD		IOMUX_PAD(0x7bc, 0x3b4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_SD2_CLK__CSPI_SCLK		IOMUX_PAD(0x7c0, 0x3b8, 2, 0x914, 3, MX51_ECSPI_PAD_CTRL)</div><div class='hunk'>@@ -766,19 +766,19 @@</div><div class='ctx'> #define MX51_PAD_SD2_DATA0__SD2_DATA0		IOMUX_PAD(0x7c4, 0x3bc, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_SD2_DATA1__SD1_DAT5		IOMUX_PAD(0x7c8, 0x3c0, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_SD2_DATA1__SD2_DATA1		IOMUX_PAD(0x7c8, 0x3c0, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_SD2_DATA1__USBH3_H2_DP		IOMUX_PAD(0x7c8, 0x3c0, 2, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_SD2_DATA1__USBH3_H2_DP		IOMUX_PAD(0x7c8, 0x3c0, 0x12, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_SD2_DATA2__SD1_DAT6		IOMUX_PAD(0x7cc, 0x3c4, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_SD2_DATA2__SD2_DATA2		IOMUX_PAD(0x7cc, 0x3c4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_SD2_DATA2__USBH3_H2_DM		IOMUX_PAD(0x7cc, 0x3c4, 2, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_SD2_DATA2__USBH3_H2_DM		IOMUX_PAD(0x7cc, 0x3c4, 0x12, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_SD2_DATA3__CSPI_SS2		IOMUX_PAD(0x7d0, 0x3c8, 2, 0x924, 1, MX51_ECSPI_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_SD2_DATA3__SD1_DAT7		IOMUX_PAD(0x7d0, 0x3c8, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_SD2_DATA3__SD2_DATA3		IOMUX_PAD(0x7d0, 0x3c8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_2__CCM_OUT_2		IOMUX_PAD(0x7d4, 0x3cc, 5, __NA_, 0, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_GPIO1_2__GPIO1_2		IOMUX_PAD(0x7d4, 0x3cc, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_GPIO1_2__GPIO1_2		IOMUX_PAD(0x7d4, 0x3cc, 0, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_2__I2C2_SCL		IOMUX_PAD(0x7d4, 0x3cc, 0x12, 0x9b8, 3, MX51_I2C_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_2__PLL1_BYP		IOMUX_PAD(0x7d4, 0x3cc, 7, 0x90c, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_2__PWM1_PWMO		IOMUX_PAD(0x7d4, 0x3cc, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_GPIO1_3__GPIO1_3		IOMUX_PAD(0x7d8, 0x3d0, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_GPIO1_3__GPIO1_3		IOMUX_PAD(0x7d8, 0x3d0, 0, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_3__I2C2_SDA		IOMUX_PAD(0x7d8, 0x3d0, 0x12, 0x9bc, 3, MX51_I2C_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_3__PLL2_BYP		IOMUX_PAD(0x7d8, 0x3d0, 7, 0x910, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_3__PWM2_PWMO		IOMUX_PAD(0x7d8, 0x3d0, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='hunk'>@@ -786,27 +786,27 @@</div><div class='ctx'> #define MX51_PAD_PMIC_INT_REQ__PMIC_PMU_IRQ_B	IOMUX_PAD(0x7fc, 0x3d4, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_4__DISP2_EXT_CLK		IOMUX_PAD(0x804, 0x3d8, 4, 0x908, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_4__EIM_RDY		IOMUX_PAD(0x804, 0x3d8, 3, 0x938, 1, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_GPIO1_4__GPIO1_4		IOMUX_PAD(0x804, 0x3d8, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_GPIO1_4__GPIO1_4		IOMUX_PAD(0x804, 0x3d8, 0, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_4__WDOG1_WDOG_B		IOMUX_PAD(0x804, 0x3d8, 2, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_5__CSI2_MCLK		IOMUX_PAD(0x808, 0x3dc, 6, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_5__DISP2_PIN16		IOMUX_PAD(0x808, 0x3dc, 3, __NA_, 0, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_GPIO1_5__GPIO1_5		IOMUX_PAD(0x808, 0x3dc, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_GPIO1_5__GPIO1_5		IOMUX_PAD(0x808, 0x3dc, 0, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_5__WDOG2_WDOG_B		IOMUX_PAD(0x808, 0x3dc, 2, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_6__DISP2_PIN17		IOMUX_PAD(0x80c, 0x3e0, 4, __NA_, 0, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_GPIO1_6__GPIO1_6		IOMUX_PAD(0x80c, 0x3e0, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_GPIO1_6__GPIO1_6		IOMUX_PAD(0x80c, 0x3e0, 0, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_6__REF_EN_B		IOMUX_PAD(0x80c, 0x3e0, 3, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_7__CCM_OUT_0		IOMUX_PAD(0x810, 0x3e4, 3, __NA_, 0, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_GPIO1_7__GPIO1_7		IOMUX_PAD(0x810, 0x3e4, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_GPIO1_7__GPIO1_7		IOMUX_PAD(0x810, 0x3e4, 0, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_7__SD2_WP		IOMUX_PAD(0x810, 0x3e4, 6, __NA_, 0, MX51_ESDHC_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_7__SPDIF_OUT1		IOMUX_PAD(0x810, 0x3e4, 2, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_8__CSI2_DATA_EN		IOMUX_PAD(0x814, 0x3e8, 2, 0x99c, 2, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_GPIO1_8__GPIO1_8		IOMUX_PAD(0x814, 0x3e8, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_GPIO1_8__GPIO1_8		IOMUX_PAD(0x814, 0x3e8, 0, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_8__SD2_CD		IOMUX_PAD(0x814, 0x3e8, 6, __NA_, 0, MX51_ESDHC_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_8__USBH3_PWR		IOMUX_PAD(0x814, 0x3e8, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_9__CCM_OUT_1		IOMUX_PAD(0x818, 0x3ec, 3, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_9__DISP2_D1_CS		IOMUX_PAD(0x818, 0x3ec, 2, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_9__DISP2_SER_CS		IOMUX_PAD(0x818, 0x3ec, 7, __NA_, 0, NO_PAD_CTRL)</div><div class='del'>-#define MX51_PAD_GPIO1_9__GPIO1_9		IOMUX_PAD(0x818, 0x3ec, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='add'>+#define MX51_PAD_GPIO1_9__GPIO1_9		IOMUX_PAD(0x818, 0x3ec, 0, __NA_, 0, MX51_GPIO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_9__SD2_LCTL		IOMUX_PAD(0x818, 0x3ec, 6, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX51_PAD_GPIO1_9__USBH3_OC		IOMUX_PAD(0x818, 0x3ec, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h<br/>index 527f8fe3e31b..9761e003bde2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/iomux-mx53.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-mxc/include/mach/iomux-mx53.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/iomux-mx53.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/iomux-mx53.h</a></div><div class='hunk'>@@ -573,7 +573,7 @@</div><div class='ctx'> #define MX53_PAD_EIM_D28__UART2_CTS			IOMUX_PAD(0x494, 0x14C, 2, __NA_, 0, MX53_UART_PAD_CTRL)</div><div class='ctx'> #define MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO		IOMUX_PAD(0x494, 0x14C, 3, 0x82C, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX53_PAD_EIM_D28__CSPI_MOSI			IOMUX_PAD(0x494, 0x14C, 4, 0x788, 1, NO_PAD_CTRL)</div><div class='del'>-#define MX53_PAD_EIM_D28__I2C1_SDA			IOMUX_PAD(0x494, 0x14C, 5 | IOMUX_CONFIG_SION, 0x818, 1, PAD_CTRL_I2C)</div><div class='add'>+#define MX53_PAD_EIM_D28__I2C1_SDA			IOMUX_PAD(0x494, 0x14C, 5 | IOMUX_CONFIG_SION, 0x818, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX53_PAD_EIM_D28__IPU_EXT_TRIG			IOMUX_PAD(0x494, 0x14C, 6, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX53_PAD_EIM_D28__IPU_DI0_PIN13			IOMUX_PAD(0x494, 0x14C, 7, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX53_PAD_EIM_D29__EMI_WEIM_D_29			IOMUX_PAD(0x498, 0x150, 0, __NA_, 0, NO_PAD_CTRL)</div><div class='hunk'>@@ -1187,7 +1187,7 @@</div><div class='ctx'> #define MX53_PAD_GPIO_8__ESAI1_TX5_RX0			IOMUX_PAD(0x6C8, 0x338, 0, 0x7F8, 1, NO_PAD_CTRL)</div><div class='ctx'> #define MX53_PAD_GPIO_8__GPIO1_8			IOMUX_PAD(0x6C8, 0x338, 1, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX53_PAD_GPIO_8__EPIT2_EPITO			IOMUX_PAD(0x6C8, 0x338, 2, __NA_, 0, NO_PAD_CTRL)</div><div class='del'>-#define MX53_PAD_GPIO_8__CAN1_RXCAN			IOMUX_PAD(0x6C8, 0x338, 3, 0x760, 3, NO_PAD_CTRL)</div><div class='add'>+#define MX53_PAD_GPIO_8__CAN1_RXCAN			IOMUX_PAD(0x6C8, 0x338, 3, 0x760, 2, NO_PAD_CTRL)</div><div class='ctx'> #define MX53_PAD_GPIO_8__UART2_RXD_MUX			IOMUX_PAD(0x6C8, 0x338, 4, 0x880, 5, MX53_UART_PAD_CTRL)</div><div class='ctx'> #define MX53_PAD_GPIO_8__FIRI_TXD			IOMUX_PAD(0x6C8, 0x338, 5, __NA_, 0, NO_PAD_CTRL)</div><div class='ctx'> #define MX53_PAD_GPIO_8__SPDIF_SRCLK			IOMUX_PAD(0x6C8, 0x338, 6, __NA_, 0, NO_PAD_CTRL)</div><div class='head'>diff --git a/arch/arm/plat-mxc/include/mach/mx2_cam.h b/arch/arm/plat-mxc/include/mach/mx2_cam.h<br/>index 3c080a32dbf5..7ded6f1f74bc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/mx2_cam.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-mxc/include/mach/mx2_cam.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/mx2_cam.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/mx2_cam.h</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> #ifndef __MACH_MX2_CAM_H_</div><div class='ctx'> #define __MACH_MX2_CAM_H_</div><div class='ctx'> </div><div class='del'>-#define MX2_CAMERA_SWAP16		(1 &lt;&lt; 0)</div><div class='ctx'> #define MX2_CAMERA_EXT_VSYNC		(1 &lt;&lt; 1)</div><div class='ctx'> #define MX2_CAMERA_CCIR			(1 &lt;&lt; 2)</div><div class='ctx'> #define MX2_CAMERA_CCIR_INTERLACE	(1 &lt;&lt; 3)</div><div class='hunk'>@@ -31,7 +30,6 @@</div><div class='ctx'> #define MX2_CAMERA_GATED_CLOCK		(1 &lt;&lt; 5)</div><div class='ctx'> #define MX2_CAMERA_INV_DATA		(1 &lt;&lt; 6)</div><div class='ctx'> #define MX2_CAMERA_PCLK_SAMPLE_RISING	(1 &lt;&lt; 7)</div><div class='del'>-#define MX2_CAMERA_PACK_DIR_MSB		(1 &lt;&lt; 8)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct mx2_camera_platform_data - optional platform data for mx2_camera</div><div class='head'>diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h<br/>index 254a561a2799..f7e7dbac8f4b 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/mx6q.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-mxc/include/mach/mx6q.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-mxc/include/mach/mx6q.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/include/mach/mx6q.h</a></div><div class='hunk'>@@ -27,6 +27,8 @@</div><div class='ctx'> #define MX6Q_CCM_SIZE			0x4000</div><div class='ctx'> #define MX6Q_ANATOP_BASE_ADDR		0x020c8000</div><div class='ctx'> #define MX6Q_ANATOP_SIZE		0x1000</div><div class='add'>+#define MX6Q_UART2_BASE_ADDR		0x021e8000</div><div class='add'>+#define MX6Q_UART2_SIZE			0x4000</div><div class='ctx'> #define MX6Q_UART4_BASE_ADDR		0x021f0000</div><div class='ctx'> #define MX6Q_UART4_SIZE			0x4000</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c<br/>index 7daf7c9a413b..99f958ca6cb8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-mxc/time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-mxc/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-mxc/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-mxc/time.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/clockchips.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;asm/sched_clock.h&gt;</div><div class='hunk'>@@ -282,6 +283,19 @@ static int __init mxc_clockevent_init(struct clk *timer_clk)</div><div class='ctx'> void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t tctl_val;</div><div class='add'>+	struct clk *timer_ipg_clk;</div><div class='add'>+</div><div class='add'>+	if (!timer_clk) {</div><div class='add'>+		timer_clk = clk_get_sys("imx-gpt.0", "per");</div><div class='add'>+		if (IS_ERR(timer_clk)) {</div><div class='add'>+			pr_err("i.MX timer: unable to get clk\n");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		timer_ipg_clk = clk_get_sys("imx-gpt.0", "ipg");</div><div class='add'>+		if (!IS_ERR(timer_ipg_clk))</div><div class='add'>+			clk_prepare_enable(timer_ipg_clk);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	clk_prepare_enable(timer_clk);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h b/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h<br/>index 9605bf227df9..826de74bfdd1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-nomadik/include/plat/gpio-nomadik.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-nomadik/include/plat/gpio-nomadik.h</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #define NMK_GPIO_SLPC	0x1c</div><div class='ctx'> #define NMK_GPIO_AFSLA	0x20</div><div class='ctx'> #define NMK_GPIO_AFSLB	0x24</div><div class='add'>+#define NMK_GPIO_LOWEMI	0x28</div><div class='ctx'> </div><div class='ctx'> #define NMK_GPIO_RIMSC	0x40</div><div class='ctx'> #define NMK_GPIO_FIMSC	0x44</div><div class='hunk'>@@ -61,7 +62,14 @@ enum nmk_gpio_slpm {</div><div class='ctx'> </div><div class='ctx'> extern int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode);</div><div class='ctx'> extern int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull);</div><div class='add'>+#ifdef CONFIG_PINCTRL_NOMADIK</div><div class='ctx'> extern int nmk_gpio_set_mode(int gpio, int gpio_mode);</div><div class='add'>+#else</div><div class='add'>+static inline int nmk_gpio_set_mode(int gpio, int gpio_mode)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='ctx'> extern int nmk_gpio_get_mode(int gpio);</div><div class='ctx'> </div><div class='ctx'> extern void nmk_gpio_wakeups_suspend(void);</div><div class='head'>diff --git a/arch/arm/plat-nomadik/include/plat/pincfg.h b/arch/arm/plat-nomadik/include/plat/pincfg.h<br/>index 22cb97d2d8ad..9c949c7c98a7 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-nomadik/include/plat/pincfg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-nomadik/include/plat/pincfg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-nomadik/include/plat/pincfg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-nomadik/include/plat/pincfg.h</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'>  *	bit 16..18 - SLPM pull up/down state</div><div class='ctx'>  *	bit 19..20 - SLPM direction</div><div class='ctx'>  *	bit 21..22 - SLPM Value (if output)</div><div class='add'>+ *	bit 23..25 - PDIS value (if input)</div><div class='ctx'>  *</div><div class='ctx'>  * to facilitate the definition, the following macros are provided</div><div class='ctx'>  *</div><div class='hunk'>@@ -67,6 +68,10 @@ typedef unsigned long pin_cfg_t;</div><div class='ctx'> /* These two replace the above in DB8500v2+ */</div><div class='ctx'> #define PIN_SLPM_WAKEUP_ENABLE	(NMK_GPIO_SLPM_WAKEUP_ENABLE &lt;&lt; PIN_SLPM_SHIFT)</div><div class='ctx'> #define PIN_SLPM_WAKEUP_DISABLE	(NMK_GPIO_SLPM_WAKEUP_DISABLE &lt;&lt; PIN_SLPM_SHIFT)</div><div class='add'>+#define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE</div><div class='add'>+</div><div class='add'>+#define PIN_SLPM_GPIO  PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */</div><div class='add'>+#define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */</div><div class='ctx'> </div><div class='ctx'> #define PIN_DIR_SHIFT		14</div><div class='ctx'> #define PIN_DIR_MASK		(0x1 &lt;&lt; PIN_DIR_SHIFT)</div><div class='hunk'>@@ -105,6 +110,33 @@ typedef unsigned long pin_cfg_t;</div><div class='ctx'> #define PIN_SLPM_VAL_LOW	((1 + 0) &lt;&lt; PIN_SLPM_VAL_SHIFT)</div><div class='ctx'> #define PIN_SLPM_VAL_HIGH	((1 + 1) &lt;&lt; PIN_SLPM_VAL_SHIFT)</div><div class='ctx'> </div><div class='add'>+#define PIN_SLPM_PDIS_SHIFT		23</div><div class='add'>+#define PIN_SLPM_PDIS_MASK		(0x3 &lt;&lt; PIN_SLPM_PDIS_SHIFT)</div><div class='add'>+#define PIN_SLPM_PDIS(x)	\</div><div class='add'>+	(((x) &amp; PIN_SLPM_PDIS_MASK) &gt;&gt; PIN_SLPM_PDIS_SHIFT)</div><div class='add'>+#define PIN_SLPM_PDIS_NO_CHANGE		(0 &lt;&lt; PIN_SLPM_PDIS_SHIFT)</div><div class='add'>+#define PIN_SLPM_PDIS_DISABLED		(1 &lt;&lt; PIN_SLPM_PDIS_SHIFT)</div><div class='add'>+#define PIN_SLPM_PDIS_ENABLED		(2 &lt;&lt; PIN_SLPM_PDIS_SHIFT)</div><div class='add'>+</div><div class='add'>+#define PIN_LOWEMI_SHIFT	25</div><div class='add'>+#define PIN_LOWEMI_MASK		(0x1 &lt;&lt; PIN_LOWEMI_SHIFT)</div><div class='add'>+#define PIN_LOWEMI(x)		(((x) &amp; PIN_LOWEMI_MASK) &gt;&gt; PIN_LOWEMI_SHIFT)</div><div class='add'>+#define PIN_LOWEMI_DISABLED	(0 &lt;&lt; PIN_LOWEMI_SHIFT)</div><div class='add'>+#define PIN_LOWEMI_ENABLED	(1 &lt;&lt; PIN_LOWEMI_SHIFT)</div><div class='add'>+</div><div class='add'>+#define PIN_GPIOMODE_SHIFT	26</div><div class='add'>+#define PIN_GPIOMODE_MASK	(0x1 &lt;&lt; PIN_GPIOMODE_SHIFT)</div><div class='add'>+#define PIN_GPIOMODE(x)		(((x) &amp; PIN_GPIOMODE_MASK) &gt;&gt; PIN_GPIOMODE_SHIFT)</div><div class='add'>+#define PIN_GPIOMODE_DISABLED	(0 &lt;&lt; PIN_GPIOMODE_SHIFT)</div><div class='add'>+#define PIN_GPIOMODE_ENABLED	(1 &lt;&lt; PIN_GPIOMODE_SHIFT)</div><div class='add'>+</div><div class='add'>+#define PIN_SLEEPMODE_SHIFT	27</div><div class='add'>+#define PIN_SLEEPMODE_MASK	(0x1 &lt;&lt; PIN_SLEEPMODE_SHIFT)</div><div class='add'>+#define PIN_SLEEPMODE(x)	(((x) &amp; PIN_SLEEPMODE_MASK) &gt;&gt; PIN_SLEEPMODE_SHIFT)</div><div class='add'>+#define PIN_SLEEPMODE_DISABLED	(0 &lt;&lt; PIN_SLEEPMODE_SHIFT)</div><div class='add'>+#define PIN_SLEEPMODE_ENABLED	(1 &lt;&lt; PIN_SLEEPMODE_SHIFT)</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /* Shortcuts.  Use these instead of separate DIR, PULL, and VAL.  */</div><div class='ctx'> #define PIN_INPUT_PULLDOWN	(PIN_DIR_INPUT | PIN_PULL_DOWN)</div><div class='ctx'> #define PIN_INPUT_PULLUP	(PIN_DIR_INPUT | PIN_PULL_UP)</div><div class='head'>diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile<br/>index c0fe2757b695..ed8605f01155 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/Makefile</a></div><div class='hunk'>@@ -9,9 +9,6 @@ obj-m :=</div><div class='ctx'> obj-n :=</div><div class='ctx'> obj-  :=</div><div class='ctx'> </div><div class='del'>-# OCPI interconnect support for 1710, 1610 and 5912</div><div class='del'>-obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o</div><div class='del'>-</div><div class='ctx'> # omap_device support (OMAP2+ only at the moment)</div><div class='ctx'> obj-$(CONFIG_ARCH_OMAP2) += omap_device.o</div><div class='ctx'> obj-$(CONFIG_ARCH_OMAP3) += omap_device.o</div><div class='head'>diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c<br/>index f1e46ea6b81d..0a9b9a970113 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/common.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;plat/board.h&gt;</div><div class='ctx'> #include &lt;plat/vram.h&gt;</div><div class='ctx'> #include &lt;plat/dsp.h&gt;</div><div class='add'>+#include &lt;plat/dma.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/omap-secure.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c<br/>index 5068fe5a6910..2132c4f389e1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/counter_32k.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/counter_32k.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/counter_32k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/counter_32k.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/clocksource.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/mach/time.h&gt;</div><div class='ctx'> #include &lt;asm/sched_clock.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/hardware.h&gt;</div><div class='hunk'>@@ -27,23 +28,24 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/clock.h&gt;</div><div class='ctx'> </div><div class='add'>+/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */</div><div class='add'>+#define OMAP2_32KSYNCNT_CR_OFF		0x10</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * 32KHz clocksource ... always available, on pretty most chips except</div><div class='ctx'>  * OMAP 730 and 1510.  Other timers could be used as clocksources, with</div><div class='ctx'>  * higher resolution in free-running counter modes (e.g. 12 MHz xtal),</div><div class='ctx'>  * but systems won't necessarily want to spend resources that way.</div><div class='ctx'>  */</div><div class='del'>-static void __iomem *timer_32k_base;</div><div class='del'>-</div><div class='del'>-#define OMAP16XX_TIMER_32K_SYNCHRONIZED		0xfffbc410</div><div class='add'>+static void __iomem *sync32k_cnt_reg;</div><div class='ctx'> </div><div class='ctx'> static u32 notrace omap_32k_read_sched_clock(void)</div><div class='ctx'> {</div><div class='del'>-	return timer_32k_base ? __raw_readl(timer_32k_base) : 0;</div><div class='add'>+	return sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * read_persistent_clock -  Return time from a persistent clock.</div><div class='add'>+ * omap_read_persistent_clock -  Return time from a persistent clock.</div><div class='ctx'>  *</div><div class='ctx'>  * Reads the time from a source which isn't disabled during PM, the</div><div class='ctx'>  * 32k sync timer.  Convert the cycles elapsed since last read into</div><div class='hunk'>@@ -52,14 +54,14 @@ static u32 notrace omap_32k_read_sched_clock(void)</div><div class='ctx'> static struct timespec persistent_ts;</div><div class='ctx'> static cycles_t cycles, last_cycles;</div><div class='ctx'> static unsigned int persistent_mult, persistent_shift;</div><div class='del'>-void read_persistent_clock(struct timespec *ts)</div><div class='add'>+static void omap_read_persistent_clock(struct timespec *ts)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long nsecs;</div><div class='ctx'> 	cycles_t delta;</div><div class='ctx'> 	struct timespec *tsp = &amp;persistent_ts;</div><div class='ctx'> </div><div class='ctx'> 	last_cycles = cycles;</div><div class='del'>-	cycles = timer_32k_base ? __raw_readl(timer_32k_base) : 0;</div><div class='add'>+	cycles = sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;</div><div class='ctx'> 	delta = cycles - last_cycles;</div><div class='ctx'> </div><div class='ctx'> 	nsecs = clocksource_cyc2ns(delta, persistent_mult, persistent_shift);</div><div class='hunk'>@@ -68,54 +70,41 @@ void read_persistent_clock(struct timespec *ts)</div><div class='ctx'> 	*ts = *tsp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __init omap_init_clocksource_32k(void)</div><div class='add'>+/**</div><div class='add'>+ * omap_init_clocksource_32k - setup and register counter 32k as a</div><div class='add'>+ * kernel clocksource</div><div class='add'>+ * @pbase: base addr of counter_32k module</div><div class='add'>+ * @size: size of counter_32k to map</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 upon success or negative error code upon failure.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+int __init omap_init_clocksource_32k(void __iomem *vbase)</div><div class='ctx'> {</div><div class='del'>-	static char err[] __initdata = KERN_ERR</div><div class='del'>-			"%s: can't register clocksource!\n";</div><div class='del'>-</div><div class='del'>-	if (cpu_is_omap16xx() || cpu_class_is_omap2()) {</div><div class='del'>-		u32 pbase;</div><div class='del'>-		unsigned long size = SZ_4K;</div><div class='del'>-		void __iomem *base;</div><div class='del'>-		struct clk *sync_32k_ick;</div><div class='del'>-</div><div class='del'>-		if (cpu_is_omap16xx()) {</div><div class='del'>-			pbase = OMAP16XX_TIMER_32K_SYNCHRONIZED;</div><div class='del'>-			size = SZ_1K;</div><div class='del'>-		} else if (cpu_is_omap2420())</div><div class='del'>-			pbase = OMAP2420_32KSYNCT_BASE + 0x10;</div><div class='del'>-		else if (cpu_is_omap2430())</div><div class='del'>-			pbase = OMAP2430_32KSYNCT_BASE + 0x10;</div><div class='del'>-		else if (cpu_is_omap34xx())</div><div class='del'>-			pbase = OMAP3430_32KSYNCT_BASE + 0x10;</div><div class='del'>-		else if (cpu_is_omap44xx())</div><div class='del'>-			pbase = OMAP4430_32KSYNCT_BASE + 0x10;</div><div class='del'>-		else</div><div class='del'>-			return -ENODEV;</div><div class='del'>-</div><div class='del'>-		/* For this to work we must have a static mapping in io.c for this area */</div><div class='del'>-		base = ioremap(pbase, size);</div><div class='del'>-		if (!base)</div><div class='del'>-			return -ENODEV;</div><div class='del'>-</div><div class='del'>-		sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");</div><div class='del'>-		if (!IS_ERR(sync_32k_ick))</div><div class='del'>-			clk_enable(sync_32k_ick);</div><div class='del'>-</div><div class='del'>-		timer_32k_base = base;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * 120000 rough estimate from the calculations in</div><div class='del'>-		 * __clocksource_updatefreq_scale.</div><div class='del'>-		 */</div><div class='del'>-		clocks_calc_mult_shift(&amp;persistent_mult, &amp;persistent_shift,</div><div class='del'>-				32768, NSEC_PER_SEC, 120000);</div><div class='del'>-</div><div class='del'>-		if (clocksource_mmio_init(base, "32k_counter", 32768, 250, 32,</div><div class='del'>-					  clocksource_mmio_readl_up))</div><div class='del'>-			printk(err, "32k_counter");</div><div class='del'>-</div><div class='del'>-		setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 32k sync Counter register offset is at 0x10</div><div class='add'>+	 */</div><div class='add'>+	sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 120000 rough estimate from the calculations in</div><div class='add'>+	 * __clocksource_updatefreq_scale.</div><div class='add'>+	 */</div><div class='add'>+	clocks_calc_mult_shift(&amp;persistent_mult, &amp;persistent_shift,</div><div class='add'>+			32768, NSEC_PER_SEC, 120000);</div><div class='add'>+</div><div class='add'>+	ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,</div><div class='add'>+				250, 32, clocksource_mmio_readl_up);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("32k_counter: can't register clocksource\n");</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);</div><div class='add'>+	register_persistent_clock(NULL, omap_read_persistent_clock);</div><div class='add'>+	pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c<br/>index 60278f47c0bd..1cba9273d2cb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/devices.c</a></div><div class='hunk'>@@ -28,54 +28,6 @@</div><div class='ctx'> #include &lt;plat/menelaus.h&gt;</div><div class='ctx'> #include &lt;plat/omap44xx.h&gt;</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \</div><div class='del'>-	defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)</div><div class='del'>-</div><div class='del'>-#define OMAP_MMC_NR_RES		2</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Register MMC devices. Called from mach-omap1 and mach-omap2 device init.</div><div class='del'>- */</div><div class='del'>-int __init omap_mmc_add(const char *name, int id, unsigned long base,</div><div class='del'>-				unsigned long size, unsigned int irq,</div><div class='del'>-				struct omap_mmc_platform_data *data)</div><div class='del'>-{</div><div class='del'>-	struct platform_device *pdev;</div><div class='del'>-	struct resource res[OMAP_MMC_NR_RES];</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	pdev = platform_device_alloc(name, id);</div><div class='del'>-	if (!pdev)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));</div><div class='del'>-	res[0].start = base;</div><div class='del'>-	res[0].end = base + size - 1;</div><div class='del'>-	res[0].flags = IORESOURCE_MEM;</div><div class='del'>-	res[1].start = res[1].end = irq;</div><div class='del'>-	res[1].flags = IORESOURCE_IRQ;</div><div class='del'>-</div><div class='del'>-	ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));</div><div class='del'>-	if (ret == 0)</div><div class='del'>-		ret = platform_device_add_data(pdev, data, sizeof(*data));</div><div class='del'>-	if (ret)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	ret = platform_device_add(pdev);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	/* return device handle to board setup code */</div><div class='del'>-	data-&gt;dev = &amp;pdev-&gt;dev;</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-fail:</div><div class='del'>-	platform_device_put(pdev);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /*-------------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)</div><div class='hunk'>@@ -109,79 +61,6 @@ static void omap_init_rng(void)</div><div class='ctx'> static inline void omap_init_rng(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/*-------------------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-/* Numbering for the SPI-capable controllers when used for SPI:</div><div class='del'>- * spi		= 1</div><div class='del'>- * uwire	= 2</div><div class='del'>- * mmc1..2	= 3..4</div><div class='del'>- * mcbsp1..3	= 5..7</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)</div><div class='del'>-</div><div class='del'>-#define	OMAP_UWIRE_BASE		0xfffb3000</div><div class='del'>-</div><div class='del'>-static struct resource uwire_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.start		= OMAP_UWIRE_BASE,</div><div class='del'>-		.end		= OMAP_UWIRE_BASE + 0x20,</div><div class='del'>-		.flags		= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device omap_uwire_device = {</div><div class='del'>-	.name	   = "omap_uwire",</div><div class='del'>-	.id	     = -1,</div><div class='del'>-	.num_resources	= ARRAY_SIZE(uwire_resources),</div><div class='del'>-	.resource	= uwire_resources,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void omap_init_uwire(void)</div><div class='del'>-{</div><div class='del'>-	/* FIXME define and use a boot tag; not all boards will be hooking</div><div class='del'>-	 * up devices to the microwire controller, and multi-board configs</div><div class='del'>-	 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/* board-specific code must configure chipselects (only a few</div><div class='del'>-	 * are normally used) and SCLK/SDI/SDO (each has two choices).</div><div class='del'>-	 */</div><div class='del'>-	(void) platform_device_register(&amp;omap_uwire_device);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline void omap_init_uwire(void) {}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)</div><div class='del'>-</div><div class='del'>-static phys_addr_t omap_dsp_phys_mempool_base;</div><div class='del'>-</div><div class='del'>-void __init omap_dsp_reserve_sdram_memblock(void)</div><div class='del'>-{</div><div class='del'>-	phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;</div><div class='del'>-	phys_addr_t paddr;</div><div class='del'>-</div><div class='del'>-	if (!size)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	paddr = arm_memblock_steal(size, SZ_1M);</div><div class='del'>-	if (!paddr) {</div><div class='del'>-		pr_err("%s: failed to reserve %x bytes\n",</div><div class='del'>-				__func__, size);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	omap_dsp_phys_mempool_base = paddr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-phys_addr_t omap_dsp_get_mempool_base(void)</div><div class='del'>-{</div><div class='del'>-	return omap_dsp_phys_mempool_base;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(omap_dsp_get_mempool_base);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This gets called after board-specific INIT_MACHINE, and initializes most</div><div class='ctx'>  * on-chip peripherals accessible on this board (except for few like USB):</div><div class='hunk'>@@ -208,7 +87,6 @@ static int __init omap_init_devices(void)</div><div class='ctx'> 	 * in alphabetical order so they're easier to sort through.</div><div class='ctx'> 	 */</div><div class='ctx'> 	omap_init_rng();</div><div class='del'>-	omap_init_uwire();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> arch_initcall(omap_init_devices);</div><div class='head'>diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c<br/>index ecdb3da0dea9..cb16ade437cb 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/dma.c</a></div><div class='hunk'>@@ -41,6 +41,15 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/tc.h&gt;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA</div><div class='add'>+ * channels that an instance of the SDMA IP block can support.  Used</div><div class='add'>+ * to size arrays.  (The actual maximum on a particular SoC may be less</div><div class='add'>+ * than this -- for example, OMAP1 SDMA instances only support 17 logical</div><div class='add'>+ * DMA channels.)</div><div class='add'>+ */</div><div class='add'>+#define MAX_LOGICAL_DMA_CH_COUNT		32</div><div class='add'>+</div><div class='ctx'> #undef DEBUG</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_ARCH_OMAP1</div><div class='hunk'>@@ -843,7 +852,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,</div><div class='ctx'> 	}</div><div class='ctx'> 	l = p-&gt;dma_read(CCR, lch);</div><div class='ctx'> 	l &amp;= ~((1 &lt;&lt; 6) | (1 &lt;&lt; 26));</div><div class='del'>-	if (cpu_is_omap2430() || cpu_is_omap34xx() ||  cpu_is_omap44xx())</div><div class='add'>+	if (cpu_class_is_omap2() &amp;&amp; !cpu_is_omap242x())</div><div class='ctx'> 		l |= ((read_prio &amp; 0x1) &lt;&lt; 6) | ((write_prio &amp; 0x1) &lt;&lt; 26);</div><div class='ctx'> 	else</div><div class='ctx'> 		l |= ((read_prio &amp; 0x1) &lt;&lt; 6);</div><div class='hunk'>@@ -883,7 +892,7 @@ void omap_start_dma(int lch)</div><div class='ctx'> </div><div class='ctx'> 	if (!omap_dma_in_1510_mode() &amp;&amp; dma_chan[lch].next_lch != -1) {</div><div class='ctx'> 		int next_lch, cur_lch;</div><div class='del'>-		char dma_chan_link_map[dma_lch_count];</div><div class='add'>+		char dma_chan_link_map[MAX_LOGICAL_DMA_CH_COUNT];</div><div class='ctx'> </div><div class='ctx'> 		dma_chan_link_map[lch] = 1;</div><div class='ctx'> 		/* Set the link register of the first channel */</div><div class='hunk'>@@ -916,6 +925,13 @@ void omap_start_dma(int lch)</div><div class='ctx'> 			l |= OMAP_DMA_CCR_BUFFERING_DISABLE;</div><div class='ctx'> 	l |= OMAP_DMA_CCR_EN;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * As dma_write() uses IO accessors which are weakly ordered, there</div><div class='add'>+	 * is no guarantee that data in coherent DMA memory will be visible</div><div class='add'>+	 * to the DMA device.  Add a memory barrier here to ensure that any</div><div class='add'>+	 * such data is visible prior to enabling DMA.</div><div class='add'>+	 */</div><div class='add'>+	mb();</div><div class='ctx'> 	p-&gt;dma_write(l, CCR, lch);</div><div class='ctx'> </div><div class='ctx'> 	dma_chan[lch].flags |= OMAP_DMA_ACTIVE;</div><div class='hunk'>@@ -965,9 +981,16 @@ void omap_stop_dma(int lch)</div><div class='ctx'> 		p-&gt;dma_write(l, CCR, lch);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Ensure that data transferred by DMA is visible to any access</div><div class='add'>+	 * after DMA has been disabled.  This is important for coherent</div><div class='add'>+	 * DMA regions.</div><div class='add'>+	 */</div><div class='add'>+	mb();</div><div class='add'>+</div><div class='ctx'> 	if (!omap_dma_in_1510_mode() &amp;&amp; dma_chan[lch].next_lch != -1) {</div><div class='ctx'> 		int next_lch, cur_lch = lch;</div><div class='del'>-		char dma_chan_link_map[dma_lch_count];</div><div class='add'>+		char dma_chan_link_map[MAX_LOGICAL_DMA_CH_COUNT];</div><div class='ctx'> </div><div class='ctx'> 		memset(dma_chan_link_map, 0, sizeof(dma_chan_link_map));</div><div class='ctx'> 		do {</div><div class='hunk'>@@ -2057,7 +2080,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())</div><div class='add'>+	if (cpu_class_is_omap2() &amp;&amp; !cpu_is_omap242x())</div><div class='ctx'> 		omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,</div><div class='ctx'> 				DMA_DEFAULT_FIFO_DEPTH, 0);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c<br/>index 652139c0339e..3b0cfeb33d05 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/dmtimer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/dmtimer.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/dmtimer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/dmtimer.c</a></div><div class='hunk'>@@ -82,8 +82,6 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,</div><div class='ctx'> </div><div class='ctx'> static void omap_timer_restore_context(struct omap_dm_timer *timer)</div><div class='ctx'> {</div><div class='del'>-	__raw_writel(timer-&gt;context.tiocp_cfg,</div><div class='del'>-			timer-&gt;io_base + OMAP_TIMER_OCP_CFG_OFFSET);</div><div class='ctx'> 	if (timer-&gt;revision == 1)</div><div class='ctx'> 		__raw_writel(timer-&gt;context.tistat, timer-&gt;sys_stat);</div><div class='ctx'> </div><div class='hunk'>@@ -349,11 +347,12 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start);</div><div class='ctx'> int omap_dm_timer_stop(struct omap_dm_timer *timer)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long rate = 0;</div><div class='del'>-	struct dmtimer_platform_data *pdata = timer-&gt;pdev-&gt;dev.platform_data;</div><div class='add'>+	struct dmtimer_platform_data *pdata;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!timer))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	pdata = timer-&gt;pdev-&gt;dev.platform_data;</div><div class='ctx'> 	if (!pdata-&gt;needs_manual_reset)</div><div class='ctx'> 		rate = clk_get_rate(timer-&gt;fclk);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-omap/include/plat/board.h b/arch/arm/plat-omap/include/plat/board.h<br/>index d5eb4c87db9d..4814c5b65306 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/board.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/include/plat/board.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/board.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/board.h</a></div><div class='hunk'>@@ -91,6 +91,8 @@ struct omap_usb_config {</div><div class='ctx'> 	u32 (*usb0_init)(unsigned nwires, unsigned is_device);</div><div class='ctx'> 	u32 (*usb1_init)(unsigned nwires);</div><div class='ctx'> 	u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup);</div><div class='add'>+</div><div class='add'>+	int (*ocpi_enable)(void);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct omap_lcd_config {</div><div class='head'>diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h<br/>index b299b8d201c8..d0ed8c443a63 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/clkdev_omap.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/include/plat/clkdev_omap.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/clkdev_omap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/clkdev_omap.h</a></div><div class='hunk'>@@ -34,8 +34,7 @@ struct omap_clk {</div><div class='ctx'> #define CK_243X		(1 &lt;&lt; 5)	/* 243x, 253x */</div><div class='ctx'> #define CK_3430ES1	(1 &lt;&lt; 6)	/* 34xxES1 only */</div><div class='ctx'> #define CK_3430ES2PLUS	(1 &lt;&lt; 7)	/* 34xxES2, ES3, non-Sitara 35xx only */</div><div class='del'>-#define CK_3505		(1 &lt;&lt; 8)</div><div class='del'>-#define CK_3517		(1 &lt;&lt; 9)</div><div class='add'>+#define CK_AM35XX	(1 &lt;&lt; 9)	/* Sitara AM35xx */</div><div class='ctx'> #define CK_36XX		(1 &lt;&lt; 10)	/* 36xx/37xx-specific clocks */</div><div class='ctx'> #define CK_443X		(1 &lt;&lt; 11)</div><div class='ctx'> #define CK_TI816X	(1 &lt;&lt; 12)</div><div class='hunk'>@@ -44,7 +43,6 @@ struct omap_clk {</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #define CK_34XX		(CK_3430ES1 | CK_3430ES2PLUS)</div><div class='del'>-#define CK_AM35XX	(CK_3505 | CK_3517)	/* all Sitara AM35xx */</div><div class='ctx'> #define CK_3XXX		(CK_34XX | CK_AM35XX | CK_36XX)</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h<br/>index b4d7ec3fbfbe..d1cb6f527b7e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/include/plat/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/common.h</a></div><div class='hunk'>@@ -30,7 +30,9 @@</div><div class='ctx'> #include &lt;plat/i2c.h&gt;</div><div class='ctx'> #include &lt;plat/omap_hwmod.h&gt;</div><div class='ctx'> </div><div class='del'>-extern int __init omap_init_clocksource_32k(void);</div><div class='add'>+extern int __init omap_init_clocksource_32k(void __iomem *vbase);</div><div class='add'>+</div><div class='add'>+extern void __init omap_check_revision(void);</div><div class='ctx'> </div><div class='ctx'> extern void omap_reserve(void);</div><div class='ctx'> extern int omap_dss_reset(struct omap_hwmod *);</div><div class='head'>diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h<br/>index dc6a86bf2172..297245dba66e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/cpu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/include/plat/cpu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/cpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/cpu.h</a></div><div class='hunk'>@@ -121,6 +121,7 @@ IS_OMAP_CLASS(16xx, 0x16)</div><div class='ctx'> IS_OMAP_CLASS(24xx, 0x24)</div><div class='ctx'> IS_OMAP_CLASS(34xx, 0x34)</div><div class='ctx'> IS_OMAP_CLASS(44xx, 0x44)</div><div class='add'>+IS_AM_CLASS(35xx, 0x35)</div><div class='ctx'> IS_AM_CLASS(33xx, 0x33)</div><div class='ctx'> </div><div class='ctx'> IS_TI_CLASS(81xx, 0x81)</div><div class='hunk'>@@ -148,6 +149,7 @@ IS_AM_SUBCLASS(335x, 0x335)</div><div class='ctx'> #define cpu_is_ti81xx()			0</div><div class='ctx'> #define cpu_is_ti816x()			0</div><div class='ctx'> #define cpu_is_ti814x()			0</div><div class='add'>+#define soc_is_am35xx()			0</div><div class='ctx'> #define cpu_is_am33xx()			0</div><div class='ctx'> #define cpu_is_am335x()			0</div><div class='ctx'> #define cpu_is_omap44xx()		0</div><div class='hunk'>@@ -357,6 +359,7 @@ IS_OMAP_TYPE(3517, 0x3517)</div><div class='ctx'> # undef cpu_is_ti81xx</div><div class='ctx'> # undef cpu_is_ti816x</div><div class='ctx'> # undef cpu_is_ti814x</div><div class='add'>+# undef soc_is_am35xx</div><div class='ctx'> # undef cpu_is_am33xx</div><div class='ctx'> # undef cpu_is_am335x</div><div class='ctx'> # define cpu_is_omap3430()		is_omap3430()</div><div class='hunk'>@@ -378,6 +381,7 @@ IS_OMAP_TYPE(3517, 0x3517)</div><div class='ctx'> # define cpu_is_ti81xx()		is_ti81xx()</div><div class='ctx'> # define cpu_is_ti816x()		is_ti816x()</div><div class='ctx'> # define cpu_is_ti814x()		is_ti814x()</div><div class='add'>+# define soc_is_am35xx()		is_am35xx()</div><div class='ctx'> # define cpu_is_am33xx()		is_am33xx()</div><div class='ctx'> # define cpu_is_am335x()		is_am335x()</div><div class='ctx'> #endif</div><div class='hunk'>@@ -433,6 +437,10 @@ IS_OMAP_TYPE(3517, 0x3517)</div><div class='ctx'> #define TI8148_REV_ES2_0	(TI814X_CLASS | (0x1 &lt;&lt; 8))</div><div class='ctx'> #define TI8148_REV_ES2_1	(TI814X_CLASS | (0x2 &lt;&lt; 8))</div><div class='ctx'> </div><div class='add'>+#define AM35XX_CLASS		0x35170034</div><div class='add'>+#define AM35XX_REV_ES1_0	AM35XX_CLASS</div><div class='add'>+#define AM35XX_REV_ES1_1	(AM35XX_CLASS | (0x1 &lt;&lt; 8))</div><div class='add'>+</div><div class='ctx'> #define AM335X_CLASS		0x33500034</div><div class='ctx'> #define AM335X_REV_ES1_0	AM335X_CLASS</div><div class='ctx'> </div><div class='hunk'>@@ -445,6 +453,7 @@ IS_OMAP_TYPE(3517, 0x3517)</div><div class='ctx'> </div><div class='ctx'> #define OMAP446X_CLASS		0x44600044</div><div class='ctx'> #define OMAP4460_REV_ES1_0	(OMAP446X_CLASS | (0x10 &lt;&lt; 8))</div><div class='add'>+#define OMAP4460_REV_ES1_1	(OMAP446X_CLASS | (0x11 &lt;&lt; 8))</div><div class='ctx'> </div><div class='ctx'> #define OMAP447X_CLASS		0x44700044</div><div class='ctx'> #define OMAP4470_REV_ES1_0	(OMAP447X_CLASS | (0x10 &lt;&lt; 8))</div><div class='head'>diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h<br/>index dc562a5c0a8a..c5811d4409b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/include/plat/dma.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/dma.h</a></div><div class='hunk'>@@ -312,6 +312,11 @@</div><div class='ctx'> #define CLEAR_CSR_ON_READ		BIT(0xC)</div><div class='ctx'> #define IS_WORD_16			BIT(0xD)</div><div class='ctx'> </div><div class='add'>+/* Defines for DMA Capabilities */</div><div class='add'>+#define DMA_HAS_TRANSPARENT_CAPS	(0x1 &lt;&lt; 18)</div><div class='add'>+#define DMA_HAS_CONSTANT_FILL_CAPS	(0x1 &lt;&lt; 19)</div><div class='add'>+#define DMA_HAS_DESCRIPTOR_CAPS		(0x3 &lt;&lt; 20)</div><div class='add'>+</div><div class='ctx'> enum omap_reg_offsets {</div><div class='ctx'> </div><div class='ctx'> GCR,		GSCR,		GRST1,		HW_ID,</div><div class='hunk'>@@ -442,6 +447,7 @@ struct omap_system_dma_plat_info {</div><div class='ctx'> 	u32 (*dma_read)(int reg, int lch);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+extern void __init omap_init_consistent_dma_size(void);</div><div class='ctx'> extern void omap_set_dma_priority(int lch, int dst_port, int priority);</div><div class='ctx'> extern int omap_request_dma(int dev_id, const char *dev_name,</div><div class='ctx'> 			void (*callback)(int lch, u16 ch_status, void *data),</div><div class='head'>diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h<br/>index 9418f00b6c38..5da73562e486 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/dmtimer.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/include/plat/dmtimer.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/dmtimer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/dmtimer.h</a></div><div class='hunk'>@@ -75,7 +75,6 @@ struct clk;</div><div class='ctx'> </div><div class='ctx'> struct timer_regs {</div><div class='ctx'> 	u32 tidr;</div><div class='del'>-	u32 tiocp_cfg;</div><div class='ctx'> 	u32 tistat;</div><div class='ctx'> 	u32 tisr;</div><div class='ctx'> 	u32 tier;</div><div class='hunk'>@@ -259,7 +258,7 @@ struct omap_dm_timer {</div><div class='ctx'> 	unsigned long phys_base;</div><div class='ctx'> 	int id;</div><div class='ctx'> 	int irq;</div><div class='del'>-	struct clk *iclk, *fclk;</div><div class='add'>+	struct clk *fclk;</div><div class='ctx'> </div><div class='ctx'> 	void __iomem	*io_base;</div><div class='ctx'> 	void __iomem	*sys_stat;	/* TISTAT timer status */</div><div class='hunk'>@@ -316,12 +315,12 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)</div><div class='ctx'> 				OMAP_TIMER_V1_SYS_STAT_OFFSET;</div><div class='ctx'> 		timer-&gt;irq_stat = timer-&gt;io_base + OMAP_TIMER_V1_STAT_OFFSET;</div><div class='ctx'> 		timer-&gt;irq_ena = timer-&gt;io_base + OMAP_TIMER_V1_INT_EN_OFFSET;</div><div class='del'>-		timer-&gt;irq_dis = 0;</div><div class='add'>+		timer-&gt;irq_dis = NULL;</div><div class='ctx'> 		timer-&gt;pend = timer-&gt;io_base + _OMAP_TIMER_WRITE_PEND_OFFSET;</div><div class='ctx'> 		timer-&gt;func_base = timer-&gt;io_base;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		timer-&gt;revision = 2;</div><div class='del'>-		timer-&gt;sys_stat = 0;</div><div class='add'>+		timer-&gt;sys_stat = NULL;</div><div class='ctx'> 		timer-&gt;irq_stat = timer-&gt;io_base + OMAP_TIMER_V2_IRQSTATUS;</div><div class='ctx'> 		timer-&gt;irq_ena = timer-&gt;io_base + OMAP_TIMER_V2_IRQENABLE_SET;</div><div class='ctx'> 		timer-&gt;irq_dis = timer-&gt;io_base + OMAP_TIMER_V2_IRQENABLE_CLR;</div><div class='head'>diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h<br/>index 2f6e9924a814..50fb7cc000ea 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/include/plat/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/gpio.h</a></div><div class='hunk'>@@ -172,6 +172,8 @@ struct omap_gpio_reg_offs {</div><div class='ctx'> 	u16 clr_dataout;</div><div class='ctx'> 	u16 irqstatus;</div><div class='ctx'> 	u16 irqstatus2;</div><div class='add'>+	u16 irqstatus_raw0;</div><div class='add'>+	u16 irqstatus_raw1;</div><div class='ctx'> 	u16 irqenable;</div><div class='ctx'> 	u16 irqenable2;</div><div class='ctx'> 	u16 set_irqenable;</div><div class='hunk'>@@ -193,7 +195,6 @@ struct omap_gpio_reg_offs {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct omap_gpio_platform_data {</div><div class='del'>-	u16 virtual_irq_start;</div><div class='ctx'> 	int bank_type;</div><div class='ctx'> 	int bank_width;		/* GPIO bank width */</div><div class='ctx'> 	int bank_stride;	/* Only needed for omap1 MPUIO */</div><div class='head'>diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h<br/>index 1527929b445a..f37764a36072 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/gpmc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/include/plat/gpmc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/gpmc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/gpmc.h</a></div><div class='hunk'>@@ -92,6 +92,8 @@ enum omap_ecc {</div><div class='ctx'> 	OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */</div><div class='ctx'> 		/* 1-bit ecc: stored at beginning of spare area as romcode */</div><div class='ctx'> 	OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method &amp; romcode layout */</div><div class='add'>+	OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */</div><div class='add'>+	OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -157,4 +159,13 @@ extern int gpmc_nand_write(int cs, int cmd, int wval);</div><div class='ctx'> </div><div class='ctx'> int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size);</div><div class='ctx'> int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARCH_OMAP3</div><div class='add'>+int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors);</div><div class='add'>+int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors,</div><div class='add'>+			  int nerrors);</div><div class='add'>+int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc);</div><div class='add'>+int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc);</div><div class='add'>+#endif /* CONFIG_ARCH_OMAP3 */</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/plat-omap/include/plat/hdq1w.h b/arch/arm/plat-omap/include/plat/hdq1w.h<br/>new file mode 100644<br/>index 000000000000..0c1efc846d8d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/hdq1w.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/hdq1w.h</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+/*</div><div class='add'>+ * Shared macros and function prototypes for the HDQ1W/1-wire IP block</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Texas Instruments, Inc.</div><div class='add'>+ * Paul Walmsley</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ */</div><div class='add'>+#ifndef ARCH_ARM_MACH_OMAP2_HDQ1W_H</div><div class='add'>+#define ARCH_ARM_MACH_OMAP2_HDQ1W_H</div><div class='add'>+</div><div class='add'>+#include &lt;plat/omap_hwmod.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * XXX A future cleanup patch should modify</div><div class='add'>+ * drivers/w1/masters/omap_hdq.c to use these macros</div><div class='add'>+ */</div><div class='add'>+#define HDQ_CTRL_STATUS_OFFSET			0x0c</div><div class='add'>+#define HDQ_CTRL_STATUS_CLOCKENABLE_SHIFT	5</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+extern int omap_hdq1w_reset(struct omap_hwmod *oh);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h<br/>index 7a38750c0079..a7754a886d42 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/mmc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/include/plat/mmc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/mmc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/mmc.h</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/mmc/host.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/board.h&gt;</div><div class='add'>+#include &lt;plat/omap_hwmod.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define OMAP15XX_NR_MMC		1</div><div class='ctx'> #define OMAP16XX_NR_MMC		2</div><div class='hunk'>@@ -176,9 +177,6 @@ extern void omap_mmc_notify_cover_event(struct device *dev, int slot,</div><div class='ctx'> void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,</div><div class='ctx'> 				int nr_controllers);</div><div class='ctx'> void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);</div><div class='del'>-int omap_mmc_add(const char *name, int id, unsigned long base,</div><div class='del'>-				unsigned long size, unsigned int irq,</div><div class='del'>-				struct omap_mmc_platform_data *data);</div><div class='ctx'> #else</div><div class='ctx'> static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,</div><div class='ctx'> 				int nr_controllers)</div><div class='hunk'>@@ -187,12 +185,9 @@ static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,</div><div class='ctx'> static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-static inline int omap_mmc_add(const char *name, int id, unsigned long base,</div><div class='del'>-				unsigned long size, unsigned int irq,</div><div class='del'>-				struct omap_mmc_platform_data *data)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+extern int omap_msdi_reset(struct omap_hwmod *oh);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h<br/>index 9ff444469f3d..1a52725ffcf2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/omap-serial.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/include/plat/omap-serial.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/omap-serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/omap-serial.h</a></div><div class='hunk'>@@ -65,7 +65,6 @@ struct omap_uart_port_info {</div><div class='ctx'> 	bool			dma_enabled;	/* To specify DMA Mode */</div><div class='ctx'> 	unsigned int		uartclk;	/* UART clock rate */</div><div class='ctx'> 	upf_t			flags;		/* UPF_* flags */</div><div class='del'>-	u32			errata;</div><div class='ctx'> 	unsigned int		dma_rx_buf_size;</div><div class='ctx'> 	unsigned int		dma_rx_timeout;</div><div class='ctx'> 	unsigned int		autosuspend_timeout;</div><div class='head'>diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h<br/>index 3f26db4ee8e6..c835b7194ff5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/omap_hwmod.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/include/plat/omap_hwmod.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/include/plat/omap_hwmod.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/include/plat/omap_hwmod.h</a></div><div class='hunk'>@@ -213,11 +213,17 @@ struct omap_hwmod_addr_space {</div><div class='ctx'>  */</div><div class='ctx'> #define OCP_USER_MPU			(1 &lt;&lt; 0)</div><div class='ctx'> #define OCP_USER_SDMA			(1 &lt;&lt; 1)</div><div class='add'>+#define OCP_USER_DSP			(1 &lt;&lt; 2)</div><div class='add'>+#define OCP_USER_IVA			(1 &lt;&lt; 3)</div><div class='ctx'> </div><div class='ctx'> /* omap_hwmod_ocp_if.flags bits */</div><div class='ctx'> #define OCPIF_SWSUP_IDLE		(1 &lt;&lt; 0)</div><div class='ctx'> #define OCPIF_CAN_BURST			(1 &lt;&lt; 1)</div><div class='ctx'> </div><div class='add'>+/* omap_hwmod_ocp_if._int_flags possibilities */</div><div class='add'>+#define _OCPIF_INT_FLAGS_REGISTERED	(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct omap_hwmod_ocp_if - OCP interface data</div><div class='ctx'>  * @master: struct omap_hwmod that initiates OCP transactions on this link</div><div class='hunk'>@@ -229,6 +235,7 @@ struct omap_hwmod_addr_space {</div><div class='ctx'>  * @width: OCP data width</div><div class='ctx'>  * @user: initiators using this interface (see OCP_USER_* macros above)</div><div class='ctx'>  * @flags: OCP interface flags (see OCPIF_* macros above)</div><div class='add'>+ * @_int_flags: internal flags (see _OCPIF_INT_FLAGS* macros above)</div><div class='ctx'>  *</div><div class='ctx'>  * It may also be useful to add a tag_cnt field for OCP2.x devices.</div><div class='ctx'>  *</div><div class='hunk'>@@ -247,6 +254,7 @@ struct omap_hwmod_ocp_if {</div><div class='ctx'> 	u8				width;</div><div class='ctx'> 	u8				user;</div><div class='ctx'> 	u8				flags;</div><div class='add'>+	u8				_int_flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -327,9 +335,9 @@ struct omap_hwmod_sysc_fields {</div><div class='ctx'>  * then this field has to be populated with the correct offset structure.</div><div class='ctx'>  */</div><div class='ctx'> struct omap_hwmod_class_sysconfig {</div><div class='del'>-	u16 rev_offs;</div><div class='del'>-	u16 sysc_offs;</div><div class='del'>-	u16 syss_offs;</div><div class='add'>+	u32 rev_offs;</div><div class='add'>+	u32 sysc_offs;</div><div class='add'>+	u32 syss_offs;</div><div class='ctx'> 	u16 sysc_flags;</div><div class='ctx'> 	struct omap_hwmod_sysc_fields *sysc_fields;</div><div class='ctx'> 	u8 srst_udelay;</div><div class='hunk'>@@ -476,6 +484,16 @@ struct omap_hwmod_class {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * struct omap_hwmod_link - internal structure linking hwmods with ocp_ifs</div><div class='add'>+ * @ocp_if: OCP interface structure record pointer</div><div class='add'>+ * @node: list_head pointing to next struct omap_hwmod_link in a list</div><div class='add'>+ */</div><div class='add'>+struct omap_hwmod_link {</div><div class='add'>+	struct omap_hwmod_ocp_if	*ocp_if;</div><div class='add'>+	struct list_head		node;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)</div><div class='ctx'>  * @name: name of the hwmod</div><div class='ctx'>  * @class: struct omap_hwmod_class * to the class of this hwmod</div><div class='hunk'>@@ -487,12 +505,10 @@ struct omap_hwmod_class {</div><div class='ctx'>  * @_clk: pointer to the main struct clk (filled in at runtime)</div><div class='ctx'>  * @opt_clks: other device clocks that drivers can request (0..*)</div><div class='ctx'>  * @voltdm: pointer to voltage domain (filled in at runtime)</div><div class='del'>- * @masters: ptr to array of OCP ifs that this hwmod can initiate on</div><div class='del'>- * @slaves: ptr to array of OCP ifs that this hwmod can respond on</div><div class='ctx'>  * @dev_attr: arbitrary device attributes that can be passed to the driver</div><div class='ctx'>  * @_sysc_cache: internal-use hwmod flags</div><div class='ctx'>  * @_mpu_rt_va: cached register target start address (internal use)</div><div class='del'>- * @_mpu_port_index: cached MPU register target slave ID (internal use)</div><div class='add'>+ * @_mpu_port: cached MPU register target slave (internal use)</div><div class='ctx'>  * @opt_clks_cnt: number of @opt_clks</div><div class='ctx'>  * @master_cnt: number of @master entries</div><div class='ctx'>  * @slaves_cnt: number of @slave entries</div><div class='hunk'>@@ -511,6 +527,8 @@ struct omap_hwmod_class {</div><div class='ctx'>  *</div><div class='ctx'>  * Parameter names beginning with an underscore are managed internally by</div><div class='ctx'>  * the omap_hwmod code and should not be set during initialization.</div><div class='add'>+ *</div><div class='add'>+ * @masters and @slaves are now deprecated.</div><div class='ctx'>  */</div><div class='ctx'> struct omap_hwmod {</div><div class='ctx'> 	const char			*name;</div><div class='hunk'>@@ -529,15 +547,15 @@ struct omap_hwmod {</div><div class='ctx'> 	struct omap_hwmod_opt_clk	*opt_clks;</div><div class='ctx'> 	char				*clkdm_name;</div><div class='ctx'> 	struct clockdomain		*clkdm;</div><div class='del'>-	struct omap_hwmod_ocp_if	**masters; /* connect to *_IA */</div><div class='del'>-	struct omap_hwmod_ocp_if	**slaves;  /* connect to *_TA */</div><div class='add'>+	struct list_head		master_ports; /* connect to *_IA */</div><div class='add'>+	struct list_head		slave_ports; /* connect to *_TA */</div><div class='ctx'> 	void				*dev_attr;</div><div class='ctx'> 	u32				_sysc_cache;</div><div class='ctx'> 	void __iomem			*_mpu_rt_va;</div><div class='ctx'> 	spinlock_t			_lock;</div><div class='ctx'> 	struct list_head		node;</div><div class='add'>+	struct omap_hwmod_ocp_if	*_mpu_port;</div><div class='ctx'> 	u16				flags;</div><div class='del'>-	u8				_mpu_port_index;</div><div class='ctx'> 	u8				response_lat;</div><div class='ctx'> 	u8				rst_lines_cnt;</div><div class='ctx'> 	u8				opt_clks_cnt;</div><div class='hunk'>@@ -549,7 +567,6 @@ struct omap_hwmod {</div><div class='ctx'> 	u8				_postsetup_state;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int omap_hwmod_register(struct omap_hwmod **ohs);</div><div class='ctx'> struct omap_hwmod *omap_hwmod_lookup(const char *name);</div><div class='ctx'> int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),</div><div class='ctx'> 			void *data);</div><div class='hunk'>@@ -581,6 +598,8 @@ int omap_hwmod_softreset(struct omap_hwmod *oh);</div><div class='ctx'> </div><div class='ctx'> int omap_hwmod_count_resources(struct omap_hwmod *oh);</div><div class='ctx'> int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);</div><div class='add'>+int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,</div><div class='add'>+				   const char *name, struct resource *res);</div><div class='ctx'> </div><div class='ctx'> struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);</div><div class='ctx'> void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);</div><div class='hunk'>@@ -619,4 +638,6 @@ extern int omap2430_hwmod_init(void);</div><div class='ctx'> extern int omap3xxx_hwmod_init(void);</div><div class='ctx'> extern int omap44xx_hwmod_init(void);</div><div class='ctx'> </div><div class='add'>+extern int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c<br/>index d50cbc6385bd..c490240bb82c 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/omap_device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/omap_device.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/omap_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/omap_device.c</a></div><div class='hunk'>@@ -475,13 +475,11 @@ static int omap_device_count_resources(struct omap_device *od)</div><div class='ctx'> static int omap_device_fill_resources(struct omap_device *od,</div><div class='ctx'> 				      struct resource *res)</div><div class='ctx'> {</div><div class='del'>-	int c = 0;</div><div class='ctx'> 	int i, r;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; od-&gt;hwmods_cnt; i++) {</div><div class='ctx'> 		r = omap_hwmod_fill_resources(od-&gt;hwmods[i], res);</div><div class='ctx'> 		res += r;</div><div class='del'>-		c += r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c<br/>index f9a8c5341ee9..477363c163ec 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/sram.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/sram.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/sram.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/sram.c</a></div><div class='hunk'>@@ -196,8 +196,8 @@ static void __init omap_map_sram(void)</div><div class='ctx'> 	 * Looks like we need to preserve some bootloader code at the</div><div class='ctx'> 	 * beginning of SRAM for jumping to flash for reboot to work...</div><div class='ctx'> 	 */</div><div class='del'>-	memset((void *)omap_sram_base + SRAM_BOOTLOADER_SZ, 0,</div><div class='del'>-	       omap_sram_size - SRAM_BOOTLOADER_SZ);</div><div class='add'>+	memset_io(omap_sram_base + SRAM_BOOTLOADER_SZ, 0,</div><div class='add'>+		  omap_sram_size - SRAM_BOOTLOADER_SZ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c<br/>index d2bbfd1cb0b5..daa0327381b5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-omap/usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-omap/usb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-omap/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-omap/usb.c</a></div><div class='hunk'>@@ -31,15 +31,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../mach-omap2/common.h"</div><div class='del'>-</div><div class='ctx'> #ifdef	CONFIG_ARCH_OMAP_OTG</div><div class='ctx'> </div><div class='ctx'> void __init</div><div class='ctx'> omap_otg_init(struct omap_usb_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	u32		syscon;</div><div class='del'>-	int		status;</div><div class='ctx'> 	int		alt_pingroup = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* NOTE:  no bus or clock setup (yet?) */</div><div class='hunk'>@@ -104,6 +101,7 @@ omap_otg_init(struct omap_usb_config *config)</div><div class='ctx'> #ifdef	CONFIG_USB_GADGET_OMAP</div><div class='ctx'> 	if (config-&gt;otg || config-&gt;register_dev) {</div><div class='ctx'> 		struct platform_device *udc_device = config-&gt;udc_device;</div><div class='add'>+		int status;</div><div class='ctx'> </div><div class='ctx'> 		syscon &amp;= ~DEV_IDLE_EN;</div><div class='ctx'> 		udc_device-&gt;dev.platform_data = config;</div><div class='hunk'>@@ -116,6 +114,7 @@ omap_otg_init(struct omap_usb_config *config)</div><div class='ctx'> #if	defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)</div><div class='ctx'> 	if (config-&gt;otg || config-&gt;register_host) {</div><div class='ctx'> 		struct platform_device *ohci_device = config-&gt;ohci_device;</div><div class='add'>+		int status;</div><div class='ctx'> </div><div class='ctx'> 		syscon &amp;= ~HST_IDLE_EN;</div><div class='ctx'> 		ohci_device-&gt;dev.platform_data = config;</div><div class='hunk'>@@ -128,6 +127,7 @@ omap_otg_init(struct omap_usb_config *config)</div><div class='ctx'> #ifdef	CONFIG_USB_OTG</div><div class='ctx'> 	if (config-&gt;otg) {</div><div class='ctx'> 		struct platform_device *otg_device = config-&gt;otg_device;</div><div class='add'>+		int status;</div><div class='ctx'> </div><div class='ctx'> 		syscon &amp;= ~OTG_IDLE_EN;</div><div class='ctx'> 		otg_device-&gt;dev.platform_data = config;</div><div class='hunk'>@@ -138,8 +138,6 @@ omap_otg_init(struct omap_usb_config *config)</div><div class='ctx'> #endif</div><div class='ctx'> 	pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));</div><div class='ctx'> 	omap_writel(syscon, OTG_SYSCON_1);</div><div class='del'>-</div><div class='del'>-	status = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c<br/>index 74daf5ed1432..61fd837624a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-orion/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-orion/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-orion/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-orion/common.c</a></div><div class='hunk'>@@ -14,15 +14,41 @@</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/serial_8250.h&gt;</div><div class='ctx'> #include &lt;linux/ata_platform.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='ctx'> #include &lt;linux/mv643xx_eth.h&gt;</div><div class='ctx'> #include &lt;linux/mv643xx_i2c.h&gt;</div><div class='ctx'> #include &lt;net/dsa.h&gt;</div><div class='del'>-#include &lt;linux/spi/orion_spi.h&gt;</div><div class='del'>-#include &lt;plat/orion_wdt.h&gt;</div><div class='ctx'> #include &lt;plat/mv_xor.h&gt;</div><div class='ctx'> #include &lt;plat/ehci-orion.h&gt;</div><div class='ctx'> #include &lt;mach/bridge-regs.h&gt;</div><div class='ctx'> </div><div class='add'>+/* Create a clkdev entry for a given device/clk */</div><div class='add'>+void __init orion_clkdev_add(const char *con_id, const char *dev_id,</div><div class='add'>+			     struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	struct clk_lookup *cl;</div><div class='add'>+</div><div class='add'>+	cl = clkdev_alloc(clk, con_id, dev_id);</div><div class='add'>+	if (cl)</div><div class='add'>+		clkdev_add(cl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Create clkdev entries for all orion platforms except kirkwood.</div><div class='add'>+   Kirkwood has gated clocks for some of its peripherals, so creates</div><div class='add'>+   its own clkdev entries. For all the other orion devices, create</div><div class='add'>+   clkdev entries to the tclk. */</div><div class='add'>+void __init orion_clkdev_init(struct clk *tclk)</div><div class='add'>+{</div><div class='add'>+	orion_clkdev_add(NULL, "orion_spi.0", tclk);</div><div class='add'>+	orion_clkdev_add(NULL, "orion_spi.1", tclk);</div><div class='add'>+	orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk);</div><div class='add'>+	orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk);</div><div class='add'>+	orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk);</div><div class='add'>+	orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk);</div><div class='add'>+	orion_clkdev_add(NULL, "orion_wdt", tclk);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Fill in the resources structure and link it into the platform</div><div class='ctx'>    device structure. There is always a memory region, and nearly</div><div class='ctx'>    always an interrupt.*/</div><div class='hunk'>@@ -49,6 +75,12 @@ static void fill_resources(struct platform_device *device,</div><div class='ctx'> /*****************************************************************************</div><div class='ctx'>  * UART</div><div class='ctx'>  ****************************************************************************/</div><div class='add'>+static unsigned long __init uart_get_clk_rate(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	clk_prepare_enable(clk);</div><div class='add'>+	return clk_get_rate(clk);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init uart_complete(</div><div class='ctx'> 	struct platform_device *orion_uart,</div><div class='ctx'> 	struct plat_serial8250_port *data,</div><div class='hunk'>@@ -56,12 +88,12 @@ static void __init uart_complete(</div><div class='ctx'> 	unsigned int membase,</div><div class='ctx'> 	resource_size_t mapbase,</div><div class='ctx'> 	unsigned int irq,</div><div class='del'>-	unsigned int uartclk)</div><div class='add'>+	struct clk *clk)</div><div class='ctx'> {</div><div class='ctx'> 	data-&gt;mapbase = mapbase;</div><div class='ctx'> 	data-&gt;membase = (void __iomem *)membase;</div><div class='ctx'> 	data-&gt;irq = irq;</div><div class='del'>-	data-&gt;uartclk = uartclk;</div><div class='add'>+	data-&gt;uartclk = uart_get_clk_rate(clk);</div><div class='ctx'> 	orion_uart-&gt;dev.platform_data = data;</div><div class='ctx'> </div><div class='ctx'> 	fill_resources(orion_uart, resources, mapbase, 0xff, irq);</div><div class='hunk'>@@ -90,10 +122,10 @@ static struct platform_device orion_uart0 = {</div><div class='ctx'> void __init orion_uart0_init(unsigned int membase,</div><div class='ctx'> 			     resource_size_t mapbase,</div><div class='ctx'> 			     unsigned int irq,</div><div class='del'>-			     unsigned int uartclk)</div><div class='add'>+			     struct clk *clk)</div><div class='ctx'> {</div><div class='ctx'> 	uart_complete(&amp;orion_uart0, orion_uart0_data, orion_uart0_resources,</div><div class='del'>-		      membase, mapbase, irq, uartclk);</div><div class='add'>+		      membase, mapbase, irq, clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -118,10 +150,10 @@ static struct platform_device orion_uart1 = {</div><div class='ctx'> void __init orion_uart1_init(unsigned int membase,</div><div class='ctx'> 			     resource_size_t mapbase,</div><div class='ctx'> 			     unsigned int irq,</div><div class='del'>-			     unsigned int uartclk)</div><div class='add'>+			     struct clk *clk)</div><div class='ctx'> {</div><div class='ctx'> 	uart_complete(&amp;orion_uart1, orion_uart1_data, orion_uart1_resources,</div><div class='del'>-		      membase, mapbase, irq, uartclk);</div><div class='add'>+		      membase, mapbase, irq, clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -146,10 +178,10 @@ static struct platform_device orion_uart2 = {</div><div class='ctx'> void __init orion_uart2_init(unsigned int membase,</div><div class='ctx'> 			     resource_size_t mapbase,</div><div class='ctx'> 			     unsigned int irq,</div><div class='del'>-			     unsigned int uartclk)</div><div class='add'>+			     struct clk *clk)</div><div class='ctx'> {</div><div class='ctx'> 	uart_complete(&amp;orion_uart2, orion_uart2_data, orion_uart2_resources,</div><div class='del'>-		      membase, mapbase, irq, uartclk);</div><div class='add'>+		      membase, mapbase, irq, clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -174,10 +206,10 @@ static struct platform_device orion_uart3 = {</div><div class='ctx'> void __init orion_uart3_init(unsigned int membase,</div><div class='ctx'> 			     resource_size_t mapbase,</div><div class='ctx'> 			     unsigned int irq,</div><div class='del'>-			     unsigned int uartclk)</div><div class='add'>+			     struct clk *clk)</div><div class='ctx'> {</div><div class='ctx'> 	uart_complete(&amp;orion_uart3, orion_uart3_data, orion_uart3_resources,</div><div class='del'>-		      membase, mapbase, irq, uartclk);</div><div class='add'>+		      membase, mapbase, irq, clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -203,13 +235,11 @@ void __init orion_rtc_init(unsigned long mapbase,</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> static __init void ge_complete(</div><div class='ctx'> 	struct mv643xx_eth_shared_platform_data *orion_ge_shared_data,</div><div class='del'>-	int tclk,</div><div class='ctx'> 	struct resource *orion_ge_resource, unsigned long irq,</div><div class='ctx'> 	struct platform_device *orion_ge_shared,</div><div class='ctx'> 	struct mv643xx_eth_platform_data *eth_data,</div><div class='ctx'> 	struct platform_device *orion_ge)</div><div class='ctx'> {</div><div class='del'>-	orion_ge_shared_data-&gt;t_clk = tclk;</div><div class='ctx'> 	orion_ge_resource-&gt;start = irq;</div><div class='ctx'> 	orion_ge_resource-&gt;end = irq;</div><div class='ctx'> 	eth_data-&gt;shared = orion_ge_shared;</div><div class='hunk'>@@ -260,12 +290,11 @@ static struct platform_device orion_ge00 = {</div><div class='ctx'> void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,</div><div class='ctx'> 			    unsigned long mapbase,</div><div class='ctx'> 			    unsigned long irq,</div><div class='del'>-			    unsigned long irq_err,</div><div class='del'>-			    int tclk)</div><div class='add'>+			    unsigned long irq_err)</div><div class='ctx'> {</div><div class='ctx'> 	fill_resources(&amp;orion_ge00_shared, orion_ge00_shared_resources,</div><div class='ctx'> 		       mapbase + 0x2000, SZ_16K - 1, irq_err);</div><div class='del'>-	ge_complete(&amp;orion_ge00_shared_data, tclk,</div><div class='add'>+	ge_complete(&amp;orion_ge00_shared_data,</div><div class='ctx'> 		    orion_ge00_resources, irq, &amp;orion_ge00_shared,</div><div class='ctx'> 		    eth_data, &amp;orion_ge00);</div><div class='ctx'> }</div><div class='hunk'>@@ -313,12 +342,11 @@ static struct platform_device orion_ge01 = {</div><div class='ctx'> void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,</div><div class='ctx'> 			    unsigned long mapbase,</div><div class='ctx'> 			    unsigned long irq,</div><div class='del'>-			    unsigned long irq_err,</div><div class='del'>-			    int tclk)</div><div class='add'>+			    unsigned long irq_err)</div><div class='ctx'> {</div><div class='ctx'> 	fill_resources(&amp;orion_ge01_shared, orion_ge01_shared_resources,</div><div class='ctx'> 		       mapbase + 0x2000, SZ_16K - 1, irq_err);</div><div class='del'>-	ge_complete(&amp;orion_ge01_shared_data, tclk,</div><div class='add'>+	ge_complete(&amp;orion_ge01_shared_data,</div><div class='ctx'> 		    orion_ge01_resources, irq, &amp;orion_ge01_shared,</div><div class='ctx'> 		    eth_data, &amp;orion_ge01);</div><div class='ctx'> }</div><div class='hunk'>@@ -366,12 +394,11 @@ static struct platform_device orion_ge10 = {</div><div class='ctx'> void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,</div><div class='ctx'> 			    unsigned long mapbase,</div><div class='ctx'> 			    unsigned long irq,</div><div class='del'>-			    unsigned long irq_err,</div><div class='del'>-			    int tclk)</div><div class='add'>+			    unsigned long irq_err)</div><div class='ctx'> {</div><div class='ctx'> 	fill_resources(&amp;orion_ge10_shared, orion_ge10_shared_resources,</div><div class='ctx'> 		       mapbase + 0x2000, SZ_16K - 1, irq_err);</div><div class='del'>-	ge_complete(&amp;orion_ge10_shared_data, tclk,</div><div class='add'>+	ge_complete(&amp;orion_ge10_shared_data,</div><div class='ctx'> 		    orion_ge10_resources, irq, &amp;orion_ge10_shared,</div><div class='ctx'> 		    eth_data, &amp;orion_ge10);</div><div class='ctx'> }</div><div class='hunk'>@@ -419,12 +446,11 @@ static struct platform_device orion_ge11 = {</div><div class='ctx'> void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,</div><div class='ctx'> 			    unsigned long mapbase,</div><div class='ctx'> 			    unsigned long irq,</div><div class='del'>-			    unsigned long irq_err,</div><div class='del'>-			    int tclk)</div><div class='add'>+			    unsigned long irq_err)</div><div class='ctx'> {</div><div class='ctx'> 	fill_resources(&amp;orion_ge11_shared, orion_ge11_shared_resources,</div><div class='ctx'> 		       mapbase + 0x2000, SZ_16K - 1, irq_err);</div><div class='del'>-	ge_complete(&amp;orion_ge11_shared_data, tclk,</div><div class='add'>+	ge_complete(&amp;orion_ge11_shared_data,</div><div class='ctx'> 		    orion_ge11_resources, irq, &amp;orion_ge11_shared,</div><div class='ctx'> 		    eth_data, &amp;orion_ge11);</div><div class='ctx'> }</div><div class='hunk'>@@ -521,44 +547,32 @@ void __init orion_i2c_1_init(unsigned long mapbase,</div><div class='ctx'> /*****************************************************************************</div><div class='ctx'>  * SPI</div><div class='ctx'>  ****************************************************************************/</div><div class='del'>-static struct orion_spi_info orion_spi_plat_data;</div><div class='ctx'> static struct resource orion_spi_resources;</div><div class='ctx'> </div><div class='ctx'> static struct platform_device orion_spi = {</div><div class='ctx'> 	.name		= "orion_spi",</div><div class='ctx'> 	.id		= 0,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data	= &amp;orion_spi_plat_data,</div><div class='del'>-	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct orion_spi_info orion_spi_1_plat_data;</div><div class='ctx'> static struct resource orion_spi_1_resources;</div><div class='ctx'> </div><div class='ctx'> static struct platform_device orion_spi_1 = {</div><div class='ctx'> 	.name		= "orion_spi",</div><div class='ctx'> 	.id		= 1,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data	= &amp;orion_spi_1_plat_data,</div><div class='del'>-	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Note: The SPI silicon core does have interrupts. However the</div><div class='ctx'>  * current Linux software driver does not use interrupts. */</div><div class='ctx'> </div><div class='del'>-void __init orion_spi_init(unsigned long mapbase,</div><div class='del'>-			   unsigned long tclk)</div><div class='add'>+void __init orion_spi_init(unsigned long mapbase)</div><div class='ctx'> {</div><div class='del'>-	orion_spi_plat_data.tclk = tclk;</div><div class='ctx'> 	fill_resources(&amp;orion_spi, &amp;orion_spi_resources,</div><div class='ctx'> 		       mapbase, SZ_512 - 1, NO_IRQ);</div><div class='ctx'> 	platform_device_register(&amp;orion_spi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init orion_spi_1_init(unsigned long mapbase,</div><div class='del'>-			     unsigned long tclk)</div><div class='add'>+void __init orion_spi_1_init(unsigned long mapbase)</div><div class='ctx'> {</div><div class='del'>-	orion_spi_1_plat_data.tclk = tclk;</div><div class='ctx'> 	fill_resources(&amp;orion_spi_1, &amp;orion_spi_1_resources,</div><div class='ctx'> 		       mapbase, SZ_512 - 1, NO_IRQ);</div><div class='ctx'> 	platform_device_register(&amp;orion_spi_1);</div><div class='hunk'>@@ -567,24 +581,18 @@ void __init orion_spi_1_init(unsigned long mapbase,</div><div class='ctx'> /*****************************************************************************</div><div class='ctx'>  * Watchdog</div><div class='ctx'>  ****************************************************************************/</div><div class='del'>-static struct orion_wdt_platform_data orion_wdt_data;</div><div class='del'>-</div><div class='ctx'> static struct resource orion_wdt_resource =</div><div class='ctx'> 		DEFINE_RES_MEM(TIMER_VIRT_BASE, 0x28);</div><div class='ctx'> </div><div class='ctx'> static struct platform_device orion_wdt_device = {</div><div class='ctx'> 	.name		= "orion_wdt",</div><div class='ctx'> 	.id		= -1,</div><div class='del'>-	.dev		= {</div><div class='del'>-		.platform_data	= &amp;orion_wdt_data,</div><div class='del'>-	},</div><div class='del'>-	.resource	= &amp;orion_wdt_resource,</div><div class='ctx'> 	.num_resources	= 1,</div><div class='add'>+	.resource	= &amp;orion_wdt_resource,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void __init orion_wdt_init(unsigned long tclk)</div><div class='add'>+void __init orion_wdt_init(void)</div><div class='ctx'> {</div><div class='del'>-	orion_wdt_data.tclk = tclk;</div><div class='ctx'> 	platform_device_register(&amp;orion_wdt_device);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c<br/>index 10d160888133..af95af257301 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-orion/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-orion/gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-orion/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-orion/gpio.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * GPIO unit register offsets.</div><div class='hunk'>@@ -289,12 +290,34 @@ void orion_gpio_set_blink(unsigned pin, int blink)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ochip-&gt;lock, flags);</div><div class='del'>-	__set_level(ochip, pin, 0);</div><div class='del'>-	__set_blinking(ochip, pin, blink);</div><div class='add'>+	__set_level(ochip, pin &amp; 31, 0);</div><div class='add'>+	__set_blinking(ochip, pin &amp; 31, blink);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ochip-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(orion_gpio_set_blink);</div><div class='ctx'> </div><div class='add'>+#define ORION_BLINK_HALF_PERIOD 100 /* ms */</div><div class='add'>+</div><div class='add'>+int orion_gpio_led_blink_set(unsigned gpio, int state,</div><div class='add'>+	unsigned long *delay_on, unsigned long *delay_off)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	if (delay_on &amp;&amp; delay_off &amp;&amp; !*delay_on &amp;&amp; !*delay_off)</div><div class='add'>+		*delay_on = *delay_off = ORION_BLINK_HALF_PERIOD;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case GPIO_LED_NO_BLINK_LOW:</div><div class='add'>+	case GPIO_LED_NO_BLINK_HIGH:</div><div class='add'>+		orion_gpio_set_blink(gpio, 0);</div><div class='add'>+		gpio_set_value(gpio, state);</div><div class='add'>+		break;</div><div class='add'>+	case GPIO_LED_BLINK:</div><div class='add'>+		orion_gpio_set_blink(gpio, 1);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(orion_gpio_led_blink_set);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='ctx'>  * Orion GPIO IRQ</div><div class='head'>diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h<br/>index a7fa005a5a0e..e00fdb213609 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-orion/include/plat/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-orion/include/plat/common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-orion/include/plat/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-orion/include/plat/common.h</a></div><div class='hunk'>@@ -16,22 +16,22 @@ struct dsa_platform_data;</div><div class='ctx'> void __init orion_uart0_init(unsigned int membase,</div><div class='ctx'> 			     resource_size_t mapbase,</div><div class='ctx'> 			     unsigned int irq,</div><div class='del'>-			     unsigned int uartclk);</div><div class='add'>+			     struct clk *clk);</div><div class='ctx'> </div><div class='ctx'> void __init orion_uart1_init(unsigned int membase,</div><div class='ctx'> 			     resource_size_t mapbase,</div><div class='ctx'> 			     unsigned int irq,</div><div class='del'>-			     unsigned int uartclk);</div><div class='add'>+			     struct clk *clk);</div><div class='ctx'> </div><div class='ctx'> void __init orion_uart2_init(unsigned int membase,</div><div class='ctx'> 			     resource_size_t mapbase,</div><div class='ctx'> 			     unsigned int irq,</div><div class='del'>-			     unsigned int uartclk);</div><div class='add'>+			     struct clk *clk);</div><div class='ctx'> </div><div class='ctx'> void __init orion_uart3_init(unsigned int membase,</div><div class='ctx'> 			     resource_size_t mapbase,</div><div class='ctx'> 			     unsigned int irq,</div><div class='del'>-			     unsigned int uartclk);</div><div class='add'>+			     struct clk *clk);</div><div class='ctx'> </div><div class='ctx'> void __init orion_rtc_init(unsigned long mapbase,</div><div class='ctx'> 			   unsigned long irq);</div><div class='hunk'>@@ -39,29 +39,26 @@ void __init orion_rtc_init(unsigned long mapbase,</div><div class='ctx'> void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,</div><div class='ctx'> 			    unsigned long mapbase,</div><div class='ctx'> 			    unsigned long irq,</div><div class='del'>-			    unsigned long irq_err,</div><div class='del'>-			    int tclk);</div><div class='add'>+			    unsigned long irq_err);</div><div class='ctx'> </div><div class='ctx'> void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,</div><div class='ctx'> 			    unsigned long mapbase,</div><div class='ctx'> 			    unsigned long irq,</div><div class='del'>-			    unsigned long irq_err,</div><div class='del'>-			    int tclk);</div><div class='add'>+			    unsigned long irq_err);</div><div class='ctx'> </div><div class='ctx'> void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,</div><div class='ctx'> 			    unsigned long mapbase,</div><div class='ctx'> 			    unsigned long irq,</div><div class='del'>-			    unsigned long irq_err,</div><div class='del'>-			    int tclk);</div><div class='add'>+			    unsigned long irq_err);</div><div class='ctx'> </div><div class='ctx'> void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,</div><div class='ctx'> 			    unsigned long mapbase,</div><div class='ctx'> 			    unsigned long irq,</div><div class='del'>-			    unsigned long irq_err,</div><div class='del'>-			    int tclk);</div><div class='add'>+			    unsigned long irq_err);</div><div class='ctx'> </div><div class='ctx'> void __init orion_ge00_switch_init(struct dsa_platform_data *d,</div><div class='ctx'> 				   int irq);</div><div class='add'>+</div><div class='ctx'> void __init orion_i2c_init(unsigned long mapbase,</div><div class='ctx'> 			   unsigned long irq,</div><div class='ctx'> 			   unsigned long freq_m);</div><div class='hunk'>@@ -70,13 +67,11 @@ void __init orion_i2c_1_init(unsigned long mapbase,</div><div class='ctx'> 			     unsigned long irq,</div><div class='ctx'> 			     unsigned long freq_m);</div><div class='ctx'> </div><div class='del'>-void __init orion_spi_init(unsigned long mapbase,</div><div class='del'>-			   unsigned long tclk);</div><div class='add'>+void __init orion_spi_init(unsigned long mapbase);</div><div class='ctx'> </div><div class='del'>-void __init orion_spi_1_init(unsigned long mapbase,</div><div class='del'>-			     unsigned long tclk);</div><div class='add'>+void __init orion_spi_1_init(unsigned long mapbase);</div><div class='ctx'> </div><div class='del'>-void __init orion_wdt_init(unsigned long tclk);</div><div class='add'>+void __init orion_wdt_init(void);</div><div class='ctx'> </div><div class='ctx'> void __init orion_xor0_init(unsigned long mapbase_low,</div><div class='ctx'> 			    unsigned long mapbase_high,</div><div class='hunk'>@@ -106,4 +101,9 @@ void __init orion_crypto_init(unsigned long mapbase,</div><div class='ctx'> 			      unsigned long srambase,</div><div class='ctx'> 			      unsigned long sram_size,</div><div class='ctx'> 			      unsigned long irq);</div><div class='add'>+</div><div class='add'>+void __init orion_clkdev_add(const char *con_id, const char *dev_id,</div><div class='add'>+			     struct clk *clk);</div><div class='add'>+</div><div class='add'>+void __init orion_clkdev_init(struct clk *tclk);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/plat-orion/include/plat/gpio.h b/arch/arm/plat-orion/include/plat/gpio.h<br/>index 3abf30428bee..bec0c98ce41f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-orion/include/plat/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-orion/include/plat/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-orion/include/plat/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-orion/include/plat/gpio.h</a></div><div class='hunk'>@@ -19,6 +19,8 @@</div><div class='ctx'>  */</div><div class='ctx'> void orion_gpio_set_unused(unsigned pin);</div><div class='ctx'> void orion_gpio_set_blink(unsigned pin, int blink);</div><div class='add'>+int orion_gpio_led_blink_set(unsigned gpio, int state,</div><div class='add'>+	unsigned long *delay_on, unsigned long *delay_off);</div><div class='ctx'> </div><div class='ctx'> #define GPIO_INPUT_OK		(1 &lt;&lt; 0)</div><div class='ctx'> #define GPIO_OUTPUT_OK		(1 &lt;&lt; 1)</div><div class='head'>diff --git a/arch/arm/plat-orion/include/plat/orion_wdt.h b/arch/arm/plat-orion/include/plat/orion_wdt.h<br/>deleted file mode 100644<br/>index 665c362a2fba..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-orion/include/plat/orion_wdt.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-orion/include/plat/orion_wdt.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/plat-orion/include/plat/orion_wdt.h</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __PLAT_ORION_WDT_H</div><div class='del'>-#define __PLAT_ORION_WDT_H</div><div class='del'>-</div><div class='del'>-struct orion_wdt_platform_data {</div><div class='del'>-	u32	tclk;		/* no &lt;linux/clk.h&gt; support yet */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='head'>diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c<br/>index 86dbb5bdb172..f20a321088a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-orion/pcie.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-orion/pcie.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-orion/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-orion/pcie.c</a></div><div class='hunk'>@@ -52,12 +52,12 @@</div><div class='ctx'> #define  PCIE_DEBUG_SOFT_RESET		(1&lt;&lt;20)</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-u32 __init orion_pcie_dev_id(void __iomem *base)</div><div class='add'>+u32 orion_pcie_dev_id(void __iomem *base)</div><div class='ctx'> {</div><div class='ctx'> 	return readl(base + PCIE_DEV_ID_OFF) &gt;&gt; 16;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u32 __init orion_pcie_rev(void __iomem *base)</div><div class='add'>+u32 orion_pcie_rev(void __iomem *base)</div><div class='ctx'> {</div><div class='ctx'> 	return readl(base + PCIE_DEV_REV_OFF) &amp; 0xff;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/plat-pxa/include/plat/pxa27x_keypad.h b/arch/arm/plat-pxa/include/plat/pxa27x_keypad.h<br/>index abcc36eb1242..5ce8d5e6ea51 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-pxa/include/plat/pxa27x_keypad.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-pxa/include/plat/pxa27x_keypad.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-pxa/include/plat/pxa27x_keypad.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-pxa/include/plat/pxa27x_keypad.h</a></div><div class='hunk'>@@ -44,6 +44,10 @@ struct pxa27x_keypad_platform_data {</div><div class='ctx'> 	/* direct keys */</div><div class='ctx'> 	int		direct_key_num;</div><div class='ctx'> 	unsigned int	direct_key_map[MAX_DIRECT_KEY_NUM];</div><div class='add'>+	/* the key output may be low active */</div><div class='add'>+	int		direct_key_low_active;</div><div class='add'>+	/* give board a chance to choose the start direct key */</div><div class='add'>+	unsigned int	direct_key_mask;</div><div class='ctx'> </div><div class='ctx'> 	/* rotary encoders 0 */</div><div class='ctx'> 	int		enable_rotary0;</div><div class='head'>diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile<br/>index 2467b800cc76..9f60549c8da1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s3c24xx/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s3c24xx/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-s3c24xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-s3c24xx/Makefile</a></div><div class='hunk'>@@ -12,10 +12,7 @@ obj-				:=</div><div class='ctx'> </div><div class='ctx'> # Core files</div><div class='ctx'> </div><div class='del'>-obj-y				+= cpu.o</div><div class='ctx'> obj-y				+= irq.o</div><div class='del'>-obj-y				+= dev-uart.o</div><div class='del'>-obj-y				+= clock.o</div><div class='ctx'> obj-$(CONFIG_S3C24XX_DCLK)	+= clock-dclk.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CPU_FREQ_S3C24XX)	+= cpu-freq.o</div><div class='hunk'>@@ -23,9 +20,6 @@ obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o</div><div class='ctx'> </div><div class='ctx'> # Architecture dependent builds</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_PM)		+= pm.o</div><div class='del'>-obj-$(CONFIG_PM)		+= irq-pm.o</div><div class='del'>-obj-$(CONFIG_PM)		+= sleep.o</div><div class='ctx'> obj-$(CONFIG_S3C2410_CLOCK)	+= s3c2410-clock.o</div><div class='ctx'> obj-$(CONFIG_S3C24XX_DMA)	+= dma.o</div><div class='ctx'> obj-$(CONFIG_S3C2410_IOTIMING)	+= s3c2410-iotiming.o</div><div class='head'>diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c<br/>deleted file mode 100644<br/>index 931d26d1a54b..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s3c24xx/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s3c24xx/clock.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,59 +0,0 @@</div><div class='del'>-/* linux/arch/arm/plat-s3c24xx/clock.c</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2004-2005 Simtec Electronics</div><div class='del'>- *	Ben Dooks &lt;ben@simtec.co.uk&gt;</div><div class='del'>- *</div><div class='del'>- * S3C24XX Core clock control support</div><div class='del'>- *</div><div class='del'>- * Based on, and code from linux/arch/arm/mach-versatile/clock.c</div><div class='del'>- **</div><div class='del'>- **  Copyright (C) 2004 ARM Limited.</div><div class='del'>- **  Written by Deep Blue Solutions Limited.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/regs-clock.h&gt;</div><div class='del'>-#include &lt;mach/regs-gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;plat/cpu-freq.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;plat/clock.h&gt;</div><div class='del'>-#include &lt;plat/cpu.h&gt;</div><div class='del'>-#include &lt;plat/pll.h&gt;</div><div class='del'>-</div><div class='del'>-/* initialise all the clocks */</div><div class='del'>-</div><div class='del'>-void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,</div><div class='del'>-					   unsigned long hclk,</div><div class='del'>-					   unsigned long pclk)</div><div class='del'>-{</div><div class='del'>-	clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON),</div><div class='del'>-					clk_xtal.rate);</div><div class='del'>-</div><div class='del'>-	clk_mpll.rate = fclk;</div><div class='del'>-	clk_h.rate = hclk;</div><div class='del'>-	clk_p.rate = pclk;</div><div class='del'>-	clk_f.rate = fclk;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/plat-s3c24xx/dev-uart.c b/arch/arm/plat-s3c24xx/dev-uart.c<br/>deleted file mode 100644<br/>index 9ab22e662fff..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s3c24xx/dev-uart.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s3c24xx/dev-uart.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,100 +0,0 @@</div><div class='del'>-/* linux/arch/arm/plat-s3c24xx/dev-uart.c</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2004 Simtec Electronics</div><div class='del'>- *	Ben Dooks &lt;ben@simtec.co.uk&gt;</div><div class='del'>- *</div><div class='del'>- * Base S3C24XX UART resource and platform device definitions</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/serial_core.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mach/arch.h&gt;</div><div class='del'>-#include &lt;asm/mach/map.h&gt;</div><div class='del'>-#include &lt;asm/mach/irq.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/map.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;plat/devs.h&gt;</div><div class='del'>-#include &lt;plat/regs-serial.h&gt;</div><div class='del'>-</div><div class='del'>-/* Serial port registrations */</div><div class='del'>-</div><div class='del'>-static struct resource s3c2410_uart0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_PA_UART0,</div><div class='del'>-		.end   = S3C2410_PA_UART0 + 0x3fff,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = IRQ_S3CUART_RX0,</div><div class='del'>-		.end   = IRQ_S3CUART_ERR0,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource s3c2410_uart1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_PA_UART1,</div><div class='del'>-		.end   = S3C2410_PA_UART1 + 0x3fff,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = IRQ_S3CUART_RX1,</div><div class='del'>-		.end   = IRQ_S3CUART_ERR1,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource s3c2410_uart2_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2410_PA_UART2,</div><div class='del'>-		.end   = S3C2410_PA_UART2 + 0x3fff,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = IRQ_S3CUART_RX2,</div><div class='del'>-		.end   = IRQ_S3CUART_ERR2,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource s3c2410_uart3_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start = S3C2443_PA_UART3,</div><div class='del'>-		.end   = S3C2443_PA_UART3 + 0x3fff,</div><div class='del'>-		.flags = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start = IRQ_S3CUART_RX3,</div><div class='del'>-		.end   = IRQ_S3CUART_ERR3,</div><div class='del'>-		.flags = IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.resources	= s3c2410_uart0_resource,</div><div class='del'>-		.nr_resources	= ARRAY_SIZE(s3c2410_uart0_resource),</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.resources	= s3c2410_uart1_resource,</div><div class='del'>-		.nr_resources	= ARRAY_SIZE(s3c2410_uart1_resource),</div><div class='del'>-	},</div><div class='del'>-	[2] = {</div><div class='del'>-		.resources	= s3c2410_uart2_resource,</div><div class='del'>-		.nr_resources	= ARRAY_SIZE(s3c2410_uart2_resource),</div><div class='del'>-	},</div><div class='del'>-	[3] = {</div><div class='del'>-		.resources	= s3c2410_uart3_resource,</div><div class='del'>-		.nr_resources	= ARRAY_SIZE(s3c2410_uart3_resource),</div><div class='del'>-	},</div><div class='del'>-};</div><div class='head'>diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig<br/>deleted file mode 100644<br/>index 96bea3202304..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,140 +0,0 @@</div><div class='del'>-# arch/arm/plat-s5p/Kconfig</div><div class='del'>-#</div><div class='del'>-# Copyright (c) 2009 Samsung Electronics Co., Ltd.</div><div class='del'>-#		http://www.samsung.com/</div><div class='del'>-#</div><div class='del'>-# Licensed under GPLv2</div><div class='del'>-</div><div class='del'>-config PLAT_S5P</div><div class='del'>-	bool</div><div class='del'>-	depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)</div><div class='del'>-	default y</div><div class='del'>-	select ARM_VIC if !ARCH_EXYNOS</div><div class='del'>-	select ARM_GIC if ARCH_EXYNOS</div><div class='del'>-	select GIC_NON_BANKED if ARCH_EXYNOS4</div><div class='del'>-	select NO_IOPORT</div><div class='del'>-	select ARCH_REQUIRE_GPIOLIB</div><div class='del'>-	select S3C_GPIO_TRACK</div><div class='del'>-	select S5P_GPIO_DRVSTR</div><div class='del'>-	select SAMSUNG_GPIOLIB_4BIT</div><div class='del'>-	select PLAT_SAMSUNG</div><div class='del'>-	select SAMSUNG_CLKSRC</div><div class='del'>-	select SAMSUNG_IRQ_VIC_TIMER</div><div class='del'>-	help</div><div class='del'>-	  Base platform code for Samsung's S5P series SoC.</div><div class='del'>-</div><div class='del'>-config S5P_EXT_INT</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Use the external interrupts (other than GPIO interrupts.)</div><div class='del'>-	  Note: Do not choose this for S5P6440 and S5P6450.</div><div class='del'>-</div><div class='del'>-config S5P_GPIO_INT</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Common code for the GPIO interrupts (other than external interrupts.)</div><div class='del'>-</div><div class='del'>-config S5P_HRT</div><div class='del'>-	bool</div><div class='del'>-	select SAMSUNG_DEV_PWM</div><div class='del'>-	help</div><div class='del'>-	  Use the High Resolution timer support</div><div class='del'>-</div><div class='del'>-config S5P_DEV_UART</div><div class='del'>-	def_bool y</div><div class='del'>-	depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)</div><div class='del'>-</div><div class='del'>-config S5P_PM</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Common code for power management support on S5P and newer SoCs</div><div class='del'>-	  Note: Do not select this for S5P6440 and S5P6450.</div><div class='del'>-</div><div class='del'>-comment "System MMU"</div><div class='del'>-</div><div class='del'>-config S5P_SYSTEM_MMU</div><div class='del'>-	bool "S5P SYSTEM MMU"</div><div class='del'>-	depends on ARCH_EXYNOS4</div><div class='del'>-	help</div><div class='del'>-	  Say Y here if you want to enable System MMU</div><div class='del'>-</div><div class='del'>-config S5P_SLEEP</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Internal config node to apply common S5P sleep management code.</div><div class='del'>-	  Can be selected by S5P and newer SoCs with similar sleep procedure.</div><div class='del'>-</div><div class='del'>-config S5P_DEV_FIMC0</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definitions for FIMC controller 0</div><div class='del'>-</div><div class='del'>-config S5P_DEV_FIMC1</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definitions for FIMC controller 1</div><div class='del'>-</div><div class='del'>-config S5P_DEV_FIMC2</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definitions for FIMC controller 2</div><div class='del'>-</div><div class='del'>-config S5P_DEV_FIMC3</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definitions for FIMC controller 3</div><div class='del'>-</div><div class='del'>-config S5P_DEV_JPEG</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definitions for JPEG codec</div><div class='del'>-</div><div class='del'>-config S5P_DEV_G2D</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definitions for G2D device</div><div class='del'>-</div><div class='del'>-config S5P_DEV_FIMD0</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definitions for FIMD controller 0</div><div class='del'>-</div><div class='del'>-config S5P_DEV_I2C_HDMIPHY</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definitions for I2C HDMIPHY controller</div><div class='del'>-</div><div class='del'>-config S5P_DEV_MFC</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definitions for MFC</div><div class='del'>-</div><div class='del'>-config S5P_DEV_ONENAND</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definition for OneNAND controller</div><div class='del'>-</div><div class='del'>-config S5P_DEV_CSIS0</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definitions for MIPI-CSIS channel 0</div><div class='del'>-</div><div class='del'>-config S5P_DEV_CSIS1</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definitions for MIPI-CSIS channel 1</div><div class='del'>-</div><div class='del'>-config S5P_DEV_TV</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definition for TV interface</div><div class='del'>-</div><div class='del'>-config S5P_DEV_USB_EHCI</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in platform device definition for USB EHCI</div><div class='del'>-</div><div class='del'>-config S5P_SETUP_MIPIPHY</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices</div><div class='head'>diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile<br/>deleted file mode 100644<br/>index 4bd824136659..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-# arch/arm/plat-s5p/Makefile</div><div class='del'>-#</div><div class='del'>-# Copyright (c) 2009 Samsung Electronics Co., Ltd.</div><div class='del'>-# 		http://www.samsung.com/</div><div class='del'>-#</div><div class='del'>-# Licensed under GPLv2</div><div class='del'>-</div><div class='del'>-obj-y				:=</div><div class='del'>-obj-m				:=</div><div class='del'>-obj-n				:= dummy.o</div><div class='del'>-obj-				:=</div><div class='del'>-</div><div class='del'>-# Core files</div><div class='del'>-</div><div class='del'>-obj-y				+= clock.o</div><div class='del'>-obj-y				+= irq.o</div><div class='del'>-obj-$(CONFIG_S5P_EXT_INT)	+= irq-eint.o</div><div class='del'>-obj-$(CONFIG_S5P_GPIO_INT)	+= irq-gpioint.o</div><div class='del'>-obj-$(CONFIG_S5P_SYSTEM_MMU)	+= sysmmu.o</div><div class='del'>-obj-$(CONFIG_S5P_PM)		+= pm.o irq-pm.o</div><div class='del'>-obj-$(CONFIG_S5P_SLEEP)		+= sleep.o</div><div class='del'>-obj-$(CONFIG_S5P_HRT) 		+= s5p-time.o</div><div class='del'>-</div><div class='del'>-# devices</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_S5P_DEV_UART)	+= dev-uart.o</div><div class='del'>-obj-$(CONFIG_S5P_DEV_MFC)	+= dev-mfc.o</div><div class='del'>-obj-$(CONFIG_S5P_SETUP_MIPIPHY)	+= setup-mipiphy.o</div><div class='head'>diff --git a/arch/arm/plat-s5p/sysmmu.c b/arch/arm/plat-s5p/sysmmu.c<br/>deleted file mode 100644<br/>index c8bec9c7655d..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/sysmmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/sysmmu.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,313 +0,0 @@</div><div class='del'>-/* linux/arch/arm/plat-s5p/sysmmu.c</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2010 Samsung Electronics Co., Ltd.</div><div class='del'>- *		http://www.samsung.com</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/map.h&gt;</div><div class='del'>-#include &lt;mach/regs-sysmmu.h&gt;</div><div class='del'>-#include &lt;plat/sysmmu.h&gt;</div><div class='del'>-</div><div class='del'>-#define CTRL_ENABLE	0x5</div><div class='del'>-#define CTRL_BLOCK	0x7</div><div class='del'>-#define CTRL_DISABLE	0x0</div><div class='del'>-</div><div class='del'>-static struct device *dev;</div><div class='del'>-</div><div class='del'>-static unsigned short fault_reg_offset[SYSMMU_FAULTS_NUM] = {</div><div class='del'>-	S5P_PAGE_FAULT_ADDR,</div><div class='del'>-	S5P_AR_FAULT_ADDR,</div><div class='del'>-	S5P_AW_FAULT_ADDR,</div><div class='del'>-	S5P_DEFAULT_SLAVE_ADDR,</div><div class='del'>-	S5P_AR_FAULT_ADDR,</div><div class='del'>-	S5P_AR_FAULT_ADDR,</div><div class='del'>-	S5P_AW_FAULT_ADDR,</div><div class='del'>-	S5P_AW_FAULT_ADDR</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = {</div><div class='del'>-	"PAGE FAULT",</div><div class='del'>-	"AR MULTI-HIT FAULT",</div><div class='del'>-	"AW MULTI-HIT FAULT",</div><div class='del'>-	"BUS ERROR",</div><div class='del'>-	"AR SECURITY PROTECTION FAULT",</div><div class='del'>-	"AR ACCESS PROTECTION FAULT",</div><div class='del'>-	"AW SECURITY PROTECTION FAULT",</div><div class='del'>-	"AW ACCESS PROTECTION FAULT"</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int (*fault_handlers[S5P_SYSMMU_TOTAL_IPNUM])(</div><div class='del'>-		enum S5P_SYSMMU_INTERRUPT_TYPE itype,</div><div class='del'>-		unsigned long pgtable_base,</div><div class='del'>-		unsigned long fault_addr);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * If adjacent 2 bits are true, the system MMU is enabled.</div><div class='del'>- * The system MMU is disabled, otherwise.</div><div class='del'>- */</div><div class='del'>-static unsigned long sysmmu_states;</div><div class='del'>-</div><div class='del'>-static inline void set_sysmmu_active(sysmmu_ips ips)</div><div class='del'>-{</div><div class='del'>-	sysmmu_states |= 3 &lt;&lt; (ips * 2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void set_sysmmu_inactive(sysmmu_ips ips)</div><div class='del'>-{</div><div class='del'>-	sysmmu_states &amp;= ~(3 &lt;&lt; (ips * 2));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int is_sysmmu_active(sysmmu_ips ips)</div><div class='del'>-{</div><div class='del'>-	return sysmmu_states &amp; (3 &lt;&lt; (ips * 2));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __iomem *sysmmusfrs[S5P_SYSMMU_TOTAL_IPNUM];</div><div class='del'>-</div><div class='del'>-static inline void sysmmu_block(sysmmu_ips ips)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(CTRL_BLOCK, sysmmusfrs[ips] + S5P_MMU_CTRL);</div><div class='del'>-	dev_dbg(dev, "%s is blocked.\n", sysmmu_ips_name[ips]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void sysmmu_unblock(sysmmu_ips ips)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(CTRL_ENABLE, sysmmusfrs[ips] + S5P_MMU_CTRL);</div><div class='del'>-	dev_dbg(dev, "%s is unblocked.\n", sysmmu_ips_name[ips]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __sysmmu_tlb_invalidate(sysmmu_ips ips)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(0x1, sysmmusfrs[ips] + S5P_MMU_FLUSH);</div><div class='del'>-	dev_dbg(dev, "TLB of %s is invalidated.\n", sysmmu_ips_name[ips]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __sysmmu_set_ptbase(sysmmu_ips ips, unsigned long pgd)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(pgd == 0)) {</div><div class='del'>-		pgd = (unsigned long)ZERO_PAGE(0);</div><div class='del'>-		__raw_writel(0x20, sysmmusfrs[ips] + S5P_MMU_CFG); /* 4KB LV1 */</div><div class='del'>-	} else {</div><div class='del'>-		__raw_writel(0x0, sysmmusfrs[ips] + S5P_MMU_CFG); /* 16KB LV1 */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__raw_writel(pgd, sysmmusfrs[ips] + S5P_PT_BASE_ADDR);</div><div class='del'>-</div><div class='del'>-	dev_dbg(dev, "Page table base of %s is initialized with 0x%08lX.\n",</div><div class='del'>-						sysmmu_ips_name[ips], pgd);</div><div class='del'>-	__sysmmu_tlb_invalidate(ips);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void sysmmu_set_fault_handler(sysmmu_ips ips,</div><div class='del'>-			int (*handler)(enum S5P_SYSMMU_INTERRUPT_TYPE itype,</div><div class='del'>-					unsigned long pgtable_base,</div><div class='del'>-					unsigned long fault_addr))</div><div class='del'>-{</div><div class='del'>-	BUG_ON(!((ips &gt;= SYSMMU_MDMA) &amp;&amp; (ips &lt; S5P_SYSMMU_TOTAL_IPNUM)));</div><div class='del'>-	fault_handlers[ips] = handler;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t s5p_sysmmu_irq(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	/* SYSMMU is in blocked when interrupt occurred. */</div><div class='del'>-	unsigned long base = 0;</div><div class='del'>-	sysmmu_ips ips = (sysmmu_ips)dev_id;</div><div class='del'>-	enum S5P_SYSMMU_INTERRUPT_TYPE itype;</div><div class='del'>-</div><div class='del'>-	itype = (enum S5P_SYSMMU_INTERRUPT_TYPE)</div><div class='del'>-		__ffs(__raw_readl(sysmmusfrs[ips] + S5P_INT_STATUS));</div><div class='del'>-</div><div class='del'>-	BUG_ON(!((itype &gt;= 0) &amp;&amp; (itype &lt; 8)));</div><div class='del'>-</div><div class='del'>-	dev_alert(dev, "%s occurred by %s.\n", sysmmu_fault_name[itype],</div><div class='del'>-							sysmmu_ips_name[ips]);</div><div class='del'>-</div><div class='del'>-	if (fault_handlers[ips]) {</div><div class='del'>-		unsigned long addr;</div><div class='del'>-</div><div class='del'>-		base = __raw_readl(sysmmusfrs[ips] + S5P_PT_BASE_ADDR);</div><div class='del'>-		addr = __raw_readl(sysmmusfrs[ips] + fault_reg_offset[itype]);</div><div class='del'>-</div><div class='del'>-		if (fault_handlers[ips](itype, base, addr)) {</div><div class='del'>-			__raw_writel(1 &lt;&lt; itype,</div><div class='del'>-					sysmmusfrs[ips] + S5P_INT_CLEAR);</div><div class='del'>-			dev_notice(dev, "%s from %s is resolved."</div><div class='del'>-					" Retrying translation.\n",</div><div class='del'>-				sysmmu_fault_name[itype], sysmmu_ips_name[ips]);</div><div class='del'>-		} else {</div><div class='del'>-			base = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sysmmu_unblock(ips);</div><div class='del'>-</div><div class='del'>-	if (!base)</div><div class='del'>-		dev_notice(dev, "%s from %s is not handled.\n",</div><div class='del'>-			sysmmu_fault_name[itype], sysmmu_ips_name[ips]);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd)</div><div class='del'>-{</div><div class='del'>-	if (is_sysmmu_active(ips)) {</div><div class='del'>-		sysmmu_block(ips);</div><div class='del'>-		__sysmmu_set_ptbase(ips, pgd);</div><div class='del'>-		sysmmu_unblock(ips);</div><div class='del'>-	} else {</div><div class='del'>-		dev_dbg(dev, "%s is disabled. "</div><div class='del'>-			"Skipping initializing page table base.\n",</div><div class='del'>-						sysmmu_ips_name[ips]);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void s5p_sysmmu_enable(sysmmu_ips ips, unsigned long pgd)</div><div class='del'>-{</div><div class='del'>-	if (!is_sysmmu_active(ips)) {</div><div class='del'>-		sysmmu_clk_enable(ips);</div><div class='del'>-</div><div class='del'>-		__sysmmu_set_ptbase(ips, pgd);</div><div class='del'>-</div><div class='del'>-		__raw_writel(CTRL_ENABLE, sysmmusfrs[ips] + S5P_MMU_CTRL);</div><div class='del'>-</div><div class='del'>-		set_sysmmu_active(ips);</div><div class='del'>-		dev_dbg(dev, "%s is enabled.\n", sysmmu_ips_name[ips]);</div><div class='del'>-	} else {</div><div class='del'>-		dev_dbg(dev, "%s is already enabled.\n", sysmmu_ips_name[ips]);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void s5p_sysmmu_disable(sysmmu_ips ips)</div><div class='del'>-{</div><div class='del'>-	if (is_sysmmu_active(ips)) {</div><div class='del'>-		__raw_writel(CTRL_DISABLE, sysmmusfrs[ips] + S5P_MMU_CTRL);</div><div class='del'>-		set_sysmmu_inactive(ips);</div><div class='del'>-		sysmmu_clk_disable(ips);</div><div class='del'>-		dev_dbg(dev, "%s is disabled.\n", sysmmu_ips_name[ips]);</div><div class='del'>-	} else {</div><div class='del'>-		dev_dbg(dev, "%s is already disabled.\n", sysmmu_ips_name[ips]);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void s5p_sysmmu_tlb_invalidate(sysmmu_ips ips)</div><div class='del'>-{</div><div class='del'>-	if (is_sysmmu_active(ips)) {</div><div class='del'>-		sysmmu_block(ips);</div><div class='del'>-		__sysmmu_tlb_invalidate(ips);</div><div class='del'>-		sysmmu_unblock(ips);</div><div class='del'>-	} else {</div><div class='del'>-		dev_dbg(dev, "%s is disabled. "</div><div class='del'>-			"Skipping invalidating TLB.\n", sysmmu_ips_name[ips]);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int s5p_sysmmu_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	int i, ret;</div><div class='del'>-	struct resource *res, *mem;</div><div class='del'>-</div><div class='del'>-	dev = &amp;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; S5P_SYSMMU_TOTAL_IPNUM; i++) {</div><div class='del'>-		int irq;</div><div class='del'>-</div><div class='del'>-		sysmmu_clk_init(dev, i);</div><div class='del'>-		sysmmu_clk_disable(i);</div><div class='del'>-</div><div class='del'>-		res = platform_get_resource(pdev, IORESOURCE_MEM, i);</div><div class='del'>-		if (!res) {</div><div class='del'>-			dev_err(dev, "Failed to get the resource of %s.\n",</div><div class='del'>-							sysmmu_ips_name[i]);</div><div class='del'>-			ret = -ENODEV;</div><div class='del'>-			goto err_res;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		mem = request_mem_region(res-&gt;start, resource_size(res),</div><div class='del'>-					 pdev-&gt;name);</div><div class='del'>-		if (!mem) {</div><div class='del'>-			dev_err(dev, "Failed to request the memory region of %s.\n",</div><div class='del'>-							sysmmu_ips_name[i]);</div><div class='del'>-			ret = -EBUSY;</div><div class='del'>-			goto err_res;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		sysmmusfrs[i] = ioremap(res-&gt;start, resource_size(res));</div><div class='del'>-		if (!sysmmusfrs[i]) {</div><div class='del'>-			dev_err(dev, "Failed to ioremap() for %s.\n",</div><div class='del'>-							sysmmu_ips_name[i]);</div><div class='del'>-			ret = -ENXIO;</div><div class='del'>-			goto err_reg;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		irq = platform_get_irq(pdev, i);</div><div class='del'>-		if (irq &lt;= 0) {</div><div class='del'>-			dev_err(dev, "Failed to get the IRQ resource of %s.\n",</div><div class='del'>-							sysmmu_ips_name[i]);</div><div class='del'>-			ret = -ENOENT;</div><div class='del'>-			goto err_map;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (request_irq(irq, s5p_sysmmu_irq, IRQF_DISABLED,</div><div class='del'>-						pdev-&gt;name, (void *)i)) {</div><div class='del'>-			dev_err(dev, "Failed to request IRQ for %s.\n",</div><div class='del'>-							sysmmu_ips_name[i]);</div><div class='del'>-			ret = -ENOENT;</div><div class='del'>-			goto err_map;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_map:</div><div class='del'>-	iounmap(sysmmusfrs[i]);</div><div class='del'>-err_reg:</div><div class='del'>-	release_mem_region(mem-&gt;start, resource_size(mem));</div><div class='del'>-err_res:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int s5p_sysmmu_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-int s5p_sysmmu_runtime_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int s5p_sysmmu_runtime_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const struct dev_pm_ops s5p_sysmmu_pm_ops = {</div><div class='del'>-	.runtime_suspend	= s5p_sysmmu_runtime_suspend,</div><div class='del'>-	.runtime_resume		= s5p_sysmmu_runtime_resume,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_driver s5p_sysmmu_driver = {</div><div class='del'>-	.probe		= s5p_sysmmu_probe,</div><div class='del'>-	.remove		= s5p_sysmmu_remove,</div><div class='del'>-	.driver		= {</div><div class='del'>-		.owner		= THIS_MODULE,</div><div class='del'>-		.name		= "s5p-sysmmu",</div><div class='del'>-		.pm		= &amp;s5p_sysmmu_pm_ops,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init s5p_sysmmu_init(void)</div><div class='del'>-{</div><div class='del'>-	return platform_driver_register(&amp;s5p_sysmmu_driver);</div><div class='del'>-}</div><div class='del'>-arch_initcall(s5p_sysmmu_init);</div><div class='head'>diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig<br/>index a0ffc77da809..a2fae4ea0936 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/Kconfig</a></div><div class='hunk'>@@ -13,6 +13,24 @@ config PLAT_SAMSUNG</div><div class='ctx'> 	help</div><div class='ctx'> 	  Base platform code for all Samsung SoC based systems</div><div class='ctx'> </div><div class='add'>+config PLAT_S5P</div><div class='add'>+	bool</div><div class='add'>+	depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)</div><div class='add'>+	default y</div><div class='add'>+	select ARM_VIC if !ARCH_EXYNOS</div><div class='add'>+	select ARM_GIC if ARCH_EXYNOS</div><div class='add'>+	select GIC_NON_BANKED if ARCH_EXYNOS4</div><div class='add'>+	select NO_IOPORT</div><div class='add'>+	select ARCH_REQUIRE_GPIOLIB</div><div class='add'>+	select S3C_GPIO_TRACK</div><div class='add'>+	select S5P_GPIO_DRVSTR</div><div class='add'>+	select SAMSUNG_GPIOLIB_4BIT</div><div class='add'>+	select PLAT_SAMSUNG</div><div class='add'>+	select SAMSUNG_CLKSRC</div><div class='add'>+	select SAMSUNG_IRQ_VIC_TIMER</div><div class='add'>+	help</div><div class='add'>+	  Base platform code for Samsung's S5P series SoC.</div><div class='add'>+</div><div class='ctx'> if PLAT_SAMSUNG</div><div class='ctx'> </div><div class='ctx'> # boot configurations</div><div class='hunk'>@@ -50,6 +68,14 @@ config S3C_LOWLEVEL_UART_PORT</div><div class='ctx'> 	  this configuration should be between zero and two. The port</div><div class='ctx'> 	  must have been initialised by the boot-loader before use.</div><div class='ctx'> </div><div class='add'>+# timer options</div><div class='add'>+</div><div class='add'>+config S5P_HRT</div><div class='add'>+	bool</div><div class='add'>+	select SAMSUNG_DEV_PWM</div><div class='add'>+	help</div><div class='add'>+	  Use the High Resolution timer support</div><div class='add'>+</div><div class='ctx'> # clock options</div><div class='ctx'> </div><div class='ctx'> config SAMSUNG_CLKSRC</div><div class='hunk'>@@ -58,6 +84,11 @@ config SAMSUNG_CLKSRC</div><div class='ctx'> 	  Select the clock code for the clksrc implementation</div><div class='ctx'> 	  used by newer systems such as the S3C64XX.</div><div class='ctx'> </div><div class='add'>+config S5P_CLOCK</div><div class='add'>+	def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)</div><div class='add'>+	help</div><div class='add'>+	  Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs</div><div class='add'>+</div><div class='ctx'> # options for IRQ support</div><div class='ctx'> </div><div class='ctx'> config SAMSUNG_IRQ_VIC_TIMER</div><div class='hunk'>@@ -65,6 +96,22 @@ config SAMSUNG_IRQ_VIC_TIMER</div><div class='ctx'>        help</div><div class='ctx'>          Internal configuration to build the VIC timer interrupt code.</div><div class='ctx'> </div><div class='add'>+config S5P_IRQ</div><div class='add'>+	def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)</div><div class='add'>+	help</div><div class='add'>+	  Support common interrup part for ARCH_S5P and ARCH_EXYNOS SoCs</div><div class='add'>+</div><div class='add'>+config S5P_EXT_INT</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Use the external interrupts (other than GPIO interrupts.)</div><div class='add'>+	  Note: Do not choose this for S5P6440 and S5P6450.</div><div class='add'>+</div><div class='add'>+config S5P_GPIO_INT</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Common code for the GPIO interrupts (other than external interrupts.)</div><div class='add'>+</div><div class='ctx'> # options for gpio configuration support</div><div class='ctx'> </div><div class='ctx'> config SAMSUNG_GPIOLIB_4BIT</div><div class='hunk'>@@ -117,6 +164,12 @@ config S3C_GPIO_TRACK</div><div class='ctx'> 	  Internal configuration option to enable the s3c specific gpio</div><div class='ctx'> 	  chip tracking if the platform requires it.</div><div class='ctx'> </div><div class='add'>+# uart options</div><div class='add'>+</div><div class='add'>+config S5P_DEV_UART</div><div class='add'>+	def_bool y</div><div class='add'>+	depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)</div><div class='add'>+</div><div class='ctx'> # ADC driver</div><div class='ctx'> </div><div class='ctx'> config S3C_ADC</div><div class='hunk'>@@ -274,6 +327,76 @@ config SAMSUNG_DEV_BACKLIGHT</div><div class='ctx'> 	help</div><div class='ctx'> 	  Compile in platform device definition LCD backlight with PWM Timer</div><div class='ctx'> </div><div class='add'>+config S5P_DEV_CSIS0</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definitions for MIPI-CSIS channel 0</div><div class='add'>+</div><div class='add'>+config S5P_DEV_CSIS1</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definitions for MIPI-CSIS channel 1</div><div class='add'>+</div><div class='add'>+config S5P_DEV_FIMC0</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definitions for FIMC controller 0</div><div class='add'>+</div><div class='add'>+config S5P_DEV_FIMC1</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definitions for FIMC controller 1</div><div class='add'>+</div><div class='add'>+config S5P_DEV_FIMC2</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definitions for FIMC controller 2</div><div class='add'>+</div><div class='add'>+config S5P_DEV_FIMC3</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definitions for FIMC controller 3</div><div class='add'>+</div><div class='add'>+config S5P_DEV_FIMD0</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definitions for FIMD controller 0</div><div class='add'>+</div><div class='add'>+config S5P_DEV_G2D</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definitions for G2D device</div><div class='add'>+</div><div class='add'>+config S5P_DEV_I2C_HDMIPHY</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definitions for I2C HDMIPHY controller</div><div class='add'>+</div><div class='add'>+config S5P_DEV_JPEG</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definitions for JPEG codec</div><div class='add'>+</div><div class='add'>+config S5P_DEV_MFC</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in setup memory (init) code for MFC</div><div class='add'>+</div><div class='add'>+config S5P_DEV_ONENAND</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definition for OneNAND controller</div><div class='add'>+</div><div class='add'>+config S5P_DEV_TV</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definition for TV interface</div><div class='add'>+</div><div class='add'>+config S5P_DEV_USB_EHCI</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in platform device definition for USB EHCI</div><div class='add'>+</div><div class='ctx'> config S3C24XX_PWM</div><div class='ctx'> 	bool "PWM device support"</div><div class='ctx'> 	select HAVE_PWM</div><div class='hunk'>@@ -281,6 +404,11 @@ config S3C24XX_PWM</div><div class='ctx'> 	  Support for exporting the PWM timer blocks via the pwm device</div><div class='ctx'> 	  system</div><div class='ctx'> </div><div class='add'>+config S5P_SETUP_MIPIPHY</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices</div><div class='add'>+</div><div class='ctx'> # DMA</div><div class='ctx'> </div><div class='ctx'> config S3C_DMA</div><div class='hunk'>@@ -291,7 +419,7 @@ config S3C_DMA</div><div class='ctx'> config SAMSUNG_DMADEV</div><div class='ctx'> 	bool</div><div class='ctx'> 	select DMADEVICES</div><div class='del'>-	select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \</div><div class='add'>+	select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \</div><div class='ctx'> 					CPU_S5P6450 || CPU_S5P6440)</div><div class='ctx'> 	select ARM_AMBA</div><div class='ctx'> 	help</div><div class='hunk'>@@ -351,6 +479,18 @@ config SAMSUNG_WAKEMASK</div><div class='ctx'> 	  and above. This code allows a set of interrupt to wakeup-mask</div><div class='ctx'> 	  mappings. See &lt;plat/wakeup-mask.h&gt;</div><div class='ctx'> </div><div class='add'>+config S5P_PM</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Common code for power management support on S5P and newer SoCs</div><div class='add'>+	  Note: Do not select this for S5P6440 and S5P6450.</div><div class='add'>+</div><div class='add'>+config S5P_SLEEP</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Internal config node to apply common S5P sleep management code.</div><div class='add'>+	  Can be selected by S5P and newer SoCs with similar sleep procedure.</div><div class='add'>+</div><div class='ctx'> comment "Power Domain"</div><div class='ctx'> </div><div class='ctx'> config SAMSUNG_PD</div><div class='head'>diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile<br/>index 6012366f33cb..860b2db4db15 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/Makefile</a></div><div class='hunk'>@@ -13,12 +13,18 @@ obj-				:=</div><div class='ctx'> </div><div class='ctx'> obj-y				+= init.o cpu.o</div><div class='ctx'> obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET)   += time.o</div><div class='add'>+obj-$(CONFIG_S5P_HRT) 		+= s5p-time.o</div><div class='add'>+</div><div class='ctx'> obj-y				+= clock.o</div><div class='ctx'> obj-y				+= pwm-clock.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SAMSUNG_CLKSRC)	+= clock-clksrc.o</div><div class='add'>+obj-$(CONFIG_S5P_CLOCK)		+= s5p-clock.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o</div><div class='add'>+obj-$(CONFIG_S5P_IRQ)		+= s5p-irq.o</div><div class='add'>+obj-$(CONFIG_S5P_EXT_INT)	+= s5p-irq-eint.o</div><div class='add'>+obj-$(CONFIG_S5P_GPIO_INT)	+= s5p-irq-gpioint.o</div><div class='ctx'> </div><div class='ctx'> # ADC</div><div class='ctx'> </div><div class='hunk'>@@ -30,9 +36,13 @@ obj-y				+= platformdata.o</div><div class='ctx'> </div><div class='ctx'> obj-y				+= devs.o</div><div class='ctx'> obj-y				+= dev-uart.o</div><div class='add'>+obj-$(CONFIG_S5P_DEV_MFC)	+= s5p-dev-mfc.o</div><div class='add'>+obj-$(CONFIG_S5P_DEV_UART)	+= s5p-dev-uart.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT)	+= dev-backlight.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_S5P_SETUP_MIPIPHY)	+= setup-mipiphy.o</div><div class='add'>+</div><div class='ctx'> # DMA support</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_S3C_DMA)		+= dma.o s3c-dma-ops.o</div><div class='hunk'>@@ -47,6 +57,9 @@ obj-$(CONFIG_SAMSUNG_PM_CHECK)	+= pm-check.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SAMSUNG_WAKEMASK)	+= wakeup-mask.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_S5P_PM)		+= s5p-pm.o s5p-irq-pm.o</div><div class='add'>+obj-$(CONFIG_S5P_SLEEP)		+= s5p-sleep.o</div><div class='add'>+</div><div class='ctx'> # PD support</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SAMSUNG_PD)	+= pd.o</div><div class='head'>diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c<br/>index 8b928f9bc1c3..1d214cb9d770 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/devs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/devs.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/devs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/devs.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include &lt;linux/mmc/host.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/s3c-hsudc.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/s3c-hsotg.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/pmu.h&gt;</div><div class='hunk'>@@ -57,7 +58,6 @@</div><div class='ctx'> #include &lt;plat/sdhci.h&gt;</div><div class='ctx'> #include &lt;plat/ts.h&gt;</div><div class='ctx'> #include &lt;plat/udc.h&gt;</div><div class='del'>-#include &lt;plat/udc-hs.h&gt;</div><div class='ctx'> #include &lt;plat/usb-control.h&gt;</div><div class='ctx'> #include &lt;plat/usb-phy.h&gt;</div><div class='ctx'> #include &lt;plat/regs-iic.h&gt;</div><div class='hunk'>@@ -272,16 +272,8 @@ struct platform_device s5p_device_fimc3 = {</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_S5P_DEV_G2D</div><div class='ctx'> static struct resource s5p_g2d_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5P_PA_G2D,</div><div class='del'>-		.end	= S5P_PA_G2D + SZ_4K - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_2D,</div><div class='del'>-		.end	= IRQ_2D,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_2D),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s5p_device_g2d = {</div><div class='hunk'>@@ -370,7 +362,6 @@ struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {</div><div class='ctx'> 	.max_width	= 4,</div><div class='ctx'> 	.host_caps	= (MMC_CAP_4_BIT_DATA |</div><div class='ctx'> 			   MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),</div><div class='del'>-	.clk_type	= S3C_SDHCI_CLK_DIV_INTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s3c_device_hsmmc0 = {</div><div class='hunk'>@@ -401,7 +392,6 @@ struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {</div><div class='ctx'> 	.max_width	= 4,</div><div class='ctx'> 	.host_caps	= (MMC_CAP_4_BIT_DATA |</div><div class='ctx'> 			   MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),</div><div class='del'>-	.clk_type	= S3C_SDHCI_CLK_DIV_INTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s3c_device_hsmmc1 = {</div><div class='hunk'>@@ -434,7 +424,6 @@ struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {</div><div class='ctx'> 	.max_width	= 4,</div><div class='ctx'> 	.host_caps	= (MMC_CAP_4_BIT_DATA |</div><div class='ctx'> 			   MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),</div><div class='del'>-	.clk_type	= S3C_SDHCI_CLK_DIV_INTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s3c_device_hsmmc2 = {</div><div class='hunk'>@@ -465,7 +454,6 @@ struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {</div><div class='ctx'> 	.max_width	= 4,</div><div class='ctx'> 	.host_caps	= (MMC_CAP_4_BIT_DATA |</div><div class='ctx'> 			   MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),</div><div class='del'>-	.clk_type	= S3C_SDHCI_CLK_DIV_INTERNAL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct platform_device s3c_device_hsmmc3 = {</div><div class='head'>diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h<br/>index 787ceaca0be8..0721293fad63 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/cpu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/include/plat/cpu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/cpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/cpu.h</a></div><div class='hunk'>@@ -202,7 +202,7 @@ extern struct bus_type s3c2443_subsys;</div><div class='ctx'> extern struct bus_type s3c6410_subsys;</div><div class='ctx'> extern struct bus_type s5p64x0_subsys;</div><div class='ctx'> extern struct bus_type s5pv210_subsys;</div><div class='del'>-extern struct bus_type exynos4_subsys;</div><div class='add'>+extern struct bus_type exynos_subsys;</div><div class='ctx'> </div><div class='ctx'> extern void (*s5pc1xx_idle)(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h<br/>index 2155d4af62a3..61ca2f356c52 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/devs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/include/plat/devs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/devs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/devs.h</a></div><div class='hunk'>@@ -133,7 +133,8 @@ extern struct platform_device exynos4_device_pcm1;</div><div class='ctx'> extern struct platform_device exynos4_device_pcm2;</div><div class='ctx'> extern struct platform_device exynos4_device_pd[];</div><div class='ctx'> extern struct platform_device exynos4_device_spdif;</div><div class='del'>-extern struct platform_device exynos4_device_sysmmu;</div><div class='add'>+</div><div class='add'>+extern struct platform_device exynos_device_drm;</div><div class='ctx'> </div><div class='ctx'> extern struct platform_device samsung_asoc_dma;</div><div class='ctx'> extern struct platform_device samsung_asoc_idma;</div><div class='head'>diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h<br/>index 0670f37aaaed..d384a8016b47 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/dma-pl330.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/include/plat/dma-pl330.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/dma-pl330.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/dma-pl330.h</a></div><div class='hunk'>@@ -90,6 +90,7 @@ enum dma_ch {</div><div class='ctx'> 	DMACH_MIPI_HSI5,</div><div class='ctx'> 	DMACH_MIPI_HSI6,</div><div class='ctx'> 	DMACH_MIPI_HSI7,</div><div class='add'>+	DMACH_DISP1,</div><div class='ctx'> 	DMACH_MTOM_0,</div><div class='ctx'> 	DMACH_MTOM_1,</div><div class='ctx'> 	DMACH_MTOM_2,</div><div class='head'>diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h<br/>index 0fedf47fa502..536002ff2ab8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/fb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/include/plat/fb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/fb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/fb.h</a></div><div class='hunk'>@@ -24,15 +24,16 @@</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct s3c_fb_pd_win - per window setup data</div><div class='del'>- * @win_mode: The display parameters to initialise (not for window 0)</div><div class='add'>+ * @xres     : The window X size.</div><div class='add'>+ * @yres     : The window Y size.</div><div class='ctx'>  * @virtual_x: The virtual X size.</div><div class='ctx'>  * @virtual_y: The virtual Y size.</div><div class='ctx'>  */</div><div class='ctx'> struct s3c_fb_pd_win {</div><div class='del'>-	struct fb_videomode	win_mode;</div><div class='del'>-</div><div class='ctx'> 	unsigned short		default_bpp;</div><div class='ctx'> 	unsigned short		max_bpp;</div><div class='add'>+	unsigned short		xres;</div><div class='add'>+	unsigned short		yres;</div><div class='ctx'> 	unsigned short		virtual_x;</div><div class='ctx'> 	unsigned short		virtual_y;</div><div class='ctx'> };</div><div class='hunk'>@@ -45,6 +46,7 @@ struct s3c_fb_pd_win {</div><div class='ctx'>  * @default_win: default window layer number to be used for UI layer.</div><div class='ctx'>  * @vidcon0: The base vidcon0 values to control the panel data format.</div><div class='ctx'>  * @vidcon1: The base vidcon1 values to control the panel data output.</div><div class='add'>+ * @vtiming: Video timing when connected to a RGB type panel.</div><div class='ctx'>  * @win: The setup data for each hardware window, or NULL for unused.</div><div class='ctx'>  * @display_mode: The LCD output display mode.</div><div class='ctx'>  *</div><div class='hunk'>@@ -58,8 +60,7 @@ struct s3c_fb_platdata {</div><div class='ctx'> 	void	(*setup_gpio)(void);</div><div class='ctx'> </div><div class='ctx'> 	struct s3c_fb_pd_win	*win[S3C_FB_MAX_WIN];</div><div class='del'>-</div><div class='del'>-	u32			 default_win;</div><div class='add'>+	struct fb_videomode     *vtiming;</div><div class='ctx'> </div><div class='ctx'> 	u32			 vidcon0;</div><div class='ctx'> 	u32			 vidcon1;</div><div class='head'>diff --git a/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h b/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h<br/>deleted file mode 100644<br/>index dc90f5ede88f..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/include/plat/regs-usb-hsotg.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,379 +0,0 @@</div><div class='del'>-/* arch/arm/plat-s3c/include/plat/regs-usb-hsotg.h</div><div class='del'>- *</div><div class='del'>- * Copyright 2008 Openmoko, Inc.</div><div class='del'>- * Copyright 2008 Simtec Electronics</div><div class='del'>- *      http://armlinux.simtec.co.uk/</div><div class='del'>- *      Ben Dooks &lt;ben@simtec.co.uk&gt;</div><div class='del'>- *</div><div class='del'>- * S3C - USB2.0 Highspeed/OtG device block registers</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#ifndef __PLAT_S3C64XX_REGS_USB_HSOTG_H</div><div class='del'>-#define __PLAT_S3C64XX_REGS_USB_HSOTG_H __FILE__</div><div class='del'>-</div><div class='del'>-#define S3C_HSOTG_REG(x) (x)</div><div class='del'>-</div><div class='del'>-#define S3C_GOTGCTL				S3C_HSOTG_REG(0x000)</div><div class='del'>-#define S3C_GOTGCTL_BSESVLD			(1 &lt;&lt; 19)</div><div class='del'>-#define S3C_GOTGCTL_ASESVLD			(1 &lt;&lt; 18)</div><div class='del'>-#define S3C_GOTGCTL_DBNC_SHORT			(1 &lt;&lt; 17)</div><div class='del'>-#define S3C_GOTGCTL_CONID_B			(1 &lt;&lt; 16)</div><div class='del'>-#define S3C_GOTGCTL_DEVHNPEN			(1 &lt;&lt; 11)</div><div class='del'>-#define S3C_GOTGCTL_HSSETHNPEN			(1 &lt;&lt; 10)</div><div class='del'>-#define S3C_GOTGCTL_HNPREQ			(1 &lt;&lt; 9)</div><div class='del'>-#define S3C_GOTGCTL_HSTNEGSCS			(1 &lt;&lt; 8)</div><div class='del'>-#define S3C_GOTGCTL_SESREQ			(1 &lt;&lt; 1)</div><div class='del'>-#define S3C_GOTGCTL_SESREQSCS			(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_GOTGINT				S3C_HSOTG_REG(0x004)</div><div class='del'>-#define S3C_GOTGINT_DbnceDone			(1 &lt;&lt; 19)</div><div class='del'>-#define S3C_GOTGINT_ADevTOUTChg			(1 &lt;&lt; 18)</div><div class='del'>-#define S3C_GOTGINT_HstNegDet			(1 &lt;&lt; 17)</div><div class='del'>-#define S3C_GOTGINT_HstnegSucStsChng		(1 &lt;&lt; 9)</div><div class='del'>-#define S3C_GOTGINT_SesReqSucStsChng		(1 &lt;&lt; 8)</div><div class='del'>-#define S3C_GOTGINT_SesEndDet			(1 &lt;&lt; 2)</div><div class='del'>-</div><div class='del'>-#define S3C_GAHBCFG				S3C_HSOTG_REG(0x008)</div><div class='del'>-#define S3C_GAHBCFG_PTxFEmpLvl			(1 &lt;&lt; 8)</div><div class='del'>-#define S3C_GAHBCFG_NPTxFEmpLvl			(1 &lt;&lt; 7)</div><div class='del'>-#define S3C_GAHBCFG_DMAEn			(1 &lt;&lt; 5)</div><div class='del'>-#define S3C_GAHBCFG_HBstLen_MASK		(0xf &lt;&lt; 1)</div><div class='del'>-#define S3C_GAHBCFG_HBstLen_SHIFT		(1)</div><div class='del'>-#define S3C_GAHBCFG_HBstLen_Single		(0x0 &lt;&lt; 1)</div><div class='del'>-#define S3C_GAHBCFG_HBstLen_Incr		(0x1 &lt;&lt; 1)</div><div class='del'>-#define S3C_GAHBCFG_HBstLen_Incr4		(0x3 &lt;&lt; 1)</div><div class='del'>-#define S3C_GAHBCFG_HBstLen_Incr8		(0x5 &lt;&lt; 1)</div><div class='del'>-#define S3C_GAHBCFG_HBstLen_Incr16		(0x7 &lt;&lt; 1)</div><div class='del'>-#define S3C_GAHBCFG_GlblIntrEn			(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_GUSBCFG				S3C_HSOTG_REG(0x00C)</div><div class='del'>-#define S3C_GUSBCFG_PHYLPClkSel			(1 &lt;&lt; 15)</div><div class='del'>-#define S3C_GUSBCFG_HNPCap			(1 &lt;&lt; 9)</div><div class='del'>-#define S3C_GUSBCFG_SRPCap			(1 &lt;&lt; 8)</div><div class='del'>-#define S3C_GUSBCFG_PHYIf16			(1 &lt;&lt; 3)</div><div class='del'>-#define S3C_GUSBCFG_TOutCal_MASK		(0x7 &lt;&lt; 0)</div><div class='del'>-#define S3C_GUSBCFG_TOutCal_SHIFT		(0)</div><div class='del'>-#define S3C_GUSBCFG_TOutCal_LIMIT		(0x7)</div><div class='del'>-#define S3C_GUSBCFG_TOutCal(_x)			((_x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_GRSTCTL				S3C_HSOTG_REG(0x010)</div><div class='del'>-</div><div class='del'>-#define S3C_GRSTCTL_AHBIdle			(1 &lt;&lt; 31)</div><div class='del'>-#define S3C_GRSTCTL_DMAReq			(1 &lt;&lt; 30)</div><div class='del'>-#define S3C_GRSTCTL_TxFNum_MASK			(0x1f &lt;&lt; 6)</div><div class='del'>-#define S3C_GRSTCTL_TxFNum_SHIFT		(6)</div><div class='del'>-#define S3C_GRSTCTL_TxFNum_LIMIT		(0x1f)</div><div class='del'>-#define S3C_GRSTCTL_TxFNum(_x)			((_x) &lt;&lt; 6)</div><div class='del'>-#define S3C_GRSTCTL_TxFFlsh			(1 &lt;&lt; 5)</div><div class='del'>-#define S3C_GRSTCTL_RxFFlsh			(1 &lt;&lt; 4)</div><div class='del'>-#define S3C_GRSTCTL_INTknQFlsh			(1 &lt;&lt; 3)</div><div class='del'>-#define S3C_GRSTCTL_FrmCntrRst			(1 &lt;&lt; 2)</div><div class='del'>-#define S3C_GRSTCTL_HSftRst			(1 &lt;&lt; 1)</div><div class='del'>-#define S3C_GRSTCTL_CSftRst			(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_GINTSTS				S3C_HSOTG_REG(0x014)</div><div class='del'>-#define S3C_GINTMSK				S3C_HSOTG_REG(0x018)</div><div class='del'>-</div><div class='del'>-#define S3C_GINTSTS_WkUpInt			(1 &lt;&lt; 31)</div><div class='del'>-#define S3C_GINTSTS_SessReqInt			(1 &lt;&lt; 30)</div><div class='del'>-#define S3C_GINTSTS_DisconnInt			(1 &lt;&lt; 29)</div><div class='del'>-#define S3C_GINTSTS_ConIDStsChng		(1 &lt;&lt; 28)</div><div class='del'>-#define S3C_GINTSTS_PTxFEmp			(1 &lt;&lt; 26)</div><div class='del'>-#define S3C_GINTSTS_HChInt			(1 &lt;&lt; 25)</div><div class='del'>-#define S3C_GINTSTS_PrtInt			(1 &lt;&lt; 24)</div><div class='del'>-#define S3C_GINTSTS_FetSusp			(1 &lt;&lt; 22)</div><div class='del'>-#define S3C_GINTSTS_incompIP			(1 &lt;&lt; 21)</div><div class='del'>-#define S3C_GINTSTS_IncomplSOIN			(1 &lt;&lt; 20)</div><div class='del'>-#define S3C_GINTSTS_OEPInt			(1 &lt;&lt; 19)</div><div class='del'>-#define S3C_GINTSTS_IEPInt			(1 &lt;&lt; 18)</div><div class='del'>-#define S3C_GINTSTS_EPMis			(1 &lt;&lt; 17)</div><div class='del'>-#define S3C_GINTSTS_EOPF			(1 &lt;&lt; 15)</div><div class='del'>-#define S3C_GINTSTS_ISOutDrop			(1 &lt;&lt; 14)</div><div class='del'>-#define S3C_GINTSTS_EnumDone			(1 &lt;&lt; 13)</div><div class='del'>-#define S3C_GINTSTS_USBRst			(1 &lt;&lt; 12)</div><div class='del'>-#define S3C_GINTSTS_USBSusp			(1 &lt;&lt; 11)</div><div class='del'>-#define S3C_GINTSTS_ErlySusp			(1 &lt;&lt; 10)</div><div class='del'>-#define S3C_GINTSTS_GOUTNakEff			(1 &lt;&lt; 7)</div><div class='del'>-#define S3C_GINTSTS_GINNakEff			(1 &lt;&lt; 6)</div><div class='del'>-#define S3C_GINTSTS_NPTxFEmp			(1 &lt;&lt; 5)</div><div class='del'>-#define S3C_GINTSTS_RxFLvl			(1 &lt;&lt; 4)</div><div class='del'>-#define S3C_GINTSTS_SOF				(1 &lt;&lt; 3)</div><div class='del'>-#define S3C_GINTSTS_OTGInt			(1 &lt;&lt; 2)</div><div class='del'>-#define S3C_GINTSTS_ModeMis			(1 &lt;&lt; 1)</div><div class='del'>-#define S3C_GINTSTS_CurMod_Host			(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_GRXSTSR				S3C_HSOTG_REG(0x01C)</div><div class='del'>-#define S3C_GRXSTSP				S3C_HSOTG_REG(0x020)</div><div class='del'>-</div><div class='del'>-#define S3C_GRXSTS_FN_MASK			(0x7f &lt;&lt; 25)</div><div class='del'>-#define S3C_GRXSTS_FN_SHIFT			(25)</div><div class='del'>-</div><div class='del'>-#define S3C_GRXSTS_PktSts_MASK			(0xf &lt;&lt; 17)</div><div class='del'>-#define S3C_GRXSTS_PktSts_SHIFT			(17)</div><div class='del'>-#define S3C_GRXSTS_PktSts_GlobalOutNAK		(0x1 &lt;&lt; 17)</div><div class='del'>-#define S3C_GRXSTS_PktSts_OutRX			(0x2 &lt;&lt; 17)</div><div class='del'>-#define S3C_GRXSTS_PktSts_OutDone		(0x3 &lt;&lt; 17)</div><div class='del'>-#define S3C_GRXSTS_PktSts_SetupDone		(0x4 &lt;&lt; 17)</div><div class='del'>-#define S3C_GRXSTS_PktSts_SetupRX		(0x6 &lt;&lt; 17)</div><div class='del'>-</div><div class='del'>-#define S3C_GRXSTS_DPID_MASK			(0x3 &lt;&lt; 15)</div><div class='del'>-#define S3C_GRXSTS_DPID_SHIFT			(15)</div><div class='del'>-#define S3C_GRXSTS_ByteCnt_MASK			(0x7ff &lt;&lt; 4)</div><div class='del'>-#define S3C_GRXSTS_ByteCnt_SHIFT		(4)</div><div class='del'>-#define S3C_GRXSTS_EPNum_MASK			(0xf &lt;&lt; 0)</div><div class='del'>-#define S3C_GRXSTS_EPNum_SHIFT			(0)</div><div class='del'>-</div><div class='del'>-#define S3C_GRXFSIZ				S3C_HSOTG_REG(0x024)</div><div class='del'>-</div><div class='del'>-#define S3C_GNPTXFSIZ				S3C_HSOTG_REG(0x028)</div><div class='del'>-</div><div class='del'>-#define S3C_GNPTXFSIZ_NPTxFDep_MASK		(0xffff &lt;&lt; 16)</div><div class='del'>-#define S3C_GNPTXFSIZ_NPTxFDep_SHIFT		(16)</div><div class='del'>-#define S3C_GNPTXFSIZ_NPTxFDep_LIMIT		(0xffff)</div><div class='del'>-#define S3C_GNPTXFSIZ_NPTxFDep(_x)		((_x) &lt;&lt; 16)</div><div class='del'>-#define S3C_GNPTXFSIZ_NPTxFStAddr_MASK		(0xffff &lt;&lt; 0)</div><div class='del'>-#define S3C_GNPTXFSIZ_NPTxFStAddr_SHIFT		(0)</div><div class='del'>-#define S3C_GNPTXFSIZ_NPTxFStAddr_LIMIT		(0xffff)</div><div class='del'>-#define S3C_GNPTXFSIZ_NPTxFStAddr(_x)		((_x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_GNPTXSTS				S3C_HSOTG_REG(0x02C)</div><div class='del'>-</div><div class='del'>-#define S3C_GNPTXSTS_NPtxQTop_MASK		(0x7f &lt;&lt; 24)</div><div class='del'>-#define S3C_GNPTXSTS_NPtxQTop_SHIFT		(24)</div><div class='del'>-</div><div class='del'>-#define S3C_GNPTXSTS_NPTxQSpcAvail_MASK		(0xff &lt;&lt; 16)</div><div class='del'>-#define S3C_GNPTXSTS_NPTxQSpcAvail_SHIFT	(16)</div><div class='del'>-#define S3C_GNPTXSTS_NPTxQSpcAvail_GET(_v)	(((_v) &gt;&gt; 16) &amp; 0xff)</div><div class='del'>-</div><div class='del'>-#define S3C_GNPTXSTS_NPTxFSpcAvail_MASK		(0xffff &lt;&lt; 0)</div><div class='del'>-#define S3C_GNPTXSTS_NPTxFSpcAvail_SHIFT	(0)</div><div class='del'>-#define S3C_GNPTXSTS_NPTxFSpcAvail_GET(_v)	(((_v) &gt;&gt; 0) &amp; 0xffff)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define S3C_HPTXFSIZ				S3C_HSOTG_REG(0x100)</div><div class='del'>-</div><div class='del'>-#define S3C_DPTXFSIZn(_a)			S3C_HSOTG_REG(0x104 + (((_a) - 1) * 4))</div><div class='del'>-</div><div class='del'>-#define S3C_DPTXFSIZn_DPTxFSize_MASK		(0xffff &lt;&lt; 16)</div><div class='del'>-#define S3C_DPTXFSIZn_DPTxFSize_SHIFT		(16)</div><div class='del'>-#define S3C_DPTXFSIZn_DPTxFSize_GET(_v)		(((_v) &gt;&gt; 16) &amp; 0xffff)</div><div class='del'>-#define S3C_DPTXFSIZn_DPTxFSize_LIMIT		(0xffff)</div><div class='del'>-#define S3C_DPTXFSIZn_DPTxFSize(_x)		((_x) &lt;&lt; 16)</div><div class='del'>-</div><div class='del'>-#define S3C_DPTXFSIZn_DPTxFStAddr_MASK		(0xffff &lt;&lt; 0)</div><div class='del'>-#define S3C_DPTXFSIZn_DPTxFStAddr_SHIFT		(0)</div><div class='del'>-</div><div class='del'>-/* Device mode registers */</div><div class='del'>-#define S3C_DCFG				S3C_HSOTG_REG(0x800)</div><div class='del'>-</div><div class='del'>-#define S3C_DCFG_EPMisCnt_MASK			(0x1f &lt;&lt; 18)</div><div class='del'>-#define S3C_DCFG_EPMisCnt_SHIFT			(18)</div><div class='del'>-#define S3C_DCFG_EPMisCnt_LIMIT			(0x1f)</div><div class='del'>-#define S3C_DCFG_EPMisCnt(_x)			((_x) &lt;&lt; 18)</div><div class='del'>-</div><div class='del'>-#define S3C_DCFG_PerFrInt_MASK			(0x3 &lt;&lt; 11)</div><div class='del'>-#define S3C_DCFG_PerFrInt_SHIFT			(11)</div><div class='del'>-#define S3C_DCFG_PerFrInt_LIMIT			(0x3)</div><div class='del'>-#define S3C_DCFG_PerFrInt(_x)			((_x) &lt;&lt; 11)</div><div class='del'>-</div><div class='del'>-#define S3C_DCFG_DevAddr_MASK			(0x7f &lt;&lt; 4)</div><div class='del'>-#define S3C_DCFG_DevAddr_SHIFT			(4)</div><div class='del'>-#define S3C_DCFG_DevAddr_LIMIT			(0x7f)</div><div class='del'>-#define S3C_DCFG_DevAddr(_x)			((_x) &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-#define S3C_DCFG_NZStsOUTHShk			(1 &lt;&lt; 2)</div><div class='del'>-</div><div class='del'>-#define S3C_DCFG_DevSpd_MASK			(0x3 &lt;&lt; 0)</div><div class='del'>-#define S3C_DCFG_DevSpd_SHIFT			(0)</div><div class='del'>-#define S3C_DCFG_DevSpd_HS			(0x0 &lt;&lt; 0)</div><div class='del'>-#define S3C_DCFG_DevSpd_FS			(0x1 &lt;&lt; 0)</div><div class='del'>-#define S3C_DCFG_DevSpd_LS			(0x2 &lt;&lt; 0)</div><div class='del'>-#define S3C_DCFG_DevSpd_FS48			(0x3 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_DCTL				S3C_HSOTG_REG(0x804)</div><div class='del'>-</div><div class='del'>-#define S3C_DCTL_PWROnPrgDone			(1 &lt;&lt; 11)</div><div class='del'>-#define S3C_DCTL_CGOUTNak			(1 &lt;&lt; 10)</div><div class='del'>-#define S3C_DCTL_SGOUTNak			(1 &lt;&lt; 9)</div><div class='del'>-#define S3C_DCTL_CGNPInNAK			(1 &lt;&lt; 8)</div><div class='del'>-#define S3C_DCTL_SGNPInNAK			(1 &lt;&lt; 7)</div><div class='del'>-#define S3C_DCTL_TstCtl_MASK			(0x7 &lt;&lt; 4)</div><div class='del'>-#define S3C_DCTL_TstCtl_SHIFT			(4)</div><div class='del'>-#define S3C_DCTL_GOUTNakSts			(1 &lt;&lt; 3)</div><div class='del'>-#define S3C_DCTL_GNPINNakSts			(1 &lt;&lt; 2)</div><div class='del'>-#define S3C_DCTL_SftDiscon			(1 &lt;&lt; 1)</div><div class='del'>-#define S3C_DCTL_RmtWkUpSig			(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_DSTS				S3C_HSOTG_REG(0x808)</div><div class='del'>-</div><div class='del'>-#define S3C_DSTS_SOFFN_MASK			(0x3fff &lt;&lt; 8)</div><div class='del'>-#define S3C_DSTS_SOFFN_SHIFT			(8)</div><div class='del'>-#define S3C_DSTS_SOFFN_LIMIT			(0x3fff)</div><div class='del'>-#define S3C_DSTS_SOFFN(_x)			((_x) &lt;&lt; 8)</div><div class='del'>-#define S3C_DSTS_ErraticErr			(1 &lt;&lt; 3)</div><div class='del'>-#define S3C_DSTS_EnumSpd_MASK			(0x3 &lt;&lt; 1)</div><div class='del'>-#define S3C_DSTS_EnumSpd_SHIFT			(1)</div><div class='del'>-#define S3C_DSTS_EnumSpd_HS			(0x0 &lt;&lt; 1)</div><div class='del'>-#define S3C_DSTS_EnumSpd_FS			(0x1 &lt;&lt; 1)</div><div class='del'>-#define S3C_DSTS_EnumSpd_LS			(0x2 &lt;&lt; 1)</div><div class='del'>-#define S3C_DSTS_EnumSpd_FS48			(0x3 &lt;&lt; 1)</div><div class='del'>-</div><div class='del'>-#define S3C_DSTS_SuspSts			(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_DIEPMSK				S3C_HSOTG_REG(0x810)</div><div class='del'>-</div><div class='del'>-#define S3C_DIEPMSK_TxFIFOEmpty			(1 &lt;&lt; 7)</div><div class='del'>-#define S3C_DIEPMSK_INEPNakEffMsk		(1 &lt;&lt; 6)</div><div class='del'>-#define S3C_DIEPMSK_INTknEPMisMsk		(1 &lt;&lt; 5)</div><div class='del'>-#define S3C_DIEPMSK_INTknTXFEmpMsk		(1 &lt;&lt; 4)</div><div class='del'>-#define S3C_DIEPMSK_TimeOUTMsk			(1 &lt;&lt; 3)</div><div class='del'>-#define S3C_DIEPMSK_AHBErrMsk			(1 &lt;&lt; 2)</div><div class='del'>-#define S3C_DIEPMSK_EPDisbldMsk			(1 &lt;&lt; 1)</div><div class='del'>-#define S3C_DIEPMSK_XferComplMsk		(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_DOEPMSK				S3C_HSOTG_REG(0x814)</div><div class='del'>-</div><div class='del'>-#define S3C_DOEPMSK_Back2BackSetup		(1 &lt;&lt; 6)</div><div class='del'>-#define S3C_DOEPMSK_OUTTknEPdisMsk		(1 &lt;&lt; 4)</div><div class='del'>-#define S3C_DOEPMSK_SetupMsk			(1 &lt;&lt; 3)</div><div class='del'>-#define S3C_DOEPMSK_AHBErrMsk			(1 &lt;&lt; 2)</div><div class='del'>-#define S3C_DOEPMSK_EPDisbldMsk			(1 &lt;&lt; 1)</div><div class='del'>-#define S3C_DOEPMSK_XferComplMsk		(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_DAINT				S3C_HSOTG_REG(0x818)</div><div class='del'>-#define S3C_DAINTMSK				S3C_HSOTG_REG(0x81C)</div><div class='del'>-</div><div class='del'>-#define S3C_DAINT_OutEP_SHIFT			(16)</div><div class='del'>-#define S3C_DAINT_OutEP(x)			(1 &lt;&lt; ((x) + 16))</div><div class='del'>-#define S3C_DAINT_InEP(x)			(1 &lt;&lt; (x))</div><div class='del'>-</div><div class='del'>-#define S3C_DTKNQR1				S3C_HSOTG_REG(0x820)</div><div class='del'>-#define S3C_DTKNQR2				S3C_HSOTG_REG(0x824)</div><div class='del'>-#define S3C_DTKNQR3				S3C_HSOTG_REG(0x830)</div><div class='del'>-#define S3C_DTKNQR4				S3C_HSOTG_REG(0x834)</div><div class='del'>-</div><div class='del'>-#define S3C_DVBUSDIS				S3C_HSOTG_REG(0x828)</div><div class='del'>-#define S3C_DVBUSPULSE				S3C_HSOTG_REG(0x82C)</div><div class='del'>-</div><div class='del'>-#define S3C_DIEPCTL0				S3C_HSOTG_REG(0x900)</div><div class='del'>-#define S3C_DOEPCTL0				S3C_HSOTG_REG(0xB00)</div><div class='del'>-#define S3C_DIEPCTL(_a)				S3C_HSOTG_REG(0x900 + ((_a) * 0x20))</div><div class='del'>-#define S3C_DOEPCTL(_a)				S3C_HSOTG_REG(0xB00 + ((_a) * 0x20))</div><div class='del'>-</div><div class='del'>-/* EP0 specialness:</div><div class='del'>- * bits[29..28] - reserved (no SetD0PID, SetD1PID)</div><div class='del'>- * bits[25..22] - should always be zero, this isn't a periodic endpoint</div><div class='del'>- * bits[10..0] - MPS setting differenct for EP0</div><div class='del'>-*/</div><div class='del'>-#define S3C_D0EPCTL_MPS_MASK			(0x3 &lt;&lt; 0)</div><div class='del'>-#define S3C_D0EPCTL_MPS_SHIFT			(0)</div><div class='del'>-#define S3C_D0EPCTL_MPS_64			(0x0 &lt;&lt; 0)</div><div class='del'>-#define S3C_D0EPCTL_MPS_32			(0x1 &lt;&lt; 0)</div><div class='del'>-#define S3C_D0EPCTL_MPS_16			(0x2 &lt;&lt; 0)</div><div class='del'>-#define S3C_D0EPCTL_MPS_8			(0x3 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_DxEPCTL_EPEna			(1 &lt;&lt; 31)</div><div class='del'>-#define S3C_DxEPCTL_EPDis			(1 &lt;&lt; 30)</div><div class='del'>-#define S3C_DxEPCTL_SetD1PID			(1 &lt;&lt; 29)</div><div class='del'>-#define S3C_DxEPCTL_SetOddFr			(1 &lt;&lt; 29)</div><div class='del'>-#define S3C_DxEPCTL_SetD0PID			(1 &lt;&lt; 28)</div><div class='del'>-#define S3C_DxEPCTL_SetEvenFr			(1 &lt;&lt; 28)</div><div class='del'>-#define S3C_DxEPCTL_SNAK			(1 &lt;&lt; 27)</div><div class='del'>-#define S3C_DxEPCTL_CNAK			(1 &lt;&lt; 26)</div><div class='del'>-#define S3C_DxEPCTL_TxFNum_MASK			(0xf &lt;&lt; 22)</div><div class='del'>-#define S3C_DxEPCTL_TxFNum_SHIFT		(22)</div><div class='del'>-#define S3C_DxEPCTL_TxFNum_LIMIT		(0xf)</div><div class='del'>-#define S3C_DxEPCTL_TxFNum(_x)			((_x) &lt;&lt; 22)</div><div class='del'>-</div><div class='del'>-#define S3C_DxEPCTL_Stall			(1 &lt;&lt; 21)</div><div class='del'>-#define S3C_DxEPCTL_Snp				(1 &lt;&lt; 20)</div><div class='del'>-#define S3C_DxEPCTL_EPType_MASK			(0x3 &lt;&lt; 18)</div><div class='del'>-#define S3C_DxEPCTL_EPType_SHIFT		(18)</div><div class='del'>-#define S3C_DxEPCTL_EPType_Control		(0x0 &lt;&lt; 18)</div><div class='del'>-#define S3C_DxEPCTL_EPType_Iso			(0x1 &lt;&lt; 18)</div><div class='del'>-#define S3C_DxEPCTL_EPType_Bulk			(0x2 &lt;&lt; 18)</div><div class='del'>-#define S3C_DxEPCTL_EPType_Intterupt		(0x3 &lt;&lt; 18)</div><div class='del'>-</div><div class='del'>-#define S3C_DxEPCTL_NAKsts			(1 &lt;&lt; 17)</div><div class='del'>-#define S3C_DxEPCTL_DPID			(1 &lt;&lt; 16)</div><div class='del'>-#define S3C_DxEPCTL_EOFrNum			(1 &lt;&lt; 16)</div><div class='del'>-#define S3C_DxEPCTL_USBActEp			(1 &lt;&lt; 15)</div><div class='del'>-#define S3C_DxEPCTL_NextEp_MASK			(0xf &lt;&lt; 11)</div><div class='del'>-#define S3C_DxEPCTL_NextEp_SHIFT		(11)</div><div class='del'>-#define S3C_DxEPCTL_NextEp_LIMIT		(0xf)</div><div class='del'>-#define S3C_DxEPCTL_NextEp(_x)			((_x) &lt;&lt; 11)</div><div class='del'>-</div><div class='del'>-#define S3C_DxEPCTL_MPS_MASK			(0x7ff &lt;&lt; 0)</div><div class='del'>-#define S3C_DxEPCTL_MPS_SHIFT			(0)</div><div class='del'>-#define S3C_DxEPCTL_MPS_LIMIT			(0x7ff)</div><div class='del'>-#define S3C_DxEPCTL_MPS(_x)			((_x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_DIEPINT(_a)				S3C_HSOTG_REG(0x908 + ((_a) * 0x20))</div><div class='del'>-#define S3C_DOEPINT(_a)				S3C_HSOTG_REG(0xB08 + ((_a) * 0x20))</div><div class='del'>-</div><div class='del'>-#define S3C_DxEPINT_INEPNakEff			(1 &lt;&lt; 6)</div><div class='del'>-#define S3C_DxEPINT_Back2BackSetup		(1 &lt;&lt; 6)</div><div class='del'>-#define S3C_DxEPINT_INTknEPMis			(1 &lt;&lt; 5)</div><div class='del'>-#define S3C_DxEPINT_INTknTXFEmp			(1 &lt;&lt; 4)</div><div class='del'>-#define S3C_DxEPINT_OUTTknEPdis			(1 &lt;&lt; 4)</div><div class='del'>-#define S3C_DxEPINT_Timeout			(1 &lt;&lt; 3)</div><div class='del'>-#define S3C_DxEPINT_Setup			(1 &lt;&lt; 3)</div><div class='del'>-#define S3C_DxEPINT_AHBErr			(1 &lt;&lt; 2)</div><div class='del'>-#define S3C_DxEPINT_EPDisbld			(1 &lt;&lt; 1)</div><div class='del'>-#define S3C_DxEPINT_XferCompl			(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S3C_DIEPTSIZ0				S3C_HSOTG_REG(0x910)</div><div class='del'>-</div><div class='del'>-#define S3C_DIEPTSIZ0_PktCnt_MASK		(0x3 &lt;&lt; 19)</div><div class='del'>-#define S3C_DIEPTSIZ0_PktCnt_SHIFT		(19)</div><div class='del'>-#define S3C_DIEPTSIZ0_PktCnt_LIMIT		(0x3)</div><div class='del'>-#define S3C_DIEPTSIZ0_PktCnt(_x)		((_x) &lt;&lt; 19)</div><div class='del'>-</div><div class='del'>-#define S3C_DIEPTSIZ0_XferSize_MASK		(0x7f &lt;&lt; 0)</div><div class='del'>-#define S3C_DIEPTSIZ0_XferSize_SHIFT		(0)</div><div class='del'>-#define S3C_DIEPTSIZ0_XferSize_LIMIT		(0x7f)</div><div class='del'>-#define S3C_DIEPTSIZ0_XferSize(_x)		((_x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define DOEPTSIZ0				S3C_HSOTG_REG(0xB10)</div><div class='del'>-#define S3C_DOEPTSIZ0_SUPCnt_MASK		(0x3 &lt;&lt; 29)</div><div class='del'>-#define S3C_DOEPTSIZ0_SUPCnt_SHIFT		(29)</div><div class='del'>-#define S3C_DOEPTSIZ0_SUPCnt_LIMIT		(0x3)</div><div class='del'>-#define S3C_DOEPTSIZ0_SUPCnt(_x)		((_x) &lt;&lt; 29)</div><div class='del'>-</div><div class='del'>-#define S3C_DOEPTSIZ0_PktCnt			(1 &lt;&lt; 19)</div><div class='del'>-#define S3C_DOEPTSIZ0_XferSize_MASK		(0x7f &lt;&lt; 0)</div><div class='del'>-#define S3C_DOEPTSIZ0_XferSize_SHIFT		(0)</div><div class='del'>-</div><div class='del'>-#define S3C_DIEPTSIZ(_a)			S3C_HSOTG_REG(0x910 + ((_a) * 0x20))</div><div class='del'>-#define S3C_DOEPTSIZ(_a)			S3C_HSOTG_REG(0xB10 + ((_a) * 0x20))</div><div class='del'>-</div><div class='del'>-#define S3C_DxEPTSIZ_MC_MASK			(0x3 &lt;&lt; 29)</div><div class='del'>-#define S3C_DxEPTSIZ_MC_SHIFT			(29)</div><div class='del'>-#define S3C_DxEPTSIZ_MC_LIMIT			(0x3)</div><div class='del'>-#define S3C_DxEPTSIZ_MC(_x)			((_x) &lt;&lt; 29)</div><div class='del'>-</div><div class='del'>-#define S3C_DxEPTSIZ_PktCnt_MASK		(0x3ff &lt;&lt; 19)</div><div class='del'>-#define S3C_DxEPTSIZ_PktCnt_SHIFT		(19)</div><div class='del'>-#define S3C_DxEPTSIZ_PktCnt_GET(_v)		(((_v) &gt;&gt; 19) &amp; 0x3ff)</div><div class='del'>-#define S3C_DxEPTSIZ_PktCnt_LIMIT		(0x3ff)</div><div class='del'>-#define S3C_DxEPTSIZ_PktCnt(_x)			((_x) &lt;&lt; 19)</div><div class='del'>-</div><div class='del'>-#define S3C_DxEPTSIZ_XferSize_MASK		(0x7ffff &lt;&lt; 0)</div><div class='del'>-#define S3C_DxEPTSIZ_XferSize_SHIFT		(0)</div><div class='del'>-#define S3C_DxEPTSIZ_XferSize_GET(_v)		(((_v) &gt;&gt; 0) &amp; 0x7ffff)</div><div class='del'>-#define S3C_DxEPTSIZ_XferSize_LIMIT		(0x7ffff)</div><div class='del'>-#define S3C_DxEPTSIZ_XferSize(_x)		((_x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define S3C_DIEPDMA(_a)				S3C_HSOTG_REG(0x914 + ((_a) * 0x20))</div><div class='del'>-#define S3C_DOEPDMA(_a)				S3C_HSOTG_REG(0xB14 + ((_a) * 0x20))</div><div class='del'>-#define S3C_DTXFSTS(_a)				S3C_HSOTG_REG(0x918 + ((_a) * 0x20))</div><div class='del'>-</div><div class='del'>-#define S3C_EPFIFO(_a)				S3C_HSOTG_REG(0x1000 + ((_a) * 0x1000))</div><div class='del'>-</div><div class='del'>-#endif /* __PLAT_S3C64XX_REGS_USB_HSOTG_H */</div><div class='head'>diff --git a/arch/arm/plat-samsung/include/plat/s3c2416.h b/arch/arm/plat-samsung/include/plat/s3c2416.h<br/>index de2b5bdc5ebd..7178e338e25e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/s3c2416.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/include/plat/s3c2416.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/s3c2416.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/s3c2416.h</a></div><div class='hunk'>@@ -24,6 +24,9 @@ extern void s3c2416_init_clocks(int xtal);</div><div class='ctx'> extern  int s3c2416_baseclk_add(void);</div><div class='ctx'> </div><div class='ctx'> extern void s3c2416_restart(char mode, const char *cmd);</div><div class='add'>+</div><div class='add'>+extern struct syscore_ops s3c2416_irq_syscore_ops;</div><div class='add'>+</div><div class='ctx'> #else</div><div class='ctx'> #define s3c2416_init_clocks NULL</div><div class='ctx'> #define s3c2416_init_uarts NULL</div><div class='head'>diff --git a/arch/arm/plat-samsung/include/plat/s5p-clock.h b/arch/arm/plat-samsung/include/plat/s5p-clock.h<br/>index 1de4b32f98e9..8364b4bea8b8 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/s5p-clock.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/include/plat/s5p-clock.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/s5p-clock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/s5p-clock.h</a></div><div class='hunk'>@@ -32,8 +32,10 @@ extern struct clk clk_48m;</div><div class='ctx'> extern struct clk s5p_clk_27m;</div><div class='ctx'> extern struct clk clk_fout_apll;</div><div class='ctx'> extern struct clk clk_fout_bpll;</div><div class='add'>+extern struct clk clk_fout_bpll_div2;</div><div class='ctx'> extern struct clk clk_fout_cpll;</div><div class='ctx'> extern struct clk clk_fout_mpll;</div><div class='add'>+extern struct clk clk_fout_mpll_div2;</div><div class='ctx'> extern struct clk clk_fout_epll;</div><div class='ctx'> extern struct clk clk_fout_dpll;</div><div class='ctx'> extern struct clk clk_fout_vpll;</div><div class='hunk'>@@ -42,8 +44,10 @@ extern struct clk clk_vpll;</div><div class='ctx'> </div><div class='ctx'> extern struct clksrc_sources clk_src_apll;</div><div class='ctx'> extern struct clksrc_sources clk_src_bpll;</div><div class='add'>+extern struct clksrc_sources clk_src_bpll_fout;</div><div class='ctx'> extern struct clksrc_sources clk_src_cpll;</div><div class='ctx'> extern struct clksrc_sources clk_src_mpll;</div><div class='add'>+extern struct clksrc_sources clk_src_mpll_fout;</div><div class='ctx'> extern struct clksrc_sources clk_src_epll;</div><div class='ctx'> extern struct clksrc_sources clk_src_dpll;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h<br/>index e834c5ef437c..151cc9195cf6 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/sdhci.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/include/plat/sdhci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/sdhci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/include/plat/sdhci.h</a></div><div class='hunk'>@@ -33,18 +33,12 @@ enum cd_types {</div><div class='ctx'> 	S3C_SDHCI_CD_PERMANENT,	/* no CD line, card permanently wired to host */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum clk_types {</div><div class='del'>-	S3C_SDHCI_CLK_DIV_INTERNAL,	/* use mmc internal clock divider */</div><div class='del'>-	S3C_SDHCI_CLK_DIV_EXTERNAL,	/* use external clock divider */</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI</div><div class='ctx'>  * @max_width: The maximum number of data bits supported.</div><div class='ctx'>  * @host_caps: Standard MMC host capabilities bit field.</div><div class='ctx'>  * @host_caps2: The second standard MMC host capabilities bit field.</div><div class='ctx'>  * @cd_type: Type of Card Detection method (see cd_types enum above)</div><div class='del'>- * @clk_type: Type of clock divider method (see clk_types enum above)</div><div class='ctx'>  * @ext_cd_init: Initialize external card detect subsystem. Called on</div><div class='ctx'>  *		 sdhci-s3c driver probe when cd_type == S3C_SDHCI_CD_EXTERNAL.</div><div class='ctx'>  *		 notify_func argument is a callback to the sdhci-s3c driver</div><div class='hunk'>@@ -69,7 +63,6 @@ struct s3c_sdhci_platdata {</div><div class='ctx'> 	unsigned int	host_caps2;</div><div class='ctx'> 	unsigned int	pm_caps;</div><div class='ctx'> 	enum cd_types	cd_type;</div><div class='del'>-	enum clk_types	clk_type;</div><div class='ctx'> </div><div class='ctx'> 	int		ext_cd_gpio;</div><div class='ctx'> 	bool		ext_cd_gpio_invert;</div><div class='head'>diff --git a/arch/arm/plat-samsung/include/plat/sysmmu.h b/arch/arm/plat-samsung/include/plat/sysmmu.h<br/>deleted file mode 100644<br/>index 5fe8ee01a5ba..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/include/plat/sysmmu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/include/plat/sysmmu.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,95 +0,0 @@</div><div class='del'>-/* linux/arch/arm/plat-samsung/include/plat/sysmmu.h</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.</div><div class='del'>- *		http://www.samsung.com</div><div class='del'>- *</div><div class='del'>- * Samsung System MMU driver for S5P platform</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#ifndef __PLAT_SAMSUNG_SYSMMU_H</div><div class='del'>-#define __PLAT_SAMSUNG_SYSMMU_H __FILE__</div><div class='del'>-</div><div class='del'>-enum S5P_SYSMMU_INTERRUPT_TYPE {</div><div class='del'>-	SYSMMU_PAGEFAULT,</div><div class='del'>-	SYSMMU_AR_MULTIHIT,</div><div class='del'>-	SYSMMU_AW_MULTIHIT,</div><div class='del'>-	SYSMMU_BUSERROR,</div><div class='del'>-	SYSMMU_AR_SECURITY,</div><div class='del'>-	SYSMMU_AR_ACCESS,</div><div class='del'>-	SYSMMU_AW_SECURITY,</div><div class='del'>-	SYSMMU_AW_PROTECTION, /* 7 */</div><div class='del'>-	SYSMMU_FAULTS_NUM</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_S5P_SYSTEM_MMU</div><div class='del'>-</div><div class='del'>-#include &lt;mach/sysmmu.h&gt;</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * s5p_sysmmu_enable() - enable system mmu of ip</div><div class='del'>- * @ips: The ip connected system mmu.</div><div class='del'>- * #pgd: Base physical address of the 1st level page table</div><div class='del'>- *</div><div class='del'>- * This function enable system mmu to transfer address</div><div class='del'>- * from virtual address to physical address</div><div class='del'>- */</div><div class='del'>-void s5p_sysmmu_enable(sysmmu_ips ips, unsigned long pgd);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * s5p_sysmmu_disable() - disable sysmmu mmu of ip</div><div class='del'>- * @ips: The ip connected system mmu.</div><div class='del'>- *</div><div class='del'>- * This function disable system mmu to transfer address</div><div class='del'>- * from virtual address to physical address</div><div class='del'>- */</div><div class='del'>-void s5p_sysmmu_disable(sysmmu_ips ips);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * s5p_sysmmu_set_tablebase_pgd() - set page table base address to refer page table</div><div class='del'>- * @ips: The ip connected system mmu.</div><div class='del'>- * @pgd: The page table base address.</div><div class='del'>- *</div><div class='del'>- * This function set page table base address</div><div class='del'>- * When system mmu transfer address from virtaul address to physical address,</div><div class='del'>- * system mmu refer address information from page table</div><div class='del'>- */</div><div class='del'>-void s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * s5p_sysmmu_tlb_invalidate() - flush all TLB entry in system mmu</div><div class='del'>- * @ips: The ip connected system mmu.</div><div class='del'>- *</div><div class='del'>- * This function flush all TLB entry in system mmu</div><div class='del'>- */</div><div class='del'>-void s5p_sysmmu_tlb_invalidate(sysmmu_ips ips);</div><div class='del'>-</div><div class='del'>-/** s5p_sysmmu_set_fault_handler() - Fault handler for System MMUs</div><div class='del'>- * @itype: type of fault.</div><div class='del'>- * @pgtable_base: the physical address of page table base. This is 0 if @ips is</div><div class='del'>- *               SYSMMU_BUSERROR.</div><div class='del'>- * @fault_addr: the device (virtual) address that the System MMU tried to</div><div class='del'>- *             translated. This is 0 if @ips is SYSMMU_BUSERROR.</div><div class='del'>- * Called when interrupt occurred by the System MMUs</div><div class='del'>- * The device drivers of peripheral devices that has a System MMU can implement</div><div class='del'>- * a fault handler to resolve address translation fault by System MMU.</div><div class='del'>- * The meanings of return value and parameters are described below.</div><div class='del'>-</div><div class='del'>- * return value: non-zero if the fault is correctly resolved.</div><div class='del'>- *         zero if the fault is not handled.</div><div class='del'>- */</div><div class='del'>-void s5p_sysmmu_set_fault_handler(sysmmu_ips ips,</div><div class='del'>-			int (*handler)(enum S5P_SYSMMU_INTERRUPT_TYPE itype,</div><div class='del'>-					unsigned long pgtable_base,</div><div class='del'>-					unsigned long fault_addr));</div><div class='del'>-#else</div><div class='del'>-#define s5p_sysmmu_enable(ips, pgd) do { } while (0)</div><div class='del'>-#define s5p_sysmmu_disable(ips) do { } while (0)</div><div class='del'>-#define s5p_sysmmu_set_tablebase_pgd(ips, pgd) do { } while (0)</div><div class='del'>-#define s5p_sysmmu_tlb_invalidate(ips) do { } while (0)</div><div class='del'>-#define s5p_sysmmu_set_fault_handler(ips, handler) do { } while (0)</div><div class='del'>-#endif</div><div class='del'>-#endif /* __ASM_PLAT_SYSMMU_H */</div><div class='head'>diff --git a/arch/arm/plat-samsung/platformdata.c b/arch/arm/plat-samsung/platformdata.c<br/>index fa78aa710ed1..b430e9946287 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-samsung/platformdata.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-samsung/platformdata.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/platformdata.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/platformdata.c</a></div><div class='hunk'>@@ -57,6 +57,4 @@ void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd,</div><div class='ctx'> 		set-&gt;host_caps2 |= pd-&gt;host_caps2;</div><div class='ctx'> 	if (pd-&gt;pm_caps)</div><div class='ctx'> 		set-&gt;pm_caps |= pd-&gt;pm_caps;</div><div class='del'>-	if (pd-&gt;clk_type)</div><div class='del'>-		set-&gt;clk_type = pd-&gt;clk_type;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-samsung/s5p-clock.c<br/>index f68a9bb11948..031a61899bef 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/s5p-clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-clock.c</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='del'>-/* linux/arch/arm/plat-s5p/clock.c</div><div class='del'>- *</div><div class='add'>+/*</div><div class='ctx'>  * Copyright 2009 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com/</div><div class='ctx'>  *</div><div class='hunk'>@@ -68,6 +67,11 @@ struct clk clk_fout_bpll = {</div><div class='ctx'> 	.id		= -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct clk clk_fout_bpll_div2 = {</div><div class='add'>+	.name		= "fout_bpll_div2",</div><div class='add'>+	.id		= -1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* CPLL clock output */</div><div class='ctx'> </div><div class='ctx'> struct clk clk_fout_cpll = {</div><div class='hunk'>@@ -83,6 +87,11 @@ struct clk clk_fout_mpll = {</div><div class='ctx'> 	.id		= -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct clk clk_fout_mpll_div2 = {</div><div class='add'>+	.name		= "fout_mpll_div2",</div><div class='add'>+	.id		= -1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* EPLL clock output */</div><div class='ctx'> struct clk clk_fout_epll = {</div><div class='ctx'> 	.name		= "fout_epll",</div><div class='hunk'>@@ -126,6 +135,16 @@ struct clksrc_sources clk_src_bpll = {</div><div class='ctx'> 	.nr_sources	= ARRAY_SIZE(clk_src_bpll_list),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct clk *clk_src_bpll_fout_list[] = {</div><div class='add'>+	[0] = &amp;clk_fout_bpll_div2,</div><div class='add'>+	[1] = &amp;clk_fout_bpll,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clksrc_sources clk_src_bpll_fout = {</div><div class='add'>+	.sources	= clk_src_bpll_fout_list,</div><div class='add'>+	.nr_sources	= ARRAY_SIZE(clk_src_bpll_fout_list),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Possible clock sources for CPLL Mux */</div><div class='ctx'> static struct clk *clk_src_cpll_list[] = {</div><div class='ctx'> 	[0] = &amp;clk_fin_cpll,</div><div class='hunk'>@@ -148,6 +167,16 @@ struct clksrc_sources clk_src_mpll = {</div><div class='ctx'> 	.nr_sources	= ARRAY_SIZE(clk_src_mpll_list),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct clk *clk_src_mpll_fout_list[] = {</div><div class='add'>+	[0] = &amp;clk_fout_mpll_div2,</div><div class='add'>+	[1] = &amp;clk_fout_mpll,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clksrc_sources clk_src_mpll_fout = {</div><div class='add'>+	.sources	= clk_src_mpll_fout_list,</div><div class='add'>+	.nr_sources	= ARRAY_SIZE(clk_src_mpll_fout_list),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Possible clock sources for EPLL Mux */</div><div class='ctx'> static struct clk *clk_src_epll_list[] = {</div><div class='ctx'> 	[0] = &amp;clk_fin_epll,</div><div class='head'>diff --git a/arch/arm/plat-s5p/dev-mfc.c b/arch/arm/plat-samsung/s5p-dev-mfc.c<br/>index a30d36b7f61b..ad6089465e2a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/dev-mfc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/dev-mfc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/s5p-dev-mfc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-dev-mfc.c</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='del'>-/* linux/arch/arm/plat-s5p/dev-mfc.c</div><div class='del'>- *</div><div class='add'>+/*</div><div class='ctx'>  * Copyright (C) 2010-2011 Samsung Electronics Co.Ltd</div><div class='ctx'>  *</div><div class='ctx'>  * Base S5P MFC resource and device definitions</div><div class='hunk'>@@ -9,7 +8,6 @@</div><div class='ctx'>  * published by the Free Software Foundation.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='head'>diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-samsung/s5p-dev-uart.c<br/>index c9308db36183..cafa3deddcc1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/dev-uart.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/dev-uart.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/s5p-dev-uart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-dev-uart.c</a></div><div class='hunk'>@@ -1,6 +1,5 @@</div><div class='del'>-/* linux/arch/arm/plat-s5p/dev-uart.c</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2009 Samsung Electronics Co., Ltd.</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2009,2012 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com/</div><div class='ctx'>  *</div><div class='ctx'>  * Base S5P UART resource and device definitions</div><div class='hunk'>@@ -14,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach/arch.h&gt;</div><div class='hunk'>@@ -26,86 +26,38 @@</div><div class='ctx'>  /* Serial port registrations */</div><div class='ctx'> </div><div class='ctx'> static struct resource s5p_uart0_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5P_PA_UART0,</div><div class='del'>-		.end	= S5P_PA_UART0 + S5P_SZ_UART - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_UART0,</div><div class='del'>-		.end	= IRQ_UART0,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5P_PA_UART0, S5P_SZ_UART),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_UART0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5p_uart1_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5P_PA_UART1,</div><div class='del'>-		.end	= S5P_PA_UART1 + S5P_SZ_UART - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_UART1,</div><div class='del'>-		.end	= IRQ_UART1,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5P_PA_UART1, S5P_SZ_UART),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_UART1),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5p_uart2_resource[] = {</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5P_PA_UART2,</div><div class='del'>-		.end	= S5P_PA_UART2 + S5P_SZ_UART - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_UART2,</div><div class='del'>-		.end	= IRQ_UART2,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5P_PA_UART2, S5P_SZ_UART),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_UART2),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5p_uart3_resource[] = {</div><div class='ctx'> #if CONFIG_SERIAL_SAMSUNG_UARTS &gt; 3</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5P_PA_UART3,</div><div class='del'>-		.end	= S5P_PA_UART3 + S5P_SZ_UART - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_UART3,</div><div class='del'>-		.end	= IRQ_UART3,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5P_PA_UART3, S5P_SZ_UART),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_UART3),</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5p_uart4_resource[] = {</div><div class='ctx'> #if CONFIG_SERIAL_SAMSUNG_UARTS &gt; 4</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5P_PA_UART4,</div><div class='del'>-		.end	= S5P_PA_UART4 + S5P_SZ_UART - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_UART4,</div><div class='del'>-		.end	= IRQ_UART4,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5P_PA_UART4, S5P_SZ_UART),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_UART4),</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource s5p_uart5_resource[] = {</div><div class='ctx'> #if CONFIG_SERIAL_SAMSUNG_UARTS &gt; 5</div><div class='del'>-	[0] = {</div><div class='del'>-		.start	= S5P_PA_UART5,</div><div class='del'>-		.end	= S5P_PA_UART5 + S5P_SZ_UART - 1,</div><div class='del'>-		.flags	= IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	[1] = {</div><div class='del'>-		.start	= IRQ_UART5,</div><div class='del'>-		.end	= IRQ_UART5,</div><div class='del'>-		.flags	= IORESOURCE_IRQ,</div><div class='del'>-	},</div><div class='add'>+	[0] = DEFINE_RES_MEM(S5P_PA_UART5, S5P_SZ_UART),</div><div class='add'>+	[1] = DEFINE_RES_IRQ(IRQ_UART5),</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-samsung/s5p-irq-eint.c<br/>index 139c050918c5..33bd3f3d20f5 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/irq-eint.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/irq-eint.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/s5p-irq-eint.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-irq-eint.c</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='del'>-/* linux/arch/arm/plat-s5p/irq-eint.c</div><div class='del'>- *</div><div class='add'>+/*</div><div class='ctx'>  * Copyright (c) 2010 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-samsung/s5p-irq-gpioint.c<br/>index 82c7311017a2..f9431fe5b06e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/irq-gpioint.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/irq-gpioint.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/s5p-irq-gpioint.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-irq-gpioint.c</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='del'>-/* linux/arch/arm/plat-s5p/irq-gpioint.c</div><div class='del'>- *</div><div class='add'>+/*</div><div class='ctx'>  * Copyright (c) 2010 Samsung Electronics Co., Ltd.</div><div class='ctx'>  * Author: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;</div><div class='ctx'>  * Author: Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;</div><div class='head'>diff --git a/arch/arm/plat-s5p/irq-pm.c b/arch/arm/plat-samsung/s5p-irq-pm.c<br/>index d1bfecae6c9f..7c1e3b7072fc 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/irq-pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/irq-pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/s5p-irq-pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-irq-pm.c</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='del'>-/* linux/arch/arm/plat-s5p/irq-pm.c</div><div class='del'>- *</div><div class='add'>+/*</div><div class='ctx'>  * Copyright (c) 2010 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-samsung/s5p-irq.c<br/>index afdaa1082b9f..dfb47d638f03 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/s5p-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-irq.c</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='del'>-/* arch/arm/plat-s5p/irq.c</div><div class='del'>- *</div><div class='add'>+/*</div><div class='ctx'>  * Copyright (c) 2009 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com/</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/arm/plat-s5p/pm.c b/arch/arm/plat-samsung/s5p-pm.c<br/>index d15dc47b0e3d..0747468f0936 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/s5p-pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-pm.c</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='del'>-/* linux/arch/arm/plat-s5p/pm.c</div><div class='del'>- *</div><div class='add'>+/*</div><div class='ctx'>  * Copyright (c) 2010 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/arm/plat-s5p/sleep.S b/arch/arm/plat-samsung/s5p-sleep.S<br/>index 006bd01eda02..bdf6dadf8790 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/sleep.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/sleep.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/s5p-sleep.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-sleep.S</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='del'>-/* linux/arch/arm/plat-s5p/sleep.S</div><div class='del'>- *</div><div class='add'>+/*</div><div class='ctx'>  * Copyright (c) 2011 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-samsung/s5p-time.c<br/>index 17c0a2c58dfd..028b6e877eb9 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/s5p-time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/s5p-time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/s5p-time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/s5p-time.c</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='del'>-/* linux/arch/arm/plat-s5p/s5p-time.c</div><div class='del'>- *</div><div class='add'>+/*</div><div class='ctx'>  * Copyright (c) 2011 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *		http://www.samsung.com/</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/arm/plat-s5p/setup-mipiphy.c b/arch/arm/plat-samsung/setup-mipiphy.c<br/>index 683c466c0e6a..683c466c0e6a 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-s5p/setup-mipiphy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-s5p/setup-mipiphy.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-samsung/setup-mipiphy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-samsung/setup-mipiphy.c</a></div><div class='head'>diff --git a/arch/arm/plat-spear/Kconfig b/arch/arm/plat-spear/Kconfig<br/>index 1bb3dbce8810..4404f82d5979 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-spear/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-spear/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-spear/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/Kconfig</a></div><div class='hunk'>@@ -8,10 +8,23 @@ choice</div><div class='ctx'> 	prompt "ST SPEAr Family"</div><div class='ctx'> 	default ARCH_SPEAR3XX</div><div class='ctx'> </div><div class='add'>+config ARCH_SPEAR13XX</div><div class='add'>+	bool "ST SPEAr13xx with Device Tree"</div><div class='add'>+	select ARM_GIC</div><div class='add'>+	select CPU_V7</div><div class='add'>+	select USE_OF</div><div class='add'>+	select HAVE_SMP</div><div class='add'>+	select MIGHT_HAVE_CACHE_L2X0</div><div class='add'>+	select PINCTRL</div><div class='add'>+	help</div><div class='add'>+	  Supports for ARM's SPEAR13XX family</div><div class='add'>+</div><div class='ctx'> config ARCH_SPEAR3XX</div><div class='del'>-	bool "SPEAr3XX"</div><div class='add'>+	bool "ST SPEAr3xx with Device Tree"</div><div class='ctx'> 	select ARM_VIC</div><div class='ctx'> 	select CPU_ARM926T</div><div class='add'>+	select USE_OF</div><div class='add'>+	select PINCTRL</div><div class='ctx'> 	help</div><div class='ctx'> 	  Supports for ARM's SPEAR3XX family</div><div class='ctx'> </div><div class='hunk'>@@ -25,6 +38,7 @@ config ARCH_SPEAR6XX</div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='ctx'> # Adding SPEAr machine specific configuration files</div><div class='add'>+source "arch/arm/mach-spear13xx/Kconfig"</div><div class='ctx'> source "arch/arm/mach-spear3xx/Kconfig"</div><div class='ctx'> source "arch/arm/mach-spear6xx/Kconfig"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile<br/>index e0f2e5b9530c..2607bd05c525 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-spear/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-spear/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-spear/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/Makefile</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> # Common support</div><div class='del'>-obj-y	:= clock.o restart.o time.o</div><div class='add'>+obj-y	:= restart.o time.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_ARCH_SPEAR3XX)	+= shirq.o padmux.o</div><div class='add'>+obj-$(CONFIG_ARCH_SPEAR3XX)	+= pl080.o shirq.o</div><div class='add'>+obj-$(CONFIG_ARCH_SPEAR6XX)	+= pl080.o</div><div class='head'>diff --git a/arch/arm/plat-spear/clock.c b/arch/arm/plat-spear/clock.c<br/>deleted file mode 100644<br/>index 67dd00381ea6..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-spear/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-spear/clock.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1005 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/plat-spear/clock.c</div><div class='del'>- *</div><div class='del'>- * Clock framework for SPEAr platform</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/bug.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;plat/clock.h&gt;</div><div class='del'>-</div><div class='del'>-static DEFINE_SPINLOCK(clocks_lock);</div><div class='del'>-static LIST_HEAD(root_clks);</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-static LIST_HEAD(clocks);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void propagate_rate(struct clk *, int on_init);</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-static int clk_debugfs_reparent(struct clk *);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int generic_clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned int val;</div><div class='del'>-</div><div class='del'>-	if (!clk-&gt;en_reg)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	val = readl(clk-&gt;en_reg);</div><div class='del'>-	if (unlikely(clk-&gt;flags &amp; RESET_TO_ENABLE))</div><div class='del'>-		val &amp;= ~(1 &lt;&lt; clk-&gt;en_reg_bit);</div><div class='del'>-	else</div><div class='del'>-		val |= 1 &lt;&lt; clk-&gt;en_reg_bit;</div><div class='del'>-</div><div class='del'>-	writel(val, clk-&gt;en_reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void generic_clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned int val;</div><div class='del'>-</div><div class='del'>-	if (!clk-&gt;en_reg)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	val = readl(clk-&gt;en_reg);</div><div class='del'>-	if (unlikely(clk-&gt;flags &amp; RESET_TO_ENABLE))</div><div class='del'>-		val |= 1 &lt;&lt; clk-&gt;en_reg_bit;</div><div class='del'>-	else</div><div class='del'>-		val &amp;= ~(1 &lt;&lt; clk-&gt;en_reg_bit);</div><div class='del'>-</div><div class='del'>-	writel(val, clk-&gt;en_reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* generic clk ops */</div><div class='del'>-static struct clkops generic_clkops = {</div><div class='del'>-	.enable = generic_clk_enable,</div><div class='del'>-	.disable = generic_clk_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* returns current programmed clocks clock info structure */</div><div class='del'>-static struct pclk_info *pclk_info_get(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned int val, i;</div><div class='del'>-	struct pclk_info *info = NULL;</div><div class='del'>-</div><div class='del'>-	val = (readl(clk-&gt;pclk_sel-&gt;pclk_sel_reg) &gt;&gt; clk-&gt;pclk_sel_shift)</div><div class='del'>-		&amp; clk-&gt;pclk_sel-&gt;pclk_sel_mask;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; clk-&gt;pclk_sel-&gt;pclk_count; i++) {</div><div class='del'>-		if (clk-&gt;pclk_sel-&gt;pclk_info[i].pclk_val == val)</div><div class='del'>-			info = &amp;clk-&gt;pclk_sel-&gt;pclk_info[i];</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return info;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Set Update pclk, and pclk_info of clk and add clock sibling node to current</div><div class='del'>- * parents children list</div><div class='del'>- */</div><div class='del'>-static void clk_reparent(struct clk *clk, struct pclk_info *pclk_info)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;clocks_lock, flags);</div><div class='del'>-	list_del(&amp;clk-&gt;sibling);</div><div class='del'>-	list_add(&amp;clk-&gt;sibling, &amp;pclk_info-&gt;pclk-&gt;children);</div><div class='del'>-</div><div class='del'>-	clk-&gt;pclk = pclk_info-&gt;pclk;</div><div class='del'>-	spin_unlock_irqrestore(&amp;clocks_lock, flags);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-	clk_debugfs_reparent(clk);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void do_clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	if (!clk)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (!clk-&gt;usage_count) {</div><div class='del'>-		WARN_ON(1);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	clk-&gt;usage_count--;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;usage_count == 0) {</div><div class='del'>-		/*</div><div class='del'>-		 * Surely, there are no active childrens or direct users</div><div class='del'>-		 * of this clock</div><div class='del'>-		 */</div><div class='del'>-		if (clk-&gt;pclk)</div><div class='del'>-			do_clk_disable(clk-&gt;pclk);</div><div class='del'>-</div><div class='del'>-		if (clk-&gt;ops &amp;&amp; clk-&gt;ops-&gt;disable)</div><div class='del'>-			clk-&gt;ops-&gt;disable(clk);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int do_clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (!clk)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;usage_count == 0) {</div><div class='del'>-		if (clk-&gt;pclk) {</div><div class='del'>-			ret = do_clk_enable(clk-&gt;pclk);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto err;</div><div class='del'>-		}</div><div class='del'>-		if (clk-&gt;ops &amp;&amp; clk-&gt;ops-&gt;enable) {</div><div class='del'>-			ret = clk-&gt;ops-&gt;enable(clk);</div><div class='del'>-			if (ret) {</div><div class='del'>-				if (clk-&gt;pclk)</div><div class='del'>-					do_clk_disable(clk-&gt;pclk);</div><div class='del'>-				goto err;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		/*</div><div class='del'>-		 * Since the clock is going to be used for the first</div><div class='del'>-		 * time please reclac</div><div class='del'>-		 */</div><div class='del'>-		if (clk-&gt;recalc) {</div><div class='del'>-			ret = clk-&gt;recalc(clk);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	clk-&gt;usage_count++;</div><div class='del'>-err:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * clk_enable - inform the system when the clock source should be running.</div><div class='del'>- * @clk: clock source</div><div class='del'>- *</div><div class='del'>- * If the clock can not be enabled/disabled, this should return success.</div><div class='del'>- *</div><div class='del'>- * Returns success (0) or negative errno.</div><div class='del'>- */</div><div class='del'>-int clk_enable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;clocks_lock, flags);</div><div class='del'>-	ret = do_clk_enable(clk);</div><div class='del'>-	spin_unlock_irqrestore(&amp;clocks_lock, flags);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_enable);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * clk_disable - inform the system when the clock source is no longer required.</div><div class='del'>- * @clk: clock source</div><div class='del'>- *</div><div class='del'>- * Inform the system that a clock source is no longer required by</div><div class='del'>- * a driver and may be shut down.</div><div class='del'>- *</div><div class='del'>- * Implementation detail: if the clock source is shared between</div><div class='del'>- * multiple drivers, clk_enable() calls must be balanced by the</div><div class='del'>- * same number of clk_disable() calls for the clock source to be</div><div class='del'>- * disabled.</div><div class='del'>- */</div><div class='del'>-void clk_disable(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;clocks_lock, flags);</div><div class='del'>-	do_clk_disable(clk);</div><div class='del'>-	spin_unlock_irqrestore(&amp;clocks_lock, flags);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_disable);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * clk_get_rate - obtain the current clock rate (in Hz) for a clock source.</div><div class='del'>- *		 This is only valid once the clock source has been enabled.</div><div class='del'>- * @clk: clock source</div><div class='del'>- */</div><div class='del'>-unsigned long clk_get_rate(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags, rate;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;clocks_lock, flags);</div><div class='del'>-	rate = clk-&gt;rate;</div><div class='del'>-	spin_unlock_irqrestore(&amp;clocks_lock, flags);</div><div class='del'>-</div><div class='del'>-	return rate;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_get_rate);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * clk_set_parent - set the parent clock source for this clock</div><div class='del'>- * @clk: clock source</div><div class='del'>- * @parent: parent clock source</div><div class='del'>- *</div><div class='del'>- * Returns success (0) or negative errno.</div><div class='del'>- */</div><div class='del'>-int clk_set_parent(struct clk *clk, struct clk *parent)</div><div class='del'>-{</div><div class='del'>-	int i, found = 0, val = 0;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (!clk || !parent)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	if (clk-&gt;pclk == parent)</div><div class='del'>-		return 0;</div><div class='del'>-	if (!clk-&gt;pclk_sel)</div><div class='del'>-		return -EPERM;</div><div class='del'>-</div><div class='del'>-	/* check if requested parent is in clk parent list */</div><div class='del'>-	for (i = 0; i &lt; clk-&gt;pclk_sel-&gt;pclk_count; i++) {</div><div class='del'>-		if (clk-&gt;pclk_sel-&gt;pclk_info[i].pclk == parent) {</div><div class='del'>-			found = 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!found)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;clocks_lock, flags);</div><div class='del'>-	/* reflect parent change in hardware */</div><div class='del'>-	val = readl(clk-&gt;pclk_sel-&gt;pclk_sel_reg);</div><div class='del'>-	val &amp;= ~(clk-&gt;pclk_sel-&gt;pclk_sel_mask &lt;&lt; clk-&gt;pclk_sel_shift);</div><div class='del'>-	val |= clk-&gt;pclk_sel-&gt;pclk_info[i].pclk_val &lt;&lt; clk-&gt;pclk_sel_shift;</div><div class='del'>-	writel(val, clk-&gt;pclk_sel-&gt;pclk_sel_reg);</div><div class='del'>-	spin_unlock_irqrestore(&amp;clocks_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* reflect parent change in software */</div><div class='del'>-	clk_reparent(clk, &amp;clk-&gt;pclk_sel-&gt;pclk_info[i]);</div><div class='del'>-</div><div class='del'>-	propagate_rate(clk, 0);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_set_parent);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * clk_set_rate - set the clock rate for a clock source</div><div class='del'>- * @clk: clock source</div><div class='del'>- * @rate: desired clock rate in Hz</div><div class='del'>- *</div><div class='del'>- * Returns success (0) or negative errno.</div><div class='del'>- */</div><div class='del'>-int clk_set_rate(struct clk *clk, unsigned long rate)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int ret = -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!clk || !rate)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (clk-&gt;set_rate) {</div><div class='del'>-		spin_lock_irqsave(&amp;clocks_lock, flags);</div><div class='del'>-		ret = clk-&gt;set_rate(clk, rate);</div><div class='del'>-		if (!ret)</div><div class='del'>-			/* if successful -&gt; propagate */</div><div class='del'>-			propagate_rate(clk, 0);</div><div class='del'>-		spin_unlock_irqrestore(&amp;clocks_lock, flags);</div><div class='del'>-	} else if (clk-&gt;pclk) {</div><div class='del'>-		u32 mult = clk-&gt;div_factor ? clk-&gt;div_factor : 1;</div><div class='del'>-		ret = clk_set_rate(clk-&gt;pclk, mult * rate);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_set_rate);</div><div class='del'>-</div><div class='del'>-/* registers clock in platform clock framework */</div><div class='del'>-void clk_register(struct clk_lookup *cl)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (!cl || !cl-&gt;clk)</div><div class='del'>-		return;</div><div class='del'>-	clk = cl-&gt;clk;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;clocks_lock, flags);</div><div class='del'>-</div><div class='del'>-	INIT_LIST_HEAD(&amp;clk-&gt;children);</div><div class='del'>-	if (clk-&gt;flags &amp; ALWAYS_ENABLED)</div><div class='del'>-		clk-&gt;ops = NULL;</div><div class='del'>-	else if (!clk-&gt;ops)</div><div class='del'>-		clk-&gt;ops = &amp;generic_clkops;</div><div class='del'>-</div><div class='del'>-	/* root clock don't have any parents */</div><div class='del'>-	if (!clk-&gt;pclk &amp;&amp; !clk-&gt;pclk_sel) {</div><div class='del'>-		list_add(&amp;clk-&gt;sibling, &amp;root_clks);</div><div class='del'>-	} else if (clk-&gt;pclk &amp;&amp; !clk-&gt;pclk_sel) {</div><div class='del'>-		/* add clocks with only one parent to parent's children list */</div><div class='del'>-		list_add(&amp;clk-&gt;sibling, &amp;clk-&gt;pclk-&gt;children);</div><div class='del'>-	} else {</div><div class='del'>-		/* clocks with more than one parent */</div><div class='del'>-		struct pclk_info *pclk_info;</div><div class='del'>-</div><div class='del'>-		pclk_info = pclk_info_get(clk);</div><div class='del'>-		if (!pclk_info) {</div><div class='del'>-			pr_err("CLKDEV: invalid pclk info of clk with"</div><div class='del'>-					" %s dev_id and %s con_id\n",</div><div class='del'>-					cl-&gt;dev_id, cl-&gt;con_id);</div><div class='del'>-		} else {</div><div class='del'>-			clk-&gt;pclk = pclk_info-&gt;pclk;</div><div class='del'>-			list_add(&amp;clk-&gt;sibling, &amp;pclk_info-&gt;pclk-&gt;children);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;clocks_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* debugfs specific */</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-	list_add(&amp;clk-&gt;node, &amp;clocks);</div><div class='del'>-	clk-&gt;cl = cl;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* add clock to arm clockdev framework */</div><div class='del'>-	clkdev_add(cl);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * propagate_rate - recalculate and propagate all clocks to children</div><div class='del'>- * @pclk: parent clock required to be propogated</div><div class='del'>- * @on_init: flag for enabling clocks which are ENABLED_ON_INIT.</div><div class='del'>- *</div><div class='del'>- * Recalculates all children clocks</div><div class='del'>- */</div><div class='del'>-void propagate_rate(struct clk *pclk, int on_init)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk, *_temp;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(clk, _temp, &amp;pclk-&gt;children, sibling) {</div><div class='del'>-		if (clk-&gt;recalc) {</div><div class='del'>-			ret = clk-&gt;recalc(clk);</div><div class='del'>-			/*</div><div class='del'>-			 * recalc will return error if clk out is not programmed</div><div class='del'>-			 * In this case configure default rate.</div><div class='del'>-			 */</div><div class='del'>-			if (ret &amp;&amp; clk-&gt;set_rate)</div><div class='del'>-				clk-&gt;set_rate(clk, 0);</div><div class='del'>-		}</div><div class='del'>-		propagate_rate(clk, on_init);</div><div class='del'>-</div><div class='del'>-		if (!on_init)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* Enable clks enabled on init, in software view */</div><div class='del'>-		if (clk-&gt;flags &amp; ENABLED_ON_INIT)</div><div class='del'>-			do_clk_enable(clk);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * round_rate_index - return closest programmable rate index in rate_config tbl</div><div class='del'>- * @clk: ptr to clock structure</div><div class='del'>- * @drate: desired rate</div><div class='del'>- * @rate: final rate will be returned in this variable only.</div><div class='del'>- *</div><div class='del'>- * Finds index in rate_config for highest clk rate which is less than</div><div class='del'>- * requested rate. If there is no clk rate lesser than requested rate then</div><div class='del'>- * -EINVAL is returned. This routine assumes that rate_config is written</div><div class='del'>- * in incrementing order of clk rates.</div><div class='del'>- * If drate passed is zero then default rate is programmed.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-round_rate_index(struct clk *clk, unsigned long drate, unsigned long *rate)</div><div class='del'>-{</div><div class='del'>-	unsigned long tmp = 0, prev_rate = 0;</div><div class='del'>-	int index;</div><div class='del'>-</div><div class='del'>-	if (!clk-&gt;calc_rate)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (!drate)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * This loops ends on two conditions:</div><div class='del'>-	 * - as soon as clk is found with rate greater than requested rate.</div><div class='del'>-	 * - if all clks in rate_config are smaller than requested rate.</div><div class='del'>-	 */</div><div class='del'>-	for (index = 0; index &lt; clk-&gt;rate_config.count; index++) {</div><div class='del'>-		prev_rate = tmp;</div><div class='del'>-		tmp = clk-&gt;calc_rate(clk, index);</div><div class='del'>-		if (drate &lt; tmp) {</div><div class='del'>-			index--;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	/* return if can't find suitable clock */</div><div class='del'>-	if (index &lt; 0) {</div><div class='del'>-		index = -EINVAL;</div><div class='del'>-		*rate = 0;</div><div class='del'>-	} else if (index == clk-&gt;rate_config.count) {</div><div class='del'>-		/* program with highest clk rate possible */</div><div class='del'>-		index = clk-&gt;rate_config.count - 1;</div><div class='del'>-		*rate = tmp;</div><div class='del'>-	} else</div><div class='del'>-		*rate = prev_rate;</div><div class='del'>-</div><div class='del'>-	return index;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * clk_round_rate - adjust a rate to the exact rate a clock can provide</div><div class='del'>- * @clk: clock source</div><div class='del'>- * @rate: desired clock rate in Hz</div><div class='del'>- *</div><div class='del'>- * Returns rounded clock rate in Hz, or negative errno.</div><div class='del'>- */</div><div class='del'>-long clk_round_rate(struct clk *clk, unsigned long drate)</div><div class='del'>-{</div><div class='del'>-	long rate = 0;</div><div class='del'>-	int index;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * propagate call to parent who supports calc_rate. Similar approach is</div><div class='del'>-	 * used in clk_set_rate.</div><div class='del'>-	 */</div><div class='del'>-	if (!clk-&gt;calc_rate) {</div><div class='del'>-		u32 mult;</div><div class='del'>-		if (!clk-&gt;pclk)</div><div class='del'>-			return clk-&gt;rate;</div><div class='del'>-</div><div class='del'>-		mult = clk-&gt;div_factor ? clk-&gt;div_factor : 1;</div><div class='del'>-		return clk_round_rate(clk-&gt;pclk, mult * drate) / mult;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	index = round_rate_index(clk, drate, &amp;rate);</div><div class='del'>-	if (index &gt;= 0)</div><div class='del'>-		return rate;</div><div class='del'>-	else</div><div class='del'>-		return index;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_round_rate);</div><div class='del'>-</div><div class='del'>-/*All below functions are called with lock held */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Calculates pll clk rate for specific value of mode, m, n and p</div><div class='del'>- *</div><div class='del'>- * In normal mode</div><div class='del'>- * rate = (2 * M[15:8] * Fin)/(N * 2^P)</div><div class='del'>- *</div><div class='del'>- * In Dithered mode</div><div class='del'>- * rate = (2 * M[15:0] * Fin)/(256 * N * 2^P)</div><div class='del'>- */</div><div class='del'>-unsigned long pll_calc_rate(struct clk *clk, int index)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate = clk-&gt;pclk-&gt;rate;</div><div class='del'>-	struct pll_rate_tbl *tbls = clk-&gt;rate_config.tbls;</div><div class='del'>-	unsigned int mode;</div><div class='del'>-</div><div class='del'>-	mode = tbls[index].mode ? 256 : 1;</div><div class='del'>-	return (((2 * rate / 10000) * tbls[index].m) /</div><div class='del'>-			(mode * tbls[index].n * (1 &lt;&lt; tbls[index].p))) * 10000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * calculates current programmed rate of pll1</div><div class='del'>- *</div><div class='del'>- * In normal mode</div><div class='del'>- * rate = (2 * M[15:8] * Fin)/(N * 2^P)</div><div class='del'>- *</div><div class='del'>- * In Dithered mode</div><div class='del'>- * rate = (2 * M[15:0] * Fin)/(256 * N * 2^P)</div><div class='del'>- */</div><div class='del'>-int pll_clk_recalc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	struct pll_clk_config *config = clk-&gt;private_data;</div><div class='del'>-	unsigned int num = 2, den = 0, val, mode = 0;</div><div class='del'>-</div><div class='del'>-	mode = (readl(config-&gt;mode_reg) &gt;&gt; config-&gt;masks-&gt;mode_shift) &amp;</div><div class='del'>-		config-&gt;masks-&gt;mode_mask;</div><div class='del'>-</div><div class='del'>-	val = readl(config-&gt;cfg_reg);</div><div class='del'>-	/* calculate denominator */</div><div class='del'>-	den = (val &gt;&gt; config-&gt;masks-&gt;div_p_shift) &amp; config-&gt;masks-&gt;div_p_mask;</div><div class='del'>-	den = 1 &lt;&lt; den;</div><div class='del'>-	den *= (val &gt;&gt; config-&gt;masks-&gt;div_n_shift) &amp; config-&gt;masks-&gt;div_n_mask;</div><div class='del'>-</div><div class='del'>-	/* calculate numerator &amp; denominator */</div><div class='del'>-	if (!mode) {</div><div class='del'>-		/* Normal mode */</div><div class='del'>-		num *= (val &gt;&gt; config-&gt;masks-&gt;norm_fdbk_m_shift) &amp;</div><div class='del'>-			config-&gt;masks-&gt;norm_fdbk_m_mask;</div><div class='del'>-	} else {</div><div class='del'>-		/* Dithered mode */</div><div class='del'>-		num *= (val &gt;&gt; config-&gt;masks-&gt;dith_fdbk_m_shift) &amp;</div><div class='del'>-			config-&gt;masks-&gt;dith_fdbk_m_mask;</div><div class='del'>-		den *= 256;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!den)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	clk-&gt;rate = (((clk-&gt;pclk-&gt;rate/10000) * num) / den) * 10000;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Configures new clock rate of pll</div><div class='del'>- */</div><div class='del'>-int pll_clk_set_rate(struct clk *clk, unsigned long desired_rate)</div><div class='del'>-{</div><div class='del'>-	struct pll_rate_tbl *tbls = clk-&gt;rate_config.tbls;</div><div class='del'>-	struct pll_clk_config *config = clk-&gt;private_data;</div><div class='del'>-	unsigned long val, rate;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	i = round_rate_index(clk, desired_rate, &amp;rate);</div><div class='del'>-	if (i &lt; 0)</div><div class='del'>-		return i;</div><div class='del'>-</div><div class='del'>-	val = readl(config-&gt;mode_reg) &amp;</div><div class='del'>-		~(config-&gt;masks-&gt;mode_mask &lt;&lt; config-&gt;masks-&gt;mode_shift);</div><div class='del'>-	val |= (tbls[i].mode &amp; config-&gt;masks-&gt;mode_mask) &lt;&lt;</div><div class='del'>-		config-&gt;masks-&gt;mode_shift;</div><div class='del'>-	writel(val, config-&gt;mode_reg);</div><div class='del'>-</div><div class='del'>-	val = readl(config-&gt;cfg_reg) &amp;</div><div class='del'>-		~(config-&gt;masks-&gt;div_p_mask &lt;&lt; config-&gt;masks-&gt;div_p_shift);</div><div class='del'>-	val |= (tbls[i].p &amp; config-&gt;masks-&gt;div_p_mask) &lt;&lt;</div><div class='del'>-		config-&gt;masks-&gt;div_p_shift;</div><div class='del'>-	val &amp;= ~(config-&gt;masks-&gt;div_n_mask &lt;&lt; config-&gt;masks-&gt;div_n_shift);</div><div class='del'>-	val |= (tbls[i].n &amp; config-&gt;masks-&gt;div_n_mask) &lt;&lt;</div><div class='del'>-		config-&gt;masks-&gt;div_n_shift;</div><div class='del'>-	val &amp;= ~(config-&gt;masks-&gt;dith_fdbk_m_mask &lt;&lt;</div><div class='del'>-			config-&gt;masks-&gt;dith_fdbk_m_shift);</div><div class='del'>-	if (tbls[i].mode)</div><div class='del'>-		val |= (tbls[i].m &amp; config-&gt;masks-&gt;dith_fdbk_m_mask) &lt;&lt;</div><div class='del'>-			config-&gt;masks-&gt;dith_fdbk_m_shift;</div><div class='del'>-	else</div><div class='del'>-		val |= (tbls[i].m &amp; config-&gt;masks-&gt;norm_fdbk_m_mask) &lt;&lt;</div><div class='del'>-			config-&gt;masks-&gt;norm_fdbk_m_shift;</div><div class='del'>-</div><div class='del'>-	writel(val, config-&gt;cfg_reg);</div><div class='del'>-</div><div class='del'>-	clk-&gt;rate = rate;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Calculates ahb, apb clk rate for specific value of div</div><div class='del'>- */</div><div class='del'>-unsigned long bus_calc_rate(struct clk *clk, int index)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate = clk-&gt;pclk-&gt;rate;</div><div class='del'>-	struct bus_rate_tbl *tbls = clk-&gt;rate_config.tbls;</div><div class='del'>-</div><div class='del'>-	return rate / (tbls[index].div + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* calculates current programmed rate of ahb or apb bus */</div><div class='del'>-int bus_clk_recalc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	struct bus_clk_config *config = clk-&gt;private_data;</div><div class='del'>-	unsigned int div;</div><div class='del'>-</div><div class='del'>-	div = ((readl(config-&gt;reg) &gt;&gt; config-&gt;masks-&gt;shift) &amp;</div><div class='del'>-			config-&gt;masks-&gt;mask) + 1;</div><div class='del'>-</div><div class='del'>-	if (!div)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	clk-&gt;rate = (unsigned long)clk-&gt;pclk-&gt;rate / div;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Configures new clock rate of AHB OR APB bus */</div><div class='del'>-int bus_clk_set_rate(struct clk *clk, unsigned long desired_rate)</div><div class='del'>-{</div><div class='del'>-	struct bus_rate_tbl *tbls = clk-&gt;rate_config.tbls;</div><div class='del'>-	struct bus_clk_config *config = clk-&gt;private_data;</div><div class='del'>-	unsigned long val, rate;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	i = round_rate_index(clk, desired_rate, &amp;rate);</div><div class='del'>-	if (i &lt; 0)</div><div class='del'>-		return i;</div><div class='del'>-</div><div class='del'>-	val = readl(config-&gt;reg) &amp;</div><div class='del'>-		~(config-&gt;masks-&gt;mask &lt;&lt; config-&gt;masks-&gt;shift);</div><div class='del'>-	val |= (tbls[i].div &amp; config-&gt;masks-&gt;mask) &lt;&lt; config-&gt;masks-&gt;shift;</div><div class='del'>-	writel(val, config-&gt;reg);</div><div class='del'>-</div><div class='del'>-	clk-&gt;rate = rate;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * gives rate for different values of eq, x and y</div><div class='del'>- *</div><div class='del'>- * Fout from synthesizer can be given from two equations:</div><div class='del'>- * Fout1 = (Fin * X/Y)/2		EQ1</div><div class='del'>- * Fout2 = Fin * X/Y			EQ2</div><div class='del'>- */</div><div class='del'>-unsigned long aux_calc_rate(struct clk *clk, int index)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate = clk-&gt;pclk-&gt;rate;</div><div class='del'>-	struct aux_rate_tbl *tbls = clk-&gt;rate_config.tbls;</div><div class='del'>-	u8 eq = tbls[index].eq ? 1 : 2;</div><div class='del'>-</div><div class='del'>-	return (((rate/10000) * tbls[index].xscale) /</div><div class='del'>-			(tbls[index].yscale * eq)) * 10000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * calculates current programmed rate of auxiliary synthesizers</div><div class='del'>- * used by: UART, FIRDA</div><div class='del'>- *</div><div class='del'>- * Fout from synthesizer can be given from two equations:</div><div class='del'>- * Fout1 = (Fin * X/Y)/2</div><div class='del'>- * Fout2 = Fin * X/Y</div><div class='del'>- *</div><div class='del'>- * Selection of eqn 1 or 2 is programmed in register</div><div class='del'>- */</div><div class='del'>-int aux_clk_recalc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	struct aux_clk_config *config = clk-&gt;private_data;</div><div class='del'>-	unsigned int num = 1, den = 1, val, eqn;</div><div class='del'>-</div><div class='del'>-	val = readl(config-&gt;synth_reg);</div><div class='del'>-</div><div class='del'>-	eqn = (val &gt;&gt; config-&gt;masks-&gt;eq_sel_shift) &amp;</div><div class='del'>-		config-&gt;masks-&gt;eq_sel_mask;</div><div class='del'>-	if (eqn == config-&gt;masks-&gt;eq1_mask)</div><div class='del'>-		den *= 2;</div><div class='del'>-</div><div class='del'>-	/* calculate numerator */</div><div class='del'>-	num = (val &gt;&gt; config-&gt;masks-&gt;xscale_sel_shift) &amp;</div><div class='del'>-		config-&gt;masks-&gt;xscale_sel_mask;</div><div class='del'>-</div><div class='del'>-	/* calculate denominator */</div><div class='del'>-	den *= (val &gt;&gt; config-&gt;masks-&gt;yscale_sel_shift) &amp;</div><div class='del'>-		config-&gt;masks-&gt;yscale_sel_mask;</div><div class='del'>-</div><div class='del'>-	if (!den)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	clk-&gt;rate = (((clk-&gt;pclk-&gt;rate/10000) * num) / den) * 10000;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Configures new clock rate of auxiliary synthesizers used by: UART, FIRDA*/</div><div class='del'>-int aux_clk_set_rate(struct clk *clk, unsigned long desired_rate)</div><div class='del'>-{</div><div class='del'>-	struct aux_rate_tbl *tbls = clk-&gt;rate_config.tbls;</div><div class='del'>-	struct aux_clk_config *config = clk-&gt;private_data;</div><div class='del'>-	unsigned long val, rate;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	i = round_rate_index(clk, desired_rate, &amp;rate);</div><div class='del'>-	if (i &lt; 0)</div><div class='del'>-		return i;</div><div class='del'>-</div><div class='del'>-	val = readl(config-&gt;synth_reg) &amp;</div><div class='del'>-		~(config-&gt;masks-&gt;eq_sel_mask &lt;&lt; config-&gt;masks-&gt;eq_sel_shift);</div><div class='del'>-	val |= (tbls[i].eq &amp; config-&gt;masks-&gt;eq_sel_mask) &lt;&lt;</div><div class='del'>-		config-&gt;masks-&gt;eq_sel_shift;</div><div class='del'>-	val &amp;= ~(config-&gt;masks-&gt;xscale_sel_mask &lt;&lt;</div><div class='del'>-			config-&gt;masks-&gt;xscale_sel_shift);</div><div class='del'>-	val |= (tbls[i].xscale &amp; config-&gt;masks-&gt;xscale_sel_mask) &lt;&lt;</div><div class='del'>-		config-&gt;masks-&gt;xscale_sel_shift;</div><div class='del'>-	val &amp;= ~(config-&gt;masks-&gt;yscale_sel_mask &lt;&lt;</div><div class='del'>-			config-&gt;masks-&gt;yscale_sel_shift);</div><div class='del'>-	val |= (tbls[i].yscale &amp; config-&gt;masks-&gt;yscale_sel_mask) &lt;&lt;</div><div class='del'>-		config-&gt;masks-&gt;yscale_sel_shift;</div><div class='del'>-	writel(val, config-&gt;synth_reg);</div><div class='del'>-</div><div class='del'>-	clk-&gt;rate = rate;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Calculates gpt clk rate for different values of mscale and nscale</div><div class='del'>- *</div><div class='del'>- * Fout= Fin/((2 ^ (N+1)) * (M+1))</div><div class='del'>- */</div><div class='del'>-unsigned long gpt_calc_rate(struct clk *clk, int index)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate = clk-&gt;pclk-&gt;rate;</div><div class='del'>-	struct gpt_rate_tbl *tbls = clk-&gt;rate_config.tbls;</div><div class='del'>-</div><div class='del'>-	return rate / ((1 &lt;&lt; (tbls[index].nscale + 1)) *</div><div class='del'>-			(tbls[index].mscale + 1));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * calculates current programmed rate of gpt synthesizers</div><div class='del'>- * Fout from synthesizer can be given from below equations:</div><div class='del'>- * Fout= Fin/((2 ^ (N+1)) * (M+1))</div><div class='del'>- */</div><div class='del'>-int gpt_clk_recalc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	struct gpt_clk_config *config = clk-&gt;private_data;</div><div class='del'>-	unsigned int div = 1, val;</div><div class='del'>-</div><div class='del'>-	val = readl(config-&gt;synth_reg);</div><div class='del'>-	div += (val &gt;&gt; config-&gt;masks-&gt;mscale_sel_shift) &amp;</div><div class='del'>-		config-&gt;masks-&gt;mscale_sel_mask;</div><div class='del'>-	div *= 1 &lt;&lt; (((val &gt;&gt; config-&gt;masks-&gt;nscale_sel_shift) &amp;</div><div class='del'>-				config-&gt;masks-&gt;nscale_sel_mask) + 1);</div><div class='del'>-</div><div class='del'>-	if (!div)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	clk-&gt;rate = (unsigned long)clk-&gt;pclk-&gt;rate / div;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Configures new clock rate of gptiliary synthesizers used by: UART, FIRDA*/</div><div class='del'>-int gpt_clk_set_rate(struct clk *clk, unsigned long desired_rate)</div><div class='del'>-{</div><div class='del'>-	struct gpt_rate_tbl *tbls = clk-&gt;rate_config.tbls;</div><div class='del'>-	struct gpt_clk_config *config = clk-&gt;private_data;</div><div class='del'>-	unsigned long val, rate;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	i = round_rate_index(clk, desired_rate, &amp;rate);</div><div class='del'>-	if (i &lt; 0)</div><div class='del'>-		return i;</div><div class='del'>-</div><div class='del'>-	val = readl(config-&gt;synth_reg) &amp; ~(config-&gt;masks-&gt;mscale_sel_mask &lt;&lt;</div><div class='del'>-			config-&gt;masks-&gt;mscale_sel_shift);</div><div class='del'>-	val |= (tbls[i].mscale &amp; config-&gt;masks-&gt;mscale_sel_mask) &lt;&lt;</div><div class='del'>-		config-&gt;masks-&gt;mscale_sel_shift;</div><div class='del'>-	val &amp;= ~(config-&gt;masks-&gt;nscale_sel_mask &lt;&lt;</div><div class='del'>-			config-&gt;masks-&gt;nscale_sel_shift);</div><div class='del'>-	val |= (tbls[i].nscale &amp; config-&gt;masks-&gt;nscale_sel_mask) &lt;&lt;</div><div class='del'>-		config-&gt;masks-&gt;nscale_sel_shift;</div><div class='del'>-	writel(val, config-&gt;synth_reg);</div><div class='del'>-</div><div class='del'>-	clk-&gt;rate = rate;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Calculates clcd clk rate for different values of div</div><div class='del'>- *</div><div class='del'>- * Fout from synthesizer can be given from below equation:</div><div class='del'>- * Fout= Fin/2*div (division factor)</div><div class='del'>- * div is 17 bits:-</div><div class='del'>- *	0-13 (fractional part)</div><div class='del'>- *	14-16 (integer part)</div><div class='del'>- * To calculate Fout we left shift val by 14 bits and divide Fin by</div><div class='del'>- * complete div (including fractional part) and then right shift the</div><div class='del'>- * result by 14 places.</div><div class='del'>- */</div><div class='del'>-unsigned long clcd_calc_rate(struct clk *clk, int index)</div><div class='del'>-{</div><div class='del'>-	unsigned long rate = clk-&gt;pclk-&gt;rate;</div><div class='del'>-	struct clcd_rate_tbl *tbls = clk-&gt;rate_config.tbls;</div><div class='del'>-</div><div class='del'>-	rate /= 1000;</div><div class='del'>-	rate &lt;&lt;= 12;</div><div class='del'>-	rate /= (2 * tbls[index].div);</div><div class='del'>-	rate &gt;&gt;= 12;</div><div class='del'>-	rate *= 1000;</div><div class='del'>-</div><div class='del'>-	return rate;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * calculates current programmed rate of clcd synthesizer</div><div class='del'>- * Fout from synthesizer can be given from below equation:</div><div class='del'>- * Fout= Fin/2*div (division factor)</div><div class='del'>- * div is 17 bits:-</div><div class='del'>- *	0-13 (fractional part)</div><div class='del'>- *	14-16 (integer part)</div><div class='del'>- * To calculate Fout we left shift val by 14 bits and divide Fin by</div><div class='del'>- * complete div (including fractional part) and then right shift the</div><div class='del'>- * result by 14 places.</div><div class='del'>- */</div><div class='del'>-int clcd_clk_recalc(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	struct clcd_clk_config *config = clk-&gt;private_data;</div><div class='del'>-	unsigned int div = 1;</div><div class='del'>-	unsigned long prate;</div><div class='del'>-	unsigned int val;</div><div class='del'>-</div><div class='del'>-	val = readl(config-&gt;synth_reg);</div><div class='del'>-	div = (val &gt;&gt; config-&gt;masks-&gt;div_factor_shift) &amp;</div><div class='del'>-		config-&gt;masks-&gt;div_factor_mask;</div><div class='del'>-</div><div class='del'>-	if (!div)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	prate = clk-&gt;pclk-&gt;rate / 1000; /* first level division, make it KHz */</div><div class='del'>-</div><div class='del'>-	clk-&gt;rate = (((unsigned long)prate &lt;&lt; 12) / (2 * div)) &gt;&gt; 12;</div><div class='del'>-	clk-&gt;rate *= 1000;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Configures new clock rate of auxiliary synthesizers used by: UART, FIRDA*/</div><div class='del'>-int clcd_clk_set_rate(struct clk *clk, unsigned long desired_rate)</div><div class='del'>-{</div><div class='del'>-	struct clcd_rate_tbl *tbls = clk-&gt;rate_config.tbls;</div><div class='del'>-	struct clcd_clk_config *config = clk-&gt;private_data;</div><div class='del'>-	unsigned long val, rate;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	i = round_rate_index(clk, desired_rate, &amp;rate);</div><div class='del'>-	if (i &lt; 0)</div><div class='del'>-		return i;</div><div class='del'>-</div><div class='del'>-	val = readl(config-&gt;synth_reg) &amp; ~(config-&gt;masks-&gt;div_factor_mask &lt;&lt;</div><div class='del'>-			config-&gt;masks-&gt;div_factor_shift);</div><div class='del'>-	val |= (tbls[i].div &amp; config-&gt;masks-&gt;div_factor_mask) &lt;&lt;</div><div class='del'>-		config-&gt;masks-&gt;div_factor_shift;</div><div class='del'>-	writel(val, config-&gt;synth_reg);</div><div class='del'>-</div><div class='del'>-	clk-&gt;rate = rate;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Used for clocks that always have value as the parent clock divided by a</div><div class='del'>- * fixed divisor</div><div class='del'>- */</div><div class='del'>-int follow_parent(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	unsigned int div_factor = (clk-&gt;div_factor &lt; 1) ? 1 : clk-&gt;div_factor;</div><div class='del'>-</div><div class='del'>-	clk-&gt;rate = clk-&gt;pclk-&gt;rate/div_factor;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * recalc_root_clocks - recalculate and propagate all root clocks</div><div class='del'>- *</div><div class='del'>- * Recalculates all root clocks (clocks with no parent), which if the</div><div class='del'>- * clock's .recalc is set correctly, should also propagate their rates.</div><div class='del'>- */</div><div class='del'>-void recalc_root_clocks(void)</div><div class='del'>-{</div><div class='del'>-	struct clk *pclk;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;clocks_lock, flags);</div><div class='del'>-	list_for_each_entry(pclk, &amp;root_clks, sibling) {</div><div class='del'>-		if (pclk-&gt;recalc) {</div><div class='del'>-			ret = pclk-&gt;recalc(pclk);</div><div class='del'>-			/*</div><div class='del'>-			 * recalc will return error if clk out is not programmed</div><div class='del'>-			 * In this case configure default clock.</div><div class='del'>-			 */</div><div class='del'>-			if (ret &amp;&amp; pclk-&gt;set_rate)</div><div class='del'>-				pclk-&gt;set_rate(pclk, 0);</div><div class='del'>-		}</div><div class='del'>-		propagate_rate(pclk, 1);</div><div class='del'>-		/* Enable clks enabled on init, in software view */</div><div class='del'>-		if (pclk-&gt;flags &amp; ENABLED_ON_INIT)</div><div class='del'>-			do_clk_enable(pclk);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;clocks_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init clk_init(void)</div><div class='del'>-{</div><div class='del'>-	recalc_root_clocks();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-/*</div><div class='del'>- *	debugfs support to trace clock tree hierarchy and attributes</div><div class='del'>- */</div><div class='del'>-static struct dentry *clk_debugfs_root;</div><div class='del'>-static int clk_debugfs_register_one(struct clk *c)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	struct dentry *d;</div><div class='del'>-	struct clk *pa = c-&gt;pclk;</div><div class='del'>-	char s[255];</div><div class='del'>-	char *p = s;</div><div class='del'>-</div><div class='del'>-	if (c) {</div><div class='del'>-		if (c-&gt;cl-&gt;con_id)</div><div class='del'>-			p += sprintf(p, "%s", c-&gt;cl-&gt;con_id);</div><div class='del'>-		if (c-&gt;cl-&gt;dev_id)</div><div class='del'>-			p += sprintf(p, "%s", c-&gt;cl-&gt;dev_id);</div><div class='del'>-	}</div><div class='del'>-	d = debugfs_create_dir(s, pa ? pa-&gt;dent : clk_debugfs_root);</div><div class='del'>-	if (!d)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	c-&gt;dent = d;</div><div class='del'>-</div><div class='del'>-	d = debugfs_create_u32("usage_count", S_IRUGO, c-&gt;dent,</div><div class='del'>-			(u32 *)&amp;c-&gt;usage_count);</div><div class='del'>-	if (!d) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_out;</div><div class='del'>-	}</div><div class='del'>-	d = debugfs_create_u32("rate", S_IRUGO, c-&gt;dent, (u32 *)&amp;c-&gt;rate);</div><div class='del'>-	if (!d) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_out;</div><div class='del'>-	}</div><div class='del'>-	d = debugfs_create_x32("flags", S_IRUGO, c-&gt;dent, (u32 *)&amp;c-&gt;flags);</div><div class='del'>-	if (!d) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_out;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_out:</div><div class='del'>-	debugfs_remove_recursive(c-&gt;dent);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int clk_debugfs_register(struct clk *c)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	struct clk *pa = c-&gt;pclk;</div><div class='del'>-</div><div class='del'>-	if (pa &amp;&amp; !pa-&gt;dent) {</div><div class='del'>-		err = clk_debugfs_register(pa);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!c-&gt;dent) {</div><div class='del'>-		err = clk_debugfs_register_one(c);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init clk_debugfs_init(void)</div><div class='del'>-{</div><div class='del'>-	struct clk *c;</div><div class='del'>-	struct dentry *d;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	d = debugfs_create_dir("clock", NULL);</div><div class='del'>-	if (!d)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	clk_debugfs_root = d;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(c, &amp;clocks, node) {</div><div class='del'>-		err = clk_debugfs_register(c);</div><div class='del'>-		if (err)</div><div class='del'>-			goto err_out;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-err_out:</div><div class='del'>-	debugfs_remove_recursive(clk_debugfs_root);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-late_initcall(clk_debugfs_init);</div><div class='del'>-</div><div class='del'>-static int clk_debugfs_reparent(struct clk *c)</div><div class='del'>-{</div><div class='del'>-	debugfs_remove(c-&gt;dent);</div><div class='del'>-	return clk_debugfs_register_one(c);</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_DEBUG_FS */</div><div class='head'>diff --git a/arch/arm/plat-spear/include/plat/clock.h b/arch/arm/plat-spear/include/plat/clock.h<br/>deleted file mode 100644<br/>index 0062bafef12d..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-spear/include/plat/clock.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-spear/include/plat/clock.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,249 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/plat-spear/include/plat/clock.h</div><div class='del'>- *</div><div class='del'>- * Clock framework definitions for SPEAr platform</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __PLAT_CLOCK_H</div><div class='del'>-#define __PLAT_CLOCK_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/clkdev.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-</div><div class='del'>-/* clk structure flags */</div><div class='del'>-#define	ALWAYS_ENABLED		(1 &lt;&lt; 0) /* clock always enabled */</div><div class='del'>-#define	RESET_TO_ENABLE		(1 &lt;&lt; 1) /* reset register bit to enable clk */</div><div class='del'>-#define	ENABLED_ON_INIT		(1 &lt;&lt; 2) /* clocks enabled at init */</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct clkops - clock operations</div><div class='del'>- * @enable: pointer to clock enable function</div><div class='del'>- * @disable: pointer to clock disable function</div><div class='del'>- */</div><div class='del'>-struct clkops {</div><div class='del'>-	int (*enable) (struct clk *);</div><div class='del'>-	void (*disable) (struct clk *);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct pclk_info - parents info</div><div class='del'>- * @pclk: pointer to parent clk</div><div class='del'>- * @pclk_val: value to be written for selecting this parent</div><div class='del'>- */</div><div class='del'>-struct pclk_info {</div><div class='del'>-	struct clk *pclk;</div><div class='del'>-	u8 pclk_val;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct pclk_sel - parents selection configuration</div><div class='del'>- * @pclk_info: pointer to array of parent clock info</div><div class='del'>- * @pclk_count: number of parents</div><div class='del'>- * @pclk_sel_reg: register for selecting a parent</div><div class='del'>- * @pclk_sel_mask: mask for selecting parent (can be used to clear bits also)</div><div class='del'>- */</div><div class='del'>-struct pclk_sel {</div><div class='del'>-	struct pclk_info *pclk_info;</div><div class='del'>-	u8 pclk_count;</div><div class='del'>-	void __iomem *pclk_sel_reg;</div><div class='del'>-	unsigned int pclk_sel_mask;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct rate_config - clk rate configurations</div><div class='del'>- * @tbls: array of device specific clk rate tables, in ascending order of rates</div><div class='del'>- * @count: size of tbls array</div><div class='del'>- * @default_index: default setting when originally disabled</div><div class='del'>- */</div><div class='del'>-struct rate_config {</div><div class='del'>-	void *tbls;</div><div class='del'>-	u8 count;</div><div class='del'>-	u8 default_index;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct clk - clock structure</div><div class='del'>- * @usage_count: num of users who enabled this clock</div><div class='del'>- * @flags: flags for clock properties</div><div class='del'>- * @rate: programmed clock rate in Hz</div><div class='del'>- * @en_reg: clk enable/disable reg</div><div class='del'>- * @en_reg_bit: clk enable/disable bit</div><div class='del'>- * @ops: clk enable/disable ops - generic_clkops selected if NULL</div><div class='del'>- * @recalc: pointer to clock rate recalculate function</div><div class='del'>- * @set_rate: pointer to clock set rate function</div><div class='del'>- * @calc_rate: pointer to clock get rate function for index</div><div class='del'>- * @rate_config: rate configuration information, used by set_rate</div><div class='del'>- * @div_factor: division factor to parent clock.</div><div class='del'>- * @pclk: current parent clk</div><div class='del'>- * @pclk_sel: pointer to parent selection structure</div><div class='del'>- * @pclk_sel_shift: register shift for selecting parent of this clock</div><div class='del'>- * @children: list for childrens or this clock</div><div class='del'>- * @sibling: node for list of clocks having same parents</div><div class='del'>- * @private_data: clock specific private data</div><div class='del'>- * @node: list to maintain clocks linearly</div><div class='del'>- * @cl: clocklook up associated with this clock</div><div class='del'>- * @dent: object for debugfs</div><div class='del'>- */</div><div class='del'>-struct clk {</div><div class='del'>-	unsigned int usage_count;</div><div class='del'>-	unsigned int flags;</div><div class='del'>-	unsigned long rate;</div><div class='del'>-	void __iomem *en_reg;</div><div class='del'>-	u8 en_reg_bit;</div><div class='del'>-	const struct clkops *ops;</div><div class='del'>-	int (*recalc) (struct clk *);</div><div class='del'>-	int (*set_rate) (struct clk *, unsigned long rate);</div><div class='del'>-	unsigned long (*calc_rate)(struct clk *, int index);</div><div class='del'>-	struct rate_config rate_config;</div><div class='del'>-	unsigned int div_factor;</div><div class='del'>-</div><div class='del'>-	struct clk *pclk;</div><div class='del'>-	struct pclk_sel *pclk_sel;</div><div class='del'>-	unsigned int pclk_sel_shift;</div><div class='del'>-</div><div class='del'>-	struct list_head children;</div><div class='del'>-	struct list_head sibling;</div><div class='del'>-	void *private_data;</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-	struct list_head node;</div><div class='del'>-	struct clk_lookup *cl;</div><div class='del'>-	struct dentry *dent;</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* pll configuration structure */</div><div class='del'>-struct pll_clk_masks {</div><div class='del'>-	u32 mode_mask;</div><div class='del'>-	u32 mode_shift;</div><div class='del'>-</div><div class='del'>-	u32 norm_fdbk_m_mask;</div><div class='del'>-	u32 norm_fdbk_m_shift;</div><div class='del'>-	u32 dith_fdbk_m_mask;</div><div class='del'>-	u32 dith_fdbk_m_shift;</div><div class='del'>-	u32 div_p_mask;</div><div class='del'>-	u32 div_p_shift;</div><div class='del'>-	u32 div_n_mask;</div><div class='del'>-	u32 div_n_shift;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pll_clk_config {</div><div class='del'>-	void __iomem *mode_reg;</div><div class='del'>-	void __iomem *cfg_reg;</div><div class='del'>-	struct pll_clk_masks *masks;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* pll clk rate config structure */</div><div class='del'>-struct pll_rate_tbl {</div><div class='del'>-	u8 mode;</div><div class='del'>-	u16 m;</div><div class='del'>-	u8 n;</div><div class='del'>-	u8 p;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ahb and apb bus configuration structure */</div><div class='del'>-struct bus_clk_masks {</div><div class='del'>-	u32 mask;</div><div class='del'>-	u32 shift;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct bus_clk_config {</div><div class='del'>-	void __iomem *reg;</div><div class='del'>-	struct bus_clk_masks *masks;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ahb and apb clk bus rate config structure */</div><div class='del'>-struct bus_rate_tbl {</div><div class='del'>-	u8 div;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Aux clk configuration structure: applicable to UART and FIRDA */</div><div class='del'>-struct aux_clk_masks {</div><div class='del'>-	u32 eq_sel_mask;</div><div class='del'>-	u32 eq_sel_shift;</div><div class='del'>-	u32 eq1_mask;</div><div class='del'>-	u32 eq2_mask;</div><div class='del'>-	u32 xscale_sel_mask;</div><div class='del'>-	u32 xscale_sel_shift;</div><div class='del'>-	u32 yscale_sel_mask;</div><div class='del'>-	u32 yscale_sel_shift;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct aux_clk_config {</div><div class='del'>-	void __iomem *synth_reg;</div><div class='del'>-	struct aux_clk_masks *masks;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* aux clk rate config structure */</div><div class='del'>-struct aux_rate_tbl {</div><div class='del'>-	u16 xscale;</div><div class='del'>-	u16 yscale;</div><div class='del'>-	u8 eq;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* GPT clk configuration structure */</div><div class='del'>-struct gpt_clk_masks {</div><div class='del'>-	u32 mscale_sel_mask;</div><div class='del'>-	u32 mscale_sel_shift;</div><div class='del'>-	u32 nscale_sel_mask;</div><div class='del'>-	u32 nscale_sel_shift;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct gpt_clk_config {</div><div class='del'>-	void __iomem *synth_reg;</div><div class='del'>-	struct gpt_clk_masks *masks;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* gpt clk rate config structure */</div><div class='del'>-struct gpt_rate_tbl {</div><div class='del'>-	u16 mscale;</div><div class='del'>-	u16 nscale;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clcd clk configuration structure */</div><div class='del'>-struct clcd_synth_masks {</div><div class='del'>-	u32 div_factor_mask;</div><div class='del'>-	u32 div_factor_shift;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct clcd_clk_config {</div><div class='del'>-	void __iomem *synth_reg;</div><div class='del'>-	struct clcd_synth_masks *masks;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* clcd clk rate config structure */</div><div class='del'>-struct clcd_rate_tbl {</div><div class='del'>-	u16 div;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* platform specific clock functions */</div><div class='del'>-void __init clk_init(void);</div><div class='del'>-void clk_register(struct clk_lookup *cl);</div><div class='del'>-void recalc_root_clocks(void);</div><div class='del'>-</div><div class='del'>-/* clock recalc &amp; set rate functions */</div><div class='del'>-int follow_parent(struct clk *clk);</div><div class='del'>-unsigned long pll_calc_rate(struct clk *clk, int index);</div><div class='del'>-int pll_clk_recalc(struct clk *clk);</div><div class='del'>-int pll_clk_set_rate(struct clk *clk, unsigned long desired_rate);</div><div class='del'>-unsigned long bus_calc_rate(struct clk *clk, int index);</div><div class='del'>-int bus_clk_recalc(struct clk *clk);</div><div class='del'>-int bus_clk_set_rate(struct clk *clk, unsigned long desired_rate);</div><div class='del'>-unsigned long gpt_calc_rate(struct clk *clk, int index);</div><div class='del'>-int gpt_clk_recalc(struct clk *clk);</div><div class='del'>-int gpt_clk_set_rate(struct clk *clk, unsigned long desired_rate);</div><div class='del'>-unsigned long aux_calc_rate(struct clk *clk, int index);</div><div class='del'>-int aux_clk_recalc(struct clk *clk);</div><div class='del'>-int aux_clk_set_rate(struct clk *clk, unsigned long desired_rate);</div><div class='del'>-unsigned long clcd_calc_rate(struct clk *clk, int index);</div><div class='del'>-int clcd_clk_recalc(struct clk *clk);</div><div class='del'>-int clcd_clk_set_rate(struct clk *clk, unsigned long desired_rate);</div><div class='del'>-</div><div class='del'>-#endif /* __PLAT_CLOCK_H */</div><div class='head'>diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S<br/>index 02b160a1ec9b..ab3de721c5db 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-spear/include/plat/debug-macro.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-spear/include/plat/debug-macro.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-spear/include/plat/debug-macro.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/include/plat/debug-macro.S</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/amba/serial.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='ctx'> </div><div class='ctx'> 		.macro	addruart, rp, rv, tmp</div><div class='ctx'> 		mov	\rp, #SPEAR_DBG_UART_BASE		@ Physical base</div><div class='head'>diff --git a/arch/arm/plat-spear/include/plat/hardware.h b/arch/arm/plat-spear/include/plat/hardware.h<br/>deleted file mode 100644<br/>index 70187d763e26..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-spear/include/plat/hardware.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-spear/include/plat/hardware.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/plat-spear/include/plat/hardware.h</div><div class='del'>- *</div><div class='del'>- * Hardware definitions for SPEAr</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __PLAT_HARDWARE_H</div><div class='del'>-#define __PLAT_HARDWARE_H</div><div class='del'>-</div><div class='del'>-#endif /* __PLAT_HARDWARE_H */</div><div class='head'>diff --git a/arch/arm/plat-spear/include/plat/padmux.h b/arch/arm/plat-spear/include/plat/padmux.h<br/>deleted file mode 100644<br/>index 877f3adcf610..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-spear/include/plat/padmux.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-spear/include/plat/padmux.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,92 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/plat-spear/include/plat/padmux.h</div><div class='del'>- *</div><div class='del'>- * SPEAr platform specific gpio pads muxing file</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __PLAT_PADMUX_H</div><div class='del'>-#define __PLAT_PADMUX_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * struct pmx_reg: configuration structure for mode reg and mux reg</div><div class='del'>- *</div><div class='del'>- * offset: offset of mode reg</div><div class='del'>- * mask: mask of mode reg</div><div class='del'>- */</div><div class='del'>-struct pmx_reg {</div><div class='del'>-	u32 offset;</div><div class='del'>-	u32 mask;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * struct pmx_dev_mode: configuration structure every group of modes of a device</div><div class='del'>- *</div><div class='del'>- * ids: all modes for this configuration</div><div class='del'>- * mask: mask for supported mode</div><div class='del'>- */</div><div class='del'>-struct pmx_dev_mode {</div><div class='del'>-	u32 ids;</div><div class='del'>-	u32 mask;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * struct pmx_mode: mode definition structure</div><div class='del'>- *</div><div class='del'>- * name: mode name</div><div class='del'>- * mask: mode mask</div><div class='del'>- */</div><div class='del'>-struct pmx_mode {</div><div class='del'>-	char *name;</div><div class='del'>-	u32 id;</div><div class='del'>-	u32 mask;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * struct pmx_dev: device definition structure</div><div class='del'>- *</div><div class='del'>- * name: device name</div><div class='del'>- * modes: device configuration array for different modes supported</div><div class='del'>- * mode_count: size of modes array</div><div class='del'>- * is_active: is peripheral active/enabled</div><div class='del'>- * enb_on_reset: if 1, mask bits to be cleared in reg otherwise to be set in reg</div><div class='del'>- */</div><div class='del'>-struct pmx_dev {</div><div class='del'>-	char *name;</div><div class='del'>-	struct pmx_dev_mode *modes;</div><div class='del'>-	u8 mode_count;</div><div class='del'>-	bool is_active;</div><div class='del'>-	bool enb_on_reset;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * struct pmx_driver: driver definition structure</div><div class='del'>- *</div><div class='del'>- * mode: mode to be set</div><div class='del'>- * devs: array of pointer to pmx devices</div><div class='del'>- * devs_count: ARRAY_SIZE of devs</div><div class='del'>- * base: base address of soc config registers</div><div class='del'>- * mode_reg: structure of mode config register</div><div class='del'>- * mux_reg: structure of device mux config register</div><div class='del'>- */</div><div class='del'>-struct pmx_driver {</div><div class='del'>-	struct pmx_mode *mode;</div><div class='del'>-	struct pmx_dev **devs;</div><div class='del'>-	u8 devs_count;</div><div class='del'>-	u32 *base;</div><div class='del'>-	struct pmx_reg mode_reg;</div><div class='del'>-	struct pmx_reg mux_reg;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* pmx functions */</div><div class='del'>-int pmx_register(struct pmx_driver *driver);</div><div class='del'>-</div><div class='del'>-#endif /* __PLAT_PADMUX_H */</div><div class='head'>diff --git a/arch/arm/plat-spear/include/plat/pl080.h b/arch/arm/plat-spear/include/plat/pl080.h<br/>new file mode 100644<br/>index 000000000000..e14a3e4932f9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-spear/include/plat/pl080.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/include/plat/pl080.h</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/plat-spear/include/plat/pl080.h</div><div class='add'>+ *</div><div class='add'>+ * DMAC pl080 definitions for SPEAr platform</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __PLAT_PL080_H</div><div class='add'>+#define __PLAT_PL080_H</div><div class='add'>+</div><div class='add'>+struct pl08x_dma_chan;</div><div class='add'>+int pl080_get_signal(struct pl08x_dma_chan *ch);</div><div class='add'>+void pl080_put_signal(struct pl08x_dma_chan *ch);</div><div class='add'>+</div><div class='add'>+#endif /* __PLAT_PL080_H */</div><div class='head'>diff --git a/arch/arm/plat-spear/include/plat/uncompress.h b/arch/arm/plat-spear/include/plat/uncompress.h<br/>index 1bf84527aee4..6dd455bafdfd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-spear/include/plat/uncompress.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-spear/include/plat/uncompress.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-spear/include/plat/uncompress.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/include/plat/uncompress.h</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/amba/serial.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifndef __PLAT_UNCOMPRESS_H</div><div class='ctx'> #define __PLAT_UNCOMPRESS_H</div><div class='head'>diff --git a/arch/arm/plat-spear/padmux.c b/arch/arm/plat-spear/padmux.c<br/>deleted file mode 100644<br/>index 555eec6dc1cb..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-spear/padmux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-spear/padmux.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,164 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/arm/plat-spear/include/plat/padmux.c</div><div class='del'>- *</div><div class='del'>- * SPEAr platform specific gpio pads muxing source file</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 ST Microelectronics</div><div class='del'>- * Viresh Kumar&lt;viresh.kumar@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;plat/padmux.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * struct pmx: pmx definition structure</div><div class='del'>- *</div><div class='del'>- * base: base address of configuration registers</div><div class='del'>- * mode_reg: mode configurations</div><div class='del'>- * mux_reg: muxing configurations</div><div class='del'>- * active_mode: pointer to current active mode</div><div class='del'>- */</div><div class='del'>-struct pmx {</div><div class='del'>-	u32 base;</div><div class='del'>-	struct pmx_reg mode_reg;</div><div class='del'>-	struct pmx_reg mux_reg;</div><div class='del'>-	struct pmx_mode *active_mode;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pmx *pmx;</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * pmx_mode_set - Enables an multiplexing mode</div><div class='del'>- * @mode - pointer to pmx mode</div><div class='del'>- *</div><div class='del'>- * It will set mode of operation in hardware.</div><div class='del'>- * Returns -ve on Err otherwise 0</div><div class='del'>- */</div><div class='del'>-static int pmx_mode_set(struct pmx_mode *mode)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	if (!mode-&gt;name)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	pmx-&gt;active_mode = mode;</div><div class='del'>-</div><div class='del'>-	val = readl(pmx-&gt;base + pmx-&gt;mode_reg.offset);</div><div class='del'>-	val &amp;= ~pmx-&gt;mode_reg.mask;</div><div class='del'>-	val |= mode-&gt;mask &amp; pmx-&gt;mode_reg.mask;</div><div class='del'>-	writel(val, pmx-&gt;base + pmx-&gt;mode_reg.offset);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * pmx_devs_enable - Enables list of devices</div><div class='del'>- * @devs - pointer to pmx device array</div><div class='del'>- * @count - number of devices to enable</div><div class='del'>- *</div><div class='del'>- * It will enable pads for all required peripherals once and only once.</div><div class='del'>- * If peripheral is not supported by current mode then request is rejected.</div><div class='del'>- * Conflicts between peripherals are not handled and peripherals will be</div><div class='del'>- * enabled in the order they are present in pmx_dev array.</div><div class='del'>- * In case of conflicts last peripheral enabled will be present.</div><div class='del'>- * Returns -ve on Err otherwise 0</div><div class='del'>- */</div><div class='del'>-static int pmx_devs_enable(struct pmx_dev **devs, u8 count)</div><div class='del'>-{</div><div class='del'>-	u32 val, i, mask;</div><div class='del'>-</div><div class='del'>-	if (!count)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	val = readl(pmx-&gt;base + pmx-&gt;mux_reg.offset);</div><div class='del'>-	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		u8 j = 0;</div><div class='del'>-</div><div class='del'>-		if (!devs[i]-&gt;name || !devs[i]-&gt;modes) {</div><div class='del'>-			printk(KERN_ERR "padmux: dev name or modes is null\n");</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		/* check if peripheral exists in active mode */</div><div class='del'>-		if (pmx-&gt;active_mode) {</div><div class='del'>-			bool found = false;</div><div class='del'>-			for (j = 0; j &lt; devs[i]-&gt;mode_count; j++) {</div><div class='del'>-				if (devs[i]-&gt;modes[j].ids &amp;</div><div class='del'>-						pmx-&gt;active_mode-&gt;id) {</div><div class='del'>-					found = true;</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-			if (found == false) {</div><div class='del'>-				printk(KERN_ERR "%s device not available in %s"\</div><div class='del'>-						"mode\n", devs[i]-&gt;name,</div><div class='del'>-						pmx-&gt;active_mode-&gt;name);</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* enable peripheral */</div><div class='del'>-		mask = devs[i]-&gt;modes[j].mask &amp; pmx-&gt;mux_reg.mask;</div><div class='del'>-		if (devs[i]-&gt;enb_on_reset)</div><div class='del'>-			val &amp;= ~mask;</div><div class='del'>-		else</div><div class='del'>-			val |= mask;</div><div class='del'>-</div><div class='del'>-		devs[i]-&gt;is_active = true;</div><div class='del'>-	}</div><div class='del'>-	writel(val, pmx-&gt;base + pmx-&gt;mux_reg.offset);</div><div class='del'>-	kfree(pmx);</div><div class='del'>-</div><div class='del'>-	/* this will ensure that multiplexing can't be changed now */</div><div class='del'>-	pmx = (struct pmx *)-1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * pmx_register - registers a platform requesting pad mux feature</div><div class='del'>- * @driver - pointer to driver structure containing driver specific parameters</div><div class='del'>- *</div><div class='del'>- * Also this must be called only once. This will allocate memory for pmx</div><div class='del'>- * structure, will call pmx_mode_set, will call pmx_devs_enable.</div><div class='del'>- * Returns -ve on Err otherwise 0</div><div class='del'>- */</div><div class='del'>-int pmx_register(struct pmx_driver *driver)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (pmx)</div><div class='del'>-		return -EPERM;</div><div class='del'>-	if (!driver-&gt;base || !driver-&gt;devs)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	pmx = kzalloc(sizeof(*pmx), GFP_KERNEL);</div><div class='del'>-	if (!pmx)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	pmx-&gt;base = (u32)driver-&gt;base;</div><div class='del'>-	pmx-&gt;mode_reg.offset = driver-&gt;mode_reg.offset;</div><div class='del'>-	pmx-&gt;mode_reg.mask = driver-&gt;mode_reg.mask;</div><div class='del'>-	pmx-&gt;mux_reg.offset = driver-&gt;mux_reg.offset;</div><div class='del'>-	pmx-&gt;mux_reg.mask = driver-&gt;mux_reg.mask;</div><div class='del'>-</div><div class='del'>-	/* choose mode to enable */</div><div class='del'>-	if (driver-&gt;mode) {</div><div class='del'>-		ret = pmx_mode_set(driver-&gt;mode);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto pmx_fail;</div><div class='del'>-	}</div><div class='del'>-	ret = pmx_devs_enable(driver-&gt;devs, driver-&gt;devs_count);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto pmx_fail;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-pmx_fail:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/arm/plat-spear/pl080.c b/arch/arm/plat-spear/pl080.c<br/>new file mode 100644<br/>index 000000000000..a56a067717c1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-spear/pl080.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/pl080.c</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/plat-spear/pl080.c</div><div class='add'>+ *</div><div class='add'>+ * DMAC pl080 definitions for SPEAr platform</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/amba/pl08x.h&gt;</div><div class='add'>+#include &lt;linux/amba/bus.h&gt;</div><div class='add'>+#include &lt;linux/bug.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/spinlock_types.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='add'>+#include &lt;mach/misc_regs.h&gt;</div><div class='add'>+</div><div class='add'>+static spinlock_t lock = __SPIN_LOCK_UNLOCKED(x);</div><div class='add'>+</div><div class='add'>+struct {</div><div class='add'>+	unsigned char busy;</div><div class='add'>+	unsigned char val;</div><div class='add'>+} signals[16] = {{0, 0}, };</div><div class='add'>+</div><div class='add'>+int pl080_get_signal(struct pl08x_dma_chan *ch)</div><div class='add'>+{</div><div class='add'>+	const struct pl08x_channel_data *cd = ch-&gt;cd;</div><div class='add'>+	unsigned int signal = cd-&gt;min_signal, val;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;lock, flags);</div><div class='add'>+</div><div class='add'>+	/* Return if signal is already acquired by somebody else */</div><div class='add'>+	if (signals[signal].busy &amp;&amp;</div><div class='add'>+			(signals[signal].val != cd-&gt;muxval)) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;lock, flags);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If acquiring for the first time, configure it */</div><div class='add'>+	if (!signals[signal].busy) {</div><div class='add'>+		val = readl(DMA_CHN_CFG);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Each request line has two bits in DMA_CHN_CFG register. To</div><div class='add'>+		 * goto the bits of current request line, do left shift of</div><div class='add'>+		 * value by 2 * signal number.</div><div class='add'>+		 */</div><div class='add'>+		val &amp;= ~(0x3 &lt;&lt; (signal * 2));</div><div class='add'>+		val |= cd-&gt;muxval &lt;&lt; (signal * 2);</div><div class='add'>+		writel(val, DMA_CHN_CFG);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	signals[signal].busy++;</div><div class='add'>+	signals[signal].val = cd-&gt;muxval;</div><div class='add'>+	spin_unlock_irqrestore(&amp;lock, flags);</div><div class='add'>+</div><div class='add'>+	return signal;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pl080_put_signal(struct pl08x_dma_chan *ch)</div><div class='add'>+{</div><div class='add'>+	const struct pl08x_channel_data *cd = ch-&gt;cd;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;lock, flags);</div><div class='add'>+</div><div class='add'>+	/* if signal is not used */</div><div class='add'>+	if (!signals[cd-&gt;min_signal].busy)</div><div class='add'>+		BUG();</div><div class='add'>+</div><div class='add'>+	signals[cd-&gt;min_signal].busy--;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;lock, flags);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c<br/>index 16f203e78d89..ea0a61302b7e 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-spear/restart.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-spear/restart.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-spear/restart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/restart.c</a></div><div class='hunk'>@@ -13,9 +13,10 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;asm/system_misc.h&gt;</div><div class='ctx'> #include &lt;asm/hardware/sp810.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='ctx'> #include &lt;mach/generic.h&gt;</div><div class='ctx'> </div><div class='add'>+#define SPEAR13XX_SYS_SW_RES			(VA_MISC_BASE + 0x204)</div><div class='ctx'> void spear_restart(char mode, const char *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	if (mode == 's') {</div><div class='hunk'>@@ -23,6 +24,10 @@ void spear_restart(char mode, const char *cmd)</div><div class='ctx'> 		soft_restart(0);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* hardware reset, Use on-chip reset capability */</div><div class='add'>+#ifdef CONFIG_ARCH_SPEAR13XX</div><div class='add'>+		writel_relaxed(0x01, SPEAR13XX_SYS_SW_RES);</div><div class='add'>+#else</div><div class='ctx'> 		sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);</div><div class='add'>+#endif</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c<br/>index abb5bdecd509..03321af5de9f 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-spear/time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-spear/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-spear/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-spear/time.c</a></div><div class='hunk'>@@ -15,14 +15,15 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;asm/mach/time.h&gt;</div><div class='ctx'> #include &lt;mach/generic.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/irqs.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * We would use TIMER0 and TIMER1 as clockevent and clocksource.</div><div class='hunk'>@@ -175,7 +176,7 @@ static struct irqaction spear_timer_irq = {</div><div class='ctx'> 	.handler = spear_timer_interrupt</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void __init spear_clockevent_init(void)</div><div class='add'>+static void __init spear_clockevent_init(int irq)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tick_rate;</div><div class='ctx'> </div><div class='hunk'>@@ -195,22 +196,35 @@ static void __init spear_clockevent_init(void)</div><div class='ctx'> </div><div class='ctx'> 	clockevents_register_device(&amp;clkevt);</div><div class='ctx'> </div><div class='del'>-	setup_irq(SPEAR_GPT0_CHAN0_IRQ, &amp;spear_timer_irq);</div><div class='add'>+	setup_irq(irq, &amp;spear_timer_irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init spear_setup_timer(void)</div><div class='add'>+const static struct of_device_id timer_of_match[] __initconst = {</div><div class='add'>+	{ .compatible = "st,spear-timer", },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init spear_setup_of_timer(void)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	int irq, ret;</div><div class='add'>+</div><div class='add'>+	np = of_find_matching_node(NULL, timer_of_match);</div><div class='add'>+	if (!np) {</div><div class='add'>+		pr_err("%s: No timer passed via DT\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (!request_mem_region(SPEAR_GPT0_BASE, SZ_1K, "gpt0")) {</div><div class='del'>-		pr_err("%s:cannot get IO addr\n", __func__);</div><div class='add'>+	irq = irq_of_parse_and_map(np, 0);</div><div class='add'>+	if (!irq) {</div><div class='add'>+		pr_err("%s: No irq passed for timer via DT\n", __func__);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	gpt_base = (void __iomem *)ioremap(SPEAR_GPT0_BASE, SZ_1K);</div><div class='add'>+	gpt_base = of_iomap(np, 0);</div><div class='ctx'> 	if (!gpt_base) {</div><div class='del'>-		pr_err("%s:ioremap failed for gpt\n", __func__);</div><div class='del'>-		goto err_mem;</div><div class='add'>+		pr_err("%s: of iomap failed\n", __func__);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	gpt_clk = clk_get_sys("gpt0", NULL);</div><div class='hunk'>@@ -219,21 +233,19 @@ void __init spear_setup_timer(void)</div><div class='ctx'> 		goto err_iomap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = clk_enable(gpt_clk);</div><div class='add'>+	ret = clk_prepare_enable(gpt_clk);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		pr_err("%s:couldn't enable gpt clock\n", __func__);</div><div class='del'>-		goto err_clk;</div><div class='add'>+		pr_err("%s:couldn't prepare-enable gpt clock\n", __func__);</div><div class='add'>+		goto err_prepare_enable_clk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	spear_clockevent_init();</div><div class='add'>+	spear_clockevent_init(irq);</div><div class='ctx'> 	spear_clocksource_init();</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='del'>-err_clk:</div><div class='add'>+err_prepare_enable_clk:</div><div class='ctx'> 	clk_put(gpt_clk);</div><div class='ctx'> err_iomap:</div><div class='ctx'> 	iounmap(gpt_base);</div><div class='del'>-err_mem:</div><div class='del'>-	release_mem_region(SPEAR_GPT0_BASE, SZ_1K);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/plat-versatile/Kconfig b/arch/arm/plat-versatile/Kconfig<br/>index 043f7b02a9e7..81ee7cc34457 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-versatile/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-versatile/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-versatile/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-versatile/Kconfig</a></div><div class='hunk'>@@ -5,6 +5,12 @@ config PLAT_VERSATILE_CLCD</div><div class='ctx'> </div><div class='ctx'> config PLAT_VERSATILE_FPGA_IRQ</div><div class='ctx'> 	bool</div><div class='add'>+	select IRQ_DOMAIN</div><div class='add'>+</div><div class='add'>+config PLAT_VERSATILE_FPGA_IRQ_NR</div><div class='add'>+       int</div><div class='add'>+       default 4</div><div class='add'>+       depends on PLAT_VERSATILE_FPGA_IRQ</div><div class='ctx'> </div><div class='ctx'> config PLAT_VERSATILE_LEDS</div><div class='ctx'> 	def_bool y if LEDS_CLASS</div><div class='head'>diff --git a/arch/arm/plat-versatile/fpga-irq.c b/arch/arm/plat-versatile/fpga-irq.c<br/>index f0cc8e19b094..6e70d03824a1 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-versatile/fpga-irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-versatile/fpga-irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-versatile/fpga-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-versatile/fpga-irq.c</a></div><div class='hunk'>@@ -3,7 +3,10 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/exception.h&gt;</div><div class='ctx'> #include &lt;asm/mach/irq.h&gt;</div><div class='ctx'> #include &lt;plat/fpga-irq.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -12,10 +15,32 @@</div><div class='ctx'> #define IRQ_ENABLE_SET		0x08</div><div class='ctx'> #define IRQ_ENABLE_CLEAR	0x0c</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * struct fpga_irq_data - irq data container for the FPGA IRQ controller</div><div class='add'>+ * @base: memory offset in virtual memory</div><div class='add'>+ * @irq_start: first IRQ number handled by this instance</div><div class='add'>+ * @chip: chip container for this instance</div><div class='add'>+ * @domain: IRQ domain for this instance</div><div class='add'>+ * @valid: mask for valid IRQs on this controller</div><div class='add'>+ * @used_irqs: number of active IRQs on this controller</div><div class='add'>+ */</div><div class='add'>+struct fpga_irq_data {</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	unsigned int irq_start;</div><div class='add'>+	struct irq_chip chip;</div><div class='add'>+	u32 valid;</div><div class='add'>+	struct irq_domain *domain;</div><div class='add'>+	u8 used_irqs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* we cannot allocate memory when the controllers are initially registered */</div><div class='add'>+static struct fpga_irq_data fpga_irq_devices[CONFIG_PLAT_VERSATILE_FPGA_IRQ_NR];</div><div class='add'>+static int fpga_irq_id;</div><div class='add'>+</div><div class='ctx'> static void fpga_irq_mask(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	struct fpga_irq_data *f = irq_data_get_irq_chip_data(d);</div><div class='del'>-	u32 mask = 1 &lt;&lt; (d-&gt;irq - f-&gt;irq_start);</div><div class='add'>+	u32 mask = 1 &lt;&lt; d-&gt;hwirq;</div><div class='ctx'> </div><div class='ctx'> 	writel(mask, f-&gt;base + IRQ_ENABLE_CLEAR);</div><div class='ctx'> }</div><div class='hunk'>@@ -23,7 +48,7 @@ static void fpga_irq_mask(struct irq_data *d)</div><div class='ctx'> static void fpga_irq_unmask(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	struct fpga_irq_data *f = irq_data_get_irq_chip_data(d);</div><div class='del'>-	u32 mask = 1 &lt;&lt; (d-&gt;irq - f-&gt;irq_start);</div><div class='add'>+	u32 mask = 1 &lt;&lt; d-&gt;hwirq;</div><div class='ctx'> </div><div class='ctx'> 	writel(mask, f-&gt;base + IRQ_ENABLE_SET);</div><div class='ctx'> }</div><div class='hunk'>@@ -41,32 +66,93 @@ static void fpga_irq_handle(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 	do {</div><div class='ctx'> 		irq = ffs(status) - 1;</div><div class='ctx'> 		status &amp;= ~(1 &lt;&lt; irq);</div><div class='del'>-</div><div class='del'>-		generic_handle_irq(irq + f-&gt;irq_start);</div><div class='add'>+		generic_handle_irq(irq_find_mapping(f-&gt;domain, irq));</div><div class='ctx'> 	} while (status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init fpga_irq_init(int parent_irq, u32 valid, struct fpga_irq_data *f)</div><div class='add'>+/*</div><div class='add'>+ * Handle each interrupt in a single FPGA IRQ controller.  Returns non-zero</div><div class='add'>+ * if we've handled at least one interrupt.  This does a single read of the</div><div class='add'>+ * status register and handles all interrupts in order from LSB first.</div><div class='add'>+ */</div><div class='add'>+static int handle_one_fpga(struct fpga_irq_data *f, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	int handled = 0;</div><div class='add'>+	int irq;</div><div class='add'>+	u32 status;</div><div class='add'>+</div><div class='add'>+	while ((status  = readl(f-&gt;base + IRQ_STATUS))) {</div><div class='add'>+		irq = ffs(status) - 1;</div><div class='add'>+		handle_IRQ(irq_find_mapping(f-&gt;domain, irq), regs);</div><div class='add'>+		handled = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return handled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Keep iterating over all registered FPGA IRQ controllers until there are</div><div class='add'>+ * no pending interrupts.</div><div class='add'>+ */</div><div class='add'>+asmlinkage void __exception_irq_entry fpga_handle_irq(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	unsigned int i;</div><div class='add'>+	int i, handled;</div><div class='ctx'> </div><div class='add'>+	do {</div><div class='add'>+		for (i = 0, handled = 0; i &lt; fpga_irq_id; ++i)</div><div class='add'>+			handled |= handle_one_fpga(&amp;fpga_irq_devices[i], regs);</div><div class='add'>+	} while (handled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fpga_irqdomain_map(struct irq_domain *d, unsigned int irq,</div><div class='add'>+		irq_hw_number_t hwirq)</div><div class='add'>+{</div><div class='add'>+	struct fpga_irq_data *f = d-&gt;host_data;</div><div class='add'>+</div><div class='add'>+	/* Skip invalid IRQs, only register handlers for the real ones */</div><div class='add'>+	if (!(f-&gt;valid &amp; (1 &lt;&lt; hwirq)))</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+	irq_set_chip_data(irq, f);</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;f-&gt;chip,</div><div class='add'>+				handle_level_irq);</div><div class='add'>+	set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);</div><div class='add'>+	f-&gt;used_irqs++;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_domain_ops fpga_irqdomain_ops = {</div><div class='add'>+	.map = fpga_irqdomain_map,</div><div class='add'>+	.xlate = irq_domain_xlate_onetwocell,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,</div><div class='add'>+			  int parent_irq, u32 valid, struct device_node *node)</div><div class='add'>+{</div><div class='add'>+	struct fpga_irq_data *f;</div><div class='add'>+</div><div class='add'>+	if (fpga_irq_id &gt;= ARRAY_SIZE(fpga_irq_devices)) {</div><div class='add'>+		printk(KERN_ERR "%s: too few FPGA IRQ controllers, increase CONFIG_PLAT_VERSATILE_FPGA_IRQ_NR\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	f = &amp;fpga_irq_devices[fpga_irq_id];</div><div class='add'>+	f-&gt;base = base;</div><div class='add'>+	f-&gt;irq_start = irq_start;</div><div class='add'>+	f-&gt;chip.name = name;</div><div class='ctx'> 	f-&gt;chip.irq_ack = fpga_irq_mask;</div><div class='ctx'> 	f-&gt;chip.irq_mask = fpga_irq_mask;</div><div class='ctx'> 	f-&gt;chip.irq_unmask = fpga_irq_unmask;</div><div class='add'>+	f-&gt;valid = valid;</div><div class='ctx'> </div><div class='ctx'> 	if (parent_irq != -1) {</div><div class='ctx'> 		irq_set_handler_data(parent_irq, f);</div><div class='ctx'> 		irq_set_chained_handler(parent_irq, fpga_irq_handle);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; 32; i++) {</div><div class='del'>-		if (valid &amp; (1 &lt;&lt; i)) {</div><div class='del'>-			unsigned int irq = f-&gt;irq_start + i;</div><div class='add'>+	f-&gt;domain = irq_domain_add_legacy(node, fls(valid), f-&gt;irq_start, 0,</div><div class='add'>+					  &amp;fpga_irqdomain_ops, f);</div><div class='add'>+	pr_info("FPGA IRQ chip %d \"%s\" @ %p, %u irqs\n",</div><div class='add'>+		fpga_irq_id, name, base, f-&gt;used_irqs);</div><div class='ctx'> </div><div class='del'>-			irq_set_chip_data(irq, f);</div><div class='del'>-			irq_set_chip_and_handler(irq, &amp;f-&gt;chip,</div><div class='del'>-						 handle_level_irq);</div><div class='del'>-			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	fpga_irq_id++;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm/plat-versatile/include/plat/fpga-irq.h b/arch/arm/plat-versatile/include/plat/fpga-irq.h<br/>index 627fafd1e595..91bcfb67551d 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/plat-versatile/include/plat/fpga-irq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/plat-versatile/include/plat/fpga-irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/plat-versatile/include/plat/fpga-irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/plat-versatile/include/plat/fpga-irq.h</a></div><div class='hunk'>@@ -1,12 +1,11 @@</div><div class='ctx'> #ifndef PLAT_FPGA_IRQ_H</div><div class='ctx'> #define PLAT_FPGA_IRQ_H</div><div class='ctx'> </div><div class='del'>-struct fpga_irq_data {</div><div class='del'>-	void __iomem *base;</div><div class='del'>-	unsigned int irq_start;</div><div class='del'>-	struct irq_chip chip;</div><div class='del'>-};</div><div class='add'>+struct device_node;</div><div class='add'>+struct pt_regs;</div><div class='ctx'> </div><div class='del'>-void fpga_irq_init(int, u32, struct fpga_irq_data *);</div><div class='add'>+void fpga_handle_irq(struct pt_regs *regs);</div><div class='add'>+void fpga_irq_init(void __iomem *, const char *, int, int, u32,</div><div class='add'>+		struct device_node *node);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types<br/>index f9c9f33f8cbe..2997e56ce0dd 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/tools/mach-types?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/tools/mach-types</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/tools/mach-types?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/tools/mach-types</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> # are merged into mainline or have been edited in the machine database</div><div class='ctx'> # within the last 12 months.  References to machine_is_NAME() do not count!</div><div class='ctx'> #</div><div class='del'>-# Last update: Tue Dec 6 11:07:38 2011</div><div class='add'>+# Last update: Thu Apr 26 08:44:23 2012</div><div class='ctx'> #</div><div class='ctx'> # machine_is_xxx	CONFIG_xxxx		MACH_TYPE_xxx		number</div><div class='ctx'> #</div><div class='hunk'>@@ -205,6 +205,7 @@ omap_fsample		MACH_OMAP_FSAMPLE	OMAP_FSAMPLE		970</div><div class='ctx'> snapper_cl15		MACH_SNAPPER_CL15	SNAPPER_CL15		986</div><div class='ctx'> omap_palmz71		MACH_OMAP_PALMZ71	OMAP_PALMZ71		993</div><div class='ctx'> smdk2412		MACH_SMDK2412		SMDK2412		1009</div><div class='add'>+bkde303			MACH_BKDE303		BKDE303			1021</div><div class='ctx'> smdk2413		MACH_SMDK2413		SMDK2413		1022</div><div class='ctx'> aml_m5900		MACH_AML_M5900		AML_M5900		1024</div><div class='ctx'> balloon3		MACH_BALLOON3		BALLOON3		1029</div><div class='hunk'>@@ -381,8 +382,6 @@ davinci_da850_evm	MACH_DAVINCI_DA850_EVM	DAVINCI_DA850_EVM	2157</div><div class='ctx'> at91sam9g10ek		MACH_AT91SAM9G10EK	AT91SAM9G10EK		2159</div><div class='ctx'> omap_4430sdp		MACH_OMAP_4430SDP	OMAP_4430SDP		2160</div><div class='ctx'> magx_zn5		MACH_MAGX_ZN5		MAGX_ZN5		2162</div><div class='del'>-btmavb101		MACH_BTMAVB101		BTMAVB101		2172</div><div class='del'>-btmawb101		MACH_BTMAWB101		BTMAWB101		2173</div><div class='ctx'> tx25			MACH_TX25		TX25			2177</div><div class='ctx'> omap3_torpedo		MACH_OMAP3_TORPEDO	OMAP3_TORPEDO		2178</div><div class='ctx'> anw6410			MACH_ANW6410		ANW6410			2183</div><div class='hunk'>@@ -397,7 +396,6 @@ net2big_v2		MACH_NET2BIG_V2		NET2BIG_V2		2204</div><div class='ctx'> net5big_v2		MACH_NET5BIG_V2		NET5BIG_V2		2206</div><div class='ctx'> inetspace_v2		MACH_INETSPACE_V2	INETSPACE_V2		2208</div><div class='ctx'> at91sam9g45ekes		MACH_AT91SAM9G45EKES	AT91SAM9G45EKES		2212</div><div class='del'>-pc7302			MACH_PC7302		PC7302			2220</div><div class='ctx'> spear600		MACH_SPEAR600		SPEAR600		2236</div><div class='ctx'> spear300		MACH_SPEAR300		SPEAR300		2237</div><div class='ctx'> lilly1131		MACH_LILLY1131		LILLY1131		2239</div><div class='hunk'>@@ -407,7 +405,6 @@ d2net			MACH_D2NET		D2NET			2282</div><div class='ctx'> bigdisk			MACH_BIGDISK		BIGDISK			2283</div><div class='ctx'> at91sam9g20ek_2mmc	MACH_AT91SAM9G20EK_2MMC	AT91SAM9G20EK_2MMC	2288</div><div class='ctx'> bcmring			MACH_BCMRING		BCMRING			2289</div><div class='del'>-dp6xx			MACH_DP6XX		DP6XX			2302</div><div class='ctx'> mahimahi		MACH_MAHIMAHI		MAHIMAHI		2304</div><div class='ctx'> smdk6442		MACH_SMDK6442		SMDK6442		2324</div><div class='ctx'> openrd_base		MACH_OPENRD_BASE	OPENRD_BASE		2325</div><div class='hunk'>@@ -444,8 +441,6 @@ mx28evk			MACH_MX28EVK		MX28EVK			2531</div><div class='ctx'> smartq5			MACH_SMARTQ5		SMARTQ5			2534</div><div class='ctx'> davinci_dm6467tevm	MACH_DAVINCI_DM6467TEVM	DAVINCI_DM6467TEVM	2548</div><div class='ctx'> mxt_td60		MACH_MXT_TD60		MXT_TD60		2550</div><div class='del'>-riot_bei2		MACH_RIOT_BEI2		RIOT_BEI2		2576</div><div class='del'>-riot_x37		MACH_RIOT_X37		RIOT_X37		2578</div><div class='ctx'> pca101			MACH_PCA101		PCA101			2595</div><div class='ctx'> capc7117		MACH_CAPC7117		CAPC7117		2612</div><div class='ctx'> icontrol		MACH_ICONTROL		ICONTROL		2624</div><div class='hunk'>@@ -460,7 +455,6 @@ spear320		MACH_SPEAR320		SPEAR320		2661</div><div class='ctx'> aquila			MACH_AQUILA		AQUILA			2676</div><div class='ctx'> esata_sheevaplug	MACH_ESATA_SHEEVAPLUG	ESATA_SHEEVAPLUG	2678</div><div class='ctx'> msm7x30_surf		MACH_MSM7X30_SURF	MSM7X30_SURF		2679</div><div class='del'>-ea2478devkit		MACH_EA2478DEVKIT	EA2478DEVKIT		2683</div><div class='ctx'> terastation_wxl		MACH_TERASTATION_WXL	TERASTATION_WXL		2697</div><div class='ctx'> msm7x25_surf		MACH_MSM7X25_SURF	MSM7X25_SURF		2703</div><div class='ctx'> msm7x25_ffa		MACH_MSM7X25_FFA	MSM7X25_FFA		2704</div><div class='hunk'>@@ -479,8 +473,6 @@ wbd222			MACH_WBD222		WBD222			2753</div><div class='ctx'> msm8x60_surf		MACH_MSM8X60_SURF	MSM8X60_SURF		2755</div><div class='ctx'> msm8x60_sim		MACH_MSM8X60_SIM	MSM8X60_SIM		2756</div><div class='ctx'> tcc8000_sdk		MACH_TCC8000_SDK	TCC8000_SDK		2758</div><div class='del'>-nanos			MACH_NANOS		NANOS			2759</div><div class='del'>-stamp9g45		MACH_STAMP9G45		STAMP9G45		2761</div><div class='ctx'> cns3420vb		MACH_CNS3420VB		CNS3420VB		2776</div><div class='ctx'> omap4_panda		MACH_OMAP4_PANDA	OMAP4_PANDA		2791</div><div class='ctx'> ti8168evm		MACH_TI8168EVM		TI8168EVM		2800</div><div class='hunk'>@@ -490,12 +482,9 @@ eukrea_cpuimx35sd	MACH_EUKREA_CPUIMX35SD	EUKREA_CPUIMX35SD	2821</div><div class='ctx'> eukrea_cpuimx51sd	MACH_EUKREA_CPUIMX51SD	EUKREA_CPUIMX51SD	2822</div><div class='ctx'> eukrea_cpuimx51		MACH_EUKREA_CPUIMX51	EUKREA_CPUIMX51		2823</div><div class='ctx'> smdkc210		MACH_SMDKC210		SMDKC210		2838</div><div class='del'>-pca102			MACH_PCA102		PCA102			2843</div><div class='add'>+pcaal1			MACH_PCAAL1		PCAAL1			2843</div><div class='ctx'> t5325			MACH_T5325		T5325			2846</div><div class='ctx'> income			MACH_INCOME		INCOME			2849</div><div class='del'>-vvbox_sdorig2		MACH_VVBOX_SDORIG2	VVBOX_SDORIG2		2857</div><div class='del'>-vvbox_sdlite2		MACH_VVBOX_SDLITE2	VVBOX_SDLITE2		2858</div><div class='del'>-vvbox_sdpro4		MACH_VVBOX_SDPRO4	VVBOX_SDPRO4		2859</div><div class='ctx'> mx257sx			MACH_MX257SX		MX257SX			2861</div><div class='ctx'> goni			MACH_GONI		GONI			2862</div><div class='ctx'> bv07			MACH_BV07		BV07			2882</div><div class='hunk'>@@ -504,6 +493,7 @@ devixp			MACH_DEVIXP		DEVIXP			2885</div><div class='ctx'> miccpt			MACH_MICCPT		MICCPT			2886</div><div class='ctx'> mic256			MACH_MIC256		MIC256			2887</div><div class='ctx'> u5500			MACH_U5500		U5500			2890</div><div class='add'>+pov15hd			MACH_POV15HD		POV15HD			2910</div><div class='ctx'> linkstation_lschl	MACH_LINKSTATION_LSCHL	LINKSTATION_LSCHL	2913</div><div class='ctx'> smdkv310		MACH_SMDKV310		SMDKV310		2925</div><div class='ctx'> wm8505_7in_netbook	MACH_WM8505_7IN_NETBOOK	WM8505_7IN_NETBOOK	2928</div><div class='hunk'>@@ -537,243 +527,24 @@ trimslice		MACH_TRIMSLICE		TRIMSLICE		3209</div><div class='ctx'> mackerel		MACH_MACKEREL		MACKEREL		3211</div><div class='ctx'> kaen			MACH_KAEN		KAEN			3217</div><div class='ctx'> nokia_rm680		MACH_NOKIA_RM680	NOKIA_RM680		3220</div><div class='del'>-dm6446_adbox		MACH_DM6446_ADBOX	DM6446_ADBOX		3226</div><div class='del'>-quad_salsa		MACH_QUAD_SALSA		QUAD_SALSA		3227</div><div class='del'>-abb_gma_1_1		MACH_ABB_GMA_1_1	ABB_GMA_1_1		3228</div><div class='del'>-svcid			MACH_SVCID		SVCID			3229</div><div class='ctx'> msm8960_sim		MACH_MSM8960_SIM	MSM8960_SIM		3230</div><div class='ctx'> msm8960_rumi3		MACH_MSM8960_RUMI3	MSM8960_RUMI3		3231</div><div class='del'>-icon_g			MACH_ICON_G		ICON_G			3232</div><div class='del'>-mb3			MACH_MB3		MB3			3233</div><div class='ctx'> gsia18s			MACH_GSIA18S		GSIA18S			3234</div><div class='del'>-pivicc			MACH_PIVICC		PIVICC			3235</div><div class='del'>-pcm048			MACH_PCM048		PCM048			3236</div><div class='del'>-dds			MACH_DDS		DDS			3237</div><div class='del'>-chalten_xa1		MACH_CHALTEN_XA1	CHALTEN_XA1		3238</div><div class='del'>-ts48xx			MACH_TS48XX		TS48XX			3239</div><div class='del'>-tonga2_tfttimer		MACH_TONGA2_TFTTIMER	TONGA2_TFTTIMER		3240</div><div class='del'>-whistler		MACH_WHISTLER		WHISTLER		3241</div><div class='del'>-asl_phoenix		MACH_ASL_PHOENIX	ASL_PHOENIX		3242</div><div class='del'>-at91sam9263otlite	MACH_AT91SAM9263OTLITE	AT91SAM9263OTLITE	3243</div><div class='del'>-ddplug			MACH_DDPLUG		DDPLUG			3244</div><div class='del'>-d2plug			MACH_D2PLUG		D2PLUG			3245</div><div class='del'>-kzm9d			MACH_KZM9D		KZM9D			3246</div><div class='del'>-verdi_lte		MACH_VERDI_LTE		VERDI_LTE		3247</div><div class='del'>-nanozoom		MACH_NANOZOOM		NANOZOOM		3248</div><div class='del'>-dm3730_som_lv		MACH_DM3730_SOM_LV	DM3730_SOM_LV		3249</div><div class='del'>-dm3730_torpedo		MACH_DM3730_TORPEDO	DM3730_TORPEDO		3250</div><div class='del'>-anchovy			MACH_ANCHOVY		ANCHOVY			3251</div><div class='del'>-re2rev20		MACH_RE2REV20		RE2REV20		3253</div><div class='del'>-re2rev21		MACH_RE2REV21		RE2REV21		3254</div><div class='del'>-cns21xx			MACH_CNS21XX		CNS21XX			3255</div><div class='del'>-rider			MACH_RIDER		RIDER			3257</div><div class='del'>-nsk330			MACH_NSK330		NSK330			3258</div><div class='del'>-cns2133evb		MACH_CNS2133EVB		CNS2133EVB		3259</div><div class='del'>-z3_816x_mod		MACH_Z3_816X_MOD	Z3_816X_MOD		3260</div><div class='del'>-z3_814x_mod		MACH_Z3_814X_MOD	Z3_814X_MOD		3261</div><div class='del'>-beect			MACH_BEECT		BEECT			3262</div><div class='del'>-dma_thunderbug		MACH_DMA_THUNDERBUG	DMA_THUNDERBUG		3263</div><div class='del'>-omn_at91sam9g20		MACH_OMN_AT91SAM9G20	OMN_AT91SAM9G20		3264</div><div class='del'>-mx25_e2s_uc		MACH_MX25_E2S_UC	MX25_E2S_UC		3265</div><div class='del'>-mione			MACH_MIONE		MIONE			3266</div><div class='del'>-top9000_tcu		MACH_TOP9000_TCU	TOP9000_TCU		3267</div><div class='del'>-top9000_bsl		MACH_TOP9000_BSL	TOP9000_BSL		3268</div><div class='del'>-kingdom			MACH_KINGDOM		KINGDOM			3269</div><div class='del'>-armadillo460		MACH_ARMADILLO460	ARMADILLO460		3270</div><div class='del'>-lq2			MACH_LQ2		LQ2			3271</div><div class='del'>-sweda_tms2		MACH_SWEDA_TMS2		SWEDA_TMS2		3272</div><div class='ctx'> mx53_loco		MACH_MX53_LOCO		MX53_LOCO		3273</div><div class='del'>-acer_a8			MACH_ACER_A8		ACER_A8			3275</div><div class='del'>-acer_gauguin		MACH_ACER_GAUGUIN	ACER_GAUGUIN		3276</div><div class='del'>-guppy			MACH_GUPPY		GUPPY			3277</div><div class='del'>-mx61_ard		MACH_MX61_ARD		MX61_ARD		3278</div><div class='ctx'> tx53			MACH_TX53		TX53			3279</div><div class='del'>-omapl138_case_a3	MACH_OMAPL138_CASE_A3	OMAPL138_CASE_A3	3280</div><div class='del'>-uemd			MACH_UEMD		UEMD			3281</div><div class='del'>-ccwmx51mut		MACH_CCWMX51MUT		CCWMX51MUT		3282</div><div class='del'>-rockhopper		MACH_ROCKHOPPER		ROCKHOPPER		3283</div><div class='ctx'> encore			MACH_ENCORE		ENCORE			3284</div><div class='del'>-hkdkc100		MACH_HKDKC100		HKDKC100		3285</div><div class='del'>-ts42xx			MACH_TS42XX		TS42XX			3286</div><div class='del'>-aebl			MACH_AEBL		AEBL			3287</div><div class='ctx'> wario			MACH_WARIO		WARIO			3288</div><div class='del'>-gfs_spm			MACH_GFS_SPM		GFS_SPM			3289</div><div class='ctx'> cm_t3730		MACH_CM_T3730		CM_T3730		3290</div><div class='del'>-isc3			MACH_ISC3		ISC3			3291</div><div class='del'>-rascal			MACH_RASCAL		RASCAL			3292</div><div class='ctx'> hrefv60			MACH_HREFV60		HREFV60			3293</div><div class='del'>-tpt_2_0			MACH_TPT_2_0		TPT_2_0			3294</div><div class='del'>-splendor		MACH_SPLENDOR		SPLENDOR		3296</div><div class='del'>-msm8x60_qt		MACH_MSM8X60_QT		MSM8X60_QT		3298</div><div class='del'>-htc_hd_mini		MACH_HTC_HD_MINI	HTC_HD_MINI		3299</div><div class='del'>-athene			MACH_ATHENE		ATHENE			3300</div><div class='del'>-deep_r_ek_1		MACH_DEEP_R_EK_1	DEEP_R_EK_1		3301</div><div class='del'>-vivow_ct		MACH_VIVOW_CT		VIVOW_CT		3302</div><div class='del'>-nery_1000		MACH_NERY_1000		NERY_1000		3303</div><div class='del'>-rfl109145_ssrv		MACH_RFL109145_SSRV	RFL109145_SSRV		3304</div><div class='del'>-nmh			MACH_NMH		NMH			3305</div><div class='del'>-wn802t			MACH_WN802T		WN802T			3306</div><div class='del'>-dragonet		MACH_DRAGONET		DRAGONET		3307</div><div class='del'>-at91sam9263desk16l	MACH_AT91SAM9263DESK16L	AT91SAM9263DESK16L	3309</div><div class='del'>-bcmhana_sv		MACH_BCMHANA_SV		BCMHANA_SV		3310</div><div class='del'>-bcmhana_tablet		MACH_BCMHANA_TABLET	BCMHANA_TABLET		3311</div><div class='del'>-koi			MACH_KOI		KOI			3312</div><div class='del'>-ts4800			MACH_TS4800		TS4800			3313</div><div class='del'>-tqma9263		MACH_TQMA9263		TQMA9263		3314</div><div class='del'>-holiday			MACH_HOLIDAY		HOLIDAY			3315</div><div class='del'>-pcats_overlay		MACH_PCATS_OVERLAY	PCATS_OVERLAY		3317</div><div class='del'>-hwgw6410		MACH_HWGW6410		HWGW6410		3318</div><div class='del'>-shenzhou		MACH_SHENZHOU		SHENZHOU		3319</div><div class='del'>-cwme9210		MACH_CWME9210		CWME9210		3320</div><div class='del'>-cwme9210js		MACH_CWME9210JS		CWME9210JS		3321</div><div class='del'>-colibri_tegra2		MACH_COLIBRI_TEGRA2	COLIBRI_TEGRA2		3323</div><div class='del'>-w21			MACH_W21		W21			3324</div><div class='del'>-polysat1		MACH_POLYSAT1		POLYSAT1		3325</div><div class='del'>-dataway			MACH_DATAWAY		DATAWAY			3326</div><div class='del'>-cobral138		MACH_COBRAL138		COBRAL138		3327</div><div class='del'>-roverpcs8		MACH_ROVERPCS8		ROVERPCS8		3328</div><div class='del'>-marvelc			MACH_MARVELC		MARVELC			3329</div><div class='del'>-navefihid		MACH_NAVEFIHID		NAVEFIHID		3330</div><div class='del'>-dm365_cv100		MACH_DM365_CV100	DM365_CV100		3331</div><div class='del'>-able			MACH_ABLE		ABLE			3332</div><div class='del'>-legacy			MACH_LEGACY		LEGACY			3333</div><div class='del'>-icong			MACH_ICONG		ICONG			3334</div><div class='del'>-rover_g8		MACH_ROVER_G8		ROVER_G8		3335</div><div class='del'>-t5388p			MACH_T5388P		T5388P			3336</div><div class='del'>-dingo			MACH_DINGO		DINGO			3337</div><div class='del'>-goflexhome		MACH_GOFLEXHOME		GOFLEXHOME		3338</div><div class='del'>-lanreadyfn511		MACH_LANREADYFN511	LANREADYFN511		3340</div><div class='del'>-omap3_baia		MACH_OMAP3_BAIA		OMAP3_BAIA		3341</div><div class='del'>-omap3smartdisplay	MACH_OMAP3SMARTDISPLAY	OMAP3SMARTDISPLAY	3342</div><div class='del'>-xilinx			MACH_XILINX		XILINX			3343</div><div class='del'>-a2f			MACH_A2F		A2F			3344</div><div class='del'>-sky25			MACH_SKY25		SKY25			3345</div><div class='del'>-ccmx53			MACH_CCMX53		CCMX53			3346</div><div class='del'>-ccmx53js		MACH_CCMX53JS		CCMX53JS		3347</div><div class='del'>-ccwmx53			MACH_CCWMX53		CCWMX53			3348</div><div class='del'>-ccwmx53js		MACH_CCWMX53JS		CCWMX53JS		3349</div><div class='del'>-frisms			MACH_FRISMS		FRISMS			3350</div><div class='del'>-msm7x27a_ffa		MACH_MSM7X27A_FFA	MSM7X27A_FFA		3351</div><div class='del'>-msm7x27a_surf		MACH_MSM7X27A_SURF	MSM7X27A_SURF		3352</div><div class='del'>-msm7x27a_rumi3		MACH_MSM7X27A_RUMI3	MSM7X27A_RUMI3		3353</div><div class='del'>-dimmsam9g20		MACH_DIMMSAM9G20	DIMMSAM9G20		3354</div><div class='del'>-dimm_imx28		MACH_DIMM_IMX28		DIMM_IMX28		3355</div><div class='del'>-amk_a4			MACH_AMK_A4		AMK_A4			3356</div><div class='del'>-gnet_sgme		MACH_GNET_SGME		GNET_SGME		3357</div><div class='del'>-shooter_u		MACH_SHOOTER_U		SHOOTER_U		3358</div><div class='del'>-vmx53			MACH_VMX53		VMX53			3359</div><div class='del'>-rhino			MACH_RHINO		RHINO			3360</div><div class='ctx'> armlex4210		MACH_ARMLEX4210		ARMLEX4210		3361</div><div class='del'>-swarcoextmodem		MACH_SWARCOEXTMODEM	SWARCOEXTMODEM		3362</div><div class='ctx'> snowball		MACH_SNOWBALL		SNOWBALL		3363</div><div class='del'>-pcm049			MACH_PCM049		PCM049			3364</div><div class='del'>-vigor			MACH_VIGOR		VIGOR			3365</div><div class='del'>-oslo_amundsen		MACH_OSLO_AMUNDSEN	OSLO_AMUNDSEN		3366</div><div class='del'>-gsl_diamond		MACH_GSL_DIAMOND	GSL_DIAMOND		3367</div><div class='del'>-cv2201			MACH_CV2201		CV2201			3368</div><div class='del'>-cv2202			MACH_CV2202		CV2202			3369</div><div class='del'>-cv2203			MACH_CV2203		CV2203			3370</div><div class='del'>-vit_ibox		MACH_VIT_IBOX		VIT_IBOX		3371</div><div class='del'>-dm6441_esp		MACH_DM6441_ESP		DM6441_ESP		3372</div><div class='del'>-at91sam9x5ek		MACH_AT91SAM9X5EK	AT91SAM9X5EK		3373</div><div class='del'>-libra			MACH_LIBRA		LIBRA			3374</div><div class='del'>-easycrrh		MACH_EASYCRRH		EASYCRRH		3375</div><div class='del'>-tripel			MACH_TRIPEL		TRIPEL			3376</div><div class='del'>-endian_mini		MACH_ENDIAN_MINI	ENDIAN_MINI		3377</div><div class='ctx'> xilinx_ep107		MACH_XILINX_EP107	XILINX_EP107		3378</div><div class='ctx'> nuri			MACH_NURI		NURI			3379</div><div class='del'>-janus			MACH_JANUS		JANUS			3380</div><div class='del'>-ddnas			MACH_DDNAS		DDNAS			3381</div><div class='del'>-tag			MACH_TAG		TAG			3382</div><div class='del'>-tagw			MACH_TAGW		TAGW			3383</div><div class='del'>-nitrogen_vm_imx51	MACH_NITROGEN_VM_IMX51	NITROGEN_VM_IMX51	3384</div><div class='del'>-viprinet		MACH_VIPRINET		VIPRINET		3385</div><div class='del'>-bockw			MACH_BOCKW		BOCKW			3386</div><div class='del'>-eva2000			MACH_EVA2000		EVA2000			3387</div><div class='del'>-steelyard		MACH_STEELYARD		STEELYARD		3388</div><div class='del'>-nsslsboard		MACH_NSSLSBOARD		NSSLSBOARD		3392</div><div class='del'>-geneva_b5		MACH_GENEVA_B5		GENEVA_B5		3393</div><div class='del'>-spear1340		MACH_SPEAR1340		SPEAR1340		3394</div><div class='del'>-rexmas			MACH_REXMAS		REXMAS			3395</div><div class='del'>-msm8960_cdp		MACH_MSM8960_CDP	MSM8960_CDP		3396</div><div class='del'>-msm8960_fluid		MACH_MSM8960_FLUID	MSM8960_FLUID		3398</div><div class='del'>-msm8960_apq		MACH_MSM8960_APQ	MSM8960_APQ		3399</div><div class='del'>-helios_v2		MACH_HELIOS_V2		HELIOS_V2		3400</div><div class='del'>-mif10p			MACH_MIF10P		MIF10P			3401</div><div class='del'>-iam28			MACH_IAM28		IAM28			3402</div><div class='del'>-picasso			MACH_PICASSO		PICASSO			3403</div><div class='del'>-mr301a			MACH_MR301A		MR301A			3404</div><div class='del'>-notle			MACH_NOTLE		NOTLE			3405</div><div class='del'>-eelx2			MACH_EELX2		EELX2			3406</div><div class='del'>-moon			MACH_MOON		MOON			3407</div><div class='del'>-ruby			MACH_RUBY		RUBY			3408</div><div class='del'>-goldengate		MACH_GOLDENGATE		GOLDENGATE		3409</div><div class='del'>-ctbu_gen2		MACH_CTBU_GEN2		CTBU_GEN2		3410</div><div class='del'>-kmp_am17_01		MACH_KMP_AM17_01	KMP_AM17_01		3411</div><div class='ctx'> wtplug			MACH_WTPLUG		WTPLUG			3412</div><div class='del'>-mx27su2			MACH_MX27SU2		MX27SU2			3413</div><div class='del'>-nb31			MACH_NB31		NB31			3414</div><div class='del'>-hjsdu			MACH_HJSDU		HJSDU			3415</div><div class='del'>-td3_rev1		MACH_TD3_REV1		TD3_REV1		3416</div><div class='del'>-eag_ci4000		MACH_EAG_CI4000		EAG_CI4000		3417</div><div class='del'>-net5big_nand_v2		MACH_NET5BIG_NAND_V2	NET5BIG_NAND_V2		3418</div><div class='del'>-cpx2			MACH_CPX2		CPX2			3419</div><div class='del'>-net2big_nand_v2		MACH_NET2BIG_NAND_V2	NET2BIG_NAND_V2		3420</div><div class='del'>-ecuv5			MACH_ECUV5		ECUV5			3421</div><div class='del'>-hsgx6d			MACH_HSGX6D		HSGX6D			3422</div><div class='del'>-dawad7			MACH_DAWAD7		DAWAD7			3423</div><div class='del'>-sam9repeater		MACH_SAM9REPEATER	SAM9REPEATER		3424</div><div class='del'>-gt_i5700		MACH_GT_I5700		GT_I5700		3425</div><div class='del'>-ctera_plug_c2		MACH_CTERA_PLUG_C2	CTERA_PLUG_C2		3426</div><div class='del'>-marvelct		MACH_MARVELCT		MARVELCT		3427</div><div class='del'>-ag11005			MACH_AG11005		AG11005			3428</div><div class='del'>-vangogh			MACH_VANGOGH		VANGOGH			3430</div><div class='del'>-matrix505		MACH_MATRIX505		MATRIX505		3431</div><div class='del'>-oce_nigma		MACH_OCE_NIGMA		OCE_NIGMA		3432</div><div class='del'>-t55			MACH_T55		T55			3433</div><div class='del'>-bio3k			MACH_BIO3K		BIO3K			3434</div><div class='del'>-expressct		MACH_EXPRESSCT		EXPRESSCT		3435</div><div class='del'>-cardhu			MACH_CARDHU		CARDHU			3436</div><div class='del'>-aruba			MACH_ARUBA		ARUBA			3437</div><div class='del'>-bonaire			MACH_BONAIRE		BONAIRE			3438</div><div class='del'>-nuc700evb		MACH_NUC700EVB		NUC700EVB		3439</div><div class='del'>-nuc710evb		MACH_NUC710EVB		NUC710EVB		3440</div><div class='del'>-nuc740evb		MACH_NUC740EVB		NUC740EVB		3441</div><div class='del'>-nuc745evb		MACH_NUC745EVB		NUC745EVB		3442</div><div class='del'>-transcede		MACH_TRANSCEDE		TRANSCEDE		3443</div><div class='del'>-mora			MACH_MORA		MORA			3444</div><div class='del'>-nda_evm			MACH_NDA_EVM		NDA_EVM			3445</div><div class='del'>-timu			MACH_TIMU		TIMU			3446</div><div class='del'>-expressh		MACH_EXPRESSH		EXPRESSH		3447</div><div class='ctx'> veridis_a300		MACH_VERIDIS_A300	VERIDIS_A300		3448</div><div class='del'>-dm368_leopard		MACH_DM368_LEOPARD	DM368_LEOPARD		3449</div><div class='del'>-omap_mcop		MACH_OMAP_MCOP		OMAP_MCOP		3450</div><div class='del'>-tritip			MACH_TRITIP		TRITIP			3451</div><div class='del'>-sm1k			MACH_SM1K		SM1K			3452</div><div class='del'>-monch			MACH_MONCH		MONCH			3453</div><div class='del'>-curacao			MACH_CURACAO		CURACAO			3454</div><div class='ctx'> origen			MACH_ORIGEN		ORIGEN			3455</div><div class='del'>-epc10			MACH_EPC10		EPC10			3456</div><div class='del'>-sgh_i740		MACH_SGH_I740		SGH_I740		3457</div><div class='del'>-tuna			MACH_TUNA		TUNA			3458</div><div class='del'>-mx51_tulip		MACH_MX51_TULIP		MX51_TULIP		3459</div><div class='del'>-mx51_aster7		MACH_MX51_ASTER7	MX51_ASTER7		3460</div><div class='del'>-acro37xbrd		MACH_ACRO37XBRD		ACRO37XBRD		3461</div><div class='del'>-elke			MACH_ELKE		ELKE			3462</div><div class='del'>-sbc6000x		MACH_SBC6000X		SBC6000X		3463</div><div class='del'>-r1801e			MACH_R1801E		R1801E			3464</div><div class='del'>-h1600			MACH_H1600		H1600			3465</div><div class='del'>-mini210			MACH_MINI210		MINI210			3466</div><div class='del'>-mini8168		MACH_MINI8168		MINI8168		3467</div><div class='del'>-pc7308			MACH_PC7308		PC7308			3468</div><div class='del'>-kmm2m01			MACH_KMM2M01		KMM2M01			3470</div><div class='del'>-mx51erebus		MACH_MX51EREBUS		MX51EREBUS		3471</div><div class='ctx'> wm8650refboard		MACH_WM8650REFBOARD	WM8650REFBOARD		3472</div><div class='del'>-tuxrail			MACH_TUXRAIL		TUXRAIL			3473</div><div class='del'>-arthur			MACH_ARTHUR		ARTHUR			3474</div><div class='del'>-doorboy			MACH_DOORBOY		DOORBOY			3475</div><div class='ctx'> xarina			MACH_XARINA		XARINA			3476</div><div class='del'>-roverx7			MACH_ROVERX7		ROVERX7			3477</div><div class='ctx'> sdvr			MACH_SDVR		SDVR			3478</div><div class='ctx'> acer_maya		MACH_ACER_MAYA		ACER_MAYA		3479</div><div class='ctx'> pico			MACH_PICO		PICO			3480</div><div class='hunk'>@@ -999,6 +770,7 @@ promwad_jade		MACH_PROMWAD_JADE	PROMWAD_JADE		3708</div><div class='ctx'> amp			MACH_AMP		AMP			3709</div><div class='ctx'> gnet_amp		MACH_GNET_AMP		GNET_AMP		3710</div><div class='ctx'> toques			MACH_TOQUES		TOQUES			3711</div><div class='add'>+apx4devkit		MACH_APX4DEVKIT		APX4DEVKIT		3712</div><div class='ctx'> dct_storm		MACH_DCT_STORM		DCT_STORM		3713</div><div class='ctx'> owl			MACH_OWL		OWL			3715</div><div class='ctx'> cogent_csb1741		MACH_COGENT_CSB1741	COGENT_CSB1741		3716</div><div class='hunk'>@@ -1063,7 +835,6 @@ shelter			MACH_SHELTER		SHELTER			3778</div><div class='ctx'> omap3_devkit8500	MACH_OMAP3_DEVKIT8500	OMAP3_DEVKIT8500	3779</div><div class='ctx'> edgetd			MACH_EDGETD		EDGETD			3780</div><div class='ctx'> copperyard		MACH_COPPERYARD		COPPERYARD		3781</div><div class='del'>-edge			MACH_EDGE		EDGE			3782</div><div class='ctx'> edge_u			MACH_EDGE_U		EDGE_U			3783</div><div class='ctx'> edge_td			MACH_EDGE_TD		EDGE_TD			3784</div><div class='ctx'> wdss			MACH_WDSS		WDSS			3785</div><div class='hunk'>@@ -1169,3 +940,269 @@ elite_ulk		MACH_ELITE_ULK		ELITE_ULK		3888</div><div class='ctx'> pov2			MACH_POV2		POV2			3889</div><div class='ctx'> ipod_touch_2g		MACH_IPOD_TOUCH_2G	IPOD_TOUCH_2G		3890</div><div class='ctx'> da850_pqab		MACH_DA850_PQAB		DA850_PQAB		3891</div><div class='add'>+fermi			MACH_FERMI		FERMI			3892</div><div class='add'>+ccardwmx28		MACH_CCARDWMX28		CCARDWMX28		3893</div><div class='add'>+ccardmx28		MACH_CCARDMX28		CCARDMX28		3894</div><div class='add'>+fs20_fcm2050		MACH_FS20_FCM2050	FS20_FCM2050		3895</div><div class='add'>+kinetis			MACH_KINETIS		KINETIS			3896</div><div class='add'>+kai			MACH_KAI		KAI			3897</div><div class='add'>+bcthb2			MACH_BCTHB2		BCTHB2			3898</div><div class='add'>+inels3_cu		MACH_INELS3_CU		INELS3_CU		3899</div><div class='add'>+da850_apollo		MACH_DA850_APOLLO	DA850_APOLLO		3901</div><div class='add'>+tracnas			MACH_TRACNAS		TRACNAS			3902</div><div class='add'>+mityarm335x		MACH_MITYARM335X	MITYARM335X		3903</div><div class='add'>+xcgz7x			MACH_XCGZ7X		XCGZ7X			3904</div><div class='add'>+cubox			MACH_CUBOX		CUBOX			3905</div><div class='add'>+terminator		MACH_TERMINATOR		TERMINATOR		3906</div><div class='add'>+eye03			MACH_EYE03		EYE03			3907</div><div class='add'>+kota3			MACH_KOTA3		KOTA3			3908</div><div class='add'>+pscpe			MACH_PSCPE		PSCPE			3910</div><div class='add'>+akt1100			MACH_AKT1100		AKT1100			3911</div><div class='add'>+pcaaxl2			MACH_PCAAXL2		PCAAXL2			3912</div><div class='add'>+primodd_ct		MACH_PRIMODD_CT		PRIMODD_CT		3913</div><div class='add'>+nsbc			MACH_NSBC		NSBC			3914</div><div class='add'>+meson2_skt		MACH_MESON2_SKT		MESON2_SKT		3915</div><div class='add'>+meson2_ref		MACH_MESON2_REF		MESON2_REF		3916</div><div class='add'>+ccardwmx28js		MACH_CCARDWMX28JS	CCARDWMX28JS		3917</div><div class='add'>+ccardmx28js		MACH_CCARDMX28JS	CCARDMX28JS		3918</div><div class='add'>+indico			MACH_INDICO		INDICO			3919</div><div class='add'>+msm8960dt		MACH_MSM8960DT		MSM8960DT		3920</div><div class='add'>+primods			MACH_PRIMODS		PRIMODS			3921</div><div class='add'>+beluga_m1388		MACH_BELUGA_M1388	BELUGA_M1388		3922</div><div class='add'>+primotd			MACH_PRIMOTD		PRIMOTD			3923</div><div class='add'>+varan_master		MACH_VARAN_MASTER	VARAN_MASTER		3924</div><div class='add'>+primodd			MACH_PRIMODD		PRIMODD			3925</div><div class='add'>+jetduo			MACH_JETDUO		JETDUO			3926</div><div class='add'>+mx53_umobo		MACH_MX53_UMOBO		MX53_UMOBO		3927</div><div class='add'>+trats			MACH_TRATS		TRATS			3928</div><div class='add'>+starcraft		MACH_STARCRAFT		STARCRAFT		3929</div><div class='add'>+qseven_tegra2		MACH_QSEVEN_TEGRA2	QSEVEN_TEGRA2		3930</div><div class='add'>+lichee_sun4i_devbd	MACH_LICHEE_SUN4I_DEVBD	LICHEE_SUN4I_DEVBD	3931</div><div class='add'>+movenow			MACH_MOVENOW		MOVENOW			3932</div><div class='add'>+golf_u			MACH_GOLF_U		GOLF_U			3933</div><div class='add'>+msm7627a_evb		MACH_MSM7627A_EVB	MSM7627A_EVB		3934</div><div class='add'>+rambo			MACH_RAMBO		RAMBO			3935</div><div class='add'>+golfu			MACH_GOLFU		GOLFU			3936</div><div class='add'>+mango310		MACH_MANGO310		MANGO310		3937</div><div class='add'>+dns343			MACH_DNS343		DNS343			3938</div><div class='add'>+var_som_om44		MACH_VAR_SOM_OM44	VAR_SOM_OM44		3939</div><div class='add'>+naon			MACH_NAON		NAON			3940</div><div class='add'>+vp4000			MACH_VP4000		VP4000			3941</div><div class='add'>+impcard			MACH_IMPCARD		IMPCARD			3942</div><div class='add'>+smoovcam		MACH_SMOOVCAM		SMOOVCAM		3943</div><div class='add'>+cobham3725		MACH_COBHAM3725		COBHAM3725		3944</div><div class='add'>+cobham3730		MACH_COBHAM3730		COBHAM3730		3945</div><div class='add'>+cobham3703		MACH_COBHAM3703		COBHAM3703		3946</div><div class='add'>+quetzal			MACH_QUETZAL		QUETZAL			3947</div><div class='add'>+apq8064_cdp		MACH_APQ8064_CDP	APQ8064_CDP		3948</div><div class='add'>+apq8064_mtp		MACH_APQ8064_MTP	APQ8064_MTP		3949</div><div class='add'>+apq8064_fluid		MACH_APQ8064_FLUID	APQ8064_FLUID		3950</div><div class='add'>+apq8064_liquid		MACH_APQ8064_LIQUID	APQ8064_LIQUID		3951</div><div class='add'>+mango210		MACH_MANGO210		MANGO210		3952</div><div class='add'>+mango100		MACH_MANGO100		MANGO100		3953</div><div class='add'>+mango24			MACH_MANGO24		MANGO24			3954</div><div class='add'>+mango64			MACH_MANGO64		MANGO64			3955</div><div class='add'>+nsa320			MACH_NSA320		NSA320			3956</div><div class='add'>+elv_ccu2		MACH_ELV_CCU2		ELV_CCU2		3957</div><div class='add'>+triton_x00		MACH_TRITON_X00		TRITON_X00		3958</div><div class='add'>+triton_1500_2000	MACH_TRITON_1500_2000	TRITON_1500_2000	3959</div><div class='add'>+pogoplugv4		MACH_POGOPLUGV4		POGOPLUGV4		3960</div><div class='add'>+venus_cl		MACH_VENUS_CL		VENUS_CL		3961</div><div class='add'>+vulcano_g20		MACH_VULCANO_G20	VULCANO_G20		3962</div><div class='add'>+sgs_i9100		MACH_SGS_I9100		SGS_I9100		3963</div><div class='add'>+stsv2			MACH_STSV2		STSV2			3964</div><div class='add'>+csb1724			MACH_CSB1724		CSB1724			3965</div><div class='add'>+omapl138_lcdk		MACH_OMAPL138_LCDK	OMAPL138_LCDK		3966</div><div class='add'>+pvd_mx25		MACH_PVD_MX25		PVD_MX25		3968</div><div class='add'>+meson6_skt		MACH_MESON6_SKT		MESON6_SKT		3969</div><div class='add'>+meson6_ref		MACH_MESON6_REF		MESON6_REF		3970</div><div class='add'>+pxm			MACH_PXM		PXM			3971</div><div class='add'>+pogoplugv3		MACH_POGOPLUGV3		POGOPLUGV3		3973</div><div class='add'>+mlp89626		MACH_MLP89626		MLP89626		3974</div><div class='add'>+iomegahmndce		MACH_IOMEGAHMNDCE	IOMEGAHMNDCE		3975</div><div class='add'>+pogoplugv3pci		MACH_POGOPLUGV3PCI	POGOPLUGV3PCI		3976</div><div class='add'>+bntv250			MACH_BNTV250		BNTV250			3977</div><div class='add'>+mx53_qseven		MACH_MX53_QSEVEN	MX53_QSEVEN		3978</div><div class='add'>+gtl_it1100		MACH_GTL_IT1100		GTL_IT1100		3979</div><div class='add'>+mx6q_sabresd		MACH_MX6Q_SABRESD	MX6Q_SABRESD		3980</div><div class='add'>+mt4			MACH_MT4		MT4			3981</div><div class='add'>+jumbo_d			MACH_JUMBO_D		JUMBO_D			3982</div><div class='add'>+jumbo_i			MACH_JUMBO_I		JUMBO_I			3983</div><div class='add'>+fs20_dmp		MACH_FS20_DMP		FS20_DMP		3984</div><div class='add'>+dns320			MACH_DNS320		DNS320			3985</div><div class='add'>+mx28bacos		MACH_MX28BACOS		MX28BACOS		3986</div><div class='add'>+tl80			MACH_TL80		TL80			3987</div><div class='add'>+polatis_nic_1001	MACH_POLATIS_NIC_1001	POLATIS_NIC_1001	3988</div><div class='add'>+tely			MACH_TELY		TELY			3989</div><div class='add'>+u8520			MACH_U8520		U8520			3990</div><div class='add'>+manta			MACH_MANTA		MANTA			3991</div><div class='add'>+mpq8064_cdp		MACH_MPQ8064_CDP	MPQ8064_CDP		3993</div><div class='add'>+mpq8064_dtv		MACH_MPQ8064_DTV	MPQ8064_DTV		3995</div><div class='add'>+dm368som		MACH_DM368SOM		DM368SOM		3996</div><div class='add'>+gprisb2			MACH_GPRISB2		GPRISB2			3997</div><div class='add'>+chammid			MACH_CHAMMID		CHAMMID			3998</div><div class='add'>+seoul2			MACH_SEOUL2		SEOUL2			3999</div><div class='add'>+omap4_nooktablet	MACH_OMAP4_NOOKTABLET	OMAP4_NOOKTABLET	4000</div><div class='add'>+aalto			MACH_AALTO		AALTO			4001</div><div class='add'>+metro			MACH_METRO		METRO			4002</div><div class='add'>+cydm3730		MACH_CYDM3730		CYDM3730		4003</div><div class='add'>+tqma53			MACH_TQMA53		TQMA53			4004</div><div class='add'>+msm7627a_qrd3		MACH_MSM7627A_QRD3	MSM7627A_QRD3		4005</div><div class='add'>+mx28_canby		MACH_MX28_CANBY		MX28_CANBY		4006</div><div class='add'>+tiger			MACH_TIGER		TIGER			4007</div><div class='add'>+pcats_9307_type_a	MACH_PCATS_9307_TYPE_A	PCATS_9307_TYPE_A	4008</div><div class='add'>+pcats_9307_type_o	MACH_PCATS_9307_TYPE_O	PCATS_9307_TYPE_O	4009</div><div class='add'>+pcats_9307_type_r	MACH_PCATS_9307_TYPE_R	PCATS_9307_TYPE_R	4010</div><div class='add'>+streamplug		MACH_STREAMPLUG		STREAMPLUG		4011</div><div class='add'>+icechicken_dev		MACH_ICECHICKEN_DEV	ICECHICKEN_DEV		4012</div><div class='add'>+hedgehog		MACH_HEDGEHOG		HEDGEHOG		4013</div><div class='add'>+yusend_obc		MACH_YUSEND_OBC		YUSEND_OBC		4014</div><div class='add'>+imxninja		MACH_IMXNINJA		IMXNINJA		4015</div><div class='add'>+omap4_jarod		MACH_OMAP4_JAROD	OMAP4_JAROD		4016</div><div class='add'>+eco5_pk			MACH_ECO5_PK		ECO5_PK			4017</div><div class='add'>+qj2440			MACH_QJ2440		QJ2440			4018</div><div class='add'>+mx6q_mercury		MACH_MX6Q_MERCURY	MX6Q_MERCURY		4019</div><div class='add'>+cm6810			MACH_CM6810		CM6810			4020</div><div class='add'>+omap4_torpedo		MACH_OMAP4_TORPEDO	OMAP4_TORPEDO		4021</div><div class='add'>+nsa310			MACH_NSA310		NSA310			4022</div><div class='add'>+tmx536			MACH_TMX536		TMX536			4023</div><div class='add'>+ktt20			MACH_KTT20		KTT20			4024</div><div class='add'>+dragonix		MACH_DRAGONIX		DRAGONIX		4025</div><div class='add'>+lungching		MACH_LUNGCHING		LUNGCHING		4026</div><div class='add'>+bulogics		MACH_BULOGICS		BULOGICS		4027</div><div class='add'>+mx535_sx		MACH_MX535_SX		MX535_SX		4028</div><div class='add'>+ngui3250		MACH_NGUI3250		NGUI3250		4029</div><div class='add'>+salutec_dac		MACH_SALUTEC_DAC	SALUTEC_DAC		4030</div><div class='add'>+loco			MACH_LOCO		LOCO			4031</div><div class='add'>+ctera_plug_usi		MACH_CTERA_PLUG_USI	CTERA_PLUG_USI		4032</div><div class='add'>+scepter			MACH_SCEPTER		SCEPTER			4033</div><div class='add'>+sga			MACH_SGA		SGA			4034</div><div class='add'>+p_81_j5			MACH_P_81_J5		P_81_J5			4035</div><div class='add'>+p_81_o4			MACH_P_81_O4		P_81_O4			4036</div><div class='add'>+msm8625_surf		MACH_MSM8625_SURF	MSM8625_SURF		4037</div><div class='add'>+carallon_shark		MACH_CARALLON_SHARK	CARALLON_SHARK		4038</div><div class='add'>+ordog			MACH_ORDOG		ORDOG			4040</div><div class='add'>+puente_io		MACH_PUENTE_IO		PUENTE_IO		4041</div><div class='add'>+msm8625_evb		MACH_MSM8625_EVB	MSM8625_EVB		4042</div><div class='add'>+ev_am1707		MACH_EV_AM1707		EV_AM1707		4043</div><div class='add'>+ev_am1707e2		MACH_EV_AM1707E2	EV_AM1707E2		4044</div><div class='add'>+ev_am3517e2		MACH_EV_AM3517E2	EV_AM3517E2		4045</div><div class='add'>+calabria		MACH_CALABRIA		CALABRIA		4046</div><div class='add'>+ev_imx287		MACH_EV_IMX287		EV_IMX287		4047</div><div class='add'>+erau			MACH_ERAU		ERAU			4048</div><div class='add'>+sichuan			MACH_SICHUAN		SICHUAN			4049</div><div class='add'>+davinci_da850		MACH_DAVINCI_DA850	DAVINCI_DA850		4051</div><div class='add'>+omap138_trunarc		MACH_OMAP138_TRUNARC	OMAP138_TRUNARC		4052</div><div class='add'>+bcm4761			MACH_BCM4761		BCM4761			4053</div><div class='add'>+picasso_e2		MACH_PICASSO_E2		PICASSO_E2		4054</div><div class='add'>+picasso_mf		MACH_PICASSO_MF		PICASSO_MF		4055</div><div class='add'>+miro			MACH_MIRO		MIRO			4056</div><div class='add'>+at91sam9g20ewon3	MACH_AT91SAM9G20EWON3	AT91SAM9G20EWON3	4057</div><div class='add'>+yoyo			MACH_YOYO		YOYO			4058</div><div class='add'>+windjkl			MACH_WINDJKL		WINDJKL			4059</div><div class='add'>+monarudo		MACH_MONARUDO		MONARUDO		4060</div><div class='add'>+batan			MACH_BATAN		BATAN			4061</div><div class='add'>+tadao			MACH_TADAO		TADAO			4062</div><div class='add'>+baso			MACH_BASO		BASO			4063</div><div class='add'>+mahon			MACH_MAHON		MAHON			4064</div><div class='add'>+villec2			MACH_VILLEC2		VILLEC2			4065</div><div class='add'>+asi1230			MACH_ASI1230		ASI1230			4066</div><div class='add'>+alaska			MACH_ALASKA		ALASKA			4067</div><div class='add'>+swarco_shdsl2		MACH_SWARCO_SHDSL2	SWARCO_SHDSL2		4068</div><div class='add'>+oxrtu			MACH_OXRTU		OXRTU			4069</div><div class='add'>+omap5_panda		MACH_OMAP5_PANDA	OMAP5_PANDA		4070</div><div class='add'>+c8000			MACH_C8000		C8000			4072</div><div class='add'>+bje_display3_5		MACH_BJE_DISPLAY3_5	BJE_DISPLAY3_5		4073</div><div class='add'>+picomod7		MACH_PICOMOD7		PICOMOD7		4074</div><div class='add'>+picocom5		MACH_PICOCOM5		PICOCOM5		4075</div><div class='add'>+qblissa8		MACH_QBLISSA8		QBLISSA8		4076</div><div class='add'>+armstonea8		MACH_ARMSTONEA8		ARMSTONEA8		4077</div><div class='add'>+netdcu14		MACH_NETDCU14		NETDCU14		4078</div><div class='add'>+at91sam9x5_epiphan	MACH_AT91SAM9X5_EPIPHAN	AT91SAM9X5_EPIPHAN	4079</div><div class='add'>+p2u			MACH_P2U		P2U			4080</div><div class='add'>+doris			MACH_DORIS		DORIS			4081</div><div class='add'>+j49			MACH_J49		J49			4082</div><div class='add'>+vdss2e			MACH_VDSS2E		VDSS2E			4083</div><div class='add'>+vc300			MACH_VC300		VC300			4084</div><div class='add'>+ns115_pad_test		MACH_NS115_PAD_TEST	NS115_PAD_TEST		4085</div><div class='add'>+ns115_pad_ref		MACH_NS115_PAD_REF	NS115_PAD_REF		4086</div><div class='add'>+ns115_phone_test	MACH_NS115_PHONE_TEST	NS115_PHONE_TEST	4087</div><div class='add'>+ns115_phone_ref		MACH_NS115_PHONE_REF	NS115_PHONE_REF		4088</div><div class='add'>+golfc			MACH_GOLFC		GOLFC			4089</div><div class='add'>+xerox_olympus		MACH_XEROX_OLYMPUS	XEROX_OLYMPUS		4090</div><div class='add'>+mx6sl_arm2		MACH_MX6SL_ARM2		MX6SL_ARM2		4091</div><div class='add'>+csb1701_csb1726		MACH_CSB1701_CSB1726	CSB1701_CSB1726		4092</div><div class='add'>+at91sam9xeek		MACH_AT91SAM9XEEK	AT91SAM9XEEK		4093</div><div class='add'>+ebv210			MACH_EBV210		EBV210			4094</div><div class='add'>+msm7627a_qrd7		MACH_MSM7627A_QRD7	MSM7627A_QRD7		4095</div><div class='add'>+svthin			MACH_SVTHIN		SVTHIN			4096</div><div class='add'>+duovero			MACH_DUOVERO		DUOVERO			4097</div><div class='add'>+chupacabra		MACH_CHUPACABRA		CHUPACABRA		4098</div><div class='add'>+scorpion		MACH_SCORPION		SCORPION		4099</div><div class='add'>+davinci_he_hmi10	MACH_DAVINCI_HE_HMI10	DAVINCI_HE_HMI10	4100</div><div class='add'>+topkick			MACH_TOPKICK		TOPKICK			4101</div><div class='add'>+m3_auguestrush		MACH_M3_AUGUESTRUSH	M3_AUGUESTRUSH		4102</div><div class='add'>+ipc335x			MACH_IPC335X		IPC335X			4103</div><div class='add'>+sun4i			MACH_SUN4I		SUN4I			4104</div><div class='add'>+imx233_olinuxino	MACH_IMX233_OLINUXINO	IMX233_OLINUXINO	4105</div><div class='add'>+k2_wl			MACH_K2_WL		K2_WL			4106</div><div class='add'>+k2_ul			MACH_K2_UL		K2_UL			4107</div><div class='add'>+k2_cl			MACH_K2_CL		K2_CL			4108</div><div class='add'>+minbari_w		MACH_MINBARI_W		MINBARI_W		4109</div><div class='add'>+minbari_m		MACH_MINBARI_M		MINBARI_M		4110</div><div class='add'>+k035			MACH_K035		K035			4111</div><div class='add'>+ariel			MACH_ARIEL		ARIEL			4112</div><div class='add'>+arielsaarc		MACH_ARIELSAARC		ARIELSAARC		4113</div><div class='add'>+arieldkb		MACH_ARIELDKB		ARIELDKB		4114</div><div class='add'>+armadillo810		MACH_ARMADILLO810	ARMADILLO810		4115</div><div class='add'>+tam335x			MACH_TAM335X		TAM335X			4116</div><div class='add'>+grouper			MACH_GROUPER		GROUPER			4117</div><div class='add'>+mpcsa21_9g20		MACH_MPCSA21_9G20	MPCSA21_9G20		4118</div><div class='add'>+m6u_cpu			MACH_M6U_CPU		M6U_CPU			4119</div><div class='add'>+davinci_dp10		MACH_DAVINCI_DP10	DAVINCI_DP10		4120</div><div class='add'>+ginkgo			MACH_GINKGO		GINKGO			4121</div><div class='add'>+cgt_qmx6		MACH_CGT_QMX6		CGT_QMX6		4122</div><div class='add'>+profpga			MACH_PROFPGA		PROFPGA			4123</div><div class='add'>+acfx100oc		MACH_ACFX100OC		ACFX100OC		4124</div><div class='add'>+acfx100nb		MACH_ACFX100NB		ACFX100NB		4125</div><div class='add'>+capricorn		MACH_CAPRICORN		CAPRICORN		4126</div><div class='add'>+pisces			MACH_PISCES		PISCES			4127</div><div class='add'>+aries			MACH_ARIES		ARIES			4128</div><div class='add'>+cancer			MACH_CANCER		CANCER			4129</div><div class='add'>+leo			MACH_LEO		LEO			4130</div><div class='add'>+virgo			MACH_VIRGO		VIRGO			4131</div><div class='add'>+sagittarius		MACH_SAGITTARIUS	SAGITTARIUS		4132</div><div class='add'>+devil			MACH_DEVIL		DEVIL			4133</div><div class='add'>+ballantines		MACH_BALLANTINES	BALLANTINES		4134</div><div class='add'>+omap3_procerusvpu	MACH_OMAP3_PROCERUSVPU	OMAP3_PROCERUSVPU	4135</div><div class='add'>+my27			MACH_MY27		MY27			4136</div><div class='add'>+sun6i			MACH_SUN6I		SUN6I			4137</div><div class='add'>+sun5i			MACH_SUN5I		SUN5I			4138</div><div class='add'>+mx512_mx		MACH_MX512_MX		MX512_MX		4139</div><div class='add'>+kzm9g			MACH_KZM9G		KZM9G			4140</div><div class='add'>+vdstbn			MACH_VDSTBN		VDSTBN			4141</div><div class='add'>+cfa10036		MACH_CFA10036		CFA10036		4142</div><div class='add'>+cfa10049		MACH_CFA10049		CFA10049		4143</div><div class='add'>+pcm051			MACH_PCM051		PCM051			4144</div><div class='add'>+vybrid_vf7xx		MACH_VYBRID_VF7XX	VYBRID_VF7XX		4145</div><div class='add'>+vybrid_vf6xx		MACH_VYBRID_VF6XX	VYBRID_VF6XX		4146</div><div class='add'>+vybrid_vf5xx		MACH_VYBRID_VF5XX	VYBRID_VF5XX		4147</div><div class='add'>+vybrid_vf4xx		MACH_VYBRID_VF4XX	VYBRID_VF4XX		4148</div><div class='add'>+aria_g25		MACH_ARIA_G25		ARIA_G25		4149</div><div class='add'>+bcm21553		MACH_BCM21553		BCM21553		4150</div><div class='add'>+smdk5410		MACH_SMDK5410		SMDK5410		4151</div><div class='add'>+lpc18xx			MACH_LPC18XX		LPC18XX			4152</div><div class='add'>+oratisparty		MACH_ORATISPARTY	ORATISPARTY		4153</div><div class='add'>+qseven			MACH_QSEVEN		QSEVEN			4154</div><div class='add'>+gmv_generic		MACH_GMV_GENERIC	GMV_GENERIC		4155</div><div class='add'>+th_link_eth		MACH_TH_LINK_ETH	TH_LINK_ETH		4156</div><div class='add'>+tn_muninn		MACH_TN_MUNINN		TN_MUNINN		4157</div><div class='add'>+rampage			MACH_RAMPAGE		RAMPAGE			4158</div><div class='add'>+visstrim_mv10		MACH_VISSTRIM_MV10	VISSTRIM_MV10		4159</div><div class='add'>+mx28_wilma		MACH_MX28_WILMA		MX28_WILMA		4164</div><div class='add'>+msm8625_ffa		MACH_MSM8625_FFA	MSM8625_FFA		4166</div><div class='add'>+vpu101			MACH_VPU101		VPU101			4167</div><div class='add'>+baileys			MACH_BAILEYS		BAILEYS			4169</div><div class='add'>+familybox		MACH_FAMILYBOX		FAMILYBOX		4170</div><div class='add'>+ensemble_mx35		MACH_ENSEMBLE_MX35	ENSEMBLE_MX35		4171</div><div class='add'>+sc_sps_1		MACH_SC_SPS_1		SC_SPS_1		4172</div><div class='head'>diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c<br/>index 858748eaa144..586961929e96 100644<br/>--- a/<a href='/drm-misc/tree/arch/arm/vfp/vfpmodule.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/arm/vfp/vfpmodule.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/arm/vfp/vfpmodule.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/arm/vfp/vfpmodule.c</a></div><div class='hunk'>@@ -11,12 +11,15 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/cpu_pm.h&gt;</div><div class='add'>+#include &lt;linux/hardirq.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/notifier.h&gt;</div><div class='ctx'> #include &lt;linux/signal.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/user.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cp15.h&gt;</div><div class='ctx'> #include &lt;asm/cputype.h&gt;</div><div class='hunk'>@@ -238,11 +241,11 @@ static void vfp_panic(char *reason, u32 inst)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_ERR "VFP: Error: %s\n", reason);</div><div class='del'>-	printk(KERN_ERR "VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",</div><div class='add'>+	pr_err("VFP: Error: %s\n", reason);</div><div class='add'>+	pr_err("VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",</div><div class='ctx'> 		fmrx(FPEXC), fmrx(FPSCR), inst);</div><div class='ctx'> 	for (i = 0; i &lt; 32; i += 2)</div><div class='del'>-		printk(KERN_ERR "VFP: s%2u: 0x%08x s%2u: 0x%08x\n",</div><div class='add'>+		pr_err("VFP: s%2u: 0x%08x s%2u: 0x%08x\n",</div><div class='ctx'> 		       i, vfp_get_float(i), i+1, vfp_get_float(i+1));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -430,7 +433,10 @@ void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> static void vfp_enable(void *unused)</div><div class='ctx'> {</div><div class='del'>-	u32 access = get_copro_access();</div><div class='add'>+	u32 access;</div><div class='add'>+</div><div class='add'>+	BUG_ON(preemptible());</div><div class='add'>+	access = get_copro_access();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Enable full access to VFP (cp10 and cp11)</div><div class='hunk'>@@ -446,7 +452,7 @@ static int vfp_pm_suspend(void)</div><div class='ctx'> </div><div class='ctx'> 	/* if vfp is on, then save state for resumption */</div><div class='ctx'> 	if (fpexc &amp; FPEXC_EN) {</div><div class='del'>-		printk(KERN_DEBUG "%s: saving vfp state\n", __func__);</div><div class='add'>+		pr_debug("%s: saving vfp state\n", __func__);</div><div class='ctx'> 		vfp_save_state(&amp;ti-&gt;vfpstate, fpexc);</div><div class='ctx'> </div><div class='ctx'> 		/* disable, just in case */</div><div class='hunk'>@@ -529,6 +535,93 @@ void vfp_flush_hwstate(struct thread_info *thread)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Save the current VFP state into the provided structures and prepare</div><div class='add'>+ * for entry into a new function (signal handler).</div><div class='add'>+ */</div><div class='add'>+int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp,</div><div class='add'>+				    struct user_vfp_exc __user *ufp_exc)</div><div class='add'>+{</div><div class='add'>+	struct thread_info *thread = current_thread_info();</div><div class='add'>+	struct vfp_hard_struct *hwstate = &amp;thread-&gt;vfpstate.hard;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	/* Ensure that the saved hwstate is up-to-date. */</div><div class='add'>+	vfp_sync_hwstate(thread);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Copy the floating point registers. There can be unused</div><div class='add'>+	 * registers see asm/hwcap.h for details.</div><div class='add'>+	 */</div><div class='add'>+	err |= __copy_to_user(&amp;ufp-&gt;fpregs, &amp;hwstate-&gt;fpregs,</div><div class='add'>+			      sizeof(hwstate-&gt;fpregs));</div><div class='add'>+	/*</div><div class='add'>+	 * Copy the status and control register.</div><div class='add'>+	 */</div><div class='add'>+	__put_user_error(hwstate-&gt;fpscr, &amp;ufp-&gt;fpscr, err);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Copy the exception registers.</div><div class='add'>+	 */</div><div class='add'>+	__put_user_error(hwstate-&gt;fpexc, &amp;ufp_exc-&gt;fpexc, err);</div><div class='add'>+	__put_user_error(hwstate-&gt;fpinst, &amp;ufp_exc-&gt;fpinst, err);</div><div class='add'>+	__put_user_error(hwstate-&gt;fpinst2, &amp;ufp_exc-&gt;fpinst2, err);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/* Ensure that VFP is disabled. */</div><div class='add'>+	vfp_flush_hwstate(thread);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * As per the PCS, clear the length and stride bits for function</div><div class='add'>+	 * entry.</div><div class='add'>+	 */</div><div class='add'>+	hwstate-&gt;fpscr &amp;= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Sanitise and restore the current VFP state from the provided structures. */</div><div class='add'>+int vfp_restore_user_hwstate(struct user_vfp __user *ufp,</div><div class='add'>+			     struct user_vfp_exc __user *ufp_exc)</div><div class='add'>+{</div><div class='add'>+	struct thread_info *thread = current_thread_info();</div><div class='add'>+	struct vfp_hard_struct *hwstate = &amp;thread-&gt;vfpstate.hard;</div><div class='add'>+	unsigned long fpexc;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	/* Disable VFP to avoid corrupting the new thread state. */</div><div class='add'>+	vfp_flush_hwstate(thread);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Copy the floating point registers. There can be unused</div><div class='add'>+	 * registers see asm/hwcap.h for details.</div><div class='add'>+	 */</div><div class='add'>+	err |= __copy_from_user(&amp;hwstate-&gt;fpregs, &amp;ufp-&gt;fpregs,</div><div class='add'>+				sizeof(hwstate-&gt;fpregs));</div><div class='add'>+	/*</div><div class='add'>+	 * Copy the status and control register.</div><div class='add'>+	 */</div><div class='add'>+	__get_user_error(hwstate-&gt;fpscr, &amp;ufp-&gt;fpscr, err);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Sanitise and restore the exception registers.</div><div class='add'>+	 */</div><div class='add'>+	__get_user_error(fpexc, &amp;ufp_exc-&gt;fpexc, err);</div><div class='add'>+</div><div class='add'>+	/* Ensure the VFP is enabled. */</div><div class='add'>+	fpexc |= FPEXC_EN;</div><div class='add'>+</div><div class='add'>+	/* Ensure FPINST2 is invalid and the exception flag is cleared. */</div><div class='add'>+	fpexc &amp;= ~(FPEXC_EX | FPEXC_FP2V);</div><div class='add'>+	hwstate-&gt;fpexc = fpexc;</div><div class='add'>+</div><div class='add'>+	__get_user_error(hwstate-&gt;fpinst, &amp;ufp_exc-&gt;fpinst, err);</div><div class='add'>+	__get_user_error(hwstate-&gt;fpinst2, &amp;ufp_exc-&gt;fpinst2, err);</div><div class='add'>+</div><div class='add'>+	return err ? -EFAULT : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * VFP hardware can lose all context when a CPU goes offline.</div><div class='ctx'>  * As we will be running in SMP mode with CPU hotplug, we will save the</div><div class='ctx'>  * hardware state at every thread switch.  We clear our held state when</div><div class='hunk'>@@ -558,7 +651,7 @@ static int __init vfp_init(void)</div><div class='ctx'> 	unsigned int cpu_arch = cpu_architecture();</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_arch &gt;= CPU_ARCH_ARMv6)</div><div class='del'>-		vfp_enable(NULL);</div><div class='add'>+		on_each_cpu(vfp_enable, NULL, 1);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * First check that there is a VFP that we can use.</div><div class='hunk'>@@ -571,18 +664,16 @@ static int __init vfp_init(void)</div><div class='ctx'> 	barrier();</div><div class='ctx'> 	vfp_vector = vfp_null_entry;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "VFP support v0.3: ");</div><div class='add'>+	pr_info("VFP support v0.3: ");</div><div class='ctx'> 	if (VFP_arch)</div><div class='del'>-		printk("not present\n");</div><div class='add'>+		pr_cont("not present\n");</div><div class='ctx'> 	else if (vfpsid &amp; FPSID_NODOUBLE) {</div><div class='del'>-		printk("no double precision support\n");</div><div class='add'>+		pr_cont("no double precision support\n");</div><div class='ctx'> 	} else {</div><div class='ctx'> 		hotcpu_notifier(vfp_hotplug, 0);</div><div class='ctx'> </div><div class='del'>-		smp_call_function(vfp_enable, NULL, 1);</div><div class='del'>-</div><div class='ctx'> 		VFP_arch = (vfpsid &amp; FPSID_ARCH_MASK) &gt;&gt; FPSID_ARCH_BIT;  /* Extract the architecture version */</div><div class='del'>-		printk("implementor %02x architecture %d part %02x variant %x rev %x\n",</div><div class='add'>+		pr_cont("implementor %02x architecture %d part %02x variant %x rev %x\n",</div><div class='ctx'> 			(vfpsid &amp; FPSID_IMPLEMENTER_MASK) &gt;&gt; FPSID_IMPLEMENTER_BIT,</div><div class='ctx'> 			(vfpsid &amp; FPSID_ARCH_MASK) &gt;&gt; FPSID_ARCH_BIT,</div><div class='ctx'> 			(vfpsid &amp; FPSID_PART_MASK) &gt;&gt; FPSID_PART_BIT,</div><div class='head'>diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig<br/>index 3dea7231f637..71d38c76726c 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/avr32/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/Kconfig</a></div><div class='hunk'>@@ -11,7 +11,9 @@ config AVR32</div><div class='ctx'> 	select GENERIC_ATOMIC64</div><div class='ctx'> 	select HARDIRQS_SW_RESEND</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='add'>+	select ARCH_HAVE_CUSTOM_GPIO_H</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='ctx'> 	help</div><div class='ctx'> 	  AVR32 is a high-performance 32-bit RISC microprocessor core,</div><div class='ctx'> 	  designed for cost-sensitive embedded applications, with particular</div><div class='hunk'>@@ -35,9 +37,6 @@ config TRACE_IRQFLAGS_SUPPORT</div><div class='ctx'> config RWSEM_GENERIC_SPINLOCK</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config RWSEM_XCHGADD_ALGORITHM</div><div class='ctx'> 	def_bool n</div><div class='ctx'> </div><div class='hunk'>@@ -63,8 +62,6 @@ source "kernel/Kconfig.freezer"</div><div class='ctx'> </div><div class='ctx'> menu "System Type and features"</div><div class='ctx'> </div><div class='del'>-source "kernel/time/Kconfig"</div><div class='del'>-</div><div class='ctx'> config SUBARCH_AVR32B</div><div class='ctx'> 	bool</div><div class='ctx'> config MMU</div><div class='head'>diff --git a/arch/avr32/include/asm/kvm_para.h b/arch/avr32/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/avr32/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/avr32/include/asm/posix_types.h b/arch/avr32/include/asm/posix_types.h<br/>index 74667bfc88cc..9ba9e749b3f3 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/avr32/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/include/asm/posix_types.h</a></div><div class='hunk'>@@ -17,9 +17,6 @@</div><div class='ctx'> typedef unsigned short  __kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned short  __kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned short  __kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> </div><div class='head'>diff --git a/arch/avr32/include/asm/processor.h b/arch/avr32/include/asm/processor.h<br/>index 108502bc6770..87d8baccc60e 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/avr32/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/include/asm/processor.h</a></div><div class='hunk'>@@ -145,9 +145,6 @@ extern void release_thread(struct task_struct *);</div><div class='ctx'> /* Create a kernel thread without removing it from tasklists */</div><div class='ctx'> extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-#define prepare_to_copy(tsk) do { } while(0)</div><div class='del'>-</div><div class='ctx'> /* Return saved PC of a blocked thread */</div><div class='ctx'> #define thread_saved_pc(tsk)    ((tsk)-&gt;thread.cpu_context.pc)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/avr32/include/asm/signal.h b/arch/avr32/include/asm/signal.h<br/>index 8790dfc10d5b..ae56849fdb2b 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/include/asm/signal.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/avr32/include/asm/signal.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/include/asm/signal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/include/asm/signal.h</a></div><div class='hunk'>@@ -115,13 +115,6 @@ typedef unsigned long sigset_t;</div><div class='ctx'> #include &lt;asm-generic/signal-defs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='del'>-struct old_sigaction {</div><div class='del'>-	__sighandler_t sa_handler;</div><div class='del'>-	old_sigset_t sa_mask;</div><div class='del'>-	unsigned long sa_flags;</div><div class='del'>-	__sigrestore_t sa_restorer;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct sigaction {</div><div class='ctx'> 	__sighandler_t sa_handler;</div><div class='ctx'> 	unsigned long sa_flags;</div><div class='head'>diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile<br/>index 18229d0d1861..9e2c465ef3a6 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/avr32/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/kernel/Makefile</a></div><div class='hunk'>@@ -8,7 +8,7 @@ obj-$(CONFIG_SUBARCH_AVR32B)	+= entry-avr32b.o</div><div class='ctx'> obj-y				+= syscall_table.o syscall-stubs.o irq.o</div><div class='ctx'> obj-y				+= setup.o traps.o ocd.o ptrace.o</div><div class='ctx'> obj-y				+= signal.o sys_avr32.o process.o time.o</div><div class='del'>-obj-y				+= init_task.o switch_to.o cpu.o</div><div class='add'>+obj-y				+= switch_to.o cpu.o</div><div class='ctx'> obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o</div><div class='ctx'> obj-$(CONFIG_KPROBES)		+= kprobes.o</div><div class='ctx'> obj-$(CONFIG_STACKTRACE)	+= stacktrace.o</div><div class='head'>diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S<br/>index 169268c40ae2..df2884181313 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/kernel/entry-avr32b.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/avr32/kernel/entry-avr32b.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/kernel/entry-avr32b.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/kernel/entry-avr32b.S</a></div><div class='hunk'>@@ -281,7 +281,7 @@ syscall_exit_work:</div><div class='ctx'> 	ld.w	r1, r0[TI_flags]</div><div class='ctx'> 	rjmp	1b</div><div class='ctx'> </div><div class='del'>-2:	mov	r2, _TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NOTIFY_RESUME</div><div class='add'>+2:	mov	r2, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME</div><div class='ctx'> 	tst	r1, r2</div><div class='ctx'> 	breq	3f</div><div class='ctx'> 	unmask_interrupts</div><div class='hunk'>@@ -587,7 +587,7 @@ fault_exit_work:</div><div class='ctx'> 	ld.w	r1, r0[TI_flags]</div><div class='ctx'> 	rjmp	fault_exit_work</div><div class='ctx'> </div><div class='del'>-1:	mov	r2, _TIF_SIGPENDING | _TIF_RESTORE_SIGMASK</div><div class='add'>+1:	mov	r2, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME</div><div class='ctx'> 	tst	r1, r2</div><div class='ctx'> 	breq	2f</div><div class='ctx'> 	unmask_interrupts</div><div class='head'>diff --git a/arch/avr32/kernel/init_task.c b/arch/avr32/kernel/init_task.c<br/>deleted file mode 100644<br/>index 6b2343e6fe33..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/avr32/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/avr32/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,31 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2004-2006 Atmel Corporation</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure. Must be aligned on an 8192-byte boundary.</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/avr32/kernel/signal.c b/arch/avr32/kernel/signal.c<br/>index 64f886fac2ef..d552a854dacc 100644<br/>--- a/<a href='/drm-misc/tree/arch/avr32/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/avr32/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/avr32/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/avr32/kernel/signal.c</a></div><div class='hunk'>@@ -22,8 +22,6 @@</div><div class='ctx'> #include &lt;asm/ucontext.h&gt;</div><div class='ctx'> #include &lt;asm/syscalls.h&gt;</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,</div><div class='ctx'> 			       struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -77,6 +75,9 @@ asmlinkage int sys_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	struct rt_sigframe __user *frame;</div><div class='ctx'> 	sigset_t set;</div><div class='ctx'> </div><div class='add'>+	/* Always make any pending restarted system calls return -EINTR */</div><div class='add'>+	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='add'>+</div><div class='ctx'> 	frame = (struct rt_sigframe __user *)regs-&gt;sp;</div><div class='ctx'> 	pr_debug("SIG return: frame = %p\n", frame);</div><div class='ctx'> </div><div class='hunk'>@@ -86,11 +87,7 @@ asmlinkage int sys_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -224,14 +221,14 @@ static inline void setup_syscall_restart(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='ctx'> handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='del'>-	      sigset_t *oldset, struct pt_regs *regs, int syscall)</div><div class='add'>+	      struct pt_regs *regs, int syscall)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Set up the stack frame</div><div class='ctx'> 	 */</div><div class='del'>-	ret = setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='add'>+	ret = setup_rt_frame(sig, ka, info, sigmask_to_save(), regs);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check that the resulting registers are sane</div><div class='hunk'>@@ -239,21 +236,12 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 	ret |= !valid_user_regs(regs);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Block the signal if we were unsuccessful.</div><div class='add'>+	 * Block the signal if we were successful.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ret != 0 || !(ka-&gt;sa.sa_flags &amp; SA_NODEFER)) {</div><div class='del'>-		spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-		sigorsets(&amp;current-&gt;blocked, &amp;current-&gt;blocked,</div><div class='del'>-			  &amp;ka-&gt;sa.sa_mask);</div><div class='del'>-		sigaddset(&amp;current-&gt;blocked, sig);</div><div class='del'>-		recalc_sigpending();</div><div class='del'>-		spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ret == 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	force_sigsegv(sig, current);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		force_sigsegv(sig, current);</div><div class='add'>+	else</div><div class='add'>+		signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -261,7 +249,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'>  * doesn't want to handle. Thus you cannot kill init even with a</div><div class='ctx'>  * SIGKILL even by mistake.</div><div class='ctx'>  */</div><div class='del'>-int do_signal(struct pt_regs *regs, sigset_t *oldset, int syscall)</div><div class='add'>+static void do_signal(struct pt_regs *regs, int syscall)</div><div class='ctx'> {</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='hunk'>@@ -273,12 +261,7 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset, int syscall)</div><div class='ctx'> 	 * without doing anything if so.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else if (!oldset)</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (syscall) {</div><div class='hunk'>@@ -303,15 +286,11 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset, int syscall)</div><div class='ctx'> </div><div class='ctx'> 	if (signr == 0) {</div><div class='ctx'> 		/* No signal to deliver -- put the saved sigmask back */</div><div class='del'>-		if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-			clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-			sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-		}</div><div class='del'>-		return 0;</div><div class='add'>+		restore_saved_sigmask();</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	handle_signal(signr, &amp;ka, &amp;info, oldset, regs, syscall);</div><div class='del'>-	return 1;</div><div class='add'>+	handle_signal(signr, &amp;ka, &amp;info, regs, syscall);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void do_notify_resume(struct pt_regs *regs, struct thread_info *ti)</div><div class='hunk'>@@ -321,13 +300,11 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, struct thread_info *ti)</div><div class='ctx'> 	if ((sysreg_read(SR) &amp; MODE_MASK) == MODE_SUPERVISOR)</div><div class='ctx'> 		syscall = 1;</div><div class='ctx'> </div><div class='del'>-	if (ti-&gt;flags &amp; (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))</div><div class='del'>-		do_signal(regs, &amp;current-&gt;blocked, syscall);</div><div class='add'>+	if (ti-&gt;flags &amp; _TIF_SIGPENDING)</div><div class='add'>+		do_signal(regs, syscall);</div><div class='ctx'> </div><div class='ctx'> 	if (ti-&gt;flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/blackfin/ADI_BSD.txt b/arch/blackfin/ADI_BSD.txt<br/>deleted file mode 100644<br/>index 501d0b645943..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/ADI_BSD.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/ADI_BSD.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,41 +0,0 @@</div><div class='del'>-This BSD-Style License applies to a few files in ./arch/blackfin directory,</div><div class='del'>-and is included here, so people understand which code they can use outside</div><div class='del'>-the Linux kernel, in non-GPL based projects.</div><div class='del'>-</div><div class='del'>-Using the files released under the "ADI BSD" license, must comply with</div><div class='del'>-these license terms.</div><div class='del'>-</div><div class='del'>---------------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Copyright Analog Devices, Inc.</div><div class='del'>-</div><div class='del'>-All rights reserved.</div><div class='del'>-</div><div class='del'>-Redistribution and use in source and binary forms, with or without</div><div class='del'>-modification, are permitted provided that the following conditions</div><div class='del'>-are met:</div><div class='del'>-  - Redistributions of source code must retain the above copyright</div><div class='del'>-    notice, this list of conditions and the following disclaimer.</div><div class='del'>-  - Redistributions in binary form must reproduce the above copyright</div><div class='del'>-    notice, this list of conditions and the following disclaimer in</div><div class='del'>-    the documentation and/or other materials provided with the</div><div class='del'>-    distribution.</div><div class='del'>-  - Neither the name of Analog Devices, Inc. nor the names of its</div><div class='del'>-    contributors may be used to endorse or promote products derived</div><div class='del'>-    from this software without specific prior written permission.</div><div class='del'>-  - The use of this software may or may not infringe the patent rights</div><div class='del'>-    of one or more patent holders.  This license does not release you</div><div class='del'>-    from the requirement that you obtain separate licenses from these</div><div class='del'>-    patent holders to use this software.</div><div class='del'>-</div><div class='del'>-THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR</div><div class='del'>-IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,</div><div class='del'>-MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.</div><div class='del'>-IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,</div><div class='del'>-INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,</div><div class='del'>-BUT NOT LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF</div><div class='del'>-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR</div><div class='del'>-BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,</div><div class='del'>-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR</div><div class='del'>-OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF</div><div class='del'>-ADVISED OF THE POSSIBILITY OF SUCH DAMAGE</div><div class='head'>diff --git a/arch/blackfin/Clear_BSD.txt b/arch/blackfin/Clear_BSD.txt<br/>new file mode 100644<br/>index 000000000000..bfa4b378a368<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/Clear_BSD.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/Clear_BSD.txt</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+The Clear BSD license:</div><div class='add'>+</div><div class='add'>+Copyright (c) 2012, Analog Devices, Inc.  All rights reserved.</div><div class='add'>+</div><div class='add'>+Redistribution and use in source and binary forms, with or without</div><div class='add'>+modification, are permitted (subject to the limitations in the</div><div class='add'>+disclaimer below) provided that the following conditions are met:</div><div class='add'>+</div><div class='add'>+* Redistributions of source code must retain the above copyright</div><div class='add'>+   notice, this list of conditions and the following disclaimer.</div><div class='add'>+</div><div class='add'>+* Redistributions in binary form must reproduce the above copyright</div><div class='add'>+   notice, this list of conditions and the following disclaimer in the</div><div class='add'>+   documentation and/or other materials provided with the</div><div class='add'>+   distribution.</div><div class='add'>+</div><div class='add'>+* Neither the name of Analog Devices, Inc.  nor the names of its</div><div class='add'>+   contributors may be used to endorse or promote products derived</div><div class='add'>+   from this software without specific prior written permission.</div><div class='add'>+</div><div class='add'>+NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE</div><div class='add'>+GRANTED BY THIS LICENSE.  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT</div><div class='add'>+HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED</div><div class='add'>+WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF</div><div class='add'>+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE</div><div class='add'>+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE</div><div class='add'>+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='add'>+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='add'>+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR</div><div class='add'>+BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,</div><div class='add'>+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE</div><div class='add'>+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN</div><div class='add'>+IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='head'>diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig<br/>index 373a6902d8fa..fef96f47876c 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/Kconfig</a></div><div class='hunk'>@@ -31,12 +31,15 @@ config BLACKFIN</div><div class='ctx'> 	select HAVE_KERNEL_LZO if RAMKERNEL</div><div class='ctx'> 	select HAVE_OPROFILE</div><div class='ctx'> 	select HAVE_PERF_EVENTS</div><div class='add'>+	select ARCH_HAVE_CUSTOM_GPIO_H</div><div class='ctx'> 	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='ctx'> 	select HAVE_GENERIC_HARDIRQS</div><div class='ctx'> 	select GENERIC_ATOMIC64</div><div class='ctx'> 	select GENERIC_IRQ_PROBE</div><div class='ctx'> 	select IRQ_PER_CPU if SMP</div><div class='ctx'> 	select HAVE_NMI_WATCHDOG if NMI_WATCHDOG</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='add'>+	select ARCH_USES_GETTIMEOFFSET if !GENERIC_CLOCKEVENTS</div><div class='ctx'> </div><div class='ctx'> config GENERIC_CSUM</div><div class='ctx'> 	def_bool y</div><div class='hunk'>@@ -226,6 +229,12 @@ config BF561</div><div class='ctx'> 	help</div><div class='ctx'> 	  BF561 Processor Support.</div><div class='ctx'> </div><div class='add'>+config BF609</div><div class='add'>+	bool "BF609"</div><div class='add'>+	select CLKDEV_LOOKUP</div><div class='add'>+	help</div><div class='add'>+	  BF609 Processor Support.</div><div class='add'>+</div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='ctx'> config SMP</div><div class='hunk'>@@ -251,27 +260,27 @@ config HOTPLUG_CPU</div><div class='ctx'> </div><div class='ctx'> config BF_REV_MIN</div><div class='ctx'> 	int</div><div class='del'>-	default 0 if (BF51x || BF52x || (BF54x &amp;&amp; !BF54xM))</div><div class='add'>+	default 0 if (BF51x || BF52x || (BF54x &amp;&amp; !BF54xM)) || BF60x</div><div class='ctx'> 	default 2 if (BF537 || BF536 || BF534)</div><div class='ctx'> 	default 3 if (BF561 || BF533 || BF532 || BF531 || BF54xM)</div><div class='ctx'> 	default 4 if (BF538 || BF539)</div><div class='ctx'> </div><div class='ctx'> config BF_REV_MAX</div><div class='ctx'> 	int</div><div class='del'>-	default 2 if (BF51x || BF52x || (BF54x &amp;&amp; !BF54xM))</div><div class='add'>+	default 2 if (BF51x || BF52x || (BF54x &amp;&amp; !BF54xM)) || BF60x</div><div class='ctx'> 	default 3 if (BF537 || BF536 || BF534 || BF54xM)</div><div class='ctx'> 	default 5 if (BF561 || BF538 || BF539)</div><div class='ctx'> 	default 6 if (BF533 || BF532 || BF531)</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='ctx'> 	prompt "Silicon Rev"</div><div class='del'>-	default BF_REV_0_0 if (BF51x || BF52x)</div><div class='add'>+	default BF_REV_0_0 if (BF51x || BF52x || BF60x)</div><div class='ctx'> 	default BF_REV_0_2 if (BF534 || BF536 || BF537 || (BF54x &amp;&amp; !BF54xM))</div><div class='ctx'> 	default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF54xM || BF561)</div><div class='ctx'> </div><div class='ctx'> config BF_REV_0_0</div><div class='ctx'> 	bool "0.0"</div><div class='del'>-	depends on (BF51x || BF52x || (BF54x &amp;&amp; !BF54xM))</div><div class='add'>+	depends on (BF51x || BF52x || (BF54x &amp;&amp; !BF54xM) || BF60x)</div><div class='ctx'> </div><div class='ctx'> config BF_REV_0_1</div><div class='ctx'> 	bool "0.1"</div><div class='hunk'>@@ -350,6 +359,7 @@ source "arch/blackfin/mach-bf561/Kconfig"</div><div class='ctx'> source "arch/blackfin/mach-bf537/Kconfig"</div><div class='ctx'> source "arch/blackfin/mach-bf538/Kconfig"</div><div class='ctx'> source "arch/blackfin/mach-bf548/Kconfig"</div><div class='add'>+source "arch/blackfin/mach-bf609/Kconfig"</div><div class='ctx'> </div><div class='ctx'> menu "Board customizations"</div><div class='ctx'> </div><div class='hunk'>@@ -379,6 +389,12 @@ config BOOT_LOAD</div><div class='ctx'> 	  memory region is used to capture NULL pointer references as well</div><div class='ctx'> 	  as some core kernel functions.</div><div class='ctx'> </div><div class='add'>+config PHY_RAM_BASE_ADDRESS</div><div class='add'>+	hex "Physical RAM Base"</div><div class='add'>+	default 0x0</div><div class='add'>+	help</div><div class='add'>+	  set BF609 FPGA physical SRAM base address</div><div class='add'>+</div><div class='ctx'> config ROM_BASE</div><div class='ctx'> 	hex "Kernel ROM Base"</div><div class='ctx'> 	depends on ROMKERNEL</div><div class='hunk'>@@ -422,7 +438,7 @@ config BFIN_KERNEL_CLOCK</div><div class='ctx'> </div><div class='ctx'> config PLL_BYPASS</div><div class='ctx'> 	bool "Bypass PLL"</div><div class='del'>-	depends on BFIN_KERNEL_CLOCK</div><div class='add'>+	depends on BFIN_KERNEL_CLOCK &amp;&amp; (!BF60x)</div><div class='ctx'> 	default n</div><div class='ctx'> </div><div class='ctx'> config CLKIN_HALF</div><div class='hunk'>@@ -441,7 +457,7 @@ config VCO_MULT</div><div class='ctx'> 	default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN527_EZKIT_V2 || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM || BFIN538_EZKIT)</div><div class='ctx'> 	default "22" if BFIN533_BLUETECHNIX_CM</div><div class='ctx'> 	default "20" if (BFIN537_BLUETECHNIX_CM_E || BFIN537_BLUETECHNIX_CM_U || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM)</div><div class='del'>-	default "20" if BFIN561_EZKIT</div><div class='add'>+	default "20" if (BFIN561_EZKIT || BF609)</div><div class='ctx'> 	default "16" if (H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN518F_EZBRD)</div><div class='ctx'> 	default "25" if BFIN527_AD7160EVAL</div><div class='ctx'> 	help</div><div class='hunk'>@@ -473,12 +489,45 @@ config SCLK_DIV</div><div class='ctx'> 	int "System Clock Divider"</div><div class='ctx'> 	depends on BFIN_KERNEL_CLOCK</div><div class='ctx'> 	range 1 15</div><div class='del'>-	default 5</div><div class='add'>+	default 4</div><div class='ctx'> 	help</div><div class='del'>-	  This sets the frequency of the system clock (including SDRAM or DDR).</div><div class='add'>+	  This sets the frequency of the system clock (including SDRAM or DDR) on</div><div class='add'>+	  !BF60x else it set the clock for system buses and provides the</div><div class='add'>+	  source from which SCLK0 and SCLK1 are derived.</div><div class='ctx'> 	  This can be between 1 and 15</div><div class='ctx'> 	  System Clock = (PLL frequency) / (this setting)</div><div class='ctx'> </div><div class='add'>+config SCLK0_DIV</div><div class='add'>+	int "System Clock0 Divider"</div><div class='add'>+	depends on BFIN_KERNEL_CLOCK &amp;&amp; BF60x</div><div class='add'>+	range 1 15</div><div class='add'>+	default 1</div><div class='add'>+	help</div><div class='add'>+	  This sets the frequency of the system clock0 for PVP and all other</div><div class='add'>+	  peripherals not clocked by SCLK1.</div><div class='add'>+	  This can be between 1 and 15</div><div class='add'>+	  System Clock0 = (System Clock) / (this setting)</div><div class='add'>+</div><div class='add'>+config SCLK1_DIV</div><div class='add'>+	int "System Clock1 Divider"</div><div class='add'>+	depends on BFIN_KERNEL_CLOCK &amp;&amp; BF60x</div><div class='add'>+	range 1 15</div><div class='add'>+	default 1</div><div class='add'>+	help</div><div class='add'>+	  This sets the frequency of the system clock1 (including SPORT, SPI and ACM).</div><div class='add'>+	  This can be between 1 and 15</div><div class='add'>+	  System Clock1 = (System Clock) / (this setting)</div><div class='add'>+</div><div class='add'>+config DCLK_DIV</div><div class='add'>+	int "DDR Clock Divider"</div><div class='add'>+	depends on BFIN_KERNEL_CLOCK &amp;&amp; BF60x</div><div class='add'>+	range 1 15</div><div class='add'>+	default 2</div><div class='add'>+	help</div><div class='add'>+	  This sets the frequency of the DDR memory.</div><div class='add'>+	  This can be between 1 and 15</div><div class='add'>+	  DDR Clock = (PLL frequency) / (this setting)</div><div class='add'>+</div><div class='ctx'> choice</div><div class='ctx'> 	prompt "DDR SDRAM Chip Type"</div><div class='ctx'> 	depends on BFIN_KERNEL_CLOCK</div><div class='hunk'>@@ -494,7 +543,7 @@ endchoice</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='ctx'> 	prompt "DDR/SDRAM Timing"</div><div class='del'>-	depends on BFIN_KERNEL_CLOCK</div><div class='add'>+	depends on BFIN_KERNEL_CLOCK &amp;&amp; !BF60x</div><div class='ctx'> 	default BFIN_KERNEL_CLOCK_MEMINIT_CALC</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option allows you to specify Blackfin SDRAM/DDR Timing parameters</div><div class='hunk'>@@ -576,6 +625,7 @@ config MAX_VCO_HZ</div><div class='ctx'> 	default 600000000 if BF548</div><div class='ctx'> 	default 533333333 if BF549</div><div class='ctx'> 	default 600000000 if BF561</div><div class='add'>+	default 800000000 if BF609</div><div class='ctx'> </div><div class='ctx'> config MIN_VCO_HZ</div><div class='ctx'> 	int</div><div class='hunk'>@@ -583,6 +633,7 @@ config MIN_VCO_HZ</div><div class='ctx'> </div><div class='ctx'> config MAX_SCLK_HZ</div><div class='ctx'> 	int</div><div class='add'>+	default 200000000 if BF609</div><div class='ctx'> 	default 133333333</div><div class='ctx'> </div><div class='ctx'> config MIN_SCLK_HZ</div><div class='hunk'>@@ -593,9 +644,10 @@ comment "Kernel Timer/Scheduler"</div><div class='ctx'> </div><div class='ctx'> source kernel/Kconfig.hz</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='add'>+config SET_GENERIC_CLOCKEVENTS</div><div class='ctx'> 	bool "Generic clock events"</div><div class='ctx'> 	default y</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='ctx'> </div><div class='ctx'> menu "Clock event device"</div><div class='ctx'> 	depends on GENERIC_CLOCKEVENTS</div><div class='hunk'>@@ -629,12 +681,6 @@ config GPTMR0_CLOCKSOURCE</div><div class='ctx'> 	depends on !TICKSOURCE_GPTMR0</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='del'>-config ARCH_USES_GETTIMEOFFSET</div><div class='del'>-	depends on !GENERIC_CLOCKEVENTS</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='del'>-source kernel/time/Kconfig</div><div class='del'>-</div><div class='ctx'> comment "Misc"</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='hunk'>@@ -1051,7 +1097,7 @@ endchoice</div><div class='ctx'> config BFIN_L2_DCACHEABLE</div><div class='ctx'> 	bool "Enable DCACHE for L2 SRAM"</div><div class='ctx'> 	depends on BFIN_DCACHE</div><div class='del'>-	depends on (BF54x || BF561) &amp;&amp; !SMP</div><div class='add'>+	depends on (BF54x || BF561 || BF60x) &amp;&amp; !SMP</div><div class='ctx'> 	default n</div><div class='ctx'> choice</div><div class='ctx'> 	prompt "L2 SRAM DCACHE policy"</div><div class='hunk'>@@ -1077,6 +1123,7 @@ config MPU</div><div class='ctx'> comment "Asynchronous Memory Configuration"</div><div class='ctx'> </div><div class='ctx'> menu "EBIU_AMGCTL Global Control"</div><div class='add'>+	depends on !BF60x</div><div class='ctx'> config C_AMCKEN</div><div class='ctx'> 	bool "Enable CLKOUT"</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -1127,6 +1174,7 @@ endchoice</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> menu "EBIU_AMBCTL Control"</div><div class='add'>+	depends on !BF60x</div><div class='ctx'> config BANK_0</div><div class='ctx'> 	hex "Bank 0 (AMBCTL0.L)"</div><div class='ctx'> 	default 0x7BB0</div><div class='hunk'>@@ -1206,7 +1254,7 @@ config ARCH_SUSPEND_POSSIBLE</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='ctx'> 	prompt "Standby Power Saving Mode"</div><div class='del'>-	depends on PM</div><div class='add'>+	depends on PM &amp;&amp; !BF60x</div><div class='ctx'> 	default PM_BFIN_SLEEP_DEEPER</div><div class='ctx'> config  PM_BFIN_SLEEP_DEEPER</div><div class='ctx'> 	bool "Sleep Deeper"</div><div class='hunk'>@@ -1258,9 +1306,121 @@ config PM_BFIN_WAKE_GP</div><div class='ctx'> 	  (all processors, except ADSP-BF549). This option sets</div><div class='ctx'> 	  the general-purpose wake-up enable (GPWE) control bit to enable</div><div class='ctx'> 	  wake-up upon detection of an active low signal on the /GPW (PH7) pin.</div><div class='del'>-	  On ADSP-BF549 this option enables the the same functionality on the</div><div class='add'>+	  On ADSP-BF549 this option enables the same functionality on the</div><div class='ctx'> 	  /MRXON pin also PH7.</div><div class='ctx'> </div><div class='add'>+config PM_BFIN_WAKE_PA15</div><div class='add'>+	bool "Allow Wake-Up from PA15"</div><div class='add'>+	depends on PM &amp;&amp; BF60x</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Enable PA15 Wake-Up</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PA15_POL</div><div class='add'>+	int "Wake-up priority"</div><div class='add'>+	depends on PM_BFIN_WAKE_PA15</div><div class='add'>+	default 0</div><div class='add'>+	help</div><div class='add'>+	  Wake-Up priority 0(low) 1(high)</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PB15</div><div class='add'>+	bool "Allow Wake-Up from PB15"</div><div class='add'>+	depends on PM &amp;&amp; BF60x</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Enable PB15 Wake-Up</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PB15_POL</div><div class='add'>+	int "Wake-up priority"</div><div class='add'>+	depends on PM_BFIN_WAKE_PB15</div><div class='add'>+	default 0</div><div class='add'>+	help</div><div class='add'>+	  Wake-Up priority 0(low) 1(high)</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PC15</div><div class='add'>+	bool "Allow Wake-Up from PC15"</div><div class='add'>+	depends on PM &amp;&amp; BF60x</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Enable PC15 Wake-Up</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PC15_POL</div><div class='add'>+	int "Wake-up priority"</div><div class='add'>+	depends on PM_BFIN_WAKE_PC15</div><div class='add'>+	default 0</div><div class='add'>+	help</div><div class='add'>+	  Wake-Up priority 0(low) 1(high)</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PD06</div><div class='add'>+	bool "Allow Wake-Up from PD06(ETH0_PHYINT)"</div><div class='add'>+	depends on PM &amp;&amp; BF60x</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Enable PD06(ETH0_PHYINT) Wake-up</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PD06_POL</div><div class='add'>+	int "Wake-up priority"</div><div class='add'>+	depends on PM_BFIN_WAKE_PD06</div><div class='add'>+	default 0</div><div class='add'>+	help</div><div class='add'>+	  Wake-Up priority 0(low) 1(high)</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PE12</div><div class='add'>+	bool "Allow Wake-Up from PE12(ETH1_PHYINT, PUSH BUTTON)"</div><div class='add'>+	depends on PM &amp;&amp; BF60x</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Enable PE12(ETH1_PHYINT, PUSH BUTTON) Wake-up</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PE12_POL</div><div class='add'>+	int "Wake-up priority"</div><div class='add'>+	depends on PM_BFIN_WAKE_PE12</div><div class='add'>+	default 0</div><div class='add'>+	help</div><div class='add'>+	  Wake-Up priority 0(low) 1(high)</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PG04</div><div class='add'>+	bool "Allow Wake-Up from PG04(CAN0_RX)"</div><div class='add'>+	depends on PM &amp;&amp; BF60x</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Enable PG04(CAN0_RX) Wake-up</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PG04_POL</div><div class='add'>+	int "Wake-up priority"</div><div class='add'>+	depends on PM_BFIN_WAKE_PG04</div><div class='add'>+	default 0</div><div class='add'>+	help</div><div class='add'>+	  Wake-Up priority 0(low) 1(high)</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PG13</div><div class='add'>+	bool "Allow Wake-Up from PG13"</div><div class='add'>+	depends on PM &amp;&amp; BF60x</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Enable PG13 Wake-Up</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_PG13_POL</div><div class='add'>+	int "Wake-up priority"</div><div class='add'>+	depends on PM_BFIN_WAKE_PG13</div><div class='add'>+	default 0</div><div class='add'>+	help</div><div class='add'>+	  Wake-Up priority 0(low) 1(high)</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_USB</div><div class='add'>+	bool "Allow Wake-Up from (USB)"</div><div class='add'>+	depends on PM &amp;&amp; BF60x</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Enable (USB) Wake-up</div><div class='add'>+</div><div class='add'>+config PM_BFIN_WAKE_USB_POL</div><div class='add'>+	int "Wake-up priority"</div><div class='add'>+	depends on PM_BFIN_WAKE_USB</div><div class='add'>+	default 0</div><div class='add'>+	help</div><div class='add'>+	  Wake-Up priority 0(low) 1(high)</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> menu "CPU Frequency scaling"</div><div class='head'>diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug<br/>index e2a3d4c8ab9a..79594694ee90 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/Kconfig.debug?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/Kconfig.debug</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/Kconfig.debug?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/Kconfig.debug</a></div><div class='hunk'>@@ -253,4 +253,11 @@ config BFIN_PSEUDODBG_INSNS</div><div class='ctx'> </div><div class='ctx'> 	  Most people should say N here.</div><div class='ctx'> </div><div class='add'>+config BFIN_PM_WAKEUP_TIME_BENCH</div><div class='add'>+	bool "Display the total time for kernel to resume from power saving mode"</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Display the total time when kernel resumes normal from standby or</div><div class='add'>+	  suspend to mem mode.</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile<br/>index 46f42b2066e5..d3d7e64ca96d 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/Makefile</a></div><div class='hunk'>@@ -54,6 +54,7 @@ machine-$(CONFIG_BF548M) := bf548</div><div class='ctx'> machine-$(CONFIG_BF549)  := bf548</div><div class='ctx'> machine-$(CONFIG_BF549M) := bf548</div><div class='ctx'> machine-$(CONFIG_BF561)  := bf561</div><div class='add'>+machine-$(CONFIG_BF609)  := bf609</div><div class='ctx'> MACHINE := $(machine-y)</div><div class='ctx'> export MACHINE</div><div class='ctx'> </div><div class='hunk'>@@ -86,6 +87,7 @@ cpu-$(CONFIG_BF548M) := bf548m</div><div class='ctx'> cpu-$(CONFIG_BF549)  := bf549</div><div class='ctx'> cpu-$(CONFIG_BF549M) := bf549m</div><div class='ctx'> cpu-$(CONFIG_BF561)  := bf561</div><div class='add'>+cpu-$(CONFIG_BF609)  := bf609</div><div class='ctx'> </div><div class='ctx'> rev-$(CONFIG_BF_REV_0_0)  := 0.0</div><div class='ctx'> rev-$(CONFIG_BF_REV_0_1)  := 0.1</div><div class='hunk'>@@ -107,8 +109,6 @@ KBUILD_AFLAGS += -mcpu=$(CPU_REV)</div><div class='ctx'> CHECKFLAGS_SILICON = $(shell echo "" | $(CPP) $(KBUILD_CFLAGS) -dD - 2&gt;/dev/null | awk '$$2 == "__SILICON_REVISION__" { print $$3 }')</div><div class='ctx'> CHECKFLAGS += -D__SILICON_REVISION__=$(CHECKFLAGS_SILICON) -D__bfin__</div><div class='ctx'> </div><div class='del'>-head-y   := arch/$(ARCH)/kernel/init_task.o</div><div class='del'>-</div><div class='ctx'> core-y   += arch/$(ARCH)/kernel/ arch/$(ARCH)/mm/ arch/$(ARCH)/mach-common/</div><div class='ctx'> </div><div class='ctx'> # If we have a machine-specific directory, then include it in the build.</div><div class='head'>diff --git a/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig b/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig<br/>index 680730eeaf23..e2a2fa5935ce 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/configs/BF561-EZKIT-SMP_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/configs/BF561-EZKIT-SMP_defconfig</a></div><div class='hunk'>@@ -21,14 +21,12 @@ CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> # CONFIG_IOSCHED_CFQ is not set</div><div class='ctx'> CONFIG_PREEMPT_VOLUNTARY=y</div><div class='ctx'> CONFIG_BF561=y</div><div class='add'>+CONFIG_SMP=y</div><div class='ctx'> CONFIG_IRQ_TIMER0=10</div><div class='ctx'> CONFIG_CLKIN_HZ=30000000</div><div class='ctx'> CONFIG_HIGH_RES_TIMERS=y</div><div class='ctx'> CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0</div><div class='ctx'> CONFIG_BFIN_GPTIMERS=m</div><div class='del'>-CONFIG_BFIN_EXTMEM_WRITETHROUGH=y</div><div class='del'>-CONFIG_BFIN_L2_DCACHEABLE=y</div><div class='del'>-CONFIG_BFIN_L2_WRITETHROUGH=y</div><div class='ctx'> CONFIG_C_CDPRIO=y</div><div class='ctx'> CONFIG_BANK_3=0xAAC2</div><div class='ctx'> CONFIG_BINFMT_FLAT=y</div><div class='head'>diff --git a/arch/blackfin/configs/BF609-EZKIT_defconfig b/arch/blackfin/configs/BF609-EZKIT_defconfig<br/>new file mode 100644<br/>index 000000000000..be9526bee4fb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/configs/BF609-EZKIT_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/configs/BF609-EZKIT_defconfig</a></div><div class='hunk'>@@ -0,0 +1,155 @@</div><div class='add'>+CONFIG_EXPERIMENTAL=y</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_IKCONFIG_PROC=y</div><div class='add'>+CONFIG_LOG_BUF_SHIFT=14</div><div class='add'>+CONFIG_BLK_DEV_INITRD=y</div><div class='add'>+CONFIG_EXPERT=y</div><div class='add'>+# CONFIG_ELF_CORE is not set</div><div class='add'>+# CONFIG_FUTEX is not set</div><div class='add'>+# CONFIG_SIGNALFD is not set</div><div class='add'>+# CONFIG_TIMERFD is not set</div><div class='add'>+# CONFIG_EVENTFD is not set</div><div class='add'>+# CONFIG_AIO is not set</div><div class='add'>+CONFIG_SLAB=y</div><div class='add'>+CONFIG_MMAP_ALLOW_UNINITIALIZED=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+CONFIG_MODULE_UNLOAD=y</div><div class='add'>+# CONFIG_LBDAF is not set</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+CONFIG_PREEMPT_VOLUNTARY=y</div><div class='add'>+CONFIG_BF609=y</div><div class='add'>+CONFIG_PINT1_ASSIGN=0x01010000</div><div class='add'>+CONFIG_PINT2_ASSIGN=0x07000101</div><div class='add'>+CONFIG_PINT3_ASSIGN=0x02020303</div><div class='add'>+CONFIG_HIGH_RES_TIMERS=y</div><div class='add'>+CONFIG_IP_CHECKSUM_L1=y</div><div class='add'>+CONFIG_SYSCALL_TAB_L1=y</div><div class='add'>+CONFIG_CPLB_SWITCH_TAB_L1=y</div><div class='add'>+# CONFIG_APP_STACK_L1 is not set</div><div class='add'>+# CONFIG_BFIN_INS_LOWOVERHEAD is not set</div><div class='add'>+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=0</div><div class='add'>+CONFIG_BINFMT_FLAT=y</div><div class='add'>+CONFIG_BINFMT_ZFLAT=y</div><div class='add'>+CONFIG_PM_BFIN_WAKE_PE12=y</div><div class='add'>+CONFIG_PM_BFIN_WAKE_PE12_POL=1</div><div class='add'>+CONFIG_CPU_FREQ=y</div><div class='add'>+CONFIG_CPU_FREQ_GOV_POWERSAVE=y</div><div class='add'>+CONFIG_CPU_FREQ_GOV_ONDEMAND=y</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_PACKET=y</div><div class='add'>+CONFIG_UNIX=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+CONFIG_IP_PNP=y</div><div class='add'>+CONFIG_IP_PNP_DHCP=y</div><div class='add'>+CONFIG_IP_PNP_BOOTP=y</div><div class='add'>+CONFIG_IP_PNP_RARP=y</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+CONFIG_NETFILTER=y</div><div class='add'>+CONFIG_CAN=y</div><div class='add'>+CONFIG_CAN_BFIN=y</div><div class='add'>+CONFIG_IRDA=y</div><div class='add'>+CONFIG_IRTTY_SIR=y</div><div class='add'>+# CONFIG_WIRELESS is not set</div><div class='add'>+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='add'>+CONFIG_FW_LOADER=m</div><div class='add'>+CONFIG_MTD=y</div><div class='add'>+CONFIG_MTD_CMDLINE_PARTS=y</div><div class='add'>+CONFIG_MTD_CHAR=y</div><div class='add'>+CONFIG_MTD_BLOCK=y</div><div class='add'>+CONFIG_MTD_CFI=y</div><div class='add'>+CONFIG_MTD_CFI_INTELEXT=y</div><div class='add'>+CONFIG_MTD_CFI_STAA=y</div><div class='add'>+CONFIG_MTD_COMPLEX_MAPPINGS=y</div><div class='add'>+CONFIG_MTD_PHYSMAP=y</div><div class='add'>+CONFIG_MTD_M25P80=y</div><div class='add'>+CONFIG_MTD_UBI=m</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+# CONFIG_NET_VENDOR_BROADCOM is not set</div><div class='add'>+# CONFIG_NET_VENDOR_CHELSIO is not set</div><div class='add'>+# CONFIG_NET_VENDOR_INTEL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MARVELL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICREL is not set</div><div class='add'>+# CONFIG_NET_VENDOR_MICROCHIP is not set</div><div class='add'>+# CONFIG_NET_VENDOR_NATSEMI is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SEEQ is not set</div><div class='add'>+# CONFIG_NET_VENDOR_SMSC is not set</div><div class='add'>+CONFIG_STMMAC_ETH=y</div><div class='add'>+CONFIG_STMMAC_IEEE1588=y</div><div class='add'>+# CONFIG_WLAN is not set</div><div class='add'>+# CONFIG_INPUT_MOUSEDEV is not set</div><div class='add'>+CONFIG_INPUT_EVDEV=y</div><div class='add'>+# CONFIG_INPUT_KEYBOARD is not set</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+CONFIG_INPUT_MISC=y</div><div class='add'>+CONFIG_INPUT_BFIN_ROTARY=y</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+# CONFIG_LEGACY_PTYS is not set</div><div class='add'>+CONFIG_BFIN_SIMPLE_TIMER=m</div><div class='add'>+CONFIG_BFIN_LINKPORT=y</div><div class='add'>+# CONFIG_DEVKMEM is not set</div><div class='add'>+CONFIG_SERIAL_BFIN=y</div><div class='add'>+CONFIG_SERIAL_BFIN_CONSOLE=y</div><div class='add'>+CONFIG_SERIAL_BFIN_UART0=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+CONFIG_I2C=y</div><div class='add'>+CONFIG_I2C_CHARDEV=y</div><div class='add'>+CONFIG_I2C_BLACKFIN_TWI=y</div><div class='add'>+CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100</div><div class='add'>+CONFIG_SPI=y</div><div class='add'>+CONFIG_SPI_BFIN6XX=y</div><div class='add'>+CONFIG_GPIOLIB=y</div><div class='add'>+CONFIG_GPIO_SYSFS=y</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_WATCHDOG=y</div><div class='add'>+CONFIG_BFIN_WDT=y</div><div class='add'>+CONFIG_SOUND=m</div><div class='add'>+CONFIG_SND=m</div><div class='add'>+CONFIG_SND_MIXER_OSS=m</div><div class='add'>+CONFIG_SND_PCM_OSS=m</div><div class='add'>+# CONFIG_SND_DRIVERS is not set</div><div class='add'>+# CONFIG_SND_SPI is not set</div><div class='add'>+# CONFIG_SND_USB is not set</div><div class='add'>+CONFIG_SND_SOC=m</div><div class='add'>+CONFIG_SND_BF6XX_I2S=m</div><div class='add'>+CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61=m</div><div class='add'>+CONFIG_SND_SOC_ALL_CODECS=m</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+CONFIG_USB_MUSB_HDRC=y</div><div class='add'>+CONFIG_USB_MUSB_BLACKFIN=m</div><div class='add'>+CONFIG_USB_STORAGE=y</div><div class='add'>+CONFIG_USB_GADGET=y</div><div class='add'>+CONFIG_USB_GADGET_MUSB_HDRC=y</div><div class='add'>+CONFIG_USB_ZERO=y</div><div class='add'>+CONFIG_MMC=y</div><div class='add'>+CONFIG_SDH_BFIN=y</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+# CONFIG_DNOTIFY is not set</div><div class='add'>+CONFIG_MSDOS_FS=y</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_JFFS2_FS=m</div><div class='add'>+CONFIG_UBIFS_FS=m</div><div class='add'>+CONFIG_NFS_FS=m</div><div class='add'>+CONFIG_NFS_V3=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+CONFIG_DEBUG_FS=y</div><div class='add'>+CONFIG_DEBUG_SHIRQ=y</div><div class='add'>+CONFIG_DETECT_HUNG_TASK=y</div><div class='add'>+CONFIG_DEBUG_INFO=y</div><div class='add'>+CONFIG_FRAME_POINTER=y</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='add'>+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y</div><div class='add'>+CONFIG_EARLY_PRINTK=y</div><div class='add'>+CONFIG_CPLB_INFO=y</div><div class='add'>+CONFIG_BFIN_PSEUDODBG_INSNS=y</div><div class='add'>+CONFIG_CRYPTO_HMAC=y</div><div class='add'>+CONFIG_CRYPTO_MD4=y</div><div class='add'>+CONFIG_CRYPTO_MD5=y</div><div class='add'>+CONFIG_CRYPTO_ARC4=y</div><div class='add'>+# CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='head'>diff --git a/arch/blackfin/include/asm/bfin-global.h b/arch/blackfin/include/asm/bfin-global.h<br/>index 17bcbf60bcae..608be5e6d25c 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin-global.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/bfin-global.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin-global.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin-global.h</a></div><div class='hunk'>@@ -35,6 +35,11 @@ extern void bfin_setup_cpudata(unsigned int cpu);</div><div class='ctx'> </div><div class='ctx'> extern unsigned long get_cclk(void);</div><div class='ctx'> extern unsigned long get_sclk(void);</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+extern unsigned long get_sclk0(void);</div><div class='add'>+extern unsigned long get_sclk1(void);</div><div class='add'>+extern unsigned long get_dclk(void);</div><div class='add'>+#endif</div><div class='ctx'> extern unsigned long sclk_to_usecs(unsigned long sclk);</div><div class='ctx'> extern unsigned long usecs_to_sclk(unsigned long usecs);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/include/asm/bfin6xx_spi.h b/arch/blackfin/include/asm/bfin6xx_spi.h<br/>new file mode 100644<br/>index 000000000000..89370b653dcd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin6xx_spi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin6xx_spi.h</a></div><div class='hunk'>@@ -0,0 +1,258 @@</div><div class='add'>+/*</div><div class='add'>+ * Analog Devices SPI3 controller driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _SPI_CHANNEL_H_</div><div class='add'>+#define _SPI_CHANNEL_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/* SPI_CONTROL */</div><div class='add'>+#define SPI_CTL_EN                  0x00000001    /* Enable */</div><div class='add'>+#define SPI_CTL_MSTR                0x00000002    /* Master/Slave */</div><div class='add'>+#define SPI_CTL_PSSE                0x00000004    /* controls modf error in master mode */</div><div class='add'>+#define SPI_CTL_ODM                 0x00000008    /* Open Drain Mode */</div><div class='add'>+#define SPI_CTL_CPHA                0x00000010    /* Clock Phase */</div><div class='add'>+#define SPI_CTL_CPOL                0x00000020    /* Clock Polarity */</div><div class='add'>+#define SPI_CTL_ASSEL               0x00000040    /* Slave Select Pin Control */</div><div class='add'>+#define SPI_CTL_SELST               0x00000080    /* Slave Select Polarity in-between transfers */</div><div class='add'>+#define SPI_CTL_EMISO               0x00000100    /* Enable MISO */</div><div class='add'>+#define SPI_CTL_SIZE                0x00000600    /* Word Transfer Size */</div><div class='add'>+#define SPI_CTL_SIZE08              0x00000000    /* SIZE: 8 bits */</div><div class='add'>+#define SPI_CTL_SIZE16              0x00000200    /* SIZE: 16 bits */</div><div class='add'>+#define SPI_CTL_SIZE32              0x00000400    /* SIZE: 32 bits */</div><div class='add'>+#define SPI_CTL_LSBF                0x00001000    /* LSB First */</div><div class='add'>+#define SPI_CTL_FCEN                0x00002000    /* Flow-Control Enable */</div><div class='add'>+#define SPI_CTL_FCCH                0x00004000    /* Flow-Control Channel Selection */</div><div class='add'>+#define SPI_CTL_FCPL                0x00008000    /* Flow-Control Polarity */</div><div class='add'>+#define SPI_CTL_FCWM                0x00030000    /* Flow-Control Water-Mark */</div><div class='add'>+#define SPI_CTL_FIFO0               0x00000000    /* FCWM: TFIFO empty or RFIFO Full */</div><div class='add'>+#define SPI_CTL_FIFO1               0x00010000    /* FCWM: TFIFO 75% or more empty or RFIFO 75% or more full */</div><div class='add'>+#define SPI_CTL_FIFO2               0x00020000    /* FCWM: TFIFO 50% or more empty or RFIFO 50% or more full */</div><div class='add'>+#define SPI_CTL_FMODE               0x00040000    /* Fast-mode Enable */</div><div class='add'>+#define SPI_CTL_MIOM                0x00300000    /* Multiple I/O Mode */</div><div class='add'>+#define SPI_CTL_MIO_DIS             0x00000000    /* MIOM: Disable */</div><div class='add'>+#define SPI_CTL_MIO_DUAL            0x00100000    /* MIOM: Enable DIOM (Dual I/O Mode) */</div><div class='add'>+#define SPI_CTL_MIO_QUAD            0x00200000    /* MIOM: Enable QUAD (Quad SPI Mode) */</div><div class='add'>+#define SPI_CTL_SOSI                0x00400000    /* Start on MOSI */</div><div class='add'>+/* SPI_RX_CONTROL */</div><div class='add'>+#define SPI_RXCTL_REN               0x00000001    /* Receive Channel Enable */</div><div class='add'>+#define SPI_RXCTL_RTI               0x00000004    /* Receive Transfer Initiate */</div><div class='add'>+#define SPI_RXCTL_RWCEN             0x00000008    /* Receive Word Counter Enable */</div><div class='add'>+#define SPI_RXCTL_RDR               0x00000070    /* Receive Data Request */</div><div class='add'>+#define SPI_RXCTL_RDR_DIS           0x00000000    /* RDR: Disabled */</div><div class='add'>+#define SPI_RXCTL_RDR_NE            0x00000010    /* RDR: RFIFO not empty */</div><div class='add'>+#define SPI_RXCTL_RDR_25            0x00000020    /* RDR: RFIFO 25% full */</div><div class='add'>+#define SPI_RXCTL_RDR_50            0x00000030    /* RDR: RFIFO 50% full */</div><div class='add'>+#define SPI_RXCTL_RDR_75            0x00000040    /* RDR: RFIFO 75% full */</div><div class='add'>+#define SPI_RXCTL_RDR_FULL          0x00000050    /* RDR: RFIFO full */</div><div class='add'>+#define SPI_RXCTL_RDO               0x00000100    /* Receive Data Over-Run */</div><div class='add'>+#define SPI_RXCTL_RRWM              0x00003000    /* FIFO Regular Water-Mark */</div><div class='add'>+#define SPI_RXCTL_RWM_0             0x00000000    /* RRWM: RFIFO Empty */</div><div class='add'>+#define SPI_RXCTL_RWM_25            0x00001000    /* RRWM: RFIFO 25% full */</div><div class='add'>+#define SPI_RXCTL_RWM_50            0x00002000    /* RRWM: RFIFO 50% full */</div><div class='add'>+#define SPI_RXCTL_RWM_75            0x00003000    /* RRWM: RFIFO 75% full */</div><div class='add'>+#define SPI_RXCTL_RUWM              0x00070000    /* FIFO Urgent Water-Mark */</div><div class='add'>+#define SPI_RXCTL_UWM_DIS           0x00000000    /* RUWM: Disabled */</div><div class='add'>+#define SPI_RXCTL_UWM_25            0x00010000    /* RUWM: RFIFO 25% full */</div><div class='add'>+#define SPI_RXCTL_UWM_50            0x00020000    /* RUWM: RFIFO 50% full */</div><div class='add'>+#define SPI_RXCTL_UWM_75            0x00030000    /* RUWM: RFIFO 75% full */</div><div class='add'>+#define SPI_RXCTL_UWM_FULL          0x00040000    /* RUWM: RFIFO full */</div><div class='add'>+/* SPI_TX_CONTROL */</div><div class='add'>+#define SPI_TXCTL_TEN               0x00000001    /* Transmit Channel Enable */</div><div class='add'>+#define SPI_TXCTL_TTI               0x00000004    /* Transmit Transfer Initiate */</div><div class='add'>+#define SPI_TXCTL_TWCEN             0x00000008    /* Transmit Word Counter Enable */</div><div class='add'>+#define SPI_TXCTL_TDR               0x00000070    /* Transmit Data Request */</div><div class='add'>+#define SPI_TXCTL_TDR_DIS           0x00000000    /* TDR: Disabled */</div><div class='add'>+#define SPI_TXCTL_TDR_NF            0x00000010    /* TDR: TFIFO not full */</div><div class='add'>+#define SPI_TXCTL_TDR_25            0x00000020    /* TDR: TFIFO 25% empty */</div><div class='add'>+#define SPI_TXCTL_TDR_50            0x00000030    /* TDR: TFIFO 50% empty */</div><div class='add'>+#define SPI_TXCTL_TDR_75            0x00000040    /* TDR: TFIFO 75% empty */</div><div class='add'>+#define SPI_TXCTL_TDR_EMPTY         0x00000050    /* TDR: TFIFO empty */</div><div class='add'>+#define SPI_TXCTL_TDU               0x00000100    /* Transmit Data Under-Run */</div><div class='add'>+#define SPI_TXCTL_TRWM              0x00003000    /* FIFO Regular Water-Mark */</div><div class='add'>+#define SPI_TXCTL_RWM_FULL          0x00000000    /* TRWM: TFIFO full */</div><div class='add'>+#define SPI_TXCTL_RWM_25            0x00001000    /* TRWM: TFIFO 25% empty */</div><div class='add'>+#define SPI_TXCTL_RWM_50            0x00002000    /* TRWM: TFIFO 50% empty */</div><div class='add'>+#define SPI_TXCTL_RWM_75            0x00003000    /* TRWM: TFIFO 75% empty */</div><div class='add'>+#define SPI_TXCTL_TUWM              0x00070000    /* FIFO Urgent Water-Mark */</div><div class='add'>+#define SPI_TXCTL_UWM_DIS           0x00000000    /* TUWM: Disabled */</div><div class='add'>+#define SPI_TXCTL_UWM_25            0x00010000    /* TUWM: TFIFO 25% empty */</div><div class='add'>+#define SPI_TXCTL_UWM_50            0x00020000    /* TUWM: TFIFO 50% empty */</div><div class='add'>+#define SPI_TXCTL_UWM_75            0x00030000    /* TUWM: TFIFO 75% empty */</div><div class='add'>+#define SPI_TXCTL_UWM_EMPTY         0x00040000    /* TUWM: TFIFO empty */</div><div class='add'>+/* SPI_CLOCK */</div><div class='add'>+#define SPI_CLK_BAUD                0x0000FFFF    /* Baud Rate */</div><div class='add'>+/* SPI_DELAY */</div><div class='add'>+#define SPI_DLY_STOP                0x000000FF    /* Transfer delay time in multiples of SCK period */</div><div class='add'>+#define SPI_DLY_LEADX               0x00000100    /* Extended (1 SCK) LEAD Control */</div><div class='add'>+#define SPI_DLY_LAGX                0x00000200    /* Extended (1 SCK) LAG control */</div><div class='add'>+/* SPI_SSEL */</div><div class='add'>+#define SPI_SLVSEL_SSE1             0x00000002    /* SPISSEL1 Enable */</div><div class='add'>+#define SPI_SLVSEL_SSE2             0x00000004    /* SPISSEL2 Enable */</div><div class='add'>+#define SPI_SLVSEL_SSE3             0x00000008    /* SPISSEL3 Enable */</div><div class='add'>+#define SPI_SLVSEL_SSE4             0x00000010    /* SPISSEL4 Enable */</div><div class='add'>+#define SPI_SLVSEL_SSE5             0x00000020    /* SPISSEL5 Enable */</div><div class='add'>+#define SPI_SLVSEL_SSE6             0x00000040    /* SPISSEL6 Enable */</div><div class='add'>+#define SPI_SLVSEL_SSE7             0x00000080    /* SPISSEL7 Enable */</div><div class='add'>+#define SPI_SLVSEL_SSEL1            0x00000200    /* SPISSEL1 Value */</div><div class='add'>+#define SPI_SLVSEL_SSEL2            0x00000400    /* SPISSEL2 Value */</div><div class='add'>+#define SPI_SLVSEL_SSEL3            0x00000800    /* SPISSEL3 Value */</div><div class='add'>+#define SPI_SLVSEL_SSEL4            0x00001000    /* SPISSEL4 Value */</div><div class='add'>+#define SPI_SLVSEL_SSEL5            0x00002000    /* SPISSEL5 Value */</div><div class='add'>+#define SPI_SLVSEL_SSEL6            0x00004000    /* SPISSEL6 Value */</div><div class='add'>+#define SPI_SLVSEL_SSEL7            0x00008000    /* SPISSEL7 Value */</div><div class='add'>+/* SPI_RWC */</div><div class='add'>+#define SPI_RWC_VALUE               0x0000FFFF    /* Received Word-Count */</div><div class='add'>+/* SPI_RWCR */</div><div class='add'>+#define SPI_RWCR_VALUE              0x0000FFFF    /* Received Word-Count Reload */</div><div class='add'>+/* SPI_TWC */</div><div class='add'>+#define SPI_TWC_VALUE               0x0000FFFF    /* Transmitted Word-Count */</div><div class='add'>+/* SPI_TWCR */</div><div class='add'>+#define SPI_TWCR_VALUE              0x0000FFFF    /* Transmitted Word-Count Reload */</div><div class='add'>+/* SPI_IMASK */</div><div class='add'>+#define SPI_IMSK_RUWM               0x00000002    /* Receive Urgent Water-Mark Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_TUWM               0x00000004    /* Transmit Urgent Water-Mark Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_ROM                0x00000010    /* Receive Over-Run Error Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_TUM                0x00000020    /* Transmit Under-Run Error Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_TCM                0x00000040    /* Transmit Collision Error Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_MFM                0x00000080    /* Mode Fault Error Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_RSM                0x00000100    /* Receive Start Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_TSM                0x00000200    /* Transmit Start Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_RFM                0x00000400    /* Receive Finish Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_TFM                0x00000800    /* Transmit Finish Interrupt Mask */</div><div class='add'>+/* SPI_IMASKCL */</div><div class='add'>+#define SPI_IMSK_CLR_RUW            0x00000002    /* Receive Urgent Water-Mark Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_CLR_TUWM           0x00000004    /* Transmit Urgent Water-Mark Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_CLR_ROM            0x00000010    /* Receive Over-Run Error Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_CLR_TUM            0x00000020    /* Transmit Under-Run Error Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_CLR_TCM            0x00000040    /* Transmit Collision Error Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_CLR_MFM            0x00000080    /* Mode Fault Error Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_CLR_RSM            0x00000100    /* Receive Start Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_CLR_TSM            0x00000200    /* Transmit Start Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_CLR_RFM            0x00000400    /* Receive Finish Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_CLR_TFM            0x00000800    /* Transmit Finish Interrupt Mask */</div><div class='add'>+/* SPI_IMASKST */</div><div class='add'>+#define SPI_IMSK_SET_RUWM           0x00000002    /* Receive Urgent Water-Mark Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_SET_TUWM           0x00000004    /* Transmit Urgent Water-Mark Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_SET_ROM            0x00000010    /* Receive Over-Run Error Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_SET_TUM            0x00000020    /* Transmit Under-Run Error Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_SET_TCM            0x00000040    /* Transmit Collision Error Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_SET_MFM            0x00000080    /* Mode Fault Error Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_SET_RSM            0x00000100    /* Receive Start Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_SET_TSM            0x00000200    /* Transmit Start Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_SET_RFM            0x00000400    /* Receive Finish Interrupt Mask */</div><div class='add'>+#define SPI_IMSK_SET_TFM            0x00000800    /* Transmit Finish Interrupt Mask */</div><div class='add'>+/* SPI_STATUS */</div><div class='add'>+#define SPI_STAT_SPIF               0x00000001    /* SPI Finished */</div><div class='add'>+#define SPI_STAT_RUWM               0x00000002    /* Receive Urgent Water-Mark Breached */</div><div class='add'>+#define SPI_STAT_TUWM               0x00000004    /* Transmit Urgent Water-Mark Breached */</div><div class='add'>+#define SPI_STAT_ROE                0x00000010    /* Receive Over-Run Error Indication */</div><div class='add'>+#define SPI_STAT_TUE                0x00000020    /* Transmit Under-Run Error Indication */</div><div class='add'>+#define SPI_STAT_TCE                0x00000040    /* Transmit Collision Error Indication */</div><div class='add'>+#define SPI_STAT_MODF               0x00000080    /* Mode Fault Error Indication */</div><div class='add'>+#define SPI_STAT_RS                 0x00000100    /* Receive Start Indication */</div><div class='add'>+#define SPI_STAT_TS                 0x00000200    /* Transmit Start Indication */</div><div class='add'>+#define SPI_STAT_RF                 0x00000400    /* Receive Finish Indication */</div><div class='add'>+#define SPI_STAT_TF                 0x00000800    /* Transmit Finish Indication */</div><div class='add'>+#define SPI_STAT_RFS                0x00007000    /* SPI_RFIFO status */</div><div class='add'>+#define SPI_STAT_RFIFO_EMPTY        0x00000000    /* RFS: RFIFO Empty */</div><div class='add'>+#define SPI_STAT_RFIFO_25           0x00001000    /* RFS: RFIFO 25% Full */</div><div class='add'>+#define SPI_STAT_RFIFO_50           0x00002000    /* RFS: RFIFO 50% Full */</div><div class='add'>+#define SPI_STAT_RFIFO_75           0x00003000    /* RFS: RFIFO 75% Full */</div><div class='add'>+#define SPI_STAT_RFIFO_FULL         0x00004000    /* RFS: RFIFO Full */</div><div class='add'>+#define SPI_STAT_TFS                0x00070000    /* SPI_TFIFO status */</div><div class='add'>+#define SPI_STAT_TFIFO_FULL         0x00000000    /* TFS: TFIFO full */</div><div class='add'>+#define SPI_STAT_TFIFO_25           0x00010000    /* TFS: TFIFO 25% empty */</div><div class='add'>+#define SPI_STAT_TFIFO_50           0x00020000    /* TFS: TFIFO 50% empty */</div><div class='add'>+#define SPI_STAT_TFIFO_75           0x00030000    /* TFS: TFIFO 75% empty */</div><div class='add'>+#define SPI_STAT_TFIFO_EMPTY        0x00040000    /* TFS: TFIFO empty */</div><div class='add'>+#define SPI_STAT_FCS                0x00100000    /* Flow-Control Stall Indication */</div><div class='add'>+#define SPI_STAT_RFE                0x00400000    /* SPI_RFIFO Empty */</div><div class='add'>+#define SPI_STAT_TFF                0x00800000    /* SPI_TFIFO Full */</div><div class='add'>+/* SPI_ILAT */</div><div class='add'>+#define SPI_ILAT_RUWMI              0x00000002    /* Receive Urgent Water Mark Interrupt */</div><div class='add'>+#define SPI_ILAT_TUWMI              0x00000004    /* Transmit Urgent Water Mark Interrupt */</div><div class='add'>+#define SPI_ILAT_ROI                0x00000010    /* Receive Over-Run Error Indication */</div><div class='add'>+#define SPI_ILAT_TUI                0x00000020    /* Transmit Under-Run Error Indication */</div><div class='add'>+#define SPI_ILAT_TCI                0x00000040    /* Transmit Collision Error Indication */</div><div class='add'>+#define SPI_ILAT_MFI                0x00000080    /* Mode Fault Error Indication */</div><div class='add'>+#define SPI_ILAT_RSI                0x00000100    /* Receive Start Indication */</div><div class='add'>+#define SPI_ILAT_TSI                0x00000200    /* Transmit Start Indication */</div><div class='add'>+#define SPI_ILAT_RFI                0x00000400    /* Receive Finish Indication */</div><div class='add'>+#define SPI_ILAT_TFI                0x00000800    /* Transmit Finish Indication */</div><div class='add'>+/* SPI_ILATCL */</div><div class='add'>+#define SPI_ILAT_CLR_RUWMI          0x00000002    /* Receive Urgent Water Mark Interrupt */</div><div class='add'>+#define SPI_ILAT_CLR_TUWMI          0x00000004    /* Transmit Urgent Water Mark Interrupt */</div><div class='add'>+#define SPI_ILAT_CLR_ROI            0x00000010    /* Receive Over-Run Error Indication */</div><div class='add'>+#define SPI_ILAT_CLR_TUI            0x00000020    /* Transmit Under-Run Error Indication */</div><div class='add'>+#define SPI_ILAT_CLR_TCI            0x00000040    /* Transmit Collision Error Indication */</div><div class='add'>+#define SPI_ILAT_CLR_MFI            0x00000080    /* Mode Fault Error Indication */</div><div class='add'>+#define SPI_ILAT_CLR_RSI            0x00000100    /* Receive Start Indication */</div><div class='add'>+#define SPI_ILAT_CLR_TSI            0x00000200    /* Transmit Start Indication */</div><div class='add'>+#define SPI_ILAT_CLR_RFI            0x00000400    /* Receive Finish Indication */</div><div class='add'>+#define SPI_ILAT_CLR_TFI            0x00000800    /* Transmit Finish Indication */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * bfin spi3 registers layout</div><div class='add'>+ */</div><div class='add'>+struct bfin_spi_regs {</div><div class='add'>+	u32 revid;</div><div class='add'>+	u32 control;</div><div class='add'>+	u32 rx_control;</div><div class='add'>+	u32 tx_control;</div><div class='add'>+	u32 clock;</div><div class='add'>+	u32 delay;</div><div class='add'>+	u32 ssel;</div><div class='add'>+	u32 rwc;</div><div class='add'>+	u32 rwcr;</div><div class='add'>+	u32 twc;</div><div class='add'>+	u32 twcr;</div><div class='add'>+	u32 reserved0;</div><div class='add'>+	u32 emask;</div><div class='add'>+	u32 emaskcl;</div><div class='add'>+	u32 emaskst;</div><div class='add'>+	u32 reserved1;</div><div class='add'>+	u32 status;</div><div class='add'>+	u32 elat;</div><div class='add'>+	u32 elatcl;</div><div class='add'>+	u32 reserved2;</div><div class='add'>+	u32 rfifo;</div><div class='add'>+	u32 reserved3;</div><div class='add'>+	u32 tfifo;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MAX_CTRL_CS          8  /* cs in spi controller */</div><div class='add'>+</div><div class='add'>+/* device.platform_data for SSP controller devices */</div><div class='add'>+struct bfin6xx_spi_master {</div><div class='add'>+	u16 num_chipselect;</div><div class='add'>+	u16 pin_req[7];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* spi_board_info.controller_data for SPI slave devices,</div><div class='add'>+ * copied to spi_device.platform_data ... mostly for dma tuning</div><div class='add'>+ */</div><div class='add'>+struct bfin6xx_spi_chip {</div><div class='add'>+	u32 control;</div><div class='add'>+	u16 cs_chg_udelay; /* Some devices require 16-bit delays */</div><div class='add'>+	u32 tx_dummy_val; /* tx value for rx only transfer */</div><div class='add'>+	bool enable_dma;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* _SPI_CHANNEL_H_ */</div><div class='head'>diff --git a/arch/blackfin/include/asm/bfin_crc.h b/arch/blackfin/include/asm/bfin_crc.h<br/>new file mode 100644<br/>index 000000000000..3deb4452ceed<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_crc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_crc.h</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+/*</div><div class='add'>+ * bfin_crc.h - interface to Blackfin CRC controllers</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __BFIN_CRC_H__</div><div class='add'>+#define __BFIN_CRC_H__</div><div class='add'>+</div><div class='add'>+/* Function driver which use hardware crc must initialize the structure */</div><div class='add'>+struct crc_info {</div><div class='add'>+	/* Input data address */</div><div class='add'>+	unsigned char *in_addr;</div><div class='add'>+	/* Output data address */</div><div class='add'>+	unsigned char *out_addr;</div><div class='add'>+	/* Input or output bytes */</div><div class='add'>+	unsigned long datasize;</div><div class='add'>+	union {</div><div class='add'>+	/* CRC to compare with that of input buffer */</div><div class='add'>+	unsigned long crc_compare;</div><div class='add'>+	/* Value to compare with input data */</div><div class='add'>+	unsigned long val_verify;</div><div class='add'>+	/* Value to fill */</div><div class='add'>+	unsigned long val_fill;</div><div class='add'>+	};</div><div class='add'>+	/* Value to program the 32b CRC Polynomial */</div><div class='add'>+	unsigned long crc_poly;</div><div class='add'>+	union {</div><div class='add'>+	/* CRC calculated from the input data */</div><div class='add'>+	unsigned long crc_result;</div><div class='add'>+	/* First failed position to verify input data */</div><div class='add'>+	unsigned long pos_verify;</div><div class='add'>+	};</div><div class='add'>+	/* CRC mirror flags */</div><div class='add'>+	unsigned int bitmirr:1;</div><div class='add'>+	unsigned int bytmirr:1;</div><div class='add'>+	unsigned int w16swp:1;</div><div class='add'>+	unsigned int fdsel:1;</div><div class='add'>+	unsigned int rsltmirr:1;</div><div class='add'>+	unsigned int polymirr:1;</div><div class='add'>+	unsigned int cmpmirr:1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Userspace interface */</div><div class='add'>+#define CRC_IOC_MAGIC		'C'</div><div class='add'>+#define CRC_IOC_CALC_CRC	_IOWR('C', 0x01, unsigned int)</div><div class='add'>+#define CRC_IOC_MEMCPY_CRC	_IOWR('C', 0x02, unsigned int)</div><div class='add'>+#define CRC_IOC_VERIFY_VAL	_IOWR('C', 0x03, unsigned int)</div><div class='add'>+#define CRC_IOC_FILL_VAL	_IOWR('C', 0x04, unsigned int)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/miscdevice.h&gt;</div><div class='add'>+</div><div class='add'>+struct crc_register {</div><div class='add'>+	u32 control;</div><div class='add'>+	u32 datacnt;</div><div class='add'>+	u32 datacntrld;</div><div class='add'>+	u32 __pad_1[2];</div><div class='add'>+	u32 compare;</div><div class='add'>+	u32 fillval;</div><div class='add'>+	u32 datafifo;</div><div class='add'>+	u32 intren;</div><div class='add'>+	u32 intrenset;</div><div class='add'>+	u32 intrenclr;</div><div class='add'>+	u32 poly;</div><div class='add'>+	u32 __pad_2[4];</div><div class='add'>+	u32 status;</div><div class='add'>+	u32 datacntcap;</div><div class='add'>+	u32 __pad_3;</div><div class='add'>+	u32 result;</div><div class='add'>+	u32 curresult;</div><div class='add'>+	u32 __pad_4[3];</div><div class='add'>+	u32 revid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bfin_crc {</div><div class='add'>+	struct miscdevice mdev;</div><div class='add'>+	struct list_head list;</div><div class='add'>+	int irq;</div><div class='add'>+	int dma_ch_src;</div><div class='add'>+	int dma_ch_dest;</div><div class='add'>+	volatile struct crc_register *regs;</div><div class='add'>+	struct crc_info *info;</div><div class='add'>+	struct mutex mutex;</div><div class='add'>+	struct completion c;</div><div class='add'>+	unsigned short opmode;</div><div class='add'>+	char name[20];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CRC_STATUS Masks */</div><div class='add'>+#define CMPERR			0x00000002	/* Compare error */</div><div class='add'>+#define DCNTEXP			0x00000010	/* datacnt register expired */</div><div class='add'>+#define IBR			0x00010000	/* Input buffer ready */</div><div class='add'>+#define OBR			0x00020000	/* Output buffer ready */</div><div class='add'>+#define IRR			0x00040000	/* Immediate result readt */</div><div class='add'>+#define LUTDONE			0x00080000	/* Look-up table generation done */</div><div class='add'>+#define FSTAT			0x00700000	/* FIFO status */</div><div class='add'>+#define MAX_FIFO		4		/* Max fifo size */</div><div class='add'>+</div><div class='add'>+/* CRC_CONTROL Masks */</div><div class='add'>+#define BLKEN			0x00000001	/* Block enable */</div><div class='add'>+#define OPMODE			0x000000F0	/* Operation mode */</div><div class='add'>+#define OPMODE_OFFSET		4		/* Operation mode mask offset*/</div><div class='add'>+#define MODE_DMACPY_CRC		1		/* MTM CRC compute and compare */</div><div class='add'>+#define MODE_DATA_FILL		2		/* MTM data fill */</div><div class='add'>+#define MODE_CALC_CRC		3		/* MSM CRC compute and compare */</div><div class='add'>+#define MODE_DATA_VERIFY	4		/* MSM data verify */</div><div class='add'>+#define AUTOCLRZ		0x00000100	/* Auto clear to zero */</div><div class='add'>+#define AUTOCLRF		0x00000200	/* Auto clear to one */</div><div class='add'>+#define OBRSTALL		0x00001000	/* Stall on output buffer ready */</div><div class='add'>+#define IRRSTALL		0x00002000	/* Stall on immediate result ready */</div><div class='add'>+#define BITMIRR			0x00010000	/* Mirror bits within each byte of 32-bit input data */</div><div class='add'>+#define BITMIRR_OFFSET		16		/* Mirror bits offset */</div><div class='add'>+#define BYTMIRR			0x00020000	/* Mirror bytes of 32-bit input data */</div><div class='add'>+#define BYTMIRR_OFFSET		17		/* Mirror bytes offset */</div><div class='add'>+#define W16SWP			0x00040000	/* Mirror uppper and lower 16-bit word of 32-bit input data */</div><div class='add'>+#define W16SWP_OFFSET		18		/* Mirror 16-bit word offset */</div><div class='add'>+#define FDSEL			0x00080000	/* FIFO is written after input data is mirrored */</div><div class='add'>+#define FDSEL_OFFSET		19		/* Mirror FIFO offset */</div><div class='add'>+#define RSLTMIRR		0x00100000	/* CRC result registers are mirrored. */</div><div class='add'>+#define RSLTMIRR_OFFSET		20		/* Mirror CRC result offset. */</div><div class='add'>+#define POLYMIRR		0x00200000	/* CRC poly register is mirrored. */</div><div class='add'>+#define POLYMIRR_OFFSET		21		/* Mirror CRC poly offset. */</div><div class='add'>+#define CMPMIRR			0x00400000	/* CRC compare register is mirrored. */</div><div class='add'>+#define CMPMIRR_OFFSET		22		/* Mirror CRC compare offset. */</div><div class='add'>+</div><div class='add'>+/* CRC_INTREN Masks */</div><div class='add'>+#define CMPERRI 		0x02		/* CRC_ERROR_INTR */</div><div class='add'>+#define DCNTEXPI 		0x10		/* CRC_STATUS_INTR */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/blackfin/include/asm/bfin_dma.h b/arch/blackfin/include/asm/bfin_dma.h<br/>index d51120744148..6319f4e49083 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/bfin_dma.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_dma.h</a></div><div class='hunk'>@@ -15,12 +15,55 @@</div><div class='ctx'> #define DMAEN			0x0001	/* DMA Channel Enable */</div><div class='ctx'> #define WNR				0x0002	/* Channel Direction (W/R*) */</div><div class='ctx'> #define WDSIZE_8		0x0000	/* Transfer Word Size = 8 */</div><div class='add'>+#define PSIZE_8			0x00000000	/* Transfer Word Size = 16 */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+</div><div class='add'>+#define PSIZE_16		0x00000010	/* Transfer Word Size = 16 */</div><div class='add'>+#define PSIZE_32		0x00000020	/* Transfer Word Size = 32 */</div><div class='add'>+#define PSIZE_64		0x00000030	/* Transfer Word Size = 32 */</div><div class='add'>+#define WDSIZE_16		0x00000100	/* Transfer Word Size = 16 */</div><div class='add'>+#define WDSIZE_32		0x00000200	/* Transfer Word Size = 32 */</div><div class='add'>+#define WDSIZE_64		0x00000300	/* Transfer Word Size = 32 */</div><div class='add'>+#define WDSIZE_128		0x00000400	/* Transfer Word Size = 32 */</div><div class='add'>+#define WDSIZE_256		0x00000500	/* Transfer Word Size = 32 */</div><div class='add'>+#define DMA2D			0x04000000	/* DMA Mode (2D/1D*) */</div><div class='add'>+#define RESTART			0x00000004	/* DMA Buffer Clear SYNC */</div><div class='add'>+#define DI_EN_X			0x00100000	/* Data Interrupt Enable in X count */</div><div class='add'>+#define DI_EN_Y			0x00200000	/* Data Interrupt Enable in Y count */</div><div class='add'>+#define DI_EN_P			0x00300000	/* Data Interrupt Enable in Peripheral */</div><div class='add'>+#define DI_EN			DI_EN_X		/* Data Interrupt Enable */</div><div class='add'>+#define NDSIZE_0		0x00000000	/* Next Descriptor Size = 1 */</div><div class='add'>+#define NDSIZE_1		0x00010000	/* Next Descriptor Size = 2 */</div><div class='add'>+#define NDSIZE_2		0x00020000	/* Next Descriptor Size = 3 */</div><div class='add'>+#define NDSIZE_3		0x00030000	/* Next Descriptor Size = 4 */</div><div class='add'>+#define NDSIZE_4		0x00040000	/* Next Descriptor Size = 5 */</div><div class='add'>+#define NDSIZE_5		0x00050000	/* Next Descriptor Size = 6 */</div><div class='add'>+#define NDSIZE_6		0x00060000	/* Next Descriptor Size = 7 */</div><div class='add'>+#define NDSIZE			0x00070000	/* Next Descriptor Size */</div><div class='add'>+#define NDSIZE_OFFSET		16		/* Next Descriptor Size Offset */</div><div class='add'>+#define DMAFLOW_LIST		0x00004000	/* Descriptor List Mode */</div><div class='add'>+#define DMAFLOW_LARGE		DMAFLOW_LIST</div><div class='add'>+#define DMAFLOW_ARRAY		0x00005000	/* Descriptor Array Mode */</div><div class='add'>+#define DMAFLOW_LIST_DEMAND	0x00006000	/* Descriptor Demand List Mode */</div><div class='add'>+#define DMAFLOW_ARRAY_DEMAND	0x00007000	/* Descriptor Demand Array Mode */</div><div class='add'>+#define DMA_RUN_DFETCH		0x00000100	/* DMA Channel Running Indicator (DFETCH) */</div><div class='add'>+#define DMA_RUN			0x00000200	/* DMA Channel Running Indicator */</div><div class='add'>+#define DMA_RUN_WAIT_TRIG	0x00000300	/* DMA Channel Running Indicator (WAIT TRIG) */</div><div class='add'>+#define DMA_RUN_WAIT_ACK	0x00000400	/* DMA Channel Running Indicator (WAIT ACK) */</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+#define PSIZE_16		0x0000	/* Transfer Word Size = 16 */</div><div class='add'>+#define PSIZE_32		0x0000	/* Transfer Word Size = 32 */</div><div class='ctx'> #define WDSIZE_16		0x0004	/* Transfer Word Size = 16 */</div><div class='ctx'> #define WDSIZE_32		0x0008	/* Transfer Word Size = 32 */</div><div class='ctx'> #define DMA2D			0x0010	/* DMA Mode (2D/1D*) */</div><div class='ctx'> #define RESTART			0x0020	/* DMA Buffer Clear */</div><div class='ctx'> #define DI_SEL			0x0040	/* Data Interrupt Timing Select */</div><div class='ctx'> #define DI_EN			0x0080	/* Data Interrupt Enable */</div><div class='add'>+#define DI_EN_X			0x00C0	/* Data Interrupt Enable in X count*/</div><div class='add'>+#define DI_EN_Y			0x0080	/* Data Interrupt Enable in Y count*/</div><div class='ctx'> #define NDSIZE_0		0x0000	/* Next Descriptor Size = 0 (Stop/Autobuffer) */</div><div class='ctx'> #define NDSIZE_1		0x0100	/* Next Descriptor Size = 1 */</div><div class='ctx'> #define NDSIZE_2		0x0200	/* Next Descriptor Size = 2 */</div><div class='hunk'>@@ -32,18 +75,26 @@</div><div class='ctx'> #define NDSIZE_8		0x0800	/* Next Descriptor Size = 8 */</div><div class='ctx'> #define NDSIZE_9		0x0900	/* Next Descriptor Size = 9 */</div><div class='ctx'> #define NDSIZE			0x0f00	/* Next Descriptor Size */</div><div class='del'>-#define DMAFLOW			0x7000	/* Flow Control */</div><div class='del'>-#define DMAFLOW_STOP	0x0000	/* Stop Mode */</div><div class='del'>-#define DMAFLOW_AUTO	0x1000	/* Autobuffer Mode */</div><div class='add'>+#define NDSIZE_OFFSET		8	/* Next Descriptor Size Offset */</div><div class='ctx'> #define DMAFLOW_ARRAY	0x4000	/* Descriptor Array Mode */</div><div class='ctx'> #define DMAFLOW_SMALL	0x6000	/* Small Model Descriptor List Mode */</div><div class='ctx'> #define DMAFLOW_LARGE	0x7000	/* Large Model Descriptor List Mode */</div><div class='add'>+#define DFETCH			0x0004	/* DMA Descriptor Fetch Indicator */</div><div class='add'>+#define DMA_RUN			0x0008	/* DMA Channel Running Indicator */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+#define DMAFLOW			0x7000	/* Flow Control */</div><div class='add'>+#define DMAFLOW_STOP	0x0000	/* Stop Mode */</div><div class='add'>+#define DMAFLOW_AUTO	0x1000	/* Autobuffer Mode */</div><div class='ctx'> </div><div class='ctx'> /* DMA_IRQ_STATUS Masks */</div><div class='ctx'> #define DMA_DONE		0x0001	/* DMA Completion Interrupt Status */</div><div class='ctx'> #define DMA_ERR			0x0002	/* DMA Error Interrupt Status */</div><div class='del'>-#define DFETCH			0x0004	/* DMA Descriptor Fetch Indicator */</div><div class='del'>-#define DMA_RUN			0x0008	/* DMA Channel Running Indicator */</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+#define DMA_PIRQ		0x0004	/* DMA Peripheral Error Interrupt Status */</div><div class='add'>+#else</div><div class='add'>+#define DMA_PIRQ		0</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * All Blackfin system MMRs are padded to 32bits even if the register</div><div class='hunk'>@@ -57,6 +108,26 @@</div><div class='ctx'> struct bfin_dma_regs {</div><div class='ctx'> 	u32 next_desc_ptr;</div><div class='ctx'> 	u32 start_addr;</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	u32 cfg;</div><div class='add'>+	u32 x_count;</div><div class='add'>+	u32 x_modify;</div><div class='add'>+	u32 y_count;</div><div class='add'>+	u32 y_modify;</div><div class='add'>+	u32 pad1;</div><div class='add'>+	u32 pad2;</div><div class='add'>+	u32 curr_desc_ptr;</div><div class='add'>+	u32 prev_desc_ptr;</div><div class='add'>+	u32 curr_addr;</div><div class='add'>+	u32 irq_status;</div><div class='add'>+	u32 curr_x_count;</div><div class='add'>+	u32 curr_y_count;</div><div class='add'>+	u32 pad3;</div><div class='add'>+	u32 bw_limit_count;</div><div class='add'>+	u32 curr_bw_limit_count;</div><div class='add'>+	u32 bw_monitor_count;</div><div class='add'>+	u32 curr_bw_monitor_count;</div><div class='add'>+#else</div><div class='ctx'> 	__BFP(config);</div><div class='ctx'> 	u32 __pad0;</div><div class='ctx'> 	__BFP(x_count);</div><div class='hunk'>@@ -71,8 +142,10 @@ struct bfin_dma_regs {</div><div class='ctx'> 	u32 __pad1;</div><div class='ctx'> 	__BFP(curr_y_count);</div><div class='ctx'> 	u32 __pad2;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> /*</div><div class='ctx'>  * bfin handshake mdma registers layout</div><div class='ctx'>  */</div><div class='hunk'>@@ -85,6 +158,7 @@ struct bfin_hmdma_regs {</div><div class='ctx'> 	__BFP(ecount);</div><div class='ctx'> 	__BFP(bcount);</div><div class='ctx'> };</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #undef __BFP</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/include/asm/bfin_pfmon.h b/arch/blackfin/include/asm/bfin_pfmon.h<br/>index accd47e2db40..bf52e1f32257 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_pfmon.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/bfin_pfmon.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_pfmon.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_pfmon.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2005-2011 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or GPL-2 (or later).</div><div class='add'>+ * Licensed under the Clear BSD license or GPL-2 (or later).</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASM_BFIN_PFMON_H__</div><div class='head'>diff --git a/arch/blackfin/include/asm/bfin_ppi.h b/arch/blackfin/include/asm/bfin_ppi.h<br/>index 3be05faa2c65..a4e872e16e75 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_ppi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/bfin_ppi.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_ppi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_ppi.h</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #define __ASM_BFIN_PPI_H__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/blackfin.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * All Blackfin system MMRs are padded to 32bits even if the register</div><div class='hunk'>@@ -48,6 +49,133 @@ struct bfin_eppi_regs {</div><div class='ctx'> 	u32 clip;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * bfin eppi3 registers layout</div><div class='add'>+ */</div><div class='add'>+struct bfin_eppi3_regs {</div><div class='add'>+	u32 stat;</div><div class='add'>+	u32 hcnt;</div><div class='add'>+	u32 hdly;</div><div class='add'>+	u32 vcnt;</div><div class='add'>+	u32 vdly;</div><div class='add'>+	u32 frame;</div><div class='add'>+	u32 line;</div><div class='add'>+	u32 clkdiv;</div><div class='add'>+	u32 ctl;</div><div class='add'>+	u32 fs1_wlhb;</div><div class='add'>+	u32 fs1_paspl;</div><div class='add'>+	u32 fs2_wlvb;</div><div class='add'>+	u32 fs2_palpf;</div><div class='add'>+	u32 imsk;</div><div class='add'>+	u32 oddclip;</div><div class='add'>+	u32 evenclip;</div><div class='add'>+	u32 fs1_dly;</div><div class='add'>+	u32 fs2_dly;</div><div class='add'>+	u32 ctl2;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #undef __BFP</div><div class='ctx'> </div><div class='add'>+#ifdef EPPI0_CTL2</div><div class='add'>+#define EPPI_STAT_CFIFOERR              0x00000001    /* Chroma FIFO Error */</div><div class='add'>+#define EPPI_STAT_YFIFOERR              0x00000002    /* Luma FIFO Error */</div><div class='add'>+#define EPPI_STAT_LTERROVR              0x00000004    /* Line Track Overflow */</div><div class='add'>+#define EPPI_STAT_LTERRUNDR             0x00000008    /* Line Track Underflow */</div><div class='add'>+#define EPPI_STAT_FTERROVR              0x00000010    /* Frame Track Overflow */</div><div class='add'>+#define EPPI_STAT_FTERRUNDR             0x00000020    /* Frame Track Underflow */</div><div class='add'>+#define EPPI_STAT_ERRNCOR               0x00000040    /* Preamble Error Not Corrected */</div><div class='add'>+#define EPPI_STAT_PXPERR                0x00000080    /* PxP Ready Error */</div><div class='add'>+#define EPPI_STAT_ERRDET                0x00004000    /* Preamble Error Detected */</div><div class='add'>+#define EPPI_STAT_FLD                   0x00008000    /* Current Field Received by EPPI */</div><div class='add'>+</div><div class='add'>+#define EPPI_HCNT_VALUE                 0x0000FFFF    /* Holds the number of samples to read in or write out per line, after PPIx_HDLY number of cycles have expired since the last assertion of PPIx_FS1 */</div><div class='add'>+</div><div class='add'>+#define EPPI_HDLY_VALUE                 0x0000FFFF    /* Number of PPIx_CLK cycles to delay after assertion of PPIx_FS1 before starting to read or write data */</div><div class='add'>+</div><div class='add'>+#define EPPI_VCNT_VALUE                 0x0000FFFF    /* Holds the number of lines to read in or write out, after PPIx_VDLY number of lines from the start of frame */</div><div class='add'>+</div><div class='add'>+#define EPPI_VDLY_VALUE                 0x0000FFFF    /* Number of lines to wait after the start of a new frame before starting to read/transmit data */</div><div class='add'>+</div><div class='add'>+#define EPPI_FRAME_VALUE                0x0000FFFF    /* Holds the number of lines expected per frame of data */</div><div class='add'>+</div><div class='add'>+#define EPPI_LINE_VALUE                 0x0000FFFF    /* Holds the number of samples expected per line */</div><div class='add'>+</div><div class='add'>+#define EPPI_CLKDIV_VALUE               0x0000FFFF    /* Internal clock divider */</div><div class='add'>+</div><div class='add'>+#define EPPI_CTL_EN                     0x00000001    /* PPI Enable */</div><div class='add'>+#define EPPI_CTL_DIR                    0x00000002    /* PPI Direction */</div><div class='add'>+#define EPPI_CTL_XFRTYPE                0x0000000C    /* PPI Operating Mode */</div><div class='add'>+#define EPPI_CTL_ACTIVE656              0x00000000    /* XFRTYPE: ITU656 Active Video Only Mode */</div><div class='add'>+#define EPPI_CTL_ENTIRE656              0x00000004    /* XFRTYPE: ITU656 Entire Field Mode */</div><div class='add'>+#define EPPI_CTL_VERT656                0x00000008    /* XFRTYPE: ITU656 Vertical Blanking Only Mode */</div><div class='add'>+#define EPPI_CTL_NON656                 0x0000000C    /* XFRTYPE: Non-ITU656 Mode (GP Mode) */</div><div class='add'>+#define EPPI_CTL_FSCFG                  0x00000030    /* Frame Sync Configuration */</div><div class='add'>+#define EPPI_CTL_SYNC0                  0x00000000    /* FSCFG: Sync Mode 0 */</div><div class='add'>+#define EPPI_CTL_SYNC1                  0x00000010    /* FSCFG: Sync Mode 1 */</div><div class='add'>+#define EPPI_CTL_SYNC2                  0x00000020    /* FSCFG: Sync Mode 2 */</div><div class='add'>+#define EPPI_CTL_SYNC3                  0x00000030    /* FSCFG: Sync Mode 3 */</div><div class='add'>+#define EPPI_CTL_FLDSEL                 0x00000040    /* Field Select/Trigger */</div><div class='add'>+#define EPPI_CTL_ITUTYPE                0x00000080    /* ITU Interlace or Progressive */</div><div class='add'>+#define EPPI_CTL_BLANKGEN               0x00000100    /* ITU Output Mode with Internal Blanking Generation */</div><div class='add'>+#define EPPI_CTL_ICLKGEN                0x00000200    /* Internal Clock Generation */</div><div class='add'>+#define EPPI_CTL_IFSGEN                 0x00000400    /* Internal Frame Sync Generation */</div><div class='add'>+#define EPPI_CTL_SIGNEXT                0x00000800    /* Sign Extension */</div><div class='add'>+#define EPPI_CTL_POLC                   0x00003000    /* Frame Sync and Data Driving and Sampling Edges */</div><div class='add'>+#define EPPI_CTL_POLC0                  0x00000000    /* POLC: Clock/Sync polarity mode 0 */</div><div class='add'>+#define EPPI_CTL_POLC1                  0x00001000    /* POLC: Clock/Sync polarity mode 1 */</div><div class='add'>+#define EPPI_CTL_POLC2                  0x00002000    /* POLC: Clock/Sync polarity mode 2 */</div><div class='add'>+#define EPPI_CTL_POLC3                  0x00003000    /* POLC: Clock/Sync polarity mode 3 */</div><div class='add'>+#define EPPI_CTL_POLS                   0x0000C000    /* Frame Sync Polarity */</div><div class='add'>+#define EPPI_CTL_FS1HI_FS2HI            0x00000000    /* POLS: FS1 and FS2 are active high */</div><div class='add'>+#define EPPI_CTL_FS1LO_FS2HI            0x00004000    /* POLS: FS1 is active low. FS2 is active high */</div><div class='add'>+#define EPPI_CTL_FS1HI_FS2LO            0x00008000    /* POLS: FS1 is active high. FS2 is active low */</div><div class='add'>+#define EPPI_CTL_FS1LO_FS2LO            0x0000C000    /* POLS: FS1 and FS2 are active low */</div><div class='add'>+#define EPPI_CTL_DLEN                   0x00070000    /* Data Length */</div><div class='add'>+#define EPPI_CTL_DLEN08                 0x00000000    /* DLEN: 8 bits */</div><div class='add'>+#define EPPI_CTL_DLEN10                 0x00010000    /* DLEN: 10 bits */</div><div class='add'>+#define EPPI_CTL_DLEN12                 0x00020000    /* DLEN: 12 bits */</div><div class='add'>+#define EPPI_CTL_DLEN14                 0x00030000    /* DLEN: 14 bits */</div><div class='add'>+#define EPPI_CTL_DLEN16                 0x00040000    /* DLEN: 16 bits */</div><div class='add'>+#define EPPI_CTL_DLEN18                 0x00050000    /* DLEN: 18 bits */</div><div class='add'>+#define EPPI_CTL_DLEN20                 0x00060000    /* DLEN: 20 bits */</div><div class='add'>+#define EPPI_CTL_DLEN24                 0x00070000    /* DLEN: 24 bits */</div><div class='add'>+#define EPPI_CTL_DMIRR                  0x00080000    /* Data Mirroring */</div><div class='add'>+#define EPPI_CTL_SKIPEN                 0x00100000    /* Skip Enable */</div><div class='add'>+#define EPPI_CTL_SKIPEO                 0x00200000    /* Skip Even or Odd */</div><div class='add'>+#define EPPI_CTL_PACKEN                 0x00400000    /* Pack/Unpack Enable */</div><div class='add'>+#define EPPI_CTL_SWAPEN                 0x00800000    /* Swap Enable */</div><div class='add'>+#define EPPI_CTL_SPLTEO                 0x01000000    /* Split Even and Odd Data Samples */</div><div class='add'>+#define EPPI_CTL_SUBSPLTODD             0x02000000    /* Sub-Split Odd Samples */</div><div class='add'>+#define EPPI_CTL_SPLTWRD                0x04000000    /* Split Word */</div><div class='add'>+#define EPPI_CTL_RGBFMTEN               0x08000000    /* RGB Formatting Enable */</div><div class='add'>+#define EPPI_CTL_DMACFG                 0x10000000    /* One or Two DMA Channels Mode */</div><div class='add'>+#define EPPI_CTL_DMAFINEN               0x20000000    /* DMA Finish Enable */</div><div class='add'>+#define EPPI_CTL_MUXSEL                 0x40000000    /* MUX Select */</div><div class='add'>+#define EPPI_CTL_CLKGATEN               0x80000000    /* Clock Gating Enable */</div><div class='add'>+</div><div class='add'>+#define EPPI_FS2_WLVB_F2VBAD            0xFF000000    /* In GP transmit mode with BLANKGEN = 1, contains number of lines of vertical blanking after field 2 */</div><div class='add'>+#define EPPI_FS2_WLVB_F2VBBD            0x00FF0000    /* In GP transmit mode with BLANKGEN = 1, contains number of lines of vertical blanking before field 2 */</div><div class='add'>+#define EPPI_FS2_WLVB_F1VBAD            0x0000FF00    /* In GP transmit mode with, BLANKGEN = 1, contains number of lines of vertical blanking after field 1 */</div><div class='add'>+#define EPPI_FS2_WLVB_F1VBBD            0x000000FF    /* In GP 2, or 3 FS modes used to generate PPIx_FS2 width (32-bit). In GP Transmit mode, with BLANKGEN=1, contains the number of lines of Vertical blanking before field 1. */</div><div class='add'>+</div><div class='add'>+#define EPPI_FS2_PALPF_F2ACT            0xFFFF0000    /* Number of lines of Active Data in Field 2 */</div><div class='add'>+#define EPPI_FS2_PALPF_F1ACT            0x0000FFFF    /* Number of lines of Active Data in Field 1 */</div><div class='add'>+</div><div class='add'>+#define EPPI_IMSK_CFIFOERR              0x00000001    /* Mask CFIFO Underflow or Overflow Error Interrupt */</div><div class='add'>+#define EPPI_IMSK_YFIFOERR              0x00000002    /* Mask YFIFO Underflow or Overflow Error Interrupt */</div><div class='add'>+#define EPPI_IMSK_LTERROVR              0x00000004    /* Mask Line Track Overflow Error Interrupt */</div><div class='add'>+#define EPPI_IMSK_LTERRUNDR             0x00000008    /* Mask Line Track Underflow Error Interrupt */</div><div class='add'>+#define EPPI_IMSK_FTERROVR              0x00000010    /* Mask Frame Track Overflow Error Interrupt */</div><div class='add'>+#define EPPI_IMSK_FTERRUNDR             0x00000020    /* Mask Frame Track Underflow Error Interrupt */</div><div class='add'>+#define EPPI_IMSK_ERRNCOR               0x00000040    /* Mask ITU Preamble Error Not Corrected Interrupt */</div><div class='add'>+#define EPPI_IMSK_PXPERR                0x00000080    /* Mask PxP Ready Error Interrupt */</div><div class='add'>+</div><div class='add'>+#define EPPI_ODDCLIP_HIGHODD            0xFFFF0000</div><div class='add'>+#define EPPI_ODDCLIP_LOWODD             0x0000FFFF</div><div class='add'>+</div><div class='add'>+#define EPPI_EVENCLIP_HIGHEVEN          0xFFFF0000</div><div class='add'>+#define EPPI_EVENCLIP_LOWEVEN           0x0000FFFF</div><div class='add'>+</div><div class='add'>+#define EPPI_CTL2_FS1FINEN              0x00000002    /* HSYNC Finish Enable */</div><div class='add'>+#endif</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/blackfin/include/asm/bfin_rotary.h b/arch/blackfin/include/asm/bfin_rotary.h<br/>index 0b6910bdc57f..8895a750c70c 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_rotary.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/bfin_rotary.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_rotary.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_rotary.h</a></div><div class='hunk'>@@ -39,6 +39,7 @@ struct bfin_rotary_platform_data {</div><div class='ctx'> 	unsigned int rotary_rel_code;</div><div class='ctx'> 	unsigned short debounce;	/* 0..17 */</div><div class='ctx'> 	unsigned short mode;</div><div class='add'>+	unsigned short pm_wakeup;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* CNT_CONFIG bitmasks */</div><div class='head'>diff --git a/arch/blackfin/include/asm/bfin_serial.h b/arch/blackfin/include/asm/bfin_serial.h<br/>index 68bcc3d119b6..8597158010b5 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_serial.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/bfin_serial.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_serial.h</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'>     defined(CONFIG_BFIN_UART1_CTSRTS) || \</div><div class='ctx'>     defined(CONFIG_BFIN_UART2_CTSRTS) || \</div><div class='ctx'>     defined(CONFIG_BFIN_UART3_CTSRTS)</div><div class='del'>-# ifdef BFIN_UART_BF54X_STYLE</div><div class='add'>+# if defined(BFIN_UART_BF54X_STYLE) || defined(BFIN_UART_BF60X_STYLE)</div><div class='ctx'> #  define CONFIG_SERIAL_BFIN_HARD_CTSRTS</div><div class='ctx'> # else</div><div class='ctx'> #  define CONFIG_SERIAL_BFIN_CTSRTS</div><div class='hunk'>@@ -58,14 +58,69 @@ struct bfin_serial_port {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef BFIN_UART_BF60X_STYLE</div><div class='add'>+</div><div class='add'>+/* UART_CTL Masks */</div><div class='add'>+#define UCEN                     0x1  /* Enable UARTx Clocks */</div><div class='add'>+#define LOOP_ENA                 0x2  /* Loopback Mode Enable */</div><div class='add'>+#define UMOD_MDB                 0x10  /* Enable MDB Mode */</div><div class='add'>+#define UMOD_IRDA                0x20  /* Enable IrDA Mode */</div><div class='add'>+#define UMOD_MASK                0x30  /* Uart Mode Mask */</div><div class='add'>+#define WLS(x)                   (((x-5) &amp; 0x03) &lt;&lt; 8)  /* Word Length Select */</div><div class='add'>+#define WLS_MASK                 0x300  /* Word length Select Mask */</div><div class='add'>+#define WLS_OFFSET               8      /* Word length Select Offset */</div><div class='add'>+#define STB                      0x1000  /* Stop Bits */</div><div class='add'>+#define STBH                     0x2000  /* Half Stop Bits */</div><div class='add'>+#define PEN                      0x4000  /* Parity Enable */</div><div class='add'>+#define EPS                      0x8000  /* Even Parity Select */</div><div class='add'>+#define STP                      0x10000  /* Stick Parity */</div><div class='add'>+#define FPE                      0x20000  /* Force Parity Error On Transmit */</div><div class='add'>+#define FFE                      0x40000  /* Force Framing Error On Transmit */</div><div class='add'>+#define SB                       0x80000  /* Set Break */</div><div class='add'>+#define LCR_MASK		 (SB | STP | EPS | PEN | STB | WLS_MASK)</div><div class='add'>+#define FCPOL                    0x400000  /* Flow Control Pin Polarity */</div><div class='add'>+#define RPOLC                    0x800000  /* IrDA RX Polarity Change */</div><div class='add'>+#define TPOLC                    0x1000000  /* IrDA TX Polarity Change */</div><div class='add'>+#define MRTS                     0x2000000  /* Manual Request To Send */</div><div class='add'>+#define XOFF                     0x4000000  /* Transmitter Off */</div><div class='add'>+#define ARTS                     0x8000000  /* Automatic Request To Send */</div><div class='add'>+#define ACTS                     0x10000000  /* Automatic Clear To Send */</div><div class='add'>+#define RFIT                     0x20000000  /* Receive FIFO IRQ Threshold */</div><div class='add'>+#define RFRT                     0x40000000  /* Receive FIFO RTS Threshold */</div><div class='add'>+</div><div class='add'>+/* UART_STAT Masks */</div><div class='add'>+#define DR                       0x01  /* Data Ready */</div><div class='add'>+#define OE                       0x02  /* Overrun Error */</div><div class='add'>+#define PE                       0x04  /* Parity Error */</div><div class='add'>+#define FE                       0x08  /* Framing Error */</div><div class='add'>+#define BI                       0x10  /* Break Interrupt */</div><div class='add'>+#define THRE                     0x20  /* THR Empty */</div><div class='add'>+#define TEMT                     0x80  /* TSR and UART_THR Empty */</div><div class='add'>+#define TFI                      0x100  /* Transmission Finished Indicator */</div><div class='add'>+</div><div class='add'>+#define ASTKY                    0x200  /* Address Sticky */</div><div class='add'>+#define ADDR                     0x400  /* Address bit status */</div><div class='add'>+#define RO			 0x800  /* Reception Ongoing */</div><div class='add'>+#define SCTS                     0x1000  /* Sticky CTS */</div><div class='add'>+#define CTS                      0x10000  /* Clear To Send */</div><div class='add'>+#define RFCS                     0x20000  /* Receive FIFO Count Status */</div><div class='add'>+</div><div class='add'>+/* UART_CLOCK Masks */</div><div class='add'>+#define EDBO                     0x80000000 /* Enable Devide by One */</div><div class='add'>+</div><div class='add'>+#else /* BFIN_UART_BF60X_STYLE */</div><div class='add'>+</div><div class='ctx'> /* UART_LCR Masks */</div><div class='ctx'> #define WLS(x)                   (((x)-5) &amp; 0x03)  /* Word Length Select */</div><div class='add'>+#define WLS_MASK                 0x03  /* Word length Select Mask */</div><div class='add'>+#define WLS_OFFSET               0     /* Word length Select Offset */</div><div class='ctx'> #define STB                      0x04  /* Stop Bits */</div><div class='ctx'> #define PEN                      0x08  /* Parity Enable */</div><div class='ctx'> #define EPS                      0x10  /* Even Parity Select */</div><div class='ctx'> #define STP                      0x20  /* Stick Parity */</div><div class='ctx'> #define SB                       0x40  /* Set Break */</div><div class='ctx'> #define DLAB                     0x80  /* Divisor Latch Access */</div><div class='add'>+#define LCR_MASK		 (SB | STP | EPS | PEN | STB | WLS_MASK)</div><div class='ctx'> </div><div class='ctx'> /* UART_LSR Masks */</div><div class='ctx'> #define DR                       0x01  /* Data Ready */</div><div class='hunk'>@@ -77,15 +132,6 @@ struct bfin_serial_port {</div><div class='ctx'> #define TEMT                     0x40  /* TSR and UART_THR Empty */</div><div class='ctx'> #define TFI                      0x80  /* Transmission Finished Indicator */</div><div class='ctx'> </div><div class='del'>-/* UART_IER Masks */</div><div class='del'>-#define ERBFI                    0x01  /* Enable Receive Buffer Full Interrupt */</div><div class='del'>-#define ETBEI                    0x02  /* Enable Transmit Buffer Empty Interrupt */</div><div class='del'>-#define ELSI                     0x04  /* Enable RX Status Interrupt */</div><div class='del'>-#define EDSSI                    0x08  /* Enable Modem Status Interrupt */</div><div class='del'>-#define EDTPTI                   0x10  /* Enable DMA Transmit PIRQ Interrupt */</div><div class='del'>-#define ETFI                     0x20  /* Enable Transmission Finished Interrupt */</div><div class='del'>-#define ERFCI                    0x40  /* Enable Receive FIFO Count Interrupt */</div><div class='del'>-</div><div class='ctx'> /* UART_MCR Masks */</div><div class='ctx'> #define XOFF                     0x01  /* Transmitter Off */</div><div class='ctx'> #define MRTS                     0x02  /* Manual Request To Send */</div><div class='hunk'>@@ -103,13 +149,36 @@ struct bfin_serial_port {</div><div class='ctx'> </div><div class='ctx'> /* UART_GCTL Masks */</div><div class='ctx'> #define UCEN                     0x01  /* Enable UARTx Clocks */</div><div class='del'>-#define IREN                     0x02  /* Enable IrDA Mode */</div><div class='add'>+#define UMOD_IRDA                0x02  /* Enable IrDA Mode */</div><div class='add'>+#define UMOD_MASK                0x02  /* Uart Mode Mask */</div><div class='ctx'> #define TPOLC                    0x04  /* IrDA TX Polarity Change */</div><div class='ctx'> #define RPOLC                    0x08  /* IrDA RX Polarity Change */</div><div class='ctx'> #define FPE                      0x10  /* Force Parity Error On Transmit */</div><div class='ctx'> #define FFE                      0x20  /* Force Framing Error On Transmit */</div><div class='ctx'> </div><div class='del'>-#ifdef BFIN_UART_BF54X_STYLE</div><div class='add'>+#endif /* BFIN_UART_BF60X_STYLE */</div><div class='add'>+</div><div class='add'>+/* UART_IER Masks */</div><div class='add'>+#define ERBFI                    0x01  /* Enable Receive Buffer Full Interrupt */</div><div class='add'>+#define ETBEI                    0x02  /* Enable Transmit Buffer Empty Interrupt */</div><div class='add'>+#define ELSI                     0x04  /* Enable RX Status Interrupt */</div><div class='add'>+#define EDSSI                    0x08  /* Enable Modem Status Interrupt */</div><div class='add'>+#define EDTPTI                   0x10  /* Enable DMA Transmit PIRQ Interrupt */</div><div class='add'>+#define ETFI                     0x20  /* Enable Transmission Finished Interrupt */</div><div class='add'>+#define ERFCI                    0x40  /* Enable Receive FIFO Count Interrupt */</div><div class='add'>+</div><div class='add'>+#if defined(BFIN_UART_BF60X_STYLE)</div><div class='add'>+# define OFFSET_REDIV            0x00  /* Version ID Register             */</div><div class='add'>+# define OFFSET_CTL              0x04  /* Control Register                */</div><div class='add'>+# define OFFSET_STAT             0x08  /* Status Register                 */</div><div class='add'>+# define OFFSET_SCR              0x0C  /* SCR Scratch Register            */</div><div class='add'>+# define OFFSET_CLK              0x10  /* Clock Rate Register             */</div><div class='add'>+# define OFFSET_IER              0x14  /* Interrupt Enable Register       */</div><div class='add'>+# define OFFSET_IER_SET          0x18  /* Set Interrupt Enable Register   */</div><div class='add'>+# define OFFSET_IER_CLEAR        0x1C  /* Clear Interrupt Enable Register */</div><div class='add'>+# define OFFSET_RBR              0x20  /* Receive Buffer register         */</div><div class='add'>+# define OFFSET_THR              0x24  /* Transmit Holding register       */</div><div class='add'>+#elif defined(BFIN_UART_BF54X_STYLE)</div><div class='ctx'> # define OFFSET_DLL              0x00  /* Divisor Latch (Low-Byte)        */</div><div class='ctx'> # define OFFSET_DLH              0x04  /* Divisor Latch (High-Byte)       */</div><div class='ctx'> # define OFFSET_GCTL             0x08  /* Global Control Register         */</div><div class='hunk'>@@ -145,7 +214,23 @@ struct bfin_serial_port {</div><div class='ctx'>  */</div><div class='ctx'> #define __BFP(m) u16 m; u16 __pad_##m</div><div class='ctx'> struct bfin_uart_regs {</div><div class='del'>-#ifdef BFIN_UART_BF54X_STYLE</div><div class='add'>+#if defined(BFIN_UART_BF60X_STYLE)</div><div class='add'>+	u32 revid;</div><div class='add'>+	u32 ctl;</div><div class='add'>+	u32 stat;</div><div class='add'>+	u32 scr;</div><div class='add'>+	u32 clk;</div><div class='add'>+	u32 ier;</div><div class='add'>+	u32 ier_set;</div><div class='add'>+	u32 ier_clear;</div><div class='add'>+	u32 rbr;</div><div class='add'>+	u32 thr;</div><div class='add'>+	u32 taip;</div><div class='add'>+	u32 tsr;</div><div class='add'>+	u32 rsr;</div><div class='add'>+	u32 txdiv;</div><div class='add'>+	u32 rxdiv;</div><div class='add'>+#elif defined(BFIN_UART_BF54X_STYLE)</div><div class='ctx'> 	__BFP(dll);</div><div class='ctx'> 	__BFP(dlh);</div><div class='ctx'> 	__BFP(gctl);</div><div class='hunk'>@@ -182,13 +267,70 @@ struct bfin_uart_regs {</div><div class='ctx'> };</div><div class='ctx'> #undef __BFP</div><div class='ctx'> </div><div class='add'>+#define port_membase(uart)     (((struct bfin_serial_port *)(uart))-&gt;port.membase)</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'> #ifndef port_membase</div><div class='ctx'> # define port_membase(p) 0</div><div class='ctx'> #endif</div><div class='add'>+*/</div><div class='add'>+#ifdef BFIN_UART_BF60X_STYLE</div><div class='add'>+</div><div class='add'>+#define UART_GET_CHAR(p)      bfin_read32(port_membase(p) + OFFSET_RBR)</div><div class='add'>+#define UART_GET_CLK(p)       bfin_read32(port_membase(p) + OFFSET_CLK)</div><div class='add'>+#define UART_GET_CTL(p)       bfin_read32(port_membase(p) + OFFSET_CTL)</div><div class='add'>+#define UART_GET_GCTL(p)      UART_GET_CTL(p)</div><div class='add'>+#define UART_GET_LCR(p)       UART_GET_CTL(p)</div><div class='add'>+#define UART_GET_MCR(p)       UART_GET_CTL(p)</div><div class='add'>+#if ANOMALY_05001001</div><div class='add'>+#define UART_GET_STAT(p) \</div><div class='add'>+({ \</div><div class='add'>+	u32 __ret; \</div><div class='add'>+	unsigned long flags; \</div><div class='add'>+	flags = hard_local_irq_save(); \</div><div class='add'>+	__ret = bfin_read32(port_membase(p) + OFFSET_STAT); \</div><div class='add'>+	hard_local_irq_restore(flags); \</div><div class='add'>+	__ret; \</div><div class='add'>+})</div><div class='add'>+#else</div><div class='add'>+#define UART_GET_STAT(p)      bfin_read32(port_membase(p) + OFFSET_STAT)</div><div class='add'>+#endif</div><div class='add'>+#define UART_GET_MSR(p)       UART_GET_STAT(p)</div><div class='add'>+</div><div class='add'>+#define UART_PUT_CHAR(p, v)   bfin_write32(port_membase(p) + OFFSET_THR, v)</div><div class='add'>+#define UART_PUT_CLK(p, v)    bfin_write32(port_membase(p) + OFFSET_CLK, v)</div><div class='add'>+#define UART_PUT_CTL(p, v)    bfin_write32(port_membase(p) + OFFSET_CTL, v)</div><div class='add'>+#define UART_PUT_GCTL(p, v)   UART_PUT_CTL(p, v)</div><div class='add'>+#define UART_PUT_LCR(p, v)    UART_PUT_CTL(p, v)</div><div class='add'>+#define UART_PUT_MCR(p, v)    UART_PUT_CTL(p, v)</div><div class='add'>+#define UART_PUT_STAT(p, v)   bfin_write32(port_membase(p) + OFFSET_STAT, v)</div><div class='add'>+</div><div class='add'>+#define UART_CLEAR_IER(p, v)  bfin_write32(port_membase(p) + OFFSET_IER_CLEAR, v)</div><div class='add'>+#define UART_GET_IER(p)       bfin_read32(port_membase(p) + OFFSET_IER)</div><div class='add'>+#define UART_SET_IER(p, v)    bfin_write32(port_membase(p) + OFFSET_IER_SET, v)</div><div class='add'>+</div><div class='add'>+#define UART_CLEAR_DLAB(p)    /* MMRs not muxed on BF60x */</div><div class='add'>+#define UART_SET_DLAB(p)      /* MMRs not muxed on BF60x */</div><div class='add'>+</div><div class='add'>+#define UART_CLEAR_LSR(p)     UART_PUT_STAT(p, -1)</div><div class='add'>+#define UART_GET_LSR(p)       UART_GET_STAT(p)</div><div class='add'>+#define UART_PUT_LSR(p, v)    UART_PUT_STAT(p, v)</div><div class='add'>+</div><div class='add'>+/* This handles hard CTS/RTS */</div><div class='add'>+#define BFIN_UART_CTSRTS_HARD</div><div class='add'>+#define UART_CLEAR_SCTS(p)      UART_PUT_STAT(p, SCTS)</div><div class='add'>+#define UART_GET_CTS(x)         (UART_GET_MSR(x) &amp; CTS)</div><div class='add'>+#define UART_DISABLE_RTS(x)     UART_PUT_MCR(x, UART_GET_MCR(x) &amp; ~(ARTS | MRTS))</div><div class='add'>+#define UART_ENABLE_RTS(x)      UART_PUT_MCR(x, UART_GET_MCR(x) | MRTS | ARTS)</div><div class='add'>+#define UART_ENABLE_INTS(x, v)  UART_SET_IER(x, v)</div><div class='add'>+#define UART_DISABLE_INTS(x)    UART_CLEAR_IER(x, 0xF)</div><div class='add'>+</div><div class='add'>+#else /* BFIN_UART_BF60X_STYLE */</div><div class='ctx'> </div><div class='ctx'> #define UART_GET_CHAR(p)      bfin_read16(port_membase(p) + OFFSET_RBR)</div><div class='ctx'> #define UART_GET_DLL(p)       bfin_read16(port_membase(p) + OFFSET_DLL)</div><div class='ctx'> #define UART_GET_DLH(p)       bfin_read16(port_membase(p) + OFFSET_DLH)</div><div class='add'>+#define UART_GET_CLK(p)	      ((UART_GET_DLH(p) &lt;&lt; 8) | UART_GET_DLL(p))</div><div class='ctx'> #define UART_GET_GCTL(p)      bfin_read16(port_membase(p) + OFFSET_GCTL)</div><div class='ctx'> #define UART_GET_LCR(p)       bfin_read16(port_membase(p) + OFFSET_LCR)</div><div class='ctx'> #define UART_GET_MCR(p)       bfin_read16(port_membase(p) + OFFSET_MCR)</div><div class='hunk'>@@ -197,6 +339,11 @@ struct bfin_uart_regs {</div><div class='ctx'> #define UART_PUT_CHAR(p, v)   bfin_write16(port_membase(p) + OFFSET_THR, v)</div><div class='ctx'> #define UART_PUT_DLL(p, v)    bfin_write16(port_membase(p) + OFFSET_DLL, v)</div><div class='ctx'> #define UART_PUT_DLH(p, v)    bfin_write16(port_membase(p) + OFFSET_DLH, v)</div><div class='add'>+#define UART_PUT_CLK(p, v) do \</div><div class='add'>+{\</div><div class='add'>+UART_PUT_DLL(p, v &amp; 0xFF); \</div><div class='add'>+UART_PUT_DLH(p, (v &gt;&gt; 8) &amp; 0xFF); } while (0);</div><div class='add'>+</div><div class='ctx'> #define UART_PUT_GCTL(p, v)   bfin_write16(port_membase(p) + OFFSET_GCTL, v)</div><div class='ctx'> #define UART_PUT_LCR(p, v)    bfin_write16(port_membase(p) + OFFSET_LCR, v)</div><div class='ctx'> #define UART_PUT_MCR(p, v)    bfin_write16(port_membase(p) + OFFSET_MCR, v)</div><div class='hunk'>@@ -233,12 +380,17 @@ struct bfin_uart_regs {</div><div class='ctx'> #define UART_CLEAR_DLAB(p)    do { UART_PUT_LCR(p, UART_GET_LCR(p) &amp; ~DLAB); SSYNC(); } while (0)</div><div class='ctx'> #define UART_SET_DLAB(p)      do { UART_PUT_LCR(p, UART_GET_LCR(p) | DLAB); SSYNC(); } while (0)</div><div class='ctx'> </div><div class='add'>+#define get_lsr_cache(uart)    (((struct bfin_serial_port *)(uart))-&gt;lsr)</div><div class='add'>+#define put_lsr_cache(uart, v) (((struct bfin_serial_port *)(uart))-&gt;lsr = (v))</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'> #ifndef put_lsr_cache</div><div class='ctx'> # define put_lsr_cache(p, v)</div><div class='ctx'> #endif</div><div class='ctx'> #ifndef get_lsr_cache</div><div class='ctx'> # define get_lsr_cache(p) 0</div><div class='ctx'> #endif</div><div class='add'>+*/</div><div class='ctx'> </div><div class='ctx'> /* The hardware clears the LSR bits upon read, so we need to cache</div><div class='ctx'>  * some of the more fun bits in software so they don't get lost</div><div class='hunk'>@@ -267,7 +419,9 @@ static inline void UART_PUT_LSR(void *p, uint16_t val)</div><div class='ctx'> #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)</div><div class='ctx'> #define UART_DISABLE_INTS(x)   UART_PUT_IER(x, 0)</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='add'>+#endif /* BFIN_UART_BF54X_STYLE */</div><div class='add'>+</div><div class='add'>+#endif /* BFIN_UART_BF60X_STYLE */</div><div class='ctx'> </div><div class='ctx'> #ifndef BFIN_UART_TX_FIFO_SIZE</div><div class='ctx'> # define BFIN_UART_TX_FIFO_SIZE 2</div><div class='head'>diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h<br/>index 0afcfbd54a82..f8907ea6b5b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_sport.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/bfin_sport.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_sport.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_sport.h</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> struct sport_config {</div><div class='ctx'> 	/* TDM (multichannels), I2S or other mode */</div><div class='ctx'> 	unsigned int mode:3;</div><div class='add'>+	unsigned int polled;	/* use poll instead of irq when set */</div><div class='ctx'> </div><div class='ctx'> 	/* if TDM mode is selected, channels must be set */</div><div class='ctx'> 	int channels;	/* Must be in 8 units */</div><div class='head'>diff --git a/arch/blackfin/include/asm/bfin_sport3.h b/arch/blackfin/include/asm/bfin_sport3.h<br/>new file mode 100644<br/>index 000000000000..03c00220d69b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_sport3.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_sport3.h</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+/*</div><div class='add'>+ * bfin_sport - Analog Devices BF6XX SPORT registers</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _BFIN_SPORT3_H_</div><div class='add'>+#define _BFIN_SPORT3_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#define SPORT_CTL_SPENPRI             0x00000001    /* Enable Primary Channel */</div><div class='add'>+#define SPORT_CTL_DTYPE               0x00000006    /* Data type select */</div><div class='add'>+#define SPORT_CTL_RJUSTIFY_ZFILL      0x00000000    /* DTYPE: MCM mode: Right-justify, zero-fill unused MSBs */</div><div class='add'>+#define SPORT_CTL_RJUSTIFY_SFILL      0x00000002    /* DTYPE: MCM mode: Right-justify, sign-extend unused MSBs */</div><div class='add'>+#define SPORT_CTL_USE_U_LAW           0x00000004    /* DTYPE: MCM mode: Compand using u-law */</div><div class='add'>+#define SPORT_CTL_USE_A_LAW           0x00000006    /* DTYPE: MCM mode: Compand using A-law */</div><div class='add'>+#define SPORT_CTL_LSBF                0x00000008    /* Serial bit endian select */</div><div class='add'>+#define SPORT_CTL_SLEN                0x000001F0    /* Serial Word length select */</div><div class='add'>+#define SPORT_CTL_PACK                0x00000200    /* 16-bit to 32-bit packing enable */</div><div class='add'>+#define SPORT_CTL_ICLK                0x00000400    /* Internal Clock Select */</div><div class='add'>+#define SPORT_CTL_OPMODE              0x00000800    /* Operation mode */</div><div class='add'>+#define SPORT_CTL_CKRE                0x00001000    /* Clock rising edge select */</div><div class='add'>+#define SPORT_CTL_FSR                 0x00002000    /* Frame Sync required */</div><div class='add'>+#define SPORT_CTL_IFS                 0x00004000    /* Internal Frame Sync select */</div><div class='add'>+#define SPORT_CTL_DIFS                0x00008000    /* Data-independent frame sync select */</div><div class='add'>+#define SPORT_CTL_LFS                 0x00010000    /* Active low frame sync select */</div><div class='add'>+#define SPORT_CTL_LAFS                0x00020000    /* Late Transmit frame select */</div><div class='add'>+#define SPORT_CTL_RJUST               0x00040000    /* Right Justified mode select */</div><div class='add'>+#define SPORT_CTL_FSED                0x00080000    /* External frame sync edge select */</div><div class='add'>+#define SPORT_CTL_TFIEN               0x00100000    /* Transmit finish interrrupt enable select */</div><div class='add'>+#define SPORT_CTL_GCLKEN              0x00200000    /* Gated clock mode select */</div><div class='add'>+#define SPORT_CTL_SPENSEC             0x01000000    /* Enable secondary channel */</div><div class='add'>+#define SPORT_CTL_SPTRAN              0x02000000    /* Data direction control */</div><div class='add'>+#define SPORT_CTL_DERRSEC             0x04000000    /* Secondary channel error status */</div><div class='add'>+#define SPORT_CTL_DXSSEC              0x18000000    /* Secondary channel data buffer status */</div><div class='add'>+#define SPORT_CTL_SEC_EMPTY           0x00000000    /* DXSSEC: Empty */</div><div class='add'>+#define SPORT_CTL_SEC_PART_FULL       0x10000000    /* DXSSEC: Partially full */</div><div class='add'>+#define SPORT_CTL_SEC_FULL            0x18000000    /* DXSSEC: Full */</div><div class='add'>+#define SPORT_CTL_DERRPRI             0x20000000    /* Primary channel error status */</div><div class='add'>+#define SPORT_CTL_DXSPRI              0xC0000000    /* Primary channel data buffer status */</div><div class='add'>+#define SPORT_CTL_PRM_EMPTY           0x00000000    /* DXSPRI: Empty */</div><div class='add'>+#define SPORT_CTL_PRM_PART_FULL       0x80000000    /* DXSPRI: Partially full */</div><div class='add'>+#define SPORT_CTL_PRM_FULL            0xC0000000    /* DXSPRI: Full */</div><div class='add'>+</div><div class='add'>+#define SPORT_DIV_CLKDIV              0x0000FFFF    /* Clock divisor */</div><div class='add'>+#define SPORT_DIV_FSDIV               0xFFFF0000    /* Frame sync divisor */</div><div class='add'>+</div><div class='add'>+#define SPORT_MCTL_MCE                0x00000001    /* Multichannel enable */</div><div class='add'>+#define SPORT_MCTL_MCPDE              0x00000004    /* Multichannel data packing select */</div><div class='add'>+#define SPORT_MCTL_MFD                0x000000F0    /* Multichannel frame delay */</div><div class='add'>+#define SPORT_MCTL_WSIZE              0x00007F00    /* Number of multichannel slots */</div><div class='add'>+#define SPORT_MCTL_WOFFSET            0x03FF0000    /* Window offset size */</div><div class='add'>+</div><div class='add'>+#define SPORT_CNT_CLKCNT              0x0000FFFF    /* Current state of clk div counter */</div><div class='add'>+#define SPORT_CNT_FSDIVCNT            0xFFFF0000    /* Current state of frame div counter */</div><div class='add'>+</div><div class='add'>+#define SPORT_ERR_DERRPMSK            0x00000001    /* Primary channel data error interrupt enable */</div><div class='add'>+#define SPORT_ERR_DERRSMSK            0x00000002    /* Secondary channel data error interrupt enable */</div><div class='add'>+#define SPORT_ERR_FSERRMSK            0x00000004    /* Frame sync error interrupt enable */</div><div class='add'>+#define SPORT_ERR_DERRPSTAT           0x00000010    /* Primary channel data error status */</div><div class='add'>+#define SPORT_ERR_DERRSSTAT           0x00000020    /* Secondary channel data error status */</div><div class='add'>+#define SPORT_ERR_FSERRSTAT           0x00000040    /* Frame sync error status */</div><div class='add'>+</div><div class='add'>+#define SPORT_MSTAT_CURCHAN           0x000003FF    /* Channel which is being serviced in the multichannel operation */</div><div class='add'>+</div><div class='add'>+#define SPORT_CTL2_FSMUXSEL           0x00000001    /* Frame Sync MUX Select */</div><div class='add'>+#define SPORT_CTL2_CKMUXSEL           0x00000002    /* Clock MUX Select */</div><div class='add'>+#define SPORT_CTL2_LBSEL              0x00000004    /* Loopback Select */</div><div class='add'>+</div><div class='add'>+struct sport_register {</div><div class='add'>+	u32 spctl;</div><div class='add'>+	u32 div;</div><div class='add'>+	u32 spmctl;</div><div class='add'>+	u32 spcs0;</div><div class='add'>+	u32 spcs1;</div><div class='add'>+	u32 spcs2;</div><div class='add'>+	u32 spcs3;</div><div class='add'>+	u32 spcnt;</div><div class='add'>+	u32 sperrctl;</div><div class='add'>+	u32 spmstat;</div><div class='add'>+	u32 spctl2;</div><div class='add'>+	u32 txa;</div><div class='add'>+	u32 rxa;</div><div class='add'>+	u32 txb;</div><div class='add'>+	u32 rxb;</div><div class='add'>+	u32 revid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bfin_snd_platform_data {</div><div class='add'>+	const unsigned short *pin_req;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/blackfin/include/asm/bfin_twi.h b/arch/blackfin/include/asm/bfin_twi.h<br/>index e767d649dfc4..2f3339a47626 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_twi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/bfin_twi.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/bfin_twi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/bfin_twi.h</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #define __ASM_BFIN_TWI_H__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * All Blackfin system MMRs are padded to 32bits even if the register</div><div class='hunk'>@@ -42,4 +43,145 @@ struct bfin_twi_regs {</div><div class='ctx'> </div><div class='ctx'> #undef __BFP</div><div class='ctx'> </div><div class='add'>+struct bfin_twi_iface {</div><div class='add'>+	int			irq;</div><div class='add'>+	spinlock_t		lock;</div><div class='add'>+	char			read_write;</div><div class='add'>+	u8			command;</div><div class='add'>+	u8			*transPtr;</div><div class='add'>+	int			readNum;</div><div class='add'>+	int			writeNum;</div><div class='add'>+	int			cur_mode;</div><div class='add'>+	int			manual_stop;</div><div class='add'>+	int			result;</div><div class='add'>+	struct i2c_adapter	adap;</div><div class='add'>+	struct completion	complete;</div><div class='add'>+	struct i2c_msg		*pmsg;</div><div class='add'>+	int			msg_num;</div><div class='add'>+	int			cur_msg;</div><div class='add'>+	u16			saved_clkdiv;</div><div class='add'>+	u16			saved_control;</div><div class='add'>+	struct bfin_twi_regs	*regs_base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define DEFINE_TWI_REG(reg_name, reg) \</div><div class='add'>+static inline u16 read_##reg_name(struct bfin_twi_iface *iface) \</div><div class='add'>+	{ return iface-&gt;regs_base-&gt;reg; } \</div><div class='add'>+static inline void write_##reg_name(struct bfin_twi_iface *iface, u16 v) \</div><div class='add'>+	{ iface-&gt;regs_base-&gt;reg = v; }</div><div class='add'>+</div><div class='add'>+DEFINE_TWI_REG(CLKDIV, clkdiv)</div><div class='add'>+DEFINE_TWI_REG(CONTROL, control)</div><div class='add'>+DEFINE_TWI_REG(SLAVE_CTL, slave_ctl)</div><div class='add'>+DEFINE_TWI_REG(SLAVE_STAT, slave_stat)</div><div class='add'>+DEFINE_TWI_REG(SLAVE_ADDR, slave_addr)</div><div class='add'>+DEFINE_TWI_REG(MASTER_CTL, master_ctl)</div><div class='add'>+DEFINE_TWI_REG(MASTER_STAT, master_stat)</div><div class='add'>+DEFINE_TWI_REG(MASTER_ADDR, master_addr)</div><div class='add'>+DEFINE_TWI_REG(INT_STAT, int_stat)</div><div class='add'>+DEFINE_TWI_REG(INT_MASK, int_mask)</div><div class='add'>+DEFINE_TWI_REG(FIFO_CTL, fifo_ctl)</div><div class='add'>+DEFINE_TWI_REG(FIFO_STAT, fifo_stat)</div><div class='add'>+DEFINE_TWI_REG(XMT_DATA8, xmt_data8)</div><div class='add'>+DEFINE_TWI_REG(XMT_DATA16, xmt_data16)</div><div class='add'>+#if !ANOMALY_05001001</div><div class='add'>+DEFINE_TWI_REG(RCV_DATA8, rcv_data8)</div><div class='add'>+DEFINE_TWI_REG(RCV_DATA16, rcv_data16)</div><div class='add'>+#else</div><div class='add'>+static inline u16 read_RCV_DATA8(struct bfin_twi_iface *iface)</div><div class='add'>+{</div><div class='add'>+	u16 ret;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	flags = hard_local_irq_save();</div><div class='add'>+	ret = iface-&gt;regs_base-&gt;rcv_data8;</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16 read_RCV_DATA16(struct bfin_twi_iface *iface)</div><div class='add'>+{</div><div class='add'>+	u16 ret;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	flags = hard_local_irq_save();</div><div class='add'>+	ret = iface-&gt;regs_base-&gt;rcv_data16;</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*  ********************  TWO-WIRE INTERFACE (TWI) MASKS  ***********************/</div><div class='add'>+/* TWI_CLKDIV Macros (Use: *pTWI_CLKDIV = CLKLOW(x)|CLKHI(y);  )				*/</div><div class='add'>+#define	CLKLOW(x)	((x) &amp; 0xFF)	/* Periods Clock Is Held Low                    */</div><div class='add'>+#define CLKHI(y)	(((y)&amp;0xFF)&lt;&lt;0x8)	/* Periods Before New Clock Low                 */</div><div class='add'>+</div><div class='add'>+/* TWI_PRESCALE Masks															*/</div><div class='add'>+#define	PRESCALE	0x007F	/* SCLKs Per Internal Time Reference (10MHz)    */</div><div class='add'>+#define	TWI_ENA		0x0080	/* TWI Enable                                                                   */</div><div class='add'>+#define	SCCB		0x0200	/* SCCB Compatibility Enable                                    */</div><div class='add'>+</div><div class='add'>+/* TWI_SLAVE_CTL Masks															*/</div><div class='add'>+#define	SEN			0x0001	/* Slave Enable                                                                 */</div><div class='add'>+#define	SADD_LEN	0x0002	/* Slave Address Length                                                 */</div><div class='add'>+#define	STDVAL		0x0004	/* Slave Transmit Data Valid                                    */</div><div class='add'>+#define	NAK			0x0008	/* NAK/ACK* Generated At Conclusion Of Transfer */</div><div class='add'>+#define	GEN			0x0010	/* General Call Address Matching Enabled                */</div><div class='add'>+</div><div class='add'>+/* TWI_SLAVE_STAT Masks															*/</div><div class='add'>+#define	SDIR		0x0001	/* Slave Transfer Direction (Transmit/Receive*) */</div><div class='add'>+#define GCALL		0x0002	/* General Call Indicator                                               */</div><div class='add'>+</div><div class='add'>+/* TWI_MASTER_CTL Masks													*/</div><div class='add'>+#define	MEN			0x0001	/* Master Mode Enable                                           */</div><div class='add'>+#define	MADD_LEN	0x0002	/* Master Address Length                                        */</div><div class='add'>+#define	MDIR		0x0004	/* Master Transmit Direction (RX/TX*)           */</div><div class='add'>+#define	FAST		0x0008	/* Use Fast Mode Timing Specs                           */</div><div class='add'>+#define	STOP		0x0010	/* Issue Stop Condition                                         */</div><div class='add'>+#define	RSTART		0x0020	/* Repeat Start or Stop* At End Of Transfer     */</div><div class='add'>+#define	DCNT		0x3FC0	/* Data Bytes To Transfer                                       */</div><div class='add'>+#define	SDAOVR		0x4000	/* Serial Data Override                                         */</div><div class='add'>+#define	SCLOVR		0x8000	/* Serial Clock Override                                        */</div><div class='add'>+</div><div class='add'>+/* TWI_MASTER_STAT Masks														*/</div><div class='add'>+#define	MPROG		0x0001	/* Master Transfer In Progress                                  */</div><div class='add'>+#define	LOSTARB		0x0002	/* Lost Arbitration Indicator (Xfer Aborted)    */</div><div class='add'>+#define	ANAK		0x0004	/* Address Not Acknowledged                                             */</div><div class='add'>+#define	DNAK		0x0008	/* Data Not Acknowledged                                                */</div><div class='add'>+#define	BUFRDERR	0x0010	/* Buffer Read Error                                                    */</div><div class='add'>+#define	BUFWRERR	0x0020	/* Buffer Write Error                                                   */</div><div class='add'>+#define	SDASEN		0x0040	/* Serial Data Sense                                                    */</div><div class='add'>+#define	SCLSEN		0x0080	/* Serial Clock Sense                                                   */</div><div class='add'>+#define	BUSBUSY		0x0100	/* Bus Busy Indicator                                                   */</div><div class='add'>+</div><div class='add'>+/* TWI_INT_SRC and TWI_INT_ENABLE Masks						*/</div><div class='add'>+#define	SINIT		0x0001	/* Slave Transfer Initiated     */</div><div class='add'>+#define	SCOMP		0x0002	/* Slave Transfer Complete      */</div><div class='add'>+#define	SERR		0x0004	/* Slave Transfer Error         */</div><div class='add'>+#define	SOVF		0x0008	/* Slave Overflow                       */</div><div class='add'>+#define	MCOMP		0x0010	/* Master Transfer Complete     */</div><div class='add'>+#define	MERR		0x0020	/* Master Transfer Error        */</div><div class='add'>+#define	XMTSERV		0x0040	/* Transmit FIFO Service        */</div><div class='add'>+#define	RCVSERV		0x0080	/* Receive FIFO Service         */</div><div class='add'>+</div><div class='add'>+/* TWI_FIFO_CTRL Masks												*/</div><div class='add'>+#define	XMTFLUSH	0x0001	/* Transmit Buffer Flush                        */</div><div class='add'>+#define	RCVFLUSH	0x0002	/* Receive Buffer Flush                         */</div><div class='add'>+#define	XMTINTLEN	0x0004	/* Transmit Buffer Interrupt Length     */</div><div class='add'>+#define	RCVINTLEN	0x0008	/* Receive Buffer Interrupt Length      */</div><div class='add'>+</div><div class='add'>+/* TWI_FIFO_STAT Masks															*/</div><div class='add'>+#define	XMTSTAT		0x0003	/* Transmit FIFO Status                                                 */</div><div class='add'>+#define	XMT_EMPTY	0x0000	/*              Transmit FIFO Empty                                             */</div><div class='add'>+#define	XMT_HALF	0x0001	/*              Transmit FIFO Has 1 Byte To Write               */</div><div class='add'>+#define	XMT_FULL	0x0003	/*              Transmit FIFO Full (2 Bytes To Write)   */</div><div class='add'>+</div><div class='add'>+#define	RCVSTAT		0x000C	/* Receive FIFO Status                                                  */</div><div class='add'>+#define	RCV_EMPTY	0x0000	/*              Receive FIFO Empty                                              */</div><div class='add'>+#define	RCV_HALF	0x0004	/*              Receive FIFO Has 1 Byte To Read                 */</div><div class='add'>+#define	RCV_FULL	0x000C	/*              Receive FIFO Full (2 Bytes To Read)             */</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/blackfin/include/asm/blackfin.h b/arch/blackfin/include/asm/blackfin.h<br/>index 7be5368c0512..f111f366d758 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/blackfin.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/blackfin.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/blackfin.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/blackfin.h</a></div><div class='hunk'>@@ -63,20 +63,16 @@ static inline void CSYNC(void)</div><div class='ctx'> </div><div class='ctx'> #if ANOMALY_05000312 || ANOMALY_05000244</div><div class='ctx'> #define SSYNC(scratch)	\</div><div class='del'>-do {			\</div><div class='ctx'> 	cli scratch;	\</div><div class='ctx'> 	nop; nop; nop;	\</div><div class='ctx'> 	SSYNC;		\</div><div class='del'>-	sti scratch;	\</div><div class='del'>-} while (0)</div><div class='add'>+	sti scratch;</div><div class='ctx'> </div><div class='ctx'> #define CSYNC(scratch)	\</div><div class='del'>-do {			\</div><div class='ctx'> 	cli scratch;	\</div><div class='ctx'> 	nop; nop; nop;	\</div><div class='ctx'> 	CSYNC;		\</div><div class='del'>-	sti scratch;	\</div><div class='del'>-} while (0)</div><div class='add'>+	sti scratch;</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> #define SSYNC(scratch) SSYNC;</div><div class='head'>diff --git a/arch/blackfin/include/asm/clkdev.h b/arch/blackfin/include/asm/clkdev.h<br/>new file mode 100644<br/>index 000000000000..9053beda8c50<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/clkdev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/clkdev.h</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+#ifndef __ASM_CLKDEV__H_</div><div class='add'>+#define __ASM_CLKDEV__H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+static inline struct clk_lookup_alloc *__clkdev_alloc(size_t size)</div><div class='add'>+{</div><div class='add'>+	return kzalloc(size, GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define __clk_put(clk)</div><div class='add'>+#define __clk_get(clk) ({ 1; })</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/blackfin/include/asm/clocks.h b/arch/blackfin/include/asm/clocks.h<br/>index 6f0b61852f58..9b3c85b3c288 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/clocks.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/clocks.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/clocks.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/clocks.h</a></div><div class='hunk'>@@ -48,4 +48,27 @@</div><div class='ctx'> # define CONFIG_VCO_MULT 0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+</div><div class='add'>+struct clk_ops {</div><div class='add'>+	unsigned long (*get_rate)(struct clk *clk);</div><div class='add'>+	unsigned long (*round_rate)(struct clk *clk, unsigned long rate);</div><div class='add'>+	int (*set_rate)(struct clk *clk, unsigned long rate);</div><div class='add'>+	int (*enable)(struct clk *clk);</div><div class='add'>+	int (*disable)(struct clk *clk);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk {</div><div class='add'>+	struct clk		*parent;</div><div class='add'>+	const char              *name;</div><div class='add'>+	unsigned long           rate;</div><div class='add'>+	spinlock_t              lock;</div><div class='add'>+	u32                     flags;</div><div class='add'>+	const struct clk_ops    *ops;</div><div class='add'>+	void __iomem            *reg;</div><div class='add'>+	u32                     mask;</div><div class='add'>+	u32                     shift;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int clk_init(void);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h<br/>index fda96261ed62..5c37f620c4b3 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/cplb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/cplb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/cplb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/cplb.h</a></div><div class='hunk'>@@ -62,6 +62,10 @@</div><div class='ctx'> #define SIZE_4K 0x00001000      /* 4K */</div><div class='ctx'> #define SIZE_1M 0x00100000      /* 1M */</div><div class='ctx'> #define SIZE_4M 0x00400000      /* 4M */</div><div class='add'>+#define SIZE_16K 0x00004000      /* 16K */</div><div class='add'>+#define SIZE_64K 0x00010000      /* 64K */</div><div class='add'>+#define SIZE_16M 0x01000000      /* 16M */</div><div class='add'>+#define SIZE_64M 0x04000000      /* 64M */</div><div class='ctx'> </div><div class='ctx'> #define MAX_CPLBS 16</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/include/asm/def_LPBlackfin.h b/arch/blackfin/include/asm/def_LPBlackfin.h<br/>index 823679011457..fe0ca03a1cb2 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/def_LPBlackfin.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/def_LPBlackfin.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/def_LPBlackfin.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/def_LPBlackfin.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2005-2008 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or GPL-2 (or later).</div><div class='add'>+ * Licensed under the Clear BSD license or GPL-2 (or later).</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_LPBLACKFIN_H</div><div class='hunk'>@@ -622,6 +622,10 @@ do { \</div><div class='ctx'> #define PAGE_SIZE_4KB      0x00010000	/* 4 KB page size */</div><div class='ctx'> #define PAGE_SIZE_1MB      0x00020000	/* 1 MB page size */</div><div class='ctx'> #define PAGE_SIZE_4MB      0x00030000	/* 4 MB page size */</div><div class='add'>+#define PAGE_SIZE_16KB     0x00040000	/* 16 KB page size */</div><div class='add'>+#define PAGE_SIZE_64KB     0x00050000	/* 64 KB page size */</div><div class='add'>+#define PAGE_SIZE_16MB     0x00060000	/* 16 MB page size */</div><div class='add'>+#define PAGE_SIZE_64MB     0x00070000	/* 64 MB page size */</div><div class='ctx'> #define CPLB_L1SRAM        0x00000020	/* 0=SRAM mapped in L1, 0=SRAM not</div><div class='ctx'> 					 * mapped to L1</div><div class='ctx'> 					 */</div><div class='head'>diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h<br/>index dac0c97242bb..40e9c2bbc6e3 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/dma.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/dma.h</a></div><div class='hunk'>@@ -22,12 +22,22 @@</div><div class='ctx'> #define DATA_SIZE_8			0</div><div class='ctx'> #define DATA_SIZE_16		1</div><div class='ctx'> #define DATA_SIZE_32		2</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+#define DATA_SIZE_64		3</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #define DMA_FLOW_STOP		0</div><div class='ctx'> #define DMA_FLOW_AUTO		1</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+#define DMA_FLOW_LIST		4</div><div class='add'>+#define DMA_FLOW_ARRAY		5</div><div class='add'>+#define DMA_FLOW_LIST_DEMAND	6</div><div class='add'>+#define DMA_FLOW_ARRAY_DEMAND	7</div><div class='add'>+#else</div><div class='ctx'> #define DMA_FLOW_ARRAY		4</div><div class='ctx'> #define DMA_FLOW_SMALL		6</div><div class='ctx'> #define DMA_FLOW_LARGE		7</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #define DIMENSION_LINEAR	0</div><div class='ctx'> #define DIMENSION_2D		1</div><div class='hunk'>@@ -36,26 +46,80 @@</div><div class='ctx'> #define DIR_WRITE			1</div><div class='ctx'> </div><div class='ctx'> #define INTR_DISABLE		0</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+#define INTR_ON_PERI			1</div><div class='add'>+#endif</div><div class='ctx'> #define INTR_ON_BUF			2</div><div class='ctx'> #define INTR_ON_ROW			3</div><div class='ctx'> </div><div class='ctx'> #define DMA_NOSYNC_KEEP_DMA_BUF	0</div><div class='ctx'> #define DMA_SYNC_RESTART		1</div><div class='ctx'> </div><div class='add'>+#ifdef DMA_MMR_SIZE_32</div><div class='add'>+#define DMA_MMR_SIZE_TYPE long</div><div class='add'>+#define DMA_MMR_READ bfin_read32</div><div class='add'>+#define DMA_MMR_WRITE bfin_write32</div><div class='add'>+#else</div><div class='add'>+#define DMA_MMR_SIZE_TYPE short</div><div class='add'>+#define DMA_MMR_READ bfin_read16</div><div class='add'>+#define DMA_MMR_WRITE bfin_write16</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+struct dma_desc_array {</div><div class='add'>+	unsigned long start_addr;</div><div class='add'>+	unsigned DMA_MMR_SIZE_TYPE cfg;</div><div class='add'>+	unsigned DMA_MMR_SIZE_TYPE x_count;</div><div class='add'>+	DMA_MMR_SIZE_TYPE x_modify;</div><div class='add'>+} __attribute__((packed));</div><div class='add'>+</div><div class='ctx'> struct dmasg {</div><div class='ctx'> 	void *next_desc_addr;</div><div class='ctx'> 	unsigned long start_addr;</div><div class='del'>-	unsigned short cfg;</div><div class='del'>-	unsigned short x_count;</div><div class='del'>-	short x_modify;</div><div class='del'>-	unsigned short y_count;</div><div class='del'>-	short y_modify;</div><div class='add'>+	unsigned DMA_MMR_SIZE_TYPE cfg;</div><div class='add'>+	unsigned DMA_MMR_SIZE_TYPE x_count;</div><div class='add'>+	DMA_MMR_SIZE_TYPE x_modify;</div><div class='add'>+	unsigned DMA_MMR_SIZE_TYPE y_count;</div><div class='add'>+	DMA_MMR_SIZE_TYPE y_modify;</div><div class='ctx'> } __attribute__((packed));</div><div class='ctx'> </div><div class='ctx'> struct dma_register {</div><div class='ctx'> 	void *next_desc_ptr;	/* DMA Next Descriptor Pointer register */</div><div class='ctx'> 	unsigned long start_addr;	/* DMA Start address  register */</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	unsigned long cfg;	/* DMA Configuration register */</div><div class='ctx'> </div><div class='add'>+	unsigned long x_count;	/* DMA x_count register */</div><div class='add'>+</div><div class='add'>+	long x_modify;	/* DMA x_modify register */</div><div class='add'>+</div><div class='add'>+	unsigned long y_count;	/* DMA y_count register */</div><div class='add'>+</div><div class='add'>+	long y_modify;	/* DMA y_modify register */</div><div class='add'>+</div><div class='add'>+	unsigned long reserved;</div><div class='add'>+	unsigned long reserved2;</div><div class='add'>+</div><div class='add'>+	void *curr_desc_ptr;	/* DMA Current Descriptor Pointer</div><div class='add'>+					   register */</div><div class='add'>+	void *prev_desc_ptr;	/* DMA previous initial Descriptor Pointer</div><div class='add'>+					   register */</div><div class='add'>+	unsigned long curr_addr_ptr;	/* DMA Current Address Pointer</div><div class='add'>+						   register */</div><div class='add'>+	unsigned long irq_status;	/* DMA irq status register */</div><div class='add'>+</div><div class='add'>+	unsigned long curr_x_count;	/* DMA Current x-count register */</div><div class='add'>+</div><div class='add'>+	unsigned long curr_y_count;	/* DMA Current y-count register */</div><div class='add'>+</div><div class='add'>+	unsigned long reserved3;</div><div class='add'>+</div><div class='add'>+	unsigned long bw_limit_count;	/* DMA band width limit count register */</div><div class='add'>+	unsigned long curr_bw_limit_count;	/* DMA Current band width limit</div><div class='add'>+							count register */</div><div class='add'>+	unsigned long bw_monitor_count;	/* DMA band width limit count register */</div><div class='add'>+	unsigned long curr_bw_monitor_count;	/* DMA Current band width limit</div><div class='add'>+							count register */</div><div class='add'>+#else</div><div class='ctx'> 	unsigned short cfg;	/* DMA Configuration register */</div><div class='ctx'> 	unsigned short dummy1;	/* DMA Configuration register */</div><div class='ctx'> </div><div class='hunk'>@@ -92,6 +156,7 @@ struct dma_register {</div><div class='ctx'> 	unsigned short dummy9;</div><div class='ctx'> </div><div class='ctx'> 	unsigned long reserved3;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -131,23 +196,23 @@ static inline void set_dma_curr_desc_addr(unsigned int channel, void *addr)</div><div class='ctx'> {</div><div class='ctx'> 	dma_ch[channel].regs-&gt;curr_desc_ptr = addr;</div><div class='ctx'> }</div><div class='del'>-static inline void set_dma_x_count(unsigned int channel, unsigned short x_count)</div><div class='add'>+static inline void set_dma_x_count(unsigned int channel, unsigned DMA_MMR_SIZE_TYPE x_count)</div><div class='ctx'> {</div><div class='ctx'> 	dma_ch[channel].regs-&gt;x_count = x_count;</div><div class='ctx'> }</div><div class='del'>-static inline void set_dma_y_count(unsigned int channel, unsigned short y_count)</div><div class='add'>+static inline void set_dma_y_count(unsigned int channel, unsigned DMA_MMR_SIZE_TYPE y_count)</div><div class='ctx'> {</div><div class='ctx'> 	dma_ch[channel].regs-&gt;y_count = y_count;</div><div class='ctx'> }</div><div class='del'>-static inline void set_dma_x_modify(unsigned int channel, short x_modify)</div><div class='add'>+static inline void set_dma_x_modify(unsigned int channel, DMA_MMR_SIZE_TYPE x_modify)</div><div class='ctx'> {</div><div class='ctx'> 	dma_ch[channel].regs-&gt;x_modify = x_modify;</div><div class='ctx'> }</div><div class='del'>-static inline void set_dma_y_modify(unsigned int channel, short y_modify)</div><div class='add'>+static inline void set_dma_y_modify(unsigned int channel, DMA_MMR_SIZE_TYPE y_modify)</div><div class='ctx'> {</div><div class='ctx'> 	dma_ch[channel].regs-&gt;y_modify = y_modify;</div><div class='ctx'> }</div><div class='del'>-static inline void set_dma_config(unsigned int channel, unsigned short config)</div><div class='add'>+static inline void set_dma_config(unsigned int channel, unsigned DMA_MMR_SIZE_TYPE config)</div><div class='ctx'> {</div><div class='ctx'> 	dma_ch[channel].regs-&gt;cfg = config;</div><div class='ctx'> }</div><div class='hunk'>@@ -156,23 +221,55 @@ static inline void set_dma_curr_addr(unsigned int channel, unsigned long addr)</div><div class='ctx'> 	dma_ch[channel].regs-&gt;curr_addr_ptr = addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned short</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+static inline unsigned long</div><div class='add'>+set_bfin_dma_config2(char direction, char flow_mode, char intr_mode,</div><div class='add'>+		     char dma_mode, char mem_width, char syncmode, char peri_width)</div><div class='add'>+{</div><div class='add'>+	unsigned long config = 0;</div><div class='add'>+</div><div class='add'>+	switch (intr_mode) {</div><div class='add'>+	case INTR_ON_BUF:</div><div class='add'>+		if (dma_mode == DIMENSION_2D)</div><div class='add'>+			config = DI_EN_Y;</div><div class='add'>+		else</div><div class='add'>+			config = DI_EN_X;</div><div class='add'>+		break;</div><div class='add'>+	case INTR_ON_ROW:</div><div class='add'>+		config = DI_EN_X;</div><div class='add'>+		break;</div><div class='add'>+	case INTR_ON_PERI:</div><div class='add'>+		config = DI_EN_P;</div><div class='add'>+		break;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return config | (direction &lt;&lt; 1) | (mem_width &lt;&lt; 8) | (dma_mode &lt;&lt; 26) |</div><div class='add'>+		(flow_mode &lt;&lt; 12) | (syncmode &lt;&lt; 2) | (peri_width &lt;&lt; 4);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static inline unsigned DMA_MMR_SIZE_TYPE</div><div class='ctx'> set_bfin_dma_config(char direction, char flow_mode,</div><div class='del'>-		    char intr_mode, char dma_mode, char width, char syncmode)</div><div class='add'>+		    char intr_mode, char dma_mode, char mem_width, char syncmode)</div><div class='ctx'> {</div><div class='del'>-	return (direction &lt;&lt; 1) | (width &lt;&lt; 2) | (dma_mode &lt;&lt; 4) |</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	return set_bfin_dma_config2(direction, flow_mode, intr_mode, dma_mode,</div><div class='add'>+		mem_width, syncmode, mem_width);</div><div class='add'>+#else</div><div class='add'>+	return (direction &lt;&lt; 1) | (mem_width &lt;&lt; 2) | (dma_mode &lt;&lt; 4) |</div><div class='ctx'> 		(intr_mode &lt;&lt; 6) | (flow_mode &lt;&lt; 12) | (syncmode &lt;&lt; 5);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned short get_dma_curr_irqstat(unsigned int channel)</div><div class='add'>+static inline unsigned DMA_MMR_SIZE_TYPE get_dma_curr_irqstat(unsigned int channel)</div><div class='ctx'> {</div><div class='ctx'> 	return dma_ch[channel].regs-&gt;irq_status;</div><div class='ctx'> }</div><div class='del'>-static inline unsigned short get_dma_curr_xcount(unsigned int channel)</div><div class='add'>+static inline unsigned DMA_MMR_SIZE_TYPE get_dma_curr_xcount(unsigned int channel)</div><div class='ctx'> {</div><div class='ctx'> 	return dma_ch[channel].regs-&gt;curr_x_count;</div><div class='ctx'> }</div><div class='del'>-static inline unsigned short get_dma_curr_ycount(unsigned int channel)</div><div class='add'>+static inline unsigned DMA_MMR_SIZE_TYPE get_dma_curr_ycount(unsigned int channel)</div><div class='ctx'> {</div><div class='ctx'> 	return dma_ch[channel].regs-&gt;curr_y_count;</div><div class='ctx'> }</div><div class='hunk'>@@ -184,7 +281,7 @@ static inline void *get_dma_curr_desc_ptr(unsigned int channel)</div><div class='ctx'> {</div><div class='ctx'> 	return dma_ch[channel].regs-&gt;curr_desc_ptr;</div><div class='ctx'> }</div><div class='del'>-static inline unsigned short get_dma_config(unsigned int channel)</div><div class='add'>+static inline unsigned DMA_MMR_SIZE_TYPE get_dma_config(unsigned int channel)</div><div class='ctx'> {</div><div class='ctx'> 	return dma_ch[channel].regs-&gt;cfg;</div><div class='ctx'> }</div><div class='hunk'>@@ -203,8 +300,8 @@ static inline void set_dma_sg(unsigned int channel, struct dmasg *sg, int ndsize</div><div class='ctx'> </div><div class='ctx'> 	dma_ch[channel].regs-&gt;next_desc_ptr = sg;</div><div class='ctx'> 	dma_ch[channel].regs-&gt;cfg =</div><div class='del'>-		(dma_ch[channel].regs-&gt;cfg &amp; ~(0xf &lt;&lt; 8)) |</div><div class='del'>-		((ndsize &amp; 0xf) &lt;&lt; 8);</div><div class='add'>+		(dma_ch[channel].regs-&gt;cfg &amp; ~NDSIZE) |</div><div class='add'>+		((ndsize &lt;&lt; NDSIZE_OFFSET) &amp; NDSIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int dma_channel_active(unsigned int channel)</div><div class='hunk'>@@ -239,7 +336,7 @@ static inline void dma_enable_irq(unsigned int channel)</div><div class='ctx'> }</div><div class='ctx'> static inline void clear_dma_irqstat(unsigned int channel)</div><div class='ctx'> {</div><div class='del'>-	dma_ch[channel].regs-&gt;irq_status = DMA_DONE | DMA_ERR;</div><div class='add'>+	dma_ch[channel].regs-&gt;irq_status = DMA_DONE | DMA_ERR | DMA_PIRQ;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void *dma_memcpy(void *dest, const void *src, size_t count);</div><div class='head'>diff --git a/arch/blackfin/include/asm/dpmc.h b/arch/blackfin/include/asm/dpmc.h<br/>index c4ec959dad78..e91eae8330a6 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/dpmc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/dpmc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/dpmc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/dpmc.h</a></div><div class='hunk'>@@ -9,6 +9,651 @@</div><div class='ctx'> #ifndef _BLACKFIN_DPMC_H_</div><div class='ctx'> #define _BLACKFIN_DPMC_H_</div><div class='ctx'> </div><div class='add'>+#ifdef __ASSEMBLY__</div><div class='add'>+#define PM_REG0  R7</div><div class='add'>+#define PM_REG1  R6</div><div class='add'>+#define PM_REG2  R5</div><div class='add'>+#define PM_REG3  R4</div><div class='add'>+#define PM_REG4  R3</div><div class='add'>+#define PM_REG5  R2</div><div class='add'>+#define PM_REG6  R1</div><div class='add'>+#define PM_REG7  R0</div><div class='add'>+#define PM_REG8  P5</div><div class='add'>+#define PM_REG9  P4</div><div class='add'>+#define PM_REG10 P3</div><div class='add'>+#define PM_REG11 P2</div><div class='add'>+#define PM_REG12 P1</div><div class='add'>+#define PM_REG13 P0</div><div class='add'>+</div><div class='add'>+#define PM_REGSET0  R7:7</div><div class='add'>+#define PM_REGSET1  R7:6</div><div class='add'>+#define PM_REGSET2  R7:5</div><div class='add'>+#define PM_REGSET3  R7:4</div><div class='add'>+#define PM_REGSET4  R7:3</div><div class='add'>+#define PM_REGSET5  R7:2</div><div class='add'>+#define PM_REGSET6  R7:1</div><div class='add'>+#define PM_REGSET7  R7:0</div><div class='add'>+#define PM_REGSET8  R7:0, P5:5</div><div class='add'>+#define PM_REGSET9  R7:0, P5:4</div><div class='add'>+#define PM_REGSET10 R7:0, P5:3</div><div class='add'>+#define PM_REGSET11 R7:0, P5:2</div><div class='add'>+#define PM_REGSET12 R7:0, P5:1</div><div class='add'>+#define PM_REGSET13 R7:0, P5:0</div><div class='add'>+</div><div class='add'>+#define _PM_PUSH(n, x, w, base) PM_REG##n = w[FP + ((x) - (base))];</div><div class='add'>+#define _PM_POP(n, x, w, base)  w[FP + ((x) - (base))] = PM_REG##n;</div><div class='add'>+#define PM_PUSH_SYNC(n)         [--sp] = (PM_REGSET##n);</div><div class='add'>+#define PM_POP_SYNC(n)          (PM_REGSET##n) = [sp++];</div><div class='add'>+#define PM_PUSH(n, x)		PM_REG##n = [FP++];</div><div class='add'>+#define PM_POP(n, x)            [FP--] = PM_REG##n;</div><div class='add'>+#define PM_CORE_PUSH(n, x)      _PM_PUSH(n, x, , COREMMR_BASE)</div><div class='add'>+#define PM_CORE_POP(n, x)       _PM_POP(n, x, , COREMMR_BASE)</div><div class='add'>+#define PM_SYS_PUSH(n, x)       _PM_PUSH(n, x, , SYSMMR_BASE)</div><div class='add'>+#define PM_SYS_POP(n, x)        _PM_POP(n, x, , SYSMMR_BASE)</div><div class='add'>+#define PM_SYS_PUSH16(n, x)     _PM_PUSH(n, x, w, SYSMMR_BASE)</div><div class='add'>+#define PM_SYS_POP16(n, x)      _PM_POP(n, x, w, SYSMMR_BASE)</div><div class='add'>+</div><div class='add'>+	.macro bfin_init_pm_bench_cycles</div><div class='add'>+#ifdef CONFIG_BFIN_PM_WAKEUP_TIME_BENCH</div><div class='add'>+	R4 = 0;</div><div class='add'>+	CYCLES = R4;</div><div class='add'>+	CYCLES2 = R4;</div><div class='add'>+	R4 = SYSCFG;</div><div class='add'>+	BITSET(R4, 1);</div><div class='add'>+	SYSCFG = R4;</div><div class='add'>+#endif</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='add'>+	.macro bfin_cpu_reg_save</div><div class='add'>+	/*</div><div class='add'>+	 * Save the core regs early so we can blow them away when</div><div class='add'>+	 * saving/restoring MMR states</div><div class='add'>+	 */</div><div class='add'>+	[--sp] = (R7:0, P5:0);</div><div class='add'>+	[--sp] = fp;</div><div class='add'>+	[--sp] = usp;</div><div class='add'>+</div><div class='add'>+	[--sp] = i0;</div><div class='add'>+	[--sp] = i1;</div><div class='add'>+	[--sp] = i2;</div><div class='add'>+	[--sp] = i3;</div><div class='add'>+</div><div class='add'>+	[--sp] = m0;</div><div class='add'>+	[--sp] = m1;</div><div class='add'>+	[--sp] = m2;</div><div class='add'>+	[--sp] = m3;</div><div class='add'>+</div><div class='add'>+	[--sp] = l0;</div><div class='add'>+	[--sp] = l1;</div><div class='add'>+	[--sp] = l2;</div><div class='add'>+	[--sp] = l3;</div><div class='add'>+</div><div class='add'>+	[--sp] = b0;</div><div class='add'>+	[--sp] = b1;</div><div class='add'>+	[--sp] = b2;</div><div class='add'>+	[--sp] = b3;</div><div class='add'>+	[--sp] = a0.x;</div><div class='add'>+	[--sp] = a0.w;</div><div class='add'>+	[--sp] = a1.x;</div><div class='add'>+	[--sp] = a1.w;</div><div class='add'>+</div><div class='add'>+	[--sp] = LC0;</div><div class='add'>+	[--sp] = LC1;</div><div class='add'>+	[--sp] = LT0;</div><div class='add'>+	[--sp] = LT1;</div><div class='add'>+	[--sp] = LB0;</div><div class='add'>+	[--sp] = LB1;</div><div class='add'>+</div><div class='add'>+	/* We can't push RETI directly as that'll change IPEND[4] */</div><div class='add'>+	r7 = RETI;</div><div class='add'>+	[--sp] = RETS;</div><div class='add'>+	[--sp] = ASTAT;</div><div class='add'>+#ifndef CONFIG_BFIN_PM_WAKEUP_TIME_BENCH</div><div class='add'>+	[--sp] = CYCLES;</div><div class='add'>+	[--sp] = CYCLES2;</div><div class='add'>+#endif</div><div class='add'>+	[--sp] = SYSCFG;</div><div class='add'>+	[--sp] = RETX;</div><div class='add'>+	[--sp] = SEQSTAT;</div><div class='add'>+	[--sp] = r7;</div><div class='add'>+</div><div class='add'>+	/* Save first func arg in M3 */</div><div class='add'>+	M3 = R0;</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='add'>+	.macro bfin_cpu_reg_restore</div><div class='add'>+	/* Restore Core Registers */</div><div class='add'>+	RETI = [sp++];</div><div class='add'>+	SEQSTAT = [sp++];</div><div class='add'>+	RETX = [sp++];</div><div class='add'>+	SYSCFG = [sp++];</div><div class='add'>+#ifndef CONFIG_BFIN_PM_WAKEUP_TIME_BENCH</div><div class='add'>+	CYCLES2 = [sp++];</div><div class='add'>+	CYCLES = [sp++];</div><div class='add'>+#endif</div><div class='add'>+	ASTAT = [sp++];</div><div class='add'>+	RETS = [sp++];</div><div class='add'>+</div><div class='add'>+	LB1 = [sp++];</div><div class='add'>+	LB0 = [sp++];</div><div class='add'>+	LT1 = [sp++];</div><div class='add'>+	LT0 = [sp++];</div><div class='add'>+	LC1 = [sp++];</div><div class='add'>+	LC0 = [sp++];</div><div class='add'>+</div><div class='add'>+	a1.w = [sp++];</div><div class='add'>+	a1.x = [sp++];</div><div class='add'>+	a0.w = [sp++];</div><div class='add'>+	a0.x = [sp++];</div><div class='add'>+	b3 = [sp++];</div><div class='add'>+	b2 = [sp++];</div><div class='add'>+	b1 = [sp++];</div><div class='add'>+	b0 = [sp++];</div><div class='add'>+</div><div class='add'>+	l3 = [sp++];</div><div class='add'>+	l2 = [sp++];</div><div class='add'>+	l1 = [sp++];</div><div class='add'>+	l0 = [sp++];</div><div class='add'>+</div><div class='add'>+	m3 = [sp++];</div><div class='add'>+	m2 = [sp++];</div><div class='add'>+	m1 = [sp++];</div><div class='add'>+	m0 = [sp++];</div><div class='add'>+</div><div class='add'>+	i3 = [sp++];</div><div class='add'>+	i2 = [sp++];</div><div class='add'>+	i1 = [sp++];</div><div class='add'>+	i0 = [sp++];</div><div class='add'>+</div><div class='add'>+	usp = [sp++];</div><div class='add'>+	fp = [sp++];</div><div class='add'>+	(R7:0, P5:0) = [sp++];</div><div class='add'>+</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='add'>+	.macro bfin_sys_mmr_save</div><div class='add'>+	/* Save system MMRs */</div><div class='add'>+	FP.H = hi(SYSMMR_BASE);</div><div class='add'>+	FP.L = lo(SYSMMR_BASE);</div><div class='add'>+#ifdef SIC_IMASK0</div><div class='add'>+	PM_SYS_PUSH(0, SIC_IMASK0)</div><div class='add'>+	PM_SYS_PUSH(1, SIC_IMASK1)</div><div class='add'>+# ifdef SIC_IMASK2</div><div class='add'>+	PM_SYS_PUSH(2, SIC_IMASK2)</div><div class='add'>+# endif</div><div class='add'>+#else</div><div class='add'>+# ifdef SIC_IMASK</div><div class='add'>+	PM_SYS_PUSH(0, SIC_IMASK)</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef SIC_IAR0</div><div class='add'>+	PM_SYS_PUSH(3, SIC_IAR0)</div><div class='add'>+	PM_SYS_PUSH(4, SIC_IAR1)</div><div class='add'>+	PM_SYS_PUSH(5, SIC_IAR2)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IAR3</div><div class='add'>+	PM_SYS_PUSH(6, SIC_IAR3)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IAR4</div><div class='add'>+	PM_SYS_PUSH(7, SIC_IAR4)</div><div class='add'>+	PM_SYS_PUSH(8, SIC_IAR5)</div><div class='add'>+	PM_SYS_PUSH(9, SIC_IAR6)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IAR7</div><div class='add'>+	PM_SYS_PUSH(10, SIC_IAR7)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IAR8</div><div class='add'>+	PM_SYS_PUSH(11, SIC_IAR8)</div><div class='add'>+	PM_SYS_PUSH(12, SIC_IAR9)</div><div class='add'>+	PM_SYS_PUSH(13, SIC_IAR10)</div><div class='add'>+#endif</div><div class='add'>+	PM_PUSH_SYNC(13)</div><div class='add'>+#ifdef SIC_IAR11</div><div class='add'>+	PM_SYS_PUSH(0, SIC_IAR11)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef SIC_IWR</div><div class='add'>+	PM_SYS_PUSH(1, SIC_IWR)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IWR0</div><div class='add'>+	PM_SYS_PUSH(1, SIC_IWR0)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IWR1</div><div class='add'>+	PM_SYS_PUSH(2, SIC_IWR1)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IWR2</div><div class='add'>+	PM_SYS_PUSH(3, SIC_IWR2)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef PINT0_ASSIGN</div><div class='add'>+	PM_SYS_PUSH(4, PINT0_MASK_SET)</div><div class='add'>+	PM_SYS_PUSH(5, PINT1_MASK_SET)</div><div class='add'>+	PM_SYS_PUSH(6, PINT2_MASK_SET)</div><div class='add'>+	PM_SYS_PUSH(7, PINT3_MASK_SET)</div><div class='add'>+	PM_SYS_PUSH(8, PINT0_ASSIGN)</div><div class='add'>+	PM_SYS_PUSH(9, PINT1_ASSIGN)</div><div class='add'>+	PM_SYS_PUSH(10, PINT2_ASSIGN)</div><div class='add'>+	PM_SYS_PUSH(11, PINT3_ASSIGN)</div><div class='add'>+	PM_SYS_PUSH(12, PINT0_INVERT_SET)</div><div class='add'>+	PM_SYS_PUSH(13, PINT1_INVERT_SET)</div><div class='add'>+	PM_PUSH_SYNC(13)</div><div class='add'>+	PM_SYS_PUSH(0, PINT2_INVERT_SET)</div><div class='add'>+	PM_SYS_PUSH(1, PINT3_INVERT_SET)</div><div class='add'>+	PM_SYS_PUSH(2, PINT0_EDGE_SET)</div><div class='add'>+	PM_SYS_PUSH(3, PINT1_EDGE_SET)</div><div class='add'>+	PM_SYS_PUSH(4, PINT2_EDGE_SET)</div><div class='add'>+	PM_SYS_PUSH(5, PINT3_EDGE_SET)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef SYSCR</div><div class='add'>+	PM_SYS_PUSH16(6, SYSCR)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef EBIU_AMGCTL</div><div class='add'>+	PM_SYS_PUSH16(7, EBIU_AMGCTL)</div><div class='add'>+	PM_SYS_PUSH(8, EBIU_AMBCTL0)</div><div class='add'>+	PM_SYS_PUSH(9, EBIU_AMBCTL1)</div><div class='add'>+#endif</div><div class='add'>+#ifdef EBIU_FCTL</div><div class='add'>+	PM_SYS_PUSH(10, EBIU_MBSCTL)</div><div class='add'>+	PM_SYS_PUSH(11, EBIU_MODE)</div><div class='add'>+	PM_SYS_PUSH(12, EBIU_FCTL)</div><div class='add'>+	PM_PUSH_SYNC(12)</div><div class='add'>+#else</div><div class='add'>+	PM_PUSH_SYNC(9)</div><div class='add'>+#endif</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	.macro bfin_sys_mmr_restore</div><div class='add'>+/* Restore System MMRs */</div><div class='add'>+	FP.H = hi(SYSMMR_BASE);</div><div class='add'>+	FP.L = lo(SYSMMR_BASE);</div><div class='add'>+</div><div class='add'>+#ifdef EBIU_FCTL</div><div class='add'>+	PM_POP_SYNC(12)</div><div class='add'>+	PM_SYS_POP(12, EBIU_FCTL)</div><div class='add'>+	PM_SYS_POP(11, EBIU_MODE)</div><div class='add'>+	PM_SYS_POP(10, EBIU_MBSCTL)</div><div class='add'>+#else</div><div class='add'>+	PM_POP_SYNC(9)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef EBIU_AMBCTL</div><div class='add'>+	PM_SYS_POP(9, EBIU_AMBCTL1)</div><div class='add'>+	PM_SYS_POP(8, EBIU_AMBCTL0)</div><div class='add'>+	PM_SYS_POP16(7, EBIU_AMGCTL)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef SYSCR</div><div class='add'>+	PM_SYS_POP16(6, SYSCR)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef PINT0_ASSIGN</div><div class='add'>+	PM_SYS_POP(5, PINT3_EDGE_SET)</div><div class='add'>+	PM_SYS_POP(4, PINT2_EDGE_SET)</div><div class='add'>+	PM_SYS_POP(3, PINT1_EDGE_SET)</div><div class='add'>+	PM_SYS_POP(2, PINT0_EDGE_SET)</div><div class='add'>+	PM_SYS_POP(1, PINT3_INVERT_SET)</div><div class='add'>+	PM_SYS_POP(0, PINT2_INVERT_SET)</div><div class='add'>+	PM_POP_SYNC(13)</div><div class='add'>+	PM_SYS_POP(13, PINT1_INVERT_SET)</div><div class='add'>+	PM_SYS_POP(12, PINT0_INVERT_SET)</div><div class='add'>+	PM_SYS_POP(11, PINT3_ASSIGN)</div><div class='add'>+	PM_SYS_POP(10, PINT2_ASSIGN)</div><div class='add'>+	PM_SYS_POP(9, PINT1_ASSIGN)</div><div class='add'>+	PM_SYS_POP(8, PINT0_ASSIGN)</div><div class='add'>+	PM_SYS_POP(7, PINT3_MASK_SET)</div><div class='add'>+	PM_SYS_POP(6, PINT2_MASK_SET)</div><div class='add'>+	PM_SYS_POP(5, PINT1_MASK_SET)</div><div class='add'>+	PM_SYS_POP(4, PINT0_MASK_SET)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef SIC_IWR2</div><div class='add'>+	PM_SYS_POP(3, SIC_IWR2)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IWR1</div><div class='add'>+	PM_SYS_POP(2, SIC_IWR1)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IWR0</div><div class='add'>+	PM_SYS_POP(1, SIC_IWR0)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IWR</div><div class='add'>+	PM_SYS_POP(1, SIC_IWR)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef SIC_IAR11</div><div class='add'>+	PM_SYS_POP(0, SIC_IAR11)</div><div class='add'>+#endif</div><div class='add'>+	PM_POP_SYNC(13)</div><div class='add'>+#ifdef SIC_IAR8</div><div class='add'>+	PM_SYS_POP(13, SIC_IAR10)</div><div class='add'>+	PM_SYS_POP(12, SIC_IAR9)</div><div class='add'>+	PM_SYS_POP(11, SIC_IAR8)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IAR7</div><div class='add'>+	PM_SYS_POP(10, SIC_IAR7)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IAR6</div><div class='add'>+	PM_SYS_POP(9, SIC_IAR6)</div><div class='add'>+	PM_SYS_POP(8, SIC_IAR5)</div><div class='add'>+	PM_SYS_POP(7, SIC_IAR4)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IAR3</div><div class='add'>+	PM_SYS_POP(6, SIC_IAR3)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IAR0</div><div class='add'>+	PM_SYS_POP(5, SIC_IAR2)</div><div class='add'>+	PM_SYS_POP(4, SIC_IAR1)</div><div class='add'>+	PM_SYS_POP(3, SIC_IAR0)</div><div class='add'>+#endif</div><div class='add'>+#ifdef SIC_IMASK0</div><div class='add'>+# ifdef SIC_IMASK2</div><div class='add'>+	PM_SYS_POP(2, SIC_IMASK2)</div><div class='add'>+# endif</div><div class='add'>+	PM_SYS_POP(1, SIC_IMASK1)</div><div class='add'>+	PM_SYS_POP(0, SIC_IMASK0)</div><div class='add'>+#else</div><div class='add'>+# ifdef SIC_IMASK</div><div class='add'>+	PM_SYS_POP(0, SIC_IMASK)</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='add'>+	.macro bfin_core_mmr_save</div><div class='add'>+	/* Save Core MMRs */</div><div class='add'>+	I0.H = hi(COREMMR_BASE);</div><div class='add'>+	I0.L = lo(COREMMR_BASE);</div><div class='add'>+	I1 = I0;</div><div class='add'>+	I2 = I0;</div><div class='add'>+	I3 = I0;</div><div class='add'>+	B0 = I0;</div><div class='add'>+	B1 = I0;</div><div class='add'>+	B2 = I0;</div><div class='add'>+	B3 = I0;</div><div class='add'>+	I1.L = lo(DCPLB_ADDR0);</div><div class='add'>+	I2.L = lo(DCPLB_DATA0);</div><div class='add'>+	I3.L = lo(ICPLB_ADDR0);</div><div class='add'>+	B0.L = lo(ICPLB_DATA0);</div><div class='add'>+	B1.L = lo(EVT2);</div><div class='add'>+	B2.L = lo(IMASK);</div><div class='add'>+	B3.L = lo(TCNTL);</div><div class='add'>+</div><div class='add'>+	/* Event Vectors */</div><div class='add'>+	FP = B1;</div><div class='add'>+	PM_PUSH(0, EVT2)</div><div class='add'>+	PM_PUSH(1, EVT3)</div><div class='add'>+	FP += 4;	/* EVT4 */</div><div class='add'>+	PM_PUSH(2, EVT5)</div><div class='add'>+	PM_PUSH(3, EVT6)</div><div class='add'>+	PM_PUSH(4, EVT7)</div><div class='add'>+	PM_PUSH(5, EVT8)</div><div class='add'>+	PM_PUSH_SYNC(5)</div><div class='add'>+</div><div class='add'>+	PM_PUSH(0, EVT9)</div><div class='add'>+	PM_PUSH(1, EVT10)</div><div class='add'>+	PM_PUSH(2, EVT11)</div><div class='add'>+	PM_PUSH(3, EVT12)</div><div class='add'>+	PM_PUSH(4, EVT13)</div><div class='add'>+	PM_PUSH(5, EVT14)</div><div class='add'>+	PM_PUSH(6, EVT15)</div><div class='add'>+</div><div class='add'>+	/* CEC */</div><div class='add'>+	FP = B2;</div><div class='add'>+	PM_PUSH(7, IMASK)</div><div class='add'>+	FP += 4;	/* IPEND */</div><div class='add'>+	PM_PUSH(8, ILAT)</div><div class='add'>+	PM_PUSH(9, IPRIO)</div><div class='add'>+</div><div class='add'>+	/* Core Timer */</div><div class='add'>+	FP = B3;</div><div class='add'>+	PM_PUSH(10, TCNTL)</div><div class='add'>+	PM_PUSH(11, TPERIOD)</div><div class='add'>+	PM_PUSH(12, TSCALE)</div><div class='add'>+	PM_PUSH(13, TCOUNT)</div><div class='add'>+	PM_PUSH_SYNC(13)</div><div class='add'>+</div><div class='add'>+	/* Misc non-contiguous registers */</div><div class='add'>+	FP = I0;</div><div class='add'>+	PM_CORE_PUSH(0, DMEM_CONTROL);</div><div class='add'>+	PM_CORE_PUSH(1, IMEM_CONTROL);</div><div class='add'>+	PM_CORE_PUSH(2, TBUFCTL);</div><div class='add'>+	PM_PUSH_SYNC(2)</div><div class='add'>+</div><div class='add'>+	/* DCPLB Addr */</div><div class='add'>+	FP = I1;</div><div class='add'>+	PM_PUSH(0, DCPLB_ADDR0)</div><div class='add'>+	PM_PUSH(1, DCPLB_ADDR1)</div><div class='add'>+	PM_PUSH(2, DCPLB_ADDR2)</div><div class='add'>+	PM_PUSH(3, DCPLB_ADDR3)</div><div class='add'>+	PM_PUSH(4, DCPLB_ADDR4)</div><div class='add'>+	PM_PUSH(5, DCPLB_ADDR5)</div><div class='add'>+	PM_PUSH(6, DCPLB_ADDR6)</div><div class='add'>+	PM_PUSH(7, DCPLB_ADDR7)</div><div class='add'>+	PM_PUSH(8, DCPLB_ADDR8)</div><div class='add'>+	PM_PUSH(9, DCPLB_ADDR9)</div><div class='add'>+	PM_PUSH(10, DCPLB_ADDR10)</div><div class='add'>+	PM_PUSH(11, DCPLB_ADDR11)</div><div class='add'>+	PM_PUSH(12, DCPLB_ADDR12)</div><div class='add'>+	PM_PUSH(13, DCPLB_ADDR13)</div><div class='add'>+	PM_PUSH_SYNC(13)</div><div class='add'>+	PM_PUSH(0, DCPLB_ADDR14)</div><div class='add'>+	PM_PUSH(1, DCPLB_ADDR15)</div><div class='add'>+</div><div class='add'>+	/* DCPLB Data */</div><div class='add'>+	FP = I2;</div><div class='add'>+	PM_PUSH(2, DCPLB_DATA0)</div><div class='add'>+	PM_PUSH(3, DCPLB_DATA1)</div><div class='add'>+	PM_PUSH(4, DCPLB_DATA2)</div><div class='add'>+	PM_PUSH(5, DCPLB_DATA3)</div><div class='add'>+	PM_PUSH(6, DCPLB_DATA4)</div><div class='add'>+	PM_PUSH(7, DCPLB_DATA5)</div><div class='add'>+	PM_PUSH(8, DCPLB_DATA6)</div><div class='add'>+	PM_PUSH(9, DCPLB_DATA7)</div><div class='add'>+	PM_PUSH(10, DCPLB_DATA8)</div><div class='add'>+	PM_PUSH(11, DCPLB_DATA9)</div><div class='add'>+	PM_PUSH(12, DCPLB_DATA10)</div><div class='add'>+	PM_PUSH(13, DCPLB_DATA11)</div><div class='add'>+	PM_PUSH_SYNC(13)</div><div class='add'>+	PM_PUSH(0, DCPLB_DATA12)</div><div class='add'>+	PM_PUSH(1, DCPLB_DATA13)</div><div class='add'>+	PM_PUSH(2, DCPLB_DATA14)</div><div class='add'>+	PM_PUSH(3, DCPLB_DATA15)</div><div class='add'>+</div><div class='add'>+	/* ICPLB Addr */</div><div class='add'>+	FP = I3;</div><div class='add'>+	PM_PUSH(4, ICPLB_ADDR0)</div><div class='add'>+	PM_PUSH(5, ICPLB_ADDR1)</div><div class='add'>+	PM_PUSH(6, ICPLB_ADDR2)</div><div class='add'>+	PM_PUSH(7, ICPLB_ADDR3)</div><div class='add'>+	PM_PUSH(8, ICPLB_ADDR4)</div><div class='add'>+	PM_PUSH(9, ICPLB_ADDR5)</div><div class='add'>+	PM_PUSH(10, ICPLB_ADDR6)</div><div class='add'>+	PM_PUSH(11, ICPLB_ADDR7)</div><div class='add'>+	PM_PUSH(12, ICPLB_ADDR8)</div><div class='add'>+	PM_PUSH(13, ICPLB_ADDR9)</div><div class='add'>+	PM_PUSH_SYNC(13)</div><div class='add'>+	PM_PUSH(0, ICPLB_ADDR10)</div><div class='add'>+	PM_PUSH(1, ICPLB_ADDR11)</div><div class='add'>+	PM_PUSH(2, ICPLB_ADDR12)</div><div class='add'>+	PM_PUSH(3, ICPLB_ADDR13)</div><div class='add'>+	PM_PUSH(4, ICPLB_ADDR14)</div><div class='add'>+	PM_PUSH(5, ICPLB_ADDR15)</div><div class='add'>+</div><div class='add'>+	/* ICPLB Data */</div><div class='add'>+	FP = B0;</div><div class='add'>+	PM_PUSH(6, ICPLB_DATA0)</div><div class='add'>+	PM_PUSH(7, ICPLB_DATA1)</div><div class='add'>+	PM_PUSH(8, ICPLB_DATA2)</div><div class='add'>+	PM_PUSH(9, ICPLB_DATA3)</div><div class='add'>+	PM_PUSH(10, ICPLB_DATA4)</div><div class='add'>+	PM_PUSH(11, ICPLB_DATA5)</div><div class='add'>+	PM_PUSH(12, ICPLB_DATA6)</div><div class='add'>+	PM_PUSH(13, ICPLB_DATA7)</div><div class='add'>+	PM_PUSH_SYNC(13)</div><div class='add'>+	PM_PUSH(0, ICPLB_DATA8)</div><div class='add'>+	PM_PUSH(1, ICPLB_DATA9)</div><div class='add'>+	PM_PUSH(2, ICPLB_DATA10)</div><div class='add'>+	PM_PUSH(3, ICPLB_DATA11)</div><div class='add'>+	PM_PUSH(4, ICPLB_DATA12)</div><div class='add'>+	PM_PUSH(5, ICPLB_DATA13)</div><div class='add'>+	PM_PUSH(6, ICPLB_DATA14)</div><div class='add'>+	PM_PUSH(7, ICPLB_DATA15)</div><div class='add'>+	PM_PUSH_SYNC(7)</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='add'>+	.macro bfin_core_mmr_restore</div><div class='add'>+	/* Restore Core MMRs */</div><div class='add'>+	I0.H = hi(COREMMR_BASE);</div><div class='add'>+	I0.L = lo(COREMMR_BASE);</div><div class='add'>+	I1 = I0;</div><div class='add'>+	I2 = I0;</div><div class='add'>+	I3 = I0;</div><div class='add'>+	B0 = I0;</div><div class='add'>+	B1 = I0;</div><div class='add'>+	B2 = I0;</div><div class='add'>+	B3 = I0;</div><div class='add'>+	I1.L = lo(DCPLB_ADDR15);</div><div class='add'>+	I2.L = lo(DCPLB_DATA15);</div><div class='add'>+	I3.L = lo(ICPLB_ADDR15);</div><div class='add'>+	B0.L = lo(ICPLB_DATA15);</div><div class='add'>+	B1.L = lo(EVT15);</div><div class='add'>+	B2.L = lo(IPRIO);</div><div class='add'>+	B3.L = lo(TCOUNT);</div><div class='add'>+</div><div class='add'>+	/* ICPLB Data */</div><div class='add'>+	FP = B0;</div><div class='add'>+	PM_POP_SYNC(7)</div><div class='add'>+	PM_POP(7, ICPLB_DATA15)</div><div class='add'>+	PM_POP(6, ICPLB_DATA14)</div><div class='add'>+	PM_POP(5, ICPLB_DATA13)</div><div class='add'>+	PM_POP(4, ICPLB_DATA12)</div><div class='add'>+	PM_POP(3, ICPLB_DATA11)</div><div class='add'>+	PM_POP(2, ICPLB_DATA10)</div><div class='add'>+	PM_POP(1, ICPLB_DATA9)</div><div class='add'>+	PM_POP(0, ICPLB_DATA8)</div><div class='add'>+	PM_POP_SYNC(13)</div><div class='add'>+	PM_POP(13, ICPLB_DATA7)</div><div class='add'>+	PM_POP(12, ICPLB_DATA6)</div><div class='add'>+	PM_POP(11, ICPLB_DATA5)</div><div class='add'>+	PM_POP(10, ICPLB_DATA4)</div><div class='add'>+	PM_POP(9, ICPLB_DATA3)</div><div class='add'>+	PM_POP(8, ICPLB_DATA2)</div><div class='add'>+	PM_POP(7, ICPLB_DATA1)</div><div class='add'>+	PM_POP(6, ICPLB_DATA0)</div><div class='add'>+</div><div class='add'>+	/* ICPLB Addr */</div><div class='add'>+	FP = I3;</div><div class='add'>+	PM_POP(5, ICPLB_ADDR15)</div><div class='add'>+	PM_POP(4, ICPLB_ADDR14)</div><div class='add'>+	PM_POP(3, ICPLB_ADDR13)</div><div class='add'>+	PM_POP(2, ICPLB_ADDR12)</div><div class='add'>+	PM_POP(1, ICPLB_ADDR11)</div><div class='add'>+	PM_POP(0, ICPLB_ADDR10)</div><div class='add'>+	PM_POP_SYNC(13)</div><div class='add'>+	PM_POP(13, ICPLB_ADDR9)</div><div class='add'>+	PM_POP(12, ICPLB_ADDR8)</div><div class='add'>+	PM_POP(11, ICPLB_ADDR7)</div><div class='add'>+	PM_POP(10, ICPLB_ADDR6)</div><div class='add'>+	PM_POP(9, ICPLB_ADDR5)</div><div class='add'>+	PM_POP(8, ICPLB_ADDR4)</div><div class='add'>+	PM_POP(7, ICPLB_ADDR3)</div><div class='add'>+	PM_POP(6, ICPLB_ADDR2)</div><div class='add'>+	PM_POP(5, ICPLB_ADDR1)</div><div class='add'>+	PM_POP(4, ICPLB_ADDR0)</div><div class='add'>+</div><div class='add'>+	/* DCPLB Data */</div><div class='add'>+	FP = I2;</div><div class='add'>+	PM_POP(3, DCPLB_DATA15)</div><div class='add'>+	PM_POP(2, DCPLB_DATA14)</div><div class='add'>+	PM_POP(1, DCPLB_DATA13)</div><div class='add'>+	PM_POP(0, DCPLB_DATA12)</div><div class='add'>+	PM_POP_SYNC(13)</div><div class='add'>+	PM_POP(13, DCPLB_DATA11)</div><div class='add'>+	PM_POP(12, DCPLB_DATA10)</div><div class='add'>+	PM_POP(11, DCPLB_DATA9)</div><div class='add'>+	PM_POP(10, DCPLB_DATA8)</div><div class='add'>+	PM_POP(9, DCPLB_DATA7)</div><div class='add'>+	PM_POP(8, DCPLB_DATA6)</div><div class='add'>+	PM_POP(7, DCPLB_DATA5)</div><div class='add'>+	PM_POP(6, DCPLB_DATA4)</div><div class='add'>+	PM_POP(5, DCPLB_DATA3)</div><div class='add'>+	PM_POP(4, DCPLB_DATA2)</div><div class='add'>+	PM_POP(3, DCPLB_DATA1)</div><div class='add'>+	PM_POP(2, DCPLB_DATA0)</div><div class='add'>+</div><div class='add'>+	/* DCPLB Addr */</div><div class='add'>+	FP = I1;</div><div class='add'>+	PM_POP(1, DCPLB_ADDR15)</div><div class='add'>+	PM_POP(0, DCPLB_ADDR14)</div><div class='add'>+	PM_POP_SYNC(13)</div><div class='add'>+	PM_POP(13, DCPLB_ADDR13)</div><div class='add'>+	PM_POP(12, DCPLB_ADDR12)</div><div class='add'>+	PM_POP(11, DCPLB_ADDR11)</div><div class='add'>+	PM_POP(10, DCPLB_ADDR10)</div><div class='add'>+	PM_POP(9, DCPLB_ADDR9)</div><div class='add'>+	PM_POP(8, DCPLB_ADDR8)</div><div class='add'>+	PM_POP(7, DCPLB_ADDR7)</div><div class='add'>+	PM_POP(6, DCPLB_ADDR6)</div><div class='add'>+	PM_POP(5, DCPLB_ADDR5)</div><div class='add'>+	PM_POP(4, DCPLB_ADDR4)</div><div class='add'>+	PM_POP(3, DCPLB_ADDR3)</div><div class='add'>+	PM_POP(2, DCPLB_ADDR2)</div><div class='add'>+	PM_POP(1, DCPLB_ADDR1)</div><div class='add'>+	PM_POP(0, DCPLB_ADDR0)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	/* Misc non-contiguous registers */</div><div class='add'>+</div><div class='add'>+	/* icache &amp; dcache will enable later </div><div class='add'>+	   drop IMEM_CONTROL, DMEM_CONTROL pop</div><div class='add'>+	*/</div><div class='add'>+	FP = I0;</div><div class='add'>+	PM_POP_SYNC(2)</div><div class='add'>+	PM_CORE_POP(2, TBUFCTL)</div><div class='add'>+	PM_CORE_POP(1, IMEM_CONTROL)</div><div class='add'>+	PM_CORE_POP(0, DMEM_CONTROL)</div><div class='add'>+</div><div class='add'>+	/* Core Timer */</div><div class='add'>+	FP = B3;</div><div class='add'>+	R0 = 0x1;</div><div class='add'>+	[FP - 0xC] = R0;</div><div class='add'>+</div><div class='add'>+	PM_POP_SYNC(13)</div><div class='add'>+	FP = B3;</div><div class='add'>+	PM_POP(13, TCOUNT)</div><div class='add'>+	PM_POP(12, TSCALE)</div><div class='add'>+	PM_POP(11, TPERIOD)</div><div class='add'>+	PM_POP(10, TCNTL)</div><div class='add'>+</div><div class='add'>+	/* CEC */</div><div class='add'>+	FP = B2;</div><div class='add'>+	PM_POP(9, IPRIO)</div><div class='add'>+	PM_POP(8, ILAT)</div><div class='add'>+	FP += -4;	/* IPEND */</div><div class='add'>+	PM_POP(7, IMASK)</div><div class='add'>+</div><div class='add'>+	/* Event Vectors */</div><div class='add'>+	FP = B1;</div><div class='add'>+	PM_POP(6, EVT15)</div><div class='add'>+	PM_POP(5, EVT14)</div><div class='add'>+	PM_POP(4, EVT13)</div><div class='add'>+	PM_POP(3, EVT12)</div><div class='add'>+	PM_POP(2, EVT11)</div><div class='add'>+	PM_POP(1, EVT10)</div><div class='add'>+	PM_POP(0, EVT9)</div><div class='add'>+	PM_POP_SYNC(5)</div><div class='add'>+	PM_POP(5, EVT8)</div><div class='add'>+	PM_POP(4, EVT7)</div><div class='add'>+	PM_POP(3, EVT6)</div><div class='add'>+	PM_POP(2, EVT5)</div><div class='add'>+	FP += -4;	/* EVT4 */</div><div class='add'>+	PM_POP(1, EVT3)</div><div class='add'>+	PM_POP(0, EVT2)</div><div class='add'>+	.endm</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #include &lt;mach/pll.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* PLL_CTL Masks */</div><div class='hunk'>@@ -98,6 +743,16 @@</div><div class='ctx'> #define VLEV_130		0x00F0	/* VLEV = 1.30 V (-5% - +10% Accuracy) */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+#define PA15WE			0x00000001 /* Allow Wake-Up from PA15 */</div><div class='add'>+#define PB15WE			0x00000002 /* Allow Wake-Up from PB15 */</div><div class='add'>+#define PC15WE			0x00000004 /* Allow Wake-Up from PC15 */</div><div class='add'>+#define PD06WE			0x00000008 /* Allow Wake-Up from PD06(ETH0_PHYINT) */</div><div class='add'>+#define PE12WE			0x00000010 /* Allow Wake-Up from PE12(ETH1_PHYINT, PUSH BUTTON) */</div><div class='add'>+#define PG04WE			0x00000020 /* Allow Wake-Up from PG04(CAN0_RX) */</div><div class='add'>+#define PG13WE			0x00000040 /* Allow Wake-Up from PG13 */</div><div class='add'>+#define USBWE			0x00000080 /* Allow Wake-Up from (USB) */</div><div class='add'>+#else</div><div class='ctx'> #define WAKE			0x0100	/* Enable RTC/Reset Wakeup From Hibernate */</div><div class='ctx'> #define CANWE			0x0200	/* Enable CAN Wakeup From Hibernate */</div><div class='ctx'> #define PHYWE			0x0400	/* Enable PHY Wakeup From Hibernate */</div><div class='hunk'>@@ -113,6 +768,7 @@</div><div class='ctx'> #else</div><div class='ctx'> #define USBWE			0x0800	/* Enable USB Wakeup From Hibernate */</div><div class='ctx'> #endif</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/include/asm/fixed_code.h b/arch/blackfin/include/asm/fixed_code.h<br/>index 73fe53e7fd24..5395088b2d0e 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/fixed_code.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/fixed_code.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/fixed_code.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/fixed_code.h</a></div><div class='hunk'>@@ -29,24 +29,28 @@ extern void sigreturn_stub(void);</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define FIXED_CODE_START	0x400</div><div class='add'>+#ifndef CONFIG_PHY_RAM_BASE_ADDRESS</div><div class='add'>+#define CONFIG_PHY_RAM_BASE_ADDRESS	0x0</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define FIXED_CODE_START	(CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)</div><div class='ctx'> </div><div class='del'>-#define SIGRETURN_STUB		0x400</div><div class='add'>+#define SIGRETURN_STUB		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)</div><div class='ctx'> </div><div class='del'>-#define ATOMIC_SEQS_START	0x410</div><div class='add'>+#define ATOMIC_SEQS_START	(CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)</div><div class='ctx'> </div><div class='del'>-#define ATOMIC_XCHG32		0x410</div><div class='del'>-#define ATOMIC_CAS32		0x420</div><div class='del'>-#define ATOMIC_ADD32		0x430</div><div class='del'>-#define ATOMIC_SUB32		0x440</div><div class='del'>-#define ATOMIC_IOR32		0x450</div><div class='del'>-#define ATOMIC_AND32		0x460</div><div class='del'>-#define ATOMIC_XOR32		0x470</div><div class='add'>+#define ATOMIC_XCHG32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)</div><div class='add'>+#define ATOMIC_CAS32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x420)</div><div class='add'>+#define ATOMIC_ADD32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x430)</div><div class='add'>+#define ATOMIC_SUB32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x440)</div><div class='add'>+#define ATOMIC_IOR32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x450)</div><div class='add'>+#define ATOMIC_AND32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x460)</div><div class='add'>+#define ATOMIC_XOR32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x470)</div><div class='ctx'> </div><div class='del'>-#define ATOMIC_SEQS_END		0x480</div><div class='add'>+#define ATOMIC_SEQS_END		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)</div><div class='ctx'> </div><div class='del'>-#define SAFE_USER_INSTRUCTION   0x480</div><div class='add'>+#define SAFE_USER_INSTRUCTION   (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)</div><div class='ctx'> </div><div class='del'>-#define FIXED_CODE_END		0x490</div><div class='add'>+#define FIXED_CODE_END		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x490)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h<br/>index 12d3571b5232..3d84d96f7c2c 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/gpio.h</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> /***********************************************************</div><div class='ctx'> *</div><div class='hunk'>@@ -244,6 +245,49 @@ static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = bfin_gpio_request(gpio, label);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; GPIOF_DIR_IN)</div><div class='add'>+		err = bfin_gpio_direction_input(gpio);</div><div class='add'>+	else</div><div class='add'>+		err = bfin_gpio_direction_output(gpio,</div><div class='add'>+			(flags &amp; GPIOF_INIT_HIGH) ? 1 : 0);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		bfin_gpio_free(gpio);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int gpio_request_array(const struct gpio *array, size_t num)</div><div class='add'>+{</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num; i++, array++) {</div><div class='add'>+		err = gpio_request_one(array-&gt;gpio, array-&gt;flags, array-&gt;label);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_free;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free:</div><div class='add'>+	while (i--)</div><div class='add'>+		bfin_gpio_free((--array)-&gt;gpio);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void gpio_free_array(const struct gpio *array, size_t num)</div><div class='add'>+{</div><div class='add'>+	while (num--)</div><div class='add'>+		bfin_gpio_free((array++)-&gt;gpio);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int __gpio_get_value(unsigned gpio)</div><div class='ctx'> {</div><div class='ctx'> 	return bfin_gpio_get_value(gpio);</div><div class='head'>diff --git a/arch/blackfin/include/asm/gptimers.h b/arch/blackfin/include/asm/gptimers.h<br/>index 38bddcb190c8..381e3d621a4c 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/gptimers.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/gptimers.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/gptimers.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/gptimers.h</a></div><div class='hunk'>@@ -44,6 +44,13 @@</div><div class='ctx'> # define TIMER_GROUP2          1</div><div class='ctx'> #endif</div><div class='ctx'> /*</div><div class='add'>+ * BF609: 8 timers:</div><div class='add'>+ */</div><div class='add'>+#if defined(CONFIG_BF60x)</div><div class='add'>+# define MAX_BLACKFIN_GPTIMERS 8</div><div class='add'>+# define TIMER0_GROUP_REG     TIMER_RUN</div><div class='add'>+#endif</div><div class='add'>+/*</div><div class='ctx'>  * All others: 3 timers:</div><div class='ctx'>  */</div><div class='ctx'> #define TIMER_GROUP1           0</div><div class='hunk'>@@ -104,6 +111,72 @@</div><div class='ctx'> # define FS2_TIMER_BIT TIMER1bit</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+/*</div><div class='add'>+ * Timer Configuration Register Bits</div><div class='add'>+ */</div><div class='add'>+#define TIMER_EMU_RUN       0x8000</div><div class='add'>+#define TIMER_BPER_EN       0x4000</div><div class='add'>+#define TIMER_BWID_EN       0x2000</div><div class='add'>+#define TIMER_BDLY_EN       0x1000</div><div class='add'>+#define TIMER_OUT_DIS       0x0800</div><div class='add'>+#define TIMER_TIN_SEL       0x0400</div><div class='add'>+#define TIMER_CLK_SEL       0x0300</div><div class='add'>+#define TIMER_CLK_SCLK      0x0000</div><div class='add'>+#define TIMER_CLK_ALT_CLK0  0x0100</div><div class='add'>+#define TIMER_CLK_ALT_CLK1  0x0300</div><div class='add'>+#define TIMER_PULSE_HI 	    0x0080</div><div class='add'>+#define TIMER_SLAVE_TRIG    0x0040</div><div class='add'>+#define TIMER_IRQ_MODE      0x0030</div><div class='add'>+#define TIMER_IRQ_ACT_EDGE  0x0000</div><div class='add'>+#define TIMER_IRQ_DLY       0x0010</div><div class='add'>+#define TIMER_IRQ_WID_DLY   0x0020</div><div class='add'>+#define TIMER_IRQ_PER       0x0030</div><div class='add'>+#define TIMER_MODE          0x000f</div><div class='add'>+#define TIMER_MODE_WDOG_P   0x0008</div><div class='add'>+#define TIMER_MODE_WDOG_W   0x0009</div><div class='add'>+#define TIMER_MODE_PWM_CONT 0x000c</div><div class='add'>+#define TIMER_MODE_PWM      0x000d</div><div class='add'>+#define TIMER_MODE_WDTH     0x000a</div><div class='add'>+#define TIMER_MODE_WDTH_D   0x000b</div><div class='add'>+#define TIMER_MODE_EXT_CLK  0x000e</div><div class='add'>+#define TIMER_MODE_PININT   0x000f</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Timer Status Register Bits</div><div class='add'>+ */</div><div class='add'>+#define TIMER_STATUS_TIMIL0  0x0001</div><div class='add'>+#define TIMER_STATUS_TIMIL1  0x0002</div><div class='add'>+#define TIMER_STATUS_TIMIL2  0x0004</div><div class='add'>+#define TIMER_STATUS_TIMIL3  0x0008</div><div class='add'>+#define TIMER_STATUS_TIMIL4  0x0010</div><div class='add'>+#define TIMER_STATUS_TIMIL5  0x0020</div><div class='add'>+#define TIMER_STATUS_TIMIL6  0x0040</div><div class='add'>+#define TIMER_STATUS_TIMIL7  0x0080</div><div class='add'>+</div><div class='add'>+#define TIMER_STATUS_TOVF0   0x0001	/* timer 0 overflow error */</div><div class='add'>+#define TIMER_STATUS_TOVF1   0x0002</div><div class='add'>+#define TIMER_STATUS_TOVF2   0x0004</div><div class='add'>+#define TIMER_STATUS_TOVF3   0x0008</div><div class='add'>+#define TIMER_STATUS_TOVF4   0x0010</div><div class='add'>+#define TIMER_STATUS_TOVF5   0x0020</div><div class='add'>+#define TIMER_STATUS_TOVF6   0x0040</div><div class='add'>+#define TIMER_STATUS_TOVF7   0x0080</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Timer Slave Enable Status : write 1 to clear</div><div class='add'>+ */</div><div class='add'>+#define TIMER_STATUS_TRUN0  0x0001</div><div class='add'>+#define TIMER_STATUS_TRUN1  0x0002</div><div class='add'>+#define TIMER_STATUS_TRUN2  0x0004</div><div class='add'>+#define TIMER_STATUS_TRUN3  0x0008</div><div class='add'>+#define TIMER_STATUS_TRUN4  0x0010</div><div class='add'>+#define TIMER_STATUS_TRUN5  0x0020</div><div class='add'>+#define TIMER_STATUS_TRUN6  0x0040</div><div class='add'>+#define TIMER_STATUS_TRUN7  0x0080</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Timer Configuration Register Bits</div><div class='ctx'>  */</div><div class='hunk'>@@ -170,12 +243,18 @@</div><div class='ctx'> #define TIMER_STATUS_TRUN10 0x4000</div><div class='ctx'> #define TIMER_STATUS_TRUN11 0x8000</div><div class='ctx'> </div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* The actual gptimer API */</div><div class='ctx'> </div><div class='ctx'> void     set_gptimer_pwidth(unsigned int timer_id, uint32_t width);</div><div class='ctx'> uint32_t get_gptimer_pwidth(unsigned int timer_id);</div><div class='ctx'> void     set_gptimer_period(unsigned int timer_id, uint32_t period);</div><div class='ctx'> uint32_t get_gptimer_period(unsigned int timer_id);</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+void     set_gptimer_delay(unsigned int timer_id, uint32_t delay);</div><div class='add'>+uint32_t get_gptimer_delay(unsigned int timer_id);</div><div class='add'>+#endif</div><div class='ctx'> uint32_t get_gptimer_count(unsigned int timer_id);</div><div class='ctx'> int      get_gptimer_intr(unsigned int timer_id);</div><div class='ctx'> void     clear_gptimer_intr(unsigned int timer_id);</div><div class='hunk'>@@ -217,16 +296,41 @@ struct bfin_gptimer_regs {</div><div class='ctx'> 	u32 counter;</div><div class='ctx'> 	u32 period;</div><div class='ctx'> 	u32 width;</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	u32 delay;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * bfin group timer registers layout</div><div class='ctx'>  */</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> struct bfin_gptimer_group_regs {</div><div class='ctx'> 	__BFP(enable);</div><div class='ctx'> 	__BFP(disable);</div><div class='ctx'> 	u32 status;</div><div class='ctx'> };</div><div class='add'>+#else</div><div class='add'>+struct bfin_gptimer_group_regs {</div><div class='add'>+	__BFP(run);</div><div class='add'>+	__BFP(enable);</div><div class='add'>+	__BFP(disable);</div><div class='add'>+	__BFP(stop_cfg);</div><div class='add'>+	__BFP(stop_cfg_set);</div><div class='add'>+	__BFP(stop_cfg_clr);</div><div class='add'>+	__BFP(data_imsk);</div><div class='add'>+	__BFP(stat_imsk);</div><div class='add'>+	__BFP(tr_msk);</div><div class='add'>+	__BFP(tr_ie);</div><div class='add'>+	__BFP(data_ilat);</div><div class='add'>+	__BFP(stat_ilat);</div><div class='add'>+	__BFP(err_status);</div><div class='add'>+	__BFP(bcast_per);</div><div class='add'>+	__BFP(bcast_wid);</div><div class='add'>+	__BFP(bcast_dly);</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #undef __BFP</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/include/asm/irqflags.h b/arch/blackfin/include/asm/irqflags.h<br/>index 43eb4749de3d..07aff230a812 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/irqflags.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/irqflags.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/irqflags.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/irqflags.h</a></div><div class='hunk'>@@ -67,7 +67,11 @@ static inline notrace unsigned long __hard_local_irq_save(void)</div><div class='ctx'> </div><div class='ctx'> static inline notrace int hard_irqs_disabled_flags(unsigned long flags)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	return (flags &amp; IMASK_IVG11) == 0;</div><div class='add'>+#else</div><div class='ctx'> 	return (flags &amp; ~0x3f) == 0;</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline notrace int hard_irqs_disabled(void)</div><div class='hunk'>@@ -224,7 +228,7 @@ static inline notrace void hard_local_irq_restore(unsigned long flags)</div><div class='ctx'>  * Direct interface to linux/irqflags.h.</div><div class='ctx'>  */</div><div class='ctx'> #define arch_local_save_flags()		hard_local_save_flags()</div><div class='del'>-#define arch_local_irq_save(flags)	__hard_local_irq_save()</div><div class='add'>+#define arch_local_irq_save()		__hard_local_irq_save()</div><div class='ctx'> #define arch_local_irq_restore(flags)	__hard_local_irq_restore(flags)</div><div class='ctx'> #define arch_local_irq_enable()		__hard_local_irq_enable()</div><div class='ctx'> #define arch_local_irq_disable()	__hard_local_irq_disable()</div><div class='head'>diff --git a/arch/blackfin/include/asm/kvm_para.h b/arch/blackfin/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/blackfin/include/asm/page.h b/arch/blackfin/include/asm/page.h<br/>index 7202404966f6..b93474d5be75 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/page.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/page.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/page.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/page.h</a></div><div class='hunk'>@@ -7,14 +7,15 @@</div><div class='ctx'> #ifndef _BLACKFIN_PAGE_H</div><div class='ctx'> #define _BLACKFIN_PAGE_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm-generic/page.h&gt;</div><div class='del'>-#define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) &gt;&gt; PAGE_SHIFT)</div><div class='add'>+#define ARCH_PFN_OFFSET (CONFIG_PHY_RAM_BASE_ADDRESS &gt;&gt; PAGE_SHIFT)</div><div class='add'>+#define MAP_NR(addr) ((unsigned long)(addr) &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> #define VM_DATA_DEFAULT_FLAGS \</div><div class='ctx'> 	(VM_READ | VM_WRITE | \</div><div class='ctx'> 	((current-&gt;personality &amp; READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \</div><div class='ctx'> 		 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)</div><div class='ctx'> </div><div class='add'>+#include &lt;asm-generic/page.h&gt;</div><div class='ctx'> #include &lt;asm-generic/memory_model.h&gt;</div><div class='ctx'> #include &lt;asm-generic/getorder.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/include/asm/pda.h b/arch/blackfin/include/asm/pda.h<br/>index 28c2498c9c98..68d6f6618f2a 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/pda.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/pda.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/pda.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/pda.h</a></div><div class='hunk'>@@ -13,7 +13,9 @@</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> struct blackfin_pda {			/* Per-processor Data Area */</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='ctx'> 	struct blackfin_pda *next;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	unsigned long syscfg;</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='head'>diff --git a/arch/blackfin/include/asm/pm.h b/arch/blackfin/include/asm/pm.h<br/>new file mode 100644<br/>index 000000000000..f72239bf3638<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/pm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/pm.h</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+/*</div><div class='add'>+ * Blackfin bf609 power management</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __PM_H__</div><div class='add'>+#define __PM_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/suspend.h&gt;</div><div class='add'>+</div><div class='add'>+struct bfin_cpu_pm_fns {</div><div class='add'>+	void    (*save)(unsigned long *);</div><div class='add'>+	void    (*restore)(unsigned long *);</div><div class='add'>+	int     (*valid)(suspend_state_t state);</div><div class='add'>+	void    (*enter)(suspend_state_t state);</div><div class='add'>+	int     (*prepare)(void);</div><div class='add'>+	void    (*finish)(void);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct bfin_cpu_pm_fns *bfin_cpu_pm;</div><div class='add'>+</div><div class='add'>+# ifdef CONFIG_BFIN_COREB</div><div class='add'>+void bfin_coreb_start(void);</div><div class='add'>+void bfin_coreb_stop(void);</div><div class='add'>+void bfin_coreb_reset(void);</div><div class='add'>+# endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/blackfin/include/asm/posix_types.h b/arch/blackfin/include/asm/posix_types.h<br/>index 41bc1875c4d7..1bd3436db6a7 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/posix_types.h</a></div><div class='hunk'>@@ -10,9 +10,6 @@</div><div class='ctx'> typedef unsigned short __kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned short __kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned int __kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/include/asm/processor.h b/arch/blackfin/include/asm/processor.h<br/>index 8af7772e84cc..4ef7cfe43ceb 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/processor.h</a></div><div class='hunk'>@@ -75,8 +75,6 @@ static inline void release_thread(struct task_struct *dead_task)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> extern int kernel_thread(int (*fn) (void *), void *arg, unsigned long flags);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h<br/>index 02560fd8a121..53ad10005ae3 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/thread_info.h</a></div><div class='hunk'>@@ -100,7 +100,6 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> 					   TIF_NEED_RESCHED */</div><div class='ctx'> #define TIF_MEMDIE		4	/* is terminating due to OOM killer */</div><div class='ctx'> #define TIF_RESTORE_SIGMASK	5	/* restore signal mask in do_signal() */</div><div class='del'>-#define TIF_FREEZE		6	/* is freezing for suspend */</div><div class='ctx'> #define TIF_IRQ_SYNC		7	/* sync pipeline stage */</div><div class='ctx'> #define TIF_NOTIFY_RESUME	8	/* callback before returning to user */</div><div class='ctx'> #define TIF_SINGLESTEP		9</div><div class='hunk'>@@ -111,7 +110,6 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> #define _TIF_NEED_RESCHED	(1&lt;&lt;TIF_NEED_RESCHED)</div><div class='ctx'> #define _TIF_POLLING_NRFLAG	(1&lt;&lt;TIF_POLLING_NRFLAG)</div><div class='ctx'> #define _TIF_RESTORE_SIGMASK	(1&lt;&lt;TIF_RESTORE_SIGMASK)</div><div class='del'>-#define _TIF_FREEZE		(1&lt;&lt;TIF_FREEZE)</div><div class='ctx'> #define _TIF_IRQ_SYNC		(1&lt;&lt;TIF_IRQ_SYNC)</div><div class='ctx'> #define _TIF_NOTIFY_RESUME	(1&lt;&lt;TIF_NOTIFY_RESUME)</div><div class='ctx'> #define _TIF_SINGLESTEP		(1&lt;&lt;TIF_SINGLESTEP)</div><div class='head'>diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h<br/>index 75ec9df5318b..3287222cba34 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/include/asm/unistd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/include/asm/unistd.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/include/asm/unistd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/include/asm/unistd.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define __NR_restart_syscall	  0</div><div class='ctx'> #define __NR_exit		  1</div><div class='del'>-#define __NR_fork		  2</div><div class='add'>+				/* 2 __NR_fork not supported on nommu */</div><div class='ctx'> #define __NR_read		  3</div><div class='ctx'> #define __NR_write		  4</div><div class='ctx'> #define __NR_open		  5</div><div class='head'>diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile<br/>index 9a0d6d706443..08e6625106be 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # arch/blackfin/kernel/Makefile</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y := init_task.o vmlinux.lds</div><div class='add'>+extra-y := vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y := \</div><div class='ctx'> 	entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \</div><div class='head'>diff --git a/arch/blackfin/kernel/bfin_dma.c b/arch/blackfin/kernel/bfin_dma.c<br/>index 40c2ed61258e..c166939ffb2b 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/bfin_dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/bfin_dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/bfin_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/bfin_dma.c</a></div><div class='hunk'>@@ -45,9 +45,15 @@ static int __init blackfin_dma_init(void)</div><div class='ctx'> 		atomic_set(&amp;dma_ch[i].chan_status, 0);</div><div class='ctx'> 		dma_ch[i].regs = dma_io_base_addr[i];</div><div class='ctx'> 	}</div><div class='add'>+#ifdef CH_MEM_STREAM3_SRC</div><div class='add'>+	/* Mark MEMDMA Channel 3 as requested since we're using it internally */</div><div class='add'>+	request_dma(CH_MEM_STREAM3_DEST, "Blackfin dma_memcpy");</div><div class='add'>+	request_dma(CH_MEM_STREAM3_SRC, "Blackfin dma_memcpy");</div><div class='add'>+#else</div><div class='ctx'> 	/* Mark MEMDMA Channel 0 as requested since we're using it internally */</div><div class='ctx'> 	request_dma(CH_MEM_STREAM0_DEST, "Blackfin dma_memcpy");</div><div class='ctx'> 	request_dma(CH_MEM_STREAM0_SRC, "Blackfin dma_memcpy");</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_DEB_DMA_URGENT)</div><div class='ctx'> 	bfin_write_EBIU_DDRQUE(bfin_read_EBIU_DDRQUE()</div><div class='hunk'>@@ -84,7 +90,8 @@ static const struct file_operations proc_dma_operations = {</div><div class='ctx'> </div><div class='ctx'> static int __init proc_dma_init(void)</div><div class='ctx'> {</div><div class='del'>-	return proc_create("dma", 0, NULL, &amp;proc_dma_operations) != NULL;</div><div class='add'>+	proc_create("dma", 0, NULL, &amp;proc_dma_operations);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> late_initcall(proc_dma_init);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -204,6 +211,7 @@ EXPORT_SYMBOL(free_dma);</div><div class='ctx'> # ifndef MAX_DMA_SUSPEND_CHANNELS</div><div class='ctx'> #  define MAX_DMA_SUSPEND_CHANNELS MAX_DMA_CHANNELS</div><div class='ctx'> # endif</div><div class='add'>+# ifndef CONFIG_BF60x</div><div class='ctx'> int blackfin_dma_suspend(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -213,7 +221,6 @@ int blackfin_dma_suspend(void)</div><div class='ctx'> 			printk(KERN_ERR "DMA Channel %d failed to suspend\n", i);</div><div class='ctx'> 			return -EBUSY;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='ctx'> 		if (i &lt; MAX_DMA_SUSPEND_CHANNELS)</div><div class='ctx'> 			dma_ch[i].saved_peripheral_map = dma_ch[i].regs-&gt;peripheral_map;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -230,7 +237,6 @@ void blackfin_dma_resume(void)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; MAX_DMA_CHANNELS; ++i) {</div><div class='ctx'> 		dma_ch[i].regs-&gt;cfg = 0;</div><div class='del'>-</div><div class='ctx'> 		if (i &lt; MAX_DMA_SUSPEND_CHANNELS)</div><div class='ctx'> 			dma_ch[i].regs-&gt;peripheral_map = dma_ch[i].saved_peripheral_map;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -238,6 +244,16 @@ void blackfin_dma_resume(void)</div><div class='ctx'> 	bfin_write_DMAC_TC_PER(0x0111);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='add'>+# else</div><div class='add'>+int blackfin_dma_suspend(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void blackfin_dma_resume(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -279,10 +295,10 @@ void __init early_dma_memcpy(void *pdst, const void *psrc, size_t size)</div><div class='ctx'> 			src_ch = (struct dma_register *)MDMA_S0_NEXT_DESC_PTR;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (!bfin_read16(&amp;src_ch-&gt;cfg))</div><div class='add'>+		if (!DMA_MMR_READ(&amp;src_ch-&gt;cfg))</div><div class='ctx'> 			break;</div><div class='del'>-		else if (bfin_read16(&amp;dst_ch-&gt;irq_status) &amp; DMA_DONE) {</div><div class='del'>-			bfin_write16(&amp;src_ch-&gt;cfg, 0);</div><div class='add'>+		else if (DMA_MMR_READ(&amp;dst_ch-&gt;irq_status) &amp; DMA_DONE) {</div><div class='add'>+			DMA_MMR_WRITE(&amp;src_ch-&gt;cfg, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -295,22 +311,31 @@ void __init early_dma_memcpy(void *pdst, const void *psrc, size_t size)</div><div class='ctx'> </div><div class='ctx'> 	/* Destination */</div><div class='ctx'> 	bfin_write32(&amp;dst_ch-&gt;start_addr, dst);</div><div class='del'>-	bfin_write16(&amp;dst_ch-&gt;x_count, size &gt;&gt; 2);</div><div class='del'>-	bfin_write16(&amp;dst_ch-&gt;x_modify, 1 &lt;&lt; 2);</div><div class='del'>-	bfin_write16(&amp;dst_ch-&gt;irq_status, DMA_DONE | DMA_ERR);</div><div class='add'>+	DMA_MMR_WRITE(&amp;dst_ch-&gt;x_count, size &gt;&gt; 2);</div><div class='add'>+	DMA_MMR_WRITE(&amp;dst_ch-&gt;x_modify, 1 &lt;&lt; 2);</div><div class='add'>+	DMA_MMR_WRITE(&amp;dst_ch-&gt;irq_status, DMA_DONE | DMA_ERR);</div><div class='ctx'> </div><div class='ctx'> 	/* Source */</div><div class='ctx'> 	bfin_write32(&amp;src_ch-&gt;start_addr, src);</div><div class='del'>-	bfin_write16(&amp;src_ch-&gt;x_count, size &gt;&gt; 2);</div><div class='del'>-	bfin_write16(&amp;src_ch-&gt;x_modify, 1 &lt;&lt; 2);</div><div class='del'>-	bfin_write16(&amp;src_ch-&gt;irq_status, DMA_DONE | DMA_ERR);</div><div class='add'>+	DMA_MMR_WRITE(&amp;src_ch-&gt;x_count, size &gt;&gt; 2);</div><div class='add'>+	DMA_MMR_WRITE(&amp;src_ch-&gt;x_modify, 1 &lt;&lt; 2);</div><div class='add'>+	DMA_MMR_WRITE(&amp;src_ch-&gt;irq_status, DMA_DONE | DMA_ERR);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable */</div><div class='del'>-	bfin_write16(&amp;src_ch-&gt;cfg, DMAEN | WDSIZE_32);</div><div class='del'>-	bfin_write16(&amp;dst_ch-&gt;cfg, WNR | DI_EN | DMAEN | WDSIZE_32);</div><div class='add'>+	DMA_MMR_WRITE(&amp;src_ch-&gt;cfg, DMAEN | WDSIZE_32);</div><div class='add'>+	DMA_MMR_WRITE(&amp;dst_ch-&gt;cfg, WNR | DI_EN_X | DMAEN | WDSIZE_32);</div><div class='ctx'> </div><div class='ctx'> 	/* Since we are atomic now, don't use the workaround ssync */</div><div class='ctx'> 	__builtin_bfin_ssync();</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	/* Work around a possible MDMA anomaly. Running 2 MDMA channels to</div><div class='add'>+	 * transfer DDR data to L1 SRAM may corrupt data.</div><div class='add'>+	 * Should be reverted after this issue is root caused.</div><div class='add'>+	 */</div><div class='add'>+	while (!(DMA_MMR_READ(&amp;dst_ch-&gt;irq_status) &amp; DMA_DONE))</div><div class='add'>+		continue;</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init early_dma_memcpy_done(void)</div><div class='hunk'>@@ -336,6 +361,42 @@ void __init early_dma_memcpy_done(void)</div><div class='ctx'> 	__builtin_bfin_ssync();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CH_MEM_STREAM3_SRC</div><div class='add'>+#define bfin_read_MDMA_S_CONFIG bfin_read_MDMA_S3_CONFIG</div><div class='add'>+#define bfin_write_MDMA_S_CONFIG bfin_write_MDMA_S3_CONFIG</div><div class='add'>+#define bfin_write_MDMA_S_START_ADDR bfin_write_MDMA_S3_START_ADDR</div><div class='add'>+#define bfin_write_MDMA_S_IRQ_STATUS bfin_write_MDMA_S3_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_S_X_COUNT bfin_write_MDMA_S3_X_COUNT</div><div class='add'>+#define bfin_write_MDMA_S_X_MODIFY bfin_write_MDMA_S3_X_MODIFY</div><div class='add'>+#define bfin_write_MDMA_S_Y_COUNT bfin_write_MDMA_S3_Y_COUNT</div><div class='add'>+#define bfin_write_MDMA_S_Y_MODIFY bfin_write_MDMA_S3_Y_MODIFY</div><div class='add'>+#define bfin_write_MDMA_D_CONFIG bfin_write_MDMA_D3_CONFIG</div><div class='add'>+#define bfin_write_MDMA_D_START_ADDR bfin_write_MDMA_D3_START_ADDR</div><div class='add'>+#define bfin_read_MDMA_D_IRQ_STATUS bfin_read_MDMA_D3_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_D_IRQ_STATUS bfin_write_MDMA_D3_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_D_X_COUNT bfin_write_MDMA_D3_X_COUNT</div><div class='add'>+#define bfin_write_MDMA_D_X_MODIFY bfin_write_MDMA_D3_X_MODIFY</div><div class='add'>+#define bfin_write_MDMA_D_Y_COUNT bfin_write_MDMA_D3_Y_COUNT</div><div class='add'>+#define bfin_write_MDMA_D_Y_MODIFY bfin_write_MDMA_D3_Y_MODIFY</div><div class='add'>+#else</div><div class='add'>+#define bfin_read_MDMA_S_CONFIG bfin_read_MDMA_S0_CONFIG</div><div class='add'>+#define bfin_write_MDMA_S_CONFIG bfin_write_MDMA_S0_CONFIG</div><div class='add'>+#define bfin_write_MDMA_S_START_ADDR bfin_write_MDMA_S0_START_ADDR</div><div class='add'>+#define bfin_write_MDMA_S_IRQ_STATUS bfin_write_MDMA_S0_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_S_X_COUNT bfin_write_MDMA_S0_X_COUNT</div><div class='add'>+#define bfin_write_MDMA_S_X_MODIFY bfin_write_MDMA_S0_X_MODIFY</div><div class='add'>+#define bfin_write_MDMA_S_Y_COUNT bfin_write_MDMA_S0_Y_COUNT</div><div class='add'>+#define bfin_write_MDMA_S_Y_MODIFY bfin_write_MDMA_S0_Y_MODIFY</div><div class='add'>+#define bfin_write_MDMA_D_CONFIG bfin_write_MDMA_D0_CONFIG</div><div class='add'>+#define bfin_write_MDMA_D_START_ADDR bfin_write_MDMA_D0_START_ADDR</div><div class='add'>+#define bfin_read_MDMA_D_IRQ_STATUS bfin_read_MDMA_D0_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_D_IRQ_STATUS bfin_write_MDMA_D0_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_D_X_COUNT bfin_write_MDMA_D0_X_COUNT</div><div class='add'>+#define bfin_write_MDMA_D_X_MODIFY bfin_write_MDMA_D0_X_MODIFY</div><div class='add'>+#define bfin_write_MDMA_D_Y_COUNT bfin_write_MDMA_D0_Y_COUNT</div><div class='add'>+#define bfin_write_MDMA_D_Y_MODIFY bfin_write_MDMA_D0_Y_MODIFY</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *	__dma_memcpy - program the MDMA registers</div><div class='ctx'>  *</div><div class='hunk'>@@ -358,8 +419,8 @@ static void __dma_memcpy(u32 daddr, s16 dmod, u32 saddr, s16 smod, size_t cnt, u</div><div class='ctx'> 	 */</div><div class='ctx'> 	__builtin_bfin_ssync();</div><div class='ctx'> </div><div class='del'>-	if (bfin_read_MDMA_S0_CONFIG())</div><div class='del'>-		while (!(bfin_read_MDMA_D0_IRQ_STATUS() &amp; DMA_DONE))</div><div class='add'>+	if (bfin_read_MDMA_S_CONFIG())</div><div class='add'>+		while (!(bfin_read_MDMA_D_IRQ_STATUS() &amp; DMA_DONE))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 	if (conf &amp; DMA2D) {</div><div class='hunk'>@@ -374,39 +435,42 @@ static void __dma_memcpy(u32 daddr, s16 dmod, u32 saddr, s16 smod, size_t cnt, u</div><div class='ctx'> 		u32 shift = abs(dmod) &gt;&gt; 1;</div><div class='ctx'> 		size_t ycnt = cnt &gt;&gt; (16 - shift);</div><div class='ctx'> 		cnt = 1 &lt;&lt; (16 - shift);</div><div class='del'>-		bfin_write_MDMA_D0_Y_COUNT(ycnt);</div><div class='del'>-		bfin_write_MDMA_S0_Y_COUNT(ycnt);</div><div class='del'>-		bfin_write_MDMA_D0_Y_MODIFY(dmod);</div><div class='del'>-		bfin_write_MDMA_S0_Y_MODIFY(smod);</div><div class='add'>+		bfin_write_MDMA_D_Y_COUNT(ycnt);</div><div class='add'>+		bfin_write_MDMA_S_Y_COUNT(ycnt);</div><div class='add'>+		bfin_write_MDMA_D_Y_MODIFY(dmod);</div><div class='add'>+		bfin_write_MDMA_S_Y_MODIFY(smod);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bfin_write_MDMA_D0_START_ADDR(daddr);</div><div class='del'>-	bfin_write_MDMA_D0_X_COUNT(cnt);</div><div class='del'>-	bfin_write_MDMA_D0_X_MODIFY(dmod);</div><div class='del'>-	bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);</div><div class='add'>+	bfin_write_MDMA_D_START_ADDR(daddr);</div><div class='add'>+	bfin_write_MDMA_D_X_COUNT(cnt);</div><div class='add'>+	bfin_write_MDMA_D_X_MODIFY(dmod);</div><div class='add'>+	bfin_write_MDMA_D_IRQ_STATUS(DMA_DONE | DMA_ERR);</div><div class='ctx'> </div><div class='del'>-	bfin_write_MDMA_S0_START_ADDR(saddr);</div><div class='del'>-	bfin_write_MDMA_S0_X_COUNT(cnt);</div><div class='del'>-	bfin_write_MDMA_S0_X_MODIFY(smod);</div><div class='del'>-	bfin_write_MDMA_S0_IRQ_STATUS(DMA_DONE | DMA_ERR);</div><div class='add'>+	bfin_write_MDMA_S_START_ADDR(saddr);</div><div class='add'>+	bfin_write_MDMA_S_X_COUNT(cnt);</div><div class='add'>+	bfin_write_MDMA_S_X_MODIFY(smod);</div><div class='add'>+	bfin_write_MDMA_S_IRQ_STATUS(DMA_DONE | DMA_ERR);</div><div class='ctx'> </div><div class='del'>-	bfin_write_MDMA_S0_CONFIG(DMAEN | conf);</div><div class='del'>-	bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | conf);</div><div class='add'>+	bfin_write_MDMA_S_CONFIG(DMAEN | conf);</div><div class='add'>+	if (conf &amp; DMA2D)</div><div class='add'>+		bfin_write_MDMA_D_CONFIG(WNR | DI_EN_Y | DMAEN | conf);</div><div class='add'>+	else</div><div class='add'>+		bfin_write_MDMA_D_CONFIG(WNR | DI_EN_X | DMAEN | conf);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;mdma_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	SSYNC();</div><div class='ctx'> </div><div class='del'>-	while (!(bfin_read_MDMA_D0_IRQ_STATUS() &amp; DMA_DONE))</div><div class='del'>-		if (bfin_read_MDMA_S0_CONFIG())</div><div class='add'>+	while (!(bfin_read_MDMA_D_IRQ_STATUS() &amp; DMA_DONE))</div><div class='add'>+		if (bfin_read_MDMA_S_CONFIG())</div><div class='ctx'> 			continue;</div><div class='ctx'> 		else</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-	bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);</div><div class='add'>+	bfin_write_MDMA_D_IRQ_STATUS(DMA_DONE | DMA_ERR);</div><div class='ctx'> </div><div class='del'>-	bfin_write_MDMA_S0_CONFIG(0);</div><div class='del'>-	bfin_write_MDMA_D0_CONFIG(0);</div><div class='add'>+	bfin_write_MDMA_S_CONFIG(0);</div><div class='add'>+	bfin_write_MDMA_D_CONFIG(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -448,8 +512,10 @@ static void *_dma_memcpy(void *pdst, const void *psrc, size_t size)</div><div class='ctx'> 	}</div><div class='ctx'> 	size &gt;&gt;= shift;</div><div class='ctx'> </div><div class='add'>+#ifndef DMA_MMR_SIZE_32</div><div class='ctx'> 	if (size &gt; 0x10000)</div><div class='ctx'> 		conf |= DMA2D;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	__dma_memcpy(dst, mod, src, mod, size, conf);</div><div class='ctx'> </div><div class='hunk'>@@ -488,6 +554,9 @@ EXPORT_SYMBOL(dma_memcpy);</div><div class='ctx'>  */</div><div class='ctx'> void *dma_memcpy_nocache(void *pdst, const void *psrc, size_t size)</div><div class='ctx'> {</div><div class='add'>+#ifdef DMA_MMR_SIZE_32</div><div class='add'>+	_dma_memcpy(pdst, psrc, size);</div><div class='add'>+#else</div><div class='ctx'> 	size_t bulk, rest;</div><div class='ctx'> </div><div class='ctx'> 	bulk = size &amp; ~0xffff;</div><div class='hunk'>@@ -495,6 +564,7 @@ void *dma_memcpy_nocache(void *pdst, const void *psrc, size_t size)</div><div class='ctx'> 	if (bulk)</div><div class='ctx'> 		_dma_memcpy(pdst, psrc, bulk);</div><div class='ctx'> 	_dma_memcpy(pdst + bulk, psrc + bulk, rest);</div><div class='add'>+#endif</div><div class='ctx'> 	return pdst;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_memcpy_nocache);</div><div class='hunk'>@@ -514,14 +584,14 @@ void *safe_dma_memcpy(void *dst, const void *src, size_t size)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(safe_dma_memcpy);</div><div class='ctx'> </div><div class='del'>-static void _dma_out(unsigned long addr, unsigned long buf, unsigned short len,</div><div class='add'>+static void _dma_out(unsigned long addr, unsigned long buf, unsigned DMA_MMR_SIZE_TYPE len,</div><div class='ctx'>                      u16 size, u16 dma_size)</div><div class='ctx'> {</div><div class='ctx'> 	blackfin_dcache_flush_range(buf, buf + len * size);</div><div class='ctx'> 	__dma_memcpy(addr, 0, buf, size, len, dma_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void _dma_in(unsigned long addr, unsigned long buf, unsigned short len,</div><div class='add'>+static void _dma_in(unsigned long addr, unsigned long buf, unsigned DMA_MMR_SIZE_TYPE len,</div><div class='ctx'>                     u16 size, u16 dma_size)</div><div class='ctx'> {</div><div class='ctx'> 	blackfin_dcache_invalidate_range(buf, buf + len * size);</div><div class='hunk'>@@ -529,7 +599,7 @@ static void _dma_in(unsigned long addr, unsigned long buf, unsigned short len,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define MAKE_DMA_IO(io, bwl, isize, dmasize, cnst) \</div><div class='del'>-void dma_##io##s##bwl(unsigned long addr, cnst void *buf, unsigned short len) \</div><div class='add'>+void dma_##io##s##bwl(unsigned long addr, cnst void *buf, unsigned DMA_MMR_SIZE_TYPE len) \</div><div class='ctx'> { \</div><div class='ctx'> 	_dma_##io(addr, (unsigned long)buf, len, isize, WDSIZE_##dmasize); \</div><div class='ctx'> } \</div><div class='head'>diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c<br/>index 02796b88443d..83139aaf3072 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/bfin_gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/bfin_gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/bfin_gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/bfin_gpio.c</a></div><div class='hunk'>@@ -58,7 +58,7 @@ static struct gpio_port_t * const gpio_array[] = {</div><div class='ctx'> 	(struct gpio_port_t *) FIO0_FLAG_D,</div><div class='ctx'> 	(struct gpio_port_t *) FIO1_FLAG_D,</div><div class='ctx'> 	(struct gpio_port_t *) FIO2_FLAG_D,</div><div class='del'>-#elif defined(CONFIG_BF54x)</div><div class='add'>+#elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x) </div><div class='ctx'> 	(struct gpio_port_t *)PORTA_FER,</div><div class='ctx'> 	(struct gpio_port_t *)PORTB_FER,</div><div class='ctx'> 	(struct gpio_port_t *)PORTC_FER,</div><div class='hunk'>@@ -66,9 +66,11 @@ static struct gpio_port_t * const gpio_array[] = {</div><div class='ctx'> 	(struct gpio_port_t *)PORTE_FER,</div><div class='ctx'> 	(struct gpio_port_t *)PORTF_FER,</div><div class='ctx'> 	(struct gpio_port_t *)PORTG_FER,</div><div class='add'>+# if defined(CONFIG_BF54x)</div><div class='ctx'> 	(struct gpio_port_t *)PORTH_FER,</div><div class='ctx'> 	(struct gpio_port_t *)PORTI_FER,</div><div class='ctx'> 	(struct gpio_port_t *)PORTJ_FER,</div><div class='add'>+# endif</div><div class='ctx'> #else</div><div class='ctx'> # error no gpio arrays defined</div><div class='ctx'> #endif</div><div class='hunk'>@@ -210,7 +212,7 @@ static void port_setup(unsigned gpio, unsigned short usage)</div><div class='ctx'> 	else</div><div class='ctx'> 		*port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);</div><div class='ctx'> 	SSYNC();</div><div class='del'>-#elif defined(CONFIG_BF54x)</div><div class='add'>+#elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x)</div><div class='ctx'> 	if (usage == GPIO_USAGE)</div><div class='ctx'> 		gpio_array[gpio_bank(gpio)]-&gt;port_fer &amp;= ~gpio_bit(gpio);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -299,7 +301,7 @@ static void portmux_setup(unsigned short per)</div><div class='ctx'> 	pmux |= (function &lt;&lt; offset);</div><div class='ctx'> 	bfin_write_PORT_MUX(pmux);</div><div class='ctx'> }</div><div class='del'>-#elif defined(CONFIG_BF54x)</div><div class='add'>+#elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x)</div><div class='ctx'> inline void portmux_setup(unsigned short per)</div><div class='ctx'> {</div><div class='ctx'> 	u16 ident = P_IDENT(per);</div><div class='hunk'>@@ -377,7 +379,7 @@ static int portmux_group_check(unsigned short per)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_BF54x</div><div class='add'>+#if !(defined(CONFIG_BF54x) || defined(CONFIG_BF60x))</div><div class='ctx'> /***********************************************************</div><div class='ctx'> *</div><div class='ctx'> * FUNCTIONS: Blackfin General Purpose Ports Access Functions</div><div class='hunk'>@@ -680,7 +682,7 @@ void bfin_gpio_pm_hibernate_restore(void)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='del'>-#else /* CONFIG_BF54x */</div><div class='add'>+#else /* CONFIG_BF54x || CONFIG_BF60x */</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> </div><div class='ctx'> int bfin_pm_standby_ctrl(unsigned ctrl)</div><div class='hunk'>@@ -726,7 +728,7 @@ unsigned short get_gpio_dir(unsigned gpio)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(get_gpio_dir);</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_BF54x */</div><div class='add'>+#endif /* CONFIG_BF54x || CONFIG_BF60x */</div><div class='ctx'> </div><div class='ctx'> /***********************************************************</div><div class='ctx'> *</div><div class='hunk'>@@ -783,7 +785,7 @@ int peripheral_request(unsigned short per, const char *label)</div><div class='ctx'> 		 * be requested and used by several drivers</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_BF54x</div><div class='add'>+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)</div><div class='ctx'> 		if (!((per &amp; P_MAYSHARE) &amp;&amp; get_portmux(per) == P_FUNCT2MUX(per))) {</div><div class='ctx'> #else</div><div class='ctx'> 		if (!(per &amp; P_MAYSHARE)) {</div><div class='hunk'>@@ -937,7 +939,7 @@ int bfin_gpio_request(unsigned gpio, const char *label)</div><div class='ctx'> 		printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"</div><div class='ctx'> 		       " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);</div><div class='ctx'> 	}</div><div class='del'>-#ifndef CONFIG_BF54x</div><div class='add'>+#if !(defined(CONFIG_BF54x) || defined(CONFIG_BF60x))</div><div class='ctx'> 	else {	/* Reset POLAR setting when acquiring a gpio for the first time */</div><div class='ctx'> 		set_gpio_polar(gpio, 0);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1110,7 +1112,7 @@ void bfin_gpio_irq_free(unsigned gpio)</div><div class='ctx'> </div><div class='ctx'> static inline void __bfin_gpio_direction_input(unsigned gpio)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_BF54x</div><div class='add'>+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)</div><div class='ctx'> 	gpio_array[gpio_bank(gpio)]-&gt;dir_clear = gpio_bit(gpio);</div><div class='ctx'> #else</div><div class='ctx'> 	gpio_array[gpio_bank(gpio)]-&gt;dir &amp;= ~gpio_bit(gpio);</div><div class='hunk'>@@ -1138,13 +1140,13 @@ EXPORT_SYMBOL(bfin_gpio_direction_input);</div><div class='ctx'> </div><div class='ctx'> void bfin_gpio_irq_prepare(unsigned gpio)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_BF54x</div><div class='add'>+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	port_setup(gpio, GPIO_USAGE);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_BF54x</div><div class='add'>+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)</div><div class='ctx'> 	flags = hard_local_irq_save();</div><div class='ctx'> 	__bfin_gpio_direction_input(gpio);</div><div class='ctx'> 	hard_local_irq_restore(flags);</div><div class='hunk'>@@ -1173,7 +1175,7 @@ int bfin_gpio_direction_output(unsigned gpio, int value)</div><div class='ctx'> </div><div class='ctx'> 	gpio_array[gpio_bank(gpio)]-&gt;inen &amp;= ~gpio_bit(gpio);</div><div class='ctx'> 	gpio_set_value(gpio, value);</div><div class='del'>-#ifdef CONFIG_BF54x</div><div class='add'>+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)</div><div class='ctx'> 	gpio_array[gpio_bank(gpio)]-&gt;dir_set = gpio_bit(gpio);</div><div class='ctx'> #else</div><div class='ctx'> 	gpio_array[gpio_bank(gpio)]-&gt;dir |= gpio_bit(gpio);</div><div class='hunk'>@@ -1188,7 +1190,7 @@ EXPORT_SYMBOL(bfin_gpio_direction_output);</div><div class='ctx'> </div><div class='ctx'> int bfin_gpio_get_value(unsigned gpio)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_BF54x</div><div class='add'>+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)</div><div class='ctx'> 	return (1 &amp; (gpio_array[gpio_bank(gpio)]-&gt;data &gt;&gt; gpio_sub_n(gpio)));</div><div class='ctx'> #else</div><div class='ctx'> 	unsigned long flags;</div><div class='head'>diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c<br/>index 886e00014d75..3e366dc2d6e1 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/cplb-nompu/cplbinit.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/cplb-nompu/cplbinit.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/cplb-nompu/cplbinit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/cplb-nompu/cplbinit.c</a></div><div class='hunk'>@@ -139,7 +139,7 @@ void __init generate_cplb_tables_all(void)</div><div class='ctx'> 	dcplb_bounds[i_d].eaddr = BOOT_ROM_START;</div><div class='ctx'> 	dcplb_bounds[i_d++].data = 0;</div><div class='ctx'> 	/* BootROM -- largest one should be less than 1 meg.  */</div><div class='del'>-	dcplb_bounds[i_d].eaddr = BOOT_ROM_START + (1 * 1024 * 1024);</div><div class='add'>+	dcplb_bounds[i_d].eaddr = BOOT_ROM_START + BOOT_ROM_LENGTH;</div><div class='ctx'> 	dcplb_bounds[i_d++].data = SDRAM_DGENERIC;</div><div class='ctx'> 	if (L2_LENGTH) {</div><div class='ctx'> 		/* Addressing hole up to L2 SRAM.  */</div><div class='hunk'>@@ -178,7 +178,7 @@ void __init generate_cplb_tables_all(void)</div><div class='ctx'> 	icplb_bounds[i_i].eaddr = BOOT_ROM_START;</div><div class='ctx'> 	icplb_bounds[i_i++].data = 0;</div><div class='ctx'> 	/* BootROM -- largest one should be less than 1 meg.  */</div><div class='del'>-	icplb_bounds[i_i].eaddr = BOOT_ROM_START + (1 * 1024 * 1024);</div><div class='add'>+	icplb_bounds[i_i].eaddr = BOOT_ROM_START + BOOT_ROM_LENGTH;</div><div class='ctx'> 	icplb_bounds[i_i++].data = SDRAM_IGENERIC;</div><div class='ctx'> </div><div class='ctx'> 	if (L2_LENGTH) {</div><div class='head'>diff --git a/arch/blackfin/kernel/cplb-nompu/cplbmgr.c b/arch/blackfin/kernel/cplb-nompu/cplbmgr.c<br/>index 5b88861d6183..e854f9066cbd 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/cplb-nompu/cplbmgr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/cplb-nompu/cplbmgr.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/cplb-nompu/cplbmgr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/cplb-nompu/cplbmgr.c</a></div><div class='hunk'>@@ -179,6 +179,12 @@ MGR_ATTR static int dcplb_miss(int cpu)</div><div class='ctx'> 		addr = addr1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	if ((addr &gt;= ASYNC_BANK0_BASE)</div><div class='add'>+		&amp;&amp; (addr &lt; ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE))</div><div class='add'>+		d_data |= PAGE_SIZE_64MB;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	/* Pick entry to evict */</div><div class='ctx'> 	idx = evict_one_dcplb(cpu);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/kernel/debug-mmrs.c b/arch/blackfin/kernel/debug-mmrs.c<br/>index 92f664826281..01232a13470d 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/debug-mmrs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/debug-mmrs.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/debug-mmrs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/debug-mmrs.c</a></div><div class='hunk'>@@ -105,6 +105,7 @@ DEFINE_SYSREG(seqstat, , );</div><div class='ctx'> DEFINE_SYSREG(syscfg, , CSYNC());</div><div class='ctx'> #define D_SYSREG(sr) debugfs_create_file(#sr, S_IRUSR|S_IWUSR, parent, NULL, &amp;fops_sysreg_##sr)</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> /*</div><div class='ctx'>  * CAN</div><div class='ctx'>  */</div><div class='hunk'>@@ -223,8 +224,10 @@ bfin_debug_mmrs_dma(struct dentry *parent, unsigned long base, int num, char mdm</div><div class='ctx'> 	__DMA(CURR_DESC_PTR, curr_desc_ptr);</div><div class='ctx'> 	__DMA(CURR_ADDR, curr_addr);</div><div class='ctx'> 	__DMA(IRQ_STATUS, irq_status);</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	if (strcmp(pfx, "IMDMA") != 0)</div><div class='ctx'> 		__DMA(PERIPHERAL_MAP, peripheral_map);</div><div class='add'>+#endif</div><div class='ctx'> 	__DMA(CURR_X_COUNT, curr_x_count);</div><div class='ctx'> 	__DMA(CURR_Y_COUNT, curr_y_count);</div><div class='ctx'> }</div><div class='hunk'>@@ -568,7 +571,7 @@ bfin_debug_mmrs_uart(struct dentry *parent, unsigned long base, int num)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> #define UART(num) bfin_debug_mmrs_uart(parent, UART##num##_DLL, num)</div><div class='del'>-</div><div class='add'>+#endif /* CONFIG_BF60x */</div><div class='ctx'> /*</div><div class='ctx'>  * The actual debugfs generation</div><div class='ctx'>  */</div><div class='hunk'>@@ -740,7 +743,7 @@ static int __init bfin_debug_mmrs_init(void)</div><div class='ctx'> 	D32(WPDACNT0);</div><div class='ctx'> 	D32(WPDACNT1);</div><div class='ctx'> 	D32(WPSTAT);</div><div class='del'>-</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	/* System MMRs */</div><div class='ctx'> #ifdef ATAPI_CONTROL</div><div class='ctx'> 	parent = debugfs_create_dir("atapi", top);</div><div class='hunk'>@@ -1873,7 +1876,7 @@ static int __init bfin_debug_mmrs_init(void)</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='ctx'> #endif	/* BF54x */</div><div class='del'>-</div><div class='add'>+#endif /* CONFIG_BF60x */</div><div class='ctx'> 	debug_mmrs_dentry = top;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/blackfin/kernel/entry.S b/arch/blackfin/kernel/entry.S<br/>index 686478f5f66b..f33792cc1a0d 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/entry.S</a></div><div class='hunk'>@@ -64,16 +64,6 @@ ENTRY(_ret_from_fork)</div><div class='ctx'> 	jump (p0);</div><div class='ctx'> ENDPROC(_ret_from_fork)</div><div class='ctx'> </div><div class='del'>-ENTRY(_sys_fork)</div><div class='del'>-	r0 = -EINVAL;</div><div class='del'>-#if (ANOMALY_05000371)</div><div class='del'>-	nop;</div><div class='del'>-	nop;</div><div class='del'>-	nop;</div><div class='del'>-#endif</div><div class='del'>-	rts;</div><div class='del'>-ENDPROC(_sys_fork)</div><div class='del'>-</div><div class='ctx'> ENTRY(_sys_vfork)</div><div class='ctx'> 	r0 = sp;</div><div class='ctx'> 	r0 += 24;</div><div class='head'>diff --git a/arch/blackfin/kernel/gptimers.c b/arch/blackfin/kernel/gptimers.c<br/>index 06459f4bf43a..d776773d3869 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/gptimers.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/gptimers.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/gptimers.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/gptimers.c</a></div><div class='hunk'>@@ -23,7 +23,11 @@</div><div class='ctx'> 		printk(KERN_DEBUG "%s:%s:%i: Assertion failed: " #expr "\n", __FILE__, __func__, __LINE__);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define BFIN_TIMER_NUM_GROUP  (BFIN_TIMER_OCTET(MAX_BLACKFIN_GPTIMERS - 1) + 1)</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='add'>+# define BFIN_TIMER_NUM_GROUP  (BFIN_TIMER_OCTET(MAX_BLACKFIN_GPTIMERS - 1) + 1)</div><div class='add'>+#else</div><div class='add'>+# define BFIN_TIMER_NUM_GROUP  1</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static struct bfin_gptimer_regs * const timer_regs[MAX_BLACKFIN_GPTIMERS] =</div><div class='ctx'> {</div><div class='hunk'>@@ -158,6 +162,74 @@ uint32_t get_gptimer_count(unsigned int timer_id)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(get_gptimer_count);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+void set_gptimer_delay(unsigned int timer_id, uint32_t delay)</div><div class='add'>+{</div><div class='add'>+	tassert(timer_id &lt; MAX_BLACKFIN_GPTIMERS);</div><div class='add'>+	bfin_write(&amp;timer_regs[timer_id]-&gt;delay, delay);</div><div class='add'>+	SSYNC();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(set_gptimer_delay);</div><div class='add'>+</div><div class='add'>+uint32_t get_gptimer_delay(unsigned int timer_id)</div><div class='add'>+{</div><div class='add'>+	tassert(timer_id &lt; MAX_BLACKFIN_GPTIMERS);</div><div class='add'>+	return bfin_read(&amp;timer_regs[timer_id]-&gt;delay);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(get_gptimer_delay);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+int get_gptimer_intr(unsigned int timer_id)</div><div class='add'>+{</div><div class='add'>+	tassert(timer_id &lt; MAX_BLACKFIN_GPTIMERS);</div><div class='add'>+	return !!(bfin_read(&amp;group_regs[BFIN_TIMER_OCTET(timer_id)]-&gt;data_ilat) &amp; timil_mask[timer_id]);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(get_gptimer_intr);</div><div class='add'>+</div><div class='add'>+void clear_gptimer_intr(unsigned int timer_id)</div><div class='add'>+{</div><div class='add'>+	tassert(timer_id &lt; MAX_BLACKFIN_GPTIMERS);</div><div class='add'>+	bfin_write(&amp;group_regs[BFIN_TIMER_OCTET(timer_id)]-&gt;data_ilat, timil_mask[timer_id]);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(clear_gptimer_intr);</div><div class='add'>+</div><div class='add'>+int get_gptimer_over(unsigned int timer_id)</div><div class='add'>+{</div><div class='add'>+	tassert(timer_id &lt; MAX_BLACKFIN_GPTIMERS);</div><div class='add'>+	return !!(bfin_read(&amp;group_regs[BFIN_TIMER_OCTET(timer_id)]-&gt;stat_ilat) &amp; tovf_mask[timer_id]);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(get_gptimer_over);</div><div class='add'>+</div><div class='add'>+void clear_gptimer_over(unsigned int timer_id)</div><div class='add'>+{</div><div class='add'>+	tassert(timer_id &lt; MAX_BLACKFIN_GPTIMERS);</div><div class='add'>+	bfin_write(&amp;group_regs[BFIN_TIMER_OCTET(timer_id)]-&gt;stat_ilat, tovf_mask[timer_id]);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(clear_gptimer_over);</div><div class='add'>+</div><div class='add'>+int get_gptimer_run(unsigned int timer_id)</div><div class='add'>+{</div><div class='add'>+	tassert(timer_id &lt; MAX_BLACKFIN_GPTIMERS);</div><div class='add'>+	return !!(bfin_read(&amp;group_regs[BFIN_TIMER_OCTET(timer_id)]-&gt;run) &amp; trun_mask[timer_id]);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(get_gptimer_run);</div><div class='add'>+</div><div class='add'>+uint32_t get_gptimer_status(unsigned int group)</div><div class='add'>+{</div><div class='add'>+	tassert(group &lt; BFIN_TIMER_NUM_GROUP);</div><div class='add'>+	return bfin_read(&amp;group_regs[group]-&gt;data_ilat);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(get_gptimer_status);</div><div class='add'>+</div><div class='add'>+void set_gptimer_status(unsigned int group, uint32_t value)</div><div class='add'>+{</div><div class='add'>+	tassert(group &lt; BFIN_TIMER_NUM_GROUP);</div><div class='add'>+	bfin_write(&amp;group_regs[group]-&gt;data_ilat, value);</div><div class='add'>+	SSYNC();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(set_gptimer_status);</div><div class='add'>+#else</div><div class='ctx'> uint32_t get_gptimer_status(unsigned int group)</div><div class='ctx'> {</div><div class='ctx'> 	tassert(group &lt; BFIN_TIMER_NUM_GROUP);</div><div class='hunk'>@@ -212,6 +284,7 @@ int get_gptimer_run(unsigned int timer_id)</div><div class='ctx'> 	return !!(read_gptimer_status(timer_id) &amp; trun_mask[timer_id]);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(get_gptimer_run);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> void set_gptimer_config(unsigned int timer_id, uint16_t config)</div><div class='ctx'> {</div><div class='hunk'>@@ -231,6 +304,12 @@ EXPORT_SYMBOL(get_gptimer_config);</div><div class='ctx'> void enable_gptimers(uint16_t mask)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	uint16_t imask;</div><div class='add'>+	imask = bfin_read16(TIMER_DATA_IMSK);</div><div class='add'>+	imask &amp;= ~mask;</div><div class='add'>+	bfin_write16(TIMER_DATA_IMSK, imask);</div><div class='add'>+#endif</div><div class='ctx'> 	tassert((mask &amp; ~BLACKFIN_GPTIMER_IDMASK) == 0);</div><div class='ctx'> 	for (i = 0; i &lt; BFIN_TIMER_NUM_GROUP; ++i) {</div><div class='ctx'> 		bfin_write(&amp;group_regs[i]-&gt;enable, mask &amp; 0xFF);</div><div class='hunk'>@@ -253,12 +332,16 @@ static void _disable_gptimers(uint16_t mask)</div><div class='ctx'> </div><div class='ctx'> void disable_gptimers(uint16_t mask)</div><div class='ctx'> {</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	int i;</div><div class='ctx'> 	_disable_gptimers(mask);</div><div class='ctx'> 	for (i = 0; i &lt; MAX_BLACKFIN_GPTIMERS; ++i)</div><div class='ctx'> 		if (mask &amp; (1 &lt;&lt; i))</div><div class='ctx'> 			bfin_write(&amp;group_regs[BFIN_TIMER_OCTET(i)]-&gt;status, trun_mask[i]);</div><div class='ctx'> 	SSYNC();</div><div class='add'>+#else</div><div class='add'>+	_disable_gptimers(mask);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(disable_gptimers);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/kernel/init_task.c b/arch/blackfin/kernel/init_task.c<br/>deleted file mode 100644<br/>index d3970e8acd1a..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,32 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright 2004-2009 Analog Devices Inc.</div><div class='del'>- *</div><div class='del'>- * Licensed under the GPL-2 or later</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is 8192-byte aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry.</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union</div><div class='del'>-    __init_task_data = {</div><div class='del'>-INIT_THREAD_INFO(init_task)};</div><div class='head'>diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c<br/>index c0f4fe287eb6..62bcea7dcc6d 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/process.c</a></div><div class='hunk'>@@ -95,7 +95,9 @@ void cpu_idle(void)</div><div class='ctx'> 			idle();</div><div class='ctx'> 		rcu_idle_exit();</div><div class='ctx'> 		tick_nohz_idle_exit();</div><div class='del'>-		schedule_preempt_disabled();</div><div class='add'>+		preempt_enable_no_resched();</div><div class='add'>+		schedule();</div><div class='add'>+		preempt_disable();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -171,7 +173,7 @@ asmlinkage int bfin_clone(struct pt_regs *regs)</div><div class='ctx'> 	unsigned long newsp;</div><div class='ctx'> </div><div class='ctx'> #ifdef __ARCH_SYNC_CORE_DCACHE</div><div class='del'>-	if (current-&gt;rt.nr_cpus_allowed == num_possible_cpus())</div><div class='add'>+	if (current-&gt;nr_cpus_allowed == num_possible_cpus())</div><div class='ctx'> 		set_cpus_allowed_ptr(current, cpumask_of(smp_processor_id()));</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -329,12 +331,16 @@ int in_mem_const(unsigned long addr, unsigned long size,</div><div class='ctx'> {</div><div class='ctx'> 	return in_mem_const_off(addr, size, 0, const_addr, const_size);</div><div class='ctx'> }</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+#define ASYNC_ENABLED(bnum, bctlnum)	1</div><div class='add'>+#else</div><div class='ctx'> #define ASYNC_ENABLED(bnum, bctlnum) \</div><div class='ctx'> ({ \</div><div class='ctx'> 	(bfin_read_EBIU_AMGCTL() &amp; 0xe) &lt; ((bnum + 1) &lt;&lt; 1) ? 0 : \</div><div class='ctx'> 	bfin_read_EBIU_AMBCTL##bctlnum() &amp; B##bnum##RDYEN ? 0 : \</div><div class='ctx'> 	1; \</div><div class='ctx'> })</div><div class='add'>+#endif</div><div class='ctx'> /*</div><div class='ctx'>  * We can't read EBIU banks that aren't enabled or we end up hanging</div><div class='ctx'>  * on the access to the async space.  Make sure we validate accesses</div><div class='head'>diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c<br/>index b0434f89e8de..5272e6eefd92 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/reboot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/reboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/reboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/reboot.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> __attribute__ ((__l1_text__, __noreturn__))</div><div class='ctx'> static void bfin_reset(void)</div><div class='ctx'> {</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	if (!ANOMALY_05000353 &amp;&amp; !ANOMALY_05000386)</div><div class='ctx'> 		bfrom_SoftReset((void *)(L1_SCRATCH_START + L1_SCRATCH_LENGTH - 20));</div><div class='ctx'> </div><div class='hunk'>@@ -57,7 +58,6 @@ static void bfin_reset(void)</div><div class='ctx'> 	if (__SILICON_REVISION__ &lt; 1 &amp;&amp; bfin_revid() &lt; 1)</div><div class='ctx'> 		bfin_read_SWRST();</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='ctx'> 	/* Wait for the SWRST write to complete.  Cannot rely on SSYNC</div><div class='ctx'> 	 * though as the System state is all reset now.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -72,6 +72,10 @@ static void bfin_reset(void)</div><div class='ctx'> 	while (1)</div><div class='ctx'> 		/* Issue core reset */</div><div class='ctx'> 		asm("raise 1");</div><div class='add'>+#else</div><div class='add'>+	while (1)</div><div class='add'>+		bfin_write_RCU0_CTL(0x1);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> __attribute__((weak))</div><div class='head'>diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c<br/>index 2ad747e909fb..ada8f0fc71e4 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/setup.c</a></div><div class='hunk'>@@ -25,12 +25,16 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/blackfin.h&gt;</div><div class='ctx'> #include &lt;asm/cplbinit.h&gt;</div><div class='add'>+#include &lt;asm/clocks.h&gt;</div><div class='ctx'> #include &lt;asm/div64.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/fixed_code.h&gt;</div><div class='ctx'> #include &lt;asm/early_printk.h&gt;</div><div class='ctx'> #include &lt;asm/irq_handler.h&gt;</div><div class='ctx'> #include &lt;asm/pda.h&gt;</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+#include &lt;mach/pm.h&gt;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> u16 _bfin_swrst;</div><div class='ctx'> EXPORT_SYMBOL(_bfin_swrst);</div><div class='hunk'>@@ -550,7 +554,6 @@ static __init void memory_setup(void)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_MTD_UCLINUX</div><div class='ctx'> 	unsigned long mtd_phys = 0;</div><div class='del'>-	unsigned long n;</div><div class='ctx'> #endif</div><div class='ctx'> 	unsigned long max_mem;</div><div class='ctx'> </div><div class='hunk'>@@ -594,9 +597,9 @@ static __init void memory_setup(void)</div><div class='ctx'> 	mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));</div><div class='ctx'> </div><div class='ctx'> # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)</div><div class='del'>-	n = ext2_image_size((void *)(mtd_phys + 0x400));</div><div class='del'>-	if (n)</div><div class='del'>-		mtd_size = PAGE_ALIGN(n * 1024);</div><div class='add'>+	if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)</div><div class='add'>+		mtd_size =</div><div class='add'>+		    PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) &lt;&lt; 10);</div><div class='ctx'> # endif</div><div class='ctx'> </div><div class='ctx'> # if defined(CONFIG_CRAMFS)</div><div class='hunk'>@@ -612,7 +615,8 @@ static __init void memory_setup(void)</div><div class='ctx'> </div><div class='ctx'> 		/* ROM_FS is XIP, so if we found it, we need to limit memory */</div><div class='ctx'> 		if (memory_end &gt; max_mem) {</div><div class='del'>-			pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n", max_mem &gt;&gt; 20);</div><div class='add'>+			pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n",</div><div class='add'>+				(max_mem - CONFIG_PHY_RAM_BASE_ADDRESS) &gt;&gt; 20);</div><div class='ctx'> 			memory_end = max_mem;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -642,7 +646,8 @@ static __init void memory_setup(void)</div><div class='ctx'> 	 * doesn't exist, or we don't need to - then dont.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (memory_end &gt; max_mem) {</div><div class='del'>-		pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n", max_mem &gt;&gt; 20);</div><div class='add'>+		pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n",</div><div class='add'>+				(max_mem - CONFIG_PHY_RAM_BASE_ADDRESS) &gt;&gt; 20);</div><div class='ctx'> 		memory_end = max_mem;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -661,8 +666,8 @@ static __init void memory_setup(void)</div><div class='ctx'> 	init_mm.end_data = (unsigned long)_edata;</div><div class='ctx'> 	init_mm.brk = (unsigned long)0;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end &gt;&gt; 20);</div><div class='del'>-	printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend &gt;&gt; 20);</div><div class='add'>+	printk(KERN_INFO "Board Memory: %ldMB\n", (physical_mem_end - CONFIG_PHY_RAM_BASE_ADDRESS) &gt;&gt; 20);</div><div class='add'>+	printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", (_ramend - CONFIG_PHY_RAM_BASE_ADDRESS) &gt;&gt; 20);</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO "Memory map:\n"</div><div class='ctx'> 	       "  fixedcode = 0x%p-0x%p\n"</div><div class='hunk'>@@ -705,7 +710,7 @@ void __init find_min_max_pfn(void)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	max_pfn = 0;</div><div class='del'>-	min_low_pfn = memory_end;</div><div class='add'>+	min_low_pfn = PFN_DOWN(memory_end);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; bfin_memmap.nr_map; i++) {</div><div class='ctx'> 		unsigned long start, end;</div><div class='hunk'>@@ -748,8 +753,7 @@ static __init void setup_bootmem_allocator(void)</div><div class='ctx'> 	/* pfn of the first usable page frame after kernel image*/</div><div class='ctx'> 	if (min_low_pfn &lt; memory_start &gt;&gt; PAGE_SHIFT)</div><div class='ctx'> 		min_low_pfn = memory_start &gt;&gt; PAGE_SHIFT;</div><div class='del'>-</div><div class='del'>-	start_pfn = PAGE_OFFSET &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	start_pfn = CONFIG_PHY_RAM_BASE_ADDRESS &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	end_pfn = memory_end &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -794,8 +798,8 @@ static __init void setup_bootmem_allocator(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* reserve memory before memory_start, including bootmap */</div><div class='del'>-	reserve_bootmem(PAGE_OFFSET,</div><div class='del'>-		memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,</div><div class='add'>+	reserve_bootmem(CONFIG_PHY_RAM_BASE_ADDRESS,</div><div class='add'>+		memory_start + bootmap_size + PAGE_SIZE - 1 - CONFIG_PHY_RAM_BASE_ADDRESS,</div><div class='ctx'> 		BOOTMEM_DEFAULT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -844,13 +848,40 @@ static inline int __init get_mem_size(void)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	switch (ddrctl &amp; 0x30000) {</div><div class='del'>-		case DEVWD_4:  ret *= 2;</div><div class='del'>-		case DEVWD_8:  ret *= 2;</div><div class='del'>-		case DEVWD_16: break;</div><div class='add'>+	case DEVWD_4:</div><div class='add'>+		ret *= 2;</div><div class='add'>+	case DEVWD_8:</div><div class='add'>+		ret *= 2;</div><div class='add'>+	case DEVWD_16:</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	if ((ddrctl &amp; 0xc000) == 0x4000)</div><div class='ctx'> 		ret *= 2;</div><div class='ctx'> 	return ret;</div><div class='add'>+#elif defined(CONFIG_BF60x)</div><div class='add'>+	u32 ddrctl = bfin_read_DMC0_CFG();</div><div class='add'>+	int ret;</div><div class='add'>+	switch (ddrctl &amp; 0xf00) {</div><div class='add'>+	case DEVSZ_64:</div><div class='add'>+		ret = 64 / 8;</div><div class='add'>+		break;</div><div class='add'>+	case DEVSZ_128:</div><div class='add'>+		ret = 128 / 8;</div><div class='add'>+		break;</div><div class='add'>+	case DEVSZ_256:</div><div class='add'>+		ret = 256 / 8;</div><div class='add'>+		break;</div><div class='add'>+	case DEVSZ_512:</div><div class='add'>+		ret = 512 / 8;</div><div class='add'>+		break;</div><div class='add'>+	case DEVSZ_1G:</div><div class='add'>+		ret = 1024 / 8;</div><div class='add'>+		break;</div><div class='add'>+	case DEVSZ_2G:</div><div class='add'>+		ret = 2048 / 8;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='ctx'> #endif</div><div class='ctx'> 	BUG();</div><div class='ctx'> }</div><div class='hunk'>@@ -860,6 +891,22 @@ void __init native_machine_early_platform_add_devices(void)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+static inline u_long bfin_get_clk(char *name)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	u_long clk_rate;</div><div class='add'>+</div><div class='add'>+	clk = clk_get(NULL, name);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	clk_rate = clk_get_rate(clk);</div><div class='add'>+	clk_put(clk);</div><div class='add'>+	return clk_rate;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> void __init setup_arch(char **cmdline_p)</div><div class='ctx'> {</div><div class='ctx'> 	u32 mmr;</div><div class='hunk'>@@ -870,6 +917,7 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	enable_shadow_console();</div><div class='ctx'> </div><div class='ctx'> 	/* Check to make sure we are running on the right processor */</div><div class='add'>+	mmr =  bfin_cpuid();</div><div class='ctx'> 	if (unlikely(CPUID != bfin_cpuid()))</div><div class='ctx'> 		printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",</div><div class='ctx'> 			CPU, bfin_cpuid(), bfin_revid());</div><div class='hunk'>@@ -890,6 +938,10 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;bfin_memmap, 0, sizeof(bfin_memmap));</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	/* Should init clock device before parse command early */</div><div class='add'>+	clk_init();</div><div class='add'>+#endif</div><div class='ctx'> 	/* If the user does not specify things on the command line, use</div><div class='ctx'> 	 * what the bootloader set things up as</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -904,6 +956,7 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> </div><div class='ctx'> 	memory_setup();</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	/* Initialize Async memory banks */</div><div class='ctx'> 	bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);</div><div class='ctx'> 	bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);</div><div class='hunk'>@@ -913,6 +966,7 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);</div><div class='ctx'> 	bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);</div><div class='ctx'> #endif</div><div class='add'>+#endif</div><div class='ctx'> #ifdef CONFIG_BFIN_HYSTERESIS_CONTROL</div><div class='ctx'> 	bfin_write_PORTF_HYSTERESIS(HYST_PORTF_0_15);</div><div class='ctx'> 	bfin_write_PORTG_HYSTERESIS(HYST_PORTG_0_15);</div><div class='hunk'>@@ -938,7 +992,7 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	printk(KERN_INFO "Hardware Trace %s and %sabled\n",</div><div class='ctx'> 		(mmr &amp; 0x1) ? "active" : "off",</div><div class='ctx'> 		(mmr &amp; 0x2) ? "en" : "dis");</div><div class='del'>-</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	mmr = bfin_read_SYSCR();</div><div class='ctx'> 	printk(KERN_INFO "Boot Mode: %i\n", mmr &amp; 0xF);</div><div class='ctx'> </div><div class='hunk'>@@ -980,7 +1034,7 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 		printk(KERN_INFO "Recovering from Watchdog event\n");</div><div class='ctx'> 	else if (_bfin_swrst &amp; RESET_SOFTWARE)</div><div class='ctx'> 		printk(KERN_NOTICE "Reset caused by Software reset\n");</div><div class='del'>-</div><div class='add'>+#endif</div><div class='ctx'> 	printk(KERN_INFO "Blackfin support (C) 2004-2010 Analog Devices, Inc.\n");</div><div class='ctx'> 	if (bfin_compiled_revid() == 0xffff)</div><div class='ctx'> 		printk(KERN_INFO "Compiled for ADSP-%s Rev any, running on 0.%d\n", CPU, bfin_revid());</div><div class='hunk'>@@ -1008,8 +1062,13 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	printk(KERN_INFO "Processor Speed: %lu MHz core clock, %lu MHz SCLk, %lu MHz SCLK0, %lu MHz SCLK1 and %lu MHz DCLK\n",</div><div class='add'>+		cclk / 1000000, bfin_get_clk("SYSCLK") / 1000000, get_sclk0() / 1000000, get_sclk1() / 1000000, get_dclk() / 1000000);</div><div class='add'>+#else</div><div class='ctx'> 	printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",</div><div class='ctx'> 	       cclk / 1000000, sclk / 1000000);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	setup_bootmem_allocator();</div><div class='ctx'> </div><div class='hunk'>@@ -1060,10 +1119,12 @@ subsys_initcall(topology_init);</div><div class='ctx'> </div><div class='ctx'> /* Get the input clock frequency */</div><div class='ctx'> static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> static u_long get_clkin_hz(void)</div><div class='ctx'> {</div><div class='ctx'> 	return cached_clkin_hz;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> static int __init early_init_clkin_hz(char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	cached_clkin_hz = simple_strtoul(buf, NULL, 0);</div><div class='hunk'>@@ -1075,6 +1136,7 @@ static int __init early_init_clkin_hz(char *buf)</div><div class='ctx'> }</div><div class='ctx'> early_param("clkin_hz=", early_init_clkin_hz);</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> /* Get the voltage input multiplier */</div><div class='ctx'> static u_long get_vco(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -1097,10 +1159,14 @@ static u_long get_vco(void)</div><div class='ctx'> 	cached_vco *= msel;</div><div class='ctx'> 	return cached_vco;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /* Get the Core clock */</div><div class='ctx'> u_long get_cclk(void)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	return bfin_get_clk("CCLK");</div><div class='add'>+#else</div><div class='ctx'> 	static u_long cached_cclk_pll_div, cached_cclk;</div><div class='ctx'> 	u_long csel, ssel;</div><div class='ctx'> </div><div class='hunk'>@@ -1120,12 +1186,39 @@ u_long get_cclk(void)</div><div class='ctx'> 	else</div><div class='ctx'> 		cached_cclk = get_vco() &gt;&gt; csel;</div><div class='ctx'> 	return cached_cclk;</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(get_cclk);</div><div class='ctx'> </div><div class='del'>-/* Get the System clock */</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+/* Get the bf60x clock of SCLK0 domain */</div><div class='add'>+u_long get_sclk0(void)</div><div class='add'>+{</div><div class='add'>+	return bfin_get_clk("SCLK0");</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(get_sclk0);</div><div class='add'>+</div><div class='add'>+/* Get the bf60x clock of SCLK1 domain */</div><div class='add'>+u_long get_sclk1(void)</div><div class='add'>+{</div><div class='add'>+	return bfin_get_clk("SCLK1");</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(get_sclk1);</div><div class='add'>+</div><div class='add'>+/* Get the bf60x DRAM clock */</div><div class='add'>+u_long get_dclk(void)</div><div class='add'>+{</div><div class='add'>+	return bfin_get_clk("DCLK");</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(get_dclk);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* Get the default system clock */</div><div class='ctx'> u_long get_sclk(void)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	return get_sclk0();</div><div class='add'>+#else</div><div class='ctx'> 	static u_long cached_sclk;</div><div class='ctx'> 	u_long ssel;</div><div class='ctx'> </div><div class='hunk'>@@ -1146,6 +1239,7 @@ u_long get_sclk(void)</div><div class='ctx'> </div><div class='ctx'> 	cached_sclk = get_vco() / ssel;</div><div class='ctx'> 	return cached_sclk;</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(get_sclk);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/kernel/shadow_console.c b/arch/blackfin/kernel/shadow_console.c<br/>index 557e9fef406a..aeb8343eeb03 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/shadow_console.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/shadow_console.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/shadow_console.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/shadow_console.c</a></div><div class='hunk'>@@ -15,9 +15,9 @@</div><div class='ctx'> #include &lt;asm/irq_handler.h&gt;</div><div class='ctx'> #include &lt;asm/early_printk.h&gt;</div><div class='ctx'> </div><div class='del'>-#define SHADOW_CONSOLE_START		(0x500)</div><div class='del'>-#define SHADOW_CONSOLE_END		(0x1000)</div><div class='del'>-#define SHADOW_CONSOLE_MAGIC_LOC	(0x4F0)</div><div class='add'>+#define SHADOW_CONSOLE_START		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x500)</div><div class='add'>+#define SHADOW_CONSOLE_END		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x1000)</div><div class='add'>+#define SHADOW_CONSOLE_MAGIC_LOC	(CONFIG_PHY_RAM_BASE_ADDRESS + 0x4F0)</div><div class='ctx'> #define SHADOW_CONSOLE_MAGIC		(0xDEADBEEF)</div><div class='ctx'> </div><div class='ctx'> static __initdata char *shadow_console_buffer = (char *)SHADOW_CONSOLE_START;</div><div class='head'>diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c<br/>index d536f35d1f43..6682b73a8523 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/signal.c</a></div><div class='hunk'>@@ -19,8 +19,6 @@</div><div class='ctx'> #include &lt;asm/fixed_code.h&gt;</div><div class='ctx'> #include &lt;asm/syscall.h&gt;</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> /* Location of the trace bit in SYSCFG. */</div><div class='ctx'> #define TRACE_BITS 0x0001</div><div class='ctx'> </div><div class='hunk'>@@ -98,11 +96,7 @@ asmlinkage int do_rt_sigreturn(unsigned long __unused)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (rt_restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext, &amp;r0))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -193,17 +187,22 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,</div><div class='ctx'> 	err |= copy_to_user(&amp;frame-&gt;uc.uc_sigmask, set, sizeof(*set));</div><div class='ctx'> </div><div class='ctx'> 	if (err)</div><div class='del'>-		goto give_sigsegv;</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	/* Set up registers for signal handler */</div><div class='del'>-	wrusp((unsigned long)frame);</div><div class='ctx'> 	if (current-&gt;personality &amp; FDPIC_FUNCPTRS) {</div><div class='ctx'> 		struct fdpic_func_descriptor __user *funcptr =</div><div class='ctx'> 			(struct fdpic_func_descriptor *) ka-&gt;sa.sa_handler;</div><div class='del'>-		__get_user(regs-&gt;pc, &amp;funcptr-&gt;text);</div><div class='del'>-		__get_user(regs-&gt;p3, &amp;funcptr-&gt;GOT);</div><div class='add'>+		u32 pc, p3;</div><div class='add'>+		err |= __get_user(pc, &amp;funcptr-&gt;text);</div><div class='add'>+		err |= __get_user(p3, &amp;funcptr-&gt;GOT);</div><div class='add'>+		if (err)</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		regs-&gt;pc = pc;</div><div class='add'>+		regs-&gt;p3 = p3;</div><div class='ctx'> 	} else</div><div class='ctx'> 		regs-&gt;pc = (unsigned long)ka-&gt;sa.sa_handler;</div><div class='add'>+	wrusp((unsigned long)frame);</div><div class='ctx'> 	regs-&gt;rets = SIGRETURN_STUB;</div><div class='ctx'> </div><div class='ctx'> 	regs-&gt;r0 = frame-&gt;sig;</div><div class='hunk'>@@ -211,12 +210,6 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,</div><div class='ctx'> 	regs-&gt;r2 = (unsigned long)(&amp;frame-&gt;uc);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>- give_sigsegv:</div><div class='del'>-	if (sig == SIGSEGV)</div><div class='del'>-		ka-&gt;sa.sa_handler = SIG_DFL;</div><div class='del'>-	force_sig(SIGSEGV, current);</div><div class='del'>-	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='hunk'>@@ -252,30 +245,21 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)</div><div class='ctx'> /*</div><div class='ctx'>  * OK, we're invoking a handler</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='add'>+static void</div><div class='ctx'> handle_signal(int sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='del'>-	      sigset_t *oldset, struct pt_regs *regs)</div><div class='add'>+	      struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='ctx'> 	/* are we from a system call? to see pt_regs-&gt;orig_p0 */</div><div class='ctx'> 	if (regs-&gt;orig_p0 &gt;= 0)</div><div class='ctx'> 		/* If so, check system call restarting.. */</div><div class='ctx'> 		handle_restart(regs, ka, 1);</div><div class='ctx'> </div><div class='ctx'> 	/* set up the stack frame */</div><div class='del'>-	ret = setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='del'>-</div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-		sigorsets(&amp;current-&gt;blocked, &amp;current-&gt;blocked,</div><div class='del'>-			  &amp;ka-&gt;sa.sa_mask);</div><div class='del'>-		if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-			sigaddset(&amp;current-&gt;blocked, sig);</div><div class='del'>-		recalc_sigpending();</div><div class='del'>-		spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	if (setup_rt_frame(sig, ka, info, sigmask_to_save(), regs) &lt; 0)</div><div class='add'>+		force_sigsegv(sig, current);</div><div class='add'>+	else </div><div class='add'>+		signal_delivered(sig, info, ka, regs,</div><div class='add'>+				test_thread_flag(TIF_SINGLESTEP));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -292,37 +276,16 @@ asmlinkage void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> </div><div class='ctx'> 	current-&gt;thread.esp0 = (unsigned long)regs;</div><div class='ctx'> </div><div class='del'>-	if (try_to_freeze())</div><div class='del'>-		goto no_signal;</div><div class='del'>-</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  */</div><div class='del'>-		if (handle_signal(signr, &amp;info, &amp;ka, oldset, regs) == 0) {</div><div class='del'>-			/* a signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-</div><div class='del'>-			tracehook_signal_handler(signr, &amp;info, &amp;ka, regs,</div><div class='del'>-				test_thread_flag(TIF_SINGLESTEP));</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		handle_signal(signr, &amp;info, &amp;ka, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>- no_signal:</div><div class='ctx'> 	/* Did we come from a system call? */</div><div class='ctx'> 	if (regs-&gt;orig_p0 &gt;= 0)</div><div class='ctx'> 		/* Restart the system call - no handlers present */</div><div class='hunk'>@@ -330,10 +293,7 @@ asmlinkage void do_signal(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	/* if there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -341,14 +301,12 @@ asmlinkage void do_signal(struct pt_regs *regs)</div><div class='ctx'>  */</div><div class='ctx'> asmlinkage void do_notify_resume(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	if (test_thread_flag(TIF_SIGPENDING) || test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='add'>+	if (test_thread_flag(TIF_SIGPENDING))</div><div class='ctx'> 		do_signal(regs);</div><div class='ctx'> </div><div class='ctx'> 	if (test_thread_flag(TIF_NOTIFY_RESUME)) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c<br/>index d98f2d69b0c4..f608f02f29a3 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/time-ts.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/time-ts.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/time-ts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/time-ts.c</a></div><div class='hunk'>@@ -66,8 +66,14 @@ void __init setup_gptimer0(void)</div><div class='ctx'> {</div><div class='ctx'> 	disable_gptimers(TIMER0bit);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	bfin_write16(TIMER_DATA_IMSK, 0);</div><div class='add'>+	set_gptimer_config(TIMER0_id,  TIMER_OUT_DIS</div><div class='add'>+		| TIMER_MODE_PWM_CONT | TIMER_PULSE_HI | TIMER_IRQ_PER);</div><div class='add'>+#else</div><div class='ctx'> 	set_gptimer_config(TIMER0_id, \</div><div class='ctx'> 		TIMER_OUT_DIS | TIMER_PERIOD_CNT | TIMER_MODE_PWM);</div><div class='add'>+#endif</div><div class='ctx'> 	set_gptimer_period(TIMER0_id, -1);</div><div class='ctx'> 	set_gptimer_pwidth(TIMER0_id, -2);</div><div class='ctx'> 	SSYNC();</div><div class='hunk'>@@ -135,9 +141,15 @@ static void bfin_gptmr0_set_mode(enum clock_event_mode mode,</div><div class='ctx'> {</div><div class='ctx'> 	switch (mode) {</div><div class='ctx'> 	case CLOCK_EVT_MODE_PERIODIC: {</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 		set_gptimer_config(TIMER0_id, \</div><div class='ctx'> 			TIMER_OUT_DIS | TIMER_IRQ_ENA | \</div><div class='ctx'> 			TIMER_PERIOD_CNT | TIMER_MODE_PWM);</div><div class='add'>+#else</div><div class='add'>+		set_gptimer_config(TIMER0_id,  TIMER_OUT_DIS</div><div class='add'>+			| TIMER_MODE_PWM_CONT | TIMER_PULSE_HI | TIMER_IRQ_PER);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 		set_gptimer_period(TIMER0_id, get_sclk() / HZ);</div><div class='ctx'> 		set_gptimer_pwidth(TIMER0_id, get_sclk() / HZ - 1);</div><div class='ctx'> 		enable_gptimers(TIMER0bit);</div><div class='hunk'>@@ -145,8 +157,14 @@ static void bfin_gptmr0_set_mode(enum clock_event_mode mode,</div><div class='ctx'> 	}</div><div class='ctx'> 	case CLOCK_EVT_MODE_ONESHOT:</div><div class='ctx'> 		disable_gptimers(TIMER0bit);</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 		set_gptimer_config(TIMER0_id, \</div><div class='ctx'> 			TIMER_OUT_DIS | TIMER_IRQ_ENA | TIMER_MODE_PWM);</div><div class='add'>+#else</div><div class='add'>+		set_gptimer_config(TIMER0_id, TIMER_OUT_DIS | TIMER_MODE_PWM</div><div class='add'>+			| TIMER_PULSE_HI | TIMER_IRQ_WID_DLY);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 		set_gptimer_period(TIMER0_id, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CLOCK_EVT_MODE_UNUSED:</div><div class='hunk'>@@ -160,7 +178,7 @@ static void bfin_gptmr0_set_mode(enum clock_event_mode mode,</div><div class='ctx'> </div><div class='ctx'> static void bfin_gptmr0_ack(void)</div><div class='ctx'> {</div><div class='del'>-	set_gptimer_status(TIMER_GROUP1, TIMER_STATUS_TIMIL0);</div><div class='add'>+	clear_gptimer_intr(TIMER0_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init bfin_gptmr0_init(void)</div><div class='hunk'>@@ -197,7 +215,7 @@ static struct clock_event_device clockevent_gptmr0 = {</div><div class='ctx'> 	.rating		= 300,</div><div class='ctx'> 	.irq		= IRQ_TIMER0,</div><div class='ctx'> 	.shift		= 32,</div><div class='del'>-	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,</div><div class='add'>+	.features 	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,</div><div class='ctx'> 	.set_next_event = bfin_gptmr0_set_next_event,</div><div class='ctx'> 	.set_mode	= bfin_gptmr0_set_mode,</div><div class='ctx'> };</div><div class='hunk'>@@ -312,6 +330,11 @@ void bfin_coretmr_clockevent_init(void)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	evt-&gt;broadcast = smp_timer_broadcast;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> 	evt-&gt;name = "bfin_core_timer";</div><div class='ctx'> 	evt-&gt;rating = 350;</div><div class='ctx'> 	evt-&gt;irq = -1;</div><div class='head'>diff --git a/arch/blackfin/kernel/trace.c b/arch/blackfin/kernel/trace.c<br/>index 44bbf2f564cb..f7f7a18abca9 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/kernel/trace.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/kernel/trace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/kernel/trace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/kernel/trace.c</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> #include &lt;linux/hardirq.h&gt;</div><div class='ctx'> #include &lt;linux/thread_info.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/oom.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/kallsyms.h&gt;</div><div class='hunk'>@@ -27,8 +29,7 @@ void decode_address(char *buf, unsigned long address)</div><div class='ctx'> {</div><div class='ctx'> 	struct task_struct *p;</div><div class='ctx'> 	struct mm_struct *mm;</div><div class='del'>-	unsigned long flags, offset;</div><div class='del'>-	unsigned char in_atomic = (bfin_read_IPEND() &amp; 0x10) || in_atomic();</div><div class='add'>+	unsigned long offset;</div><div class='ctx'> 	struct rb_node *n;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KALLSYMS</div><div class='hunk'>@@ -112,17 +113,17 @@ void decode_address(char *buf, unsigned long address)</div><div class='ctx'> 	 * mappings of all our processes and see if we can't be a whee</div><div class='ctx'> 	 * bit more specific</div><div class='ctx'> 	 */</div><div class='del'>-	write_lock_irqsave(&amp;tasklist_lock, flags);</div><div class='add'>+	read_lock(&amp;tasklist_lock);</div><div class='ctx'> 	for_each_process(p) {</div><div class='del'>-		mm = (in_atomic ? p-&gt;mm : get_task_mm(p));</div><div class='del'>-		if (!mm)</div><div class='del'>-			continue;</div><div class='add'>+		struct task_struct *t;</div><div class='ctx'> </div><div class='del'>-		if (!down_read_trylock(&amp;mm-&gt;mmap_sem)) {</div><div class='del'>-			if (!in_atomic)</div><div class='del'>-				mmput(mm);</div><div class='add'>+		t = find_lock_task_mm(p);</div><div class='add'>+		if (!t)</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+		mm = t-&gt;mm;</div><div class='add'>+		if (!down_read_trylock(&amp;mm-&gt;mmap_sem))</div><div class='add'>+			goto __continue;</div><div class='ctx'> </div><div class='ctx'> 		for (n = rb_first(&amp;mm-&gt;mm_rb); n; n = rb_next(n)) {</div><div class='ctx'> 			struct vm_area_struct *vma;</div><div class='hunk'>@@ -131,7 +132,7 @@ void decode_address(char *buf, unsigned long address)</div><div class='ctx'> </div><div class='ctx'> 			if (address &gt;= vma-&gt;vm_start &amp;&amp; address &lt; vma-&gt;vm_end) {</div><div class='ctx'> 				char _tmpbuf[256];</div><div class='del'>-				char *name = p-&gt;comm;</div><div class='add'>+				char *name = t-&gt;comm;</div><div class='ctx'> 				struct file *file = vma-&gt;vm_file;</div><div class='ctx'> </div><div class='ctx'> 				if (file) {</div><div class='hunk'>@@ -164,8 +165,7 @@ void decode_address(char *buf, unsigned long address)</div><div class='ctx'> 						name, vma-&gt;vm_start, vma-&gt;vm_end);</div><div class='ctx'> </div><div class='ctx'> 				up_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-				if (!in_atomic)</div><div class='del'>-					mmput(mm);</div><div class='add'>+				task_unlock(t);</div><div class='ctx'> </div><div class='ctx'> 				if (buf[0] == '\0')</div><div class='ctx'> 					sprintf(buf, "[ %s ] dynamic memory", name);</div><div class='hunk'>@@ -175,8 +175,8 @@ void decode_address(char *buf, unsigned long address)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		up_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-		if (!in_atomic)</div><div class='del'>-			mmput(mm);</div><div class='add'>+__continue:</div><div class='add'>+		task_unlock(t);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -186,7 +186,7 @@ void decode_address(char *buf, unsigned long address)</div><div class='ctx'> 	sprintf(buf, "/* kernel dynamic memory */");</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='del'>-	write_unlock_irqrestore(&amp;tasklist_lock, flags);</div><div class='add'>+	read_unlock(&amp;tasklist_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define EXPAND_LEN ((1 &lt;&lt; CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN) * 256 - 1)</div><div class='head'>diff --git a/arch/blackfin/lib/divsi3.S b/arch/blackfin/lib/divsi3.S<br/>index f89c5a49c47b..ef2cd99efb89 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/divsi3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/divsi3.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/divsi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/divsi3.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2004-2009 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  *</div><div class='ctx'>  * 16 / 32 bit signed division.</div><div class='ctx'>  *                 Special cases :</div><div class='head'>diff --git a/arch/blackfin/lib/memchr.S b/arch/blackfin/lib/memchr.S<br/>index 542e40f8775f..bcfc8a14c3f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/memchr.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/memchr.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/memchr.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/memchr.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2005-2009 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='head'>diff --git a/arch/blackfin/lib/memcmp.S b/arch/blackfin/lib/memcmp.S<br/>index ce5b9f1a8267..2e1c9477f2f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/memcmp.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/memcmp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/memcmp.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/memcmp.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2004-2009 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='head'>diff --git a/arch/blackfin/lib/memcpy.S b/arch/blackfin/lib/memcpy.S<br/>index c31bf22aab19..53cb3698ab33 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/memcpy.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/memcpy.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/memcpy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/memcpy.S</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2004-2009 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='head'>diff --git a/arch/blackfin/lib/memmove.S b/arch/blackfin/lib/memmove.S<br/>index 4eca566237a4..e0b78208f1d6 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/memmove.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/memmove.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/memmove.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/memmove.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2005-2009 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='head'>diff --git a/arch/blackfin/lib/memset.S b/arch/blackfin/lib/memset.S<br/>index eab1bef3f5bf..cdcf9148ea20 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/memset.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/memset.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/memset.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/memset.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2004-2009 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='head'>diff --git a/arch/blackfin/lib/modsi3.S b/arch/blackfin/lib/modsi3.S<br/>index 8b0c7d4052af..f7026ce1fa0e 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/modsi3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/modsi3.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/modsi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/modsi3.S</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2004-2009 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> .global ___modsi3;</div><div class='head'>diff --git a/arch/blackfin/lib/muldi3.S b/arch/blackfin/lib/muldi3.S<br/>index 953a38a1d1d1..abf9b2a515b2 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/muldi3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/muldi3.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/muldi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/muldi3.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2008 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> .align 2</div><div class='head'>diff --git a/arch/blackfin/lib/smulsi3_highpart.S b/arch/blackfin/lib/smulsi3_highpart.S<br/>index 99ee8c5de38b..e50d6c4ac2a5 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/smulsi3_highpart.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/smulsi3_highpart.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/smulsi3_highpart.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/smulsi3_highpart.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2007 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> .align 2</div><div class='head'>diff --git a/arch/blackfin/lib/strcmp.S b/arch/blackfin/lib/strcmp.S<br/>index d7c1d158973b..9c8b9863713e 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/strcmp.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/strcmp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/strcmp.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/strcmp.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2005-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='head'>diff --git a/arch/blackfin/lib/strcpy.S b/arch/blackfin/lib/strcpy.S<br/>index a6a0c6363806..9495aa77cc40 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/strcpy.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/strcpy.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/strcpy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/strcpy.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2005-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='head'>diff --git a/arch/blackfin/lib/strncmp.S b/arch/blackfin/lib/strncmp.S<br/>index 6da37c34a847..3bfaedce893e 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/strncmp.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/strncmp.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/strncmp.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/strncmp.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2005-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='head'>diff --git a/arch/blackfin/lib/strncpy.S b/arch/blackfin/lib/strncpy.S<br/>index 2c07dddac995..92fd1823bbee 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/strncpy.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/strncpy.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/strncpy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/strncpy.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2005-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='head'>diff --git a/arch/blackfin/lib/udivsi3.S b/arch/blackfin/lib/udivsi3.S<br/>index 97e904315ec6..748a6a2e8c17 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/udivsi3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/udivsi3.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/udivsi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/udivsi3.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2004-2009 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='head'>diff --git a/arch/blackfin/lib/umodsi3.S b/arch/blackfin/lib/umodsi3.S<br/>index 168eba7c64c8..3794c00d859d 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/umodsi3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/umodsi3.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/umodsi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/umodsi3.S</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2004-2009 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARITHMETIC_OPS_L1</div><div class='head'>diff --git a/arch/blackfin/lib/umulsi3_highpart.S b/arch/blackfin/lib/umulsi3_highpart.S<br/>index 051824a6ed00..0dcace96e4e7 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/lib/umulsi3_highpart.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/lib/umulsi3_highpart.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/lib/umulsi3_highpart.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/lib/umulsi3_highpart.S</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2007 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> .align 2</div><div class='head'>diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c<br/>index a17395727efa..f8047ca3b339 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/boards/ezbrd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf518/boards/ezbrd.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/boards/ezbrd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/boards/ezbrd.c</a></div><div class='hunk'>@@ -529,6 +529,8 @@ static struct platform_device bfin_i2s = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -547,6 +549,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/mach-bf518/boards/tcm-bf518.c b/arch/blackfin/mach-bf518/boards/tcm-bf518.c<br/>index 6eebee4e4217..0bedc737566b 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/boards/tcm-bf518.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf518/boards/tcm-bf518.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/boards/tcm-bf518.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/boards/tcm-bf518.c</a></div><div class='hunk'>@@ -455,6 +455,8 @@ static struct platform_device bfin_sir1_device = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -473,6 +475,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/mach-bf518/include/mach/anomaly.h b/arch/blackfin/mach-bf518/include/mach/anomaly.h<br/>index 56383f7cbc07..845e6bc8d633 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/anomaly.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf518/include/mach/anomaly.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/anomaly.h</a></div><div class='hunk'>@@ -6,8 +6,7 @@</div><div class='ctx'>  * DO NOT EDIT THIS FILE</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2004-2011 Analog Devices Inc.</div><div class='del'>- * Licensed under the ADI BSD license.</div><div class='del'>- *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd</div><div class='add'>+ * Licensed under the Clear BSD license.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* This file should be up to date with:</div><div class='head'>diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF512.h b/arch/blackfin/mach-bf518/include/mach/cdefBF512.h<br/>index bb79627f0929..1c03ad4bcb72 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/cdefBF512.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf518/include/mach/cdefBF512.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/cdefBF512.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/cdefBF512.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2008-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _CDEF_BF512_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF514.h b/arch/blackfin/mach-bf518/include/mach/cdefBF514.h<br/>index dc988668203e..861221d1dcc9 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/cdefBF514.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf518/include/mach/cdefBF514.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/cdefBF514.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/cdefBF514.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2008-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _CDEF_BF514_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF516.h b/arch/blackfin/mach-bf518/include/mach/cdefBF516.h<br/>index 142e45cbc253..cc9bf0d378c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/cdefBF516.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf518/include/mach/cdefBF516.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/cdefBF516.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/cdefBF516.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2008-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _CDEF_BF516_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF518.h b/arch/blackfin/mach-bf518/include/mach/cdefBF518.h<br/>index e638197bf8b1..96a82fd62ef1 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/cdefBF518.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf518/include/mach/cdefBF518.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/cdefBF518.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/cdefBF518.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2008-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _CDEF_BF518_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf518/include/mach/defBF512.h b/arch/blackfin/mach-bf518/include/mach/defBF512.h<br/>index 729704078cd7..e6a017faad01 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/defBF512.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf518/include/mach/defBF512.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/defBF512.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/defBF512.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2008-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF512_H</div><div class='hunk'>@@ -1083,77 +1083,6 @@</div><div class='ctx'> #define ERR_NCOR		0x8000		/* Error Not Corrected Indicator	*/</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/*  ********************  TWO-WIRE INTERFACE (TWI) MASKS  ***********************/</div><div class='del'>-/* TWI_CLKDIV Macros (Use: *pTWI_CLKDIV = CLKLOW(x)|CLKHI(y);  )				*/</div><div class='del'>-#define	CLKLOW(x)	((x) &amp; 0xFF)		/* Periods Clock Is Held Low			*/</div><div class='del'>-#define CLKHI(y)	(((y)&amp;0xFF)&lt;&lt;0x8)	/* Periods Before New Clock Low			*/</div><div class='del'>-</div><div class='del'>-/* TWI_PRESCALE Masks															*/</div><div class='del'>-#define	PRESCALE	0x007F		/* SCLKs Per Internal Time Reference (10MHz)	*/</div><div class='del'>-#define	TWI_ENA		0x0080		/* TWI Enable									*/</div><div class='del'>-#define	SCCB		0x0200		/* SCCB Compatibility Enable					*/</div><div class='del'>-</div><div class='del'>-/* TWI_SLAVE_CTL Masks															*/</div><div class='del'>-#define	SEN			0x0001		/* Slave Enable									*/</div><div class='del'>-#define	SADD_LEN	0x0002		/* Slave Address Length							*/</div><div class='del'>-#define	STDVAL		0x0004		/* Slave Transmit Data Valid					*/</div><div class='del'>-#define	NAK			0x0008		/* NAK/ACK* Generated At Conclusion Of Transfer */</div><div class='del'>-#define	GEN			0x0010		/* General Call Adrress Matching Enabled		*/</div><div class='del'>-</div><div class='del'>-/* TWI_SLAVE_STAT Masks															*/</div><div class='del'>-#define	SDIR		0x0001		/* Slave Transfer Direction (Transmit/Receive*)	*/</div><div class='del'>-#define GCALL		0x0002		/* General Call Indicator						*/</div><div class='del'>-</div><div class='del'>-/* TWI_MASTER_CTL Masks													*/</div><div class='del'>-#define	MEN			0x0001		/* Master Mode Enable						*/</div><div class='del'>-#define	MADD_LEN	0x0002		/* Master Address Length					*/</div><div class='del'>-#define	MDIR		0x0004		/* Master Transmit Direction (RX/TX*)		*/</div><div class='del'>-#define	FAST		0x0008		/* Use Fast Mode Timing Specs				*/</div><div class='del'>-#define	STOP		0x0010		/* Issue Stop Condition						*/</div><div class='del'>-#define	RSTART		0x0020		/* Repeat Start or Stop* At End Of Transfer	*/</div><div class='del'>-#define	DCNT		0x3FC0		/* Data Bytes To Transfer					*/</div><div class='del'>-#define	SDAOVR		0x4000		/* Serial Data Override						*/</div><div class='del'>-#define	SCLOVR		0x8000		/* Serial Clock Override					*/</div><div class='del'>-</div><div class='del'>-/* TWI_MASTER_STAT Masks														*/</div><div class='del'>-#define	MPROG		0x0001		/* Master Transfer In Progress					*/</div><div class='del'>-#define	LOSTARB		0x0002		/* Lost Arbitration Indicator (Xfer Aborted)	*/</div><div class='del'>-#define	ANAK		0x0004		/* Address Not Acknowledged						*/</div><div class='del'>-#define	DNAK		0x0008		/* Data Not Acknowledged						*/</div><div class='del'>-#define	BUFRDERR	0x0010		/* Buffer Read Error							*/</div><div class='del'>-#define	BUFWRERR	0x0020		/* Buffer Write Error							*/</div><div class='del'>-#define	SDASEN		0x0040		/* Serial Data Sense							*/</div><div class='del'>-#define	SCLSEN		0x0080		/* Serial Clock Sense							*/</div><div class='del'>-#define	BUSBUSY		0x0100		/* Bus Busy Indicator							*/</div><div class='del'>-</div><div class='del'>-/* TWI_INT_SRC and TWI_INT_ENABLE Masks						*/</div><div class='del'>-#define	SINIT		0x0001		/* Slave Transfer Initiated	*/</div><div class='del'>-#define	SCOMP		0x0002		/* Slave Transfer Complete	*/</div><div class='del'>-#define	SERR		0x0004		/* Slave Transfer Error		*/</div><div class='del'>-#define	SOVF		0x0008		/* Slave Overflow			*/</div><div class='del'>-#define	MCOMP		0x0010		/* Master Transfer Complete	*/</div><div class='del'>-#define	MERR		0x0020		/* Master Transfer Error	*/</div><div class='del'>-#define	XMTSERV		0x0040		/* Transmit FIFO Service	*/</div><div class='del'>-#define	RCVSERV		0x0080		/* Receive FIFO Service		*/</div><div class='del'>-</div><div class='del'>-/* TWI_FIFO_CTRL Masks												*/</div><div class='del'>-#define	XMTFLUSH	0x0001		/* Transmit Buffer Flush			*/</div><div class='del'>-#define	RCVFLUSH	0x0002		/* Receive Buffer Flush				*/</div><div class='del'>-#define	XMTINTLEN	0x0004		/* Transmit Buffer Interrupt Length	*/</div><div class='del'>-#define	RCVINTLEN	0x0008		/* Receive Buffer Interrupt Length	*/</div><div class='del'>-</div><div class='del'>-/* TWI_FIFO_STAT Masks															*/</div><div class='del'>-#define	XMTSTAT		0x0003		/* Transmit FIFO Status							*/</div><div class='del'>-#define	XMT_EMPTY	0x0000		/* 		Transmit FIFO Empty						*/</div><div class='del'>-#define	XMT_HALF	0x0001		/* 		Transmit FIFO Has 1 Byte To Write		*/</div><div class='del'>-#define	XMT_FULL	0x0003		/* 		Transmit FIFO Full (2 Bytes To Write)	*/</div><div class='del'>-</div><div class='del'>-#define	RCVSTAT		0x000C		/* Receive FIFO Status							*/</div><div class='del'>-#define	RCV_EMPTY	0x0000		/* 		Receive FIFO Empty						*/</div><div class='del'>-#define	RCV_HALF	0x0004		/* 		Receive FIFO Has 1 Byte To Read			*/</div><div class='del'>-#define	RCV_FULL	0x000C		/* 		Receive FIFO Full (2 Bytes To Read)		*/</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /*  *******************  PIN CONTROL REGISTER MASKS  ************************/</div><div class='ctx'> /* PORT_MUX Masks															*/</div><div class='ctx'> #define	PJSE			0x0001			/* Port J SPI/SPORT Enable			*/</div><div class='head'>diff --git a/arch/blackfin/mach-bf518/include/mach/defBF514.h b/arch/blackfin/mach-bf518/include/mach/defBF514.h<br/>index cfab428e577c..97feaa629ed7 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/defBF514.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf518/include/mach/defBF514.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/defBF514.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/defBF514.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2008-2009 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF514_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf518/include/mach/defBF516.h b/arch/blackfin/mach-bf518/include/mach/defBF516.h<br/>index 22a3aa0d2629..7c79cb6a03b1 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/defBF516.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf518/include/mach/defBF516.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/defBF516.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/defBF516.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2008-2009 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF516_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf518/include/mach/defBF518.h b/arch/blackfin/mach-bf518/include/mach/defBF518.h<br/>index cb18270e55c2..12042ff13601 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/defBF518.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf518/include/mach/defBF518.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf518/include/mach/defBF518.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf518/include/mach/defBF518.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2008-2009 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF518_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf527/boards/ad7160eval.c b/arch/blackfin/mach-bf527/boards/ad7160eval.c<br/>index fad7fea1b0bf..d58f50e5aa4b 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/boards/ad7160eval.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf527/boards/ad7160eval.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/boards/ad7160eval.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/boards/ad7160eval.c</a></div><div class='hunk'>@@ -569,6 +569,8 @@ static const struct ad7160_platform_data bfin_ad7160_ts_info = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -587,6 +589,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -681,6 +686,7 @@ static struct bfin_rotary_platform_data bfin_rotary_data = {</div><div class='ctx'> 	.rotary_button_key = KEY_ENTER,</div><div class='ctx'> 	.debounce	   = 10,	/* 0..17 */</div><div class='ctx'> 	.mode		   = ROT_QUAD_ENC | ROT_DEBE,</div><div class='add'>+	.pm_wakeup	   = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource bfin_rotary_resources[] = {</div><div class='head'>diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c<br/>index 65b7fbd30e16..413d0132b66f 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/boards/cm_bf527.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf527/boards/cm_bf527.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/boards/cm_bf527.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/boards/cm_bf527.c</a></div><div class='hunk'>@@ -698,6 +698,8 @@ static struct platform_device bfin_sir1_device = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -716,6 +718,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c<br/>index 17c6a24cc076..50bda79194e5 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/boards/ezbrd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf527/boards/ezbrd.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/boards/ezbrd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/boards/ezbrd.c</a></div><div class='hunk'>@@ -576,6 +576,8 @@ static struct platform_device bfin_sir1_device = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -594,6 +596,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c<br/>index 2f9a2bd83ce4..af732eb3a687 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/boards/ezkit.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf527/boards/ezkit.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/boards/ezkit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/boards/ezkit.c</a></div><div class='hunk'>@@ -869,6 +869,8 @@ static struct platform_device bfin_sir1_device = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -887,6 +889,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1105,6 +1110,7 @@ static struct bfin_rotary_platform_data bfin_rotary_data = {</div><div class='ctx'> 	.rotary_button_key = KEY_ENTER,</div><div class='ctx'> 	.debounce	   = 10,	/* 0..17 */</div><div class='ctx'> 	.mode		   = ROT_QUAD_ENC | ROT_DEBE,</div><div class='add'>+	.pm_wakeup	   = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource bfin_rotary_resources[] = {</div><div class='head'>diff --git a/arch/blackfin/mach-bf527/boards/tll6527m.c b/arch/blackfin/mach-bf527/boards/tll6527m.c<br/>index d192c0ac941c..1509c5a8a3ff 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/boards/tll6527m.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf527/boards/tll6527m.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/boards/tll6527m.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/boards/tll6527m.c</a></div><div class='hunk'>@@ -656,6 +656,8 @@ static struct platform_device bfin_sir1_device = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -674,6 +676,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h<br/>index 688470611e15..aa14110be4c4 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/include/mach/anomaly.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf527/include/mach/anomaly.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/include/mach/anomaly.h</a></div><div class='hunk'>@@ -6,8 +6,7 @@</div><div class='ctx'>  * DO NOT EDIT THIS FILE</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2004-2011 Analog Devices Inc.</div><div class='del'>- * Licensed under the ADI BSD license.</div><div class='del'>- *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd</div><div class='add'>+ * Licensed under the Clear BSD license.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* This file should be up to date with:</div><div class='head'>diff --git a/arch/blackfin/mach-bf527/include/mach/defBF522.h b/arch/blackfin/mach-bf527/include/mach/defBF522.h<br/>index 37d353a19722..e007017cf958 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/include/mach/defBF522.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf527/include/mach/defBF522.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/include/mach/defBF522.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/include/mach/defBF522.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2007-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF522_H</div><div class='hunk'>@@ -1084,77 +1084,6 @@</div><div class='ctx'> #define ERR_NCOR		0x8000		/* Error Not Corrected Indicator	*/</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/*  ********************  TWO-WIRE INTERFACE (TWI) MASKS  ***********************/</div><div class='del'>-/* TWI_CLKDIV Macros (Use: *pTWI_CLKDIV = CLKLOW(x)|CLKHI(y);  )				*/</div><div class='del'>-#define	CLKLOW(x)	((x) &amp; 0xFF)		/* Periods Clock Is Held Low			*/</div><div class='del'>-#define CLKHI(y)	(((y)&amp;0xFF)&lt;&lt;0x8)	/* Periods Before New Clock Low			*/</div><div class='del'>-</div><div class='del'>-/* TWI_PRESCALE Masks															*/</div><div class='del'>-#define	PRESCALE	0x007F		/* SCLKs Per Internal Time Reference (10MHz)	*/</div><div class='del'>-#define	TWI_ENA		0x0080		/* TWI Enable									*/</div><div class='del'>-#define	SCCB		0x0200		/* SCCB Compatibility Enable					*/</div><div class='del'>-</div><div class='del'>-/* TWI_SLAVE_CTL Masks															*/</div><div class='del'>-#define	SEN			0x0001		/* Slave Enable									*/</div><div class='del'>-#define	SADD_LEN	0x0002		/* Slave Address Length							*/</div><div class='del'>-#define	STDVAL		0x0004		/* Slave Transmit Data Valid					*/</div><div class='del'>-#define	NAK			0x0008		/* NAK/ACK* Generated At Conclusion Of Transfer */</div><div class='del'>-#define	GEN			0x0010		/* General Call Adrress Matching Enabled		*/</div><div class='del'>-</div><div class='del'>-/* TWI_SLAVE_STAT Masks															*/</div><div class='del'>-#define	SDIR		0x0001		/* Slave Transfer Direction (Transmit/Receive*)	*/</div><div class='del'>-#define GCALL		0x0002		/* General Call Indicator						*/</div><div class='del'>-</div><div class='del'>-/* TWI_MASTER_CTL Masks													*/</div><div class='del'>-#define	MEN			0x0001		/* Master Mode Enable						*/</div><div class='del'>-#define	MADD_LEN	0x0002		/* Master Address Length					*/</div><div class='del'>-#define	MDIR		0x0004		/* Master Transmit Direction (RX/TX*)		*/</div><div class='del'>-#define	FAST		0x0008		/* Use Fast Mode Timing Specs				*/</div><div class='del'>-#define	STOP		0x0010		/* Issue Stop Condition						*/</div><div class='del'>-#define	RSTART		0x0020		/* Repeat Start or Stop* At End Of Transfer	*/</div><div class='del'>-#define	DCNT		0x3FC0		/* Data Bytes To Transfer					*/</div><div class='del'>-#define	SDAOVR		0x4000		/* Serial Data Override						*/</div><div class='del'>-#define	SCLOVR		0x8000		/* Serial Clock Override					*/</div><div class='del'>-</div><div class='del'>-/* TWI_MASTER_STAT Masks														*/</div><div class='del'>-#define	MPROG		0x0001		/* Master Transfer In Progress					*/</div><div class='del'>-#define	LOSTARB		0x0002		/* Lost Arbitration Indicator (Xfer Aborted)	*/</div><div class='del'>-#define	ANAK		0x0004		/* Address Not Acknowledged						*/</div><div class='del'>-#define	DNAK		0x0008		/* Data Not Acknowledged						*/</div><div class='del'>-#define	BUFRDERR	0x0010		/* Buffer Read Error							*/</div><div class='del'>-#define	BUFWRERR	0x0020		/* Buffer Write Error							*/</div><div class='del'>-#define	SDASEN		0x0040		/* Serial Data Sense							*/</div><div class='del'>-#define	SCLSEN		0x0080		/* Serial Clock Sense							*/</div><div class='del'>-#define	BUSBUSY		0x0100		/* Bus Busy Indicator							*/</div><div class='del'>-</div><div class='del'>-/* TWI_INT_SRC and TWI_INT_ENABLE Masks						*/</div><div class='del'>-#define	SINIT		0x0001		/* Slave Transfer Initiated	*/</div><div class='del'>-#define	SCOMP		0x0002		/* Slave Transfer Complete	*/</div><div class='del'>-#define	SERR		0x0004		/* Slave Transfer Error		*/</div><div class='del'>-#define	SOVF		0x0008		/* Slave Overflow			*/</div><div class='del'>-#define	MCOMP		0x0010		/* Master Transfer Complete	*/</div><div class='del'>-#define	MERR		0x0020		/* Master Transfer Error	*/</div><div class='del'>-#define	XMTSERV		0x0040		/* Transmit FIFO Service	*/</div><div class='del'>-#define	RCVSERV		0x0080		/* Receive FIFO Service		*/</div><div class='del'>-</div><div class='del'>-/* TWI_FIFO_CTRL Masks												*/</div><div class='del'>-#define	XMTFLUSH	0x0001		/* Transmit Buffer Flush			*/</div><div class='del'>-#define	RCVFLUSH	0x0002		/* Receive Buffer Flush				*/</div><div class='del'>-#define	XMTINTLEN	0x0004		/* Transmit Buffer Interrupt Length	*/</div><div class='del'>-#define	RCVINTLEN	0x0008		/* Receive Buffer Interrupt Length	*/</div><div class='del'>-</div><div class='del'>-/* TWI_FIFO_STAT Masks															*/</div><div class='del'>-#define	XMTSTAT		0x0003		/* Transmit FIFO Status							*/</div><div class='del'>-#define	XMT_EMPTY	0x0000		/* 		Transmit FIFO Empty						*/</div><div class='del'>-#define	XMT_HALF	0x0001		/* 		Transmit FIFO Has 1 Byte To Write		*/</div><div class='del'>-#define	XMT_FULL	0x0003		/* 		Transmit FIFO Full (2 Bytes To Write)	*/</div><div class='del'>-</div><div class='del'>-#define	RCVSTAT		0x000C		/* Receive FIFO Status							*/</div><div class='del'>-#define	RCV_EMPTY	0x0000		/* 		Receive FIFO Empty						*/</div><div class='del'>-#define	RCV_HALF	0x0004		/* 		Receive FIFO Has 1 Byte To Read			*/</div><div class='del'>-#define	RCV_FULL	0x000C		/* 		Receive FIFO Full (2 Bytes To Read)		*/</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /* Omit CAN masks from defBF534.h */</div><div class='ctx'> </div><div class='ctx'> /*  *******************  PIN CONTROL REGISTER MASKS  ************************/</div><div class='head'>diff --git a/arch/blackfin/mach-bf527/include/mach/defBF525.h b/arch/blackfin/mach-bf527/include/mach/defBF525.h<br/>index aab80bb1a683..71578d964d00 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/include/mach/defBF525.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf527/include/mach/defBF525.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/include/mach/defBF525.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/include/mach/defBF525.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2007-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF525_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf527/include/mach/defBF527.h b/arch/blackfin/mach-bf527/include/mach/defBF527.h<br/>index 05369a92fbc8..aeb84795b35e 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/include/mach/defBF527.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf527/include/mach/defBF527.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf527/include/mach/defBF527.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf527/include/mach/defBF527.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2007-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF527_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf533/include/mach/anomaly.h b/arch/blackfin/mach-bf533/include/mach/anomaly.h<br/>index 03f2b40912a3..3a8f73a669f0 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf533/include/mach/anomaly.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf533/include/mach/anomaly.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf533/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf533/include/mach/anomaly.h</a></div><div class='hunk'>@@ -6,8 +6,7 @@</div><div class='ctx'>  * DO NOT EDIT THIS FILE</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2004-2011 Analog Devices Inc.</div><div class='del'>- * Licensed under the ADI BSD license.</div><div class='del'>- *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd</div><div class='add'>+ * Licensed under the Clear BSD license.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* This file should be up to date with:</div><div class='head'>diff --git a/arch/blackfin/mach-bf533/include/mach/defBF532.h b/arch/blackfin/mach-bf533/include/mach/defBF532.h<br/>index 2376d5393511..d438150b1025 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf533/include/mach/defBF532.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf533/include/mach/defBF532.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf533/include/mach/defBF532.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf533/include/mach/defBF532.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2005-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF532_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c<br/>index 27fd2c32ae9a..9408ab56d87f 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/boards/cm_bf537e.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf537/boards/cm_bf537e.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/boards/cm_bf537e.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/boards/cm_bf537e.c</a></div><div class='hunk'>@@ -486,6 +486,8 @@ static struct platform_device bfin_sir1_device = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -504,6 +506,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537u.c b/arch/blackfin/mach-bf537/boards/cm_bf537u.c<br/>index 3f3abad86ec3..0143d8bef909 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/boards/cm_bf537u.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf537/boards/cm_bf537u.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/boards/cm_bf537u.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/boards/cm_bf537u.c</a></div><div class='hunk'>@@ -451,6 +451,8 @@ static struct platform_device bfin_sir1_device = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -469,6 +471,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/mach-bf537/boards/dnp5370.c b/arch/blackfin/mach-bf537/boards/dnp5370.c<br/>index 6f77bf708ec0..8bbf0a23fd49 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/boards/dnp5370.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf537/boards/dnp5370.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/boards/dnp5370.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/boards/dnp5370.c</a></div><div class='hunk'>@@ -329,6 +329,8 @@ static struct platform_device bfin_uart1_device = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -347,6 +349,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id            = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource      = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c<br/>index d2d71282618f..a10f90e444bc 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/boards/minotaur.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf537/boards/minotaur.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/boards/minotaur.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/boards/minotaur.c</a></div><div class='hunk'>@@ -386,6 +386,8 @@ static struct platform_device bfin_sir1_device = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -404,6 +406,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c<br/>index f3562b0922af..c9d9473a5ab2 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/boards/stamp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf537/boards/stamp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/boards/stamp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/boards/stamp.c</a></div><div class='hunk'>@@ -1790,6 +1790,8 @@ static struct platform_device bfin_sir1_device = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -1808,6 +1810,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -2361,7 +2366,13 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='del'>-</div><div class='add'>+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) \</div><div class='add'>+|| defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)</div><div class='add'>+unsigned short bfin_sport0_peripherals[] = {</div><div class='add'>+	P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,</div><div class='add'>+	P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='ctx'> #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)</div><div class='ctx'> #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART</div><div class='ctx'> static struct resource bfin_sport0_uart_resources[] = {</div><div class='hunk'>@@ -2382,11 +2393,6 @@ static struct resource bfin_sport0_uart_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static unsigned short bfin_sport0_peripherals[] = {</div><div class='del'>-	P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,</div><div class='del'>-	P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct platform_device bfin_sport0_uart_device = {</div><div class='ctx'> 	.name = "bfin-sport-uart",</div><div class='ctx'> 	.id = 0,</div><div class='hunk'>@@ -2432,7 +2438,49 @@ static struct platform_device bfin_sport1_uart_device = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='add'>+#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)</div><div class='add'>+static struct resource bfin_sport0_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = SPORT0_TCR1,</div><div class='add'>+		.end = SPORT0_MRCS3+4,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_SPORT0_RX,</div><div class='add'>+		.end = IRQ_SPORT0_RX+1,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_SPORT0_TX,</div><div class='add'>+		.end = IRQ_SPORT0_TX+1,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_SPORT0_ERROR,</div><div class='add'>+		.end = IRQ_SPORT0_ERROR,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_SPORT0_TX,</div><div class='add'>+		.end = CH_SPORT0_TX,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_SPORT0_RX,</div><div class='add'>+		.end = CH_SPORT0_RX,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+static struct platform_device bfin_sport0_device = {</div><div class='add'>+	.name = "bfin_sport_raw",</div><div class='add'>+	.id = 0,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_sport0_resources),</div><div class='add'>+	.resource = bfin_sport0_resources,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_sport0_peripherals, /* Passed to driver */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='ctx'> #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)</div><div class='ctx'> #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE</div><div class='ctx'> /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */</div><div class='hunk'>@@ -2754,7 +2802,9 @@ static struct platform_device bf5xx_adau1701_device = {</div><div class='ctx'> static struct platform_device *stamp_devices[] __initdata = {</div><div class='ctx'> </div><div class='ctx'> 	&amp;bfin_dpmc,</div><div class='del'>-</div><div class='add'>+#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)</div><div class='add'>+	&amp;bfin_sport0_device,</div><div class='add'>+#endif</div><div class='ctx'> #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)</div><div class='ctx'> 	&amp;bfin_pcmcia_cf_device,</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c<br/>index 3fb421823857..e285c3675286 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/boards/tcm_bf537.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf537/boards/tcm_bf537.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/boards/tcm_bf537.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/boards/tcm_bf537.c</a></div><div class='hunk'>@@ -453,6 +453,8 @@ static struct platform_device bfin_sir1_device = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -471,6 +473,9 @@ static struct platform_device i2c_bfin_twi_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h<br/>index 543cd3fb305e..df9212696397 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/include/mach/anomaly.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf537/include/mach/anomaly.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/include/mach/anomaly.h</a></div><div class='hunk'>@@ -6,8 +6,7 @@</div><div class='ctx'>  * DO NOT EDIT THIS FILE</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2004-2011 Analog Devices Inc.</div><div class='del'>- * Licensed under the ADI BSD license.</div><div class='del'>- *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd</div><div class='add'>+ * Licensed under the Clear BSD license.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* This file should be up to date with:</div><div class='head'>diff --git a/arch/blackfin/mach-bf537/include/mach/defBF534.h b/arch/blackfin/mach-bf537/include/mach/defBF534.h<br/>index 4a031dde173f..ef6a98cdfd44 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/include/mach/defBF534.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf537/include/mach/defBF534.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/include/mach/defBF534.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/include/mach/defBF534.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2005-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF534_H</div><div class='hunk'>@@ -1403,75 +1403,6 @@</div><div class='ctx'> #define ERR_DET			0x4000	/* Error Detected Indicator                     */</div><div class='ctx'> #define ERR_NCOR		0x8000	/* Error Not Corrected Indicator        */</div><div class='ctx'> </div><div class='del'>-/*  ********************  TWO-WIRE INTERFACE (TWI) MASKS  ***********************/</div><div class='del'>-/* TWI_CLKDIV Macros (Use: *pTWI_CLKDIV = CLKLOW(x)|CLKHI(y);  )				*/</div><div class='del'>-#define	CLKLOW(x)	((x) &amp; 0xFF)	/* Periods Clock Is Held Low                    */</div><div class='del'>-#define CLKHI(y)	(((y)&amp;0xFF)&lt;&lt;0x8)	/* Periods Before New Clock Low                 */</div><div class='del'>-</div><div class='del'>-/* TWI_PRESCALE Masks															*/</div><div class='del'>-#define	PRESCALE	0x007F	/* SCLKs Per Internal Time Reference (10MHz)    */</div><div class='del'>-#define	TWI_ENA		0x0080	/* TWI Enable                                                                   */</div><div class='del'>-#define	SCCB		0x0200	/* SCCB Compatibility Enable                                    */</div><div class='del'>-</div><div class='del'>-/* TWI_SLAVE_CTL Masks															*/</div><div class='del'>-#define	SEN			0x0001	/* Slave Enable                                                                 */</div><div class='del'>-#define	SADD_LEN	0x0002	/* Slave Address Length                                                 */</div><div class='del'>-#define	STDVAL		0x0004	/* Slave Transmit Data Valid                                    */</div><div class='del'>-#define	NAK			0x0008	/* NAK/ACK* Generated At Conclusion Of Transfer */</div><div class='del'>-#define	GEN			0x0010	/* General Call Address Matching Enabled                */</div><div class='del'>-</div><div class='del'>-/* TWI_SLAVE_STAT Masks															*/</div><div class='del'>-#define	SDIR		0x0001	/* Slave Transfer Direction (Transmit/Receive*) */</div><div class='del'>-#define GCALL		0x0002	/* General Call Indicator                                               */</div><div class='del'>-</div><div class='del'>-/* TWI_MASTER_CTL Masks													*/</div><div class='del'>-#define	MEN			0x0001	/* Master Mode Enable                                           */</div><div class='del'>-#define	MADD_LEN	0x0002	/* Master Address Length                                        */</div><div class='del'>-#define	MDIR		0x0004	/* Master Transmit Direction (RX/TX*)           */</div><div class='del'>-#define	FAST		0x0008	/* Use Fast Mode Timing Specs                           */</div><div class='del'>-#define	STOP		0x0010	/* Issue Stop Condition                                         */</div><div class='del'>-#define	RSTART		0x0020	/* Repeat Start or Stop* At End Of Transfer     */</div><div class='del'>-#define	DCNT		0x3FC0	/* Data Bytes To Transfer                                       */</div><div class='del'>-#define	SDAOVR		0x4000	/* Serial Data Override                                         */</div><div class='del'>-#define	SCLOVR		0x8000	/* Serial Clock Override                                        */</div><div class='del'>-</div><div class='del'>-/* TWI_MASTER_STAT Masks														*/</div><div class='del'>-#define	MPROG		0x0001	/* Master Transfer In Progress                                  */</div><div class='del'>-#define	LOSTARB		0x0002	/* Lost Arbitration Indicator (Xfer Aborted)    */</div><div class='del'>-#define	ANAK		0x0004	/* Address Not Acknowledged                                             */</div><div class='del'>-#define	DNAK		0x0008	/* Data Not Acknowledged                                                */</div><div class='del'>-#define	BUFRDERR	0x0010	/* Buffer Read Error                                                    */</div><div class='del'>-#define	BUFWRERR	0x0020	/* Buffer Write Error                                                   */</div><div class='del'>-#define	SDASEN		0x0040	/* Serial Data Sense                                                    */</div><div class='del'>-#define	SCLSEN		0x0080	/* Serial Clock Sense                                                   */</div><div class='del'>-#define	BUSBUSY		0x0100	/* Bus Busy Indicator                                                   */</div><div class='del'>-</div><div class='del'>-/* TWI_INT_SRC and TWI_INT_ENABLE Masks						*/</div><div class='del'>-#define	SINIT		0x0001	/* Slave Transfer Initiated     */</div><div class='del'>-#define	SCOMP		0x0002	/* Slave Transfer Complete      */</div><div class='del'>-#define	SERR		0x0004	/* Slave Transfer Error         */</div><div class='del'>-#define	SOVF		0x0008	/* Slave Overflow                       */</div><div class='del'>-#define	MCOMP		0x0010	/* Master Transfer Complete     */</div><div class='del'>-#define	MERR		0x0020	/* Master Transfer Error        */</div><div class='del'>-#define	XMTSERV		0x0040	/* Transmit FIFO Service        */</div><div class='del'>-#define	RCVSERV		0x0080	/* Receive FIFO Service         */</div><div class='del'>-</div><div class='del'>-/* TWI_FIFO_CTRL Masks												*/</div><div class='del'>-#define	XMTFLUSH	0x0001	/* Transmit Buffer Flush                        */</div><div class='del'>-#define	RCVFLUSH	0x0002	/* Receive Buffer Flush                         */</div><div class='del'>-#define	XMTINTLEN	0x0004	/* Transmit Buffer Interrupt Length     */</div><div class='del'>-#define	RCVINTLEN	0x0008	/* Receive Buffer Interrupt Length      */</div><div class='del'>-</div><div class='del'>-/* TWI_FIFO_STAT Masks															*/</div><div class='del'>-#define	XMTSTAT		0x0003	/* Transmit FIFO Status                                                 */</div><div class='del'>-#define	XMT_EMPTY	0x0000	/*              Transmit FIFO Empty                                             */</div><div class='del'>-#define	XMT_HALF	0x0001	/*              Transmit FIFO Has 1 Byte To Write               */</div><div class='del'>-#define	XMT_FULL	0x0003	/*              Transmit FIFO Full (2 Bytes To Write)   */</div><div class='del'>-</div><div class='del'>-#define	RCVSTAT		0x000C	/* Receive FIFO Status                                                  */</div><div class='del'>-#define	RCV_EMPTY	0x0000	/*              Receive FIFO Empty                                              */</div><div class='del'>-#define	RCV_HALF	0x0004	/*              Receive FIFO Has 1 Byte To Read                 */</div><div class='del'>-#define	RCV_FULL	0x000C	/*              Receive FIFO Full (2 Bytes To Read)             */</div><div class='ctx'> </div><div class='ctx'> /*  *******************  PIN CONTROL REGISTER MASKS  ************************/</div><div class='ctx'> /* PORT_MUX Masks															*/</div><div class='head'>diff --git a/arch/blackfin/mach-bf537/include/mach/defBF537.h b/arch/blackfin/mach-bf537/include/mach/defBF537.h<br/>index 3d471d752684..e10332c9f660 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/include/mach/defBF537.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf537/include/mach/defBF537.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf537/include/mach/defBF537.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf537/include/mach/defBF537.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2005-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF537_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf538/boards/ezkit.c b/arch/blackfin/mach-bf538/boards/ezkit.c<br/>index 85038f54354d..a4fce0370c1d 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf538/boards/ezkit.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf538/boards/ezkit.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf538/boards/ezkit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf538/boards/ezkit.c</a></div><div class='hunk'>@@ -718,6 +718,8 @@ static struct platform_device bf538_spi_master2 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -736,9 +738,13 @@ static struct platform_device i2c_bfin_twi0_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#if !defined(CONFIG_BF542)	/* The BF542 only has 1 TWI */</div><div class='add'>+static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi1_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI1_REGBASE,</div><div class='head'>diff --git a/arch/blackfin/mach-bf538/include/mach/anomaly.h b/arch/blackfin/mach-bf538/include/mach/anomaly.h<br/>index b6ca99788710..318d922d11d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf538/include/mach/anomaly.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf538/include/mach/anomaly.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf538/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf538/include/mach/anomaly.h</a></div><div class='hunk'>@@ -6,8 +6,7 @@</div><div class='ctx'>  * DO NOT EDIT THIS FILE</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2004-2011 Analog Devices Inc.</div><div class='del'>- * Licensed under the ADI BSD license.</div><div class='del'>- *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd</div><div class='add'>+ * Licensed under the Clear BSD license.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* This file should be up to date with:</div><div class='head'>diff --git a/arch/blackfin/mach-bf538/include/mach/defBF538.h b/arch/blackfin/mach-bf538/include/mach/defBF538.h<br/>index d27f81d6c4b1..876a77028001 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf538/include/mach/defBF538.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf538/include/mach/defBF538.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf538/include/mach/defBF538.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf538/include/mach/defBF538.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2008-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF538_H</div><div class='hunk'>@@ -1746,80 +1746,4 @@</div><div class='ctx'> #define	SDEASE			0x00000010 /* SDRAM EAB	sticky error status - W1C */</div><div class='ctx'> #define	BGSTAT			0x00000020 /* Bus granted */</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*  ********************  TWO-WIRE INTERFACE (TWIx) MASKS  ***********************/</div><div class='del'>-/* TWIx_CLKDIV Macros (Use: *pTWIx_CLKDIV = CLKLOW(x)|CLKHI(y);	 ) */</div><div class='del'>-#ifdef _MISRA_RULES</div><div class='del'>-#define	CLKLOW(x)	((x) &amp; 0xFFu)		/* Periods Clock Is Held Low */</div><div class='del'>-#define	CLKHI(y)	(((y)&amp;0xFFu)&lt;&lt;0x8)	/* Periods Before New Clock Low */</div><div class='del'>-#else</div><div class='del'>-#define	CLKLOW(x)	((x) &amp; 0xFF)		/* Periods Clock Is Held Low */</div><div class='del'>-#define	CLKHI(y)	(((y)&amp;0xFF)&lt;&lt;0x8)	/* Periods Before New Clock Low */</div><div class='del'>-#endif /* _MISRA_RULES */</div><div class='del'>-</div><div class='del'>-/* TWIx_PRESCALE Masks								 */</div><div class='del'>-#define	PRESCALE	0x007F		/* SCLKs Per Internal Time Reference (10MHz) */</div><div class='del'>-#define	TWI_ENA		0x0080		/* TWI Enable		 */</div><div class='del'>-#define	SCCB		0x0200		/* SCCB	Compatibility Enable */</div><div class='del'>-</div><div class='del'>-/* TWIx_SLAVE_CTRL Masks								 */</div><div class='del'>-#define	SEN			0x0001		/* Slave Enable		 */</div><div class='del'>-#define	SADD_LEN	0x0002		/* Slave Address Length */</div><div class='del'>-#define	STDVAL		0x0004		/* Slave Transmit Data Valid */</div><div class='del'>-#define	NAK			0x0008		/* NAK/ACK* Generated At Conclusion Of Transfer */</div><div class='del'>-#define	GEN			0x0010		/* General Call	Adrress	Matching Enabled */</div><div class='del'>-</div><div class='del'>-/* TWIx_SLAVE_STAT Masks								 */</div><div class='del'>-#define	SDIR		0x0001		/* Slave Transfer Direction (Transmit/Receive*) */</div><div class='del'>-#define	GCALL		0x0002		/* General Call	Indicator */</div><div class='del'>-</div><div class='del'>-/* TWIx_MASTER_CTRL Masks						 */</div><div class='del'>-#define	MEN			0x0001		/* Master Mode Enable */</div><div class='del'>-#define	MADD_LEN	0x0002		/* Master Address Length */</div><div class='del'>-#define	MDIR		0x0004		/* Master Transmit Direction (RX/TX*) */</div><div class='del'>-#define	FAST		0x0008		/* Use Fast Mode Timing	Specs */</div><div class='del'>-#define	STOP		0x0010		/* Issue Stop Condition */</div><div class='del'>-#define	RSTART		0x0020		/* Repeat Start	or Stop* At End	Of Transfer */</div><div class='del'>-#define	DCNT		0x3FC0		/* Data	Bytes To Transfer */</div><div class='del'>-#define	SDAOVR		0x4000		/* Serial Data Override */</div><div class='del'>-#define	SCLOVR		0x8000		/* Serial Clock	Override */</div><div class='del'>-</div><div class='del'>-/* TWIx_MASTER_STAT Masks							 */</div><div class='del'>-#define	MPROG		0x0001		/* Master Transfer In Progress */</div><div class='del'>-#define	LOSTARB		0x0002		/* Lost	Arbitration Indicator (Xfer Aborted) */</div><div class='del'>-#define	ANAK		0x0004		/* Address Not Acknowledged */</div><div class='del'>-#define	DNAK		0x0008		/* Data	Not Acknowledged */</div><div class='del'>-#define	BUFRDERR	0x0010		/* Buffer Read Error */</div><div class='del'>-#define	BUFWRERR	0x0020		/* Buffer Write	Error */</div><div class='del'>-#define	SDASEN		0x0040		/* Serial Data Sense */</div><div class='del'>-#define	SCLSEN		0x0080		/* Serial Clock	Sense */</div><div class='del'>-#define	BUSBUSY		0x0100		/* Bus Busy Indicator */</div><div class='del'>-</div><div class='del'>-/* TWIx_INT_SRC	and TWIx_INT_ENABLE Masks */</div><div class='del'>-#define	SINIT		0x0001		/* Slave Transfer Initiated */</div><div class='del'>-#define	SCOMP		0x0002		/* Slave Transfer Complete */</div><div class='del'>-#define	SERR		0x0004		/* Slave Transfer Error */</div><div class='del'>-#define	SOVF		0x0008		/* Slave Overflow */</div><div class='del'>-#define	MCOMP		0x0010		/* Master Transfer Complete */</div><div class='del'>-#define	MERR		0x0020		/* Master Transfer Error */</div><div class='del'>-#define	XMTSERV		0x0040		/* Transmit FIFO Service */</div><div class='del'>-#define	RCVSERV		0x0080		/* Receive FIFO	Service */</div><div class='del'>-</div><div class='del'>-/* TWIx_FIFO_CTL Masks					 */</div><div class='del'>-#define	XMTFLUSH	0x0001		/* Transmit Buffer Flush */</div><div class='del'>-#define	RCVFLUSH	0x0002		/* Receive Buffer Flush */</div><div class='del'>-#define	XMTINTLEN	0x0004		/* Transmit Buffer Interrupt Length */</div><div class='del'>-#define	RCVINTLEN	0x0008		/* Receive Buffer Interrupt Length */</div><div class='del'>-</div><div class='del'>-/* TWIx_FIFO_STAT Masks								 */</div><div class='del'>-#define	XMTSTAT		0x0003		/* Transmit FIFO Status */</div><div class='del'>-#define	XMT_EMPTY	0x0000		/*		Transmit FIFO Empty */</div><div class='del'>-#define	XMT_HALF	0x0001		/*		Transmit FIFO Has 1 Byte To Write */</div><div class='del'>-#define	XMT_FULL	0x0003		/*		Transmit FIFO Full (2 Bytes To Write) */</div><div class='del'>-</div><div class='del'>-#define	RCVSTAT		0x000C		/* Receive FIFO	Status */</div><div class='del'>-#define	RCV_EMPTY	0x0000		/*		Receive	FIFO Empty */</div><div class='del'>-#define	RCV_HALF	0x0004		/*		Receive	FIFO Has 1 Byte	To Read */</div><div class='del'>-#define	RCV_FULL	0x000C		/*		Receive	FIFO Full (2 Bytes To Read) */</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h<br/>index 8100bcd01a0d..199e871634b4 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf538/include/mach/defBF539.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf538/include/mach/defBF539.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf538/include/mach/defBF539.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf538/include/mach/defBF539.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2008-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF539_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c<br/>index 68af594db48e..e92543362f35 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/boards/cm_bf548.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf548/boards/cm_bf548.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/boards/cm_bf548.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/boards/cm_bf548.c</a></div><div class='hunk'>@@ -1007,6 +1007,8 @@ static struct platform_device bf54x_spi_master1 = {</div><div class='ctx'> #endif  /* spi master and devices */</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -1025,9 +1027,14 @@ static struct platform_device i2c_bfin_twi0_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #if !defined(CONFIG_BF542)	/* The BF542 only has 1 TWI */</div><div class='add'>+static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi1_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI1_REGBASE,</div><div class='hunk'>@@ -1046,6 +1053,9 @@ static struct platform_device i2c_bfin_twi1_device = {</div><div class='ctx'> 	.id = 1,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi1_resource),</div><div class='ctx'> 	.resource = bfin_twi1_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi1_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c<br/>index 4cadaf8d0b56..3bd75bae750d 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/boards/ezkit.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf548/boards/ezkit.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/boards/ezkit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/boards/ezkit.c</a></div><div class='hunk'>@@ -165,6 +165,7 @@ static struct bfin_rotary_platform_data bfin_rotary_data = {</div><div class='ctx'> 	.rotary_button_key = KEY_ENTER,</div><div class='ctx'> 	.debounce	   = 10,	/* 0..17 */</div><div class='ctx'> 	.mode		   = ROT_QUAD_ENC | ROT_DEBE,</div><div class='add'>+	.pm_wakeup	   = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource bfin_rotary_resources[] = {</div><div class='hunk'>@@ -1251,6 +1252,8 @@ static struct platform_device bfin_capture_device = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi0_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI0_REGBASE,</div><div class='hunk'>@@ -1269,9 +1272,14 @@ static struct platform_device i2c_bfin_twi0_device = {</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='ctx'> 	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #if !defined(CONFIG_BF542)	/* The BF542 only has 1 TWI */</div><div class='add'>+static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};</div><div class='add'>+</div><div class='ctx'> static struct resource bfin_twi1_resource[] = {</div><div class='ctx'> 	[0] = {</div><div class='ctx'> 		.start = TWI1_REGBASE,</div><div class='hunk'>@@ -1290,6 +1298,9 @@ static struct platform_device i2c_bfin_twi1_device = {</div><div class='ctx'> 	.id = 1,</div><div class='ctx'> 	.num_resources = ARRAY_SIZE(bfin_twi1_resource),</div><div class='ctx'> 	.resource = bfin_twi1_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi1_pins,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h<br/>index ac96ee83b00e..5b711d85b90b 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/anomaly.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf548/include/mach/anomaly.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/anomaly.h</a></div><div class='hunk'>@@ -6,8 +6,7 @@</div><div class='ctx'>  * DO NOT EDIT THIS FILE</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2004-2011 Analog Devices Inc.</div><div class='del'>- * Licensed under the ADI BSD license.</div><div class='del'>- *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd</div><div class='add'>+ * Licensed under the Clear BSD license.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* This file should be up to date with:</div><div class='head'>diff --git a/arch/blackfin/mach-bf548/include/mach/defBF542.h b/arch/blackfin/mach-bf548/include/mach/defBF542.h<br/>index 629bf216e2b5..51161575a163 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/defBF542.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf548/include/mach/defBF542.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/defBF542.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/defBF542.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2007-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF542_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf548/include/mach/defBF544.h b/arch/blackfin/mach-bf548/include/mach/defBF544.h<br/>index bcccab36629c..329b2c58228b 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/defBF544.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf548/include/mach/defBF544.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/defBF544.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/defBF544.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2007-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF544_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf548/include/mach/defBF547.h b/arch/blackfin/mach-bf548/include/mach/defBF547.h<br/>index 1fa41ec03f31..e18de212ba1a 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/defBF547.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf548/include/mach/defBF547.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/defBF547.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/defBF547.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2008-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF547_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf548/include/mach/defBF548.h b/arch/blackfin/mach-bf548/include/mach/defBF548.h<br/>index 3c7f1b69349e..27f29481e283 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/defBF548.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf548/include/mach/defBF548.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/defBF548.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/defBF548.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2007-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF548_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf548/include/mach/defBF549.h b/arch/blackfin/mach-bf548/include/mach/defBF549.h<br/>index 9a45cb6b30da..ac569fc12972 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/defBF549.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf548/include/mach/defBF549.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/defBF549.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/defBF549.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2007-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF549_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h<br/>index 0867c2bedb43..8f6e1925779d 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf548/include/mach/defBF54x_base.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf548/include/mach/defBF54x_base.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2007-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF54X_H</div><div class='hunk'>@@ -2062,115 +2062,6 @@</div><div class='ctx'> #define                  LOW_EVEN  0xff0000   /* Lower Limit for Even Bytes (Luma) */</div><div class='ctx'> #define                 HIGH_EVEN  0xff000000 /* Upper Limit for Even Bytes (Luma) */</div><div class='ctx'> </div><div class='del'>-/* ************************************************ */</div><div class='del'>-/* The TWI bit masks fields are from the ADSP-BF538 */</div><div class='del'>-/* and they have not been verified as the final     */</div><div class='del'>-/* ones for the Moab processors ... bz 1/19/2007    */</div><div class='del'>-/* ************************************************ */</div><div class='del'>-</div><div class='del'>-/* Bit masks for TWIx_CONTROL */</div><div class='del'>-</div><div class='del'>-#define                  PRESCALE  0x7f       /* Prescale Value */</div><div class='del'>-#define                   TWI_ENA  0x80       /* TWI Enable */</div><div class='del'>-#define                      SCCB  0x200      /* Serial Camera Control Bus */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_CLKDIV */</div><div class='del'>-</div><div class='del'>-#define                    CLKLOW  0xff       /* Clock Low */</div><div class='del'>-#define                     CLKHI  0xff00     /* Clock High */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_SLAVE_CTL */</div><div class='del'>-</div><div class='del'>-#define                       SEN  0x1        /* Slave Enable */</div><div class='del'>-#define                    STDVAL  0x4        /* Slave Transmit Data Valid */</div><div class='del'>-#define                       NAK  0x8        /* Not Acknowledge */</div><div class='del'>-#define                       GEN  0x10       /* General Call Enable */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_SLAVE_ADDR */</div><div class='del'>-</div><div class='del'>-#define                     SADDR  0x7f       /* Slave Mode Address */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_SLAVE_STAT */</div><div class='del'>-</div><div class='del'>-#define                      SDIR  0x1        /* Slave Transfer Direction */</div><div class='del'>-#define                     GCALL  0x2        /* General Call */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_MASTER_CTL */</div><div class='del'>-</div><div class='del'>-#define                       MEN  0x1        /* Master Mode Enable */</div><div class='del'>-#define                      MDIR  0x4        /* Master Transfer Direction */</div><div class='del'>-#define                      FAST  0x8        /* Fast Mode */</div><div class='del'>-#define                      STOP  0x10       /* Issue Stop Condition */</div><div class='del'>-#define                    RSTART  0x20       /* Repeat Start */</div><div class='del'>-#define                      DCNT  0x3fc0     /* Data Transfer Count */</div><div class='del'>-#define                    SDAOVR  0x4000     /* Serial Data Override */</div><div class='del'>-#define                    SCLOVR  0x8000     /* Serial Clock Override */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_MASTER_ADDR */</div><div class='del'>-</div><div class='del'>-#define                     MADDR  0x7f       /* Master Mode Address */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_MASTER_STAT */</div><div class='del'>-</div><div class='del'>-#define                     MPROG  0x1        /* Master Transfer in Progress */</div><div class='del'>-#define                   LOSTARB  0x2        /* Lost Arbitration */</div><div class='del'>-#define                      ANAK  0x4        /* Address Not Acknowledged */</div><div class='del'>-#define                      DNAK  0x8        /* Data Not Acknowledged */</div><div class='del'>-#define                  BUFRDERR  0x10       /* Buffer Read Error */</div><div class='del'>-#define                  BUFWRERR  0x20       /* Buffer Write Error */</div><div class='del'>-#define                    SDASEN  0x40       /* Serial Data Sense */</div><div class='del'>-#define                    SCLSEN  0x80       /* Serial Clock Sense */</div><div class='del'>-#define                   BUSBUSY  0x100      /* Bus Busy */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_FIFO_CTL */</div><div class='del'>-</div><div class='del'>-#define                  XMTFLUSH  0x1        /* Transmit Buffer Flush */</div><div class='del'>-#define                  RCVFLUSH  0x2        /* Receive Buffer Flush */</div><div class='del'>-#define                 XMTINTLEN  0x4        /* Transmit Buffer Interrupt Length */</div><div class='del'>-#define                 RCVINTLEN  0x8        /* Receive Buffer Interrupt Length */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_FIFO_STAT */</div><div class='del'>-</div><div class='del'>-#define                   XMTSTAT  0x3        /* Transmit FIFO Status */</div><div class='del'>-#define                   RCVSTAT  0xc        /* Receive FIFO Status */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_INT_MASK */</div><div class='del'>-</div><div class='del'>-#define                    SINITM  0x1        /* Slave Transfer Initiated Interrupt Mask */</div><div class='del'>-#define                    SCOMPM  0x2        /* Slave Transfer Complete Interrupt Mask */</div><div class='del'>-#define                     SERRM  0x4        /* Slave Transfer Error Interrupt Mask */</div><div class='del'>-#define                     SOVFM  0x8        /* Slave Overflow Interrupt Mask */</div><div class='del'>-#define                    MCOMPM  0x10       /* Master Transfer Complete Interrupt Mask */</div><div class='del'>-#define                     MERRM  0x20       /* Master Transfer Error Interrupt Mask */</div><div class='del'>-#define                  XMTSERVM  0x40       /* Transmit FIFO Service Interrupt Mask */</div><div class='del'>-#define                  RCVSERVM  0x80       /* Receive FIFO Service Interrupt Mask */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_INT_STAT */</div><div class='del'>-</div><div class='del'>-#define                     SINIT  0x1        /* Slave Transfer Initiated */</div><div class='del'>-#define                     SCOMP  0x2        /* Slave Transfer Complete */</div><div class='del'>-#define                      SERR  0x4        /* Slave Transfer Error */</div><div class='del'>-#define                      SOVF  0x8        /* Slave Overflow */</div><div class='del'>-#define                     MCOMP  0x10       /* Master Transfer Complete */</div><div class='del'>-#define                      MERR  0x20       /* Master Transfer Error */</div><div class='del'>-#define                   XMTSERV  0x40       /* Transmit FIFO Service */</div><div class='del'>-#define                   RCVSERV  0x80       /* Receive FIFO Service */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_XMT_DATA8 */</div><div class='del'>-</div><div class='del'>-#define                  XMTDATA8  0xff       /* Transmit FIFO 8-Bit Data */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_XMT_DATA16 */</div><div class='del'>-</div><div class='del'>-#define                 XMTDATA16  0xffff     /* Transmit FIFO 16-Bit Data */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_RCV_DATA8 */</div><div class='del'>-</div><div class='del'>-#define                  RCVDATA8  0xff       /* Receive FIFO 8-Bit Data */</div><div class='del'>-</div><div class='del'>-/* Bit maskes for TWIx_RCV_DATA16 */</div><div class='del'>-</div><div class='del'>-#define                 RCVDATA16  0xffff     /* Receive FIFO 16-Bit Data */</div><div class='ctx'> </div><div class='ctx'> /* ******************************************* */</div><div class='ctx'> /*     MULTI BIT MACRO ENUMERATIONS            */</div><div class='head'>diff --git a/arch/blackfin/mach-bf561/boards/acvilon.c b/arch/blackfin/mach-bf561/boards/acvilon.c<br/>index f6ffd6f054c3..0b74218fdd3a 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf561/boards/acvilon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf561/boards/acvilon.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf561/boards/acvilon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf561/boards/acvilon.c</a></div><div class='hunk'>@@ -248,8 +248,6 @@ static struct platform_device bfin_uart0_device = {</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)</div><div class='ctx'> </div><div class='del'>-const char *part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> static struct mtd_partition bfin_plat_nand_partitions[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 	 .name = "params(nand)",</div><div class='hunk'>@@ -289,7 +287,6 @@ static struct platform_nand_data bfin_plat_nand_data = {</div><div class='ctx'> 	.chip = {</div><div class='ctx'> 		 .nr_chips = 1,</div><div class='ctx'> 		 .chip_delay = 30,</div><div class='del'>-		 .part_probe_types = part_probes,</div><div class='ctx'> 		 .partitions = bfin_plat_nand_partitions,</div><div class='ctx'> 		 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),</div><div class='ctx'> 		 },</div><div class='head'>diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h<br/>index 836baeed303a..72476ff50335 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf561/include/mach/anomaly.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf561/include/mach/anomaly.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf561/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf561/include/mach/anomaly.h</a></div><div class='hunk'>@@ -6,8 +6,7 @@</div><div class='ctx'>  * DO NOT EDIT THIS FILE</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2004-2011 Analog Devices Inc.</div><div class='del'>- * Licensed under the ADI BSD license.</div><div class='del'>- *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd</div><div class='add'>+ * Licensed under the Clear BSD license.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* This file should be up to date with:</div><div class='head'>diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h<br/>index 5f0ac5a77a37..9f21f768c63a 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-bf561/include/mach/defBF561.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-bf561/include/mach/defBF561.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf561/include/mach/defBF561.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf561/include/mach/defBF561.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright 2005-2010 Analog Devices Inc.</div><div class='ctx'>  *</div><div class='del'>- * Licensed under the ADI BSD license or the GPL-2 (or later)</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _DEF_BF561_H</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/Kconfig b/arch/blackfin/mach-bf609/Kconfig<br/>new file mode 100644<br/>index 000000000000..2cb727243778<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+config BF60x</div><div class='add'>+	def_bool y</div><div class='add'>+	depends on (BF609)</div><div class='add'>+	select IRQ_PREFLOW_FASTEOI</div><div class='add'>+</div><div class='add'>+if (BF60x)</div><div class='add'>+</div><div class='add'>+source "arch/blackfin/mach-bf609/boards/Kconfig"</div><div class='add'>+</div><div class='add'>+menu "BF609 Specific Configuration"</div><div class='add'>+</div><div class='add'>+comment "Pin Interrupt to Port Assignment"</div><div class='add'>+menu "Assignment"</div><div class='add'>+</div><div class='add'>+config PINTx_REASSIGN</div><div class='add'>+	bool "Reprogram PINT Assignment"</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  The interrupt assignment registers controls the pin-to-interrupt</div><div class='add'>+	  assignment in a byte-wide manner. Each option allows you to select</div><div class='add'>+	  a set of pins (High/Low Byte) of an specific Port being mapped</div><div class='add'>+	  to one of the four PIN Interrupts IRQ_PINTx.</div><div class='add'>+</div><div class='add'>+	  You shouldn't change any of these unless you know exactly what you're doing.</div><div class='add'>+	  Please consult the Blackfin BF60x Processor Hardware Reference Manual.</div><div class='add'>+</div><div class='add'>+config PINT0_ASSIGN</div><div class='add'>+	hex "PINT0_ASSIGN"</div><div class='add'>+	depends on PINTx_REASSIGN</div><div class='add'>+	default 0x00000101</div><div class='add'>+config PINT1_ASSIGN</div><div class='add'>+	hex "PINT1_ASSIGN"</div><div class='add'>+	depends on PINTx_REASSIGN</div><div class='add'>+	default 0x00000101</div><div class='add'>+config PINT2_ASSIGN</div><div class='add'>+	hex "PINT2_ASSIGN"</div><div class='add'>+	depends on PINTx_REASSIGN</div><div class='add'>+	default 0x00000101</div><div class='add'>+config PINT3_ASSIGN</div><div class='add'>+	hex "PINT3_ASSIGN"</div><div class='add'>+	depends on PINTx_REASSIGN</div><div class='add'>+	default 0x00000101</div><div class='add'>+config PINT4_ASSIGN</div><div class='add'>+	hex "PINT3_ASSIGN"</div><div class='add'>+	depends on PINTx_REASSIGN</div><div class='add'>+	default 0x00000101</div><div class='add'>+config PINT5_ASSIGN</div><div class='add'>+	hex "PINT3_ASSIGN"</div><div class='add'>+	depends on PINTx_REASSIGN</div><div class='add'>+	default 0x00000101</div><div class='add'>+</div><div class='add'>+endmenu</div><div class='add'>+</div><div class='add'>+endmenu</div><div class='add'>+</div><div class='add'>+endif</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/Makefile b/arch/blackfin/mach-bf609/Makefile<br/>new file mode 100644<br/>index 000000000000..2a27f8174543<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/Makefile</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+#</div><div class='add'>+# arch/blackfin/mach-bf609/Makefile</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-y := dma.o clock.o</div><div class='add'>+obj-$(CONFIG_PM) += pm.o hibernate.o</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/boards/Kconfig b/arch/blackfin/mach-bf609/boards/Kconfig<br/>new file mode 100644<br/>index 000000000000..30e8b6b0d2ed<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/boards/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/boards/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+choice</div><div class='add'>+	prompt "System type"</div><div class='add'>+	default BFIN609_EZKIT</div><div class='add'>+	help</div><div class='add'>+	  Select your board!</div><div class='add'>+</div><div class='add'>+config BFIN609_EZKIT</div><div class='add'>+	bool "BF609-EZKIT"</div><div class='add'>+	help</div><div class='add'>+	  BFIN609-EZKIT board support.</div><div class='add'>+	  </div><div class='add'>+endchoice</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/boards/Makefile b/arch/blackfin/mach-bf609/boards/Makefile<br/>new file mode 100644<br/>index 000000000000..11f98b0882ea<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/boards/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/boards/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+#</div><div class='add'>+# arch/blackfin/mach-bf609/boards/Makefile</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_BFIN609_EZKIT)            += ezkit.o</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c b/arch/blackfin/mach-bf609/boards/ezkit.c<br/>new file mode 100644<br/>index 000000000000..ac64f47217c1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/boards/ezkit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/boards/ezkit.c</a></div><div class='hunk'>@@ -0,0 +1,1340 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2004-2009 Analog Devices Inc.</div><div class='add'>+ *                2005 National ICT Australia (NICTA)</div><div class='add'>+ *                      Aidan Williams &lt;aidan@nicta.com.au&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mtd/mtd.h&gt;</div><div class='add'>+#include &lt;linux/mtd/partitions.h&gt;</div><div class='add'>+#include &lt;linux/mtd/physmap.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include &lt;linux/spi/flash.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/usb/musb.h&gt;</div><div class='add'>+#include &lt;asm/bfin6xx_spi.h&gt;</div><div class='add'>+#include &lt;asm/dma.h&gt;</div><div class='add'>+#include &lt;asm/gpio.h&gt;</div><div class='add'>+#include &lt;asm/nand.h&gt;</div><div class='add'>+#include &lt;asm/dpmc.h&gt;</div><div class='add'>+#include &lt;asm/portmux.h&gt;</div><div class='add'>+#include &lt;asm/bfin_sdh.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/spi/ad7877.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Name the Board for the /proc/cpuinfo</div><div class='add'>+ */</div><div class='add'>+const char bfin_board_name[] = "ADI BF609-EZKIT";</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *  Driver needs to know address, irq and flag pin.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)</div><div class='add'>+#include &lt;linux/usb/isp1760.h&gt;</div><div class='add'>+static struct resource bfin_isp1760_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start  = 0x2C0C0000,</div><div class='add'>+		.end    = 0x2C0C0000 + 0xfffff,</div><div class='add'>+		.flags  = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start  = IRQ_PG7,</div><div class='add'>+		.end    = IRQ_PG7,</div><div class='add'>+		.flags  = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct isp1760_platform_data isp1760_priv = {</div><div class='add'>+	.is_isp1761 = 0,</div><div class='add'>+	.bus_width_16 = 1,</div><div class='add'>+	.port1_otg = 0,</div><div class='add'>+	.analog_oc = 0,</div><div class='add'>+	.dack_polarity_high = 0,</div><div class='add'>+	.dreq_polarity_high = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_isp1760_device = {</div><div class='add'>+	.name           = "isp1760",</div><div class='add'>+	.id             = 0,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;isp1760_priv,</div><div class='add'>+	},</div><div class='add'>+	.num_resources  = ARRAY_SIZE(bfin_isp1760_resources),</div><div class='add'>+	.resource       = bfin_isp1760_resources,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)</div><div class='add'>+#include &lt;asm/bfin_rotary.h&gt;</div><div class='add'>+</div><div class='add'>+static struct bfin_rotary_platform_data bfin_rotary_data = {</div><div class='add'>+	/*.rotary_up_key     = KEY_UP,*/</div><div class='add'>+	/*.rotary_down_key   = KEY_DOWN,*/</div><div class='add'>+	.rotary_rel_code   = REL_WHEEL,</div><div class='add'>+	.rotary_button_key = KEY_ENTER,</div><div class='add'>+	.debounce	   = 10,	/* 0..17 */</div><div class='add'>+	.mode		   = ROT_QUAD_ENC | ROT_DEBE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource bfin_rotary_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_CNT,</div><div class='add'>+		.end = IRQ_CNT,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_rotary_device = {</div><div class='add'>+	.name		= "bfin-rotary",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.num_resources 	= ARRAY_SIZE(bfin_rotary_resources),</div><div class='add'>+	.resource 	= bfin_rotary_resources,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data = &amp;bfin_rotary_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)</div><div class='add'>+#include &lt;linux/stmmac.h&gt;</div><div class='add'>+</div><div class='add'>+static unsigned short pins[] = P_RMII0;</div><div class='add'>+</div><div class='add'>+static struct stmmac_mdio_bus_data phy_private_data = {</div><div class='add'>+	.bus_id = 0,</div><div class='add'>+	.phy_mask = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_stmmacenet_data eth_private_data = {</div><div class='add'>+	.bus_id   = 0,</div><div class='add'>+	.enh_desc = 1,</div><div class='add'>+	.phy_addr = 1,</div><div class='add'>+	.mdio_bus_data = &amp;phy_private_data,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_eth_device = {</div><div class='add'>+	.name           = "stmmaceth",</div><div class='add'>+	.id             = 0,</div><div class='add'>+	.num_resources  = 2,</div><div class='add'>+	.resource       = (struct resource[]) {</div><div class='add'>+		{</div><div class='add'>+			.start  = EMAC0_MACCFG,</div><div class='add'>+			.end    = EMAC0_MACCFG + 0x1274,</div><div class='add'>+			.flags  = IORESOURCE_MEM,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.name   = "macirq",</div><div class='add'>+			.start  = IRQ_EMAC0_STAT,</div><div class='add'>+			.end    = IRQ_EMAC0_STAT,</div><div class='add'>+			.flags  = IORESOURCE_IRQ,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.dev = {</div><div class='add'>+		.power.can_wakeup = 1,</div><div class='add'>+		.platform_data = &amp;eth_private_data,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)</div><div class='add'>+#include &lt;linux/input/adxl34x.h&gt;</div><div class='add'>+static const struct adxl34x_platform_data adxl34x_info = {</div><div class='add'>+	.x_axis_offset = 0,</div><div class='add'>+	.y_axis_offset = 0,</div><div class='add'>+	.z_axis_offset = 0,</div><div class='add'>+	.tap_threshold = 0x31,</div><div class='add'>+	.tap_duration = 0x10,</div><div class='add'>+	.tap_latency = 0x60,</div><div class='add'>+	.tap_window = 0xF0,</div><div class='add'>+	.tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,</div><div class='add'>+	.act_axis_control = 0xFF,</div><div class='add'>+	.activity_threshold = 5,</div><div class='add'>+	.inactivity_threshold = 3,</div><div class='add'>+	.inactivity_time = 4,</div><div class='add'>+	.free_fall_threshold = 0x7,</div><div class='add'>+	.free_fall_time = 0x20,</div><div class='add'>+	.data_rate = 0x8,</div><div class='add'>+	.data_range = ADXL_FULL_RES,</div><div class='add'>+</div><div class='add'>+	.ev_type = EV_ABS,</div><div class='add'>+	.ev_code_x = ABS_X,		/* EV_REL */</div><div class='add'>+	.ev_code_y = ABS_Y,		/* EV_REL */</div><div class='add'>+	.ev_code_z = ABS_Z,		/* EV_REL */</div><div class='add'>+</div><div class='add'>+	.ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */</div><div class='add'>+</div><div class='add'>+/*	.ev_code_ff = KEY_F,*/		/* EV_KEY */</div><div class='add'>+/*	.ev_code_act_inactivity = KEY_A,*/	/* EV_KEY */</div><div class='add'>+	.power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,</div><div class='add'>+	.fifo_mode = ADXL_FIFO_STREAM,</div><div class='add'>+	.orientation_enable = ADXL_EN_ORIENTATION_3D,</div><div class='add'>+	.deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,</div><div class='add'>+	.divisor_length = ADXL_LP_FILTER_DIVISOR_16,</div><div class='add'>+	/* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */</div><div class='add'>+	.ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)</div><div class='add'>+static struct platform_device rtc_device = {</div><div class='add'>+	.name = "rtc-bfin",</div><div class='add'>+	.id   = -1,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_UART0</div><div class='add'>+static struct resource bfin_uart0_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = UART0_REVID,</div><div class='add'>+		.end = UART0_RXDIV+4,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_UART0_TX,</div><div class='add'>+		.end = IRQ_UART0_TX,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_UART0_RX,</div><div class='add'>+		.end = IRQ_UART0_RX,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_UART0_STAT,</div><div class='add'>+		.end = IRQ_UART0_STAT,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_UART0_TX,</div><div class='add'>+		.end = CH_UART0_TX,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_UART0_RX,</div><div class='add'>+		.end = CH_UART0_RX,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+#ifdef CONFIG_BFIN_UART0_CTSRTS</div><div class='add'>+	{	/* CTS pin -- 0 means not supported */</div><div class='add'>+		.start = GPIO_PD10,</div><div class='add'>+		.end = GPIO_PD10,</div><div class='add'>+		.flags = IORESOURCE_IO,</div><div class='add'>+	},</div><div class='add'>+	{	/* RTS pin -- 0 means not supported */</div><div class='add'>+		.start = GPIO_PD9,</div><div class='add'>+		.end = GPIO_PD9,</div><div class='add'>+		.flags = IORESOURCE_IO,</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned short bfin_uart0_peripherals[] = {</div><div class='add'>+	P_UART0_TX, P_UART0_RX,</div><div class='add'>+#ifdef CONFIG_BFIN_UART0_CTSRTS</div><div class='add'>+	P_UART0_RTS, P_UART0_CTS,</div><div class='add'>+#endif</div><div class='add'>+	0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_uart0_device = {</div><div class='add'>+	.name = "bfin-uart",</div><div class='add'>+	.id = 0,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_uart0_resources),</div><div class='add'>+	.resource = bfin_uart0_resources,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_uart0_peripherals, /* Passed to driver */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_UART1</div><div class='add'>+static struct resource bfin_uart1_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = UART1_REVID,</div><div class='add'>+		.end = UART1_RXDIV+4,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_UART1_TX,</div><div class='add'>+		.end = IRQ_UART1_TX,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_UART1_RX,</div><div class='add'>+		.end = IRQ_UART1_RX,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_UART1_STAT,</div><div class='add'>+		.end = IRQ_UART1_STAT,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_UART1_TX,</div><div class='add'>+		.end = CH_UART1_TX,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_UART1_RX,</div><div class='add'>+		.end = CH_UART1_RX,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+#ifdef CONFIG_BFIN_UART1_CTSRTS</div><div class='add'>+	{	/* CTS pin -- 0 means not supported */</div><div class='add'>+		.start = GPIO_PG13,</div><div class='add'>+		.end = GPIO_PG13,</div><div class='add'>+		.flags = IORESOURCE_IO,</div><div class='add'>+	},</div><div class='add'>+	{	/* RTS pin -- 0 means not supported */</div><div class='add'>+		.start = GPIO_PG10,</div><div class='add'>+		.end = GPIO_PG10,</div><div class='add'>+		.flags = IORESOURCE_IO,</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned short bfin_uart1_peripherals[] = {</div><div class='add'>+	P_UART1_TX, P_UART1_RX,</div><div class='add'>+#ifdef CONFIG_BFIN_UART1_CTSRTS</div><div class='add'>+	P_UART1_RTS, P_UART1_CTS,</div><div class='add'>+#endif</div><div class='add'>+	0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_uart1_device = {</div><div class='add'>+	.name = "bfin-uart",</div><div class='add'>+	.id = 1,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_uart1_resources),</div><div class='add'>+	.resource = bfin_uart1_resources,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_uart1_peripherals, /* Passed to driver */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)</div><div class='add'>+#ifdef CONFIG_BFIN_SIR0</div><div class='add'>+static struct resource bfin_sir0_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = 0xFFC00400,</div><div class='add'>+		.end = 0xFFC004FF,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_UART0_TX,</div><div class='add'>+		.end = IRQ_UART0_TX+1,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_UART0_TX,</div><div class='add'>+		.end = CH_UART0_TX+1,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+static struct platform_device bfin_sir0_device = {</div><div class='add'>+	.name = "bfin_sir",</div><div class='add'>+	.id = 0,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_sir0_resources),</div><div class='add'>+	.resource = bfin_sir0_resources,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_BFIN_SIR1</div><div class='add'>+static struct resource bfin_sir1_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = 0xFFC02000,</div><div class='add'>+		.end = 0xFFC020FF,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_UART1_TX,</div><div class='add'>+		.end = IRQ_UART1_TX+1,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_UART1_TX,</div><div class='add'>+		.end = CH_UART1_TX+1,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+static struct platform_device bfin_sir1_device = {</div><div class='add'>+	.name = "bfin_sir",</div><div class='add'>+	.id = 1,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_sir1_resources),</div><div class='add'>+	.resource = bfin_sir1_resources,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)</div><div class='add'>+static struct resource musb_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xFFCC1000,</div><div class='add'>+		.end	= 0xFFCC1398,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {	/* general IRQ */</div><div class='add'>+		.start	= IRQ_USB_STAT,</div><div class='add'>+		.end	= IRQ_USB_STAT,</div><div class='add'>+		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,</div><div class='add'>+		.name	= "mc"</div><div class='add'>+	},</div><div class='add'>+	[2] = {	/* DMA IRQ */</div><div class='add'>+		.start	= IRQ_USB_DMA,</div><div class='add'>+		.end	= IRQ_USB_DMA,</div><div class='add'>+		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,</div><div class='add'>+		.name	= "dma"</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct musb_hdrc_config musb_config = {</div><div class='add'>+	.multipoint	= 1,</div><div class='add'>+	.dyn_fifo	= 0,</div><div class='add'>+	.dma		= 1,</div><div class='add'>+	.num_eps	= 16,</div><div class='add'>+	.dma_channels	= 8,</div><div class='add'>+	.clkin          = 48,           /* musb CLKIN in MHZ */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct musb_hdrc_platform_data musb_plat = {</div><div class='add'>+#if defined(CONFIG_USB_MUSB_HDRC) &amp;&amp; defined(CONFIG_USB_GADGET_MUSB_HDRC)</div><div class='add'>+	.mode		= MUSB_OTG,</div><div class='add'>+#elif defined(CONFIG_USB_MUSB_HDRC)</div><div class='add'>+	.mode		= MUSB_HOST,</div><div class='add'>+#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)</div><div class='add'>+	.mode		= MUSB_PERIPHERAL,</div><div class='add'>+#endif</div><div class='add'>+	.config		= &amp;musb_config,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u64 musb_dmamask = ~(u32)0;</div><div class='add'>+</div><div class='add'>+static struct platform_device musb_device = {</div><div class='add'>+	.name		= "musb-blackfin",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.dev = {</div><div class='add'>+		.dma_mask		= &amp;musb_dmamask,</div><div class='add'>+		.coherent_dma_mask	= 0xffffffff,</div><div class='add'>+		.platform_data		= &amp;musb_plat,</div><div class='add'>+	},</div><div class='add'>+	.num_resources	= ARRAY_SIZE(musb_resources),</div><div class='add'>+	.resource	= musb_resources,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART</div><div class='add'>+static struct resource bfin_sport0_uart_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = SPORT0_TCR1,</div><div class='add'>+		.end = SPORT0_MRCS3+4,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_SPORT0_RX,</div><div class='add'>+		.end = IRQ_SPORT0_RX+1,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_SPORT0_ERROR,</div><div class='add'>+		.end = IRQ_SPORT0_ERROR,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned short bfin_sport0_peripherals[] = {</div><div class='add'>+	P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,</div><div class='add'>+	P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_sport0_uart_device = {</div><div class='add'>+	.name = "bfin-sport-uart",</div><div class='add'>+	.id = 0,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),</div><div class='add'>+	.resource = bfin_sport0_uart_resources,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_sport0_peripherals, /* Passed to driver */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART</div><div class='add'>+static struct resource bfin_sport1_uart_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = SPORT1_TCR1,</div><div class='add'>+		.end = SPORT1_MRCS3+4,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_SPORT1_RX,</div><div class='add'>+		.end = IRQ_SPORT1_RX+1,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_SPORT1_ERROR,</div><div class='add'>+		.end = IRQ_SPORT1_ERROR,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned short bfin_sport1_peripherals[] = {</div><div class='add'>+	P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,</div><div class='add'>+	P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_sport1_uart_device = {</div><div class='add'>+	.name = "bfin-sport-uart",</div><div class='add'>+	.id = 1,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),</div><div class='add'>+	.resource = bfin_sport1_uart_resources,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_sport1_peripherals, /* Passed to driver */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART</div><div class='add'>+static struct resource bfin_sport2_uart_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = SPORT2_TCR1,</div><div class='add'>+		.end = SPORT2_MRCS3+4,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_SPORT2_RX,</div><div class='add'>+		.end = IRQ_SPORT2_RX+1,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_SPORT2_ERROR,</div><div class='add'>+		.end = IRQ_SPORT2_ERROR,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned short bfin_sport2_peripherals[] = {</div><div class='add'>+	P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,</div><div class='add'>+	P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_sport2_uart_device = {</div><div class='add'>+	.name = "bfin-sport-uart",</div><div class='add'>+	.id = 2,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),</div><div class='add'>+	.resource = bfin_sport2_uart_resources,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_sport2_peripherals, /* Passed to driver */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)</div><div class='add'>+</div><div class='add'>+static unsigned short bfin_can0_peripherals[] = {</div><div class='add'>+	P_CAN0_RX, P_CAN0_TX, 0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource bfin_can0_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = 0xFFC00A00,</div><div class='add'>+		.end = 0xFFC00FFF,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_CAN0_RX,</div><div class='add'>+		.end = IRQ_CAN0_RX,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_CAN0_TX,</div><div class='add'>+		.end = IRQ_CAN0_TX,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_CAN0_STAT,</div><div class='add'>+		.end = IRQ_CAN0_STAT,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_can0_device = {</div><div class='add'>+	.name = "bfin_can",</div><div class='add'>+	.id = 0,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_can0_resources),</div><div class='add'>+	.resource = bfin_can0_resources,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_can0_peripherals, /* Passed to driver */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)</div><div class='add'>+static struct mtd_partition partition_info[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "bootloader(nand)",</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.size = 0x80000,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "linux kernel(nand)",</div><div class='add'>+		.offset = MTDPART_OFS_APPEND,</div><div class='add'>+		.size = 4 * 1024 * 1024,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "file system(nand)",</div><div class='add'>+		.offset = MTDPART_OFS_APPEND,</div><div class='add'>+		.size = MTDPART_SIZ_FULL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct bf5xx_nand_platform bfin_nand_platform = {</div><div class='add'>+	.data_width = NFC_NWIDTH_8,</div><div class='add'>+	.partitions = partition_info,</div><div class='add'>+	.nr_partitions = ARRAY_SIZE(partition_info),</div><div class='add'>+	.rd_dly = 3,</div><div class='add'>+	.wr_dly = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource bfin_nand_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = 0xFFC03B00,</div><div class='add'>+		.end = 0xFFC03B4F,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_NFC,</div><div class='add'>+		.end = CH_NFC,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_nand_device = {</div><div class='add'>+	.name = "bfin-nand",</div><div class='add'>+	.id = 0,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_nand_resources),</div><div class='add'>+	.resource = bfin_nand_resources,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_nand_platform,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)</div><div class='add'>+</div><div class='add'>+static struct bfin_sd_host bfin_sdh_data = {</div><div class='add'>+	.dma_chan = CH_RSI,</div><div class='add'>+	.irq_int0 = IRQ_RSI_INT0,</div><div class='add'>+	.pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_sdh_device = {</div><div class='add'>+	.name = "bfin-sdh",</div><div class='add'>+	.id = 0,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_sdh_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)</div><div class='add'>+static struct mtd_partition ezkit_partitions[] = {</div><div class='add'>+	{</div><div class='add'>+		.name       = "bootloader(nor)",</div><div class='add'>+		.size       = 0x80000,</div><div class='add'>+		.offset     = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.name       = "linux kernel(nor)",</div><div class='add'>+		.size       = 0x400000,</div><div class='add'>+		.offset     = MTDPART_OFS_APPEND,</div><div class='add'>+	}, {</div><div class='add'>+		.name       = "file system(nor)",</div><div class='add'>+		.size       = 0x1000000 - 0x80000 - 0x400000,</div><div class='add'>+		.offset     = MTDPART_OFS_APPEND,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int bf609_nor_flash_init(struct platform_device *dev)</div><div class='add'>+{</div><div class='add'>+#define CONFIG_SMC_GCTL_VAL     0x00000010</div><div class='add'>+	const unsigned short pins[] = {</div><div class='add'>+		P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,</div><div class='add'>+		P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,</div><div class='add'>+		P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	peripheral_request_list(pins, "smc0");</div><div class='add'>+</div><div class='add'>+	bfin_write32(SMC_GCTL, CONFIG_SMC_GCTL_VAL);</div><div class='add'>+	bfin_write32(SMC_B0CTL, 0x01002011);</div><div class='add'>+	bfin_write32(SMC_B0TIM, 0x08170977);</div><div class='add'>+	bfin_write32(SMC_B0ETIM, 0x00092231);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct physmap_flash_data ezkit_flash_data = {</div><div class='add'>+	.width      = 2,</div><div class='add'>+	.parts      = ezkit_partitions,</div><div class='add'>+	.init 	    = bf609_nor_flash_init,</div><div class='add'>+	.nr_parts   = ARRAY_SIZE(ezkit_partitions),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource ezkit_flash_resource = {</div><div class='add'>+	.start = 0xb0000000,</div><div class='add'>+	.end   = 0xb0ffffff,</div><div class='add'>+	.flags = IORESOURCE_MEM,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device ezkit_flash_device = {</div><div class='add'>+	.name          = "physmap-flash",</div><div class='add'>+	.id            = 0,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;ezkit_flash_data,</div><div class='add'>+	},</div><div class='add'>+	.num_resources = 1,</div><div class='add'>+	.resource      = &amp;ezkit_flash_resource,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MTD_M25P80) \</div><div class='add'>+	|| defined(CONFIG_MTD_M25P80_MODULE)</div><div class='add'>+/* SPI flash chip (w25q32) */</div><div class='add'>+static struct mtd_partition bfin_spi_flash_partitions[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "bootloader(spi)",</div><div class='add'>+		.size = 0x00080000,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.mask_flags = MTD_CAP_ROM</div><div class='add'>+	}, {</div><div class='add'>+		.name = "linux kernel(spi)",</div><div class='add'>+		.size = 0x00180000,</div><div class='add'>+		.offset = MTDPART_OFS_APPEND,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "file system(spi)",</div><div class='add'>+		.size = MTDPART_SIZ_FULL,</div><div class='add'>+		.offset = MTDPART_OFS_APPEND,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct flash_platform_data bfin_spi_flash_data = {</div><div class='add'>+	.name = "m25p80",</div><div class='add'>+	.parts = bfin_spi_flash_partitions,</div><div class='add'>+	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),</div><div class='add'>+	.type = "w25q32",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct bfin6xx_spi_chip spi_flash_chip_info = {</div><div class='add'>+	.enable_dma = true,         /* use dma transfer with this chip*/</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)</div><div class='add'>+static struct bfin6xx_spi_chip spidev_chip_info = {</div><div class='add'>+	.enable_dma = true,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SND_BF6XX_I2S) || defined(CONFIG_SND_BF6XX_I2S_MODULE)</div><div class='add'>+static struct platform_device bfin_i2s_pcm = {</div><div class='add'>+	.name = "bfin-i2s-pcm-audio",</div><div class='add'>+	.id = -1,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SND_BF6XX_SOC_I2S) || \</div><div class='add'>+	defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)</div><div class='add'>+#include &lt;asm/bfin_sport3.h&gt;</div><div class='add'>+static struct resource bfin_snd_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = SPORT0_CTL_A,</div><div class='add'>+		.end = SPORT0_CTL_A,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = SPORT0_CTL_B,</div><div class='add'>+		.end = SPORT0_CTL_B,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_SPORT0_TX,</div><div class='add'>+		.end = CH_SPORT0_TX,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_SPORT0_RX,</div><div class='add'>+		.end = CH_SPORT0_RX,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_SPORT0_TX_STAT,</div><div class='add'>+		.end = IRQ_SPORT0_TX_STAT,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_SPORT0_RX_STAT,</div><div class='add'>+		.end = IRQ_SPORT0_RX_STAT,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned short bfin_snd_pin[] = {</div><div class='add'>+	P_SPORT0_ACLK, P_SPORT0_AFS, P_SPORT0_AD0, P_SPORT0_BCLK,</div><div class='add'>+	P_SPORT0_BFS, P_SPORT0_BD0, 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct bfin_snd_platform_data bfin_snd_data = {</div><div class='add'>+	.pin_req = bfin_snd_pin,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_i2s = {</div><div class='add'>+	.name = "bfin-i2s",</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_snd_resources),</div><div class='add'>+	.resource = bfin_snd_resources,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_snd_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \</div><div class='add'>+	defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)</div><div class='add'>+static struct platform_device adau1761_device = {</div><div class='add'>+	.name = "bfin-eval-adau1x61",</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)</div><div class='add'>+#include &lt;sound/adau17x1.h&gt;</div><div class='add'>+static struct adau1761_platform_data adau1761_info = {</div><div class='add'>+	.lineout_mode = ADAU1761_OUTPUT_MODE_LINE,</div><div class='add'>+	.headphone_mode = ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \</div><div class='add'>+	|| defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)</div><div class='add'>+#include &lt;linux/videodev2.h&gt;</div><div class='add'>+#include &lt;media/blackfin/bfin_capture.h&gt;</div><div class='add'>+#include &lt;media/blackfin/ppi.h&gt;</div><div class='add'>+</div><div class='add'>+static const unsigned short ppi_req[] = {</div><div class='add'>+	P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,</div><div class='add'>+	P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,</div><div class='add'>+	P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,</div><div class='add'>+	0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ppi_info ppi_info = {</div><div class='add'>+	.type = PPI_TYPE_EPPI3,</div><div class='add'>+	.dma_ch = CH_EPPI0_CH0,</div><div class='add'>+	.irq_err = IRQ_EPPI0_STAT,</div><div class='add'>+	.base = (void __iomem *)EPPI0_STAT,</div><div class='add'>+	.pin_req = ppi_req,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_VIDEO_VS6624) \</div><div class='add'>+	|| defined(CONFIG_VIDEO_VS6624_MODULE)</div><div class='add'>+static struct v4l2_input vs6624_inputs[] = {</div><div class='add'>+	{</div><div class='add'>+		.index = 0,</div><div class='add'>+		.name = "Camera",</div><div class='add'>+		.type = V4L2_INPUT_TYPE_CAMERA,</div><div class='add'>+		.std = V4L2_STD_UNKNOWN,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct bcap_route vs6624_routes[] = {</div><div class='add'>+	{</div><div class='add'>+		.input = 0,</div><div class='add'>+		.output = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned vs6624_ce_pin = GPIO_PD1;</div><div class='add'>+</div><div class='add'>+static struct bfin_capture_config bfin_capture_data = {</div><div class='add'>+	.card_name = "BF609",</div><div class='add'>+	.inputs = vs6624_inputs,</div><div class='add'>+	.num_inputs = ARRAY_SIZE(vs6624_inputs),</div><div class='add'>+	.routes = vs6624_routes,</div><div class='add'>+	.i2c_adapter_id = 0,</div><div class='add'>+	.board_info = {</div><div class='add'>+		.type = "vs6624",</div><div class='add'>+		.addr = 0x10,</div><div class='add'>+		.platform_data = (void *)&amp;vs6624_ce_pin,</div><div class='add'>+	},</div><div class='add'>+	.ppi_info = &amp;ppi_info,</div><div class='add'>+	.ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FS1HI_FS2HI</div><div class='add'>+			| EPPI_CTL_POLC3 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656),</div><div class='add'>+	.blank_clocks = 8,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_capture_device = {</div><div class='add'>+	.name = "bfin_capture",</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_capture_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_BFIN_CRC)</div><div class='add'>+#define BFIN_CRC_NAME "bfin-crc"</div><div class='add'>+</div><div class='add'>+static struct resource bfin_crc0_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = REG_CRC0_CTL,</div><div class='add'>+		.end = REG_CRC0_REVID+4,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_CRC0_DCNTEXP,</div><div class='add'>+		.end = IRQ_CRC0_DCNTEXP,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_MEM_STREAM0_SRC_CRC0,</div><div class='add'>+		.end = CH_MEM_STREAM0_SRC_CRC0,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_MEM_STREAM0_DEST_CRC0,</div><div class='add'>+		.end = CH_MEM_STREAM0_DEST_CRC0,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_crc0_device = {</div><div class='add'>+	.name = BFIN_CRC_NAME,</div><div class='add'>+	.id = 0,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_crc0_resources),</div><div class='add'>+	.resource = bfin_crc0_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource bfin_crc1_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = REG_CRC1_CTL,</div><div class='add'>+		.end = REG_CRC1_REVID+4,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = IRQ_CRC1_DCNTEXP,</div><div class='add'>+		.end = IRQ_CRC1_DCNTEXP,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_MEM_STREAM1_SRC_CRC1,</div><div class='add'>+		.end = CH_MEM_STREAM1_SRC_CRC1,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_MEM_STREAM1_DEST_CRC1,</div><div class='add'>+		.end = CH_MEM_STREAM1_DEST_CRC1,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_crc1_device = {</div><div class='add'>+	.name = BFIN_CRC_NAME,</div><div class='add'>+	.id = 1,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_crc1_resources),</div><div class='add'>+	.resource = bfin_crc1_resources,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)</div><div class='add'>+static const struct ad7877_platform_data bfin_ad7877_ts_info = {</div><div class='add'>+	.model			= 7877,</div><div class='add'>+	.vref_delay_usecs	= 50,	/* internal, no capacitor */</div><div class='add'>+	.x_plate_ohms		= 419,</div><div class='add'>+	.y_plate_ohms		= 486,</div><div class='add'>+	.pressure_max		= 1000,</div><div class='add'>+	.pressure_min		= 0,</div><div class='add'>+	.stopacq_polarity 	= 1,</div><div class='add'>+	.first_conversion_delay = 3,</div><div class='add'>+	.acquisition_time 	= 1,</div><div class='add'>+	.averaging 		= 1,</div><div class='add'>+	.pen_down_acc_interval 	= 1,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static struct spi_board_info bfin_spi_board_info[] __initdata = {</div><div class='add'>+#if defined(CONFIG_MTD_M25P80) \</div><div class='add'>+	|| defined(CONFIG_MTD_M25P80_MODULE)</div><div class='add'>+	{</div><div class='add'>+		/* the modalias must be the same as spi device driver name */</div><div class='add'>+		.modalias = "m25p80", /* Name of spi_driver for this device */</div><div class='add'>+		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */</div><div class='add'>+		.bus_num = 0, /* Framework bus number */</div><div class='add'>+		.chip_select = 1, /* SPI_SSEL1*/</div><div class='add'>+		.platform_data = &amp;bfin_spi_flash_data,</div><div class='add'>+		.controller_data = &amp;spi_flash_chip_info,</div><div class='add'>+		.mode = SPI_MODE_3,</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)</div><div class='add'>+	{</div><div class='add'>+		.modalias		= "ad7877",</div><div class='add'>+		.platform_data		= &amp;bfin_ad7877_ts_info,</div><div class='add'>+		.irq			= IRQ_PB4,	/* old boards (&lt;=Rev 1.3) use IRQ_PJ11 */</div><div class='add'>+		.max_speed_hz		= 12500000,     /* max spi clock (SCK) speed in HZ */</div><div class='add'>+		.bus_num		= 0,</div><div class='add'>+		.chip_select  		= 2,</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)</div><div class='add'>+	{</div><div class='add'>+		.modalias = "spidev",</div><div class='add'>+		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */</div><div class='add'>+		.bus_num = 0,</div><div class='add'>+		.chip_select = 1,</div><div class='add'>+		.controller_data = &amp;spidev_chip_info,</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)</div><div class='add'>+	{</div><div class='add'>+		.modalias		= "adxl34x",</div><div class='add'>+		.platform_data		= &amp;adxl34x_info,</div><div class='add'>+		.irq			= IRQ_PC5,</div><div class='add'>+		.max_speed_hz		= 5000000,     /* max spi clock (SCK) speed in HZ */</div><div class='add'>+		.bus_num		= 1,</div><div class='add'>+		.chip_select  		= 2,</div><div class='add'>+		.mode = SPI_MODE_3,</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+#if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)</div><div class='add'>+/* SPI (0) */</div><div class='add'>+static struct resource bfin_spi0_resource[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = SPI0_REGBASE,</div><div class='add'>+		.end   = SPI0_REGBASE + 0xFF,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_SPI0_TX,</div><div class='add'>+		.end   = CH_SPI0_TX,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_SPI0_RX,</div><div class='add'>+		.end   = CH_SPI0_RX,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SPI (1) */</div><div class='add'>+static struct resource bfin_spi1_resource[] = {</div><div class='add'>+	{</div><div class='add'>+		.start = SPI1_REGBASE,</div><div class='add'>+		.end   = SPI1_REGBASE + 0xFF,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_SPI1_TX,</div><div class='add'>+		.end   = CH_SPI1_TX,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.start = CH_SPI1_RX,</div><div class='add'>+		.end   = CH_SPI1_RX,</div><div class='add'>+		.flags = IORESOURCE_DMA,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SPI controller data */</div><div class='add'>+static struct bfin6xx_spi_master bf60x_spi_master_info0 = {</div><div class='add'>+	.num_chipselect = 4,</div><div class='add'>+	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bf60x_spi_master0 = {</div><div class='add'>+	.name = "bfin-spi",</div><div class='add'>+	.id = 0, /* Bus number */</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_spi0_resource),</div><div class='add'>+	.resource = bfin_spi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bf60x_spi_master_info0, /* Passed to driver */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct bfin6xx_spi_master bf60x_spi_master_info1 = {</div><div class='add'>+	.num_chipselect = 4,</div><div class='add'>+	.pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bf60x_spi_master1 = {</div><div class='add'>+	.name = "bfin-spi",</div><div class='add'>+	.id = 1, /* Bus number */</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_spi1_resource),</div><div class='add'>+	.resource = bfin_spi1_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bf60x_spi_master_info1, /* Passed to driver */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif  /* spi master and devices */</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};</div><div class='add'>+</div><div class='add'>+static struct resource bfin_twi0_resource[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start = TWI0_CLKDIV,</div><div class='add'>+		.end   = TWI0_CLKDIV + 0xFF,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start = IRQ_TWI0,</div><div class='add'>+		.end   = IRQ_TWI0,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device i2c_bfin_twi0_device = {</div><div class='add'>+	.name = "i2c-bfin-twi",</div><div class='add'>+	.id = 0,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_twi0_resource),</div><div class='add'>+	.resource = bfin_twi0_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi0_pins,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};</div><div class='add'>+</div><div class='add'>+static struct resource bfin_twi1_resource[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start = TWI1_CLKDIV,</div><div class='add'>+		.end   = TWI1_CLKDIV + 0xFF,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start = IRQ_TWI1,</div><div class='add'>+		.end   = IRQ_TWI1,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device i2c_bfin_twi1_device = {</div><div class='add'>+	.name = "i2c-bfin-twi",</div><div class='add'>+	.id = 1,</div><div class='add'>+	.num_resources = ARRAY_SIZE(bfin_twi1_resource),</div><div class='add'>+	.resource = bfin_twi1_resource,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_twi1_pins,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {</div><div class='add'>+#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)</div><div class='add'>+	{</div><div class='add'>+		I2C_BOARD_INFO("adxl34x", 0x53),</div><div class='add'>+		.irq = IRQ_PC5,</div><div class='add'>+		.platform_data = (void *)&amp;adxl34x_info,</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)</div><div class='add'>+	{</div><div class='add'>+		I2C_BOARD_INFO("adau1761", 0x38),</div><div class='add'>+		.platform_data = (void *)&amp;adau1761_info</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned int cclk_vlev_datasheet[] =</div><div class='add'>+{</div><div class='add'>+/*</div><div class='add'>+ * Internal VLEV BF54XSBBC1533</div><div class='add'>+ ****temporarily using these values until data sheet is updated</div><div class='add'>+ */</div><div class='add'>+	VRPAIR(VLEV_085, 150000000),</div><div class='add'>+	VRPAIR(VLEV_090, 250000000),</div><div class='add'>+	VRPAIR(VLEV_110, 276000000),</div><div class='add'>+	VRPAIR(VLEV_115, 301000000),</div><div class='add'>+	VRPAIR(VLEV_120, 525000000),</div><div class='add'>+	VRPAIR(VLEV_125, 550000000),</div><div class='add'>+	VRPAIR(VLEV_130, 600000000),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {</div><div class='add'>+	.tuple_tab = cclk_vlev_datasheet,</div><div class='add'>+	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),</div><div class='add'>+	.vr_settling_time = 25 /* us */,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device bfin_dpmc = {</div><div class='add'>+	.name = "bfin dpmc",</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data = &amp;bfin_dmpc_vreg_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *ezkit_devices[] __initdata = {</div><div class='add'>+</div><div class='add'>+	&amp;bfin_dpmc,</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)</div><div class='add'>+	&amp;rtc_device,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_UART0</div><div class='add'>+	&amp;bfin_uart0_device,</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_UART1</div><div class='add'>+	&amp;bfin_uart1_device,</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)</div><div class='add'>+#ifdef CONFIG_BFIN_SIR0</div><div class='add'>+	&amp;bfin_sir0_device,</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_BFIN_SIR1</div><div class='add'>+	&amp;bfin_sir1_device,</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)</div><div class='add'>+	&amp;bfin_eth_device,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)</div><div class='add'>+	&amp;musb_device,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)</div><div class='add'>+	&amp;bfin_isp1760_device,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART</div><div class='add'>+	&amp;bfin_sport0_uart_device,</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART</div><div class='add'>+	&amp;bfin_sport1_uart_device,</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART</div><div class='add'>+	&amp;bfin_sport2_uart_device,</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)</div><div class='add'>+	&amp;bfin_can0_device,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)</div><div class='add'>+	&amp;bfin_nand_device,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)</div><div class='add'>+	&amp;bfin_sdh_device,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)</div><div class='add'>+	&amp;bf60x_spi_master0,</div><div class='add'>+	&amp;bf60x_spi_master1,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)</div><div class='add'>+	&amp;bfin_rotary_device,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)</div><div class='add'>+	&amp;i2c_bfin_twi0_device,</div><div class='add'>+#if !defined(CONFIG_BF542)</div><div class='add'>+	&amp;i2c_bfin_twi1_device,</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_BFIN_CRC)</div><div class='add'>+	&amp;bfin_crc0_device,</div><div class='add'>+	&amp;bfin_crc1_device,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)</div><div class='add'>+	&amp;bfin_device_gpiokeys,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)</div><div class='add'>+	&amp;ezkit_flash_device,</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_SND_BF6XX_I2S) || defined(CONFIG_SND_BF6XX_I2S_MODULE)</div><div class='add'>+	&amp;bfin_i2s_pcm,</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_SND_BF6XX_SOC_I2S) || \</div><div class='add'>+	defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)</div><div class='add'>+	&amp;bfin_i2s,</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \</div><div class='add'>+	defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)</div><div class='add'>+	&amp;adau1761_device,</div><div class='add'>+#endif</div><div class='add'>+#if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \</div><div class='add'>+	|| defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)</div><div class='add'>+	&amp;bfin_capture_device,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init ezkit_init(void)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_INFO "%s(): registering device resources\n", __func__);</div><div class='add'>+</div><div class='add'>+	i2c_register_board_info(0, bfin_i2c_board_info0,</div><div class='add'>+				ARRAY_SIZE(bfin_i2c_board_info0));</div><div class='add'>+	i2c_register_board_info(1, bfin_i2c_board_info1,</div><div class='add'>+				ARRAY_SIZE(bfin_i2c_board_info1));</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)</div><div class='add'>+	if (!peripheral_request_list(pins, "emac0"))</div><div class='add'>+		printk(KERN_ERR "%s(): request emac pins failed\n", __func__);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));</div><div class='add'>+</div><div class='add'>+	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+arch_initcall(ezkit_init);</div><div class='add'>+</div><div class='add'>+static struct platform_device *ezkit_early_devices[] __initdata = {</div><div class='add'>+#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_UART0</div><div class='add'>+	&amp;bfin_uart0_device,</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_UART1</div><div class='add'>+	&amp;bfin_uart1_device,</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART</div><div class='add'>+	&amp;bfin_sport0_uart_device,</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART</div><div class='add'>+	&amp;bfin_sport1_uart_device,</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART</div><div class='add'>+	&amp;bfin_sport2_uart_device,</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init native_machine_early_platform_add_devices(void)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_INFO "register early platform devices\n");</div><div class='add'>+	early_platform_add_devices(ezkit_early_devices,</div><div class='add'>+		ARRAY_SIZE(ezkit_early_devices));</div><div class='add'>+}</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/clock.c b/arch/blackfin/mach-bf609/clock.c<br/>new file mode 100644<br/>index 000000000000..7f8f529693ae<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/clock.c</a></div><div class='hunk'>@@ -0,0 +1,390 @@</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/timer.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/clocks.h&gt;</div><div class='add'>+</div><div class='add'>+#define CGU0_CTL_DF (1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+#define CGU0_CTL_MSEL_SHIFT 8</div><div class='add'>+#define CGU0_CTL_MSEL_MASK (0x7f &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+#define CGU0_STAT_PLLEN (1 &lt;&lt; 0)</div><div class='add'>+#define CGU0_STAT_PLLBP (1 &lt;&lt; 1)</div><div class='add'>+#define CGU0_STAT_PLLLK (1 &lt;&lt; 2)</div><div class='add'>+#define CGU0_STAT_CLKSALGN (1 &lt;&lt; 3)</div><div class='add'>+#define CGU0_STAT_CCBF0 (1 &lt;&lt; 4)</div><div class='add'>+#define CGU0_STAT_CCBF1 (1 &lt;&lt; 5)</div><div class='add'>+#define CGU0_STAT_SCBF0 (1 &lt;&lt; 6)</div><div class='add'>+#define CGU0_STAT_SCBF1 (1 &lt;&lt; 7)</div><div class='add'>+#define CGU0_STAT_DCBF (1 &lt;&lt; 8)</div><div class='add'>+#define CGU0_STAT_OCBF (1 &lt;&lt; 9)</div><div class='add'>+#define CGU0_STAT_ADDRERR (1 &lt;&lt; 16)</div><div class='add'>+#define CGU0_STAT_LWERR (1 &lt;&lt; 17)</div><div class='add'>+#define CGU0_STAT_DIVERR (1 &lt;&lt; 18)</div><div class='add'>+#define CGU0_STAT_WDFMSERR (1 &lt;&lt; 19)</div><div class='add'>+#define CGU0_STAT_WDIVERR (1 &lt;&lt; 20)</div><div class='add'>+#define CGU0_STAT_PLOCKERR (1 &lt;&lt; 21)</div><div class='add'>+</div><div class='add'>+#define CGU0_DIV_CSEL_SHIFT 0</div><div class='add'>+#define CGU0_DIV_CSEL_MASK 0x0000001F</div><div class='add'>+#define CGU0_DIV_S0SEL_SHIFT 5</div><div class='add'>+#define CGU0_DIV_S0SEL_MASK (0x3 &lt;&lt; CGU0_DIV_S0SEL_SHIFT)</div><div class='add'>+#define CGU0_DIV_SYSSEL_SHIFT 8</div><div class='add'>+#define CGU0_DIV_SYSSEL_MASK (0x1f &lt;&lt; CGU0_DIV_SYSSEL_SHIFT)</div><div class='add'>+#define CGU0_DIV_S1SEL_SHIFT 13</div><div class='add'>+#define CGU0_DIV_S1SEL_MASK (0x3 &lt;&lt; CGU0_DIV_S1SEL_SHIFT)</div><div class='add'>+#define CGU0_DIV_DSEL_SHIFT 16</div><div class='add'>+#define CGU0_DIV_DSEL_MASK (0x1f &lt;&lt; CGU0_DIV_DSEL_SHIFT)</div><div class='add'>+#define CGU0_DIV_OSEL_SHIFT 22</div><div class='add'>+#define CGU0_DIV_OSEL_MASK (0x7f &lt;&lt; CGU0_DIV_OSEL_SHIFT)</div><div class='add'>+</div><div class='add'>+#define CLK(_clk, _devname, _conname)                   \</div><div class='add'>+	{                                               \</div><div class='add'>+		.clk    = &amp;_clk,                  \</div><div class='add'>+		.dev_id = _devname,                     \</div><div class='add'>+		.con_id = _conname,                     \</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define NEEDS_INITIALIZATION 0x11</div><div class='add'>+</div><div class='add'>+static LIST_HEAD(clk_list);</div><div class='add'>+</div><div class='add'>+static void clk_reg_write_mask(u32 reg, uint32_t val, uint32_t mask)</div><div class='add'>+{</div><div class='add'>+	u32 val2;</div><div class='add'>+</div><div class='add'>+	val2 = bfin_read32(reg);</div><div class='add'>+	val2 &amp;= ~mask;</div><div class='add'>+	val2 |= val;</div><div class='add'>+	bfin_write32(reg, val2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clk_reg_set_bits(u32 reg, uint32_t mask)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = bfin_read32(reg);</div><div class='add'>+	val |= mask;</div><div class='add'>+	bfin_write32(reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clk_reg_clear_bits(u32 reg, uint32_t mask)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = bfin_read32(reg);</div><div class='add'>+	val &amp;= ~mask;</div><div class='add'>+	bfin_write32(reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wait_for_pll_align(void)</div><div class='add'>+{</div><div class='add'>+	int i = 10000;</div><div class='add'>+	while (i-- &amp;&amp; (bfin_read32(CGU0_STAT) &amp; CGU0_STAT_CLKSALGN));</div><div class='add'>+</div><div class='add'>+	if (bfin_read32(CGU0_STAT) &amp; CGU0_STAT_CLKSALGN) {</div><div class='add'>+		printk(KERN_DEBUG "fail to align clk\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int clk_enable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	int ret = -EIO;</div><div class='add'>+	if (clk-&gt;ops &amp;&amp; clk-&gt;ops-&gt;enable)</div><div class='add'>+		ret = clk-&gt;ops-&gt;enable(clk);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(clk_enable);</div><div class='add'>+</div><div class='add'>+void clk_disable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	if (clk-&gt;ops &amp;&amp; clk-&gt;ops-&gt;disable)</div><div class='add'>+		clk-&gt;ops-&gt;disable(clk);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(clk_disable);</div><div class='add'>+</div><div class='add'>+unsigned long clk_get_rate(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	unsigned long ret = 0;</div><div class='add'>+	if (clk-&gt;ops &amp;&amp; clk-&gt;ops-&gt;get_rate)</div><div class='add'>+		ret = clk-&gt;ops-&gt;get_rate(clk);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(clk_get_rate);</div><div class='add'>+</div><div class='add'>+long clk_round_rate(struct clk *clk, unsigned long rate)</div><div class='add'>+{</div><div class='add'>+	long ret = -EIO;</div><div class='add'>+	if (clk-&gt;ops &amp;&amp; clk-&gt;ops-&gt;round_rate)</div><div class='add'>+		ret = clk-&gt;ops-&gt;round_rate(clk, rate);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(clk_round_rate);</div><div class='add'>+</div><div class='add'>+int clk_set_rate(struct clk *clk, unsigned long rate)</div><div class='add'>+{</div><div class='add'>+	int ret = -EIO;</div><div class='add'>+	if (clk-&gt;ops &amp;&amp; clk-&gt;ops-&gt;set_rate)</div><div class='add'>+		ret = clk-&gt;ops-&gt;set_rate(clk, rate);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(clk_set_rate);</div><div class='add'>+</div><div class='add'>+unsigned long vco_get_rate(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	return clk-&gt;rate;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long pll_get_rate(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	u32 df;</div><div class='add'>+	u32 msel;</div><div class='add'>+	u32 ctl = bfin_read32(CGU0_CTL);</div><div class='add'>+	u32 stat = bfin_read32(CGU0_STAT);</div><div class='add'>+	if (stat &amp; CGU0_STAT_PLLBP)</div><div class='add'>+		return 0;</div><div class='add'>+	msel = (ctl &amp; CGU0_CTL_MSEL_MASK) &gt;&gt; CGU0_CTL_MSEL_SHIFT;</div><div class='add'>+	df = (ctl &amp;  CGU0_CTL_DF);</div><div class='add'>+	clk-&gt;parent-&gt;rate = clk_get_rate(clk-&gt;parent);</div><div class='add'>+	return clk-&gt;parent-&gt;rate / (df + 1) * msel * 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long pll_round_rate(struct clk *clk, unsigned long rate)</div><div class='add'>+{</div><div class='add'>+	u32 div;</div><div class='add'>+	div = rate / clk-&gt;parent-&gt;rate;</div><div class='add'>+	return clk-&gt;parent-&gt;rate * div;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pll_set_rate(struct clk *clk, unsigned long rate)</div><div class='add'>+{</div><div class='add'>+	u32 msel;</div><div class='add'>+	u32 stat = bfin_read32(CGU0_STAT);</div><div class='add'>+	if (!(stat &amp; CGU0_STAT_PLLEN))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	if (!(stat &amp; CGU0_STAT_PLLLK))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	if (wait_for_pll_align())</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	msel = rate / clk-&gt;parent-&gt;rate / 2;</div><div class='add'>+	clk_reg_write_mask(CGU0_CTL, msel &lt;&lt; CGU0_CTL_MSEL_SHIFT,</div><div class='add'>+		CGU0_CTL_MSEL_MASK);</div><div class='add'>+	clk-&gt;rate = rate;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long cclk_get_rate(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	if (clk-&gt;parent)</div><div class='add'>+		return clk-&gt;parent-&gt;rate;</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long sys_clk_get_rate(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	unsigned long drate;</div><div class='add'>+	u32 msel;</div><div class='add'>+	u32 df;</div><div class='add'>+	u32 ctl = bfin_read32(CGU0_CTL);</div><div class='add'>+	u32 div = bfin_read32(CGU0_DIV);</div><div class='add'>+	div = (div &amp; clk-&gt;mask) &gt;&gt; clk-&gt;shift;</div><div class='add'>+	msel = (ctl &amp; CGU0_CTL_MSEL_MASK) &gt;&gt; CGU0_CTL_MSEL_SHIFT;</div><div class='add'>+	df = (ctl &amp;  CGU0_CTL_DF);</div><div class='add'>+</div><div class='add'>+	if (!strcmp(clk-&gt;parent-&gt;name, "SYS_CLKIN")) {</div><div class='add'>+		drate = clk-&gt;parent-&gt;rate / (df + 1);</div><div class='add'>+		drate *=  msel;</div><div class='add'>+		drate /= div;</div><div class='add'>+		return drate;</div><div class='add'>+	} else {</div><div class='add'>+		clk-&gt;parent-&gt;rate = clk_get_rate(clk-&gt;parent);</div><div class='add'>+		return clk-&gt;parent-&gt;rate / div;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long sys_clk_round_rate(struct clk *clk, unsigned long rate)</div><div class='add'>+{</div><div class='add'>+	unsigned long max_rate;</div><div class='add'>+	unsigned long drate;</div><div class='add'>+	int i;</div><div class='add'>+	u32 msel;</div><div class='add'>+	u32 df;</div><div class='add'>+	u32 ctl = bfin_read32(CGU0_CTL);</div><div class='add'>+</div><div class='add'>+	msel = (ctl &amp; CGU0_CTL_MSEL_MASK) &gt;&gt; CGU0_CTL_MSEL_SHIFT;</div><div class='add'>+	df = (ctl &amp;  CGU0_CTL_DF);</div><div class='add'>+	max_rate = clk-&gt;parent-&gt;rate / (df + 1) * msel;</div><div class='add'>+</div><div class='add'>+	if (rate &gt; max_rate)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; clk-&gt;mask; i++) {</div><div class='add'>+		drate = max_rate / i;</div><div class='add'>+		if (rate &gt;= drate)</div><div class='add'>+			return drate;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sys_clk_set_rate(struct clk *clk, unsigned long rate)</div><div class='add'>+{</div><div class='add'>+	u32 div = bfin_read32(CGU0_DIV);</div><div class='add'>+	div = (div &amp; clk-&gt;mask) &gt;&gt; clk-&gt;shift;</div><div class='add'>+</div><div class='add'>+	rate = clk_round_rate(clk, rate);</div><div class='add'>+</div><div class='add'>+	if (!rate)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	div = (clk_get_rate(clk) * div) / rate;</div><div class='add'>+</div><div class='add'>+	if (wait_for_pll_align())</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	clk_reg_write_mask(CGU0_DIV, div &lt;&lt; clk-&gt;shift,</div><div class='add'>+			clk-&gt;mask);</div><div class='add'>+	clk-&gt;rate = rate;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_ops vco_ops = {</div><div class='add'>+	.get_rate = vco_get_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_ops pll_ops = {</div><div class='add'>+	.get_rate = pll_get_rate,</div><div class='add'>+	.set_rate = pll_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_ops cclk_ops = {</div><div class='add'>+	.get_rate = cclk_get_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_ops sys_clk_ops = {</div><div class='add'>+	.get_rate = sys_clk_get_rate,</div><div class='add'>+	.set_rate = sys_clk_set_rate,</div><div class='add'>+	.round_rate = sys_clk_round_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk sys_clkin = {</div><div class='add'>+	.name       = "SYS_CLKIN",</div><div class='add'>+	.rate       = CONFIG_CLKIN_HZ,</div><div class='add'>+	.ops        = &amp;vco_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk pll_clk = {</div><div class='add'>+	.name       = "PLLCLK",</div><div class='add'>+	.rate       = 500000000,</div><div class='add'>+	.parent     = &amp;sys_clkin,</div><div class='add'>+	.ops = &amp;pll_ops,</div><div class='add'>+	.flags = NEEDS_INITIALIZATION,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk cclk = {</div><div class='add'>+	.name       = "CCLK",</div><div class='add'>+	.rate       = 500000000,</div><div class='add'>+	.mask       = CGU0_DIV_CSEL_MASK,</div><div class='add'>+	.shift      = CGU0_DIV_CSEL_SHIFT,</div><div class='add'>+	.parent     = &amp;sys_clkin,</div><div class='add'>+	.ops	    = &amp;sys_clk_ops,</div><div class='add'>+	.flags = NEEDS_INITIALIZATION,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk cclk0 = {</div><div class='add'>+	.name       = "CCLK0",</div><div class='add'>+	.parent     = &amp;cclk,</div><div class='add'>+	.ops	    = &amp;cclk_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk cclk1 = {</div><div class='add'>+	.name       = "CCLK1",</div><div class='add'>+	.parent     = &amp;cclk,</div><div class='add'>+	.ops	    = &amp;cclk_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk sysclk = {</div><div class='add'>+	.name       = "SYSCLK",</div><div class='add'>+	.rate       = 500000000,</div><div class='add'>+	.mask       = CGU0_DIV_SYSSEL_MASK,</div><div class='add'>+	.shift      = CGU0_DIV_SYSSEL_SHIFT,</div><div class='add'>+	.parent     = &amp;sys_clkin,</div><div class='add'>+	.ops	    = &amp;sys_clk_ops,</div><div class='add'>+	.flags = NEEDS_INITIALIZATION,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk sclk0 = {</div><div class='add'>+	.name       = "SCLK0",</div><div class='add'>+	.rate       = 500000000,</div><div class='add'>+	.mask       = CGU0_DIV_S0SEL_MASK,</div><div class='add'>+	.shift      = CGU0_DIV_S0SEL_SHIFT,</div><div class='add'>+	.parent     = &amp;sysclk,</div><div class='add'>+	.ops	    = &amp;sys_clk_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk sclk1 = {</div><div class='add'>+	.name       = "SCLK1",</div><div class='add'>+	.rate       = 500000000,</div><div class='add'>+	.mask       = CGU0_DIV_S1SEL_MASK,</div><div class='add'>+	.shift      = CGU0_DIV_S1SEL_SHIFT,</div><div class='add'>+	.parent     = &amp;sysclk,</div><div class='add'>+	.ops	    = &amp;sys_clk_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk dclk = {</div><div class='add'>+	.name       = "DCLK",</div><div class='add'>+	.rate       = 500000000,</div><div class='add'>+	.mask       = CGU0_DIV_DSEL_MASK,</div><div class='add'>+	.shift       = CGU0_DIV_DSEL_SHIFT,</div><div class='add'>+	.parent     = &amp;sys_clkin,</div><div class='add'>+	.ops	    = &amp;sys_clk_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk oclk = {</div><div class='add'>+	.name       = "OCLK",</div><div class='add'>+	.rate       = 500000000,</div><div class='add'>+	.mask       = CGU0_DIV_OSEL_MASK,</div><div class='add'>+	.shift      = CGU0_DIV_OSEL_SHIFT,</div><div class='add'>+	.parent     = &amp;pll_clk,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup bf609_clks[] = {</div><div class='add'>+	CLK(sys_clkin, NULL, "SYS_CLKIN"),</div><div class='add'>+	CLK(pll_clk, NULL, "PLLCLK"),</div><div class='add'>+	CLK(cclk, NULL, "CCLK"),</div><div class='add'>+	CLK(cclk0, NULL, "CCLK0"),</div><div class='add'>+	CLK(cclk1, NULL, "CCLK1"),</div><div class='add'>+	CLK(sysclk, NULL, "SYSCLK"),</div><div class='add'>+	CLK(sclk0, NULL, "SCLK0"),</div><div class='add'>+	CLK(sclk1, NULL, "SCLK1"),</div><div class='add'>+	CLK(dclk, NULL, "DCLK"),</div><div class='add'>+	CLK(oclk, NULL, "OCLK"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __init clk_init(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct clk *clkp;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(bf609_clks); i++) {</div><div class='add'>+		clkp = bf609_clks[i].clk;</div><div class='add'>+		if (clkp-&gt;flags &amp; NEEDS_INITIALIZATION)</div><div class='add'>+			clk_get_rate(clkp);</div><div class='add'>+	}</div><div class='add'>+	clkdev_add_table(bf609_clks, ARRAY_SIZE(bf609_clks));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/dma.c b/arch/blackfin/mach-bf609/dma.c<br/>new file mode 100644<br/>index 000000000000..1da4b38ac22c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/dma.c</a></div><div class='hunk'>@@ -0,0 +1,202 @@</div><div class='add'>+/*</div><div class='add'>+ * the simple DMA Implementation for Blackfin</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2007-2009 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/blackfin.h&gt;</div><div class='add'>+#include &lt;asm/dma.h&gt;</div><div class='add'>+</div><div class='add'>+struct dma_register * const dma_io_base_addr[MAX_DMA_CHANNELS] = {</div><div class='add'>+	(struct dma_register *) DMA0_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA1_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA2_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA3_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA4_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA5_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA6_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA7_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA8_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA9_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA10_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA11_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA12_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA13_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA14_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA15_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA16_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA17_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA18_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA19_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA20_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) MDMA0_SRC_CRC0_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) MDMA0_DEST_CRC0_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) MDMA1_SRC_CRC1_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) MDMA1_DEST_CRC1_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) MDMA2_SRC_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) MDMA2_DEST_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) MDMA3_SRC_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) MDMA3_DEST_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA29_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA30_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA31_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA32_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA33_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA34_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA35_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA36_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA37_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA38_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA39_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA40_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA41_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA42_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA43_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA44_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA45_NEXT_DESC_PTR,</div><div class='add'>+	(struct dma_register *) DMA46_NEXT_DESC_PTR,</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL(dma_io_base_addr);</div><div class='add'>+</div><div class='add'>+int channel2irq(unsigned int channel)</div><div class='add'>+{</div><div class='add'>+	int ret_irq = -1;</div><div class='add'>+</div><div class='add'>+	switch (channel) {</div><div class='add'>+	case CH_SPORT0_RX:</div><div class='add'>+		ret_irq = IRQ_SPORT0_RX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_SPORT0_TX:</div><div class='add'>+		ret_irq = IRQ_SPORT0_TX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_SPORT1_RX:</div><div class='add'>+		ret_irq = IRQ_SPORT1_RX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_SPORT1_TX:</div><div class='add'>+		ret_irq = IRQ_SPORT1_TX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_SPORT2_RX:</div><div class='add'>+		ret_irq = IRQ_SPORT2_RX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_SPORT2_TX:</div><div class='add'>+		ret_irq = IRQ_SPORT2_TX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_SPI0_TX:</div><div class='add'>+		ret_irq = IRQ_SPI0_TX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_SPI0_RX:</div><div class='add'>+		ret_irq = IRQ_SPI0_RX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_SPI1_TX:</div><div class='add'>+		ret_irq = IRQ_SPI1_TX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_SPI1_RX:</div><div class='add'>+		ret_irq = IRQ_SPI1_RX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_RSI:</div><div class='add'>+		ret_irq = IRQ_RSI;</div><div class='add'>+		break;</div><div class='add'>+	case CH_SDU:</div><div class='add'>+		ret_irq = IRQ_SDU;</div><div class='add'>+		break;</div><div class='add'>+	case CH_LP0:</div><div class='add'>+		ret_irq = IRQ_LP0;</div><div class='add'>+		break;</div><div class='add'>+	case CH_LP1:</div><div class='add'>+		ret_irq = IRQ_LP1;</div><div class='add'>+		break;</div><div class='add'>+	case CH_LP2:</div><div class='add'>+		ret_irq = IRQ_LP2;</div><div class='add'>+		break;</div><div class='add'>+	case CH_LP3:</div><div class='add'>+		ret_irq = IRQ_LP3;</div><div class='add'>+		break;</div><div class='add'>+	case CH_UART0_RX:</div><div class='add'>+		ret_irq = IRQ_UART0_RX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_UART0_TX:</div><div class='add'>+		ret_irq = IRQ_UART0_TX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_UART1_RX:</div><div class='add'>+		ret_irq = IRQ_UART1_RX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_UART1_TX:</div><div class='add'>+		ret_irq = IRQ_UART1_TX;</div><div class='add'>+		break;</div><div class='add'>+	case CH_EPPI0_CH0:</div><div class='add'>+		ret_irq = IRQ_EPPI0_CH0;</div><div class='add'>+		break;</div><div class='add'>+	case CH_EPPI0_CH1:</div><div class='add'>+		ret_irq = IRQ_EPPI0_CH1;</div><div class='add'>+		break;</div><div class='add'>+	case CH_EPPI1_CH0:</div><div class='add'>+		ret_irq = IRQ_EPPI1_CH0;</div><div class='add'>+		break;</div><div class='add'>+	case CH_EPPI1_CH1:</div><div class='add'>+		ret_irq = IRQ_EPPI1_CH1;</div><div class='add'>+		break;</div><div class='add'>+	case CH_EPPI2_CH0:</div><div class='add'>+		ret_irq = IRQ_EPPI2_CH0;</div><div class='add'>+		break;</div><div class='add'>+	case CH_EPPI2_CH1:</div><div class='add'>+		ret_irq = IRQ_EPPI2_CH1;</div><div class='add'>+		break;</div><div class='add'>+	case CH_PIXC_CH0:</div><div class='add'>+		ret_irq = IRQ_PIXC_CH0;</div><div class='add'>+		break;</div><div class='add'>+	case CH_PIXC_CH1:</div><div class='add'>+		ret_irq = IRQ_PIXC_CH1;</div><div class='add'>+		break;</div><div class='add'>+	case CH_PIXC_CH2:</div><div class='add'>+		ret_irq = IRQ_PIXC_CH2;</div><div class='add'>+		break;</div><div class='add'>+	case CH_PVP_CPDOB:</div><div class='add'>+		ret_irq = IRQ_PVP_CPDOB;</div><div class='add'>+		break;</div><div class='add'>+	case CH_PVP_CPDOC:</div><div class='add'>+		ret_irq = IRQ_PVP_CPDOC;</div><div class='add'>+		break;</div><div class='add'>+	case CH_PVP_CPSTAT:</div><div class='add'>+		ret_irq = IRQ_PVP_CPSTAT;</div><div class='add'>+		break;</div><div class='add'>+	case CH_PVP_CPCI:</div><div class='add'>+		ret_irq = IRQ_PVP_CPCI;</div><div class='add'>+		break;</div><div class='add'>+	case CH_PVP_MPDO:</div><div class='add'>+		ret_irq = IRQ_PVP_MPDO;</div><div class='add'>+		break;</div><div class='add'>+	case CH_PVP_MPDI:</div><div class='add'>+		ret_irq = IRQ_PVP_MPDI;</div><div class='add'>+		break;</div><div class='add'>+	case CH_PVP_MPSTAT:</div><div class='add'>+		ret_irq = IRQ_PVP_MPSTAT;</div><div class='add'>+		break;</div><div class='add'>+	case CH_PVP_MPCI:</div><div class='add'>+		ret_irq = IRQ_PVP_MPCI;</div><div class='add'>+		break;</div><div class='add'>+	case CH_PVP_CPDOA:</div><div class='add'>+		ret_irq = IRQ_PVP_CPDOA;</div><div class='add'>+		break;</div><div class='add'>+	case CH_MEM_STREAM0_SRC:</div><div class='add'>+	case CH_MEM_STREAM0_DEST:</div><div class='add'>+		ret_irq = IRQ_MDMAS0;</div><div class='add'>+		break;</div><div class='add'>+	case CH_MEM_STREAM1_SRC:</div><div class='add'>+	case CH_MEM_STREAM1_DEST:</div><div class='add'>+		ret_irq = IRQ_MDMAS1;</div><div class='add'>+		break;</div><div class='add'>+	case CH_MEM_STREAM2_SRC:</div><div class='add'>+	case CH_MEM_STREAM2_DEST:</div><div class='add'>+		ret_irq = IRQ_MDMAS2;</div><div class='add'>+		break;</div><div class='add'>+	case CH_MEM_STREAM3_SRC:</div><div class='add'>+	case CH_MEM_STREAM3_DEST:</div><div class='add'>+		ret_irq = IRQ_MDMAS3;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return ret_irq;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/hibernate.S b/arch/blackfin/mach-bf609/hibernate.S<br/>new file mode 100644<br/>index 000000000000..d37a532519c8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/hibernate.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/hibernate.S</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/blackfin.h&gt;</div><div class='add'>+#include &lt;asm/dpmc.h&gt;</div><div class='add'>+</div><div class='add'>+#define PM_STACK   (COREA_L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)</div><div class='add'>+</div><div class='add'>+.section .l1.text</div><div class='add'>+ENTRY(_enter_hibernate)</div><div class='add'>+	/* switch stack to L1 scratch, prepare for ddr srfr */</div><div class='add'>+	P0.H = HI(PM_STACK);</div><div class='add'>+	P0.L = LO(PM_STACK);</div><div class='add'>+	SP = P0;</div><div class='add'>+</div><div class='add'>+	call _bf609_ddr_sr;</div><div class='add'>+	call _bfin_hibernate_syscontrol;</div><div class='add'>+</div><div class='add'>+	P0.H = HI(DPM0_RESTORE4);</div><div class='add'>+	P0.L = LO(DPM0_RESTORE4);</div><div class='add'>+	P1.H = _bf609_pm_data;</div><div class='add'>+	P1.L = _bf609_pm_data;</div><div class='add'>+	[P0] = P1;</div><div class='add'>+</div><div class='add'>+	P0.H = HI(DPM0_CTL);</div><div class='add'>+	P0.L = LO(DPM0_CTL);</div><div class='add'>+	R3.H = HI(0x00000010);</div><div class='add'>+	R3.L = LO(0x00000010);</div><div class='add'>+</div><div class='add'>+	bfin_init_pm_bench_cycles;</div><div class='add'>+</div><div class='add'>+	[P0] = R3;</div><div class='add'>+</div><div class='add'>+	SSYNC;</div><div class='add'>+ENDPROC(_enter_hibernate_mode)</div><div class='add'>+</div><div class='add'>+.section .text</div><div class='add'>+ENTRY(_bf609_hibernate)</div><div class='add'>+	bfin_cpu_reg_save;</div><div class='add'>+	bfin_core_mmr_save;</div><div class='add'>+</div><div class='add'>+	P0.H = _bf609_pm_data;</div><div class='add'>+	P0.L = _bf609_pm_data;</div><div class='add'>+	R1.H = 0xDEAD;</div><div class='add'>+	R1.L = 0xBEEF;</div><div class='add'>+	R2.H = .Lpm_resume_here;</div><div class='add'>+	R2.L = .Lpm_resume_here;</div><div class='add'>+	[P0++] = R1;</div><div class='add'>+	[P0++] = R2;</div><div class='add'>+	[P0++] = SP;</div><div class='add'>+</div><div class='add'>+	P1.H = _enter_hibernate;</div><div class='add'>+	P1.L = _enter_hibernate;</div><div class='add'>+</div><div class='add'>+	call (P1);</div><div class='add'>+.Lpm_resume_here:</div><div class='add'>+</div><div class='add'>+	bfin_core_mmr_restore;</div><div class='add'>+	bfin_cpu_reg_restore;</div><div class='add'>+</div><div class='add'>+	[--sp] = RETI;  /* Clear Global Interrupt Disable */</div><div class='add'>+	SP += 4;</div><div class='add'>+</div><div class='add'>+	RTS;</div><div class='add'>+</div><div class='add'>+ENDPROC(_bf609_hibernate)</div><div class='add'>+</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/anomaly.h b/arch/blackfin/mach-bf609/include/mach/anomaly.h<br/>new file mode 100644<br/>index 000000000000..bdd39aefb565<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/anomaly.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/anomaly.h</a></div><div class='hunk'>@@ -0,0 +1,130 @@</div><div class='add'>+/*</div><div class='add'>+ * DO NOT EDIT THIS FILE</div><div class='add'>+ * This file is under version control at</div><div class='add'>+ *   svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/</div><div class='add'>+ * and can be replaced with that version at any time</div><div class='add'>+ * DO NOT EDIT THIS FILE</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2004-2011 Analog Devices Inc.</div><div class='add'>+ * Licensed under the Clear BSD license.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* This file should be up to date with:</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#if __SILICON_REVISION__ &lt; 0</div><div class='add'>+# error will not work on BF506 silicon version</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef _MACH_ANOMALY_H_</div><div class='add'>+#define _MACH_ANOMALY_H_</div><div class='add'>+</div><div class='add'>+/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */</div><div class='add'>+#define ANOMALY_05000074 (1)</div><div class='add'>+/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */</div><div class='add'>+#define ANOMALY_05000119 (1)</div><div class='add'>+/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */</div><div class='add'>+#define ANOMALY_05000122 (1)</div><div class='add'>+/* False Hardware Error from an Access in the Shadow of a Conditional Branch */</div><div class='add'>+#define ANOMALY_05000245 (1)</div><div class='add'>+/* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */</div><div class='add'>+#define ANOMALY_05000254 (1)</div><div class='add'>+/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */</div><div class='add'>+#define ANOMALY_05000265 (1)</div><div class='add'>+/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */</div><div class='add'>+#define ANOMALY_05000310 (1)</div><div class='add'>+/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */</div><div class='add'>+#define ANOMALY_05000366 (1)</div><div class='add'>+/* Speculative Fetches Can Cause Undesired External FIFO Operations */</div><div class='add'>+#define ANOMALY_05000416 (1)</div><div class='add'>+/* Speculative Fetches of Indirect-Pointer Instructions Can Cause False Hardware Errors */</div><div class='add'>+#define ANOMALY_05000426 (1)</div><div class='add'>+/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */</div><div class='add'>+#define ANOMALY_05000443 (1)</div><div class='add'>+/* UART IrDA Receiver Fails on Extended Bit Pulses */</div><div class='add'>+#define ANOMALY_05000447 (1)</div><div class='add'>+/* False Hardware Error when RETI Points to Invalid Memory */</div><div class='add'>+#define ANOMALY_05000461 (1)</div><div class='add'>+/* PLL Latches Incorrect Settings During Reset */</div><div class='add'>+#define ANOMALY_05000469 (1)</div><div class='add'>+/* Incorrect Default MSEL Value in PLL_CTL */</div><div class='add'>+#define ANOMALY_05000472 (1)</div><div class='add'>+/* Interrupted SPORT Receive Data Register Read Results In Underflow when SLEN &gt; 15 */</div><div class='add'>+#define ANOMALY_05000473 (1)</div><div class='add'>+/* TESTSET Instruction Cannot Be Interrupted */</div><div class='add'>+#define ANOMALY_05000477 (1)</div><div class='add'>+/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */</div><div class='add'>+#define ANOMALY_05000481 (1)</div><div class='add'>+/* IFLUSH sucks at life */</div><div class='add'>+#define ANOMALY_05000491 (1)</div><div class='add'>+/* Tempopary anomaly ID for data loss in MMR read operation if interrupted */</div><div class='add'>+#define ANOMALY_05001001 (__SILICON_REVISION__ &lt; 1)</div><div class='add'>+</div><div class='add'>+/* Anomalies that don't exist on this proc */</div><div class='add'>+#define ANOMALY_05000099 (0)</div><div class='add'>+#define ANOMALY_05000120 (0)</div><div class='add'>+#define ANOMALY_05000125 (0)</div><div class='add'>+#define ANOMALY_05000149 (0)</div><div class='add'>+#define ANOMALY_05000158 (0)</div><div class='add'>+#define ANOMALY_05000171 (0)</div><div class='add'>+#define ANOMALY_05000179 (0)</div><div class='add'>+#define ANOMALY_05000182 (0)</div><div class='add'>+#define ANOMALY_05000183 (0)</div><div class='add'>+#define ANOMALY_05000189 (0)</div><div class='add'>+#define ANOMALY_05000198 (0)</div><div class='add'>+#define ANOMALY_05000202 (0)</div><div class='add'>+#define ANOMALY_05000215 (0)</div><div class='add'>+#define ANOMALY_05000219 (0)</div><div class='add'>+#define ANOMALY_05000220 (0)</div><div class='add'>+#define ANOMALY_05000227 (0)</div><div class='add'>+#define ANOMALY_05000230 (0)</div><div class='add'>+#define ANOMALY_05000231 (0)</div><div class='add'>+#define ANOMALY_05000233 (0)</div><div class='add'>+#define ANOMALY_05000234 (0)</div><div class='add'>+#define ANOMALY_05000242 (0)</div><div class='add'>+#define ANOMALY_05000244 (0)</div><div class='add'>+#define ANOMALY_05000248 (0)</div><div class='add'>+#define ANOMALY_05000250 (0)</div><div class='add'>+#define ANOMALY_05000257 (0)</div><div class='add'>+#define ANOMALY_05000261 (0)</div><div class='add'>+#define ANOMALY_05000263 (0)</div><div class='add'>+#define ANOMALY_05000266 (0)</div><div class='add'>+#define ANOMALY_05000273 (0)</div><div class='add'>+#define ANOMALY_05000274 (0)</div><div class='add'>+#define ANOMALY_05000278 (0)</div><div class='add'>+#define ANOMALY_05000281 (0)</div><div class='add'>+#define ANOMALY_05000283 (0)</div><div class='add'>+#define ANOMALY_05000285 (0)</div><div class='add'>+#define ANOMALY_05000287 (0)</div><div class='add'>+#define ANOMALY_05000301 (0)</div><div class='add'>+#define ANOMALY_05000305 (0)</div><div class='add'>+#define ANOMALY_05000307 (0)</div><div class='add'>+#define ANOMALY_05000311 (0)</div><div class='add'>+#define ANOMALY_05000312 (0)</div><div class='add'>+#define ANOMALY_05000315 (0)</div><div class='add'>+#define ANOMALY_05000323 (0)</div><div class='add'>+#define ANOMALY_05000353 (1)</div><div class='add'>+#define ANOMALY_05000357 (0)</div><div class='add'>+#define ANOMALY_05000362 (1)</div><div class='add'>+#define ANOMALY_05000363 (0)</div><div class='add'>+#define ANOMALY_05000364 (0)</div><div class='add'>+#define ANOMALY_05000371 (0)</div><div class='add'>+#define ANOMALY_05000380 (0)</div><div class='add'>+#define ANOMALY_05000386 (0)</div><div class='add'>+#define ANOMALY_05000389 (0)</div><div class='add'>+#define ANOMALY_05000400 (0)</div><div class='add'>+#define ANOMALY_05000402 (0)</div><div class='add'>+#define ANOMALY_05000412 (0)</div><div class='add'>+#define ANOMALY_05000432 (0)</div><div class='add'>+#define ANOMALY_05000440 (0)</div><div class='add'>+#define ANOMALY_05000448 (0)</div><div class='add'>+#define ANOMALY_05000456 (0)</div><div class='add'>+#define ANOMALY_05000450 (0)</div><div class='add'>+#define ANOMALY_05000465 (0)</div><div class='add'>+#define ANOMALY_05000467 (0)</div><div class='add'>+#define ANOMALY_05000474 (0)</div><div class='add'>+#define ANOMALY_05000475 (0)</div><div class='add'>+#define ANOMALY_05000480 (0)</div><div class='add'>+#define ANOMALY_05000485 (0)</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/bf609.h b/arch/blackfin/mach-bf609/include/mach/bf609.h<br/>new file mode 100644<br/>index 000000000000..c897c2a2fbfa<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/bf609.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/bf609.h</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MACH_BF609_H__</div><div class='add'>+#define __MACH_BF609_H__</div><div class='add'>+</div><div class='add'>+#define OFFSET_(x) ((x) &amp; 0x0000FFFF)</div><div class='add'>+</div><div class='add'>+/*some misc defines*/</div><div class='add'>+#define IMASK_IVG15		0x8000</div><div class='add'>+#define IMASK_IVG14		0x4000</div><div class='add'>+#define IMASK_IVG13		0x2000</div><div class='add'>+#define IMASK_IVG12		0x1000</div><div class='add'>+</div><div class='add'>+#define IMASK_IVG11		0x0800</div><div class='add'>+#define IMASK_IVG10		0x0400</div><div class='add'>+#define IMASK_IVG9		0x0200</div><div class='add'>+#define IMASK_IVG8		0x0100</div><div class='add'>+</div><div class='add'>+#define IMASK_IVG7		0x0080</div><div class='add'>+#define IMASK_IVGTMR		0x0040</div><div class='add'>+#define IMASK_IVGHW		0x0020</div><div class='add'>+</div><div class='add'>+/***************************/</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define BFIN_DSUBBANKS		4</div><div class='add'>+#define BFIN_DWAYS		2</div><div class='add'>+#define BFIN_DLINES		64</div><div class='add'>+#define BFIN_ISUBBANKS		4</div><div class='add'>+#define BFIN_IWAYS		4</div><div class='add'>+#define BFIN_ILINES		32</div><div class='add'>+</div><div class='add'>+#define WAY0_L			0x1</div><div class='add'>+#define WAY1_L			0x2</div><div class='add'>+#define WAY01_L			0x3</div><div class='add'>+#define WAY2_L			0x4</div><div class='add'>+#define WAY02_L			0x5</div><div class='add'>+#define	WAY12_L			0x6</div><div class='add'>+#define	WAY012_L		0x7</div><div class='add'>+</div><div class='add'>+#define	WAY3_L			0x8</div><div class='add'>+#define	WAY03_L			0x9</div><div class='add'>+#define	WAY13_L			0xA</div><div class='add'>+#define	WAY013_L		0xB</div><div class='add'>+</div><div class='add'>+#define	WAY32_L			0xC</div><div class='add'>+#define	WAY320_L		0xD</div><div class='add'>+#define	WAY321_L		0xE</div><div class='add'>+#define	WAYALL_L		0xF</div><div class='add'>+</div><div class='add'>+#define DMC_ENABLE (2&lt;&lt;2)	/*yes, 2, not 1 */</div><div class='add'>+</div><div class='add'>+/********************************* EBIU Settings ************************************/</div><div class='add'>+#define AMBCTL0VAL	((CONFIG_BANK_1 &lt;&lt; 16) | CONFIG_BANK_0)</div><div class='add'>+#define AMBCTL1VAL	((CONFIG_BANK_3 &lt;&lt; 16) | CONFIG_BANK_2)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_C_AMBEN_ALL</div><div class='add'>+#define V_AMBEN AMBEN_ALL</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_C_AMBEN</div><div class='add'>+#define V_AMBEN 0x0</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_C_AMBEN_B0</div><div class='add'>+#define V_AMBEN AMBEN_B0</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_C_AMBEN_B0_B1</div><div class='add'>+#define V_AMBEN AMBEN_B0_B1</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_C_AMBEN_B0_B1_B2</div><div class='add'>+#define V_AMBEN AMBEN_B0_B1_B2</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_C_AMCKEN</div><div class='add'>+#define V_AMCKEN AMCKEN</div><div class='add'>+#else</div><div class='add'>+#define V_AMCKEN 0x0</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define AMGCTLVAL	(V_AMBEN | V_AMCKEN)</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_BF609)</div><div class='add'>+# define CPU   "BF609"</div><div class='add'>+# define CPUID 0x27fe	/* temperary fake value */</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef CPU</div><div class='add'>+#error "Unknown CPU type - This kernel doesn't seem to be configured properly"</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif	/* __MACH_BF609_H__  */</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/bfin_serial.h b/arch/blackfin/mach-bf609/include/mach/bfin_serial.h<br/>new file mode 100644<br/>index 000000000000..1fd398147fd9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/bfin_serial.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/bfin_serial.h</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+/*</div><div class='add'>+ * mach/bfin_serial.h - Blackfin UART/Serial definitions</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __BFIN_MACH_SERIAL_H__</div><div class='add'>+#define __BFIN_MACH_SERIAL_H__</div><div class='add'>+</div><div class='add'>+#define BFIN_UART_NR_PORTS	2</div><div class='add'>+#define BFIN_UART_TX_FIFO_SIZE	8</div><div class='add'>+</div><div class='add'>+#define BFIN_UART_BF60X_STYLE</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/blackfin.h b/arch/blackfin/mach-bf609/include/mach/blackfin.h<br/>new file mode 100644<br/>index 000000000000..b1a48c410711<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/blackfin.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/blackfin.h</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MACH_BLACKFIN_H_</div><div class='add'>+#define _MACH_BLACKFIN_H_</div><div class='add'>+</div><div class='add'>+#include "bf609.h"</div><div class='add'>+#include "anomaly.h"</div><div class='add'>+</div><div class='add'>+#include &lt;asm/def_LPBlackfin.h&gt;</div><div class='add'>+#ifdef CONFIG_BF609</div><div class='add'>+# include "defBF609.h"</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+# include &lt;asm/cdef_LPBlackfin.h&gt;</div><div class='add'>+# ifdef CONFIG_BF609</div><div class='add'>+#  include "cdefBF609.h"</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/cdefBF609.h b/arch/blackfin/mach-bf609/include/mach/cdefBF609.h<br/>new file mode 100644<br/>index 000000000000..c4f3fe19acda<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/cdefBF609.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/cdefBF609.h</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _CDEF_BF609_H</div><div class='add'>+#define _CDEF_BF609_H</div><div class='add'>+</div><div class='add'>+/* include cdefBF60x_base.h for the set of #defines that are common to all ADSP-BF60x bfin_read_()rocessors */</div><div class='add'>+#include "cdefBF60x_base.h"</div><div class='add'>+</div><div class='add'>+/* The following are the #defines needed by ADSP-BF609 that are not in the common header */</div><div class='add'>+</div><div class='add'>+#endif /* _CDEF_BF609_H */</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/cdefBF60x_base.h b/arch/blackfin/mach-bf609/include/mach/cdefBF60x_base.h<br/>new file mode 100644<br/>index 000000000000..4954cf3f7e16<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/cdefBF60x_base.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/cdefBF60x_base.h</a></div><div class='hunk'>@@ -0,0 +1,3252 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _CDEF_BF60X_H</div><div class='add'>+#define _CDEF_BF60X_H</div><div class='add'>+</div><div class='add'>+/* ************************************************************** */</div><div class='add'>+/* SYSTEM &amp; MMR ADDRESS DEFINITIONS COMMON TO ALL ADSP-BF60x    */</div><div class='add'>+/* ************************************************************** */</div><div class='add'>+</div><div class='add'>+/* Debug/MP/Emulation Registers (0xFFC00014 - 0xFFC00014) */</div><div class='add'>+</div><div class='add'>+#define bfin_read_CHIPID()		bfin_read32(CHIPID)</div><div class='add'>+#define bfin_write_CHIPID(val)		bfin_write32(CHIPID, val)</div><div class='add'>+</div><div class='add'>+/* System Reset and Interrubfin_read_()t Controller (0xFFC00100 - 0xFFC00104) */</div><div class='add'>+</div><div class='add'>+/* SEC0 Registers */</div><div class='add'>+#define bfin_read_SEC0_CCTL()		bfin_read32(SEC0_CCTL)</div><div class='add'>+#define bfin_write_SEC0_CCTL(val)	bfin_write32(SEC0_CCTL, val)</div><div class='add'>+#define bfin_read_SEC0_CSID()		bfin_read32(SEC0_CSID)</div><div class='add'>+#define bfin_write_SEC0_CSID(val)	bfin_write32(SEC0_CSID, val)</div><div class='add'>+#define bfin_read_SEC_GCTL()		bfin_read32(SEC_GCTL)</div><div class='add'>+#define bfin_write_SEC_GCTL(val)	bfin_write32(SEC_GCTL, val)</div><div class='add'>+</div><div class='add'>+#define bfin_read_SEC_FCTL()		bfin_read32(SEC_FCTL)</div><div class='add'>+#define bfin_write_SEC_FCTL(val)	bfin_write32(SEC_FCTL, val)</div><div class='add'>+</div><div class='add'>+#define bfin_read_SEC_SCTL(sid)		bfin_read32((SEC_SCTL0 + (sid) * 8))</div><div class='add'>+#define bfin_write_SEC_SCTL(sid, val)	bfin_write32((SEC_SCTL0 + (sid) * 8), val)</div><div class='add'>+</div><div class='add'>+#define bfin_read_SEC_SSTAT(sid)	bfin_read32((SEC_SSTAT0 + (sid) * 8))</div><div class='add'>+#define bfin_write_SEC_SSTAT(sid, val)	bfin_write32((SEC_SSTAT0 + (sid) * 8), val)</div><div class='add'>+</div><div class='add'>+/* RCU0 Registers */</div><div class='add'>+#define bfin_read_RCU0_CTL()		bfin_read32(RCU0_CTL)</div><div class='add'>+#define bfin_write_RCU0_CTL(val)	bfin_write32(RCU0_CTL, val)</div><div class='add'>+</div><div class='add'>+/* Watchdog Timer Registers */</div><div class='add'>+#define bfin_read_WDOG_CTL()		bfin_read16(WDOG_CTL)</div><div class='add'>+#define bfin_write_WDOG_CTL(val)	bfin_write16(WDOG_CTL, val)</div><div class='add'>+#define bfin_read_WDOG_CNT()		bfin_read32(WDOG_CNT)</div><div class='add'>+#define bfin_write_WDOG_CNT(val)	bfin_write32(WDOG_CNT, val)</div><div class='add'>+#define bfin_read_WDOG_STAT()		bfin_read32(WDOG_STAT)</div><div class='add'>+#define bfin_write_WDOG_STAT(val)	bfin_write32(WDOG_STAT, val)</div><div class='add'>+</div><div class='add'>+/* RTC Registers */</div><div class='add'>+</div><div class='add'>+/* UART0 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_UART0_REVID()		bfin_read32(UART0_REVID)</div><div class='add'>+#define bfin_write_UART0_REVID(val)	bfin_write32(UART0_REVID, val)</div><div class='add'>+#define bfin_read_UART0_GCTL()		bfin_read32(UART0_GCTL)</div><div class='add'>+#define bfin_write_UART0_GCTL(val)	bfin_write32(UART0_GCTL, val)</div><div class='add'>+#define bfin_read_UART0_STAT()		bfin_read32(UART0_STAT)</div><div class='add'>+#define bfin_write_UART0_STAT(val)	bfin_write32(UART0_STAT, val)</div><div class='add'>+#define bfin_read_UART0_SCR()		bfin_read32(UART0_SCR)</div><div class='add'>+#define bfin_write_UART0_SCR(val)	bfin_write32(UART0_SCR, val)</div><div class='add'>+#define bfin_read_UART0_CLK()		bfin_read32(UART0_CLK)</div><div class='add'>+#define bfin_write_UART0_CLK(val)	bfin_write32(UART0_CLK, val)</div><div class='add'>+#define bfin_read_UART0_IER()		bfin_read32(UART0_IER)</div><div class='add'>+#define bfin_write_UART0_IER(val)	bfin_write32(UART0_IER, val)</div><div class='add'>+#define bfin_read_UART0_IER_SET()	bfin_read32(UART0_IER_SET)</div><div class='add'>+#define bfin_write_UART0_IER_SET(val)	bfin_write32(UART0_IER_SET, val)</div><div class='add'>+#define bfin_read_UART0_IER_CLEAR()	bfin_read32(UART0_IER_CLEAR)</div><div class='add'>+#define bfin_write_UART0_IER_CLEAR(val)	bfin_write32(UART0_IER_CLEAR, val)</div><div class='add'>+#define bfin_read_UART0_RBR()		bfin_read32(UART0_RBR)</div><div class='add'>+#define bfin_write_UART0_RBR(val)	bfin_write32(UART0_RBR, val)</div><div class='add'>+#define bfin_read_UART0_THR()		bfin_read32(UART0_THR)</div><div class='add'>+#define bfin_write_UART0_THR(val)	bfin_write32(UART0_THR, val)</div><div class='add'>+#define bfin_read_UART0_TAIP()		bfin_read32(UART0_TAIP)</div><div class='add'>+#define bfin_write_UART0_TAIP(val)	bfin_write32(UART0_TAIP, val)</div><div class='add'>+#define bfin_read_UART0_TSR()		bfin_read32(UART0_TSR)</div><div class='add'>+#define bfin_write_UART0_TSR(val)	bfin_write32(UART0_TSR, val)</div><div class='add'>+#define bfin_read_UART0_RSR()		bfin_read32(UART0_RSR)</div><div class='add'>+#define bfin_write_UART0_RSR(val)	bfin_write32(UART0_RSR, val)</div><div class='add'>+#define bfin_read_UART0_TXCNT()		bfin_read32(UART0_TXCNT)</div><div class='add'>+#define bfin_write_UART0_TXCNT(val)	bfin_write32(UART0_TXCNT, val)</div><div class='add'>+#define bfin_read_UART0_RXCNT()		bfin_read32(UART0_RXCNT)</div><div class='add'>+#define bfin_write_UART0_RXCNT(val)	bfin_write32(UART0_RXCNT, val)</div><div class='add'>+</div><div class='add'>+/* UART1 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_UART1_REVID()		bfin_read32(UART1_REVID)</div><div class='add'>+#define bfin_write_UART1_REVID(val)	bfin_write32(UART1_REVID, val)</div><div class='add'>+#define bfin_read_UART1_GCTL()		bfin_read32(UART1_GCTL)</div><div class='add'>+#define bfin_write_UART1_GCTL(val)	bfin_write32(UART1_GCTL, val)</div><div class='add'>+#define bfin_read_UART1_STAT()		bfin_read32(UART1_STAT)</div><div class='add'>+#define bfin_write_UART1_STAT(val)	bfin_write32(UART1_STAT, val)</div><div class='add'>+#define bfin_read_UART1_SCR()		bfin_read32(UART1_SCR)</div><div class='add'>+#define bfin_write_UART1_SCR(val)	bfin_write32(UART1_SCR, val)</div><div class='add'>+#define bfin_read_UART1_CLK()		bfin_read32(UART1_CLK)</div><div class='add'>+#define bfin_write_UART1_CLK(val)	bfin_write32(UART1_CLK, val)</div><div class='add'>+#define bfin_read_UART1_IER()		bfin_read32(UART1_IER)</div><div class='add'>+#define bfin_write_UART1_IER(val)	bfin_write32(UART1_IER, val)</div><div class='add'>+#define bfin_read_UART1_IER_SET()	bfin_read32(UART1_IER_SET)</div><div class='add'>+#define bfin_write_UART1_IER_SET(val)	bfin_write32(UART1_IER_SET, val)</div><div class='add'>+#define bfin_read_UART1_IER_CLEAR()	bfin_read32(UART1_IER_CLEAR)</div><div class='add'>+#define bfin_write_UART1_IER_CLEAR(val)	bfin_write32(UART1_IER_CLEAR, val)</div><div class='add'>+#define bfin_read_UART1_RBR()		bfin_read32(UART1_RBR)</div><div class='add'>+#define bfin_write_UART1_RBR(val)	bfin_write32(UART1_RBR, val)</div><div class='add'>+#define bfin_read_UART1_THR()		bfin_read32(UART1_THR)</div><div class='add'>+#define bfin_write_UART1_THR(val)	bfin_write32(UART1_THR, val)</div><div class='add'>+#define bfin_read_UART1_TAIP()		bfin_read32(UART1_TAIP)</div><div class='add'>+#define bfin_write_UART1_TAIP(val)	bfin_write32(UART1_TAIP, val)</div><div class='add'>+#define bfin_read_UART1_TSR()		bfin_read32(UART1_TSR)</div><div class='add'>+#define bfin_write_UART1_TSR(val)	bfin_write32(UART1_TSR, val)</div><div class='add'>+#define bfin_read_UART1_RSR()		bfin_read32(UART1_RSR)</div><div class='add'>+#define bfin_write_UART1_RSR(val)	bfin_write32(UART1_RSR, val)</div><div class='add'>+#define bfin_read_UART1_TXCNT()		bfin_read32(UART1_TXCNT)</div><div class='add'>+#define bfin_write_UART1_TXCNT(val)	bfin_write32(UART1_TXCNT, val)</div><div class='add'>+#define bfin_read_UART1_RXCNT()		bfin_read32(UART1_RXCNT)</div><div class='add'>+#define bfin_write_UART1_RXCNT(val)	bfin_write32(UART1_RXCNT, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* SPI0 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_SPI0_CTL()		bfin_read32(SPI0_CTL)</div><div class='add'>+#define bfin_write_SPI0_CTL(val)	bfin_write32(SPI0_CTL, val)</div><div class='add'>+#define bfin_read_SPI0_RXCTL()		bfin_read32(SPI0_RXCTL)</div><div class='add'>+#define bfin_write_SPI0_RXCTL(val)	bfin_write32(SPI0_RXCTL, val)</div><div class='add'>+#define bfin_read_SPI0_TXCTL()		bfin_read32(SPI0_TXCTL)</div><div class='add'>+#define bfin_write_SPI0_TXCTL(val)	bfin_write32(SPI0_TXCTL, val)</div><div class='add'>+#define bfin_read_SPI0_CLK()		bfin_read32(SPI0_CLK)</div><div class='add'>+#define bfin_write_SPI0_CLK(val)	bfin_write32(SPI0_CLK, val)</div><div class='add'>+#define bfin_read_SPI0_DLY()		bfin_read32(SPI0_DLY)</div><div class='add'>+#define bfin_write_SPI0_DLY(val)	bfin_write32(SPI0_DLY, val)</div><div class='add'>+#define bfin_read_SPI0_SLVSEL()		bfin_read32(SPI0_SLVSEL)</div><div class='add'>+#define bfin_write_SPI0_SLVSEL(val)	bfin_write32(SPI0_SLVSEL, val)</div><div class='add'>+#define bfin_read_SPI0_RWC()		bfin_read32(SPI0_RWC)</div><div class='add'>+#define bfin_write_SPI0_RWC(val)	bfin_write32(SPI0_RWC, val)</div><div class='add'>+#define bfin_read_SPI0_RWCR()		bfin_read32(SPI0_RWCR)</div><div class='add'>+#define bfin_write_SPI0_RWCR(val)	bfin_write32(SPI0_RWCR, val)</div><div class='add'>+#define bfin_read_SPI0_TWC()		bfin_read32(SPI0_TWC)</div><div class='add'>+#define bfin_write_SPI0_TWC(val)	bfin_write32(SPI0_TWC, val)</div><div class='add'>+#define bfin_read_SPI0_TWCR()		bfin_read32(SPI0_TWCR)</div><div class='add'>+#define bfin_write_SPI0_TWCR(val)	bfin_write32(SPI0_TWCR, val)</div><div class='add'>+#define bfin_read_SPI0_IMSK()		bfin_read32(SPI0_IMSK)</div><div class='add'>+#define bfin_write_SPI0_IMSK(val)	bfin_write32(SPI0_IMSK, val)</div><div class='add'>+#define bfin_read_SPI0_IMSK_CLR()	bfin_read32(SPI0_IMSK_CLR)</div><div class='add'>+#define bfin_write_SPI0_IMSK_CLR(val)	bfin_write32(SPI0_IMSK_CLR, val)</div><div class='add'>+#define bfin_read_SPI0_IMSK_SET()	bfin_read32(SPI0_IMSK_SET)</div><div class='add'>+#define bfin_write_SPI0_IMSK_SET(val)	bfin_write32(SPI0_IMSK_SET, val)</div><div class='add'>+#define bfin_read_SPI0_STAT()		bfin_read32(SPI0_STAT)</div><div class='add'>+#define bfin_write_SPI0_STAT(val)	bfin_write32(SPI0_STAT, val)</div><div class='add'>+#define bfin_read_SPI0_ILAT()		bfin_read32(SPI0_ILAT)</div><div class='add'>+#define bfin_write_SPI0_ILAT(val)	bfin_write32(SPI0_ILAT, val)</div><div class='add'>+#define bfin_read_SPI0_ILAT_CLR()	bfin_read32(SPI0_ILAT_CLR)</div><div class='add'>+#define bfin_write_SPI0_ILAT_CLR(val)	bfin_write32(SPI0_ILAT_CLR, val)</div><div class='add'>+#define bfin_read_SPI0_RFIFO()		bfin_read32(SPI0_RFIFO)</div><div class='add'>+#define bfin_write_SPI0_RFIFO(val)	bfin_write32(SPI0_RFIFO, val)</div><div class='add'>+#define bfin_read_SPI0_TFIFO()		bfin_read32(SPI0_TFIFO)</div><div class='add'>+#define bfin_write_SPI0_TFIFO(val)	bfin_write32(SPI0_TFIFO, val)</div><div class='add'>+</div><div class='add'>+/* SPI1 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_SPI1_CTL()		bfin_read32(SPI1_CTL)</div><div class='add'>+#define bfin_write_SPI1_CTL(val)	bfin_write32(SPI1_CTL, val)</div><div class='add'>+#define bfin_read_SPI1_RXCTL()		bfin_read32(SPI1_RXCTL)</div><div class='add'>+#define bfin_write_SPI1_RXCTL(val)	bfin_write32(SPI1_RXCTL, val)</div><div class='add'>+#define bfin_read_SPI1_TXCTL()		bfin_read32(SPI1_TXCTL)</div><div class='add'>+#define bfin_write_SPI1_TXCTL(val)	bfin_write32(SPI1_TXCTL, val)</div><div class='add'>+#define bfin_read_SPI1_CLK()		bfin_read32(SPI1_CLK)</div><div class='add'>+#define bfin_write_SPI1_CLK(val)	bfin_write32(SPI1_CLK, val)</div><div class='add'>+#define bfin_read_SPI1_DLY()		bfin_read32(SPI1_DLY)</div><div class='add'>+#define bfin_write_SPI1_DLY(val)	bfin_write32(SPI1_DLY, val)</div><div class='add'>+#define bfin_read_SPI1_SLVSEL()		bfin_read32(SPI1_SLVSEL)</div><div class='add'>+#define bfin_write_SPI1_SLVSEL(val)	bfin_write32(SPI1_SLVSEL, val)</div><div class='add'>+#define bfin_read_SPI1_RWC()		bfin_read32(SPI1_RWC)</div><div class='add'>+#define bfin_write_SPI1_RWC(val)	bfin_write32(SPI1_RWC, val)</div><div class='add'>+#define bfin_read_SPI1_RWCR()		bfin_read32(SPI1_RWCR)</div><div class='add'>+#define bfin_write_SPI1_RWCR(val)	bfin_write32(SPI1_RWCR, val)</div><div class='add'>+#define bfin_read_SPI1_TWC()		bfin_read32(SPI1_TWC)</div><div class='add'>+#define bfin_write_SPI1_TWC(val)	bfin_write32(SPI1_TWC, val)</div><div class='add'>+#define bfin_read_SPI1_TWCR()		bfin_read32(SPI1_TWCR)</div><div class='add'>+#define bfin_write_SPI1_TWCR(val)	bfin_write32(SPI1_TWCR, val)</div><div class='add'>+#define bfin_read_SPI1_IMSK()		bfin_read32(SPI1_IMSK)</div><div class='add'>+#define bfin_write_SPI1_IMSK(val)	bfin_write32(SPI1_IMSK, val)</div><div class='add'>+#define bfin_read_SPI1_IMSK_CLR()	bfin_read32(SPI1_IMSK_CLR)</div><div class='add'>+#define bfin_write_SPI1_IMSK_CLR(val)	bfin_write32(SPI1_IMSK_CLR, val)</div><div class='add'>+#define bfin_read_SPI1_IMSK_SET()	bfin_read32(SPI1_IMSK_SET)</div><div class='add'>+#define bfin_write_SPI1_IMSK_SET(val)	bfin_write32(SPI1_IMSK_SET, val)</div><div class='add'>+#define bfin_read_SPI1_STAT()		bfin_read32(SPI1_STAT)</div><div class='add'>+#define bfin_write_SPI1_STAT(val)	bfin_write32(SPI1_STAT, val)</div><div class='add'>+#define bfin_read_SPI1_ILAT()		bfin_read32(SPI1_ILAT)</div><div class='add'>+#define bfin_write_SPI1_ILAT(val)	bfin_write32(SPI1_ILAT, val)</div><div class='add'>+#define bfin_read_SPI1_ILAT_CLR()	bfin_read32(SPI1_ILAT_CLR)</div><div class='add'>+#define bfin_write_SPI1_ILAT_CLR(val)	bfin_write32(SPI1_ILAT_CLR, val)</div><div class='add'>+#define bfin_read_SPI1_RFIFO()		bfin_read32(SPI1_RFIFO)</div><div class='add'>+#define bfin_write_SPI1_RFIFO(val)	bfin_write32(SPI1_RFIFO, val)</div><div class='add'>+#define bfin_read_SPI1_TFIFO()		bfin_read32(SPI1_TFIFO)</div><div class='add'>+#define bfin_write_SPI1_TFIFO(val)	bfin_write32(SPI1_TFIFO, val)</div><div class='add'>+</div><div class='add'>+/* Timer 0-7 registers */</div><div class='add'>+#define bfin_read_TIMER0_CONFIG()            bfin_read16(TIMER0_CONFIG)</div><div class='add'>+#define bfin_write_TIMER0_CONFIG(val)        bfin_write16(TIMER0_CONFIG, val)</div><div class='add'>+#define bfin_read_TIMER0_COUNTER()           bfin_read32(TIMER0_COUNTER)</div><div class='add'>+#define bfin_write_TIMER0_COUNTER(val)       bfin_write32(TIMER0_COUNTER, val)</div><div class='add'>+#define bfin_read_TIMER0_PERIOD()            bfin_read32(TIMER0_PERIOD)</div><div class='add'>+#define bfin_write_TIMER0_PERIOD(val)        bfin_write32(TIMER0_PERIOD, val)</div><div class='add'>+#define bfin_read_TIMER0_WIDTH()             bfin_read32(TIMER0_WIDTH)</div><div class='add'>+#define bfin_write_TIMER0_WIDTH(val)         bfin_write32(TIMER0_WIDTH, val)</div><div class='add'>+#define bfin_read_TIMER1_CONFIG()            bfin_read16(TIMER1_CONFIG)</div><div class='add'>+#define bfin_write_TIMER1_CONFIG(val)        bfin_write16(TIMER1_CONFIG, val)</div><div class='add'>+#define bfin_read_TIMER1_COUNTER()           bfin_read32(TIMER1_COUNTER)</div><div class='add'>+#define bfin_write_TIMER1_COUNTER(val)       bfin_write32(TIMER1_COUNTER, val)</div><div class='add'>+#define bfin_read_TIMER1_PERIOD()            bfin_read32(TIMER1_PERIOD)</div><div class='add'>+#define bfin_write_TIMER1_PERIOD(val)        bfin_write32(TIMER1_PERIOD, val)</div><div class='add'>+#define bfin_read_TIMER1_WIDTH()             bfin_read32(TIMER1_WIDTH)</div><div class='add'>+#define bfin_write_TIMER1_WIDTH(val)         bfin_write32(TIMER1_WIDTH, val)</div><div class='add'>+#define bfin_read_TIMER2_CONFIG()            bfin_read16(TIMER2_CONFIG)</div><div class='add'>+#define bfin_write_TIMER2_CONFIG(val)        bfin_write16(TIMER2_CONFIG, val)</div><div class='add'>+#define bfin_read_TIMER2_COUNTER()           bfin_read32(TIMER2_COUNTER)</div><div class='add'>+#define bfin_write_TIMER2_COUNTER(val)       bfin_write32(TIMER2_COUNTER, val)</div><div class='add'>+#define bfin_read_TIMER2_PERIOD()            bfin_read32(TIMER2_PERIOD)</div><div class='add'>+#define bfin_write_TIMER2_PERIOD(val)        bfin_write32(TIMER2_PERIOD, val)</div><div class='add'>+#define bfin_read_TIMER2_WIDTH()             bfin_read32(TIMER2_WIDTH)</div><div class='add'>+#define bfin_write_TIMER2_WIDTH(val)         bfin_write32(TIMER2_WIDTH, val)</div><div class='add'>+#define bfin_read_TIMER3_CONFIG()            bfin_read16(TIMER3_CONFIG)</div><div class='add'>+#define bfin_write_TIMER3_CONFIG(val)        bfin_write16(TIMER3_CONFIG, val)</div><div class='add'>+#define bfin_read_TIMER3_COUNTER()           bfin_read32(TIMER3_COUNTER)</div><div class='add'>+#define bfin_write_TIMER3_COUNTER(val)       bfin_write32(TIMER3_COUNTER, val)</div><div class='add'>+#define bfin_read_TIMER3_PERIOD()            bfin_read32(TIMER3_PERIOD)</div><div class='add'>+#define bfin_write_TIMER3_PERIOD(val)        bfin_write32(TIMER3_PERIOD, val)</div><div class='add'>+#define bfin_read_TIMER3_WIDTH()             bfin_read32(TIMER3_WIDTH)</div><div class='add'>+#define bfin_write_TIMER3_WIDTH(val)         bfin_write32(TIMER3_WIDTH, val)</div><div class='add'>+#define bfin_read_TIMER4_CONFIG()            bfin_read16(TIMER4_CONFIG)</div><div class='add'>+#define bfin_write_TIMER4_CONFIG(val)        bfin_write16(TIMER4_CONFIG, val)</div><div class='add'>+#define bfin_read_TIMER4_COUNTER()           bfin_read32(TIMER4_COUNTER)</div><div class='add'>+#define bfin_write_TIMER4_COUNTER(val)       bfin_write32(TIMER4_COUNTER, val)</div><div class='add'>+#define bfin_read_TIMER4_PERIOD()            bfin_read32(TIMER4_PERIOD)</div><div class='add'>+#define bfin_write_TIMER4_PERIOD(val)        bfin_write32(TIMER4_PERIOD, val)</div><div class='add'>+#define bfin_read_TIMER4_WIDTH()             bfin_read32(TIMER4_WIDTH)</div><div class='add'>+#define bfin_write_TIMER4_WIDTH(val)         bfin_write32(TIMER4_WIDTH, val)</div><div class='add'>+#define bfin_read_TIMER5_CONFIG()            bfin_read16(TIMER5_CONFIG)</div><div class='add'>+#define bfin_write_TIMER5_CONFIG(val)        bfin_write16(TIMER5_CONFIG, val)</div><div class='add'>+#define bfin_read_TIMER5_COUNTER()           bfin_read32(TIMER5_COUNTER)</div><div class='add'>+#define bfin_write_TIMER5_COUNTER(val)       bfin_write32(TIMER5_COUNTER, val)</div><div class='add'>+#define bfin_read_TIMER5_PERIOD()            bfin_read32(TIMER5_PERIOD)</div><div class='add'>+#define bfin_write_TIMER5_PERIOD(val)        bfin_write32(TIMER5_PERIOD, val)</div><div class='add'>+#define bfin_read_TIMER5_WIDTH()             bfin_read32(TIMER5_WIDTH)</div><div class='add'>+#define bfin_write_TIMER5_WIDTH(val)         bfin_write32(TIMER5_WIDTH, val)</div><div class='add'>+#define bfin_read_TIMER6_CONFIG()            bfin_read16(TIMER6_CONFIG)</div><div class='add'>+#define bfin_write_TIMER6_CONFIG(val)        bfin_write16(TIMER6_CONFIG, val)</div><div class='add'>+#define bfin_read_TIMER6_COUNTER()           bfin_read32(TIMER6_COUNTER)</div><div class='add'>+#define bfin_write_TIMER6_COUNTER(val)       bfin_write32(TIMER6_COUNTER, val)</div><div class='add'>+#define bfin_read_TIMER6_PERIOD()            bfin_read32(TIMER6_PERIOD)</div><div class='add'>+#define bfin_write_TIMER6_PERIOD(val)        bfin_write32(TIMER6_PERIOD, val)</div><div class='add'>+#define bfin_read_TIMER6_WIDTH()             bfin_read32(TIMER6_WIDTH)</div><div class='add'>+#define bfin_write_TIMER6_WIDTH(val)         bfin_write32(TIMER6_WIDTH, val)</div><div class='add'>+#define bfin_read_TIMER7_CONFIG()            bfin_read16(TIMER7_CONFIG)</div><div class='add'>+#define bfin_write_TIMER7_CONFIG(val)        bfin_write16(TIMER7_CONFIG, val)</div><div class='add'>+#define bfin_read_TIMER7_COUNTER()           bfin_read32(TIMER7_COUNTER)</div><div class='add'>+#define bfin_write_TIMER7_COUNTER(val)       bfin_write32(TIMER7_COUNTER, val)</div><div class='add'>+#define bfin_read_TIMER7_PERIOD()            bfin_read32(TIMER7_PERIOD)</div><div class='add'>+#define bfin_write_TIMER7_PERIOD(val)        bfin_write32(TIMER7_PERIOD, val)</div><div class='add'>+#define bfin_read_TIMER7_WIDTH()             bfin_read32(TIMER7_WIDTH)</div><div class='add'>+#define bfin_write_TIMER7_WIDTH(val)         bfin_write32(TIMER7_WIDTH, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Two Wire Interface Registers (TWI0) */</div><div class='add'>+</div><div class='add'>+/* SPORT1 Registers */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* SMC Registers */</div><div class='add'>+#define bfin_read_SMC_GCTL() bfin_read32(SMC_GCTL)</div><div class='add'>+#define bfin_write_SMC_GCTL(val) bfin_write32(SMC_GCTL, val)</div><div class='add'>+#define bfin_read_SMC_GSTAT() bfin_read32(SMC_GSTAT)</div><div class='add'>+#define bfin_read_SMC_B0CTL() bfin_read32(SMC_B0CTL)</div><div class='add'>+#define bfin_write_SMC_B0CTL(val) bfin_write32(SMC_B0CTL, val)</div><div class='add'>+#define bfin_read_SMC_B0TIM() bfin_read32(SMC_B0TIM)</div><div class='add'>+#define bfin_write_SMC_B0TIM(val) bfin_write32(SMC_B0TIM, val)</div><div class='add'>+#define bfin_read_SMC_B0ETIM() bfin_read32(SMC_B0ETIM)</div><div class='add'>+#define bfin_write_SMC_B0ETIM(val) bfin_write32(SMC_B0ETIM, val)</div><div class='add'>+#define bfin_read_SMC_B1CTL() bfin_read32(SMC_B1CTL)</div><div class='add'>+#define bfin_write_SMC_B1CTL(val) bfin_write32(SMC_B1CTL, val)</div><div class='add'>+#define bfin_read_SMC_B1TIM() bfin_read32(SMC_B1TIM)</div><div class='add'>+#define bfin_write_SMC_B1TIM(val) bfin_write32(SMC_B1TIM, val)</div><div class='add'>+#define bfin_read_SMC_B1ETIM() bfin_read32(SMC_B1ETIM)</div><div class='add'>+#define bfin_write_SMC_B1ETIM(val) bfin_write32(SMC_B1ETIM, val)</div><div class='add'>+#define bfin_read_SMC_B2CTL() bfin_read32(SMC_B2CTL)</div><div class='add'>+#define bfin_write_SMC_B2CTL(val) bfin_write32(SMC_B2CTL, val)</div><div class='add'>+#define bfin_read_SMC_B2TIM() bfin_read32(SMC_B2TIM)</div><div class='add'>+#define bfin_write_SMC_B2TIM(val) bfin_write32(SMC_B2TIM, val)</div><div class='add'>+#define bfin_read_SMC_B2ETIM() bfin_read32(SMC_B2ETIM)</div><div class='add'>+#define bfin_write_SMC_B2ETIM(val) bfin_write32(SMC_B2ETIM, val)</div><div class='add'>+#define bfin_read_SMC_B3CTL() bfin_read32(SMC_B3CTL)</div><div class='add'>+#define bfin_write_SMC_B3CTL(val) bfin_write32(SMC_B3CTL, val)</div><div class='add'>+#define bfin_read_SMC_B3TIM() bfin_read32(SMC_B3TIM)</div><div class='add'>+#define bfin_write_SMC_B3TIM(val) bfin_write32(SMC_B3TIM, val)</div><div class='add'>+#define bfin_read_SMC_B3ETIM() bfin_read32(SMC_B3ETIM)</div><div class='add'>+#define bfin_write_SMC_B3ETIM(val) bfin_write32(SMC_B3ETIM, val)</div><div class='add'>+</div><div class='add'>+/* DDR2 Memory Control Registers */</div><div class='add'>+#define bfin_read_DMC0_CFG() bfin_read32(DMC0_CFG)</div><div class='add'>+#define bfin_write_DMC0_CFG(val) bfin_write32(DMC0_CFG, val)</div><div class='add'>+#define bfin_read_DMC0_TR0() bfin_read32(DMC0_TR0)</div><div class='add'>+#define bfin_write_DMC0_TR0(val) bfin_write32(DMC0_TR0, val)</div><div class='add'>+#define bfin_read_DMC0_TR1() bfin_read32(DMC0_TR1)</div><div class='add'>+#define bfin_write_DMC0_TR1(val) bfin_write32(DMC0_TR1, val)</div><div class='add'>+#define bfin_read_DMC0_TR2() bfin_read32(DMC0_TR2)</div><div class='add'>+#define bfin_write_DMC0_TR2(val) bfin_write32(DMC0_TR2, val)</div><div class='add'>+#define bfin_read_DMC0_MR() bfin_read32(DMC0_MR)</div><div class='add'>+#define bfin_write_DMC0_MR(val) bfin_write32(DMC0_MR, val)</div><div class='add'>+#define bfin_read_DMC0_EMR1() bfin_read32(DMC0_EMR1)</div><div class='add'>+#define bfin_write_DMC0_EMR1(val) bfin_write32(DMC0_EMR1, val)</div><div class='add'>+#define bfin_read_DMC0_CTL() bfin_read32(DMC0_CTL)</div><div class='add'>+#define bfin_write_DMC0_CTL(val) bfin_write32(DMC0_CTL, val)</div><div class='add'>+#define bfin_read_DMC0_STAT() bfin_read32(DMC0_STAT)</div><div class='add'>+#define bfin_write_DMC0_STAT(val) bfin_write32(DMC0_STAT, val)</div><div class='add'>+#define bfin_read_DMC0_DLLCTL() bfin_read32(DMC0_DLLCTL)</div><div class='add'>+#define bfin_write_DMC0_DLLCTL(val) bfin_write32(DMC0_DLLCTL, val)</div><div class='add'>+</div><div class='add'>+/* DDR BankRead and Write Count Registers */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* DMA Channel 0 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA0_NEXT_DESC_PTR() 		bfin_read32(DMA0_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA0_NEXT_DESC_PTR(val) 	bfin_write32(DMA0_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA0_START_ADDR() 		bfin_read32(DMA0_START_ADDR)</div><div class='add'>+#define bfin_write_DMA0_START_ADDR(val) 	bfin_write32(DMA0_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA0_CONFIG()			bfin_read32(DMA0_CONFIG)</div><div class='add'>+#define bfin_write_DMA0_CONFIG(val)		bfin_write32(DMA0_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA0_X_COUNT()		bfin_read32(DMA0_X_COUNT)</div><div class='add'>+#define bfin_write_DMA0_X_COUNT(val)		bfin_write32(DMA0_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA0_X_MODIFY()		bfin_read32(DMA0_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA0_X_MODIFY(val) 		bfin_write32(DMA0_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA0_Y_COUNT()		bfin_read32(DMA0_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA0_Y_COUNT(val)		bfin_write32(DMA0_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA0_Y_MODIFY()		bfin_read32(DMA0_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA0_Y_MODIFY(val) 		bfin_write32(DMA0_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA0_CURR_DESC_PTR() 		bfin_read32(DMA0_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA0_CURR_DESC_PTR(val) 	bfin_write32(DMA0_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA0_PREV_DESC_PTR() 		bfin_read32(DMA0_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA0_PREV_DESC_PTR(val) 	bfin_write32(DMA0_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA0_CURR_ADDR() 		bfin_read32(DMA0_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA0_CURR_ADDR(val) 		bfin_write32(DMA0_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA0_IRQ_STATUS()		bfin_read32(DMA0_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA0_IRQ_STATUS(val)		bfin_write32(DMA0_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA0_CURR_X_COUNT()		bfin_read32(DMA0_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA0_CURR_X_COUNT(val)	bfin_write32(DMA0_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA0_CURR_Y_COUNT()		bfin_read32(DMA0_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA0_CURR_Y_COUNT(val)	bfin_write32(DMA0_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA0_BWL_COUNT()		bfin_read32(DMA0_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA0_BWL_COUNT(val)		bfin_write32(DMA0_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA0_CURR_BWL_COUNT()		bfin_read32(DMA0_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA0_CURR_BWL_COUNT(val)	bfin_write32(DMA0_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA0_BWM_COUNT()		bfin_read32(DMA0_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA0_BWM_COUNT(val)		bfin_write32(DMA0_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA0_CURR_BWM_COUNT()		bfin_read32(DMA0_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA0_CURR_BWM_COUNT(val)	bfin_write32(DMA0_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 1 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA1_NEXT_DESC_PTR() 		bfin_read32(DMA1_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA1_NEXT_DESC_PTR(val) 	bfin_write32(DMA1_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA1_START_ADDR() 		bfin_read32(DMA1_START_ADDR)</div><div class='add'>+#define bfin_write_DMA1_START_ADDR(val) 	bfin_write32(DMA1_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA1_CONFIG()			bfin_read32(DMA1_CONFIG)</div><div class='add'>+#define bfin_write_DMA1_CONFIG(val)		bfin_write32(DMA1_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA1_X_COUNT()		bfin_read32(DMA1_X_COUNT)</div><div class='add'>+#define bfin_write_DMA1_X_COUNT(val)		bfin_write32(DMA1_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA1_X_MODIFY()		bfin_read32(DMA1_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA1_X_MODIFY(val) 		bfin_write32(DMA1_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA1_Y_COUNT()		bfin_read32(DMA1_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA1_Y_COUNT(val)		bfin_write32(DMA1_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA1_Y_MODIFY()		bfin_read32(DMA1_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA1_Y_MODIFY(val) 		bfin_write32(DMA1_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA1_CURR_DESC_PTR() 		bfin_read32(DMA1_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA1_CURR_DESC_PTR(val) 	bfin_write32(DMA1_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA1_PREV_DESC_PTR() 		bfin_read32(DMA1_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA1_PREV_DESC_PTR(val) 	bfin_write32(DMA1_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA1_CURR_ADDR() 		bfin_read32(DMA1_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA1_CURR_ADDR(val) 		bfin_write32(DMA1_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA1_IRQ_STATUS()		bfin_read32(DMA1_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA1_IRQ_STATUS(val)		bfin_write32(DMA1_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA1_CURR_X_COUNT()		bfin_read32(DMA1_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA1_CURR_X_COUNT(val)	bfin_write32(DMA1_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA1_CURR_Y_COUNT()		bfin_read32(DMA1_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA1_CURR_Y_COUNT(val)	bfin_write32(DMA1_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA1_BWL_COUNT()		bfin_read32(DMA1_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA1_BWL_COUNT(val)		bfin_write32(DMA1_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA1_CURR_BWL_COUNT()		bfin_read32(DMA1_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA1_CURR_BWL_COUNT(val)	bfin_write32(DMA1_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA1_BWM_COUNT()		bfin_read32(DMA1_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA1_BWM_COUNT(val)		bfin_write32(DMA1_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA1_CURR_BWM_COUNT()		bfin_read32(DMA1_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA1_CURR_BWM_COUNT(val)	bfin_write32(DMA1_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 2 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA2_NEXT_DESC_PTR() 		bfin_read32(DMA2_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA2_NEXT_DESC_PTR(val) 	bfin_write32(DMA2_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA2_START_ADDR() 		bfin_read32(DMA2_START_ADDR)</div><div class='add'>+#define bfin_write_DMA2_START_ADDR(val) 	bfin_write32(DMA2_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA2_CONFIG()			bfin_read32(DMA2_CONFIG)</div><div class='add'>+#define bfin_write_DMA2_CONFIG(val)		bfin_write32(DMA2_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA2_X_COUNT()		bfin_read32(DMA2_X_COUNT)</div><div class='add'>+#define bfin_write_DMA2_X_COUNT(val)		bfin_write32(DMA2_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA2_X_MODIFY()		bfin_read32(DMA2_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA2_X_MODIFY(val) 		bfin_write32(DMA2_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA2_Y_COUNT()		bfin_read32(DMA2_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA2_Y_COUNT(val)		bfin_write32(DMA2_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA2_Y_MODIFY()		bfin_read32(DMA2_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA2_Y_MODIFY(val) 		bfin_write32(DMA2_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA2_CURR_DESC_PTR() 		bfin_read32(DMA2_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA2_CURR_DESC_PTR(val) 	bfin_write32(DMA2_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA2_PREV_DESC_PTR() 		bfin_read32(DMA2_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA2_PREV_DESC_PTR(val) 	bfin_write32(DMA2_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA2_CURR_ADDR() 		bfin_read32(DMA2_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA2_CURR_ADDR(val) 		bfin_write32(DMA2_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA2_IRQ_STATUS()		bfin_read32(DMA2_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA2_IRQ_STATUS(val)		bfin_write32(DMA2_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA2_CURR_X_COUNT()		bfin_read32(DMA2_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA2_CURR_X_COUNT(val)	bfin_write32(DMA2_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA2_CURR_Y_COUNT()		bfin_read32(DMA2_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA2_CURR_Y_COUNT(val)	bfin_write32(DMA2_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA2_BWL_COUNT()		bfin_read32(DMA2_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA2_BWL_COUNT(val)		bfin_write32(DMA2_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA2_CURR_BWL_COUNT()		bfin_read32(DMA2_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA2_CURR_BWL_COUNT(val)	bfin_write32(DMA2_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA2_BWM_COUNT()		bfin_read32(DMA2_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA2_BWM_COUNT(val)		bfin_write32(DMA2_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA2_CURR_BWM_COUNT()		bfin_read32(DMA2_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA2_CURR_BWM_COUNT(val)	bfin_write32(DMA2_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 3 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA3_NEXT_DESC_PTR() 		bfin_read32(DMA3_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA3_NEXT_DESC_PTR(val) 	bfin_write32(DMA3_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA3_START_ADDR() 		bfin_read32(DMA3_START_ADDR)</div><div class='add'>+#define bfin_write_DMA3_START_ADDR(val) 	bfin_write32(DMA3_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA3_CONFIG()			bfin_read32(DMA3_CONFIG)</div><div class='add'>+#define bfin_write_DMA3_CONFIG(val)		bfin_write32(DMA3_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA3_X_COUNT()		bfin_read32(DMA3_X_COUNT)</div><div class='add'>+#define bfin_write_DMA3_X_COUNT(val)		bfin_write32(DMA3_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA3_X_MODIFY()		bfin_read32(DMA3_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA3_X_MODIFY(val) 		bfin_write32(DMA3_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA3_Y_COUNT()		bfin_read32(DMA3_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA3_Y_COUNT(val)		bfin_write32(DMA3_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA3_Y_MODIFY()		bfin_read32(DMA3_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA3_Y_MODIFY(val) 		bfin_write32(DMA3_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA3_CURR_DESC_PTR() 		bfin_read32(DMA3_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA3_CURR_DESC_PTR(val) 	bfin_write32(DMA3_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA3_PREV_DESC_PTR() 		bfin_read32(DMA3_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA3_PREV_DESC_PTR(val) 	bfin_write32(DMA3_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA3_CURR_ADDR() 		bfin_read32(DMA3_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA3_CURR_ADDR(val) 		bfin_write32(DMA3_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA3_IRQ_STATUS()		bfin_read32(DMA3_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA3_IRQ_STATUS(val)		bfin_write32(DMA3_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA3_CURR_X_COUNT()		bfin_read32(DMA3_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA3_CURR_X_COUNT(val)	bfin_write32(DMA3_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA3_CURR_Y_COUNT()		bfin_read32(DMA3_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA3_CURR_Y_COUNT(val)	bfin_write32(DMA3_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA3_BWL_COUNT()		bfin_read32(DMA3_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA3_BWL_COUNT(val)		bfin_write32(DMA3_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA3_CURR_BWL_COUNT()		bfin_read32(DMA3_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA3_CURR_BWL_COUNT(val)	bfin_write32(DMA3_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA3_BWM_COUNT()		bfin_read32(DMA3_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA3_BWM_COUNT(val)		bfin_write32(DMA3_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA3_CURR_BWM_COUNT()		bfin_read32(DMA3_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA3_CURR_BWM_COUNT(val)	bfin_write32(DMA3_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 4 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA4_NEXT_DESC_PTR() 		bfin_read32(DMA4_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA4_NEXT_DESC_PTR(val) 	bfin_write32(DMA4_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA4_START_ADDR() 		bfin_read32(DMA4_START_ADDR)</div><div class='add'>+#define bfin_write_DMA4_START_ADDR(val) 	bfin_write32(DMA4_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA4_CONFIG()			bfin_read32(DMA4_CONFIG)</div><div class='add'>+#define bfin_write_DMA4_CONFIG(val)		bfin_write32(DMA4_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA4_X_COUNT()		bfin_read32(DMA4_X_COUNT)</div><div class='add'>+#define bfin_write_DMA4_X_COUNT(val)		bfin_write32(DMA4_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA4_X_MODIFY()		bfin_read32(DMA4_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA4_X_MODIFY(val) 		bfin_write32(DMA4_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA4_Y_COUNT()		bfin_read32(DMA4_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA4_Y_COUNT(val)		bfin_write32(DMA4_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA4_Y_MODIFY()		bfin_read32(DMA4_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA4_Y_MODIFY(val) 		bfin_write32(DMA4_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA4_CURR_DESC_PTR() 		bfin_read32(DMA4_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA4_CURR_DESC_PTR(val) 	bfin_write32(DMA4_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA4_PREV_DESC_PTR() 		bfin_read32(DMA4_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA4_PREV_DESC_PTR(val) 	bfin_write32(DMA4_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA4_CURR_ADDR() 		bfin_read32(DMA4_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA4_CURR_ADDR(val) 		bfin_write32(DMA4_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA4_IRQ_STATUS()		bfin_read32(DMA4_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA4_IRQ_STATUS(val)		bfin_write32(DMA4_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA4_CURR_X_COUNT()		bfin_read32(DMA4_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA4_CURR_X_COUNT(val)	bfin_write32(DMA4_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA4_CURR_Y_COUNT()		bfin_read32(DMA4_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA4_CURR_Y_COUNT(val)	bfin_write32(DMA4_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA4_BWL_COUNT()		bfin_read32(DMA4_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA4_BWL_COUNT(val)		bfin_write32(DMA4_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA4_CURR_BWL_COUNT()		bfin_read32(DMA4_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA4_CURR_BWL_COUNT(val)	bfin_write32(DMA4_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA4_BWM_COUNT()		bfin_read32(DMA4_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA4_BWM_COUNT(val)		bfin_write32(DMA4_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA4_CURR_BWM_COUNT()		bfin_read32(DMA4_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA4_CURR_BWM_COUNT(val)	bfin_write32(DMA4_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 5 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA5_NEXT_DESC_PTR() 		bfin_read32(DMA5_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA5_NEXT_DESC_PTR(val) 	bfin_write32(DMA5_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA5_START_ADDR() 		bfin_read32(DMA5_START_ADDR)</div><div class='add'>+#define bfin_write_DMA5_START_ADDR(val) 	bfin_write32(DMA5_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA5_CONFIG()			bfin_read32(DMA5_CONFIG)</div><div class='add'>+#define bfin_write_DMA5_CONFIG(val)		bfin_write32(DMA5_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA5_X_COUNT()		bfin_read32(DMA5_X_COUNT)</div><div class='add'>+#define bfin_write_DMA5_X_COUNT(val)		bfin_write32(DMA5_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA5_X_MODIFY()		bfin_read32(DMA5_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA5_X_MODIFY(val) 		bfin_write32(DMA5_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA5_Y_COUNT()		bfin_read32(DMA5_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA5_Y_COUNT(val)		bfin_write32(DMA5_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA5_Y_MODIFY()		bfin_read32(DMA5_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA5_Y_MODIFY(val) 		bfin_write32(DMA5_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA5_CURR_DESC_PTR() 		bfin_read32(DMA5_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA5_CURR_DESC_PTR(val) 	bfin_write32(DMA5_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA5_PREV_DESC_PTR() 		bfin_read32(DMA5_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA5_PREV_DESC_PTR(val) 	bfin_write32(DMA5_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA5_CURR_ADDR() 		bfin_read32(DMA5_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA5_CURR_ADDR(val) 		bfin_write32(DMA5_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA5_IRQ_STATUS()		bfin_read32(DMA5_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA5_IRQ_STATUS(val)		bfin_write32(DMA5_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA5_CURR_X_COUNT()		bfin_read32(DMA5_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA5_CURR_X_COUNT(val)	bfin_write32(DMA5_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA5_CURR_Y_COUNT()		bfin_read32(DMA5_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA5_CURR_Y_COUNT(val)	bfin_write32(DMA5_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA5_BWL_COUNT()		bfin_read32(DMA5_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA5_BWL_COUNT(val)		bfin_write32(DMA5_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA5_CURR_BWL_COUNT()		bfin_read32(DMA5_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA5_CURR_BWL_COUNT(val)	bfin_write32(DMA5_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA5_BWM_COUNT()		bfin_read32(DMA5_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA5_BWM_COUNT(val)		bfin_write32(DMA5_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA5_CURR_BWM_COUNT()		bfin_read32(DMA5_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA5_CURR_BWM_COUNT(val)	bfin_write32(DMA5_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 6 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA6_NEXT_DESC_PTR() 		bfin_read32(DMA6_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA6_NEXT_DESC_PTR(val) 	bfin_write32(DMA6_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA6_START_ADDR() 		bfin_read32(DMA6_START_ADDR)</div><div class='add'>+#define bfin_write_DMA6_START_ADDR(val) 	bfin_write32(DMA6_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA6_CONFIG()			bfin_read32(DMA6_CONFIG)</div><div class='add'>+#define bfin_write_DMA6_CONFIG(val)		bfin_write32(DMA6_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA6_X_COUNT()		bfin_read32(DMA6_X_COUNT)</div><div class='add'>+#define bfin_write_DMA6_X_COUNT(val)		bfin_write32(DMA6_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA6_X_MODIFY()		bfin_read32(DMA6_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA6_X_MODIFY(val) 		bfin_write32(DMA6_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA6_Y_COUNT()		bfin_read32(DMA6_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA6_Y_COUNT(val)		bfin_write32(DMA6_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA6_Y_MODIFY()		bfin_read32(DMA6_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA6_Y_MODIFY(val) 		bfin_write32(DMA6_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA6_CURR_DESC_PTR() 		bfin_read32(DMA6_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA6_CURR_DESC_PTR(val) 	bfin_write32(DMA6_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA6_PREV_DESC_PTR() 		bfin_read32(DMA6_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA6_PREV_DESC_PTR(val) 	bfin_write32(DMA6_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA6_CURR_ADDR() 		bfin_read32(DMA6_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA6_CURR_ADDR(val) 		bfin_write32(DMA6_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA6_IRQ_STATUS()		bfin_read32(DMA6_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA6_IRQ_STATUS(val)		bfin_write32(DMA6_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA6_CURR_X_COUNT()		bfin_read32(DMA6_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA6_CURR_X_COUNT(val)	bfin_write32(DMA6_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA6_CURR_Y_COUNT()		bfin_read32(DMA6_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA6_CURR_Y_COUNT(val)	bfin_write32(DMA6_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA6_BWL_COUNT()		bfin_read32(DMA6_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA6_BWL_COUNT(val)		bfin_write32(DMA6_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA6_CURR_BWL_COUNT()		bfin_read32(DMA6_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA6_CURR_BWL_COUNT(val)	bfin_write32(DMA6_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA6_BWM_COUNT()		bfin_read32(DMA6_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA6_BWM_COUNT(val)		bfin_write32(DMA6_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA6_CURR_BWM_COUNT()		bfin_read32(DMA6_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA6_CURR_BWM_COUNT(val)	bfin_write32(DMA6_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 7 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA7_NEXT_DESC_PTR() 		bfin_read32(DMA7_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA7_NEXT_DESC_PTR(val) 	bfin_write32(DMA7_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA7_START_ADDR() 		bfin_read32(DMA7_START_ADDR)</div><div class='add'>+#define bfin_write_DMA7_START_ADDR(val) 	bfin_write32(DMA7_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA7_CONFIG()			bfin_read32(DMA7_CONFIG)</div><div class='add'>+#define bfin_write_DMA7_CONFIG(val)		bfin_write32(DMA7_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA7_X_COUNT()		bfin_read32(DMA7_X_COUNT)</div><div class='add'>+#define bfin_write_DMA7_X_COUNT(val)		bfin_write32(DMA7_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA7_X_MODIFY()		bfin_read32(DMA7_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA7_X_MODIFY(val) 		bfin_write32(DMA7_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA7_Y_COUNT()		bfin_read32(DMA7_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA7_Y_COUNT(val)		bfin_write32(DMA7_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA7_Y_MODIFY()		bfin_read32(DMA7_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA7_Y_MODIFY(val) 		bfin_write32(DMA7_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA7_CURR_DESC_PTR() 		bfin_read32(DMA7_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA7_CURR_DESC_PTR(val) 	bfin_write32(DMA7_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA7_PREV_DESC_PTR() 		bfin_read32(DMA7_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA7_PREV_DESC_PTR(val) 	bfin_write32(DMA7_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA7_CURR_ADDR() 		bfin_read32(DMA7_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA7_CURR_ADDR(val) 		bfin_write32(DMA7_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA7_IRQ_STATUS()		bfin_read32(DMA7_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA7_IRQ_STATUS(val)		bfin_write32(DMA7_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA7_CURR_X_COUNT()		bfin_read32(DMA7_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA7_CURR_X_COUNT(val)	bfin_write32(DMA7_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA7_CURR_Y_COUNT()		bfin_read32(DMA7_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA7_CURR_Y_COUNT(val)	bfin_write32(DMA7_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA7_BWL_COUNT()		bfin_read32(DMA7_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA7_BWL_COUNT(val)		bfin_write32(DMA7_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA7_CURR_BWL_COUNT()		bfin_read32(DMA7_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA7_CURR_BWL_COUNT(val)	bfin_write32(DMA7_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA7_BWM_COUNT()		bfin_read32(DMA7_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA7_BWM_COUNT(val)		bfin_write32(DMA7_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA7_CURR_BWM_COUNT()		bfin_read32(DMA7_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA7_CURR_BWM_COUNT(val)	bfin_write32(DMA7_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 8 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA8_NEXT_DESC_PTR() 		bfin_read32(DMA8_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA8_NEXT_DESC_PTR(val) 	bfin_write32(DMA8_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA8_START_ADDR() 		bfin_read32(DMA8_START_ADDR)</div><div class='add'>+#define bfin_write_DMA8_START_ADDR(val) 	bfin_write32(DMA8_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA8_CONFIG()			bfin_read32(DMA8_CONFIG)</div><div class='add'>+#define bfin_write_DMA8_CONFIG(val)		bfin_write32(DMA8_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA8_X_COUNT()		bfin_read32(DMA8_X_COUNT)</div><div class='add'>+#define bfin_write_DMA8_X_COUNT(val)		bfin_write32(DMA8_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA8_X_MODIFY()		bfin_read32(DMA8_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA8_X_MODIFY(val) 		bfin_write32(DMA8_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA8_Y_COUNT()		bfin_read32(DMA8_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA8_Y_COUNT(val)		bfin_write32(DMA8_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA8_Y_MODIFY()		bfin_read32(DMA8_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA8_Y_MODIFY(val) 		bfin_write32(DMA8_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA8_CURR_DESC_PTR() 		bfin_read32(DMA8_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA8_CURR_DESC_PTR(val) 	bfin_write32(DMA8_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA8_PREV_DESC_PTR() 		bfin_read32(DMA8_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA8_PREV_DESC_PTR(val) 	bfin_write32(DMA8_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA8_CURR_ADDR() 		bfin_read32(DMA8_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA8_CURR_ADDR(val) 		bfin_write32(DMA8_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA8_IRQ_STATUS()		bfin_read32(DMA8_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA8_IRQ_STATUS(val)		bfin_write32(DMA8_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA8_CURR_X_COUNT()		bfin_read32(DMA8_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA8_CURR_X_COUNT(val)	bfin_write32(DMA8_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA8_CURR_Y_COUNT()		bfin_read32(DMA8_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA8_CURR_Y_COUNT(val)	bfin_write32(DMA8_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA8_BWL_COUNT()		bfin_read32(DMA8_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA8_BWL_COUNT(val)		bfin_write32(DMA8_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA8_CURR_BWL_COUNT()		bfin_read32(DMA8_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA8_CURR_BWL_COUNT(val)	bfin_write32(DMA8_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA8_BWM_COUNT()		bfin_read32(DMA8_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA8_BWM_COUNT(val)		bfin_write32(DMA8_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA8_CURR_BWM_COUNT()		bfin_read32(DMA8_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA8_CURR_BWM_COUNT(val)	bfin_write32(DMA8_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 9 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA9_NEXT_DESC_PTR() 		bfin_read32(DMA9_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA9_NEXT_DESC_PTR(val) 	bfin_write32(DMA9_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA9_START_ADDR() 		bfin_read32(DMA9_START_ADDR)</div><div class='add'>+#define bfin_write_DMA9_START_ADDR(val) 	bfin_write32(DMA9_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA9_CONFIG()			bfin_read32(DMA9_CONFIG)</div><div class='add'>+#define bfin_write_DMA9_CONFIG(val)		bfin_write32(DMA9_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA9_X_COUNT()		bfin_read32(DMA9_X_COUNT)</div><div class='add'>+#define bfin_write_DMA9_X_COUNT(val)		bfin_write32(DMA9_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA9_X_MODIFY()		bfin_read32(DMA9_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA9_X_MODIFY(val) 		bfin_write32(DMA9_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA9_Y_COUNT()		bfin_read32(DMA9_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA9_Y_COUNT(val)		bfin_write32(DMA9_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA9_Y_MODIFY()		bfin_read32(DMA9_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA9_Y_MODIFY(val) 		bfin_write32(DMA9_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA9_CURR_DESC_PTR() 		bfin_read32(DMA9_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA9_CURR_DESC_PTR(val) 	bfin_write32(DMA9_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA9_PREV_DESC_PTR() 		bfin_read32(DMA9_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA9_PREV_DESC_PTR(val) 	bfin_write32(DMA9_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA9_CURR_ADDR() 		bfin_read32(DMA9_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA9_CURR_ADDR(val) 		bfin_write32(DMA9_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA9_IRQ_STATUS()		bfin_read32(DMA9_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA9_IRQ_STATUS(val)		bfin_write32(DMA9_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA9_CURR_X_COUNT()		bfin_read32(DMA9_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA9_CURR_X_COUNT(val)	bfin_write32(DMA9_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA9_CURR_Y_COUNT()		bfin_read32(DMA9_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA9_CURR_Y_COUNT(val)	bfin_write32(DMA9_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA9_BWL_COUNT()		bfin_read32(DMA9_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA9_BWL_COUNT(val)		bfin_write32(DMA9_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA9_CURR_BWL_COUNT()		bfin_read32(DMA9_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA9_CURR_BWL_COUNT(val)	bfin_write32(DMA9_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA9_BWM_COUNT()		bfin_read32(DMA9_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA9_BWM_COUNT(val)		bfin_write32(DMA9_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA9_CURR_BWM_COUNT()		bfin_read32(DMA9_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA9_CURR_BWM_COUNT(val)	bfin_write32(DMA9_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 10 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA10_NEXT_DESC_PTR() 	bfin_read32(DMA10_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA10_NEXT_DESC_PTR(val) 	bfin_write32(DMA10_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA10_START_ADDR() 		bfin_read32(DMA10_START_ADDR)</div><div class='add'>+#define bfin_write_DMA10_START_ADDR(val) 	bfin_write32(DMA10_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA10_CONFIG()		bfin_read32(DMA10_CONFIG)</div><div class='add'>+#define bfin_write_DMA10_CONFIG(val)		bfin_write32(DMA10_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA10_X_COUNT()		bfin_read32(DMA10_X_COUNT)</div><div class='add'>+#define bfin_write_DMA10_X_COUNT(val)		bfin_write32(DMA10_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA10_X_MODIFY()		bfin_read32(DMA10_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA10_X_MODIFY(val) 		bfin_write32(DMA10_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA10_Y_COUNT()		bfin_read32(DMA10_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA10_Y_COUNT(val)		bfin_write32(DMA10_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA10_Y_MODIFY()		bfin_read32(DMA10_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA10_Y_MODIFY(val) 		bfin_write32(DMA10_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA10_CURR_DESC_PTR() 	bfin_read32(DMA10_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA10_CURR_DESC_PTR(val) 	bfin_write32(DMA10_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA10_PREV_DESC_PTR() 	bfin_read32(DMA10_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA10_PREV_DESC_PTR(val) 	bfin_write32(DMA10_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA10_CURR_ADDR() 		bfin_read32(DMA10_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA10_CURR_ADDR(val) 	bfin_write32(DMA10_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA10_IRQ_STATUS()		bfin_read32(DMA10_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA10_IRQ_STATUS(val)	bfin_write32(DMA10_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA10_CURR_X_COUNT()		bfin_read32(DMA10_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA10_CURR_X_COUNT(val)	bfin_write32(DMA10_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA10_CURR_Y_COUNT()		bfin_read32(DMA10_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA10_CURR_Y_COUNT(val)	bfin_write32(DMA10_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA10_BWL_COUNT()		bfin_read32(DMA10_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA10_BWL_COUNT(val)		bfin_write32(DMA10_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA10_CURR_BWL_COUNT()	bfin_read32(DMA10_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA10_CURR_BWL_COUNT(val)	bfin_write32(DMA10_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA10_BWM_COUNT()		bfin_read32(DMA10_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA10_BWM_COUNT(val)		bfin_write32(DMA10_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA10_CURR_BWM_COUNT()	bfin_read32(DMA10_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA10_CURR_BWM_COUNT(val)	bfin_write32(DMA10_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 11 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA11_NEXT_DESC_PTR() 	bfin_read32(DMA11_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA11_NEXT_DESC_PTR(val) 	bfin_write32(DMA11_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA11_START_ADDR() 		bfin_read32(DMA11_START_ADDR)</div><div class='add'>+#define bfin_write_DMA11_START_ADDR(val) 	bfin_write32(DMA11_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA11_CONFIG()		bfin_read32(DMA11_CONFIG)</div><div class='add'>+#define bfin_write_DMA11_CONFIG(val)		bfin_write32(DMA11_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA11_X_COUNT()		bfin_read32(DMA11_X_COUNT)</div><div class='add'>+#define bfin_write_DMA11_X_COUNT(val)		bfin_write32(DMA11_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA11_X_MODIFY()		bfin_read32(DMA11_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA11_X_MODIFY(val) 		bfin_write32(DMA11_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA11_Y_COUNT()		bfin_read32(DMA11_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA11_Y_COUNT(val)		bfin_write32(DMA11_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA11_Y_MODIFY()		bfin_read32(DMA11_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA11_Y_MODIFY(val) 		bfin_write32(DMA11_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA11_CURR_DESC_PTR() 	bfin_read32(DMA11_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA11_CURR_DESC_PTR(val) 	bfin_write32(DMA11_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA11_PREV_DESC_PTR() 	bfin_read32(DMA11_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA11_PREV_DESC_PTR(val) 	bfin_write32(DMA11_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA11_CURR_ADDR() 		bfin_read32(DMA11_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA11_CURR_ADDR(val) 	bfin_write32(DMA11_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA11_IRQ_STATUS()		bfin_read32(DMA11_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA11_IRQ_STATUS(val)	bfin_write32(DMA11_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA11_CURR_X_COUNT()		bfin_read32(DMA11_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA11_CURR_X_COUNT(val)	bfin_write32(DMA11_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA11_CURR_Y_COUNT()		bfin_read32(DMA11_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA11_CURR_Y_COUNT(val)	bfin_write32(DMA11_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA11_BWL_COUNT()		bfin_read32(DMA11_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA11_BWL_COUNT(val)		bfin_write32(DMA11_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA11_CURR_BWL_COUNT()	bfin_read32(DMA11_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA11_CURR_BWL_COUNT(val)	bfin_write32(DMA11_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA11_BWM_COUNT()		bfin_read32(DMA11_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA11_BWM_COUNT(val)		bfin_write32(DMA11_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA11_CURR_BWM_COUNT()	bfin_read32(DMA11_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA11_CURR_BWM_COUNT(val)	bfin_write32(DMA11_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 12 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA12_NEXT_DESC_PTR() 	bfin_read32(DMA12_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA12_NEXT_DESC_PTR(val) 	bfin_write32(DMA12_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA12_START_ADDR() 		bfin_read32(DMA12_START_ADDR)</div><div class='add'>+#define bfin_write_DMA12_START_ADDR(val) 	bfin_write32(DMA12_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA12_CONFIG()		bfin_read32(DMA12_CONFIG)</div><div class='add'>+#define bfin_write_DMA12_CONFIG(val)		bfin_write32(DMA12_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA12_X_COUNT()		bfin_read32(DMA12_X_COUNT)</div><div class='add'>+#define bfin_write_DMA12_X_COUNT(val)		bfin_write32(DMA12_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA12_X_MODIFY()		bfin_read32(DMA12_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA12_X_MODIFY(val) 		bfin_write32(DMA12_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA12_Y_COUNT()		bfin_read32(DMA12_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA12_Y_COUNT(val)		bfin_write32(DMA12_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA12_Y_MODIFY()		bfin_read32(DMA12_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA12_Y_MODIFY(val) 		bfin_write32(DMA12_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA12_CURR_DESC_PTR() 	bfin_read32(DMA12_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA12_CURR_DESC_PTR(val) 	bfin_write32(DMA12_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA12_PREV_DESC_PTR() 	bfin_read32(DMA12_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA12_PREV_DESC_PTR(val) 	bfin_write32(DMA12_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA12_CURR_ADDR() 		bfin_read32(DMA12_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA12_CURR_ADDR(val) 	bfin_write32(DMA12_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA12_IRQ_STATUS()		bfin_read32(DMA12_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA12_IRQ_STATUS(val)	bfin_write32(DMA12_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA12_CURR_X_COUNT()		bfin_read32(DMA12_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA12_CURR_X_COUNT(val)	bfin_write32(DMA12_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA12_CURR_Y_COUNT()		bfin_read32(DMA12_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA12_CURR_Y_COUNT(val)	bfin_write32(DMA12_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA12_BWL_COUNT()		bfin_read32(DMA12_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA12_BWL_COUNT(val)		bfin_write32(DMA12_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA12_CURR_BWL_COUNT()	bfin_read32(DMA12_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA12_CURR_BWL_COUNT(val)	bfin_write32(DMA12_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA12_BWM_COUNT()		bfin_read32(DMA12_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA12_BWM_COUNT(val)		bfin_write32(DMA12_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA12_CURR_BWM_COUNT()	bfin_read32(DMA12_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA12_CURR_BWM_COUNT(val)	bfin_write32(DMA12_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 13 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA13_NEXT_DESC_PTR() 	bfin_read32(DMA13_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA13_NEXT_DESC_PTR(val) 	bfin_write32(DMA13_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA13_START_ADDR() 		bfin_read32(DMA13_START_ADDR)</div><div class='add'>+#define bfin_write_DMA13_START_ADDR(val) 	bfin_write32(DMA13_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA13_CONFIG()		bfin_read32(DMA13_CONFIG)</div><div class='add'>+#define bfin_write_DMA13_CONFIG(val)		bfin_write32(DMA13_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA13_X_COUNT()		bfin_read32(DMA13_X_COUNT)</div><div class='add'>+#define bfin_write_DMA13_X_COUNT(val)		bfin_write32(DMA13_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA13_X_MODIFY()		bfin_read32(DMA13_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA13_X_MODIFY(val) 		bfin_write32(DMA13_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA13_Y_COUNT()		bfin_read32(DMA13_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA13_Y_COUNT(val)		bfin_write32(DMA13_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA13_Y_MODIFY()		bfin_read32(DMA13_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA13_Y_MODIFY(val) 		bfin_write32(DMA13_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA13_CURR_DESC_PTR() 	bfin_read32(DMA13_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA13_CURR_DESC_PTR(val) 	bfin_write32(DMA13_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA13_PREV_DESC_PTR() 	bfin_read32(DMA13_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA13_PREV_DESC_PTR(val) 	bfin_write32(DMA13_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA13_CURR_ADDR() 		bfin_read32(DMA13_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA13_CURR_ADDR(val) 	bfin_write32(DMA13_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA13_IRQ_STATUS()		bfin_read32(DMA13_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA13_IRQ_STATUS(val)	bfin_write32(DMA13_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA13_CURR_X_COUNT()		bfin_read32(DMA13_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA13_CURR_X_COUNT(val)	bfin_write32(DMA13_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA13_CURR_Y_COUNT()		bfin_read32(DMA13_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA13_CURR_Y_COUNT(val)	bfin_write32(DMA13_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA13_BWL_COUNT()		bfin_read32(DMA13_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA13_BWL_COUNT(val)		bfin_write32(DMA13_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA13_CURR_BWL_COUNT()	bfin_read32(DMA13_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA13_CURR_BWL_COUNT(val)	bfin_write32(DMA13_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA13_BWM_COUNT()		bfin_read32(DMA13_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA13_BWM_COUNT(val)		bfin_write32(DMA13_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA13_CURR_BWM_COUNT()	bfin_read32(DMA13_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA13_CURR_BWM_COUNT(val)	bfin_write32(DMA13_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 14 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA14_NEXT_DESC_PTR() 	bfin_read32(DMA14_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA14_NEXT_DESC_PTR(val) 	bfin_write32(DMA14_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA14_START_ADDR() 		bfin_read32(DMA14_START_ADDR)</div><div class='add'>+#define bfin_write_DMA14_START_ADDR(val) 	bfin_write32(DMA14_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA14_CONFIG()		bfin_read32(DMA14_CONFIG)</div><div class='add'>+#define bfin_write_DMA14_CONFIG(val)		bfin_write32(DMA14_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA14_X_COUNT()		bfin_read32(DMA14_X_COUNT)</div><div class='add'>+#define bfin_write_DMA14_X_COUNT(val)		bfin_write32(DMA14_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA14_X_MODIFY()		bfin_read32(DMA14_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA14_X_MODIFY(val) 		bfin_write32(DMA14_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA14_Y_COUNT()		bfin_read32(DMA14_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA14_Y_COUNT(val)		bfin_write32(DMA14_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA14_Y_MODIFY()		bfin_read32(DMA14_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA14_Y_MODIFY(val) 		bfin_write32(DMA14_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA14_CURR_DESC_PTR() 	bfin_read32(DMA14_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA14_CURR_DESC_PTR(val) 	bfin_write32(DMA14_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA14_PREV_DESC_PTR() 	bfin_read32(DMA14_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA14_PREV_DESC_PTR(val) 	bfin_write32(DMA14_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA14_CURR_ADDR() 		bfin_read32(DMA14_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA14_CURR_ADDR(val) 	bfin_write32(DMA14_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA14_IRQ_STATUS()		bfin_read32(DMA14_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA14_IRQ_STATUS(val)	bfin_write32(DMA14_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA14_CURR_X_COUNT()		bfin_read32(DMA14_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA14_CURR_X_COUNT(val)	bfin_write32(DMA14_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA14_CURR_Y_COUNT()		bfin_read32(DMA14_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA14_CURR_Y_COUNT(val)	bfin_write32(DMA14_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA14_BWL_COUNT()		bfin_read32(DMA14_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA14_BWL_COUNT(val)		bfin_write32(DMA14_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA14_CURR_BWL_COUNT()	bfin_read32(DMA14_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA14_CURR_BWL_COUNT(val)	bfin_write32(DMA14_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA14_BWM_COUNT()		bfin_read32(DMA14_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA14_BWM_COUNT(val)		bfin_write32(DMA14_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA14_CURR_BWM_COUNT()	bfin_read32(DMA14_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA14_CURR_BWM_COUNT(val)	bfin_write32(DMA14_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 15 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA15_NEXT_DESC_PTR() 	bfin_read32(DMA15_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA15_NEXT_DESC_PTR(val) 	bfin_write32(DMA15_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA15_START_ADDR() 		bfin_read32(DMA15_START_ADDR)</div><div class='add'>+#define bfin_write_DMA15_START_ADDR(val) 	bfin_write32(DMA15_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA15_CONFIG()		bfin_read32(DMA15_CONFIG)</div><div class='add'>+#define bfin_write_DMA15_CONFIG(val)		bfin_write32(DMA15_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA15_X_COUNT()		bfin_read32(DMA15_X_COUNT)</div><div class='add'>+#define bfin_write_DMA15_X_COUNT(val)		bfin_write32(DMA15_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA15_X_MODIFY()		bfin_read32(DMA15_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA15_X_MODIFY(val) 		bfin_write32(DMA15_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA15_Y_COUNT()		bfin_read32(DMA15_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA15_Y_COUNT(val)		bfin_write32(DMA15_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA15_Y_MODIFY()		bfin_read32(DMA15_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA15_Y_MODIFY(val) 		bfin_write32(DMA15_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA15_CURR_DESC_PTR() 	bfin_read32(DMA15_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA15_CURR_DESC_PTR(val) 	bfin_write32(DMA15_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA15_PREV_DESC_PTR() 	bfin_read32(DMA15_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA15_PREV_DESC_PTR(val) 	bfin_write32(DMA15_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA15_CURR_ADDR() 		bfin_read32(DMA15_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA15_CURR_ADDR(val) 	bfin_write32(DMA15_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA15_IRQ_STATUS()		bfin_read32(DMA15_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA15_IRQ_STATUS(val)	bfin_write32(DMA15_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA15_CURR_X_COUNT()		bfin_read32(DMA15_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA15_CURR_X_COUNT(val)	bfin_write32(DMA15_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA15_CURR_Y_COUNT()		bfin_read32(DMA15_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA15_CURR_Y_COUNT(val)	bfin_write32(DMA15_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA15_BWL_COUNT()		bfin_read32(DMA15_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA15_BWL_COUNT(val)		bfin_write32(DMA15_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA15_CURR_BWL_COUNT()	bfin_read32(DMA15_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA15_CURR_BWL_COUNT(val)	bfin_write32(DMA15_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA15_BWM_COUNT()		bfin_read32(DMA15_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA15_BWM_COUNT(val)		bfin_write32(DMA15_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA15_CURR_BWM_COUNT()	bfin_read32(DMA15_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA15_CURR_BWM_COUNT(val)	bfin_write32(DMA15_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 16 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA16_NEXT_DESC_PTR() 	bfin_read32(DMA16_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA16_NEXT_DESC_PTR(val) 	bfin_write32(DMA16_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA16_START_ADDR() 		bfin_read32(DMA16_START_ADDR)</div><div class='add'>+#define bfin_write_DMA16_START_ADDR(val) 	bfin_write32(DMA16_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA16_CONFIG()		bfin_read32(DMA16_CONFIG)</div><div class='add'>+#define bfin_write_DMA16_CONFIG(val)		bfin_write32(DMA16_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA16_X_COUNT()		bfin_read32(DMA16_X_COUNT)</div><div class='add'>+#define bfin_write_DMA16_X_COUNT(val)		bfin_write32(DMA16_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA16_X_MODIFY()		bfin_read32(DMA16_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA16_X_MODIFY(val) 		bfin_write32(DMA16_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA16_Y_COUNT()		bfin_read32(DMA16_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA16_Y_COUNT(val)		bfin_write32(DMA16_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA16_Y_MODIFY()		bfin_read32(DMA16_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA16_Y_MODIFY(val) 		bfin_write32(DMA16_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA16_CURR_DESC_PTR() 	bfin_read32(DMA16_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA16_CURR_DESC_PTR(val) 	bfin_write32(DMA16_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA16_PREV_DESC_PTR() 	bfin_read32(DMA16_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA16_PREV_DESC_PTR(val) 	bfin_write32(DMA16_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA16_CURR_ADDR() 		bfin_read32(DMA16_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA16_CURR_ADDR(val) 	bfin_write32(DMA16_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA16_IRQ_STATUS()		bfin_read32(DMA16_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA16_IRQ_STATUS(val)	bfin_write32(DMA16_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA16_CURR_X_COUNT()		bfin_read32(DMA16_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA16_CURR_X_COUNT(val)	bfin_write32(DMA16_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA16_CURR_Y_COUNT()		bfin_read32(DMA16_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA16_CURR_Y_COUNT(val)	bfin_write32(DMA16_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA16_BWL_COUNT()		bfin_read32(DMA16_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA16_BWL_COUNT(val)		bfin_write32(DMA16_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA16_CURR_BWL_COUNT()	bfin_read32(DMA16_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA16_CURR_BWL_COUNT(val)	bfin_write32(DMA16_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA16_BWM_COUNT()		bfin_read32(DMA16_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA16_BWM_COUNT(val)		bfin_write32(DMA16_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA16_CURR_BWM_COUNT()	bfin_read32(DMA16_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA16_CURR_BWM_COUNT(val)	bfin_write32(DMA16_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 17 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA17_NEXT_DESC_PTR() 	bfin_read32(DMA17_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA17_NEXT_DESC_PTR(val) 	bfin_write32(DMA17_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA17_START_ADDR() 		bfin_read32(DMA17_START_ADDR)</div><div class='add'>+#define bfin_write_DMA17_START_ADDR(val) 	bfin_write32(DMA17_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA17_CONFIG()		bfin_read32(DMA17_CONFIG)</div><div class='add'>+#define bfin_write_DMA17_CONFIG(val)		bfin_write32(DMA17_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA17_X_COUNT()		bfin_read32(DMA17_X_COUNT)</div><div class='add'>+#define bfin_write_DMA17_X_COUNT(val)		bfin_write32(DMA17_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA17_X_MODIFY()		bfin_read32(DMA17_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA17_X_MODIFY(val) 		bfin_write32(DMA17_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA17_Y_COUNT()		bfin_read32(DMA17_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA17_Y_COUNT(val)		bfin_write32(DMA17_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA17_Y_MODIFY()		bfin_read32(DMA17_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA17_Y_MODIFY(val) 		bfin_write32(DMA17_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA17_CURR_DESC_PTR() 	bfin_read32(DMA17_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA17_CURR_DESC_PTR(val) 	bfin_write32(DMA17_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA17_PREV_DESC_PTR() 	bfin_read32(DMA17_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA17_PREV_DESC_PTR(val) 	bfin_write32(DMA17_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA17_CURR_ADDR() 		bfin_read32(DMA17_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA17_CURR_ADDR(val) 	bfin_write32(DMA17_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA17_IRQ_STATUS()		bfin_read32(DMA17_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA17_IRQ_STATUS(val)	bfin_write32(DMA17_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA17_CURR_X_COUNT()		bfin_read32(DMA17_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA17_CURR_X_COUNT(val)	bfin_write32(DMA17_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA17_CURR_Y_COUNT()		bfin_read32(DMA17_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA17_CURR_Y_COUNT(val)	bfin_write32(DMA17_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA17_BWL_COUNT()		bfin_read32(DMA17_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA17_BWL_COUNT(val)		bfin_write32(DMA17_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA17_CURR_BWL_COUNT()	bfin_read32(DMA17_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA17_CURR_BWL_COUNT(val)	bfin_write32(DMA17_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA17_BWM_COUNT()		bfin_read32(DMA17_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA17_BWM_COUNT(val)		bfin_write32(DMA17_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA17_CURR_BWM_COUNT()	bfin_read32(DMA17_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA17_CURR_BWM_COUNT(val)	bfin_write32(DMA17_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 18 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA18_NEXT_DESC_PTR() 	bfin_read32(DMA18_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA18_NEXT_DESC_PTR(val) 	bfin_write32(DMA18_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA18_START_ADDR() 		bfin_read32(DMA18_START_ADDR)</div><div class='add'>+#define bfin_write_DMA18_START_ADDR(val) 	bfin_write32(DMA18_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA18_CONFIG()		bfin_read32(DMA18_CONFIG)</div><div class='add'>+#define bfin_write_DMA18_CONFIG(val)		bfin_write32(DMA18_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA18_X_COUNT()		bfin_read32(DMA18_X_COUNT)</div><div class='add'>+#define bfin_write_DMA18_X_COUNT(val)		bfin_write32(DMA18_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA18_X_MODIFY()		bfin_read32(DMA18_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA18_X_MODIFY(val) 		bfin_write32(DMA18_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA18_Y_COUNT()		bfin_read32(DMA18_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA18_Y_COUNT(val)		bfin_write32(DMA18_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA18_Y_MODIFY()		bfin_read32(DMA18_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA18_Y_MODIFY(val) 		bfin_write32(DMA18_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA18_CURR_DESC_PTR() 	bfin_read32(DMA18_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA18_CURR_DESC_PTR(val) 	bfin_write32(DMA18_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA18_PREV_DESC_PTR() 	bfin_read32(DMA18_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA18_PREV_DESC_PTR(val) 	bfin_write32(DMA18_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA18_CURR_ADDR() 		bfin_read32(DMA18_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA18_CURR_ADDR(val) 	bfin_write32(DMA18_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA18_IRQ_STATUS()		bfin_read32(DMA18_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA18_IRQ_STATUS(val)	bfin_write32(DMA18_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA18_CURR_X_COUNT()		bfin_read32(DMA18_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA18_CURR_X_COUNT(val)	bfin_write32(DMA18_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA18_CURR_Y_COUNT()		bfin_read32(DMA18_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA18_CURR_Y_COUNT(val)	bfin_write32(DMA18_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA18_BWL_COUNT()		bfin_read32(DMA18_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA18_BWL_COUNT(val)		bfin_write32(DMA18_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA18_CURR_BWL_COUNT()	bfin_read32(DMA18_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA18_CURR_BWL_COUNT(val)	bfin_write32(DMA18_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA18_BWM_COUNT()		bfin_read32(DMA18_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA18_BWM_COUNT(val)		bfin_write32(DMA18_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA18_CURR_BWM_COUNT()	bfin_read32(DMA18_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA18_CURR_BWM_COUNT(val)	bfin_write32(DMA18_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 19 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA19_NEXT_DESC_PTR() 	bfin_read32(DMA19_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA19_NEXT_DESC_PTR(val) 	bfin_write32(DMA19_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA19_START_ADDR() 		bfin_read32(DMA19_START_ADDR)</div><div class='add'>+#define bfin_write_DMA19_START_ADDR(val) 	bfin_write32(DMA19_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA19_CONFIG()		bfin_read32(DMA19_CONFIG)</div><div class='add'>+#define bfin_write_DMA19_CONFIG(val)		bfin_write32(DMA19_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA19_X_COUNT()		bfin_read32(DMA19_X_COUNT)</div><div class='add'>+#define bfin_write_DMA19_X_COUNT(val)		bfin_write32(DMA19_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA19_X_MODIFY()		bfin_read32(DMA19_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA19_X_MODIFY(val) 		bfin_write32(DMA19_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA19_Y_COUNT()		bfin_read32(DMA19_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA19_Y_COUNT(val)		bfin_write32(DMA19_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA19_Y_MODIFY()		bfin_read32(DMA19_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA19_Y_MODIFY(val) 		bfin_write32(DMA19_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA19_CURR_DESC_PTR() 	bfin_read32(DMA19_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA19_CURR_DESC_PTR(val) 	bfin_write32(DMA19_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA19_PREV_DESC_PTR() 	bfin_read32(DMA19_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA19_PREV_DESC_PTR(val) 	bfin_write32(DMA19_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA19_CURR_ADDR() 		bfin_read32(DMA19_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA19_CURR_ADDR(val) 	bfin_write32(DMA19_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA19_IRQ_STATUS()		bfin_read32(DMA19_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA19_IRQ_STATUS(val)	bfin_write32(DMA19_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA19_CURR_X_COUNT()		bfin_read32(DMA19_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA19_CURR_X_COUNT(val)	bfin_write32(DMA19_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA19_CURR_Y_COUNT()		bfin_read32(DMA19_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA19_CURR_Y_COUNT(val)	bfin_write32(DMA19_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA19_BWL_COUNT()		bfin_read32(DMA19_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA19_BWL_COUNT(val)		bfin_write32(DMA19_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA19_CURR_BWL_COUNT()	bfin_read32(DMA19_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA19_CURR_BWL_COUNT(val)	bfin_write32(DMA19_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA19_BWM_COUNT()		bfin_read32(DMA19_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA19_BWM_COUNT(val)		bfin_write32(DMA19_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA19_CURR_BWM_COUNT()	bfin_read32(DMA19_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA19_CURR_BWM_COUNT(val)	bfin_write32(DMA19_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 20 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA20_NEXT_DESC_PTR() 	bfin_read32(DMA20_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA20_NEXT_DESC_PTR(val) 	bfin_write32(DMA20_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA20_START_ADDR() 		bfin_read32(DMA20_START_ADDR)</div><div class='add'>+#define bfin_write_DMA20_START_ADDR(val) 	bfin_write32(DMA20_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA20_CONFIG()		bfin_read32(DMA20_CONFIG)</div><div class='add'>+#define bfin_write_DMA20_CONFIG(val)		bfin_write32(DMA20_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA20_X_COUNT()		bfin_read32(DMA20_X_COUNT)</div><div class='add'>+#define bfin_write_DMA20_X_COUNT(val)		bfin_write32(DMA20_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA20_X_MODIFY()		bfin_read32(DMA20_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA20_X_MODIFY(val) 		bfin_write32(DMA20_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA20_Y_COUNT()		bfin_read32(DMA20_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA20_Y_COUNT(val)		bfin_write32(DMA20_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA20_Y_MODIFY()		bfin_read32(DMA20_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA20_Y_MODIFY(val) 		bfin_write32(DMA20_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA20_CURR_DESC_PTR() 	bfin_read32(DMA20_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA20_CURR_DESC_PTR(val) 	bfin_write32(DMA20_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA20_PREV_DESC_PTR() 	bfin_read32(DMA20_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA20_PREV_DESC_PTR(val) 	bfin_write32(DMA20_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA20_CURR_ADDR() 		bfin_read32(DMA20_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA20_CURR_ADDR(val) 	bfin_write32(DMA20_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA20_IRQ_STATUS()		bfin_read32(DMA20_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA20_IRQ_STATUS(val)	bfin_write32(DMA20_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA20_CURR_X_COUNT()		bfin_read32(DMA20_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA20_CURR_X_COUNT(val)	bfin_write32(DMA20_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA20_CURR_Y_COUNT()		bfin_read32(DMA20_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA20_CURR_Y_COUNT(val)	bfin_write32(DMA20_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA20_BWL_COUNT()		bfin_read32(DMA20_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA20_BWL_COUNT(val)		bfin_write32(DMA20_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA20_CURR_BWL_COUNT()	bfin_read32(DMA20_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA20_CURR_BWL_COUNT(val)	bfin_write32(DMA20_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA20_BWM_COUNT()		bfin_read32(DMA20_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA20_BWM_COUNT(val)		bfin_write32(DMA20_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA20_CURR_BWM_COUNT()	bfin_read32(DMA20_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA20_CURR_BWM_COUNT(val)	bfin_write32(DMA20_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* MDMA Stream 0 Registers (DMA Channel 21 and 22) */</div><div class='add'>+</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_NEXT_DESC_PTR() 	bfin_read32(MDMA0_DEST_CRC0_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_NEXT_DESC_PTR(val) 	bfin_write32(MDMA0_DEST_CRC0_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_START_ADDR() 		bfin_read32(MDMA0_DEST_CRC0_START_ADDR)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_START_ADDR(val) 	bfin_write32(MDMA0_DEST_CRC0_START_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_CONFIG()		bfin_read32(MDMA0_DEST_CRC0_CONFIG)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_CONFIG(val)		bfin_write32(MDMA0_DEST_CRC0_CONFIG, val)</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_X_COUNT()		bfin_read32(MDMA0_DEST_CRC0_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_X_COUNT(val)		bfin_write32(MDMA0_DEST_CRC0_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_X_MODIFY()		bfin_read32(MDMA0_DEST_CRC0_X_MODIFY)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_X_MODIFY(val) 	bfin_write32(MDMA0_DEST_CRC0_X_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_Y_COUNT()		bfin_read32(MDMA0_DEST_CRC0_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_Y_COUNT(val)		bfin_write32(MDMA0_DEST_CRC0_Y_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_Y_MODIFY()		bfin_read32(MDMA0_DEST_CRC0_Y_MODIFY)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_Y_MODIFY(val) 	bfin_write32(MDMA0_DEST_CRC0_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_CURR_DESC_PTR() 	bfin_read32(MDMA0_DEST_CRC0_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_CURR_DESC_PTR(val) 	bfin_write32(MDMA0_DEST_CRC0_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_PREV_DESC_PTR() 	bfin_read32(MDMA0_DEST_CRC0_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_PREV_DESC_PTR(val) 	bfin_write32(MDMA0_DEST_CRC0_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_CURR_ADDR() 		bfin_read32(MDMA0_DEST_CRC0_CURR_ADDR)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_CURR_ADDR(val) 	bfin_write32(MDMA0_DEST_CRC0_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_IRQ_STATUS()		bfin_read32(MDMA0_DEST_CRC0_IRQ_STATUS)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_IRQ_STATUS(val)	bfin_write32(MDMA0_DEST_CRC0_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_CURR_X_COUNT()	bfin_read32(MDMA0_DEST_CRC0_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_CURR_X_COUNT(val)	bfin_write32(MDMA0_DEST_CRC0_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA0_DEST_CRC0_CURR_Y_COUNT()	bfin_read32(MDMA0_DEST_CRC0_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA0_DEST_CRC0_CURR_Y_COUNT(val)	bfin_write32(MDMA0_DEST_CRC0_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_NEXT_DESC_PTR() 	bfin_read32(MDMA0_SRC_CRC0_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_NEXT_DESC_PTR(val) 	bfin_write32(MDMA0_SRC_CRC0_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_START_ADDR() 		bfin_read32(MDMA0_SRC_CRC0_START_ADDR)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_START_ADDR(val) 	bfin_write32(MDMA0_SRC_CRC0_START_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_CONFIG()		bfin_read32(MDMA0_SRC_CRC0_CONFIG)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_CONFIG(val)		bfin_write32(MDMA0_SRC_CRC0_CONFIG, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_X_COUNT()		bfin_read32(MDMA0_SRC_CRC0_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_X_COUNT(val)		bfin_write32(MDMA0_SRC_CRC0_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_X_MODIFY()		bfin_read32(MDMA0_SRC_CRC0_X_MODIFY)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_X_MODIFY(val) 	bfin_write32(MDMA0_SRC_CRC0_X_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_Y_COUNT()		bfin_read32(MDMA0_SRC_CRC0_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_Y_COUNT(val)		bfin_write32(MDMA0_SRC_CRC0_Y_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_Y_MODIFY()		bfin_read32(MDMA0_SRC_CRC0_Y_MODIFY)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_Y_MODIFY(val) 	bfin_write32(MDMA0_SRC_CRC0_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_CURR_DESC_PTR() 	bfin_read32(MDMA0_SRC_CRC0_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_CURR_DESC_PTR(val) 	bfin_write32(MDMA0_SRC_CRC0_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_PREV_DESC_PTR() 	bfin_read32(MDMA0_SRC_CRC0_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_PREV_DESC_PTR(val) 	bfin_write32(MDMA0_SRC_CRC0_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_CURR_ADDR() 		bfin_read32(MDMA0_SRC_CRC0_CURR_ADDR)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_CURR_ADDR(val) 	bfin_write32(MDMA0_SRC_CRC0_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_IRQ_STATUS()		bfin_read32(MDMA0_SRC_CRC0_IRQ_STATUS)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_IRQ_STATUS(val)	bfin_write32(MDMA0_SRC_CRC0_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_CURR_X_COUNT()		bfin_read32(MDMA0_SRC_CRC0_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_CURR_X_COUNT(val)	bfin_write32(MDMA0_SRC_CRC0_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA0_SRC_CRC0_CURR_Y_COUNT()		bfin_read32(MDMA0_SRC_CRC0_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA0_SRC_CRC0_CURR_Y_COUNT(val)	bfin_write32(MDMA0_SRC_CRC0_CURR_Y_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* MDMA Stream 1 Registers (DMA Channel 23 and 24) */</div><div class='add'>+</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_NEXT_DESC_PTR() 	bfin_read32(MDMA1_DEST_CRC1_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_NEXT_DESC_PTR(val) 	bfin_write32(MDMA1_DEST_CRC1_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_START_ADDR() 		bfin_read32(MDMA1_DEST_CRC1_START_ADDR)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_START_ADDR(val) 	bfin_write32(MDMA1_DEST_CRC1_START_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_CONFIG()		bfin_read32(MDMA1_DEST_CRC1_CONFIG)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_CONFIG(val)		bfin_write32(MDMA1_DEST_CRC1_CONFIG, val)</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_X_COUNT()		bfin_read32(MDMA1_DEST_CRC1_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_X_COUNT(val)		bfin_write32(MDMA1_DEST_CRC1_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_X_MODIFY()		bfin_read32(MDMA1_DEST_CRC1_X_MODIFY)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_X_MODIFY(val) 	bfin_write32(MDMA1_DEST_CRC1_X_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_Y_COUNT()		bfin_read32(MDMA1_DEST_CRC1_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_Y_COUNT(val)		bfin_write32(MDMA1_DEST_CRC1_Y_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_Y_MODIFY()		bfin_read32(MDMA1_DEST_CRC1_Y_MODIFY)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_Y_MODIFY(val) 	bfin_write32(MDMA1_DEST_CRC1_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_CURR_DESC_PTR() 	bfin_read32(MDMA1_DEST_CRC1_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_CURR_DESC_PTR(val) 	bfin_write32(MDMA1_DEST_CRC1_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_PREV_DESC_PTR() 	bfin_read32(MDMA1_DEST_CRC1_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_PREV_DESC_PTR(val) 	bfin_write32(MDMA1_DEST_CRC1_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_CURR_ADDR() 		bfin_read32(MDMA1_DEST_CRC1_CURR_ADDR)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_CURR_ADDR(val) 	bfin_write32(MDMA1_DEST_CRC1_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_IRQ_STATUS()		bfin_read32(MDMA1_DEST_CRC1_IRQ_STATUS)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_IRQ_STATUS(val)	bfin_write32(MDMA1_DEST_CRC1_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_CURR_X_COUNT()	bfin_read32(MDMA1_DEST_CRC1_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_CURR_X_COUNT(val)	bfin_write32(MDMA1_DEST_CRC1_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA1_DEST_CRC1_CURR_Y_COUNT()	bfin_read32(MDMA1_DEST_CRC1_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA1_DEST_CRC1_CURR_Y_COUNT(val)	bfin_write32(MDMA1_DEST_CRC1_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_NEXT_DESC_PTR() 	bfin_read32(MDMA1_SRC_CRC1_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_NEXT_DESC_PTR(val) 	bfin_write32(MDMA1_SRC_CRC1_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_START_ADDR() 		bfin_read32(MDMA1_SRC_CRC1_START_ADDR)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_START_ADDR(val) 	bfin_write32(MDMA1_SRC_CRC1_START_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_CONFIG()		bfin_read32(MDMA1_SRC_CRC1_CONFIG)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_CONFIG(val)		bfin_write32(MDMA1_SRC_CRC1_CONFIG, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_X_COUNT()		bfin_read32(MDMA1_SRC_CRC1_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_X_COUNT(val)		bfin_write32(MDMA1_SRC_CRC1_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_X_MODIFY()		bfin_read32(MDMA1_SRC_CRC1_X_MODIFY)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_X_MODIFY(val) 	bfin_write32(MDMA1_SRC_CRC1_X_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_Y_COUNT()		bfin_read32(MDMA1_SRC_CRC1_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_Y_COUNT(val)		bfin_write32(MDMA1_SRC_CRC1_Y_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_Y_MODIFY()		bfin_read32(MDMA1_SRC_CRC1_Y_MODIFY)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_Y_MODIFY(val) 	bfin_write32(MDMA1_SRC_CRC1_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_CURR_DESC_PTR() 	bfin_read32(MDMA1_SRC_CRC1_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_CURR_DESC_PTR(val) 	bfin_write32(MDMA1_SRC_CRC1_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_PREV_DESC_PTR() 	bfin_read32(MDMA1_SRC_CRC1_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_PREV_DESC_PTR(val) 	bfin_write32(MDMA1_SRC_CRC1_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_CURR_ADDR() 		bfin_read32(MDMA1_SRC_CRC1_CURR_ADDR)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_CURR_ADDR(val) 	bfin_write32(MDMA1_SRC_CRC1_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_IRQ_STATUS()		bfin_read32(MDMA1_SRC_CRC1_IRQ_STATUS)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_IRQ_STATUS(val)	bfin_write32(MDMA1_SRC_CRC1_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_CURR_X_COUNT()		bfin_read32(MDMA1_SRC_CRC1_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_CURR_X_COUNT(val)	bfin_write32(MDMA1_SRC_CRC1_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA1_SRC_CRC1_CURR_Y_COUNT()		bfin_read32(MDMA1_SRC_CRC1_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA1_SRC_CRC1_CURR_Y_COUNT(val)	bfin_write32(MDMA1_SRC_CRC1_CURR_Y_COUNT, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* MDMA Stream 2 Registers (DMA Channel 25 and 26) */</div><div class='add'>+</div><div class='add'>+#define bfin_read_MDMA2_DEST_NEXT_DESC_PTR() 		bfin_read32(MDMA2_DEST_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA2_DEST_NEXT_DESC_PTR(val) 	bfin_write32(MDMA2_DEST_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA2_DEST_START_ADDR() 		bfin_read32(MDMA2_DEST_START_ADDR)</div><div class='add'>+#define bfin_write_MDMA2_DEST_START_ADDR(val) 		bfin_write32(MDMA2_DEST_START_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA2_DEST_CONFIG()			bfin_read32(MDMA2_DEST_CONFIG)</div><div class='add'>+#define bfin_write_MDMA2_DEST_CONFIG(val)		bfin_write32(MDMA2_DEST_CONFIG, val)</div><div class='add'>+#define bfin_read_MDMA2_DEST_X_COUNT()			bfin_read32(MDMA2_DEST_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA2_DEST_X_COUNT(val)		bfin_write32(MDMA2_DEST_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA2_DEST_X_MODIFY()			bfin_read32(MDMA2_DEST_X_MODIFY)</div><div class='add'>+#define bfin_write_MDMA2_DEST_X_MODIFY(val) 		bfin_write32(MDMA2_DEST_X_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA2_DEST_Y_COUNT()			bfin_read32(MDMA2_DEST_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA2_DEST_Y_COUNT(val)		bfin_write32(MDMA2_DEST_Y_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA2_DEST_Y_MODIFY()			bfin_read32(MDMA2_DEST_Y_MODIFY)</div><div class='add'>+#define bfin_write_MDMA2_DEST_Y_MODIFY(val) 		bfin_write32(MDMA2_DEST_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA2_DEST_CURR_DESC_PTR() 		bfin_read32(MDMA2_DEST_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA2_DEST_CURR_DESC_PTR(val) 	bfin_write32(MDMA2_DEST_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA2_DEST_PREV_DESC_PTR() 		bfin_read32(MDMA2_DEST_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA2_DEST_PREV_DESC_PTR(val) 	bfin_write32(MDMA2_DEST_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA2_DEST_CURR_ADDR() 		bfin_read32(MDMA2_DEST_CURR_ADDR)</div><div class='add'>+#define bfin_write_MDMA2_DEST_CURR_ADDR(val) 		bfin_write32(MDMA2_DEST_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA2_DEST_IRQ_STATUS()		bfin_read32(MDMA2_DEST_IRQ_STATUS)</div><div class='add'>+#define bfin_write_MDMA2_DEST_IRQ_STATUS(val)		bfin_write32(MDMA2_DEST_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_MDMA2_DEST_CURR_X_COUNT()		bfin_read32(MDMA2_DEST_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA2_DEST_CURR_X_COUNT(val)		bfin_write32(MDMA2_DEST_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA2_DEST_CURR_Y_COUNT()		bfin_read32(MDMA2_DEST_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA2_DEST_CURR_Y_COUNT(val)		bfin_write32(MDMA2_DEST_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_NEXT_DESC_PTR() 		bfin_read32(MDMA2_SRC_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA2_SRC_NEXT_DESC_PTR(val) 	bfin_write32(MDMA2_SRC_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_START_ADDR() 		bfin_read32(MDMA2_SRC_START_ADDR)</div><div class='add'>+#define bfin_write_MDMA2_SRC_START_ADDR(val) 		bfin_write32(MDMA2_SRC_START_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_CONFIG()			bfin_read32(MDMA2_SRC_CONFIG)</div><div class='add'>+#define bfin_write_MDMA2_SRC_CONFIG(val)		bfin_write32(MDMA2_SRC_CONFIG, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_X_COUNT()			bfin_read32(MDMA2_SRC_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA2_SRC_X_COUNT(val)		bfin_write32(MDMA2_SRC_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_X_MODIFY()			bfin_read32(MDMA2_SRC_X_MODIFY)</div><div class='add'>+#define bfin_write_MDMA2_SRC_X_MODIFY(val) 		bfin_write32(MDMA2_SRC_X_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_Y_COUNT()			bfin_read32(MDMA2_SRC_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA2_SRC_Y_COUNT(val)		bfin_write32(MDMA2_SRC_Y_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_Y_MODIFY()			bfin_read32(MDMA2_SRC_Y_MODIFY)</div><div class='add'>+#define bfin_write_MDMA2_SRC_Y_MODIFY(val) 		bfin_write32(MDMA2_SRC_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_CURR_DESC_PTR() 		bfin_read32(MDMA2_SRC_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA2_SRC_CURR_DESC_PTR(val)		bfin_write32(MDMA2_SRC_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_PREV_DESC_PTR() 		bfin_read32(MDMA2_SRC_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA2_SRC_PREV_DESC_PTR(val) 	bfin_write32(MDMA2_SRC_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_CURR_ADDR() 		bfin_read32(MDMA2_SRC_CURR_ADDR)</div><div class='add'>+#define bfin_write_MDMA2_SRC_CURR_ADDR(val) 		bfin_write32(MDMA2_SRC_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_IRQ_STATUS()		bfin_read32(MDMA2_SRC_IRQ_STATUS)</div><div class='add'>+#define bfin_write_MDMA2_SRC_IRQ_STATUS(val)		bfin_write32(MDMA2_SRC_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_CURR_X_COUNT()		bfin_read32(MDMA2_SRC_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA2_SRC_CURR_X_COUNT(val)		bfin_write32(MDMA2_SRC_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA2_SRC_CURR_Y_COUNT()		bfin_read32(MDMA2_SRC_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA2_SRC_CURR_Y_COUNT(val)		bfin_write32(MDMA2_SRC_CURR_Y_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* MDMA Stream 3 Registers (DMA Channel 27 and 28) */</div><div class='add'>+</div><div class='add'>+#define bfin_read_MDMA3_DEST_NEXT_DESC_PTR() 		bfin_read32(MDMA3_DEST_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA3_DEST_NEXT_DESC_PTR(val) 	bfin_write32(MDMA3_DEST_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA3_DEST_START_ADDR() 		bfin_read32(MDMA3_DEST_START_ADDR)</div><div class='add'>+#define bfin_write_MDMA3_DEST_START_ADDR(val) 		bfin_write32(MDMA3_DEST_START_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA3_DEST_CONFIG()			bfin_read32(MDMA3_DEST_CONFIG)</div><div class='add'>+#define bfin_write_MDMA3_DEST_CONFIG(val)		bfin_write32(MDMA3_DEST_CONFIG, val)</div><div class='add'>+#define bfin_read_MDMA3_DEST_X_COUNT()			bfin_read32(MDMA3_DEST_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA3_DEST_X_COUNT(val)		bfin_write32(MDMA3_DEST_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA3_DEST_X_MODIFY()			bfin_read32(MDMA3_DEST_X_MODIFY)</div><div class='add'>+#define bfin_write_MDMA3_DEST_X_MODIFY(val) 		bfin_write32(MDMA3_DEST_X_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA3_DEST_Y_COUNT()			bfin_read32(MDMA3_DEST_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA3_DEST_Y_COUNT(val)		bfin_write32(MDMA3_DEST_Y_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA3_DEST_Y_MODIFY()			bfin_read32(MDMA3_DEST_Y_MODIFY)</div><div class='add'>+#define bfin_write_MDMA3_DEST_Y_MODIFY(val) 		bfin_write32(MDMA3_DEST_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA3_DEST_CURR_DESC_PTR() 		bfin_read32(MDMA3_DEST_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA3_DEST_CURR_DESC_PTR(val) 	bfin_write32(MDMA3_DEST_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA3_DEST_PREV_DESC_PTR()	 	bfin_read32(MDMA3_DEST_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA3_DEST_PREV_DESC_PTR(val) 	bfin_write32(MDMA3_DEST_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA3_DEST_CURR_ADDR() 		bfin_read32(MDMA3_DEST_CURR_ADDR)</div><div class='add'>+#define bfin_write_MDMA3_DEST_CURR_ADDR(val) 		bfin_write32(MDMA3_DEST_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA3_DEST_IRQ_STATUS()		bfin_read32(MDMA3_DEST_IRQ_STATUS)</div><div class='add'>+#define bfin_write_MDMA3_DEST_IRQ_STATUS(val)		bfin_write32(MDMA3_DEST_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_MDMA3_DEST_CURR_X_COUNT()		bfin_read32(MDMA3_DEST_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA3_DEST_CURR_X_COUNT(val)		bfin_write32(MDMA3_DEST_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA3_DEST_CURR_Y_COUNT()		bfin_read32(MDMA3_DEST_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA3_DEST_CURR_Y_COUNT(val)		bfin_write32(MDMA3_DEST_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_NEXT_DESC_PTR() 		bfin_read32(MDMA3_SRC_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA3_SRC_NEXT_DESC_PTR(val) 	bfin_write32(MDMA3_SRC_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_START_ADDR() 		bfin_read32(MDMA3_SRC_START_ADDR)</div><div class='add'>+#define bfin_write_MDMA3_SRC_START_ADDR(val) 		bfin_write32(MDMA3_SRC_START_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_CONFIG()			bfin_read32(MDMA3_SRC_CONFIG)</div><div class='add'>+#define bfin_write_MDMA3_SRC_CONFIG(val)		bfin_write32(MDMA3_SRC_CONFIG, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_X_COUNT()			bfin_read32(MDMA3_SRC_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA3_SRC_X_COUNT(val)		bfin_write32(MDMA3_SRC_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_X_MODIFY()			bfin_read32(MDMA3_SRC_X_MODIFY)</div><div class='add'>+#define bfin_write_MDMA3_SRC_X_MODIFY(val) 		bfin_write32(MDMA3_SRC_X_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_Y_COUNT()			bfin_read32(MDMA3_SRC_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA3_SRC_Y_COUNT(val)		bfin_write32(MDMA3_SRC_Y_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_Y_MODIFY()			bfin_read32(MDMA3_SRC_Y_MODIFY)</div><div class='add'>+#define bfin_write_MDMA3_SRC_Y_MODIFY(val) 		bfin_write32(MDMA3_SRC_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_CURR_DESC_PTR() 		bfin_read32(MDMA3_SRC_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA3_SRC_CURR_DESC_PTR(val) 	bfin_write32(MDMA3_SRC_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_PREV_DESC_PTR() 		bfin_read32(MDMA3_SRC_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_MDMA3_SRC_PREV_DESC_PTR(val) 	bfin_write32(MDMA3_SRC_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_CURR_ADDR() 		bfin_read32(MDMA3_SRC_CURR_ADDR)</div><div class='add'>+#define bfin_write_MDMA3_SRC_CURR_ADDR(val) 		bfin_write32(MDMA3_SRC_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_IRQ_STATUS()		bfin_read32(MDMA3_SRC_IRQ_STATUS)</div><div class='add'>+#define bfin_write_MDMA3_SRC_IRQ_STATUS(val)		bfin_write32(MDMA3_SRC_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_CURR_X_COUNT()		bfin_read32(MDMA3_SRC_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_MDMA3_SRC_CURR_X_COUNT(val)		bfin_write32(MDMA3_SRC_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_MDMA3_SRC_CURR_Y_COUNT()		bfin_read32(MDMA3_SRC_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_MDMA3_SRC_CURR_Y_COUNT(val)		bfin_write32(MDMA3_SRC_CURR_Y_COUNT, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* DMA Channel 29 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA29_NEXT_DESC_PTR() 	bfin_read32(DMA29_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA29_NEXT_DESC_PTR(val) 	bfin_write32(DMA29_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA29_START_ADDR() 		bfin_read32(DMA29_START_ADDR)</div><div class='add'>+#define bfin_write_DMA29_START_ADDR(val) 	bfin_write32(DMA29_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA29_CONFIG()		bfin_read32(DMA29_CONFIG)</div><div class='add'>+#define bfin_write_DMA29_CONFIG(val)		bfin_write32(DMA29_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA29_X_COUNT()		bfin_read32(DMA29_X_COUNT)</div><div class='add'>+#define bfin_write_DMA29_X_COUNT(val)		bfin_write32(DMA29_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA29_X_MODIFY()		bfin_read32(DMA29_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA29_X_MODIFY(val) 		bfin_write32(DMA29_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA29_Y_COUNT()		bfin_read32(DMA29_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA29_Y_COUNT(val)		bfin_write32(DMA29_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA29_Y_MODIFY()		bfin_read32(DMA29_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA29_Y_MODIFY(val) 		bfin_write32(DMA29_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA29_CURR_DESC_PTR() 	bfin_read32(DMA29_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA29_CURR_DESC_PTR(val) 	bfin_write32(DMA29_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA29_PREV_DESC_PTR() 	bfin_read32(DMA29_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA29_PREV_DESC_PTR(val) 	bfin_write32(DMA29_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA29_CURR_ADDR() 		bfin_read32(DMA29_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA29_CURR_ADDR(val) 	bfin_write32(DMA29_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA29_IRQ_STATUS()		bfin_read32(DMA29_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA29_IRQ_STATUS(val)	bfin_write32(DMA29_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA29_CURR_X_COUNT()		bfin_read32(DMA29_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA29_CURR_X_COUNT(val)	bfin_write32(DMA29_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA29_CURR_Y_COUNT()		bfin_read32(DMA29_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA29_CURR_Y_COUNT(val)	bfin_write32(DMA29_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA29_BWL_COUNT()		bfin_read32(DMA29_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA29_BWL_COUNT(val)		bfin_write32(DMA29_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA29_CURR_BWL_COUNT()	bfin_read32(DMA29_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA29_CURR_BWL_COUNT(val)	bfin_write32(DMA29_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA29_BWM_COUNT()		bfin_read32(DMA29_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA29_BWM_COUNT(val)		bfin_write32(DMA29_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA29_CURR_BWM_COUNT()	bfin_read32(DMA29_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA29_CURR_BWM_COUNT(val)	bfin_write32(DMA29_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 30 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA30_NEXT_DESC_PTR() 	bfin_read32(DMA30_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA30_NEXT_DESC_PTR(val) 	bfin_write32(DMA30_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA30_START_ADDR() 		bfin_read32(DMA30_START_ADDR)</div><div class='add'>+#define bfin_write_DMA30_START_ADDR(val) 	bfin_write32(DMA30_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA30_CONFIG()		bfin_read32(DMA30_CONFIG)</div><div class='add'>+#define bfin_write_DMA30_CONFIG(val)		bfin_write32(DMA30_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA30_X_COUNT()		bfin_read32(DMA30_X_COUNT)</div><div class='add'>+#define bfin_write_DMA30_X_COUNT(val)		bfin_write32(DMA30_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA30_X_MODIFY()		bfin_read32(DMA30_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA30_X_MODIFY(val) 		bfin_write32(DMA30_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA30_Y_COUNT()		bfin_read32(DMA30_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA30_Y_COUNT(val)		bfin_write32(DMA30_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA30_Y_MODIFY()		bfin_read32(DMA30_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA30_Y_MODIFY(val) 		bfin_write32(DMA30_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA30_CURR_DESC_PTR() 	bfin_read32(DMA30_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA30_CURR_DESC_PTR(val) 	bfin_write32(DMA30_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA30_PREV_DESC_PTR() 	bfin_read32(DMA30_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA30_PREV_DESC_PTR(val) 	bfin_write32(DMA30_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA30_CURR_ADDR() 		bfin_read32(DMA30_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA30_CURR_ADDR(val) 	bfin_write32(DMA30_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA30_IRQ_STATUS()		bfin_read32(DMA30_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA30_IRQ_STATUS(val)	bfin_write32(DMA30_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA30_CURR_X_COUNT()		bfin_read32(DMA30_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA30_CURR_X_COUNT(val)	bfin_write32(DMA30_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA30_CURR_Y_COUNT()		bfin_read32(DMA30_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA30_CURR_Y_COUNT(val)	bfin_write32(DMA30_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA30_BWL_COUNT()		bfin_read32(DMA30_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA30_BWL_COUNT(val)		bfin_write32(DMA30_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA30_CURR_BWL_COUNT()	bfin_read32(DMA30_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA30_CURR_BWL_COUNT(val)	bfin_write32(DMA30_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA30_BWM_COUNT()		bfin_read32(DMA30_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA30_BWM_COUNT(val)		bfin_write32(DMA30_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA30_CURR_BWM_COUNT()	bfin_read32(DMA30_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA30_CURR_BWM_COUNT(val)	bfin_write32(DMA30_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 31 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA31_NEXT_DESC_PTR() 	bfin_read32(DMA31_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA31_NEXT_DESC_PTR(val) 	bfin_write32(DMA31_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA31_START_ADDR() 		bfin_read32(DMA31_START_ADDR)</div><div class='add'>+#define bfin_write_DMA31_START_ADDR(val) 	bfin_write32(DMA31_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA31_CONFIG()		bfin_read32(DMA31_CONFIG)</div><div class='add'>+#define bfin_write_DMA31_CONFIG(val)		bfin_write32(DMA31_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA31_X_COUNT()		bfin_read32(DMA31_X_COUNT)</div><div class='add'>+#define bfin_write_DMA31_X_COUNT(val)		bfin_write32(DMA31_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA31_X_MODIFY()		bfin_read32(DMA31_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA31_X_MODIFY(val) 		bfin_write32(DMA31_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA31_Y_COUNT()		bfin_read32(DMA31_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA31_Y_COUNT(val)		bfin_write32(DMA31_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA31_Y_MODIFY()		bfin_read32(DMA31_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA31_Y_MODIFY(val) 		bfin_write32(DMA31_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA31_CURR_DESC_PTR() 	bfin_read32(DMA31_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA31_CURR_DESC_PTR(val) 	bfin_write32(DMA31_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA31_PREV_DESC_PTR() 	bfin_read32(DMA31_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA31_PREV_DESC_PTR(val) 	bfin_write32(DMA31_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA31_CURR_ADDR() 		bfin_read32(DMA31_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA31_CURR_ADDR(val) 	bfin_write32(DMA31_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA31_IRQ_STATUS()		bfin_read32(DMA31_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA31_IRQ_STATUS(val)	bfin_write32(DMA31_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA31_CURR_X_COUNT()		bfin_read32(DMA31_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA31_CURR_X_COUNT(val)	bfin_write32(DMA31_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA31_CURR_Y_COUNT()		bfin_read32(DMA31_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA31_CURR_Y_COUNT(val)	bfin_write32(DMA31_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA31_BWL_COUNT()		bfin_read32(DMA31_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA31_BWL_COUNT(val)		bfin_write32(DMA31_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA31_CURR_BWL_COUNT()	bfin_read32(DMA31_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA31_CURR_BWL_COUNT(val)	bfin_write32(DMA31_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA31_BWM_COUNT()		bfin_read32(DMA31_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA31_BWM_COUNT(val)		bfin_write32(DMA31_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA31_CURR_BWM_COUNT()	bfin_read32(DMA31_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA31_CURR_BWM_COUNT(val)	bfin_write32(DMA31_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 32 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA32_NEXT_DESC_PTR() 	bfin_read32(DMA32_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA32_NEXT_DESC_PTR(val) 	bfin_write32(DMA32_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA32_START_ADDR() 		bfin_read32(DMA32_START_ADDR)</div><div class='add'>+#define bfin_write_DMA32_START_ADDR(val) 	bfin_write32(DMA32_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA32_CONFIG()		bfin_read32(DMA32_CONFIG)</div><div class='add'>+#define bfin_write_DMA32_CONFIG(val)		bfin_write32(DMA32_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA32_X_COUNT()		bfin_read32(DMA32_X_COUNT)</div><div class='add'>+#define bfin_write_DMA32_X_COUNT(val)		bfin_write32(DMA32_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA32_X_MODIFY()		bfin_read32(DMA32_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA32_X_MODIFY(val) 		bfin_write32(DMA32_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA32_Y_COUNT()		bfin_read32(DMA32_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA32_Y_COUNT(val)		bfin_write32(DMA32_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA32_Y_MODIFY()		bfin_read32(DMA32_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA32_Y_MODIFY(val) 		bfin_write32(DMA32_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA32_CURR_DESC_PTR() 	bfin_read32(DMA32_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA32_CURR_DESC_PTR(val) 	bfin_write32(DMA32_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA32_PREV_DESC_PTR() 	bfin_read32(DMA32_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA32_PREV_DESC_PTR(val) 	bfin_write32(DMA32_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA32_CURR_ADDR() 		bfin_read32(DMA32_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA32_CURR_ADDR(val) 	bfin_write32(DMA32_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA32_IRQ_STATUS()		bfin_read32(DMA32_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA32_IRQ_STATUS(val)	bfin_write32(DMA32_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA32_CURR_X_COUNT()		bfin_read32(DMA32_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA32_CURR_X_COUNT(val)	bfin_write32(DMA32_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA32_CURR_Y_COUNT()		bfin_read32(DMA32_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA32_CURR_Y_COUNT(val)	bfin_write32(DMA32_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA32_BWL_COUNT()		bfin_read32(DMA32_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA32_BWL_COUNT(val)		bfin_write32(DMA32_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA32_CURR_BWL_COUNT()	bfin_read32(DMA32_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA32_CURR_BWL_COUNT(val)	bfin_write32(DMA32_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA32_BWM_COUNT()		bfin_read32(DMA32_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA32_BWM_COUNT(val)		bfin_write32(DMA32_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA32_CURR_BWM_COUNT()	bfin_read32(DMA32_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA32_CURR_BWM_COUNT(val)	bfin_write32(DMA32_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 33 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA33_NEXT_DESC_PTR() 	bfin_read32(DMA33_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA33_NEXT_DESC_PTR(val) 	bfin_write32(DMA33_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA33_START_ADDR() 		bfin_read32(DMA33_START_ADDR)</div><div class='add'>+#define bfin_write_DMA33_START_ADDR(val) 	bfin_write32(DMA33_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA33_CONFIG()		bfin_read32(DMA33_CONFIG)</div><div class='add'>+#define bfin_write_DMA33_CONFIG(val)		bfin_write32(DMA33_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA33_X_COUNT()		bfin_read32(DMA33_X_COUNT)</div><div class='add'>+#define bfin_write_DMA33_X_COUNT(val)		bfin_write32(DMA33_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA33_X_MODIFY()		bfin_read32(DMA33_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA33_X_MODIFY(val) 		bfin_write32(DMA33_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA33_Y_COUNT()		bfin_read32(DMA33_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA33_Y_COUNT(val)		bfin_write32(DMA33_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA33_Y_MODIFY()		bfin_read32(DMA33_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA33_Y_MODIFY(val) 		bfin_write32(DMA33_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA33_CURR_DESC_PTR() 	bfin_read32(DMA33_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA33_CURR_DESC_PTR(val) 	bfin_write32(DMA33_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA33_PREV_DESC_PTR() 	bfin_read32(DMA33_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA33_PREV_DESC_PTR(val) 	bfin_write32(DMA33_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA33_CURR_ADDR() 		bfin_read32(DMA33_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA33_CURR_ADDR(val) 	bfin_write32(DMA33_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA33_IRQ_STATUS()		bfin_read32(DMA33_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA33_IRQ_STATUS(val)	bfin_write32(DMA33_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA33_CURR_X_COUNT()		bfin_read32(DMA33_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA33_CURR_X_COUNT(val)	bfin_write32(DMA33_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA33_CURR_Y_COUNT()		bfin_read32(DMA33_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA33_CURR_Y_COUNT(val)	bfin_write32(DMA33_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA33_BWL_COUNT()		bfin_read32(DMA33_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA33_BWL_COUNT(val)		bfin_write32(DMA33_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA33_CURR_BWL_COUNT()	bfin_read32(DMA33_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA33_CURR_BWL_COUNT(val)	bfin_write32(DMA33_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA33_BWM_COUNT()		bfin_read32(DMA33_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA33_BWM_COUNT(val)		bfin_write32(DMA33_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA33_CURR_BWM_COUNT()	bfin_read32(DMA33_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA33_CURR_BWM_COUNT(val)	bfin_write32(DMA33_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 34 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA34_NEXT_DESC_PTR() 	bfin_read32(DMA34_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA34_NEXT_DESC_PTR(val) 	bfin_write32(DMA34_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA34_START_ADDR() 		bfin_read32(DMA34_START_ADDR)</div><div class='add'>+#define bfin_write_DMA34_START_ADDR(val) 	bfin_write32(DMA34_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA34_CONFIG()		bfin_read32(DMA34_CONFIG)</div><div class='add'>+#define bfin_write_DMA34_CONFIG(val)		bfin_write32(DMA34_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA34_X_COUNT()		bfin_read32(DMA34_X_COUNT)</div><div class='add'>+#define bfin_write_DMA34_X_COUNT(val)		bfin_write32(DMA34_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA34_X_MODIFY()		bfin_read32(DMA34_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA34_X_MODIFY(val) 		bfin_write32(DMA34_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA34_Y_COUNT()		bfin_read32(DMA34_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA34_Y_COUNT(val)		bfin_write32(DMA34_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA34_Y_MODIFY()		bfin_read32(DMA34_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA34_Y_MODIFY(val) 		bfin_write32(DMA34_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA34_CURR_DESC_PTR() 	bfin_read32(DMA34_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA34_CURR_DESC_PTR(val) 	bfin_write32(DMA34_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA34_PREV_DESC_PTR() 	bfin_read32(DMA34_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA34_PREV_DESC_PTR(val) 	bfin_write32(DMA34_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA34_CURR_ADDR() 		bfin_read32(DMA34_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA34_CURR_ADDR(val) 	bfin_write32(DMA34_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA34_IRQ_STATUS()		bfin_read32(DMA34_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA34_IRQ_STATUS(val)	bfin_write32(DMA34_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA34_CURR_X_COUNT()		bfin_read32(DMA34_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA34_CURR_X_COUNT(val)	bfin_write32(DMA34_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA34_CURR_Y_COUNT()		bfin_read32(DMA34_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA34_CURR_Y_COUNT(val)	bfin_write32(DMA34_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA34_BWL_COUNT()		bfin_read32(DMA34_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA34_BWL_COUNT(val)		bfin_write32(DMA34_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA34_CURR_BWL_COUNT()	bfin_read32(DMA34_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA34_CURR_BWL_COUNT(val)	bfin_write32(DMA34_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA34_BWM_COUNT()		bfin_read32(DMA34_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA34_BWM_COUNT(val)		bfin_write32(DMA34_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA34_CURR_BWM_COUNT()	bfin_read32(DMA34_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA34_CURR_BWM_COUNT(val)	bfin_write32(DMA34_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 35 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA35_NEXT_DESC_PTR() 	bfin_read32(DMA35_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA35_NEXT_DESC_PTR(val) 	bfin_write32(DMA35_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA35_START_ADDR() 		bfin_read32(DMA35_START_ADDR)</div><div class='add'>+#define bfin_write_DMA35_START_ADDR(val) 	bfin_write32(DMA35_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA35_CONFIG()		bfin_read32(DMA35_CONFIG)</div><div class='add'>+#define bfin_write_DMA35_CONFIG(val)		bfin_write32(DMA35_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA35_X_COUNT()		bfin_read32(DMA35_X_COUNT)</div><div class='add'>+#define bfin_write_DMA35_X_COUNT(val)		bfin_write32(DMA35_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA35_X_MODIFY()		bfin_read32(DMA35_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA35_X_MODIFY(val) 		bfin_write32(DMA35_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA35_Y_COUNT()		bfin_read32(DMA35_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA35_Y_COUNT(val)		bfin_write32(DMA35_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA35_Y_MODIFY()		bfin_read32(DMA35_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA35_Y_MODIFY(val) 		bfin_write32(DMA35_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA35_CURR_DESC_PTR() 	bfin_read32(DMA35_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA35_CURR_DESC_PTR(val) 	bfin_write32(DMA35_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA35_PREV_DESC_PTR() 	bfin_read32(DMA35_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA35_PREV_DESC_PTR(val) 	bfin_write32(DMA35_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA35_CURR_ADDR() 		bfin_read32(DMA35_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA35_CURR_ADDR(val) 	bfin_write32(DMA35_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA35_IRQ_STATUS()		bfin_read32(DMA35_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA35_IRQ_STATUS(val)	bfin_write32(DMA35_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA35_CURR_X_COUNT()		bfin_read32(DMA35_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA35_CURR_X_COUNT(val)	bfin_write32(DMA35_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA35_CURR_Y_COUNT()		bfin_read32(DMA35_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA35_CURR_Y_COUNT(val)	bfin_write32(DMA35_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA35_BWL_COUNT()		bfin_read32(DMA35_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA35_BWL_COUNT(val)		bfin_write32(DMA35_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA35_CURR_BWL_COUNT()	bfin_read32(DMA35_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA35_CURR_BWL_COUNT(val)	bfin_write32(DMA35_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA35_BWM_COUNT()		bfin_read32(DMA35_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA35_BWM_COUNT(val)		bfin_write32(DMA35_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA35_CURR_BWM_COUNT()	bfin_read32(DMA35_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA35_CURR_BWM_COUNT(val)	bfin_write32(DMA35_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 36 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA36_NEXT_DESC_PTR() 	bfin_read32(DMA36_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA36_NEXT_DESC_PTR(val) 	bfin_write32(DMA36_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA36_START_ADDR() 		bfin_read32(DMA36_START_ADDR)</div><div class='add'>+#define bfin_write_DMA36_START_ADDR(val) 	bfin_write32(DMA36_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA36_CONFIG()		bfin_read32(DMA36_CONFIG)</div><div class='add'>+#define bfin_write_DMA36_CONFIG(val)		bfin_write32(DMA36_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA36_X_COUNT()		bfin_read32(DMA36_X_COUNT)</div><div class='add'>+#define bfin_write_DMA36_X_COUNT(val)		bfin_write32(DMA36_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA36_X_MODIFY()		bfin_read32(DMA36_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA36_X_MODIFY(val) 		bfin_write32(DMA36_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA36_Y_COUNT()		bfin_read32(DMA36_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA36_Y_COUNT(val)		bfin_write32(DMA36_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA36_Y_MODIFY()		bfin_read32(DMA36_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA36_Y_MODIFY(val) 		bfin_write32(DMA36_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA36_CURR_DESC_PTR() 	bfin_read32(DMA36_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA36_CURR_DESC_PTR(val) 	bfin_write32(DMA36_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA36_PREV_DESC_PTR() 	bfin_read32(DMA36_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA36_PREV_DESC_PTR(val) 	bfin_write32(DMA36_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA36_CURR_ADDR() 		bfin_read32(DMA36_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA36_CURR_ADDR(val) 	bfin_write32(DMA36_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA36_IRQ_STATUS()		bfin_read32(DMA36_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA36_IRQ_STATUS(val)	bfin_write32(DMA36_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA36_CURR_X_COUNT()		bfin_read32(DMA36_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA36_CURR_X_COUNT(val)	bfin_write32(DMA36_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA36_CURR_Y_COUNT()		bfin_read32(DMA36_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA36_CURR_Y_COUNT(val)	bfin_write32(DMA36_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA36_BWL_COUNT()		bfin_read32(DMA36_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA36_BWL_COUNT(val)		bfin_write32(DMA36_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA36_CURR_BWL_COUNT()	bfin_read32(DMA36_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA36_CURR_BWL_COUNT(val)	bfin_write32(DMA36_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA36_BWM_COUNT()		bfin_read32(DMA36_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA36_BWM_COUNT(val)		bfin_write32(DMA36_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA36_CURR_BWM_COUNT()	bfin_read32(DMA36_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA36_CURR_BWM_COUNT(val)	bfin_write32(DMA36_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 37 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA37_NEXT_DESC_PTR() 	bfin_read32(DMA37_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA37_NEXT_DESC_PTR(val) 	bfin_write32(DMA37_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA37_START_ADDR() 		bfin_read32(DMA37_START_ADDR)</div><div class='add'>+#define bfin_write_DMA37_START_ADDR(val) 	bfin_write32(DMA37_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA37_CONFIG()		bfin_read32(DMA37_CONFIG)</div><div class='add'>+#define bfin_write_DMA37_CONFIG(val)		bfin_write32(DMA37_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA37_X_COUNT()		bfin_read32(DMA37_X_COUNT)</div><div class='add'>+#define bfin_write_DMA37_X_COUNT(val)		bfin_write32(DMA37_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA37_X_MODIFY()		bfin_read32(DMA37_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA37_X_MODIFY(val) 		bfin_write32(DMA37_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA37_Y_COUNT()		bfin_read32(DMA37_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA37_Y_COUNT(val)		bfin_write32(DMA37_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA37_Y_MODIFY()		bfin_read32(DMA37_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA37_Y_MODIFY(val) 		bfin_write32(DMA37_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA37_CURR_DESC_PTR() 	bfin_read32(DMA37_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA37_CURR_DESC_PTR(val) 	bfin_write32(DMA37_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA37_PREV_DESC_PTR() 	bfin_read32(DMA37_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA37_PREV_DESC_PTR(val) 	bfin_write32(DMA37_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA37_CURR_ADDR() 		bfin_read32(DMA37_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA37_CURR_ADDR(val) 	bfin_write32(DMA37_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA37_IRQ_STATUS()		bfin_read32(DMA37_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA37_IRQ_STATUS(val)	bfin_write32(DMA37_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA37_CURR_X_COUNT()		bfin_read32(DMA37_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA37_CURR_X_COUNT(val)	bfin_write32(DMA37_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA37_CURR_Y_COUNT()		bfin_read32(DMA37_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA37_CURR_Y_COUNT(val)	bfin_write32(DMA37_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA37_BWL_COUNT()		bfin_read32(DMA37_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA37_BWL_COUNT(val)		bfin_write32(DMA37_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA37_CURR_BWL_COUNT()	bfin_read32(DMA37_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA37_CURR_BWL_COUNT(val)	bfin_write32(DMA37_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA37_BWM_COUNT()		bfin_read32(DMA37_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA37_BWM_COUNT(val)		bfin_write32(DMA37_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA37_CURR_BWM_COUNT()	bfin_read32(DMA37_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA37_CURR_BWM_COUNT(val)	bfin_write32(DMA37_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 38 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA38_NEXT_DESC_PTR() 	bfin_read32(DMA38_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA38_NEXT_DESC_PTR(val) 	bfin_write32(DMA38_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA38_START_ADDR() 		bfin_read32(DMA38_START_ADDR)</div><div class='add'>+#define bfin_write_DMA38_START_ADDR(val) 	bfin_write32(DMA38_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA38_CONFIG()		bfin_read32(DMA38_CONFIG)</div><div class='add'>+#define bfin_write_DMA38_CONFIG(val)		bfin_write32(DMA38_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA38_X_COUNT()		bfin_read32(DMA38_X_COUNT)</div><div class='add'>+#define bfin_write_DMA38_X_COUNT(val)		bfin_write32(DMA38_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA38_X_MODIFY()		bfin_read32(DMA38_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA38_X_MODIFY(val) 		bfin_write32(DMA38_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA38_Y_COUNT()		bfin_read32(DMA38_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA38_Y_COUNT(val)		bfin_write32(DMA38_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA38_Y_MODIFY()		bfin_read32(DMA38_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA38_Y_MODIFY(val) 		bfin_write32(DMA38_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA38_CURR_DESC_PTR() 	bfin_read32(DMA38_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA38_CURR_DESC_PTR(val) 	bfin_write32(DMA38_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA38_PREV_DESC_PTR() 	bfin_read32(DMA38_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA38_PREV_DESC_PTR(val) 	bfin_write32(DMA38_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA38_CURR_ADDR() 		bfin_read32(DMA38_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA38_CURR_ADDR(val) 	bfin_write32(DMA38_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA38_IRQ_STATUS()		bfin_read32(DMA38_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA38_IRQ_STATUS(val)	bfin_write32(DMA38_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA38_CURR_X_COUNT()		bfin_read32(DMA38_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA38_CURR_X_COUNT(val)	bfin_write32(DMA38_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA38_CURR_Y_COUNT()		bfin_read32(DMA38_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA38_CURR_Y_COUNT(val)	bfin_write32(DMA38_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA38_BWL_COUNT()		bfin_read32(DMA38_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA38_BWL_COUNT(val)		bfin_write32(DMA38_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA38_CURR_BWL_COUNT()	bfin_read32(DMA38_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA38_CURR_BWL_COUNT(val)	bfin_write32(DMA38_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA38_BWM_COUNT()		bfin_read32(DMA38_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA38_BWM_COUNT(val)		bfin_write32(DMA38_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA38_CURR_BWM_COUNT()	bfin_read32(DMA38_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA38_CURR_BWM_COUNT(val)	bfin_write32(DMA38_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 39 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA39_NEXT_DESC_PTR() 	bfin_read32(DMA39_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA39_NEXT_DESC_PTR(val) 	bfin_write32(DMA39_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA39_START_ADDR() 		bfin_read32(DMA39_START_ADDR)</div><div class='add'>+#define bfin_write_DMA39_START_ADDR(val) 	bfin_write32(DMA39_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA39_CONFIG()		bfin_read32(DMA39_CONFIG)</div><div class='add'>+#define bfin_write_DMA39_CONFIG(val)		bfin_write32(DMA39_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA39_X_COUNT()		bfin_read32(DMA39_X_COUNT)</div><div class='add'>+#define bfin_write_DMA39_X_COUNT(val)		bfin_write32(DMA39_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA39_X_MODIFY()		bfin_read32(DMA39_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA39_X_MODIFY(val) 		bfin_write32(DMA39_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA39_Y_COUNT()		bfin_read32(DMA39_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA39_Y_COUNT(val)		bfin_write32(DMA39_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA39_Y_MODIFY()		bfin_read32(DMA39_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA39_Y_MODIFY(val) 		bfin_write32(DMA39_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA39_CURR_DESC_PTR() 	bfin_read32(DMA39_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA39_CURR_DESC_PTR(val) 	bfin_write32(DMA39_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA39_PREV_DESC_PTR() 	bfin_read32(DMA39_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA39_PREV_DESC_PTR(val) 	bfin_write32(DMA39_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA39_CURR_ADDR() 		bfin_read32(DMA39_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA39_CURR_ADDR(val) 	bfin_write32(DMA39_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA39_IRQ_STATUS()		bfin_read32(DMA39_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA39_IRQ_STATUS(val)	bfin_write32(DMA39_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA39_CURR_X_COUNT()		bfin_read32(DMA39_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA39_CURR_X_COUNT(val)	bfin_write32(DMA39_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA39_CURR_Y_COUNT()		bfin_read32(DMA39_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA39_CURR_Y_COUNT(val)	bfin_write32(DMA39_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA39_BWL_COUNT()		bfin_read32(DMA39_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA39_BWL_COUNT(val)		bfin_write32(DMA39_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA39_CURR_BWL_COUNT()	bfin_read32(DMA39_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA39_CURR_BWL_COUNT(val)	bfin_write32(DMA39_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA39_BWM_COUNT()		bfin_read32(DMA39_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA39_BWM_COUNT(val)		bfin_write32(DMA39_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA39_CURR_BWM_COUNT()	bfin_read32(DMA39_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA39_CURR_BWM_COUNT(val)	bfin_write32(DMA39_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 40 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA40_NEXT_DESC_PTR() 	bfin_read32(DMA40_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA40_NEXT_DESC_PTR(val) 	bfin_write32(DMA40_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA40_START_ADDR() 		bfin_read32(DMA40_START_ADDR)</div><div class='add'>+#define bfin_write_DMA40_START_ADDR(val) 	bfin_write32(DMA40_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA40_CONFIG()		bfin_read32(DMA40_CONFIG)</div><div class='add'>+#define bfin_write_DMA40_CONFIG(val)		bfin_write32(DMA40_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA40_X_COUNT()		bfin_read32(DMA40_X_COUNT)</div><div class='add'>+#define bfin_write_DMA40_X_COUNT(val)		bfin_write32(DMA40_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA40_X_MODIFY()		bfin_read32(DMA40_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA40_X_MODIFY(val) 		bfin_write32(DMA40_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA40_Y_COUNT()		bfin_read32(DMA40_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA40_Y_COUNT(val)		bfin_write32(DMA40_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA40_Y_MODIFY()		bfin_read32(DMA40_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA40_Y_MODIFY(val) 		bfin_write32(DMA40_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA40_CURR_DESC_PTR() 	bfin_read32(DMA40_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA40_CURR_DESC_PTR(val) 	bfin_write32(DMA40_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA40_PREV_DESC_PTR() 	bfin_read32(DMA40_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA40_PREV_DESC_PTR(val) 	bfin_write32(DMA40_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA40_CURR_ADDR() 		bfin_read32(DMA40_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA40_CURR_ADDR(val) 	bfin_write32(DMA40_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA40_IRQ_STATUS()		bfin_read32(DMA40_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA40_IRQ_STATUS(val)	bfin_write32(DMA40_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA40_CURR_X_COUNT()		bfin_read32(DMA40_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA40_CURR_X_COUNT(val)	bfin_write32(DMA40_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA40_CURR_Y_COUNT()		bfin_read32(DMA40_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA40_CURR_Y_COUNT(val)	bfin_write32(DMA40_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA40_BWL_COUNT()		bfin_read32(DMA40_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA40_BWL_COUNT(val)		bfin_write32(DMA40_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA40_CURR_BWL_COUNT()	bfin_read32(DMA40_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA40_CURR_BWL_COUNT(val)	bfin_write32(DMA40_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA40_BWM_COUNT()		bfin_read32(DMA40_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA40_BWM_COUNT(val)		bfin_write32(DMA40_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA40_CURR_BWM_COUNT()	bfin_read32(DMA40_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA40_CURR_BWM_COUNT(val)	bfin_write32(DMA40_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 41 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA41_NEXT_DESC_PTR() 	bfin_read32(DMA41_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA41_NEXT_DESC_PTR(val) 	bfin_write32(DMA41_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA41_START_ADDR() 		bfin_read32(DMA41_START_ADDR)</div><div class='add'>+#define bfin_write_DMA41_START_ADDR(val) 	bfin_write32(DMA41_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA41_CONFIG()		bfin_read32(DMA41_CONFIG)</div><div class='add'>+#define bfin_write_DMA41_CONFIG(val)		bfin_write32(DMA41_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA41_X_COUNT()		bfin_read32(DMA41_X_COUNT)</div><div class='add'>+#define bfin_write_DMA41_X_COUNT(val)		bfin_write32(DMA41_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA41_X_MODIFY()		bfin_read32(DMA41_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA41_X_MODIFY(val) 		bfin_write32(DMA41_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA41_Y_COUNT()		bfin_read32(DMA41_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA41_Y_COUNT(val)		bfin_write32(DMA41_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA41_Y_MODIFY()		bfin_read32(DMA41_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA41_Y_MODIFY(val) 		bfin_write32(DMA41_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA41_CURR_DESC_PTR() 	bfin_read32(DMA41_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA41_CURR_DESC_PTR(val) 	bfin_write32(DMA41_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA41_PREV_DESC_PTR() 	bfin_read32(DMA41_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA41_PREV_DESC_PTR(val) 	bfin_write32(DMA41_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA41_CURR_ADDR() 		bfin_read32(DMA41_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA41_CURR_ADDR(val) 	bfin_write32(DMA41_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA41_IRQ_STATUS()		bfin_read32(DMA41_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA41_IRQ_STATUS(val)	bfin_write32(DMA41_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA41_CURR_X_COUNT()		bfin_read32(DMA41_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA41_CURR_X_COUNT(val)	bfin_write32(DMA41_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA41_CURR_Y_COUNT()		bfin_read32(DMA41_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA41_CURR_Y_COUNT(val)	bfin_write32(DMA41_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA41_BWL_COUNT()		bfin_read32(DMA41_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA41_BWL_COUNT(val)		bfin_write32(DMA41_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA41_CURR_BWL_COUNT()	bfin_read32(DMA41_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA41_CURR_BWL_COUNT(val)	bfin_write32(DMA41_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA41_BWM_COUNT()		bfin_read32(DMA41_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA41_BWM_COUNT(val)		bfin_write32(DMA41_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA41_CURR_BWM_COUNT()	bfin_read32(DMA41_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA41_CURR_BWM_COUNT(val)	bfin_write32(DMA41_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 42 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA42_NEXT_DESC_PTR() 	bfin_read32(DMA42_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA42_NEXT_DESC_PTR(val) 	bfin_write32(DMA42_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA42_START_ADDR() 		bfin_read32(DMA42_START_ADDR)</div><div class='add'>+#define bfin_write_DMA42_START_ADDR(val) 	bfin_write32(DMA42_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA42_CONFIG()		bfin_read32(DMA42_CONFIG)</div><div class='add'>+#define bfin_write_DMA42_CONFIG(val)		bfin_write32(DMA42_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA42_X_COUNT()		bfin_read32(DMA42_X_COUNT)</div><div class='add'>+#define bfin_write_DMA42_X_COUNT(val)		bfin_write32(DMA42_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA42_X_MODIFY()		bfin_read32(DMA42_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA42_X_MODIFY(val) 		bfin_write32(DMA42_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA42_Y_COUNT()		bfin_read32(DMA42_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA42_Y_COUNT(val)		bfin_write32(DMA42_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA42_Y_MODIFY()		bfin_read32(DMA42_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA42_Y_MODIFY(val) 		bfin_write32(DMA42_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA42_CURR_DESC_PTR() 	bfin_read32(DMA42_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA42_CURR_DESC_PTR(val) 	bfin_write32(DMA42_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA42_PREV_DESC_PTR() 	bfin_read32(DMA42_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA42_PREV_DESC_PTR(val) 	bfin_write32(DMA42_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA42_CURR_ADDR() 		bfin_read32(DMA42_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA42_CURR_ADDR(val) 	bfin_write32(DMA42_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA42_IRQ_STATUS()		bfin_read32(DMA42_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA42_IRQ_STATUS(val)	bfin_write32(DMA42_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA42_CURR_X_COUNT()		bfin_read32(DMA42_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA42_CURR_X_COUNT(val)	bfin_write32(DMA42_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA42_CURR_Y_COUNT()		bfin_read32(DMA42_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA42_CURR_Y_COUNT(val)	bfin_write32(DMA42_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA42_BWL_COUNT()		bfin_read32(DMA42_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA42_BWL_COUNT(val)		bfin_write32(DMA42_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA42_CURR_BWL_COUNT()	bfin_read32(DMA42_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA42_CURR_BWL_COUNT(val)	bfin_write32(DMA42_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA42_BWM_COUNT()		bfin_read32(DMA42_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA42_BWM_COUNT(val)		bfin_write32(DMA42_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA42_CURR_BWM_COUNT()	bfin_read32(DMA42_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA42_CURR_BWM_COUNT(val)	bfin_write32(DMA42_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 43 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA43_NEXT_DESC_PTR() 	bfin_read32(DMA43_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA43_NEXT_DESC_PTR(val) 	bfin_write32(DMA43_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA43_START_ADDR() 		bfin_read32(DMA43_START_ADDR)</div><div class='add'>+#define bfin_write_DMA43_START_ADDR(val) 	bfin_write32(DMA43_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA43_CONFIG()		bfin_read32(DMA43_CONFIG)</div><div class='add'>+#define bfin_write_DMA43_CONFIG(val)		bfin_write32(DMA43_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA43_X_COUNT()		bfin_read32(DMA43_X_COUNT)</div><div class='add'>+#define bfin_write_DMA43_X_COUNT(val)		bfin_write32(DMA43_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA43_X_MODIFY()		bfin_read32(DMA43_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA43_X_MODIFY(val) 		bfin_write32(DMA43_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA43_Y_COUNT()		bfin_read32(DMA43_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA43_Y_COUNT(val)		bfin_write32(DMA43_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA43_Y_MODIFY()		bfin_read32(DMA43_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA43_Y_MODIFY(val) 		bfin_write32(DMA43_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA43_CURR_DESC_PTR() 	bfin_read32(DMA43_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA43_CURR_DESC_PTR(val) 	bfin_write32(DMA43_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA43_PREV_DESC_PTR() 	bfin_read32(DMA43_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA43_PREV_DESC_PTR(val) 	bfin_write32(DMA43_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA43_CURR_ADDR() 		bfin_read32(DMA43_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA43_CURR_ADDR(val) 	bfin_write32(DMA43_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA43_IRQ_STATUS()		bfin_read32(DMA43_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA43_IRQ_STATUS(val)	bfin_write32(DMA43_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA43_CURR_X_COUNT()		bfin_read32(DMA43_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA43_CURR_X_COUNT(val)	bfin_write32(DMA43_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA43_CURR_Y_COUNT()		bfin_read32(DMA43_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA43_CURR_Y_COUNT(val)	bfin_write32(DMA43_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA43_BWL_COUNT()		bfin_read32(DMA43_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA43_BWL_COUNT(val)		bfin_write32(DMA43_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA43_CURR_BWL_COUNT()	bfin_read32(DMA43_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA43_CURR_BWL_COUNT(val)	bfin_write32(DMA43_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA43_BWM_COUNT()		bfin_read32(DMA43_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA43_BWM_COUNT(val)		bfin_write32(DMA43_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA43_CURR_BWM_COUNT()	bfin_read32(DMA43_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA43_CURR_BWM_COUNT(val)	bfin_write32(DMA43_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 44 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA44_NEXT_DESC_PTR() 	bfin_read32(DMA44_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA44_NEXT_DESC_PTR(val) 	bfin_write32(DMA44_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA44_START_ADDR() 		bfin_read32(DMA44_START_ADDR)</div><div class='add'>+#define bfin_write_DMA44_START_ADDR(val) 	bfin_write32(DMA44_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA44_CONFIG()		bfin_read32(DMA44_CONFIG)</div><div class='add'>+#define bfin_write_DMA44_CONFIG(val)		bfin_write32(DMA44_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA44_X_COUNT()		bfin_read32(DMA44_X_COUNT)</div><div class='add'>+#define bfin_write_DMA44_X_COUNT(val)		bfin_write32(DMA44_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA44_X_MODIFY()		bfin_read32(DMA44_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA44_X_MODIFY(val) 		bfin_write32(DMA44_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA44_Y_COUNT()		bfin_read32(DMA44_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA44_Y_COUNT(val)		bfin_write32(DMA44_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA44_Y_MODIFY()		bfin_read32(DMA44_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA44_Y_MODIFY(val) 		bfin_write32(DMA44_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA44_CURR_DESC_PTR() 	bfin_read32(DMA44_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA44_CURR_DESC_PTR(val) 	bfin_write32(DMA44_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA44_PREV_DESC_PTR() 	bfin_read32(DMA44_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA44_PREV_DESC_PTR(val) 	bfin_write32(DMA44_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA44_CURR_ADDR() 		bfin_read32(DMA44_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA44_CURR_ADDR(val) 	bfin_write32(DMA44_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA44_IRQ_STATUS()		bfin_read32(DMA44_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA44_IRQ_STATUS(val)	bfin_write32(DMA44_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA44_CURR_X_COUNT()		bfin_read32(DMA44_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA44_CURR_X_COUNT(val)	bfin_write32(DMA44_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA44_CURR_Y_COUNT()		bfin_read32(DMA44_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA44_CURR_Y_COUNT(val)	bfin_write32(DMA44_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA44_BWL_COUNT()		bfin_read32(DMA44_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA44_BWL_COUNT(val)		bfin_write32(DMA44_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA44_CURR_BWL_COUNT()	bfin_read32(DMA44_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA44_CURR_BWL_COUNT(val)	bfin_write32(DMA44_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA44_BWM_COUNT()		bfin_read32(DMA44_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA44_BWM_COUNT(val)		bfin_write32(DMA44_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA44_CURR_BWM_COUNT()	bfin_read32(DMA44_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA44_CURR_BWM_COUNT(val)	bfin_write32(DMA44_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 45 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA45_NEXT_DESC_PTR() 	bfin_read32(DMA45_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA45_NEXT_DESC_PTR(val) 	bfin_write32(DMA45_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA45_START_ADDR() 		bfin_read32(DMA45_START_ADDR)</div><div class='add'>+#define bfin_write_DMA45_START_ADDR(val) 	bfin_write32(DMA45_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA45_CONFIG()		bfin_read32(DMA45_CONFIG)</div><div class='add'>+#define bfin_write_DMA45_CONFIG(val)		bfin_write32(DMA45_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA45_X_COUNT()		bfin_read32(DMA45_X_COUNT)</div><div class='add'>+#define bfin_write_DMA45_X_COUNT(val)		bfin_write32(DMA45_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA45_X_MODIFY()		bfin_read32(DMA45_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA45_X_MODIFY(val) 		bfin_write32(DMA45_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA45_Y_COUNT()		bfin_read32(DMA45_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA45_Y_COUNT(val)		bfin_write32(DMA45_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA45_Y_MODIFY()		bfin_read32(DMA45_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA45_Y_MODIFY(val) 		bfin_write32(DMA45_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA45_CURR_DESC_PTR() 	bfin_read32(DMA45_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA45_CURR_DESC_PTR(val) 	bfin_write32(DMA45_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA45_PREV_DESC_PTR() 	bfin_read32(DMA45_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA45_PREV_DESC_PTR(val) 	bfin_write32(DMA45_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA45_CURR_ADDR() 		bfin_read32(DMA45_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA45_CURR_ADDR(val) 	bfin_write32(DMA45_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA45_IRQ_STATUS()		bfin_read32(DMA45_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA45_IRQ_STATUS(val)	bfin_write32(DMA45_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA45_CURR_X_COUNT()		bfin_read32(DMA45_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA45_CURR_X_COUNT(val)	bfin_write32(DMA45_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA45_CURR_Y_COUNT()		bfin_read32(DMA45_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA45_CURR_Y_COUNT(val)	bfin_write32(DMA45_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA45_BWL_COUNT()		bfin_read32(DMA45_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA45_BWL_COUNT(val)		bfin_write32(DMA45_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA45_CURR_BWL_COUNT()	bfin_read32(DMA45_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA45_CURR_BWL_COUNT(val)	bfin_write32(DMA45_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA45_BWM_COUNT()		bfin_read32(DMA45_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA45_BWM_COUNT(val)		bfin_write32(DMA45_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA45_CURR_BWM_COUNT()	bfin_read32(DMA45_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA45_CURR_BWM_COUNT(val)	bfin_write32(DMA45_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+/* DMA Channel 46 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_DMA46_NEXT_DESC_PTR() 	bfin_read32(DMA46_NEXT_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA46_NEXT_DESC_PTR(val) 	bfin_write32(DMA46_NEXT_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA46_START_ADDR() 		bfin_read32(DMA46_START_ADDR)</div><div class='add'>+#define bfin_write_DMA46_START_ADDR(val) 	bfin_write32(DMA46_START_ADDR, val)</div><div class='add'>+#define bfin_read_DMA46_CONFIG()		bfin_read32(DMA46_CONFIG)</div><div class='add'>+#define bfin_write_DMA46_CONFIG(val)		bfin_write32(DMA46_CONFIG, val)</div><div class='add'>+#define bfin_read_DMA46_X_COUNT()		bfin_read32(DMA46_X_COUNT)</div><div class='add'>+#define bfin_write_DMA46_X_COUNT(val)		bfin_write32(DMA46_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA46_X_MODIFY()		bfin_read32(DMA46_X_MODIFY)</div><div class='add'>+#define bfin_write_DMA46_X_MODIFY(val) 		bfin_write32(DMA46_X_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA46_Y_COUNT()		bfin_read32(DMA46_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA46_Y_COUNT(val)		bfin_write32(DMA46_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA46_Y_MODIFY()		bfin_read32(DMA46_Y_MODIFY)</div><div class='add'>+#define bfin_write_DMA46_Y_MODIFY(val) 		bfin_write32(DMA46_Y_MODIFY, val)</div><div class='add'>+#define bfin_read_DMA46_CURR_DESC_PTR() 	bfin_read32(DMA46_CURR_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA46_CURR_DESC_PTR(val) 	bfin_write32(DMA46_CURR_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA46_PREV_DESC_PTR() 	bfin_read32(DMA46_PREV_DESC_PTR)</div><div class='add'>+#define bfin_write_DMA46_PREV_DESC_PTR(val) 	bfin_write32(DMA46_PREV_DESC_PTR, val)</div><div class='add'>+#define bfin_read_DMA46_CURR_ADDR() 		bfin_read32(DMA46_CURR_ADDR)</div><div class='add'>+#define bfin_write_DMA46_CURR_ADDR(val) 	bfin_write32(DMA46_CURR_ADDR, val)</div><div class='add'>+#define bfin_read_DMA46_IRQ_STATUS()		bfin_read32(DMA46_IRQ_STATUS)</div><div class='add'>+#define bfin_write_DMA46_IRQ_STATUS(val)	bfin_write32(DMA46_IRQ_STATUS, val)</div><div class='add'>+#define bfin_read_DMA46_CURR_X_COUNT()		bfin_read32(DMA46_CURR_X_COUNT)</div><div class='add'>+#define bfin_write_DMA46_CURR_X_COUNT(val)	bfin_write32(DMA46_CURR_X_COUNT, val)</div><div class='add'>+#define bfin_read_DMA46_CURR_Y_COUNT()		bfin_read32(DMA46_CURR_Y_COUNT)</div><div class='add'>+#define bfin_write_DMA46_CURR_Y_COUNT(val)	bfin_write32(DMA46_CURR_Y_COUNT, val)</div><div class='add'>+#define bfin_read_DMA46_BWL_COUNT()		bfin_read32(DMA46_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA46_BWL_COUNT(val)		bfin_write32(DMA46_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA46_CURR_BWL_COUNT()	bfin_read32(DMA46_CURR_BWL_COUNT)</div><div class='add'>+#define bfin_write_DMA46_CURR_BWL_COUNT(val)	bfin_write32(DMA46_CURR_BWL_COUNT, val)</div><div class='add'>+#define bfin_read_DMA46_BWM_COUNT()		bfin_read32(DMA46_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA46_BWM_COUNT(val)		bfin_write32(DMA46_BWM_COUNT, val)</div><div class='add'>+#define bfin_read_DMA46_CURR_BWM_COUNT()	bfin_read32(DMA46_CURR_BWM_COUNT)</div><div class='add'>+#define bfin_write_DMA46_CURR_BWM_COUNT(val)	bfin_write32(DMA46_CURR_BWM_COUNT, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* EPPI1 Registers */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Port Interrubfin_read_()t 0 Registers (32-bit) */</div><div class='add'>+</div><div class='add'>+#define bfin_read_PINT0_MASK_SET()		bfin_read32(PINT0_MASK_SET)</div><div class='add'>+#define bfin_write_PINT0_MASK_SET(val)		bfin_write32(PINT0_MASK_SET, val)</div><div class='add'>+#define bfin_read_PINT0_MASK_CLEAR()		bfin_read32(PINT0_MASK_CLEAR)</div><div class='add'>+#define bfin_write_PINT0_MASK_CLEAR(val)	bfin_write32(PINT0_MASK_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT0_REQUEST()		bfin_read32(PINT0_REQUEST)</div><div class='add'>+#define bfin_write_PINT0_REQUEST(val)		bfin_write32(PINT0_REQUEST, val)</div><div class='add'>+#define bfin_read_PINT0_ASSIGN()		bfin_read32(PINT0_ASSIGN)</div><div class='add'>+#define bfin_write_PINT0_ASSIGN(val)		bfin_write32(PINT0_ASSIGN, val)</div><div class='add'>+#define bfin_read_PINT0_EDGE_SET()		bfin_read32(PINT0_EDGE_SET)</div><div class='add'>+#define bfin_write_PINT0_EDGE_SET(val)		bfin_write32(PINT0_EDGE_SET, val)</div><div class='add'>+#define bfin_read_PINT0_EDGE_CLEAR()		bfin_read32(PINT0_EDGE_CLEAR)</div><div class='add'>+#define bfin_write_PINT0_EDGE_CLEAR(val)	bfin_write32(PINT0_EDGE_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT0_INVERT_SET()		bfin_read32(PINT0_INVERT_SET)</div><div class='add'>+#define bfin_write_PINT0_INVERT_SET(val)	bfin_write32(PINT0_INVERT_SET, val)</div><div class='add'>+#define bfin_read_PINT0_INVERT_CLEAR()		bfin_read32(PINT0_INVERT_CLEAR)</div><div class='add'>+#define bfin_write_PINT0_INVERT_CLEAR(val)	bfin_write32(PINT0_INVERT_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT0_PINSTATE()		bfin_read32(PINT0_PINSTATE)</div><div class='add'>+#define bfin_write_PINT0_PINSTATE(val)		bfin_write32(PINT0_PINSTATE, val)</div><div class='add'>+#define bfin_read_PINT0_LATCH()			bfin_read32(PINT0_LATCH)</div><div class='add'>+#define bfin_write_PINT0_LATCH(val)		bfin_write32(PINT0_LATCH, val)</div><div class='add'>+</div><div class='add'>+/* Port Interrubfin_read_()t 1 Registers (32-bit) */</div><div class='add'>+</div><div class='add'>+#define bfin_read_PINT1_MASK_SET()		bfin_read32(PINT1_MASK_SET)</div><div class='add'>+#define bfin_write_PINT1_MASK_SET(val)		bfin_write32(PINT1_MASK_SET, val)</div><div class='add'>+#define bfin_read_PINT1_MASK_CLEAR()		bfin_read32(PINT1_MASK_CLEAR)</div><div class='add'>+#define bfin_write_PINT1_MASK_CLEAR(val)	bfin_write32(PINT1_MASK_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT1_REQUEST()		bfin_read32(PINT1_REQUEST)</div><div class='add'>+#define bfin_write_PINT1_REQUEST(val)		bfin_write32(PINT1_REQUEST, val)</div><div class='add'>+#define bfin_read_PINT1_ASSIGN()		bfin_read32(PINT1_ASSIGN)</div><div class='add'>+#define bfin_write_PINT1_ASSIGN(val)		bfin_write32(PINT1_ASSIGN, val)</div><div class='add'>+#define bfin_read_PINT1_EDGE_SET()		bfin_read32(PINT1_EDGE_SET)</div><div class='add'>+#define bfin_write_PINT1_EDGE_SET(val)		bfin_write32(PINT1_EDGE_SET, val)</div><div class='add'>+#define bfin_read_PINT1_EDGE_CLEAR()		bfin_read32(PINT1_EDGE_CLEAR)</div><div class='add'>+#define bfin_write_PINT1_EDGE_CLEAR(val)	bfin_write32(PINT1_EDGE_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT1_INVERT_SET()		bfin_read32(PINT1_INVERT_SET)</div><div class='add'>+#define bfin_write_PINT1_INVERT_SET(val)	bfin_write32(PINT1_INVERT_SET, val)</div><div class='add'>+#define bfin_read_PINT1_INVERT_CLEAR()		bfin_read32(PINT1_INVERT_CLEAR)</div><div class='add'>+#define bfin_write_PINT1_INVERT_CLEAR(val)	bfin_write32(PINT1_INVERT_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT1_PINSTATE()		bfin_read32(PINT1_PINSTATE)</div><div class='add'>+#define bfin_write_PINT1_PINSTATE(val)		bfin_write32(PINT1_PINSTATE, val)</div><div class='add'>+#define bfin_read_PINT1_LATCH()			bfin_read32(PINT1_LATCH)</div><div class='add'>+#define bfin_write_PINT1_LATCH(val)		bfin_write32(PINT1_LATCH, val)</div><div class='add'>+</div><div class='add'>+/* Port Interrubfin_read_()t 2 Registers (32-bit) */</div><div class='add'>+</div><div class='add'>+#define bfin_read_PINT2_MASK_SET()		bfin_read32(PINT2_MASK_SET)</div><div class='add'>+#define bfin_write_PINT2_MASK_SET(val)		bfin_write32(PINT2_MASK_SET, val)</div><div class='add'>+#define bfin_read_PINT2_MASK_CLEAR()		bfin_read32(PINT2_MASK_CLEAR)</div><div class='add'>+#define bfin_write_PINT2_MASK_CLEAR(val)	bfin_write32(PINT2_MASK_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT2_REQUEST()		bfin_read32(PINT2_REQUEST)</div><div class='add'>+#define bfin_write_PINT2_REQUEST(val)		bfin_write32(PINT2_REQUEST, val)</div><div class='add'>+#define bfin_read_PINT2_ASSIGN()		bfin_read32(PINT2_ASSIGN)</div><div class='add'>+#define bfin_write_PINT2_ASSIGN(val)		bfin_write32(PINT2_ASSIGN, val)</div><div class='add'>+#define bfin_read_PINT2_EDGE_SET()		bfin_read32(PINT2_EDGE_SET)</div><div class='add'>+#define bfin_write_PINT2_EDGE_SET(val)		bfin_write32(PINT2_EDGE_SET, val)</div><div class='add'>+#define bfin_read_PINT2_EDGE_CLEAR()		bfin_read32(PINT2_EDGE_CLEAR)</div><div class='add'>+#define bfin_write_PINT2_EDGE_CLEAR(val)	bfin_write32(PINT2_EDGE_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT2_INVERT_SET()		bfin_read32(PINT2_INVERT_SET)</div><div class='add'>+#define bfin_write_PINT2_INVERT_SET(val)	bfin_write32(PINT2_INVERT_SET, val)</div><div class='add'>+#define bfin_read_PINT2_INVERT_CLEAR()		bfin_read32(PINT2_INVERT_CLEAR)</div><div class='add'>+#define bfin_write_PINT2_INVERT_CLEAR(val)	bfin_write32(PINT2_INVERT_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT2_PINSTATE()		bfin_read32(PINT2_PINSTATE)</div><div class='add'>+#define bfin_write_PINT2_PINSTATE(val)		bfin_write32(PINT2_PINSTATE, val)</div><div class='add'>+#define bfin_read_PINT2_LATCH()			bfin_read32(PINT2_LATCH)</div><div class='add'>+#define bfin_write_PINT2_LATCH(val)		bfin_write32(PINT2_LATCH, val)</div><div class='add'>+</div><div class='add'>+/* Port Interrubfin_read_()t 3 Registers (32-bit) */</div><div class='add'>+</div><div class='add'>+#define bfin_read_PINT3_MASK_SET()		bfin_read32(PINT3_MASK_SET)</div><div class='add'>+#define bfin_write_PINT3_MASK_SET(val)		bfin_write32(PINT3_MASK_SET, val)</div><div class='add'>+#define bfin_read_PINT3_MASK_CLEAR()		bfin_read32(PINT3_MASK_CLEAR)</div><div class='add'>+#define bfin_write_PINT3_MASK_CLEAR(val)	bfin_write32(PINT3_MASK_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT3_REQUEST()		bfin_read32(PINT3_REQUEST)</div><div class='add'>+#define bfin_write_PINT3_REQUEST(val)		bfin_write32(PINT3_REQUEST, val)</div><div class='add'>+#define bfin_read_PINT3_ASSIGN()		bfin_read32(PINT3_ASSIGN)</div><div class='add'>+#define bfin_write_PINT3_ASSIGN(val)		bfin_write32(PINT3_ASSIGN, val)</div><div class='add'>+#define bfin_read_PINT3_EDGE_SET()		bfin_read32(PINT3_EDGE_SET)</div><div class='add'>+#define bfin_write_PINT3_EDGE_SET(val)		bfin_write32(PINT3_EDGE_SET, val)</div><div class='add'>+#define bfin_read_PINT3_EDGE_CLEAR()		bfin_read32(PINT3_EDGE_CLEAR)</div><div class='add'>+#define bfin_write_PINT3_EDGE_CLEAR(val)	bfin_write32(PINT3_EDGE_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT3_INVERT_SET()		bfin_read32(PINT3_INVERT_SET)</div><div class='add'>+#define bfin_write_PINT3_INVERT_SET(val)	bfin_write32(PINT3_INVERT_SET, val)</div><div class='add'>+#define bfin_read_PINT3_INVERT_CLEAR()		bfin_read32(PINT3_INVERT_CLEAR)</div><div class='add'>+#define bfin_write_PINT3_INVERT_CLEAR(val)	bfin_write32(PINT3_INVERT_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT3_PINSTATE()		bfin_read32(PINT3_PINSTATE)</div><div class='add'>+#define bfin_write_PINT3_PINSTATE(val)		bfin_write32(PINT3_PINSTATE, val)</div><div class='add'>+#define bfin_read_PINT3_LATCH()			bfin_read32(PINT3_LATCH)</div><div class='add'>+#define bfin_write_PINT3_LATCH(val)		bfin_write32(PINT3_LATCH, val)</div><div class='add'>+</div><div class='add'>+/* Port Interrubfin_read_()t 4 Registers (32-bit) */</div><div class='add'>+</div><div class='add'>+#define bfin_read_PINT4_MASK_SET()		bfin_read32(PINT4_MASK_SET)</div><div class='add'>+#define bfin_write_PINT4_MASK_SET(val)		bfin_write32(PINT4_MASK_SET, val)</div><div class='add'>+#define bfin_read_PINT4_MASK_CLEAR()		bfin_read32(PINT4_MASK_CLEAR)</div><div class='add'>+#define bfin_write_PINT4_MASK_CLEAR(val)	bfin_write32(PINT4_MASK_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT4_REQUEST()		bfin_read32(PINT4_REQUEST)</div><div class='add'>+#define bfin_write_PINT4_REQUEST(val)		bfin_write32(PINT4_REQUEST, val)</div><div class='add'>+#define bfin_read_PINT4_ASSIGN()		bfin_read32(PINT4_ASSIGN)</div><div class='add'>+#define bfin_write_PINT4_ASSIGN(val)		bfin_write32(PINT4_ASSIGN, val)</div><div class='add'>+#define bfin_read_PINT4_EDGE_SET()		bfin_read32(PINT4_EDGE_SET)</div><div class='add'>+#define bfin_write_PINT4_EDGE_SET(val)		bfin_write32(PINT4_EDGE_SET, val)</div><div class='add'>+#define bfin_read_PINT4_EDGE_CLEAR()		bfin_read32(PINT4_EDGE_CLEAR)</div><div class='add'>+#define bfin_write_PINT4_EDGE_CLEAR(val)	bfin_write32(PINT4_EDGE_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT4_INVERT_SET()		bfin_read32(PINT4_INVERT_SET)</div><div class='add'>+#define bfin_write_PINT4_INVERT_SET(val)	bfin_write32(PINT4_INVERT_SET, val)</div><div class='add'>+#define bfin_read_PINT4_INVERT_CLEAR()		bfin_read32(PINT4_INVERT_CLEAR)</div><div class='add'>+#define bfin_write_PINT4_INVERT_CLEAR(val)	bfin_write32(PINT4_INVERT_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT4_PINSTATE()		bfin_read32(PINT4_PINSTATE)</div><div class='add'>+#define bfin_write_PINT4_PINSTATE(val)		bfin_write32(PINT4_PINSTATE, val)</div><div class='add'>+#define bfin_read_PINT4_LATCH()			bfin_read32(PINT4_LATCH)</div><div class='add'>+#define bfin_write_PINT4_LATCH(val)		bfin_write32(PINT4_LATCH, val)</div><div class='add'>+</div><div class='add'>+/* Port Interrubfin_read_()t 5 Registers (32-bit) */</div><div class='add'>+</div><div class='add'>+#define bfin_read_PINT5_MASK_SET()		bfin_read32(PINT5_MASK_SET)</div><div class='add'>+#define bfin_write_PINT5_MASK_SET(val)		bfin_write32(PINT5_MASK_SET, val)</div><div class='add'>+#define bfin_read_PINT5_MASK_CLEAR()		bfin_read32(PINT5_MASK_CLEAR)</div><div class='add'>+#define bfin_write_PINT5_MASK_CLEAR(val)	bfin_write32(PINT5_MASK_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT5_REQUEST()		bfin_read32(PINT5_REQUEST)</div><div class='add'>+#define bfin_write_PINT5_REQUEST(val)		bfin_write32(PINT5_REQUEST, val)</div><div class='add'>+#define bfin_read_PINT5_ASSIGN()		bfin_read32(PINT5_ASSIGN)</div><div class='add'>+#define bfin_write_PINT5_ASSIGN(val)		bfin_write32(PINT5_ASSIGN, val)</div><div class='add'>+#define bfin_read_PINT5_EDGE_SET()		bfin_read32(PINT5_EDGE_SET)</div><div class='add'>+#define bfin_write_PINT5_EDGE_SET(val)		bfin_write32(PINT5_EDGE_SET, val)</div><div class='add'>+#define bfin_read_PINT5_EDGE_CLEAR()		bfin_read32(PINT5_EDGE_CLEAR)</div><div class='add'>+#define bfin_write_PINT5_EDGE_CLEAR(val)	bfin_write32(PINT5_EDGE_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT5_INVERT_SET()		bfin_read32(PINT5_INVERT_SET)</div><div class='add'>+#define bfin_write_PINT5_INVERT_SET(val)	bfin_write32(PINT5_INVERT_SET, val)</div><div class='add'>+#define bfin_read_PINT5_INVERT_CLEAR()		bfin_read32(PINT5_INVERT_CLEAR)</div><div class='add'>+#define bfin_write_PINT5_INVERT_CLEAR(val)	bfin_write32(PINT5_INVERT_CLEAR, val)</div><div class='add'>+#define bfin_read_PINT5_PINSTATE()		bfin_read32(PINT5_PINSTATE)</div><div class='add'>+#define bfin_write_PINT5_PINSTATE(val)		bfin_write32(PINT5_PINSTATE, val)</div><div class='add'>+#define bfin_read_PINT5_LATCH()			bfin_read32(PINT5_LATCH)</div><div class='add'>+#define bfin_write_PINT5_LATCH(val)		bfin_write32(PINT5_LATCH, val)</div><div class='add'>+</div><div class='add'>+/* Port A Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_PORTA_FER()		bfin_read32(PORTA_FER)</div><div class='add'>+#define bfin_write_PORTA_FER(val)	bfin_write32(PORTA_FER, val)</div><div class='add'>+#define bfin_read_PORTA_FER_SET()	bfin_read32(PORTA_FER_SET)</div><div class='add'>+#define bfin_write_PORTA_FER_SET(val)	bfin_write32(PORTA_FER_SET, val)</div><div class='add'>+#define bfin_read_PORTA_FER_CLEAR()	bfin_read32(PORTA_FER_CLEAR)</div><div class='add'>+#define bfin_write_PORTA_FER_CLEAR(val)	bfin_write32(PORTA_FER_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTA()		bfin_read32(PORTA)</div><div class='add'>+#define bfin_write_PORTA(val)		bfin_write32(PORTA, val)</div><div class='add'>+#define bfin_read_PORTA_SET()		bfin_read32(PORTA_SET)</div><div class='add'>+#define bfin_write_PORTA_SET(val)	bfin_write32(PORTA_SET, val)</div><div class='add'>+#define bfin_read_PORTA_CLEAR()		bfin_read32(PORTA_CLEAR)</div><div class='add'>+#define bfin_write_PORTA_CLEAR(val)	bfin_write32(PORTA_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTA_DIR()		bfin_read32(PORTA_DIR)</div><div class='add'>+#define bfin_write_PORTA_DIR(val)	bfin_write32(PORTA_DIR, val)</div><div class='add'>+#define bfin_read_PORTA_DIR_SET()	bfin_read32(PORTA_DIR_SET)</div><div class='add'>+#define bfin_write_PORTA_DIR_SET(val)	bfin_write32(PORTA_DIR_SET, val)</div><div class='add'>+#define bfin_read_PORTA_DIR_CLEAR()	bfin_read32(PORTA_DIR_CLEAR)</div><div class='add'>+#define bfin_write_PORTA_DIR_CLEAR(val)	bfin_write32(PORTA_DIR_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTA_INEN()		bfin_read32(PORTA_INEN)</div><div class='add'>+#define bfin_write_PORTA_INEN(val)	bfin_write32(PORTA_INEN, val)</div><div class='add'>+#define bfin_read_PORTA_INEN_SET()	bfin_read32(PORTA_INEN_SET)</div><div class='add'>+#define bfin_write_PORTA_INEN_SET(val)	bfin_write32(PORTA_INEN_SET, val)</div><div class='add'>+#define bfin_read_PORTA_INEN_CLEAR()	bfin_read32(PORTA_INEN_CLEAR)</div><div class='add'>+#define bfin_write_PORTA_INEN_CLEAR(val)	bfin_write32(PORTA_INEN_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTA_MUX()		bfin_read32(PORTA_MUX)</div><div class='add'>+#define bfin_write_PORTA_MUX(val)	bfin_write32(PORTA_MUX, val)</div><div class='add'>+#define bfin_read_PORTA_DATA_TGL()	bfin_read32(PORTA_DATA_TGL)</div><div class='add'>+#define bfin_write_PORTA_DATA_TGL(val)	bfin_write32(PORTA_DATA_TGL, val)</div><div class='add'>+#define bfin_read_PORTA_POL()		bfin_read32(PORTA_POL)</div><div class='add'>+#define bfin_write_PORTA_POL(val)	bfin_write32(PORTA_POL, val)</div><div class='add'>+#define bfin_read_PORTA_POL_SET()	bfin_read32(PORTA_POL_SET)</div><div class='add'>+#define bfin_write_PORTA_POL_SET(val)	bfin_write32(PORTA_POL_SET, val)</div><div class='add'>+#define bfin_read_PORTA_POL_CLEAR()	bfin_read32(PORTA_POL_CLEAR)</div><div class='add'>+#define bfin_write_PORTA_POL_CLEAR(val)	bfin_write32(PORTA_POL_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTA_LOCK()		bfin_read32(PORTA_LOCK)</div><div class='add'>+#define bfin_write_PORTA_LOCK(val)	bfin_write32(PORTA_LOCK, val)</div><div class='add'>+#define bfin_read_PORTA_REVID()		bfin_read32(PORTA_REVID)</div><div class='add'>+#define bfin_write_PORTA_REVID(val)	bfin_write32(PORTA_REVID, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Port B Registers */</div><div class='add'>+#define bfin_read_PORTB_FER()		bfin_read32(PORTB_FER)</div><div class='add'>+#define bfin_write_PORTB_FER(val)	bfin_write32(PORTB_FER, val)</div><div class='add'>+#define bfin_read_PORTB_FER_SET()	bfin_read32(PORTB_FER_SET)</div><div class='add'>+#define bfin_write_PORTB_FER_SET(val)	bfin_write32(PORTB_FER_SET, val)</div><div class='add'>+#define bfin_read_PORTB_FER_CLEAR()	bfin_read32(PORTB_FER_CLEAR)</div><div class='add'>+#define bfin_write_PORTB_FER_CLEAR(val)	bfin_write32(PORTB_FER_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTB()		bfin_read32(PORTB)</div><div class='add'>+#define bfin_write_PORTB(val)		bfin_write32(PORTB, val)</div><div class='add'>+#define bfin_read_PORTB_SET()		bfin_read32(PORTB_SET)</div><div class='add'>+#define bfin_write_PORTB_SET(val)	bfin_write32(PORTB_SET, val)</div><div class='add'>+#define bfin_read_PORTB_CLEAR()		bfin_read32(PORTB_CLEAR)</div><div class='add'>+#define bfin_write_PORTB_CLEAR(val)	bfin_write32(PORTB_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTB_DIR()		bfin_read32(PORTB_DIR)</div><div class='add'>+#define bfin_write_PORTB_DIR(val)	bfin_write32(PORTB_DIR, val)</div><div class='add'>+#define bfin_read_PORTB_DIR_SET()	bfin_read32(PORTB_DIR_SET)</div><div class='add'>+#define bfin_write_PORTB_DIR_SET(val)	bfin_write32(PORTB_DIR_SET, val)</div><div class='add'>+#define bfin_read_PORTB_DIR_CLEAR()	bfin_read32(PORTB_DIR_CLEAR)</div><div class='add'>+#define bfin_write_PORTB_DIR_CLEAR(val)	bfin_write32(PORTB_DIR_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTB_INEN()		bfin_read32(PORTB_INEN)</div><div class='add'>+#define bfin_write_PORTB_INEN(val)	bfin_write32(PORTB_INEN, val)</div><div class='add'>+#define bfin_read_PORTB_INEN_SET()	bfin_read32(PORTB_INEN_SET)</div><div class='add'>+#define bfin_write_PORTB_INEN_SET(val)	bfin_write32(PORTB_INEN_SET, val)</div><div class='add'>+#define bfin_read_PORTB_INEN_CLEAR()	bfin_read32(PORTB_INEN_CLEAR)</div><div class='add'>+#define bfin_write_PORTB_INEN_CLEAR(val)	bfin_write32(PORTB_INEN_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTB_MUX()		bfin_read32(PORTB_MUX)</div><div class='add'>+#define bfin_write_PORTB_MUX(val)	bfin_write32(PORTB_MUX, val)</div><div class='add'>+#define bfin_read_PORTB_DATA_TGL()	bfin_read32(PORTB_DATA_TGL)</div><div class='add'>+#define bfin_write_PORTB_DATA_TGL(val)	bfin_write32(PORTB_DATA_TGL, val)</div><div class='add'>+#define bfin_read_PORTB_POL()		bfin_read32(PORTB_POL)</div><div class='add'>+#define bfin_write_PORTB_POL(val)	bfin_write32(PORTB_POL, val)</div><div class='add'>+#define bfin_read_PORTB_POL_SET()	bfin_read32(PORTB_POL_SET)</div><div class='add'>+#define bfin_write_PORTB_POL_SET(val)	bfin_write32(PORTB_POL_SET, val)</div><div class='add'>+#define bfin_read_PORTB_POL_CLEAR()	bfin_read32(PORTB_POL_CLEAR)</div><div class='add'>+#define bfin_write_PORTB_POL_CLEAR(val)	bfin_write32(PORTB_POL_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTB_LOCK()		bfin_read32(PORTB_LOCK)</div><div class='add'>+#define bfin_write_PORTB_LOCK(val)	bfin_write32(PORTB_LOCK, val)</div><div class='add'>+#define bfin_read_PORTB_REVID()		bfin_read32(PORTB_REVID)</div><div class='add'>+#define bfin_write_PORTB_REVID(val)	bfin_write32(PORTB_REVID, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Port C Registers */</div><div class='add'>+#define bfin_read_PORTC_FER()		bfin_read32(PORTC_FER)</div><div class='add'>+#define bfin_write_PORTC_FER(val)	bfin_write32(PORTC_FER, val)</div><div class='add'>+#define bfin_read_PORTC_FER_SET()	bfin_read32(PORTC_FER_SET)</div><div class='add'>+#define bfin_write_PORTC_FER_SET(val)	bfin_write32(PORTC_FER_SET, val)</div><div class='add'>+#define bfin_read_PORTC_FER_CLEAR()	bfin_read32(PORTC_FER_CLEAR)</div><div class='add'>+#define bfin_write_PORTC_FER_CLEAR(val)	bfin_write32(PORTC_FER_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTC()		bfin_read32(PORTC)</div><div class='add'>+#define bfin_write_PORTC(val)		bfin_write32(PORTC, val)</div><div class='add'>+#define bfin_read_PORTC_SET()		bfin_read32(PORTC_SET)</div><div class='add'>+#define bfin_write_PORTC_SET(val)	bfin_write32(PORTC_SET, val)</div><div class='add'>+#define bfin_read_PORTC_CLEAR()		bfin_read32(PORTC_CLEAR)</div><div class='add'>+#define bfin_write_PORTC_CLEAR(val)	bfin_write32(PORTC_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTC_DIR()		bfin_read32(PORTC_DIR)</div><div class='add'>+#define bfin_write_PORTC_DIR(val)	bfin_write32(PORTC_DIR, val)</div><div class='add'>+#define bfin_read_PORTC_DIR_SET()	bfin_read32(PORTC_DIR_SET)</div><div class='add'>+#define bfin_write_PORTC_DIR_SET(val)	bfin_write32(PORTC_DIR_SET, val)</div><div class='add'>+#define bfin_read_PORTC_DIR_CLEAR()	bfin_read32(PORTC_DIR_CLEAR)</div><div class='add'>+#define bfin_write_PORTC_DIR_CLEAR(val)	bfin_write32(PORTC_DIR_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTC_INEN()		bfin_read32(PORTC_INEN)</div><div class='add'>+#define bfin_write_PORTC_INEN(val)	bfin_write32(PORTC_INEN, val)</div><div class='add'>+#define bfin_read_PORTC_INEN_SET()	bfin_read32(PORTC_INEN_SET)</div><div class='add'>+#define bfin_write_PORTC_INEN_SET(val)	bfin_write32(PORTC_INEN_SET, val)</div><div class='add'>+#define bfin_read_PORTC_INEN_CLEAR()	bfin_read32(PORTC_INEN_CLEAR)</div><div class='add'>+#define bfin_write_PORTC_INEN_CLEAR(val)	bfin_write32(PORTC_INEN_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTC_MUX()		bfin_read32(PORTC_MUX)</div><div class='add'>+#define bfin_write_PORTC_MUX(val)	bfin_write32(PORTC_MUX, val)</div><div class='add'>+#define bfin_read_PORTC_DATA_TGL()	bfin_read32(PORTC_DATA_TGL)</div><div class='add'>+#define bfin_write_PORTC_DATA_TGL(val)	bfin_write32(PORTC_DATA_TGL, val)</div><div class='add'>+#define bfin_read_PORTC_POL()		bfin_read32(PORTC_POL)</div><div class='add'>+#define bfin_write_PORTC_POL(val)	bfin_write32(PORTC_POL, val)</div><div class='add'>+#define bfin_read_PORTC_POL_SET()	bfin_read32(PORTC_POL_SET)</div><div class='add'>+#define bfin_write_PORTC_POL_SET(val)	bfin_write32(PORTC_POL_SET, val)</div><div class='add'>+#define bfin_read_PORTC_POL_CLEAR()	bfin_read32(PORTC_POL_CLEAR)</div><div class='add'>+#define bfin_write_PORTC_POL_CLEAR(val)	bfin_write32(PORTC_POL_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTC_LOCK()		bfin_read32(PORTC_LOCK)</div><div class='add'>+#define bfin_write_PORTC_LOCK(val)	bfin_write32(PORTC_LOCK, val)</div><div class='add'>+#define bfin_read_PORTC_REVID()		bfin_read32(PORTC_REVID)</div><div class='add'>+#define bfin_write_PORTC_REVID(val)	bfin_write32(PORTC_REVID, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Port D Registers */</div><div class='add'>+#define bfin_read_PORTD_FER()		bfin_read32(PORTD_FER)</div><div class='add'>+#define bfin_write_PORTD_FER(val)	bfin_write32(PORTD_FER, val)</div><div class='add'>+#define bfin_read_PORTD_FER_SET()	bfin_read32(PORTD_FER_SET)</div><div class='add'>+#define bfin_write_PORTD_FER_SET(val)	bfin_write32(PORTD_FER_SET, val)</div><div class='add'>+#define bfin_read_PORTD_FER_CLEAR()	bfin_read32(PORTD_FER_CLEAR)</div><div class='add'>+#define bfin_write_PORTD_FER_CLEAR(val)	bfin_write32(PORTD_FER_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTD()		bfin_read32(PORTD)</div><div class='add'>+#define bfin_write_PORTD(val)		bfin_write32(PORTD, val)</div><div class='add'>+#define bfin_read_PORTD_SET()		bfin_read32(PORTD_SET)</div><div class='add'>+#define bfin_write_PORTD_SET(val)	bfin_write32(PORTD_SET, val)</div><div class='add'>+#define bfin_read_PORTD_CLEAR()		bfin_read32(PORTD_CLEAR)</div><div class='add'>+#define bfin_write_PORTD_CLEAR(val)	bfin_write32(PORTD_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTD_DIR()		bfin_read32(PORTD_DIR)</div><div class='add'>+#define bfin_write_PORTD_DIR(val)	bfin_write32(PORTD_DIR, val)</div><div class='add'>+#define bfin_read_PORTD_DIR_SET()	bfin_read32(PORTD_DIR_SET)</div><div class='add'>+#define bfin_write_PORTD_DIR_SET(val)	bfin_write32(PORTD_DIR_SET, val)</div><div class='add'>+#define bfin_read_PORTD_DIR_CLEAR()	bfin_read32(PORTD_DIR_CLEAR)</div><div class='add'>+#define bfin_write_PORTD_DIR_CLEAR(val)	bfin_write32(PORTD_DIR_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTD_INEN()		bfin_read32(PORTD_INEN)</div><div class='add'>+#define bfin_write_PORTD_INEN(val)	bfin_write32(PORTD_INEN, val)</div><div class='add'>+#define bfin_read_PORTD_INEN_SET()	bfin_read32(PORTD_INEN_SET)</div><div class='add'>+#define bfin_write_PORTD_INEN_SET(val)	bfin_write32(PORTD_INEN_SET, val)</div><div class='add'>+#define bfin_read_PORTD_INEN_CLEAR()	bfin_read32(PORTD_INEN_CLEAR)</div><div class='add'>+#define bfin_write_PORTD_INEN_CLEAR(val)	bfin_write32(PORTD_INEN_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTD_MUX()		bfin_read32(PORTD_MUX)</div><div class='add'>+#define bfin_write_PORTD_MUX(val)	bfin_write32(PORTD_MUX, val)</div><div class='add'>+#define bfin_read_PORTD_DATA_TGL()	bfin_read32(PORTD_DATA_TGL)</div><div class='add'>+#define bfin_write_PORTD_DATA_TGL(val)	bfin_write32(PORTD_DATA_TGL, val)</div><div class='add'>+#define bfin_read_PORTD_POL()		bfin_read32(PORTD_POL)</div><div class='add'>+#define bfin_write_PORTD_POL(val)	bfin_write32(PORTD_POL, val)</div><div class='add'>+#define bfin_read_PORTD_POL_SET()	bfin_read32(PORTD_POL_SET)</div><div class='add'>+#define bfin_write_PORTD_POL_SET(val)	bfin_write32(PORTD_POL_SET, val)</div><div class='add'>+#define bfin_read_PORTD_POL_CLEAR()	bfin_read32(PORTD_POL_CLEAR)</div><div class='add'>+#define bfin_write_PORTD_POL_CLEAR(val)	bfin_write32(PORTD_POL_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTD_LOCK()		bfin_read32(PORTD_LOCK)</div><div class='add'>+#define bfin_write_PORTD_LOCK(val)	bfin_write32(PORTD_LOCK, val)</div><div class='add'>+#define bfin_read_PORTD_REVID()		bfin_read32(PORTD_REVID)</div><div class='add'>+#define bfin_write_PORTD_REVID(val)	bfin_write32(PORTD_REVID, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Port E Registers */</div><div class='add'>+#define bfin_read_PORTE_FER()		bfin_read32(PORTE_FER)</div><div class='add'>+#define bfin_write_PORTE_FER(val)	bfin_write32(PORTE_FER, val)</div><div class='add'>+#define bfin_read_PORTE_FER_SET()	bfin_read32(PORTE_FER_SET)</div><div class='add'>+#define bfin_write_PORTE_FER_SET(val)	bfin_write32(PORTE_FER_SET, val)</div><div class='add'>+#define bfin_read_PORTE_FER_CLEAR()	bfin_read32(PORTE_FER_CLEAR)</div><div class='add'>+#define bfin_write_PORTE_FER_CLEAR(val)	bfin_write32(PORTE_FER_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTE()		bfin_read32(PORTE)</div><div class='add'>+#define bfin_write_PORTE(val)		bfin_write32(PORTE, val)</div><div class='add'>+#define bfin_read_PORTE_SET()		bfin_read32(PORTE_SET)</div><div class='add'>+#define bfin_write_PORTE_SET(val)	bfin_write32(PORTE_SET, val)</div><div class='add'>+#define bfin_read_PORTE_CLEAR()		bfin_read32(PORTE_CLEAR)</div><div class='add'>+#define bfin_write_PORTE_CLEAR(val)	bfin_write32(PORTE_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTE_DIR()		bfin_read32(PORTE_DIR)</div><div class='add'>+#define bfin_write_PORTE_DIR(val)	bfin_write32(PORTE_DIR, val)</div><div class='add'>+#define bfin_read_PORTE_DIR_SET()	bfin_read32(PORTE_DIR_SET)</div><div class='add'>+#define bfin_write_PORTE_DIR_SET(val)	bfin_write32(PORTE_DIR_SET, val)</div><div class='add'>+#define bfin_read_PORTE_DIR_CLEAR()	bfin_read32(PORTE_DIR_CLEAR)</div><div class='add'>+#define bfin_write_PORTE_DIR_CLEAR(val)	bfin_write32(PORTE_DIR_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTE_INEN()		bfin_read32(PORTE_INEN)</div><div class='add'>+#define bfin_write_PORTE_INEN(val)	bfin_write32(PORTE_INEN, val)</div><div class='add'>+#define bfin_read_PORTE_INEN_SET()	bfin_read32(PORTE_INEN_SET)</div><div class='add'>+#define bfin_write_PORTE_INEN_SET(val)	bfin_write32(PORTE_INEN_SET, val)</div><div class='add'>+#define bfin_read_PORTE_INEN_CLEAR()	bfin_read32(PORTE_INEN_CLEAR)</div><div class='add'>+#define bfin_write_PORTE_INEN_CLEAR(val)	bfin_write32(PORTE_INEN_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTE_MUX()		bfin_read32(PORTE_MUX)</div><div class='add'>+#define bfin_write_PORTE_MUX(val)	bfin_write32(PORTE_MUX, val)</div><div class='add'>+#define bfin_read_PORTE_DATA_TGL()	bfin_read32(PORTE_DATA_TGL)</div><div class='add'>+#define bfin_write_PORTE_DATA_TGL(val)	bfin_write32(PORTE_DATA_TGL, val)</div><div class='add'>+#define bfin_read_PORTE_POL()		bfin_read32(PORTE_POL)</div><div class='add'>+#define bfin_write_PORTE_POL(val)	bfin_write32(PORTE_POL, val)</div><div class='add'>+#define bfin_read_PORTE_POL_SET()	bfin_read32(PORTE_POL_SET)</div><div class='add'>+#define bfin_write_PORTE_POL_SET(val)	bfin_write32(PORTE_POL_SET, val)</div><div class='add'>+#define bfin_read_PORTE_POL_CLEAR()	bfin_read32(PORTE_POL_CLEAR)</div><div class='add'>+#define bfin_write_PORTE_POL_CLEAR(val)	bfin_write32(PORTE_POL_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTE_LOCK()		bfin_read32(PORTE_LOCK)</div><div class='add'>+#define bfin_write_PORTE_LOCK(val)	bfin_write32(PORTE_LOCK, val)</div><div class='add'>+#define bfin_read_PORTE_REVID()		bfin_read32(PORTE_REVID)</div><div class='add'>+#define bfin_write_PORTE_REVID(val)	bfin_write32(PORTE_REVID, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Port F Registers */</div><div class='add'>+#define bfin_read_PORTF_FER()		bfin_read32(PORTF_FER)</div><div class='add'>+#define bfin_write_PORTF_FER(val)	bfin_write32(PORTF_FER, val)</div><div class='add'>+#define bfin_read_PORTF_FER_SET()	bfin_read32(PORTF_FER_SET)</div><div class='add'>+#define bfin_write_PORTF_FER_SET(val)	bfin_write32(PORTF_FER_SET, val)</div><div class='add'>+#define bfin_read_PORTF_FER_CLEAR()	bfin_read32(PORTF_FER_CLEAR)</div><div class='add'>+#define bfin_write_PORTF_FER_CLEAR(val)	bfin_write32(PORTF_FER_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTF()		bfin_read32(PORTF)</div><div class='add'>+#define bfin_write_PORTF(val)		bfin_write32(PORTF, val)</div><div class='add'>+#define bfin_read_PORTF_SET()		bfin_read32(PORTF_SET)</div><div class='add'>+#define bfin_write_PORTF_SET(val)	bfin_write32(PORTF_SET, val)</div><div class='add'>+#define bfin_read_PORTF_CLEAR()		bfin_read32(PORTF_CLEAR)</div><div class='add'>+#define bfin_write_PORTF_CLEAR(val)	bfin_write32(PORTF_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTF_DIR()		bfin_read32(PORTF_DIR)</div><div class='add'>+#define bfin_write_PORTF_DIR(val)	bfin_write32(PORTF_DIR, val)</div><div class='add'>+#define bfin_read_PORTF_DIR_SET()	bfin_read32(PORTF_DIR_SET)</div><div class='add'>+#define bfin_write_PORTF_DIR_SET(val)	bfin_write32(PORTF_DIR_SET, val)</div><div class='add'>+#define bfin_read_PORTF_DIR_CLEAR()	bfin_read32(PORTF_DIR_CLEAR)</div><div class='add'>+#define bfin_write_PORTF_DIR_CLEAR(val)	bfin_write32(PORTF_DIR_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTF_INEN()		bfin_read32(PORTF_INEN)</div><div class='add'>+#define bfin_write_PORTF_INEN(val)	bfin_write32(PORTF_INEN, val)</div><div class='add'>+#define bfin_read_PORTF_INEN_SET()	bfin_read32(PORTF_INEN_SET)</div><div class='add'>+#define bfin_write_PORTF_INEN_SET(val)	bfin_write32(PORTF_INEN_SET, val)</div><div class='add'>+#define bfin_read_PORTF_INEN_CLEAR()	bfin_read32(PORTF_INEN_CLEAR)</div><div class='add'>+#define bfin_write_PORTF_INEN_CLEAR(val)	bfin_write32(PORTF_INEN_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTF_MUX()		bfin_read32(PORTF_MUX)</div><div class='add'>+#define bfin_write_PORTF_MUX(val)	bfin_write32(PORTF_MUX, val)</div><div class='add'>+#define bfin_read_PORTF_DATA_TGL()	bfin_read32(PORTF_DATA_TGL)</div><div class='add'>+#define bfin_write_PORTF_DATA_TGL(val)	bfin_write32(PORTF_DATA_TGL, val)</div><div class='add'>+#define bfin_read_PORTF_POL()		bfin_read32(PORTF_POL)</div><div class='add'>+#define bfin_write_PORTF_POL(val)	bfin_write32(PORTF_POL, val)</div><div class='add'>+#define bfin_read_PORTF_POL_SET()	bfin_read32(PORTF_POL_SET)</div><div class='add'>+#define bfin_write_PORTF_POL_SET(val)	bfin_write32(PORTF_POL_SET, val)</div><div class='add'>+#define bfin_read_PORTF_POL_CLEAR()	bfin_read32(PORTF_POL_CLEAR)</div><div class='add'>+#define bfin_write_PORTF_POL_CLEAR(val)	bfin_write32(PORTF_POL_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTF_LOCK()		bfin_read32(PORTF_LOCK)</div><div class='add'>+#define bfin_write_PORTF_LOCK(val)	bfin_write32(PORTF_LOCK, val)</div><div class='add'>+#define bfin_read_PORTF_REVID()		bfin_read32(PORTF_REVID)</div><div class='add'>+#define bfin_write_PORTF_REVID(val)	bfin_write32(PORTF_REVID, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Port G Registers */</div><div class='add'>+#define bfin_read_PORTG_FER()		bfin_read32(PORTG_FER)</div><div class='add'>+#define bfin_write_PORTG_FER(val)	bfin_write32(PORTG_FER, val)</div><div class='add'>+#define bfin_read_PORTG_FER_SET()	bfin_read32(PORTG_FER_SET)</div><div class='add'>+#define bfin_write_PORTG_FER_SET(val)	bfin_write32(PORTG_FER_SET, val)</div><div class='add'>+#define bfin_read_PORTG_FER_CLEAR()	bfin_read32(PORTG_FER_CLEAR)</div><div class='add'>+#define bfin_write_PORTG_FER_CLEAR(val)	bfin_write32(PORTG_FER_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTG()		bfin_read32(PORTG)</div><div class='add'>+#define bfin_write_PORTG(val)		bfin_write32(PORTG, val)</div><div class='add'>+#define bfin_read_PORTG_SET()		bfin_read32(PORTG_SET)</div><div class='add'>+#define bfin_write_PORTG_SET(val)	bfin_write32(PORTG_SET, val)</div><div class='add'>+#define bfin_read_PORTG_CLEAR()		bfin_read32(PORTG_CLEAR)</div><div class='add'>+#define bfin_write_PORTG_CLEAR(val)	bfin_write32(PORTG_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTG_DIR()		bfin_read32(PORTG_DIR)</div><div class='add'>+#define bfin_write_PORTG_DIR(val)	bfin_write32(PORTG_DIR, val)</div><div class='add'>+#define bfin_read_PORTG_DIR_SET()	bfin_read32(PORTG_DIR_SET)</div><div class='add'>+#define bfin_write_PORTG_DIR_SET(val)	bfin_write32(PORTG_DIR_SET, val)</div><div class='add'>+#define bfin_read_PORTG_DIR_CLEAR()	bfin_read32(PORTG_DIR_CLEAR)</div><div class='add'>+#define bfin_write_PORTG_DIR_CLEAR(val)	bfin_write32(PORTG_DIR_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTG_INEN()		bfin_read32(PORTG_INEN)</div><div class='add'>+#define bfin_write_PORTG_INEN(val)	bfin_write32(PORTG_INEN, val)</div><div class='add'>+#define bfin_read_PORTG_INEN_SET()	bfin_read32(PORTG_INEN_SET)</div><div class='add'>+#define bfin_write_PORTG_INEN_SET(val)	bfin_write32(PORTG_INEN_SET, val)</div><div class='add'>+#define bfin_read_PORTG_INEN_CLEAR()	bfin_read32(PORTG_INEN_CLEAR)</div><div class='add'>+#define bfin_write_PORTG_INEN_CLEAR(val)	bfin_write32(PORTG_INEN_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTG_MUX()		bfin_read32(PORTG_MUX)</div><div class='add'>+#define bfin_write_PORTG_MUX(val)	bfin_write32(PORTG_MUX, val)</div><div class='add'>+#define bfin_read_PORTG_DATA_TGL()	bfin_read32(PORTG_DATA_TGL)</div><div class='add'>+#define bfin_write_PORTG_DATA_TGL(val)	bfin_write32(PORTG_DATA_TGL, val)</div><div class='add'>+#define bfin_read_PORTG_POL()		bfin_read32(PORTG_POL)</div><div class='add'>+#define bfin_write_PORTG_POL(val)	bfin_write32(PORTG_POL, val)</div><div class='add'>+#define bfin_read_PORTG_POL_SET()	bfin_read32(PORTG_POL_SET)</div><div class='add'>+#define bfin_write_PORTG_POL_SET(val)	bfin_write32(PORTG_POL_SET, val)</div><div class='add'>+#define bfin_read_PORTG_POL_CLEAR()	bfin_read32(PORTG_POL_CLEAR)</div><div class='add'>+#define bfin_write_PORTG_POL_CLEAR(val)	bfin_write32(PORTG_POL_CLEAR, val)</div><div class='add'>+#define bfin_read_PORTG_LOCK()		bfin_read32(PORTG_LOCK)</div><div class='add'>+#define bfin_write_PORTG_LOCK(val)	bfin_write32(PORTG_LOCK, val)</div><div class='add'>+#define bfin_read_PORTG_REVID()		bfin_read32(PORTG_REVID)</div><div class='add'>+#define bfin_write_PORTG_REVID(val)	bfin_write32(PORTG_REVID, val)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* CAN Controller 0 Config 1 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_CAN0_MC1()		bfin_read16(CAN0_MC1)</div><div class='add'>+#define bfin_write_CAN0_MC1(val)	bfin_write16(CAN0_MC1, val)</div><div class='add'>+#define bfin_read_CAN0_MD1()		bfin_read16(CAN0_MD1)</div><div class='add'>+#define bfin_write_CAN0_MD1(val)	bfin_write16(CAN0_MD1, val)</div><div class='add'>+#define bfin_read_CAN0_TRS1()		bfin_read16(CAN0_TRS1)</div><div class='add'>+#define bfin_write_CAN0_TRS1(val)	bfin_write16(CAN0_TRS1, val)</div><div class='add'>+#define bfin_read_CAN0_TRR1()		bfin_read16(CAN0_TRR1)</div><div class='add'>+#define bfin_write_CAN0_TRR1(val)	bfin_write16(CAN0_TRR1, val)</div><div class='add'>+#define bfin_read_CAN0_TA1()		bfin_read16(CAN0_TA1)</div><div class='add'>+#define bfin_write_CAN0_TA1(val)	bfin_write16(CAN0_TA1, val)</div><div class='add'>+#define bfin_read_CAN0_AA1()		bfin_read16(CAN0_AA1)</div><div class='add'>+#define bfin_write_CAN0_AA1(val)	bfin_write16(CAN0_AA1, val)</div><div class='add'>+#define bfin_read_CAN0_RMP1()		bfin_read16(CAN0_RMP1)</div><div class='add'>+#define bfin_write_CAN0_RMP1(val)	bfin_write16(CAN0_RMP1, val)</div><div class='add'>+#define bfin_read_CAN0_RML1()		bfin_read16(CAN0_RML1)</div><div class='add'>+#define bfin_write_CAN0_RML1(val)	bfin_write16(CAN0_RML1, val)</div><div class='add'>+#define bfin_read_CAN0_MBTIF1()		bfin_read16(CAN0_MBTIF1)</div><div class='add'>+#define bfin_write_CAN0_MBTIF1(val)	bfin_write16(CAN0_MBTIF1, val)</div><div class='add'>+#define bfin_read_CAN0_MBRIF1()		bfin_read16(CAN0_MBRIF1)</div><div class='add'>+#define bfin_write_CAN0_MBRIF1(val)	bfin_write16(CAN0_MBRIF1, val)</div><div class='add'>+#define bfin_read_CAN0_MBIM1()		bfin_read16(CAN0_MBIM1)</div><div class='add'>+#define bfin_write_CAN0_MBIM1(val)	bfin_write16(CAN0_MBIM1, val)</div><div class='add'>+#define bfin_read_CAN0_RFH1()		bfin_read16(CAN0_RFH1)</div><div class='add'>+#define bfin_write_CAN0_RFH1(val)	bfin_write16(CAN0_RFH1, val)</div><div class='add'>+#define bfin_read_CAN0_OPSS1()		bfin_read16(CAN0_OPSS1)</div><div class='add'>+#define bfin_write_CAN0_OPSS1(val)	bfin_write16(CAN0_OPSS1, val)</div><div class='add'>+</div><div class='add'>+/* CAN Controller 0 Config 2 Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_CAN0_MC2()		bfin_read16(CAN0_MC2)</div><div class='add'>+#define bfin_write_CAN0_MC2(val)	bfin_write16(CAN0_MC2, val)</div><div class='add'>+#define bfin_read_CAN0_MD2()		bfin_read16(CAN0_MD2)</div><div class='add'>+#define bfin_write_CAN0_MD2(val)	bfin_write16(CAN0_MD2, val)</div><div class='add'>+#define bfin_read_CAN0_TRS2()		bfin_read16(CAN0_TRS2)</div><div class='add'>+#define bfin_write_CAN0_TRS2(val)	bfin_write16(CAN0_TRS2, val)</div><div class='add'>+#define bfin_read_CAN0_TRR2()		bfin_read16(CAN0_TRR2)</div><div class='add'>+#define bfin_write_CAN0_TRR2(val)	bfin_write16(CAN0_TRR2, val)</div><div class='add'>+#define bfin_read_CAN0_TA2()		bfin_read16(CAN0_TA2)</div><div class='add'>+#define bfin_write_CAN0_TA2(val)	bfin_write16(CAN0_TA2, val)</div><div class='add'>+#define bfin_read_CAN0_AA2()		bfin_read16(CAN0_AA2)</div><div class='add'>+#define bfin_write_CAN0_AA2(val)	bfin_write16(CAN0_AA2, val)</div><div class='add'>+#define bfin_read_CAN0_RMP2()		bfin_read16(CAN0_RMP2)</div><div class='add'>+#define bfin_write_CAN0_RMP2(val)	bfin_write16(CAN0_RMP2, val)</div><div class='add'>+#define bfin_read_CAN0_RML2()		bfin_read16(CAN0_RML2)</div><div class='add'>+#define bfin_write_CAN0_RML2(val)	bfin_write16(CAN0_RML2, val)</div><div class='add'>+#define bfin_read_CAN0_MBTIF2()		bfin_read16(CAN0_MBTIF2)</div><div class='add'>+#define bfin_write_CAN0_MBTIF2(val)	bfin_write16(CAN0_MBTIF2, val)</div><div class='add'>+#define bfin_read_CAN0_MBRIF2()		bfin_read16(CAN0_MBRIF2)</div><div class='add'>+#define bfin_write_CAN0_MBRIF2(val)	bfin_write16(CAN0_MBRIF2, val)</div><div class='add'>+#define bfin_read_CAN0_MBIM2()		bfin_read16(CAN0_MBIM2)</div><div class='add'>+#define bfin_write_CAN0_MBIM2(val)	bfin_write16(CAN0_MBIM2, val)</div><div class='add'>+#define bfin_read_CAN0_RFH2()		bfin_read16(CAN0_RFH2)</div><div class='add'>+#define bfin_write_CAN0_RFH2(val)	bfin_write16(CAN0_RFH2, val)</div><div class='add'>+#define bfin_read_CAN0_OPSS2()		bfin_read16(CAN0_OPSS2)</div><div class='add'>+#define bfin_write_CAN0_OPSS2(val)	bfin_write16(CAN0_OPSS2, val)</div><div class='add'>+</div><div class='add'>+/* CAN Controller 0 Clock/Interrubfin_read_()t/Counter Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_CAN0_CLOCK()		bfin_read16(CAN0_CLOCK)</div><div class='add'>+#define bfin_write_CAN0_CLOCK(val)	bfin_write16(CAN0_CLOCK, val)</div><div class='add'>+#define bfin_read_CAN0_TIMING()		bfin_read16(CAN0_TIMING)</div><div class='add'>+#define bfin_write_CAN0_TIMING(val)	bfin_write16(CAN0_TIMING, val)</div><div class='add'>+#define bfin_read_CAN0_DEBUG()		bfin_read16(CAN0_DEBUG)</div><div class='add'>+#define bfin_write_CAN0_DEBUG(val)	bfin_write16(CAN0_DEBUG, val)</div><div class='add'>+#define bfin_read_CAN0_STATUS()		bfin_read16(CAN0_STATUS)</div><div class='add'>+#define bfin_write_CAN0_STATUS(val)	bfin_write16(CAN0_STATUS, val)</div><div class='add'>+#define bfin_read_CAN0_CEC()		bfin_read16(CAN0_CEC)</div><div class='add'>+#define bfin_write_CAN0_CEC(val)	bfin_write16(CAN0_CEC, val)</div><div class='add'>+#define bfin_read_CAN0_GIS()		bfin_read16(CAN0_GIS)</div><div class='add'>+#define bfin_write_CAN0_GIS(val)	bfin_write16(CAN0_GIS, val)</div><div class='add'>+#define bfin_read_CAN0_GIM()		bfin_read16(CAN0_GIM)</div><div class='add'>+#define bfin_write_CAN0_GIM(val)	bfin_write16(CAN0_GIM, val)</div><div class='add'>+#define bfin_read_CAN0_GIF()		bfin_read16(CAN0_GIF)</div><div class='add'>+#define bfin_write_CAN0_GIF(val)	bfin_write16(CAN0_GIF, val)</div><div class='add'>+#define bfin_read_CAN0_CONTROL()	bfin_read16(CAN0_CONTROL)</div><div class='add'>+#define bfin_write_CAN0_CONTROL(val)	bfin_write16(CAN0_CONTROL, val)</div><div class='add'>+#define bfin_read_CAN0_INTR()		bfin_read16(CAN0_INTR)</div><div class='add'>+#define bfin_write_CAN0_INTR(val)	bfin_write16(CAN0_INTR, val)</div><div class='add'>+#define bfin_read_CAN0_MBTD()		bfin_read16(CAN0_MBTD)</div><div class='add'>+#define bfin_write_CAN0_MBTD(val)	bfin_write16(CAN0_MBTD, val)</div><div class='add'>+#define bfin_read_CAN0_EWR()		bfin_read16(CAN0_EWR)</div><div class='add'>+#define bfin_write_CAN0_EWR(val)	bfin_write16(CAN0_EWR, val)</div><div class='add'>+#define bfin_read_CAN0_ESR()		bfin_read16(CAN0_ESR)</div><div class='add'>+#define bfin_write_CAN0_ESR(val)	bfin_write16(CAN0_ESR, val)</div><div class='add'>+#define bfin_read_CAN0_UCCNT()		bfin_read16(CAN0_UCCNT)</div><div class='add'>+#define bfin_write_CAN0_UCCNT(val)	bfin_write16(CAN0_UCCNT, val)</div><div class='add'>+#define bfin_read_CAN0_UCRC()		bfin_read16(CAN0_UCRC)</div><div class='add'>+#define bfin_write_CAN0_UCRC(val)	bfin_write16(CAN0_UCRC, val)</div><div class='add'>+#define bfin_read_CAN0_UCCNF()		bfin_read16(CAN0_UCCNF)</div><div class='add'>+#define bfin_write_CAN0_UCCNF(val)	bfin_write16(CAN0_UCCNF, val)</div><div class='add'>+</div><div class='add'>+/* CAN Controller 0 Accebfin_read_()tance Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_CAN0_AM00L()		bfin_read16(CAN0_AM00L)</div><div class='add'>+#define bfin_write_CAN0_AM00L(val)	bfin_write16(CAN0_AM00L, val)</div><div class='add'>+#define bfin_read_CAN0_AM00H()		bfin_read16(CAN0_AM00H)</div><div class='add'>+#define bfin_write_CAN0_AM00H(val)	bfin_write16(CAN0_AM00H, val)</div><div class='add'>+#define bfin_read_CAN0_AM01L()		bfin_read16(CAN0_AM01L)</div><div class='add'>+#define bfin_write_CAN0_AM01L(val)	bfin_write16(CAN0_AM01L, val)</div><div class='add'>+#define bfin_read_CAN0_AM01H()		bfin_read16(CAN0_AM01H)</div><div class='add'>+#define bfin_write_CAN0_AM01H(val)	bfin_write16(CAN0_AM01H, val)</div><div class='add'>+#define bfin_read_CAN0_AM02L()		bfin_read16(CAN0_AM02L)</div><div class='add'>+#define bfin_write_CAN0_AM02L(val)	bfin_write16(CAN0_AM02L, val)</div><div class='add'>+#define bfin_read_CAN0_AM02H()		bfin_read16(CAN0_AM02H)</div><div class='add'>+#define bfin_write_CAN0_AM02H(val)	bfin_write16(CAN0_AM02H, val)</div><div class='add'>+#define bfin_read_CAN0_AM03L()		bfin_read16(CAN0_AM03L)</div><div class='add'>+#define bfin_write_CAN0_AM03L(val)	bfin_write16(CAN0_AM03L, val)</div><div class='add'>+#define bfin_read_CAN0_AM03H()		bfin_read16(CAN0_AM03H)</div><div class='add'>+#define bfin_write_CAN0_AM03H(val)	bfin_write16(CAN0_AM03H, val)</div><div class='add'>+#define bfin_read_CAN0_AM04L()		bfin_read16(CAN0_AM04L)</div><div class='add'>+#define bfin_write_CAN0_AM04L(val)	bfin_write16(CAN0_AM04L, val)</div><div class='add'>+#define bfin_read_CAN0_AM04H()		bfin_read16(CAN0_AM04H)</div><div class='add'>+#define bfin_write_CAN0_AM04H(val)	bfin_write16(CAN0_AM04H, val)</div><div class='add'>+#define bfin_read_CAN0_AM05L()		bfin_read16(CAN0_AM05L)</div><div class='add'>+#define bfin_write_CAN0_AM05L(val)	bfin_write16(CAN0_AM05L, val)</div><div class='add'>+#define bfin_read_CAN0_AM05H()		bfin_read16(CAN0_AM05H)</div><div class='add'>+#define bfin_write_CAN0_AM05H(val)	bfin_write16(CAN0_AM05H, val)</div><div class='add'>+#define bfin_read_CAN0_AM06L()		bfin_read16(CAN0_AM06L)</div><div class='add'>+#define bfin_write_CAN0_AM06L(val)	bfin_write16(CAN0_AM06L, val)</div><div class='add'>+#define bfin_read_CAN0_AM06H()		bfin_read16(CAN0_AM06H)</div><div class='add'>+#define bfin_write_CAN0_AM06H(val)	bfin_write16(CAN0_AM06H, val)</div><div class='add'>+#define bfin_read_CAN0_AM07L()		bfin_read16(CAN0_AM07L)</div><div class='add'>+#define bfin_write_CAN0_AM07L(val)	bfin_write16(CAN0_AM07L, val)</div><div class='add'>+#define bfin_read_CAN0_AM07H()		bfin_read16(CAN0_AM07H)</div><div class='add'>+#define bfin_write_CAN0_AM07H(val)	bfin_write16(CAN0_AM07H, val)</div><div class='add'>+#define bfin_read_CAN0_AM08L()		bfin_read16(CAN0_AM08L)</div><div class='add'>+#define bfin_write_CAN0_AM08L(val)	bfin_write16(CAN0_AM08L, val)</div><div class='add'>+#define bfin_read_CAN0_AM08H()		bfin_read16(CAN0_AM08H)</div><div class='add'>+#define bfin_write_CAN0_AM08H(val)	bfin_write16(CAN0_AM08H, val)</div><div class='add'>+#define bfin_read_CAN0_AM09L()		bfin_read16(CAN0_AM09L)</div><div class='add'>+#define bfin_write_CAN0_AM09L(val)	bfin_write16(CAN0_AM09L, val)</div><div class='add'>+#define bfin_read_CAN0_AM09H()		bfin_read16(CAN0_AM09H)</div><div class='add'>+#define bfin_write_CAN0_AM09H(val)	bfin_write16(CAN0_AM09H, val)</div><div class='add'>+#define bfin_read_CAN0_AM10L()		bfin_read16(CAN0_AM10L)</div><div class='add'>+#define bfin_write_CAN0_AM10L(val)	bfin_write16(CAN0_AM10L, val)</div><div class='add'>+#define bfin_read_CAN0_AM10H()		bfin_read16(CAN0_AM10H)</div><div class='add'>+#define bfin_write_CAN0_AM10H(val)	bfin_write16(CAN0_AM10H, val)</div><div class='add'>+#define bfin_read_CAN0_AM11L()		bfin_read16(CAN0_AM11L)</div><div class='add'>+#define bfin_write_CAN0_AM11L(val)	bfin_write16(CAN0_AM11L, val)</div><div class='add'>+#define bfin_read_CAN0_AM11H()		bfin_read16(CAN0_AM11H)</div><div class='add'>+#define bfin_write_CAN0_AM11H(val)	bfin_write16(CAN0_AM11H, val)</div><div class='add'>+#define bfin_read_CAN0_AM12L()		bfin_read16(CAN0_AM12L)</div><div class='add'>+#define bfin_write_CAN0_AM12L(val)	bfin_write16(CAN0_AM12L, val)</div><div class='add'>+#define bfin_read_CAN0_AM12H()		bfin_read16(CAN0_AM12H)</div><div class='add'>+#define bfin_write_CAN0_AM12H(val)	bfin_write16(CAN0_AM12H, val)</div><div class='add'>+#define bfin_read_CAN0_AM13L()		bfin_read16(CAN0_AM13L)</div><div class='add'>+#define bfin_write_CAN0_AM13L(val)	bfin_write16(CAN0_AM13L, val)</div><div class='add'>+#define bfin_read_CAN0_AM13H()		bfin_read16(CAN0_AM13H)</div><div class='add'>+#define bfin_write_CAN0_AM13H(val)	bfin_write16(CAN0_AM13H, val)</div><div class='add'>+#define bfin_read_CAN0_AM14L()		bfin_read16(CAN0_AM14L)</div><div class='add'>+#define bfin_write_CAN0_AM14L(val)	bfin_write16(CAN0_AM14L, val)</div><div class='add'>+#define bfin_read_CAN0_AM14H()		bfin_read16(CAN0_AM14H)</div><div class='add'>+#define bfin_write_CAN0_AM14H(val)	bfin_write16(CAN0_AM14H, val)</div><div class='add'>+#define bfin_read_CAN0_AM15L()		bfin_read16(CAN0_AM15L)</div><div class='add'>+#define bfin_write_CAN0_AM15L(val)	bfin_write16(CAN0_AM15L, val)</div><div class='add'>+#define bfin_read_CAN0_AM15H()		bfin_read16(CAN0_AM15H)</div><div class='add'>+#define bfin_write_CAN0_AM15H(val)	bfin_write16(CAN0_AM15H, val)</div><div class='add'>+</div><div class='add'>+/* CAN Controller 0 Accebfin_read_()tance Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_CAN0_AM16L()		bfin_read16(CAN0_AM16L)</div><div class='add'>+#define bfin_write_CAN0_AM16L(val)	bfin_write16(CAN0_AM16L, val)</div><div class='add'>+#define bfin_read_CAN0_AM16H()		bfin_read16(CAN0_AM16H)</div><div class='add'>+#define bfin_write_CAN0_AM16H(val)	bfin_write16(CAN0_AM16H, val)</div><div class='add'>+#define bfin_read_CAN0_AM17L()		bfin_read16(CAN0_AM17L)</div><div class='add'>+#define bfin_write_CAN0_AM17L(val)	bfin_write16(CAN0_AM17L, val)</div><div class='add'>+#define bfin_read_CAN0_AM17H()		bfin_read16(CAN0_AM17H)</div><div class='add'>+#define bfin_write_CAN0_AM17H(val)	bfin_write16(CAN0_AM17H, val)</div><div class='add'>+#define bfin_read_CAN0_AM18L()		bfin_read16(CAN0_AM18L)</div><div class='add'>+#define bfin_write_CAN0_AM18L(val)	bfin_write16(CAN0_AM18L, val)</div><div class='add'>+#define bfin_read_CAN0_AM18H()		bfin_read16(CAN0_AM18H)</div><div class='add'>+#define bfin_write_CAN0_AM18H(val)	bfin_write16(CAN0_AM18H, val)</div><div class='add'>+#define bfin_read_CAN0_AM19L()		bfin_read16(CAN0_AM19L)</div><div class='add'>+#define bfin_write_CAN0_AM19L(val)	bfin_write16(CAN0_AM19L, val)</div><div class='add'>+#define bfin_read_CAN0_AM19H()		bfin_read16(CAN0_AM19H)</div><div class='add'>+#define bfin_write_CAN0_AM19H(val)	bfin_write16(CAN0_AM19H, val)</div><div class='add'>+#define bfin_read_CAN0_AM20L()		bfin_read16(CAN0_AM20L)</div><div class='add'>+#define bfin_write_CAN0_AM20L(val)	bfin_write16(CAN0_AM20L, val)</div><div class='add'>+#define bfin_read_CAN0_AM20H()		bfin_read16(CAN0_AM20H)</div><div class='add'>+#define bfin_write_CAN0_AM20H(val)	bfin_write16(CAN0_AM20H, val)</div><div class='add'>+#define bfin_read_CAN0_AM21L()		bfin_read16(CAN0_AM21L)</div><div class='add'>+#define bfin_write_CAN0_AM21L(val)	bfin_write16(CAN0_AM21L, val)</div><div class='add'>+#define bfin_read_CAN0_AM21H()		bfin_read16(CAN0_AM21H)</div><div class='add'>+#define bfin_write_CAN0_AM21H(val)	bfin_write16(CAN0_AM21H, val)</div><div class='add'>+#define bfin_read_CAN0_AM22L()		bfin_read16(CAN0_AM22L)</div><div class='add'>+#define bfin_write_CAN0_AM22L(val)	bfin_write16(CAN0_AM22L, val)</div><div class='add'>+#define bfin_read_CAN0_AM22H()		bfin_read16(CAN0_AM22H)</div><div class='add'>+#define bfin_write_CAN0_AM22H(val)	bfin_write16(CAN0_AM22H, val)</div><div class='add'>+#define bfin_read_CAN0_AM23L()		bfin_read16(CAN0_AM23L)</div><div class='add'>+#define bfin_write_CAN0_AM23L(val)	bfin_write16(CAN0_AM23L, val)</div><div class='add'>+#define bfin_read_CAN0_AM23H()		bfin_read16(CAN0_AM23H)</div><div class='add'>+#define bfin_write_CAN0_AM23H(val)	bfin_write16(CAN0_AM23H, val)</div><div class='add'>+#define bfin_read_CAN0_AM24L()		bfin_read16(CAN0_AM24L)</div><div class='add'>+#define bfin_write_CAN0_AM24L(val)	bfin_write16(CAN0_AM24L, val)</div><div class='add'>+#define bfin_read_CAN0_AM24H()		bfin_read16(CAN0_AM24H)</div><div class='add'>+#define bfin_write_CAN0_AM24H(val)	bfin_write16(CAN0_AM24H, val)</div><div class='add'>+#define bfin_read_CAN0_AM25L()		bfin_read16(CAN0_AM25L)</div><div class='add'>+#define bfin_write_CAN0_AM25L(val)	bfin_write16(CAN0_AM25L, val)</div><div class='add'>+#define bfin_read_CAN0_AM25H()		bfin_read16(CAN0_AM25H)</div><div class='add'>+#define bfin_write_CAN0_AM25H(val)	bfin_write16(CAN0_AM25H, val)</div><div class='add'>+#define bfin_read_CAN0_AM26L()		bfin_read16(CAN0_AM26L)</div><div class='add'>+#define bfin_write_CAN0_AM26L(val)	bfin_write16(CAN0_AM26L, val)</div><div class='add'>+#define bfin_read_CAN0_AM26H()		bfin_read16(CAN0_AM26H)</div><div class='add'>+#define bfin_write_CAN0_AM26H(val)	bfin_write16(CAN0_AM26H, val)</div><div class='add'>+#define bfin_read_CAN0_AM27L()		bfin_read16(CAN0_AM27L)</div><div class='add'>+#define bfin_write_CAN0_AM27L(val)	bfin_write16(CAN0_AM27L, val)</div><div class='add'>+#define bfin_read_CAN0_AM27H()		bfin_read16(CAN0_AM27H)</div><div class='add'>+#define bfin_write_CAN0_AM27H(val)	bfin_write16(CAN0_AM27H, val)</div><div class='add'>+#define bfin_read_CAN0_AM28L()		bfin_read16(CAN0_AM28L)</div><div class='add'>+#define bfin_write_CAN0_AM28L(val)	bfin_write16(CAN0_AM28L, val)</div><div class='add'>+#define bfin_read_CAN0_AM28H()		bfin_read16(CAN0_AM28H)</div><div class='add'>+#define bfin_write_CAN0_AM28H(val)	bfin_write16(CAN0_AM28H, val)</div><div class='add'>+#define bfin_read_CAN0_AM29L()		bfin_read16(CAN0_AM29L)</div><div class='add'>+#define bfin_write_CAN0_AM29L(val)	bfin_write16(CAN0_AM29L, val)</div><div class='add'>+#define bfin_read_CAN0_AM29H()		bfin_read16(CAN0_AM29H)</div><div class='add'>+#define bfin_write_CAN0_AM29H(val)	bfin_write16(CAN0_AM29H, val)</div><div class='add'>+#define bfin_read_CAN0_AM30L()		bfin_read16(CAN0_AM30L)</div><div class='add'>+#define bfin_write_CAN0_AM30L(val)	bfin_write16(CAN0_AM30L, val)</div><div class='add'>+#define bfin_read_CAN0_AM30H()		bfin_read16(CAN0_AM30H)</div><div class='add'>+#define bfin_write_CAN0_AM30H(val)	bfin_write16(CAN0_AM30H, val)</div><div class='add'>+#define bfin_read_CAN0_AM31L()		bfin_read16(CAN0_AM31L)</div><div class='add'>+#define bfin_write_CAN0_AM31L(val)	bfin_write16(CAN0_AM31L, val)</div><div class='add'>+#define bfin_read_CAN0_AM31H()		bfin_read16(CAN0_AM31H)</div><div class='add'>+#define bfin_write_CAN0_AM31H(val)	bfin_write16(CAN0_AM31H, val)</div><div class='add'>+</div><div class='add'>+/* CAN Controller 0 Mailbox Data Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_CAN0_MB00_DATA0()		bfin_read16(CAN0_MB00_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB00_DATA0(val)		bfin_write16(CAN0_MB00_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB00_DATA1()		bfin_read16(CAN0_MB00_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB00_DATA1(val)		bfin_write16(CAN0_MB00_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB00_DATA2()		bfin_read16(CAN0_MB00_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB00_DATA2(val)		bfin_write16(CAN0_MB00_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB00_DATA3()		bfin_read16(CAN0_MB00_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB00_DATA3(val)		bfin_write16(CAN0_MB00_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB00_LENGTH()		bfin_read16(CAN0_MB00_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB00_LENGTH(val)	bfin_write16(CAN0_MB00_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB00_TIMESTAMP()		bfin_read16(CAN0_MB00_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB00_TIMESTAMP(val)	bfin_write16(CAN0_MB00_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB00_ID0()		bfin_read16(CAN0_MB00_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB00_ID0(val)		bfin_write16(CAN0_MB00_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB00_ID1()		bfin_read16(CAN0_MB00_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB00_ID1(val)		bfin_write16(CAN0_MB00_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB01_DATA0()		bfin_read16(CAN0_MB01_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB01_DATA0(val)		bfin_write16(CAN0_MB01_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB01_DATA1()		bfin_read16(CAN0_MB01_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB01_DATA1(val)		bfin_write16(CAN0_MB01_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB01_DATA2()		bfin_read16(CAN0_MB01_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB01_DATA2(val)		bfin_write16(CAN0_MB01_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB01_DATA3()		bfin_read16(CAN0_MB01_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB01_DATA3(val)		bfin_write16(CAN0_MB01_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB01_LENGTH()		bfin_read16(CAN0_MB01_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB01_LENGTH(val)	bfin_write16(CAN0_MB01_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB01_TIMESTAMP()		bfin_read16(CAN0_MB01_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB01_TIMESTAMP(val)	bfin_write16(CAN0_MB01_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB01_ID0()		bfin_read16(CAN0_MB01_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB01_ID0(val)		bfin_write16(CAN0_MB01_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB01_ID1()		bfin_read16(CAN0_MB01_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB01_ID1(val)		bfin_write16(CAN0_MB01_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB02_DATA0()		bfin_read16(CAN0_MB02_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB02_DATA0(val)		bfin_write16(CAN0_MB02_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB02_DATA1()		bfin_read16(CAN0_MB02_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB02_DATA1(val)		bfin_write16(CAN0_MB02_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB02_DATA2()		bfin_read16(CAN0_MB02_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB02_DATA2(val)		bfin_write16(CAN0_MB02_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB02_DATA3()		bfin_read16(CAN0_MB02_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB02_DATA3(val)		bfin_write16(CAN0_MB02_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB02_LENGTH()		bfin_read16(CAN0_MB02_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB02_LENGTH(val)	bfin_write16(CAN0_MB02_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB02_TIMESTAMP()		bfin_read16(CAN0_MB02_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB02_TIMESTAMP(val)	bfin_write16(CAN0_MB02_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB02_ID0()		bfin_read16(CAN0_MB02_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB02_ID0(val)		bfin_write16(CAN0_MB02_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB02_ID1()		bfin_read16(CAN0_MB02_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB02_ID1(val)		bfin_write16(CAN0_MB02_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB03_DATA0()		bfin_read16(CAN0_MB03_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB03_DATA0(val)		bfin_write16(CAN0_MB03_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB03_DATA1()		bfin_read16(CAN0_MB03_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB03_DATA1(val)		bfin_write16(CAN0_MB03_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB03_DATA2()		bfin_read16(CAN0_MB03_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB03_DATA2(val)		bfin_write16(CAN0_MB03_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB03_DATA3()		bfin_read16(CAN0_MB03_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB03_DATA3(val)		bfin_write16(CAN0_MB03_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB03_LENGTH()		bfin_read16(CAN0_MB03_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB03_LENGTH(val)	bfin_write16(CAN0_MB03_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB03_TIMESTAMP()		bfin_read16(CAN0_MB03_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB03_TIMESTAMP(val)	bfin_write16(CAN0_MB03_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB03_ID0()		bfin_read16(CAN0_MB03_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB03_ID0(val)		bfin_write16(CAN0_MB03_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB03_ID1()		bfin_read16(CAN0_MB03_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB03_ID1(val)		bfin_write16(CAN0_MB03_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB04_DATA0()		bfin_read16(CAN0_MB04_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB04_DATA0(val)		bfin_write16(CAN0_MB04_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB04_DATA1()		bfin_read16(CAN0_MB04_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB04_DATA1(val)		bfin_write16(CAN0_MB04_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB04_DATA2()		bfin_read16(CAN0_MB04_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB04_DATA2(val)		bfin_write16(CAN0_MB04_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB04_DATA3()		bfin_read16(CAN0_MB04_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB04_DATA3(val)		bfin_write16(CAN0_MB04_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB04_LENGTH()		bfin_read16(CAN0_MB04_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB04_LENGTH(val)	bfin_write16(CAN0_MB04_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB04_TIMESTAMP()		bfin_read16(CAN0_MB04_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB04_TIMESTAMP(val)	bfin_write16(CAN0_MB04_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB04_ID0()		bfin_read16(CAN0_MB04_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB04_ID0(val)		bfin_write16(CAN0_MB04_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB04_ID1()		bfin_read16(CAN0_MB04_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB04_ID1(val)		bfin_write16(CAN0_MB04_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB05_DATA0()		bfin_read16(CAN0_MB05_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB05_DATA0(val)		bfin_write16(CAN0_MB05_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB05_DATA1()		bfin_read16(CAN0_MB05_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB05_DATA1(val)		bfin_write16(CAN0_MB05_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB05_DATA2()		bfin_read16(CAN0_MB05_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB05_DATA2(val)		bfin_write16(CAN0_MB05_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB05_DATA3()		bfin_read16(CAN0_MB05_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB05_DATA3(val)		bfin_write16(CAN0_MB05_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB05_LENGTH()		bfin_read16(CAN0_MB05_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB05_LENGTH(val)	bfin_write16(CAN0_MB05_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB05_TIMESTAMP()		bfin_read16(CAN0_MB05_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB05_TIMESTAMP(val)	bfin_write16(CAN0_MB05_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB05_ID0()		bfin_read16(CAN0_MB05_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB05_ID0(val)		bfin_write16(CAN0_MB05_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB05_ID1()		bfin_read16(CAN0_MB05_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB05_ID1(val)		bfin_write16(CAN0_MB05_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB06_DATA0()		bfin_read16(CAN0_MB06_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB06_DATA0(val)		bfin_write16(CAN0_MB06_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB06_DATA1()		bfin_read16(CAN0_MB06_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB06_DATA1(val)		bfin_write16(CAN0_MB06_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB06_DATA2()		bfin_read16(CAN0_MB06_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB06_DATA2(val)		bfin_write16(CAN0_MB06_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB06_DATA3()		bfin_read16(CAN0_MB06_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB06_DATA3(val)		bfin_write16(CAN0_MB06_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB06_LENGTH()		bfin_read16(CAN0_MB06_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB06_LENGTH(val)	bfin_write16(CAN0_MB06_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB06_TIMESTAMP()		bfin_read16(CAN0_MB06_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB06_TIMESTAMP(val)	bfin_write16(CAN0_MB06_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB06_ID0()		bfin_read16(CAN0_MB06_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB06_ID0(val)		bfin_write16(CAN0_MB06_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB06_ID1()		bfin_read16(CAN0_MB06_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB06_ID1(val)		bfin_write16(CAN0_MB06_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB07_DATA0()		bfin_read16(CAN0_MB07_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB07_DATA0(val)		bfin_write16(CAN0_MB07_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB07_DATA1()		bfin_read16(CAN0_MB07_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB07_DATA1(val)		bfin_write16(CAN0_MB07_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB07_DATA2()		bfin_read16(CAN0_MB07_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB07_DATA2(val)		bfin_write16(CAN0_MB07_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB07_DATA3()		bfin_read16(CAN0_MB07_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB07_DATA3(val)		bfin_write16(CAN0_MB07_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB07_LENGTH()		bfin_read16(CAN0_MB07_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB07_LENGTH(val)	bfin_write16(CAN0_MB07_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB07_TIMESTAMP()		bfin_read16(CAN0_MB07_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB07_TIMESTAMP(val)	bfin_write16(CAN0_MB07_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB07_ID0()		bfin_read16(CAN0_MB07_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB07_ID0(val)		bfin_write16(CAN0_MB07_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB07_ID1()		bfin_read16(CAN0_MB07_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB07_ID1(val)		bfin_write16(CAN0_MB07_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB08_DATA0()		bfin_read16(CAN0_MB08_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB08_DATA0(val)		bfin_write16(CAN0_MB08_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB08_DATA1()		bfin_read16(CAN0_MB08_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB08_DATA1(val)		bfin_write16(CAN0_MB08_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB08_DATA2()		bfin_read16(CAN0_MB08_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB08_DATA2(val)		bfin_write16(CAN0_MB08_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB08_DATA3()		bfin_read16(CAN0_MB08_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB08_DATA3(val)		bfin_write16(CAN0_MB08_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB08_LENGTH()		bfin_read16(CAN0_MB08_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB08_LENGTH(val)	bfin_write16(CAN0_MB08_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB08_TIMESTAMP()		bfin_read16(CAN0_MB08_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB08_TIMESTAMP(val)	bfin_write16(CAN0_MB08_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB08_ID0()		bfin_read16(CAN0_MB08_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB08_ID0(val)		bfin_write16(CAN0_MB08_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB08_ID1()		bfin_read16(CAN0_MB08_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB08_ID1(val)		bfin_write16(CAN0_MB08_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB09_DATA0()		bfin_read16(CAN0_MB09_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB09_DATA0(val)		bfin_write16(CAN0_MB09_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB09_DATA1()		bfin_read16(CAN0_MB09_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB09_DATA1(val)		bfin_write16(CAN0_MB09_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB09_DATA2()		bfin_read16(CAN0_MB09_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB09_DATA2(val)		bfin_write16(CAN0_MB09_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB09_DATA3()		bfin_read16(CAN0_MB09_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB09_DATA3(val)		bfin_write16(CAN0_MB09_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB09_LENGTH()		bfin_read16(CAN0_MB09_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB09_LENGTH(val)	bfin_write16(CAN0_MB09_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB09_TIMESTAMP()		bfin_read16(CAN0_MB09_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB09_TIMESTAMP(val)	bfin_write16(CAN0_MB09_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB09_ID0()		bfin_read16(CAN0_MB09_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB09_ID0(val)		bfin_write16(CAN0_MB09_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB09_ID1()		bfin_read16(CAN0_MB09_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB09_ID1(val)		bfin_write16(CAN0_MB09_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB10_DATA0()		bfin_read16(CAN0_MB10_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB10_DATA0(val)		bfin_write16(CAN0_MB10_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB10_DATA1()		bfin_read16(CAN0_MB10_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB10_DATA1(val)		bfin_write16(CAN0_MB10_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB10_DATA2()		bfin_read16(CAN0_MB10_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB10_DATA2(val)		bfin_write16(CAN0_MB10_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB10_DATA3()		bfin_read16(CAN0_MB10_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB10_DATA3(val)		bfin_write16(CAN0_MB10_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB10_LENGTH()		bfin_read16(CAN0_MB10_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB10_LENGTH(val)	bfin_write16(CAN0_MB10_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB10_TIMESTAMP()		bfin_read16(CAN0_MB10_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB10_TIMESTAMP(val)	bfin_write16(CAN0_MB10_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB10_ID0()		bfin_read16(CAN0_MB10_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB10_ID0(val)		bfin_write16(CAN0_MB10_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB10_ID1()		bfin_read16(CAN0_MB10_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB10_ID1(val)		bfin_write16(CAN0_MB10_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB11_DATA0()		bfin_read16(CAN0_MB11_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB11_DATA0(val)		bfin_write16(CAN0_MB11_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB11_DATA1()		bfin_read16(CAN0_MB11_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB11_DATA1(val)		bfin_write16(CAN0_MB11_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB11_DATA2()		bfin_read16(CAN0_MB11_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB11_DATA2(val)		bfin_write16(CAN0_MB11_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB11_DATA3()		bfin_read16(CAN0_MB11_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB11_DATA3(val)		bfin_write16(CAN0_MB11_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB11_LENGTH()		bfin_read16(CAN0_MB11_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB11_LENGTH(val)	bfin_write16(CAN0_MB11_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB11_TIMESTAMP()		bfin_read16(CAN0_MB11_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB11_TIMESTAMP(val)	bfin_write16(CAN0_MB11_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB11_ID0()		bfin_read16(CAN0_MB11_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB11_ID0(val)		bfin_write16(CAN0_MB11_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB11_ID1()		bfin_read16(CAN0_MB11_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB11_ID1(val)		bfin_write16(CAN0_MB11_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB12_DATA0()		bfin_read16(CAN0_MB12_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB12_DATA0(val)		bfin_write16(CAN0_MB12_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB12_DATA1()		bfin_read16(CAN0_MB12_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB12_DATA1(val)		bfin_write16(CAN0_MB12_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB12_DATA2()		bfin_read16(CAN0_MB12_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB12_DATA2(val)		bfin_write16(CAN0_MB12_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB12_DATA3()		bfin_read16(CAN0_MB12_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB12_DATA3(val)		bfin_write16(CAN0_MB12_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB12_LENGTH()		bfin_read16(CAN0_MB12_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB12_LENGTH(val)	bfin_write16(CAN0_MB12_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB12_TIMESTAMP()		bfin_read16(CAN0_MB12_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB12_TIMESTAMP(val)	bfin_write16(CAN0_MB12_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB12_ID0()		bfin_read16(CAN0_MB12_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB12_ID0(val)		bfin_write16(CAN0_MB12_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB12_ID1()		bfin_read16(CAN0_MB12_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB12_ID1(val)		bfin_write16(CAN0_MB12_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB13_DATA0()		bfin_read16(CAN0_MB13_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB13_DATA0(val)		bfin_write16(CAN0_MB13_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB13_DATA1()		bfin_read16(CAN0_MB13_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB13_DATA1(val)		bfin_write16(CAN0_MB13_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB13_DATA2()		bfin_read16(CAN0_MB13_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB13_DATA2(val)		bfin_write16(CAN0_MB13_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB13_DATA3()		bfin_read16(CAN0_MB13_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB13_DATA3(val)		bfin_write16(CAN0_MB13_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB13_LENGTH()		bfin_read16(CAN0_MB13_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB13_LENGTH(val)	bfin_write16(CAN0_MB13_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB13_TIMESTAMP()		bfin_read16(CAN0_MB13_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB13_TIMESTAMP(val)	bfin_write16(CAN0_MB13_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB13_ID0()		bfin_read16(CAN0_MB13_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB13_ID0(val)		bfin_write16(CAN0_MB13_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB13_ID1()		bfin_read16(CAN0_MB13_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB13_ID1(val)		bfin_write16(CAN0_MB13_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB14_DATA0()		bfin_read16(CAN0_MB14_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB14_DATA0(val)		bfin_write16(CAN0_MB14_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB14_DATA1()		bfin_read16(CAN0_MB14_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB14_DATA1(val)		bfin_write16(CAN0_MB14_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB14_DATA2()		bfin_read16(CAN0_MB14_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB14_DATA2(val)		bfin_write16(CAN0_MB14_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB14_DATA3()		bfin_read16(CAN0_MB14_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB14_DATA3(val)		bfin_write16(CAN0_MB14_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB14_LENGTH()		bfin_read16(CAN0_MB14_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB14_LENGTH(val)	bfin_write16(CAN0_MB14_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB14_TIMESTAMP()		bfin_read16(CAN0_MB14_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB14_TIMESTAMP(val)	bfin_write16(CAN0_MB14_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB14_ID0()		bfin_read16(CAN0_MB14_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB14_ID0(val)		bfin_write16(CAN0_MB14_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB14_ID1()		bfin_read16(CAN0_MB14_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB14_ID1(val)		bfin_write16(CAN0_MB14_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB15_DATA0()		bfin_read16(CAN0_MB15_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB15_DATA0(val)		bfin_write16(CAN0_MB15_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB15_DATA1()		bfin_read16(CAN0_MB15_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB15_DATA1(val)		bfin_write16(CAN0_MB15_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB15_DATA2()		bfin_read16(CAN0_MB15_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB15_DATA2(val)		bfin_write16(CAN0_MB15_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB15_DATA3()		bfin_read16(CAN0_MB15_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB15_DATA3(val)		bfin_write16(CAN0_MB15_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB15_LENGTH()		bfin_read16(CAN0_MB15_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB15_LENGTH(val)	bfin_write16(CAN0_MB15_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB15_TIMESTAMP()		bfin_read16(CAN0_MB15_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB15_TIMESTAMP(val)	bfin_write16(CAN0_MB15_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB15_ID0()		bfin_read16(CAN0_MB15_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB15_ID0(val)		bfin_write16(CAN0_MB15_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB15_ID1()		bfin_read16(CAN0_MB15_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB15_ID1(val)		bfin_write16(CAN0_MB15_ID1, val)</div><div class='add'>+</div><div class='add'>+/* CAN Controller 0 Mailbox Data Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_CAN0_MB16_DATA0()		bfin_read16(CAN0_MB16_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB16_DATA0(val)		bfin_write16(CAN0_MB16_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB16_DATA1()		bfin_read16(CAN0_MB16_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB16_DATA1(val)		bfin_write16(CAN0_MB16_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB16_DATA2()		bfin_read16(CAN0_MB16_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB16_DATA2(val)		bfin_write16(CAN0_MB16_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB16_DATA3()		bfin_read16(CAN0_MB16_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB16_DATA3(val)		bfin_write16(CAN0_MB16_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB16_LENGTH()		bfin_read16(CAN0_MB16_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB16_LENGTH(val)	bfin_write16(CAN0_MB16_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB16_TIMESTAMP()		bfin_read16(CAN0_MB16_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB16_TIMESTAMP(val)	bfin_write16(CAN0_MB16_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB16_ID0()		bfin_read16(CAN0_MB16_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB16_ID0(val)		bfin_write16(CAN0_MB16_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB16_ID1()		bfin_read16(CAN0_MB16_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB16_ID1(val)		bfin_write16(CAN0_MB16_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB17_DATA0()		bfin_read16(CAN0_MB17_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB17_DATA0(val)		bfin_write16(CAN0_MB17_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB17_DATA1()		bfin_read16(CAN0_MB17_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB17_DATA1(val)		bfin_write16(CAN0_MB17_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB17_DATA2()		bfin_read16(CAN0_MB17_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB17_DATA2(val)		bfin_write16(CAN0_MB17_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB17_DATA3()		bfin_read16(CAN0_MB17_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB17_DATA3(val)		bfin_write16(CAN0_MB17_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB17_LENGTH()		bfin_read16(CAN0_MB17_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB17_LENGTH(val)	bfin_write16(CAN0_MB17_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB17_TIMESTAMP()		bfin_read16(CAN0_MB17_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB17_TIMESTAMP(val)	bfin_write16(CAN0_MB17_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB17_ID0()		bfin_read16(CAN0_MB17_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB17_ID0(val)		bfin_write16(CAN0_MB17_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB17_ID1()		bfin_read16(CAN0_MB17_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB17_ID1(val)		bfin_write16(CAN0_MB17_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB18_DATA0()		bfin_read16(CAN0_MB18_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB18_DATA0(val)		bfin_write16(CAN0_MB18_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB18_DATA1()		bfin_read16(CAN0_MB18_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB18_DATA1(val)		bfin_write16(CAN0_MB18_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB18_DATA2()		bfin_read16(CAN0_MB18_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB18_DATA2(val)		bfin_write16(CAN0_MB18_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB18_DATA3()		bfin_read16(CAN0_MB18_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB18_DATA3(val)		bfin_write16(CAN0_MB18_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB18_LENGTH()		bfin_read16(CAN0_MB18_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB18_LENGTH(val)	bfin_write16(CAN0_MB18_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB18_TIMESTAMP()		bfin_read16(CAN0_MB18_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB18_TIMESTAMP(val)	bfin_write16(CAN0_MB18_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB18_ID0()		bfin_read16(CAN0_MB18_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB18_ID0(val)		bfin_write16(CAN0_MB18_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB18_ID1()		bfin_read16(CAN0_MB18_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB18_ID1(val)		bfin_write16(CAN0_MB18_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB19_DATA0()		bfin_read16(CAN0_MB19_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB19_DATA0(val)		bfin_write16(CAN0_MB19_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB19_DATA1()		bfin_read16(CAN0_MB19_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB19_DATA1(val)		bfin_write16(CAN0_MB19_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB19_DATA2()		bfin_read16(CAN0_MB19_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB19_DATA2(val)		bfin_write16(CAN0_MB19_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB19_DATA3()		bfin_read16(CAN0_MB19_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB19_DATA3(val)		bfin_write16(CAN0_MB19_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB19_LENGTH()		bfin_read16(CAN0_MB19_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB19_LENGTH(val)	bfin_write16(CAN0_MB19_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB19_TIMESTAMP()		bfin_read16(CAN0_MB19_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB19_TIMESTAMP(val)	bfin_write16(CAN0_MB19_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB19_ID0()		bfin_read16(CAN0_MB19_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB19_ID0(val)		bfin_write16(CAN0_MB19_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB19_ID1()		bfin_read16(CAN0_MB19_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB19_ID1(val)		bfin_write16(CAN0_MB19_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB20_DATA0()		bfin_read16(CAN0_MB20_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB20_DATA0(val)		bfin_write16(CAN0_MB20_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB20_DATA1()		bfin_read16(CAN0_MB20_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB20_DATA1(val)		bfin_write16(CAN0_MB20_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB20_DATA2()		bfin_read16(CAN0_MB20_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB20_DATA2(val)		bfin_write16(CAN0_MB20_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB20_DATA3()		bfin_read16(CAN0_MB20_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB20_DATA3(val)		bfin_write16(CAN0_MB20_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB20_LENGTH()		bfin_read16(CAN0_MB20_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB20_LENGTH(val)	bfin_write16(CAN0_MB20_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB20_TIMESTAMP()		bfin_read16(CAN0_MB20_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB20_TIMESTAMP(val)	bfin_write16(CAN0_MB20_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB20_ID0()		bfin_read16(CAN0_MB20_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB20_ID0(val)		bfin_write16(CAN0_MB20_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB20_ID1()		bfin_read16(CAN0_MB20_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB20_ID1(val)		bfin_write16(CAN0_MB20_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB21_DATA0()		bfin_read16(CAN0_MB21_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB21_DATA0(val)		bfin_write16(CAN0_MB21_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB21_DATA1()		bfin_read16(CAN0_MB21_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB21_DATA1(val)		bfin_write16(CAN0_MB21_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB21_DATA2()		bfin_read16(CAN0_MB21_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB21_DATA2(val)		bfin_write16(CAN0_MB21_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB21_DATA3()		bfin_read16(CAN0_MB21_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB21_DATA3(val)		bfin_write16(CAN0_MB21_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB21_LENGTH()		bfin_read16(CAN0_MB21_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB21_LENGTH(val)	bfin_write16(CAN0_MB21_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB21_TIMESTAMP()		bfin_read16(CAN0_MB21_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB21_TIMESTAMP(val)	bfin_write16(CAN0_MB21_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB21_ID0()		bfin_read16(CAN0_MB21_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB21_ID0(val)		bfin_write16(CAN0_MB21_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB21_ID1()		bfin_read16(CAN0_MB21_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB21_ID1(val)		bfin_write16(CAN0_MB21_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB22_DATA0()		bfin_read16(CAN0_MB22_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB22_DATA0(val)		bfin_write16(CAN0_MB22_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB22_DATA1()		bfin_read16(CAN0_MB22_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB22_DATA1(val)		bfin_write16(CAN0_MB22_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB22_DATA2()		bfin_read16(CAN0_MB22_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB22_DATA2(val)		bfin_write16(CAN0_MB22_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB22_DATA3()		bfin_read16(CAN0_MB22_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB22_DATA3(val)		bfin_write16(CAN0_MB22_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB22_LENGTH()		bfin_read16(CAN0_MB22_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB22_LENGTH(val)	bfin_write16(CAN0_MB22_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB22_TIMESTAMP()		bfin_read16(CAN0_MB22_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB22_TIMESTAMP(val)	bfin_write16(CAN0_MB22_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB22_ID0()		bfin_read16(CAN0_MB22_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB22_ID0(val)		bfin_write16(CAN0_MB22_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB22_ID1()		bfin_read16(CAN0_MB22_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB22_ID1(val)		bfin_write16(CAN0_MB22_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB23_DATA0()		bfin_read16(CAN0_MB23_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB23_DATA0(val)		bfin_write16(CAN0_MB23_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB23_DATA1()		bfin_read16(CAN0_MB23_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB23_DATA1(val)		bfin_write16(CAN0_MB23_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB23_DATA2()		bfin_read16(CAN0_MB23_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB23_DATA2(val)		bfin_write16(CAN0_MB23_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB23_DATA3()		bfin_read16(CAN0_MB23_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB23_DATA3(val)		bfin_write16(CAN0_MB23_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB23_LENGTH()		bfin_read16(CAN0_MB23_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB23_LENGTH(val)	bfin_write16(CAN0_MB23_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB23_TIMESTAMP()		bfin_read16(CAN0_MB23_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB23_TIMESTAMP(val)	bfin_write16(CAN0_MB23_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB23_ID0()		bfin_read16(CAN0_MB23_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB23_ID0(val)		bfin_write16(CAN0_MB23_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB23_ID1()		bfin_read16(CAN0_MB23_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB23_ID1(val)		bfin_write16(CAN0_MB23_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB24_DATA0()		bfin_read16(CAN0_MB24_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB24_DATA0(val)		bfin_write16(CAN0_MB24_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB24_DATA1()		bfin_read16(CAN0_MB24_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB24_DATA1(val)		bfin_write16(CAN0_MB24_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB24_DATA2()		bfin_read16(CAN0_MB24_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB24_DATA2(val)		bfin_write16(CAN0_MB24_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB24_DATA3()		bfin_read16(CAN0_MB24_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB24_DATA3(val)		bfin_write16(CAN0_MB24_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB24_LENGTH()		bfin_read16(CAN0_MB24_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB24_LENGTH(val)	bfin_write16(CAN0_MB24_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB24_TIMESTAMP()		bfin_read16(CAN0_MB24_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB24_TIMESTAMP(val)	bfin_write16(CAN0_MB24_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB24_ID0()		bfin_read16(CAN0_MB24_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB24_ID0(val)		bfin_write16(CAN0_MB24_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB24_ID1()		bfin_read16(CAN0_MB24_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB24_ID1(val)		bfin_write16(CAN0_MB24_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB25_DATA0()		bfin_read16(CAN0_MB25_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB25_DATA0(val)		bfin_write16(CAN0_MB25_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB25_DATA1()		bfin_read16(CAN0_MB25_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB25_DATA1(val)		bfin_write16(CAN0_MB25_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB25_DATA2()		bfin_read16(CAN0_MB25_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB25_DATA2(val)		bfin_write16(CAN0_MB25_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB25_DATA3()		bfin_read16(CAN0_MB25_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB25_DATA3(val)		bfin_write16(CAN0_MB25_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB25_LENGTH()		bfin_read16(CAN0_MB25_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB25_LENGTH(val)	bfin_write16(CAN0_MB25_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB25_TIMESTAMP()		bfin_read16(CAN0_MB25_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB25_TIMESTAMP(val)	bfin_write16(CAN0_MB25_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB25_ID0()		bfin_read16(CAN0_MB25_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB25_ID0(val)		bfin_write16(CAN0_MB25_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB25_ID1()		bfin_read16(CAN0_MB25_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB25_ID1(val)		bfin_write16(CAN0_MB25_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB26_DATA0()		bfin_read16(CAN0_MB26_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB26_DATA0(val)		bfin_write16(CAN0_MB26_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB26_DATA1()		bfin_read16(CAN0_MB26_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB26_DATA1(val)		bfin_write16(CAN0_MB26_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB26_DATA2()		bfin_read16(CAN0_MB26_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB26_DATA2(val)		bfin_write16(CAN0_MB26_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB26_DATA3()		bfin_read16(CAN0_MB26_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB26_DATA3(val)		bfin_write16(CAN0_MB26_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB26_LENGTH()		bfin_read16(CAN0_MB26_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB26_LENGTH(val)	bfin_write16(CAN0_MB26_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB26_TIMESTAMP()		bfin_read16(CAN0_MB26_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB26_TIMESTAMP(val)	bfin_write16(CAN0_MB26_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB26_ID0()		bfin_read16(CAN0_MB26_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB26_ID0(val)		bfin_write16(CAN0_MB26_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB26_ID1()		bfin_read16(CAN0_MB26_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB26_ID1(val)		bfin_write16(CAN0_MB26_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB27_DATA0()		bfin_read16(CAN0_MB27_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB27_DATA0(val)		bfin_write16(CAN0_MB27_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB27_DATA1()		bfin_read16(CAN0_MB27_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB27_DATA1(val)		bfin_write16(CAN0_MB27_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB27_DATA2()		bfin_read16(CAN0_MB27_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB27_DATA2(val)		bfin_write16(CAN0_MB27_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB27_DATA3()		bfin_read16(CAN0_MB27_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB27_DATA3(val)		bfin_write16(CAN0_MB27_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB27_LENGTH()		bfin_read16(CAN0_MB27_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB27_LENGTH(val)	bfin_write16(CAN0_MB27_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB27_TIMESTAMP()		bfin_read16(CAN0_MB27_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB27_TIMESTAMP(val)	bfin_write16(CAN0_MB27_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB27_ID0()		bfin_read16(CAN0_MB27_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB27_ID0(val)		bfin_write16(CAN0_MB27_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB27_ID1()		bfin_read16(CAN0_MB27_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB27_ID1(val)		bfin_write16(CAN0_MB27_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB28_DATA0()		bfin_read16(CAN0_MB28_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB28_DATA0(val)		bfin_write16(CAN0_MB28_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB28_DATA1()		bfin_read16(CAN0_MB28_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB28_DATA1(val)		bfin_write16(CAN0_MB28_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB28_DATA2()		bfin_read16(CAN0_MB28_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB28_DATA2(val)		bfin_write16(CAN0_MB28_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB28_DATA3()		bfin_read16(CAN0_MB28_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB28_DATA3(val)		bfin_write16(CAN0_MB28_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB28_LENGTH()		bfin_read16(CAN0_MB28_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB28_LENGTH(val)	bfin_write16(CAN0_MB28_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB28_TIMESTAMP()		bfin_read16(CAN0_MB28_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB28_TIMESTAMP(val)	bfin_write16(CAN0_MB28_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB28_ID0()		bfin_read16(CAN0_MB28_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB28_ID0(val)		bfin_write16(CAN0_MB28_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB28_ID1()		bfin_read16(CAN0_MB28_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB28_ID1(val)		bfin_write16(CAN0_MB28_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB29_DATA0()		bfin_read16(CAN0_MB29_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB29_DATA0(val)		bfin_write16(CAN0_MB29_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB29_DATA1()		bfin_read16(CAN0_MB29_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB29_DATA1(val)		bfin_write16(CAN0_MB29_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB29_DATA2()		bfin_read16(CAN0_MB29_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB29_DATA2(val)		bfin_write16(CAN0_MB29_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB29_DATA3()		bfin_read16(CAN0_MB29_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB29_DATA3(val)		bfin_write16(CAN0_MB29_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB29_LENGTH()		bfin_read16(CAN0_MB29_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB29_LENGTH(val)	bfin_write16(CAN0_MB29_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB29_TIMESTAMP()		bfin_read16(CAN0_MB29_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB29_TIMESTAMP(val)	bfin_write16(CAN0_MB29_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB29_ID0()		bfin_read16(CAN0_MB29_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB29_ID0(val)		bfin_write16(CAN0_MB29_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB29_ID1()		bfin_read16(CAN0_MB29_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB29_ID1(val)		bfin_write16(CAN0_MB29_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB30_DATA0()		bfin_read16(CAN0_MB30_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB30_DATA0(val)		bfin_write16(CAN0_MB30_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB30_DATA1()		bfin_read16(CAN0_MB30_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB30_DATA1(val)		bfin_write16(CAN0_MB30_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB30_DATA2()		bfin_read16(CAN0_MB30_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB30_DATA2(val)		bfin_write16(CAN0_MB30_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB30_DATA3()		bfin_read16(CAN0_MB30_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB30_DATA3(val)		bfin_write16(CAN0_MB30_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB30_LENGTH()		bfin_read16(CAN0_MB30_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB30_LENGTH(val)	bfin_write16(CAN0_MB30_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB30_TIMESTAMP()		bfin_read16(CAN0_MB30_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB30_TIMESTAMP(val)	bfin_write16(CAN0_MB30_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB30_ID0()		bfin_read16(CAN0_MB30_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB30_ID0(val)		bfin_write16(CAN0_MB30_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB30_ID1()		bfin_read16(CAN0_MB30_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB30_ID1(val)		bfin_write16(CAN0_MB30_ID1, val)</div><div class='add'>+#define bfin_read_CAN0_MB31_DATA0()		bfin_read16(CAN0_MB31_DATA0)</div><div class='add'>+#define bfin_write_CAN0_MB31_DATA0(val)		bfin_write16(CAN0_MB31_DATA0, val)</div><div class='add'>+#define bfin_read_CAN0_MB31_DATA1()		bfin_read16(CAN0_MB31_DATA1)</div><div class='add'>+#define bfin_write_CAN0_MB31_DATA1(val)		bfin_write16(CAN0_MB31_DATA1, val)</div><div class='add'>+#define bfin_read_CAN0_MB31_DATA2()		bfin_read16(CAN0_MB31_DATA2)</div><div class='add'>+#define bfin_write_CAN0_MB31_DATA2(val)		bfin_write16(CAN0_MB31_DATA2, val)</div><div class='add'>+#define bfin_read_CAN0_MB31_DATA3()		bfin_read16(CAN0_MB31_DATA3)</div><div class='add'>+#define bfin_write_CAN0_MB31_DATA3(val)		bfin_write16(CAN0_MB31_DATA3, val)</div><div class='add'>+#define bfin_read_CAN0_MB31_LENGTH()		bfin_read16(CAN0_MB31_LENGTH)</div><div class='add'>+#define bfin_write_CAN0_MB31_LENGTH(val)	bfin_write16(CAN0_MB31_LENGTH, val)</div><div class='add'>+#define bfin_read_CAN0_MB31_TIMESTAMP()		bfin_read16(CAN0_MB31_TIMESTAMP)</div><div class='add'>+#define bfin_write_CAN0_MB31_TIMESTAMP(val)	bfin_write16(CAN0_MB31_TIMESTAMP, val)</div><div class='add'>+#define bfin_read_CAN0_MB31_ID0()		bfin_read16(CAN0_MB31_ID0)</div><div class='add'>+#define bfin_write_CAN0_MB31_ID0(val)		bfin_write16(CAN0_MB31_ID0, val)</div><div class='add'>+#define bfin_read_CAN0_MB31_ID1()		bfin_read16(CAN0_MB31_ID1)</div><div class='add'>+#define bfin_write_CAN0_MB31_ID1(val)		bfin_write16(CAN0_MB31_ID1, val)</div><div class='add'>+</div><div class='add'>+/* Counter Registers */</div><div class='add'>+</div><div class='add'>+#define bfin_read_CNT_CONFIG()		bfin_read16(CNT_CONFIG)</div><div class='add'>+#define bfin_write_CNT_CONFIG(val)	bfin_write16(CNT_CONFIG, val)</div><div class='add'>+#define bfin_read_CNT_IMASK()		bfin_read16(CNT_IMASK)</div><div class='add'>+#define bfin_write_CNT_IMASK(val)	bfin_write16(CNT_IMASK, val)</div><div class='add'>+#define bfin_read_CNT_STATUS()		bfin_read16(CNT_STATUS)</div><div class='add'>+#define bfin_write_CNT_STATUS(val)	bfin_write16(CNT_STATUS, val)</div><div class='add'>+#define bfin_read_CNT_COMMAND()		bfin_read16(CNT_COMMAND)</div><div class='add'>+#define bfin_write_CNT_COMMAND(val)	bfin_write16(CNT_COMMAND, val)</div><div class='add'>+#define bfin_read_CNT_DEBOUNCE()	bfin_read16(CNT_DEBOUNCE)</div><div class='add'>+#define bfin_write_CNT_DEBOUNCE(val)	bfin_write16(CNT_DEBOUNCE, val)</div><div class='add'>+#define bfin_read_CNT_COUNTER()		bfin_read32(CNT_COUNTER)</div><div class='add'>+#define bfin_write_CNT_COUNTER(val)	bfin_write32(CNT_COUNTER, val)</div><div class='add'>+#define bfin_read_CNT_MAX()		bfin_read32(CNT_MAX)</div><div class='add'>+#define bfin_write_CNT_MAX(val)		bfin_write32(CNT_MAX, val)</div><div class='add'>+#define bfin_read_CNT_MIN()		bfin_read32(CNT_MIN)</div><div class='add'>+#define bfin_write_CNT_MIN(val)		bfin_write32(CNT_MIN, val)</div><div class='add'>+</div><div class='add'>+/* RSI Register */</div><div class='add'>+#define bfin_read_RSI_CLK_CTL()		bfin_read16(RSI_CLK_CONTROL)</div><div class='add'>+#define bfin_write_RSI_CLK_CTL(val)	bfin_write16(RSI_CLK_CONTROL, val)</div><div class='add'>+#define bfin_read_RSI_ARGUMENT()	bfin_read32(RSI_ARGUMENT)</div><div class='add'>+#define bfin_write_RSI_ARGUMENT(val)	bfin_write32(RSI_ARGUMENT, val)</div><div class='add'>+#define bfin_read_RSI_COMMAND()		bfin_read16(RSI_COMMAND)</div><div class='add'>+#define bfin_write_RSI_COMMAND(val)	bfin_write16(RSI_COMMAND, val)</div><div class='add'>+#define bfin_read_RSI_RESP_CMD()	bfin_read16(RSI_RESP_CMD)</div><div class='add'>+#define bfin_write_RSI_RESP_CMD(val)	bfin_write16(RSI_RESP_CMD, val)</div><div class='add'>+#define bfin_read_RSI_RESPONSE0()	bfin_read32(RSI_RESPONSE0)</div><div class='add'>+#define bfin_write_RSI_RESPONSE0(val)	bfin_write32(RSI_RESPONSE0, val)</div><div class='add'>+#define bfin_read_RSI_RESPONSE1()	bfin_read32(RSI_RESPONSE1)</div><div class='add'>+#define bfin_write_RSI_RESPONSE1(val)	bfin_write32(RSI_RESPONSE1, val)</div><div class='add'>+#define bfin_read_RSI_RESPONSE2()	bfin_read32(RSI_RESPONSE2)</div><div class='add'>+#define bfin_write_RSI_RESPONSE2(val)	bfin_write32(RSI_RESPONSE2, val)</div><div class='add'>+#define bfin_read_RSI_RESPONSE3()	bfin_read32(RSI_RESPONSE3)</div><div class='add'>+#define bfin_write_RSI_RESPONSE3(val)	bfin_write32(RSI_RESPONSE3, val)</div><div class='add'>+#define bfin_read_RSI_DATA_TIMER()	bfin_read32(RSI_DATA_TIMER)</div><div class='add'>+#define bfin_write_RSI_DATA_TIMER(val)	bfin_write32(RSI_DATA_TIMER, val)</div><div class='add'>+#define bfin_read_RSI_DATA_LGTH()	bfin_read16(RSI_DATA_LGTH)</div><div class='add'>+#define bfin_write_RSI_DATA_LGTH(val)	bfin_write16(RSI_DATA_LGTH, val)</div><div class='add'>+#define bfin_read_RSI_DATA_CTL()	bfin_read16(RSI_DATA_CONTROL)</div><div class='add'>+#define bfin_write_RSI_DATA_CTL(val)	bfin_write16(RSI_DATA_CONTROL, val)</div><div class='add'>+#define bfin_read_RSI_DATA_CNT()	bfin_read16(RSI_DATA_CNT)</div><div class='add'>+#define bfin_write_RSI_DATA_CNT(val)	bfin_write16(RSI_DATA_CNT, val)</div><div class='add'>+#define bfin_read_RSI_STATUS()		bfin_read32(RSI_STATUS)</div><div class='add'>+#define bfin_write_RSI_STATUS(val)	bfin_write32(RSI_STATUS, val)</div><div class='add'>+#define bfin_read_RSI_STATUS_CLR()	bfin_read16(RSI_STATUSCL)</div><div class='add'>+#define bfin_write_RSI_STATUS_CLR(val)	bfin_write16(RSI_STATUSCL, val)</div><div class='add'>+#define bfin_read_RSI_MASK0()		bfin_read32(RSI_MASK0)</div><div class='add'>+#define bfin_write_RSI_MASK0(val)	bfin_write32(RSI_MASK0, val)</div><div class='add'>+#define bfin_read_RSI_MASK1()		bfin_read32(RSI_MASK1)</div><div class='add'>+#define bfin_write_RSI_MASK1(val)	bfin_write32(RSI_MASK1, val)</div><div class='add'>+#define bfin_read_RSI_FIFO_CNT()	bfin_read16(RSI_FIFO_CNT)</div><div class='add'>+#define bfin_write_RSI_FIFO_CNT(val)	bfin_write16(RSI_FIFO_CNT, val)</div><div class='add'>+#define bfin_read_RSI_CEATA_CONTROL()	bfin_read16(RSI_CEATA_CONTROL)</div><div class='add'>+#define bfin_write_RSI_CEATA_CONTROL(val)	bfin_write16(RSI_CEATA_CONTROL, val)</div><div class='add'>+#define bfin_read_RSI_BLKSZ()		bfin_read16(RSI_BLKSZ)</div><div class='add'>+#define bfin_write_RSI_BLKSZ(val)	bfin_write16(RSI_BLKSZ, val)</div><div class='add'>+#define bfin_read_RSI_FIFO()		bfin_read32(RSI_FIFO)</div><div class='add'>+#define bfin_write_RSI_FIFO(val)	bfin_write32(RSI_FIFO, val)</div><div class='add'>+#define bfin_read_RSI_E_STATUS()	bfin_read32(RSI_ESTAT)</div><div class='add'>+#define bfin_write_RSI_E_STATUS(val)	bfin_write32(RSI_ESTAT, val)</div><div class='add'>+#define bfin_read_RSI_E_MASK()		bfin_read32(RSI_EMASK)</div><div class='add'>+#define bfin_write_RSI_E_MASK(val)	bfin_write32(RSI_EMASK, val)</div><div class='add'>+#define bfin_read_RSI_CFG()		bfin_read16(RSI_CONFIG)</div><div class='add'>+#define bfin_write_RSI_CFG(val)		bfin_write16(RSI_CONFIG, val)</div><div class='add'>+#define bfin_read_RSI_RD_WAIT_EN()	bfin_read16(RSI_RD_WAIT_EN)</div><div class='add'>+#define bfin_write_RSI_RD_WAIT_EN(val)	bfin_write16(RSI_RD_WAIT_EN, val)</div><div class='add'>+#define bfin_read_RSI_PID0()		bfin_read16(RSI_PID0)</div><div class='add'>+#define bfin_write_RSI_PID0(val)	bfin_write16(RSI_PID0, val)</div><div class='add'>+#define bfin_read_RSI_PID1()		bfin_read16(RSI_PID1)</div><div class='add'>+#define bfin_write_RSI_PID1(val)	bfin_write16(RSI_PID1, val)</div><div class='add'>+#define bfin_read_RSI_PID2()		bfin_read16(RSI_PID2)</div><div class='add'>+#define bfin_write_RSI_PID2(val)	bfin_write16(RSI_PID2, val)</div><div class='add'>+#define bfin_read_RSI_PID3()		bfin_read16(RSI_PID3)</div><div class='add'>+#define bfin_write_RSI_PID3(val)	bfin_write16(RSI_PID3, val)</div><div class='add'>+</div><div class='add'>+/* usb register */</div><div class='add'>+#define bfin_read_USB_PLLOSC_CTRL()    bfin_read16(USB_PLL_OSC)</div><div class='add'>+#define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLL_OSC, val)</div><div class='add'>+#define bfin_write_USB_VBUS_CTL(val) bfin_write8(USB_VBUS_CTL, val)</div><div class='add'>+#define bfin_write_USB_APHY_CNTRL(val) bfin_write8(USB_PHY_CTL, val)</div><div class='add'>+#define bfin_read_USB_APHY_CNTRL() bfin_read8(USB_PHY_CTL)</div><div class='add'>+</div><div class='add'>+#endif /* _CDEF_BF60X_H */</div><div class='add'>+</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/defBF609.h b/arch/blackfin/mach-bf609/include/mach/defBF609.h<br/>new file mode 100644<br/>index 000000000000..19690cc42113<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/defBF609.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/defBF609.h</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _DEF_BF609_H</div><div class='add'>+#define _DEF_BF609_H</div><div class='add'>+</div><div class='add'>+/* Include defBF60x_base.h for the set of #defines that are common to all ADSP-BF60x processors */</div><div class='add'>+#include "defBF60x_base.h"</div><div class='add'>+</div><div class='add'>+/* The following are the #defines needed by ADSP-BF609 that are not in the common header */</div><div class='add'>+</div><div class='add'>+#endif /* _DEF_BF609_H */</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/defBF60x_base.h b/arch/blackfin/mach-bf609/include/mach/defBF60x_base.h<br/>new file mode 100644<br/>index 000000000000..6aac38544cc9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/defBF60x_base.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/defBF60x_base.h</a></div><div class='hunk'>@@ -0,0 +1,3587 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the Clear BSD license or the GPL-2 (or later)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _DEF_BF60X_H</div><div class='add'>+#define _DEF_BF60X_H</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* ************************************************************** */</div><div class='add'>+/*   SYSTEM &amp; MMR ADDRESS DEFINITIONS COMMON TO ALL ADSP-BF60x    */</div><div class='add'>+/* ************************************************************** */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        CNT Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        CNT0</div><div class='add'>+   ========================= */</div><div class='add'>+#define CNT_CONFIG                 0xFFC00400         /* CNT0 Configuration Register */</div><div class='add'>+#define CNT_IMASK                  0xFFC00404         /* CNT0 Interrupt Mask Register */</div><div class='add'>+#define CNT_STATUS                 0xFFC00408         /* CNT0 Status Register */</div><div class='add'>+#define CNT_COMMAND                0xFFC0040C         /* CNT0 Command Register */</div><div class='add'>+#define CNT_DEBOUNCE               0xFFC00410         /* CNT0 Debounce Register */</div><div class='add'>+#define CNT_COUNTER                0xFFC00414         /* CNT0 Counter Register */</div><div class='add'>+#define CNT_MAX                    0xFFC00418         /* CNT0 Maximum Count Register */</div><div class='add'>+#define CNT_MIN                    0xFFC0041C         /* CNT0 Minimum Count Register */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        RSI Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+#define RSI_CLK_CONTROL            0xFFC00604         /* RSI0 Clock Control Register */</div><div class='add'>+#define RSI_ARGUMENT               0xFFC00608         /* RSI0 Argument Register */</div><div class='add'>+#define RSI_COMMAND                0xFFC0060C         /* RSI0 Command Register */</div><div class='add'>+#define RSI_RESP_CMD               0xFFC00610         /* RSI0 Response Command Register */</div><div class='add'>+#define RSI_RESPONSE0              0xFFC00614         /* RSI0 Response 0 Register */</div><div class='add'>+#define RSI_RESPONSE1              0xFFC00618         /* RSI0 Response 1 Register */</div><div class='add'>+#define RSI_RESPONSE2              0xFFC0061C         /* RSI0 Response 2 Register */</div><div class='add'>+#define RSI_RESPONSE3              0xFFC00620         /* RSI0 Response 3 Register */</div><div class='add'>+#define RSI_DATA_TIMER             0xFFC00624         /* RSI0 Data Timer Register */</div><div class='add'>+#define RSI_DATA_LGTH              0xFFC00628         /* RSI0 Data Length Register */</div><div class='add'>+#define RSI_DATA_CONTROL           0xFFC0062C         /* RSI0 Data Control Register */</div><div class='add'>+#define RSI_DATA_CNT               0xFFC00630         /* RSI0 Data Count Register */</div><div class='add'>+#define RSI_STATUS                 0xFFC00634         /* RSI0 Status Register */</div><div class='add'>+#define RSI_STATUSCL               0xFFC00638         /* RSI0 Status Clear Register */</div><div class='add'>+#define RSI_MASK0                  0xFFC0063C         /* RSI0 Interrupt 0 Mask Register */</div><div class='add'>+#define RSI_MASK1                  0xFFC00640         /* RSI0 Interrupt 1 Mask Register */</div><div class='add'>+#define RSI_FIFO_CNT               0xFFC00648         /* RSI0 FIFO Counter Register */</div><div class='add'>+#define RSI_CEATA_CONTROL          0xFFC0064C         /* RSI0 This register contains bit to dis CCS gen */</div><div class='add'>+#define RSI_BOOT_TCNTR             0xFFC00650         /* RSI0 Boot Timing Counter Register */</div><div class='add'>+#define RSI_BACK_TOUT              0xFFC00654         /* RSI0 Boot Acknowledge Timeout Register */</div><div class='add'>+#define RSI_SLP_WKUP_TOUT          0xFFC00658         /* RSI0 Sleep Wakeup Timeout Register */</div><div class='add'>+#define RSI_BLKSZ                  0xFFC0065C         /* RSI0 Block Size Register */</div><div class='add'>+#define RSI_FIFO                   0xFFC00680         /* RSI0 Data FIFO Register */</div><div class='add'>+#define RSI_ESTAT                  0xFFC006C0         /* RSI0 Exception Status Register */</div><div class='add'>+#define RSI_EMASK                  0xFFC006C4         /* RSI0 Exception Mask Register */</div><div class='add'>+#define RSI_CONFIG                 0xFFC006C8         /* RSI0 Configuration Register */</div><div class='add'>+#define RSI_RD_WAIT_EN             0xFFC006CC         /* RSI0 Read Wait Enable Register */</div><div class='add'>+#define RSI_PID0                   0xFFC006D0         /* RSI0 Peripheral Identification Register */</div><div class='add'>+#define RSI_PID1                   0xFFC006D4         /* RSI0 Peripheral Identification Register */</div><div class='add'>+#define RSI_PID2                   0xFFC006D8         /* RSI0 Peripheral Identification Register */</div><div class='add'>+#define RSI_PID3                   0xFFC006DC         /* RSI0 Peripheral Identification Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        CAN Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        CAN0</div><div class='add'>+   ========================= */</div><div class='add'>+#define CAN0_MC1                    0xFFC00A00         /* CAN0 Mailbox Configuration Register 1 */</div><div class='add'>+#define CAN0_MD1                    0xFFC00A04         /* CAN0 Mailbox Direction Register 1 */</div><div class='add'>+#define CAN0_TRS1                   0xFFC00A08         /* CAN0 Transmission Request Set Register 1 */</div><div class='add'>+#define CAN0_TRR1                   0xFFC00A0C         /* CAN0 Transmission Request Reset Register 1 */</div><div class='add'>+#define CAN0_TA1                    0xFFC00A10         /* CAN0 Transmission Acknowledge Register 1 */</div><div class='add'>+#define CAN0_AA1                    0xFFC00A14         /* CAN0 Abort Acknowledge Register 1 */</div><div class='add'>+#define CAN0_RMP1                   0xFFC00A18         /* CAN0 Receive Message Pending Register 1 */</div><div class='add'>+#define CAN0_RML1                   0xFFC00A1C         /* CAN0 Receive Message Lost Register 1 */</div><div class='add'>+#define CAN0_MBTIF1                 0xFFC00A20         /* CAN0 Mailbox Transmit Interrupt Flag Register 1 */</div><div class='add'>+#define CAN0_MBRIF1                 0xFFC00A24         /* CAN0 Mailbox Receive Interrupt Flag Register 1 */</div><div class='add'>+#define CAN0_MBIM1                  0xFFC00A28         /* CAN0 Mailbox Interrupt Mask Register 1 */</div><div class='add'>+#define CAN0_RFH1                   0xFFC00A2C         /* CAN0 Remote Frame Handling Register 1 */</div><div class='add'>+#define CAN0_OPSS1                  0xFFC00A30         /* CAN0 Overwrite Protection/Single Shot Transmission Register 1 */</div><div class='add'>+#define CAN0_MC2                    0xFFC00A40         /* CAN0 Mailbox Configuration Register 2 */</div><div class='add'>+#define CAN0_MD2                    0xFFC00A44         /* CAN0 Mailbox Direction Register 2 */</div><div class='add'>+#define CAN0_TRS2                   0xFFC00A48         /* CAN0 Transmission Request Set Register 2 */</div><div class='add'>+#define CAN0_TRR2                   0xFFC00A4C         /* CAN0 Transmission Request Reset Register 2 */</div><div class='add'>+#define CAN0_TA2                    0xFFC00A50         /* CAN0 Transmission Acknowledge Register 2 */</div><div class='add'>+#define CAN0_AA2                    0xFFC00A54         /* CAN0 Abort Acknowledge Register 2 */</div><div class='add'>+#define CAN0_RMP2                   0xFFC00A58         /* CAN0 Receive Message Pending Register 2 */</div><div class='add'>+#define CAN0_RML2                   0xFFC00A5C         /* CAN0 Receive Message Lost Register 2 */</div><div class='add'>+#define CAN0_MBTIF2                 0xFFC00A60         /* CAN0 Mailbox Transmit Interrupt Flag Register 2 */</div><div class='add'>+#define CAN0_MBRIF2                 0xFFC00A64         /* CAN0 Mailbox Receive Interrupt Flag Register 2 */</div><div class='add'>+#define CAN0_MBIM2                  0xFFC00A68         /* CAN0 Mailbox Interrupt Mask Register 2 */</div><div class='add'>+#define CAN0_RFH2                   0xFFC00A6C         /* CAN0 Remote Frame Handling Register 2 */</div><div class='add'>+#define CAN0_OPSS2                  0xFFC00A70         /* CAN0 Overwrite Protection/Single Shot Transmission Register 2 */</div><div class='add'>+#define CAN0_CLOCK                    0xFFC00A80         /* CAN0 Clock Register */</div><div class='add'>+#define CAN0_TIMING                 0xFFC00A84         /* CAN0 Timing Register */</div><div class='add'>+#define CAN0_DEBUG                    0xFFC00A88         /* CAN0 Debug Register */</div><div class='add'>+#define CAN0_STATUS                   0xFFC00A8C         /* CAN0 Status Register */</div><div class='add'>+#define CAN0_CEC                    0xFFC00A90         /* CAN0 Error Counter Register */</div><div class='add'>+#define CAN0_GIS                    0xFFC00A94         /* CAN0 Global CAN Interrupt Status */</div><div class='add'>+#define CAN0_GIM                    0xFFC00A98         /* CAN0 Global CAN Interrupt Mask */</div><div class='add'>+#define CAN0_GIF                    0xFFC00A9C         /* CAN0 Global CAN Interrupt Flag */</div><div class='add'>+#define CAN0_CONTROL                    0xFFC00AA0         /* CAN0 CAN Master Control Register */</div><div class='add'>+#define CAN0_INTR                    0xFFC00AA4         /* CAN0 Interrupt Pending Register */</div><div class='add'>+#define CAN0_MBTD                   0xFFC00AAC         /* CAN0 Temporary Mailbox Disable Register */</div><div class='add'>+#define CAN0_EWR                    0xFFC00AB0         /* CAN0 Error Counter Warning Level Register */</div><div class='add'>+#define CAN0_ESR                    0xFFC00AB4         /* CAN0 Error Status Register */</div><div class='add'>+#define CAN0_UCCNT                  0xFFC00AC4         /* CAN0 Universal Counter Register */</div><div class='add'>+#define CAN0_UCRC                   0xFFC00AC8         /* CAN0 Universal Counter Reload/Capture Register */</div><div class='add'>+#define CAN0_UCCNF                  0xFFC00ACC         /* CAN0 Universal Counter Configuration Mode Register */</div><div class='add'>+#define CAN0_AM00L                  0xFFC00B00         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM01L                  0xFFC00B08         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM02L                  0xFFC00B10         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM03L                  0xFFC00B18         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM04L                  0xFFC00B20         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM05L                  0xFFC00B28         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM06L                  0xFFC00B30         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM07L                  0xFFC00B38         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM08L                  0xFFC00B40         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM09L                  0xFFC00B48         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM10L                  0xFFC00B50         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM11L                  0xFFC00B58         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM12L                  0xFFC00B60         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM13L                  0xFFC00B68         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM14L                  0xFFC00B70         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM15L                  0xFFC00B78         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM16L                  0xFFC00B80         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM17L                  0xFFC00B88         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM18L                  0xFFC00B90         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM19L                  0xFFC00B98         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM20L                  0xFFC00BA0         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM21L                  0xFFC00BA8         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM22L                  0xFFC00BB0         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM23L                  0xFFC00BB8         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM24L                  0xFFC00BC0         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM25L                  0xFFC00BC8         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM26L                  0xFFC00BD0         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM27L                  0xFFC00BD8         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM28L                  0xFFC00BE0         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM29L                  0xFFC00BE8         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM30L                  0xFFC00BF0         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM31L                  0xFFC00BF8         /* CAN0 Acceptance Mask Register (L) */</div><div class='add'>+#define CAN0_AM00H                  0xFFC00B04         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM01H                  0xFFC00B0C         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM02H                  0xFFC00B14         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM03H                  0xFFC00B1C         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM04H                  0xFFC00B24         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM05H                  0xFFC00B2C         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM06H                  0xFFC00B34         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM07H                  0xFFC00B3C         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM08H                  0xFFC00B44         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM09H                  0xFFC00B4C         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM10H                  0xFFC00B54         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM11H                  0xFFC00B5C         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM12H                  0xFFC00B64         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM13H                  0xFFC00B6C         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM14H                  0xFFC00B74         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM15H                  0xFFC00B7C         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM16H                  0xFFC00B84         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM17H                  0xFFC00B8C         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM18H                  0xFFC00B94         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM19H                  0xFFC00B9C         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM20H                  0xFFC00BA4         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM21H                  0xFFC00BAC         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM22H                  0xFFC00BB4         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM23H                  0xFFC00BBC         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM24H                  0xFFC00BC4         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM25H                  0xFFC00BCC         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM26H                  0xFFC00BD4         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM27H                  0xFFC00BDC         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM28H                  0xFFC00BE4         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM29H                  0xFFC00BEC         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM30H                  0xFFC00BF4         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_AM31H                  0xFFC00BFC         /* CAN0 Acceptance Mask Register (H) */</div><div class='add'>+#define CAN0_MB00_DATA0             0xFFC00C00         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB01_DATA0             0xFFC00C20         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB02_DATA0             0xFFC00C40         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB03_DATA0             0xFFC00C60         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB04_DATA0             0xFFC00C80         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB05_DATA0             0xFFC00CA0         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB06_DATA0             0xFFC00CC0         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB07_DATA0             0xFFC00CE0         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB08_DATA0             0xFFC00D00         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB09_DATA0             0xFFC00D20         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB10_DATA0             0xFFC00D40         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB11_DATA0             0xFFC00D60         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB12_DATA0             0xFFC00D80         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB13_DATA0             0xFFC00DA0         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB14_DATA0             0xFFC00DC0         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB15_DATA0             0xFFC00DE0         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB16_DATA0             0xFFC00E00         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB17_DATA0             0xFFC00E20         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB18_DATA0             0xFFC00E40         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB19_DATA0             0xFFC00E60         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB20_DATA0             0xFFC00E80         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB21_DATA0             0xFFC00EA0         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB22_DATA0             0xFFC00EC0         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB23_DATA0             0xFFC00EE0         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB24_DATA0             0xFFC00F00         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB25_DATA0             0xFFC00F20         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB26_DATA0             0xFFC00F40         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB27_DATA0             0xFFC00F60         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB28_DATA0             0xFFC00F80         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB29_DATA0             0xFFC00FA0         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB30_DATA0             0xFFC00FC0         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB31_DATA0             0xFFC00FE0         /* CAN0 Mailbox Word 0 Register */</div><div class='add'>+#define CAN0_MB00_DATA1             0xFFC00C04         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB01_DATA1             0xFFC00C24         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB02_DATA1             0xFFC00C44         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB03_DATA1             0xFFC00C64         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB04_DATA1             0xFFC00C84         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB05_DATA1             0xFFC00CA4         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB06_DATA1             0xFFC00CC4         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB07_DATA1             0xFFC00CE4         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB08_DATA1             0xFFC00D04         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB09_DATA1             0xFFC00D24         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB10_DATA1             0xFFC00D44         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB11_DATA1             0xFFC00D64         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB12_DATA1             0xFFC00D84         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB13_DATA1             0xFFC00DA4         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB14_DATA1             0xFFC00DC4         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB15_DATA1             0xFFC00DE4         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB16_DATA1             0xFFC00E04         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB17_DATA1             0xFFC00E24         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB18_DATA1             0xFFC00E44         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB19_DATA1             0xFFC00E64         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB20_DATA1             0xFFC00E84         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB21_DATA1             0xFFC00EA4         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB22_DATA1             0xFFC00EC4         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB23_DATA1             0xFFC00EE4         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB24_DATA1             0xFFC00F04         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB25_DATA1             0xFFC00F24         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB26_DATA1             0xFFC00F44         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB27_DATA1             0xFFC00F64         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB28_DATA1             0xFFC00F84         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB29_DATA1             0xFFC00FA4         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB30_DATA1             0xFFC00FC4         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB31_DATA1             0xFFC00FE4         /* CAN0 Mailbox Word 1 Register */</div><div class='add'>+#define CAN0_MB00_DATA2             0xFFC00C08         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB01_DATA2             0xFFC00C28         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB02_DATA2             0xFFC00C48         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB03_DATA2             0xFFC00C68         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB04_DATA2             0xFFC00C88         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB05_DATA2             0xFFC00CA8         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB06_DATA2             0xFFC00CC8         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB07_DATA2             0xFFC00CE8         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB08_DATA2             0xFFC00D08         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB09_DATA2             0xFFC00D28         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB10_DATA2             0xFFC00D48         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB11_DATA2             0xFFC00D68         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB12_DATA2             0xFFC00D88         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB13_DATA2             0xFFC00DA8         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB14_DATA2             0xFFC00DC8         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB15_DATA2             0xFFC00DE8         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB16_DATA2             0xFFC00E08         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB17_DATA2             0xFFC00E28         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB18_DATA2             0xFFC00E48         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB19_DATA2             0xFFC00E68         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB20_DATA2             0xFFC00E88         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB21_DATA2             0xFFC00EA8         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB22_DATA2             0xFFC00EC8         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB23_DATA2             0xFFC00EE8         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB24_DATA2             0xFFC00F08         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB25_DATA2             0xFFC00F28         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB26_DATA2             0xFFC00F48         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB27_DATA2             0xFFC00F68         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB28_DATA2             0xFFC00F88         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB29_DATA2             0xFFC00FA8         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB30_DATA2             0xFFC00FC8         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB31_DATA2             0xFFC00FE8         /* CAN0 Mailbox Word 2 Register */</div><div class='add'>+#define CAN0_MB00_DATA3             0xFFC00C0C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB01_DATA3             0xFFC00C2C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB02_DATA3             0xFFC00C4C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB03_DATA3             0xFFC00C6C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB04_DATA3             0xFFC00C8C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB05_DATA3             0xFFC00CAC         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB06_DATA3             0xFFC00CCC         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB07_DATA3             0xFFC00CEC         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB08_DATA3             0xFFC00D0C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB09_DATA3             0xFFC00D2C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB10_DATA3             0xFFC00D4C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB11_DATA3             0xFFC00D6C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB12_DATA3             0xFFC00D8C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB13_DATA3             0xFFC00DAC         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB14_DATA3             0xFFC00DCC         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB15_DATA3             0xFFC00DEC         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB16_DATA3             0xFFC00E0C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB17_DATA3             0xFFC00E2C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB18_DATA3             0xFFC00E4C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB19_DATA3             0xFFC00E6C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB20_DATA3             0xFFC00E8C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB21_DATA3             0xFFC00EAC         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB22_DATA3             0xFFC00ECC         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB23_DATA3             0xFFC00EEC         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB24_DATA3             0xFFC00F0C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB25_DATA3             0xFFC00F2C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB26_DATA3             0xFFC00F4C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB27_DATA3             0xFFC00F6C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB28_DATA3             0xFFC00F8C         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB29_DATA3             0xFFC00FAC         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB30_DATA3             0xFFC00FCC         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB31_DATA3             0xFFC00FEC         /* CAN0 Mailbox Word 3 Register */</div><div class='add'>+#define CAN0_MB00_LENGTH            0xFFC00C10         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB01_LENGTH            0xFFC00C30         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB02_LENGTH            0xFFC00C50         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB03_LENGTH            0xFFC00C70         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB04_LENGTH            0xFFC00C90         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB05_LENGTH            0xFFC00CB0         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB06_LENGTH            0xFFC00CD0         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB07_LENGTH            0xFFC00CF0         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB08_LENGTH            0xFFC00D10         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB09_LENGTH            0xFFC00D30         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB10_LENGTH            0xFFC00D50         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB11_LENGTH            0xFFC00D70         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB12_LENGTH            0xFFC00D90         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB13_LENGTH            0xFFC00DB0         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB14_LENGTH            0xFFC00DD0         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB15_LENGTH            0xFFC00DF0         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB16_LENGTH            0xFFC00E10         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB17_LENGTH            0xFFC00E30         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB18_LENGTH            0xFFC00E50         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB19_LENGTH            0xFFC00E70         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB20_LENGTH            0xFFC00E90         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB21_LENGTH            0xFFC00EB0         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB22_LENGTH            0xFFC00ED0         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB23_LENGTH            0xFFC00EF0         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB24_LENGTH            0xFFC00F10         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB25_LENGTH            0xFFC00F30         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB26_LENGTH            0xFFC00F50         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB27_LENGTH            0xFFC00F70         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB28_LENGTH            0xFFC00F90         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB29_LENGTH            0xFFC00FB0         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB30_LENGTH            0xFFC00FD0         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB31_LENGTH            0xFFC00FF0         /* CAN0 Mailbox Word 4 Register */</div><div class='add'>+#define CAN0_MB00_TIMESTAMP         0xFFC00C14         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB01_TIMESTAMP         0xFFC00C34         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB02_TIMESTAMP         0xFFC00C54         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB03_TIMESTAMP         0xFFC00C74         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB04_TIMESTAMP         0xFFC00C94         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB05_TIMESTAMP         0xFFC00CB4         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB06_TIMESTAMP         0xFFC00CD4         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB07_TIMESTAMP         0xFFC00CF4         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB08_TIMESTAMP         0xFFC00D14         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB09_TIMESTAMP         0xFFC00D34         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB10_TIMESTAMP         0xFFC00D54         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB11_TIMESTAMP         0xFFC00D74         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB12_TIMESTAMP         0xFFC00D94         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB13_TIMESTAMP         0xFFC00DB4         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB14_TIMESTAMP         0xFFC00DD4         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB15_TIMESTAMP         0xFFC00DF4         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB16_TIMESTAMP         0xFFC00E14         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB17_TIMESTAMP         0xFFC00E34         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB18_TIMESTAMP         0xFFC00E54         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB19_TIMESTAMP         0xFFC00E74         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB20_TIMESTAMP         0xFFC00E94         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB21_TIMESTAMP         0xFFC00EB4         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB22_TIMESTAMP         0xFFC00ED4         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB23_TIMESTAMP         0xFFC00EF4         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB24_TIMESTAMP         0xFFC00F14         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB25_TIMESTAMP         0xFFC00F34         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB26_TIMESTAMP         0xFFC00F54         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB27_TIMESTAMP         0xFFC00F74         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB28_TIMESTAMP         0xFFC00F94         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB29_TIMESTAMP         0xFFC00FB4         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB30_TIMESTAMP         0xFFC00FD4         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB31_TIMESTAMP         0xFFC00FF4         /* CAN0 Mailbox Word 5 Register */</div><div class='add'>+#define CAN0_MB00_ID0               0xFFC00C18         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB01_ID0               0xFFC00C38         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB02_ID0               0xFFC00C58         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB03_ID0               0xFFC00C78         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB04_ID0               0xFFC00C98         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB05_ID0               0xFFC00CB8         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB06_ID0               0xFFC00CD8         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB07_ID0               0xFFC00CF8         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB08_ID0               0xFFC00D18         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB09_ID0               0xFFC00D38         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB10_ID0               0xFFC00D58         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB11_ID0               0xFFC00D78         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB12_ID0               0xFFC00D98         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB13_ID0               0xFFC00DB8         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB14_ID0               0xFFC00DD8         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB15_ID0               0xFFC00DF8         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB16_ID0               0xFFC00E18         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB17_ID0               0xFFC00E38         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB18_ID0               0xFFC00E58         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB19_ID0               0xFFC00E78         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB20_ID0               0xFFC00E98         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB21_ID0               0xFFC00EB8         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB22_ID0               0xFFC00ED8         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB23_ID0               0xFFC00EF8         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB24_ID0               0xFFC00F18         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB25_ID0               0xFFC00F38         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB26_ID0               0xFFC00F58         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB27_ID0               0xFFC00F78         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB28_ID0               0xFFC00F98         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB29_ID0               0xFFC00FB8         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB30_ID0               0xFFC00FD8         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB31_ID0               0xFFC00FF8         /* CAN0 Mailbox Word 6 Register */</div><div class='add'>+#define CAN0_MB00_ID1               0xFFC00C1C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB01_ID1               0xFFC00C3C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB02_ID1               0xFFC00C5C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB03_ID1               0xFFC00C7C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB04_ID1               0xFFC00C9C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB05_ID1               0xFFC00CBC         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB06_ID1               0xFFC00CDC         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB07_ID1               0xFFC00CFC         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB08_ID1               0xFFC00D1C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB09_ID1               0xFFC00D3C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB10_ID1               0xFFC00D5C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB11_ID1               0xFFC00D7C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB12_ID1               0xFFC00D9C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB13_ID1               0xFFC00DBC         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB14_ID1               0xFFC00DDC         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB15_ID1               0xFFC00DFC         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB16_ID1               0xFFC00E1C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB17_ID1               0xFFC00E3C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB18_ID1               0xFFC00E5C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB19_ID1               0xFFC00E7C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB20_ID1               0xFFC00E9C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB21_ID1               0xFFC00EBC         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB22_ID1               0xFFC00EDC         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB23_ID1               0xFFC00EFC         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB24_ID1               0xFFC00F1C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB25_ID1               0xFFC00F3C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB26_ID1               0xFFC00F5C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB27_ID1               0xFFC00F7C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB28_ID1               0xFFC00F9C         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB29_ID1               0xFFC00FBC         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB30_ID1               0xFFC00FDC         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+#define CAN0_MB31_ID1               0xFFC00FFC         /* CAN0 Mailbox Word 7 Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	LINK PORT Registers</div><div class='add'>+   ========================= */</div><div class='add'>+#define LP0_CTL                     0xFFC01000         /* LP0 Control Register */</div><div class='add'>+#define LP0_STAT                    0xFFC01004         /* LP0 Status Register */</div><div class='add'>+#define LP0_DIV                     0xFFC01008         /* LP0 Clock Divider Value */</div><div class='add'>+#define LP0_CNT                     0xFFC0100C         /* LP0 Current Count Value of Clock Divider */</div><div class='add'>+#define LP0_TX                      0xFFC01010         /* LP0 Transmit Buffer */</div><div class='add'>+#define LP0_RX                      0xFFC01014         /* LP0 Receive Buffer */</div><div class='add'>+#define LP0_TXIN_SHDW               0xFFC01018         /* LP0 Shadow Input Transmit Buffer */</div><div class='add'>+#define LP0_TXOUT_SHDW              0xFFC0101C         /* LP0 Shadow Output Transmit Buffer */</div><div class='add'>+#define LP1_CTL                     0xFFC01100         /* LP1 Control Register */</div><div class='add'>+#define LP1_STAT                    0xFFC01104         /* LP1 Status Register */</div><div class='add'>+#define LP1_DIV                     0xFFC01108         /* LP1 Clock Divider Value */</div><div class='add'>+#define LP1_CNT                     0xFFC0110C         /* LP1 Current Count Value of Clock Divider */</div><div class='add'>+#define LP1_TX                      0xFFC01110         /* LP1 Transmit Buffer */</div><div class='add'>+#define LP1_RX                      0xFFC01114         /* LP1 Receive Buffer */</div><div class='add'>+#define LP1_TXIN_SHDW               0xFFC01118         /* LP1 Shadow Input Transmit Buffer */</div><div class='add'>+#define LP1_TXOUT_SHDW              0xFFC0111C         /* LP1 Shadow Output Transmit Buffer */</div><div class='add'>+#define LP2_CTL                     0xFFC01200         /* LP2 Control Register */</div><div class='add'>+#define LP2_STAT                    0xFFC01204         /* LP2 Status Register */</div><div class='add'>+#define LP2_DIV                     0xFFC01208         /* LP2 Clock Divider Value */</div><div class='add'>+#define LP2_CNT                     0xFFC0120C         /* LP2 Current Count Value of Clock Divider */</div><div class='add'>+#define LP2_TX                      0xFFC01210         /* LP2 Transmit Buffer */</div><div class='add'>+#define LP2_RX                      0xFFC01214         /* LP2 Receive Buffer */</div><div class='add'>+#define LP2_TXIN_SHDW               0xFFC01218         /* LP2 Shadow Input Transmit Buffer */</div><div class='add'>+#define LP2_TXOUT_SHDW              0xFFC0121C         /* LP2 Shadow Output Transmit Buffer */</div><div class='add'>+#define LP3_CTL                     0xFFC01300         /* LP3 Control Register */</div><div class='add'>+#define LP3_STAT                    0xFFC01304         /* LP3 Status Register */</div><div class='add'>+#define LP3_DIV                     0xFFC01308         /* LP3 Clock Divider Value */</div><div class='add'>+#define LP3_CNT                     0xFFC0130C         /* LP3 Current Count Value of Clock Divider */</div><div class='add'>+#define LP3_TX                      0xFFC01310         /* LP3 Transmit Buffer */</div><div class='add'>+#define LP3_RX                      0xFFC01314         /* LP3 Receive Buffer */</div><div class='add'>+#define LP3_TXIN_SHDW               0xFFC01318         /* LP3 Shadow Input Transmit Buffer */</div><div class='add'>+#define LP3_TXOUT_SHDW              0xFFC0131C         /* LP3 Shadow Output Transmit Buffer */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        TIMER Registers</div><div class='add'>+   ========================= */</div><div class='add'>+#define TIMER_REVID                0xFFC01400         /* GPTIMER Timer IP Version ID */</div><div class='add'>+#define TIMER_RUN                  0xFFC01404         /* GPTIMER Timer Run Register */</div><div class='add'>+#define TIMER_RUN_SET              0xFFC01408         /* GPTIMER Run Register Alias to Set */</div><div class='add'>+#define TIMER_RUN_CLR              0xFFC0140C         /* GPTIMER Run Register Alias to Clear */</div><div class='add'>+#define TIMER_STOP_CFG             0xFFC01410         /* GPTIMER Stop Config Register */</div><div class='add'>+#define TIMER_STOP_CFG_SET         0xFFC01414         /* GPTIMER Stop Config Alias to Set */</div><div class='add'>+#define TIMER_STOP_CFG_CLR         0xFFC01418         /* GPTIMER Stop Config Alias to Clear */</div><div class='add'>+#define TIMER_DATA_IMSK            0xFFC0141C         /* GPTIMER Data Interrupt Mask register */</div><div class='add'>+#define TIMER_STAT_IMSK            0xFFC01420         /* GPTIMER Status Interrupt Mask register */</div><div class='add'>+#define TIMER_TRG_MSK              0xFFC01424         /* GPTIMER Output Trigger Mask register */</div><div class='add'>+#define TIMER_TRG_IE               0xFFC01428         /* GPTIMER Slave Trigger Enable register */</div><div class='add'>+#define TIMER_DATA_ILAT            0xFFC0142C         /* GPTIMER Data Interrupt Register */</div><div class='add'>+#define TIMER_STAT_ILAT            0xFFC01430         /* GPTIMER Status (Error) Interrupt Register */</div><div class='add'>+#define TIMER_ERR_TYPE             0xFFC01434         /* GPTIMER Register Indicating Type of Error */</div><div class='add'>+#define TIMER_BCAST_PER            0xFFC01438         /* GPTIMER Broadcast Period */</div><div class='add'>+#define TIMER_BCAST_WID            0xFFC0143C         /* GPTIMER Broadcast Width */</div><div class='add'>+#define TIMER_BCAST_DLY            0xFFC01440         /* GPTIMER Broadcast Delay */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	TIMER0~7</div><div class='add'>+   ========================= */</div><div class='add'>+#define TIMER0_CONFIG             0xFFC01460         /* TIMER0 Per Timer Config Register */</div><div class='add'>+#define TIMER0_COUNTER            0xFFC01464         /* TIMER0 Per Timer Counter Register */</div><div class='add'>+#define TIMER0_PERIOD             0xFFC01468         /* TIMER0 Per Timer Period Register */</div><div class='add'>+#define TIMER0_WIDTH              0xFFC0146C         /* TIMER0 Per Timer Width Register */</div><div class='add'>+#define TIMER0_DELAY              0xFFC01470         /* TIMER0 Per Timer Delay Register */</div><div class='add'>+</div><div class='add'>+#define TIMER1_CONFIG             0xFFC01480         /* TIMER1 Per Timer Config Register */</div><div class='add'>+#define TIMER1_COUNTER            0xFFC01484         /* TIMER1 Per Timer Counter Register */</div><div class='add'>+#define TIMER1_PERIOD             0xFFC01488         /* TIMER1 Per Timer Period Register */</div><div class='add'>+#define TIMER1_WIDTH              0xFFC0148C         /* TIMER1 Per Timer Width Register */</div><div class='add'>+#define TIMER1_DELAY              0xFFC01490         /* TIMER1 Per Timer Delay Register */</div><div class='add'>+</div><div class='add'>+#define TIMER2_CONFIG             0xFFC014A0         /* TIMER2 Per Timer Config Register */</div><div class='add'>+#define TIMER2_COUNTER            0xFFC014A4         /* TIMER2 Per Timer Counter Register */</div><div class='add'>+#define TIMER2_PERIOD             0xFFC014A8         /* TIMER2 Per Timer Period Register */</div><div class='add'>+#define TIMER2_WIDTH              0xFFC014AC         /* TIMER2 Per Timer Width Register */</div><div class='add'>+#define TIMER2_DELAY              0xFFC014B0         /* TIMER2 Per Timer Delay Register */</div><div class='add'>+</div><div class='add'>+#define TIMER3_CONFIG             0xFFC014C0         /* TIMER3 Per Timer Config Register */</div><div class='add'>+#define TIMER3_COUNTER            0xFFC014C4         /* TIMER3 Per Timer Counter Register */</div><div class='add'>+#define TIMER3_PERIOD             0xFFC014C8         /* TIMER3 Per Timer Period Register */</div><div class='add'>+#define TIMER3_WIDTH              0xFFC014CC         /* TIMER3 Per Timer Width Register */</div><div class='add'>+#define TIMER3_DELAY              0xFFC014D0         /* TIMER3 Per Timer Delay Register */</div><div class='add'>+</div><div class='add'>+#define TIMER4_CONFIG             0xFFC014E0         /* TIMER4 Per Timer Config Register */</div><div class='add'>+#define TIMER4_COUNTER            0xFFC014E4         /* TIMER4 Per Timer Counter Register */</div><div class='add'>+#define TIMER4_PERIOD             0xFFC014E8         /* TIMER4 Per Timer Period Register */</div><div class='add'>+#define TIMER4_WIDTH              0xFFC014EC         /* TIMER4 Per Timer Width Register */</div><div class='add'>+#define TIMER4_DELAY              0xFFC014F0         /* TIMER4 Per Timer Delay Register */</div><div class='add'>+</div><div class='add'>+#define TIMER5_CONFIG             0xFFC01500         /* TIMER5 Per Timer Config Register */</div><div class='add'>+#define TIMER5_COUNTER            0xFFC01504         /* TIMER5 Per Timer Counter Register */</div><div class='add'>+#define TIMER5_PERIOD             0xFFC01508         /* TIMER5 Per Timer Period Register */</div><div class='add'>+#define TIMER5_WIDTH              0xFFC0150C         /* TIMER5 Per Timer Width Register */</div><div class='add'>+#define TIMER5_DELAY              0xFFC01510         /* TIMER5 Per Timer Delay Register */</div><div class='add'>+</div><div class='add'>+#define TIMER6_CONFIG             0xFFC01520         /* TIMER6 Per Timer Config Register */</div><div class='add'>+#define TIMER6_COUNTER            0xFFC01524         /* TIMER6 Per Timer Counter Register */</div><div class='add'>+#define TIMER6_PERIOD             0xFFC01528         /* TIMER6 Per Timer Period Register */</div><div class='add'>+#define TIMER6_WIDTH              0xFFC0152C         /* TIMER6 Per Timer Width Register */</div><div class='add'>+#define TIMER6_DELAY              0xFFC01530         /* TIMER6 Per Timer Delay Register */</div><div class='add'>+</div><div class='add'>+#define TIMER7_CONFIG             0xFFC01540         /* TIMER7 Per Timer Config Register */</div><div class='add'>+#define TIMER7_COUNTER            0xFFC01544         /* TIMER7 Per Timer Counter Register */</div><div class='add'>+#define TIMER7_PERIOD             0xFFC01548         /* TIMER7 Per Timer Period Register */</div><div class='add'>+#define TIMER7_WIDTH              0xFFC0154C         /* TIMER7 Per Timer Width Register */</div><div class='add'>+#define TIMER7_DELAY              0xFFC01550         /* TIMER7 Per Timer Delay Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	CRC Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	CRC0</div><div class='add'>+   ========================= */</div><div class='add'>+#define REG_CRC0_CTL                    0xFFC01C00         /* CRC0 Control Register */</div><div class='add'>+#define REG_CRC0_DCNT                   0xFFC01C04         /* CRC0 Data Word Count Register */</div><div class='add'>+#define REG_CRC0_DCNTRLD                0xFFC01C08         /* CRC0 Data Word Count Reload Register */</div><div class='add'>+#define REG_CRC0_COMP                   0xFFC01C14         /* CRC0 DATA Compare Register */</div><div class='add'>+#define REG_CRC0_FILLVAL                0xFFC01C18         /* CRC0 Fill Value Register */</div><div class='add'>+#define REG_CRC0_DFIFO                  0xFFC01C1C         /* CRC0 DATA FIFO Register */</div><div class='add'>+#define REG_CRC0_INEN                   0xFFC01C20         /* CRC0 Interrupt Enable Register */</div><div class='add'>+#define REG_CRC0_INEN_SET               0xFFC01C24         /* CRC0 Interrupt Enable Set Register */</div><div class='add'>+#define REG_CRC0_INEN_CLR               0xFFC01C28         /* CRC0 Interrupt Enable Clear Register */</div><div class='add'>+#define REG_CRC0_POLY                   0xFFC01C2C         /* CRC0 Polynomial Register */</div><div class='add'>+#define REG_CRC0_STAT                   0xFFC01C40         /* CRC0 Status Register */</div><div class='add'>+#define REG_CRC0_DCNTCAP                0xFFC01C44         /* CRC0 DATA Count Capture Register */</div><div class='add'>+#define REG_CRC0_RESULT_FIN             0xFFC01C4C         /* CRC0 Final CRC Result Register */</div><div class='add'>+#define REG_CRC0_RESULT_CUR             0xFFC01C50         /* CRC0 Current CRC Result Register */</div><div class='add'>+#define REG_CRC0_REVID                  0xFFC01C60         /* CRC0 Revision ID Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	CRC1</div><div class='add'>+   ========================= */</div><div class='add'>+#define REG_CRC1_CTL                    0xFFC01D00         /* CRC1 Control Register */</div><div class='add'>+#define REG_CRC1_DCNT                   0xFFC01D04         /* CRC1 Data Word Count Register */</div><div class='add'>+#define REG_CRC1_DCNTRLD                0xFFC01D08         /* CRC1 Data Word Count Reload Register */</div><div class='add'>+#define REG_CRC1_COMP                   0xFFC01D14         /* CRC1 DATA Compare Register */</div><div class='add'>+#define REG_CRC1_FILLVAL                0xFFC01D18         /* CRC1 Fill Value Register */</div><div class='add'>+#define REG_CRC1_DFIFO                  0xFFC01D1C         /* CRC1 DATA FIFO Register */</div><div class='add'>+#define REG_CRC1_INEN                   0xFFC01D20         /* CRC1 Interrupt Enable Register */</div><div class='add'>+#define REG_CRC1_INEN_SET               0xFFC01D24         /* CRC1 Interrupt Enable Set Register */</div><div class='add'>+#define REG_CRC1_INEN_CLR               0xFFC01D28         /* CRC1 Interrupt Enable Clear Register */</div><div class='add'>+#define REG_CRC1_POLY                   0xFFC01D2C         /* CRC1 Polynomial Register */</div><div class='add'>+#define REG_CRC1_STAT                   0xFFC01D40         /* CRC1 Status Register */</div><div class='add'>+#define REG_CRC1_DCNTCAP                0xFFC01D44         /* CRC1 DATA Count Capture Register */</div><div class='add'>+#define REG_CRC1_RESULT_FIN             0xFFC01D4C         /* CRC1 Final CRC Result Register */</div><div class='add'>+#define REG_CRC1_RESULT_CUR             0xFFC01D50         /* CRC1 Current CRC Result Register */</div><div class='add'>+#define REG_CRC1_REVID                  0xFFC01D60         /* CRC1 Revision ID Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        TWI Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        TWI0</div><div class='add'>+   ========================= */</div><div class='add'>+#define TWI0_CLKDIV                    0xFFC01E00         /* TWI0 SCL Clock Divider */</div><div class='add'>+#define TWI0_CONTROL                   0xFFC01E04         /* TWI0 Control Register */</div><div class='add'>+#define TWI0_SLAVE_CTL                 0xFFC01E08         /* TWI0 Slave Mode Control Register */</div><div class='add'>+#define TWI0_SLAVE_STAT                0xFFC01E0C         /* TWI0 Slave Mode Status Register */</div><div class='add'>+#define TWI0_SLAVE_ADDR                0xFFC01E10         /* TWI0 Slave Mode Address Register */</div><div class='add'>+#define TWI0_MASTER_CTL                0xFFC01E14         /* TWI0 Master Mode Control Registers */</div><div class='add'>+#define TWI0_MASTER_STAT               0xFFC01E18         /* TWI0 Master Mode Status Register */</div><div class='add'>+#define TWI0_MASTER_ADDR               0xFFC01E1C         /* TWI0 Master Mode Address Register */</div><div class='add'>+#define TWI0_INT_STAT                  0xFFC01E20         /* TWI0 Interrupt Status Register */</div><div class='add'>+#define TWI0_INT_MASK                  0xFFC01E24         /* TWI0 Interrupt Mask Register */</div><div class='add'>+#define TWI0_FIFO_CTL                  0xFFC01E28         /* TWI0 FIFO Control Register */</div><div class='add'>+#define TWI0_FIFO_STAT                 0xFFC01E2C         /* TWI0 FIFO Status Register */</div><div class='add'>+#define TWI0_XMT_DATA8                 0xFFC01E80         /* TWI0 FIFO Transmit Data Single-Byte Register */</div><div class='add'>+#define TWI0_XMT_DATA16                0xFFC01E84         /* TWI0 FIFO Transmit Data Double-Byte Register */</div><div class='add'>+#define TWI0_RCV_DATA8                 0xFFC01E88         /* TWI0 FIFO Transmit Data Single-Byte Register */</div><div class='add'>+#define TWI0_RCV_DATA16                0xFFC01E8C         /* TWI0 FIFO Transmit Data Double-Byte Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        TWI1</div><div class='add'>+   ========================= */</div><div class='add'>+#define TWI1_CLKDIV                 0xFFC01F00         /* TWI1 SCL Clock Divider */</div><div class='add'>+#define TWI1_CONTROL                    0xFFC01F04         /* TWI1 Control Register */</div><div class='add'>+#define TWI1_SLAVE_CTL                 0xFFC01F08         /* TWI1 Slave Mode Control Register */</div><div class='add'>+#define TWI1_SLAVE_STAT                0xFFC01F0C         /* TWI1 Slave Mode Status Register */</div><div class='add'>+#define TWI1_SLAVE_ADDR                0xFFC01F10         /* TWI1 Slave Mode Address Register */</div><div class='add'>+#define TWI1_MASTER_CTL                0xFFC01F14         /* TWI1 Master Mode Control Registers */</div><div class='add'>+#define TWI1_MASTER_STAT               0xFFC01F18         /* TWI1 Master Mode Status Register */</div><div class='add'>+#define TWI1_MASTER_ADDR               0xFFC01F1C         /* TWI1 Master Mode Address Register */</div><div class='add'>+#define TWI1_INT_STAT                  0xFFC01F20         /* TWI1 Interrupt Status Register */</div><div class='add'>+#define TWI1_INT_MASK                   0xFFC01F24         /* TWI1 Interrupt Mask Register */</div><div class='add'>+#define TWI1_FIFO_CTL                0xFFC01F28         /* TWI1 FIFO Control Register */</div><div class='add'>+#define TWI1_FIFO_STAT               0xFFC01F2C         /* TWI1 FIFO Status Register */</div><div class='add'>+#define TWI1_XMT_DATA8                0xFFC01F80         /* TWI1 FIFO Transmit Data Single-Byte Register */</div><div class='add'>+#define TWI1_XMT_DATA16               0xFFC01F84         /* TWI1 FIFO Transmit Data Double-Byte Register */</div><div class='add'>+#define TWI1_RCV_DATA8                0xFFC01F88         /* TWI1 FIFO Transmit Data Single-Byte Register */</div><div class='add'>+#define TWI1_RCV_DATA16               0xFFC01F8C         /* TWI1 FIFO Transmit Data Double-Byte Register */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        UART Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        UART0</div><div class='add'>+   ========================= */</div><div class='add'>+#define UART0_REVID                 0xFFC02000         /* UART0 Revision ID Register */</div><div class='add'>+#define UART0_CTL                   0xFFC02004         /* UART0 Control Register */</div><div class='add'>+#define UART0_STAT                  0xFFC02008         /* UART0 Status Register */</div><div class='add'>+#define UART0_SCR                   0xFFC0200C         /* UART0 Scratch Register */</div><div class='add'>+#define UART0_CLK                   0xFFC02010         /* UART0 Clock Rate Register */</div><div class='add'>+#define UART0_IER                   0xFFC02014         /* UART0 Interrupt Mask Register */</div><div class='add'>+#define UART0_IER_SET               0xFFC02018         /* UART0 Interrupt Mask Set Register */</div><div class='add'>+#define UART0_IER_CLR               0xFFC0201C         /* UART0 Interrupt Mask Clear Register */</div><div class='add'>+#define UART0_RBR                   0xFFC02020         /* UART0 Receive Buffer Register */</div><div class='add'>+#define UART0_THR                   0xFFC02024         /* UART0 Transmit Hold Register */</div><div class='add'>+#define UART0_TAIP                  0xFFC02028         /* UART0 Transmit Address/Insert Pulse Register */</div><div class='add'>+#define UART0_TSR                   0xFFC0202C         /* UART0 Transmit Shift Register */</div><div class='add'>+#define UART0_RSR                   0xFFC02030         /* UART0 Receive Shift Register */</div><div class='add'>+#define UART0_TXDIV                 0xFFC02034         /* UART0 Transmit Clock Devider Register */</div><div class='add'>+#define UART0_RXDIV                 0xFFC02038         /* UART0 Receive Clock Devider Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        UART1</div><div class='add'>+   ========================= */</div><div class='add'>+#define UART1_REVID                 0xFFC02400         /* UART1 Revision ID Register */</div><div class='add'>+#define UART1_CTL                   0xFFC02404         /* UART1 Control Register */</div><div class='add'>+#define UART1_STAT                  0xFFC02408         /* UART1 Status Register */</div><div class='add'>+#define UART1_SCR                   0xFFC0240C         /* UART1 Scratch Register */</div><div class='add'>+#define UART1_CLK                   0xFFC02410         /* UART1 Clock Rate Register */</div><div class='add'>+#define UART1_IER                   0xFFC02414         /* UART1 Interrupt Mask Register */</div><div class='add'>+#define UART1_IER_SET               0xFFC02418         /* UART1 Interrupt Mask Set Register */</div><div class='add'>+#define UART1_IER_CLR               0xFFC0241C         /* UART1 Interrupt Mask Clear Register */</div><div class='add'>+#define UART1_RBR                   0xFFC02420         /* UART1 Receive Buffer Register */</div><div class='add'>+#define UART1_THR                   0xFFC02424         /* UART1 Transmit Hold Register */</div><div class='add'>+#define UART1_TAIP                  0xFFC02428         /* UART1 Transmit Address/Insert Pulse Register */</div><div class='add'>+#define UART1_TSR                   0xFFC0242C         /* UART1 Transmit Shift Register */</div><div class='add'>+#define UART1_RSR                   0xFFC02430         /* UART1 Receive Shift Register */</div><div class='add'>+#define UART1_TXDIV                 0xFFC02434         /* UART1 Transmit Clock Devider Register */</div><div class='add'>+#define UART1_RXDIV                 0xFFC02438         /* UART1 Receive Clock Devider Register */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PORT Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PORTA</div><div class='add'>+   ========================= */</div><div class='add'>+#define PORTA_FER                   0xFFC03000         /* PORTA Port x Function Enable Register */</div><div class='add'>+#define PORTA_FER_SET               0xFFC03004         /* PORTA Port x Function Enable Set Register */</div><div class='add'>+#define PORTA_FER_CLEAR               0xFFC03008         /* PORTA Port x Function Enable Clear Register */</div><div class='add'>+#define PORTA_DATA                  0xFFC0300C         /* PORTA Port x GPIO Data Register */</div><div class='add'>+#define PORTA_DATA_SET              0xFFC03010         /* PORTA Port x GPIO Data Set Register */</div><div class='add'>+#define PORTA_DATA_CLEAR              0xFFC03014         /* PORTA Port x GPIO Data Clear Register */</div><div class='add'>+#define PORTA_DIR                   0xFFC03018         /* PORTA Port x GPIO Direction Register */</div><div class='add'>+#define PORTA_DIR_SET               0xFFC0301C         /* PORTA Port x GPIO Direction Set Register */</div><div class='add'>+#define PORTA_DIR_CLEAR               0xFFC03020         /* PORTA Port x GPIO Direction Clear Register */</div><div class='add'>+#define PORTA_INEN                  0xFFC03024         /* PORTA Port x GPIO Input Enable Register */</div><div class='add'>+#define PORTA_INEN_SET              0xFFC03028         /* PORTA Port x GPIO Input Enable Set Register */</div><div class='add'>+#define PORTA_INEN_CLEAR              0xFFC0302C         /* PORTA Port x GPIO Input Enable Clear Register */</div><div class='add'>+#define PORTA_MUX                   0xFFC03030         /* PORTA Port x Multiplexer Control Register */</div><div class='add'>+#define PORTA_DATA_TGL              0xFFC03034         /* PORTA Port x GPIO Input Enable Toggle Register */</div><div class='add'>+#define PORTA_POL                   0xFFC03038         /* PORTA Port x GPIO Programming Inversion Register */</div><div class='add'>+#define PORTA_POL_SET               0xFFC0303C         /* PORTA Port x GPIO Programming Inversion Set Register */</div><div class='add'>+#define PORTA_POL_CLEAR               0xFFC03040         /* PORTA Port x GPIO Programming Inversion Clear Register */</div><div class='add'>+#define PORTA_LOCK                  0xFFC03044         /* PORTA Port x GPIO Lock Register */</div><div class='add'>+#define PORTA_REVID                 0xFFC0307C         /* PORTA Port x GPIO Revision ID */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PORTB</div><div class='add'>+   ========================= */</div><div class='add'>+#define PORTB_FER                   0xFFC03080         /* PORTB Port x Function Enable Register */</div><div class='add'>+#define PORTB_FER_SET               0xFFC03084         /* PORTB Port x Function Enable Set Register */</div><div class='add'>+#define PORTB_FER_CLEAR               0xFFC03088         /* PORTB Port x Function Enable Clear Register */</div><div class='add'>+#define PORTB_DATA                  0xFFC0308C         /* PORTB Port x GPIO Data Register */</div><div class='add'>+#define PORTB_DATA_SET              0xFFC03090         /* PORTB Port x GPIO Data Set Register */</div><div class='add'>+#define PORTB_DATA_CLEAR              0xFFC03094         /* PORTB Port x GPIO Data Clear Register */</div><div class='add'>+#define PORTB_DIR                   0xFFC03098         /* PORTB Port x GPIO Direction Register */</div><div class='add'>+#define PORTB_DIR_SET               0xFFC0309C         /* PORTB Port x GPIO Direction Set Register */</div><div class='add'>+#define PORTB_DIR_CLEAR               0xFFC030A0         /* PORTB Port x GPIO Direction Clear Register */</div><div class='add'>+#define PORTB_INEN                  0xFFC030A4         /* PORTB Port x GPIO Input Enable Register */</div><div class='add'>+#define PORTB_INEN_SET              0xFFC030A8         /* PORTB Port x GPIO Input Enable Set Register */</div><div class='add'>+#define PORTB_INEN_CLEAR              0xFFC030AC         /* PORTB Port x GPIO Input Enable Clear Register */</div><div class='add'>+#define PORTB_MUX                   0xFFC030B0         /* PORTB Port x Multiplexer Control Register */</div><div class='add'>+#define PORTB_DATA_TGL              0xFFC030B4         /* PORTB Port x GPIO Input Enable Toggle Register */</div><div class='add'>+#define PORTB_POL                   0xFFC030B8         /* PORTB Port x GPIO Programming Inversion Register */</div><div class='add'>+#define PORTB_POL_SET               0xFFC030BC         /* PORTB Port x GPIO Programming Inversion Set Register */</div><div class='add'>+#define PORTB_POL_CLEAR               0xFFC030C0         /* PORTB Port x GPIO Programming Inversion Clear Register */</div><div class='add'>+#define PORTB_LOCK                  0xFFC030C4         /* PORTB Port x GPIO Lock Register */</div><div class='add'>+#define PORTB_REVID                 0xFFC030FC         /* PORTB Port x GPIO Revision ID */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PORTC</div><div class='add'>+   ========================= */</div><div class='add'>+#define PORTC_FER                   0xFFC03100         /* PORTC Port x Function Enable Register */</div><div class='add'>+#define PORTC_FER_SET               0xFFC03104         /* PORTC Port x Function Enable Set Register */</div><div class='add'>+#define PORTC_FER_CLEAR               0xFFC03108         /* PORTC Port x Function Enable Clear Register */</div><div class='add'>+#define PORTC_DATA                  0xFFC0310C         /* PORTC Port x GPIO Data Register */</div><div class='add'>+#define PORTC_DATA_SET              0xFFC03110         /* PORTC Port x GPIO Data Set Register */</div><div class='add'>+#define PORTC_DATA_CLEAR              0xFFC03114         /* PORTC Port x GPIO Data Clear Register */</div><div class='add'>+#define PORTC_DIR                   0xFFC03118         /* PORTC Port x GPIO Direction Register */</div><div class='add'>+#define PORTC_DIR_SET               0xFFC0311C         /* PORTC Port x GPIO Direction Set Register */</div><div class='add'>+#define PORTC_DIR_CLEAR               0xFFC03120         /* PORTC Port x GPIO Direction Clear Register */</div><div class='add'>+#define PORTC_INEN                  0xFFC03124         /* PORTC Port x GPIO Input Enable Register */</div><div class='add'>+#define PORTC_INEN_SET              0xFFC03128         /* PORTC Port x GPIO Input Enable Set Register */</div><div class='add'>+#define PORTC_INEN_CLEAR              0xFFC0312C         /* PORTC Port x GPIO Input Enable Clear Register */</div><div class='add'>+#define PORTC_MUX                   0xFFC03130         /* PORTC Port x Multiplexer Control Register */</div><div class='add'>+#define PORTC_DATA_TGL              0xFFC03134         /* PORTC Port x GPIO Input Enable Toggle Register */</div><div class='add'>+#define PORTC_POL                   0xFFC03138         /* PORTC Port x GPIO Programming Inversion Register */</div><div class='add'>+#define PORTC_POL_SET               0xFFC0313C         /* PORTC Port x GPIO Programming Inversion Set Register */</div><div class='add'>+#define PORTC_POL_CLEAR               0xFFC03140         /* PORTC Port x GPIO Programming Inversion Clear Register */</div><div class='add'>+#define PORTC_LOCK                  0xFFC03144         /* PORTC Port x GPIO Lock Register */</div><div class='add'>+#define PORTC_REVID                 0xFFC0317C         /* PORTC Port x GPIO Revision ID */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PORTD</div><div class='add'>+   ========================= */</div><div class='add'>+#define PORTD_FER                   0xFFC03180         /* PORTD Port x Function Enable Register */</div><div class='add'>+#define PORTD_FER_SET               0xFFC03184         /* PORTD Port x Function Enable Set Register */</div><div class='add'>+#define PORTD_FER_CLEAR               0xFFC03188         /* PORTD Port x Function Enable Clear Register */</div><div class='add'>+#define PORTD_DATA                  0xFFC0318C         /* PORTD Port x GPIO Data Register */</div><div class='add'>+#define PORTD_DATA_SET              0xFFC03190         /* PORTD Port x GPIO Data Set Register */</div><div class='add'>+#define PORTD_DATA_CLEAR              0xFFC03194         /* PORTD Port x GPIO Data Clear Register */</div><div class='add'>+#define PORTD_DIR                   0xFFC03198         /* PORTD Port x GPIO Direction Register */</div><div class='add'>+#define PORTD_DIR_SET               0xFFC0319C         /* PORTD Port x GPIO Direction Set Register */</div><div class='add'>+#define PORTD_DIR_CLEAR               0xFFC031A0         /* PORTD Port x GPIO Direction Clear Register */</div><div class='add'>+#define PORTD_INEN                  0xFFC031A4         /* PORTD Port x GPIO Input Enable Register */</div><div class='add'>+#define PORTD_INEN_SET              0xFFC031A8         /* PORTD Port x GPIO Input Enable Set Register */</div><div class='add'>+#define PORTD_INEN_CLEAR              0xFFC031AC         /* PORTD Port x GPIO Input Enable Clear Register */</div><div class='add'>+#define PORTD_MUX                   0xFFC031B0         /* PORTD Port x Multiplexer Control Register */</div><div class='add'>+#define PORTD_DATA_TGL              0xFFC031B4         /* PORTD Port x GPIO Input Enable Toggle Register */</div><div class='add'>+#define PORTD_POL                   0xFFC031B8         /* PORTD Port x GPIO Programming Inversion Register */</div><div class='add'>+#define PORTD_POL_SET               0xFFC031BC         /* PORTD Port x GPIO Programming Inversion Set Register */</div><div class='add'>+#define PORTD_POL_CLEAR               0xFFC031C0         /* PORTD Port x GPIO Programming Inversion Clear Register */</div><div class='add'>+#define PORTD_LOCK                  0xFFC031C4         /* PORTD Port x GPIO Lock Register */</div><div class='add'>+#define PORTD_REVID                 0xFFC031FC         /* PORTD Port x GPIO Revision ID */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PORTE</div><div class='add'>+   ========================= */</div><div class='add'>+#define PORTE_FER                   0xFFC03200         /* PORTE Port x Function Enable Register */</div><div class='add'>+#define PORTE_FER_SET               0xFFC03204         /* PORTE Port x Function Enable Set Register */</div><div class='add'>+#define PORTE_FER_CLEAR               0xFFC03208         /* PORTE Port x Function Enable Clear Register */</div><div class='add'>+#define PORTE_DATA                  0xFFC0320C         /* PORTE Port x GPIO Data Register */</div><div class='add'>+#define PORTE_DATA_SET              0xFFC03210         /* PORTE Port x GPIO Data Set Register */</div><div class='add'>+#define PORTE_DATA_CLEAR              0xFFC03214         /* PORTE Port x GPIO Data Clear Register */</div><div class='add'>+#define PORTE_DIR                   0xFFC03218         /* PORTE Port x GPIO Direction Register */</div><div class='add'>+#define PORTE_DIR_SET               0xFFC0321C         /* PORTE Port x GPIO Direction Set Register */</div><div class='add'>+#define PORTE_DIR_CLEAR               0xFFC03220         /* PORTE Port x GPIO Direction Clear Register */</div><div class='add'>+#define PORTE_INEN                  0xFFC03224         /* PORTE Port x GPIO Input Enable Register */</div><div class='add'>+#define PORTE_INEN_SET              0xFFC03228         /* PORTE Port x GPIO Input Enable Set Register */</div><div class='add'>+#define PORTE_INEN_CLEAR              0xFFC0322C         /* PORTE Port x GPIO Input Enable Clear Register */</div><div class='add'>+#define PORTE_MUX                   0xFFC03230         /* PORTE Port x Multiplexer Control Register */</div><div class='add'>+#define PORTE_DATA_TGL              0xFFC03234         /* PORTE Port x GPIO Input Enable Toggle Register */</div><div class='add'>+#define PORTE_POL                   0xFFC03238         /* PORTE Port x GPIO Programming Inversion Register */</div><div class='add'>+#define PORTE_POL_SET               0xFFC0323C         /* PORTE Port x GPIO Programming Inversion Set Register */</div><div class='add'>+#define PORTE_POL_CLEAR               0xFFC03240         /* PORTE Port x GPIO Programming Inversion Clear Register */</div><div class='add'>+#define PORTE_LOCK                  0xFFC03244         /* PORTE Port x GPIO Lock Register */</div><div class='add'>+#define PORTE_REVID                 0xFFC0327C         /* PORTE Port x GPIO Revision ID */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PORTF</div><div class='add'>+   ========================= */</div><div class='add'>+#define PORTF_FER                   0xFFC03280         /* PORTF Port x Function Enable Register */</div><div class='add'>+#define PORTF_FER_SET               0xFFC03284         /* PORTF Port x Function Enable Set Register */</div><div class='add'>+#define PORTF_FER_CLEAR               0xFFC03288         /* PORTF Port x Function Enable Clear Register */</div><div class='add'>+#define PORTF_DATA                  0xFFC0328C         /* PORTF Port x GPIO Data Register */</div><div class='add'>+#define PORTF_DATA_SET              0xFFC03290         /* PORTF Port x GPIO Data Set Register */</div><div class='add'>+#define PORTF_DATA_CLEAR              0xFFC03294         /* PORTF Port x GPIO Data Clear Register */</div><div class='add'>+#define PORTF_DIR                   0xFFC03298         /* PORTF Port x GPIO Direction Register */</div><div class='add'>+#define PORTF_DIR_SET               0xFFC0329C         /* PORTF Port x GPIO Direction Set Register */</div><div class='add'>+#define PORTF_DIR_CLEAR               0xFFC032A0         /* PORTF Port x GPIO Direction Clear Register */</div><div class='add'>+#define PORTF_INEN                  0xFFC032A4         /* PORTF Port x GPIO Input Enable Register */</div><div class='add'>+#define PORTF_INEN_SET              0xFFC032A8         /* PORTF Port x GPIO Input Enable Set Register */</div><div class='add'>+#define PORTF_INEN_CLEAR              0xFFC032AC         /* PORTF Port x GPIO Input Enable Clear Register */</div><div class='add'>+#define PORTF_MUX                   0xFFC032B0         /* PORTF Port x Multiplexer Control Register */</div><div class='add'>+#define PORTF_DATA_TGL              0xFFC032B4         /* PORTF Port x GPIO Input Enable Toggle Register */</div><div class='add'>+#define PORTF_POL                   0xFFC032B8         /* PORTF Port x GPIO Programming Inversion Register */</div><div class='add'>+#define PORTF_POL_SET               0xFFC032BC         /* PORTF Port x GPIO Programming Inversion Set Register */</div><div class='add'>+#define PORTF_POL_CLEAR               0xFFC032C0         /* PORTF Port x GPIO Programming Inversion Clear Register */</div><div class='add'>+#define PORTF_LOCK                  0xFFC032C4         /* PORTF Port x GPIO Lock Register */</div><div class='add'>+#define PORTF_REVID                 0xFFC032FC         /* PORTF Port x GPIO Revision ID */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PORTG</div><div class='add'>+   ========================= */</div><div class='add'>+#define PORTG_FER                   0xFFC03300         /* PORTG Port x Function Enable Register */</div><div class='add'>+#define PORTG_FER_SET               0xFFC03304         /* PORTG Port x Function Enable Set Register */</div><div class='add'>+#define PORTG_FER_CLEAR               0xFFC03308         /* PORTG Port x Function Enable Clear Register */</div><div class='add'>+#define PORTG_DATA                  0xFFC0330C         /* PORTG Port x GPIO Data Register */</div><div class='add'>+#define PORTG_DATA_SET              0xFFC03310         /* PORTG Port x GPIO Data Set Register */</div><div class='add'>+#define PORTG_DATA_CLEAR              0xFFC03314         /* PORTG Port x GPIO Data Clear Register */</div><div class='add'>+#define PORTG_DIR                   0xFFC03318         /* PORTG Port x GPIO Direction Register */</div><div class='add'>+#define PORTG_DIR_SET               0xFFC0331C         /* PORTG Port x GPIO Direction Set Register */</div><div class='add'>+#define PORTG_DIR_CLEAR               0xFFC03320         /* PORTG Port x GPIO Direction Clear Register */</div><div class='add'>+#define PORTG_INEN                  0xFFC03324         /* PORTG Port x GPIO Input Enable Register */</div><div class='add'>+#define PORTG_INEN_SET              0xFFC03328         /* PORTG Port x GPIO Input Enable Set Register */</div><div class='add'>+#define PORTG_INEN_CLEAR              0xFFC0332C         /* PORTG Port x GPIO Input Enable Clear Register */</div><div class='add'>+#define PORTG_MUX                   0xFFC03330         /* PORTG Port x Multiplexer Control Register */</div><div class='add'>+#define PORTG_DATA_TGL              0xFFC03334         /* PORTG Port x GPIO Input Enable Toggle Register */</div><div class='add'>+#define PORTG_POL                   0xFFC03338         /* PORTG Port x GPIO Programming Inversion Register */</div><div class='add'>+#define PORTG_POL_SET               0xFFC0333C         /* PORTG Port x GPIO Programming Inversion Set Register */</div><div class='add'>+#define PORTG_POL_CLEAR               0xFFC03340         /* PORTG Port x GPIO Programming Inversion Clear Register */</div><div class='add'>+#define PORTG_LOCK                  0xFFC03344         /* PORTG Port x GPIO Lock Register */</div><div class='add'>+#define PORTG_REVID                 0xFFC0337C         /* PORTG Port x GPIO Revision ID */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PINT Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PINT0</div><div class='add'>+   ========================= */</div><div class='add'>+#define PINT0_MASK_SET              0xFFC04000         /* PINT0 Pint Mask Set Register */</div><div class='add'>+#define PINT0_MASK_CLEAR            0xFFC04004         /* PINT0 Pint Mask Clear Register */</div><div class='add'>+#define PINT0_REQUEST               0xFFC04008         /* PINT0 Pint Request Register */</div><div class='add'>+#define PINT0_ASSIGN                0xFFC0400C         /* PINT0 Pint Assign Register */</div><div class='add'>+#define PINT0_EDGE_SET              0xFFC04010         /* PINT0 Pint Edge Set Register */</div><div class='add'>+#define PINT0_EDGE_CLEAR            0xFFC04014         /* PINT0 Pint Edge Clear Register */</div><div class='add'>+#define PINT0_INVERT_SET            0xFFC04018         /* PINT0 Pint Invert Set Register */</div><div class='add'>+#define PINT0_INVERT_CLEAR          0xFFC0401C         /* PINT0 Pint Invert Clear Register */</div><div class='add'>+#define PINT0_PINSTATE              0xFFC04020         /* PINT0 Pint Pinstate Register */</div><div class='add'>+#define PINT0_LATCH                 0xFFC04024         /* PINT0 Pint Latch Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PINT1</div><div class='add'>+   ========================= */</div><div class='add'>+#define PINT1_MASK_SET              0xFFC04100         /* PINT1 Pint Mask Set Register */</div><div class='add'>+#define PINT1_MASK_CLEAR            0xFFC04104         /* PINT1 Pint Mask Clear Register */</div><div class='add'>+#define PINT1_REQUEST               0xFFC04108         /* PINT1 Pint Request Register */</div><div class='add'>+#define PINT1_ASSIGN                0xFFC0410C         /* PINT1 Pint Assign Register */</div><div class='add'>+#define PINT1_EDGE_SET              0xFFC04110         /* PINT1 Pint Edge Set Register */</div><div class='add'>+#define PINT1_EDGE_CLEAR            0xFFC04114         /* PINT1 Pint Edge Clear Register */</div><div class='add'>+#define PINT1_INVERT_SET            0xFFC04118         /* PINT1 Pint Invert Set Register */</div><div class='add'>+#define PINT1_INVERT_CLEAR          0xFFC0411C         /* PINT1 Pint Invert Clear Register */</div><div class='add'>+#define PINT1_PINSTATE              0xFFC04120         /* PINT1 Pint Pinstate Register */</div><div class='add'>+#define PINT1_LATCH                 0xFFC04124         /* PINT1 Pint Latch Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PINT2</div><div class='add'>+   ========================= */</div><div class='add'>+#define PINT2_MASK_SET              0xFFC04200         /* PINT2 Pint Mask Set Register */</div><div class='add'>+#define PINT2_MASK_CLEAR            0xFFC04204         /* PINT2 Pint Mask Clear Register */</div><div class='add'>+#define PINT2_REQUEST               0xFFC04208         /* PINT2 Pint Request Register */</div><div class='add'>+#define PINT2_ASSIGN                0xFFC0420C         /* PINT2 Pint Assign Register */</div><div class='add'>+#define PINT2_EDGE_SET              0xFFC04210         /* PINT2 Pint Edge Set Register */</div><div class='add'>+#define PINT2_EDGE_CLEAR            0xFFC04214         /* PINT2 Pint Edge Clear Register */</div><div class='add'>+#define PINT2_INVERT_SET            0xFFC04218         /* PINT2 Pint Invert Set Register */</div><div class='add'>+#define PINT2_INVERT_CLEAR          0xFFC0421C         /* PINT2 Pint Invert Clear Register */</div><div class='add'>+#define PINT2_PINSTATE              0xFFC04220         /* PINT2 Pint Pinstate Register */</div><div class='add'>+#define PINT2_LATCH                 0xFFC04224         /* PINT2 Pint Latch Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PINT3</div><div class='add'>+   ========================= */</div><div class='add'>+#define PINT3_MASK_SET              0xFFC04300         /* PINT3 Pint Mask Set Register */</div><div class='add'>+#define PINT3_MASK_CLEAR            0xFFC04304         /* PINT3 Pint Mask Clear Register */</div><div class='add'>+#define PINT3_REQUEST               0xFFC04308         /* PINT3 Pint Request Register */</div><div class='add'>+#define PINT3_ASSIGN                0xFFC0430C         /* PINT3 Pint Assign Register */</div><div class='add'>+#define PINT3_EDGE_SET              0xFFC04310         /* PINT3 Pint Edge Set Register */</div><div class='add'>+#define PINT3_EDGE_CLEAR            0xFFC04314         /* PINT3 Pint Edge Clear Register */</div><div class='add'>+#define PINT3_INVERT_SET            0xFFC04318         /* PINT3 Pint Invert Set Register */</div><div class='add'>+#define PINT3_INVERT_CLEAR          0xFFC0431C         /* PINT3 Pint Invert Clear Register */</div><div class='add'>+#define PINT3_PINSTATE              0xFFC04320         /* PINT3 Pint Pinstate Register */</div><div class='add'>+#define PINT3_LATCH                 0xFFC04324         /* PINT3 Pint Latch Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PINT4</div><div class='add'>+   ========================= */</div><div class='add'>+#define PINT4_MASK_SET              0xFFC04400         /* PINT4 Pint Mask Set Register */</div><div class='add'>+#define PINT4_MASK_CLEAR            0xFFC04404         /* PINT4 Pint Mask Clear Register */</div><div class='add'>+#define PINT4_REQUEST               0xFFC04408         /* PINT4 Pint Request Register */</div><div class='add'>+#define PINT4_ASSIGN                0xFFC0440C         /* PINT4 Pint Assign Register */</div><div class='add'>+#define PINT4_EDGE_SET              0xFFC04410         /* PINT4 Pint Edge Set Register */</div><div class='add'>+#define PINT4_EDGE_CLEAR            0xFFC04414         /* PINT4 Pint Edge Clear Register */</div><div class='add'>+#define PINT4_INVERT_SET            0xFFC04418         /* PINT4 Pint Invert Set Register */</div><div class='add'>+#define PINT4_INVERT_CLEAR          0xFFC0441C         /* PINT4 Pint Invert Clear Register */</div><div class='add'>+#define PINT4_PINSTATE              0xFFC04420         /* PINT4 Pint Pinstate Register */</div><div class='add'>+#define PINT4_LATCH                 0xFFC04424         /* PINT4 Pint Latch Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        PINT5</div><div class='add'>+   ========================= */</div><div class='add'>+#define PINT5_MASK_SET              0xFFC04500         /* PINT5 Pint Mask Set Register */</div><div class='add'>+#define PINT5_MASK_CLEAR            0xFFC04504         /* PINT5 Pint Mask Clear Register */</div><div class='add'>+#define PINT5_REQUEST               0xFFC04508         /* PINT5 Pint Request Register */</div><div class='add'>+#define PINT5_ASSIGN                0xFFC0450C         /* PINT5 Pint Assign Register */</div><div class='add'>+#define PINT5_EDGE_SET              0xFFC04510         /* PINT5 Pint Edge Set Register */</div><div class='add'>+#define PINT5_EDGE_CLEAR            0xFFC04514         /* PINT5 Pint Edge Clear Register */</div><div class='add'>+#define PINT5_INVERT_SET            0xFFC04518         /* PINT5 Pint Invert Set Register */</div><div class='add'>+#define PINT5_INVERT_CLEAR          0xFFC0451C         /* PINT5 Pint Invert Clear Register */</div><div class='add'>+#define PINT5_PINSTATE              0xFFC04520         /* PINT5 Pint Pinstate Register */</div><div class='add'>+#define PINT5_LATCH                 0xFFC04524         /* PINT5 Pint Latch Register */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        SMC Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        SMC0</div><div class='add'>+   ========================= */</div><div class='add'>+#define SMC_GCTL                   0xFFC16004         /* SMC0 SMC Control Register */</div><div class='add'>+#define SMC_GSTAT                  0xFFC16008         /* SMC0 SMC Status Register */</div><div class='add'>+#define SMC_B0CTL                  0xFFC1600C         /* SMC0 SMC Bank0 Control Register */</div><div class='add'>+#define SMC_B0TIM                  0xFFC16010         /* SMC0 SMC Bank0 Timing Register */</div><div class='add'>+#define SMC_B0ETIM                 0xFFC16014         /* SMC0 SMC Bank0 Extended Timing Register */</div><div class='add'>+#define SMC_B1CTL                  0xFFC1601C         /* SMC0 SMC BANK1 Control Register */</div><div class='add'>+#define SMC_B1TIM                  0xFFC16020         /* SMC0 SMC BANK1 Timing Register */</div><div class='add'>+#define SMC_B1ETIM                 0xFFC16024         /* SMC0 SMC BANK1 Extended Timing Register */</div><div class='add'>+#define SMC_B2CTL                  0xFFC1602C         /* SMC0 SMC BANK2 Control Register */</div><div class='add'>+#define SMC_B2TIM                  0xFFC16030         /* SMC0 SMC BANK2 Timing Register */</div><div class='add'>+#define SMC_B2ETIM                 0xFFC16034         /* SMC0 SMC BANK2 Extended Timing Register */</div><div class='add'>+#define SMC_B3CTL                  0xFFC1603C         /* SMC0 SMC BANK3 Control Register */</div><div class='add'>+#define SMC_B3TIM                  0xFFC16040         /* SMC0 SMC BANK3 Timing Register */</div><div class='add'>+#define SMC_B3ETIM                 0xFFC16044         /* SMC0 SMC BANK3 Extended Timing Register */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        WDOG Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        WDOG0</div><div class='add'>+   ========================= */</div><div class='add'>+#define WDOG0_CTL                   0xFFC17000         /* WDOG0 Control Register */</div><div class='add'>+#define WDOG0_CNT                   0xFFC17004         /* WDOG0 Count Register */</div><div class='add'>+#define WDOG0_STAT                  0xFFC17008         /* WDOG0 Watchdog Timer Status Register */</div><div class='add'>+#define WDOG_CTL		WDOG0_CTL</div><div class='add'>+#define WDOG_CNT		WDOG0_CNT</div><div class='add'>+#define WDOG_STAT		WDOG0_STAT</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        WDOG1</div><div class='add'>+   ========================= */</div><div class='add'>+#define WDOG1_CTL                   0xFFC17800         /* WDOG1 Control Register */</div><div class='add'>+#define WDOG1_CNT                   0xFFC17804         /* WDOG1 Count Register */</div><div class='add'>+#define WDOG1_STAT                  0xFFC17808         /* WDOG1 Watchdog Timer Status Register */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        SDU Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        SDU0</div><div class='add'>+   ========================= */</div><div class='add'>+#define SDU0_IDCODE                 0xFFC1F020         /* SDU0 ID Code Register */</div><div class='add'>+#define SDU0_CTL                    0xFFC1F050         /* SDU0 Control Register */</div><div class='add'>+#define SDU0_STAT                   0xFFC1F054         /* SDU0 Status Register */</div><div class='add'>+#define SDU0_MACCTL                 0xFFC1F058         /* SDU0 Memory Access Control Register */</div><div class='add'>+#define SDU0_MACADDR                0xFFC1F05C         /* SDU0 Memory Access Address Register */</div><div class='add'>+#define SDU0_MACDATA                0xFFC1F060         /* SDU0 Memory Access Data Register */</div><div class='add'>+#define SDU0_DMARD                  0xFFC1F064         /* SDU0 DMA Read Data Register */</div><div class='add'>+#define SDU0_DMAWD                  0xFFC1F068         /* SDU0 DMA Write Data Register */</div><div class='add'>+#define SDU0_MSG                    0xFFC1F080         /* SDU0 Message Register */</div><div class='add'>+#define SDU0_MSG_SET                0xFFC1F084         /* SDU0 Message Set Register */</div><div class='add'>+#define SDU0_MSG_CLR                0xFFC1F088         /* SDU0 Message Clear Register */</div><div class='add'>+#define SDU0_GHLT                   0xFFC1F08C         /* SDU0 Group Halt Register */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        EMAC Registers</div><div class='add'>+   ========================= */</div><div class='add'>+/* =========================</div><div class='add'>+        EMAC0</div><div class='add'>+   ========================= */</div><div class='add'>+#define EMAC0_MACCFG                0xFFC20000         /* EMAC0 MAC Configuration Register */</div><div class='add'>+#define EMAC0_MACFRMFILT            0xFFC20004         /* EMAC0 Filter Register for filtering Received Frames */</div><div class='add'>+#define EMAC0_HASHTBL_HI            0xFFC20008         /* EMAC0 Contains the Upper 32 bits of the hash table */</div><div class='add'>+#define EMAC0_HASHTBL_LO            0xFFC2000C         /* EMAC0 Contains the lower 32 bits of the hash table */</div><div class='add'>+#define EMAC0_GMII_ADDR             0xFFC20010         /* EMAC0 Management Address Register */</div><div class='add'>+#define EMAC0_GMII_DATA             0xFFC20014         /* EMAC0 Management Data Register */</div><div class='add'>+#define EMAC0_FLOWCTL               0xFFC20018         /* EMAC0 MAC FLow Control Register */</div><div class='add'>+#define EMAC0_VLANTAG               0xFFC2001C         /* EMAC0 VLAN Tag Register */</div><div class='add'>+#define EMAC0_VER                   0xFFC20020         /* EMAC0 EMAC Version Register */</div><div class='add'>+#define EMAC0_DBG                   0xFFC20024         /* EMAC0 EMAC Debug Register */</div><div class='add'>+#define EMAC0_RMTWKUP               0xFFC20028         /* EMAC0 Remote wake up frame register */</div><div class='add'>+#define EMAC0_PMT_CTLSTAT           0xFFC2002C         /* EMAC0 PMT Control and Status Register */</div><div class='add'>+#define EMAC0_ISTAT                 0xFFC20038         /* EMAC0 EMAC Interrupt Status Register */</div><div class='add'>+#define EMAC0_IMSK                  0xFFC2003C         /* EMAC0 EMAC Interrupt Mask Register */</div><div class='add'>+#define EMAC0_ADDR0_HI              0xFFC20040         /* EMAC0 EMAC Address0 High Register */</div><div class='add'>+#define EMAC0_ADDR0_LO              0xFFC20044         /* EMAC0 EMAC Address0 Low Register */</div><div class='add'>+#define EMAC0_MMC_CTL               0xFFC20100         /* EMAC0 MMC Control Register */</div><div class='add'>+#define EMAC0_MMC_RXINT             0xFFC20104         /* EMAC0 MMC RX Interrupt Register */</div><div class='add'>+#define EMAC0_MMC_TXINT             0xFFC20108         /* EMAC0 MMC TX Interrupt Register */</div><div class='add'>+#define EMAC0_MMC_RXIMSK            0xFFC2010C         /* EMAC0 MMC RX Interrupt Mask Register */</div><div class='add'>+#define EMAC0_MMC_TXIMSK            0xFFC20110         /* EMAC0 MMC TX Interrupt Mask Register */</div><div class='add'>+#define EMAC0_TXOCTCNT_GB           0xFFC20114         /* EMAC0 Num bytes transmitted exclusive of preamble */</div><div class='add'>+#define EMAC0_TXFRMCNT_GB           0xFFC20118         /* EMAC0 Num frames transmitted exclusive of retired */</div><div class='add'>+#define EMAC0_TXBCASTFRM_G          0xFFC2011C         /* EMAC0 Number of good broadcast frames transmitted. */</div><div class='add'>+#define EMAC0_TXMCASTFRM_G          0xFFC20120         /* EMAC0 Number of good multicast frames transmitted. */</div><div class='add'>+#define EMAC0_TX64_GB               0xFFC20124         /* EMAC0 Number of 64 byte length frames */</div><div class='add'>+#define EMAC0_TX65TO127_GB          0xFFC20128         /* EMAC0 Number of frames of length b/w 65-127 (inclusive) bytes */</div><div class='add'>+#define EMAC0_TX128TO255_GB         0xFFC2012C         /* EMAC0 Number of frames of length b/w 128-255 (inclusive) bytes */</div><div class='add'>+#define EMAC0_TX256TO511_GB         0xFFC20130         /* EMAC0 Number of frames of length b/w 256-511 (inclusive) bytes */</div><div class='add'>+#define EMAC0_TX512TO1023_GB        0xFFC20134         /* EMAC0 Number of frames of length b/w 512-1023 (inclusive) bytes */</div><div class='add'>+#define EMAC0_TX1024TOMAX_GB        0xFFC20138         /* EMAC0 Number of frames of length b/w 1024-max (inclusive) bytes */</div><div class='add'>+#define EMAC0_TXUCASTFRM_GB         0xFFC2013C         /* EMAC0 Number of good and bad unicast frames transmitted */</div><div class='add'>+#define EMAC0_TXMCASTFRM_GB         0xFFC20140         /* EMAC0 Number of good and bad multicast frames transmitted */</div><div class='add'>+#define EMAC0_TXBCASTFRM_GB         0xFFC20144         /* EMAC0 Number of good and bad broadcast frames transmitted */</div><div class='add'>+#define EMAC0_TXUNDR_ERR            0xFFC20148         /* EMAC0 Number of frames aborted due to frame underflow error */</div><div class='add'>+#define EMAC0_TXSNGCOL_G            0xFFC2014C         /* EMAC0 Number of transmitted frames after single collision */</div><div class='add'>+#define EMAC0_TXMULTCOL_G           0xFFC20150         /* EMAC0 Number of transmitted frames with more than one collision */</div><div class='add'>+#define EMAC0_TXDEFERRED            0xFFC20154         /* EMAC0 Number of transmitted frames after deferral */</div><div class='add'>+#define EMAC0_TXLATECOL             0xFFC20158         /* EMAC0 Number of frames aborted due to late collision error */</div><div class='add'>+#define EMAC0_TXEXCESSCOL           0xFFC2015C         /* EMAC0 Number of aborted frames due to excessive collisions */</div><div class='add'>+#define EMAC0_TXCARR_ERR            0xFFC20160         /* EMAC0 Number of aborted frames due to carrier sense error */</div><div class='add'>+#define EMAC0_TXOCTCNT_G            0xFFC20164         /* EMAC0 Number of bytes transmitted in good frames only */</div><div class='add'>+#define EMAC0_TXFRMCNT_G            0xFFC20168         /* EMAC0 Number of good frames transmitted. */</div><div class='add'>+#define EMAC0_TXEXCESSDEF           0xFFC2016C         /* EMAC0 Number of frames aborted due to excessive deferral */</div><div class='add'>+#define EMAC0_TXPAUSEFRM            0xFFC20170         /* EMAC0 Number of good PAUSE frames transmitted. */</div><div class='add'>+#define EMAC0_TXVLANFRM_G           0xFFC20174         /* EMAC0 Number of VLAN frames transmitted */</div><div class='add'>+#define EMAC0_RXFRMCNT_GB           0xFFC20180         /* EMAC0 Number of good and bad frames received. */</div><div class='add'>+#define EMAC0_RXOCTCNT_GB           0xFFC20184         /* EMAC0 Number of bytes received in good and bad frames */</div><div class='add'>+#define EMAC0_RXOCTCNT_G            0xFFC20188         /* EMAC0 Number of bytes received only in good frames */</div><div class='add'>+#define EMAC0_RXBCASTFRM_G          0xFFC2018C         /* EMAC0 Number of good broadcast frames received. */</div><div class='add'>+#define EMAC0_RXMCASTFRM_G          0xFFC20190         /* EMAC0 Number of good multicast frames received */</div><div class='add'>+#define EMAC0_RXCRC_ERR             0xFFC20194         /* EMAC0 Number of frames received with CRC error */</div><div class='add'>+#define EMAC0_RXALIGN_ERR           0xFFC20198         /* EMAC0 Number of frames with alignment error */</div><div class='add'>+#define EMAC0_RXRUNT_ERR            0xFFC2019C         /* EMAC0 Number of frames received with runt error. */</div><div class='add'>+#define EMAC0_RXJAB_ERR             0xFFC201A0         /* EMAC0 Number of frames received with length greater than 1518 */</div><div class='add'>+#define EMAC0_RXUSIZE_G             0xFFC201A4         /* EMAC0 Number of frames received with length 64 */</div><div class='add'>+#define EMAC0_RXOSIZE_G             0xFFC201A8         /* EMAC0 Number of frames received with length greater than maxium */</div><div class='add'>+#define EMAC0_RX64_GB               0xFFC201AC         /* EMAC0 Number of good and bad frames of lengh 64 bytes */</div><div class='add'>+#define EMAC0_RX65TO127_GB          0xFFC201B0         /* EMAC0 Number of good and bad frame between 64-127(inclusive) */</div><div class='add'>+#define EMAC0_RX128TO255_GB         0xFFC201B4         /* EMAC0 Number of good and bad frames received with length between 128 and 255 (inclusive) bytes, exclusive of preamble. */</div><div class='add'>+#define EMAC0_RX256TO511_GB         0xFFC201B8         /* EMAC0 Number of good and bad frames between 256-511(inclusive) */</div><div class='add'>+#define EMAC0_RX512TO1023_GB        0xFFC201BC         /* EMAC0 Number of good and bad frames received between 512-1023 */</div><div class='add'>+#define EMAC0_RX1024TOMAX_GB        0xFFC201C0         /* EMAC0 Number of frames received between 1024 and maxsize */</div><div class='add'>+#define EMAC0_RXUCASTFRM_G          0xFFC201C4         /* EMAC0 Number of good unicast frames received. */</div><div class='add'>+#define EMAC0_RXLEN_ERR             0xFFC201C8         /* EMAC0 Number of frames received with length error */</div><div class='add'>+#define EMAC0_RXOORTYPE             0xFFC201CC         /* EMAC0 Number of frames with length not equal to valid frame size */</div><div class='add'>+#define EMAC0_RXPAUSEFRM            0xFFC201D0         /* EMAC0 Number of good and valid PAUSE frames received. */</div><div class='add'>+#define EMAC0_RXFIFO_OVF            0xFFC201D4         /* EMAC0 Number of missed received frames due to FIFO overflow. This counter is not present in the GMAC-CORE configuration. */</div><div class='add'>+#define EMAC0_RXVLANFRM_GB          0xFFC201D8         /* EMAC0 Number of good and bad VLAN frames received. */</div><div class='add'>+#define EMAC0_RXWDOG_ERR            0xFFC201DC         /* EMAC0 Frames received with error due to watchdog timeout */</div><div class='add'>+#define EMAC0_IPC_RXIMSK            0xFFC20200         /* EMAC0 MMC IPC RX Interrupt Mask Register */</div><div class='add'>+#define EMAC0_IPC_RXINT             0xFFC20208         /* EMAC0 MMC IPC RX Interrupt Register */</div><div class='add'>+#define EMAC0_RXIPV4_GD_FRM         0xFFC20210         /* EMAC0 Number of good IPv4 datagrams */</div><div class='add'>+#define EMAC0_RXIPV4_HDR_ERR_FRM    0xFFC20214         /* EMAC0 Number of IPv4 datagrams with header errors */</div><div class='add'>+#define EMAC0_RXIPV4_NOPAY_FRM      0xFFC20218         /* EMAC0 Number of IPv4 datagrams without checksum */</div><div class='add'>+#define EMAC0_RXIPV4_FRAG_FRM       0xFFC2021C         /* EMAC0 Number of good IPv4 datagrams with fragmentation */</div><div class='add'>+#define EMAC0_RXIPV4_UDSBL_FRM      0xFFC20220         /* EMAC0 Number of IPv4 UDP datagrams with disabled checksum */</div><div class='add'>+#define EMAC0_RXIPV6_GD_FRM         0xFFC20224         /* EMAC0 Number of IPv4 datagrams with TCP/UDP/ICMP payloads */</div><div class='add'>+#define EMAC0_RXIPV6_HDR_ERR_FRM    0xFFC20228         /* EMAC0 Number of IPv6 datagrams with header errors */</div><div class='add'>+#define EMAC0_RXIPV6_NOPAY_FRM      0xFFC2022C         /* EMAC0 Number of IPv6 datagrams with no TCP/UDP/ICMP payload */</div><div class='add'>+#define EMAC0_RXUDP_GD_FRM          0xFFC20230         /* EMAC0 Number of good IP datagrames with good UDP payload */</div><div class='add'>+#define EMAC0_RXUDP_ERR_FRM         0xFFC20234         /* EMAC0 Number of good IP datagrams with UDP checksum errors */</div><div class='add'>+#define EMAC0_RXTCP_GD_FRM          0xFFC20238         /* EMAC0 Number of good IP datagrams with a good TCP payload */</div><div class='add'>+#define EMAC0_RXTCP_ERR_FRM         0xFFC2023C         /* EMAC0 Number of good IP datagrams with TCP checksum errors */</div><div class='add'>+#define EMAC0_RXICMP_GD_FRM         0xFFC20240         /* EMAC0 Number of good IP datagrams with a good ICMP payload */</div><div class='add'>+#define EMAC0_RXICMP_ERR_FRM        0xFFC20244         /* EMAC0 Number of good IP datagrams with ICMP checksum errors */</div><div class='add'>+#define EMAC0_RXIPV4_GD_OCT         0xFFC20250         /* EMAC0 Bytes received in IPv4 datagrams including tcp,udp or icmp */</div><div class='add'>+#define EMAC0_RXIPV4_HDR_ERR_OCT    0xFFC20254         /* EMAC0 Bytes received in IPv4 datagrams with header errors */</div><div class='add'>+#define EMAC0_RXIPV4_NOPAY_OCT      0xFFC20258         /* EMAC0 Bytes received in IPv4 datagrams without tcp,udp,icmp load */</div><div class='add'>+#define EMAC0_RXIPV4_FRAG_OCT       0xFFC2025C         /* EMAC0 Bytes received in fragmented IPv4 datagrams */</div><div class='add'>+#define EMAC0_RXIPV4_UDSBL_OCT      0xFFC20260         /* EMAC0 Bytes received in UDP segment with checksum disabled */</div><div class='add'>+#define EMAC0_RXIPV6_GD_OCT         0xFFC20264         /* EMAC0 Bytes received in good IPv6  including tcp,udp or icmp load */</div><div class='add'>+#define EMAC0_RXIPV6_HDR_ERR_OCT    0xFFC20268         /* EMAC0 Number of bytes received in IPv6 with header errors */</div><div class='add'>+#define EMAC0_RXIPV6_NOPAY_OCT      0xFFC2026C         /* EMAC0 Bytes received in IPv6 without tcp,udp or icmp load */</div><div class='add'>+#define EMAC0_RXUDP_GD_OCT          0xFFC20270         /* EMAC0 Number of bytes received in good UDP segments */</div><div class='add'>+#define EMAC0_RXUDP_ERR_OCT         0xFFC20274         /* EMAC0 Number of bytes received in UDP segment with checksum err */</div><div class='add'>+#define EMAC0_RXTCP_GD_OCT          0xFFC20278         /* EMAC0 Number of bytes received in a good TCP segment */</div><div class='add'>+#define EMAC0_RXTCP_ERR_OCT         0xFFC2027C         /* EMAC0 Number of bytes received in TCP segment with checksum err */</div><div class='add'>+#define EMAC0_RXICMP_GD_OCT         0xFFC20280         /* EMAC0 Number of bytes received in a good ICMP segment */</div><div class='add'>+#define EMAC0_RXICMP_ERR_OCT        0xFFC20284         /* EMAC0 Bytes received in an ICMP segment with checksum errors */</div><div class='add'>+#define EMAC0_TM_CTL                0xFFC20700         /* EMAC0 EMAC Time Stamp Control Register */</div><div class='add'>+#define EMAC0_TM_SUBSEC             0xFFC20704         /* EMAC0 EMAC Time Stamp Sub Second Increment */</div><div class='add'>+#define EMAC0_TM_SEC                0xFFC20708         /* EMAC0 EMAC Time Stamp Second Register */</div><div class='add'>+#define EMAC0_TM_NSEC               0xFFC2070C         /* EMAC0 EMAC Time Stamp Nano Second Register */</div><div class='add'>+#define EMAC0_TM_SECUPDT            0xFFC20710         /* EMAC0 EMAC Time Stamp Seconds Update */</div><div class='add'>+#define EMAC0_TM_NSECUPDT           0xFFC20714         /* EMAC0 EMAC Time Stamp Nano Seconds Update */</div><div class='add'>+#define EMAC0_TM_ADDEND             0xFFC20718         /* EMAC0 EMAC Time Stamp Addend Register */</div><div class='add'>+#define EMAC0_TM_TGTM               0xFFC2071C         /* EMAC0 EMAC Time Stamp Target Time Sec. */</div><div class='add'>+#define EMAC0_TM_NTGTM              0xFFC20720         /* EMAC0 EMAC Time Stamp Target Time Nanosec. */</div><div class='add'>+#define EMAC0_TM_HISEC              0xFFC20724         /* EMAC0 EMAC Time Stamp High Second Register */</div><div class='add'>+#define EMAC0_TM_STMPSTAT           0xFFC20728         /* EMAC0 EMAC Time Stamp Status Register */</div><div class='add'>+#define EMAC0_TM_PPSCTL             0xFFC2072C         /* EMAC0 EMAC PPS Control Register */</div><div class='add'>+#define EMAC0_TM_AUXSTMP_NSEC       0xFFC20730         /* EMAC0 EMAC Auxillary Time Stamp Nano Register */</div><div class='add'>+#define EMAC0_TM_AUXSTMP_SEC        0xFFC20734         /* EMAC0 EMAC Auxillary Time Stamp Sec Register */</div><div class='add'>+#define EMAC0_DMA_BUSMODE           0xFFC21000         /* EMAC0 Bus Operating Modes for EMAC DMA */</div><div class='add'>+#define EMAC0_DMA_TXPOLL            0xFFC21004         /* EMAC0 TX DMA Poll demand register */</div><div class='add'>+#define EMAC0_DMA_RXPOLL            0xFFC21008         /* EMAC0 RX DMA Poll demand register */</div><div class='add'>+#define EMAC0_DMA_RXDSC_ADDR        0xFFC2100C         /* EMAC0 RX Descriptor List Address */</div><div class='add'>+#define EMAC0_DMA_TXDSC_ADDR        0xFFC21010         /* EMAC0 TX Descriptor List Address */</div><div class='add'>+#define EMAC0_DMA_STAT              0xFFC21014         /* EMAC0 DMA Status Register */</div><div class='add'>+#define EMAC0_DMA_OPMODE            0xFFC21018         /* EMAC0 DMA Operation Mode Register */</div><div class='add'>+#define EMAC0_DMA_IEN               0xFFC2101C         /* EMAC0 DMA Interrupt Enable Register */</div><div class='add'>+#define EMAC0_DMA_MISS_FRM          0xFFC21020         /* EMAC0 DMA missed frame and buffer overflow counter */</div><div class='add'>+#define EMAC0_DMA_RXIWDOG           0xFFC21024         /* EMAC0 DMA RX Interrupt Watch Dog timer */</div><div class='add'>+#define EMAC0_DMA_BMMODE            0xFFC21028         /* EMAC0 AXI Bus Mode Register */</div><div class='add'>+#define EMAC0_DMA_BMSTAT            0xFFC2102C         /* EMAC0 AXI Status Register */</div><div class='add'>+#define EMAC0_DMA_TXDSC_CUR         0xFFC21048         /* EMAC0 TX current descriptor register */</div><div class='add'>+#define EMAC0_DMA_RXDSC_CUR         0xFFC2104C         /* EMAC0 RX current descriptor register */</div><div class='add'>+#define EMAC0_DMA_TXBUF_CUR         0xFFC21050         /* EMAC0 TX current buffer pointer register */</div><div class='add'>+#define EMAC0_DMA_RXBUF_CUR         0xFFC21054         /* EMAC0 RX current buffer pointer register */</div><div class='add'>+#define EMAC0_HWFEAT                0xFFC21058         /* EMAC0 Hardware Feature Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        EMAC1</div><div class='add'>+   ========================= */</div><div class='add'>+#define EMAC1_MACCFG                0xFFC22000         /* EMAC1 MAC Configuration Register */</div><div class='add'>+#define EMAC1_MACFRMFILT            0xFFC22004         /* EMAC1 Filter Register for filtering Received Frames */</div><div class='add'>+#define EMAC1_HASHTBL_HI            0xFFC22008         /* EMAC1 Contains the Upper 32 bits of the hash table */</div><div class='add'>+#define EMAC1_HASHTBL_LO            0xFFC2200C         /* EMAC1 Contains the lower 32 bits of the hash table */</div><div class='add'>+#define EMAC1_GMII_ADDR             0xFFC22010         /* EMAC1 Management Address Register */</div><div class='add'>+#define EMAC1_GMII_DATA             0xFFC22014         /* EMAC1 Management Data Register */</div><div class='add'>+#define EMAC1_FLOWCTL               0xFFC22018         /* EMAC1 MAC FLow Control Register */</div><div class='add'>+#define EMAC1_VLANTAG               0xFFC2201C         /* EMAC1 VLAN Tag Register */</div><div class='add'>+#define EMAC1_VER                   0xFFC22020         /* EMAC1 EMAC Version Register */</div><div class='add'>+#define EMAC1_DBG                   0xFFC22024         /* EMAC1 EMAC Debug Register */</div><div class='add'>+#define EMAC1_RMTWKUP               0xFFC22028         /* EMAC1 Remote wake up frame register */</div><div class='add'>+#define EMAC1_PMT_CTLSTAT           0xFFC2202C         /* EMAC1 PMT Control and Status Register */</div><div class='add'>+#define EMAC1_ISTAT                 0xFFC22038         /* EMAC1 EMAC Interrupt Status Register */</div><div class='add'>+#define EMAC1_IMSK                  0xFFC2203C         /* EMAC1 EMAC Interrupt Mask Register */</div><div class='add'>+#define EMAC1_ADDR0_HI              0xFFC22040         /* EMAC1 EMAC Address0 High Register */</div><div class='add'>+#define EMAC1_ADDR0_LO              0xFFC22044         /* EMAC1 EMAC Address0 Low Register */</div><div class='add'>+#define EMAC1_MMC_CTL               0xFFC22100         /* EMAC1 MMC Control Register */</div><div class='add'>+#define EMAC1_MMC_RXINT             0xFFC22104         /* EMAC1 MMC RX Interrupt Register */</div><div class='add'>+#define EMAC1_MMC_TXINT             0xFFC22108         /* EMAC1 MMC TX Interrupt Register */</div><div class='add'>+#define EMAC1_MMC_RXIMSK            0xFFC2210C         /* EMAC1 MMC RX Interrupt Mask Register */</div><div class='add'>+#define EMAC1_MMC_TXIMSK            0xFFC22110         /* EMAC1 MMC TX Interrupt Mask Register */</div><div class='add'>+#define EMAC1_TXOCTCNT_GB           0xFFC22114         /* EMAC1 Num bytes transmitted exclusive of preamble */</div><div class='add'>+#define EMAC1_TXFRMCNT_GB           0xFFC22118         /* EMAC1 Num frames transmitted exclusive of retired */</div><div class='add'>+#define EMAC1_TXBCASTFRM_G          0xFFC2211C         /* EMAC1 Number of good broadcast frames transmitted. */</div><div class='add'>+#define EMAC1_TXMCASTFRM_G          0xFFC22120         /* EMAC1 Number of good multicast frames transmitted. */</div><div class='add'>+#define EMAC1_TX64_GB               0xFFC22124         /* EMAC1 Number of 64 byte length frames */</div><div class='add'>+#define EMAC1_TX65TO127_GB          0xFFC22128         /* EMAC1 Number of frames of length b/w 65-127 (inclusive) bytes */</div><div class='add'>+#define EMAC1_TX128TO255_GB         0xFFC2212C         /* EMAC1 Number of frames of length b/w 128-255 (inclusive) bytes */</div><div class='add'>+#define EMAC1_TX256TO511_GB         0xFFC22130         /* EMAC1 Number of frames of length b/w 256-511 (inclusive) bytes */</div><div class='add'>+#define EMAC1_TX512TO1023_GB        0xFFC22134         /* EMAC1 Number of frames of length b/w 512-1023 (inclusive) bytes */</div><div class='add'>+#define EMAC1_TX1024TOMAX_GB        0xFFC22138         /* EMAC1 Number of frames of length b/w 1024-max (inclusive) bytes */</div><div class='add'>+#define EMAC1_TXUCASTFRM_GB         0xFFC2213C         /* EMAC1 Number of good and bad unicast frames transmitted */</div><div class='add'>+#define EMAC1_TXMCASTFRM_GB         0xFFC22140         /* EMAC1 Number of good and bad multicast frames transmitted */</div><div class='add'>+#define EMAC1_TXBCASTFRM_GB         0xFFC22144         /* EMAC1 Number of good and bad broadcast frames transmitted */</div><div class='add'>+#define EMAC1_TXUNDR_ERR            0xFFC22148         /* EMAC1 Number of frames aborted due to frame underflow error */</div><div class='add'>+#define EMAC1_TXSNGCOL_G            0xFFC2214C         /* EMAC1 Number of transmitted frames after single collision */</div><div class='add'>+#define EMAC1_TXMULTCOL_G           0xFFC22150         /* EMAC1 Number of transmitted frames with more than one collision */</div><div class='add'>+#define EMAC1_TXDEFERRED            0xFFC22154         /* EMAC1 Number of transmitted frames after deferral */</div><div class='add'>+#define EMAC1_TXLATECOL             0xFFC22158         /* EMAC1 Number of frames aborted due to late collision error */</div><div class='add'>+#define EMAC1_TXEXCESSCOL           0xFFC2215C         /* EMAC1 Number of aborted frames due to excessive collisions */</div><div class='add'>+#define EMAC1_TXCARR_ERR            0xFFC22160         /* EMAC1 Number of aborted frames due to carrier sense error */</div><div class='add'>+#define EMAC1_TXOCTCNT_G            0xFFC22164         /* EMAC1 Number of bytes transmitted in good frames only */</div><div class='add'>+#define EMAC1_TXFRMCNT_G            0xFFC22168         /* EMAC1 Number of good frames transmitted. */</div><div class='add'>+#define EMAC1_TXEXCESSDEF           0xFFC2216C         /* EMAC1 Number of frames aborted due to excessive deferral */</div><div class='add'>+#define EMAC1_TXPAUSEFRM            0xFFC22170         /* EMAC1 Number of good PAUSE frames transmitted. */</div><div class='add'>+#define EMAC1_TXVLANFRM_G           0xFFC22174         /* EMAC1 Number of VLAN frames transmitted */</div><div class='add'>+#define EMAC1_RXFRMCNT_GB           0xFFC22180         /* EMAC1 Number of good and bad frames received. */</div><div class='add'>+#define EMAC1_RXOCTCNT_GB           0xFFC22184         /* EMAC1 Number of bytes received in good and bad frames */</div><div class='add'>+#define EMAC1_RXOCTCNT_G            0xFFC22188         /* EMAC1 Number of bytes received only in good frames */</div><div class='add'>+#define EMAC1_RXBCASTFRM_G          0xFFC2218C         /* EMAC1 Number of good broadcast frames received. */</div><div class='add'>+#define EMAC1_RXMCASTFRM_G          0xFFC22190         /* EMAC1 Number of good multicast frames received */</div><div class='add'>+#define EMAC1_RXCRC_ERR             0xFFC22194         /* EMAC1 Number of frames received with CRC error */</div><div class='add'>+#define EMAC1_RXALIGN_ERR           0xFFC22198         /* EMAC1 Number of frames with alignment error */</div><div class='add'>+#define EMAC1_RXRUNT_ERR            0xFFC2219C         /* EMAC1 Number of frames received with runt error. */</div><div class='add'>+#define EMAC1_RXJAB_ERR             0xFFC221A0         /* EMAC1 Number of frames received with length greater than 1518 */</div><div class='add'>+#define EMAC1_RXUSIZE_G             0xFFC221A4         /* EMAC1 Number of frames received with length 64 */</div><div class='add'>+#define EMAC1_RXOSIZE_G             0xFFC221A8         /* EMAC1 Number of frames received with length greater than maxium */</div><div class='add'>+#define EMAC1_RX64_GB               0xFFC221AC         /* EMAC1 Number of good and bad frames of lengh 64 bytes */</div><div class='add'>+#define EMAC1_RX65TO127_GB          0xFFC221B0         /* EMAC1 Number of good and bad frame between 64-127(inclusive) */</div><div class='add'>+#define EMAC1_RX128TO255_GB         0xFFC221B4         /* EMAC1 Number of good and bad frames received with length between 128 and 255 (inclusive) bytes, exclusive of preamble. */</div><div class='add'>+#define EMAC1_RX256TO511_GB         0xFFC221B8         /* EMAC1 Number of good and bad frames between 256-511(inclusive) */</div><div class='add'>+#define EMAC1_RX512TO1023_GB        0xFFC221BC         /* EMAC1 Number of good and bad frames received between 512-1023 */</div><div class='add'>+#define EMAC1_RX1024TOMAX_GB        0xFFC221C0         /* EMAC1 Number of frames received between 1024 and maxsize */</div><div class='add'>+#define EMAC1_RXUCASTFRM_G          0xFFC221C4         /* EMAC1 Number of good unicast frames received. */</div><div class='add'>+#define EMAC1_RXLEN_ERR             0xFFC221C8         /* EMAC1 Number of frames received with length error */</div><div class='add'>+#define EMAC1_RXOORTYPE             0xFFC221CC         /* EMAC1 Number of frames with length not equal to valid frame size */</div><div class='add'>+#define EMAC1_RXPAUSEFRM            0xFFC221D0         /* EMAC1 Number of good and valid PAUSE frames received. */</div><div class='add'>+#define EMAC1_RXFIFO_OVF            0xFFC221D4         /* EMAC1 Number of missed received frames due to FIFO overflow. This counter is not present in the GMAC-CORE configuration. */</div><div class='add'>+#define EMAC1_RXVLANFRM_GB          0xFFC221D8         /* EMAC1 Number of good and bad VLAN frames received. */</div><div class='add'>+#define EMAC1_RXWDOG_ERR            0xFFC221DC         /* EMAC1 Frames received with error due to watchdog timeout */</div><div class='add'>+#define EMAC1_IPC_RXIMSK            0xFFC22200         /* EMAC1 MMC IPC RX Interrupt Mask Register */</div><div class='add'>+#define EMAC1_IPC_RXINT             0xFFC22208         /* EMAC1 MMC IPC RX Interrupt Register */</div><div class='add'>+#define EMAC1_RXIPV4_GD_FRM         0xFFC22210         /* EMAC1 Number of good IPv4 datagrams */</div><div class='add'>+#define EMAC1_RXIPV4_HDR_ERR_FRM    0xFFC22214         /* EMAC1 Number of IPv4 datagrams with header errors */</div><div class='add'>+#define EMAC1_RXIPV4_NOPAY_FRM      0xFFC22218         /* EMAC1 Number of IPv4 datagrams without checksum */</div><div class='add'>+#define EMAC1_RXIPV4_FRAG_FRM       0xFFC2221C         /* EMAC1 Number of good IPv4 datagrams with fragmentation */</div><div class='add'>+#define EMAC1_RXIPV4_UDSBL_FRM      0xFFC22220         /* EMAC1 Number of IPv4 UDP datagrams with disabled checksum */</div><div class='add'>+#define EMAC1_RXIPV6_GD_FRM         0xFFC22224         /* EMAC1 Number of IPv4 datagrams with TCP/UDP/ICMP payloads */</div><div class='add'>+#define EMAC1_RXIPV6_HDR_ERR_FRM    0xFFC22228         /* EMAC1 Number of IPv6 datagrams with header errors */</div><div class='add'>+#define EMAC1_RXIPV6_NOPAY_FRM      0xFFC2222C         /* EMAC1 Number of IPv6 datagrams with no TCP/UDP/ICMP payload */</div><div class='add'>+#define EMAC1_RXUDP_GD_FRM          0xFFC22230         /* EMAC1 Number of good IP datagrames with good UDP payload */</div><div class='add'>+#define EMAC1_RXUDP_ERR_FRM         0xFFC22234         /* EMAC1 Number of good IP datagrams with UDP checksum errors */</div><div class='add'>+#define EMAC1_RXTCP_GD_FRM          0xFFC22238         /* EMAC1 Number of good IP datagrams with a good TCP payload */</div><div class='add'>+#define EMAC1_RXTCP_ERR_FRM         0xFFC2223C         /* EMAC1 Number of good IP datagrams with TCP checksum errors */</div><div class='add'>+#define EMAC1_RXICMP_GD_FRM         0xFFC22240         /* EMAC1 Number of good IP datagrams with a good ICMP payload */</div><div class='add'>+#define EMAC1_RXICMP_ERR_FRM        0xFFC22244         /* EMAC1 Number of good IP datagrams with ICMP checksum errors */</div><div class='add'>+#define EMAC1_RXIPV4_GD_OCT         0xFFC22250         /* EMAC1 Bytes received in IPv4 datagrams including tcp,udp or icmp */</div><div class='add'>+#define EMAC1_RXIPV4_HDR_ERR_OCT    0xFFC22254         /* EMAC1 Bytes received in IPv4 datagrams with header errors */</div><div class='add'>+#define EMAC1_RXIPV4_NOPAY_OCT      0xFFC22258         /* EMAC1 Bytes received in IPv4 datagrams without tcp,udp,icmp load */</div><div class='add'>+#define EMAC1_RXIPV4_FRAG_OCT       0xFFC2225C         /* EMAC1 Bytes received in fragmented IPv4 datagrams */</div><div class='add'>+#define EMAC1_RXIPV4_UDSBL_OCT      0xFFC22260         /* EMAC1 Bytes received in UDP segment with checksum disabled */</div><div class='add'>+#define EMAC1_RXIPV6_GD_OCT         0xFFC22264         /* EMAC1 Bytes received in good IPv6  including tcp,udp or icmp load */</div><div class='add'>+#define EMAC1_RXIPV6_HDR_ERR_OCT    0xFFC22268         /* EMAC1 Number of bytes received in IPv6 with header errors */</div><div class='add'>+#define EMAC1_RXIPV6_NOPAY_OCT      0xFFC2226C         /* EMAC1 Bytes received in IPv6 without tcp,udp or icmp load */</div><div class='add'>+#define EMAC1_RXUDP_GD_OCT          0xFFC22270         /* EMAC1 Number of bytes received in good UDP segments */</div><div class='add'>+#define EMAC1_RXUDP_ERR_OCT         0xFFC22274         /* EMAC1 Number of bytes received in UDP segment with checksum err */</div><div class='add'>+#define EMAC1_RXTCP_GD_OCT          0xFFC22278         /* EMAC1 Number of bytes received in a good TCP segment */</div><div class='add'>+#define EMAC1_RXTCP_ERR_OCT         0xFFC2227C         /* EMAC1 Number of bytes received in TCP segment with checksum err */</div><div class='add'>+#define EMAC1_RXICMP_GD_OCT         0xFFC22280         /* EMAC1 Number of bytes received in a good ICMP segment */</div><div class='add'>+#define EMAC1_RXICMP_ERR_OCT        0xFFC22284         /* EMAC1 Bytes received in an ICMP segment with checksum errors */</div><div class='add'>+#define EMAC1_TM_CTL                0xFFC22700         /* EMAC1 EMAC Time Stamp Control Register */</div><div class='add'>+#define EMAC1_TM_SUBSEC             0xFFC22704         /* EMAC1 EMAC Time Stamp Sub Second Increment */</div><div class='add'>+#define EMAC1_TM_SEC                0xFFC22708         /* EMAC1 EMAC Time Stamp Second Register */</div><div class='add'>+#define EMAC1_TM_NSEC               0xFFC2270C         /* EMAC1 EMAC Time Stamp Nano Second Register */</div><div class='add'>+#define EMAC1_TM_SECUPDT            0xFFC22710         /* EMAC1 EMAC Time Stamp Seconds Update */</div><div class='add'>+#define EMAC1_TM_NSECUPDT           0xFFC22714         /* EMAC1 EMAC Time Stamp Nano Seconds Update */</div><div class='add'>+#define EMAC1_TM_ADDEND             0xFFC22718         /* EMAC1 EMAC Time Stamp Addend Register */</div><div class='add'>+#define EMAC1_TM_TGTM               0xFFC2271C         /* EMAC1 EMAC Time Stamp Target Time Sec. */</div><div class='add'>+#define EMAC1_TM_NTGTM              0xFFC22720         /* EMAC1 EMAC Time Stamp Target Time Nanosec. */</div><div class='add'>+#define EMAC1_TM_HISEC              0xFFC22724         /* EMAC1 EMAC Time Stamp High Second Register */</div><div class='add'>+#define EMAC1_TM_STMPSTAT           0xFFC22728         /* EMAC1 EMAC Time Stamp Status Register */</div><div class='add'>+#define EMAC1_TM_PPSCTL             0xFFC2272C         /* EMAC1 EMAC PPS Control Register */</div><div class='add'>+#define EMAC1_TM_AUXSTMP_NSEC       0xFFC22730         /* EMAC1 EMAC Auxillary Time Stamp Nano Register */</div><div class='add'>+#define EMAC1_TM_AUXSTMP_SEC        0xFFC22734         /* EMAC1 EMAC Auxillary Time Stamp Sec Register */</div><div class='add'>+#define EMAC1_DMA_BUSMODE           0xFFC23000         /* EMAC1 Bus Operating Modes for EMAC DMA */</div><div class='add'>+#define EMAC1_DMA_TXPOLL            0xFFC23004         /* EMAC1 TX DMA Poll demand register */</div><div class='add'>+#define EMAC1_DMA_RXPOLL            0xFFC23008         /* EMAC1 RX DMA Poll demand register */</div><div class='add'>+#define EMAC1_DMA_RXDSC_ADDR        0xFFC2300C         /* EMAC1 RX Descriptor List Address */</div><div class='add'>+#define EMAC1_DMA_TXDSC_ADDR        0xFFC23010         /* EMAC1 TX Descriptor List Address */</div><div class='add'>+#define EMAC1_DMA_STAT              0xFFC23014         /* EMAC1 DMA Status Register */</div><div class='add'>+#define EMAC1_DMA_OPMODE            0xFFC23018         /* EMAC1 DMA Operation Mode Register */</div><div class='add'>+#define EMAC1_DMA_IEN               0xFFC2301C         /* EMAC1 DMA Interrupt Enable Register */</div><div class='add'>+#define EMAC1_DMA_MISS_FRM          0xFFC23020         /* EMAC1 DMA missed frame and buffer overflow counter */</div><div class='add'>+#define EMAC1_DMA_RXIWDOG           0xFFC23024         /* EMAC1 DMA RX Interrupt Watch Dog timer */</div><div class='add'>+#define EMAC1_DMA_BMMODE            0xFFC23028         /* EMAC1 AXI Bus Mode Register */</div><div class='add'>+#define EMAC1_DMA_BMSTAT            0xFFC2302C         /* EMAC1 AXI Status Register */</div><div class='add'>+#define EMAC1_DMA_TXDSC_CUR         0xFFC23048         /* EMAC1 TX current descriptor register */</div><div class='add'>+#define EMAC1_DMA_RXDSC_CUR         0xFFC2304C         /* EMAC1 RX current descriptor register */</div><div class='add'>+#define EMAC1_DMA_TXBUF_CUR         0xFFC23050         /* EMAC1 TX current buffer pointer register */</div><div class='add'>+#define EMAC1_DMA_RXBUF_CUR         0xFFC23054         /* EMAC1 RX current buffer pointer register */</div><div class='add'>+#define EMAC1_HWFEAT                0xFFC23058         /* EMAC1 Hardware Feature Register */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        SPI Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        SPI0</div><div class='add'>+   ========================= */</div><div class='add'>+#define SPI0_REGBASE                0xFFC40400</div><div class='add'>+#define SPI0_CTL                    0xFFC40404         /* SPI0 Control Register */</div><div class='add'>+#define SPI0_RXCTL                  0xFFC40408         /* SPI0 RX Control Register */</div><div class='add'>+#define SPI0_TXCTL                  0xFFC4040C         /* SPI0 TX Control Register */</div><div class='add'>+#define SPI0_CLK                    0xFFC40410         /* SPI0 Clock Rate Register */</div><div class='add'>+#define SPI0_DLY                    0xFFC40414         /* SPI0 Delay Register */</div><div class='add'>+#define SPI0_SLVSEL                 0xFFC40418         /* SPI0 Slave Select Register */</div><div class='add'>+#define SPI0_RWC                    0xFFC4041C         /* SPI0 Received Word-Count Register */</div><div class='add'>+#define SPI0_RWCR                   0xFFC40420         /* SPI0 Received Word-Count Reload Register */</div><div class='add'>+#define SPI0_TWC                    0xFFC40424         /* SPI0 Transmitted Word-Count Register */</div><div class='add'>+#define SPI0_TWCR                   0xFFC40428         /* SPI0 Transmitted Word-Count Reload Register */</div><div class='add'>+#define SPI0_IMSK                   0xFFC40430         /* SPI0 Interrupt Mask Register */</div><div class='add'>+#define SPI0_IMSK_CLR               0xFFC40434         /* SPI0 Interrupt Mask Clear Register */</div><div class='add'>+#define SPI0_IMSK_SET               0xFFC40438         /* SPI0 Interrupt Mask Set Register */</div><div class='add'>+#define SPI0_STAT                   0xFFC40440         /* SPI0 Status Register */</div><div class='add'>+#define SPI0_ILAT                   0xFFC40444         /* SPI0 Masked Interrupt Condition Register */</div><div class='add'>+#define SPI0_ILAT_CLR               0xFFC40448         /* SPI0 Masked Interrupt Clear Register */</div><div class='add'>+#define SPI0_RFIFO                  0xFFC40450         /* SPI0 Receive FIFO Data Register */</div><div class='add'>+#define SPI0_TFIFO                  0xFFC40458         /* SPI0 Transmit FIFO Data Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        SPI1</div><div class='add'>+   ========================= */</div><div class='add'>+#define SPI1_REGBASE                0xFFC40500</div><div class='add'>+#define SPI1_CTL                    0xFFC40504         /* SPI1 Control Register */</div><div class='add'>+#define SPI1_RXCTL                  0xFFC40508         /* SPI1 RX Control Register */</div><div class='add'>+#define SPI1_TXCTL                  0xFFC4050C         /* SPI1 TX Control Register */</div><div class='add'>+#define SPI1_CLK                    0xFFC40510         /* SPI1 Clock Rate Register */</div><div class='add'>+#define SPI1_DLY                    0xFFC40514         /* SPI1 Delay Register */</div><div class='add'>+#define SPI1_SLVSEL                 0xFFC40518         /* SPI1 Slave Select Register */</div><div class='add'>+#define SPI1_RWC                    0xFFC4051C         /* SPI1 Received Word-Count Register */</div><div class='add'>+#define SPI1_RWCR                   0xFFC40520         /* SPI1 Received Word-Count Reload Register */</div><div class='add'>+#define SPI1_TWC                    0xFFC40524         /* SPI1 Transmitted Word-Count Register */</div><div class='add'>+#define SPI1_TWCR                   0xFFC40528         /* SPI1 Transmitted Word-Count Reload Register */</div><div class='add'>+#define SPI1_IMSK                   0xFFC40530         /* SPI1 Interrupt Mask Register */</div><div class='add'>+#define SPI1_IMSK_CLR               0xFFC40534         /* SPI1 Interrupt Mask Clear Register */</div><div class='add'>+#define SPI1_IMSK_SET               0xFFC40538         /* SPI1 Interrupt Mask Set Register */</div><div class='add'>+#define SPI1_STAT                   0xFFC40540         /* SPI1 Status Register */</div><div class='add'>+#define SPI1_ILAT                   0xFFC40544         /* SPI1 Masked Interrupt Condition Register */</div><div class='add'>+#define SPI1_ILAT_CLR               0xFFC40548         /* SPI1 Masked Interrupt Clear Register */</div><div class='add'>+#define SPI1_RFIFO                  0xFFC40550         /* SPI1 Receive FIFO Data Register */</div><div class='add'>+#define SPI1_TFIFO                  0xFFC40558         /* SPI1 Transmit FIFO Data Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	SPORT Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	SPORT0</div><div class='add'>+   ========================= */</div><div class='add'>+#define SPORT0_CTL_A                0xFFC40000         /* SPORT0 'A' Control Register */</div><div class='add'>+#define SPORT0_DIV_A                0xFFC40004         /* SPORT0 'A' Clock and FS Divide Register */</div><div class='add'>+#define SPORT0_MCTL_A               0xFFC40008         /* SPORT0 'A' Multichannel Control Register */</div><div class='add'>+#define SPORT0_CS0_A                0xFFC4000C         /* SPORT0 'A' Multichannel Select Register (Channels 0-31) */</div><div class='add'>+#define SPORT0_CS1_A                0xFFC40010         /* SPORT0 'A' Multichannel Select Register (Channels 32-63) */</div><div class='add'>+#define SPORT0_CS2_A                0xFFC40014         /* SPORT0 'A' Multichannel Select Register (Channels 64-95) */</div><div class='add'>+#define SPORT0_CS3_A                0xFFC40018         /* SPORT0 'A' Multichannel Select Register (Channels 96-127) */</div><div class='add'>+#define SPORT0_CNT_A                0xFFC4001C         /* SPORT0 'A' Frame Sync And Clock Divisor Current Count */</div><div class='add'>+#define SPORT0_ERR_A                0xFFC40020         /* SPORT0 'A' Error Register */</div><div class='add'>+#define SPORT0_MSTAT_A              0xFFC40024         /* SPORT0 'A' Multichannel Mode Status Register */</div><div class='add'>+#define SPORT0_CTL2_A               0xFFC40028         /* SPORT0 'A' Control Register 2 */</div><div class='add'>+#define SPORT0_TXPRI_A              0xFFC40040         /* SPORT0 'A' Primary Channel Transmit Buffer Register */</div><div class='add'>+#define SPORT0_RXPRI_A              0xFFC40044         /* SPORT0 'A' Primary Channel Receive Buffer Register */</div><div class='add'>+#define SPORT0_TXSEC_A              0xFFC40048         /* SPORT0 'A' Secondary Channel Transmit Buffer Register */</div><div class='add'>+#define SPORT0_RXSEC_A              0xFFC4004C         /* SPORT0 'A' Secondary Channel Receive Buffer Register */</div><div class='add'>+#define SPORT0_CTL_B                0xFFC40080         /* SPORT0 'B' Control Register */</div><div class='add'>+#define SPORT0_DIV_B                0xFFC40084         /* SPORT0 'B' Clock and FS Divide Register */</div><div class='add'>+#define SPORT0_MCTL_B               0xFFC40088         /* SPORT0 'B' Multichannel Control Register */</div><div class='add'>+#define SPORT0_CS0_B                0xFFC4008C         /* SPORT0 'B' Multichannel Select Register (Channels 0-31) */</div><div class='add'>+#define SPORT0_CS1_B                0xFFC40090         /* SPORT0 'B' Multichannel Select Register (Channels 32-63) */</div><div class='add'>+#define SPORT0_CS2_B                0xFFC40094         /* SPORT0 'B' Multichannel Select Register (Channels 64-95) */</div><div class='add'>+#define SPORT0_CS3_B                0xFFC40098         /* SPORT0 'B' Multichannel Select Register (Channels 96-127) */</div><div class='add'>+#define SPORT0_CNT_B                0xFFC4009C         /* SPORT0 'B' Frame Sync And Clock Divisor Current Count */</div><div class='add'>+#define SPORT0_ERR_B                0xFFC400A0         /* SPORT0 'B' Error Register */</div><div class='add'>+#define SPORT0_MSTAT_B              0xFFC400A4         /* SPORT0 'B' Multichannel Mode Status Register */</div><div class='add'>+#define SPORT0_CTL2_B               0xFFC400A8         /* SPORT0 'B' Control Register 2 */</div><div class='add'>+#define SPORT0_TXPRI_B              0xFFC400C0         /* SPORT0 'B' Primary Channel Transmit Buffer Register */</div><div class='add'>+#define SPORT0_RXPRI_B              0xFFC400C4         /* SPORT0 'B' Primary Channel Receive Buffer Register */</div><div class='add'>+#define SPORT0_TXSEC_B              0xFFC400C8         /* SPORT0 'B' Secondary Channel Transmit Buffer Register */</div><div class='add'>+#define SPORT0_RXSEC_B              0xFFC400CC         /* SPORT0 'B' Secondary Channel Receive Buffer Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	SPORT1</div><div class='add'>+   ========================= */</div><div class='add'>+#define SPORT1_CTL_A                0xFFC40100         /* SPORT1 'A' Control Register */</div><div class='add'>+#define SPORT1_DIV_A                0xFFC40104         /* SPORT1 'A' Clock and FS Divide Register */</div><div class='add'>+#define SPORT1_MCTL_A               0xFFC40108         /* SPORT1 'A' Multichannel Control Register */</div><div class='add'>+#define SPORT1_CS0_A                0xFFC4010C         /* SPORT1 'A' Multichannel Select Register (Channels 0-31) */</div><div class='add'>+#define SPORT1_CS1_A                0xFFC40110         /* SPORT1 'A' Multichannel Select Register (Channels 32-63) */</div><div class='add'>+#define SPORT1_CS2_A                0xFFC40114         /* SPORT1 'A' Multichannel Select Register (Channels 64-95) */</div><div class='add'>+#define SPORT1_CS3_A                0xFFC40118         /* SPORT1 'A' Multichannel Select Register (Channels 96-127) */</div><div class='add'>+#define SPORT1_CNT_A                0xFFC4011C         /* SPORT1 'A' Frame Sync And Clock Divisor Current Count */</div><div class='add'>+#define SPORT1_ERR_A                0xFFC40120         /* SPORT1 'A' Error Register */</div><div class='add'>+#define SPORT1_MSTAT_A              0xFFC40124         /* SPORT1 'A' Multichannel Mode Status Register */</div><div class='add'>+#define SPORT1_CTL2_A               0xFFC40128         /* SPORT1 'A' Control Register 2 */</div><div class='add'>+#define SPORT1_TXPRI_A              0xFFC40140         /* SPORT1 'A' Primary Channel Transmit Buffer Register */</div><div class='add'>+#define SPORT1_RXPRI_A              0xFFC40144         /* SPORT1 'A' Primary Channel Receive Buffer Register */</div><div class='add'>+#define SPORT1_TXSEC_A              0xFFC40148         /* SPORT1 'A' Secondary Channel Transmit Buffer Register */</div><div class='add'>+#define SPORT1_RXSEC_A              0xFFC4014C         /* SPORT1 'A' Secondary Channel Receive Buffer Register */</div><div class='add'>+#define SPORT1_CTL_B                0xFFC40180         /* SPORT1 'B' Control Register */</div><div class='add'>+#define SPORT1_DIV_B                0xFFC40184         /* SPORT1 'B' Clock and FS Divide Register */</div><div class='add'>+#define SPORT1_MCTL_B               0xFFC40188         /* SPORT1 'B' Multichannel Control Register */</div><div class='add'>+#define SPORT1_CS0_B                0xFFC4018C         /* SPORT1 'B' Multichannel Select Register (Channels 0-31) */</div><div class='add'>+#define SPORT1_CS1_B                0xFFC40190         /* SPORT1 'B' Multichannel Select Register (Channels 32-63) */</div><div class='add'>+#define SPORT1_CS2_B                0xFFC40194         /* SPORT1 'B' Multichannel Select Register (Channels 64-95) */</div><div class='add'>+#define SPORT1_CS3_B                0xFFC40198         /* SPORT1 'B' Multichannel Select Register (Channels 96-127) */</div><div class='add'>+#define SPORT1_CNT_B                0xFFC4019C         /* SPORT1 'B' Frame Sync And Clock Divisor Current Count */</div><div class='add'>+#define SPORT1_ERR_B                0xFFC401A0         /* SPORT1 'B' Error Register */</div><div class='add'>+#define SPORT1_MSTAT_B              0xFFC401A4         /* SPORT1 'B' Multichannel Mode Status Register */</div><div class='add'>+#define SPORT1_CTL2_B               0xFFC401A8         /* SPORT1 'B' Control Register 2 */</div><div class='add'>+#define SPORT1_TXPRI_B              0xFFC401C0         /* SPORT1 'B' Primary Channel Transmit Buffer Register */</div><div class='add'>+#define SPORT1_RXPRI_B              0xFFC401C4         /* SPORT1 'B' Primary Channel Receive Buffer Register */</div><div class='add'>+#define SPORT1_TXSEC_B              0xFFC401C8         /* SPORT1 'B' Secondary Channel Transmit Buffer Register */</div><div class='add'>+#define SPORT1_RXSEC_B              0xFFC401CC         /* SPORT1 'B' Secondary Channel Receive Buffer Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	SPORT2</div><div class='add'>+   ========================= */</div><div class='add'>+#define SPORT2_CTL_A                0xFFC40200         /* SPORT2 'A' Control Register */</div><div class='add'>+#define SPORT2_DIV_A                0xFFC40204         /* SPORT2 'A' Clock and FS Divide Register */</div><div class='add'>+#define SPORT2_MCTL_A               0xFFC40208         /* SPORT2 'A' Multichannel Control Register */</div><div class='add'>+#define SPORT2_CS0_A                0xFFC4020C         /* SPORT2 'A' Multichannel Select Register (Channels 0-31) */</div><div class='add'>+#define SPORT2_CS1_A                0xFFC40210         /* SPORT2 'A' Multichannel Select Register (Channels 32-63) */</div><div class='add'>+#define SPORT2_CS2_A                0xFFC40214         /* SPORT2 'A' Multichannel Select Register (Channels 64-95) */</div><div class='add'>+#define SPORT2_CS3_A                0xFFC40218         /* SPORT2 'A' Multichannel Select Register (Channels 96-127) */</div><div class='add'>+#define SPORT2_CNT_A                0xFFC4021C         /* SPORT2 'A' Frame Sync And Clock Divisor Current Count */</div><div class='add'>+#define SPORT2_ERR_A                0xFFC40220         /* SPORT2 'A' Error Register */</div><div class='add'>+#define SPORT2_MSTAT_A              0xFFC40224         /* SPORT2 'A' Multichannel Mode Status Register */</div><div class='add'>+#define SPORT2_CTL2_A               0xFFC40228         /* SPORT2 'A' Control Register 2 */</div><div class='add'>+#define SPORT2_TXPRI_A              0xFFC40240         /* SPORT2 'A' Primary Channel Transmit Buffer Register */</div><div class='add'>+#define SPORT2_RXPRI_A              0xFFC40244         /* SPORT2 'A' Primary Channel Receive Buffer Register */</div><div class='add'>+#define SPORT2_TXSEC_A              0xFFC40248         /* SPORT2 'A' Secondary Channel Transmit Buffer Register */</div><div class='add'>+#define SPORT2_RXSEC_A              0xFFC4024C         /* SPORT2 'A' Secondary Channel Receive Buffer Register */</div><div class='add'>+#define SPORT2_CTL_B                0xFFC40280         /* SPORT2 'B' Control Register */</div><div class='add'>+#define SPORT2_DIV_B                0xFFC40284         /* SPORT2 'B' Clock and FS Divide Register */</div><div class='add'>+#define SPORT2_MCTL_B               0xFFC40288         /* SPORT2 'B' Multichannel Control Register */</div><div class='add'>+#define SPORT2_CS0_B                0xFFC4028C         /* SPORT2 'B' Multichannel Select Register (Channels 0-31) */</div><div class='add'>+#define SPORT2_CS1_B                0xFFC40290         /* SPORT2 'B' Multichannel Select Register (Channels 32-63) */</div><div class='add'>+#define SPORT2_CS2_B                0xFFC40294         /* SPORT2 'B' Multichannel Select Register (Channels 64-95) */</div><div class='add'>+#define SPORT2_CS3_B                0xFFC40298         /* SPORT2 'B' Multichannel Select Register (Channels 96-127) */</div><div class='add'>+#define SPORT2_CNT_B                0xFFC4029C         /* SPORT2 'B' Frame Sync And Clock Divisor Current Count */</div><div class='add'>+#define SPORT2_ERR_B                0xFFC402A0         /* SPORT2 'B' Error Register */</div><div class='add'>+#define SPORT2_MSTAT_B              0xFFC402A4         /* SPORT2 'B' Multichannel Mode Status Register */</div><div class='add'>+#define SPORT2_CTL2_B               0xFFC402A8         /* SPORT2 'B' Control Register 2 */</div><div class='add'>+#define SPORT2_TXPRI_B              0xFFC402C0         /* SPORT2 'B' Primary Channel Transmit Buffer Register */</div><div class='add'>+#define SPORT2_RXPRI_B              0xFFC402C4         /* SPORT2 'B' Primary Channel Receive Buffer Register */</div><div class='add'>+#define SPORT2_TXSEC_B              0xFFC402C8         /* SPORT2 'B' Secondary Channel Transmit Buffer Register */</div><div class='add'>+#define SPORT2_RXSEC_B              0xFFC402CC         /* SPORT2 'B' Secondary Channel Receive Buffer Register */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	EPPI Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	EPPI0</div><div class='add'>+   ========================= */</div><div class='add'>+#define EPPI0_STAT                  0xFFC18000         /* EPPI0 Status Register */</div><div class='add'>+#define EPPI0_HCNT                  0xFFC18004         /* EPPI0 Horizontal Transfer Count Register */</div><div class='add'>+#define EPPI0_HDLY                  0xFFC18008         /* EPPI0 Horizontal Delay Count Register */</div><div class='add'>+#define EPPI0_VCNT                  0xFFC1800C         /* EPPI0 Vertical Transfer Count Register */</div><div class='add'>+#define EPPI0_VDLY                  0xFFC18010         /* EPPI0 Vertical Delay Count Register */</div><div class='add'>+#define EPPI0_FRAME                 0xFFC18014         /* EPPI0 Lines Per Frame Register */</div><div class='add'>+#define EPPI0_LINE                  0xFFC18018         /* EPPI0 Samples Per Line Register */</div><div class='add'>+#define EPPI0_CLKDIV                0xFFC1801C         /* EPPI0 Clock Divide Register */</div><div class='add'>+#define EPPI0_CTL                   0xFFC18020         /* EPPI0 Control Register */</div><div class='add'>+#define EPPI0_FS1_WLHB              0xFFC18024         /* EPPI0 FS1 Width Register / EPPI Horizontal Blanking Samples Per Line Register */</div><div class='add'>+#define EPPI0_FS1_PASPL             0xFFC18028         /* EPPI0 FS1 Period Register / EPPI Active Samples Per Line Register */</div><div class='add'>+#define EPPI0_FS2_WLVB              0xFFC1802C         /* EPPI0 FS2 Width Register / EPPI Lines Of Vertical Blanking Register */</div><div class='add'>+#define EPPI0_FS2_PALPF             0xFFC18030         /* EPPI0 FS2 Period Register / EPPI Active Lines Per Field Register */</div><div class='add'>+#define EPPI0_IMSK                  0xFFC18034         /* EPPI0 Interrupt Mask Register */</div><div class='add'>+#define EPPI0_ODDCLIP               0xFFC1803C         /* EPPI0 Clipping Register for ODD (Chroma) Data */</div><div class='add'>+#define EPPI0_EVENCLIP              0xFFC18040         /* EPPI0 Clipping Register for EVEN (Luma) Data */</div><div class='add'>+#define EPPI0_FS1_DLY               0xFFC18044         /* EPPI0 Frame Sync 1 Delay Value */</div><div class='add'>+#define EPPI0_FS2_DLY               0xFFC18048         /* EPPI0 Frame Sync 2 Delay Value */</div><div class='add'>+#define EPPI0_CTL2                  0xFFC1804C         /* EPPI0 Control Register 2 */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	EPPI1</div><div class='add'>+   ========================= */</div><div class='add'>+#define EPPI1_STAT                  0xFFC18400         /* EPPI1 Status Register */</div><div class='add'>+#define EPPI1_HCNT                  0xFFC18404         /* EPPI1 Horizontal Transfer Count Register */</div><div class='add'>+#define EPPI1_HDLY                  0xFFC18408         /* EPPI1 Horizontal Delay Count Register */</div><div class='add'>+#define EPPI1_VCNT                  0xFFC1840C         /* EPPI1 Vertical Transfer Count Register */</div><div class='add'>+#define EPPI1_VDLY                  0xFFC18410         /* EPPI1 Vertical Delay Count Register */</div><div class='add'>+#define EPPI1_FRAME                 0xFFC18414         /* EPPI1 Lines Per Frame Register */</div><div class='add'>+#define EPPI1_LINE                  0xFFC18418         /* EPPI1 Samples Per Line Register */</div><div class='add'>+#define EPPI1_CLKDIV                0xFFC1841C         /* EPPI1 Clock Divide Register */</div><div class='add'>+#define EPPI1_CTL                   0xFFC18420         /* EPPI1 Control Register */</div><div class='add'>+#define EPPI1_FS1_WLHB              0xFFC18424         /* EPPI1 FS1 Width Register / EPPI Horizontal Blanking Samples Per Line Register */</div><div class='add'>+#define EPPI1_FS1_PASPL             0xFFC18428         /* EPPI1 FS1 Period Register / EPPI Active Samples Per Line Register */</div><div class='add'>+#define EPPI1_FS2_WLVB              0xFFC1842C         /* EPPI1 FS2 Width Register / EPPI Lines Of Vertical Blanking Register */</div><div class='add'>+#define EPPI1_FS2_PALPF             0xFFC18430         /* EPPI1 FS2 Period Register / EPPI Active Lines Per Field Register */</div><div class='add'>+#define EPPI1_IMSK                  0xFFC18434         /* EPPI1 Interrupt Mask Register */</div><div class='add'>+#define EPPI1_ODDCLIP               0xFFC1843C         /* EPPI1 Clipping Register for ODD (Chroma) Data */</div><div class='add'>+#define EPPI1_EVENCLIP              0xFFC18440         /* EPPI1 Clipping Register for EVEN (Luma) Data */</div><div class='add'>+#define EPPI1_FS1_DLY               0xFFC18444         /* EPPI1 Frame Sync 1 Delay Value */</div><div class='add'>+#define EPPI1_FS2_DLY               0xFFC18448         /* EPPI1 Frame Sync 2 Delay Value */</div><div class='add'>+#define EPPI1_CTL2                  0xFFC1844C         /* EPPI1 Control Register 2 */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+	EPPI2</div><div class='add'>+   ========================= */</div><div class='add'>+#define EPPI2_STAT                  0xFFC18800         /* EPPI2 Status Register */</div><div class='add'>+#define EPPI2_HCNT                  0xFFC18804         /* EPPI2 Horizontal Transfer Count Register */</div><div class='add'>+#define EPPI2_HDLY                  0xFFC18808         /* EPPI2 Horizontal Delay Count Register */</div><div class='add'>+#define EPPI2_VCNT                  0xFFC1880C         /* EPPI2 Vertical Transfer Count Register */</div><div class='add'>+#define EPPI2_VDLY                  0xFFC18810         /* EPPI2 Vertical Delay Count Register */</div><div class='add'>+#define EPPI2_FRAME                 0xFFC18814         /* EPPI2 Lines Per Frame Register */</div><div class='add'>+#define EPPI2_LINE                  0xFFC18818         /* EPPI2 Samples Per Line Register */</div><div class='add'>+#define EPPI2_CLKDIV                0xFFC1881C         /* EPPI2 Clock Divide Register */</div><div class='add'>+#define EPPI2_CTL                   0xFFC18820         /* EPPI2 Control Register */</div><div class='add'>+#define EPPI2_FS1_WLHB              0xFFC18824         /* EPPI2 FS1 Width Register / EPPI Horizontal Blanking Samples Per Line Register */</div><div class='add'>+#define EPPI2_FS1_PASPL             0xFFC18828         /* EPPI2 FS1 Period Register / EPPI Active Samples Per Line Register */</div><div class='add'>+#define EPPI2_FS2_WLVB              0xFFC1882C         /* EPPI2 FS2 Width Register / EPPI Lines Of Vertical Blanking Register */</div><div class='add'>+#define EPPI2_FS2_PALPF             0xFFC18830         /* EPPI2 FS2 Period Register / EPPI Active Lines Per Field Register */</div><div class='add'>+#define EPPI2_IMSK                  0xFFC18834         /* EPPI2 Interrupt Mask Register */</div><div class='add'>+#define EPPI2_ODDCLIP               0xFFC1883C         /* EPPI2 Clipping Register for ODD (Chroma) Data */</div><div class='add'>+#define EPPI2_EVENCLIP              0xFFC18840         /* EPPI2 Clipping Register for EVEN (Luma) Data */</div><div class='add'>+#define EPPI2_FS1_DLY               0xFFC18844         /* EPPI2 Frame Sync 1 Delay Value */</div><div class='add'>+#define EPPI2_FS2_DLY               0xFFC18848         /* EPPI2 Frame Sync 2 Delay Value */</div><div class='add'>+#define EPPI2_CTL2                  0xFFC1884C         /* EPPI2 Control Register 2 */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DDE Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA0</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA0_NEXT_DESC_PTR          0xFFC41000         /* DMA0 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA0_START_ADDR             0xFFC41004         /* DMA0 Start Address of Current Buffer */</div><div class='add'>+#define DMA0_CONFIG                 0xFFC41008         /* DMA0 Configuration Register */</div><div class='add'>+#define DMA0_X_COUNT                0xFFC4100C         /* DMA0 Inner Loop Count Start Value */</div><div class='add'>+#define DMA0_X_MODIFY               0xFFC41010         /* DMA0 Inner Loop Address Increment */</div><div class='add'>+#define DMA0_Y_COUNT                0xFFC41014         /* DMA0 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA0_Y_MODIFY               0xFFC41018         /* DMA0 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA0_CURR_DESC_PTR          0xFFC41024         /* DMA0 Current Descriptor Pointer */</div><div class='add'>+#define DMA0_PREV_DESC_PTR          0xFFC41028         /* DMA0 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA0_CURR_ADDR              0xFFC4102C         /* DMA0 Current Address */</div><div class='add'>+#define DMA0_IRQ_STATUS             0xFFC41030         /* DMA0 Status Register */</div><div class='add'>+#define DMA0_CURR_X_COUNT           0xFFC41034         /* DMA0 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA0_CURR_Y_COUNT           0xFFC41038         /* DMA0 Current Row Count (2D only) */</div><div class='add'>+#define DMA0_BWL_COUNT              0xFFC41040         /* DMA0 Bandwidth Limit Count */</div><div class='add'>+#define DMA0_CURR_BWL_COUNT         0xFFC41044         /* DMA0 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA0_BWM_COUNT              0xFFC41048         /* DMA0 Bandwidth Monitor Count */</div><div class='add'>+#define DMA0_CURR_BWM_COUNT         0xFFC4104C         /* DMA0 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA1</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA1_NEXT_DESC_PTR             0xFFC41080         /* DMA1 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA1_START_ADDR              0xFFC41084         /* DMA1 Start Address of Current Buffer */</div><div class='add'>+#define DMA1_CONFIG                    0xFFC41088         /* DMA1 Configuration Register */</div><div class='add'>+#define DMA1_X_COUNT                   0xFFC4108C         /* DMA1 Inner Loop Count Start Value */</div><div class='add'>+#define DMA1_X_MODIFY                   0xFFC41090         /* DMA1 Inner Loop Address Increment */</div><div class='add'>+#define DMA1_Y_COUNT                   0xFFC41094         /* DMA1 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA1_Y_MODIFY                   0xFFC41098         /* DMA1 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA1_CURR_DESC_PTR             0xFFC410A4         /* DMA1 Current Descriptor Pointer */</div><div class='add'>+#define DMA1_PREV_DESC_PTR             0xFFC410A8         /* DMA1 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA1_CURR_ADDR               0xFFC410AC         /* DMA1 Current Address */</div><div class='add'>+#define DMA1_IRQ_STATUS                   0xFFC410B0         /* DMA1 Status Register */</div><div class='add'>+#define DMA1_CURR_X_COUNT               0xFFC410B4         /* DMA1 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA1_CURR_Y_COUNT               0xFFC410B8         /* DMA1 Current Row Count (2D only) */</div><div class='add'>+#define DMA1_BWL_COUNT                 0xFFC410C0         /* DMA1 Bandwidth Limit Count */</div><div class='add'>+#define DMA1_CURR_BWL_COUNT             0xFFC410C4         /* DMA1 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA1_BWM_COUNT                 0xFFC410C8         /* DMA1 Bandwidth Monitor Count */</div><div class='add'>+#define DMA1_CURR_BWM_COUNT             0xFFC410CC         /* DMA1 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA2</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA2_NEXT_DESC_PTR             0xFFC41100         /* DMA2 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA2_START_ADDR              0xFFC41104         /* DMA2 Start Address of Current Buffer */</div><div class='add'>+#define DMA2_CONFIG                    0xFFC41108         /* DMA2 Configuration Register */</div><div class='add'>+#define DMA2_X_COUNT                   0xFFC4110C         /* DMA2 Inner Loop Count Start Value */</div><div class='add'>+#define DMA2_X_MODIFY                   0xFFC41110         /* DMA2 Inner Loop Address Increment */</div><div class='add'>+#define DMA2_Y_COUNT                   0xFFC41114         /* DMA2 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA2_Y_MODIFY                   0xFFC41118         /* DMA2 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA2_CURR_DESC_PTR             0xFFC41124         /* DMA2 Current Descriptor Pointer */</div><div class='add'>+#define DMA2_PREV_DESC_PTR             0xFFC41128         /* DMA2 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA2_CURR_ADDR               0xFFC4112C         /* DMA2 Current Address */</div><div class='add'>+#define DMA2_IRQ_STATUS                   0xFFC41130         /* DMA2 Status Register */</div><div class='add'>+#define DMA2_CURR_X_COUNT               0xFFC41134         /* DMA2 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA2_CURR_Y_COUNT               0xFFC41138         /* DMA2 Current Row Count (2D only) */</div><div class='add'>+#define DMA2_BWL_COUNT                 0xFFC41140         /* DMA2 Bandwidth Limit Count */</div><div class='add'>+#define DMA2_CURR_BWL_COUNT             0xFFC41144         /* DMA2 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA2_BWM_COUNT                 0xFFC41148         /* DMA2 Bandwidth Monitor Count */</div><div class='add'>+#define DMA2_CURR_BWM_COUNT             0xFFC4114C         /* DMA2 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA3</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA3_NEXT_DESC_PTR             0xFFC41180         /* DMA3 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA3_START_ADDR              0xFFC41184         /* DMA3 Start Address of Current Buffer */</div><div class='add'>+#define DMA3_CONFIG                    0xFFC41188         /* DMA3 Configuration Register */</div><div class='add'>+#define DMA3_X_COUNT                   0xFFC4118C         /* DMA3 Inner Loop Count Start Value */</div><div class='add'>+#define DMA3_X_MODIFY                   0xFFC41190         /* DMA3 Inner Loop Address Increment */</div><div class='add'>+#define DMA3_Y_COUNT                   0xFFC41194         /* DMA3 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA3_Y_MODIFY                   0xFFC41198         /* DMA3 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA3_CURR_DESC_PTR             0xFFC411A4         /* DMA3 Current Descriptor Pointer */</div><div class='add'>+#define DMA3_PREV_DESC_PTR             0xFFC411A8         /* DMA3 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA3_CURR_ADDR               0xFFC411AC         /* DMA3 Current Address */</div><div class='add'>+#define DMA3_IRQ_STATUS                   0xFFC411B0         /* DMA3 Status Register */</div><div class='add'>+#define DMA3_CURR_X_COUNT               0xFFC411B4         /* DMA3 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA3_CURR_Y_COUNT               0xFFC411B8         /* DMA3 Current Row Count (2D only) */</div><div class='add'>+#define DMA3_BWL_COUNT                 0xFFC411C0         /* DMA3 Bandwidth Limit Count */</div><div class='add'>+#define DMA3_CURR_BWL_COUNT             0xFFC411C4         /* DMA3 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA3_BWM_COUNT                 0xFFC411C8         /* DMA3 Bandwidth Monitor Count */</div><div class='add'>+#define DMA3_CURR_BWM_COUNT             0xFFC411CC         /* DMA3 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA4</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA4_NEXT_DESC_PTR             0xFFC41200         /* DMA4 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA4_START_ADDR              0xFFC41204         /* DMA4 Start Address of Current Buffer */</div><div class='add'>+#define DMA4_CONFIG                    0xFFC41208         /* DMA4 Configuration Register */</div><div class='add'>+#define DMA4_X_COUNT                   0xFFC4120C         /* DMA4 Inner Loop Count Start Value */</div><div class='add'>+#define DMA4_X_MODIFY                   0xFFC41210         /* DMA4 Inner Loop Address Increment */</div><div class='add'>+#define DMA4_Y_COUNT                   0xFFC41214         /* DMA4 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA4_Y_MODIFY                   0xFFC41218         /* DMA4 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA4_CURR_DESC_PTR             0xFFC41224         /* DMA4 Current Descriptor Pointer */</div><div class='add'>+#define DMA4_PREV_DESC_PTR             0xFFC41228         /* DMA4 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA4_CURR_ADDR               0xFFC4122C         /* DMA4 Current Address */</div><div class='add'>+#define DMA4_IRQ_STATUS                   0xFFC41230         /* DMA4 Status Register */</div><div class='add'>+#define DMA4_CURR_X_COUNT               0xFFC41234         /* DMA4 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA4_CURR_Y_COUNT               0xFFC41238         /* DMA4 Current Row Count (2D only) */</div><div class='add'>+#define DMA4_BWL_COUNT                 0xFFC41240         /* DMA4 Bandwidth Limit Count */</div><div class='add'>+#define DMA4_CURR_BWL_COUNT             0xFFC41244         /* DMA4 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA4_BWM_COUNT                 0xFFC41248         /* DMA4 Bandwidth Monitor Count */</div><div class='add'>+#define DMA4_CURR_BWM_COUNT             0xFFC4124C         /* DMA4 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA5</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA5_NEXT_DESC_PTR             0xFFC41280         /* DMA5 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA5_START_ADDR              0xFFC41284         /* DMA5 Start Address of Current Buffer */</div><div class='add'>+#define DMA5_CONFIG                    0xFFC41288         /* DMA5 Configuration Register */</div><div class='add'>+#define DMA5_X_COUNT                   0xFFC4128C         /* DMA5 Inner Loop Count Start Value */</div><div class='add'>+#define DMA5_X_MODIFY                   0xFFC41290         /* DMA5 Inner Loop Address Increment */</div><div class='add'>+#define DMA5_Y_COUNT                   0xFFC41294         /* DMA5 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA5_Y_MODIFY                   0xFFC41298         /* DMA5 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA5_CURR_DESC_PTR             0xFFC412A4         /* DMA5 Current Descriptor Pointer */</div><div class='add'>+#define DMA5_PREV_DESC_PTR             0xFFC412A8         /* DMA5 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA5_CURR_ADDR               0xFFC412AC         /* DMA5 Current Address */</div><div class='add'>+#define DMA5_IRQ_STATUS                   0xFFC412B0         /* DMA5 Status Register */</div><div class='add'>+#define DMA5_CURR_X_COUNT               0xFFC412B4         /* DMA5 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA5_CURR_Y_COUNT               0xFFC412B8         /* DMA5 Current Row Count (2D only) */</div><div class='add'>+#define DMA5_BWL_COUNT                 0xFFC412C0         /* DMA5 Bandwidth Limit Count */</div><div class='add'>+#define DMA5_CURR_BWL_COUNT             0xFFC412C4         /* DMA5 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA5_BWM_COUNT                 0xFFC412C8         /* DMA5 Bandwidth Monitor Count */</div><div class='add'>+#define DMA5_CURR_BWM_COUNT             0xFFC412CC         /* DMA5 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA6</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA6_NEXT_DESC_PTR             0xFFC41300         /* DMA6 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA6_START_ADDR              0xFFC41304         /* DMA6 Start Address of Current Buffer */</div><div class='add'>+#define DMA6_CONFIG                    0xFFC41308         /* DMA6 Configuration Register */</div><div class='add'>+#define DMA6_X_COUNT                   0xFFC4130C         /* DMA6 Inner Loop Count Start Value */</div><div class='add'>+#define DMA6_X_MODIFY                   0xFFC41310         /* DMA6 Inner Loop Address Increment */</div><div class='add'>+#define DMA6_Y_COUNT                   0xFFC41314         /* DMA6 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA6_Y_MODIFY                   0xFFC41318         /* DMA6 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA6_CURR_DESC_PTR             0xFFC41324         /* DMA6 Current Descriptor Pointer */</div><div class='add'>+#define DMA6_PREV_DESC_PTR             0xFFC41328         /* DMA6 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA6_CURR_ADDR               0xFFC4132C         /* DMA6 Current Address */</div><div class='add'>+#define DMA6_IRQ_STATUS                   0xFFC41330         /* DMA6 Status Register */</div><div class='add'>+#define DMA6_CURR_X_COUNT               0xFFC41334         /* DMA6 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA6_CURR_Y_COUNT               0xFFC41338         /* DMA6 Current Row Count (2D only) */</div><div class='add'>+#define DMA6_BWL_COUNT                 0xFFC41340         /* DMA6 Bandwidth Limit Count */</div><div class='add'>+#define DMA6_CURR_BWL_COUNT             0xFFC41344         /* DMA6 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA6_BWM_COUNT                 0xFFC41348         /* DMA6 Bandwidth Monitor Count */</div><div class='add'>+#define DMA6_CURR_BWM_COUNT             0xFFC4134C         /* DMA6 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA7</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA7_NEXT_DESC_PTR             0xFFC41380         /* DMA7 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA7_START_ADDR              0xFFC41384         /* DMA7 Start Address of Current Buffer */</div><div class='add'>+#define DMA7_CONFIG                    0xFFC41388         /* DMA7 Configuration Register */</div><div class='add'>+#define DMA7_X_COUNT                   0xFFC4138C         /* DMA7 Inner Loop Count Start Value */</div><div class='add'>+#define DMA7_X_MODIFY                   0xFFC41390         /* DMA7 Inner Loop Address Increment */</div><div class='add'>+#define DMA7_Y_COUNT                   0xFFC41394         /* DMA7 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA7_Y_MODIFY                   0xFFC41398         /* DMA7 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA7_CURR_DESC_PTR             0xFFC413A4         /* DMA7 Current Descriptor Pointer */</div><div class='add'>+#define DMA7_PREV_DESC_PTR             0xFFC413A8         /* DMA7 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA7_CURR_ADDR               0xFFC413AC         /* DMA7 Current Address */</div><div class='add'>+#define DMA7_IRQ_STATUS                   0xFFC413B0         /* DMA7 Status Register */</div><div class='add'>+#define DMA7_CURR_X_COUNT               0xFFC413B4         /* DMA7 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA7_CURR_Y_COUNT               0xFFC413B8         /* DMA7 Current Row Count (2D only) */</div><div class='add'>+#define DMA7_BWL_COUNT                 0xFFC413C0         /* DMA7 Bandwidth Limit Count */</div><div class='add'>+#define DMA7_CURR_BWL_COUNT             0xFFC413C4         /* DMA7 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA7_BWM_COUNT                 0xFFC413C8         /* DMA7 Bandwidth Monitor Count */</div><div class='add'>+#define DMA7_CURR_BWM_COUNT             0xFFC413CC         /* DMA7 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA8</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA8_NEXT_DESC_PTR             0xFFC41400         /* DMA8 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA8_START_ADDR              0xFFC41404         /* DMA8 Start Address of Current Buffer */</div><div class='add'>+#define DMA8_CONFIG                    0xFFC41408         /* DMA8 Configuration Register */</div><div class='add'>+#define DMA8_X_COUNT                   0xFFC4140C         /* DMA8 Inner Loop Count Start Value */</div><div class='add'>+#define DMA8_X_MODIFY                   0xFFC41410         /* DMA8 Inner Loop Address Increment */</div><div class='add'>+#define DMA8_Y_COUNT                   0xFFC41414         /* DMA8 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA8_Y_MODIFY                   0xFFC41418         /* DMA8 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA8_CURR_DESC_PTR             0xFFC41424         /* DMA8 Current Descriptor Pointer */</div><div class='add'>+#define DMA8_PREV_DESC_PTR             0xFFC41428         /* DMA8 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA8_CURR_ADDR               0xFFC4142C         /* DMA8 Current Address */</div><div class='add'>+#define DMA8_IRQ_STATUS                   0xFFC41430         /* DMA8 Status Register */</div><div class='add'>+#define DMA8_CURR_X_COUNT               0xFFC41434         /* DMA8 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA8_CURR_Y_COUNT               0xFFC41438         /* DMA8 Current Row Count (2D only) */</div><div class='add'>+#define DMA8_BWL_COUNT                 0xFFC41440         /* DMA8 Bandwidth Limit Count */</div><div class='add'>+#define DMA8_CURR_BWL_COUNT             0xFFC41444         /* DMA8 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA8_BWM_COUNT                 0xFFC41448         /* DMA8 Bandwidth Monitor Count */</div><div class='add'>+#define DMA8_CURR_BWM_COUNT             0xFFC4144C         /* DMA8 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA9</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA9_NEXT_DESC_PTR             0xFFC41480         /* DMA9 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA9_START_ADDR              0xFFC41484         /* DMA9 Start Address of Current Buffer */</div><div class='add'>+#define DMA9_CONFIG                    0xFFC41488         /* DMA9 Configuration Register */</div><div class='add'>+#define DMA9_X_COUNT                   0xFFC4148C         /* DMA9 Inner Loop Count Start Value */</div><div class='add'>+#define DMA9_X_MODIFY                   0xFFC41490         /* DMA9 Inner Loop Address Increment */</div><div class='add'>+#define DMA9_Y_COUNT                   0xFFC41494         /* DMA9 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA9_Y_MODIFY                   0xFFC41498         /* DMA9 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA9_CURR_DESC_PTR             0xFFC414A4         /* DMA9 Current Descriptor Pointer */</div><div class='add'>+#define DMA9_PREV_DESC_PTR             0xFFC414A8         /* DMA9 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA9_CURR_ADDR               0xFFC414AC         /* DMA9 Current Address */</div><div class='add'>+#define DMA9_IRQ_STATUS                   0xFFC414B0         /* DMA9 Status Register */</div><div class='add'>+#define DMA9_CURR_X_COUNT               0xFFC414B4         /* DMA9 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA9_CURR_Y_COUNT               0xFFC414B8         /* DMA9 Current Row Count (2D only) */</div><div class='add'>+#define DMA9_BWL_COUNT                 0xFFC414C0         /* DMA9 Bandwidth Limit Count */</div><div class='add'>+#define DMA9_CURR_BWL_COUNT             0xFFC414C4         /* DMA9 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA9_BWM_COUNT                 0xFFC414C8         /* DMA9 Bandwidth Monitor Count */</div><div class='add'>+#define DMA9_CURR_BWM_COUNT             0xFFC414CC         /* DMA9 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA10</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA10_NEXT_DESC_PTR            0xFFC05000         /* DMA10 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA10_START_ADDR             0xFFC05004         /* DMA10 Start Address of Current Buffer */</div><div class='add'>+#define DMA10_CONFIG                   0xFFC05008         /* DMA10 Configuration Register */</div><div class='add'>+#define DMA10_X_COUNT                  0xFFC0500C         /* DMA10 Inner Loop Count Start Value */</div><div class='add'>+#define DMA10_X_MODIFY                  0xFFC05010         /* DMA10 Inner Loop Address Increment */</div><div class='add'>+#define DMA10_Y_COUNT                  0xFFC05014         /* DMA10 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA10_Y_MODIFY                  0xFFC05018         /* DMA10 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA10_CURR_DESC_PTR            0xFFC05024         /* DMA10 Current Descriptor Pointer */</div><div class='add'>+#define DMA10_PREV_DESC_PTR            0xFFC05028         /* DMA10 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA10_CURR_ADDR              0xFFC0502C         /* DMA10 Current Address */</div><div class='add'>+#define DMA10_IRQ_STATUS                  0xFFC05030         /* DMA10 Status Register */</div><div class='add'>+#define DMA10_CURR_X_COUNT              0xFFC05034         /* DMA10 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA10_CURR_Y_COUNT              0xFFC05038         /* DMA10 Current Row Count (2D only) */</div><div class='add'>+#define DMA10_BWL_COUNT                0xFFC05040         /* DMA10 Bandwidth Limit Count */</div><div class='add'>+#define DMA10_CURR_BWL_COUNT            0xFFC05044         /* DMA10 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA10_BWM_COUNT                0xFFC05048         /* DMA10 Bandwidth Monitor Count */</div><div class='add'>+#define DMA10_CURR_BWM_COUNT            0xFFC0504C         /* DMA10 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA11</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA11_NEXT_DESC_PTR            0xFFC05080         /* DMA11 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA11_START_ADDR             0xFFC05084         /* DMA11 Start Address of Current Buffer */</div><div class='add'>+#define DMA11_CONFIG                   0xFFC05088         /* DMA11 Configuration Register */</div><div class='add'>+#define DMA11_X_COUNT                  0xFFC0508C         /* DMA11 Inner Loop Count Start Value */</div><div class='add'>+#define DMA11_X_MODIFY                  0xFFC05090         /* DMA11 Inner Loop Address Increment */</div><div class='add'>+#define DMA11_Y_COUNT                  0xFFC05094         /* DMA11 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA11_Y_MODIFY                  0xFFC05098         /* DMA11 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA11_CURR_DESC_PTR            0xFFC050A4         /* DMA11 Current Descriptor Pointer */</div><div class='add'>+#define DMA11_PREV_DESC_PTR            0xFFC050A8         /* DMA11 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA11_CURR_ADDR              0xFFC050AC         /* DMA11 Current Address */</div><div class='add'>+#define DMA11_IRQ_STATUS                  0xFFC050B0         /* DMA11 Status Register */</div><div class='add'>+#define DMA11_CURR_X_COUNT              0xFFC050B4         /* DMA11 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA11_CURR_Y_COUNT              0xFFC050B8         /* DMA11 Current Row Count (2D only) */</div><div class='add'>+#define DMA11_BWL_COUNT                0xFFC050C0         /* DMA11 Bandwidth Limit Count */</div><div class='add'>+#define DMA11_CURR_BWL_COUNT            0xFFC050C4         /* DMA11 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA11_BWM_COUNT                0xFFC050C8         /* DMA11 Bandwidth Monitor Count */</div><div class='add'>+#define DMA11_CURR_BWM_COUNT            0xFFC050CC         /* DMA11 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA12</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA12_NEXT_DESC_PTR            0xFFC05100         /* DMA12 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA12_START_ADDR             0xFFC05104         /* DMA12 Start Address of Current Buffer */</div><div class='add'>+#define DMA12_CONFIG                   0xFFC05108         /* DMA12 Configuration Register */</div><div class='add'>+#define DMA12_X_COUNT                  0xFFC0510C         /* DMA12 Inner Loop Count Start Value */</div><div class='add'>+#define DMA12_X_MODIFY                  0xFFC05110         /* DMA12 Inner Loop Address Increment */</div><div class='add'>+#define DMA12_Y_COUNT                  0xFFC05114         /* DMA12 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA12_Y_MODIFY                  0xFFC05118         /* DMA12 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA12_CURR_DESC_PTR            0xFFC05124         /* DMA12 Current Descriptor Pointer */</div><div class='add'>+#define DMA12_PREV_DESC_PTR            0xFFC05128         /* DMA12 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA12_CURR_ADDR              0xFFC0512C         /* DMA12 Current Address */</div><div class='add'>+#define DMA12_IRQ_STATUS                  0xFFC05130         /* DMA12 Status Register */</div><div class='add'>+#define DMA12_CURR_X_COUNT              0xFFC05134         /* DMA12 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA12_CURR_Y_COUNT              0xFFC05138         /* DMA12 Current Row Count (2D only) */</div><div class='add'>+#define DMA12_BWL_COUNT                0xFFC05140         /* DMA12 Bandwidth Limit Count */</div><div class='add'>+#define DMA12_CURR_BWL_COUNT            0xFFC05144         /* DMA12 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA12_BWM_COUNT                0xFFC05148         /* DMA12 Bandwidth Monitor Count */</div><div class='add'>+#define DMA12_CURR_BWM_COUNT            0xFFC0514C         /* DMA12 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA13</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA13_NEXT_DESC_PTR            0xFFC07000         /* DMA13 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA13_START_ADDR             0xFFC07004         /* DMA13 Start Address of Current Buffer */</div><div class='add'>+#define DMA13_CONFIG                   0xFFC07008         /* DMA13 Configuration Register */</div><div class='add'>+#define DMA13_X_COUNT                  0xFFC0700C         /* DMA13 Inner Loop Count Start Value */</div><div class='add'>+#define DMA13_X_MODIFY                  0xFFC07010         /* DMA13 Inner Loop Address Increment */</div><div class='add'>+#define DMA13_Y_COUNT                  0xFFC07014         /* DMA13 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA13_Y_MODIFY                  0xFFC07018         /* DMA13 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA13_CURR_DESC_PTR            0xFFC07024         /* DMA13 Current Descriptor Pointer */</div><div class='add'>+#define DMA13_PREV_DESC_PTR            0xFFC07028         /* DMA13 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA13_CURR_ADDR              0xFFC0702C         /* DMA13 Current Address */</div><div class='add'>+#define DMA13_IRQ_STATUS                  0xFFC07030         /* DMA13 Status Register */</div><div class='add'>+#define DMA13_CURR_X_COUNT              0xFFC07034         /* DMA13 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA13_CURR_Y_COUNT              0xFFC07038         /* DMA13 Current Row Count (2D only) */</div><div class='add'>+#define DMA13_BWL_COUNT                0xFFC07040         /* DMA13 Bandwidth Limit Count */</div><div class='add'>+#define DMA13_CURR_BWL_COUNT            0xFFC07044         /* DMA13 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA13_BWM_COUNT                0xFFC07048         /* DMA13 Bandwidth Monitor Count */</div><div class='add'>+#define DMA13_CURR_BWM_COUNT            0xFFC0704C         /* DMA13 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA14</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA14_NEXT_DESC_PTR            0xFFC07080         /* DMA14 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA14_START_ADDR             0xFFC07084         /* DMA14 Start Address of Current Buffer */</div><div class='add'>+#define DMA14_CONFIG                   0xFFC07088         /* DMA14 Configuration Register */</div><div class='add'>+#define DMA14_X_COUNT                  0xFFC0708C         /* DMA14 Inner Loop Count Start Value */</div><div class='add'>+#define DMA14_X_MODIFY                  0xFFC07090         /* DMA14 Inner Loop Address Increment */</div><div class='add'>+#define DMA14_Y_COUNT                  0xFFC07094         /* DMA14 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA14_Y_MODIFY                  0xFFC07098         /* DMA14 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA14_CURR_DESC_PTR            0xFFC070A4         /* DMA14 Current Descriptor Pointer */</div><div class='add'>+#define DMA14_PREV_DESC_PTR            0xFFC070A8         /* DMA14 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA14_CURR_ADDR              0xFFC070AC         /* DMA14 Current Address */</div><div class='add'>+#define DMA14_IRQ_STATUS                  0xFFC070B0         /* DMA14 Status Register */</div><div class='add'>+#define DMA14_CURR_X_COUNT              0xFFC070B4         /* DMA14 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA14_CURR_Y_COUNT              0xFFC070B8         /* DMA14 Current Row Count (2D only) */</div><div class='add'>+#define DMA14_BWL_COUNT                0xFFC070C0         /* DMA14 Bandwidth Limit Count */</div><div class='add'>+#define DMA14_CURR_BWL_COUNT            0xFFC070C4         /* DMA14 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA14_BWM_COUNT                0xFFC070C8         /* DMA14 Bandwidth Monitor Count */</div><div class='add'>+#define DMA14_CURR_BWM_COUNT            0xFFC070CC         /* DMA14 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA15</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA15_NEXT_DESC_PTR            0xFFC07100         /* DMA15 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA15_START_ADDR             0xFFC07104         /* DMA15 Start Address of Current Buffer */</div><div class='add'>+#define DMA15_CONFIG                   0xFFC07108         /* DMA15 Configuration Register */</div><div class='add'>+#define DMA15_X_COUNT                  0xFFC0710C         /* DMA15 Inner Loop Count Start Value */</div><div class='add'>+#define DMA15_X_MODIFY                  0xFFC07110         /* DMA15 Inner Loop Address Increment */</div><div class='add'>+#define DMA15_Y_COUNT                  0xFFC07114         /* DMA15 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA15_Y_MODIFY                  0xFFC07118         /* DMA15 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA15_CURR_DESC_PTR            0xFFC07124         /* DMA15 Current Descriptor Pointer */</div><div class='add'>+#define DMA15_PREV_DESC_PTR            0xFFC07128         /* DMA15 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA15_CURR_ADDR              0xFFC0712C         /* DMA15 Current Address */</div><div class='add'>+#define DMA15_IRQ_STATUS                  0xFFC07130         /* DMA15 Status Register */</div><div class='add'>+#define DMA15_CURR_X_COUNT              0xFFC07134         /* DMA15 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA15_CURR_Y_COUNT              0xFFC07138         /* DMA15 Current Row Count (2D only) */</div><div class='add'>+#define DMA15_BWL_COUNT                0xFFC07140         /* DMA15 Bandwidth Limit Count */</div><div class='add'>+#define DMA15_CURR_BWL_COUNT            0xFFC07144         /* DMA15 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA15_BWM_COUNT                0xFFC07148         /* DMA15 Bandwidth Monitor Count */</div><div class='add'>+#define DMA15_CURR_BWM_COUNT            0xFFC0714C         /* DMA15 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA16</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA16_NEXT_DESC_PTR            0xFFC07180         /* DMA16 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA16_START_ADDR             0xFFC07184         /* DMA16 Start Address of Current Buffer */</div><div class='add'>+#define DMA16_CONFIG                   0xFFC07188         /* DMA16 Configuration Register */</div><div class='add'>+#define DMA16_X_COUNT                  0xFFC0718C         /* DMA16 Inner Loop Count Start Value */</div><div class='add'>+#define DMA16_X_MODIFY                  0xFFC07190         /* DMA16 Inner Loop Address Increment */</div><div class='add'>+#define DMA16_Y_COUNT                  0xFFC07194         /* DMA16 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA16_Y_MODIFY                  0xFFC07198         /* DMA16 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA16_CURR_DESC_PTR            0xFFC071A4         /* DMA16 Current Descriptor Pointer */</div><div class='add'>+#define DMA16_PREV_DESC_PTR            0xFFC071A8         /* DMA16 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA16_CURR_ADDR              0xFFC071AC         /* DMA16 Current Address */</div><div class='add'>+#define DMA16_IRQ_STATUS                  0xFFC071B0         /* DMA16 Status Register */</div><div class='add'>+#define DMA16_CURR_X_COUNT              0xFFC071B4         /* DMA16 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA16_CURR_Y_COUNT              0xFFC071B8         /* DMA16 Current Row Count (2D only) */</div><div class='add'>+#define DMA16_BWL_COUNT                0xFFC071C0         /* DMA16 Bandwidth Limit Count */</div><div class='add'>+#define DMA16_CURR_BWL_COUNT            0xFFC071C4         /* DMA16 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA16_BWM_COUNT                0xFFC071C8         /* DMA16 Bandwidth Monitor Count */</div><div class='add'>+#define DMA16_CURR_BWM_COUNT            0xFFC071CC         /* DMA16 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA17</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA17_NEXT_DESC_PTR            0xFFC07200         /* DMA17 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA17_START_ADDR             0xFFC07204         /* DMA17 Start Address of Current Buffer */</div><div class='add'>+#define DMA17_CONFIG                   0xFFC07208         /* DMA17 Configuration Register */</div><div class='add'>+#define DMA17_X_COUNT                  0xFFC0720C         /* DMA17 Inner Loop Count Start Value */</div><div class='add'>+#define DMA17_X_MODIFY                  0xFFC07210         /* DMA17 Inner Loop Address Increment */</div><div class='add'>+#define DMA17_Y_COUNT                  0xFFC07214         /* DMA17 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA17_Y_MODIFY                  0xFFC07218         /* DMA17 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA17_CURR_DESC_PTR            0xFFC07224         /* DMA17 Current Descriptor Pointer */</div><div class='add'>+#define DMA17_PREV_DESC_PTR            0xFFC07228         /* DMA17 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA17_CURR_ADDR              0xFFC0722C         /* DMA17 Current Address */</div><div class='add'>+#define DMA17_IRQ_STATUS                  0xFFC07230         /* DMA17 Status Register */</div><div class='add'>+#define DMA17_CURR_X_COUNT              0xFFC07234         /* DMA17 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA17_CURR_Y_COUNT              0xFFC07238         /* DMA17 Current Row Count (2D only) */</div><div class='add'>+#define DMA17_BWL_COUNT                0xFFC07240         /* DMA17 Bandwidth Limit Count */</div><div class='add'>+#define DMA17_CURR_BWL_COUNT            0xFFC07244         /* DMA17 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA17_BWM_COUNT                0xFFC07248         /* DMA17 Bandwidth Monitor Count */</div><div class='add'>+#define DMA17_CURR_BWM_COUNT            0xFFC0724C         /* DMA17 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA18</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA18_NEXT_DESC_PTR            0xFFC07280         /* DMA18 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA18_START_ADDR             0xFFC07284         /* DMA18 Start Address of Current Buffer */</div><div class='add'>+#define DMA18_CONFIG                   0xFFC07288         /* DMA18 Configuration Register */</div><div class='add'>+#define DMA18_X_COUNT                  0xFFC0728C         /* DMA18 Inner Loop Count Start Value */</div><div class='add'>+#define DMA18_X_MODIFY                  0xFFC07290         /* DMA18 Inner Loop Address Increment */</div><div class='add'>+#define DMA18_Y_COUNT                  0xFFC07294         /* DMA18 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA18_Y_MODIFY                  0xFFC07298         /* DMA18 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA18_CURR_DESC_PTR            0xFFC072A4         /* DMA18 Current Descriptor Pointer */</div><div class='add'>+#define DMA18_PREV_DESC_PTR            0xFFC072A8         /* DMA18 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA18_CURR_ADDR              0xFFC072AC         /* DMA18 Current Address */</div><div class='add'>+#define DMA18_IRQ_STATUS                  0xFFC072B0         /* DMA18 Status Register */</div><div class='add'>+#define DMA18_CURR_X_COUNT              0xFFC072B4         /* DMA18 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA18_CURR_Y_COUNT              0xFFC072B8         /* DMA18 Current Row Count (2D only) */</div><div class='add'>+#define DMA18_BWL_COUNT                0xFFC072C0         /* DMA18 Bandwidth Limit Count */</div><div class='add'>+#define DMA18_CURR_BWL_COUNT            0xFFC072C4         /* DMA18 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA18_BWM_COUNT                0xFFC072C8         /* DMA18 Bandwidth Monitor Count */</div><div class='add'>+#define DMA18_CURR_BWM_COUNT            0xFFC072CC         /* DMA18 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA19</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA19_NEXT_DESC_PTR            0xFFC07300         /* DMA19 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA19_START_ADDR             0xFFC07304         /* DMA19 Start Address of Current Buffer */</div><div class='add'>+#define DMA19_CONFIG                   0xFFC07308         /* DMA19 Configuration Register */</div><div class='add'>+#define DMA19_X_COUNT                  0xFFC0730C         /* DMA19 Inner Loop Count Start Value */</div><div class='add'>+#define DMA19_X_MODIFY                  0xFFC07310         /* DMA19 Inner Loop Address Increment */</div><div class='add'>+#define DMA19_Y_COUNT                  0xFFC07314         /* DMA19 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA19_Y_MODIFY                  0xFFC07318         /* DMA19 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA19_CURR_DESC_PTR            0xFFC07324         /* DMA19 Current Descriptor Pointer */</div><div class='add'>+#define DMA19_PREV_DESC_PTR            0xFFC07328         /* DMA19 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA19_CURR_ADDR              0xFFC0732C         /* DMA19 Current Address */</div><div class='add'>+#define DMA19_IRQ_STATUS                  0xFFC07330         /* DMA19 Status Register */</div><div class='add'>+#define DMA19_CURR_X_COUNT              0xFFC07334         /* DMA19 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA19_CURR_Y_COUNT              0xFFC07338         /* DMA19 Current Row Count (2D only) */</div><div class='add'>+#define DMA19_BWL_COUNT                0xFFC07340         /* DMA19 Bandwidth Limit Count */</div><div class='add'>+#define DMA19_CURR_BWL_COUNT            0xFFC07344         /* DMA19 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA19_BWM_COUNT                0xFFC07348         /* DMA19 Bandwidth Monitor Count */</div><div class='add'>+#define DMA19_CURR_BWM_COUNT            0xFFC0734C         /* DMA19 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA20</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA20_NEXT_DESC_PTR            0xFFC07380         /* DMA20 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA20_START_ADDR             0xFFC07384         /* DMA20 Start Address of Current Buffer */</div><div class='add'>+#define DMA20_CONFIG                   0xFFC07388         /* DMA20 Configuration Register */</div><div class='add'>+#define DMA20_X_COUNT                  0xFFC0738C         /* DMA20 Inner Loop Count Start Value */</div><div class='add'>+#define DMA20_X_MODIFY                  0xFFC07390         /* DMA20 Inner Loop Address Increment */</div><div class='add'>+#define DMA20_Y_COUNT                  0xFFC07394         /* DMA20 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA20_Y_MODIFY                  0xFFC07398         /* DMA20 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA20_CURR_DESC_PTR            0xFFC073A4         /* DMA20 Current Descriptor Pointer */</div><div class='add'>+#define DMA20_PREV_DESC_PTR            0xFFC073A8         /* DMA20 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA20_CURR_ADDR              0xFFC073AC         /* DMA20 Current Address */</div><div class='add'>+#define DMA20_IRQ_STATUS                  0xFFC073B0         /* DMA20 Status Register */</div><div class='add'>+#define DMA20_CURR_X_COUNT              0xFFC073B4         /* DMA20 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA20_CURR_Y_COUNT              0xFFC073B8         /* DMA20 Current Row Count (2D only) */</div><div class='add'>+#define DMA20_BWL_COUNT                0xFFC073C0         /* DMA20 Bandwidth Limit Count */</div><div class='add'>+#define DMA20_CURR_BWL_COUNT            0xFFC073C4         /* DMA20 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA20_BWM_COUNT                0xFFC073C8         /* DMA20 Bandwidth Monitor Count */</div><div class='add'>+#define DMA20_CURR_BWM_COUNT            0xFFC073CC         /* DMA20 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA21</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA21_NEXT_DESC_PTR            0xFFC09000         /* DMA21 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA21_START_ADDR             0xFFC09004         /* DMA21 Start Address of Current Buffer */</div><div class='add'>+#define DMA21_CONFIG                   0xFFC09008         /* DMA21 Configuration Register */</div><div class='add'>+#define DMA21_X_COUNT                  0xFFC0900C         /* DMA21 Inner Loop Count Start Value */</div><div class='add'>+#define DMA21_X_MODIFY                  0xFFC09010         /* DMA21 Inner Loop Address Increment */</div><div class='add'>+#define DMA21_Y_COUNT                  0xFFC09014         /* DMA21 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA21_Y_MODIFY                  0xFFC09018         /* DMA21 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA21_CURR_DESC_PTR            0xFFC09024         /* DMA21 Current Descriptor Pointer */</div><div class='add'>+#define DMA21_PREV_DESC_PTR            0xFFC09028         /* DMA21 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA21_CURR_ADDR              0xFFC0902C         /* DMA21 Current Address */</div><div class='add'>+#define DMA21_IRQ_STATUS                  0xFFC09030         /* DMA21 Status Register */</div><div class='add'>+#define DMA21_CURR_X_COUNT              0xFFC09034         /* DMA21 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA21_CURR_Y_COUNT              0xFFC09038         /* DMA21 Current Row Count (2D only) */</div><div class='add'>+#define DMA21_BWL_COUNT                0xFFC09040         /* DMA21 Bandwidth Limit Count */</div><div class='add'>+#define DMA21_CURR_BWL_COUNT            0xFFC09044         /* DMA21 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA21_BWM_COUNT                0xFFC09048         /* DMA21 Bandwidth Monitor Count */</div><div class='add'>+#define DMA21_CURR_BWM_COUNT            0xFFC0904C         /* DMA21 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA22</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA22_NEXT_DESC_PTR            0xFFC09080         /* DMA22 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA22_START_ADDR             0xFFC09084         /* DMA22 Start Address of Current Buffer */</div><div class='add'>+#define DMA22_CONFIG                   0xFFC09088         /* DMA22 Configuration Register */</div><div class='add'>+#define DMA22_X_COUNT                  0xFFC0908C         /* DMA22 Inner Loop Count Start Value */</div><div class='add'>+#define DMA22_X_MODIFY                  0xFFC09090         /* DMA22 Inner Loop Address Increment */</div><div class='add'>+#define DMA22_Y_COUNT                  0xFFC09094         /* DMA22 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA22_Y_MODIFY                  0xFFC09098         /* DMA22 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA22_CURR_DESC_PTR            0xFFC090A4         /* DMA22 Current Descriptor Pointer */</div><div class='add'>+#define DMA22_PREV_DESC_PTR            0xFFC090A8         /* DMA22 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA22_CURR_ADDR              0xFFC090AC         /* DMA22 Current Address */</div><div class='add'>+#define DMA22_IRQ_STATUS                  0xFFC090B0         /* DMA22 Status Register */</div><div class='add'>+#define DMA22_CURR_X_COUNT              0xFFC090B4         /* DMA22 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA22_CURR_Y_COUNT              0xFFC090B8         /* DMA22 Current Row Count (2D only) */</div><div class='add'>+#define DMA22_BWL_COUNT                0xFFC090C0         /* DMA22 Bandwidth Limit Count */</div><div class='add'>+#define DMA22_CURR_BWL_COUNT            0xFFC090C4         /* DMA22 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA22_BWM_COUNT                0xFFC090C8         /* DMA22 Bandwidth Monitor Count */</div><div class='add'>+#define DMA22_CURR_BWM_COUNT            0xFFC090CC         /* DMA22 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA23</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA23_NEXT_DESC_PTR            0xFFC09100         /* DMA23 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA23_START_ADDR             0xFFC09104         /* DMA23 Start Address of Current Buffer */</div><div class='add'>+#define DMA23_CONFIG                   0xFFC09108         /* DMA23 Configuration Register */</div><div class='add'>+#define DMA23_X_COUNT                  0xFFC0910C         /* DMA23 Inner Loop Count Start Value */</div><div class='add'>+#define DMA23_X_MODIFY                  0xFFC09110         /* DMA23 Inner Loop Address Increment */</div><div class='add'>+#define DMA23_Y_COUNT                  0xFFC09114         /* DMA23 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA23_Y_MODIFY                  0xFFC09118         /* DMA23 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA23_CURR_DESC_PTR            0xFFC09124         /* DMA23 Current Descriptor Pointer */</div><div class='add'>+#define DMA23_PREV_DESC_PTR            0xFFC09128         /* DMA23 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA23_CURR_ADDR              0xFFC0912C         /* DMA23 Current Address */</div><div class='add'>+#define DMA23_IRQ_STATUS                  0xFFC09130         /* DMA23 Status Register */</div><div class='add'>+#define DMA23_CURR_X_COUNT              0xFFC09134         /* DMA23 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA23_CURR_Y_COUNT              0xFFC09138         /* DMA23 Current Row Count (2D only) */</div><div class='add'>+#define DMA23_BWL_COUNT                0xFFC09140         /* DMA23 Bandwidth Limit Count */</div><div class='add'>+#define DMA23_CURR_BWL_COUNT            0xFFC09144         /* DMA23 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA23_BWM_COUNT                0xFFC09148         /* DMA23 Bandwidth Monitor Count */</div><div class='add'>+#define DMA23_CURR_BWM_COUNT            0xFFC0914C         /* DMA23 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA24</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA24_NEXT_DESC_PTR            0xFFC09180         /* DMA24 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA24_START_ADDR             0xFFC09184         /* DMA24 Start Address of Current Buffer */</div><div class='add'>+#define DMA24_CONFIG                   0xFFC09188         /* DMA24 Configuration Register */</div><div class='add'>+#define DMA24_X_COUNT                  0xFFC0918C         /* DMA24 Inner Loop Count Start Value */</div><div class='add'>+#define DMA24_X_MODIFY                  0xFFC09190         /* DMA24 Inner Loop Address Increment */</div><div class='add'>+#define DMA24_Y_COUNT                  0xFFC09194         /* DMA24 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA24_Y_MODIFY                  0xFFC09198         /* DMA24 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA24_CURR_DESC_PTR            0xFFC091A4         /* DMA24 Current Descriptor Pointer */</div><div class='add'>+#define DMA24_PREV_DESC_PTR            0xFFC091A8         /* DMA24 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA24_CURR_ADDR              0xFFC091AC         /* DMA24 Current Address */</div><div class='add'>+#define DMA24_IRQ_STATUS                  0xFFC091B0         /* DMA24 Status Register */</div><div class='add'>+#define DMA24_CURR_X_COUNT              0xFFC091B4         /* DMA24 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA24_CURR_Y_COUNT              0xFFC091B8         /* DMA24 Current Row Count (2D only) */</div><div class='add'>+#define DMA24_BWL_COUNT                0xFFC091C0         /* DMA24 Bandwidth Limit Count */</div><div class='add'>+#define DMA24_CURR_BWL_COUNT            0xFFC091C4         /* DMA24 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA24_BWM_COUNT                0xFFC091C8         /* DMA24 Bandwidth Monitor Count */</div><div class='add'>+#define DMA24_CURR_BWM_COUNT            0xFFC091CC         /* DMA24 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA25</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA25_NEXT_DESC_PTR            0xFFC09200         /* DMA25 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA25_START_ADDR             0xFFC09204         /* DMA25 Start Address of Current Buffer */</div><div class='add'>+#define DMA25_CONFIG                   0xFFC09208         /* DMA25 Configuration Register */</div><div class='add'>+#define DMA25_X_COUNT                  0xFFC0920C         /* DMA25 Inner Loop Count Start Value */</div><div class='add'>+#define DMA25_X_MODIFY                  0xFFC09210         /* DMA25 Inner Loop Address Increment */</div><div class='add'>+#define DMA25_Y_COUNT                  0xFFC09214         /* DMA25 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA25_Y_MODIFY                  0xFFC09218         /* DMA25 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA25_CURR_DESC_PTR            0xFFC09224         /* DMA25 Current Descriptor Pointer */</div><div class='add'>+#define DMA25_PREV_DESC_PTR            0xFFC09228         /* DMA25 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA25_CURR_ADDR              0xFFC0922C         /* DMA25 Current Address */</div><div class='add'>+#define DMA25_IRQ_STATUS                  0xFFC09230         /* DMA25 Status Register */</div><div class='add'>+#define DMA25_CURR_X_COUNT              0xFFC09234         /* DMA25 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA25_CURR_Y_COUNT              0xFFC09238         /* DMA25 Current Row Count (2D only) */</div><div class='add'>+#define DMA25_BWL_COUNT                0xFFC09240         /* DMA25 Bandwidth Limit Count */</div><div class='add'>+#define DMA25_CURR_BWL_COUNT            0xFFC09244         /* DMA25 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA25_BWM_COUNT                0xFFC09248         /* DMA25 Bandwidth Monitor Count */</div><div class='add'>+#define DMA25_CURR_BWM_COUNT            0xFFC0924C         /* DMA25 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA26</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA26_NEXT_DESC_PTR            0xFFC09280         /* DMA26 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA26_START_ADDR             0xFFC09284         /* DMA26 Start Address of Current Buffer */</div><div class='add'>+#define DMA26_CONFIG                   0xFFC09288         /* DMA26 Configuration Register */</div><div class='add'>+#define DMA26_X_COUNT                  0xFFC0928C         /* DMA26 Inner Loop Count Start Value */</div><div class='add'>+#define DMA26_X_MODIFY                  0xFFC09290         /* DMA26 Inner Loop Address Increment */</div><div class='add'>+#define DMA26_Y_COUNT                  0xFFC09294         /* DMA26 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA26_Y_MODIFY                  0xFFC09298         /* DMA26 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA26_CURR_DESC_PTR            0xFFC092A4         /* DMA26 Current Descriptor Pointer */</div><div class='add'>+#define DMA26_PREV_DESC_PTR            0xFFC092A8         /* DMA26 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA26_CURR_ADDR              0xFFC092AC         /* DMA26 Current Address */</div><div class='add'>+#define DMA26_IRQ_STATUS                  0xFFC092B0         /* DMA26 Status Register */</div><div class='add'>+#define DMA26_CURR_X_COUNT              0xFFC092B4         /* DMA26 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA26_CURR_Y_COUNT              0xFFC092B8         /* DMA26 Current Row Count (2D only) */</div><div class='add'>+#define DMA26_BWL_COUNT                0xFFC092C0         /* DMA26 Bandwidth Limit Count */</div><div class='add'>+#define DMA26_CURR_BWL_COUNT            0xFFC092C4         /* DMA26 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA26_BWM_COUNT                0xFFC092C8         /* DMA26 Bandwidth Monitor Count */</div><div class='add'>+#define DMA26_CURR_BWM_COUNT            0xFFC092CC         /* DMA26 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA27</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA27_NEXT_DESC_PTR            0xFFC09300         /* DMA27 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA27_START_ADDR             0xFFC09304         /* DMA27 Start Address of Current Buffer */</div><div class='add'>+#define DMA27_CONFIG                   0xFFC09308         /* DMA27 Configuration Register */</div><div class='add'>+#define DMA27_X_COUNT                  0xFFC0930C         /* DMA27 Inner Loop Count Start Value */</div><div class='add'>+#define DMA27_X_MODIFY                  0xFFC09310         /* DMA27 Inner Loop Address Increment */</div><div class='add'>+#define DMA27_Y_COUNT                  0xFFC09314         /* DMA27 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA27_Y_MODIFY                  0xFFC09318         /* DMA27 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA27_CURR_DESC_PTR            0xFFC09324         /* DMA27 Current Descriptor Pointer */</div><div class='add'>+#define DMA27_PREV_DESC_PTR            0xFFC09328         /* DMA27 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA27_CURR_ADDR              0xFFC0932C         /* DMA27 Current Address */</div><div class='add'>+#define DMA27_IRQ_STATUS                  0xFFC09330         /* DMA27 Status Register */</div><div class='add'>+#define DMA27_CURR_X_COUNT              0xFFC09334         /* DMA27 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA27_CURR_Y_COUNT              0xFFC09338         /* DMA27 Current Row Count (2D only) */</div><div class='add'>+#define DMA27_BWL_COUNT                0xFFC09340         /* DMA27 Bandwidth Limit Count */</div><div class='add'>+#define DMA27_CURR_BWL_COUNT            0xFFC09344         /* DMA27 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA27_BWM_COUNT                0xFFC09348         /* DMA27 Bandwidth Monitor Count */</div><div class='add'>+#define DMA27_CURR_BWM_COUNT            0xFFC0934C         /* DMA27 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA28</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA28_NEXT_DESC_PTR            0xFFC09380         /* DMA28 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA28_START_ADDR             0xFFC09384         /* DMA28 Start Address of Current Buffer */</div><div class='add'>+#define DMA28_CONFIG                   0xFFC09388         /* DMA28 Configuration Register */</div><div class='add'>+#define DMA28_X_COUNT                  0xFFC0938C         /* DMA28 Inner Loop Count Start Value */</div><div class='add'>+#define DMA28_X_MODIFY                  0xFFC09390         /* DMA28 Inner Loop Address Increment */</div><div class='add'>+#define DMA28_Y_COUNT                  0xFFC09394         /* DMA28 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA28_Y_MODIFY                  0xFFC09398         /* DMA28 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA28_CURR_DESC_PTR            0xFFC093A4         /* DMA28 Current Descriptor Pointer */</div><div class='add'>+#define DMA28_PREV_DESC_PTR            0xFFC093A8         /* DMA28 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA28_CURR_ADDR              0xFFC093AC         /* DMA28 Current Address */</div><div class='add'>+#define DMA28_IRQ_STATUS                  0xFFC093B0         /* DMA28 Status Register */</div><div class='add'>+#define DMA28_CURR_X_COUNT              0xFFC093B4         /* DMA28 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA28_CURR_Y_COUNT              0xFFC093B8         /* DMA28 Current Row Count (2D only) */</div><div class='add'>+#define DMA28_BWL_COUNT                0xFFC093C0         /* DMA28 Bandwidth Limit Count */</div><div class='add'>+#define DMA28_CURR_BWL_COUNT            0xFFC093C4         /* DMA28 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA28_BWM_COUNT                0xFFC093C8         /* DMA28 Bandwidth Monitor Count */</div><div class='add'>+#define DMA28_CURR_BWM_COUNT            0xFFC093CC         /* DMA28 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA29</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA29_NEXT_DESC_PTR            0xFFC0B000         /* DMA29 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA29_START_ADDR             0xFFC0B004         /* DMA29 Start Address of Current Buffer */</div><div class='add'>+#define DMA29_CONFIG                   0xFFC0B008         /* DMA29 Configuration Register */</div><div class='add'>+#define DMA29_X_COUNT                  0xFFC0B00C         /* DMA29 Inner Loop Count Start Value */</div><div class='add'>+#define DMA29_X_MODIFY                  0xFFC0B010         /* DMA29 Inner Loop Address Increment */</div><div class='add'>+#define DMA29_Y_COUNT                  0xFFC0B014         /* DMA29 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA29_Y_MODIFY                  0xFFC0B018         /* DMA29 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA29_CURR_DESC_PTR            0xFFC0B024         /* DMA29 Current Descriptor Pointer */</div><div class='add'>+#define DMA29_PREV_DESC_PTR            0xFFC0B028         /* DMA29 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA29_CURR_ADDR              0xFFC0B02C         /* DMA29 Current Address */</div><div class='add'>+#define DMA29_IRQ_STATUS                  0xFFC0B030         /* DMA29 Status Register */</div><div class='add'>+#define DMA29_CURR_X_COUNT              0xFFC0B034         /* DMA29 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA29_CURR_Y_COUNT              0xFFC0B038         /* DMA29 Current Row Count (2D only) */</div><div class='add'>+#define DMA29_BWL_COUNT                0xFFC0B040         /* DMA29 Bandwidth Limit Count */</div><div class='add'>+#define DMA29_CURR_BWL_COUNT            0xFFC0B044         /* DMA29 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA29_BWM_COUNT                0xFFC0B048         /* DMA29 Bandwidth Monitor Count */</div><div class='add'>+#define DMA29_CURR_BWM_COUNT            0xFFC0B04C         /* DMA29 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA30</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA30_NEXT_DESC_PTR            0xFFC0B080         /* DMA30 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA30_START_ADDR             0xFFC0B084         /* DMA30 Start Address of Current Buffer */</div><div class='add'>+#define DMA30_CONFIG                   0xFFC0B088         /* DMA30 Configuration Register */</div><div class='add'>+#define DMA30_X_COUNT                  0xFFC0B08C         /* DMA30 Inner Loop Count Start Value */</div><div class='add'>+#define DMA30_X_MODIFY                  0xFFC0B090         /* DMA30 Inner Loop Address Increment */</div><div class='add'>+#define DMA30_Y_COUNT                  0xFFC0B094         /* DMA30 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA30_Y_MODIFY                  0xFFC0B098         /* DMA30 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA30_CURR_DESC_PTR            0xFFC0B0A4         /* DMA30 Current Descriptor Pointer */</div><div class='add'>+#define DMA30_PREV_DESC_PTR            0xFFC0B0A8         /* DMA30 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA30_CURR_ADDR              0xFFC0B0AC         /* DMA30 Current Address */</div><div class='add'>+#define DMA30_IRQ_STATUS                  0xFFC0B0B0         /* DMA30 Status Register */</div><div class='add'>+#define DMA30_CURR_X_COUNT              0xFFC0B0B4         /* DMA30 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA30_CURR_Y_COUNT              0xFFC0B0B8         /* DMA30 Current Row Count (2D only) */</div><div class='add'>+#define DMA30_BWL_COUNT                0xFFC0B0C0         /* DMA30 Bandwidth Limit Count */</div><div class='add'>+#define DMA30_CURR_BWL_COUNT            0xFFC0B0C4         /* DMA30 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA30_BWM_COUNT                0xFFC0B0C8         /* DMA30 Bandwidth Monitor Count */</div><div class='add'>+#define DMA30_CURR_BWM_COUNT            0xFFC0B0CC         /* DMA30 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA31</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA31_NEXT_DESC_PTR            0xFFC0B100         /* DMA31 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA31_START_ADDR             0xFFC0B104         /* DMA31 Start Address of Current Buffer */</div><div class='add'>+#define DMA31_CONFIG                   0xFFC0B108         /* DMA31 Configuration Register */</div><div class='add'>+#define DMA31_X_COUNT                  0xFFC0B10C         /* DMA31 Inner Loop Count Start Value */</div><div class='add'>+#define DMA31_X_MODIFY                  0xFFC0B110         /* DMA31 Inner Loop Address Increment */</div><div class='add'>+#define DMA31_Y_COUNT                  0xFFC0B114         /* DMA31 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA31_Y_MODIFY                  0xFFC0B118         /* DMA31 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA31_CURR_DESC_PTR            0xFFC0B124         /* DMA31 Current Descriptor Pointer */</div><div class='add'>+#define DMA31_PREV_DESC_PTR            0xFFC0B128         /* DMA31 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA31_CURR_ADDR              0xFFC0B12C         /* DMA31 Current Address */</div><div class='add'>+#define DMA31_IRQ_STATUS                  0xFFC0B130         /* DMA31 Status Register */</div><div class='add'>+#define DMA31_CURR_X_COUNT              0xFFC0B134         /* DMA31 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA31_CURR_Y_COUNT              0xFFC0B138         /* DMA31 Current Row Count (2D only) */</div><div class='add'>+#define DMA31_BWL_COUNT                0xFFC0B140         /* DMA31 Bandwidth Limit Count */</div><div class='add'>+#define DMA31_CURR_BWL_COUNT            0xFFC0B144         /* DMA31 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA31_BWM_COUNT                0xFFC0B148         /* DMA31 Bandwidth Monitor Count */</div><div class='add'>+#define DMA31_CURR_BWM_COUNT            0xFFC0B14C         /* DMA31 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA32</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA32_NEXT_DESC_PTR            0xFFC0B180         /* DMA32 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA32_START_ADDR             0xFFC0B184         /* DMA32 Start Address of Current Buffer */</div><div class='add'>+#define DMA32_CONFIG                   0xFFC0B188         /* DMA32 Configuration Register */</div><div class='add'>+#define DMA32_X_COUNT                  0xFFC0B18C         /* DMA32 Inner Loop Count Start Value */</div><div class='add'>+#define DMA32_X_MODIFY                  0xFFC0B190         /* DMA32 Inner Loop Address Increment */</div><div class='add'>+#define DMA32_Y_COUNT                  0xFFC0B194         /* DMA32 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA32_Y_MODIFY                  0xFFC0B198         /* DMA32 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA32_CURR_DESC_PTR            0xFFC0B1A4         /* DMA32 Current Descriptor Pointer */</div><div class='add'>+#define DMA32_PREV_DESC_PTR            0xFFC0B1A8         /* DMA32 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA32_CURR_ADDR              0xFFC0B1AC         /* DMA32 Current Address */</div><div class='add'>+#define DMA32_IRQ_STATUS                  0xFFC0B1B0         /* DMA32 Status Register */</div><div class='add'>+#define DMA32_CURR_X_COUNT              0xFFC0B1B4         /* DMA32 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA32_CURR_Y_COUNT              0xFFC0B1B8         /* DMA32 Current Row Count (2D only) */</div><div class='add'>+#define DMA32_BWL_COUNT                0xFFC0B1C0         /* DMA32 Bandwidth Limit Count */</div><div class='add'>+#define DMA32_CURR_BWL_COUNT            0xFFC0B1C4         /* DMA32 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA32_BWM_COUNT                0xFFC0B1C8         /* DMA32 Bandwidth Monitor Count */</div><div class='add'>+#define DMA32_CURR_BWM_COUNT            0xFFC0B1CC         /* DMA32 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA33</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA33_NEXT_DESC_PTR            0xFFC0D000         /* DMA33 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA33_START_ADDR             0xFFC0D004         /* DMA33 Start Address of Current Buffer */</div><div class='add'>+#define DMA33_CONFIG                   0xFFC0D008         /* DMA33 Configuration Register */</div><div class='add'>+#define DMA33_X_COUNT                  0xFFC0D00C         /* DMA33 Inner Loop Count Start Value */</div><div class='add'>+#define DMA33_X_MODIFY                  0xFFC0D010         /* DMA33 Inner Loop Address Increment */</div><div class='add'>+#define DMA33_Y_COUNT                  0xFFC0D014         /* DMA33 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA33_Y_MODIFY                  0xFFC0D018         /* DMA33 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA33_CURR_DESC_PTR            0xFFC0D024         /* DMA33 Current Descriptor Pointer */</div><div class='add'>+#define DMA33_PREV_DESC_PTR            0xFFC0D028         /* DMA33 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA33_CURR_ADDR              0xFFC0D02C         /* DMA33 Current Address */</div><div class='add'>+#define DMA33_IRQ_STATUS                  0xFFC0D030         /* DMA33 Status Register */</div><div class='add'>+#define DMA33_CURR_X_COUNT              0xFFC0D034         /* DMA33 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA33_CURR_Y_COUNT              0xFFC0D038         /* DMA33 Current Row Count (2D only) */</div><div class='add'>+#define DMA33_BWL_COUNT                0xFFC0D040         /* DMA33 Bandwidth Limit Count */</div><div class='add'>+#define DMA33_CURR_BWL_COUNT            0xFFC0D044         /* DMA33 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA33_BWM_COUNT                0xFFC0D048         /* DMA33 Bandwidth Monitor Count */</div><div class='add'>+#define DMA33_CURR_BWM_COUNT            0xFFC0D04C         /* DMA33 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA34</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA34_NEXT_DESC_PTR            0xFFC0D080         /* DMA34 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA34_START_ADDR             0xFFC0D084         /* DMA34 Start Address of Current Buffer */</div><div class='add'>+#define DMA34_CONFIG                   0xFFC0D088         /* DMA34 Configuration Register */</div><div class='add'>+#define DMA34_X_COUNT                  0xFFC0D08C         /* DMA34 Inner Loop Count Start Value */</div><div class='add'>+#define DMA34_X_MODIFY                  0xFFC0D090         /* DMA34 Inner Loop Address Increment */</div><div class='add'>+#define DMA34_Y_COUNT                  0xFFC0D094         /* DMA34 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA34_Y_MODIFY                  0xFFC0D098         /* DMA34 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA34_CURR_DESC_PTR            0xFFC0D0A4         /* DMA34 Current Descriptor Pointer */</div><div class='add'>+#define DMA34_PREV_DESC_PTR            0xFFC0D0A8         /* DMA34 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA34_CURR_ADDR              0xFFC0D0AC         /* DMA34 Current Address */</div><div class='add'>+#define DMA34_IRQ_STATUS                  0xFFC0D0B0         /* DMA34 Status Register */</div><div class='add'>+#define DMA34_CURR_X_COUNT              0xFFC0D0B4         /* DMA34 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA34_CURR_Y_COUNT              0xFFC0D0B8         /* DMA34 Current Row Count (2D only) */</div><div class='add'>+#define DMA34_BWL_COUNT                0xFFC0D0C0         /* DMA34 Bandwidth Limit Count */</div><div class='add'>+#define DMA34_CURR_BWL_COUNT            0xFFC0D0C4         /* DMA34 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA34_BWM_COUNT                0xFFC0D0C8         /* DMA34 Bandwidth Monitor Count */</div><div class='add'>+#define DMA34_CURR_BWM_COUNT            0xFFC0D0CC         /* DMA34 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA35</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA35_NEXT_DESC_PTR            0xFFC10000         /* DMA35 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA35_START_ADDR             0xFFC10004         /* DMA35 Start Address of Current Buffer */</div><div class='add'>+#define DMA35_CONFIG                   0xFFC10008         /* DMA35 Configuration Register */</div><div class='add'>+#define DMA35_X_COUNT                  0xFFC1000C         /* DMA35 Inner Loop Count Start Value */</div><div class='add'>+#define DMA35_X_MODIFY                  0xFFC10010         /* DMA35 Inner Loop Address Increment */</div><div class='add'>+#define DMA35_Y_COUNT                  0xFFC10014         /* DMA35 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA35_Y_MODIFY                  0xFFC10018         /* DMA35 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA35_CURR_DESC_PTR            0xFFC10024         /* DMA35 Current Descriptor Pointer */</div><div class='add'>+#define DMA35_PREV_DESC_PTR            0xFFC10028         /* DMA35 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA35_CURR_ADDR              0xFFC1002C         /* DMA35 Current Address */</div><div class='add'>+#define DMA35_IRQ_STATUS                  0xFFC10030         /* DMA35 Status Register */</div><div class='add'>+#define DMA35_CURR_X_COUNT              0xFFC10034         /* DMA35 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA35_CURR_Y_COUNT              0xFFC10038         /* DMA35 Current Row Count (2D only) */</div><div class='add'>+#define DMA35_BWL_COUNT                0xFFC10040         /* DMA35 Bandwidth Limit Count */</div><div class='add'>+#define DMA35_CURR_BWL_COUNT            0xFFC10044         /* DMA35 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA35_BWM_COUNT                0xFFC10048         /* DMA35 Bandwidth Monitor Count */</div><div class='add'>+#define DMA35_CURR_BWM_COUNT            0xFFC1004C         /* DMA35 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA36</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA36_NEXT_DESC_PTR            0xFFC10080         /* DMA36 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA36_START_ADDR             0xFFC10084         /* DMA36 Start Address of Current Buffer */</div><div class='add'>+#define DMA36_CONFIG                   0xFFC10088         /* DMA36 Configuration Register */</div><div class='add'>+#define DMA36_X_COUNT                  0xFFC1008C         /* DMA36 Inner Loop Count Start Value */</div><div class='add'>+#define DMA36_X_MODIFY                  0xFFC10090         /* DMA36 Inner Loop Address Increment */</div><div class='add'>+#define DMA36_Y_COUNT                  0xFFC10094         /* DMA36 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA36_Y_MODIFY                  0xFFC10098         /* DMA36 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA36_CURR_DESC_PTR            0xFFC100A4         /* DMA36 Current Descriptor Pointer */</div><div class='add'>+#define DMA36_PREV_DESC_PTR            0xFFC100A8         /* DMA36 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA36_CURR_ADDR              0xFFC100AC         /* DMA36 Current Address */</div><div class='add'>+#define DMA36_IRQ_STATUS                  0xFFC100B0         /* DMA36 Status Register */</div><div class='add'>+#define DMA36_CURR_X_COUNT              0xFFC100B4         /* DMA36 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA36_CURR_Y_COUNT              0xFFC100B8         /* DMA36 Current Row Count (2D only) */</div><div class='add'>+#define DMA36_BWL_COUNT                0xFFC100C0         /* DMA36 Bandwidth Limit Count */</div><div class='add'>+#define DMA36_CURR_BWL_COUNT            0xFFC100C4         /* DMA36 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA36_BWM_COUNT                0xFFC100C8         /* DMA36 Bandwidth Monitor Count */</div><div class='add'>+#define DMA36_CURR_BWM_COUNT            0xFFC100CC         /* DMA36 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA37</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA37_NEXT_DESC_PTR            0xFFC10100         /* DMA37 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA37_START_ADDR             0xFFC10104         /* DMA37 Start Address of Current Buffer */</div><div class='add'>+#define DMA37_CONFIG                   0xFFC10108         /* DMA37 Configuration Register */</div><div class='add'>+#define DMA37_X_COUNT                  0xFFC1010C         /* DMA37 Inner Loop Count Start Value */</div><div class='add'>+#define DMA37_X_MODIFY                  0xFFC10110         /* DMA37 Inner Loop Address Increment */</div><div class='add'>+#define DMA37_Y_COUNT                  0xFFC10114         /* DMA37 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA37_Y_MODIFY                  0xFFC10118         /* DMA37 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA37_CURR_DESC_PTR            0xFFC10124         /* DMA37 Current Descriptor Pointer */</div><div class='add'>+#define DMA37_PREV_DESC_PTR            0xFFC10128         /* DMA37 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA37_CURR_ADDR              0xFFC1012C         /* DMA37 Current Address */</div><div class='add'>+#define DMA37_IRQ_STATUS                  0xFFC10130         /* DMA37 Status Register */</div><div class='add'>+#define DMA37_CURR_X_COUNT              0xFFC10134         /* DMA37 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA37_CURR_Y_COUNT              0xFFC10138         /* DMA37 Current Row Count (2D only) */</div><div class='add'>+#define DMA37_BWL_COUNT                0xFFC10140         /* DMA37 Bandwidth Limit Count */</div><div class='add'>+#define DMA37_CURR_BWL_COUNT            0xFFC10144         /* DMA37 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA37_BWM_COUNT                0xFFC10148         /* DMA37 Bandwidth Monitor Count */</div><div class='add'>+#define DMA37_CURR_BWM_COUNT            0xFFC1014C         /* DMA37 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA38</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA38_NEXT_DESC_PTR            0xFFC12000         /* DMA38 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA38_START_ADDR             0xFFC12004         /* DMA38 Start Address of Current Buffer */</div><div class='add'>+#define DMA38_CONFIG                   0xFFC12008         /* DMA38 Configuration Register */</div><div class='add'>+#define DMA38_X_COUNT                  0xFFC1200C         /* DMA38 Inner Loop Count Start Value */</div><div class='add'>+#define DMA38_X_MODIFY                  0xFFC12010         /* DMA38 Inner Loop Address Increment */</div><div class='add'>+#define DMA38_Y_COUNT                  0xFFC12014         /* DMA38 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA38_Y_MODIFY                  0xFFC12018         /* DMA38 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA38_CURR_DESC_PTR            0xFFC12024         /* DMA38 Current Descriptor Pointer */</div><div class='add'>+#define DMA38_PREV_DESC_PTR            0xFFC12028         /* DMA38 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA38_CURR_ADDR              0xFFC1202C         /* DMA38 Current Address */</div><div class='add'>+#define DMA38_IRQ_STATUS                  0xFFC12030         /* DMA38 Status Register */</div><div class='add'>+#define DMA38_CURR_X_COUNT              0xFFC12034         /* DMA38 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA38_CURR_Y_COUNT              0xFFC12038         /* DMA38 Current Row Count (2D only) */</div><div class='add'>+#define DMA38_BWL_COUNT                0xFFC12040         /* DMA38 Bandwidth Limit Count */</div><div class='add'>+#define DMA38_CURR_BWL_COUNT            0xFFC12044         /* DMA38 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA38_BWM_COUNT                0xFFC12048         /* DMA38 Bandwidth Monitor Count */</div><div class='add'>+#define DMA38_CURR_BWM_COUNT            0xFFC1204C         /* DMA38 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA39</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA39_NEXT_DESC_PTR            0xFFC12080         /* DMA39 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA39_START_ADDR             0xFFC12084         /* DMA39 Start Address of Current Buffer */</div><div class='add'>+#define DMA39_CONFIG                   0xFFC12088         /* DMA39 Configuration Register */</div><div class='add'>+#define DMA39_X_COUNT                  0xFFC1208C         /* DMA39 Inner Loop Count Start Value */</div><div class='add'>+#define DMA39_X_MODIFY                  0xFFC12090         /* DMA39 Inner Loop Address Increment */</div><div class='add'>+#define DMA39_Y_COUNT                  0xFFC12094         /* DMA39 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA39_Y_MODIFY                  0xFFC12098         /* DMA39 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA39_CURR_DESC_PTR            0xFFC120A4         /* DMA39 Current Descriptor Pointer */</div><div class='add'>+#define DMA39_PREV_DESC_PTR            0xFFC120A8         /* DMA39 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA39_CURR_ADDR              0xFFC120AC         /* DMA39 Current Address */</div><div class='add'>+#define DMA39_IRQ_STATUS                  0xFFC120B0         /* DMA39 Status Register */</div><div class='add'>+#define DMA39_CURR_X_COUNT              0xFFC120B4         /* DMA39 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA39_CURR_Y_COUNT              0xFFC120B8         /* DMA39 Current Row Count (2D only) */</div><div class='add'>+#define DMA39_BWL_COUNT                0xFFC120C0         /* DMA39 Bandwidth Limit Count */</div><div class='add'>+#define DMA39_CURR_BWL_COUNT            0xFFC120C4         /* DMA39 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA39_BWM_COUNT                0xFFC120C8         /* DMA39 Bandwidth Monitor Count */</div><div class='add'>+#define DMA39_CURR_BWM_COUNT            0xFFC120CC         /* DMA39 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA40</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA40_NEXT_DESC_PTR            0xFFC12100         /* DMA40 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA40_START_ADDR             0xFFC12104         /* DMA40 Start Address of Current Buffer */</div><div class='add'>+#define DMA40_CONFIG                   0xFFC12108         /* DMA40 Configuration Register */</div><div class='add'>+#define DMA40_X_COUNT                  0xFFC1210C         /* DMA40 Inner Loop Count Start Value */</div><div class='add'>+#define DMA40_X_MODIFY                  0xFFC12110         /* DMA40 Inner Loop Address Increment */</div><div class='add'>+#define DMA40_Y_COUNT                  0xFFC12114         /* DMA40 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA40_Y_MODIFY                  0xFFC12118         /* DMA40 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA40_CURR_DESC_PTR            0xFFC12124         /* DMA40 Current Descriptor Pointer */</div><div class='add'>+#define DMA40_PREV_DESC_PTR            0xFFC12128         /* DMA40 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA40_CURR_ADDR              0xFFC1212C         /* DMA40 Current Address */</div><div class='add'>+#define DMA40_IRQ_STATUS                  0xFFC12130         /* DMA40 Status Register */</div><div class='add'>+#define DMA40_CURR_X_COUNT              0xFFC12134         /* DMA40 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA40_CURR_Y_COUNT              0xFFC12138         /* DMA40 Current Row Count (2D only) */</div><div class='add'>+#define DMA40_BWL_COUNT                0xFFC12140         /* DMA40 Bandwidth Limit Count */</div><div class='add'>+#define DMA40_CURR_BWL_COUNT            0xFFC12144         /* DMA40 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA40_BWM_COUNT                0xFFC12148         /* DMA40 Bandwidth Monitor Count */</div><div class='add'>+#define DMA40_CURR_BWM_COUNT            0xFFC1214C         /* DMA40 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA41</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA41_NEXT_DESC_PTR            0xFFC12180         /* DMA41 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA41_START_ADDR             0xFFC12184         /* DMA41 Start Address of Current Buffer */</div><div class='add'>+#define DMA41_CONFIG                   0xFFC12188         /* DMA41 Configuration Register */</div><div class='add'>+#define DMA41_X_COUNT                  0xFFC1218C         /* DMA41 Inner Loop Count Start Value */</div><div class='add'>+#define DMA41_X_MODIFY                  0xFFC12190         /* DMA41 Inner Loop Address Increment */</div><div class='add'>+#define DMA41_Y_COUNT                  0xFFC12194         /* DMA41 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA41_Y_MODIFY                  0xFFC12198         /* DMA41 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA41_CURR_DESC_PTR            0xFFC121A4         /* DMA41 Current Descriptor Pointer */</div><div class='add'>+#define DMA41_PREV_DESC_PTR            0xFFC121A8         /* DMA41 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA41_CURR_ADDR              0xFFC121AC         /* DMA41 Current Address */</div><div class='add'>+#define DMA41_IRQ_STATUS                  0xFFC121B0         /* DMA41 Status Register */</div><div class='add'>+#define DMA41_CURR_X_COUNT              0xFFC121B4         /* DMA41 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA41_CURR_Y_COUNT              0xFFC121B8         /* DMA41 Current Row Count (2D only) */</div><div class='add'>+#define DMA41_BWL_COUNT                0xFFC121C0         /* DMA41 Bandwidth Limit Count */</div><div class='add'>+#define DMA41_CURR_BWL_COUNT            0xFFC121C4         /* DMA41 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA41_BWM_COUNT                0xFFC121C8         /* DMA41 Bandwidth Monitor Count */</div><div class='add'>+#define DMA41_CURR_BWM_COUNT            0xFFC121CC         /* DMA41 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA42</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA42_NEXT_DESC_PTR            0xFFC14000         /* DMA42 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA42_START_ADDR             0xFFC14004         /* DMA42 Start Address of Current Buffer */</div><div class='add'>+#define DMA42_CONFIG                   0xFFC14008         /* DMA42 Configuration Register */</div><div class='add'>+#define DMA42_X_COUNT                  0xFFC1400C         /* DMA42 Inner Loop Count Start Value */</div><div class='add'>+#define DMA42_X_MODIFY                  0xFFC14010         /* DMA42 Inner Loop Address Increment */</div><div class='add'>+#define DMA42_Y_COUNT                  0xFFC14014         /* DMA42 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA42_Y_MODIFY                  0xFFC14018         /* DMA42 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA42_CURR_DESC_PTR            0xFFC14024         /* DMA42 Current Descriptor Pointer */</div><div class='add'>+#define DMA42_PREV_DESC_PTR            0xFFC14028         /* DMA42 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA42_CURR_ADDR              0xFFC1402C         /* DMA42 Current Address */</div><div class='add'>+#define DMA42_IRQ_STATUS                  0xFFC14030         /* DMA42 Status Register */</div><div class='add'>+#define DMA42_CURR_X_COUNT              0xFFC14034         /* DMA42 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA42_CURR_Y_COUNT              0xFFC14038         /* DMA42 Current Row Count (2D only) */</div><div class='add'>+#define DMA42_BWL_COUNT                0xFFC14040         /* DMA42 Bandwidth Limit Count */</div><div class='add'>+#define DMA42_CURR_BWL_COUNT            0xFFC14044         /* DMA42 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA42_BWM_COUNT                0xFFC14048         /* DMA42 Bandwidth Monitor Count */</div><div class='add'>+#define DMA42_CURR_BWM_COUNT            0xFFC1404C         /* DMA42 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA43</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA43_NEXT_DESC_PTR            0xFFC14080         /* DMA43 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA43_START_ADDR             0xFFC14084         /* DMA43 Start Address of Current Buffer */</div><div class='add'>+#define DMA43_CONFIG                   0xFFC14088         /* DMA43 Configuration Register */</div><div class='add'>+#define DMA43_X_COUNT                  0xFFC1408C         /* DMA43 Inner Loop Count Start Value */</div><div class='add'>+#define DMA43_X_MODIFY                  0xFFC14090         /* DMA43 Inner Loop Address Increment */</div><div class='add'>+#define DMA43_Y_COUNT                  0xFFC14094         /* DMA43 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA43_Y_MODIFY                  0xFFC14098         /* DMA43 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA43_CURR_DESC_PTR            0xFFC140A4         /* DMA43 Current Descriptor Pointer */</div><div class='add'>+#define DMA43_PREV_DESC_PTR            0xFFC140A8         /* DMA43 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA43_CURR_ADDR              0xFFC140AC         /* DMA43 Current Address */</div><div class='add'>+#define DMA43_IRQ_STATUS                  0xFFC140B0         /* DMA43 Status Register */</div><div class='add'>+#define DMA43_CURR_X_COUNT              0xFFC140B4         /* DMA43 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA43_CURR_Y_COUNT              0xFFC140B8         /* DMA43 Current Row Count (2D only) */</div><div class='add'>+#define DMA43_BWL_COUNT                0xFFC140C0         /* DMA43 Bandwidth Limit Count */</div><div class='add'>+#define DMA43_CURR_BWL_COUNT            0xFFC140C4         /* DMA43 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA43_BWM_COUNT                0xFFC140C8         /* DMA43 Bandwidth Monitor Count */</div><div class='add'>+#define DMA43_CURR_BWM_COUNT            0xFFC140CC         /* DMA43 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA44</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA44_NEXT_DESC_PTR            0xFFC14100         /* DMA44 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA44_START_ADDR             0xFFC14104         /* DMA44 Start Address of Current Buffer */</div><div class='add'>+#define DMA44_CONFIG                   0xFFC14108         /* DMA44 Configuration Register */</div><div class='add'>+#define DMA44_X_COUNT                  0xFFC1410C         /* DMA44 Inner Loop Count Start Value */</div><div class='add'>+#define DMA44_X_MODIFY                  0xFFC14110         /* DMA44 Inner Loop Address Increment */</div><div class='add'>+#define DMA44_Y_COUNT                  0xFFC14114         /* DMA44 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA44_Y_MODIFY                  0xFFC14118         /* DMA44 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA44_CURR_DESC_PTR            0xFFC14124         /* DMA44 Current Descriptor Pointer */</div><div class='add'>+#define DMA44_PREV_DESC_PTR            0xFFC14128         /* DMA44 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA44_CURR_ADDR              0xFFC1412C         /* DMA44 Current Address */</div><div class='add'>+#define DMA44_IRQ_STATUS                  0xFFC14130         /* DMA44 Status Register */</div><div class='add'>+#define DMA44_CURR_X_COUNT              0xFFC14134         /* DMA44 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA44_CURR_Y_COUNT              0xFFC14138         /* DMA44 Current Row Count (2D only) */</div><div class='add'>+#define DMA44_BWL_COUNT                0xFFC14140         /* DMA44 Bandwidth Limit Count */</div><div class='add'>+#define DMA44_CURR_BWL_COUNT            0xFFC14144         /* DMA44 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA44_BWM_COUNT                0xFFC14148         /* DMA44 Bandwidth Monitor Count */</div><div class='add'>+#define DMA44_CURR_BWM_COUNT            0xFFC1414C         /* DMA44 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA45</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA45_NEXT_DESC_PTR            0xFFC14180         /* DMA45 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA45_START_ADDR             0xFFC14184         /* DMA45 Start Address of Current Buffer */</div><div class='add'>+#define DMA45_CONFIG                   0xFFC14188         /* DMA45 Configuration Register */</div><div class='add'>+#define DMA45_X_COUNT                  0xFFC1418C         /* DMA45 Inner Loop Count Start Value */</div><div class='add'>+#define DMA45_X_MODIFY                  0xFFC14190         /* DMA45 Inner Loop Address Increment */</div><div class='add'>+#define DMA45_Y_COUNT                  0xFFC14194         /* DMA45 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA45_Y_MODIFY                  0xFFC14198         /* DMA45 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA45_CURR_DESC_PTR            0xFFC141A4         /* DMA45 Current Descriptor Pointer */</div><div class='add'>+#define DMA45_PREV_DESC_PTR            0xFFC141A8         /* DMA45 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA45_CURR_ADDR              0xFFC141AC         /* DMA45 Current Address */</div><div class='add'>+#define DMA45_IRQ_STATUS                  0xFFC141B0         /* DMA45 Status Register */</div><div class='add'>+#define DMA45_CURR_X_COUNT              0xFFC141B4         /* DMA45 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA45_CURR_Y_COUNT              0xFFC141B8         /* DMA45 Current Row Count (2D only) */</div><div class='add'>+#define DMA45_BWL_COUNT                0xFFC141C0         /* DMA45 Bandwidth Limit Count */</div><div class='add'>+#define DMA45_CURR_BWL_COUNT            0xFFC141C4         /* DMA45 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA45_BWM_COUNT                0xFFC141C8         /* DMA45 Bandwidth Monitor Count */</div><div class='add'>+#define DMA45_CURR_BWM_COUNT            0xFFC141CC         /* DMA45 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMA46</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMA46_NEXT_DESC_PTR            0xFFC14200         /* DMA46 Pointer to Next Initial Descriptor */</div><div class='add'>+#define DMA46_START_ADDR             0xFFC14204         /* DMA46 Start Address of Current Buffer */</div><div class='add'>+#define DMA46_CONFIG                   0xFFC14208         /* DMA46 Configuration Register */</div><div class='add'>+#define DMA46_X_COUNT                  0xFFC1420C         /* DMA46 Inner Loop Count Start Value */</div><div class='add'>+#define DMA46_X_MODIFY                  0xFFC14210         /* DMA46 Inner Loop Address Increment */</div><div class='add'>+#define DMA46_Y_COUNT                  0xFFC14214         /* DMA46 Outer Loop Count Start Value (2D only) */</div><div class='add'>+#define DMA46_Y_MODIFY                  0xFFC14218         /* DMA46 Outer Loop Address Increment (2D only) */</div><div class='add'>+#define DMA46_CURR_DESC_PTR            0xFFC14224         /* DMA46 Current Descriptor Pointer */</div><div class='add'>+#define DMA46_PREV_DESC_PTR            0xFFC14228         /* DMA46 Previous Initial Descriptor Pointer */</div><div class='add'>+#define DMA46_CURR_ADDR              0xFFC1422C         /* DMA46 Current Address */</div><div class='add'>+#define DMA46_IRQ_STATUS                  0xFFC14230         /* DMA46 Status Register */</div><div class='add'>+#define DMA46_CURR_X_COUNT              0xFFC14234         /* DMA46 Current Count(1D) or intra-row XCNT (2D) */</div><div class='add'>+#define DMA46_CURR_Y_COUNT              0xFFC14238         /* DMA46 Current Row Count (2D only) */</div><div class='add'>+#define DMA46_BWL_COUNT                0xFFC14240         /* DMA46 Bandwidth Limit Count */</div><div class='add'>+#define DMA46_CURR_BWL_COUNT            0xFFC14244         /* DMA46 Bandwidth Limit Count Current */</div><div class='add'>+#define DMA46_BWM_COUNT                0xFFC14248         /* DMA46 Bandwidth Monitor Count */</div><div class='add'>+#define DMA46_CURR_BWM_COUNT            0xFFC1424C         /* DMA46 Bandwidth Monitor Count Current */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/********************************************************************************</div><div class='add'>+    DMA Alias Definitions</div><div class='add'>+ ********************************************************************************/</div><div class='add'>+#define MDMA0_DEST_CRC0_NEXT_DESC_PTR   (DMA22_NEXT_DESC_PTR)</div><div class='add'>+#define MDMA0_DEST_CRC0_START_ADDR    (DMA22_START_ADDR)</div><div class='add'>+#define MDMA0_DEST_CRC0_CONFIG          (DMA22_CONFIG)</div><div class='add'>+#define MDMA0_DEST_CRC0_X_COUNT         (DMA22_X_COUNT)</div><div class='add'>+#define MDMA0_DEST_CRC0_X_MODIFY         (DMA22_X_MODIFY)</div><div class='add'>+#define MDMA0_DEST_CRC0_Y_COUNT         (DMA22_Y_COUNT)</div><div class='add'>+#define MDMA0_DEST_CRC0_Y_MODIFY         (DMA22_Y_MODIFY)</div><div class='add'>+#define MDMA0_DEST_CRC0_CURR_DESC_PTR   (DMA22_CURR_DESC_PTR)</div><div class='add'>+#define MDMA0_DEST_CRC0_PREV_DESC_PTR   (DMA22_PREV_DESC_PTR)</div><div class='add'>+#define MDMA0_DEST_CRC0_CURR_ADDR     (DMA22_CURR_ADDR)</div><div class='add'>+#define MDMA0_DEST_CRC0_IRQ_STATUS         (DMA22_IRQ_STATUS)</div><div class='add'>+#define MDMA0_DEST_CRC0_CURR_X_COUNT     (DMA22_CURR_X_COUNT)</div><div class='add'>+#define MDMA0_DEST_CRC0_CURR_Y_COUNT     (DMA22_CURR_Y_COUNT)</div><div class='add'>+#define MDMA0_DEST_CRC0_BWL_COUNT       (DMA22_BWL_COUNT)</div><div class='add'>+#define MDMA0_DEST_CRC0_CURR_BWL_COUNT   (DMA22_CURR_BWL_COUNT)</div><div class='add'>+#define MDMA0_DEST_CRC0_BWM_COUNT       (DMA22_BWM_COUNT)</div><div class='add'>+#define MDMA0_DEST_CRC0_CURR_BWM_COUNT   (DMA22_CURR_BWM_COUNT)</div><div class='add'>+#define MDMA0_SRC_CRC0_NEXT_DESC_PTR    (DMA21_NEXT_DESC_PTR)</div><div class='add'>+#define MDMA0_SRC_CRC0_START_ADDR     (DMA21_START_ADDR)</div><div class='add'>+#define MDMA0_SRC_CRC0_CONFIG           (DMA21_CONFIG)</div><div class='add'>+#define MDMA0_SRC_CRC0_X_COUNT          (DMA21_X_COUNT)</div><div class='add'>+#define MDMA0_SRC_CRC0_X_MODIFY          (DMA21_X_MODIFY)</div><div class='add'>+#define MDMA0_SRC_CRC0_Y_COUNT          (DMA21_Y_COUNT)</div><div class='add'>+#define MDMA0_SRC_CRC0_Y_MODIFY          (DMA21_Y_MODIFY)</div><div class='add'>+#define MDMA0_SRC_CRC0_CURR_DESC_PTR    (DMA21_CURR_DESC_PTR)</div><div class='add'>+#define MDMA0_SRC_CRC0_PREV_DESC_PTR    (DMA21_PREV_DESC_PTR)</div><div class='add'>+#define MDMA0_SRC_CRC0_CURR_ADDR      (DMA21_CURR_ADDR)</div><div class='add'>+#define MDMA0_SRC_CRC0_IRQ_STATUS          (DMA21_IRQ_STATUS)</div><div class='add'>+#define MDMA0_SRC_CRC0_CURR_X_COUNT      (DMA21_CURR_X_COUNT)</div><div class='add'>+#define MDMA0_SRC_CRC0_CURR_Y_COUNT      (DMA21_CURR_Y_COUNT)</div><div class='add'>+#define MDMA0_SRC_CRC0_BWL_COUNT        (DMA21_BWL_COUNT)</div><div class='add'>+#define MDMA0_SRC_CRC0_CURR_BWL_COUNT    (DMA21_CURR_BWL_COUNT)</div><div class='add'>+#define MDMA0_SRC_CRC0_BWM_COUNT        (DMA21_BWM_COUNT)</div><div class='add'>+#define MDMA0_SRC_CRC0_CURR_BWM_COUNT    (DMA21_CURR_BWM_COUNT)</div><div class='add'>+#define MDMA1_DEST_CRC1_NEXT_DESC_PTR   (DMA24_NEXT_DESC_PTR)</div><div class='add'>+#define MDMA1_DEST_CRC1_START_ADDR    (DMA24_START_ADDR)</div><div class='add'>+#define MDMA1_DEST_CRC1_CONFIG          (DMA24_CONFIG)</div><div class='add'>+#define MDMA1_DEST_CRC1_X_COUNT         (DMA24_X_COUNT)</div><div class='add'>+#define MDMA1_DEST_CRC1_X_MODIFY         (DMA24_X_MODIFY)</div><div class='add'>+#define MDMA1_DEST_CRC1_Y_COUNT         (DMA24_Y_COUNT)</div><div class='add'>+#define MDMA1_DEST_CRC1_Y_MODIFY         (DMA24_Y_MODIFY)</div><div class='add'>+#define MDMA1_DEST_CRC1_CURR_DESC_PTR   (DMA24_CURR_DESC_PTR)</div><div class='add'>+#define MDMA1_DEST_CRC1_PREV_DESC_PTR   (DMA24_PREV_DESC_PTR)</div><div class='add'>+#define MDMA1_DEST_CRC1_CURR_ADDR     (DMA24_CURR_ADDR)</div><div class='add'>+#define MDMA1_DEST_CRC1_IRQ_STATUS         (DMA24_IRQ_STATUS)</div><div class='add'>+#define MDMA1_DEST_CRC1_CURR_X_COUNT     (DMA24_CURR_X_COUNT)</div><div class='add'>+#define MDMA1_DEST_CRC1_CURR_Y_COUNT     (DMA24_CURR_Y_COUNT)</div><div class='add'>+#define MDMA1_DEST_CRC1_BWL_COUNT       (DMA24_BWL_COUNT)</div><div class='add'>+#define MDMA1_DEST_CRC1_CURR_BWL_COUNT   (DMA24_CURR_BWL_COUNT)</div><div class='add'>+#define MDMA1_DEST_CRC1_BWM_COUNT       (DMA24_BWM_COUNT)</div><div class='add'>+#define MDMA1_DEST_CRC1_CURR_BWM_COUNT   (DMA24_CURR_BWM_COUNT)</div><div class='add'>+#define MDMA1_SRC_CRC1_NEXT_DESC_PTR    (DMA23_NEXT_DESC_PTR)</div><div class='add'>+#define MDMA1_SRC_CRC1_START_ADDR     (DMA23_START_ADDR)</div><div class='add'>+#define MDMA1_SRC_CRC1_CONFIG           (DMA23_CONFIG)</div><div class='add'>+#define MDMA1_SRC_CRC1_X_COUNT          (DMA23_X_COUNT)</div><div class='add'>+#define MDMA1_SRC_CRC1_X_MODIFY          (DMA23_X_MODIFY)</div><div class='add'>+#define MDMA1_SRC_CRC1_Y_COUNT          (DMA23_Y_COUNT)</div><div class='add'>+#define MDMA1_SRC_CRC1_Y_MODIFY          (DMA23_Y_MODIFY)</div><div class='add'>+#define MDMA1_SRC_CRC1_CURR_DESC_PTR    (DMA23_CURR_DESC_PTR)</div><div class='add'>+#define MDMA1_SRC_CRC1_PREV_DESC_PTR    (DMA23_PREV_DESC_PTR)</div><div class='add'>+#define MDMA1_SRC_CRC1_CURR_ADDR      (DMA23_CURR_ADDR)</div><div class='add'>+#define MDMA1_SRC_CRC1_IRQ_STATUS          (DMA23_IRQ_STATUS)</div><div class='add'>+#define MDMA1_SRC_CRC1_CURR_X_COUNT      (DMA23_CURR_X_COUNT)</div><div class='add'>+#define MDMA1_SRC_CRC1_CURR_Y_COUNT      (DMA23_CURR_Y_COUNT)</div><div class='add'>+#define MDMA1_SRC_CRC1_BWL_COUNT        (DMA23_BWL_COUNT)</div><div class='add'>+#define MDMA1_SRC_CRC1_CURR_BWL_COUNT    (DMA23_CURR_BWL_COUNT)</div><div class='add'>+#define MDMA1_SRC_CRC1_BWM_COUNT        (DMA23_BWM_COUNT)</div><div class='add'>+#define MDMA1_SRC_CRC1_CURR_BWM_COUNT    (DMA23_CURR_BWM_COUNT)</div><div class='add'>+#define MDMA2_DEST_NEXT_DESC_PTR            (DMA26_NEXT_DESC_PTR)</div><div class='add'>+#define MDMA2_DEST_START_ADDR             (DMA26_START_ADDR)</div><div class='add'>+#define MDMA2_DEST_CONFIG                   (DMA26_CONFIG)</div><div class='add'>+#define MDMA2_DEST_X_COUNT                  (DMA26_X_COUNT)</div><div class='add'>+#define MDMA2_DEST_X_MODIFY                  (DMA26_X_MODIFY)</div><div class='add'>+#define MDMA2_DEST_Y_COUNT                  (DMA26_Y_COUNT)</div><div class='add'>+#define MDMA2_DEST_Y_MODIFY                  (DMA26_Y_MODIFY)</div><div class='add'>+#define MDMA2_DEST_CURR_DESC_PTR            (DMA26_CURR_DESC_PTR)</div><div class='add'>+#define MDMA2_DEST_PREV_DESC_PTR            (DMA26_PREV_DESC_PTR)</div><div class='add'>+#define MDMA2_DEST_CURR_ADDR              (DMA26_CURR_ADDR)</div><div class='add'>+#define MDMA2_DEST_IRQ_STATUS                  (DMA26_IRQ_STATUS)</div><div class='add'>+#define MDMA2_DEST_CURR_X_COUNT              (DMA26_CURR_X_COUNT)</div><div class='add'>+#define MDMA2_DEST_CURR_Y_COUNT              (DMA26_CURR_Y_COUNT)</div><div class='add'>+#define MDMA2_DEST_BWL_COUNT                (DMA26_BWL_COUNT)</div><div class='add'>+#define MDMA2_DEST_CURR_BWL_COUNT            (DMA26_CURR_BWL_COUNT)</div><div class='add'>+#define MDMA2_DEST_BWM_COUNT                (DMA26_BWM_COUNT)</div><div class='add'>+#define MDMA2_DEST_CURR_BWM_COUNT            (DMA26_CURR_BWM_COUNT)</div><div class='add'>+#define MDMA2_SRC_NEXT_DESC_PTR            (DMA25_NEXT_DESC_PTR)</div><div class='add'>+#define MDMA2_SRC_START_ADDR             (DMA25_START_ADDR)</div><div class='add'>+#define MDMA2_SRC_CONFIG                   (DMA25_CONFIG)</div><div class='add'>+#define MDMA2_SRC_X_COUNT                  (DMA25_X_COUNT)</div><div class='add'>+#define MDMA2_SRC_X_MODIFY                  (DMA25_X_MODIFY)</div><div class='add'>+#define MDMA2_SRC_Y_COUNT                  (DMA25_Y_COUNT)</div><div class='add'>+#define MDMA2_SRC_Y_MODIFY                  (DMA25_Y_MODIFY)</div><div class='add'>+#define MDMA2_SRC_CURR_DESC_PTR            (DMA25_CURR_DESC_PTR)</div><div class='add'>+#define MDMA2_SRC_PREV_DESC_PTR            (DMA25_PREV_DESC_PTR)</div><div class='add'>+#define MDMA2_SRC_CURR_ADDR              (DMA25_CURR_ADDR)</div><div class='add'>+#define MDMA2_SRC_IRQ_STATUS                  (DMA25_IRQ_STATUS)</div><div class='add'>+#define MDMA2_SRC_CURR_X_COUNT              (DMA25_CURR_X_COUNT)</div><div class='add'>+#define MDMA2_SRC_CURR_Y_COUNT              (DMA25_CURR_Y_COUNT)</div><div class='add'>+#define MDMA2_SRC_BWL_COUNT                (DMA25_BWL_COUNT)</div><div class='add'>+#define MDMA2_SRC_CURR_BWL_COUNT            (DMA25_CURR_BWL_COUNT)</div><div class='add'>+#define MDMA2_SRC_BWM_COUNT                (DMA25_BWM_COUNT)</div><div class='add'>+#define MDMA2_SRC_CURR_BWM_COUNT            (DMA25_CURR_BWM_COUNT)</div><div class='add'>+#define MDMA3_DEST_NEXT_DESC_PTR            (DMA28_NEXT_DESC_PTR)</div><div class='add'>+#define MDMA3_DEST_START_ADDR             (DMA28_START_ADDR)</div><div class='add'>+#define MDMA3_DEST_CONFIG                   (DMA28_CONFIG)</div><div class='add'>+#define MDMA3_DEST_X_COUNT                  (DMA28_X_COUNT)</div><div class='add'>+#define MDMA3_DEST_X_MODIFY                  (DMA28_X_MODIFY)</div><div class='add'>+#define MDMA3_DEST_Y_COUNT                  (DMA28_Y_COUNT)</div><div class='add'>+#define MDMA3_DEST_Y_MODIFY                  (DMA28_Y_MODIFY)</div><div class='add'>+#define MDMA3_DEST_CURR_DESC_PTR            (DMA28_CURR_DESC_PTR)</div><div class='add'>+#define MDMA3_DEST_PREV_DESC_PTR            (DMA28_PREV_DESC_PTR)</div><div class='add'>+#define MDMA3_DEST_CURR_ADDR              (DMA28_CURR_ADDR)</div><div class='add'>+#define MDMA3_DEST_IRQ_STATUS                  (DMA28_IRQ_STATUS)</div><div class='add'>+#define MDMA3_DEST_CURR_X_COUNT              (DMA28_CURR_X_COUNT)</div><div class='add'>+#define MDMA3_DEST_CURR_Y_COUNT              (DMA28_CURR_Y_COUNT)</div><div class='add'>+#define MDMA3_DEST_BWL_COUNT                (DMA28_BWL_COUNT)</div><div class='add'>+#define MDMA3_DEST_CURR_BWL_COUNT            (DMA28_CURR_BWL_COUNT)</div><div class='add'>+#define MDMA3_DEST_BWM_COUNT                (DMA28_BWM_COUNT)</div><div class='add'>+#define MDMA3_DEST_CURR_BWM_COUNT            (DMA28_CURR_BWM_COUNT)</div><div class='add'>+#define MDMA3_SRC_NEXT_DESC_PTR            (DMA27_NEXT_DESC_PTR)</div><div class='add'>+#define MDMA3_SRC_START_ADDR             (DMA27_START_ADDR)</div><div class='add'>+#define MDMA3_SRC_CONFIG                   (DMA27_CONFIG)</div><div class='add'>+#define MDMA3_SRC_X_COUNT                  (DMA27_X_COUNT)</div><div class='add'>+#define MDMA3_SRC_X_MODIFY                  (DMA27_X_MODIFY)</div><div class='add'>+#define MDMA3_SRC_Y_COUNT                  (DMA27_Y_COUNT)</div><div class='add'>+#define MDMA3_SRC_Y_MODIFY                  (DMA27_Y_MODIFY)</div><div class='add'>+#define MDMA3_SRC_CURR_DESC_PTR            (DMA27_CURR_DESC_PTR)</div><div class='add'>+#define MDMA3_SRC_PREV_DESC_PTR            (DMA27_PREV_DESC_PTR)</div><div class='add'>+#define MDMA3_SRC_CURR_ADDR              (DMA27_CURR_ADDR)</div><div class='add'>+#define MDMA3_SRC_IRQ_STATUS                  (DMA27_IRQ_STATUS)</div><div class='add'>+#define MDMA3_SRC_CURR_X_COUNT              (DMA27_CURR_X_COUNT)</div><div class='add'>+#define MDMA3_SRC_CURR_Y_COUNT              (DMA27_CURR_Y_COUNT)</div><div class='add'>+#define MDMA3_SRC_BWL_COUNT                (DMA27_BWL_COUNT)</div><div class='add'>+#define MDMA3_SRC_CURR_BWL_COUNT            (DMA27_CURR_BWL_COUNT)</div><div class='add'>+#define MDMA3_SRC_BWM_COUNT                (DMA27_BWM_COUNT)</div><div class='add'>+#define MDMA3_SRC_CURR_BWM_COUNT            (DMA27_CURR_BWM_COUNT)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMC Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DMC0</div><div class='add'>+   ========================= */</div><div class='add'>+#define DMC0_ID                     0xFFC80000         /* DMC0 Identification Register */</div><div class='add'>+#define DMC0_CTL                    0xFFC80004         /* DMC0 Control Register */</div><div class='add'>+#define DMC0_STAT                   0xFFC80008         /* DMC0 Status Register */</div><div class='add'>+#define DMC0_EFFCTL                 0xFFC8000C         /* DMC0 Efficiency Controller */</div><div class='add'>+#define DMC0_PRIO                   0xFFC80010         /* DMC0 Priority ID Register */</div><div class='add'>+#define DMC0_PRIOMSK                0xFFC80014         /* DMC0 Priority ID Mask */</div><div class='add'>+#define DMC0_CFG                    0xFFC80040         /* DMC0 SDRAM Configuration */</div><div class='add'>+#define DMC0_TR0                    0xFFC80044         /* DMC0 Timing Register 0 */</div><div class='add'>+#define DMC0_TR1                    0xFFC80048         /* DMC0 Timing Register 1 */</div><div class='add'>+#define DMC0_TR2                    0xFFC8004C         /* DMC0 Timing Register 2 */</div><div class='add'>+#define DMC0_MSK                    0xFFC8005C         /* DMC0 Mode Register Mask */</div><div class='add'>+#define DMC0_MR                     0xFFC80060         /* DMC0 Mode Shadow register */</div><div class='add'>+#define DMC0_EMR1                   0xFFC80064         /* DMC0 EMR1 Shadow Register */</div><div class='add'>+#define DMC0_EMR2                   0xFFC80068         /* DMC0 EMR2 Shadow Register */</div><div class='add'>+#define DMC0_EMR3                   0xFFC8006C         /* DMC0 EMR3 Shadow Register */</div><div class='add'>+#define DMC0_DLLCTL                 0xFFC80080         /* DMC0 DLL Control Register */</div><div class='add'>+#define DMC0_PADCTL                 0xFFC800C0         /* DMC0 PAD Control Register 0 */</div><div class='add'>+</div><div class='add'>+#define DEVSZ_64                0x000         /* DMC External Bank Size = 64Mbit */</div><div class='add'>+#define DEVSZ_128               0x100         /* DMC External Bank Size = 128Mbit */</div><div class='add'>+#define DEVSZ_256               0x200         /* DMC External Bank Size = 256Mbit */</div><div class='add'>+#define DEVSZ_512               0x300         /* DMC External Bank Size = 512Mbit */</div><div class='add'>+#define DEVSZ_1G                0x400         /* DMC External Bank Size = 1Gbit */</div><div class='add'>+#define DEVSZ_2G                0x500         /* DMC External Bank Size = 2Gbit */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        L2CTL Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        L2CTL0</div><div class='add'>+   ========================= */</div><div class='add'>+#define L2CTL0_CTL                  0xFFCA3000         /* L2CTL0 L2 Control Register */</div><div class='add'>+#define L2CTL0_ACTL_C0              0xFFCA3004         /* L2CTL0 L2 Core 0 Access Control Register */</div><div class='add'>+#define L2CTL0_ACTL_C1              0xFFCA3008         /* L2CTL0 L2 Core 1 Access Control Register */</div><div class='add'>+#define L2CTL0_ACTL_SYS             0xFFCA300C         /* L2CTL0 L2 System Access Control Register */</div><div class='add'>+#define L2CTL0_STAT                 0xFFCA3010         /* L2CTL0 L2 Status Register */</div><div class='add'>+#define L2CTL0_RPCR                 0xFFCA3014         /* L2CTL0 L2 Read Priority Count Register */</div><div class='add'>+#define L2CTL0_WPCR                 0xFFCA3018         /* L2CTL0 L2 Write Priority Count Register */</div><div class='add'>+#define L2CTL0_RFA                  0xFFCA3024         /* L2CTL0 L2 Refresh Address Regsiter */</div><div class='add'>+#define L2CTL0_ERRADDR0             0xFFCA3040         /* L2CTL0 L2 Bank 0 ECC Error Address Register */</div><div class='add'>+#define L2CTL0_ERRADDR1             0xFFCA3044         /* L2CTL0 L2 Bank 1 ECC Error Address Register */</div><div class='add'>+#define L2CTL0_ERRADDR2             0xFFCA3048         /* L2CTL0 L2 Bank 2 ECC Error Address Register */</div><div class='add'>+#define L2CTL0_ERRADDR3             0xFFCA304C         /* L2CTL0 L2 Bank 3 ECC Error Address Register */</div><div class='add'>+#define L2CTL0_ERRADDR4             0xFFCA3050         /* L2CTL0 L2 Bank 4 ECC Error Address Register */</div><div class='add'>+#define L2CTL0_ERRADDR5             0xFFCA3054         /* L2CTL0 L2 Bank 5 ECC Error Address Register */</div><div class='add'>+#define L2CTL0_ERRADDR6             0xFFCA3058         /* L2CTL0 L2 Bank 6 ECC Error Address Register */</div><div class='add'>+#define L2CTL0_ERRADDR7             0xFFCA305C         /* L2CTL0 L2 Bank 7 ECC Error Address Register */</div><div class='add'>+#define L2CTL0_ET0                  0xFFCA3080         /* L2CTL0 L2 AXI Error 0 Type Register */</div><div class='add'>+#define L2CTL0_EADDR0               0xFFCA3084         /* L2CTL0 L2 AXI Error 0 Address Register */</div><div class='add'>+#define L2CTL0_ET1                  0xFFCA3088         /* L2CTL0 L2 AXI Error 1 Type Register */</div><div class='add'>+#define L2CTL0_EADDR1               0xFFCA308C         /* L2CTL0 L2 AXI Error 1 Address Register */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        SEC Registers</div><div class='add'>+   ========================= */</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+       SEC Core Interface (SCI) Register Definitions</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+#define SEC_SCI_BASE 0xFFCA4400</div><div class='add'>+#define SEC_SCI_OFF 0x40</div><div class='add'>+#define SEC_CCTL 0x0         /* SEC Core Control Register n */</div><div class='add'>+#define SEC_CSTAT 0x4         /* SEC Core Status Register n */</div><div class='add'>+#define SEC_CPND 0x8         /* SEC Core Pending IRQ Register n */</div><div class='add'>+#define SEC_CACT 0xC         /* SEC Core Active IRQ Register n */</div><div class='add'>+#define SEC_CPMSK 0x10         /* SEC Core IRQ Priority Mask Register n */</div><div class='add'>+#define SEC_CGMSK 0x14         /* SEC Core IRQ Group Mask Register n */</div><div class='add'>+#define SEC_CPLVL 0x18         /* SEC Core IRQ Priority Level Register n */</div><div class='add'>+#define SEC_CSID 0x1C         /* SEC Core IRQ Source ID Register n */</div><div class='add'>+</div><div class='add'>+#define bfin_read_SEC_SCI(n, reg) bfin_read32(SEC_SCI_BASE + (n) * SEC_SCI_OFF + reg)</div><div class='add'>+#define bfin_write_SEC_SCI(n, reg, val) \</div><div class='add'>+	bfin_write32(SEC_SCI_BASE + (n) * SEC_SCI_OFF + reg, val)</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+       SEC Fault Management Interface (SFI) Register Definitions</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_FCTL                   0xFFCA4010         /* SEC Fault Control Register */</div><div class='add'>+#define SEC_FSTAT                  0xFFCA4014         /* SEC Fault Status Register */</div><div class='add'>+#define SEC_FSID                   0xFFCA4018         /* SEC Fault Source ID Register */</div><div class='add'>+#define SEC_FEND                   0xFFCA401C         /* SEC Fault End Register */</div><div class='add'>+#define SEC_FDLY                   0xFFCA4020         /* SEC Fault Delay Register */</div><div class='add'>+#define SEC_FDLY_CUR               0xFFCA4024         /* SEC Fault Delay Current Register */</div><div class='add'>+#define SEC_FSRDLY                 0xFFCA4028         /* SEC Fault System Reset Delay Register */</div><div class='add'>+#define SEC_FSRDLY_CUR             0xFFCA402C         /* SEC Fault System Reset Delay Current Register */</div><div class='add'>+#define SEC_FCOPP                  0xFFCA4030         /* SEC Fault COP Period Register */</div><div class='add'>+#define SEC_FCOPP_CUR              0xFFCA4034         /* SEC Fault COP Period Current Register */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+       SEC Global Register Definitions</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_GCTL                   0xFFCA4000         /* SEC Global Control Register */</div><div class='add'>+#define SEC_GSTAT                  0xFFCA4004         /* SEC Global Status Register */</div><div class='add'>+#define SEC_RAISE                  0xFFCA4008         /* SEC Global Raise Register */</div><div class='add'>+#define SEC_END                    0xFFCA400C         /* SEC Global End Register */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+       SEC Source Interface (SSI) Register Definitions</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_SCTL0                  0xFFCA4800         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL1                  0xFFCA4808         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL2                  0xFFCA4810         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL3                  0xFFCA4818         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL4                  0xFFCA4820         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL5                  0xFFCA4828         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL6                  0xFFCA4830         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL7                  0xFFCA4838         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL8                  0xFFCA4840         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL9                  0xFFCA4848         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL10                 0xFFCA4850         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL11                 0xFFCA4858         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL12                 0xFFCA4860         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL13                 0xFFCA4868         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL14                 0xFFCA4870         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL15                 0xFFCA4878         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL16                 0xFFCA4880         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL17                 0xFFCA4888         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL18                 0xFFCA4890         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL19                 0xFFCA4898         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL20                 0xFFCA48A0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL21                 0xFFCA48A8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL22                 0xFFCA48B0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL23                 0xFFCA48B8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL24                 0xFFCA48C0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL25                 0xFFCA48C8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL26                 0xFFCA48D0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL27                 0xFFCA48D8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL28                 0xFFCA48E0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL29                 0xFFCA48E8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL30                 0xFFCA48F0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL31                 0xFFCA48F8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL32                 0xFFCA4900         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL33                 0xFFCA4908         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL34                 0xFFCA4910         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL35                 0xFFCA4918         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL36                 0xFFCA4920         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL37                 0xFFCA4928         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL38                 0xFFCA4930         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL39                 0xFFCA4938         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL40                 0xFFCA4940         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL41                 0xFFCA4948         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL42                 0xFFCA4950         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL43                 0xFFCA4958         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL44                 0xFFCA4960         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL45                 0xFFCA4968         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL46                 0xFFCA4970         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL47                 0xFFCA4978         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL48                 0xFFCA4980         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL49                 0xFFCA4988         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL50                 0xFFCA4990         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL51                 0xFFCA4998         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL52                 0xFFCA49A0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL53                 0xFFCA49A8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL54                 0xFFCA49B0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL55                 0xFFCA49B8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL56                 0xFFCA49C0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL57                 0xFFCA49C8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL58                 0xFFCA49D0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL59                 0xFFCA49D8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL60                 0xFFCA49E0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL61                 0xFFCA49E8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL62                 0xFFCA49F0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL63                 0xFFCA49F8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL64                 0xFFCA4A00         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL65                 0xFFCA4A08         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL66                 0xFFCA4A10         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL67                 0xFFCA4A18         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL68                 0xFFCA4A20         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL69                 0xFFCA4A28         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL70                 0xFFCA4A30         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL71                 0xFFCA4A38         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL72                 0xFFCA4A40         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL73                 0xFFCA4A48         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL74                 0xFFCA4A50         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL75                 0xFFCA4A58         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL76                 0xFFCA4A60         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL77                 0xFFCA4A68         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL78                 0xFFCA4A70         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL79                 0xFFCA4A78         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL80                 0xFFCA4A80         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL81                 0xFFCA4A88         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL82                 0xFFCA4A90         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL83                 0xFFCA4A98         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL84                 0xFFCA4AA0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL85                 0xFFCA4AA8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL86                 0xFFCA4AB0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL87                 0xFFCA4AB8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL88                 0xFFCA4AC0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL89                 0xFFCA4AC8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL90                 0xFFCA4AD0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL91                 0xFFCA4AD8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL92                 0xFFCA4AE0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL93                 0xFFCA4AE8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL94                 0xFFCA4AF0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL95                 0xFFCA4AF8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL96                 0xFFCA4B00         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL97                 0xFFCA4B08         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL98                 0xFFCA4B10         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL99                 0xFFCA4B18         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL100                0xFFCA4B20         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL101                0xFFCA4B28         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL102                0xFFCA4B30         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL103                0xFFCA4B38         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL104                0xFFCA4B40         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL105                0xFFCA4B48         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL106                0xFFCA4B50         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL107                0xFFCA4B58         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL108                0xFFCA4B60         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL109                0xFFCA4B68         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL110                0xFFCA4B70         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL111                0xFFCA4B78         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL112                0xFFCA4B80         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL113                0xFFCA4B88         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL114                0xFFCA4B90         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL115                0xFFCA4B98         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL116                0xFFCA4BA0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL117                0xFFCA4BA8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL118                0xFFCA4BB0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL119                0xFFCA4BB8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL120                0xFFCA4BC0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL121                0xFFCA4BC8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL122                0xFFCA4BD0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL123                0xFFCA4BD8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL124                0xFFCA4BE0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL125                0xFFCA4BE8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL126                0xFFCA4BF0         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL127                0xFFCA4BF8         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL128                0xFFCA4C00         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL129                0xFFCA4C08         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL130                0xFFCA4C10         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL131                0xFFCA4C18         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL132                0xFFCA4C20         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL133                0xFFCA4C28         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL134                0xFFCA4C30         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL135                0xFFCA4C38         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL136                0xFFCA4C40         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL137                0xFFCA4C48         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL138                0xFFCA4C50         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SCTL139                0xFFCA4C58         /* SEC IRQ Source Control Register n */</div><div class='add'>+#define SEC_SSTAT0                 0xFFCA4804         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT1                 0xFFCA480C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT2                 0xFFCA4814         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT3                 0xFFCA481C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT4                 0xFFCA4824         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT5                 0xFFCA482C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT6                 0xFFCA4834         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT7                 0xFFCA483C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT8                 0xFFCA4844         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT9                 0xFFCA484C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT10                0xFFCA4854         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT11                0xFFCA485C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT12                0xFFCA4864         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT13                0xFFCA486C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT14                0xFFCA4874         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT15                0xFFCA487C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT16                0xFFCA4884         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT17                0xFFCA488C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT18                0xFFCA4894         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT19                0xFFCA489C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT20                0xFFCA48A4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT21                0xFFCA48AC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT22                0xFFCA48B4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT23                0xFFCA48BC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT24                0xFFCA48C4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT25                0xFFCA48CC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT26                0xFFCA48D4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT27                0xFFCA48DC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT28                0xFFCA48E4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT29                0xFFCA48EC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT30                0xFFCA48F4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT31                0xFFCA48FC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT32                0xFFCA4904         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT33                0xFFCA490C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT34                0xFFCA4914         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT35                0xFFCA491C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT36                0xFFCA4924         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT37                0xFFCA492C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT38                0xFFCA4934         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT39                0xFFCA493C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT40                0xFFCA4944         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT41                0xFFCA494C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT42                0xFFCA4954         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT43                0xFFCA495C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT44                0xFFCA4964         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT45                0xFFCA496C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT46                0xFFCA4974         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT47                0xFFCA497C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT48                0xFFCA4984         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT49                0xFFCA498C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT50                0xFFCA4994         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT51                0xFFCA499C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT52                0xFFCA49A4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT53                0xFFCA49AC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT54                0xFFCA49B4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT55                0xFFCA49BC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT56                0xFFCA49C4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT57                0xFFCA49CC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT58                0xFFCA49D4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT59                0xFFCA49DC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT60                0xFFCA49E4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT61                0xFFCA49EC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT62                0xFFCA49F4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT63                0xFFCA49FC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT64                0xFFCA4A04         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT65                0xFFCA4A0C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT66                0xFFCA4A14         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT67                0xFFCA4A1C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT68                0xFFCA4A24         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT69                0xFFCA4A2C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT70                0xFFCA4A34         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT71                0xFFCA4A3C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT72                0xFFCA4A44         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT73                0xFFCA4A4C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT74                0xFFCA4A54         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT75                0xFFCA4A5C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT76                0xFFCA4A64         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT77                0xFFCA4A6C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT78                0xFFCA4A74         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT79                0xFFCA4A7C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT80                0xFFCA4A84         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT81                0xFFCA4A8C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT82                0xFFCA4A94         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT83                0xFFCA4A9C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT84                0xFFCA4AA4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT85                0xFFCA4AAC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT86                0xFFCA4AB4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT87                0xFFCA4ABC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT88                0xFFCA4AC4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT89                0xFFCA4ACC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT90                0xFFCA4AD4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT91                0xFFCA4ADC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT92                0xFFCA4AE4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT93                0xFFCA4AEC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT94                0xFFCA4AF4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT95                0xFFCA4AFC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT96                0xFFCA4B04         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT97                0xFFCA4B0C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT98                0xFFCA4B14         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT99                0xFFCA4B1C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT100               0xFFCA4B24         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT101               0xFFCA4B2C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT102               0xFFCA4B34         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT103               0xFFCA4B3C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT104               0xFFCA4B44         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT105               0xFFCA4B4C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT106               0xFFCA4B54         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT107               0xFFCA4B5C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT108               0xFFCA4B64         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT109               0xFFCA4B6C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT110               0xFFCA4B74         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT111               0xFFCA4B7C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT112               0xFFCA4B84         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT113               0xFFCA4B8C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT114               0xFFCA4B94         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT115               0xFFCA4B9C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT116               0xFFCA4BA4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT117               0xFFCA4BAC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT118               0xFFCA4BB4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT119               0xFFCA4BBC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT120               0xFFCA4BC4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT121               0xFFCA4BCC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT122               0xFFCA4BD4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT123               0xFFCA4BDC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT124               0xFFCA4BE4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT125               0xFFCA4BEC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT126               0xFFCA4BF4         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT127               0xFFCA4BFC         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT128               0xFFCA4C04         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT129               0xFFCA4C0C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT130               0xFFCA4C14         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT131               0xFFCA4C1C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT132               0xFFCA4C24         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT133               0xFFCA4C2C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT134               0xFFCA4C34         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT135               0xFFCA4C3C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT136               0xFFCA4C44         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT137               0xFFCA4C4C         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT138               0xFFCA4C54         /* SEC IRQ Source Status Register n */</div><div class='add'>+#define SEC_SSTAT139               0xFFCA4C5C         /* SEC IRQ Source Status Register n */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_CCTL                             Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_CCTL_LOCK                   0x80000000    /* LOCK: Lock */</div><div class='add'>+#define SEC_CCTL_NMI_EN                 0x00010000    /* NMIEN: Enable */</div><div class='add'>+#define SEC_CCTL_WAITIDLE               0x00001000    /* WFI: Wait for Idle */</div><div class='add'>+#define SEC_CCTL_RESET                  0x00000002    /* RESET: Reset */</div><div class='add'>+#define SEC_CCTL_EN                     0x00000001    /* EN: Enable */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_CSTAT                            Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_CSTAT_NMI                   0x00010000    /* NMI Status */</div><div class='add'>+#define SEC_CSTAT_WAITING               0x00001000    /* WFI: Waiting */</div><div class='add'>+#define SEC_CSTAT_VALID_SID             0x00000400    /* SIDV: Valid */</div><div class='add'>+#define SEC_CSTAT_VALID_ACT             0x00000200    /* ACTV: Valid */</div><div class='add'>+#define SEC_CSTAT_VALID_PND             0x00000100    /* PNDV: Valid */</div><div class='add'>+#define SEC_CSTAT_ERRC                  0x00000030    /* Error Cause */</div><div class='add'>+#define SEC_CSTAT_ACKERR                0x00000010    /* ERRC: Acknowledge Error */</div><div class='add'>+#define SEC_CSTAT_ERR                   0x00000002    /* ERR: Error Occurred */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_CPND                             Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_CPND_PRIO                   0x0000FF00    /* Highest Pending IRQ Priority */</div><div class='add'>+#define SEC_CPND_SID                    0x000000FF    /* Highest Pending IRQ Source ID */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_CACT                             Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_CACT_PRIO                   0x0000FF00    /* Highest Active IRQ Priority */</div><div class='add'>+#define SEC_CACT_SID                    0x000000FF    /* Highest Active IRQ Source ID */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_CPMSK                            Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_CPMSK_LOCK                  0x80000000    /* LOCK: Lock */</div><div class='add'>+#define SEC_CPMSK_PRIO                  0x000000FF    /* IRQ Priority Mask */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_CGMSK                            Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_CGMSK_LOCK                  0x80000000    /* LOCK: Lock */</div><div class='add'>+#define SEC_CGMSK_MASK                  0x00000100    /* UGRP: Mask Ungrouped Sources */</div><div class='add'>+#define SEC_CGMSK_GRP                   0x0000000F    /* Grouped Mask */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_CPLVL                            Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_CPLVL_LOCK                  0x80000000    /* LOCK: Lock */</div><div class='add'>+#define SEC_CPLVL_PLVL                  0x00000007    /* Priority Levels */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_CSID                             Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_CSID_SID                    0x000000FF    /* Source ID */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_FCTL                             Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_FCTL_LOCK                   0x80000000    /* LOCK: Lock */</div><div class='add'>+#define SEC_FCTL_FLTPND_MODE            0x00002000    /* TES: Fault Pending Mode */</div><div class='add'>+#define SEC_FCTL_COP_MODE               0x00001000    /* CMS: COP Mode */</div><div class='add'>+#define SEC_FCTL_FLTIN_EN               0x00000080    /* FIEN: Enable */</div><div class='add'>+#define SEC_FCTL_SYSRST_EN              0x00000040    /* SREN: Enable */</div><div class='add'>+#define SEC_FCTL_TRGOUT_EN              0x00000020    /* TOEN: Enable */</div><div class='add'>+#define SEC_FCTL_FLTOUT_EN              0x00000010    /* FOEN: Enable */</div><div class='add'>+#define SEC_FCTL_RESET                  0x00000002    /* RESET: Reset */</div><div class='add'>+#define SEC_FCTL_EN                     0x00000001    /* EN: Enable */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_FSTAT                            Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_FSTAT_NXTFLT                0x00000400    /* NPND: Pending */</div><div class='add'>+#define SEC_FSTAT_FLTACT                0x00000200    /* ACT: Active Fault */</div><div class='add'>+#define SEC_FSTAT_FLTPND                0x00000100    /* PND: Pending */</div><div class='add'>+#define SEC_FSTAT_ERRC                  0x00000030    /* Error Cause */</div><div class='add'>+#define SEC_FSTAT_ENDERR                0x00000020    /* ERRC: End Error */</div><div class='add'>+#define SEC_FSTAT_ERR                   0x00000002    /* ERR: Error Occurred */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_FSID                             Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_FSID_SRC_EXTFLT             0x00010000    /* FEXT: Fault External */</div><div class='add'>+#define SEC_FSID_SID                    0x000000FF    /* Source ID */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_FEND                             Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_FEND_END_EXTFLT             0x00010000    /* FEXT: Fault External */</div><div class='add'>+#define SEC_FEND_SID                    0x000000FF    /* Source ID */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_GCTL                             Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_GCTL_LOCK                   0x80000000    /* Lock */</div><div class='add'>+#define SEC_GCTL_RESET                  0x00000002    /* Reset */</div><div class='add'>+#define SEC_GCTL_EN                     0x00000001    /* Enable */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_GSTAT                            Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_GSTAT_LWERR                 0x80000000    /* LWERR: Error Occurred */</div><div class='add'>+#define SEC_GSTAT_ADRERR                0x40000000    /* ADRERR: Error Occurred */</div><div class='add'>+#define SEC_GSTAT_SID                   0x00FF0000    /* Source ID for SSI Error */</div><div class='add'>+#define SEC_GSTAT_SCI                   0x00000F00    /* SCI ID for SCI Error */</div><div class='add'>+#define SEC_GSTAT_ERRC                  0x00000030    /* Error Cause */</div><div class='add'>+#define SEC_GSTAT_SCIERR                0x00000010    /* ERRC: SCI Error */</div><div class='add'>+#define SEC_GSTAT_SSIERR                0x00000020    /* ERRC: SSI Error */</div><div class='add'>+#define SEC_GSTAT_ERR                   0x00000002    /* ERR: Error Occurred */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_RAISE                            Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_RAISE_SID                   0x000000FF    /* Source ID IRQ Set to Pending */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_END                              Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_END_SID                     0x000000FF    /* Source ID IRQ to End */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_SCTL                             Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_SCTL_LOCK                   0x80000000    /* Lock */</div><div class='add'>+#define SEC_SCTL_CTG                    0x0F000000    /* Core Target Select */</div><div class='add'>+#define SEC_SCTL_GRP                    0x000F0000    /* Group Select */</div><div class='add'>+#define SEC_SCTL_PRIO                   0x0000FF00    /* Priority Level Select */</div><div class='add'>+#define SEC_SCTL_ERR_EN                 0x00000010    /* ERREN: Enable */</div><div class='add'>+#define SEC_SCTL_EDGE                   0x00000008    /* ES: Edge Sensitive */</div><div class='add'>+#define SEC_SCTL_SRC_EN                 0x00000004    /* SEN: Enable */</div><div class='add'>+#define SEC_SCTL_FAULT_EN               0x00000002    /* FEN: Enable */</div><div class='add'>+#define SEC_SCTL_INT_EN                 0x00000001    /* IEN: Enable */</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------------------------------------------------------</div><div class='add'>+        SEC_SSTAT                            Pos/Masks     Description</div><div class='add'>+   ------------------------------------------------------------------------------------------------------------------------ */</div><div class='add'>+#define SEC_SSTAT_CHID                  0x00FF0000    /* Channel ID */</div><div class='add'>+#define SEC_SSTAT_ACTIVE_SRC            0x00000200    /* ACT: Active Source */</div><div class='add'>+#define SEC_SSTAT_PENDING               0x00000100    /* PND: Pending */</div><div class='add'>+#define SEC_SSTAT_ERRC                  0x00000030    /* Error Cause */</div><div class='add'>+#define SEC_SSTAT_ENDERR                0x00000020    /* ERRC: End Error */</div><div class='add'>+#define SEC_SSTAT_ERR                   0x00000002    /* Error */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        RCU Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        RCU0</div><div class='add'>+   ========================= */</div><div class='add'>+#define RCU0_CTL                    0xFFCA6000         /* RCU0 Control Register */</div><div class='add'>+#define RCU0_STAT                   0xFFCA6004         /* RCU0 Status Register */</div><div class='add'>+#define RCU0_CRCTL                  0xFFCA6008         /* RCU0 Core Reset Control Register */</div><div class='add'>+#define RCU0_CRSTAT                 0xFFCA600C         /* RCU0 Core Reset Status Register */</div><div class='add'>+#define RCU0_SIDIS                  0xFFCA6010         /* RCU0 System Interface Disable Register */</div><div class='add'>+#define RCU0_SISTAT                 0xFFCA6014         /* RCU0 System Interface Status Register */</div><div class='add'>+#define RCU0_SVECT_LCK              0xFFCA6018         /* RCU0 SVECT Lock Register */</div><div class='add'>+#define RCU0_BCODE                  0xFFCA601C         /* RCU0 Boot Code Register */</div><div class='add'>+#define RCU0_SVECT0                 0xFFCA6020         /* RCU0 Software Vector Register n */</div><div class='add'>+#define RCU0_SVECT1                 0xFFCA6024         /* RCU0 Software Vector Register n */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        CGU0</div><div class='add'>+   ========================= */</div><div class='add'>+#define CGU0_CTL                    0xFFCA8000         /* CGU0 Control Register */</div><div class='add'>+#define CGU0_STAT                   0xFFCA8004         /* CGU0 Status Register */</div><div class='add'>+#define CGU0_DIV                    0xFFCA8008         /* CGU0 Divisor Register */</div><div class='add'>+#define CGU0_CLKOUTSEL              0xFFCA800C         /* CGU0 CLKOUT Select Register */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DPM Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DPM0</div><div class='add'>+   ========================= */</div><div class='add'>+#define DPM0_CTL                    0xFFCA9000         /* DPM0 Control Register */</div><div class='add'>+#define DPM0_STAT                   0xFFCA9004         /* DPM0 Status Register */</div><div class='add'>+#define DPM0_CCBF_DIS               0xFFCA9008         /* DPM0 Core Clock Buffer Disable Register */</div><div class='add'>+#define DPM0_CCBF_EN                0xFFCA900C         /* DPM0 Core Clock Buffer Enable Register */</div><div class='add'>+#define DPM0_CCBF_STAT              0xFFCA9010         /* DPM0 Core Clock Buffer Status Register */</div><div class='add'>+#define DPM0_CCBF_STAT_STKY         0xFFCA9014         /* DPM0 Core Clock Buffer Status Sticky Register */</div><div class='add'>+#define DPM0_SCBF_DIS               0xFFCA9018         /* DPM0 System Clock Buffer Disable Register */</div><div class='add'>+#define DPM0_WAKE_EN                0xFFCA901C         /* DPM0 Wakeup Enable Register */</div><div class='add'>+#define DPM0_WAKE_POL               0xFFCA9020         /* DPM0 Wakeup Polarity Register */</div><div class='add'>+#define DPM0_WAKE_STAT              0xFFCA9024         /* DPM0 Wakeup Status Register */</div><div class='add'>+#define DPM0_HIB_DIS                0xFFCA9028         /* DPM0 Hibernate Disable Register */</div><div class='add'>+#define DPM0_PGCNTR                 0xFFCA902C         /* DPM0 Power Good Counter Register */</div><div class='add'>+#define DPM0_RESTORE0               0xFFCA9030         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE1               0xFFCA9034         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE2               0xFFCA9038         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE3               0xFFCA903C         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE4               0xFFCA9040         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE5               0xFFCA9044         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE6               0xFFCA9048         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE7               0xFFCA904C         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE8               0xFFCA9050         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE9               0xFFCA9054         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE10              0xFFCA9058         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE11              0xFFCA905C         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE12              0xFFCA9060         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE13              0xFFCA9064         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE14              0xFFCA9068         /* DPM0 Restore Register */</div><div class='add'>+#define DPM0_RESTORE15              0xFFCA906C         /* DPM0 Restore Register */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        DBG Registers</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+/* USB register */</div><div class='add'>+#define USB_FADDR                  0xFFCC1000         /* USB Device Address in Peripheral Mode */</div><div class='add'>+#define USB_POWER                  0xFFCC1001         /* USB Power and Device Control */</div><div class='add'>+#define USB_INTRTX                 0xFFCC1002         /* USB Transmit Interrupt */</div><div class='add'>+#define USB_INTRRX                 0xFFCC1004         /* USB Receive Interrupts */</div><div class='add'>+#define USB_INTRTXE                0xFFCC1006         /* USB Transmit Interrupt Enable */</div><div class='add'>+#define USB_INTRRXE                0xFFCC1008         /* USB Receive Interrupt Enable */</div><div class='add'>+#define USB_INTRUSB                    0xFFCC100A         /* USB USB Interrupts */</div><div class='add'>+#define USB_INTRUSBE                    0xFFCC100B         /* USB USB Interrupt Enable */</div><div class='add'>+#define USB_FRAME                  0xFFCC100C         /* USB Frame Number */</div><div class='add'>+#define USB_INDEX                  0xFFCC100E         /* USB Index */</div><div class='add'>+#define USB_TESTMODE               0xFFCC100F         /* USB Testmodes */</div><div class='add'>+#define USB_EPI_TXMAXP0            0xFFCC1010         /* USB Transmit Maximum Packet Length */</div><div class='add'>+#define USB_EP_NI0_TXMAXP          0xFFCC1010</div><div class='add'>+#define USB_EP0I_CSR0_H            0xFFCC1012         /* USB Config and Status EP0 */</div><div class='add'>+#define USB_EPI_TXCSR0_H           0xFFCC1012         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP0I_CSR0_P            0xFFCC1012         /* USB Config and Status EP0 */</div><div class='add'>+#define USB_EPI_TXCSR0_P           0xFFCC1012         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EPI_RXMAXP0            0xFFCC1014         /* USB Receive Maximum Packet Length */</div><div class='add'>+#define USB_EPI_RXCSR0_H           0xFFCC1016         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EPI_RXCSR0_P           0xFFCC1016         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP0I_CNT0              0xFFCC1018         /* USB Number of Received Bytes for Endpoint 0 */</div><div class='add'>+#define USB_EPI_RXCNT0             0xFFCC1018         /* USB Number of Byte Received */</div><div class='add'>+#define USB_EP0I_TYPE0             0xFFCC101A         /* USB Speed for Endpoint 0 */</div><div class='add'>+#define USB_EPI_TXTYPE0            0xFFCC101A         /* USB Transmit Type */</div><div class='add'>+#define USB_EP0I_NAKLIMIT0         0xFFCC101B         /* USB NAK Response Timeout for Endpoint 0 */</div><div class='add'>+#define USB_EPI_TXINTERVAL0        0xFFCC101B         /* USB Transmit Polling Interval */</div><div class='add'>+#define USB_EPI_RXTYPE0            0xFFCC101C         /* USB Receive Type */</div><div class='add'>+#define USB_EPI_RXINTERVAL0        0xFFCC101D         /* USB Receive Polling Interval */</div><div class='add'>+#define USB_EP0I_CFGDATA0          0xFFCC101F         /* USB Configuration Information */</div><div class='add'>+#define USB_FIFOB0                 0xFFCC1020         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOB1                 0xFFCC1024         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOB2                 0xFFCC1028         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOB3                 0xFFCC102C         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOB4                 0xFFCC1030         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOB5                 0xFFCC1034         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOB6                 0xFFCC1038         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOB7                 0xFFCC103C         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOB8                 0xFFCC1040         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOB9                 0xFFCC1044         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOB10                0xFFCC1048         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOB11                0xFFCC104C         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOH0                 0xFFCC1020         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOH1                 0xFFCC1024         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOH2                 0xFFCC1028         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOH3                 0xFFCC102C         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOH4                 0xFFCC1030         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOH5                 0xFFCC1034         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOH6                 0xFFCC1038         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOH7                 0xFFCC103C         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOH8                 0xFFCC1040         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOH9                 0xFFCC1044         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOH10                0xFFCC1048         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFOH11                0xFFCC104C         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFO0                  0xFFCC1020         /* USB FIFO Data */</div><div class='add'>+#define USB_EP0_FIFO               0xFFCC1020</div><div class='add'>+#define USB_FIFO1                  0xFFCC1024         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFO2                  0xFFCC1028         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFO3                  0xFFCC102C         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFO4                  0xFFCC1030         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFO5                  0xFFCC1034         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFO6                  0xFFCC1038         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFO7                  0xFFCC103C         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFO8                  0xFFCC1040         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFO9                  0xFFCC1044         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFO10                 0xFFCC1048         /* USB FIFO Data */</div><div class='add'>+#define USB_FIFO11                 0xFFCC104C         /* USB FIFO Data */</div><div class='add'>+#define USB_OTG_DEV_CTL                0xFFCC1060         /* USB Device Control */</div><div class='add'>+#define USB_TXFIFOSZ               0xFFCC1062         /* USB Transmit FIFO Size */</div><div class='add'>+#define USB_RXFIFOSZ               0xFFCC1063         /* USB Receive FIFO Size */</div><div class='add'>+#define USB_TXFIFOADDR             0xFFCC1064         /* USB Transmit FIFO Address */</div><div class='add'>+#define USB_RXFIFOADDR             0xFFCC1066         /* USB Receive FIFO Address */</div><div class='add'>+#define USB_VENDSTAT               0xFFCC1068         /* USB Vendor Status */</div><div class='add'>+#define USB_HWVERS                 0xFFCC106C         /* USB Hardware Version */</div><div class='add'>+#define USB_EPINFO                 0xFFCC1078         /* USB Endpoint Info */</div><div class='add'>+#define USB_RAMINFO                0xFFCC1079         /* USB Ram Information */</div><div class='add'>+#define USB_LINKINFO               0xFFCC107A         /* USB Programmable Delay Values */</div><div class='add'>+#define USB_VPLEN                  0xFFCC107B         /* USB VBus Pulse Duration */</div><div class='add'>+#define USB_HS_EOF1                0xFFCC107C         /* USB High Speed End of Frame Remaining */</div><div class='add'>+#define USB_FS_EOF1                0xFFCC107D         /* USB Full Speed End of Frame Remaining */</div><div class='add'>+#define USB_LS_EOF1                0xFFCC107E         /* USB Low Speed End of Frame Remaining */</div><div class='add'>+#define USB_SOFT_RST               0xFFCC107F         /* USB Software Reset */</div><div class='add'>+#define USB_TXFUNCADDR0            0xFFCC1080         /* USB Transmit Function Address */</div><div class='add'>+#define USB_TXFUNCADDR1            0xFFCC1088         /* USB Transmit Function Address */</div><div class='add'>+#define USB_TXFUNCADDR2            0xFFCC1090         /* USB Transmit Function Address */</div><div class='add'>+#define USB_TXFUNCADDR3            0xFFCC1098         /* USB Transmit Function Address */</div><div class='add'>+#define USB_TXFUNCADDR4            0xFFCC10A0         /* USB Transmit Function Address */</div><div class='add'>+#define USB_TXFUNCADDR5            0xFFCC10A8         /* USB Transmit Function Address */</div><div class='add'>+#define USB_TXFUNCADDR6            0xFFCC10B0         /* USB Transmit Function Address */</div><div class='add'>+#define USB_TXFUNCADDR7            0xFFCC10B8         /* USB Transmit Function Address */</div><div class='add'>+#define USB_TXFUNCADDR8            0xFFCC10C0         /* USB Transmit Function Address */</div><div class='add'>+#define USB_TXFUNCADDR9            0xFFCC10C8         /* USB Transmit Function Address */</div><div class='add'>+#define USB_TXFUNCADDR10           0xFFCC10D0         /* USB Transmit Function Address */</div><div class='add'>+#define USB_TXFUNCADDR11           0xFFCC10D8         /* USB Transmit Function Address */</div><div class='add'>+#define USB_TXHUBADDR0             0xFFCC1082         /* USB Transmit Hub Address */</div><div class='add'>+#define USB_TXHUBADDR1             0xFFCC108A         /* USB Transmit Hub Address */</div><div class='add'>+#define USB_TXHUBADDR2             0xFFCC1092         /* USB Transmit Hub Address */</div><div class='add'>+#define USB_TXHUBADDR3             0xFFCC109A         /* USB Transmit Hub Address */</div><div class='add'>+#define USB_TXHUBADDR4             0xFFCC10A2         /* USB Transmit Hub Address */</div><div class='add'>+#define USB_TXHUBADDR5             0xFFCC10AA         /* USB Transmit Hub Address */</div><div class='add'>+#define USB_TXHUBADDR6             0xFFCC10B2         /* USB Transmit Hub Address */</div><div class='add'>+#define USB_TXHUBADDR7             0xFFCC10BA         /* USB Transmit Hub Address */</div><div class='add'>+#define USB_TXHUBADDR8             0xFFCC10C2         /* USB Transmit Hub Address */</div><div class='add'>+#define USB_TXHUBADDR9             0xFFCC10CA         /* USB Transmit Hub Address */</div><div class='add'>+#define USB_TXHUBADDR10            0xFFCC10D2         /* USB Transmit Hub Address */</div><div class='add'>+#define USB_TXHUBADDR11            0xFFCC10DA         /* USB Transmit Hub Address */</div><div class='add'>+#define USB_TXHUBPORT0             0xFFCC1083         /* USB Transmit Hub Port */</div><div class='add'>+#define USB_TXHUBPORT1             0xFFCC108B         /* USB Transmit Hub Port */</div><div class='add'>+#define USB_TXHUBPORT2             0xFFCC1093         /* USB Transmit Hub Port */</div><div class='add'>+#define USB_TXHUBPORT3             0xFFCC109B         /* USB Transmit Hub Port */</div><div class='add'>+#define USB_TXHUBPORT4             0xFFCC10A3         /* USB Transmit Hub Port */</div><div class='add'>+#define USB_TXHUBPORT5             0xFFCC10AB         /* USB Transmit Hub Port */</div><div class='add'>+#define USB_TXHUBPORT6             0xFFCC10B3         /* USB Transmit Hub Port */</div><div class='add'>+#define USB_TXHUBPORT7             0xFFCC10BB         /* USB Transmit Hub Port */</div><div class='add'>+#define USB_TXHUBPORT8             0xFFCC10C3         /* USB Transmit Hub Port */</div><div class='add'>+#define USB_TXHUBPORT9             0xFFCC10CB         /* USB Transmit Hub Port */</div><div class='add'>+#define USB_TXHUBPORT10            0xFFCC10D3         /* USB Transmit Hub Port */</div><div class='add'>+#define USB_TXHUBPORT11            0xFFCC10DB         /* USB Transmit Hub Port */</div><div class='add'>+#define USB_RXFUNCADDR0            0xFFCC1084         /* USB Receive Function Address */</div><div class='add'>+#define USB_RXFUNCADDR1            0xFFCC108C         /* USB Receive Function Address */</div><div class='add'>+#define USB_RXFUNCADDR2            0xFFCC1094         /* USB Receive Function Address */</div><div class='add'>+#define USB_RXFUNCADDR3            0xFFCC109C         /* USB Receive Function Address */</div><div class='add'>+#define USB_RXFUNCADDR4            0xFFCC10A4         /* USB Receive Function Address */</div><div class='add'>+#define USB_RXFUNCADDR5            0xFFCC10AC         /* USB Receive Function Address */</div><div class='add'>+#define USB_RXFUNCADDR6            0xFFCC10B4         /* USB Receive Function Address */</div><div class='add'>+#define USB_RXFUNCADDR7            0xFFCC10BC         /* USB Receive Function Address */</div><div class='add'>+#define USB_RXFUNCADDR8            0xFFCC10C4         /* USB Receive Function Address */</div><div class='add'>+#define USB_RXFUNCADDR9            0xFFCC10CC         /* USB Receive Function Address */</div><div class='add'>+#define USB_RXFUNCADDR10           0xFFCC10D4         /* USB Receive Function Address */</div><div class='add'>+#define USB_RXFUNCADDR11           0xFFCC10DC         /* USB Receive Function Address */</div><div class='add'>+#define USB_RXHUBADDR0             0xFFCC1086         /* USB Receive Hub Address */</div><div class='add'>+#define USB_RXHUBADDR1             0xFFCC108E         /* USB Receive Hub Address */</div><div class='add'>+#define USB_RXHUBADDR2             0xFFCC1096         /* USB Receive Hub Address */</div><div class='add'>+#define USB_RXHUBADDR3             0xFFCC109E         /* USB Receive Hub Address */</div><div class='add'>+#define USB_RXHUBADDR4             0xFFCC10A6         /* USB Receive Hub Address */</div><div class='add'>+#define USB_RXHUBADDR5             0xFFCC10AE         /* USB Receive Hub Address */</div><div class='add'>+#define USB_RXHUBADDR6             0xFFCC10B6         /* USB Receive Hub Address */</div><div class='add'>+#define USB_RXHUBADDR7             0xFFCC10BE         /* USB Receive Hub Address */</div><div class='add'>+#define USB_RXHUBADDR8             0xFFCC10C6         /* USB Receive Hub Address */</div><div class='add'>+#define USB_RXHUBADDR9             0xFFCC10CE         /* USB Receive Hub Address */</div><div class='add'>+#define USB_RXHUBADDR10            0xFFCC10D6         /* USB Receive Hub Address */</div><div class='add'>+#define USB_RXHUBADDR11            0xFFCC10DE         /* USB Receive Hub Address */</div><div class='add'>+#define USB_RXHUBPORT0             0xFFCC1087         /* USB Receive Hub Port */</div><div class='add'>+#define USB_RXHUBPORT1             0xFFCC108F         /* USB Receive Hub Port */</div><div class='add'>+#define USB_RXHUBPORT2             0xFFCC1097         /* USB Receive Hub Port */</div><div class='add'>+#define USB_RXHUBPORT3             0xFFCC109F         /* USB Receive Hub Port */</div><div class='add'>+#define USB_RXHUBPORT4             0xFFCC10A7         /* USB Receive Hub Port */</div><div class='add'>+#define USB_RXHUBPORT5             0xFFCC10AF         /* USB Receive Hub Port */</div><div class='add'>+#define USB_RXHUBPORT6             0xFFCC10B7         /* USB Receive Hub Port */</div><div class='add'>+#define USB_RXHUBPORT7             0xFFCC10BF         /* USB Receive Hub Port */</div><div class='add'>+#define USB_RXHUBPORT8             0xFFCC10C7         /* USB Receive Hub Port */</div><div class='add'>+#define USB_RXHUBPORT9             0xFFCC10CF         /* USB Receive Hub Port */</div><div class='add'>+#define USB_RXHUBPORT10            0xFFCC10D7         /* USB Receive Hub Port */</div><div class='add'>+#define USB_RXHUBPORT11            0xFFCC10DF         /* USB Receive Hub Port */</div><div class='add'>+#define USB_EP0_CSR0_H             0xFFCC1102         /* USB Config and Status EP0 */</div><div class='add'>+#define USB_EP0_CSR0_P             0xFFCC1102         /* USB Config and Status EP0 */</div><div class='add'>+#define USB_EP0_CNT0               0xFFCC1108         /* USB Number of Received Bytes for Endpoint 0 */</div><div class='add'>+#define USB_EP0_TYPE0              0xFFCC110A         /* USB Speed for Endpoint 0 */</div><div class='add'>+#define USB_EP0_NAKLIMIT0          0xFFCC110B         /* USB NAK Response Timeout for Endpoint 0 */</div><div class='add'>+#define USB_EP0_CFGDATA0           0xFFCC110F         /* USB Configuration Information */</div><div class='add'>+#define USB_EP_TXMAXP0             0xFFCC1110         /* USB Transmit Maximum Packet Length */</div><div class='add'>+#define USB_EP_TXMAXP1             0xFFCC1120         /* USB Transmit Maximum Packet Length */</div><div class='add'>+#define USB_EP_TXMAXP2             0xFFCC1130         /* USB Transmit Maximum Packet Length */</div><div class='add'>+#define USB_EP_TXMAXP3             0xFFCC1140         /* USB Transmit Maximum Packet Length */</div><div class='add'>+#define USB_EP_TXMAXP4             0xFFCC1150         /* USB Transmit Maximum Packet Length */</div><div class='add'>+#define USB_EP_TXMAXP5             0xFFCC1160         /* USB Transmit Maximum Packet Length */</div><div class='add'>+#define USB_EP_TXMAXP6             0xFFCC1170         /* USB Transmit Maximum Packet Length */</div><div class='add'>+#define USB_EP_TXMAXP7             0xFFCC1180         /* USB Transmit Maximum Packet Length */</div><div class='add'>+#define USB_EP_TXMAXP8             0xFFCC1190         /* USB Transmit Maximum Packet Length */</div><div class='add'>+#define USB_EP_TXMAXP9             0xFFCC11A0         /* USB Transmit Maximum Packet Length */</div><div class='add'>+#define USB_EP_TXMAXP10            0xFFCC11B0         /* USB Transmit Maximum Packet Length */</div><div class='add'>+#define USB_EP_TXCSR0_H            0xFFCC1112         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR1_H            0xFFCC1122         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR2_H            0xFFCC1132         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR3_H            0xFFCC1142         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR4_H            0xFFCC1152         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR5_H            0xFFCC1162         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR6_H            0xFFCC1172         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR7_H            0xFFCC1182         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR8_H            0xFFCC1192         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR9_H            0xFFCC11A2         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR10_H           0xFFCC11B2         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR0_P            0xFFCC1112         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR1_P            0xFFCC1122         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR2_P            0xFFCC1132         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR3_P            0xFFCC1142         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR4_P            0xFFCC1152         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR5_P            0xFFCC1162         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR6_P            0xFFCC1172         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR7_P            0xFFCC1182         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR8_P            0xFFCC1192         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR9_P            0xFFCC11A2         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_TXCSR10_P           0xFFCC11B2         /* USB Transmit Configuration and Status */</div><div class='add'>+#define USB_EP_RXMAXP0             0xFFCC1114         /* USB Receive Maximum Packet Length */</div><div class='add'>+#define USB_EP_RXMAXP1             0xFFCC1124         /* USB Receive Maximum Packet Length */</div><div class='add'>+#define USB_EP_RXMAXP2             0xFFCC1134         /* USB Receive Maximum Packet Length */</div><div class='add'>+#define USB_EP_RXMAXP3             0xFFCC1144         /* USB Receive Maximum Packet Length */</div><div class='add'>+#define USB_EP_RXMAXP4             0xFFCC1154         /* USB Receive Maximum Packet Length */</div><div class='add'>+#define USB_EP_RXMAXP5             0xFFCC1164         /* USB Receive Maximum Packet Length */</div><div class='add'>+#define USB_EP_RXMAXP6             0xFFCC1174         /* USB Receive Maximum Packet Length */</div><div class='add'>+#define USB_EP_RXMAXP7             0xFFCC1184         /* USB Receive Maximum Packet Length */</div><div class='add'>+#define USB_EP_RXMAXP8             0xFFCC1194         /* USB Receive Maximum Packet Length */</div><div class='add'>+#define USB_EP_RXMAXP9             0xFFCC11A4         /* USB Receive Maximum Packet Length */</div><div class='add'>+#define USB_EP_RXMAXP10            0xFFCC11B4         /* USB Receive Maximum Packet Length */</div><div class='add'>+#define USB_EP_RXCSR0_H            0xFFCC1116         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR1_H            0xFFCC1126         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR2_H            0xFFCC1136         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR3_H            0xFFCC1146         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR4_H            0xFFCC1156         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR5_H            0xFFCC1166         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR6_H            0xFFCC1176         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR7_H            0xFFCC1186         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR8_H            0xFFCC1196         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR9_H            0xFFCC11A6         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR10_H           0xFFCC11B6         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR0_P            0xFFCC1116         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR1_P            0xFFCC1126         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR2_P            0xFFCC1136         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR3_P            0xFFCC1146         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR4_P            0xFFCC1156         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR5_P            0xFFCC1166         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR6_P            0xFFCC1176         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR7_P            0xFFCC1186         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR8_P            0xFFCC1196         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR9_P            0xFFCC11A6         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCSR10_P           0xFFCC11B6         /* USB Receive Configuration and Status Register */</div><div class='add'>+#define USB_EP_RXCNT0              0xFFCC1118         /* USB Number of Byte Received */</div><div class='add'>+#define USB_EP_RXCNT1              0xFFCC1128         /* USB Number of Byte Received */</div><div class='add'>+#define USB_EP_RXCNT2              0xFFCC1138         /* USB Number of Byte Received */</div><div class='add'>+#define USB_EP_RXCNT3              0xFFCC1148         /* USB Number of Byte Received */</div><div class='add'>+#define USB_EP_RXCNT4              0xFFCC1158         /* USB Number of Byte Received */</div><div class='add'>+#define USB_EP_RXCNT5              0xFFCC1168         /* USB Number of Byte Received */</div><div class='add'>+#define USB_EP_RXCNT6              0xFFCC1178         /* USB Number of Byte Received */</div><div class='add'>+#define USB_EP_RXCNT7              0xFFCC1188         /* USB Number of Byte Received */</div><div class='add'>+#define USB_EP_RXCNT8              0xFFCC1198         /* USB Number of Byte Received */</div><div class='add'>+#define USB_EP_RXCNT9              0xFFCC11A8         /* USB Number of Byte Received */</div><div class='add'>+#define USB_EP_RXCNT10             0xFFCC11B8         /* USB Number of Byte Received */</div><div class='add'>+#define USB_EP_TXTYPE0             0xFFCC111A         /* USB Transmit Type */</div><div class='add'>+#define USB_EP_TXTYPE1             0xFFCC112A         /* USB Transmit Type */</div><div class='add'>+#define USB_EP_TXTYPE2             0xFFCC113A         /* USB Transmit Type */</div><div class='add'>+#define USB_EP_TXTYPE3             0xFFCC114A         /* USB Transmit Type */</div><div class='add'>+#define USB_EP_TXTYPE4             0xFFCC115A         /* USB Transmit Type */</div><div class='add'>+#define USB_EP_TXTYPE5             0xFFCC116A         /* USB Transmit Type */</div><div class='add'>+#define USB_EP_TXTYPE6             0xFFCC117A         /* USB Transmit Type */</div><div class='add'>+#define USB_EP_TXTYPE7             0xFFCC118A         /* USB Transmit Type */</div><div class='add'>+#define USB_EP_TXTYPE8             0xFFCC119A         /* USB Transmit Type */</div><div class='add'>+#define USB_EP_TXTYPE9             0xFFCC11AA         /* USB Transmit Type */</div><div class='add'>+#define USB_EP_TXTYPE10            0xFFCC11BA         /* USB Transmit Type */</div><div class='add'>+#define USB_EP_TXINTERVAL0         0xFFCC111B         /* USB Transmit Polling Interval */</div><div class='add'>+#define USB_EP_TXINTERVAL1         0xFFCC112B         /* USB Transmit Polling Interval */</div><div class='add'>+#define USB_EP_TXINTERVAL2         0xFFCC113B         /* USB Transmit Polling Interval */</div><div class='add'>+#define USB_EP_TXINTERVAL3         0xFFCC114B         /* USB Transmit Polling Interval */</div><div class='add'>+#define USB_EP_TXINTERVAL4         0xFFCC115B         /* USB Transmit Polling Interval */</div><div class='add'>+#define USB_EP_TXINTERVAL5         0xFFCC116B         /* USB Transmit Polling Interval */</div><div class='add'>+#define USB_EP_TXINTERVAL6         0xFFCC117B         /* USB Transmit Polling Interval */</div><div class='add'>+#define USB_EP_TXINTERVAL7         0xFFCC118B         /* USB Transmit Polling Interval */</div><div class='add'>+#define USB_EP_TXINTERVAL8         0xFFCC119B         /* USB Transmit Polling Interval */</div><div class='add'>+#define USB_EP_TXINTERVAL9         0xFFCC11AB         /* USB Transmit Polling Interval */</div><div class='add'>+#define USB_EP_TXINTERVAL10        0xFFCC11BB         /* USB Transmit Polling Interval */</div><div class='add'>+#define USB_EP_RXTYPE0             0xFFCC111C         /* USB Receive Type */</div><div class='add'>+#define USB_EP_RXTYPE1             0xFFCC112C         /* USB Receive Type */</div><div class='add'>+#define USB_EP_RXTYPE2             0xFFCC113C         /* USB Receive Type */</div><div class='add'>+#define USB_EP_RXTYPE3             0xFFCC114C         /* USB Receive Type */</div><div class='add'>+#define USB_EP_RXTYPE4             0xFFCC115C         /* USB Receive Type */</div><div class='add'>+#define USB_EP_RXTYPE5             0xFFCC116C         /* USB Receive Type */</div><div class='add'>+#define USB_EP_RXTYPE6             0xFFCC117C         /* USB Receive Type */</div><div class='add'>+#define USB_EP_RXTYPE7             0xFFCC118C         /* USB Receive Type */</div><div class='add'>+#define USB_EP_RXTYPE8             0xFFCC119C         /* USB Receive Type */</div><div class='add'>+#define USB_EP_RXTYPE9             0xFFCC11AC         /* USB Receive Type */</div><div class='add'>+#define USB_EP_RXTYPE10            0xFFCC11BC         /* USB Receive Type */</div><div class='add'>+#define USB_EP_RXINTERVAL0         0xFFCC111D         /* USB Receive Polling Interval */</div><div class='add'>+#define USB_EP_RXINTERVAL1         0xFFCC112D         /* USB Receive Polling Interval */</div><div class='add'>+#define USB_EP_RXINTERVAL2         0xFFCC113D         /* USB Receive Polling Interval */</div><div class='add'>+#define USB_EP_RXINTERVAL3         0xFFCC114D         /* USB Receive Polling Interval */</div><div class='add'>+#define USB_EP_RXINTERVAL4         0xFFCC115D         /* USB Receive Polling Interval */</div><div class='add'>+#define USB_EP_RXINTERVAL5         0xFFCC116D         /* USB Receive Polling Interval */</div><div class='add'>+#define USB_EP_RXINTERVAL6         0xFFCC117D         /* USB Receive Polling Interval */</div><div class='add'>+#define USB_EP_RXINTERVAL7         0xFFCC118D         /* USB Receive Polling Interval */</div><div class='add'>+#define USB_EP_RXINTERVAL8         0xFFCC119D         /* USB Receive Polling Interval */</div><div class='add'>+#define USB_EP_RXINTERVAL9         0xFFCC11AD         /* USB Receive Polling Interval */</div><div class='add'>+#define USB_EP_RXINTERVAL10        0xFFCC11BD         /* USB Receive Polling Interval */</div><div class='add'>+#define USB_DMA_IRQ                0xFFCC1200         /* USB Interrupt Register */</div><div class='add'>+#define USB_DMA_CTL0               0xFFCC1204         /* USB DMA Control */</div><div class='add'>+#define USB_DMA_CTL1               0xFFCC1214         /* USB DMA Control */</div><div class='add'>+#define USB_DMA_CTL2               0xFFCC1224         /* USB DMA Control */</div><div class='add'>+#define USB_DMA_CTL3               0xFFCC1234         /* USB DMA Control */</div><div class='add'>+#define USB_DMA_CTL4               0xFFCC1244         /* USB DMA Control */</div><div class='add'>+#define USB_DMA_CTL5               0xFFCC1254         /* USB DMA Control */</div><div class='add'>+#define USB_DMA_CTL6               0xFFCC1264         /* USB DMA Control */</div><div class='add'>+#define USB_DMA_CTL7               0xFFCC1274         /* USB DMA Control */</div><div class='add'>+#define USB_DMA_ADDR0              0xFFCC1208         /* USB DMA Address */</div><div class='add'>+#define USB_DMA_ADDR1              0xFFCC1218         /* USB DMA Address */</div><div class='add'>+#define USB_DMA_ADDR2              0xFFCC1228         /* USB DMA Address */</div><div class='add'>+#define USB_DMA_ADDR3              0xFFCC1238         /* USB DMA Address */</div><div class='add'>+#define USB_DMA_ADDR4              0xFFCC1248         /* USB DMA Address */</div><div class='add'>+#define USB_DMA_ADDR5              0xFFCC1258         /* USB DMA Address */</div><div class='add'>+#define USB_DMA_ADDR6              0xFFCC1268         /* USB DMA Address */</div><div class='add'>+#define USB_DMA_ADDR7              0xFFCC1278         /* USB DMA Address */</div><div class='add'>+#define USB_DMA_CNT0               0xFFCC120C         /* USB DMA Count */</div><div class='add'>+#define USB_DMA_CNT1               0xFFCC121C         /* USB DMA Count */</div><div class='add'>+#define USB_DMA_CNT2               0xFFCC122C         /* USB DMA Count */</div><div class='add'>+#define USB_DMA_CNT3               0xFFCC123C         /* USB DMA Count */</div><div class='add'>+#define USB_DMA_CNT4               0xFFCC124C         /* USB DMA Count */</div><div class='add'>+#define USB_DMA_CNT5               0xFFCC125C         /* USB DMA Count */</div><div class='add'>+#define USB_DMA_CNT6               0xFFCC126C         /* USB DMA Count */</div><div class='add'>+#define USB_DMA_CNT7               0xFFCC127C         /* USB DMA Count */</div><div class='add'>+#define USB_RQPKTCNT0              0xFFCC1300         /* USB Request Packet Count */</div><div class='add'>+#define USB_RQPKTCNT1              0xFFCC1304         /* USB Request Packet Count */</div><div class='add'>+#define USB_RQPKTCNT2              0xFFCC1308         /* USB Request Packet Count */</div><div class='add'>+#define USB_RQPKTCNT3              0xFFCC130C         /* USB Request Packet Count */</div><div class='add'>+#define USB_RQPKTCNT4              0xFFCC1310         /* USB Request Packet Count */</div><div class='add'>+#define USB_RQPKTCNT5              0xFFCC1314         /* USB Request Packet Count */</div><div class='add'>+#define USB_RQPKTCNT6              0xFFCC1318         /* USB Request Packet Count */</div><div class='add'>+#define USB_RQPKTCNT7              0xFFCC131C         /* USB Request Packet Count */</div><div class='add'>+#define USB_RQPKTCNT8              0xFFCC1320         /* USB Request Packet Count */</div><div class='add'>+#define USB_RQPKTCNT9              0xFFCC1324         /* USB Request Packet Count */</div><div class='add'>+#define USB_RQPKTCNT10             0xFFCC1328         /* USB Request Packet Count */</div><div class='add'>+#define USB_CT_UCH                 0xFFCC1344         /* USB Chirp Timeout */</div><div class='add'>+#define USB_CT_HHSRTN              0xFFCC1346         /* USB High Speed Resume Return to Normal */</div><div class='add'>+#define USB_CT_HSBT                0xFFCC1348         /* USB High Speed Timeout */</div><div class='add'>+#define USB_LPM_ATTR               0xFFCC1360         /* USB LPM Attribute */</div><div class='add'>+#define USB_LPM_CTL                0xFFCC1362         /* USB LPM Control */</div><div class='add'>+#define USB_LPM_IEN                0xFFCC1363         /* USB LPM Interrupt Enable */</div><div class='add'>+#define USB_LPM_IRQ                0xFFCC1364         /* USB LPM Interrupt */</div><div class='add'>+#define USB_LPM_FADDR              0xFFCC1365         /* USB LPM Function Address */</div><div class='add'>+#define USB_VBUS_CTL               0xFFCC1380         /* USB VBus Control */</div><div class='add'>+#define USB_BAT_CHG                0xFFCC1381         /* USB Battery Charging */</div><div class='add'>+#define USB_PHY_CTL                0xFFCC1394         /* USB PHY Control */</div><div class='add'>+#define USB_TESTCTL                0xFFCC1397         /* USB Test Control */</div><div class='add'>+#define USB_PLL_OSC                0xFFCC1398         /* USB PLL and Oscillator Control */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* =========================</div><div class='add'>+        CHIPID</div><div class='add'>+   ========================= */</div><div class='add'>+</div><div class='add'>+#define                           CHIPID  0xffc00014</div><div class='add'>+/* CHIPID Masks */</div><div class='add'>+#define                   CHIPID_VERSION  0xF0000000</div><div class='add'>+#define                    CHIPID_FAMILY  0x0FFFF000</div><div class='add'>+#define               CHIPID_MANUFACTURE  0x00000FFE</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#endif /* _DEF_BF60X_H */</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/dma.h b/arch/blackfin/mach-bf609/include/mach/dma.h<br/>new file mode 100644<br/>index 000000000000..872d141ca119<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/dma.h</a></div><div class='hunk'>@@ -0,0 +1,116 @@</div><div class='add'>+/* mach/dma.h - arch-specific DMA defines</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MACH_DMA_H_</div><div class='add'>+#define _MACH_DMA_H_</div><div class='add'>+</div><div class='add'>+#define CH_SPORT0_TX                   0</div><div class='add'>+#define CH_SPORT0_RX                   1</div><div class='add'>+#define CH_SPORT1_TX                   2</div><div class='add'>+#define CH_SPORT1_RX                   3</div><div class='add'>+#define CH_SPORT2_TX                   4</div><div class='add'>+#define CH_SPORT2_RX                   5</div><div class='add'>+#define CH_SPI0_TX                     6</div><div class='add'>+#define CH_SPI0_RX                     7</div><div class='add'>+#define CH_SPI1_TX                     8</div><div class='add'>+#define CH_SPI1_RX                     9</div><div class='add'>+#define CH_RSI                        10</div><div class='add'>+#define CH_SDU                        11</div><div class='add'>+#define CH_LP0                        13</div><div class='add'>+#define CH_LP1                        14</div><div class='add'>+#define CH_LP2                        15</div><div class='add'>+#define CH_LP3                        16</div><div class='add'>+#define CH_UART0_TX                   17</div><div class='add'>+#define CH_UART0_RX                   18</div><div class='add'>+#define CH_UART1_TX                   19</div><div class='add'>+#define CH_UART1_RX                   20</div><div class='add'>+#define CH_MEM_STREAM0_SRC_CRC0      21</div><div class='add'>+#define CH_MEM_STREAM0_SRC           CH_MEM_STREAM0_SRC_CRC0</div><div class='add'>+#define CH_MEM_STREAM0_DEST_CRC0     22</div><div class='add'>+#define CH_MEM_STREAM0_DEST          CH_MEM_STREAM0_DEST_CRC0</div><div class='add'>+#define CH_MEM_STREAM1_SRC_CRC1      23</div><div class='add'>+#define CH_MEM_STREAM1_SRC           CH_MEM_STREAM1_SRC_CRC1</div><div class='add'>+#define CH_MEM_STREAM1_DEST_CRC1     24</div><div class='add'>+#define CH_MEM_STREAM1_DEST          CH_MEM_STREAM1_DEST_CRC1</div><div class='add'>+#define CH_MEM_STREAM2_SRC           25</div><div class='add'>+#define CH_MEM_STREAM2_DEST          26</div><div class='add'>+#define CH_MEM_STREAM3_SRC           27</div><div class='add'>+#define CH_MEM_STREAM3_DEST          28</div><div class='add'>+#define CH_EPPI0_CH0                  29</div><div class='add'>+#define CH_EPPI0_CH1                  30</div><div class='add'>+#define CH_EPPI1_CH0                  31</div><div class='add'>+#define CH_EPPI1_CH1                  32</div><div class='add'>+#define CH_EPPI2_CH0                  33</div><div class='add'>+#define CH_EPPI2_CH1                  34</div><div class='add'>+#define CH_PIXC_CH0                   35</div><div class='add'>+#define CH_PIXC_CH1                   36</div><div class='add'>+#define CH_PIXC_CH2                   37</div><div class='add'>+#define CH_PVP_CPDOB                  38</div><div class='add'>+#define CH_PVP_CPDOC                  39</div><div class='add'>+#define CH_PVP_CPSTAT                 40</div><div class='add'>+#define CH_PVP_CPCI                   41</div><div class='add'>+#define CH_PVP_MPDO                   42</div><div class='add'>+#define CH_PVP_MPDI                   43</div><div class='add'>+#define CH_PVP_MPSTAT                 44</div><div class='add'>+#define CH_PVP_MPCI                   45</div><div class='add'>+#define CH_PVP_CPDOA                  46</div><div class='add'>+</div><div class='add'>+#define MAX_DMA_CHANNELS 47</div><div class='add'>+#define MAX_DMA_SUSPEND_CHANNELS 0</div><div class='add'>+#define DMA_MMR_SIZE_32</div><div class='add'>+</div><div class='add'>+#define bfin_read_MDMA_S0_CONFIG bfin_read_MDMA0_SRC_CRC0_CONFIG</div><div class='add'>+#define bfin_write_MDMA_S0_CONFIG bfin_write_MDMA0_SRC_CRC0_CONFIG</div><div class='add'>+#define bfin_read_MDMA_S0_IRQ_STATUS bfin_read_MDMA0_SRC_CRC0_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_S0_IRQ_STATUS bfin_write_MDMA0_SRC_CRC0_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_S0_START_ADDR bfin_write_MDMA0_SRC_CRC0_START_ADDR</div><div class='add'>+#define bfin_write_MDMA_S0_X_COUNT bfin_write_MDMA0_SRC_CRC0_X_COUNT</div><div class='add'>+#define bfin_write_MDMA_S0_X_MODIFY bfin_write_MDMA0_SRC_CRC0_X_MODIFY</div><div class='add'>+#define bfin_write_MDMA_S0_Y_COUNT bfin_write_MDMA0_SRC_CRC0_Y_COUNT</div><div class='add'>+#define bfin_write_MDMA_S0_Y_MODIFY bfin_write_MDMA0_SRC_CRC0_Y_MODIFY</div><div class='add'>+#define bfin_read_MDMA_D0_CONFIG bfin_read_MDMA0_DEST_CRC0_CONFIG</div><div class='add'>+#define bfin_write_MDMA_D0_CONFIG bfin_write_MDMA0_DEST_CRC0_CONFIG</div><div class='add'>+#define bfin_read_MDMA_D0_IRQ_STATUS bfin_read_MDMA0_DEST_CRC0_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_D0_IRQ_STATUS bfin_write_MDMA0_DEST_CRC0_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_D0_START_ADDR bfin_write_MDMA0_DEST_CRC0_START_ADDR</div><div class='add'>+#define bfin_write_MDMA_D0_X_COUNT bfin_write_MDMA0_DEST_CRC0_X_COUNT</div><div class='add'>+#define bfin_write_MDMA_D0_X_MODIFY bfin_write_MDMA0_DEST_CRC0_X_MODIFY</div><div class='add'>+#define bfin_write_MDMA_D0_Y_COUNT bfin_write_MDMA0_DEST_CRC0_Y_COUNT</div><div class='add'>+#define bfin_write_MDMA_D0_Y_MODIFY bfin_write_MDMA0_DEST_CRC0_Y_MODIFY</div><div class='add'>+</div><div class='add'>+#define bfin_read_MDMA_S1_CONFIG bfin_read_MDMA1_SRC_CRC1_CONFIG</div><div class='add'>+#define bfin_write_MDMA_S1_CONFIG bfin_write_MDMA1_SRC_CRC1_CONFIG</div><div class='add'>+#define bfin_read_MDMA_D1_CONFIG bfin_read_MDMA1_DEST_CRC1_CONFIG</div><div class='add'>+#define bfin_write_MDMA_D1_CONFIG bfin_write_MDMA1_DEST_CRC1_CONFIG</div><div class='add'>+#define bfin_read_MDMA_D1_IRQ_STATUS bfin_read_MDMA1_DEST_CRC1_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_D1_IRQ_STATUS bfin_write_MDMA1_DEST_CRC1_IRQ_STATUS</div><div class='add'>+</div><div class='add'>+#define bfin_read_MDMA_S3_CONFIG bfin_read_MDMA3_SRC_CONFIG</div><div class='add'>+#define bfin_write_MDMA_S3_CONFIG bfin_write_MDMA3_SRC_CONFIG</div><div class='add'>+#define bfin_read_MDMA_S3_IRQ_STATUS bfin_read_MDMA3_SRC_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_S3_IRQ_STATUS bfin_write_MDMA3_SRC_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_S3_START_ADDR bfin_write_MDMA3_SRC_START_ADDR</div><div class='add'>+#define bfin_write_MDMA_S3_X_COUNT bfin_write_MDMA3_SRC_X_COUNT</div><div class='add'>+#define bfin_write_MDMA_S3_X_MODIFY bfin_write_MDMA3_SRC_X_MODIFY</div><div class='add'>+#define bfin_write_MDMA_S3_Y_COUNT bfin_write_MDMA3_SRC_Y_COUNT</div><div class='add'>+#define bfin_write_MDMA_S3_Y_MODIFY bfin_write_MDMA3_SRC_Y_MODIFY</div><div class='add'>+#define bfin_read_MDMA_D3_CONFIG bfin_read_MDMA3_DEST_CONFIG</div><div class='add'>+#define bfin_write_MDMA_D3_CONFIG bfin_write_MDMA3_DEST_CONFIG</div><div class='add'>+#define bfin_read_MDMA_D3_IRQ_STATUS bfin_read_MDMA3_DEST_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_D3_IRQ_STATUS bfin_write_MDMA3_DEST_IRQ_STATUS</div><div class='add'>+#define bfin_write_MDMA_D3_START_ADDR bfin_write_MDMA3_DEST_START_ADDR</div><div class='add'>+#define bfin_write_MDMA_D3_X_COUNT bfin_write_MDMA3_DEST_X_COUNT</div><div class='add'>+#define bfin_write_MDMA_D3_X_MODIFY bfin_write_MDMA3_DEST_X_MODIFY</div><div class='add'>+#define bfin_write_MDMA_D3_Y_COUNT bfin_write_MDMA3_DEST_Y_COUNT</div><div class='add'>+#define bfin_write_MDMA_D3_Y_MODIFY bfin_write_MDMA3_DEST_Y_MODIFY</div><div class='add'>+</div><div class='add'>+#define MDMA_S0_NEXT_DESC_PTR MDMA0_SRC_CRC0_NEXT_DESC_PTR</div><div class='add'>+#define MDMA_D0_NEXT_DESC_PTR MDMA0_DEST_CRC0_NEXT_DESC_PTR</div><div class='add'>+#define MDMA_S1_NEXT_DESC_PTR MDMA1_SRC_CRC1_NEXT_DESC_PTR</div><div class='add'>+#define MDMA_D1_NEXT_DESC_PTR MDMA1_DEST_CRC1_NEXT_DESC_PTR</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/gpio.h b/arch/blackfin/mach-bf609/include/mach/gpio.h<br/>new file mode 100644<br/>index 000000000000..127586b1e04a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/gpio.h</a></div><div class='hunk'>@@ -0,0 +1,171 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2007-2009 Analog Devices Inc.</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MACH_GPIO_H_</div><div class='add'>+#define _MACH_GPIO_H_</div><div class='add'>+</div><div class='add'>+#define MAX_BLACKFIN_GPIOS 112</div><div class='add'>+</div><div class='add'>+#define GPIO_PA0	0</div><div class='add'>+#define GPIO_PA1	1</div><div class='add'>+#define GPIO_PA2	2</div><div class='add'>+#define GPIO_PA3	3</div><div class='add'>+#define GPIO_PA4	4</div><div class='add'>+#define GPIO_PA5	5</div><div class='add'>+#define GPIO_PA6	6</div><div class='add'>+#define GPIO_PA7	7</div><div class='add'>+#define GPIO_PA8	8</div><div class='add'>+#define GPIO_PA9	9</div><div class='add'>+#define GPIO_PA10	10</div><div class='add'>+#define GPIO_PA11	11</div><div class='add'>+#define GPIO_PA12	12</div><div class='add'>+#define GPIO_PA13	13</div><div class='add'>+#define GPIO_PA14	14</div><div class='add'>+#define GPIO_PA15	15</div><div class='add'>+#define GPIO_PB0	16</div><div class='add'>+#define GPIO_PB1	17</div><div class='add'>+#define GPIO_PB2	18</div><div class='add'>+#define GPIO_PB3	19</div><div class='add'>+#define GPIO_PB4	20</div><div class='add'>+#define GPIO_PB5	21</div><div class='add'>+#define GPIO_PB6	22</div><div class='add'>+#define GPIO_PB7	23</div><div class='add'>+#define GPIO_PB8	24</div><div class='add'>+#define GPIO_PB9	25</div><div class='add'>+#define GPIO_PB10	26</div><div class='add'>+#define GPIO_PB11	27</div><div class='add'>+#define GPIO_PB12	28</div><div class='add'>+#define GPIO_PB13	29</div><div class='add'>+#define GPIO_PB14	30</div><div class='add'>+#define GPIO_PB15	31</div><div class='add'>+#define GPIO_PC0	32</div><div class='add'>+#define GPIO_PC1	33</div><div class='add'>+#define GPIO_PC2	34</div><div class='add'>+#define GPIO_PC3	35</div><div class='add'>+#define GPIO_PC4	36</div><div class='add'>+#define GPIO_PC5	37</div><div class='add'>+#define GPIO_PC6	38</div><div class='add'>+#define GPIO_PC7	39</div><div class='add'>+#define GPIO_PC8	40</div><div class='add'>+#define GPIO_PC9	41</div><div class='add'>+#define GPIO_PC10	42</div><div class='add'>+#define GPIO_PC11	43</div><div class='add'>+#define GPIO_PC12	44</div><div class='add'>+#define GPIO_PC13	45</div><div class='add'>+#define GPIO_PC14	46</div><div class='add'>+#define GPIO_PC15	47</div><div class='add'>+#define GPIO_PD0	48</div><div class='add'>+#define GPIO_PD1	49</div><div class='add'>+#define GPIO_PD2	50</div><div class='add'>+#define GPIO_PD3	51</div><div class='add'>+#define GPIO_PD4	52</div><div class='add'>+#define GPIO_PD5	53</div><div class='add'>+#define GPIO_PD6	54</div><div class='add'>+#define GPIO_PD7	55</div><div class='add'>+#define GPIO_PD8	56</div><div class='add'>+#define GPIO_PD9	57</div><div class='add'>+#define GPIO_PD10	58</div><div class='add'>+#define GPIO_PD11	59</div><div class='add'>+#define GPIO_PD12	60</div><div class='add'>+#define GPIO_PD13	61</div><div class='add'>+#define GPIO_PD14	62</div><div class='add'>+#define GPIO_PD15	63</div><div class='add'>+#define GPIO_PE0	64</div><div class='add'>+#define GPIO_PE1	65</div><div class='add'>+#define GPIO_PE2	66</div><div class='add'>+#define GPIO_PE3	67</div><div class='add'>+#define GPIO_PE4	68</div><div class='add'>+#define GPIO_PE5	69</div><div class='add'>+#define GPIO_PE6	70</div><div class='add'>+#define GPIO_PE7	71</div><div class='add'>+#define GPIO_PE8	72</div><div class='add'>+#define GPIO_PE9	73</div><div class='add'>+#define GPIO_PE10	74</div><div class='add'>+#define GPIO_PE11	75</div><div class='add'>+#define GPIO_PE12	76</div><div class='add'>+#define GPIO_PE13	77</div><div class='add'>+#define GPIO_PE14	78</div><div class='add'>+#define GPIO_PE15	79</div><div class='add'>+#define GPIO_PF0	80</div><div class='add'>+#define GPIO_PF1	81</div><div class='add'>+#define GPIO_PF2	82</div><div class='add'>+#define GPIO_PF3	83</div><div class='add'>+#define GPIO_PF4	84</div><div class='add'>+#define GPIO_PF5	85</div><div class='add'>+#define GPIO_PF6	86</div><div class='add'>+#define GPIO_PF7	87</div><div class='add'>+#define GPIO_PF8	88</div><div class='add'>+#define GPIO_PF9	89</div><div class='add'>+#define GPIO_PF10	90</div><div class='add'>+#define GPIO_PF11	91</div><div class='add'>+#define GPIO_PF12	92</div><div class='add'>+#define GPIO_PF13	93</div><div class='add'>+#define GPIO_PF14	94</div><div class='add'>+#define GPIO_PF15	95</div><div class='add'>+#define GPIO_PG0	96</div><div class='add'>+#define GPIO_PG1	97</div><div class='add'>+#define GPIO_PG2	98</div><div class='add'>+#define GPIO_PG3	99</div><div class='add'>+#define GPIO_PG4	100</div><div class='add'>+#define GPIO_PG5	101</div><div class='add'>+#define GPIO_PG6	102</div><div class='add'>+#define GPIO_PG7	103</div><div class='add'>+#define GPIO_PG8	104</div><div class='add'>+#define GPIO_PG9	105</div><div class='add'>+#define GPIO_PG10	106</div><div class='add'>+#define GPIO_PG11	107</div><div class='add'>+#define GPIO_PG12	108</div><div class='add'>+#define GPIO_PG13	109</div><div class='add'>+#define GPIO_PG14	110</div><div class='add'>+#define GPIO_PG15	111</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define BFIN_GPIO_PINT 1</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+</div><div class='add'>+struct gpio_port_t {</div><div class='add'>+	unsigned long port_fer;</div><div class='add'>+	unsigned long port_fer_set;</div><div class='add'>+	unsigned long port_fer_clear;</div><div class='add'>+	unsigned long data;</div><div class='add'>+	unsigned long data_set;</div><div class='add'>+	unsigned long data_clear;</div><div class='add'>+	unsigned long dir;</div><div class='add'>+	unsigned long dir_set;</div><div class='add'>+	unsigned long dir_clear;</div><div class='add'>+	unsigned long inen;</div><div class='add'>+	unsigned long inen_set;</div><div class='add'>+	unsigned long inen_clear;</div><div class='add'>+	unsigned long port_mux;</div><div class='add'>+	unsigned long toggle;</div><div class='add'>+	unsigned long polar;</div><div class='add'>+	unsigned long polar_set;</div><div class='add'>+	unsigned long polar_clear;</div><div class='add'>+	unsigned long lock;</div><div class='add'>+	unsigned long spare;</div><div class='add'>+	unsigned long revid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gpio_port_s {</div><div class='add'>+	unsigned short fer;</div><div class='add'>+	unsigned short data;</div><div class='add'>+	unsigned short dir;</div><div class='add'>+	unsigned short inen;</div><div class='add'>+	unsigned int mux;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#include &lt;mach-common/ports-a.h&gt;</div><div class='add'>+#include &lt;mach-common/ports-b.h&gt;</div><div class='add'>+#include &lt;mach-common/ports-c.h&gt;</div><div class='add'>+#include &lt;mach-common/ports-d.h&gt;</div><div class='add'>+#include &lt;mach-common/ports-e.h&gt;</div><div class='add'>+#include &lt;mach-common/ports-f.h&gt;</div><div class='add'>+#include &lt;mach-common/ports-g.h&gt;</div><div class='add'>+</div><div class='add'>+#endif /* _MACH_GPIO_H_ */</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/irq.h b/arch/blackfin/mach-bf609/include/mach/irq.h<br/>new file mode 100644<br/>index 000000000000..0004552433b2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/irq.h</a></div><div class='hunk'>@@ -0,0 +1,318 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _BF60x_IRQ_H_</div><div class='add'>+#define _BF60x_IRQ_H_</div><div class='add'>+</div><div class='add'>+#include &lt;mach-common/irq.h&gt;</div><div class='add'>+</div><div class='add'>+#undef BFIN_IRQ</div><div class='add'>+#define BFIN_IRQ(x) ((x) + IVG15)</div><div class='add'>+</div><div class='add'>+#define NR_PERI_INTS		(5 * 32)</div><div class='add'>+</div><div class='add'>+#define IRQ_SEC_ERR		BFIN_IRQ(0)	/* SEC Error */</div><div class='add'>+#define IRQ_CGU_EVT		BFIN_IRQ(1)	/* CGU Event */</div><div class='add'>+#define IRQ_WATCH0		BFIN_IRQ(2)	/* Watchdog0 Interrupt */</div><div class='add'>+#define IRQ_WATCH1		BFIN_IRQ(3)	/* Watchdog1 Interrupt */</div><div class='add'>+#define IRQ_L2CTL0_ECC_ERR	BFIN_IRQ(4)	/* L2 ECC Error */</div><div class='add'>+#define IRQ_L2CTL0_ECC_WARN	BFIN_IRQ(5)	/* L2 ECC Waring */</div><div class='add'>+#define IRQ_C0_DBL_FAULT	BFIN_IRQ(6)	/* Core 0 Double Fault */</div><div class='add'>+#define IRQ_C1_DBL_FAULT	BFIN_IRQ(7)	/* Core 1 Double Fault */</div><div class='add'>+#define IRQ_C0_HW_ERR		BFIN_IRQ(8)	/* Core 0 Hardware Error */</div><div class='add'>+#define IRQ_C1_HW_ERR		BFIN_IRQ(9)	/* Core 1 Hardware Error */</div><div class='add'>+#define IRQ_C0_NMI_L1_PARITY_ERR	BFIN_IRQ(10)	/* Core 0 Unhandled NMI or L1 Memory Parity Error */</div><div class='add'>+#define IRQ_C1_NMI_L1_PARITY_ERR	BFIN_IRQ(11)	/* Core 1 Unhandled NMI or L1 Memory Parity Error */</div><div class='add'>+#define CORE_IRQS		(IRQ_C1_NMI_L1_PARITY_ERR + 1)</div><div class='add'>+</div><div class='add'>+#define IRQ_TIMER0		BFIN_IRQ(12)	/* Timer 0 Interrupt */</div><div class='add'>+#define IRQ_TIMER1		BFIN_IRQ(13)	/* Timer 1 Interrupt */</div><div class='add'>+#define IRQ_TIMER2		BFIN_IRQ(14)	/* Timer 2 Interrupt */</div><div class='add'>+#define IRQ_TIMER3		BFIN_IRQ(15)	/* Timer 3 Interrupt */</div><div class='add'>+#define IRQ_TIMER4		BFIN_IRQ(16)	/* Timer 4 Interrupt */</div><div class='add'>+#define IRQ_TIMER5		BFIN_IRQ(17)	/* Timer 5 Interrupt */</div><div class='add'>+#define IRQ_TIMER6		BFIN_IRQ(18)	/* Timer 6 Interrupt */</div><div class='add'>+#define IRQ_TIMER7		BFIN_IRQ(19)	/* Timer 7 Interrupt */</div><div class='add'>+#define IRQ_TIMER_STAT		BFIN_IRQ(20)	/* Timer Block Status */</div><div class='add'>+#define IRQ_PINT0		BFIN_IRQ(21)	/* PINT0 Interrupt */</div><div class='add'>+#define IRQ_PINT1		BFIN_IRQ(22)	/* PINT1 Interrupt */</div><div class='add'>+#define IRQ_PINT2		BFIN_IRQ(23)	/* PINT2 Interrupt */</div><div class='add'>+#define IRQ_PINT3		BFIN_IRQ(24)	/* PINT3 Interrupt */</div><div class='add'>+#define IRQ_PINT4		BFIN_IRQ(25)	/* PINT4 Interrupt */</div><div class='add'>+#define IRQ_PINT5		BFIN_IRQ(26)	/* PINT5 Interrupt */</div><div class='add'>+#define IRQ_CNT			BFIN_IRQ(27)	/* CNT Interrupt */</div><div class='add'>+#define IRQ_PWM0_TRIP		BFIN_IRQ(28)	/* PWM0 Trip Interrupt */</div><div class='add'>+#define IRQ_PWM0_SYNC		BFIN_IRQ(29)	/* PWM0 Sync Interrupt */</div><div class='add'>+#define IRQ_PWM1_TRIP		BFIN_IRQ(30)	/* PWM1 Trip Interrupt */</div><div class='add'>+#define IRQ_PWM1_SYNC		BFIN_IRQ(31)	/* PWM1 Sync Interrupt */</div><div class='add'>+#define IRQ_TWI0		BFIN_IRQ(32)	/* TWI0 Interrupt */</div><div class='add'>+#define IRQ_TWI1		BFIN_IRQ(33)	/* TWI1 Interrupt */</div><div class='add'>+#define IRQ_SOFT0		BFIN_IRQ(34)	/* Software-Driven Interrupt 0 */</div><div class='add'>+#define IRQ_SOFT1		BFIN_IRQ(35)	/* Software-Driven Interrupt 1 */</div><div class='add'>+#define IRQ_SOFT2		BFIN_IRQ(36)	/* Software-Driven Interrupt 2 */</div><div class='add'>+#define IRQ_SOFT3		BFIN_IRQ(37)	/* Software-Driven Interrupt 3 */</div><div class='add'>+#define IRQ_ACM_EVT_MISS	BFIN_IRQ(38)	/* ACM Event Miss */</div><div class='add'>+#define IRQ_ACM_EVT_COMPLETE 	BFIN_IRQ(39)	/* ACM Event Complete */</div><div class='add'>+#define IRQ_CAN0_RX		BFIN_IRQ(40)	/* CAN0 Receive Interrupt */</div><div class='add'>+#define IRQ_CAN0_TX		BFIN_IRQ(41)	/* CAN0 Transmit Interrupt */</div><div class='add'>+#define IRQ_CAN0_STAT		BFIN_IRQ(42)	/* CAN0 Status */</div><div class='add'>+#define IRQ_SPORT0_TX		BFIN_IRQ(43)	/* SPORT0 TX Interrupt (DMA0) */</div><div class='add'>+#define IRQ_SPORT0_TX_STAT	BFIN_IRQ(44)	/* SPORT0 TX Status Interrupt */</div><div class='add'>+#define IRQ_SPORT0_RX		BFIN_IRQ(45)	/* SPORT0 RX Interrupt (DMA1) */</div><div class='add'>+#define IRQ_SPORT0_RX_STAT	BFIN_IRQ(46)	/* SPORT0 RX Status Interrupt */</div><div class='add'>+#define IRQ_SPORT1_TX		BFIN_IRQ(47)	/* SPORT1 TX Interrupt (DMA2) */</div><div class='add'>+#define IRQ_SPORT1_TX_STAT	BFIN_IRQ(48)	/* SPORT1 TX Status Interrupt */</div><div class='add'>+#define IRQ_SPORT1_RX		BFIN_IRQ(49)	/* SPORT1 RX Interrupt (DMA3) */</div><div class='add'>+#define IRQ_SPORT1_RX_STAT	BFIN_IRQ(50)	/* SPORT1 RX Status Interrupt */</div><div class='add'>+#define IRQ_SPORT2_TX		BFIN_IRQ(51)	/* SPORT2 TX Interrupt (DMA4) */</div><div class='add'>+#define IRQ_SPORT2_TX_STAT	BFIN_IRQ(52)	/* SPORT2 TX Status Interrupt */</div><div class='add'>+#define IRQ_SPORT2_RX		BFIN_IRQ(53)	/* SPORT2 RX Interrupt (DMA5) */</div><div class='add'>+#define IRQ_SPORT2_RX_STAT	BFIN_IRQ(54)	/* SPORT2 RX Status Interrupt */</div><div class='add'>+#define IRQ_SPI0_TX		BFIN_IRQ(55)	/* SPI0 TX Interrupt (DMA6) */</div><div class='add'>+#define IRQ_SPI0_RX		BFIN_IRQ(56)	/* SPI0 RX Interrupt (DMA7) */</div><div class='add'>+#define IRQ_SPI0_STAT		BFIN_IRQ(57)	/* SPI0 Status Interrupt */</div><div class='add'>+#define IRQ_SPI1_TX		BFIN_IRQ(58)	/* SPI1 TX Interrupt (DMA8) */</div><div class='add'>+#define IRQ_SPI1_RX		BFIN_IRQ(59)	/* SPI1 RX Interrupt (DMA9) */</div><div class='add'>+#define IRQ_SPI1_STAT		BFIN_IRQ(60)	/* SPI1 Status Interrupt */</div><div class='add'>+#define IRQ_RSI			BFIN_IRQ(61)	/* RSI (DMA10) Interrupt */</div><div class='add'>+#define IRQ_RSI_INT0		BFIN_IRQ(62)	/* RSI Interrupt0 */</div><div class='add'>+#define IRQ_RSI_INT1		BFIN_IRQ(63)	/* RSI Interrupt1 */</div><div class='add'>+#define IRQ_SDU			BFIN_IRQ(64)	/* DMA11 Data (SDU) */</div><div class='add'>+/*       -- RESERVED --             65		   DMA12 Data (Reserved) */</div><div class='add'>+/*       -- RESERVED --             66		   Reserved */</div><div class='add'>+/*       -- RESERVED --             67		   Reserved */</div><div class='add'>+#define IRQ_EMAC0_STAT		BFIN_IRQ(68)	/* EMAC0 Status */</div><div class='add'>+/*       -- RESERVED --             69		   EMAC0 Power (Reserved) */</div><div class='add'>+#define IRQ_EMAC1_STAT		BFIN_IRQ(70)	/* EMAC1 Status */</div><div class='add'>+/*       -- RESERVED --             71		   EMAC1 Power (Reserved) */</div><div class='add'>+#define IRQ_LP0			BFIN_IRQ(72)	/* DMA13 Data (Link Port 0) */</div><div class='add'>+#define IRQ_LP0_STAT		BFIN_IRQ(73)	/* Link Port 0 Status */</div><div class='add'>+#define IRQ_LP1			BFIN_IRQ(74)	/* DMA14 Data (Link Port 1) */</div><div class='add'>+#define IRQ_LP1_STAT		BFIN_IRQ(75)	/* Link Port 1 Status */</div><div class='add'>+#define IRQ_LP2			BFIN_IRQ(76)	/* DMA15 Data (Link Port 2) */</div><div class='add'>+#define IRQ_LP2_STAT		BFIN_IRQ(77)	/* Link Port 2 Status */</div><div class='add'>+#define IRQ_LP3			BFIN_IRQ(78)	/* DMA16 Data(Link Port 3) */</div><div class='add'>+#define IRQ_LP3_STAT		BFIN_IRQ(79)	/* Link Port 3 Status */</div><div class='add'>+#define IRQ_UART0_TX		BFIN_IRQ(80)	/* UART0 TX Interrupt (DMA17) */</div><div class='add'>+#define IRQ_UART0_RX		BFIN_IRQ(81)	/* UART0 RX Interrupt (DMA18) */</div><div class='add'>+#define IRQ_UART0_STAT		BFIN_IRQ(82)	/* UART0 Status(Error) Interrupt */</div><div class='add'>+#define IRQ_UART1_TX		BFIN_IRQ(83)	/* UART1 TX Interrupt (DMA19) */</div><div class='add'>+#define IRQ_UART1_RX		BFIN_IRQ(84)	/* UART1 RX Interrupt (DMA20) */</div><div class='add'>+#define IRQ_UART1_STAT		BFIN_IRQ(85)	/* UART1 Status(Error) Interrupt */</div><div class='add'>+#define IRQ_MDMA0_SRC_CRC0	BFIN_IRQ(86)	/* DMA21 Data (MDMA Stream 0 Source/CRC0 Input Channel) */</div><div class='add'>+#define IRQ_MDMA0_DEST_CRC0	BFIN_IRQ(87)	/* DMA22 Data (MDMA Stream 0 Destination/CRC0 Output Channel) */</div><div class='add'>+#define IRQ_MDMAS0		IRQ_MDMA0_DEST_CRC0</div><div class='add'>+#define IRQ_CRC0_DCNTEXP	BFIN_IRQ(88)	/* CRC0 DATACOUNT Expiration */</div><div class='add'>+#define IRQ_CRC0_ERR		BFIN_IRQ(89)	/* CRC0 Error */</div><div class='add'>+#define IRQ_MDMA1_SRC_CRC1	BFIN_IRQ(90)	/* DMA23 Data (MDMA Stream 1 Source/CRC1 Input Channel) */</div><div class='add'>+#define IRQ_MDMA1_DEST_CRC1	BFIN_IRQ(91)	/* DMA24 Data (MDMA Stream 1 Destination/CRC1 Output Channel) */</div><div class='add'>+#define IRQ_MDMAS1		IRQ_MDMA1_DEST_CRC1</div><div class='add'>+#define IRQ_CRC1_DCNTEXP	BFIN_IRQ(92)	/* CRC1 DATACOUNT Expiration */</div><div class='add'>+#define IRQ_CRC1_ERR		BFIN_IRQ(93)	/* CRC1 Error */</div><div class='add'>+#define IRQ_MDMA2_SRC		BFIN_IRQ(94)	/* DMA25 Data (MDMA Stream 2 Source Channel) */</div><div class='add'>+#define IRQ_MDMA2_DEST		BFIN_IRQ(95)	/* DMA26 Data (MDMA Stream 2 Destination Channel) */</div><div class='add'>+#define IRQ_MDMAS2		IRQ_MDMA2_DEST</div><div class='add'>+#define IRQ_MDMA3_SRC		BFIN_IRQ(96)	/* DMA27 Data (MDMA Stream 3 Source Channel) */</div><div class='add'>+#define IRQ_MDMA3_DEST 		BFIN_IRQ(97)	/* DMA28 Data (MDMA Stream 3 Destination Channel) */</div><div class='add'>+#define IRQ_MDMAS3		IRQ_MDMA3_DEST</div><div class='add'>+#define IRQ_EPPI0_CH0 		BFIN_IRQ(98)	/* DMA29 Data (EPPI0 Channel 0) */</div><div class='add'>+#define IRQ_EPPI0_CH1 		BFIN_IRQ(99)	/* DMA30 Data (EPPI0 Channel 1) */</div><div class='add'>+#define IRQ_EPPI0_STAT		BFIN_IRQ(100)	/* EPPI0 Status */</div><div class='add'>+#define IRQ_EPPI2_CH0		BFIN_IRQ(101)	/* DMA31 Data (EPPI2 Channel 0) */</div><div class='add'>+#define IRQ_EPPI2_CH1		BFIN_IRQ(102)	/* DMA32 Data (EPPI2 Channel 1) */</div><div class='add'>+#define IRQ_EPPI2_STAT		BFIN_IRQ(103)	/* EPPI2 Status */</div><div class='add'>+#define IRQ_EPPI1_CH0		BFIN_IRQ(104)	/* DMA33 Data (EPPI1 Channel 0) */</div><div class='add'>+#define IRQ_EPPI1_CH1		BFIN_IRQ(105)	/* DMA34 Data (EPPI1 Channel 1) */</div><div class='add'>+#define IRQ_EPPI1_STAT		BFIN_IRQ(106)	/* EPPI1 Status */</div><div class='add'>+#define IRQ_PIXC_CH0		BFIN_IRQ(107)	/* DMA35 Data (PIXC Channel 0) */</div><div class='add'>+#define IRQ_PIXC_CH1		BFIN_IRQ(108)	/* DMA36 Data (PIXC Channel 1) */</div><div class='add'>+#define IRQ_PIXC_CH2		BFIN_IRQ(109)	/* DMA37 Data (PIXC Channel 2) */</div><div class='add'>+#define IRQ_PIXC_STAT		BFIN_IRQ(110)	/* PIXC Status */</div><div class='add'>+#define IRQ_PVP_CPDOB		BFIN_IRQ(111)	/* DMA38 Data (PVP0 Camera Pipe Data Out B) */</div><div class='add'>+#define IRQ_PVP_CPDOC		BFIN_IRQ(112)	/* DMA39 Data (PVP0 Camera Pipe Data Out C) */</div><div class='add'>+#define IRQ_PVP_CPSTAT		BFIN_IRQ(113)	/* DMA40 Data (PVP0 Camera Pipe Status Out) */</div><div class='add'>+#define IRQ_PVP_CPCI		BFIN_IRQ(114)	/* DMA41 Data (PVP0 Camera Pipe Control In) */</div><div class='add'>+#define IRQ_PVP_STAT0		BFIN_IRQ(115)	/* PVP0 Status 0 */</div><div class='add'>+#define IRQ_PVP_MPDO		BFIN_IRQ(116)	/* DMA42 Data (PVP0 Memory Pipe Data Out) */</div><div class='add'>+#define IRQ_PVP_MPDI		BFIN_IRQ(117)	/* DMA43 Data (PVP0 Memory Pipe Data In) */</div><div class='add'>+#define IRQ_PVP_MPSTAT		BFIN_IRQ(118)	/* DMA44 Data (PVP0 Memory Pipe Status Out) */</div><div class='add'>+#define IRQ_PVP_MPCI		BFIN_IRQ(119)	/* DMA45 Data (PVP0 Memory Pipe Control In) */</div><div class='add'>+#define IRQ_PVP_CPDOA		BFIN_IRQ(120)	/* DMA46 Data (PVP0 Camera Pipe Data Out A) */</div><div class='add'>+#define IRQ_PVP_STAT1		BFIN_IRQ(121)	/* PVP0 Status 1 */</div><div class='add'>+#define IRQ_USB_STAT		BFIN_IRQ(122)	/* USB Status Interrupt */</div><div class='add'>+#define IRQ_USB_DMA		BFIN_IRQ(123)	/* USB DMA Interrupt */</div><div class='add'>+#define IRQ_TRU_INT0		BFIN_IRQ(124)	/* TRU0 Interrupt 0 */</div><div class='add'>+#define IRQ_TRU_INT1		BFIN_IRQ(125)	/* TRU0 Interrupt 1 */</div><div class='add'>+#define IRQ_TRU_INT2		BFIN_IRQ(126)	/* TRU0 Interrupt 2 */</div><div class='add'>+#define IRQ_TRU_INT3		BFIN_IRQ(127)	/* TRU0 Interrupt 3 */</div><div class='add'>+#define IRQ_DMAC0_ERROR		BFIN_IRQ(128)	/* DMAC0 Status Interrupt */</div><div class='add'>+#define IRQ_CGU0_ERROR		BFIN_IRQ(129)	/* CGU0 Error */</div><div class='add'>+/*       -- RESERVED --             130		   Reserved */</div><div class='add'>+#define IRQ_DPM			BFIN_IRQ(131)	/* DPM0 Event */</div><div class='add'>+/*       -- RESERVED --             132		   Reserved */</div><div class='add'>+#define IRQ_SWU0		BFIN_IRQ(133)	/* SWU0 */</div><div class='add'>+#define IRQ_SWU1		BFIN_IRQ(134)	/* SWU1 */</div><div class='add'>+#define IRQ_SWU2		BFIN_IRQ(135)	/* SWU2 */</div><div class='add'>+#define IRQ_SWU3		BFIN_IRQ(136)	/* SWU3 */</div><div class='add'>+#define IRQ_SWU4		BFIN_IRQ(137)	/* SWU4 */</div><div class='add'>+#define IRQ_SWU5		BFIN_IRQ(138)	/* SWU5 */</div><div class='add'>+#define IRQ_SWU6		BFIN_IRQ(139)	/* SWU6 */</div><div class='add'>+</div><div class='add'>+#define SYS_IRQS		IRQ_SWU6</div><div class='add'>+</div><div class='add'>+#define BFIN_PA_IRQ(x)		((x) + SYS_IRQS + 1)</div><div class='add'>+#define IRQ_PA0			BFIN_PA_IRQ(0)</div><div class='add'>+#define IRQ_PA1			BFIN_PA_IRQ(1)</div><div class='add'>+#define IRQ_PA2			BFIN_PA_IRQ(2)</div><div class='add'>+#define IRQ_PA3			BFIN_PA_IRQ(3)</div><div class='add'>+#define IRQ_PA4			BFIN_PA_IRQ(4)</div><div class='add'>+#define IRQ_PA5			BFIN_PA_IRQ(5)</div><div class='add'>+#define IRQ_PA6			BFIN_PA_IRQ(6)</div><div class='add'>+#define IRQ_PA7			BFIN_PA_IRQ(7)</div><div class='add'>+#define IRQ_PA8			BFIN_PA_IRQ(8)</div><div class='add'>+#define IRQ_PA9			BFIN_PA_IRQ(9)</div><div class='add'>+#define IRQ_PA10		BFIN_PA_IRQ(10)</div><div class='add'>+#define IRQ_PA11		BFIN_PA_IRQ(11)</div><div class='add'>+#define IRQ_PA12		BFIN_PA_IRQ(12)</div><div class='add'>+#define IRQ_PA13		BFIN_PA_IRQ(13)</div><div class='add'>+#define IRQ_PA14		BFIN_PA_IRQ(14)</div><div class='add'>+#define IRQ_PA15		BFIN_PA_IRQ(15)</div><div class='add'>+</div><div class='add'>+#define BFIN_PB_IRQ(x)		((x) + IRQ_PA15 + 1)</div><div class='add'>+#define IRQ_PB0			BFIN_PB_IRQ(0)</div><div class='add'>+#define IRQ_PB1			BFIN_PB_IRQ(1)</div><div class='add'>+#define IRQ_PB2			BFIN_PB_IRQ(2)</div><div class='add'>+#define IRQ_PB3			BFIN_PB_IRQ(3)</div><div class='add'>+#define IRQ_PB4			BFIN_PB_IRQ(4)</div><div class='add'>+#define IRQ_PB5			BFIN_PB_IRQ(5)</div><div class='add'>+#define IRQ_PB6			BFIN_PB_IRQ(6)</div><div class='add'>+#define IRQ_PB7			BFIN_PB_IRQ(7)</div><div class='add'>+#define IRQ_PB8			BFIN_PB_IRQ(8)</div><div class='add'>+#define IRQ_PB9			BFIN_PB_IRQ(9)</div><div class='add'>+#define IRQ_PB10		BFIN_PB_IRQ(10)</div><div class='add'>+#define IRQ_PB11		BFIN_PB_IRQ(11)</div><div class='add'>+#define IRQ_PB12		BFIN_PB_IRQ(12)</div><div class='add'>+#define IRQ_PB13		BFIN_PB_IRQ(13)</div><div class='add'>+#define IRQ_PB14		BFIN_PB_IRQ(14)</div><div class='add'>+#define IRQ_PB15		BFIN_PB_IRQ(15)		/* N/A */</div><div class='add'>+</div><div class='add'>+#define BFIN_PC_IRQ(x)		((x) + IRQ_PB15 + 1)</div><div class='add'>+#define IRQ_PC0			BFIN_PC_IRQ(0)</div><div class='add'>+#define IRQ_PC1			BFIN_PC_IRQ(1)</div><div class='add'>+#define IRQ_PC2			BFIN_PC_IRQ(2)</div><div class='add'>+#define IRQ_PC3			BFIN_PC_IRQ(3)</div><div class='add'>+#define IRQ_PC4			BFIN_PC_IRQ(4)</div><div class='add'>+#define IRQ_PC5			BFIN_PC_IRQ(5)</div><div class='add'>+#define IRQ_PC6			BFIN_PC_IRQ(6)</div><div class='add'>+#define IRQ_PC7			BFIN_PC_IRQ(7)</div><div class='add'>+#define IRQ_PC8			BFIN_PC_IRQ(8)</div><div class='add'>+#define IRQ_PC9			BFIN_PC_IRQ(9)</div><div class='add'>+#define IRQ_PC10		BFIN_PC_IRQ(10)</div><div class='add'>+#define IRQ_PC11		BFIN_PC_IRQ(11)</div><div class='add'>+#define IRQ_PC12		BFIN_PC_IRQ(12)</div><div class='add'>+#define IRQ_PC13		BFIN_PC_IRQ(13)</div><div class='add'>+#define IRQ_PC14		BFIN_PC_IRQ(14)		/* N/A */</div><div class='add'>+#define IRQ_PC15		BFIN_PC_IRQ(15)		/* N/A */</div><div class='add'>+</div><div class='add'>+#define BFIN_PD_IRQ(x)		((x) + IRQ_PC15 + 1)</div><div class='add'>+#define IRQ_PD0			BFIN_PD_IRQ(0)</div><div class='add'>+#define IRQ_PD1			BFIN_PD_IRQ(1)</div><div class='add'>+#define IRQ_PD2			BFIN_PD_IRQ(2)</div><div class='add'>+#define IRQ_PD3			BFIN_PD_IRQ(3)</div><div class='add'>+#define IRQ_PD4			BFIN_PD_IRQ(4)</div><div class='add'>+#define IRQ_PD5			BFIN_PD_IRQ(5)</div><div class='add'>+#define IRQ_PD6			BFIN_PD_IRQ(6)</div><div class='add'>+#define IRQ_PD7			BFIN_PD_IRQ(7)</div><div class='add'>+#define IRQ_PD8			BFIN_PD_IRQ(8)</div><div class='add'>+#define IRQ_PD9			BFIN_PD_IRQ(9)</div><div class='add'>+#define IRQ_PD10		BFIN_PD_IRQ(10)</div><div class='add'>+#define IRQ_PD11		BFIN_PD_IRQ(11)</div><div class='add'>+#define IRQ_PD12		BFIN_PD_IRQ(12)</div><div class='add'>+#define IRQ_PD13		BFIN_PD_IRQ(13)</div><div class='add'>+#define IRQ_PD14		BFIN_PD_IRQ(14)</div><div class='add'>+#define IRQ_PD15		BFIN_PD_IRQ(15)</div><div class='add'>+</div><div class='add'>+#define BFIN_PE_IRQ(x)		((x) + IRQ_PD15 + 1)</div><div class='add'>+#define IRQ_PE0			BFIN_PE_IRQ(0)</div><div class='add'>+#define IRQ_PE1			BFIN_PE_IRQ(1)</div><div class='add'>+#define IRQ_PE2			BFIN_PE_IRQ(2)</div><div class='add'>+#define IRQ_PE3			BFIN_PE_IRQ(3)</div><div class='add'>+#define IRQ_PE4			BFIN_PE_IRQ(4)</div><div class='add'>+#define IRQ_PE5			BFIN_PE_IRQ(5)</div><div class='add'>+#define IRQ_PE6			BFIN_PE_IRQ(6)</div><div class='add'>+#define IRQ_PE7			BFIN_PE_IRQ(7)</div><div class='add'>+#define IRQ_PE8			BFIN_PE_IRQ(8)</div><div class='add'>+#define IRQ_PE9			BFIN_PE_IRQ(9)</div><div class='add'>+#define IRQ_PE10		BFIN_PE_IRQ(10)</div><div class='add'>+#define IRQ_PE11		BFIN_PE_IRQ(11)</div><div class='add'>+#define IRQ_PE12		BFIN_PE_IRQ(12)</div><div class='add'>+#define IRQ_PE13		BFIN_PE_IRQ(13)</div><div class='add'>+#define IRQ_PE14		BFIN_PE_IRQ(14)</div><div class='add'>+#define IRQ_PE15		BFIN_PE_IRQ(15)</div><div class='add'>+</div><div class='add'>+#define BFIN_PF_IRQ(x)		((x) + IRQ_PE15 + 1)</div><div class='add'>+#define IRQ_PF0			BFIN_PF_IRQ(0)</div><div class='add'>+#define IRQ_PF1			BFIN_PF_IRQ(1)</div><div class='add'>+#define IRQ_PF2			BFIN_PF_IRQ(2)</div><div class='add'>+#define IRQ_PF3			BFIN_PF_IRQ(3)</div><div class='add'>+#define IRQ_PF4			BFIN_PF_IRQ(4)</div><div class='add'>+#define IRQ_PF5			BFIN_PF_IRQ(5)</div><div class='add'>+#define IRQ_PF6			BFIN_PF_IRQ(6)</div><div class='add'>+#define IRQ_PF7			BFIN_PF_IRQ(7)</div><div class='add'>+#define IRQ_PF8			BFIN_PF_IRQ(8)</div><div class='add'>+#define IRQ_PF9			BFIN_PF_IRQ(9)</div><div class='add'>+#define IRQ_PF10		BFIN_PF_IRQ(10)</div><div class='add'>+#define IRQ_PF11		BFIN_PF_IRQ(11)</div><div class='add'>+#define IRQ_PF12		BFIN_PF_IRQ(12)</div><div class='add'>+#define IRQ_PF13		BFIN_PF_IRQ(13)</div><div class='add'>+#define IRQ_PF14		BFIN_PF_IRQ(14)</div><div class='add'>+#define IRQ_PF15		BFIN_PF_IRQ(15)</div><div class='add'>+</div><div class='add'>+#define BFIN_PG_IRQ(x)		((x) + IRQ_PF15 + 1)</div><div class='add'>+#define IRQ_PG0			BFIN_PG_IRQ(0)</div><div class='add'>+#define IRQ_PG1			BFIN_PG_IRQ(1)</div><div class='add'>+#define IRQ_PG2			BFIN_PG_IRQ(2)</div><div class='add'>+#define IRQ_PG3			BFIN_PG_IRQ(3)</div><div class='add'>+#define IRQ_PG4			BFIN_PG_IRQ(4)</div><div class='add'>+#define IRQ_PG5			BFIN_PG_IRQ(5)</div><div class='add'>+#define IRQ_PG6			BFIN_PG_IRQ(6)</div><div class='add'>+#define IRQ_PG7			BFIN_PG_IRQ(7)</div><div class='add'>+#define IRQ_PG8			BFIN_PG_IRQ(8)</div><div class='add'>+#define IRQ_PG9			BFIN_PG_IRQ(9)</div><div class='add'>+#define IRQ_PG10		BFIN_PG_IRQ(10)</div><div class='add'>+#define IRQ_PG11		BFIN_PG_IRQ(11)</div><div class='add'>+#define IRQ_PG12		BFIN_PG_IRQ(12)</div><div class='add'>+#define IRQ_PG13		BFIN_PG_IRQ(13)</div><div class='add'>+#define IRQ_PG14		BFIN_PG_IRQ(14)</div><div class='add'>+#define IRQ_PG15		BFIN_PG_IRQ(15)</div><div class='add'>+</div><div class='add'>+#define GPIO_IRQ_BASE		IRQ_PA0</div><div class='add'>+</div><div class='add'>+#define NR_MACH_IRQS		(IRQ_PG15 + 1)</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * bfin pint registers layout</div><div class='add'>+ */</div><div class='add'>+struct bfin_pint_regs {</div><div class='add'>+	u32 mask_set;</div><div class='add'>+	u32 mask_clear;</div><div class='add'>+	u32 request;</div><div class='add'>+	u32 assign;</div><div class='add'>+	u32 edge_set;</div><div class='add'>+	u32 edge_clear;</div><div class='add'>+	u32 invert_set;</div><div class='add'>+	u32 invert_clear;</div><div class='add'>+	u32 pinstate;</div><div class='add'>+	u32 latch;</div><div class='add'>+	u32 __pad0[2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/mem_map.h b/arch/blackfin/mach-bf609/include/mach/mem_map.h<br/>new file mode 100644<br/>index 000000000000..20b65bfc5311<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/mem_map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/mem_map.h</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+/*</div><div class='add'>+ * BF60x memory map</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __BFIN_MACH_MEM_MAP_H__</div><div class='add'>+#define __BFIN_MACH_MEM_MAP_H__</div><div class='add'>+</div><div class='add'>+#ifndef __BFIN_MEM_MAP_H__</div><div class='add'>+# error "do not include mach/mem_map.h directly -- use asm/mem_map.h"</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* Async Memory Banks */</div><div class='add'>+#define ASYNC_BANK3_BASE	0xBC000000	 /* Async Bank 3 */</div><div class='add'>+#define ASYNC_BANK3_SIZE	0x04000000	/* 64M */</div><div class='add'>+#define ASYNC_BANK2_BASE	0xB8000000	 /* Async Bank 2 */</div><div class='add'>+#define ASYNC_BANK2_SIZE	0x04000000	/* 64M */</div><div class='add'>+#define ASYNC_BANK1_BASE	0xB4000000	 /* Async Bank 1 */</div><div class='add'>+#define ASYNC_BANK1_SIZE	0x04000000	/* 64M */</div><div class='add'>+#define ASYNC_BANK0_BASE	0xB0000000	 /* Async Bank 0 */</div><div class='add'>+#define ASYNC_BANK0_SIZE	0x04000000	/* 64M */</div><div class='add'>+</div><div class='add'>+/* Boot ROM Memory */</div><div class='add'>+</div><div class='add'>+#define BOOT_ROM_START		0xC8000000</div><div class='add'>+#define BOOT_ROM_LENGTH		0x8000</div><div class='add'>+</div><div class='add'>+/* Level 1 Memory */</div><div class='add'>+</div><div class='add'>+/* Memory Map for ADSP-BF60x processors */</div><div class='add'>+#ifdef CONFIG_BFIN_ICACHE</div><div class='add'>+#define BFIN_ICACHESIZE	(16*1024)</div><div class='add'>+#define L1_CODE_LENGTH      0x10000</div><div class='add'>+#else</div><div class='add'>+#define BFIN_ICACHESIZE	(0*1024)</div><div class='add'>+#define L1_CODE_LENGTH      0x14000</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define L1_CODE_START       0xFFA00000</div><div class='add'>+#define L1_DATA_A_START     0xFF800000</div><div class='add'>+#define L1_DATA_B_START     0xFF900000</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define COREA_L1_SCRATCH_START  0xFFB00000</div><div class='add'>+#define COREB_L1_SCRATCH_START  0xFF700000</div><div class='add'>+</div><div class='add'>+#define COREB_L1_CODE_START       0xFF600000</div><div class='add'>+#define COREB_L1_DATA_A_START     0xFF400000</div><div class='add'>+#define COREB_L1_DATA_B_START     0xFF500000</div><div class='add'>+</div><div class='add'>+#define COREB_L1_CODE_LENGTH     0x14000</div><div class='add'>+#define COREB_L1_DATA_A_LENGTH   0x8000</div><div class='add'>+#define COREB_L1_DATA_B_LENGTH   0x8000</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_BFIN_DCACHE</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_BFIN_DCACHE_BANKA</div><div class='add'>+#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0)</div><div class='add'>+#define L1_DATA_A_LENGTH      (0x8000 - 0x4000)</div><div class='add'>+#define L1_DATA_B_LENGTH      0x8000</div><div class='add'>+#define BFIN_DCACHESIZE	(16*1024)</div><div class='add'>+#define BFIN_DSUPBANKS	1</div><div class='add'>+#else</div><div class='add'>+#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0)</div><div class='add'>+#define L1_DATA_A_LENGTH      (0x8000 - 0x4000)</div><div class='add'>+#define L1_DATA_B_LENGTH      (0x8000 - 0x4000)</div><div class='add'>+#define BFIN_DCACHESIZE	(32*1024)</div><div class='add'>+#define BFIN_DSUPBANKS	2</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0)</div><div class='add'>+#define L1_DATA_A_LENGTH      0x8000</div><div class='add'>+#define L1_DATA_B_LENGTH      0x8000</div><div class='add'>+#define BFIN_DCACHESIZE	(0*1024)</div><div class='add'>+#define BFIN_DSUPBANKS	0</div><div class='add'>+#endif /*CONFIG_BFIN_DCACHE*/</div><div class='add'>+</div><div class='add'>+/* Level 2 Memory */</div><div class='add'>+#define L2_START            0xC8080000</div><div class='add'>+#define L2_LENGTH           0x40000</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/pll.h b/arch/blackfin/mach-bf609/include/mach/pll.h<br/>new file mode 100644<br/>index 000000000000..1857a4a0f262<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/pll.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/pll.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+/* #include &lt;mach-common/pll.h&gt; */</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/pm.h b/arch/blackfin/mach-bf609/include/mach/pm.h<br/>new file mode 100644<br/>index 000000000000..036d9bdc889e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/pm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/pm.h</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+/*</div><div class='add'>+ * Blackfin bf609 power management</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MACH_BF609_PM_H__</div><div class='add'>+#define __MACH_BF609_PM_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/suspend.h&gt;</div><div class='add'>+</div><div class='add'>+int bfin609_pm_enter(suspend_state_t state);</div><div class='add'>+int bf609_pm_prepare(void);</div><div class='add'>+void bf609_pm_finish(void);</div><div class='add'>+</div><div class='add'>+void bf609_hibernate(void);</div><div class='add'>+void bfin_sec_raise_irq(unsigned int sid);</div><div class='add'>+void coreb_enable(void);</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/include/mach/portmux.h b/arch/blackfin/mach-bf609/include/mach/portmux.h<br/>new file mode 100644<br/>index 000000000000..2e1a51c25098<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/include/mach/portmux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/include/mach/portmux.h</a></div><div class='hunk'>@@ -0,0 +1,347 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MACH_PORTMUX_H_</div><div class='add'>+#define _MACH_PORTMUX_H_</div><div class='add'>+</div><div class='add'>+#define MAX_RESOURCES	MAX_BLACKFIN_GPIOS</div><div class='add'>+</div><div class='add'>+/* EMAC RMII Port Mux */</div><div class='add'>+#define P_MII0_MDC	(P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0))</div><div class='add'>+#define P_MII0_MDIO	(P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0))</div><div class='add'>+#define P_MII0_ETxD0	(P_DEFINED | P_IDENT(GPIO_PC2) | P_FUNCT(0))</div><div class='add'>+#define P_MII0_ERxD0	(P_DEFINED | P_IDENT(GPIO_PC0) | P_FUNCT(0))</div><div class='add'>+#define P_MII0_ETxD1	(P_DEFINED | P_IDENT(GPIO_PC3) | P_FUNCT(0))</div><div class='add'>+#define P_MII0_ERxD1	(P_DEFINED | P_IDENT(GPIO_PC1) | P_FUNCT(0))</div><div class='add'>+#define P_MII0_ETxEN	(P_DEFINED | P_IDENT(GPIO_PB13) | P_FUNCT(0))</div><div class='add'>+#define P_MII0_PHYINT	(P_DEFINED | P_IDENT(GPIO_PD6) | P_FUNCT(0))</div><div class='add'>+#define P_MII0_CRS	(P_DEFINED | P_IDENT(GPIO_PC5) | P_FUNCT(0))</div><div class='add'>+#define P_MII0_ERxER	(P_DEFINED | P_IDENT(GPIO_PC4) | P_FUNCT(0))</div><div class='add'>+#define P_MII0_TxCLK	(P_DEFINED | P_IDENT(GPIO_PB14) | P_FUNCT(0))</div><div class='add'>+</div><div class='add'>+#define P_RMII0 {\</div><div class='add'>+	P_MII0_ETxD0, \</div><div class='add'>+	P_MII0_ETxD1, \</div><div class='add'>+	P_MII0_ETxEN, \</div><div class='add'>+	P_MII0_ERxD0, \</div><div class='add'>+	P_MII0_ERxD1, \</div><div class='add'>+	P_MII0_ERxER, \</div><div class='add'>+	P_MII0_TxCLK, \</div><div class='add'>+	P_MII0_PHYINT, \</div><div class='add'>+	P_MII0_CRS, \</div><div class='add'>+	P_MII0_MDC, \</div><div class='add'>+	P_MII0_MDIO, 0}</div><div class='add'>+</div><div class='add'>+#define P_MII1_MDC	(P_DEFINED | P_IDENT(GPIO_PE10) | P_FUNCT(0))</div><div class='add'>+#define P_MII1_MDIO	(P_DEFINED | P_IDENT(GPIO_PE11) | P_FUNCT(0))</div><div class='add'>+#define P_MII1_ETxD0	(P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0))</div><div class='add'>+#define P_MII1_ERxD0	(P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0))</div><div class='add'>+#define P_MII1_ETxD1	(P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(0))</div><div class='add'>+#define P_MII1_ERxD1	(P_DEFINED | P_IDENT(GPIO_PE15) | P_FUNCT(0))</div><div class='add'>+#define P_MII1_ETxEN	(P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(0))</div><div class='add'>+#define P_MII1_PHYINT	(P_DEFINED | P_IDENT(GPIO_PE12) | P_FUNCT(0))</div><div class='add'>+#define P_MII1_CRS	(P_DEFINED | P_IDENT(GPIO_PE13) | P_FUNCT(0))</div><div class='add'>+#define P_MII1_ERxER	(P_DEFINED | P_IDENT(GPIO_PE14) | P_FUNCT(0))</div><div class='add'>+#define P_MII1_TxCLK	(P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(0))</div><div class='add'>+</div><div class='add'>+#define P_RMII1 {\</div><div class='add'>+	P_MII1_ETxD0, \</div><div class='add'>+	P_MII1_ETxD1, \</div><div class='add'>+	P_MII1_ETxEN, \</div><div class='add'>+	P_MII1_ERxD0, \</div><div class='add'>+	P_MII1_ERxD1, \</div><div class='add'>+	P_MII1_ERxER, \</div><div class='add'>+	P_MII1_TxCLK, \</div><div class='add'>+	P_MII1_PHYINT, \</div><div class='add'>+	P_MII1_CRS, \</div><div class='add'>+	P_MII1_MDC, \</div><div class='add'>+	P_MII1_MDIO, 0}</div><div class='add'>+</div><div class='add'>+/* PPI Port Mux */</div><div class='add'>+#define P_PPI0_D0	(P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D1	(P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D2	(P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D3	(P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D4	(P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D5	(P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D6	(P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D7	(P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D8	(P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D9	(P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D10	(P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D11	(P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D12	(P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D13	(P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D14	(P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D15	(P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D16	(P_DEFINED | P_IDENT(GPIO_PE3) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D17	(P_DEFINED | P_IDENT(GPIO_PE4) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D18	(P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D19	(P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D20	(P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D21	(P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D22	(P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_D23	(P_DEFINED | P_IDENT(GPIO_PE5) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_CLK	(P_DEFINED | P_IDENT(GPIO_PE9) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_FS1	(P_DEFINED | P_IDENT(GPIO_PE8) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_FS2	(P_DEFINED | P_IDENT(GPIO_PE7) | P_FUNCT(1))</div><div class='add'>+#define P_PPI0_FS3	(P_DEFINED | P_IDENT(GPIO_PE6) | P_FUNCT(1))</div><div class='add'>+</div><div class='add'>+#define P_PPI1_D0	(P_DEFINED | P_IDENT(GPIO_PC0) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D1	(P_DEFINED | P_IDENT(GPIO_PC1) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D2	(P_DEFINED | P_IDENT(GPIO_PC2) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D3	(P_DEFINED | P_IDENT(GPIO_PC3) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D4	(P_DEFINED | P_IDENT(GPIO_PC4) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D5	(P_DEFINED | P_IDENT(GPIO_PC5) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D6	(P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D7	(P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D8	(P_DEFINED | P_IDENT(GPIO_PC8) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D9	(P_DEFINED | P_IDENT(GPIO_PC9) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D10	(P_DEFINED | P_IDENT(GPIO_PC10) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D11	(P_DEFINED | P_IDENT(GPIO_PC11) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D12	(P_DEFINED | P_IDENT(GPIO_PC12) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D13	(P_DEFINED | P_IDENT(GPIO_PC13) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D14	(P_DEFINED | P_IDENT(GPIO_PC14) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D15	(P_DEFINED | P_IDENT(GPIO_PC15) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D16	(P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_D17	(P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_CLK	(P_DEFINED | P_IDENT(GPIO_PB14) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_FS1	(P_DEFINED | P_IDENT(GPIO_PB13) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_FS2	(P_DEFINED | P_IDENT(GPIO_PD6) | P_FUNCT(1))</div><div class='add'>+#define P_PPI1_FS3	(P_DEFINED | P_IDENT(GPIO_PB15) | P_FUNCT(1))</div><div class='add'>+</div><div class='add'>+#define P_PPI2_D0	(P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D1	(P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D2	(P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D3	(P_DEFINED | P_IDENT(GPIO_PA3) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D4	(P_DEFINED | P_IDENT(GPIO_PA4) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D5	(P_DEFINED | P_IDENT(GPIO_PA5) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D6	(P_DEFINED | P_IDENT(GPIO_PA6) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D7	(P_DEFINED | P_IDENT(GPIO_PA7) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D8	(P_DEFINED | P_IDENT(GPIO_PA8) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D9	(P_DEFINED | P_IDENT(GPIO_PA9) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D10	(P_DEFINED | P_IDENT(GPIO_PA10) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D11	(P_DEFINED | P_IDENT(GPIO_PA11) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D12	(P_DEFINED | P_IDENT(GPIO_PA12) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D13	(P_DEFINED | P_IDENT(GPIO_PA13) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D14	(P_DEFINED | P_IDENT(GPIO_PA14) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D15	(P_DEFINED | P_IDENT(GPIO_PA15) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D16	(P_DEFINED | P_IDENT(GPIO_PB7) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_D17	(P_DEFINED | P_IDENT(GPIO_PB8) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_CLK	(P_DEFINED | P_IDENT(GPIO_PB0) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_FS1	(P_DEFINED | P_IDENT(GPIO_PB1) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_FS2	(P_DEFINED | P_IDENT(GPIO_PB2) | P_FUNCT(1))</div><div class='add'>+#define P_PPI2_FS3	(P_DEFINED | P_IDENT(GPIO_PB3) | P_FUNCT(1))</div><div class='add'>+</div><div class='add'>+/* SPI Port Mux */</div><div class='add'>+#define P_SPI0_SS	(P_DEFINED | P_IDENT(GPIO_PD11) | P_FUNCT(3))</div><div class='add'>+#define P_SPI0_SCK	(P_DEFINED | P_IDENT(GPIO_PD4) | P_FUNCT(0))</div><div class='add'>+#define P_SPI0_MISO	(P_DEFINED | P_IDENT(GPIO_PD2) | P_FUNCT(0))</div><div class='add'>+#define P_SPI0_MOSI	(P_DEFINED | P_IDENT(GPIO_PD3) | P_FUNCT(0))</div><div class='add'>+#define P_SPI0_RDY	(P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(0))</div><div class='add'>+#define P_SPI0_D2	(P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(0))</div><div class='add'>+#define P_SPI0_D3	(P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(0))</div><div class='add'>+</div><div class='add'>+#define P_SPI0_SSEL1	(P_DEFINED | P_IDENT(GPIO_PD11) | P_FUNCT(0))</div><div class='add'>+#define P_SPI0_SSEL2	(P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(2))</div><div class='add'>+#define P_SPI0_SSEL3	(P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(2))</div><div class='add'>+#define P_SPI0_SSEL4	(P_DEFINED | P_IDENT(GPIO_PC15) | P_FUNCT(0))</div><div class='add'>+#define P_SPI0_SSEL5	(P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(0))</div><div class='add'>+#define P_SPI0_SSEL6	(P_DEFINED | P_IDENT(GPIO_PC13) | P_FUNCT(0))</div><div class='add'>+#define P_SPI0_SSEL7	(P_DEFINED | P_IDENT(GPIO_PC12) | P_FUNCT(0))</div><div class='add'>+</div><div class='add'>+#define P_SPI1_SS	(P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(3))</div><div class='add'>+#define P_SPI1_SCK	(P_DEFINED | P_IDENT(GPIO_PD5) | P_FUNCT(0))</div><div class='add'>+#define P_SPI1_MISO	(P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(0))</div><div class='add'>+#define P_SPI1_MOSI	(P_DEFINED | P_IDENT(GPIO_PD13) | P_FUNCT(0))</div><div class='add'>+#define P_SPI1_RDY	(P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0))</div><div class='add'>+#define P_SPI1_D2	(P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0))</div><div class='add'>+#define P_SPI1_D3	(P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0))</div><div class='add'>+</div><div class='add'>+#define P_SPI1_SSEL1	(P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(0))</div><div class='add'>+#define P_SPI1_SSEL2	(P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(2))</div><div class='add'>+#define P_SPI1_SSEL3	(P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(2))</div><div class='add'>+#define P_SPI1_SSEL4	(P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(2))</div><div class='add'>+#define P_SPI1_SSEL5	(P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(0))</div><div class='add'>+#define P_SPI1_SSEL6	(P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(0))</div><div class='add'>+#define P_SPI1_SSEL7	(P_DEFINED | P_IDENT(GPIO_PC14) | P_FUNCT(0))</div><div class='add'>+</div><div class='add'>+#define GPIO_DEFAULT_BOOT_SPI_CS</div><div class='add'>+#define P_DEFAULT_BOOT_SPI_CS</div><div class='add'>+</div><div class='add'>+/* CORE IDLE  */</div><div class='add'>+#define P_IDLEA		(P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(1))</div><div class='add'>+#define P_IDLEB		(P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(1))</div><div class='add'>+#define P_SLEEP		(P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(2))</div><div class='add'>+</div><div class='add'>+/* UART Port Mux */</div><div class='add'>+#define P_UART0_TX	(P_DEFINED | P_IDENT(GPIO_PD7) | P_FUNCT(1))</div><div class='add'>+#define P_UART0_RX	(P_DEFINED | P_IDENT(GPIO_PD8) | P_FUNCT(1))</div><div class='add'>+#define P_UART0_RTS	(P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(1))</div><div class='add'>+#define P_UART0_CTS	(P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(1))</div><div class='add'>+</div><div class='add'>+#define P_UART1_TX	(P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(0))</div><div class='add'>+#define P_UART1_RX	(P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(0))</div><div class='add'>+#define P_UART1_RTS	(P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(0))</div><div class='add'>+#define P_UART1_CTS	(P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(0))</div><div class='add'>+</div><div class='add'>+/* Timer */</div><div class='add'>+#define P_TMRCLK	(P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(3))</div><div class='add'>+#define P_TMR0		(P_DEFINED | P_IDENT(GPIO_PE14) | P_FUNCT(2))</div><div class='add'>+#define P_TMR1		(P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(1))</div><div class='add'>+#define P_TMR2		(P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(1))</div><div class='add'>+#define P_TMR3		(P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(1))</div><div class='add'>+#define P_TMR4		(P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(1))</div><div class='add'>+#define P_TMR5		(P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(1))</div><div class='add'>+#define P_TMR6		(P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(1))</div><div class='add'>+#define P_TMR7		(P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(1))</div><div class='add'>+</div><div class='add'>+/* RSI */</div><div class='add'>+#define P_RSI_DATA0	(P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(2))</div><div class='add'>+#define P_RSI_DATA1	(P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2))</div><div class='add'>+#define P_RSI_DATA2	(P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(2))</div><div class='add'>+#define P_RSI_DATA3	(P_DEFINED | P_IDENT(GPIO_PE15) | P_FUNCT(2))</div><div class='add'>+#define P_RSI_DATA4	(P_DEFINED | P_IDENT(GPIO_PE13) | P_FUNCT(2))</div><div class='add'>+#define P_RSI_DATA5	(P_DEFINED | P_IDENT(GPIO_PE12) | P_FUNCT(2))</div><div class='add'>+#define P_RSI_DATA6	(P_DEFINED | P_IDENT(GPIO_PE10) | P_FUNCT(2))</div><div class='add'>+#define P_RSI_DATA7	(P_DEFINED | P_IDENT(GPIO_PE11) | P_FUNCT(2))</div><div class='add'>+#define P_RSI_CMD	(P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(1))</div><div class='add'>+#define P_RSI_CLK	(P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(1))</div><div class='add'>+</div><div class='add'>+/* PTP */</div><div class='add'>+#define P_PTP0_PPS	(P_DEFINED | P_IDENT(GPIO_PB15) | P_FUNCT(0))</div><div class='add'>+#define P_PTP0_CLKIN	(P_DEFINED | P_IDENT(GPIO_PC13) | P_FUNCT(2))</div><div class='add'>+#define P_PTP0_AUXIN	(P_DEFINED | P_IDENT(GPIO_PC11) | P_FUNCT(2))</div><div class='add'>+</div><div class='add'>+#define P_PTP1_PPS	(P_DEFINED | P_IDENT(GPIO_PC9) | P_FUNCT(0))</div><div class='add'>+#define P_PTP1_CLKIN	(P_DEFINED | P_IDENT(GPIO_PC13) | P_FUNCT(2))</div><div class='add'>+#define P_PTP1_AUXIN	(P_DEFINED | P_IDENT(GPIO_PC11) | P_FUNCT(2))</div><div class='add'>+</div><div class='add'>+/* SMC Port Mux */</div><div class='add'>+#define P_A3		(P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))</div><div class='add'>+#define P_A4		(P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))</div><div class='add'>+#define P_A5		(P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))</div><div class='add'>+#define P_A6		(P_DEFINED | P_IDENT(GPIO_PA3) | P_FUNCT(0))</div><div class='add'>+#define P_A7		(P_DEFINED | P_IDENT(GPIO_PA4) | P_FUNCT(0))</div><div class='add'>+#define P_A8		(P_DEFINED | P_IDENT(GPIO_PA5) | P_FUNCT(0))</div><div class='add'>+#define P_A9		(P_DEFINED | P_IDENT(GPIO_PA6) | P_FUNCT(0))</div><div class='add'>+#define P_A10		(P_DEFINED | P_IDENT(GPIO_PA7) | P_FUNCT(0))</div><div class='add'>+#define P_A11		(P_DEFINED | P_IDENT(GPIO_PA8) | P_FUNCT(0))</div><div class='add'>+#define P_A12		(P_DEFINED | P_IDENT(GPIO_PA9) | P_FUNCT(0))</div><div class='add'>+#define P_A13		(P_DEFINED | P_IDENT(GPIO_PB2) | P_FUNCT(0))</div><div class='add'>+#define P_A14		(P_DEFINED | P_IDENT(GPIO_PA10) | P_FUNCT(0))</div><div class='add'>+#define P_A15		(P_DEFINED | P_IDENT(GPIO_PA11) | P_FUNCT(0))</div><div class='add'>+#define P_A16		(P_DEFINED | P_IDENT(GPIO_PB3) | P_FUNCT(0))</div><div class='add'>+#define P_A17		(P_DEFINED | P_IDENT(GPIO_PA12) | P_FUNCT(0))</div><div class='add'>+#define P_A18		(P_DEFINED | P_IDENT(GPIO_PA13) | P_FUNCT(0))</div><div class='add'>+#define P_A19		(P_DEFINED | P_IDENT(GPIO_PA14) | P_FUNCT(0))</div><div class='add'>+#define P_A20		(P_DEFINED | P_IDENT(GPIO_PA15) | P_FUNCT(0))</div><div class='add'>+#define P_A21		(P_DEFINED | P_IDENT(GPIO_PB6) | P_FUNCT(0))</div><div class='add'>+#define P_A22		(P_DEFINED | P_IDENT(GPIO_PB7) | P_FUNCT(0))</div><div class='add'>+#define P_A23		(P_DEFINED | P_IDENT(GPIO_PB8) | P_FUNCT(0))</div><div class='add'>+#define P_A24		(P_DEFINED | P_IDENT(GPIO_PB10) | P_FUNCT(0))</div><div class='add'>+#define P_A25		(P_DEFINED | P_IDENT(GPIO_PB11) | P_FUNCT(0))</div><div class='add'>+#define P_NORCK         (P_DEFINED | P_IDENT(GPIO_PB0) | P_FUNCT(0))</div><div class='add'>+</div><div class='add'>+#define P_AMS1		(P_DEFINED | P_IDENT(GPIO_PB1) | P_FUNCT(0))</div><div class='add'>+#define P_AMS2		(P_DEFINED | P_IDENT(GPIO_PB4) | P_FUNCT(0))</div><div class='add'>+#define P_AMS3		(P_DEFINED | P_IDENT(GPIO_PB5) | P_FUNCT(0))</div><div class='add'>+</div><div class='add'>+/* CAN */</div><div class='add'>+#define P_CAN0_TX	(P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2))</div><div class='add'>+#define P_CAN0_RX	(P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(2))</div><div class='add'>+</div><div class='add'>+/* SPORT */</div><div class='add'>+#define P_SPORT0_ACLK	(P_DEFINED | P_IDENT(GPIO_PB5) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT0_AFS	(P_DEFINED | P_IDENT(GPIO_PB4) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT0_AD0	(P_DEFINED | P_IDENT(GPIO_PB9) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT0_AD1	(P_DEFINED | P_IDENT(GPIO_PB12) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT0_ATDV	(P_DEFINED | P_IDENT(GPIO_PB6) | P_FUNCT(1))</div><div class='add'>+#define P_SPORT0_BCLK	(P_DEFINED | P_IDENT(GPIO_PB8) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT0_BFS	(P_DEFINED | P_IDENT(GPIO_PB7) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT0_BD0	(P_DEFINED | P_IDENT(GPIO_PB11) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT0_BD1	(P_DEFINED | P_IDENT(GPIO_PB10) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT0_BTDV	(P_DEFINED | P_IDENT(GPIO_PB12) | P_FUNCT(1))</div><div class='add'>+</div><div class='add'>+#define P_SPORT1_ACLK	(P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT1_AFS	(P_DEFINED | P_IDENT(GPIO_PE5) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT1_AD0	(P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT1_AD1	(P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT1_ATDV	(P_DEFINED | P_IDENT(GPIO_PE6) | P_FUNCT(0))</div><div class='add'>+#define P_SPORT1_BCLK	(P_DEFINED | P_IDENT(GPIO_PE4) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT1_BFS	(P_DEFINED | P_IDENT(GPIO_PE3) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT1_BD0	(P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT1_BD1	(P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(2))</div><div class='add'>+#define P_SPORT1_BTDV	(P_DEFINED | P_IDENT(GPIO_PE7) | P_FUNCT(0))</div><div class='add'>+</div><div class='add'>+#define P_SPORT2_ACLK	(P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0))</div><div class='add'>+#define P_SPORT2_AFS	(P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))</div><div class='add'>+#define P_SPORT2_AD0	(P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(0))</div><div class='add'>+#define P_SPORT2_AD1	(P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(0))</div><div class='add'>+#define P_SPORT2_ATDV	(P_DEFINED | P_IDENT(GPIO_PE14) | P_FUNCT(1))</div><div class='add'>+#define P_SPORT2_BCLK	(P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(1))</div><div class='add'>+#define P_SPORT2_BFS	(P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(0))</div><div class='add'>+#define P_SPORT2_BD0	(P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(0))</div><div class='add'>+#define P_SPORT2_BD1	(P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(0))</div><div class='add'>+#define P_SPORT2_BTDV	(P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(2))</div><div class='add'>+</div><div class='add'>+/* LINK PORT */</div><div class='add'>+#define P_LP0_CLK	(P_DEFINED | P_IDENT(GPIO_PB0) | P_FUNCT(2))</div><div class='add'>+#define P_LP0_ACK       (P_DEFINED | P_IDENT(GPIO_PB1) | P_FUNCT(2))</div><div class='add'>+#define P_LP0_D0        (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(2))</div><div class='add'>+#define P_LP0_D1        (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(2))</div><div class='add'>+#define P_LP0_D2        (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(2))</div><div class='add'>+#define P_LP0_D3        (P_DEFINED | P_IDENT(GPIO_PA3) | P_FUNCT(2))</div><div class='add'>+#define P_LP0_D4        (P_DEFINED | P_IDENT(GPIO_PA4) | P_FUNCT(2))</div><div class='add'>+#define P_LP0_D5        (P_DEFINED | P_IDENT(GPIO_PA5) | P_FUNCT(2))</div><div class='add'>+#define P_LP0_D6        (P_DEFINED | P_IDENT(GPIO_PA6) | P_FUNCT(2))</div><div class='add'>+#define P_LP0_D7        (P_DEFINED | P_IDENT(GPIO_PA7) | P_FUNCT(2))</div><div class='add'>+</div><div class='add'>+#define P_LP1_CLK	(P_DEFINED | P_IDENT(GPIO_PB3) | P_FUNCT(2))</div><div class='add'>+#define P_LP1_ACK       (P_DEFINED | P_IDENT(GPIO_PB2) | P_FUNCT(2))</div><div class='add'>+#define P_LP1_D0        (P_DEFINED | P_IDENT(GPIO_PA8) | P_FUNCT(2))</div><div class='add'>+#define P_LP1_D1        (P_DEFINED | P_IDENT(GPIO_PA9) | P_FUNCT(2))</div><div class='add'>+#define P_LP1_D2        (P_DEFINED | P_IDENT(GPIO_PA10) | P_FUNCT(2))</div><div class='add'>+#define P_LP1_D3        (P_DEFINED | P_IDENT(GPIO_PA11) | P_FUNCT(2))</div><div class='add'>+#define P_LP1_D4        (P_DEFINED | P_IDENT(GPIO_PA12) | P_FUNCT(2))</div><div class='add'>+#define P_LP1_D5        (P_DEFINED | P_IDENT(GPIO_PA13) | P_FUNCT(2))</div><div class='add'>+#define P_LP1_D6        (P_DEFINED | P_IDENT(GPIO_PA14) | P_FUNCT(2))</div><div class='add'>+#define P_LP1_D7        (P_DEFINED | P_IDENT(GPIO_PA15) | P_FUNCT(2))</div><div class='add'>+</div><div class='add'>+#define P_LP2_CLK	(P_DEFINED | P_IDENT(GPIO_PE6) | P_FUNCT(2))</div><div class='add'>+#define P_LP2_ACK       (P_DEFINED | P_IDENT(GPIO_PE7) | P_FUNCT(2))</div><div class='add'>+#define P_LP2_D0        (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(2))</div><div class='add'>+#define P_LP2_D1        (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(2))</div><div class='add'>+#define P_LP2_D2        (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(2))</div><div class='add'>+#define P_LP2_D3        (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(2))</div><div class='add'>+#define P_LP2_D4        (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(2))</div><div class='add'>+#define P_LP2_D5        (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(2))</div><div class='add'>+#define P_LP2_D6        (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(2))</div><div class='add'>+#define P_LP2_D7        (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(2))</div><div class='add'>+</div><div class='add'>+#define P_LP3_CLK	(P_DEFINED | P_IDENT(GPIO_PE9) | P_FUNCT(2))</div><div class='add'>+#define P_LP3_ACK       (P_DEFINED | P_IDENT(GPIO_PE8) | P_FUNCT(2))</div><div class='add'>+#define P_LP3_D0        (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2))</div><div class='add'>+#define P_LP3_D1        (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(2))</div><div class='add'>+#define P_LP3_D2        (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(2))</div><div class='add'>+#define P_LP3_D3        (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(2))</div><div class='add'>+#define P_LP3_D4        (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(2))</div><div class='add'>+#define P_LP3_D5        (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(2))</div><div class='add'>+#define P_LP3_D6        (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(2))</div><div class='add'>+#define P_LP3_D7        (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(2))</div><div class='add'>+</div><div class='add'>+/* TWI */</div><div class='add'>+#define P_TWI0_SCL	(P_DONTCARE)</div><div class='add'>+#define P_TWI0_SDA	(P_DONTCARE)</div><div class='add'>+#define P_TWI1_SCL	(P_DONTCARE)</div><div class='add'>+#define P_TWI1_SDA	(P_DONTCARE)</div><div class='add'>+</div><div class='add'>+/* Rotary Encoder */</div><div class='add'>+#define P_CNT_CZM	(P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(3))</div><div class='add'>+#define P_CNT_CUD	(P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(3))</div><div class='add'>+#define P_CNT_CDG	(P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(3))</div><div class='add'>+</div><div class='add'>+#endif				/* _MACH_PORTMUX_H_ */</div><div class='head'>diff --git a/arch/blackfin/mach-bf609/pm.c b/arch/blackfin/mach-bf609/pm.c<br/>new file mode 100644<br/>index 000000000000..b76966eb16ad<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-bf609/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-bf609/pm.c</a></div><div class='hunk'>@@ -0,0 +1,362 @@</div><div class='add'>+/*</div><div class='add'>+ * Blackfin bf609 power management</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2011 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/suspend.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/dpmc.h&gt;</div><div class='add'>+#include &lt;asm/pm.h&gt;</div><div class='add'>+#include &lt;mach/pm.h&gt;</div><div class='add'>+#include &lt;asm/blackfin.h&gt;</div><div class='add'>+</div><div class='add'>+/***********************************************************/</div><div class='add'>+/*                                                         */</div><div class='add'>+/* Wakeup Actions for DPM_RESTORE                          */</div><div class='add'>+/*                                                         */</div><div class='add'>+/***********************************************************/</div><div class='add'>+#define BITP_ROM_WUA_CHKHDR             24</div><div class='add'>+#define BITP_ROM_WUA_DDRLOCK            7</div><div class='add'>+#define BITP_ROM_WUA_DDRDLLEN           6</div><div class='add'>+#define BITP_ROM_WUA_DDR                5</div><div class='add'>+#define BITP_ROM_WUA_CGU                4</div><div class='add'>+#define BITP_ROM_WUA_MEMBOOT            2</div><div class='add'>+#define BITP_ROM_WUA_EN                 1</div><div class='add'>+</div><div class='add'>+#define BITM_ROM_WUA_CHKHDR             (0xFF000000)</div><div class='add'>+#define ENUM_ROM_WUA_CHKHDR_AD                  0xAD000000</div><div class='add'>+</div><div class='add'>+#define BITM_ROM_WUA_DDRLOCK            (0x00000080)</div><div class='add'>+#define BITM_ROM_WUA_DDRDLLEN           (0x00000040)</div><div class='add'>+#define BITM_ROM_WUA_DDR                (0x00000020)</div><div class='add'>+#define BITM_ROM_WUA_CGU                (0x00000010)</div><div class='add'>+#define BITM_ROM_WUA_MEMBOOT            (0x00000002)</div><div class='add'>+#define BITM_ROM_WUA_EN                 (0x00000001)</div><div class='add'>+</div><div class='add'>+/***********************************************************/</div><div class='add'>+/*                                                         */</div><div class='add'>+/* Syscontrol                                              */</div><div class='add'>+/*                                                         */</div><div class='add'>+/***********************************************************/</div><div class='add'>+#define BITP_ROM_SYSCTRL_CGU_LOCKINGEN  28    /* unlocks CGU_CTL register */</div><div class='add'>+#define BITP_ROM_SYSCTRL_WUA_OVERRIDE   24</div><div class='add'>+#define BITP_ROM_SYSCTRL_WUA_DDRDLLEN   20    /* Saves the DDR DLL and PADS registers to the DPM registers */</div><div class='add'>+#define BITP_ROM_SYSCTRL_WUA_DDR        19    /* Saves the DDR registers to the DPM registers */</div><div class='add'>+#define BITP_ROM_SYSCTRL_WUA_CGU        18    /* Saves the CGU registers into DPM registers */</div><div class='add'>+#define BITP_ROM_SYSCTRL_WUA_DPMWRITE   17    /* Saves the Syscontrol structure structure contents into DPM registers */</div><div class='add'>+#define BITP_ROM_SYSCTRL_WUA_EN         16    /* reads current PLL and DDR configuration into structure */</div><div class='add'>+#define BITP_ROM_SYSCTRL_DDR_WRITE      13    /* writes the DDR registers from Syscontrol structure for wakeup initialization of DDR */</div><div class='add'>+#define BITP_ROM_SYSCTRL_DDR_READ       12    /* Read the DDR registers into the Syscontrol structure for storing prior to hibernate */</div><div class='add'>+#define BITP_ROM_SYSCTRL_CGU_AUTODIS    11    /* Disables auto handling of UPDT and ALGN fields */</div><div class='add'>+#define BITP_ROM_SYSCTRL_CGU_CLKOUTSEL  7    /* access CGU_CLKOUTSEL register */</div><div class='add'>+#define BITP_ROM_SYSCTRL_CGU_DIV        6    /* access CGU_DIV register */</div><div class='add'>+#define BITP_ROM_SYSCTRL_CGU_STAT       5    /* access CGU_STAT register */</div><div class='add'>+#define BITP_ROM_SYSCTRL_CGU_CTL        4    /* access CGU_CTL register */</div><div class='add'>+#define BITP_ROM_SYSCTRL_CGU_RTNSTAT    2    /* Update structure STAT field upon error */</div><div class='add'>+#define BITP_ROM_SYSCTRL_WRITE          1    /* write registers */</div><div class='add'>+#define BITP_ROM_SYSCTRL_READ           0    /* read registers */</div><div class='add'>+</div><div class='add'>+#define BITM_ROM_SYSCTRL_CGU_READ       (0x00000001)    /* Read CGU registers */</div><div class='add'>+#define BITM_ROM_SYSCTRL_CGU_WRITE      (0x00000002)    /* Write registers */</div><div class='add'>+#define BITM_ROM_SYSCTRL_CGU_RTNSTAT    (0x00000004)    /* Update structure STAT field upon error or after a write operation */</div><div class='add'>+#define BITM_ROM_SYSCTRL_CGU_CTL        (0x00000010)    /* Access CGU_CTL register */</div><div class='add'>+#define BITM_ROM_SYSCTRL_CGU_STAT       (0x00000020)    /* Access CGU_STAT register */</div><div class='add'>+#define BITM_ROM_SYSCTRL_CGU_DIV        (0x00000040)    /* Access CGU_DIV register */</div><div class='add'>+#define BITM_ROM_SYSCTRL_CGU_CLKOUTSEL  (0x00000080)    /* Access CGU_CLKOUTSEL register */</div><div class='add'>+#define BITM_ROM_SYSCTRL_CGU_AUTODIS    (0x00000800)    /* Disables auto handling of UPDT and ALGN fields */</div><div class='add'>+#define BITM_ROM_SYSCTRL_DDR_READ       (0x00001000)    /* Reads the contents of the DDR registers and stores them into the structure */</div><div class='add'>+#define BITM_ROM_SYSCTRL_DDR_WRITE      (0x00002000)    /* Writes the DDR registers from the structure, only really intented for wakeup functionality and not for full DDR configuration */</div><div class='add'>+#define BITM_ROM_SYSCTRL_WUA_EN         (0x00010000)    /* Wakeup entry or exit opertation enable */</div><div class='add'>+#define BITM_ROM_SYSCTRL_WUA_DPMWRITE   (0x00020000)    /* When set indicates a restore of the PLL and DDR is to be performed otherwise a save is required */</div><div class='add'>+#define BITM_ROM_SYSCTRL_WUA_CGU        (0x00040000)    /* Only applicable for a PLL and DDR save operation to the DPM, saves the current settings if cleared or the contents of the structure if set */</div><div class='add'>+#define BITM_ROM_SYSCTRL_WUA_DDR        (0x00080000)    /* Only applicable for a PLL and DDR save operation to the DPM, saves the current settings if cleared or the contents of the structure if set */</div><div class='add'>+#define BITM_ROM_SYSCTRL_WUA_DDRDLLEN   (0x00100000)    /* Enables saving/restoring of the DDR DLLCTL register */</div><div class='add'>+#define BITM_ROM_SYSCTRL_WUA_OVERRIDE   (0x01000000)</div><div class='add'>+#define BITM_ROM_SYSCTRL_CGU_LOCKINGEN  (0x10000000)    /* Unlocks the CGU_CTL register */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Structures for the syscontrol() function */</div><div class='add'>+struct STRUCT_ROM_SYSCTRL {</div><div class='add'>+	uint32_t ulCGU_CTL;</div><div class='add'>+	uint32_t ulCGU_STAT;</div><div class='add'>+	uint32_t ulCGU_DIV;</div><div class='add'>+	uint32_t ulCGU_CLKOUTSEL;</div><div class='add'>+	uint32_t ulWUA_Flags;</div><div class='add'>+	uint32_t ulWUA_BootAddr;</div><div class='add'>+	uint32_t ulWUA_User;</div><div class='add'>+	uint32_t ulDDR_CTL;</div><div class='add'>+	uint32_t ulDDR_CFG;</div><div class='add'>+	uint32_t ulDDR_TR0;</div><div class='add'>+	uint32_t ulDDR_TR1;</div><div class='add'>+	uint32_t ulDDR_TR2;</div><div class='add'>+	uint32_t ulDDR_MR;</div><div class='add'>+	uint32_t ulDDR_EMR1;</div><div class='add'>+	uint32_t ulDDR_EMR2;</div><div class='add'>+	uint32_t ulDDR_PADCTL;</div><div class='add'>+	uint32_t ulDDR_DLLCTL;</div><div class='add'>+	uint32_t ulReserved;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bfin_pm_data {</div><div class='add'>+	uint32_t magic;</div><div class='add'>+	uint32_t resume_addr;</div><div class='add'>+	uint32_t sp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bfin_pm_data bf609_pm_data;</div><div class='add'>+</div><div class='add'>+struct STRUCT_ROM_SYSCTRL configvalues;</div><div class='add'>+uint32_t dactionflags;</div><div class='add'>+</div><div class='add'>+#define FUNC_ROM_SYSCONTROL 0xC8000080</div><div class='add'>+__attribute__((l1_data))</div><div class='add'>+static uint32_t (* const bfrom_SysControl)(uint32_t action_flags, struct STRUCT_ROM_SYSCTRL *settings, void *reserved) = (void *)FUNC_ROM_SYSCONTROL;</div><div class='add'>+</div><div class='add'>+__attribute__((l1_text))</div><div class='add'>+void bfin_cpu_suspend(void)</div><div class='add'>+{</div><div class='add'>+	__asm__ __volatile__( \</div><div class='add'>+			".align 8;" \</div><div class='add'>+			"idle;" \</div><div class='add'>+			: : \</div><div class='add'>+			);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+__attribute__((l1_text))</div><div class='add'>+void bfin_deepsleep(unsigned long mask)</div><div class='add'>+{</div><div class='add'>+	uint32_t dpm0_ctl;</div><div class='add'>+</div><div class='add'>+	bfin_write32(DPM0_WAKE_EN, 0x10);</div><div class='add'>+	bfin_write32(DPM0_WAKE_POL, 0x10);</div><div class='add'>+	dpm0_ctl = 0x00000008;</div><div class='add'>+	bfin_write32(DPM0_CTL, dpm0_ctl);</div><div class='add'>+	SSYNC();</div><div class='add'>+	__asm__ __volatile__( \</div><div class='add'>+			".align 8;" \</div><div class='add'>+			"idle;" \</div><div class='add'>+			: : \</div><div class='add'>+			);</div><div class='add'>+#ifdef CONFIG_BFIN_PM_WAKEUP_TIME_BENCH</div><div class='add'>+	__asm__ __volatile__(</div><div class='add'>+		"R0 = 0;"</div><div class='add'>+		"CYCLES = R0;"</div><div class='add'>+		"CYCLES2 = R0;"</div><div class='add'>+		"R0 = SYSCFG;"</div><div class='add'>+		"BITSET(R0, 1);"</div><div class='add'>+		"SYSCFG = R0;"</div><div class='add'>+		: : : "R0"</div><div class='add'>+	);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+__attribute__((l1_text))</div><div class='add'>+void bf609_ddr_sr(void)</div><div class='add'>+{</div><div class='add'>+	uint32_t reg;</div><div class='add'>+</div><div class='add'>+	reg = bfin_read_DMC0_CTL();</div><div class='add'>+	reg |= 0x8;</div><div class='add'>+	bfin_write_DMC0_CTL(reg);</div><div class='add'>+</div><div class='add'>+	while (!(bfin_read_DMC0_STAT() &amp; 0x8))</div><div class='add'>+		continue;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+__attribute__((l1_text))</div><div class='add'>+void bf609_ddr_sr_exit(void)</div><div class='add'>+{</div><div class='add'>+	uint32_t reg;</div><div class='add'>+	while (!(bfin_read_DMC0_STAT() &amp; 0x1))</div><div class='add'>+		continue;</div><div class='add'>+</div><div class='add'>+	reg = bfin_read_DMC0_CTL();</div><div class='add'>+	reg &amp;= ~0x8;</div><div class='add'>+	bfin_write_DMC0_CTL(reg);</div><div class='add'>+</div><div class='add'>+	while ((bfin_read_DMC0_STAT() &amp; 0x8))</div><div class='add'>+		continue;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+__attribute__((l1_text))</div><div class='add'>+void bfin_hibernate_syscontrol(void)</div><div class='add'>+{</div><div class='add'>+	configvalues.ulWUA_Flags = (0xAD000000 | BITM_ROM_WUA_EN</div><div class='add'>+		| BITM_ROM_WUA_CGU | BITM_ROM_WUA_DDR | BITM_ROM_WUA_DDRDLLEN);</div><div class='add'>+</div><div class='add'>+	dactionflags = (BITM_ROM_SYSCTRL_WUA_EN</div><div class='add'>+		| BITM_ROM_SYSCTRL_WUA_DPMWRITE | BITM_ROM_SYSCTRL_WUA_CGU</div><div class='add'>+		| BITM_ROM_SYSCTRL_WUA_DDR | BITM_ROM_SYSCTRL_WUA_DDRDLLEN);</div><div class='add'>+</div><div class='add'>+	bfrom_SysControl(dactionflags, &amp;configvalues, NULL);</div><div class='add'>+</div><div class='add'>+	bfin_write32(DPM0_RESTORE5, bfin_read32(DPM0_RESTORE5) | 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='add'>+# define SIC_SYSIRQ(irq)	(irq - (IRQ_CORETMR + 1))</div><div class='add'>+#else</div><div class='add'>+# define SIC_SYSIRQ(irq)	((irq) - IVG15)</div><div class='add'>+#endif</div><div class='add'>+void bfin_hibernate(unsigned long mask)</div><div class='add'>+{</div><div class='add'>+	bfin_write32(DPM0_WAKE_EN, 0x10);</div><div class='add'>+	bfin_write32(DPM0_WAKE_POL, 0x10);</div><div class='add'>+	bfin_write32(DPM0_PGCNTR, 0x0000FFFF);</div><div class='add'>+	bfin_write32(DPM0_HIB_DIS, 0xFFFF);</div><div class='add'>+</div><div class='add'>+	printk(KERN_DEBUG "hibernate: restore %x pgcnt %x\n", bfin_read32(DPM0_RESTORE0), bfin_read32(DPM0_PGCNTR));</div><div class='add'>+</div><div class='add'>+	bf609_hibernate();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bf609_cpu_pm_enter(suspend_state_t state)</div><div class='add'>+{</div><div class='add'>+	int error;</div><div class='add'>+	unsigned long wakeup = 0;</div><div class='add'>+	unsigned long wakeup_pol = 0;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_BFIN_WAKE_PA15</div><div class='add'>+	wakeup |= PA15WE;</div><div class='add'>+# if CONFIG_PM_BFIN_WAKE_PA15_POL</div><div class='add'>+	wakeup_pol |= PA15WE;</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_BFIN_WAKE_PB15</div><div class='add'>+	wakeup |= PB15WE;</div><div class='add'>+# if CONFIG_PM_BFIN_WAKE_PA15_POL</div><div class='add'>+	wakeup_pol |= PB15WE;</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_BFIN_WAKE_PC15</div><div class='add'>+	wakeup |= PC15WE;</div><div class='add'>+# if CONFIG_PM_BFIN_WAKE_PC15_POL</div><div class='add'>+	wakeup_pol |= PC15WE;</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_BFIN_WAKE_PD06</div><div class='add'>+	wakeup |= PD06WE;</div><div class='add'>+# if CONFIG_PM_BFIN_WAKE_PD06_POL</div><div class='add'>+	wakeup_pol |= PD06WE;</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_BFIN_WAKE_PE12</div><div class='add'>+	wakeup |= PE12WE;</div><div class='add'>+# if CONFIG_PM_BFIN_WAKE_PE12_POL</div><div class='add'>+	wakeup_pol |= PE12WE;</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_BFIN_WAKE_PG04</div><div class='add'>+	wakeup |= PG04WE;</div><div class='add'>+# if CONFIG_PM_BFIN_WAKE_PG04_POL</div><div class='add'>+	wakeup_pol |= PG04WE;</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_BFIN_WAKE_PG13</div><div class='add'>+	wakeup |= PG13WE;</div><div class='add'>+# if CONFIG_PM_BFIN_WAKE_PG13_POL</div><div class='add'>+	wakeup_pol |= PG13WE;</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_BFIN_WAKE_USB</div><div class='add'>+	wakeup |= USBWE;</div><div class='add'>+# if CONFIG_PM_BFIN_WAKE_USB_POL</div><div class='add'>+	wakeup_pol |= USBWE;</div><div class='add'>+# endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	error = irq_set_irq_wake(255, 1);</div><div class='add'>+	if(error &lt; 0)</div><div class='add'>+		printk(KERN_DEBUG "Unable to get irq wake\n");</div><div class='add'>+	error = irq_set_irq_wake(231, 1);</div><div class='add'>+	if (error &lt; 0)</div><div class='add'>+		printk(KERN_DEBUG "Unable to get irq wake\n");</div><div class='add'>+</div><div class='add'>+	if (state == PM_SUSPEND_STANDBY)</div><div class='add'>+		bfin_deepsleep(wakeup);</div><div class='add'>+	else {</div><div class='add'>+		bfin_hibernate(wakeup);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bf609_cpu_pm_prepare(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bf609_cpu_pm_finish(void)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct bfin_cpu_pm_fns bf609_cpu_pm = {</div><div class='add'>+	.enter          = bf609_cpu_pm_enter,</div><div class='add'>+	.prepare        = bf609_cpu_pm_prepare,</div><div class='add'>+	.finish         = bf609_cpu_pm_finish,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static irqreturn_t test_isr(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_DEBUG "gpio irq %d\n", irq);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t dpm0_isr(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	uint32_t wake_stat;</div><div class='add'>+</div><div class='add'>+	wake_stat = bfin_read32(DPM0_WAKE_STAT);</div><div class='add'>+	printk(KERN_DEBUG "enter %s wake stat %08x\n", __func__, wake_stat);</div><div class='add'>+</div><div class='add'>+	bfin_write32(DPM0_WAKE_STAT, wake_stat);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init bf609_init_pm(void)</div><div class='add'>+{</div><div class='add'>+	int irq;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+#if CONFIG_PM_BFIN_WAKE_PE12</div><div class='add'>+	irq = gpio_to_irq(GPIO_PE12);</div><div class='add'>+	if (irq &lt; 0) {</div><div class='add'>+		error = irq;</div><div class='add'>+		printk(KERN_DEBUG "Unable to get irq number for GPIO %d, error %d\n",</div><div class='add'>+				GPIO_PE12, error);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	error = request_irq(irq, test_isr, IRQF_TRIGGER_RISING | IRQF_NO_SUSPEND, "gpiope12", NULL);</div><div class='add'>+	if(error &lt; 0)</div><div class='add'>+		printk(KERN_DEBUG "Unable to get irq\n");</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	error = request_irq(IRQ_CGU_EVT, dpm0_isr, IRQF_NO_SUSPEND, "cgu0 event", NULL);</div><div class='add'>+	if(error &lt; 0)</div><div class='add'>+		printk(KERN_DEBUG "Unable to get irq\n");</div><div class='add'>+</div><div class='add'>+	error = request_irq(IRQ_DPM, dpm0_isr, IRQF_NO_SUSPEND, "dpm0 event", NULL);</div><div class='add'>+	if (error &lt; 0)</div><div class='add'>+		printk(KERN_DEBUG "Unable to get irq\n");</div><div class='add'>+</div><div class='add'>+	bfin_cpu_pm = &amp;bf609_cpu_pm;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+late_initcall(bf609_init_pm);</div><div class='head'>diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile<br/>index ff299f24aba0..75f0ba29ebb9 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-common/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-common/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-common/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/Makefile</a></div><div class='hunk'>@@ -6,7 +6,10 @@ obj-y := \</div><div class='ctx'> 	cache.o cache-c.o entry.o head.o \</div><div class='ctx'> 	interrupt.o arch_checks.o ints-priority.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_PM)          += pm.o dpmc_modes.o</div><div class='add'>+obj-$(CONFIG_PM)          += pm.o</div><div class='add'>+ifneq ($(CONFIG_BF60x),y)</div><div class='add'>+obj-$(CONFIG_PM)	  += dpmc_modes.o</div><div class='add'>+endif</div><div class='ctx'> obj-$(CONFIG_CPU_FREQ)    += cpufreq.o</div><div class='ctx'> obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o</div><div class='ctx'> obj-$(CONFIG_SMP)         += smp.o</div><div class='head'>diff --git a/arch/blackfin/mach-common/clock.h b/arch/blackfin/mach-common/clock.h<br/>new file mode 100644<br/>index 000000000000..645ff460a1f2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-common/clock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/clock.h</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+#ifndef __MACH_COMMON_CLKDEV_H</div><div class='add'>+#define __MACH_COMMON_CLKDEV_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+</div><div class='add'>+struct clk_ops {</div><div class='add'>+	unsigned long (*get_rate)(struct clk *clk);</div><div class='add'>+	unsigned long (*round_rate)(struct clk *clk, unsigned long rate);</div><div class='add'>+	int (*set_rate)(struct clk *clk, unsigned long rate);</div><div class='add'>+	int (*enable)(struct clk *clk);</div><div class='add'>+	int (*disable)(struct clk *clk);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk {</div><div class='add'>+	const char		*name;</div><div class='add'>+	unsigned long           rate;</div><div class='add'>+	spinlock_t 		lock;</div><div class='add'>+	u32			flags;</div><div class='add'>+	const struct clk_ops    *ops;</div><div class='add'>+	const struct params 	*params;</div><div class='add'>+	void __iomem            *reg;</div><div class='add'>+	u32			mask;</div><div class='add'>+	u32			shift;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='head'>diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c<br/>index d5cfe611b778..7ad2407d1571 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-common/clocks-init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-common/clocks-init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-common/clocks-init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/clocks-init.c</a></div><div class='hunk'>@@ -15,10 +15,121 @@</div><div class='ctx'> #include &lt;asm/mem_init.h&gt;</div><div class='ctx'> #include &lt;asm/dpmc.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+#define CSEL_P			0</div><div class='add'>+#define S0SEL_P			5</div><div class='add'>+#define SYSSEL_P		8</div><div class='add'>+#define S1SEL_P			13</div><div class='add'>+#define DSEL_P			16</div><div class='add'>+#define OSEL_P			22</div><div class='add'>+#define ALGN_P			29</div><div class='add'>+#define UPDT_P			30</div><div class='add'>+#define LOCK_P			31</div><div class='add'>+</div><div class='add'>+#define CGU_CTL_VAL ((CONFIG_VCO_MULT &lt;&lt; 8) | CLKIN_HALF)</div><div class='add'>+#define CGU_DIV_VAL \</div><div class='add'>+	((CONFIG_CCLK_DIV   &lt;&lt; CSEL_P)   | \</div><div class='add'>+	(CONFIG_SCLK_DIV &lt;&lt; SYSSEL_P)   | \</div><div class='add'>+	(CONFIG_SCLK0_DIV  &lt;&lt; S0SEL_P)  | \</div><div class='add'>+	(CONFIG_SCLK1_DIV  &lt;&lt; S1SEL_P)  | \</div><div class='add'>+	(CONFIG_DCLK_DIV   &lt;&lt; DSEL_P))</div><div class='add'>+</div><div class='add'>+#define CONFIG_BFIN_DCLK (((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) / CONFIG_DCLK_DIV) / 1000000)</div><div class='add'>+#if ((CONFIG_BFIN_DCLK != 125) &amp;&amp; \</div><div class='add'>+	(CONFIG_BFIN_DCLK != 133) &amp;&amp; (CONFIG_BFIN_DCLK != 150) &amp;&amp; \</div><div class='add'>+	(CONFIG_BFIN_DCLK != 166) &amp;&amp; (CONFIG_BFIN_DCLK != 200) &amp;&amp; \</div><div class='add'>+	(CONFIG_BFIN_DCLK != 225) &amp;&amp; (CONFIG_BFIN_DCLK != 250))</div><div class='add'>+#error "DCLK must be in (125, 133, 150, 166, 200, 225, 250)MHz"</div><div class='add'>+#endif</div><div class='add'>+struct ddr_config {</div><div class='add'>+	u32 ddr_clk;</div><div class='add'>+	u32 dmc_ddrctl;</div><div class='add'>+	u32 dmc_ddrcfg;</div><div class='add'>+	u32 dmc_ddrtr0;</div><div class='add'>+	u32 dmc_ddrtr1;</div><div class='add'>+	u32 dmc_ddrtr2;</div><div class='add'>+	u32 dmc_ddrmr;</div><div class='add'>+	u32 dmc_ddrmr1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ddr_config ddr_config_table[] __attribute__((section(".data_l1"))) = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.ddr_clk    = 125,</div><div class='add'>+		.dmc_ddrctl = 0x00000904,</div><div class='add'>+		.dmc_ddrcfg = 0x00000422,</div><div class='add'>+		.dmc_ddrtr0 = 0x20705212,</div><div class='add'>+		.dmc_ddrtr1 = 0x201003CF,</div><div class='add'>+		.dmc_ddrtr2 = 0x00320107,</div><div class='add'>+		.dmc_ddrmr  = 0x00000422,</div><div class='add'>+		.dmc_ddrmr1 = 0x4,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.ddr_clk    = 133,</div><div class='add'>+		.dmc_ddrctl = 0x00000904,</div><div class='add'>+		.dmc_ddrcfg = 0x00000422,</div><div class='add'>+		.dmc_ddrtr0 = 0x20806313,</div><div class='add'>+		.dmc_ddrtr1 = 0x2013040D,</div><div class='add'>+		.dmc_ddrtr2 = 0x00320108,</div><div class='add'>+		.dmc_ddrmr  = 0x00000632,</div><div class='add'>+		.dmc_ddrmr1 = 0x4,</div><div class='add'>+	},</div><div class='add'>+	[2] = {</div><div class='add'>+		.ddr_clk    = 150,</div><div class='add'>+		.dmc_ddrctl = 0x00000904,</div><div class='add'>+		.dmc_ddrcfg = 0x00000422,</div><div class='add'>+		.dmc_ddrtr0 = 0x20A07323,</div><div class='add'>+		.dmc_ddrtr1 = 0x20160492,</div><div class='add'>+		.dmc_ddrtr2 = 0x00320209,</div><div class='add'>+		.dmc_ddrmr  = 0x00000632,</div><div class='add'>+		.dmc_ddrmr1 = 0x4,</div><div class='add'>+	},</div><div class='add'>+	[3] = {</div><div class='add'>+		.ddr_clk    = 166,</div><div class='add'>+		.dmc_ddrctl = 0x00000904,</div><div class='add'>+		.dmc_ddrcfg = 0x00000422,</div><div class='add'>+		.dmc_ddrtr0 = 0x20A07323,</div><div class='add'>+		.dmc_ddrtr1 = 0x2016050E,</div><div class='add'>+		.dmc_ddrtr2 = 0x00320209,</div><div class='add'>+		.dmc_ddrmr  = 0x00000632,</div><div class='add'>+		.dmc_ddrmr1 = 0x4,</div><div class='add'>+	},</div><div class='add'>+	[4] = {</div><div class='add'>+		.ddr_clk    = 200,</div><div class='add'>+		.dmc_ddrctl = 0x00000904,</div><div class='add'>+		.dmc_ddrcfg = 0x00000422,</div><div class='add'>+		.dmc_ddrtr0 = 0x20a07323,</div><div class='add'>+		.dmc_ddrtr1 = 0x2016050f,</div><div class='add'>+		.dmc_ddrtr2 = 0x00320509,</div><div class='add'>+		.dmc_ddrmr  = 0x00000632,</div><div class='add'>+		.dmc_ddrmr1 = 0x4,</div><div class='add'>+	},</div><div class='add'>+	[5] = {</div><div class='add'>+		.ddr_clk    = 225,</div><div class='add'>+		.dmc_ddrctl = 0x00000904,</div><div class='add'>+		.dmc_ddrcfg = 0x00000422,</div><div class='add'>+		.dmc_ddrtr0 = 0x20E0A424,</div><div class='add'>+		.dmc_ddrtr1 = 0x302006DB,</div><div class='add'>+		.dmc_ddrtr2 = 0x0032020D,</div><div class='add'>+		.dmc_ddrmr  = 0x00000842,</div><div class='add'>+		.dmc_ddrmr1 = 0x4,</div><div class='add'>+	},</div><div class='add'>+	[6] = {</div><div class='add'>+		.ddr_clk    = 250,</div><div class='add'>+		.dmc_ddrctl = 0x00000904,</div><div class='add'>+		.dmc_ddrcfg = 0x00000422,</div><div class='add'>+		.dmc_ddrtr0 = 0x20E0A424,</div><div class='add'>+		.dmc_ddrtr1 = 0x3020079E,</div><div class='add'>+		.dmc_ddrtr2 = 0x0032020D,</div><div class='add'>+		.dmc_ddrmr  = 0x00000842,</div><div class='add'>+		.dmc_ddrmr1 = 0x4,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+#else</div><div class='ctx'> #define SDGCTL_WIDTH (1 &lt;&lt; 31)	/* SDRAM external data path width */</div><div class='ctx'> #define PLL_CTL_VAL \</div><div class='ctx'> 	(((CONFIG_VCO_MULT &amp; 63) &lt;&lt; 9) | CLKIN_HALF | \</div><div class='del'>-	 (PLL_BYPASS &lt;&lt; 8) | (ANOMALY_05000305 ? 0 : 0x8000))</div><div class='add'>+		(PLL_BYPASS &lt;&lt; 8) | (ANOMALY_05000305 ? 0 : 0x8000))</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> __attribute__((l1_text))</div><div class='ctx'> static void do_sync(void)</div><div class='hunk'>@@ -33,6 +144,44 @@ void init_clocks(void)</div><div class='ctx'> 	 * in the middle of reprogramming things, and that'll screw us up.</div><div class='ctx'> 	 * For example, any automatic DMAs left by U-Boot for splash screens.</div><div class='ctx'> 	 */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	int i, dlldatacycle, dll_ctl;</div><div class='add'>+	bfin_write32(CGU0_DIV, CGU_DIV_VAL);</div><div class='add'>+	bfin_write32(CGU0_CTL, CGU_CTL_VAL);</div><div class='add'>+	while ((bfin_read32(CGU0_STAT) &amp; 0x8) || !(bfin_read32(CGU0_STAT) &amp; 0x4))</div><div class='add'>+		continue;</div><div class='add'>+</div><div class='add'>+	bfin_write32(CGU0_DIV, CGU_DIV_VAL | (1 &lt;&lt; UPDT_P));</div><div class='add'>+	while (bfin_read32(CGU0_STAT) &amp; (1 &lt;&lt; 3))</div><div class='add'>+		continue;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 7; i++) {</div><div class='add'>+		if (ddr_config_table[i].ddr_clk == CONFIG_BFIN_DCLK) {</div><div class='add'>+			bfin_write_DDR0_CFG(ddr_config_table[i].dmc_ddrcfg);</div><div class='add'>+			bfin_write_DDR0_TR0(ddr_config_table[i].dmc_ddrtr0);</div><div class='add'>+			bfin_write_DDR0_TR1(ddr_config_table[i].dmc_ddrtr1);</div><div class='add'>+			bfin_write_DDR0_TR2(ddr_config_table[i].dmc_ddrtr2);</div><div class='add'>+			bfin_write_DDR0_MR(ddr_config_table[i].dmc_ddrmr);</div><div class='add'>+			bfin_write_DDR0_EMR1(ddr_config_table[i].dmc_ddrmr1);</div><div class='add'>+			bfin_write_DDR0_CTL(ddr_config_table[i].dmc_ddrctl);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	do_sync();</div><div class='add'>+	while (!(bfin_read_DDR0_STAT() &amp; 0x4))</div><div class='add'>+		continue;</div><div class='add'>+</div><div class='add'>+	dlldatacycle = (bfin_read_DDR0_STAT() &amp; 0x00f00000) &gt;&gt; 20;</div><div class='add'>+	dll_ctl = bfin_read_DDR0_DLLCTL();</div><div class='add'>+	dll_ctl &amp;= 0x0ff;</div><div class='add'>+	bfin_write_DDR0_DLLCTL(dll_ctl | (dlldatacycle &lt;&lt; 8));</div><div class='add'>+</div><div class='add'>+	do_sync();</div><div class='add'>+	while (!(bfin_read_DDR0_STAT() &amp; 0x2000))</div><div class='add'>+		continue;</div><div class='add'>+#else</div><div class='ctx'> 	size_t i;</div><div class='ctx'> 	for (i = 0; i &lt; MAX_DMA_CHANNELS; ++i) {</div><div class='ctx'> 		struct dma_register *dma = dma_io_base_addr[i];</div><div class='hunk'>@@ -91,6 +240,8 @@ void init_clocks(void)</div><div class='ctx'> 	bfin_write_EBIU_DDRQUE(CONFIG_MEM_EBIU_DDRQUE);</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='add'>+#endif</div><div class='ctx'> 	do_sync();</div><div class='ctx'> 	bfin_read16(0);</div><div class='add'>+</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c<br/>index 2e6eefd812f4..6e87dc13f6bf 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-common/cpufreq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-common/cpufreq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-common/cpufreq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/cpufreq.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/cpufreq.h&gt;</div><div class='ctx'> #include &lt;linux/fs.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='hunk'>@@ -17,6 +18,7 @@</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='ctx'> #include &lt;asm/dpmc.h&gt;</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> /* this is the table of CCLK frequencies, in Hz */</div><div class='ctx'> /* .index is the entry in the auxiliary dpm_state_table[] */</div><div class='ctx'> static struct cpufreq_frequency_table bfin_freq_table[] = {</div><div class='hunk'>@@ -67,12 +69,22 @@ static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk)</div><div class='ctx'> #else</div><div class='ctx'> 	min_cclk = sclk;</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	csel = ((bfin_read_PLL_DIV() &amp; CSEL) &gt;&gt; 4);</div><div class='add'>+#else</div><div class='add'>+	csel = bfin_read32(CGU0_DIV) &amp; 0x1F;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	for (index = 0;  (cclk &gt;&gt; index) &gt;= min_cclk &amp;&amp; csel &lt;= 3; index++, csel++) {</div><div class='ctx'> 		bfin_freq_table[index].frequency = cclk &gt;&gt; index;</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 		dpm_state_table[index].csel = csel &lt;&lt; 4; /* Shift now into PLL_DIV bitpos */</div><div class='ctx'> 		dpm_state_table[index].tscale =  (TIME_SCALE / (1 &lt;&lt; csel)) - 1;</div><div class='add'>+#else</div><div class='add'>+		dpm_state_table[index].csel = csel;</div><div class='add'>+		dpm_state_table[index].tscale =  TIME_SCALE &gt;&gt; index;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 		pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n",</div><div class='ctx'> 						 bfin_freq_table[index].frequency,</div><div class='hunk'>@@ -99,14 +111,34 @@ static unsigned int bfin_getfreq_khz(unsigned int cpu)</div><div class='ctx'> 	return get_cclk() / 1000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+unsigned long cpu_set_cclk(int cpu, unsigned long new)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	clk = clk_get(NULL, "CCLK");</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	ret = clk_set_rate(clk, new);</div><div class='add'>+	clk_put(clk);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int bfin_target(struct cpufreq_policy *poli,</div><div class='ctx'> 			unsigned int target_freq, unsigned int relation)</div><div class='ctx'> {</div><div class='del'>-	unsigned int index, plldiv, cpu;</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='add'>+	unsigned int plldiv;</div><div class='add'>+#endif</div><div class='add'>+	unsigned int index, cpu;</div><div class='ctx'> 	unsigned long flags, cclk_hz;</div><div class='ctx'> 	struct cpufreq_freqs freqs;</div><div class='ctx'> 	static unsigned long lpj_ref;</div><div class='ctx'> 	static unsigned int  lpj_ref_freq;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_CYCLES_CLOCKSOURCE)</div><div class='ctx'> 	cycles_t cycles;</div><div class='hunk'>@@ -134,9 +166,17 @@ static int bfin_target(struct cpufreq_policy *poli,</div><div class='ctx'> 		cpufreq_notify_transition(&amp;freqs, CPUFREQ_PRECHANGE);</div><div class='ctx'> 		if (cpu == CPUFREQ_CPU) {</div><div class='ctx'> 			flags = hard_local_irq_save();</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 			plldiv = (bfin_read_PLL_DIV() &amp; SSEL) |</div><div class='ctx'> 						dpm_state_table[index].csel;</div><div class='ctx'> 			bfin_write_PLL_DIV(plldiv);</div><div class='add'>+#else</div><div class='add'>+			ret = cpu_set_cclk(cpu, freqs.new * 1000);</div><div class='add'>+			if (ret != 0) {</div><div class='add'>+				pr_debug("cpufreq set freq failed %d\n", ret);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+#endif</div><div class='ctx'> 			on_each_cpu(bfin_adjust_core_timer, &amp;index, 1);</div><div class='ctx'> #if defined(CONFIG_CYCLES_CLOCKSOURCE)</div><div class='ctx'> 			cycles = get_cycles();</div><div class='hunk'>@@ -161,7 +201,7 @@ static int bfin_target(struct cpufreq_policy *poli,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("cpufreq: done\n");</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bfin_verify_speed(struct cpufreq_policy *policy)</div><div class='hunk'>@@ -169,7 +209,7 @@ static int bfin_verify_speed(struct cpufreq_policy *policy)</div><div class='ctx'> 	return cpufreq_frequency_table_verify(policy, bfin_freq_table);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init __bfin_cpu_init(struct cpufreq_policy *policy)</div><div class='add'>+static int __bfin_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='ctx'> 	unsigned long cclk, sclk;</div><div class='head'>diff --git a/arch/blackfin/mach-common/dpmc_modes.S b/arch/blackfin/mach-common/dpmc_modes.S<br/>index 1c534d298de4..de99f3aac2c5 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-common/dpmc_modes.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-common/dpmc_modes.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-common/dpmc_modes.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/dpmc_modes.S</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> #include &lt;asm/dpmc.h&gt;</div><div class='ctx'> </div><div class='ctx'> .section .l1.text</div><div class='del'>-</div><div class='ctx'> ENTRY(_sleep_mode)</div><div class='ctx'> 	[--SP] = (R7:4, P5:3);</div><div class='ctx'> 	[--SP] = RETS;</div><div class='hunk'>@@ -43,6 +42,9 @@ ENTRY(_sleep_mode)</div><div class='ctx'> 	BITCLR (R7, 5);</div><div class='ctx'> 	w[p0] = R7.L;</div><div class='ctx'> 	IDLE;</div><div class='add'>+</div><div class='add'>+	bfin_init_pm_bench_cycles;</div><div class='add'>+</div><div class='ctx'> 	call _test_pll_locked;</div><div class='ctx'> </div><div class='ctx'> 	RETS = [SP++];</div><div class='hunk'>@@ -58,12 +60,13 @@ ENDPROC(_sleep_mode)</div><div class='ctx'>  *</div><div class='ctx'>  * We accept just one argument -- the value to write to VR_CTL.</div><div class='ctx'>  */</div><div class='add'>+</div><div class='ctx'> ENTRY(_hibernate_mode)</div><div class='ctx'> 	/* Save/setup the regs we need early for minor pipeline optimization */</div><div class='ctx'> 	R4 = R0;</div><div class='add'>+</div><div class='ctx'> 	P3.H = hi(VR_CTL);</div><div class='ctx'> 	P3.L = lo(VR_CTL);</div><div class='del'>-</div><div class='ctx'> 	/* Disable all wakeup sources */</div><div class='ctx'> 	R0 = IWR_DISABLE_ALL;</div><div class='ctx'> 	R1 = IWR_DISABLE_ALL;</div><div class='hunk'>@@ -74,6 +77,9 @@ ENTRY(_hibernate_mode)</div><div class='ctx'> </div><div class='ctx'> 	/* Finally, we climb into our cave to hibernate */</div><div class='ctx'> 	W[P3] = R4.L;</div><div class='add'>+</div><div class='add'>+	bfin_init_pm_bench_cycles;</div><div class='add'>+</div><div class='ctx'> 	CLI R2;</div><div class='ctx'> 	IDLE;</div><div class='ctx'> .Lforever:</div><div class='hunk'>@@ -158,6 +164,8 @@ ENTRY(_sleep_deeper)</div><div class='ctx'> 	SSYNC;</div><div class='ctx'> 	IDLE;</div><div class='ctx'> </div><div class='add'>+	bfin_init_pm_bench_cycles;</div><div class='add'>+</div><div class='ctx'> 	call _test_pll_locked;</div><div class='ctx'> </div><div class='ctx'> 	P0.H = hi(PLL_DIV);</div><div class='hunk'>@@ -276,327 +284,10 @@ ENTRY(_test_pll_locked)</div><div class='ctx'> ENDPROC(_test_pll_locked)</div><div class='ctx'> </div><div class='ctx'> .section .text</div><div class='del'>-</div><div class='del'>-#define PM_REG0  R7</div><div class='del'>-#define PM_REG1  R6</div><div class='del'>-#define PM_REG2  R5</div><div class='del'>-#define PM_REG3  R4</div><div class='del'>-#define PM_REG4  R3</div><div class='del'>-#define PM_REG5  R2</div><div class='del'>-#define PM_REG6  R1</div><div class='del'>-#define PM_REG7  R0</div><div class='del'>-#define PM_REG8  P5</div><div class='del'>-#define PM_REG9  P4</div><div class='del'>-#define PM_REG10 P3</div><div class='del'>-#define PM_REG11 P2</div><div class='del'>-#define PM_REG12 P1</div><div class='del'>-#define PM_REG13 P0</div><div class='del'>-</div><div class='del'>-#define PM_REGSET0  R7:7</div><div class='del'>-#define PM_REGSET1  R7:6</div><div class='del'>-#define PM_REGSET2  R7:5</div><div class='del'>-#define PM_REGSET3  R7:4</div><div class='del'>-#define PM_REGSET4  R7:3</div><div class='del'>-#define PM_REGSET5  R7:2</div><div class='del'>-#define PM_REGSET6  R7:1</div><div class='del'>-#define PM_REGSET7  R7:0</div><div class='del'>-#define PM_REGSET8  R7:0, P5:5</div><div class='del'>-#define PM_REGSET9  R7:0, P5:4</div><div class='del'>-#define PM_REGSET10 R7:0, P5:3</div><div class='del'>-#define PM_REGSET11 R7:0, P5:2</div><div class='del'>-#define PM_REGSET12 R7:0, P5:1</div><div class='del'>-#define PM_REGSET13 R7:0, P5:0</div><div class='del'>-</div><div class='del'>-#define _PM_PUSH(n, x, w, base) PM_REG##n = w[FP + ((x) - (base))];</div><div class='del'>-#define _PM_POP(n, x, w, base)  w[FP + ((x) - (base))] = PM_REG##n;</div><div class='del'>-#define PM_PUSH_SYNC(n)         [--sp] = (PM_REGSET##n);</div><div class='del'>-#define PM_POP_SYNC(n)          (PM_REGSET##n) = [sp++];</div><div class='del'>-#define PM_PUSH(n, x)           PM_REG##n = [FP++];</div><div class='del'>-#define PM_POP(n, x)            [FP--] = PM_REG##n;</div><div class='del'>-#define PM_CORE_PUSH(n, x)      _PM_PUSH(n, x, , COREMMR_BASE)</div><div class='del'>-#define PM_CORE_POP(n, x)       _PM_POP(n, x, , COREMMR_BASE)</div><div class='del'>-#define PM_SYS_PUSH(n, x)       _PM_PUSH(n, x, , SYSMMR_BASE)</div><div class='del'>-#define PM_SYS_POP(n, x)        _PM_POP(n, x, , SYSMMR_BASE)</div><div class='del'>-#define PM_SYS_PUSH16(n, x)     _PM_PUSH(n, x, w, SYSMMR_BASE)</div><div class='del'>-#define PM_SYS_POP16(n, x)      _PM_POP(n, x, w, SYSMMR_BASE)</div><div class='del'>-</div><div class='ctx'> ENTRY(_do_hibernate)</div><div class='del'>-	/*</div><div class='del'>-	 * Save the core regs early so we can blow them away when</div><div class='del'>-	 * saving/restoring MMR states</div><div class='del'>-	 */</div><div class='del'>-	[--sp] = (R7:0, P5:0);</div><div class='del'>-	[--sp] = fp;</div><div class='del'>-	[--sp] = usp;</div><div class='del'>-</div><div class='del'>-	[--sp] = i0;</div><div class='del'>-	[--sp] = i1;</div><div class='del'>-	[--sp] = i2;</div><div class='del'>-	[--sp] = i3;</div><div class='del'>-</div><div class='del'>-	[--sp] = m0;</div><div class='del'>-	[--sp] = m1;</div><div class='del'>-	[--sp] = m2;</div><div class='del'>-	[--sp] = m3;</div><div class='del'>-</div><div class='del'>-	[--sp] = l0;</div><div class='del'>-	[--sp] = l1;</div><div class='del'>-	[--sp] = l2;</div><div class='del'>-	[--sp] = l3;</div><div class='del'>-</div><div class='del'>-	[--sp] = b0;</div><div class='del'>-	[--sp] = b1;</div><div class='del'>-	[--sp] = b2;</div><div class='del'>-	[--sp] = b3;</div><div class='del'>-	[--sp] = a0.x;</div><div class='del'>-	[--sp] = a0.w;</div><div class='del'>-	[--sp] = a1.x;</div><div class='del'>-	[--sp] = a1.w;</div><div class='del'>-</div><div class='del'>-	[--sp] = LC0;</div><div class='del'>-	[--sp] = LC1;</div><div class='del'>-	[--sp] = LT0;</div><div class='del'>-	[--sp] = LT1;</div><div class='del'>-	[--sp] = LB0;</div><div class='del'>-	[--sp] = LB1;</div><div class='del'>-</div><div class='del'>-	/* We can't push RETI directly as that'll change IPEND[4] */</div><div class='del'>-	r7 = RETI;</div><div class='del'>-	[--sp] = RETS;</div><div class='del'>-	[--sp] = ASTAT;</div><div class='del'>-	[--sp] = CYCLES;</div><div class='del'>-	[--sp] = CYCLES2;</div><div class='del'>-	[--sp] = SYSCFG;</div><div class='del'>-	[--sp] = RETX;</div><div class='del'>-	[--sp] = SEQSTAT;</div><div class='del'>-	[--sp] = r7;</div><div class='del'>-</div><div class='del'>-	/* Save first func arg in M3 */</div><div class='del'>-	M3 = R0;</div><div class='del'>-</div><div class='del'>-	/* Save system MMRs */</div><div class='del'>-	FP.H = hi(SYSMMR_BASE);</div><div class='del'>-	FP.L = lo(SYSMMR_BASE);</div><div class='del'>-</div><div class='del'>-#ifdef SIC_IMASK0</div><div class='del'>-	PM_SYS_PUSH(0, SIC_IMASK0)</div><div class='del'>-	PM_SYS_PUSH(1, SIC_IMASK1)</div><div class='del'>-# ifdef SIC_IMASK2</div><div class='del'>-	PM_SYS_PUSH(2, SIC_IMASK2)</div><div class='del'>-# endif</div><div class='del'>-#else</div><div class='del'>-	PM_SYS_PUSH(0, SIC_IMASK)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IAR0</div><div class='del'>-	PM_SYS_PUSH(3, SIC_IAR0)</div><div class='del'>-	PM_SYS_PUSH(4, SIC_IAR1)</div><div class='del'>-	PM_SYS_PUSH(5, SIC_IAR2)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IAR3</div><div class='del'>-	PM_SYS_PUSH(6, SIC_IAR3)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IAR4</div><div class='del'>-	PM_SYS_PUSH(7, SIC_IAR4)</div><div class='del'>-	PM_SYS_PUSH(8, SIC_IAR5)</div><div class='del'>-	PM_SYS_PUSH(9, SIC_IAR6)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IAR7</div><div class='del'>-	PM_SYS_PUSH(10, SIC_IAR7)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IAR8</div><div class='del'>-	PM_SYS_PUSH(11, SIC_IAR8)</div><div class='del'>-	PM_SYS_PUSH(12, SIC_IAR9)</div><div class='del'>-	PM_SYS_PUSH(13, SIC_IAR10)</div><div class='del'>-#endif</div><div class='del'>-	PM_PUSH_SYNC(13)</div><div class='del'>-#ifdef SIC_IAR11</div><div class='del'>-	PM_SYS_PUSH(0, SIC_IAR11)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef SIC_IWR</div><div class='del'>-	PM_SYS_PUSH(1, SIC_IWR)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IWR0</div><div class='del'>-	PM_SYS_PUSH(1, SIC_IWR0)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IWR1</div><div class='del'>-	PM_SYS_PUSH(2, SIC_IWR1)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IWR2</div><div class='del'>-	PM_SYS_PUSH(3, SIC_IWR2)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef PINT0_ASSIGN</div><div class='del'>-	PM_SYS_PUSH(4, PINT0_MASK_SET)</div><div class='del'>-	PM_SYS_PUSH(5, PINT1_MASK_SET)</div><div class='del'>-	PM_SYS_PUSH(6, PINT2_MASK_SET)</div><div class='del'>-	PM_SYS_PUSH(7, PINT3_MASK_SET)</div><div class='del'>-	PM_SYS_PUSH(8, PINT0_ASSIGN)</div><div class='del'>-	PM_SYS_PUSH(9, PINT1_ASSIGN)</div><div class='del'>-	PM_SYS_PUSH(10, PINT2_ASSIGN)</div><div class='del'>-	PM_SYS_PUSH(11, PINT3_ASSIGN)</div><div class='del'>-	PM_SYS_PUSH(12, PINT0_INVERT_SET)</div><div class='del'>-	PM_SYS_PUSH(13, PINT1_INVERT_SET)</div><div class='del'>-	PM_PUSH_SYNC(13)</div><div class='del'>-	PM_SYS_PUSH(0, PINT2_INVERT_SET)</div><div class='del'>-	PM_SYS_PUSH(1, PINT3_INVERT_SET)</div><div class='del'>-	PM_SYS_PUSH(2, PINT0_EDGE_SET)</div><div class='del'>-	PM_SYS_PUSH(3, PINT1_EDGE_SET)</div><div class='del'>-	PM_SYS_PUSH(4, PINT2_EDGE_SET)</div><div class='del'>-	PM_SYS_PUSH(5, PINT3_EDGE_SET)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	PM_SYS_PUSH16(6, SYSCR)</div><div class='del'>-</div><div class='del'>-	PM_SYS_PUSH16(7, EBIU_AMGCTL)</div><div class='del'>-	PM_SYS_PUSH(8, EBIU_AMBCTL0)</div><div class='del'>-	PM_SYS_PUSH(9, EBIU_AMBCTL1)</div><div class='del'>-#ifdef EBIU_FCTL</div><div class='del'>-	PM_SYS_PUSH(10, EBIU_MBSCTL)</div><div class='del'>-	PM_SYS_PUSH(11, EBIU_MODE)</div><div class='del'>-	PM_SYS_PUSH(12, EBIU_FCTL)</div><div class='del'>-	PM_PUSH_SYNC(12)</div><div class='del'>-#else</div><div class='del'>-	PM_PUSH_SYNC(9)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* Save Core MMRs */</div><div class='del'>-	I0.H = hi(COREMMR_BASE);</div><div class='del'>-	I0.L = lo(COREMMR_BASE);</div><div class='del'>-	I1 = I0;</div><div class='del'>-	I2 = I0;</div><div class='del'>-	I3 = I0;</div><div class='del'>-	B0 = I0;</div><div class='del'>-	B1 = I0;</div><div class='del'>-	B2 = I0;</div><div class='del'>-	B3 = I0;</div><div class='del'>-	I1.L = lo(DCPLB_ADDR0);</div><div class='del'>-	I2.L = lo(DCPLB_DATA0);</div><div class='del'>-	I3.L = lo(ICPLB_ADDR0);</div><div class='del'>-	B0.L = lo(ICPLB_DATA0);</div><div class='del'>-	B1.L = lo(EVT2);</div><div class='del'>-	B2.L = lo(IMASK);</div><div class='del'>-	B3.L = lo(TCNTL);</div><div class='del'>-</div><div class='del'>-	/* DCPLB Addr */</div><div class='del'>-	FP = I1;</div><div class='del'>-	PM_PUSH(0, DCPLB_ADDR0)</div><div class='del'>-	PM_PUSH(1, DCPLB_ADDR1)</div><div class='del'>-	PM_PUSH(2, DCPLB_ADDR2)</div><div class='del'>-	PM_PUSH(3, DCPLB_ADDR3)</div><div class='del'>-	PM_PUSH(4, DCPLB_ADDR4)</div><div class='del'>-	PM_PUSH(5, DCPLB_ADDR5)</div><div class='del'>-	PM_PUSH(6, DCPLB_ADDR6)</div><div class='del'>-	PM_PUSH(7, DCPLB_ADDR7)</div><div class='del'>-	PM_PUSH(8, DCPLB_ADDR8)</div><div class='del'>-	PM_PUSH(9, DCPLB_ADDR9)</div><div class='del'>-	PM_PUSH(10, DCPLB_ADDR10)</div><div class='del'>-	PM_PUSH(11, DCPLB_ADDR11)</div><div class='del'>-	PM_PUSH(12, DCPLB_ADDR12)</div><div class='del'>-	PM_PUSH(13, DCPLB_ADDR13)</div><div class='del'>-	PM_PUSH_SYNC(13)</div><div class='del'>-	PM_PUSH(0, DCPLB_ADDR14)</div><div class='del'>-	PM_PUSH(1, DCPLB_ADDR15)</div><div class='del'>-</div><div class='del'>-	/* DCPLB Data */</div><div class='del'>-	FP = I2;</div><div class='del'>-	PM_PUSH(2, DCPLB_DATA0)</div><div class='del'>-	PM_PUSH(3, DCPLB_DATA1)</div><div class='del'>-	PM_PUSH(4, DCPLB_DATA2)</div><div class='del'>-	PM_PUSH(5, DCPLB_DATA3)</div><div class='del'>-	PM_PUSH(6, DCPLB_DATA4)</div><div class='del'>-	PM_PUSH(7, DCPLB_DATA5)</div><div class='del'>-	PM_PUSH(8, DCPLB_DATA6)</div><div class='del'>-	PM_PUSH(9, DCPLB_DATA7)</div><div class='del'>-	PM_PUSH(10, DCPLB_DATA8)</div><div class='del'>-	PM_PUSH(11, DCPLB_DATA9)</div><div class='del'>-	PM_PUSH(12, DCPLB_DATA10)</div><div class='del'>-	PM_PUSH(13, DCPLB_DATA11)</div><div class='del'>-	PM_PUSH_SYNC(13)</div><div class='del'>-	PM_PUSH(0, DCPLB_DATA12)</div><div class='del'>-	PM_PUSH(1, DCPLB_DATA13)</div><div class='del'>-	PM_PUSH(2, DCPLB_DATA14)</div><div class='del'>-	PM_PUSH(3, DCPLB_DATA15)</div><div class='del'>-</div><div class='del'>-	/* ICPLB Addr */</div><div class='del'>-	FP = I3;</div><div class='del'>-	PM_PUSH(4, ICPLB_ADDR0)</div><div class='del'>-	PM_PUSH(5, ICPLB_ADDR1)</div><div class='del'>-	PM_PUSH(6, ICPLB_ADDR2)</div><div class='del'>-	PM_PUSH(7, ICPLB_ADDR3)</div><div class='del'>-	PM_PUSH(8, ICPLB_ADDR4)</div><div class='del'>-	PM_PUSH(9, ICPLB_ADDR5)</div><div class='del'>-	PM_PUSH(10, ICPLB_ADDR6)</div><div class='del'>-	PM_PUSH(11, ICPLB_ADDR7)</div><div class='del'>-	PM_PUSH(12, ICPLB_ADDR8)</div><div class='del'>-	PM_PUSH(13, ICPLB_ADDR9)</div><div class='del'>-	PM_PUSH_SYNC(13)</div><div class='del'>-	PM_PUSH(0, ICPLB_ADDR10)</div><div class='del'>-	PM_PUSH(1, ICPLB_ADDR11)</div><div class='del'>-	PM_PUSH(2, ICPLB_ADDR12)</div><div class='del'>-	PM_PUSH(3, ICPLB_ADDR13)</div><div class='del'>-	PM_PUSH(4, ICPLB_ADDR14)</div><div class='del'>-	PM_PUSH(5, ICPLB_ADDR15)</div><div class='del'>-</div><div class='del'>-	/* ICPLB Data */</div><div class='del'>-	FP = B0;</div><div class='del'>-	PM_PUSH(6, ICPLB_DATA0)</div><div class='del'>-	PM_PUSH(7, ICPLB_DATA1)</div><div class='del'>-	PM_PUSH(8, ICPLB_DATA2)</div><div class='del'>-	PM_PUSH(9, ICPLB_DATA3)</div><div class='del'>-	PM_PUSH(10, ICPLB_DATA4)</div><div class='del'>-	PM_PUSH(11, ICPLB_DATA5)</div><div class='del'>-	PM_PUSH(12, ICPLB_DATA6)</div><div class='del'>-	PM_PUSH(13, ICPLB_DATA7)</div><div class='del'>-	PM_PUSH_SYNC(13)</div><div class='del'>-	PM_PUSH(0, ICPLB_DATA8)</div><div class='del'>-	PM_PUSH(1, ICPLB_DATA9)</div><div class='del'>-	PM_PUSH(2, ICPLB_DATA10)</div><div class='del'>-	PM_PUSH(3, ICPLB_DATA11)</div><div class='del'>-	PM_PUSH(4, ICPLB_DATA12)</div><div class='del'>-	PM_PUSH(5, ICPLB_DATA13)</div><div class='del'>-	PM_PUSH(6, ICPLB_DATA14)</div><div class='del'>-	PM_PUSH(7, ICPLB_DATA15)</div><div class='del'>-</div><div class='del'>-	/* Event Vectors */</div><div class='del'>-	FP = B1;</div><div class='del'>-	PM_PUSH(8, EVT2)</div><div class='del'>-	PM_PUSH(9, EVT3)</div><div class='del'>-	FP += 4;	/* EVT4 */</div><div class='del'>-	PM_PUSH(10, EVT5)</div><div class='del'>-	PM_PUSH(11, EVT6)</div><div class='del'>-	PM_PUSH(12, EVT7)</div><div class='del'>-	PM_PUSH(13, EVT8)</div><div class='del'>-	PM_PUSH_SYNC(13)</div><div class='del'>-	PM_PUSH(0, EVT9)</div><div class='del'>-	PM_PUSH(1, EVT10)</div><div class='del'>-	PM_PUSH(2, EVT11)</div><div class='del'>-	PM_PUSH(3, EVT12)</div><div class='del'>-	PM_PUSH(4, EVT13)</div><div class='del'>-	PM_PUSH(5, EVT14)</div><div class='del'>-	PM_PUSH(6, EVT15)</div><div class='del'>-</div><div class='del'>-	/* CEC */</div><div class='del'>-	FP = B2;</div><div class='del'>-	PM_PUSH(7, IMASK)</div><div class='del'>-	FP += 4;	/* IPEND */</div><div class='del'>-	PM_PUSH(8, ILAT)</div><div class='del'>-	PM_PUSH(9, IPRIO)</div><div class='del'>-</div><div class='del'>-	/* Core Timer */</div><div class='del'>-	FP = B3;</div><div class='del'>-	PM_PUSH(10, TCNTL)</div><div class='del'>-	PM_PUSH(11, TPERIOD)</div><div class='del'>-	PM_PUSH(12, TSCALE)</div><div class='del'>-	PM_PUSH(13, TCOUNT)</div><div class='del'>-	PM_PUSH_SYNC(13)</div><div class='del'>-</div><div class='del'>-	/* Misc non-contiguous registers */</div><div class='del'>-	FP = I0;</div><div class='del'>-	PM_CORE_PUSH(0, DMEM_CONTROL);</div><div class='del'>-	PM_CORE_PUSH(1, IMEM_CONTROL);</div><div class='del'>-	PM_CORE_PUSH(2, TBUFCTL);</div><div class='del'>-	PM_PUSH_SYNC(2)</div><div class='add'>+	bfin_cpu_reg_save;</div><div class='add'>+	bfin_sys_mmr_save;</div><div class='add'>+	bfin_core_mmr_save;</div><div class='ctx'> </div><div class='ctx'> 	/* Setup args to hibernate mode early for pipeline optimization */</div><div class='ctx'> 	R0 = M3;</div><div class='hunk'>@@ -618,274 +309,9 @@ ENTRY(_do_hibernate)</div><div class='ctx'> </div><div class='ctx'> .Lpm_resume_here:</div><div class='ctx'> </div><div class='del'>-	/* Restore Core MMRs */</div><div class='del'>-	I0.H = hi(COREMMR_BASE);</div><div class='del'>-	I0.L = lo(COREMMR_BASE);</div><div class='del'>-	I1 = I0;</div><div class='del'>-	I2 = I0;</div><div class='del'>-	I3 = I0;</div><div class='del'>-	B0 = I0;</div><div class='del'>-	B1 = I0;</div><div class='del'>-	B2 = I0;</div><div class='del'>-	B3 = I0;</div><div class='del'>-	I1.L = lo(DCPLB_ADDR15);</div><div class='del'>-	I2.L = lo(DCPLB_DATA15);</div><div class='del'>-	I3.L = lo(ICPLB_ADDR15);</div><div class='del'>-	B0.L = lo(ICPLB_DATA15);</div><div class='del'>-	B1.L = lo(EVT15);</div><div class='del'>-	B2.L = lo(IPRIO);</div><div class='del'>-	B3.L = lo(TCOUNT);</div><div class='del'>-</div><div class='del'>-	/* Misc non-contiguous registers */</div><div class='del'>-	FP = I0;</div><div class='del'>-	PM_POP_SYNC(2)</div><div class='del'>-	PM_CORE_POP(2, TBUFCTL)</div><div class='del'>-	PM_CORE_POP(1, IMEM_CONTROL)</div><div class='del'>-	PM_CORE_POP(0, DMEM_CONTROL)</div><div class='del'>-</div><div class='del'>-	/* Core Timer */</div><div class='del'>-	PM_POP_SYNC(13)</div><div class='del'>-	FP = B3;</div><div class='del'>-	PM_POP(13, TCOUNT)</div><div class='del'>-	PM_POP(12, TSCALE)</div><div class='del'>-	PM_POP(11, TPERIOD)</div><div class='del'>-	PM_POP(10, TCNTL)</div><div class='del'>-</div><div class='del'>-	/* CEC */</div><div class='del'>-	FP = B2;</div><div class='del'>-	PM_POP(9, IPRIO)</div><div class='del'>-	PM_POP(8, ILAT)</div><div class='del'>-	FP += -4;	/* IPEND */</div><div class='del'>-	PM_POP(7, IMASK)</div><div class='del'>-</div><div class='del'>-	/* Event Vectors */</div><div class='del'>-	FP = B1;</div><div class='del'>-	PM_POP(6, EVT15)</div><div class='del'>-	PM_POP(5, EVT14)</div><div class='del'>-	PM_POP(4, EVT13)</div><div class='del'>-	PM_POP(3, EVT12)</div><div class='del'>-	PM_POP(2, EVT11)</div><div class='del'>-	PM_POP(1, EVT10)</div><div class='del'>-	PM_POP(0, EVT9)</div><div class='del'>-	PM_POP_SYNC(13)</div><div class='del'>-	PM_POP(13, EVT8)</div><div class='del'>-	PM_POP(12, EVT7)</div><div class='del'>-	PM_POP(11, EVT6)</div><div class='del'>-	PM_POP(10, EVT5)</div><div class='del'>-	FP += -4;	/* EVT4 */</div><div class='del'>-	PM_POP(9, EVT3)</div><div class='del'>-	PM_POP(8, EVT2)</div><div class='del'>-</div><div class='del'>-	/* ICPLB Data */</div><div class='del'>-	FP = B0;</div><div class='del'>-	PM_POP(7, ICPLB_DATA15)</div><div class='del'>-	PM_POP(6, ICPLB_DATA14)</div><div class='del'>-	PM_POP(5, ICPLB_DATA13)</div><div class='del'>-	PM_POP(4, ICPLB_DATA12)</div><div class='del'>-	PM_POP(3, ICPLB_DATA11)</div><div class='del'>-	PM_POP(2, ICPLB_DATA10)</div><div class='del'>-	PM_POP(1, ICPLB_DATA9)</div><div class='del'>-	PM_POP(0, ICPLB_DATA8)</div><div class='del'>-	PM_POP_SYNC(13)</div><div class='del'>-	PM_POP(13, ICPLB_DATA7)</div><div class='del'>-	PM_POP(12, ICPLB_DATA6)</div><div class='del'>-	PM_POP(11, ICPLB_DATA5)</div><div class='del'>-	PM_POP(10, ICPLB_DATA4)</div><div class='del'>-	PM_POP(9, ICPLB_DATA3)</div><div class='del'>-	PM_POP(8, ICPLB_DATA2)</div><div class='del'>-	PM_POP(7, ICPLB_DATA1)</div><div class='del'>-	PM_POP(6, ICPLB_DATA0)</div><div class='del'>-</div><div class='del'>-	/* ICPLB Addr */</div><div class='del'>-	FP = I3;</div><div class='del'>-	PM_POP(5, ICPLB_ADDR15)</div><div class='del'>-	PM_POP(4, ICPLB_ADDR14)</div><div class='del'>-	PM_POP(3, ICPLB_ADDR13)</div><div class='del'>-	PM_POP(2, ICPLB_ADDR12)</div><div class='del'>-	PM_POP(1, ICPLB_ADDR11)</div><div class='del'>-	PM_POP(0, ICPLB_ADDR10)</div><div class='del'>-	PM_POP_SYNC(13)</div><div class='del'>-	PM_POP(13, ICPLB_ADDR9)</div><div class='del'>-	PM_POP(12, ICPLB_ADDR8)</div><div class='del'>-	PM_POP(11, ICPLB_ADDR7)</div><div class='del'>-	PM_POP(10, ICPLB_ADDR6)</div><div class='del'>-	PM_POP(9, ICPLB_ADDR5)</div><div class='del'>-	PM_POP(8, ICPLB_ADDR4)</div><div class='del'>-	PM_POP(7, ICPLB_ADDR3)</div><div class='del'>-	PM_POP(6, ICPLB_ADDR2)</div><div class='del'>-	PM_POP(5, ICPLB_ADDR1)</div><div class='del'>-	PM_POP(4, ICPLB_ADDR0)</div><div class='del'>-</div><div class='del'>-	/* DCPLB Data */</div><div class='del'>-	FP = I2;</div><div class='del'>-	PM_POP(3, DCPLB_DATA15)</div><div class='del'>-	PM_POP(2, DCPLB_DATA14)</div><div class='del'>-	PM_POP(1, DCPLB_DATA13)</div><div class='del'>-	PM_POP(0, DCPLB_DATA12)</div><div class='del'>-	PM_POP_SYNC(13)</div><div class='del'>-	PM_POP(13, DCPLB_DATA11)</div><div class='del'>-	PM_POP(12, DCPLB_DATA10)</div><div class='del'>-	PM_POP(11, DCPLB_DATA9)</div><div class='del'>-	PM_POP(10, DCPLB_DATA8)</div><div class='del'>-	PM_POP(9, DCPLB_DATA7)</div><div class='del'>-	PM_POP(8, DCPLB_DATA6)</div><div class='del'>-	PM_POP(7, DCPLB_DATA5)</div><div class='del'>-	PM_POP(6, DCPLB_DATA4)</div><div class='del'>-	PM_POP(5, DCPLB_DATA3)</div><div class='del'>-	PM_POP(4, DCPLB_DATA2)</div><div class='del'>-	PM_POP(3, DCPLB_DATA1)</div><div class='del'>-	PM_POP(2, DCPLB_DATA0)</div><div class='del'>-</div><div class='del'>-	/* DCPLB Addr */</div><div class='del'>-	FP = I1;</div><div class='del'>-	PM_POP(1, DCPLB_ADDR15)</div><div class='del'>-	PM_POP(0, DCPLB_ADDR14)</div><div class='del'>-	PM_POP_SYNC(13)</div><div class='del'>-	PM_POP(13, DCPLB_ADDR13)</div><div class='del'>-	PM_POP(12, DCPLB_ADDR12)</div><div class='del'>-	PM_POP(11, DCPLB_ADDR11)</div><div class='del'>-	PM_POP(10, DCPLB_ADDR10)</div><div class='del'>-	PM_POP(9, DCPLB_ADDR9)</div><div class='del'>-	PM_POP(8, DCPLB_ADDR8)</div><div class='del'>-	PM_POP(7, DCPLB_ADDR7)</div><div class='del'>-	PM_POP(6, DCPLB_ADDR6)</div><div class='del'>-	PM_POP(5, DCPLB_ADDR5)</div><div class='del'>-	PM_POP(4, DCPLB_ADDR4)</div><div class='del'>-	PM_POP(3, DCPLB_ADDR3)</div><div class='del'>-	PM_POP(2, DCPLB_ADDR2)</div><div class='del'>-	PM_POP(1, DCPLB_ADDR1)</div><div class='del'>-	PM_POP(0, DCPLB_ADDR0)</div><div class='del'>-</div><div class='del'>-	/* Restore System MMRs */</div><div class='del'>-	FP.H = hi(SYSMMR_BASE);</div><div class='del'>-	FP.L = lo(SYSMMR_BASE);</div><div class='del'>-</div><div class='del'>-#ifdef EBIU_FCTL</div><div class='del'>-	PM_POP_SYNC(12)</div><div class='del'>-	PM_SYS_POP(12, EBIU_FCTL)</div><div class='del'>-	PM_SYS_POP(11, EBIU_MODE)</div><div class='del'>-	PM_SYS_POP(10, EBIU_MBSCTL)</div><div class='del'>-#else</div><div class='del'>-	PM_POP_SYNC(9)</div><div class='del'>-#endif</div><div class='del'>-	PM_SYS_POP(9, EBIU_AMBCTL1)</div><div class='del'>-	PM_SYS_POP(8, EBIU_AMBCTL0)</div><div class='del'>-	PM_SYS_POP16(7, EBIU_AMGCTL)</div><div class='del'>-</div><div class='del'>-	PM_SYS_POP16(6, SYSCR)</div><div class='del'>-</div><div class='del'>-#ifdef PINT0_ASSIGN</div><div class='del'>-	PM_SYS_POP(5, PINT3_EDGE_SET)</div><div class='del'>-	PM_SYS_POP(4, PINT2_EDGE_SET)</div><div class='del'>-	PM_SYS_POP(3, PINT1_EDGE_SET)</div><div class='del'>-	PM_SYS_POP(2, PINT0_EDGE_SET)</div><div class='del'>-	PM_SYS_POP(1, PINT3_INVERT_SET)</div><div class='del'>-	PM_SYS_POP(0, PINT2_INVERT_SET)</div><div class='del'>-	PM_POP_SYNC(13)</div><div class='del'>-	PM_SYS_POP(13, PINT1_INVERT_SET)</div><div class='del'>-	PM_SYS_POP(12, PINT0_INVERT_SET)</div><div class='del'>-	PM_SYS_POP(11, PINT3_ASSIGN)</div><div class='del'>-	PM_SYS_POP(10, PINT2_ASSIGN)</div><div class='del'>-	PM_SYS_POP(9, PINT1_ASSIGN)</div><div class='del'>-	PM_SYS_POP(8, PINT0_ASSIGN)</div><div class='del'>-	PM_SYS_POP(7, PINT3_MASK_SET)</div><div class='del'>-	PM_SYS_POP(6, PINT2_MASK_SET)</div><div class='del'>-	PM_SYS_POP(5, PINT1_MASK_SET)</div><div class='del'>-	PM_SYS_POP(4, PINT0_MASK_SET)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef SIC_IWR2</div><div class='del'>-	PM_SYS_POP(3, SIC_IWR2)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IWR1</div><div class='del'>-	PM_SYS_POP(2, SIC_IWR1)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IWR0</div><div class='del'>-	PM_SYS_POP(1, SIC_IWR0)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IWR</div><div class='del'>-	PM_SYS_POP(1, SIC_IWR)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef SIC_IAR11</div><div class='del'>-	PM_SYS_POP(0, SIC_IAR11)</div><div class='del'>-#endif</div><div class='del'>-	PM_POP_SYNC(13)</div><div class='del'>-#ifdef SIC_IAR8</div><div class='del'>-	PM_SYS_POP(13, SIC_IAR10)</div><div class='del'>-	PM_SYS_POP(12, SIC_IAR9)</div><div class='del'>-	PM_SYS_POP(11, SIC_IAR8)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IAR7</div><div class='del'>-	PM_SYS_POP(10, SIC_IAR7)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IAR6</div><div class='del'>-	PM_SYS_POP(9, SIC_IAR6)</div><div class='del'>-	PM_SYS_POP(8, SIC_IAR5)</div><div class='del'>-	PM_SYS_POP(7, SIC_IAR4)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IAR3</div><div class='del'>-	PM_SYS_POP(6, SIC_IAR3)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IAR0</div><div class='del'>-	PM_SYS_POP(5, SIC_IAR2)</div><div class='del'>-	PM_SYS_POP(4, SIC_IAR1)</div><div class='del'>-	PM_SYS_POP(3, SIC_IAR0)</div><div class='del'>-#endif</div><div class='del'>-#ifdef SIC_IMASK0</div><div class='del'>-# ifdef SIC_IMASK2</div><div class='del'>-	PM_SYS_POP(2, SIC_IMASK2)</div><div class='del'>-# endif</div><div class='del'>-	PM_SYS_POP(1, SIC_IMASK1)</div><div class='del'>-	PM_SYS_POP(0, SIC_IMASK0)</div><div class='del'>-#else</div><div class='del'>-	PM_SYS_POP(0, SIC_IMASK)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* Restore Core Registers */</div><div class='del'>-	RETI = [sp++];</div><div class='del'>-	SEQSTAT = [sp++];</div><div class='del'>-	RETX = [sp++];</div><div class='del'>-	SYSCFG = [sp++];</div><div class='del'>-	CYCLES2 = [sp++];</div><div class='del'>-	CYCLES = [sp++];</div><div class='del'>-	ASTAT = [sp++];</div><div class='del'>-	RETS = [sp++];</div><div class='del'>-</div><div class='del'>-	LB1 = [sp++];</div><div class='del'>-	LB0 = [sp++];</div><div class='del'>-	LT1 = [sp++];</div><div class='del'>-	LT0 = [sp++];</div><div class='del'>-	LC1 = [sp++];</div><div class='del'>-	LC0 = [sp++];</div><div class='del'>-</div><div class='del'>-	a1.w = [sp++];</div><div class='del'>-	a1.x = [sp++];</div><div class='del'>-	a0.w = [sp++];</div><div class='del'>-	a0.x = [sp++];</div><div class='del'>-	b3 = [sp++];</div><div class='del'>-	b2 = [sp++];</div><div class='del'>-	b1 = [sp++];</div><div class='del'>-	b0 = [sp++];</div><div class='del'>-</div><div class='del'>-	l3 = [sp++];</div><div class='del'>-	l2 = [sp++];</div><div class='del'>-	l1 = [sp++];</div><div class='del'>-	l0 = [sp++];</div><div class='del'>-</div><div class='del'>-	m3 = [sp++];</div><div class='del'>-	m2 = [sp++];</div><div class='del'>-	m1 = [sp++];</div><div class='del'>-	m0 = [sp++];</div><div class='del'>-</div><div class='del'>-	i3 = [sp++];</div><div class='del'>-	i2 = [sp++];</div><div class='del'>-	i1 = [sp++];</div><div class='del'>-	i0 = [sp++];</div><div class='del'>-</div><div class='del'>-	usp = [sp++];</div><div class='del'>-	fp = [sp++];</div><div class='del'>-	(R7:0, P5:0) = [sp++];</div><div class='add'>+	bfin_core_mmr_restore;</div><div class='add'>+	bfin_sys_mmr_restore;</div><div class='add'>+	bfin_cpu_reg_restore;</div><div class='ctx'> </div><div class='ctx'> 	[--sp] = RETI;	/* Clear Global Interrupt Disable */</div><div class='ctx'> 	SP += 4;</div><div class='head'>diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S<br/>index 4698a9800522..04c2fbe41a7f 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-common/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-common/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-common/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/entry.S</a></div><div class='hunk'>@@ -711,8 +711,6 @@ ENTRY(_system_call)</div><div class='ctx'> 	jump .Lresume_userspace_1;</div><div class='ctx'> </div><div class='ctx'> .Lsyscall_sigpending:</div><div class='del'>-	cc = BITTST(r7, TIF_RESTORE_SIGMASK);</div><div class='del'>-	if cc jump .Lsyscall_do_signals;</div><div class='ctx'> 	cc = BITTST(r7, TIF_SIGPENDING);</div><div class='ctx'> 	if cc jump .Lsyscall_do_signals;</div><div class='ctx'> 	cc = BITTST(r7, TIF_NOTIFY_RESUME);</div><div class='hunk'>@@ -1141,7 +1139,8 @@ ENTRY(_schedule_and_signal_from_int)</div><div class='ctx'> 	sti r0;</div><div class='ctx'> </div><div class='ctx'> 	/* finish the userspace "atomic" functions for it */</div><div class='del'>-	r1 = FIXED_CODE_END;</div><div class='add'>+	r1.l = lo(FIXED_CODE_END);</div><div class='add'>+	r1.h = hi(FIXED_CODE_END);</div><div class='ctx'> 	r2 = [sp + PT_PC];</div><div class='ctx'> 	cc = r1 &lt;= r2;</div><div class='ctx'> 	if cc jump .Lresume_userspace (bp);</div><div class='hunk'>@@ -1376,7 +1375,7 @@ END(_ex_table)</div><div class='ctx'> ENTRY(_sys_call_table)</div><div class='ctx'> 	.long _sys_restart_syscall	/* 0 */</div><div class='ctx'> 	.long _sys_exit</div><div class='del'>-	.long _sys_fork</div><div class='add'>+	.long _sys_ni_syscall	/* fork */</div><div class='ctx'> 	.long _sys_read</div><div class='ctx'> 	.long _sys_write</div><div class='ctx'> 	.long _sys_open		/* 5 */</div><div class='head'>diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S<br/>index 8b4d98854403..31515f0146f9 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-common/head.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-common/head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-common/head.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/head.S</a></div><div class='hunk'>@@ -210,14 +210,12 @@ ENDPROC(__start)</div><div class='ctx'> ENTRY(_real_start)</div><div class='ctx'> 	/* Enable nested interrupts */</div><div class='ctx'> 	[--sp] = reti;</div><div class='del'>-</div><div class='ctx'> 	/* watchdog off for now */</div><div class='ctx'> 	p0.l = lo(WDOG_CTL);</div><div class='ctx'> 	p0.h = hi(WDOG_CTL);</div><div class='ctx'> 	r0 = 0xAD6(z);</div><div class='ctx'> 	w[p0] = r0;</div><div class='ctx'> 	ssync;</div><div class='del'>-</div><div class='ctx'> 	/* Pass the u-boot arguments to the global value command line */</div><div class='ctx'> 	R0 = R7;</div><div class='ctx'> 	call _cmdline_init;</div><div class='head'>diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c<br/>index 332dace6af34..2729cba715b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-common/ints-priority.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-common/ints-priority.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-common/ints-priority.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/ints-priority.c</a></div><div class='hunk'>@@ -16,6 +16,8 @@</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/syscore_ops.h&gt;</div><div class='add'>+#include &lt;asm/delay.h&gt;</div><div class='ctx'> #ifdef CONFIG_IPIPE</div><div class='ctx'> #include &lt;linux/ipipe.h&gt;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -25,7 +27,11 @@</div><div class='ctx'> #include &lt;asm/irq_handler.h&gt;</div><div class='ctx'> #include &lt;asm/dpmc.h&gt;</div><div class='ctx'> </div><div class='del'>-#define SIC_SYSIRQ(irq)	(irq - (IRQ_CORETMR + 1))</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='add'>+# define SIC_SYSIRQ(irq)	(irq - (IRQ_CORETMR + 1))</div><div class='add'>+#else</div><div class='add'>+# define SIC_SYSIRQ(irq)	((irq) - IVG15)</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * NOTES:</div><div class='hunk'>@@ -50,6 +56,7 @@ unsigned long bfin_sic_iwr[3];	/* Up to 3 SIC_IWRx registers */</div><div class='ctx'> unsigned vr_wakeup;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> static struct ivgx {</div><div class='ctx'> 	/* irq number for request_irq, available in mach-bf5xx/irq.h */</div><div class='ctx'> 	unsigned int irqno;</div><div class='hunk'>@@ -78,7 +85,8 @@ static void __init search_IAR(void)</div><div class='ctx'> </div><div class='ctx'> 		for (irqN = 0; irqN &lt; NR_PERI_INTS; irqN += 4) {</div><div class='ctx'> 			int irqn;</div><div class='del'>-			u32 iar = bfin_read32((unsigned long *)SIC_IAR0 +</div><div class='add'>+			u32 iar =</div><div class='add'>+				bfin_read32((unsigned long *)SIC_IAR0 +</div><div class='ctx'> #if defined(CONFIG_BF51x) || defined(CONFIG_BF52x) || \</div><div class='ctx'> 	defined(CONFIG_BF538) || defined(CONFIG_BF539)</div><div class='ctx'> 				((irqN % 32) &gt;&gt; 3) + ((irqN / 32) * ((SIC_IAR4 - SIC_IAR0) / 4))</div><div class='hunk'>@@ -86,7 +94,6 @@ static void __init search_IAR(void)</div><div class='ctx'> 				(irqN &gt;&gt; 3)</div><div class='ctx'> #endif</div><div class='ctx'> 				);</div><div class='del'>-</div><div class='ctx'> 			for (irqn = irqN; irqn &lt; irqN + 4; ++irqn) {</div><div class='ctx'> 				int iar_shift = (irqn &amp; 7) * 4;</div><div class='ctx'> 				if (ivg == (0xf &amp; (iar &gt;&gt; iar_shift))) {</div><div class='hunk'>@@ -99,11 +106,11 @@ static void __init search_IAR(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This is for core internal IRQs</div><div class='ctx'>  */</div><div class='del'>-</div><div class='ctx'> void bfin_ack_noop(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	/* Dummy function.  */</div><div class='hunk'>@@ -136,21 +143,21 @@ static void bfin_core_unmask_irq(struct irq_data *d)</div><div class='ctx'> void bfin_internal_mask_irq(unsigned int irq)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags = hard_local_irq_save();</div><div class='del'>-</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> #ifdef SIC_IMASK0</div><div class='ctx'> 	unsigned mask_bank = SIC_SYSIRQ(irq) / 32;</div><div class='ctx'> 	unsigned mask_bit = SIC_SYSIRQ(irq) % 32;</div><div class='ctx'> 	bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &amp;</div><div class='del'>-			     ~(1 &lt;&lt; mask_bit));</div><div class='del'>-# ifdef CONFIG_SMP</div><div class='add'>+			~(1 &lt;&lt; mask_bit));</div><div class='add'>+# if defined(CONFIG_SMP) || defined(CONFIG_ICC)</div><div class='ctx'> 	bfin_write_SICB_IMASK(mask_bank, bfin_read_SICB_IMASK(mask_bank) &amp;</div><div class='del'>-			     ~(1 &lt;&lt; mask_bit));</div><div class='add'>+			~(1 &lt;&lt; mask_bit));</div><div class='ctx'> # endif</div><div class='ctx'> #else</div><div class='ctx'> 	bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &amp;</div><div class='del'>-			     ~(1 &lt;&lt; SIC_SYSIRQ(irq)));</div><div class='add'>+			~(1 &lt;&lt; SIC_SYSIRQ(irq)));</div><div class='add'>+#endif /* end of SIC_IMASK0 */</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='ctx'> 	hard_local_irq_restore(flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -160,7 +167,7 @@ static void bfin_internal_mask_irq_chip(struct irq_data *d)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-static void bfin_internal_unmask_irq_affinity(unsigned int irq,</div><div class='add'>+void bfin_internal_unmask_irq_affinity(unsigned int irq,</div><div class='ctx'> 		const struct cpumask *affinity)</div><div class='ctx'> #else</div><div class='ctx'> void bfin_internal_unmask_irq(unsigned int irq)</div><div class='hunk'>@@ -168,6 +175,7 @@ void bfin_internal_unmask_irq(unsigned int irq)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags = hard_local_irq_save();</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> #ifdef SIC_IMASK0</div><div class='ctx'> 	unsigned mask_bank = SIC_SYSIRQ(irq) / 32;</div><div class='ctx'> 	unsigned mask_bit = SIC_SYSIRQ(irq) % 32;</div><div class='hunk'>@@ -175,22 +183,239 @@ void bfin_internal_unmask_irq(unsigned int irq)</div><div class='ctx'> 	if (cpumask_test_cpu(0, affinity))</div><div class='ctx'> # endif</div><div class='ctx'> 		bfin_write_SIC_IMASK(mask_bank,</div><div class='del'>-			bfin_read_SIC_IMASK(mask_bank) |</div><div class='del'>-			(1 &lt;&lt; mask_bit));</div><div class='add'>+				bfin_read_SIC_IMASK(mask_bank) |</div><div class='add'>+				(1 &lt;&lt; mask_bit));</div><div class='ctx'> # ifdef CONFIG_SMP</div><div class='ctx'> 	if (cpumask_test_cpu(1, affinity))</div><div class='ctx'> 		bfin_write_SICB_IMASK(mask_bank,</div><div class='del'>-			bfin_read_SICB_IMASK(mask_bank) |</div><div class='del'>-			(1 &lt;&lt; mask_bit));</div><div class='add'>+				bfin_read_SICB_IMASK(mask_bank) |</div><div class='add'>+				(1 &lt;&lt; mask_bit));</div><div class='ctx'> # endif</div><div class='ctx'> #else</div><div class='ctx'> 	bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() |</div><div class='del'>-			     (1 &lt;&lt; SIC_SYSIRQ(irq)));</div><div class='add'>+			(1 &lt;&lt; SIC_SYSIRQ(irq)));</div><div class='add'>+#endif</div><div class='ctx'> #endif</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+static void bfin_sec_preflow_handler(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = hard_local_irq_save();</div><div class='add'>+	unsigned int sid = SIC_SYSIRQ(d-&gt;irq);</div><div class='add'>+</div><div class='add'>+	bfin_write_SEC_SCI(0, SEC_CSID, sid);</div><div class='add'>+</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bfin_sec_mask_ack_irq(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = hard_local_irq_save();</div><div class='add'>+	unsigned int sid = SIC_SYSIRQ(d-&gt;irq);</div><div class='add'>+</div><div class='add'>+	bfin_write_SEC_SCI(0, SEC_CSID, sid);</div><div class='ctx'> </div><div class='ctx'> 	hard_local_irq_restore(flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bfin_sec_unmask_irq(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = hard_local_irq_save();</div><div class='add'>+	unsigned int sid = SIC_SYSIRQ(d-&gt;irq);</div><div class='add'>+</div><div class='add'>+	bfin_write32(SEC_END, sid);</div><div class='add'>+</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bfin_sec_enable_ssi(unsigned int sid)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = hard_local_irq_save();</div><div class='add'>+	uint32_t reg_sctl = bfin_read_SEC_SCTL(sid);</div><div class='add'>+</div><div class='add'>+	reg_sctl |= SEC_SCTL_SRC_EN;</div><div class='add'>+	bfin_write_SEC_SCTL(sid, reg_sctl);</div><div class='add'>+</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bfin_sec_disable_ssi(unsigned int sid)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = hard_local_irq_save();</div><div class='add'>+	uint32_t reg_sctl = bfin_read_SEC_SCTL(sid);</div><div class='add'>+</div><div class='add'>+	reg_sctl &amp;= ((uint32_t)~SEC_SCTL_SRC_EN);</div><div class='add'>+	bfin_write_SEC_SCTL(sid, reg_sctl);</div><div class='add'>+</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bfin_sec_set_ssi_coreid(unsigned int sid, unsigned int coreid)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = hard_local_irq_save();</div><div class='add'>+	uint32_t reg_sctl = bfin_read_SEC_SCTL(sid);</div><div class='add'>+</div><div class='add'>+	reg_sctl &amp;= ((uint32_t)~SEC_SCTL_CTG);</div><div class='add'>+	bfin_write_SEC_SCTL(sid, reg_sctl | ((coreid &lt;&lt; 20) &amp; SEC_SCTL_CTG));</div><div class='add'>+</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bfin_sec_enable_sci(unsigned int sid)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = hard_local_irq_save();</div><div class='add'>+	uint32_t reg_sctl = bfin_read_SEC_SCTL(sid);</div><div class='add'>+</div><div class='add'>+	if (sid == SIC_SYSIRQ(IRQ_WATCH0))</div><div class='add'>+		reg_sctl |= SEC_SCTL_FAULT_EN;</div><div class='add'>+	else</div><div class='add'>+		reg_sctl |= SEC_SCTL_INT_EN;</div><div class='add'>+	bfin_write_SEC_SCTL(sid, reg_sctl);</div><div class='add'>+</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bfin_sec_disable_sci(unsigned int sid)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = hard_local_irq_save();</div><div class='add'>+	uint32_t reg_sctl = bfin_read_SEC_SCTL(sid);</div><div class='add'>+</div><div class='add'>+	reg_sctl &amp;= ((uint32_t)~SEC_SCTL_INT_EN);</div><div class='add'>+	bfin_write_SEC_SCTL(sid, reg_sctl);</div><div class='add'>+</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bfin_sec_enable(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = hard_local_irq_save();</div><div class='add'>+	unsigned int sid = SIC_SYSIRQ(d-&gt;irq);</div><div class='add'>+</div><div class='add'>+	bfin_sec_enable_sci(sid);</div><div class='add'>+	bfin_sec_enable_ssi(sid);</div><div class='add'>+</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bfin_sec_disable(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = hard_local_irq_save();</div><div class='add'>+	unsigned int sid = SIC_SYSIRQ(d-&gt;irq);</div><div class='add'>+</div><div class='add'>+	bfin_sec_disable_sci(sid);</div><div class='add'>+	bfin_sec_disable_ssi(sid);</div><div class='add'>+</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bfin_sec_raise_irq(unsigned int sid)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = hard_local_irq_save();</div><div class='add'>+</div><div class='add'>+	bfin_write32(SEC_RAISE, sid);</div><div class='add'>+</div><div class='add'>+	hard_local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void init_software_driven_irq(void)</div><div class='add'>+{</div><div class='add'>+	bfin_sec_set_ssi_coreid(34, 0);</div><div class='add'>+	bfin_sec_set_ssi_coreid(35, 1);</div><div class='add'>+	bfin_sec_set_ssi_coreid(36, 0);</div><div class='add'>+	bfin_sec_set_ssi_coreid(37, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bfin_sec_resume(void)</div><div class='add'>+{</div><div class='add'>+	bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_RESET);</div><div class='add'>+	udelay(100);</div><div class='add'>+	bfin_write_SEC_GCTL(SEC_GCTL_EN);</div><div class='add'>+	bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_EN | SEC_CCTL_NMI_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void handle_sec_sfi_fault(uint32_t gstat)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void handle_sec_sci_fault(uint32_t gstat)</div><div class='add'>+{</div><div class='add'>+	uint32_t core_id;</div><div class='add'>+	uint32_t cstat;</div><div class='add'>+</div><div class='add'>+	core_id = gstat &amp; SEC_GSTAT_SCI;</div><div class='add'>+	cstat = bfin_read_SEC_SCI(core_id, SEC_CSTAT);</div><div class='add'>+	if (cstat &amp; SEC_CSTAT_ERR) {</div><div class='add'>+		switch (cstat &amp; SEC_CSTAT_ERRC) {</div><div class='add'>+		case SEC_CSTAT_ACKERR:</div><div class='add'>+			printk(KERN_DEBUG "sec ack err\n");</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			printk(KERN_DEBUG "sec sci unknow err\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void handle_sec_ssi_fault(uint32_t gstat)</div><div class='add'>+{</div><div class='add'>+	uint32_t sid;</div><div class='add'>+	uint32_t sstat;</div><div class='add'>+</div><div class='add'>+	sid = gstat &amp; SEC_GSTAT_SID;</div><div class='add'>+	sstat = bfin_read_SEC_SSTAT(sid);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void handle_sec_fault(unsigned int irq, struct irq_desc *desc)</div><div class='add'>+{</div><div class='add'>+	uint32_t sec_gstat;</div><div class='add'>+</div><div class='add'>+	raw_spin_lock(&amp;desc-&gt;lock);</div><div class='add'>+</div><div class='add'>+	sec_gstat = bfin_read32(SEC_GSTAT);</div><div class='add'>+	if (sec_gstat &amp; SEC_GSTAT_ERR) {</div><div class='add'>+</div><div class='add'>+		switch (sec_gstat &amp; SEC_GSTAT_ERRC) {</div><div class='add'>+		case 0:</div><div class='add'>+			handle_sec_sfi_fault(sec_gstat);</div><div class='add'>+			break;</div><div class='add'>+		case SEC_GSTAT_SCIERR:</div><div class='add'>+			handle_sec_sci_fault(sec_gstat);</div><div class='add'>+			break;</div><div class='add'>+		case SEC_GSTAT_SSIERR:</div><div class='add'>+			handle_sec_ssi_fault(sec_gstat);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	raw_spin_unlock(&amp;desc-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sec_suspend(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sec_resume(void)</div><div class='add'>+{</div><div class='add'>+	bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_RESET);</div><div class='add'>+	udelay(100);</div><div class='add'>+	bfin_write_SEC_GCTL(SEC_GCTL_EN);</div><div class='add'>+	bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_EN | SEC_CCTL_NMI_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct syscore_ops sec_pm_syscore_ops = {</div><div class='add'>+	.suspend = sec_suspend,</div><div class='add'>+	.resume = sec_resume,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> static void bfin_internal_unmask_irq_chip(struct irq_data *d)</div><div class='ctx'> {</div><div class='hunk'>@@ -212,7 +437,7 @@ static void bfin_internal_unmask_irq_chip(struct irq_data *d)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='add'>+#if defined(CONFIG_PM) &amp;&amp; !defined(CONFIG_BF60x)</div><div class='ctx'> int bfin_internal_set_wake(unsigned int irq, unsigned int state)</div><div class='ctx'> {</div><div class='ctx'> 	u32 bank, bit, wakeup = 0;</div><div class='hunk'>@@ -271,22 +496,20 @@ static int bfin_internal_set_wake_chip(struct irq_data *d, unsigned int state)</div><div class='ctx'> 	return bfin_internal_set_wake(d-&gt;irq, state);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='add'>+# define bfin_internal_set_wake(irq, state)</div><div class='ctx'> # define bfin_internal_set_wake_chip NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static struct irq_chip bfin_core_irqchip = {</div><div class='ctx'> 	.name = "CORE",</div><div class='del'>-	.irq_ack = bfin_ack_noop,</div><div class='ctx'> 	.irq_mask = bfin_core_mask_irq,</div><div class='ctx'> 	.irq_unmask = bfin_core_unmask_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_chip bfin_internal_irqchip = {</div><div class='ctx'> 	.name = "INTN",</div><div class='del'>-	.irq_ack = bfin_ack_noop,</div><div class='ctx'> 	.irq_mask = bfin_internal_mask_irq_chip,</div><div class='ctx'> 	.irq_unmask = bfin_internal_unmask_irq_chip,</div><div class='del'>-	.irq_mask_ack = bfin_internal_mask_irq_chip,</div><div class='ctx'> 	.irq_disable = bfin_internal_mask_irq_chip,</div><div class='ctx'> 	.irq_enable = bfin_internal_unmask_irq_chip,</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='hunk'>@@ -295,6 +518,18 @@ static struct irq_chip bfin_internal_irqchip = {</div><div class='ctx'> 	.irq_set_wake = bfin_internal_set_wake_chip,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+static struct irq_chip bfin_sec_irqchip = {</div><div class='add'>+	.name = "SEC",</div><div class='add'>+	.irq_mask_ack = bfin_sec_mask_ack_irq,</div><div class='add'>+	.irq_mask = bfin_sec_mask_ack_irq,</div><div class='add'>+	.irq_unmask = bfin_sec_unmask_irq,</div><div class='add'>+	.irq_eoi = bfin_sec_unmask_irq,</div><div class='add'>+	.irq_disable = bfin_sec_disable,</div><div class='add'>+	.irq_enable = bfin_sec_enable,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> void bfin_handle_irq(unsigned irq)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_IPIPE</div><div class='hunk'>@@ -396,8 +631,6 @@ int bfin_mac_status_set_wake(struct irq_data *d, unsigned int state)</div><div class='ctx'> </div><div class='ctx'> static struct irq_chip bfin_mac_status_irqchip = {</div><div class='ctx'> 	.name = "MACST",</div><div class='del'>-	.irq_ack = bfin_ack_noop,</div><div class='del'>-	.irq_mask_ack = bfin_mac_status_mask_irq,</div><div class='ctx'> 	.irq_mask = bfin_mac_status_mask_irq,</div><div class='ctx'> 	.irq_unmask = bfin_mac_status_unmask_irq,</div><div class='ctx'> 	.irq_set_wake = bfin_mac_status_set_wake,</div><div class='hunk'>@@ -421,15 +654,15 @@ void bfin_demux_mac_status_irq(unsigned int int_err_irq,</div><div class='ctx'> 		} else {</div><div class='ctx'> 			bfin_mac_status_ack_irq(irq);</div><div class='ctx'> 			pr_debug("IRQ %d:"</div><div class='del'>-				 " MASKED MAC ERROR INTERRUPT ASSERTED\n",</div><div class='del'>-				 irq);</div><div class='add'>+					" MASKED MAC ERROR INTERRUPT ASSERTED\n",</div><div class='add'>+					irq);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else</div><div class='ctx'> 		printk(KERN_ERR</div><div class='del'>-		       "%s : %s : LINE %d :\nIRQ ?: MAC ERROR"</div><div class='del'>-		       " INTERRUPT ASSERTED BUT NO SOURCE FOUND"</div><div class='del'>-		       "(EMAC_SYSTAT=0x%X)\n",</div><div class='del'>-		       __func__, __FILE__, __LINE__, status);</div><div class='add'>+				"%s : %s : LINE %d :\nIRQ ?: MAC ERROR"</div><div class='add'>+				" INTERRUPT ASSERTED BUT NO SOURCE FOUND"</div><div class='add'>+				"(EMAC_SYSTAT=0x%X)\n",</div><div class='add'>+				__func__, __FILE__, __LINE__, status);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -583,7 +816,7 @@ static void bfin_demux_gpio_block(unsigned int irq)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void bfin_demux_gpio_irq(unsigned int inta_irq,</div><div class='del'>-			 struct irq_desc *desc)</div><div class='add'>+			struct irq_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int irq;</div><div class='ctx'> </div><div class='hunk'>@@ -635,9 +868,15 @@ void bfin_demux_gpio_irq(unsigned int inta_irq,</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='add'>+# ifndef CONFIG_BF60x</div><div class='ctx'> #define NR_PINT_SYS_IRQS	4</div><div class='del'>-#define NR_PINT_BITS		32</div><div class='ctx'> #define NR_PINTS		160</div><div class='add'>+# else</div><div class='add'>+#define NR_PINT_SYS_IRQS	6</div><div class='add'>+#define NR_PINTS		112</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define NR_PINT_BITS		32</div><div class='ctx'> #define IRQ_NOT_AVAIL		0xFF</div><div class='ctx'> </div><div class='ctx'> #define PINT_2_BANK(x)		((x) &gt;&gt; 5)</div><div class='hunk'>@@ -652,8 +891,13 @@ static struct bfin_pint_regs * const pint[NR_PINT_SYS_IRQS] = {</div><div class='ctx'> 	(struct bfin_pint_regs *)PINT1_MASK_SET,</div><div class='ctx'> 	(struct bfin_pint_regs *)PINT2_MASK_SET,</div><div class='ctx'> 	(struct bfin_pint_regs *)PINT3_MASK_SET,</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	(struct bfin_pint_regs *)PINT4_MASK_SET,</div><div class='add'>+	(struct bfin_pint_regs *)PINT5_MASK_SET,</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> inline unsigned int get_irq_base(u32 bank, u8 bmap)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int irq_base;</div><div class='hunk'>@@ -666,6 +910,16 @@ inline unsigned int get_irq_base(u32 bank, u8 bmap)</div><div class='ctx'> </div><div class='ctx'> 	return irq_base;</div><div class='ctx'> }</div><div class='add'>+#else</div><div class='add'>+inline unsigned int get_irq_base(u32 bank, u8 bmap)</div><div class='add'>+{</div><div class='add'>+	unsigned int irq_base;</div><div class='add'>+</div><div class='add'>+	irq_base = IRQ_PA0 + bank * 16 + bmap * 16;</div><div class='add'>+</div><div class='add'>+	return irq_base;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/* Whenever PINTx_ASSIGN is altered init_pint_lut() must be executed! */</div><div class='ctx'> void init_pint_lut(void)</div><div class='hunk'>@@ -854,6 +1108,14 @@ static int bfin_gpio_set_wake(struct irq_data *d, unsigned int state)</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		pint_irq = IRQ_PINT1;</div><div class='ctx'> 		break;</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	case 4:</div><div class='add'>+		pint_irq = IRQ_PINT4;</div><div class='add'>+		break;</div><div class='add'>+	case 5:</div><div class='add'>+		pint_irq = IRQ_PINT5;</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -867,10 +1129,21 @@ static int bfin_gpio_set_wake(struct irq_data *d, unsigned int state)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> void bfin_demux_gpio_irq(unsigned int inta_irq,</div><div class='del'>-			 struct irq_desc *desc)</div><div class='add'>+			struct irq_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	u32 bank, pint_val;</div><div class='ctx'> 	u32 request, irq;</div><div class='add'>+	u32 level_mask;</div><div class='add'>+	int umask = 0;</div><div class='add'>+	struct irq_chip *chip = irq_desc_get_chip(desc);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;irq_mask_ack) {</div><div class='add'>+		chip-&gt;irq_mask_ack(&amp;desc-&gt;irq_data);</div><div class='add'>+	} else {</div><div class='add'>+		chip-&gt;irq_mask(&amp;desc-&gt;irq_data);</div><div class='add'>+		if (chip-&gt;irq_ack)</div><div class='add'>+			chip-&gt;irq_ack(&amp;desc-&gt;irq_data);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	switch (inta_irq) {</div><div class='ctx'> 	case IRQ_PINT0:</div><div class='hunk'>@@ -885,6 +1158,14 @@ void bfin_demux_gpio_irq(unsigned int inta_irq,</div><div class='ctx'> 	case IRQ_PINT1:</div><div class='ctx'> 		bank = 1;</div><div class='ctx'> 		break;</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	case IRQ_PINT4:</div><div class='add'>+		bank = 4;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_PINT5:</div><div class='add'>+		bank = 5;</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='ctx'> 	default:</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -893,15 +1174,23 @@ void bfin_demux_gpio_irq(unsigned int inta_irq,</div><div class='ctx'> </div><div class='ctx'> 	request = pint[bank]-&gt;request;</div><div class='ctx'> </div><div class='add'>+	level_mask = pint[bank]-&gt;edge_set &amp; request;</div><div class='add'>+</div><div class='ctx'> 	while (request) {</div><div class='ctx'> 		if (request &amp; 1) {</div><div class='ctx'> 			irq = pint2irq_lut[pint_val] + SYS_IRQS;</div><div class='add'>+			if (level_mask &amp; PINT_BIT(pint_val)) {</div><div class='add'>+				umask = 1;</div><div class='add'>+				chip-&gt;irq_unmask(&amp;desc-&gt;irq_data);</div><div class='add'>+			}</div><div class='ctx'> 			bfin_handle_irq(irq);</div><div class='ctx'> 		}</div><div class='ctx'> 		pint_val++;</div><div class='ctx'> 		request &gt;&gt;= 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!umask)</div><div class='add'>+		chip-&gt;irq_unmask(&amp;desc-&gt;irq_data);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -951,6 +1240,7 @@ int __init init_arch_irq(void)</div><div class='ctx'> 	int irq;</div><div class='ctx'> 	unsigned long ilat = 0;</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	/*  Disable all the peripheral intrs  - page 4-29 HW Ref manual */</div><div class='ctx'> #ifdef SIC_IMASK0</div><div class='ctx'> 	bfin_write_SIC_IMASK0(SIC_UNMASK_ALL);</div><div class='hunk'>@@ -958,13 +1248,16 @@ int __init init_arch_irq(void)</div><div class='ctx'> # ifdef SIC_IMASK2</div><div class='ctx'> 	bfin_write_SIC_IMASK2(SIC_UNMASK_ALL);</div><div class='ctx'> # endif</div><div class='del'>-# ifdef CONFIG_SMP</div><div class='add'>+# if defined(CONFIG_SMP) || defined(CONFIG_ICC)</div><div class='ctx'> 	bfin_write_SICB_IMASK0(SIC_UNMASK_ALL);</div><div class='ctx'> 	bfin_write_SICB_IMASK1(SIC_UNMASK_ALL);</div><div class='ctx'> # endif</div><div class='ctx'> #else</div><div class='ctx'> 	bfin_write_SIC_IMASK(SIC_UNMASK_ALL);</div><div class='ctx'> #endif</div><div class='add'>+#else /* CONFIG_BF60x */</div><div class='add'>+	bfin_write_SEC_GCTL(SEC_GCTL_RESET);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	local_irq_disable();</div><div class='ctx'> </div><div class='hunk'>@@ -974,6 +1267,10 @@ int __init init_arch_irq(void)</div><div class='ctx'> 	pint[1]-&gt;assign = CONFIG_PINT1_ASSIGN;</div><div class='ctx'> 	pint[2]-&gt;assign = CONFIG_PINT2_ASSIGN;</div><div class='ctx'> 	pint[3]-&gt;assign = CONFIG_PINT3_ASSIGN;</div><div class='add'>+# ifdef CONFIG_BF60x</div><div class='add'>+	pint[4]-&gt;assign = CONFIG_PINT4_ASSIGN;</div><div class='add'>+	pint[5]-&gt;assign = CONFIG_PINT5_ASSIGN;</div><div class='add'>+# endif</div><div class='ctx'> # endif</div><div class='ctx'> 	/* Whenever PINTx_ASSIGN is altered init_pint_lut() must be executed! */</div><div class='ctx'> 	init_pint_lut();</div><div class='hunk'>@@ -986,6 +1283,7 @@ int __init init_arch_irq(void)</div><div class='ctx'> 			irq_set_chip(irq, &amp;bfin_internal_irqchip);</div><div class='ctx'> </div><div class='ctx'> 		switch (irq) {</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> #if BFIN_GPIO_PINT</div><div class='ctx'> 		case IRQ_PINT0:</div><div class='ctx'> 		case IRQ_PINT1:</div><div class='hunk'>@@ -1015,12 +1313,13 @@ int __init init_arch_irq(void)</div><div class='ctx'> 						bfin_demux_mac_status_irq);</div><div class='ctx'> 			break;</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='add'>+#if defined(CONFIG_SMP) || defined(CONFIG_ICC)</div><div class='ctx'> 		case IRQ_SUPPLE_0:</div><div class='ctx'> 		case IRQ_SUPPLE_1:</div><div class='ctx'> 			irq_set_handler(irq, handle_percpu_irq);</div><div class='ctx'> 			break;</div><div class='ctx'> #endif</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_TICKSOURCE_CORETMR</div><div class='ctx'> 		case IRQ_CORETMR:</div><div class='hunk'>@@ -1050,7 +1349,8 @@ int __init init_arch_irq(void)</div><div class='ctx'> </div><div class='ctx'> 	init_mach_irq();</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='add'>+#if (defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)) &amp;&amp; !defined(CONFIG_BF60x)</div><div class='ctx'> 	for (irq = IRQ_MAC_PHYINT; irq &lt;= IRQ_MAC_STMDONE; irq++)</div><div class='ctx'> 		irq_set_chip_and_handler(irq, &amp;bfin_mac_status_irqchip,</div><div class='ctx'> 					 handle_level_irq);</div><div class='hunk'>@@ -1060,7 +1360,28 @@ int __init init_arch_irq(void)</div><div class='ctx'> 		irq &lt; (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++)</div><div class='ctx'> 		irq_set_chip_and_handler(irq, &amp;bfin_gpio_irqchip,</div><div class='ctx'> 					 handle_level_irq);</div><div class='del'>-</div><div class='add'>+#else</div><div class='add'>+	for (irq = BFIN_IRQ(0); irq &lt;= SYS_IRQS; irq++) {</div><div class='add'>+		if (irq &lt; CORE_IRQS) {</div><div class='add'>+			irq_set_chip(irq, &amp;bfin_sec_irqchip);</div><div class='add'>+			__irq_set_handler(irq, handle_sec_fault, 0, NULL);</div><div class='add'>+		} else if (irq &gt;= BFIN_IRQ(21) &amp;&amp; irq &lt;= BFIN_IRQ(26)) {</div><div class='add'>+			irq_set_chip(irq, &amp;bfin_sec_irqchip);</div><div class='add'>+			irq_set_chained_handler(irq, bfin_demux_gpio_irq);</div><div class='add'>+		} else if (irq &gt;= BFIN_IRQ(34) &amp;&amp; irq &lt;= BFIN_IRQ(37)) {</div><div class='add'>+			irq_set_chip(irq, &amp;bfin_sec_irqchip);</div><div class='add'>+			irq_set_handler(irq, handle_percpu_irq);</div><div class='add'>+		} else {</div><div class='add'>+			irq_set_chip_and_handler(irq, &amp;bfin_sec_irqchip,</div><div class='add'>+					handle_fasteoi_irq);</div><div class='add'>+			__irq_set_preflow_handler(irq, bfin_sec_preflow_handler);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	for (irq = GPIO_IRQ_BASE;</div><div class='add'>+		irq &lt; (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++)</div><div class='add'>+		irq_set_chip_and_handler(irq, &amp;bfin_gpio_irqchip,</div><div class='add'>+					handle_level_irq);</div><div class='add'>+#endif</div><div class='ctx'> 	bfin_write_IMASK(0);</div><div class='ctx'> 	CSYNC();</div><div class='ctx'> 	ilat = bfin_read_ILAT();</div><div class='hunk'>@@ -1072,14 +1393,17 @@ int __init init_arch_irq(void)</div><div class='ctx'> 	/* IMASK=xxx is equivalent to STI xx or bfin_irq_flags=xx,</div><div class='ctx'> 	 * local_irq_enable()</div><div class='ctx'> 	 */</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	program_IAR();</div><div class='ctx'> 	/* Therefore it's better to setup IARs before interrupts enabled */</div><div class='ctx'> 	search_IAR();</div><div class='ctx'> </div><div class='ctx'> 	/* Enable interrupts IVG7-15 */</div><div class='ctx'> 	bfin_irq_flags |= IMASK_IVG15 |</div><div class='del'>-	    IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |</div><div class='del'>-	    IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;</div><div class='add'>+		IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |</div><div class='add'>+		IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;</div><div class='add'>+</div><div class='add'>+	bfin_sti(bfin_irq_flags);</div><div class='ctx'> </div><div class='ctx'> 	/* This implicitly covers ANOMALY_05000171</div><div class='ctx'> 	 * Boot-ROM code modifies SICA_IWRx wakeup registers</div><div class='hunk'>@@ -1103,7 +1427,23 @@ int __init init_arch_irq(void)</div><div class='ctx'> #else</div><div class='ctx'> 	bfin_write_SIC_IWR(IWR_DISABLE_ALL);</div><div class='ctx'> #endif</div><div class='add'>+#else  /* CONFIG_BF60x */</div><div class='add'>+	/* Enable interrupts IVG7-15 */</div><div class='add'>+	bfin_irq_flags |= IMASK_IVG15 |</div><div class='add'>+	    IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |</div><div class='add'>+	    IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+	bfin_write_SEC_FCTL(SEC_FCTL_EN | SEC_FCTL_SYSRST_EN | SEC_FCTL_FLTIN_EN);</div><div class='add'>+	bfin_sec_enable_sci(SIC_SYSIRQ(IRQ_WATCH0));</div><div class='add'>+	bfin_sec_enable_ssi(SIC_SYSIRQ(IRQ_WATCH0));</div><div class='add'>+	bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_RESET);</div><div class='add'>+	udelay(100);</div><div class='add'>+	bfin_write_SEC_GCTL(SEC_GCTL_EN);</div><div class='add'>+	bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_EN | SEC_CCTL_NMI_EN);</div><div class='add'>+	init_software_driven_irq();</div><div class='add'>+	register_syscore_ops(&amp;sec_pm_syscore_ops);</div><div class='add'>+#endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1112,13 +1452,14 @@ __attribute__((l1_text))</div><div class='ctx'> #endif</div><div class='ctx'> static int vec_to_irq(int vec)</div><div class='ctx'> {</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst;</div><div class='ctx'> 	struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop;</div><div class='ctx'> 	unsigned long sic_status[3];</div><div class='del'>-</div><div class='add'>+#endif</div><div class='ctx'> 	if (likely(vec == EVT_IVTMR_P))</div><div class='ctx'> 		return IRQ_CORETMR;</div><div class='del'>-</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> #ifdef SIC_ISR</div><div class='ctx'> 	sic_status[0] = bfin_read_SIC_IMASK() &amp; bfin_read_SIC_ISR();</div><div class='ctx'> #else</div><div class='hunk'>@@ -1147,6 +1488,10 @@ static int vec_to_irq(int vec)</div><div class='ctx'> #endif</div><div class='ctx'> 			return ivg-&gt;irqno;</div><div class='ctx'> 	}</div><div class='add'>+#else</div><div class='add'>+	/* for bf60x read */</div><div class='add'>+	return BFIN_IRQ(bfin_read_SEC_SCI(0, SEC_CSID));</div><div class='add'>+#endif  /* end of CONFIG_BF60x */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DO_IRQ_L1</div><div class='head'>diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c<br/>index 3c648a077e75..ca6655e0d653 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-common/pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-common/pm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-common/pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/pm.c</a></div><div class='hunk'>@@ -19,20 +19,33 @@</div><div class='ctx'> #include &lt;asm/gpio.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='ctx'> #include &lt;asm/dpmc.h&gt;</div><div class='add'>+#include &lt;asm/pm.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+struct bfin_cpu_pm_fns *bfin_cpu_pm;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> void bfin_pm_suspend_standby_enter(void)</div><div class='ctx'> {</div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	bfin_pm_standby_setup();</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM_BFIN_SLEEP_DEEPER</div><div class='del'>-	sleep_deeper(bfin_sic_iwr[0], bfin_sic_iwr[1], bfin_sic_iwr[2]);</div><div class='add'>+#ifdef CONFIG_BF60x</div><div class='add'>+	bfin_cpu_pm-&gt;enter(PM_SUSPEND_STANDBY);</div><div class='ctx'> #else</div><div class='add'>+# ifdef CONFIG_PM_BFIN_SLEEP_DEEPER</div><div class='add'>+	sleep_deeper(bfin_sic_iwr[0], bfin_sic_iwr[1], bfin_sic_iwr[2]);</div><div class='add'>+# else</div><div class='ctx'> 	sleep_mode(bfin_sic_iwr[0], bfin_sic_iwr[1], bfin_sic_iwr[2]);</div><div class='add'>+# endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	bfin_pm_standby_restore();</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> #ifdef SIC_IWR0</div><div class='ctx'> 	bfin_write_SIC_IWR0(IWR_DISABLE_ALL);</div><div class='ctx'> # ifdef SIC_IWR1</div><div class='hunk'>@@ -52,6 +65,8 @@ void bfin_pm_suspend_standby_enter(void)</div><div class='ctx'> #else</div><div class='ctx'> 	bfin_write_SIC_IWR(IWR_DISABLE_ALL);</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int bf53x_suspend_l1_mem(unsigned char *memptr)</div><div class='hunk'>@@ -83,10 +98,13 @@ int bf53x_resume_l1_mem(unsigned char *memptr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)</div><div class='add'>+# ifdef CONFIG_BF60x</div><div class='add'>+__attribute__((l1_text))</div><div class='add'>+# endif</div><div class='ctx'> static void flushinv_all_dcache(void)</div><div class='ctx'> {</div><div class='del'>-	u32 way, bank, subbank, set;</div><div class='del'>-	u32 status, addr;</div><div class='add'>+	register u32 way, bank, subbank, set;</div><div class='add'>+	register u32 status, addr;</div><div class='ctx'> 	u32 dmem_ctl = bfin_read_DMEM_CONTROL();</div><div class='ctx'> </div><div class='ctx'> 	for (bank = 0; bank &lt; 2; ++bank) {</div><div class='hunk'>@@ -133,6 +151,7 @@ int bfin_pm_suspend_mem_enter(void)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	wakeup = bfin_read_VR_CTL() &amp; ~FREQ;</div><div class='ctx'> 	wakeup |= SCKELOW;</div><div class='ctx'> </div><div class='hunk'>@@ -142,6 +161,7 @@ int bfin_pm_suspend_mem_enter(void)</div><div class='ctx'> #ifdef CONFIG_PM_BFIN_WAKE_GP</div><div class='ctx'> 	wakeup |= GPWE;</div><div class='ctx'> #endif</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	ret = blackfin_dma_suspend();</div><div class='ctx'> </div><div class='hunk'>@@ -159,7 +179,11 @@ int bfin_pm_suspend_mem_enter(void)</div><div class='ctx'> 	_disable_icplb();</div><div class='ctx'> 	bf53x_suspend_l1_mem(memptr);</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_BF60x</div><div class='ctx'> 	do_hibernate(wakeup | vr_wakeup);	/* See you later! */</div><div class='add'>+#else</div><div class='add'>+	bfin_cpu_pm-&gt;enter(PM_SUSPEND_MEM);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	bf53x_resume_l1_mem(memptr);</div><div class='ctx'> </div><div class='hunk'>@@ -223,9 +247,39 @@ static int bfin_pm_enter(suspend_state_t state)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BFIN_PM_WAKEUP_TIME_BENCH</div><div class='add'>+void bfin_pm_end(void)</div><div class='add'>+{</div><div class='add'>+	u32 cycle, cycle2;</div><div class='add'>+	u64 usec64;</div><div class='add'>+	u32 usec;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__ (</div><div class='add'>+		"1: %0 = CYCLES2\n"</div><div class='add'>+		"%1 = CYCLES\n"</div><div class='add'>+		"%2 = CYCLES2\n"</div><div class='add'>+		"CC = %2 == %0\n"</div><div class='add'>+		"if ! CC jump 1b\n"</div><div class='add'>+		: "=d,a" (cycle2), "=d,a" (cycle), "=d,a" (usec) : : "CC"</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	usec64 = ((u64)cycle2 &lt;&lt; 32) + cycle;</div><div class='add'>+	do_div(usec64, get_cclk() / USEC_PER_SEC);</div><div class='add'>+	usec = usec64;</div><div class='add'>+	if (usec == 0)</div><div class='add'>+		usec = 1;</div><div class='add'>+</div><div class='add'>+	pr_info("PM: resume of kernel completes after  %ld msec %03ld usec\n",</div><div class='add'>+		usec / USEC_PER_MSEC, usec % USEC_PER_MSEC);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static const struct platform_suspend_ops bfin_pm_ops = {</div><div class='ctx'> 	.enter = bfin_pm_enter,</div><div class='ctx'> 	.valid	= bfin_pm_valid,</div><div class='add'>+#ifdef CONFIG_BFIN_PM_WAKEUP_TIME_BENCH</div><div class='add'>+	.end = bfin_pm_end,</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init bfin_pm_init(void)</div><div class='head'>diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c<br/>index ac8f8a43158c..00bbe672b3b3 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mach-common/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mach-common/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mach-common/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mach-common/smp.c</a></div><div class='hunk'>@@ -340,27 +340,10 @@ void smp_send_stop(void)</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct blackfin_cpudata *ci = &amp;per_cpu(cpu_data, cpu);</div><div class='del'>-	struct task_struct *idle = ci-&gt;idle;</div><div class='ctx'> </div><div class='del'>-	if (idle) {</div><div class='del'>-		free_task(idle);</div><div class='del'>-		idle = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!idle) {</div><div class='del'>-		idle = fork_idle(cpu);</div><div class='del'>-		if (IS_ERR(idle)) {</div><div class='del'>-			printk(KERN_ERR "CPU%u: fork() failed\n", cpu);</div><div class='del'>-			return PTR_ERR(idle);</div><div class='del'>-		}</div><div class='del'>-		ci-&gt;idle = idle;</div><div class='del'>-	} else {</div><div class='del'>-		init_idle(idle, cpu);</div><div class='del'>-	}</div><div class='ctx'> 	secondary_stack = task_stack_page(idle) + THREAD_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	ret = platform_boot_secondary(cpu, idle);</div><div class='head'>diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c<br/>index 78daae084915..9cb85537bd2b 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mm/init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mm/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mm/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mm/init.c</a></div><div class='hunk'>@@ -48,7 +48,7 @@ void __init paging_init(void)</div><div class='ctx'> </div><div class='ctx'> 	unsigned long zones_size[MAX_NR_ZONES] = {</div><div class='ctx'> 		[0] = 0,</div><div class='del'>-		[ZONE_DMA] = (end_mem - PAGE_OFFSET) &gt;&gt; PAGE_SHIFT,</div><div class='add'>+		[ZONE_DMA] = (end_mem - CONFIG_PHY_RAM_BASE_ADDRESS) &gt;&gt; PAGE_SHIFT,</div><div class='ctx'> 		[ZONE_NORMAL] = 0,</div><div class='ctx'> #ifdef CONFIG_HIGHMEM</div><div class='ctx'> 		[ZONE_HIGHMEM] = 0,</div><div class='hunk'>@@ -60,7 +60,8 @@ void __init paging_init(void)</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("free_area_init -&gt; start_mem is %#lx virtual_end is %#lx\n",</div><div class='ctx'> 	        PAGE_ALIGN(memory_start), end_mem);</div><div class='del'>-	free_area_init(zones_size);</div><div class='add'>+	free_area_init_node(0, zones_size,</div><div class='add'>+		CONFIG_PHY_RAM_BASE_ADDRESS &gt;&gt; PAGE_SHIFT, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void __init init_pda(void)</div><div class='hunk'>@@ -75,9 +76,6 @@ asmlinkage void __init init_pda(void)</div><div class='ctx'> 	   valid pointers to it. */</div><div class='ctx'> 	memset(&amp;cpu_pda[cpu], 0, sizeof(cpu_pda[cpu]));</div><div class='ctx'> </div><div class='del'>-	cpu_pda[0].next = &amp;cpu_pda[1];</div><div class='del'>-	cpu_pda[1].next = &amp;cpu_pda[0];</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_EXCEPTION_L1_SCRATCH</div><div class='ctx'> 	cpu_pda[cpu].ex_stack = (unsigned long *)(L1_SCRATCH_START + \</div><div class='ctx'> 					L1_SCRATCH_LENGTH);</div><div class='hunk'>@@ -109,10 +107,10 @@ void __init mem_init(void)</div><div class='ctx'> 	totalram_pages = free_all_bootmem();</div><div class='ctx'> </div><div class='ctx'> 	reservedpages = 0;</div><div class='del'>-	for (tmp = 0; tmp &lt; max_mapnr; tmp++)</div><div class='add'>+	for (tmp = ARCH_PFN_OFFSET; tmp &lt; max_mapnr; tmp++)</div><div class='ctx'> 		if (PageReserved(pfn_to_page(tmp)))</div><div class='ctx'> 			reservedpages++;</div><div class='del'>-	freepages =  max_mapnr - reservedpages;</div><div class='add'>+	freepages =  max_mapnr - ARCH_PFN_OFFSET - reservedpages;</div><div class='ctx'> </div><div class='ctx'> 	/* do not count in kernel image between _rambase and _ramstart */</div><div class='ctx'> 	reservedpages -= (_ramstart - _rambase) &gt;&gt; PAGE_SHIFT;</div><div class='hunk'>@@ -127,7 +125,7 @@ void __init mem_init(void)</div><div class='ctx'> 	printk(KERN_INFO</div><div class='ctx'> 	     "Memory available: %luk/%luk RAM, "</div><div class='ctx'> 		"(%uk init code, %uk kernel code, %uk data, %uk dma, %uk reserved)\n",</div><div class='del'>-		(unsigned long) freepages &lt;&lt; (PAGE_SHIFT-10), _ramend &gt;&gt; 10,</div><div class='add'>+		(unsigned long) freepages &lt;&lt; (PAGE_SHIFT-10), (_ramend - CONFIG_PHY_RAM_BASE_ADDRESS) &gt;&gt; 10,</div><div class='ctx'> 		initk, codek, datak, DMA_UNCACHED_REGION &gt;&gt; 10, (reservedpages &lt;&lt; (PAGE_SHIFT-10)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/blackfin/mm/sram-alloc.c b/arch/blackfin/mm/sram-alloc.c<br/>index 29d98faa1efd..342e378da1ec 100644<br/>--- a/<a href='/drm-misc/tree/arch/blackfin/mm/sram-alloc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/blackfin/mm/sram-alloc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/blackfin/mm/sram-alloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/blackfin/mm/sram-alloc.c</a></div><div class='hunk'>@@ -186,9 +186,45 @@ static void __init l1_inst_sram_init(void)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef __ADSPBF60x__</div><div class='add'>+static irqreturn_t l2_ecc_err(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	printk(KERN_ERR "L2 ecc error happend\n");</div><div class='add'>+	status = bfin_read32(L2CTL0_STAT);</div><div class='add'>+	if (status &amp; 0x1)</div><div class='add'>+		printk(KERN_ERR "Core channel error type:0x%x, addr:0x%x\n",</div><div class='add'>+			bfin_read32(L2CTL0_ET0), bfin_read32(L2CTL0_EADDR0));</div><div class='add'>+	if (status &amp; 0x2)</div><div class='add'>+		printk(KERN_ERR "System channel error type:0x%x, addr:0x%x\n",</div><div class='add'>+			bfin_read32(L2CTL0_ET1), bfin_read32(L2CTL0_EADDR1));</div><div class='add'>+</div><div class='add'>+	status = status &gt;&gt; 8;</div><div class='add'>+	if (status)</div><div class='add'>+		printk(KERN_ERR "L2 Bank%d error, addr:0x%x\n",</div><div class='add'>+			status, bfin_read32(L2CTL0_ERRADDR0 + status));</div><div class='add'>+</div><div class='add'>+	panic("L2 Ecc error");</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static void __init l2_sram_init(void)</div><div class='ctx'> {</div><div class='ctx'> #if L2_LENGTH != 0</div><div class='add'>+</div><div class='add'>+#ifdef __ADSPBF60x__</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = request_irq(IRQ_L2CTL0_ECC_ERR, l2_ecc_err, 0, "l2-ecc-err",</div><div class='add'>+			NULL);</div><div class='add'>+	if (unlikely(ret &lt; 0)) {</div><div class='add'>+		printk(KERN_INFO "Fail to request l2 ecc error interrupt");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	free_l2_sram_head.next =</div><div class='ctx'> 		kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);</div><div class='ctx'> 	if (!free_l2_sram_head.next) {</div><div class='head'>diff --git a/arch/c6x/Kconfig b/arch/c6x/Kconfig<br/>index 1c3ccd416d50..052f81a76239 100644<br/>--- a/<a href='/drm-misc/tree/arch/c6x/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/c6x/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/c6x/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/Kconfig</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> # see Documentation/kbuild/kconfig-language.txt.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-config TMS320C6X</div><div class='add'>+config C6X</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	select CLKDEV_LOOKUP</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='hunk'>@@ -15,40 +15,23 @@ config TMS320C6X</div><div class='ctx'> 	select IRQ_DOMAIN</div><div class='ctx'> 	select OF</div><div class='ctx'> 	select OF_EARLY_FLATTREE</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='ctx'> </div><div class='ctx'> config MMU</div><div class='ctx'> 	def_bool n</div><div class='ctx'> </div><div class='del'>-config ZONE_DMA</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config FPU</div><div class='ctx'> 	def_bool n</div><div class='ctx'> </div><div class='del'>-config HIGHMEM</div><div class='del'>-	def_bool n</div><div class='del'>-</div><div class='del'>-config NUMA</div><div class='del'>-	def_bool n</div><div class='del'>-</div><div class='ctx'> config RWSEM_GENERIC_SPINLOCK</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config RWSEM_XCHGADD_ALGORITHM</div><div class='del'>-	def_bool n</div><div class='del'>-</div><div class='ctx'> config GENERIC_CALIBRATE_DELAY</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='ctx'> config GENERIC_HWEIGHT</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='del'>-config GENERIC_CLOCKEVENTS_BROADCAST</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> config GENERIC_BUG</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='hunk'>@@ -137,7 +120,6 @@ source "mm/Kconfig"</div><div class='ctx'> source "kernel/Kconfig.preempt"</div><div class='ctx'> </div><div class='ctx'> source "kernel/Kconfig.hz"</div><div class='del'>-source "kernel/time/Kconfig"</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='head'>diff --git a/arch/c6x/include/asm/elf.h b/arch/c6x/include/asm/elf.h<br/>index d57865ba2c44..f4552db20b4a 100644<br/>--- a/<a href='/drm-misc/tree/arch/c6x/include/asm/elf.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/c6x/include/asm/elf.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/c6x/include/asm/elf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/include/asm/elf.h</a></div><div class='hunk'>@@ -30,7 +30,19 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];</div><div class='ctx'>  */</div><div class='ctx'> #define elf_check_arch(x) ((x)-&gt;e_machine == EM_TI_C6000)</div><div class='ctx'> </div><div class='del'>-#define elf_check_const_displacement(x) (1)</div><div class='add'>+#define elf_check_fdpic(x) (1)</div><div class='add'>+#define elf_check_const_displacement(x) (0)</div><div class='add'>+</div><div class='add'>+#define ELF_FDPIC_PLAT_INIT(_regs, _exec_map, _interp_map, _dynamic_addr) \</div><div class='add'>+do {								\</div><div class='add'>+	_regs-&gt;b4	= (_exec_map);				\</div><div class='add'>+	_regs-&gt;a6	= (_interp_map);			\</div><div class='add'>+	_regs-&gt;b6	= (_dynamic_addr);			\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define ELF_FDPIC_CORE_EFLAGS	0</div><div class='add'>+</div><div class='add'>+#define ELF_CORE_COPY_FPREGS(...) 0 /* No FPU regs to copy */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * These are used to set parameters in the core dumps.</div><div class='head'>diff --git a/arch/c6x/include/asm/kvm_para.h b/arch/c6x/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/c6x/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/c6x/include/asm/mmu.h b/arch/c6x/include/asm/mmu.h<br/>index 41592bf16067..4467e770a1ce 100644<br/>--- a/<a href='/drm-misc/tree/arch/c6x/include/asm/mmu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/c6x/include/asm/mmu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/c6x/include/asm/mmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/include/asm/mmu.h</a></div><div class='hunk'>@@ -13,6 +13,10 @@</div><div class='ctx'> </div><div class='ctx'> typedef struct {</div><div class='ctx'> 	unsigned long		end_brk;</div><div class='add'>+#ifdef CONFIG_BINFMT_ELF_FDPIC</div><div class='add'>+	unsigned long	exec_fdpic_loadmap;</div><div class='add'>+	unsigned long	interp_fdpic_loadmap;</div><div class='add'>+#endif</div><div class='ctx'> } mm_context_t;</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_C6X_MMU_H */</div><div class='head'>diff --git a/arch/c6x/include/asm/processor.h b/arch/c6x/include/asm/processor.h<br/>index 3ff7fab956ba..c50af7ef1c96 100644<br/>--- a/<a href='/drm-misc/tree/arch/c6x/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/c6x/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/c6x/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/include/asm/processor.h</a></div><div class='hunk'>@@ -92,9 +92,6 @@ static inline void release_thread(struct task_struct *dead_task)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);</div><div class='ctx'> </div><div class='ctx'> #define copy_segments(tsk, mm)		do { } while (0)</div><div class='head'>diff --git a/arch/c6x/include/asm/ptrace.h b/arch/c6x/include/asm/ptrace.h<br/>index 21e8d7931fe7..b04ff5964258 100644<br/>--- a/<a href='/drm-misc/tree/arch/c6x/include/asm/ptrace.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/c6x/include/asm/ptrace.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/c6x/include/asm/ptrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/include/asm/ptrace.h</a></div><div class='hunk'>@@ -97,6 +97,11 @@</div><div class='ctx'> #define PT_DP	   PT_B14  /* Data Segment Pointer (B14) */</div><div class='ctx'> #define PT_SP	   PT_B15  /* Stack Pointer (B15)  */</div><div class='ctx'> </div><div class='add'>+#define PTRACE_GETFDPIC		31	/* get the ELF fdpic loadmap address */</div><div class='add'>+</div><div class='add'>+#define PTRACE_GETFDPIC_EXEC	0	/* [addr] request the executable loadmap */</div><div class='add'>+#define PTRACE_GETFDPIC_INTERP	1	/* [addr] request the interpreter loadmap */</div><div class='add'>+</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #ifdef _BIG_ENDIAN</div><div class='head'>diff --git a/arch/c6x/include/asm/thread_info.h b/arch/c6x/include/asm/thread_info.h<br/>index fd99148cda9d..1710bcbb8d09 100644<br/>--- a/<a href='/drm-misc/tree/arch/c6x/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/c6x/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/c6x/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/include/asm/thread_info.h</a></div><div class='hunk'>@@ -20,11 +20,11 @@</div><div class='ctx'> #ifdef CONFIG_4KSTACKS</div><div class='ctx'> #define THREAD_SIZE		4096</div><div class='ctx'> #define THREAD_SHIFT		12</div><div class='del'>-#define THREAD_ORDER		0</div><div class='add'>+#define THREAD_SIZE_ORDER	0</div><div class='ctx'> #else</div><div class='ctx'> #define THREAD_SIZE		8192</div><div class='ctx'> #define THREAD_SHIFT		13</div><div class='del'>-#define THREAD_ORDER		1</div><div class='add'>+#define THREAD_SIZE_ORDER	1</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define THREAD_START_SP		(THREAD_SIZE - 8)</div><div class='hunk'>@@ -80,19 +80,6 @@ struct thread_info *current_thread_info(void)</div><div class='ctx'> 	return ti;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-</div><div class='del'>-/* thread information allocation */</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-#define THREAD_FLAGS (GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO)</div><div class='del'>-#else</div><div class='del'>-#define THREAD_FLAGS (GFP_KERNEL | __GFP_NOTRACK)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define alloc_thread_info_node(tsk, node)	\</div><div class='del'>-	((struct thread_info *)__get_free_pages(THREAD_FLAGS, THREAD_ORDER))</div><div class='del'>-</div><div class='del'>-#define free_thread_info(ti)	free_pages((unsigned long) (ti), THREAD_ORDER)</div><div class='ctx'> #define get_thread_info(ti)	get_task_struct((ti)-&gt;task)</div><div class='ctx'> #define put_thread_info(ti)	put_task_struct((ti)-&gt;task)</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='head'>diff --git a/arch/c6x/kernel/process.c b/arch/c6x/kernel/process.c<br/>index 7ca8c41b03cd..45e924a636a0 100644<br/>--- a/<a href='/drm-misc/tree/arch/c6x/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/c6x/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/c6x/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/kernel/process.c</a></div><div class='hunk'>@@ -26,22 +26,6 @@ void	(*c6x_halt)(void);</div><div class='ctx'> </div><div class='ctx'> extern asmlinkage void ret_from_fork(void);</div><div class='ctx'> </div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =	{</div><div class='del'>-	INIT_THREAD_INFO(init_task)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * power off function, if any</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/c6x/kernel/signal.c b/arch/c6x/kernel/signal.c<br/>index 3b5a05099989..3d8f3c22a94f 100644<br/>--- a/<a href='/drm-misc/tree/arch/c6x/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/c6x/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/c6x/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/c6x/kernel/signal.c</a></div><div class='hunk'>@@ -20,8 +20,6 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Do a signal return, undo the signal stack.</div><div class='ctx'>  */</div><div class='hunk'>@@ -69,6 +67,9 @@ asmlinkage int do_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	struct rt_sigframe __user *frame;</div><div class='ctx'> 	sigset_t set;</div><div class='ctx'> </div><div class='add'>+	/* Always make any pending restarted system calls return -EINTR */</div><div class='add'>+	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Since we stacked the signal on a dword boundary,</div><div class='ctx'> 	 * 'sp' should be dword aligned here.  If it's</div><div class='hunk'>@@ -84,7 +85,6 @@ asmlinkage int do_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext))</div><div class='hunk'>@@ -245,10 +245,9 @@ do_restart:</div><div class='ctx'> /*</div><div class='ctx'>  * handle the actual delivery of a signal to userspace</div><div class='ctx'>  */</div><div class='del'>-static int handle_signal(int sig,</div><div class='add'>+static void handle_signal(int sig,</div><div class='ctx'> 			 siginfo_t *info, struct k_sigaction *ka,</div><div class='del'>-			 sigset_t *oldset, struct pt_regs *regs,</div><div class='del'>-			 int syscall)</div><div class='add'>+			 struct pt_regs *regs, int syscall)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -275,11 +274,9 @@ static int handle_signal(int sig,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the stack frame */</div><div class='del'>-	ret = setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='del'>-	if (ret == 0)</div><div class='del'>-		block_sigmask(ka, sig);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	if (setup_rt_frame(sig, ka, info, sigmask_to_save(), regs) &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+	signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -289,7 +286,6 @@ static void do_signal(struct pt_regs *regs, int syscall)</div><div class='ctx'> {</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='ctx'> 	siginfo_t info;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> 	int signr;</div><div class='ctx'> </div><div class='ctx'> 	/* we want the common case to go fast, which is why we may in certain</div><div class='hunk'>@@ -297,25 +293,9 @@ static void do_signal(struct pt_regs *regs, int syscall)</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='del'>-		if (handle_signal(signr, &amp;info, &amp;ka, oldset,</div><div class='del'>-				  regs, syscall) == 0) {</div><div class='del'>-			/* a signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-</div><div class='del'>-			tracehook_signal_handler(signr, &amp;info, &amp;ka, regs, 0);</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		handle_signal(signr, &amp;info, &amp;ka, regs, syscall);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -340,10 +320,7 @@ static void do_signal(struct pt_regs *regs, int syscall)</div><div class='ctx'> </div><div class='ctx'> 	/* if there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -354,14 +331,11 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, u32 thread_info_flags,</div><div class='ctx'> 				 int syscall)</div><div class='ctx'> {</div><div class='ctx'> 	/* deal with pending signal delivery */</div><div class='del'>-	if (thread_info_flags &amp; ((1 &lt;&lt; TIF_SIGPENDING) |</div><div class='del'>-				 (1 &lt;&lt; TIF_RESTORE_SIGMASK)))</div><div class='add'>+	if (thread_info_flags &amp; (1 &lt;&lt; TIF_SIGPENDING))</div><div class='ctx'> 		do_signal(regs, syscall);</div><div class='ctx'> </div><div class='ctx'> 	if (thread_info_flags &amp; (1 &lt;&lt; TIF_NOTIFY_RESUME)) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig<br/>index b3abfb08aa5c..bb344650a14f 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/Kconfig</a></div><div class='hunk'>@@ -13,12 +13,6 @@ config RWSEM_GENERIC_SPINLOCK</div><div class='ctx'> config RWSEM_XCHGADD_ALGORITHM</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config GENERIC_CMOS_UPDATE</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='del'>-config ARCH_USES_GETTIMEOFFSET</div><div class='del'>-	def_bool n</div><div class='del'>-</div><div class='ctx'> config ARCH_HAS_ILOG2_U32</div><div class='ctx'> 	bool</div><div class='ctx'> 	default n</div><div class='hunk'>@@ -46,9 +40,12 @@ config CRIS</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='ctx'> 	select HAVE_IDE</div><div class='add'>+	select GENERIC_ATOMIC64</div><div class='ctx'> 	select HAVE_GENERIC_HARDIRQS</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='ctx'> 	select GENERIC_IOMAP</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD if ETRAX_ARCH_V32</div><div class='add'>+	select GENERIC_CMOS_UPDATE</div><div class='ctx'> </div><div class='ctx'> config HZ</div><div class='ctx'> 	int</div><div class='head'>diff --git a/arch/cris/arch-v10/drivers/ds1302.c b/arch/cris/arch-v10/drivers/ds1302.c<br/>deleted file mode 100644<br/>index 74f99c688c8d..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v10/drivers/ds1302.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/arch-v10/drivers/ds1302.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,515 +0,0 @@</div><div class='del'>-/*!***************************************************************************</div><div class='del'>-*!</div><div class='del'>-*! FILE NAME  : ds1302.c</div><div class='del'>-*!</div><div class='del'>-*! DESCRIPTION: Implements an interface for the DS1302 RTC through Etrax I/O</div><div class='del'>-*!</div><div class='del'>-*! Functions exported: ds1302_readreg, ds1302_writereg, ds1302_init</div><div class='del'>-*!</div><div class='del'>-*! ---------------------------------------------------------------------------</div><div class='del'>-*!</div><div class='del'>-*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN</div><div class='del'>-*!</div><div class='del'>-*!***************************************************************************/</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/miscdevice.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/bcd.h&gt;</div><div class='del'>-#include &lt;linux/capability.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;arch/svinto.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/rtc.h&gt;</div><div class='del'>-#include &lt;arch/io_interface_mux.h&gt;</div><div class='del'>-</div><div class='del'>-#include "i2c.h"</div><div class='del'>-</div><div class='del'>-#define RTC_MAJOR_NR 121 /* local major, change later */</div><div class='del'>-</div><div class='del'>-static DEFINE_MUTEX(ds1302_mutex);</div><div class='del'>-static const char ds1302_name[] = "ds1302";</div><div class='del'>-</div><div class='del'>-/* The DS1302 might be connected to different bits on different products. </div><div class='del'>- * It has three signals - SDA, SCL and RST. RST and SCL are always outputs,</div><div class='del'>- * but SDA can have a selected direction.</div><div class='del'>- * For now, only PORT_PB is hardcoded.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* The RST bit may be on either the Generic Port or Port PB. */</div><div class='del'>-#ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT</div><div class='del'>-#define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_G_DATA,  port_g_data_shadow,  CONFIG_ETRAX_DS1302_RSTBIT, x)</div><div class='del'>-#define TK_RST_DIR(x)</div><div class='del'>-#else</div><div class='del'>-#define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)</div><div class='del'>-#define TK_RST_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR,  port_pb_dir_shadow,  CONFIG_ETRAX_DS1302_RSTBIT, x)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define TK_SDA_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SDABIT, x)</div><div class='del'>-#define TK_SCL_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x)</div><div class='del'>-</div><div class='del'>-#define TK_SDA_IN()   ((*R_PORT_PB_READ &gt;&gt; CONFIG_ETRAX_DS1302_SDABIT) &amp; 1)</div><div class='del'>-/* 1 is out, 0 is in */</div><div class='del'>-#define TK_SDA_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR,  port_pb_dir_shadow,  CONFIG_ETRAX_DS1302_SDABIT, x)</div><div class='del'>-#define TK_SCL_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR,  port_pb_dir_shadow,  CONFIG_ETRAX_DS1302_SCLBIT, x)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The reason for tempudelay and not udelay is that loops_per_usec</div><div class='del'>- * (used in udelay) is not set when functions here are called from time.c </div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void tempudelay(int usecs) </div><div class='del'>-{</div><div class='del'>-	volatile int loops;</div><div class='del'>-</div><div class='del'>-	for(loops = usecs * 12; loops &gt; 0; loops--)</div><div class='del'>-		/* nothing */;	</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Send 8 bits. */</div><div class='del'>-static void</div><div class='del'>-out_byte(unsigned char x) </div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	TK_SDA_DIR(1);</div><div class='del'>-	for (i = 8; i--;) {</div><div class='del'>-		/* The chip latches incoming bits on the rising edge of SCL. */</div><div class='del'>-		TK_SCL_OUT(0);</div><div class='del'>-		TK_SDA_OUT(x &amp; 1);</div><div class='del'>-		tempudelay(1);</div><div class='del'>-		TK_SCL_OUT(1);</div><div class='del'>-		tempudelay(1);</div><div class='del'>-		x &gt;&gt;= 1;</div><div class='del'>-	}</div><div class='del'>-	TK_SDA_DIR(0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned char</div><div class='del'>-in_byte(void) </div><div class='del'>-{</div><div class='del'>-	unsigned char x = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Read byte. Bits come LSB first, on the falling edge of SCL.</div><div class='del'>-	 * Assume SDA is in input direction already.</div><div class='del'>-	 */</div><div class='del'>-	TK_SDA_DIR(0);</div><div class='del'>-</div><div class='del'>-	for (i = 8; i--;) {</div><div class='del'>-		TK_SCL_OUT(0);</div><div class='del'>-		tempudelay(1);</div><div class='del'>-		x &gt;&gt;= 1;</div><div class='del'>-		x |= (TK_SDA_IN() &lt;&lt; 7);</div><div class='del'>-		TK_SCL_OUT(1);</div><div class='del'>-		tempudelay(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return x;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Prepares for a transaction by de-activating RST (active-low). */</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-start(void) </div><div class='del'>-{</div><div class='del'>-	TK_SCL_OUT(0);</div><div class='del'>-	tempudelay(1);</div><div class='del'>-	TK_RST_OUT(0);</div><div class='del'>-	tempudelay(5);</div><div class='del'>-	TK_RST_OUT(1);	</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Ends a transaction by taking RST active again. */</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-stop(void) </div><div class='del'>-{</div><div class='del'>-	tempudelay(2);</div><div class='del'>-	TK_RST_OUT(0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Enable writing. */</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-ds1302_wenable(void) </div><div class='del'>-{</div><div class='del'>-	start(); 	</div><div class='del'>-	out_byte(0x8e); /* Write control register  */</div><div class='del'>-	out_byte(0x00); /* Disable write protect bit 7 = 0 */</div><div class='del'>-	stop();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Disable writing. */</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-ds1302_wdisable(void) </div><div class='del'>-{</div><div class='del'>-	start();</div><div class='del'>-	out_byte(0x8e); /* Write control register  */</div><div class='del'>-	out_byte(0x80); /* Disable write protect bit 7 = 0 */</div><div class='del'>-	stop();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Read a byte from the selected register in the DS1302. */</div><div class='del'>-</div><div class='del'>-unsigned char</div><div class='del'>-ds1302_readreg(int reg) </div><div class='del'>-{</div><div class='del'>-	unsigned char x;</div><div class='del'>-</div><div class='del'>-	start();</div><div class='del'>-	out_byte(0x81 | (reg &lt;&lt; 1)); /* read register */</div><div class='del'>-	x = in_byte();</div><div class='del'>-	stop();</div><div class='del'>-</div><div class='del'>-	return x;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Write a byte to the selected register. */</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-ds1302_writereg(int reg, unsigned char val) </div><div class='del'>-{</div><div class='del'>-#ifndef CONFIG_ETRAX_RTC_READONLY</div><div class='del'>-	int do_writereg = 1;</div><div class='del'>-#else</div><div class='del'>-	int do_writereg = 0;</div><div class='del'>-</div><div class='del'>-	if (reg == RTC_TRICKLECHARGER)</div><div class='del'>-		do_writereg = 1;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (do_writereg) {</div><div class='del'>-		ds1302_wenable();</div><div class='del'>-		start();</div><div class='del'>-		out_byte(0x80 | (reg &lt;&lt; 1)); /* write register */</div><div class='del'>-		out_byte(val);</div><div class='del'>-		stop();</div><div class='del'>-		ds1302_wdisable();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-get_rtc_time(struct rtc_time *rtc_tm) </div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-</div><div class='del'>-	rtc_tm-&gt;tm_sec = CMOS_READ(RTC_SECONDS);</div><div class='del'>-	rtc_tm-&gt;tm_min = CMOS_READ(RTC_MINUTES);</div><div class='del'>-	rtc_tm-&gt;tm_hour = CMOS_READ(RTC_HOURS);</div><div class='del'>-	rtc_tm-&gt;tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);</div><div class='del'>-	rtc_tm-&gt;tm_mon = CMOS_READ(RTC_MONTH);</div><div class='del'>-	rtc_tm-&gt;tm_year = CMOS_READ(RTC_YEAR);</div><div class='del'>-</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-	</div><div class='del'>-	rtc_tm-&gt;tm_sec = bcd2bin(rtc_tm-&gt;tm_sec);</div><div class='del'>-	rtc_tm-&gt;tm_min = bcd2bin(rtc_tm-&gt;tm_min);</div><div class='del'>-	rtc_tm-&gt;tm_hour = bcd2bin(rtc_tm-&gt;tm_hour);</div><div class='del'>-	rtc_tm-&gt;tm_mday = bcd2bin(rtc_tm-&gt;tm_mday);</div><div class='del'>-	rtc_tm-&gt;tm_mon = bcd2bin(rtc_tm-&gt;tm_mon);</div><div class='del'>-	rtc_tm-&gt;tm_year = bcd2bin(rtc_tm-&gt;tm_year);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Account for differences between how the RTC uses the values</div><div class='del'>-	 * and how they are defined in a struct rtc_time;</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if (rtc_tm-&gt;tm_year &lt;= 69)</div><div class='del'>-		rtc_tm-&gt;tm_year += 100;</div><div class='del'>-</div><div class='del'>-	rtc_tm-&gt;tm_mon--;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned char days_in_mo[] = </div><div class='del'>-    {0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};</div><div class='del'>-</div><div class='del'>-/* ioctl that supports RTC_RD_TIME and RTC_SET_TIME (read and set time/date). */</div><div class='del'>-</div><div class='del'>-static int rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	switch(cmd) {</div><div class='del'>-		case RTC_RD_TIME:	/* read the time/date from RTC	*/</div><div class='del'>-		{</div><div class='del'>-			struct rtc_time rtc_tm;</div><div class='del'>-						</div><div class='del'>-			memset(&amp;rtc_tm, 0, sizeof (struct rtc_time));</div><div class='del'>-			get_rtc_time(&amp;rtc_tm);						</div><div class='del'>-			if (copy_to_user((struct rtc_time*)arg, &amp;rtc_tm, sizeof(struct rtc_time)))</div><div class='del'>-				return -EFAULT;	</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		case RTC_SET_TIME:	/* set the RTC */</div><div class='del'>-		{</div><div class='del'>-			struct rtc_time rtc_tm;</div><div class='del'>-			unsigned char mon, day, hrs, min, sec, leap_yr;</div><div class='del'>-			unsigned int yrs;</div><div class='del'>-</div><div class='del'>-			if (!capable(CAP_SYS_TIME))</div><div class='del'>-				return -EPERM;</div><div class='del'>-</div><div class='del'>-			if (copy_from_user(&amp;rtc_tm, (struct rtc_time*)arg, sizeof(struct rtc_time)))</div><div class='del'>-				return -EFAULT;</div><div class='del'>-</div><div class='del'>-			yrs = rtc_tm.tm_year + 1900;</div><div class='del'>-			mon = rtc_tm.tm_mon + 1;   /* tm_mon starts at zero */</div><div class='del'>-			day = rtc_tm.tm_mday;</div><div class='del'>-			hrs = rtc_tm.tm_hour;</div><div class='del'>-			min = rtc_tm.tm_min;</div><div class='del'>-			sec = rtc_tm.tm_sec;</div><div class='del'>-			</div><div class='del'>-			</div><div class='del'>-			if ((yrs &lt; 1970) || (yrs &gt; 2069))</div><div class='del'>-				return -EINVAL;</div><div class='del'>-</div><div class='del'>-			leap_yr = ((!(yrs % 4) &amp;&amp; (yrs % 100)) || !(yrs % 400));</div><div class='del'>-</div><div class='del'>-			if ((mon &gt; 12) || (day == 0))</div><div class='del'>-				return -EINVAL;</div><div class='del'>-</div><div class='del'>-			if (day &gt; (days_in_mo[mon] + ((mon == 2) &amp;&amp; leap_yr)))</div><div class='del'>-				return -EINVAL;</div><div class='del'>-			</div><div class='del'>-			if ((hrs &gt;= 24) || (min &gt;= 60) || (sec &gt;= 60))</div><div class='del'>-				return -EINVAL;</div><div class='del'>-</div><div class='del'>-			if (yrs &gt;= 2000)</div><div class='del'>-				yrs -= 2000;	/* RTC (0, 1, ... 69) */</div><div class='del'>-			else</div><div class='del'>-				yrs -= 1900;	/* RTC (70, 71, ... 99) */</div><div class='del'>-</div><div class='del'>-			sec = bin2bcd(sec);</div><div class='del'>-			min = bin2bcd(min);</div><div class='del'>-			hrs = bin2bcd(hrs);</div><div class='del'>-			day = bin2bcd(day);</div><div class='del'>-			mon = bin2bcd(mon);</div><div class='del'>-			yrs = bin2bcd(yrs);</div><div class='del'>-</div><div class='del'>-			local_irq_save(flags);</div><div class='del'>-			CMOS_WRITE(yrs, RTC_YEAR);</div><div class='del'>-			CMOS_WRITE(mon, RTC_MONTH);</div><div class='del'>-			CMOS_WRITE(day, RTC_DAY_OF_MONTH);</div><div class='del'>-			CMOS_WRITE(hrs, RTC_HOURS);</div><div class='del'>-			CMOS_WRITE(min, RTC_MINUTES);</div><div class='del'>-			CMOS_WRITE(sec, RTC_SECONDS);</div><div class='del'>-			local_irq_restore(flags);</div><div class='del'>-</div><div class='del'>-			/* Notice that at this point, the RTC is updated but</div><div class='del'>-			 * the kernel is still running with the old time.</div><div class='del'>-			 * You need to set that separately with settimeofday</div><div class='del'>-			 * or adjtimex.</div><div class='del'>-			 */</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		case RTC_SET_CHARGE: /* set the RTC TRICKLE CHARGE register */</div><div class='del'>-		{</div><div class='del'>-			int tcs_val;</div><div class='del'>-</div><div class='del'>-			if (!capable(CAP_SYS_TIME))</div><div class='del'>-				return -EPERM;</div><div class='del'>-			</div><div class='del'>-			if(copy_from_user(&amp;tcs_val, (int*)arg, sizeof(int)))</div><div class='del'>-				return -EFAULT;</div><div class='del'>-</div><div class='del'>-			tcs_val = RTC_TCR_PATTERN | (tcs_val &amp; 0x0F);</div><div class='del'>-			ds1302_writereg(RTC_TRICKLECHARGER, tcs_val);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		case RTC_VL_READ:</div><div class='del'>-		{</div><div class='del'>-			/* TODO:</div><div class='del'>-			 * Implement voltage low detection support</div><div class='del'>-			 */</div><div class='del'>-			printk(KERN_WARNING "DS1302: RTC Voltage Low detection"</div><div class='del'>-			       " is not supported\n");</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		case RTC_VL_CLR:</div><div class='del'>-		{</div><div class='del'>-			/* TODO:</div><div class='del'>-			 * Nothing to do since Voltage Low detection is not supported</div><div class='del'>-			 */</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		default:</div><div class='del'>-			return -ENOIOCTLCMD;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static long rtc_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ds1302_mutex);</div><div class='del'>-	ret = rtc_ioctl(file, cmd, arg);</div><div class='del'>-	mutex_unlock(&amp;ds1302_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-print_rtc_status(void)</div><div class='del'>-{</div><div class='del'>-	struct rtc_time tm;</div><div class='del'>-</div><div class='del'>-	get_rtc_time(&amp;tm);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * There is no way to tell if the luser has the RTC set for local</div><div class='del'>-	 * time or for Universal Standard Time (GMT). Probably local though.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "rtc_time\t: %02d:%02d:%02d\n",</div><div class='del'>-	       tm.tm_hour, tm.tm_min, tm.tm_sec);</div><div class='del'>-	printk(KERN_INFO "rtc_date\t: %04d-%02d-%02d\n",</div><div class='del'>-	       tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* The various file operations we support. */</div><div class='del'>-</div><div class='del'>-static const struct file_operations rtc_fops = {</div><div class='del'>-	.owner		= THIS_MODULE,</div><div class='del'>-	.unlocked_ioctl = rtc_unlocked_ioctl,</div><div class='del'>-	.llseek		= noop_llseek,</div><div class='del'>-}; </div><div class='del'>-</div><div class='del'>-/* Probe for the chip by writing something to its RAM and try reading it back. */</div><div class='del'>-</div><div class='del'>-#define MAGIC_PATTERN 0x42</div><div class='del'>-</div><div class='del'>-static int __init</div><div class='del'>-ds1302_probe(void) </div><div class='del'>-{</div><div class='del'>-	int retval, res; </div><div class='del'>-</div><div class='del'>-	TK_RST_DIR(1);</div><div class='del'>-	TK_SCL_DIR(1);</div><div class='del'>-	TK_SDA_DIR(0);</div><div class='del'>-	</div><div class='del'>-	/* Try to talk to timekeeper. */</div><div class='del'>-</div><div class='del'>-	ds1302_wenable();  </div><div class='del'>-	start();</div><div class='del'>-	out_byte(0xc0); /* write RAM byte 0 */	</div><div class='del'>-	out_byte(MAGIC_PATTERN); /* write something magic */</div><div class='del'>-	start();</div><div class='del'>-	out_byte(0xc1); /* read RAM byte 0 */</div><div class='del'>-</div><div class='del'>-	if((res = in_byte()) == MAGIC_PATTERN) {</div><div class='del'>-		stop();</div><div class='del'>-		ds1302_wdisable();</div><div class='del'>-		printk(KERN_INFO "%s: RTC found.\n", ds1302_name);</div><div class='del'>-		printk(KERN_INFO "%s: SDA, SCL, RST on PB%i, PB%i, %s%i\n",</div><div class='del'>-		       ds1302_name,</div><div class='del'>-		       CONFIG_ETRAX_DS1302_SDABIT,</div><div class='del'>-		       CONFIG_ETRAX_DS1302_SCLBIT,</div><div class='del'>-#ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT</div><div class='del'>-		       "GENIO",</div><div class='del'>-#else</div><div class='del'>-		       "PB",</div><div class='del'>-#endif</div><div class='del'>-		       CONFIG_ETRAX_DS1302_RSTBIT);</div><div class='del'>-		       print_rtc_status();</div><div class='del'>-		retval = 1;</div><div class='del'>-	} else {</div><div class='del'>-		stop();</div><div class='del'>-		retval = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Just probe for the RTC and register the device to handle the ioctl needed. */</div><div class='del'>-</div><div class='del'>-int __init</div><div class='del'>-ds1302_init(void) </div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_ETRAX_I2C</div><div class='del'>-	i2c_init();</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (!ds1302_probe()) {</div><div class='del'>-#ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT</div><div class='del'>-#if CONFIG_ETRAX_DS1302_RSTBIT == 27</div><div class='del'>-		/*</div><div class='del'>-		 * The only way to set g27 to output is to enable ATA.</div><div class='del'>-		 *</div><div class='del'>-		 * Make sure that R_GEN_CONFIG is setup correct.</div><div class='del'>-		 */</div><div class='del'>-		/* Allocating the ATA interface will grab almost all</div><div class='del'>-		 * pins in I/O groups a, b, c and d.  A consequence of</div><div class='del'>-		 * allocating the ATA interface is that the fixed</div><div class='del'>-		 * interfaces shared RAM, parallel port 0, parallel</div><div class='del'>-		 * port 1, parallel port W, SCSI-8 port 0, SCSI-8 port</div><div class='del'>-		 * 1, SCSI-W, serial port 2, serial port 3,</div><div class='del'>-		 * synchronous serial port 3 and USB port 2 and almost</div><div class='del'>-		 * all GPIO pins on port g cannot be used.</div><div class='del'>-		 */</div><div class='del'>-		if (cris_request_io_interface(if_ata, "ds1302/ATA")) {</div><div class='del'>-			printk(KERN_WARNING "ds1302: Failed to get IO interface\n");</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-#elif CONFIG_ETRAX_DS1302_RSTBIT == 0</div><div class='del'>-		if (cris_io_interface_allocate_pins(if_gpio_grp_a,</div><div class='del'>-						    'g',</div><div class='del'>-						    CONFIG_ETRAX_DS1302_RSTBIT,</div><div class='del'>-						    CONFIG_ETRAX_DS1302_RSTBIT)) {</div><div class='del'>-			printk(KERN_WARNING "ds1302: Failed to get IO interface\n");</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Set the direction of this bit to out. */</div><div class='del'>-		genconfig_shadow = ((genconfig_shadow &amp;</div><div class='del'>- 				     ~IO_MASK(R_GEN_CONFIG, g0dir)) |</div><div class='del'>- 				   (IO_STATE(R_GEN_CONFIG, g0dir, out)));</div><div class='del'>-		*R_GEN_CONFIG = genconfig_shadow;</div><div class='del'>-#endif</div><div class='del'>-		if (!ds1302_probe()) {</div><div class='del'>-			printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name);</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-#else</div><div class='del'>-		printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name);</div><div class='del'>-		return -1;</div><div class='del'>-#endif</div><div class='del'>-  	}</div><div class='del'>-	/* Initialise trickle charger */</div><div class='del'>-	ds1302_writereg(RTC_TRICKLECHARGER,</div><div class='del'>-			RTC_TCR_PATTERN |(CONFIG_ETRAX_DS1302_TRICKLE_CHARGE &amp; 0x0F));</div><div class='del'>-        /* Start clock by resetting CLOCK_HALT */</div><div class='del'>-	ds1302_writereg(RTC_SECONDS, (ds1302_readreg(RTC_SECONDS) &amp; 0x7F));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init ds1302_register(void)</div><div class='del'>-{</div><div class='del'>-	ds1302_init();</div><div class='del'>-	if (register_chrdev(RTC_MAJOR_NR, ds1302_name, &amp;rtc_fops)) {</div><div class='del'>-		printk(KERN_INFO "%s: unable to get major %d for rtc\n", </div><div class='del'>-		       ds1302_name, RTC_MAJOR_NR);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-        return 0;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(ds1302_register);</div><div class='head'>diff --git a/arch/cris/arch-v10/drivers/pcf8563.c b/arch/cris/arch-v10/drivers/pcf8563.c<br/>deleted file mode 100644<br/>index 9da056860c92..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v10/drivers/pcf8563.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/arch-v10/drivers/pcf8563.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,380 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * PCF8563 RTC</div><div class='del'>- *</div><div class='del'>- * From Phillips' datasheet:</div><div class='del'>- *</div><div class='del'>- * The PCF8563 is a CMOS real-time clock/calendar optimized for low power</div><div class='del'>- * consumption. A programmable clock output, interrupt output and voltage</div><div class='del'>- * low detector are also provided. All address and data are transferred</div><div class='del'>- * serially via two-line bidirectional I2C-bus. Maximum bus speed is</div><div class='del'>- * 400 kbits/s. The built-in word address register is incremented</div><div class='del'>- * automatically after each written or read byte.</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2002-2007, Axis Communications AB</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Author: Tobias Anderberg &lt;tobiasa@axis.com&gt;.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/ioctl.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/bcd.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/rtc.h&gt;</div><div class='del'>-</div><div class='del'>-#include "i2c.h"</div><div class='del'>-</div><div class='del'>-#define PCF8563_MAJOR 121	/* Local major number. */</div><div class='del'>-#define DEVICE_NAME "rtc"	/* Name which is registered in /proc/devices. */</div><div class='del'>-#define PCF8563_NAME "PCF8563"</div><div class='del'>-#define DRIVER_VERSION "$Revision: 1.24 $"</div><div class='del'>-</div><div class='del'>-/* I2C bus slave registers. */</div><div class='del'>-#define RTC_I2C_READ		0xa3</div><div class='del'>-#define RTC_I2C_WRITE		0xa2</div><div class='del'>-</div><div class='del'>-/* Two simple wrapper macros, saves a few keystrokes. */</div><div class='del'>-#define rtc_read(x) i2c_readreg(RTC_I2C_READ, x)</div><div class='del'>-#define rtc_write(x,y) i2c_writereg(RTC_I2C_WRITE, x, y)</div><div class='del'>-</div><div class='del'>-static DEFINE_MUTEX(pcf8563_mutex);</div><div class='del'>-static DEFINE_MUTEX(rtc_lock); /* Protect state etc */</div><div class='del'>-</div><div class='del'>-static const unsigned char days_in_month[] =</div><div class='del'>-	{ 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };</div><div class='del'>-</div><div class='del'>-static long pcf8563_unlocked_ioctl(struct file *, unsigned int, unsigned long);</div><div class='del'>-</div><div class='del'>-/* Cache VL bit value read at driver init since writing the RTC_SECOND</div><div class='del'>- * register clears the VL status.</div><div class='del'>- */</div><div class='del'>-static int voltage_low;</div><div class='del'>-</div><div class='del'>-static const struct file_operations pcf8563_fops = {</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-	.unlocked_ioctl = pcf8563_unlocked_ioctl,</div><div class='del'>-	.llseek		= noop_llseek,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-unsigned char</div><div class='del'>-pcf8563_readreg(int reg)</div><div class='del'>-{</div><div class='del'>-	unsigned char res = rtc_read(reg);</div><div class='del'>-</div><div class='del'>-	/* The PCF8563 does not return 0 for unimplemented bits. */</div><div class='del'>-	switch (reg) {</div><div class='del'>-	case RTC_SECONDS:</div><div class='del'>-	case RTC_MINUTES:</div><div class='del'>-		res &amp;= 0x7F;</div><div class='del'>-		break;</div><div class='del'>-	case RTC_HOURS:</div><div class='del'>-	case RTC_DAY_OF_MONTH:</div><div class='del'>-		res &amp;= 0x3F;</div><div class='del'>-		break;</div><div class='del'>-	case RTC_WEEKDAY:</div><div class='del'>-		res &amp;= 0x07;</div><div class='del'>-		break;</div><div class='del'>-	case RTC_MONTH:</div><div class='del'>-		res &amp;= 0x1F;</div><div class='del'>-		break;</div><div class='del'>-	case RTC_CONTROL1:</div><div class='del'>-		res &amp;= 0xA8;</div><div class='del'>-		break;</div><div class='del'>-	case RTC_CONTROL2:</div><div class='del'>-		res &amp;= 0x1F;</div><div class='del'>-		break;</div><div class='del'>-	case RTC_CLOCKOUT_FREQ:</div><div class='del'>-	case RTC_TIMER_CONTROL:</div><div class='del'>-		res &amp;= 0x83;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-pcf8563_writereg(int reg, unsigned char val)</div><div class='del'>-{</div><div class='del'>-	rtc_write(reg, val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-get_rtc_time(struct rtc_time *tm)</div><div class='del'>-{</div><div class='del'>-	tm-&gt;tm_sec  = rtc_read(RTC_SECONDS);</div><div class='del'>-	tm-&gt;tm_min  = rtc_read(RTC_MINUTES);</div><div class='del'>-	tm-&gt;tm_hour = rtc_read(RTC_HOURS);</div><div class='del'>-	tm-&gt;tm_mday = rtc_read(RTC_DAY_OF_MONTH);</div><div class='del'>-	tm-&gt;tm_wday = rtc_read(RTC_WEEKDAY);</div><div class='del'>-	tm-&gt;tm_mon  = rtc_read(RTC_MONTH);</div><div class='del'>-	tm-&gt;tm_year = rtc_read(RTC_YEAR);</div><div class='del'>-</div><div class='del'>-	if (tm-&gt;tm_sec &amp; 0x80) {</div><div class='del'>-		printk(KERN_ERR "%s: RTC Voltage Low - reliable date/time "</div><div class='del'>-		       "information is no longer guaranteed!\n", PCF8563_NAME);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tm-&gt;tm_year  = bcd2bin(tm-&gt;tm_year) +</div><div class='del'>-		       ((tm-&gt;tm_mon &amp; 0x80) ? 100 : 0);</div><div class='del'>-	tm-&gt;tm_sec  &amp;= 0x7F;</div><div class='del'>-	tm-&gt;tm_min  &amp;= 0x7F;</div><div class='del'>-	tm-&gt;tm_hour &amp;= 0x3F;</div><div class='del'>-	tm-&gt;tm_mday &amp;= 0x3F;</div><div class='del'>-	tm-&gt;tm_wday &amp;= 0x07; /* Not coded in BCD. */</div><div class='del'>-	tm-&gt;tm_mon  &amp;= 0x1F;</div><div class='del'>-</div><div class='del'>-	tm-&gt;tm_sec = bcd2bin(tm-&gt;tm_sec);</div><div class='del'>-	tm-&gt;tm_min = bcd2bin(tm-&gt;tm_min);</div><div class='del'>-	tm-&gt;tm_hour = bcd2bin(tm-&gt;tm_hour);</div><div class='del'>-	tm-&gt;tm_mday = bcd2bin(tm-&gt;tm_mday);</div><div class='del'>-	tm-&gt;tm_mon = bcd2bin(tm-&gt;tm_mon);</div><div class='del'>-	tm-&gt;tm_mon--; /* Month is 1..12 in RTC but 0..11 in linux */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init</div><div class='del'>-pcf8563_init(void)</div><div class='del'>-{</div><div class='del'>-	static int res;</div><div class='del'>-	static int first = 1;</div><div class='del'>-</div><div class='del'>-	if (!first)</div><div class='del'>-		return res;</div><div class='del'>-	first = 0;</div><div class='del'>-</div><div class='del'>-	/* Initiate the i2c protocol. */</div><div class='del'>-	res = i2c_init();</div><div class='del'>-	if (res &lt; 0) {</div><div class='del'>-		printk(KERN_CRIT "pcf8563_init: Failed to init i2c.\n");</div><div class='del'>-		return res;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * First of all we need to reset the chip. This is done by</div><div class='del'>-	 * clearing control1, control2 and clk freq and resetting</div><div class='del'>-	 * all alarms.</div><div class='del'>-	 */</div><div class='del'>-	if (rtc_write(RTC_CONTROL1, 0x00) &lt; 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	if (rtc_write(RTC_CONTROL2, 0x00) &lt; 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	if (rtc_write(RTC_CLOCKOUT_FREQ, 0x00) &lt; 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	if (rtc_write(RTC_TIMER_CONTROL, 0x03) &lt; 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	/* Reset the alarms. */</div><div class='del'>-	if (rtc_write(RTC_MINUTE_ALARM, 0x80) &lt; 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	if (rtc_write(RTC_HOUR_ALARM, 0x80) &lt; 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	if (rtc_write(RTC_DAY_ALARM, 0x80) &lt; 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	if (rtc_write(RTC_WEEKDAY_ALARM, 0x80) &lt; 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	/* Check for low voltage, and warn about it. */</div><div class='del'>-	if (rtc_read(RTC_SECONDS) &amp; 0x80) {</div><div class='del'>-		voltage_low = 1;</div><div class='del'>-		printk(KERN_WARNING "%s: RTC Voltage Low - reliable "</div><div class='del'>-		       "date/time information is no longer guaranteed!\n",</div><div class='del'>-		       PCF8563_NAME);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return res;</div><div class='del'>-</div><div class='del'>-err:</div><div class='del'>-	printk(KERN_INFO "%s: Error initializing chip.\n", PCF8563_NAME);</div><div class='del'>-	res = -1;</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __exit</div><div class='del'>-pcf8563_exit(void)</div><div class='del'>-{</div><div class='del'>-	unregister_chrdev(PCF8563_MAJOR, DEVICE_NAME);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ioctl calls for this driver. Why return -ENOTTY upon error? Because</div><div class='del'>- * POSIX says so!</div><div class='del'>- */</div><div class='del'>-static int pcf8563_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	/* Some sanity checks. */</div><div class='del'>-	if (_IOC_TYPE(cmd) != RTC_MAGIC)</div><div class='del'>-		return -ENOTTY;</div><div class='del'>-</div><div class='del'>-	if (_IOC_NR(cmd) &gt; RTC_MAX_IOCTL)</div><div class='del'>-		return -ENOTTY;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case RTC_RD_TIME:</div><div class='del'>-	{</div><div class='del'>-		struct rtc_time tm;</div><div class='del'>-</div><div class='del'>-		mutex_lock(&amp;rtc_lock);</div><div class='del'>-		memset(&amp;tm, 0, sizeof tm);</div><div class='del'>-		get_rtc_time(&amp;tm);</div><div class='del'>-</div><div class='del'>-		if (copy_to_user((struct rtc_time *) arg, &amp;tm,</div><div class='del'>-				 sizeof tm)) {</div><div class='del'>-			mutex_unlock(&amp;rtc_lock);</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		mutex_unlock(&amp;rtc_lock);</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	case RTC_SET_TIME:</div><div class='del'>-	{</div><div class='del'>-		int leap;</div><div class='del'>-		int year;</div><div class='del'>-		int century;</div><div class='del'>-		struct rtc_time tm;</div><div class='del'>-</div><div class='del'>-		memset(&amp;tm, 0, sizeof tm);</div><div class='del'>-		if (!capable(CAP_SYS_TIME))</div><div class='del'>-			return -EPERM;</div><div class='del'>-</div><div class='del'>-		if (copy_from_user(&amp;tm, (struct rtc_time *) arg, sizeof tm))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-</div><div class='del'>-		/* Convert from struct tm to struct rtc_time. */</div><div class='del'>-		tm.tm_year += 1900;</div><div class='del'>-		tm.tm_mon += 1;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Check if tm.tm_year is a leap year. A year is a leap</div><div class='del'>-		 * year if it is divisible by 4 but not 100, except</div><div class='del'>-		 * that years divisible by 400 _are_ leap years.</div><div class='del'>-		 */</div><div class='del'>-		year = tm.tm_year;</div><div class='del'>-		leap = (tm.tm_mon == 2) &amp;&amp;</div><div class='del'>-			((year % 4 == 0 &amp;&amp; year % 100 != 0) || year % 400 == 0);</div><div class='del'>-</div><div class='del'>-		/* Perform some sanity checks. */</div><div class='del'>-		if ((tm.tm_year &lt; 1970) ||</div><div class='del'>-		    (tm.tm_mon &gt; 12) ||</div><div class='del'>-		    (tm.tm_mday == 0) ||</div><div class='del'>-		    (tm.tm_mday &gt; days_in_month[tm.tm_mon] + leap) ||</div><div class='del'>-		    (tm.tm_wday &gt;= 7) ||</div><div class='del'>-		    (tm.tm_hour &gt;= 24) ||</div><div class='del'>-		    (tm.tm_min &gt;= 60) ||</div><div class='del'>-		    (tm.tm_sec &gt;= 60))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		century = (tm.tm_year &gt;= 2000) ? 0x80 : 0;</div><div class='del'>-		tm.tm_year = tm.tm_year % 100;</div><div class='del'>-</div><div class='del'>-		tm.tm_year = bin2bcd(tm.tm_year);</div><div class='del'>-		tm.tm_mon = bin2bcd(tm.tm_mon);</div><div class='del'>-		tm.tm_mday = bin2bcd(tm.tm_mday);</div><div class='del'>-		tm.tm_hour = bin2bcd(tm.tm_hour);</div><div class='del'>-		tm.tm_min = bin2bcd(tm.tm_min);</div><div class='del'>-		tm.tm_sec = bin2bcd(tm.tm_sec);</div><div class='del'>-		tm.tm_mon |= century;</div><div class='del'>-</div><div class='del'>-		mutex_lock(&amp;rtc_lock);</div><div class='del'>-</div><div class='del'>-		rtc_write(RTC_YEAR, tm.tm_year);</div><div class='del'>-		rtc_write(RTC_MONTH, tm.tm_mon);</div><div class='del'>-		rtc_write(RTC_WEEKDAY, tm.tm_wday); /* Not coded in BCD. */</div><div class='del'>-		rtc_write(RTC_DAY_OF_MONTH, tm.tm_mday);</div><div class='del'>-		rtc_write(RTC_HOURS, tm.tm_hour);</div><div class='del'>-		rtc_write(RTC_MINUTES, tm.tm_min);</div><div class='del'>-		rtc_write(RTC_SECONDS, tm.tm_sec);</div><div class='del'>-</div><div class='del'>-		mutex_unlock(&amp;rtc_lock);</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	case RTC_VL_READ:</div><div class='del'>-		if (voltage_low) {</div><div class='del'>-			printk(KERN_ERR "%s: RTC Voltage Low - "</div><div class='del'>-			       "reliable date/time information is no "</div><div class='del'>-			       "longer guaranteed!\n", PCF8563_NAME);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (copy_to_user((int *) arg, &amp;voltage_low, sizeof(int)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	case RTC_VL_CLR:</div><div class='del'>-	{</div><div class='del'>-		/* Clear the VL bit in the seconds register in case</div><div class='del'>-		 * the time has not been set already (which would</div><div class='del'>-		 * have cleared it). This does not really matter</div><div class='del'>-		 * because of the cached voltage_low value but do it</div><div class='del'>-		 * anyway for consistency. */</div><div class='del'>-</div><div class='del'>-		int ret = rtc_read(RTC_SECONDS);</div><div class='del'>-</div><div class='del'>-		rtc_write(RTC_SECONDS, (ret &amp; 0x7F));</div><div class='del'>-</div><div class='del'>-		/* Clear the cached value. */</div><div class='del'>-		voltage_low = 0;</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	default:</div><div class='del'>-		return -ENOTTY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static long pcf8563_unlocked_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;pcf8563_mutex);</div><div class='del'>-	ret = pcf8563_ioctl(filp, cmd, arg);</div><div class='del'>-	mutex_unlock(&amp;pcf8563_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init pcf8563_register(void)</div><div class='del'>-{</div><div class='del'>-	if (pcf8563_init() &lt; 0) {</div><div class='del'>-		printk(KERN_INFO "%s: Unable to initialize Real-Time Clock "</div><div class='del'>-		       "Driver, %s\n", PCF8563_NAME, DRIVER_VERSION);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (register_chrdev(PCF8563_MAJOR, DEVICE_NAME, &amp;pcf8563_fops) &lt; 0) {</div><div class='del'>-		printk(KERN_INFO "%s: Unable to get major number %d for RTC device.\n",</div><div class='del'>-		       PCF8563_NAME, PCF8563_MAJOR);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME,</div><div class='del'>-	       DRIVER_VERSION);</div><div class='del'>-</div><div class='del'>-	/* Check for low voltage, and warn about it. */</div><div class='del'>-	if (voltage_low) {</div><div class='del'>-		printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "</div><div class='del'>-		       "information is no longer guaranteed!\n", PCF8563_NAME);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(pcf8563_register);</div><div class='del'>-module_exit(pcf8563_exit);</div><div class='head'>diff --git a/arch/cris/arch-v10/kernel/fasttimer.c b/arch/cris/arch-v10/kernel/fasttimer.c<br/>index 8a8196ee8ce8..082f1890bacb 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v10/kernel/fasttimer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/arch-v10/kernel/fasttimer.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v10/kernel/fasttimer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v10/kernel/fasttimer.c</a></div><div class='hunk'>@@ -21,8 +21,6 @@</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/delay.h&gt;</div><div class='del'>-#include &lt;asm/rtc.h&gt;</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> #include &lt;arch/svinto.h&gt;</div><div class='ctx'> #include &lt;asm/fasttimer.h&gt;</div><div class='head'>diff --git a/arch/cris/arch-v10/kernel/kgdb.c b/arch/cris/arch-v10/kernel/kgdb.c<br/>index b579dd02e098..37e6d2c50b76 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v10/kernel/kgdb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/arch-v10/kernel/kgdb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v10/kernel/kgdb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v10/kernel/kgdb.c</a></div><div class='hunk'>@@ -264,7 +264,7 @@ static int write_register (int regno, char *val);</div><div class='ctx'> </div><div class='ctx'> /* Write a value to a specified register in the stack of a thread other</div><div class='ctx'>    than the current thread. */</div><div class='del'>-static write_stack_register (int thread_id, int regno, char *valptr);</div><div class='add'>+static int write_stack_register(int thread_id, int regno, char *valptr);</div><div class='ctx'> </div><div class='ctx'> /* Read a value from a specified register in the register image. Returns the</div><div class='ctx'>    status of the read operation. The register value is returned in valptr. */</div><div class='head'>diff --git a/arch/cris/arch-v10/kernel/signal.c b/arch/cris/arch-v10/kernel/signal.c<br/>index 289c584ba499..0bb477c13a4e 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v10/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/arch-v10/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v10/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v10/kernel/signal.c</a></div><div class='hunk'>@@ -31,8 +31,6 @@</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_SIG 0</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> /* a syscall in Linux/CRIS is a break 13 instruction which is 2 bytes */</div><div class='ctx'> /* manipulate regs so that upon return, it will be re-executed */</div><div class='ctx'> </div><div class='hunk'>@@ -48,19 +46,11 @@ void do_signal(int canrestart, struct pt_regs *regs);</div><div class='ctx'>  * dummy arguments to be able to reach the regs argument.  (Note that this</div><div class='ctx'>  * arrangement relies on old_sigset_t occupying one register.)</div><div class='ctx'>  */</div><div class='del'>-int sys_sigsuspend(old_sigset_t mask, long r11, long r12, long r13, long mof,</div><div class='del'>-	long srp, struct pt_regs *regs)</div><div class='add'>+int sys_sigsuspend(old_sigset_t mask)</div><div class='ctx'> {</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-	siginitset(&amp;current-&gt;blocked, mask);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	sigset_t blocked;</div><div class='add'>+	siginitset(&amp;blocked, mask);</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='hunk'>@@ -73,10 +63,10 @@ int sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='ctx'> 		old_sigset_t mask;</div><div class='ctx'> 		if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='ctx'> 		    __get_user(new_ka.sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer))</div><div class='add'>+		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='add'>+		     __get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='add'>+		     __get_user(mask, &amp;act-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags);</div><div class='del'>-		__get_user(mask, &amp;act-&gt;sa_mask);</div><div class='ctx'> 		siginitset(&amp;new_ka.sa.sa_mask, mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -85,10 +75,10 @@ int sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='ctx'> 	if (!ret &amp;&amp; oact) {</div><div class='ctx'> 		if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||</div><div class='ctx'> 		    __put_user(old_ka.sa.sa_handler, &amp;oact-&gt;sa_handler) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer))</div><div class='add'>+		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags);</div><div class='del'>-		__put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -184,11 +174,7 @@ asmlinkage int sys_sigreturn(long r10, long r11, long r12, long r13, long mof,</div><div class='ctx'> 				    sizeof(frame-&gt;extramask))))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;sc))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -223,11 +209,7 @@ asmlinkage int sys_rt_sigreturn(long r10, long r11, long r12, long r13,</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -429,10 +411,11 @@ give_sigsegv:</div><div class='ctx'>  * OK, we're invoking a handler</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static inline int handle_signal(int canrestart, unsigned long sig,</div><div class='add'>+static inline void handle_signal(int canrestart, unsigned long sig,</div><div class='ctx'> 	siginfo_t *info, struct k_sigaction *ka,</div><div class='del'>-	sigset_t *oldset, struct pt_regs *regs)</div><div class='add'>+	struct pt_regs *regs)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Are we from a system call? */</div><div class='hunk'>@@ -469,16 +452,8 @@ static inline int handle_signal(int canrestart, unsigned long sig,</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = setup_frame(sig, ka, oldset, regs);</div><div class='ctx'> </div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-		sigorsets(&amp;current-&gt;blocked, &amp;current-&gt;blocked,</div><div class='del'>-			&amp;ka-&gt;sa.sa_mask);</div><div class='del'>-		if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-			sigaddset(&amp;current-&gt;blocked, sig);</div><div class='del'>-		recalc_sigpending();</div><div class='del'>-		spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -498,7 +473,6 @@ void do_signal(int canrestart, struct pt_regs *regs)</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'>         struct k_sigaction ka;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We want the common case to go fast, which</div><div class='hunk'>@@ -509,23 +483,10 @@ void do_signal(int canrestart, struct pt_regs *regs)</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  */</div><div class='del'>-		if (handle_signal(canrestart, signr, &amp;info, &amp;ka,</div><div class='del'>-				oldset, regs)) {</div><div class='del'>-			/* a signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		}</div><div class='add'>+		handle_signal(canrestart, signr, &amp;info, &amp;ka, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -545,8 +506,5 @@ void do_signal(int canrestart, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	/* if there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/cris/arch-v10/kernel/time.c b/arch/cris/arch-v10/kernel/time.c<br/>index 20c85b5dc7d0..bcffcb6a9415 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v10/kernel/time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/arch-v10/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v10/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v10/kernel/time.c</a></div><div class='hunk'>@@ -19,16 +19,12 @@</div><div class='ctx'> #include &lt;asm/signal.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/delay.h&gt;</div><div class='del'>-#include &lt;asm/rtc.h&gt;</div><div class='ctx'> #include &lt;asm/irq_regs.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* define this if you need to use print_timestamp */</div><div class='ctx'> /* it will make jiffies at 96 hz instead of 100 hz though */</div><div class='ctx'> #undef USE_CASCADE_TIMERS</div><div class='ctx'> </div><div class='del'>-extern int set_rtc_mmss(unsigned long nowtime);</div><div class='del'>-extern int have_rtc;</div><div class='del'>-</div><div class='ctx'> unsigned long get_ns_in_jiffie(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char timer_count, t1;</div><div class='hunk'>@@ -203,11 +199,6 @@ time_init(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	loops_per_usec = 50;</div><div class='ctx'> </div><div class='del'>-	if(RTC_INIT() &lt; 0)</div><div class='del'>-		have_rtc = 0;</div><div class='del'>-	else</div><div class='del'>-		have_rtc = 1;</div><div class='del'>-</div><div class='ctx'> 	/* Setup the etrax timers</div><div class='ctx'> 	 * Base frequency is 25000 hz, divider 250 -&gt; 100 HZ</div><div class='ctx'> 	 * In normal mode, we use timer0, so timer1 is free. In cascade</div><div class='head'>diff --git a/arch/cris/arch-v10/lib/Makefile b/arch/cris/arch-v10/lib/Makefile<br/>index 36e9a9c5239b..725153edb764 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v10/lib/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/arch-v10/lib/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v10/lib/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v10/lib/Makefile</a></div><div class='hunk'>@@ -2,8 +2,5 @@</div><div class='ctx'> # Makefile for Etrax-specific library files..</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-EXTRA_AFLAGS := -traditional</div><div class='del'>-</div><div class='ctx'> lib-y  = checksum.o checksumcopy.o string.o usercopy.o memset.o csumcpfruser.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/cris/arch-v32/drivers/cryptocop.c b/arch/cris/arch-v32/drivers/cryptocop.c<br/>index 642c6fed43d7..f8476d9e856b 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v32/drivers/cryptocop.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/arch-v32/drivers/cryptocop.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v32/drivers/cryptocop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v32/drivers/cryptocop.c</a></div><div class='hunk'>@@ -1394,11 +1394,10 @@ static int create_md5_pad(int alloc_flag, unsigned long long hashed_length, char</div><div class='ctx'> </div><div class='ctx'> 	if (padlen &lt; MD5_MIN_PAD_LENGTH) padlen += MD5_BLOCK_LENGTH;</div><div class='ctx'> </div><div class='del'>-	p = kmalloc(padlen, alloc_flag);</div><div class='add'>+	p = kzalloc(padlen, alloc_flag);</div><div class='ctx'> 	if (!p) return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	*p = 0x80;</div><div class='del'>-	memset(p+1, 0, padlen - 1);</div><div class='ctx'> </div><div class='ctx'> 	DEBUG(printk("create_md5_pad: hashed_length=%lld bits == %lld bytes\n", bit_length, hashed_length));</div><div class='ctx'> </div><div class='hunk'>@@ -1426,11 +1425,10 @@ static int create_sha1_pad(int alloc_flag, unsigned long long hashed_length, cha</div><div class='ctx'> </div><div class='ctx'> 	if (padlen &lt; SHA1_MIN_PAD_LENGTH) padlen += SHA1_BLOCK_LENGTH;</div><div class='ctx'> </div><div class='del'>-	p = kmalloc(padlen, alloc_flag);</div><div class='add'>+	p = kzalloc(padlen, alloc_flag);</div><div class='ctx'> 	if (!p) return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	*p = 0x80;</div><div class='del'>-	memset(p+1, 0, padlen - 1);</div><div class='ctx'> </div><div class='ctx'> 	DEBUG(printk("create_sha1_pad: hashed_length=%lld bits == %lld bytes\n", bit_length, hashed_length));</div><div class='ctx'> </div><div class='head'>diff --git a/arch/cris/arch-v32/kernel/ptrace.c b/arch/cris/arch-v32/kernel/ptrace.c<br/>index f7ad9e8637df..f085229cf870 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v32/kernel/ptrace.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/arch-v32/kernel/ptrace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v32/kernel/ptrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v32/kernel/ptrace.c</a></div><div class='hunk'>@@ -114,8 +114,6 @@ void user_disable_single_step(struct task_struct *child)</div><div class='ctx'> void</div><div class='ctx'> ptrace_disable(struct task_struct *child)</div><div class='ctx'> {</div><div class='del'>-	unsigned long tmp;</div><div class='del'>-</div><div class='ctx'> 	/* Deconfigure SPC and S-bit. */</div><div class='ctx'> 	user_disable_single_step(child);</div><div class='ctx'> 	put_reg(child, PT_SPC, 0);</div><div class='head'>diff --git a/arch/cris/arch-v32/kernel/signal.c b/arch/cris/arch-v32/kernel/signal.c<br/>index ce4ab1a5552c..b60d1b65a426 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v32/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/arch-v32/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v32/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v32/kernel/signal.c</a></div><div class='hunk'>@@ -24,9 +24,6 @@</div><div class='ctx'> </div><div class='ctx'> extern unsigned long cris_signal_return_page;</div><div class='ctx'> </div><div class='del'>-/* Flag to check if a signal is blockable. */</div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * A syscall in CRIS is really a "break 13" instruction, which is 2</div><div class='ctx'>  * bytes. The registers is manipulated so upon return the instruction</div><div class='hunk'>@@ -59,19 +56,11 @@ void keep_debug_flags(unsigned long oldccs, unsigned long oldspc,</div><div class='ctx'>  * dummy arguments to be able to reach the regs argument.</div><div class='ctx'>  */</div><div class='ctx'> int</div><div class='del'>-sys_sigsuspend(old_sigset_t mask, long r11, long r12, long r13, long mof,</div><div class='del'>-	       long srp, struct pt_regs *regs)</div><div class='add'>+sys_sigsuspend(old_sigset_t mask)</div><div class='ctx'> {</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-	siginitset(&amp;current-&gt;blocked, mask);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	sigset_t blocked;</div><div class='add'>+	siginitset(&amp;blocked, mask);</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='hunk'>@@ -87,11 +76,11 @@ sys_sigaction(int signal, const struct old_sigaction *act,</div><div class='ctx'> </div><div class='ctx'> 		if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='ctx'> 		    __get_user(newk.sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='del'>-		    __get_user(newk.sa.sa_restorer, &amp;act-&gt;sa_restorer))</div><div class='add'>+		    __get_user(newk.sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='add'>+		    __get_user(newk.sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='add'>+		    __get_user(mask, &amp;act-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> </div><div class='del'>-		__get_user(newk.sa.sa_flags, &amp;act-&gt;sa_flags);</div><div class='del'>-		__get_user(mask, &amp;act-&gt;sa_mask);</div><div class='ctx'> 		siginitset(&amp;newk.sa.sa_mask, mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -100,11 +89,11 @@ sys_sigaction(int signal, const struct old_sigaction *act,</div><div class='ctx'> 	if (!retval &amp;&amp; oact) {</div><div class='ctx'> 		if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||</div><div class='ctx'> 		    __put_user(oldk.sa.sa_handler, &amp;oact-&gt;sa_handler) ||</div><div class='del'>-		    __put_user(oldk.sa.sa_restorer, &amp;oact-&gt;sa_restorer))</div><div class='add'>+		    __put_user(oldk.sa.sa_restorer, &amp;oact-&gt;sa_restorer) ||</div><div class='add'>+		    __put_user(oldk.sa.sa_flags, &amp;oact-&gt;sa_flags) ||</div><div class='add'>+		    __put_user(oldk.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> </div><div class='del'>-		__put_user(oldk.sa.sa_flags, &amp;oact-&gt;sa_flags);</div><div class='del'>-		__put_user(oldk.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return retval;</div><div class='hunk'>@@ -175,13 +164,7 @@ sys_sigreturn(long r10, long r11, long r12, long r13, long mof, long srp,</div><div class='ctx'> 						 sizeof(frame-&gt;extramask))))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;sc))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -221,13 +204,7 @@ sys_rt_sigreturn(long r10, long r11, long r12, long r13, long mof, long srp,</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -363,10 +340,7 @@ setup_frame(int sig, struct k_sigaction *ka,  sigset_t *set,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> give_sigsegv:</div><div class='del'>-	if (sig == SIGSEGV)</div><div class='del'>-		ka-&gt;sa.sa_handler = SIG_DFL;</div><div class='del'>-</div><div class='del'>-	force_sig(SIGSEGV, current);</div><div class='add'>+	force_sigsegv(sig, current);</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -450,19 +424,17 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> give_sigsegv:</div><div class='del'>-	if (sig == SIGSEGV)</div><div class='del'>-		ka-&gt;sa.sa_handler = SIG_DFL;</div><div class='del'>-</div><div class='del'>-	force_sig(SIGSEGV, current);</div><div class='add'>+	force_sigsegv(sig, current);</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Invoke a signal handler to, well, handle the signal. */</div><div class='del'>-static inline int</div><div class='add'>+static inline void</div><div class='ctx'> handle_signal(int canrestart, unsigned long sig,</div><div class='ctx'> 	      siginfo_t *info, struct k_sigaction *ka,</div><div class='del'>-              sigset_t *oldset, struct pt_regs * regs)</div><div class='add'>+              struct pt_regs * regs)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Check if this got called from a system call. */</div><div class='hunk'>@@ -512,20 +484,8 @@ handle_signal(int canrestart, unsigned long sig,</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = setup_frame(sig, ka, oldset, regs);</div><div class='ctx'> </div><div class='del'>-	if (ka-&gt;sa.sa_flags &amp; SA_ONESHOT)</div><div class='del'>-		ka-&gt;sa.sa_handler = SIG_DFL;</div><div class='del'>-</div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-		sigorsets(&amp;current-&gt;blocked, &amp;current-&gt;blocked,</div><div class='del'>-			&amp;ka-&gt;sa.sa_mask);</div><div class='del'>-		if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-			sigaddset(&amp;current-&gt;blocked, sig);</div><div class='del'>-		recalc_sigpending();</div><div class='del'>-		spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -545,7 +505,6 @@ do_signal(int canrestart, struct pt_regs *regs)</div><div class='ctx'> 	int signr;</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'>         struct k_sigaction ka;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The common case should go fast, which is why this point is</div><div class='hunk'>@@ -555,25 +514,11 @@ do_signal(int canrestart, struct pt_regs *regs)</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  */</div><div class='del'>-		if (handle_signal(canrestart, signr, &amp;info, &amp;ka,</div><div class='del'>-				oldset, regs)) {</div><div class='del'>-			/* a signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		handle_signal(canrestart, signr, &amp;info, &amp;ka, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -594,10 +539,7 @@ do_signal(int canrestart, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	/* if there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void</div><div class='head'>diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c<br/>index 0b99df72d2a4..ebe2cb30bd11 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v32/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/arch-v32/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v32/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v32/kernel/smp.c</a></div><div class='hunk'>@@ -108,17 +108,12 @@ void __init smp_cpus_done(unsigned int max_cpus)</div><div class='ctx'> </div><div class='ctx'> /* Bring one cpu online.*/</div><div class='ctx'> static int __init</div><div class='del'>-smp_boot_one_cpu(int cpuid)</div><div class='add'>+smp_boot_one_cpu(int cpuid, struct task_struct idle)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned timeout;</div><div class='del'>-	struct task_struct *idle;</div><div class='ctx'> 	cpumask_t cpu_mask;</div><div class='ctx'> </div><div class='ctx'> 	cpumask_clear(&amp;cpu_mask);</div><div class='del'>-	idle = fork_idle(cpuid);</div><div class='del'>-	if (IS_ERR(idle))</div><div class='del'>-		panic("SMP: fork failed for CPU:%d", cpuid);</div><div class='del'>-</div><div class='ctx'> 	task_thread_info(idle)-&gt;cpu = cpuid;</div><div class='ctx'> </div><div class='ctx'> 	/* Information to the CPU that is about to boot */</div><div class='hunk'>@@ -142,9 +137,6 @@ smp_boot_one_cpu(int cpuid)</div><div class='ctx'> 		barrier();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	put_task_struct(idle);</div><div class='del'>-	idle = NULL;</div><div class='del'>-</div><div class='ctx'> 	printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='hunk'>@@ -207,9 +199,9 @@ int setup_profiling_timer(unsigned int multiplier)</div><div class='ctx'>  */</div><div class='ctx'> unsigned long cache_decay_ticks = 1;</div><div class='ctx'> </div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='del'>-	smp_boot_one_cpu(cpu);</div><div class='add'>+	smp_boot_one_cpu(cpu, tidle);</div><div class='ctx'> 	return cpu_online(cpu) ? 0 : -ENOSYS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c<br/>index 6773fc83a670..8c4b45efd7b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/arch-v32/kernel/time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/arch-v32/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/arch-v32/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/arch-v32/kernel/time.c</a></div><div class='hunk'>@@ -18,7 +18,6 @@</div><div class='ctx'> #include &lt;asm/signal.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/delay.h&gt;</div><div class='del'>-#include &lt;asm/rtc.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/irq_regs.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -67,7 +66,6 @@ unsigned long timer_regs[NR_CPUS] =</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern int set_rtc_mmss(unsigned long nowtime);</div><div class='del'>-extern int have_rtc;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CPU_FREQ</div><div class='ctx'> static int</div><div class='hunk'>@@ -265,11 +263,6 @@ void __init time_init(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	loops_per_usec = 50;</div><div class='ctx'> </div><div class='del'>-	if(RTC_INIT() &lt; 0)</div><div class='del'>-		have_rtc = 0;</div><div class='del'>-	else</div><div class='del'>-		have_rtc = 1;</div><div class='del'>-</div><div class='ctx'> 	/* Start CPU local timer. */</div><div class='ctx'> 	cris_timer_init();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/cris/include/arch-v32/arch/cache.h b/arch/cris/include/arch-v32/arch/cache.h<br/>index 1de779f4f240..7caf25d58e6b 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/include/arch-v32/arch/cache.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/include/arch-v32/arch/cache.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/include/arch-v32/arch/cache.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/include/arch-v32/arch/cache.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #define L1_CACHE_BYTES 32</div><div class='ctx'> #define L1_CACHE_SHIFT 5</div><div class='ctx'> </div><div class='del'>-#define __read_mostly __attribute__((__section__(".data.read_mostly")))</div><div class='add'>+#define __read_mostly __attribute__((__section__(".data..read_mostly")))</div><div class='ctx'> </div><div class='ctx'> void flush_dma_list(dma_descr_data *descr);</div><div class='ctx'> void flush_dma_descr(dma_descr_data *descr, int flush_buf);</div><div class='head'>diff --git a/arch/cris/include/asm/Kbuild b/arch/cris/include/asm/Kbuild<br/>index 956eea246b97..04d02a51c5e9 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/include/asm/Kbuild?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/include/asm/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/include/asm/Kbuild</a></div><div class='hunk'>@@ -6,5 +6,4 @@ header-y += arch-v32/</div><div class='ctx'> header-y += ethernet.h</div><div class='ctx'> header-y += etraxgpio.h</div><div class='ctx'> header-y += rs485.h</div><div class='del'>-header-y += rtc.h</div><div class='ctx'> header-y += sync_serial.h</div><div class='head'>diff --git a/arch/cris/include/asm/posix_types.h b/arch/cris/include/asm/posix_types.h<br/>index 72b3cd6eda0b..ce4e51793151 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/include/asm/posix_types.h</a></div><div class='hunk'>@@ -15,9 +15,6 @@</div><div class='ctx'> typedef unsigned short	__kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned short	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned short  __kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> </div><div class='hunk'>@@ -33,4 +30,6 @@ typedef int		__kernel_ptrdiff_t;</div><div class='ctx'> typedef unsigned short	__kernel_old_dev_t;</div><div class='ctx'> #define __kernel_old_dev_t __kernel_old_dev_t</div><div class='ctx'> </div><div class='add'>+#include &lt;asm-generic/posix_types.h&gt;</div><div class='add'>+</div><div class='ctx'> #endif /* __ARCH_CRIS_POSIX_TYPES_H */</div><div class='head'>diff --git a/arch/cris/include/asm/processor.h b/arch/cris/include/asm/processor.h<br/>index 4210d72a6667..ef4e1bc3efc8 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/include/asm/processor.h</a></div><div class='hunk'>@@ -25,13 +25,12 @@ struct task_struct;</div><div class='ctx'>  */</div><div class='ctx'> #define TASK_UNMAPPED_BASE      (PAGE_ALIGN(TASK_SIZE / 3))</div><div class='ctx'> </div><div class='del'>-/* THREAD_SIZE is the size of the task_struct/kernel_stack combo.</div><div class='add'>+/* THREAD_SIZE is the size of the thread_info/kernel_stack combo.</div><div class='ctx'>  * normally, the stack is found by doing something like p + THREAD_SIZE</div><div class='ctx'>  * in CRIS, a page is 8192 bytes, which seems like a sane size</div><div class='ctx'>  */</div><div class='del'>-</div><div class='ctx'> #define THREAD_SIZE       PAGE_SIZE</div><div class='del'>-#define KERNEL_STACK_SIZE PAGE_SIZE</div><div class='add'>+#define THREAD_SIZE_ORDER (0)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * At user-&gt;kernel entry, the pt_regs struct is stacked on the top of the kernel-stack.</div><div class='hunk'>@@ -50,10 +49,6 @@ struct task_struct;</div><div class='ctx'> #define task_pt_regs(task) user_regs(task_thread_info(task))</div><div class='ctx'> #define current_regs() task_pt_regs(current)</div><div class='ctx'> </div><div class='del'>-static inline void prepare_to_copy(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);</div><div class='ctx'> </div><div class='ctx'> unsigned long get_wchan(struct task_struct *p);</div><div class='head'>diff --git a/arch/cris/include/asm/rtc.h b/arch/cris/include/asm/rtc.h<br/>deleted file mode 100644<br/>index 17d3019529e1..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/cris/include/asm/rtc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/include/asm/rtc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,107 +0,0 @@</div><div class='del'>-</div><div class='del'>-#ifndef __RTC_H__</div><div class='del'>-#define __RTC_H__</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ETRAX_DS1302</div><div class='del'>-   /* Dallas DS1302 clock/calendar register numbers. */</div><div class='del'>-#  define RTC_SECONDS      0</div><div class='del'>-#  define RTC_MINUTES      1</div><div class='del'>-#  define RTC_HOURS        2</div><div class='del'>-#  define RTC_DAY_OF_MONTH 3</div><div class='del'>-#  define RTC_MONTH        4</div><div class='del'>-#  define RTC_WEEKDAY      5</div><div class='del'>-#  define RTC_YEAR         6</div><div class='del'>-#  define RTC_CONTROL      7</div><div class='del'>-</div><div class='del'>-   /* Bits in CONTROL register. */</div><div class='del'>-#  define RTC_CONTROL_WRITEPROTECT	0x80</div><div class='del'>-#  define RTC_TRICKLECHARGER		8</div><div class='del'>-</div><div class='del'>-  /* Bits in TRICKLECHARGER register TCS TCS TCS TCS DS DS RS RS. */</div><div class='del'>-#  define RTC_TCR_PATTERN	0xA0	/* 1010xxxx */</div><div class='del'>-#  define RTC_TCR_1DIOD		0x04	/* xxxx01xx */</div><div class='del'>-#  define RTC_TCR_2DIOD		0x08	/* xxxx10xx */</div><div class='del'>-#  define RTC_TCR_DISABLED	0x00	/* xxxxxx00 Disabled */</div><div class='del'>-#  define RTC_TCR_2KOHM		0x01	/* xxxxxx01 2KOhm */</div><div class='del'>-#  define RTC_TCR_4KOHM		0x02	/* xxxxxx10 4kOhm */</div><div class='del'>-#  define RTC_TCR_8KOHM		0x03	/* xxxxxx11 8kOhm */</div><div class='del'>-</div><div class='del'>-#elif defined(CONFIG_ETRAX_PCF8563)</div><div class='del'>-   /* I2C bus slave registers. */</div><div class='del'>-#  define RTC_I2C_READ		0xa3</div><div class='del'>-#  define RTC_I2C_WRITE		0xa2</div><div class='del'>-</div><div class='del'>-   /* Phillips PCF8563 registers. */</div><div class='del'>-#  define RTC_CONTROL1		0x00		/* Control/Status register 1. */</div><div class='del'>-#  define RTC_CONTROL2		0x01		/* Control/Status register 2. */</div><div class='del'>-#  define RTC_CLOCKOUT_FREQ	0x0d		/* CLKOUT frequency. */</div><div class='del'>-#  define RTC_TIMER_CONTROL	0x0e		/* Timer control. */</div><div class='del'>-#  define RTC_TIMER_CNTDOWN	0x0f		/* Timer countdown. */</div><div class='del'>-</div><div class='del'>-   /* BCD encoded clock registers. */</div><div class='del'>-#  define RTC_SECONDS		0x02</div><div class='del'>-#  define RTC_MINUTES		0x03</div><div class='del'>-#  define RTC_HOURS		0x04</div><div class='del'>-#  define RTC_DAY_OF_MONTH	0x05</div><div class='del'>-#  define RTC_WEEKDAY		0x06	/* Not coded in BCD! */</div><div class='del'>-#  define RTC_MONTH		0x07</div><div class='del'>-#  define RTC_YEAR		0x08</div><div class='del'>-#  define RTC_MINUTE_ALARM	0x09</div><div class='del'>-#  define RTC_HOUR_ALARM	0x0a</div><div class='del'>-#  define RTC_DAY_ALARM		0x0b</div><div class='del'>-#  define RTC_WEEKDAY_ALARM 0x0c</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ETRAX_DS1302</div><div class='del'>-extern unsigned char ds1302_readreg(int reg);</div><div class='del'>-extern void ds1302_writereg(int reg, unsigned char val);</div><div class='del'>-extern int ds1302_init(void);</div><div class='del'>-#  define CMOS_READ(x) ds1302_readreg(x)</div><div class='del'>-#  define CMOS_WRITE(val,reg) ds1302_writereg(reg,val)</div><div class='del'>-#  define RTC_INIT() ds1302_init()</div><div class='del'>-#elif defined(CONFIG_ETRAX_PCF8563)</div><div class='del'>-extern unsigned char pcf8563_readreg(int reg);</div><div class='del'>-extern void pcf8563_writereg(int reg, unsigned char val);</div><div class='del'>-extern int pcf8563_init(void);</div><div class='del'>-#  define CMOS_READ(x) pcf8563_readreg(x)</div><div class='del'>-#  define CMOS_WRITE(val,reg) pcf8563_writereg(reg,val)</div><div class='del'>-#  define RTC_INIT() pcf8563_init()</div><div class='del'>-#else</div><div class='del'>-  /* No RTC configured so we shouldn't try to access any. */</div><div class='del'>-#  define CMOS_READ(x) 42</div><div class='del'>-#  define CMOS_WRITE(x,y)</div><div class='del'>-#  define RTC_INIT() (-1)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The struct used to pass data via the following ioctl. Similar to the</div><div class='del'>- * struct tm in &lt;time.h&gt;, but it needs to be here so that the kernel</div><div class='del'>- * source is self contained, allowing cross-compiles, etc. etc.</div><div class='del'>- */</div><div class='del'>-struct rtc_time {</div><div class='del'>-	int tm_sec;</div><div class='del'>-	int tm_min;</div><div class='del'>-	int tm_hour;</div><div class='del'>-	int tm_mday;</div><div class='del'>-	int tm_mon;</div><div class='del'>-	int tm_year;</div><div class='del'>-	int tm_wday;</div><div class='del'>-	int tm_yday;</div><div class='del'>-	int tm_isdst;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ioctl() calls that are permitted to the /dev/rtc interface. */</div><div class='del'>-#define RTC_MAGIC 'p'</div><div class='del'>-/* Read RTC time. */</div><div class='del'>-#define RTC_RD_TIME		_IOR(RTC_MAGIC, 0x09, struct rtc_time)</div><div class='del'>-/* Set RTC time. */</div><div class='del'>-#define RTC_SET_TIME		_IOW(RTC_MAGIC, 0x0a, struct rtc_time)</div><div class='del'>-#define RTC_SET_CHARGE		_IOW(RTC_MAGIC, 0x0b, int)</div><div class='del'>-/* Voltage low detector */</div><div class='del'>-#define RTC_VL_READ		_IOR(RTC_MAGIC, 0x13, int)</div><div class='del'>-/* Clear voltage low information */</div><div class='del'>-#define RTC_VL_CLR		_IO(RTC_MAGIC, 0x14)</div><div class='del'>-#define RTC_MAX_IOCTL 0x14</div><div class='del'>-</div><div class='del'>-#endif /* __RTC_H__ */</div><div class='head'>diff --git a/arch/cris/include/asm/thread_info.h b/arch/cris/include/asm/thread_info.h<br/>index 29b92884d793..5b1c448df5c0 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/include/asm/thread_info.h</a></div><div class='hunk'>@@ -65,12 +65,6 @@ struct thread_info {</div><div class='ctx'> </div><div class='ctx'> #define init_thread_info	(init_thread_union.thread_info)</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-/* thread information allocation */</div><div class='del'>-#define alloc_thread_info_node(tsk, node)	\</div><div class='del'>-	((struct thread_info *) __get_free_pages(GFP_KERNEL, 1))</div><div class='del'>-#define free_thread_info(ti) free_pages((unsigned long) (ti), 1)</div><div class='del'>-</div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/cris/kernel/process.c b/arch/cris/kernel/process.c<br/>index 891dad85e8bd..66fd01728790 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/kernel/process.c</a></div><div class='hunk'>@@ -29,34 +29,6 @@</div><div class='ctx'> //#define DEBUG</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Initial task structure. Make this a per-architecture thing,</div><div class='del'>- * because different architectures tend to have different</div><div class='del'>- * alignment requirements and potentially different initial</div><div class='del'>- * setup.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is 8192-byte aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * The hlt_counter, disable_hlt and enable_hlt is just here as a hook if</div><div class='ctx'>  * there would ever be a halt sequence (for power save when idle) with</div><div class='ctx'>  * some largish delay when halting or resuming *and* a driver that can't</div><div class='head'>diff --git a/arch/cris/kernel/ptrace.c b/arch/cris/kernel/ptrace.c<br/>index d114ad3da9b1..58d44ee1a71f 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/kernel/ptrace.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/kernel/ptrace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/kernel/ptrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/kernel/ptrace.c</a></div><div class='hunk'>@@ -40,7 +40,5 @@ void do_notify_resume(int canrestart, struct pt_regs *regs,</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/cris/kernel/time.c b/arch/cris/kernel/time.c<br/>index 4e73092e85c0..277ffc459e4b 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/kernel/time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/kernel/time.c</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/rtc.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/param.h&gt;</div><div class='hunk'>@@ -32,7 +31,8 @@</div><div class='ctx'> #include &lt;linux/profile.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;	/* just for sched_clock() - funny that */</div><div class='ctx'> </div><div class='del'>-int have_rtc;  /* used to remember if we have an RTC or not */;</div><div class='add'>+</div><div class='add'>+#define D(x)</div><div class='ctx'> </div><div class='ctx'> #define TICK_SIZE tick</div><div class='ctx'> </div><div class='hunk'>@@ -50,78 +50,16 @@ u32 arch_gettimeoffset(void)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * BUG: This routine does not handle hour overflow properly; it just</div><div class='del'>- *      sets the minutes. Usually you'll only notice that after reboot!</div><div class='del'>- */</div><div class='del'>-</div><div class='ctx'> int set_rtc_mmss(unsigned long nowtime)</div><div class='ctx'> {</div><div class='del'>-	int retval = 0;</div><div class='del'>-	int real_seconds, real_minutes, cmos_minutes;</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "set_rtc_mmss(%lu)\n", nowtime);</div><div class='del'>-</div><div class='del'>-	if(!have_rtc)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	cmos_minutes = CMOS_READ(RTC_MINUTES);</div><div class='del'>-	cmos_minutes = bcd2bin(cmos_minutes);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * since we're only adjusting minutes and seconds,</div><div class='del'>-	 * don't interfere with hour overflow. This avoids</div><div class='del'>-	 * messing with unknown time zones but requires your</div><div class='del'>-	 * RTC not to be off by more than 15 minutes</div><div class='del'>-	 */</div><div class='del'>-	real_seconds = nowtime % 60;</div><div class='del'>-	real_minutes = nowtime / 60;</div><div class='del'>-	if (((abs(real_minutes - cmos_minutes) + 15)/30) &amp; 1)</div><div class='del'>-		real_minutes += 30;		/* correct for half hour time zone */</div><div class='del'>-	real_minutes %= 60;</div><div class='del'>-</div><div class='del'>-	if (abs(real_minutes - cmos_minutes) &lt; 30) {</div><div class='del'>-		real_seconds = bin2bcd(real_seconds);</div><div class='del'>-		real_minutes = bin2bcd(real_minutes);</div><div class='del'>-		CMOS_WRITE(real_seconds,RTC_SECONDS);</div><div class='del'>-		CMOS_WRITE(real_minutes,RTC_MINUTES);</div><div class='del'>-	} else {</div><div class='del'>-		printk_once(KERN_NOTICE</div><div class='del'>-		       "set_rtc_mmss: can't update from %d to %d\n",</div><div class='del'>-		       cmos_minutes, real_minutes);</div><div class='del'>-		retval = -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='add'>+	D(printk(KERN_DEBUG "set_rtc_mmss(%lu)\n", nowtime));</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* grab the time from the RTC chip */</div><div class='del'>-</div><div class='del'>-unsigned long</div><div class='del'>-get_cmos_time(void)</div><div class='add'>+unsigned long get_cmos_time(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned int year, mon, day, hour, min, sec;</div><div class='del'>-	if(!have_rtc)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	sec = CMOS_READ(RTC_SECONDS);</div><div class='del'>-	min = CMOS_READ(RTC_MINUTES);</div><div class='del'>-	hour = CMOS_READ(RTC_HOURS);</div><div class='del'>-	day = CMOS_READ(RTC_DAY_OF_MONTH);</div><div class='del'>-	mon = CMOS_READ(RTC_MONTH);</div><div class='del'>-	year = CMOS_READ(RTC_YEAR);</div><div class='del'>-</div><div class='del'>-	sec = bcd2bin(sec);</div><div class='del'>-	min = bcd2bin(min);</div><div class='del'>-	hour = bcd2bin(hour);</div><div class='del'>-	day = bcd2bin(day);</div><div class='del'>-	mon = bcd2bin(mon);</div><div class='del'>-	year = bcd2bin(year);</div><div class='del'>-</div><div class='del'>-	if ((year += 1900) &lt; 1970)</div><div class='del'>-		year += 100;</div><div class='del'>-</div><div class='del'>-	return mktime(year, mon, day, hour, min, sec);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -132,7 +70,7 @@ int update_persistent_clock(struct timespec now)</div><div class='ctx'> </div><div class='ctx'> void read_persistent_clock(struct timespec *ts)</div><div class='ctx'> {</div><div class='del'>-	ts-&gt;tv_sec = get_cmos_time();</div><div class='add'>+	ts-&gt;tv_sec = 0;</div><div class='ctx'> 	ts-&gt;tv_nsec = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/cris/kernel/vmlinux.lds.S b/arch/cris/kernel/vmlinux.lds.S<br/>index a6990cb0f098..a68b983dcea1 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/kernel/vmlinux.lds.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/kernel/vmlinux.lds.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -52,6 +52,7 @@ SECTIONS</div><div class='ctx'> </div><div class='ctx'> 	EXCEPTION_TABLE(4)</div><div class='ctx'> </div><div class='add'>+	_sdata = .;</div><div class='ctx'> 	RODATA</div><div class='ctx'> </div><div class='ctx'> 	. = ALIGN (4);</div><div class='head'>diff --git a/arch/cris/mm/fault.c b/arch/cris/mm/fault.c<br/>index b4760d86e1bb..45fd542cf173 100644<br/>--- a/<a href='/drm-misc/tree/arch/cris/mm/fault.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/cris/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/cris/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/cris/mm/fault.c</a></div><div class='hunk'>@@ -58,6 +58,8 @@ do_page_fault(unsigned long address, struct pt_regs *regs,</div><div class='ctx'> 	struct vm_area_struct * vma;</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int fault;</div><div class='add'>+	unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |</div><div class='add'>+				((writeaccess &amp; 1) ? FAULT_FLAG_WRITE : 0);</div><div class='ctx'> </div><div class='ctx'> 	D(printk(KERN_DEBUG</div><div class='ctx'> 		 "Page fault for %lX on %X at %lX, prot %d write %d\n",</div><div class='hunk'>@@ -115,6 +117,7 @@ do_page_fault(unsigned long address, struct pt_regs *regs,</div><div class='ctx'> 	if (in_atomic() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='add'>+retry:</div><div class='ctx'> 	down_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	vma = find_vma(mm, address);</div><div class='ctx'> 	if (!vma)</div><div class='hunk'>@@ -163,7 +166,11 @@ do_page_fault(unsigned long address, struct pt_regs *regs,</div><div class='ctx'> 	 * the fault.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	fault = handle_mm_fault(mm, vma, address, (writeaccess &amp; 1) ? FAULT_FLAG_WRITE : 0);</div><div class='add'>+	fault = handle_mm_fault(mm, vma, address, flags);</div><div class='add'>+</div><div class='add'>+	if ((fault &amp; VM_FAULT_RETRY) &amp;&amp; fatal_signal_pending(current))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(fault &amp; VM_FAULT_ERROR)) {</div><div class='ctx'> 		if (fault &amp; VM_FAULT_OOM)</div><div class='ctx'> 			goto out_of_memory;</div><div class='hunk'>@@ -171,10 +178,24 @@ do_page_fault(unsigned long address, struct pt_regs *regs,</div><div class='ctx'> 			goto do_sigbus;</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='del'>-	if (fault &amp; VM_FAULT_MAJOR)</div><div class='del'>-		tsk-&gt;maj_flt++;</div><div class='del'>-	else</div><div class='del'>-		tsk-&gt;min_flt++;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; FAULT_FLAG_ALLOW_RETRY) {</div><div class='add'>+		if (fault &amp; VM_FAULT_MAJOR)</div><div class='add'>+			tsk-&gt;maj_flt++;</div><div class='add'>+		else</div><div class='add'>+			tsk-&gt;min_flt++;</div><div class='add'>+		if (fault &amp; VM_FAULT_RETRY) {</div><div class='add'>+			flags &amp;= ~FAULT_FLAG_ALLOW_RETRY;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * No need to up_read(&amp;mm-&gt;mmap_sem) as we would</div><div class='add'>+			 * have already released it in __lock_page_or_retry</div><div class='add'>+			 * in mm/filemap.c.</div><div class='add'>+			 */</div><div class='add'>+</div><div class='add'>+			goto retry;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	up_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	return;</div><div class='head'>diff --git a/arch/frv/Makefile b/arch/frv/Makefile<br/>index 7ff84575b186..4d1b1e9baef1 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/frv/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/Makefile</a></div><div class='hunk'>@@ -81,7 +81,7 @@ ifdef CONFIG_DEBUG_INFO</div><div class='ctx'> KBUILD_AFLAGS	+= -Wa,--gdwarf2</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-head-y		:= arch/frv/kernel/head.o arch/frv/kernel/init_task.o</div><div class='add'>+head-y		:= arch/frv/kernel/head.o</div><div class='ctx'> </div><div class='ctx'> core-y		+= arch/frv/kernel/ arch/frv/mm/</div><div class='ctx'> libs-y		+= arch/frv/lib/</div><div class='head'>diff --git a/arch/frv/include/asm/kvm_para.h b/arch/frv/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/frv/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/frv/include/asm/posix_types.h b/arch/frv/include/asm/posix_types.h<br/>index 3f34cb45fbb3..fe512af74a5a 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/frv/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/include/asm/posix_types.h</a></div><div class='hunk'>@@ -10,9 +10,6 @@</div><div class='ctx'> typedef unsigned short	__kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned short	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned short	__kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> </div><div class='head'>diff --git a/arch/frv/include/asm/processor.h b/arch/frv/include/asm/processor.h<br/>index 81c2e271d620..dccb9d162318 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/frv/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/include/asm/processor.h</a></div><div class='hunk'>@@ -54,7 +54,6 @@ extern struct cpuinfo_frv __nongprelbss boot_cpu_data;</div><div class='ctx'>  * Bus types</div><div class='ctx'>  */</div><div class='ctx'> #define EISA_bus 0</div><div class='del'>-#define MCA_bus 0</div><div class='ctx'> </div><div class='ctx'> struct thread_struct {</div><div class='ctx'> 	struct pt_regs		*frame;		/* [GR28] exception frame ptr for this thread */</div><div class='hunk'>@@ -103,8 +102,6 @@ do {							\</div><div class='ctx'> 	__frame-&gt;sp	= (_usp);			\</div><div class='ctx'> } while(0)</div><div class='ctx'> </div><div class='del'>-extern void prepare_to_copy(struct task_struct *tsk);</div><div class='del'>-</div><div class='ctx'> /* Free all resources held by a thread. */</div><div class='ctx'> static inline void release_thread(struct task_struct *dead_task)</div><div class='ctx'> {</div><div class='hunk'>@@ -135,10 +132,6 @@ unsigned long get_wchan(struct task_struct *p);</div><div class='ctx'> #define	KSTK_EIP(tsk)	((tsk)-&gt;thread.frame0-&gt;pc)</div><div class='ctx'> #define	KSTK_ESP(tsk)	((tsk)-&gt;thread.frame0-&gt;sp)</div><div class='ctx'> </div><div class='del'>-/* Allocation and freeing of basic task resources. */</div><div class='del'>-extern struct task_struct *alloc_task_struct_node(int node);</div><div class='del'>-extern void free_task_struct(struct task_struct *p);</div><div class='del'>-</div><div class='ctx'> #define cpu_relax()    barrier()</div><div class='ctx'> </div><div class='ctx'> /* data cache prefetch */</div><div class='head'>diff --git a/arch/frv/include/asm/thread_info.h b/arch/frv/include/asm/thread_info.h<br/>index 92d83ea99ae5..0ff03a33c81e 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/frv/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/include/asm/thread_info.h</a></div><div class='hunk'>@@ -21,8 +21,6 @@</div><div class='ctx'> </div><div class='ctx'> #define THREAD_SIZE		8192</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_TASK_STRUCT_ALLOCATOR</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * low level task data that entry.S needs immediate access to</div><div class='ctx'>  * - this struct should fit entirely inside of one cache line</div><div class='hunk'>@@ -82,19 +80,6 @@ register struct thread_info *__current_thread_info asm("gr15");</div><div class='ctx'> </div><div class='ctx'> #define current_thread_info() ({ __current_thread_info; })</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-</div><div class='del'>-/* thread information allocation */</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-#define alloc_thread_info_node(tsk, node)			\</div><div class='del'>-		kzalloc_node(THREAD_SIZE, GFP_KERNEL, node)</div><div class='del'>-#else</div><div class='del'>-#define alloc_thread_info_node(tsk, node)			\</div><div class='del'>-		kmalloc_node(THREAD_SIZE, GFP_KERNEL, node)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define free_thread_info(info)	kfree(info)</div><div class='del'>-</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -109,8 +94,8 @@ register struct thread_info *__current_thread_info asm("gr15");</div><div class='ctx'> #define TIF_NEED_RESCHED	3	/* rescheduling necessary */</div><div class='ctx'> #define TIF_SINGLESTEP		4	/* restore singlestep on return to user mode */</div><div class='ctx'> #define TIF_RESTORE_SIGMASK	5	/* restore signal mask in do_signal() */</div><div class='del'>-#define TIF_POLLING_NRFLAG	16	/* true if poll_idle() is polling TIF_NEED_RESCHED */</div><div class='del'>-#define TIF_MEMDIE		17	/* is terminating due to OOM killer */</div><div class='add'>+#define TIF_POLLING_NRFLAG	6	/* true if poll_idle() is polling TIF_NEED_RESCHED */</div><div class='add'>+#define TIF_MEMDIE		7	/* is terminating due to OOM killer */</div><div class='ctx'> </div><div class='ctx'> #define _TIF_SYSCALL_TRACE	(1 &lt;&lt; TIF_SYSCALL_TRACE)</div><div class='ctx'> #define _TIF_NOTIFY_RESUME	(1 &lt;&lt; TIF_NOTIFY_RESUME)</div><div class='hunk'>@@ -120,8 +105,16 @@ register struct thread_info *__current_thread_info asm("gr15");</div><div class='ctx'> #define _TIF_RESTORE_SIGMASK	(1 &lt;&lt; TIF_RESTORE_SIGMASK)</div><div class='ctx'> #define _TIF_POLLING_NRFLAG	(1 &lt;&lt; TIF_POLLING_NRFLAG)</div><div class='ctx'> </div><div class='del'>-#define _TIF_WORK_MASK		0x0000FFFE	/* work to do on interrupt/exception return */</div><div class='del'>-#define _TIF_ALLWORK_MASK	0x0000FFFF	/* work to do on any return to u-space */</div><div class='add'>+/* work to do on interrupt/exception return */</div><div class='add'>+#define _TIF_WORK_MASK		\</div><div class='add'>+	(_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_SINGLESTEP)</div><div class='add'>+</div><div class='add'>+/* work to do on any return to u-space */</div><div class='add'>+#define _TIF_ALLWORK_MASK	(_TIF_WORK_MASK | _TIF_SYSCALL_TRACE)</div><div class='add'>+</div><div class='add'>+#if _TIF_ALLWORK_MASK &gt;= 0x2000</div><div class='add'>+#error "_TIF_ALLWORK_MASK won't fit in an ANDI now (see entry.S)"</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Thread-synchronous status.</div><div class='head'>diff --git a/arch/frv/kernel/Makefile b/arch/frv/kernel/Makefile<br/>index c36f70b6699a..ad4087b69968 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/frv/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/kernel/Makefile</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> heads-y				:= head-uc-fr401.o head-uc-fr451.o head-uc-fr555.o</div><div class='ctx'> heads-$(CONFIG_MMU)		:= head-mmu-fr451.o</div><div class='ctx'> </div><div class='del'>-extra-y:= head.o init_task.o vmlinux.lds</div><div class='add'>+extra-y:= head.o vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y := $(heads-y) entry.o entry-table.o break.o switch_to.o kernel_thread.o \</div><div class='ctx'> 	 kernel_execve.o process.o traps.o ptrace.o signal.o dma.o \</div><div class='head'>diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S<br/>index 5ba23f715ea5..7d5e000fd32e 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/kernel/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/frv/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/kernel/entry.S</a></div><div class='hunk'>@@ -905,18 +905,19 @@ __syscall_call:</div><div class='ctx'> __syscall_exit:</div><div class='ctx'> 	LEDS		0x6300</div><div class='ctx'> </div><div class='del'>-	sti		gr8,@(gr28,#REG_GR(8))	; save return value</div><div class='add'>+	# keep current PSR in GR23</div><div class='add'>+	movsg		psr,gr23</div><div class='ctx'> </div><div class='del'>-	# rebuild saved psr - execve will change it for init/main.c</div><div class='ctx'> 	ldi		@(gr28,#REG_PSR),gr22</div><div class='add'>+</div><div class='add'>+	sti.p		gr8,@(gr28,#REG_GR(8))	; save return value</div><div class='add'>+</div><div class='add'>+	# rebuild saved psr - execve will change it for init/main.c</div><div class='ctx'> 	srli		gr22,#1,gr5</div><div class='ctx'> 	andi.p		gr22,#~PSR_PS,gr22</div><div class='ctx'> 	andi		gr5,#PSR_PS,gr5</div><div class='ctx'> 	or		gr5,gr22,gr22</div><div class='del'>-	ori		gr22,#PSR_S,gr22</div><div class='del'>-</div><div class='del'>-	# keep current PSR in GR23</div><div class='del'>-	movsg		psr,gr23</div><div class='add'>+	ori.p		gr22,#PSR_S,gr22</div><div class='ctx'> </div><div class='ctx'> 	# make sure we don't miss an interrupt setting need_resched or sigpending between</div><div class='ctx'> 	# sampling and the RETT</div><div class='hunk'>@@ -924,9 +925,7 @@ __syscall_exit:</div><div class='ctx'> 	movgs		gr23,psr</div><div class='ctx'> </div><div class='ctx'> 	ldi		@(gr15,#TI_FLAGS),gr4</div><div class='del'>-	sethi.p		%hi(_TIF_ALLWORK_MASK),gr5</div><div class='del'>-	setlo		%lo(_TIF_ALLWORK_MASK),gr5</div><div class='del'>-	andcc		gr4,gr5,gr0,icc0</div><div class='add'>+	andicc		gr4,#_TIF_ALLWORK_MASK,gr0,icc0</div><div class='ctx'> 	bne		icc0,#0,__syscall_exit_work</div><div class='ctx'> </div><div class='ctx'> 	# restore all registers and return</div><div class='hunk'>@@ -1111,9 +1110,7 @@ __entry_resume_userspace:</div><div class='ctx'> __entry_return_from_user_interrupt:</div><div class='ctx'> 	LEDS		0x6402</div><div class='ctx'> 	ldi		@(gr15,#TI_FLAGS),gr4</div><div class='del'>-	sethi.p		%hi(_TIF_WORK_MASK),gr5</div><div class='del'>-	setlo		%lo(_TIF_WORK_MASK),gr5</div><div class='del'>-	andcc		gr4,gr5,gr0,icc0</div><div class='add'>+	andicc		gr4,#_TIF_WORK_MASK,gr0,icc0</div><div class='ctx'> 	beq		icc0,#1,__entry_return_direct</div><div class='ctx'> </div><div class='ctx'> __entry_work_pending:</div><div class='hunk'>@@ -1133,9 +1130,7 @@ __entry_work_resched:</div><div class='ctx'> </div><div class='ctx'> 	LEDS		0x6401</div><div class='ctx'> 	ldi		@(gr15,#TI_FLAGS),gr4</div><div class='del'>-	sethi.p		%hi(_TIF_WORK_MASK),gr5</div><div class='del'>-	setlo		%lo(_TIF_WORK_MASK),gr5</div><div class='del'>-	andcc		gr4,gr5,gr0,icc0</div><div class='add'>+	andicc		gr4,#_TIF_WORK_MASK,gr0,icc0</div><div class='ctx'> 	beq		icc0,#1,__entry_return_direct</div><div class='ctx'> 	andicc		gr4,#_TIF_NEED_RESCHED,gr0,icc0</div><div class='ctx'> 	bne		icc0,#1,__entry_work_resched</div><div class='hunk'>@@ -1163,7 +1158,9 @@ __syscall_trace_entry:</div><div class='ctx'> 	# perform syscall exit tracing</div><div class='ctx'> __syscall_exit_work:</div><div class='ctx'> 	LEDS		0x6340</div><div class='del'>-	andicc		gr4,#_TIF_SYSCALL_TRACE,gr0,icc0</div><div class='add'>+	andicc		gr22,#PSR_PS,gr0,icc1	; don't handle on return to kernel mode</div><div class='add'>+	andicc.p	gr4,#_TIF_SYSCALL_TRACE,gr0,icc0</div><div class='add'>+	bne		icc1,#0,__entry_return_direct</div><div class='ctx'> 	beq		icc0,#1,__entry_work_pending</div><div class='ctx'> </div><div class='ctx'> 	movsg		psr,gr23</div><div class='head'>diff --git a/arch/frv/kernel/init_task.c b/arch/frv/kernel/init_task.c<br/>deleted file mode 100644<br/>index 3c3e0b336a9d..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/frv/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/frv/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,32 +0,0 @@</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is THREAD_SIZE aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/frv/kernel/process.c b/arch/frv/kernel/process.c<br/>index d4de48bd5efe..ff95f50efea5 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/frv/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/kernel/process.c</a></div><div class='hunk'>@@ -43,21 +43,6 @@ asmlinkage void ret_from_fork(void);</div><div class='ctx'> void (*pm_power_off)(void);</div><div class='ctx'> EXPORT_SYMBOL(pm_power_off);</div><div class='ctx'> </div><div class='del'>-struct task_struct *alloc_task_struct_node(int node)</div><div class='del'>-{</div><div class='del'>-	struct task_struct *p = kmalloc_node(THREAD_SIZE, GFP_KERNEL, node);</div><div class='del'>-</div><div class='del'>-	if (p)</div><div class='del'>-		atomic_set((atomic_t *)(p+1), 1);</div><div class='del'>-	return p;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void free_task_struct(struct task_struct *p)</div><div class='del'>-{</div><div class='del'>-	if (atomic_dec_and_test((atomic_t *)(p+1)))</div><div class='del'>-		kfree(p);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void core_sleep_idle(void)</div><div class='ctx'> {</div><div class='ctx'> #ifdef LED_DEBUG_SLEEP</div><div class='hunk'>@@ -180,17 +165,6 @@ asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,</div><div class='ctx'> 	return do_fork(clone_flags, newsp, __frame, 0, parent_tidptr, child_tidptr);</div><div class='ctx'> } /* end sys_clone() */</div><div class='ctx'> </div><div class='del'>-/*****************************************************************************/</div><div class='del'>-/*</div><div class='del'>- * This gets called before we allocate a new thread and copy</div><div class='del'>- * the current task into it.</div><div class='del'>- */</div><div class='del'>-void prepare_to_copy(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	//unlazy_fpu(tsk);</div><div class='del'>-} /* end prepare_to_copy() */</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='ctx'> /*</div><div class='ctx'>  * set up the kernel stack and exception frames for a new process</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/frv/kernel/signal.c b/arch/frv/kernel/signal.c<br/>index bab01298b58e..864c2f0d497b 100644<br/>--- a/<a href='/drm-misc/tree/arch/frv/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/frv/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/frv/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/frv/kernel/signal.c</a></div><div class='hunk'>@@ -28,8 +28,6 @@</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_SIG 0</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> struct fdpic_func_descriptor {</div><div class='ctx'> 	unsigned long	text;</div><div class='ctx'> 	unsigned long	GOT;</div><div class='hunk'>@@ -40,17 +38,9 @@ struct fdpic_func_descriptor {</div><div class='ctx'>  */</div><div class='ctx'> asmlinkage int sys_sigsuspend(int history0, int history1, old_sigset_t mask)</div><div class='ctx'> {</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-	siginitset(&amp;current-&gt;blocked, mask);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	sigset_t blocked;</div><div class='add'>+	siginitset(&amp;blocked, mask);</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage int sys_sigaction(int sig,</div><div class='hunk'>@@ -64,10 +54,10 @@ asmlinkage int sys_sigaction(int sig,</div><div class='ctx'> 		old_sigset_t mask;</div><div class='ctx'> 		if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='ctx'> 		    __get_user(new_ka.sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer))</div><div class='add'>+		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='add'>+		    __get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='add'>+		    __get_user(mask, &amp;act-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags);</div><div class='del'>-		__get_user(mask, &amp;act-&gt;sa_mask);</div><div class='ctx'> 		siginitset(&amp;new_ka.sa.sa_mask, mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -76,10 +66,10 @@ asmlinkage int sys_sigaction(int sig,</div><div class='ctx'> 	if (!ret &amp;&amp; oact) {</div><div class='ctx'> 		if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||</div><div class='ctx'> 		    __put_user(old_ka.sa.sa_handler, &amp;oact-&gt;sa_handler) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer))</div><div class='add'>+		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags);</div><div class='del'>-		__put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -157,11 +147,7 @@ asmlinkage int sys_sigreturn(void)</div><div class='ctx'> 	    __copy_from_user(&amp;set.sig[1], &amp;frame-&gt;extramask, sizeof(frame-&gt;extramask)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(&amp;frame-&gt;sc, &amp;gr8))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -183,11 +169,7 @@ asmlinkage int sys_rt_sigreturn(void)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(&amp;frame-&gt;uc.uc_mcontext, &amp;gr8))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -440,9 +422,10 @@ give_sigsegv:</div><div class='ctx'> /*</div><div class='ctx'>  * OK, we're invoking a handler</div><div class='ctx'>  */</div><div class='del'>-static int handle_signal(unsigned long sig, siginfo_t *info,</div><div class='del'>-			 struct k_sigaction *ka, sigset_t *oldset)</div><div class='add'>+static void handle_signal(unsigned long sig, siginfo_t *info,</div><div class='add'>+			 struct k_sigaction *ka)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Are we from a system call? */</div><div class='hunk'>@@ -474,18 +457,11 @@ static int handle_signal(unsigned long sig, siginfo_t *info,</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = setup_frame(sig, ka, oldset);</div><div class='ctx'> </div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-		sigorsets(&amp;current-&gt;blocked, &amp;current-&gt;blocked,</div><div class='del'>-			  &amp;ka-&gt;sa.sa_mask);</div><div class='del'>-		if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-			sigaddset(&amp;current-&gt;blocked, sig);</div><div class='del'>-		recalc_sigpending();</div><div class='del'>-		spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='add'>+	signal_delivered(sig, info, ka, __frame,</div><div class='add'>+				 test_thread_flag(TIF_SINGLESTEP));</div><div class='ctx'> } /* end handle_signal() */</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************/</div><div class='hunk'>@@ -498,44 +474,14 @@ static void do_signal(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='ctx'> 	siginfo_t info;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> 	int signr;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * We want the common case to go fast, which</div><div class='del'>-	 * is why we may in certain cases get here from</div><div class='del'>-	 * kernel mode. Just return without doing anything</div><div class='del'>-	 * if so.</div><div class='del'>-	 */</div><div class='del'>-	if (!user_mode(__frame))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (try_to_freeze())</div><div class='del'>-		goto no_signal;</div><div class='del'>-</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, __frame, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='del'>-		if (handle_signal(signr, &amp;info, &amp;ka, oldset) == 0) {</div><div class='del'>-			/* a signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-</div><div class='del'>-			tracehook_signal_handler(signr, &amp;info, &amp;ka, __frame,</div><div class='del'>-						 test_thread_flag(TIF_SINGLESTEP));</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		handle_signal(signr, &amp;info, &amp;ka);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-no_signal:</div><div class='ctx'> 	/* Did we come from a system call? */</div><div class='ctx'> 	if (__frame-&gt;syscallno != -1) {</div><div class='ctx'> 		/* Restart the system call - no handlers present */</div><div class='hunk'>@@ -557,11 +503,7 @@ no_signal:</div><div class='ctx'> </div><div class='ctx'> 	/* if there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> } /* end do_signal() */</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************/</div><div class='hunk'>@@ -576,15 +518,13 @@ asmlinkage void do_notify_resume(__u32 thread_info_flags)</div><div class='ctx'> 		clear_thread_flag(TIF_SINGLESTEP);</div><div class='ctx'> </div><div class='ctx'> 	/* deal with pending signal delivery */</div><div class='del'>-	if (thread_info_flags &amp; (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))</div><div class='add'>+	if (thread_info_flags &amp; _TIF_SIGPENDING)</div><div class='ctx'> 		do_signal();</div><div class='ctx'> </div><div class='ctx'> 	/* deal with notification on about to resume userspace execution */</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(__frame);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> } /* end do_notify_resume() */</div><div class='head'>diff --git a/arch/h8300/Kconfig.cpu b/arch/h8300/Kconfig.cpu<br/>index 15c22286ae79..321f3922728b 100644<br/>--- a/<a href='/drm-misc/tree/arch/h8300/Kconfig.cpu?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/h8300/Kconfig.cpu</a><br/>+++ b/<a href='/drm-misc/tree/arch/h8300/Kconfig.cpu?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/Kconfig.cpu</a></div><div class='hunk'>@@ -1,7 +1,5 @@</div><div class='ctx'> menu "Processor type and features"</div><div class='ctx'> </div><div class='del'>-source "kernel/time/Kconfig"</div><div class='del'>-</div><div class='ctx'> choice</div><div class='ctx'> 	prompt "H8/300 platform"</div><div class='ctx'> 	default H8300H_GENERIC</div><div class='head'>diff --git a/arch/h8300/include/asm/kvm_para.h b/arch/h8300/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/h8300/include/asm/posix_types.h b/arch/h8300/include/asm/posix_types.h<br/>index bc4c34efb1ad..91e62ba4c7b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/h8300/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/h8300/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/include/asm/posix_types.h</a></div><div class='hunk'>@@ -10,9 +10,6 @@</div><div class='ctx'> typedef unsigned short	__kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned short	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned short	__kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> </div><div class='head'>diff --git a/arch/h8300/include/asm/processor.h b/arch/h8300/include/asm/processor.h<br/>index 61fabf1788c6..4c9f6f87b617 100644<br/>--- a/<a href='/drm-misc/tree/arch/h8300/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/h8300/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/include/asm/processor.h</a></div><div class='hunk'>@@ -109,8 +109,6 @@ static inline void release_thread(struct task_struct *dead_task)</div><div class='ctx'> </div><div class='ctx'> extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);</div><div class='ctx'> </div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Free current thread data structures etc..</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/h8300/include/asm/unistd.h b/arch/h8300/include/asm/unistd.h<br/>index 2c3f8e60b1e0..718511303b4e 100644<br/>--- a/<a href='/drm-misc/tree/arch/h8300/include/asm/unistd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/h8300/include/asm/unistd.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/h8300/include/asm/unistd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/include/asm/unistd.h</a></div><div class='hunk'>@@ -356,6 +356,7 @@</div><div class='ctx'> #define __ARCH_WANT_SYS_SIGPENDING</div><div class='ctx'> #define __ARCH_WANT_SYS_SIGPROCMASK</div><div class='ctx'> #define __ARCH_WANT_SYS_RT_SIGACTION</div><div class='add'>+#define __ARCH_WANT_SYS_RT_SIGSUSPEND</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * "Conditional" syscalls</div><div class='head'>diff --git a/arch/h8300/kernel/Makefile b/arch/h8300/kernel/Makefile<br/>index 8d4d2a54be9e..1cc57f872d34 100644<br/>--- a/<a href='/drm-misc/tree/arch/h8300/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/h8300/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/kernel/Makefile</a></div><div class='hunk'>@@ -6,7 +6,7 @@ extra-y := vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y := process.o traps.o ptrace.o irq.o \</div><div class='ctx'> 	 sys_h8300.o time.o signal.o \</div><div class='del'>-         setup.o gpio.o init_task.o syscalls.o \</div><div class='add'>+         setup.o gpio.o syscalls.o \</div><div class='ctx'> 	 entry.o timer/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_MODULES) += module.o h8300_ksyms.o </div><div class='head'>diff --git a/arch/h8300/kernel/init_task.c b/arch/h8300/kernel/init_task.c<br/>deleted file mode 100644<br/>index 54c1062ee80e..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/h8300/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/h8300/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/h8300/kernel/init_task.c</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-__asm__(".align 4");</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is 8192-byte aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='head'>diff --git a/arch/h8300/kernel/signal.c b/arch/h8300/kernel/signal.c<br/>index af842c369d24..fca10378701b 100644<br/>--- a/<a href='/drm-misc/tree/arch/h8300/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/h8300/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/kernel/signal.c</a></div><div class='hunk'>@@ -47,62 +47,15 @@</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/ucontext.h&gt;</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='del'>-asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Atomically swap in the new signal mask, and wait for a signal.</div><div class='ctx'>  */</div><div class='del'>-asmlinkage int do_sigsuspend(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	old_sigset_t mask = regs-&gt;er3;</div><div class='del'>-	sigset_t saveset;</div><div class='del'>-</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	saveset = current-&gt;blocked;</div><div class='del'>-	siginitset(&amp;current-&gt;blocked, mask);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	regs-&gt;er0 = -EINTR;</div><div class='del'>-	while (1) {</div><div class='del'>-		current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-		schedule();</div><div class='del'>-		if (do_signal(regs, &amp;saveset))</div><div class='del'>-			return -EINTR;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> asmlinkage int</div><div class='del'>-do_rt_sigsuspend(struct pt_regs *regs)</div><div class='add'>+sys_sigsuspend(int unused1, int unused2, old_sigset_t mask)</div><div class='ctx'> {</div><div class='del'>-	sigset_t *unewset = (sigset_t *)regs-&gt;er1;</div><div class='del'>-	size_t sigsetsize = (size_t)regs-&gt;er2;</div><div class='del'>-	sigset_t saveset, newset;</div><div class='del'>-</div><div class='del'>-	/* XXX: Don't preclude handling different sized sigset_t's.  */</div><div class='del'>-	if (sigsetsize != sizeof(sigset_t))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;newset, unewset, sizeof(newset)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	sigdelsetmask(&amp;newset, ~_BLOCKABLE);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	saveset = current-&gt;blocked;</div><div class='del'>-	current-&gt;blocked = newset;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	regs-&gt;er0 = -EINTR;</div><div class='del'>-	while (1) {</div><div class='del'>-		current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-		schedule();</div><div class='del'>-		if (do_signal(regs, &amp;saveset))</div><div class='del'>-			return -EINTR;</div><div class='del'>-	}</div><div class='add'>+	sigset_t blocked;</div><div class='add'>+	siginitset(&amp;blocked, mask);</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage int </div><div class='hunk'>@@ -116,10 +69,10 @@ sys_sigaction(int sig, const struct old_sigaction *act,</div><div class='ctx'> 		old_sigset_t mask;</div><div class='ctx'> 		if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='ctx'> 		    __get_user(new_ka.sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer))</div><div class='add'>+		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='add'>+		    __get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='add'>+		    __get_user(mask, &amp;act-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags);</div><div class='del'>-		__get_user(mask, &amp;act-&gt;sa_mask);</div><div class='ctx'> 		siginitset(&amp;new_ka.sa.sa_mask, mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -128,10 +81,10 @@ sys_sigaction(int sig, const struct old_sigaction *act,</div><div class='ctx'> 	if (!ret &amp;&amp; oact) {</div><div class='ctx'> 		if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||</div><div class='ctx'> 		    __put_user(old_ka.sa.sa_handler, &amp;oact-&gt;sa_handler) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer))</div><div class='add'>+		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags);</div><div class='del'>-		__put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -231,11 +184,7 @@ asmlinkage int do_sigreturn(unsigned long __unused,...)</div><div class='ctx'> 			      sizeof(frame-&gt;extramask))))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> 	</div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;sc, &amp;er0))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -259,11 +208,7 @@ asmlinkage int do_rt_sigreturn(unsigned long __unused,...)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> 	</div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext, &amp;er0))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -314,7 +259,7 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)</div><div class='ctx'> 	return (void *)((usp - frame_size) &amp; -8UL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setup_frame (int sig, struct k_sigaction *ka,</div><div class='add'>+static int setup_frame (int sig, struct k_sigaction *ka,</div><div class='ctx'> 			 sigset_t *set, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct sigframe *frame;</div><div class='hunk'>@@ -375,13 +320,14 @@ static void setup_frame (int sig, struct k_sigaction *ka,</div><div class='ctx'> 	regs-&gt;er1 = (unsigned long)&amp;(frame-&gt;sc);</div><div class='ctx'> 	regs-&gt;er5 = current-&gt;mm-&gt;start_data;	/* GOT base */</div><div class='ctx'> </div><div class='del'>-	return;</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> give_sigsegv:</div><div class='ctx'> 	force_sigsegv(sig, current);</div><div class='add'>+	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='add'>+static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 			    sigset_t *set, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct rt_sigframe *frame;</div><div class='hunk'>@@ -450,10 +396,11 @@ static void setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 	regs-&gt;er2 = (unsigned long)&amp;frame-&gt;uc;</div><div class='ctx'> 	regs-&gt;er5 = current-&gt;mm-&gt;start_data;	/* GOT base */</div><div class='ctx'> </div><div class='del'>-	return;</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> give_sigsegv:</div><div class='ctx'> 	force_sigsegv(sig, current);</div><div class='add'>+	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -461,8 +408,10 @@ give_sigsegv:</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='del'>-	      sigset_t *oldset,	struct pt_regs * regs)</div><div class='add'>+	      struct pt_regs * regs)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='add'>+	int ret;</div><div class='ctx'> 	/* are we from a system call? */</div><div class='ctx'> 	if (regs-&gt;orig_er0 &gt;= 0) {</div><div class='ctx'> 		switch (regs-&gt;er0) {</div><div class='hunk'>@@ -485,16 +434,12 @@ handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='ctx'> </div><div class='ctx'> 	/* set up the stack frame */</div><div class='ctx'> 	if (ka-&gt;sa.sa_flags &amp; SA_SIGINFO)</div><div class='del'>-		setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='add'>+		ret = setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='ctx'> 	else</div><div class='del'>-		setup_frame(sig, ka, oldset, regs);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	sigorsets(&amp;current-&gt;blocked,&amp;current-&gt;blocked,&amp;ka-&gt;sa.sa_mask);</div><div class='del'>-	if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-		sigaddset(&amp;current-&gt;blocked,sig);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+		ret = setup_frame(sig, ka, oldset, regs);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -502,7 +447,7 @@ handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='ctx'>  * want to handle. Thus you cannot kill init even with a SIGKILL even by</div><div class='ctx'>  * mistake.</div><div class='ctx'>  */</div><div class='del'>-asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset)</div><div class='add'>+statis void do_signal(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='hunk'>@@ -515,23 +460,16 @@ asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset)</div><div class='ctx'> 	 * if so.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((regs-&gt;ccr &amp; 0x10))</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	if (try_to_freeze())</div><div class='del'>-		goto no_signal;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	current-&gt;thread.esp0 = (unsigned long) regs;</div><div class='ctx'> </div><div class='del'>-	if (!oldset)</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  */</div><div class='del'>-		handle_signal(signr, &amp;info, &amp;ka, oldset, regs);</div><div class='del'>-		return 1;</div><div class='add'>+		handle_signal(signr, &amp;info, &amp;ka, regs);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='del'>- no_signal:</div><div class='ctx'> 	/* Did we come from a system call? */</div><div class='ctx'> 	if (regs-&gt;orig_er0 &gt;= 0) {</div><div class='ctx'> 		/* Restart the system call - no handlers present */</div><div class='hunk'>@@ -546,18 +484,18 @@ asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset)</div><div class='ctx'> 			regs-&gt;pc -= 2;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+</div><div class='add'>+	/* If there's no signal to deliver, we just restore the saved mask.  */</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void do_notify_resume(struct pt_regs *regs, u32 thread_info_flags)</div><div class='ctx'> {</div><div class='del'>-	if (thread_info_flags &amp; (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))</div><div class='del'>-		do_signal(regs, NULL);</div><div class='add'>+	if (thread_info_flags &amp; _TIF_SIGPENDING)</div><div class='add'>+		do_signal(regs);</div><div class='ctx'> </div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/h8300/kernel/syscalls.S b/arch/h8300/kernel/syscalls.S<br/>index 4be2ea2fbe26..9d77e715a2ed 100644<br/>--- a/<a href='/drm-misc/tree/arch/h8300/kernel/syscalls.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/h8300/kernel/syscalls.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/h8300/kernel/syscalls.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/h8300/kernel/syscalls.S</a></div><div class='hunk'>@@ -343,12 +343,6 @@ SYMBOL_NAME_LABEL(sys_call_table)</div><div class='ctx'> SYMBOL_NAME_LABEL(sys_clone)	</div><div class='ctx'> 	call_sp	h8300_clone</div><div class='ctx'> 	</div><div class='del'>-SYMBOL_NAME_LABEL(sys_sigsuspend)</div><div class='del'>-	call_sp	do_sigsuspend</div><div class='del'>-</div><div class='del'>-SYMBOL_NAME_LABEL(sys_rt_sigsuspend)</div><div class='del'>-	call_sp	do_rt_sigsuspend</div><div class='del'>-</div><div class='ctx'> SYMBOL_NAME_LABEL(sys_sigreturn)</div><div class='ctx'> 	call_sp	do_sigreturn</div><div class='ctx'> </div><div class='head'>diff --git a/arch/hexagon/Kconfig b/arch/hexagon/Kconfig<br/>index 9059e3905887..b2fdfb700f50 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/Kconfig</a></div><div class='hunk'>@@ -13,13 +13,11 @@ config HEXAGON</div><div class='ctx'> 	# select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	# select HAVE_CLK</div><div class='ctx'> 	# select IRQ_PER_CPU</div><div class='del'>-	select HAVE_IRQ_WORK</div><div class='ctx'> 	# select GENERIC_PENDING_IRQ if SMP</div><div class='add'>+	select HAVE_IRQ_WORK</div><div class='ctx'> 	select GENERIC_ATOMIC64</div><div class='ctx'> 	select HAVE_PERF_EVENTS</div><div class='ctx'> 	select HAVE_GENERIC_HARDIRQS</div><div class='del'>-	select GENERIC_HARDIRQS_NO__DO_IRQ</div><div class='del'>-	select GENERIC_HARDIRQS_NO_DEPRECATED</div><div class='ctx'> 	# GENERIC_ALLOCATOR is used by dma_alloc_coherent()</div><div class='ctx'> 	select GENERIC_ALLOCATOR</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='hunk'>@@ -27,7 +25,11 @@ config HEXAGON</div><div class='ctx'> 	select HAVE_ARCH_TRACEHOOK</div><div class='ctx'> 	select NO_IOPORT</div><div class='ctx'> 	select GENERIC_IOMAP</div><div class='del'>-	# mostly generic routines, with some accelerated ones</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='add'>+	select STACKTRACE_SUPPORT</div><div class='add'>+	select KTIME_SCALAR</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select GENERIC_CLOCKEVENTS_BROADCAST</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Qualcomm Hexagon is a processor architecture designed for high</div><div class='ctx'> 	  performance and low power across a wide variety of applications.</div><div class='hunk'>@@ -56,9 +58,6 @@ config PCI</div><div class='ctx'> config EARLY_PRINTK</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config KTIME_SCALAR</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config MMU</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='hunk'>@@ -74,15 +73,6 @@ config GENERIC_CSUM</div><div class='ctx'> config GENERIC_IRQ_PROBE</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-#config ZONE_DMA</div><div class='del'>-#	bool</div><div class='del'>-#	default y</div><div class='del'>-</div><div class='del'>-config HAS_DMA</div><div class='del'>-	bool</div><div class='del'>-	select HAVE_DMA_ATTRS</div><div class='del'>-	default y</div><div class='del'>-</div><div class='ctx'> config NEED_SG_DMA_LENGTH</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='hunk'>@@ -98,15 +88,6 @@ config GENERIC_FIND_NEXT_BIT</div><div class='ctx'> config GENERIC_HWEIGHT</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config GENERIC_TIME</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='del'>-config GENERIC_CLOCKEVENTS_BROADCAST</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config STACKTRACE_SUPPORT</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	select STACKTRACE</div><div class='hunk'>@@ -115,14 +96,11 @@ config GENERIC_BUG</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on BUG</div><div class='ctx'> </div><div class='del'>-config BUG</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> menu "Machine selection"</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='ctx'> 	prompt "System type"</div><div class='del'>-	default HEXAGON_ARCH_V2</div><div class='add'>+	default HEXAGON_COMET</div><div class='ctx'> </div><div class='ctx'> config HEXAGON_COMET</div><div class='ctx'> 	bool "Comet Board"</div><div class='hunk'>@@ -192,11 +170,9 @@ endchoice</div><div class='ctx'> source "mm/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "kernel/Kconfig.hz"</div><div class='del'>-source "kernel/time/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config GENERIC_GPIO</div><div class='del'>-	bool "Generic GPIO support"</div><div class='del'>-	default n</div><div class='add'>+	def_bool n</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='head'>diff --git a/arch/hexagon/Makefile b/arch/hexagon/Makefile<br/>index 0c4de8790fd5..d00d900b2566 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/Makefile</a></div><div class='hunk'>@@ -45,14 +45,8 @@ KBUILD_AFLAGS += -DTHREADINFO_REG=$(TIR_NAME)</div><div class='ctx'> LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)</div><div class='ctx'> libs-y += $(LIBGCC)</div><div class='ctx'> </div><div class='del'>-head-y := arch/hexagon/kernel/head.o \</div><div class='del'>-	arch/hexagon/kernel/init_task.o</div><div class='add'>+head-y := arch/hexagon/kernel/head.o</div><div class='ctx'> </div><div class='ctx'> core-y += arch/hexagon/kernel/ \</div><div class='ctx'> 	arch/hexagon/mm/ \</div><div class='ctx'> 	arch/hexagon/lib/</div><div class='del'>-</div><div class='del'>-#	arch/hexagon/platform/common/</div><div class='del'>-#</div><div class='del'>-#core-$(CONFIG_HEXAGON_COMET)		+= arch/hexagon/platform/comet/</div><div class='del'>-#machine-$(CONFIG_HEXAGON_COMET)		:= comet</div><div class='head'>diff --git a/arch/hexagon/include/asm/kvm_para.h b/arch/hexagon/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/hexagon/include/asm/processor.h b/arch/hexagon/include/asm/processor.h<br/>index 20c5ddabbd8b..e8ea459002a4 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/include/asm/processor.h</a></div><div class='hunk'>@@ -59,13 +59,6 @@ struct thread_struct {</div><div class='ctx'> #define cpu_relax() __vmyield()</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * "Unlazying all lazy status" occurs here.</div><div class='del'>- */</div><div class='del'>-static inline void prepare_to_copy(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Decides where the kernel will search for a free chunk of vm space during</div><div class='ctx'>  * mmaps.</div><div class='ctx'>  * See also arch_get_unmapped_area.</div><div class='head'>diff --git a/arch/hexagon/include/asm/spinlock_types.h b/arch/hexagon/include/asm/spinlock_types.h<br/>index 5e937af1c4ad..99b5a7575c21 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/include/asm/spinlock_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/include/asm/spinlock_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/include/asm/spinlock_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/include/asm/spinlock_types.h</a></div><div class='hunk'>@@ -21,8 +21,6 @@</div><div class='ctx'> #ifndef _ASM_SPINLOCK_TYPES_H</div><div class='ctx'> #define _ASM_SPINLOCK_TYPES_H</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/version.h&gt;</div><div class='del'>-</div><div class='ctx'> #ifndef __LINUX_SPINLOCK_TYPES_H</div><div class='ctx'> # error "please don't include this file directly"</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/hexagon/include/asm/thread_info.h b/arch/hexagon/include/asm/thread_info.h<br/>index 9c2934ff5756..4f936a7ee847 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/include/asm/thread_info.h</a></div><div class='hunk'>@@ -31,15 +31,7 @@</div><div class='ctx'> </div><div class='ctx'> #define THREAD_SHIFT		12</div><div class='ctx'> #define THREAD_SIZE		(1&lt;&lt;THREAD_SHIFT)</div><div class='del'>-</div><div class='del'>-#if THREAD_SHIFT &gt;= PAGE_SHIFT</div><div class='ctx'> #define THREAD_SIZE_ORDER	(THREAD_SHIFT - PAGE_SHIFT)</div><div class='del'>-#else  /*  don't use standard allocator  */</div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-extern struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node);</div><div class='del'>-extern void free_thread_info(struct thread_info *ti);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='head'>diff --git a/arch/hexagon/kernel/Makefile b/arch/hexagon/kernel/Makefile<br/>index 3689f3754d09..536aec093e62 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/Makefile</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-extra-y := head.o vmlinux.lds init_task.o</div><div class='add'>+extra-y := head.o vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SMP) += smp.o topology.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/hexagon/kernel/dma.c b/arch/hexagon/kernel/dma.c<br/>index 0f2367cc5493..2b48751aa5f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/kernel/dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/kernel/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/kernel/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/dma.c</a></div><div class='hunk'>@@ -54,7 +54,7 @@ static struct gen_pool *coherent_pool;</div><div class='ctx'> </div><div class='ctx'> /* Allocates from a pool of uncached memory that was reserved at boot time */</div><div class='ctx'> </div><div class='del'>-void *hexagon_dma_alloc_coherent(struct device *dev, size_t size,</div><div class='add'>+static void *hexagon_dma_alloc_coherent(struct device *dev, size_t size,</div><div class='ctx'> 				 dma_addr_t *dma_addr, gfp_t flag,</div><div class='ctx'> 				 struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/hexagon/kernel/init_task.c b/arch/hexagon/kernel/init_task.c<br/>deleted file mode 100644<br/>index 73283d3edf09..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,54 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Init task definition</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 and</div><div class='del'>- * only version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA</div><div class='del'>- * 02110-1301, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-#include &lt;asm/thread_info.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is 8192-byte aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by making sure</div><div class='del'>- * the linker maps this in the .text segment right after head.S,</div><div class='del'>- * and making head.S ensure the proper alignment.</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union</div><div class='del'>-	__attribute__((__section__(".data.init_task"),</div><div class='del'>-		__aligned__(THREAD_SIZE))) = {</div><div class='del'>-			INIT_THREAD_INFO(init_task)</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/hexagon/kernel/process.c b/arch/hexagon/kernel/process.c<br/>index ff02821bfb7e..af51de63b835 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/process.c</a></div><div class='hunk'>@@ -234,43 +234,6 @@ unsigned long get_wchan(struct task_struct *p)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Borrowed from PowerPC -- basically allow smaller kernel stacks if we</div><div class='del'>- * go crazy with the page sizes.</div><div class='del'>- */</div><div class='del'>-#if THREAD_SHIFT &lt; PAGE_SHIFT</div><div class='del'>-</div><div class='del'>-static struct kmem_cache *thread_info_cache;</div><div class='del'>-</div><div class='del'>-struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)</div><div class='del'>-{</div><div class='del'>-	struct thread_info *ti;</div><div class='del'>-</div><div class='del'>-	ti = kmem_cache_alloc_node(thread_info_cache, GFP_KERNEL, node);</div><div class='del'>-	if (unlikely(ti == NULL))</div><div class='del'>-		return NULL;</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-	memset(ti, 0, THREAD_SIZE);</div><div class='del'>-#endif</div><div class='del'>-	return ti;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void free_thread_info(struct thread_info *ti)</div><div class='del'>-{</div><div class='del'>-	kmem_cache_free(thread_info_cache, ti);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*  Weak symbol; called by init/main.c  */</div><div class='del'>-</div><div class='del'>-void thread_info_cache_init(void)</div><div class='del'>-{</div><div class='del'>-	thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,</div><div class='del'>-					      THREAD_SIZE, 0, NULL);</div><div class='del'>-	BUG_ON(thread_info_cache == NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* THREAD_SHIFT &lt; PAGE_SHIFT */</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Required placeholder.</div><div class='ctx'>  */</div><div class='ctx'> int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)</div><div class='head'>diff --git a/arch/hexagon/kernel/signal.c b/arch/hexagon/kernel/signal.c<br/>index ecbab3457606..304b0808d072 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/signal.c</a></div><div class='hunk'>@@ -31,8 +31,6 @@</div><div class='ctx'> #include &lt;asm/signal.h&gt;</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> struct rt_sigframe {</div><div class='ctx'> 	unsigned long tramp[2];</div><div class='ctx'> 	struct siginfo info;</div><div class='hunk'>@@ -149,11 +147,9 @@ sigsegv:</div><div class='ctx'> /*</div><div class='ctx'>  * Setup invocation of signal handler</div><div class='ctx'>  */</div><div class='del'>-static int handle_signal(int sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='del'>-			 sigset_t *oldset, struct pt_regs *regs)</div><div class='add'>+static void handle_signal(int sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='add'>+			 struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we're handling a signal that aborted a system call,</div><div class='ctx'> 	 * set up the error return value before adding the signal</div><div class='hunk'>@@ -186,15 +182,12 @@ static int handle_signal(int sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='ctx'> 	 * Set up the stack frame; not doing the SA_SIGINFO thing.  We</div><div class='ctx'> 	 * only set up the rt_frame flavor.</div><div class='ctx'> 	 */</div><div class='del'>-	rc = setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='del'>-</div><div class='ctx'> 	/* If there was an error on setup, no signal was delivered. */</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='del'>-</div><div class='del'>-	block_sigmask(ka, sig);</div><div class='add'>+	if (setup_rt_frame(sig, ka, info, sigmask_to_save(), regs) &lt; 0)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	signal_delivered(sig, info, ka, regs,</div><div class='add'>+			test_thread_flag(TIF_SINGLESTEP));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -209,34 +202,13 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (try_to_freeze())</div><div class='del'>-		goto no_signal;</div><div class='del'>-</div><div class='ctx'> 	signo = get_signal_to_deliver(&amp;info, &amp;sigact, regs, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (signo &gt; 0) {</div><div class='del'>-		sigset_t *oldset;</div><div class='del'>-</div><div class='del'>-		if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-			oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-		else</div><div class='del'>-			oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-		if (handle_signal(signo, &amp;info, &amp;sigact, oldset, regs) == 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * Successful delivery case.  The saved sigmask is</div><div class='del'>-			 * stored in the signal frame, and will be restored</div><div class='del'>-			 * by sigreturn.  We can clear the TIF flag.</div><div class='del'>-			 */</div><div class='del'>-			clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-</div><div class='del'>-			tracehook_signal_handler(signo, &amp;info, &amp;sigact, regs,</div><div class='del'>-				test_thread_flag(TIF_SINGLESTEP));</div><div class='del'>-		}</div><div class='add'>+		handle_signal(signo, &amp;info, &amp;sigact, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-no_signal:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we came from a system call, handle the restart.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -259,10 +231,7 @@ no_signal:</div><div class='ctx'> </div><div class='ctx'> no_restart:</div><div class='ctx'> 	/* If there's no signal to deliver, put the saved sigmask back */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags)</div><div class='hunk'>@@ -272,8 +241,7 @@ void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags)</div><div class='ctx'> </div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='add'>+		tracehook_notify_resume(regs);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -293,13 +261,15 @@ asmlinkage int sys_rt_sigreturn(void)</div><div class='ctx'> 	struct rt_sigframe __user *frame;</div><div class='ctx'> 	sigset_t blocked;</div><div class='ctx'> </div><div class='add'>+	/* Always make any pending restarted system calls return -EINTR */</div><div class='add'>+	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='add'>+</div><div class='ctx'> 	frame = (struct rt_sigframe __user *)pt_psp(regs);</div><div class='ctx'> 	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> 	if (__copy_from_user(&amp;blocked, &amp;frame-&gt;uc.uc_sigmask, sizeof(blocked)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;blocked, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;blocked);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext))</div><div class='head'>diff --git a/arch/hexagon/kernel/smp.c b/arch/hexagon/kernel/smp.c<br/>index 1298141874a3..f7264621e58d 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/smp.c</a></div><div class='hunk'>@@ -196,18 +196,11 @@ void __cpuinit start_secondary(void)</div><div class='ctx'>  * maintains control until "cpu_online(cpu)" is set.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='del'>-	struct task_struct *idle;</div><div class='del'>-	struct thread_info *thread;</div><div class='add'>+	struct thread_info *thread = (struct thread_info *)idle-&gt;stack;</div><div class='ctx'> 	void *stack_start;</div><div class='ctx'> </div><div class='del'>-	/*  Create new init task for the CPU  */</div><div class='del'>-	idle = fork_idle(cpu);</div><div class='del'>-	if (IS_ERR(idle))</div><div class='del'>-		panic(KERN_ERR "fork_idle failed\n");</div><div class='del'>-</div><div class='del'>-	thread = (struct thread_info *)idle-&gt;stack;</div><div class='ctx'> 	thread-&gt;cpu = cpu;</div><div class='ctx'> </div><div class='ctx'> 	/*  Boot to the head.  */</div><div class='head'>diff --git a/arch/hexagon/kernel/time.c b/arch/hexagon/kernel/time.c<br/>index 5d9b33b67935..36ba64185711 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/kernel/time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/kernel/time.c</a></div><div class='hunk'>@@ -201,12 +201,10 @@ void __init time_init_deferred(void)</div><div class='ctx'> 		resource = rtos_timer_device.resource;</div><div class='ctx'> </div><div class='ctx'> 	/*  ioremap here means this has to run later, after paging init  */</div><div class='del'>-	rtos_timer = ioremap(resource-&gt;start, resource-&gt;end</div><div class='del'>-		- resource-&gt;start + 1);</div><div class='add'>+	rtos_timer = ioremap(resource-&gt;start, resource_size(resource));</div><div class='ctx'> </div><div class='ctx'> 	if (!rtos_timer) {</div><div class='del'>-		release_mem_region(resource-&gt;start, resource-&gt;end</div><div class='del'>-			- resource-&gt;start + 1);</div><div class='add'>+		release_mem_region(resource-&gt;start, resource_size(resource));</div><div class='ctx'> 	}</div><div class='ctx'> 	clocksource_register_khz(&amp;hexagon_clocksource, pcycle_freq_mhz * 1000);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/hexagon/mm/vm_fault.c b/arch/hexagon/mm/vm_fault.c<br/>index c10b76ff9d65..06695cc4fe58 100644<br/>--- a/<a href='/drm-misc/tree/arch/hexagon/mm/vm_fault.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/hexagon/mm/vm_fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/hexagon/mm/vm_fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/hexagon/mm/vm_fault.c</a></div><div class='hunk'>@@ -53,6 +53,8 @@ void do_page_fault(unsigned long address, long cause, struct pt_regs *regs)</div><div class='ctx'> 	int si_code = SEGV_MAPERR;</div><div class='ctx'> 	int fault;</div><div class='ctx'> 	const struct exception_table_entry *fixup;</div><div class='add'>+	unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |</div><div class='add'>+				 (cause &gt; 0 ? FAULT_FLAG_WRITE : 0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we're in an interrupt or have no user context,</div><div class='hunk'>@@ -63,6 +65,7 @@ void do_page_fault(unsigned long address, long cause, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	local_irq_enable();</div><div class='ctx'> </div><div class='add'>+retry:</div><div class='ctx'> 	down_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	vma = find_vma(mm, address);</div><div class='ctx'> 	if (!vma)</div><div class='hunk'>@@ -96,14 +99,23 @@ good_area:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fault = handle_mm_fault(mm, vma, address, (cause &gt; 0));</div><div class='add'>+	fault = handle_mm_fault(mm, vma, address, flags);</div><div class='add'>+</div><div class='add'>+	if ((fault &amp; VM_FAULT_RETRY) &amp;&amp; fatal_signal_pending(current))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	/* The most common case -- we are done. */</div><div class='ctx'> 	if (likely(!(fault &amp; VM_FAULT_ERROR))) {</div><div class='del'>-		if (fault &amp; VM_FAULT_MAJOR)</div><div class='del'>-			current-&gt;maj_flt++;</div><div class='del'>-		else</div><div class='del'>-			current-&gt;min_flt++;</div><div class='add'>+		if (flags &amp; FAULT_FLAG_ALLOW_RETRY) {</div><div class='add'>+			if (fault &amp; VM_FAULT_MAJOR)</div><div class='add'>+				current-&gt;maj_flt++;</div><div class='add'>+			else</div><div class='add'>+				current-&gt;min_flt++;</div><div class='add'>+			if (fault &amp; VM_FAULT_RETRY) {</div><div class='add'>+				flags &amp;= ~FAULT_FLAG_ALLOW_RETRY;</div><div class='add'>+				goto retry;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		up_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig<br/>index bd7266903bf8..8186ec5ea151 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/Kconfig</a></div><div class='hunk'>@@ -33,6 +33,12 @@ config IA64</div><div class='ctx'> 	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='ctx'> 	select GENERIC_IOMAP</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='add'>+	select ARCH_INIT_TASK</div><div class='add'>+	select ARCH_TASK_STRUCT_ALLOCATOR</div><div class='add'>+	select ARCH_THREAD_INFO_ALLOCATOR</div><div class='add'>+	select ARCH_CLOCKSOURCE_DATA</div><div class='add'>+	select GENERIC_TIME_VSYSCALL</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  The Itanium Processor Family is Intel's 64-bit successor to</div><div class='hunk'>@@ -88,10 +94,6 @@ config GENERIC_CALIBRATE_DELAY</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='del'>-config GENERIC_TIME_VSYSCALL</div><div class='del'>-	bool</div><div class='del'>-	default y</div><div class='del'>-</div><div class='ctx'> config HAVE_SETUP_PER_CPU_AREA</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='hunk'>@@ -106,9 +108,6 @@ config EFI</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='del'>-config ARCH_CLOCKSOURCE_DATA</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config SCHED_OMIT_FRAME_POINTER</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='head'>diff --git a/arch/ia64/include/asm/Kbuild b/arch/ia64/include/asm/Kbuild<br/>index 241d1c53ba69..d4eb9383f5f6 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/Kbuild?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/Kbuild</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> include include/asm-generic/Kbuild.asm</div><div class='ctx'> </div><div class='ctx'> header-y += break.h</div><div class='add'>+header-y += cmpxchg.h</div><div class='ctx'> header-y += fpu.h</div><div class='ctx'> header-y += gcc_intrin.h</div><div class='ctx'> header-y += ia64regs.h</div><div class='head'>diff --git a/arch/ia64/include/asm/gpio.h b/arch/ia64/include/asm/gpio.h<br/>index 590a20debc4e..b3799d88ffcf 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/include/asm/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/gpio.h</a></div><div class='hunk'>@@ -1,55 +1,4 @@</div><div class='del'>-/*</div><div class='del'>- * Generic GPIO API implementation for IA-64.</div><div class='del'>- *</div><div class='del'>- * A stright copy of that for PowerPC which was:</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2007-2008  MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * Author: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _ASM_IA64_GPIO_H</div><div class='del'>-#define _ASM_IA64_GPIO_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;asm-generic/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_GPIOLIB</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We don't (yet) implement inlined/rapid versions for on-chip gpios.</div><div class='del'>- * Just call gpiolib.</div><div class='del'>- */</div><div class='del'>-static inline int gpio_get_value(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_get_value(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void gpio_set_value(unsigned int gpio, int value)</div><div class='del'>-{</div><div class='del'>-	__gpio_set_value(gpio, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_cansleep(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_cansleep(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_to_irq(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_to_irq(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int irq_to_gpio(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_GPIOLIB */</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_IA64_GPIO_H */</div><div class='add'>+#ifndef __LINUX_GPIO_H</div><div class='add'>+#warning Include linux/gpio.h instead of asm/gpio.h</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/ia64/include/asm/irq_remapping.h b/arch/ia64/include/asm/irq_remapping.h<br/>new file mode 100644<br/>index 000000000000..a8687b1d8906<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/irq_remapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/irq_remapping.h</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+#ifndef __IA64_INTR_REMAPPING_H</div><div class='add'>+#define __IA64_INTR_REMAPPING_H</div><div class='add'>+#define irq_remapping_enabled 0</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/ia64/include/asm/kvm_host.h b/arch/ia64/include/asm/kvm_host.h<br/>index e35b3a84a40b..6d6a5ac48d85 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/kvm_host.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/include/asm/kvm_host.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/kvm_host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -365,6 +365,7 @@ struct thash_cb {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_vcpu_stat {</div><div class='add'>+	u32 halt_wakeup;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_vcpu_arch {</div><div class='hunk'>@@ -448,6 +449,8 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	char log_buf[VMM_LOG_LEN];</div><div class='ctx'> 	union context host;</div><div class='ctx'> 	union context guest;</div><div class='add'>+</div><div class='add'>+	char mmio_data[8];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_vm_stat {</div><div class='head'>diff --git a/arch/ia64/include/asm/kvm_para.h b/arch/ia64/include/asm/kvm_para.h<br/>index 1588aee781a2..2019cb99335e 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/kvm_para.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/include/asm/kvm_para.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -26,6 +26,11 @@ static inline unsigned int kvm_arch_para_features(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool kvm_check_and_clear_guest_paused(void)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/ia64/include/asm/posix_types.h b/arch/ia64/include/asm/posix_types.h<br/>index 7323ab9467eb..99ee1d6510cf 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/posix_types.h</a></div><div class='hunk'>@@ -1,9 +1,6 @@</div><div class='ctx'> #ifndef _ASM_IA64_POSIX_TYPES_H</div><div class='ctx'> #define _ASM_IA64_POSIX_TYPES_H</div><div class='ctx'> </div><div class='del'>-typedef unsigned int	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned long	__kernel_sigset_t;	/* at least 32 bits */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/posix_types.h&gt;</div><div class='head'>diff --git a/arch/ia64/include/asm/processor.h b/arch/ia64/include/asm/processor.h<br/>index 483f6c6a4238..832dd3789e9d 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/processor.h</a></div><div class='hunk'>@@ -34,8 +34,7 @@</div><div class='ctx'>  * each (assuming 8KB page size), for a total of 8TB of user virtual</div><div class='ctx'>  * address space.</div><div class='ctx'>  */</div><div class='del'>-#define TASK_SIZE_OF(tsk)	((tsk)-&gt;thread.task_size)</div><div class='del'>-#define TASK_SIZE       	TASK_SIZE_OF(current)</div><div class='add'>+#define TASK_SIZE       	DEFAULT_TASK_SIZE</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This decides where the kernel will search for a free chunk of vm</div><div class='hunk'>@@ -280,7 +279,6 @@ struct thread_struct {</div><div class='ctx'> 	__u8 pad[3];</div><div class='ctx'> 	__u64 ksp;			/* kernel stack pointer */</div><div class='ctx'> 	__u64 map_base;			/* base address for get_unmapped_area() */</div><div class='del'>-	__u64 task_size;		/* limit for task size */</div><div class='ctx'> 	__u64 rbs_bot;			/* the base address for the RBS */</div><div class='ctx'> 	int last_fph_cpu;		/* CPU that may hold the contents of f32-f127 */</div><div class='ctx'> </div><div class='hunk'>@@ -303,7 +301,6 @@ struct thread_struct {</div><div class='ctx'> 	.ksp =		0,					\</div><div class='ctx'> 	.map_base =	DEFAULT_MAP_BASE,			\</div><div class='ctx'> 	.rbs_bot =	STACK_TOP - DEFAULT_USER_STACK_SIZE,	\</div><div class='del'>-	.task_size =	DEFAULT_TASK_SIZE,			\</div><div class='ctx'> 	.last_fph_cpu =  -1,					\</div><div class='ctx'> 	INIT_THREAD_PM						\</div><div class='ctx'> 	.dbr =		{0, },					\</div><div class='hunk'>@@ -343,9 +340,6 @@ struct task_struct;</div><div class='ctx'>  */</div><div class='ctx'> #define release_thread(dead_task)</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This is the mechanism for creating a new kernel thread.</div><div class='ctx'>  *</div><div class='hunk'>@@ -723,7 +717,6 @@ extern unsigned long boot_option_idle_override;</div><div class='ctx'> enum idle_boot_override {IDLE_NO_OVERRIDE=0, IDLE_HALT, IDLE_FORCE_MWAIT,</div><div class='ctx'> 			 IDLE_NOMWAIT, IDLE_POLL};</div><div class='ctx'> </div><div class='del'>-void cpu_idle_wait(void);</div><div class='ctx'> void default_idle(void);</div><div class='ctx'> </div><div class='ctx'> #define ia64_platform_is(x) (strcmp(x, platform_name) == 0)</div><div class='head'>diff --git a/arch/ia64/include/asm/thread_info.h b/arch/ia64/include/asm/thread_info.h<br/>index e054bcc4273c..f7ee85378311 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/thread_info.h</a></div><div class='hunk'>@@ -54,8 +54,6 @@ struct thread_info {</div><div class='ctx'> 	},					\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-</div><div class='ctx'> #ifndef ASM_OFFSETS_C</div><div class='ctx'> /* how to get the thread information struct from C */</div><div class='ctx'> #define current_thread_info()	((struct thread_info *) ((char *) current + IA64_TASK_SIZE))</div><div class='hunk'>@@ -84,7 +82,6 @@ struct thread_info {</div><div class='ctx'> #endif</div><div class='ctx'> #define end_of_stack(p) (unsigned long *)((void *)(p) + IA64_RBS_OFFSET)</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_TASK_STRUCT_ALLOCATOR</div><div class='ctx'> #define alloc_task_struct_node(node)						\</div><div class='ctx'> ({										\</div><div class='ctx'> 	struct page *page = alloc_pages_node(node, GFP_KERNEL | __GFP_COMP,	\</div><div class='hunk'>@@ -144,7 +141,23 @@ static inline void set_restore_sigmask(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_info *ti = current_thread_info();</div><div class='ctx'> 	ti-&gt;status |= TS_RESTORE_SIGMASK;</div><div class='del'>-	set_bit(TIF_SIGPENDING, &amp;ti-&gt;flags);</div><div class='add'>+	WARN_ON(!test_bit(TIF_SIGPENDING, &amp;ti-&gt;flags));</div><div class='add'>+}</div><div class='add'>+static inline void clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	return current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_and_clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	struct thread_info *ti = current_thread_info();</div><div class='add'>+	if (!(ti-&gt;status &amp; TS_RESTORE_SIGMASK))</div><div class='add'>+		return false;</div><div class='add'>+	ti-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> #endif	/* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/ia64/include/asm/topology.h b/arch/ia64/include/asm/topology.h<br/>index 09f646753d1a..a2496e449b75 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/include/asm/topology.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/include/asm/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/include/asm/topology.h</a></div><div class='hunk'>@@ -70,31 +70,6 @@ void build_cpu_to_node_map(void);</div><div class='ctx'> 	.nr_balance_failed	= 0,			\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* sched_domains SD_NODE_INIT for IA64 NUMA machines */</div><div class='del'>-#define SD_NODE_INIT (struct sched_domain) {		\</div><div class='del'>-	.parent			= NULL,			\</div><div class='del'>-	.child			= NULL,			\</div><div class='del'>-	.groups			= NULL,			\</div><div class='del'>-	.min_interval		= 8,			\</div><div class='del'>-	.max_interval		= 8*(min(num_online_cpus(), 32U)), \</div><div class='del'>-	.busy_factor		= 64,			\</div><div class='del'>-	.imbalance_pct		= 125,			\</div><div class='del'>-	.cache_nice_tries	= 2,			\</div><div class='del'>-	.busy_idx		= 3,			\</div><div class='del'>-	.idle_idx		= 2,			\</div><div class='del'>-	.newidle_idx		= 0,			\</div><div class='del'>-	.wake_idx		= 0,			\</div><div class='del'>-	.forkexec_idx		= 0,			\</div><div class='del'>-	.flags			= SD_LOAD_BALANCE	\</div><div class='del'>-				| SD_BALANCE_NEWIDLE	\</div><div class='del'>-				| SD_BALANCE_EXEC	\</div><div class='del'>-				| SD_BALANCE_FORK	\</div><div class='del'>-				| SD_SERIALIZE,		\</div><div class='del'>-	.last_balance		= jiffies,		\</div><div class='del'>-	.balance_interval	= 64,			\</div><div class='del'>-	.nr_balance_failed	= 0,			\</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif /* CONFIG_NUMA */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='head'>diff --git a/arch/ia64/kernel/fsys.S b/arch/ia64/kernel/fsys.S<br/>index cc26edac0ec6..e662f178b990 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/fsys.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/kernel/fsys.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/fsys.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kernel/fsys.S</a></div><div class='hunk'>@@ -372,175 +372,6 @@ ENTRY(fsys_clock_gettime)</div><div class='ctx'> END(fsys_clock_gettime)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * long fsys_rt_sigprocmask (int how, sigset_t *set, sigset_t *oset, size_t sigsetsize).</div><div class='del'>- */</div><div class='del'>-#if _NSIG_WORDS != 1</div><div class='del'>-# error Sorry, fsys_rt_sigprocmask() needs to be updated for _NSIG_WORDS != 1.</div><div class='del'>-#endif</div><div class='del'>-ENTRY(fsys_rt_sigprocmask)</div><div class='del'>-	.prologue</div><div class='del'>-	.altrp b6</div><div class='del'>-	.body</div><div class='del'>-</div><div class='del'>-	add r2=IA64_TASK_BLOCKED_OFFSET,r16</div><div class='del'>-	add r9=TI_FLAGS+IA64_TASK_SIZE,r16</div><div class='del'>-	cmp4.ltu p6,p0=SIG_SETMASK,r32</div><div class='del'>-</div><div class='del'>-	cmp.ne p15,p0=r0,r34			// oset != NULL?</div><div class='del'>-	tnat.nz p8,p0=r34</div><div class='del'>-	add r31=IA64_TASK_SIGHAND_OFFSET,r16</div><div class='del'>-	;;</div><div class='del'>-	ld8 r3=[r2]				// read/prefetch current-&gt;blocked</div><div class='del'>-	ld4 r9=[r9]</div><div class='del'>-	tnat.nz.or p6,p0=r35</div><div class='del'>-</div><div class='del'>-	cmp.ne.or p6,p0=_NSIG_WORDS*8,r35</div><div class='del'>-	tnat.nz.or p6,p0=r32</div><div class='del'>-(p6)	br.spnt.few .fail_einval		// fail with EINVAL</div><div class='del'>-	;;</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	ld8 r31=[r31]				// r31 &lt;- current-&gt;sighand</div><div class='del'>-#endif</div><div class='del'>-	and r9=TIF_ALLWORK_MASK,r9</div><div class='del'>-	tnat.nz.or p8,p0=r33</div><div class='del'>-	;;</div><div class='del'>-	cmp.ne p7,p0=0,r9</div><div class='del'>-	cmp.eq p6,p0=r0,r33			// set == NULL?</div><div class='del'>-	add r31=IA64_SIGHAND_SIGLOCK_OFFSET,r31	// r31 &lt;- current-&gt;sighand-&gt;siglock</div><div class='del'>-(p8)	br.spnt.few .fail_efault		// fail with EFAULT</div><div class='del'>-(p7)	br.spnt.many fsys_fallback_syscall	// got pending kernel work...</div><div class='del'>-(p6)	br.dpnt.many .store_mask		// -&gt; short-circuit to just reading the signal mask</div><div class='del'>-</div><div class='del'>-	/* Argh, we actually have to do some work and _update_ the signal mask: */</div><div class='del'>-</div><div class='del'>-EX(.fail_efault, probe.r.fault r33, 3)		// verify user has read-access to *set</div><div class='del'>-EX(.fail_efault, ld8 r14=[r33])			// r14 &lt;- *set</div><div class='del'>-	mov r17=(1 &lt;&lt; (SIGKILL - 1)) | (1 &lt;&lt; (SIGSTOP - 1))</div><div class='del'>-	;;</div><div class='del'>-</div><div class='del'>-	RSM_PSR_I(p0, r18, r19)			// mask interrupt delivery</div><div class='del'>-	andcm r14=r14,r17			// filter out SIGKILL &amp; SIGSTOP</div><div class='del'>-	mov r8=EINVAL			// default to EINVAL</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	// __ticket_spin_trylock(r31)</div><div class='del'>-	ld4 r17=[r31]</div><div class='del'>-	;;</div><div class='del'>-	mov.m ar.ccv=r17</div><div class='del'>-	extr.u r9=r17,17,15</div><div class='del'>-	adds r19=1,r17</div><div class='del'>-	extr.u r18=r17,0,15</div><div class='del'>-	;;</div><div class='del'>-	cmp.eq p6,p7=r9,r18</div><div class='del'>-	;;</div><div class='del'>-(p6)	cmpxchg4.acq r9=[r31],r19,ar.ccv</div><div class='del'>-(p6)	dep.z r20=r19,1,15		// next serving ticket for unlock</div><div class='del'>-(p7)	br.cond.spnt.many .lock_contention</div><div class='del'>-	;;</div><div class='del'>-	cmp4.eq p0,p7=r9,r17</div><div class='del'>-	adds r31=2,r31</div><div class='del'>-(p7)	br.cond.spnt.many .lock_contention</div><div class='del'>-	ld8 r3=[r2]			// re-read current-&gt;blocked now that we hold the lock</div><div class='del'>-	;;</div><div class='del'>-#else</div><div class='del'>-	ld8 r3=[r2]			// re-read current-&gt;blocked now that we hold the lock</div><div class='del'>-#endif</div><div class='del'>-	add r18=IA64_TASK_PENDING_OFFSET+IA64_SIGPENDING_SIGNAL_OFFSET,r16</div><div class='del'>-	add r19=IA64_TASK_SIGNAL_OFFSET,r16</div><div class='del'>-	cmp4.eq p6,p0=SIG_BLOCK,r32</div><div class='del'>-	;;</div><div class='del'>-	ld8 r19=[r19]			// r19 &lt;- current-&gt;signal</div><div class='del'>-	cmp4.eq p7,p0=SIG_UNBLOCK,r32</div><div class='del'>-	cmp4.eq p8,p0=SIG_SETMASK,r32</div><div class='del'>-	;;</div><div class='del'>-	ld8 r18=[r18]			// r18 &lt;- current-&gt;pending.signal</div><div class='del'>-	.pred.rel.mutex p6,p7,p8</div><div class='del'>-(p6)	or r14=r3,r14			// SIG_BLOCK</div><div class='del'>-(p7)	andcm r14=r3,r14		// SIG_UNBLOCK</div><div class='del'>-</div><div class='del'>-(p8)	mov r14=r14			// SIG_SETMASK</div><div class='del'>-(p6)	mov r8=0			// clear error code</div><div class='del'>-	// recalc_sigpending()</div><div class='del'>-	add r17=IA64_SIGNAL_GROUP_STOP_COUNT_OFFSET,r19</div><div class='del'>-</div><div class='del'>-	add r19=IA64_SIGNAL_SHARED_PENDING_OFFSET+IA64_SIGPENDING_SIGNAL_OFFSET,r19</div><div class='del'>-	;;</div><div class='del'>-	ld4 r17=[r17]		// r17 &lt;- current-&gt;signal-&gt;group_stop_count</div><div class='del'>-(p7)	mov r8=0		// clear error code</div><div class='del'>-</div><div class='del'>-	ld8 r19=[r19]		// r19 &lt;- current-&gt;signal-&gt;shared_pending</div><div class='del'>-	;;</div><div class='del'>-	cmp4.gt p6,p7=r17,r0	// p6/p7 &lt;- (current-&gt;signal-&gt;group_stop_count &gt; 0)?</div><div class='del'>-(p8)	mov r8=0		// clear error code</div><div class='del'>-</div><div class='del'>-	or r18=r18,r19		// r18 &lt;- current-&gt;pending | current-&gt;signal-&gt;shared_pending</div><div class='del'>-	;;</div><div class='del'>-	// r18 &lt;- (current-&gt;pending | current-&gt;signal-&gt;shared_pending) &amp; ~current-&gt;blocked:</div><div class='del'>-	andcm r18=r18,r14</div><div class='del'>-	add r9=TI_FLAGS+IA64_TASK_SIZE,r16</div><div class='del'>-	;;</div><div class='del'>-</div><div class='del'>-(p7)	cmp.ne.or.andcm p6,p7=r18,r0		// p6/p7 &lt;- signal pending</div><div class='del'>-	mov r19=0					// i must not leak kernel bits...</div><div class='del'>-(p6)	br.cond.dpnt.many .sig_pending</div><div class='del'>-	;;</div><div class='del'>-</div><div class='del'>-1:	ld4 r17=[r9]				// r17 &lt;- current-&gt;thread_info-&gt;flags</div><div class='del'>-	;;</div><div class='del'>-	mov ar.ccv=r17</div><div class='del'>-	and r18=~_TIF_SIGPENDING,r17		// r18 &lt;- r17 &amp; ~(1 &lt;&lt; TIF_SIGPENDING)</div><div class='del'>-	;;</div><div class='del'>-</div><div class='del'>-	st8 [r2]=r14				// update current-&gt;blocked with new mask</div><div class='del'>-	cmpxchg4.acq r8=[r9],r18,ar.ccv		// current-&gt;thread_info-&gt;flags &lt;- r18</div><div class='del'>-	;;</div><div class='del'>-	cmp.ne p6,p0=r17,r8			// update failed?</div><div class='del'>-(p6)	br.cond.spnt.few 1b			// yes -&gt; retry</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	// __ticket_spin_unlock(r31)</div><div class='del'>-	st2.rel [r31]=r20</div><div class='del'>-	mov r20=0					// i must not leak kernel bits...</div><div class='del'>-#endif</div><div class='del'>-	SSM_PSR_I(p0, p9, r31)</div><div class='del'>-	;;</div><div class='del'>-</div><div class='del'>-	srlz.d					// ensure psr.i is set again</div><div class='del'>-	mov r18=0					// i must not leak kernel bits...</div><div class='del'>-</div><div class='del'>-.store_mask:</div><div class='del'>-EX(.fail_efault, (p15) probe.w.fault r34, 3)	// verify user has write-access to *oset</div><div class='del'>-EX(.fail_efault, (p15) st8 [r34]=r3)</div><div class='del'>-	mov r2=0					// i must not leak kernel bits...</div><div class='del'>-	mov r3=0					// i must not leak kernel bits...</div><div class='del'>-	mov r8=0				// return 0</div><div class='del'>-	mov r9=0					// i must not leak kernel bits...</div><div class='del'>-	mov r14=0					// i must not leak kernel bits...</div><div class='del'>-	mov r17=0					// i must not leak kernel bits...</div><div class='del'>-	mov r31=0					// i must not leak kernel bits...</div><div class='del'>-	FSYS_RETURN</div><div class='del'>-</div><div class='del'>-.sig_pending:</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	// __ticket_spin_unlock(r31)</div><div class='del'>-	st2.rel [r31]=r20			// release the lock</div><div class='del'>-#endif</div><div class='del'>-	SSM_PSR_I(p0, p9, r17)</div><div class='del'>-	;;</div><div class='del'>-	srlz.d</div><div class='del'>-	br.sptk.many fsys_fallback_syscall	// with signal pending, do the heavy-weight syscall</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-.lock_contention:</div><div class='del'>-	/* Rather than spinning here, fall back on doing a heavy-weight syscall.  */</div><div class='del'>-	SSM_PSR_I(p0, p9, r17)</div><div class='del'>-	;;</div><div class='del'>-	srlz.d</div><div class='del'>-	br.sptk.many fsys_fallback_syscall</div><div class='del'>-#endif</div><div class='del'>-END(fsys_rt_sigprocmask)</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * fsys_getcpu doesn't use the third parameter in this implementation. It reads</div><div class='ctx'>  * current_thread_info()-&gt;cpu and corresponding node in cpu_to_node_map.</div><div class='ctx'>  */</div><div class='hunk'>@@ -559,11 +390,15 @@ ENTRY(fsys_getcpu)</div><div class='ctx'> 	;;</div><div class='ctx'> 	tnat.nz p7,p0 = r33			// I guard against NaT argument</div><div class='ctx'> (p7)    br.cond.spnt.few .fail_einval		// B</div><div class='add'>+	;;</div><div class='add'>+	cmp.ne p6,p0=r32,r0</div><div class='add'>+	cmp.ne p7,p0=r33,r0</div><div class='add'>+	;;</div><div class='ctx'> #ifdef CONFIG_NUMA</div><div class='ctx'> 	movl r17=cpu_to_node_map</div><div class='ctx'> 	;;</div><div class='del'>-EX(.fail_efault, probe.w.fault r32, 3)		// M This takes 5 cycles</div><div class='del'>-EX(.fail_efault, probe.w.fault r33, 3)		// M This takes 5 cycles</div><div class='add'>+EX(.fail_efault, (p6) probe.w.fault r32, 3)		// M This takes 5 cycles</div><div class='add'>+EX(.fail_efault, (p7) probe.w.fault r33, 3)		// M This takes 5 cycles</div><div class='ctx'> 	shladd r18=r3,1,r17</div><div class='ctx'> 	;;</div><div class='ctx'> 	ld2 r20=[r18]				// r20 = cpu_to_node_map[cpu]</div><div class='hunk'>@@ -573,20 +408,20 @@ EX(.fail_efault, probe.w.fault r33, 3)		// M This takes 5 cycles</div><div class='ctx'> (p8)	br.spnt.many fsys_fallback_syscall</div><div class='ctx'> 	;;</div><div class='ctx'> 	;;</div><div class='del'>-EX(.fail_efault, st4 [r32] = r3)</div><div class='del'>-EX(.fail_efault, st2 [r33] = r20)</div><div class='add'>+EX(.fail_efault, (p6) st4 [r32] = r3)</div><div class='add'>+EX(.fail_efault, (p7) st2 [r33] = r20)</div><div class='ctx'> 	mov r8=0</div><div class='ctx'> 	;;</div><div class='ctx'> #else</div><div class='del'>-EX(.fail_efault, probe.w.fault r32, 3)		// M This takes 5 cycles</div><div class='del'>-EX(.fail_efault, probe.w.fault r33, 3)		// M This takes 5 cycles</div><div class='add'>+EX(.fail_efault, (p6) probe.w.fault r32, 3)		// M This takes 5 cycles</div><div class='add'>+EX(.fail_efault, (p7) probe.w.fault r33, 3)		// M This takes 5 cycles</div><div class='ctx'> 	and r2 = TIF_ALLWORK_MASK,r2</div><div class='ctx'> 	;;</div><div class='ctx'> 	cmp.ne p8,p0=0,r2</div><div class='ctx'> (p8)	br.spnt.many fsys_fallback_syscall</div><div class='ctx'> 	;;</div><div class='del'>-EX(.fail_efault, st4 [r32] = r3)</div><div class='del'>-EX(.fail_efault, st2 [r33] = r0)</div><div class='add'>+EX(.fail_efault, (p6) st4 [r32] = r3)</div><div class='add'>+EX(.fail_efault, (p7) st2 [r33] = r0)</div><div class='ctx'> 	mov r8=0</div><div class='ctx'> 	;;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -916,7 +751,7 @@ paravirt_fsyscall_table:</div><div class='ctx'> 	data8 0				// sigaltstack</div><div class='ctx'> 	data8 0				// rt_sigaction</div><div class='ctx'> 	data8 0				// rt_sigpending</div><div class='del'>-	data8 fsys_rt_sigprocmask	// rt_sigprocmask</div><div class='add'>+	data8 0				// rt_sigprocmask</div><div class='ctx'> 	data8 0				// rt_sigqueueinfo	// 1180</div><div class='ctx'> 	data8 0				// rt_sigreturn</div><div class='ctx'> 	data8 0				// rt_sigsuspend</div><div class='head'>diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c<br/>index f00ba025375d..d7f558c1e711 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/perfmon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/kernel/perfmon.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/perfmon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kernel/perfmon.c</a></div><div class='hunk'>@@ -604,12 +604,6 @@ pfm_unprotect_ctx_ctxsw(pfm_context_t *x, unsigned long f)</div><div class='ctx'> 	spin_unlock(&amp;(x)-&gt;ctx_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long </div><div class='del'>-pfm_get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags, unsigned long exec)</div><div class='del'>-{</div><div class='del'>-	return get_unmapped_area(file, addr, len, pgoff, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* forward declaration */</div><div class='ctx'> static const struct dentry_operations pfmfs_dentry_operations;</div><div class='ctx'> </div><div class='hunk'>@@ -2333,8 +2327,8 @@ pfm_smpl_buffer_alloc(struct task_struct *task, struct file *filp, pfm_context_t</div><div class='ctx'> 	down_write(&amp;task-&gt;mm-&gt;mmap_sem);</div><div class='ctx'> </div><div class='ctx'> 	/* find some free area in address space, must have mmap sem held */</div><div class='del'>-	vma-&gt;vm_start = pfm_get_unmapped_area(NULL, 0, size, 0, MAP_PRIVATE|MAP_ANONYMOUS, 0);</div><div class='del'>-	if (vma-&gt;vm_start == 0UL) {</div><div class='add'>+	vma-&gt;vm_start = get_unmapped_area(NULL, 0, size, 0, MAP_PRIVATE|MAP_ANONYMOUS);</div><div class='add'>+	if (IS_ERR_VALUE(vma-&gt;vm_start)) {</div><div class='ctx'> 		DPRINT(("Cannot find unmapped area for size %ld\n", size));</div><div class='ctx'> 		up_write(&amp;task-&gt;mm-&gt;mmap_sem);</div><div class='ctx'> 		goto error;</div><div class='head'>diff --git a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c<br/>index ce74e143aea3..dd6fc1449741 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kernel/process.c</a></div><div class='hunk'>@@ -199,8 +199,6 @@ do_notify_resume_user(sigset_t *unused, struct sigscratch *scr, long in_syscall)</div><div class='ctx'> 	if (test_thread_flag(TIF_NOTIFY_RESUME)) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(&amp;scr-&gt;pt);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* copy user rbs to kernel rbs */</div><div class='hunk'>@@ -273,26 +271,6 @@ static inline void play_dead(void)</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_HOTPLUG_CPU */</div><div class='ctx'> </div><div class='del'>-static void do_nothing(void *unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * cpu_idle_wait - Used to ensure that all the CPUs discard old value of</div><div class='del'>- * pm_idle and update to new pm_idle value. Required while changing pm_idle</div><div class='del'>- * handler on SMP systems.</div><div class='del'>- *</div><div class='del'>- * Caller must have changed pm_idle to the new value before the call. Old</div><div class='del'>- * pm_idle value will not be used by any CPU after the return of this function.</div><div class='del'>- */</div><div class='del'>-void cpu_idle_wait(void)</div><div class='del'>-{</div><div class='del'>-	smp_mb();</div><div class='del'>-	/* kick all the CPUs so that they exit out of pm_idle */</div><div class='del'>-	smp_call_function(do_nothing, NULL, 1);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cpu_idle_wait);</div><div class='del'>-</div><div class='ctx'> void __attribute__((noreturn))</div><div class='ctx'> cpu_idle (void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/ia64/kernel/signal.c b/arch/ia64/kernel/signal.c<br/>index 7bdafc8788bd..a199be1fe619 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kernel/signal.c</a></div><div class='hunk'>@@ -30,7 +30,6 @@</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_SIG	0</div><div class='ctx'> #define STACK_ALIGN	16		/* minimal alignment for stack pointer */</div><div class='del'>-#define _BLOCKABLE	(~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='ctx'> </div><div class='ctx'> #if _NSIG_WORDS &gt; 1</div><div class='ctx'> # define PUT_SIGSET(k,u)	__copy_to_user((u)-&gt;sig, (k)-&gt;sig, sizeof(sigset_t))</div><div class='hunk'>@@ -200,14 +199,7 @@ ia64_rt_sigreturn (struct sigscratch *scr)</div><div class='ctx'> 	if (GET_SIGSET(&amp;set, &amp;sc-&gt;sc_mask))</div><div class='ctx'> 		goto give_sigsegv;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	{</div><div class='del'>-		current-&gt;blocked = set;</div><div class='del'>-		recalc_sigpending();</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(sc, scr))</div><div class='ctx'> 		goto give_sigsegv;</div><div class='hunk'>@@ -421,23 +413,13 @@ setup_frame (int sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *set,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static long</div><div class='del'>-handle_signal (unsigned long sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *oldset,</div><div class='add'>+handle_signal (unsigned long sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 	       struct sigscratch *scr)</div><div class='ctx'> {</div><div class='del'>-	if (!setup_frame(sig, ka, info, oldset, scr))</div><div class='add'>+	if (!setup_frame(sig, ka, info, sigmask_to_save(), scr))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	sigorsets(&amp;current-&gt;blocked, &amp;current-&gt;blocked, &amp;ka-&gt;sa.sa_mask);</div><div class='del'>-	if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-		sigaddset(&amp;current-&gt;blocked, sig);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Let tracing know that we've done the handler setup.</div><div class='del'>-	 */</div><div class='del'>-	tracehook_signal_handler(sig, info, ka, &amp;scr-&gt;pt,</div><div class='add'>+	signal_delivered(sig, info, ka, &amp;scr-&gt;pt,</div><div class='ctx'> 				 test_thread_flag(TIF_SINGLESTEP));</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -451,7 +433,6 @@ void</div><div class='ctx'> ia64_do_signal (struct sigscratch *scr, long in_syscall)</div><div class='ctx'> {</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	long restart = in_syscall;</div><div class='ctx'> 	long errno = scr-&gt;pt.r8;</div><div class='hunk'>@@ -464,11 +445,6 @@ ia64_do_signal (struct sigscratch *scr, long in_syscall)</div><div class='ctx'> 	if (!user_mode(&amp;scr-&gt;pt))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK)</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This only loops in the rare cases of handle_signal() failing, in which case we</div><div class='ctx'> 	 * need to push through a forced SIGSEGV.</div><div class='hunk'>@@ -518,16 +494,8 @@ ia64_do_signal (struct sigscratch *scr, long in_syscall)</div><div class='ctx'> 		 * Whee!  Actually deliver the signal.  If the delivery failed, we need to</div><div class='ctx'> 		 * continue to iterate in this loop so we can deliver the SIGSEGV...</div><div class='ctx'> 		 */</div><div class='del'>-		if (handle_signal(signr, &amp;ka, &amp;info, oldset, scr)) {</div><div class='del'>-			/*</div><div class='del'>-			 * A signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TS_RESTORE_SIGMASK flag.</div><div class='del'>-			 */</div><div class='del'>-			current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+		if (handle_signal(signr, &amp;ka, &amp;info, scr))</div><div class='ctx'> 			return;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Did we come from a system call? */</div><div class='hunk'>@@ -549,8 +517,5 @@ ia64_do_signal (struct sigscratch *scr, long in_syscall)</div><div class='ctx'> </div><div class='ctx'> 	/* if there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back */</div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK) {</div><div class='del'>-		current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c<br/>index 796f6a5b966a..1113b8aba07f 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/smpboot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/kernel/smpboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/smpboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kernel/smpboot.c</a></div><div class='hunk'>@@ -75,13 +75,6 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Store all idle threads, this can be reused instead of creating</div><div class='del'>- * a new thread. Also avoids complicated thread destroy functionality</div><div class='del'>- * for idle threads.</div><div class='del'>- */</div><div class='del'>-struct task_struct *idle_thread_array[NR_CPUS];</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Global array allocated for NR_CPUS at boot time</div><div class='ctx'>  */</div><div class='ctx'> struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];</div><div class='hunk'>@@ -94,13 +87,7 @@ struct sal_to_os_boot *sal_state_for_booting_cpu = &amp;sal_boot_rendez_state[0];</div><div class='ctx'> </div><div class='ctx'> #define set_brendez_area(x) (sal_state_for_booting_cpu = &amp;sal_boot_rendez_state[(x)]);</div><div class='ctx'> </div><div class='del'>-#define get_idle_for_cpu(x)		(idle_thread_array[(x)])</div><div class='del'>-#define set_idle_for_cpu(x,p)	(idle_thread_array[(x)] = (p))</div><div class='del'>-</div><div class='ctx'> #else</div><div class='del'>-</div><div class='del'>-#define get_idle_for_cpu(x)		(NULL)</div><div class='del'>-#define set_idle_for_cpu(x,p)</div><div class='ctx'> #define set_brendez_area(x)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -480,54 +467,12 @@ struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct create_idle {</div><div class='del'>-	struct work_struct work;</div><div class='del'>-	struct task_struct *idle;</div><div class='del'>-	struct completion done;</div><div class='del'>-	int cpu;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __cpuinit</div><div class='del'>-do_fork_idle(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct create_idle *c_idle =</div><div class='del'>-		container_of(work, struct create_idle, work);</div><div class='del'>-</div><div class='del'>-	c_idle-&gt;idle = fork_idle(c_idle-&gt;cpu);</div><div class='del'>-	complete(&amp;c_idle-&gt;done);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __cpuinit</div><div class='del'>-do_boot_cpu (int sapicid, int cpu)</div><div class='add'>+do_boot_cpu (int sapicid, int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='ctx'> 	int timeout;</div><div class='del'>-	struct create_idle c_idle = {</div><div class='del'>-		.work = __WORK_INITIALIZER(c_idle.work, do_fork_idle),</div><div class='del'>-		.cpu	= cpu,</div><div class='del'>-		.done	= COMPLETION_INITIALIZER(c_idle.done),</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We can't use kernel_thread since we must avoid to</div><div class='del'>-	 * reschedule the child.</div><div class='del'>-	 */</div><div class='del'>- 	c_idle.idle = get_idle_for_cpu(cpu);</div><div class='del'>- 	if (c_idle.idle) {</div><div class='del'>-		init_idle(c_idle.idle, cpu);</div><div class='del'>- 		goto do_rest;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	schedule_work(&amp;c_idle.work);</div><div class='del'>-	wait_for_completion(&amp;c_idle.done);</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(c_idle.idle))</div><div class='del'>-		panic("failed fork for CPU %d", cpu);</div><div class='del'>-</div><div class='del'>-	set_idle_for_cpu(cpu, c_idle.idle);</div><div class='del'>-</div><div class='del'>-do_rest:</div><div class='del'>-	task_for_booting_cpu = c_idle.idle;</div><div class='ctx'> </div><div class='add'>+	task_for_booting_cpu = idle;</div><div class='ctx'> 	Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid);</div><div class='ctx'> </div><div class='ctx'> 	set_brendez_area(cpu);</div><div class='hunk'>@@ -793,7 +738,7 @@ set_cpu_sibling_map(int cpu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __cpuinit</div><div class='del'>-__cpu_up (unsigned int cpu)</div><div class='add'>+__cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int sapicid;</div><div class='hunk'>@@ -811,7 +756,7 @@ __cpu_up (unsigned int cpu)</div><div class='ctx'> </div><div class='ctx'> 	per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;</div><div class='ctx'> 	/* Processor goes to start_secondary(), sets online flag */</div><div class='del'>-	ret = do_boot_cpu(sapicid, cpu);</div><div class='add'>+	ret = do_boot_cpu(sapicid, cpu, tidle);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/ia64/kernel/sys_ia64.c b/arch/ia64/kernel/sys_ia64.c<br/>index 609d50056a6c..d9439ef2f661 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kernel/sys_ia64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/kernel/sys_ia64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kernel/sys_ia64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kernel/sys_ia64.c</a></div><div class='hunk'>@@ -171,22 +171,9 @@ asmlinkage unsigned long</div><div class='ctx'> ia64_mremap (unsigned long addr, unsigned long old_len, unsigned long new_len, unsigned long flags,</div><div class='ctx'> 	     unsigned long new_addr)</div><div class='ctx'> {</div><div class='del'>-	extern unsigned long do_mremap (unsigned long addr,</div><div class='del'>-					unsigned long old_len,</div><div class='del'>-					unsigned long new_len,</div><div class='del'>-					unsigned long flags,</div><div class='del'>-					unsigned long new_addr);</div><div class='del'>-</div><div class='del'>-	down_write(&amp;current-&gt;mm-&gt;mmap_sem);</div><div class='del'>-	{</div><div class='del'>-		addr = do_mremap(addr, old_len, new_len, flags, new_addr);</div><div class='del'>-	}</div><div class='del'>-	up_write(&amp;current-&gt;mm-&gt;mmap_sem);</div><div class='del'>-</div><div class='del'>-	if (IS_ERR((void *) addr))</div><div class='del'>-		return addr;</div><div class='del'>-</div><div class='del'>-	force_successful_syscall_return();</div><div class='add'>+	addr = sys_mremap(addr, old_len, new_len, flags, new_addr);</div><div class='add'>+	if (!IS_ERR((void *) addr))</div><div class='add'>+		force_successful_syscall_return();</div><div class='ctx'> 	return addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c<br/>index f5104b7c52cd..bd77cb507c1c 100644<br/>--- a/<a href='/drm-misc/tree/arch/ia64/kvm/kvm-ia64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/ia64/kvm/kvm-ia64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/ia64/kvm/kvm-ia64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/ia64/kvm/kvm-ia64.c</a></div><div class='hunk'>@@ -232,12 +232,12 @@ static int handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)</div><div class='ctx'> 	if ((p-&gt;addr &amp; PAGE_MASK) == IOAPIC_DEFAULT_BASE_ADDRESS)</div><div class='ctx'> 		goto mmio;</div><div class='ctx'> 	vcpu-&gt;mmio_needed = 1;</div><div class='del'>-	vcpu-&gt;mmio_phys_addr = kvm_run-&gt;mmio.phys_addr = p-&gt;addr;</div><div class='del'>-	vcpu-&gt;mmio_size = kvm_run-&gt;mmio.len = p-&gt;size;</div><div class='add'>+	vcpu-&gt;mmio_fragments[0].gpa = kvm_run-&gt;mmio.phys_addr = p-&gt;addr;</div><div class='add'>+	vcpu-&gt;mmio_fragments[0].len = kvm_run-&gt;mmio.len = p-&gt;size;</div><div class='ctx'> 	vcpu-&gt;mmio_is_write = kvm_run-&gt;mmio.is_write = !p-&gt;dir;</div><div class='ctx'> </div><div class='ctx'> 	if (vcpu-&gt;mmio_is_write)</div><div class='del'>-		memcpy(vcpu-&gt;mmio_data, &amp;p-&gt;data, p-&gt;size);</div><div class='add'>+		memcpy(vcpu-&gt;arch.mmio_data, &amp;p-&gt;data, p-&gt;size);</div><div class='ctx'> 	memcpy(kvm_run-&gt;mmio.data, &amp;p-&gt;data, p-&gt;size);</div><div class='ctx'> 	kvm_run-&gt;exit_reason = KVM_EXIT_MMIO;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -719,7 +719,7 @@ static void kvm_set_mmio_data(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_mmio_req *p = kvm_get_vcpu_ioreq(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	if (!vcpu-&gt;mmio_is_write)</div><div class='del'>-		memcpy(&amp;p-&gt;data, vcpu-&gt;mmio_data, 8);</div><div class='add'>+		memcpy(&amp;p-&gt;data, vcpu-&gt;arch.mmio_data, 8);</div><div class='ctx'> 	p-&gt;state = STATE_IORESP_READY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -739,7 +739,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vcpu-&gt;mmio_needed) {</div><div class='del'>-		memcpy(vcpu-&gt;mmio_data, kvm_run-&gt;mmio.data, 8);</div><div class='add'>+		memcpy(vcpu-&gt;arch.mmio_data, kvm_run-&gt;mmio.data, 8);</div><div class='ctx'> 		kvm_set_mmio_data(vcpu);</div><div class='ctx'> 		vcpu-&gt;mmio_read_completed = 1;</div><div class='ctx'> 		vcpu-&gt;mmio_needed = 0;</div><div class='hunk'>@@ -1174,7 +1174,7 @@ out:</div><div class='ctx'> </div><div class='ctx'> bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return irqchip_in_kernel(vcpu-&gt;kcm) == (vcpu-&gt;arch.apic != NULL);</div><div class='add'>+	return irqchip_in_kernel(vcpu-&gt;kvm) == (vcpu-&gt;arch.apic != NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -1872,21 +1872,6 @@ void kvm_arch_hardware_unsetup(void)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_vcpu_kick(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	int me;</div><div class='del'>-	int cpu = vcpu-&gt;cpu;</div><div class='del'>-</div><div class='del'>-	if (waitqueue_active(&amp;vcpu-&gt;wq))</div><div class='del'>-		wake_up_interruptible(&amp;vcpu-&gt;wq);</div><div class='del'>-</div><div class='del'>-	me = get_cpu();</div><div class='del'>-	if (cpu != me &amp;&amp; (unsigned) cpu &lt; nr_cpu_ids &amp;&amp; cpu_online(cpu))</div><div class='del'>-		if (!test_and_set_bit(KVM_REQ_KICK, &amp;vcpu-&gt;requests))</div><div class='del'>-			smp_send_reschedule(cpu);</div><div class='del'>-	put_cpu();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq)</div><div class='ctx'> {</div><div class='ctx'> 	return __apic_accept_irq(vcpu, irq-&gt;vector);</div><div class='hunk'>@@ -1956,6 +1941,11 @@ int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		(kvm_highest_pending_irq(vcpu) != -1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return (!test_and_set_bit(KVM_REQ_KICK, &amp;vcpu-&gt;requests));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				    struct kvm_mp_state *mp_state)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig<br/>index ef80a6546ff2..b638d5bfa14d 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m32r/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/Kconfig</a></div><div class='hunk'>@@ -11,6 +11,7 @@ config M32R</div><div class='ctx'> 	select GENERIC_IRQ_PROBE</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='ctx'> 	select GENERIC_ATOMIC64</div><div class='add'>+	select ARCH_USES_GETTIMEOFFSET</div><div class='ctx'> </div><div class='ctx'> config SBUS</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -33,9 +34,6 @@ config HZ</div><div class='ctx'> 	int</div><div class='ctx'> 	default 100</div><div class='ctx'> </div><div class='del'>-config ARCH_USES_GETTIMEOFFSET</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> source "init/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "kernel/Kconfig.freezer"</div><div class='head'>diff --git a/arch/m32r/Makefile b/arch/m32r/Makefile<br/>index 8ff5ba0ea26c..def8dd0b6bc5 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m32r/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/Makefile</a></div><div class='hunk'>@@ -31,7 +31,7 @@ KBUILD_AFLAGS += $(aflags-y)</div><div class='ctx'> </div><div class='ctx'> CHECKFLAGS	+= -D__m32r__ -D__BIG_ENDIAN__=1</div><div class='ctx'> </div><div class='del'>-head-y	:= arch/m32r/kernel/head.o arch/m32r/kernel/init_task.o</div><div class='add'>+head-y	:= arch/m32r/kernel/head.o</div><div class='ctx'> </div><div class='ctx'> LIBGCC	:= $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m32r/include/asm/posix_types.h b/arch/m32r/include/asm/posix_types.h<br/>index 0195850e1f88..236de26a409b 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m32r/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/include/asm/posix_types.h</a></div><div class='hunk'>@@ -10,9 +10,6 @@</div><div class='ctx'> typedef unsigned short	__kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned short	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned short	__kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m32r/include/asm/processor.h b/arch/m32r/include/asm/processor.h<br/>index e1f46d757460..da17253b5735 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m32r/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/include/asm/processor.h</a></div><div class='hunk'>@@ -118,8 +118,6 @@ struct mm_struct;</div><div class='ctx'> /* Free all resources held by a thread. */</div><div class='ctx'> extern void release_thread(struct task_struct *);</div><div class='ctx'> </div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * create a kernel thread without removing it from tasklists</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/m32r/include/asm/signal.h b/arch/m32r/include/asm/signal.h<br/>index b2eeb0de1c8d..ea5f95e4079e 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/include/asm/signal.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m32r/include/asm/signal.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/include/asm/signal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/include/asm/signal.h</a></div><div class='hunk'>@@ -110,13 +110,6 @@ typedef unsigned long sigset_t;</div><div class='ctx'> #include &lt;asm-generic/signal-defs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='del'>-struct old_sigaction {</div><div class='del'>-	__sighandler_t sa_handler;</div><div class='del'>-	old_sigset_t sa_mask;</div><div class='del'>-	unsigned long sa_flags;</div><div class='del'>-	__sigrestore_t sa_restorer;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct sigaction {</div><div class='ctx'> 	__sighandler_t sa_handler;</div><div class='ctx'> 	unsigned long sa_flags;</div><div class='head'>diff --git a/arch/m32r/include/asm/thread_info.h b/arch/m32r/include/asm/thread_info.h<br/>index bf8fa3c06f4e..c083f6073ef4 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m32r/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/include/asm/thread_info.h</a></div><div class='hunk'>@@ -55,8 +55,8 @@ struct thread_info {</div><div class='ctx'> </div><div class='ctx'> #define PREEMPT_ACTIVE		0x10000000</div><div class='ctx'> </div><div class='del'>-#define THREAD_SIZE (PAGE_SIZE &lt;&lt; 1)</div><div class='del'>-</div><div class='add'>+#define THREAD_SIZE		(PAGE_SIZE &lt;&lt; 1)</div><div class='add'>+#define THREAD_SIZE_ORDER	1</div><div class='ctx'> /*</div><div class='ctx'>  * macros/functions for gaining access to the thread information structure</div><div class='ctx'>  */</div><div class='hunk'>@@ -92,19 +92,6 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> 	return ti;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-</div><div class='del'>-/* thread information allocation */</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-#define alloc_thread_info_node(tsk, node)			\</div><div class='del'>-		kzalloc_node(THREAD_SIZE, GFP_KERNEL, node)</div><div class='del'>-#else</div><div class='del'>-#define alloc_thread_info_node(tsk, node)			\</div><div class='del'>-		kmalloc_node(THREAD_SIZE, GFP_KERNEL, node)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define free_thread_info(info) kfree(info)</div><div class='del'>-</div><div class='ctx'> #define TI_FLAG_FAULT_CODE_SHIFT	28</div><div class='ctx'> </div><div class='ctx'> static inline void set_thread_fault_code(unsigned int val)</div><div class='head'>diff --git a/arch/m32r/kernel/Makefile b/arch/m32r/kernel/Makefile<br/>index b1a4b6036591..0c09dad8b1f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m32r/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/kernel/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Makefile for the Linux/M32R kernel.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y	:= head.o init_task.o vmlinux.lds</div><div class='add'>+extra-y	:= head.o vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y	:= process.o entry.o traps.o align.o irq.o setup.o time.o \</div><div class='ctx'> 	m32r_ksyms.o sys_m32r.o signal.o ptrace.o</div><div class='head'>diff --git a/arch/m32r/kernel/init_task.c b/arch/m32r/kernel/init_task.c<br/>deleted file mode 100644<br/>index 6c42d5f8df50..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m32r/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m32r/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,34 +0,0 @@</div><div class='del'>-/* orig : i386 init_task.c */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is 8192-byte aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='del'>-</div><div class='head'>diff --git a/arch/m32r/kernel/signal.c b/arch/m32r/kernel/signal.c<br/>index a08697f0886d..f3fb2c029cfc 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m32r/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/kernel/signal.c</a></div><div class='hunk'>@@ -28,8 +28,6 @@</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_SIG 0</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> asmlinkage int</div><div class='ctx'> sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,</div><div class='ctx'> 		unsigned long r2, unsigned long r3, unsigned long r4,</div><div class='hunk'>@@ -111,11 +109,7 @@ sys_rt_sigreturn(unsigned long r0, unsigned long r1,</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext, &amp;result))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -270,9 +264,9 @@ static int prev_insn(struct pt_regs *regs)</div><div class='ctx'>  * OK, we're invoking a handler</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static int</div><div class='add'>+static void</div><div class='ctx'> handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='del'>-	      sigset_t *oldset, struct pt_regs *regs)</div><div class='add'>+	      struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	/* Are we from a system call? */</div><div class='ctx'> 	if (regs-&gt;syscall_nr &gt;= 0) {</div><div class='hunk'>@@ -297,16 +291,10 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the stack frame */</div><div class='del'>-	if (setup_rt_frame(sig, ka, info, oldset, regs))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	if (setup_rt_frame(sig, ka, info, sigmask_to_save(), regs))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	sigorsets(&amp;current-&gt;blocked,&amp;current-&gt;blocked,&amp;ka-&gt;sa.sa_mask);</div><div class='del'>-	if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-		sigaddset(&amp;current-&gt;blocked,sig);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	return 0;</div><div class='add'>+	signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -319,7 +307,6 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We want the common case to go fast, which</div><div class='hunk'>@@ -330,14 +317,6 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (try_to_freeze()) </div><div class='del'>-		goto no_signal;</div><div class='del'>-</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		/* Re-enable any watchpoints before delivering the</div><div class='hunk'>@@ -347,13 +326,11 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  */</div><div class='del'>-		if (handle_signal(signr, &amp;ka, &amp;info, oldset, regs) == 0)</div><div class='del'>-			clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='add'>+		handle_signal(signr, &amp;ka, &amp;info, regs);</div><div class='ctx'> </div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>- no_signal:</div><div class='ctx'> 	/* Did we come from a system call? */</div><div class='ctx'> 	if (regs-&gt;syscall_nr &gt;= 0) {</div><div class='ctx'> 		/* Restart the system call - no handlers present */</div><div class='hunk'>@@ -368,10 +345,7 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> 			prev_insn(regs);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -391,8 +365,6 @@ void do_notify_resume(struct pt_regs *regs, __u32 thread_info_flags)</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	clear_thread_flag(TIF_IRET);</div><div class='head'>diff --git a/arch/m32r/kernel/smpboot.c b/arch/m32r/kernel/smpboot.c<br/>index cfdbe5d15002..a2cfc0abb05c 100644<br/>--- a/<a href='/drm-misc/tree/arch/m32r/kernel/smpboot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m32r/kernel/smpboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m32r/kernel/smpboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m32r/kernel/smpboot.c</a></div><div class='hunk'>@@ -109,12 +109,8 @@ static unsigned int calibration_result;</div><div class='ctx'> /* Function Prototypes                                                       */</div><div class='ctx'> /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/</div><div class='ctx'> </div><div class='del'>-void smp_prepare_boot_cpu(void);</div><div class='del'>-void smp_prepare_cpus(unsigned int);</div><div class='ctx'> static void init_ipi_lock(void);</div><div class='ctx'> static void do_boot_cpu(int);</div><div class='del'>-int __cpu_up(unsigned int);</div><div class='del'>-void smp_cpus_done(unsigned int);</div><div class='ctx'> </div><div class='ctx'> int start_secondary(void *);</div><div class='ctx'> static void smp_callin(void);</div><div class='hunk'>@@ -347,7 +343,7 @@ static void __init do_boot_cpu(int phys_id)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu_id)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu_id, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='ctx'> 	int timeout;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig<br/>index d318c606c888..cac5b6be572a 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/Kconfig</a></div><div class='hunk'>@@ -8,6 +8,7 @@ config M68K</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS</div><div class='ctx'> 	select GENERIC_CPU_DEVICES</div><div class='ctx'> 	select FPU if MMU</div><div class='add'>+	select ARCH_USES_GETTIMEOFFSET if MMU &amp;&amp; !COLDFIRE</div><div class='ctx'> </div><div class='ctx'> config RWSEM_GENERIC_SPINLOCK</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -22,9 +23,6 @@ config ARCH_HAS_ILOG2_U32</div><div class='ctx'> config ARCH_HAS_ILOG2_U64</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> config GENERIC_GPIO</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='hunk'>@@ -43,9 +41,6 @@ config TIME_LOW_RES</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='del'>-config ARCH_USES_GETTIMEOFFSET</div><div class='del'>-	def_bool MMU &amp;&amp; !COLDFIRE</div><div class='del'>-</div><div class='ctx'> config NO_IOPORT</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='hunk'>@@ -111,10 +106,6 @@ if COLDFIRE</div><div class='ctx'> source "kernel/Kconfig.preempt"</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-if !MMU || COLDFIRE</div><div class='del'>-source "kernel/time/Kconfig"</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> source "mm/Kconfig"</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='head'>diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu<br/>index 8a9c767125a4..2b53254ad994 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/Kconfig.cpu?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/Kconfig.cpu</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/Kconfig.cpu?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/Kconfig.cpu</a></div><div class='hunk'>@@ -7,7 +7,7 @@ choice</div><div class='ctx'> 	help</div><div class='ctx'> 	  The Freescale (was Motorola) M68K family of processors implements</div><div class='ctx'> 	  the full 68000 processor instruction set.</div><div class='del'>-	  The Freescale ColdFire family of processors is a modern derivitive</div><div class='add'>+	  The Freescale ColdFire family of processors is a modern derivative</div><div class='ctx'> 	  of the 68000 processor family. They are mainly targeted at embedded</div><div class='ctx'> 	  applications, and are all System-On-Chip (SOC) devices, as opposed</div><div class='ctx'> 	  to stand alone CPUs. They implement a subset of the original 68000</div><div class='hunk'>@@ -24,6 +24,7 @@ config COLDFIRE</div><div class='ctx'> 	bool "Coldfire CPU family support"</div><div class='ctx'> 	select GENERIC_GPIO</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='add'>+	select ARCH_HAVE_CUSTOM_GPIO_H</div><div class='ctx'> 	select CPU_HAS_NO_BITFIELDS</div><div class='ctx'> 	select CPU_HAS_NO_MULDIV64</div><div class='ctx'> 	select GENERIC_CSUM</div><div class='head'>diff --git a/arch/m68k/Makefile b/arch/m68k/Makefile<br/>index cf318f20c64d..b7f2e2d5cd2e 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/Makefile</a></div><div class='hunk'>@@ -16,6 +16,13 @@</div><div class='ctx'> </div><div class='ctx'> KBUILD_DEFCONFIG := multi_defconfig</div><div class='ctx'> </div><div class='add'>+ifneq ($(SUBARCH),$(ARCH))</div><div class='add'>+	ifeq ($(CROSS_COMPILE),)</div><div class='add'>+		CROSS_COMPILE := $(call cc-cross-prefix, \</div><div class='add'>+			m68k-linux-gnu- m68k-linux- m68k-unknown-linux-gnu-)</div><div class='add'>+	endif</div><div class='add'>+endif</div><div class='add'>+</div><div class='ctx'> #</div><div class='ctx'> #	Enable processor type. Ordering of these is important - we want to</div><div class='ctx'> #	use the minimum processor type of the range we support. The logic</div><div class='hunk'>@@ -62,12 +69,6 @@ endif</div><div class='ctx'> </div><div class='ctx'> LDFLAGS := -m m68kelf</div><div class='ctx'> KBUILD_LDFLAGS_MODULE += -T $(srctree)/arch/m68k/kernel/module.lds</div><div class='del'>-ifneq ($(SUBARCH),$(ARCH))</div><div class='del'>-	ifeq ($(CROSS_COMPILE),)</div><div class='del'>-		CROSS_COMPILE := $(call cc-cross-prefix, \</div><div class='del'>-			m68k-linux-gnu- m68k-linux- m68k-unknown-linux-gnu-)</div><div class='del'>-	endif</div><div class='del'>-endif</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_SUN3</div><div class='ctx'> LDFLAGS_vmlinux = -N</div><div class='hunk'>@@ -115,18 +116,6 @@ core-$(CONFIG_M68000)		+= arch/m68k/platform/68328/</div><div class='ctx'> core-$(CONFIG_M68EZ328)		+= arch/m68k/platform/68EZ328/</div><div class='ctx'> core-$(CONFIG_M68VZ328)		+= arch/m68k/platform/68VZ328/</div><div class='ctx'> core-$(CONFIG_COLDFIRE)		+= arch/m68k/platform/coldfire/</div><div class='del'>-core-$(CONFIG_M5206)		+= arch/m68k/platform/5206/</div><div class='del'>-core-$(CONFIG_M5206e)		+= arch/m68k/platform/5206/</div><div class='del'>-core-$(CONFIG_M520x)		+= arch/m68k/platform/520x/</div><div class='del'>-core-$(CONFIG_M523x)		+= arch/m68k/platform/523x/</div><div class='del'>-core-$(CONFIG_M5249)		+= arch/m68k/platform/5249/</div><div class='del'>-core-$(CONFIG_M527x)		+= arch/m68k/platform/527x/</div><div class='del'>-core-$(CONFIG_M5272)		+= arch/m68k/platform/5272/</div><div class='del'>-core-$(CONFIG_M528x)		+= arch/m68k/platform/528x/</div><div class='del'>-core-$(CONFIG_M5307)		+= arch/m68k/platform/5307/</div><div class='del'>-core-$(CONFIG_M532x)		+= arch/m68k/platform/532x/</div><div class='del'>-core-$(CONFIG_M5407)		+= arch/m68k/platform/5407/</div><div class='del'>-core-$(CONFIG_M54xx)		+= arch/m68k/platform/54xx/</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> all:	zImage</div><div class='head'>diff --git a/arch/m68k/amiga/platform.c b/arch/m68k/amiga/platform.c<br/>index 7fd8b41723ea..80076d368b7e 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/amiga/platform.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/amiga/platform.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/amiga/platform.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/amiga/platform.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'>  * for more details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/zorro.h&gt;</div><div class='hunk'>@@ -46,18 +47,25 @@ static const struct resource zorro_resources[] __initconst = {</div><div class='ctx'> </div><div class='ctx'> static int __init amiga_init_bus(void)</div><div class='ctx'> {</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	unsigned int n;</div><div class='add'>+</div><div class='ctx'> 	if (!MACH_IS_AMIGA || !AMIGAHW_PRESENT(ZORRO))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	platform_device_register_simple("amiga-zorro", -1, zorro_resources,</div><div class='del'>-					AMIGAHW_PRESENT(ZORRO3) ? 4 : 2);</div><div class='add'>+	n = AMIGAHW_PRESENT(ZORRO3) ? 4 : 2;</div><div class='add'>+	pdev = platform_device_register_simple("amiga-zorro", -1,</div><div class='add'>+					       zorro_resources, n);</div><div class='add'>+	if (IS_ERR(pdev))</div><div class='add'>+		return PTR_ERR(pdev);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> subsys_initcall(amiga_init_bus);</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int z_dev_present(zorro_id id)</div><div class='add'>+static int __init z_dev_present(zorro_id id)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='hunk'>@@ -126,72 +134,122 @@ static const struct resource amiga_rtc_resource __initconst = {</div><div class='ctx'> static int __init amiga_init_devices(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='add'>+	int error;</div><div class='ctx'> </div><div class='ctx'> 	if (!MACH_IS_AMIGA)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	/* video hardware */</div><div class='del'>-	if (AMIGAHW_PRESENT(AMI_VIDEO))</div><div class='del'>-		platform_device_register_simple("amiga-video", -1, NULL, 0);</div><div class='add'>+	if (AMIGAHW_PRESENT(AMI_VIDEO)) {</div><div class='add'>+		pdev = platform_device_register_simple("amiga-video", -1, NULL,</div><div class='add'>+						       0);</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/* sound hardware */</div><div class='del'>-	if (AMIGAHW_PRESENT(AMI_AUDIO))</div><div class='del'>-		platform_device_register_simple("amiga-audio", -1, NULL, 0);</div><div class='add'>+	if (AMIGAHW_PRESENT(AMI_AUDIO)) {</div><div class='add'>+		pdev = platform_device_register_simple("amiga-audio", -1, NULL,</div><div class='add'>+						       0);</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/* storage interfaces */</div><div class='del'>-	if (AMIGAHW_PRESENT(AMI_FLOPPY))</div><div class='del'>-		platform_device_register_simple("amiga-floppy", -1, NULL, 0);</div><div class='add'>+	if (AMIGAHW_PRESENT(AMI_FLOPPY)) {</div><div class='add'>+		pdev = platform_device_register_simple("amiga-floppy", -1,</div><div class='add'>+						       NULL, 0);</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (AMIGAHW_PRESENT(A3000_SCSI))</div><div class='del'>-		platform_device_register_simple("amiga-a3000-scsi", -1,</div><div class='del'>-						&amp;a3000_scsi_resource, 1);</div><div class='add'>+	if (AMIGAHW_PRESENT(A3000_SCSI)) {</div><div class='add'>+		pdev = platform_device_register_simple("amiga-a3000-scsi", -1,</div><div class='add'>+						       &amp;a3000_scsi_resource, 1);</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (AMIGAHW_PRESENT(A4000_SCSI))</div><div class='del'>-		platform_device_register_simple("amiga-a4000t-scsi", -1,</div><div class='del'>-						&amp;a4000t_scsi_resource, 1);</div><div class='add'>+	if (AMIGAHW_PRESENT(A4000_SCSI)) {</div><div class='add'>+		pdev = platform_device_register_simple("amiga-a4000t-scsi", -1,</div><div class='add'>+						       &amp;a4000t_scsi_resource,</div><div class='add'>+						       1);</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (AMIGAHW_PRESENT(A1200_IDE) ||</div><div class='ctx'> 	    z_dev_present(ZORRO_PROD_MTEC_VIPER_MK_V_E_MATRIX_530_SCSI_IDE)) {</div><div class='ctx'> 		pdev = platform_device_register_simple("amiga-gayle-ide", -1,</div><div class='ctx'> 						       &amp;a1200_ide_resource, 1);</div><div class='del'>-		platform_device_add_data(pdev, &amp;a1200_ide_pdata,</div><div class='del'>-					 sizeof(a1200_ide_pdata));</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+		error = platform_device_add_data(pdev, &amp;a1200_ide_pdata,</div><div class='add'>+						 sizeof(a1200_ide_pdata));</div><div class='add'>+		if (error)</div><div class='add'>+			return error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (AMIGAHW_PRESENT(A4000_IDE)) {</div><div class='ctx'> 		pdev = platform_device_register_simple("amiga-gayle-ide", -1,</div><div class='ctx'> 						       &amp;a4000_ide_resource, 1);</div><div class='del'>-		platform_device_add_data(pdev, &amp;a4000_ide_pdata,</div><div class='del'>-					 sizeof(a4000_ide_pdata));</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+		error = platform_device_add_data(pdev, &amp;a4000_ide_pdata,</div><div class='add'>+						 sizeof(a4000_ide_pdata));</div><div class='add'>+		if (error)</div><div class='add'>+			return error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/* other I/O hardware */</div><div class='del'>-	if (AMIGAHW_PRESENT(AMI_KEYBOARD))</div><div class='del'>-		platform_device_register_simple("amiga-keyboard", -1, NULL, 0);</div><div class='add'>+	if (AMIGAHW_PRESENT(AMI_KEYBOARD)) {</div><div class='add'>+		pdev = platform_device_register_simple("amiga-keyboard", -1,</div><div class='add'>+						       NULL, 0);</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (AMIGAHW_PRESENT(AMI_MOUSE))</div><div class='del'>-		platform_device_register_simple("amiga-mouse", -1, NULL, 0);</div><div class='add'>+	if (AMIGAHW_PRESENT(AMI_MOUSE)) {</div><div class='add'>+		pdev = platform_device_register_simple("amiga-mouse", -1, NULL,</div><div class='add'>+						       0);</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (AMIGAHW_PRESENT(AMI_SERIAL))</div><div class='del'>-		platform_device_register_simple("amiga-serial", -1, NULL, 0);</div><div class='add'>+	if (AMIGAHW_PRESENT(AMI_SERIAL)) {</div><div class='add'>+		pdev = platform_device_register_simple("amiga-serial", -1,</div><div class='add'>+						       NULL, 0);</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (AMIGAHW_PRESENT(AMI_PARALLEL))</div><div class='del'>-		platform_device_register_simple("amiga-parallel", -1, NULL, 0);</div><div class='add'>+	if (AMIGAHW_PRESENT(AMI_PARALLEL)) {</div><div class='add'>+		pdev = platform_device_register_simple("amiga-parallel", -1,</div><div class='add'>+						       NULL, 0);</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/* real time clocks */</div><div class='del'>-	if (AMIGAHW_PRESENT(A2000_CLK))</div><div class='del'>-		platform_device_register_simple("rtc-msm6242", -1,</div><div class='del'>-						&amp;amiga_rtc_resource, 1);</div><div class='add'>+	if (AMIGAHW_PRESENT(A2000_CLK)) {</div><div class='add'>+		pdev = platform_device_register_simple("rtc-msm6242", -1,</div><div class='add'>+						       &amp;amiga_rtc_resource, 1);</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (AMIGAHW_PRESENT(A3000_CLK))</div><div class='del'>-		platform_device_register_simple("rtc-rp5c01", -1,</div><div class='del'>-						&amp;amiga_rtc_resource, 1);</div><div class='add'>+	if (AMIGAHW_PRESENT(A3000_CLK)) {</div><div class='add'>+		pdev = platform_device_register_simple("rtc-rp5c01", -1,</div><div class='add'>+						       &amp;amiga_rtc_resource, 1);</div><div class='add'>+		if (IS_ERR(pdev))</div><div class='add'>+			return PTR_ERR(pdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-device_initcall(amiga_init_devices);</div><div class='add'>+arch_initcall(amiga_init_devices);</div><div class='head'>diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c<br/>index 783d8f02360d..3f41092d1b70 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/atari/ataints.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/atari/ataints.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/atari/ataints.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/atari/ataints.c</a></div><div class='hunk'>@@ -206,7 +206,7 @@ void __init atari_init_IRQ(void)</div><div class='ctx'>  * hardware with a programmable int vector (probably a VME board).</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-unsigned long atari_register_vme_int(void)</div><div class='add'>+unsigned int atari_register_vme_int(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -223,7 +223,7 @@ unsigned long atari_register_vme_int(void)</div><div class='ctx'> EXPORT_SYMBOL(atari_register_vme_int);</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-void atari_unregister_vme_int(unsigned long irq)</div><div class='add'>+void atari_unregister_vme_int(unsigned int irq)</div><div class='ctx'> {</div><div class='ctx'> 	if (irq &gt;= VME_SOURCE_BASE &amp;&amp; irq &lt; VME_SOURCE_BASE + VME_MAX_SOURCES) {</div><div class='ctx'> 		irq -= VME_SOURCE_BASE;</div><div class='head'>diff --git a/arch/m68k/configs/m5475evb_defconfig b/arch/m68k/configs/m5475evb_defconfig<br/>new file mode 100644<br/>index 000000000000..c5018a68819b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/m68k/configs/m5475evb_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/configs/m5475evb_defconfig</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+CONFIG_EXPERIMENTAL=y</div><div class='add'>+# CONFIG_SWAP is not set</div><div class='add'>+CONFIG_LOG_BUF_SHIFT=14</div><div class='add'>+CONFIG_SYSFS_DEPRECATED=y</div><div class='add'>+CONFIG_SYSFS_DEPRECATED_V2=y</div><div class='add'>+CONFIG_SYSCTL_SYSCALL=y</div><div class='add'>+# CONFIG_KALLSYMS is not set</div><div class='add'>+# CONFIG_HOTPLUG is not set</div><div class='add'>+# CONFIG_FUTEX is not set</div><div class='add'>+# CONFIG_EPOLL is not set</div><div class='add'>+# CONFIG_SIGNALFD is not set</div><div class='add'>+# CONFIG_TIMERFD is not set</div><div class='add'>+# CONFIG_EVENTFD is not set</div><div class='add'>+# CONFIG_SHMEM is not set</div><div class='add'>+# CONFIG_AIO is not set</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+CONFIG_MODULES=y</div><div class='add'>+# CONFIG_LBDAF is not set</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+CONFIG_COLDFIRE=y</div><div class='add'>+CONFIG_M547x=y</div><div class='add'>+CONFIG_CLOCK_SET=y</div><div class='add'>+CONFIG_CLOCK_FREQ=266000000</div><div class='add'>+# CONFIG_4KSTACKS is not set</div><div class='add'>+CONFIG_RAMBASE=0x0</div><div class='add'>+CONFIG_RAMSIZE=0x2000000</div><div class='add'>+CONFIG_VECTORBASE=0x0</div><div class='add'>+CONFIG_MBAR=0xff000000</div><div class='add'>+CONFIG_KERNELBASE=0x20000</div><div class='add'>+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='add'>+# CONFIG_FW_LOADER is not set</div><div class='add'>+CONFIG_MTD=y</div><div class='add'>+CONFIG_MTD_CHAR=y</div><div class='add'>+CONFIG_MTD_BLOCK=y</div><div class='add'>+CONFIG_MTD_CFI=y</div><div class='add'>+CONFIG_MTD_JEDECPROBE=y</div><div class='add'>+CONFIG_MTD_CFI_AMDSTD=y</div><div class='add'>+CONFIG_MTD_RAM=y</div><div class='add'>+CONFIG_MTD_PHYSMAP=y</div><div class='add'>+CONFIG_MTD_UCLINUX=y</div><div class='add'>+CONFIG_BLK_DEV_RAM=y</div><div class='add'>+# CONFIG_INPUT is not set</div><div class='add'>+# CONFIG_VT is not set</div><div class='add'>+# CONFIG_UNIX98_PTYS is not set</div><div class='add'>+CONFIG_SERIAL_MCF=y</div><div class='add'>+CONFIG_SERIAL_MCF_CONSOLE=y</div><div class='add'>+# CONFIG_HW_RANDOM is not set</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+# CONFIG_USB_SUPPORT is not set</div><div class='add'>+# CONFIG_IOMMU_SUPPORT is not set</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+# CONFIG_FILE_LOCKING is not set</div><div class='add'>+# CONFIG_DNOTIFY is not set</div><div class='add'>+# CONFIG_INOTIFY_USER is not set</div><div class='add'>+# CONFIG_PROC_PAGE_MONITOR is not set</div><div class='add'>+CONFIG_ROMFS_FS=y</div><div class='add'>+CONFIG_ROMFS_BACKED_BY_MTD=y</div><div class='add'>+# CONFIG_SCHED_DEBUG is not set</div><div class='add'>+CONFIG_BOOTPARAM=y</div><div class='add'>+CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"</div><div class='head'>diff --git a/arch/m68k/include/asm/atariints.h b/arch/m68k/include/asm/atariints.h<br/>index 656bbbf5a6ff..5fc13bdf9044 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/atariints.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/include/asm/atariints.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/atariints.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/atariints.h</a></div><div class='hunk'>@@ -198,7 +198,7 @@ static inline int atari_irq_pending( unsigned irq )</div><div class='ctx'> 	return( get_mfp_bit( irq, MFP_PENDING ) );</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned long atari_register_vme_int( void );</div><div class='del'>-void atari_unregister_vme_int( unsigned long );</div><div class='add'>+unsigned int atari_register_vme_int(void);</div><div class='add'>+void atari_unregister_vme_int(unsigned int);</div><div class='ctx'> </div><div class='ctx'> #endif /* linux/atariints.h */</div><div class='head'>diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h<br/>index cb88aa96c4f1..7cafb537d03c 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/cacheflush_no.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/include/asm/cacheflush_no.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/cacheflush_no.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/cacheflush_no.h</a></div><div class='hunk'>@@ -30,11 +30,8 @@</div><div class='ctx'> </div><div class='ctx'> void mcf_cache_push(void);</div><div class='ctx'> </div><div class='del'>-static inline void __flush_cache_all(void)</div><div class='add'>+static inline void __clear_cache_all(void)</div><div class='ctx'> {</div><div class='del'>-#ifdef CACHE_PUSH</div><div class='del'>-	mcf_cache_push();</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CACHE_INVALIDATE</div><div class='ctx'> 	__asm__ __volatile__ (</div><div class='ctx'> 		"movel	%0, %%d0\n\t"</div><div class='hunk'>@@ -44,6 +41,14 @@ static inline void __flush_cache_all(void)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void __flush_cache_all(void)</div><div class='add'>+{</div><div class='add'>+#ifdef CACHE_PUSH</div><div class='add'>+	mcf_cache_push();</div><div class='add'>+#endif</div><div class='add'>+	__clear_cache_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Some ColdFire parts implement separate instruction and data caches,</div><div class='ctx'>  * on those we should just flush the appropriate cache. If we don't need</div><div class='hunk'>@@ -76,4 +81,23 @@ static inline void __flush_dcache_all(void)</div><div class='ctx'> 	__asm__ __volatile__ ( "nop" );</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Push cache entries at supplied address. We want to write back any dirty</div><div class='add'>+ * data and the invalidate the cache lines associated with this address.</div><div class='add'>+ */</div><div class='add'>+static inline void cache_push(unsigned long paddr, int len)</div><div class='add'>+{</div><div class='add'>+	__flush_cache_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Clear cache entries at supplied address (that is don't write back any</div><div class='add'>+ * dirty data).</div><div class='add'>+ */</div><div class='add'>+static inline void cache_clear(unsigned long paddr, int len)</div><div class='add'>+{</div><div class='add'>+	__clear_cache_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* _M68KNOMMU_CACHEFLUSH_H */</div><div class='head'>diff --git a/arch/m68k/include/asm/entry.h b/arch/m68k/include/asm/entry.h<br/>index 622138dc7288..d7de0f1a8957 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/entry.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/include/asm/entry.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/entry.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/entry.h</a></div><div class='hunk'>@@ -33,13 +33,11 @@</div><div class='ctx'> </div><div class='ctx'> /* the following macro is used when enabling interrupts */</div><div class='ctx'> #if defined(MACH_ATARI_ONLY)</div><div class='del'>-	/* block out HSYNC on the atari */</div><div class='del'>-#define ALLOWINT	(~0x400)</div><div class='del'>-#define	MAX_NOINT_IPL	3</div><div class='add'>+	/* block out HSYNC = ipl 2 on the atari */</div><div class='add'>+#define ALLOWINT	(~0x500)</div><div class='ctx'> #else</div><div class='ctx'> 	/* portable version */</div><div class='ctx'> #define ALLOWINT	(~0x700)</div><div class='del'>-#define	MAX_NOINT_IPL	0</div><div class='ctx'> #endif /* machine compilation types */</div><div class='ctx'> </div><div class='ctx'> #ifdef __ASSEMBLY__</div><div class='head'>diff --git a/arch/m68k/include/asm/flat.h b/arch/m68k/include/asm/flat.h<br/>index a0e290793978..f9454b89a51b 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/flat.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/include/asm/flat.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/flat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/flat.h</a></div><div class='hunk'>@@ -11,6 +11,11 @@</div><div class='ctx'> #define	flat_get_addr_from_rp(rp, relval, flags, p)	get_unaligned(rp)</div><div class='ctx'> #define	flat_put_addr_at_rp(rp, val, relval)	put_unaligned(val,rp)</div><div class='ctx'> #define	flat_get_relocate_addr(rel)		(rel)</div><div class='del'>-#define	flat_set_persistent(relval, p)		0</div><div class='add'>+</div><div class='add'>+static inline int flat_set_persistent(unsigned long relval,</div><div class='add'>+				      unsigned long *persistent)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #endif /* __M68KNOMMU_FLAT_H__ */</div><div class='head'>diff --git a/arch/m68k/include/asm/io_mm.h b/arch/m68k/include/asm/io_mm.h<br/>index 0fb3468000e7..fa4324bcf566 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/io_mm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/include/asm/io_mm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/io_mm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/io_mm.h</a></div><div class='hunk'>@@ -278,6 +278,13 @@ static inline void isa_delay(void)</div><div class='ctx'> #define readl(addr)      in_le32(addr)</div><div class='ctx'> #define writel(val,addr) out_le32((addr),(val))</div><div class='ctx'> </div><div class='add'>+#define readsb(port, buf, nr)     raw_insb((port), (u8 *)(buf), (nr))</div><div class='add'>+#define readsw(port, buf, nr)     raw_insw((port), (u16 *)(buf), (nr))</div><div class='add'>+#define readsl(port, buf, nr)     raw_insl((port), (u32 *)(buf), (nr))</div><div class='add'>+#define writesb(port, buf, nr)    raw_outsb((port), (u8 *)(buf), (nr))</div><div class='add'>+#define writesw(port, buf, nr)    raw_outsw((port), (u16 *)(buf), (nr))</div><div class='add'>+#define writesl(port, buf, nr)    raw_outsl((port), (u32 *)(buf), (nr))</div><div class='add'>+</div><div class='ctx'> #define mmiowb()</div><div class='ctx'> </div><div class='ctx'> static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)</div><div class='head'>diff --git a/arch/m68k/include/asm/kvm_para.h b/arch/m68k/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h<br/>index 569476fba18c..d63b99ff7ff7 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/m528xsim.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/include/asm/m528xsim.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/m528xsim.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/m528xsim.h</a></div><div class='hunk'>@@ -97,100 +97,81 @@</div><div class='ctx'> /*</div><div class='ctx'>  * 	GPIO registers</div><div class='ctx'>  */</div><div class='del'>-#define MCFGPIO_PORTA		(MCF_IPSBAR + 0x00100000)</div><div class='del'>-#define MCFGPIO_PORTB		(MCF_IPSBAR + 0x00100001)</div><div class='del'>-#define MCFGPIO_PORTC		(MCF_IPSBAR + 0x00100002)</div><div class='del'>-#define MCFGPIO_PORTD		(MCF_IPSBAR + 0x00100003)</div><div class='del'>-#define MCFGPIO_PORTE		(MCF_IPSBAR + 0x00100004)</div><div class='del'>-#define MCFGPIO_PORTF		(MCF_IPSBAR + 0x00100005)</div><div class='del'>-#define MCFGPIO_PORTG		(MCF_IPSBAR + 0x00100006)</div><div class='del'>-#define MCFGPIO_PORTH		(MCF_IPSBAR + 0x00100007)</div><div class='del'>-#define MCFGPIO_PORTJ		(MCF_IPSBAR + 0x00100008)</div><div class='del'>-#define MCFGPIO_PORTDD		(MCF_IPSBAR + 0x00100009)</div><div class='del'>-#define MCFGPIO_PORTEH		(MCF_IPSBAR + 0x0010000A)</div><div class='del'>-#define MCFGPIO_PORTEL		(MCF_IPSBAR + 0x0010000B)</div><div class='del'>-#define MCFGPIO_PORTAS		(MCF_IPSBAR + 0x0010000C)</div><div class='del'>-#define MCFGPIO_PORTQS		(MCF_IPSBAR + 0x0010000D)</div><div class='del'>-#define MCFGPIO_PORTSD		(MCF_IPSBAR + 0x0010000E)</div><div class='del'>-#define MCFGPIO_PORTTC		(MCF_IPSBAR + 0x0010000F)</div><div class='del'>-#define MCFGPIO_PORTTD		(MCF_IPSBAR + 0x00100010)</div><div class='del'>-#define MCFGPIO_PORTUA		(MCF_IPSBAR + 0x00100011)</div><div class='del'>-</div><div class='del'>-#define MCFGPIO_DDRA		(MCF_IPSBAR + 0x00100014)</div><div class='del'>-#define MCFGPIO_DDRB		(MCF_IPSBAR + 0x00100015)</div><div class='del'>-#define MCFGPIO_DDRC		(MCF_IPSBAR + 0x00100016)</div><div class='del'>-#define MCFGPIO_DDRD		(MCF_IPSBAR + 0x00100017)</div><div class='del'>-#define MCFGPIO_DDRE		(MCF_IPSBAR + 0x00100018)</div><div class='del'>-#define MCFGPIO_DDRF		(MCF_IPSBAR + 0x00100019)</div><div class='del'>-#define MCFGPIO_DDRG		(MCF_IPSBAR + 0x0010001A)</div><div class='del'>-#define MCFGPIO_DDRH		(MCF_IPSBAR + 0x0010001B)</div><div class='del'>-#define MCFGPIO_DDRJ		(MCF_IPSBAR + 0x0010001C)</div><div class='del'>-#define MCFGPIO_DDRDD		(MCF_IPSBAR + 0x0010001D)</div><div class='del'>-#define MCFGPIO_DDREH		(MCF_IPSBAR + 0x0010001E)</div><div class='del'>-#define MCFGPIO_DDREL		(MCF_IPSBAR + 0x0010001F)</div><div class='del'>-#define MCFGPIO_DDRAS		(MCF_IPSBAR + 0x00100020)</div><div class='del'>-#define MCFGPIO_DDRQS		(MCF_IPSBAR + 0x00100021)</div><div class='del'>-#define MCFGPIO_DDRSD		(MCF_IPSBAR + 0x00100022)</div><div class='del'>-#define MCFGPIO_DDRTC		(MCF_IPSBAR + 0x00100023)</div><div class='del'>-#define MCFGPIO_DDRTD		(MCF_IPSBAR + 0x00100024)</div><div class='del'>-#define MCFGPIO_DDRUA		(MCF_IPSBAR + 0x00100025)</div><div class='del'>-</div><div class='del'>-#define MCFGPIO_PORTAP		(MCF_IPSBAR + 0x00100028)</div><div class='del'>-#define MCFGPIO_PORTBP		(MCF_IPSBAR + 0x00100029)</div><div class='del'>-#define MCFGPIO_PORTCP		(MCF_IPSBAR + 0x0010002A)</div><div class='del'>-#define MCFGPIO_PORTDP		(MCF_IPSBAR + 0x0010002B)</div><div class='del'>-#define MCFGPIO_PORTEP		(MCF_IPSBAR + 0x0010002C)</div><div class='del'>-#define MCFGPIO_PORTFP		(MCF_IPSBAR + 0x0010002D)</div><div class='del'>-#define MCFGPIO_PORTGP		(MCF_IPSBAR + 0x0010002E)</div><div class='del'>-#define MCFGPIO_PORTHP		(MCF_IPSBAR + 0x0010002F)</div><div class='del'>-#define MCFGPIO_PORTJP		(MCF_IPSBAR + 0x00100030)</div><div class='del'>-#define MCFGPIO_PORTDDP		(MCF_IPSBAR + 0x00100031)</div><div class='del'>-#define MCFGPIO_PORTEHP		(MCF_IPSBAR + 0x00100032)</div><div class='del'>-#define MCFGPIO_PORTELP		(MCF_IPSBAR + 0x00100033)</div><div class='del'>-#define MCFGPIO_PORTASP		(MCF_IPSBAR + 0x00100034)</div><div class='del'>-#define MCFGPIO_PORTQSP		(MCF_IPSBAR + 0x00100035)</div><div class='del'>-#define MCFGPIO_PORTSDP		(MCF_IPSBAR + 0x00100036)</div><div class='del'>-#define MCFGPIO_PORTTCP		(MCF_IPSBAR + 0x00100037)</div><div class='del'>-#define MCFGPIO_PORTTDP		(MCF_IPSBAR + 0x00100038)</div><div class='del'>-#define MCFGPIO_PORTUAP		(MCF_IPSBAR + 0x00100039)</div><div class='del'>-</div><div class='del'>-#define MCFGPIO_SETA		(MCF_IPSBAR + 0x00100028)</div><div class='del'>-#define MCFGPIO_SETB		(MCF_IPSBAR + 0x00100029)</div><div class='del'>-#define MCFGPIO_SETC		(MCF_IPSBAR + 0x0010002A)</div><div class='del'>-#define MCFGPIO_SETD		(MCF_IPSBAR + 0x0010002B)</div><div class='del'>-#define MCFGPIO_SETE		(MCF_IPSBAR + 0x0010002C)</div><div class='del'>-#define MCFGPIO_SETF		(MCF_IPSBAR + 0x0010002D)</div><div class='del'>-#define MCFGPIO_SETG		(MCF_IPSBAR + 0x0010002E)</div><div class='del'>-#define MCFGPIO_SETH		(MCF_IPSBAR + 0x0010002F)</div><div class='del'>-#define MCFGPIO_SETJ		(MCF_IPSBAR + 0x00100030)</div><div class='del'>-#define MCFGPIO_SETDD		(MCF_IPSBAR + 0x00100031)</div><div class='del'>-#define MCFGPIO_SETEH		(MCF_IPSBAR + 0x00100032)</div><div class='del'>-#define MCFGPIO_SETEL		(MCF_IPSBAR + 0x00100033)</div><div class='del'>-#define MCFGPIO_SETAS		(MCF_IPSBAR + 0x00100034)</div><div class='del'>-#define MCFGPIO_SETQS		(MCF_IPSBAR + 0x00100035)</div><div class='del'>-#define MCFGPIO_SETSD		(MCF_IPSBAR + 0x00100036)</div><div class='del'>-#define MCFGPIO_SETTC		(MCF_IPSBAR + 0x00100037)</div><div class='del'>-#define MCFGPIO_SETTD		(MCF_IPSBAR + 0x00100038)</div><div class='del'>-#define MCFGPIO_SETUA		(MCF_IPSBAR + 0x00100039)</div><div class='del'>-</div><div class='del'>-#define MCFGPIO_CLRA		(MCF_IPSBAR + 0x0010003C)</div><div class='del'>-#define MCFGPIO_CLRB		(MCF_IPSBAR + 0x0010003D)</div><div class='del'>-#define MCFGPIO_CLRC		(MCF_IPSBAR + 0x0010003E)</div><div class='del'>-#define MCFGPIO_CLRD		(MCF_IPSBAR + 0x0010003F)</div><div class='del'>-#define MCFGPIO_CLRE		(MCF_IPSBAR + 0x00100040)</div><div class='del'>-#define MCFGPIO_CLRF		(MCF_IPSBAR + 0x00100041)</div><div class='del'>-#define MCFGPIO_CLRG		(MCF_IPSBAR + 0x00100042)</div><div class='del'>-#define MCFGPIO_CLRH		(MCF_IPSBAR + 0x00100043)</div><div class='del'>-#define MCFGPIO_CLRJ		(MCF_IPSBAR + 0x00100044)</div><div class='del'>-#define MCFGPIO_CLRDD		(MCF_IPSBAR + 0x00100045)</div><div class='del'>-#define MCFGPIO_CLREH		(MCF_IPSBAR + 0x00100046)</div><div class='del'>-#define MCFGPIO_CLREL		(MCF_IPSBAR + 0x00100047)</div><div class='del'>-#define MCFGPIO_CLRAS		(MCF_IPSBAR + 0x00100048)</div><div class='del'>-#define MCFGPIO_CLRQS		(MCF_IPSBAR + 0x00100049)</div><div class='del'>-#define MCFGPIO_CLRSD		(MCF_IPSBAR + 0x0010004A)</div><div class='del'>-#define MCFGPIO_CLRTC		(MCF_IPSBAR + 0x0010004B)</div><div class='del'>-#define MCFGPIO_CLRTD		(MCF_IPSBAR + 0x0010004C)</div><div class='del'>-#define MCFGPIO_CLRUA		(MCF_IPSBAR + 0x0010004D)</div><div class='add'>+#define MCFGPIO_PODR_A		(MCF_IPSBAR + 0x00100000)</div><div class='add'>+#define MCFGPIO_PODR_B		(MCF_IPSBAR + 0x00100001)</div><div class='add'>+#define MCFGPIO_PODR_C		(MCF_IPSBAR + 0x00100002)</div><div class='add'>+#define MCFGPIO_PODR_D		(MCF_IPSBAR + 0x00100003)</div><div class='add'>+#define MCFGPIO_PODR_E		(MCF_IPSBAR + 0x00100004)</div><div class='add'>+#define MCFGPIO_PODR_F		(MCF_IPSBAR + 0x00100005)</div><div class='add'>+#define MCFGPIO_PODR_G		(MCF_IPSBAR + 0x00100006)</div><div class='add'>+#define MCFGPIO_PODR_H		(MCF_IPSBAR + 0x00100007)</div><div class='add'>+#define MCFGPIO_PODR_J		(MCF_IPSBAR + 0x00100008)</div><div class='add'>+#define MCFGPIO_PODR_DD		(MCF_IPSBAR + 0x00100009)</div><div class='add'>+#define MCFGPIO_PODR_EH		(MCF_IPSBAR + 0x0010000A)</div><div class='add'>+#define MCFGPIO_PODR_EL		(MCF_IPSBAR + 0x0010000B)</div><div class='add'>+#define MCFGPIO_PODR_AS		(MCF_IPSBAR + 0x0010000C)</div><div class='add'>+#define MCFGPIO_PODR_QS		(MCF_IPSBAR + 0x0010000D)</div><div class='add'>+#define MCFGPIO_PODR_SD		(MCF_IPSBAR + 0x0010000E)</div><div class='add'>+#define MCFGPIO_PODR_TC		(MCF_IPSBAR + 0x0010000F)</div><div class='add'>+#define MCFGPIO_PODR_TD		(MCF_IPSBAR + 0x00100010)</div><div class='add'>+#define MCFGPIO_PODR_UA		(MCF_IPSBAR + 0x00100011)</div><div class='add'>+</div><div class='add'>+#define MCFGPIO_PDDR_A		(MCF_IPSBAR + 0x00100014)</div><div class='add'>+#define MCFGPIO_PDDR_B		(MCF_IPSBAR + 0x00100015)</div><div class='add'>+#define MCFGPIO_PDDR_C		(MCF_IPSBAR + 0x00100016)</div><div class='add'>+#define MCFGPIO_PDDR_D		(MCF_IPSBAR + 0x00100017)</div><div class='add'>+#define MCFGPIO_PDDR_E		(MCF_IPSBAR + 0x00100018)</div><div class='add'>+#define MCFGPIO_PDDR_F		(MCF_IPSBAR + 0x00100019)</div><div class='add'>+#define MCFGPIO_PDDR_G		(MCF_IPSBAR + 0x0010001A)</div><div class='add'>+#define MCFGPIO_PDDR_H		(MCF_IPSBAR + 0x0010001B)</div><div class='add'>+#define MCFGPIO_PDDR_J		(MCF_IPSBAR + 0x0010001C)</div><div class='add'>+#define MCFGPIO_PDDR_DD		(MCF_IPSBAR + 0x0010001D)</div><div class='add'>+#define MCFGPIO_PDDR_EH		(MCF_IPSBAR + 0x0010001E)</div><div class='add'>+#define MCFGPIO_PDDR_EL		(MCF_IPSBAR + 0x0010001F)</div><div class='add'>+#define MCFGPIO_PDDR_AS		(MCF_IPSBAR + 0x00100020)</div><div class='add'>+#define MCFGPIO_PDDR_QS		(MCF_IPSBAR + 0x00100021)</div><div class='add'>+#define MCFGPIO_PDDR_SD		(MCF_IPSBAR + 0x00100022)</div><div class='add'>+#define MCFGPIO_PDDR_TC		(MCF_IPSBAR + 0x00100023)</div><div class='add'>+#define MCFGPIO_PDDR_TD		(MCF_IPSBAR + 0x00100024)</div><div class='add'>+#define MCFGPIO_PDDR_UA		(MCF_IPSBAR + 0x00100025)</div><div class='add'>+</div><div class='add'>+#define MCFGPIO_PPDSDR_A	(MCF_IPSBAR + 0x00100028)</div><div class='add'>+#define MCFGPIO_PPDSDR_B	(MCF_IPSBAR + 0x00100029)</div><div class='add'>+#define MCFGPIO_PPDSDR_C	(MCF_IPSBAR + 0x0010002A)</div><div class='add'>+#define MCFGPIO_PPDSDR_D	(MCF_IPSBAR + 0x0010002B)</div><div class='add'>+#define MCFGPIO_PPDSDR_E	(MCF_IPSBAR + 0x0010002C)</div><div class='add'>+#define MCFGPIO_PPDSDR_F	(MCF_IPSBAR + 0x0010002D)</div><div class='add'>+#define MCFGPIO_PPDSDR_G	(MCF_IPSBAR + 0x0010002E)</div><div class='add'>+#define MCFGPIO_PPDSDR_H	(MCF_IPSBAR + 0x0010002F)</div><div class='add'>+#define MCFGPIO_PPDSDR_J	(MCF_IPSBAR + 0x00100030)</div><div class='add'>+#define MCFGPIO_PPDSDR_DD	(MCF_IPSBAR + 0x00100031)</div><div class='add'>+#define MCFGPIO_PPDSDR_EH	(MCF_IPSBAR + 0x00100032)</div><div class='add'>+#define MCFGPIO_PPDSDR_EL	(MCF_IPSBAR + 0x00100033)</div><div class='add'>+#define MCFGPIO_PPDSDR_AS	(MCF_IPSBAR + 0x00100034)</div><div class='add'>+#define MCFGPIO_PPDSDR_QS	(MCF_IPSBAR + 0x00100035)</div><div class='add'>+#define MCFGPIO_PPDSDR_SD	(MCF_IPSBAR + 0x00100036)</div><div class='add'>+#define MCFGPIO_PPDSDR_TC	(MCF_IPSBAR + 0x00100037)</div><div class='add'>+#define MCFGPIO_PPDSDR_TD	(MCF_IPSBAR + 0x00100038)</div><div class='add'>+#define MCFGPIO_PPDSDR_UA	(MCF_IPSBAR + 0x00100039)</div><div class='add'>+</div><div class='add'>+#define MCFGPIO_PCLRR_A		(MCF_IPSBAR + 0x0010003C)</div><div class='add'>+#define MCFGPIO_PCLRR_B		(MCF_IPSBAR + 0x0010003D)</div><div class='add'>+#define MCFGPIO_PCLRR_C		(MCF_IPSBAR + 0x0010003E)</div><div class='add'>+#define MCFGPIO_PCLRR_D		(MCF_IPSBAR + 0x0010003F)</div><div class='add'>+#define MCFGPIO_PCLRR_E		(MCF_IPSBAR + 0x00100040)</div><div class='add'>+#define MCFGPIO_PCLRR_F		(MCF_IPSBAR + 0x00100041)</div><div class='add'>+#define MCFGPIO_PCLRR_G		(MCF_IPSBAR + 0x00100042)</div><div class='add'>+#define MCFGPIO_PCLRR_H		(MCF_IPSBAR + 0x00100043)</div><div class='add'>+#define MCFGPIO_PCLRR_J		(MCF_IPSBAR + 0x00100044)</div><div class='add'>+#define MCFGPIO_PCLRR_DD	(MCF_IPSBAR + 0x00100045)</div><div class='add'>+#define MCFGPIO_PCLRR_EH	(MCF_IPSBAR + 0x00100046)</div><div class='add'>+#define MCFGPIO_PCLRR_EL	(MCF_IPSBAR + 0x00100047)</div><div class='add'>+#define MCFGPIO_PCLRR_AS	(MCF_IPSBAR + 0x00100048)</div><div class='add'>+#define MCFGPIO_PCLRR_QS	(MCF_IPSBAR + 0x00100049)</div><div class='add'>+#define MCFGPIO_PCLRR_SD	(MCF_IPSBAR + 0x0010004A)</div><div class='add'>+#define MCFGPIO_PCLRR_TC	(MCF_IPSBAR + 0x0010004B)</div><div class='add'>+#define MCFGPIO_PCLRR_TD	(MCF_IPSBAR + 0x0010004C)</div><div class='add'>+#define MCFGPIO_PCLRR_UA	(MCF_IPSBAR + 0x0010004D)</div><div class='ctx'> </div><div class='ctx'> #define MCFGPIO_PBCDPAR		(MCF_IPSBAR + 0x00100050)</div><div class='ctx'> #define MCFGPIO_PFPAR		(MCF_IPSBAR + 0x00100051)</div><div class='hunk'>@@ -242,11 +223,11 @@</div><div class='ctx'>  * definitions for generic gpio support</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-#define MCFGPIO_PODR		MCFGPIO_PORTA	/* port output data */</div><div class='del'>-#define MCFGPIO_PDDR		MCFGPIO_DDRA	/* port data direction */</div><div class='del'>-#define MCFGPIO_PPDR		MCFGPIO_PORTAP	/* port pin data */</div><div class='del'>-#define MCFGPIO_SETR		MCFGPIO_SETA	/* set output */</div><div class='del'>-#define MCFGPIO_CLRR		MCFGPIO_CLRA	/* clr output */</div><div class='add'>+#define MCFGPIO_PODR		MCFGPIO_PODR_A	/* port output data */</div><div class='add'>+#define MCFGPIO_PDDR		MCFGPIO_PDDR_A	/* port data direction */</div><div class='add'>+#define MCFGPIO_PPDR		MCFGPIO_PPDSDR_A/* port pin data */</div><div class='add'>+#define MCFGPIO_SETR		MCFGPIO_PPDSDR_A/* set output */</div><div class='add'>+#define MCFGPIO_CLRR		MCFGPIO_PCLRR_A	/* clr output */</div><div class='ctx'> </div><div class='ctx'> #define MCFGPIO_IRQ_MAX		8</div><div class='ctx'> #define MCFGPIO_IRQ_VECBASE	MCFINT_VECBASE</div><div class='head'>diff --git a/arch/m68k/include/asm/mcfgpio.h b/arch/m68k/include/asm/mcfgpio.h<br/>index ee5e4ccce89e..fe468eaa51e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/mcfgpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/include/asm/mcfgpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/mcfgpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/mcfgpio.h</a></div><div class='hunk'>@@ -29,6 +29,9 @@ struct mcf_gpio_chip {</div><div class='ctx'> 	const u8 *gpio_to_pinmux;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+extern struct mcf_gpio_chip mcf_gpio_chips[];</div><div class='add'>+extern unsigned int mcf_gpio_chips_size;</div><div class='add'>+</div><div class='ctx'> int mcf_gpio_direction_input(struct gpio_chip *, unsigned);</div><div class='ctx'> int mcf_gpio_get_value(struct gpio_chip *, unsigned);</div><div class='ctx'> int mcf_gpio_direction_output(struct gpio_chip *, unsigned, int);</div><div class='hunk'>@@ -37,4 +40,58 @@ void mcf_gpio_set_value_fast(struct gpio_chip *, unsigned, int);</div><div class='ctx'> int mcf_gpio_request(struct gpio_chip *, unsigned);</div><div class='ctx'> void mcf_gpio_free(struct gpio_chip *, unsigned);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ *	Define macros to ease the pain of setting up the GPIO tables. There</div><div class='add'>+ *	are two cases we need to deal with here, they cover all currently</div><div class='add'>+ *	available ColdFire GPIO hardware. There are of course minor differences</div><div class='add'>+ *	in the layout and number of bits in each ColdFire part, but the macros</div><div class='add'>+ *	take all that in.</div><div class='add'>+ *</div><div class='add'>+ *	Firstly is the conventional GPIO registers where we toggle individual</div><div class='add'>+ *	bits in a register, preserving the other bits in the register. For</div><div class='add'>+ *	lack of a better term I have called this the slow method.</div><div class='add'>+ */</div><div class='add'>+#define	MCFGPS(mlabel, mbase, mngpio, mpddr, mpodr, mppdr)		    \</div><div class='add'>+	{								    \</div><div class='add'>+		.gpio_chip			= {			    \</div><div class='add'>+			.label			= #mlabel,		    \</div><div class='add'>+			.request		= mcf_gpio_request,	    \</div><div class='add'>+			.free			= mcf_gpio_free,	    \</div><div class='add'>+			.direction_input	= mcf_gpio_direction_input, \</div><div class='add'>+			.direction_output	= mcf_gpio_direction_output,\</div><div class='add'>+			.get			= mcf_gpio_get_value,	    \</div><div class='add'>+			.set			= mcf_gpio_set_value,       \</div><div class='add'>+			.base			= mbase,		    \</div><div class='add'>+			.ngpio			= mngpio,		    \</div><div class='add'>+		},							    \</div><div class='add'>+		.pddr		= (void __iomem *) mpddr,		    \</div><div class='add'>+		.podr		= (void __iomem *) mpodr,		    \</div><div class='add'>+		.ppdr		= (void __iomem *) mppdr,		    \</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *	Secondly is the faster case, where we have set and clear registers</div><div class='add'>+ *	that allow us to set or clear a bit with a single write, not having</div><div class='add'>+ *	to worry about preserving other bits.</div><div class='add'>+ */</div><div class='add'>+#define	MCFGPF(mlabel, mbase, mngpio)					    \</div><div class='add'>+	{								    \</div><div class='add'>+		.gpio_chip			= {			    \</div><div class='add'>+			.label			= #mlabel,		    \</div><div class='add'>+			.request		= mcf_gpio_request,	    \</div><div class='add'>+			.free			= mcf_gpio_free,	    \</div><div class='add'>+			.direction_input	= mcf_gpio_direction_input, \</div><div class='add'>+			.direction_output	= mcf_gpio_direction_output,\</div><div class='add'>+			.get			= mcf_gpio_get_value,	    \</div><div class='add'>+			.set			= mcf_gpio_set_value_fast,  \</div><div class='add'>+			.base			= mbase,		    \</div><div class='add'>+			.ngpio			= mngpio,		    \</div><div class='add'>+		},							    \</div><div class='add'>+		.pddr		= (void __iomem *) MCFGPIO_PDDR_##mlabel,   \</div><div class='add'>+		.podr		= (void __iomem *) MCFGPIO_PODR_##mlabel,   \</div><div class='add'>+		.ppdr		= (void __iomem *) MCFGPIO_PPDSDR_##mlabel, \</div><div class='add'>+		.setr		= (void __iomem *) MCFGPIO_PPDSDR_##mlabel, \</div><div class='add'>+		.clrr		= (void __iomem *) MCFGPIO_PCLRR_##mlabel,  \</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/m68k/include/asm/posix_types.h b/arch/m68k/include/asm/posix_types.h<br/>index 6373093be72b..cf4dbf70fdc7 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/posix_types.h</a></div><div class='hunk'>@@ -10,9 +10,6 @@</div><div class='ctx'> typedef unsigned short	__kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned short	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned short	__kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h<br/>index 46460fa15d5c..f17c42aff7ff 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/processor.h</a></div><div class='hunk'>@@ -153,9 +153,6 @@ static inline void release_thread(struct task_struct *dead_task)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/m68k/include/asm/thread_info.h b/arch/m68k/include/asm/thread_info.h<br/>index e8665e6f9464..126131f94a2c 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/thread_info.h</a></div><div class='hunk'>@@ -71,6 +71,7 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'>  * bits 0-7 are tested at every exception exit</div><div class='ctx'>  * bits 8-15 are also tested at syscall exit</div><div class='ctx'>  */</div><div class='add'>+#define TIF_NOTIFY_RESUME	5	/* callback before returning to user */</div><div class='ctx'> #define TIF_SIGPENDING		6	/* signal pending */</div><div class='ctx'> #define TIF_NEED_RESCHED	7	/* rescheduling necessary */</div><div class='ctx'> #define TIF_DELAYED_TRACE	14	/* single step a syscall */</div><div class='head'>diff --git a/arch/m68k/include/asm/unaligned.h b/arch/m68k/include/asm/unaligned.h<br/>index 019caa740c21..f4043ae63db1 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/include/asm/unaligned.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/include/asm/unaligned.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/unaligned.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/unaligned.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #define _ASM_M68K_UNALIGNED_H</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_COLDFIRE</div><div class='add'>+#if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68000)</div><div class='ctx'> #include &lt;linux/unaligned/be_struct.h&gt;</div><div class='ctx'> #include &lt;linux/unaligned/le_byteshift.h&gt;</div><div class='ctx'> #include &lt;linux/unaligned/generic.h&gt;</div><div class='head'>diff --git a/arch/m68k/include/asm/vga.h b/arch/m68k/include/asm/vga.h<br/>new file mode 100644<br/>index 000000000000..d3aa1401e7aa<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/m68k/include/asm/vga.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/include/asm/vga.h</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+#ifndef _ASM_M68K_VGA_H</div><div class='add'>+#define _ASM_M68K_VGA_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/raw_io.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * FIXME</div><div class='add'>+ * Ugh, we don't have PCI space, so map readb() and friends to use raw I/O</div><div class='add'>+ * accessors, which are identical to the z_*() Zorro bus accessors.</div><div class='add'>+ * This should make cirrusfb work again on Amiga</div><div class='add'>+ */</div><div class='add'>+#undef inb_p</div><div class='add'>+#undef inw_p</div><div class='add'>+#undef outb_p</div><div class='add'>+#undef outw</div><div class='add'>+#undef readb</div><div class='add'>+#undef writeb</div><div class='add'>+#undef writew</div><div class='add'>+#define inb_p(port)		0</div><div class='add'>+#define inw_p(port)		0</div><div class='add'>+#define outb_p(port, val)	do { } while (0)</div><div class='add'>+#define outw(port, val)		do { } while (0)</div><div class='add'>+#define readb			raw_inb</div><div class='add'>+#define writeb			raw_outb</div><div class='add'>+#define writew			raw_outw</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_M68K_VGA_H */</div><div class='head'>diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile<br/>index 40d29a788b05..5c7070e21eb7 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/Makefile</a></div><div class='hunk'>@@ -13,7 +13,7 @@ extra-$(CONFIG_SUN3X)	:= head.o</div><div class='ctx'> extra-$(CONFIG_SUN3)	:= sun3-head.o</div><div class='ctx'> extra-y			+= vmlinux.lds</div><div class='ctx'> </div><div class='del'>-obj-y	:= entry.o init_task.o irq.o m68k_ksyms.o module.o process.o ptrace.o</div><div class='add'>+obj-y	:= entry.o irq.o m68k_ksyms.o module.o process.o ptrace.o</div><div class='ctx'> obj-y	+= setup.o signal.o sys_m68k.o syscalltable.o time.o traps.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_MMU_MOTOROLA) += ints.o vectors.o</div><div class='head'>diff --git a/arch/m68k/kernel/dma.c b/arch/m68k/kernel/dma.c<br/>index 90e8cb726c8c..f6daf6e15d2e 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/kernel/dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/kernel/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/kernel/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/dma.c</a></div><div class='hunk'>@@ -1,5 +1,164 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file COPYING in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#undef DEBUG</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/pgalloc.h&gt;</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='del'>-#include "dma_mm.c"</div><div class='add'>+</div><div class='add'>+void *dma_alloc_coherent(struct device *dev, size_t size,</div><div class='add'>+			 dma_addr_t *handle, gfp_t flag)</div><div class='add'>+{</div><div class='add'>+	struct page *page, **map;</div><div class='add'>+	pgprot_t pgprot;</div><div class='add'>+	void *addr;</div><div class='add'>+	int i, order;</div><div class='add'>+</div><div class='add'>+	pr_debug("dma_alloc_coherent: %d,%x\n", size, flag);</div><div class='add'>+</div><div class='add'>+	size = PAGE_ALIGN(size);</div><div class='add'>+	order = get_order(size);</div><div class='add'>+</div><div class='add'>+	page = alloc_pages(flag, order);</div><div class='add'>+	if (!page)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	*handle = page_to_phys(page);</div><div class='add'>+	map = kmalloc(sizeof(struct page *) &lt;&lt; order, flag &amp; ~__GFP_DMA);</div><div class='add'>+	if (!map) {</div><div class='add'>+		__free_pages(page, order);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	split_page(page, order);</div><div class='add'>+</div><div class='add'>+	order = 1 &lt;&lt; order;</div><div class='add'>+	size &gt;&gt;= PAGE_SHIFT;</div><div class='add'>+	map[0] = page;</div><div class='add'>+	for (i = 1; i &lt; size; i++)</div><div class='add'>+		map[i] = page + i;</div><div class='add'>+	for (; i &lt; order; i++)</div><div class='add'>+		__free_page(page + i);</div><div class='add'>+	pgprot = __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);</div><div class='add'>+	if (CPU_IS_040_OR_060)</div><div class='add'>+		pgprot_val(pgprot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;</div><div class='add'>+	else</div><div class='add'>+		pgprot_val(pgprot) |= _PAGE_NOCACHE030;</div><div class='add'>+	addr = vmap(map, size, VM_MAP, pgprot);</div><div class='add'>+	kfree(map);</div><div class='add'>+</div><div class='add'>+	return addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dma_free_coherent(struct device *dev, size_t size,</div><div class='add'>+		       void *addr, dma_addr_t handle)</div><div class='add'>+{</div><div class='add'>+	pr_debug("dma_free_coherent: %p, %x\n", addr, handle);</div><div class='add'>+	vfree(addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #else</div><div class='del'>-#include "dma_no.c"</div><div class='del'>-#endif</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+</div><div class='add'>+void *dma_alloc_coherent(struct device *dev, size_t size,</div><div class='add'>+			   dma_addr_t *dma_handle, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	void *ret;</div><div class='add'>+	/* ignore region specifiers */</div><div class='add'>+	gfp &amp;= ~(__GFP_DMA | __GFP_HIGHMEM);</div><div class='add'>+</div><div class='add'>+	if (dev == NULL || (*dev-&gt;dma_mask &lt; 0xffffffff))</div><div class='add'>+		gfp |= GFP_DMA;</div><div class='add'>+	ret = (void *)__get_free_pages(gfp, get_order(size));</div><div class='add'>+</div><div class='add'>+	if (ret != NULL) {</div><div class='add'>+		memset(ret, 0, size);</div><div class='add'>+		*dma_handle = virt_to_phys(ret);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dma_free_coherent(struct device *dev, size_t size,</div><div class='add'>+			 void *vaddr, dma_addr_t dma_handle)</div><div class='add'>+{</div><div class='add'>+	free_pages((unsigned long)vaddr, get_order(size));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_MMU */</div><div class='add'>+</div><div class='add'>+EXPORT_SYMBOL(dma_alloc_coherent);</div><div class='add'>+EXPORT_SYMBOL(dma_free_coherent);</div><div class='add'>+</div><div class='add'>+void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,</div><div class='add'>+				size_t size, enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	switch (dir) {</div><div class='add'>+	case DMA_TO_DEVICE:</div><div class='add'>+		cache_push(handle, size);</div><div class='add'>+		break;</div><div class='add'>+	case DMA_FROM_DEVICE:</div><div class='add'>+		cache_clear(handle, size);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		if (printk_ratelimit())</div><div class='add'>+			printk("dma_sync_single_for_device: unsupported dir %u\n", dir);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(dma_sync_single_for_device);</div><div class='add'>+</div><div class='add'>+void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,</div><div class='add'>+			    enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nents; sg++, i++)</div><div class='add'>+		dma_sync_single_for_device(dev, sg-&gt;dma_address, sg-&gt;length, dir);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(dma_sync_sg_for_device);</div><div class='add'>+</div><div class='add'>+dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,</div><div class='add'>+			  enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	dma_addr_t handle = virt_to_bus(addr);</div><div class='add'>+</div><div class='add'>+	dma_sync_single_for_device(dev, handle, size, dir);</div><div class='add'>+	return handle;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(dma_map_single);</div><div class='add'>+</div><div class='add'>+dma_addr_t dma_map_page(struct device *dev, struct page *page,</div><div class='add'>+			unsigned long offset, size_t size,</div><div class='add'>+			enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	dma_addr_t handle = page_to_phys(page) + offset;</div><div class='add'>+</div><div class='add'>+	dma_sync_single_for_device(dev, handle, size, dir);</div><div class='add'>+	return handle;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(dma_map_page);</div><div class='add'>+</div><div class='add'>+int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='add'>+	       enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nents; sg++, i++) {</div><div class='add'>+		sg-&gt;dma_address = sg_phys(sg);</div><div class='add'>+		dma_sync_single_for_device(dev, sg-&gt;dma_address, sg-&gt;length, dir);</div><div class='add'>+	}</div><div class='add'>+	return nents;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(dma_map_sg);</div><div class='head'>diff --git a/arch/m68k/kernel/dma_mm.c b/arch/m68k/kernel/dma_mm.c<br/>deleted file mode 100644<br/>index a3c471b523f2..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/kernel/dma_mm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/kernel/dma_mm.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,131 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License.  See the file COPYING in the main directory of this archive</div><div class='del'>- * for more details.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#undef DEBUG</div><div class='del'>-</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/scatterlist.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/pgalloc.h&gt;</div><div class='del'>-</div><div class='del'>-void *dma_alloc_coherent(struct device *dev, size_t size,</div><div class='del'>-			 dma_addr_t *handle, gfp_t flag)</div><div class='del'>-{</div><div class='del'>-	struct page *page, **map;</div><div class='del'>-	pgprot_t pgprot;</div><div class='del'>-	void *addr;</div><div class='del'>-	int i, order;</div><div class='del'>-</div><div class='del'>-	pr_debug("dma_alloc_coherent: %d,%x\n", size, flag);</div><div class='del'>-</div><div class='del'>-	size = PAGE_ALIGN(size);</div><div class='del'>-	order = get_order(size);</div><div class='del'>-</div><div class='del'>-	page = alloc_pages(flag, order);</div><div class='del'>-	if (!page)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	*handle = page_to_phys(page);</div><div class='del'>-	map = kmalloc(sizeof(struct page *) &lt;&lt; order, flag &amp; ~__GFP_DMA);</div><div class='del'>-	if (!map) {</div><div class='del'>-		__free_pages(page, order);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-	split_page(page, order);</div><div class='del'>-</div><div class='del'>-	order = 1 &lt;&lt; order;</div><div class='del'>-	size &gt;&gt;= PAGE_SHIFT;</div><div class='del'>-	map[0] = page;</div><div class='del'>-	for (i = 1; i &lt; size; i++)</div><div class='del'>-		map[i] = page + i;</div><div class='del'>-	for (; i &lt; order; i++)</div><div class='del'>-		__free_page(page + i);</div><div class='del'>-	pgprot = __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);</div><div class='del'>-	if (CPU_IS_040_OR_060)</div><div class='del'>-		pgprot_val(pgprot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;</div><div class='del'>-	else</div><div class='del'>-		pgprot_val(pgprot) |= _PAGE_NOCACHE030;</div><div class='del'>-	addr = vmap(map, size, VM_MAP, pgprot);</div><div class='del'>-	kfree(map);</div><div class='del'>-</div><div class='del'>-	return addr;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_alloc_coherent);</div><div class='del'>-</div><div class='del'>-void dma_free_coherent(struct device *dev, size_t size,</div><div class='del'>-		       void *addr, dma_addr_t handle)</div><div class='del'>-{</div><div class='del'>-	pr_debug("dma_free_coherent: %p, %x\n", addr, handle);</div><div class='del'>-	vfree(addr);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_free_coherent);</div><div class='del'>-</div><div class='del'>-void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,</div><div class='del'>-				size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	switch (dir) {</div><div class='del'>-	case DMA_TO_DEVICE:</div><div class='del'>-		cache_push(handle, size);</div><div class='del'>-		break;</div><div class='del'>-	case DMA_FROM_DEVICE:</div><div class='del'>-		cache_clear(handle, size);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		if (printk_ratelimit())</div><div class='del'>-			printk("dma_sync_single_for_device: unsupported dir %u\n", dir);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_sync_single_for_device);</div><div class='del'>-</div><div class='del'>-void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,</div><div class='del'>-			    enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; nents; sg++, i++)</div><div class='del'>-		dma_sync_single_for_device(dev, sg-&gt;dma_address, sg-&gt;length, dir);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_sync_sg_for_device);</div><div class='del'>-</div><div class='del'>-dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,</div><div class='del'>-			  enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	dma_addr_t handle = virt_to_bus(addr);</div><div class='del'>-</div><div class='del'>-	dma_sync_single_for_device(dev, handle, size, dir);</div><div class='del'>-	return handle;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_map_single);</div><div class='del'>-</div><div class='del'>-dma_addr_t dma_map_page(struct device *dev, struct page *page,</div><div class='del'>-			unsigned long offset, size_t size,</div><div class='del'>-			enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	dma_addr_t handle = page_to_phys(page) + offset;</div><div class='del'>-</div><div class='del'>-	dma_sync_single_for_device(dev, handle, size, dir);</div><div class='del'>-	return handle;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_map_page);</div><div class='del'>-</div><div class='del'>-int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,</div><div class='del'>-	       enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; nents; sg++, i++) {</div><div class='del'>-		sg-&gt;dma_address = sg_phys(sg);</div><div class='del'>-		dma_sync_single_for_device(dev, sg-&gt;dma_address, sg-&gt;length, dir);</div><div class='del'>-	}</div><div class='del'>-	return nents;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_map_sg);</div><div class='head'>diff --git a/arch/m68k/kernel/dma_no.c b/arch/m68k/kernel/dma_no.c<br/>deleted file mode 100644<br/>index f1dc3fc71bc2..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/kernel/dma_no.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/kernel/dma_no.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,75 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Dynamic DMA mapping support.</div><div class='del'>- *</div><div class='del'>- * We never have any address translations to worry about, so this</div><div class='del'>- * is just alloc/free.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/gfp.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;asm/cacheflush.h&gt;</div><div class='del'>-</div><div class='del'>-void *dma_alloc_coherent(struct device *dev, size_t size,</div><div class='del'>-			   dma_addr_t *dma_handle, gfp_t gfp)</div><div class='del'>-{</div><div class='del'>-	void *ret;</div><div class='del'>-	/* ignore region specifiers */</div><div class='del'>-	gfp &amp;= ~(__GFP_DMA | __GFP_HIGHMEM);</div><div class='del'>-</div><div class='del'>-	if (dev == NULL || (*dev-&gt;dma_mask &lt; 0xffffffff))</div><div class='del'>-		gfp |= GFP_DMA;</div><div class='del'>-	ret = (void *)__get_free_pages(gfp, get_order(size));</div><div class='del'>-</div><div class='del'>-	if (ret != NULL) {</div><div class='del'>-		memset(ret, 0, size);</div><div class='del'>-		*dma_handle = virt_to_phys(ret);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void dma_free_coherent(struct device *dev, size_t size,</div><div class='del'>-			 void *vaddr, dma_addr_t dma_handle)</div><div class='del'>-{</div><div class='del'>-	free_pages((unsigned long)vaddr, get_order(size));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,</div><div class='del'>-				size_t size, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	switch (dir) {</div><div class='del'>-	case DMA_TO_DEVICE:</div><div class='del'>-		flush_dcache_range(handle, size);</div><div class='del'>-		break;</div><div class='del'>-	case DMA_FROM_DEVICE:</div><div class='del'>-		/* Should be clear already */</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		if (printk_ratelimit())</div><div class='del'>-			printk("dma_sync_single_for_device: unsupported dir %u\n", dir);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(dma_sync_single_for_device);</div><div class='del'>-dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,</div><div class='del'>-			  enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	dma_addr_t handle = virt_to_phys(addr);</div><div class='del'>-	flush_dcache_range(handle, size);</div><div class='del'>-	return handle;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_map_single);</div><div class='del'>-</div><div class='del'>-dma_addr_t dma_map_page(struct device *dev, struct page *page,</div><div class='del'>-			unsigned long offset, size_t size,</div><div class='del'>-			enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	dma_addr_t handle = page_to_phys(page) + offset;</div><div class='del'>-	dma_sync_single_for_device(dev, handle, size, dir);</div><div class='del'>-	return handle;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(dma_map_page);</div><div class='head'>diff --git a/arch/m68k/kernel/entry_mm.S b/arch/m68k/kernel/entry_mm.S<br/>index 675a854966a6..f29e73ca9dbb 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/kernel/entry_mm.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/kernel/entry_mm.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/kernel/entry_mm.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/entry_mm.S</a></div><div class='hunk'>@@ -148,7 +148,7 @@ syscall_exit_work:</div><div class='ctx'> 	jcs	do_trace_exit</div><div class='ctx'> 	jmi	do_delayed_trace</div><div class='ctx'> 	lslw	#8,%d0</div><div class='del'>-	jmi	do_signal_return</div><div class='add'>+	jne	do_signal_return</div><div class='ctx'> 	pea	resume_userspace</div><div class='ctx'> 	jra	schedule</div><div class='ctx'> </div><div class='hunk'>@@ -172,7 +172,7 @@ exit_work:</div><div class='ctx'> 	| save top of frame</div><div class='ctx'> 	movel	%sp,%curptr@(TASK_THREAD+THREAD_ESP0)</div><div class='ctx'> 	lslb	#1,%d0</div><div class='del'>-	jmi	do_signal_return</div><div class='add'>+	jne	do_signal_return</div><div class='ctx'> 	pea	resume_userspace</div><div class='ctx'> 	jra	schedule</div><div class='ctx'> </div><div class='hunk'>@@ -182,7 +182,7 @@ do_signal_return:</div><div class='ctx'> 	subql	#4,%sp			| dummy return address</div><div class='ctx'> 	SAVE_SWITCH_STACK</div><div class='ctx'> 	pea	%sp@(SWITCH_STACK_SIZE)</div><div class='del'>-	bsrl	do_signal</div><div class='add'>+	bsrl	do_notify_resume</div><div class='ctx'> 	addql	#4,%sp</div><div class='ctx'> 	RESTORE_SWITCH_STACK</div><div class='ctx'> 	addql	#4,%sp</div><div class='head'>diff --git a/arch/m68k/kernel/init_task.c b/arch/m68k/kernel/init_task.c<br/>deleted file mode 100644<br/>index c744cfc6bfa1..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/m68knommu/kernel/init_task.c</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is THREAD size aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='head'>diff --git a/arch/m68k/kernel/signal.c b/arch/m68k/kernel/signal.c<br/>index 2e25713e2ead..710a528b928b 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/kernel/signal.c</a></div><div class='hunk'>@@ -1,5 +1,1184 @@</div><div class='add'>+/*</div><div class='add'>+ *  linux/arch/m68k/kernel/signal.c</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 1991, 1992  Linus Torvalds</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file COPYING in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Linux/m68k support by Hamish Macdonald</div><div class='add'>+ *</div><div class='add'>+ * 68060 fixes by Jesper Skov</div><div class='add'>+ *</div><div class='add'>+ * 1997-12-01  Modified for POSIX.1b signals by Andreas Schwab</div><div class='add'>+ *</div><div class='add'>+ * mathemu support by Roman Zippel</div><div class='add'>+ *  (Note: fpstate in the signal context is completely ignored for the emulator</div><div class='add'>+ *         and the internal floating point format is put on stack)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ++roman (07/09/96): implemented signal stacks (specially for tosemu on</div><div class='add'>+ * Atari :-) Current limitation: Only one sigstack can be active at one time.</div><div class='add'>+ * If a second signal with SA_ONSTACK set arrives while working on a sigstack,</div><div class='add'>+ * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested</div><div class='add'>+ * signal handlers!</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/syscalls.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/wait.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='add'>+#include &lt;linux/unistd.h&gt;</div><div class='add'>+#include &lt;linux/stddef.h&gt;</div><div class='add'>+#include &lt;linux/highuid.h&gt;</div><div class='add'>+#include &lt;linux/personality.h&gt;</div><div class='add'>+#include &lt;linux/tty.h&gt;</div><div class='add'>+#include &lt;linux/binfmts.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/tracehook.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/pgtable.h&gt;</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='add'>+#include &lt;asm/ucontext.h&gt;</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='del'>-#include "signal_mm.c"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Handle the slight differences in classic 68k and ColdFire trap frames.</div><div class='add'>+ */</div><div class='add'>+#ifdef CONFIG_COLDFIRE</div><div class='add'>+#define	FORMAT		4</div><div class='add'>+#define	FMT4SIZE	0</div><div class='ctx'> #else</div><div class='del'>-#include "signal_no.c"</div><div class='add'>+#define	FORMAT		0</div><div class='add'>+#define	FMT4SIZE	sizeof(((struct frame *)0)-&gt;un.fmt4)</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+static const int frame_size_change[16] = {</div><div class='add'>+  [1]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmt1), */</div><div class='add'>+  [2]	= sizeof(((struct frame *)0)-&gt;un.fmt2),</div><div class='add'>+  [3]	= sizeof(((struct frame *)0)-&gt;un.fmt3),</div><div class='add'>+  [4]	= FMT4SIZE,</div><div class='add'>+  [5]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmt5), */</div><div class='add'>+  [6]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmt6), */</div><div class='add'>+  [7]	= sizeof(((struct frame *)0)-&gt;un.fmt7),</div><div class='add'>+  [8]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmt8), */</div><div class='add'>+  [9]	= sizeof(((struct frame *)0)-&gt;un.fmt9),</div><div class='add'>+  [10]	= sizeof(((struct frame *)0)-&gt;un.fmta),</div><div class='add'>+  [11]	= sizeof(((struct frame *)0)-&gt;un.fmtb),</div><div class='add'>+  [12]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmtc), */</div><div class='add'>+  [13]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmtd), */</div><div class='add'>+  [14]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmte), */</div><div class='add'>+  [15]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmtf), */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline int frame_extra_sizes(int f)</div><div class='add'>+{</div><div class='add'>+	return frame_size_change[f];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int handle_kernel_fault(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	const struct exception_table_entry *fixup;</div><div class='add'>+	struct pt_regs *tregs;</div><div class='add'>+</div><div class='add'>+	/* Are we prepared to handle this kernel fault? */</div><div class='add'>+	fixup = search_exception_tables(regs-&gt;pc);</div><div class='add'>+	if (!fixup)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Create a new four word stack frame, discarding the old one. */</div><div class='add'>+	regs-&gt;stkadj = frame_extra_sizes(regs-&gt;format);</div><div class='add'>+	tregs =	(struct pt_regs *)((long)regs + regs-&gt;stkadj);</div><div class='add'>+	tregs-&gt;vector = regs-&gt;vector;</div><div class='add'>+	tregs-&gt;format = FORMAT;</div><div class='add'>+	tregs-&gt;pc = fixup-&gt;fixup;</div><div class='add'>+	tregs-&gt;sr = regs-&gt;sr;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)</div><div class='add'>+{</div><div class='add'>+	if (regs-&gt;orig_d0 &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+	switch (regs-&gt;d0) {</div><div class='add'>+	case -ERESTARTNOHAND:</div><div class='add'>+	case -ERESTARTSYS:</div><div class='add'>+	case -ERESTARTNOINTR:</div><div class='add'>+		regs-&gt;d0 = regs-&gt;orig_d0;</div><div class='add'>+		regs-&gt;orig_d0 = -1;</div><div class='add'>+		regs-&gt;pc -= 2;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void push_cache (unsigned long vaddr)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Using the old cache_push_v() was really a big waste.</div><div class='add'>+	 *</div><div class='add'>+	 * What we are trying to do is to flush 8 bytes to ram.</div><div class='add'>+	 * Flushing 2 cache lines of 16 bytes is much cheaper than</div><div class='add'>+	 * flushing 1 or 2 pages, as previously done in</div><div class='add'>+	 * cache_push_v().</div><div class='add'>+	 *                                                     Jes</div><div class='add'>+	 */</div><div class='add'>+	if (CPU_IS_040) {</div><div class='add'>+		unsigned long temp;</div><div class='add'>+</div><div class='add'>+		__asm__ __volatile__ (".chip 68040\n\t"</div><div class='add'>+				      "nop\n\t"</div><div class='add'>+				      "ptestr (%1)\n\t"</div><div class='add'>+				      "movec %%mmusr,%0\n\t"</div><div class='add'>+				      ".chip 68k"</div><div class='add'>+				      : "=r" (temp)</div><div class='add'>+				      : "a" (vaddr));</div><div class='add'>+</div><div class='add'>+		temp &amp;= PAGE_MASK;</div><div class='add'>+		temp |= vaddr &amp; ~PAGE_MASK;</div><div class='add'>+</div><div class='add'>+		__asm__ __volatile__ (".chip 68040\n\t"</div><div class='add'>+				      "nop\n\t"</div><div class='add'>+				      "cpushl %%bc,(%0)\n\t"</div><div class='add'>+				      ".chip 68k"</div><div class='add'>+				      : : "a" (temp));</div><div class='add'>+	}</div><div class='add'>+	else if (CPU_IS_060) {</div><div class='add'>+		unsigned long temp;</div><div class='add'>+		__asm__ __volatile__ (".chip 68060\n\t"</div><div class='add'>+				      "plpar (%0)\n\t"</div><div class='add'>+				      ".chip 68k"</div><div class='add'>+				      : "=a" (temp)</div><div class='add'>+				      : "0" (vaddr));</div><div class='add'>+		__asm__ __volatile__ (".chip 68060\n\t"</div><div class='add'>+				      "cpushl %%bc,(%0)\n\t"</div><div class='add'>+				      ".chip 68k"</div><div class='add'>+				      : : "a" (temp));</div><div class='add'>+	} else if (!CPU_IS_COLDFIRE) {</div><div class='add'>+		/*</div><div class='add'>+		 * 68030/68020 have no writeback cache;</div><div class='add'>+		 * still need to clear icache.</div><div class='add'>+		 * Note that vaddr is guaranteed to be long word aligned.</div><div class='add'>+		 */</div><div class='add'>+		unsigned long temp;</div><div class='add'>+		asm volatile ("movec %%cacr,%0" : "=r" (temp));</div><div class='add'>+		temp += 4;</div><div class='add'>+		asm volatile ("movec %0,%%caar\n\t"</div><div class='add'>+			      "movec %1,%%cacr"</div><div class='add'>+			      : : "r" (vaddr), "r" (temp));</div><div class='add'>+		asm volatile ("movec %0,%%caar\n\t"</div><div class='add'>+			      "movec %1,%%cacr"</div><div class='add'>+			      : : "r" (vaddr + 4), "r" (temp));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void adjustformat(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void save_a5_state(struct sigcontext *sc, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else /* CONFIG_MMU */</div><div class='add'>+</div><div class='add'>+void ret_from_user_signal(void);</div><div class='add'>+void ret_from_user_rt_signal(void);</div><div class='add'>+</div><div class='add'>+static inline int frame_extra_sizes(int f)</div><div class='add'>+{</div><div class='add'>+	/* No frame size adjustments required on non-MMU CPUs */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void adjustformat(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	((struct switch_stack *)regs - 1)-&gt;a5 = current-&gt;mm-&gt;start_data;</div><div class='add'>+	/*</div><div class='add'>+	 * set format byte to make stack appear modulo 4, which it will</div><div class='add'>+	 * be when doing the rte</div><div class='add'>+	 */</div><div class='add'>+	regs-&gt;format = 0x4;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void save_a5_state(struct sigcontext *sc, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	sc-&gt;sc_a5 = ((struct switch_stack *)regs - 1)-&gt;a5;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void push_cache(unsigned long vaddr)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_MMU */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Atomically swap in the new signal mask, and wait for a signal.</div><div class='add'>+ */</div><div class='add'>+asmlinkage int</div><div class='add'>+sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)</div><div class='add'>+{</div><div class='add'>+	sigset_t blocked;</div><div class='add'>+	siginitset(&amp;blocked, mask);</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage int</div><div class='add'>+sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='add'>+	      struct old_sigaction __user *oact)</div><div class='add'>+{</div><div class='add'>+	struct k_sigaction new_ka, old_ka;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (act) {</div><div class='add'>+		old_sigset_t mask;</div><div class='add'>+		if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='add'>+		    __get_user(new_ka.sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='add'>+		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='add'>+		    __get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='add'>+		    __get_user(mask, &amp;act-&gt;sa_mask))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		siginitset(&amp;new_ka.sa.sa_mask, mask);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = do_sigaction(sig, act ? &amp;new_ka : NULL, oact ? &amp;old_ka : NULL);</div><div class='add'>+</div><div class='add'>+	if (!ret &amp;&amp; oact) {</div><div class='add'>+		if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_handler, &amp;oact-&gt;sa_handler) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage int</div><div class='add'>+sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)</div><div class='add'>+{</div><div class='add'>+	return do_sigaltstack(uss, uoss, rdusp());</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Do a signal return; undo the signal stack.</div><div class='add'>+ *</div><div class='add'>+ * Keep the return code on the stack quadword aligned!</div><div class='add'>+ * That makes the cache flush below easier.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct sigframe</div><div class='add'>+{</div><div class='add'>+	char __user *pretcode;</div><div class='add'>+	int sig;</div><div class='add'>+	int code;</div><div class='add'>+	struct sigcontext __user *psc;</div><div class='add'>+	char retcode[8];</div><div class='add'>+	unsigned long extramask[_NSIG_WORDS-1];</div><div class='add'>+	struct sigcontext sc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rt_sigframe</div><div class='add'>+{</div><div class='add'>+	char __user *pretcode;</div><div class='add'>+	int sig;</div><div class='add'>+	struct siginfo __user *pinfo;</div><div class='add'>+	void __user *puc;</div><div class='add'>+	char retcode[8];</div><div class='add'>+	struct siginfo info;</div><div class='add'>+	struct ucontext uc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FPCONTEXT_SIZE	216</div><div class='add'>+#define uc_fpstate	uc_filler[0]</div><div class='add'>+#define uc_formatvec	uc_filler[FPCONTEXT_SIZE/4]</div><div class='add'>+#define uc_extra	uc_filler[FPCONTEXT_SIZE/4+1]</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_FPU</div><div class='add'>+</div><div class='add'>+static unsigned char fpu_version;	/* version number of fpu, set by setup_frame */</div><div class='add'>+</div><div class='add'>+static inline int restore_fpu_state(struct sigcontext *sc)</div><div class='add'>+{</div><div class='add'>+	int err = 1;</div><div class='add'>+</div><div class='add'>+	if (FPU_IS_EMU) {</div><div class='add'>+	    /* restore registers */</div><div class='add'>+	    memcpy(current-&gt;thread.fpcntl, sc-&gt;sc_fpcntl, 12);</div><div class='add'>+	    memcpy(current-&gt;thread.fp, sc-&gt;sc_fpregs, 24);</div><div class='add'>+	    return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (CPU_IS_060 ? sc-&gt;sc_fpstate[2] : sc-&gt;sc_fpstate[0]) {</div><div class='add'>+	    /* Verify the frame format.  */</div><div class='add'>+	    if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &amp;&amp;</div><div class='add'>+		 (sc-&gt;sc_fpstate[0] != fpu_version))</div><div class='add'>+		goto out;</div><div class='add'>+	    if (CPU_IS_020_OR_030) {</div><div class='add'>+		if (m68k_fputype &amp; FPU_68881 &amp;&amp;</div><div class='add'>+		    !(sc-&gt;sc_fpstate[1] == 0x18 || sc-&gt;sc_fpstate[1] == 0xb4))</div><div class='add'>+		    goto out;</div><div class='add'>+		if (m68k_fputype &amp; FPU_68882 &amp;&amp;</div><div class='add'>+		    !(sc-&gt;sc_fpstate[1] == 0x38 || sc-&gt;sc_fpstate[1] == 0xd4))</div><div class='add'>+		    goto out;</div><div class='add'>+	    } else if (CPU_IS_040) {</div><div class='add'>+		if (!(sc-&gt;sc_fpstate[1] == 0x00 ||</div><div class='add'>+                      sc-&gt;sc_fpstate[1] == 0x28 ||</div><div class='add'>+                      sc-&gt;sc_fpstate[1] == 0x60))</div><div class='add'>+		    goto out;</div><div class='add'>+	    } else if (CPU_IS_060) {</div><div class='add'>+		if (!(sc-&gt;sc_fpstate[3] == 0x00 ||</div><div class='add'>+                      sc-&gt;sc_fpstate[3] == 0x60 ||</div><div class='add'>+		      sc-&gt;sc_fpstate[3] == 0xe0))</div><div class='add'>+		    goto out;</div><div class='add'>+	    } else if (CPU_IS_COLDFIRE) {</div><div class='add'>+		if (!(sc-&gt;sc_fpstate[0] == 0x00 ||</div><div class='add'>+		      sc-&gt;sc_fpstate[0] == 0x05 ||</div><div class='add'>+		      sc-&gt;sc_fpstate[0] == 0xe5))</div><div class='add'>+		    goto out;</div><div class='add'>+	    } else</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	    if (CPU_IS_COLDFIRE) {</div><div class='add'>+		__asm__ volatile ("fmovemd %0,%%fp0-%%fp1\n\t"</div><div class='add'>+				  "fmovel %1,%%fpcr\n\t"</div><div class='add'>+				  "fmovel %2,%%fpsr\n\t"</div><div class='add'>+				  "fmovel %3,%%fpiar"</div><div class='add'>+				  : /* no outputs */</div><div class='add'>+				  : "m" (sc-&gt;sc_fpregs[0]),</div><div class='add'>+				    "m" (sc-&gt;sc_fpcntl[0]),</div><div class='add'>+				    "m" (sc-&gt;sc_fpcntl[1]),</div><div class='add'>+				    "m" (sc-&gt;sc_fpcntl[2]));</div><div class='add'>+	    } else {</div><div class='add'>+		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='add'>+				  "fmovemx %0,%%fp0-%%fp1\n\t"</div><div class='add'>+				  "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"</div><div class='add'>+				  ".chip 68k"</div><div class='add'>+				  : /* no outputs */</div><div class='add'>+				  : "m" (*sc-&gt;sc_fpregs),</div><div class='add'>+				    "m" (*sc-&gt;sc_fpcntl));</div><div class='add'>+	    }</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (CPU_IS_COLDFIRE) {</div><div class='add'>+		__asm__ volatile ("frestore %0" : : "m" (*sc-&gt;sc_fpstate));</div><div class='add'>+	} else {</div><div class='add'>+		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='add'>+				  "frestore %0\n\t"</div><div class='add'>+				  ".chip 68k"</div><div class='add'>+				  : : "m" (*sc-&gt;sc_fpstate));</div><div class='add'>+	}</div><div class='add'>+	err = 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int rt_restore_fpu_state(struct ucontext __user *uc)</div><div class='add'>+{</div><div class='add'>+	unsigned char fpstate[FPCONTEXT_SIZE];</div><div class='add'>+	int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);</div><div class='add'>+	fpregset_t fpregs;</div><div class='add'>+	int err = 1;</div><div class='add'>+</div><div class='add'>+	if (FPU_IS_EMU) {</div><div class='add'>+		/* restore fpu control register */</div><div class='add'>+		if (__copy_from_user(current-&gt;thread.fpcntl,</div><div class='add'>+				uc-&gt;uc_mcontext.fpregs.f_fpcntl, 12))</div><div class='add'>+			goto out;</div><div class='add'>+		/* restore all other fpu register */</div><div class='add'>+		if (__copy_from_user(current-&gt;thread.fp,</div><div class='add'>+				uc-&gt;uc_mcontext.fpregs.f_fpregs, 96))</div><div class='add'>+			goto out;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (__get_user(*(long *)fpstate, (long __user *)&amp;uc-&gt;uc_fpstate))</div><div class='add'>+		goto out;</div><div class='add'>+	if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {</div><div class='add'>+		if (!(CPU_IS_060 || CPU_IS_COLDFIRE))</div><div class='add'>+			context_size = fpstate[1];</div><div class='add'>+		/* Verify the frame format.  */</div><div class='add'>+		if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &amp;&amp;</div><div class='add'>+		     (fpstate[0] != fpu_version))</div><div class='add'>+			goto out;</div><div class='add'>+		if (CPU_IS_020_OR_030) {</div><div class='add'>+			if (m68k_fputype &amp; FPU_68881 &amp;&amp;</div><div class='add'>+			    !(context_size == 0x18 || context_size == 0xb4))</div><div class='add'>+				goto out;</div><div class='add'>+			if (m68k_fputype &amp; FPU_68882 &amp;&amp;</div><div class='add'>+			    !(context_size == 0x38 || context_size == 0xd4))</div><div class='add'>+				goto out;</div><div class='add'>+		} else if (CPU_IS_040) {</div><div class='add'>+			if (!(context_size == 0x00 ||</div><div class='add'>+			      context_size == 0x28 ||</div><div class='add'>+			      context_size == 0x60))</div><div class='add'>+				goto out;</div><div class='add'>+		} else if (CPU_IS_060) {</div><div class='add'>+			if (!(fpstate[3] == 0x00 ||</div><div class='add'>+			      fpstate[3] == 0x60 ||</div><div class='add'>+			      fpstate[3] == 0xe0))</div><div class='add'>+				goto out;</div><div class='add'>+		} else if (CPU_IS_COLDFIRE) {</div><div class='add'>+			if (!(fpstate[3] == 0x00 ||</div><div class='add'>+			      fpstate[3] == 0x05 ||</div><div class='add'>+			      fpstate[3] == 0xe5))</div><div class='add'>+				goto out;</div><div class='add'>+		} else</div><div class='add'>+			goto out;</div><div class='add'>+		if (__copy_from_user(&amp;fpregs, &amp;uc-&gt;uc_mcontext.fpregs,</div><div class='add'>+				     sizeof(fpregs)))</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		if (CPU_IS_COLDFIRE) {</div><div class='add'>+			__asm__ volatile ("fmovemd %0,%%fp0-%%fp7\n\t"</div><div class='add'>+					  "fmovel %1,%%fpcr\n\t"</div><div class='add'>+					  "fmovel %2,%%fpsr\n\t"</div><div class='add'>+					  "fmovel %3,%%fpiar"</div><div class='add'>+					  : /* no outputs */</div><div class='add'>+					  : "m" (fpregs.f_fpregs[0]),</div><div class='add'>+					    "m" (fpregs.f_fpcntl[0]),</div><div class='add'>+					    "m" (fpregs.f_fpcntl[1]),</div><div class='add'>+					    "m" (fpregs.f_fpcntl[2]));</div><div class='add'>+		} else {</div><div class='add'>+			__asm__ volatile (".chip 68k/68881\n\t"</div><div class='add'>+					  "fmovemx %0,%%fp0-%%fp7\n\t"</div><div class='add'>+					  "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"</div><div class='add'>+					  ".chip 68k"</div><div class='add'>+					  : /* no outputs */</div><div class='add'>+					  : "m" (*fpregs.f_fpregs),</div><div class='add'>+					    "m" (*fpregs.f_fpcntl));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (context_size &amp;&amp;</div><div class='add'>+	    __copy_from_user(fpstate + 4, (long __user *)&amp;uc-&gt;uc_fpstate + 1,</div><div class='add'>+			     context_size))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (CPU_IS_COLDFIRE) {</div><div class='add'>+		__asm__ volatile ("frestore %0" : : "m" (*fpstate));</div><div class='add'>+	} else {</div><div class='add'>+		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='add'>+				  "frestore %0\n\t"</div><div class='add'>+				  ".chip 68k"</div><div class='add'>+				  : : "m" (*fpstate));</div><div class='add'>+	}</div><div class='add'>+	err = 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Set up a signal frame.</div><div class='add'>+ */</div><div class='add'>+static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	if (FPU_IS_EMU) {</div><div class='add'>+		/* save registers */</div><div class='add'>+		memcpy(sc-&gt;sc_fpcntl, current-&gt;thread.fpcntl, 12);</div><div class='add'>+		memcpy(sc-&gt;sc_fpregs, current-&gt;thread.fp, 24);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (CPU_IS_COLDFIRE) {</div><div class='add'>+		__asm__ volatile ("fsave %0"</div><div class='add'>+				  : : "m" (*sc-&gt;sc_fpstate) : "memory");</div><div class='add'>+	} else {</div><div class='add'>+		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='add'>+				  "fsave %0\n\t"</div><div class='add'>+				  ".chip 68k"</div><div class='add'>+				  : : "m" (*sc-&gt;sc_fpstate) : "memory");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (CPU_IS_060 ? sc-&gt;sc_fpstate[2] : sc-&gt;sc_fpstate[0]) {</div><div class='add'>+		fpu_version = sc-&gt;sc_fpstate[0];</div><div class='add'>+		if (CPU_IS_020_OR_030 &amp;&amp;</div><div class='add'>+		    regs-&gt;vector &gt;= (VEC_FPBRUC * 4) &amp;&amp;</div><div class='add'>+		    regs-&gt;vector &lt;= (VEC_FPNAN * 4)) {</div><div class='add'>+			/* Clear pending exception in 68882 idle frame */</div><div class='add'>+			if (*(unsigned short *) sc-&gt;sc_fpstate == 0x1f38)</div><div class='add'>+				sc-&gt;sc_fpstate[0x38] |= 1 &lt;&lt; 3;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (CPU_IS_COLDFIRE) {</div><div class='add'>+			__asm__ volatile ("fmovemd %%fp0-%%fp1,%0\n\t"</div><div class='add'>+					  "fmovel %%fpcr,%1\n\t"</div><div class='add'>+					  "fmovel %%fpsr,%2\n\t"</div><div class='add'>+					  "fmovel %%fpiar,%3"</div><div class='add'>+					  : "=m" (sc-&gt;sc_fpregs[0]),</div><div class='add'>+					    "=m" (sc-&gt;sc_fpcntl[0]),</div><div class='add'>+					    "=m" (sc-&gt;sc_fpcntl[1]),</div><div class='add'>+					    "=m" (sc-&gt;sc_fpcntl[2])</div><div class='add'>+					  : /* no inputs */</div><div class='add'>+					  : "memory");</div><div class='add'>+		} else {</div><div class='add'>+			__asm__ volatile (".chip 68k/68881\n\t"</div><div class='add'>+					  "fmovemx %%fp0-%%fp1,%0\n\t"</div><div class='add'>+					  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"</div><div class='add'>+					  ".chip 68k"</div><div class='add'>+					  : "=m" (*sc-&gt;sc_fpregs),</div><div class='add'>+					    "=m" (*sc-&gt;sc_fpcntl)</div><div class='add'>+					  : /* no inputs */</div><div class='add'>+					  : "memory");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	unsigned char fpstate[FPCONTEXT_SIZE];</div><div class='add'>+	int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (FPU_IS_EMU) {</div><div class='add'>+		/* save fpu control register */</div><div class='add'>+		err |= copy_to_user(uc-&gt;uc_mcontext.fpregs.f_fpcntl,</div><div class='add'>+				current-&gt;thread.fpcntl, 12);</div><div class='add'>+		/* save all other fpu register */</div><div class='add'>+		err |= copy_to_user(uc-&gt;uc_mcontext.fpregs.f_fpregs,</div><div class='add'>+				current-&gt;thread.fp, 96);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (CPU_IS_COLDFIRE) {</div><div class='add'>+		__asm__ volatile ("fsave %0" : : "m" (*fpstate) : "memory");</div><div class='add'>+	} else {</div><div class='add'>+		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='add'>+				  "fsave %0\n\t"</div><div class='add'>+				  ".chip 68k"</div><div class='add'>+				  : : "m" (*fpstate) : "memory");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err |= __put_user(*(long *)fpstate, (long __user *)&amp;uc-&gt;uc_fpstate);</div><div class='add'>+	if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {</div><div class='add'>+		fpregset_t fpregs;</div><div class='add'>+		if (!(CPU_IS_060 || CPU_IS_COLDFIRE))</div><div class='add'>+			context_size = fpstate[1];</div><div class='add'>+		fpu_version = fpstate[0];</div><div class='add'>+		if (CPU_IS_020_OR_030 &amp;&amp;</div><div class='add'>+		    regs-&gt;vector &gt;= (VEC_FPBRUC * 4) &amp;&amp;</div><div class='add'>+		    regs-&gt;vector &lt;= (VEC_FPNAN * 4)) {</div><div class='add'>+			/* Clear pending exception in 68882 idle frame */</div><div class='add'>+			if (*(unsigned short *) fpstate == 0x1f38)</div><div class='add'>+				fpstate[0x38] |= 1 &lt;&lt; 3;</div><div class='add'>+		}</div><div class='add'>+		if (CPU_IS_COLDFIRE) {</div><div class='add'>+			__asm__ volatile ("fmovemd %%fp0-%%fp7,%0\n\t"</div><div class='add'>+					  "fmovel %%fpcr,%1\n\t"</div><div class='add'>+					  "fmovel %%fpsr,%2\n\t"</div><div class='add'>+					  "fmovel %%fpiar,%3"</div><div class='add'>+					  : "=m" (fpregs.f_fpregs[0]),</div><div class='add'>+					    "=m" (fpregs.f_fpcntl[0]),</div><div class='add'>+					    "=m" (fpregs.f_fpcntl[1]),</div><div class='add'>+					    "=m" (fpregs.f_fpcntl[2])</div><div class='add'>+					  : /* no inputs */</div><div class='add'>+					  : "memory");</div><div class='add'>+		} else {</div><div class='add'>+			__asm__ volatile (".chip 68k/68881\n\t"</div><div class='add'>+					  "fmovemx %%fp0-%%fp7,%0\n\t"</div><div class='add'>+					  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"</div><div class='add'>+					  ".chip 68k"</div><div class='add'>+					  : "=m" (*fpregs.f_fpregs),</div><div class='add'>+					    "=m" (*fpregs.f_fpcntl)</div><div class='add'>+					  : /* no inputs */</div><div class='add'>+					  : "memory");</div><div class='add'>+		}</div><div class='add'>+		err |= copy_to_user(&amp;uc-&gt;uc_mcontext.fpregs, &amp;fpregs,</div><div class='add'>+				    sizeof(fpregs));</div><div class='add'>+	}</div><div class='add'>+	if (context_size)</div><div class='add'>+		err |= copy_to_user((long __user *)&amp;uc-&gt;uc_fpstate + 1, fpstate + 4,</div><div class='add'>+				    context_size);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else /* CONFIG_FPU */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For the case with no FPU configured these all do nothing.</div><div class='add'>+ */</div><div class='add'>+static inline int restore_fpu_state(struct sigcontext *sc)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int rt_restore_fpu_state(struct ucontext __user *uc)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_FPU */</div><div class='add'>+</div><div class='add'>+static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,</div><div class='add'>+			       void __user *fp)</div><div class='add'>+{</div><div class='add'>+	int fsize = frame_extra_sizes(formatvec &gt;&gt; 12);</div><div class='add'>+	if (fsize &lt; 0) {</div><div class='add'>+		/*</div><div class='add'>+		 * user process trying to return with weird frame format</div><div class='add'>+		 */</div><div class='add'>+#ifdef DEBUG</div><div class='add'>+		printk("user process returning with weird frame format\n");</div><div class='add'>+#endif</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	if (!fsize) {</div><div class='add'>+		regs-&gt;format = formatvec &gt;&gt; 12;</div><div class='add'>+		regs-&gt;vector = formatvec &amp; 0xfff;</div><div class='add'>+	} else {</div><div class='add'>+		struct switch_stack *sw = (struct switch_stack *)regs - 1;</div><div class='add'>+		unsigned long buf[fsize / 2]; /* yes, twice as much */</div><div class='add'>+</div><div class='add'>+		/* that'll make sure that expansion won't crap over data */</div><div class='add'>+		if (copy_from_user(buf + fsize / 4, fp, fsize))</div><div class='add'>+			return 1;</div><div class='add'>+</div><div class='add'>+		/* point of no return */</div><div class='add'>+		regs-&gt;format = formatvec &gt;&gt; 12;</div><div class='add'>+		regs-&gt;vector = formatvec &amp; 0xfff;</div><div class='add'>+#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))</div><div class='add'>+		__asm__ __volatile__ (</div><div class='add'>+#ifdef CONFIG_COLDFIRE</div><div class='add'>+			 "   movel %0,%/sp\n\t"</div><div class='add'>+			 "   bra ret_from_signal\n"</div><div class='add'>+#else</div><div class='add'>+			 "   movel %0,%/a0\n\t"</div><div class='add'>+			 "   subl %1,%/a0\n\t"     /* make room on stack */</div><div class='add'>+			 "   movel %/a0,%/sp\n\t"  /* set stack pointer */</div><div class='add'>+			 /* move switch_stack and pt_regs */</div><div class='add'>+			 "1: movel %0@+,%/a0@+\n\t"</div><div class='add'>+			 "   dbra %2,1b\n\t"</div><div class='add'>+			 "   lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */</div><div class='add'>+			 "   lsrl  #2,%1\n\t"</div><div class='add'>+			 "   subql #1,%1\n\t"</div><div class='add'>+			 /* copy to the gap we'd made */</div><div class='add'>+			 "2: movel %4@+,%/a0@+\n\t"</div><div class='add'>+			 "   dbra %1,2b\n\t"</div><div class='add'>+			 "   bral ret_from_signal\n"</div><div class='add'>+#endif</div><div class='add'>+			 : /* no outputs, it doesn't ever return */</div><div class='add'>+			 : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),</div><div class='add'>+			   "n" (frame_offset), "a" (buf + fsize/4)</div><div class='add'>+			 : "a0");</div><div class='add'>+#undef frame_offset</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp)</div><div class='add'>+{</div><div class='add'>+	int formatvec;</div><div class='add'>+	struct sigcontext context;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	/* Always make any pending restarted system calls return -EINTR */</div><div class='add'>+	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='add'>+</div><div class='add'>+	/* get previous context */</div><div class='add'>+	if (copy_from_user(&amp;context, usc, sizeof(context)))</div><div class='add'>+		goto badframe;</div><div class='add'>+</div><div class='add'>+	/* restore passed registers */</div><div class='add'>+	regs-&gt;d0 = context.sc_d0;</div><div class='add'>+	regs-&gt;d1 = context.sc_d1;</div><div class='add'>+	regs-&gt;a0 = context.sc_a0;</div><div class='add'>+	regs-&gt;a1 = context.sc_a1;</div><div class='add'>+	regs-&gt;sr = (regs-&gt;sr &amp; 0xff00) | (context.sc_sr &amp; 0xff);</div><div class='add'>+	regs-&gt;pc = context.sc_pc;</div><div class='add'>+	regs-&gt;orig_d0 = -1;		/* disable syscall checks */</div><div class='add'>+	wrusp(context.sc_usp);</div><div class='add'>+	formatvec = context.sc_formatvec;</div><div class='add'>+</div><div class='add'>+	err = restore_fpu_state(&amp;context);</div><div class='add'>+</div><div class='add'>+	if (err || mangle_kernel_stack(regs, formatvec, fp))</div><div class='add'>+		goto badframe;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+badframe:</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,</div><div class='add'>+		    struct ucontext __user *uc)</div><div class='add'>+{</div><div class='add'>+	int temp;</div><div class='add'>+	greg_t __user *gregs = uc-&gt;uc_mcontext.gregs;</div><div class='add'>+	unsigned long usp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Always make any pending restarted system calls return -EINTR */</div><div class='add'>+	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='add'>+</div><div class='add'>+	err = __get_user(temp, &amp;uc-&gt;uc_mcontext.version);</div><div class='add'>+	if (temp != MCONTEXT_VERSION)</div><div class='add'>+		goto badframe;</div><div class='add'>+	/* restore passed registers */</div><div class='add'>+	err |= __get_user(regs-&gt;d0, &amp;gregs[0]);</div><div class='add'>+	err |= __get_user(regs-&gt;d1, &amp;gregs[1]);</div><div class='add'>+	err |= __get_user(regs-&gt;d2, &amp;gregs[2]);</div><div class='add'>+	err |= __get_user(regs-&gt;d3, &amp;gregs[3]);</div><div class='add'>+	err |= __get_user(regs-&gt;d4, &amp;gregs[4]);</div><div class='add'>+	err |= __get_user(regs-&gt;d5, &amp;gregs[5]);</div><div class='add'>+	err |= __get_user(sw-&gt;d6, &amp;gregs[6]);</div><div class='add'>+	err |= __get_user(sw-&gt;d7, &amp;gregs[7]);</div><div class='add'>+	err |= __get_user(regs-&gt;a0, &amp;gregs[8]);</div><div class='add'>+	err |= __get_user(regs-&gt;a1, &amp;gregs[9]);</div><div class='add'>+	err |= __get_user(regs-&gt;a2, &amp;gregs[10]);</div><div class='add'>+	err |= __get_user(sw-&gt;a3, &amp;gregs[11]);</div><div class='add'>+	err |= __get_user(sw-&gt;a4, &amp;gregs[12]);</div><div class='add'>+	err |= __get_user(sw-&gt;a5, &amp;gregs[13]);</div><div class='add'>+	err |= __get_user(sw-&gt;a6, &amp;gregs[14]);</div><div class='add'>+	err |= __get_user(usp, &amp;gregs[15]);</div><div class='add'>+	wrusp(usp);</div><div class='add'>+	err |= __get_user(regs-&gt;pc, &amp;gregs[16]);</div><div class='add'>+	err |= __get_user(temp, &amp;gregs[17]);</div><div class='add'>+	regs-&gt;sr = (regs-&gt;sr &amp; 0xff00) | (temp &amp; 0xff);</div><div class='add'>+	regs-&gt;orig_d0 = -1;		/* disable syscall checks */</div><div class='add'>+	err |= __get_user(temp, &amp;uc-&gt;uc_formatvec);</div><div class='add'>+</div><div class='add'>+	err |= rt_restore_fpu_state(uc);</div><div class='add'>+</div><div class='add'>+	if (err || do_sigaltstack(&amp;uc-&gt;uc_stack, NULL, usp) == -EFAULT)</div><div class='add'>+		goto badframe;</div><div class='add'>+</div><div class='add'>+	if (mangle_kernel_stack(regs, temp, &amp;uc-&gt;uc_extra))</div><div class='add'>+		goto badframe;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+badframe:</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage int do_sigreturn(unsigned long __unused)</div><div class='add'>+{</div><div class='add'>+	struct switch_stack *sw = (struct switch_stack *) &amp;__unused;</div><div class='add'>+	struct pt_regs *regs = (struct pt_regs *) (sw + 1);</div><div class='add'>+	unsigned long usp = rdusp();</div><div class='add'>+	struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);</div><div class='add'>+	sigset_t set;</div><div class='add'>+</div><div class='add'>+	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))</div><div class='add'>+		goto badframe;</div><div class='add'>+	if (__get_user(set.sig[0], &amp;frame-&gt;sc.sc_mask) ||</div><div class='add'>+	    (_NSIG_WORDS &gt; 1 &amp;&amp;</div><div class='add'>+	     __copy_from_user(&amp;set.sig[1], &amp;frame-&gt;extramask,</div><div class='add'>+			      sizeof(frame-&gt;extramask))))</div><div class='add'>+		goto badframe;</div><div class='add'>+</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='add'>+</div><div class='add'>+	if (restore_sigcontext(regs, &amp;frame-&gt;sc, frame + 1))</div><div class='add'>+		goto badframe;</div><div class='add'>+	return regs-&gt;d0;</div><div class='add'>+</div><div class='add'>+badframe:</div><div class='add'>+	force_sig(SIGSEGV, current);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage int do_rt_sigreturn(unsigned long __unused)</div><div class='add'>+{</div><div class='add'>+	struct switch_stack *sw = (struct switch_stack *) &amp;__unused;</div><div class='add'>+	struct pt_regs *regs = (struct pt_regs *) (sw + 1);</div><div class='add'>+	unsigned long usp = rdusp();</div><div class='add'>+	struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);</div><div class='add'>+	sigset_t set;</div><div class='add'>+</div><div class='add'>+	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))</div><div class='add'>+		goto badframe;</div><div class='add'>+	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='add'>+		goto badframe;</div><div class='add'>+</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='add'>+</div><div class='add'>+	if (rt_restore_ucontext(regs, sw, &amp;frame-&gt;uc))</div><div class='add'>+		goto badframe;</div><div class='add'>+	return regs-&gt;d0;</div><div class='add'>+</div><div class='add'>+badframe:</div><div class='add'>+	force_sig(SIGSEGV, current);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,</div><div class='add'>+			     unsigned long mask)</div><div class='add'>+{</div><div class='add'>+	sc-&gt;sc_mask = mask;</div><div class='add'>+	sc-&gt;sc_usp = rdusp();</div><div class='add'>+	sc-&gt;sc_d0 = regs-&gt;d0;</div><div class='add'>+	sc-&gt;sc_d1 = regs-&gt;d1;</div><div class='add'>+	sc-&gt;sc_a0 = regs-&gt;a0;</div><div class='add'>+	sc-&gt;sc_a1 = regs-&gt;a1;</div><div class='add'>+	sc-&gt;sc_sr = regs-&gt;sr;</div><div class='add'>+	sc-&gt;sc_pc = regs-&gt;pc;</div><div class='add'>+	sc-&gt;sc_formatvec = regs-&gt;format &lt;&lt; 12 | regs-&gt;vector;</div><div class='add'>+	save_a5_state(sc, regs);</div><div class='add'>+	save_fpu_state(sc, regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	struct switch_stack *sw = (struct switch_stack *)regs - 1;</div><div class='add'>+	greg_t __user *gregs = uc-&gt;uc_mcontext.gregs;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err |= __put_user(MCONTEXT_VERSION, &amp;uc-&gt;uc_mcontext.version);</div><div class='add'>+	err |= __put_user(regs-&gt;d0, &amp;gregs[0]);</div><div class='add'>+	err |= __put_user(regs-&gt;d1, &amp;gregs[1]);</div><div class='add'>+	err |= __put_user(regs-&gt;d2, &amp;gregs[2]);</div><div class='add'>+	err |= __put_user(regs-&gt;d3, &amp;gregs[3]);</div><div class='add'>+	err |= __put_user(regs-&gt;d4, &amp;gregs[4]);</div><div class='add'>+	err |= __put_user(regs-&gt;d5, &amp;gregs[5]);</div><div class='add'>+	err |= __put_user(sw-&gt;d6, &amp;gregs[6]);</div><div class='add'>+	err |= __put_user(sw-&gt;d7, &amp;gregs[7]);</div><div class='add'>+	err |= __put_user(regs-&gt;a0, &amp;gregs[8]);</div><div class='add'>+	err |= __put_user(regs-&gt;a1, &amp;gregs[9]);</div><div class='add'>+	err |= __put_user(regs-&gt;a2, &amp;gregs[10]);</div><div class='add'>+	err |= __put_user(sw-&gt;a3, &amp;gregs[11]);</div><div class='add'>+	err |= __put_user(sw-&gt;a4, &amp;gregs[12]);</div><div class='add'>+	err |= __put_user(sw-&gt;a5, &amp;gregs[13]);</div><div class='add'>+	err |= __put_user(sw-&gt;a6, &amp;gregs[14]);</div><div class='add'>+	err |= __put_user(rdusp(), &amp;gregs[15]);</div><div class='add'>+	err |= __put_user(regs-&gt;pc, &amp;gregs[16]);</div><div class='add'>+	err |= __put_user(regs-&gt;sr, &amp;gregs[17]);</div><div class='add'>+	err |= __put_user((regs-&gt;format &lt;&lt; 12) | regs-&gt;vector, &amp;uc-&gt;uc_formatvec);</div><div class='add'>+	err |= rt_save_fpu_state(uc, regs);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __user *</div><div class='add'>+get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)</div><div class='add'>+{</div><div class='add'>+	unsigned long usp;</div><div class='add'>+</div><div class='add'>+	/* Default to using normal stack.  */</div><div class='add'>+	usp = rdusp();</div><div class='add'>+</div><div class='add'>+	/* This is the X/Open sanctioned signal stack switching.  */</div><div class='add'>+	if (ka-&gt;sa.sa_flags &amp; SA_ONSTACK) {</div><div class='add'>+		if (!sas_ss_flags(usp))</div><div class='add'>+			usp = current-&gt;sas_ss_sp + current-&gt;sas_ss_size;</div><div class='add'>+	}</div><div class='add'>+	return (void __user *)((usp - frame_size) &amp; -8UL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int setup_frame (int sig, struct k_sigaction *ka,</div><div class='add'>+			 sigset_t *set, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	struct sigframe __user *frame;</div><div class='add'>+	int fsize = frame_extra_sizes(regs-&gt;format);</div><div class='add'>+	struct sigcontext context;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (fsize &lt; 0) {</div><div class='add'>+#ifdef DEBUG</div><div class='add'>+		printk ("setup_frame: Unknown frame format %#x\n",</div><div class='add'>+			regs-&gt;format);</div><div class='add'>+#endif</div><div class='add'>+		goto give_sigsegv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	frame = get_sigframe(ka, regs, sizeof(*frame) + fsize);</div><div class='add'>+</div><div class='add'>+	if (fsize)</div><div class='add'>+		err |= copy_to_user (frame + 1, regs + 1, fsize);</div><div class='add'>+</div><div class='add'>+	err |= __put_user((current_thread_info()-&gt;exec_domain</div><div class='add'>+			   &amp;&amp; current_thread_info()-&gt;exec_domain-&gt;signal_invmap</div><div class='add'>+			   &amp;&amp; sig &lt; 32</div><div class='add'>+			   ? current_thread_info()-&gt;exec_domain-&gt;signal_invmap[sig]</div><div class='add'>+			   : sig),</div><div class='add'>+			  &amp;frame-&gt;sig);</div><div class='add'>+</div><div class='add'>+	err |= __put_user(regs-&gt;vector, &amp;frame-&gt;code);</div><div class='add'>+	err |= __put_user(&amp;frame-&gt;sc, &amp;frame-&gt;psc);</div><div class='add'>+</div><div class='add'>+	if (_NSIG_WORDS &gt; 1)</div><div class='add'>+		err |= copy_to_user(frame-&gt;extramask, &amp;set-&gt;sig[1],</div><div class='add'>+				    sizeof(frame-&gt;extramask));</div><div class='add'>+</div><div class='add'>+	setup_sigcontext(&amp;context, regs, set-&gt;sig[0]);</div><div class='add'>+	err |= copy_to_user (&amp;frame-&gt;sc, &amp;context, sizeof(context));</div><div class='add'>+</div><div class='add'>+	/* Set up to return from userspace.  */</div><div class='add'>+#ifdef CONFIG_MMU</div><div class='add'>+	err |= __put_user(frame-&gt;retcode, &amp;frame-&gt;pretcode);</div><div class='add'>+	/* moveq #,d0; trap #0 */</div><div class='add'>+	err |= __put_user(0x70004e40 + (__NR_sigreturn &lt;&lt; 16),</div><div class='add'>+			  (long __user *)(frame-&gt;retcode));</div><div class='add'>+#else</div><div class='add'>+	err |= __put_user((void *) ret_from_user_signal, &amp;frame-&gt;pretcode);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto give_sigsegv;</div><div class='add'>+</div><div class='add'>+	push_cache ((unsigned long) &amp;frame-&gt;retcode);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set up registers for signal handler.  All the state we are about</div><div class='add'>+	 * to destroy is successfully copied to sigframe.</div><div class='add'>+	 */</div><div class='add'>+	wrusp ((unsigned long) frame);</div><div class='add'>+	regs-&gt;pc = (unsigned long) ka-&gt;sa.sa_handler;</div><div class='add'>+	adjustformat(regs);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This is subtle; if we build more than one sigframe, all but the</div><div class='add'>+	 * first one will see frame format 0 and have fsize == 0, so we won't</div><div class='add'>+	 * screw stkadj.</div><div class='add'>+	 */</div><div class='add'>+	if (fsize)</div><div class='add'>+		regs-&gt;stkadj = fsize;</div><div class='add'>+</div><div class='add'>+	/* Prepare to skip over the extra stuff in the exception frame.  */</div><div class='add'>+	if (regs-&gt;stkadj) {</div><div class='add'>+		struct pt_regs *tregs =</div><div class='add'>+			(struct pt_regs *)((ulong)regs + regs-&gt;stkadj);</div><div class='add'>+#ifdef DEBUG</div><div class='add'>+		printk("Performing stackadjust=%04x\n", regs-&gt;stkadj);</div><div class='add'>+#endif</div><div class='add'>+		/* This must be copied with decreasing addresses to</div><div class='add'>+                   handle overlaps.  */</div><div class='add'>+		tregs-&gt;vector = 0;</div><div class='add'>+		tregs-&gt;format = 0;</div><div class='add'>+		tregs-&gt;pc = regs-&gt;pc;</div><div class='add'>+		tregs-&gt;sr = regs-&gt;sr;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+give_sigsegv:</div><div class='add'>+	force_sigsegv(sig, current);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='add'>+			    sigset_t *set, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	struct rt_sigframe __user *frame;</div><div class='add'>+	int fsize = frame_extra_sizes(regs-&gt;format);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (fsize &lt; 0) {</div><div class='add'>+#ifdef DEBUG</div><div class='add'>+		printk ("setup_frame: Unknown frame format %#x\n",</div><div class='add'>+			regs-&gt;format);</div><div class='add'>+#endif</div><div class='add'>+		goto give_sigsegv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	frame = get_sigframe(ka, regs, sizeof(*frame));</div><div class='add'>+</div><div class='add'>+	if (fsize)</div><div class='add'>+		err |= copy_to_user (&amp;frame-&gt;uc.uc_extra, regs + 1, fsize);</div><div class='add'>+</div><div class='add'>+	err |= __put_user((current_thread_info()-&gt;exec_domain</div><div class='add'>+			   &amp;&amp; current_thread_info()-&gt;exec_domain-&gt;signal_invmap</div><div class='add'>+			   &amp;&amp; sig &lt; 32</div><div class='add'>+			   ? current_thread_info()-&gt;exec_domain-&gt;signal_invmap[sig]</div><div class='add'>+			   : sig),</div><div class='add'>+			  &amp;frame-&gt;sig);</div><div class='add'>+	err |= __put_user(&amp;frame-&gt;info, &amp;frame-&gt;pinfo);</div><div class='add'>+	err |= __put_user(&amp;frame-&gt;uc, &amp;frame-&gt;puc);</div><div class='add'>+	err |= copy_siginfo_to_user(&amp;frame-&gt;info, info);</div><div class='add'>+</div><div class='add'>+	/* Create the ucontext.  */</div><div class='add'>+	err |= __put_user(0, &amp;frame-&gt;uc.uc_flags);</div><div class='add'>+	err |= __put_user(NULL, &amp;frame-&gt;uc.uc_link);</div><div class='add'>+	err |= __put_user((void __user *)current-&gt;sas_ss_sp,</div><div class='add'>+			  &amp;frame-&gt;uc.uc_stack.ss_sp);</div><div class='add'>+	err |= __put_user(sas_ss_flags(rdusp()),</div><div class='add'>+			  &amp;frame-&gt;uc.uc_stack.ss_flags);</div><div class='add'>+	err |= __put_user(current-&gt;sas_ss_size, &amp;frame-&gt;uc.uc_stack.ss_size);</div><div class='add'>+	err |= rt_setup_ucontext(&amp;frame-&gt;uc, regs);</div><div class='add'>+	err |= copy_to_user (&amp;frame-&gt;uc.uc_sigmask, set, sizeof(*set));</div><div class='add'>+</div><div class='add'>+	/* Set up to return from userspace.  */</div><div class='add'>+#ifdef CONFIG_MMU</div><div class='add'>+	err |= __put_user(frame-&gt;retcode, &amp;frame-&gt;pretcode);</div><div class='add'>+#ifdef __mcoldfire__</div><div class='add'>+	/* movel #__NR_rt_sigreturn,d0; trap #0 */</div><div class='add'>+	err |= __put_user(0x203c0000, (long __user *)(frame-&gt;retcode + 0));</div><div class='add'>+	err |= __put_user(0x00004e40 + (__NR_rt_sigreturn &lt;&lt; 16),</div><div class='add'>+			  (long __user *)(frame-&gt;retcode + 4));</div><div class='add'>+#else</div><div class='add'>+	/* moveq #,d0; notb d0; trap #0 */</div><div class='add'>+	err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) &lt;&lt; 16),</div><div class='add'>+			  (long __user *)(frame-&gt;retcode + 0));</div><div class='add'>+	err |= __put_user(0x4e40, (short __user *)(frame-&gt;retcode + 4));</div><div class='add'>+#endif</div><div class='add'>+#else</div><div class='add'>+	err |= __put_user((void *) ret_from_user_rt_signal, &amp;frame-&gt;pretcode);</div><div class='add'>+#endif /* CONFIG_MMU */</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto give_sigsegv;</div><div class='add'>+</div><div class='add'>+	push_cache ((unsigned long) &amp;frame-&gt;retcode);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set up registers for signal handler.  All the state we are about</div><div class='add'>+	 * to destroy is successfully copied to sigframe.</div><div class='add'>+	 */</div><div class='add'>+	wrusp ((unsigned long) frame);</div><div class='add'>+	regs-&gt;pc = (unsigned long) ka-&gt;sa.sa_handler;</div><div class='add'>+	adjustformat(regs);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This is subtle; if we build more than one sigframe, all but the</div><div class='add'>+	 * first one will see frame format 0 and have fsize == 0, so we won't</div><div class='add'>+	 * screw stkadj.</div><div class='add'>+	 */</div><div class='add'>+	if (fsize)</div><div class='add'>+		regs-&gt;stkadj = fsize;</div><div class='add'>+</div><div class='add'>+	/* Prepare to skip over the extra stuff in the exception frame.  */</div><div class='add'>+	if (regs-&gt;stkadj) {</div><div class='add'>+		struct pt_regs *tregs =</div><div class='add'>+			(struct pt_regs *)((ulong)regs + regs-&gt;stkadj);</div><div class='add'>+#ifdef DEBUG</div><div class='add'>+		printk("Performing stackadjust=%04x\n", regs-&gt;stkadj);</div><div class='add'>+#endif</div><div class='add'>+		/* This must be copied with decreasing addresses to</div><div class='add'>+                   handle overlaps.  */</div><div class='add'>+		tregs-&gt;vector = 0;</div><div class='add'>+		tregs-&gt;format = 0;</div><div class='add'>+		tregs-&gt;pc = regs-&gt;pc;</div><div class='add'>+		tregs-&gt;sr = regs-&gt;sr;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+give_sigsegv:</div><div class='add'>+	force_sigsegv(sig, current);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)</div><div class='add'>+{</div><div class='add'>+	switch (regs-&gt;d0) {</div><div class='add'>+	case -ERESTARTNOHAND:</div><div class='add'>+		if (!has_handler)</div><div class='add'>+			goto do_restart;</div><div class='add'>+		regs-&gt;d0 = -EINTR;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case -ERESTART_RESTARTBLOCK:</div><div class='add'>+		if (!has_handler) {</div><div class='add'>+			regs-&gt;d0 = __NR_restart_syscall;</div><div class='add'>+			regs-&gt;pc -= 2;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		regs-&gt;d0 = -EINTR;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case -ERESTARTSYS:</div><div class='add'>+		if (has_handler &amp;&amp; !(ka-&gt;sa.sa_flags &amp; SA_RESTART)) {</div><div class='add'>+			regs-&gt;d0 = -EINTR;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	/* fallthrough */</div><div class='add'>+	case -ERESTARTNOINTR:</div><div class='add'>+	do_restart:</div><div class='add'>+		regs-&gt;d0 = regs-&gt;orig_d0;</div><div class='add'>+		regs-&gt;pc -= 2;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * OK, we're invoking a handler</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='add'>+	      struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='add'>+	int err;</div><div class='add'>+	/* are we from a system call? */</div><div class='add'>+	if (regs-&gt;orig_d0 &gt;= 0)</div><div class='add'>+		/* If so, check system call restarting.. */</div><div class='add'>+		handle_restart(regs, ka, 1);</div><div class='add'>+</div><div class='add'>+	/* set up the stack frame */</div><div class='add'>+	if (ka-&gt;sa.sa_flags &amp; SA_SIGINFO)</div><div class='add'>+		err = setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='add'>+	else</div><div class='add'>+		err = setup_frame(sig, ka, oldset, regs);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	signal_delivered(sig, info, ka, regs, 0);</div><div class='add'>+</div><div class='add'>+	if (test_thread_flag(TIF_DELAYED_TRACE)) {</div><div class='add'>+		regs-&gt;sr &amp;= ~0x8000;</div><div class='add'>+		send_sig(SIGTRAP, current, 1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Note that 'init' is a special process: it doesn't get signals it doesn't</div><div class='add'>+ * want to handle. Thus you cannot kill init even with a SIGKILL even by</div><div class='add'>+ * mistake.</div><div class='add'>+ */</div><div class='add'>+static void do_signal(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	siginfo_t info;</div><div class='add'>+	struct k_sigaction ka;</div><div class='add'>+	int signr;</div><div class='add'>+</div><div class='add'>+	current-&gt;thread.esp0 = (unsigned long) regs;</div><div class='add'>+</div><div class='add'>+	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='add'>+	if (signr &gt; 0) {</div><div class='add'>+		/* Whee!  Actually deliver the signal.  */</div><div class='add'>+		handle_signal(signr, &amp;ka, &amp;info, regs);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Did we come from a system call? */</div><div class='add'>+	if (regs-&gt;orig_d0 &gt;= 0)</div><div class='add'>+		/* Restart the system call - no handlers present */</div><div class='add'>+		handle_restart(regs, NULL, 0);</div><div class='add'>+</div><div class='add'>+	/* If there's no signal to deliver, we just restore the saved mask.  */</div><div class='add'>+	restore_saved_sigmask();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void do_notify_resume(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	if (test_thread_flag(TIF_SIGPENDING))</div><div class='add'>+		do_signal(regs);</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_thread_flag(TIF_NOTIFY_RESUME))</div><div class='add'>+		tracehook_notify_resume(regs);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/m68k/kernel/signal_mm.c b/arch/m68k/kernel/signal_mm.c<br/>deleted file mode 100644<br/>index cb856f9da655..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/kernel/signal_mm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/kernel/signal_mm.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1115 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/m68k/kernel/signal.c</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1991, 1992  Linus Torvalds</div><div class='del'>- *</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License.  See the file COPYING in the main directory of this archive</div><div class='del'>- * for more details.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Linux/m68k support by Hamish Macdonald</div><div class='del'>- *</div><div class='del'>- * 68060 fixes by Jesper Skov</div><div class='del'>- *</div><div class='del'>- * 1997-12-01  Modified for POSIX.1b signals by Andreas Schwab</div><div class='del'>- *</div><div class='del'>- * mathemu support by Roman Zippel</div><div class='del'>- *  (Note: fpstate in the signal context is completely ignored for the emulator</div><div class='del'>- *         and the internal floating point format is put on stack)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ++roman (07/09/96): implemented signal stacks (specially for tosemu on</div><div class='del'>- * Atari :-) Current limitation: Only one sigstack can be active at one time.</div><div class='del'>- * If a second signal with SA_ONSTACK set arrives while working on a sigstack,</div><div class='del'>- * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested</div><div class='del'>- * signal handlers!</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/signal.h&gt;</div><div class='del'>-#include &lt;linux/syscalls.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/wait.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/unistd.h&gt;</div><div class='del'>-#include &lt;linux/stddef.h&gt;</div><div class='del'>-#include &lt;linux/highuid.h&gt;</div><div class='del'>-#include &lt;linux/personality.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='del'>-#include &lt;linux/binfmts.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/setup.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/traps.h&gt;</div><div class='del'>-#include &lt;asm/ucontext.h&gt;</div><div class='del'>-</div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='del'>-static const int frame_extra_sizes[16] = {</div><div class='del'>-  [1]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmt1), */</div><div class='del'>-  [2]	= sizeof(((struct frame *)0)-&gt;un.fmt2),</div><div class='del'>-  [3]	= sizeof(((struct frame *)0)-&gt;un.fmt3),</div><div class='del'>-#ifdef CONFIG_COLDFIRE</div><div class='del'>-  [4]	= 0,</div><div class='del'>-#else</div><div class='del'>-  [4]	= sizeof(((struct frame *)0)-&gt;un.fmt4),</div><div class='del'>-#endif</div><div class='del'>-  [5]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmt5), */</div><div class='del'>-  [6]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmt6), */</div><div class='del'>-  [7]	= sizeof(((struct frame *)0)-&gt;un.fmt7),</div><div class='del'>-  [8]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmt8), */</div><div class='del'>-  [9]	= sizeof(((struct frame *)0)-&gt;un.fmt9),</div><div class='del'>-  [10]	= sizeof(((struct frame *)0)-&gt;un.fmta),</div><div class='del'>-  [11]	= sizeof(((struct frame *)0)-&gt;un.fmtb),</div><div class='del'>-  [12]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmtc), */</div><div class='del'>-  [13]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmtd), */</div><div class='del'>-  [14]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmte), */</div><div class='del'>-  [15]	= -1, /* sizeof(((struct frame *)0)-&gt;un.fmtf), */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int handle_kernel_fault(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	const struct exception_table_entry *fixup;</div><div class='del'>-	struct pt_regs *tregs;</div><div class='del'>-</div><div class='del'>-	/* Are we prepared to handle this kernel fault? */</div><div class='del'>-	fixup = search_exception_tables(regs-&gt;pc);</div><div class='del'>-	if (!fixup)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Create a new four word stack frame, discarding the old one. */</div><div class='del'>-	regs-&gt;stkadj = frame_extra_sizes[regs-&gt;format];</div><div class='del'>-	tregs =	(struct pt_regs *)((long)regs + regs-&gt;stkadj);</div><div class='del'>-	tregs-&gt;vector = regs-&gt;vector;</div><div class='del'>-#ifdef CONFIG_COLDFIRE</div><div class='del'>-	tregs-&gt;format = 4;</div><div class='del'>-#else</div><div class='del'>-	tregs-&gt;format = 0;</div><div class='del'>-#endif</div><div class='del'>-	tregs-&gt;pc = fixup-&gt;fixup;</div><div class='del'>-	tregs-&gt;sr = regs-&gt;sr;</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Atomically swap in the new signal mask, and wait for a signal.</div><div class='del'>- */</div><div class='del'>-asmlinkage int</div><div class='del'>-sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)</div><div class='del'>-{</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-	siginitset(&amp;current-&gt;blocked, mask);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_restore_sigmask();</div><div class='del'>-</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage int</div><div class='del'>-sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='del'>-	      struct old_sigaction __user *oact)</div><div class='del'>-{</div><div class='del'>-	struct k_sigaction new_ka, old_ka;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (act) {</div><div class='del'>-		old_sigset_t mask;</div><div class='del'>-		if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='del'>-		    __get_user(mask, &amp;act-&gt;sa_mask))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		siginitset(&amp;new_ka.sa.sa_mask, mask);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = do_sigaction(sig, act ? &amp;new_ka : NULL, oact ? &amp;old_ka : NULL);</div><div class='del'>-</div><div class='del'>-	if (!ret &amp;&amp; oact) {</div><div class='del'>-		if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_handler, &amp;oact-&gt;sa_handler) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage int</div><div class='del'>-sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)</div><div class='del'>-{</div><div class='del'>-	return do_sigaltstack(uss, uoss, rdusp());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Do a signal return; undo the signal stack.</div><div class='del'>- *</div><div class='del'>- * Keep the return code on the stack quadword aligned!</div><div class='del'>- * That makes the cache flush below easier.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct sigframe</div><div class='del'>-{</div><div class='del'>-	char __user *pretcode;</div><div class='del'>-	int sig;</div><div class='del'>-	int code;</div><div class='del'>-	struct sigcontext __user *psc;</div><div class='del'>-	char retcode[8];</div><div class='del'>-	unsigned long extramask[_NSIG_WORDS-1];</div><div class='del'>-	struct sigcontext sc;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct rt_sigframe</div><div class='del'>-{</div><div class='del'>-	char __user *pretcode;</div><div class='del'>-	int sig;</div><div class='del'>-	struct siginfo __user *pinfo;</div><div class='del'>-	void __user *puc;</div><div class='del'>-	char retcode[8];</div><div class='del'>-	struct siginfo info;</div><div class='del'>-	struct ucontext uc;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static unsigned char fpu_version;	/* version number of fpu, set by setup_frame */</div><div class='del'>-</div><div class='del'>-static inline int restore_fpu_state(struct sigcontext *sc)</div><div class='del'>-{</div><div class='del'>-	int err = 1;</div><div class='del'>-</div><div class='del'>-	if (FPU_IS_EMU) {</div><div class='del'>-	    /* restore registers */</div><div class='del'>-	    memcpy(current-&gt;thread.fpcntl, sc-&gt;sc_fpcntl, 12);</div><div class='del'>-	    memcpy(current-&gt;thread.fp, sc-&gt;sc_fpregs, 24);</div><div class='del'>-	    return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (CPU_IS_060 ? sc-&gt;sc_fpstate[2] : sc-&gt;sc_fpstate[0]) {</div><div class='del'>-	    /* Verify the frame format.  */</div><div class='del'>-	    if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &amp;&amp;</div><div class='del'>-		 (sc-&gt;sc_fpstate[0] != fpu_version))</div><div class='del'>-		goto out;</div><div class='del'>-	    if (CPU_IS_020_OR_030) {</div><div class='del'>-		if (m68k_fputype &amp; FPU_68881 &amp;&amp;</div><div class='del'>-		    !(sc-&gt;sc_fpstate[1] == 0x18 || sc-&gt;sc_fpstate[1] == 0xb4))</div><div class='del'>-		    goto out;</div><div class='del'>-		if (m68k_fputype &amp; FPU_68882 &amp;&amp;</div><div class='del'>-		    !(sc-&gt;sc_fpstate[1] == 0x38 || sc-&gt;sc_fpstate[1] == 0xd4))</div><div class='del'>-		    goto out;</div><div class='del'>-	    } else if (CPU_IS_040) {</div><div class='del'>-		if (!(sc-&gt;sc_fpstate[1] == 0x00 ||</div><div class='del'>-                      sc-&gt;sc_fpstate[1] == 0x28 ||</div><div class='del'>-                      sc-&gt;sc_fpstate[1] == 0x60))</div><div class='del'>-		    goto out;</div><div class='del'>-	    } else if (CPU_IS_060) {</div><div class='del'>-		if (!(sc-&gt;sc_fpstate[3] == 0x00 ||</div><div class='del'>-                      sc-&gt;sc_fpstate[3] == 0x60 ||</div><div class='del'>-		      sc-&gt;sc_fpstate[3] == 0xe0))</div><div class='del'>-		    goto out;</div><div class='del'>-	    } else if (CPU_IS_COLDFIRE) {</div><div class='del'>-		if (!(sc-&gt;sc_fpstate[0] == 0x00 ||</div><div class='del'>-		      sc-&gt;sc_fpstate[0] == 0x05 ||</div><div class='del'>-		      sc-&gt;sc_fpstate[0] == 0xe5))</div><div class='del'>-		    goto out;</div><div class='del'>-	    } else</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	    if (CPU_IS_COLDFIRE) {</div><div class='del'>-		__asm__ volatile ("fmovemd %0,%%fp0-%%fp1\n\t"</div><div class='del'>-				  "fmovel %1,%%fpcr\n\t"</div><div class='del'>-				  "fmovel %2,%%fpsr\n\t"</div><div class='del'>-				  "fmovel %3,%%fpiar"</div><div class='del'>-				  : /* no outputs */</div><div class='del'>-				  : "m" (sc-&gt;sc_fpregs[0]),</div><div class='del'>-				    "m" (sc-&gt;sc_fpcntl[0]),</div><div class='del'>-				    "m" (sc-&gt;sc_fpcntl[1]),</div><div class='del'>-				    "m" (sc-&gt;sc_fpcntl[2]));</div><div class='del'>-	    } else {</div><div class='del'>-		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-				  "fmovemx %0,%%fp0-%%fp1\n\t"</div><div class='del'>-				  "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"</div><div class='del'>-				  ".chip 68k"</div><div class='del'>-				  : /* no outputs */</div><div class='del'>-				  : "m" (*sc-&gt;sc_fpregs),</div><div class='del'>-				    "m" (*sc-&gt;sc_fpcntl));</div><div class='del'>-	    }</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (CPU_IS_COLDFIRE) {</div><div class='del'>-		__asm__ volatile ("frestore %0" : : "m" (*sc-&gt;sc_fpstate));</div><div class='del'>-	} else {</div><div class='del'>-		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-				  "frestore %0\n\t"</div><div class='del'>-				  ".chip 68k"</div><div class='del'>-				  : : "m" (*sc-&gt;sc_fpstate));</div><div class='del'>-	}</div><div class='del'>-	err = 0;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define FPCONTEXT_SIZE	216</div><div class='del'>-#define uc_fpstate	uc_filler[0]</div><div class='del'>-#define uc_formatvec	uc_filler[FPCONTEXT_SIZE/4]</div><div class='del'>-#define uc_extra	uc_filler[FPCONTEXT_SIZE/4+1]</div><div class='del'>-</div><div class='del'>-static inline int rt_restore_fpu_state(struct ucontext __user *uc)</div><div class='del'>-{</div><div class='del'>-	unsigned char fpstate[FPCONTEXT_SIZE];</div><div class='del'>-	int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);</div><div class='del'>-	fpregset_t fpregs;</div><div class='del'>-	int err = 1;</div><div class='del'>-</div><div class='del'>-	if (FPU_IS_EMU) {</div><div class='del'>-		/* restore fpu control register */</div><div class='del'>-		if (__copy_from_user(current-&gt;thread.fpcntl,</div><div class='del'>-				uc-&gt;uc_mcontext.fpregs.f_fpcntl, 12))</div><div class='del'>-			goto out;</div><div class='del'>-		/* restore all other fpu register */</div><div class='del'>-		if (__copy_from_user(current-&gt;thread.fp,</div><div class='del'>-				uc-&gt;uc_mcontext.fpregs.f_fpregs, 96))</div><div class='del'>-			goto out;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (__get_user(*(long *)fpstate, (long __user *)&amp;uc-&gt;uc_fpstate))</div><div class='del'>-		goto out;</div><div class='del'>-	if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {</div><div class='del'>-		if (!(CPU_IS_060 || CPU_IS_COLDFIRE))</div><div class='del'>-			context_size = fpstate[1];</div><div class='del'>-		/* Verify the frame format.  */</div><div class='del'>-		if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &amp;&amp;</div><div class='del'>-		     (fpstate[0] != fpu_version))</div><div class='del'>-			goto out;</div><div class='del'>-		if (CPU_IS_020_OR_030) {</div><div class='del'>-			if (m68k_fputype &amp; FPU_68881 &amp;&amp;</div><div class='del'>-			    !(context_size == 0x18 || context_size == 0xb4))</div><div class='del'>-				goto out;</div><div class='del'>-			if (m68k_fputype &amp; FPU_68882 &amp;&amp;</div><div class='del'>-			    !(context_size == 0x38 || context_size == 0xd4))</div><div class='del'>-				goto out;</div><div class='del'>-		} else if (CPU_IS_040) {</div><div class='del'>-			if (!(context_size == 0x00 ||</div><div class='del'>-			      context_size == 0x28 ||</div><div class='del'>-			      context_size == 0x60))</div><div class='del'>-				goto out;</div><div class='del'>-		} else if (CPU_IS_060) {</div><div class='del'>-			if (!(fpstate[3] == 0x00 ||</div><div class='del'>-			      fpstate[3] == 0x60 ||</div><div class='del'>-			      fpstate[3] == 0xe0))</div><div class='del'>-				goto out;</div><div class='del'>-		} else if (CPU_IS_COLDFIRE) {</div><div class='del'>-			if (!(fpstate[3] == 0x00 ||</div><div class='del'>-			      fpstate[3] == 0x05 ||</div><div class='del'>-			      fpstate[3] == 0xe5))</div><div class='del'>-				goto out;</div><div class='del'>-		} else</div><div class='del'>-			goto out;</div><div class='del'>-		if (__copy_from_user(&amp;fpregs, &amp;uc-&gt;uc_mcontext.fpregs,</div><div class='del'>-				     sizeof(fpregs)))</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		if (CPU_IS_COLDFIRE) {</div><div class='del'>-			__asm__ volatile ("fmovemd %0,%%fp0-%%fp7\n\t"</div><div class='del'>-					  "fmovel %1,%%fpcr\n\t"</div><div class='del'>-					  "fmovel %2,%%fpsr\n\t"</div><div class='del'>-					  "fmovel %3,%%fpiar"</div><div class='del'>-					  : /* no outputs */</div><div class='del'>-					  : "m" (fpregs.f_fpregs[0]),</div><div class='del'>-					    "m" (fpregs.f_fpcntl[0]),</div><div class='del'>-					    "m" (fpregs.f_fpcntl[1]),</div><div class='del'>-					    "m" (fpregs.f_fpcntl[2]));</div><div class='del'>-		} else {</div><div class='del'>-			__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-					  "fmovemx %0,%%fp0-%%fp7\n\t"</div><div class='del'>-					  "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"</div><div class='del'>-					  ".chip 68k"</div><div class='del'>-					  : /* no outputs */</div><div class='del'>-					  : "m" (*fpregs.f_fpregs),</div><div class='del'>-					    "m" (*fpregs.f_fpcntl));</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (context_size &amp;&amp;</div><div class='del'>-	    __copy_from_user(fpstate + 4, (long __user *)&amp;uc-&gt;uc_fpstate + 1,</div><div class='del'>-			     context_size))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (CPU_IS_COLDFIRE) {</div><div class='del'>-		__asm__ volatile ("frestore %0" : : "m" (*fpstate));</div><div class='del'>-	} else {</div><div class='del'>-		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-				  "frestore %0\n\t"</div><div class='del'>-				  ".chip 68k"</div><div class='del'>-				  : : "m" (*fpstate));</div><div class='del'>-	}</div><div class='del'>-	err = 0;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,</div><div class='del'>-			       void __user *fp)</div><div class='del'>-{</div><div class='del'>-	int fsize = frame_extra_sizes[formatvec &gt;&gt; 12];</div><div class='del'>-	if (fsize &lt; 0) {</div><div class='del'>-		/*</div><div class='del'>-		 * user process trying to return with weird frame format</div><div class='del'>-		 */</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-		printk("user process returning with weird frame format\n");</div><div class='del'>-#endif</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	if (!fsize) {</div><div class='del'>-		regs-&gt;format = formatvec &gt;&gt; 12;</div><div class='del'>-		regs-&gt;vector = formatvec &amp; 0xfff;</div><div class='del'>-	} else {</div><div class='del'>-		struct switch_stack *sw = (struct switch_stack *)regs - 1;</div><div class='del'>-		unsigned long buf[fsize / 2]; /* yes, twice as much */</div><div class='del'>-</div><div class='del'>-		/* that'll make sure that expansion won't crap over data */</div><div class='del'>-		if (copy_from_user(buf + fsize / 4, fp, fsize))</div><div class='del'>-			return 1;</div><div class='del'>-</div><div class='del'>-		/* point of no return */</div><div class='del'>-		regs-&gt;format = formatvec &gt;&gt; 12;</div><div class='del'>-		regs-&gt;vector = formatvec &amp; 0xfff;</div><div class='del'>-#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))</div><div class='del'>-		__asm__ __volatile__ (</div><div class='del'>-#ifdef CONFIG_COLDFIRE</div><div class='del'>-			 "   movel %0,%/sp\n\t"</div><div class='del'>-			 "   bra ret_from_signal\n"</div><div class='del'>-#else</div><div class='del'>-			 "   movel %0,%/a0\n\t"</div><div class='del'>-			 "   subl %1,%/a0\n\t"     /* make room on stack */</div><div class='del'>-			 "   movel %/a0,%/sp\n\t"  /* set stack pointer */</div><div class='del'>-			 /* move switch_stack and pt_regs */</div><div class='del'>-			 "1: movel %0@+,%/a0@+\n\t"</div><div class='del'>-			 "   dbra %2,1b\n\t"</div><div class='del'>-			 "   lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */</div><div class='del'>-			 "   lsrl  #2,%1\n\t"</div><div class='del'>-			 "   subql #1,%1\n\t"</div><div class='del'>-			 /* copy to the gap we'd made */</div><div class='del'>-			 "2: movel %4@+,%/a0@+\n\t"</div><div class='del'>-			 "   dbra %1,2b\n\t"</div><div class='del'>-			 "   bral ret_from_signal\n"</div><div class='del'>-#endif</div><div class='del'>-			 : /* no outputs, it doesn't ever return */</div><div class='del'>-			 : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),</div><div class='del'>-			   "n" (frame_offset), "a" (buf + fsize/4)</div><div class='del'>-			 : "a0");</div><div class='del'>-#undef frame_offset</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp)</div><div class='del'>-{</div><div class='del'>-	int formatvec;</div><div class='del'>-	struct sigcontext context;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Always make any pending restarted system calls return -EINTR */</div><div class='del'>-	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='del'>-</div><div class='del'>-	/* get previous context */</div><div class='del'>-	if (copy_from_user(&amp;context, usc, sizeof(context)))</div><div class='del'>-		goto badframe;</div><div class='del'>-</div><div class='del'>-	/* restore passed registers */</div><div class='del'>-	regs-&gt;d0 = context.sc_d0;</div><div class='del'>-	regs-&gt;d1 = context.sc_d1;</div><div class='del'>-	regs-&gt;a0 = context.sc_a0;</div><div class='del'>-	regs-&gt;a1 = context.sc_a1;</div><div class='del'>-	regs-&gt;sr = (regs-&gt;sr &amp; 0xff00) | (context.sc_sr &amp; 0xff);</div><div class='del'>-	regs-&gt;pc = context.sc_pc;</div><div class='del'>-	regs-&gt;orig_d0 = -1;		/* disable syscall checks */</div><div class='del'>-	wrusp(context.sc_usp);</div><div class='del'>-	formatvec = context.sc_formatvec;</div><div class='del'>-</div><div class='del'>-	err = restore_fpu_state(&amp;context);</div><div class='del'>-</div><div class='del'>-	if (err || mangle_kernel_stack(regs, formatvec, fp))</div><div class='del'>-		goto badframe;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-badframe:</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,</div><div class='del'>-		    struct ucontext __user *uc)</div><div class='del'>-{</div><div class='del'>-	int temp;</div><div class='del'>-	greg_t __user *gregs = uc-&gt;uc_mcontext.gregs;</div><div class='del'>-	unsigned long usp;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Always make any pending restarted system calls return -EINTR */</div><div class='del'>-	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='del'>-</div><div class='del'>-	err = __get_user(temp, &amp;uc-&gt;uc_mcontext.version);</div><div class='del'>-	if (temp != MCONTEXT_VERSION)</div><div class='del'>-		goto badframe;</div><div class='del'>-	/* restore passed registers */</div><div class='del'>-	err |= __get_user(regs-&gt;d0, &amp;gregs[0]);</div><div class='del'>-	err |= __get_user(regs-&gt;d1, &amp;gregs[1]);</div><div class='del'>-	err |= __get_user(regs-&gt;d2, &amp;gregs[2]);</div><div class='del'>-	err |= __get_user(regs-&gt;d3, &amp;gregs[3]);</div><div class='del'>-	err |= __get_user(regs-&gt;d4, &amp;gregs[4]);</div><div class='del'>-	err |= __get_user(regs-&gt;d5, &amp;gregs[5]);</div><div class='del'>-	err |= __get_user(sw-&gt;d6, &amp;gregs[6]);</div><div class='del'>-	err |= __get_user(sw-&gt;d7, &amp;gregs[7]);</div><div class='del'>-	err |= __get_user(regs-&gt;a0, &amp;gregs[8]);</div><div class='del'>-	err |= __get_user(regs-&gt;a1, &amp;gregs[9]);</div><div class='del'>-	err |= __get_user(regs-&gt;a2, &amp;gregs[10]);</div><div class='del'>-	err |= __get_user(sw-&gt;a3, &amp;gregs[11]);</div><div class='del'>-	err |= __get_user(sw-&gt;a4, &amp;gregs[12]);</div><div class='del'>-	err |= __get_user(sw-&gt;a5, &amp;gregs[13]);</div><div class='del'>-	err |= __get_user(sw-&gt;a6, &amp;gregs[14]);</div><div class='del'>-	err |= __get_user(usp, &amp;gregs[15]);</div><div class='del'>-	wrusp(usp);</div><div class='del'>-	err |= __get_user(regs-&gt;pc, &amp;gregs[16]);</div><div class='del'>-	err |= __get_user(temp, &amp;gregs[17]);</div><div class='del'>-	regs-&gt;sr = (regs-&gt;sr &amp; 0xff00) | (temp &amp; 0xff);</div><div class='del'>-	regs-&gt;orig_d0 = -1;		/* disable syscall checks */</div><div class='del'>-	err |= __get_user(temp, &amp;uc-&gt;uc_formatvec);</div><div class='del'>-</div><div class='del'>-	err |= rt_restore_fpu_state(uc);</div><div class='del'>-</div><div class='del'>-	if (err || do_sigaltstack(&amp;uc-&gt;uc_stack, NULL, usp) == -EFAULT)</div><div class='del'>-		goto badframe;</div><div class='del'>-</div><div class='del'>-	if (mangle_kernel_stack(regs, temp, &amp;uc-&gt;uc_extra))</div><div class='del'>-		goto badframe;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-badframe:</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage int do_sigreturn(unsigned long __unused)</div><div class='del'>-{</div><div class='del'>-	struct switch_stack *sw = (struct switch_stack *) &amp;__unused;</div><div class='del'>-	struct pt_regs *regs = (struct pt_regs *) (sw + 1);</div><div class='del'>-	unsigned long usp = rdusp();</div><div class='del'>-	struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);</div><div class='del'>-	sigset_t set;</div><div class='del'>-</div><div class='del'>-	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))</div><div class='del'>-		goto badframe;</div><div class='del'>-	if (__get_user(set.sig[0], &amp;frame-&gt;sc.sc_mask) ||</div><div class='del'>-	    (_NSIG_WORDS &gt; 1 &amp;&amp;</div><div class='del'>-	     __copy_from_user(&amp;set.sig[1], &amp;frame-&gt;extramask,</div><div class='del'>-			      sizeof(frame-&gt;extramask))))</div><div class='del'>-		goto badframe;</div><div class='del'>-</div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-</div><div class='del'>-	if (restore_sigcontext(regs, &amp;frame-&gt;sc, frame + 1))</div><div class='del'>-		goto badframe;</div><div class='del'>-	return regs-&gt;d0;</div><div class='del'>-</div><div class='del'>-badframe:</div><div class='del'>-	force_sig(SIGSEGV, current);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage int do_rt_sigreturn(unsigned long __unused)</div><div class='del'>-{</div><div class='del'>-	struct switch_stack *sw = (struct switch_stack *) &amp;__unused;</div><div class='del'>-	struct pt_regs *regs = (struct pt_regs *) (sw + 1);</div><div class='del'>-	unsigned long usp = rdusp();</div><div class='del'>-	struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);</div><div class='del'>-	sigset_t set;</div><div class='del'>-</div><div class='del'>-	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))</div><div class='del'>-		goto badframe;</div><div class='del'>-	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='del'>-		goto badframe;</div><div class='del'>-</div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-</div><div class='del'>-	if (rt_restore_ucontext(regs, sw, &amp;frame-&gt;uc))</div><div class='del'>-		goto badframe;</div><div class='del'>-	return regs-&gt;d0;</div><div class='del'>-</div><div class='del'>-badframe:</div><div class='del'>-	force_sig(SIGSEGV, current);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Set up a signal frame.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	if (FPU_IS_EMU) {</div><div class='del'>-		/* save registers */</div><div class='del'>-		memcpy(sc-&gt;sc_fpcntl, current-&gt;thread.fpcntl, 12);</div><div class='del'>-		memcpy(sc-&gt;sc_fpregs, current-&gt;thread.fp, 24);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (CPU_IS_COLDFIRE) {</div><div class='del'>-		__asm__ volatile ("fsave %0"</div><div class='del'>-				  : : "m" (*sc-&gt;sc_fpstate) : "memory");</div><div class='del'>-	} else {</div><div class='del'>-		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-				  "fsave %0\n\t"</div><div class='del'>-				  ".chip 68k"</div><div class='del'>-				  : : "m" (*sc-&gt;sc_fpstate) : "memory");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (CPU_IS_060 ? sc-&gt;sc_fpstate[2] : sc-&gt;sc_fpstate[0]) {</div><div class='del'>-		fpu_version = sc-&gt;sc_fpstate[0];</div><div class='del'>-		if (CPU_IS_020_OR_030 &amp;&amp;</div><div class='del'>-		    regs-&gt;vector &gt;= (VEC_FPBRUC * 4) &amp;&amp;</div><div class='del'>-		    regs-&gt;vector &lt;= (VEC_FPNAN * 4)) {</div><div class='del'>-			/* Clear pending exception in 68882 idle frame */</div><div class='del'>-			if (*(unsigned short *) sc-&gt;sc_fpstate == 0x1f38)</div><div class='del'>-				sc-&gt;sc_fpstate[0x38] |= 1 &lt;&lt; 3;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (CPU_IS_COLDFIRE) {</div><div class='del'>-			__asm__ volatile ("fmovemd %%fp0-%%fp1,%0\n\t"</div><div class='del'>-					  "fmovel %%fpcr,%1\n\t"</div><div class='del'>-					  "fmovel %%fpsr,%2\n\t"</div><div class='del'>-					  "fmovel %%fpiar,%3"</div><div class='del'>-					  : "=m" (sc-&gt;sc_fpregs[0]),</div><div class='del'>-					    "=m" (sc-&gt;sc_fpcntl[0]),</div><div class='del'>-					    "=m" (sc-&gt;sc_fpcntl[1]),</div><div class='del'>-					    "=m" (sc-&gt;sc_fpcntl[2])</div><div class='del'>-					  : /* no inputs */</div><div class='del'>-					  : "memory");</div><div class='del'>-		} else {</div><div class='del'>-			__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-					  "fmovemx %%fp0-%%fp1,%0\n\t"</div><div class='del'>-					  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"</div><div class='del'>-					  ".chip 68k"</div><div class='del'>-					  : "=m" (*sc-&gt;sc_fpregs),</div><div class='del'>-					    "=m" (*sc-&gt;sc_fpcntl)</div><div class='del'>-					  : /* no inputs */</div><div class='del'>-					  : "memory");</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	unsigned char fpstate[FPCONTEXT_SIZE];</div><div class='del'>-	int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (FPU_IS_EMU) {</div><div class='del'>-		/* save fpu control register */</div><div class='del'>-		err |= copy_to_user(uc-&gt;uc_mcontext.fpregs.f_fpcntl,</div><div class='del'>-				current-&gt;thread.fpcntl, 12);</div><div class='del'>-		/* save all other fpu register */</div><div class='del'>-		err |= copy_to_user(uc-&gt;uc_mcontext.fpregs.f_fpregs,</div><div class='del'>-				current-&gt;thread.fp, 96);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (CPU_IS_COLDFIRE) {</div><div class='del'>-		__asm__ volatile ("fsave %0" : : "m" (*fpstate) : "memory");</div><div class='del'>-	} else {</div><div class='del'>-		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-				  "fsave %0\n\t"</div><div class='del'>-				  ".chip 68k"</div><div class='del'>-				  : : "m" (*fpstate) : "memory");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err |= __put_user(*(long *)fpstate, (long __user *)&amp;uc-&gt;uc_fpstate);</div><div class='del'>-	if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {</div><div class='del'>-		fpregset_t fpregs;</div><div class='del'>-		if (!(CPU_IS_060 || CPU_IS_COLDFIRE))</div><div class='del'>-			context_size = fpstate[1];</div><div class='del'>-		fpu_version = fpstate[0];</div><div class='del'>-		if (CPU_IS_020_OR_030 &amp;&amp;</div><div class='del'>-		    regs-&gt;vector &gt;= (VEC_FPBRUC * 4) &amp;&amp;</div><div class='del'>-		    regs-&gt;vector &lt;= (VEC_FPNAN * 4)) {</div><div class='del'>-			/* Clear pending exception in 68882 idle frame */</div><div class='del'>-			if (*(unsigned short *) fpstate == 0x1f38)</div><div class='del'>-				fpstate[0x38] |= 1 &lt;&lt; 3;</div><div class='del'>-		}</div><div class='del'>-		if (CPU_IS_COLDFIRE) {</div><div class='del'>-			__asm__ volatile ("fmovemd %%fp0-%%fp7,%0\n\t"</div><div class='del'>-					  "fmovel %%fpcr,%1\n\t"</div><div class='del'>-					  "fmovel %%fpsr,%2\n\t"</div><div class='del'>-					  "fmovel %%fpiar,%3"</div><div class='del'>-					  : "=m" (fpregs.f_fpregs[0]),</div><div class='del'>-					    "=m" (fpregs.f_fpcntl[0]),</div><div class='del'>-					    "=m" (fpregs.f_fpcntl[1]),</div><div class='del'>-					    "=m" (fpregs.f_fpcntl[2])</div><div class='del'>-					  : /* no inputs */</div><div class='del'>-					  : "memory");</div><div class='del'>-		} else {</div><div class='del'>-			__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-					  "fmovemx %%fp0-%%fp7,%0\n\t"</div><div class='del'>-					  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"</div><div class='del'>-					  ".chip 68k"</div><div class='del'>-					  : "=m" (*fpregs.f_fpregs),</div><div class='del'>-					    "=m" (*fpregs.f_fpcntl)</div><div class='del'>-					  : /* no inputs */</div><div class='del'>-					  : "memory");</div><div class='del'>-		}</div><div class='del'>-		err |= copy_to_user(&amp;uc-&gt;uc_mcontext.fpregs, &amp;fpregs,</div><div class='del'>-				    sizeof(fpregs));</div><div class='del'>-	}</div><div class='del'>-	if (context_size)</div><div class='del'>-		err |= copy_to_user((long __user *)&amp;uc-&gt;uc_fpstate + 1, fpstate + 4,</div><div class='del'>-				    context_size);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,</div><div class='del'>-			     unsigned long mask)</div><div class='del'>-{</div><div class='del'>-	sc-&gt;sc_mask = mask;</div><div class='del'>-	sc-&gt;sc_usp = rdusp();</div><div class='del'>-	sc-&gt;sc_d0 = regs-&gt;d0;</div><div class='del'>-	sc-&gt;sc_d1 = regs-&gt;d1;</div><div class='del'>-	sc-&gt;sc_a0 = regs-&gt;a0;</div><div class='del'>-	sc-&gt;sc_a1 = regs-&gt;a1;</div><div class='del'>-	sc-&gt;sc_sr = regs-&gt;sr;</div><div class='del'>-	sc-&gt;sc_pc = regs-&gt;pc;</div><div class='del'>-	sc-&gt;sc_formatvec = regs-&gt;format &lt;&lt; 12 | regs-&gt;vector;</div><div class='del'>-	save_fpu_state(sc, regs);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	struct switch_stack *sw = (struct switch_stack *)regs - 1;</div><div class='del'>-	greg_t __user *gregs = uc-&gt;uc_mcontext.gregs;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	err |= __put_user(MCONTEXT_VERSION, &amp;uc-&gt;uc_mcontext.version);</div><div class='del'>-	err |= __put_user(regs-&gt;d0, &amp;gregs[0]);</div><div class='del'>-	err |= __put_user(regs-&gt;d1, &amp;gregs[1]);</div><div class='del'>-	err |= __put_user(regs-&gt;d2, &amp;gregs[2]);</div><div class='del'>-	err |= __put_user(regs-&gt;d3, &amp;gregs[3]);</div><div class='del'>-	err |= __put_user(regs-&gt;d4, &amp;gregs[4]);</div><div class='del'>-	err |= __put_user(regs-&gt;d5, &amp;gregs[5]);</div><div class='del'>-	err |= __put_user(sw-&gt;d6, &amp;gregs[6]);</div><div class='del'>-	err |= __put_user(sw-&gt;d7, &amp;gregs[7]);</div><div class='del'>-	err |= __put_user(regs-&gt;a0, &amp;gregs[8]);</div><div class='del'>-	err |= __put_user(regs-&gt;a1, &amp;gregs[9]);</div><div class='del'>-	err |= __put_user(regs-&gt;a2, &amp;gregs[10]);</div><div class='del'>-	err |= __put_user(sw-&gt;a3, &amp;gregs[11]);</div><div class='del'>-	err |= __put_user(sw-&gt;a4, &amp;gregs[12]);</div><div class='del'>-	err |= __put_user(sw-&gt;a5, &amp;gregs[13]);</div><div class='del'>-	err |= __put_user(sw-&gt;a6, &amp;gregs[14]);</div><div class='del'>-	err |= __put_user(rdusp(), &amp;gregs[15]);</div><div class='del'>-	err |= __put_user(regs-&gt;pc, &amp;gregs[16]);</div><div class='del'>-	err |= __put_user(regs-&gt;sr, &amp;gregs[17]);</div><div class='del'>-	err |= __put_user((regs-&gt;format &lt;&lt; 12) | regs-&gt;vector, &amp;uc-&gt;uc_formatvec);</div><div class='del'>-	err |= rt_save_fpu_state(uc, regs);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void push_cache (unsigned long vaddr)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Using the old cache_push_v() was really a big waste.</div><div class='del'>-	 *</div><div class='del'>-	 * What we are trying to do is to flush 8 bytes to ram.</div><div class='del'>-	 * Flushing 2 cache lines of 16 bytes is much cheaper than</div><div class='del'>-	 * flushing 1 or 2 pages, as previously done in</div><div class='del'>-	 * cache_push_v().</div><div class='del'>-	 *                                                     Jes</div><div class='del'>-	 */</div><div class='del'>-	if (CPU_IS_040) {</div><div class='del'>-		unsigned long temp;</div><div class='del'>-</div><div class='del'>-		__asm__ __volatile__ (".chip 68040\n\t"</div><div class='del'>-				      "nop\n\t"</div><div class='del'>-				      "ptestr (%1)\n\t"</div><div class='del'>-				      "movec %%mmusr,%0\n\t"</div><div class='del'>-				      ".chip 68k"</div><div class='del'>-				      : "=r" (temp)</div><div class='del'>-				      : "a" (vaddr));</div><div class='del'>-</div><div class='del'>-		temp &amp;= PAGE_MASK;</div><div class='del'>-		temp |= vaddr &amp; ~PAGE_MASK;</div><div class='del'>-</div><div class='del'>-		__asm__ __volatile__ (".chip 68040\n\t"</div><div class='del'>-				      "nop\n\t"</div><div class='del'>-				      "cpushl %%bc,(%0)\n\t"</div><div class='del'>-				      ".chip 68k"</div><div class='del'>-				      : : "a" (temp));</div><div class='del'>-	}</div><div class='del'>-	else if (CPU_IS_060) {</div><div class='del'>-		unsigned long temp;</div><div class='del'>-		__asm__ __volatile__ (".chip 68060\n\t"</div><div class='del'>-				      "plpar (%0)\n\t"</div><div class='del'>-				      ".chip 68k"</div><div class='del'>-				      : "=a" (temp)</div><div class='del'>-				      : "0" (vaddr));</div><div class='del'>-		__asm__ __volatile__ (".chip 68060\n\t"</div><div class='del'>-				      "cpushl %%bc,(%0)\n\t"</div><div class='del'>-				      ".chip 68k"</div><div class='del'>-				      : : "a" (temp));</div><div class='del'>-	} else if (!CPU_IS_COLDFIRE) {</div><div class='del'>-		/*</div><div class='del'>-		 * 68030/68020 have no writeback cache;</div><div class='del'>-		 * still need to clear icache.</div><div class='del'>-		 * Note that vaddr is guaranteed to be long word aligned.</div><div class='del'>-		 */</div><div class='del'>-		unsigned long temp;</div><div class='del'>-		asm volatile ("movec %%cacr,%0" : "=r" (temp));</div><div class='del'>-		temp += 4;</div><div class='del'>-		asm volatile ("movec %0,%%caar\n\t"</div><div class='del'>-			      "movec %1,%%cacr"</div><div class='del'>-			      : : "r" (vaddr), "r" (temp));</div><div class='del'>-		asm volatile ("movec %0,%%caar\n\t"</div><div class='del'>-			      "movec %1,%%cacr"</div><div class='del'>-			      : : "r" (vaddr + 4), "r" (temp));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __user *</div><div class='del'>-get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)</div><div class='del'>-{</div><div class='del'>-	unsigned long usp;</div><div class='del'>-</div><div class='del'>-	/* Default to using normal stack.  */</div><div class='del'>-	usp = rdusp();</div><div class='del'>-</div><div class='del'>-	/* This is the X/Open sanctioned signal stack switching.  */</div><div class='del'>-	if (ka-&gt;sa.sa_flags &amp; SA_ONSTACK) {</div><div class='del'>-		if (!sas_ss_flags(usp))</div><div class='del'>-			usp = current-&gt;sas_ss_sp + current-&gt;sas_ss_size;</div><div class='del'>-	}</div><div class='del'>-	return (void __user *)((usp - frame_size) &amp; -8UL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int setup_frame (int sig, struct k_sigaction *ka,</div><div class='del'>-			 sigset_t *set, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	struct sigframe __user *frame;</div><div class='del'>-	int fsize = frame_extra_sizes[regs-&gt;format];</div><div class='del'>-	struct sigcontext context;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (fsize &lt; 0) {</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-		printk ("setup_frame: Unknown frame format %#x\n",</div><div class='del'>-			regs-&gt;format);</div><div class='del'>-#endif</div><div class='del'>-		goto give_sigsegv;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	frame = get_sigframe(ka, regs, sizeof(*frame) + fsize);</div><div class='del'>-</div><div class='del'>-	if (fsize)</div><div class='del'>-		err |= copy_to_user (frame + 1, regs + 1, fsize);</div><div class='del'>-</div><div class='del'>-	err |= __put_user((current_thread_info()-&gt;exec_domain</div><div class='del'>-			   &amp;&amp; current_thread_info()-&gt;exec_domain-&gt;signal_invmap</div><div class='del'>-			   &amp;&amp; sig &lt; 32</div><div class='del'>-			   ? current_thread_info()-&gt;exec_domain-&gt;signal_invmap[sig]</div><div class='del'>-			   : sig),</div><div class='del'>-			  &amp;frame-&gt;sig);</div><div class='del'>-</div><div class='del'>-	err |= __put_user(regs-&gt;vector, &amp;frame-&gt;code);</div><div class='del'>-	err |= __put_user(&amp;frame-&gt;sc, &amp;frame-&gt;psc);</div><div class='del'>-</div><div class='del'>-	if (_NSIG_WORDS &gt; 1)</div><div class='del'>-		err |= copy_to_user(frame-&gt;extramask, &amp;set-&gt;sig[1],</div><div class='del'>-				    sizeof(frame-&gt;extramask));</div><div class='del'>-</div><div class='del'>-	setup_sigcontext(&amp;context, regs, set-&gt;sig[0]);</div><div class='del'>-	err |= copy_to_user (&amp;frame-&gt;sc, &amp;context, sizeof(context));</div><div class='del'>-</div><div class='del'>-	/* Set up to return from userspace.  */</div><div class='del'>-	err |= __put_user(frame-&gt;retcode, &amp;frame-&gt;pretcode);</div><div class='del'>-	/* moveq #,d0; trap #0 */</div><div class='del'>-	err |= __put_user(0x70004e40 + (__NR_sigreturn &lt;&lt; 16),</div><div class='del'>-			  (long __user *)(frame-&gt;retcode));</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		goto give_sigsegv;</div><div class='del'>-</div><div class='del'>-	push_cache ((unsigned long) &amp;frame-&gt;retcode);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set up registers for signal handler.  All the state we are about</div><div class='del'>-	 * to destroy is successfully copied to sigframe.</div><div class='del'>-	 */</div><div class='del'>-	wrusp ((unsigned long) frame);</div><div class='del'>-	regs-&gt;pc = (unsigned long) ka-&gt;sa.sa_handler;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * This is subtle; if we build more than one sigframe, all but the</div><div class='del'>-	 * first one will see frame format 0 and have fsize == 0, so we won't</div><div class='del'>-	 * screw stkadj.</div><div class='del'>-	 */</div><div class='del'>-	if (fsize)</div><div class='del'>-		regs-&gt;stkadj = fsize;</div><div class='del'>-</div><div class='del'>-	/* Prepare to skip over the extra stuff in the exception frame.  */</div><div class='del'>-	if (regs-&gt;stkadj) {</div><div class='del'>-		struct pt_regs *tregs =</div><div class='del'>-			(struct pt_regs *)((ulong)regs + regs-&gt;stkadj);</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-		printk("Performing stackadjust=%04x\n", regs-&gt;stkadj);</div><div class='del'>-#endif</div><div class='del'>-		/* This must be copied with decreasing addresses to</div><div class='del'>-                   handle overlaps.  */</div><div class='del'>-		tregs-&gt;vector = 0;</div><div class='del'>-		tregs-&gt;format = 0;</div><div class='del'>-		tregs-&gt;pc = regs-&gt;pc;</div><div class='del'>-		tregs-&gt;sr = regs-&gt;sr;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-give_sigsegv:</div><div class='del'>-	force_sigsegv(sig, current);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='del'>-			    sigset_t *set, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	struct rt_sigframe __user *frame;</div><div class='del'>-	int fsize = frame_extra_sizes[regs-&gt;format];</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (fsize &lt; 0) {</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-		printk ("setup_frame: Unknown frame format %#x\n",</div><div class='del'>-			regs-&gt;format);</div><div class='del'>-#endif</div><div class='del'>-		goto give_sigsegv;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	frame = get_sigframe(ka, regs, sizeof(*frame));</div><div class='del'>-</div><div class='del'>-	if (fsize)</div><div class='del'>-		err |= copy_to_user (&amp;frame-&gt;uc.uc_extra, regs + 1, fsize);</div><div class='del'>-</div><div class='del'>-	err |= __put_user((current_thread_info()-&gt;exec_domain</div><div class='del'>-			   &amp;&amp; current_thread_info()-&gt;exec_domain-&gt;signal_invmap</div><div class='del'>-			   &amp;&amp; sig &lt; 32</div><div class='del'>-			   ? current_thread_info()-&gt;exec_domain-&gt;signal_invmap[sig]</div><div class='del'>-			   : sig),</div><div class='del'>-			  &amp;frame-&gt;sig);</div><div class='del'>-	err |= __put_user(&amp;frame-&gt;info, &amp;frame-&gt;pinfo);</div><div class='del'>-	err |= __put_user(&amp;frame-&gt;uc, &amp;frame-&gt;puc);</div><div class='del'>-	err |= copy_siginfo_to_user(&amp;frame-&gt;info, info);</div><div class='del'>-</div><div class='del'>-	/* Create the ucontext.  */</div><div class='del'>-	err |= __put_user(0, &amp;frame-&gt;uc.uc_flags);</div><div class='del'>-	err |= __put_user(NULL, &amp;frame-&gt;uc.uc_link);</div><div class='del'>-	err |= __put_user((void __user *)current-&gt;sas_ss_sp,</div><div class='del'>-			  &amp;frame-&gt;uc.uc_stack.ss_sp);</div><div class='del'>-	err |= __put_user(sas_ss_flags(rdusp()),</div><div class='del'>-			  &amp;frame-&gt;uc.uc_stack.ss_flags);</div><div class='del'>-	err |= __put_user(current-&gt;sas_ss_size, &amp;frame-&gt;uc.uc_stack.ss_size);</div><div class='del'>-	err |= rt_setup_ucontext(&amp;frame-&gt;uc, regs);</div><div class='del'>-	err |= copy_to_user (&amp;frame-&gt;uc.uc_sigmask, set, sizeof(*set));</div><div class='del'>-</div><div class='del'>-	/* Set up to return from userspace.  */</div><div class='del'>-	err |= __put_user(frame-&gt;retcode, &amp;frame-&gt;pretcode);</div><div class='del'>-#ifdef __mcoldfire__</div><div class='del'>-	/* movel #__NR_rt_sigreturn,d0; trap #0 */</div><div class='del'>-	err |= __put_user(0x203c0000, (long __user *)(frame-&gt;retcode + 0));</div><div class='del'>-	err |= __put_user(0x00004e40 + (__NR_rt_sigreturn &lt;&lt; 16),</div><div class='del'>-			  (long __user *)(frame-&gt;retcode + 4));</div><div class='del'>-#else</div><div class='del'>-	/* moveq #,d0; notb d0; trap #0 */</div><div class='del'>-	err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) &lt;&lt; 16),</div><div class='del'>-			  (long __user *)(frame-&gt;retcode + 0));</div><div class='del'>-	err |= __put_user(0x4e40, (short __user *)(frame-&gt;retcode + 4));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		goto give_sigsegv;</div><div class='del'>-</div><div class='del'>-	push_cache ((unsigned long) &amp;frame-&gt;retcode);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set up registers for signal handler.  All the state we are about</div><div class='del'>-	 * to destroy is successfully copied to sigframe.</div><div class='del'>-	 */</div><div class='del'>-	wrusp ((unsigned long) frame);</div><div class='del'>-	regs-&gt;pc = (unsigned long) ka-&gt;sa.sa_handler;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * This is subtle; if we build more than one sigframe, all but the</div><div class='del'>-	 * first one will see frame format 0 and have fsize == 0, so we won't</div><div class='del'>-	 * screw stkadj.</div><div class='del'>-	 */</div><div class='del'>-	if (fsize)</div><div class='del'>-		regs-&gt;stkadj = fsize;</div><div class='del'>-</div><div class='del'>-	/* Prepare to skip over the extra stuff in the exception frame.  */</div><div class='del'>-	if (regs-&gt;stkadj) {</div><div class='del'>-		struct pt_regs *tregs =</div><div class='del'>-			(struct pt_regs *)((ulong)regs + regs-&gt;stkadj);</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-		printk("Performing stackadjust=%04x\n", regs-&gt;stkadj);</div><div class='del'>-#endif</div><div class='del'>-		/* This must be copied with decreasing addresses to</div><div class='del'>-                   handle overlaps.  */</div><div class='del'>-		tregs-&gt;vector = 0;</div><div class='del'>-		tregs-&gt;format = 0;</div><div class='del'>-		tregs-&gt;pc = regs-&gt;pc;</div><div class='del'>-		tregs-&gt;sr = regs-&gt;sr;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-give_sigsegv:</div><div class='del'>-	force_sigsegv(sig, current);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)</div><div class='del'>-{</div><div class='del'>-	switch (regs-&gt;d0) {</div><div class='del'>-	case -ERESTARTNOHAND:</div><div class='del'>-		if (!has_handler)</div><div class='del'>-			goto do_restart;</div><div class='del'>-		regs-&gt;d0 = -EINTR;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case -ERESTART_RESTARTBLOCK:</div><div class='del'>-		if (!has_handler) {</div><div class='del'>-			regs-&gt;d0 = __NR_restart_syscall;</div><div class='del'>-			regs-&gt;pc -= 2;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		regs-&gt;d0 = -EINTR;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case -ERESTARTSYS:</div><div class='del'>-		if (has_handler &amp;&amp; !(ka-&gt;sa.sa_flags &amp; SA_RESTART)) {</div><div class='del'>-			regs-&gt;d0 = -EINTR;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	/* fallthrough */</div><div class='del'>-	case -ERESTARTNOINTR:</div><div class='del'>-	do_restart:</div><div class='del'>-		regs-&gt;d0 = regs-&gt;orig_d0;</div><div class='del'>-		regs-&gt;pc -= 2;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)</div><div class='del'>-{</div><div class='del'>-	if (regs-&gt;orig_d0 &lt; 0)</div><div class='del'>-		return;</div><div class='del'>-	switch (regs-&gt;d0) {</div><div class='del'>-	case -ERESTARTNOHAND:</div><div class='del'>-	case -ERESTARTSYS:</div><div class='del'>-	case -ERESTARTNOINTR:</div><div class='del'>-		regs-&gt;d0 = regs-&gt;orig_d0;</div><div class='del'>-		regs-&gt;orig_d0 = -1;</div><div class='del'>-		regs-&gt;pc -= 2;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * OK, we're invoking a handler</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='del'>-	      sigset_t *oldset, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	/* are we from a system call? */</div><div class='del'>-	if (regs-&gt;orig_d0 &gt;= 0)</div><div class='del'>-		/* If so, check system call restarting.. */</div><div class='del'>-		handle_restart(regs, ka, 1);</div><div class='del'>-</div><div class='del'>-	/* set up the stack frame */</div><div class='del'>-	if (ka-&gt;sa.sa_flags &amp; SA_SIGINFO)</div><div class='del'>-		err = setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='del'>-	else</div><div class='del'>-		err = setup_frame(sig, ka, oldset, regs);</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	sigorsets(&amp;current-&gt;blocked,&amp;current-&gt;blocked,&amp;ka-&gt;sa.sa_mask);</div><div class='del'>-	if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-		sigaddset(&amp;current-&gt;blocked,sig);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-</div><div class='del'>-	if (test_thread_flag(TIF_DELAYED_TRACE)) {</div><div class='del'>-		regs-&gt;sr &amp;= ~0x8000;</div><div class='del'>-		send_sig(SIGTRAP, current, 1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Note that 'init' is a special process: it doesn't get signals it doesn't</div><div class='del'>- * want to handle. Thus you cannot kill init even with a SIGKILL even by</div><div class='del'>- * mistake.</div><div class='del'>- */</div><div class='del'>-asmlinkage void do_signal(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	siginfo_t info;</div><div class='del'>-	struct k_sigaction ka;</div><div class='del'>-	int signr;</div><div class='del'>-	sigset_t *oldset;</div><div class='del'>-</div><div class='del'>-	current-&gt;thread.esp0 = (unsigned long) regs;</div><div class='del'>-</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='del'>-	if (signr &gt; 0) {</div><div class='del'>-		/* Whee!  Actually deliver the signal.  */</div><div class='del'>-		handle_signal(signr, &amp;ka, &amp;info, oldset, regs);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Did we come from a system call? */</div><div class='del'>-	if (regs-&gt;orig_d0 &gt;= 0)</div><div class='del'>-		/* Restart the system call - no handlers present */</div><div class='del'>-		handle_restart(regs, NULL, 0);</div><div class='del'>-</div><div class='del'>-	/* If there's no signal to deliver, we just restore the saved mask.  */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/arch/m68k/kernel/signal_no.c b/arch/m68k/kernel/signal_no.c<br/>deleted file mode 100644<br/>index 36a81bb6835a..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/kernel/signal_no.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/kernel/signal_no.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,765 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/arch/m68knommu/kernel/signal.c</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1991, 1992  Linus Torvalds</div><div class='del'>- *</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License.  See the file COPYING in the main directory of this archive</div><div class='del'>- * for more details.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Linux/m68k support by Hamish Macdonald</div><div class='del'>- *</div><div class='del'>- * 68060 fixes by Jesper Skov</div><div class='del'>- *</div><div class='del'>- * 1997-12-01  Modified for POSIX.1b signals by Andreas Schwab</div><div class='del'>- *</div><div class='del'>- * mathemu support by Roman Zippel</div><div class='del'>- *  (Note: fpstate in the signal context is completely ignored for the emulator</div><div class='del'>- *         and the internal floating point format is put on stack)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ++roman (07/09/96): implemented signal stacks (specially for tosemu on</div><div class='del'>- * Atari :-) Current limitation: Only one sigstack can be active at one time.</div><div class='del'>- * If a second signal with SA_ONSTACK set arrives while working on a sigstack,</div><div class='del'>- * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested</div><div class='del'>- * signal handlers!</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/signal.h&gt;</div><div class='del'>-#include &lt;linux/syscalls.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/wait.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/unistd.h&gt;</div><div class='del'>-#include &lt;linux/stddef.h&gt;</div><div class='del'>-#include &lt;linux/highuid.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='del'>-#include &lt;linux/personality.h&gt;</div><div class='del'>-#include &lt;linux/binfmts.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/setup.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/traps.h&gt;</div><div class='del'>-#include &lt;asm/ucontext.h&gt;</div><div class='del'>-</div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='del'>-void ret_from_user_signal(void);</div><div class='del'>-void ret_from_user_rt_signal(void);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Atomically swap in the new signal mask, and wait for a signal.</div><div class='del'>- */</div><div class='del'>-asmlinkage int</div><div class='del'>-sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)</div><div class='del'>-{</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-	siginitset(&amp;current-&gt;blocked, mask);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_restore_sigmask();</div><div class='del'>-</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage int</div><div class='del'>-sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='del'>-	      struct old_sigaction __user *oact)</div><div class='del'>-{</div><div class='del'>-	struct k_sigaction new_ka, old_ka;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (act) {</div><div class='del'>-		old_sigset_t mask;</div><div class='del'>-		if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='del'>-		    __get_user(mask, &amp;act-&gt;sa_mask))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		siginitset(&amp;new_ka.sa.sa_mask, mask);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = do_sigaction(sig, act ? &amp;new_ka : NULL, oact ? &amp;old_ka : NULL);</div><div class='del'>-</div><div class='del'>-	if (!ret &amp;&amp; oact) {</div><div class='del'>-		if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_handler, &amp;oact-&gt;sa_handler) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage int</div><div class='del'>-sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)</div><div class='del'>-{</div><div class='del'>-	return do_sigaltstack(uss, uoss, rdusp());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Do a signal return; undo the signal stack.</div><div class='del'>- *</div><div class='del'>- * Keep the return code on the stack quadword aligned!</div><div class='del'>- * That makes the cache flush below easier.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct sigframe</div><div class='del'>-{</div><div class='del'>-	char __user *pretcode;</div><div class='del'>-	int sig;</div><div class='del'>-	int code;</div><div class='del'>-	struct sigcontext __user *psc;</div><div class='del'>-	char retcode[8];</div><div class='del'>-	unsigned long extramask[_NSIG_WORDS-1];</div><div class='del'>-	struct sigcontext sc;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct rt_sigframe</div><div class='del'>-{</div><div class='del'>-	char __user *pretcode;</div><div class='del'>-	int sig;</div><div class='del'>-	struct siginfo __user *pinfo;</div><div class='del'>-	void __user *puc;</div><div class='del'>-	char retcode[8];</div><div class='del'>-	struct siginfo info;</div><div class='del'>-	struct ucontext uc;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_FPU</div><div class='del'>-</div><div class='del'>-static unsigned char fpu_version = 0;	/* version number of fpu, set by setup_frame */</div><div class='del'>-</div><div class='del'>-static inline int restore_fpu_state(struct sigcontext *sc)</div><div class='del'>-{</div><div class='del'>-	int err = 1;</div><div class='del'>-</div><div class='del'>-	if (FPU_IS_EMU) {</div><div class='del'>-	    /* restore registers */</div><div class='del'>-	    memcpy(current-&gt;thread.fpcntl, sc-&gt;sc_fpcntl, 12);</div><div class='del'>-	    memcpy(current-&gt;thread.fp, sc-&gt;sc_fpregs, 24);</div><div class='del'>-	    return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (sc-&gt;sc_fpstate[0]) {</div><div class='del'>-	    /* Verify the frame format.  */</div><div class='del'>-	    if (sc-&gt;sc_fpstate[0] != fpu_version)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	    __asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-			      "fmovemx %0,%%fp0-%%fp1\n\t"</div><div class='del'>-			      "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"</div><div class='del'>-			      ".chip 68k"</div><div class='del'>-			      : /* no outputs */</div><div class='del'>-			      : "m" (*sc-&gt;sc_fpregs), "m" (*sc-&gt;sc_fpcntl));</div><div class='del'>-	}</div><div class='del'>-	__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-			  "frestore %0\n\t"</div><div class='del'>-			  ".chip 68k" : : "m" (*sc-&gt;sc_fpstate));</div><div class='del'>-	err = 0;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define FPCONTEXT_SIZE	216</div><div class='del'>-#define uc_fpstate	uc_filler[0]</div><div class='del'>-#define uc_formatvec	uc_filler[FPCONTEXT_SIZE/4]</div><div class='del'>-#define uc_extra	uc_filler[FPCONTEXT_SIZE/4+1]</div><div class='del'>-</div><div class='del'>-static inline int rt_restore_fpu_state(struct ucontext __user *uc)</div><div class='del'>-{</div><div class='del'>-	unsigned char fpstate[FPCONTEXT_SIZE];</div><div class='del'>-	int context_size = 0;</div><div class='del'>-	fpregset_t fpregs;</div><div class='del'>-	int err = 1;</div><div class='del'>-</div><div class='del'>-	if (FPU_IS_EMU) {</div><div class='del'>-		/* restore fpu control register */</div><div class='del'>-		if (__copy_from_user(current-&gt;thread.fpcntl,</div><div class='del'>-				uc-&gt;uc_mcontext.fpregs.f_fpcntl, 12))</div><div class='del'>-			goto out;</div><div class='del'>-		/* restore all other fpu register */</div><div class='del'>-		if (__copy_from_user(current-&gt;thread.fp,</div><div class='del'>-				uc-&gt;uc_mcontext.fpregs.f_fpregs, 96))</div><div class='del'>-			goto out;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (__get_user(*(long *)fpstate, (long __user *)&amp;uc-&gt;uc_fpstate))</div><div class='del'>-		goto out;</div><div class='del'>-	if (fpstate[0]) {</div><div class='del'>-		context_size = fpstate[1];</div><div class='del'>-</div><div class='del'>-		/* Verify the frame format.  */</div><div class='del'>-		if (fpstate[0] != fpu_version)</div><div class='del'>-			goto out;</div><div class='del'>-		if (__copy_from_user(&amp;fpregs, &amp;uc-&gt;uc_mcontext.fpregs,</div><div class='del'>-		     sizeof(fpregs)))</div><div class='del'>-			goto out;</div><div class='del'>-		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-				  "fmovemx %0,%%fp0-%%fp7\n\t"</div><div class='del'>-				  "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"</div><div class='del'>-				  ".chip 68k"</div><div class='del'>-				  : /* no outputs */</div><div class='del'>-				  : "m" (*fpregs.f_fpregs),</div><div class='del'>-				    "m" (*fpregs.f_fpcntl));</div><div class='del'>-	}</div><div class='del'>-	if (context_size &amp;&amp;</div><div class='del'>-	    __copy_from_user(fpstate + 4, (long __user *)&amp;uc-&gt;uc_fpstate + 1,</div><div class='del'>-			     context_size))</div><div class='del'>-		goto out;</div><div class='del'>-	__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-			  "frestore %0\n\t"</div><div class='del'>-			  ".chip 68k" : : "m" (*fpstate));</div><div class='del'>-	err = 0;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp,</div><div class='del'>-		   int *pd0)</div><div class='del'>-{</div><div class='del'>-	int formatvec;</div><div class='del'>-	struct sigcontext context;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	/* Always make any pending restarted system calls return -EINTR */</div><div class='del'>-	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='del'>-</div><div class='del'>-	/* get previous context */</div><div class='del'>-	if (copy_from_user(&amp;context, usc, sizeof(context)))</div><div class='del'>-		goto badframe;</div><div class='del'>-	</div><div class='del'>-	/* restore passed registers */</div><div class='del'>-	regs-&gt;d1 = context.sc_d1;</div><div class='del'>-	regs-&gt;a0 = context.sc_a0;</div><div class='del'>-	regs-&gt;a1 = context.sc_a1;</div><div class='del'>-	((struct switch_stack *)regs - 1)-&gt;a5 = context.sc_a5;</div><div class='del'>-	regs-&gt;sr = (regs-&gt;sr &amp; 0xff00) | (context.sc_sr &amp; 0xff);</div><div class='del'>-	regs-&gt;pc = context.sc_pc;</div><div class='del'>-	regs-&gt;orig_d0 = -1;		/* disable syscall checks */</div><div class='del'>-	wrusp(context.sc_usp);</div><div class='del'>-	formatvec = context.sc_formatvec;</div><div class='del'>-	regs-&gt;format = formatvec &gt;&gt; 12;</div><div class='del'>-	regs-&gt;vector = formatvec &amp; 0xfff;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_FPU</div><div class='del'>-	err = restore_fpu_state(&amp;context);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	*pd0 = context.sc_d0;</div><div class='del'>-	return err;</div><div class='del'>-</div><div class='del'>-badframe:</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,</div><div class='del'>-		    struct ucontext __user *uc, int *pd0)</div><div class='del'>-{</div><div class='del'>-	int temp;</div><div class='del'>-	greg_t __user *gregs = uc-&gt;uc_mcontext.gregs;</div><div class='del'>-	unsigned long usp;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Always make any pending restarted system calls return -EINTR */</div><div class='del'>-	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='del'>-</div><div class='del'>-	err = __get_user(temp, &amp;uc-&gt;uc_mcontext.version);</div><div class='del'>-	if (temp != MCONTEXT_VERSION)</div><div class='del'>-		goto badframe;</div><div class='del'>-	/* restore passed registers */</div><div class='del'>-	err |= __get_user(regs-&gt;d0, &amp;gregs[0]);</div><div class='del'>-	err |= __get_user(regs-&gt;d1, &amp;gregs[1]);</div><div class='del'>-	err |= __get_user(regs-&gt;d2, &amp;gregs[2]);</div><div class='del'>-	err |= __get_user(regs-&gt;d3, &amp;gregs[3]);</div><div class='del'>-	err |= __get_user(regs-&gt;d4, &amp;gregs[4]);</div><div class='del'>-	err |= __get_user(regs-&gt;d5, &amp;gregs[5]);</div><div class='del'>-	err |= __get_user(sw-&gt;d6, &amp;gregs[6]);</div><div class='del'>-	err |= __get_user(sw-&gt;d7, &amp;gregs[7]);</div><div class='del'>-	err |= __get_user(regs-&gt;a0, &amp;gregs[8]);</div><div class='del'>-	err |= __get_user(regs-&gt;a1, &amp;gregs[9]);</div><div class='del'>-	err |= __get_user(regs-&gt;a2, &amp;gregs[10]);</div><div class='del'>-	err |= __get_user(sw-&gt;a3, &amp;gregs[11]);</div><div class='del'>-	err |= __get_user(sw-&gt;a4, &amp;gregs[12]);</div><div class='del'>-	err |= __get_user(sw-&gt;a5, &amp;gregs[13]);</div><div class='del'>-	err |= __get_user(sw-&gt;a6, &amp;gregs[14]);</div><div class='del'>-	err |= __get_user(usp, &amp;gregs[15]);</div><div class='del'>-	wrusp(usp);</div><div class='del'>-	err |= __get_user(regs-&gt;pc, &amp;gregs[16]);</div><div class='del'>-	err |= __get_user(temp, &amp;gregs[17]);</div><div class='del'>-	regs-&gt;sr = (regs-&gt;sr &amp; 0xff00) | (temp &amp; 0xff);</div><div class='del'>-	regs-&gt;orig_d0 = -1;		/* disable syscall checks */</div><div class='del'>-	regs-&gt;format = temp &gt;&gt; 12;</div><div class='del'>-	regs-&gt;vector = temp &amp; 0xfff;</div><div class='del'>-</div><div class='del'>-	if (do_sigaltstack(&amp;uc-&gt;uc_stack, NULL, usp) == -EFAULT)</div><div class='del'>-		goto badframe;</div><div class='del'>-</div><div class='del'>-	*pd0 = regs-&gt;d0;</div><div class='del'>-	return err;</div><div class='del'>-</div><div class='del'>-badframe:</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage int do_sigreturn(unsigned long __unused)</div><div class='del'>-{</div><div class='del'>-	struct switch_stack *sw = (struct switch_stack *) &amp;__unused;</div><div class='del'>-	struct pt_regs *regs = (struct pt_regs *) (sw + 1);</div><div class='del'>-	unsigned long usp = rdusp();</div><div class='del'>-	struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);</div><div class='del'>-	sigset_t set;</div><div class='del'>-	int d0;</div><div class='del'>-</div><div class='del'>-	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))</div><div class='del'>-		goto badframe;</div><div class='del'>-	if (__get_user(set.sig[0], &amp;frame-&gt;sc.sc_mask) ||</div><div class='del'>-	    (_NSIG_WORDS &gt; 1 &amp;&amp;</div><div class='del'>-	     __copy_from_user(&amp;set.sig[1], &amp;frame-&gt;extramask,</div><div class='del'>-			      sizeof(frame-&gt;extramask))))</div><div class='del'>-		goto badframe;</div><div class='del'>-</div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	</div><div class='del'>-	if (restore_sigcontext(regs, &amp;frame-&gt;sc, frame + 1, &amp;d0))</div><div class='del'>-		goto badframe;</div><div class='del'>-	return d0;</div><div class='del'>-</div><div class='del'>-badframe:</div><div class='del'>-	force_sig(SIGSEGV, current);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage int do_rt_sigreturn(unsigned long __unused)</div><div class='del'>-{</div><div class='del'>-	struct switch_stack *sw = (struct switch_stack *) &amp;__unused;</div><div class='del'>-	struct pt_regs *regs = (struct pt_regs *) (sw + 1);</div><div class='del'>-	unsigned long usp = rdusp();</div><div class='del'>-	struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);</div><div class='del'>-	sigset_t set;</div><div class='del'>-	int d0;</div><div class='del'>-</div><div class='del'>-	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))</div><div class='del'>-		goto badframe;</div><div class='del'>-	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='del'>-		goto badframe;</div><div class='del'>-</div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	</div><div class='del'>-	if (rt_restore_ucontext(regs, sw, &amp;frame-&gt;uc, &amp;d0))</div><div class='del'>-		goto badframe;</div><div class='del'>-	return d0;</div><div class='del'>-</div><div class='del'>-badframe:</div><div class='del'>-	force_sig(SIGSEGV, current);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_FPU</div><div class='del'>-/*</div><div class='del'>- * Set up a signal frame.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	if (FPU_IS_EMU) {</div><div class='del'>-		/* save registers */</div><div class='del'>-		memcpy(sc-&gt;sc_fpcntl, current-&gt;thread.fpcntl, 12);</div><div class='del'>-		memcpy(sc-&gt;sc_fpregs, current-&gt;thread.fp, 24);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-			  "fsave %0\n\t"</div><div class='del'>-			  ".chip 68k"</div><div class='del'>-			  : : "m" (*sc-&gt;sc_fpstate) : "memory");</div><div class='del'>-</div><div class='del'>-	if (sc-&gt;sc_fpstate[0]) {</div><div class='del'>-		fpu_version = sc-&gt;sc_fpstate[0];</div><div class='del'>-		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-				  "fmovemx %%fp0-%%fp1,%0\n\t"</div><div class='del'>-				  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"</div><div class='del'>-				  ".chip 68k"</div><div class='del'>-				  : "=m" (*sc-&gt;sc_fpregs),</div><div class='del'>-				    "=m" (*sc-&gt;sc_fpcntl)</div><div class='del'>-				  : /* no inputs */</div><div class='del'>-				  : "memory");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	unsigned char fpstate[FPCONTEXT_SIZE];</div><div class='del'>-	int context_size = 0;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (FPU_IS_EMU) {</div><div class='del'>-		/* save fpu control register */</div><div class='del'>-		err |= copy_to_user(uc-&gt;uc_mcontext.fpregs.f_pcntl,</div><div class='del'>-				current-&gt;thread.fpcntl, 12);</div><div class='del'>-		/* save all other fpu register */</div><div class='del'>-		err |= copy_to_user(uc-&gt;uc_mcontext.fpregs.f_fpregs,</div><div class='del'>-				current-&gt;thread.fp, 96);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-			  "fsave %0\n\t"</div><div class='del'>-			  ".chip 68k"</div><div class='del'>-			  : : "m" (*fpstate) : "memory");</div><div class='del'>-</div><div class='del'>-	err |= __put_user(*(long *)fpstate, (long __user *)&amp;uc-&gt;uc_fpstate);</div><div class='del'>-	if (fpstate[0]) {</div><div class='del'>-		fpregset_t fpregs;</div><div class='del'>-		context_size = fpstate[1];</div><div class='del'>-		fpu_version = fpstate[0];</div><div class='del'>-		__asm__ volatile (".chip 68k/68881\n\t"</div><div class='del'>-				  "fmovemx %%fp0-%%fp7,%0\n\t"</div><div class='del'>-				  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"</div><div class='del'>-				  ".chip 68k"</div><div class='del'>-				  : "=m" (*fpregs.f_fpregs),</div><div class='del'>-				    "=m" (*fpregs.f_fpcntl)</div><div class='del'>-				  : /* no inputs */</div><div class='del'>-				  : "memory");</div><div class='del'>-		err |= copy_to_user(&amp;uc-&gt;uc_mcontext.fpregs, &amp;fpregs,</div><div class='del'>-				    sizeof(fpregs));</div><div class='del'>-	}</div><div class='del'>-	if (context_size)</div><div class='del'>-		err |= copy_to_user((long __user *)&amp;uc-&gt;uc_fpstate + 1, fpstate + 4,</div><div class='del'>-				    context_size);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,</div><div class='del'>-			     unsigned long mask)</div><div class='del'>-{</div><div class='del'>-	sc-&gt;sc_mask = mask;</div><div class='del'>-	sc-&gt;sc_usp = rdusp();</div><div class='del'>-	sc-&gt;sc_d0 = regs-&gt;d0;</div><div class='del'>-	sc-&gt;sc_d1 = regs-&gt;d1;</div><div class='del'>-	sc-&gt;sc_a0 = regs-&gt;a0;</div><div class='del'>-	sc-&gt;sc_a1 = regs-&gt;a1;</div><div class='del'>-	sc-&gt;sc_a5 = ((struct switch_stack *)regs - 1)-&gt;a5;</div><div class='del'>-	sc-&gt;sc_sr = regs-&gt;sr;</div><div class='del'>-	sc-&gt;sc_pc = regs-&gt;pc;</div><div class='del'>-	sc-&gt;sc_formatvec = regs-&gt;format &lt;&lt; 12 | regs-&gt;vector;</div><div class='del'>-#ifdef CONFIG_FPU</div><div class='del'>-	save_fpu_state(sc, regs);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	struct switch_stack *sw = (struct switch_stack *)regs - 1;</div><div class='del'>-	greg_t __user *gregs = uc-&gt;uc_mcontext.gregs;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	err |= __put_user(MCONTEXT_VERSION, &amp;uc-&gt;uc_mcontext.version);</div><div class='del'>-	err |= __put_user(regs-&gt;d0, &amp;gregs[0]);</div><div class='del'>-	err |= __put_user(regs-&gt;d1, &amp;gregs[1]);</div><div class='del'>-	err |= __put_user(regs-&gt;d2, &amp;gregs[2]);</div><div class='del'>-	err |= __put_user(regs-&gt;d3, &amp;gregs[3]);</div><div class='del'>-	err |= __put_user(regs-&gt;d4, &amp;gregs[4]);</div><div class='del'>-	err |= __put_user(regs-&gt;d5, &amp;gregs[5]);</div><div class='del'>-	err |= __put_user(sw-&gt;d6, &amp;gregs[6]);</div><div class='del'>-	err |= __put_user(sw-&gt;d7, &amp;gregs[7]);</div><div class='del'>-	err |= __put_user(regs-&gt;a0, &amp;gregs[8]);</div><div class='del'>-	err |= __put_user(regs-&gt;a1, &amp;gregs[9]);</div><div class='del'>-	err |= __put_user(regs-&gt;a2, &amp;gregs[10]);</div><div class='del'>-	err |= __put_user(sw-&gt;a3, &amp;gregs[11]);</div><div class='del'>-	err |= __put_user(sw-&gt;a4, &amp;gregs[12]);</div><div class='del'>-	err |= __put_user(sw-&gt;a5, &amp;gregs[13]);</div><div class='del'>-	err |= __put_user(sw-&gt;a6, &amp;gregs[14]);</div><div class='del'>-	err |= __put_user(rdusp(), &amp;gregs[15]);</div><div class='del'>-	err |= __put_user(regs-&gt;pc, &amp;gregs[16]);</div><div class='del'>-	err |= __put_user(regs-&gt;sr, &amp;gregs[17]);</div><div class='del'>-#ifdef CONFIG_FPU</div><div class='del'>-	err |= rt_save_fpu_state(uc, regs);</div><div class='del'>-#endif</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void __user *</div><div class='del'>-get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)</div><div class='del'>-{</div><div class='del'>-	unsigned long usp;</div><div class='del'>-</div><div class='del'>-	/* Default to using normal stack.  */</div><div class='del'>-	usp = rdusp();</div><div class='del'>-</div><div class='del'>-	/* This is the X/Open sanctioned signal stack switching.  */</div><div class='del'>-	if (ka-&gt;sa.sa_flags &amp; SA_ONSTACK) {</div><div class='del'>-		if (!sas_ss_flags(usp))</div><div class='del'>-			usp = current-&gt;sas_ss_sp + current-&gt;sas_ss_size;</div><div class='del'>-	}</div><div class='del'>-	return (void __user *)((usp - frame_size) &amp; -8UL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int setup_frame (int sig, struct k_sigaction *ka,</div><div class='del'>-			 sigset_t *set, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	struct sigframe __user *frame;</div><div class='del'>-	struct sigcontext context;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	frame = get_sigframe(ka, regs, sizeof(*frame));</div><div class='del'>-</div><div class='del'>-	err |= __put_user((current_thread_info()-&gt;exec_domain</div><div class='del'>-			   &amp;&amp; current_thread_info()-&gt;exec_domain-&gt;signal_invmap</div><div class='del'>-			   &amp;&amp; sig &lt; 32</div><div class='del'>-			   ? current_thread_info()-&gt;exec_domain-&gt;signal_invmap[sig]</div><div class='del'>-			   : sig),</div><div class='del'>-			  &amp;frame-&gt;sig);</div><div class='del'>-</div><div class='del'>-	err |= __put_user(regs-&gt;vector, &amp;frame-&gt;code);</div><div class='del'>-	err |= __put_user(&amp;frame-&gt;sc, &amp;frame-&gt;psc);</div><div class='del'>-</div><div class='del'>-	if (_NSIG_WORDS &gt; 1)</div><div class='del'>-		err |= copy_to_user(frame-&gt;extramask, &amp;set-&gt;sig[1],</div><div class='del'>-				    sizeof(frame-&gt;extramask));</div><div class='del'>-</div><div class='del'>-	setup_sigcontext(&amp;context, regs, set-&gt;sig[0]);</div><div class='del'>-	err |= copy_to_user (&amp;frame-&gt;sc, &amp;context, sizeof(context));</div><div class='del'>-</div><div class='del'>-	/* Set up to return from userspace.  */</div><div class='del'>-	err |= __put_user((void *) ret_from_user_signal, &amp;frame-&gt;pretcode);</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		goto give_sigsegv;</div><div class='del'>-</div><div class='del'>-	/* Set up registers for signal handler */</div><div class='del'>-	wrusp ((unsigned long) frame);</div><div class='del'>-	regs-&gt;pc = (unsigned long) ka-&gt;sa.sa_handler;</div><div class='del'>-	((struct switch_stack *)regs - 1)-&gt;a5 = current-&gt;mm-&gt;start_data;</div><div class='del'>-	regs-&gt;format = 0x4; /*set format byte to make stack appear modulo 4 </div><div class='del'>-						which it will be when doing the rte */</div><div class='del'>-</div><div class='del'>-adjust_stack:</div><div class='del'>-	/* Prepare to skip over the extra stuff in the exception frame.  */</div><div class='del'>-	if (regs-&gt;stkadj) {</div><div class='del'>-		struct pt_regs *tregs =</div><div class='del'>-			(struct pt_regs *)((ulong)regs + regs-&gt;stkadj);</div><div class='del'>-#if defined(DEBUG)</div><div class='del'>-		printk(KERN_DEBUG "Performing stackadjust=%04x\n", regs-&gt;stkadj);</div><div class='del'>-#endif</div><div class='del'>-		/* This must be copied with decreasing addresses to</div><div class='del'>-                   handle overlaps.  */</div><div class='del'>-		tregs-&gt;vector = 0;</div><div class='del'>-		tregs-&gt;format = 0;</div><div class='del'>-		tregs-&gt;pc = regs-&gt;pc;</div><div class='del'>-		tregs-&gt;sr = regs-&gt;sr;</div><div class='del'>-	}</div><div class='del'>-	return err;</div><div class='del'>-</div><div class='del'>-give_sigsegv:</div><div class='del'>-	force_sigsegv(sig, current);</div><div class='del'>-	goto adjust_stack;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='del'>-			    sigset_t *set, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	struct rt_sigframe __user *frame;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	frame = get_sigframe(ka, regs, sizeof(*frame));</div><div class='del'>-</div><div class='del'>-	err |= __put_user((current_thread_info()-&gt;exec_domain</div><div class='del'>-			   &amp;&amp; current_thread_info()-&gt;exec_domain-&gt;signal_invmap</div><div class='del'>-			   &amp;&amp; sig &lt; 32</div><div class='del'>-			   ? current_thread_info()-&gt;exec_domain-&gt;signal_invmap[sig]</div><div class='del'>-			   : sig),</div><div class='del'>-			  &amp;frame-&gt;sig);</div><div class='del'>-	err |= __put_user(&amp;frame-&gt;info, &amp;frame-&gt;pinfo);</div><div class='del'>-	err |= __put_user(&amp;frame-&gt;uc, &amp;frame-&gt;puc);</div><div class='del'>-	err |= copy_siginfo_to_user(&amp;frame-&gt;info, info);</div><div class='del'>-</div><div class='del'>-	/* Create the ucontext.  */</div><div class='del'>-	err |= __put_user(0, &amp;frame-&gt;uc.uc_flags);</div><div class='del'>-	err |= __put_user(NULL, &amp;frame-&gt;uc.uc_link);</div><div class='del'>-	err |= __put_user((void __user *)current-&gt;sas_ss_sp,</div><div class='del'>-			  &amp;frame-&gt;uc.uc_stack.ss_sp);</div><div class='del'>-	err |= __put_user(sas_ss_flags(rdusp()),</div><div class='del'>-			  &amp;frame-&gt;uc.uc_stack.ss_flags);</div><div class='del'>-	err |= __put_user(current-&gt;sas_ss_size, &amp;frame-&gt;uc.uc_stack.ss_size);</div><div class='del'>-	err |= rt_setup_ucontext(&amp;frame-&gt;uc, regs);</div><div class='del'>-	err |= copy_to_user (&amp;frame-&gt;uc.uc_sigmask, set, sizeof(*set));</div><div class='del'>-</div><div class='del'>-	/* Set up to return from userspace.  */</div><div class='del'>-	err |= __put_user((void *) ret_from_user_rt_signal, &amp;frame-&gt;pretcode);</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		goto give_sigsegv;</div><div class='del'>-</div><div class='del'>-	/* Set up registers for signal handler */</div><div class='del'>-	wrusp ((unsigned long) frame);</div><div class='del'>-	regs-&gt;pc = (unsigned long) ka-&gt;sa.sa_handler;</div><div class='del'>-	((struct switch_stack *)regs - 1)-&gt;a5 = current-&gt;mm-&gt;start_data;</div><div class='del'>-	regs-&gt;format = 0x4; /*set format byte to make stack appear modulo 4 </div><div class='del'>-						which it will be when doing the rte */</div><div class='del'>-</div><div class='del'>-adjust_stack:</div><div class='del'>-	/* Prepare to skip over the extra stuff in the exception frame.  */</div><div class='del'>-	if (regs-&gt;stkadj) {</div><div class='del'>-		struct pt_regs *tregs =</div><div class='del'>-			(struct pt_regs *)((ulong)regs + regs-&gt;stkadj);</div><div class='del'>-#if defined(DEBUG)</div><div class='del'>-		printk(KERN_DEBUG "Performing stackadjust=%04x\n", regs-&gt;stkadj);</div><div class='del'>-#endif</div><div class='del'>-		/* This must be copied with decreasing addresses to</div><div class='del'>-                   handle overlaps.  */</div><div class='del'>-		tregs-&gt;vector = 0;</div><div class='del'>-		tregs-&gt;format = 0;</div><div class='del'>-		tregs-&gt;pc = regs-&gt;pc;</div><div class='del'>-		tregs-&gt;sr = regs-&gt;sr;</div><div class='del'>-	}</div><div class='del'>-	return err;</div><div class='del'>-</div><div class='del'>-give_sigsegv:</div><div class='del'>-	force_sigsegv(sig, current);</div><div class='del'>-	goto adjust_stack;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)</div><div class='del'>-{</div><div class='del'>-	switch (regs-&gt;d0) {</div><div class='del'>-	case -ERESTARTNOHAND:</div><div class='del'>-		if (!has_handler)</div><div class='del'>-			goto do_restart;</div><div class='del'>-		regs-&gt;d0 = -EINTR;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case -ERESTART_RESTARTBLOCK:</div><div class='del'>-		if (!has_handler) {</div><div class='del'>-			regs-&gt;d0 = __NR_restart_syscall;</div><div class='del'>-			regs-&gt;pc -= 2;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		regs-&gt;d0 = -EINTR;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case -ERESTARTSYS:</div><div class='del'>-		if (has_handler &amp;&amp; !(ka-&gt;sa.sa_flags &amp; SA_RESTART)) {</div><div class='del'>-			regs-&gt;d0 = -EINTR;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	/* fallthrough */</div><div class='del'>-	case -ERESTARTNOINTR:</div><div class='del'>-	do_restart:</div><div class='del'>-		regs-&gt;d0 = regs-&gt;orig_d0;</div><div class='del'>-		regs-&gt;pc -= 2;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * OK, we're invoking a handler</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='del'>-	      sigset_t *oldset, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	/* are we from a system call? */</div><div class='del'>-	if (regs-&gt;orig_d0 &gt;= 0)</div><div class='del'>-		/* If so, check system call restarting.. */</div><div class='del'>-		handle_restart(regs, ka, 1);</div><div class='del'>-</div><div class='del'>-	/* set up the stack frame */</div><div class='del'>-	if (ka-&gt;sa.sa_flags &amp; SA_SIGINFO)</div><div class='del'>-		err = setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='del'>-	else</div><div class='del'>-		err = setup_frame(sig, ka, oldset, regs);</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	sigorsets(&amp;current-&gt;blocked,&amp;current-&gt;blocked,&amp;ka-&gt;sa.sa_mask);</div><div class='del'>-	if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-		sigaddset(&amp;current-&gt;blocked,sig);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Note that 'init' is a special process: it doesn't get signals it doesn't</div><div class='del'>- * want to handle. Thus you cannot kill init even with a SIGKILL even by</div><div class='del'>- * mistake.</div><div class='del'>- */</div><div class='del'>-asmlinkage void do_signal(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	struct k_sigaction ka;</div><div class='del'>-	siginfo_t info;</div><div class='del'>-	int signr;</div><div class='del'>-	sigset_t *oldset;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We want the common case to go fast, which</div><div class='del'>-	 * is why we may in certain cases get here from</div><div class='del'>-	 * kernel mode. Just return without doing anything</div><div class='del'>-	 * if so.</div><div class='del'>-	 */</div><div class='del'>-	if (!user_mode(regs))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='del'>-	if (signr &gt; 0) {</div><div class='del'>-		/* Whee!  Actually deliver the signal.  */</div><div class='del'>-		handle_signal(signr, &amp;ka, &amp;info, oldset, regs);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Did we come from a system call? */</div><div class='del'>-	if (regs-&gt;orig_d0 &gt;= 0) {</div><div class='del'>-		/* Restart the system call - no handlers present */</div><div class='del'>-		handle_restart(regs, NULL, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If there's no signal to deliver, we just restore the saved mask.  */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/arch/m68k/mm/fault.c b/arch/m68k/mm/fault.c<br/>index 6b020a8461e7..aeebbb7b30f0 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/mm/fault.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/mm/fault.c</a></div><div class='hunk'>@@ -72,7 +72,8 @@ int do_page_fault(struct pt_regs *regs, unsigned long address,</div><div class='ctx'> {</div><div class='ctx'> 	struct mm_struct *mm = current-&gt;mm;</div><div class='ctx'> 	struct vm_area_struct * vma;</div><div class='del'>-	int write, fault;</div><div class='add'>+	int fault;</div><div class='add'>+	unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;</div><div class='ctx'> </div><div class='ctx'> #ifdef DEBUG</div><div class='ctx'> 	printk ("do page fault:\nregs-&gt;sr=%#x, regs-&gt;pc=%#lx, address=%#lx, %ld, %p\n",</div><div class='hunk'>@@ -87,6 +88,7 @@ int do_page_fault(struct pt_regs *regs, unsigned long address,</div><div class='ctx'> 	if (in_atomic() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='add'>+retry:</div><div class='ctx'> 	down_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> </div><div class='ctx'> 	vma = find_vma(mm, address);</div><div class='hunk'>@@ -117,14 +119,13 @@ good_area:</div><div class='ctx'> #ifdef DEBUG</div><div class='ctx'> 	printk("do_page_fault: good_area\n");</div><div class='ctx'> #endif</div><div class='del'>-	write = 0;</div><div class='ctx'> 	switch (error_code &amp; 3) {</div><div class='ctx'> 		default:	/* 3: write, present */</div><div class='ctx'> 			/* fall through */</div><div class='ctx'> 		case 2:		/* write, not present */</div><div class='ctx'> 			if (!(vma-&gt;vm_flags &amp; VM_WRITE))</div><div class='ctx'> 				goto acc_err;</div><div class='del'>-			write++;</div><div class='add'>+			flags |= FAULT_FLAG_WRITE;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 1:		/* read, present */</div><div class='ctx'> 			goto acc_err;</div><div class='hunk'>@@ -139,10 +140,14 @@ good_area:</div><div class='ctx'> 	 * the fault.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0);</div><div class='add'>+	fault = handle_mm_fault(mm, vma, address, flags);</div><div class='ctx'> #ifdef DEBUG</div><div class='ctx'> 	printk("handle_mm_fault returns %d\n",fault);</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+	if ((fault &amp; VM_FAULT_RETRY) &amp;&amp; fatal_signal_pending(current))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(fault &amp; VM_FAULT_ERROR)) {</div><div class='ctx'> 		if (fault &amp; VM_FAULT_OOM)</div><div class='ctx'> 			goto out_of_memory;</div><div class='hunk'>@@ -150,10 +155,31 @@ good_area:</div><div class='ctx'> 			goto bus_err;</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='del'>-	if (fault &amp; VM_FAULT_MAJOR)</div><div class='del'>-		current-&gt;maj_flt++;</div><div class='del'>-	else</div><div class='del'>-		current-&gt;min_flt++;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Major/minor page fault accounting is only done on the</div><div class='add'>+	 * initial attempt. If we go through a retry, it is extremely</div><div class='add'>+	 * likely that the page will be found in page cache at that point.</div><div class='add'>+	 */</div><div class='add'>+	if (flags &amp; FAULT_FLAG_ALLOW_RETRY) {</div><div class='add'>+		if (fault &amp; VM_FAULT_MAJOR)</div><div class='add'>+			current-&gt;maj_flt++;</div><div class='add'>+		else</div><div class='add'>+			current-&gt;min_flt++;</div><div class='add'>+		if (fault &amp; VM_FAULT_RETRY) {</div><div class='add'>+			/* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk</div><div class='add'>+			 * of starvation. */</div><div class='add'>+			flags &amp;= ~FAULT_FLAG_ALLOW_RETRY;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * No need to up_read(&amp;mm-&gt;mmap_sem) as we would</div><div class='add'>+			 * have already released it in __lock_page_or_retry</div><div class='add'>+			 * in mm/filemap.c.</div><div class='add'>+			 */</div><div class='add'>+</div><div class='add'>+			goto retry;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	up_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/m68k/platform/5206/Makefile b/arch/m68k/platform/5206/Makefile<br/>deleted file mode 100644<br/>index b5db05625cfa..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5206/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5206/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the m68knommu linux kernel.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# If you want to play with the HW breakpoints then you will</div><div class='del'>-# need to add define this,  which will give you a stack backtrace</div><div class='del'>-# on the console port whenever a DBG interrupt occurs.  You have to</div><div class='del'>-# set up you HW breakpoints to trigger a DBG interrupt:</div><div class='del'>-#</div><div class='del'>-# ccflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-# asflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1</div><div class='del'>-</div><div class='del'>-obj-y := config.o gpio.o</div><div class='del'>-</div><div class='head'>diff --git a/arch/m68k/platform/5206/gpio.c b/arch/m68k/platform/5206/gpio.c<br/>deleted file mode 100644<br/>index b9ab4a120f28..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5206/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5206/gpio.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,49 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Coldfire generic GPIO support</div><div class='del'>- *</div><div class='del'>- * (C) Copyright 2009, Steven King &lt;sfking@fdwdc.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/coldfire.h&gt;</div><div class='del'>-#include &lt;asm/mcfsim.h&gt;</div><div class='del'>-#include &lt;asm/mcfgpio.h&gt;</div><div class='del'>-</div><div class='del'>-static struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "PP",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFSIM_PADDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFSIM_PADAT,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFSIM_PADAT,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mcf_gpio_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned i = 0;</div><div class='del'>-	while (i &lt; ARRAY_SIZE(mcf_gpio_chips))</div><div class='del'>-		(void)gpiochip_add((struct gpio_chip *)&amp;mcf_gpio_chips[i++]);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-core_initcall(mcf_gpio_init);</div><div class='head'>diff --git a/arch/m68k/platform/520x/Makefile b/arch/m68k/platform/520x/Makefile<br/>deleted file mode 100644<br/>index ad3f4e5a57ce..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/520x/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/520x/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the M5208 specific file.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# If you want to play with the HW breakpoints then you will</div><div class='del'>-# need to add define this,  which will give you a stack backtrace</div><div class='del'>-# on the console port whenever a DBG interrupt occurs.  You have to</div><div class='del'>-# set up you HW breakpoints to trigger a DBG interrupt:</div><div class='del'>-#</div><div class='del'>-# ccflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-# asflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1</div><div class='del'>-</div><div class='del'>-obj-y := config.o gpio.o</div><div class='head'>diff --git a/arch/m68k/platform/520x/gpio.c b/arch/m68k/platform/520x/gpio.c<br/>deleted file mode 100644<br/>index 9bcc3e4b60c5..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/520x/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/520x/gpio.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,175 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Coldfire generic GPIO support</div><div class='del'>- *</div><div class='del'>- * (C) Copyright 2009, Steven King &lt;sfking@fdwdc.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/coldfire.h&gt;</div><div class='del'>-#include &lt;asm/mcfsim.h&gt;</div><div class='del'>-#include &lt;asm/mcfgpio.h&gt;</div><div class='del'>-</div><div class='del'>-static struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "PIRQ",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFEPORT_EPDDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFEPORT_EPDR,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFEPORT_EPPDR,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "CS",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 9,</div><div class='del'>-			.ngpio			= 3,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_CS,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_CS,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_CS,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_CS,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_CS,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FECI2C",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 16,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FECI2C,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FECI2C,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FECI2C,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FECI2C,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FECI2C,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "QSPI",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 24,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_QSPI,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_QSPI,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_QSPI,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_QSPI,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_QSPI,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "TIMER",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 32,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_TIMER,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_TIMER,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_TIMER,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_TIMER,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_TIMER,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "UART",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 40,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_UART,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_UART,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_UART,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_UART,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_UART,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FECH",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 48,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FECH,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FECH,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FECH,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FECH,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FECH,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FECL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 56,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FECL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FECL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FECL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FECL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FECL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mcf_gpio_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned i = 0;</div><div class='del'>-	while (i &lt; ARRAY_SIZE(mcf_gpio_chips))</div><div class='del'>-		(void)gpiochip_add((struct gpio_chip *)&amp;mcf_gpio_chips[i++]);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-core_initcall(mcf_gpio_init);</div><div class='head'>diff --git a/arch/m68k/platform/523x/Makefile b/arch/m68k/platform/523x/Makefile<br/>deleted file mode 100644<br/>index c04b8f71c88c..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/523x/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/523x/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the m68knommu linux kernel.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# If you want to play with the HW breakpoints then you will</div><div class='del'>-# need to add define this,  which will give you a stack backtrace</div><div class='del'>-# on the console port whenever a DBG interrupt occurs.  You have to</div><div class='del'>-# set up you HW breakpoints to trigger a DBG interrupt:</div><div class='del'>-#</div><div class='del'>-# ccflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-# asflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1</div><div class='del'>-</div><div class='del'>-obj-y := config.o gpio.o</div><div class='head'>diff --git a/arch/m68k/platform/523x/gpio.c b/arch/m68k/platform/523x/gpio.c<br/>deleted file mode 100644<br/>index 327ebf142c8e..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/523x/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/523x/gpio.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,284 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Coldfire generic GPIO support</div><div class='del'>- *</div><div class='del'>- * (C) Copyright 2009, Steven King &lt;sfking@fdwdc.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/coldfire.h&gt;</div><div class='del'>-#include &lt;asm/mcfsim.h&gt;</div><div class='del'>-#include &lt;asm/mcfgpio.h&gt;</div><div class='del'>-</div><div class='del'>-static struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "PIRQ",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.base			= 1,</div><div class='del'>-			.ngpio			= 7,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFEPORT_EPDDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFEPORT_EPDR,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFEPORT_EPPDR,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "ADDR",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 13,</div><div class='del'>-			.ngpio			= 3,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_ADDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_ADDR,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_ADDR,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_ADDR,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_ADDR,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "DATAH",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 16,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_DATAH,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_DATAH,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_DATAH,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_DATAH,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_DATAH,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "DATAL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 24,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_DATAL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_DATAL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_DATAL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_DATAL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_DATAL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "BUSCTL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 32,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_BUSCTL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_BUSCTL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_BUSCTL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "BS",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 40,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_BS,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_BS,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_BS,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_BS,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_BS,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "CS",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 49,</div><div class='del'>-			.ngpio			= 7,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_CS,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_CS,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_CS,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_CS,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_CS,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "SDRAM",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 56,</div><div class='del'>-			.ngpio			= 6,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_SDRAM,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_SDRAM,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_SDRAM,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_SDRAM,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_SDRAM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FECI2C",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 64,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FECI2C,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FECI2C,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FECI2C,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FECI2C,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FECI2C,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "UARTH",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 72,</div><div class='del'>-			.ngpio			= 2,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_UARTH,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_UARTH,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_UARTH,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_UARTH,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_UARTH,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "UARTL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 80,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_UARTL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_UARTL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_UARTL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_UARTL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_UARTL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "QSPI",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 88,</div><div class='del'>-			.ngpio			= 5,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_QSPI,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_QSPI,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_QSPI,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_QSPI,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_QSPI,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "TIMER",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 96,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_TIMER,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_TIMER,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_TIMER,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_TIMER,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_TIMER,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "ETPU",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 104,</div><div class='del'>-			.ngpio			= 3,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_ETPU,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_ETPU,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_ETPU,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_ETPU,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_ETPU,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mcf_gpio_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned i = 0;</div><div class='del'>-	while (i &lt; ARRAY_SIZE(mcf_gpio_chips))</div><div class='del'>-		(void)gpiochip_add((struct gpio_chip *)&amp;mcf_gpio_chips[i++]);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-core_initcall(mcf_gpio_init);</div><div class='head'>diff --git a/arch/m68k/platform/5249/Makefile b/arch/m68k/platform/5249/Makefile<br/>deleted file mode 100644<br/>index 4bed30fd0073..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5249/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5249/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the m68knommu linux kernel.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# If you want to play with the HW breakpoints then you will</div><div class='del'>-# need to add define this,  which will give you a stack backtrace</div><div class='del'>-# on the console port whenever a DBG interrupt occurs.  You have to</div><div class='del'>-# set up you HW breakpoints to trigger a DBG interrupt:</div><div class='del'>-#</div><div class='del'>-# ccflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-# asflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1</div><div class='del'>-</div><div class='del'>-obj-y := config.o gpio.o intc2.o</div><div class='del'>-</div><div class='head'>diff --git a/arch/m68k/platform/5249/gpio.c b/arch/m68k/platform/5249/gpio.c<br/>deleted file mode 100644<br/>index 2b56c6ef65bf..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5249/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5249/gpio.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,65 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Coldfire generic GPIO support</div><div class='del'>- *</div><div class='del'>- * (C) Copyright 2009, Steven King &lt;sfking@fdwdc.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/coldfire.h&gt;</div><div class='del'>-#include &lt;asm/mcfsim.h&gt;</div><div class='del'>-#include &lt;asm/mcfgpio.h&gt;</div><div class='del'>-</div><div class='del'>-static struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "GPIO0",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.ngpio			= 32,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFSIM2_GPIOENABLE,</div><div class='del'>-		.podr				= (void __iomem *) MCFSIM2_GPIOWRITE,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFSIM2_GPIOREAD,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "GPIO1",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.base			= 32,</div><div class='del'>-			.ngpio			= 32,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFSIM2_GPIO1ENABLE,</div><div class='del'>-		.podr				= (void __iomem *) MCFSIM2_GPIO1WRITE,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFSIM2_GPIO1READ,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mcf_gpio_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned i = 0;</div><div class='del'>-	while (i &lt; ARRAY_SIZE(mcf_gpio_chips))</div><div class='del'>-		(void)gpiochip_add((struct gpio_chip *)&amp;mcf_gpio_chips[i++]);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-core_initcall(mcf_gpio_init);</div><div class='head'>diff --git a/arch/m68k/platform/5272/Makefile b/arch/m68k/platform/5272/Makefile<br/>deleted file mode 100644<br/>index 34110fc14301..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5272/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5272/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the linux kernel.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# If you want to play with the HW breakpoints then you will</div><div class='del'>-# need to add define this,  which will give you a stack backtrace</div><div class='del'>-# on the console port whenever a DBG interrupt occurs.  You have to</div><div class='del'>-# set up you HW breakpoints to trigger a DBG interrupt:</div><div class='del'>-#</div><div class='del'>-# ccflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-# asflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1</div><div class='del'>-</div><div class='del'>-obj-y := config.o gpio.o intc.o</div><div class='del'>-</div><div class='head'>diff --git a/arch/m68k/platform/5272/gpio.c b/arch/m68k/platform/5272/gpio.c<br/>deleted file mode 100644<br/>index 57ac10a5d7f7..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5272/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5272/gpio.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,81 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Coldfire generic GPIO support</div><div class='del'>- *</div><div class='del'>- * (C) Copyright 2009, Steven King &lt;sfking@fdwdc.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/coldfire.h&gt;</div><div class='del'>-#include &lt;asm/mcfsim.h&gt;</div><div class='del'>-#include &lt;asm/mcfgpio.h&gt;</div><div class='del'>-</div><div class='del'>-static struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "PA",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.ngpio			= 16,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFSIM_PADDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFSIM_PADAT,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFSIM_PADAT,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "PB",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.base			= 16,</div><div class='del'>-			.ngpio			= 16,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFSIM_PBDDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFSIM_PBDAT,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFSIM_PBDAT,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "PC",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.base			= 32,</div><div class='del'>-			.ngpio			= 16,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFSIM_PCDDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFSIM_PCDAT,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFSIM_PCDAT,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mcf_gpio_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned i = 0;</div><div class='del'>-	while (i &lt; ARRAY_SIZE(mcf_gpio_chips))</div><div class='del'>-		(void)gpiochip_add((struct gpio_chip *)&amp;mcf_gpio_chips[i++]);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-core_initcall(mcf_gpio_init);</div><div class='head'>diff --git a/arch/m68k/platform/527x/Makefile b/arch/m68k/platform/527x/Makefile<br/>deleted file mode 100644<br/>index 6ac4b57370ea..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/527x/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/527x/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the linux kernel.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# If you want to play with the HW breakpoints then you will</div><div class='del'>-# need to add define this,  which will give you a stack backtrace</div><div class='del'>-# on the console port whenever a DBG interrupt occurs.  You have to</div><div class='del'>-# set up you HW breakpoints to trigger a DBG interrupt:</div><div class='del'>-#</div><div class='del'>-# ccflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-# asflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1</div><div class='del'>-</div><div class='del'>-obj-y := config.o gpio.o</div><div class='del'>-</div><div class='head'>diff --git a/arch/m68k/platform/527x/gpio.c b/arch/m68k/platform/527x/gpio.c<br/>deleted file mode 100644<br/>index 205da0aa0f2d..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/527x/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/527x/gpio.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,609 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Coldfire generic GPIO support</div><div class='del'>- *</div><div class='del'>- * (C) Copyright 2009, Steven King &lt;sfking@fdwdc.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/coldfire.h&gt;</div><div class='del'>-#include &lt;asm/mcfsim.h&gt;</div><div class='del'>-#include &lt;asm/mcfgpio.h&gt;</div><div class='del'>-</div><div class='del'>-static struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='del'>-#if defined(CONFIG_M5271)</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "PIRQ",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.base			= 1,</div><div class='del'>-			.ngpio			= 7,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFEPORT_EPDDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFEPORT_EPDR,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFEPORT_EPPDR,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "ADDR",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 13,</div><div class='del'>-			.ngpio			= 3,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_ADDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_ADDR,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_ADDR,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_ADDR,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_ADDR,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "DATAH",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 16,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_DATAH,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_DATAH,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_DATAH,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_DATAH,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_DATAH,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "DATAL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 24,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_DATAL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_DATAL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_DATAL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_DATAL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_DATAL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "BUSCTL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 32,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_BUSCTL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_BUSCTL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_BUSCTL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "BS",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 40,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_BS,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_BS,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_BS,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_BS,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_BS,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "CS",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 49,</div><div class='del'>-			.ngpio			= 7,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_CS,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_CS,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_CS,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_CS,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_CS,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "SDRAM",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 56,</div><div class='del'>-			.ngpio			= 6,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_SDRAM,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_SDRAM,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_SDRAM,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_SDRAM,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_SDRAM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FECI2C",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 64,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FECI2C,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FECI2C,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FECI2C,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FECI2C,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FECI2C,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "UARTH",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 72,</div><div class='del'>-			.ngpio			= 2,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_UARTH,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_UARTH,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_UARTH,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_UARTH,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_UARTH,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "UARTL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 80,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_UARTL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_UARTL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_UARTL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_UARTL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_UARTL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "QSPI",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 88,</div><div class='del'>-			.ngpio			= 5,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_QSPI,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_QSPI,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_QSPI,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_QSPI,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_QSPI,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "TIMER",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 96,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_TIMER,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_TIMER,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_TIMER,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_TIMER,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_TIMER,</div><div class='del'>-	},</div><div class='del'>-#elif defined(CONFIG_M5275)</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "PIRQ",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.base			= 1,</div><div class='del'>-			.ngpio			= 7,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFEPORT_EPDDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFEPORT_EPDR,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFEPORT_EPPDR,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "BUSCTL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 8,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_BUSCTL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_BUSCTL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_BUSCTL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "ADDR",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 21,</div><div class='del'>-			.ngpio			= 3,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_ADDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_ADDR,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_ADDR,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_ADDR,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_ADDR,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "CS",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 25,</div><div class='del'>-			.ngpio			= 7,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_CS,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_CS,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_CS,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_CS,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_CS,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FEC0H",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 32,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FEC0H,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FEC0H,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FEC0H,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FEC0H,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FEC0H,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FEC0L",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 40,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FEC0L,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FEC0L,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FEC0L,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FEC0L,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FEC0L,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FECI2C",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 48,</div><div class='del'>-			.ngpio			= 6,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FECI2C,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FECI2C,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FECI2C,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FECI2C,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FECI2C,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "QSPI",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 56,</div><div class='del'>-			.ngpio			= 7,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_QSPI,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_QSPI,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_QSPI,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_QSPI,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_QSPI,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "SDRAM",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 64,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_SDRAM,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_SDRAM,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_SDRAM,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_SDRAM,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_SDRAM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "TIMERH",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 72,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_TIMERH,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_TIMERH,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_TIMERH,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_TIMERH,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_TIMERH,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "TIMERL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 80,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_TIMERL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_TIMERL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_TIMERL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_TIMERL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_TIMERL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "UARTL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 88,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_UARTL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_UARTL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_UARTL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_UARTL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_UARTL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FEC1H",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 96,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FEC1H,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FEC1H,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FEC1H,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FEC1H,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FEC1H,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FEC1L",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 104,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FEC1L,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FEC1L,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FEC1L,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FEC1L,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FEC1L,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "BS",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 114,</div><div class='del'>-			.ngpio			= 2,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_BS,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_BS,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_BS,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_BS,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_BS,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "IRQ",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 121,</div><div class='del'>-			.ngpio			= 7,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_IRQ,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_IRQ,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_IRQ,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_IRQ,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_IRQ,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "USBH",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 128,</div><div class='del'>-			.ngpio			= 1,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_USBH,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_USBH,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_USBH,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_USBH,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_USBH,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "USBL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 136,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_USBL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_USBL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_USBL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_USBL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_USBL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "UARTH",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 144,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_UARTH,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_UARTH,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_UARTH,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_UARTH,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_UARTH,</div><div class='del'>-	},</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mcf_gpio_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned i = 0;</div><div class='del'>-	while (i &lt; ARRAY_SIZE(mcf_gpio_chips))</div><div class='del'>-		(void)gpiochip_add((struct gpio_chip *)&amp;mcf_gpio_chips[i++]);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-core_initcall(mcf_gpio_init);</div><div class='head'>diff --git a/arch/m68k/platform/528x/Makefile b/arch/m68k/platform/528x/Makefile<br/>deleted file mode 100644<br/>index 6ac4b57370ea..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/528x/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/528x/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the linux kernel.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# If you want to play with the HW breakpoints then you will</div><div class='del'>-# need to add define this,  which will give you a stack backtrace</div><div class='del'>-# on the console port whenever a DBG interrupt occurs.  You have to</div><div class='del'>-# set up you HW breakpoints to trigger a DBG interrupt:</div><div class='del'>-#</div><div class='del'>-# ccflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-# asflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1</div><div class='del'>-</div><div class='del'>-obj-y := config.o gpio.o</div><div class='del'>-</div><div class='head'>diff --git a/arch/m68k/platform/528x/gpio.c b/arch/m68k/platform/528x/gpio.c<br/>deleted file mode 100644<br/>index 526db665d87e..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/528x/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/528x/gpio.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,438 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Coldfire generic GPIO support</div><div class='del'>- *</div><div class='del'>- * (C) Copyright 2009, Steven King &lt;sfking@fdwdc.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/coldfire.h&gt;</div><div class='del'>-#include &lt;asm/mcfsim.h&gt;</div><div class='del'>-#include &lt;asm/mcfgpio.h&gt;</div><div class='del'>-</div><div class='del'>-static struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "NQ",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.base			= 1,</div><div class='del'>-			.ngpio			= 7,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFEPORT_EPDDR,</div><div class='del'>-		.podr				= (void __iomem *)MCFEPORT_EPDR,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFEPORT_EPPDR,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "TA",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 8,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPTA_GPTDDR,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPTA_GPTPORT,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPTB_GPTPORT,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "TB",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 16,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPTB_GPTDDR,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPTB_GPTPORT,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPTB_GPTPORT,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "QA",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 24,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFQADC_DDRQA,</div><div class='del'>-		.podr				= (void __iomem *)MCFQADC_PORTQA,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFQADC_PORTQA,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "QB",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 32,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFQADC_DDRQB,</div><div class='del'>-		.podr				= (void __iomem *)MCFQADC_PORTQB,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFQADC_PORTQB,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "A",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 40,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRA,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTA,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTAP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETA,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRA,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "B",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 48,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRB,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTB,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTBP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETB,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRB,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "C",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 56,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRC,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTC,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTCP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETC,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRC,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "D",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 64,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRD,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTD,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTDP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETD,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRD,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "E",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 72,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRE,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTE,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTEP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETE,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "F",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 80,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRF,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTF,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTFP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETF,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRF,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "G",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 88,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRG,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTG,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTGP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETG,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRG,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "H",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 96,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRH,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTH,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTHP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETH,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRH,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "J",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 104,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRJ,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTJ,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTJP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETJ,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRJ,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "DD",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 112,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRDD,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTDD,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTDDP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETDD,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRDD,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "EH",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 120,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDREH,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTEH,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTEHP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETEH,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLREH,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "EL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 128,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDREL,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTEL,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTELP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETEL,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLREL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "AS",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 136,</div><div class='del'>-			.ngpio			= 6,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRAS,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTAS,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTASP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETAS,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRAS,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "QS",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 144,</div><div class='del'>-			.ngpio			= 7,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRQS,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTQS,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTQSP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETQS,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRQS,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "SD",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 152,</div><div class='del'>-			.ngpio			= 6,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRSD,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTSD,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTSDP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETSD,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRSD,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "TC",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 160,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRTC,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTTC,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTTCP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETTC,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRTC,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "TD",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 168,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRTD,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTTD,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTTDP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETTD,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRTD,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "UA",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 176,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *)MCFGPIO_DDRUA,</div><div class='del'>-		.podr				= (void __iomem *)MCFGPIO_PORTUA,</div><div class='del'>-		.ppdr				= (void __iomem *)MCFGPIO_PORTUAP,</div><div class='del'>-		.setr				= (void __iomem *)MCFGPIO_SETUA,</div><div class='del'>-		.clrr				= (void __iomem *)MCFGPIO_CLRUA,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mcf_gpio_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned i = 0;</div><div class='del'>-	while (i &lt; ARRAY_SIZE(mcf_gpio_chips))</div><div class='del'>-		(void)gpiochip_add((struct gpio_chip *)&amp;mcf_gpio_chips[i++]);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-core_initcall(mcf_gpio_init);</div><div class='head'>diff --git a/arch/m68k/platform/5307/Makefile b/arch/m68k/platform/5307/Makefile<br/>deleted file mode 100644<br/>index d4293b791f2e..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5307/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5307/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the m68knommu kernel.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# If you want to play with the HW breakpoints then you will</div><div class='del'>-# need to add define this,  which will give you a stack backtrace</div><div class='del'>-# on the console port whenever a DBG interrupt occurs. You have to</div><div class='del'>-# set up you HW breakpoints to trigger a DBG interrupt:</div><div class='del'>-#</div><div class='del'>-# ccflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-# asflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1</div><div class='del'>-</div><div class='del'>-obj-y			+= config.o gpio.o</div><div class='del'>-obj-$(CONFIG_NETtel)	+= nettel.o</div><div class='del'>-obj-$(CONFIG_CLEOPATRA)	+= nettel.o</div><div class='del'>-</div><div class='head'>diff --git a/arch/m68k/platform/5307/gpio.c b/arch/m68k/platform/5307/gpio.c<br/>deleted file mode 100644<br/>index 5850612b4a38..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5307/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5307/gpio.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,49 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Coldfire generic GPIO support</div><div class='del'>- *</div><div class='del'>- * (C) Copyright 2009, Steven King &lt;sfking@fdwdc.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/coldfire.h&gt;</div><div class='del'>-#include &lt;asm/mcfsim.h&gt;</div><div class='del'>-#include &lt;asm/mcfgpio.h&gt;</div><div class='del'>-</div><div class='del'>-static struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "PP",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.ngpio			= 16,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFSIM_PADDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFSIM_PADAT,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFSIM_PADAT,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mcf_gpio_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned i = 0;</div><div class='del'>-	while (i &lt; ARRAY_SIZE(mcf_gpio_chips))</div><div class='del'>-		(void)gpiochip_add((struct gpio_chip *)&amp;mcf_gpio_chips[i++]);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-core_initcall(mcf_gpio_init);</div><div class='head'>diff --git a/arch/m68k/platform/532x/Makefile b/arch/m68k/platform/532x/Makefile<br/>deleted file mode 100644<br/>index ce01669399c6..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/532x/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/532x/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the m68knommu linux kernel.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# If you want to play with the HW breakpoints then you will</div><div class='del'>-# need to add define this,  which will give you a stack backtrace</div><div class='del'>-# on the console port whenever a DBG interrupt occurs. You have to</div><div class='del'>-# set up you HW breakpoints to trigger a DBG interrupt:</div><div class='del'>-#</div><div class='del'>-# ccflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-# asflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1</div><div class='del'>-</div><div class='del'>-#obj-y := config.o usb-mcf532x.o spi-mcf532x.o</div><div class='del'>-obj-y := config.o gpio.o</div><div class='head'>diff --git a/arch/m68k/platform/532x/gpio.c b/arch/m68k/platform/532x/gpio.c<br/>deleted file mode 100644<br/>index 212a85deac90..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/532x/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/532x/gpio.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,337 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Coldfire generic GPIO support</div><div class='del'>- *</div><div class='del'>- * (C) Copyright 2009, Steven King &lt;sfking@fdwdc.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/coldfire.h&gt;</div><div class='del'>-#include &lt;asm/mcfsim.h&gt;</div><div class='del'>-#include &lt;asm/mcfgpio.h&gt;</div><div class='del'>-</div><div class='del'>-static struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "PIRQ",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFEPORT_EPDDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFEPORT_EPDR,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFEPORT_EPPDR,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FECH",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 8,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FECH,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FECH,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FECH,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FECH,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FECH,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FECL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 16,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FECL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FECL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FECL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FECL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FECL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "SSI",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 24,</div><div class='del'>-			.ngpio			= 5,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_SSI,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_SSI,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_SSI,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_SSI,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_SSI,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "BUSCTL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 32,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_BUSCTL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_BUSCTL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_BUSCTL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "BE",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 40,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_BE,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_BE,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_BE,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_BE,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_BE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "CS",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 49,</div><div class='del'>-			.ngpio			= 5,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_CS,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_CS,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_CS,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_CS,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_CS,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "PWM",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 58,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_PWM,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_PWM,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_PWM,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_PWM,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_PWM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "FECI2C",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 64,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_FECI2C,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_FECI2C,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_FECI2C,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_FECI2C,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_FECI2C,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "UART",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 72,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_UART,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_UART,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_UART,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_UART,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_UART,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "QSPI",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 80,</div><div class='del'>-			.ngpio			= 6,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_QSPI,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_QSPI,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_QSPI,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_QSPI,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_QSPI,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "TIMER",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 88,</div><div class='del'>-			.ngpio			= 4,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_TIMER,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_TIMER,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_TIMER,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_TIMER,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_TIMER,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "LCDDATAH",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 96,</div><div class='del'>-			.ngpio			= 2,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_LCDDATAH,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_LCDDATAH,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_LCDDATAH,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_LCDDATAH,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_LCDDATAH,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "LCDDATAM",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 104,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_LCDDATAM,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_LCDDATAM,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_LCDDATAM,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_LCDDATAM,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_LCDDATAM,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "LCDDATAL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 112,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_LCDDATAL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_LCDDATAL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_LCDDATAL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_LCDDATAL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_LCDDATAL,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "LCDCTLH",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 120,</div><div class='del'>-			.ngpio			= 1,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_LCDCTLH,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_LCDCTLH,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_LCDCTLH,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_LCDCTLH,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_LCDCTLH,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "LCDCTLL",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value_fast,</div><div class='del'>-			.base			= 128,</div><div class='del'>-			.ngpio			= 8,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFGPIO_PDDR_LCDCTLL,</div><div class='del'>-		.podr				= (void __iomem *) MCFGPIO_PODR_LCDCTLL,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFGPIO_PPDSDR_LCDCTLL,</div><div class='del'>-		.setr				= (void __iomem *) MCFGPIO_PPDSDR_LCDCTLL,</div><div class='del'>-		.clrr				= (void __iomem *) MCFGPIO_PCLRR_LCDCTLL,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mcf_gpio_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned i = 0;</div><div class='del'>-	while (i &lt; ARRAY_SIZE(mcf_gpio_chips))</div><div class='del'>-		(void)gpiochip_add((struct gpio_chip *)&amp;mcf_gpio_chips[i++]);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-core_initcall(mcf_gpio_init);</div><div class='head'>diff --git a/arch/m68k/platform/5407/Makefile b/arch/m68k/platform/5407/Makefile<br/>deleted file mode 100644<br/>index e83fe148eddc..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5407/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5407/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the m68knommu linux kernel.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# If you want to play with the HW breakpoints then you will</div><div class='del'>-# need to add define this,  which will give you a stack backtrace</div><div class='del'>-# on the console port whenever a DBG interrupt occurs. You have to</div><div class='del'>-# set up you HW breakpoints to trigger a DBG interrupt:</div><div class='del'>-#</div><div class='del'>-# ccflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-# asflags-y := -DTRAP_DBG_INTERRUPT</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1</div><div class='del'>-</div><div class='del'>-obj-y := config.o gpio.o</div><div class='del'>-</div><div class='head'>diff --git a/arch/m68k/platform/5407/gpio.c b/arch/m68k/platform/5407/gpio.c<br/>deleted file mode 100644<br/>index 5850612b4a38..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5407/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5407/gpio.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,49 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Coldfire generic GPIO support</div><div class='del'>- *</div><div class='del'>- * (C) Copyright 2009, Steven King &lt;sfking@fdwdc.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/coldfire.h&gt;</div><div class='del'>-#include &lt;asm/mcfsim.h&gt;</div><div class='del'>-#include &lt;asm/mcfgpio.h&gt;</div><div class='del'>-</div><div class='del'>-static struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='del'>-	{</div><div class='del'>-		.gpio_chip			= {</div><div class='del'>-			.label			= "PP",</div><div class='del'>-			.request		= mcf_gpio_request,</div><div class='del'>-			.free			= mcf_gpio_free,</div><div class='del'>-			.direction_input	= mcf_gpio_direction_input,</div><div class='del'>-			.direction_output	= mcf_gpio_direction_output,</div><div class='del'>-			.get			= mcf_gpio_get_value,</div><div class='del'>-			.set			= mcf_gpio_set_value,</div><div class='del'>-			.ngpio			= 16,</div><div class='del'>-		},</div><div class='del'>-		.pddr				= (void __iomem *) MCFSIM_PADDR,</div><div class='del'>-		.podr				= (void __iomem *) MCFSIM_PADAT,</div><div class='del'>-		.ppdr				= (void __iomem *) MCFSIM_PADAT,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mcf_gpio_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned i = 0;</div><div class='del'>-	while (i &lt; ARRAY_SIZE(mcf_gpio_chips))</div><div class='del'>-		(void)gpiochip_add((struct gpio_chip *)&amp;mcf_gpio_chips[i++]);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-core_initcall(mcf_gpio_init);</div><div class='head'>diff --git a/arch/m68k/platform/54xx/Makefile b/arch/m68k/platform/54xx/Makefile<br/>deleted file mode 100644<br/>index 6cfd090ec3cd..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/54xx/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/54xx/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,19 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for the m68knommu linux kernel.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# If you want to play with the HW breakpoints then you will</div><div class='del'>-# need to add define this,  which will give you a stack backtrace</div><div class='del'>-# on the console port whenever a DBG interrupt occurs. You have to</div><div class='del'>-# set up you HW breakpoints to trigger a DBG interrupt:</div><div class='del'>-#</div><div class='del'>-# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT</div><div class='del'>-# EXTRA_AFLAGS += -DTRAP_DBG_INTERRUPT</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1</div><div class='del'>-</div><div class='del'>-obj-y := config.o</div><div class='del'>-obj-$(CONFIG_FIREBEE) += firebee.o</div><div class='del'>-</div><div class='head'>diff --git a/arch/m68k/platform/68328/entry.S b/arch/m68k/platform/68328/entry.S<br/>index 5c39b80ed7de..7f91c2fde509 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/68328/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/68328/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/68328/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/68328/entry.S</a></div><div class='hunk'>@@ -119,7 +119,7 @@ Lsignal_return:</div><div class='ctx'> 	subql	#4,%sp			/* dummy return address*/</div><div class='ctx'> 	SAVE_SWITCH_STACK</div><div class='ctx'> 	pea	%sp@(SWITCH_STACK_SIZE)</div><div class='del'>-	bsrw	do_signal</div><div class='add'>+	bsrw	do_notify_resume</div><div class='ctx'> 	addql	#4,%sp</div><div class='ctx'> 	RESTORE_SWITCH_STACK</div><div class='ctx'> 	addql	#4,%sp</div><div class='head'>diff --git a/arch/m68k/platform/68360/entry.S b/arch/m68k/platform/68360/entry.S<br/>index aa47d1d49929..904fd9a4af4e 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/68360/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/68360/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/68360/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/68360/entry.S</a></div><div class='hunk'>@@ -115,7 +115,7 @@ Lsignal_return:</div><div class='ctx'> 	subql	#4,%sp			/* dummy return address*/</div><div class='ctx'> 	SAVE_SWITCH_STACK</div><div class='ctx'> 	pea	%sp@(SWITCH_STACK_SIZE)</div><div class='del'>-	bsrw	do_signal</div><div class='add'>+	bsrw	do_notify_resume</div><div class='ctx'> 	addql	#4,%sp</div><div class='ctx'> 	RESTORE_SWITCH_STACK</div><div class='ctx'> 	addql	#4,%sp</div><div class='head'>diff --git a/arch/m68k/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile<br/>index a0815c61dec1..76d389d9a84e 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/coldfire/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/Makefile</a></div><div class='hunk'>@@ -15,18 +15,22 @@</div><div class='ctx'> asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_COLDFIRE)	+= cache.o clk.o device.o dma.o entry.o vectors.o</div><div class='del'>-obj-$(CONFIG_M5206)	+= timers.o intc.o reset.o</div><div class='del'>-obj-$(CONFIG_M5206e)	+= timers.o intc.o reset.o</div><div class='del'>-obj-$(CONFIG_M520x)	+= pit.o intc-simr.o reset.o</div><div class='del'>-obj-$(CONFIG_M523x)	+= pit.o dma_timer.o intc-2.o reset.o</div><div class='del'>-obj-$(CONFIG_M5249)	+= timers.o intc.o reset.o</div><div class='del'>-obj-$(CONFIG_M527x)	+= pit.o intc-2.o reset.o</div><div class='del'>-obj-$(CONFIG_M5272)	+= timers.o</div><div class='del'>-obj-$(CONFIG_M528x)	+= pit.o intc-2.o reset.o</div><div class='del'>-obj-$(CONFIG_M5307)	+= timers.o intc.o reset.o</div><div class='del'>-obj-$(CONFIG_M532x)	+= timers.o intc-simr.o reset.o</div><div class='del'>-obj-$(CONFIG_M5407)	+= timers.o intc.o reset.o</div><div class='del'>-obj-$(CONFIG_M54xx)	+= sltimers.o intc-2.o</div><div class='add'>+obj-$(CONFIG_M5206)	+= m5206.o timers.o intc.o reset.o</div><div class='add'>+obj-$(CONFIG_M5206e)	+= m5206.o timers.o intc.o reset.o</div><div class='add'>+obj-$(CONFIG_M520x)	+= m520x.o pit.o intc-simr.o reset.o</div><div class='add'>+obj-$(CONFIG_M523x)	+= m523x.o pit.o dma_timer.o intc-2.o reset.o</div><div class='add'>+obj-$(CONFIG_M5249)	+= m5249.o timers.o intc.o intc-5249.o reset.o</div><div class='add'>+obj-$(CONFIG_M527x)	+= m527x.o pit.o intc-2.o reset.o</div><div class='add'>+obj-$(CONFIG_M5272)	+= m5272.o intc-5272.o timers.o</div><div class='add'>+obj-$(CONFIG_M528x)	+= m528x.o pit.o intc-2.o reset.o</div><div class='add'>+obj-$(CONFIG_M5307)	+= m5307.o timers.o intc.o reset.o</div><div class='add'>+obj-$(CONFIG_M532x)	+= m532x.o timers.o intc-simr.o reset.o</div><div class='add'>+obj-$(CONFIG_M5407)	+= m5407.o timers.o intc.o reset.o</div><div class='add'>+obj-$(CONFIG_M54xx)	+= m54xx.o sltimers.o intc-2.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_NETtel)	+= nettel.o</div><div class='add'>+obj-$(CONFIG_CLEOPATRA)	+= nettel.o</div><div class='add'>+obj-$(CONFIG_FIREBEE)	+= firebee.o</div><div class='ctx'> </div><div class='ctx'> obj-y			+= pinmux.o gpio.o</div><div class='ctx'> extra-y := head.o</div><div class='head'>diff --git a/arch/m68k/platform/coldfire/device.c b/arch/m68k/platform/coldfire/device.c<br/>index 7af97362b95c..3aa77ddea89d 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/coldfire/device.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/device.c</a></div><div class='hunk'>@@ -121,7 +121,7 @@ static struct platform_device mcf_fec1 = {</div><div class='ctx'> #endif /* MCFFEC_BASE1 */</div><div class='ctx'> #endif /* CONFIG_FEC */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> /*</div><div class='ctx'>  *	The ColdFire QSPI module is an SPI protocol hardware block used</div><div class='ctx'>  *	on a number of different ColdFire CPUs.</div><div class='hunk'>@@ -274,7 +274,7 @@ static struct platform_device mcf_qspi = {</div><div class='ctx'> 	.resource		= mcf_qspi_resources,</div><div class='ctx'> 	.dev.platform_data	= &amp;mcf_qspi_data,</div><div class='ctx'> };</div><div class='del'>-#endif /* CONFIG_SPI_COLDFIRE_QSPI */</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */</div><div class='ctx'> </div><div class='ctx'> static struct platform_device *mcf_devices[] __initdata = {</div><div class='ctx'> 	&amp;mcf_uart,</div><div class='hunk'>@@ -284,7 +284,7 @@ static struct platform_device *mcf_devices[] __initdata = {</div><div class='ctx'> 	&amp;mcf_fec1,</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> 	&amp;mcf_qspi,</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/m68k/platform/coldfire/entry.S b/arch/m68k/platform/coldfire/entry.S<br/>index 281e38c2b6c7..881ab8e379d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/coldfire/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/entry.S</a></div><div class='hunk'>@@ -152,7 +152,7 @@ Lsignal_return:</div><div class='ctx'> 	subql	#4,%sp			/* dummy return address */</div><div class='ctx'> 	SAVE_SWITCH_STACK</div><div class='ctx'> 	pea	%sp@(SWITCH_STACK_SIZE)</div><div class='del'>-	jsr	do_signal</div><div class='add'>+	jsr	do_notify_resume</div><div class='ctx'> 	addql	#4,%sp</div><div class='ctx'> 	RESTORE_SWITCH_STACK</div><div class='ctx'> 	addql	#4,%sp</div><div class='head'>diff --git a/arch/m68k/platform/54xx/firebee.c b/arch/m68k/platform/coldfire/firebee.c<br/>index 46d50534f981..46d50534f981 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/54xx/firebee.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/54xx/firebee.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/firebee.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/firebee.c</a></div><div class='head'>diff --git a/arch/m68k/platform/coldfire/gpio.c b/arch/m68k/platform/coldfire/gpio.c<br/>index 292a1a5a2d7c..4c8c42450a4e 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/coldfire/gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/gpio.c</a></div><div class='hunk'>@@ -122,6 +122,10 @@ struct bus_type mcf_gpio_subsys = {</div><div class='ctx'> </div><div class='ctx'> static int __init mcf_gpio_sysinit(void)</div><div class='ctx'> {</div><div class='add'>+	unsigned int i = 0;</div><div class='add'>+</div><div class='add'>+	while (i &lt; mcf_gpio_chips_size)</div><div class='add'>+		gpiochip_add((struct gpio_chip *)&amp;mcf_gpio_chips[i++]);</div><div class='ctx'> 	return subsys_system_register(&amp;mcf_gpio_subsys, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/platform/5249/intc2.c b/arch/m68k/platform/coldfire/intc-5249.c<br/>index f343bf7bf5b0..f343bf7bf5b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5249/intc2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5249/intc2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/intc-5249.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/intc-5249.c</a></div><div class='head'>diff --git a/arch/m68k/platform/5272/intc.c b/arch/m68k/platform/coldfire/intc-5272.c<br/>index 7160e618b0a9..7160e618b0a9 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5272/intc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5272/intc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/intc-5272.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/intc-5272.c</a></div><div class='head'>diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/coldfire/m5206.c<br/>index 6bfbeebd231b..a8b81df653f0 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5206/config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5206/config.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/m5206.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m5206.c</a></div><div class='hunk'>@@ -16,6 +16,15 @@</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/coldfire.h&gt;</div><div class='ctx'> #include &lt;asm/mcfsim.h&gt;</div><div class='add'>+#include &lt;asm/mcfgpio.h&gt;</div><div class='add'>+</div><div class='add'>+/***************************************************************************/</div><div class='add'>+</div><div class='add'>+struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='add'>+	MCFGPS(PP, 0, 8, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/coldfire/m520x.c<br/>index 235947844f27..3264b8883d5f 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/520x/config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/520x/config.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/m520x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m520x.c</a></div><div class='hunk'>@@ -19,10 +19,26 @@</div><div class='ctx'> #include &lt;asm/coldfire.h&gt;</div><div class='ctx'> #include &lt;asm/mcfsim.h&gt;</div><div class='ctx'> #include &lt;asm/mcfuart.h&gt;</div><div class='add'>+#include &lt;asm/mcfgpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='add'>+	MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),</div><div class='add'>+	MCFGPF(CS, 9, 3),</div><div class='add'>+	MCFGPF(FECI2C, 16, 4),</div><div class='add'>+	MCFGPF(QSPI, 24, 4),</div><div class='add'>+	MCFGPF(TIMER, 32, 4),</div><div class='add'>+	MCFGPF(UART, 40, 8),</div><div class='add'>+	MCFGPF(FECH, 48, 8),</div><div class='add'>+	MCFGPF(FECL, 56, 8),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);</div><div class='add'>+</div><div class='add'>+/***************************************************************************/</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> </div><div class='ctx'> static void __init m520x_qspi_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -35,7 +51,7 @@ static void __init m520x_qspi_init(void)</div><div class='ctx'> 	writew(par, MCF_GPIO_PAR_UART);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_SPI_COLDFIRE_QSPI */</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -79,7 +95,7 @@ void __init config_BSP(char *commandp, int size)</div><div class='ctx'> 	mach_sched_init = hw_timer_init;</div><div class='ctx'> 	m520x_uarts_init();</div><div class='ctx'> 	m520x_fec_init();</div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> 	m520x_qspi_init();</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/coldfire/m523x.c<br/>index c8b405d5a961..5d57a4249412 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/523x/config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/523x/config.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/m523x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m523x.c</a></div><div class='hunk'>@@ -19,10 +19,32 @@</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/coldfire.h&gt;</div><div class='ctx'> #include &lt;asm/mcfsim.h&gt;</div><div class='add'>+#include &lt;asm/mcfgpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='add'>+	MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),</div><div class='add'>+	MCFGPF(ADDR, 13, 3),</div><div class='add'>+	MCFGPF(DATAH, 16, 8),</div><div class='add'>+	MCFGPF(DATAL, 24, 8),</div><div class='add'>+	MCFGPF(BUSCTL, 32, 8),</div><div class='add'>+	MCFGPF(BS, 40, 4),</div><div class='add'>+	MCFGPF(CS, 49, 7),</div><div class='add'>+	MCFGPF(SDRAM, 56, 6),</div><div class='add'>+	MCFGPF(FECI2C, 64, 4),</div><div class='add'>+	MCFGPF(UARTH, 72, 2),</div><div class='add'>+	MCFGPF(UARTL, 80, 8),</div><div class='add'>+	MCFGPF(QSPI, 88, 5),</div><div class='add'>+	MCFGPF(TIMER, 96, 8),</div><div class='add'>+	MCFGPF(ETPU, 104, 3),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);</div><div class='add'>+</div><div class='add'>+/***************************************************************************/</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> </div><div class='ctx'> static void __init m523x_qspi_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -36,7 +58,7 @@ static void __init m523x_qspi_init(void)</div><div class='ctx'> 	writew(par, MCFGPIO_PAR_TIMER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_SPI_COLDFIRE_QSPI */</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -58,7 +80,7 @@ void __init config_BSP(char *commandp, int size)</div><div class='ctx'> {</div><div class='ctx'> 	mach_sched_init = hw_timer_init;</div><div class='ctx'> 	m523x_fec_init();</div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> 	m523x_qspi_init();</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/coldfire/m5249.c<br/>index bbf05135bb98..fdfa1edfd1ac 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5249/config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5249/config.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/m5249.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m5249.c</a></div><div class='hunk'>@@ -16,6 +16,16 @@</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/coldfire.h&gt;</div><div class='ctx'> #include &lt;asm/mcfsim.h&gt;</div><div class='add'>+#include &lt;asm/mcfgpio.h&gt;</div><div class='add'>+</div><div class='add'>+/***************************************************************************/</div><div class='add'>+</div><div class='add'>+struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='add'>+	MCFGPS(GPIO0, 0, 32, MCFSIM2_GPIOENABLE, MCFSIM2_GPIOWRITE, MCFSIM2_GPIOREAD),</div><div class='add'>+	MCFGPS(GPIO1, 32, 32, MCFSIM2_GPIO1ENABLE, MCFSIM2_GPIO1WRITE, MCFSIM2_GPIO1READ),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -51,7 +61,7 @@ static struct platform_device *m5249_devices[] __initdata = {</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> </div><div class='ctx'> static void __init m5249_qspi_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -61,7 +71,7 @@ static void __init m5249_qspi_init(void)</div><div class='ctx'> 	mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_SPI_COLDFIRE_QSPI */</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -90,7 +100,7 @@ void __init config_BSP(char *commandp, int size)</div><div class='ctx'> #ifdef CONFIG_M5249C3</div><div class='ctx'> 	m5249_smc91x_init();</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> 	m5249_qspi_init();</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/platform/5272/config.c b/arch/m68k/platform/coldfire/m5272.c<br/>index e68bc7a148eb..43e36060da18 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5272/config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5272/config.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/m5272.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m5272.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;asm/coldfire.h&gt;</div><div class='ctx'> #include &lt;asm/mcfsim.h&gt;</div><div class='ctx'> #include &lt;asm/mcfuart.h&gt;</div><div class='add'>+#include &lt;asm/mcfgpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -30,6 +31,16 @@ unsigned char ledbank = 0xff;</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='add'>+struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='add'>+	MCFGPS(PA,  0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),</div><div class='add'>+	MCFGPS(PB, 16, 16, MCFSIM_PBDDR, MCFSIM_PBDAT, MCFSIM_PBDAT),</div><div class='add'>+	MCFGPS(Pc, 32, 16, MCFSIM_PCDDR, MCFSIM_PCDAT, MCFSIM_PCDAT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);</div><div class='add'>+</div><div class='add'>+/***************************************************************************/</div><div class='add'>+</div><div class='ctx'> static void __init m5272_uarts_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 v;</div><div class='head'>diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/coldfire/m527x.c<br/>index f91a53294c35..9b0b66aabd1b 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/527x/config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/527x/config.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/m527x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m527x.c</a></div><div class='hunk'>@@ -20,10 +20,53 @@</div><div class='ctx'> #include &lt;asm/coldfire.h&gt;</div><div class='ctx'> #include &lt;asm/mcfsim.h&gt;</div><div class='ctx'> #include &lt;asm/mcfuart.h&gt;</div><div class='add'>+#include &lt;asm/mcfgpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='add'>+#if defined(CONFIG_M5271)</div><div class='add'>+	MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),</div><div class='add'>+	MCFGPF(ADDR, 13, 3),</div><div class='add'>+	MCFGPF(DATAH, 16, 8),</div><div class='add'>+	MCFGPF(DATAL, 24, 8),</div><div class='add'>+	MCFGPF(BUSCTL, 32, 8),</div><div class='add'>+	MCFGPF(BS, 40, 4),</div><div class='add'>+	MCFGPF(CS, 49, 7),</div><div class='add'>+	MCFGPF(SDRAM, 56, 6),</div><div class='add'>+	MCFGPF(FECI2C, 64, 4),</div><div class='add'>+	MCFGPF(UARTH, 72, 2),</div><div class='add'>+	MCFGPF(UARTL, 80, 8),</div><div class='add'>+	MCFGPF(QSPI, 88, 5),</div><div class='add'>+	MCFGPF(TIMER, 96, 8),</div><div class='add'>+#elif defined(CONFIG_M5275)</div><div class='add'>+	MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),</div><div class='add'>+	MCFGPF(BUSCTL, 8, 8),</div><div class='add'>+	MCFGPF(ADDR, 21, 3),</div><div class='add'>+	MCFGPF(CS, 25, 7),</div><div class='add'>+	MCFGPF(FEC0H, 32, 8),</div><div class='add'>+	MCFGPF(FEC0L, 40, 8),</div><div class='add'>+	MCFGPF(FECI2C, 48, 6),</div><div class='add'>+	MCFGPF(QSPI, 56, 7),</div><div class='add'>+	MCFGPF(SDRAM, 64, 8),</div><div class='add'>+	MCFGPF(TIMERH, 72, 4),</div><div class='add'>+	MCFGPF(TIMERL, 80, 4),</div><div class='add'>+	MCFGPF(UARTL, 88, 8),</div><div class='add'>+	MCFGPF(FEC1H, 96, 8),</div><div class='add'>+	MCFGPF(FEC1L, 104, 8),</div><div class='add'>+	MCFGPF(BS, 114, 2),</div><div class='add'>+	MCFGPF(IRQ, 121, 7),</div><div class='add'>+	MCFGPF(USBH, 128, 1),</div><div class='add'>+	MCFGPF(USBL, 136, 8),</div><div class='add'>+	MCFGPF(UARTH, 144, 4),</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);</div><div class='add'>+</div><div class='add'>+/***************************************************************************/</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> </div><div class='ctx'> static void __init m527x_qspi_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -42,7 +85,7 @@ static void __init m527x_qspi_init(void)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_SPI_COLDFIRE_QSPI */</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -90,7 +133,7 @@ void __init config_BSP(char *commandp, int size)</div><div class='ctx'> 	mach_sched_init = hw_timer_init;</div><div class='ctx'> 	m527x_uarts_init();</div><div class='ctx'> 	m527x_fec_init();</div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> 	m527x_qspi_init();</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/coldfire/m528x.c<br/>index d4492926614c..7ed1276b29dc 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/528x/config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/528x/config.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/m528x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m528x.c</a></div><div class='hunk'>@@ -21,10 +21,41 @@</div><div class='ctx'> #include &lt;asm/coldfire.h&gt;</div><div class='ctx'> #include &lt;asm/mcfsim.h&gt;</div><div class='ctx'> #include &lt;asm/mcfuart.h&gt;</div><div class='add'>+#include &lt;asm/mcfgpio.h&gt;</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='add'>+	MCFGPS(NQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),</div><div class='add'>+	MCFGPS(TA, 8, 4, MCFGPTA_GPTDDR, MCFGPTA_GPTPORT, MCFGPTB_GPTPORT),</div><div class='add'>+	MCFGPS(TB, 16, 4, MCFGPTB_GPTDDR, MCFGPTB_GPTPORT, MCFGPTB_GPTPORT),</div><div class='add'>+	MCFGPS(QA, 24, 4, MCFQADC_DDRQA, MCFQADC_PORTQA, MCFQADC_PORTQA),</div><div class='add'>+	MCFGPS(QB, 32, 4, MCFQADC_DDRQB, MCFQADC_PORTQB, MCFQADC_PORTQB),</div><div class='add'>+	MCFGPF(A, 40, 8),</div><div class='add'>+	MCFGPF(B, 48, 8),</div><div class='add'>+	MCFGPF(C, 56, 8),</div><div class='add'>+	MCFGPF(D, 64, 8),</div><div class='add'>+	MCFGPF(E, 72, 8),</div><div class='add'>+	MCFGPF(F, 80, 8),</div><div class='add'>+	MCFGPF(G, 88, 8),</div><div class='add'>+	MCFGPF(H, 96, 8),</div><div class='add'>+	MCFGPF(J, 104, 8),</div><div class='add'>+	MCFGPF(DD, 112, 8),</div><div class='add'>+	MCFGPF(EH, 120, 8),</div><div class='add'>+	MCFGPF(EL, 128, 8),</div><div class='add'>+	MCFGPF(AS, 136, 6),</div><div class='add'>+	MCFGPF(QS, 144, 7),</div><div class='add'>+	MCFGPF(SD, 152, 6),</div><div class='add'>+	MCFGPF(TC, 160, 4),</div><div class='add'>+	MCFGPF(TD, 168, 4),</div><div class='add'>+	MCFGPF(UA, 176, 4),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);</div><div class='add'>+</div><div class='add'>+/***************************************************************************/</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> </div><div class='ctx'> static void __init m528x_qspi_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -32,7 +63,7 @@ static void __init m528x_qspi_init(void)</div><div class='ctx'> 	__raw_writeb(0x07, MCFGPIO_PQSPAR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_SPI_COLDFIRE_QSPI */</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -98,7 +129,7 @@ void __init config_BSP(char *commandp, int size)</div><div class='ctx'> 	mach_sched_init = hw_timer_init;</div><div class='ctx'> 	m528x_uarts_init();</div><div class='ctx'> 	m528x_fec_init();</div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> 	m528x_qspi_init();</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/coldfire/m5307.c<br/>index a568d2870d15..93b484976ab3 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5307/config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5307/config.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/m5307.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m5307.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/coldfire.h&gt;</div><div class='ctx'> #include &lt;asm/mcfsim.h&gt;</div><div class='add'>+#include &lt;asm/mcfgpio.h&gt;</div><div class='ctx'> #include &lt;asm/mcfwdebug.h&gt;</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='hunk'>@@ -28,6 +29,14 @@ unsigned char ledbank = 0xff;</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='add'>+struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='add'>+	MCFGPS(PP, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);</div><div class='add'>+</div><div class='add'>+/***************************************************************************/</div><div class='add'>+</div><div class='ctx'> void __init config_BSP(char *commandp, int size)</div><div class='ctx'> {</div><div class='ctx'> #if defined(CONFIG_NETtel) || \</div><div class='head'>diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/coldfire/m532x.c<br/>index 2bec3477b739..5394223639f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/532x/config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/532x/config.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/m532x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m532x.c</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'>  *	Copyright (C) 2000, Lineo (www.lineo.com)</div><div class='ctx'>  *	Yaroslav Vinogradov yaroslav.vinogradov@freescale.com</div><div class='ctx'>  *	Copyright Freescale Semiconductor, Inc 2006</div><div class='del'>- *	Copyright (c) 2006, emlix, Sebastian Hess &lt;sh@emlix.com&gt;</div><div class='add'>+ *	Copyright (c) 2006, emlix, Sebastian Hess &lt;shess@hessware.de&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='hunk'>@@ -26,11 +26,36 @@</div><div class='ctx'> #include &lt;asm/mcfsim.h&gt;</div><div class='ctx'> #include &lt;asm/mcfuart.h&gt;</div><div class='ctx'> #include &lt;asm/mcfdma.h&gt;</div><div class='add'>+#include &lt;asm/mcfgpio.h&gt;</div><div class='ctx'> #include &lt;asm/mcfwdebug.h&gt;</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='add'>+	MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),</div><div class='add'>+	MCFGPF(FECH, 8, 8),</div><div class='add'>+	MCFGPF(FECL, 16, 8),</div><div class='add'>+	MCFGPF(SSI, 24, 5),</div><div class='add'>+	MCFGPF(BUSCTL, 32, 4),</div><div class='add'>+	MCFGPF(BE, 40, 4),</div><div class='add'>+	MCFGPF(CS, 49, 5),</div><div class='add'>+	MCFGPF(PWM, 58, 4),</div><div class='add'>+	MCFGPF(FECI2C, 64, 4),</div><div class='add'>+	MCFGPF(UART, 72, 8),</div><div class='add'>+	MCFGPF(QSPI, 80, 6),</div><div class='add'>+	MCFGPF(TIMER, 88, 4),</div><div class='add'>+	MCFGPF(LCDDATAH, 96, 2),</div><div class='add'>+	MCFGPF(LCDDATAM, 104, 8),</div><div class='add'>+	MCFGPF(LCDDATAL, 112, 8),</div><div class='add'>+	MCFGPF(LCDCTLH, 120, 1),</div><div class='add'>+	MCFGPF(LCDCTLL, 128, 8),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);</div><div class='add'>+</div><div class='add'>+/***************************************************************************/</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> </div><div class='ctx'> static void __init m532x_qspi_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -38,7 +63,7 @@ static void __init m532x_qspi_init(void)</div><div class='ctx'> 	writew(0x01f0, MCF_GPIO_PAR_QSPI);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_SPI_COLDFIRE_QSPI */</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -77,7 +102,7 @@ void __init config_BSP(char *commandp, int size)</div><div class='ctx'> 	mach_sched_init = hw_timer_init;</div><div class='ctx'> 	m532x_uarts_init();</div><div class='ctx'> 	m532x_fec_init();</div><div class='del'>-#ifdef CONFIG_SPI_COLDFIRE_QSPI</div><div class='add'>+#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)</div><div class='ctx'> 	m532x_qspi_init();</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/coldfire/m5407.c<br/>index bb6c746ae819..faa6680b3404 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5407/config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5407/config.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/m5407.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m5407.c</a></div><div class='hunk'>@@ -16,6 +16,15 @@</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/coldfire.h&gt;</div><div class='ctx'> #include &lt;asm/mcfsim.h&gt;</div><div class='add'>+#include &lt;asm/mcfgpio.h&gt;</div><div class='add'>+</div><div class='add'>+/***************************************************************************/</div><div class='add'>+</div><div class='add'>+struct mcf_gpio_chip mcf_gpio_chips[] = {</div><div class='add'>+	MCFGPS(PP, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/arch/m68k/platform/54xx/config.c b/arch/m68k/platform/coldfire/m54xx.c<br/>index 2081c6cbb3de..20672dadb252 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/54xx/config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/54xx/config.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/m54xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/m54xx.c</a></div><div class='hunk'>@@ -21,12 +21,19 @@</div><div class='ctx'> #include &lt;asm/m54xxsim.h&gt;</div><div class='ctx'> #include &lt;asm/mcfuart.h&gt;</div><div class='ctx'> #include &lt;asm/m54xxgpt.h&gt;</div><div class='add'>+#include &lt;asm/mcfgpio.h&gt;</div><div class='ctx'> #ifdef CONFIG_MMU</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='ctx'> </div><div class='add'>+struct mcf_gpio_chip mcf_gpio_chips[] = { };</div><div class='add'>+</div><div class='add'>+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);</div><div class='add'>+</div><div class='add'>+/***************************************************************************/</div><div class='add'>+</div><div class='ctx'> static void __init m54xx_uarts_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* enable io pins */</div><div class='head'>diff --git a/arch/m68k/platform/5307/nettel.c b/arch/m68k/platform/coldfire/nettel.c<br/>index e925ea4602f8..e925ea4602f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/m68k/platform/5307/nettel.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/m68k/platform/5307/nettel.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/m68k/platform/coldfire/nettel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/m68k/platform/coldfire/nettel.c</a></div><div class='head'>diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig<br/>index ac22dc7f4cab..0bf44231aaf9 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/Kconfig</a></div><div class='hunk'>@@ -22,6 +22,7 @@ config MICROBLAZE</div><div class='ctx'> 	select GENERIC_PCI_IOMAP</div><div class='ctx'> 	select GENERIC_CPU_DEVICES</div><div class='ctx'> 	select GENERIC_ATOMIC64</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='ctx'> </div><div class='ctx'> config SWAP</div><div class='ctx'> 	def_bool n</div><div class='hunk'>@@ -50,14 +51,8 @@ config GENERIC_HWEIGHT</div><div class='ctx'> config GENERIC_CALIBRATE_DELAY</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config GENERIC_TIME_VSYSCALL</div><div class='del'>-	def_bool n</div><div class='del'>-</div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config GENERIC_GPIO</div><div class='del'>-	def_bool y</div><div class='add'>+	bool</div><div class='ctx'> </div><div class='ctx'> config GENERIC_CSUM</div><div class='ctx'> 	def_bool y</div><div class='hunk'>@@ -79,8 +74,6 @@ source "arch/microblaze/platform/Kconfig.platform"</div><div class='ctx'> </div><div class='ctx'> menu "Processor type and features"</div><div class='ctx'> </div><div class='del'>-source "kernel/time/Kconfig"</div><div class='del'>-</div><div class='ctx'> source "kernel/Kconfig.preempt"</div><div class='ctx'> </div><div class='ctx'> source "kernel/Kconfig.hz"</div><div class='head'>diff --git a/arch/microblaze/include/asm/gpio.h b/arch/microblaze/include/asm/gpio.h<br/>index 2b2c18be71c6..b3799d88ffcf 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/include/asm/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/include/asm/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/include/asm/gpio.h</a></div><div class='hunk'>@@ -1,53 +1,4 @@</div><div class='del'>-/*</div><div class='del'>- * Generic GPIO API implementation for PowerPC.</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2007-2008  MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * Author: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _ASM_MICROBLAZE_GPIO_H</div><div class='del'>-#define _ASM_MICROBLAZE_GPIO_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;asm-generic/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_GPIOLIB</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We don't (yet) implement inlined/rapid versions for on-chip gpios.</div><div class='del'>- * Just call gpiolib.</div><div class='del'>- */</div><div class='del'>-static inline int gpio_get_value(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_get_value(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void gpio_set_value(unsigned int gpio, int value)</div><div class='del'>-{</div><div class='del'>-	__gpio_set_value(gpio, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_cansleep(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_cansleep(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_to_irq(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_to_irq(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int irq_to_gpio(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_GPIOLIB */</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_MICROBLAZE_GPIO_H */</div><div class='add'>+#ifndef __LINUX_GPIO_H</div><div class='add'>+#warning Include linux/gpio.h instead of asm/gpio.h</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/microblaze/include/asm/kvm_para.h b/arch/microblaze/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h<br/>index bffb54527299..af2bb9652392 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/include/asm/processor.h</a></div><div class='hunk'>@@ -23,7 +23,6 @@ extern const struct seq_operations cpuinfo_op;</div><div class='ctx'> </div><div class='ctx'> # define cpu_relax()		barrier()</div><div class='ctx'> # define cpu_sleep()		do {} while (0)</div><div class='del'>-# define prepare_to_copy(tsk)	do {} while (0)</div><div class='ctx'> </div><div class='ctx'> #define task_pt_regs(tsk) \</div><div class='ctx'> 		(((struct pt_regs *)(THREAD_SIZE + task_stack_page(tsk))) - 1)</div><div class='head'>diff --git a/arch/microblaze/include/asm/thread_info.h b/arch/microblaze/include/asm/thread_info.h<br/>index 1a8ab6a5c03f..6c610234ffab 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/include/asm/thread_info.h</a></div><div class='hunk'>@@ -166,7 +166,23 @@ static inline void set_restore_sigmask(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_info *ti = current_thread_info();</div><div class='ctx'> 	ti-&gt;status |= TS_RESTORE_SIGMASK;</div><div class='del'>-	set_bit(TIF_SIGPENDING, (unsigned long *)&amp;ti-&gt;flags);</div><div class='add'>+	WARN_ON(!test_bit(TIF_SIGPENDING, (unsigned long *)&amp;ti-&gt;flags));</div><div class='add'>+}</div><div class='add'>+static inline void clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	return current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_and_clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	struct thread_info *ti = current_thread_info();</div><div class='add'>+	if (!(ti-&gt;status &amp; TS_RESTORE_SIGMASK))</div><div class='add'>+		return false;</div><div class='add'>+	ti-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/microblaze/kernel/Makefile b/arch/microblaze/kernel/Makefile<br/>index 494b63b72dd7..928c950fc14c 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/Makefile</a></div><div class='hunk'>@@ -16,7 +16,7 @@ endif</div><div class='ctx'> extra-y := head.o vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y += dma.o exceptions.o \</div><div class='del'>-	hw_exception_handler.o init_task.o intc.o irq.o \</div><div class='add'>+	hw_exception_handler.o intc.o irq.o \</div><div class='ctx'> 	process.o prom.o prom_parse.o ptrace.o \</div><div class='ctx'> 	reset.o setup.o signal.o sys_microblaze.o timer.o traps.o unwind.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/microblaze/kernel/entry-nommu.S b/arch/microblaze/kernel/entry-nommu.S<br/>index 34b526f59b43..75c3ea1f48a1 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/kernel/entry-nommu.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/kernel/entry-nommu.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/kernel/entry-nommu.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/entry-nommu.S</a></div><div class='hunk'>@@ -132,11 +132,10 @@ ret_from_intr:</div><div class='ctx'> 	beqi	r11, 1f</div><div class='ctx'> 	bralid	r15, schedule</div><div class='ctx'> 	nop</div><div class='del'>-1:	andi	r11, r19, _TIF_SIGPENDING</div><div class='add'>+1:	andi	r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME</div><div class='ctx'> 	beqid	r11, no_intr_resched</div><div class='ctx'> 	addk	r5, r1, r0</div><div class='del'>-	addk	r7, r0, r0</div><div class='del'>-	bralid	r15, do_signal</div><div class='add'>+	bralid	r15, do_notify_resume</div><div class='ctx'> 	addk	r6, r0, r0</div><div class='ctx'> </div><div class='ctx'> no_intr_resched:</div><div class='hunk'>@@ -292,8 +291,8 @@ ENTRY(_user_exception)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Debug traps are like a system call, but entered via brki r14, 0x60</div><div class='del'>- * All we need to do is send the SIGTRAP signal to current, ptrace and do_signal</div><div class='del'>- * will handle the rest</div><div class='add'>+ * All we need to do is send the SIGTRAP signal to current, ptrace and</div><div class='add'>+ * do_notify_resume will handle the rest</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(_debug_exception)</div><div class='ctx'> 	swi	r1, r0, PER_CPU(ENTRY_SP)	/* save the current sp */</div><div class='hunk'>@@ -482,12 +481,11 @@ work_pending:</div><div class='ctx'> 	beqi	r11, 1f</div><div class='ctx'> 	bralid	r15, schedule</div><div class='ctx'> 	nop</div><div class='del'>-1:	andi	r11, r19, _TIF_SIGPENDING</div><div class='add'>+1:	andi	r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME</div><div class='ctx'> 	beqi	r11, no_work_pending</div><div class='ctx'> 	addk	r5, r1, r0</div><div class='del'>-	addik	r7, r0, 1</div><div class='del'>-	bralid	r15, do_signal</div><div class='del'>-	addk	r6, r0, r0</div><div class='add'>+	bralid	r15, do_notify_resume</div><div class='add'>+	addik	r6, r0, 1</div><div class='ctx'> 	bri	no_work_pending</div><div class='ctx'> </div><div class='ctx'> ENTRY(ret_to_user)</div><div class='hunk'>@@ -569,10 +567,6 @@ sys_rt_sigreturn_wrapper:</div><div class='ctx'> 	brid	sys_rt_sigreturn</div><div class='ctx'> 	addk	r5, r1, r0</div><div class='ctx'> </div><div class='del'>-sys_rt_sigsuspend_wrapper:</div><div class='del'>-	brid	sys_rt_sigsuspend</div><div class='del'>-	addk	r7, r1, r0</div><div class='del'>-</div><div class='ctx'> 	/* Interrupt vector table */</div><div class='ctx'> 	.section	.init.ivt, "ax"</div><div class='ctx'> 	.org 0x0</div><div class='head'>diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S<br/>index 66e34a3bfe1b..03f7b8ce6b6b 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/kernel/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/entry.S</a></div><div class='hunk'>@@ -430,13 +430,12 @@ C_ENTRY(ret_from_trap):</div><div class='ctx'> 5:	/* get thread info from current task*/</div><div class='ctx'> 	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;</div><div class='ctx'> 	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */</div><div class='del'>-	andi	r11, r11, _TIF_SIGPENDING;</div><div class='add'>+	andi	r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;</div><div class='ctx'> 	beqi	r11, 1f;		/* Signals to handle, handle them */</div><div class='ctx'> </div><div class='ctx'> 	addik	r5, r1, 0;		/* Arg 1: struct pt_regs *regs */</div><div class='del'>-	addi	r7, r0, 1;		/* Arg 3: int in_syscall */</div><div class='del'>-	bralid	r15, do_signal;	/* Handle any signals */</div><div class='del'>-	add	r6, r0, r0;		/* Arg 2: sigset_t *oldset */</div><div class='add'>+	bralid	r15, do_notify_resume;	/* Handle any signals */</div><div class='add'>+	addi	r6, r0, 1;		/* Arg 2: int in_syscall */</div><div class='ctx'> </div><div class='ctx'> /* Finally, return to user state.  */</div><div class='ctx'> 1:	set_bip;			/*  Ints masked for state restore */</div><div class='hunk'>@@ -493,10 +492,11 @@ C_ENTRY(sys_clone):</div><div class='ctx'> 	bnei	r6, 1f;			/* See if child SP arg (arg 1) is 0. */</div><div class='ctx'> 	lwi	r6, r1, PT_R1;	/* If so, use paret's stack ptr */</div><div class='ctx'> 1:	addik	r7, r1, 0;			/* Arg 2: parent context */</div><div class='del'>-	add	r8, r0, r0;			/* Arg 3: (unused) */</div><div class='del'>-	add	r9, r0, r0;			/* Arg 4: (unused) */</div><div class='add'>+	lwi     r9, r1, PT_R8;          /* parent tid.  */</div><div class='add'>+	lwi     r10, r1, PT_R9;         /* child tid.  */</div><div class='add'>+	/* do_fork will pick up TLS from regs-&gt;r10.  */</div><div class='ctx'> 	brid	do_fork		/* Do real work (tail-call) */</div><div class='del'>-	add	r10, r0, r0;			/* Arg 5: (unused) */</div><div class='add'>+	add     r8, r0, r0;             /* Arg 3: (unused) */</div><div class='ctx'> </div><div class='ctx'> C_ENTRY(sys_execve):</div><div class='ctx'> 	brid	microblaze_execve;	/* Do real work (tail-call).*/</div><div class='hunk'>@@ -622,7 +622,7 @@ C_ENTRY(ret_from_exc):</div><div class='ctx'> 	/* Maybe handle a signal */</div><div class='ctx'> 5:	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */</div><div class='ctx'> 	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */</div><div class='del'>-	andi	r11, r11, _TIF_SIGPENDING;</div><div class='add'>+	andi	r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;</div><div class='ctx'> 	beqi	r11, 1f;		/* Signals to handle, handle them */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -635,11 +635,10 @@ C_ENTRY(ret_from_exc):</div><div class='ctx'> 	 * traps), but signal handlers may want to examine or change the</div><div class='ctx'> 	 * complete register state.  Here we save anything not saved by</div><div class='ctx'> 	 * the normal entry sequence, so that it may be safely restored</div><div class='del'>-	 * (in a possibly modified form) after do_signal returns. */</div><div class='add'>+	 * (in a possibly modified form) after do_notify_resume returns. */</div><div class='ctx'> 	addik	r5, r1, 0;		/* Arg 1: struct pt_regs *regs */</div><div class='del'>-	addi	r7, r0, 0;		/* Arg 3: int in_syscall */</div><div class='del'>-	bralid	r15, do_signal;	/* Handle any signals */</div><div class='del'>-	add	r6, r0, r0;		/* Arg 2: sigset_t *oldset */</div><div class='add'>+	bralid	r15, do_notify_resume;	/* Handle any signals */</div><div class='add'>+	addi	r6, r0, 0;		/* Arg 2: int in_syscall */</div><div class='ctx'> </div><div class='ctx'> /* Finally, return to user state.  */</div><div class='ctx'> 1:	set_bip;			/* Ints masked for state restore */</div><div class='hunk'>@@ -732,13 +731,12 @@ ret_from_irq:</div><div class='ctx'>     /* Maybe handle a signal */</div><div class='ctx'> 5:	lwi	r11, CURRENT_TASK, TS_THREAD_INFO; /* MS: get thread info */</div><div class='ctx'> 	lwi	r11, r11, TI_FLAGS; /* get flags in thread info */</div><div class='del'>-	andi	r11, r11, _TIF_SIGPENDING;</div><div class='add'>+	andi	r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;</div><div class='ctx'> 	beqid	r11, no_intr_resched</div><div class='ctx'> /* Handle a signal return; Pending signals should be in r18. */</div><div class='del'>-	addi	r7, r0, 0; /* Arg 3: int in_syscall */</div><div class='ctx'> 	addik	r5, r1, 0; /* Arg 1: struct pt_regs *regs */</div><div class='del'>-	bralid	r15, do_signal;	/* Handle any signals */</div><div class='del'>-	add	r6, r0, r0; /* Arg 2: sigset_t *oldset */</div><div class='add'>+	bralid	r15, do_notify_resume;	/* Handle any signals */</div><div class='add'>+	addi	r6, r0, 0; /* Arg 2: int in_syscall */</div><div class='ctx'> </div><div class='ctx'> /* Finally, return to user state. */</div><div class='ctx'> no_intr_resched:</div><div class='hunk'>@@ -869,13 +867,12 @@ dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */</div><div class='ctx'> 	/* Maybe handle a signal */</div><div class='ctx'> 5:	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */</div><div class='ctx'> 	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */</div><div class='del'>-	andi	r11, r11, _TIF_SIGPENDING;</div><div class='add'>+	andi	r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;</div><div class='ctx'> 	beqi	r11, 1f;		/* Signals to handle, handle them */</div><div class='ctx'> </div><div class='ctx'> 	addik	r5, r1, 0;		/* Arg 1: struct pt_regs *regs */</div><div class='del'>-	addi  r7, r0, 0;	/* Arg 3: int in_syscall */</div><div class='del'>-	bralid	r15, do_signal;	/* Handle any signals */</div><div class='del'>-	add	r6, r0, r0;		/* Arg 2: sigset_t *oldset */</div><div class='add'>+	bralid	r15, do_notify_resume;	/* Handle any signals */</div><div class='add'>+	addi  r6, r0, 0;	/* Arg 2: int in_syscall */</div><div class='ctx'> </div><div class='ctx'> /* Finally, return to user state.  */</div><div class='ctx'> 1:	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */</div><div class='head'>diff --git a/arch/microblaze/kernel/init_task.c b/arch/microblaze/kernel/init_task.c<br/>deleted file mode 100644<br/>index b5d711f94ff8..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2009 Michal Simek &lt;monstr@monstr.eu&gt;</div><div class='del'>- * Copyright (C) 2009 PetaLogix</div><div class='del'>- * Copyright (C) 2006 Atmark Techno, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License. See the file "COPYING" in the main directory of this archive</div><div class='del'>- * for more details.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/microblaze/kernel/mcount.S b/arch/microblaze/kernel/mcount.S<br/>index e7eaa7a8cbd3..fc1e1322ce4c 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/kernel/mcount.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/kernel/mcount.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/kernel/mcount.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/mcount.S</a></div><div class='hunk'>@@ -138,7 +138,7 @@ NOALIGN_ENTRY(ftrace_call)</div><div class='ctx'> #endif /* CONFIG_DYNAMIC_FTRACE */</div><div class='ctx'> /* static normal trace */</div><div class='ctx'> 	lwi	r6, r1, 120; /* MS: load parent addr */</div><div class='del'>-	addik	r5, r15, 0; /* MS: load current function addr */</div><div class='add'>+	addik	r5, r15, -4; /* MS: load current function addr */</div><div class='ctx'> 	/* MS: here is dependency on previous code */</div><div class='ctx'> 	brald	r15, r20; /* MS: jump to ftrace handler */</div><div class='ctx'> 	nop;</div><div class='head'>diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c<br/>index 883b92789cdf..1944e00f07e1 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/process.c</a></div><div class='hunk'>@@ -182,8 +182,12 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,</div><div class='ctx'> #endif</div><div class='ctx'> 	ti-&gt;cpu_context.r15 = (unsigned long)ret_from_fork - 8;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 *  r21 is the thread reg, r10 is 6th arg to clone</div><div class='add'>+	 *  which contains TLS area</div><div class='add'>+	 */</div><div class='ctx'> 	if (clone_flags &amp; CLONE_SETTLS)</div><div class='del'>-		;</div><div class='add'>+		childregs-&gt;r21 = childregs-&gt;r10;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c<br/>index 599671168980..76b9722557db 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/kernel/signal.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;linux/personality.h&gt;</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/tracehook.h&gt;</div><div class='ctx'> #include &lt;asm/entry.h&gt;</div><div class='ctx'> #include &lt;asm/ucontext.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='hunk'>@@ -40,10 +41,6 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/syscalls.h&gt;</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='del'>-asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset, int in_sycall);</div><div class='del'>-</div><div class='ctx'> asmlinkage long</div><div class='ctx'> sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,</div><div class='ctx'> 		struct pt_regs *regs)</div><div class='hunk'>@@ -98,17 +95,16 @@ asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	sigset_t set;</div><div class='ctx'> 	int rval;</div><div class='ctx'> </div><div class='add'>+	/* Always make any pending restarted system calls return -EINTR */</div><div class='add'>+	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='add'>+</div><div class='ctx'> 	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext, &amp;rval))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -169,7 +165,7 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)</div><div class='ctx'> 	return (void __user *)((sp - frame_size) &amp; -8UL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='add'>+static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 			sigset_t *set, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct rt_sigframe __user *frame;</div><div class='hunk'>@@ -267,12 +263,11 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 		current-&gt;comm, current-&gt;pid, frame, regs-&gt;pc);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	return;</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> give_sigsegv:</div><div class='del'>-	if (sig == SIGSEGV)</div><div class='del'>-		ka-&gt;sa.sa_handler = SIG_DFL;</div><div class='del'>-	force_sig(SIGSEGV, current);</div><div class='add'>+	force_sigsegv(sig, current);</div><div class='add'>+	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Handle restarting system calls */</div><div class='hunk'>@@ -312,28 +307,23 @@ do_restart:</div><div class='ctx'>  * OK, we're invoking a handler</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static int</div><div class='add'>+static void</div><div class='ctx'> handle_signal(unsigned long sig, struct k_sigaction *ka,</div><div class='del'>-		siginfo_t *info, sigset_t *oldset, struct pt_regs *regs)</div><div class='add'>+		siginfo_t *info, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	/* Set up the stack frame */</div><div class='ctx'> 	if (ka-&gt;sa.sa_flags &amp; SA_SIGINFO)</div><div class='del'>-		setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='add'>+		ret = setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='ctx'> 	else</div><div class='del'>-		setup_rt_frame(sig, ka, NULL, oldset, regs);</div><div class='del'>-</div><div class='del'>-	if (ka-&gt;sa.sa_flags &amp; SA_ONESHOT)</div><div class='del'>-		ka-&gt;sa.sa_handler = SIG_DFL;</div><div class='del'>-</div><div class='del'>-	if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER)) {</div><div class='del'>-		spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-		sigorsets(&amp;current-&gt;blocked,</div><div class='del'>-				&amp;current-&gt;blocked, &amp;ka-&gt;sa.sa_mask);</div><div class='del'>-		sigaddset(&amp;current-&gt;blocked, sig);</div><div class='del'>-		recalc_sigpending();</div><div class='del'>-		spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	}</div><div class='del'>-	return 1;</div><div class='add'>+		ret = setup_rt_frame(sig, ka, NULL, oldset, regs);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -345,46 +335,24 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,</div><div class='ctx'>  * the kernel can handle, and then we build all the user-level signal handling</div><div class='ctx'>  * stack-frames in one go after that.</div><div class='ctx'>  */</div><div class='del'>-int do_signal(struct pt_regs *regs, sigset_t *oldset, int in_syscall)</div><div class='add'>+static void do_signal(struct pt_regs *regs, int in_syscall)</div><div class='ctx'> {</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='ctx'> #ifdef DEBUG_SIG</div><div class='del'>-	printk(KERN_INFO "do signal: %p %p %d\n", regs, oldset, in_syscall);</div><div class='add'>+	printk(KERN_INFO "do signal: %p %d\n", regs, in_syscall);</div><div class='ctx'> 	printk(KERN_INFO "do signal2: %lx %lx %ld [%lx]\n", regs-&gt;pc, regs-&gt;r1,</div><div class='ctx'> 			regs-&gt;r12, current_thread_info()-&gt;flags);</div><div class='ctx'> #endif</div><div class='del'>-	/*</div><div class='del'>-	 * We want the common case to go fast, which</div><div class='del'>-	 * is why we may in certain cases get here from</div><div class='del'>-	 * kernel mode. Just return without doing anything</div><div class='del'>-	 * if so.</div><div class='del'>-	 */</div><div class='del'>-	if (kernel_mode(regs))</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK)</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='ctx'> </div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		/* Whee! Actually deliver the signal. */</div><div class='ctx'> 		if (in_syscall)</div><div class='ctx'> 			handle_restart(regs, &amp;ka, 1);</div><div class='del'>-		if (handle_signal(signr, &amp;ka, &amp;info, oldset, regs)) {</div><div class='del'>-			/*</div><div class='del'>-			 * A signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TS_RESTORE_SIGMASK flag.</div><div class='del'>-			 */</div><div class='del'>-			current_thread_info()-&gt;status &amp;=</div><div class='del'>-			    ~TS_RESTORE_SIGMASK;</div><div class='del'>-		}</div><div class='del'>-		return 1;</div><div class='add'>+		handle_signal(signr, &amp;ka, &amp;info, regs);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (in_syscall)</div><div class='hunk'>@@ -394,11 +362,23 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset, int in_syscall)</div><div class='ctx'> 	 * If there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back.</div><div class='ctx'> 	 */</div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK) {</div><div class='del'>-		current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Did we come from a system call? */</div><div class='del'>-	return 0;</div><div class='add'>+void do_notify_resume(struct pt_regs *regs, int in_syscall)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * We want the common case to go fast, which</div><div class='add'>+	 * is why we may in certain cases get here from</div><div class='add'>+	 * kernel mode. Just return without doing anything</div><div class='add'>+	 * if so.</div><div class='add'>+	 */</div><div class='add'>+	if (kernel_mode(regs))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (test_thread_flag(TIF_SIGPENDING))</div><div class='add'>+		do_signal(regs, in_syscall);</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_thread_flag(TIF_NOTIFY_RESUME))</div><div class='add'>+		tracehook_notify_resume(regs);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/microblaze/mm/fault.c b/arch/microblaze/mm/fault.c<br/>index c38a265846de..eb365d6795fa 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/mm/fault.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/mm/fault.c</a></div><div class='hunk'>@@ -92,6 +92,8 @@ void do_page_fault(struct pt_regs *regs, unsigned long address,</div><div class='ctx'> 	int code = SEGV_MAPERR;</div><div class='ctx'> 	int is_write = error_code &amp; ESR_S;</div><div class='ctx'> 	int fault;</div><div class='add'>+	unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |</div><div class='add'>+					 (is_write ? FAULT_FLAG_WRITE : 0);</div><div class='ctx'> </div><div class='ctx'> 	regs-&gt;ear = address;</div><div class='ctx'> 	regs-&gt;esr = error_code;</div><div class='hunk'>@@ -138,6 +140,7 @@ void do_page_fault(struct pt_regs *regs, unsigned long address,</div><div class='ctx'> 		if (kernel_mode(regs) &amp;&amp; !search_exception_tables(regs-&gt;pc))</div><div class='ctx'> 			goto bad_area_nosemaphore;</div><div class='ctx'> </div><div class='add'>+retry:</div><div class='ctx'> 		down_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -210,7 +213,11 @@ good_area:</div><div class='ctx'> 	 * make sure we exit gracefully rather than endlessly redo</div><div class='ctx'> 	 * the fault.</div><div class='ctx'> 	 */</div><div class='del'>-	fault = handle_mm_fault(mm, vma, address, is_write ? FAULT_FLAG_WRITE : 0);</div><div class='add'>+	fault = handle_mm_fault(mm, vma, address, flags);</div><div class='add'>+</div><div class='add'>+	if ((fault &amp; VM_FAULT_RETRY) &amp;&amp; fatal_signal_pending(current))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(fault &amp; VM_FAULT_ERROR)) {</div><div class='ctx'> 		if (fault &amp; VM_FAULT_OOM)</div><div class='ctx'> 			goto out_of_memory;</div><div class='hunk'>@@ -218,11 +225,27 @@ good_area:</div><div class='ctx'> 			goto do_sigbus;</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='del'>-	if (unlikely(fault &amp; VM_FAULT_MAJOR))</div><div class='del'>-		current-&gt;maj_flt++;</div><div class='del'>-	else</div><div class='del'>-		current-&gt;min_flt++;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; FAULT_FLAG_ALLOW_RETRY) {</div><div class='add'>+		if (unlikely(fault &amp; VM_FAULT_MAJOR))</div><div class='add'>+			current-&gt;maj_flt++;</div><div class='add'>+		else</div><div class='add'>+			current-&gt;min_flt++;</div><div class='add'>+		if (fault &amp; VM_FAULT_RETRY) {</div><div class='add'>+			flags &amp;= ~FAULT_FLAG_ALLOW_RETRY;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * No need to up_read(&amp;mm-&gt;mmap_sem) as we would</div><div class='add'>+			 * have already released it in __lock_page_or_retry</div><div class='add'>+			 * in mm/filemap.c.</div><div class='add'>+			 */</div><div class='add'>+</div><div class='add'>+			goto retry;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	up_read(&amp;mm-&gt;mmap_sem);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * keep track of tlb+htab misses that are good addrs but</div><div class='ctx'> 	 * just need pte's created via handle_mm_fault()</div><div class='head'>diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c<br/>index d10403dadd2b..ed22bfc5db14 100644<br/>--- a/<a href='/drm-misc/tree/arch/microblaze/pci/pci-common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/microblaze/pci/pci-common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/microblaze/pci/pci-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/microblaze/pci/pci-common.c</a></div><div class='hunk'>@@ -1422,6 +1422,7 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)</div><div class='ctx'> </div><div class='ctx'> static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, struct list_head *resources)</div><div class='ctx'> {</div><div class='add'>+	unsigned long io_offset;</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig<br/>index ce30e2f91d77..09ab87ee6fef 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/Kconfig</a></div><div class='hunk'>@@ -8,6 +8,7 @@ config MIPS</div><div class='ctx'> 	select HAVE_PERF_EVENTS</div><div class='ctx'> 	select PERF_USE_VMALLOC</div><div class='ctx'> 	select HAVE_ARCH_KGDB</div><div class='add'>+	select ARCH_HAVE_CUSTOM_GPIO_H</div><div class='ctx'> 	select HAVE_FUNCTION_TRACER</div><div class='ctx'> 	select HAVE_FUNCTION_TRACE_MCOUNT_TEST</div><div class='ctx'> 	select HAVE_DYNAMIC_FTRACE</div><div class='hunk'>@@ -29,6 +30,10 @@ config MIPS</div><div class='ctx'> 	select HAVE_MEMBLOCK</div><div class='ctx'> 	select HAVE_MEMBLOCK_NODE_MAP</div><div class='ctx'> 	select ARCH_DISCARD_MEMBLOCK</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='add'>+	select BUILDTIME_EXTABLE_SORT</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select GENERIC_CMOS_UPDATE</div><div class='ctx'> </div><div class='ctx'> menu "Machine selection"</div><div class='ctx'> </div><div class='hunk'>@@ -228,8 +233,9 @@ config LANTIQ</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	select SWAP_IO_SPACE</div><div class='ctx'> 	select BOOT_RAW</div><div class='del'>-	select HAVE_CLK</div><div class='del'>-	select MIPS_MACHINE</div><div class='add'>+	select HAVE_MACH_CLKDEV</div><div class='add'>+	select CLKDEV_LOOKUP</div><div class='add'>+	select USE_OF</div><div class='ctx'> </div><div class='ctx'> config LASAT</div><div class='ctx'> 	bool "LASAT Networks platforms"</div><div class='hunk'>@@ -856,14 +862,6 @@ config GENERIC_CALIBRATE_DELAY</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	bool</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-config GENERIC_CMOS_UPDATE</div><div class='del'>-	bool</div><div class='del'>-	default y</div><div class='del'>-</div><div class='ctx'> config SCHED_OMIT_FRAME_POINTER</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -1001,12 +999,12 @@ config HOLES_IN_ZONE</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='ctx'> #</div><div class='del'>-# Endianess selection.  Sufficiently obscure so many users don't know what to</div><div class='add'>+# Endianness selection.  Sufficiently obscure so many users don't know what to</div><div class='ctx'> # answer,so we try hard to limit the available choices.  Also the use of a</div><div class='ctx'> # choice statement should be more obvious to the user.</div><div class='ctx'> #</div><div class='ctx'> choice</div><div class='del'>-	prompt "Endianess selection"</div><div class='add'>+	prompt "Endianness selection"</div><div class='ctx'> 	help</div><div class='ctx'> 	  Some MIPS machines can be configured for either little or big endian</div><div class='ctx'> 	  byte order. These modes require different kernels and a different</div><div class='hunk'>@@ -1786,10 +1784,12 @@ endchoice</div><div class='ctx'> </div><div class='ctx'> config FORCE_MAX_ZONEORDER</div><div class='ctx'> 	int "Maximum zone order"</div><div class='del'>-	range 13 64 if SYS_SUPPORTS_HUGETLBFS &amp;&amp; PAGE_SIZE_32KB</div><div class='del'>-	default "13" if SYS_SUPPORTS_HUGETLBFS &amp;&amp; PAGE_SIZE_32KB</div><div class='del'>-	range 12 64 if SYS_SUPPORTS_HUGETLBFS &amp;&amp; PAGE_SIZE_16KB</div><div class='del'>-	default "12" if SYS_SUPPORTS_HUGETLBFS &amp;&amp; PAGE_SIZE_16KB</div><div class='add'>+	range 14 64 if HUGETLB_PAGE &amp;&amp; PAGE_SIZE_64KB</div><div class='add'>+	default "14" if HUGETLB_PAGE &amp;&amp; PAGE_SIZE_64KB</div><div class='add'>+	range 13 64 if HUGETLB_PAGE &amp;&amp; PAGE_SIZE_32KB</div><div class='add'>+	default "13" if HUGETLB_PAGE &amp;&amp; PAGE_SIZE_32KB</div><div class='add'>+	range 12 64 if HUGETLB_PAGE &amp;&amp; PAGE_SIZE_16KB</div><div class='add'>+	default "12" if HUGETLB_PAGE &amp;&amp; PAGE_SIZE_16KB</div><div class='ctx'> 	range 11 64</div><div class='ctx'> 	default "11"</div><div class='ctx'> 	help</div><div class='hunk'>@@ -2050,9 +2050,6 @@ config CPU_HAS_SYNC</div><div class='ctx'> 	depends on !CPU_R3000</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS_BROADCAST</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> #</div><div class='ctx'> # CPU non-features</div><div class='ctx'> #</div><div class='hunk'>@@ -2214,8 +2211,6 @@ config NR_CPUS</div><div class='ctx'> 	  performance should round up your number of processors to the next</div><div class='ctx'> 	  power of two.</div><div class='ctx'> </div><div class='del'>-source "kernel/time/Kconfig"</div><div class='del'>-</div><div class='ctx'> #</div><div class='ctx'> # Timer Interrupt Frequency Configuration</div><div class='ctx'> #</div><div class='head'>diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug<br/>index 83ed00a5644a..5a43aa0798ca 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/Kconfig.debug?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/Kconfig.debug</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/Kconfig.debug?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/Kconfig.debug</a></div><div class='hunk'>@@ -57,7 +57,7 @@ config CMDLINE</div><div class='ctx'> 	  options.</div><div class='ctx'> </div><div class='ctx'> config CMDLINE_OVERRIDE</div><div class='del'>-	bool "Built-in command line overrides firware arguments"</div><div class='add'>+	bool "Built-in command line overrides firmware arguments"</div><div class='ctx'> 	default n</div><div class='ctx'> 	depends on CMDLINE_BOOL</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/mips/Makefile b/arch/mips/Makefile<br/>index 4fedf5a51d96..764e37a9dbb3 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/Makefile</a></div><div class='hunk'>@@ -219,8 +219,8 @@ endif</div><div class='ctx'> </div><div class='ctx'> KBUILD_AFLAGS	+= $(cflags-y)</div><div class='ctx'> KBUILD_CFLAGS	+= $(cflags-y)</div><div class='del'>-KBUILD_CPPFLAGS += -D"VMLINUX_LOAD_ADDRESS=$(load-y)"</div><div class='del'>-KBUILD_CPPFLAGS += -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"</div><div class='add'>+KBUILD_CPPFLAGS += -DVMLINUX_LOAD_ADDRESS=$(load-y)</div><div class='add'>+KBUILD_CPPFLAGS += -DDATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)</div><div class='ctx'> </div><div class='ctx'> LDFLAGS			+= -m $(ld-emul)</div><div class='ctx'> </div><div class='hunk'>@@ -235,7 +235,7 @@ endif</div><div class='ctx'> </div><div class='ctx'> OBJCOPYFLAGS		+= --remove-section=.reginfo</div><div class='ctx'> </div><div class='del'>-head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o</div><div class='add'>+head-y := arch/mips/kernel/head.o</div><div class='ctx'> </div><div class='ctx'> libs-y			+= arch/mips/lib/</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/alchemy/devboards/db1200.c b/arch/mips/alchemy/devboards/db1200.c<br/>index a83302b96c01..bf2248474fa8 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/alchemy/devboards/db1200.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/alchemy/devboards/db1200.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/alchemy/devboards/db1200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/alchemy/devboards/db1200.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/leds.h&gt;</div><div class='hunk'>@@ -212,8 +213,6 @@ static int au1200_nand_device_ready(struct mtd_info *mtd)</div><div class='ctx'> 	return __raw_readl((void __iomem *)MEM_STSTAT) &amp; 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char *db1200_part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> static struct mtd_partition db1200_nand_parts[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name	= "NAND FS 0",</div><div class='hunk'>@@ -234,7 +233,6 @@ struct platform_nand_data db1200_nand_platdata = {</div><div class='ctx'> 		.nr_partitions	= ARRAY_SIZE(db1200_nand_parts),</div><div class='ctx'> 		.partitions	= db1200_nand_parts,</div><div class='ctx'> 		.chip_delay	= 20,</div><div class='del'>-		.part_probe_types = db1200_part_probes,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl = {</div><div class='ctx'> 		.dev_ready	= au1200_nand_device_ready,</div><div class='head'>diff --git a/arch/mips/alchemy/devboards/db1300.c b/arch/mips/alchemy/devboards/db1300.c<br/>index 0893f2af0d01..c56e0246694e 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/alchemy/devboards/db1300.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/alchemy/devboards/db1300.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/alchemy/devboards/db1300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/alchemy/devboards/db1300.c</a></div><div class='hunk'>@@ -145,8 +145,6 @@ static int au1300_nand_device_ready(struct mtd_info *mtd)</div><div class='ctx'> 	return __raw_readl((void __iomem *)MEM_STSTAT) &amp; 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char *db1300_part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> static struct mtd_partition db1300_nand_parts[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name	= "NAND FS 0",</div><div class='hunk'>@@ -167,7 +165,6 @@ struct platform_nand_data db1300_nand_platdata = {</div><div class='ctx'> 		.nr_partitions	= ARRAY_SIZE(db1300_nand_parts),</div><div class='ctx'> 		.partitions	= db1300_nand_parts,</div><div class='ctx'> 		.chip_delay	= 20,</div><div class='del'>-		.part_probe_types = db1300_part_probes,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl = {</div><div class='ctx'> 		.dev_ready	= au1300_nand_device_ready,</div><div class='head'>diff --git a/arch/mips/alchemy/devboards/db1550.c b/arch/mips/alchemy/devboards/db1550.c<br/>index 6815d0783cd8..9eb79062f46e 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/alchemy/devboards/db1550.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/alchemy/devboards/db1550.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/alchemy/devboards/db1550.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/alchemy/devboards/db1550.c</a></div><div class='hunk'>@@ -149,8 +149,6 @@ static int au1550_nand_device_ready(struct mtd_info *mtd)</div><div class='ctx'> 	return __raw_readl((void __iomem *)MEM_STSTAT) &amp; 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char *db1550_part_probes[] = { "cmdlinepart", NULL };</div><div class='del'>-</div><div class='ctx'> static struct mtd_partition db1550_nand_parts[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name	= "NAND FS 0",</div><div class='hunk'>@@ -171,7 +169,6 @@ struct platform_nand_data db1550_nand_platdata = {</div><div class='ctx'> 		.nr_partitions	= ARRAY_SIZE(db1550_nand_parts),</div><div class='ctx'> 		.partitions	= db1550_nand_parts,</div><div class='ctx'> 		.chip_delay	= 20,</div><div class='del'>-		.part_probe_types = db1550_part_probes,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl = {</div><div class='ctx'> 		.dev_ready	= au1550_nand_device_ready,</div><div class='head'>diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig<br/>index e0fae8f4442b..f44feee2d67f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/Kconfig</a></div><div class='hunk'>@@ -26,6 +26,18 @@ config ATH79_MACH_AP81</div><div class='ctx'> 	  Say 'Y' here if you want your kernel to support the</div><div class='ctx'> 	  Atheros AP81 reference board.</div><div class='ctx'> </div><div class='add'>+config ATH79_MACH_DB120</div><div class='add'>+	bool "Atheros DB120 reference board"</div><div class='add'>+	select SOC_AR934X</div><div class='add'>+	select ATH79_DEV_GPIO_BUTTONS</div><div class='add'>+	select ATH79_DEV_LEDS_GPIO</div><div class='add'>+	select ATH79_DEV_SPI</div><div class='add'>+	select ATH79_DEV_USB</div><div class='add'>+	select ATH79_DEV_WMAC</div><div class='add'>+	help</div><div class='add'>+	  Say 'Y' here if you want your kernel to support the</div><div class='add'>+	  Atheros DB120 reference board.</div><div class='add'>+</div><div class='ctx'> config ATH79_MACH_PB44</div><div class='ctx'> 	bool "Atheros PB44 reference board"</div><div class='ctx'> 	select SOC_AR71XX</div><div class='hunk'>@@ -52,12 +64,14 @@ endmenu</div><div class='ctx'> config SOC_AR71XX</div><div class='ctx'> 	select USB_ARCH_HAS_EHCI</div><div class='ctx'> 	select USB_ARCH_HAS_OHCI</div><div class='add'>+	select HW_HAS_PCI</div><div class='ctx'> 	def_bool n</div><div class='ctx'> </div><div class='ctx'> config SOC_AR724X</div><div class='ctx'> 	select USB_ARCH_HAS_EHCI</div><div class='ctx'> 	select USB_ARCH_HAS_OHCI</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='add'>+	select PCI_AR724X if PCI</div><div class='ctx'> 	def_bool n</div><div class='ctx'> </div><div class='ctx'> config SOC_AR913X</div><div class='hunk'>@@ -68,6 +82,15 @@ config SOC_AR933X</div><div class='ctx'> 	select USB_ARCH_HAS_EHCI</div><div class='ctx'> 	def_bool n</div><div class='ctx'> </div><div class='add'>+config SOC_AR934X</div><div class='add'>+	select USB_ARCH_HAS_EHCI</div><div class='add'>+	select HW_HAS_PCI</div><div class='add'>+	select PCI_AR724X if PCI</div><div class='add'>+	def_bool n</div><div class='add'>+</div><div class='add'>+config PCI_AR724X</div><div class='add'>+	def_bool n</div><div class='add'>+</div><div class='ctx'> config ATH79_DEV_GPIO_BUTTONS</div><div class='ctx'> 	def_bool n</div><div class='ctx'> </div><div class='hunk'>@@ -81,7 +104,7 @@ config ATH79_DEV_USB</div><div class='ctx'> 	def_bool n</div><div class='ctx'> </div><div class='ctx'> config ATH79_DEV_WMAC</div><div class='del'>-	depends on (SOC_AR913X || SOC_AR933X)</div><div class='add'>+	depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X)</div><div class='ctx'> 	def_bool n</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile<br/>index 3b911e09dbec..2b54d98263f3 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/Makefile</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> obj-y	:= prom.o setup.o irq.o common.o clock.o gpio.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_EARLY_PRINTK)		+= early_printk.o</div><div class='add'>+obj-$(CONFIG_PCI)			+= pci.o</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # Devices</div><div class='hunk'>@@ -27,5 +28,6 @@ obj-$(CONFIG_ATH79_DEV_WMAC)		+= dev-wmac.o</div><div class='ctx'> #</div><div class='ctx'> obj-$(CONFIG_ATH79_MACH_AP121)		+= mach-ap121.o</div><div class='ctx'> obj-$(CONFIG_ATH79_MACH_AP81)		+= mach-ap81.o</div><div class='add'>+obj-$(CONFIG_ATH79_MACH_DB120)		+= mach-db120.o</div><div class='ctx'> obj-$(CONFIG_ATH79_MACH_PB44)		+= mach-pb44.o</div><div class='ctx'> obj-$(CONFIG_ATH79_MACH_UBNT_XM)	+= mach-ubnt-xm.o</div><div class='head'>diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c<br/>index 54d0eb4db987..b91ad3efe29e 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/clock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/clock.c</a></div><div class='hunk'>@@ -1,8 +1,11 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  Atheros AR71XX/AR724X/AR913X common routines</div><div class='ctx'>  *</div><div class='add'>+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan &lt;jnarayanan@atheros.com&gt;</div><div class='ctx'>  *  Copyright (C) 2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='ctx'>  *</div><div class='add'>+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP</div><div class='add'>+ *</div><div class='ctx'>  *  This program is free software; you can redistribute it and/or modify it</div><div class='ctx'>  *  under the terms of the GNU General Public License version 2 as published</div><div class='ctx'>  *  by the Free Software Foundation.</div><div class='hunk'>@@ -163,6 +166,82 @@ static void __init ar933x_clocks_init(void)</div><div class='ctx'> 	ath79_uart_clk.rate = ath79_ref_clk.rate;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init ar934x_clocks_init(void)</div><div class='add'>+{</div><div class='add'>+	u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;</div><div class='add'>+	u32 cpu_pll, ddr_pll;</div><div class='add'>+	u32 bootstrap;</div><div class='add'>+</div><div class='add'>+	bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);</div><div class='add'>+	if (bootstrap &amp;	AR934X_BOOTSTRAP_REF_CLK_40)</div><div class='add'>+		ath79_ref_clk.rate = 40 * 1000 * 1000;</div><div class='add'>+	else</div><div class='add'>+		ath79_ref_clk.rate = 25 * 1000 * 1000;</div><div class='add'>+</div><div class='add'>+	pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG);</div><div class='add'>+	out_div = (pll &gt;&gt; AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &amp;</div><div class='add'>+		  AR934X_PLL_CPU_CONFIG_OUTDIV_MASK;</div><div class='add'>+	ref_div = (pll &gt;&gt; AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) &amp;</div><div class='add'>+		  AR934X_PLL_CPU_CONFIG_REFDIV_MASK;</div><div class='add'>+	nint = (pll &gt;&gt; AR934X_PLL_CPU_CONFIG_NINT_SHIFT) &amp;</div><div class='add'>+	       AR934X_PLL_CPU_CONFIG_NINT_MASK;</div><div class='add'>+	frac = (pll &gt;&gt; AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT) &amp;</div><div class='add'>+	       AR934X_PLL_CPU_CONFIG_NFRAC_MASK;</div><div class='add'>+</div><div class='add'>+	cpu_pll = nint * ath79_ref_clk.rate / ref_div;</div><div class='add'>+	cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (2 &lt;&lt; 6));</div><div class='add'>+	cpu_pll /= (1 &lt;&lt; out_div);</div><div class='add'>+</div><div class='add'>+	pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG);</div><div class='add'>+	out_div = (pll &gt;&gt; AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &amp;</div><div class='add'>+		  AR934X_PLL_DDR_CONFIG_OUTDIV_MASK;</div><div class='add'>+	ref_div = (pll &gt;&gt; AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) &amp;</div><div class='add'>+		  AR934X_PLL_DDR_CONFIG_REFDIV_MASK;</div><div class='add'>+	nint = (pll &gt;&gt; AR934X_PLL_DDR_CONFIG_NINT_SHIFT) &amp;</div><div class='add'>+	       AR934X_PLL_DDR_CONFIG_NINT_MASK;</div><div class='add'>+	frac = (pll &gt;&gt; AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT) &amp;</div><div class='add'>+	       AR934X_PLL_DDR_CONFIG_NFRAC_MASK;</div><div class='add'>+</div><div class='add'>+	ddr_pll = nint * ath79_ref_clk.rate / ref_div;</div><div class='add'>+	ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (2 &lt;&lt; 10));</div><div class='add'>+	ddr_pll /= (1 &lt;&lt; out_div);</div><div class='add'>+</div><div class='add'>+	clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG);</div><div class='add'>+</div><div class='add'>+	postdiv = (clk_ctrl &gt;&gt; AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) &amp;</div><div class='add'>+		  AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK;</div><div class='add'>+</div><div class='add'>+	if (clk_ctrl &amp; AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS)</div><div class='add'>+		ath79_cpu_clk.rate = ath79_ref_clk.rate;</div><div class='add'>+	else if (clk_ctrl &amp; AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL)</div><div class='add'>+		ath79_cpu_clk.rate = cpu_pll / (postdiv + 1);</div><div class='add'>+	else</div><div class='add'>+		ath79_cpu_clk.rate = ddr_pll / (postdiv + 1);</div><div class='add'>+</div><div class='add'>+	postdiv = (clk_ctrl &gt;&gt; AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) &amp;</div><div class='add'>+		  AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK;</div><div class='add'>+</div><div class='add'>+	if (clk_ctrl &amp; AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS)</div><div class='add'>+		ath79_ddr_clk.rate = ath79_ref_clk.rate;</div><div class='add'>+	else if (clk_ctrl &amp; AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL)</div><div class='add'>+		ath79_ddr_clk.rate = ddr_pll / (postdiv + 1);</div><div class='add'>+	else</div><div class='add'>+		ath79_ddr_clk.rate = cpu_pll / (postdiv + 1);</div><div class='add'>+</div><div class='add'>+	postdiv = (clk_ctrl &gt;&gt; AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) &amp;</div><div class='add'>+		  AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK;</div><div class='add'>+</div><div class='add'>+	if (clk_ctrl &amp; AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS)</div><div class='add'>+		ath79_ahb_clk.rate = ath79_ref_clk.rate;</div><div class='add'>+	else if (clk_ctrl &amp; AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL)</div><div class='add'>+		ath79_ahb_clk.rate = ddr_pll / (postdiv + 1);</div><div class='add'>+	else</div><div class='add'>+		ath79_ahb_clk.rate = cpu_pll / (postdiv + 1);</div><div class='add'>+</div><div class='add'>+	ath79_wdt_clk.rate = ath79_ref_clk.rate;</div><div class='add'>+	ath79_uart_clk.rate = ath79_ref_clk.rate;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init ath79_clocks_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (soc_is_ar71xx())</div><div class='hunk'>@@ -173,6 +252,8 @@ void __init ath79_clocks_init(void)</div><div class='ctx'> 		ar913x_clocks_init();</div><div class='ctx'> 	else if (soc_is_ar933x())</div><div class='ctx'> 		ar933x_clocks_init();</div><div class='add'>+	else if (soc_is_ar934x())</div><div class='add'>+		ar934x_clocks_init();</div><div class='ctx'> 	else</div><div class='ctx'> 		BUG();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/ath79/common.c b/arch/mips/ath79/common.c<br/>index f0fda982b965..5a4adfc9d79d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/common.c</a></div><div class='hunk'>@@ -1,9 +1,12 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  Atheros AR71XX/AR724X/AR913X common routines</div><div class='ctx'>  *</div><div class='del'>- *  Copyright (C) 2008-2010 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan &lt;jnarayanan@atheros.com&gt;</div><div class='add'>+ *  Copyright (C) 2008-2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='ctx'>  *  Copyright (C) 2008 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='ctx'>  *</div><div class='add'>+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP</div><div class='add'>+ *</div><div class='ctx'>  *  This program is free software; you can redistribute it and/or modify it</div><div class='ctx'>  *  under the terms of the GNU General Public License version 2 as published</div><div class='ctx'>  *  by the Free Software Foundation.</div><div class='hunk'>@@ -67,6 +70,8 @@ void ath79_device_reset_set(u32 mask)</div><div class='ctx'> 		reg = AR913X_RESET_REG_RESET_MODULE;</div><div class='ctx'> 	else if (soc_is_ar933x())</div><div class='ctx'> 		reg = AR933X_RESET_REG_RESET_MODULE;</div><div class='add'>+	else if (soc_is_ar934x())</div><div class='add'>+		reg = AR934X_RESET_REG_RESET_MODULE;</div><div class='ctx'> 	else</div><div class='ctx'> 		BUG();</div><div class='ctx'> </div><div class='hunk'>@@ -91,6 +96,8 @@ void ath79_device_reset_clear(u32 mask)</div><div class='ctx'> 		reg = AR913X_RESET_REG_RESET_MODULE;</div><div class='ctx'> 	else if (soc_is_ar933x())</div><div class='ctx'> 		reg = AR933X_RESET_REG_RESET_MODULE;</div><div class='add'>+	else if (soc_is_ar934x())</div><div class='add'>+		reg = AR934X_RESET_REG_RESET_MODULE;</div><div class='ctx'> 	else</div><div class='ctx'> 		BUG();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/ath79/dev-common.c b/arch/mips/ath79/dev-common.c<br/>index f4956f809072..45efc63b08b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/dev-common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/dev-common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/dev-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/dev-common.c</a></div><div class='hunk'>@@ -89,7 +89,8 @@ void __init ath79_register_uart(void)</div><div class='ctx'> </div><div class='ctx'> 	if (soc_is_ar71xx() ||</div><div class='ctx'> 	    soc_is_ar724x() ||</div><div class='del'>-	    soc_is_ar913x()) {</div><div class='add'>+	    soc_is_ar913x() ||</div><div class='add'>+	    soc_is_ar934x()) {</div><div class='ctx'> 		ath79_uart_data[0].uartclk = clk_get_rate(clk);</div><div class='ctx'> 		platform_device_register(&amp;ath79_uart_device);</div><div class='ctx'> 	} else if (soc_is_ar933x()) {</div><div class='head'>diff --git a/arch/mips/ath79/dev-gpio-buttons.c b/arch/mips/ath79/dev-gpio-buttons.c<br/>index 4b0168a11c01..366b35fb164d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/dev-gpio-buttons.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/dev-gpio-buttons.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/dev-gpio-buttons.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/dev-gpio-buttons.c</a></div><div class='hunk'>@@ -25,12 +25,10 @@ void __init ath79_register_gpio_keys_polled(int id,</div><div class='ctx'> 	struct gpio_keys_button *p;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);</div><div class='add'>+	p = kmemdup(buttons, nbuttons * sizeof(*p), GFP_KERNEL);</div><div class='ctx'> 	if (!p)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	memcpy(p, buttons, nbuttons * sizeof(*p));</div><div class='del'>-</div><div class='ctx'> 	pdev = platform_device_alloc("gpio-keys-polled", id);</div><div class='ctx'> 	if (!pdev)</div><div class='ctx'> 		goto err_free_buttons;</div><div class='head'>diff --git a/arch/mips/ath79/dev-leds-gpio.c b/arch/mips/ath79/dev-leds-gpio.c<br/>index cdade68dcd17..dcb1debcefb8 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/dev-leds-gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/dev-leds-gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/dev-leds-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/dev-leds-gpio.c</a></div><div class='hunk'>@@ -24,12 +24,10 @@ void __init ath79_register_leds_gpio(int id,</div><div class='ctx'> 	struct gpio_led *p;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);</div><div class='add'>+	p = kmemdup(leds, num_leds * sizeof(*p), GFP_KERNEL);</div><div class='ctx'> 	if (!p)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	memcpy(p, leds, num_leds * sizeof(*p));</div><div class='del'>-</div><div class='ctx'> 	pdev = platform_device_alloc("leds-gpio", id);</div><div class='ctx'> 	if (!pdev)</div><div class='ctx'> 		goto err_free_leds;</div><div class='head'>diff --git a/arch/mips/ath79/dev-wmac.c b/arch/mips/ath79/dev-wmac.c<br/>index e21507052066..d6d893c16ad4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/dev-wmac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/dev-wmac.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/dev-wmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/dev-wmac.c</a></div><div class='hunk'>@@ -1,9 +1,12 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  Atheros AR913X/AR933X SoC built-in WMAC device support</div><div class='ctx'>  *</div><div class='add'>+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan &lt;jnarayanan@atheros.com&gt;</div><div class='ctx'>  *  Copyright (C) 2008-2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='ctx'>  *  Copyright (C) 2008 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='ctx'>  *</div><div class='add'>+ *  Parts of this file are based on Atheros 2.6.15/2.6.31 BSP</div><div class='add'>+ *</div><div class='ctx'>  *  This program is free software; you can redistribute it and/or modify it</div><div class='ctx'>  *  under the terms of the GNU General Public License version 2 as published</div><div class='ctx'>  *  by the Free Software Foundation.</div><div class='hunk'>@@ -26,8 +29,7 @@ static struct resource ath79_wmac_resources[] = {</div><div class='ctx'> 		/* .start and .end fields are filled dynamically */</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	}, {</div><div class='del'>-		.start	= ATH79_CPU_IRQ_IP2,</div><div class='del'>-		.end	= ATH79_CPU_IRQ_IP2,</div><div class='add'>+		/* .start and .end fields are filled dynamically */</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -53,13 +55,15 @@ static void __init ar913x_wmac_setup(void)</div><div class='ctx'> </div><div class='ctx'> 	ath79_wmac_resources[0].start = AR913X_WMAC_BASE;</div><div class='ctx'> 	ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1;</div><div class='add'>+	ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;</div><div class='add'>+	ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static int ar933x_wmac_reset(void)</div><div class='ctx'> {</div><div class='del'>-	ath79_device_reset_clear(AR933X_RESET_WMAC);</div><div class='ctx'> 	ath79_device_reset_set(AR933X_RESET_WMAC);</div><div class='add'>+	ath79_device_reset_clear(AR933X_RESET_WMAC);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -79,6 +83,8 @@ static void __init ar933x_wmac_setup(void)</div><div class='ctx'> </div><div class='ctx'> 	ath79_wmac_resources[0].start = AR933X_WMAC_BASE;</div><div class='ctx'> 	ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1;</div><div class='add'>+	ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;</div><div class='add'>+	ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;</div><div class='ctx'> </div><div class='ctx'> 	t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);</div><div class='ctx'> 	if (t &amp; AR933X_BOOTSTRAP_REF_CLK_40)</div><div class='hunk'>@@ -92,12 +98,32 @@ static void __init ar933x_wmac_setup(void)</div><div class='ctx'> 	ath79_wmac_data.external_reset = ar933x_wmac_reset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ar934x_wmac_setup(void)</div><div class='add'>+{</div><div class='add'>+	u32 t;</div><div class='add'>+</div><div class='add'>+	ath79_wmac_device.name = "ar934x_wmac";</div><div class='add'>+</div><div class='add'>+	ath79_wmac_resources[0].start = AR934X_WMAC_BASE;</div><div class='add'>+	ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1;</div><div class='add'>+	ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);</div><div class='add'>+	ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);</div><div class='add'>+</div><div class='add'>+	t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);</div><div class='add'>+	if (t &amp; AR934X_BOOTSTRAP_REF_CLK_40)</div><div class='add'>+		ath79_wmac_data.is_clk_25mhz = false;</div><div class='add'>+	else</div><div class='add'>+		ath79_wmac_data.is_clk_25mhz = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init ath79_register_wmac(u8 *cal_data)</div><div class='ctx'> {</div><div class='ctx'> 	if (soc_is_ar913x())</div><div class='ctx'> 		ar913x_wmac_setup();</div><div class='ctx'> 	else if (soc_is_ar933x())</div><div class='ctx'> 		ar933x_wmac_setup();</div><div class='add'>+	else if (soc_is_ar934x())</div><div class='add'>+		ar934x_wmac_setup();</div><div class='ctx'> 	else</div><div class='ctx'> 		BUG();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/ath79/early_printk.c b/arch/mips/ath79/early_printk.c<br/>index 6a51ced7a293..dc938cb2ba58 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/early_printk.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/early_printk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/early_printk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/early_printk.c</a></div><div class='hunk'>@@ -71,6 +71,9 @@ static void prom_putchar_init(void)</div><div class='ctx'> 	case REV_ID_MAJOR_AR7241:</div><div class='ctx'> 	case REV_ID_MAJOR_AR7242:</div><div class='ctx'> 	case REV_ID_MAJOR_AR913X:</div><div class='add'>+	case REV_ID_MAJOR_AR9341:</div><div class='add'>+	case REV_ID_MAJOR_AR9342:</div><div class='add'>+	case REV_ID_MAJOR_AR9344:</div><div class='ctx'> 		_prom_putchar = prom_putchar_ar71xx;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/ath79/gpio.c b/arch/mips/ath79/gpio.c<br/>index a2f8ca630ed6..29054f211832 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/gpio.c</a></div><div class='hunk'>@@ -1,9 +1,12 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  Atheros AR71XX/AR724X/AR913X GPIO API support</div><div class='ctx'>  *</div><div class='del'>- *  Copyright (C) 2008-2010 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan &lt;jnarayanan@atheros.com&gt;</div><div class='add'>+ *  Copyright (C) 2008-2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='ctx'>  *  Copyright (C) 2008 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='ctx'>  *</div><div class='add'>+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP</div><div class='add'>+ *</div><div class='ctx'>  *  This program is free software; you can redistribute it and/or modify it</div><div class='ctx'>  *  under the terms of the GNU General Public License version 2 as published</div><div class='ctx'>  *  by the Free Software Foundation.</div><div class='hunk'>@@ -89,6 +92,42 @@ static int ath79_gpio_direction_output(struct gpio_chip *chip,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ar934x_gpio_direction_input(struct gpio_chip *chip, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = ath79_gpio_base;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ath79_gpio_lock, flags);</div><div class='add'>+</div><div class='add'>+	__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 &lt;&lt; offset),</div><div class='add'>+		     base + AR71XX_GPIO_REG_OE);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;ath79_gpio_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar934x_gpio_direction_output(struct gpio_chip *chip, unsigned offset,</div><div class='add'>+					int value)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = ath79_gpio_base;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ath79_gpio_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		__raw_writel(1 &lt;&lt; offset, base + AR71XX_GPIO_REG_SET);</div><div class='add'>+	else</div><div class='add'>+		__raw_writel(1 &lt;&lt; offset, base + AR71XX_GPIO_REG_CLEAR);</div><div class='add'>+</div><div class='add'>+	__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) &amp; ~(1 &lt;&lt; offset),</div><div class='add'>+		     base + AR71XX_GPIO_REG_OE);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;ath79_gpio_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct gpio_chip ath79_gpio_chip = {</div><div class='ctx'> 	.label			= "ath79",</div><div class='ctx'> 	.get			= ath79_gpio_get_value,</div><div class='hunk'>@@ -155,11 +194,17 @@ void __init ath79_gpio_init(void)</div><div class='ctx'> 		ath79_gpio_count = AR913X_GPIO_COUNT;</div><div class='ctx'> 	else if (soc_is_ar933x())</div><div class='ctx'> 		ath79_gpio_count = AR933X_GPIO_COUNT;</div><div class='add'>+	else if (soc_is_ar934x())</div><div class='add'>+		ath79_gpio_count = AR934X_GPIO_COUNT;</div><div class='ctx'> 	else</div><div class='ctx'> 		BUG();</div><div class='ctx'> </div><div class='ctx'> 	ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);</div><div class='ctx'> 	ath79_gpio_chip.ngpio = ath79_gpio_count;</div><div class='add'>+	if (soc_is_ar934x()) {</div><div class='add'>+		ath79_gpio_chip.direction_input = ar934x_gpio_direction_input;</div><div class='add'>+		ath79_gpio_chip.direction_output = ar934x_gpio_direction_output;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = gpiochip_add(&amp;ath79_gpio_chip);</div><div class='ctx'> 	if (err)</div><div class='head'>diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c<br/>index 1b073de44680..90d09fc15398 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/irq.c</a></div><div class='hunk'>@@ -1,10 +1,11 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  Atheros AR71xx/AR724x/AR913x specific interrupt handling</div><div class='ctx'>  *</div><div class='del'>- *  Copyright (C) 2008-2010 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan &lt;jnarayanan@atheros.com&gt;</div><div class='add'>+ *  Copyright (C) 2008-2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='ctx'>  *  Copyright (C) 2008 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='ctx'>  *</div><div class='del'>- *  Parts of this file are based on Atheros' 2.6.15 BSP</div><div class='add'>+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP</div><div class='ctx'>  *</div><div class='ctx'>  *  This program is free software; you can redistribute it and/or modify it</div><div class='ctx'>  *  under the terms of the GNU General Public License version 2 as published</div><div class='hunk'>@@ -23,8 +24,8 @@</div><div class='ctx'> #include &lt;asm/mach-ath79/ar71xx_regs.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='ctx'> </div><div class='del'>-static unsigned int ath79_ip2_flush_reg;</div><div class='del'>-static unsigned int ath79_ip3_flush_reg;</div><div class='add'>+static void (*ath79_ip2_handler)(void);</div><div class='add'>+static void (*ath79_ip3_handler)(void);</div><div class='ctx'> </div><div class='ctx'> static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> {</div><div class='hunk'>@@ -129,7 +130,7 @@ static void __init ath79_misc_irq_init(void)</div><div class='ctx'> </div><div class='ctx'> 	if (soc_is_ar71xx() || soc_is_ar913x())</div><div class='ctx'> 		ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;</div><div class='del'>-	else if (soc_is_ar724x() || soc_is_ar933x())</div><div class='add'>+	else if (soc_is_ar724x() || soc_is_ar933x() || soc_is_ar934x())</div><div class='ctx'> 		ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;</div><div class='ctx'> 	else</div><div class='ctx'> 		BUG();</div><div class='hunk'>@@ -143,6 +144,39 @@ static void __init ath79_misc_irq_init(void)</div><div class='ctx'> 	irq_set_chained_handler(ATH79_CPU_IRQ_MISC, ath79_misc_irq_handler);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)</div><div class='add'>+{</div><div class='add'>+	u32 status;</div><div class='add'>+</div><div class='add'>+	disable_irq_nosync(irq);</div><div class='add'>+</div><div class='add'>+	status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS);</div><div class='add'>+</div><div class='add'>+	if (status &amp; AR934X_PCIE_WMAC_INT_PCIE_ALL) {</div><div class='add'>+		ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_PCIE);</div><div class='add'>+		generic_handle_irq(ATH79_IP2_IRQ(0));</div><div class='add'>+	} else if (status &amp; AR934X_PCIE_WMAC_INT_WMAC_ALL) {</div><div class='add'>+		ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_WMAC);</div><div class='add'>+		generic_handle_irq(ATH79_IP2_IRQ(1));</div><div class='add'>+	} else {</div><div class='add'>+		spurious_interrupt();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	enable_irq(irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar934x_ip2_irq_init(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = ATH79_IP2_IRQ_BASE;</div><div class='add'>+	     i &lt; ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)</div><div class='add'>+		irq_set_chip_and_handler(i, &amp;dummy_irq_chip,</div><div class='add'>+					 handle_level_irq);</div><div class='add'>+</div><div class='add'>+	irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar934x_ip2_irq_dispatch);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> asmlinkage void plat_irq_dispatch(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long pending;</div><div class='hunk'>@@ -152,10 +186,8 @@ asmlinkage void plat_irq_dispatch(void)</div><div class='ctx'> 	if (pending &amp; STATUSF_IP7)</div><div class='ctx'> 		do_IRQ(ATH79_CPU_IRQ_TIMER);</div><div class='ctx'> </div><div class='del'>-	else if (pending &amp; STATUSF_IP2) {</div><div class='del'>-		ath79_ddr_wb_flush(ath79_ip2_flush_reg);</div><div class='del'>-		do_IRQ(ATH79_CPU_IRQ_IP2);</div><div class='del'>-	}</div><div class='add'>+	else if (pending &amp; STATUSF_IP2)</div><div class='add'>+		ath79_ip2_handler();</div><div class='ctx'> </div><div class='ctx'> 	else if (pending &amp; STATUSF_IP4)</div><div class='ctx'> 		do_IRQ(ATH79_CPU_IRQ_GE0);</div><div class='hunk'>@@ -163,10 +195,8 @@ asmlinkage void plat_irq_dispatch(void)</div><div class='ctx'> 	else if (pending &amp; STATUSF_IP5)</div><div class='ctx'> 		do_IRQ(ATH79_CPU_IRQ_GE1);</div><div class='ctx'> </div><div class='del'>-	else if (pending &amp; STATUSF_IP3) {</div><div class='del'>-		ath79_ddr_wb_flush(ath79_ip3_flush_reg);</div><div class='del'>-		do_IRQ(ATH79_CPU_IRQ_USB);</div><div class='del'>-	}</div><div class='add'>+	else if (pending &amp; STATUSF_IP3)</div><div class='add'>+		ath79_ip3_handler();</div><div class='ctx'> </div><div class='ctx'> 	else if (pending &amp; STATUSF_IP6)</div><div class='ctx'> 		do_IRQ(ATH79_CPU_IRQ_MISC);</div><div class='hunk'>@@ -175,24 +205,97 @@ asmlinkage void plat_irq_dispatch(void)</div><div class='ctx'> 		spurious_interrupt();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * The IP2/IP3 lines are tied to a PCI/WMAC/USB device. Drivers for</div><div class='add'>+ * these devices typically allocate coherent DMA memory, however the</div><div class='add'>+ * DMA controller may still have some unsynchronized data in the FIFO.</div><div class='add'>+ * Issue a flush in the handlers to ensure that the driver sees</div><div class='add'>+ * the update.</div><div class='add'>+ */</div><div class='add'>+static void ar71xx_ip2_handler(void)</div><div class='add'>+{</div><div class='add'>+	ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_PCI);</div><div class='add'>+	do_IRQ(ATH79_CPU_IRQ_IP2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar724x_ip2_handler(void)</div><div class='add'>+{</div><div class='add'>+	ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_PCIE);</div><div class='add'>+	do_IRQ(ATH79_CPU_IRQ_IP2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar913x_ip2_handler(void)</div><div class='add'>+{</div><div class='add'>+	ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_WMAC);</div><div class='add'>+	do_IRQ(ATH79_CPU_IRQ_IP2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar933x_ip2_handler(void)</div><div class='add'>+{</div><div class='add'>+	ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_WMAC);</div><div class='add'>+	do_IRQ(ATH79_CPU_IRQ_IP2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar934x_ip2_handler(void)</div><div class='add'>+{</div><div class='add'>+	do_IRQ(ATH79_CPU_IRQ_IP2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar71xx_ip3_handler(void)</div><div class='add'>+{</div><div class='add'>+	ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_USB);</div><div class='add'>+	do_IRQ(ATH79_CPU_IRQ_USB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar724x_ip3_handler(void)</div><div class='add'>+{</div><div class='add'>+	ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_USB);</div><div class='add'>+	do_IRQ(ATH79_CPU_IRQ_USB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar913x_ip3_handler(void)</div><div class='add'>+{</div><div class='add'>+	ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_USB);</div><div class='add'>+	do_IRQ(ATH79_CPU_IRQ_USB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar933x_ip3_handler(void)</div><div class='add'>+{</div><div class='add'>+	ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_USB);</div><div class='add'>+	do_IRQ(ATH79_CPU_IRQ_USB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar934x_ip3_handler(void)</div><div class='add'>+{</div><div class='add'>+	ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_USB);</div><div class='add'>+	do_IRQ(ATH79_CPU_IRQ_USB);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init arch_init_irq(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (soc_is_ar71xx()) {</div><div class='del'>-		ath79_ip2_flush_reg = AR71XX_DDR_REG_FLUSH_PCI;</div><div class='del'>-		ath79_ip3_flush_reg = AR71XX_DDR_REG_FLUSH_USB;</div><div class='add'>+		ath79_ip2_handler = ar71xx_ip2_handler;</div><div class='add'>+		ath79_ip3_handler = ar71xx_ip3_handler;</div><div class='ctx'> 	} else if (soc_is_ar724x()) {</div><div class='del'>-		ath79_ip2_flush_reg = AR724X_DDR_REG_FLUSH_PCIE;</div><div class='del'>-		ath79_ip3_flush_reg = AR724X_DDR_REG_FLUSH_USB;</div><div class='add'>+		ath79_ip2_handler = ar724x_ip2_handler;</div><div class='add'>+		ath79_ip3_handler = ar724x_ip3_handler;</div><div class='ctx'> 	} else if (soc_is_ar913x()) {</div><div class='del'>-		ath79_ip2_flush_reg = AR913X_DDR_REG_FLUSH_WMAC;</div><div class='del'>-		ath79_ip3_flush_reg = AR913X_DDR_REG_FLUSH_USB;</div><div class='add'>+		ath79_ip2_handler = ar913x_ip2_handler;</div><div class='add'>+		ath79_ip3_handler = ar913x_ip3_handler;</div><div class='ctx'> 	} else if (soc_is_ar933x()) {</div><div class='del'>-		ath79_ip2_flush_reg = AR933X_DDR_REG_FLUSH_WMAC;</div><div class='del'>-		ath79_ip3_flush_reg = AR933X_DDR_REG_FLUSH_USB;</div><div class='del'>-	} else</div><div class='add'>+		ath79_ip2_handler = ar933x_ip2_handler;</div><div class='add'>+		ath79_ip3_handler = ar933x_ip3_handler;</div><div class='add'>+	} else if (soc_is_ar934x()) {</div><div class='add'>+		ath79_ip2_handler = ar934x_ip2_handler;</div><div class='add'>+		ath79_ip3_handler = ar934x_ip3_handler;</div><div class='add'>+	} else {</div><div class='ctx'> 		BUG();</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	cp0_perfcount_irq = ATH79_MISC_IRQ_PERFC;</div><div class='ctx'> 	mips_cpu_irq_init();</div><div class='ctx'> 	ath79_misc_irq_init();</div><div class='add'>+</div><div class='add'>+	if (soc_is_ar934x())</div><div class='add'>+		ar934x_ip2_irq_init();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/ath79/mach-db120.c b/arch/mips/ath79/mach-db120.c<br/>new file mode 100644<br/>index 000000000000..1983e4d2af4b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/mach-db120.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/mach-db120.c</a></div><div class='hunk'>@@ -0,0 +1,134 @@</div><div class='add'>+/*</div><div class='add'>+ * Atheros DB120 reference board support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2011 Qualcomm Atheros</div><div class='add'>+ * Copyright (c) 2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/ath9k_platform.h&gt;</div><div class='add'>+</div><div class='add'>+#include "machtypes.h"</div><div class='add'>+#include "dev-gpio-buttons.h"</div><div class='add'>+#include "dev-leds-gpio.h"</div><div class='add'>+#include "dev-spi.h"</div><div class='add'>+#include "dev-wmac.h"</div><div class='add'>+#include "pci.h"</div><div class='add'>+</div><div class='add'>+#define DB120_GPIO_LED_WLAN_5G		12</div><div class='add'>+#define DB120_GPIO_LED_WLAN_2G		13</div><div class='add'>+#define DB120_GPIO_LED_STATUS		14</div><div class='add'>+#define DB120_GPIO_LED_WPS		15</div><div class='add'>+</div><div class='add'>+#define DB120_GPIO_BTN_WPS		16</div><div class='add'>+</div><div class='add'>+#define DB120_KEYS_POLL_INTERVAL	20	/* msecs */</div><div class='add'>+#define DB120_KEYS_DEBOUNCE_INTERVAL	(3 * DB120_KEYS_POLL_INTERVAL)</div><div class='add'>+</div><div class='add'>+#define DB120_WMAC_CALDATA_OFFSET 0x1000</div><div class='add'>+#define DB120_PCIE_CALDATA_OFFSET 0x5000</div><div class='add'>+</div><div class='add'>+static struct gpio_led db120_leds_gpio[] __initdata = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "db120:green:status",</div><div class='add'>+		.gpio		= DB120_GPIO_LED_STATUS,</div><div class='add'>+		.active_low	= 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "db120:green:wps",</div><div class='add'>+		.gpio		= DB120_GPIO_LED_WPS,</div><div class='add'>+		.active_low	= 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "db120:green:wlan-5g",</div><div class='add'>+		.gpio		= DB120_GPIO_LED_WLAN_5G,</div><div class='add'>+		.active_low	= 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "db120:green:wlan-2g",</div><div class='add'>+		.gpio		= DB120_GPIO_LED_WLAN_2G,</div><div class='add'>+		.active_low	= 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gpio_keys_button db120_gpio_keys[] __initdata = {</div><div class='add'>+	{</div><div class='add'>+		.desc		= "WPS button",</div><div class='add'>+		.type		= EV_KEY,</div><div class='add'>+		.code		= KEY_WPS_BUTTON,</div><div class='add'>+		.debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL,</div><div class='add'>+		.gpio		= DB120_GPIO_BTN_WPS,</div><div class='add'>+		.active_low	= 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spi_board_info db120_spi_info[] = {</div><div class='add'>+	{</div><div class='add'>+		.bus_num	= 0,</div><div class='add'>+		.chip_select	= 0,</div><div class='add'>+		.max_speed_hz	= 25000000,</div><div class='add'>+		.modalias	= "s25sl064a",</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ath79_spi_platform_data db120_spi_data = {</div><div class='add'>+	.bus_num	= 0,</div><div class='add'>+	.num_chipselect	= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PCI</div><div class='add'>+static struct ath9k_platform_data db120_ath9k_data;</div><div class='add'>+</div><div class='add'>+static int db120_pci_plat_dev_init(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	switch (PCI_SLOT(dev-&gt;devfn)) {</div><div class='add'>+	case 0:</div><div class='add'>+		dev-&gt;dev.platform_data = &amp;db120_ath9k_data;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init db120_pci_init(u8 *eeprom)</div><div class='add'>+{</div><div class='add'>+	memcpy(db120_ath9k_data.eeprom_data, eeprom,</div><div class='add'>+	       sizeof(db120_ath9k_data.eeprom_data));</div><div class='add'>+</div><div class='add'>+	ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init);</div><div class='add'>+	ath79_register_pci();</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline void db120_pci_init(void) {}</div><div class='add'>+#endif /* CONFIG_PCI */</div><div class='add'>+</div><div class='add'>+static void __init db120_setup(void)</div><div class='add'>+{</div><div class='add'>+	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);</div><div class='add'>+</div><div class='add'>+	ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio),</div><div class='add'>+				 db120_leds_gpio);</div><div class='add'>+	ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL,</div><div class='add'>+					ARRAY_SIZE(db120_gpio_keys),</div><div class='add'>+					db120_gpio_keys);</div><div class='add'>+	ath79_register_spi(&amp;db120_spi_data, db120_spi_info,</div><div class='add'>+			   ARRAY_SIZE(db120_spi_info));</div><div class='add'>+	ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);</div><div class='add'>+	db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board",</div><div class='add'>+	     db120_setup);</div><div class='head'>diff --git a/arch/mips/ath79/mach-pb44.c b/arch/mips/ath79/mach-pb44.c<br/>index fe9701a32291..c5f0ea5e00c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/mach-pb44.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/mach-pb44.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/mach-pb44.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/mach-pb44.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include "dev-leds-gpio.h"</div><div class='ctx'> #include "dev-spi.h"</div><div class='ctx'> #include "dev-usb.h"</div><div class='add'>+#include "pci.h"</div><div class='ctx'> </div><div class='ctx'> #define PB44_GPIO_I2C_SCL	0</div><div class='ctx'> #define PB44_GPIO_I2C_SDA	1</div><div class='hunk'>@@ -114,6 +115,7 @@ static void __init pb44_init(void)</div><div class='ctx'> 	ath79_register_spi(&amp;pb44_spi_data, pb44_spi_info,</div><div class='ctx'> 			   ARRAY_SIZE(pb44_spi_info));</div><div class='ctx'> 	ath79_register_usb();</div><div class='add'>+	ath79_register_pci();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board",</div><div class='head'>diff --git a/arch/mips/ath79/mach-ubnt-xm.c b/arch/mips/ath79/mach-ubnt-xm.c<br/>index 3c311a539347..4a3c60694c75 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/mach-ubnt-xm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/mach-ubnt-xm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/mach-ubnt-xm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/mach-ubnt-xm.c</a></div><div class='hunk'>@@ -12,16 +12,15 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PCI</div><div class='ctx'> #include &lt;linux/ath9k_platform.h&gt;</div><div class='del'>-#include &lt;asm/mach-ath79/pci-ath724x.h&gt;</div><div class='del'>-#endif /* CONFIG_PCI */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/mach-ath79/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "machtypes.h"</div><div class='ctx'> #include "dev-gpio-buttons.h"</div><div class='ctx'> #include "dev-leds-gpio.h"</div><div class='ctx'> #include "dev-spi.h"</div><div class='add'>+#include "pci.h"</div><div class='ctx'> </div><div class='ctx'> #define UBNT_XM_GPIO_LED_L1		0</div><div class='ctx'> #define UBNT_XM_GPIO_LED_L2		1</div><div class='hunk'>@@ -33,7 +32,6 @@</div><div class='ctx'> #define UBNT_XM_KEYS_POLL_INTERVAL	20</div><div class='ctx'> #define UBNT_XM_KEYS_DEBOUNCE_INTERVAL	(3 * UBNT_XM_KEYS_POLL_INTERVAL)</div><div class='ctx'> </div><div class='del'>-#define UBNT_XM_PCI_IRQ			48</div><div class='ctx'> #define UBNT_XM_EEPROM_ADDR		(u8 *) KSEG1ADDR(0x1fff1000)</div><div class='ctx'> </div><div class='ctx'> static struct gpio_led ubnt_xm_leds_gpio[] __initdata = {</div><div class='hunk'>@@ -84,12 +82,27 @@ static struct ath79_spi_platform_data ubnt_xm_spi_data = {</div><div class='ctx'> #ifdef CONFIG_PCI</div><div class='ctx'> static struct ath9k_platform_data ubnt_xm_eeprom_data;</div><div class='ctx'> </div><div class='del'>-static struct ath724x_pci_data ubnt_xm_pci_data[] = {</div><div class='del'>-	{</div><div class='del'>-		.irq	= UBNT_XM_PCI_IRQ,</div><div class='del'>-		.pdata	= &amp;ubnt_xm_eeprom_data,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='add'>+static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	switch (PCI_SLOT(dev-&gt;devfn)) {</div><div class='add'>+	case 0:</div><div class='add'>+		dev-&gt;dev.platform_data = &amp;ubnt_xm_eeprom_data;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init ubnt_xm_pci_init(void)</div><div class='add'>+{</div><div class='add'>+	memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,</div><div class='add'>+	       sizeof(ubnt_xm_eeprom_data.eeprom_data));</div><div class='add'>+</div><div class='add'>+	ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init);</div><div class='add'>+	ath79_register_pci();</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline void ubnt_xm_pci_init(void) {}</div><div class='ctx'> #endif /* CONFIG_PCI */</div><div class='ctx'> </div><div class='ctx'> static void __init ubnt_xm_init(void)</div><div class='hunk'>@@ -104,13 +117,7 @@ static void __init ubnt_xm_init(void)</div><div class='ctx'> 	ath79_register_spi(&amp;ubnt_xm_spi_data, ubnt_xm_spi_info,</div><div class='ctx'> 			   ARRAY_SIZE(ubnt_xm_spi_info));</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-	memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,</div><div class='del'>-	       sizeof(ubnt_xm_eeprom_data.eeprom_data));</div><div class='del'>-</div><div class='del'>-	ath724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));</div><div class='del'>-#endif /* CONFIG_PCI */</div><div class='del'>-</div><div class='add'>+	ubnt_xm_pci_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> MIPS_MACHINE(ATH79_MACH_UBNT_XM,</div><div class='head'>diff --git a/arch/mips/ath79/machtypes.h b/arch/mips/ath79/machtypes.h<br/>index 9a1f3826626e..af92e5c30d66 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/machtypes.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/machtypes.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/machtypes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/machtypes.h</a></div><div class='hunk'>@@ -18,6 +18,7 @@ enum ath79_mach_type {</div><div class='ctx'> 	ATH79_MACH_GENERIC = 0,</div><div class='ctx'> 	ATH79_MACH_AP121,		/* Atheros AP121 reference board */</div><div class='ctx'> 	ATH79_MACH_AP81,		/* Atheros AP81 reference board */</div><div class='add'>+	ATH79_MACH_DB120,		/* Atheros DB120 reference board */</div><div class='ctx'> 	ATH79_MACH_PB44,		/* Atheros PB44 reference board */</div><div class='ctx'> 	ATH79_MACH_UBNT_XM,		/* Ubiquiti Networks XM board rev 1.0 */</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c<br/>new file mode 100644<br/>index 000000000000..ca83abd9d31e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/pci.c</a></div><div class='hunk'>@@ -0,0 +1,130 @@</div><div class='add'>+/*</div><div class='add'>+ *  Atheros AR71XX/AR724X specific PCI setup code</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2011 René Bolldorf &lt;xsecute@googlemail.com&gt;</div><div class='add'>+ *  Copyright (C) 2008-2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ *  Copyright (C) 2008 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ *  Parts of this file are based on Atheros' 2.6.15 BSP</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;asm/mach-ath79/ar71xx_regs.h&gt;</div><div class='add'>+#include &lt;asm/mach-ath79/ath79.h&gt;</div><div class='add'>+#include &lt;asm/mach-ath79/irq.h&gt;</div><div class='add'>+#include &lt;asm/mach-ath79/pci.h&gt;</div><div class='add'>+#include "pci.h"</div><div class='add'>+</div><div class='add'>+static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev);</div><div class='add'>+static const struct ath79_pci_irq *ath79_pci_irq_map __initdata;</div><div class='add'>+static unsigned ath79_pci_nr_irqs __initdata;</div><div class='add'>+</div><div class='add'>+static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = {</div><div class='add'>+	{</div><div class='add'>+		.slot	= 17,</div><div class='add'>+		.pin	= 1,</div><div class='add'>+		.irq	= ATH79_PCI_IRQ(0),</div><div class='add'>+	}, {</div><div class='add'>+		.slot	= 18,</div><div class='add'>+		.pin	= 1,</div><div class='add'>+		.irq	= ATH79_PCI_IRQ(1),</div><div class='add'>+	}, {</div><div class='add'>+		.slot	= 19,</div><div class='add'>+		.pin	= 1,</div><div class='add'>+		.irq	= ATH79_PCI_IRQ(2),</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ath79_pci_irq ar724x_pci_irq_map[] __initconst = {</div><div class='add'>+	{</div><div class='add'>+		.slot	= 0,</div><div class='add'>+		.pin	= 1,</div><div class='add'>+		.irq	= ATH79_PCI_IRQ(0),</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)</div><div class='add'>+{</div><div class='add'>+	int irq = -1;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (ath79_pci_nr_irqs == 0 ||</div><div class='add'>+	    ath79_pci_irq_map == NULL) {</div><div class='add'>+		if (soc_is_ar71xx()) {</div><div class='add'>+			ath79_pci_irq_map = ar71xx_pci_irq_map;</div><div class='add'>+			ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map);</div><div class='add'>+		} else if (soc_is_ar724x() ||</div><div class='add'>+			   soc_is_ar9342() ||</div><div class='add'>+			   soc_is_ar9344()) {</div><div class='add'>+			ath79_pci_irq_map = ar724x_pci_irq_map;</div><div class='add'>+			ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map);</div><div class='add'>+		} else {</div><div class='add'>+			pr_crit("pci %s: invalid irq map\n",</div><div class='add'>+				pci_name((struct pci_dev *) dev));</div><div class='add'>+			return irq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ath79_pci_nr_irqs; i++) {</div><div class='add'>+		const struct ath79_pci_irq *entry;</div><div class='add'>+</div><div class='add'>+		entry = &amp;ath79_pci_irq_map[i];</div><div class='add'>+		if (entry-&gt;slot == slot &amp;&amp; entry-&gt;pin == pin) {</div><div class='add'>+			irq = entry-&gt;irq;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		pr_crit("pci %s: no irq found for pin %u\n",</div><div class='add'>+			pci_name((struct pci_dev *) dev), pin);</div><div class='add'>+	else</div><div class='add'>+		pr_info("pci %s: using irq %d for pin %u\n",</div><div class='add'>+			pci_name((struct pci_dev *) dev), irq, pin);</div><div class='add'>+</div><div class='add'>+	return irq;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pcibios_plat_dev_init(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	if (ath79_pci_plat_dev_init)</div><div class='add'>+		return ath79_pci_plat_dev_init(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init ath79_pci_set_irq_map(unsigned nr_irqs,</div><div class='add'>+				  const struct ath79_pci_irq *map)</div><div class='add'>+{</div><div class='add'>+	ath79_pci_nr_irqs = nr_irqs;</div><div class='add'>+	ath79_pci_irq_map = map;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev))</div><div class='add'>+{</div><div class='add'>+	ath79_pci_plat_dev_init = func;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init ath79_register_pci(void)</div><div class='add'>+{</div><div class='add'>+	if (soc_is_ar71xx())</div><div class='add'>+		return ar71xx_pcibios_init();</div><div class='add'>+</div><div class='add'>+	if (soc_is_ar724x())</div><div class='add'>+		return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2);</div><div class='add'>+</div><div class='add'>+	if (soc_is_ar9342() || soc_is_ar9344()) {</div><div class='add'>+		u32 bootstrap;</div><div class='add'>+</div><div class='add'>+		bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);</div><div class='add'>+		if (bootstrap &amp; AR934X_BOOTSTRAP_PCIE_RC)</div><div class='add'>+			return ar724x_pcibios_init(ATH79_IP2_IRQ(0));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/ath79/pci.h b/arch/mips/ath79/pci.h<br/>new file mode 100644<br/>index 000000000000..51c6625dcc6d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/pci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/pci.h</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+/*</div><div class='add'>+ *  Atheros AR71XX/AR724X PCI support</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2011 René Bolldorf &lt;xsecute@googlemail.com&gt;</div><div class='add'>+ *  Copyright (C) 2008-2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ *  Copyright (C) 2008 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ATH79_PCI_H</div><div class='add'>+#define _ATH79_PCI_H</div><div class='add'>+</div><div class='add'>+struct ath79_pci_irq {</div><div class='add'>+	u8	slot;</div><div class='add'>+	u8	pin;</div><div class='add'>+	int	irq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PCI</div><div class='add'>+void ath79_pci_set_irq_map(unsigned nr_irqs, const struct ath79_pci_irq *map);</div><div class='add'>+void ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev));</div><div class='add'>+int ath79_register_pci(void);</div><div class='add'>+#else</div><div class='add'>+static inline void</div><div class='add'>+ath79_pci_set_irq_map(unsigned nr_irqs, const struct ath79_pci_irq *map) {}</div><div class='add'>+static inline void</div><div class='add'>+ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *)) {}</div><div class='add'>+static inline int ath79_register_pci(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* _ATH79_PCI_H */</div><div class='head'>diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c<br/>index 80a7d4023d7f..60d212ef8629 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/ath79/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/ath79/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/ath79/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/ath79/setup.c</a></div><div class='hunk'>@@ -1,10 +1,11 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  Atheros AR71XX/AR724X/AR913X specific setup</div><div class='ctx'>  *</div><div class='add'>+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan &lt;jnarayanan@atheros.com&gt;</div><div class='ctx'>  *  Copyright (C) 2008-2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='ctx'>  *  Copyright (C) 2008 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='ctx'>  *</div><div class='del'>- *  Parts of this file are based on Atheros' 2.6.15 BSP</div><div class='add'>+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP</div><div class='ctx'>  *</div><div class='ctx'>  *  This program is free software; you can redistribute it and/or modify it</div><div class='ctx'>  *  under the terms of the GNU General Public License version 2 as published</div><div class='hunk'>@@ -116,18 +117,6 @@ static void __init ath79_detect_sys_type(void)</div><div class='ctx'> 		rev = id &amp; AR724X_REV_ID_REVISION_MASK;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case REV_ID_MAJOR_AR9330:</div><div class='del'>-		ath79_soc = ATH79_SOC_AR9330;</div><div class='del'>-		chip = "9330";</div><div class='del'>-		rev = id &amp; AR933X_REV_ID_REVISION_MASK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case REV_ID_MAJOR_AR9331:</div><div class='del'>-		ath79_soc = ATH79_SOC_AR9331;</div><div class='del'>-		chip = "9331";</div><div class='del'>-		rev = id &amp; AR933X_REV_ID_REVISION_MASK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='ctx'> 	case REV_ID_MAJOR_AR913X:</div><div class='ctx'> 		minor = id &amp; AR913X_REV_ID_MINOR_MASK;</div><div class='ctx'> 		rev = id &gt;&gt; AR913X_REV_ID_REVISION_SHIFT;</div><div class='hunk'>@@ -145,6 +134,36 @@ static void __init ath79_detect_sys_type(void)</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case REV_ID_MAJOR_AR9330:</div><div class='add'>+		ath79_soc = ATH79_SOC_AR9330;</div><div class='add'>+		chip = "9330";</div><div class='add'>+		rev = id &amp; AR933X_REV_ID_REVISION_MASK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case REV_ID_MAJOR_AR9331:</div><div class='add'>+		ath79_soc = ATH79_SOC_AR9331;</div><div class='add'>+		chip = "9331";</div><div class='add'>+		rev = id &amp; AR933X_REV_ID_REVISION_MASK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case REV_ID_MAJOR_AR9341:</div><div class='add'>+		ath79_soc = ATH79_SOC_AR9341;</div><div class='add'>+		chip = "9341";</div><div class='add'>+		rev = id &amp; AR934X_REV_ID_REVISION_MASK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case REV_ID_MAJOR_AR9342:</div><div class='add'>+		ath79_soc = ATH79_SOC_AR9342;</div><div class='add'>+		chip = "9342";</div><div class='add'>+		rev = id &amp; AR934X_REV_ID_REVISION_MASK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case REV_ID_MAJOR_AR9344:</div><div class='add'>+		ath79_soc = ATH79_SOC_AR9344;</div><div class='add'>+		chip = "9344";</div><div class='add'>+		rev = id &amp; AR934X_REV_ID_REVISION_MASK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		panic("ath79: unknown SoC, id:0x%08x", id);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c<br/>index 19780aa91708..95bf4d7bac21 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bcm47xx/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/bcm47xx/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bcm47xx/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/bcm47xx/setup.c</a></div><div class='hunk'>@@ -90,6 +90,7 @@ static int bcm47xx_get_sprom_ssb(struct ssb_bus *bus, struct ssb_sprom *out)</div><div class='ctx'> 	char prefix[10];</div><div class='ctx'> </div><div class='ctx'> 	if (bus-&gt;bustype == SSB_BUSTYPE_PCI) {</div><div class='add'>+		memset(out, 0, sizeof(struct ssb_sprom));</div><div class='ctx'> 		snprintf(prefix, sizeof(prefix), "pci/%u/%u/",</div><div class='ctx'> 			 bus-&gt;host_pci-&gt;bus-&gt;number + 1,</div><div class='ctx'> 			 PCI_SLOT(bus-&gt;host_pci-&gt;devfn));</div><div class='hunk'>@@ -109,15 +110,9 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus,</div><div class='ctx'> 	/* Fill boardinfo structure */</div><div class='ctx'> 	memset(&amp;(iv-&gt;boardinfo), 0 , sizeof(struct ssb_boardinfo));</div><div class='ctx'> </div><div class='del'>-	if (nvram_getenv("boardvendor", buf, sizeof(buf)) &gt;= 0)</div><div class='del'>-		iv-&gt;boardinfo.vendor = (u16)simple_strtoul(buf, NULL, 0);</div><div class='del'>-	else</div><div class='del'>-		iv-&gt;boardinfo.vendor = SSB_BOARDVENDOR_BCM;</div><div class='del'>-	if (nvram_getenv("boardtype", buf, sizeof(buf)) &gt;= 0)</div><div class='del'>-		iv-&gt;boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);</div><div class='del'>-	if (nvram_getenv("boardrev", buf, sizeof(buf)) &gt;= 0)</div><div class='del'>-		iv-&gt;boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0);</div><div class='add'>+	bcm47xx_fill_ssb_boardinfo(&amp;iv-&gt;boardinfo, NULL);</div><div class='ctx'> </div><div class='add'>+	memset(&amp;iv-&gt;sprom, 0, sizeof(struct ssb_sprom));</div><div class='ctx'> 	bcm47xx_fill_sprom(&amp;iv-&gt;sprom, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (nvram_getenv("cardbus", buf, sizeof(buf)) &gt;= 0)</div><div class='hunk'>@@ -166,12 +161,14 @@ static int bcm47xx_get_sprom_bcma(struct bcma_bus *bus, struct ssb_sprom *out)</div><div class='ctx'> </div><div class='ctx'> 	switch (bus-&gt;hosttype) {</div><div class='ctx'> 	case BCMA_HOSTTYPE_PCI:</div><div class='add'>+		memset(out, 0, sizeof(struct ssb_sprom));</div><div class='ctx'> 		snprintf(prefix, sizeof(prefix), "pci/%u/%u/",</div><div class='ctx'> 			 bus-&gt;host_pci-&gt;bus-&gt;number + 1,</div><div class='ctx'> 			 PCI_SLOT(bus-&gt;host_pci-&gt;devfn));</div><div class='ctx'> 		bcm47xx_fill_sprom(out, prefix);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	case BCMA_HOSTTYPE_SOC:</div><div class='add'>+		memset(out, 0, sizeof(struct ssb_sprom));</div><div class='ctx'> 		bcm47xx_fill_sprom_ethernet(out, NULL);</div><div class='ctx'> 		core = bcma_find_core(bus, BCMA_CORE_80211);</div><div class='ctx'> 		if (core) {</div><div class='hunk'>@@ -197,6 +194,8 @@ static void __init bcm47xx_register_bcma(void)</div><div class='ctx'> 	err = bcma_host_soc_register(&amp;bcm47xx_bus.bcma);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		panic("Failed to initialize BCMA bus (err %d)", err);</div><div class='add'>+</div><div class='add'>+	bcm47xx_fill_bcma_boardinfo(&amp;bcm47xx_bus.bcma.bus.boardinfo, NULL);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/bcm47xx/sprom.c b/arch/mips/bcm47xx/sprom.c<br/>index 5c8dcd2a8a93..d3a889745e20 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bcm47xx/sprom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/bcm47xx/sprom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bcm47xx/sprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/bcm47xx/sprom.c</a></div><div class='hunk'>@@ -165,6 +165,8 @@ static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,</div><div class='ctx'> 					const char *prefix)</div><div class='ctx'> {</div><div class='ctx'> 	nvram_read_u16(prefix, NULL, "boardrev", &amp;sprom-&gt;board_rev, 0);</div><div class='add'>+	if (!sprom-&gt;board_rev)</div><div class='add'>+		nvram_read_u16(NULL, NULL, "boardrev", &amp;sprom-&gt;board_rev, 0);</div><div class='ctx'> 	nvram_read_u16(prefix, NULL, "boardnum", &amp;sprom-&gt;board_num, 0);</div><div class='ctx'> 	nvram_read_u8(prefix, NULL, "ledbh0", &amp;sprom-&gt;gpio0, 0xff);</div><div class='ctx'> 	nvram_read_u8(prefix, NULL, "ledbh1", &amp;sprom-&gt;gpio1, 0xff);</div><div class='hunk'>@@ -555,8 +557,6 @@ void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom, const char *prefix)</div><div class='ctx'> </div><div class='ctx'> void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix)</div><div class='ctx'> {</div><div class='del'>-	memset(sprom, 0, sizeof(struct ssb_sprom));</div><div class='del'>-</div><div class='ctx'> 	bcm47xx_fill_sprom_ethernet(sprom, prefix);</div><div class='ctx'> </div><div class='ctx'> 	nvram_read_u8(prefix, NULL, "sromrev", &amp;sprom-&gt;revision, 0);</div><div class='hunk'>@@ -618,3 +618,27 @@ void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix)</div><div class='ctx'> 		bcm47xx_fill_sprom_r1(sprom, prefix);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_BCM47XX_SSB</div><div class='add'>+void bcm47xx_fill_ssb_boardinfo(struct ssb_boardinfo *boardinfo,</div><div class='add'>+				const char *prefix)</div><div class='add'>+{</div><div class='add'>+	nvram_read_u16(prefix, NULL, "boardvendor", &amp;boardinfo-&gt;vendor, 0);</div><div class='add'>+	if (!boardinfo-&gt;vendor)</div><div class='add'>+		boardinfo-&gt;vendor = SSB_BOARDVENDOR_BCM;</div><div class='add'>+</div><div class='add'>+	nvram_read_u16(prefix, NULL, "boardtype", &amp;boardinfo-&gt;type, 0);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_BCM47XX_BCMA</div><div class='add'>+void bcm47xx_fill_bcma_boardinfo(struct bcma_boardinfo *boardinfo,</div><div class='add'>+				 const char *prefix)</div><div class='add'>+{</div><div class='add'>+	nvram_read_u16(prefix, NULL, "boardvendor", &amp;boardinfo-&gt;vendor, 0);</div><div class='add'>+	if (!boardinfo-&gt;vendor)</div><div class='add'>+		boardinfo-&gt;vendor = SSB_BOARDVENDOR_BCM;</div><div class='add'>+</div><div class='add'>+	nvram_read_u16(prefix, NULL, "boardtype", &amp;boardinfo-&gt;type, 0);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/mips/bcm63xx/boards/Makefile b/arch/mips/bcm63xx/boards/Makefile<br/>index 9f64fb414077..af07c1aa202f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/bcm63xx/boards/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/bcm63xx/boards/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/bcm63xx/boards/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/bcm63xx/boards/Makefile</a></div><div class='hunk'>@@ -1,3 +1 @@</div><div class='ctx'> obj-$(CONFIG_BOARD_BCM963XX)		+= board_bcm963xx.o</div><div class='del'>-</div><div class='del'>-ccflags-y := -Werror</div><div class='head'>diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c<br/>index d3a9f012aa0a..260dc247c052 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/cavium-octeon/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/cavium-octeon/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/cavium-octeon/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/cavium-octeon/setup.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/serial.h&gt;</div><div class='head'>diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c<br/>index 97e7ce9b50ed..4b93048044eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/cavium-octeon/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/cavium-octeon/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/cavium-octeon/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/cavium-octeon/smp.c</a></div><div class='hunk'>@@ -257,8 +257,6 @@ DEFINE_PER_CPU(int, cpu_state);</div><div class='ctx'> </div><div class='ctx'> extern void fixup_irqs(void);</div><div class='ctx'> </div><div class='del'>-static DEFINE_SPINLOCK(smp_reserve_lock);</div><div class='del'>-</div><div class='ctx'> static int octeon_cpu_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cpu = smp_processor_id();</div><div class='hunk'>@@ -266,8 +264,6 @@ static int octeon_cpu_disable(void)</div><div class='ctx'> 	if (cpu == 0)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;smp_reserve_lock);</div><div class='del'>-</div><div class='ctx'> 	set_cpu_online(cpu, false);</div><div class='ctx'> 	cpu_clear(cpu, cpu_callin_map);</div><div class='ctx'> 	local_irq_disable();</div><div class='hunk'>@@ -277,8 +273,6 @@ static int octeon_cpu_disable(void)</div><div class='ctx'> 	flush_cache_all();</div><div class='ctx'> 	local_flush_tlb_all();</div><div class='ctx'> </div><div class='del'>-	spin_unlock(&amp;smp_reserve_lock);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig<br/>index 807c97eed8a8..46c61edcdf7b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/configs/mtx1_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/configs/mtx1_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/configs/mtx1_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/configs/mtx1_defconfig</a></div><div class='hunk'>@@ -346,11 +346,8 @@ CONFIG_CHELSIO_T1=m</div><div class='ctx'> CONFIG_IXGB=m</div><div class='ctx'> CONFIG_S2IO=m</div><div class='ctx'> CONFIG_MYRI10GE=m</div><div class='del'>-CONFIG_TR=y</div><div class='ctx'> CONFIG_IBMOL=m</div><div class='ctx'> CONFIG_IBMLS=m</div><div class='del'>-CONFIG_3C359=m</div><div class='del'>-CONFIG_TMS380TR=m</div><div class='ctx'> CONFIG_TMSPCI=m</div><div class='ctx'> CONFIG_ABYSS=m</div><div class='ctx'> CONFIG_USB_CATC=m</div><div class='hunk'>@@ -376,7 +373,6 @@ CONFIG_PCMCIA_SMC91C92=m</div><div class='ctx'> CONFIG_PCMCIA_XIRC2PS=m</div><div class='ctx'> CONFIG_PCMCIA_AXNET=m</div><div class='ctx'> CONFIG_ARCNET_COM20020_CS=m</div><div class='del'>-CONFIG_PCMCIA_IBMTR=m</div><div class='ctx'> CONFIG_WAN=y</div><div class='ctx'> CONFIG_LANMEDIA=m</div><div class='ctx'> CONFIG_HDLC=m</div><div class='head'>diff --git a/arch/mips/fw/arc/Makefile b/arch/mips/fw/arc/Makefile<br/>index 5314b37aff2c..4f349ec1ea2d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/fw/arc/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/fw/arc/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/fw/arc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/fw/arc/Makefile</a></div><div class='hunk'>@@ -8,5 +8,3 @@ lib-y				+= cmdline.o env.o file.o identify.o init.o \</div><div class='ctx'> lib-$(CONFIG_ARC_MEMORY)	+= memory.o</div><div class='ctx'> lib-$(CONFIG_ARC_CONSOLE)	+= arc_con.o</div><div class='ctx'> lib-$(CONFIG_ARC_PROMLIB)	+= promlib.o</div><div class='del'>-</div><div class='del'>-ccflags-y			:= -Werror</div><div class='head'>diff --git a/arch/mips/include/asm/clkdev.h b/arch/mips/include/asm/clkdev.h<br/>new file mode 100644<br/>index 000000000000..262475414e5f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/clkdev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/clkdev.h</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+/*</div><div class='add'>+ *  based on arch/arm/include/asm/clkdev.h</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2008 Russell King.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * Helper for the clk API to assist looking up a struct clk.</div><div class='add'>+ */</div><div class='add'>+#ifndef __ASM_CLKDEV_H</div><div class='add'>+#define __ASM_CLKDEV_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+#define __clk_get(clk)	({ 1; })</div><div class='add'>+#define __clk_put(clk)	do { } while (0)</div><div class='add'>+</div><div class='add'>+static inline struct clk_lookup_alloc *__clkdev_alloc(size_t size)</div><div class='add'>+{</div><div class='add'>+	return kzalloc(size, GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/mips/include/asm/kvm_para.h b/arch/mips/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h<br/>index 2f0becb4ec8f..1caa78ad06d5 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/ar71xx_regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mach-ath79/ar71xx_regs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/ar71xx_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-ath79/ar71xx_regs.h</a></div><div class='hunk'>@@ -1,10 +1,11 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  Atheros AR71XX/AR724X/AR913X SoC register definitions</div><div class='ctx'>  *</div><div class='add'>+ *  Copyright (C) 2010-2011 Jaiganesh Narayanan &lt;jnarayanan@atheros.com&gt;</div><div class='ctx'>  *  Copyright (C) 2008-2010 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='ctx'>  *  Copyright (C) 2008 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='ctx'>  *</div><div class='del'>- *  Parts of this file are based on Atheros' 2.6.15 BSP</div><div class='add'>+ *  Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP</div><div class='ctx'>  *</div><div class='ctx'>  *  This program is free software; you can redistribute it and/or modify it</div><div class='ctx'>  *  under the terms of the GNU General Public License version 2 as published</div><div class='hunk'>@@ -60,6 +61,9 @@</div><div class='ctx'> #define AR933X_EHCI_BASE	0x1b000000</div><div class='ctx'> #define AR933X_EHCI_SIZE	0x1000</div><div class='ctx'> </div><div class='add'>+#define AR934X_WMAC_BASE	(AR71XX_APB_BASE + 0x00100000)</div><div class='add'>+#define AR934X_WMAC_SIZE	0x20000</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * DDR_CTRL block</div><div class='ctx'>  */</div><div class='hunk'>@@ -91,6 +95,12 @@</div><div class='ctx'> #define AR933X_DDR_REG_FLUSH_USB	0x84</div><div class='ctx'> #define AR933X_DDR_REG_FLUSH_WMAC	0x88</div><div class='ctx'> </div><div class='add'>+#define AR934X_DDR_REG_FLUSH_GE0	0x9c</div><div class='add'>+#define AR934X_DDR_REG_FLUSH_GE1	0xa0</div><div class='add'>+#define AR934X_DDR_REG_FLUSH_USB	0xa4</div><div class='add'>+#define AR934X_DDR_REG_FLUSH_PCIE	0xa8</div><div class='add'>+#define AR934X_DDR_REG_FLUSH_WMAC	0xac</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * PLL block</div><div class='ctx'>  */</div><div class='hunk'>@@ -150,6 +160,41 @@</div><div class='ctx'> #define AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT	15</div><div class='ctx'> #define AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK	0x7</div><div class='ctx'> </div><div class='add'>+#define AR934X_PLL_CPU_CONFIG_REG		0x00</div><div class='add'>+#define AR934X_PLL_DDR_CONFIG_REG		0x04</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_REG		0x08</div><div class='add'>+</div><div class='add'>+#define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT	0</div><div class='add'>+#define AR934X_PLL_CPU_CONFIG_NFRAC_MASK	0x3f</div><div class='add'>+#define AR934X_PLL_CPU_CONFIG_NINT_SHIFT	6</div><div class='add'>+#define AR934X_PLL_CPU_CONFIG_NINT_MASK		0x3f</div><div class='add'>+#define AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT	12</div><div class='add'>+#define AR934X_PLL_CPU_CONFIG_REFDIV_MASK	0x1f</div><div class='add'>+#define AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT	19</div><div class='add'>+#define AR934X_PLL_CPU_CONFIG_OUTDIV_MASK	0x3</div><div class='add'>+</div><div class='add'>+#define AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT	0</div><div class='add'>+#define AR934X_PLL_DDR_CONFIG_NFRAC_MASK	0x3ff</div><div class='add'>+#define AR934X_PLL_DDR_CONFIG_NINT_SHIFT	10</div><div class='add'>+#define AR934X_PLL_DDR_CONFIG_NINT_MASK		0x3f</div><div class='add'>+#define AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT	16</div><div class='add'>+#define AR934X_PLL_DDR_CONFIG_REFDIV_MASK	0x1f</div><div class='add'>+#define AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT	23</div><div class='add'>+#define AR934X_PLL_DDR_CONFIG_OUTDIV_MASK	0x7</div><div class='add'>+</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS	BIT(2)</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS	BIT(3)</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS	BIT(4)</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT	5</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK	0x1f</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT	10</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK	0x1f</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT	15</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK	0x1f</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL	BIT(20)</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL	BIT(21)</div><div class='add'>+#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL	BIT(24)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * USB_CONFIG block</div><div class='ctx'>  */</div><div class='hunk'>@@ -185,6 +230,10 @@</div><div class='ctx'> #define AR933X_RESET_REG_RESET_MODULE		0x1c</div><div class='ctx'> #define AR933X_RESET_REG_BOOTSTRAP		0xac</div><div class='ctx'> </div><div class='add'>+#define AR934X_RESET_REG_RESET_MODULE		0x1c</div><div class='add'>+#define AR934X_RESET_REG_BOOTSTRAP		0xb0</div><div class='add'>+#define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS	0xac</div><div class='add'>+</div><div class='ctx'> #define MISC_INT_ETHSW			BIT(12)</div><div class='ctx'> #define MISC_INT_TIMER4			BIT(10)</div><div class='ctx'> #define MISC_INT_TIMER3			BIT(9)</div><div class='hunk'>@@ -241,6 +290,40 @@</div><div class='ctx'> </div><div class='ctx'> #define AR933X_BOOTSTRAP_REF_CLK_40	BIT(0)</div><div class='ctx'> </div><div class='add'>+#define AR934X_BOOTSTRAP_SW_OPTION8	BIT(23)</div><div class='add'>+#define AR934X_BOOTSTRAP_SW_OPTION7	BIT(22)</div><div class='add'>+#define AR934X_BOOTSTRAP_SW_OPTION6	BIT(21)</div><div class='add'>+#define AR934X_BOOTSTRAP_SW_OPTION5	BIT(20)</div><div class='add'>+#define AR934X_BOOTSTRAP_SW_OPTION4	BIT(19)</div><div class='add'>+#define AR934X_BOOTSTRAP_SW_OPTION3	BIT(18)</div><div class='add'>+#define AR934X_BOOTSTRAP_SW_OPTION2	BIT(17)</div><div class='add'>+#define AR934X_BOOTSTRAP_SW_OPTION1	BIT(16)</div><div class='add'>+#define AR934X_BOOTSTRAP_USB_MODE_DEVICE BIT(7)</div><div class='add'>+#define AR934X_BOOTSTRAP_PCIE_RC	BIT(6)</div><div class='add'>+#define AR934X_BOOTSTRAP_EJTAG_MODE	BIT(5)</div><div class='add'>+#define AR934X_BOOTSTRAP_REF_CLK_40	BIT(4)</div><div class='add'>+#define AR934X_BOOTSTRAP_BOOT_FROM_SPI	BIT(2)</div><div class='add'>+#define AR934X_BOOTSTRAP_SDRAM_DISABLED	BIT(1)</div><div class='add'>+#define AR934X_BOOTSTRAP_DDR1		BIT(0)</div><div class='add'>+</div><div class='add'>+#define AR934X_PCIE_WMAC_INT_WMAC_MISC		BIT(0)</div><div class='add'>+#define AR934X_PCIE_WMAC_INT_WMAC_TX		BIT(1)</div><div class='add'>+#define AR934X_PCIE_WMAC_INT_WMAC_RXLP		BIT(2)</div><div class='add'>+#define AR934X_PCIE_WMAC_INT_WMAC_RXHP		BIT(3)</div><div class='add'>+#define AR934X_PCIE_WMAC_INT_PCIE_RC		BIT(4)</div><div class='add'>+#define AR934X_PCIE_WMAC_INT_PCIE_RC0		BIT(5)</div><div class='add'>+#define AR934X_PCIE_WMAC_INT_PCIE_RC1		BIT(6)</div><div class='add'>+#define AR934X_PCIE_WMAC_INT_PCIE_RC2		BIT(7)</div><div class='add'>+#define AR934X_PCIE_WMAC_INT_PCIE_RC3		BIT(8)</div><div class='add'>+#define AR934X_PCIE_WMAC_INT_WMAC_ALL \</div><div class='add'>+	(AR934X_PCIE_WMAC_INT_WMAC_MISC | AR934X_PCIE_WMAC_INT_WMAC_TX | \</div><div class='add'>+	 AR934X_PCIE_WMAC_INT_WMAC_RXLP | AR934X_PCIE_WMAC_INT_WMAC_RXHP)</div><div class='add'>+</div><div class='add'>+#define AR934X_PCIE_WMAC_INT_PCIE_ALL \</div><div class='add'>+	(AR934X_PCIE_WMAC_INT_PCIE_RC | AR934X_PCIE_WMAC_INT_PCIE_RC0 | \</div><div class='add'>+	 AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \</div><div class='add'>+	 AR934X_PCIE_WMAC_INT_PCIE_RC3)</div><div class='add'>+</div><div class='ctx'> #define REV_ID_MAJOR_MASK		0xfff0</div><div class='ctx'> #define REV_ID_MAJOR_AR71XX		0x00a0</div><div class='ctx'> #define REV_ID_MAJOR_AR913X		0x00b0</div><div class='hunk'>@@ -249,6 +332,9 @@</div><div class='ctx'> #define REV_ID_MAJOR_AR7242		0x1100</div><div class='ctx'> #define REV_ID_MAJOR_AR9330		0x0110</div><div class='ctx'> #define REV_ID_MAJOR_AR9331		0x1110</div><div class='add'>+#define REV_ID_MAJOR_AR9341		0x0120</div><div class='add'>+#define REV_ID_MAJOR_AR9342		0x1120</div><div class='add'>+#define REV_ID_MAJOR_AR9344		0x2120</div><div class='ctx'> </div><div class='ctx'> #define AR71XX_REV_ID_MINOR_MASK	0x3</div><div class='ctx'> #define AR71XX_REV_ID_MINOR_AR7130	0x0</div><div class='hunk'>@@ -267,6 +353,8 @@</div><div class='ctx'> </div><div class='ctx'> #define AR724X_REV_ID_REVISION_MASK	0x3</div><div class='ctx'> </div><div class='add'>+#define AR934X_REV_ID_REVISION_MASK     0xf</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * SPI block</div><div class='ctx'>  */</div><div class='hunk'>@@ -308,5 +396,6 @@</div><div class='ctx'> #define AR724X_GPIO_COUNT		18</div><div class='ctx'> #define AR913X_GPIO_COUNT		22</div><div class='ctx'> #define AR933X_GPIO_COUNT		30</div><div class='add'>+#define AR934X_GPIO_COUNT		23</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_MACH_AR71XX_REGS_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-ath79/ath79.h b/arch/mips/include/asm/mach-ath79/ath79.h<br/>index 6d0c6c9d5622..4f248c3d7b23 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/ath79.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mach-ath79/ath79.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/ath79.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-ath79/ath79.h</a></div><div class='hunk'>@@ -29,6 +29,9 @@ enum ath79_soc_type {</div><div class='ctx'> 	ATH79_SOC_AR9132,</div><div class='ctx'> 	ATH79_SOC_AR9330,</div><div class='ctx'> 	ATH79_SOC_AR9331,</div><div class='add'>+	ATH79_SOC_AR9341,</div><div class='add'>+	ATH79_SOC_AR9342,</div><div class='add'>+	ATH79_SOC_AR9344,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern enum ath79_soc_type ath79_soc;</div><div class='hunk'>@@ -75,6 +78,26 @@ static inline int soc_is_ar933x(void)</div><div class='ctx'> 		ath79_soc == ATH79_SOC_AR9331);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int soc_is_ar9341(void)</div><div class='add'>+{</div><div class='add'>+	return (ath79_soc == ATH79_SOC_AR9341);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int soc_is_ar9342(void)</div><div class='add'>+{</div><div class='add'>+	return (ath79_soc == ATH79_SOC_AR9342);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int soc_is_ar9344(void)</div><div class='add'>+{</div><div class='add'>+	return (ath79_soc == ATH79_SOC_AR9344);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int soc_is_ar934x(void)</div><div class='add'>+{</div><div class='add'>+	return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> extern void __iomem *ath79_ddr_base;</div><div class='ctx'> extern void __iomem *ath79_pll_base;</div><div class='ctx'> extern void __iomem *ath79_reset_base;</div><div class='head'>diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h<br/>index 519958fe4e3c..0968f69e2018 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/irq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mach-ath79/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-ath79/irq.h</a></div><div class='hunk'>@@ -10,11 +10,19 @@</div><div class='ctx'> #define __ASM_MACH_ATH79_IRQ_H</div><div class='ctx'> </div><div class='ctx'> #define MIPS_CPU_IRQ_BASE	0</div><div class='del'>-#define NR_IRQS			40</div><div class='add'>+#define NR_IRQS			48</div><div class='ctx'> </div><div class='ctx'> #define ATH79_MISC_IRQ_BASE	8</div><div class='ctx'> #define ATH79_MISC_IRQ_COUNT	32</div><div class='ctx'> </div><div class='add'>+#define ATH79_PCI_IRQ_BASE	(ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT)</div><div class='add'>+#define ATH79_PCI_IRQ_COUNT	6</div><div class='add'>+#define ATH79_PCI_IRQ(_x)	(ATH79_PCI_IRQ_BASE + (_x))</div><div class='add'>+</div><div class='add'>+#define ATH79_IP2_IRQ_BASE	(ATH79_PCI_IRQ_BASE + ATH79_PCI_IRQ_COUNT)</div><div class='add'>+#define ATH79_IP2_IRQ_COUNT	2</div><div class='add'>+#define ATH79_IP2_IRQ(_x)	(ATH79_IP2_IRQ_BASE + (_x))</div><div class='add'>+</div><div class='ctx'> #define ATH79_CPU_IRQ_IP2	(MIPS_CPU_IRQ_BASE + 2)</div><div class='ctx'> #define ATH79_CPU_IRQ_USB	(MIPS_CPU_IRQ_BASE + 3)</div><div class='ctx'> #define ATH79_CPU_IRQ_GE0	(MIPS_CPU_IRQ_BASE + 4)</div><div class='head'>diff --git a/arch/mips/include/asm/mach-ath79/pci-ath724x.h b/arch/mips/include/asm/mach-ath79/pci-ath724x.h<br/>deleted file mode 100644<br/>index 454885fa30c3..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/pci-ath724x.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mach-ath79/pci-ath724x.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,21 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  Atheros 724x PCI support</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2011 René Bolldorf &lt;xsecute@googlemail.com&gt;</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H</div><div class='del'>-#define __ASM_MACH_ATH79_PCI_ATH724X_H</div><div class='del'>-</div><div class='del'>-struct ath724x_pci_data {</div><div class='del'>-	int irq;</div><div class='del'>-	void *pdata;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void ath724x_pci_add_data(struct ath724x_pci_data *data, int size);</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-ath79/pci.h b/arch/mips/include/asm/mach-ath79/pci.h<br/>new file mode 100644<br/>index 000000000000..7868f7fa028f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ath79/pci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-ath79/pci.h</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+/*</div><div class='add'>+ *  Atheros AR71XX/AR724X PCI support</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2011 René Bolldorf &lt;xsecute@googlemail.com&gt;</div><div class='add'>+ *  Copyright (C) 2008-2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ *  Copyright (C) 2008 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASM_MACH_ATH79_PCI_H</div><div class='add'>+#define __ASM_MACH_ATH79_PCI_H</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_PCI) &amp;&amp; defined(CONFIG_SOC_AR71XX)</div><div class='add'>+int ar71xx_pcibios_init(void);</div><div class='add'>+#else</div><div class='add'>+static inline int ar71xx_pcibios_init(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_PCI_AR724X)</div><div class='add'>+int ar724x_pcibios_init(int irq);</div><div class='add'>+#else</div><div class='add'>+static inline int ar724x_pcibios_init(int irq) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_MACH_ATH79_PCI_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h<br/>index 5ecaf47b34d2..26fdaf40b930 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mach-bcm47xx/bcm47xx.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-bcm47xx/bcm47xx.h</a></div><div class='hunk'>@@ -47,4 +47,13 @@ extern enum bcm47xx_bus_type bcm47xx_bus_type;</div><div class='ctx'> void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix);</div><div class='ctx'> void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom, const char *prefix);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BCM47XX_SSB</div><div class='add'>+void bcm47xx_fill_ssb_boardinfo(struct ssb_boardinfo *boardinfo,</div><div class='add'>+				const char *prefix);</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_BCM47XX_BCMA</div><div class='add'>+void bcm47xx_fill_bcma_boardinfo(struct bcma_boardinfo *boardinfo,</div><div class='add'>+				 const char *prefix);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* __ASM_BCM47XX_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h<br/>index 3d5de96d4036..1d7dd96aa460 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #define BCM63XX_GPIO_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;bcm63xx_cpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> int __init bcm63xx_gpio_init(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/mach-ip27/topology.h b/arch/mips/include/asm/mach-ip27/topology.h<br/>index 1b1a7d1632b9..b2cf641f206f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ip27/topology.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mach-ip27/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-ip27/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-ip27/topology.h</a></div><div class='hunk'>@@ -36,23 +36,6 @@ extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];</div><div class='ctx'> </div><div class='ctx'> #define node_distance(from, to)	(__node_distances[(from)][(to)])</div><div class='ctx'> </div><div class='del'>-/* sched_domains SD_NODE_INIT for SGI IP27 machines */</div><div class='del'>-#define SD_NODE_INIT (struct sched_domain) {		\</div><div class='del'>-	.parent			= NULL,			\</div><div class='del'>-	.child			= NULL,			\</div><div class='del'>-	.groups			= NULL,			\</div><div class='del'>-	.min_interval		= 8,			\</div><div class='del'>-	.max_interval		= 32,			\</div><div class='del'>-	.busy_factor		= 32,			\</div><div class='del'>-	.imbalance_pct		= 125,			\</div><div class='del'>-	.cache_nice_tries	= 1,			\</div><div class='del'>-	.flags			= SD_LOAD_BALANCE |	\</div><div class='del'>-				  SD_BALANCE_EXEC,	\</div><div class='del'>-	.last_balance		= jiffies,		\</div><div class='del'>-	.balance_interval	= 1,			\</div><div class='del'>-	.nr_balance_failed	= 0,			\</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #include &lt;asm-generic/topology.h&gt;</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_MACH_TOPOLOGY_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-jz4740/irq.h b/arch/mips/include/asm/mach-jz4740/irq.h<br/>index a865c983c70a..5ad1a9c113c6 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-jz4740/irq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mach-jz4740/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-jz4740/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-jz4740/irq.h</a></div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'> #define JZ4740_IRQ_LCD		JZ4740_IRQ(30)</div><div class='ctx'> </div><div class='ctx'> /* 2nd-level interrupts */</div><div class='del'>-#define JZ4740_IRQ_DMA(x)	(JZ4740_IRQ(32) + (X))</div><div class='add'>+#define JZ4740_IRQ_DMA(x)	(JZ4740_IRQ(32) + (x))</div><div class='ctx'> </div><div class='ctx'> #define JZ4740_IRQ_INTC_GPIO(x) (JZ4740_IRQ_GPIO0 - (x))</div><div class='ctx'> #define JZ4740_IRQ_GPIO(x)	(JZ4740_IRQ(48) + (x))</div><div class='head'>diff --git a/arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h b/arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h<br/>new file mode 100644<br/>index 000000000000..318f982f04ff<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+/*</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2010 Thomas Langer &lt;thomas.langer@lantiq.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _FALCON_IRQ__</div><div class='add'>+#define _FALCON_IRQ__</div><div class='add'>+</div><div class='add'>+#define INT_NUM_IRQ0			8</div><div class='add'>+#define INT_NUM_IM0_IRL0		(INT_NUM_IRQ0 + 0)</div><div class='add'>+#define INT_NUM_IM1_IRL0		(INT_NUM_IM0_IRL0 + 32)</div><div class='add'>+#define INT_NUM_IM2_IRL0		(INT_NUM_IM1_IRL0 + 32)</div><div class='add'>+#define INT_NUM_IM3_IRL0		(INT_NUM_IM2_IRL0 + 32)</div><div class='add'>+#define INT_NUM_IM4_IRL0		(INT_NUM_IM3_IRL0 + 32)</div><div class='add'>+#define INT_NUM_EXTRA_START		(INT_NUM_IM4_IRL0 + 32)</div><div class='add'>+#define INT_NUM_IM_OFFSET		(INT_NUM_IM1_IRL0 - INT_NUM_IM0_IRL0)</div><div class='add'>+</div><div class='add'>+#define MIPS_CPU_TIMER_IRQ			7</div><div class='add'>+</div><div class='add'>+#endif /* _FALCON_IRQ__ */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-lantiq/falcon/irq.h b/arch/mips/include/asm/mach-lantiq/falcon/irq.h<br/>new file mode 100644<br/>index 000000000000..2caccd9f9dbc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-lantiq/falcon/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/falcon/irq.h</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+/*</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2011 Thomas Langer &lt;thomas.langer@lantiq.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __FALCON_IRQ_H</div><div class='add'>+#define __FALCON_IRQ_H</div><div class='add'>+</div><div class='add'>+#include &lt;falcon_irq.h&gt;</div><div class='add'>+</div><div class='add'>+#define NR_IRQS 328</div><div class='add'>+</div><div class='add'>+#include_next &lt;irq.h&gt;</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h<br/>new file mode 100644<br/>index 000000000000..b385252584ee<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+/*</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ * by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _LTQ_FALCON_H__</div><div class='add'>+#define _LTQ_FALCON_H__</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SOC_FALCON</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+#include &lt;lantiq.h&gt;</div><div class='add'>+</div><div class='add'>+/* Chip IDs */</div><div class='add'>+#define SOC_ID_FALCON		0x01B8</div><div class='add'>+</div><div class='add'>+/* SoC Types */</div><div class='add'>+#define SOC_TYPE_FALCON		0x01</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * during early_printk no ioremap possible at this early stage</div><div class='add'>+ * lets use KSEG1 instead</div><div class='add'>+ */</div><div class='add'>+#define LTQ_ASC0_BASE_ADDR	0x1E100C00</div><div class='add'>+#define LTQ_EARLY_ASC		KSEG1ADDR(LTQ_ASC0_BASE_ADDR)</div><div class='add'>+</div><div class='add'>+/* WDT */</div><div class='add'>+#define LTQ_RST_CAUSE_WDTRST	0x0002</div><div class='add'>+</div><div class='add'>+/* CHIP ID */</div><div class='add'>+#define LTQ_STATUS_BASE_ADDR	0x1E802000</div><div class='add'>+</div><div class='add'>+#define FALCON_CHIPID		((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x0c))</div><div class='add'>+#define FALCON_CHIPTYPE		((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x38))</div><div class='add'>+#define FALCON_CHIPCONF		((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x40))</div><div class='add'>+</div><div class='add'>+/* SYSCTL - start/stop/restart/configure/... different parts of the Soc */</div><div class='add'>+#define SYSCTL_SYS1		0</div><div class='add'>+#define SYSCTL_SYSETH		1</div><div class='add'>+#define SYSCTL_SYSGPE		2</div><div class='add'>+</div><div class='add'>+/* BOOT_SEL - find what boot media we have */</div><div class='add'>+#define BS_FLASH		0x1</div><div class='add'>+#define BS_SPI                  0x4</div><div class='add'>+</div><div class='add'>+/* global register ranges */</div><div class='add'>+extern __iomem void *ltq_ebu_membase;</div><div class='add'>+extern __iomem void *ltq_sys1_membase;</div><div class='add'>+#define ltq_ebu_w32(x, y)	ltq_w32((x), ltq_ebu_membase + (y))</div><div class='add'>+#define ltq_ebu_r32(x)		ltq_r32(ltq_ebu_membase + (x))</div><div class='add'>+</div><div class='add'>+#define ltq_sys1_w32(x, y)	ltq_w32((x), ltq_sys1_membase + (y))</div><div class='add'>+#define ltq_sys1_r32(x)		ltq_r32(ltq_sys1_membase + (x))</div><div class='add'>+#define ltq_sys1_w32_mask(clear, set, reg)   \</div><div class='add'>+	ltq_sys1_w32((ltq_sys1_r32(reg) &amp; ~(clear)) | (set), reg)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * to keep the irq code generic we need to define this to 0 as falcon</div><div class='add'>+ * has no EIU/EBU</div><div class='add'>+ */</div><div class='add'>+#define LTQ_EBU_PCC_ISTAT	0</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_SOC_FALCON */</div><div class='add'>+#endif /* _LTQ_XWAY_H__ */</div><div class='head'>diff --git a/arch/mips/include/asm/mach-lantiq/gpio.h b/arch/mips/include/asm/mach-lantiq/gpio.h<br/>new file mode 100644<br/>index 000000000000..f79505b43609<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-lantiq/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/gpio.h</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+#ifndef __ASM_MIPS_MACH_LANTIQ_GPIO_H</div><div class='add'>+#define __ASM_MIPS_MACH_LANTIQ_GPIO_H</div><div class='add'>+</div><div class='add'>+static inline int gpio_to_irq(unsigned int gpio)</div><div class='add'>+{</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define gpio_get_value __gpio_get_value</div><div class='add'>+#define gpio_set_value __gpio_set_value</div><div class='add'>+</div><div class='add'>+#define gpio_cansleep __gpio_cansleep</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/mips/include/asm/mach-lantiq/lantiq.h b/arch/mips/include/asm/mach-lantiq/lantiq.h<br/>index ce2f02929d22..5e8a6e965756 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-lantiq/lantiq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mach-lantiq/lantiq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-lantiq/lantiq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/lantiq.h</a></div><div class='hunk'>@@ -9,6 +9,8 @@</div><div class='ctx'> #define _LANTIQ_H__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* generic reg access functions */</div><div class='ctx'> #define ltq_r32(reg)		__raw_readl(reg)</div><div class='hunk'>@@ -21,25 +23,9 @@</div><div class='ctx'> /* register access macros for EBU and CGU */</div><div class='ctx'> #define ltq_ebu_w32(x, y)	ltq_w32((x), ltq_ebu_membase + (y))</div><div class='ctx'> #define ltq_ebu_r32(x)		ltq_r32(ltq_ebu_membase + (x))</div><div class='del'>-#define ltq_cgu_w32(x, y)	ltq_w32((x), ltq_cgu_membase + (y))</div><div class='del'>-#define ltq_cgu_r32(x)		ltq_r32(ltq_cgu_membase + (x))</div><div class='del'>-</div><div class='add'>+#define ltq_ebu_w32_mask(x, y, z) \</div><div class='add'>+	ltq_w32_mask(x, y, ltq_ebu_membase + (z))</div><div class='ctx'> extern __iomem void *ltq_ebu_membase;</div><div class='del'>-extern __iomem void *ltq_cgu_membase;</div><div class='del'>-</div><div class='del'>-extern unsigned int ltq_get_cpu_ver(void);</div><div class='del'>-extern unsigned int ltq_get_soc_type(void);</div><div class='del'>-</div><div class='del'>-/* clock speeds */</div><div class='del'>-#define CLOCK_60M	60000000</div><div class='del'>-#define CLOCK_83M	83333333</div><div class='del'>-#define CLOCK_111M	111111111</div><div class='del'>-#define CLOCK_133M	133333333</div><div class='del'>-#define CLOCK_167M	166666667</div><div class='del'>-#define CLOCK_200M	200000000</div><div class='del'>-#define CLOCK_266M	266666666</div><div class='del'>-#define CLOCK_333M	333333333</div><div class='del'>-#define CLOCK_400M	400000000</div><div class='ctx'> </div><div class='ctx'> /* spinlock all ebu i/o */</div><div class='ctx'> extern spinlock_t ebu_lock;</div><div class='hunk'>@@ -49,15 +35,21 @@ extern void ltq_disable_irq(struct irq_data *data);</div><div class='ctx'> extern void ltq_mask_and_ack_irq(struct irq_data *data);</div><div class='ctx'> extern void ltq_enable_irq(struct irq_data *data);</div><div class='ctx'> </div><div class='add'>+/* clock handling */</div><div class='add'>+extern int clk_activate(struct clk *clk);</div><div class='add'>+extern void clk_deactivate(struct clk *clk);</div><div class='add'>+extern struct clk *clk_get_cpu(void);</div><div class='add'>+extern struct clk *clk_get_fpi(void);</div><div class='add'>+extern struct clk *clk_get_io(void);</div><div class='add'>+</div><div class='add'>+/* find out what bootsource we have */</div><div class='add'>+extern unsigned char ltq_boot_select(void);</div><div class='ctx'> /* find out what caused the last cpu reset */</div><div class='ctx'> extern int ltq_reset_cause(void);</div><div class='del'>-#define LTQ_RST_CAUSE_WDTRST	0x20</div><div class='ctx'> </div><div class='ctx'> #define IOPORT_RESOURCE_START	0x10000000</div><div class='ctx'> #define IOPORT_RESOURCE_END	0xffffffff</div><div class='ctx'> #define IOMEM_RESOURCE_START	0x10000000</div><div class='ctx'> #define IOMEM_RESOURCE_END	0xffffffff</div><div class='del'>-#define LTQ_FLASH_START		0x10000000</div><div class='del'>-#define LTQ_FLASH_MAX		0x04000000</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/include/asm/mach-lantiq/lantiq_platform.h b/arch/mips/include/asm/mach-lantiq/lantiq_platform.h<br/>index a305f1d0259e..e23bf7c9a2d0 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-lantiq/lantiq_platform.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mach-lantiq/lantiq_platform.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-lantiq/lantiq_platform.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/lantiq_platform.h</a></div><div class='hunk'>@@ -9,41 +9,8 @@</div><div class='ctx'> #ifndef _LANTIQ_PLATFORM_H__</div><div class='ctx'> #define _LANTIQ_PLATFORM_H__</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/mtd/partitions.h&gt;</div><div class='ctx'> #include &lt;linux/socket.h&gt;</div><div class='ctx'> </div><div class='del'>-/* struct used to pass info to the pci core */</div><div class='del'>-enum {</div><div class='del'>-	PCI_CLOCK_INT = 0,</div><div class='del'>-	PCI_CLOCK_EXT</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define PCI_EXIN0	0x0001</div><div class='del'>-#define PCI_EXIN1	0x0002</div><div class='del'>-#define PCI_EXIN2	0x0004</div><div class='del'>-#define PCI_EXIN3	0x0008</div><div class='del'>-#define PCI_EXIN4	0x0010</div><div class='del'>-#define PCI_EXIN5	0x0020</div><div class='del'>-#define PCI_EXIN_MAX	6</div><div class='del'>-</div><div class='del'>-#define PCI_GNT1	0x0040</div><div class='del'>-#define PCI_GNT2	0x0080</div><div class='del'>-#define PCI_GNT3	0x0100</div><div class='del'>-#define PCI_GNT4	0x0200</div><div class='del'>-</div><div class='del'>-#define PCI_REQ1	0x0400</div><div class='del'>-#define PCI_REQ2	0x0800</div><div class='del'>-#define PCI_REQ3	0x1000</div><div class='del'>-#define PCI_REQ4	0x2000</div><div class='del'>-#define PCI_REQ_SHIFT	10</div><div class='del'>-#define PCI_REQ_MASK	0xf</div><div class='del'>-</div><div class='del'>-struct ltq_pci_data {</div><div class='del'>-	int clock;</div><div class='del'>-	int gpio;</div><div class='del'>-	int irq[16];</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* struct used to pass info to network drivers */</div><div class='ctx'> struct ltq_eth_data {</div><div class='ctx'> 	struct sockaddr mac;</div><div class='head'>diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h<br/>index b4465a888e20..aa0b3b866f84 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h</a></div><div class='hunk'>@@ -17,50 +17,8 @@</div><div class='ctx'> #define INT_NUM_IM4_IRL0	(INT_NUM_IRQ0 + 128)</div><div class='ctx'> #define INT_NUM_IM_OFFSET	(INT_NUM_IM1_IRL0 - INT_NUM_IM0_IRL0)</div><div class='ctx'> </div><div class='del'>-#define LTQ_ASC_TIR(x)		(INT_NUM_IM3_IRL0 + (x * 8))</div><div class='del'>-#define LTQ_ASC_RIR(x)		(INT_NUM_IM3_IRL0 + (x * 8) + 1)</div><div class='del'>-#define LTQ_ASC_EIR(x)		(INT_NUM_IM3_IRL0 + (x * 8) + 2)</div><div class='del'>-</div><div class='del'>-#define LTQ_ASC_ASE_TIR		INT_NUM_IM2_IRL0</div><div class='del'>-#define LTQ_ASC_ASE_RIR		(INT_NUM_IM2_IRL0 + 2)</div><div class='del'>-#define LTQ_ASC_ASE_EIR		(INT_NUM_IM2_IRL0 + 3)</div><div class='del'>-</div><div class='del'>-#define LTQ_SSC_TIR		(INT_NUM_IM0_IRL0 + 15)</div><div class='del'>-#define LTQ_SSC_RIR		(INT_NUM_IM0_IRL0 + 14)</div><div class='del'>-#define LTQ_SSC_EIR		(INT_NUM_IM0_IRL0 + 16)</div><div class='del'>-</div><div class='del'>-#define LTQ_MEI_DYING_GASP_INT	(INT_NUM_IM1_IRL0 + 21)</div><div class='del'>-#define LTQ_MEI_INT		(INT_NUM_IM1_IRL0 + 23)</div><div class='del'>-</div><div class='del'>-#define LTQ_TIMER6_INT		(INT_NUM_IM1_IRL0 + 23)</div><div class='del'>-#define LTQ_USB_INT		(INT_NUM_IM1_IRL0 + 22)</div><div class='del'>-#define LTQ_USB_OC_INT		(INT_NUM_IM4_IRL0 + 23)</div><div class='del'>-</div><div class='del'>-#define MIPS_CPU_TIMER_IRQ		7</div><div class='del'>-</div><div class='ctx'> #define LTQ_DMA_CH0_INT		(INT_NUM_IM2_IRL0)</div><div class='del'>-#define LTQ_DMA_CH1_INT		(INT_NUM_IM2_IRL0 + 1)</div><div class='del'>-#define LTQ_DMA_CH2_INT		(INT_NUM_IM2_IRL0 + 2)</div><div class='del'>-#define LTQ_DMA_CH3_INT		(INT_NUM_IM2_IRL0 + 3)</div><div class='del'>-#define LTQ_DMA_CH4_INT		(INT_NUM_IM2_IRL0 + 4)</div><div class='del'>-#define LTQ_DMA_CH5_INT		(INT_NUM_IM2_IRL0 + 5)</div><div class='del'>-#define LTQ_DMA_CH6_INT		(INT_NUM_IM2_IRL0 + 6)</div><div class='del'>-#define LTQ_DMA_CH7_INT		(INT_NUM_IM2_IRL0 + 7)</div><div class='del'>-#define LTQ_DMA_CH8_INT		(INT_NUM_IM2_IRL0 + 8)</div><div class='del'>-#define LTQ_DMA_CH9_INT		(INT_NUM_IM2_IRL0 + 9)</div><div class='del'>-#define LTQ_DMA_CH10_INT	(INT_NUM_IM2_IRL0 + 10)</div><div class='del'>-#define LTQ_DMA_CH11_INT	(INT_NUM_IM2_IRL0 + 11)</div><div class='del'>-#define LTQ_DMA_CH12_INT	(INT_NUM_IM2_IRL0 + 25)</div><div class='del'>-#define LTQ_DMA_CH13_INT	(INT_NUM_IM2_IRL0 + 26)</div><div class='del'>-#define LTQ_DMA_CH14_INT	(INT_NUM_IM2_IRL0 + 27)</div><div class='del'>-#define LTQ_DMA_CH15_INT	(INT_NUM_IM2_IRL0 + 28)</div><div class='del'>-#define LTQ_DMA_CH16_INT	(INT_NUM_IM2_IRL0 + 29)</div><div class='del'>-#define LTQ_DMA_CH17_INT	(INT_NUM_IM2_IRL0 + 30)</div><div class='del'>-#define LTQ_DMA_CH18_INT	(INT_NUM_IM2_IRL0 + 16)</div><div class='del'>-#define LTQ_DMA_CH19_INT	(INT_NUM_IM2_IRL0 + 21)</div><div class='del'>-</div><div class='del'>-#define LTQ_PPE_MBOX_INT	(INT_NUM_IM2_IRL0 + 24)</div><div class='ctx'> </div><div class='del'>-#define INT_NUM_IM4_IRL14	(INT_NUM_IM4_IRL0 + 14)</div><div class='add'>+#define MIPS_CPU_TIMER_IRQ	7</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h<br/>index 8a3c6be669d2..6a2df709c576 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h</a></div><div class='hunk'>@@ -17,38 +17,56 @@</div><div class='ctx'> #define SOC_ID_DANUBE1		0x129</div><div class='ctx'> #define SOC_ID_DANUBE2		0x12B</div><div class='ctx'> #define SOC_ID_TWINPASS		0x12D</div><div class='del'>-#define SOC_ID_AMAZON_SE	0x152</div><div class='add'>+#define SOC_ID_AMAZON_SE_1	0x152 /* 50601 */</div><div class='add'>+#define SOC_ID_AMAZON_SE_2	0x153 /* 50600 */</div><div class='ctx'> #define SOC_ID_ARX188		0x16C</div><div class='del'>-#define SOC_ID_ARX168		0x16D</div><div class='add'>+#define SOC_ID_ARX168_1		0x16D</div><div class='add'>+#define SOC_ID_ARX168_2		0x16E</div><div class='ctx'> #define SOC_ID_ARX182		0x16F</div><div class='del'>-</div><div class='del'>-/* SoC Types */</div><div class='add'>+#define SOC_ID_GRX188		0x170</div><div class='add'>+#define SOC_ID_GRX168		0x171</div><div class='add'>+</div><div class='add'>+#define SOC_ID_VRX288		0x1C0 /* v1.1 */</div><div class='add'>+#define SOC_ID_VRX282		0x1C1 /* v1.1 */</div><div class='add'>+#define SOC_ID_VRX268		0x1C2 /* v1.1 */</div><div class='add'>+#define SOC_ID_GRX268		0x1C8 /* v1.1 */</div><div class='add'>+#define SOC_ID_GRX288		0x1C9 /* v1.1 */</div><div class='add'>+#define SOC_ID_VRX288_2		0x00B /* v1.2 */</div><div class='add'>+#define SOC_ID_VRX268_2		0x00C /* v1.2 */</div><div class='add'>+#define SOC_ID_GRX288_2		0x00D /* v1.2 */</div><div class='add'>+#define SOC_ID_GRX282_2		0x00E /* v1.2 */</div><div class='add'>+</div><div class='add'>+ /* SoC Types */</div><div class='ctx'> #define SOC_TYPE_DANUBE		0x01</div><div class='ctx'> #define SOC_TYPE_TWINPASS	0x02</div><div class='ctx'> #define SOC_TYPE_AR9		0x03</div><div class='del'>-#define SOC_TYPE_VR9		0x04</div><div class='del'>-#define SOC_TYPE_AMAZON_SE	0x05</div><div class='add'>+#define SOC_TYPE_VR9		0x04 /* v1.1 */</div><div class='add'>+#define SOC_TYPE_VR9_2		0x05 /* v1.2 */</div><div class='add'>+#define SOC_TYPE_AMAZON_SE	0x06</div><div class='add'>+</div><div class='add'>+/* BOOT_SEL - find what boot media we have */</div><div class='add'>+#define BS_EXT_ROM		0x0</div><div class='add'>+#define BS_FLASH		0x1</div><div class='add'>+#define BS_MII0			0x2</div><div class='add'>+#define BS_PCI			0x3</div><div class='add'>+#define BS_UART1		0x4</div><div class='add'>+#define BS_SPI			0x5</div><div class='add'>+#define BS_NAND			0x6</div><div class='add'>+#define BS_RMII0		0x7</div><div class='add'>+</div><div class='add'>+/* helpers used to access the cgu */</div><div class='add'>+#define ltq_cgu_w32(x, y)	ltq_w32((x), ltq_cgu_membase + (y))</div><div class='add'>+#define ltq_cgu_r32(x)		ltq_r32(ltq_cgu_membase + (x))</div><div class='add'>+extern __iomem void *ltq_cgu_membase;</div><div class='ctx'> </div><div class='del'>-/* ASC0/1 - serial port */</div><div class='del'>-#define LTQ_ASC0_BASE_ADDR	0x1E100400</div><div class='add'>+/*</div><div class='add'>+ * during early_printk no ioremap is possible</div><div class='add'>+ * lets use KSEG1 instead</div><div class='add'>+ */</div><div class='ctx'> #define LTQ_ASC1_BASE_ADDR	0x1E100C00</div><div class='del'>-#define LTQ_ASC_SIZE		0x400</div><div class='del'>-</div><div class='del'>-/* RCU - reset control unit */</div><div class='del'>-#define LTQ_RCU_BASE_ADDR	0x1F203000</div><div class='del'>-#define LTQ_RCU_SIZE		0x1000</div><div class='del'>-</div><div class='del'>-/* GPTU - general purpose timer unit */</div><div class='del'>-#define LTQ_GPTU_BASE_ADDR	0x18000300</div><div class='del'>-#define LTQ_GPTU_SIZE		0x100</div><div class='add'>+#define LTQ_EARLY_ASC		KSEG1ADDR(LTQ_ASC1_BASE_ADDR)</div><div class='ctx'> </div><div class='ctx'> /* EBU - external bus unit */</div><div class='del'>-#define LTQ_EBU_GPIO_START	0x14000000</div><div class='del'>-#define LTQ_EBU_GPIO_SIZE	0x1000</div><div class='del'>-</div><div class='del'>-#define LTQ_EBU_BASE_ADDR	0x1E105300</div><div class='del'>-#define LTQ_EBU_SIZE		0x100</div><div class='del'>-</div><div class='ctx'> #define LTQ_EBU_BUSCON0		0x0060</div><div class='ctx'> #define LTQ_EBU_PCC_CON		0x0090</div><div class='ctx'> #define LTQ_EBU_PCC_IEN		0x00A4</div><div class='hunk'>@@ -57,85 +75,17 @@</div><div class='ctx'> #define LTQ_EBU_ADDRSEL1	0x0024</div><div class='ctx'> #define EBU_WRDIS		0x80000000</div><div class='ctx'> </div><div class='del'>-/* CGU - clock generation unit */</div><div class='del'>-#define LTQ_CGU_BASE_ADDR	0x1F103000</div><div class='del'>-#define LTQ_CGU_SIZE		0x1000</div><div class='del'>-</div><div class='del'>-/* ICU - interrupt control unit */</div><div class='del'>-#define LTQ_ICU_BASE_ADDR	0x1F880200</div><div class='del'>-#define LTQ_ICU_SIZE		0x100</div><div class='del'>-</div><div class='del'>-/* EIU - external interrupt unit */</div><div class='del'>-#define LTQ_EIU_BASE_ADDR	0x1F101000</div><div class='del'>-#define LTQ_EIU_SIZE		0x1000</div><div class='del'>-</div><div class='del'>-/* PMU - power management unit */</div><div class='del'>-#define LTQ_PMU_BASE_ADDR	0x1F102000</div><div class='del'>-#define LTQ_PMU_SIZE		0x1000</div><div class='del'>-</div><div class='del'>-#define PMU_DMA			0x0020</div><div class='del'>-#define PMU_USB			0x8041</div><div class='del'>-#define PMU_LED			0x0800</div><div class='del'>-#define PMU_GPT			0x1000</div><div class='del'>-#define PMU_PPE			0x2000</div><div class='del'>-#define PMU_FPI			0x4000</div><div class='del'>-#define PMU_SWITCH		0x10000000</div><div class='del'>-</div><div class='del'>-/* ETOP - ethernet */</div><div class='del'>-#define LTQ_ETOP_BASE_ADDR	0x1E180000</div><div class='del'>-#define LTQ_ETOP_SIZE		0x40000</div><div class='del'>-</div><div class='del'>-/* DMA */</div><div class='del'>-#define LTQ_DMA_BASE_ADDR	0x1E104100</div><div class='del'>-#define LTQ_DMA_SIZE		0x800</div><div class='del'>-</div><div class='del'>-/* PCI */</div><div class='del'>-#define PCI_CR_BASE_ADDR	0x1E105400</div><div class='del'>-#define PCI_CR_SIZE		0x400</div><div class='del'>-</div><div class='ctx'> /* WDT */</div><div class='del'>-#define LTQ_WDT_BASE_ADDR	0x1F8803F0</div><div class='del'>-#define LTQ_WDT_SIZE		0x10</div><div class='del'>-</div><div class='del'>-/* STP - serial to parallel conversion unit */</div><div class='del'>-#define LTQ_STP_BASE_ADDR	0x1E100BB0</div><div class='del'>-#define LTQ_STP_SIZE		0x40</div><div class='del'>-</div><div class='del'>-/* GPIO */</div><div class='del'>-#define LTQ_GPIO0_BASE_ADDR	0x1E100B10</div><div class='del'>-#define LTQ_GPIO1_BASE_ADDR	0x1E100B40</div><div class='del'>-#define LTQ_GPIO2_BASE_ADDR	0x1E100B70</div><div class='del'>-#define LTQ_GPIO_SIZE		0x30</div><div class='del'>-</div><div class='del'>-/* SSC */</div><div class='del'>-#define LTQ_SSC_BASE_ADDR	0x1e100800</div><div class='del'>-#define LTQ_SSC_SIZE		0x100</div><div class='del'>-</div><div class='del'>-/* MEI - dsl core */</div><div class='del'>-#define LTQ_MEI_BASE_ADDR	0x1E116000</div><div class='del'>-</div><div class='del'>-/* DEU - data encryption unit */</div><div class='del'>-#define LTQ_DEU_BASE_ADDR	0x1E103100</div><div class='add'>+#define LTQ_RST_CAUSE_WDTRST	0x20</div><div class='ctx'> </div><div class='ctx'> /* MPS - multi processor unit (voice) */</div><div class='ctx'> #define LTQ_MPS_BASE_ADDR	(KSEG1 + 0x1F107000)</div><div class='ctx'> #define LTQ_MPS_CHIPID		((u32 *)(LTQ_MPS_BASE_ADDR + 0x0344))</div><div class='ctx'> </div><div class='ctx'> /* request a non-gpio and set the PIO config */</div><div class='del'>-extern int  ltq_gpio_request(unsigned int pin, unsigned int alt0,</div><div class='del'>-	unsigned int alt1, unsigned int dir, const char *name);</div><div class='add'>+#define PMU_PPE			 BIT(13)</div><div class='ctx'> extern void ltq_pmu_enable(unsigned int module);</div><div class='ctx'> extern void ltq_pmu_disable(unsigned int module);</div><div class='ctx'> </div><div class='del'>-static inline int ltq_is_ar9(void)</div><div class='del'>-{</div><div class='del'>-	return (ltq_get_soc_type() == SOC_TYPE_AR9);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int ltq_is_vr9(void)</div><div class='del'>-{</div><div class='del'>-	return (ltq_get_soc_type() == SOC_TYPE_VR9);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif /* CONFIG_SOC_TYPE_XWAY */</div><div class='ctx'> #endif /* _LTQ_XWAY_H__ */</div><div class='head'>diff --git a/arch/mips/include/asm/mips-boards/generic.h b/arch/mips/include/asm/mips-boards/generic.h<br/>index 46c08563e532..6e23ceb0ba8c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mips-boards/generic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mips-boards/generic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mips-boards/generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mips-boards/generic.h</a></div><div class='hunk'>@@ -93,8 +93,4 @@ extern void mips_pcibios_init(void);</div><div class='ctx'> #define mips_pcibios_init() do { } while (0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_KGDB</div><div class='del'>-extern void kgdb_config(void);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #endif  /* __ASM_MIPS_BOARDS_GENERIC_H */</div><div class='head'>diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h<br/>index 73c0d45798de..9b02cfba7449 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/mmu_context.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/mmu_context.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/mmu_context.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -37,12 +37,6 @@ extern void tlbmiss_handler_setup_pgd(unsigned long pgd);</div><div class='ctx'> 		write_c0_xcontext((unsigned long) smp_processor_id() &lt;&lt; 51); \</div><div class='ctx'> 	} while (0)</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static inline unsigned long get_current_pgd(void)</div><div class='del'>-{</div><div class='del'>-	return PHYS_TO_XKSEG_CACHED((read_c0_context() &gt;&gt; 11) &amp; ~0xfffUL);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #else /* CONFIG_MIPS_PGD_C0_CONTEXT: using  pgd_current*/</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h<br/>index 7467d1d933d5..530008048c62 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/module.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/module.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/module.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/module.h</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #define _ASM_MODULE_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/elf.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct mod_arch_specific {</div><div class='head'>diff --git a/arch/mips/include/asm/octeon/cvmx-pcieep-defs.h b/arch/mips/include/asm/octeon/cvmx-pcieep-defs.h<br/>deleted file mode 100644<br/>index d553f8e88df6..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/octeon/cvmx-pcieep-defs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/octeon/cvmx-pcieep-defs.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1365 +0,0 @@</div><div class='del'>-/***********************license start***************</div><div class='del'>- * Author: Cavium Networks</div><div class='del'>- *</div><div class='del'>- * Contact: support@caviumnetworks.com</div><div class='del'>- * This file is part of the OCTEON SDK</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2003-2008 Cavium Networks</div><div class='del'>- *</div><div class='del'>- * This file is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty</div><div class='del'>- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or</div><div class='del'>- * NONINFRINGEMENT.  See the GNU General Public License for more</div><div class='del'>- * details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this file; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA</div><div class='del'>- * or visit http://www.gnu.org/licenses/.</div><div class='del'>- *</div><div class='del'>- * This file may also be available under a different license from Cavium.</div><div class='del'>- * Contact Cavium Networks for more information</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#ifndef __CVMX_PCIEEP_DEFS_H__</div><div class='del'>-#define __CVMX_PCIEEP_DEFS_H__</div><div class='del'>-</div><div class='del'>-#define CVMX_PCIEEP_CFG000 \</div><div class='del'>-	 (0x0000000000000000ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG001 \</div><div class='del'>-	 (0x0000000000000004ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG002 \</div><div class='del'>-	 (0x0000000000000008ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG003 \</div><div class='del'>-	 (0x000000000000000Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG004 \</div><div class='del'>-	 (0x0000000000000010ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG004_MASK \</div><div class='del'>-	 (0x0000000080000010ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG005 \</div><div class='del'>-	 (0x0000000000000014ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG005_MASK \</div><div class='del'>-	 (0x0000000080000014ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG006 \</div><div class='del'>-	 (0x0000000000000018ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG006_MASK \</div><div class='del'>-	 (0x0000000080000018ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG007 \</div><div class='del'>-	 (0x000000000000001Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG007_MASK \</div><div class='del'>-	 (0x000000008000001Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG008 \</div><div class='del'>-	 (0x0000000000000020ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG008_MASK \</div><div class='del'>-	 (0x0000000080000020ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG009 \</div><div class='del'>-	 (0x0000000000000024ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG009_MASK \</div><div class='del'>-	 (0x0000000080000024ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG010 \</div><div class='del'>-	 (0x0000000000000028ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG011 \</div><div class='del'>-	 (0x000000000000002Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG012 \</div><div class='del'>-	 (0x0000000000000030ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG012_MASK \</div><div class='del'>-	 (0x0000000080000030ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG013 \</div><div class='del'>-	 (0x0000000000000034ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG015 \</div><div class='del'>-	 (0x000000000000003Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG016 \</div><div class='del'>-	 (0x0000000000000040ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG017 \</div><div class='del'>-	 (0x0000000000000044ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG020 \</div><div class='del'>-	 (0x0000000000000050ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG021 \</div><div class='del'>-	 (0x0000000000000054ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG022 \</div><div class='del'>-	 (0x0000000000000058ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG023 \</div><div class='del'>-	 (0x000000000000005Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG028 \</div><div class='del'>-	 (0x0000000000000070ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG029 \</div><div class='del'>-	 (0x0000000000000074ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG030 \</div><div class='del'>-	 (0x0000000000000078ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG031 \</div><div class='del'>-	 (0x000000000000007Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG032 \</div><div class='del'>-	 (0x0000000000000080ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG033 \</div><div class='del'>-	 (0x0000000000000084ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG034 \</div><div class='del'>-	 (0x0000000000000088ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG037 \</div><div class='del'>-	 (0x0000000000000094ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG038 \</div><div class='del'>-	 (0x0000000000000098ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG039 \</div><div class='del'>-	 (0x000000000000009Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG040 \</div><div class='del'>-	 (0x00000000000000A0ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG041 \</div><div class='del'>-	 (0x00000000000000A4ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG042 \</div><div class='del'>-	 (0x00000000000000A8ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG064 \</div><div class='del'>-	 (0x0000000000000100ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG065 \</div><div class='del'>-	 (0x0000000000000104ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG066 \</div><div class='del'>-	 (0x0000000000000108ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG067 \</div><div class='del'>-	 (0x000000000000010Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG068 \</div><div class='del'>-	 (0x0000000000000110ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG069 \</div><div class='del'>-	 (0x0000000000000114ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG070 \</div><div class='del'>-	 (0x0000000000000118ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG071 \</div><div class='del'>-	 (0x000000000000011Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG072 \</div><div class='del'>-	 (0x0000000000000120ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG073 \</div><div class='del'>-	 (0x0000000000000124ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG074 \</div><div class='del'>-	 (0x0000000000000128ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG448 \</div><div class='del'>-	 (0x0000000000000700ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG449 \</div><div class='del'>-	 (0x0000000000000704ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG450 \</div><div class='del'>-	 (0x0000000000000708ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG451 \</div><div class='del'>-	 (0x000000000000070Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG452 \</div><div class='del'>-	 (0x0000000000000710ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG453 \</div><div class='del'>-	 (0x0000000000000714ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG454 \</div><div class='del'>-	 (0x0000000000000718ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG455 \</div><div class='del'>-	 (0x000000000000071Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG456 \</div><div class='del'>-	 (0x0000000000000720ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG458 \</div><div class='del'>-	 (0x0000000000000728ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG459 \</div><div class='del'>-	 (0x000000000000072Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG460 \</div><div class='del'>-	 (0x0000000000000730ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG461 \</div><div class='del'>-	 (0x0000000000000734ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG462 \</div><div class='del'>-	 (0x0000000000000738ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG463 \</div><div class='del'>-	 (0x000000000000073Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG464 \</div><div class='del'>-	 (0x0000000000000740ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG465 \</div><div class='del'>-	 (0x0000000000000744ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG466 \</div><div class='del'>-	 (0x0000000000000748ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG467 \</div><div class='del'>-	 (0x000000000000074Cull)</div><div class='del'>-#define CVMX_PCIEEP_CFG468 \</div><div class='del'>-	 (0x0000000000000750ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG490 \</div><div class='del'>-	 (0x00000000000007A8ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG491 \</div><div class='del'>-	 (0x00000000000007ACull)</div><div class='del'>-#define CVMX_PCIEEP_CFG492 \</div><div class='del'>-	 (0x00000000000007B0ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG516 \</div><div class='del'>-	 (0x0000000000000810ull)</div><div class='del'>-#define CVMX_PCIEEP_CFG517 \</div><div class='del'>-	 (0x0000000000000814ull)</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg000 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg000_s {</div><div class='del'>-		uint32_t devid:16;</div><div class='del'>-		uint32_t vendid:16;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg000_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg000_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg000_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg000_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg001 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg001_s {</div><div class='del'>-		uint32_t dpe:1;</div><div class='del'>-		uint32_t sse:1;</div><div class='del'>-		uint32_t rma:1;</div><div class='del'>-		uint32_t rta:1;</div><div class='del'>-		uint32_t sta:1;</div><div class='del'>-		uint32_t devt:2;</div><div class='del'>-		uint32_t mdpe:1;</div><div class='del'>-		uint32_t fbb:1;</div><div class='del'>-		uint32_t reserved_22_22:1;</div><div class='del'>-		uint32_t m66:1;</div><div class='del'>-		uint32_t cl:1;</div><div class='del'>-		uint32_t i_stat:1;</div><div class='del'>-		uint32_t reserved_11_18:8;</div><div class='del'>-		uint32_t i_dis:1;</div><div class='del'>-		uint32_t fbbe:1;</div><div class='del'>-		uint32_t see:1;</div><div class='del'>-		uint32_t ids_wcc:1;</div><div class='del'>-		uint32_t per:1;</div><div class='del'>-		uint32_t vps:1;</div><div class='del'>-		uint32_t mwice:1;</div><div class='del'>-		uint32_t scse:1;</div><div class='del'>-		uint32_t me:1;</div><div class='del'>-		uint32_t msae:1;</div><div class='del'>-		uint32_t isae:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg001_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg001_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg001_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg001_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg002 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg002_s {</div><div class='del'>-		uint32_t bcc:8;</div><div class='del'>-		uint32_t sc:8;</div><div class='del'>-		uint32_t pi:8;</div><div class='del'>-		uint32_t rid:8;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg002_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg002_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg002_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg002_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg003 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg003_s {</div><div class='del'>-		uint32_t bist:8;</div><div class='del'>-		uint32_t mfd:1;</div><div class='del'>-		uint32_t chf:7;</div><div class='del'>-		uint32_t lt:8;</div><div class='del'>-		uint32_t cls:8;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg003_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg003_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg003_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg003_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg004 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg004_s {</div><div class='del'>-		uint32_t lbab:18;</div><div class='del'>-		uint32_t reserved_4_13:10;</div><div class='del'>-		uint32_t pf:1;</div><div class='del'>-		uint32_t typ:2;</div><div class='del'>-		uint32_t mspc:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg004_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg004_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg004_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg004_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg004_mask {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg004_mask_s {</div><div class='del'>-		uint32_t lmask:31;</div><div class='del'>-		uint32_t enb:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg004_mask_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg004_mask_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg004_mask_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg004_mask_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg005 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg005_s {</div><div class='del'>-		uint32_t ubab:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg005_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg005_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg005_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg005_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg005_mask {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg005_mask_s {</div><div class='del'>-		uint32_t umask:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg005_mask_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg005_mask_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg005_mask_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg005_mask_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg006 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg006_s {</div><div class='del'>-		uint32_t lbab:6;</div><div class='del'>-		uint32_t reserved_4_25:22;</div><div class='del'>-		uint32_t pf:1;</div><div class='del'>-		uint32_t typ:2;</div><div class='del'>-		uint32_t mspc:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg006_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg006_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg006_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg006_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg006_mask {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg006_mask_s {</div><div class='del'>-		uint32_t lmask:31;</div><div class='del'>-		uint32_t enb:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg006_mask_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg006_mask_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg006_mask_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg006_mask_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg007 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg007_s {</div><div class='del'>-		uint32_t ubab:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg007_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg007_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg007_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg007_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg007_mask {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg007_mask_s {</div><div class='del'>-		uint32_t umask:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg007_mask_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg007_mask_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg007_mask_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg007_mask_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg008 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg008_s {</div><div class='del'>-		uint32_t reserved_4_31:28;</div><div class='del'>-		uint32_t pf:1;</div><div class='del'>-		uint32_t typ:2;</div><div class='del'>-		uint32_t mspc:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg008_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg008_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg008_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg008_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg008_mask {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg008_mask_s {</div><div class='del'>-		uint32_t lmask:31;</div><div class='del'>-		uint32_t enb:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg008_mask_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg008_mask_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg008_mask_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg008_mask_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg009 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg009_s {</div><div class='del'>-		uint32_t ubab:25;</div><div class='del'>-		uint32_t reserved_0_6:7;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg009_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg009_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg009_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg009_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg009_mask {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg009_mask_s {</div><div class='del'>-		uint32_t umask:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg009_mask_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg009_mask_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg009_mask_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg009_mask_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg010 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg010_s {</div><div class='del'>-		uint32_t cisp:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg010_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg010_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg010_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg010_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg011 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg011_s {</div><div class='del'>-		uint32_t ssid:16;</div><div class='del'>-		uint32_t ssvid:16;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg011_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg011_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg011_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg011_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg012 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg012_s {</div><div class='del'>-		uint32_t eraddr:16;</div><div class='del'>-		uint32_t reserved_1_15:15;</div><div class='del'>-		uint32_t er_en:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg012_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg012_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg012_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg012_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg012_mask {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg012_mask_s {</div><div class='del'>-		uint32_t mask:31;</div><div class='del'>-		uint32_t enb:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg012_mask_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg012_mask_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg012_mask_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg012_mask_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg013 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg013_s {</div><div class='del'>-		uint32_t reserved_8_31:24;</div><div class='del'>-		uint32_t cp:8;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg013_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg013_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg013_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg013_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg015 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg015_s {</div><div class='del'>-		uint32_t ml:8;</div><div class='del'>-		uint32_t mg:8;</div><div class='del'>-		uint32_t inta:8;</div><div class='del'>-		uint32_t il:8;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg015_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg015_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg015_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg015_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg016 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg016_s {</div><div class='del'>-		uint32_t pmes:5;</div><div class='del'>-		uint32_t d2s:1;</div><div class='del'>-		uint32_t d1s:1;</div><div class='del'>-		uint32_t auxc:3;</div><div class='del'>-		uint32_t dsi:1;</div><div class='del'>-		uint32_t reserved_20_20:1;</div><div class='del'>-		uint32_t pme_clock:1;</div><div class='del'>-		uint32_t pmsv:3;</div><div class='del'>-		uint32_t ncp:8;</div><div class='del'>-		uint32_t pmcid:8;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg016_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg016_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg016_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg016_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg017 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg017_s {</div><div class='del'>-		uint32_t pmdia:8;</div><div class='del'>-		uint32_t bpccee:1;</div><div class='del'>-		uint32_t bd3h:1;</div><div class='del'>-		uint32_t reserved_16_21:6;</div><div class='del'>-		uint32_t pmess:1;</div><div class='del'>-		uint32_t pmedsia:2;</div><div class='del'>-		uint32_t pmds:4;</div><div class='del'>-		uint32_t pmeens:1;</div><div class='del'>-		uint32_t reserved_4_7:4;</div><div class='del'>-		uint32_t nsr:1;</div><div class='del'>-		uint32_t reserved_2_2:1;</div><div class='del'>-		uint32_t ps:2;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg017_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg017_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg017_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg017_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg020 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg020_s {</div><div class='del'>-		uint32_t reserved_24_31:8;</div><div class='del'>-		uint32_t m64:1;</div><div class='del'>-		uint32_t mme:3;</div><div class='del'>-		uint32_t mmc:3;</div><div class='del'>-		uint32_t msien:1;</div><div class='del'>-		uint32_t ncp:8;</div><div class='del'>-		uint32_t msicid:8;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg020_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg020_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg020_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg020_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg021 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg021_s {</div><div class='del'>-		uint32_t lmsi:30;</div><div class='del'>-		uint32_t reserved_0_1:2;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg021_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg021_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg021_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg021_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg022 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg022_s {</div><div class='del'>-		uint32_t umsi:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg022_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg022_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg022_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg022_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg023 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg023_s {</div><div class='del'>-		uint32_t reserved_16_31:16;</div><div class='del'>-		uint32_t msimd:16;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg023_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg023_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg023_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg023_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg028 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg028_s {</div><div class='del'>-		uint32_t reserved_30_31:2;</div><div class='del'>-		uint32_t imn:5;</div><div class='del'>-		uint32_t si:1;</div><div class='del'>-		uint32_t dpt:4;</div><div class='del'>-		uint32_t pciecv:4;</div><div class='del'>-		uint32_t ncp:8;</div><div class='del'>-		uint32_t pcieid:8;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg028_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg028_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg028_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg028_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg029 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg029_s {</div><div class='del'>-		uint32_t reserved_28_31:4;</div><div class='del'>-		uint32_t cspls:2;</div><div class='del'>-		uint32_t csplv:8;</div><div class='del'>-		uint32_t reserved_16_17:2;</div><div class='del'>-		uint32_t rber:1;</div><div class='del'>-		uint32_t reserved_12_14:3;</div><div class='del'>-		uint32_t el1al:3;</div><div class='del'>-		uint32_t el0al:3;</div><div class='del'>-		uint32_t etfs:1;</div><div class='del'>-		uint32_t pfs:2;</div><div class='del'>-		uint32_t mpss:3;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg029_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg029_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg029_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg029_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg030 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg030_s {</div><div class='del'>-		uint32_t reserved_22_31:10;</div><div class='del'>-		uint32_t tp:1;</div><div class='del'>-		uint32_t ap_d:1;</div><div class='del'>-		uint32_t ur_d:1;</div><div class='del'>-		uint32_t fe_d:1;</div><div class='del'>-		uint32_t nfe_d:1;</div><div class='del'>-		uint32_t ce_d:1;</div><div class='del'>-		uint32_t reserved_15_15:1;</div><div class='del'>-		uint32_t mrrs:3;</div><div class='del'>-		uint32_t ns_en:1;</div><div class='del'>-		uint32_t ap_en:1;</div><div class='del'>-		uint32_t pf_en:1;</div><div class='del'>-		uint32_t etf_en:1;</div><div class='del'>-		uint32_t mps:3;</div><div class='del'>-		uint32_t ro_en:1;</div><div class='del'>-		uint32_t ur_en:1;</div><div class='del'>-		uint32_t fe_en:1;</div><div class='del'>-		uint32_t nfe_en:1;</div><div class='del'>-		uint32_t ce_en:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg030_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg030_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg030_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg030_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg031 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg031_s {</div><div class='del'>-		uint32_t pnum:8;</div><div class='del'>-		uint32_t reserved_22_23:2;</div><div class='del'>-		uint32_t lbnc:1;</div><div class='del'>-		uint32_t dllarc:1;</div><div class='del'>-		uint32_t sderc:1;</div><div class='del'>-		uint32_t cpm:1;</div><div class='del'>-		uint32_t l1el:3;</div><div class='del'>-		uint32_t l0el:3;</div><div class='del'>-		uint32_t aslpms:2;</div><div class='del'>-		uint32_t mlw:6;</div><div class='del'>-		uint32_t mls:4;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg031_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg031_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg031_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg031_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg032 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg032_s {</div><div class='del'>-		uint32_t reserved_30_31:2;</div><div class='del'>-		uint32_t dlla:1;</div><div class='del'>-		uint32_t scc:1;</div><div class='del'>-		uint32_t lt:1;</div><div class='del'>-		uint32_t reserved_26_26:1;</div><div class='del'>-		uint32_t nlw:6;</div><div class='del'>-		uint32_t ls:4;</div><div class='del'>-		uint32_t reserved_10_15:6;</div><div class='del'>-		uint32_t hawd:1;</div><div class='del'>-		uint32_t ecpm:1;</div><div class='del'>-		uint32_t es:1;</div><div class='del'>-		uint32_t ccc:1;</div><div class='del'>-		uint32_t rl:1;</div><div class='del'>-		uint32_t ld:1;</div><div class='del'>-		uint32_t rcb:1;</div><div class='del'>-		uint32_t reserved_2_2:1;</div><div class='del'>-		uint32_t aslpc:2;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg032_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg032_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg032_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg032_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg033 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg033_s {</div><div class='del'>-		uint32_t ps_num:13;</div><div class='del'>-		uint32_t nccs:1;</div><div class='del'>-		uint32_t emip:1;</div><div class='del'>-		uint32_t sp_ls:2;</div><div class='del'>-		uint32_t sp_lv:8;</div><div class='del'>-		uint32_t hp_c:1;</div><div class='del'>-		uint32_t hp_s:1;</div><div class='del'>-		uint32_t pip:1;</div><div class='del'>-		uint32_t aip:1;</div><div class='del'>-		uint32_t mrlsp:1;</div><div class='del'>-		uint32_t pcp:1;</div><div class='del'>-		uint32_t abp:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg033_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg033_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg033_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg033_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg034 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg034_s {</div><div class='del'>-		uint32_t reserved_25_31:7;</div><div class='del'>-		uint32_t dlls_c:1;</div><div class='del'>-		uint32_t emis:1;</div><div class='del'>-		uint32_t pds:1;</div><div class='del'>-		uint32_t mrlss:1;</div><div class='del'>-		uint32_t ccint_d:1;</div><div class='del'>-		uint32_t pd_c:1;</div><div class='del'>-		uint32_t mrls_c:1;</div><div class='del'>-		uint32_t pf_d:1;</div><div class='del'>-		uint32_t abp_d:1;</div><div class='del'>-		uint32_t reserved_13_15:3;</div><div class='del'>-		uint32_t dlls_en:1;</div><div class='del'>-		uint32_t emic:1;</div><div class='del'>-		uint32_t pcc:1;</div><div class='del'>-		uint32_t pic:2;</div><div class='del'>-		uint32_t aic:2;</div><div class='del'>-		uint32_t hpint_en:1;</div><div class='del'>-		uint32_t ccint_en:1;</div><div class='del'>-		uint32_t pd_en:1;</div><div class='del'>-		uint32_t mrls_en:1;</div><div class='del'>-		uint32_t pf_en:1;</div><div class='del'>-		uint32_t abp_en:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg034_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg034_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg034_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg034_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg037 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg037_s {</div><div class='del'>-		uint32_t reserved_5_31:27;</div><div class='del'>-		uint32_t ctds:1;</div><div class='del'>-		uint32_t ctrs:4;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg037_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg037_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg037_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg037_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg038 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg038_s {</div><div class='del'>-		uint32_t reserved_5_31:27;</div><div class='del'>-		uint32_t ctd:1;</div><div class='del'>-		uint32_t ctv:4;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg038_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg038_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg038_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg038_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg039 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg039_s {</div><div class='del'>-		uint32_t reserved_0_31:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg039_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg039_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg039_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg039_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg040 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg040_s {</div><div class='del'>-		uint32_t reserved_0_31:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg040_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg040_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg040_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg040_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg041 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg041_s {</div><div class='del'>-		uint32_t reserved_0_31:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg041_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg041_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg041_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg041_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg042 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg042_s {</div><div class='del'>-		uint32_t reserved_0_31:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg042_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg042_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg042_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg042_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg064 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg064_s {</div><div class='del'>-		uint32_t nco:12;</div><div class='del'>-		uint32_t cv:4;</div><div class='del'>-		uint32_t pcieec:16;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg064_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg064_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg064_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg064_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg065 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg065_s {</div><div class='del'>-		uint32_t reserved_21_31:11;</div><div class='del'>-		uint32_t ures:1;</div><div class='del'>-		uint32_t ecrces:1;</div><div class='del'>-		uint32_t mtlps:1;</div><div class='del'>-		uint32_t ros:1;</div><div class='del'>-		uint32_t ucs:1;</div><div class='del'>-		uint32_t cas:1;</div><div class='del'>-		uint32_t cts:1;</div><div class='del'>-		uint32_t fcpes:1;</div><div class='del'>-		uint32_t ptlps:1;</div><div class='del'>-		uint32_t reserved_6_11:6;</div><div class='del'>-		uint32_t sdes:1;</div><div class='del'>-		uint32_t dlpes:1;</div><div class='del'>-		uint32_t reserved_0_3:4;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg065_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg065_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg065_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg065_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg066 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg066_s {</div><div class='del'>-		uint32_t reserved_21_31:11;</div><div class='del'>-		uint32_t urem:1;</div><div class='del'>-		uint32_t ecrcem:1;</div><div class='del'>-		uint32_t mtlpm:1;</div><div class='del'>-		uint32_t rom:1;</div><div class='del'>-		uint32_t ucm:1;</div><div class='del'>-		uint32_t cam:1;</div><div class='del'>-		uint32_t ctm:1;</div><div class='del'>-		uint32_t fcpem:1;</div><div class='del'>-		uint32_t ptlpm:1;</div><div class='del'>-		uint32_t reserved_6_11:6;</div><div class='del'>-		uint32_t sdem:1;</div><div class='del'>-		uint32_t dlpem:1;</div><div class='del'>-		uint32_t reserved_0_3:4;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg066_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg066_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg066_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg066_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg067 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg067_s {</div><div class='del'>-		uint32_t reserved_21_31:11;</div><div class='del'>-		uint32_t ures:1;</div><div class='del'>-		uint32_t ecrces:1;</div><div class='del'>-		uint32_t mtlps:1;</div><div class='del'>-		uint32_t ros:1;</div><div class='del'>-		uint32_t ucs:1;</div><div class='del'>-		uint32_t cas:1;</div><div class='del'>-		uint32_t cts:1;</div><div class='del'>-		uint32_t fcpes:1;</div><div class='del'>-		uint32_t ptlps:1;</div><div class='del'>-		uint32_t reserved_6_11:6;</div><div class='del'>-		uint32_t sdes:1;</div><div class='del'>-		uint32_t dlpes:1;</div><div class='del'>-		uint32_t reserved_0_3:4;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg067_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg067_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg067_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg067_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg068 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg068_s {</div><div class='del'>-		uint32_t reserved_14_31:18;</div><div class='del'>-		uint32_t anfes:1;</div><div class='del'>-		uint32_t rtts:1;</div><div class='del'>-		uint32_t reserved_9_11:3;</div><div class='del'>-		uint32_t rnrs:1;</div><div class='del'>-		uint32_t bdllps:1;</div><div class='del'>-		uint32_t btlps:1;</div><div class='del'>-		uint32_t reserved_1_5:5;</div><div class='del'>-		uint32_t res:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg068_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg068_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg068_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg068_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg069 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg069_s {</div><div class='del'>-		uint32_t reserved_14_31:18;</div><div class='del'>-		uint32_t anfem:1;</div><div class='del'>-		uint32_t rttm:1;</div><div class='del'>-		uint32_t reserved_9_11:3;</div><div class='del'>-		uint32_t rnrm:1;</div><div class='del'>-		uint32_t bdllpm:1;</div><div class='del'>-		uint32_t btlpm:1;</div><div class='del'>-		uint32_t reserved_1_5:5;</div><div class='del'>-		uint32_t rem:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg069_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg069_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg069_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg069_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg070 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg070_s {</div><div class='del'>-		uint32_t reserved_9_31:23;</div><div class='del'>-		uint32_t ce:1;</div><div class='del'>-		uint32_t cc:1;</div><div class='del'>-		uint32_t ge:1;</div><div class='del'>-		uint32_t gc:1;</div><div class='del'>-		uint32_t fep:5;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg070_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg070_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg070_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg070_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg071 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg071_s {</div><div class='del'>-		uint32_t dword1:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg071_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg071_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg071_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg071_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg072 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg072_s {</div><div class='del'>-		uint32_t dword2:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg072_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg072_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg072_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg072_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg073 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg073_s {</div><div class='del'>-		uint32_t dword3:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg073_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg073_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg073_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg073_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg074 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg074_s {</div><div class='del'>-		uint32_t dword4:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg074_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg074_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg074_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg074_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg448 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg448_s {</div><div class='del'>-		uint32_t rtl:16;</div><div class='del'>-		uint32_t rtltl:16;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg448_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg448_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg448_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg448_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg449 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg449_s {</div><div class='del'>-		uint32_t omr:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg449_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg449_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg449_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg449_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg450 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg450_s {</div><div class='del'>-		uint32_t lpec:8;</div><div class='del'>-		uint32_t reserved_22_23:2;</div><div class='del'>-		uint32_t link_state:6;</div><div class='del'>-		uint32_t force_link:1;</div><div class='del'>-		uint32_t reserved_8_14:7;</div><div class='del'>-		uint32_t link_num:8;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg450_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg450_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg450_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg450_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg451 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg451_s {</div><div class='del'>-		uint32_t reserved_30_31:2;</div><div class='del'>-		uint32_t l1el:3;</div><div class='del'>-		uint32_t l0el:3;</div><div class='del'>-		uint32_t n_fts_cc:8;</div><div class='del'>-		uint32_t n_fts:8;</div><div class='del'>-		uint32_t ack_freq:8;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg451_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg451_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg451_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg451_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg452 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg452_s {</div><div class='del'>-		uint32_t reserved_26_31:6;</div><div class='del'>-		uint32_t eccrc:1;</div><div class='del'>-		uint32_t reserved_22_24:3;</div><div class='del'>-		uint32_t lme:6;</div><div class='del'>-		uint32_t reserved_8_15:8;</div><div class='del'>-		uint32_t flm:1;</div><div class='del'>-		uint32_t reserved_6_6:1;</div><div class='del'>-		uint32_t dllle:1;</div><div class='del'>-		uint32_t reserved_4_4:1;</div><div class='del'>-		uint32_t ra:1;</div><div class='del'>-		uint32_t le:1;</div><div class='del'>-		uint32_t sd:1;</div><div class='del'>-		uint32_t omr:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg452_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg452_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg452_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg452_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg453 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg453_s {</div><div class='del'>-		uint32_t dlld:1;</div><div class='del'>-		uint32_t reserved_26_30:5;</div><div class='del'>-		uint32_t ack_nak:1;</div><div class='del'>-		uint32_t fcd:1;</div><div class='del'>-		uint32_t ilst:24;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg453_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg453_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg453_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg453_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg454 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg454_s {</div><div class='del'>-		uint32_t reserved_29_31:3;</div><div class='del'>-		uint32_t tmfcwt:5;</div><div class='del'>-		uint32_t tmanlt:5;</div><div class='del'>-		uint32_t tmrt:5;</div><div class='del'>-		uint32_t reserved_11_13:3;</div><div class='del'>-		uint32_t nskps:3;</div><div class='del'>-		uint32_t reserved_4_7:4;</div><div class='del'>-		uint32_t ntss:4;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg454_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg454_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg454_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg454_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg455 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg455_s {</div><div class='del'>-		uint32_t m_cfg0_filt:1;</div><div class='del'>-		uint32_t m_io_filt:1;</div><div class='del'>-		uint32_t msg_ctrl:1;</div><div class='del'>-		uint32_t m_cpl_ecrc_filt:1;</div><div class='del'>-		uint32_t m_ecrc_filt:1;</div><div class='del'>-		uint32_t m_cpl_len_err:1;</div><div class='del'>-		uint32_t m_cpl_attr_err:1;</div><div class='del'>-		uint32_t m_cpl_tc_err:1;</div><div class='del'>-		uint32_t m_cpl_fun_err:1;</div><div class='del'>-		uint32_t m_cpl_rid_err:1;</div><div class='del'>-		uint32_t m_cpl_tag_err:1;</div><div class='del'>-		uint32_t m_lk_filt:1;</div><div class='del'>-		uint32_t m_cfg1_filt:1;</div><div class='del'>-		uint32_t m_bar_match:1;</div><div class='del'>-		uint32_t m_pois_filt:1;</div><div class='del'>-		uint32_t m_fun:1;</div><div class='del'>-		uint32_t dfcwt:1;</div><div class='del'>-		uint32_t reserved_11_14:4;</div><div class='del'>-		uint32_t skpiv:11;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg455_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg455_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg455_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg455_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg456 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg456_s {</div><div class='del'>-		uint32_t reserved_2_31:30;</div><div class='del'>-		uint32_t m_vend1_drp:1;</div><div class='del'>-		uint32_t m_vend0_drp:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg456_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg456_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg456_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg456_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg458 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg458_s {</div><div class='del'>-		uint32_t dbg_info_l32:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg458_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg458_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg458_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg458_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg459 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg459_s {</div><div class='del'>-		uint32_t dbg_info_u32:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg459_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg459_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg459_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg459_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg460 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg460_s {</div><div class='del'>-		uint32_t reserved_20_31:12;</div><div class='del'>-		uint32_t tphfcc:8;</div><div class='del'>-		uint32_t tpdfcc:12;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg460_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg460_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg460_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg460_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg461 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg461_s {</div><div class='del'>-		uint32_t reserved_20_31:12;</div><div class='del'>-		uint32_t tchfcc:8;</div><div class='del'>-		uint32_t tcdfcc:12;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg461_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg461_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg461_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg461_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg462 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg462_s {</div><div class='del'>-		uint32_t reserved_20_31:12;</div><div class='del'>-		uint32_t tchfcc:8;</div><div class='del'>-		uint32_t tcdfcc:12;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg462_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg462_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg462_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg462_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg463 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg463_s {</div><div class='del'>-		uint32_t reserved_3_31:29;</div><div class='del'>-		uint32_t rqne:1;</div><div class='del'>-		uint32_t trbne:1;</div><div class='del'>-		uint32_t rtlpfccnr:1;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg463_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg463_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg463_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg463_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg464 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg464_s {</div><div class='del'>-		uint32_t wrr_vc3:8;</div><div class='del'>-		uint32_t wrr_vc2:8;</div><div class='del'>-		uint32_t wrr_vc1:8;</div><div class='del'>-		uint32_t wrr_vc0:8;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg464_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg464_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg464_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg464_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg465 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg465_s {</div><div class='del'>-		uint32_t wrr_vc7:8;</div><div class='del'>-		uint32_t wrr_vc6:8;</div><div class='del'>-		uint32_t wrr_vc5:8;</div><div class='del'>-		uint32_t wrr_vc4:8;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg465_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg465_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg465_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg465_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg466 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg466_s {</div><div class='del'>-		uint32_t rx_queue_order:1;</div><div class='del'>-		uint32_t type_ordering:1;</div><div class='del'>-		uint32_t reserved_24_29:6;</div><div class='del'>-		uint32_t queue_mode:3;</div><div class='del'>-		uint32_t reserved_20_20:1;</div><div class='del'>-		uint32_t header_credits:8;</div><div class='del'>-		uint32_t data_credits:12;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg466_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg466_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg466_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg466_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg467 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg467_s {</div><div class='del'>-		uint32_t reserved_24_31:8;</div><div class='del'>-		uint32_t queue_mode:3;</div><div class='del'>-		uint32_t reserved_20_20:1;</div><div class='del'>-		uint32_t header_credits:8;</div><div class='del'>-		uint32_t data_credits:12;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg467_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg467_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg467_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg467_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg468 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg468_s {</div><div class='del'>-		uint32_t reserved_24_31:8;</div><div class='del'>-		uint32_t queue_mode:3;</div><div class='del'>-		uint32_t reserved_20_20:1;</div><div class='del'>-		uint32_t header_credits:8;</div><div class='del'>-		uint32_t data_credits:12;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg468_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg468_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg468_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg468_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg490 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg490_s {</div><div class='del'>-		uint32_t reserved_26_31:6;</div><div class='del'>-		uint32_t header_depth:10;</div><div class='del'>-		uint32_t reserved_14_15:2;</div><div class='del'>-		uint32_t data_depth:14;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg490_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg490_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg490_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg490_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg491 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg491_s {</div><div class='del'>-		uint32_t reserved_26_31:6;</div><div class='del'>-		uint32_t header_depth:10;</div><div class='del'>-		uint32_t reserved_14_15:2;</div><div class='del'>-		uint32_t data_depth:14;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg491_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg491_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg491_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg491_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg492 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg492_s {</div><div class='del'>-		uint32_t reserved_26_31:6;</div><div class='del'>-		uint32_t header_depth:10;</div><div class='del'>-		uint32_t reserved_14_15:2;</div><div class='del'>-		uint32_t data_depth:14;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg492_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg492_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg492_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg492_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg516 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg516_s {</div><div class='del'>-		uint32_t phy_stat:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg516_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg516_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg516_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg516_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union cvmx_pcieep_cfg517 {</div><div class='del'>-	uint32_t u32;</div><div class='del'>-	struct cvmx_pcieep_cfg517_s {</div><div class='del'>-		uint32_t phy_ctrl:32;</div><div class='del'>-	} s;</div><div class='del'>-	struct cvmx_pcieep_cfg517_s cn52xx;</div><div class='del'>-	struct cvmx_pcieep_cfg517_s cn52xxp1;</div><div class='del'>-	struct cvmx_pcieep_cfg517_s cn56xx;</div><div class='del'>-	struct cvmx_pcieep_cfg517_s cn56xxp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h<br/>index fcd4060f6421..90bf3b3fce19 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/pci.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/pci.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/pci.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/pci.h</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Each pci channel is a top-level PCI bus seem by CPU.  A machine  with</div><div class='hunk'>@@ -26,6 +27,7 @@</div><div class='ctx'> struct pci_controller {</div><div class='ctx'> 	struct pci_controller *next;</div><div class='ctx'> 	struct pci_bus *bus;</div><div class='add'>+	struct device_node *of_node;</div><div class='ctx'> </div><div class='ctx'> 	struct pci_ops *pci_ops;</div><div class='ctx'> 	struct resource *mem_resource;</div><div class='hunk'>@@ -142,4 +144,8 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)</div><div class='ctx'> </div><div class='ctx'> extern char * (*pcibios_plat_setup)(char *str);</div><div class='ctx'> </div><div class='add'>+/* this function parses memory ranges from a device node */</div><div class='add'>+extern void __devinit pci_load_of_ranges(struct pci_controller *hose,</div><div class='add'>+					 struct device_node *node);</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_PCI_H */</div><div class='head'>diff --git a/arch/mips/include/asm/posix_types.h b/arch/mips/include/asm/posix_types.h<br/>index e0308dcca135..fa03ec3fbf89 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/posix_types.h</a></div><div class='hunk'>@@ -17,11 +17,6 @@</div><div class='ctx'>  * assume GCC is being used.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#if (_MIPS_SZLONG == 64)</div><div class='del'>-typedef unsigned int	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> typedef long		__kernel_daddr_t;</div><div class='ctx'> #define __kernel_daddr_t __kernel_daddr_t</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h<br/>index 20e9dcf42b27..5e33fabe354d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/processor.h</a></div><div class='hunk'>@@ -310,9 +310,6 @@ struct task_struct;</div><div class='ctx'> /* Free all resources held by a thread. */</div><div class='ctx'> #define release_thread(thread) do { } while(0)</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);</div><div class='ctx'> </div><div class='ctx'> extern unsigned long thread_saved_pc(struct task_struct *tsk);</div><div class='head'>diff --git a/arch/mips/include/asm/prom.h b/arch/mips/include/asm/prom.h<br/>index 7a6e82ef449b..7206d445bab8 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/prom.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/prom.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/prom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/prom.h</a></div><div class='hunk'>@@ -12,6 +12,9 @@</div><div class='ctx'> #define __ASM_PROM_H</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OF</div><div class='add'>+#include &lt;linux/bug.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern int early_init_dt_scan_memory_arch(unsigned long node,</div><div class='hunk'>@@ -21,6 +24,29 @@ extern int reserve_mem_mach(unsigned long addr, unsigned long size);</div><div class='ctx'> extern void free_mem_mach(unsigned long addr, unsigned long size);</div><div class='ctx'> </div><div class='ctx'> extern void device_tree_init(void);</div><div class='add'>+</div><div class='add'>+static inline unsigned long pci_address_to_pio(phys_addr_t address)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * The ioport address can be directly used by inX() / outX()</div><div class='add'>+	 */</div><div class='add'>+	BUG_ON(address &gt; IO_SPACE_LIMIT);</div><div class='add'>+</div><div class='add'>+	return (unsigned long) address;</div><div class='add'>+}</div><div class='add'>+#define pci_address_to_pio pci_address_to_pio</div><div class='add'>+</div><div class='add'>+struct boot_param_header;</div><div class='add'>+</div><div class='add'>+extern void __dt_setup_arch(struct boot_param_header *bph);</div><div class='add'>+</div><div class='add'>+#define dt_setup_arch(sym)						\</div><div class='add'>+({									\</div><div class='add'>+	extern struct boot_param_header __dtb_##sym##_begin;		\</div><div class='add'>+									\</div><div class='add'>+	__dt_setup_arch(&amp;__dtb_##sym##_begin);				\</div><div class='add'>+})</div><div class='add'>+</div><div class='ctx'> #else /* CONFIG_OF */</div><div class='ctx'> static inline void device_tree_init(void) { }</div><div class='ctx'> #endif /* CONFIG_OF */</div><div class='head'>diff --git a/arch/mips/include/asm/setup.h b/arch/mips/include/asm/setup.h<br/>index 6dce6d8d09ab..2560b6b6a7d8 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/setup.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/setup.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/setup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/setup.h</a></div><div class='hunk'>@@ -14,7 +14,8 @@ extern void *set_vi_handler(int n, vi_handler_t addr);</div><div class='ctx'> </div><div class='ctx'> extern void *set_except_vector(int n, void *addr);</div><div class='ctx'> extern unsigned long ebase;</div><div class='del'>-extern void per_cpu_trap_init(void);</div><div class='add'>+extern void per_cpu_trap_init(bool);</div><div class='add'>+extern void cpu_cache_init(void);</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/sparsemem.h b/arch/mips/include/asm/sparsemem.h<br/>index 7165333ad043..4461198361c9 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/sparsemem.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/sparsemem.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/sparsemem.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/sparsemem.h</a></div><div class='hunk'>@@ -6,7 +6,11 @@</div><div class='ctx'>  * SECTION_SIZE_BITS		2^N: how big each section will be</div><div class='ctx'>  * MAX_PHYSMEM_BITS		2^N: how much memory we can have in that space</div><div class='ctx'>  */</div><div class='del'>-#define SECTION_SIZE_BITS       28</div><div class='add'>+#if defined(CONFIG_HUGETLB_PAGE) &amp;&amp; defined(CONFIG_PAGE_SIZE_64KB)</div><div class='add'>+# define SECTION_SIZE_BITS	29</div><div class='add'>+#else</div><div class='add'>+# define SECTION_SIZE_BITS	28</div><div class='add'>+#endif</div><div class='ctx'> #define MAX_PHYSMEM_BITS        35</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_SPARSEMEM */</div><div class='head'>diff --git a/arch/mips/include/asm/stat.h b/arch/mips/include/asm/stat.h<br/>index 6e00f751ab6d..fe9a4c3ec5a1 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/stat.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/stat.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/stat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/stat.h</a></div><div class='hunk'>@@ -20,7 +20,7 @@ struct stat {</div><div class='ctx'> 	long		st_pad1[3];		/* Reserved for network id */</div><div class='ctx'> 	ino_t		st_ino;</div><div class='ctx'> 	mode_t		st_mode;</div><div class='del'>-	nlink_t		st_nlink;</div><div class='add'>+	__u32		st_nlink;</div><div class='ctx'> 	uid_t		st_uid;</div><div class='ctx'> 	gid_t		st_gid;</div><div class='ctx'> 	unsigned 	st_rdev;</div><div class='hunk'>@@ -55,7 +55,7 @@ struct stat64 {</div><div class='ctx'> 	unsigned long long	st_ino;</div><div class='ctx'> </div><div class='ctx'> 	mode_t		st_mode;</div><div class='del'>-	nlink_t		st_nlink;</div><div class='add'>+	__u32		st_nlink;</div><div class='ctx'> </div><div class='ctx'> 	uid_t		st_uid;</div><div class='ctx'> 	gid_t		st_gid;</div><div class='hunk'>@@ -96,7 +96,7 @@ struct stat {</div><div class='ctx'> 	unsigned long		st_ino;</div><div class='ctx'> </div><div class='ctx'> 	mode_t			st_mode;</div><div class='del'>-	nlink_t			st_nlink;</div><div class='add'>+	__u32			st_nlink;</div><div class='ctx'> </div><div class='ctx'> 	uid_t			st_uid;</div><div class='ctx'> 	gid_t			st_gid;</div><div class='head'>diff --git a/arch/mips/include/asm/termios.h b/arch/mips/include/asm/termios.h<br/>index 8f77f774a2a0..abdd87aaf609 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/termios.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/termios.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/termios.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/termios.h</a></div><div class='hunk'>@@ -60,7 +60,7 @@ struct termio {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  *	intr=^C		quit=^\		erase=del	kill=^U</div><div class='head'>diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h<br/>index 0d85d8e440c5..e2eca7d10598 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/thread_info.h</a></div><div class='hunk'>@@ -85,18 +85,6 @@ register struct thread_info *__current_thread_info __asm__("$28");</div><div class='ctx'> </div><div class='ctx'> #define STACK_WARN	(THREAD_SIZE / 8)</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-#define alloc_thread_info_node(tsk, node) \</div><div class='del'>-		kzalloc_node(THREAD_SIZE, GFP_KERNEL, node)</div><div class='del'>-#else</div><div class='del'>-#define alloc_thread_info_node(tsk, node) \</div><div class='del'>-		kmalloc_node(THREAD_SIZE, GFP_KERNEL, node)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define free_thread_info(info) kfree(info)</div><div class='del'>-</div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #define PREEMPT_ACTIVE		0x10000000</div><div class='head'>diff --git a/arch/mips/include/asm/traps.h b/arch/mips/include/asm/traps.h<br/>index ff74aec3561a..420ca06b2f42 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/traps.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/traps.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/traps.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/traps.h</a></div><div class='hunk'>@@ -25,6 +25,7 @@ extern void (*board_nmi_handler_setup)(void);</div><div class='ctx'> extern void (*board_ejtag_handler_setup)(void);</div><div class='ctx'> extern void (*board_bind_eic_interrupt)(int irq, int regset);</div><div class='ctx'> extern void (*board_ebase_setup)(void);</div><div class='add'>+extern void (*board_cache_error_setup)(void);</div><div class='ctx'> </div><div class='ctx'> extern int register_nmi_notifier(struct notifier_block *nb);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h<br/>index 504d40aedfae..440a21dab575 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/include/asm/uasm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/include/asm/uasm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/include/asm/uasm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/include/asm/uasm.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_EXPORT_UASM</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #define __uasminit</div><div class='ctx'> #define __uasminitdata</div><div class='ctx'> #define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym)</div><div class='head'>diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile<br/>index a9dff3321251..e44abea9c209 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/jz4740/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/jz4740/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/jz4740/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/jz4740/Makefile</a></div><div class='hunk'>@@ -16,5 +16,3 @@ obj-$(CONFIG_JZ4740_QI_LB60)	+= board-qi_lb60.o</div><div class='ctx'> # PM support</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PM) += pm.o</div><div class='del'>-</div><div class='del'>-ccflags-y := -Werror -Wall</div><div class='head'>diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile<br/>index 0c6877ea9004..fdaf65e1a99d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Makefile for the Linux/MIPS kernel.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y		:= head.o init_task.o vmlinux.lds</div><div class='add'>+extra-y		:= head.o vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y		+= cpu-probe.o branch.o entry.o genex.o irq.o process.o \</div><div class='ctx'> 		   ptrace.o reset.o setup.o signal.o syscall.o \</div><div class='head'>diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c<br/>index 5099201fb7bc..6ae7ce4ac63e 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/cpu-probe.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/cpu-probe.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/cpu-probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/cpu-probe.c</a></div><div class='hunk'>@@ -340,7 +340,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "R2000";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_I;</div><div class='ctx'> 		c-&gt;options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |</div><div class='del'>-		             MIPS_CPU_NOFPUEX;</div><div class='add'>+			     MIPS_CPU_NOFPUEX;</div><div class='ctx'> 		if (__cpu_has_fpu())</div><div class='ctx'> 			c-&gt;options |= MIPS_CPU_FPU;</div><div class='ctx'> 		c-&gt;tlbsize = 64;</div><div class='hunk'>@@ -361,7 +361,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		}</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_I;</div><div class='ctx'> 		c-&gt;options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE |</div><div class='del'>-		             MIPS_CPU_NOFPUEX;</div><div class='add'>+			     MIPS_CPU_NOFPUEX;</div><div class='ctx'> 		if (__cpu_has_fpu())</div><div class='ctx'> 			c-&gt;options |= MIPS_CPU_FPU;</div><div class='ctx'> 		c-&gt;tlbsize = 64;</div><div class='hunk'>@@ -387,8 +387,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> </div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_III;</div><div class='ctx'> 		c-&gt;options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='del'>-		             MIPS_CPU_WATCH | MIPS_CPU_VCE |</div><div class='del'>-		             MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_WATCH | MIPS_CPU_VCE |</div><div class='add'>+			     MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 48;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_VR41XX:</div><div class='hunk'>@@ -434,7 +434,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "R4300";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_III;</div><div class='ctx'> 		c-&gt;options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='del'>-		             MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 32;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_R4600:</div><div class='hunk'>@@ -446,7 +446,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		c-&gt;tlbsize = 48;</div><div class='ctx'> 		break;</div><div class='ctx'> 	#if 0</div><div class='del'>- 	case PRID_IMP_R4650:</div><div class='add'>+	case PRID_IMP_R4650:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * This processor doesn't have an MMU, so it's not</div><div class='ctx'> 		 * "real easy" to run Linux on it. It is left purely</div><div class='hunk'>@@ -455,9 +455,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		 */</div><div class='ctx'> 		c-&gt;cputype = CPU_R4650;</div><div class='ctx'> 		__cpu_name[cpu] = "R4650";</div><div class='del'>-	 	c-&gt;isa_level = MIPS_CPU_ISA_III;</div><div class='add'>+		c-&gt;isa_level = MIPS_CPU_ISA_III;</div><div class='ctx'> 		c-&gt;options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC;</div><div class='del'>-	        c-&gt;tlbsize = 48;</div><div class='add'>+		c-&gt;tlbsize = 48;</div><div class='ctx'> 		break;</div><div class='ctx'> 	#endif</div><div class='ctx'> 	case PRID_IMP_TX39:</div><div class='hunk'>@@ -488,7 +488,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "R4700";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_III;</div><div class='ctx'> 		c-&gt;options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='del'>-		             MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 48;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_TX49:</div><div class='hunk'>@@ -505,7 +505,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "R5000";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_IV;</div><div class='ctx'> 		c-&gt;options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='del'>-		             MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 48;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_R5432:</div><div class='hunk'>@@ -513,7 +513,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "R5432";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_IV;</div><div class='ctx'> 		c-&gt;options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='del'>-		             MIPS_CPU_WATCH | MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_WATCH | MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 48;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_R5500:</div><div class='hunk'>@@ -521,7 +521,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "R5500";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_IV;</div><div class='ctx'> 		c-&gt;options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='del'>-		             MIPS_CPU_WATCH | MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_WATCH | MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 48;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_NEVADA:</div><div class='hunk'>@@ -529,7 +529,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "Nevada";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_IV;</div><div class='ctx'> 		c-&gt;options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='del'>-		             MIPS_CPU_DIVEC | MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_DIVEC | MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 48;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_R6000:</div><div class='hunk'>@@ -537,7 +537,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "R6000";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_II;</div><div class='ctx'> 		c-&gt;options = MIPS_CPU_TLB | MIPS_CPU_FPU |</div><div class='del'>-		             MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 32;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_R6000A:</div><div class='hunk'>@@ -545,7 +545,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "R6000A";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_II;</div><div class='ctx'> 		c-&gt;options = MIPS_CPU_TLB | MIPS_CPU_FPU |</div><div class='del'>-		             MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 32;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_RM7000:</div><div class='hunk'>@@ -553,7 +553,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "RM7000";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_IV;</div><div class='ctx'> 		c-&gt;options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='del'>-		             MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_LLSC;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Undocumented RM7000:  Bit 29 in the info register of</div><div class='ctx'> 		 * the RM7000 v2.0 indicates if the TLB has 48 or 64</div><div class='hunk'>@@ -569,7 +569,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "RM9000";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_IV;</div><div class='ctx'> 		c-&gt;options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='del'>-		             MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_LLSC;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Bit 29 in the info register of the RM9000</div><div class='ctx'> 		 * indicates if the TLB has 48 or 64 entries.</div><div class='hunk'>@@ -584,8 +584,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "RM8000";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_IV;</div><div class='ctx'> 		c-&gt;options = MIPS_CPU_TLB | MIPS_CPU_4KEX |</div><div class='del'>-		             MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='del'>-		             MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='add'>+			     MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 384;      /* has weird TLB: 3-way x 128 */</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_R10000:</div><div class='hunk'>@@ -593,9 +593,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "R10000";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_IV;</div><div class='ctx'> 		c-&gt;options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |</div><div class='del'>-		             MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='add'>+			     MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='ctx'> 			     MIPS_CPU_COUNTER | MIPS_CPU_WATCH |</div><div class='del'>-		             MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 64;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_R12000:</div><div class='hunk'>@@ -603,9 +603,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "R12000";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_IV;</div><div class='ctx'> 		c-&gt;options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |</div><div class='del'>-		             MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='add'>+			     MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='ctx'> 			     MIPS_CPU_COUNTER | MIPS_CPU_WATCH |</div><div class='del'>-		             MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 64;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_R14000:</div><div class='hunk'>@@ -613,9 +613,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)</div><div class='ctx'> 		__cpu_name[cpu] = "R14000";</div><div class='ctx'> 		c-&gt;isa_level = MIPS_CPU_ISA_IV;</div><div class='ctx'> 		c-&gt;options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |</div><div class='del'>-		             MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='add'>+			     MIPS_CPU_FPU | MIPS_CPU_32FPR |</div><div class='ctx'> 			     MIPS_CPU_COUNTER | MIPS_CPU_WATCH |</div><div class='del'>-		             MIPS_CPU_LLSC;</div><div class='add'>+			     MIPS_CPU_LLSC;</div><div class='ctx'> 		c-&gt;tlbsize = 64;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PRID_IMP_LOONGSON2:</div><div class='hunk'>@@ -739,7 +739,7 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)</div><div class='ctx'> 	if (config3 &amp; MIPS_CONF3_VEIC)</div><div class='ctx'> 		c-&gt;options |= MIPS_CPU_VEIC;</div><div class='ctx'> 	if (config3 &amp; MIPS_CONF3_MT)</div><div class='del'>-	        c-&gt;ases |= MIPS_ASE_MIPSMT;</div><div class='add'>+		c-&gt;ases |= MIPS_ASE_MIPSMT;</div><div class='ctx'> 	if (config3 &amp; MIPS_CONF3_ULRI)</div><div class='ctx'> 		c-&gt;options |= MIPS_CPU_ULRI;</div><div class='ctx'> </div><div class='hunk'>@@ -767,7 +767,7 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c)</div><div class='ctx'> </div><div class='ctx'> 	/* MIPS32 or MIPS64 compliant CPU.  */</div><div class='ctx'> 	c-&gt;options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER |</div><div class='del'>-	             MIPS_CPU_DIVEC | MIPS_CPU_LLSC | MIPS_CPU_MCHECK;</div><div class='add'>+		     MIPS_CPU_DIVEC | MIPS_CPU_LLSC | MIPS_CPU_MCHECK;</div><div class='ctx'> </div><div class='ctx'> 	c-&gt;scache.flags = MIPS_CACHE_NOT_PRESENT;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/kernel/init_task.c b/arch/mips/kernel/init_task.c<br/>deleted file mode 100644<br/>index 5f9a76263c9a..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/thread_info.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is 8192-byte aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by making sure</div><div class='del'>- * the linker maps this in the .text segment right after head.S,</div><div class='del'>- * and making head.S ensure the proper alignment.</div><div class='del'>- *</div><div class='del'>- * The things we do for performance..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data</div><div class='del'>-	__attribute__((__aligned__(THREAD_SIZE))) =</div><div class='del'>-		{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c<br/>index 7f3376b1c219..6ded9bd1489c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/mips-mt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/mips-mt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/mips-mt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/mips-mt.c</a></div><div class='hunk'>@@ -209,7 +209,7 @@ void mips_mt_set_cpuoptions(void)</div><div class='ctx'> 	unsigned int nconfig7 = oconfig7;</div><div class='ctx'> </div><div class='ctx'> 	if (mt_opt_norps) {</div><div class='del'>-		printk("\"norps\" option deprectated: use \"rpsctl=\"\n");</div><div class='add'>+		printk("\"norps\" option deprecated: use \"rpsctl=\"\n");</div><div class='ctx'> 	}</div><div class='ctx'> 	if (mt_opt_rpsctl &gt;= 0) {</div><div class='ctx'> 		printk("34K return prediction stack override set to %d.\n",</div><div class='head'>diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c<br/>index 811084f4e422..f29099b104c4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/perf_event_mipsxx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/perf_event_mipsxx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/perf_event_mipsxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/perf_event_mipsxx.c</a></div><div class='hunk'>@@ -1325,7 +1325,7 @@ static int mipsxx_pmu_handle_shared_irq(void)</div><div class='ctx'> </div><div class='ctx'> 	regs = get_irq_regs();</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0);</div><div class='add'>+	perf_sample_data_init(&amp;data, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	switch (counters) {</div><div class='ctx'> #define HANDLE_COUNTER(n)						\</div><div class='hunk'>@@ -1532,7 +1532,8 @@ init_hw_perf_events(void)</div><div class='ctx'> 		irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;</div><div class='ctx'> 	} else {</div><div class='ctx'> #endif</div><div class='del'>-		if (cp0_perfcount_irq &gt;= 0)</div><div class='add'>+		if ((cp0_perfcount_irq &gt;= 0) &amp;&amp;</div><div class='add'>+				(cp0_compare_irq != cp0_perfcount_irq))</div><div class='ctx'> 			irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;</div><div class='ctx'> 		else</div><div class='ctx'> 			irq = -1;</div><div class='head'>diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c<br/>index f8b2c592514d..5542817c1b49 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/proc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/proc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/proc.c</a></div><div class='hunk'>@@ -41,27 +41,27 @@ static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "processor\t\t: %ld\n", n);</div><div class='ctx'> 	sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",</div><div class='del'>-	        cpu_data[n].options &amp; MIPS_CPU_FPU ? "  FPU V%d.%d" : "");</div><div class='add'>+		      cpu_data[n].options &amp; MIPS_CPU_FPU ? "  FPU V%d.%d" : "");</div><div class='ctx'> 	seq_printf(m, fmt, __cpu_name[n],</div><div class='del'>-	                           (version &gt;&gt; 4) &amp; 0x0f, version &amp; 0x0f,</div><div class='del'>-	                           (fp_vers &gt;&gt; 4) &amp; 0x0f, fp_vers &amp; 0x0f);</div><div class='add'>+		      (version &gt;&gt; 4) &amp; 0x0f, version &amp; 0x0f,</div><div class='add'>+		      (fp_vers &gt;&gt; 4) &amp; 0x0f, fp_vers &amp; 0x0f);</div><div class='ctx'> 	seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",</div><div class='del'>-	              cpu_data[n].udelay_val / (500000/HZ),</div><div class='del'>-	              (cpu_data[n].udelay_val / (5000/HZ)) % 100);</div><div class='add'>+		      cpu_data[n].udelay_val / (500000/HZ),</div><div class='add'>+		      (cpu_data[n].udelay_val / (5000/HZ)) % 100);</div><div class='ctx'> 	seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");</div><div class='ctx'> 	seq_printf(m, "microsecond timers\t: %s\n",</div><div class='del'>-	              cpu_has_counter ? "yes" : "no");</div><div class='add'>+		      cpu_has_counter ? "yes" : "no");</div><div class='ctx'> 	seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);</div><div class='ctx'> 	seq_printf(m, "extra interrupt vector\t: %s\n",</div><div class='del'>-	              cpu_has_divec ? "yes" : "no");</div><div class='add'>+		      cpu_has_divec ? "yes" : "no");</div><div class='ctx'> 	seq_printf(m, "hardware watchpoint\t: %s",</div><div class='del'>-		   cpu_has_watch ? "yes, " : "no\n");</div><div class='add'>+		      cpu_has_watch ? "yes, " : "no\n");</div><div class='ctx'> 	if (cpu_has_watch) {</div><div class='ctx'> 		seq_printf(m, "count: %d, address/irw mask: [",</div><div class='del'>-			   cpu_data[n].watch_reg_count);</div><div class='add'>+		      cpu_data[n].watch_reg_count);</div><div class='ctx'> 		for (i = 0; i &lt; cpu_data[n].watch_reg_count; i++)</div><div class='ctx'> 			seq_printf(m, "%s0x%04x", i ? ", " : "" ,</div><div class='del'>-				   cpu_data[n].watch_reg_masks[i]);</div><div class='add'>+				cpu_data[n].watch_reg_masks[i]);</div><div class='ctx'> 		seq_printf(m, "]\n");</div><div class='ctx'> 	}</div><div class='ctx'> 	seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",</div><div class='hunk'>@@ -73,13 +73,13 @@ static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> 		      cpu_has_mipsmt ? " mt" : ""</div><div class='ctx'> 		);</div><div class='ctx'> 	seq_printf(m, "shadow register sets\t: %d\n",</div><div class='del'>-		       cpu_data[n].srsets);</div><div class='add'>+		      cpu_data[n].srsets);</div><div class='ctx'> 	seq_printf(m, "kscratch registers\t: %d\n",</div><div class='del'>-		   hweight8(cpu_data[n].kscratch_mask));</div><div class='add'>+		      hweight8(cpu_data[n].kscratch_mask));</div><div class='ctx'> 	seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);</div><div class='ctx'> </div><div class='ctx'> 	sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",</div><div class='del'>-	        cpu_has_vce ? "%u" : "not available");</div><div class='add'>+		      cpu_has_vce ? "%u" : "not available");</div><div class='ctx'> 	seq_printf(m, fmt, 'D', vced_count);</div><div class='ctx'> 	seq_printf(m, fmt, 'I', vcei_count);</div><div class='ctx'> 	seq_printf(m, "\n");</div><div class='head'>diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c<br/>index 558b5395795d..f11b2bbb826d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/prom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/prom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/prom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/prom.c</a></div><div class='hunk'>@@ -95,3 +95,16 @@ void __init device_tree_init(void)</div><div class='ctx'> 	/* free the space reserved for the dt blob */</div><div class='ctx'> 	free_mem_mach(base, size);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __init __dt_setup_arch(struct boot_param_header *bph)</div><div class='add'>+{</div><div class='add'>+	if (be32_to_cpu(bph-&gt;magic) != OF_DT_HEADER) {</div><div class='add'>+		pr_err("DTB has bad magic, ignoring builtin OF DTB\n");</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	initial_boot_params = bph;</div><div class='add'>+</div><div class='add'>+	early_init_devtree(initial_boot_params);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c<br/>index c504b212f8f3..a53f8ec37aac 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/setup.c</a></div><div class='hunk'>@@ -605,6 +605,8 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> </div><div class='ctx'> 	resource_init();</div><div class='ctx'> 	plat_smp_setup();</div><div class='add'>+</div><div class='add'>+	cpu_cache_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> unsigned long kernelsp[NR_CPUS];</div><div class='head'>diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h<br/>index 10263b405981..9c60d09e62a7 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/signal-common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/signal-common.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/signal-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/signal-common.h</a></div><div class='hunk'>@@ -19,8 +19,6 @@</div><div class='ctx'> #  define DEBUGP(fmt, args...)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Determine which stack to use..</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c<br/>index 185ca00c4c84..f2c09cfc60ac 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/signal.c</a></div><div class='hunk'>@@ -255,18 +255,7 @@ asmlinkage int sys_sigsuspend(nabi_no_regargs struct pt_regs regs)</div><div class='ctx'> 	uset = (sigset_t __user *) regs.regs[4];</div><div class='ctx'> 	if (copy_from_user(&amp;newset, uset, sizeof(sigset_t)))</div><div class='ctx'> 		return -EFAULT;</div><div class='del'>-	sigdelsetmask(&amp;newset, ~_BLOCKABLE);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-	current-&gt;blocked = newset;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;newset);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -284,18 +273,7 @@ asmlinkage int sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)</div><div class='ctx'> 	unewset = (sigset_t __user *) regs.regs[4];</div><div class='ctx'> 	if (copy_from_user(&amp;newset, unewset, sizeof(newset)))</div><div class='ctx'> 		return -EFAULT;</div><div class='del'>-	sigdelsetmask(&amp;newset, ~_BLOCKABLE);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-	current-&gt;blocked = newset;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;newset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_TRAD_SIGNALS</div><div class='hunk'>@@ -361,11 +339,7 @@ asmlinkage void sys_sigreturn(nabi_no_regargs struct pt_regs regs)</div><div class='ctx'> 	if (__copy_from_user(&amp;blocked, &amp;frame-&gt;sf_mask, sizeof(blocked)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;blocked, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = blocked;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;blocked);</div><div class='ctx'> </div><div class='ctx'> 	sig = restore_sigcontext(&amp;regs, &amp;frame-&gt;sf_sc);</div><div class='ctx'> 	if (sig &lt; 0)</div><div class='hunk'>@@ -400,11 +374,7 @@ asmlinkage void sys_rt_sigreturn(nabi_no_regargs struct pt_regs regs)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;rs_uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	sig = restore_sigcontext(&amp;regs, &amp;frame-&gt;rs_uc.uc_mcontext);</div><div class='ctx'> 	if (sig &lt; 0)</div><div class='hunk'>@@ -542,9 +512,10 @@ struct mips_abi mips_abi = {</div><div class='ctx'> 	.restart	= __NR_restart_syscall</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int handle_signal(unsigned long sig, siginfo_t *info,</div><div class='del'>-	struct k_sigaction *ka, sigset_t *oldset, struct pt_regs *regs)</div><div class='add'>+static void handle_signal(unsigned long sig, siginfo_t *info,</div><div class='add'>+	struct k_sigaction *ka, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct mips_abi *abi = current-&gt;thread.abi;</div><div class='ctx'> 	void *vdso = current-&gt;mm-&gt;context.vdso;</div><div class='hunk'>@@ -578,22 +549,14 @@ static int handle_signal(unsigned long sig, siginfo_t *info,</div><div class='ctx'> 				       ka, regs, sig, oldset);</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	sigorsets(&amp;current-&gt;blocked, &amp;current-&gt;blocked, &amp;ka-&gt;sa.sa_mask);</div><div class='del'>-	if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-		sigaddset(&amp;current-&gt;blocked, sig);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void do_signal(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> </div><div class='hunk'>@@ -605,25 +568,10 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  */</div><div class='del'>-		if (handle_signal(signr, &amp;info, &amp;ka, oldset, regs) == 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * A signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag.</div><div class='del'>-			 */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		handle_signal(signr, &amp;info, &amp;ka, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -647,10 +595,7 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	 * If there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back</div><div class='ctx'> 	 */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -663,14 +608,12 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, void *unused,</div><div class='ctx'> 	local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	/* deal with pending signal delivery */</div><div class='del'>-	if (thread_info_flags &amp; (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))</div><div class='add'>+	if (thread_info_flags &amp; _TIF_SIGPENDING)</div><div class='ctx'> 		do_signal(regs);</div><div class='ctx'> </div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c<br/>index 06b5da392e24..da1b56a39ac7 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/signal32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/signal32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/signal32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/signal32.c</a></div><div class='hunk'>@@ -288,18 +288,7 @@ asmlinkage int sys32_sigsuspend(nabi_no_regargs struct pt_regs regs)</div><div class='ctx'> 	uset = (compat_sigset_t __user *) regs.regs[4];</div><div class='ctx'> 	if (get_sigset(&amp;newset, uset))</div><div class='ctx'> 		return -EFAULT;</div><div class='del'>-	sigdelsetmask(&amp;newset, ~_BLOCKABLE);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-	current-&gt;blocked = newset;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;newset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage int sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)</div><div class='hunk'>@@ -316,18 +305,7 @@ asmlinkage int sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)</div><div class='ctx'> 	uset = (compat_sigset_t __user *) regs.regs[4];</div><div class='ctx'> 	if (get_sigset(&amp;newset, uset))</div><div class='ctx'> 		return -EFAULT;</div><div class='del'>-	sigdelsetmask(&amp;newset, ~_BLOCKABLE);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-	current-&gt;blocked = newset;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;newset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> SYSCALL_DEFINE3(32_sigaction, long, sig, const struct sigaction32 __user *, act,</div><div class='hunk'>@@ -487,11 +465,7 @@ asmlinkage void sys32_sigreturn(nabi_no_regargs struct pt_regs regs)</div><div class='ctx'> 	if (__copy_conv_sigset_from_user(&amp;blocked, &amp;frame-&gt;sf_mask))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;blocked, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = blocked;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;blocked);</div><div class='ctx'> </div><div class='ctx'> 	sig = restore_sigcontext32(&amp;regs, &amp;frame-&gt;sf_sc);</div><div class='ctx'> 	if (sig &lt; 0)</div><div class='hunk'>@@ -528,11 +502,7 @@ asmlinkage void sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)</div><div class='ctx'> 	if (__copy_conv_sigset_from_user(&amp;set, &amp;frame-&gt;rs_uc.uc_sigmask))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	sig = restore_sigcontext32(&amp;regs, &amp;frame-&gt;rs_uc.uc_mcontext);</div><div class='ctx'> 	if (sig &lt; 0)</div><div class='head'>diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c<br/>index ae29e894ab8d..3574c145511b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/signal_n32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/signal_n32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/signal_n32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/signal_n32.c</a></div><div class='hunk'>@@ -91,18 +91,7 @@ asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)</div><div class='ctx'> 	if (copy_from_user(&amp;uset, unewset, sizeof(uset)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	sigset_from_compat(&amp;newset, &amp;uset);</div><div class='del'>-	sigdelsetmask(&amp;newset, ~_BLOCKABLE);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-	current-&gt;blocked = newset;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;newset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void sysn32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)</div><div class='hunk'>@@ -120,11 +109,7 @@ asmlinkage void sysn32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)</div><div class='ctx'> 	if (__copy_conv_sigset_from_user(&amp;set, &amp;frame-&gt;rs_uc.uc_sigmask))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	sig = restore_sigcontext(&amp;regs, &amp;frame-&gt;rs_uc.uc_mcontext);</div><div class='ctx'> 	if (sig &lt; 0)</div><div class='head'>diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c<br/>index ba9376bf52a1..48650c818040 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/smp.c</a></div><div class='hunk'>@@ -106,7 +106,7 @@ asmlinkage __cpuinit void start_secondary(void)</div><div class='ctx'> #endif /* CONFIG_MIPS_MT_SMTC */</div><div class='ctx'> 	cpu_probe();</div><div class='ctx'> 	cpu_report();</div><div class='del'>-	per_cpu_trap_init();</div><div class='add'>+	per_cpu_trap_init(false);</div><div class='ctx'> 	mips_clockevent_init();</div><div class='ctx'> 	mp_ops-&gt;init_secondary();</div><div class='ctx'> </div><div class='hunk'>@@ -186,61 +186,9 @@ void __devinit smp_prepare_boot_cpu(void)</div><div class='ctx'> 	cpu_set(0, cpu_callin_map);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Called once for each "cpu_possible(cpu)".  Needs to spin up the cpu</div><div class='del'>- * and keep control until "cpu_online(cpu)" is set.  Note: cpu is</div><div class='del'>- * physical, not logical.</div><div class='del'>- */</div><div class='del'>-static struct task_struct *cpu_idle_thread[NR_CPUS];</div><div class='del'>-</div><div class='del'>-struct create_idle {</div><div class='del'>-	struct work_struct work;</div><div class='del'>-	struct task_struct *idle;</div><div class='del'>-	struct completion done;</div><div class='del'>-	int cpu;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __cpuinit do_fork_idle(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct create_idle *c_idle =</div><div class='del'>-		container_of(work, struct create_idle, work);</div><div class='del'>-</div><div class='del'>-	c_idle-&gt;idle = fork_idle(c_idle-&gt;cpu);</div><div class='del'>-	complete(&amp;c_idle-&gt;done);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='del'>-	struct task_struct *idle;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Processor goes to start_secondary(), sets online flag</div><div class='del'>-	 * The following code is purely to make sure</div><div class='del'>-	 * Linux can schedule processes on this slave.</div><div class='del'>-	 */</div><div class='del'>-	if (!cpu_idle_thread[cpu]) {</div><div class='del'>-		/*</div><div class='del'>-		 * Schedule work item to avoid forking user task</div><div class='del'>-		 * Ported from arch/x86/kernel/smpboot.c</div><div class='del'>-		 */</div><div class='del'>-		struct create_idle c_idle = {</div><div class='del'>-			.cpu    = cpu,</div><div class='del'>-			.done   = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		INIT_WORK_ONSTACK(&amp;c_idle.work, do_fork_idle);</div><div class='del'>-		schedule_work(&amp;c_idle.work);</div><div class='del'>-		wait_for_completion(&amp;c_idle.done);</div><div class='del'>-		idle = cpu_idle_thread[cpu] = c_idle.idle;</div><div class='del'>-</div><div class='del'>-		if (IS_ERR(idle))</div><div class='del'>-			panic(KERN_ERR "Fork failed for CPU %d", cpu);</div><div class='del'>-	} else {</div><div class='del'>-		idle = cpu_idle_thread[cpu];</div><div class='del'>-		init_idle(idle, cpu);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mp_ops-&gt;boot_secondary(cpu, idle);</div><div class='add'>+	mp_ops-&gt;boot_secondary(cpu, tidle);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Trust is futile.  We should really have timeouts ...</div><div class='head'>diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c<br/>index cfdaaa4cffc0..2d0c2a277f52 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/kernel/traps.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/kernel/traps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/kernel/traps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/kernel/traps.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='hunk'>@@ -91,7 +92,7 @@ void (*board_nmi_handler_setup)(void);</div><div class='ctx'> void (*board_ejtag_handler_setup)(void);</div><div class='ctx'> void (*board_bind_eic_interrupt)(int irq, int regset);</div><div class='ctx'> void (*board_ebase_setup)(void);</div><div class='del'>-</div><div class='add'>+void __cpuinitdata(*board_cache_error_setup)(void);</div><div class='ctx'> </div><div class='ctx'> static void show_raw_backtrace(unsigned long reg29)</div><div class='ctx'> {</div><div class='hunk'>@@ -1490,7 +1491,6 @@ void *set_vi_handler(int n, vi_handler_t addr)</div><div class='ctx'> 	return set_vi_srs_handler(n, addr, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern void cpu_cache_init(void);</div><div class='ctx'> extern void tlb_init(void);</div><div class='ctx'> extern void flush_tlb_handlers(void);</div><div class='ctx'> </div><div class='hunk'>@@ -1517,7 +1517,7 @@ static int __init ulri_disable(char *s)</div><div class='ctx'> }</div><div class='ctx'> __setup("noulri", ulri_disable);</div><div class='ctx'> </div><div class='del'>-void __cpuinit per_cpu_trap_init(void)</div><div class='add'>+void __cpuinit per_cpu_trap_init(bool is_boot_cpu)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cpu = smp_processor_id();</div><div class='ctx'> 	unsigned int status_set = ST0_CU0;</div><div class='hunk'>@@ -1616,7 +1616,9 @@ void __cpuinit per_cpu_trap_init(void)</div><div class='ctx'> #ifdef CONFIG_MIPS_MT_SMTC</div><div class='ctx'> 	if (bootTC) {</div><div class='ctx'> #endif /* CONFIG_MIPS_MT_SMTC */</div><div class='del'>-		cpu_cache_init();</div><div class='add'>+		/* Boot CPU's cache setup in setup_arch(). */</div><div class='add'>+		if (!is_boot_cpu)</div><div class='add'>+			cpu_cache_init();</div><div class='ctx'> 		tlb_init();</div><div class='ctx'> #ifdef CONFIG_MIPS_MT_SMTC</div><div class='ctx'> 	} else if (!secondaryTC) {</div><div class='hunk'>@@ -1632,7 +1634,7 @@ void __cpuinit per_cpu_trap_init(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Install CPU exception handler */</div><div class='del'>-void __init set_handler(unsigned long offset, void *addr, unsigned long size)</div><div class='add'>+void __cpuinit set_handler(unsigned long offset, void *addr, unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	memcpy((void *)(ebase + offset), addr, size);</div><div class='ctx'> 	local_flush_icache_range(ebase + offset, ebase + offset + size);</div><div class='hunk'>@@ -1693,7 +1695,7 @@ void __init trap_init(void)</div><div class='ctx'> </div><div class='ctx'> 	if (board_ebase_setup)</div><div class='ctx'> 		board_ebase_setup();</div><div class='del'>-	per_cpu_trap_init();</div><div class='add'>+	per_cpu_trap_init(true);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Copy the generic exception handlers to their final destination.</div><div class='hunk'>@@ -1797,6 +1799,9 @@ void __init trap_init(void)</div><div class='ctx'> </div><div class='ctx'> 	set_except_vector(26, handle_dsp);</div><div class='ctx'> </div><div class='add'>+	if (board_cache_error_setup)</div><div class='add'>+		board_cache_error_setup();</div><div class='add'>+</div><div class='ctx'> 	if (cpu_has_vce)</div><div class='ctx'> 		/* Special exception: R4[04]00 uses also the divec space. */</div><div class='ctx'> 		memcpy((void *)(ebase + 0x180), &amp;except_vec3_r4000, 0x100);</div><div class='head'>diff --git a/arch/mips/lantiq/Kconfig b/arch/mips/lantiq/Kconfig<br/>index 3fccf2104513..20bdf40b3efa 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/Kconfig</a></div><div class='hunk'>@@ -16,8 +16,22 @@ config SOC_XWAY</div><div class='ctx'> 	bool "XWAY"</div><div class='ctx'> 	select SOC_TYPE_XWAY</div><div class='ctx'> 	select HW_HAS_PCI</div><div class='add'>+</div><div class='add'>+config SOC_FALCON</div><div class='add'>+	bool "FALCON"</div><div class='add'>+</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='add'>+choice</div><div class='add'>+	prompt "Devicetree"</div><div class='add'>+</div><div class='add'>+config DT_EASY50712</div><div class='add'>+	bool "Easy50712"</div><div class='add'>+	depends on SOC_XWAY</div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='del'>-source "arch/mips/lantiq/xway/Kconfig"</div><div class='add'>+config PCI_LANTIQ</div><div class='add'>+	bool "PCI Support"</div><div class='add'>+	depends on SOC_XWAY &amp;&amp; PCI</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/mips/lantiq/Makefile b/arch/mips/lantiq/Makefile<br/>index e5dae0e24b00..d6bdc579419f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/Makefile</a></div><div class='hunk'>@@ -4,8 +4,11 @@</div><div class='ctx'> # under the terms of the GNU General Public License version 2 as published</div><div class='ctx'> # by the Free Software Foundation.</div><div class='ctx'> </div><div class='del'>-obj-y := irq.o setup.o clk.o prom.o devices.o</div><div class='add'>+obj-y := irq.o clk.o prom.o</div><div class='add'>+</div><div class='add'>+obj-y += dts/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_EARLY_PRINTK) += early_printk.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SOC_TYPE_XWAY) += xway/</div><div class='add'>+obj-$(CONFIG_SOC_FALCON) += falcon/</div><div class='head'>diff --git a/arch/mips/lantiq/Platform b/arch/mips/lantiq/Platform<br/>index f3dff05722de..b3ec49838fd7 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/Platform?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/Platform</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/Platform?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/Platform</a></div><div class='hunk'>@@ -6,3 +6,4 @@ platform-$(CONFIG_LANTIQ)	+= lantiq/</div><div class='ctx'> cflags-$(CONFIG_LANTIQ)		+= -I$(srctree)/arch/mips/include/asm/mach-lantiq</div><div class='ctx'> load-$(CONFIG_LANTIQ)		= 0xffffffff80002000</div><div class='ctx'> cflags-$(CONFIG_SOC_TYPE_XWAY)	+= -I$(srctree)/arch/mips/include/asm/mach-lantiq/xway</div><div class='add'>+cflags-$(CONFIG_SOC_FALCON)	+= -I$(srctree)/arch/mips/include/asm/mach-lantiq/falcon</div><div class='head'>diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c<br/>index 412814fdd3ee..d3bcc33f4699 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/clk.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/clk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/clk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/clk.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -22,44 +23,32 @@</div><div class='ctx'> #include &lt;lantiq_soc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "clk.h"</div><div class='add'>+#include "prom.h"</div><div class='ctx'> </div><div class='del'>-struct clk {</div><div class='del'>-	const char *name;</div><div class='del'>-	unsigned long rate;</div><div class='del'>-	unsigned long (*get_rate) (void);</div><div class='del'>-};</div><div class='add'>+/* lantiq socs have 3 static clocks */</div><div class='add'>+static struct clk cpu_clk_generic[3];</div><div class='ctx'> </div><div class='del'>-static struct clk *cpu_clk;</div><div class='del'>-static int cpu_clk_cnt;</div><div class='add'>+void clkdev_add_static(unsigned long cpu, unsigned long fpi, unsigned long io)</div><div class='add'>+{</div><div class='add'>+	cpu_clk_generic[0].rate = cpu;</div><div class='add'>+	cpu_clk_generic[1].rate = fpi;</div><div class='add'>+	cpu_clk_generic[2].rate = io;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-/* lantiq socs have 3 static clocks */</div><div class='del'>-static struct clk cpu_clk_generic[] = {</div><div class='del'>-	{</div><div class='del'>-		.name = "cpu",</div><div class='del'>-		.get_rate = ltq_get_cpu_hz,</div><div class='del'>-	}, {</div><div class='del'>-		.name = "fpi",</div><div class='del'>-		.get_rate = ltq_get_fpi_hz,</div><div class='del'>-	}, {</div><div class='del'>-		.name = "io",</div><div class='del'>-		.get_rate = ltq_get_io_region_clock,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ltq_cgu_resource = {</div><div class='del'>-	.name	= "cgu",</div><div class='del'>-	.start	= LTQ_CGU_BASE_ADDR,</div><div class='del'>-	.end	= LTQ_CGU_BASE_ADDR + LTQ_CGU_SIZE - 1,</div><div class='del'>-	.flags	= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* remapped clock register range */</div><div class='del'>-void __iomem *ltq_cgu_membase;</div><div class='del'>-</div><div class='del'>-void clk_init(void)</div><div class='add'>+struct clk *clk_get_cpu(void)</div><div class='add'>+{</div><div class='add'>+	return &amp;cpu_clk_generic[0];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct clk *clk_get_fpi(void)</div><div class='add'>+{</div><div class='add'>+	return &amp;cpu_clk_generic[1];</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(clk_get_fpi);</div><div class='add'>+</div><div class='add'>+struct clk *clk_get_io(void)</div><div class='ctx'> {</div><div class='del'>-	cpu_clk = cpu_clk_generic;</div><div class='del'>-	cpu_clk_cnt = ARRAY_SIZE(cpu_clk_generic);</div><div class='add'>+	return &amp;cpu_clk_generic[2];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int clk_good(struct clk *clk)</div><div class='hunk'>@@ -82,38 +71,71 @@ unsigned long clk_get_rate(struct clk *clk)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(clk_get_rate);</div><div class='ctx'> </div><div class='del'>-struct clk *clk_get(struct device *dev, const char *id)</div><div class='add'>+int clk_set_rate(struct clk *clk, unsigned long rate)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; cpu_clk_cnt; i++)</div><div class='del'>-		if (!strcmp(id, cpu_clk[i].name))</div><div class='del'>-			return &amp;cpu_clk[i];</div><div class='del'>-	BUG();</div><div class='del'>-	return ERR_PTR(-ENOENT);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(clk_get);</div><div class='del'>-</div><div class='del'>-void clk_put(struct clk *clk)</div><div class='del'>-{</div><div class='del'>-	/* not used */</div><div class='add'>+	if (unlikely(!clk_good(clk)))</div><div class='add'>+		return 0;</div><div class='add'>+	if (clk-&gt;rates &amp;&amp; *clk-&gt;rates) {</div><div class='add'>+		unsigned long *r = clk-&gt;rates;</div><div class='add'>+</div><div class='add'>+		while (*r &amp;&amp; (*r != rate))</div><div class='add'>+			r++;</div><div class='add'>+		if (!*r) {</div><div class='add'>+			pr_err("clk %s.%s: trying to set invalid rate %ld\n",</div><div class='add'>+				clk-&gt;cl.dev_id, clk-&gt;cl.con_id, rate);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	clk-&gt;rate = rate;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(clk_put);</div><div class='add'>+EXPORT_SYMBOL(clk_set_rate);</div><div class='ctx'> </div><div class='ctx'> int clk_enable(struct clk *clk)</div><div class='ctx'> {</div><div class='del'>-	/* not used */</div><div class='del'>-	return 0;</div><div class='add'>+	if (unlikely(!clk_good(clk)))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (clk-&gt;enable)</div><div class='add'>+		return clk-&gt;enable(clk);</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(clk_enable);</div><div class='ctx'> </div><div class='ctx'> void clk_disable(struct clk *clk)</div><div class='ctx'> {</div><div class='del'>-	/* not used */</div><div class='add'>+	if (unlikely(!clk_good(clk)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (clk-&gt;disable)</div><div class='add'>+		clk-&gt;disable(clk);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(clk_disable);</div><div class='ctx'> </div><div class='del'>-static inline u32 ltq_get_counter_resolution(void)</div><div class='add'>+int clk_activate(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(!clk_good(clk)))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (clk-&gt;activate)</div><div class='add'>+		return clk-&gt;activate(clk);</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(clk_activate);</div><div class='add'>+</div><div class='add'>+void clk_deactivate(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(!clk_good(clk)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (clk-&gt;deactivate)</div><div class='add'>+		clk-&gt;deactivate(clk);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(clk_deactivate);</div><div class='add'>+</div><div class='add'>+static inline u32 get_counter_resolution(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 res;</div><div class='ctx'> </div><div class='hunk'>@@ -133,21 +155,11 @@ void __init plat_time_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> </div><div class='del'>-	if (insert_resource(&amp;iomem_resource, &amp;ltq_cgu_resource) &lt; 0)</div><div class='del'>-		panic("Failed to insert cgu memory");</div><div class='add'>+	ltq_soc_init();</div><div class='ctx'> </div><div class='del'>-	if (request_mem_region(ltq_cgu_resource.start,</div><div class='del'>-			resource_size(&amp;ltq_cgu_resource), "cgu") &lt; 0)</div><div class='del'>-		panic("Failed to request cgu memory");</div><div class='del'>-</div><div class='del'>-	ltq_cgu_membase = ioremap_nocache(ltq_cgu_resource.start,</div><div class='del'>-				resource_size(&amp;ltq_cgu_resource));</div><div class='del'>-	if (!ltq_cgu_membase) {</div><div class='del'>-		pr_err("Failed to remap cgu memory\n");</div><div class='del'>-		unreachable();</div><div class='del'>-	}</div><div class='del'>-	clk = clk_get(0, "cpu");</div><div class='del'>-	mips_hpt_frequency = clk_get_rate(clk) / ltq_get_counter_resolution();</div><div class='add'>+	clk = clk_get_cpu();</div><div class='add'>+	mips_hpt_frequency = clk_get_rate(clk) / get_counter_resolution();</div><div class='ctx'> 	write_c0_compare(read_c0_count());</div><div class='add'>+	pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);</div><div class='ctx'> 	clk_put(clk);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/lantiq/clk.h b/arch/mips/lantiq/clk.h<br/>index 3328925f2c3f..fa670602b91b 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/clk.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/clk.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/clk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/clk.h</a></div><div class='hunk'>@@ -9,10 +9,70 @@</div><div class='ctx'> #ifndef _LTQ_CLK_H__</div><div class='ctx'> #define _LTQ_CLK_H__</div><div class='ctx'> </div><div class='del'>-extern void clk_init(void);</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='ctx'> </div><div class='del'>-extern unsigned long ltq_get_cpu_hz(void);</div><div class='del'>-extern unsigned long ltq_get_fpi_hz(void);</div><div class='del'>-extern unsigned long ltq_get_io_region_clock(void);</div><div class='add'>+/* clock speeds */</div><div class='add'>+#define CLOCK_33M	33333333</div><div class='add'>+#define CLOCK_60M	60000000</div><div class='add'>+#define CLOCK_62_5M	62500000</div><div class='add'>+#define CLOCK_83M	83333333</div><div class='add'>+#define CLOCK_83_5M	83500000</div><div class='add'>+#define CLOCK_98_304M	98304000</div><div class='add'>+#define CLOCK_100M	100000000</div><div class='add'>+#define CLOCK_111M	111111111</div><div class='add'>+#define CLOCK_125M	125000000</div><div class='add'>+#define CLOCK_133M	133333333</div><div class='add'>+#define CLOCK_150M	150000000</div><div class='add'>+#define CLOCK_166M	166666666</div><div class='add'>+#define CLOCK_167M	166666667</div><div class='add'>+#define CLOCK_196_608M	196608000</div><div class='add'>+#define CLOCK_200M	200000000</div><div class='add'>+#define CLOCK_250M	250000000</div><div class='add'>+#define CLOCK_266M	266666666</div><div class='add'>+#define CLOCK_300M	300000000</div><div class='add'>+#define CLOCK_333M	333333333</div><div class='add'>+#define CLOCK_393M	393215332</div><div class='add'>+#define CLOCK_400M	400000000</div><div class='add'>+#define CLOCK_500M	500000000</div><div class='add'>+#define CLOCK_600M	600000000</div><div class='add'>+</div><div class='add'>+/* clock out speeds */</div><div class='add'>+#define CLOCK_32_768K	32768</div><div class='add'>+#define CLOCK_1_536M	1536000</div><div class='add'>+#define CLOCK_2_5M	2500000</div><div class='add'>+#define CLOCK_12M	12000000</div><div class='add'>+#define CLOCK_24M	24000000</div><div class='add'>+#define CLOCK_25M	25000000</div><div class='add'>+#define CLOCK_30M	30000000</div><div class='add'>+#define CLOCK_40M	40000000</div><div class='add'>+#define CLOCK_48M	48000000</div><div class='add'>+#define CLOCK_50M	50000000</div><div class='add'>+#define CLOCK_60M	60000000</div><div class='add'>+</div><div class='add'>+struct clk {</div><div class='add'>+	struct clk_lookup cl;</div><div class='add'>+	unsigned long rate;</div><div class='add'>+	unsigned long *rates;</div><div class='add'>+	unsigned int module;</div><div class='add'>+	unsigned int bits;</div><div class='add'>+	unsigned long (*get_rate) (void);</div><div class='add'>+	int (*enable) (struct clk *clk);</div><div class='add'>+	void (*disable) (struct clk *clk);</div><div class='add'>+	int (*activate) (struct clk *clk);</div><div class='add'>+	void (*deactivate) (struct clk *clk);</div><div class='add'>+	void (*reboot) (struct clk *clk);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern void clkdev_add_static(unsigned long cpu, unsigned long fpi,</div><div class='add'>+				unsigned long io);</div><div class='add'>+</div><div class='add'>+extern unsigned long ltq_danube_cpu_hz(void);</div><div class='add'>+extern unsigned long ltq_danube_fpi_hz(void);</div><div class='add'>+</div><div class='add'>+extern unsigned long ltq_ar9_cpu_hz(void);</div><div class='add'>+extern unsigned long ltq_ar9_fpi_hz(void);</div><div class='add'>+</div><div class='add'>+extern unsigned long ltq_vr9_cpu_hz(void);</div><div class='add'>+extern unsigned long ltq_vr9_fpi_hz(void);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/lantiq/devices.c b/arch/mips/lantiq/devices.c<br/>deleted file mode 100644<br/>index de1cb2bcd79a..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/devices.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,120 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/reboot.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/leds.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/time.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/bootinfo.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-</div><div class='del'>-#include "devices.h"</div><div class='del'>-</div><div class='del'>-/* nor flash */</div><div class='del'>-static struct resource ltq_nor_resource = {</div><div class='del'>-	.name	= "nor",</div><div class='del'>-	.start	= LTQ_FLASH_START,</div><div class='del'>-	.end	= LTQ_FLASH_START + LTQ_FLASH_MAX - 1,</div><div class='del'>-	.flags  = IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device ltq_nor = {</div><div class='del'>-	.name		= "ltq_nor",</div><div class='del'>-	.resource	= &amp;ltq_nor_resource,</div><div class='del'>-	.num_resources	= 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ltq_register_nor(struct physmap_flash_data *data)</div><div class='del'>-{</div><div class='del'>-	ltq_nor.dev.platform_data = data;</div><div class='del'>-	platform_device_register(&amp;ltq_nor);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* watchdog */</div><div class='del'>-static struct resource ltq_wdt_resource = {</div><div class='del'>-	.name	= "watchdog",</div><div class='del'>-	.start  = LTQ_WDT_BASE_ADDR,</div><div class='del'>-	.end    = LTQ_WDT_BASE_ADDR + LTQ_WDT_SIZE - 1,</div><div class='del'>-	.flags  = IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ltq_register_wdt(void)</div><div class='del'>-{</div><div class='del'>-	platform_device_register_simple("ltq_wdt", 0, &amp;ltq_wdt_resource, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* asc ports */</div><div class='del'>-static struct resource ltq_asc0_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.name	= "asc0",</div><div class='del'>-		.start  = LTQ_ASC0_BASE_ADDR,</div><div class='del'>-		.end    = LTQ_ASC0_BASE_ADDR + LTQ_ASC_SIZE - 1,</div><div class='del'>-		.flags  = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	IRQ_RES(tx, LTQ_ASC_TIR(0)),</div><div class='del'>-	IRQ_RES(rx, LTQ_ASC_RIR(0)),</div><div class='del'>-	IRQ_RES(err, LTQ_ASC_EIR(0)),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ltq_asc1_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.name	= "asc1",</div><div class='del'>-		.start  = LTQ_ASC1_BASE_ADDR,</div><div class='del'>-		.end    = LTQ_ASC1_BASE_ADDR + LTQ_ASC_SIZE - 1,</div><div class='del'>-		.flags  = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	IRQ_RES(tx, LTQ_ASC_TIR(1)),</div><div class='del'>-	IRQ_RES(rx, LTQ_ASC_RIR(1)),</div><div class='del'>-	IRQ_RES(err, LTQ_ASC_EIR(1)),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ltq_register_asc(int port)</div><div class='del'>-{</div><div class='del'>-	switch (port) {</div><div class='del'>-	case 0:</div><div class='del'>-		platform_device_register_simple("ltq_asc", 0,</div><div class='del'>-			ltq_asc0_resources, ARRAY_SIZE(ltq_asc0_resources));</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		platform_device_register_simple("ltq_asc", 1,</div><div class='del'>-			ltq_asc1_resources, ARRAY_SIZE(ltq_asc1_resources));</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-/* pci */</div><div class='del'>-static struct platform_device ltq_pci = {</div><div class='del'>-	.name		= "ltq_pci",</div><div class='del'>-	.num_resources	= 0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ltq_register_pci(struct ltq_pci_data *data)</div><div class='del'>-{</div><div class='del'>-	ltq_pci.dev.platform_data = data;</div><div class='del'>-	platform_device_register(&amp;ltq_pci);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-void __init ltq_register_pci(struct ltq_pci_data *data)</div><div class='del'>-{</div><div class='del'>-	pr_err("kernel is compiled without PCI support\n");</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/mips/lantiq/devices.h b/arch/mips/lantiq/devices.h<br/>deleted file mode 100644<br/>index 2947bb19a528..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/devices.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/devices.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _LTQ_DEVICES_H__</div><div class='del'>-#define _LTQ_DEVICES_H__</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_platform.h&gt;</div><div class='del'>-#include &lt;linux/mtd/physmap.h&gt;</div><div class='del'>-</div><div class='del'>-#define IRQ_RES(resname, irq) \</div><div class='del'>-	{.name = #resname, .start = (irq), .flags = IORESOURCE_IRQ}</div><div class='del'>-</div><div class='del'>-extern void ltq_register_nor(struct physmap_flash_data *data);</div><div class='del'>-extern void ltq_register_wdt(void);</div><div class='del'>-extern void ltq_register_asc(int port);</div><div class='del'>-extern void ltq_register_pci(struct ltq_pci_data *data);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/mips/lantiq/dts/Makefile b/arch/mips/lantiq/dts/Makefile<br/>new file mode 100644<br/>index 000000000000..674fca45f72d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/dts/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/dts/Makefile</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+obj-$(CONFIG_DT_EASY50712) := easy50712.dtb.o</div><div class='add'>+</div><div class='add'>+$(obj)/%.dtb: $(obj)/%.dts</div><div class='add'>+	$(call if_changed,dtc)</div><div class='head'>diff --git a/arch/mips/lantiq/dts/danube.dtsi b/arch/mips/lantiq/dts/danube.dtsi<br/>new file mode 100644<br/>index 000000000000..3a4520f009cf<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/dts/danube.dtsi?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/dts/danube.dtsi</a></div><div class='hunk'>@@ -0,0 +1,105 @@</div><div class='add'>+/ {</div><div class='add'>+	#address-cells = &lt;1&gt;;</div><div class='add'>+	#size-cells = &lt;1&gt;;</div><div class='add'>+	compatible = "lantiq,xway", "lantiq,danube";</div><div class='add'>+</div><div class='add'>+	cpus {</div><div class='add'>+		cpu@0 {</div><div class='add'>+			compatible = "mips,mips24Kc";</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	biu@1F800000 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "lantiq,biu", "simple-bus";</div><div class='add'>+		reg = &lt;0x1F800000 0x800000&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x1F800000 0x7FFFFF&gt;;</div><div class='add'>+</div><div class='add'>+		icu0: icu@80200 {</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			compatible = "lantiq,icu";</div><div class='add'>+			reg = &lt;0x80200 0x120&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		watchdog@803F0 {</div><div class='add'>+			compatible = "lantiq,wdt";</div><div class='add'>+			reg = &lt;0x803F0 0x10&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	sram@1F000000 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "lantiq,sram";</div><div class='add'>+		reg = &lt;0x1F000000 0x800000&gt;;</div><div class='add'>+		ranges = &lt;0x0 0x1F000000 0x7FFFFF&gt;;</div><div class='add'>+</div><div class='add'>+		eiu0: eiu@101000 {</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			interrupt-controller;</div><div class='add'>+			interrupt-parent;</div><div class='add'>+			compatible = "lantiq,eiu-xway";</div><div class='add'>+			reg = &lt;0x101000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pmu0: pmu@102000 {</div><div class='add'>+			compatible = "lantiq,pmu-xway";</div><div class='add'>+			reg = &lt;0x102000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		cgu0: cgu@103000 {</div><div class='add'>+			compatible = "lantiq,cgu-xway";</div><div class='add'>+			reg = &lt;0x103000 0x1000&gt;;</div><div class='add'>+			#clock-cells = &lt;1&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		rcu0: rcu@203000 {</div><div class='add'>+			compatible = "lantiq,rcu-xway";</div><div class='add'>+			reg = &lt;0x203000 0x1000&gt;;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fpi@10000000 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		compatible = "lantiq,fpi", "simple-bus";</div><div class='add'>+		ranges = &lt;0x0 0x10000000 0xEEFFFFF&gt;;</div><div class='add'>+		reg = &lt;0x10000000 0xEF00000&gt;;</div><div class='add'>+</div><div class='add'>+		gptu@E100A00 {</div><div class='add'>+			compatible = "lantiq,gptu-xway";</div><div class='add'>+			reg = &lt;0xE100A00 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		serial@E100C00 {</div><div class='add'>+			compatible = "lantiq,asc";</div><div class='add'>+			reg = &lt;0xE100C00 0x400&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;icu0&gt;;</div><div class='add'>+			interrupts = &lt;112 113 114&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		dma0: dma@E104100 {</div><div class='add'>+			compatible = "lantiq,dma-xway";</div><div class='add'>+			reg = &lt;0xE104100 0x800&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		ebu0: ebu@E105300 {</div><div class='add'>+			compatible = "lantiq,ebu-xway";</div><div class='add'>+			reg = &lt;0xE105300 0x100&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pci0: pci@E105400 {</div><div class='add'>+			#address-cells = &lt;3&gt;;</div><div class='add'>+			#size-cells = &lt;2&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			compatible = "lantiq,pci-xway";</div><div class='add'>+			bus-range = &lt;0x0 0x0&gt;;</div><div class='add'>+			ranges = &lt;0x2000000 0 0x8000000 0x8000000 0 0x2000000	/* pci memory */</div><div class='add'>+				  0x1000000 0 0x00000000 0xAE00000 0 0x200000&gt;;	/* io space */</div><div class='add'>+			reg = &lt;0x7000000 0x8000		/* config space */</div><div class='add'>+				0xE105400 0x400&gt;;	/* pci bridge */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/lantiq/dts/easy50712.dts b/arch/mips/lantiq/dts/easy50712.dts<br/>new file mode 100644<br/>index 000000000000..68c17310bc82<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/dts/easy50712.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/dts/easy50712.dts</a></div><div class='hunk'>@@ -0,0 +1,113 @@</div><div class='add'>+/dts-v1/;</div><div class='add'>+</div><div class='add'>+/include/ "danube.dtsi"</div><div class='add'>+</div><div class='add'>+/ {</div><div class='add'>+	chosen {</div><div class='add'>+		bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memory@0 {</div><div class='add'>+		reg = &lt;0x0 0x2000000&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	fpi@10000000 {</div><div class='add'>+		#address-cells = &lt;1&gt;;</div><div class='add'>+		#size-cells = &lt;1&gt;;</div><div class='add'>+		localbus@0 {</div><div class='add'>+			#address-cells = &lt;2&gt;;</div><div class='add'>+			#size-cells = &lt;1&gt;;</div><div class='add'>+			ranges = &lt;0 0 0x0 0x3ffffff /* addrsel0 */</div><div class='add'>+				1 0 0x4000000 0x4000010&gt;; /* addsel1 */</div><div class='add'>+			compatible = "lantiq,localbus", "simple-bus";</div><div class='add'>+</div><div class='add'>+			nor-boot@0 {</div><div class='add'>+				compatible = "lantiq,nor";</div><div class='add'>+				bank-width = &lt;2&gt;;</div><div class='add'>+				reg = &lt;0 0x0 0x2000000&gt;;</div><div class='add'>+				#address-cells = &lt;1&gt;;</div><div class='add'>+				#size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+				partition@0 {</div><div class='add'>+					label = "uboot";</div><div class='add'>+					reg = &lt;0x00000 0x10000&gt;; /* 64 KB */</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@10000 {</div><div class='add'>+					label = "uboot_env";</div><div class='add'>+					reg = &lt;0x10000 0x10000&gt;; /* 64 KB */</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@20000 {</div><div class='add'>+					label = "linux";</div><div class='add'>+					reg = &lt;0x20000 0x3d0000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				partition@400000 {</div><div class='add'>+					label = "rootfs";</div><div class='add'>+					reg = &lt;0x400000 0x400000&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		gpio: pinmux@E100B10 {</div><div class='add'>+			compatible = "lantiq,pinctrl-xway";</div><div class='add'>+			pinctrl-names = "default";</div><div class='add'>+			pinctrl-0 = &lt;&amp;state_default&gt;;</div><div class='add'>+</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0xE100B10 0xA0&gt;;</div><div class='add'>+</div><div class='add'>+			state_default: pinmux {</div><div class='add'>+				stp {</div><div class='add'>+					lantiq,groups = "stp";</div><div class='add'>+					lantiq,function = "stp";</div><div class='add'>+				};</div><div class='add'>+				exin {</div><div class='add'>+					lantiq,groups = "exin1";</div><div class='add'>+					lantiq,function = "exin";</div><div class='add'>+				};</div><div class='add'>+				pci {</div><div class='add'>+					lantiq,groups = "gnt1";</div><div class='add'>+					lantiq,function = "pci";</div><div class='add'>+				};</div><div class='add'>+				conf_out {</div><div class='add'>+					lantiq,pins = "io4", "io5", "io6"; /* stp */</div><div class='add'>+					lantiq,open-drain;</div><div class='add'>+					lantiq,pull = &lt;0&gt;;</div><div class='add'>+				};</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		etop@E180000 {</div><div class='add'>+			compatible = "lantiq,etop-xway";</div><div class='add'>+			reg = &lt;0xE180000 0x40000&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;icu0&gt;;</div><div class='add'>+			interrupts = &lt;73 78&gt;;</div><div class='add'>+			phy-mode = "rmii";</div><div class='add'>+			mac-address = [ 00 11 22 33 44 55 ];</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		stp0: stp@E100BB0 {</div><div class='add'>+			#gpio-cells = &lt;2&gt;;</div><div class='add'>+			compatible = "lantiq,gpio-stp-xway";</div><div class='add'>+			gpio-controller;</div><div class='add'>+			reg = &lt;0xE100BB0 0x40&gt;;</div><div class='add'>+</div><div class='add'>+			lantiq,shadow = &lt;0xfff&gt;;</div><div class='add'>+			lantiq,groups = &lt;0x3&gt;;</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		pci@E105400 {</div><div class='add'>+			lantiq,bus-clock = &lt;33333333&gt;;</div><div class='add'>+			interrupt-map-mask = &lt;0xf800 0x0 0x0 0x7&gt;;</div><div class='add'>+			interrupt-map = &lt;</div><div class='add'>+                                0x7000 0 0 1 &amp;icu0 29 1 // slot 14, irq 29</div><div class='add'>+			&gt;;</div><div class='add'>+			gpios-reset = &lt;&amp;gpio 21 0&gt;;</div><div class='add'>+			req-mask = &lt;0x1&gt;;		/* GNT1 */</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+};</div><div class='head'>diff --git a/arch/mips/lantiq/early_printk.c b/arch/mips/lantiq/early_printk.c<br/>index 972e05f87631..9b28d0940ef4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/early_printk.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/early_printk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/early_printk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/early_printk.c</a></div><div class='hunk'>@@ -6,17 +6,16 @@</div><div class='ctx'>  *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq.h&gt;</div><div class='ctx'> #include &lt;lantiq_soc.h&gt;</div><div class='ctx'> </div><div class='del'>-/* no ioremap possible at this early stage, lets use KSEG1 instead  */</div><div class='del'>-#define LTQ_ASC_BASE	KSEG1ADDR(LTQ_ASC1_BASE_ADDR)</div><div class='ctx'> #define ASC_BUF		1024</div><div class='del'>-#define LTQ_ASC_FSTAT	((u32 *)(LTQ_ASC_BASE + 0x0048))</div><div class='del'>-#define LTQ_ASC_TBUF	((u32 *)(LTQ_ASC_BASE + 0x0020))</div><div class='add'>+#define LTQ_ASC_FSTAT	((u32 *)(LTQ_EARLY_ASC + 0x0048))</div><div class='add'>+#ifdef __BIG_ENDIAN</div><div class='add'>+#define LTQ_ASC_TBUF	((u32 *)(LTQ_EARLY_ASC + 0x0020 + 3))</div><div class='add'>+#else</div><div class='add'>+#define LTQ_ASC_TBUF	((u32 *)(LTQ_EARLY_ASC + 0x0020))</div><div class='add'>+#endif</div><div class='ctx'> #define TXMASK		0x3F00</div><div class='ctx'> #define TXOFFSET	8</div><div class='ctx'> </div><div class='hunk'>@@ -27,7 +26,7 @@ void prom_putchar(char c)</div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> 	do { } while ((ltq_r32(LTQ_ASC_FSTAT) &amp; TXMASK) &gt;&gt; TXOFFSET);</div><div class='ctx'> 	if (c == '\n')</div><div class='del'>-		ltq_w32('\r', LTQ_ASC_TBUF);</div><div class='del'>-	ltq_w32(c, LTQ_ASC_TBUF);</div><div class='add'>+		ltq_w8('\r', LTQ_ASC_TBUF);</div><div class='add'>+	ltq_w8(c, LTQ_ASC_TBUF);</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/lantiq/falcon/Makefile b/arch/mips/lantiq/falcon/Makefile<br/>new file mode 100644<br/>index 000000000000..ff220f97693d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/falcon/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/falcon/Makefile</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+obj-y := prom.o reset.o sysctrl.o</div><div class='head'>diff --git a/arch/mips/lantiq/falcon/prom.c b/arch/mips/lantiq/falcon/prom.c<br/>new file mode 100644<br/>index 000000000000..c1d278f05a3a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/falcon/prom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/falcon/prom.c</a></div><div class='hunk'>@@ -0,0 +1,87 @@</div><div class='add'>+/*</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ * by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Thomas Langer &lt;thomas.langer@lantiq.com&gt;</div><div class='add'>+ * Copyright (C) 2012 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;lantiq_soc.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../prom.h"</div><div class='add'>+</div><div class='add'>+#define SOC_FALCON	"Falcon"</div><div class='add'>+#define SOC_FALCON_D	"Falcon-D"</div><div class='add'>+#define SOC_FALCON_V	"Falcon-V"</div><div class='add'>+#define SOC_FALCON_M	"Falcon-M"</div><div class='add'>+</div><div class='add'>+#define COMP_FALCON	"lantiq,falcon"</div><div class='add'>+</div><div class='add'>+#define PART_SHIFT	12</div><div class='add'>+#define PART_MASK	0x0FFFF000</div><div class='add'>+#define REV_SHIFT	28</div><div class='add'>+#define REV_MASK	0xF0000000</div><div class='add'>+#define SREV_SHIFT	22</div><div class='add'>+#define SREV_MASK	0x03C00000</div><div class='add'>+#define TYPE_SHIFT	26</div><div class='add'>+#define TYPE_MASK	0x3C000000</div><div class='add'>+</div><div class='add'>+/* reset, nmi and ejtag exception vectors */</div><div class='add'>+#define BOOT_REG_BASE	(KSEG1 | 0x1F200000)</div><div class='add'>+#define BOOT_RVEC	(BOOT_REG_BASE | 0x00)</div><div class='add'>+#define BOOT_NVEC	(BOOT_REG_BASE | 0x04)</div><div class='add'>+#define BOOT_EVEC	(BOOT_REG_BASE | 0x08)</div><div class='add'>+</div><div class='add'>+void __init ltq_soc_nmi_setup(void)</div><div class='add'>+{</div><div class='add'>+	extern void (*nmi_handler)(void);</div><div class='add'>+</div><div class='add'>+	ltq_w32((unsigned long)&amp;nmi_handler, (void *)BOOT_NVEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init ltq_soc_ejtag_setup(void)</div><div class='add'>+{</div><div class='add'>+	extern void (*ejtag_debug_handler)(void);</div><div class='add'>+</div><div class='add'>+	ltq_w32((unsigned long)&amp;ejtag_debug_handler, (void *)BOOT_EVEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init ltq_soc_detect(struct ltq_soc_info *i)</div><div class='add'>+{</div><div class='add'>+	u32 type;</div><div class='add'>+	i-&gt;partnum = (ltq_r32(FALCON_CHIPID) &amp; PART_MASK) &gt;&gt; PART_SHIFT;</div><div class='add'>+	i-&gt;rev = (ltq_r32(FALCON_CHIPID) &amp; REV_MASK) &gt;&gt; REV_SHIFT;</div><div class='add'>+	i-&gt;srev = ((ltq_r32(FALCON_CHIPCONF) &amp; SREV_MASK) &gt;&gt; SREV_SHIFT);</div><div class='add'>+	i-&gt;compatible = COMP_FALCON;</div><div class='add'>+	i-&gt;type = SOC_TYPE_FALCON;</div><div class='add'>+	sprintf(i-&gt;rev_type, "%c%d%d", (i-&gt;srev &amp; 0x4) ? ('B') : ('A'),</div><div class='add'>+		i-&gt;rev &amp; 0x7, (i-&gt;srev &amp; 0x3) + 1);</div><div class='add'>+</div><div class='add'>+	switch (i-&gt;partnum) {</div><div class='add'>+	case SOC_ID_FALCON:</div><div class='add'>+		type = (ltq_r32(FALCON_CHIPTYPE) &amp; TYPE_MASK) &gt;&gt; TYPE_SHIFT;</div><div class='add'>+		switch (type) {</div><div class='add'>+		case 0:</div><div class='add'>+			i-&gt;name = SOC_FALCON_D;</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+			i-&gt;name = SOC_FALCON_V;</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			i-&gt;name = SOC_FALCON_M;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			i-&gt;name = SOC_FALCON;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		unreachable();</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/lantiq/falcon/reset.c b/arch/mips/lantiq/falcon/reset.c<br/>new file mode 100644<br/>index 000000000000..568248253426<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/falcon/reset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/falcon/reset.c</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+/*</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ * by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Thomas Langer &lt;thomas.langer@lantiq.com&gt;</div><div class='add'>+ * Copyright (C) 2012 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/pm.h&gt;</div><div class='add'>+#include &lt;asm/reboot.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;lantiq_soc.h&gt;</div><div class='add'>+</div><div class='add'>+/* CPU0 Reset Source Register */</div><div class='add'>+#define SYS1_CPU0RS		0x0040</div><div class='add'>+/* reset cause mask */</div><div class='add'>+#define CPU0RS_MASK		0x0003</div><div class='add'>+/* CPU0 Boot Mode Register */</div><div class='add'>+#define SYS1_BM			0x00a0</div><div class='add'>+/* boot mode mask */</div><div class='add'>+#define BM_MASK			0x0005</div><div class='add'>+</div><div class='add'>+/* allow platform code to find out what surce we booted from */</div><div class='add'>+unsigned char ltq_boot_select(void)</div><div class='add'>+{</div><div class='add'>+	return ltq_sys1_r32(SYS1_BM) &amp; BM_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* allow the watchdog driver to find out what the boot reason was */</div><div class='add'>+int ltq_reset_cause(void)</div><div class='add'>+{</div><div class='add'>+	return ltq_sys1_r32(SYS1_CPU0RS) &amp; CPU0RS_MASK;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ltq_reset_cause);</div><div class='add'>+</div><div class='add'>+#define BOOT_REG_BASE	(KSEG1 | 0x1F200000)</div><div class='add'>+#define BOOT_PW1_REG	(BOOT_REG_BASE | 0x20)</div><div class='add'>+#define BOOT_PW2_REG	(BOOT_REG_BASE | 0x24)</div><div class='add'>+#define BOOT_PW1	0x4C545100</div><div class='add'>+#define BOOT_PW2	0x0051544C</div><div class='add'>+</div><div class='add'>+#define WDT_REG_BASE	(KSEG1 | 0x1F8803F0)</div><div class='add'>+#define WDT_PW1		0x00BE0000</div><div class='add'>+#define WDT_PW2		0x00DC0000</div><div class='add'>+</div><div class='add'>+static void machine_restart(char *command)</div><div class='add'>+{</div><div class='add'>+	local_irq_disable();</div><div class='add'>+</div><div class='add'>+	/* reboot magic */</div><div class='add'>+	ltq_w32(BOOT_PW1, (void *)BOOT_PW1_REG); /* 'LTQ\0' */</div><div class='add'>+	ltq_w32(BOOT_PW2, (void *)BOOT_PW2_REG); /* '\0QTL' */</div><div class='add'>+	ltq_w32(0, (void *)BOOT_REG_BASE); /* reset Bootreg RVEC */</div><div class='add'>+</div><div class='add'>+	/* watchdog magic */</div><div class='add'>+	ltq_w32(WDT_PW1, (void *)WDT_REG_BASE);</div><div class='add'>+	ltq_w32(WDT_PW2 |</div><div class='add'>+		(0x3 &lt;&lt; 26) | /* PWL */</div><div class='add'>+		(0x2 &lt;&lt; 24) | /* CLKDIV */</div><div class='add'>+		(0x1 &lt;&lt; 31) | /* enable */</div><div class='add'>+		(1), /* reload */</div><div class='add'>+		(void *)WDT_REG_BASE);</div><div class='add'>+	unreachable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void machine_halt(void)</div><div class='add'>+{</div><div class='add'>+	local_irq_disable();</div><div class='add'>+	unreachable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void machine_power_off(void)</div><div class='add'>+{</div><div class='add'>+	local_irq_disable();</div><div class='add'>+	unreachable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init mips_reboot_setup(void)</div><div class='add'>+{</div><div class='add'>+	_machine_restart = machine_restart;</div><div class='add'>+	_machine_halt = machine_halt;</div><div class='add'>+	pm_power_off = machine_power_off;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+arch_initcall(mips_reboot_setup);</div><div class='head'>diff --git a/arch/mips/lantiq/falcon/sysctrl.c b/arch/mips/lantiq/falcon/sysctrl.c<br/>new file mode 100644<br/>index 000000000000..ba0123d13d40<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/falcon/sysctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/falcon/sysctrl.c</a></div><div class='hunk'>@@ -0,0 +1,260 @@</div><div class='add'>+/*</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ * by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011 Thomas Langer &lt;thomas.langer@lantiq.com&gt;</div><div class='add'>+ * Copyright (C) 2011 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;asm/delay.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;lantiq_soc.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../clk.h"</div><div class='add'>+</div><div class='add'>+/* infrastructure control register */</div><div class='add'>+#define SYS1_INFRAC		0x00bc</div><div class='add'>+/* Configuration fuses for drivers and pll */</div><div class='add'>+#define STATUS_CONFIG		0x0040</div><div class='add'>+</div><div class='add'>+/* GPE frequency selection */</div><div class='add'>+#define GPPC_OFFSET		24</div><div class='add'>+#define GPEFREQ_MASK		0x00000C0</div><div class='add'>+#define GPEFREQ_OFFSET		10</div><div class='add'>+/* Clock status register */</div><div class='add'>+#define SYSCTL_CLKS		0x0000</div><div class='add'>+/* Clock enable register */</div><div class='add'>+#define SYSCTL_CLKEN		0x0004</div><div class='add'>+/* Clock clear register */</div><div class='add'>+#define SYSCTL_CLKCLR		0x0008</div><div class='add'>+/* Activation Status Register */</div><div class='add'>+#define SYSCTL_ACTS		0x0020</div><div class='add'>+/* Activation Register */</div><div class='add'>+#define SYSCTL_ACT		0x0024</div><div class='add'>+/* Deactivation Register */</div><div class='add'>+#define SYSCTL_DEACT		0x0028</div><div class='add'>+/* reboot Register */</div><div class='add'>+#define SYSCTL_RBT		0x002c</div><div class='add'>+/* CPU0 Clock Control Register */</div><div class='add'>+#define SYS1_CPU0CC		0x0040</div><div class='add'>+/* HRST_OUT_N Control Register */</div><div class='add'>+#define SYS1_HRSTOUTC		0x00c0</div><div class='add'>+/* clock divider bit */</div><div class='add'>+#define CPU0CC_CPUDIV		0x0001</div><div class='add'>+</div><div class='add'>+/* Activation Status Register */</div><div class='add'>+#define ACTS_ASC1_ACT	0x00000800</div><div class='add'>+#define ACTS_I2C_ACT	0x00004000</div><div class='add'>+#define ACTS_P0		0x00010000</div><div class='add'>+#define ACTS_P1		0x00010000</div><div class='add'>+#define ACTS_P2		0x00020000</div><div class='add'>+#define ACTS_P3		0x00020000</div><div class='add'>+#define ACTS_P4		0x00040000</div><div class='add'>+#define ACTS_PADCTRL0	0x00100000</div><div class='add'>+#define ACTS_PADCTRL1	0x00100000</div><div class='add'>+#define ACTS_PADCTRL2	0x00200000</div><div class='add'>+#define ACTS_PADCTRL3	0x00200000</div><div class='add'>+#define ACTS_PADCTRL4	0x00400000</div><div class='add'>+</div><div class='add'>+#define sysctl_w32(m, x, y)	ltq_w32((x), sysctl_membase[m] + (y))</div><div class='add'>+#define sysctl_r32(m, x)	ltq_r32(sysctl_membase[m] + (x))</div><div class='add'>+#define sysctl_w32_mask(m, clear, set, reg)	\</div><div class='add'>+		sysctl_w32(m, (sysctl_r32(m, reg) &amp; ~(clear)) | (set), reg)</div><div class='add'>+</div><div class='add'>+#define status_w32(x, y)	ltq_w32((x), status_membase + (y))</div><div class='add'>+#define status_r32(x)		ltq_r32(status_membase + (x))</div><div class='add'>+</div><div class='add'>+static void __iomem *sysctl_membase[3], *status_membase;</div><div class='add'>+void __iomem *ltq_sys1_membase, *ltq_ebu_membase;</div><div class='add'>+</div><div class='add'>+void falcon_trigger_hrst(int level)</div><div class='add'>+{</div><div class='add'>+	sysctl_w32(SYSCTL_SYS1, level &amp; 1, SYS1_HRSTOUTC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void sysctl_wait(struct clk *clk,</div><div class='add'>+		unsigned int test, unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	int err = 1000000;</div><div class='add'>+</div><div class='add'>+	do {} while (--err &amp;&amp; ((sysctl_r32(clk-&gt;module, reg)</div><div class='add'>+					&amp; clk-&gt;bits) != test));</div><div class='add'>+	if (!err)</div><div class='add'>+		pr_err("module de/activation failed %d %08X %08X %08X\n",</div><div class='add'>+			clk-&gt;module, clk-&gt;bits, test,</div><div class='add'>+			sysctl_r32(clk-&gt;module, reg) &amp; clk-&gt;bits);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sysctl_activate(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	sysctl_w32(clk-&gt;module, clk-&gt;bits, SYSCTL_CLKEN);</div><div class='add'>+	sysctl_w32(clk-&gt;module, clk-&gt;bits, SYSCTL_ACT);</div><div class='add'>+	sysctl_wait(clk, clk-&gt;bits, SYSCTL_ACTS);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sysctl_deactivate(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	sysctl_w32(clk-&gt;module, clk-&gt;bits, SYSCTL_CLKCLR);</div><div class='add'>+	sysctl_w32(clk-&gt;module, clk-&gt;bits, SYSCTL_DEACT);</div><div class='add'>+	sysctl_wait(clk, 0, SYSCTL_ACTS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sysctl_clken(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	sysctl_w32(clk-&gt;module, clk-&gt;bits, SYSCTL_CLKEN);</div><div class='add'>+	sysctl_wait(clk, clk-&gt;bits, SYSCTL_CLKS);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sysctl_clkdis(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	sysctl_w32(clk-&gt;module, clk-&gt;bits, SYSCTL_CLKCLR);</div><div class='add'>+	sysctl_wait(clk, 0, SYSCTL_CLKS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sysctl_reboot(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	unsigned int act;</div><div class='add'>+	unsigned int bits;</div><div class='add'>+</div><div class='add'>+	act = sysctl_r32(clk-&gt;module, SYSCTL_ACT);</div><div class='add'>+	bits = ~act &amp; clk-&gt;bits;</div><div class='add'>+	if (bits != 0) {</div><div class='add'>+		sysctl_w32(clk-&gt;module, bits, SYSCTL_CLKEN);</div><div class='add'>+		sysctl_w32(clk-&gt;module, bits, SYSCTL_ACT);</div><div class='add'>+		sysctl_wait(clk, bits, SYSCTL_ACTS);</div><div class='add'>+	}</div><div class='add'>+	sysctl_w32(clk-&gt;module, act &amp; clk-&gt;bits, SYSCTL_RBT);</div><div class='add'>+	sysctl_wait(clk, clk-&gt;bits, SYSCTL_ACTS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* enable the ONU core */</div><div class='add'>+static void falcon_gpe_enable(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int freq;</div><div class='add'>+	unsigned int status;</div><div class='add'>+</div><div class='add'>+	/* if if the clock is already enabled */</div><div class='add'>+	status = sysctl_r32(SYSCTL_SYS1, SYS1_INFRAC);</div><div class='add'>+	if (status &amp; (1 &lt;&lt; (GPPC_OFFSET + 1)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (status_r32(STATUS_CONFIG) == 0)</div><div class='add'>+		freq = 1; /* use 625MHz on unfused chip */</div><div class='add'>+	else</div><div class='add'>+		freq = (status_r32(STATUS_CONFIG) &amp;</div><div class='add'>+			GPEFREQ_MASK) &gt;&gt;</div><div class='add'>+			GPEFREQ_OFFSET;</div><div class='add'>+</div><div class='add'>+	/* apply new frequency */</div><div class='add'>+	sysctl_w32_mask(SYSCTL_SYS1, 7 &lt;&lt; (GPPC_OFFSET + 1),</div><div class='add'>+		freq &lt;&lt; (GPPC_OFFSET + 2) , SYS1_INFRAC);</div><div class='add'>+	udelay(1);</div><div class='add'>+</div><div class='add'>+	/* enable new frequency */</div><div class='add'>+	sysctl_w32_mask(SYSCTL_SYS1, 0, 1 &lt;&lt; (GPPC_OFFSET + 1), SYS1_INFRAC);</div><div class='add'>+	udelay(1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void clkdev_add_sys(const char *dev, unsigned int module,</div><div class='add'>+					unsigned int bits)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	clk-&gt;cl.dev_id = dev;</div><div class='add'>+	clk-&gt;cl.con_id = NULL;</div><div class='add'>+	clk-&gt;cl.clk = clk;</div><div class='add'>+	clk-&gt;module = module;</div><div class='add'>+	clk-&gt;activate = sysctl_activate;</div><div class='add'>+	clk-&gt;deactivate = sysctl_deactivate;</div><div class='add'>+	clk-&gt;enable = sysctl_clken;</div><div class='add'>+	clk-&gt;disable = sysctl_clkdis;</div><div class='add'>+	clk-&gt;reboot = sysctl_reboot;</div><div class='add'>+	clkdev_add(&amp;clk-&gt;cl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init ltq_soc_init(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np_status =</div><div class='add'>+		of_find_compatible_node(NULL, NULL, "lantiq,status-falcon");</div><div class='add'>+	struct device_node *np_ebu =</div><div class='add'>+		of_find_compatible_node(NULL, NULL, "lantiq,ebu-falcon");</div><div class='add'>+	struct device_node *np_sys1 =</div><div class='add'>+		of_find_compatible_node(NULL, NULL, "lantiq,sys1-falcon");</div><div class='add'>+	struct device_node *np_syseth =</div><div class='add'>+		of_find_compatible_node(NULL, NULL, "lantiq,syseth-falcon");</div><div class='add'>+	struct device_node *np_sysgpe =</div><div class='add'>+		of_find_compatible_node(NULL, NULL, "lantiq,sysgpe-falcon");</div><div class='add'>+	struct resource res_status, res_ebu, res_sys[3];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* check if all the core register ranges are available */</div><div class='add'>+	if (!np_status || !np_ebu || !np_sys1 || !np_syseth || !np_sysgpe)</div><div class='add'>+		panic("Failed to load core nodes from devicetree");</div><div class='add'>+</div><div class='add'>+	if (of_address_to_resource(np_status, 0, &amp;res_status) ||</div><div class='add'>+			of_address_to_resource(np_ebu, 0, &amp;res_ebu) ||</div><div class='add'>+			of_address_to_resource(np_sys1, 0, &amp;res_sys[0]) ||</div><div class='add'>+			of_address_to_resource(np_syseth, 0, &amp;res_sys[1]) ||</div><div class='add'>+			of_address_to_resource(np_sysgpe, 0, &amp;res_sys[2]))</div><div class='add'>+		panic("Failed to get core resources");</div><div class='add'>+</div><div class='add'>+	if ((request_mem_region(res_status.start, resource_size(&amp;res_status),</div><div class='add'>+				res_status.name) &lt; 0) ||</div><div class='add'>+		(request_mem_region(res_ebu.start, resource_size(&amp;res_ebu),</div><div class='add'>+				res_ebu.name) &lt; 0) ||</div><div class='add'>+		(request_mem_region(res_sys[0].start,</div><div class='add'>+				resource_size(&amp;res_sys[0]),</div><div class='add'>+				res_sys[0].name) &lt; 0) ||</div><div class='add'>+		(request_mem_region(res_sys[1].start,</div><div class='add'>+				resource_size(&amp;res_sys[1]),</div><div class='add'>+				res_sys[1].name) &lt; 0) ||</div><div class='add'>+		(request_mem_region(res_sys[2].start,</div><div class='add'>+				resource_size(&amp;res_sys[2]),</div><div class='add'>+				res_sys[2].name) &lt; 0))</div><div class='add'>+		pr_err("Failed to request core reources");</div><div class='add'>+</div><div class='add'>+	status_membase = ioremap_nocache(res_status.start,</div><div class='add'>+					resource_size(&amp;res_status));</div><div class='add'>+	ltq_ebu_membase = ioremap_nocache(res_ebu.start,</div><div class='add'>+					resource_size(&amp;res_ebu));</div><div class='add'>+</div><div class='add'>+	if (!status_membase || !ltq_ebu_membase)</div><div class='add'>+		panic("Failed to remap core resources");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		sysctl_membase[i] = ioremap_nocache(res_sys[i].start,</div><div class='add'>+						resource_size(&amp;res_sys[i]));</div><div class='add'>+		if (!sysctl_membase[i])</div><div class='add'>+			panic("Failed to remap sysctrl resources");</div><div class='add'>+	}</div><div class='add'>+	ltq_sys1_membase = sysctl_membase[0];</div><div class='add'>+</div><div class='add'>+	falcon_gpe_enable();</div><div class='add'>+</div><div class='add'>+	/* get our 3 static rates for cpu, fpi and io clocks */</div><div class='add'>+	if (ltq_sys1_r32(SYS1_CPU0CC) &amp; CPU0CC_CPUDIV)</div><div class='add'>+		clkdev_add_static(CLOCK_200M, CLOCK_100M, CLOCK_200M);</div><div class='add'>+	else</div><div class='add'>+		clkdev_add_static(CLOCK_400M, CLOCK_100M, CLOCK_200M);</div><div class='add'>+</div><div class='add'>+	/* add our clock domains */</div><div class='add'>+	clkdev_add_sys("1d810000.gpio", SYSCTL_SYSETH, ACTS_P0);</div><div class='add'>+	clkdev_add_sys("1d810100.gpio", SYSCTL_SYSETH, ACTS_P2);</div><div class='add'>+	clkdev_add_sys("1e800100.gpio", SYSCTL_SYS1, ACTS_P1);</div><div class='add'>+	clkdev_add_sys("1e800200.gpio", SYSCTL_SYS1, ACTS_P3);</div><div class='add'>+	clkdev_add_sys("1e800300.gpio", SYSCTL_SYS1, ACTS_P4);</div><div class='add'>+	clkdev_add_sys("1db01000.pad", SYSCTL_SYSETH, ACTS_PADCTRL0);</div><div class='add'>+	clkdev_add_sys("1db02000.pad", SYSCTL_SYSETH, ACTS_PADCTRL2);</div><div class='add'>+	clkdev_add_sys("1e800400.pad", SYSCTL_SYS1, ACTS_PADCTRL1);</div><div class='add'>+	clkdev_add_sys("1e800500.pad", SYSCTL_SYS1, ACTS_PADCTRL3);</div><div class='add'>+	clkdev_add_sys("1e800600.pad", SYSCTL_SYS1, ACTS_PADCTRL4);</div><div class='add'>+	clkdev_add_sys("1e100C00.serial", SYSCTL_SYS1, ACTS_ASC1_ACT);</div><div class='add'>+	clkdev_add_sys("1e200000.i2c", SYSCTL_SYS1, ACTS_I2C_ACT);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c<br/>index d673731c538a..57c1a4e51408 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/irq.c</a></div><div class='hunk'>@@ -9,6 +9,11 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> #include &lt;asm/irq_cpu.h&gt;</div><div class='hunk'>@@ -16,7 +21,7 @@</div><div class='ctx'> #include &lt;lantiq_soc.h&gt;</div><div class='ctx'> #include &lt;irq.h&gt;</div><div class='ctx'> </div><div class='del'>-/* register definitions */</div><div class='add'>+/* register definitions - internal irqs */</div><div class='ctx'> #define LTQ_ICU_IM0_ISR		0x0000</div><div class='ctx'> #define LTQ_ICU_IM0_IER		0x0008</div><div class='ctx'> #define LTQ_ICU_IM0_IOSR	0x0010</div><div class='hunk'>@@ -25,6 +30,7 @@</div><div class='ctx'> #define LTQ_ICU_IM1_ISR		0x0028</div><div class='ctx'> #define LTQ_ICU_OFFSET		(LTQ_ICU_IM1_ISR - LTQ_ICU_IM0_ISR)</div><div class='ctx'> </div><div class='add'>+/* register definitions - external irqs */</div><div class='ctx'> #define LTQ_EIU_EXIN_C		0x0000</div><div class='ctx'> #define LTQ_EIU_EXIN_INIC	0x0004</div><div class='ctx'> #define LTQ_EIU_EXIN_INEN	0x000C</div><div class='hunk'>@@ -37,10 +43,14 @@</div><div class='ctx'> #define LTQ_EIU_IR4		(INT_NUM_IM1_IRL0 + 1)</div><div class='ctx'> #define LTQ_EIU_IR5		(INT_NUM_IM1_IRL0 + 2)</div><div class='ctx'> #define LTQ_EIU_IR6		(INT_NUM_IM2_IRL0 + 30)</div><div class='del'>-</div><div class='add'>+#define XWAY_EXIN_COUNT		3</div><div class='ctx'> #define MAX_EIU			6</div><div class='ctx'> </div><div class='del'>-/* irqs generated by device attached to the EBU need to be acked in</div><div class='add'>+/* the performance counter */</div><div class='add'>+#define LTQ_PERF_IRQ		(INT_NUM_IM4_IRL0 + 31)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * irqs generated by devices attached to the EBU need to be acked in</div><div class='ctx'>  * a special manner</div><div class='ctx'>  */</div><div class='ctx'> #define LTQ_ICU_EBU_IRQ		22</div><div class='hunk'>@@ -51,6 +61,17 @@</div><div class='ctx'> #define ltq_eiu_w32(x, y)	ltq_w32((x), ltq_eiu_membase + (y))</div><div class='ctx'> #define ltq_eiu_r32(x)		ltq_r32(ltq_eiu_membase + (x))</div><div class='ctx'> </div><div class='add'>+/* our 2 ipi interrupts for VSMP */</div><div class='add'>+#define MIPS_CPU_IPI_RESCHED_IRQ	0</div><div class='add'>+#define MIPS_CPU_IPI_CALL_IRQ		1</div><div class='add'>+</div><div class='add'>+/* we have a cascade of 8 irqs */</div><div class='add'>+#define MIPS_CPU_IRQ_CASCADE		8</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)</div><div class='add'>+int gic_present;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static unsigned short ltq_eiu_irq[MAX_EIU] = {</div><div class='ctx'> 	LTQ_EIU_IR0,</div><div class='ctx'> 	LTQ_EIU_IR1,</div><div class='hunk'>@@ -60,64 +81,51 @@ static unsigned short ltq_eiu_irq[MAX_EIU] = {</div><div class='ctx'> 	LTQ_EIU_IR5,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct resource ltq_icu_resource = {</div><div class='del'>-	.name	= "icu",</div><div class='del'>-	.start	= LTQ_ICU_BASE_ADDR,</div><div class='del'>-	.end	= LTQ_ICU_BASE_ADDR + LTQ_ICU_SIZE - 1,</div><div class='del'>-	.flags	= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ltq_eiu_resource = {</div><div class='del'>-	.name	= "eiu",</div><div class='del'>-	.start	= LTQ_EIU_BASE_ADDR,</div><div class='del'>-	.end	= LTQ_EIU_BASE_ADDR + LTQ_ICU_SIZE - 1,</div><div class='del'>-	.flags	= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='add'>+static int exin_avail;</div><div class='ctx'> static void __iomem *ltq_icu_membase;</div><div class='ctx'> static void __iomem *ltq_eiu_membase;</div><div class='ctx'> </div><div class='ctx'> void ltq_disable_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	u32 ier = LTQ_ICU_IM0_IER;</div><div class='del'>-	int irq_nr = d-&gt;irq - INT_NUM_IRQ0;</div><div class='add'>+	int offset = d-&gt;hwirq - MIPS_CPU_IRQ_CASCADE;</div><div class='ctx'> </div><div class='del'>-	ier += LTQ_ICU_OFFSET * (irq_nr / INT_NUM_IM_OFFSET);</div><div class='del'>-	irq_nr %= INT_NUM_IM_OFFSET;</div><div class='del'>-	ltq_icu_w32(ltq_icu_r32(ier) &amp; ~(1 &lt;&lt; irq_nr), ier);</div><div class='add'>+	ier += LTQ_ICU_OFFSET * (offset / INT_NUM_IM_OFFSET);</div><div class='add'>+	offset %= INT_NUM_IM_OFFSET;</div><div class='add'>+	ltq_icu_w32(ltq_icu_r32(ier) &amp; ~BIT(offset), ier);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ltq_mask_and_ack_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	u32 ier = LTQ_ICU_IM0_IER;</div><div class='ctx'> 	u32 isr = LTQ_ICU_IM0_ISR;</div><div class='del'>-	int irq_nr = d-&gt;irq - INT_NUM_IRQ0;</div><div class='add'>+	int offset = d-&gt;hwirq - MIPS_CPU_IRQ_CASCADE;</div><div class='ctx'> </div><div class='del'>-	ier += LTQ_ICU_OFFSET * (irq_nr / INT_NUM_IM_OFFSET);</div><div class='del'>-	isr += LTQ_ICU_OFFSET * (irq_nr / INT_NUM_IM_OFFSET);</div><div class='del'>-	irq_nr %= INT_NUM_IM_OFFSET;</div><div class='del'>-	ltq_icu_w32(ltq_icu_r32(ier) &amp; ~(1 &lt;&lt; irq_nr), ier);</div><div class='del'>-	ltq_icu_w32((1 &lt;&lt; irq_nr), isr);</div><div class='add'>+	ier += LTQ_ICU_OFFSET * (offset / INT_NUM_IM_OFFSET);</div><div class='add'>+	isr += LTQ_ICU_OFFSET * (offset / INT_NUM_IM_OFFSET);</div><div class='add'>+	offset %= INT_NUM_IM_OFFSET;</div><div class='add'>+	ltq_icu_w32(ltq_icu_r32(ier) &amp; ~BIT(offset), ier);</div><div class='add'>+	ltq_icu_w32(BIT(offset), isr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ltq_ack_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	u32 isr = LTQ_ICU_IM0_ISR;</div><div class='del'>-	int irq_nr = d-&gt;irq - INT_NUM_IRQ0;</div><div class='add'>+	int offset = d-&gt;hwirq - MIPS_CPU_IRQ_CASCADE;</div><div class='ctx'> </div><div class='del'>-	isr += LTQ_ICU_OFFSET * (irq_nr / INT_NUM_IM_OFFSET);</div><div class='del'>-	irq_nr %= INT_NUM_IM_OFFSET;</div><div class='del'>-	ltq_icu_w32((1 &lt;&lt; irq_nr), isr);</div><div class='add'>+	isr += LTQ_ICU_OFFSET * (offset / INT_NUM_IM_OFFSET);</div><div class='add'>+	offset %= INT_NUM_IM_OFFSET;</div><div class='add'>+	ltq_icu_w32(BIT(offset), isr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ltq_enable_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	u32 ier = LTQ_ICU_IM0_IER;</div><div class='del'>-	int irq_nr = d-&gt;irq - INT_NUM_IRQ0;</div><div class='add'>+	int offset = d-&gt;hwirq - MIPS_CPU_IRQ_CASCADE;</div><div class='ctx'> </div><div class='del'>-	ier += LTQ_ICU_OFFSET  * (irq_nr / INT_NUM_IM_OFFSET);</div><div class='del'>-	irq_nr %= INT_NUM_IM_OFFSET;</div><div class='del'>-	ltq_icu_w32(ltq_icu_r32(ier) | (1 &lt;&lt; irq_nr), ier);</div><div class='add'>+	ier += LTQ_ICU_OFFSET  * (offset / INT_NUM_IM_OFFSET);</div><div class='add'>+	offset %= INT_NUM_IM_OFFSET;</div><div class='add'>+	ltq_icu_w32(ltq_icu_r32(ier) | BIT(offset), ier);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int ltq_startup_eiu_irq(struct irq_data *d)</div><div class='hunk'>@@ -126,15 +134,15 @@ static unsigned int ltq_startup_eiu_irq(struct irq_data *d)</div><div class='ctx'> </div><div class='ctx'> 	ltq_enable_irq(d);</div><div class='ctx'> 	for (i = 0; i &lt; MAX_EIU; i++) {</div><div class='del'>-		if (d-&gt;irq == ltq_eiu_irq[i]) {</div><div class='add'>+		if (d-&gt;hwirq == ltq_eiu_irq[i]) {</div><div class='ctx'> 			/* low level - we should really handle set_type */</div><div class='ctx'> 			ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_C) |</div><div class='ctx'> 				(0x6 &lt;&lt; (i * 4)), LTQ_EIU_EXIN_C);</div><div class='ctx'> 			/* clear all pending */</div><div class='del'>-			ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_INIC) &amp; ~(1 &lt;&lt; i),</div><div class='add'>+			ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_INIC) &amp; ~BIT(i),</div><div class='ctx'> 				LTQ_EIU_EXIN_INIC);</div><div class='ctx'> 			/* enable */</div><div class='del'>-			ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_INEN) | (1 &lt;&lt; i),</div><div class='add'>+			ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_INEN) | BIT(i),</div><div class='ctx'> 				LTQ_EIU_EXIN_INEN);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -149,9 +157,9 @@ static void ltq_shutdown_eiu_irq(struct irq_data *d)</div><div class='ctx'> </div><div class='ctx'> 	ltq_disable_irq(d);</div><div class='ctx'> 	for (i = 0; i &lt; MAX_EIU; i++) {</div><div class='del'>-		if (d-&gt;irq == ltq_eiu_irq[i]) {</div><div class='add'>+		if (d-&gt;hwirq == ltq_eiu_irq[i]) {</div><div class='ctx'> 			/* disable */</div><div class='del'>-			ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_INEN) &amp; ~(1 &lt;&lt; i),</div><div class='add'>+			ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_INEN) &amp; ~BIT(i),</div><div class='ctx'> 				LTQ_EIU_EXIN_INEN);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -188,14 +196,15 @@ static void ltq_hw_irqdispatch(int module)</div><div class='ctx'> 	if (irq == 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* silicon bug causes only the msb set to 1 to be valid. all</div><div class='add'>+	/*</div><div class='add'>+	 * silicon bug causes only the msb set to 1 to be valid. all</div><div class='ctx'> 	 * other bits might be bogus</div><div class='ctx'> 	 */</div><div class='ctx'> 	irq = __fls(irq);</div><div class='del'>-	do_IRQ((int)irq + INT_NUM_IM0_IRL0 + (INT_NUM_IM_OFFSET * module));</div><div class='add'>+	do_IRQ((int)irq + MIPS_CPU_IRQ_CASCADE + (INT_NUM_IM_OFFSET * module));</div><div class='ctx'> </div><div class='ctx'> 	/* if this is a EBU irq, we need to ack it or get a deadlock */</div><div class='del'>-	if ((irq == LTQ_ICU_EBU_IRQ) &amp;&amp; (module == 0))</div><div class='add'>+	if ((irq == LTQ_ICU_EBU_IRQ) &amp;&amp; (module == 0) &amp;&amp; LTQ_EBU_PCC_ISTAT)</div><div class='ctx'> 		ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_ISTAT) | 0x10,</div><div class='ctx'> 			LTQ_EBU_PCC_ISTAT);</div><div class='ctx'> }</div><div class='hunk'>@@ -216,6 +225,47 @@ static void ltq_hw5_irqdispatch(void)</div><div class='ctx'> 	do_IRQ(MIPS_CPU_TIMER_IRQ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MIPS_MT_SMP</div><div class='add'>+void __init arch_init_ipiirq(int irq, struct irqaction *action)</div><div class='add'>+{</div><div class='add'>+	setup_irq(irq, action);</div><div class='add'>+	irq_set_handler(irq, handle_percpu_irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ltq_sw0_irqdispatch(void)</div><div class='add'>+{</div><div class='add'>+	do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ltq_sw1_irqdispatch(void)</div><div class='add'>+{</div><div class='add'>+	do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ);</div><div class='add'>+}</div><div class='add'>+static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	scheduler_ipi();</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	smp_call_function_interrupt();</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irqaction irq_resched = {</div><div class='add'>+	.handler	= ipi_resched_interrupt,</div><div class='add'>+	.flags		= IRQF_PERCPU,</div><div class='add'>+	.name		= "IPI_resched"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct irqaction irq_call = {</div><div class='add'>+	.handler	= ipi_call_interrupt,</div><div class='add'>+	.flags		= IRQF_PERCPU,</div><div class='add'>+	.name		= "IPI_call"</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> asmlinkage void plat_irq_dispatch(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int pending = read_c0_status() &amp; read_c0_cause() &amp; ST0_IM;</div><div class='hunk'>@@ -238,45 +288,75 @@ out:</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int icu_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)</div><div class='add'>+{</div><div class='add'>+	struct irq_chip *chip = &amp;ltq_irq_type;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; exin_avail; i++)</div><div class='add'>+		if (hw == ltq_eiu_irq[i])</div><div class='add'>+			chip = &amp;ltq_eiu_type;</div><div class='add'>+</div><div class='add'>+	irq_set_chip_and_handler(hw, chip, handle_level_irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops irq_domain_ops = {</div><div class='add'>+	.xlate = irq_domain_xlate_onetwocell,</div><div class='add'>+	.map = icu_map,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct irqaction cascade = {</div><div class='ctx'> 	.handler = no_action,</div><div class='ctx'> 	.name = "cascade",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void __init arch_init_irq(void)</div><div class='add'>+int __init icu_of_init(struct device_node *node, struct device_node *parent)</div><div class='ctx'> {</div><div class='add'>+	struct device_node *eiu_node;</div><div class='add'>+	struct resource res;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (insert_resource(&amp;iomem_resource, &amp;ltq_icu_resource) &lt; 0)</div><div class='del'>-		panic("Failed to insert icu memory");</div><div class='add'>+	if (of_address_to_resource(node, 0, &amp;res))</div><div class='add'>+		panic("Failed to get icu memory range");</div><div class='ctx'> </div><div class='del'>-	if (request_mem_region(ltq_icu_resource.start,</div><div class='del'>-			resource_size(&amp;ltq_icu_resource), "icu") &lt; 0)</div><div class='del'>-		panic("Failed to request icu memory");</div><div class='add'>+	if (request_mem_region(res.start, resource_size(&amp;res), res.name) &lt; 0)</div><div class='add'>+		pr_err("Failed to request icu memory");</div><div class='ctx'> </div><div class='del'>-	ltq_icu_membase = ioremap_nocache(ltq_icu_resource.start,</div><div class='del'>-				resource_size(&amp;ltq_icu_resource));</div><div class='add'>+	ltq_icu_membase = ioremap_nocache(res.start, resource_size(&amp;res));</div><div class='ctx'> 	if (!ltq_icu_membase)</div><div class='ctx'> 		panic("Failed to remap icu memory");</div><div class='ctx'> </div><div class='del'>-	if (insert_resource(&amp;iomem_resource, &amp;ltq_eiu_resource) &lt; 0)</div><div class='del'>-		panic("Failed to insert eiu memory");</div><div class='del'>-</div><div class='del'>-	if (request_mem_region(ltq_eiu_resource.start,</div><div class='del'>-			resource_size(&amp;ltq_eiu_resource), "eiu") &lt; 0)</div><div class='del'>-		panic("Failed to request eiu memory");</div><div class='del'>-</div><div class='del'>-	ltq_eiu_membase = ioremap_nocache(ltq_eiu_resource.start,</div><div class='del'>-				resource_size(&amp;ltq_eiu_resource));</div><div class='del'>-	if (!ltq_eiu_membase)</div><div class='del'>-		panic("Failed to remap eiu memory");</div><div class='add'>+	/* the external interrupts are optional and xway only */</div><div class='add'>+	eiu_node = of_find_compatible_node(NULL, NULL, "lantiq,eiu");</div><div class='add'>+	if (eiu_node &amp;&amp; of_address_to_resource(eiu_node, 0, &amp;res)) {</div><div class='add'>+		/* find out how many external irq sources we have */</div><div class='add'>+		const __be32 *count = of_get_property(node,</div><div class='add'>+							"lantiq,count",	NULL);</div><div class='add'>+</div><div class='add'>+		if (count)</div><div class='add'>+			exin_avail = *count;</div><div class='add'>+		if (exin_avail &gt; MAX_EIU)</div><div class='add'>+			exin_avail = MAX_EIU;</div><div class='add'>+</div><div class='add'>+		if (request_mem_region(res.start, resource_size(&amp;res),</div><div class='add'>+							res.name) &lt; 0)</div><div class='add'>+			pr_err("Failed to request eiu memory");</div><div class='add'>+</div><div class='add'>+		ltq_eiu_membase = ioremap_nocache(res.start,</div><div class='add'>+							resource_size(&amp;res));</div><div class='add'>+		if (!ltq_eiu_membase)</div><div class='add'>+			panic("Failed to remap eiu memory");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* make sure all irqs are turned off by default */</div><div class='del'>-	for (i = 0; i &lt; 5; i++)</div><div class='add'>+	/* turn off all irqs by default */</div><div class='add'>+	for (i = 0; i &lt; 5; i++) {</div><div class='add'>+		/* make sure all irqs are turned off by default */</div><div class='ctx'> 		ltq_icu_w32(0, LTQ_ICU_IM0_IER + (i * LTQ_ICU_OFFSET));</div><div class='del'>-</div><div class='del'>-	/* clear all possibly pending interrupts */</div><div class='del'>-	ltq_icu_w32(~0, LTQ_ICU_IM0_ISR + (i * LTQ_ICU_OFFSET));</div><div class='add'>+		/* clear all possibly pending interrupts */</div><div class='add'>+		ltq_icu_w32(~0, LTQ_ICU_IM0_ISR + (i * LTQ_ICU_OFFSET));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mips_cpu_irq_init();</div><div class='ctx'> </div><div class='hunk'>@@ -293,20 +373,19 @@ void __init arch_init_irq(void)</div><div class='ctx'> 		set_vi_handler(7, ltq_hw5_irqdispatch);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = INT_NUM_IRQ0;</div><div class='del'>-		i &lt;= (INT_NUM_IRQ0 + (5 * INT_NUM_IM_OFFSET)); i++)</div><div class='del'>-		if ((i == LTQ_EIU_IR0) || (i == LTQ_EIU_IR1) ||</div><div class='del'>-			(i == LTQ_EIU_IR2))</div><div class='del'>-			irq_set_chip_and_handler(i, &amp;ltq_eiu_type,</div><div class='del'>-				handle_level_irq);</div><div class='del'>-		/* EIU3-5 only exist on ar9 and vr9 */</div><div class='del'>-		else if (((i == LTQ_EIU_IR3) || (i == LTQ_EIU_IR4) ||</div><div class='del'>-			(i == LTQ_EIU_IR5)) &amp;&amp; (ltq_is_ar9() || ltq_is_vr9()))</div><div class='del'>-			irq_set_chip_and_handler(i, &amp;ltq_eiu_type,</div><div class='del'>-				handle_level_irq);</div><div class='del'>-		else</div><div class='del'>-			irq_set_chip_and_handler(i, &amp;ltq_irq_type,</div><div class='del'>-				handle_level_irq);</div><div class='add'>+	irq_domain_add_linear(node, 6 * INT_NUM_IM_OFFSET,</div><div class='add'>+		&amp;irq_domain_ops, 0);</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MIPS_MT_SMP)</div><div class='add'>+	if (cpu_has_vint) {</div><div class='add'>+		pr_info("Setting up IPI vectored interrupts\n");</div><div class='add'>+		set_vi_handler(MIPS_CPU_IPI_RESCHED_IRQ, ltq_sw0_irqdispatch);</div><div class='add'>+		set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ltq_sw1_irqdispatch);</div><div class='add'>+	}</div><div class='add'>+	arch_init_ipiirq(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ,</div><div class='add'>+		&amp;irq_resched);</div><div class='add'>+	arch_init_ipiirq(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ, &amp;irq_call);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #if !defined(CONFIG_MIPS_MT_SMP) &amp;&amp; !defined(CONFIG_MIPS_MT_SMTC)</div><div class='ctx'> 	set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 |</div><div class='hunk'>@@ -315,9 +394,23 @@ void __init arch_init_irq(void)</div><div class='ctx'> 	set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ0 | IE_IRQ1 |</div><div class='ctx'> 		IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+	/* tell oprofile which irq to use */</div><div class='add'>+	cp0_perfcount_irq = LTQ_PERF_IRQ;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> unsigned int __cpuinit get_c0_compare_int(void)</div><div class='ctx'> {</div><div class='ctx'> 	return CP0_LEGACY_COMPARE_IRQ;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static struct of_device_id __initdata of_irq_ids[] = {</div><div class='add'>+	{ .compatible = "lantiq,icu", .data = icu_of_init },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init arch_init_irq(void)</div><div class='add'>+{</div><div class='add'>+	of_irq_init(of_irq_ids);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/lantiq/machtypes.h b/arch/mips/lantiq/machtypes.h<br/>deleted file mode 100644<br/>index 7e01b8c484eb..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/machtypes.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/machtypes.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _LANTIQ_MACH_H__</div><div class='del'>-#define _LANTIQ_MACH_H__</div><div class='del'>-</div><div class='del'>-#include &lt;asm/mips_machine.h&gt;</div><div class='del'>-</div><div class='del'>-enum lantiq_mach_type {</div><div class='del'>-	LTQ_MACH_GENERIC = 0,</div><div class='del'>-	LTQ_MACH_EASY50712,	/* Danube evaluation board */</div><div class='del'>-	LTQ_MACH_EASY50601,	/* Amazon SE evaluation board */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c<br/>index e34fcfd0d5ca..d185e8477fdf 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/prom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/prom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/prom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/prom.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -16,19 +17,15 @@</div><div class='ctx'> #include "prom.h"</div><div class='ctx'> #include "clk.h"</div><div class='ctx'> </div><div class='del'>-static struct ltq_soc_info soc_info;</div><div class='del'>-</div><div class='del'>-unsigned int ltq_get_cpu_ver(void)</div><div class='del'>-{</div><div class='del'>-	return soc_info.rev;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ltq_get_cpu_ver);</div><div class='add'>+/* access to the ebu needs to be locked between different drivers */</div><div class='add'>+DEFINE_SPINLOCK(ebu_lock);</div><div class='add'>+EXPORT_SYMBOL_GPL(ebu_lock);</div><div class='ctx'> </div><div class='del'>-unsigned int ltq_get_soc_type(void)</div><div class='del'>-{</div><div class='del'>-	return soc_info.type;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ltq_get_soc_type);</div><div class='add'>+/*</div><div class='add'>+ * this struct is filled by the soc specific detection code and holds</div><div class='add'>+ * information about the specific soc type, revision and name</div><div class='add'>+ */</div><div class='add'>+static struct ltq_soc_info soc_info;</div><div class='ctx'> </div><div class='ctx'> const char *get_system_type(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -45,27 +42,62 @@ static void __init prom_init_cmdline(void)</div><div class='ctx'> 	char **argv = (char **) KSEG1ADDR(fw_arg1);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	arcs_cmdline[0] = '\0';</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; argc; i++) {</div><div class='del'>-		char *p = (char *)  KSEG1ADDR(argv[i]);</div><div class='add'>+		char *p = (char *) KSEG1ADDR(argv[i]);</div><div class='ctx'> </div><div class='del'>-		if (p &amp;&amp; *p) {</div><div class='add'>+		if (CPHYSADDR(p) &amp;&amp; *p) {</div><div class='ctx'> 			strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));</div><div class='ctx'> 			strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init prom_init(void)</div><div class='add'>+void __init plat_mem_setup(void)</div><div class='ctx'> {</div><div class='del'>-	struct clk *clk;</div><div class='add'>+	ioport_resource.start = IOPORT_RESOURCE_START;</div><div class='add'>+	ioport_resource.end = IOPORT_RESOURCE_END;</div><div class='add'>+	iomem_resource.start = IOMEM_RESOURCE_START;</div><div class='add'>+	iomem_resource.end = IOMEM_RESOURCE_END;</div><div class='add'>+</div><div class='add'>+	set_io_port_base((unsigned long) KSEG1);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Load the builtin devicetree. This causes the chosen node to be</div><div class='add'>+	 * parsed resulting in our memory appearing</div><div class='add'>+	 */</div><div class='add'>+	__dt_setup_arch(&amp;__dtb_start);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init prom_init(void)</div><div class='add'>+{</div><div class='add'>+	/* call the soc specific detetcion code and get it to fill soc_info */</div><div class='ctx'> 	ltq_soc_detect(&amp;soc_info);</div><div class='del'>-	clk_init();</div><div class='del'>-	clk = clk_get(0, "cpu");</div><div class='del'>-	snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev1.%d",</div><div class='del'>-		soc_info.name, soc_info.rev);</div><div class='del'>-	clk_put(clk);</div><div class='add'>+	snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev %s",</div><div class='add'>+		soc_info.name, soc_info.rev_type);</div><div class='ctx'> 	soc_info.sys_type[LTQ_SYS_TYPE_LEN - 1] = '\0';</div><div class='ctx'> 	pr_info("SoC: %s\n", soc_info.sys_type);</div><div class='ctx'> 	prom_init_cmdline();</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MIPS_MT_SMP)</div><div class='add'>+	if (register_vsmp_smp_ops())</div><div class='add'>+		panic("failed to register_vsmp_smp_ops()");</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int __init plat_of_setup(void)</div><div class='add'>+{</div><div class='add'>+	static struct of_device_id of_ids[3];</div><div class='add'>+</div><div class='add'>+	if (!of_have_populated_dt())</div><div class='add'>+		panic("device tree not present");</div><div class='add'>+</div><div class='add'>+	strncpy(of_ids[0].compatible, soc_info.compatible,</div><div class='add'>+		sizeof(of_ids[0].compatible));</div><div class='add'>+	strncpy(of_ids[1].compatible, "simple-bus",</div><div class='add'>+		sizeof(of_ids[1].compatible));</div><div class='add'>+	return of_platform_bus_probe(NULL, of_ids, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+arch_initcall(plat_of_setup);</div><div class='head'>diff --git a/arch/mips/lantiq/prom.h b/arch/mips/lantiq/prom.h<br/>index b4229d94280f..a3fa1a2bfaae 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/prom.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/prom.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/prom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/prom.h</a></div><div class='hunk'>@@ -10,16 +10,22 @@</div><div class='ctx'> #define _LTQ_PROM_H__</div><div class='ctx'> </div><div class='ctx'> #define LTQ_SYS_TYPE_LEN	0x100</div><div class='add'>+#define LTQ_SYS_REV_LEN         0x10</div><div class='ctx'> </div><div class='ctx'> struct ltq_soc_info {</div><div class='ctx'> 	unsigned char *name;</div><div class='ctx'> 	unsigned int rev;</div><div class='add'>+	unsigned char rev_type[LTQ_SYS_REV_LEN];</div><div class='add'>+	unsigned int srev;</div><div class='ctx'> 	unsigned int partnum;</div><div class='ctx'> 	unsigned int type;</div><div class='ctx'> 	unsigned char sys_type[LTQ_SYS_TYPE_LEN];</div><div class='add'>+	unsigned char *compatible;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern void ltq_soc_detect(struct ltq_soc_info *i);</div><div class='del'>-extern void ltq_soc_setup(void);</div><div class='add'>+extern void ltq_soc_init(void);</div><div class='add'>+</div><div class='add'>+extern struct boot_param_header __dtb_start;</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/mips/lantiq/setup.c b/arch/mips/lantiq/setup.c<br/>deleted file mode 100644<br/>index 1ff6c9d6cb93..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/setup.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,66 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;asm/bootinfo.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-</div><div class='del'>-#include "machtypes.h"</div><div class='del'>-#include "devices.h"</div><div class='del'>-#include "prom.h"</div><div class='del'>-</div><div class='del'>-void __init plat_mem_setup(void)</div><div class='del'>-{</div><div class='del'>-	/* assume 16M as default incase uboot fails to pass proper ramsize */</div><div class='del'>-	unsigned long memsize = 16;</div><div class='del'>-	char **envp = (char **) KSEG1ADDR(fw_arg2);</div><div class='del'>-</div><div class='del'>-	ioport_resource.start = IOPORT_RESOURCE_START;</div><div class='del'>-	ioport_resource.end = IOPORT_RESOURCE_END;</div><div class='del'>-	iomem_resource.start = IOMEM_RESOURCE_START;</div><div class='del'>-	iomem_resource.end = IOMEM_RESOURCE_END;</div><div class='del'>-</div><div class='del'>-	set_io_port_base((unsigned long) KSEG1);</div><div class='del'>-</div><div class='del'>-	while (*envp) {</div><div class='del'>-		char *e = (char *)KSEG1ADDR(*envp);</div><div class='del'>-		if (!strncmp(e, "memsize=", 8)) {</div><div class='del'>-			e += 8;</div><div class='del'>-			if (strict_strtoul(e, 0, &amp;memsize))</div><div class='del'>-				pr_warn("bad memsize specified\n");</div><div class='del'>-		}</div><div class='del'>-		envp++;</div><div class='del'>-	}</div><div class='del'>-	memsize *= 1024 * 1024;</div><div class='del'>-	add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init</div><div class='del'>-lantiq_setup(void)</div><div class='del'>-{</div><div class='del'>-	ltq_soc_setup();</div><div class='del'>-	mips_machine_setup();</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-arch_initcall(lantiq_setup);</div><div class='del'>-</div><div class='del'>-static void __init</div><div class='del'>-lantiq_generic_init(void)</div><div class='del'>-{</div><div class='del'>-	/* Nothing to do */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MIPS_MACHINE(LTQ_MACH_GENERIC,</div><div class='del'>-	     "Generic",</div><div class='del'>-	     "Generic Lantiq based board",</div><div class='del'>-	     lantiq_generic_init);</div><div class='head'>diff --git a/arch/mips/lantiq/xway/Kconfig b/arch/mips/lantiq/xway/Kconfig<br/>deleted file mode 100644<br/>index 2b857de36620..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-if SOC_XWAY</div><div class='del'>-</div><div class='del'>-menu "MIPS Machine"</div><div class='del'>-</div><div class='del'>-config LANTIQ_MACH_EASY50712</div><div class='del'>-	bool "Easy50712 - Danube"</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-endmenu</div><div class='del'>-</div><div class='del'>-endif</div><div class='del'>-</div><div class='del'>-if SOC_AMAZON_SE</div><div class='del'>-</div><div class='del'>-menu "MIPS Machine"</div><div class='del'>-</div><div class='del'>-config LANTIQ_MACH_EASY50601</div><div class='del'>-	bool "Easy50601 - Amazon SE"</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-endmenu</div><div class='del'>-</div><div class='del'>-endif</div><div class='head'>diff --git a/arch/mips/lantiq/xway/Makefile b/arch/mips/lantiq/xway/Makefile<br/>index c517f2e77563..dc3194f6ee42 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/xway/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/Makefile</a></div><div class='hunk'>@@ -1,7 +1 @@</div><div class='del'>-obj-y := pmu.o ebu.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_SOC_XWAY) += clk-xway.o prom-xway.o setup-xway.o</div><div class='del'>-obj-$(CONFIG_SOC_AMAZON_SE) += clk-ase.o prom-ase.o setup-ase.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o</div><div class='del'>-obj-$(CONFIG_LANTIQ_MACH_EASY50601) += mach-easy50601.o</div><div class='add'>+obj-y := prom.o sysctrl.o clk.o reset.o gpio.o dma.o</div><div class='head'>diff --git a/arch/mips/lantiq/xway/clk-ase.c b/arch/mips/lantiq/xway/clk-ase.c<br/>deleted file mode 100644<br/>index 652258309c9c..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/clk-ase.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/clk-ase.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,48 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2011 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/time.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/div64.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-</div><div class='del'>-/* cgu registers */</div><div class='del'>-#define LTQ_CGU_SYS	0x0010</div><div class='del'>-</div><div class='del'>-unsigned int ltq_get_io_region_clock(void)</div><div class='del'>-{</div><div class='del'>-	return CLOCK_133M;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ltq_get_io_region_clock);</div><div class='del'>-</div><div class='del'>-unsigned int ltq_get_fpi_bus_clock(int fpi)</div><div class='del'>-{</div><div class='del'>-	return CLOCK_133M;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ltq_get_fpi_bus_clock);</div><div class='del'>-</div><div class='del'>-unsigned int ltq_get_cpu_hz(void)</div><div class='del'>-{</div><div class='del'>-	if (ltq_cgu_r32(LTQ_CGU_SYS) &amp; (1 &lt;&lt; 5))</div><div class='del'>-		return CLOCK_266M;</div><div class='del'>-	else</div><div class='del'>-		return CLOCK_133M;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ltq_get_cpu_hz);</div><div class='del'>-</div><div class='del'>-unsigned int ltq_get_fpi_hz(void)</div><div class='del'>-{</div><div class='del'>-	return CLOCK_133M;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ltq_get_fpi_hz);</div><div class='head'>diff --git a/arch/mips/lantiq/xway/clk-xway.c b/arch/mips/lantiq/xway/clk-xway.c<br/>deleted file mode 100644<br/>index 696b1a3e0642..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/clk-xway.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/clk-xway.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,223 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/time.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/div64.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-</div><div class='del'>-static unsigned int ltq_ram_clocks[] = {</div><div class='del'>-	CLOCK_167M, CLOCK_133M, CLOCK_111M, CLOCK_83M };</div><div class='del'>-#define DDR_HZ ltq_ram_clocks[ltq_cgu_r32(LTQ_CGU_SYS) &amp; 0x3]</div><div class='del'>-</div><div class='del'>-#define BASIC_FREQUENCY_1	35328000</div><div class='del'>-#define BASIC_FREQUENCY_2	36000000</div><div class='del'>-#define BASIS_REQUENCY_USB	12000000</div><div class='del'>-</div><div class='del'>-#define GET_BITS(x, msb, lsb) \</div><div class='del'>-	(((x) &amp; ((1 &lt;&lt; ((msb) + 1)) - 1)) &gt;&gt; (lsb))</div><div class='del'>-</div><div class='del'>-#define LTQ_CGU_PLL0_CFG	0x0004</div><div class='del'>-#define LTQ_CGU_PLL1_CFG	0x0008</div><div class='del'>-#define LTQ_CGU_PLL2_CFG	0x000C</div><div class='del'>-#define LTQ_CGU_SYS		0x0010</div><div class='del'>-#define LTQ_CGU_UPDATE		0x0014</div><div class='del'>-#define LTQ_CGU_IF_CLK		0x0018</div><div class='del'>-#define LTQ_CGU_OSC_CON		0x001C</div><div class='del'>-#define LTQ_CGU_SMD		0x0020</div><div class='del'>-#define LTQ_CGU_CT1SR		0x0028</div><div class='del'>-#define LTQ_CGU_CT2SR		0x002C</div><div class='del'>-#define LTQ_CGU_PCMCR		0x0030</div><div class='del'>-#define LTQ_CGU_PCI_CR		0x0034</div><div class='del'>-#define LTQ_CGU_PD_PC		0x0038</div><div class='del'>-#define LTQ_CGU_FMR		0x003C</div><div class='del'>-</div><div class='del'>-#define CGU_PLL0_PHASE_DIVIDER_ENABLE	\</div><div class='del'>-	(ltq_cgu_r32(LTQ_CGU_PLL0_CFG) &amp; (1 &lt;&lt; 31))</div><div class='del'>-#define CGU_PLL0_BYPASS			\</div><div class='del'>-	(ltq_cgu_r32(LTQ_CGU_PLL0_CFG) &amp; (1 &lt;&lt; 30))</div><div class='del'>-#define CGU_PLL0_CFG_DSMSEL		\</div><div class='del'>-	(ltq_cgu_r32(LTQ_CGU_PLL0_CFG) &amp; (1 &lt;&lt; 28))</div><div class='del'>-#define CGU_PLL0_CFG_FRAC_EN		\</div><div class='del'>-	(ltq_cgu_r32(LTQ_CGU_PLL0_CFG) &amp; (1 &lt;&lt; 27))</div><div class='del'>-#define CGU_PLL1_SRC			\</div><div class='del'>-	(ltq_cgu_r32(LTQ_CGU_PLL1_CFG) &amp; (1 &lt;&lt; 31))</div><div class='del'>-#define CGU_PLL2_PHASE_DIVIDER_ENABLE	\</div><div class='del'>-	(ltq_cgu_r32(LTQ_CGU_PLL2_CFG) &amp; (1 &lt;&lt; 20))</div><div class='del'>-#define CGU_SYS_FPI_SEL			(1 &lt;&lt; 6)</div><div class='del'>-#define CGU_SYS_DDR_SEL			0x3</div><div class='del'>-#define CGU_PLL0_SRC			(1 &lt;&lt; 29)</div><div class='del'>-</div><div class='del'>-#define CGU_PLL0_CFG_PLLK	GET_BITS(ltq_cgu_r32(LTQ_CGU_PLL0_CFG), 26, 17)</div><div class='del'>-#define CGU_PLL0_CFG_PLLN	GET_BITS(ltq_cgu_r32(LTQ_CGU_PLL0_CFG), 12, 6)</div><div class='del'>-#define CGU_PLL0_CFG_PLLM	GET_BITS(ltq_cgu_r32(LTQ_CGU_PLL0_CFG), 5, 2)</div><div class='del'>-#define CGU_PLL2_SRC		GET_BITS(ltq_cgu_r32(LTQ_CGU_PLL2_CFG), 18, 17)</div><div class='del'>-#define CGU_PLL2_CFG_INPUT_DIV	GET_BITS(ltq_cgu_r32(LTQ_CGU_PLL2_CFG), 16, 13)</div><div class='del'>-</div><div class='del'>-static unsigned int ltq_get_pll0_fdiv(void);</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_input_clock(int pll)</div><div class='del'>-{</div><div class='del'>-	switch (pll) {</div><div class='del'>-	case 0:</div><div class='del'>-		if (ltq_cgu_r32(LTQ_CGU_PLL0_CFG) &amp; CGU_PLL0_SRC)</div><div class='del'>-			return BASIS_REQUENCY_USB;</div><div class='del'>-		else if (CGU_PLL0_PHASE_DIVIDER_ENABLE)</div><div class='del'>-			return BASIC_FREQUENCY_1;</div><div class='del'>-		else</div><div class='del'>-			return BASIC_FREQUENCY_2;</div><div class='del'>-	case 1:</div><div class='del'>-		if (CGU_PLL1_SRC)</div><div class='del'>-			return BASIS_REQUENCY_USB;</div><div class='del'>-		else if (CGU_PLL0_PHASE_DIVIDER_ENABLE)</div><div class='del'>-			return BASIC_FREQUENCY_1;</div><div class='del'>-		else</div><div class='del'>-			return BASIC_FREQUENCY_2;</div><div class='del'>-	case 2:</div><div class='del'>-		switch (CGU_PLL2_SRC) {</div><div class='del'>-		case 0:</div><div class='del'>-			return ltq_get_pll0_fdiv();</div><div class='del'>-		case 1:</div><div class='del'>-			return CGU_PLL2_PHASE_DIVIDER_ENABLE ?</div><div class='del'>-				BASIC_FREQUENCY_1 :</div><div class='del'>-				BASIC_FREQUENCY_2;</div><div class='del'>-		case 2:</div><div class='del'>-			return BASIS_REQUENCY_USB;</div><div class='del'>-		}</div><div class='del'>-	default:</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int cal_dsm(int pll, unsigned int num, unsigned int den)</div><div class='del'>-{</div><div class='del'>-	u64 res, clock = get_input_clock(pll);</div><div class='del'>-</div><div class='del'>-	res = num * clock;</div><div class='del'>-	do_div(res, den);</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int mash_dsm(int pll, unsigned int M, unsigned int N,</div><div class='del'>-	unsigned int K)</div><div class='del'>-{</div><div class='del'>-	unsigned int num = ((N + 1) &lt;&lt; 10) + K;</div><div class='del'>-	unsigned int den = (M + 1) &lt;&lt; 10;</div><div class='del'>-</div><div class='del'>-	return cal_dsm(pll, num, den);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int ssff_dsm_1(int pll, unsigned int M, unsigned int N,</div><div class='del'>-	unsigned int K)</div><div class='del'>-{</div><div class='del'>-	unsigned int num = ((N + 1) &lt;&lt; 11) + K + 512;</div><div class='del'>-	unsigned int den = (M + 1) &lt;&lt; 11;</div><div class='del'>-</div><div class='del'>-	return cal_dsm(pll, num, den);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int ssff_dsm_2(int pll, unsigned int M, unsigned int N,</div><div class='del'>-	unsigned int K)</div><div class='del'>-{</div><div class='del'>-	unsigned int num = K &gt;= 512 ?</div><div class='del'>-		((N + 1) &lt;&lt; 12) + K - 512 : ((N + 1) &lt;&lt; 12) + K + 3584;</div><div class='del'>-	unsigned int den = (M + 1) &lt;&lt; 12;</div><div class='del'>-</div><div class='del'>-	return cal_dsm(pll, num, den);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int dsm(int pll, unsigned int M, unsigned int N,</div><div class='del'>-	unsigned int K, unsigned int dsmsel, unsigned int phase_div_en)</div><div class='del'>-{</div><div class='del'>-	if (!dsmsel)</div><div class='del'>-		return mash_dsm(pll, M, N, K);</div><div class='del'>-	else if (!phase_div_en)</div><div class='del'>-		return mash_dsm(pll, M, N, K);</div><div class='del'>-	else</div><div class='del'>-		return ssff_dsm_2(pll, M, N, K);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int ltq_get_pll0_fosc(void)</div><div class='del'>-{</div><div class='del'>-	if (CGU_PLL0_BYPASS)</div><div class='del'>-		return get_input_clock(0);</div><div class='del'>-	else</div><div class='del'>-		return !CGU_PLL0_CFG_FRAC_EN</div><div class='del'>-			? dsm(0, CGU_PLL0_CFG_PLLM, CGU_PLL0_CFG_PLLN, 0,</div><div class='del'>-				CGU_PLL0_CFG_DSMSEL,</div><div class='del'>-				CGU_PLL0_PHASE_DIVIDER_ENABLE)</div><div class='del'>-			: dsm(0, CGU_PLL0_CFG_PLLM, CGU_PLL0_CFG_PLLN,</div><div class='del'>-				CGU_PLL0_CFG_PLLK, CGU_PLL0_CFG_DSMSEL,</div><div class='del'>-				CGU_PLL0_PHASE_DIVIDER_ENABLE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int ltq_get_pll0_fdiv(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int div = CGU_PLL2_CFG_INPUT_DIV + 1;</div><div class='del'>-</div><div class='del'>-	return (ltq_get_pll0_fosc() + (div &gt;&gt; 1)) / div;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned int ltq_get_io_region_clock(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int ret = ltq_get_pll0_fosc();</div><div class='del'>-</div><div class='del'>-	switch (ltq_cgu_r32(LTQ_CGU_PLL2_CFG) &amp; CGU_SYS_DDR_SEL) {</div><div class='del'>-	default:</div><div class='del'>-	case 0:</div><div class='del'>-		return (ret + 1) / 2;</div><div class='del'>-	case 1:</div><div class='del'>-		return (ret * 2 + 2) / 5;</div><div class='del'>-	case 2:</div><div class='del'>-		return (ret + 1) / 3;</div><div class='del'>-	case 3:</div><div class='del'>-		return (ret + 2) / 4;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ltq_get_io_region_clock);</div><div class='del'>-</div><div class='del'>-unsigned int ltq_get_fpi_bus_clock(int fpi)</div><div class='del'>-{</div><div class='del'>-	unsigned int ret = ltq_get_io_region_clock();</div><div class='del'>-</div><div class='del'>-	if ((fpi == 2) &amp;&amp; (ltq_cgu_r32(LTQ_CGU_SYS) &amp; CGU_SYS_FPI_SEL))</div><div class='del'>-		ret &gt;&gt;= 1;</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ltq_get_fpi_bus_clock);</div><div class='del'>-</div><div class='del'>-unsigned int ltq_get_cpu_hz(void)</div><div class='del'>-{</div><div class='del'>-	switch (ltq_cgu_r32(LTQ_CGU_SYS) &amp; 0xc) {</div><div class='del'>-	case 0:</div><div class='del'>-		return CLOCK_333M;</div><div class='del'>-	case 4:</div><div class='del'>-		return DDR_HZ;</div><div class='del'>-	case 8:</div><div class='del'>-		return DDR_HZ &lt;&lt; 1;</div><div class='del'>-	default:</div><div class='del'>-		return DDR_HZ &gt;&gt; 1;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ltq_get_cpu_hz);</div><div class='del'>-</div><div class='del'>-unsigned int ltq_get_fpi_hz(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int ddr_clock = DDR_HZ;</div><div class='del'>-</div><div class='del'>-	if (ltq_cgu_r32(LTQ_CGU_SYS) &amp; 0x40)</div><div class='del'>-		return ddr_clock &gt;&gt; 1;</div><div class='del'>-	return ddr_clock;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ltq_get_fpi_hz);</div><div class='head'>diff --git a/arch/mips/lantiq/xway/clk.c b/arch/mips/lantiq/xway/clk.c<br/>new file mode 100644<br/>index 000000000000..9aa17f79a742<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/xway/clk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/clk.c</a></div><div class='hunk'>@@ -0,0 +1,151 @@</div><div class='add'>+/*</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/time.h&gt;</div><div class='add'>+#include &lt;asm/irq.h&gt;</div><div class='add'>+#include &lt;asm/div64.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;lantiq_soc.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../clk.h"</div><div class='add'>+</div><div class='add'>+static unsigned int ram_clocks[] = {</div><div class='add'>+	CLOCK_167M, CLOCK_133M, CLOCK_111M, CLOCK_83M };</div><div class='add'>+#define DDR_HZ ram_clocks[ltq_cgu_r32(CGU_SYS) &amp; 0x3]</div><div class='add'>+</div><div class='add'>+/* legacy xway clock */</div><div class='add'>+#define CGU_SYS			0x10</div><div class='add'>+</div><div class='add'>+/* vr9 clock */</div><div class='add'>+#define CGU_SYS_VR9		0x0c</div><div class='add'>+#define CGU_IF_CLK_VR9		0x24</div><div class='add'>+</div><div class='add'>+unsigned long ltq_danube_fpi_hz(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long ddr_clock = DDR_HZ;</div><div class='add'>+</div><div class='add'>+	if (ltq_cgu_r32(CGU_SYS) &amp; 0x40)</div><div class='add'>+		return ddr_clock &gt;&gt; 1;</div><div class='add'>+	return ddr_clock;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long ltq_danube_cpu_hz(void)</div><div class='add'>+{</div><div class='add'>+	switch (ltq_cgu_r32(CGU_SYS) &amp; 0xc) {</div><div class='add'>+	case 0:</div><div class='add'>+		return CLOCK_333M;</div><div class='add'>+	case 4:</div><div class='add'>+		return DDR_HZ;</div><div class='add'>+	case 8:</div><div class='add'>+		return DDR_HZ &lt;&lt; 1;</div><div class='add'>+	default:</div><div class='add'>+		return DDR_HZ &gt;&gt; 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long ltq_ar9_sys_hz(void)</div><div class='add'>+{</div><div class='add'>+	if (((ltq_cgu_r32(CGU_SYS) &gt;&gt; 3) &amp; 0x3) == 0x2)</div><div class='add'>+		return CLOCK_393M;</div><div class='add'>+	return CLOCK_333M;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long ltq_ar9_fpi_hz(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long sys = ltq_ar9_sys_hz();</div><div class='add'>+</div><div class='add'>+	if (ltq_cgu_r32(CGU_SYS) &amp; BIT(0))</div><div class='add'>+		return sys;</div><div class='add'>+	return sys &gt;&gt; 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long ltq_ar9_cpu_hz(void)</div><div class='add'>+{</div><div class='add'>+	if (ltq_cgu_r32(CGU_SYS) &amp; BIT(2))</div><div class='add'>+		return ltq_ar9_fpi_hz();</div><div class='add'>+	else</div><div class='add'>+		return ltq_ar9_sys_hz();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long ltq_vr9_cpu_hz(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int cpu_sel;</div><div class='add'>+	unsigned long clk;</div><div class='add'>+</div><div class='add'>+	cpu_sel = (ltq_cgu_r32(CGU_SYS_VR9) &gt;&gt; 4) &amp; 0xf;</div><div class='add'>+</div><div class='add'>+	switch (cpu_sel) {</div><div class='add'>+	case 0:</div><div class='add'>+		clk = CLOCK_600M;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		clk = CLOCK_500M;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		clk = CLOCK_393M;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		clk = CLOCK_333M;</div><div class='add'>+		break;</div><div class='add'>+	case 5:</div><div class='add'>+	case 6:</div><div class='add'>+		clk = CLOCK_196_608M;</div><div class='add'>+		break;</div><div class='add'>+	case 7:</div><div class='add'>+		clk = CLOCK_167M;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+	case 8:</div><div class='add'>+	case 9:</div><div class='add'>+		clk = CLOCK_125M;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		clk = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long ltq_vr9_fpi_hz(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int ocp_sel, cpu_clk;</div><div class='add'>+	unsigned long clk;</div><div class='add'>+</div><div class='add'>+	cpu_clk = ltq_vr9_cpu_hz();</div><div class='add'>+	ocp_sel = ltq_cgu_r32(CGU_SYS_VR9) &amp; 0x3;</div><div class='add'>+</div><div class='add'>+	switch (ocp_sel) {</div><div class='add'>+	case 0:</div><div class='add'>+		/* OCP ratio 1 */</div><div class='add'>+		clk = cpu_clk;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		/* OCP ratio 2 */</div><div class='add'>+		clk = cpu_clk / 2;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		/* OCP ratio 2.5 */</div><div class='add'>+		clk = (cpu_clk * 2) / 5;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		/* OCP ratio 3 */</div><div class='add'>+		clk = cpu_clk / 3;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		clk = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/lantiq/xway/devices.c b/arch/mips/lantiq/xway/devices.c<br/>deleted file mode 100644<br/>index d614aa7ff07f..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/devices.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,119 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/mtd/physmap.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/reboot.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/leds.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/time.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/bootinfo.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-#include &lt;lantiq_irq.h&gt;</div><div class='del'>-#include &lt;lantiq_platform.h&gt;</div><div class='del'>-</div><div class='del'>-#include "devices.h"</div><div class='del'>-</div><div class='del'>-/* gpio */</div><div class='del'>-static struct resource ltq_gpio_resource[] = {</div><div class='del'>-	{</div><div class='del'>-		.name	= "gpio0",</div><div class='del'>-		.start  = LTQ_GPIO0_BASE_ADDR,</div><div class='del'>-		.end    = LTQ_GPIO0_BASE_ADDR + LTQ_GPIO_SIZE - 1,</div><div class='del'>-		.flags  = IORESOURCE_MEM,</div><div class='del'>-	}, {</div><div class='del'>-		.name	= "gpio1",</div><div class='del'>-		.start  = LTQ_GPIO1_BASE_ADDR,</div><div class='del'>-		.end    = LTQ_GPIO1_BASE_ADDR + LTQ_GPIO_SIZE - 1,</div><div class='del'>-		.flags  = IORESOURCE_MEM,</div><div class='del'>-	}, {</div><div class='del'>-		.name	= "gpio2",</div><div class='del'>-		.start  = LTQ_GPIO2_BASE_ADDR,</div><div class='del'>-		.end    = LTQ_GPIO2_BASE_ADDR + LTQ_GPIO_SIZE - 1,</div><div class='del'>-		.flags  = IORESOURCE_MEM,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ltq_register_gpio(void)</div><div class='del'>-{</div><div class='del'>-	platform_device_register_simple("ltq_gpio", 0,</div><div class='del'>-		&amp;ltq_gpio_resource[0], 1);</div><div class='del'>-	platform_device_register_simple("ltq_gpio", 1,</div><div class='del'>-		&amp;ltq_gpio_resource[1], 1);</div><div class='del'>-</div><div class='del'>-	/* AR9 and VR9 have an extra gpio block */</div><div class='del'>-	if (ltq_is_ar9() || ltq_is_vr9()) {</div><div class='del'>-		platform_device_register_simple("ltq_gpio", 2,</div><div class='del'>-			&amp;ltq_gpio_resource[2], 1);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* serial to parallel conversion */</div><div class='del'>-static struct resource ltq_stp_resource = {</div><div class='del'>-	.name   = "stp",</div><div class='del'>-	.start  = LTQ_STP_BASE_ADDR,</div><div class='del'>-	.end    = LTQ_STP_BASE_ADDR + LTQ_STP_SIZE - 1,</div><div class='del'>-	.flags  = IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ltq_register_gpio_stp(void)</div><div class='del'>-{</div><div class='del'>-	platform_device_register_simple("ltq_stp", 0, &amp;ltq_stp_resource, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* asc ports - amazon se has its own serial mapping */</div><div class='del'>-static struct resource ltq_ase_asc_resources[] = {</div><div class='del'>-	{</div><div class='del'>-		.name	= "asc0",</div><div class='del'>-		.start  = LTQ_ASC1_BASE_ADDR,</div><div class='del'>-		.end    = LTQ_ASC1_BASE_ADDR + LTQ_ASC_SIZE - 1,</div><div class='del'>-		.flags  = IORESOURCE_MEM,</div><div class='del'>-	},</div><div class='del'>-	IRQ_RES(tx, LTQ_ASC_ASE_TIR),</div><div class='del'>-	IRQ_RES(rx, LTQ_ASC_ASE_RIR),</div><div class='del'>-	IRQ_RES(err, LTQ_ASC_ASE_EIR),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init ltq_register_ase_asc(void)</div><div class='del'>-{</div><div class='del'>-	platform_device_register_simple("ltq_asc", 0,</div><div class='del'>-		ltq_ase_asc_resources, ARRAY_SIZE(ltq_ase_asc_resources));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* ethernet */</div><div class='del'>-static struct resource ltq_etop_resources = {</div><div class='del'>-	.name	= "etop",</div><div class='del'>-	.start	= LTQ_ETOP_BASE_ADDR,</div><div class='del'>-	.end	= LTQ_ETOP_BASE_ADDR + LTQ_ETOP_SIZE - 1,</div><div class='del'>-	.flags	= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_device ltq_etop = {</div><div class='del'>-	.name		= "ltq_etop",</div><div class='del'>-	.resource	= &amp;ltq_etop_resources,</div><div class='del'>-	.num_resources	= 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init</div><div class='del'>-ltq_register_etop(struct ltq_eth_data *eth)</div><div class='del'>-{</div><div class='del'>-	if (eth) {</div><div class='del'>-		ltq_etop.dev.platform_data = eth;</div><div class='del'>-		platform_device_register(&amp;ltq_etop);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/lantiq/xway/devices.h b/arch/mips/lantiq/xway/devices.h<br/>deleted file mode 100644<br/>index e90493471bc1..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/devices.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/devices.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _LTQ_DEVICES_XWAY_H__</div><div class='del'>-#define _LTQ_DEVICES_XWAY_H__</div><div class='del'>-</div><div class='del'>-#include "../devices.h"</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-</div><div class='del'>-extern void ltq_register_gpio(void);</div><div class='del'>-extern void ltq_register_gpio_stp(void);</div><div class='del'>-extern void ltq_register_ase_asc(void);</div><div class='del'>-extern void ltq_register_etop(struct ltq_eth_data *eth);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c<br/>index b210e936c7c3..55d2c4fa4714 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/xway/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/dma.c</a></div><div class='hunk'>@@ -19,7 +19,8 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;lantiq_soc.h&gt;</div><div class='ctx'> #include &lt;xway_dma.h&gt;</div><div class='hunk'>@@ -55,13 +56,6 @@</div><div class='ctx'> #define ltq_dma_w32_mask(x, y, z)	ltq_w32_mask(x, y, \</div><div class='ctx'> 						ltq_dma_membase + (z))</div><div class='ctx'> </div><div class='del'>-static struct resource ltq_dma_resource = {</div><div class='del'>-	.name	= "dma",</div><div class='del'>-	.start	= LTQ_DMA_BASE_ADDR,</div><div class='del'>-	.end	= LTQ_DMA_BASE_ADDR + LTQ_DMA_SIZE - 1,</div><div class='del'>-	.flags  = IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void __iomem *ltq_dma_membase;</div><div class='ctx'> </div><div class='ctx'> void</div><div class='hunk'>@@ -215,27 +209,28 @@ ltq_dma_init_port(int p)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ltq_dma_init_port);</div><div class='ctx'> </div><div class='del'>-int __init</div><div class='del'>-ltq_dma_init(void)</div><div class='add'>+static int __devinit</div><div class='add'>+ltq_dma_init(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct resource *res;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	/* insert and request the memory region */</div><div class='del'>-	if (insert_resource(&amp;iomem_resource, &amp;ltq_dma_resource) &lt; 0)</div><div class='del'>-		panic("Failed to insert dma memory");</div><div class='del'>-</div><div class='del'>-	if (request_mem_region(ltq_dma_resource.start,</div><div class='del'>-			resource_size(&amp;ltq_dma_resource), "dma") &lt; 0)</div><div class='del'>-		panic("Failed to request dma memory");</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res)</div><div class='add'>+		panic("Failed to get dma resource");</div><div class='ctx'> </div><div class='ctx'> 	/* remap dma register range */</div><div class='del'>-	ltq_dma_membase = ioremap_nocache(ltq_dma_resource.start,</div><div class='del'>-				resource_size(&amp;ltq_dma_resource));</div><div class='add'>+	ltq_dma_membase = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='ctx'> 	if (!ltq_dma_membase)</div><div class='del'>-		panic("Failed to remap dma memory");</div><div class='add'>+		panic("Failed to remap dma resource");</div><div class='ctx'> </div><div class='ctx'> 	/* power up and reset the dma engine */</div><div class='del'>-	ltq_pmu_enable(PMU_DMA);</div><div class='add'>+	clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		panic("Failed to get dma clock");</div><div class='add'>+</div><div class='add'>+	clk_enable(clk);</div><div class='ctx'> 	ltq_dma_w32_mask(0, DMA_RESET, LTQ_DMA_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	/* disable all interrupts */</div><div class='hunk'>@@ -248,7 +243,29 @@ ltq_dma_init(void)</div><div class='ctx'> 		ltq_dma_w32(DMA_POLL | DMA_CLK_DIV4, LTQ_DMA_CPOLL);</div><div class='ctx'> 		ltq_dma_w32_mask(DMA_CHAN_ON, 0, LTQ_DMA_CCTRL);</div><div class='ctx'> 	}</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev, "init done\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-postcore_initcall(ltq_dma_init);</div><div class='add'>+static const struct of_device_id dma_match[] = {</div><div class='add'>+	{ .compatible = "lantiq,dma-xway" },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, dma_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver dma_driver = {</div><div class='add'>+	.probe = ltq_dma_init,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "dma-xway",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = dma_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __init</div><div class='add'>+dma_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;dma_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+postcore_initcall(dma_init);</div><div class='head'>diff --git a/arch/mips/lantiq/xway/ebu.c b/arch/mips/lantiq/xway/ebu.c<br/>deleted file mode 100644<br/>index 862e3e830680..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/ebu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/ebu.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,52 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  EBU - the external bus unit attaches PCI, NOR and NAND</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-</div><div class='del'>-/* all access to the ebu must be locked */</div><div class='del'>-DEFINE_SPINLOCK(ebu_lock);</div><div class='del'>-EXPORT_SYMBOL_GPL(ebu_lock);</div><div class='del'>-</div><div class='del'>-static struct resource ltq_ebu_resource = {</div><div class='del'>-	.name	= "ebu",</div><div class='del'>-	.start	= LTQ_EBU_BASE_ADDR,</div><div class='del'>-	.end	= LTQ_EBU_BASE_ADDR + LTQ_EBU_SIZE - 1,</div><div class='del'>-	.flags	= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* remapped base addr of the clock unit and external bus unit */</div><div class='del'>-void __iomem *ltq_ebu_membase;</div><div class='del'>-</div><div class='del'>-static int __init lantiq_ebu_init(void)</div><div class='del'>-{</div><div class='del'>-	/* insert and request the memory region */</div><div class='del'>-	if (insert_resource(&amp;iomem_resource, &amp;ltq_ebu_resource) &lt; 0)</div><div class='del'>-		panic("Failed to insert ebu memory");</div><div class='del'>-</div><div class='del'>-	if (request_mem_region(ltq_ebu_resource.start,</div><div class='del'>-			resource_size(&amp;ltq_ebu_resource), "ebu") &lt; 0)</div><div class='del'>-		panic("Failed to request ebu memory");</div><div class='del'>-</div><div class='del'>-	/* remap ebu register range */</div><div class='del'>-	ltq_ebu_membase = ioremap_nocache(ltq_ebu_resource.start,</div><div class='del'>-				resource_size(&amp;ltq_ebu_resource));</div><div class='del'>-	if (!ltq_ebu_membase)</div><div class='del'>-		panic("Failed to remap ebu memory");</div><div class='del'>-</div><div class='del'>-	/* make sure to unprotect the memory region where flash is located */</div><div class='del'>-	ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_BUSCON0) &amp; ~EBU_WRDIS, LTQ_EBU_BUSCON0);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-postcore_initcall(lantiq_ebu_init);</div><div class='head'>diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c<br/>index d2fa98f3c78d..2ab39e93d9be 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/xway/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/gpio.c</a></div><div class='hunk'>@@ -36,18 +36,6 @@ struct ltq_gpio {</div><div class='ctx'> </div><div class='ctx'> static struct ltq_gpio ltq_gpio_port[MAX_PORTS];</div><div class='ctx'> </div><div class='del'>-int gpio_to_irq(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(gpio_to_irq);</div><div class='del'>-</div><div class='del'>-int irq_to_gpio(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(irq_to_gpio);</div><div class='del'>-</div><div class='ctx'> int ltq_gpio_request(unsigned int pin, unsigned int alt0,</div><div class='ctx'> 	unsigned int alt1, unsigned int dir, const char *name)</div><div class='ctx'> {</div><div class='hunk'>@@ -188,7 +176,7 @@ int __init ltq_gpio_init(void)</div><div class='ctx'> 	int ret = platform_driver_register(&amp;ltq_gpio_driver);</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='del'>-		pr_info("ltq_gpio : Error registering platfom driver!");</div><div class='add'>+		pr_info("ltq_gpio : Error registering platform driver!");</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/lantiq/xway/gpio_ebu.c b/arch/mips/lantiq/xway/gpio_ebu.c<br/>deleted file mode 100644<br/>index b91c7f17f10f..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/gpio_ebu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/gpio_ebu.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,126 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * By attaching hardware latches to the EBU it is possible to create output</div><div class='del'>- * only gpios. This driver configures a special memory address, which when</div><div class='del'>- * written to outputs 16 bit to the latches.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define LTQ_EBU_BUSCON	0x1e7ff		/* 16 bit access, slowest timing */</div><div class='del'>-#define LTQ_EBU_WP	0x80000000	/* write protect bit */</div><div class='del'>-</div><div class='del'>-/* we keep a shadow value of the last value written to the ebu */</div><div class='del'>-static int ltq_ebu_gpio_shadow = 0x0;</div><div class='del'>-static void __iomem *ltq_ebu_gpio_membase;</div><div class='del'>-</div><div class='del'>-static void ltq_ebu_apply(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;ebu_lock, flags);</div><div class='del'>-	ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1);</div><div class='del'>-	*((__u16 *)ltq_ebu_gpio_membase) = ltq_ebu_gpio_shadow;</div><div class='del'>-	ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ebu_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ltq_ebu_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='del'>-{</div><div class='del'>-	if (value)</div><div class='del'>-		ltq_ebu_gpio_shadow |= (1 &lt;&lt; offset);</div><div class='del'>-	else</div><div class='del'>-		ltq_ebu_gpio_shadow &amp;= ~(1 &lt;&lt; offset);</div><div class='del'>-	ltq_ebu_apply();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ltq_ebu_direction_output(struct gpio_chip *chip, unsigned offset,</div><div class='del'>-	int value)</div><div class='del'>-{</div><div class='del'>-	ltq_ebu_set(chip, offset, value);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct gpio_chip ltq_ebu_chip = {</div><div class='del'>-	.label = "ltq_ebu",</div><div class='del'>-	.direction_output = ltq_ebu_direction_output,</div><div class='del'>-	.set = ltq_ebu_set,</div><div class='del'>-	.base = 72,</div><div class='del'>-	.ngpio = 16,</div><div class='del'>-	.can_sleep = 1,</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int ltq_ebu_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-</div><div class='del'>-	if (!res) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to get memory resource\n");</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	res = devm_request_mem_region(&amp;pdev-&gt;dev, res-&gt;start,</div><div class='del'>-		resource_size(res), dev_name(&amp;pdev-&gt;dev));</div><div class='del'>-	if (!res) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to request memory resource\n");</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ltq_ebu_gpio_membase = devm_ioremap_nocache(&amp;pdev-&gt;dev, res-&gt;start,</div><div class='del'>-		resource_size(res));</div><div class='del'>-	if (!ltq_ebu_gpio_membase) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Failed to ioremap mem region\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* grab the default shadow value passed form the platform code */</div><div class='del'>-	ltq_ebu_gpio_shadow = (unsigned int) pdev-&gt;dev.platform_data;</div><div class='del'>-</div><div class='del'>-	/* tell the ebu controller which memory address we will be using */</div><div class='del'>-	ltq_ebu_w32(pdev-&gt;resource-&gt;start | 0x1, LTQ_EBU_ADDRSEL1);</div><div class='del'>-</div><div class='del'>-	/* write protect the region */</div><div class='del'>-	ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1);</div><div class='del'>-</div><div class='del'>-	ret = gpiochip_add(&amp;ltq_ebu_chip);</div><div class='del'>-	if (!ret)</div><div class='del'>-		ltq_ebu_apply();</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_driver ltq_ebu_driver = {</div><div class='del'>-	.probe = ltq_ebu_probe,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "ltq_ebu",</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init ltq_ebu_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret = platform_driver_register(&amp;ltq_ebu_driver);</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		pr_info("ltq_ebu : Error registering platfom driver!");</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-postcore_initcall(ltq_ebu_init);</div><div class='head'>diff --git a/arch/mips/lantiq/xway/gpio_stp.c b/arch/mips/lantiq/xway/gpio_stp.c<br/>deleted file mode 100644<br/>index ff9991cddeaa..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/gpio_stp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/gpio_stp.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,157 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2007 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-</div><div class='del'>-#define LTQ_STP_CON0		0x00</div><div class='del'>-#define LTQ_STP_CON1		0x04</div><div class='del'>-#define LTQ_STP_CPU0		0x08</div><div class='del'>-#define LTQ_STP_CPU1		0x0C</div><div class='del'>-#define LTQ_STP_AR		0x10</div><div class='del'>-</div><div class='del'>-#define LTQ_STP_CON_SWU		(1 &lt;&lt; 31)</div><div class='del'>-#define LTQ_STP_2HZ		0</div><div class='del'>-#define LTQ_STP_4HZ		(1 &lt;&lt; 23)</div><div class='del'>-#define LTQ_STP_8HZ		(2 &lt;&lt; 23)</div><div class='del'>-#define LTQ_STP_10HZ		(3 &lt;&lt; 23)</div><div class='del'>-#define LTQ_STP_SPEED_MASK	(0xf &lt;&lt; 23)</div><div class='del'>-#define LTQ_STP_UPD_FPI		(1 &lt;&lt; 31)</div><div class='del'>-#define LTQ_STP_UPD_MASK	(3 &lt;&lt; 30)</div><div class='del'>-#define LTQ_STP_ADSL_SRC	(3 &lt;&lt; 24)</div><div class='del'>-</div><div class='del'>-#define LTQ_STP_GROUP0		(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define LTQ_STP_RISING		0</div><div class='del'>-#define LTQ_STP_FALLING		(1 &lt;&lt; 26)</div><div class='del'>-#define LTQ_STP_EDGE_MASK	(1 &lt;&lt; 26)</div><div class='del'>-</div><div class='del'>-#define ltq_stp_r32(reg)	__raw_readl(ltq_stp_membase + reg)</div><div class='del'>-#define ltq_stp_w32(val, reg)	__raw_writel(val, ltq_stp_membase + reg)</div><div class='del'>-#define ltq_stp_w32_mask(clear, set, reg) \</div><div class='del'>-		ltq_w32((ltq_r32(ltq_stp_membase + reg) &amp; ~(clear)) | (set), \</div><div class='del'>-		ltq_stp_membase + (reg))</div><div class='del'>-</div><div class='del'>-static int ltq_stp_shadow = 0xffff;</div><div class='del'>-static void __iomem *ltq_stp_membase;</div><div class='del'>-</div><div class='del'>-static void ltq_stp_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='del'>-{</div><div class='del'>-	if (value)</div><div class='del'>-		ltq_stp_shadow |= (1 &lt;&lt; offset);</div><div class='del'>-	else</div><div class='del'>-		ltq_stp_shadow &amp;= ~(1 &lt;&lt; offset);</div><div class='del'>-	ltq_stp_w32(ltq_stp_shadow, LTQ_STP_CPU0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ltq_stp_direction_output(struct gpio_chip *chip, unsigned offset,</div><div class='del'>-	int value)</div><div class='del'>-{</div><div class='del'>-	ltq_stp_set(chip, offset, value);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct gpio_chip ltq_stp_chip = {</div><div class='del'>-	.label = "ltq_stp",</div><div class='del'>-	.direction_output = ltq_stp_direction_output,</div><div class='del'>-	.set = ltq_stp_set,</div><div class='del'>-	.base = 48,</div><div class='del'>-	.ngpio = 24,</div><div class='del'>-	.can_sleep = 1,</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int ltq_stp_hw_init(void)</div><div class='del'>-{</div><div class='del'>-	/* the 3 pins used to control the external stp */</div><div class='del'>-	ltq_gpio_request(4, 1, 0, 1, "stp-st");</div><div class='del'>-	ltq_gpio_request(5, 1, 0, 1, "stp-d");</div><div class='del'>-	ltq_gpio_request(6, 1, 0, 1, "stp-sh");</div><div class='del'>-</div><div class='del'>-	/* sane defaults */</div><div class='del'>-	ltq_stp_w32(0, LTQ_STP_AR);</div><div class='del'>-	ltq_stp_w32(0, LTQ_STP_CPU0);</div><div class='del'>-	ltq_stp_w32(0, LTQ_STP_CPU1);</div><div class='del'>-	ltq_stp_w32(LTQ_STP_CON_SWU, LTQ_STP_CON0);</div><div class='del'>-	ltq_stp_w32(0, LTQ_STP_CON1);</div><div class='del'>-</div><div class='del'>-	/* rising or falling edge */</div><div class='del'>-	ltq_stp_w32_mask(LTQ_STP_EDGE_MASK, LTQ_STP_FALLING, LTQ_STP_CON0);</div><div class='del'>-</div><div class='del'>-	/* per default stp 15-0 are set */</div><div class='del'>-	ltq_stp_w32_mask(0, LTQ_STP_GROUP0, LTQ_STP_CON1);</div><div class='del'>-</div><div class='del'>-	/* stp are update periodically by the FPI bus */</div><div class='del'>-	ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1);</div><div class='del'>-</div><div class='del'>-	/* set stp update speed */</div><div class='del'>-	ltq_stp_w32_mask(LTQ_STP_SPEED_MASK, LTQ_STP_8HZ, LTQ_STP_CON1);</div><div class='del'>-</div><div class='del'>-	/* tell the hardware that pin (led) 0 and 1 are controlled</div><div class='del'>-	 *  by the dsl arc</div><div class='del'>-	 */</div><div class='del'>-	ltq_stp_w32_mask(0, LTQ_STP_ADSL_SRC, LTQ_STP_CON0);</div><div class='del'>-</div><div class='del'>-	ltq_pmu_enable(PMU_LED);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __devinit ltq_stp_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (!res)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	res = devm_request_mem_region(&amp;pdev-&gt;dev, res-&gt;start,</div><div class='del'>-		resource_size(res), dev_name(&amp;pdev-&gt;dev));</div><div class='del'>-	if (!res) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to request STP memory\n");</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-	ltq_stp_membase = devm_ioremap_nocache(&amp;pdev-&gt;dev, res-&gt;start,</div><div class='del'>-		resource_size(res));</div><div class='del'>-	if (!ltq_stp_membase) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to remap STP memory\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	ret = gpiochip_add(&amp;ltq_stp_chip);</div><div class='del'>-	if (!ret)</div><div class='del'>-		ret = ltq_stp_hw_init();</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_driver ltq_stp_driver = {</div><div class='del'>-	.probe = ltq_stp_probe,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "ltq_stp",</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int __init ltq_stp_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret = platform_driver_register(&amp;ltq_stp_driver);</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		pr_info("ltq_stp: error registering platfom driver");</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-postcore_initcall(ltq_stp_init);</div><div class='head'>diff --git a/arch/mips/lantiq/xway/mach-easy50601.c b/arch/mips/lantiq/xway/mach-easy50601.c<br/>deleted file mode 100644<br/>index d5aaf637ab19..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/mach-easy50601.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/mach-easy50601.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,57 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/mtd/mtd.h&gt;</div><div class='del'>-#include &lt;linux/mtd/partitions.h&gt;</div><div class='del'>-#include &lt;linux/mtd/physmap.h&gt;</div><div class='del'>-#include &lt;linux/input.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq.h&gt;</div><div class='del'>-</div><div class='del'>-#include "../machtypes.h"</div><div class='del'>-#include "devices.h"</div><div class='del'>-</div><div class='del'>-static struct mtd_partition easy50601_partitions[] = {</div><div class='del'>-	{</div><div class='del'>-		.name	= "uboot",</div><div class='del'>-		.offset	= 0x0,</div><div class='del'>-		.size	= 0x10000,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name	= "uboot_env",</div><div class='del'>-		.offset	= 0x10000,</div><div class='del'>-		.size	= 0x10000,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name	= "linux",</div><div class='del'>-		.offset	= 0x20000,</div><div class='del'>-		.size	= 0xE0000,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name	= "rootfs",</div><div class='del'>-		.offset	= 0x100000,</div><div class='del'>-		.size	= 0x300000,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct physmap_flash_data easy50601_flash_data = {</div><div class='del'>-	.nr_parts	= ARRAY_SIZE(easy50601_partitions),</div><div class='del'>-	.parts		= easy50601_partitions,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init easy50601_init(void)</div><div class='del'>-{</div><div class='del'>-	ltq_register_nor(&amp;easy50601_flash_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MIPS_MACHINE(LTQ_MACH_EASY50601,</div><div class='del'>-			"EASY50601",</div><div class='del'>-			"EASY50601 Eval Board",</div><div class='del'>-			easy50601_init);</div><div class='head'>diff --git a/arch/mips/lantiq/xway/mach-easy50712.c b/arch/mips/lantiq/xway/mach-easy50712.c<br/>deleted file mode 100644<br/>index ea5027b3239d..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/mach-easy50712.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/mach-easy50712.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,74 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/mtd/mtd.h&gt;</div><div class='del'>-#include &lt;linux/mtd/partitions.h&gt;</div><div class='del'>-#include &lt;linux/mtd/physmap.h&gt;</div><div class='del'>-#include &lt;linux/input.h&gt;</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-#include &lt;irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include "../machtypes.h"</div><div class='del'>-#include "devices.h"</div><div class='del'>-</div><div class='del'>-static struct mtd_partition easy50712_partitions[] = {</div><div class='del'>-	{</div><div class='del'>-		.name	= "uboot",</div><div class='del'>-		.offset	= 0x0,</div><div class='del'>-		.size	= 0x10000,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name	= "uboot_env",</div><div class='del'>-		.offset	= 0x10000,</div><div class='del'>-		.size	= 0x10000,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name	= "linux",</div><div class='del'>-		.offset	= 0x20000,</div><div class='del'>-		.size	= 0xe0000,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name	= "rootfs",</div><div class='del'>-		.offset	= 0x100000,</div><div class='del'>-		.size	= 0x300000,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct physmap_flash_data easy50712_flash_data = {</div><div class='del'>-	.nr_parts	= ARRAY_SIZE(easy50712_partitions),</div><div class='del'>-	.parts		= easy50712_partitions,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct ltq_pci_data ltq_pci_data = {</div><div class='del'>-	.clock	= PCI_CLOCK_INT,</div><div class='del'>-	.gpio	= PCI_GNT1 | PCI_REQ1,</div><div class='del'>-	.irq	= {</div><div class='del'>-		[14] = INT_NUM_IM0_IRL0 + 22,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct ltq_eth_data ltq_eth_data = {</div><div class='del'>-	.mii_mode = PHY_INTERFACE_MODE_MII,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __init easy50712_init(void)</div><div class='del'>-{</div><div class='del'>-	ltq_register_gpio_stp();</div><div class='del'>-	ltq_register_nor(&amp;easy50712_flash_data);</div><div class='del'>-	ltq_register_pci(&amp;ltq_pci_data);</div><div class='del'>-	ltq_register_etop(&amp;ltq_eth_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MIPS_MACHINE(LTQ_MACH_EASY50712,</div><div class='del'>-	     "EASY50712",</div><div class='del'>-	     "EASY50712 Eval Board",</div><div class='del'>-	      easy50712_init);</div><div class='head'>diff --git a/arch/mips/lantiq/xway/pmu.c b/arch/mips/lantiq/xway/pmu.c<br/>deleted file mode 100644<br/>index fe85361e032e..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/pmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/pmu.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,69 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-</div><div class='del'>-/* PMU - the power management unit allows us to turn part of the core</div><div class='del'>- * on and off</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* the enable / disable registers */</div><div class='del'>-#define LTQ_PMU_PWDCR	0x1C</div><div class='del'>-#define LTQ_PMU_PWDSR	0x20</div><div class='del'>-</div><div class='del'>-#define ltq_pmu_w32(x, y)	ltq_w32((x), ltq_pmu_membase + (y))</div><div class='del'>-#define ltq_pmu_r32(x)		ltq_r32(ltq_pmu_membase + (x))</div><div class='del'>-</div><div class='del'>-static struct resource ltq_pmu_resource = {</div><div class='del'>-	.name	= "pmu",</div><div class='del'>-	.start	= LTQ_PMU_BASE_ADDR,</div><div class='del'>-	.end	= LTQ_PMU_BASE_ADDR + LTQ_PMU_SIZE - 1,</div><div class='del'>-	.flags	= IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __iomem *ltq_pmu_membase;</div><div class='del'>-</div><div class='del'>-void ltq_pmu_enable(unsigned int module)</div><div class='del'>-{</div><div class='del'>-	int err = 1000000;</div><div class='del'>-</div><div class='del'>-	ltq_pmu_w32(ltq_pmu_r32(LTQ_PMU_PWDCR) &amp; ~module, LTQ_PMU_PWDCR);</div><div class='del'>-	do {} while (--err &amp;&amp; (ltq_pmu_r32(LTQ_PMU_PWDSR) &amp; module));</div><div class='del'>-</div><div class='del'>-	if (!err)</div><div class='del'>-		panic("activating PMU module failed!");</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ltq_pmu_enable);</div><div class='del'>-</div><div class='del'>-void ltq_pmu_disable(unsigned int module)</div><div class='del'>-{</div><div class='del'>-	ltq_pmu_w32(ltq_pmu_r32(LTQ_PMU_PWDCR) | module, LTQ_PMU_PWDCR);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ltq_pmu_disable);</div><div class='del'>-</div><div class='del'>-int __init ltq_pmu_init(void)</div><div class='del'>-{</div><div class='del'>-	if (insert_resource(&amp;iomem_resource, &amp;ltq_pmu_resource) &lt; 0)</div><div class='del'>-		panic("Failed to insert pmu memory");</div><div class='del'>-</div><div class='del'>-	if (request_mem_region(ltq_pmu_resource.start,</div><div class='del'>-			resource_size(&amp;ltq_pmu_resource), "pmu") &lt; 0)</div><div class='del'>-		panic("Failed to request pmu memory");</div><div class='del'>-</div><div class='del'>-	ltq_pmu_membase = ioremap_nocache(ltq_pmu_resource.start,</div><div class='del'>-				resource_size(&amp;ltq_pmu_resource));</div><div class='del'>-	if (!ltq_pmu_membase)</div><div class='del'>-		panic("Failed to remap pmu memory");</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-core_initcall(ltq_pmu_init);</div><div class='head'>diff --git a/arch/mips/lantiq/xway/prom-ase.c b/arch/mips/lantiq/xway/prom-ase.c<br/>deleted file mode 100644<br/>index ae4959ae865c..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/prom-ase.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/prom-ase.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,39 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;asm/bootinfo.h&gt;</div><div class='del'>-#include &lt;asm/time.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-</div><div class='del'>-#include "../prom.h"</div><div class='del'>-</div><div class='del'>-#define SOC_AMAZON_SE	"Amazon_SE"</div><div class='del'>-</div><div class='del'>-#define PART_SHIFT	12</div><div class='del'>-#define PART_MASK	0x0FFFFFFF</div><div class='del'>-#define REV_SHIFT	28</div><div class='del'>-#define REV_MASK	0xF0000000</div><div class='del'>-</div><div class='del'>-void __init ltq_soc_detect(struct ltq_soc_info *i)</div><div class='del'>-{</div><div class='del'>-	i-&gt;partnum = (ltq_r32(LTQ_MPS_CHIPID) &amp; PART_MASK) &gt;&gt; PART_SHIFT;</div><div class='del'>-	i-&gt;rev = (ltq_r32(LTQ_MPS_CHIPID) &amp; REV_MASK) &gt;&gt; REV_SHIFT;</div><div class='del'>-	switch (i-&gt;partnum) {</div><div class='del'>-	case SOC_ID_AMAZON_SE:</div><div class='del'>-		i-&gt;name = SOC_AMAZON_SE;</div><div class='del'>-		i-&gt;type = SOC_TYPE_AMAZON_SE;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		unreachable();</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/lantiq/xway/prom-xway.c b/arch/mips/lantiq/xway/prom-xway.c<br/>deleted file mode 100644<br/>index 2228133ca356..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/prom-xway.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/prom-xway.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,54 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;asm/bootinfo.h&gt;</div><div class='del'>-#include &lt;asm/time.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-</div><div class='del'>-#include "../prom.h"</div><div class='del'>-</div><div class='del'>-#define SOC_DANUBE	"Danube"</div><div class='del'>-#define SOC_TWINPASS	"Twinpass"</div><div class='del'>-#define SOC_AR9		"AR9"</div><div class='del'>-</div><div class='del'>-#define PART_SHIFT	12</div><div class='del'>-#define PART_MASK	0x0FFFFFFF</div><div class='del'>-#define REV_SHIFT	28</div><div class='del'>-#define REV_MASK	0xF0000000</div><div class='del'>-</div><div class='del'>-void __init ltq_soc_detect(struct ltq_soc_info *i)</div><div class='del'>-{</div><div class='del'>-	i-&gt;partnum = (ltq_r32(LTQ_MPS_CHIPID) &amp; PART_MASK) &gt;&gt; PART_SHIFT;</div><div class='del'>-	i-&gt;rev = (ltq_r32(LTQ_MPS_CHIPID) &amp; REV_MASK) &gt;&gt; REV_SHIFT;</div><div class='del'>-	switch (i-&gt;partnum) {</div><div class='del'>-	case SOC_ID_DANUBE1:</div><div class='del'>-	case SOC_ID_DANUBE2:</div><div class='del'>-		i-&gt;name = SOC_DANUBE;</div><div class='del'>-		i-&gt;type = SOC_TYPE_DANUBE;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SOC_ID_TWINPASS:</div><div class='del'>-		i-&gt;name = SOC_TWINPASS;</div><div class='del'>-		i-&gt;type = SOC_TYPE_DANUBE;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SOC_ID_ARX188:</div><div class='del'>-	case SOC_ID_ARX168:</div><div class='del'>-	case SOC_ID_ARX182:</div><div class='del'>-		i-&gt;name = SOC_AR9;</div><div class='del'>-		i-&gt;type = SOC_TYPE_AR9;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		unreachable();</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/lantiq/xway/prom.c b/arch/mips/lantiq/xway/prom.c<br/>new file mode 100644<br/>index 000000000000..248429ab2622<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/xway/prom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/prom.c</a></div><div class='hunk'>@@ -0,0 +1,115 @@</div><div class='add'>+/*</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2010 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;asm/bootinfo.h&gt;</div><div class='add'>+#include &lt;asm/time.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;lantiq_soc.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../prom.h"</div><div class='add'>+</div><div class='add'>+#define SOC_DANUBE	"Danube"</div><div class='add'>+#define SOC_TWINPASS	"Twinpass"</div><div class='add'>+#define SOC_AMAZON_SE	"Amazon_SE"</div><div class='add'>+#define SOC_AR9		"AR9"</div><div class='add'>+#define SOC_GR9		"GR9"</div><div class='add'>+#define SOC_VR9		"VR9"</div><div class='add'>+</div><div class='add'>+#define COMP_DANUBE	"lantiq,danube"</div><div class='add'>+#define COMP_TWINPASS	"lantiq,twinpass"</div><div class='add'>+#define COMP_AMAZON_SE	"lantiq,ase"</div><div class='add'>+#define COMP_AR9	"lantiq,ar9"</div><div class='add'>+#define COMP_GR9	"lantiq,gr9"</div><div class='add'>+#define COMP_VR9	"lantiq,vr9"</div><div class='add'>+</div><div class='add'>+#define PART_SHIFT	12</div><div class='add'>+#define PART_MASK	0x0FFFFFFF</div><div class='add'>+#define REV_SHIFT	28</div><div class='add'>+#define REV_MASK	0xF0000000</div><div class='add'>+</div><div class='add'>+void __init ltq_soc_detect(struct ltq_soc_info *i)</div><div class='add'>+{</div><div class='add'>+	i-&gt;partnum = (ltq_r32(LTQ_MPS_CHIPID) &amp; PART_MASK) &gt;&gt; PART_SHIFT;</div><div class='add'>+	i-&gt;rev = (ltq_r32(LTQ_MPS_CHIPID) &amp; REV_MASK) &gt;&gt; REV_SHIFT;</div><div class='add'>+	sprintf(i-&gt;rev_type, "1.%d", i-&gt;rev);</div><div class='add'>+	switch (i-&gt;partnum) {</div><div class='add'>+	case SOC_ID_DANUBE1:</div><div class='add'>+	case SOC_ID_DANUBE2:</div><div class='add'>+		i-&gt;name = SOC_DANUBE;</div><div class='add'>+		i-&gt;type = SOC_TYPE_DANUBE;</div><div class='add'>+		i-&gt;compatible = COMP_DANUBE;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SOC_ID_TWINPASS:</div><div class='add'>+		i-&gt;name = SOC_TWINPASS;</div><div class='add'>+		i-&gt;type = SOC_TYPE_DANUBE;</div><div class='add'>+		i-&gt;compatible = COMP_TWINPASS;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SOC_ID_ARX188:</div><div class='add'>+	case SOC_ID_ARX168_1:</div><div class='add'>+	case SOC_ID_ARX168_2:</div><div class='add'>+	case SOC_ID_ARX182:</div><div class='add'>+		i-&gt;name = SOC_AR9;</div><div class='add'>+		i-&gt;type = SOC_TYPE_AR9;</div><div class='add'>+		i-&gt;compatible = COMP_AR9;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SOC_ID_GRX188:</div><div class='add'>+	case SOC_ID_GRX168:</div><div class='add'>+		i-&gt;name = SOC_GR9;</div><div class='add'>+		i-&gt;type = SOC_TYPE_AR9;</div><div class='add'>+		i-&gt;compatible = COMP_GR9;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SOC_ID_AMAZON_SE_1:</div><div class='add'>+	case SOC_ID_AMAZON_SE_2:</div><div class='add'>+#ifdef CONFIG_PCI</div><div class='add'>+		panic("ase is only supported for non pci kernels");</div><div class='add'>+#endif</div><div class='add'>+		i-&gt;name = SOC_AMAZON_SE;</div><div class='add'>+		i-&gt;type = SOC_TYPE_AMAZON_SE;</div><div class='add'>+		i-&gt;compatible = COMP_AMAZON_SE;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SOC_ID_VRX282:</div><div class='add'>+	case SOC_ID_VRX268:</div><div class='add'>+	case SOC_ID_VRX288:</div><div class='add'>+		i-&gt;name = SOC_VR9;</div><div class='add'>+		i-&gt;type = SOC_TYPE_VR9;</div><div class='add'>+		i-&gt;compatible = COMP_VR9;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SOC_ID_GRX268:</div><div class='add'>+	case SOC_ID_GRX288:</div><div class='add'>+		i-&gt;name = SOC_GR9;</div><div class='add'>+		i-&gt;type = SOC_TYPE_VR9;</div><div class='add'>+		i-&gt;compatible = COMP_GR9;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SOC_ID_VRX268_2:</div><div class='add'>+	case SOC_ID_VRX288_2:</div><div class='add'>+		i-&gt;name = SOC_VR9;</div><div class='add'>+		i-&gt;type = SOC_TYPE_VR9_2;</div><div class='add'>+		i-&gt;compatible = COMP_VR9;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SOC_ID_GRX282_2:</div><div class='add'>+	case SOC_ID_GRX288_2:</div><div class='add'>+		i-&gt;name = SOC_GR9;</div><div class='add'>+		i-&gt;type = SOC_TYPE_VR9_2;</div><div class='add'>+		i-&gt;compatible = COMP_GR9;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		unreachable();</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c<br/>index 8b66bd87f0c1..22c55f73aa9d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/reset.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/reset.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/xway/reset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/reset.c</a></div><div class='hunk'>@@ -11,26 +11,31 @@</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/pm.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/reboot.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;lantiq_soc.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "../prom.h"</div><div class='add'>+</div><div class='ctx'> #define ltq_rcu_w32(x, y)	ltq_w32((x), ltq_rcu_membase + (y))</div><div class='ctx'> #define ltq_rcu_r32(x)		ltq_r32(ltq_rcu_membase + (x))</div><div class='ctx'> </div><div class='del'>-/* register definitions */</div><div class='del'>-#define LTQ_RCU_RST		0x0010</div><div class='del'>-#define LTQ_RCU_RST_ALL		0x40000000</div><div class='del'>-</div><div class='del'>-#define LTQ_RCU_RST_STAT	0x0014</div><div class='del'>-#define LTQ_RCU_STAT_SHIFT	26</div><div class='add'>+/* reset request register */</div><div class='add'>+#define RCU_RST_REQ		0x0010</div><div class='add'>+/* reset status register */</div><div class='add'>+#define RCU_RST_STAT		0x0014</div><div class='ctx'> </div><div class='del'>-static struct resource ltq_rcu_resource = {</div><div class='del'>-	.name   = "rcu",</div><div class='del'>-	.start  = LTQ_RCU_BASE_ADDR,</div><div class='del'>-	.end    = LTQ_RCU_BASE_ADDR + LTQ_RCU_SIZE - 1,</div><div class='del'>-	.flags  = IORESOURCE_MEM,</div><div class='del'>-};</div><div class='add'>+/* reboot bit */</div><div class='add'>+#define RCU_RD_SRST		BIT(30)</div><div class='add'>+/* reset cause */</div><div class='add'>+#define RCU_STAT_SHIFT		26</div><div class='add'>+/* boot selection */</div><div class='add'>+#define RCU_BOOT_SEL_SHIFT	26</div><div class='add'>+#define RCU_BOOT_SEL_MASK	0x7</div><div class='ctx'> </div><div class='ctx'> /* remapped base addr of the reset control unit */</div><div class='ctx'> static void __iomem *ltq_rcu_membase;</div><div class='hunk'>@@ -38,48 +43,64 @@ static void __iomem *ltq_rcu_membase;</div><div class='ctx'> /* This function is used by the watchdog driver */</div><div class='ctx'> int ltq_reset_cause(void)</div><div class='ctx'> {</div><div class='del'>-	u32 val = ltq_rcu_r32(LTQ_RCU_RST_STAT);</div><div class='del'>-	return val &gt;&gt; LTQ_RCU_STAT_SHIFT;</div><div class='add'>+	u32 val = ltq_rcu_r32(RCU_RST_STAT);</div><div class='add'>+	return val &gt;&gt; RCU_STAT_SHIFT;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ltq_reset_cause);</div><div class='ctx'> </div><div class='add'>+/* allow platform code to find out what source we booted from */</div><div class='add'>+unsigned char ltq_boot_select(void)</div><div class='add'>+{</div><div class='add'>+	u32 val = ltq_rcu_r32(RCU_RST_STAT);</div><div class='add'>+	return (val &gt;&gt; RCU_BOOT_SEL_SHIFT) &amp; RCU_BOOT_SEL_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* reset a io domain for u micro seconds */</div><div class='add'>+void ltq_reset_once(unsigned int module, ulong u)</div><div class='add'>+{</div><div class='add'>+	ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | module, RCU_RST_REQ);</div><div class='add'>+	udelay(u);</div><div class='add'>+	ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) &amp; ~module, RCU_RST_REQ);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ltq_machine_restart(char *command)</div><div class='ctx'> {</div><div class='del'>-	pr_notice("System restart\n");</div><div class='ctx'> 	local_irq_disable();</div><div class='del'>-	ltq_rcu_w32(ltq_rcu_r32(LTQ_RCU_RST) | LTQ_RCU_RST_ALL, LTQ_RCU_RST);</div><div class='add'>+	ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | RCU_RD_SRST, RCU_RST_REQ);</div><div class='ctx'> 	unreachable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ltq_machine_halt(void)</div><div class='ctx'> {</div><div class='del'>-	pr_notice("System halted.\n");</div><div class='ctx'> 	local_irq_disable();</div><div class='ctx'> 	unreachable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ltq_machine_power_off(void)</div><div class='ctx'> {</div><div class='del'>-	pr_notice("Please turn off the power now.\n");</div><div class='ctx'> 	local_irq_disable();</div><div class='ctx'> 	unreachable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init mips_reboot_setup(void)</div><div class='ctx'> {</div><div class='del'>-	/* insert and request the memory region */</div><div class='del'>-	if (insert_resource(&amp;iomem_resource, &amp;ltq_rcu_resource) &lt; 0)</div><div class='del'>-		panic("Failed to insert rcu memory");</div><div class='add'>+	struct resource res;</div><div class='add'>+	struct device_node *np =</div><div class='add'>+		of_find_compatible_node(NULL, NULL, "lantiq,rcu-xway");</div><div class='add'>+</div><div class='add'>+	/* check if all the reset register range is available */</div><div class='add'>+	if (!np)</div><div class='add'>+		panic("Failed to load reset resources from devicetree");</div><div class='add'>+</div><div class='add'>+	if (of_address_to_resource(np, 0, &amp;res))</div><div class='add'>+		panic("Failed to get rcu memory range");</div><div class='ctx'> </div><div class='del'>-	if (request_mem_region(ltq_rcu_resource.start,</div><div class='del'>-			resource_size(&amp;ltq_rcu_resource), "rcu") &lt; 0)</div><div class='del'>-		panic("Failed to request rcu memory");</div><div class='add'>+	if (request_mem_region(res.start, resource_size(&amp;res), res.name) &lt; 0)</div><div class='add'>+		pr_err("Failed to request rcu memory");</div><div class='ctx'> </div><div class='del'>-	/* remap rcu register range */</div><div class='del'>-	ltq_rcu_membase = ioremap_nocache(ltq_rcu_resource.start,</div><div class='del'>-				resource_size(&amp;ltq_rcu_resource));</div><div class='add'>+	ltq_rcu_membase = ioremap_nocache(res.start, resource_size(&amp;res));</div><div class='ctx'> 	if (!ltq_rcu_membase)</div><div class='del'>-		panic("Failed to remap rcu memory");</div><div class='add'>+		panic("Failed to remap core memory");</div><div class='ctx'> </div><div class='ctx'> 	_machine_restart = ltq_machine_restart;</div><div class='ctx'> 	_machine_halt = ltq_machine_halt;</div><div class='head'>diff --git a/arch/mips/lantiq/xway/setup-ase.c b/arch/mips/lantiq/xway/setup-ase.c<br/>deleted file mode 100644<br/>index f6f326798a39..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/setup-ase.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/setup-ase.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,19 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2011 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-</div><div class='del'>-#include "../prom.h"</div><div class='del'>-#include "devices.h"</div><div class='del'>-</div><div class='del'>-void __init ltq_soc_setup(void)</div><div class='del'>-{</div><div class='del'>-	ltq_register_ase_asc();</div><div class='del'>-	ltq_register_gpio();</div><div class='del'>-	ltq_register_wdt();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/lantiq/xway/setup-xway.c b/arch/mips/lantiq/xway/setup-xway.c<br/>deleted file mode 100644<br/>index c292f643a858..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/lantiq/xway/setup-xway.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/lantiq/xway/setup-xway.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2011 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;lantiq_soc.h&gt;</div><div class='del'>-</div><div class='del'>-#include "../prom.h"</div><div class='del'>-#include "devices.h"</div><div class='del'>-</div><div class='del'>-void __init ltq_soc_setup(void)</div><div class='del'>-{</div><div class='del'>-	ltq_register_asc(0);</div><div class='del'>-	ltq_register_asc(1);</div><div class='del'>-	ltq_register_gpio();</div><div class='del'>-	ltq_register_wdt();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c<br/>new file mode 100644<br/>index 000000000000..83780f7c842b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/lantiq/xway/sysctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/lantiq/xway/sysctrl.c</a></div><div class='hunk'>@@ -0,0 +1,371 @@</div><div class='add'>+/*</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2011-2012 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;lantiq_soc.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../clk.h"</div><div class='add'>+#include "../prom.h"</div><div class='add'>+</div><div class='add'>+/* clock control register */</div><div class='add'>+#define CGU_IFCCR	0x0018</div><div class='add'>+/* system clock register */</div><div class='add'>+#define CGU_SYS		0x0010</div><div class='add'>+/* pci control register */</div><div class='add'>+#define CGU_PCICR	0x0034</div><div class='add'>+/* ephy configuration register */</div><div class='add'>+#define CGU_EPHY	0x10</div><div class='add'>+/* power control register */</div><div class='add'>+#define PMU_PWDCR	0x1C</div><div class='add'>+/* power status register */</div><div class='add'>+#define PMU_PWDSR	0x20</div><div class='add'>+/* power control register */</div><div class='add'>+#define PMU_PWDCR1	0x24</div><div class='add'>+/* power status register */</div><div class='add'>+#define PMU_PWDSR1	0x28</div><div class='add'>+/* power control register */</div><div class='add'>+#define PWDCR(x) ((x) ? (PMU_PWDCR1) : (PMU_PWDCR))</div><div class='add'>+/* power status register */</div><div class='add'>+#define PWDSR(x) ((x) ? (PMU_PWDSR1) : (PMU_PWDSR))</div><div class='add'>+</div><div class='add'>+/* clock gates that we can en/disable */</div><div class='add'>+#define PMU_USB0_P	BIT(0)</div><div class='add'>+#define PMU_PCI		BIT(4)</div><div class='add'>+#define PMU_DMA		BIT(5)</div><div class='add'>+#define PMU_USB0	BIT(6)</div><div class='add'>+#define PMU_ASC0	BIT(7)</div><div class='add'>+#define PMU_EPHY	BIT(7)	/* ase */</div><div class='add'>+#define PMU_SPI		BIT(8)</div><div class='add'>+#define PMU_DFE		BIT(9)</div><div class='add'>+#define PMU_EBU		BIT(10)</div><div class='add'>+#define PMU_STP		BIT(11)</div><div class='add'>+#define PMU_GPT		BIT(12)</div><div class='add'>+#define PMU_AHBS	BIT(13) /* vr9 */</div><div class='add'>+#define PMU_FPI		BIT(14)</div><div class='add'>+#define PMU_AHBM	BIT(15)</div><div class='add'>+#define PMU_ASC1	BIT(17)</div><div class='add'>+#define PMU_PPE_QSB	BIT(18)</div><div class='add'>+#define PMU_PPE_SLL01	BIT(19)</div><div class='add'>+#define PMU_PPE_TC	BIT(21)</div><div class='add'>+#define PMU_PPE_EMA	BIT(22)</div><div class='add'>+#define PMU_PPE_DPLUM	BIT(23)</div><div class='add'>+#define PMU_PPE_DPLUS	BIT(24)</div><div class='add'>+#define PMU_USB1_P	BIT(26)</div><div class='add'>+#define PMU_USB1	BIT(27)</div><div class='add'>+#define PMU_SWITCH	BIT(28)</div><div class='add'>+#define PMU_PPE_TOP	BIT(29)</div><div class='add'>+#define PMU_GPHY	BIT(30)</div><div class='add'>+#define PMU_PCIE_CLK	BIT(31)</div><div class='add'>+</div><div class='add'>+#define PMU1_PCIE_PHY	BIT(0)</div><div class='add'>+#define PMU1_PCIE_CTL	BIT(1)</div><div class='add'>+#define PMU1_PCIE_PDI	BIT(4)</div><div class='add'>+#define PMU1_PCIE_MSI	BIT(5)</div><div class='add'>+</div><div class='add'>+#define pmu_w32(x, y)	ltq_w32((x), pmu_membase + (y))</div><div class='add'>+#define pmu_r32(x)	ltq_r32(pmu_membase + (x))</div><div class='add'>+</div><div class='add'>+static void __iomem *pmu_membase;</div><div class='add'>+void __iomem *ltq_cgu_membase;</div><div class='add'>+void __iomem *ltq_ebu_membase;</div><div class='add'>+</div><div class='add'>+/* legacy function kept alive to ease clkdev transition */</div><div class='add'>+void ltq_pmu_enable(unsigned int module)</div><div class='add'>+{</div><div class='add'>+	int err = 1000000;</div><div class='add'>+</div><div class='add'>+	pmu_w32(pmu_r32(PMU_PWDCR) &amp; ~module, PMU_PWDCR);</div><div class='add'>+	do {} while (--err &amp;&amp; (pmu_r32(PMU_PWDSR) &amp; module));</div><div class='add'>+</div><div class='add'>+	if (!err)</div><div class='add'>+		panic("activating PMU module failed!");</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ltq_pmu_enable);</div><div class='add'>+</div><div class='add'>+/* legacy function kept alive to ease clkdev transition */</div><div class='add'>+void ltq_pmu_disable(unsigned int module)</div><div class='add'>+{</div><div class='add'>+	pmu_w32(pmu_r32(PMU_PWDCR) | module, PMU_PWDCR);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ltq_pmu_disable);</div><div class='add'>+</div><div class='add'>+/* enable a hw clock */</div><div class='add'>+static int cgu_enable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	ltq_cgu_w32(ltq_cgu_r32(CGU_IFCCR) | clk-&gt;bits, CGU_IFCCR);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* disable a hw clock */</div><div class='add'>+static void cgu_disable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	ltq_cgu_w32(ltq_cgu_r32(CGU_IFCCR) &amp; ~clk-&gt;bits, CGU_IFCCR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* enable a clock gate */</div><div class='add'>+static int pmu_enable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	int retry = 1000000;</div><div class='add'>+</div><div class='add'>+	pmu_w32(pmu_r32(PWDCR(clk-&gt;module)) &amp; ~clk-&gt;bits,</div><div class='add'>+		PWDCR(clk-&gt;module));</div><div class='add'>+	do {} while (--retry &amp;&amp; (pmu_r32(PWDSR(clk-&gt;module)) &amp; clk-&gt;bits));</div><div class='add'>+</div><div class='add'>+	if (!retry)</div><div class='add'>+		panic("activating PMU module failed!\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* disable a clock gate */</div><div class='add'>+static void pmu_disable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	pmu_w32(pmu_r32(PWDCR(clk-&gt;module)) | clk-&gt;bits,</div><div class='add'>+		PWDCR(clk-&gt;module));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* the pci enable helper */</div><div class='add'>+static int pci_enable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	unsigned int ifccr = ltq_cgu_r32(CGU_IFCCR);</div><div class='add'>+	/* set bus clock speed */</div><div class='add'>+	if (of_machine_is_compatible("lantiq,ar9")) {</div><div class='add'>+		ifccr &amp;= ~0x1f00000;</div><div class='add'>+		if (clk-&gt;rate == CLOCK_33M)</div><div class='add'>+			ifccr |= 0xe00000;</div><div class='add'>+		else</div><div class='add'>+			ifccr |= 0x700000; /* 62.5M */</div><div class='add'>+	} else {</div><div class='add'>+		ifccr &amp;= ~0xf00000;</div><div class='add'>+		if (clk-&gt;rate == CLOCK_33M)</div><div class='add'>+			ifccr |= 0x800000;</div><div class='add'>+		else</div><div class='add'>+			ifccr |= 0x400000; /* 62.5M */</div><div class='add'>+	}</div><div class='add'>+	ltq_cgu_w32(ifccr, CGU_IFCCR);</div><div class='add'>+	pmu_enable(clk);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* enable the external clock as a source */</div><div class='add'>+static int pci_ext_enable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	ltq_cgu_w32(ltq_cgu_r32(CGU_IFCCR) &amp; ~(1 &lt;&lt; 16),</div><div class='add'>+		CGU_IFCCR);</div><div class='add'>+	ltq_cgu_w32((1 &lt;&lt; 30), CGU_PCICR);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* disable the external clock as a source */</div><div class='add'>+static void pci_ext_disable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	ltq_cgu_w32(ltq_cgu_r32(CGU_IFCCR) | (1 &lt;&lt; 16),</div><div class='add'>+		CGU_IFCCR);</div><div class='add'>+	ltq_cgu_w32((1 &lt;&lt; 31) | (1 &lt;&lt; 30), CGU_PCICR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* enable a clockout source */</div><div class='add'>+static int clkout_enable(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* get the correct rate */</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		if (clk-&gt;rates[i] == clk-&gt;rate) {</div><div class='add'>+			int shift = 14 - (2 * clk-&gt;module);</div><div class='add'>+			unsigned int ifccr = ltq_cgu_r32(CGU_IFCCR);</div><div class='add'>+</div><div class='add'>+			ifccr &amp;= ~(3 &lt;&lt; shift);</div><div class='add'>+			ifccr |= i &lt;&lt; shift;</div><div class='add'>+			ltq_cgu_w32(ifccr, CGU_IFCCR);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* manage the clock gates via PMU */</div><div class='add'>+static void clkdev_add_pmu(const char *dev, const char *con,</div><div class='add'>+					unsigned int module, unsigned int bits)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	clk-&gt;cl.dev_id = dev;</div><div class='add'>+	clk-&gt;cl.con_id = con;</div><div class='add'>+	clk-&gt;cl.clk = clk;</div><div class='add'>+	clk-&gt;enable = pmu_enable;</div><div class='add'>+	clk-&gt;disable = pmu_disable;</div><div class='add'>+	clk-&gt;module = module;</div><div class='add'>+	clk-&gt;bits = bits;</div><div class='add'>+	clkdev_add(&amp;clk-&gt;cl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* manage the clock generator */</div><div class='add'>+static void clkdev_add_cgu(const char *dev, const char *con,</div><div class='add'>+					unsigned int bits)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	clk-&gt;cl.dev_id = dev;</div><div class='add'>+	clk-&gt;cl.con_id = con;</div><div class='add'>+	clk-&gt;cl.clk = clk;</div><div class='add'>+	clk-&gt;enable = cgu_enable;</div><div class='add'>+	clk-&gt;disable = cgu_disable;</div><div class='add'>+	clk-&gt;bits = bits;</div><div class='add'>+	clkdev_add(&amp;clk-&gt;cl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* pci needs its own enable function as the setup is a bit more complex */</div><div class='add'>+static unsigned long valid_pci_rates[] = {CLOCK_33M, CLOCK_62_5M, 0};</div><div class='add'>+</div><div class='add'>+static void clkdev_add_pci(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);</div><div class='add'>+	struct clk *clk_ext = kzalloc(sizeof(struct clk), GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	/* main pci clock */</div><div class='add'>+	clk-&gt;cl.dev_id = "17000000.pci";</div><div class='add'>+	clk-&gt;cl.con_id = NULL;</div><div class='add'>+	clk-&gt;cl.clk = clk;</div><div class='add'>+	clk-&gt;rate = CLOCK_33M;</div><div class='add'>+	clk-&gt;rates = valid_pci_rates;</div><div class='add'>+	clk-&gt;enable = pci_enable;</div><div class='add'>+	clk-&gt;disable = pmu_disable;</div><div class='add'>+	clk-&gt;module = 0;</div><div class='add'>+	clk-&gt;bits = PMU_PCI;</div><div class='add'>+	clkdev_add(&amp;clk-&gt;cl);</div><div class='add'>+</div><div class='add'>+	/* use internal/external bus clock */</div><div class='add'>+	clk_ext-&gt;cl.dev_id = "17000000.pci";</div><div class='add'>+	clk_ext-&gt;cl.con_id = "external";</div><div class='add'>+	clk_ext-&gt;cl.clk = clk_ext;</div><div class='add'>+	clk_ext-&gt;enable = pci_ext_enable;</div><div class='add'>+	clk_ext-&gt;disable = pci_ext_disable;</div><div class='add'>+	clkdev_add(&amp;clk_ext-&gt;cl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* xway socs can generate clocks on gpio pins */</div><div class='add'>+static unsigned long valid_clkout_rates[4][5] = {</div><div class='add'>+	{CLOCK_32_768K, CLOCK_1_536M, CLOCK_2_5M, CLOCK_12M, 0},</div><div class='add'>+	{CLOCK_40M, CLOCK_12M, CLOCK_24M, CLOCK_48M, 0},</div><div class='add'>+	{CLOCK_25M, CLOCK_40M, CLOCK_30M, CLOCK_60M, 0},</div><div class='add'>+	{CLOCK_12M, CLOCK_50M, CLOCK_32_768K, CLOCK_25M, 0},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void clkdev_add_clkout(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		struct clk *clk;</div><div class='add'>+		char *name;</div><div class='add'>+</div><div class='add'>+		name = kzalloc(sizeof("clkout0"), GFP_KERNEL);</div><div class='add'>+		sprintf(name, "clkout%d", i);</div><div class='add'>+</div><div class='add'>+		clk = kzalloc(sizeof(struct clk), GFP_KERNEL);</div><div class='add'>+		clk-&gt;cl.dev_id = "1f103000.cgu";</div><div class='add'>+		clk-&gt;cl.con_id = name;</div><div class='add'>+		clk-&gt;cl.clk = clk;</div><div class='add'>+		clk-&gt;rate = 0;</div><div class='add'>+		clk-&gt;rates = valid_clkout_rates[i];</div><div class='add'>+		clk-&gt;enable = clkout_enable;</div><div class='add'>+		clk-&gt;module = i;</div><div class='add'>+		clkdev_add(&amp;clk-&gt;cl);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* bring up all register ranges that we need for basic system control */</div><div class='add'>+void __init ltq_soc_init(void)</div><div class='add'>+{</div><div class='add'>+	struct resource res_pmu, res_cgu, res_ebu;</div><div class='add'>+	struct device_node *np_pmu =</div><div class='add'>+			of_find_compatible_node(NULL, NULL, "lantiq,pmu-xway");</div><div class='add'>+	struct device_node *np_cgu =</div><div class='add'>+			of_find_compatible_node(NULL, NULL, "lantiq,cgu-xway");</div><div class='add'>+	struct device_node *np_ebu =</div><div class='add'>+			of_find_compatible_node(NULL, NULL, "lantiq,ebu-xway");</div><div class='add'>+</div><div class='add'>+	/* check if all the core register ranges are available */</div><div class='add'>+	if (!np_pmu || !np_cgu || !np_ebu)</div><div class='add'>+		panic("Failed to load core nodess from devicetree");</div><div class='add'>+</div><div class='add'>+	if (of_address_to_resource(np_pmu, 0, &amp;res_pmu) ||</div><div class='add'>+			of_address_to_resource(np_cgu, 0, &amp;res_cgu) ||</div><div class='add'>+			of_address_to_resource(np_ebu, 0, &amp;res_ebu))</div><div class='add'>+		panic("Failed to get core resources");</div><div class='add'>+</div><div class='add'>+	if ((request_mem_region(res_pmu.start, resource_size(&amp;res_pmu),</div><div class='add'>+				res_pmu.name) &lt; 0) ||</div><div class='add'>+		(request_mem_region(res_cgu.start, resource_size(&amp;res_cgu),</div><div class='add'>+				res_cgu.name) &lt; 0) ||</div><div class='add'>+		(request_mem_region(res_ebu.start, resource_size(&amp;res_ebu),</div><div class='add'>+				res_ebu.name) &lt; 0))</div><div class='add'>+		pr_err("Failed to request core reources");</div><div class='add'>+</div><div class='add'>+	pmu_membase = ioremap_nocache(res_pmu.start, resource_size(&amp;res_pmu));</div><div class='add'>+	ltq_cgu_membase = ioremap_nocache(res_cgu.start,</div><div class='add'>+						resource_size(&amp;res_cgu));</div><div class='add'>+	ltq_ebu_membase = ioremap_nocache(res_ebu.start,</div><div class='add'>+						resource_size(&amp;res_ebu));</div><div class='add'>+	if (!pmu_membase || !ltq_cgu_membase || !ltq_ebu_membase)</div><div class='add'>+		panic("Failed to remap core resources");</div><div class='add'>+</div><div class='add'>+	/* make sure to unprotect the memory region where flash is located */</div><div class='add'>+	ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_BUSCON0) &amp; ~EBU_WRDIS, LTQ_EBU_BUSCON0);</div><div class='add'>+</div><div class='add'>+	/* add our generic xway clocks */</div><div class='add'>+	clkdev_add_pmu("10000000.fpi", NULL, 0, PMU_FPI);</div><div class='add'>+	clkdev_add_pmu("1e100400.serial", NULL, 0, PMU_ASC0);</div><div class='add'>+	clkdev_add_pmu("1e100a00.gptu", NULL, 0, PMU_GPT);</div><div class='add'>+	clkdev_add_pmu("1e100bb0.stp", NULL, 0, PMU_STP);</div><div class='add'>+	clkdev_add_pmu("1e104100.dma", NULL, 0, PMU_DMA);</div><div class='add'>+	clkdev_add_pmu("1e100800.spi", NULL, 0, PMU_SPI);</div><div class='add'>+	clkdev_add_pmu("1e105300.ebu", NULL, 0, PMU_EBU);</div><div class='add'>+	clkdev_add_clkout();</div><div class='add'>+</div><div class='add'>+	/* add the soc dependent clocks */</div><div class='add'>+	if (!of_machine_is_compatible("lantiq,vr9"))</div><div class='add'>+		clkdev_add_pmu("1e180000.etop", NULL, 0, PMU_PPE);</div><div class='add'>+</div><div class='add'>+	if (!of_machine_is_compatible("lantiq,ase")) {</div><div class='add'>+		clkdev_add_pmu("1e100c00.serial", NULL, 0, PMU_ASC1);</div><div class='add'>+		clkdev_add_pci();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (of_machine_is_compatible("lantiq,ase")) {</div><div class='add'>+		if (ltq_cgu_r32(CGU_SYS) &amp; (1 &lt;&lt; 5))</div><div class='add'>+			clkdev_add_static(CLOCK_266M, CLOCK_133M, CLOCK_133M);</div><div class='add'>+		else</div><div class='add'>+			clkdev_add_static(CLOCK_133M, CLOCK_133M, CLOCK_133M);</div><div class='add'>+		clkdev_add_cgu("1e180000.etop", "ephycgu", CGU_EPHY),</div><div class='add'>+		clkdev_add_pmu("1e180000.etop", "ephy", 0, PMU_EPHY);</div><div class='add'>+	} else if (of_machine_is_compatible("lantiq,vr9")) {</div><div class='add'>+		clkdev_add_static(ltq_vr9_cpu_hz(), ltq_vr9_fpi_hz(),</div><div class='add'>+				ltq_vr9_fpi_hz());</div><div class='add'>+		clkdev_add_pmu("1d900000.pcie", "phy", 1, PMU1_PCIE_PHY);</div><div class='add'>+		clkdev_add_pmu("1d900000.pcie", "bus", 0, PMU_PCIE_CLK);</div><div class='add'>+		clkdev_add_pmu("1d900000.pcie", "msi", 1, PMU1_PCIE_MSI);</div><div class='add'>+		clkdev_add_pmu("1d900000.pcie", "pdi", 1, PMU1_PCIE_PDI);</div><div class='add'>+		clkdev_add_pmu("1d900000.pcie", "ctl", 1, PMU1_PCIE_CTL);</div><div class='add'>+		clkdev_add_pmu("1d900000.pcie", "ahb", 0, PMU_AHBM | PMU_AHBS);</div><div class='add'>+	} else if (of_machine_is_compatible("lantiq,ar9")) {</div><div class='add'>+		clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(),</div><div class='add'>+				ltq_ar9_fpi_hz());</div><div class='add'>+		clkdev_add_pmu("1e180000.etop", "switch", 0, PMU_SWITCH);</div><div class='add'>+	} else {</div><div class='add'>+		clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(),</div><div class='add'>+				ltq_danube_fpi_hz());</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c<br/>index 47037ec5589b..44e69e7a4519 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mm/c-octeon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/mm/c-octeon.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mm/c-octeon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/mm/c-octeon.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/r4kcache.h&gt;</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/war.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -248,6 +249,11 @@ static void __cpuinit probe_octeon(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void  __cpuinit octeon_cache_error_setup(void)</div><div class='add'>+{</div><div class='add'>+	extern char except_vec2_octeon;</div><div class='add'>+	set_handler(0x100, &amp;except_vec2_octeon, 0x80);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * Setup the Octeon cache flush routines</div><div class='hunk'>@@ -255,12 +261,6 @@ static void __cpuinit probe_octeon(void)</div><div class='ctx'>  */</div><div class='ctx'> void __cpuinit octeon_cache_init(void)</div><div class='ctx'> {</div><div class='del'>-	extern unsigned long ebase;</div><div class='del'>-	extern char except_vec2_octeon;</div><div class='del'>-</div><div class='del'>-	memcpy((void *)(ebase + 0x100), &amp;except_vec2_octeon, 0x80);</div><div class='del'>-	octeon_flush_cache_sigtramp(ebase + 0x100);</div><div class='del'>-</div><div class='ctx'> 	probe_octeon();</div><div class='ctx'> </div><div class='ctx'> 	shm_align_mask = PAGE_SIZE - 1;</div><div class='hunk'>@@ -280,6 +280,8 @@ void __cpuinit octeon_cache_init(void)</div><div class='ctx'> </div><div class='ctx'> 	build_clear_page();</div><div class='ctx'> 	build_copy_page();</div><div class='add'>+</div><div class='add'>+	board_cache_error_setup = octeon_cache_error_setup;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c<br/>index bda8eb26ece7..5109be96d98d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/mm/c-r4k.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/mm/c-r4k.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/mm/c-r4k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/mm/c-r4k.c</a></div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/war.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt; /* for run_uncached() */</div><div class='del'>-</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Special Variant of smp_call_function for use by cache functions:</div><div class='hunk'>@@ -1385,10 +1385,8 @@ static int __init setcoherentio(char *str)</div><div class='ctx'> __setup("coherentio", setcoherentio);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-void __cpuinit r4k_cache_init(void)</div><div class='add'>+static void __cpuinit r4k_cache_error_setup(void)</div><div class='ctx'> {</div><div class='del'>-	extern void build_clear_page(void);</div><div class='del'>-	extern void build_copy_page(void);</div><div class='ctx'> 	extern char __weak except_vec2_generic;</div><div class='ctx'> 	extern char __weak except_vec2_sb1;</div><div class='ctx'> 	struct cpuinfo_mips *c = &amp;current_cpu_data;</div><div class='hunk'>@@ -1403,6 +1401,13 @@ void __cpuinit r4k_cache_init(void)</div><div class='ctx'> 		set_uncached_handler(0x100, &amp;except_vec2_generic, 0x80);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __cpuinit r4k_cache_init(void)</div><div class='add'>+{</div><div class='add'>+	extern void build_clear_page(void);</div><div class='add'>+	extern void build_copy_page(void);</div><div class='add'>+	struct cpuinfo_mips *c = &amp;current_cpu_data;</div><div class='ctx'> </div><div class='ctx'> 	probe_pcache();</div><div class='ctx'> 	setup_scache();</div><div class='hunk'>@@ -1465,4 +1470,5 @@ void __cpuinit r4k_cache_init(void)</div><div class='ctx'> 	local_r4k___flush_cache_all(NULL);</div><div class='ctx'> #endif</div><div class='ctx'> 	coherency_setup();</div><div class='add'>+	board_cache_error_setup = r4k_cache_error_setup;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/oprofile/Makefile b/arch/mips/oprofile/Makefile<br/>index 29f2f13eb31c..1208c280f77d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/oprofile/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/oprofile/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/oprofile/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/oprofile/Makefile</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-ccflags-y := -Werror</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_OPROFILE) += oprofile.o</div><div class='ctx'> </div><div class='ctx'> DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \</div><div class='head'>diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c<br/>index 54759f1669d3..baba3bcaa3c2 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/oprofile/op_model_mipsxx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/oprofile/op_model_mipsxx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/oprofile/op_model_mipsxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/oprofile/op_model_mipsxx.c</a></div><div class='hunk'>@@ -298,6 +298,11 @@ static void reset_counters(void *arg)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static irqreturn_t mipsxx_perfcount_int(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	return mipsxx_perfcount_handler();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init mipsxx_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int counters;</div><div class='hunk'>@@ -374,6 +379,10 @@ static int __init mipsxx_init(void)</div><div class='ctx'> 	save_perf_irq = perf_irq;</div><div class='ctx'> 	perf_irq = mipsxx_perfcount_handler;</div><div class='ctx'> </div><div class='add'>+	if ((cp0_perfcount_irq &gt;= 0) &amp;&amp; (cp0_compare_irq != cp0_perfcount_irq))</div><div class='add'>+		return request_irq(cp0_perfcount_irq, mipsxx_perfcount_int,</div><div class='add'>+			0, "Perfcounter", save_perf_irq);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -381,6 +390,9 @@ static void mipsxx_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	int counters = op_model_mipsxx_ops.num_counters;</div><div class='ctx'> </div><div class='add'>+	if ((cp0_perfcount_irq &gt;= 0) &amp;&amp; (cp0_compare_irq != cp0_perfcount_irq))</div><div class='add'>+		free_irq(cp0_perfcount_irq, save_perf_irq);</div><div class='add'>+</div><div class='ctx'> 	counters = counters_per_cpu_to_total(counters);</div><div class='ctx'> 	on_each_cpu(reset_counters, (void *)(long)counters, 1);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile<br/>index c3ac4b086eb2..c703f43a9914 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pci/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/pci/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/Makefile</a></div><div class='hunk'>@@ -19,7 +19,8 @@ obj-$(CONFIG_BCM47XX)		+= pci-bcm47xx.o</div><div class='ctx'> obj-$(CONFIG_BCM63XX)		+= pci-bcm63xx.o fixup-bcm63xx.o \</div><div class='ctx'> 					ops-bcm63xx.o</div><div class='ctx'> obj-$(CONFIG_MIPS_ALCHEMY)	+= pci-alchemy.o</div><div class='del'>-obj-$(CONFIG_SOC_AR724X)	+= pci-ath724x.o</div><div class='add'>+obj-$(CONFIG_SOC_AR71XX)	+= pci-ar71xx.o</div><div class='add'>+obj-$(CONFIG_PCI_AR724X)	+= pci-ar724x.o</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # These are still pretty much in the old state, watch, go blind.</div><div class='hunk'>@@ -41,7 +42,8 @@ obj-$(CONFIG_SIBYTE_SB1250)	+= fixup-sb1250.o pci-sb1250.o</div><div class='ctx'> obj-$(CONFIG_SIBYTE_BCM112X)	+= fixup-sb1250.o pci-sb1250.o</div><div class='ctx'> obj-$(CONFIG_SIBYTE_BCM1x80)	+= pci-bcm1480.o pci-bcm1480ht.o</div><div class='ctx'> obj-$(CONFIG_SNI_RM)		+= fixup-sni.o ops-sni.o</div><div class='del'>-obj-$(CONFIG_SOC_XWAY)		+= pci-lantiq.o ops-lantiq.o</div><div class='add'>+obj-$(CONFIG_LANTIQ)		+= fixup-lantiq.o</div><div class='add'>+obj-$(CONFIG_PCI_LANTIQ)	+= pci-lantiq.o ops-lantiq.o</div><div class='ctx'> obj-$(CONFIG_TANBAC_TB0219)	+= fixup-tb0219.o</div><div class='ctx'> obj-$(CONFIG_TANBAC_TB0226)	+= fixup-tb0226.o</div><div class='ctx'> obj-$(CONFIG_TANBAC_TB0287)	+= fixup-tb0287.o</div><div class='head'>diff --git a/arch/mips/pci/fixup-lantiq.c b/arch/mips/pci/fixup-lantiq.c<br/>new file mode 100644<br/>index 000000000000..6c829df28dc7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/fixup-lantiq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/fixup-lantiq.c</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+/*</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_pci.h&gt;</div><div class='add'>+</div><div class='add'>+int (*ltq_pci_plat_arch_init)(struct pci_dev *dev) = NULL;</div><div class='add'>+int (*ltq_pci_plat_dev_init)(struct pci_dev *dev) = NULL;</div><div class='add'>+</div><div class='add'>+int pcibios_plat_dev_init(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	if (ltq_pci_plat_arch_init)</div><div class='add'>+		return ltq_pci_plat_arch_init(dev);</div><div class='add'>+</div><div class='add'>+	if (ltq_pci_plat_dev_init)</div><div class='add'>+		return ltq_pci_plat_dev_init(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='add'>+{</div><div class='add'>+	struct of_irq dev_irq;</div><div class='add'>+	int irq;</div><div class='add'>+</div><div class='add'>+	if (of_irq_map_pci(dev, &amp;dev_irq)) {</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "trying to map irq for unknown slot:%d pin:%d\n",</div><div class='add'>+			slot, pin);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	irq = irq_create_of_mapping(dev_irq.controller, dev_irq.specifier,</div><div class='add'>+					dev_irq.size);</div><div class='add'>+	dev_info(&amp;dev-&gt;dev, "SLOT:%d PIN:%d IRQ:%d\n", slot, pin, irq);</div><div class='add'>+	return irq;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c<br/>index d657ee0bc131..afd221122d22 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pci/ops-loongson2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/pci/ops-loongson2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/ops-loongson2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/ops-loongson2.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;loongson.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c<br/>new file mode 100644<br/>index 000000000000..1552522b8718<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/pci-ar71xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/pci-ar71xx.c</a></div><div class='hunk'>@@ -0,0 +1,375 @@</div><div class='add'>+/*</div><div class='add'>+ *  Atheros AR71xx PCI host controller driver</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2008-2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ *  Copyright (C) 2008 Imre Kaloz &lt;kaloz@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ *  Parts of this file are based on Atheros' 2.6.15 BSP</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/resource.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/pci_regs.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/mach-ath79/ar71xx_regs.h&gt;</div><div class='add'>+#include &lt;asm/mach-ath79/ath79.h&gt;</div><div class='add'>+#include &lt;asm/mach-ath79/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#define AR71XX_PCI_MEM_BASE	0x10000000</div><div class='add'>+#define AR71XX_PCI_MEM_SIZE	0x08000000</div><div class='add'>+</div><div class='add'>+#define AR71XX_PCI_WIN0_OFFS		0x10000000</div><div class='add'>+#define AR71XX_PCI_WIN1_OFFS		0x11000000</div><div class='add'>+#define AR71XX_PCI_WIN2_OFFS		0x12000000</div><div class='add'>+#define AR71XX_PCI_WIN3_OFFS		0x13000000</div><div class='add'>+#define AR71XX_PCI_WIN4_OFFS		0x14000000</div><div class='add'>+#define AR71XX_PCI_WIN5_OFFS		0x15000000</div><div class='add'>+#define AR71XX_PCI_WIN6_OFFS		0x16000000</div><div class='add'>+#define AR71XX_PCI_WIN7_OFFS		0x07000000</div><div class='add'>+</div><div class='add'>+#define AR71XX_PCI_CFG_BASE		\</div><div class='add'>+	(AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)</div><div class='add'>+#define AR71XX_PCI_CFG_SIZE		0x100</div><div class='add'>+</div><div class='add'>+#define AR71XX_PCI_REG_CRP_AD_CBE	0x00</div><div class='add'>+#define AR71XX_PCI_REG_CRP_WRDATA	0x04</div><div class='add'>+#define AR71XX_PCI_REG_CRP_RDDATA	0x08</div><div class='add'>+#define AR71XX_PCI_REG_CFG_AD		0x0c</div><div class='add'>+#define AR71XX_PCI_REG_CFG_CBE		0x10</div><div class='add'>+#define AR71XX_PCI_REG_CFG_WRDATA	0x14</div><div class='add'>+#define AR71XX_PCI_REG_CFG_RDDATA	0x18</div><div class='add'>+#define AR71XX_PCI_REG_PCI_ERR		0x1c</div><div class='add'>+#define AR71XX_PCI_REG_PCI_ERR_ADDR	0x20</div><div class='add'>+#define AR71XX_PCI_REG_AHB_ERR		0x24</div><div class='add'>+#define AR71XX_PCI_REG_AHB_ERR_ADDR	0x28</div><div class='add'>+</div><div class='add'>+#define AR71XX_PCI_CRP_CMD_WRITE	0x00010000</div><div class='add'>+#define AR71XX_PCI_CRP_CMD_READ		0x00000000</div><div class='add'>+#define AR71XX_PCI_CFG_CMD_READ		0x0000000a</div><div class='add'>+#define AR71XX_PCI_CFG_CMD_WRITE	0x0000000b</div><div class='add'>+</div><div class='add'>+#define AR71XX_PCI_INT_CORE		BIT(4)</div><div class='add'>+#define AR71XX_PCI_INT_DEV2		BIT(2)</div><div class='add'>+#define AR71XX_PCI_INT_DEV1		BIT(1)</div><div class='add'>+#define AR71XX_PCI_INT_DEV0		BIT(0)</div><div class='add'>+</div><div class='add'>+#define AR71XX_PCI_IRQ_COUNT		5</div><div class='add'>+</div><div class='add'>+static DEFINE_SPINLOCK(ar71xx_pci_lock);</div><div class='add'>+static void __iomem *ar71xx_pcicfg_base;</div><div class='add'>+</div><div class='add'>+/* Byte lane enable bits */</div><div class='add'>+static const u8 ar71xx_pci_ble_table[4][4] = {</div><div class='add'>+	{0x0, 0xf, 0xf, 0xf},</div><div class='add'>+	{0xe, 0xd, 0xb, 0x7},</div><div class='add'>+	{0xc, 0xf, 0x3, 0xf},</div><div class='add'>+	{0xf, 0xf, 0xf, 0xf},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 ar71xx_pci_read_mask[8] = {</div><div class='add'>+	0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32 ar71xx_pci_get_ble(int where, int size, int local)</div><div class='add'>+{</div><div class='add'>+	u32 t;</div><div class='add'>+</div><div class='add'>+	t = ar71xx_pci_ble_table[size &amp; 3][where &amp; 3];</div><div class='add'>+	BUG_ON(t == 0xf);</div><div class='add'>+	t &lt;&lt;= (local) ? 20 : 4;</div><div class='add'>+</div><div class='add'>+	return t;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 ar71xx_pci_bus_addr(struct pci_bus *bus, unsigned int devfn,</div><div class='add'>+				      int where)</div><div class='add'>+{</div><div class='add'>+	u32 ret;</div><div class='add'>+</div><div class='add'>+	if (!bus-&gt;number) {</div><div class='add'>+		/* type 0 */</div><div class='add'>+		ret = (1 &lt;&lt; PCI_SLOT(devfn)) | (PCI_FUNC(devfn) &lt;&lt; 8) |</div><div class='add'>+		      (where &amp; ~3);</div><div class='add'>+	} else {</div><div class='add'>+		/* type 1 */</div><div class='add'>+		ret = (bus-&gt;number &lt;&lt; 16) | (PCI_SLOT(devfn) &lt;&lt; 11) |</div><div class='add'>+		      (PCI_FUNC(devfn) &lt;&lt; 8) | (where &amp; ~3) | 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar71xx_pci_check_error(int quiet)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = ar71xx_pcicfg_base;</div><div class='add'>+	u32 pci_err;</div><div class='add'>+	u32 ahb_err;</div><div class='add'>+</div><div class='add'>+	pci_err = __raw_readl(base + AR71XX_PCI_REG_PCI_ERR) &amp; 3;</div><div class='add'>+	if (pci_err) {</div><div class='add'>+		if (!quiet) {</div><div class='add'>+			u32 addr;</div><div class='add'>+</div><div class='add'>+			addr = __raw_readl(base + AR71XX_PCI_REG_PCI_ERR_ADDR);</div><div class='add'>+			pr_crit("ar71xx: %s bus error %d at addr 0x%x\n",</div><div class='add'>+				"PCI", pci_err, addr);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* clear PCI error status */</div><div class='add'>+		__raw_writel(pci_err, base + AR71XX_PCI_REG_PCI_ERR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ahb_err = __raw_readl(base + AR71XX_PCI_REG_AHB_ERR) &amp; 1;</div><div class='add'>+	if (ahb_err) {</div><div class='add'>+		if (!quiet) {</div><div class='add'>+			u32 addr;</div><div class='add'>+</div><div class='add'>+			addr = __raw_readl(base + AR71XX_PCI_REG_AHB_ERR_ADDR);</div><div class='add'>+			pr_crit("ar71xx: %s bus error %d at addr 0x%x\n",</div><div class='add'>+				"AHB", ahb_err, addr);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* clear AHB error status */</div><div class='add'>+		__raw_writel(ahb_err, base + AR71XX_PCI_REG_AHB_ERR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return !!(ahb_err | pci_err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ar71xx_pci_local_write(int where, int size, u32 value)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = ar71xx_pcicfg_base;</div><div class='add'>+	u32 ad_cbe;</div><div class='add'>+</div><div class='add'>+	value = value &lt;&lt; (8 * (where &amp; 3));</div><div class='add'>+</div><div class='add'>+	ad_cbe = AR71XX_PCI_CRP_CMD_WRITE | (where &amp; ~3);</div><div class='add'>+	ad_cbe |= ar71xx_pci_get_ble(where, size, 1);</div><div class='add'>+</div><div class='add'>+	__raw_writel(ad_cbe, base + AR71XX_PCI_REG_CRP_AD_CBE);</div><div class='add'>+	__raw_writel(value, base + AR71XX_PCI_REG_CRP_WRDATA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ar71xx_pci_set_cfgaddr(struct pci_bus *bus,</div><div class='add'>+					 unsigned int devfn,</div><div class='add'>+					 int where, int size, u32 cmd)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = ar71xx_pcicfg_base;</div><div class='add'>+	u32 addr;</div><div class='add'>+</div><div class='add'>+	addr = ar71xx_pci_bus_addr(bus, devfn, where);</div><div class='add'>+</div><div class='add'>+	__raw_writel(addr, base + AR71XX_PCI_REG_CFG_AD);</div><div class='add'>+	__raw_writel(cmd | ar71xx_pci_get_ble(where, size, 0),</div><div class='add'>+		     base + AR71XX_PCI_REG_CFG_CBE);</div><div class='add'>+</div><div class='add'>+	return ar71xx_pci_check_error(1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,</div><div class='add'>+				  int where, int size, u32 *value)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = ar71xx_pcicfg_base;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 data;</div><div class='add'>+	int err;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = PCIBIOS_SUCCESSFUL;</div><div class='add'>+	data = ~0;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ar71xx_pci_lock, flags);</div><div class='add'>+</div><div class='add'>+	err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,</div><div class='add'>+				     AR71XX_PCI_CFG_CMD_READ);</div><div class='add'>+	if (err)</div><div class='add'>+		ret = PCIBIOS_DEVICE_NOT_FOUND;</div><div class='add'>+	else</div><div class='add'>+		data = __raw_readl(base + AR71XX_PCI_REG_CFG_RDDATA);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;ar71xx_pci_lock, flags);</div><div class='add'>+</div><div class='add'>+	*value = (data &gt;&gt; (8 * (where &amp; 3))) &amp; ar71xx_pci_read_mask[size &amp; 7];</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,</div><div class='add'>+				   int where, int size, u32 value)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = ar71xx_pcicfg_base;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int err;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	value = value &lt;&lt; (8 * (where &amp; 3));</div><div class='add'>+	ret = PCIBIOS_SUCCESSFUL;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ar71xx_pci_lock, flags);</div><div class='add'>+</div><div class='add'>+	err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,</div><div class='add'>+				     AR71XX_PCI_CFG_CMD_WRITE);</div><div class='add'>+	if (err)</div><div class='add'>+		ret = PCIBIOS_DEVICE_NOT_FOUND;</div><div class='add'>+	else</div><div class='add'>+		__raw_writel(value, base + AR71XX_PCI_REG_CFG_WRDATA);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;ar71xx_pci_lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_ops ar71xx_pci_ops = {</div><div class='add'>+	.read	= ar71xx_pci_read_config,</div><div class='add'>+	.write	= ar71xx_pci_write_config,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource ar71xx_pci_io_resource = {</div><div class='add'>+	.name		= "PCI IO space",</div><div class='add'>+	.start		= 0,</div><div class='add'>+	.end		= 0,</div><div class='add'>+	.flags		= IORESOURCE_IO,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource ar71xx_pci_mem_resource = {</div><div class='add'>+	.name		= "PCI memory space",</div><div class='add'>+	.start		= AR71XX_PCI_MEM_BASE,</div><div class='add'>+	.end		= AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1,</div><div class='add'>+	.flags		= IORESOURCE_MEM</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pci_controller ar71xx_pci_controller = {</div><div class='add'>+	.pci_ops	= &amp;ar71xx_pci_ops,</div><div class='add'>+	.mem_resource	= &amp;ar71xx_pci_mem_resource,</div><div class='add'>+	.io_resource	= &amp;ar71xx_pci_io_resource,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = ath79_reset_base;</div><div class='add'>+	u32 pending;</div><div class='add'>+</div><div class='add'>+	pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &amp;</div><div class='add'>+		  __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);</div><div class='add'>+</div><div class='add'>+	if (pending &amp; AR71XX_PCI_INT_DEV0)</div><div class='add'>+		generic_handle_irq(ATH79_PCI_IRQ(0));</div><div class='add'>+</div><div class='add'>+	else if (pending &amp; AR71XX_PCI_INT_DEV1)</div><div class='add'>+		generic_handle_irq(ATH79_PCI_IRQ(1));</div><div class='add'>+</div><div class='add'>+	else if (pending &amp; AR71XX_PCI_INT_DEV2)</div><div class='add'>+		generic_handle_irq(ATH79_PCI_IRQ(2));</div><div class='add'>+</div><div class='add'>+	else if (pending &amp; AR71XX_PCI_INT_CORE)</div><div class='add'>+		generic_handle_irq(ATH79_PCI_IRQ(4));</div><div class='add'>+</div><div class='add'>+	else</div><div class='add'>+		spurious_interrupt();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar71xx_pci_irq_unmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	unsigned int irq = d-&gt;irq - ATH79_PCI_IRQ_BASE;</div><div class='add'>+	void __iomem *base = ath79_reset_base;</div><div class='add'>+	u32 t;</div><div class='add'>+</div><div class='add'>+	t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);</div><div class='add'>+	__raw_writel(t | (1 &lt;&lt; irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);</div><div class='add'>+</div><div class='add'>+	/* flush write */</div><div class='add'>+	__raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar71xx_pci_irq_mask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	unsigned int irq = d-&gt;irq - ATH79_PCI_IRQ_BASE;</div><div class='add'>+	void __iomem *base = ath79_reset_base;</div><div class='add'>+	u32 t;</div><div class='add'>+</div><div class='add'>+	t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);</div><div class='add'>+	__raw_writel(t &amp; ~(1 &lt;&lt; irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);</div><div class='add'>+</div><div class='add'>+	/* flush write */</div><div class='add'>+	__raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_chip ar71xx_pci_irq_chip = {</div><div class='add'>+	.name		= "AR71XX PCI",</div><div class='add'>+	.irq_mask	= ar71xx_pci_irq_mask,</div><div class='add'>+	.irq_unmask	= ar71xx_pci_irq_unmask,</div><div class='add'>+	.irq_mask_ack	= ar71xx_pci_irq_mask,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __init void ar71xx_pci_irq_init(void)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = ath79_reset_base;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	__raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE);</div><div class='add'>+	__raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT &lt; AR71XX_PCI_IRQ_COUNT);</div><div class='add'>+</div><div class='add'>+	for (i = ATH79_PCI_IRQ_BASE;</div><div class='add'>+	     i &lt; ATH79_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)</div><div class='add'>+		irq_set_chip_and_handler(i, &amp;ar71xx_pci_irq_chip,</div><div class='add'>+					 handle_level_irq);</div><div class='add'>+</div><div class='add'>+	irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar71xx_pci_irq_handler);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init void ar71xx_pci_reset(void)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ddr_base = ath79_ddr_base;</div><div class='add'>+</div><div class='add'>+	ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE);</div><div class='add'>+	mdelay(100);</div><div class='add'>+</div><div class='add'>+	ath79_device_reset_clear(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE);</div><div class='add'>+	mdelay(100);</div><div class='add'>+</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN0_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN0);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN1_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN1);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN2_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN2);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN3_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN3);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN4_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN4);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN5_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN5);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN6_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN6);</div><div class='add'>+	__raw_writel(AR71XX_PCI_WIN7_OFFS, ddr_base + AR71XX_DDR_REG_PCI_WIN7);</div><div class='add'>+</div><div class='add'>+	mdelay(100);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+__init int ar71xx_pcibios_init(void)</div><div class='add'>+{</div><div class='add'>+	u32 t;</div><div class='add'>+</div><div class='add'>+	ar71xx_pcicfg_base = ioremap(AR71XX_PCI_CFG_BASE, AR71XX_PCI_CFG_SIZE);</div><div class='add'>+	if (ar71xx_pcicfg_base == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ar71xx_pci_reset();</div><div class='add'>+</div><div class='add'>+	/* setup COMMAND register */</div><div class='add'>+	t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE</div><div class='add'>+	  | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;</div><div class='add'>+	ar71xx_pci_local_write(PCI_COMMAND, 4, t);</div><div class='add'>+</div><div class='add'>+	/* clear bus errors */</div><div class='add'>+	ar71xx_pci_check_error(1);</div><div class='add'>+</div><div class='add'>+	ar71xx_pci_irq_init();</div><div class='add'>+</div><div class='add'>+	register_pci_controller(&amp;ar71xx_pci_controller);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c<br/>new file mode 100644<br/>index 000000000000..414a7459858d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/pci-ar724x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/pci-ar724x.c</a></div><div class='hunk'>@@ -0,0 +1,292 @@</div><div class='add'>+/*</div><div class='add'>+ *  Atheros AR724X PCI host controller driver</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2011 René Bolldorf &lt;xsecute@googlemail.com&gt;</div><div class='add'>+ *  Copyright (C) 2009-2011 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;asm/mach-ath79/ath79.h&gt;</div><div class='add'>+#include &lt;asm/mach-ath79/ar71xx_regs.h&gt;</div><div class='add'>+#include &lt;asm/mach-ath79/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#define AR724X_PCI_CFG_BASE	0x14000000</div><div class='add'>+#define AR724X_PCI_CFG_SIZE	0x1000</div><div class='add'>+#define AR724X_PCI_CTRL_BASE	(AR71XX_APB_BASE + 0x000f0000)</div><div class='add'>+#define AR724X_PCI_CTRL_SIZE	0x100</div><div class='add'>+</div><div class='add'>+#define AR724X_PCI_MEM_BASE	0x10000000</div><div class='add'>+#define AR724X_PCI_MEM_SIZE	0x08000000</div><div class='add'>+</div><div class='add'>+#define AR724X_PCI_REG_INT_STATUS	0x4c</div><div class='add'>+#define AR724X_PCI_REG_INT_MASK		0x50</div><div class='add'>+</div><div class='add'>+#define AR724X_PCI_INT_DEV0		BIT(14)</div><div class='add'>+</div><div class='add'>+#define AR724X_PCI_IRQ_COUNT		1</div><div class='add'>+</div><div class='add'>+#define AR7240_BAR0_WAR_VALUE	0xffff</div><div class='add'>+</div><div class='add'>+static DEFINE_SPINLOCK(ar724x_pci_lock);</div><div class='add'>+static void __iomem *ar724x_pci_devcfg_base;</div><div class='add'>+static void __iomem *ar724x_pci_ctrl_base;</div><div class='add'>+</div><div class='add'>+static u32 ar724x_pci_bar0_value;</div><div class='add'>+static bool ar724x_pci_bar0_is_cached;</div><div class='add'>+</div><div class='add'>+static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='add'>+			    int size, uint32_t *value)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	if (devfn)</div><div class='add'>+		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='add'>+</div><div class='add'>+	base = ar724x_pci_devcfg_base;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ar724x_pci_lock, flags);</div><div class='add'>+	data = __raw_readl(base + (where &amp; ~3));</div><div class='add'>+</div><div class='add'>+	switch (size) {</div><div class='add'>+	case 1:</div><div class='add'>+		if (where &amp; 1)</div><div class='add'>+			data &gt;&gt;= 8;</div><div class='add'>+		if (where &amp; 2)</div><div class='add'>+			data &gt;&gt;= 16;</div><div class='add'>+		data &amp;= 0xff;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		if (where &amp; 2)</div><div class='add'>+			data &gt;&gt;= 16;</div><div class='add'>+		data &amp;= 0xffff;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		spin_unlock_irqrestore(&amp;ar724x_pci_lock, flags);</div><div class='add'>+</div><div class='add'>+		return PCIBIOS_BAD_REGISTER_NUMBER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;ar724x_pci_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (where == PCI_BASE_ADDRESS_0 &amp;&amp; size == 4 &amp;&amp;</div><div class='add'>+	    ar724x_pci_bar0_is_cached) {</div><div class='add'>+		/* use the cached value */</div><div class='add'>+		*value = ar724x_pci_bar0_value;</div><div class='add'>+	} else {</div><div class='add'>+		*value = data;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return PCIBIOS_SUCCESSFUL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='add'>+			     int size, uint32_t value)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	u32 data;</div><div class='add'>+	int s;</div><div class='add'>+</div><div class='add'>+	if (devfn)</div><div class='add'>+		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='add'>+</div><div class='add'>+	if (soc_is_ar7240() &amp;&amp; where == PCI_BASE_ADDRESS_0 &amp;&amp; size == 4) {</div><div class='add'>+		if (value != 0xffffffff) {</div><div class='add'>+			/*</div><div class='add'>+			 * WAR for a hw issue. If the BAR0 register of the</div><div class='add'>+			 * device is set to the proper base address, the</div><div class='add'>+			 * memory space of the device is not accessible.</div><div class='add'>+			 *</div><div class='add'>+			 * Cache the intended value so it can be read back,</div><div class='add'>+			 * and write a SoC specific constant value to the</div><div class='add'>+			 * BAR0 register in order to make the device memory</div><div class='add'>+			 * accessible.</div><div class='add'>+			 */</div><div class='add'>+			ar724x_pci_bar0_is_cached = true;</div><div class='add'>+			ar724x_pci_bar0_value = value;</div><div class='add'>+</div><div class='add'>+			value = AR7240_BAR0_WAR_VALUE;</div><div class='add'>+		} else {</div><div class='add'>+			ar724x_pci_bar0_is_cached = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	base = ar724x_pci_devcfg_base;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ar724x_pci_lock, flags);</div><div class='add'>+	data = __raw_readl(base + (where &amp; ~3));</div><div class='add'>+</div><div class='add'>+	switch (size) {</div><div class='add'>+	case 1:</div><div class='add'>+		s = ((where &amp; 3) * 8);</div><div class='add'>+		data &amp;= ~(0xff &lt;&lt; s);</div><div class='add'>+		data |= ((value &amp; 0xff) &lt;&lt; s);</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		s = ((where &amp; 2) * 8);</div><div class='add'>+		data &amp;= ~(0xffff &lt;&lt; s);</div><div class='add'>+		data |= ((value &amp; 0xffff) &lt;&lt; s);</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		data = value;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		spin_unlock_irqrestore(&amp;ar724x_pci_lock, flags);</div><div class='add'>+</div><div class='add'>+		return PCIBIOS_BAD_REGISTER_NUMBER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__raw_writel(data, base + (where &amp; ~3));</div><div class='add'>+	/* flush write */</div><div class='add'>+	__raw_readl(base + (where &amp; ~3));</div><div class='add'>+	spin_unlock_irqrestore(&amp;ar724x_pci_lock, flags);</div><div class='add'>+</div><div class='add'>+	return PCIBIOS_SUCCESSFUL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_ops ar724x_pci_ops = {</div><div class='add'>+	.read	= ar724x_pci_read,</div><div class='add'>+	.write	= ar724x_pci_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource ar724x_io_resource = {</div><div class='add'>+	.name   = "PCI IO space",</div><div class='add'>+	.start  = 0,</div><div class='add'>+	.end    = 0,</div><div class='add'>+	.flags  = IORESOURCE_IO,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource ar724x_mem_resource = {</div><div class='add'>+	.name   = "PCI memory space",</div><div class='add'>+	.start  = AR724X_PCI_MEM_BASE,</div><div class='add'>+	.end    = AR724X_PCI_MEM_BASE + AR724X_PCI_MEM_SIZE - 1,</div><div class='add'>+	.flags  = IORESOURCE_MEM,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pci_controller ar724x_pci_controller = {</div><div class='add'>+	.pci_ops        = &amp;ar724x_pci_ops,</div><div class='add'>+	.io_resource    = &amp;ar724x_io_resource,</div><div class='add'>+	.mem_resource	= &amp;ar724x_mem_resource,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	u32 pending;</div><div class='add'>+</div><div class='add'>+	base = ar724x_pci_ctrl_base;</div><div class='add'>+</div><div class='add'>+	pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) &amp;</div><div class='add'>+		  __raw_readl(base + AR724X_PCI_REG_INT_MASK);</div><div class='add'>+</div><div class='add'>+	if (pending &amp; AR724X_PCI_INT_DEV0)</div><div class='add'>+		generic_handle_irq(ATH79_PCI_IRQ(0));</div><div class='add'>+</div><div class='add'>+	else</div><div class='add'>+		spurious_interrupt();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar724x_pci_irq_unmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	u32 t;</div><div class='add'>+</div><div class='add'>+	base = ar724x_pci_ctrl_base;</div><div class='add'>+</div><div class='add'>+	switch (d-&gt;irq) {</div><div class='add'>+	case ATH79_PCI_IRQ(0):</div><div class='add'>+		t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);</div><div class='add'>+		__raw_writel(t | AR724X_PCI_INT_DEV0,</div><div class='add'>+			     base + AR724X_PCI_REG_INT_MASK);</div><div class='add'>+		/* flush write */</div><div class='add'>+		__raw_readl(base + AR724X_PCI_REG_INT_MASK);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar724x_pci_irq_mask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	u32 t;</div><div class='add'>+</div><div class='add'>+	base = ar724x_pci_ctrl_base;</div><div class='add'>+</div><div class='add'>+	switch (d-&gt;irq) {</div><div class='add'>+	case ATH79_PCI_IRQ(0):</div><div class='add'>+		t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);</div><div class='add'>+		__raw_writel(t &amp; ~AR724X_PCI_INT_DEV0,</div><div class='add'>+			     base + AR724X_PCI_REG_INT_MASK);</div><div class='add'>+</div><div class='add'>+		/* flush write */</div><div class='add'>+		__raw_readl(base + AR724X_PCI_REG_INT_MASK);</div><div class='add'>+</div><div class='add'>+		t = __raw_readl(base + AR724X_PCI_REG_INT_STATUS);</div><div class='add'>+		__raw_writel(t | AR724X_PCI_INT_DEV0,</div><div class='add'>+			     base + AR724X_PCI_REG_INT_STATUS);</div><div class='add'>+</div><div class='add'>+		/* flush write */</div><div class='add'>+		__raw_readl(base + AR724X_PCI_REG_INT_STATUS);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_chip ar724x_pci_irq_chip = {</div><div class='add'>+	.name		= "AR724X PCI ",</div><div class='add'>+	.irq_mask	= ar724x_pci_irq_mask,</div><div class='add'>+	.irq_unmask	= ar724x_pci_irq_unmask,</div><div class='add'>+	.irq_mask_ack	= ar724x_pci_irq_mask,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init ar724x_pci_irq_init(int irq)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	base = ar724x_pci_ctrl_base;</div><div class='add'>+</div><div class='add'>+	__raw_writel(0, base + AR724X_PCI_REG_INT_MASK);</div><div class='add'>+	__raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT &lt; AR724X_PCI_IRQ_COUNT);</div><div class='add'>+</div><div class='add'>+	for (i = ATH79_PCI_IRQ_BASE;</div><div class='add'>+	     i &lt; ATH79_PCI_IRQ_BASE + AR724X_PCI_IRQ_COUNT; i++)</div><div class='add'>+		irq_set_chip_and_handler(i, &amp;ar724x_pci_irq_chip,</div><div class='add'>+					 handle_level_irq);</div><div class='add'>+</div><div class='add'>+	irq_set_chained_handler(irq, ar724x_pci_irq_handler);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init ar724x_pcibios_init(int irq)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE,</div><div class='add'>+					 AR724X_PCI_CFG_SIZE);</div><div class='add'>+	if (ar724x_pci_devcfg_base == NULL)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ar724x_pci_ctrl_base = ioremap(AR724X_PCI_CTRL_BASE,</div><div class='add'>+				       AR724X_PCI_CTRL_SIZE);</div><div class='add'>+	if (ar724x_pci_ctrl_base == NULL)</div><div class='add'>+		goto err_unmap_devcfg;</div><div class='add'>+</div><div class='add'>+	ar724x_pci_irq_init(irq);</div><div class='add'>+	register_pci_controller(&amp;ar724x_pci_controller);</div><div class='add'>+</div><div class='add'>+	return PCIBIOS_SUCCESSFUL;</div><div class='add'>+</div><div class='add'>+err_unmap_devcfg:</div><div class='add'>+	iounmap(ar724x_pci_devcfg_base);</div><div class='add'>+err:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/mips/pci/pci-ath724x.c b/arch/mips/pci/pci-ath724x.c<br/>deleted file mode 100644<br/>index a4dd24a4130b..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mips/pci/pci-ath724x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/pci/pci-ath724x.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,174 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  Atheros 724x PCI support</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2011 René Bolldorf &lt;xsecute@googlemail.com&gt;</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License version 2 as published</div><div class='del'>- *  by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;asm/mach-ath79/pci-ath724x.h&gt;</div><div class='del'>-</div><div class='del'>-#define reg_read(_phys)		(*(unsigned int *) KSEG1ADDR(_phys))</div><div class='del'>-#define reg_write(_phys, _val)	((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))</div><div class='del'>-</div><div class='del'>-#define ATH724X_PCI_DEV_BASE	0x14000000</div><div class='del'>-#define ATH724X_PCI_MEM_BASE	0x10000000</div><div class='del'>-#define ATH724X_PCI_MEM_SIZE	0x08000000</div><div class='del'>-</div><div class='del'>-static DEFINE_SPINLOCK(ath724x_pci_lock);</div><div class='del'>-static struct ath724x_pci_data *pci_data;</div><div class='del'>-static int pci_data_size;</div><div class='del'>-</div><div class='del'>-static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='del'>-			    int size, uint32_t *value)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags, addr, tval, mask;</div><div class='del'>-</div><div class='del'>-	if (devfn)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	if (where &amp; (size - 1))</div><div class='del'>-		return PCIBIOS_BAD_REGISTER_NUMBER;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;ath724x_pci_lock, flags);</div><div class='del'>-</div><div class='del'>-	switch (size) {</div><div class='del'>-	case 1:</div><div class='del'>-		addr = where &amp; ~3;</div><div class='del'>-		mask = 0xff000000 &gt;&gt; ((where % 4) * 8);</div><div class='del'>-		tval = reg_read(ATH724X_PCI_DEV_BASE + addr);</div><div class='del'>-		tval = tval &amp; ~mask;</div><div class='del'>-		*value = (tval &gt;&gt; ((4 - (where % 4))*8));</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		addr = where &amp; ~3;</div><div class='del'>-		mask = 0xffff0000 &gt;&gt; ((where % 4)*8);</div><div class='del'>-		tval = reg_read(ATH724X_PCI_DEV_BASE + addr);</div><div class='del'>-		tval = tval &amp; ~mask;</div><div class='del'>-		*value = (tval &gt;&gt; ((4 - (where % 4))*8));</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		*value = reg_read(ATH724X_PCI_DEV_BASE + where);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		spin_unlock_irqrestore(&amp;ath724x_pci_lock, flags);</div><div class='del'>-</div><div class='del'>-		return PCIBIOS_BAD_REGISTER_NUMBER;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;ath724x_pci_lock, flags);</div><div class='del'>-</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,</div><div class='del'>-			     int size, uint32_t value)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags, tval, addr, mask;</div><div class='del'>-</div><div class='del'>-	if (devfn)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	if (where &amp; (size - 1))</div><div class='del'>-		return PCIBIOS_BAD_REGISTER_NUMBER;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;ath724x_pci_lock, flags);</div><div class='del'>-</div><div class='del'>-	switch (size) {</div><div class='del'>-	case 1:</div><div class='del'>-		addr = (ATH724X_PCI_DEV_BASE + where) &amp; ~3;</div><div class='del'>-		mask = 0xff000000 &gt;&gt; ((where % 4)*8);</div><div class='del'>-		tval = reg_read(addr);</div><div class='del'>-		tval = tval &amp; ~mask;</div><div class='del'>-		tval |= (value &lt;&lt; ((4 - (where % 4))*8)) &amp; mask;</div><div class='del'>-		reg_write(addr, tval);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		addr = (ATH724X_PCI_DEV_BASE + where) &amp; ~3;</div><div class='del'>-		mask = 0xffff0000 &gt;&gt; ((where % 4)*8);</div><div class='del'>-		tval = reg_read(addr);</div><div class='del'>-		tval = tval &amp; ~mask;</div><div class='del'>-		tval |= (value &lt;&lt; ((4 - (where % 4))*8)) &amp; mask;</div><div class='del'>-		reg_write(addr, tval);</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		reg_write((ATH724X_PCI_DEV_BASE + where), value);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		spin_unlock_irqrestore(&amp;ath724x_pci_lock, flags);</div><div class='del'>-</div><div class='del'>-		return PCIBIOS_BAD_REGISTER_NUMBER;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;ath724x_pci_lock, flags);</div><div class='del'>-</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pci_ops ath724x_pci_ops = {</div><div class='del'>-	.read	= ath724x_pci_read,</div><div class='del'>-	.write	= ath724x_pci_write,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ath724x_io_resource = {</div><div class='del'>-	.name   = "PCI IO space",</div><div class='del'>-	.start  = 0,</div><div class='del'>-	.end    = 0,</div><div class='del'>-	.flags  = IORESOURCE_IO,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource ath724x_mem_resource = {</div><div class='del'>-	.name   = "PCI memory space",</div><div class='del'>-	.start  = ATH724X_PCI_MEM_BASE,</div><div class='del'>-	.end    = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1,</div><div class='del'>-	.flags  = IORESOURCE_MEM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pci_controller ath724x_pci_controller = {</div><div class='del'>-	.pci_ops        = &amp;ath724x_pci_ops,</div><div class='del'>-	.io_resource    = &amp;ath724x_io_resource,</div><div class='del'>-	.mem_resource	= &amp;ath724x_mem_resource,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)</div><div class='del'>-{</div><div class='del'>-	pci_data	= data;</div><div class='del'>-	pci_data_size	= size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)</div><div class='del'>-{</div><div class='del'>-	unsigned int devfn = dev-&gt;devfn;</div><div class='del'>-	int irq = -1;</div><div class='del'>-</div><div class='del'>-	if (devfn &gt; pci_data_size - 1)</div><div class='del'>-		return irq;</div><div class='del'>-</div><div class='del'>-	irq = pci_data[devfn].irq;</div><div class='del'>-</div><div class='del'>-	return irq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int pcibios_plat_dev_init(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned int devfn = dev-&gt;devfn;</div><div class='del'>-</div><div class='del'>-	if (devfn &gt; pci_data_size - 1)</div><div class='del'>-		return PCIBIOS_DEVICE_NOT_FOUND;</div><div class='del'>-</div><div class='del'>-	dev-&gt;dev.platform_data = pci_data[devfn].pdata;</div><div class='del'>-</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init ath724x_pcibios_init(void)</div><div class='del'>-{</div><div class='del'>-	register_pci_controller(&amp;ath724x_pci_controller);</div><div class='del'>-</div><div class='del'>-	return PCIBIOS_SUCCESSFUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-arch_initcall(ath724x_pcibios_init);</div><div class='head'>diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c<br/>index 030c77e7926e..ea453532a33c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pci/pci-lantiq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/pci/pci-lantiq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/pci-lantiq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/pci-lantiq.c</a></div><div class='hunk'>@@ -13,8 +13,12 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/of_gpio.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_pci.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pci.h&gt;</div><div class='ctx'> #include &lt;asm/gpio.h&gt;</div><div class='hunk'>@@ -22,17 +26,9 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;lantiq_soc.h&gt;</div><div class='ctx'> #include &lt;lantiq_irq.h&gt;</div><div class='del'>-#include &lt;lantiq_platform.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "pci-lantiq.h"</div><div class='ctx'> </div><div class='del'>-#define LTQ_PCI_CFG_BASE		0x17000000</div><div class='del'>-#define LTQ_PCI_CFG_SIZE		0x00008000</div><div class='del'>-#define LTQ_PCI_MEM_BASE		0x18000000</div><div class='del'>-#define LTQ_PCI_MEM_SIZE		0x02000000</div><div class='del'>-#define LTQ_PCI_IO_BASE			0x1AE00000</div><div class='del'>-#define LTQ_PCI_IO_SIZE			0x00200000</div><div class='del'>-</div><div class='ctx'> #define PCI_CR_FCI_ADDR_MAP0		0x00C0</div><div class='ctx'> #define PCI_CR_FCI_ADDR_MAP1		0x00C4</div><div class='ctx'> #define PCI_CR_FCI_ADDR_MAP2		0x00C8</div><div class='hunk'>@@ -68,79 +64,27 @@</div><div class='ctx'> #define ltq_pci_cfg_w32(x, y)	ltq_w32((x), ltq_pci_mapped_cfg + (y))</div><div class='ctx'> #define ltq_pci_cfg_r32(x)	ltq_r32(ltq_pci_mapped_cfg + (x))</div><div class='ctx'> </div><div class='del'>-struct ltq_pci_gpio_map {</div><div class='del'>-	int pin;</div><div class='del'>-	int alt0;</div><div class='del'>-	int alt1;</div><div class='del'>-	int dir;</div><div class='del'>-	char *name;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* the pci core can make use of the following gpios */</div><div class='del'>-static struct ltq_pci_gpio_map ltq_pci_gpio_map[] = {</div><div class='del'>-	{ 0, 1, 0, 0, "pci-exin0" },</div><div class='del'>-	{ 1, 1, 0, 0, "pci-exin1" },</div><div class='del'>-	{ 2, 1, 0, 0, "pci-exin2" },</div><div class='del'>-	{ 39, 1, 0, 0, "pci-exin3" },</div><div class='del'>-	{ 10, 1, 0, 0, "pci-exin4" },</div><div class='del'>-	{ 9, 1, 0, 0, "pci-exin5" },</div><div class='del'>-	{ 30, 1, 0, 1, "pci-gnt1" },</div><div class='del'>-	{ 23, 1, 0, 1, "pci-gnt2" },</div><div class='del'>-	{ 19, 1, 0, 1, "pci-gnt3" },</div><div class='del'>-	{ 38, 1, 0, 1, "pci-gnt4" },</div><div class='del'>-	{ 29, 1, 0, 0, "pci-req1" },</div><div class='del'>-	{ 31, 1, 0, 0, "pci-req2" },</div><div class='del'>-	{ 3, 1, 0, 0, "pci-req3" },</div><div class='del'>-	{ 37, 1, 0, 0, "pci-req4" },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> __iomem void *ltq_pci_mapped_cfg;</div><div class='ctx'> static __iomem void *ltq_pci_membase;</div><div class='ctx'> </div><div class='del'>-int (*ltqpci_plat_dev_init)(struct pci_dev *dev) = NULL;</div><div class='del'>-</div><div class='del'>-/* Since the PCI REQ pins can be reused for other functionality, make it</div><div class='del'>-   possible to exclude those from interpretation by the PCI controller */</div><div class='del'>-static int ltq_pci_req_mask = 0xf;</div><div class='del'>-</div><div class='del'>-static int *ltq_pci_irq_map;</div><div class='del'>-</div><div class='del'>-struct pci_ops ltq_pci_ops = {</div><div class='add'>+static int reset_gpio;</div><div class='add'>+static struct clk *clk_pci, *clk_external;</div><div class='add'>+static struct resource pci_io_resource;</div><div class='add'>+static struct resource pci_mem_resource;</div><div class='add'>+static struct pci_ops pci_ops = {</div><div class='ctx'> 	.read	= ltq_pci_read_config_dword,</div><div class='ctx'> 	.write	= ltq_pci_write_config_dword</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct resource pci_io_resource = {</div><div class='del'>-	.name	= "pci io space",</div><div class='del'>-	.start	= LTQ_PCI_IO_BASE,</div><div class='del'>-	.end	= LTQ_PCI_IO_BASE + LTQ_PCI_IO_SIZE - 1,</div><div class='del'>-	.flags	= IORESOURCE_IO</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct resource pci_mem_resource = {</div><div class='del'>-	.name	= "pci memory space",</div><div class='del'>-	.start	= LTQ_PCI_MEM_BASE,</div><div class='del'>-	.end	= LTQ_PCI_MEM_BASE + LTQ_PCI_MEM_SIZE - 1,</div><div class='del'>-	.flags	= IORESOURCE_MEM</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct pci_controller ltq_pci_controller = {</div><div class='del'>-	.pci_ops	= &amp;ltq_pci_ops,</div><div class='add'>+static struct pci_controller pci_controller = {</div><div class='add'>+	.pci_ops	= &amp;pci_ops,</div><div class='ctx'> 	.mem_resource	= &amp;pci_mem_resource,</div><div class='ctx'> 	.mem_offset	= 0x00000000UL,</div><div class='ctx'> 	.io_resource	= &amp;pci_io_resource,</div><div class='ctx'> 	.io_offset	= 0x00000000UL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int pcibios_plat_dev_init(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	if (ltqpci_plat_dev_init)</div><div class='del'>-		return ltqpci_plat_dev_init(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 ltq_calc_bar11mask(void)</div><div class='add'>+static inline u32 ltq_calc_bar11mask(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 mem, bar11mask;</div><div class='ctx'> </div><div class='hunk'>@@ -151,48 +95,42 @@ static u32 ltq_calc_bar11mask(void)</div><div class='ctx'> 	return bar11mask;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ltq_pci_setup_gpio(int gpio)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(ltq_pci_gpio_map); i++) {</div><div class='del'>-		if (gpio &amp; (1 &lt;&lt; i)) {</div><div class='del'>-			ltq_gpio_request(ltq_pci_gpio_map[i].pin,</div><div class='del'>-				ltq_pci_gpio_map[i].alt0,</div><div class='del'>-				ltq_pci_gpio_map[i].alt1,</div><div class='del'>-				ltq_pci_gpio_map[i].dir,</div><div class='del'>-				ltq_pci_gpio_map[i].name);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	ltq_gpio_request(21, 0, 0, 1, "pci-reset");</div><div class='del'>-	ltq_pci_req_mask = (gpio &gt;&gt; PCI_REQ_SHIFT) &amp; PCI_REQ_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __devinit ltq_pci_startup(struct ltq_pci_data *conf)</div><div class='add'>+static int __devinit ltq_pci_startup(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct device_node *node = pdev-&gt;dev.of_node;</div><div class='add'>+	const __be32 *req_mask, *bus_clk;</div><div class='ctx'> 	u32 temp_buffer;</div><div class='ctx'> </div><div class='del'>-	/* set clock to 33Mhz */</div><div class='del'>-	if (ltq_is_ar9()) {</div><div class='del'>-		ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) &amp; ~0x1f00000, LTQ_CGU_IFCCR);</div><div class='del'>-		ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0xe00000, LTQ_CGU_IFCCR);</div><div class='del'>-	} else {</div><div class='del'>-		ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) &amp; ~0xf00000, LTQ_CGU_IFCCR);</div><div class='del'>-		ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0x800000, LTQ_CGU_IFCCR);</div><div class='add'>+	/* get our clocks */</div><div class='add'>+	clk_pci = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(clk_pci)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to get pci clock\n");</div><div class='add'>+		return PTR_ERR(clk_pci);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* external or internal clock ? */</div><div class='del'>-	if (conf-&gt;clock) {</div><div class='del'>-		ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) &amp; ~(1 &lt;&lt; 16),</div><div class='del'>-			LTQ_CGU_IFCCR);</div><div class='del'>-		ltq_cgu_w32((1 &lt;&lt; 30), LTQ_CGU_PCICR);</div><div class='del'>-	} else {</div><div class='del'>-		ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | (1 &lt;&lt; 16),</div><div class='del'>-			LTQ_CGU_IFCCR);</div><div class='del'>-		ltq_cgu_w32((1 &lt;&lt; 31) | (1 &lt;&lt; 30), LTQ_CGU_PCICR);</div><div class='add'>+	clk_external = clk_get(&amp;pdev-&gt;dev, "external");</div><div class='add'>+	if (IS_ERR(clk_external)) {</div><div class='add'>+		clk_put(clk_pci);</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to get external pci clock\n");</div><div class='add'>+		return PTR_ERR(clk_external);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* setup pci clock and gpis used by pci */</div><div class='del'>-	ltq_pci_setup_gpio(conf-&gt;gpio);</div><div class='add'>+	/* read the bus speed that we want */</div><div class='add'>+	bus_clk = of_get_property(node, "lantiq,bus-clock", NULL);</div><div class='add'>+	if (bus_clk)</div><div class='add'>+		clk_set_rate(clk_pci, *bus_clk);</div><div class='add'>+</div><div class='add'>+	/* and enable the clocks */</div><div class='add'>+	clk_enable(clk_pci);</div><div class='add'>+	if (of_find_property(node, "lantiq,external-clock", NULL))</div><div class='add'>+		clk_enable(clk_external);</div><div class='add'>+	else</div><div class='add'>+		clk_disable(clk_external);</div><div class='add'>+</div><div class='add'>+	/* setup reset gpio used by pci */</div><div class='add'>+	reset_gpio = of_get_named_gpio(node, "gpio-reset", 0);</div><div class='add'>+	if (reset_gpio &gt; 0)</div><div class='add'>+		devm_gpio_request(&amp;pdev-&gt;dev, reset_gpio, "pci-reset");</div><div class='ctx'> </div><div class='ctx'> 	/* enable auto-switching between PCI and EBU */</div><div class='ctx'> 	ltq_pci_w32(0xa, PCI_CR_CLK_CTRL);</div><div class='hunk'>@@ -205,7 +143,12 @@ static int __devinit ltq_pci_startup(struct ltq_pci_data *conf)</div><div class='ctx'> </div><div class='ctx'> 	/* enable external 2 PCI masters */</div><div class='ctx'> 	temp_buffer = ltq_pci_r32(PCI_CR_PC_ARB);</div><div class='del'>-	temp_buffer &amp;= (~(ltq_pci_req_mask &lt;&lt; 16));</div><div class='add'>+	/* setup the request mask */</div><div class='add'>+	req_mask = of_get_property(node, "req-mask", NULL);</div><div class='add'>+	if (req_mask)</div><div class='add'>+		temp_buffer &amp;= ~((*req_mask &amp; 0xf) &lt;&lt; 16);</div><div class='add'>+	else</div><div class='add'>+		temp_buffer &amp;= ~0xf0000;</div><div class='ctx'> 	/* enable internal arbiter */</div><div class='ctx'> 	temp_buffer |= (1 &lt;&lt; INTERNAL_ARB_ENABLE_BIT);</div><div class='ctx'> 	/* enable internal PCI master reqest */</div><div class='hunk'>@@ -249,47 +192,55 @@ static int __devinit ltq_pci_startup(struct ltq_pci_data *conf)</div><div class='ctx'> 	ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_IEN) | 0x10, LTQ_EBU_PCC_IEN);</div><div class='ctx'> </div><div class='ctx'> 	/* toggle reset pin */</div><div class='del'>-	__gpio_set_value(21, 0);</div><div class='del'>-	wmb();</div><div class='del'>-	mdelay(1);</div><div class='del'>-	__gpio_set_value(21, 1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='del'>-{</div><div class='del'>-	if (ltq_pci_irq_map[slot])</div><div class='del'>-		return ltq_pci_irq_map[slot];</div><div class='del'>-	printk(KERN_ERR "lq_pci: trying to map irq for unknown slot %d\n",</div><div class='del'>-		slot);</div><div class='del'>-</div><div class='add'>+	if (reset_gpio &gt; 0) {</div><div class='add'>+		__gpio_set_value(reset_gpio, 0);</div><div class='add'>+		wmb();</div><div class='add'>+		mdelay(1);</div><div class='add'>+		__gpio_set_value(reset_gpio, 1);</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devinit ltq_pci_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct ltq_pci_data *ltq_pci_data =</div><div class='del'>-		(struct ltq_pci_data *) pdev-&gt;dev.platform_data;</div><div class='add'>+	struct resource *res_cfg, *res_bridge;</div><div class='ctx'> </div><div class='ctx'> 	pci_clear_flags(PCI_PROBE_ONLY);</div><div class='del'>-	ltq_pci_irq_map = ltq_pci_data-&gt;irq;</div><div class='del'>-	ltq_pci_membase = ioremap_nocache(PCI_CR_BASE_ADDR, PCI_CR_SIZE);</div><div class='del'>-	ltq_pci_mapped_cfg =</div><div class='del'>-		ioremap_nocache(LTQ_PCI_CFG_BASE, LTQ_PCI_CFG_BASE);</div><div class='del'>-	ltq_pci_controller.io_map_base =</div><div class='del'>-		(unsigned long)ioremap(LTQ_PCI_IO_BASE, LTQ_PCI_IO_SIZE - 1);</div><div class='del'>-	ltq_pci_startup(ltq_pci_data);</div><div class='del'>-	register_pci_controller(&amp;ltq_pci_controller);</div><div class='ctx'> </div><div class='add'>+	res_cfg = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	res_bridge = platform_get_resource(pdev, IORESOURCE_MEM, 1);</div><div class='add'>+	if (!res_cfg || !res_bridge) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "missing memory reources\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ltq_pci_membase = devm_request_and_ioremap(&amp;pdev-&gt;dev, res_bridge);</div><div class='add'>+	ltq_pci_mapped_cfg = devm_request_and_ioremap(&amp;pdev-&gt;dev, res_cfg);</div><div class='add'>+</div><div class='add'>+	if (!ltq_pci_membase || !ltq_pci_mapped_cfg) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to remap resources\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ltq_pci_startup(pdev);</div><div class='add'>+</div><div class='add'>+	pci_load_of_ranges(&amp;pci_controller, pdev-&gt;dev.of_node);</div><div class='add'>+	register_pci_controller(&amp;pci_controller);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct platform_driver</div><div class='del'>-ltq_pci_driver = {</div><div class='add'>+static const struct of_device_id ltq_pci_match[] = {</div><div class='add'>+	{ .compatible = "lantiq,pci-xway" },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ltq_pci_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver ltq_pci_driver = {</div><div class='ctx'> 	.probe = ltq_pci_probe,</div><div class='ctx'> 	.driver = {</div><div class='del'>-		.name = "ltq_pci",</div><div class='add'>+		.name = "pci-xway",</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = ltq_pci_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -297,7 +248,7 @@ int __init pcibios_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = platform_driver_register(&amp;ltq_pci_driver);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		printk(KERN_INFO "ltq_pci: Error registering platfom driver!");</div><div class='add'>+		pr_info("pci-xway: Error registering platform driver!");</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c<br/>index 0514866fa925..271e8c4a54c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pci/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/pci/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pci/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pci/pci.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpu-info.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -114,9 +115,63 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)</div><div class='ctx'> 			pci_bus_assign_resources(bus);</div><div class='ctx'> 			pci_enable_bridges(bus);</div><div class='ctx'> 		}</div><div class='add'>+		bus-&gt;dev.of_node = hose-&gt;of_node;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+void __devinit pci_load_of_ranges(struct pci_controller *hose,</div><div class='add'>+				struct device_node *node)</div><div class='add'>+{</div><div class='add'>+	const __be32 *ranges;</div><div class='add'>+	int rlen;</div><div class='add'>+	int pna = of_n_addr_cells(node);</div><div class='add'>+	int np = pna + 5;</div><div class='add'>+</div><div class='add'>+	pr_info("PCI host bridge %s ranges:\n", node-&gt;full_name);</div><div class='add'>+	ranges = of_get_property(node, "ranges", &amp;rlen);</div><div class='add'>+	if (ranges == NULL)</div><div class='add'>+		return;</div><div class='add'>+	hose-&gt;of_node = node;</div><div class='add'>+</div><div class='add'>+	while ((rlen -= np * 4) &gt;= 0) {</div><div class='add'>+		u32 pci_space;</div><div class='add'>+		struct resource *res = NULL;</div><div class='add'>+		u64 addr, size;</div><div class='add'>+</div><div class='add'>+		pci_space = be32_to_cpup(&amp;ranges[0]);</div><div class='add'>+		addr = of_translate_address(node, ranges + 3);</div><div class='add'>+		size = of_read_number(ranges + pna + 3, 2);</div><div class='add'>+		ranges += np;</div><div class='add'>+		switch ((pci_space &gt;&gt; 24) &amp; 0x3) {</div><div class='add'>+		case 1:		/* PCI IO space */</div><div class='add'>+			pr_info("  IO 0x%016llx..0x%016llx\n",</div><div class='add'>+					addr, addr + size - 1);</div><div class='add'>+			hose-&gt;io_map_base =</div><div class='add'>+				(unsigned long)ioremap(addr, size);</div><div class='add'>+			res = hose-&gt;io_resource;</div><div class='add'>+			res-&gt;flags = IORESOURCE_IO;</div><div class='add'>+			break;</div><div class='add'>+		case 2:		/* PCI Memory space */</div><div class='add'>+		case 3:		/* PCI 64 bits Memory space */</div><div class='add'>+			pr_info(" MEM 0x%016llx..0x%016llx\n",</div><div class='add'>+					addr, addr + size - 1);</div><div class='add'>+			res = hose-&gt;mem_resource;</div><div class='add'>+			res-&gt;flags = IORESOURCE_MEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (res != NULL) {</div><div class='add'>+			res-&gt;start = addr;</div><div class='add'>+			res-&gt;name = node-&gt;full_name;</div><div class='add'>+			res-&gt;end = res-&gt;start + size - 1;</div><div class='add'>+			res-&gt;parent = NULL;</div><div class='add'>+			res-&gt;sibling = NULL;</div><div class='add'>+			res-&gt;child = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static DEFINE_MUTEX(pci_scan_mutex);</div><div class='ctx'> </div><div class='ctx'> void __devinit register_pci_controller(struct pci_controller *hose)</div><div class='head'>diff --git a/arch/mips/pmc-sierra/yosemite/Makefile b/arch/mips/pmc-sierra/yosemite/Makefile<br/>index 02f5fb94ea28..5af95ec3319d 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pmc-sierra/yosemite/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/pmc-sierra/yosemite/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pmc-sierra/yosemite/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pmc-sierra/yosemite/Makefile</a></div><div class='hunk'>@@ -5,5 +5,3 @@</div><div class='ctx'> obj-y    += irq.o prom.o py-console.o setup.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SMP)		+= smp.o</div><div class='del'>-</div><div class='del'>-ccflags-y := -Werror</div><div class='head'>diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c<br/>index 3498ac9c35af..b6472fc88a99 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pmc-sierra/yosemite/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/pmc-sierra/yosemite/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pmc-sierra/yosemite/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pmc-sierra/yosemite/setup.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/bcd.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/bootmem.h&gt;</div><div class='head'>diff --git a/arch/mips/pnx833x/common/platform.c b/arch/mips/pnx833x/common/platform.c<br/>index 87167dcc79fa..05a1d922cd60 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/pnx833x/common/platform.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/pnx833x/common/platform.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/pnx833x/common/platform.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/pnx833x/common/platform.c</a></div><div class='hunk'>@@ -244,11 +244,6 @@ static struct platform_device pnx833x_sata_device = {</div><div class='ctx'> 	.resource      = pnx833x_sata_resources,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char *part_probes[] = {</div><div class='del'>-	"cmdlinepart",</div><div class='del'>-	NULL</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void</div><div class='ctx'> pnx833x_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)</div><div class='ctx'> {</div><div class='hunk'>@@ -268,7 +263,6 @@ static struct platform_nand_data pnx833x_flash_nand_data = {</div><div class='ctx'> 	.chip = {</div><div class='ctx'> 		.nr_chips		= 1,</div><div class='ctx'> 		.chip_delay		= 25,</div><div class='del'>-		.part_probe_types 	= part_probes,</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl = {</div><div class='ctx'> 		.cmd_ctrl 		= pnx833x_flash_nand_cmd_ctrl</div><div class='head'>diff --git a/arch/mips/powertv/Makefile b/arch/mips/powertv/Makefile<br/>index 348d2e850ef5..39ca9f8d63ae 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/powertv/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/powertv/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/powertv/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/powertv/Makefile</a></div><div class='hunk'>@@ -27,5 +27,3 @@ obj-y += init.o ioremap.o memory.o powertv_setup.o reset.o time.o \</div><div class='ctx'> 	asic/ pci/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_USB) += powertv-usb.o</div><div class='del'>-</div><div class='del'>-ccflags-y := -Wall</div><div class='head'>diff --git a/arch/mips/powertv/asic/Makefile b/arch/mips/powertv/asic/Makefile<br/>index d810a33182a4..35dcc53eb25f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/powertv/asic/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/powertv/asic/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/powertv/asic/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/powertv/asic/Makefile</a></div><div class='hunk'>@@ -19,5 +19,3 @@</div><div class='ctx'> obj-y += asic-calliope.o asic-cronus.o asic-gaia.o asic-zeus.o \</div><div class='ctx'> 	asic_devices.o asic_int.o irq_asic.o prealloc-calliope.o \</div><div class='ctx'> 	prealloc-cronus.o prealloc-cronuslite.o prealloc-gaia.o prealloc-zeus.o</div><div class='del'>-</div><div class='del'>-ccflags-y := -Wall -Werror</div><div class='head'>diff --git a/arch/mips/powertv/pci/Makefile b/arch/mips/powertv/pci/Makefile<br/>index 5783201cd2c8..2610a6af5b2c 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/powertv/pci/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/powertv/pci/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/powertv/pci/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/powertv/pci/Makefile</a></div><div class='hunk'>@@ -17,5 +17,3 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PCI)	+= fixup-powertv.o</div><div class='del'>-</div><div class='del'>-ccflags-y := -Wall -Werror</div><div class='head'>diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c<br/>index a969eb826634..716e9a12f0e7 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/rb532/devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/rb532/devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/rb532/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/rb532/devices.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'>  *  GNU General Public License for more details.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/ctype.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='hunk'>@@ -292,7 +293,6 @@ static void __init rb532_nand_setup(void)</div><div class='ctx'> 	rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info);</div><div class='ctx'> 	rb532_nand_data.chip.partitions = rb532_partition_info;</div><div class='ctx'> 	rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY;</div><div class='del'>-	rb532_nand_data.chip.options = NAND_NO_AUTOINCR;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c<br/>index ed3b3d317358..cdb1417fba59 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/sni/pcimt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/sni/pcimt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/sni/pcimt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/sni/pcimt.c</a></div><div class='hunk'>@@ -29,7 +29,7 @@ static void __init sni_pcimt_sc_init(void)</div><div class='ctx'> </div><div class='ctx'> 	scsiz = cacheconf &amp; 7;</div><div class='ctx'> 	if (scsiz == 0) {</div><div class='del'>-		printk("Second level cache is deactived.\n");</div><div class='add'>+		printk("Second level cache is deactivated.\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (scsiz &gt;= 6) {</div><div class='head'>diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c<br/>index d16b462154c3..413f17f8e892 100644<br/>--- a/<a href='/drm-misc/tree/arch/mips/sni/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mips/sni/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mips/sni/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mips/sni/setup.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/eisa.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='ctx'> #include &lt;linux/fb.h&gt;</div><div class='ctx'> #include &lt;linux/screen_info.h&gt;</div><div class='head'>diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig<br/>index 3aa3de017159..687f9b4a2ed6 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mn10300/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/Kconfig</a></div><div class='hunk'>@@ -6,6 +6,7 @@ config MN10300</div><div class='ctx'> 	select HAVE_ARCH_TRACEHOOK</div><div class='ctx'> 	select HAVE_ARCH_KGDB</div><div class='ctx'> 	select HAVE_NMI_WATCHDOG if MN10300_WD_TIMER</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='ctx'> </div><div class='ctx'> config AM33_2</div><div class='ctx'> 	def_bool n</div><div class='hunk'>@@ -42,15 +43,9 @@ config RWSEM_XCHGADD_ALGORITHM</div><div class='ctx'> config GENERIC_CALIBRATE_DELAY</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config GENERIC_CMOS_UPDATE</div><div class='del'>-        def_bool n</div><div class='del'>-</div><div class='ctx'> config GENERIC_HWEIGHT</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config GENERIC_BUG</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='hunk'>@@ -231,7 +226,6 @@ config MN10300_USING_JTAG</div><div class='ctx'> 	  single-stepping, which are taken over completely by the JTAG unit.</div><div class='ctx'> </div><div class='ctx'> source "kernel/Kconfig.hz"</div><div class='del'>-source "kernel/time/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config MN10300_RTC</div><div class='ctx'> 	bool "Using MN10300 RTC"</div><div class='head'>diff --git a/arch/mn10300/Makefile b/arch/mn10300/Makefile<br/>index 7120282bf0d8..33188b6e81e4 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mn10300/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/Makefile</a></div><div class='hunk'>@@ -51,7 +51,7 @@ UNIT		:= asb2364</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-head-y		:= arch/mn10300/kernel/head.o arch/mn10300/kernel/init_task.o</div><div class='add'>+head-y		:= arch/mn10300/kernel/head.o</div><div class='ctx'> </div><div class='ctx'> core-y		+= arch/mn10300/kernel/ arch/mn10300/mm/</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mn10300/include/asm/kvm_para.h b/arch/mn10300/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/mn10300/include/asm/posix_types.h b/arch/mn10300/include/asm/posix_types.h<br/>index ab506181ec31..d31eeea480cf 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mn10300/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/include/asm/posix_types.h</a></div><div class='hunk'>@@ -20,9 +20,6 @@</div><div class='ctx'> typedef unsigned short	__kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned short	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned short	__kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mn10300/include/asm/processor.h b/arch/mn10300/include/asm/processor.h<br/>index f7b3c9ab2cb5..247928c9f549 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mn10300/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/include/asm/processor.h</a></div><div class='hunk'>@@ -139,9 +139,6 @@ static inline void start_thread(struct pt_regs *regs,</div><div class='ctx'> /* Free all resources held by a thread. */</div><div class='ctx'> extern void release_thread(struct task_struct *);</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-extern void prepare_to_copy(struct task_struct *tsk);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * create a kernel thread without removing it from tasklists</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/mn10300/include/asm/thread_info.h b/arch/mn10300/include/asm/thread_info.h<br/>index 28cf52100baa..08251d6f6b11 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mn10300/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/include/asm/thread_info.h</a></div><div class='hunk'>@@ -20,8 +20,10 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_4KSTACKS</div><div class='ctx'> #define THREAD_SIZE		(4096)</div><div class='add'>+#define THREAD_SIZE_ORDER	(0)</div><div class='ctx'> #else</div><div class='ctx'> #define THREAD_SIZE		(8192)</div><div class='add'>+#define THREAD_SIZE_ORDER	(1)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define STACK_WARN		(THREAD_SIZE / 8)</div><div class='hunk'>@@ -120,21 +122,8 @@ static inline unsigned long current_stack_pointer(void)</div><div class='ctx'> 	return sp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-</div><div class='del'>-/* thread information allocation */</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-#define alloc_thread_info_node(tsk, node)			\</div><div class='del'>-		kzalloc_node(THREAD_SIZE, GFP_KERNEL, node)</div><div class='del'>-#else</div><div class='del'>-#define alloc_thread_info_node(tsk, node)			\</div><div class='del'>-		kmalloc_node(THREAD_SIZE, GFP_KERNEL, node)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #ifndef CONFIG_KGDB</div><div class='del'>-#define free_thread_info(ti)	kfree((ti))</div><div class='del'>-#else</div><div class='del'>-extern void free_thread_info(struct thread_info *);</div><div class='add'>+void arch_release_thread_info(struct thread_info *ti)</div><div class='ctx'> #endif</div><div class='ctx'> #define get_thread_info(ti)	get_task_struct((ti)-&gt;task)</div><div class='ctx'> #define put_thread_info(ti)	put_task_struct((ti)-&gt;task)</div><div class='head'>diff --git a/arch/mn10300/kernel/Makefile b/arch/mn10300/kernel/Makefile<br/>index 47ed30fe8178..d06749173d63 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mn10300/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/kernel/Makefile</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the MN10300-specific core kernel code</div><div class='ctx'> #</div><div class='del'>-extra-y := head.o init_task.o vmlinux.lds</div><div class='add'>+extra-y := head.o vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> fpu-obj-y := fpu-nofpu.o fpu-nofpu-low.o</div><div class='ctx'> fpu-obj-$(CONFIG_FPU) := fpu.o fpu-low.o</div><div class='head'>diff --git a/arch/mn10300/kernel/init_task.c b/arch/mn10300/kernel/init_task.c<br/>deleted file mode 100644<br/>index a481b043bea7..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mn10300/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,39 +0,0 @@</div><div class='del'>-/* MN10300 Initial task definitions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.</div><div class='del'>- * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public Licence</div><div class='del'>- * as published by the Free Software Foundation; either version</div><div class='del'>- * 2 of the Licence, or (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is THREAD_SIZE aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/mn10300/kernel/kgdb.c b/arch/mn10300/kernel/kgdb.c<br/>index f6c981db2a36..99770823451a 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/kernel/kgdb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mn10300/kernel/kgdb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/kernel/kgdb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/kernel/kgdb.c</a></div><div class='hunk'>@@ -397,7 +397,7 @@ static bool kgdb_arch_undo_singlestep(struct pt_regs *regs)</div><div class='ctx'>  * single-step state is cleared.  At this point the breakpoints should have</div><div class='ctx'>  * been removed by __switch_to().</div><div class='ctx'>  */</div><div class='del'>-void free_thread_info(struct thread_info *ti)</div><div class='add'>+void arch_release_thread_info(struct thread_info *ti)</div><div class='ctx'> {</div><div class='ctx'> 	if (kgdb_sstep_thread == ti) {</div><div class='ctx'> 		kgdb_sstep_thread = NULL;</div><div class='hunk'>@@ -407,7 +407,6 @@ void free_thread_info(struct thread_info *ti)</div><div class='ctx'> 		 * so force immediate reentry */</div><div class='ctx'> 		kgdb_breakpoint();</div><div class='ctx'> 	}</div><div class='del'>-	kfree(ti);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/mn10300/kernel/process.c b/arch/mn10300/kernel/process.c<br/>index 14707f25153b..7dab0cd36466 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mn10300/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/kernel/process.c</a></div><div class='hunk'>@@ -208,12 +208,14 @@ void copy_segments(struct task_struct *p, struct mm_struct *new_mm)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * this gets called before we allocate a new thread and copy the current task</div><div class='del'>- * into it so that we can store lazy state into memory</div><div class='add'>+ * this gets called so that we can store lazy state into memory and copy the</div><div class='add'>+ * current task into the new thread.</div><div class='ctx'>  */</div><div class='del'>-void prepare_to_copy(struct task_struct *tsk)</div><div class='add'>+int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> {</div><div class='del'>-	unlazy_fpu(tsk);</div><div class='add'>+	unlazy_fpu(src);</div><div class='add'>+	*dst = *src;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/mn10300/kernel/signal.c b/arch/mn10300/kernel/signal.c<br/>index 690f4e9507d7..6ab0bee2a54f 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mn10300/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/kernel/signal.c</a></div><div class='hunk'>@@ -31,24 +31,14 @@</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_SIG 0</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * atomically swap in the new signal mask, and wait for a signal.</div><div class='ctx'>  */</div><div class='ctx'> asmlinkage long sys_sigsuspend(int history0, int history1, old_sigset_t mask)</div><div class='ctx'> {</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-	siginitset(&amp;current-&gt;blocked, mask);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	sigset_t blocked;</div><div class='add'>+	siginitset(&amp;blocked, mask);</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -171,11 +161,7 @@ asmlinkage long sys_sigreturn(void)</div><div class='ctx'> 			     sizeof(frame-&gt;extramask)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(current_frame(), &amp;frame-&gt;sc, &amp;d0))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -202,11 +188,7 @@ asmlinkage long sys_rt_sigreturn(void)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(current_frame(), &amp;frame-&gt;uc.uc_mcontext, &amp;d0))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -444,8 +426,9 @@ static inline void stepback(struct pt_regs *regs)</div><div class='ctx'>  */</div><div class='ctx'> static int handle_signal(int sig,</div><div class='ctx'> 			 siginfo_t *info, struct k_sigaction *ka,</div><div class='del'>-			 sigset_t *oldset, struct pt_regs *regs)</div><div class='add'>+			 struct pt_regs *regs)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Are we from a system call? */</div><div class='hunk'>@@ -475,18 +458,11 @@ static int handle_signal(int sig,</div><div class='ctx'> 		ret = setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = setup_frame(sig, ka, oldset, regs);</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-		sigorsets(&amp;current-&gt;blocked, &amp;current-&gt;blocked,</div><div class='del'>-			  &amp;ka-&gt;sa.sa_mask);</div><div class='del'>-		if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-			sigaddset(&amp;current-&gt;blocked, sig);</div><div class='del'>-		recalc_sigpending();</div><div class='del'>-		spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	signal_delivered(sig, info, ka, regs,</div><div class='add'>+				 test_thread_flag(TIF_SINGLESTEP));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -496,7 +472,6 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='ctx'> 	siginfo_t info;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> 	int signr;</div><div class='ctx'> </div><div class='ctx'> 	/* we want the common case to go fast, which is why we may in certain</div><div class='hunk'>@@ -504,23 +479,9 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='del'>-		if (handle_signal(signr, &amp;info, &amp;ka, oldset, regs) == 0) {</div><div class='del'>-			/* a signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-</div><div class='del'>-			tracehook_signal_handler(signr, &amp;info, &amp;ka, regs,</div><div class='del'>-						 test_thread_flag(TIF_SINGLESTEP));</div><div class='add'>+		if (handle_signal(signr, &amp;info, &amp;ka, regs) == 0) {</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		return;</div><div class='hunk'>@@ -546,10 +507,7 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	/* if there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -569,13 +527,11 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, u32 thread_info_flags)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* deal with pending signal delivery */</div><div class='del'>-	if (thread_info_flags &amp; (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))</div><div class='add'>+	if (thread_info_flags &amp; _TIF_SIGPENDING)</div><div class='ctx'> 		do_signal(regs);</div><div class='ctx'> </div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(current_frame());</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mn10300/kernel/smp.c b/arch/mn10300/kernel/smp.c<br/>index 910dddf65e44..090d35d36973 100644<br/>--- a/<a href='/drm-misc/tree/arch/mn10300/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/mn10300/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/mn10300/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/mn10300/kernel/smp.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/profile.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/bitops.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='hunk'>@@ -38,7 +39,6 @@</div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HOTPLUG_CPU</div><div class='del'>-#include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> static unsigned long sleep_mode[NR_CPUS];</div><div class='hunk'>@@ -874,10 +874,13 @@ static void __init smp_online(void)</div><div class='ctx'> </div><div class='ctx'> 	cpu = smp_processor_id();</div><div class='ctx'> </div><div class='del'>-	local_irq_enable();</div><div class='add'>+	notify_cpu_starting(cpu);</div><div class='ctx'> </div><div class='add'>+	ipi_call_lock();</div><div class='ctx'> 	set_cpu_online(cpu, true);</div><div class='del'>-	smp_wmb();</div><div class='add'>+	ipi_call_unlock();</div><div class='add'>+</div><div class='add'>+	local_irq_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -921,7 +924,7 @@ void initialize_secondary(void)</div><div class='ctx'>  * __cpu_up - Set smp_commenced_mask for the nominated CPU</div><div class='ctx'>  * @cpu: The target CPU.</div><div class='ctx'>  */</div><div class='del'>-int __devinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __devinit __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='ctx'> 	int timeout;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig<br/>index a4787197d8fe..49765b53f637 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/Kconfig</a></div><div class='hunk'>@@ -7,6 +7,7 @@ config OPENRISC</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	select OF</div><div class='ctx'> 	select OF_EARLY_FLATTREE</div><div class='add'>+	select IRQ_DOMAIN</div><div class='ctx'> 	select HAVE_MEMBLOCK</div><div class='ctx'> 	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='ctx'>         select HAVE_ARCH_TRACEHOOK</div><div class='hunk'>@@ -17,6 +18,9 @@ config OPENRISC</div><div class='ctx'> 	select GENERIC_IOMAP</div><div class='ctx'> 	select GENERIC_CPU_DEVICES</div><div class='ctx'> 	select GENERIC_ATOMIC64</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select GENERIC_STRNCPY_FROM_USER</div><div class='add'>+	select GENERIC_STRNLEN_USER</div><div class='ctx'> </div><div class='ctx'> config MMU</div><div class='ctx'> 	def_bool y</div><div class='hunk'>@@ -46,9 +50,6 @@ config NO_IOPORT</div><div class='ctx'> config GENERIC_GPIO</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config TRACE_IRQFLAGS_SUPPORT</div><div class='ctx'>         def_bool y</div><div class='ctx'> </div><div class='hunk'>@@ -108,7 +109,6 @@ config OPENRISC_HAVE_INST_DIV</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-source "kernel/time/Kconfig"</div><div class='ctx'> source kernel/Kconfig.hz</div><div class='ctx'> source kernel/Kconfig.preempt</div><div class='ctx'> source "mm/Kconfig"</div><div class='hunk'>@@ -141,7 +141,7 @@ config DEBUG_STACKOVERFLOW</div><div class='ctx'> 	bool "Check for kernel stack overflow"</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='del'>-	  Make extra checks for space avaliable on stack in some</div><div class='add'>+	  Make extra checks for space available on stack in some</div><div class='ctx'>           critical functions. This will cause kernel to run a bit slower,</div><div class='ctx'> 	  but will catch most of kernel stack overruns and exit gracefuly.</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/Makefile b/arch/openrisc/Makefile<br/>index 158ae4c0dc6c..966886c8daf5 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/Makefile</a></div><div class='hunk'>@@ -38,7 +38,7 @@ else</div><div class='ctx'> 	KBUILD_CFLAGS += $(call cc-option,-msoft-div)</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-head-y 		:= arch/openrisc/kernel/head.o arch/openrisc/kernel/init_task.o</div><div class='add'>+head-y 		:= arch/openrisc/kernel/head.o</div><div class='ctx'> </div><div class='ctx'> core-y		+= arch/openrisc/lib/ \</div><div class='ctx'> 		   arch/openrisc/kernel/ \</div><div class='head'>diff --git a/arch/openrisc/include/asm/Kbuild b/arch/openrisc/include/asm/Kbuild<br/>index dcea5a0308ae..3f35c38d7b64 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/include/asm/Kbuild?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/include/asm/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/Kbuild</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> include include/asm-generic/Kbuild.asm</div><div class='ctx'> </div><div class='del'>-header-y += spr_defs.h</div><div class='add'>+header-y += elf.h</div><div class='add'>+header-y += ucontext.h</div><div class='ctx'> </div><div class='ctx'> generic-y += atomic.h</div><div class='ctx'> generic-y += auxvec.h</div><div class='hunk'>@@ -65,3 +66,4 @@ generic-y += topology.h</div><div class='ctx'> generic-y += types.h</div><div class='ctx'> generic-y += ucontext.h</div><div class='ctx'> generic-y += user.h</div><div class='add'>+generic-y += word-at-a-time.h</div><div class='head'>diff --git a/arch/openrisc/include/asm/dma-mapping.h b/arch/openrisc/include/asm/dma-mapping.h<br/>index b206ba4608b2..fab8628e1b6e 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/include/asm/dma-mapping.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/include/asm/dma-mapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -20,150 +20,71 @@</div><div class='ctx'> /*</div><div class='ctx'>  * See Documentation/DMA-API-HOWTO.txt and</div><div class='ctx'>  * Documentation/DMA-API.txt for documentation.</div><div class='del'>- *</div><div class='del'>- * This file is written with the intention of eventually moving over</div><div class='del'>- * to largely using asm-generic/dma-mapping-common.h in its place.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/dma-debug.h&gt;</div><div class='ctx'> #include &lt;asm-generic/dma-coherent.h&gt;</div><div class='ctx'> #include &lt;linux/kmemcheck.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DMA_ERROR_CODE		(~(dma_addr_t)0x0)</div><div class='ctx'> </div><div class='add'>+extern struct dma_map_ops or1k_dma_map_ops;</div><div class='ctx'> </div><div class='del'>-#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)</div><div class='del'>-#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)</div><div class='del'>-</div><div class='del'>-void *or1k_dma_alloc_coherent(struct device *dev, size_t size,</div><div class='del'>-			      dma_addr_t *dma_handle, gfp_t flag);</div><div class='del'>-void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr,</div><div class='del'>-			    dma_addr_t dma_handle);</div><div class='del'>-dma_addr_t or1k_map_page(struct device *dev, struct page *page,</div><div class='del'>-			 unsigned long offset, size_t size,</div><div class='del'>-			 enum dma_data_direction dir,</div><div class='del'>-			 struct dma_attrs *attrs);</div><div class='del'>-void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,</div><div class='del'>-		     size_t size, enum dma_data_direction dir,</div><div class='del'>-		     struct dma_attrs *attrs);</div><div class='del'>-int or1k_map_sg(struct device *dev, struct scatterlist *sg,</div><div class='del'>-		int nents, enum dma_data_direction dir,</div><div class='del'>-		struct dma_attrs *attrs);</div><div class='del'>-void or1k_unmap_sg(struct device *dev, struct scatterlist *sg,</div><div class='del'>-		   int nents, enum dma_data_direction dir,</div><div class='del'>-		   struct dma_attrs *attrs);</div><div class='del'>-void or1k_sync_single_for_cpu(struct device *dev,</div><div class='del'>-			      dma_addr_t dma_handle, size_t size,</div><div class='del'>-			      enum dma_data_direction dir);</div><div class='del'>-void or1k_sync_single_for_device(struct device *dev,</div><div class='del'>-			         dma_addr_t dma_handle, size_t size,</div><div class='del'>-			         enum dma_data_direction dir);</div><div class='del'>-</div><div class='del'>-static inline void *dma_alloc_coherent(struct device *dev, size_t size,</div><div class='del'>-					dma_addr_t *dma_handle, gfp_t flag)</div><div class='add'>+static inline struct dma_map_ops *get_dma_ops(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	void *memory;</div><div class='del'>-</div><div class='del'>-	memory = or1k_dma_alloc_coherent(dev, size, dma_handle, flag);</div><div class='del'>-</div><div class='del'>-	debug_dma_alloc_coherent(dev, size, *dma_handle, memory);</div><div class='del'>-	return memory;</div><div class='add'>+	return &amp;or1k_dma_map_ops;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void dma_free_coherent(struct device *dev, size_t size,</div><div class='del'>-				     void *cpu_addr, dma_addr_t dma_handle)</div><div class='del'>-{</div><div class='del'>-	debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);</div><div class='del'>-	or1k_dma_free_coherent(dev, size, cpu_addr, dma_handle);</div><div class='del'>-}</div><div class='add'>+#include &lt;asm-generic/dma-mapping-common.h&gt;</div><div class='ctx'> </div><div class='del'>-static inline dma_addr_t dma_map_single(struct device *dev, void *ptr,</div><div class='del'>-					size_t size,</div><div class='del'>-					enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	dma_addr_t addr;</div><div class='del'>-</div><div class='del'>-	kmemcheck_mark_initialized(ptr, size);</div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-	addr = or1k_map_page(dev, virt_to_page(ptr),</div><div class='del'>-			     (unsigned long)ptr &amp; ~PAGE_MASK, size,</div><div class='del'>-			     dir, NULL);</div><div class='del'>-	debug_dma_map_page(dev, virt_to_page(ptr),</div><div class='del'>-			   (unsigned long)ptr &amp; ~PAGE_MASK, size,</div><div class='del'>-			   dir, addr, true);</div><div class='del'>-	return addr;</div><div class='del'>-}</div><div class='add'>+#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) </div><div class='ctx'> </div><div class='del'>-static inline void dma_unmap_single(struct device *dev, dma_addr_t addr,</div><div class='del'>-					  size_t size,</div><div class='del'>-					  enum dma_data_direction dir)</div><div class='add'>+static inline void *dma_alloc_attrs(struct device *dev, size_t size,</div><div class='add'>+				    dma_addr_t *dma_handle, gfp_t gfp,</div><div class='add'>+				    struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-	or1k_unmap_page(dev, addr, size, dir, NULL);</div><div class='del'>-	debug_dma_unmap_page(dev, addr, size, dir, true);</div><div class='del'>-}</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='add'>+	void *memory;</div><div class='ctx'> </div><div class='del'>-static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,</div><div class='del'>-				   int nents, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	int i, ents;</div><div class='del'>-	struct scatterlist *s;</div><div class='add'>+	memory = ops-&gt;alloc(dev, size, dma_handle, gfp, attrs);</div><div class='ctx'> </div><div class='del'>-	for_each_sg(sg, s, nents, i)</div><div class='del'>-		kmemcheck_mark_initialized(sg_virt(s), s-&gt;length);</div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-	ents = or1k_map_sg(dev, sg, nents, dir, NULL);</div><div class='del'>-	debug_dma_map_sg(dev, sg, nents, ents, dir);</div><div class='add'>+	debug_dma_alloc_coherent(dev, size, *dma_handle, memory);</div><div class='ctx'> </div><div class='del'>-	return ents;</div><div class='add'>+	return memory;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,</div><div class='del'>-				      int nents, enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-	debug_dma_unmap_sg(dev, sg, nents, dir);</div><div class='del'>-	or1k_unmap_sg(dev, sg, nents, dir, NULL);</div><div class='del'>-}</div><div class='add'>+#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)</div><div class='ctx'> </div><div class='del'>-static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,</div><div class='del'>-				      size_t offset, size_t size,</div><div class='del'>-				      enum dma_data_direction dir)</div><div class='add'>+static inline void dma_free_attrs(struct device *dev, size_t size,</div><div class='add'>+				  void *cpu_addr, dma_addr_t dma_handle,</div><div class='add'>+				  struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='del'>-	dma_addr_t addr;</div><div class='add'>+	struct dma_map_ops *ops = get_dma_ops(dev);</div><div class='ctx'> </div><div class='del'>-	kmemcheck_mark_initialized(page_address(page) + offset, size);</div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-	addr = or1k_map_page(dev, page, offset, size, dir, NULL);</div><div class='del'>-	debug_dma_map_page(dev, page, offset, size, dir, addr, false);</div><div class='add'>+	debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);</div><div class='ctx'> </div><div class='del'>-	return addr;</div><div class='add'>+	ops-&gt;free(dev, size, cpu_addr, dma_handle, attrs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,</div><div class='del'>-				  size_t size, enum dma_data_direction dir)</div><div class='add'>+static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,</div><div class='add'>+					  dma_addr_t *dma_handle, gfp_t gfp)</div><div class='ctx'> {</div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-	or1k_unmap_page(dev, addr, size, dir, NULL);</div><div class='del'>-	debug_dma_unmap_page(dev, addr, size, dir, true);</div><div class='del'>-}</div><div class='add'>+	struct dma_attrs attrs;</div><div class='ctx'> </div><div class='del'>-static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,</div><div class='del'>-					   size_t size,</div><div class='del'>-					   enum dma_data_direction dir)</div><div class='del'>-{</div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-	or1k_sync_single_for_cpu(dev, addr, size, dir);</div><div class='del'>-	debug_dma_sync_single_for_cpu(dev, addr, size, dir);</div><div class='add'>+	dma_set_attr(DMA_ATTR_NON_CONSISTENT, &amp;attrs);</div><div class='add'>+</div><div class='add'>+	return dma_alloc_attrs(dev, size, dma_handle, gfp, &amp;attrs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void dma_sync_single_for_device(struct device *dev,</div><div class='del'>-					      dma_addr_t addr, size_t size,</div><div class='del'>-					      enum dma_data_direction dir)</div><div class='add'>+static inline void dma_free_noncoherent(struct device *dev, size_t size,</div><div class='add'>+					 void *cpu_addr, dma_addr_t dma_handle)</div><div class='ctx'> {</div><div class='del'>-	BUG_ON(!valid_dma_direction(dir));</div><div class='del'>-	or1k_sync_single_for_device(dev, addr, size, dir);</div><div class='del'>-	debug_dma_sync_single_for_device(dev, addr, size, dir);</div><div class='add'>+	struct dma_attrs attrs;</div><div class='add'>+</div><div class='add'>+	dma_set_attr(DMA_ATTR_NON_CONSISTENT, &amp;attrs);</div><div class='add'>+</div><div class='add'>+	dma_free_attrs(dev, size, cpu_addr, dma_handle, &amp;attrs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int dma_supported(struct device *dev, u64 dma_mask)</div><div class='head'>diff --git a/arch/openrisc/include/asm/elf.h b/arch/openrisc/include/asm/elf.h<br/>index 2ce603bbfdd3..a8fe2c513070 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/include/asm/elf.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/include/asm/elf.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/include/asm/elf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/elf.h</a></div><div class='hunk'>@@ -20,11 +20,17 @@</div><div class='ctx'> #define __ASM_OPENRISC_ELF_H</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * This files is partially exported to userspace.  This allows us to keep</div><div class='add'>+ * the ELF bits in one place which should assist in keeping the kernel and</div><div class='add'>+ * userspace in sync.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * ELF register definitions..</div><div class='ctx'>  */</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='ctx'> </div><div class='add'>+/* for struct user_regs_struct definition */</div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* The OR1K relocation types... not all relevant for module loader */</div><div class='ctx'> #define R_OR32_NONE	0</div><div class='hunk'>@@ -62,6 +68,8 @@ typedef unsigned long elf_fpregset_t;</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This is used to ensure we don't load something for the wrong architecture.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/openrisc/include/asm/gpio.h b/arch/openrisc/include/asm/gpio.h<br/>index 0b0d174f47cd..b3799d88ffcf 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/include/asm/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/include/asm/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/gpio.h</a></div><div class='hunk'>@@ -1,65 +1,4 @@</div><div class='del'>-/*</div><div class='del'>- * OpenRISC Linux</div><div class='del'>- *</div><div class='del'>- * Linux architectural port borrowing liberally from similar works of</div><div class='del'>- * others.  All original copyrights apply as per the original source</div><div class='del'>- * declaration.</div><div class='del'>- *</div><div class='del'>- * OpenRISC implementation:</div><div class='del'>- * Copyright (C) 2003 Matjaz Breskvar &lt;phoenix@bsemi.com&gt;</div><div class='del'>- * Copyright (C) 2010-2011 Jonas Bonn &lt;jonas@southpole.se&gt;</div><div class='del'>- * et al.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_OPENRISC_GPIO_H</div><div class='del'>-#define __ASM_OPENRISC_GPIO_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;asm-generic/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_GPIOLIB</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * OpenRISC (or1k) does not have on-chip GPIO's so there is not really</div><div class='del'>- * any standardized implementation that makes sense here.  If passing</div><div class='del'>- * through gpiolib becomes a bottleneck then it may make sense, on a</div><div class='del'>- * case-by-case basis, to implement these inlined/rapid versions.</div><div class='del'>- *</div><div class='del'>- * Just call gpiolib.</div><div class='del'>- */</div><div class='del'>-static inline int gpio_get_value(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_get_value(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void gpio_set_value(unsigned int gpio, int value)</div><div class='del'>-{</div><div class='del'>-	__gpio_set_value(gpio, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_cansleep(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_cansleep(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Not implemented, yet.</div><div class='del'>- */</div><div class='del'>-static inline int gpio_to_irq(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return -ENOSYS;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int irq_to_gpio(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_GPIOLIB */</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_OPENRISC_GPIO_H */</div><div class='add'>+#ifndef __LINUX_GPIO_H</div><div class='add'>+#warning Include linux/gpio.h instead of asm/gpio.h</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/openrisc/include/asm/kvm_para.h b/arch/openrisc/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/openrisc/include/asm/processor.h b/arch/openrisc/include/asm/processor.h<br/>index f7516fa78b58..30462f1fe959 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/processor.h</a></div><div class='hunk'>@@ -72,10 +72,6 @@ struct thread_struct {</div><div class='ctx'> #define task_pt_regs(task) user_regs(task_thread_info(task))</div><div class='ctx'> #define current_regs() user_regs(current_thread_info())</div><div class='ctx'> </div><div class='del'>-extern inline void prepare_to_copy(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define INIT_SP         (sizeof(init_stack) + (unsigned long) &amp;init_stack)</div><div class='ctx'> </div><div class='ctx'> #define INIT_THREAD  { }</div><div class='head'>diff --git a/arch/openrisc/include/asm/ptrace.h b/arch/openrisc/include/asm/ptrace.h<br/>index 4651a737591d..8555c0c3d4d7 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/include/asm/ptrace.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/include/asm/ptrace.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/include/asm/ptrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/ptrace.h</a></div><div class='hunk'>@@ -19,8 +19,6 @@</div><div class='ctx'> #ifndef __ASM_OPENRISC_PTRACE_H</div><div class='ctx'> #define __ASM_OPENRISC_PTRACE_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/spr_defs.h&gt;</div><div class='del'>-</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> /*</div><div class='ctx'>  * This is the layout of the regset returned by the GETREGSET ptrace call</div><div class='hunk'>@@ -30,13 +28,13 @@ struct user_regs_struct {</div><div class='ctx'> 	unsigned long gpr[32];</div><div class='ctx'> 	unsigned long pc;</div><div class='ctx'> 	unsigned long sr;</div><div class='del'>-	unsigned long pad1;</div><div class='del'>-	unsigned long pad2;</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/spr_defs.h&gt;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Make kernel PTrace/register structures opaque to userspace... userspace can</div><div class='ctx'>  * access thread state via the regset mechanism.  This allows us a bit of</div><div class='head'>diff --git a/arch/openrisc/include/asm/uaccess.h b/arch/openrisc/include/asm/uaccess.h<br/>index f5abaa0ffc38..ab2e7a198a4c 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/include/asm/uaccess.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/include/asm/uaccess.h</a></div><div class='hunk'>@@ -313,42 +313,12 @@ clear_user(void *addr, unsigned long size)</div><div class='ctx'> 	return size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern int __strncpy_from_user(char *dst, const char *src, long count);</div><div class='add'>+#define user_addr_max() \</div><div class='add'>+	(segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL)</div><div class='ctx'> </div><div class='del'>-static inline long strncpy_from_user(char *dst, const char *src, long count)</div><div class='del'>-{</div><div class='del'>-	if (access_ok(VERIFY_READ, src, 1))</div><div class='del'>-		return __strncpy_from_user(dst, src, count);</div><div class='del'>-	return -EFAULT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Return the size of a string (including the ending 0)</div><div class='del'>- *</div><div class='del'>- * Return 0 for error</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-extern int __strnlen_user(const char *str, long len, unsigned long top);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Returns the length of the string at str (including the null byte),</div><div class='del'>- * or 0 if we hit a page we can't access,</div><div class='del'>- * or something &gt; len if we didn't find a null byte.</div><div class='del'>- *</div><div class='del'>- * The `top' parameter to __strnlen_user is to make sure that</div><div class='del'>- * we can never overflow from the user area into kernel space.</div><div class='del'>- */</div><div class='del'>-static inline long strnlen_user(const char __user *str, long len)</div><div class='del'>-{</div><div class='del'>-	unsigned long top = (unsigned long)get_fs();</div><div class='del'>-	unsigned long res = 0;</div><div class='del'>-</div><div class='del'>-	if (__addr_ok(str))</div><div class='del'>-		res = __strnlen_user(str, len, top);</div><div class='del'>-</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='add'>+extern long strncpy_from_user(char *dest, const char __user *src, long count);</div><div class='ctx'> </div><div class='del'>-#define strlen_user(str) strnlen_user(str, TASK_SIZE-1)</div><div class='add'>+extern __must_check long strlen_user(const char __user *str);</div><div class='add'>+extern __must_check long strnlen_user(const char __user *str, long n);</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_OPENRISC_UACCESS_H */</div><div class='head'>diff --git a/arch/openrisc/kernel/Makefile b/arch/openrisc/kernel/Makefile<br/>index 9a4c2706d795..e1ee0fa2bbda 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/kernel/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Makefile for the linux kernel.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y	:= head.o vmlinux.lds init_task.o</div><div class='add'>+extra-y	:= head.o vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y	:= setup.o idle.o or32_ksyms.o process.o dma.o \</div><div class='ctx'> 	   traps.o time.o irq.o entry.o ptrace.o signal.o sys_or32.o \</div><div class='head'>diff --git a/arch/openrisc/kernel/dma.c b/arch/openrisc/kernel/dma.c<br/>index f1c8ee2895d0..0b77ddb1ee07 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/kernel/dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/kernel/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/kernel/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/kernel/dma.c</a></div><div class='hunk'>@@ -21,13 +21,16 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/dma-debug.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/dma-attrs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpuinfo.h&gt;</div><div class='ctx'> #include &lt;asm/spr_defs.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> </div><div class='del'>-static int page_set_nocache(pte_t *pte, unsigned long addr,</div><div class='del'>-			    unsigned long next, struct mm_walk *walk)</div><div class='add'>+static int</div><div class='add'>+page_set_nocache(pte_t *pte, unsigned long addr,</div><div class='add'>+		 unsigned long next, struct mm_walk *walk)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long cl;</div><div class='ctx'> </div><div class='hunk'>@@ -46,8 +49,9 @@ static int page_set_nocache(pte_t *pte, unsigned long addr,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int page_clear_nocache(pte_t *pte, unsigned long addr,</div><div class='del'>-			      unsigned long next, struct mm_walk *walk)</div><div class='add'>+static int</div><div class='add'>+page_clear_nocache(pte_t *pte, unsigned long addr,</div><div class='add'>+		   unsigned long next, struct mm_walk *walk)</div><div class='ctx'> {</div><div class='ctx'> 	pte_val(*pte) &amp;= ~_PAGE_CI;</div><div class='ctx'> </div><div class='hunk'>@@ -67,9 +71,19 @@ static int page_clear_nocache(pte_t *pte, unsigned long addr,</div><div class='ctx'>  * cache-inhibit bit on those pages, and makes sure that the pages are</div><div class='ctx'>  * flushed out of the cache before they are used.</div><div class='ctx'>  *</div><div class='add'>+ * If the NON_CONSISTENT attribute is set, then this function just</div><div class='add'>+ * returns "normal", cachable memory.</div><div class='add'>+ *</div><div class='add'>+ * There are additional flags WEAK_ORDERING and WRITE_COMBINE to take</div><div class='add'>+ * into consideration here, too.  All current known implementations of</div><div class='add'>+ * the OR1K support only strongly ordered memory accesses, so that flag</div><div class='add'>+ * is being ignored for now; uncached but write-combined memory is a</div><div class='add'>+ * missing feature of the OR1K.</div><div class='ctx'>  */</div><div class='del'>-void *or1k_dma_alloc_coherent(struct device *dev, size_t size,</div><div class='del'>-			      dma_addr_t *dma_handle, gfp_t gfp)</div><div class='add'>+static void *</div><div class='add'>+or1k_dma_alloc(struct device *dev, size_t size,</div><div class='add'>+	       dma_addr_t *dma_handle, gfp_t gfp,</div><div class='add'>+	       struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long va;</div><div class='ctx'> 	void *page;</div><div class='hunk'>@@ -87,20 +101,23 @@ void *or1k_dma_alloc_coherent(struct device *dev, size_t size,</div><div class='ctx'> </div><div class='ctx'> 	va = (unsigned long)page;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * We need to iterate through the pages, clearing the dcache for</div><div class='del'>-	 * them and setting the cache-inhibit bit.</div><div class='del'>-	 */</div><div class='del'>-	if (walk_page_range(va, va + size, &amp;walk)) {</div><div class='del'>-		free_pages_exact(page, size);</div><div class='del'>-		return NULL;</div><div class='add'>+	if (!dma_get_attr(DMA_ATTR_NON_CONSISTENT, attrs)) {</div><div class='add'>+		/*</div><div class='add'>+		 * We need to iterate through the pages, clearing the dcache for</div><div class='add'>+		 * them and setting the cache-inhibit bit.</div><div class='add'>+		 */</div><div class='add'>+		if (walk_page_range(va, va + size, &amp;walk)) {</div><div class='add'>+			free_pages_exact(page, size);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return (void *)va;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr,</div><div class='del'>-			    dma_addr_t dma_handle)</div><div class='add'>+static void</div><div class='add'>+or1k_dma_free(struct device *dev, size_t size, void *vaddr,</div><div class='add'>+	      dma_addr_t dma_handle, struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long va = (unsigned long)vaddr;</div><div class='ctx'> 	struct mm_walk walk = {</div><div class='hunk'>@@ -108,16 +125,19 @@ void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr,</div><div class='ctx'> 		.mm = &amp;init_mm</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	/* walk_page_range shouldn't be able to fail here */</div><div class='del'>-	WARN_ON(walk_page_range(va, va + size, &amp;walk));</div><div class='add'>+	if (!dma_get_attr(DMA_ATTR_NON_CONSISTENT, attrs)) {</div><div class='add'>+		/* walk_page_range shouldn't be able to fail here */</div><div class='add'>+		WARN_ON(walk_page_range(va, va + size, &amp;walk));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	free_pages_exact(vaddr, size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-dma_addr_t or1k_map_page(struct device *dev, struct page *page,</div><div class='del'>-			 unsigned long offset, size_t size,</div><div class='del'>-			 enum dma_data_direction dir,</div><div class='del'>-			 struct dma_attrs *attrs)</div><div class='add'>+static dma_addr_t</div><div class='add'>+or1k_map_page(struct device *dev, struct page *page,</div><div class='add'>+	      unsigned long offset, size_t size,</div><div class='add'>+	      enum dma_data_direction dir,</div><div class='add'>+	      struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long cl;</div><div class='ctx'> 	dma_addr_t addr = page_to_phys(page) + offset;</div><div class='hunk'>@@ -147,16 +167,18 @@ dma_addr_t or1k_map_page(struct device *dev, struct page *page,</div><div class='ctx'> 	return addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,</div><div class='del'>-		     size_t size, enum dma_data_direction dir,</div><div class='del'>-		     struct dma_attrs *attrs)</div><div class='add'>+static void</div><div class='add'>+or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,</div><div class='add'>+		size_t size, enum dma_data_direction dir,</div><div class='add'>+		struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	/* Nothing special to do here... */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int or1k_map_sg(struct device *dev, struct scatterlist *sg,</div><div class='del'>-		int nents, enum dma_data_direction dir,</div><div class='del'>-		struct dma_attrs *attrs)</div><div class='add'>+static int</div><div class='add'>+or1k_map_sg(struct device *dev, struct scatterlist *sg,</div><div class='add'>+	    int nents, enum dma_data_direction dir,</div><div class='add'>+	    struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	struct scatterlist *s;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -169,9 +191,10 @@ int or1k_map_sg(struct device *dev, struct scatterlist *sg,</div><div class='ctx'> 	return nents;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void or1k_unmap_sg(struct device *dev, struct scatterlist *sg,</div><div class='del'>-		   int nents, enum dma_data_direction dir,</div><div class='del'>-		   struct dma_attrs *attrs)</div><div class='add'>+static void</div><div class='add'>+or1k_unmap_sg(struct device *dev, struct scatterlist *sg,</div><div class='add'>+	      int nents, enum dma_data_direction dir,</div><div class='add'>+	      struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	struct scatterlist *s;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -181,9 +204,10 @@ void or1k_unmap_sg(struct device *dev, struct scatterlist *sg,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void or1k_sync_single_for_cpu(struct device *dev,</div><div class='del'>-			      dma_addr_t dma_handle, size_t size,</div><div class='del'>-			      enum dma_data_direction dir)</div><div class='add'>+static void</div><div class='add'>+or1k_sync_single_for_cpu(struct device *dev,</div><div class='add'>+			 dma_addr_t dma_handle, size_t size,</div><div class='add'>+			 enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long cl;</div><div class='ctx'> 	dma_addr_t addr = dma_handle;</div><div class='hunk'>@@ -193,9 +217,10 @@ void or1k_sync_single_for_cpu(struct device *dev,</div><div class='ctx'> 		mtspr(SPR_DCBIR, cl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void or1k_sync_single_for_device(struct device *dev,</div><div class='del'>-			         dma_addr_t dma_handle, size_t size,</div><div class='del'>-			         enum dma_data_direction dir)</div><div class='add'>+static void</div><div class='add'>+or1k_sync_single_for_device(struct device *dev,</div><div class='add'>+			    dma_addr_t dma_handle, size_t size,</div><div class='add'>+			    enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long cl;</div><div class='ctx'> 	dma_addr_t addr = dma_handle;</div><div class='hunk'>@@ -205,6 +230,18 @@ void or1k_sync_single_for_device(struct device *dev,</div><div class='ctx'> 		mtspr(SPR_DCBFR, cl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct dma_map_ops or1k_dma_map_ops = {</div><div class='add'>+	.alloc = or1k_dma_alloc,</div><div class='add'>+	.free = or1k_dma_free,</div><div class='add'>+	.map_page = or1k_map_page,</div><div class='add'>+	.unmap_page = or1k_unmap_page,</div><div class='add'>+	.map_sg = or1k_map_sg,</div><div class='add'>+	.unmap_sg = or1k_unmap_sg,</div><div class='add'>+	.sync_single_for_cpu = or1k_sync_single_for_cpu,</div><div class='add'>+	.sync_single_for_device = or1k_sync_single_for_device,</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL(or1k_dma_map_ops);</div><div class='add'>+</div><div class='ctx'> /* Number of entries preallocated for DMA-API debugging */</div><div class='ctx'> #define PREALLOC_DMA_DEBUG_ENTRIES (1 &lt;&lt; 16)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S<br/>index 6e61af8682b8..ddfcaa828b0e 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/kernel/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/kernel/entry.S</a></div><div class='hunk'>@@ -1117,10 +1117,10 @@ ENTRY(sys_rt_sigreturn)</div><div class='ctx'> ENTRY(sys_or1k_atomic)</div><div class='ctx'> 	/* FIXME: This ignores r3 and always does an XCHG */</div><div class='ctx'> 	DISABLE_INTERRUPTS(r17,r19)</div><div class='del'>-	l.lwz	r30,0(r4)</div><div class='del'>-	l.lwz	r28,0(r5)</div><div class='del'>-	l.sw	0(r4),r28</div><div class='del'>-	l.sw	0(r5),r30</div><div class='add'>+	l.lwz	r29,0(r4)</div><div class='add'>+	l.lwz	r27,0(r5)</div><div class='add'>+	l.sw	0(r4),r27</div><div class='add'>+	l.sw	0(r5),r29</div><div class='ctx'> 	ENABLE_INTERRUPTS(r17)</div><div class='ctx'> 	l.jr	r9</div><div class='ctx'> 	 l.or	r11,r0,r0</div><div class='head'>diff --git a/arch/openrisc/kernel/init_task.c b/arch/openrisc/kernel/init_task.c<br/>deleted file mode 100644<br/>index ca534082d5f3..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * OpenRISC init_task.c</div><div class='del'>- *</div><div class='del'>- * Linux architectural port borrowing liberally from similar works of</div><div class='del'>- * others.  All original copyrights apply as per the original source</div><div class='del'>- * declaration.</div><div class='del'>- *</div><div class='del'>- * Modifications for the OpenRISC architecture:</div><div class='del'>- * Copyright (C) 2003 Matjaz Breskvar &lt;phoenix@bsemi.com&gt;</div><div class='del'>- * Copyright (C) 2010-2011 Jonas Bonn &lt;jonas@southpole.se&gt;</div><div class='del'>- *</div><div class='del'>- *      This program is free software; you can redistribute it and/or</div><div class='del'>- *      modify it under the terms of the GNU General Public License</div><div class='del'>- *      as published by the Free Software Foundation; either version</div><div class='del'>- *      2 of the License, or (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is THREAD_SIZE aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data = {</div><div class='del'>-	INIT_THREAD_INFO(init_task)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/openrisc/kernel/irq.c b/arch/openrisc/kernel/irq.c<br/>index 4bfead220956..e935b9d8eee1 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/kernel/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/kernel/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/kernel/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/kernel/irq.c</a></div><div class='hunk'>@@ -14,17 +14,13 @@</div><div class='ctx'>  *      2 of the License, or (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;linux/kernel_stat.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='del'>-</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/irqflags.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* read interrupt enabled status */</div><div class='hunk'>@@ -98,6 +94,7 @@ static void or1k_pic_mask_ack(struct irq_data *data)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if 0</div><div class='ctx'> static int or1k_pic_set_type(struct irq_data *data, unsigned int flow_type)</div><div class='ctx'> {</div><div class='ctx'> 	/* There's nothing to do in the PIC configuration when changing</div><div class='hunk'>@@ -107,43 +104,64 @@ static int or1k_pic_set_type(struct irq_data *data, unsigned int flow_type)</div><div class='ctx'> </div><div class='ctx'> 	return irq_setup_alt_chip(data, flow_type);</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static struct irq_chip or1k_dev = {</div><div class='add'>+	.name = "or1k-PIC",</div><div class='add'>+	.irq_unmask = or1k_pic_unmask,</div><div class='add'>+	.irq_mask = or1k_pic_mask,</div><div class='add'>+	.irq_ack = or1k_pic_ack,</div><div class='add'>+	.irq_mask_ack = or1k_pic_mask_ack,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct irq_domain *root_domain;</div><div class='ctx'> </div><div class='ctx'> static inline int pic_get_irq(int first)</div><div class='ctx'> {</div><div class='del'>-	int irq;</div><div class='add'>+	int hwirq;</div><div class='ctx'> </div><div class='del'>-	irq = ffs(mfspr(SPR_PICSR) &gt;&gt; first);</div><div class='add'>+	hwirq = ffs(mfspr(SPR_PICSR) &gt;&gt; first);</div><div class='add'>+	if (!hwirq)</div><div class='add'>+		return NO_IRQ;</div><div class='add'>+	else</div><div class='add'>+		hwirq = hwirq + first -1;</div><div class='ctx'> </div><div class='del'>-	return irq ? irq + first - 1 : NO_IRQ;</div><div class='add'>+	return irq_find_mapping(root_domain, hwirq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init or1k_irq_init(void)</div><div class='add'>+</div><div class='add'>+static int or1k_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)</div><div class='ctx'> {</div><div class='del'>-	struct irq_chip_generic *gc;</div><div class='del'>-	struct irq_chip_type *ct;</div><div class='add'>+	irq_set_chip_and_handler_name(irq, &amp;or1k_dev,</div><div class='add'>+				      handle_level_irq, "level");</div><div class='add'>+	irq_set_status_flags(irq, IRQ_LEVEL | IRQ_NOPROBE);</div><div class='ctx'> </div><div class='del'>-	/* Disable all interrupts until explicitly requested */</div><div class='del'>-	mtspr(SPR_PICMR, (0UL));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	gc = irq_alloc_generic_chip("or1k-PIC", 1, 0, 0, handle_level_irq);</div><div class='del'>-	ct = gc-&gt;chip_types;</div><div class='add'>+static const struct irq_domain_ops or1k_irq_domain_ops = {</div><div class='add'>+	.xlate = irq_domain_xlate_onecell,</div><div class='add'>+	.map = or1k_map,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	ct-&gt;chip.irq_unmask = or1k_pic_unmask;</div><div class='del'>-	ct-&gt;chip.irq_mask = or1k_pic_mask;</div><div class='del'>-	ct-&gt;chip.irq_ack = or1k_pic_ack;</div><div class='del'>-	ct-&gt;chip.irq_mask_ack = or1k_pic_mask_ack;</div><div class='del'>-	ct-&gt;chip.irq_set_type = or1k_pic_set_type;</div><div class='add'>+/*</div><div class='add'>+ * This sets up the IRQ domain for the PIC built in to the OpenRISC</div><div class='add'>+ * 1000 CPU.  This is the "root" domain as these are the interrupts</div><div class='add'>+ * that directly trigger an exception in the CPU.</div><div class='add'>+ */</div><div class='add'>+static void __init or1k_irq_init(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *intc = NULL;</div><div class='ctx'> </div><div class='del'>-	/* The OR1K PIC can handle both level and edge trigged</div><div class='del'>-	 * interrupts in roughly the same manner</div><div class='del'>-	 */</div><div class='del'>-#if 0</div><div class='del'>-	/* FIXME: chip.type??? */</div><div class='del'>-	ct-&gt;chip.type = IRQ_TYPE_EDGE_BOTH | IRQ_TYPE_LEVEL_MASK;</div><div class='del'>-#endif</div><div class='add'>+	/* The interrupt controller device node is mandatory */</div><div class='add'>+	intc = of_find_compatible_node(NULL, NULL, "opencores,or1k-pic");</div><div class='add'>+	BUG_ON(!intc);</div><div class='ctx'> </div><div class='del'>-	irq_setup_generic_chip(gc, IRQ_MSK(NR_IRQS), 0,</div><div class='del'>-			       IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);</div><div class='add'>+	/* Disable all interrupts until explicitly requested */</div><div class='add'>+	mtspr(SPR_PICMR, (0UL));</div><div class='add'>+</div><div class='add'>+	root_domain = irq_domain_add_linear(intc, 32,</div><div class='add'>+					    &amp;or1k_irq_domain_ops, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init init_IRQ(void)</div><div class='hunk'>@@ -164,10 +182,3 @@ void __irq_entry do_IRQ(struct pt_regs *regs)</div><div class='ctx'> 	irq_exit();</div><div class='ctx'> 	set_irq_regs(old_regs);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-unsigned int irq_create_of_mapping(struct device_node *controller,</div><div class='del'>-				   const u32 *intspec, unsigned int intsize)</div><div class='del'>-{</div><div class='del'>-	return intspec[0];</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(irq_create_of_mapping);</div><div class='head'>diff --git a/arch/openrisc/kernel/signal.c b/arch/openrisc/kernel/signal.c<br/>index e970743251ae..30110297f4f9 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/kernel/signal.c</a></div><div class='hunk'>@@ -33,8 +33,6 @@</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_SIG 0</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> asmlinkage long</div><div class='ctx'> _sys_sigaltstack(const stack_t *uss, stack_t *uoss, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -101,7 +99,6 @@ asmlinkage long _sys_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext))</div><div class='hunk'>@@ -251,20 +248,19 @@ give_sigsegv:</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int</div><div class='add'>+static inline void</div><div class='ctx'> handle_signal(unsigned long sig,</div><div class='ctx'> 	      siginfo_t *info, struct k_sigaction *ka,</div><div class='del'>-	      sigset_t *oldset, struct pt_regs *regs)</div><div class='add'>+	      struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='add'>+	ret = setup_rt_frame(sig, ka, info, sigmask_to_save(), regs);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	block_sigmask(ka, sig);</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	signal_delivered(sig, info, ka, regs,</div><div class='add'>+				 test_thread_flag(TIF_SINGLESTEP));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -339,30 +335,10 @@ void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	if (signr &lt;= 0) {</div><div class='ctx'> 		/* no signal to deliver so we just put the saved sigmask</div><div class='ctx'> 		 * back */</div><div class='del'>-		if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-			clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-			sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		restore_saved_sigmask();</div><div class='ctx'> 	} else {		/* signr &gt; 0 */</div><div class='del'>-		sigset_t *oldset;</div><div class='del'>-</div><div class='del'>-		if (current_thread_info()-&gt;flags &amp; _TIF_RESTORE_SIGMASK)</div><div class='del'>-			oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-		else</div><div class='del'>-			oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  */</div><div class='del'>-		if (!handle_signal(signr, &amp;info, &amp;ka, oldset, regs)) {</div><div class='del'>-			/* a signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag */</div><div class='del'>-			clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		tracehook_signal_handler(signr, &amp;info, &amp;ka, regs,</div><div class='del'>-					 test_thread_flag(TIF_SINGLESTEP));</div><div class='add'>+		handle_signal(signr, &amp;info, &amp;ka, regs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='hunk'>@@ -376,7 +352,5 @@ asmlinkage void do_notify_resume(struct pt_regs *regs)</div><div class='ctx'> 	if (current_thread_info()-&gt;flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/openrisc/lib/string.S b/arch/openrisc/lib/string.S<br/>index 465f04bc7deb..c09fee7dec14 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/lib/string.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/lib/string.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/lib/string.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/lib/string.S</a></div><div class='hunk'>@@ -103,102 +103,3 @@ __clear_user:</div><div class='ctx'> 	.section __ex_table, "a"</div><div class='ctx'> 		.long 9b, 99b		// write fault</div><div class='ctx'> 	.previous</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * long strncpy_from_user(char *dst, const char *src, long count)</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-	.global	__strncpy_from_user</div><div class='del'>-__strncpy_from_user:</div><div class='del'>-	l.addi  r1,r1,-16</div><div class='del'>-	l.sw    0(r1),r6</div><div class='del'>-	l.sw    4(r1),r5</div><div class='del'>-	l.sw    8(r1),r4</div><div class='del'>-	l.sw    12(r1),r3</div><div class='del'>-</div><div class='del'>-	l.addi  r11,r5,0</div><div class='del'>-2:  	l.sfeq  r5,r0</div><div class='del'>-	l.bf    1f</div><div class='del'>-	l.addi  r5,r5,-1</div><div class='del'>-8:    	l.lbz   r6,0(r4)</div><div class='del'>-	l.sfeq  r6,r0</div><div class='del'>-	l.bf    1f</div><div class='del'>-9:    	l.sb    0(r3),r6</div><div class='del'>-	l.addi  r3,r3,1</div><div class='del'>-	l.j     2b</div><div class='del'>-	l.addi  r4,r4,1</div><div class='del'>-1:</div><div class='del'>-	l.lwz   r6,0(r1)</div><div class='del'>-	l.addi  r5,r5,1</div><div class='del'>-	l.sub   r11,r11,r5              // r11 holds the return value</div><div class='del'>-</div><div class='del'>-	l.lwz   r6,0(r1)</div><div class='del'>-	l.lwz   r5,4(r1)</div><div class='del'>-	l.lwz   r4,8(r1)</div><div class='del'>-	l.lwz   r3,12(r1)</div><div class='del'>-	l.jr    r9</div><div class='del'>-	l.addi  r1,r1,16</div><div class='del'>-</div><div class='del'>-	.section .fixup, "ax"</div><div class='del'>-99:</div><div class='del'>-		l.movhi r11,hi(-EFAULT)</div><div class='del'>-		l.ori   r11,r11,lo(-EFAULT)</div><div class='del'>-</div><div class='del'>-		l.lwz   r6,0(r1)</div><div class='del'>-		l.lwz   r5,4(r1)</div><div class='del'>-		l.lwz   r4,8(r1)</div><div class='del'>-		l.lwz   r3,12(r1)</div><div class='del'>-		l.jr	r9</div><div class='del'>-		l.addi  r1,r1,16</div><div class='del'>-	.previous</div><div class='del'>-</div><div class='del'>-	.section __ex_table, "a"</div><div class='del'>-		.long 8b, 99b		// read fault</div><div class='del'>-	.previous</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * extern int __strnlen_user(const char *str, long len, unsigned long top);</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * RTRN: - length of a string including NUL termination character</div><div class='del'>- *       - on page fault 0</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-	.global __strnlen_user</div><div class='del'>-__strnlen_user:</div><div class='del'>-	l.addi  r1,r1,-8</div><div class='del'>-	l.sw    0(r1),r6</div><div class='del'>-	l.sw    4(r1),r3</div><div class='del'>-</div><div class='del'>-	l.addi  r11,r0,0</div><div class='del'>-2:  	l.sfeq  r11,r4</div><div class='del'>-	l.bf    1f</div><div class='del'>-	l.addi  r11,r11,1</div><div class='del'>-8:    	l.lbz   r6,0(r3)</div><div class='del'>-	l.sfeq  r6,r0</div><div class='del'>-	l.bf    1f</div><div class='del'>-	l.sfgeu r3,r5                  // are we over the top ?</div><div class='del'>-	l.bf    99f</div><div class='del'>-	l.j     2b</div><div class='del'>-	l.addi  r3,r3,1</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	l.lwz   r6,0(r1)</div><div class='del'>-	l.lwz	r3,4(r1)</div><div class='del'>-	l.jr    r9</div><div class='del'>-	l.addi  r1,r1,8</div><div class='del'>-</div><div class='del'>-	.section .fixup, "ax"</div><div class='del'>-99:</div><div class='del'>-		l.addi  r11,r0,0</div><div class='del'>-</div><div class='del'>-		l.lwz   r6,0(r1)</div><div class='del'>-		l.lwz	r3,4(r1)</div><div class='del'>-		l.jr	r9</div><div class='del'>-		l.addi  r1,r1,8</div><div class='del'>-	.previous</div><div class='del'>-</div><div class='del'>-	.section __ex_table, "a"</div><div class='del'>-		.long 8b, 99b		// read fault</div><div class='del'>-	.previous</div><div class='head'>diff --git a/arch/openrisc/mm/fault.c b/arch/openrisc/mm/fault.c<br/>index a5dce82f864b..40f850e9766c 100644<br/>--- a/<a href='/drm-misc/tree/arch/openrisc/mm/fault.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/openrisc/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/openrisc/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/openrisc/mm/fault.c</a></div><div class='hunk'>@@ -54,6 +54,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long address,</div><div class='ctx'> 	struct vm_area_struct *vma;</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int fault;</div><div class='add'>+	unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;</div><div class='ctx'> </div><div class='ctx'> 	tsk = current;</div><div class='ctx'> </div><div class='hunk'>@@ -105,6 +106,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long address,</div><div class='ctx'> 	if (in_interrupt() || !mm)</div><div class='ctx'> 		goto no_context;</div><div class='ctx'> </div><div class='add'>+retry:</div><div class='ctx'> 	down_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	vma = find_vma(mm, address);</div><div class='ctx'> </div><div class='hunk'>@@ -143,6 +145,7 @@ good_area:</div><div class='ctx'> 	if (write_acc) {</div><div class='ctx'> 		if (!(vma-&gt;vm_flags &amp; VM_WRITE))</div><div class='ctx'> 			goto bad_area;</div><div class='add'>+		flags |= FAULT_FLAG_WRITE;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* not present */</div><div class='ctx'> 		if (!(vma-&gt;vm_flags &amp; (VM_READ | VM_EXEC)))</div><div class='hunk'>@@ -159,7 +162,11 @@ good_area:</div><div class='ctx'> 	 * the fault.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	fault = handle_mm_fault(mm, vma, address, write_acc);</div><div class='add'>+	fault = handle_mm_fault(mm, vma, address, flags);</div><div class='add'>+</div><div class='add'>+	if ((fault &amp; VM_FAULT_RETRY) &amp;&amp; fatal_signal_pending(current))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(fault &amp; VM_FAULT_ERROR)) {</div><div class='ctx'> 		if (fault &amp; VM_FAULT_OOM)</div><div class='ctx'> 			goto out_of_memory;</div><div class='hunk'>@@ -167,11 +174,24 @@ good_area:</div><div class='ctx'> 			goto do_sigbus;</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='del'>-	/*RGD modeled on Cris */</div><div class='del'>-	if (fault &amp; VM_FAULT_MAJOR)</div><div class='del'>-		tsk-&gt;maj_flt++;</div><div class='del'>-	else</div><div class='del'>-		tsk-&gt;min_flt++;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; FAULT_FLAG_ALLOW_RETRY) {</div><div class='add'>+		/*RGD modeled on Cris */</div><div class='add'>+		if (fault &amp; VM_FAULT_MAJOR)</div><div class='add'>+			tsk-&gt;maj_flt++;</div><div class='add'>+		else</div><div class='add'>+			tsk-&gt;min_flt++;</div><div class='add'>+		if (fault &amp; VM_FAULT_RETRY) {</div><div class='add'>+			flags &amp;= ~FAULT_FLAG_ALLOW_RETRY;</div><div class='add'>+</div><div class='add'>+			 /* No need to up_read(&amp;mm-&gt;mmap_sem) as we would</div><div class='add'>+			 * have already released it in __lock_page_or_retry</div><div class='add'>+			 * in mm/filemap.c.</div><div class='add'>+			 */</div><div class='add'>+</div><div class='add'>+			goto retry;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	up_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	return;</div><div class='head'>diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig<br/>index 242a1b7ac759..3ff21b536f28 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/Kconfig</a></div><div class='hunk'>@@ -17,6 +17,8 @@ config PARISC</div><div class='ctx'> 	select GENERIC_PCI_IOMAP</div><div class='ctx'> 	select IRQ_PER_CPU</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='add'>+	select GENERIC_STRNCPY_FROM_USER</div><div class='ctx'> </div><div class='ctx'> 	help</div><div class='ctx'> 	  The PA-RISC microprocessor is designed by Hewlett-Packard and used</div><div class='head'>diff --git a/arch/parisc/Makefile b/arch/parisc/Makefile<br/>index 19ab7b2ea1cd..5707f1a62341 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/Makefile</a></div><div class='hunk'>@@ -21,6 +21,7 @@ KBUILD_DEFCONFIG := default_defconfig</div><div class='ctx'> </div><div class='ctx'> NM		= sh $(srctree)/arch/parisc/nm</div><div class='ctx'> CHECKFLAGS	+= -D__hppa__=1</div><div class='add'>+LIBGCC		= $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)</div><div class='ctx'> </div><div class='ctx'> MACHINE		:= $(shell uname -m)</div><div class='ctx'> ifeq ($(MACHINE),parisc*)</div><div class='hunk'>@@ -75,11 +76,11 @@ head-y			:= arch/parisc/kernel/head.o</div><div class='ctx'> </div><div class='ctx'> KBUILD_CFLAGS	+= $(cflags-y)</div><div class='ctx'> </div><div class='del'>-kernel-y			:= mm/ kernel/ math-emu/ kernel/init_task.o</div><div class='add'>+kernel-y			:= mm/ kernel/ math-emu/</div><div class='ctx'> kernel-$(CONFIG_HPUX)		+= hpux/</div><div class='ctx'> </div><div class='ctx'> core-y	+= $(addprefix arch/parisc/, $(kernel-y))</div><div class='del'>-libs-y	+= arch/parisc/lib/ `$(CC) -print-libgcc-file-name`</div><div class='add'>+libs-y	+= arch/parisc/lib/ $(LIBGCC)</div><div class='ctx'> </div><div class='ctx'> drivers-$(CONFIG_OPROFILE)		+= arch/parisc/oprofile/</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/hpux/fs.c b/arch/parisc/hpux/fs.c<br/>index 0dc8543acb4f..c71eb6c79897 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/hpux/fs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/hpux/fs.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/hpux/fs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/hpux/fs.c</a></div><div class='hunk'>@@ -159,8 +159,8 @@ static int cp_hpux_stat(struct kstat *stat, struct hpux_stat64 __user *statbuf)</div><div class='ctx'> 	tmp.st_ino = stat-&gt;ino;</div><div class='ctx'> 	tmp.st_mode = stat-&gt;mode;</div><div class='ctx'> 	tmp.st_nlink = stat-&gt;nlink;</div><div class='del'>-	tmp.st_uid = stat-&gt;uid;</div><div class='del'>-	tmp.st_gid = stat-&gt;gid;</div><div class='add'>+	tmp.st_uid = from_kuid_munged(current_user_ns(), stat-&gt;uid);</div><div class='add'>+	tmp.st_gid = from_kgid_munged(current_user_ns(), stat-&gt;gid);</div><div class='ctx'> 	tmp.st_rdev = new_encode_dev(stat-&gt;rdev);</div><div class='ctx'> 	tmp.st_size = stat-&gt;size;</div><div class='ctx'> 	tmp.st_atime = stat-&gt;atime.tv_sec;</div><div class='head'>diff --git a/arch/parisc/include/asm/Kbuild b/arch/parisc/include/asm/Kbuild<br/>index 19a434f55059..4383707d9801 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/Kbuild?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/Kbuild</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='ctx'> include include/asm-generic/Kbuild.asm</div><div class='ctx'> </div><div class='ctx'> header-y += pdc.h</div><div class='add'>+generic-y += word-at-a-time.h</div><div class='head'>diff --git a/arch/parisc/include/asm/bug.h b/arch/parisc/include/asm/bug.h<br/>index 72cfdb0cfdd1..62a33338549c 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/bug.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/bug.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/bug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/bug.h</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> #ifndef _PARISC_BUG_H</div><div class='ctx'> #define _PARISC_BUG_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/kernel.h&gt;	/* for BUGFLAG_TAINT */</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Tell the user there is some problem.</div><div class='ctx'>  * The offending file and line are encoded in the __bug_table section.</div><div class='head'>diff --git a/arch/parisc/include/asm/hardware.h b/arch/parisc/include/asm/hardware.h<br/>index 4e9626836bab..d1d864b81bae 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/hardware.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/hardware.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/hardware.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/hardware.h</a></div><div class='hunk'>@@ -2,7 +2,6 @@</div><div class='ctx'> #define _PARISC_HARDWARE_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mod_devicetable.h&gt;</div><div class='del'>-#include &lt;asm/pdc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define HWTYPE_ANY_ID		PA_HWTYPE_ANY_ID</div><div class='ctx'> #define HVERSION_ANY_ID		PA_HVERSION_ANY_ID</div><div class='hunk'>@@ -95,12 +94,14 @@ struct bc_module {</div><div class='ctx'> #define HPHW_MC	       15</div><div class='ctx'> #define HPHW_FAULTY    31</div><div class='ctx'> </div><div class='add'>+struct parisc_device_id;</div><div class='ctx'> </div><div class='ctx'> /* hardware.c: */</div><div class='ctx'> extern const char *parisc_hardware_description(struct parisc_device_id *id);</div><div class='ctx'> extern enum cpu_type parisc_get_cpu_type(unsigned long hversion);</div><div class='ctx'> </div><div class='ctx'> struct pci_dev;</div><div class='add'>+struct hardware_path;</div><div class='ctx'> </div><div class='ctx'> /* drivers.c: */</div><div class='ctx'> extern struct parisc_device *alloc_pa_dev(unsigned long hpa,</div><div class='head'>diff --git a/arch/parisc/include/asm/kbdleds.h b/arch/parisc/include/asm/kbdleds.h<br/>new file mode 100644<br/>index 000000000000..2e2e75a83c28<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/kbdleds.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/kbdleds.h</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+#ifndef _ASM_PARISC_KBDLEDS_H</div><div class='add'>+#define _ASM_PARISC_KBDLEDS_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * On HIL keyboards of PARISC machines there is no NumLock key and</div><div class='add'>+ * everyone expects the keypad to be used for numbers. That's why</div><div class='add'>+ * we can safely turn on the NUMLOCK bit.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static inline int kbd_defleds(void)</div><div class='add'>+{</div><div class='add'>+#if defined(CONFIG_KEYBOARD_HIL) || defined(CONFIG_KEYBOARD_HIL_OLD)</div><div class='add'>+	return 1 &lt;&lt; VC_NUMLOCK;</div><div class='add'>+#else</div><div class='add'>+	return 0;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_PARISC_KBDLEDS_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/kvm_para.h b/arch/parisc/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/parisc/include/asm/page.h b/arch/parisc/include/asm/page.h<br/>index a84cc1f925f6..4e0e7dbf0f3f 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/page.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/page.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/page.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/page.h</a></div><div class='hunk'>@@ -160,5 +160,11 @@ extern int npmem_ranges;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/memory_model.h&gt;</div><div class='ctx'> #include &lt;asm-generic/getorder.h&gt;</div><div class='add'>+#include &lt;asm/pdc.h&gt;</div><div class='add'>+</div><div class='add'>+#define PAGE0   ((struct zeropage *)__PAGE_OFFSET)</div><div class='add'>+</div><div class='add'>+/* DEFINITION OF THE ZERO-PAGE (PAG0) */</div><div class='add'>+/* based on work by Jason Eckhardt (jason@equator.com) */</div><div class='ctx'> </div><div class='ctx'> #endif /* _PARISC_PAGE_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/pdc.h b/arch/parisc/include/asm/pdc.h<br/>index 4ca510b3c6f8..7f0f2d23059d 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/pdc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/pdc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/pdc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/pdc.h</a></div><div class='hunk'>@@ -343,8 +343,6 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/page.h&gt; /* for __PAGE_OFFSET */</div><div class='del'>-</div><div class='ctx'> extern int pdc_type;</div><div class='ctx'> </div><div class='ctx'> /* Values for pdc_type */</div><div class='hunk'>@@ -677,11 +675,6 @@ static inline char * os_id_to_string(u16 os_id) {</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> </div><div class='del'>-#define PAGE0   ((struct zeropage *)__PAGE_OFFSET)</div><div class='del'>-</div><div class='del'>-/* DEFINITION OF THE ZERO-PAGE (PAG0) */</div><div class='del'>-/* based on work by Jason Eckhardt (jason@equator.com) */</div><div class='del'>-</div><div class='ctx'> /* flags of the device_path */</div><div class='ctx'> #define	PF_AUTOBOOT	0x80</div><div class='ctx'> #define	PF_AUTOSEARCH	0x40</div><div class='head'>diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h<br/>index 22dadeb58695..ee99f2339356 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/pgtable.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/pgtable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/pgtable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/pgtable.h</a></div><div class='hunk'>@@ -44,6 +44,8 @@ struct vm_area_struct;</div><div class='ctx'> </div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+</div><div class='ctx'> #define pte_ERROR(e) \</div><div class='ctx'> 	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))</div><div class='ctx'> #define pmd_ERROR(e) \</div><div class='head'>diff --git a/arch/parisc/include/asm/posix_types.h b/arch/parisc/include/asm/posix_types.h<br/>index 5212b0357daf..b9344256f76b 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/posix_types.h</a></div><div class='hunk'>@@ -10,9 +10,6 @@</div><div class='ctx'> typedef unsigned short		__kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned short		__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned short		__kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/include/asm/prefetch.h b/arch/parisc/include/asm/prefetch.h<br/>index c5edc60c059f..1ee7c82672c1 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/prefetch.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/prefetch.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/prefetch.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/prefetch.h</a></div><div class='hunk'>@@ -21,7 +21,12 @@</div><div class='ctx'> #define ARCH_HAS_PREFETCH</div><div class='ctx'> static inline void prefetch(const void *addr)</div><div class='ctx'> {</div><div class='del'>-	__asm__("ldw 0(%0), %%r0" : : "r" (addr));</div><div class='add'>+	__asm__(</div><div class='add'>+#ifndef CONFIG_PA20</div><div class='add'>+		/* Need to avoid prefetch of NULL on PA7300LC */</div><div class='add'>+		"	extrw,u,= %0,31,32,%%r0\n"</div><div class='add'>+#endif</div><div class='add'>+		"	ldw 0(%0), %%r0" : : "r" (addr));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* LDD is a PA2.0 addition. */</div><div class='head'>diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h<br/>index acdf4cad6125..0e8b7b8ce8a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/processor.h</a></div><div class='hunk'>@@ -328,9 +328,6 @@ struct mm_struct;</div><div class='ctx'> extern void release_thread(struct task_struct *);</div><div class='ctx'> extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> extern void map_hpux_gateway_page(struct task_struct *tsk, struct mm_struct *mm);</div><div class='ctx'> </div><div class='ctx'> extern unsigned long get_wchan(struct task_struct *p);</div><div class='head'>diff --git a/arch/parisc/include/asm/smp.h b/arch/parisc/include/asm/smp.h<br/>index e8f8037d872b..a5dc9066c6d8 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/smp.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/smp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/smp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/smp.h</a></div><div class='hunk'>@@ -25,7 +25,6 @@ typedef unsigned long address_t;</div><div class='ctx'> #define cpu_number_map(cpu)	(cpu)</div><div class='ctx'> #define cpu_logical_map(cpu)	(cpu)</div><div class='ctx'> </div><div class='del'>-extern void smp_send_reschedule(int cpu);</div><div class='ctx'> extern void smp_send_all_nop(void);</div><div class='ctx'> </div><div class='ctx'> extern void arch_send_call_function_single_ipi(int cpu);</div><div class='hunk'>@@ -50,6 +49,5 @@ static inline void __cpu_die (unsigned int cpu) {</div><div class='ctx'>   while(1)</div><div class='ctx'>     ;</div><div class='ctx'> }</div><div class='del'>-extern int __cpu_up (unsigned int cpu);</div><div class='ctx'> </div><div class='ctx'> #endif /*  __ASM_SMP_H */</div><div class='head'>diff --git a/arch/parisc/include/asm/spinlock.h b/arch/parisc/include/asm/spinlock.h<br/>index 804aa28ab1d6..3516e0b27044 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/spinlock.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/spinlock.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/spinlock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/spinlock.h</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> #ifndef __ASM_SPINLOCK_H</div><div class='ctx'> #define __ASM_SPINLOCK_H</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/barrier.h&gt;</div><div class='add'>+#include &lt;asm/ldcw.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/spinlock_types.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/include/asm/stat.h b/arch/parisc/include/asm/stat.h<br/>index 9d5fbbc5c31f..d76fbda5d62c 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/stat.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/stat.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/stat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/stat.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@ struct stat {</div><div class='ctx'> 	unsigned int	st_dev;		/* dev_t is 32 bits on parisc */</div><div class='ctx'> 	ino_t		st_ino;		/* 32 bits */</div><div class='ctx'> 	mode_t		st_mode;	/* 16 bits */</div><div class='del'>-	nlink_t		st_nlink;	/* 16 bits */</div><div class='add'>+	unsigned short	st_nlink;	/* 16 bits */</div><div class='ctx'> 	unsigned short	st_reserved1;	/* old st_uid */</div><div class='ctx'> 	unsigned short	st_reserved2;	/* old st_gid */</div><div class='ctx'> 	unsigned int	st_rdev;</div><div class='hunk'>@@ -42,7 +42,7 @@ struct hpux_stat64 {</div><div class='ctx'> 	unsigned int	st_dev;		/* dev_t is 32 bits on parisc */</div><div class='ctx'> 	ino_t           st_ino;         /* 32 bits */</div><div class='ctx'> 	mode_t		st_mode;	/* 16 bits */</div><div class='del'>-	nlink_t		st_nlink;	/* 16 bits */</div><div class='add'>+	unsigned short	st_nlink;	/* 16 bits */</div><div class='ctx'> 	unsigned short	st_reserved1;	/* old st_uid */</div><div class='ctx'> 	unsigned short	st_reserved2;	/* old st_gid */</div><div class='ctx'> 	unsigned int	st_rdev;</div><div class='head'>diff --git a/arch/parisc/include/asm/thread_info.h b/arch/parisc/include/asm/thread_info.h<br/>index 83ae7dd4d99e..22b4726dee49 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/thread_info.h</a></div><div class='hunk'>@@ -74,7 +74,7 @@ struct thread_info {</div><div class='ctx'> #define _TIF_BLOCKSTEP		(1 &lt;&lt; TIF_BLOCKSTEP)</div><div class='ctx'> </div><div class='ctx'> #define _TIF_USER_WORK_MASK     (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | \</div><div class='del'>-                                 _TIF_NEED_RESCHED | _TIF_RESTORE_SIGMASK)</div><div class='add'>+                                 _TIF_NEED_RESCHED)</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/include/asm/uaccess.h b/arch/parisc/include/asm/uaccess.h<br/>index 9ac066086f03..4ba2c93770f1 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/include/asm/uaccess.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/include/asm/uaccess.h</a></div><div class='hunk'>@@ -218,15 +218,14 @@ struct exception_data {</div><div class='ctx'> extern unsigned long lcopy_to_user(void __user *, const void *, unsigned long);</div><div class='ctx'> extern unsigned long lcopy_from_user(void *, const void __user *, unsigned long);</div><div class='ctx'> extern unsigned long lcopy_in_user(void __user *, const void __user *, unsigned long);</div><div class='del'>-extern long lstrncpy_from_user(char *, const char __user *, long);</div><div class='add'>+extern long strncpy_from_user(char *, const char __user *, long);</div><div class='ctx'> extern unsigned lclear_user(void __user *,unsigned long);</div><div class='ctx'> extern long lstrnlen_user(const char __user *,long);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Complex access routines -- macros</div><div class='ctx'>  */</div><div class='add'>+#define user_addr_max() (~0UL)</div><div class='ctx'> </div><div class='del'>-#define strncpy_from_user lstrncpy_from_user</div><div class='ctx'> #define strnlen_user lstrnlen_user</div><div class='ctx'> #define strlen_user(str) lstrnlen_user(str, 0x7fffffffL)</div><div class='ctx'> #define clear_user lclear_user</div><div class='head'>diff --git a/arch/parisc/kernel/Makefile b/arch/parisc/kernel/Makefile<br/>index 67db0722e6ca..66ee3f12df58 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Makefile for arch/parisc/kernel</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y			:= init_task.o head.o vmlinux.lds</div><div class='add'>+extra-y			:= head.o vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y	     	:= cache.o pacache.o setup.o traps.o time.o irq.o \</div><div class='ctx'> 		   pa7300lc.o syscall.o entry.o sys_parisc.o firmware.o \</div><div class='head'>diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S<br/>index 6f0594439143..18670a078849 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/entry.S</a></div><div class='hunk'>@@ -552,7 +552,7 @@</div><div class='ctx'> 	 * entry (identifying the physical page) and %r23 up with</div><div class='ctx'> 	 * the from tlb entry (or nothing if only a to entry---for</div><div class='ctx'> 	 * clear_user_page_asm) */</div><div class='del'>-	.macro		do_alias	spc,tmp,tmp1,va,pte,prot,fault</div><div class='add'>+	.macro		do_alias	spc,tmp,tmp1,va,pte,prot,fault,patype</div><div class='ctx'> 	cmpib,COND(&lt;&gt;),n 0,\spc,\fault</div><div class='ctx'> 	ldil		L%(TMPALIAS_MAP_START),\tmp</div><div class='ctx'> #if defined(CONFIG_64BIT) &amp;&amp; (TMPALIAS_MAP_START &gt;= 0x80000000)</div><div class='hunk'>@@ -581,7 +581,15 @@</div><div class='ctx'> 	 */</div><div class='ctx'> 	cmpiclr,=	0x01,\tmp,%r0</div><div class='ctx'> 	ldi		(_PAGE_DIRTY|_PAGE_READ|_PAGE_WRITE),\prot</div><div class='add'>+.ifc \patype,20</div><div class='ctx'> 	depd,z		\prot,8,7,\prot</div><div class='add'>+.else</div><div class='add'>+.ifc \patype,11</div><div class='add'>+	depw,z		\prot,8,7,\prot</div><div class='add'>+.else</div><div class='add'>+	.error "undefined PA type to do_alias"</div><div class='add'>+.endif</div><div class='add'>+.endif</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * OK, it is in the temp alias region, check whether "from" or "to".</div><div class='ctx'> 	 * Check "subtle" note in pacache.S re: r23/r26.</div><div class='hunk'>@@ -916,7 +924,7 @@ intr_check_sig:</div><div class='ctx'> 	/* As above */</div><div class='ctx'> 	mfctl   %cr30,%r1</div><div class='ctx'> 	LDREG	TI_FLAGS(%r1),%r19</div><div class='del'>-	ldi	(_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK|_TIF_NOTIFY_RESUME), %r20</div><div class='add'>+	ldi	(_TIF_SIGPENDING|_TIF_NOTIFY_RESUME), %r20</div><div class='ctx'> 	and,COND(&lt;&gt;)	%r19, %r20, %r0</div><div class='ctx'> 	b,n	intr_restore	/* skip past if we've nothing to do */</div><div class='ctx'> </div><div class='hunk'>@@ -1185,7 +1193,7 @@ dtlb_miss_20w:</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='ctx'> dtlb_check_alias_20w:</div><div class='del'>-	do_alias	spc,t0,t1,va,pte,prot,dtlb_fault</div><div class='add'>+	do_alias	spc,t0,t1,va,pte,prot,dtlb_fault,20</div><div class='ctx'> </div><div class='ctx'> 	idtlbt          pte,prot</div><div class='ctx'> </div><div class='hunk'>@@ -1209,7 +1217,7 @@ nadtlb_miss_20w:</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='ctx'> nadtlb_check_alias_20w:</div><div class='del'>-	do_alias	spc,t0,t1,va,pte,prot,nadtlb_emulate</div><div class='add'>+	do_alias	spc,t0,t1,va,pte,prot,nadtlb_emulate,20</div><div class='ctx'> </div><div class='ctx'> 	idtlbt          pte,prot</div><div class='ctx'> </div><div class='hunk'>@@ -1241,7 +1249,7 @@ dtlb_miss_11:</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='ctx'> dtlb_check_alias_11:</div><div class='del'>-	do_alias	spc,t0,t1,va,pte,prot,dtlb_fault</div><div class='add'>+	do_alias	spc,t0,t1,va,pte,prot,dtlb_fault,11</div><div class='ctx'> </div><div class='ctx'> 	idtlba          pte,(va)</div><div class='ctx'> 	idtlbp          prot,(va)</div><div class='hunk'>@@ -1273,7 +1281,7 @@ nadtlb_miss_11:</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='ctx'> nadtlb_check_alias_11:</div><div class='del'>-	do_alias	spc,t0,t1,va,pte,prot,nadtlb_emulate</div><div class='add'>+	do_alias	spc,t0,t1,va,pte,prot,nadtlb_emulate,11</div><div class='ctx'> </div><div class='ctx'> 	idtlba          pte,(va)</div><div class='ctx'> 	idtlbp          prot,(va)</div><div class='hunk'>@@ -1300,7 +1308,7 @@ dtlb_miss_20:</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='ctx'> dtlb_check_alias_20:</div><div class='del'>-	do_alias	spc,t0,t1,va,pte,prot,dtlb_fault</div><div class='add'>+	do_alias	spc,t0,t1,va,pte,prot,dtlb_fault,20</div><div class='ctx'> 	</div><div class='ctx'> 	idtlbt          pte,prot</div><div class='ctx'> </div><div class='hunk'>@@ -1326,7 +1334,7 @@ nadtlb_miss_20:</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='ctx'> nadtlb_check_alias_20:</div><div class='del'>-	do_alias	spc,t0,t1,va,pte,prot,nadtlb_emulate</div><div class='add'>+	do_alias	spc,t0,t1,va,pte,prot,nadtlb_emulate,20</div><div class='ctx'> </div><div class='ctx'> 	idtlbt          pte,prot</div><div class='ctx'> </div><div class='hunk'>@@ -1453,7 +1461,7 @@ naitlb_miss_20w:</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='ctx'> naitlb_check_alias_20w:</div><div class='del'>-	do_alias	spc,t0,t1,va,pte,prot,naitlb_fault</div><div class='add'>+	do_alias	spc,t0,t1,va,pte,prot,naitlb_fault,20</div><div class='ctx'> </div><div class='ctx'> 	iitlbt		pte,prot</div><div class='ctx'> </div><div class='hunk'>@@ -1507,7 +1515,7 @@ naitlb_miss_11:</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='ctx'> naitlb_check_alias_11:</div><div class='del'>-	do_alias	spc,t0,t1,va,pte,prot,itlb_fault</div><div class='add'>+	do_alias	spc,t0,t1,va,pte,prot,itlb_fault,11</div><div class='ctx'> </div><div class='ctx'> 	iitlba          pte,(%sr0, va)</div><div class='ctx'> 	iitlbp          prot,(%sr0, va)</div><div class='hunk'>@@ -1553,7 +1561,7 @@ naitlb_miss_20:</div><div class='ctx'> 	nop</div><div class='ctx'> </div><div class='ctx'> naitlb_check_alias_20:</div><div class='del'>-	do_alias	spc,t0,t1,va,pte,prot,naitlb_fault</div><div class='add'>+	do_alias	spc,t0,t1,va,pte,prot,naitlb_fault,20</div><div class='ctx'> </div><div class='ctx'> 	iitlbt          pte,prot</div><div class='ctx'> </div><div class='hunk'>@@ -2024,7 +2032,7 @@ syscall_check_resched:</div><div class='ctx'> 	.import do_signal,code</div><div class='ctx'> syscall_check_sig:</div><div class='ctx'> 	LDREG	TI_FLAGS-THREAD_SZ_ALGN-FRAME_SIZE(%r30),%r19</div><div class='del'>-	ldi	(_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK), %r26</div><div class='add'>+	ldi	(_TIF_SIGPENDING|_TIF_NOTIFY_RESUME), %r26</div><div class='ctx'> 	and,COND(&lt;&gt;)	%r19, %r26, %r0</div><div class='ctx'> 	b,n	syscall_restore	/* skip past if we've nothing to do */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/kernel/init_task.c b/arch/parisc/kernel/init_task.c<br/>deleted file mode 100644<br/>index 4a91e433416f..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,70 +0,0 @@</div><div class='del'>-/* </div><div class='del'>- *    Static declaration of "init" task data structure.</div><div class='del'>- *</div><div class='del'>- *    Copyright (C) 2000 Paul Bame &lt;bame at parisc-linux.org&gt;</div><div class='del'>- *    Copyright (C) 2000-2001 John Marvin &lt;jsm at parisc-linux.org&gt;</div><div class='del'>- *    Copyright (C) 2001 Helge Deller &lt;deller @ parisc-linux.org&gt;</div><div class='del'>- *    Copyright (C) 2002 Matthew Wilcox &lt;willy with parisc-linux.org&gt;</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- *    This program is free software; you can redistribute it and/or modify</div><div class='del'>- *    it under the terms of the GNU General Public License as published by</div><div class='del'>- *    the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- *    (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *    This program is distributed in the hope that it will be useful,</div><div class='del'>- *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *    GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *    You should have received a copy of the GNU General Public License</div><div class='del'>- *    along with this program; if not, write to the Free Software</div><div class='del'>- *    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/pgalloc.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is 16384-byte aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data</div><div class='del'>-	__attribute__((aligned(128))) =</div><div class='del'>-		{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-#if PT_NLEVELS == 3</div><div class='del'>-/* NOTE: This layout exactly conforms to the hybrid L2/L3 page table layout</div><div class='del'>- * with the first pmd adjacent to the pgd and below it. gcc doesn't actually</div><div class='del'>- * guarantee that global objects will be laid out in memory in the same order </div><div class='del'>- * as the order of declaration, so put these in different sections and use</div><div class='del'>- * the linker script to order them. */</div><div class='del'>-pmd_t pmd0[PTRS_PER_PMD] __attribute__ ((__section__ (".data..vm0.pmd"), aligned(PAGE_SIZE)));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__ ((__section__ (".data..vm0.pgd"), aligned(PAGE_SIZE)));</div><div class='del'>-pte_t pg0[PT_INITIAL * PTRS_PER_PTE] __attribute__ ((__section__ (".data..vm0.pte"), aligned(PAGE_SIZE)));</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='del'>-</div><div class='del'>-__asm__(".data");</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='head'>diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S<br/>index 93ff3d90edd1..5d7218ad885c 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/pacache.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/kernel/pacache.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/pacache.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/pacache.S</a></div><div class='hunk'>@@ -692,7 +692,7 @@ ENTRY(flush_icache_page_asm)</div><div class='ctx'> </div><div class='ctx'> 	/* Purge any old translation */</div><div class='ctx'> </div><div class='del'>-	pitlb		(%sr0,%r28)</div><div class='add'>+	pitlb		(%sr4,%r28)</div><div class='ctx'> </div><div class='ctx'> 	ldil		L%icache_stride, %r1</div><div class='ctx'> 	ldw		R%icache_stride(%r1), %r1</div><div class='hunk'>@@ -706,27 +706,29 @@ ENTRY(flush_icache_page_asm)</div><div class='ctx'> 	sub		%r25, %r1, %r25</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-1:      fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='add'>+	/* fic only has the type 26 form on PA1.1, requiring an</div><div class='add'>+	 * explicit space specification, so use %sr4 */</div><div class='add'>+1:      fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='ctx'> 	cmpb,COND(&lt;&lt;)		%r28, %r25,1b</div><div class='del'>-	fic,m		%r1(%r28)</div><div class='add'>+	fic,m		%r1(%sr4,%r28)</div><div class='ctx'> </div><div class='ctx'> 	sync</div><div class='ctx'> 	bv		%r0(%r2)</div><div class='del'>-	pitlb		(%sr0,%r25)</div><div class='add'>+	pitlb		(%sr4,%r25)</div><div class='ctx'> 	.exit</div><div class='ctx'> </div><div class='ctx'> 	.procend</div><div class='head'>diff --git a/arch/parisc/kernel/parisc_ksyms.c b/arch/parisc/kernel/parisc_ksyms.c<br/>index a7bb757a5497..ceec85de6290 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/parisc_ksyms.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/kernel/parisc_ksyms.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/parisc_ksyms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/parisc_ksyms.c</a></div><div class='hunk'>@@ -44,7 +44,6 @@ EXPORT_SYMBOL(__cmpxchg_u64);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='del'>-EXPORT_SYMBOL(lstrncpy_from_user);</div><div class='ctx'> EXPORT_SYMBOL(lclear_user);</div><div class='ctx'> EXPORT_SYMBOL(lstrnlen_user);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/kernel/pdc_cons.c b/arch/parisc/kernel/pdc_cons.c<br/>index 4f004596a6e7..47341aa208f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/pdc_cons.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/kernel/pdc_cons.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/pdc_cons.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/pdc_cons.c</a></div><div class='hunk'>@@ -50,6 +50,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/major.h&gt;</div><div class='ctx'> #include &lt;linux/tty.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;		/* for PAGE0 */</div><div class='ctx'> #include &lt;asm/pdc.h&gt;		/* for iodc_call() proto and friends */</div><div class='ctx'> </div><div class='ctx'> static DEFINE_SPINLOCK(pdc_console_lock);</div><div class='hunk'>@@ -104,7 +105,7 @@ static int pdc_console_tty_open(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> </div><div class='ctx'> static void pdc_console_tty_close(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> {</div><div class='del'>-	if (!tty-&gt;count) {</div><div class='add'>+	if (tty-&gt;count == 1) {</div><div class='ctx'> 		del_timer_sync(&amp;pdc_console_timer);</div><div class='ctx'> 		tty_port_tty_set(&amp;tty_port, NULL);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c<br/>index 12c1ed33dc18..594459bde14e 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/signal.c</a></div><div class='hunk'>@@ -48,9 +48,6 @@</div><div class='ctx'> #define DBG(LEVEL, ...)</div><div class='ctx'> #endif</div><div class='ctx'> 	</div><div class='del'>-</div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> /* gcc will complain if a pointer is cast to an integer of different</div><div class='ctx'>  * size.  If you really need to do this (and we do for an ELF32 user</div><div class='ctx'>  * application in an ELF64 kernel) then you have to do a cast to an</div><div class='hunk'>@@ -109,6 +106,7 @@ sys_rt_sigreturn(struct pt_regs *regs, int in_syscall)</div><div class='ctx'> 		sigframe_size = PARISC_RT_SIGFRAME_SIZE32;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='ctx'> </div><div class='ctx'> 	/* Unwind the user stack to get the rt_sigframe structure. */</div><div class='ctx'> 	frame = (struct rt_sigframe __user *)</div><div class='hunk'>@@ -130,11 +128,7 @@ sys_rt_sigreturn(struct pt_regs *regs, int in_syscall)</div><div class='ctx'> 			goto give_sigsegv;</div><div class='ctx'> 	}</div><div class='ctx'> 		</div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	/* Good thing we saved the old gr[30], eh? */</div><div class='ctx'> #ifdef CONFIG_64BIT</div><div class='hunk'>@@ -445,8 +439,9 @@ give_sigsegv:</div><div class='ctx'> </div><div class='ctx'> static long</div><div class='ctx'> handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='del'>-		sigset_t *oldset, struct pt_regs *regs, int in_syscall)</div><div class='add'>+		struct pt_regs *regs, int in_syscall)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	DBG(1,"handle_signal: sig=%ld, ka=%p, info=%p, oldset=%p, regs=%p\n",</div><div class='ctx'> 	       sig, ka, info, oldset, regs);</div><div class='ctx'> 	</div><div class='hunk'>@@ -454,17 +449,13 @@ handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='ctx'> 	if (!setup_rt_frame(sig, ka, info, oldset, regs, in_syscall))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	sigorsets(&amp;current-&gt;blocked,&amp;current-&gt;blocked,&amp;ka-&gt;sa.sa_mask);</div><div class='del'>-	if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-		sigaddset(&amp;current-&gt;blocked,sig);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	tracehook_signal_handler(sig, info, ka, regs, </div><div class='add'>+	signal_delivered(sig, info, ka, regs, </div><div class='ctx'> 		test_thread_flag(TIF_SINGLESTEP) ||</div><div class='ctx'> 		test_thread_flag(TIF_BLOCKSTEP));</div><div class='ctx'> </div><div class='add'>+	DBG(1,KERN_DEBUG "do_signal: Exit (success), regs-&gt;gr[28] = %ld\n",</div><div class='add'>+		regs-&gt;gr[28]);</div><div class='add'>+</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -474,8 +465,6 @@ syscall_restart(struct pt_regs *regs, struct k_sigaction *ka)</div><div class='ctx'> 	/* Check the return code */</div><div class='ctx'> 	switch (regs-&gt;gr[28]) {</div><div class='ctx'> 	case -ERESTART_RESTARTBLOCK:</div><div class='del'>-		current_thread_info()-&gt;restart_block.fn =</div><div class='del'>-			do_no_restart_syscall;</div><div class='ctx'> 	case -ERESTARTNOHAND:</div><div class='ctx'> 		DBG(1,"ERESTARTNOHAND: returning -EINTR\n");</div><div class='ctx'> 		regs-&gt;gr[28] = -EINTR;</div><div class='hunk'>@@ -577,28 +566,17 @@ do_signal(struct pt_regs *regs, long in_syscall)</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='ctx'> 	int signr;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> </div><div class='del'>-	DBG(1,"\ndo_signal: oldset=0x%p, regs=0x%p, sr7 %#lx, in_syscall=%d\n",</div><div class='del'>-	       oldset, regs, regs-&gt;sr[7], in_syscall);</div><div class='add'>+	DBG(1,"\ndo_signal: regs=0x%p, sr7 %#lx, in_syscall=%d\n",</div><div class='add'>+	       regs, regs-&gt;sr[7], in_syscall);</div><div class='ctx'> </div><div class='ctx'> 	/* Everyone else checks to see if they are in kernel mode at</div><div class='ctx'> 	   this point and exits if that's the case.  I'm not sure why</div><div class='ctx'> 	   we would be called in that case, but for some reason we</div><div class='ctx'> 	   are. */</div><div class='ctx'> </div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-	DBG(1,"do_signal: oldset %08lx / %08lx\n", </div><div class='del'>-		oldset-&gt;sig[0], oldset-&gt;sig[1]);</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> 	/* May need to force signal if handle_signal failed to deliver */</div><div class='ctx'> 	while (1) {</div><div class='del'>-	  </div><div class='ctx'> 		signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 		DBG(3,"do_signal: signr = %d, regs-&gt;gr[28] = %ld\n", signr, regs-&gt;gr[28]); </div><div class='ctx'> 	</div><div class='hunk'>@@ -612,14 +590,8 @@ do_signal(struct pt_regs *regs, long in_syscall)</div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  If the</div><div class='ctx'> 		   delivery failed, we need to continue to iterate in</div><div class='ctx'> 		   this loop so we can deliver the SIGSEGV... */</div><div class='del'>-		if (handle_signal(signr, &amp;info, &amp;ka, oldset,</div><div class='del'>-				  regs, in_syscall)) {</div><div class='del'>-			DBG(1,KERN_DEBUG "do_signal: Exit (success), regs-&gt;gr[28] = %ld\n",</div><div class='del'>-				regs-&gt;gr[28]);</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='add'>+		if (handle_signal(signr, &amp;info, &amp;ka, regs, in_syscall))</div><div class='ctx'> 			return;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* end of while(1) looping forever if we can't force a signal */</div><div class='ctx'> </div><div class='hunk'>@@ -630,24 +602,16 @@ do_signal(struct pt_regs *regs, long in_syscall)</div><div class='ctx'> 	DBG(1,"do_signal: Exit (not delivered), regs-&gt;gr[28] = %ld\n", </div><div class='ctx'> 		regs-&gt;gr[28]);</div><div class='ctx'> </div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return;</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void do_notify_resume(struct pt_regs *regs, long in_syscall)</div><div class='ctx'> {</div><div class='del'>-	if (test_thread_flag(TIF_SIGPENDING) ||</div><div class='del'>-	    test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='add'>+	if (test_thread_flag(TIF_SIGPENDING))</div><div class='ctx'> 		do_signal(regs, in_syscall);</div><div class='ctx'> </div><div class='ctx'> 	if (test_thread_flag(TIF_NOTIFY_RESUME)) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/parisc/kernel/signal32.c b/arch/parisc/kernel/signal32.c<br/>index e14132430762..fd49aeda9eb8 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/signal32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/kernel/signal32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/signal32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/signal32.c</a></div><div class='hunk'>@@ -47,8 +47,6 @@</div><div class='ctx'> #define DBG(LEVEL, ...)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> inline void</div><div class='ctx'> sigset_32to64(sigset_t *s64, compat_sigset_t *s32)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c<br/>index 0bb1d63907f8..a47828d31fe6 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/smp.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='ctx'> #include &lt;asm/current.h&gt;</div><div class='hunk'>@@ -295,8 +296,13 @@ smp_cpu_init(int cpunum)</div><div class='ctx'> </div><div class='ctx'> 		printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum);</div><div class='ctx'> 		machine_halt();</div><div class='del'>-	}  </div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	notify_cpu_starting(cpunum);</div><div class='add'>+</div><div class='add'>+	ipi_call_lock();</div><div class='ctx'> 	set_cpu_online(cpunum, true);</div><div class='add'>+	ipi_call_unlock();</div><div class='ctx'> </div><div class='ctx'> 	/* Initialise the idle task for this CPU */</div><div class='ctx'> 	atomic_inc(&amp;init_mm.mm_count);</div><div class='hunk'>@@ -334,26 +340,11 @@ void __init smp_callin(void)</div><div class='ctx'> /*</div><div class='ctx'>  * Bring one cpu online.</div><div class='ctx'>  */</div><div class='del'>-int __cpuinit smp_boot_one_cpu(int cpuid)</div><div class='add'>+int __cpuinit smp_boot_one_cpu(int cpuid, struct task_struct *idle)</div><div class='ctx'> {</div><div class='ctx'> 	const struct cpuinfo_parisc *p = &amp;per_cpu(cpu_data, cpuid);</div><div class='del'>-	struct task_struct *idle;</div><div class='ctx'> 	long timeout;</div><div class='ctx'> </div><div class='del'>-	/* </div><div class='del'>-	 * Create an idle task for this CPU.  Note the address wed* give </div><div class='del'>-	 * to kernel_thread is irrelevant -- it's going to start</div><div class='del'>-	 * where OS_BOOT_RENDEVZ vector in SAL says to start.  But</div><div class='del'>-	 * this gets all the other task-y sort of data structures set</div><div class='del'>-	 * up like we wish.   We need to pull the just created idle task </div><div class='del'>-	 * off the run queue and stuff it into the init_tasks[] array.  </div><div class='del'>-	 * Sheesh . . .</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	idle = fork_idle(cpuid);</div><div class='del'>-	if (IS_ERR(idle))</div><div class='del'>-		panic("SMP: fork failed for CPU:%d", cpuid);</div><div class='del'>-</div><div class='ctx'> 	task_thread_info(idle)-&gt;cpu = cpuid;</div><div class='ctx'> </div><div class='ctx'> 	/* Let _start know what logical CPU we're booting</div><div class='hunk'>@@ -397,10 +388,6 @@ int __cpuinit smp_boot_one_cpu(int cpuid)</div><div class='ctx'> 		udelay(100);</div><div class='ctx'> 		barrier();</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	put_task_struct(idle);</div><div class='del'>-	idle = NULL;</div><div class='del'>-</div><div class='ctx'> 	printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);</div><div class='ctx'> 	return -1;</div><div class='ctx'> </div><div class='hunk'>@@ -449,10 +436,10 @@ void smp_cpus_done(unsigned int cpu_max)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='ctx'> 	if (cpu != 0 &amp;&amp; cpu &lt; parisc_max_cpus)</div><div class='del'>-		smp_boot_one_cpu(cpu);</div><div class='add'>+		smp_boot_one_cpu(cpu, tidle);</div><div class='ctx'> </div><div class='ctx'> 	return cpu_online(cpu) ? 0 : -ENOSYS;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c<br/>index 7c0774397b89..70e105d62423 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/time.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/param.h&gt;</div><div class='ctx'> #include &lt;asm/pdc.h&gt;</div><div class='ctx'> #include &lt;asm/led.h&gt;</div><div class='head'>diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S<br/>index fa6f2b8163e0..64a999882e4f 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/kernel/vmlinux.lds.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/kernel/vmlinux.lds.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -50,8 +50,10 @@ SECTIONS</div><div class='ctx'> 	. = KERNEL_BINARY_TEXT_START;</div><div class='ctx'> </div><div class='ctx'> 	_text = .;		/* Text and read-only data */</div><div class='del'>-	.text ALIGN(16) : {</div><div class='add'>+	.head ALIGN(16) : {</div><div class='ctx'> 		HEAD_TEXT</div><div class='add'>+	} = 0</div><div class='add'>+	.text ALIGN(16) : {</div><div class='ctx'> 		TEXT_TEXT</div><div class='ctx'> 		SCHED_TEXT</div><div class='ctx'> 		LOCK_TEXT</div><div class='hunk'>@@ -65,7 +67,7 @@ SECTIONS</div><div class='ctx'> 		*(.fixup)</div><div class='ctx'> 		*(.lock.text)		/* out-of-line lock text */</div><div class='ctx'> 		*(.gnu.warning)</div><div class='del'>-	} = 0</div><div class='add'>+	}</div><div class='ctx'> 	/* End of text section */</div><div class='ctx'> 	_etext = .;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/parisc/lib/lusercopy.S b/arch/parisc/lib/lusercopy.S<br/>index 1bd23ccec17b..6f2d9355efe2 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/lib/lusercopy.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/lib/lusercopy.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/lib/lusercopy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/lib/lusercopy.S</a></div><div class='hunk'>@@ -61,47 +61,6 @@</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * long lstrncpy_from_user(char *dst, const char *src, long n)</div><div class='del'>-	 *</div><div class='del'>-	 * Returns -EFAULT if exception before terminator,</div><div class='del'>-	 *         N if the entire buffer filled,</div><div class='del'>-	 *         otherwise strlen (i.e. excludes zero byte)</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-ENTRY(lstrncpy_from_user)</div><div class='del'>-	.proc</div><div class='del'>-	.callinfo NO_CALLS</div><div class='del'>-	.entry</div><div class='del'>-	comib,=     0,%r24,$lsfu_done</div><div class='del'>-	copy        %r24,%r23</div><div class='del'>-	get_sr</div><div class='del'>-1:      ldbs,ma     1(%sr1,%r25),%r1</div><div class='del'>-$lsfu_loop:</div><div class='del'>-	stbs,ma     %r1,1(%r26)</div><div class='del'>-	comib,=,n   0,%r1,$lsfu_done</div><div class='del'>-	addib,&lt;&gt;,n  -1,%r24,$lsfu_loop</div><div class='del'>-2:      ldbs,ma     1(%sr1,%r25),%r1</div><div class='del'>-$lsfu_done:</div><div class='del'>-	sub         %r23,%r24,%r28</div><div class='del'>-$lsfu_exit:</div><div class='del'>-	bv          %r0(%r2)</div><div class='del'>-	nop</div><div class='del'>-	.exit</div><div class='del'>-ENDPROC(lstrncpy_from_user)</div><div class='del'>-</div><div class='del'>-	.section .fixup,"ax"</div><div class='del'>-3:      fixup_branch $lsfu_exit</div><div class='del'>-	ldi         -EFAULT,%r28</div><div class='del'>-	.previous</div><div class='del'>-</div><div class='del'>-	.section __ex_table,"aw"</div><div class='del'>-	ASM_ULONG_INSN 1b,3b</div><div class='del'>-	ASM_ULONG_INSN 2b,3b</div><div class='del'>-	.previous</div><div class='del'>-</div><div class='del'>-	.procend</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * unsigned long lclear_user(void *to, unsigned long n)</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Returns 0 for success.</div><div class='head'>diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c<br/>index 82f364e209fc..3ac462de53a4 100644<br/>--- a/<a href='/drm-misc/tree/arch/parisc/mm/init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/parisc/mm/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/parisc/mm/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/parisc/mm/init.c</a></div><div class='hunk'>@@ -33,6 +33,18 @@</div><div class='ctx'> </div><div class='ctx'> extern int  data_start;</div><div class='ctx'> </div><div class='add'>+#if PT_NLEVELS == 3</div><div class='add'>+/* NOTE: This layout exactly conforms to the hybrid L2/L3 page table layout</div><div class='add'>+ * with the first pmd adjacent to the pgd and below it. gcc doesn't actually</div><div class='add'>+ * guarantee that global objects will be laid out in memory in the same order</div><div class='add'>+ * as the order of declaration, so put these in different sections and use</div><div class='add'>+ * the linker script to order them. */</div><div class='add'>+pmd_t pmd0[PTRS_PER_PMD] __attribute__ ((__section__ (".data..vm0.pmd"), aligned(PAGE_SIZE)));</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__ ((__section__ (".data..vm0.pgd"), aligned(PAGE_SIZE)));</div><div class='add'>+pte_t pg0[PT_INITIAL * PTRS_PER_PTE] __attribute__ ((__section__ (".data..vm0.pte"), aligned(PAGE_SIZE)));</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_DISCONTIGMEM</div><div class='ctx'> struct node_map_data node_data[MAX_NUMNODES] __read_mostly;</div><div class='ctx'> unsigned char pfnnid_map[PFNNID_MAP_MAX] __read_mostly;</div><div class='head'>diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig<br/>index feab3bad6d0f..050cb371a69e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/Kconfig</a></div><div class='hunk'>@@ -27,15 +27,6 @@ config MMU</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='del'>-config GENERIC_CMOS_UPDATE</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='del'>-config GENERIC_TIME_VSYSCALL</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config HAVE_SETUP_PER_CPU_AREA</div><div class='ctx'> 	def_bool PPC64</div><div class='ctx'> </div><div class='hunk'>@@ -87,10 +78,6 @@ config ARCH_HAS_ILOG2_U64</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y if 64BIT</div><div class='ctx'> </div><div class='del'>-config ARCH_HAS_CPU_IDLE_WAIT</div><div class='del'>-	bool</div><div class='del'>-	default y</div><div class='del'>-</div><div class='ctx'> config GENERIC_HWEIGHT</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -141,9 +128,15 @@ config PPC</div><div class='ctx'> 	select IRQ_FORCED_THREADING</div><div class='ctx'> 	select HAVE_RCU_TABLE_FREE if SMP</div><div class='ctx'> 	select HAVE_SYSCALL_TRACEPOINTS</div><div class='del'>-	select HAVE_BPF_JIT if (PPC64 &amp;&amp; NET)</div><div class='add'>+	select HAVE_BPF_JIT if PPC64</div><div class='ctx'> 	select HAVE_ARCH_JUMP_LABEL</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='add'>+	select GENERIC_CMOS_UPDATE</div><div class='add'>+	select GENERIC_TIME_VSYSCALL</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select GENERIC_STRNCPY_FROM_USER</div><div class='add'>+	select GENERIC_STRNLEN_USER</div><div class='ctx'> </div><div class='ctx'> config EARLY_PRINTK</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -284,7 +277,6 @@ config HIGHMEM</div><div class='ctx'> 	bool "High memory support"</div><div class='ctx'> 	depends on PPC32</div><div class='ctx'> </div><div class='del'>-source kernel/time/Kconfig</div><div class='ctx'> source kernel/Kconfig.hz</div><div class='ctx'> source kernel/Kconfig.preempt</div><div class='ctx'> source "fs/Kconfig.binfmt"</div><div class='hunk'>@@ -353,7 +345,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE</div><div class='ctx'> </div><div class='ctx'> config KEXEC</div><div class='ctx'> 	bool "kexec system call (EXPERIMENTAL)"</div><div class='del'>-	depends on (PPC_BOOK3S || FSL_BOOKE || (44x &amp;&amp; !SMP &amp;&amp; !PPC_47x)) &amp;&amp; EXPERIMENTAL</div><div class='add'>+	depends on (PPC_BOOK3S || FSL_BOOKE || (44x &amp;&amp; !SMP)) &amp;&amp; EXPERIMENTAL</div><div class='ctx'> 	help</div><div class='ctx'> 	  kexec is a system call that implements the ability to shutdown your</div><div class='ctx'> 	  current kernel, and to start another kernel.  It is like a reboot</div><div class='hunk'>@@ -370,7 +362,7 @@ config KEXEC</div><div class='ctx'> </div><div class='ctx'> config CRASH_DUMP</div><div class='ctx'> 	bool "Build a kdump crash kernel"</div><div class='del'>-	depends on PPC64 || 6xx || FSL_BOOKE || (44x &amp;&amp; !SMP &amp;&amp; !PPC_47x)</div><div class='add'>+	depends on PPC64 || 6xx || FSL_BOOKE || (44x &amp;&amp; !SMP)</div><div class='ctx'> 	select RELOCATABLE if PPC64 || 44x</div><div class='ctx'> 	select DYNAMIC_MEMSTART if FSL_BOOKE</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile<br/>index 6524c6e21896..950d1f7a5a39 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/Makefile</a></div><div class='hunk'>@@ -69,6 +69,16 @@ LDFLAGS_vmlinux	:= $(LDFLAGS_vmlinux-y)</div><div class='ctx'> </div><div class='ctx'> CFLAGS-$(CONFIG_PPC64)	:= -mminimal-toc -mtraceback=no -mcall-aixdesc</div><div class='ctx'> CFLAGS-$(CONFIG_PPC32)	:= -ffixed-r2 -mmultiple</div><div class='add'>+</div><div class='add'>+CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4)</div><div class='add'>+CFLAGS-$(CONFIG_CELL_CPU) += $(call cc-option,-mcpu=cell)</div><div class='add'>+CFLAGS-$(CONFIG_POWER4_CPU) += $(call cc-option,-mcpu=power4)</div><div class='add'>+CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5)</div><div class='add'>+CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6)</div><div class='add'>+CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7)</div><div class='add'>+</div><div class='add'>+CFLAGS-$(CONFIG_TUNE_CELL) += $(call cc-option,-mtune=cell)</div><div class='add'>+</div><div class='ctx'> KBUILD_CPPFLAGS	+= -Iarch/$(ARCH)</div><div class='ctx'> KBUILD_AFLAGS	+= -Iarch/$(ARCH)</div><div class='ctx'> KBUILD_CFLAGS	+= -msoft-float -pipe -Iarch/$(ARCH) $(CFLAGS-y)</div><div class='hunk'>@@ -76,32 +86,11 @@ CPP		= $(CC) -E $(KBUILD_CFLAGS)</div><div class='ctx'> </div><div class='ctx'> CHECKFLAGS	+= -m$(CONFIG_WORD_SIZE) -D__powerpc__ -D__powerpc$(CONFIG_WORD_SIZE)__</div><div class='ctx'> </div><div class='del'>-ifeq ($(CONFIG_PPC64),y)</div><div class='del'>-GCC_BROKEN_VEC	:= $(call cc-ifversion, -lt, 0400, y)</div><div class='del'>-</div><div class='del'>-ifeq ($(CONFIG_POWER4_ONLY),y)</div><div class='del'>-ifeq ($(CONFIG_ALTIVEC),y)</div><div class='del'>-ifeq ($(GCC_BROKEN_VEC),y)</div><div class='del'>-	KBUILD_CFLAGS += $(call cc-option,-mcpu=970)</div><div class='del'>-else</div><div class='del'>-	KBUILD_CFLAGS += $(call cc-option,-mcpu=power4)</div><div class='del'>-endif</div><div class='del'>-else</div><div class='del'>-	KBUILD_CFLAGS += $(call cc-option,-mcpu=power4)</div><div class='del'>-endif</div><div class='del'>-else</div><div class='del'>-	KBUILD_CFLAGS += $(call cc-option,-mtune=power4)</div><div class='del'>-endif</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o</div><div class='ctx'> </div><div class='del'>-ifeq ($(CONFIG_TUNE_CELL),y)</div><div class='del'>-	KBUILD_CFLAGS += $(call cc-option,-mtune=cell)</div><div class='del'>-endif</div><div class='del'>-</div><div class='del'>-# No AltiVec instruction when building kernel</div><div class='add'>+# No AltiVec or VSX instructions when building kernel</div><div class='ctx'> KBUILD_CFLAGS += $(call cc-option,-mno-altivec)</div><div class='add'>+KBUILD_CFLAGS += $(call cc-option,-mno-vsx)</div><div class='ctx'> </div><div class='ctx'> # No SPE instruction when building kernel</div><div class='ctx'> # (We use all available options to help semi-broken compilers)</div><div class='hunk'>@@ -160,6 +149,7 @@ core-$(CONFIG_KVM) 		+= arch/powerpc/kvm/</div><div class='ctx'> core-$(CONFIG_PERF_EVENTS)	+= arch/powerpc/perf/</div><div class='ctx'> </div><div class='ctx'> drivers-$(CONFIG_OPROFILE)	+= arch/powerpc/oprofile/</div><div class='add'>+drivers-$(CONFIG_CRYPTO_DEV_NX) += drivers/crypto/nx/</div><div class='ctx'> </div><div class='ctx'> # Default to zImage, override when needed</div><div class='ctx'> all: zImage</div><div class='hunk'>@@ -234,10 +224,11 @@ archprepare: checkbin</div><div class='ctx'> # Use the file '.tmp_gas_check' for binutils tests, as gas won't output</div><div class='ctx'> # to stdout and these checks are run even on install targets.</div><div class='ctx'> TOUT	:= .tmp_gas_check</div><div class='del'>-# Ensure this is binutils 2.12.1 (or 2.12.90.0.7) or later for altivec</div><div class='del'>-# instructions.</div><div class='del'>-# gcc-3.4 and binutils-2.14 are a fatal combination.</div><div class='ctx'> </div><div class='add'>+# Check gcc and binutils versions:</div><div class='add'>+# - gcc-3.4 and binutils-2.14 are a fatal combination</div><div class='add'>+# - Require gcc 4.0 or above on 64-bit</div><div class='add'>+# - gcc-4.2.0 has issues compiling modules on 64-bit</div><div class='ctx'> checkbin:</div><div class='ctx'> 	@if test "$(call cc-version)" = "0304" ; then \</div><div class='ctx'> 		if ! /bin/echo mftb 5 | $(AS) -v -mppc -many -o $(TOUT) &gt;/dev/null 2&gt;&amp;1 ; then \</div><div class='hunk'>@@ -247,6 +238,12 @@ checkbin:</div><div class='ctx'> 			false; \</div><div class='ctx'> 		fi ; \</div><div class='ctx'> 	fi</div><div class='add'>+	@if test "$(call cc-version)" -lt "0400" \</div><div class='add'>+	    &amp;&amp; test "x${CONFIG_PPC64}" = "xy" ; then \</div><div class='add'>+                echo -n "Sorry, GCC v4.0 or above is required to build " ; \</div><div class='add'>+                echo "the 64-bit powerpc kernel." ; \</div><div class='add'>+                false ; \</div><div class='add'>+        fi</div><div class='ctx'> 	@if test "$(call cc-fullversion)" = "040200" \</div><div class='ctx'> 	    &amp;&amp; test "x${CONFIG_MODULES}${CONFIG_PPC64}" = "xyy" ; then \</div><div class='ctx'> 		echo -n '*** GCC-4.2.0 cannot compile the 64-bit powerpc ' ; \</div><div class='head'>diff --git a/arch/powerpc/boot/dts/bluestone.dts b/arch/powerpc/boot/dts/bluestone.dts<br/>index 7bda373f10ef..9d4917aebe6b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/bluestone.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/boot/dts/bluestone.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/bluestone.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/boot/dts/bluestone.dts</a></div><div class='hunk'>@@ -373,5 +373,30 @@</div><div class='ctx'> 				0x0 0x0 0x0 0x3 &amp;UIC3 0xe 0x4 /* swizzled int C */</div><div class='ctx'> 				0x0 0x0 0x0 0x4 &amp;UIC3 0xf 0x4 /* swizzled int D */&gt;;</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		MSI: ppc4xx-msi@C10000000 {</div><div class='add'>+			compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";</div><div class='add'>+			reg = &lt; 0xC 0x10000000 0x100</div><div class='add'>+				0xC 0x10000000 0x100&gt;;</div><div class='add'>+			sdr-base = &lt;0x36C&gt;;</div><div class='add'>+			msi-data = &lt;0x00004440&gt;;</div><div class='add'>+			msi-mask = &lt;0x0000ffe0&gt;;</div><div class='add'>+			interrupts =&lt;0 1 2 3 4 5 6 7&gt;;</div><div class='add'>+			interrupt-parent = &lt;&amp;MSI&gt;;</div><div class='add'>+			#interrupt-cells = &lt;1&gt;;</div><div class='add'>+			#address-cells = &lt;0&gt;;</div><div class='add'>+			#size-cells = &lt;0&gt;;</div><div class='add'>+			msi-available-ranges = &lt;0x0 0x100&gt;;</div><div class='add'>+			interrupt-map = &lt;</div><div class='add'>+				0 &amp;UIC3 0x18 1</div><div class='add'>+				1 &amp;UIC3 0x19 1</div><div class='add'>+				2 &amp;UIC3 0x1A 1</div><div class='add'>+				3 &amp;UIC3 0x1B 1</div><div class='add'>+				4 &amp;UIC3 0x1C 1</div><div class='add'>+				5 &amp;UIC3 0x1D 1</div><div class='add'>+				6 &amp;UIC3 0x1E 1</div><div class='add'>+				7 &amp;UIC3 0x1F 1</div><div class='add'>+			&gt;;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts b/arch/powerpc/boot/dts/mpc8569mds.dts<br/>index 7e283c891b7f..fe0d60935e9b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/boot/dts/mpc8569mds.dts?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/boot/dts/mpc8569mds.dts</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/boot/dts/mpc8569mds.dts?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/boot/dts/mpc8569mds.dts</a></div><div class='hunk'>@@ -119,6 +119,7 @@</div><div class='ctx'> 		sdhc@2e000 {</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 			sdhci,1-bit-only;</div><div class='add'>+			bus-width = &lt;1&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		par_io@e0100 {</div><div class='head'>diff --git a/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig b/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig<br/>index 0db9ba0423ff..c09598b31de1 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig</a></div><div class='hunk'>@@ -100,6 +100,7 @@ CONFIG_SND_MIXER_OSS=y</div><div class='ctx'> CONFIG_SND_PCM_OSS=y</div><div class='ctx'> # CONFIG_SND_SUPPORT_OLD_API is not set</div><div class='ctx'> CONFIG_SND_SOC=y</div><div class='add'>+CONFIG_SND_POWERPC_SOC=y</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_CMOS=y</div><div class='ctx'> CONFIG_EXT2_FS=y</div><div class='head'>diff --git a/arch/powerpc/configs/chroma_defconfig b/arch/powerpc/configs/chroma_defconfig<br/>index f104ccde6b53..b1f9597fe312 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/chroma_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/configs/chroma_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/chroma_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/chroma_defconfig</a></div><div class='hunk'>@@ -32,7 +32,7 @@ CONFIG_RD_LZMA=y</div><div class='ctx'> CONFIG_INITRAMFS_COMPRESSION_GZIP=y</div><div class='ctx'> CONFIG_KALLSYMS_ALL=y</div><div class='ctx'> CONFIG_EMBEDDED=y</div><div class='del'>-CONFIG_PERF_COUNTERS=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='ctx'> CONFIG_OPROFILE=y</div><div class='ctx'> CONFIG_KPROBES=y</div><div class='head'>diff --git a/arch/powerpc/configs/g5_defconfig b/arch/powerpc/configs/g5_defconfig<br/>index 1196c34163b7..07b7f2af2dca 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/g5_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/configs/g5_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/g5_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/g5_defconfig</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='ctx'> CONFIG_PPC64=y</div><div class='del'>-CONFIG_POWER4_ONLY=y</div><div class='ctx'> CONFIG_ALTIVEC=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> CONFIG_NR_CPUS=4</div><div class='head'>diff --git a/arch/powerpc/configs/gamecube_defconfig b/arch/powerpc/configs/gamecube_defconfig<br/>index e74d3a483705..9ef2cc13e1b4 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/gamecube_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/configs/gamecube_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/gamecube_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/gamecube_defconfig</a></div><div class='hunk'>@@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-CONFIG_PERF_COUNTERS=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='ctx'> # CONFIG_VM_EVENT_COUNTERS is not set</div><div class='ctx'> CONFIG_SLAB=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='head'>diff --git a/arch/powerpc/configs/maple_defconfig b/arch/powerpc/configs/maple_defconfig<br/>index 2244d370f24d..02ac96b679b8 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/maple_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/configs/maple_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/maple_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/maple_defconfig</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='ctx'> CONFIG_PPC64=y</div><div class='del'>-CONFIG_POWER4_ONLY=y</div><div class='ctx'> CONFIG_SMP=y</div><div class='ctx'> CONFIG_NR_CPUS=4</div><div class='ctx'> CONFIG_EXPERIMENTAL=y</div><div class='head'>diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig<br/>index d6b6df5e8743..62bb723c5b54 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/mpc85xx_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/configs/mpc85xx_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/mpc85xx_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/mpc85xx_defconfig</a></div><div class='hunk'>@@ -141,6 +141,7 @@ CONFIG_SND_INTEL8X0=y</div><div class='ctx'> # CONFIG_SND_PPC is not set</div><div class='ctx'> # CONFIG_SND_USB is not set</div><div class='ctx'> CONFIG_SND_SOC=y</div><div class='add'>+CONFIG_SND_POWERPC_SOC=y</div><div class='ctx'> CONFIG_HID_A4TECH=y</div><div class='ctx'> CONFIG_HID_APPLE=y</div><div class='ctx'> CONFIG_HID_BELKIN=y</div><div class='head'>diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig<br/>index 5b0e2926becd..d1828427ae55 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/mpc85xx_smp_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/configs/mpc85xx_smp_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/mpc85xx_smp_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/mpc85xx_smp_defconfig</a></div><div class='hunk'>@@ -143,6 +143,7 @@ CONFIG_SND_INTEL8X0=y</div><div class='ctx'> # CONFIG_SND_PPC is not set</div><div class='ctx'> # CONFIG_SND_USB is not set</div><div class='ctx'> CONFIG_SND_SOC=y</div><div class='add'>+CONFIG_SND_POWERPC_SOC=y</div><div class='ctx'> CONFIG_HID_A4TECH=y</div><div class='ctx'> CONFIG_HID_APPLE=y</div><div class='ctx'> CONFIG_HID_BELKIN=y</div><div class='head'>diff --git a/arch/powerpc/configs/pasemi_defconfig b/arch/powerpc/configs/pasemi_defconfig<br/>index f4deb0b78cf0..840a2c2d0430 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/pasemi_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/configs/pasemi_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/pasemi_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/pasemi_defconfig</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='ctx'> CONFIG_PPC64=y</div><div class='del'>-CONFIG_POWER4_ONLY=y</div><div class='ctx'> CONFIG_ALTIVEC=y</div><div class='ctx'> # CONFIG_VIRT_CPU_ACCOUNTING is not set</div><div class='ctx'> CONFIG_SMP=y</div><div class='head'>diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig<br/>index ded867871e97..c2f4b4a86ece 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/ps3_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/configs/ps3_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/ps3_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/ps3_defconfig</a></div><div class='hunk'>@@ -6,7 +6,6 @@ CONFIG_NR_CPUS=2</div><div class='ctx'> CONFIG_EXPERIMENTAL=y</div><div class='ctx'> CONFIG_SYSVIPC=y</div><div class='ctx'> CONFIG_POSIX_MQUEUE=y</div><div class='del'>-CONFIG_SPARSE_IRQ=y</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> CONFIG_EMBEDDED=y</div><div class='hunk'>@@ -25,7 +24,6 @@ CONFIG_PS3_DISK=y</div><div class='ctx'> CONFIG_PS3_ROM=y</div><div class='ctx'> CONFIG_PS3_FLASH=y</div><div class='ctx'> CONFIG_PS3_VRAM=m</div><div class='del'>-CONFIG_PS3_LPM=m</div><div class='ctx'> # CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set</div><div class='ctx'> CONFIG_HIGH_RES_TIMERS=y</div><div class='ctx'> # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='hunk'>@@ -53,8 +51,6 @@ CONFIG_IP_PNP_DHCP=y</div><div class='ctx'> # CONFIG_INET_DIAG is not set</div><div class='ctx'> CONFIG_IPV6=y</div><div class='ctx'> CONFIG_BT=m</div><div class='del'>-CONFIG_BT_L2CAP=y</div><div class='del'>-CONFIG_BT_SCO=y</div><div class='ctx'> CONFIG_BT_RFCOMM=m</div><div class='ctx'> CONFIG_BT_RFCOMM_TTY=y</div><div class='ctx'> CONFIG_BT_BNEP=m</div><div class='hunk'>@@ -63,7 +59,6 @@ CONFIG_BT_BNEP_PROTO_FILTER=y</div><div class='ctx'> CONFIG_BT_HIDP=m</div><div class='ctx'> CONFIG_BT_HCIBTUSB=m</div><div class='ctx'> CONFIG_CFG80211=m</div><div class='del'>-# CONFIG_WIRELESS_EXT_SYSFS is not set</div><div class='ctx'> CONFIG_MAC80211=m</div><div class='ctx'> CONFIG_MAC80211_RC_PID=y</div><div class='ctx'> # CONFIG_MAC80211_RC_MINSTREL is not set</div><div class='hunk'>@@ -181,7 +176,6 @@ CONFIG_DEBUG_INFO=y</div><div class='ctx'> CONFIG_DEBUG_WRITECOUNT=y</div><div class='ctx'> CONFIG_DEBUG_MEMORY_INIT=y</div><div class='ctx'> CONFIG_DEBUG_LIST=y</div><div class='del'>-CONFIG_SYSCTL_SYSCALL_CHECK=y</div><div class='ctx'> # CONFIG_FTRACE is not set</div><div class='ctx'> CONFIG_DEBUG_STACKOVERFLOW=y</div><div class='ctx'> CONFIG_CRYPTO_CCM=m</div><div class='head'>diff --git a/arch/powerpc/configs/wii_defconfig b/arch/powerpc/configs/wii_defconfig<br/>index 175295fbf4f3..1e2b7d062aa4 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/configs/wii_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/configs/wii_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/configs/wii_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/configs/wii_defconfig</a></div><div class='hunk'>@@ -9,7 +9,7 @@ CONFIG_BLK_DEV_INITRD=y</div><div class='ctx'> # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='ctx'> # CONFIG_ELF_CORE is not set</div><div class='del'>-CONFIG_PERF_COUNTERS=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='ctx'> # CONFIG_VM_EVENT_COUNTERS is not set</div><div class='ctx'> CONFIG_SLAB=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='head'>diff --git a/arch/powerpc/include/asm/asm-compat.h b/arch/powerpc/include/asm/asm-compat.h<br/>index decad950f11a..5d7fbe1950f9 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/asm-compat.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/asm-compat.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/asm-compat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/asm-compat.h</a></div><div class='hunk'>@@ -29,18 +29,9 @@</div><div class='ctx'> #define PPC_LLARX(t, a, b, eh)	PPC_LDARX(t, a, b, eh)</div><div class='ctx'> #define PPC_STLCX	stringify_in_c(stdcx.)</div><div class='ctx'> #define PPC_CNTLZL	stringify_in_c(cntlzd)</div><div class='add'>+#define PPC_MTOCRF(FXM, RS) MTOCRF((FXM), (RS))</div><div class='ctx'> #define PPC_LR_STKOFF	16</div><div class='ctx'> #define PPC_MIN_STKFRM	112</div><div class='del'>-</div><div class='del'>-/* Move to CR, single-entry optimized version. Only available</div><div class='del'>- * on POWER4 and later.</div><div class='del'>- */</div><div class='del'>-#ifdef CONFIG_POWER4_ONLY</div><div class='del'>-#define PPC_MTOCRF	stringify_in_c(mtocrf)</div><div class='del'>-#else</div><div class='del'>-#define PPC_MTOCRF	stringify_in_c(mtcrf)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #else /* 32-bit */</div><div class='ctx'> </div><div class='ctx'> /* operations for longs and pointers */</div><div class='head'>diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h<br/>index b9219e99bd2a..50d82c8a037f 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/cputable.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/cputable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/cputable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/cputable.h</a></div><div class='hunk'>@@ -168,6 +168,7 @@ extern const char *powerpc_base_platform;</div><div class='ctx'> #define CPU_FTR_LWSYNC			ASM_CONST(0x0000000008000000)</div><div class='ctx'> #define CPU_FTR_NOEXECUTE		ASM_CONST(0x0000000010000000)</div><div class='ctx'> #define CPU_FTR_INDEXED_DCR		ASM_CONST(0x0000000020000000)</div><div class='add'>+#define CPU_FTR_EMB_HV			ASM_CONST(0x0000000040000000)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Add the 64-bit processor unique features in the top half of the word;</div><div class='hunk'>@@ -376,7 +377,8 @@ extern const char *powerpc_base_platform;</div><div class='ctx'> #define CPU_FTRS_47X	(CPU_FTRS_440x6)</div><div class='ctx'> #define CPU_FTRS_E200	(CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \</div><div class='ctx'> 	    CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \</div><div class='del'>-	    CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE)</div><div class='add'>+	    CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE | \</div><div class='add'>+	    CPU_FTR_DEBUG_LVL_EXC)</div><div class='ctx'> #define CPU_FTRS_E500	(CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \</div><div class='ctx'> 	    CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \</div><div class='ctx'> 	    CPU_FTR_NOEXECUTE)</div><div class='hunk'>@@ -385,15 +387,15 @@ extern const char *powerpc_base_platform;</div><div class='ctx'> 	    CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)</div><div class='ctx'> #define CPU_FTRS_E500MC	(CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \</div><div class='ctx'> 	    CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \</div><div class='del'>-	    CPU_FTR_DBELL)</div><div class='add'>+	    CPU_FTR_DBELL | CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)</div><div class='ctx'> #define CPU_FTRS_E5500	(CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \</div><div class='ctx'> 	    CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \</div><div class='ctx'> 	    CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \</div><div class='del'>-	    CPU_FTR_DEBUG_LVL_EXC)</div><div class='add'>+	    CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)</div><div class='ctx'> #define CPU_FTRS_E6500	(CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \</div><div class='ctx'> 	    CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \</div><div class='ctx'> 	    CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \</div><div class='del'>-	    CPU_FTR_DEBUG_LVL_EXC)</div><div class='add'>+	    CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)</div><div class='ctx'> #define CPU_FTRS_GENERIC_32	(CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)</div><div class='ctx'> </div><div class='ctx'> /* 64-bit CPUs */</div><div class='hunk'>@@ -486,8 +488,10 @@ enum {</div><div class='ctx'> 	    CPU_FTRS_E200 |</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_E500</div><div class='del'>-	    CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC |</div><div class='del'>-	    CPU_FTRS_E5500 | CPU_FTRS_E6500 |</div><div class='add'>+	    CPU_FTRS_E500 | CPU_FTRS_E500_2 |</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_PPC_E500MC</div><div class='add'>+	    CPU_FTRS_E500MC | CPU_FTRS_E5500 | CPU_FTRS_E6500 |</div><div class='ctx'> #endif</div><div class='ctx'> 	    0,</div><div class='ctx'> };</div><div class='hunk'>@@ -531,9 +535,12 @@ enum {</div><div class='ctx'> 	    CPU_FTRS_E200 &amp;</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_E500</div><div class='del'>-	    CPU_FTRS_E500 &amp; CPU_FTRS_E500_2 &amp; CPU_FTRS_E500MC &amp;</div><div class='del'>-	    CPU_FTRS_E5500 &amp; CPU_FTRS_E6500 &amp;</div><div class='add'>+	    CPU_FTRS_E500 &amp; CPU_FTRS_E500_2 &amp;</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_PPC_E500MC</div><div class='add'>+	    CPU_FTRS_E500MC &amp; CPU_FTRS_E5500 &amp; CPU_FTRS_E6500 &amp;</div><div class='ctx'> #endif</div><div class='add'>+	    ~CPU_FTR_EMB_HV &amp;	/* can be removed at runtime */</div><div class='ctx'> 	    CPU_FTRS_POSSIBLE,</div><div class='ctx'> };</div><div class='ctx'> #endif /* __powerpc64__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/cputhreads.h b/arch/powerpc/include/asm/cputhreads.h<br/>index ce516e5eb0d3..ac3eedb9b74a 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/cputhreads.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/cputhreads.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/cputhreads.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/cputhreads.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'>  * Note: This implementation is limited to a power of 2 number of</div><div class='ctx'>  * threads per core and the same number for each core in the system</div><div class='ctx'>  * (though it would work if some processors had less threads as long</div><div class='del'>- * as the CPU numbers are still allocated, just not brought offline).</div><div class='add'>+ * as the CPU numbers are still allocated, just not brought online).</div><div class='ctx'>  *</div><div class='ctx'>  * However, the API allows for a different implementation in the future</div><div class='ctx'>  * if needed, as long as you only use the functions and not the variables</div><div class='head'>diff --git a/arch/powerpc/include/asm/dbell.h b/arch/powerpc/include/asm/dbell.h<br/>index efa74ac44a35..154c067761b1 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/dbell.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/dbell.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/dbell.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/dbell.h</a></div><div class='hunk'>@@ -19,6 +19,9 @@</div><div class='ctx'> </div><div class='ctx'> #define PPC_DBELL_MSG_BRDCAST	(0x04000000)</div><div class='ctx'> #define PPC_DBELL_TYPE(x)	(((x) &amp; 0xf) &lt;&lt; (63-36))</div><div class='add'>+#define PPC_DBELL_TYPE_MASK	PPC_DBELL_TYPE(0xf)</div><div class='add'>+#define PPC_DBELL_LPID(x)	((x) &lt;&lt; (63 - 49))</div><div class='add'>+#define PPC_DBELL_PIR_MASK	0x3fff</div><div class='ctx'> enum ppc_dbell {</div><div class='ctx'> 	PPC_DBELL = 0,		/* doorbell */</div><div class='ctx'> 	PPC_DBELL_CRIT = 1,	/* critical doorbell */</div><div class='head'>diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h<br/>index 548da3aa0a30..d58fc4e4149c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/exception-64s.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/exception-64s.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/exception-64s.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/exception-64s.h</a></div><div class='hunk'>@@ -288,13 +288,6 @@ label##_hv:								\</div><div class='ctx'> /* Exception addition: Hard disable interrupts */</div><div class='ctx'> #define DISABLE_INTS	SOFT_DISABLE_INTS(r10,r11)</div><div class='ctx'> </div><div class='del'>-/* Exception addition: Keep interrupt state */</div><div class='del'>-#define ENABLE_INTS				\</div><div class='del'>-	ld	r11,PACAKMSR(r13);		\</div><div class='del'>-	ld	r12,_MSR(r1);			\</div><div class='del'>-	rlwimi	r11,r12,0,MSR_EE;		\</div><div class='del'>-	mtmsrd	r11,1</div><div class='del'>-</div><div class='ctx'> #define ADD_NVGPRS				\</div><div class='ctx'> 	bl	.save_nvgprs</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h<br/>index 38762edb5e58..b3799d88ffcf 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/gpio.h</a></div><div class='hunk'>@@ -1,53 +1,4 @@</div><div class='del'>-/*</div><div class='del'>- * Generic GPIO API implementation for PowerPC.</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2007-2008  MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * Author: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_POWERPC_GPIO_H</div><div class='del'>-#define __ASM_POWERPC_GPIO_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;asm-generic/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_GPIOLIB</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We don't (yet) implement inlined/rapid versions for on-chip gpios.</div><div class='del'>- * Just call gpiolib.</div><div class='del'>- */</div><div class='del'>-static inline int gpio_get_value(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_get_value(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void gpio_set_value(unsigned int gpio, int value)</div><div class='del'>-{</div><div class='del'>-	__gpio_set_value(gpio, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_cansleep(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_cansleep(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_to_irq(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_to_irq(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int irq_to_gpio(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_GPIOLIB */</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_POWERPC_GPIO_H */</div><div class='add'>+#ifndef __LINUX_GPIO_H</div><div class='add'>+#warning Include linux/gpio.h instead of asm/gpio.h</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h<br/>index 1c324ff55ea8..423cf9eaf4a4 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/hvcall.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/hvcall.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/hvcall.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/hvcall.h</a></div><div class='hunk'>@@ -77,8 +77,27 @@</div><div class='ctx'> #define H_MR_CONDITION  -43</div><div class='ctx'> #define H_NOT_ENOUGH_RESOURCES -44</div><div class='ctx'> #define H_R_STATE       -45</div><div class='del'>-#define H_RESCINDEND    -46</div><div class='del'>-#define H_MULTI_THREADS_ACTIVE -9005</div><div class='add'>+#define H_RESCINDED     -46</div><div class='add'>+#define H_P2		-55</div><div class='add'>+#define H_P3		-56</div><div class='add'>+#define H_P4		-57</div><div class='add'>+#define H_P5		-58</div><div class='add'>+#define H_P6		-59</div><div class='add'>+#define H_P7		-60</div><div class='add'>+#define H_P8		-61</div><div class='add'>+#define H_P9		-62</div><div class='add'>+#define H_TOO_BIG	-64</div><div class='add'>+#define H_OVERLAP	-68</div><div class='add'>+#define H_INTERRUPT	-69</div><div class='add'>+#define H_BAD_DATA	-70</div><div class='add'>+#define H_NOT_ACTIVE	-71</div><div class='add'>+#define H_SG_LIST	-72</div><div class='add'>+#define H_OP_MODE	-73</div><div class='add'>+#define H_COP_HW	-74</div><div class='add'>+#define H_UNSUPPORTED_FLAG_START	-256</div><div class='add'>+#define H_UNSUPPORTED_FLAG_END		-511</div><div class='add'>+#define H_MULTI_THREADS_ACTIVE	-9005</div><div class='add'>+#define H_OUTSTANDING_COP_OPS	-9006</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* Long Busy is a condition that can be returned by the firmware</div><div class='hunk'>@@ -114,6 +133,16 @@</div><div class='ctx'> #define H_PP1			(1UL&lt;&lt;(63-62))</div><div class='ctx'> #define H_PP2			(1UL&lt;&lt;(63-63))</div><div class='ctx'> </div><div class='add'>+/* Flags for H_REGISTER_VPA subfunction field */</div><div class='add'>+#define H_VPA_FUNC_SHIFT	(63-18)	/* Bit posn of subfunction code */</div><div class='add'>+#define H_VPA_FUNC_MASK		7UL</div><div class='add'>+#define H_VPA_REG_VPA		1UL	/* Register Virtual Processor Area */</div><div class='add'>+#define H_VPA_REG_DTL		2UL	/* Register Dispatch Trace Log */</div><div class='add'>+#define H_VPA_REG_SLB		3UL	/* Register SLB shadow buffer */</div><div class='add'>+#define H_VPA_DEREG_VPA		5UL	/* Deregister Virtual Processor Area */</div><div class='add'>+#define H_VPA_DEREG_DTL		6UL	/* Deregister Dispatch Trace Log */</div><div class='add'>+#define H_VPA_DEREG_SLB		7UL	/* Deregister SLB shadow buffer */</div><div class='add'>+</div><div class='ctx'> /* VASI States */</div><div class='ctx'> #define H_VASI_INVALID          0</div><div class='ctx'> #define H_VASI_ENABLED          1</div><div class='hunk'>@@ -240,6 +269,8 @@</div><div class='ctx'> #define H_GET_MPP		0x2D4</div><div class='ctx'> #define H_HOME_NODE_ASSOCIATIVITY 0x2EC</div><div class='ctx'> #define H_BEST_ENERGY		0x2F4</div><div class='add'>+#define H_RANDOM		0x300</div><div class='add'>+#define H_COP			0x304</div><div class='ctx'> #define H_GET_MPP_X		0x314</div><div class='ctx'> #define MAX_HCALL_OPCODE	H_GET_MPP_X</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h<br/>index 51010bfc792e..c9aac24b02e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/hw_irq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/hw_irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/hw_irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/hw_irq.h</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> extern void __replay_interrupt(unsigned int vector);</div><div class='ctx'> </div><div class='ctx'> extern void timer_interrupt(struct pt_regs *);</div><div class='add'>+extern void performance_monitor_exception(struct pt_regs *regs);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> #include &lt;asm/paca.h&gt;</div><div class='head'>diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h<br/>index e648af92ced1..0e40843a1c6e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/irq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/irq.h</a></div><div class='hunk'>@@ -18,10 +18,6 @@</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/* Define a way to iterate across irqs. */</div><div class='del'>-#define for_each_irq(i) \</div><div class='del'>-	for ((i) = 0; (i) &lt; NR_IRQS; ++(i))</div><div class='del'>-</div><div class='ctx'> extern atomic_t ppc_n_lost_interrupts;</div><div class='ctx'> </div><div class='ctx'> /* This number is used when no interrupt has been assigned */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h<br/>index b921c3f48928..1bea4d8ea6f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/kvm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm.h</a></div><div class='hunk'>@@ -277,6 +277,7 @@ struct kvm_sync_regs {</div><div class='ctx'> #define KVM_CPU_E500V2		2</div><div class='ctx'> #define KVM_CPU_3S_32		3</div><div class='ctx'> #define KVM_CPU_3S_64		4</div><div class='add'>+#define KVM_CPU_E500MC		5</div><div class='ctx'> </div><div class='ctx'> /* for KVM_CAP_SPAPR_TCE */</div><div class='ctx'> struct kvm_create_spapr_tce {</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h<br/>index 7b1f0e0fc653..76fdcfef0889 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_asm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/kvm_asm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_asm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_asm.h</a></div><div class='hunk'>@@ -20,6 +20,16 @@</div><div class='ctx'> #ifndef __POWERPC_KVM_ASM_H__</div><div class='ctx'> #define __POWERPC_KVM_ASM_H__</div><div class='ctx'> </div><div class='add'>+#ifdef __ASSEMBLY__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='add'>+#define PPC_STD(sreg, offset, areg)  std sreg, (offset)(areg)</div><div class='add'>+#define PPC_LD(treg, offset, areg)   ld treg, (offset)(areg)</div><div class='add'>+#else</div><div class='add'>+#define PPC_STD(sreg, offset, areg)  stw sreg, (offset+4)(areg)</div><div class='add'>+#define PPC_LD(treg, offset, areg)   lwz treg, (offset+4)(areg)</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* IVPR must be 64KiB-aligned. */</div><div class='ctx'> #define VCPU_SIZE_ORDER 4</div><div class='ctx'> #define VCPU_SIZE_LOG   (VCPU_SIZE_ORDER + 12)</div><div class='hunk'>@@ -48,6 +58,14 @@</div><div class='ctx'> #define BOOKE_INTERRUPT_SPE_FP_DATA 33</div><div class='ctx'> #define BOOKE_INTERRUPT_SPE_FP_ROUND 34</div><div class='ctx'> #define BOOKE_INTERRUPT_PERFORMANCE_MONITOR 35</div><div class='add'>+#define BOOKE_INTERRUPT_DOORBELL 36</div><div class='add'>+#define BOOKE_INTERRUPT_DOORBELL_CRITICAL 37</div><div class='add'>+</div><div class='add'>+/* booke_hv */</div><div class='add'>+#define BOOKE_INTERRUPT_GUEST_DBELL 38</div><div class='add'>+#define BOOKE_INTERRUPT_GUEST_DBELL_CRIT 39</div><div class='add'>+#define BOOKE_INTERRUPT_HV_SYSCALL 40</div><div class='add'>+#define BOOKE_INTERRUPT_HV_PRIV 41</div><div class='ctx'> </div><div class='ctx'> /* book3s */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h<br/>index aa795ccef294..f0e0c6a66d97 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_book3s.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/kvm_book3s.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_book3s.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_book3s.h</a></div><div class='hunk'>@@ -81,12 +81,13 @@ struct kvmppc_vcpu_book3s {</div><div class='ctx'> 	u64 sdr1;</div><div class='ctx'> 	u64 hior;</div><div class='ctx'> 	u64 msr_mask;</div><div class='del'>-	u64 vsid_next;</div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S_32</div><div class='ctx'> 	u32 vsid_pool[VSID_POOL_SIZE];</div><div class='add'>+	u32 vsid_next;</div><div class='ctx'> #else</div><div class='del'>-	u64 vsid_first;</div><div class='del'>-	u64 vsid_max;</div><div class='add'>+	u64 proto_vsid_first;</div><div class='add'>+	u64 proto_vsid_max;</div><div class='add'>+	u64 proto_vsid_next;</div><div class='ctx'> #endif</div><div class='ctx'> 	int context_id[SID_CONTEXTS];</div><div class='ctx'> </div><div class='hunk'>@@ -452,4 +453,7 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> #define INS_DCBZ			0x7c0007ec</div><div class='ctx'> </div><div class='add'>+/* LPIDs we support with this build -- runtime limit may be lower */</div><div class='add'>+#define KVMPPC_NR_LPIDS			(LPID_RSVD + 1)</div><div class='add'>+</div><div class='ctx'> #endif /* __ASM_KVM_BOOK3S_H__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h b/arch/powerpc/include/asm/kvm_book3s_asm.h<br/>index 1f2f5b6156bd..88609b23b775 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_book3s_asm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/kvm_book3s_asm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_book3s_asm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_book3s_asm.h</a></div><div class='hunk'>@@ -79,6 +79,9 @@ struct kvmppc_host_state {</div><div class='ctx'> 	u8 napping;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KVM_BOOK3S_64_HV</div><div class='add'>+	u8 hwthread_req;</div><div class='add'>+	u8 hwthread_state;</div><div class='add'>+</div><div class='ctx'> 	struct kvm_vcpu *kvm_vcpu;</div><div class='ctx'> 	struct kvmppc_vcore *kvm_vcore;</div><div class='ctx'> 	unsigned long xics_phys;</div><div class='hunk'>@@ -122,4 +125,9 @@ struct kvmppc_book3s_shadow_vcpu {</div><div class='ctx'> </div><div class='ctx'> #endif /*__ASSEMBLY__ */</div><div class='ctx'> </div><div class='add'>+/* Values for kvm_state */</div><div class='add'>+#define KVM_HWTHREAD_IN_KERNEL	0</div><div class='add'>+#define KVM_HWTHREAD_IN_NAP	1</div><div class='add'>+#define KVM_HWTHREAD_IN_KVM	2</div><div class='add'>+</div><div class='ctx'> #endif /* __ASM_KVM_BOOK3S_ASM_H__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_booke.h b/arch/powerpc/include/asm/kvm_booke.h<br/>index a90e09188777..b7cd3356a532 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_booke.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/kvm_booke.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_booke.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_booke.h</a></div><div class='hunk'>@@ -23,6 +23,9 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> </div><div class='add'>+/* LPIDs we support with this build -- runtime limit may be lower */</div><div class='add'>+#define KVMPPC_NR_LPIDS                        64</div><div class='add'>+</div><div class='ctx'> static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)</div><div class='ctx'> {</div><div class='ctx'> 	vcpu-&gt;arch.gpr[num] = val;</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_booke_hv_asm.h b/arch/powerpc/include/asm/kvm_booke_hv_asm.h<br/>new file mode 100644<br/>index 000000000000..30a600fa1b6a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_booke_hv_asm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_booke_hv_asm.h</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2010-2011 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License, version 2, as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef ASM_KVM_BOOKE_HV_ASM_H</div><div class='add'>+#define ASM_KVM_BOOKE_HV_ASM_H</div><div class='add'>+</div><div class='add'>+#ifdef __ASSEMBLY__</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * All exceptions from guest state must go through KVM</div><div class='add'>+ * (except for those which are delivered directly to the guest) --</div><div class='add'>+ * there are no exceptions for which we fall through directly to</div><div class='add'>+ * the normal host handler.</div><div class='add'>+ *</div><div class='add'>+ * Expected inputs (normal exceptions):</div><div class='add'>+ *   SCRATCH0 = saved r10</div><div class='add'>+ *   r10 = thread struct</div><div class='add'>+ *   r11 = appropriate SRR1 variant (currently used as scratch)</div><div class='add'>+ *   r13 = saved CR</div><div class='add'>+ *   *(r10 + THREAD_NORMSAVE(0)) = saved r11</div><div class='add'>+ *   *(r10 + THREAD_NORMSAVE(2)) = saved r13</div><div class='add'>+ *</div><div class='add'>+ * Expected inputs (crit/mcheck/debug exceptions):</div><div class='add'>+ *   appropriate SCRATCH = saved r8</div><div class='add'>+ *   r8 = exception level stack frame</div><div class='add'>+ *   r9 = *(r8 + _CCR) = saved CR</div><div class='add'>+ *   r11 = appropriate SRR1 variant (currently used as scratch)</div><div class='add'>+ *   *(r8 + GPR9) = saved r9</div><div class='add'>+ *   *(r8 + GPR10) = saved r10 (r10 not yet clobbered)</div><div class='add'>+ *   *(r8 + GPR11) = saved r11</div><div class='add'>+ */</div><div class='add'>+.macro DO_KVM intno srr1</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+BEGIN_FTR_SECTION</div><div class='add'>+	mtocrf	0x80, r11	/* check MSR[GS] without clobbering reg */</div><div class='add'>+	bf	3, kvmppc_resume_\intno\()_\srr1</div><div class='add'>+	b	kvmppc_handler_\intno\()_\srr1</div><div class='add'>+kvmppc_resume_\intno\()_\srr1:</div><div class='add'>+END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)</div><div class='add'>+#endif</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+#endif /*__ASSEMBLY__ */</div><div class='add'>+#endif /* ASM_KVM_BOOKE_HV_ASM_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_e500.h b/arch/powerpc/include/asm/kvm_e500.h<br/>deleted file mode 100644<br/>index 8cd50a514271..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_e500.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/kvm_e500.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,96 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Author: Yu Liu, &lt;yu.liu@freescale.com&gt;</div><div class='del'>- *</div><div class='del'>- * Description:</div><div class='del'>- * This file is derived from arch/powerpc/include/asm/kvm_44x.h,</div><div class='del'>- * by Hollis Blanchard &lt;hollisb@us.ibm.com&gt;.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License, version 2, as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __ASM_KVM_E500_H__</div><div class='del'>-#define __ASM_KVM_E500_H__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kvm_host.h&gt;</div><div class='del'>-</div><div class='del'>-#define BOOKE_INTERRUPT_SIZE 36</div><div class='del'>-</div><div class='del'>-#define E500_PID_NUM   3</div><div class='del'>-#define E500_TLB_NUM   2</div><div class='del'>-</div><div class='del'>-#define E500_TLB_VALID 1</div><div class='del'>-#define E500_TLB_DIRTY 2</div><div class='del'>-</div><div class='del'>-struct tlbe_ref {</div><div class='del'>-	pfn_t pfn;</div><div class='del'>-	unsigned int flags; /* E500_TLB_* */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct tlbe_priv {</div><div class='del'>-	struct tlbe_ref ref; /* TLB0 only -- TLB1 uses tlb_refs */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct vcpu_id_table;</div><div class='del'>-</div><div class='del'>-struct kvmppc_e500_tlb_params {</div><div class='del'>-	int entries, ways, sets;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvmppc_vcpu_e500 {</div><div class='del'>-	/* Unmodified copy of the guest's TLB -- shared with host userspace. */</div><div class='del'>-	struct kvm_book3e_206_tlb_entry *gtlb_arch;</div><div class='del'>-</div><div class='del'>-	/* Starting entry number in gtlb_arch[] */</div><div class='del'>-	int gtlb_offset[E500_TLB_NUM];</div><div class='del'>-</div><div class='del'>-	/* KVM internal information associated with each guest TLB entry */</div><div class='del'>-	struct tlbe_priv *gtlb_priv[E500_TLB_NUM];</div><div class='del'>-</div><div class='del'>-	struct kvmppc_e500_tlb_params gtlb_params[E500_TLB_NUM];</div><div class='del'>-</div><div class='del'>-	unsigned int gtlb_nv[E500_TLB_NUM];</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * information associated with each host TLB entry --</div><div class='del'>-	 * TLB1 only for now.  If/when guest TLB1 entries can be</div><div class='del'>-	 * mapped with host TLB0, this will be used for that too.</div><div class='del'>-	 *</div><div class='del'>-	 * We don't want to use this for guest TLB0 because then we'd</div><div class='del'>-	 * have the overhead of doing the translation again even if</div><div class='del'>-	 * the entry is still in the guest TLB (e.g. we swapped out</div><div class='del'>-	 * and back, and our host TLB entries got evicted).</div><div class='del'>-	 */</div><div class='del'>-	struct tlbe_ref *tlb_refs[E500_TLB_NUM];</div><div class='del'>-	unsigned int host_tlb1_nv;</div><div class='del'>-</div><div class='del'>-	u32 host_pid[E500_PID_NUM];</div><div class='del'>-	u32 pid[E500_PID_NUM];</div><div class='del'>-	u32 svr;</div><div class='del'>-</div><div class='del'>-	/* vcpu id table */</div><div class='del'>-	struct vcpu_id_table *idt;</div><div class='del'>-</div><div class='del'>-	u32 l1csr0;</div><div class='del'>-	u32 l1csr1;</div><div class='del'>-	u32 hid0;</div><div class='del'>-	u32 hid1;</div><div class='del'>-	u32 tlb0cfg;</div><div class='del'>-	u32 tlb1cfg;</div><div class='del'>-	u64 mcar;</div><div class='del'>-</div><div class='del'>-	struct page **shared_tlb_pages;</div><div class='del'>-	int num_shared_tlb_pages;</div><div class='del'>-</div><div class='del'>-	struct kvm_vcpu vcpu;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline struct kvmppc_vcpu_e500 *to_e500(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return container_of(vcpu, struct kvmppc_vcpu_e500, vcpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_KVM_E500_H__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h<br/>index 52eb9c1f4fe0..d848cdc49715 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_host.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/kvm_host.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -82,7 +82,7 @@ struct kvm_vcpu;</div><div class='ctx'> </div><div class='ctx'> struct lppaca;</div><div class='ctx'> struct slb_shadow;</div><div class='del'>-struct dtl;</div><div class='add'>+struct dtl_entry;</div><div class='ctx'> </div><div class='ctx'> struct kvm_vm_stat {</div><div class='ctx'> 	u32 remote_tlb_flush;</div><div class='hunk'>@@ -106,6 +106,8 @@ struct kvm_vcpu_stat {</div><div class='ctx'> 	u32 dec_exits;</div><div class='ctx'> 	u32 ext_intr_exits;</div><div class='ctx'> 	u32 halt_wakeup;</div><div class='add'>+	u32 dbell_exits;</div><div class='add'>+	u32 gdbell_exits;</div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S</div><div class='ctx'> 	u32 pf_storage;</div><div class='ctx'> 	u32 pf_instruc;</div><div class='hunk'>@@ -140,6 +142,7 @@ enum kvm_exit_types {</div><div class='ctx'> 	EMULATED_TLBSX_EXITS,</div><div class='ctx'> 	EMULATED_TLBWE_EXITS,</div><div class='ctx'> 	EMULATED_RFI_EXITS,</div><div class='add'>+	EMULATED_RFCI_EXITS,</div><div class='ctx'> 	DEC_EXITS,</div><div class='ctx'> 	EXT_INTR_EXITS,</div><div class='ctx'> 	HALT_WAKEUP,</div><div class='hunk'>@@ -147,6 +150,8 @@ enum kvm_exit_types {</div><div class='ctx'> 	FP_UNAVAIL,</div><div class='ctx'> 	DEBUG_EXITS,</div><div class='ctx'> 	TIMEINGUEST,</div><div class='add'>+	DBELL_EXITS,</div><div class='add'>+	GDBELL_EXITS,</div><div class='ctx'> 	__NUMBER_OF_KVM_EXIT_TYPES</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -217,10 +222,10 @@ struct kvm_arch_memory_slot {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_arch {</div><div class='add'>+	unsigned int lpid;</div><div class='ctx'> #ifdef CONFIG_KVM_BOOK3S_64_HV</div><div class='ctx'> 	unsigned long hpt_virt;</div><div class='ctx'> 	struct revmap_entry *revmap;</div><div class='del'>-	unsigned int lpid;</div><div class='ctx'> 	unsigned int host_lpid;</div><div class='ctx'> 	unsigned long host_lpcr;</div><div class='ctx'> 	unsigned long sdr1;</div><div class='hunk'>@@ -232,7 +237,6 @@ struct kvm_arch {</div><div class='ctx'> 	unsigned long vrma_slb_v;</div><div class='ctx'> 	int rma_setup_done;</div><div class='ctx'> 	int using_mmu_notifiers;</div><div class='del'>-	struct list_head spapr_tce_tables;</div><div class='ctx'> 	spinlock_t slot_phys_lock;</div><div class='ctx'> 	unsigned long *slot_phys[KVM_MEM_SLOTS_NUM];</div><div class='ctx'> 	int slot_npages[KVM_MEM_SLOTS_NUM];</div><div class='hunk'>@@ -240,6 +244,9 @@ struct kvm_arch {</div><div class='ctx'> 	struct kvmppc_vcore *vcores[KVM_MAX_VCORES];</div><div class='ctx'> 	struct kvmppc_linear_info *hpt_li;</div><div class='ctx'> #endif /* CONFIG_KVM_BOOK3S_64_HV */</div><div class='add'>+#ifdef CONFIG_PPC_BOOK3S_64</div><div class='add'>+	struct list_head spapr_tce_tables;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -263,6 +270,9 @@ struct kvmppc_vcore {</div><div class='ctx'> 	struct list_head runnable_threads;</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> 	wait_queue_head_t wq;</div><div class='add'>+	u64 stolen_tb;</div><div class='add'>+	u64 preempt_tb;</div><div class='add'>+	struct kvm_vcpu *runner;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define VCORE_ENTRY_COUNT(vc)	((vc)-&gt;entry_exit_count &amp; 0xff)</div><div class='hunk'>@@ -274,6 +284,19 @@ struct kvmppc_vcore {</div><div class='ctx'> #define VCORE_EXITING	2</div><div class='ctx'> #define VCORE_SLEEPING	3</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Struct used to manage memory for a virtual processor area</div><div class='add'>+ * registered by a PAPR guest.  There are three types of area</div><div class='add'>+ * that a guest can register.</div><div class='add'>+ */</div><div class='add'>+struct kvmppc_vpa {</div><div class='add'>+	void *pinned_addr;	/* Address in kernel linear mapping */</div><div class='add'>+	void *pinned_end;	/* End of region */</div><div class='add'>+	unsigned long next_gpa;	/* Guest phys addr for update */</div><div class='add'>+	unsigned long len;	/* Number of bytes required */</div><div class='add'>+	u8 update_pending;	/* 1 =&gt; update pinned_addr from next_gpa */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct kvmppc_pte {</div><div class='ctx'> 	ulong eaddr;</div><div class='ctx'> 	u64 vpage;</div><div class='hunk'>@@ -345,6 +368,17 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	u64 vsr[64];</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	u32 host_mas4;</div><div class='add'>+	u32 host_mas6;</div><div class='add'>+	u32 shadow_epcr;</div><div class='add'>+	u32 epcr;</div><div class='add'>+	u32 shadow_msrp;</div><div class='add'>+	u32 eplc;</div><div class='add'>+	u32 epsc;</div><div class='add'>+	u32 oldpir;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S</div><div class='ctx'> 	/* For Gekko paired singles */</div><div class='ctx'> 	u32 qpr[32];</div><div class='hunk'>@@ -370,6 +404,7 @@ struct kvm_vcpu_arch {</div><div class='ctx'> #endif</div><div class='ctx'> 	u32 vrsave; /* also USPRG0 */</div><div class='ctx'> 	u32 mmucr;</div><div class='add'>+	/* shadow_msr is unused for BookE HV */</div><div class='ctx'> 	ulong shadow_msr;</div><div class='ctx'> 	ulong csrr0;</div><div class='ctx'> 	ulong csrr1;</div><div class='hunk'>@@ -426,8 +461,12 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	ulong fault_esr;</div><div class='ctx'> 	ulong queued_dear;</div><div class='ctx'> 	ulong queued_esr;</div><div class='add'>+	u32 tlbcfg[4];</div><div class='add'>+	u32 mmucfg;</div><div class='add'>+	u32 epr;</div><div class='ctx'> #endif</div><div class='ctx'> 	gpa_t paddr_accessed;</div><div class='add'>+	gva_t vaddr_accessed;</div><div class='ctx'> </div><div class='ctx'> 	u8 io_gpr; /* GPR used as IO source/target */</div><div class='ctx'> 	u8 mmio_is_bigendian;</div><div class='hunk'>@@ -453,11 +492,6 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	u8 prodded;</div><div class='ctx'> 	u32 last_inst;</div><div class='ctx'> </div><div class='del'>-	struct lppaca *vpa;</div><div class='del'>-	struct slb_shadow *slb_shadow;</div><div class='del'>-	struct dtl *dtl;</div><div class='del'>-	struct dtl *dtl_end;</div><div class='del'>-</div><div class='ctx'> 	wait_queue_head_t *wqp;</div><div class='ctx'> 	struct kvmppc_vcore *vcore;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -482,6 +516,14 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	struct task_struct *run_task;</div><div class='ctx'> 	struct kvm_run *kvm_run;</div><div class='ctx'> 	pgd_t *pgdir;</div><div class='add'>+</div><div class='add'>+	spinlock_t vpa_update_lock;</div><div class='add'>+	struct kvmppc_vpa vpa;</div><div class='add'>+	struct kvmppc_vpa dtl;</div><div class='add'>+	struct dtl_entry *dtl_ptr;</div><div class='add'>+	unsigned long dtl_index;</div><div class='add'>+	u64 stolen_logged;</div><div class='add'>+	struct kvmppc_vpa slb_shadow;</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -498,4 +540,6 @@ struct kvm_vcpu_arch {</div><div class='ctx'> #define KVM_MMIO_REG_QPR	0x0040</div><div class='ctx'> #define KVM_MMIO_REG_FQPR	0x0060</div><div class='ctx'> </div><div class='add'>+#define __KVM_HAVE_ARCH_WQP</div><div class='add'>+</div><div class='ctx'> #endif /* __POWERPC_KVM_HOST_H__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_para.h b/arch/powerpc/include/asm/kvm_para.h<br/>index 7b754e743003..c18916bff689 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_para.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/kvm_para.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -206,6 +206,11 @@ static inline unsigned int kvm_arch_para_features(void)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool kvm_check_and_clear_guest_paused(void)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* __POWERPC_KVM_PARA_H__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h<br/>index 9d6dee0f7d48..f68c22fa2fce 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_ppc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/kvm_ppc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/kvm_ppc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/kvm_ppc.h</a></div><div class='hunk'>@@ -95,7 +95,7 @@ extern int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,</div><div class='ctx'> extern void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu);</div><div class='ctx'> extern void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='del'>-extern void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu);</div><div class='add'>+extern int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu);</div><div class='ctx'> extern int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu);</div><div class='ctx'> extern void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags);</div><div class='ctx'> extern void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu);</div><div class='hunk'>@@ -107,8 +107,10 @@ extern void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> extern int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'>                                   unsigned int op, int *advance);</div><div class='del'>-extern int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs);</div><div class='del'>-extern int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt);</div><div class='add'>+extern int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn,</div><div class='add'>+				     ulong val);</div><div class='add'>+extern int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn,</div><div class='add'>+				     ulong *val);</div><div class='ctx'> </div><div class='ctx'> extern int kvmppc_booke_init(void);</div><div class='ctx'> extern void kvmppc_booke_exit(void);</div><div class='hunk'>@@ -126,6 +128,8 @@ extern void kvmppc_map_vrma(struct kvm_vcpu *vcpu,</div><div class='ctx'> extern int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu);</div><div class='ctx'> extern long kvm_vm_ioctl_create_spapr_tce(struct kvm *kvm,</div><div class='ctx'> 				struct kvm_create_spapr_tce *args);</div><div class='add'>+extern long kvmppc_h_put_tce(struct kvm_vcpu *vcpu, unsigned long liobn,</div><div class='add'>+			     unsigned long ioba, unsigned long tce);</div><div class='ctx'> extern long kvm_vm_ioctl_allocate_rma(struct kvm *kvm,</div><div class='ctx'> 				struct kvm_allocate_rma *rma);</div><div class='ctx'> extern struct kvmppc_linear_info *kvm_alloc_rma(void);</div><div class='hunk'>@@ -138,6 +142,11 @@ extern int kvmppc_core_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> 				struct kvm_userspace_memory_region *mem);</div><div class='ctx'> extern void kvmppc_core_commit_memory_region(struct kvm *kvm,</div><div class='ctx'> 				struct kvm_userspace_memory_region *mem);</div><div class='add'>+extern int kvm_vm_ioctl_get_smmu_info(struct kvm *kvm,</div><div class='add'>+				      struct kvm_ppc_smmu_info *info);</div><div class='add'>+</div><div class='add'>+extern int kvmppc_bookehv_init(void);</div><div class='add'>+extern void kvmppc_bookehv_exit(void);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Cuts out inst bits with ordering according to spec.</div><div class='hunk'>@@ -204,4 +213,9 @@ int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,</div><div class='ctx'> int kvm_vcpu_ioctl_dirty_tlb(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			     struct kvm_dirty_tlb *cfg);</div><div class='ctx'> </div><div class='add'>+long kvmppc_alloc_lpid(void);</div><div class='add'>+void kvmppc_claim_lpid(long lpid);</div><div class='add'>+void kvmppc_free_lpid(long lpid);</div><div class='add'>+void kvmppc_init_lpid(unsigned long nr_lpids);</div><div class='add'>+</div><div class='ctx'> #endif /* __POWERPC_KVM_PPC_H__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h<br/>index a76254af0aaa..531fe0c3108f 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/lppaca.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/lppaca.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/lppaca.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/lppaca.h</a></div><div class='hunk'>@@ -20,18 +20,16 @@</div><div class='ctx'> #define _ASM_POWERPC_LPPACA_H</div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='del'>-/* These definitions relate to hypervisors that only exist when using</div><div class='add'>+/*</div><div class='add'>+ * These definitions relate to hypervisors that only exist when using</div><div class='ctx'>  * a server type processor</div><div class='ctx'>  */</div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S</div><div class='ctx'> </div><div class='del'>-//=============================================================================</div><div class='del'>-//</div><div class='del'>-//	This control block contains the data that is shared between the</div><div class='del'>-//	hypervisor (PLIC) and the OS.</div><div class='del'>-//</div><div class='del'>-//</div><div class='del'>-//----------------------------------------------------------------------------</div><div class='add'>+/*</div><div class='add'>+ * This control block contains the data that is shared between the</div><div class='add'>+ * hypervisor and the OS.</div><div class='add'>+ */</div><div class='ctx'> #include &lt;linux/cache.h&gt;</div><div class='ctx'> #include &lt;linux/threads.h&gt;</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='hunk'>@@ -43,123 +41,65 @@</div><div class='ctx'>  */</div><div class='ctx'> #define NR_LPPACAS	1</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* The Hypervisor barfs if the lppaca crosses a page boundary.  A 1k</div><div class='del'>- * alignment is sufficient to prevent this */</div><div class='add'>+/*</div><div class='add'>+ * The Hypervisor barfs if the lppaca crosses a page boundary.  A 1k</div><div class='add'>+ * alignment is sufficient to prevent this</div><div class='add'>+ */</div><div class='ctx'> struct lppaca {</div><div class='del'>-//=============================================================================</div><div class='del'>-// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data</div><div class='del'>-// NOTE: The xDynXyz fields are fields that will be dynamically changed by</div><div class='del'>-// PLIC when preparing to bring a processor online or when dispatching a</div><div class='del'>-// virtual processor!</div><div class='del'>-//=============================================================================</div><div class='del'>-	u32	desc;			// Eye catcher 0xD397D781	x00-x03</div><div class='del'>-	u16	size;			// Size of this struct		x04-x05</div><div class='del'>-	u16	reserved1;		// Reserved			x06-x07</div><div class='del'>-	u16	reserved2:14;		// Reserved			x08-x09</div><div class='del'>-	u8	shared_proc:1;		// Shared processor indicator	...</div><div class='del'>-	u8	secondary_thread:1;	// Secondary thread indicator	...</div><div class='del'>-	volatile u8 dyn_proc_status:8;	// Dynamic Status of this proc	x0A-x0A</div><div class='del'>-	u8	secondary_thread_count;	// Secondary thread count	x0B-x0B</div><div class='del'>-	volatile u16 dyn_hv_phys_proc_index;// Dynamic HV Physical Proc Index0C-x0D</div><div class='del'>-	volatile u16 dyn_hv_log_proc_index;// Dynamic HV Logical Proc Indexx0E-x0F</div><div class='del'>-	u32	decr_val;   		// Value for Decr programming 	x10-x13</div><div class='del'>-	u32	pmc_val;       		// Value for PMC regs         	x14-x17</div><div class='del'>-	volatile u32 dyn_hw_node_id;	// Dynamic Hardware Node id	x18-x1B</div><div class='del'>-	volatile u32 dyn_hw_proc_id;	// Dynamic Hardware Proc Id	x1C-x1F</div><div class='del'>-	volatile u32 dyn_pir;		// Dynamic ProcIdReg value	x20-x23</div><div class='del'>-	u32	dsei_data;           	// DSEI data                  	x24-x27</div><div class='del'>-	u64	sprg3;               	// SPRG3 value                	x28-x2F</div><div class='del'>-	u8	reserved3[40];		// Reserved			x30-x57</div><div class='del'>-	volatile u8 vphn_assoc_counts[8]; // Virtual processor home node</div><div class='del'>-					// associativity change counters x58-x5F</div><div class='del'>-	u8	reserved4[32];		// Reserved			x60-x7F</div><div class='del'>-</div><div class='del'>-//=============================================================================</div><div class='del'>-// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data</div><div class='del'>-//=============================================================================</div><div class='del'>-	// This Dword contains a byte for each type of interrupt that can occur.</div><div class='del'>-	// The IPI is a count while the others are just a binary 1 or 0.</div><div class='del'>-	union {</div><div class='del'>-		u64	any_int;</div><div class='del'>-		struct {</div><div class='del'>-			u16	reserved;	// Reserved - cleared by #mpasmbl</div><div class='del'>-			u8	xirr_int;	// Indicates xXirrValue is valid or Immed IO</div><div class='del'>-			u8	ipi_cnt;	// IPI Count</div><div class='del'>-			u8	decr_int;	// DECR interrupt occurred</div><div class='del'>-			u8	pdc_int;	// PDC interrupt occurred</div><div class='del'>-			u8	quantum_int;	// Interrupt quantum reached</div><div class='del'>-			u8	old_plic_deferred_ext_int;	// Old PLIC has a deferred XIRR pending</div><div class='del'>-		} fields;</div><div class='del'>-	} int_dword;</div><div class='del'>-</div><div class='del'>-	// Whenever any fields in this Dword are set then PLIC will defer the</div><div class='del'>-	// processing of external interrupts.  Note that PLIC will store the</div><div class='del'>-	// XIRR directly into the xXirrValue field so that another XIRR will</div><div class='del'>-	// not be presented until this one clears.  The layout of the low</div><div class='del'>-	// 4-bytes of this Dword is up to SLIC - PLIC just checks whether the</div><div class='del'>-	// entire Dword is zero or not.  A non-zero value in the low order</div><div class='del'>-	// 2-bytes will result in SLIC being granted the highest thread</div><div class='del'>-	// priority upon return.  A 0 will return to SLIC as medium priority.</div><div class='del'>-	u64	plic_defer_ints_area;	// Entire Dword</div><div class='del'>-</div><div class='del'>-	// Used to pass the real SRR0/1 from PLIC to SLIC as well as to</div><div class='del'>-	// pass the target SRR0/1 from SLIC to PLIC on a SetAsrAndRfid.</div><div class='del'>-	u64	saved_srr0;		// Saved SRR0                   x10-x17</div><div class='del'>-	u64	saved_srr1;		// Saved SRR1                   x18-x1F</div><div class='del'>-</div><div class='del'>-	// Used to pass parms from the OS to PLIC for SetAsrAndRfid</div><div class='del'>-	u64	saved_gpr3;		// Saved GPR3                   x20-x27</div><div class='del'>-	u64	saved_gpr4;		// Saved GPR4                   x28-x2F</div><div class='del'>-	union {</div><div class='del'>-		u64	saved_gpr5;	/* Saved GPR5               x30-x37 */</div><div class='del'>-		struct {</div><div class='del'>-			u8	cede_latency_hint;  /*			x30 */</div><div class='del'>-			u8	reserved[7];        /*		    x31-x36 */</div><div class='del'>-		} fields;</div><div class='del'>-	} gpr5_dword;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	u8	dtl_enable_mask;	// Dispatch Trace Log mask	x38-x38</div><div class='del'>-	u8	donate_dedicated_cpu;	// Donate dedicated CPU cycles  x39-x39</div><div class='del'>-	u8	fpregs_in_use;		// FP regs in use               x3A-x3A</div><div class='del'>-	u8	pmcregs_in_use;		// PMC regs in use              x3B-x3B</div><div class='del'>-	volatile u32 saved_decr;	// Saved Decr Value             x3C-x3F</div><div class='del'>-	volatile u64 emulated_time_base;// Emulated TB for this thread  x40-x47</div><div class='del'>-	volatile u64 cur_plic_latency;	// Unaccounted PLIC latency     x48-x4F</div><div class='del'>-	u64	tot_plic_latency;	// Accumulated PLIC latency     x50-x57</div><div class='del'>-	u64	wait_state_cycles;	// Wait cycles for this proc    x58-x5F</div><div class='del'>-	u64	end_of_quantum;		// TB at end of quantum         x60-x67</div><div class='del'>-	u64	pdc_saved_sprg1;	// Saved SPRG1 for PMC int      x68-x6F</div><div class='del'>-	u64	pdc_saved_srr0;		// Saved SRR0 for PMC int       x70-x77</div><div class='del'>-	volatile u32 virtual_decr;	// Virtual DECR for shared procsx78-x7B</div><div class='del'>-	u16	slb_count;		// # of SLBs to maintain        x7C-x7D</div><div class='del'>-	u8	idle;			// Indicate OS is idle          x7E</div><div class='del'>-	u8	vmxregs_in_use;		// VMX registers in use         x7F</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-//=============================================================================</div><div class='del'>-// CACHE_LINE_3 0x0100 - 0x017F: This line is shared with other processors</div><div class='del'>-//=============================================================================</div><div class='del'>-	// This is the yield_count.  An "odd" value (low bit on) means that</div><div class='del'>-	// the processor is yielded (either because of an OS yield or a PLIC</div><div class='del'>-	// preempt).  An even value implies that the processor is currently</div><div class='del'>-	// executing.</div><div class='del'>-	// NOTE: This value will ALWAYS be zero for dedicated processors and</div><div class='del'>-	// will NEVER be zero for shared processors (ie, initialized to a 1).</div><div class='del'>-	volatile u32 yield_count;	// PLIC increments each dispatchx00-x03</div><div class='del'>-	volatile u32 dispersion_count;	// dispatch changed phys cpu    x04-x07</div><div class='del'>-	volatile u64 cmo_faults;	// CMO page fault count         x08-x0F</div><div class='del'>-	volatile u64 cmo_fault_time;	// CMO page fault time          x10-x17</div><div class='del'>-	u8	reserved7[104];		// Reserved                     x18-x7F</div><div class='del'>-</div><div class='del'>-//=============================================================================</div><div class='del'>-// CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data</div><div class='del'>-//=============================================================================</div><div class='del'>-	u32	page_ins;		// CMO Hint - # page ins by OS  x00-x03</div><div class='del'>-	u8	reserved8[148];		// Reserved                     x04-x97</div><div class='del'>-	volatile u64 dtl_idx;		// Dispatch Trace Log head idx	x98-x9F</div><div class='del'>-	u8	reserved9[96];		// Reserved                     xA0-xFF</div><div class='add'>+	/* cacheline 1 contains read-only data */</div><div class='add'>+</div><div class='add'>+	u32	desc;			/* Eye catcher 0xD397D781 */</div><div class='add'>+	u16	size;			/* Size of this struct */</div><div class='add'>+	u16	reserved1;</div><div class='add'>+	u16	reserved2:14;</div><div class='add'>+	u8	shared_proc:1;		/* Shared processor indicator */</div><div class='add'>+	u8	secondary_thread:1;	/* Secondary thread indicator */</div><div class='add'>+	u8	reserved3[14];</div><div class='add'>+	volatile u32 dyn_hw_node_id;	/* Dynamic hardware node id */</div><div class='add'>+	volatile u32 dyn_hw_proc_id;	/* Dynamic hardware proc id */</div><div class='add'>+	u8	reserved4[56];</div><div class='add'>+	volatile u8 vphn_assoc_counts[8]; /* Virtual processor home node */</div><div class='add'>+					  /* associativity change counters */</div><div class='add'>+	u8	reserved5[32];</div><div class='add'>+</div><div class='add'>+	/* cacheline 2 contains local read-write data */</div><div class='add'>+</div><div class='add'>+	u8	reserved6[48];</div><div class='add'>+	u8	cede_latency_hint;</div><div class='add'>+	u8	reserved7[7];</div><div class='add'>+	u8	dtl_enable_mask;	/* Dispatch Trace Log mask */</div><div class='add'>+	u8	donate_dedicated_cpu;	/* Donate dedicated CPU cycles */</div><div class='add'>+	u8	fpregs_in_use;</div><div class='add'>+	u8	pmcregs_in_use;</div><div class='add'>+	u8	reserved8[28];</div><div class='add'>+	u64	wait_state_cycles;	/* Wait cycles for this proc */</div><div class='add'>+	u8	reserved9[28];</div><div class='add'>+	u16	slb_count;		/* # of SLBs to maintain */</div><div class='add'>+	u8	idle;			/* Indicate OS is idle */</div><div class='add'>+	u8	vmxregs_in_use;</div><div class='add'>+</div><div class='add'>+	/* cacheline 3 is shared with other processors */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This is the yield_count.  An "odd" value (low bit on) means that</div><div class='add'>+	 * the processor is yielded (either because of an OS yield or a</div><div class='add'>+	 * hypervisor preempt).  An even value implies that the processor is</div><div class='add'>+	 * currently executing.</div><div class='add'>+	 * NOTE: This value will ALWAYS be zero for dedicated processors and</div><div class='add'>+	 * will NEVER be zero for shared processors (ie, initialized to a 1).</div><div class='add'>+	 */</div><div class='add'>+	volatile u32 yield_count;</div><div class='add'>+	volatile u32 dispersion_count;	/* dispatch changed physical cpu */</div><div class='add'>+	volatile u64 cmo_faults;	/* CMO page fault count */</div><div class='add'>+	volatile u64 cmo_fault_time;	/* CMO page fault time */</div><div class='add'>+	u8	reserved10[104];</div><div class='add'>+</div><div class='add'>+	/* cacheline 4-5 */</div><div class='add'>+</div><div class='add'>+	u32	page_ins;		/* CMO Hint - # page ins by OS */</div><div class='add'>+	u8	reserved11[148];</div><div class='add'>+	volatile u64 dtl_idx;		/* Dispatch Trace Log head index */</div><div class='add'>+	u8	reserved12[96];</div><div class='ctx'> } __attribute__((__aligned__(0x400)));</div><div class='ctx'> </div><div class='ctx'> extern struct lppaca lppaca[];</div><div class='hunk'>@@ -172,13 +112,13 @@ extern struct lppaca lppaca[];</div><div class='ctx'>  * ESID is stored in the lower 64bits, then the VSID.</div><div class='ctx'>  */</div><div class='ctx'> struct slb_shadow {</div><div class='del'>-	u32	persistent;		// Number of persistent SLBs	x00-x03</div><div class='del'>-	u32	buffer_length;		// Total shadow buffer length	x04-x07</div><div class='del'>-	u64	reserved;		// Alignment			x08-x0f</div><div class='add'>+	u32	persistent;		/* Number of persistent SLBs */</div><div class='add'>+	u32	buffer_length;		/* Total shadow buffer length */</div><div class='add'>+	u64	reserved;</div><div class='ctx'> 	struct	{</div><div class='ctx'> 		u64     esid;</div><div class='ctx'> 		u64	vsid;</div><div class='del'>-	} save_area[SLB_NUM_BOLTED];	//				x10-x40</div><div class='add'>+	} save_area[SLB_NUM_BOLTED];</div><div class='ctx'> } ____cacheline_aligned;</div><div class='ctx'> </div><div class='ctx'> extern struct slb_shadow slb_shadow[];</div><div class='head'>diff --git a/arch/powerpc/include/asm/lv1call.h b/arch/powerpc/include/asm/lv1call.h<br/>index 233f9ecae761..f5117674bf92 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/lv1call.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/lv1call.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/lv1call.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/lv1call.h</a></div><div class='hunk'>@@ -265,8 +265,8 @@ LV1_CALL(get_spe_irq_outlet,                            2, 1,  78 )</div><div class='ctx'> LV1_CALL(set_spe_privilege_state_area_1_register,       3, 0,  79 )</div><div class='ctx'> LV1_CALL(create_repository_node,                        6, 0,  90 )</div><div class='ctx'> LV1_CALL(read_repository_node,                          5, 2,  91 )</div><div class='del'>-LV1_CALL(modify_repository_node_value,                  6, 0,  92 )</div><div class='del'>-LV1_CALL(remove_repository_node,                        4, 0,  93 )</div><div class='add'>+LV1_CALL(write_repository_node,                         6, 0,  92 )</div><div class='add'>+LV1_CALL(delete_repository_node,                        4, 0,  93 )</div><div class='ctx'> LV1_CALL(read_htab_entries,                             2, 5,  95 )</div><div class='ctx'> LV1_CALL(set_dabr,                                      2, 0,  96 )</div><div class='ctx'> LV1_CALL(get_total_execution_time,                      2, 1, 103 )</div><div class='head'>diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h<br/>index cdb5421877e2..eeabcdbc30f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/mmu-book3e.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/mmu-book3e.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/mmu-book3e.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/mmu-book3e.h</a></div><div class='hunk'>@@ -104,6 +104,8 @@</div><div class='ctx'> #define MAS4_TSIZED_MASK	0x00000f80	/* Default TSIZE */</div><div class='ctx'> #define MAS4_TSIZED_SHIFT	7</div><div class='ctx'> </div><div class='add'>+#define MAS5_SGS		0x80000000</div><div class='add'>+</div><div class='ctx'> #define MAS6_SPID0		0x3FFF0000</div><div class='ctx'> #define MAS6_SPID1		0x00007FFE</div><div class='ctx'> #define MAS6_ISIZE(x)		MAS1_TSIZE(x)</div><div class='hunk'>@@ -118,6 +120,10 @@</div><div class='ctx'> </div><div class='ctx'> #define MAS7_RPN		0xFFFFFFFF</div><div class='ctx'> </div><div class='add'>+#define MAS8_TGS		0x80000000 /* Guest space */</div><div class='add'>+#define MAS8_VF			0x40000000 /* Virtualization Fault */</div><div class='add'>+#define MAS8_TLPID		0x000000ff</div><div class='add'>+</div><div class='ctx'> /* Bit definitions for MMUCFG */</div><div class='ctx'> #define MMUCFG_MAVN	0x00000003	/* MMU Architecture Version Number */</div><div class='ctx'> #define MMUCFG_MAVN_V1	0x00000000	/* v1.0 */</div><div class='head'>diff --git a/arch/powerpc/include/asm/pSeries_reconfig.h b/arch/powerpc/include/asm/pSeries_reconfig.h<br/>index 23cd6cc30bcf..c07edfe98b98 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/pSeries_reconfig.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/pSeries_reconfig.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/pSeries_reconfig.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/pSeries_reconfig.h</a></div><div class='hunk'>@@ -13,6 +13,18 @@</div><div class='ctx'> #define PSERIES_RECONFIG_REMOVE		0x0002</div><div class='ctx'> #define PSERIES_DRCONF_MEM_ADD		0x0003</div><div class='ctx'> #define PSERIES_DRCONF_MEM_REMOVE	0x0004</div><div class='add'>+#define PSERIES_UPDATE_PROPERTY		0x0005</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pSeries_reconfig_notify - Notifier value structure for OFDT property updates</div><div class='add'>+ *</div><div class='add'>+ * @node: Device tree node which owns the property being updated</div><div class='add'>+ * @property: Updated property</div><div class='add'>+ */</div><div class='add'>+struct pSeries_reconfig_prop_update {</div><div class='add'>+	struct device_node *node;</div><div class='add'>+	struct property *property;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC_PSERIES</div><div class='ctx'> extern int pSeries_reconfig_notifier_register(struct notifier_block *);</div><div class='head'>diff --git a/arch/powerpc/include/asm/posix_types.h b/arch/powerpc/include/asm/posix_types.h<br/>index f1393252bbda..2958c5b97b2d 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/posix_types.h</a></div><div class='hunk'>@@ -16,9 +16,6 @@ typedef int		__kernel_ssize_t;</div><div class='ctx'> typedef long		__kernel_ptrdiff_t;</div><div class='ctx'> #define __kernel_size_t __kernel_size_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned short	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef short		__kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h<br/>index 50f73aa2ba21..15444204a3a1 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/ppc_asm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/ppc_asm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/ppc_asm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/ppc_asm.h</a></div><div class='hunk'>@@ -369,7 +369,15 @@ BEGIN_FTR_SECTION			\</div><div class='ctx'> END_FTR_SECTION_IFCLR(CPU_FTR_601)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	</div><div class='add'>+#ifdef CONFIG_PPC64</div><div class='add'>+#define MTOCRF(FXM, RS)			\</div><div class='add'>+	BEGIN_FTR_SECTION_NESTED(848);	\</div><div class='add'>+	mtcrf	(FXM), (RS);		\</div><div class='add'>+	FTR_SECTION_ELSE_NESTED(848);	\</div><div class='add'>+	mtocrf (FXM), (RS);		\</div><div class='add'>+	ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_NOEXECUTE, 848)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This instruction is not implemented on the PPC 603 or 601; however, on</div><div class='ctx'>  * the 403GCX and 405GP tlbia IS defined and tlbie is not.</div><div class='head'>diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h<br/>index 8e2d0371fe1e..413a5eaef56c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/processor.h</a></div><div class='hunk'>@@ -74,9 +74,6 @@ struct task_struct;</div><div class='ctx'> void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp);</div><div class='ctx'> void release_thread(struct task_struct *);</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-extern void prepare_to_copy(struct task_struct *tsk);</div><div class='del'>-</div><div class='ctx'> /* Create a new kernel thread. */</div><div class='ctx'> extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);</div><div class='ctx'> </div><div class='hunk'>@@ -243,6 +240,9 @@ struct thread_struct {</div><div class='ctx'> #ifdef CONFIG_KVM_BOOK3S_32_HANDLER</div><div class='ctx'> 	void*		kvm_shadow_vcpu; /* KVM internal data */</div><div class='ctx'> #endif /* CONFIG_KVM_BOOK3S_32_HANDLER */</div><div class='add'>+#if defined(CONFIG_KVM) &amp;&amp; defined(CONFIG_BOOKE)</div><div class='add'>+	struct kvm_vcpu	*kvm_vcpu;</div><div class='add'>+#endif</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 	unsigned long	dscr;</div><div class='ctx'> 	int		dscr_inherit;</div><div class='hunk'>@@ -386,7 +386,6 @@ extern unsigned long cpuidle_disable;</div><div class='ctx'> enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};</div><div class='ctx'> </div><div class='ctx'> extern int powersave_nap;	/* set if nap mode can be used in idle loop */</div><div class='del'>-void cpu_idle_wait(void);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PSERIES_IDLE</div><div class='ctx'> extern void update_smt_snooze_delay(int snooze);</div><div class='head'>diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h<br/>index 84cc7840cd18..9c21ed42aba6 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/ptrace.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/ptrace.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/ptrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/ptrace.h</a></div><div class='hunk'>@@ -354,12 +354,6 @@ static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,</div><div class='ctx'> #define PTRACE_GETREGS64	  22</div><div class='ctx'> #define PTRACE_SETREGS64	  23</div><div class='ctx'> </div><div class='del'>-/* (old) PTRACE requests with inverted arguments */</div><div class='del'>-#define PPC_PTRACE_GETREGS	0x99	/* Get GPRs 0 - 31 */</div><div class='del'>-#define PPC_PTRACE_SETREGS	0x98	/* Set GPRs 0 - 31 */</div><div class='del'>-#define PPC_PTRACE_GETFPREGS	0x97	/* Get FPRs 0 - 31 */</div><div class='del'>-#define PPC_PTRACE_SETFPREGS	0x96	/* Set FPRs 0 - 31 */</div><div class='del'>-</div><div class='ctx'> /* Calls to trace a 64bit program from a 32bit program */</div><div class='ctx'> #define PPC_PTRACE_PEEKTEXT_3264 0x95</div><div class='ctx'> #define PPC_PTRACE_PEEKDATA_3264 0x94</div><div class='head'>diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h<br/>index 9d7f0fb69028..f0cb7f461b9d 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/reg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/reg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/reg.h</a></div><div class='hunk'>@@ -257,7 +257,9 @@</div><div class='ctx'> #define   LPCR_LPES_SH	2</div><div class='ctx'> #define   LPCR_RMI     0x00000002      /* real mode is cache inhibit */</div><div class='ctx'> #define   LPCR_HDICE   0x00000001      /* Hyp Decr enable (HV,PR,EE) */</div><div class='add'>+#ifndef SPRN_LPID</div><div class='ctx'> #define SPRN_LPID	0x13F	/* Logical Partition Identifier */</div><div class='add'>+#endif</div><div class='ctx'> #define   LPID_RSVD	0x3ff		/* Reserved LPID for partn switching */</div><div class='ctx'> #define	SPRN_HMER	0x150	/* Hardware m? error recovery */</div><div class='ctx'> #define	SPRN_HMEER	0x151	/* Hardware m? enable error recovery */</div><div class='head'>diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h<br/>index 8a97aa7289d3..2d916c4982c5 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/reg_booke.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/reg_booke.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/reg_booke.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/reg_booke.h</a></div><div class='hunk'>@@ -56,18 +56,30 @@</div><div class='ctx'> #define SPRN_SPRG7W	0x117	/* Special Purpose Register General 7 Write */</div><div class='ctx'> #define SPRN_EPCR	0x133	/* Embedded Processor Control Register */</div><div class='ctx'> #define SPRN_DBCR2	0x136	/* Debug Control Register 2 */</div><div class='add'>+#define SPRN_MSRP	0x137	/* MSR Protect Register */</div><div class='ctx'> #define SPRN_IAC3	0x13A	/* Instruction Address Compare 3 */</div><div class='ctx'> #define SPRN_IAC4	0x13B	/* Instruction Address Compare 4 */</div><div class='ctx'> #define SPRN_DVC1	0x13E	/* Data Value Compare Register 1 */</div><div class='ctx'> #define SPRN_DVC2	0x13F	/* Data Value Compare Register 2 */</div><div class='add'>+#define SPRN_LPID	0x152	/* Logical Partition ID */</div><div class='ctx'> #define SPRN_MAS8	0x155	/* MMU Assist Register 8 */</div><div class='ctx'> #define SPRN_TLB0PS	0x158	/* TLB 0 Page Size Register */</div><div class='ctx'> #define SPRN_TLB1PS	0x159	/* TLB 1 Page Size Register */</div><div class='ctx'> #define SPRN_MAS5_MAS6	0x15c	/* MMU Assist Register 5 || 6 */</div><div class='ctx'> #define SPRN_MAS8_MAS1	0x15d	/* MMU Assist Register 8 || 1 */</div><div class='ctx'> #define SPRN_EPTCFG	0x15e	/* Embedded Page Table Config */</div><div class='add'>+#define SPRN_GSPRG0	0x170	/* Guest SPRG0 */</div><div class='add'>+#define SPRN_GSPRG1	0x171	/* Guest SPRG1 */</div><div class='add'>+#define SPRN_GSPRG2	0x172	/* Guest SPRG2 */</div><div class='add'>+#define SPRN_GSPRG3	0x173	/* Guest SPRG3 */</div><div class='ctx'> #define SPRN_MAS7_MAS3	0x174	/* MMU Assist Register 7 || 3 */</div><div class='ctx'> #define SPRN_MAS0_MAS1	0x175	/* MMU Assist Register 0 || 1 */</div><div class='add'>+#define SPRN_GSRR0	0x17A	/* Guest SRR0 */</div><div class='add'>+#define SPRN_GSRR1	0x17B	/* Guest SRR1 */</div><div class='add'>+#define SPRN_GEPR	0x17C	/* Guest EPR */</div><div class='add'>+#define SPRN_GDEAR	0x17D	/* Guest DEAR */</div><div class='add'>+#define SPRN_GPIR	0x17E	/* Guest PIR */</div><div class='add'>+#define SPRN_GESR	0x17F	/* Guest Exception Syndrome Register */</div><div class='ctx'> #define SPRN_IVOR0	0x190	/* Interrupt Vector Offset Register 0 */</div><div class='ctx'> #define SPRN_IVOR1	0x191	/* Interrupt Vector Offset Register 1 */</div><div class='ctx'> #define SPRN_IVOR2	0x192	/* Interrupt Vector Offset Register 2 */</div><div class='hunk'>@@ -88,6 +100,13 @@</div><div class='ctx'> #define SPRN_IVOR39	0x1B1	/* Interrupt Vector Offset Register 39 */</div><div class='ctx'> #define SPRN_IVOR40	0x1B2	/* Interrupt Vector Offset Register 40 */</div><div class='ctx'> #define SPRN_IVOR41	0x1B3	/* Interrupt Vector Offset Register 41 */</div><div class='add'>+#define SPRN_GIVOR2	0x1B8	/* Guest IVOR2 */</div><div class='add'>+#define SPRN_GIVOR3	0x1B9	/* Guest IVOR3 */</div><div class='add'>+#define SPRN_GIVOR4	0x1BA	/* Guest IVOR4 */</div><div class='add'>+#define SPRN_GIVOR8	0x1BB	/* Guest IVOR8 */</div><div class='add'>+#define SPRN_GIVOR13	0x1BC	/* Guest IVOR13 */</div><div class='add'>+#define SPRN_GIVOR14	0x1BD	/* Guest IVOR14 */</div><div class='add'>+#define SPRN_GIVPR	0x1BF	/* Guest IVPR */</div><div class='ctx'> #define SPRN_SPEFSCR	0x200	/* SPE &amp; Embedded FP Status &amp; Control */</div><div class='ctx'> #define SPRN_BBEAR	0x201	/* Branch Buffer Entry Address Register */</div><div class='ctx'> #define SPRN_BBTAR	0x202	/* Branch Buffer Target Address Register */</div><div class='hunk'>@@ -240,6 +259,10 @@</div><div class='ctx'> #define MCSR_LDG	0x00002000UL /* Guarded Load */</div><div class='ctx'> #define MCSR_TLBSYNC	0x00000002UL /* Multiple tlbsyncs detected */</div><div class='ctx'> #define MCSR_BSL2_ERR	0x00000001UL /* Backside L2 cache error */</div><div class='add'>+</div><div class='add'>+#define MSRP_UCLEP	0x04000000 /* Protect MSR[UCLE] */</div><div class='add'>+#define MSRP_DEP	0x00000200 /* Protect MSR[DE] */</div><div class='add'>+#define MSRP_PMMP	0x00000004 /* Protect MSR[PMM] */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_E200</div><div class='hunk'>@@ -594,6 +617,17 @@</div><div class='ctx'> #define SPRN_EPCR_DMIUH		0x00400000	/* Disable MAS Interrupt updates</div><div class='ctx'> 						 * for hypervisor */</div><div class='ctx'> </div><div class='add'>+/* Bit definitions for EPLC/EPSC */</div><div class='add'>+#define EPC_EPR		0x80000000 /* 1 = user, 0 = kernel */</div><div class='add'>+#define EPC_EPR_SHIFT	31</div><div class='add'>+#define EPC_EAS		0x40000000 /* Address Space */</div><div class='add'>+#define EPC_EAS_SHIFT	30</div><div class='add'>+#define EPC_EGS		0x20000000 /* 1 = guest, 0 = hypervisor */</div><div class='add'>+#define EPC_EGS_SHIFT	29</div><div class='add'>+#define EPC_ELPID	0x00ff0000</div><div class='add'>+#define EPC_ELPID_SHIFT	16</div><div class='add'>+#define EPC_EPID	0x00003fff</div><div class='add'>+#define EPC_EPID_SHIFT	0</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The IBM-403 is an even more odd special case, as it is much</div><div class='head'>diff --git a/arch/powerpc/include/asm/stat.h b/arch/powerpc/include/asm/stat.h<br/>index e4edc510b530..84880b80cc1c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/stat.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/stat.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/stat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/stat.h</a></div><div class='hunk'>@@ -30,11 +30,11 @@ struct stat {</div><div class='ctx'> 	unsigned long	st_dev;</div><div class='ctx'> 	ino_t		st_ino;</div><div class='ctx'> #ifdef __powerpc64__</div><div class='del'>-	nlink_t		st_nlink;</div><div class='add'>+	unsigned long	st_nlink;</div><div class='ctx'> 	mode_t		st_mode;</div><div class='ctx'> #else</div><div class='ctx'> 	mode_t		st_mode;</div><div class='del'>-	nlink_t		st_nlink;</div><div class='add'>+	unsigned short	st_nlink;</div><div class='ctx'> #endif</div><div class='ctx'> 	uid_t		st_uid;</div><div class='ctx'> 	gid_t		st_gid;</div><div class='head'>diff --git a/arch/powerpc/include/asm/switch_to.h b/arch/powerpc/include/asm/switch_to.h<br/>index caf82d0a00de..200d763a0a67 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/switch_to.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/switch_to.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/switch_to.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/switch_to.h</a></div><div class='hunk'>@@ -17,11 +17,11 @@ extern struct task_struct *_switch(struct thread_struct *prev,</div><div class='ctx'> 				   struct thread_struct *next);</div><div class='ctx'> </div><div class='ctx'> extern void giveup_fpu(struct task_struct *);</div><div class='add'>+extern void load_up_fpu(void);</div><div class='ctx'> extern void disable_kernel_fp(void);</div><div class='ctx'> extern void enable_kernel_fp(void);</div><div class='ctx'> extern void flush_fp_to_thread(struct task_struct *);</div><div class='ctx'> extern void enable_kernel_altivec(void);</div><div class='del'>-extern void giveup_altivec(struct task_struct *);</div><div class='ctx'> extern void load_up_altivec(struct task_struct *);</div><div class='ctx'> extern int emulate_altivec(struct pt_regs *);</div><div class='ctx'> extern void __giveup_vsx(struct task_struct *);</div><div class='hunk'>@@ -40,10 +40,15 @@ static inline void discard_lazy_cpu_state(void)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ALTIVEC</div><div class='ctx'> extern void flush_altivec_to_thread(struct task_struct *);</div><div class='add'>+extern void giveup_altivec(struct task_struct *);</div><div class='add'>+extern void giveup_altivec_notask(void);</div><div class='ctx'> #else</div><div class='ctx'> static inline void flush_altivec_to_thread(struct task_struct *t)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='add'>+static inline void giveup_altivec(struct task_struct *t)</div><div class='add'>+{</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_VSX</div><div class='head'>diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h<br/>index 4a741c7efd02..68831e9cf82f 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/thread_info.h</a></div><div class='hunk'>@@ -62,21 +62,8 @@ struct thread_info {</div><div class='ctx'> #define init_thread_info	(init_thread_union.thread_info)</div><div class='ctx'> #define init_stack		(init_thread_union.stack)</div><div class='ctx'> </div><div class='del'>-/* thread information allocation */</div><div class='del'>-</div><div class='del'>-#if THREAD_SHIFT &gt;= PAGE_SHIFT</div><div class='del'>-</div><div class='ctx'> #define THREAD_SIZE_ORDER	(THREAD_SHIFT - PAGE_SHIFT)</div><div class='ctx'> </div><div class='del'>-#else /* THREAD_SHIFT &lt; PAGE_SHIFT */</div><div class='del'>-</div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-</div><div class='del'>-extern struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node);</div><div class='del'>-extern void free_thread_info(struct thread_info *ti);</div><div class='del'>-</div><div class='del'>-#endif /* THREAD_SHIFT &lt; PAGE_SHIFT */</div><div class='del'>-</div><div class='ctx'> /* how to get the thread information struct from C */</div><div class='ctx'> static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -126,7 +113,6 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> #define _TIF_NOERROR		(1&lt;&lt;TIF_NOERROR)</div><div class='ctx'> #define _TIF_NOTIFY_RESUME	(1&lt;&lt;TIF_NOTIFY_RESUME)</div><div class='ctx'> #define _TIF_SYSCALL_TRACEPOINT	(1&lt;&lt;TIF_SYSCALL_TRACEPOINT)</div><div class='del'>-#define _TIF_RUNLATCH		(1&lt;&lt;TIF_RUNLATCH)</div><div class='ctx'> #define _TIF_SYSCALL_T_OR_A	(_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \</div><div class='ctx'> 				 _TIF_SECCOMP | _TIF_SYSCALL_TRACEPOINT)</div><div class='ctx'> </div><div class='hunk'>@@ -154,7 +140,23 @@ static inline void set_restore_sigmask(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_info *ti = current_thread_info();</div><div class='ctx'> 	ti-&gt;local_flags |= _TLF_RESTORE_SIGMASK;</div><div class='del'>-	set_bit(TIF_SIGPENDING, &amp;ti-&gt;flags);</div><div class='add'>+	WARN_ON(!test_bit(TIF_SIGPENDING, &amp;ti-&gt;flags));</div><div class='add'>+}</div><div class='add'>+static inline void clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	current_thread_info()-&gt;local_flags &amp;= ~_TLF_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	return current_thread_info()-&gt;local_flags &amp; _TLF_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_and_clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	struct thread_info *ti = current_thread_info();</div><div class='add'>+	if (!(ti-&gt;local_flags &amp; _TLF_RESTORE_SIGMASK))</div><div class='add'>+		return false;</div><div class='add'>+	ti-&gt;local_flags &amp;= ~_TLF_RESTORE_SIGMASK;</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool test_thread_local_flags(unsigned int flags)</div><div class='head'>diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h<br/>index 2136f58a54e8..3b4b4a8da922 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/time.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/time.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/time.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/time.h</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> extern unsigned long tb_ticks_per_jiffy;</div><div class='ctx'> extern unsigned long tb_ticks_per_usec;</div><div class='ctx'> extern unsigned long tb_ticks_per_sec;</div><div class='add'>+extern struct clock_event_device decrementer_clockevent;</div><div class='ctx'> </div><div class='ctx'> struct rtc_time;</div><div class='ctx'> extern void to_tm(int tim, struct rtc_time * tm);</div><div class='head'>diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h<br/>index c97185885c6d..852ed1b384f6 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/topology.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/topology.h</a></div><div class='hunk'>@@ -18,12 +18,6 @@ struct device_node;</div><div class='ctx'>  */</div><div class='ctx'> #define RECLAIM_DISTANCE 10</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Avoid creating an extra level of balancing (SD_ALLNODES) on the largest</div><div class='del'>- * POWER7 boxes which have a maximum of 32 nodes.</div><div class='del'>- */</div><div class='del'>-#define SD_NODES_PER_DOMAIN 32</div><div class='del'>-</div><div class='ctx'> #include &lt;asm/mmzone.h&gt;</div><div class='ctx'> </div><div class='ctx'> static inline int cpu_to_node(int cpu)</div><div class='hunk'>@@ -51,36 +45,6 @@ static inline int pcibus_to_node(struct pci_bus *bus)</div><div class='ctx'> 				 cpu_all_mask :				\</div><div class='ctx'> 				 cpumask_of_node(pcibus_to_node(bus)))</div><div class='ctx'> </div><div class='del'>-/* sched_domains SD_NODE_INIT for PPC64 machines */</div><div class='del'>-#define SD_NODE_INIT (struct sched_domain) {				\</div><div class='del'>-	.min_interval		= 8,					\</div><div class='del'>-	.max_interval		= 32,					\</div><div class='del'>-	.busy_factor		= 32,					\</div><div class='del'>-	.imbalance_pct		= 125,					\</div><div class='del'>-	.cache_nice_tries	= 1,					\</div><div class='del'>-	.busy_idx		= 3,					\</div><div class='del'>-	.idle_idx		= 1,					\</div><div class='del'>-	.newidle_idx		= 0,					\</div><div class='del'>-	.wake_idx		= 0,					\</div><div class='del'>-	.forkexec_idx		= 0,					\</div><div class='del'>-									\</div><div class='del'>-	.flags			= 1*SD_LOAD_BALANCE			\</div><div class='del'>-				| 0*SD_BALANCE_NEWIDLE			\</div><div class='del'>-				| 1*SD_BALANCE_EXEC			\</div><div class='del'>-				| 1*SD_BALANCE_FORK			\</div><div class='del'>-				| 0*SD_BALANCE_WAKE			\</div><div class='del'>-				| 1*SD_WAKE_AFFINE			\</div><div class='del'>-				| 0*SD_PREFER_LOCAL			\</div><div class='del'>-				| 0*SD_SHARE_CPUPOWER			\</div><div class='del'>-				| 0*SD_POWERSAVINGS_BALANCE		\</div><div class='del'>-				| 0*SD_SHARE_PKG_RESOURCES		\</div><div class='del'>-				| 1*SD_SERIALIZE			\</div><div class='del'>-				| 0*SD_PREFER_SIBLING			\</div><div class='del'>-				,					\</div><div class='del'>-	.last_balance		= jiffies,				\</div><div class='del'>-	.balance_interval	= 1,					\</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> extern int __node_distance(int, int);</div><div class='ctx'> #define node_distance(a, b) __node_distance(a, b)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/asm/uaccess.h b/arch/powerpc/include/asm/uaccess.h<br/>index bd0fb8495154..17bb40cad5bf 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/uaccess.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/uaccess.h</a></div><div class='hunk'>@@ -40,6 +40,8 @@</div><div class='ctx'> </div><div class='ctx'> #define segment_eq(a, b)	((a).seg == (b).seg)</div><div class='ctx'> </div><div class='add'>+#define user_addr_max()	(get_fs().seg)</div><div class='add'>+</div><div class='ctx'> #ifdef __powerpc64__</div><div class='ctx'> /*</div><div class='ctx'>  * This check is sufficient because there is a large enough</div><div class='hunk'>@@ -453,42 +455,9 @@ static inline unsigned long clear_user(void __user *addr, unsigned long size)</div><div class='ctx'> 	return size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern int __strncpy_from_user(char *dst, const char __user *src, long count);</div><div class='del'>-</div><div class='del'>-static inline long strncpy_from_user(char *dst, const char __user *src,</div><div class='del'>-		long count)</div><div class='del'>-{</div><div class='del'>-	might_sleep();</div><div class='del'>-	if (likely(access_ok(VERIFY_READ, src, 1)))</div><div class='del'>-		return __strncpy_from_user(dst, src, count);</div><div class='del'>-	return -EFAULT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Return the size of a string (including the ending 0)</div><div class='del'>- *</div><div class='del'>- * Return 0 for error</div><div class='del'>- */</div><div class='del'>-extern int __strnlen_user(const char __user *str, long len, unsigned long top);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Returns the length of the string at str (including the null byte),</div><div class='del'>- * or 0 if we hit a page we can't access,</div><div class='del'>- * or something &gt; len if we didn't find a null byte.</div><div class='del'>- *</div><div class='del'>- * The `top' parameter to __strnlen_user is to make sure that</div><div class='del'>- * we can never overflow from the user area into kernel space.</div><div class='del'>- */</div><div class='del'>-static inline int strnlen_user(const char __user *str, long len)</div><div class='del'>-{</div><div class='del'>-	unsigned long top = current-&gt;thread.fs.seg;</div><div class='del'>-</div><div class='del'>-	if ((unsigned long)str &gt; top)</div><div class='del'>-		return 0;</div><div class='del'>-	return __strnlen_user(str, len, top);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define strlen_user(str)	strnlen_user((str), 0x7ffffffe)</div><div class='add'>+extern long strncpy_from_user(char *dst, const char __user *src, long count);</div><div class='add'>+extern __must_check long strlen_user(const char __user *str);</div><div class='add'>+extern __must_check long strnlen_user(const char __user *str, long n);</div><div class='ctx'> </div><div class='ctx'> #endif  /* __ASSEMBLY__ */</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='head'>diff --git a/arch/powerpc/include/asm/vio.h b/arch/powerpc/include/asm/vio.h<br/>index 6bfd5ffe1d4f..b19adf751dd9 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/include/asm/vio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/include/asm/vio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/vio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/vio.h</a></div><div class='hunk'>@@ -46,6 +46,48 @@</div><div class='ctx'> </div><div class='ctx'> struct iommu_table;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Platform Facilities Option (PFO)-specific data</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Starting unit address for PFO devices on the VIO BUS */</div><div class='add'>+#define VIO_BASE_PFO_UA	0x50000000</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vio_pfo_op - PFO operation parameters</div><div class='add'>+ *</div><div class='add'>+ * @flags: h_call subfunctions and modifiers</div><div class='add'>+ * @in: Input data block logical real address</div><div class='add'>+ * @inlen: If non-negative, the length of the input data block.  If negative,</div><div class='add'>+ *	the length of the input data descriptor list in bytes.</div><div class='add'>+ * @out: Output data block logical real address</div><div class='add'>+ * @outlen: If non-negative, the length of the input data block.  If negative,</div><div class='add'>+ *	the length of the input data descriptor list in bytes.</div><div class='add'>+ * @csbcpb: Logical real address of the 4k naturally-aligned storage block</div><div class='add'>+ *	containing the CSB &amp; optional FC field specific CPB</div><div class='add'>+ * @timeout: # of milliseconds to retry h_call, 0 for no timeout.</div><div class='add'>+ * @hcall_err: pointer to return the h_call return value, else NULL</div><div class='add'>+ */</div><div class='add'>+struct vio_pfo_op {</div><div class='add'>+	u64 flags;</div><div class='add'>+	s64 in;</div><div class='add'>+	s64 inlen;</div><div class='add'>+	s64 out;</div><div class='add'>+	s64 outlen;</div><div class='add'>+	u64 csbcpb;</div><div class='add'>+	void *done;</div><div class='add'>+	unsigned long handle;</div><div class='add'>+	unsigned int timeout;</div><div class='add'>+	long hcall_err;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* End PFO specific data */</div><div class='add'>+</div><div class='add'>+enum vio_dev_family {</div><div class='add'>+	VDEVICE,	/* The OF node is a child of /vdevice */</div><div class='add'>+	PFO,		/* The OF node is a child of /ibm,platform-facilities */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * vio_dev - This structure is used to describe virtual I/O devices.</div><div class='ctx'>  *</div><div class='hunk'>@@ -58,6 +100,7 @@ struct vio_dev {</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	const char *type;</div><div class='ctx'> 	uint32_t unit_address;</div><div class='add'>+	uint32_t resource_id;</div><div class='ctx'> 	unsigned int irq;</div><div class='ctx'> 	struct {</div><div class='ctx'> 		size_t desired;</div><div class='hunk'>@@ -65,6 +108,7 @@ struct vio_dev {</div><div class='ctx'> 		size_t allocated;</div><div class='ctx'> 		atomic_t allocs_failed;</div><div class='ctx'> 	} cmo;</div><div class='add'>+	enum vio_dev_family family;</div><div class='ctx'> 	struct device dev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -95,6 +139,8 @@ extern void vio_cmo_set_dev_desired(struct vio_dev *viodev, size_t desired);</div><div class='ctx'> </div><div class='ctx'> extern void __devinit vio_unregister_device(struct vio_dev *dev);</div><div class='ctx'> </div><div class='add'>+extern int vio_h_cop_sync(struct vio_dev *vdev, struct vio_pfo_op *op);</div><div class='add'>+</div><div class='ctx'> struct device_node;</div><div class='ctx'> </div><div class='ctx'> extern struct vio_dev *vio_register_device_node(</div><div class='head'>diff --git a/arch/powerpc/include/asm/word-at-a-time.h b/arch/powerpc/include/asm/word-at-a-time.h<br/>new file mode 100644<br/>index 000000000000..d0b6d4ac6dda<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/include/asm/word-at-a-time.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/include/asm/word-at-a-time.h</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+#ifndef _ASM_WORD_AT_A_TIME_H</div><div class='add'>+#define _ASM_WORD_AT_A_TIME_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Word-at-a-time interfaces for PowerPC.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;asm/asm-compat.h&gt;</div><div class='add'>+</div><div class='add'>+struct word_at_a_time {</div><div class='add'>+	const unsigned long high_bits, low_bits;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define WORD_AT_A_TIME_CONSTANTS { REPEAT_BYTE(0xfe) + 1, REPEAT_BYTE(0x7f) }</div><div class='add'>+</div><div class='add'>+/* Bit set in the bytes that have a zero */</div><div class='add'>+static inline long prep_zero_mask(unsigned long val, unsigned long rhs, const struct word_at_a_time *c)</div><div class='add'>+{</div><div class='add'>+	unsigned long mask = (val &amp; c-&gt;low_bits) + c-&gt;low_bits;</div><div class='add'>+	return ~(mask | rhs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define create_zero_mask(mask) (mask)</div><div class='add'>+</div><div class='add'>+static inline long find_zero(unsigned long mask)</div><div class='add'>+{</div><div class='add'>+	long leading_zero_bits;</div><div class='add'>+</div><div class='add'>+	asm (PPC_CNTLZL "%0,%1" : "=r" (leading_zero_bits) : "r" (mask));</div><div class='add'>+	return leading_zero_bits &gt;&gt; 3;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool has_zero(unsigned long val, unsigned long *data, const struct word_at_a_time *c)</div><div class='add'>+{</div><div class='add'>+	unsigned long rhs = val | c-&gt;low_bits;</div><div class='add'>+	*data = rhs;</div><div class='add'>+	return (val + c-&gt;high_bits) &amp; ~rhs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_WORD_AT_A_TIME_H */</div><div class='head'>diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile<br/>index f5808a35688c..83afacd3ba7b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/Makefile</a></div><div class='hunk'>@@ -28,7 +28,7 @@ endif</div><div class='ctx'> </div><div class='ctx'> obj-y				:= cputable.o ptrace.o syscalls.o \</div><div class='ctx'> 				   irq.o align.o signal_32.o pmc.o vdso.o \</div><div class='del'>-				   init_task.o process.o systbl.o idle.o \</div><div class='add'>+				   process.o systbl.o idle.o \</div><div class='ctx'> 				   signal.o sysfs.o cacheinfo.o time.o \</div><div class='ctx'> 				   prom.o traps.o setup-common.o \</div><div class='ctx'> 				   udbg.o misc.o io.o dma.o \</div><div class='head'>diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c<br/>index 34b8afe94a50..52c7ad78242e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/asm-offsets.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/asm-offsets.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/asm-offsets.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -116,6 +116,9 @@ int main(void)</div><div class='ctx'> #ifdef CONFIG_KVM_BOOK3S_32_HANDLER</div><div class='ctx'> 	DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu));</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu));</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));</div><div class='ctx'> 	DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));</div><div class='hunk'>@@ -188,10 +191,6 @@ int main(void)</div><div class='ctx'> 	DEFINE(SLBSHADOW_STACKESID,</div><div class='ctx'> 	       offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));</div><div class='ctx'> 	DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));</div><div class='del'>-	DEFINE(LPPACASRR0, offsetof(struct lppaca, saved_srr0));</div><div class='del'>-	DEFINE(LPPACASRR1, offsetof(struct lppaca, saved_srr1));</div><div class='del'>-	DEFINE(LPPACAANYINT, offsetof(struct lppaca, int_dword.any_int));</div><div class='del'>-	DEFINE(LPPACADECRINT, offsetof(struct lppaca, int_dword.fields.decr_int));</div><div class='ctx'> 	DEFINE(LPPACA_PMCINUSE, offsetof(struct lppaca, pmcregs_in_use));</div><div class='ctx'> 	DEFINE(LPPACA_DTLIDX, offsetof(struct lppaca, dtl_idx));</div><div class='ctx'> 	DEFINE(LPPACA_YIELDCOUNT, offsetof(struct lppaca, yield_count));</div><div class='hunk'>@@ -387,6 +386,7 @@ int main(void)</div><div class='ctx'> #ifdef CONFIG_KVM</div><div class='ctx'> 	DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));</div><div class='ctx'> 	DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));</div><div class='add'>+	DEFINE(VCPU_GUEST_PID, offsetof(struct kvm_vcpu, arch.pid));</div><div class='ctx'> 	DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));</div><div class='ctx'> 	DEFINE(VCPU_VRSAVE, offsetof(struct kvm_vcpu, arch.vrsave));</div><div class='ctx'> 	DEFINE(VCPU_FPRS, offsetof(struct kvm_vcpu, arch.fpr));</div><div class='hunk'>@@ -429,9 +429,11 @@ int main(void)</div><div class='ctx'> 	DEFINE(VCPU_SHARED_MAS4, offsetof(struct kvm_vcpu_arch_shared, mas4));</div><div class='ctx'> 	DEFINE(VCPU_SHARED_MAS6, offsetof(struct kvm_vcpu_arch_shared, mas6));</div><div class='ctx'> </div><div class='add'>+	DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));</div><div class='add'>+	DEFINE(KVM_LPID, offsetof(struct kvm, arch.lpid));</div><div class='add'>+</div><div class='ctx'> 	/* book3s */</div><div class='ctx'> #ifdef CONFIG_KVM_BOOK3S_64_HV</div><div class='del'>-	DEFINE(KVM_LPID, offsetof(struct kvm, arch.lpid));</div><div class='ctx'> 	DEFINE(KVM_SDR1, offsetof(struct kvm, arch.sdr1));</div><div class='ctx'> 	DEFINE(KVM_HOST_LPID, offsetof(struct kvm, arch.host_lpid));</div><div class='ctx'> 	DEFINE(KVM_HOST_LPCR, offsetof(struct kvm, arch.host_lpcr));</div><div class='hunk'>@@ -444,9 +446,9 @@ int main(void)</div><div class='ctx'> 	DEFINE(KVM_VRMA_SLB_V, offsetof(struct kvm, arch.vrma_slb_v));</div><div class='ctx'> 	DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr));</div><div class='ctx'> 	DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));</div><div class='add'>+	DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa.pinned_addr));</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S</div><div class='del'>-	DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));</div><div class='ctx'> 	DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));</div><div class='ctx'> 	DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr));</div><div class='ctx'> 	DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr));</div><div class='hunk'>@@ -461,7 +463,6 @@ int main(void)</div><div class='ctx'> 	DEFINE(VCPU_PENDING_EXC, offsetof(struct kvm_vcpu, arch.pending_exceptions));</div><div class='ctx'> 	DEFINE(VCPU_CEDED, offsetof(struct kvm_vcpu, arch.ceded));</div><div class='ctx'> 	DEFINE(VCPU_PRODDED, offsetof(struct kvm_vcpu, arch.prodded));</div><div class='del'>-	DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa));</div><div class='ctx'> 	DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr));</div><div class='ctx'> 	DEFINE(VCPU_PMC, offsetof(struct kvm_vcpu, arch.pmc));</div><div class='ctx'> 	DEFINE(VCPU_SLB, offsetof(struct kvm_vcpu, arch.slb));</div><div class='hunk'>@@ -537,6 +538,8 @@ int main(void)</div><div class='ctx'> 	HSTATE_FIELD(HSTATE_NAPPING, napping);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KVM_BOOK3S_64_HV</div><div class='add'>+	HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);</div><div class='add'>+	HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);</div><div class='ctx'> 	HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);</div><div class='ctx'> 	HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);</div><div class='ctx'> 	HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);</div><div class='hunk'>@@ -597,6 +600,12 @@ int main(void)</div><div class='ctx'> 	DEFINE(VCPU_HOST_SPEFSCR, offsetof(struct kvm_vcpu, arch.host_spefscr));</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4));</div><div class='add'>+	DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6));</div><div class='add'>+	DEFINE(VCPU_EPLC, offsetof(struct kvm_vcpu, arch.eplc));</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_KVM_EXIT_TIMING</div><div class='ctx'> 	DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,</div><div class='ctx'> 						arch.timing_exit.tv32.tbu));</div><div class='head'>diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S<br/>index 8053db02b85e..69fdd2322a66 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/cpu_setup_fsl_booke.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/cpu_setup_fsl_booke.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/cpu_setup_fsl_booke.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/cpu_setup_fsl_booke.S</a></div><div class='hunk'>@@ -73,6 +73,7 @@ _GLOBAL(__setup_cpu_e500v2)</div><div class='ctx'> 	mtlr	r4</div><div class='ctx'> 	blr</div><div class='ctx'> _GLOBAL(__setup_cpu_e500mc)</div><div class='add'>+	mr	r5, r4</div><div class='ctx'> 	mflr	r4</div><div class='ctx'> 	bl	__e500_icache_setup</div><div class='ctx'> 	bl	__e500_dcache_setup</div><div class='head'>diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S<br/>index f8a7a1a1a9f4..ed1718feb9d9 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/entry_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/entry_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/entry_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/entry_64.S</a></div><div class='hunk'>@@ -63,15 +63,9 @@ system_call_common:</div><div class='ctx'> 	std	r0,GPR0(r1)</div><div class='ctx'> 	std	r10,GPR1(r1)</div><div class='ctx'> 	ACCOUNT_CPU_USER_ENTRY(r10, r11)</div><div class='del'>-	/*</div><div class='del'>-	 * This "crclr so" clears CR0.SO, which is the error indication on</div><div class='del'>-	 * return from this system call.  There must be no cmp instruction</div><div class='del'>-	 * between it and the "mfcr r9" below, otherwise if XER.SO is set,</div><div class='del'>-	 * CR0.SO will get set, causing all system calls to appear to fail.</div><div class='del'>-	 */</div><div class='del'>-	crclr	so</div><div class='ctx'> 	std	r2,GPR2(r1)</div><div class='ctx'> 	std	r3,GPR3(r1)</div><div class='add'>+	mfcr	r2</div><div class='ctx'> 	std	r4,GPR4(r1)</div><div class='ctx'> 	std	r5,GPR5(r1)</div><div class='ctx'> 	std	r6,GPR6(r1)</div><div class='hunk'>@@ -82,18 +76,20 @@ system_call_common:</div><div class='ctx'> 	std	r11,GPR10(r1)</div><div class='ctx'> 	std	r11,GPR11(r1)</div><div class='ctx'> 	std	r11,GPR12(r1)</div><div class='add'>+	std	r11,_XER(r1)</div><div class='add'>+	std	r11,_CTR(r1)</div><div class='ctx'> 	std	r9,GPR13(r1)</div><div class='del'>-	mfcr	r9</div><div class='ctx'> 	mflr	r10</div><div class='add'>+	/*</div><div class='add'>+	 * This clears CR0.SO (bit 28), which is the error indication on</div><div class='add'>+	 * return from this system call.</div><div class='add'>+	 */</div><div class='add'>+	rldimi	r2,r11,28,(63-28)</div><div class='ctx'> 	li	r11,0xc01</div><div class='del'>-	std	r9,_CCR(r1)</div><div class='ctx'> 	std	r10,_LINK(r1)</div><div class='ctx'> 	std	r11,_TRAP(r1)</div><div class='del'>-	mfxer	r9</div><div class='del'>-	mfctr	r10</div><div class='del'>-	std	r9,_XER(r1)</div><div class='del'>-	std	r10,_CTR(r1)</div><div class='ctx'> 	std	r3,ORIG_GPR3(r1)</div><div class='add'>+	std	r2,_CCR(r1)</div><div class='ctx'> 	ld	r2,PACATOC(r13)</div><div class='ctx'> 	addi	r9,r1,STACK_FRAME_OVERHEAD</div><div class='ctx'> 	ld	r11,exception_marker@toc(r2)</div><div class='hunk'>@@ -154,7 +150,7 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)</div><div class='ctx'> 	ld	r10,TI_FLAGS(r11)</div><div class='ctx'> 	andi.	r11,r10,_TIF_SYSCALL_T_OR_A</div><div class='ctx'> 	bne-	syscall_dotrace</div><div class='del'>-syscall_dotrace_cont:</div><div class='add'>+.Lsyscall_dotrace_cont:</div><div class='ctx'> 	cmpldi	0,r0,NR_syscalls</div><div class='ctx'> 	bge-	syscall_enosys</div><div class='ctx'> </div><div class='hunk'>@@ -211,7 +207,7 @@ syscall_exit:</div><div class='ctx'> 	cmpld	r3,r11</div><div class='ctx'> 	ld	r5,_CCR(r1)</div><div class='ctx'> 	bge-	syscall_error</div><div class='del'>-syscall_error_cont:</div><div class='add'>+.Lsyscall_error_cont:</div><div class='ctx'> 	ld	r7,_NIP(r1)</div><div class='ctx'> BEGIN_FTR_SECTION</div><div class='ctx'> 	stdcx.	r0,0,r1			/* to clear the reservation */</div><div class='hunk'>@@ -246,7 +242,7 @@ syscall_error:</div><div class='ctx'> 	oris	r5,r5,0x1000	/* Set SO bit in CR */</div><div class='ctx'> 	neg	r3,r3</div><div class='ctx'> 	std	r5,_CCR(r1)</div><div class='del'>-	b	syscall_error_cont</div><div class='add'>+	b	.Lsyscall_error_cont</div><div class='ctx'> 	</div><div class='ctx'> /* Traced system call support */</div><div class='ctx'> syscall_dotrace:</div><div class='hunk'>@@ -268,7 +264,7 @@ syscall_dotrace:</div><div class='ctx'> 	addi	r9,r1,STACK_FRAME_OVERHEAD</div><div class='ctx'> 	clrrdi	r10,r1,THREAD_SHIFT</div><div class='ctx'> 	ld	r10,TI_FLAGS(r10)</div><div class='del'>-	b	syscall_dotrace_cont</div><div class='add'>+	b	.Lsyscall_dotrace_cont</div><div class='ctx'> </div><div class='ctx'> syscall_enosys:</div><div class='ctx'> 	li	r3,-ENOSYS</div><div class='hunk'>@@ -588,23 +584,19 @@ _GLOBAL(ret_from_except_lite)</div><div class='ctx'> fast_exc_return_irq:</div><div class='ctx'> restore:</div><div class='ctx'> 	/*</div><div class='del'>-	 * This is the main kernel exit path, we first check if we</div><div class='del'>-	 * have to change our interrupt state.</div><div class='add'>+	 * This is the main kernel exit path. First we check if we</div><div class='add'>+	 * are about to re-enable interrupts</div><div class='ctx'> 	 */</div><div class='ctx'> 	ld	r5,SOFTE(r1)</div><div class='ctx'> 	lbz	r6,PACASOFTIRQEN(r13)</div><div class='del'>-	cmpwi	cr1,r5,0</div><div class='del'>-	cmpw	cr0,r5,r6</div><div class='del'>-	beq	cr0,4f</div><div class='add'>+	cmpwi	cr0,r5,0</div><div class='add'>+	beq	restore_irq_off</div><div class='ctx'> </div><div class='del'>-	/* We do, handle disable first, which is easy */</div><div class='del'>-	bne	cr1,3f;</div><div class='del'>- 	li	r0,0</div><div class='del'>-	stb	r0,PACASOFTIRQEN(r13);</div><div class='del'>-	TRACE_DISABLE_INTS</div><div class='del'>-	b	4f</div><div class='add'>+	/* We are enabling, were we already enabled ? Yes, just return */</div><div class='add'>+	cmpwi	cr0,r6,1</div><div class='add'>+	beq	cr0,do_restore</div><div class='ctx'> </div><div class='del'>-3:	/*</div><div class='add'>+	/*</div><div class='ctx'> 	 * We are about to soft-enable interrupts (we are hard disabled</div><div class='ctx'> 	 * at this point). We check if there's anything that needs to</div><div class='ctx'> 	 * be replayed first.</div><div class='hunk'>@@ -626,7 +618,7 @@ restore_no_replay:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Final return path. BookE is handled in a different file</div><div class='ctx'> 	 */</div><div class='del'>-4:</div><div class='add'>+do_restore:</div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3E</div><div class='ctx'> 	b	.exception_return_book3e</div><div class='ctx'> #else</div><div class='hunk'>@@ -700,6 +692,25 @@ fast_exception_return:</div><div class='ctx'> #endif /* CONFIG_PPC_BOOK3E */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * We are returning to a context with interrupts soft disabled.</div><div class='add'>+	 *</div><div class='add'>+	 * However, we may also about to hard enable, so we need to</div><div class='add'>+	 * make sure that in this case, we also clear PACA_IRQ_HARD_DIS</div><div class='add'>+	 * or that bit can get out of sync and bad things will happen</div><div class='add'>+	 */</div><div class='add'>+restore_irq_off:</div><div class='add'>+	ld	r3,_MSR(r1)</div><div class='add'>+	lbz	r7,PACAIRQHAPPENED(r13)</div><div class='add'>+	andi.	r0,r3,MSR_EE</div><div class='add'>+	beq	1f</div><div class='add'>+	rlwinm	r7,r7,0,~PACA_IRQ_HARD_DIS</div><div class='add'>+	stb	r7,PACAIRQHAPPENED(r13)</div><div class='add'>+1:	li	r0,0</div><div class='add'>+	stb	r0,PACASOFTIRQEN(r13);</div><div class='add'>+	TRACE_DISABLE_INTS</div><div class='add'>+	b	do_restore</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * Something did happen, check if a re-emit is needed</div><div class='ctx'> 	 * (this also clears paca-&gt;irq_happened)</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -748,6 +759,9 @@ restore_check_irq_replay:</div><div class='ctx'> #endif /* CONFIG_PPC_BOOK3E */</div><div class='ctx'> 1:	b	.ret_from_except /* What else to do here ? */</div><div class='ctx'>  </div><div class='add'>+</div><div class='add'>+</div><div class='add'>+3:</div><div class='ctx'> do_work:</div><div class='ctx'> #ifdef CONFIG_PREEMPT</div><div class='ctx'> 	andi.	r0,r3,MSR_PR	/* Returning to user mode? */</div><div class='hunk'>@@ -767,16 +781,6 @@ do_work:</div><div class='ctx'> 	SOFT_DISABLE_INTS(r3,r4)</div><div class='ctx'> 1:	bl	.preempt_schedule_irq</div><div class='ctx'> </div><div class='del'>-	/* Hard-disable interrupts again (and update PACA) */</div><div class='del'>-#ifdef CONFIG_PPC_BOOK3E</div><div class='del'>-	wrteei	0</div><div class='del'>-#else</div><div class='del'>-	ld	r10,PACAKMSR(r13) /* Get kernel MSR without EE */</div><div class='del'>-	mtmsrd	r10,1</div><div class='del'>-#endif /* CONFIG_PPC_BOOK3E */</div><div class='del'>-	li	r0,PACA_IRQ_HARD_DIS</div><div class='del'>-	stb	r0,PACAIRQHAPPENED(r13)</div><div class='del'>-</div><div class='ctx'> 	/* Re-test flags and eventually loop */</div><div class='ctx'> 	clrrdi	r9,r1,THREAD_SHIFT</div><div class='ctx'> 	ld	r4,TI_FLAGS(r9)</div><div class='hunk'>@@ -787,14 +791,6 @@ do_work:</div><div class='ctx'> user_work:</div><div class='ctx'> #endif /* CONFIG_PREEMPT */</div><div class='ctx'> </div><div class='del'>-	/* Enable interrupts */</div><div class='del'>-#ifdef CONFIG_PPC_BOOK3E</div><div class='del'>-	wrteei	1</div><div class='del'>-#else</div><div class='del'>-	ori	r10,r10,MSR_EE</div><div class='del'>-	mtmsrd	r10,1</div><div class='del'>-#endif /* CONFIG_PPC_BOOK3E */</div><div class='del'>-</div><div class='ctx'> 	andi.	r0,r4,_TIF_NEED_RESCHED</div><div class='ctx'> 	beq	1f</div><div class='ctx'> 	bl	.restore_interrupts</div><div class='head'>diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S<br/>index cb705fdbb458..1c06d2971545 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/exceptions-64s.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/exceptions-64s.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/exceptions-64s.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/exceptions-64s.S</a></div><div class='hunk'>@@ -63,11 +63,13 @@ BEGIN_FTR_SECTION</div><div class='ctx'> 	GET_PACA(r13)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KVM_BOOK3S_64_HV</div><div class='del'>-	lbz	r0,PACAPROCSTART(r13)</div><div class='del'>-	cmpwi	r0,0x80</div><div class='del'>-	bne	1f</div><div class='del'>-	li	r0,1</div><div class='del'>-	stb	r0,PACAPROCSTART(r13)</div><div class='add'>+	li	r0,KVM_HWTHREAD_IN_KERNEL</div><div class='add'>+	stb	r0,HSTATE_HWTHREAD_STATE(r13)</div><div class='add'>+	/* Order setting hwthread_state vs. testing hwthread_req */</div><div class='add'>+	sync</div><div class='add'>+	lbz	r0,HSTATE_HWTHREAD_REQ(r13)</div><div class='add'>+	cmpwi	r0,0</div><div class='add'>+	beq	1f</div><div class='ctx'> 	b	kvm_start_guest</div><div class='ctx'> 1:</div><div class='ctx'> #endif</div><div class='hunk'>@@ -94,12 +96,10 @@ machine_check_pSeries_1:</div><div class='ctx'> data_access_pSeries:</div><div class='ctx'> 	HMT_MEDIUM</div><div class='ctx'> 	SET_SCRATCH0(r13)</div><div class='del'>-#ifndef CONFIG_POWER4_ONLY</div><div class='ctx'> BEGIN_FTR_SECTION</div><div class='ctx'> 	b	data_access_check_stab</div><div class='ctx'> data_access_not_stab:</div><div class='ctx'> END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)</div><div class='del'>-#endif</div><div class='ctx'> 	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,</div><div class='ctx'> 				 KVMTEST, 0x300)</div><div class='ctx'> </div><div class='hunk'>@@ -301,7 +301,6 @@ machine_check_fwnmi:</div><div class='ctx'> 				 EXC_STD, KVMTEST, 0x200)</div><div class='ctx'> 	KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_POWER4_ONLY</div><div class='ctx'> 	/* moved from 0x300 */</div><div class='ctx'> data_access_check_stab:</div><div class='ctx'> 	GET_PACA(r13)</div><div class='hunk'>@@ -328,7 +327,6 @@ do_stab_bolted_pSeries:</div><div class='ctx'> 	GET_SCRATCH0(r10)</div><div class='ctx'> 	std	r10,PACA_EXSLB+EX_R13(r13)</div><div class='ctx'> 	EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)</div><div class='del'>-#endif /* CONFIG_POWER4_ONLY */</div><div class='ctx'> </div><div class='ctx'> 	KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)</div><div class='ctx'> 	KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)</div><div class='hunk'>@@ -768,8 +766,8 @@ alignment_common:</div><div class='ctx'> 	std	r3,_DAR(r1)</div><div class='ctx'> 	std	r4,_DSISR(r1)</div><div class='ctx'> 	bl	.save_nvgprs</div><div class='add'>+	DISABLE_INTS</div><div class='ctx'> 	addi	r3,r1,STACK_FRAME_OVERHEAD</div><div class='del'>-	ENABLE_INTS</div><div class='ctx'> 	bl	.alignment_exception</div><div class='ctx'> 	b	.ret_from_except</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S<br/>index 7dd2981bcc50..7a2e5e421abf 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/head_44x.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/head_44x.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/head_44x.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/head_44x.S</a></div><div class='hunk'>@@ -248,10 +248,11 @@ _ENTRY(_start);</div><div class='ctx'> </div><div class='ctx'> interrupt_base:</div><div class='ctx'> 	/* Critical Input Interrupt */</div><div class='del'>-	CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)</div><div class='add'>+	CRITICAL_EXCEPTION(0x0100, CRITICAL, CriticalInput, unknown_exception)</div><div class='ctx'> </div><div class='ctx'> 	/* Machine Check Interrupt */</div><div class='del'>-	CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)</div><div class='add'>+	CRITICAL_EXCEPTION(0x0200, MACHINE_CHECK, MachineCheck, \</div><div class='add'>+			   machine_check_exception)</div><div class='ctx'> 	MCHECK_EXCEPTION(0x0210, MachineCheckA, machine_check_exception)</div><div class='ctx'> </div><div class='ctx'> 	/* Data Storage Interrupt */</div><div class='hunk'>@@ -261,7 +262,8 @@ interrupt_base:</div><div class='ctx'> 	INSTRUCTION_STORAGE_EXCEPTION</div><div class='ctx'> </div><div class='ctx'> 	/* External Input Interrupt */</div><div class='del'>-	EXCEPTION(0x0500, ExternalInput, do_IRQ, EXC_XFER_LITE)</div><div class='add'>+	EXCEPTION(0x0500, BOOKE_INTERRUPT_EXTERNAL, ExternalInput, \</div><div class='add'>+		  do_IRQ, EXC_XFER_LITE)</div><div class='ctx'> </div><div class='ctx'> 	/* Alignment Interrupt */</div><div class='ctx'> 	ALIGNMENT_EXCEPTION</div><div class='hunk'>@@ -273,29 +275,32 @@ interrupt_base:</div><div class='ctx'> #ifdef CONFIG_PPC_FPU</div><div class='ctx'> 	FP_UNAVAILABLE_EXCEPTION</div><div class='ctx'> #else</div><div class='del'>-	EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)</div><div class='add'>+	EXCEPTION(0x2010, BOOKE_INTERRUPT_FP_UNAVAIL, \</div><div class='add'>+		  FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)</div><div class='ctx'> #endif</div><div class='ctx'> 	/* System Call Interrupt */</div><div class='ctx'> 	START_EXCEPTION(SystemCall)</div><div class='del'>-	NORMAL_EXCEPTION_PROLOG</div><div class='add'>+	NORMAL_EXCEPTION_PROLOG(BOOKE_INTERRUPT_SYSCALL)</div><div class='ctx'> 	EXC_XFER_EE_LITE(0x0c00, DoSyscall)</div><div class='ctx'> </div><div class='ctx'> 	/* Auxiliary Processor Unavailable Interrupt */</div><div class='del'>-	EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)</div><div class='add'>+	EXCEPTION(0x2020, BOOKE_INTERRUPT_AP_UNAVAIL, \</div><div class='add'>+		  AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)</div><div class='ctx'> </div><div class='ctx'> 	/* Decrementer Interrupt */</div><div class='ctx'> 	DECREMENTER_EXCEPTION</div><div class='ctx'> </div><div class='ctx'> 	/* Fixed Internal Timer Interrupt */</div><div class='ctx'> 	/* TODO: Add FIT support */</div><div class='del'>-	EXCEPTION(0x1010, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)</div><div class='add'>+	EXCEPTION(0x1010, BOOKE_INTERRUPT_FIT, FixedIntervalTimer, \</div><div class='add'>+		  unknown_exception, EXC_XFER_EE)</div><div class='ctx'> </div><div class='ctx'> 	/* Watchdog Timer Interrupt */</div><div class='ctx'> 	/* TODO: Add watchdog support */</div><div class='ctx'> #ifdef CONFIG_BOOKE_WDT</div><div class='del'>-	CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException)</div><div class='add'>+	CRITICAL_EXCEPTION(0x1020, WATCHDOG, WatchdogTimer, WatchdogException)</div><div class='ctx'> #else</div><div class='del'>-	CRITICAL_EXCEPTION(0x1020, WatchdogTimer, unknown_exception)</div><div class='add'>+	CRITICAL_EXCEPTION(0x1020, WATCHDOG, WatchdogTimer, unknown_exception)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* Data TLB Error Interrupt */</div><div class='hunk'>@@ -778,14 +783,6 @@ _GLOBAL(__fixup_440A_mcheck)</div><div class='ctx'> 	blr</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * extern void giveup_altivec(struct task_struct *prev)</div><div class='del'>- *</div><div class='del'>- * The 44x core does not have an AltiVec unit.</div><div class='del'>- */</div><div class='del'>-_GLOBAL(giveup_altivec)</div><div class='del'>-	blr</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * extern void giveup_fpu(struct task_struct *prev)</div><div class='ctx'>  *</div><div class='ctx'>  * The 44x core does not have an FPU.</div><div class='head'>diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h<br/>index 0e4175388f47..5f051eeb93a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/head_booke.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/head_booke.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/head_booke.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/head_booke.h</a></div><div class='hunk'>@@ -2,6 +2,9 @@</div><div class='ctx'> #define __HEAD_BOOKE_H__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/ptrace.h&gt;	/* for STACK_FRAME_REGS_MARKER */</div><div class='add'>+#include &lt;asm/kvm_asm.h&gt;</div><div class='add'>+#include &lt;asm/kvm_booke_hv_asm.h&gt;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Macros used for common Book-e exception handling</div><div class='ctx'>  */</div><div class='hunk'>@@ -28,14 +31,15 @@</div><div class='ctx'>  */</div><div class='ctx'> #define THREAD_NORMSAVE(offset)	(THREAD_NORMSAVES + (offset * 4))</div><div class='ctx'> </div><div class='del'>-#define NORMAL_EXCEPTION_PROLOG						     \</div><div class='add'>+#define NORMAL_EXCEPTION_PROLOG(intno)						     \</div><div class='ctx'> 	mtspr	SPRN_SPRG_WSCRATCH0, r10;	/* save one register */	     \</div><div class='ctx'> 	mfspr	r10, SPRN_SPRG_THREAD;					     \</div><div class='ctx'> 	stw	r11, THREAD_NORMSAVE(0)(r10);				     \</div><div class='ctx'> 	stw	r13, THREAD_NORMSAVE(2)(r10);				     \</div><div class='ctx'> 	mfcr	r13;			/* save CR in r13 for now	   */\</div><div class='del'>-	mfspr	r11,SPRN_SRR1;		/* check whether user or kernel    */\</div><div class='del'>-	andi.	r11,r11,MSR_PR;						     \</div><div class='add'>+	mfspr	r11, SPRN_SRR1;		                                     \</div><div class='add'>+	DO_KVM	BOOKE_INTERRUPT_##intno SPRN_SRR1;			     \</div><div class='add'>+	andi.	r11, r11, MSR_PR;	/* check whether user or kernel    */\</div><div class='ctx'> 	mr	r11, r1;						     \</div><div class='ctx'> 	beq	1f;							     \</div><div class='ctx'> 	/* if from user, start at top of this thread's kernel stack */       \</div><div class='hunk'>@@ -113,7 +117,7 @@</div><div class='ctx'>  * registers as the normal prolog above. Instead we use a portion of the</div><div class='ctx'>  * critical/machine check exception stack at low physical addresses.</div><div class='ctx'>  */</div><div class='del'>-#define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \</div><div class='add'>+#define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, intno, exc_level_srr0, exc_level_srr1) \</div><div class='ctx'> 	mtspr	SPRN_SPRG_WSCRATCH_##exc_level,r8;			     \</div><div class='ctx'> 	BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \</div><div class='ctx'> 	stw	r9,GPR9(r8);		/* save various registers	   */\</div><div class='hunk'>@@ -121,8 +125,9 @@</div><div class='ctx'> 	stw	r10,GPR10(r8);						     \</div><div class='ctx'> 	stw	r11,GPR11(r8);						     \</div><div class='ctx'> 	stw	r9,_CCR(r8);		/* save CR on stack		   */\</div><div class='del'>-	mfspr	r10,exc_level_srr1;	/* check whether user or kernel    */\</div><div class='del'>-	andi.	r10,r10,MSR_PR;						     \</div><div class='add'>+	mfspr	r11,exc_level_srr1;	/* check whether user or kernel    */\</div><div class='add'>+	DO_KVM	BOOKE_INTERRUPT_##intno exc_level_srr1;		             \</div><div class='add'>+	andi.	r11,r11,MSR_PR;						     \</div><div class='ctx'> 	mfspr	r11,SPRN_SPRG_THREAD;	/* if from user, start at top of   */\</div><div class='ctx'> 	lwz	r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\</div><div class='ctx'> 	addi	r11,r11,EXC_LVL_FRAME_OVERHEAD;	/* allocate stack frame    */\</div><div class='hunk'>@@ -162,12 +167,30 @@</div><div class='ctx'> 	SAVE_4GPRS(3, r11);						     \</div><div class='ctx'> 	SAVE_2GPRS(7, r11)</div><div class='ctx'> </div><div class='del'>-#define CRITICAL_EXCEPTION_PROLOG \</div><div class='del'>-		EXC_LEVEL_EXCEPTION_PROLOG(CRIT, SPRN_CSRR0, SPRN_CSRR1)</div><div class='add'>+#define CRITICAL_EXCEPTION_PROLOG(intno) \</div><div class='add'>+		EXC_LEVEL_EXCEPTION_PROLOG(CRIT, intno, SPRN_CSRR0, SPRN_CSRR1)</div><div class='ctx'> #define DEBUG_EXCEPTION_PROLOG \</div><div class='del'>-		EXC_LEVEL_EXCEPTION_PROLOG(DBG, SPRN_DSRR0, SPRN_DSRR1)</div><div class='add'>+		EXC_LEVEL_EXCEPTION_PROLOG(DBG, DEBUG, SPRN_DSRR0, SPRN_DSRR1)</div><div class='ctx'> #define MCHECK_EXCEPTION_PROLOG \</div><div class='del'>-		EXC_LEVEL_EXCEPTION_PROLOG(MC, SPRN_MCSRR0, SPRN_MCSRR1)</div><div class='add'>+		EXC_LEVEL_EXCEPTION_PROLOG(MC, MACHINE_CHECK, \</div><div class='add'>+			SPRN_MCSRR0, SPRN_MCSRR1)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Guest Doorbell -- this is a bit odd in that uses GSRR0/1 despite</div><div class='add'>+ * being delivered to the host.  This exception can only happen</div><div class='add'>+ * inside a KVM guest -- so we just handle up to the DO_KVM rather</div><div class='add'>+ * than try to fit this into one of the existing prolog macros.</div><div class='add'>+ */</div><div class='add'>+#define GUEST_DOORBELL_EXCEPTION \</div><div class='add'>+	START_EXCEPTION(GuestDoorbell);					     \</div><div class='add'>+	mtspr	SPRN_SPRG_WSCRATCH0, r10;	/* save one register */	     \</div><div class='add'>+	mfspr	r10, SPRN_SPRG_THREAD;					     \</div><div class='add'>+	stw	r11, THREAD_NORMSAVE(0)(r10);				     \</div><div class='add'>+	mfspr	r11, SPRN_SRR1;		                                     \</div><div class='add'>+	stw	r13, THREAD_NORMSAVE(2)(r10);				     \</div><div class='add'>+	mfcr	r13;			/* save CR in r13 for now	   */\</div><div class='add'>+	DO_KVM	BOOKE_INTERRUPT_GUEST_DBELL SPRN_GSRR1;			     \</div><div class='add'>+	trap</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Exception vectors.</div><div class='hunk'>@@ -181,16 +204,16 @@ label:</div><div class='ctx'> 	.long	func;						\</div><div class='ctx'> 	.long	ret_from_except_full</div><div class='ctx'> </div><div class='del'>-#define EXCEPTION(n, label, hdlr, xfer)				\</div><div class='add'>+#define EXCEPTION(n, intno, label, hdlr, xfer)			\</div><div class='ctx'> 	START_EXCEPTION(label);					\</div><div class='del'>-	NORMAL_EXCEPTION_PROLOG;				\</div><div class='add'>+	NORMAL_EXCEPTION_PROLOG(intno);				\</div><div class='ctx'> 	addi	r3,r1,STACK_FRAME_OVERHEAD;			\</div><div class='ctx'> 	xfer(n, hdlr)</div><div class='ctx'> </div><div class='del'>-#define CRITICAL_EXCEPTION(n, label, hdlr)			\</div><div class='del'>-	START_EXCEPTION(label);					\</div><div class='del'>-	CRITICAL_EXCEPTION_PROLOG;				\</div><div class='del'>-	addi	r3,r1,STACK_FRAME_OVERHEAD;			\</div><div class='add'>+#define CRITICAL_EXCEPTION(n, intno, label, hdlr)			\</div><div class='add'>+	START_EXCEPTION(label);						\</div><div class='add'>+	CRITICAL_EXCEPTION_PROLOG(intno);				\</div><div class='add'>+	addi	r3,r1,STACK_FRAME_OVERHEAD;				\</div><div class='ctx'> 	EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL &amp; ~(MSR_ME|MSR_DE|MSR_CE)), \</div><div class='ctx'> 			  NOCOPY, crit_transfer_to_handler, \</div><div class='ctx'> 			  ret_from_crit_exc)</div><div class='hunk'>@@ -302,7 +325,7 @@ label:</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_CRIT_EXCEPTION						      \</div><div class='ctx'> 	START_EXCEPTION(DebugCrit);					      \</div><div class='del'>-	CRITICAL_EXCEPTION_PROLOG;					      \</div><div class='add'>+	CRITICAL_EXCEPTION_PROLOG(DEBUG);				      \</div><div class='ctx'> 									      \</div><div class='ctx'> 	/*								      \</div><div class='ctx'> 	 * If there is a single step or branch-taken exception in an	      \</div><div class='hunk'>@@ -355,7 +378,7 @@ label:</div><div class='ctx'> </div><div class='ctx'> #define DATA_STORAGE_EXCEPTION						      \</div><div class='ctx'> 	START_EXCEPTION(DataStorage)					      \</div><div class='del'>-	NORMAL_EXCEPTION_PROLOG;					      \</div><div class='add'>+	NORMAL_EXCEPTION_PROLOG(DATA_STORAGE);		      \</div><div class='ctx'> 	mfspr	r5,SPRN_ESR;		/* Grab the ESR and save it */	      \</div><div class='ctx'> 	stw	r5,_ESR(r11);						      \</div><div class='ctx'> 	mfspr	r4,SPRN_DEAR;		/* Grab the DEAR */		      \</div><div class='hunk'>@@ -363,7 +386,7 @@ label:</div><div class='ctx'> </div><div class='ctx'> #define INSTRUCTION_STORAGE_EXCEPTION					      \</div><div class='ctx'> 	START_EXCEPTION(InstructionStorage)				      \</div><div class='del'>-	NORMAL_EXCEPTION_PROLOG;					      \</div><div class='add'>+	NORMAL_EXCEPTION_PROLOG(INST_STORAGE);		      \</div><div class='ctx'> 	mfspr	r5,SPRN_ESR;		/* Grab the ESR and save it */	      \</div><div class='ctx'> 	stw	r5,_ESR(r11);						      \</div><div class='ctx'> 	mr      r4,r12;                 /* Pass SRR0 as arg2 */		      \</div><div class='hunk'>@@ -372,7 +395,7 @@ label:</div><div class='ctx'> </div><div class='ctx'> #define ALIGNMENT_EXCEPTION						      \</div><div class='ctx'> 	START_EXCEPTION(Alignment)					      \</div><div class='del'>-	NORMAL_EXCEPTION_PROLOG;					      \</div><div class='add'>+	NORMAL_EXCEPTION_PROLOG(ALIGNMENT);		      \</div><div class='ctx'> 	mfspr   r4,SPRN_DEAR;           /* Grab the DEAR and save it */	      \</div><div class='ctx'> 	stw     r4,_DEAR(r11);						      \</div><div class='ctx'> 	addi    r3,r1,STACK_FRAME_OVERHEAD;				      \</div><div class='hunk'>@@ -380,7 +403,7 @@ label:</div><div class='ctx'> </div><div class='ctx'> #define PROGRAM_EXCEPTION						      \</div><div class='ctx'> 	START_EXCEPTION(Program)					      \</div><div class='del'>-	NORMAL_EXCEPTION_PROLOG;					      \</div><div class='add'>+	NORMAL_EXCEPTION_PROLOG(PROGRAM);		      \</div><div class='ctx'> 	mfspr	r4,SPRN_ESR;		/* Grab the ESR and save it */	      \</div><div class='ctx'> 	stw	r4,_ESR(r11);						      \</div><div class='ctx'> 	addi	r3,r1,STACK_FRAME_OVERHEAD;				      \</div><div class='hunk'>@@ -388,7 +411,7 @@ label:</div><div class='ctx'> </div><div class='ctx'> #define DECREMENTER_EXCEPTION						      \</div><div class='ctx'> 	START_EXCEPTION(Decrementer)					      \</div><div class='del'>-	NORMAL_EXCEPTION_PROLOG;					      \</div><div class='add'>+	NORMAL_EXCEPTION_PROLOG(DECREMENTER);		      \</div><div class='ctx'> 	lis     r0,TSR_DIS@h;           /* Setup the DEC interrupt mask */    \</div><div class='ctx'> 	mtspr   SPRN_TSR,r0;		/* Clear the DEC interrupt */	      \</div><div class='ctx'> 	addi    r3,r1,STACK_FRAME_OVERHEAD;				      \</div><div class='hunk'>@@ -396,7 +419,7 @@ label:</div><div class='ctx'> </div><div class='ctx'> #define FP_UNAVAILABLE_EXCEPTION					      \</div><div class='ctx'> 	START_EXCEPTION(FloatingPointUnavailable)			      \</div><div class='del'>-	NORMAL_EXCEPTION_PROLOG;					      \</div><div class='add'>+	NORMAL_EXCEPTION_PROLOG(FP_UNAVAIL);		      \</div><div class='ctx'> 	beq	1f;							      \</div><div class='ctx'> 	bl	load_up_fpu;		/* if from user, just load it up */   \</div><div class='ctx'> 	b	fast_exception_return;					      \</div><div class='head'>diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S<br/>index 28e62598d0e8..1f4434a38608 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/head_fsl_booke.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/head_fsl_booke.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/head_fsl_booke.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/head_fsl_booke.S</a></div><div class='hunk'>@@ -301,19 +301,20 @@ _ENTRY(__early_start)</div><div class='ctx'> </div><div class='ctx'> interrupt_base:</div><div class='ctx'> 	/* Critical Input Interrupt */</div><div class='del'>-	CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)</div><div class='add'>+	CRITICAL_EXCEPTION(0x0100, CRITICAL, CriticalInput, unknown_exception)</div><div class='ctx'> </div><div class='ctx'> 	/* Machine Check Interrupt */</div><div class='ctx'> #ifdef CONFIG_E200</div><div class='ctx'> 	/* no RFMCI, MCSRRs on E200 */</div><div class='del'>-	CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)</div><div class='add'>+	CRITICAL_EXCEPTION(0x0200, MACHINE_CHECK, MachineCheck, \</div><div class='add'>+			   machine_check_exception)</div><div class='ctx'> #else</div><div class='ctx'> 	MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* Data Storage Interrupt */</div><div class='ctx'> 	START_EXCEPTION(DataStorage)</div><div class='del'>-	NORMAL_EXCEPTION_PROLOG</div><div class='add'>+	NORMAL_EXCEPTION_PROLOG(DATA_STORAGE)</div><div class='ctx'> 	mfspr	r5,SPRN_ESR		/* Grab the ESR, save it, pass arg3 */</div><div class='ctx'> 	stw	r5,_ESR(r11)</div><div class='ctx'> 	mfspr	r4,SPRN_DEAR		/* Grab the DEAR, save it, pass arg2 */</div><div class='hunk'>@@ -328,7 +329,7 @@ interrupt_base:</div><div class='ctx'> 	INSTRUCTION_STORAGE_EXCEPTION</div><div class='ctx'> </div><div class='ctx'> 	/* External Input Interrupt */</div><div class='del'>-	EXCEPTION(0x0500, ExternalInput, do_IRQ, EXC_XFER_LITE)</div><div class='add'>+	EXCEPTION(0x0500, EXTERNAL, ExternalInput, do_IRQ, EXC_XFER_LITE)</div><div class='ctx'> </div><div class='ctx'> 	/* Alignment Interrupt */</div><div class='ctx'> 	ALIGNMENT_EXCEPTION</div><div class='hunk'>@@ -342,32 +343,36 @@ interrupt_base:</div><div class='ctx'> #else</div><div class='ctx'> #ifdef CONFIG_E200</div><div class='ctx'> 	/* E200 treats 'normal' floating point instructions as FP Unavail exception */</div><div class='del'>-	EXCEPTION(0x0800, FloatingPointUnavailable, program_check_exception, EXC_XFER_EE)</div><div class='add'>+	EXCEPTION(0x0800, FP_UNAVAIL, FloatingPointUnavailable, \</div><div class='add'>+		  program_check_exception, EXC_XFER_EE)</div><div class='ctx'> #else</div><div class='del'>-	EXCEPTION(0x0800, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)</div><div class='add'>+	EXCEPTION(0x0800, FP_UNAVAIL, FloatingPointUnavailable, \</div><div class='add'>+		  unknown_exception, EXC_XFER_EE)</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* System Call Interrupt */</div><div class='ctx'> 	START_EXCEPTION(SystemCall)</div><div class='del'>-	NORMAL_EXCEPTION_PROLOG</div><div class='add'>+	NORMAL_EXCEPTION_PROLOG(SYSCALL)</div><div class='ctx'> 	EXC_XFER_EE_LITE(0x0c00, DoSyscall)</div><div class='ctx'> </div><div class='ctx'> 	/* Auxiliary Processor Unavailable Interrupt */</div><div class='del'>-	EXCEPTION(0x2900, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)</div><div class='add'>+	EXCEPTION(0x2900, AP_UNAVAIL, AuxillaryProcessorUnavailable, \</div><div class='add'>+		  unknown_exception, EXC_XFER_EE)</div><div class='ctx'> </div><div class='ctx'> 	/* Decrementer Interrupt */</div><div class='ctx'> 	DECREMENTER_EXCEPTION</div><div class='ctx'> </div><div class='ctx'> 	/* Fixed Internal Timer Interrupt */</div><div class='ctx'> 	/* TODO: Add FIT support */</div><div class='del'>-	EXCEPTION(0x3100, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)</div><div class='add'>+	EXCEPTION(0x3100, FIT, FixedIntervalTimer, \</div><div class='add'>+		  unknown_exception, EXC_XFER_EE)</div><div class='ctx'> </div><div class='ctx'> 	/* Watchdog Timer Interrupt */</div><div class='ctx'> #ifdef CONFIG_BOOKE_WDT</div><div class='del'>-	CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException)</div><div class='add'>+	CRITICAL_EXCEPTION(0x3200, WATCHDOG, WatchdogTimer, WatchdogException)</div><div class='ctx'> #else</div><div class='del'>-	CRITICAL_EXCEPTION(0x3200, WatchdogTimer, unknown_exception)</div><div class='add'>+	CRITICAL_EXCEPTION(0x3200, WATCHDOG, WatchdogTimer, unknown_exception)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* Data TLB Error Interrupt */</div><div class='hunk'>@@ -375,10 +380,16 @@ interrupt_base:</div><div class='ctx'> 	mtspr	SPRN_SPRG_WSCRATCH0, r10 /* Save some working registers */</div><div class='ctx'> 	mfspr	r10, SPRN_SPRG_THREAD</div><div class='ctx'> 	stw	r11, THREAD_NORMSAVE(0)(r10)</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+BEGIN_FTR_SECTION</div><div class='add'>+	mfspr	r11, SPRN_SRR1</div><div class='add'>+END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)</div><div class='add'>+#endif</div><div class='ctx'> 	stw	r12, THREAD_NORMSAVE(1)(r10)</div><div class='ctx'> 	stw	r13, THREAD_NORMSAVE(2)(r10)</div><div class='ctx'> 	mfcr	r13</div><div class='ctx'> 	stw	r13, THREAD_NORMSAVE(3)(r10)</div><div class='add'>+	DO_KVM	BOOKE_INTERRUPT_DTLB_MISS SPRN_SRR1</div><div class='ctx'> 	mfspr	r10, SPRN_DEAR		/* Get faulting address */</div><div class='ctx'> </div><div class='ctx'> 	/* If we are faulting a kernel address, we have to use the</div><div class='hunk'>@@ -463,10 +474,16 @@ interrupt_base:</div><div class='ctx'> 	mtspr	SPRN_SPRG_WSCRATCH0, r10 /* Save some working registers */</div><div class='ctx'> 	mfspr	r10, SPRN_SPRG_THREAD</div><div class='ctx'> 	stw	r11, THREAD_NORMSAVE(0)(r10)</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+BEGIN_FTR_SECTION</div><div class='add'>+	mfspr	r11, SPRN_SRR1</div><div class='add'>+END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)</div><div class='add'>+#endif</div><div class='ctx'> 	stw	r12, THREAD_NORMSAVE(1)(r10)</div><div class='ctx'> 	stw	r13, THREAD_NORMSAVE(2)(r10)</div><div class='ctx'> 	mfcr	r13</div><div class='ctx'> 	stw	r13, THREAD_NORMSAVE(3)(r10)</div><div class='add'>+	DO_KVM	BOOKE_INTERRUPT_ITLB_MISS SPRN_SRR1</div><div class='ctx'> 	mfspr	r10, SPRN_SRR0		/* Get faulting address */</div><div class='ctx'> </div><div class='ctx'> 	/* If we are faulting a kernel address, we have to use the</div><div class='hunk'>@@ -538,36 +555,54 @@ interrupt_base:</div><div class='ctx'> #ifdef CONFIG_SPE</div><div class='ctx'> 	/* SPE Unavailable */</div><div class='ctx'> 	START_EXCEPTION(SPEUnavailable)</div><div class='del'>-	NORMAL_EXCEPTION_PROLOG</div><div class='add'>+	NORMAL_EXCEPTION_PROLOG(SPE_UNAVAIL)</div><div class='ctx'> 	bne	load_up_spe</div><div class='ctx'> 	addi	r3,r1,STACK_FRAME_OVERHEAD</div><div class='ctx'> 	EXC_XFER_EE_LITE(0x2010, KernelSPE)</div><div class='ctx'> #else</div><div class='del'>-	EXCEPTION(0x2020, SPEUnavailable, unknown_exception, EXC_XFER_EE)</div><div class='add'>+	EXCEPTION(0x2020, SPE_UNAVAIL, SPEUnavailable, \</div><div class='add'>+		  unknown_exception, EXC_XFER_EE)</div><div class='ctx'> #endif /* CONFIG_SPE */</div><div class='ctx'> </div><div class='ctx'> 	/* SPE Floating Point Data */</div><div class='ctx'> #ifdef CONFIG_SPE</div><div class='del'>-	EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE);</div><div class='add'>+	EXCEPTION(0x2030, SPE_FP_DATA, SPEFloatingPointData, \</div><div class='add'>+		  SPEFloatingPointException, EXC_XFER_EE);</div><div class='ctx'> </div><div class='ctx'> 	/* SPE Floating Point Round */</div><div class='del'>-	EXCEPTION(0x2050, SPEFloatingPointRound, SPEFloatingPointRoundException, EXC_XFER_EE)</div><div class='add'>+	EXCEPTION(0x2050, SPE_FP_ROUND, SPEFloatingPointRound, \</div><div class='add'>+		  SPEFloatingPointRoundException, EXC_XFER_EE)</div><div class='ctx'> #else</div><div class='del'>-	EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE)</div><div class='del'>-	EXCEPTION(0x2050, SPEFloatingPointRound, unknown_exception, EXC_XFER_EE)</div><div class='add'>+	EXCEPTION(0x2040, SPE_FP_DATA, SPEFloatingPointData, \</div><div class='add'>+		  unknown_exception, EXC_XFER_EE)</div><div class='add'>+	EXCEPTION(0x2050, SPE_FP_ROUND, SPEFloatingPointRound, \</div><div class='add'>+		  unknown_exception, EXC_XFER_EE)</div><div class='ctx'> #endif /* CONFIG_SPE */</div><div class='ctx'> </div><div class='ctx'> 	/* Performance Monitor */</div><div class='del'>-	EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)</div><div class='add'>+	EXCEPTION(0x2060, PERFORMANCE_MONITOR, PerformanceMonitor, \</div><div class='add'>+		  performance_monitor_exception, EXC_XFER_STD)</div><div class='ctx'> </div><div class='del'>-	EXCEPTION(0x2070, Doorbell, doorbell_exception, EXC_XFER_STD)</div><div class='add'>+	EXCEPTION(0x2070, DOORBELL, Doorbell, doorbell_exception, EXC_XFER_STD)</div><div class='ctx'> </div><div class='del'>-	CRITICAL_EXCEPTION(0x2080, CriticalDoorbell, unknown_exception)</div><div class='add'>+	CRITICAL_EXCEPTION(0x2080, DOORBELL_CRITICAL, \</div><div class='add'>+			   CriticalDoorbell, unknown_exception)</div><div class='ctx'> </div><div class='ctx'> 	/* Debug Interrupt */</div><div class='ctx'> 	DEBUG_DEBUG_EXCEPTION</div><div class='ctx'> 	DEBUG_CRIT_EXCEPTION</div><div class='ctx'> </div><div class='add'>+	GUEST_DOORBELL_EXCEPTION</div><div class='add'>+</div><div class='add'>+	CRITICAL_EXCEPTION(0, GUEST_DBELL_CRIT, CriticalGuestDoorbell, \</div><div class='add'>+			   unknown_exception)</div><div class='add'>+</div><div class='add'>+	/* Hypercall */</div><div class='add'>+	EXCEPTION(0, HV_SYSCALL, Hypercall, unknown_exception, EXC_XFER_EE)</div><div class='add'>+</div><div class='add'>+	/* Embedded Hypervisor Privilege */</div><div class='add'>+	EXCEPTION(0, HV_PRIV, Ehvpriv, unknown_exception, EXC_XFER_EE)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Local functions</div><div class='ctx'>  */</div><div class='hunk'>@@ -871,16 +906,31 @@ _GLOBAL(__setup_e500mc_ivors)</div><div class='ctx'> 	mtspr	SPRN_IVOR36,r3</div><div class='ctx'> 	li	r3,CriticalDoorbell@l</div><div class='ctx'> 	mtspr	SPRN_IVOR37,r3</div><div class='del'>-	sync</div><div class='del'>-	blr</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * extern void giveup_altivec(struct task_struct *prev)</div><div class='del'>- *</div><div class='del'>- * The e500 core does not have an AltiVec unit.</div><div class='del'>- */</div><div class='del'>-_GLOBAL(giveup_altivec)</div><div class='add'>+	/*</div><div class='add'>+	 * We only want to touch IVOR38-41 if we're running on hardware</div><div class='add'>+	 * that supports category E.HV.  The architectural way to determine</div><div class='add'>+	 * this is MMUCFG[LPIDSIZE].</div><div class='add'>+	 */</div><div class='add'>+	mfspr	r3, SPRN_MMUCFG</div><div class='add'>+	andis.	r3, r3, MMUCFG_LPIDSIZE@h</div><div class='add'>+	beq	no_hv</div><div class='add'>+	li	r3,GuestDoorbell@l</div><div class='add'>+	mtspr	SPRN_IVOR38,r3</div><div class='add'>+	li	r3,CriticalGuestDoorbell@l</div><div class='add'>+	mtspr	SPRN_IVOR39,r3</div><div class='add'>+	li	r3,Hypercall@l</div><div class='add'>+	mtspr	SPRN_IVOR40,r3</div><div class='add'>+	li	r3,Ehvpriv@l</div><div class='add'>+	mtspr	SPRN_IVOR41,r3</div><div class='add'>+skip_hv_ivors:</div><div class='add'>+	sync</div><div class='ctx'> 	blr</div><div class='add'>+no_hv:</div><div class='add'>+	lwz	r3, CPU_SPEC_FEATURES(r5)</div><div class='add'>+	rlwinm	r3, r3, 0, ~CPU_FTR_EMB_HV</div><div class='add'>+	stw	r3, CPU_SPEC_FEATURES(r5)</div><div class='add'>+	b	skip_hv_ivors</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SPE</div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c<br/>index 6d2209ac0c44..2099d9a879e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/idle.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/idle.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/idle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/idle.c</a></div><div class='hunk'>@@ -113,29 +113,6 @@ void cpu_idle(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * cpu_idle_wait - Used to ensure that all the CPUs come out of the old</div><div class='del'>- * idle loop and start using the new idle loop.</div><div class='del'>- * Required while changing idle handler on SMP systems.</div><div class='del'>- * Caller must have changed idle handler to the new value before the call.</div><div class='del'>- * This window may be larger on shared systems.</div><div class='del'>- */</div><div class='del'>-void cpu_idle_wait(void)</div><div class='del'>-{</div><div class='del'>-	int cpu;</div><div class='del'>-	smp_mb();</div><div class='del'>-</div><div class='del'>-	/* kick all the CPUs so that they exit out of old idle routine */</div><div class='del'>-	get_online_cpus();</div><div class='del'>-	for_each_online_cpu(cpu) {</div><div class='del'>-		if (cpu != smp_processor_id())</div><div class='del'>-			smp_send_reschedule(cpu);</div><div class='del'>-	}</div><div class='del'>-	put_online_cpus();</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cpu_idle_wait);</div><div class='del'>-</div><div class='ctx'> int powersave_nap;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SYSCTL</div><div class='head'>diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S<br/>index 0cdc9a392839..7140d838339e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/idle_power7.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/idle_power7.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/idle_power7.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/idle_power7.S</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/ppc-opcode.h&gt;</div><div class='ctx'> #include &lt;asm/hw_irq.h&gt;</div><div class='add'>+#include &lt;asm/kvm_book3s_asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> #undef DEBUG</div><div class='ctx'> </div><div class='hunk'>@@ -81,6 +82,12 @@ _GLOBAL(power7_idle)</div><div class='ctx'> 	std	r9,_MSR(r1)</div><div class='ctx'> 	std	r1,PACAR1(r13)</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM_BOOK3S_64_HV</div><div class='add'>+	/* Tell KVM we're napping */</div><div class='add'>+	li	r4,KVM_HWTHREAD_IN_NAP</div><div class='add'>+	stb	r4,HSTATE_HWTHREAD_STATE(r13)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	/* Magic NAP mode enter sequence */</div><div class='ctx'> 	std	r0,0(r1)</div><div class='ctx'> 	ptesync</div><div class='head'>diff --git a/arch/powerpc/kernel/init_task.c b/arch/powerpc/kernel/init_task.c<br/>deleted file mode 100644<br/>index d076d465dbd1..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is 16384-byte aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c<br/>index 5ec1b2354ca6..7835a5e1ea5f 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/irq.c</a></div><div class='hunk'>@@ -229,6 +229,19 @@ notrace void arch_local_irq_restore(unsigned long en)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (unlikely(irq_happened != PACA_IRQ_HARD_DIS))</div><div class='ctx'> 		__hard_irq_disable();</div><div class='add'>+#ifdef CONFIG_TRACE_IRQFLAG</div><div class='add'>+	else {</div><div class='add'>+		/*</div><div class='add'>+		 * We should already be hard disabled here. We had bugs</div><div class='add'>+		 * where that wasn't the case so let's dbl check it and</div><div class='add'>+		 * warn if we are wrong. Only do that when IRQ tracing</div><div class='add'>+		 * is enabled as mfmsr() can be costly.</div><div class='add'>+		 */</div><div class='add'>+		if (WARN_ON(mfmsr() &amp; MSR_EE))</div><div class='add'>+			__hard_irq_disable();</div><div class='add'>+	}</div><div class='add'>+#endif /* CONFIG_TRACE_IRQFLAG */</div><div class='add'>+</div><div class='ctx'> 	set_soft_enabled(0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -260,11 +273,17 @@ EXPORT_SYMBOL(arch_local_irq_restore);</div><div class='ctx'>  * if they are currently disabled. This is typically called before</div><div class='ctx'>  * schedule() or do_signal() when returning to userspace. We do it</div><div class='ctx'>  * in C to avoid the burden of dealing with lockdep etc...</div><div class='add'>+ *</div><div class='add'>+ * NOTE: This is called with interrupts hard disabled but not marked</div><div class='add'>+ * as such in paca-&gt;irq_happened, so we need to resync this.</div><div class='ctx'>  */</div><div class='ctx'> void restore_interrupts(void)</div><div class='ctx'> {</div><div class='del'>-	if (irqs_disabled())</div><div class='add'>+	if (irqs_disabled()) {</div><div class='add'>+		local_paca-&gt;irq_happened |= PACA_IRQ_HARD_DIS;</div><div class='ctx'> 		local_irq_enable();</div><div class='add'>+	} else</div><div class='add'>+		__hard_irq_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_PPC64 */</div><div class='hunk'>@@ -330,14 +349,10 @@ void migrate_irqs(void)</div><div class='ctx'> </div><div class='ctx'> 	alloc_cpumask_var(&amp;mask, GFP_KERNEL);</div><div class='ctx'> </div><div class='del'>-	for_each_irq(irq) {</div><div class='add'>+	for_each_irq_desc(irq, desc) {</div><div class='ctx'> 		struct irq_data *data;</div><div class='ctx'> 		struct irq_chip *chip;</div><div class='ctx'> </div><div class='del'>-		desc = irq_to_desc(irq);</div><div class='del'>-		if (!desc)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='ctx'> 		data = irq_desc_get_irq_data(desc);</div><div class='ctx'> 		if (irqd_is_per_cpu(data))</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -572,7 +587,7 @@ int irq_choose_cpu(const struct cpumask *mask)</div><div class='ctx'> {</div><div class='ctx'> 	int cpuid;</div><div class='ctx'> </div><div class='del'>-	if (cpumask_equal(mask, cpu_all_mask)) {</div><div class='add'>+	if (cpumask_equal(mask, cpu_online_mask)) {</div><div class='ctx'> 		static int irq_rover;</div><div class='ctx'> 		static DEFINE_RAW_SPINLOCK(irq_rover_lock);</div><div class='ctx'> 		unsigned long flags;</div><div class='head'>diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c<br/>index c957b1202bdc..5df777794403 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/machine_kexec.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/machine_kexec.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/machine_kexec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/machine_kexec.c</a></div><div class='hunk'>@@ -23,14 +23,11 @@</div><div class='ctx'> </div><div class='ctx'> void machine_kexec_mask_interrupts(void) {</div><div class='ctx'> 	unsigned int i;</div><div class='add'>+	struct irq_desc *desc;</div><div class='ctx'> </div><div class='del'>-	for_each_irq(i) {</div><div class='del'>-		struct irq_desc *desc = irq_to_desc(i);</div><div class='add'>+	for_each_irq_desc(i, desc) {</div><div class='ctx'> 		struct irq_chip *chip;</div><div class='ctx'> </div><div class='del'>-		if (!desc)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='ctx'> 		chip = irq_desc_get_chip(desc);</div><div class='ctx'> 		if (!chip)</div><div class='ctx'> 			continue;</div><div class='head'>diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S<br/>index 7cd07b42ca1a..386d57f66f28 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/misc_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/misc_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/misc_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/misc_32.S</a></div><div class='hunk'>@@ -738,8 +738,23 @@ relocate_new_kernel:</div><div class='ctx'> 	mr      r5, r31</div><div class='ctx'> </div><div class='ctx'> 	li	r0, 0</div><div class='del'>-#elif defined(CONFIG_44x)  &amp;&amp; !defined(CONFIG_PPC_47x)</div><div class='add'>+#elif defined(CONFIG_44x)</div><div class='ctx'> </div><div class='add'>+	/* Save our parameters */</div><div class='add'>+	mr	r29, r3</div><div class='add'>+	mr	r30, r4</div><div class='add'>+	mr	r31, r5</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PPC_47x</div><div class='add'>+	/* Check for 47x cores */</div><div class='add'>+	mfspr	r3,SPRN_PVR</div><div class='add'>+	srwi	r3,r3,16</div><div class='add'>+	cmplwi	cr0,r3,PVR_476@h</div><div class='add'>+	beq	setup_map_47x</div><div class='add'>+	cmplwi	cr0,r3,PVR_476_ISS@h</div><div class='add'>+	beq	setup_map_47x</div><div class='add'>+#endif /* CONFIG_PPC_47x */</div><div class='add'>+	</div><div class='ctx'> /*</div><div class='ctx'>  * Code for setting up 1:1 mapping for PPC440x for KEXEC</div><div class='ctx'>  *</div><div class='hunk'>@@ -753,16 +768,15 @@ relocate_new_kernel:</div><div class='ctx'>  * 5) Invalidate the tmp mapping.</div><div class='ctx'>  *</div><div class='ctx'>  * - Based on the kexec support code for FSL BookE</div><div class='del'>- * - Doesn't support 47x yet.</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-	/* Save our parameters */</div><div class='del'>-	mr	r29, r3</div><div class='del'>-	mr	r30, r4</div><div class='del'>-	mr	r31, r5</div><div class='ctx'> </div><div class='del'>-	/* Load our MSR_IS and TID to MMUCR for TLB search */</div><div class='del'>-	mfspr	r3,SPRN_PID</div><div class='add'>+	/* </div><div class='add'>+	 * Load the PID with kernel PID (0).</div><div class='add'>+	 * Also load our MSR_IS and TID to MMUCR for TLB search.</div><div class='add'>+	 */</div><div class='add'>+	li	r3, 0</div><div class='add'>+	mtspr	SPRN_PID, r3</div><div class='ctx'> 	mfmsr	r4</div><div class='ctx'> 	andi.	r4,r4,MSR_IS@l</div><div class='ctx'> 	beq	wmmucr</div><div class='hunk'>@@ -900,6 +914,179 @@ next_tlb:</div><div class='ctx'> 	li	r3, 0</div><div class='ctx'> 	tlbwe	r3, r24, PPC44x_TLB_PAGEID</div><div class='ctx'> 	sync</div><div class='add'>+	b	ppc44x_map_done</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PPC_47x</div><div class='add'>+</div><div class='add'>+	/* 1:1 mapping for 47x */</div><div class='add'>+</div><div class='add'>+setup_map_47x:</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Load the kernel pid (0) to PID and also to MMUCR[TID].</div><div class='add'>+	 * Also set the MSR IS-&gt;MMUCR STS</div><div class='add'>+	 */</div><div class='add'>+	li	r3, 0</div><div class='add'>+	mtspr	SPRN_PID, r3			/* Set PID */</div><div class='add'>+	mfmsr	r4				/* Get MSR */</div><div class='add'>+	andi.	r4, r4, MSR_IS@l		/* TS=1? */</div><div class='add'>+	beq	1f				/* If not, leave STS=0 */</div><div class='add'>+	oris	r3, r3, PPC47x_MMUCR_STS@h	/* Set STS=1 */</div><div class='add'>+1:	mtspr	SPRN_MMUCR, r3			/* Put MMUCR */</div><div class='add'>+	sync</div><div class='add'>+</div><div class='add'>+	/* Find the entry we are running from */</div><div class='add'>+	bl	2f</div><div class='add'>+2:	mflr	r23</div><div class='add'>+	tlbsx	r23, 0, r23</div><div class='add'>+	tlbre	r24, r23, 0			/* TLB Word 0 */</div><div class='add'>+	tlbre	r25, r23, 1			/* TLB Word 1 */</div><div class='add'>+	tlbre	r26, r23, 2			/* TLB Word 2 */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Invalidates all the tlb entries by writing to 256 RPNs(r4)</div><div class='add'>+	 * of 4k page size in all  4 ways (0-3 in r3).</div><div class='add'>+	 * This would invalidate the entire UTLB including the one we are</div><div class='add'>+	 * running from. However the shadow TLB entries would help us </div><div class='add'>+	 * to continue the execution, until we flush them (rfi/isync).</div><div class='add'>+	 */</div><div class='add'>+	addis	r3, 0, 0x8000			/* specify the way */</div><div class='add'>+	addi	r4, 0, 0			/* TLB Word0 = (EPN=0, VALID = 0) */</div><div class='add'>+	addi	r5, 0, 0</div><div class='add'>+	b	clear_utlb_entry</div><div class='add'>+</div><div class='add'>+	/* Align the loop to speed things up. from head_44x.S */</div><div class='add'>+	.align	6</div><div class='add'>+</div><div class='add'>+clear_utlb_entry:</div><div class='add'>+</div><div class='add'>+	tlbwe	r4, r3, 0</div><div class='add'>+	tlbwe	r5, r3, 1</div><div class='add'>+	tlbwe	r5, r3, 2</div><div class='add'>+	addis	r3, r3, 0x2000			/* Increment the way */</div><div class='add'>+	cmpwi	r3, 0</div><div class='add'>+	bne	clear_utlb_entry</div><div class='add'>+	addis	r3, 0, 0x8000</div><div class='add'>+	addis	r4, r4, 0x100			/* Increment the EPN */</div><div class='add'>+	cmpwi	r4, 0</div><div class='add'>+	bne	clear_utlb_entry</div><div class='add'>+</div><div class='add'>+	/* Create the entries in the other address space */</div><div class='add'>+	mfmsr	r5</div><div class='add'>+	rlwinm	r7, r5, 27, 31, 31		/* Get the TS (Bit 26) from MSR */</div><div class='add'>+	xori	r7, r7, 1			/* r7 = !TS */</div><div class='add'>+</div><div class='add'>+	insrwi	r24, r7, 1, 21			/* Change the TS in the saved TLB word 0 */</div><div class='add'>+</div><div class='add'>+	/* </div><div class='add'>+	 * write out the TLB entries for the tmp mapping</div><div class='add'>+	 * Use way '0' so that we could easily invalidate it later.</div><div class='add'>+	 */</div><div class='add'>+	lis	r3, 0x8000			/* Way '0' */ </div><div class='add'>+</div><div class='add'>+	tlbwe	r24, r3, 0</div><div class='add'>+	tlbwe	r25, r3, 1</div><div class='add'>+	tlbwe	r26, r3, 2</div><div class='add'>+</div><div class='add'>+	/* Update the msr to the new TS */</div><div class='add'>+	insrwi	r5, r7, 1, 26</div><div class='add'>+</div><div class='add'>+	bl	1f</div><div class='add'>+1:	mflr	r6</div><div class='add'>+	addi	r6, r6, (2f-1b)</div><div class='add'>+</div><div class='add'>+	mtspr	SPRN_SRR0, r6</div><div class='add'>+	mtspr	SPRN_SRR1, r5</div><div class='add'>+	rfi</div><div class='add'>+</div><div class='add'>+	/* </div><div class='add'>+	 * Now we are in the tmp address space.</div><div class='add'>+	 * Create a 1:1 mapping for 0-2GiB in the original TS.</div><div class='add'>+	 */</div><div class='add'>+2:</div><div class='add'>+	li	r3, 0</div><div class='add'>+	li	r4, 0				/* TLB Word 0 */</div><div class='add'>+	li	r5, 0				/* TLB Word 1 */</div><div class='add'>+	li	r6, 0</div><div class='add'>+	ori	r6, r6, PPC47x_TLB2_S_RWX	/* TLB word 2 */</div><div class='add'>+</div><div class='add'>+	li	r8, 0				/* PageIndex */</div><div class='add'>+</div><div class='add'>+	xori	r7, r7, 1			/* revert back to original TS */</div><div class='add'>+</div><div class='add'>+write_utlb:</div><div class='add'>+	rotlwi	r5, r8, 28			/* RPN = PageIndex * 256M */</div><div class='add'>+						/* ERPN = 0 as we don't use memory above 2G */</div><div class='add'>+</div><div class='add'>+	mr	r4, r5				/* EPN = RPN */</div><div class='add'>+	ori	r4, r4, (PPC47x_TLB0_VALID | PPC47x_TLB0_256M)</div><div class='add'>+	insrwi	r4, r7, 1, 21			/* Insert the TS to Word 0 */</div><div class='add'>+</div><div class='add'>+	tlbwe	r4, r3, 0			/* Write out the entries */</div><div class='add'>+	tlbwe	r5, r3, 1</div><div class='add'>+	tlbwe	r6, r3, 2</div><div class='add'>+	addi	r8, r8, 1</div><div class='add'>+	cmpwi	r8, 8				/* Have we completed ? */</div><div class='add'>+	bne	write_utlb</div><div class='add'>+</div><div class='add'>+	/* make sure we complete the TLB write up */</div><div class='add'>+	isync</div><div class='add'>+</div><div class='add'>+	/* </div><div class='add'>+	 * Prepare to jump to the 1:1 mapping.</div><div class='add'>+	 * 1) Extract page size of the tmp mapping</div><div class='add'>+	 *    DSIZ = TLB_Word0[22:27]</div><div class='add'>+	 * 2) Calculate the physical address of the address</div><div class='add'>+	 *    to jump to.</div><div class='add'>+	 */</div><div class='add'>+	rlwinm	r10, r24, 0, 22, 27</div><div class='add'>+</div><div class='add'>+	cmpwi	r10, PPC47x_TLB0_4K</div><div class='add'>+	bne	0f</div><div class='add'>+	li	r10, 0x1000			/* r10 = 4k */</div><div class='add'>+	bl	1f</div><div class='add'>+</div><div class='add'>+0:</div><div class='add'>+	/* Defaults to 256M */</div><div class='add'>+	lis	r10, 0x1000</div><div class='add'>+	</div><div class='add'>+	bl	1f</div><div class='add'>+1:	mflr	r4</div><div class='add'>+	addi	r4, r4, (2f-1b)			/* virtual address  of 2f */</div><div class='add'>+</div><div class='add'>+	subi	r11, r10, 1			/* offsetmask = Pagesize - 1 */</div><div class='add'>+	not	r10, r11			/* Pagemask = ~(offsetmask) */</div><div class='add'>+</div><div class='add'>+	and	r5, r25, r10			/* Physical page */</div><div class='add'>+	and	r6, r4, r11			/* offset within the current page */</div><div class='add'>+</div><div class='add'>+	or	r5, r5, r6			/* Physical address for 2f */</div><div class='add'>+</div><div class='add'>+	/* Switch the TS in MSR to the original one */</div><div class='add'>+	mfmsr	r8</div><div class='add'>+	insrwi	r8, r7, 1, 26</div><div class='add'>+</div><div class='add'>+	mtspr	SPRN_SRR1, r8</div><div class='add'>+	mtspr	SPRN_SRR0, r5</div><div class='add'>+	rfi</div><div class='add'>+</div><div class='add'>+2:</div><div class='add'>+	/* Invalidate the tmp mapping */</div><div class='add'>+	lis	r3, 0x8000			/* Way '0' */</div><div class='add'>+</div><div class='add'>+	clrrwi	r24, r24, 12			/* Clear the valid bit */</div><div class='add'>+	tlbwe	r24, r3, 0</div><div class='add'>+	tlbwe	r25, r3, 1</div><div class='add'>+	tlbwe	r26, r3, 2</div><div class='add'>+</div><div class='add'>+	/* Make sure we complete the TLB write and flush the shadow TLB */</div><div class='add'>+	isync</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+ppc44x_map_done:</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	/* Restore the parameters */</div><div class='ctx'> 	mr	r3, r29</div><div class='head'>diff --git a/arch/powerpc/kernel/module_32.c b/arch/powerpc/kernel/module_32.c<br/>index 0b6d79617d7b..2e3200ca485f 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/module_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/module_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/module_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/module_32.c</a></div><div class='hunk'>@@ -176,8 +176,8 @@ int module_frob_arch_sections(Elf32_Ehdr *hdr,</div><div class='ctx'> </div><div class='ctx'> static inline int entry_matches(struct ppc_plt_entry *entry, Elf32_Addr val)</div><div class='ctx'> {</div><div class='del'>-	if (entry-&gt;jump[0] == 0x3d600000 + ((val + 0x8000) &gt;&gt; 16)</div><div class='del'>-	    &amp;&amp; entry-&gt;jump[1] == 0x396b0000 + (val &amp; 0xffff))</div><div class='add'>+	if (entry-&gt;jump[0] == 0x3d800000 + ((val + 0x8000) &gt;&gt; 16)</div><div class='add'>+	    &amp;&amp; entry-&gt;jump[1] == 0x398c0000 + (val &amp; 0xffff))</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -204,10 +204,9 @@ static uint32_t do_plt_call(void *location,</div><div class='ctx'> 		entry++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Stolen from Paul Mackerras as well... */</div><div class='del'>-	entry-&gt;jump[0] = 0x3d600000+((val+0x8000)&gt;&gt;16);	/* lis r11,sym@ha */</div><div class='del'>-	entry-&gt;jump[1] = 0x396b0000 + (val&amp;0xffff);	/* addi r11,r11,sym@l*/</div><div class='del'>-	entry-&gt;jump[2] = 0x7d6903a6;			/* mtctr r11 */</div><div class='add'>+	entry-&gt;jump[0] = 0x3d800000+((val+0x8000)&gt;&gt;16); /* lis r12,sym@ha */</div><div class='add'>+	entry-&gt;jump[1] = 0x398c0000 + (val&amp;0xffff);     /* addi r12,r12,sym@l*/</div><div class='add'>+	entry-&gt;jump[2] = 0x7d8903a6;                    /* mtctr r12 */</div><div class='ctx'> 	entry-&gt;jump[3] = 0x4e800420;			/* bctr */</div><div class='ctx'> </div><div class='ctx'> 	DEBUGP("Initialized plt for 0x%x at %p\n", val, entry);</div><div class='head'>diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c<br/>index 0bb1f98613ba..fbe1a12dc7f1 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/paca.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/paca.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/paca.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/paca.c</a></div><div class='hunk'>@@ -36,10 +36,7 @@ struct lppaca lppaca[] = {</div><div class='ctx'> 	[0 ... (NR_LPPACAS-1)] = {</div><div class='ctx'> 		.desc = 0xd397d781,	/* "LpPa" */</div><div class='ctx'> 		.size = sizeof(struct lppaca),</div><div class='del'>-		.dyn_proc_status = 2,</div><div class='del'>-		.decr_val = 0x00ff0000,</div><div class='ctx'> 		.fpregs_in_use = 1,</div><div class='del'>-		.end_of_quantum = 0xfffffffffffffffful,</div><div class='ctx'> 		.slb_count = 64,</div><div class='ctx'> 		.vmxregs_in_use = 0,</div><div class='ctx'> 		.page_ins = 0,</div><div class='head'>diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c<br/>index 786a2700ec2d..3e4031581c65 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/ppc_ksyms.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/ppc_ksyms.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/ppc_ksyms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/ppc_ksyms.c</a></div><div class='hunk'>@@ -85,8 +85,6 @@ EXPORT_SYMBOL(csum_tcpudp_magic);</div><div class='ctx'> </div><div class='ctx'> EXPORT_SYMBOL(__copy_tofrom_user);</div><div class='ctx'> EXPORT_SYMBOL(__clear_user);</div><div class='del'>-EXPORT_SYMBOL(__strncpy_from_user);</div><div class='del'>-EXPORT_SYMBOL(__strnlen_user);</div><div class='ctx'> EXPORT_SYMBOL(copy_page);</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_PCI) &amp;&amp; defined(CONFIG_PPC32)</div><div class='hunk'>@@ -190,3 +188,7 @@ EXPORT_SYMBOL(__arch_hweight16);</div><div class='ctx'> EXPORT_SYMBOL(__arch_hweight32);</div><div class='ctx'> EXPORT_SYMBOL(__arch_hweight64);</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PPC_BOOK3S_64</div><div class='add'>+EXPORT_SYMBOL_GPL(mmu_psize_defs);</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c<br/>index 4937c9690090..710f400476de 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/process.c</a></div><div class='hunk'>@@ -124,7 +124,7 @@ void enable_kernel_altivec(void)</div><div class='ctx'> 	if (current-&gt;thread.regs &amp;&amp; (current-&gt;thread.regs-&gt;msr &amp; MSR_VEC))</div><div class='ctx'> 		giveup_altivec(current);</div><div class='ctx'> 	else</div><div class='del'>-		giveup_altivec(NULL);	/* just enable AltiVec for kernel - force */</div><div class='add'>+		giveup_altivec_notask();</div><div class='ctx'> #else</div><div class='ctx'> 	giveup_altivec(last_task_used_altivec);</div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='hunk'>@@ -711,18 +711,21 @@ release_thread(struct task_struct *t)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * This gets called before we allocate a new thread and copy</div><div class='del'>- * the current task into it.</div><div class='add'>+ * this gets called so that we can store coprocessor state into memory and</div><div class='add'>+ * copy the current task into the new thread.</div><div class='ctx'>  */</div><div class='del'>-void prepare_to_copy(struct task_struct *tsk)</div><div class='add'>+int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> {</div><div class='del'>-	flush_fp_to_thread(current);</div><div class='del'>-	flush_altivec_to_thread(current);</div><div class='del'>-	flush_vsx_to_thread(current);</div><div class='del'>-	flush_spe_to_thread(current);</div><div class='add'>+	flush_fp_to_thread(src);</div><div class='add'>+	flush_altivec_to_thread(src);</div><div class='add'>+	flush_vsx_to_thread(src);</div><div class='add'>+	flush_spe_to_thread(src);</div><div class='ctx'> #ifdef CONFIG_HAVE_HW_BREAKPOINT</div><div class='del'>-	flush_ptrace_hw_breakpoint(tsk);</div><div class='add'>+	flush_ptrace_hw_breakpoint(src);</div><div class='ctx'> #endif /* CONFIG_HAVE_HW_BREAKPOINT */</div><div class='add'>+</div><div class='add'>+	*dst = *src;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1252,37 +1255,6 @@ void __ppc64_runlatch_off(void)</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_PPC64 */</div><div class='ctx'> </div><div class='del'>-#if THREAD_SHIFT &lt; PAGE_SHIFT</div><div class='del'>-</div><div class='del'>-static struct kmem_cache *thread_info_cache;</div><div class='del'>-</div><div class='del'>-struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)</div><div class='del'>-{</div><div class='del'>-	struct thread_info *ti;</div><div class='del'>-</div><div class='del'>-	ti = kmem_cache_alloc_node(thread_info_cache, GFP_KERNEL, node);</div><div class='del'>-	if (unlikely(ti == NULL))</div><div class='del'>-		return NULL;</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-	memset(ti, 0, THREAD_SIZE);</div><div class='del'>-#endif</div><div class='del'>-	return ti;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void free_thread_info(struct thread_info *ti)</div><div class='del'>-{</div><div class='del'>-	kmem_cache_free(thread_info_cache, ti);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void thread_info_cache_init(void)</div><div class='del'>-{</div><div class='del'>-	thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,</div><div class='del'>-					      THREAD_SIZE, 0, NULL);</div><div class='del'>-	BUG_ON(thread_info_cache == NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* THREAD_SHIFT &lt; PAGE_SHIFT */</div><div class='del'>-</div><div class='ctx'> unsigned long arch_align_stack(unsigned long sp)</div><div class='ctx'> {</div><div class='ctx'> 	if (!(current-&gt;personality &amp; ADDR_NO_RANDOMIZE) &amp;&amp; randomize_va_space)</div><div class='head'>diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c<br/>index 99860273211b..1b488e5305c5 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/prom_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/prom_init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/prom_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/prom_init.c</a></div><div class='hunk'>@@ -680,6 +680,9 @@ static void __init early_cmdline_parse(void)</div><div class='ctx'> #define OV3_VMX			0x40	/* VMX/Altivec */</div><div class='ctx'> #define OV3_DFP			0x20	/* decimal FP */</div><div class='ctx'> </div><div class='add'>+/* Option vector 4: IBM PAPR implementation */</div><div class='add'>+#define OV4_MIN_ENT_CAP		0x01	/* minimum VP entitled capacity */</div><div class='add'>+</div><div class='ctx'> /* Option vector 5: PAPR/OF options supported */</div><div class='ctx'> #define OV5_LPAR		0x80	/* logical partitioning supported */</div><div class='ctx'> #define OV5_SPLPAR		0x40	/* shared-processor LPAR supported */</div><div class='hunk'>@@ -701,6 +704,8 @@ static void __init early_cmdline_parse(void)</div><div class='ctx'> #define OV5_XCMO			0x00</div><div class='ctx'> #endif</div><div class='ctx'> #define OV5_TYPE1_AFFINITY	0x80	/* Type 1 NUMA affinity */</div><div class='add'>+#define OV5_PFO_HW_RNG		0x80	/* PFO Random Number Generator */</div><div class='add'>+#define OV5_PFO_HW_ENCR		0x20	/* PFO Encryption Accelerator */</div><div class='ctx'> </div><div class='ctx'> /* Option Vector 6: IBM PAPR hints */</div><div class='ctx'> #define OV6_LINUX		0x02	/* Linux is our OS */</div><div class='hunk'>@@ -744,11 +749,12 @@ static unsigned char ibm_architecture_vec[] = {</div><div class='ctx'> 	OV3_FP | OV3_VMX | OV3_DFP,</div><div class='ctx'> </div><div class='ctx'> 	/* option vector 4: IBM PAPR implementation */</div><div class='del'>-	2 - 2,				/* length */</div><div class='add'>+	3 - 2,				/* length */</div><div class='ctx'> 	0,				/* don't halt */</div><div class='add'>+	OV4_MIN_ENT_CAP,		/* minimum VP entitled capacity */</div><div class='ctx'> </div><div class='ctx'> 	/* option vector 5: PAPR/OF options */</div><div class='del'>-	13 - 2,				/* length */</div><div class='add'>+	18 - 2,				/* length */</div><div class='ctx'> 	0,				/* don't ignore, don't halt */</div><div class='ctx'> 	OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY |</div><div class='ctx'> 	OV5_DONATE_DEDICATE_CPU | OV5_MSI,</div><div class='hunk'>@@ -762,8 +768,13 @@ static unsigned char ibm_architecture_vec[] = {</div><div class='ctx'> 	 * must match by the macro below. Update the definition if</div><div class='ctx'> 	 * the structure layout changes.</div><div class='ctx'> 	 */</div><div class='del'>-#define IBM_ARCH_VEC_NRCORES_OFFSET	100</div><div class='add'>+#define IBM_ARCH_VEC_NRCORES_OFFSET	101</div><div class='ctx'> 	W(NR_CPUS),			/* number of cores supported */</div><div class='add'>+	0,</div><div class='add'>+	0,</div><div class='add'>+	0,</div><div class='add'>+	0,</div><div class='add'>+	OV5_PFO_HW_RNG | OV5_PFO_HW_ENCR,</div><div class='ctx'> </div><div class='ctx'> 	/* option vector 6: IBM PAPR hints */</div><div class='ctx'> 	4 - 2,				/* length */</div><div class='head'>diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c<br/>index dd5e214cdf21..c10fc28b9092 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/ptrace.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/ptrace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/ptrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/ptrace.c</a></div><div class='hunk'>@@ -1432,40 +1432,6 @@ static long ppc_del_hwdebug(struct task_struct *child, long addr, long data)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,</div><div class='del'>- * we mark them as obsolete now, they will be removed in a future version</div><div class='del'>- */</div><div class='del'>-static long arch_ptrace_old(struct task_struct *child, long request,</div><div class='del'>-			    unsigned long addr, unsigned long data)</div><div class='del'>-{</div><div class='del'>-	void __user *datavp = (void __user *) data;</div><div class='del'>-</div><div class='del'>-	switch (request) {</div><div class='del'>-	case PPC_PTRACE_GETREGS:	/* Get GPRs 0 - 31. */</div><div class='del'>-		return copy_regset_to_user(child, &amp;user_ppc_native_view,</div><div class='del'>-					   REGSET_GPR, 0, 32 * sizeof(long),</div><div class='del'>-					   datavp);</div><div class='del'>-</div><div class='del'>-	case PPC_PTRACE_SETREGS:	/* Set GPRs 0 - 31. */</div><div class='del'>-		return copy_regset_from_user(child, &amp;user_ppc_native_view,</div><div class='del'>-					     REGSET_GPR, 0, 32 * sizeof(long),</div><div class='del'>-					     datavp);</div><div class='del'>-</div><div class='del'>-	case PPC_PTRACE_GETFPREGS:	/* Get FPRs 0 - 31. */</div><div class='del'>-		return copy_regset_to_user(child, &amp;user_ppc_native_view,</div><div class='del'>-					   REGSET_FPR, 0, 32 * sizeof(double),</div><div class='del'>-					   datavp);</div><div class='del'>-</div><div class='del'>-	case PPC_PTRACE_SETFPREGS:	/* Set FPRs 0 - 31. */</div><div class='del'>-		return copy_regset_from_user(child, &amp;user_ppc_native_view,</div><div class='del'>-					     REGSET_FPR, 0, 32 * sizeof(double),</div><div class='del'>-					     datavp);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EPERM;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> long arch_ptrace(struct task_struct *child, long request,</div><div class='ctx'> 		 unsigned long addr, unsigned long data)</div><div class='ctx'> {</div><div class='hunk'>@@ -1687,14 +1653,6 @@ long arch_ptrace(struct task_struct *child, long request,</div><div class='ctx'> 					     datavp);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	/* Old reverse args ptrace callss */</div><div class='del'>-	case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */</div><div class='del'>-	case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */</div><div class='del'>-	case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */</div><div class='del'>-	case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */</div><div class='del'>-		ret = arch_ptrace_old(child, request, addr, data);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = ptrace_request(child, request, addr, data);</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c<br/>index 469349d14a97..8c21658719d9 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/ptrace32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/ptrace32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/ptrace32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/ptrace32.c</a></div><div class='hunk'>@@ -39,30 +39,6 @@</div><div class='ctx'>  * in exit.c or in signal.c.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,</div><div class='del'>- * we mark them as obsolete now, they will be removed in a future version</div><div class='del'>- */</div><div class='del'>-static long compat_ptrace_old(struct task_struct *child, long request,</div><div class='del'>-			      long addr, long data)</div><div class='del'>-{</div><div class='del'>-	switch (request) {</div><div class='del'>-	case PPC_PTRACE_GETREGS:	/* Get GPRs 0 - 31. */</div><div class='del'>-		return copy_regset_to_user(child,</div><div class='del'>-					   task_user_regset_view(current), 0,</div><div class='del'>-					   0, 32 * sizeof(compat_long_t),</div><div class='del'>-					   compat_ptr(data));</div><div class='del'>-</div><div class='del'>-	case PPC_PTRACE_SETREGS:	/* Set GPRs 0 - 31. */</div><div class='del'>-		return copy_regset_from_user(child,</div><div class='del'>-					     task_user_regset_view(current), 0,</div><div class='del'>-					     0, 32 * sizeof(compat_long_t),</div><div class='del'>-					     compat_ptr(data));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EPERM;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Macros to workout the correct index for the FPR in the thread struct */</div><div class='ctx'> #define FPRNUMBER(i) (((i) - PT_FPR0) &gt;&gt; 1)</div><div class='ctx'> #define FPRHALF(i) (((i) - PT_FPR0) &amp; 1)</div><div class='hunk'>@@ -308,8 +284,6 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,</div><div class='ctx'> 	case PTRACE_SETVSRREGS:</div><div class='ctx'> 	case PTRACE_GETREGS64:</div><div class='ctx'> 	case PTRACE_SETREGS64:</div><div class='del'>-	case PPC_PTRACE_GETFPREGS:</div><div class='del'>-	case PPC_PTRACE_SETFPREGS:</div><div class='ctx'> 	case PTRACE_KILL:</div><div class='ctx'> 	case PTRACE_SINGLESTEP:</div><div class='ctx'> 	case PTRACE_DETACH:</div><div class='hunk'>@@ -322,12 +296,6 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,</div><div class='ctx'> 		ret = arch_ptrace(child, request, addr, data);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	/* Old reverse args ptrace callss */</div><div class='del'>-	case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */</div><div class='del'>-	case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */</div><div class='del'>-		ret = compat_ptrace_old(child, request, addr, data);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = compat_ptrace_request(child, request, addr, data);</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c<br/>index 651c5963662b..5c023c9cf16e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/signal.c</a></div><div class='hunk'>@@ -51,16 +51,6 @@ void __user * get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,</div><div class='ctx'>         return (void __user *)newsp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Restore the user process's signal mask</div><div class='del'>- */</div><div class='del'>-void restore_sigmask(sigset_t *set)</div><div class='del'>-{</div><div class='del'>-	sigdelsetmask(set, ~_BLOCKABLE);</div><div class='del'>-	set_current_blocked(set);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void check_syscall_restart(struct pt_regs *regs, struct k_sigaction *ka,</div><div class='ctx'> 				  int has_handler)</div><div class='ctx'> {</div><div class='hunk'>@@ -114,30 +104,21 @@ static void check_syscall_restart(struct pt_regs *regs, struct k_sigaction *ka,</div><div class='ctx'> </div><div class='ctx'> static int do_signal(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	sigset_t *oldset;</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int is32 = is_32bit_task();</div><div class='ctx'> </div><div class='del'>-	if (current_thread_info()-&gt;local_flags &amp; _TLF_RESTORE_SIGMASK)</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* Is there any syscall restart business here ? */</div><div class='ctx'> 	check_syscall_restart(regs, &amp;ka, signr &gt; 0);</div><div class='ctx'> </div><div class='ctx'> 	if (signr &lt;= 0) {</div><div class='del'>-		struct thread_info *ti = current_thread_info();</div><div class='ctx'> 		/* No signal to deliver -- put the saved sigmask back */</div><div class='del'>-		if (ti-&gt;local_flags &amp; _TLF_RESTORE_SIGMASK) {</div><div class='del'>-			ti-&gt;local_flags &amp;= ~_TLF_RESTORE_SIGMASK;</div><div class='del'>-			sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-		}</div><div class='add'>+		restore_saved_sigmask();</div><div class='ctx'> 		regs-&gt;trap = 0;</div><div class='ctx'> 		return 0;               /* no signals delivered */</div><div class='ctx'> 	}</div><div class='hunk'>@@ -167,18 +148,7 @@ static int do_signal(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	regs-&gt;trap = 0;</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		block_sigmask(&amp;ka, signr);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * A signal was successfully delivered; the saved sigmask is in</div><div class='del'>-		 * its frame, and we can clear the TLF_RESTORE_SIGMASK flag.</div><div class='del'>-		 */</div><div class='del'>-		current_thread_info()-&gt;local_flags &amp;= ~_TLF_RESTORE_SIGMASK;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Let tracing know that we've done the handler setup.</div><div class='del'>-		 */</div><div class='del'>-		tracehook_signal_handler(signr, &amp;info, &amp;ka, regs,</div><div class='add'>+		signal_delivered(signr, &amp;info, &amp;ka, regs,</div><div class='ctx'> 					 test_thread_flag(TIF_SINGLESTEP));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -193,8 +163,6 @@ void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags)</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/signal.h b/arch/powerpc/kernel/signal.h<br/>index 8dde973aaaf5..e00acb413934 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/signal.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/signal.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/signal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/signal.h</a></div><div class='hunk'>@@ -10,13 +10,10 @@</div><div class='ctx'> #ifndef _POWERPC_ARCH_SIGNAL_H</div><div class='ctx'> #define _POWERPC_ARCH_SIGNAL_H</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> extern void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags);</div><div class='ctx'> </div><div class='ctx'> extern void __user * get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,</div><div class='ctx'> 				  size_t frame_size, int is_32);</div><div class='del'>-extern void restore_sigmask(sigset_t *set);</div><div class='ctx'> </div><div class='ctx'> extern int handle_signal32(unsigned long sig, struct k_sigaction *ka,</div><div class='ctx'> 			   siginfo_t *info, sigset_t *oldset,</div><div class='head'>diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c<br/>index 45eb998557f8..8b4c049aee20 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/signal_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/signal_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/signal_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/signal_32.c</a></div><div class='hunk'>@@ -204,10 +204,10 @@ static inline int get_old_sigaction(struct k_sigaction *new_ka,</div><div class='ctx'> </div><div class='ctx'> 	if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='ctx'> 			__get_user(new_ka-&gt;sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='del'>-			__get_user(new_ka-&gt;sa.sa_restorer, &amp;act-&gt;sa_restorer))</div><div class='add'>+			__get_user(new_ka-&gt;sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='add'>+			__get_user(new_ka-&gt;sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='add'>+			__get_user(mask, &amp;act-&gt;sa_mask))</div><div class='ctx'> 		return -EFAULT;</div><div class='del'>-	__get_user(new_ka-&gt;sa.sa_flags, &amp;act-&gt;sa_flags);</div><div class='del'>-	__get_user(mask, &amp;act-&gt;sa_mask);</div><div class='ctx'> 	siginitset(&amp;new_ka-&gt;sa.sa_mask, mask);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -244,17 +244,8 @@ static inline int restore_general_regs(struct pt_regs *regs,</div><div class='ctx'> long sys_sigsuspend(old_sigset_t mask)</div><div class='ctx'> {</div><div class='ctx'> 	sigset_t blocked;</div><div class='del'>-</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='ctx'> 	siginitset(&amp;blocked, mask);</div><div class='del'>-	set_current_blocked(&amp;blocked);</div><div class='del'>-</div><div class='del'>- 	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>- 	schedule();</div><div class='del'>-	set_restore_sigmask();</div><div class='del'>- 	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> long sys_sigaction(int sig, struct old_sigaction __user *act,</div><div class='hunk'>@@ -928,7 +919,7 @@ static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int</div><div class='ctx'> 	if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> #endif</div><div class='del'>-	restore_sigmask(&amp;set);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> 	if (restore_user_regs(regs, mcp, sig))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='hunk'>@@ -1282,7 +1273,7 @@ long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,</div><div class='ctx'> 	set.sig[0] = sigctx.oldmask;</div><div class='ctx'> 	set.sig[1] = sigctx._unused[3];</div><div class='ctx'> #endif</div><div class='del'>-	restore_sigmask(&amp;set);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	sr = (struct mcontext __user *)from_user_ptr(sigctx.regs);</div><div class='ctx'> 	addr = sr;</div><div class='head'>diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c<br/>index 2692efdb154e..d183f8719a50 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/signal_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/signal_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/signal_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/signal_64.c</a></div><div class='hunk'>@@ -335,7 +335,7 @@ int sys_swapcontext(struct ucontext __user *old_ctx,</div><div class='ctx'> </div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;new_ctx-&gt;uc_sigmask, sizeof(set)))</div><div class='ctx'> 		do_exit(SIGSEGV);</div><div class='del'>-	restore_sigmask(&amp;set);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> 	if (restore_sigcontext(regs, NULL, 0, &amp;new_ctx-&gt;uc_mcontext))</div><div class='ctx'> 		do_exit(SIGSEGV);</div><div class='ctx'> </div><div class='hunk'>@@ -364,7 +364,7 @@ int sys_rt_sigreturn(unsigned long r3, unsigned long r4, unsigned long r5,</div><div class='ctx'> </div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;uc-&gt;uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='del'>-	restore_sigmask(&amp;set);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> 	if (restore_sigcontext(regs, NULL, 1, &amp;uc-&gt;uc_mcontext))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c<br/>index d9f94410fd7f..e4cb34322de4 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/smp.c</a></div><div class='hunk'>@@ -57,27 +57,9 @@</div><div class='ctx'> #define DBG(fmt...)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* Store all idle threads, this can be reused instead of creating</div><div class='del'>-* a new thread. Also avoids complicated thread destroy functionality</div><div class='del'>-* for idle threads.</div><div class='del'>-*/</div><div class='ctx'> #ifdef CONFIG_HOTPLUG_CPU</div><div class='del'>-/*</div><div class='del'>- * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is</div><div class='del'>- * removed after init for !CONFIG_HOTPLUG_CPU.</div><div class='del'>- */</div><div class='del'>-static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);</div><div class='del'>-#define get_idle_for_cpu(x)      (per_cpu(idle_thread_array, x))</div><div class='del'>-#define set_idle_for_cpu(x, p)   (per_cpu(idle_thread_array, x) = (p))</div><div class='del'>-</div><div class='ctx'> /* State of each CPU during hotplug phases */</div><div class='ctx'> static DEFINE_PER_CPU(int, cpu_state) = { 0 };</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;</div><div class='del'>-#define get_idle_for_cpu(x)      (idle_thread_array[(x)])</div><div class='del'>-#define set_idle_for_cpu(x, p)   (idle_thread_array[(x)] = (p))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> struct thread_info *secondary_ti;</div><div class='hunk'>@@ -429,60 +411,19 @@ int generic_check_cpu_restart(unsigned int cpu)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-struct create_idle {</div><div class='del'>-	struct work_struct work;</div><div class='del'>-	struct task_struct *idle;</div><div class='del'>-	struct completion done;</div><div class='del'>-	int cpu;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __cpuinit do_fork_idle(struct work_struct *work)</div><div class='add'>+static void cpu_idle_thread_init(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='del'>-	struct create_idle *c_idle =</div><div class='del'>-		container_of(work, struct create_idle, work);</div><div class='del'>-</div><div class='del'>-	c_idle-&gt;idle = fork_idle(c_idle-&gt;cpu);</div><div class='del'>-	complete(&amp;c_idle-&gt;done);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __cpuinit create_idle(unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	struct thread_info *ti;</div><div class='del'>-	struct create_idle c_idle = {</div><div class='del'>-		.cpu	= cpu,</div><div class='del'>-		.done	= COMPLETION_INITIALIZER_ONSTACK(c_idle.done),</div><div class='del'>-	};</div><div class='del'>-	INIT_WORK_ONSTACK(&amp;c_idle.work, do_fork_idle);</div><div class='del'>-</div><div class='del'>-	c_idle.idle = get_idle_for_cpu(cpu);</div><div class='del'>-</div><div class='del'>-	/* We can't use kernel_thread since we must avoid to</div><div class='del'>-	 * reschedule the child. We use a workqueue because</div><div class='del'>-	 * we want to fork from a kernel thread, not whatever</div><div class='del'>-	 * userspace process happens to be trying to online us.</div><div class='del'>-	 */</div><div class='del'>-	if (!c_idle.idle) {</div><div class='del'>-		schedule_work(&amp;c_idle.work);</div><div class='del'>-		wait_for_completion(&amp;c_idle.done);</div><div class='del'>-	} else</div><div class='del'>-		init_idle(c_idle.idle, cpu);</div><div class='del'>-	if (IS_ERR(c_idle.idle)) {		</div><div class='del'>-		pr_err("Failed fork for CPU %u: %li", cpu, PTR_ERR(c_idle.idle));</div><div class='del'>-		return PTR_ERR(c_idle.idle);</div><div class='del'>-	}</div><div class='del'>-	ti = task_thread_info(c_idle.idle);</div><div class='add'>+	struct thread_info *ti = task_thread_info(idle);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='del'>-	paca[cpu].__current = c_idle.idle;</div><div class='add'>+	paca[cpu].__current = idle;</div><div class='ctx'> 	paca[cpu].kstack = (unsigned long)ti + THREAD_SIZE - STACK_FRAME_OVERHEAD;</div><div class='ctx'> #endif</div><div class='ctx'> 	ti-&gt;cpu = cpu;</div><div class='del'>-	current_set[cpu] = ti;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	secondary_ti = current_set[cpu] = ti;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='ctx'> 	int rc, c;</div><div class='ctx'> </div><div class='hunk'>@@ -490,12 +431,7 @@ int __cpuinit __cpu_up(unsigned int cpu)</div><div class='ctx'> 	    (smp_ops-&gt;cpu_bootable &amp;&amp; !smp_ops-&gt;cpu_bootable(cpu)))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* Make sure we have an idle thread */</div><div class='del'>-	rc = create_idle(cpu);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='del'>-</div><div class='del'>-	secondary_ti = current_set[cpu];</div><div class='add'>+	cpu_idle_thread_init(cpu, tidle);</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure callin-map entry is 0 (can be leftover a CPU</div><div class='ctx'> 	 * hotplug</div><div class='head'>diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c<br/>index 2c42cd72d0f5..be171ee73bf8 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/time.c</a></div><div class='hunk'>@@ -100,7 +100,7 @@ static int decrementer_set_next_event(unsigned long evt,</div><div class='ctx'> static void decrementer_set_mode(enum clock_event_mode mode,</div><div class='ctx'> 				 struct clock_event_device *dev);</div><div class='ctx'> </div><div class='del'>-static struct clock_event_device decrementer_clockevent = {</div><div class='add'>+struct clock_event_device decrementer_clockevent = {</div><div class='ctx'> 	.name           = "decrementer",</div><div class='ctx'> 	.rating         = 200,</div><div class='ctx'> 	.irq            = 0,</div><div class='hunk'>@@ -108,6 +108,7 @@ static struct clock_event_device decrementer_clockevent = {</div><div class='ctx'> 	.set_mode       = decrementer_set_mode,</div><div class='ctx'> 	.features       = CLOCK_EVT_FEAT_ONESHOT,</div><div class='ctx'> };</div><div class='add'>+EXPORT_SYMBOL(decrementer_clockevent);</div><div class='ctx'> </div><div class='ctx'> DEFINE_PER_CPU(u64, decrementers_next_tb);</div><div class='ctx'> static DEFINE_PER_CPU(struct clock_event_device, decrementers);</div><div class='hunk'>@@ -474,6 +475,7 @@ void timer_interrupt(struct pt_regs * regs)</div><div class='ctx'> 	struct pt_regs *old_regs;</div><div class='ctx'> 	u64 *next_tb = &amp;__get_cpu_var(decrementers_next_tb);</div><div class='ctx'> 	struct clock_event_device *evt = &amp;__get_cpu_var(decrementers);</div><div class='add'>+	u64 now;</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure a positive value is written to the decrementer, or else</div><div class='ctx'> 	 * some CPUs will continue to take decrementer exceptions.</div><div class='hunk'>@@ -508,9 +510,16 @@ void timer_interrupt(struct pt_regs * regs)</div><div class='ctx'> 		irq_work_run();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*next_tb = ~(u64)0;</div><div class='del'>-	if (evt-&gt;event_handler)</div><div class='del'>-		evt-&gt;event_handler(evt);</div><div class='add'>+	now = get_tb_or_rtc();</div><div class='add'>+	if (now &gt;= *next_tb) {</div><div class='add'>+		*next_tb = ~(u64)0;</div><div class='add'>+		if (evt-&gt;event_handler)</div><div class='add'>+			evt-&gt;event_handler(evt);</div><div class='add'>+	} else {</div><div class='add'>+		now = *next_tb - now;</div><div class='add'>+		if (now &lt;= DECREMENTER_MAX)</div><div class='add'>+			set_dec((int)now);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> 	/* collect purr register values often, for accurate calculations */</div><div class='head'>diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c<br/>index 6aa0c663e247..158972341a2d 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/traps.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/traps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/traps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/traps.c</a></div><div class='hunk'>@@ -248,7 +248,7 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)</div><div class='ctx'> 				   addr, regs-&gt;nip, regs-&gt;link, code);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!arch_irq_disabled_regs(regs))</div><div class='add'>+	if (arch_irqs_disabled() &amp;&amp; !arch_irq_disabled_regs(regs))</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;info, 0, sizeof(info));</div><div class='hunk'>@@ -1019,7 +1019,9 @@ void __kprobes program_check_exception(struct pt_regs *regs)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	local_irq_enable();</div><div class='add'>+	/* We restore the interrupt state now */</div><div class='add'>+	if (!arch_irq_disabled_regs(regs))</div><div class='add'>+		local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MATH_EMULATION</div><div class='ctx'> 	/* (reason &amp; REASON_ILLEGAL) would be the obvious thing here,</div><div class='hunk'>@@ -1069,6 +1071,10 @@ void alignment_exception(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int sig, code, fixed = 0;</div><div class='ctx'> </div><div class='add'>+	/* We restore the interrupt state now */</div><div class='add'>+	if (!arch_irq_disabled_regs(regs))</div><div class='add'>+		local_irq_enable();</div><div class='add'>+</div><div class='ctx'> 	/* we don't implement logging of alignment exceptions */</div><div class='ctx'> 	if (!(current-&gt;thread.align_ctl &amp; PR_UNALIGN_SIGBUS))</div><div class='ctx'> 		fixed = fix_alignment(regs);</div><div class='head'>diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S<br/>index 4d5a3edff49e..e830289d2e48 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/vector.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/vector.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/vector.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/vector.S</a></div><div class='hunk'>@@ -89,6 +89,16 @@ _GLOBAL(load_up_altivec)</div><div class='ctx'> 	/* restore registers and return */</div><div class='ctx'> 	blr</div><div class='ctx'> </div><div class='add'>+_GLOBAL(giveup_altivec_notask)</div><div class='add'>+	mfmsr	r3</div><div class='add'>+	andis.	r4,r3,MSR_VEC@h</div><div class='add'>+	bnelr				/* Already enabled? */</div><div class='add'>+	oris	r3,r3,MSR_VEC@h</div><div class='add'>+	SYNC</div><div class='add'>+	MTMSRD(r3)			/* enable use of VMX now */</div><div class='add'>+	isync</div><div class='add'>+	blr</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * giveup_altivec(tsk)</div><div class='ctx'>  * Disable VMX for the task given as the argument,</div><div class='head'>diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c<br/>index a3a99901c8ec..cb87301ccd55 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kernel/vio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kernel/vio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kernel/vio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kernel/vio.c</a></div><div class='hunk'>@@ -14,7 +14,9 @@</div><div class='ctx'>  *      2 of the License, or (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/stat.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -709,13 +711,26 @@ static int vio_cmo_bus_probe(struct vio_dev *viodev)</div><div class='ctx'> 	struct vio_driver *viodrv = to_vio_driver(dev-&gt;driver);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	size_t size;</div><div class='add'>+	bool dma_capable = false;</div><div class='add'>+</div><div class='add'>+	/* A device requires entitlement if it has a DMA window property */</div><div class='add'>+	switch (viodev-&gt;family) {</div><div class='add'>+	case VDEVICE:</div><div class='add'>+		if (of_get_property(viodev-&gt;dev.of_node,</div><div class='add'>+					"ibm,my-dma-window", NULL))</div><div class='add'>+			dma_capable = true;</div><div class='add'>+		break;</div><div class='add'>+	case PFO:</div><div class='add'>+		dma_capable = false;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(dev, "unknown device family: %d\n", viodev-&gt;family);</div><div class='add'>+		BUG();</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Check to see that device has a DMA window and configure</div><div class='del'>-	 * entitlement for the device.</div><div class='del'>-	 */</div><div class='del'>-	if (of_get_property(viodev-&gt;dev.of_node,</div><div class='del'>-	                    "ibm,my-dma-window", NULL)) {</div><div class='add'>+	/* Configure entitlement for the device. */</div><div class='add'>+	if (dma_capable) {</div><div class='ctx'> 		/* Check that the driver is CMO enabled and get desired DMA */</div><div class='ctx'> 		if (!viodrv-&gt;get_desired_dma) {</div><div class='ctx'> 			dev_err(dev, "%s: device driver does not support CMO\n",</div><div class='hunk'>@@ -1050,6 +1065,94 @@ static void vio_cmo_sysfs_init(void) { }</div><div class='ctx'> EXPORT_SYMBOL(vio_cmo_entitlement_update);</div><div class='ctx'> EXPORT_SYMBOL(vio_cmo_set_dev_desired);</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Platform Facilities Option (PFO) support</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vio_h_cop_sync - Perform a synchronous PFO co-processor operation</div><div class='add'>+ *</div><div class='add'>+ * @vdev - Pointer to a struct vio_dev for device</div><div class='add'>+ * @op - Pointer to a struct vio_pfo_op for the operation parameters</div><div class='add'>+ *</div><div class='add'>+ * Calls the hypervisor to synchronously perform the PFO operation</div><div class='add'>+ * described in @op.  In the case of a busy response from the hypervisor,</div><div class='add'>+ * the operation will be re-submitted indefinitely unless a non-zero timeout</div><div class='add'>+ * is specified or an error occurs. The timeout places a limit on when to</div><div class='add'>+ * stop re-submitting a operation, the total time can be exceeded if an</div><div class='add'>+ * operation is in progress.</div><div class='add'>+ *</div><div class='add'>+ * If op-&gt;hcall_ret is not NULL, this will be set to the return from the</div><div class='add'>+ * last h_cop_op call or it will be 0 if an error not involving the h_call</div><div class='add'>+ * was encountered.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ *	0 on success,</div><div class='add'>+ *	-EINVAL if the h_call fails due to an invalid parameter,</div><div class='add'>+ *	-E2BIG if the h_call can not be performed synchronously,</div><div class='add'>+ *	-EBUSY if a timeout is specified and has elapsed,</div><div class='add'>+ *	-EACCES if the memory area for data/status has been rescinded, or</div><div class='add'>+ *	-EPERM if a hardware fault has been indicated</div><div class='add'>+ */</div><div class='add'>+int vio_h_cop_sync(struct vio_dev *vdev, struct vio_pfo_op *op)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;vdev-&gt;dev;</div><div class='add'>+	unsigned long deadline = 0;</div><div class='add'>+	long hret = 0;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (op-&gt;timeout)</div><div class='add'>+		deadline = jiffies + msecs_to_jiffies(op-&gt;timeout);</div><div class='add'>+</div><div class='add'>+	while (true) {</div><div class='add'>+		hret = plpar_hcall_norets(H_COP, op-&gt;flags,</div><div class='add'>+				vdev-&gt;resource_id,</div><div class='add'>+				op-&gt;in, op-&gt;inlen, op-&gt;out,</div><div class='add'>+				op-&gt;outlen, op-&gt;csbcpb);</div><div class='add'>+</div><div class='add'>+		if (hret == H_SUCCESS ||</div><div class='add'>+		    (hret != H_NOT_ENOUGH_RESOURCES &amp;&amp;</div><div class='add'>+		     hret != H_BUSY &amp;&amp; hret != H_RESOURCE) ||</div><div class='add'>+		    (op-&gt;timeout &amp;&amp; time_after(deadline, jiffies)))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		dev_dbg(dev, "%s: hcall ret(%ld), retrying.\n", __func__, hret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (hret) {</div><div class='add'>+	case H_SUCCESS:</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	case H_OP_MODE:</div><div class='add'>+	case H_TOO_BIG:</div><div class='add'>+		ret = -E2BIG;</div><div class='add'>+		break;</div><div class='add'>+	case H_RESCINDED:</div><div class='add'>+		ret = -EACCES;</div><div class='add'>+		break;</div><div class='add'>+	case H_HARDWARE:</div><div class='add'>+		ret = -EPERM;</div><div class='add'>+		break;</div><div class='add'>+	case H_NOT_ENOUGH_RESOURCES:</div><div class='add'>+	case H_RESOURCE:</div><div class='add'>+	case H_BUSY:</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_dbg(dev, "%s: Sync h_cop_op failure (ret:%d) (hret:%ld)\n",</div><div class='add'>+				__func__, ret, hret);</div><div class='add'>+</div><div class='add'>+	op-&gt;hcall_err = hret;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(vio_h_cop_sync);</div><div class='add'>+</div><div class='ctx'> static struct iommu_table *vio_build_iommu_table(struct vio_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	const unsigned char *dma_window;</div><div class='hunk'>@@ -1211,35 +1314,87 @@ static void __devinit vio_dev_release(struct device *dev)</div><div class='ctx'> struct vio_dev *vio_register_device_node(struct device_node *of_node)</div><div class='ctx'> {</div><div class='ctx'> 	struct vio_dev *viodev;</div><div class='add'>+	struct device_node *parent_node;</div><div class='ctx'> 	const unsigned int *unit_address;</div><div class='add'>+	const unsigned int *pfo_resid = NULL;</div><div class='add'>+	enum vio_dev_family family;</div><div class='add'>+	const char *of_node_name = of_node-&gt;name ? of_node-&gt;name : "&lt;unknown&gt;";</div><div class='ctx'> </div><div class='del'>-	/* we need the 'device_type' property, in order to match with drivers */</div><div class='del'>-	if (of_node-&gt;type == NULL) {</div><div class='del'>-		printk(KERN_WARNING "%s: node %s missing 'device_type'\n",</div><div class='del'>-				__func__,</div><div class='del'>-				of_node-&gt;name ? of_node-&gt;name : "&lt;unknown&gt;");</div><div class='add'>+	/*</div><div class='add'>+	 * Determine if this node is a under the /vdevice node or under the</div><div class='add'>+	 * /ibm,platform-facilities node.  This decides the device's family.</div><div class='add'>+	 */</div><div class='add'>+	parent_node = of_get_parent(of_node);</div><div class='add'>+	if (parent_node) {</div><div class='add'>+		if (!strcmp(parent_node-&gt;full_name, "/ibm,platform-facilities"))</div><div class='add'>+			family = PFO;</div><div class='add'>+		else if (!strcmp(parent_node-&gt;full_name, "/vdevice"))</div><div class='add'>+			family = VDEVICE;</div><div class='add'>+		else {</div><div class='add'>+			pr_warn("%s: parent(%s) of %s not recognized.\n",</div><div class='add'>+					__func__,</div><div class='add'>+					parent_node-&gt;full_name,</div><div class='add'>+					of_node_name);</div><div class='add'>+			of_node_put(parent_node);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+		of_node_put(parent_node);</div><div class='add'>+	} else {</div><div class='add'>+		pr_warn("%s: could not determine the parent of node %s.\n",</div><div class='add'>+				__func__, of_node_name);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	unit_address = of_get_property(of_node, "reg", NULL);</div><div class='del'>-	if (unit_address == NULL) {</div><div class='del'>-		printk(KERN_WARNING "%s: node %s missing 'reg'\n",</div><div class='del'>-				__func__,</div><div class='del'>-				of_node-&gt;name ? of_node-&gt;name : "&lt;unknown&gt;");</div><div class='del'>-		return NULL;</div><div class='add'>+	if (family == PFO) {</div><div class='add'>+		if (of_get_property(of_node, "interrupt-controller", NULL)) {</div><div class='add'>+			pr_debug("%s: Skipping the interrupt controller %s.\n",</div><div class='add'>+					__func__, of_node_name);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* allocate a vio_dev for this node */</div><div class='ctx'> 	viodev = kzalloc(sizeof(struct vio_dev), GFP_KERNEL);</div><div class='del'>-	if (viodev == NULL)</div><div class='add'>+	if (viodev == NULL) {</div><div class='add'>+		pr_warn("%s: allocation failure for VIO device.\n", __func__);</div><div class='ctx'> 		return NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	viodev-&gt;irq = irq_of_parse_and_map(of_node, 0);</div><div class='add'>+	/* we need the 'device_type' property, in order to match with drivers */</div><div class='add'>+	viodev-&gt;family = family;</div><div class='add'>+	if (viodev-&gt;family == VDEVICE) {</div><div class='add'>+		if (of_node-&gt;type != NULL)</div><div class='add'>+			viodev-&gt;type = of_node-&gt;type;</div><div class='add'>+		else {</div><div class='add'>+			pr_warn("%s: node %s is missing the 'device_type' "</div><div class='add'>+					"property.\n", __func__, of_node_name);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		unit_address = of_get_property(of_node, "reg", NULL);</div><div class='add'>+		if (unit_address == NULL) {</div><div class='add'>+			pr_warn("%s: node %s missing 'reg'\n",</div><div class='add'>+					__func__, of_node_name);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		dev_set_name(&amp;viodev-&gt;dev, "%x", *unit_address);</div><div class='add'>+		viodev-&gt;irq = irq_of_parse_and_map(of_node, 0);</div><div class='add'>+		viodev-&gt;unit_address = *unit_address;</div><div class='add'>+	} else {</div><div class='add'>+		/* PFO devices need their resource_id for submitting COP_OPs</div><div class='add'>+		 * This is an optional field for devices, but is required when</div><div class='add'>+		 * performing synchronous ops */</div><div class='add'>+		pfo_resid = of_get_property(of_node, "ibm,resource-id", NULL);</div><div class='add'>+		if (pfo_resid != NULL)</div><div class='add'>+			viodev-&gt;resource_id = *pfo_resid;</div><div class='add'>+</div><div class='add'>+		unit_address = NULL;</div><div class='add'>+		dev_set_name(&amp;viodev-&gt;dev, "%s", of_node_name);</div><div class='add'>+		viodev-&gt;type = of_node_name;</div><div class='add'>+		viodev-&gt;irq = 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	dev_set_name(&amp;viodev-&gt;dev, "%x", *unit_address);</div><div class='ctx'> 	viodev-&gt;name = of_node-&gt;name;</div><div class='del'>-	viodev-&gt;type = of_node-&gt;type;</div><div class='del'>-	viodev-&gt;unit_address = *unit_address;</div><div class='ctx'> 	viodev-&gt;dev.of_node = of_node_get(of_node);</div><div class='ctx'> </div><div class='ctx'> 	if (firmware_has_feature(FW_FEATURE_CMO))</div><div class='hunk'>@@ -1267,16 +1422,51 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return viodev;</div><div class='add'>+</div><div class='add'>+out:	/* Use this exit point for any return prior to device_register */</div><div class='add'>+	kfree(viodev);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(vio_register_device_node);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * vio_bus_scan_for_devices - Scan OF and register each child device</div><div class='add'>+ * @root_name - OF node name for the root of the subtree to search.</div><div class='add'>+ *		This must be non-NULL</div><div class='add'>+ *</div><div class='add'>+ * Starting from the root node provide, register the device node for</div><div class='add'>+ * each child beneath the root.</div><div class='add'>+ */</div><div class='add'>+static void vio_bus_scan_register_devices(char *root_name)</div><div class='add'>+{</div><div class='add'>+	struct device_node *node_root, *node_child;</div><div class='add'>+</div><div class='add'>+	if (!root_name)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	node_root = of_find_node_by_name(NULL, root_name);</div><div class='add'>+	if (node_root) {</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Create struct vio_devices for each virtual device in</div><div class='add'>+		 * the device tree. Drivers will associate with them later.</div><div class='add'>+		 */</div><div class='add'>+		node_child = of_get_next_child(node_root, NULL);</div><div class='add'>+		while (node_child) {</div><div class='add'>+			vio_register_device_node(node_child);</div><div class='add'>+			node_child = of_get_next_child(node_root, node_child);</div><div class='add'>+		}</div><div class='add'>+		of_node_put(node_root);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * vio_bus_init: - Initialize the virtual IO bus</div><div class='ctx'>  */</div><div class='ctx'> static int __init vio_bus_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='del'>-	struct device_node *node_vroot;</div><div class='ctx'> </div><div class='ctx'> 	if (firmware_has_feature(FW_FEATURE_CMO))</div><div class='ctx'> 		vio_cmo_sysfs_init();</div><div class='hunk'>@@ -1301,19 +1491,8 @@ static int __init vio_bus_init(void)</div><div class='ctx'> 	if (firmware_has_feature(FW_FEATURE_CMO))</div><div class='ctx'> 		vio_cmo_bus_init();</div><div class='ctx'> </div><div class='del'>-	node_vroot = of_find_node_by_name(NULL, "vdevice");</div><div class='del'>-	if (node_vroot) {</div><div class='del'>-		struct device_node *of_node;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Create struct vio_devices for each virtual device in</div><div class='del'>-		 * the device tree. Drivers will associate with them later.</div><div class='del'>-		 */</div><div class='del'>-		for (of_node = node_vroot-&gt;child; of_node != NULL;</div><div class='del'>-				of_node = of_node-&gt;sibling)</div><div class='del'>-			vio_register_device_node(of_node);</div><div class='del'>-		of_node_put(node_vroot);</div><div class='del'>-	}</div><div class='add'>+	vio_bus_scan_register_devices("vdevice");</div><div class='add'>+	vio_bus_scan_register_devices("ibm,platform-facilities");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1436,12 +1615,28 @@ struct vio_dev *vio_find_node(struct device_node *vnode)</div><div class='ctx'> {</div><div class='ctx'> 	const uint32_t *unit_address;</div><div class='ctx'> 	char kobj_name[20];</div><div class='add'>+	struct device_node *vnode_parent;</div><div class='add'>+	const char *dev_type;</div><div class='add'>+</div><div class='add'>+	vnode_parent = of_get_parent(vnode);</div><div class='add'>+	if (!vnode_parent)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	dev_type = of_get_property(vnode_parent, "device_type", NULL);</div><div class='add'>+	of_node_put(vnode_parent);</div><div class='add'>+	if (!dev_type)</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* construct the kobject name from the device node */</div><div class='del'>-	unit_address = of_get_property(vnode, "reg", NULL);</div><div class='del'>-	if (!unit_address)</div><div class='add'>+	if (!strcmp(dev_type, "vdevice")) {</div><div class='add'>+		unit_address = of_get_property(vnode, "reg", NULL);</div><div class='add'>+		if (!unit_address)</div><div class='add'>+			return NULL;</div><div class='add'>+		snprintf(kobj_name, sizeof(kobj_name), "%x", *unit_address);</div><div class='add'>+	} else if (!strcmp(dev_type, "ibm,platform-facilities"))</div><div class='add'>+		snprintf(kobj_name, sizeof(kobj_name), "%s", vnode-&gt;name);</div><div class='add'>+	else</div><div class='ctx'> 		return NULL;</div><div class='del'>-	snprintf(kobj_name, sizeof(kobj_name), "%x", *unit_address);</div><div class='ctx'> </div><div class='ctx'> 	return vio_find_name(kobj_name);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kvm/44x.c b/arch/powerpc/kvm/44x.c<br/>index 7b612a76c701..50e7dbc7356c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/44x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/44x.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/44x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/44x.c</a></div><div class='hunk'>@@ -29,15 +29,18 @@</div><div class='ctx'> #include &lt;asm/kvm_ppc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "44x_tlb.h"</div><div class='add'>+#include "booke.h"</div><div class='ctx'> </div><div class='ctx'> void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='ctx'> {</div><div class='add'>+	kvmppc_booke_vcpu_load(vcpu, cpu);</div><div class='ctx'> 	kvmppc_44x_tlb_load(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	kvmppc_44x_tlb_put(vcpu);</div><div class='add'>+	kvmppc_booke_vcpu_put(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvmppc_core_check_processor_compat(void)</div><div class='hunk'>@@ -160,6 +163,15 @@ void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kmem_cache_free(kvm_vcpu_cache, vcpu_44x);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int kvmppc_core_init_vm(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_core_destroy_vm(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init kvmppc_44x_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='head'>diff --git a/arch/powerpc/kvm/44x_emulate.c b/arch/powerpc/kvm/44x_emulate.c<br/>index 549bb2c9a47a..c8c61578fdfc 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/44x_emulate.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/44x_emulate.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/44x_emulate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/44x_emulate.c</a></div><div class='hunk'>@@ -37,22 +37,19 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'>                            unsigned int inst, int *advance)</div><div class='ctx'> {</div><div class='ctx'> 	int emulated = EMULATE_DONE;</div><div class='del'>-	int dcrn;</div><div class='del'>-	int ra;</div><div class='del'>-	int rb;</div><div class='del'>-	int rc;</div><div class='del'>-	int rs;</div><div class='del'>-	int rt;</div><div class='del'>-	int ws;</div><div class='add'>+	int dcrn = get_dcrn(inst);</div><div class='add'>+	int ra = get_ra(inst);</div><div class='add'>+	int rb = get_rb(inst);</div><div class='add'>+	int rc = get_rc(inst);</div><div class='add'>+	int rs = get_rs(inst);</div><div class='add'>+	int rt = get_rt(inst);</div><div class='add'>+	int ws = get_ws(inst);</div><div class='ctx'> </div><div class='ctx'> 	switch (get_op(inst)) {</div><div class='ctx'> 	case 31:</div><div class='ctx'> 		switch (get_xop(inst)) {</div><div class='ctx'> </div><div class='ctx'> 		case XOP_MFDCR:</div><div class='del'>-			dcrn = get_dcrn(inst);</div><div class='del'>-			rt = get_rt(inst);</div><div class='del'>-</div><div class='ctx'> 			/* The guest may access CPR0 registers to determine the timebase</div><div class='ctx'> 			 * frequency, and it must know the real host frequency because it</div><div class='ctx'> 			 * can directly access the timebase registers.</div><div class='hunk'>@@ -88,9 +85,6 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case XOP_MTDCR:</div><div class='del'>-			dcrn = get_dcrn(inst);</div><div class='del'>-			rs = get_rs(inst);</div><div class='del'>-</div><div class='ctx'> 			/* emulate some access in kernel */</div><div class='ctx'> 			switch (dcrn) {</div><div class='ctx'> 			case DCRN_CPR0_CONFIG_ADDR:</div><div class='hunk'>@@ -108,17 +102,10 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case XOP_TLBWE:</div><div class='del'>-			ra = get_ra(inst);</div><div class='del'>-			rs = get_rs(inst);</div><div class='del'>-			ws = get_ws(inst);</div><div class='ctx'> 			emulated = kvmppc_44x_emul_tlbwe(vcpu, ra, rs, ws);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case XOP_TLBSX:</div><div class='del'>-			rt = get_rt(inst);</div><div class='del'>-			ra = get_ra(inst);</div><div class='del'>-			rb = get_rb(inst);</div><div class='del'>-			rc = get_rc(inst);</div><div class='ctx'> 			emulated = kvmppc_44x_emul_tlbsx(vcpu, rt, ra, rb, rc);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -141,41 +128,41 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 	return emulated;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)</div><div class='add'>+int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)</div><div class='ctx'> {</div><div class='ctx'> 	int emulated = EMULATE_DONE;</div><div class='ctx'> </div><div class='ctx'> 	switch (sprn) {</div><div class='ctx'> 	case SPRN_PID:</div><div class='del'>-		kvmppc_set_pid(vcpu, kvmppc_get_gpr(vcpu, rs)); break;</div><div class='add'>+		kvmppc_set_pid(vcpu, spr_val); break;</div><div class='ctx'> 	case SPRN_MMUCR:</div><div class='del'>-		vcpu-&gt;arch.mmucr = kvmppc_get_gpr(vcpu, rs); break;</div><div class='add'>+		vcpu-&gt;arch.mmucr = spr_val; break;</div><div class='ctx'> 	case SPRN_CCR0:</div><div class='del'>-		vcpu-&gt;arch.ccr0 = kvmppc_get_gpr(vcpu, rs); break;</div><div class='add'>+		vcpu-&gt;arch.ccr0 = spr_val; break;</div><div class='ctx'> 	case SPRN_CCR1:</div><div class='del'>-		vcpu-&gt;arch.ccr1 = kvmppc_get_gpr(vcpu, rs); break;</div><div class='add'>+		vcpu-&gt;arch.ccr1 = spr_val; break;</div><div class='ctx'> 	default:</div><div class='del'>-		emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);</div><div class='add'>+		emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return emulated;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)</div><div class='add'>+int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)</div><div class='ctx'> {</div><div class='ctx'> 	int emulated = EMULATE_DONE;</div><div class='ctx'> </div><div class='ctx'> 	switch (sprn) {</div><div class='ctx'> 	case SPRN_PID:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.pid); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.pid; break;</div><div class='ctx'> 	case SPRN_MMUCR:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.mmucr); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.mmucr; break;</div><div class='ctx'> 	case SPRN_CCR0:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ccr0); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ccr0; break;</div><div class='ctx'> 	case SPRN_CCR1:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ccr1); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ccr1; break;</div><div class='ctx'> 	default:</div><div class='del'>-		emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);</div><div class='add'>+		emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return emulated;</div><div class='head'>diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig<br/>index 8f64709ae331..f4dacb9c57fa 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/Kconfig</a></div><div class='hunk'>@@ -90,6 +90,9 @@ config KVM_BOOK3S_64_PR</div><div class='ctx'> 	depends on KVM_BOOK3S_64 &amp;&amp; !KVM_BOOK3S_64_HV</div><div class='ctx'> 	select KVM_BOOK3S_PR</div><div class='ctx'> </div><div class='add'>+config KVM_BOOKE_HV</div><div class='add'>+	bool</div><div class='add'>+</div><div class='ctx'> config KVM_440</div><div class='ctx'> 	bool "KVM support for PowerPC 440 processors"</div><div class='ctx'> 	depends on EXPERIMENTAL &amp;&amp; 44x</div><div class='hunk'>@@ -106,7 +109,7 @@ config KVM_440</div><div class='ctx'> </div><div class='ctx'> config KVM_EXIT_TIMING</div><div class='ctx'> 	bool "Detailed exit timing"</div><div class='del'>-	depends on KVM_440 || KVM_E500</div><div class='add'>+	depends on KVM_440 || KVM_E500V2 || KVM_E500MC</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Calculate elapsed time for every exit/enter cycle. A per-vcpu</div><div class='ctx'> 	  report is available in debugfs kvm/vm#_vcpu#_timing.</div><div class='hunk'>@@ -115,14 +118,29 @@ config KVM_EXIT_TIMING</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='del'>-config KVM_E500</div><div class='del'>-	bool "KVM support for PowerPC E500 processors"</div><div class='del'>-	depends on EXPERIMENTAL &amp;&amp; E500</div><div class='add'>+config KVM_E500V2</div><div class='add'>+	bool "KVM support for PowerPC E500v2 processors"</div><div class='add'>+	depends on EXPERIMENTAL &amp;&amp; E500 &amp;&amp; !PPC_E500MC</div><div class='ctx'> 	select KVM</div><div class='ctx'> 	select KVM_MMIO</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Support running unmodified E500 guest kernels in virtual machines on</div><div class='del'>-	  E500 host processors.</div><div class='add'>+	  E500v2 host processors.</div><div class='add'>+</div><div class='add'>+	  This module provides access to the hardware capabilities through</div><div class='add'>+	  a character device node named /dev/kvm.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='add'>+config KVM_E500MC</div><div class='add'>+	bool "KVM support for PowerPC E500MC/E5500 processors"</div><div class='add'>+	depends on EXPERIMENTAL &amp;&amp; PPC_E500MC</div><div class='add'>+	select KVM</div><div class='add'>+	select KVM_MMIO</div><div class='add'>+	select KVM_BOOKE_HV</div><div class='add'>+	---help---</div><div class='add'>+	  Support running unmodified E500MC/E5500 (32-bit) guest kernels in</div><div class='add'>+	  virtual machines on E500MC/E5500 host processors.</div><div class='ctx'> </div><div class='ctx'> 	  This module provides access to the hardware capabilities through</div><div class='ctx'> 	  a character device node named /dev/kvm.</div><div class='head'>diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile<br/>index 3688aeecc4b2..c2a08636e6d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/Makefile</a></div><div class='hunk'>@@ -36,7 +36,17 @@ kvm-e500-objs := \</div><div class='ctx'> 	e500.o \</div><div class='ctx'> 	e500_tlb.o \</div><div class='ctx'> 	e500_emulate.o</div><div class='del'>-kvm-objs-$(CONFIG_KVM_E500) := $(kvm-e500-objs)</div><div class='add'>+kvm-objs-$(CONFIG_KVM_E500V2) := $(kvm-e500-objs)</div><div class='add'>+</div><div class='add'>+kvm-e500mc-objs := \</div><div class='add'>+	$(common-objs-y) \</div><div class='add'>+	booke.o \</div><div class='add'>+	booke_emulate.o \</div><div class='add'>+	bookehv_interrupts.o \</div><div class='add'>+	e500mc.o \</div><div class='add'>+	e500_tlb.o \</div><div class='add'>+	e500_emulate.o</div><div class='add'>+kvm-objs-$(CONFIG_KVM_E500MC) := $(kvm-e500mc-objs)</div><div class='ctx'> </div><div class='ctx'> kvm-book3s_64-objs-$(CONFIG_KVM_BOOK3S_64_PR) := \</div><div class='ctx'> 	../../../virt/kvm/coalesced_mmio.o \</div><div class='hunk'>@@ -44,6 +54,7 @@ kvm-book3s_64-objs-$(CONFIG_KVM_BOOK3S_64_PR) := \</div><div class='ctx'> 	book3s_paired_singles.o \</div><div class='ctx'> 	book3s_pr.o \</div><div class='ctx'> 	book3s_pr_papr.o \</div><div class='add'>+	book3s_64_vio_hv.o \</div><div class='ctx'> 	book3s_emulate.o \</div><div class='ctx'> 	book3s_interrupts.o \</div><div class='ctx'> 	book3s_mmu_hpte.o \</div><div class='hunk'>@@ -68,6 +79,7 @@ kvm-book3s_64-module-objs := \</div><div class='ctx'> 	powerpc.o \</div><div class='ctx'> 	emulate.o \</div><div class='ctx'> 	book3s.o \</div><div class='add'>+	book3s_64_vio.o \</div><div class='ctx'> 	$(kvm-book3s_64-objs-y)</div><div class='ctx'> </div><div class='ctx'> kvm-objs-$(CONFIG_KVM_BOOK3S_64) := $(kvm-book3s_64-module-objs)</div><div class='hunk'>@@ -88,7 +100,8 @@ kvm-objs-$(CONFIG_KVM_BOOK3S_32) := $(kvm-book3s_32-objs)</div><div class='ctx'> kvm-objs := $(kvm-objs-m) $(kvm-objs-y)</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_KVM_440) += kvm.o</div><div class='del'>-obj-$(CONFIG_KVM_E500) += kvm.o</div><div class='add'>+obj-$(CONFIG_KVM_E500V2) += kvm.o</div><div class='add'>+obj-$(CONFIG_KVM_E500MC) += kvm.o</div><div class='ctx'> obj-$(CONFIG_KVM_BOOK3S_64) += kvm.o</div><div class='ctx'> obj-$(CONFIG_KVM_BOOK3S_32) += kvm.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c<br/>index 7d54f4ed6d96..3f2a8360c857 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s.c</a></div><div class='hunk'>@@ -258,7 +258,7 @@ static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)</div><div class='add'>+int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long *pending = &amp;vcpu-&gt;arch.pending_exceptions;</div><div class='ctx'> 	unsigned long old_pending = vcpu-&gt;arch.pending_exceptions;</div><div class='hunk'>@@ -283,12 +283,17 @@ void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	/* Tell the guest about our interrupt status */</div><div class='ctx'> 	kvmppc_update_int_pending(vcpu, *pending, old_pending);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn)</div><div class='ctx'> {</div><div class='ctx'> 	ulong mp_pa = vcpu-&gt;arch.magic_page_pa;</div><div class='ctx'> </div><div class='add'>+	if (!(vcpu-&gt;arch.shared-&gt;msr &amp; MSR_SF))</div><div class='add'>+		mp_pa = (uint32_t)mp_pa;</div><div class='add'>+</div><div class='ctx'> 	/* Magic page override */</div><div class='ctx'> 	if (unlikely(mp_pa) &amp;&amp;</div><div class='ctx'> 	    unlikely(((gfn &lt;&lt; PAGE_SHIFT) &amp; KVM_PAM) ==</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c b/arch/powerpc/kvm/book3s_64_mmu_host.c<br/>index 6f87f39a1ac2..10fc8ec9d2a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_64_mmu_host.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s_64_mmu_host.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_64_mmu_host.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_64_mmu_host.c</a></div><div class='hunk'>@@ -194,14 +194,14 @@ static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)</div><div class='ctx'> 	backwards_map = !backwards_map;</div><div class='ctx'> </div><div class='ctx'> 	/* Uh-oh ... out of mappings. Let's flush! */</div><div class='del'>-	if (vcpu_book3s-&gt;vsid_next == vcpu_book3s-&gt;vsid_max) {</div><div class='del'>-		vcpu_book3s-&gt;vsid_next = vcpu_book3s-&gt;vsid_first;</div><div class='add'>+	if (vcpu_book3s-&gt;proto_vsid_next == vcpu_book3s-&gt;proto_vsid_max) {</div><div class='add'>+		vcpu_book3s-&gt;proto_vsid_next = vcpu_book3s-&gt;proto_vsid_first;</div><div class='ctx'> 		memset(vcpu_book3s-&gt;sid_map, 0,</div><div class='ctx'> 		       sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);</div><div class='ctx'> 		kvmppc_mmu_pte_flush(vcpu, 0, 0);</div><div class='ctx'> 		kvmppc_mmu_flush_segments(vcpu);</div><div class='ctx'> 	}</div><div class='del'>-	map-&gt;host_vsid = vcpu_book3s-&gt;vsid_next++;</div><div class='add'>+	map-&gt;host_vsid = vsid_scramble(vcpu_book3s-&gt;proto_vsid_next++, 256M);</div><div class='ctx'> </div><div class='ctx'> 	map-&gt;guest_vsid = gvsid;</div><div class='ctx'> 	map-&gt;valid = true;</div><div class='hunk'>@@ -319,9 +319,10 @@ int kvmppc_mmu_init(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	vcpu3s-&gt;context_id[0] = err;</div><div class='ctx'> </div><div class='del'>-	vcpu3s-&gt;vsid_max = ((vcpu3s-&gt;context_id[0] + 1) &lt;&lt; USER_ESID_BITS) - 1;</div><div class='del'>-	vcpu3s-&gt;vsid_first = vcpu3s-&gt;context_id[0] &lt;&lt; USER_ESID_BITS;</div><div class='del'>-	vcpu3s-&gt;vsid_next = vcpu3s-&gt;vsid_first;</div><div class='add'>+	vcpu3s-&gt;proto_vsid_max = ((vcpu3s-&gt;context_id[0] + 1)</div><div class='add'>+				  &lt;&lt; USER_ESID_BITS) - 1;</div><div class='add'>+	vcpu3s-&gt;proto_vsid_first = vcpu3s-&gt;context_id[0] &lt;&lt; USER_ESID_BITS;</div><div class='add'>+	vcpu3s-&gt;proto_vsid_next = vcpu3s-&gt;proto_vsid_first;</div><div class='ctx'> </div><div class='ctx'> 	kvmppc_mmu_hpte_init(vcpu);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c b/arch/powerpc/kvm/book3s_64_mmu_hv.c<br/>index ddc485a529f2..80a577517584 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_64_mmu_hv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s_64_mmu_hv.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_64_mmu_hv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_64_mmu_hv.c</a></div><div class='hunk'>@@ -36,13 +36,11 @@</div><div class='ctx'> </div><div class='ctx'> /* POWER7 has 10-bit LPIDs, PPC970 has 6-bit LPIDs */</div><div class='ctx'> #define MAX_LPID_970	63</div><div class='del'>-#define NR_LPIDS	(LPID_RSVD + 1)</div><div class='del'>-unsigned long lpid_inuse[BITS_TO_LONGS(NR_LPIDS)];</div><div class='ctx'> </div><div class='ctx'> long kvmppc_alloc_hpt(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long hpt;</div><div class='del'>-	unsigned long lpid;</div><div class='add'>+	long lpid;</div><div class='ctx'> 	struct revmap_entry *rev;</div><div class='ctx'> 	struct kvmppc_linear_info *li;</div><div class='ctx'> </div><div class='hunk'>@@ -72,14 +70,9 @@ long kvmppc_alloc_hpt(struct kvm *kvm)</div><div class='ctx'> 	}</div><div class='ctx'> 	kvm-&gt;arch.revmap = rev;</div><div class='ctx'> </div><div class='del'>-	/* Allocate the guest's logical partition ID */</div><div class='del'>-	do {</div><div class='del'>-		lpid = find_first_zero_bit(lpid_inuse, NR_LPIDS);</div><div class='del'>-		if (lpid &gt;= NR_LPIDS) {</div><div class='del'>-			pr_err("kvm_alloc_hpt: No LPIDs free\n");</div><div class='del'>-			goto out_freeboth;</div><div class='del'>-		}</div><div class='del'>-	} while (test_and_set_bit(lpid, lpid_inuse));</div><div class='add'>+	lpid = kvmppc_alloc_lpid();</div><div class='add'>+	if (lpid &lt; 0)</div><div class='add'>+		goto out_freeboth;</div><div class='ctx'> </div><div class='ctx'> 	kvm-&gt;arch.sdr1 = __pa(hpt) | (HPT_ORDER - 18);</div><div class='ctx'> 	kvm-&gt;arch.lpid = lpid;</div><div class='hunk'>@@ -96,7 +89,7 @@ long kvmppc_alloc_hpt(struct kvm *kvm)</div><div class='ctx'> </div><div class='ctx'> void kvmppc_free_hpt(struct kvm *kvm)</div><div class='ctx'> {</div><div class='del'>-	clear_bit(kvm-&gt;arch.lpid, lpid_inuse);</div><div class='add'>+	kvmppc_free_lpid(kvm-&gt;arch.lpid);</div><div class='ctx'> 	vfree(kvm-&gt;arch.revmap);</div><div class='ctx'> 	if (kvm-&gt;arch.hpt_li)</div><div class='ctx'> 		kvm_release_hpt(kvm-&gt;arch.hpt_li);</div><div class='hunk'>@@ -171,8 +164,7 @@ int kvmppc_mmu_hv_init(void)</div><div class='ctx'> 	if (!cpu_has_feature(CPU_FTR_HVMODE))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	memset(lpid_inuse, 0, sizeof(lpid_inuse));</div><div class='del'>-</div><div class='add'>+	/* POWER7 has 10-bit LPIDs, PPC970 and e500mc have 6-bit LPIDs */</div><div class='ctx'> 	if (cpu_has_feature(CPU_FTR_ARCH_206)) {</div><div class='ctx'> 		host_lpid = mfspr(SPRN_LPID);	/* POWER7 */</div><div class='ctx'> 		rsvd_lpid = LPID_RSVD;</div><div class='hunk'>@@ -181,9 +173,11 @@ int kvmppc_mmu_hv_init(void)</div><div class='ctx'> 		rsvd_lpid = MAX_LPID_970;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	set_bit(host_lpid, lpid_inuse);</div><div class='add'>+	kvmppc_init_lpid(rsvd_lpid + 1);</div><div class='add'>+</div><div class='add'>+	kvmppc_claim_lpid(host_lpid);</div><div class='ctx'> 	/* rsvd_lpid is reserved for use in partition switching */</div><div class='del'>-	set_bit(rsvd_lpid, lpid_inuse);</div><div class='add'>+	kvmppc_claim_lpid(rsvd_lpid);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -258,6 +252,8 @@ static long kvmppc_get_guest_page(struct kvm *kvm, unsigned long gfn,</div><div class='ctx'> 			    !(memslot-&gt;userspace_addr &amp; (s - 1))) {</div><div class='ctx'> 				start &amp;= ~(s - 1);</div><div class='ctx'> 				pgsize = s;</div><div class='add'>+				get_page(hpage);</div><div class='add'>+				put_page(page);</div><div class='ctx'> 				page = hpage;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -281,11 +277,8 @@ static long kvmppc_get_guest_page(struct kvm *kvm, unsigned long gfn,</div><div class='ctx'> 	err = 0;</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='del'>-	if (got) {</div><div class='del'>-		if (PageHuge(page))</div><div class='del'>-			page = compound_head(page);</div><div class='add'>+	if (got)</div><div class='ctx'> 		put_page(page);</div><div class='del'>-	}</div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='ctx'>  up_err:</div><div class='hunk'>@@ -453,7 +446,7 @@ static int instruction_is_store(unsigned int instr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int kvmppc_hv_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='del'>-				  unsigned long gpa, int is_store)</div><div class='add'>+				  unsigned long gpa, gva_t ea, int is_store)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u32 last_inst;</div><div class='hunk'>@@ -500,6 +493,7 @@ static int kvmppc_hv_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.paddr_accessed = gpa;</div><div class='add'>+	vcpu-&gt;arch.vaddr_accessed = ea;</div><div class='ctx'> 	return kvmppc_emulate_mmio(run, vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -553,7 +547,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 	/* No memslot means it's an emulated MMIO region */</div><div class='ctx'> 	if (!memslot || (memslot-&gt;flags &amp; KVM_MEMSLOT_INVALID)) {</div><div class='ctx'> 		unsigned long gpa = (gfn &lt;&lt; PAGE_SHIFT) | (ea &amp; (psize - 1));</div><div class='del'>-		return kvmppc_hv_emulate_mmio(run, vcpu, gpa,</div><div class='add'>+		return kvmppc_hv_emulate_mmio(run, vcpu, gpa, ea,</div><div class='ctx'> 					      dsisr &amp; DSISR_ISSTORE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -678,8 +672,15 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 		SetPageDirty(page);</div><div class='ctx'> </div><div class='ctx'>  out_put:</div><div class='del'>-	if (page)</div><div class='del'>-		put_page(page);</div><div class='add'>+	if (page) {</div><div class='add'>+		/*</div><div class='add'>+		 * We drop pages[0] here, not page because page might</div><div class='add'>+		 * have been set to the head page of a compound, but</div><div class='add'>+		 * we have to drop the reference on the correct tail</div><div class='add'>+		 * page to match the get inside gup()</div><div class='add'>+		 */</div><div class='add'>+		put_page(pages[0]);</div><div class='add'>+	}</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'>  out_unlock:</div><div class='hunk'>@@ -979,6 +980,7 @@ void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa,</div><div class='ctx'> 			pa = *physp;</div><div class='ctx'> 		}</div><div class='ctx'> 		page = pfn_to_page(pa &gt;&gt; PAGE_SHIFT);</div><div class='add'>+		get_page(page);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		hva = gfn_to_hva_memslot(memslot, gfn);</div><div class='ctx'> 		npages = get_user_pages_fast(hva, 1, 1, pages);</div><div class='hunk'>@@ -991,8 +993,6 @@ void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa,</div><div class='ctx'> 		page = compound_head(page);</div><div class='ctx'> 		psize &lt;&lt;= compound_order(page);</div><div class='ctx'> 	}</div><div class='del'>-	if (!kvm-&gt;arch.using_mmu_notifiers)</div><div class='del'>-		get_page(page);</div><div class='ctx'> 	offset = gpa &amp; (psize - 1);</div><div class='ctx'> 	if (nb_ret)</div><div class='ctx'> 		*nb_ret = psize - offset;</div><div class='hunk'>@@ -1003,7 +1003,6 @@ void kvmppc_unpin_guest_page(struct kvm *kvm, void *va)</div><div class='ctx'> {</div><div class='ctx'> 	struct page *page = virt_to_page(va);</div><div class='ctx'> </div><div class='del'>-	page = compound_head(page);</div><div class='ctx'> 	put_page(page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_64_slb.S b/arch/powerpc/kvm/book3s_64_slb.S<br/>index f2e6e48ea463..56b983e7b738 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_64_slb.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s_64_slb.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_64_slb.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_64_slb.S</a></div><div class='hunk'>@@ -90,8 +90,6 @@ slb_exit_skip_ ## num:</div><div class='ctx'> 	or      r10, r10, r12</div><div class='ctx'> 	slbie	r10</div><div class='ctx'> </div><div class='del'>-	isync</div><div class='del'>-</div><div class='ctx'> 	/* Fill SLB with our shadow */</div><div class='ctx'> </div><div class='ctx'> 	lbz	r12, SVCPU_SLB_MAX(r3)</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_64_vio.c b/arch/powerpc/kvm/book3s_64_vio.c<br/>new file mode 100644<br/>index 000000000000..72ffc899c082<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_64_vio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_64_vio.c</a></div><div class='hunk'>@@ -0,0 +1,150 @@</div><div class='add'>+/*</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License, version 2, as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2010 Paul Mackerras, IBM Corp. &lt;paulus@au1.ibm.com&gt;</div><div class='add'>+ * Copyright 2011 David Gibson, IBM Corporation &lt;dwg@au1.ibm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/kvm.h&gt;</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;linux/highmem.h&gt;</div><div class='add'>+#include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/hugetlb.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/anon_inodes.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/tlbflush.h&gt;</div><div class='add'>+#include &lt;asm/kvm_ppc.h&gt;</div><div class='add'>+#include &lt;asm/kvm_book3s.h&gt;</div><div class='add'>+#include &lt;asm/mmu-hash64.h&gt;</div><div class='add'>+#include &lt;asm/hvcall.h&gt;</div><div class='add'>+#include &lt;asm/synch.h&gt;</div><div class='add'>+#include &lt;asm/ppc-opcode.h&gt;</div><div class='add'>+#include &lt;asm/kvm_host.h&gt;</div><div class='add'>+#include &lt;asm/udbg.h&gt;</div><div class='add'>+</div><div class='add'>+#define TCES_PER_PAGE	(PAGE_SIZE / sizeof(u64))</div><div class='add'>+</div><div class='add'>+static long kvmppc_stt_npages(unsigned long window_size)</div><div class='add'>+{</div><div class='add'>+	return ALIGN((window_size &gt;&gt; SPAPR_TCE_SHIFT)</div><div class='add'>+		     * sizeof(u64), PAGE_SIZE) / PAGE_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void release_spapr_tce_table(struct kvmppc_spapr_tce_table *stt)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = stt-&gt;kvm;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;kvm-&gt;lock);</div><div class='add'>+	list_del(&amp;stt-&gt;list);</div><div class='add'>+	for (i = 0; i &lt; kvmppc_stt_npages(stt-&gt;window_size); i++)</div><div class='add'>+		__free_page(stt-&gt;pages[i]);</div><div class='add'>+	kfree(stt);</div><div class='add'>+	mutex_unlock(&amp;kvm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	kvm_put_kvm(kvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_spapr_tce_fault(struct vm_area_struct *vma, struct vm_fault *vmf)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_spapr_tce_table *stt = vma-&gt;vm_file-&gt;private_data;</div><div class='add'>+	struct page *page;</div><div class='add'>+</div><div class='add'>+	if (vmf-&gt;pgoff &gt;= kvmppc_stt_npages(stt-&gt;window_size))</div><div class='add'>+		return VM_FAULT_SIGBUS;</div><div class='add'>+</div><div class='add'>+	page = stt-&gt;pages[vmf-&gt;pgoff];</div><div class='add'>+	get_page(page);</div><div class='add'>+	vmf-&gt;page = page;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct vm_operations_struct kvm_spapr_tce_vm_ops = {</div><div class='add'>+	.fault = kvm_spapr_tce_fault,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int kvm_spapr_tce_mmap(struct file *file, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	vma-&gt;vm_ops = &amp;kvm_spapr_tce_vm_ops;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_spapr_tce_release(struct inode *inode, struct file *filp)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_spapr_tce_table *stt = filp-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	release_spapr_tce_table(stt);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct file_operations kvm_spapr_tce_fops = {</div><div class='add'>+	.mmap           = kvm_spapr_tce_mmap,</div><div class='add'>+	.release	= kvm_spapr_tce_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+long kvm_vm_ioctl_create_spapr_tce(struct kvm *kvm,</div><div class='add'>+				   struct kvm_create_spapr_tce *args)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_spapr_tce_table *stt = NULL;</div><div class='add'>+	long npages;</div><div class='add'>+	int ret = -ENOMEM;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Check this LIOBN hasn't been previously allocated */</div><div class='add'>+	list_for_each_entry(stt, &amp;kvm-&gt;arch.spapr_tce_tables, list) {</div><div class='add'>+		if (stt-&gt;liobn == args-&gt;liobn)</div><div class='add'>+			return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	npages = kvmppc_stt_npages(args-&gt;window_size);</div><div class='add'>+</div><div class='add'>+	stt = kzalloc(sizeof(*stt) + npages * sizeof(struct page *),</div><div class='add'>+		      GFP_KERNEL);</div><div class='add'>+	if (!stt)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	stt-&gt;liobn = args-&gt;liobn;</div><div class='add'>+	stt-&gt;window_size = args-&gt;window_size;</div><div class='add'>+	stt-&gt;kvm = kvm;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; npages; i++) {</div><div class='add'>+		stt-&gt;pages[i] = alloc_page(GFP_KERNEL | __GFP_ZERO);</div><div class='add'>+		if (!stt-&gt;pages[i])</div><div class='add'>+			goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvm_get_kvm(kvm);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;kvm-&gt;lock);</div><div class='add'>+	list_add(&amp;stt-&gt;list, &amp;kvm-&gt;arch.spapr_tce_tables);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;kvm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return anon_inode_getfd("kvm-spapr-tce", &amp;kvm_spapr_tce_fops,</div><div class='add'>+				stt, O_RDWR);</div><div class='add'>+</div><div class='add'>+fail:</div><div class='add'>+	if (stt) {</div><div class='add'>+		for (i = 0; i &lt; npages; i++)</div><div class='add'>+			if (stt-&gt;pages[i])</div><div class='add'>+				__free_page(stt-&gt;pages[i]);</div><div class='add'>+</div><div class='add'>+		kfree(stt);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_64_vio_hv.c b/arch/powerpc/kvm/book3s_64_vio_hv.c<br/>index ea0f8c537c28..30c2f3b134c6 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_64_vio_hv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s_64_vio_hv.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_64_vio_hv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_64_vio_hv.c</a></div><div class='hunk'>@@ -38,6 +38,9 @@</div><div class='ctx'> </div><div class='ctx'> #define TCES_PER_PAGE	(PAGE_SIZE / sizeof(u64))</div><div class='ctx'> </div><div class='add'>+/* WARNING: This will be called in real-mode on HV KVM and virtual</div><div class='add'>+ *          mode on PR KVM</div><div class='add'>+ */</div><div class='ctx'> long kvmppc_h_put_tce(struct kvm_vcpu *vcpu, unsigned long liobn,</div><div class='ctx'> 		      unsigned long ioba, unsigned long tce)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c<br/>index 135663a3e4fc..b9a989dc76cc 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_emulate.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s_emulate.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_emulate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_emulate.c</a></div><div class='hunk'>@@ -87,6 +87,10 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'>                            unsigned int inst, int *advance)</div><div class='ctx'> {</div><div class='ctx'> 	int emulated = EMULATE_DONE;</div><div class='add'>+	int rt = get_rt(inst);</div><div class='add'>+	int rs = get_rs(inst);</div><div class='add'>+	int ra = get_ra(inst);</div><div class='add'>+	int rb = get_rb(inst);</div><div class='ctx'> </div><div class='ctx'> 	switch (get_op(inst)) {</div><div class='ctx'> 	case 19:</div><div class='hunk'>@@ -106,21 +110,22 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 	case 31:</div><div class='ctx'> 		switch (get_xop(inst)) {</div><div class='ctx'> 		case OP_31_XOP_MFMSR:</div><div class='del'>-			kvmppc_set_gpr(vcpu, get_rt(inst),</div><div class='del'>-				       vcpu-&gt;arch.shared-&gt;msr);</div><div class='add'>+			kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;msr);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case OP_31_XOP_MTMSRD:</div><div class='ctx'> 		{</div><div class='del'>-			ulong rs = kvmppc_get_gpr(vcpu, get_rs(inst));</div><div class='add'>+			ulong rs_val = kvmppc_get_gpr(vcpu, rs);</div><div class='ctx'> 			if (inst &amp; 0x10000) {</div><div class='del'>-				vcpu-&gt;arch.shared-&gt;msr &amp;= ~(MSR_RI | MSR_EE);</div><div class='del'>-				vcpu-&gt;arch.shared-&gt;msr |= rs &amp; (MSR_RI | MSR_EE);</div><div class='add'>+				ulong new_msr = vcpu-&gt;arch.shared-&gt;msr;</div><div class='add'>+				new_msr &amp;= ~(MSR_RI | MSR_EE);</div><div class='add'>+				new_msr |= rs_val &amp; (MSR_RI | MSR_EE);</div><div class='add'>+				vcpu-&gt;arch.shared-&gt;msr = new_msr;</div><div class='ctx'> 			} else</div><div class='del'>-				kvmppc_set_msr(vcpu, rs);</div><div class='add'>+				kvmppc_set_msr(vcpu, rs_val);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		case OP_31_XOP_MTMSR:</div><div class='del'>-			kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, get_rs(inst)));</div><div class='add'>+			kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs));</div><div class='ctx'> 			break;</div><div class='ctx'> 		case OP_31_XOP_MFSR:</div><div class='ctx'> 		{</div><div class='hunk'>@@ -130,7 +135,7 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 			if (vcpu-&gt;arch.mmu.mfsrin) {</div><div class='ctx'> 				u32 sr;</div><div class='ctx'> 				sr = vcpu-&gt;arch.mmu.mfsrin(vcpu, srnum);</div><div class='del'>-				kvmppc_set_gpr(vcpu, get_rt(inst), sr);</div><div class='add'>+				kvmppc_set_gpr(vcpu, rt, sr);</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -138,29 +143,29 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 		{</div><div class='ctx'> 			int srnum;</div><div class='ctx'> </div><div class='del'>-			srnum = (kvmppc_get_gpr(vcpu, get_rb(inst)) &gt;&gt; 28) &amp; 0xf;</div><div class='add'>+			srnum = (kvmppc_get_gpr(vcpu, rb) &gt;&gt; 28) &amp; 0xf;</div><div class='ctx'> 			if (vcpu-&gt;arch.mmu.mfsrin) {</div><div class='ctx'> 				u32 sr;</div><div class='ctx'> 				sr = vcpu-&gt;arch.mmu.mfsrin(vcpu, srnum);</div><div class='del'>-				kvmppc_set_gpr(vcpu, get_rt(inst), sr);</div><div class='add'>+				kvmppc_set_gpr(vcpu, rt, sr);</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		case OP_31_XOP_MTSR:</div><div class='ctx'> 			vcpu-&gt;arch.mmu.mtsrin(vcpu,</div><div class='ctx'> 				(inst &gt;&gt; 16) &amp; 0xf,</div><div class='del'>-				kvmppc_get_gpr(vcpu, get_rs(inst)));</div><div class='add'>+				kvmppc_get_gpr(vcpu, rs));</div><div class='ctx'> 			break;</div><div class='ctx'> 		case OP_31_XOP_MTSRIN:</div><div class='ctx'> 			vcpu-&gt;arch.mmu.mtsrin(vcpu,</div><div class='del'>-				(kvmppc_get_gpr(vcpu, get_rb(inst)) &gt;&gt; 28) &amp; 0xf,</div><div class='del'>-				kvmppc_get_gpr(vcpu, get_rs(inst)));</div><div class='add'>+				(kvmppc_get_gpr(vcpu, rb) &gt;&gt; 28) &amp; 0xf,</div><div class='add'>+				kvmppc_get_gpr(vcpu, rs));</div><div class='ctx'> 			break;</div><div class='ctx'> 		case OP_31_XOP_TLBIE:</div><div class='ctx'> 		case OP_31_XOP_TLBIEL:</div><div class='ctx'> 		{</div><div class='ctx'> 			bool large = (inst &amp; 0x00200000) ? true : false;</div><div class='del'>-			ulong addr = kvmppc_get_gpr(vcpu, get_rb(inst));</div><div class='add'>+			ulong addr = kvmppc_get_gpr(vcpu, rb);</div><div class='ctx'> 			vcpu-&gt;arch.mmu.tlbie(vcpu, addr, large);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -171,15 +176,15 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 				return EMULATE_FAIL;</div><div class='ctx'> </div><div class='ctx'> 			vcpu-&gt;arch.mmu.slbmte(vcpu,</div><div class='del'>-					kvmppc_get_gpr(vcpu, get_rs(inst)),</div><div class='del'>-					kvmppc_get_gpr(vcpu, get_rb(inst)));</div><div class='add'>+					kvmppc_get_gpr(vcpu, rs),</div><div class='add'>+					kvmppc_get_gpr(vcpu, rb));</div><div class='ctx'> 			break;</div><div class='ctx'> 		case OP_31_XOP_SLBIE:</div><div class='ctx'> 			if (!vcpu-&gt;arch.mmu.slbie)</div><div class='ctx'> 				return EMULATE_FAIL;</div><div class='ctx'> </div><div class='ctx'> 			vcpu-&gt;arch.mmu.slbie(vcpu,</div><div class='del'>-					kvmppc_get_gpr(vcpu, get_rb(inst)));</div><div class='add'>+					kvmppc_get_gpr(vcpu, rb));</div><div class='ctx'> 			break;</div><div class='ctx'> 		case OP_31_XOP_SLBIA:</div><div class='ctx'> 			if (!vcpu-&gt;arch.mmu.slbia)</div><div class='hunk'>@@ -191,22 +196,22 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 			if (!vcpu-&gt;arch.mmu.slbmfee) {</div><div class='ctx'> 				emulated = EMULATE_FAIL;</div><div class='ctx'> 			} else {</div><div class='del'>-				ulong t, rb;</div><div class='add'>+				ulong t, rb_val;</div><div class='ctx'> </div><div class='del'>-				rb = kvmppc_get_gpr(vcpu, get_rb(inst));</div><div class='del'>-				t = vcpu-&gt;arch.mmu.slbmfee(vcpu, rb);</div><div class='del'>-				kvmppc_set_gpr(vcpu, get_rt(inst), t);</div><div class='add'>+				rb_val = kvmppc_get_gpr(vcpu, rb);</div><div class='add'>+				t = vcpu-&gt;arch.mmu.slbmfee(vcpu, rb_val);</div><div class='add'>+				kvmppc_set_gpr(vcpu, rt, t);</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case OP_31_XOP_SLBMFEV:</div><div class='ctx'> 			if (!vcpu-&gt;arch.mmu.slbmfev) {</div><div class='ctx'> 				emulated = EMULATE_FAIL;</div><div class='ctx'> 			} else {</div><div class='del'>-				ulong t, rb;</div><div class='add'>+				ulong t, rb_val;</div><div class='ctx'> </div><div class='del'>-				rb = kvmppc_get_gpr(vcpu, get_rb(inst));</div><div class='del'>-				t = vcpu-&gt;arch.mmu.slbmfev(vcpu, rb);</div><div class='del'>-				kvmppc_set_gpr(vcpu, get_rt(inst), t);</div><div class='add'>+				rb_val = kvmppc_get_gpr(vcpu, rb);</div><div class='add'>+				t = vcpu-&gt;arch.mmu.slbmfev(vcpu, rb_val);</div><div class='add'>+				kvmppc_set_gpr(vcpu, rt, t);</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case OP_31_XOP_DCBA:</div><div class='hunk'>@@ -214,17 +219,17 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 			break;</div><div class='ctx'> 		case OP_31_XOP_DCBZ:</div><div class='ctx'> 		{</div><div class='del'>-			ulong rb = kvmppc_get_gpr(vcpu, get_rb(inst));</div><div class='del'>-			ulong ra = 0;</div><div class='add'>+			ulong rb_val = kvmppc_get_gpr(vcpu, rb);</div><div class='add'>+			ulong ra_val = 0;</div><div class='ctx'> 			ulong addr, vaddr;</div><div class='ctx'> 			u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };</div><div class='ctx'> 			u32 dsisr;</div><div class='ctx'> 			int r;</div><div class='ctx'> </div><div class='del'>-			if (get_ra(inst))</div><div class='del'>-				ra = kvmppc_get_gpr(vcpu, get_ra(inst));</div><div class='add'>+			if (ra)</div><div class='add'>+				ra_val = kvmppc_get_gpr(vcpu, ra);</div><div class='ctx'> </div><div class='del'>-			addr = (ra + rb) &amp; ~31ULL;</div><div class='add'>+			addr = (ra_val + rb_val) &amp; ~31ULL;</div><div class='ctx'> 			if (!(vcpu-&gt;arch.shared-&gt;msr &amp; MSR_SF))</div><div class='ctx'> 				addr &amp;= 0xffffffff;</div><div class='ctx'> 			vaddr = addr;</div><div class='hunk'>@@ -313,10 +318,9 @@ static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn)</div><div class='ctx'> 	return bat;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)</div><div class='add'>+int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)</div><div class='ctx'> {</div><div class='ctx'> 	int emulated = EMULATE_DONE;</div><div class='del'>-	ulong spr_val = kvmppc_get_gpr(vcpu, rs);</div><div class='ctx'> </div><div class='ctx'> 	switch (sprn) {</div><div class='ctx'> 	case SPRN_SDR1:</div><div class='hunk'>@@ -428,7 +432,7 @@ unprivileged:</div><div class='ctx'> 	return emulated;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)</div><div class='add'>+int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)</div><div class='ctx'> {</div><div class='ctx'> 	int emulated = EMULATE_DONE;</div><div class='ctx'> </div><div class='hunk'>@@ -441,46 +445,46 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)</div><div class='ctx'> 		struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);</div><div class='ctx'> </div><div class='ctx'> 		if (sprn % 2)</div><div class='del'>-			kvmppc_set_gpr(vcpu, rt, bat-&gt;raw &gt;&gt; 32);</div><div class='add'>+			*spr_val = bat-&gt;raw &gt;&gt; 32;</div><div class='ctx'> 		else</div><div class='del'>-			kvmppc_set_gpr(vcpu, rt, bat-&gt;raw);</div><div class='add'>+			*spr_val = bat-&gt;raw;</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	case SPRN_SDR1:</div><div class='ctx'> 		if (!spr_allowed(vcpu, PRIV_HYPER))</div><div class='ctx'> 			goto unprivileged;</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)-&gt;sdr1);</div><div class='add'>+		*spr_val = to_book3s(vcpu)-&gt;sdr1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_DSISR:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;dsisr);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.shared-&gt;dsisr;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_DAR:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;dar);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.shared-&gt;dar;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_HIOR:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)-&gt;hior);</div><div class='add'>+		*spr_val = to_book3s(vcpu)-&gt;hior;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_HID0:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)-&gt;hid[0]);</div><div class='add'>+		*spr_val = to_book3s(vcpu)-&gt;hid[0];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_HID1:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)-&gt;hid[1]);</div><div class='add'>+		*spr_val = to_book3s(vcpu)-&gt;hid[1];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_HID2:</div><div class='ctx'> 	case SPRN_HID2_GEKKO:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)-&gt;hid[2]);</div><div class='add'>+		*spr_val = to_book3s(vcpu)-&gt;hid[2];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_HID4:</div><div class='ctx'> 	case SPRN_HID4_GEKKO:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)-&gt;hid[4]);</div><div class='add'>+		*spr_val = to_book3s(vcpu)-&gt;hid[4];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_HID5:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)-&gt;hid[5]);</div><div class='add'>+		*spr_val = to_book3s(vcpu)-&gt;hid[5];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_CFAR:</div><div class='ctx'> 	case SPRN_PURR:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, 0);</div><div class='add'>+		*spr_val = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_GQR0:</div><div class='ctx'> 	case SPRN_GQR1:</div><div class='hunk'>@@ -490,8 +494,7 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)</div><div class='ctx'> 	case SPRN_GQR5:</div><div class='ctx'> 	case SPRN_GQR6:</div><div class='ctx'> 	case SPRN_GQR7:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt,</div><div class='del'>-			       to_book3s(vcpu)-&gt;gqr[sprn - SPRN_GQR0]);</div><div class='add'>+		*spr_val = to_book3s(vcpu)-&gt;gqr[sprn - SPRN_GQR0];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_THRM1:</div><div class='ctx'> 	case SPRN_THRM2:</div><div class='hunk'>@@ -506,7 +509,7 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)</div><div class='ctx'> 	case SPRN_PMC3_GEKKO:</div><div class='ctx'> 	case SPRN_PMC4_GEKKO:</div><div class='ctx'> 	case SPRN_WPAR_GEKKO:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, 0);</div><div class='add'>+		*spr_val = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> unprivileged:</div><div class='hunk'>@@ -565,23 +568,22 @@ u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)</div><div class='ctx'> ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)</div><div class='ctx'> {</div><div class='ctx'> 	ulong dar = 0;</div><div class='del'>-	ulong ra;</div><div class='add'>+	ulong ra = get_ra(inst);</div><div class='add'>+	ulong rb = get_rb(inst);</div><div class='ctx'> </div><div class='ctx'> 	switch (get_op(inst)) {</div><div class='ctx'> 	case OP_LFS:</div><div class='ctx'> 	case OP_LFD:</div><div class='ctx'> 	case OP_STFD:</div><div class='ctx'> 	case OP_STFS:</div><div class='del'>-		ra = get_ra(inst);</div><div class='ctx'> 		if (ra)</div><div class='ctx'> 			dar = kvmppc_get_gpr(vcpu, ra);</div><div class='ctx'> 		dar += (s32)((s16)inst);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 31:</div><div class='del'>-		ra = get_ra(inst);</div><div class='ctx'> 		if (ra)</div><div class='ctx'> 			dar = kvmppc_get_gpr(vcpu, ra);</div><div class='del'>-		dar += kvmppc_get_gpr(vcpu, get_rb(inst));</div><div class='add'>+		dar += kvmppc_get_gpr(vcpu, rb);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c<br/>index 01294a5099dd..c6af1d623839 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_hv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s_hv.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_hv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_hv.c</a></div><div class='hunk'>@@ -60,12 +60,20 @@ static int kvmppc_hv_setup_rma(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='ctx'> {</div><div class='add'>+	struct kvmppc_vcore *vc = vcpu-&gt;arch.vcore;</div><div class='add'>+</div><div class='ctx'> 	local_paca-&gt;kvm_hstate.kvm_vcpu = vcpu;</div><div class='del'>-	local_paca-&gt;kvm_hstate.kvm_vcore = vcpu-&gt;arch.vcore;</div><div class='add'>+	local_paca-&gt;kvm_hstate.kvm_vcore = vc;</div><div class='add'>+	if (vc-&gt;runner == vcpu &amp;&amp; vc-&gt;vcore_state != VCORE_INACTIVE)</div><div class='add'>+		vc-&gt;stolen_tb += mftb() - vc-&gt;preempt_tb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	struct kvmppc_vcore *vc = vcpu-&gt;arch.vcore;</div><div class='add'>+</div><div class='add'>+	if (vc-&gt;runner == vcpu &amp;&amp; vc-&gt;vcore_state != VCORE_INACTIVE)</div><div class='add'>+		vc-&gt;preempt_tb = mftb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)</div><div class='hunk'>@@ -134,6 +142,22 @@ static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa)</div><div class='ctx'> 	vpa-&gt;yield_count = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Length for a per-processor buffer is passed in at offset 4 in the buffer */</div><div class='add'>+struct reg_vpa {</div><div class='add'>+	u32 dummy;</div><div class='add'>+	union {</div><div class='add'>+		u16 hword;</div><div class='add'>+		u32 word;</div><div class='add'>+	} length;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int vpa_is_registered(struct kvmppc_vpa *vpap)</div><div class='add'>+{</div><div class='add'>+	if (vpap-&gt;update_pending)</div><div class='add'>+		return vpap-&gt;next_gpa != 0;</div><div class='add'>+	return vpap-&gt;pinned_addr != NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				       unsigned long flags,</div><div class='ctx'> 				       unsigned long vcpuid, unsigned long vpa)</div><div class='hunk'>@@ -142,88 +166,182 @@ static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	unsigned long len, nb;</div><div class='ctx'> 	void *va;</div><div class='ctx'> 	struct kvm_vcpu *tvcpu;</div><div class='del'>-	int err = H_PARAMETER;</div><div class='add'>+	int err;</div><div class='add'>+	int subfunc;</div><div class='add'>+	struct kvmppc_vpa *vpap;</div><div class='ctx'> </div><div class='ctx'> 	tvcpu = kvmppc_find_vcpu(kvm, vcpuid);</div><div class='ctx'> 	if (!tvcpu)</div><div class='ctx'> 		return H_PARAMETER;</div><div class='ctx'> </div><div class='del'>-	flags &gt;&gt;= 63 - 18;</div><div class='del'>-	flags &amp;= 7;</div><div class='del'>-	if (flags == 0 || flags == 4)</div><div class='del'>-		return H_PARAMETER;</div><div class='del'>-	if (flags &lt; 4) {</div><div class='del'>-		if (vpa &amp; 0x7f)</div><div class='add'>+	subfunc = (flags &gt;&gt; H_VPA_FUNC_SHIFT) &amp; H_VPA_FUNC_MASK;</div><div class='add'>+	if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL ||</div><div class='add'>+	    subfunc == H_VPA_REG_SLB) {</div><div class='add'>+		/* Registering new area - address must be cache-line aligned */</div><div class='add'>+		if ((vpa &amp; (L1_CACHE_BYTES - 1)) || !vpa)</div><div class='ctx'> 			return H_PARAMETER;</div><div class='del'>-		if (flags &gt;= 2 &amp;&amp; !tvcpu-&gt;arch.vpa)</div><div class='del'>-			return H_RESOURCE;</div><div class='del'>-		/* registering new area; convert logical addr to real */</div><div class='add'>+</div><div class='add'>+		/* convert logical addr to kernel addr and read length */</div><div class='ctx'> 		va = kvmppc_pin_guest_page(kvm, vpa, &amp;nb);</div><div class='ctx'> 		if (va == NULL)</div><div class='ctx'> 			return H_PARAMETER;</div><div class='del'>-		if (flags &lt;= 1)</div><div class='del'>-			len = *(unsigned short *)(va + 4);</div><div class='add'>+		if (subfunc == H_VPA_REG_VPA)</div><div class='add'>+			len = ((struct reg_vpa *)va)-&gt;length.hword;</div><div class='ctx'> 		else</div><div class='del'>-			len = *(unsigned int *)(va + 4);</div><div class='del'>-		if (len &gt; nb)</div><div class='del'>-			goto out_unpin;</div><div class='del'>-		switch (flags) {</div><div class='del'>-		case 1:		/* register VPA */</div><div class='del'>-			if (len &lt; 640)</div><div class='del'>-				goto out_unpin;</div><div class='del'>-			if (tvcpu-&gt;arch.vpa)</div><div class='del'>-				kvmppc_unpin_guest_page(kvm, vcpu-&gt;arch.vpa);</div><div class='del'>-			tvcpu-&gt;arch.vpa = va;</div><div class='del'>-			init_vpa(vcpu, va);</div><div class='del'>-			break;</div><div class='del'>-		case 2:		/* register DTL */</div><div class='del'>-			if (len &lt; 48)</div><div class='del'>-				goto out_unpin;</div><div class='del'>-			len -= len % 48;</div><div class='del'>-			if (tvcpu-&gt;arch.dtl)</div><div class='del'>-				kvmppc_unpin_guest_page(kvm, vcpu-&gt;arch.dtl);</div><div class='del'>-			tvcpu-&gt;arch.dtl = va;</div><div class='del'>-			tvcpu-&gt;arch.dtl_end = va + len;</div><div class='add'>+			len = ((struct reg_vpa *)va)-&gt;length.word;</div><div class='add'>+		kvmppc_unpin_guest_page(kvm, va);</div><div class='add'>+</div><div class='add'>+		/* Check length */</div><div class='add'>+		if (len &gt; nb || len &lt; sizeof(struct reg_vpa))</div><div class='add'>+			return H_PARAMETER;</div><div class='add'>+	} else {</div><div class='add'>+		vpa = 0;</div><div class='add'>+		len = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = H_PARAMETER;</div><div class='add'>+	vpap = NULL;</div><div class='add'>+	spin_lock(&amp;tvcpu-&gt;arch.vpa_update_lock);</div><div class='add'>+</div><div class='add'>+	switch (subfunc) {</div><div class='add'>+	case H_VPA_REG_VPA:		/* register VPA */</div><div class='add'>+		if (len &lt; sizeof(struct lppaca))</div><div class='ctx'> 			break;</div><div class='del'>-		case 3:		/* register SLB shadow buffer */</div><div class='del'>-			if (len &lt; 16)</div><div class='del'>-				goto out_unpin;</div><div class='del'>-			if (tvcpu-&gt;arch.slb_shadow)</div><div class='del'>-				kvmppc_unpin_guest_page(kvm, vcpu-&gt;arch.slb_shadow);</div><div class='del'>-			tvcpu-&gt;arch.slb_shadow = va;</div><div class='add'>+		vpap = &amp;tvcpu-&gt;arch.vpa;</div><div class='add'>+		err = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case H_VPA_REG_DTL:		/* register DTL */</div><div class='add'>+		if (len &lt; sizeof(struct dtl_entry))</div><div class='ctx'> 			break;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		switch (flags) {</div><div class='del'>-		case 5:		/* unregister VPA */</div><div class='del'>-			if (tvcpu-&gt;arch.slb_shadow || tvcpu-&gt;arch.dtl)</div><div class='del'>-				return H_RESOURCE;</div><div class='del'>-			if (!tvcpu-&gt;arch.vpa)</div><div class='del'>-				break;</div><div class='del'>-			kvmppc_unpin_guest_page(kvm, tvcpu-&gt;arch.vpa);</div><div class='del'>-			tvcpu-&gt;arch.vpa = NULL;</div><div class='add'>+		len -= len % sizeof(struct dtl_entry);</div><div class='add'>+</div><div class='add'>+		/* Check that they have previously registered a VPA */</div><div class='add'>+		err = H_RESOURCE;</div><div class='add'>+		if (!vpa_is_registered(&amp;tvcpu-&gt;arch.vpa))</div><div class='ctx'> 			break;</div><div class='del'>-		case 6:		/* unregister DTL */</div><div class='del'>-			if (!tvcpu-&gt;arch.dtl)</div><div class='del'>-				break;</div><div class='del'>-			kvmppc_unpin_guest_page(kvm, tvcpu-&gt;arch.dtl);</div><div class='del'>-			tvcpu-&gt;arch.dtl = NULL;</div><div class='add'>+</div><div class='add'>+		vpap = &amp;tvcpu-&gt;arch.dtl;</div><div class='add'>+		err = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case H_VPA_REG_SLB:		/* register SLB shadow buffer */</div><div class='add'>+		/* Check that they have previously registered a VPA */</div><div class='add'>+		err = H_RESOURCE;</div><div class='add'>+		if (!vpa_is_registered(&amp;tvcpu-&gt;arch.vpa))</div><div class='ctx'> 			break;</div><div class='del'>-		case 7:		/* unregister SLB shadow buffer */</div><div class='del'>-			if (!tvcpu-&gt;arch.slb_shadow)</div><div class='del'>-				break;</div><div class='del'>-			kvmppc_unpin_guest_page(kvm, tvcpu-&gt;arch.slb_shadow);</div><div class='del'>-			tvcpu-&gt;arch.slb_shadow = NULL;</div><div class='add'>+</div><div class='add'>+		vpap = &amp;tvcpu-&gt;arch.slb_shadow;</div><div class='add'>+		err = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case H_VPA_DEREG_VPA:		/* deregister VPA */</div><div class='add'>+		/* Check they don't still have a DTL or SLB buf registered */</div><div class='add'>+		err = H_RESOURCE;</div><div class='add'>+		if (vpa_is_registered(&amp;tvcpu-&gt;arch.dtl) ||</div><div class='add'>+		    vpa_is_registered(&amp;tvcpu-&gt;arch.slb_shadow))</div><div class='ctx'> 			break;</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+		vpap = &amp;tvcpu-&gt;arch.vpa;</div><div class='add'>+		err = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case H_VPA_DEREG_DTL:		/* deregister DTL */</div><div class='add'>+		vpap = &amp;tvcpu-&gt;arch.dtl;</div><div class='add'>+		err = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case H_VPA_DEREG_SLB:		/* deregister SLB shadow buffer */</div><div class='add'>+		vpap = &amp;tvcpu-&gt;arch.slb_shadow;</div><div class='add'>+		err = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vpap) {</div><div class='add'>+		vpap-&gt;next_gpa = vpa;</div><div class='add'>+		vpap-&gt;len = len;</div><div class='add'>+		vpap-&gt;update_pending = 1;</div><div class='ctx'> 	}</div><div class='del'>-	return H_SUCCESS;</div><div class='ctx'> </div><div class='del'>- out_unpin:</div><div class='del'>-	kvmppc_unpin_guest_page(kvm, va);</div><div class='add'>+	spin_unlock(&amp;tvcpu-&gt;arch.vpa_update_lock);</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kvmppc_update_vpa(struct kvm *kvm, struct kvmppc_vpa *vpap)</div><div class='add'>+{</div><div class='add'>+	void *va;</div><div class='add'>+	unsigned long nb;</div><div class='add'>+</div><div class='add'>+	vpap-&gt;update_pending = 0;</div><div class='add'>+	va = NULL;</div><div class='add'>+	if (vpap-&gt;next_gpa) {</div><div class='add'>+		va = kvmppc_pin_guest_page(kvm, vpap-&gt;next_gpa, &amp;nb);</div><div class='add'>+		if (nb &lt; vpap-&gt;len) {</div><div class='add'>+			/*</div><div class='add'>+			 * If it's now too short, it must be that userspace</div><div class='add'>+			 * has changed the mappings underlying guest memory,</div><div class='add'>+			 * so unregister the region.</div><div class='add'>+			 */</div><div class='add'>+			kvmppc_unpin_guest_page(kvm, va);</div><div class='add'>+			va = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (vpap-&gt;pinned_addr)</div><div class='add'>+		kvmppc_unpin_guest_page(kvm, vpap-&gt;pinned_addr);</div><div class='add'>+	vpap-&gt;pinned_addr = va;</div><div class='add'>+	if (va)</div><div class='add'>+		vpap-&gt;pinned_end = va + vpap-&gt;len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvmppc_update_vpas(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;vcpu-&gt;arch.vpa_update_lock);</div><div class='add'>+	if (vcpu-&gt;arch.vpa.update_pending) {</div><div class='add'>+		kvmppc_update_vpa(kvm, &amp;vcpu-&gt;arch.vpa);</div><div class='add'>+		init_vpa(vcpu, vcpu-&gt;arch.vpa.pinned_addr);</div><div class='add'>+	}</div><div class='add'>+	if (vcpu-&gt;arch.dtl.update_pending) {</div><div class='add'>+		kvmppc_update_vpa(kvm, &amp;vcpu-&gt;arch.dtl);</div><div class='add'>+		vcpu-&gt;arch.dtl_ptr = vcpu-&gt;arch.dtl.pinned_addr;</div><div class='add'>+		vcpu-&gt;arch.dtl_index = 0;</div><div class='add'>+	}</div><div class='add'>+	if (vcpu-&gt;arch.slb_shadow.update_pending)</div><div class='add'>+		kvmppc_update_vpa(kvm, &amp;vcpu-&gt;arch.slb_shadow);</div><div class='add'>+	spin_unlock(&amp;vcpu-&gt;arch.vpa_update_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu,</div><div class='add'>+				    struct kvmppc_vcore *vc)</div><div class='add'>+{</div><div class='add'>+	struct dtl_entry *dt;</div><div class='add'>+	struct lppaca *vpa;</div><div class='add'>+	unsigned long old_stolen;</div><div class='add'>+</div><div class='add'>+	dt = vcpu-&gt;arch.dtl_ptr;</div><div class='add'>+	vpa = vcpu-&gt;arch.vpa.pinned_addr;</div><div class='add'>+	old_stolen = vcpu-&gt;arch.stolen_logged;</div><div class='add'>+	vcpu-&gt;arch.stolen_logged = vc-&gt;stolen_tb;</div><div class='add'>+	if (!dt || !vpa)</div><div class='add'>+		return;</div><div class='add'>+	memset(dt, 0, sizeof(struct dtl_entry));</div><div class='add'>+	dt-&gt;dispatch_reason = 7;</div><div class='add'>+	dt-&gt;processor_id = vc-&gt;pcpu + vcpu-&gt;arch.ptid;</div><div class='add'>+	dt-&gt;timebase = mftb();</div><div class='add'>+	dt-&gt;enqueue_to_dispatch_time = vc-&gt;stolen_tb - old_stolen;</div><div class='add'>+	dt-&gt;srr0 = kvmppc_get_pc(vcpu);</div><div class='add'>+	dt-&gt;srr1 = vcpu-&gt;arch.shregs.msr;</div><div class='add'>+	++dt;</div><div class='add'>+	if (dt == vcpu-&gt;arch.dtl.pinned_end)</div><div class='add'>+		dt = vcpu-&gt;arch.dtl.pinned_addr;</div><div class='add'>+	vcpu-&gt;arch.dtl_ptr = dt;</div><div class='add'>+	/* order writing *dt vs. writing vpa-&gt;dtl_idx */</div><div class='add'>+	smp_wmb();</div><div class='add'>+	vpa-&gt;dtl_idx = ++vcpu-&gt;arch.dtl_index;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long req = kvmppc_get_gpr(vcpu, 3);</div><div class='hunk'>@@ -468,6 +586,7 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)</div><div class='ctx'> 	/* default to host PVR, since we can't spoof it */</div><div class='ctx'> 	vcpu-&gt;arch.pvr = mfspr(SPRN_PVR);</div><div class='ctx'> 	kvmppc_set_pvr(vcpu, vcpu-&gt;arch.pvr);</div><div class='add'>+	spin_lock_init(&amp;vcpu-&gt;arch.vpa_update_lock);</div><div class='ctx'> </div><div class='ctx'> 	kvmppc_mmu_book3s_hv_init(vcpu);</div><div class='ctx'> </div><div class='hunk'>@@ -486,6 +605,7 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)</div><div class='ctx'> 			INIT_LIST_HEAD(&amp;vcore-&gt;runnable_threads);</div><div class='ctx'> 			spin_lock_init(&amp;vcore-&gt;lock);</div><div class='ctx'> 			init_waitqueue_head(&amp;vcore-&gt;wq);</div><div class='add'>+			vcore-&gt;preempt_tb = mftb();</div><div class='ctx'> 		}</div><div class='ctx'> 		kvm-&gt;arch.vcores[core] = vcore;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -498,6 +618,7 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)</div><div class='ctx'> 	++vcore-&gt;num_threads;</div><div class='ctx'> 	spin_unlock(&amp;vcore-&gt;lock);</div><div class='ctx'> 	vcpu-&gt;arch.vcore = vcore;</div><div class='add'>+	vcpu-&gt;arch.stolen_logged = vcore-&gt;stolen_tb;</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.cpu_type = KVM_CPU_3S_64;</div><div class='ctx'> 	kvmppc_sanity_check(vcpu);</div><div class='hunk'>@@ -512,12 +633,14 @@ out:</div><div class='ctx'> </div><div class='ctx'> void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	if (vcpu-&gt;arch.dtl)</div><div class='del'>-		kvmppc_unpin_guest_page(vcpu-&gt;kvm, vcpu-&gt;arch.dtl);</div><div class='del'>-	if (vcpu-&gt;arch.slb_shadow)</div><div class='del'>-		kvmppc_unpin_guest_page(vcpu-&gt;kvm, vcpu-&gt;arch.slb_shadow);</div><div class='del'>-	if (vcpu-&gt;arch.vpa)</div><div class='del'>-		kvmppc_unpin_guest_page(vcpu-&gt;kvm, vcpu-&gt;arch.vpa);</div><div class='add'>+	spin_lock(&amp;vcpu-&gt;arch.vpa_update_lock);</div><div class='add'>+	if (vcpu-&gt;arch.dtl.pinned_addr)</div><div class='add'>+		kvmppc_unpin_guest_page(vcpu-&gt;kvm, vcpu-&gt;arch.dtl.pinned_addr);</div><div class='add'>+	if (vcpu-&gt;arch.slb_shadow.pinned_addr)</div><div class='add'>+		kvmppc_unpin_guest_page(vcpu-&gt;kvm, vcpu-&gt;arch.slb_shadow.pinned_addr);</div><div class='add'>+	if (vcpu-&gt;arch.vpa.pinned_addr)</div><div class='add'>+		kvmppc_unpin_guest_page(vcpu-&gt;kvm, vcpu-&gt;arch.vpa.pinned_addr);</div><div class='add'>+	spin_unlock(&amp;vcpu-&gt;arch.vpa_update_lock);</div><div class='ctx'> 	kvm_vcpu_uninit(vcpu);</div><div class='ctx'> 	kmem_cache_free(kvm_vcpu_cache, vcpu);</div><div class='ctx'> }</div><div class='hunk'>@@ -569,6 +692,45 @@ static void kvmppc_remove_runnable(struct kvmppc_vcore *vc,</div><div class='ctx'> 	list_del(&amp;vcpu-&gt;arch.run_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int kvmppc_grab_hwthread(int cpu)</div><div class='add'>+{</div><div class='add'>+	struct paca_struct *tpaca;</div><div class='add'>+	long timeout = 1000;</div><div class='add'>+</div><div class='add'>+	tpaca = &amp;paca[cpu];</div><div class='add'>+</div><div class='add'>+	/* Ensure the thread won't go into the kernel if it wakes */</div><div class='add'>+	tpaca-&gt;kvm_hstate.hwthread_req = 1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the thread is already executing in the kernel (e.g. handling</div><div class='add'>+	 * a stray interrupt), wait for it to get back to nap mode.</div><div class='add'>+	 * The smp_mb() is to ensure that our setting of hwthread_req</div><div class='add'>+	 * is visible before we look at hwthread_state, so if this</div><div class='add'>+	 * races with the code at system_reset_pSeries and the thread</div><div class='add'>+	 * misses our setting of hwthread_req, we are sure to see its</div><div class='add'>+	 * setting of hwthread_state, and vice versa.</div><div class='add'>+	 */</div><div class='add'>+	smp_mb();</div><div class='add'>+	while (tpaca-&gt;kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) {</div><div class='add'>+		if (--timeout &lt;= 0) {</div><div class='add'>+			pr_err("KVM: couldn't grab cpu %d\n", cpu);</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+		udelay(1);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvmppc_release_hwthread(int cpu)</div><div class='add'>+{</div><div class='add'>+	struct paca_struct *tpaca;</div><div class='add'>+</div><div class='add'>+	tpaca = &amp;paca[cpu];</div><div class='add'>+	tpaca-&gt;kvm_hstate.hwthread_req = 0;</div><div class='add'>+	tpaca-&gt;kvm_hstate.kvm_vcpu = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void kvmppc_start_thread(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='hunk'>@@ -588,8 +750,7 @@ static void kvmppc_start_thread(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	smp_wmb();</div><div class='ctx'> #if defined(CONFIG_PPC_ICP_NATIVE) &amp;&amp; defined(CONFIG_SMP)</div><div class='ctx'> 	if (vcpu-&gt;arch.ptid) {</div><div class='del'>-		tpaca-&gt;cpu_start = 0x80;</div><div class='del'>-		wmb();</div><div class='add'>+		kvmppc_grab_hwthread(cpu);</div><div class='ctx'> 		xics_wake_cpu(cpu);</div><div class='ctx'> 		++vc-&gt;n_woken;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -639,7 +800,7 @@ static int kvmppc_run_core(struct kvmppc_vcore *vc)</div><div class='ctx'> 	struct kvm_vcpu *vcpu, *vcpu0, *vnext;</div><div class='ctx'> 	long ret;</div><div class='ctx'> 	u64 now;</div><div class='del'>-	int ptid;</div><div class='add'>+	int ptid, i;</div><div class='ctx'> </div><div class='ctx'> 	/* don't start if any threads have a signal pending */</div><div class='ctx'> 	list_for_each_entry(vcpu, &amp;vc-&gt;runnable_threads, arch.run_list)</div><div class='hunk'>@@ -681,17 +842,29 @@ static int kvmppc_run_core(struct kvmppc_vcore *vc)</div><div class='ctx'> 	vc-&gt;nap_count = 0;</div><div class='ctx'> 	vc-&gt;entry_exit_count = 0;</div><div class='ctx'> 	vc-&gt;vcore_state = VCORE_RUNNING;</div><div class='add'>+	vc-&gt;stolen_tb += mftb() - vc-&gt;preempt_tb;</div><div class='ctx'> 	vc-&gt;in_guest = 0;</div><div class='ctx'> 	vc-&gt;pcpu = smp_processor_id();</div><div class='ctx'> 	vc-&gt;napping_threads = 0;</div><div class='del'>-	list_for_each_entry(vcpu, &amp;vc-&gt;runnable_threads, arch.run_list)</div><div class='add'>+	list_for_each_entry(vcpu, &amp;vc-&gt;runnable_threads, arch.run_list) {</div><div class='ctx'> 		kvmppc_start_thread(vcpu);</div><div class='add'>+		if (vcpu-&gt;arch.vpa.update_pending ||</div><div class='add'>+		    vcpu-&gt;arch.slb_shadow.update_pending ||</div><div class='add'>+		    vcpu-&gt;arch.dtl.update_pending)</div><div class='add'>+			kvmppc_update_vpas(vcpu);</div><div class='add'>+		kvmppc_create_dtl_entry(vcpu, vc);</div><div class='add'>+	}</div><div class='add'>+	/* Grab any remaining hw threads so they can't go into the kernel */</div><div class='add'>+	for (i = ptid; i &lt; threads_per_core; ++i)</div><div class='add'>+		kvmppc_grab_hwthread(vc-&gt;pcpu + i);</div><div class='ctx'> </div><div class='ctx'> 	preempt_disable();</div><div class='ctx'> 	spin_unlock(&amp;vc-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	kvm_guest_enter();</div><div class='ctx'> 	__kvmppc_vcore_entry(NULL, vcpu0);</div><div class='add'>+	for (i = 0; i &lt; threads_per_core; ++i)</div><div class='add'>+		kvmppc_release_hwthread(vc-&gt;pcpu + i);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;vc-&gt;lock);</div><div class='ctx'> 	/* disable sending of IPIs on virtual external irqs */</div><div class='hunk'>@@ -737,6 +910,7 @@ static int kvmppc_run_core(struct kvmppc_vcore *vc)</div><div class='ctx'> 	spin_lock(&amp;vc-&gt;lock);</div><div class='ctx'>  out:</div><div class='ctx'> 	vc-&gt;vcore_state = VCORE_INACTIVE;</div><div class='add'>+	vc-&gt;preempt_tb = mftb();</div><div class='ctx'> 	list_for_each_entry_safe(vcpu, vnext, &amp;vc-&gt;runnable_threads,</div><div class='ctx'> 				 arch.run_list) {</div><div class='ctx'> 		if (vcpu-&gt;arch.ret != RESUME_GUEST) {</div><div class='hunk'>@@ -835,6 +1009,7 @@ static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)</div><div class='ctx'> 			spin_lock(&amp;vc-&gt;lock);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='add'>+		vc-&gt;runner = vcpu;</div><div class='ctx'> 		n_ceded = 0;</div><div class='ctx'> 		list_for_each_entry(v, &amp;vc-&gt;runnable_threads, arch.run_list)</div><div class='ctx'> 			n_ceded += v-&gt;arch.ceded;</div><div class='hunk'>@@ -854,6 +1029,7 @@ static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)</div><div class='ctx'> 				wake_up(&amp;v-&gt;arch.cpu_run);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+		vc-&gt;runner = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (signal_pending(current)) {</div><div class='hunk'>@@ -917,115 +1093,6 @@ int kvmppc_vcpu_run(struct kvm_run *run, struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static long kvmppc_stt_npages(unsigned long window_size)</div><div class='del'>-{</div><div class='del'>-	return ALIGN((window_size &gt;&gt; SPAPR_TCE_SHIFT)</div><div class='del'>-		     * sizeof(u64), PAGE_SIZE) / PAGE_SIZE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void release_spapr_tce_table(struct kvmppc_spapr_tce_table *stt)</div><div class='del'>-{</div><div class='del'>-	struct kvm *kvm = stt-&gt;kvm;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;kvm-&gt;lock);</div><div class='del'>-	list_del(&amp;stt-&gt;list);</div><div class='del'>-	for (i = 0; i &lt; kvmppc_stt_npages(stt-&gt;window_size); i++)</div><div class='del'>-		__free_page(stt-&gt;pages[i]);</div><div class='del'>-	kfree(stt);</div><div class='del'>-	mutex_unlock(&amp;kvm-&gt;lock);</div><div class='del'>-</div><div class='del'>-	kvm_put_kvm(kvm);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvm_spapr_tce_fault(struct vm_area_struct *vma, struct vm_fault *vmf)</div><div class='del'>-{</div><div class='del'>-	struct kvmppc_spapr_tce_table *stt = vma-&gt;vm_file-&gt;private_data;</div><div class='del'>-	struct page *page;</div><div class='del'>-</div><div class='del'>-	if (vmf-&gt;pgoff &gt;= kvmppc_stt_npages(stt-&gt;window_size))</div><div class='del'>-		return VM_FAULT_SIGBUS;</div><div class='del'>-</div><div class='del'>-	page = stt-&gt;pages[vmf-&gt;pgoff];</div><div class='del'>-	get_page(page);</div><div class='del'>-	vmf-&gt;page = page;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct vm_operations_struct kvm_spapr_tce_vm_ops = {</div><div class='del'>-	.fault = kvm_spapr_tce_fault,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int kvm_spapr_tce_mmap(struct file *file, struct vm_area_struct *vma)</div><div class='del'>-{</div><div class='del'>-	vma-&gt;vm_ops = &amp;kvm_spapr_tce_vm_ops;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvm_spapr_tce_release(struct inode *inode, struct file *filp)</div><div class='del'>-{</div><div class='del'>-	struct kvmppc_spapr_tce_table *stt = filp-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	release_spapr_tce_table(stt);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct file_operations kvm_spapr_tce_fops = {</div><div class='del'>-	.mmap           = kvm_spapr_tce_mmap,</div><div class='del'>-	.release	= kvm_spapr_tce_release,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-long kvm_vm_ioctl_create_spapr_tce(struct kvm *kvm,</div><div class='del'>-				   struct kvm_create_spapr_tce *args)</div><div class='del'>-{</div><div class='del'>-	struct kvmppc_spapr_tce_table *stt = NULL;</div><div class='del'>-	long npages;</div><div class='del'>-	int ret = -ENOMEM;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Check this LIOBN hasn't been previously allocated */</div><div class='del'>-	list_for_each_entry(stt, &amp;kvm-&gt;arch.spapr_tce_tables, list) {</div><div class='del'>-		if (stt-&gt;liobn == args-&gt;liobn)</div><div class='del'>-			return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	npages = kvmppc_stt_npages(args-&gt;window_size);</div><div class='del'>-</div><div class='del'>-	stt = kzalloc(sizeof(*stt) + npages* sizeof(struct page *),</div><div class='del'>-		      GFP_KERNEL);</div><div class='del'>-	if (!stt)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	stt-&gt;liobn = args-&gt;liobn;</div><div class='del'>-	stt-&gt;window_size = args-&gt;window_size;</div><div class='del'>-	stt-&gt;kvm = kvm;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; npages; i++) {</div><div class='del'>-		stt-&gt;pages[i] = alloc_page(GFP_KERNEL | __GFP_ZERO);</div><div class='del'>-		if (!stt-&gt;pages[i])</div><div class='del'>-			goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kvm_get_kvm(kvm);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;kvm-&gt;lock);</div><div class='del'>-	list_add(&amp;stt-&gt;list, &amp;kvm-&gt;arch.spapr_tce_tables);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;kvm-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return anon_inode_getfd("kvm-spapr-tce", &amp;kvm_spapr_tce_fops,</div><div class='del'>-				stt, O_RDWR);</div><div class='del'>-</div><div class='del'>-fail:</div><div class='del'>-	if (stt) {</div><div class='del'>-		for (i = 0; i &lt; npages; i++)</div><div class='del'>-			if (stt-&gt;pages[i])</div><div class='del'>-				__free_page(stt-&gt;pages[i]);</div><div class='del'>-</div><div class='del'>-		kfree(stt);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /* Work out RMLS (real mode limit selector) field value for a given RMA size.</div><div class='ctx'>    Assumes POWER7 or PPC970. */</div><div class='hunk'>@@ -1108,6 +1175,38 @@ long kvm_vm_ioctl_allocate_rma(struct kvm *kvm, struct kvm_allocate_rma *ret)</div><div class='ctx'> 	return fd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps,</div><div class='add'>+				     int linux_psize)</div><div class='add'>+{</div><div class='add'>+	struct mmu_psize_def *def = &amp;mmu_psize_defs[linux_psize];</div><div class='add'>+</div><div class='add'>+	if (!def-&gt;shift)</div><div class='add'>+		return;</div><div class='add'>+	(*sps)-&gt;page_shift = def-&gt;shift;</div><div class='add'>+	(*sps)-&gt;slb_enc = def-&gt;sllp;</div><div class='add'>+	(*sps)-&gt;enc[0].page_shift = def-&gt;shift;</div><div class='add'>+	(*sps)-&gt;enc[0].pte_enc = def-&gt;penc;</div><div class='add'>+	(*sps)++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvm_vm_ioctl_get_smmu_info(struct kvm *kvm, struct kvm_ppc_smmu_info *info)</div><div class='add'>+{</div><div class='add'>+	struct kvm_ppc_one_seg_page_size *sps;</div><div class='add'>+</div><div class='add'>+	info-&gt;flags = KVM_PPC_PAGE_SIZES_REAL;</div><div class='add'>+	if (mmu_has_feature(MMU_FTR_1T_SEGMENT))</div><div class='add'>+		info-&gt;flags |= KVM_PPC_1T_SEGMENTS;</div><div class='add'>+	info-&gt;slb_size = mmu_slb_size;</div><div class='add'>+</div><div class='add'>+	/* We only support these sizes for now, and no muti-size segments */</div><div class='add'>+	sps = &amp;info-&gt;sps[0];</div><div class='add'>+	kvmppc_add_seg_page_size(&amp;sps, MMU_PAGE_4K);</div><div class='add'>+	kvmppc_add_seg_page_size(&amp;sps, MMU_PAGE_64K);</div><div class='add'>+	kvmppc_add_seg_page_size(&amp;sps, MMU_PAGE_16M);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Get (and clear) the dirty memory log for a memory slot.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1192,8 +1291,6 @@ static void unpin_slot(struct kvm *kvm, int slot_id)</div><div class='ctx'> 				continue;</div><div class='ctx'> 			pfn = physp[j] &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 			page = pfn_to_page(pfn);</div><div class='del'>-			if (PageHuge(page))</div><div class='del'>-				page = compound_head(page);</div><div class='ctx'> 			SetPageDirty(page);</div><div class='ctx'> 			put_page(page);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1406,12 +1503,12 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 	return EMULATE_FAIL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)</div><div class='add'>+int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)</div><div class='ctx'> {</div><div class='ctx'> 	return EMULATE_FAIL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)</div><div class='add'>+int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)</div><div class='ctx'> {</div><div class='ctx'> 	return EMULATE_FAIL;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv_interrupts.S b/arch/powerpc/kvm/book3s_hv_interrupts.S<br/>index d3fb4df02c41..84035a528c80 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_hv_interrupts.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s_hv_interrupts.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_hv_interrupts.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_hv_interrupts.S</a></div><div class='hunk'>@@ -68,19 +68,24 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)</div><div class='ctx'> 	rotldi  r10,r10,16</div><div class='ctx'> 	mtmsrd  r10,1</div><div class='ctx'> </div><div class='del'>-	/* Save host PMU registers and load guest PMU registers */</div><div class='add'>+	/* Save host PMU registers */</div><div class='ctx'> 	/* R4 is live here (vcpu pointer) but not r3 or r5 */</div><div class='ctx'> 	li	r3, 1</div><div class='ctx'> 	sldi	r3, r3, 31		/* MMCR0_FC (freeze counters) bit */</div><div class='ctx'> 	mfspr	r7, SPRN_MMCR0		/* save MMCR0 */</div><div class='ctx'> 	mtspr	SPRN_MMCR0, r3		/* freeze all counters, disable interrupts */</div><div class='add'>+	mfspr	r6, SPRN_MMCRA</div><div class='add'>+BEGIN_FTR_SECTION</div><div class='add'>+	/* On P7, clear MMCRA in order to disable SDAR updates */</div><div class='add'>+	li	r5, 0</div><div class='add'>+	mtspr	SPRN_MMCRA, r5</div><div class='add'>+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)</div><div class='ctx'> 	isync</div><div class='ctx'> 	ld	r3, PACALPPACAPTR(r13)	/* is the host using the PMU? */</div><div class='ctx'> 	lbz	r5, LPPACA_PMCINUSE(r3)</div><div class='ctx'> 	cmpwi	r5, 0</div><div class='ctx'> 	beq	31f			/* skip if not */</div><div class='ctx'> 	mfspr	r5, SPRN_MMCR1</div><div class='del'>-	mfspr	r6, SPRN_MMCRA</div><div class='ctx'> 	std	r7, HSTATE_MMCR(r13)</div><div class='ctx'> 	std	r5, HSTATE_MMCR + 8(r13)</div><div class='ctx'> 	std	r6, HSTATE_MMCR + 16(r13)</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c<br/>index def880aea63a..cec4daddbf31 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_hv_rm_mmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s_hv_rm_mmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_hv_rm_mmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_hv_rm_mmu.c</a></div><div class='hunk'>@@ -463,6 +463,7 @@ long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu)</div><div class='ctx'> 				/* insert R and C bits from PTE */</div><div class='ctx'> 				rcbits = rev-&gt;guest_rpte &amp; (HPTE_R_R|HPTE_R_C);</div><div class='ctx'> 				args[j] |= rcbits &lt;&lt; (56 - 5);</div><div class='add'>+				hp[0] = 0;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S<br/>index b70bf22a3ff3..a84aafce2a12 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_hv_rmhandlers.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s_hv_rmhandlers.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_hv_rmhandlers.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_hv_rmhandlers.S</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include &lt;asm/hvcall.h&gt;</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/exception-64s.h&gt;</div><div class='add'>+#include &lt;asm/kvm_book3s_asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='ctx'>  *                                                                           *</div><div class='hunk'>@@ -82,6 +83,7 @@ _GLOBAL(kvmppc_hv_entry_trampoline)</div><div class='ctx'> </div><div class='ctx'> #define XICS_XIRR		4</div><div class='ctx'> #define XICS_QIRR		0xc</div><div class='add'>+#define XICS_IPI		2	/* interrupt source # for IPIs */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * We come in here when wakened from nap mode on a secondary hw thread.</div><div class='hunk'>@@ -94,26 +96,54 @@ kvm_start_guest:</div><div class='ctx'> 	subi	r1,r1,STACK_FRAME_OVERHEAD</div><div class='ctx'> 	ld	r2,PACATOC(r13)</div><div class='ctx'> </div><div class='del'>-	/* were we napping due to cede? */</div><div class='del'>-	lbz	r0,HSTATE_NAPPING(r13)</div><div class='del'>-	cmpwi	r0,0</div><div class='del'>-	bne	kvm_end_cede</div><div class='add'>+	li	r0,KVM_HWTHREAD_IN_KVM</div><div class='add'>+	stb	r0,HSTATE_HWTHREAD_STATE(r13)</div><div class='ctx'> </div><div class='del'>-	/* get vcpu pointer */</div><div class='del'>-	ld	r4, HSTATE_KVM_VCPU(r13)</div><div class='add'>+	/* NV GPR values from power7_idle() will no longer be valid */</div><div class='add'>+	li	r0,1</div><div class='add'>+	stb	r0,PACA_NAPSTATELOST(r13)</div><div class='ctx'> </div><div class='del'>-	/* We got here with an IPI; clear it */</div><div class='del'>-	ld	r5, HSTATE_XICS_PHYS(r13)</div><div class='del'>-	li	r0, 0xff</div><div class='del'>-	li	r6, XICS_QIRR</div><div class='del'>-	li	r7, XICS_XIRR</div><div class='del'>-	lwzcix	r8, r5, r7		/* ack the interrupt */</div><div class='add'>+	/* get vcpu pointer, NULL if we have no vcpu to run */</div><div class='add'>+	ld	r4,HSTATE_KVM_VCPU(r13)</div><div class='add'>+	cmpdi	cr1,r4,0</div><div class='add'>+</div><div class='add'>+	/* Check the wake reason in SRR1 to see why we got here */</div><div class='add'>+	mfspr	r3,SPRN_SRR1</div><div class='add'>+	rlwinm	r3,r3,44-31,0x7		/* extract wake reason field */</div><div class='add'>+	cmpwi	r3,4			/* was it an external interrupt? */</div><div class='add'>+	bne	27f</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * External interrupt - for now assume it is an IPI, since we</div><div class='add'>+	 * should never get any other interrupts sent to offline threads.</div><div class='add'>+	 * Only do this for secondary threads.</div><div class='add'>+	 */</div><div class='add'>+	beq	cr1,25f</div><div class='add'>+	lwz	r3,VCPU_PTID(r4)</div><div class='add'>+	cmpwi	r3,0</div><div class='add'>+	beq	27f</div><div class='add'>+25:	ld	r5,HSTATE_XICS_PHYS(r13)</div><div class='add'>+	li	r0,0xff</div><div class='add'>+	li	r6,XICS_QIRR</div><div class='add'>+	li	r7,XICS_XIRR</div><div class='add'>+	lwzcix	r8,r5,r7		/* get and ack the interrupt */</div><div class='ctx'> 	sync</div><div class='del'>-	stbcix	r0, r5, r6		/* clear it */</div><div class='del'>-	stwcix	r8, r5, r7		/* EOI it */</div><div class='add'>+	clrldi.	r9,r8,40		/* get interrupt source ID. */</div><div class='add'>+	beq	27f			/* none there? */</div><div class='add'>+	cmpwi	r9,XICS_IPI</div><div class='add'>+	bne	26f</div><div class='add'>+	stbcix	r0,r5,r6		/* clear IPI */</div><div class='add'>+26:	stwcix	r8,r5,r7		/* EOI the interrupt */</div><div class='ctx'> </div><div class='del'>-	/* NV GPR values from power7_idle() will no longer be valid */</div><div class='del'>-	stb	r0, PACA_NAPSTATELOST(r13)</div><div class='add'>+27:	/* XXX should handle hypervisor maintenance interrupts etc. here */</div><div class='add'>+</div><div class='add'>+	/* if we have no vcpu to run, go back to sleep */</div><div class='add'>+	beq	cr1,kvm_no_guest</div><div class='add'>+</div><div class='add'>+	/* were we napping due to cede? */</div><div class='add'>+	lbz	r0,HSTATE_NAPPING(r13)</div><div class='add'>+	cmpwi	r0,0</div><div class='add'>+	bne	kvm_end_cede</div><div class='ctx'> </div><div class='ctx'> .global kvmppc_hv_entry</div><div class='ctx'> kvmppc_hv_entry:</div><div class='hunk'>@@ -129,24 +159,15 @@ kvmppc_hv_entry:</div><div class='ctx'> 	mflr	r0</div><div class='ctx'> 	std	r0, HSTATE_VMHANDLER(r13)</div><div class='ctx'> </div><div class='del'>-	ld	r14, VCPU_GPR(r14)(r4)</div><div class='del'>-	ld	r15, VCPU_GPR(r15)(r4)</div><div class='del'>-	ld	r16, VCPU_GPR(r16)(r4)</div><div class='del'>-	ld	r17, VCPU_GPR(r17)(r4)</div><div class='del'>-	ld	r18, VCPU_GPR(r18)(r4)</div><div class='del'>-	ld	r19, VCPU_GPR(r19)(r4)</div><div class='del'>-	ld	r20, VCPU_GPR(r20)(r4)</div><div class='del'>-	ld	r21, VCPU_GPR(r21)(r4)</div><div class='del'>-	ld	r22, VCPU_GPR(r22)(r4)</div><div class='del'>-	ld	r23, VCPU_GPR(r23)(r4)</div><div class='del'>-	ld	r24, VCPU_GPR(r24)(r4)</div><div class='del'>-	ld	r25, VCPU_GPR(r25)(r4)</div><div class='del'>-	ld	r26, VCPU_GPR(r26)(r4)</div><div class='del'>-	ld	r27, VCPU_GPR(r27)(r4)</div><div class='del'>-	ld	r28, VCPU_GPR(r28)(r4)</div><div class='del'>-	ld	r29, VCPU_GPR(r29)(r4)</div><div class='del'>-	ld	r30, VCPU_GPR(r30)(r4)</div><div class='del'>-	ld	r31, VCPU_GPR(r31)(r4)</div><div class='add'>+	/* Set partition DABR */</div><div class='add'>+	/* Do this before re-enabling PMU to avoid P7 DABR corruption bug */</div><div class='add'>+	li	r5,3</div><div class='add'>+	ld	r6,VCPU_DABR(r4)</div><div class='add'>+	mtspr	SPRN_DABRX,r5</div><div class='add'>+	mtspr	SPRN_DABR,r6</div><div class='add'>+BEGIN_FTR_SECTION</div><div class='add'>+	isync</div><div class='add'>+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)</div><div class='ctx'> </div><div class='ctx'> 	/* Load guest PMU registers */</div><div class='ctx'> 	/* R4 is live here (vcpu pointer) */</div><div class='hunk'>@@ -185,6 +206,25 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)</div><div class='ctx'> 	/* Load up FP, VMX and VSX registers */</div><div class='ctx'> 	bl	kvmppc_load_fp</div><div class='ctx'> </div><div class='add'>+	ld	r14, VCPU_GPR(r14)(r4)</div><div class='add'>+	ld	r15, VCPU_GPR(r15)(r4)</div><div class='add'>+	ld	r16, VCPU_GPR(r16)(r4)</div><div class='add'>+	ld	r17, VCPU_GPR(r17)(r4)</div><div class='add'>+	ld	r18, VCPU_GPR(r18)(r4)</div><div class='add'>+	ld	r19, VCPU_GPR(r19)(r4)</div><div class='add'>+	ld	r20, VCPU_GPR(r20)(r4)</div><div class='add'>+	ld	r21, VCPU_GPR(r21)(r4)</div><div class='add'>+	ld	r22, VCPU_GPR(r22)(r4)</div><div class='add'>+	ld	r23, VCPU_GPR(r23)(r4)</div><div class='add'>+	ld	r24, VCPU_GPR(r24)(r4)</div><div class='add'>+	ld	r25, VCPU_GPR(r25)(r4)</div><div class='add'>+	ld	r26, VCPU_GPR(r26)(r4)</div><div class='add'>+	ld	r27, VCPU_GPR(r27)(r4)</div><div class='add'>+	ld	r28, VCPU_GPR(r28)(r4)</div><div class='add'>+	ld	r29, VCPU_GPR(r29)(r4)</div><div class='add'>+	ld	r30, VCPU_GPR(r30)(r4)</div><div class='add'>+	ld	r31, VCPU_GPR(r31)(r4)</div><div class='add'>+</div><div class='ctx'> BEGIN_FTR_SECTION</div><div class='ctx'> 	/* Switch DSCR to guest value */</div><div class='ctx'> 	ld	r5, VCPU_DSCR(r4)</div><div class='hunk'>@@ -226,12 +266,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)</div><div class='ctx'> 	mtspr	SPRN_DAR, r5</div><div class='ctx'> 	mtspr	SPRN_DSISR, r6</div><div class='ctx'> </div><div class='del'>-	/* Set partition DABR */</div><div class='del'>-	li	r5,3</div><div class='del'>-	ld	r6,VCPU_DABR(r4)</div><div class='del'>-	mtspr	SPRN_DABRX,r5</div><div class='del'>-	mtspr	SPRN_DABR,r6</div><div class='del'>-</div><div class='ctx'> BEGIN_FTR_SECTION</div><div class='ctx'> 	/* Restore AMR and UAMOR, set AMOR to all 1s */</div><div class='ctx'> 	ld	r5,VCPU_AMR(r4)</div><div class='hunk'>@@ -925,12 +959,6 @@ BEGIN_FTR_SECTION</div><div class='ctx'> 	mtspr	SPRN_AMR,r6</div><div class='ctx'> END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)</div><div class='ctx'> </div><div class='del'>-	/* Restore host DABR and DABRX */</div><div class='del'>-	ld	r5,HSTATE_DABR(r13)</div><div class='del'>-	li	r6,7</div><div class='del'>-	mtspr	SPRN_DABR,r5</div><div class='del'>-	mtspr	SPRN_DABRX,r6</div><div class='del'>-</div><div class='ctx'> 	/* Switch DSCR back to host value */</div><div class='ctx'> BEGIN_FTR_SECTION</div><div class='ctx'> 	mfspr	r8, SPRN_DSCR</div><div class='hunk'>@@ -969,6 +997,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)</div><div class='ctx'> 	std	r5, VCPU_SPRG2(r9)</div><div class='ctx'> 	std	r6, VCPU_SPRG3(r9)</div><div class='ctx'> </div><div class='add'>+	/* save FP state */</div><div class='add'>+	mr	r3, r9</div><div class='add'>+	bl	.kvmppc_save_fp</div><div class='add'>+</div><div class='ctx'> 	/* Increment yield count if they have a VPA */</div><div class='ctx'> 	ld	r8, VCPU_VPA(r9)	/* do they have a VPA? */</div><div class='ctx'> 	cmpdi	r8, 0</div><div class='hunk'>@@ -983,6 +1015,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)</div><div class='ctx'> 	sldi	r3, r3, 31		/* MMCR0_FC (freeze counters) bit */</div><div class='ctx'> 	mfspr	r4, SPRN_MMCR0		/* save MMCR0 */</div><div class='ctx'> 	mtspr	SPRN_MMCR0, r3		/* freeze all counters, disable ints */</div><div class='add'>+	mfspr	r6, SPRN_MMCRA</div><div class='add'>+BEGIN_FTR_SECTION</div><div class='add'>+	/* On P7, clear MMCRA in order to disable SDAR updates */</div><div class='add'>+	li	r7, 0</div><div class='add'>+	mtspr	SPRN_MMCRA, r7</div><div class='add'>+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)</div><div class='ctx'> 	isync</div><div class='ctx'> 	beq	21f			/* if no VPA, save PMU stuff anyway */</div><div class='ctx'> 	lbz	r7, LPPACA_PMCINUSE(r8)</div><div class='hunk'>@@ -991,7 +1029,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)</div><div class='ctx'> 	std	r3, VCPU_MMCR(r9)	/* if not, set saved MMCR0 to FC */</div><div class='ctx'> 	b	22f</div><div class='ctx'> 21:	mfspr	r5, SPRN_MMCR1</div><div class='del'>-	mfspr	r6, SPRN_MMCRA</div><div class='ctx'> 	std	r4, VCPU_MMCR(r9)</div><div class='ctx'> 	std	r5, VCPU_MMCR + 8(r9)</div><div class='ctx'> 	std	r6, VCPU_MMCR + 16(r9)</div><div class='hunk'>@@ -1016,17 +1053,20 @@ BEGIN_FTR_SECTION</div><div class='ctx'> 	stw	r11, VCPU_PMC + 28(r9)</div><div class='ctx'> END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)</div><div class='ctx'> 22:</div><div class='del'>-	/* save FP state */</div><div class='del'>-	mr	r3, r9</div><div class='del'>-	bl	.kvmppc_save_fp</div><div class='ctx'> </div><div class='ctx'> 	/* Secondary threads go off to take a nap on POWER7 */</div><div class='ctx'> BEGIN_FTR_SECTION</div><div class='del'>-	lwz	r0,VCPU_PTID(r3)</div><div class='add'>+	lwz	r0,VCPU_PTID(r9)</div><div class='ctx'> 	cmpwi	r0,0</div><div class='ctx'> 	bne	secondary_nap</div><div class='ctx'> END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)</div><div class='ctx'> </div><div class='add'>+	/* Restore host DABR and DABRX */</div><div class='add'>+	ld	r5,HSTATE_DABR(r13)</div><div class='add'>+	li	r6,7</div><div class='add'>+	mtspr	SPRN_DABR,r5</div><div class='add'>+	mtspr	SPRN_DABRX,r6</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Reload DEC.  HDEC interrupts were disabled when</div><div class='ctx'> 	 * we reloaded the host's LPCR value.</div><div class='hunk'>@@ -1363,7 +1403,12 @@ bounce_ext_interrupt:</div><div class='ctx'> </div><div class='ctx'> _GLOBAL(kvmppc_h_set_dabr)</div><div class='ctx'> 	std	r4,VCPU_DABR(r3)</div><div class='del'>-	mtspr	SPRN_DABR,r4</div><div class='add'>+	/* Work around P7 bug where DABR can get corrupted on mtspr */</div><div class='add'>+1:	mtspr	SPRN_DABR,r4</div><div class='add'>+	mfspr	r5, SPRN_DABR</div><div class='add'>+	cmpd	r4, r5</div><div class='add'>+	bne	1b</div><div class='add'>+	isync</div><div class='ctx'> 	li	r3,0</div><div class='ctx'> 	blr</div><div class='ctx'> </div><div class='hunk'>@@ -1445,8 +1490,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)</div><div class='ctx'> 	 * Take a nap until a decrementer or external interrupt occurs,</div><div class='ctx'> 	 * with PECE1 (wake on decr) and PECE0 (wake on external) set in LPCR</div><div class='ctx'> 	 */</div><div class='del'>-	li	r0,0x80</div><div class='del'>-	stb	r0,PACAPROCSTART(r13)</div><div class='add'>+	li	r0,1</div><div class='add'>+	stb	r0,HSTATE_HWTHREAD_REQ(r13)</div><div class='ctx'> 	mfspr	r5,SPRN_LPCR</div><div class='ctx'> 	ori	r5,r5,LPCR_PECE0 | LPCR_PECE1</div><div class='ctx'> 	mtspr	SPRN_LPCR,r5</div><div class='hunk'>@@ -1463,26 +1508,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)</div><div class='ctx'> kvm_end_cede:</div><div class='ctx'> 	/* Woken by external or decrementer interrupt */</div><div class='ctx'> 	ld	r1, HSTATE_HOST_R1(r13)</div><div class='del'>-	ld	r2, PACATOC(r13)</div><div class='ctx'> </div><div class='del'>-	/* If we're a secondary thread and we got here by an IPI, ack it */</div><div class='del'>-	ld	r4,HSTATE_KVM_VCPU(r13)</div><div class='del'>-	lwz	r3,VCPU_PTID(r4)</div><div class='del'>-	cmpwi	r3,0</div><div class='del'>-	beq	27f</div><div class='del'>-	mfspr	r3,SPRN_SRR1</div><div class='del'>-	rlwinm	r3,r3,44-31,0x7		/* extract wake reason field */</div><div class='del'>-	cmpwi	r3,4			/* was it an external interrupt? */</div><div class='del'>-	bne	27f</div><div class='del'>-	ld	r5, HSTATE_XICS_PHYS(r13)</div><div class='del'>-	li	r0,0xff</div><div class='del'>-	li	r6,XICS_QIRR</div><div class='del'>-	li	r7,XICS_XIRR</div><div class='del'>-	lwzcix	r8,r5,r7		/* ack the interrupt */</div><div class='del'>-	sync</div><div class='del'>-	stbcix	r0,r5,r6		/* clear it */</div><div class='del'>-	stwcix	r8,r5,r7		/* EOI it */</div><div class='del'>-27:</div><div class='ctx'> 	/* load up FP state */</div><div class='ctx'> 	bl	kvmppc_load_fp</div><div class='ctx'> </div><div class='hunk'>@@ -1580,12 +1606,17 @@ secondary_nap:</div><div class='ctx'> 	stwcx.	r3, 0, r4</div><div class='ctx'> 	bne	51b</div><div class='ctx'> </div><div class='add'>+kvm_no_guest:</div><div class='add'>+	li	r0, KVM_HWTHREAD_IN_NAP</div><div class='add'>+	stb	r0, HSTATE_HWTHREAD_STATE(r13)</div><div class='add'>+	li	r0, 0</div><div class='add'>+	std	r0, HSTATE_KVM_VCPU(r13)</div><div class='add'>+</div><div class='ctx'> 	li	r3, LPCR_PECE0</div><div class='ctx'> 	mfspr	r4, SPRN_LPCR</div><div class='ctx'> 	rlwimi	r4, r3, 0, LPCR_PECE0 | LPCR_PECE1</div><div class='ctx'> 	mtspr	SPRN_LPCR, r4</div><div class='ctx'> 	isync</div><div class='del'>-	li	r0, 0</div><div class='ctx'> 	std	r0, HSTATE_SCRATCH0(r13)</div><div class='ctx'> 	ptesync</div><div class='ctx'> 	ld	r0, HSTATE_SCRATCH0(r13)</div><div class='hunk'>@@ -1599,8 +1630,8 @@ secondary_nap:</div><div class='ctx'>  * r3 = vcpu pointer</div><div class='ctx'>  */</div><div class='ctx'> _GLOBAL(kvmppc_save_fp)</div><div class='del'>-	mfmsr	r9</div><div class='del'>-	ori	r8,r9,MSR_FP</div><div class='add'>+	mfmsr	r5</div><div class='add'>+	ori	r8,r5,MSR_FP</div><div class='ctx'> #ifdef CONFIG_ALTIVEC</div><div class='ctx'> BEGIN_FTR_SECTION</div><div class='ctx'> 	oris	r8,r8,MSR_VEC@h</div><div class='hunk'>@@ -1649,7 +1680,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)</div><div class='ctx'> #endif</div><div class='ctx'> 	mfspr	r6,SPRN_VRSAVE</div><div class='ctx'> 	stw	r6,VCPU_VRSAVE(r3)</div><div class='del'>-	mtmsrd	r9</div><div class='add'>+	mtmsrd	r5</div><div class='ctx'> 	isync</div><div class='ctx'> 	blr</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c<br/>index 7759053d391b..a1baec340f7e 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_pr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s_pr.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_pr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_pr.c</a></div><div class='hunk'>@@ -120,6 +120,7 @@ void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)</div><div class='ctx'> 	if (msr &amp; MSR_POW) {</div><div class='ctx'> 		if (!vcpu-&gt;arch.pending_exceptions) {</div><div class='ctx'> 			kvm_vcpu_block(vcpu);</div><div class='add'>+			clear_bit(KVM_REQ_UNHALT, &amp;vcpu-&gt;requests);</div><div class='ctx'> 			vcpu-&gt;stat.halt_wakeup++;</div><div class='ctx'> </div><div class='ctx'> 			/* Unset POW bit after we woke up */</div><div class='hunk'>@@ -144,6 +145,21 @@ void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * When switching from 32 to 64-bit, we may have a stale 32-bit</div><div class='add'>+	 * magic page around, we need to flush it. Typically 32-bit magic</div><div class='add'>+	 * page will be instanciated when calling into RTAS. Note: We</div><div class='add'>+	 * assume that such transition only happens while in kernel mode,</div><div class='add'>+	 * ie, we never transition from user 32-bit to kernel 64-bit with</div><div class='add'>+	 * a 32-bit magic page around.</div><div class='add'>+	 */</div><div class='add'>+	if (vcpu-&gt;arch.magic_page_pa &amp;&amp;</div><div class='add'>+	    !(old_msr &amp; MSR_PR) &amp;&amp; !(old_msr &amp; MSR_SF) &amp;&amp; (msr &amp; MSR_SF)) {</div><div class='add'>+		/* going from RTAS to normal kernel code */</div><div class='add'>+		kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu-&gt;arch.magic_page_pa,</div><div class='add'>+				     ~0xFFFUL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Preload FPU if it's enabled */</div><div class='ctx'> 	if (vcpu-&gt;arch.shared-&gt;msr &amp; MSR_FP)</div><div class='ctx'> 		kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);</div><div class='hunk'>@@ -251,6 +267,9 @@ static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)</div><div class='ctx'> {</div><div class='ctx'> 	ulong mp_pa = vcpu-&gt;arch.magic_page_pa;</div><div class='ctx'> </div><div class='add'>+	if (!(vcpu-&gt;arch.shared-&gt;msr &amp; MSR_SF))</div><div class='add'>+		mp_pa = (uint32_t)mp_pa;</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(mp_pa) &amp;&amp;</div><div class='ctx'> 	    unlikely((mp_pa &amp; KVM_PAM) &gt;&gt; PAGE_SHIFT == gfn)) {</div><div class='ctx'> 		return 1;</div><div class='hunk'>@@ -351,6 +370,7 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 		/* MMIO */</div><div class='ctx'> 		vcpu-&gt;stat.mmio_exits++;</div><div class='ctx'> 		vcpu-&gt;arch.paddr_accessed = pte.raddr;</div><div class='add'>+		vcpu-&gt;arch.vaddr_accessed = pte.eaddr;</div><div class='ctx'> 		r = kvmppc_emulate_mmio(run, vcpu);</div><div class='ctx'> 		if ( r == RESUME_HOST_NV )</div><div class='ctx'> 			r = RESUME_HOST;</div><div class='hunk'>@@ -528,6 +548,9 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 	run-&gt;exit_reason = KVM_EXIT_UNKNOWN;</div><div class='ctx'> 	run-&gt;ready_for_interrupt_injection = 1;</div><div class='ctx'> </div><div class='add'>+	/* We get here with MSR.EE=0, so enable it to be a nice citizen */</div><div class='add'>+	__hard_irq_enable();</div><div class='add'>+</div><div class='ctx'> 	trace_kvm_book3s_exit(exit_nr, vcpu);</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> 	kvm_resched(vcpu);</div><div class='hunk'>@@ -617,10 +640,13 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 		break;</div><div class='ctx'> 	/* We're good on these - the host merely wanted to get our attention */</div><div class='ctx'> 	case BOOK3S_INTERRUPT_DECREMENTER:</div><div class='add'>+	case BOOK3S_INTERRUPT_HV_DECREMENTER:</div><div class='ctx'> 		vcpu-&gt;stat.dec_exits++;</div><div class='ctx'> 		r = RESUME_GUEST;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BOOK3S_INTERRUPT_EXTERNAL:</div><div class='add'>+	case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:</div><div class='add'>+	case BOOK3S_INTERRUPT_EXTERNAL_HV:</div><div class='ctx'> 		vcpu-&gt;stat.ext_intr_exits++;</div><div class='ctx'> 		r = RESUME_GUEST;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -628,6 +654,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 		r = RESUME_GUEST;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BOOK3S_INTERRUPT_PROGRAM:</div><div class='add'>+	case BOOK3S_INTERRUPT_H_EMUL_ASSIST:</div><div class='ctx'> 	{</div><div class='ctx'> 		enum emulation_result er;</div><div class='ctx'> 		struct kvmppc_book3s_shadow_vcpu *svcpu;</div><div class='hunk'>@@ -1131,6 +1158,31 @@ out:</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PPC64</div><div class='add'>+int kvm_vm_ioctl_get_smmu_info(struct kvm *kvm, struct kvm_ppc_smmu_info *info)</div><div class='add'>+{</div><div class='add'>+	/* No flags */</div><div class='add'>+	info-&gt;flags = 0;</div><div class='add'>+</div><div class='add'>+	/* SLB is always 64 entries */</div><div class='add'>+	info-&gt;slb_size = 64;</div><div class='add'>+</div><div class='add'>+	/* Standard 4k base page size segment */</div><div class='add'>+	info-&gt;sps[0].page_shift = 12;</div><div class='add'>+	info-&gt;sps[0].slb_enc = 0;</div><div class='add'>+	info-&gt;sps[0].enc[0].page_shift = 12;</div><div class='add'>+	info-&gt;sps[0].enc[0].pte_enc = 0;</div><div class='add'>+</div><div class='add'>+	/* Standard 16M large page size segment */</div><div class='add'>+	info-&gt;sps[1].page_shift = 24;</div><div class='add'>+	info-&gt;sps[1].slb_enc = SLB_VSID_L;</div><div class='add'>+	info-&gt;sps[1].enc[0].page_shift = 24;</div><div class='add'>+	info-&gt;sps[1].enc[0].pte_enc = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_PPC64 */</div><div class='add'>+</div><div class='ctx'> int kvmppc_core_prepare_memory_region(struct kvm *kvm,</div><div class='ctx'> 				      struct kvm_userspace_memory_region *mem)</div><div class='ctx'> {</div><div class='hunk'>@@ -1144,11 +1196,18 @@ void kvmppc_core_commit_memory_region(struct kvm *kvm,</div><div class='ctx'> </div><div class='ctx'> int kvmppc_core_init_vm(struct kvm *kvm)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_PPC64</div><div class='add'>+	INIT_LIST_HEAD(&amp;kvm-&gt;arch.spapr_tce_tables);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvmppc_core_destroy_vm(struct kvm *kvm)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_PPC64</div><div class='add'>+	WARN_ON(!list_empty(&amp;kvm-&gt;arch.spapr_tce_tables));</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int kvmppc_book3s_init(void)</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_pr_papr.c b/arch/powerpc/kvm/book3s_pr_papr.c<br/>index b9589324797b..3ff9013d6e79 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_pr_papr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s_pr_papr.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_pr_papr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_pr_papr.c</a></div><div class='hunk'>@@ -15,6 +15,8 @@</div><div class='ctx'>  * published by the Free Software Foundation.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/anon_inodes.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_ppc.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_book3s.h&gt;</div><div class='hunk'>@@ -98,6 +100,83 @@ static int kvmppc_h_pr_remove(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return EMULATE_DONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Request defs for kvmppc_h_pr_bulk_remove() */</div><div class='add'>+#define H_BULK_REMOVE_TYPE             0xc000000000000000ULL</div><div class='add'>+#define   H_BULK_REMOVE_REQUEST        0x4000000000000000ULL</div><div class='add'>+#define   H_BULK_REMOVE_RESPONSE       0x8000000000000000ULL</div><div class='add'>+#define   H_BULK_REMOVE_END            0xc000000000000000ULL</div><div class='add'>+#define H_BULK_REMOVE_CODE             0x3000000000000000ULL</div><div class='add'>+#define   H_BULK_REMOVE_SUCCESS        0x0000000000000000ULL</div><div class='add'>+#define   H_BULK_REMOVE_NOT_FOUND      0x1000000000000000ULL</div><div class='add'>+#define   H_BULK_REMOVE_PARM           0x2000000000000000ULL</div><div class='add'>+#define   H_BULK_REMOVE_HW             0x3000000000000000ULL</div><div class='add'>+#define H_BULK_REMOVE_RC               0x0c00000000000000ULL</div><div class='add'>+#define H_BULK_REMOVE_FLAGS            0x0300000000000000ULL</div><div class='add'>+#define   H_BULK_REMOVE_ABSOLUTE       0x0000000000000000ULL</div><div class='add'>+#define   H_BULK_REMOVE_ANDCOND        0x0100000000000000ULL</div><div class='add'>+#define   H_BULK_REMOVE_AVPN           0x0200000000000000ULL</div><div class='add'>+#define H_BULK_REMOVE_PTEX             0x00ffffffffffffffULL</div><div class='add'>+#define H_BULK_REMOVE_MAX_BATCH        4</div><div class='add'>+</div><div class='add'>+static int kvmppc_h_pr_bulk_remove(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int paramnr = 4;</div><div class='add'>+	int ret = H_SUCCESS;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; H_BULK_REMOVE_MAX_BATCH; i++) {</div><div class='add'>+		unsigned long tsh = kvmppc_get_gpr(vcpu, paramnr+(2*i));</div><div class='add'>+		unsigned long tsl = kvmppc_get_gpr(vcpu, paramnr+(2*i)+1);</div><div class='add'>+		unsigned long pteg, rb, flags;</div><div class='add'>+		unsigned long pte[2];</div><div class='add'>+		unsigned long v = 0;</div><div class='add'>+</div><div class='add'>+		if ((tsh &amp; H_BULK_REMOVE_TYPE) == H_BULK_REMOVE_END) {</div><div class='add'>+			break; /* Exit success */</div><div class='add'>+		} else if ((tsh &amp; H_BULK_REMOVE_TYPE) !=</div><div class='add'>+			   H_BULK_REMOVE_REQUEST) {</div><div class='add'>+			ret = H_PARAMETER;</div><div class='add'>+			break; /* Exit fail */</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		tsh &amp;= H_BULK_REMOVE_PTEX | H_BULK_REMOVE_FLAGS;</div><div class='add'>+		tsh |= H_BULK_REMOVE_RESPONSE;</div><div class='add'>+</div><div class='add'>+		if ((tsh &amp; H_BULK_REMOVE_ANDCOND) &amp;&amp;</div><div class='add'>+		    (tsh &amp; H_BULK_REMOVE_AVPN)) {</div><div class='add'>+			tsh |= H_BULK_REMOVE_PARM;</div><div class='add'>+			kvmppc_set_gpr(vcpu, paramnr+(2*i), tsh);</div><div class='add'>+			ret = H_PARAMETER;</div><div class='add'>+			break; /* Exit fail */</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pteg = get_pteg_addr(vcpu, tsh &amp; H_BULK_REMOVE_PTEX);</div><div class='add'>+		copy_from_user(pte, (void __user *)pteg, sizeof(pte));</div><div class='add'>+</div><div class='add'>+		/* tsl = AVPN */</div><div class='add'>+		flags = (tsh &amp; H_BULK_REMOVE_FLAGS) &gt;&gt; 26;</div><div class='add'>+</div><div class='add'>+		if ((pte[0] &amp; HPTE_V_VALID) == 0 ||</div><div class='add'>+		    ((flags &amp; H_AVPN) &amp;&amp; (pte[0] &amp; ~0x7fUL) != tsl) ||</div><div class='add'>+		    ((flags &amp; H_ANDCOND) &amp;&amp; (pte[0] &amp; tsl) != 0)) {</div><div class='add'>+			tsh |= H_BULK_REMOVE_NOT_FOUND;</div><div class='add'>+		} else {</div><div class='add'>+			/* Splat the pteg in (userland) hpt */</div><div class='add'>+			copy_to_user((void __user *)pteg, &amp;v, sizeof(v));</div><div class='add'>+</div><div class='add'>+			rb = compute_tlbie_rb(pte[0], pte[1],</div><div class='add'>+					      tsh &amp; H_BULK_REMOVE_PTEX);</div><div class='add'>+			vcpu-&gt;arch.mmu.tlbie(vcpu, rb, rb &amp; 1 ? true : false);</div><div class='add'>+			tsh |= H_BULK_REMOVE_SUCCESS;</div><div class='add'>+			tsh |= (pte[1] &amp; (HPTE_R_C | HPTE_R_R)) &lt;&lt; 43;</div><div class='add'>+		}</div><div class='add'>+		kvmppc_set_gpr(vcpu, paramnr+(2*i), tsh);</div><div class='add'>+	}</div><div class='add'>+	kvmppc_set_gpr(vcpu, 3, ret);</div><div class='add'>+</div><div class='add'>+	return EMULATE_DONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int kvmppc_h_pr_protect(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags = kvmppc_get_gpr(vcpu, 4);</div><div class='hunk'>@@ -134,6 +213,20 @@ static int kvmppc_h_pr_protect(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return EMULATE_DONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int kvmppc_h_pr_put_tce(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	unsigned long liobn = kvmppc_get_gpr(vcpu, 4);</div><div class='add'>+	unsigned long ioba = kvmppc_get_gpr(vcpu, 5);</div><div class='add'>+	unsigned long tce = kvmppc_get_gpr(vcpu, 6);</div><div class='add'>+	long rc;</div><div class='add'>+</div><div class='add'>+	rc = kvmppc_h_put_tce(vcpu, liobn, ioba, tce);</div><div class='add'>+	if (rc == H_TOO_HARD)</div><div class='add'>+		return EMULATE_FAIL;</div><div class='add'>+	kvmppc_set_gpr(vcpu, 3, rc);</div><div class='add'>+	return EMULATE_DONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvmppc_h_pr(struct kvm_vcpu *vcpu, unsigned long cmd)</div><div class='ctx'> {</div><div class='ctx'> 	switch (cmd) {</div><div class='hunk'>@@ -144,12 +237,12 @@ int kvmppc_h_pr(struct kvm_vcpu *vcpu, unsigned long cmd)</div><div class='ctx'> 	case H_PROTECT:</div><div class='ctx'> 		return kvmppc_h_pr_protect(vcpu);</div><div class='ctx'> 	case H_BULK_REMOVE:</div><div class='del'>-		/* We just flush all PTEs, so user space can</div><div class='del'>-		   handle the HPT modifications */</div><div class='del'>-		kvmppc_mmu_pte_flush(vcpu, 0, 0);</div><div class='del'>-		break;</div><div class='add'>+		return kvmppc_h_pr_bulk_remove(vcpu);</div><div class='add'>+	case H_PUT_TCE:</div><div class='add'>+		return kvmppc_h_pr_put_tce(vcpu);</div><div class='ctx'> 	case H_CEDE:</div><div class='ctx'> 		kvm_vcpu_block(vcpu);</div><div class='add'>+		clear_bit(KVM_REQ_UNHALT, &amp;vcpu-&gt;requests);</div><div class='ctx'> 		vcpu-&gt;stat.halt_wakeup++;</div><div class='ctx'> 		return EMULATE_DONE;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_segment.S b/arch/powerpc/kvm/book3s_segment.S<br/>index 0676ae249b9f..798491a268b3 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_segment.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/book3s_segment.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/book3s_segment.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/book3s_segment.S</a></div><div class='hunk'>@@ -128,24 +128,25 @@ no_dcbz32_on:</div><div class='ctx'> 	/* First clear RI in our current MSR value */</div><div class='ctx'> 	li	r0, MSR_RI</div><div class='ctx'> 	andc	r6, r6, r0</div><div class='del'>-	MTMSR_EERI(r6)</div><div class='del'>-	mtsrr0	r9</div><div class='del'>-	mtsrr1	r4</div><div class='ctx'> </div><div class='ctx'> 	PPC_LL	r0, SVCPU_R0(r3)</div><div class='ctx'> 	PPC_LL	r1, SVCPU_R1(r3)</div><div class='ctx'> 	PPC_LL	r2, SVCPU_R2(r3)</div><div class='del'>-	PPC_LL	r4, SVCPU_R4(r3)</div><div class='ctx'> 	PPC_LL	r5, SVCPU_R5(r3)</div><div class='del'>-	PPC_LL	r6, SVCPU_R6(r3)</div><div class='ctx'> 	PPC_LL	r7, SVCPU_R7(r3)</div><div class='ctx'> 	PPC_LL	r8, SVCPU_R8(r3)</div><div class='del'>-	PPC_LL	r9, SVCPU_R9(r3)</div><div class='ctx'> 	PPC_LL	r10, SVCPU_R10(r3)</div><div class='ctx'> 	PPC_LL	r11, SVCPU_R11(r3)</div><div class='ctx'> 	PPC_LL	r12, SVCPU_R12(r3)</div><div class='ctx'> 	PPC_LL	r13, SVCPU_R13(r3)</div><div class='ctx'> </div><div class='add'>+	MTMSR_EERI(r6)</div><div class='add'>+	mtsrr0	r9</div><div class='add'>+	mtsrr1	r4</div><div class='add'>+</div><div class='add'>+	PPC_LL	r4, SVCPU_R4(r3)</div><div class='add'>+	PPC_LL	r6, SVCPU_R6(r3)</div><div class='add'>+	PPC_LL	r9, SVCPU_R9(r3)</div><div class='ctx'> 	PPC_LL	r3, (SVCPU_R3)(r3)</div><div class='ctx'> </div><div class='ctx'> 	RFI</div><div class='hunk'>@@ -197,7 +198,8 @@ kvmppc_interrupt:</div><div class='ctx'> 	/* Save guest PC and MSR */</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='ctx'> BEGIN_FTR_SECTION</div><div class='del'>-	andi.	r0,r12,0x2</div><div class='add'>+	andi.	r0, r12, 0x2</div><div class='add'>+	cmpwi	cr1, r0, 0</div><div class='ctx'> 	beq	1f</div><div class='ctx'> 	mfspr	r3,SPRN_HSRR0</div><div class='ctx'> 	mfspr	r4,SPRN_HSRR1</div><div class='hunk'>@@ -250,6 +252,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)</div><div class='ctx'> 	beq	ld_last_prev_inst</div><div class='ctx'> 	cmpwi	r12, BOOK3S_INTERRUPT_ALIGNMENT</div><div class='ctx'> 	beq-	ld_last_inst</div><div class='add'>+#ifdef CONFIG_PPC64</div><div class='add'>+BEGIN_FTR_SECTION</div><div class='add'>+	cmpwi	r12, BOOK3S_INTERRUPT_H_EMUL_ASSIST</div><div class='add'>+	beq-	ld_last_inst</div><div class='add'>+END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	b	no_ld_last_inst</div><div class='ctx'> </div><div class='hunk'>@@ -316,23 +324,17 @@ no_dcbz32_off:</div><div class='ctx'> 	 * Having set up SRR0/1 with the address where we want</div><div class='ctx'> 	 * to continue with relocation on (potentially in module</div><div class='ctx'> 	 * space), we either just go straight there with rfi[d],</div><div class='del'>-	 * or we jump to an interrupt handler with bctr if there</div><div class='del'>-	 * is an interrupt to be handled first.  In the latter</div><div class='del'>-	 * case, the rfi[d] at the end of the interrupt handler</div><div class='del'>-	 * will get us back to where we want to continue.</div><div class='add'>+	 * or we jump to an interrupt handler if there is an</div><div class='add'>+	 * interrupt to be handled first.  In the latter case,</div><div class='add'>+	 * the rfi[d] at the end of the interrupt handler will</div><div class='add'>+	 * get us back to where we want to continue.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	cmpwi	r12, BOOK3S_INTERRUPT_EXTERNAL</div><div class='del'>-	beq	1f</div><div class='del'>-	cmpwi	r12, BOOK3S_INTERRUPT_DECREMENTER</div><div class='del'>-	beq	1f</div><div class='del'>-	cmpwi	r12, BOOK3S_INTERRUPT_PERFMON</div><div class='del'>-1:	mtctr	r12</div><div class='del'>-</div><div class='ctx'> 	/* Register usage at this point:</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * R1       = host R1</div><div class='ctx'> 	 * R2       = host R2</div><div class='add'>+	 * R10      = raw exit handler id</div><div class='ctx'> 	 * R12      = exit handler id</div><div class='ctx'> 	 * R13      = shadow vcpu (32-bit) or PACA (64-bit)</div><div class='ctx'> 	 * SVCPU.*  = guest *</div><div class='hunk'>@@ -342,12 +344,25 @@ no_dcbz32_off:</div><div class='ctx'> 	PPC_LL	r6, HSTATE_HOST_MSR(r13)</div><div class='ctx'> 	PPC_LL	r8, HSTATE_VMHANDLER(r13)</div><div class='ctx'> </div><div class='del'>-	/* Restore host msr -&gt; SRR1 */</div><div class='add'>+#ifdef CONFIG_PPC64</div><div class='add'>+BEGIN_FTR_SECTION</div><div class='add'>+	beq	cr1, 1f</div><div class='add'>+	mtspr	SPRN_HSRR1, r6</div><div class='add'>+	mtspr	SPRN_HSRR0, r8</div><div class='add'>+END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)</div><div class='add'>+#endif</div><div class='add'>+1:	/* Restore host msr -&gt; SRR1 */</div><div class='ctx'> 	mtsrr1	r6</div><div class='ctx'> 	/* Load highmem handler address */</div><div class='ctx'> 	mtsrr0	r8</div><div class='ctx'> </div><div class='ctx'> 	/* RFI into the highmem handler, or jump to interrupt handler */</div><div class='del'>-	beqctr</div><div class='add'>+	cmpwi	r12, BOOK3S_INTERRUPT_EXTERNAL</div><div class='add'>+	beqa	BOOK3S_INTERRUPT_EXTERNAL</div><div class='add'>+	cmpwi	r12, BOOK3S_INTERRUPT_DECREMENTER</div><div class='add'>+	beqa	BOOK3S_INTERRUPT_DECREMENTER</div><div class='add'>+	cmpwi	r12, BOOK3S_INTERRUPT_PERFMON</div><div class='add'>+	beqa	BOOK3S_INTERRUPT_PERFMON</div><div class='add'>+</div><div class='ctx'> 	RFI</div><div class='ctx'> kvmppc_handler_trampoline_exit_end:</div><div class='head'>diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c<br/>index ee9e1ee9c858..72f13f4a06e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/booke.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/booke.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/booke.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/booke.c</a></div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Authors: Hollis Blanchard &lt;hollisb@us.ibm.com&gt;</div><div class='ctx'>  *          Christian Ehrhardt &lt;ehrhardt@linux.vnet.ibm.com&gt;</div><div class='add'>+ *          Scott Wood &lt;scottwood@freescale.com&gt;</div><div class='add'>+ *          Varun Sethi &lt;varun.sethi@freescale.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='hunk'>@@ -30,9 +32,12 @@</div><div class='ctx'> #include &lt;asm/cputable.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_ppc.h&gt;</div><div class='del'>-#include "timing.h"</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/dbell.h&gt;</div><div class='add'>+#include &lt;asm/hw_irq.h&gt;</div><div class='add'>+#include &lt;asm/irq.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "timing.h"</div><div class='ctx'> #include "booke.h"</div><div class='ctx'> </div><div class='ctx'> unsigned long kvmppc_booke_handlers;</div><div class='hunk'>@@ -55,6 +60,8 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {</div><div class='ctx'> 	{ "dec",        VCPU_STAT(dec_exits) },</div><div class='ctx'> 	{ "ext_intr",   VCPU_STAT(ext_intr_exits) },</div><div class='ctx'> 	{ "halt_wakeup", VCPU_STAT(halt_wakeup) },</div><div class='add'>+	{ "doorbell", VCPU_STAT(dbell_exits) },</div><div class='add'>+	{ "guest doorbell", VCPU_STAT(gdbell_exits) },</div><div class='ctx'> 	{ NULL }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -121,6 +128,10 @@ void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)</div><div class='ctx'> {</div><div class='ctx'> 	u32 old_msr = vcpu-&gt;arch.shared-&gt;msr;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	new_msr |= MSR_GS;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	vcpu-&gt;arch.shared-&gt;msr = new_msr;</div><div class='ctx'> </div><div class='ctx'> 	kvmppc_mmu_msr_notify(vcpu, old_msr);</div><div class='hunk'>@@ -195,17 +206,87 @@ void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &amp;vcpu-&gt;arch.pending_exceptions);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	mtspr(SPRN_GSRR0, srr0);</div><div class='add'>+	mtspr(SPRN_GSRR1, srr1);</div><div class='add'>+#else</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;srr0 = srr0;</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;srr1 = srr1;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)</div><div class='add'>+{</div><div class='add'>+	vcpu-&gt;arch.csrr0 = srr0;</div><div class='add'>+	vcpu-&gt;arch.csrr1 = srr1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)</div><div class='add'>+{</div><div class='add'>+	if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {</div><div class='add'>+		vcpu-&gt;arch.dsrr0 = srr0;</div><div class='add'>+		vcpu-&gt;arch.dsrr1 = srr1;</div><div class='add'>+	} else {</div><div class='add'>+		set_guest_csrr(vcpu, srr0, srr1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)</div><div class='add'>+{</div><div class='add'>+	vcpu-&gt;arch.mcsrr0 = srr0;</div><div class='add'>+	vcpu-&gt;arch.mcsrr1 = srr1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	return mfspr(SPRN_GDEAR);</div><div class='add'>+#else</div><div class='add'>+	return vcpu-&gt;arch.shared-&gt;dar;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	mtspr(SPRN_GDEAR, dear);</div><div class='add'>+#else</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;dar = dear;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	return mfspr(SPRN_GESR);</div><div class='add'>+#else</div><div class='add'>+	return vcpu-&gt;arch.shared-&gt;esr;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	mtspr(SPRN_GESR, esr);</div><div class='add'>+#else</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;esr = esr;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Deliver the interrupt of the corresponding priority, if possible. */</div><div class='ctx'> static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,</div><div class='ctx'>                                         unsigned int priority)</div><div class='ctx'> {</div><div class='ctx'> 	int allowed = 0;</div><div class='del'>-	ulong uninitialized_var(msr_mask);</div><div class='add'>+	ulong msr_mask = 0;</div><div class='ctx'> 	bool update_esr = false, update_dear = false;</div><div class='ctx'> 	ulong crit_raw = vcpu-&gt;arch.shared-&gt;critical;</div><div class='ctx'> 	ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);</div><div class='ctx'> 	bool crit;</div><div class='ctx'> 	bool keep_irq = false;</div><div class='add'>+	enum int_class int_class;</div><div class='ctx'> </div><div class='ctx'> 	/* Truncate crit indicators in 32 bit mode */</div><div class='ctx'> 	if (!(vcpu-&gt;arch.shared-&gt;msr &amp; MSR_SF)) {</div><div class='hunk'>@@ -241,46 +322,85 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	case BOOKE_IRQPRIO_AP_UNAVAIL:</div><div class='ctx'> 	case BOOKE_IRQPRIO_ALIGNMENT:</div><div class='ctx'> 		allowed = 1;</div><div class='del'>-		msr_mask = MSR_CE|MSR_ME|MSR_DE;</div><div class='add'>+		msr_mask = MSR_CE | MSR_ME | MSR_DE;</div><div class='add'>+		int_class = INT_CLASS_NONCRIT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BOOKE_IRQPRIO_CRITICAL:</div><div class='del'>-	case BOOKE_IRQPRIO_WATCHDOG:</div><div class='add'>+	case BOOKE_IRQPRIO_DBELL_CRIT:</div><div class='ctx'> 		allowed = vcpu-&gt;arch.shared-&gt;msr &amp; MSR_CE;</div><div class='add'>+		allowed = allowed &amp;&amp; !crit;</div><div class='ctx'> 		msr_mask = MSR_ME;</div><div class='add'>+		int_class = INT_CLASS_CRIT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BOOKE_IRQPRIO_MACHINE_CHECK:</div><div class='ctx'> 		allowed = vcpu-&gt;arch.shared-&gt;msr &amp; MSR_ME;</div><div class='del'>-		msr_mask = 0;</div><div class='add'>+		allowed = allowed &amp;&amp; !crit;</div><div class='add'>+		int_class = INT_CLASS_MC;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BOOKE_IRQPRIO_DECREMENTER:</div><div class='ctx'> 	case BOOKE_IRQPRIO_FIT:</div><div class='ctx'> 		keep_irq = true;</div><div class='ctx'> 		/* fall through */</div><div class='ctx'> 	case BOOKE_IRQPRIO_EXTERNAL:</div><div class='add'>+	case BOOKE_IRQPRIO_DBELL:</div><div class='ctx'> 		allowed = vcpu-&gt;arch.shared-&gt;msr &amp; MSR_EE;</div><div class='ctx'> 		allowed = allowed &amp;&amp; !crit;</div><div class='del'>-		msr_mask = MSR_CE|MSR_ME|MSR_DE;</div><div class='add'>+		msr_mask = MSR_CE | MSR_ME | MSR_DE;</div><div class='add'>+		int_class = INT_CLASS_NONCRIT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BOOKE_IRQPRIO_DEBUG:</div><div class='ctx'> 		allowed = vcpu-&gt;arch.shared-&gt;msr &amp; MSR_DE;</div><div class='add'>+		allowed = allowed &amp;&amp; !crit;</div><div class='ctx'> 		msr_mask = MSR_ME;</div><div class='add'>+		int_class = INT_CLASS_CRIT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (allowed) {</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;srr0 = vcpu-&gt;arch.pc;</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;srr1 = vcpu-&gt;arch.shared-&gt;msr;</div><div class='add'>+		switch (int_class) {</div><div class='add'>+		case INT_CLASS_NONCRIT:</div><div class='add'>+			set_guest_srr(vcpu, vcpu-&gt;arch.pc,</div><div class='add'>+				      vcpu-&gt;arch.shared-&gt;msr);</div><div class='add'>+			break;</div><div class='add'>+		case INT_CLASS_CRIT:</div><div class='add'>+			set_guest_csrr(vcpu, vcpu-&gt;arch.pc,</div><div class='add'>+				       vcpu-&gt;arch.shared-&gt;msr);</div><div class='add'>+			break;</div><div class='add'>+		case INT_CLASS_DBG:</div><div class='add'>+			set_guest_dsrr(vcpu, vcpu-&gt;arch.pc,</div><div class='add'>+				       vcpu-&gt;arch.shared-&gt;msr);</div><div class='add'>+			break;</div><div class='add'>+		case INT_CLASS_MC:</div><div class='add'>+			set_guest_mcsrr(vcpu, vcpu-&gt;arch.pc,</div><div class='add'>+					vcpu-&gt;arch.shared-&gt;msr);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		vcpu-&gt;arch.pc = vcpu-&gt;arch.ivpr | vcpu-&gt;arch.ivor[priority];</div><div class='ctx'> 		if (update_esr == true)</div><div class='del'>-			vcpu-&gt;arch.shared-&gt;esr = vcpu-&gt;arch.queued_esr;</div><div class='add'>+			set_guest_esr(vcpu, vcpu-&gt;arch.queued_esr);</div><div class='ctx'> 		if (update_dear == true)</div><div class='del'>-			vcpu-&gt;arch.shared-&gt;dar = vcpu-&gt;arch.queued_dear;</div><div class='add'>+			set_guest_dear(vcpu, vcpu-&gt;arch.queued_dear);</div><div class='ctx'> 		kvmppc_set_msr(vcpu, vcpu-&gt;arch.shared-&gt;msr &amp; msr_mask);</div><div class='ctx'> </div><div class='ctx'> 		if (!keep_irq)</div><div class='ctx'> 			clear_bit(priority, &amp;vcpu-&gt;arch.pending_exceptions);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	/*</div><div class='add'>+	 * If an interrupt is pending but masked, raise a guest doorbell</div><div class='add'>+	 * so that we are notified when the guest enables the relevant</div><div class='add'>+	 * MSR bit.</div><div class='add'>+	 */</div><div class='add'>+	if (vcpu-&gt;arch.pending_exceptions &amp; BOOKE_IRQMASK_EE)</div><div class='add'>+		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);</div><div class='add'>+	if (vcpu-&gt;arch.pending_exceptions &amp; BOOKE_IRQMASK_CE)</div><div class='add'>+		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);</div><div class='add'>+	if (vcpu-&gt;arch.pending_exceptions &amp; BOOKE_IRQPRIO_MACHINE_CHECK)</div><div class='add'>+		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	return allowed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -305,7 +425,7 @@ static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	priority = __ffs(*pending);</div><div class='del'>-	while (priority &lt;= BOOKE_IRQPRIO_MAX) {</div><div class='add'>+	while (priority &lt; BOOKE_IRQPRIO_MAX) {</div><div class='ctx'> 		if (kvmppc_booke_irqprio_deliver(vcpu, priority))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -319,8 +439,9 @@ static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Check pending exceptions and deliver one, if possible. */</div><div class='del'>-void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)</div><div class='add'>+int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	int r = 0;</div><div class='ctx'> 	WARN_ON_ONCE(!irqs_disabled());</div><div class='ctx'> </div><div class='ctx'> 	kvmppc_core_check_exceptions(vcpu);</div><div class='hunk'>@@ -328,16 +449,60 @@ void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (vcpu-&gt;arch.shared-&gt;msr &amp; MSR_WE) {</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> 		kvm_vcpu_block(vcpu);</div><div class='add'>+		clear_bit(KVM_REQ_UNHALT, &amp;vcpu-&gt;requests);</div><div class='ctx'> 		local_irq_disable();</div><div class='ctx'> </div><div class='ctx'> 		kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);</div><div class='del'>-		kvmppc_core_check_exceptions(vcpu);</div><div class='add'>+		r = 1;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Common checks before entering the guest world.  Call with interrupts</div><div class='add'>+ * disabled.</div><div class='add'>+ *</div><div class='add'>+ * returns !0 if a signal is pending and check_signal is true</div><div class='add'>+ */</div><div class='add'>+static int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	int r = 0;</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(!irqs_disabled());</div><div class='add'>+	while (true) {</div><div class='add'>+		if (need_resched()) {</div><div class='add'>+			local_irq_enable();</div><div class='add'>+			cond_resched();</div><div class='add'>+			local_irq_disable();</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (signal_pending(current)) {</div><div class='add'>+			r = 1;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (kvmppc_core_prepare_to_enter(vcpu)) {</div><div class='add'>+			/* interrupts got enabled in between, so we</div><div class='add'>+			   are back at square 1 */</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='add'>+#ifdef CONFIG_PPC_FPU</div><div class='add'>+	unsigned int fpscr;</div><div class='add'>+	int fpexc_mode;</div><div class='add'>+	u64 fpr[32];</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	if (!vcpu-&gt;arch.sane) {</div><div class='ctx'> 		kvm_run-&gt;exit_reason = KVM_EXIT_INTERNAL_ERROR;</div><div class='hunk'>@@ -345,17 +510,53 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	local_irq_disable();</div><div class='del'>-</div><div class='del'>-	kvmppc_core_prepare_to_enter(vcpu);</div><div class='del'>-</div><div class='del'>-	if (signal_pending(current)) {</div><div class='add'>+	if (kvmppc_prepare_to_enter(vcpu)) {</div><div class='ctx'> 		kvm_run-&gt;exit_reason = KVM_EXIT_INTR;</div><div class='ctx'> 		ret = -EINTR;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kvm_guest_enter();</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PPC_FPU</div><div class='add'>+	/* Save userspace FPU state in stack */</div><div class='add'>+	enable_kernel_fp();</div><div class='add'>+	memcpy(fpr, current-&gt;thread.fpr, sizeof(current-&gt;thread.fpr));</div><div class='add'>+	fpscr = current-&gt;thread.fpscr.val;</div><div class='add'>+	fpexc_mode = current-&gt;thread.fpexc_mode;</div><div class='add'>+</div><div class='add'>+	/* Restore guest FPU state to thread */</div><div class='add'>+	memcpy(current-&gt;thread.fpr, vcpu-&gt;arch.fpr, sizeof(vcpu-&gt;arch.fpr));</div><div class='add'>+	current-&gt;thread.fpscr.val = vcpu-&gt;arch.fpscr;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Since we can't trap on MSR_FP in GS-mode, we consider the guest</div><div class='add'>+	 * as always using the FPU.  Kernel usage of FP (via</div><div class='add'>+	 * enable_kernel_fp()) in this thread must not occur while</div><div class='add'>+	 * vcpu-&gt;fpu_active is set.</div><div class='add'>+	 */</div><div class='add'>+	vcpu-&gt;fpu_active = 1;</div><div class='add'>+</div><div class='add'>+	kvmppc_load_guest_fp(vcpu);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	ret = __kvmppc_vcpu_run(kvm_run, vcpu);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PPC_FPU</div><div class='add'>+	kvmppc_save_guest_fp(vcpu);</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;fpu_active = 0;</div><div class='add'>+</div><div class='add'>+	/* Save guest FPU state from thread */</div><div class='add'>+	memcpy(vcpu-&gt;arch.fpr, current-&gt;thread.fpr, sizeof(vcpu-&gt;arch.fpr));</div><div class='add'>+	vcpu-&gt;arch.fpscr = current-&gt;thread.fpscr.val;</div><div class='add'>+</div><div class='add'>+	/* Restore userspace FPU state from stack */</div><div class='add'>+	memcpy(current-&gt;thread.fpr, fpr, sizeof(current-&gt;thread.fpr));</div><div class='add'>+	current-&gt;thread.fpscr.val = fpscr;</div><div class='add'>+	current-&gt;thread.fpexc_mode = fpexc_mode;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	kvm_guest_exit();</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -363,6 +564,84 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	enum emulation_result er;</div><div class='add'>+</div><div class='add'>+	er = kvmppc_emulate_instruction(run, vcpu);</div><div class='add'>+	switch (er) {</div><div class='add'>+	case EMULATE_DONE:</div><div class='add'>+		/* don't overwrite subtypes, just account kvm_stats */</div><div class='add'>+		kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);</div><div class='add'>+		/* Future optimization: only reload non-volatiles if</div><div class='add'>+		 * they were actually modified by emulation. */</div><div class='add'>+		return RESUME_GUEST_NV;</div><div class='add'>+</div><div class='add'>+	case EMULATE_DO_DCR:</div><div class='add'>+		run-&gt;exit_reason = KVM_EXIT_DCR;</div><div class='add'>+		return RESUME_HOST;</div><div class='add'>+</div><div class='add'>+	case EMULATE_FAIL:</div><div class='add'>+		printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",</div><div class='add'>+		       __func__, vcpu-&gt;arch.pc, vcpu-&gt;arch.last_inst);</div><div class='add'>+		/* For debugging, encode the failing instruction and</div><div class='add'>+		 * report it to userspace. */</div><div class='add'>+		run-&gt;hw.hardware_exit_reason = ~0ULL &lt;&lt; 32;</div><div class='add'>+		run-&gt;hw.hardware_exit_reason |= vcpu-&gt;arch.last_inst;</div><div class='add'>+		kvmppc_core_queue_program(vcpu, ESR_PIL);</div><div class='add'>+		return RESUME_HOST;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvmppc_fill_pt_regs(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	ulong r1, ip, msr, lr;</div><div class='add'>+</div><div class='add'>+	asm("mr %0, 1" : "=r"(r1));</div><div class='add'>+	asm("mflr %0" : "=r"(lr));</div><div class='add'>+	asm("mfmsr %0" : "=r"(msr));</div><div class='add'>+	asm("bl 1f; 1: mflr %0" : "=r"(ip));</div><div class='add'>+</div><div class='add'>+	memset(regs, 0, sizeof(*regs));</div><div class='add'>+	regs-&gt;gpr[1] = r1;</div><div class='add'>+	regs-&gt;nip = ip;</div><div class='add'>+	regs-&gt;msr = msr;</div><div class='add'>+	regs-&gt;link = lr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,</div><div class='add'>+				     unsigned int exit_nr)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs regs;</div><div class='add'>+</div><div class='add'>+	switch (exit_nr) {</div><div class='add'>+	case BOOKE_INTERRUPT_EXTERNAL:</div><div class='add'>+		kvmppc_fill_pt_regs(&amp;regs);</div><div class='add'>+		do_IRQ(&amp;regs);</div><div class='add'>+		break;</div><div class='add'>+	case BOOKE_INTERRUPT_DECREMENTER:</div><div class='add'>+		kvmppc_fill_pt_regs(&amp;regs);</div><div class='add'>+		timer_interrupt(&amp;regs);</div><div class='add'>+		break;</div><div class='add'>+#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)</div><div class='add'>+	case BOOKE_INTERRUPT_DOORBELL:</div><div class='add'>+		kvmppc_fill_pt_regs(&amp;regs);</div><div class='add'>+		doorbell_exception(&amp;regs);</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='add'>+	case BOOKE_INTERRUPT_MACHINE_CHECK:</div><div class='add'>+		/* FIXME */</div><div class='add'>+		break;</div><div class='add'>+	case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:</div><div class='add'>+		kvmppc_fill_pt_regs(&amp;regs);</div><div class='add'>+		performance_monitor_exception(&amp;regs);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * kvmppc_handle_exit</div><div class='ctx'>  *</div><div class='hunk'>@@ -371,12 +650,14 @@ out:</div><div class='ctx'> int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'>                        unsigned int exit_nr)</div><div class='ctx'> {</div><div class='del'>-	enum emulation_result er;</div><div class='ctx'> 	int r = RESUME_HOST;</div><div class='ctx'> </div><div class='ctx'> 	/* update before a new last_exit_type is rewritten */</div><div class='ctx'> 	kvmppc_update_timing_stats(vcpu);</div><div class='ctx'> </div><div class='add'>+	/* restart interrupts if they were meant for the host */</div><div class='add'>+	kvmppc_restart_interrupt(vcpu, exit_nr);</div><div class='add'>+</div><div class='ctx'> 	local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	run-&gt;exit_reason = KVM_EXIT_UNKNOWN;</div><div class='hunk'>@@ -386,62 +667,74 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 	case BOOKE_INTERRUPT_MACHINE_CHECK:</div><div class='ctx'> 		printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));</div><div class='ctx'> 		kvmppc_dump_vcpu(vcpu);</div><div class='add'>+		/* For debugging, send invalid exit reason to user space */</div><div class='add'>+		run-&gt;hw.hardware_exit_reason = ~1ULL &lt;&lt; 32;</div><div class='add'>+		run-&gt;hw.hardware_exit_reason |= mfspr(SPRN_MCSR);</div><div class='ctx'> 		r = RESUME_HOST;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case BOOKE_INTERRUPT_EXTERNAL:</div><div class='ctx'> 		kvmppc_account_exit(vcpu, EXT_INTR_EXITS);</div><div class='del'>-		if (need_resched())</div><div class='del'>-			cond_resched();</div><div class='ctx'> 		r = RESUME_GUEST;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case BOOKE_INTERRUPT_DECREMENTER:</div><div class='del'>-		/* Since we switched IVPR back to the host's value, the host</div><div class='del'>-		 * handled this interrupt the moment we enabled interrupts.</div><div class='del'>-		 * Now we just offer it a chance to reschedule the guest. */</div><div class='ctx'> 		kvmppc_account_exit(vcpu, DEC_EXITS);</div><div class='del'>-		if (need_resched())</div><div class='del'>-			cond_resched();</div><div class='ctx'> 		r = RESUME_GUEST;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case BOOKE_INTERRUPT_DOORBELL:</div><div class='add'>+		kvmppc_account_exit(vcpu, DBELL_EXITS);</div><div class='add'>+		r = RESUME_GUEST;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:</div><div class='add'>+		kvmppc_account_exit(vcpu, GDBELL_EXITS);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We are here because there is a pending guest interrupt</div><div class='add'>+		 * which could not be delivered as MSR_CE or MSR_ME was not</div><div class='add'>+		 * set.  Once we break from here we will retry delivery.</div><div class='add'>+		 */</div><div class='add'>+		r = RESUME_GUEST;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BOOKE_INTERRUPT_GUEST_DBELL:</div><div class='add'>+		kvmppc_account_exit(vcpu, GDBELL_EXITS);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We are here because there is a pending guest interrupt</div><div class='add'>+		 * which could not be delivered as MSR_EE was not set.  Once</div><div class='add'>+		 * we break from here we will retry delivery.</div><div class='add'>+		 */</div><div class='add'>+		r = RESUME_GUEST;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:</div><div class='add'>+		r = RESUME_GUEST;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BOOKE_INTERRUPT_HV_PRIV:</div><div class='add'>+		r = emulation_exit(run, vcpu);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case BOOKE_INTERRUPT_PROGRAM:</div><div class='del'>-		if (vcpu-&gt;arch.shared-&gt;msr &amp; MSR_PR) {</div><div class='del'>-			/* Program traps generated by user-level software must be handled</div><div class='del'>-			 * by the guest kernel. */</div><div class='add'>+		if (vcpu-&gt;arch.shared-&gt;msr &amp; (MSR_PR | MSR_GS)) {</div><div class='add'>+			/*</div><div class='add'>+			 * Program traps generated by user-level software must</div><div class='add'>+			 * be handled by the guest kernel.</div><div class='add'>+			 *</div><div class='add'>+			 * In GS mode, hypervisor privileged instructions trap</div><div class='add'>+			 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are</div><div class='add'>+			 * actual program interrupts, handled by the guest.</div><div class='add'>+			 */</div><div class='ctx'> 			kvmppc_core_queue_program(vcpu, vcpu-&gt;arch.fault_esr);</div><div class='ctx'> 			r = RESUME_GUEST;</div><div class='ctx'> 			kvmppc_account_exit(vcpu, USR_PR_INST);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		er = kvmppc_emulate_instruction(run, vcpu);</div><div class='del'>-		switch (er) {</div><div class='del'>-		case EMULATE_DONE:</div><div class='del'>-			/* don't overwrite subtypes, just account kvm_stats */</div><div class='del'>-			kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);</div><div class='del'>-			/* Future optimization: only reload non-volatiles if</div><div class='del'>-			 * they were actually modified by emulation. */</div><div class='del'>-			r = RESUME_GUEST_NV;</div><div class='del'>-			break;</div><div class='del'>-		case EMULATE_DO_DCR:</div><div class='del'>-			run-&gt;exit_reason = KVM_EXIT_DCR;</div><div class='del'>-			r = RESUME_HOST;</div><div class='del'>-			break;</div><div class='del'>-		case EMULATE_FAIL:</div><div class='del'>-			/* XXX Deliver Program interrupt to guest. */</div><div class='del'>-			printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",</div><div class='del'>-			       __func__, vcpu-&gt;arch.pc, vcpu-&gt;arch.last_inst);</div><div class='del'>-			/* For debugging, encode the failing instruction and</div><div class='del'>-			 * report it to userspace. */</div><div class='del'>-			run-&gt;hw.hardware_exit_reason = ~0ULL &lt;&lt; 32;</div><div class='del'>-			run-&gt;hw.hardware_exit_reason |= vcpu-&gt;arch.last_inst;</div><div class='del'>-			r = RESUME_HOST;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			BUG();</div><div class='del'>-		}</div><div class='add'>+		r = emulation_exit(run, vcpu);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case BOOKE_INTERRUPT_FP_UNAVAIL:</div><div class='hunk'>@@ -506,6 +799,21 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 		r = RESUME_GUEST;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	case BOOKE_INTERRUPT_HV_SYSCALL:</div><div class='add'>+		if (!(vcpu-&gt;arch.shared-&gt;msr &amp; MSR_PR)) {</div><div class='add'>+			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));</div><div class='add'>+		} else {</div><div class='add'>+			/*</div><div class='add'>+			 * hcall from guest userspace -- send privileged</div><div class='add'>+			 * instruction program check.</div><div class='add'>+			 */</div><div class='add'>+			kvmppc_core_queue_program(vcpu, ESR_PPR);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		r = RESUME_GUEST;</div><div class='add'>+		break;</div><div class='add'>+#else</div><div class='ctx'> 	case BOOKE_INTERRUPT_SYSCALL:</div><div class='ctx'> 		if (!(vcpu-&gt;arch.shared-&gt;msr &amp; MSR_PR) &amp;&amp;</div><div class='ctx'> 		    (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {</div><div class='hunk'>@@ -519,6 +827,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 		kvmppc_account_exit(vcpu, SYSCALL_EXITS);</div><div class='ctx'> 		r = RESUME_GUEST;</div><div class='ctx'> 		break;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	case BOOKE_INTERRUPT_DTLB_MISS: {</div><div class='ctx'> 		unsigned long eaddr = vcpu-&gt;arch.fault_dear;</div><div class='hunk'>@@ -526,7 +835,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 		gpa_t gpaddr;</div><div class='ctx'> 		gfn_t gfn;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_KVM_E500</div><div class='add'>+#ifdef CONFIG_KVM_E500V2</div><div class='ctx'> 		if (!(vcpu-&gt;arch.shared-&gt;msr &amp; MSR_PR) &amp;&amp;</div><div class='ctx'> 		    (eaddr &amp; PAGE_MASK) == vcpu-&gt;arch.magic_page_ea) {</div><div class='ctx'> 			kvmppc_map_magic(vcpu);</div><div class='hunk'>@@ -567,6 +876,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 			/* Guest has mapped and accessed a page which is not</div><div class='ctx'> 			 * actually RAM. */</div><div class='ctx'> 			vcpu-&gt;arch.paddr_accessed = gpaddr;</div><div class='add'>+			vcpu-&gt;arch.vaddr_accessed = eaddr;</div><div class='ctx'> 			r = kvmppc_emulate_mmio(run, vcpu);</div><div class='ctx'> 			kvmppc_account_exit(vcpu, MMIO_EXITS);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -634,15 +944,13 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	local_irq_disable();</div><div class='del'>-</div><div class='del'>-	kvmppc_core_prepare_to_enter(vcpu);</div><div class='del'>-</div><div class='add'>+	/*</div><div class='add'>+	 * To avoid clobbering exit_reason, only check for signals if we</div><div class='add'>+	 * aren't already exiting to userspace for some other reason.</div><div class='add'>+	 */</div><div class='ctx'> 	if (!(r &amp; RESUME_HOST)) {</div><div class='del'>-		/* To avoid clobbering exit_reason, only check for signals if</div><div class='del'>-		 * we aren't already exiting to userspace for some other</div><div class='del'>-		 * reason. */</div><div class='del'>-		if (signal_pending(current)) {</div><div class='add'>+		local_irq_disable();</div><div class='add'>+		if (kvmppc_prepare_to_enter(vcpu)) {</div><div class='ctx'> 			run-&gt;exit_reason = KVM_EXIT_INTR;</div><div class='ctx'> 			r = (-EINTR &lt;&lt; 2) | RESUME_HOST | (r &amp; RESUME_FLAG_NV);</div><div class='ctx'> 			kvmppc_account_exit(vcpu, SIGNAL_EXITS);</div><div class='hunk'>@@ -659,12 +967,15 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.pc = 0;</div><div class='del'>-	vcpu-&gt;arch.shared-&gt;msr = 0;</div><div class='del'>-	vcpu-&gt;arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;</div><div class='ctx'> 	vcpu-&gt;arch.shared-&gt;pir = vcpu-&gt;vcpu_id;</div><div class='ctx'> 	kvmppc_set_gpr(vcpu, 1, (16&lt;&lt;20) - 8); /* -8 for the callee-save LR slot */</div><div class='add'>+	kvmppc_set_msr(vcpu, 0);</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	vcpu-&gt;arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;</div><div class='ctx'> 	vcpu-&gt;arch.shadow_pid = 1;</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;msr = 0;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/* Eye-catching numbers so we know if the guest takes an interrupt</div><div class='ctx'> 	 * before it's programmed its own IVPR/IVORs. */</div><div class='hunk'>@@ -745,8 +1056,8 @@ static void get_sregs_base(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	sregs-&gt;u.e.csrr0 = vcpu-&gt;arch.csrr0;</div><div class='ctx'> 	sregs-&gt;u.e.csrr1 = vcpu-&gt;arch.csrr1;</div><div class='ctx'> 	sregs-&gt;u.e.mcsr = vcpu-&gt;arch.mcsr;</div><div class='del'>-	sregs-&gt;u.e.esr = vcpu-&gt;arch.shared-&gt;esr;</div><div class='del'>-	sregs-&gt;u.e.dear = vcpu-&gt;arch.shared-&gt;dar;</div><div class='add'>+	sregs-&gt;u.e.esr = get_guest_esr(vcpu);</div><div class='add'>+	sregs-&gt;u.e.dear = get_guest_dear(vcpu);</div><div class='ctx'> 	sregs-&gt;u.e.tsr = vcpu-&gt;arch.tsr;</div><div class='ctx'> 	sregs-&gt;u.e.tcr = vcpu-&gt;arch.tcr;</div><div class='ctx'> 	sregs-&gt;u.e.dec = kvmppc_get_dec(vcpu, tb);</div><div class='hunk'>@@ -763,8 +1074,8 @@ static int set_sregs_base(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	vcpu-&gt;arch.csrr0 = sregs-&gt;u.e.csrr0;</div><div class='ctx'> 	vcpu-&gt;arch.csrr1 = sregs-&gt;u.e.csrr1;</div><div class='ctx'> 	vcpu-&gt;arch.mcsr = sregs-&gt;u.e.mcsr;</div><div class='del'>-	vcpu-&gt;arch.shared-&gt;esr = sregs-&gt;u.e.esr;</div><div class='del'>-	vcpu-&gt;arch.shared-&gt;dar = sregs-&gt;u.e.dear;</div><div class='add'>+	set_guest_esr(vcpu, sregs-&gt;u.e.esr);</div><div class='add'>+	set_guest_dear(vcpu, sregs-&gt;u.e.dear);</div><div class='ctx'> 	vcpu-&gt;arch.vrsave = sregs-&gt;u.e.vrsave;</div><div class='ctx'> 	kvmppc_set_tcr(vcpu, sregs-&gt;u.e.tcr);</div><div class='ctx'> </div><div class='hunk'>@@ -932,15 +1243,6 @@ void kvmppc_core_commit_memory_region(struct kvm *kvm,</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvmppc_core_init_vm(struct kvm *kvm)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void kvmppc_core_destroy_vm(struct kvm *kvm)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)</div><div class='ctx'> {</div><div class='ctx'> 	vcpu-&gt;arch.tcr = new_tcr;</div><div class='hunk'>@@ -968,8 +1270,19 @@ void kvmppc_decrementer_func(unsigned long data)</div><div class='ctx'> 	kvmppc_set_tsr_bits(vcpu, TSR_DIS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='add'>+{</div><div class='add'>+	current-&gt;thread.kvm_vcpu = vcpu;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	current-&gt;thread.kvm_vcpu = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int __init kvmppc_booke_init(void)</div><div class='ctx'> {</div><div class='add'>+#ifndef CONFIG_KVM_BOOKE_HV</div><div class='ctx'> 	unsigned long ivor[16];</div><div class='ctx'> 	unsigned long max_ivor = 0;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1012,7 +1325,7 @@ int __init kvmppc_booke_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> 	flush_icache_range(kvmppc_booke_handlers,</div><div class='ctx'> 	                   kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);</div><div class='del'>-</div><div class='add'>+#endif /* !BOOKE_HV */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/booke.h b/arch/powerpc/kvm/booke.h<br/>index 2fe202705a3f..ba61974c1e20 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/booke.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/booke.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/booke.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/booke.h</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_ppc.h&gt;</div><div class='add'>+#include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include "timing.h"</div><div class='ctx'> </div><div class='ctx'> /* interrupt priortity ordering */</div><div class='hunk'>@@ -48,7 +49,20 @@</div><div class='ctx'> #define BOOKE_IRQPRIO_PERFORMANCE_MONITOR 19</div><div class='ctx'> /* Internal pseudo-irqprio for level triggered externals */</div><div class='ctx'> #define BOOKE_IRQPRIO_EXTERNAL_LEVEL 20</div><div class='del'>-#define BOOKE_IRQPRIO_MAX 20</div><div class='add'>+#define BOOKE_IRQPRIO_DBELL 21</div><div class='add'>+#define BOOKE_IRQPRIO_DBELL_CRIT 22</div><div class='add'>+#define BOOKE_IRQPRIO_MAX 23</div><div class='add'>+</div><div class='add'>+#define BOOKE_IRQMASK_EE ((1 &lt;&lt; BOOKE_IRQPRIO_EXTERNAL_LEVEL) | \</div><div class='add'>+			  (1 &lt;&lt; BOOKE_IRQPRIO_PERFORMANCE_MONITOR) | \</div><div class='add'>+			  (1 &lt;&lt; BOOKE_IRQPRIO_DBELL) | \</div><div class='add'>+			  (1 &lt;&lt; BOOKE_IRQPRIO_DECREMENTER) | \</div><div class='add'>+			  (1 &lt;&lt; BOOKE_IRQPRIO_FIT) | \</div><div class='add'>+			  (1 &lt;&lt; BOOKE_IRQPRIO_EXTERNAL))</div><div class='add'>+</div><div class='add'>+#define BOOKE_IRQMASK_CE ((1 &lt;&lt; BOOKE_IRQPRIO_DBELL_CRIT) | \</div><div class='add'>+			  (1 &lt;&lt; BOOKE_IRQPRIO_WATCHDOG) | \</div><div class='add'>+			  (1 &lt;&lt; BOOKE_IRQPRIO_CRITICAL))</div><div class='ctx'> </div><div class='ctx'> extern unsigned long kvmppc_booke_handlers;</div><div class='ctx'> </div><div class='hunk'>@@ -61,8 +75,8 @@ void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits);</div><div class='ctx'> </div><div class='ctx'> int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'>                             unsigned int inst, int *advance);</div><div class='del'>-int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt);</div><div class='del'>-int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs);</div><div class='add'>+int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val);</div><div class='add'>+int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val);</div><div class='ctx'> </div><div class='ctx'> /* low-level asm code to transfer guest state */</div><div class='ctx'> void kvmppc_load_guest_spe(struct kvm_vcpu *vcpu);</div><div class='hunk'>@@ -71,4 +85,46 @@ void kvmppc_save_guest_spe(struct kvm_vcpu *vcpu);</div><div class='ctx'> /* high-level function, manages flags, host state */</div><div class='ctx'> void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='add'>+void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu);</div><div class='add'>+void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu);</div><div class='add'>+</div><div class='add'>+enum int_class {</div><div class='add'>+	INT_CLASS_NONCRIT,</div><div class='add'>+	INT_CLASS_CRIT,</div><div class='add'>+	INT_CLASS_MC,</div><div class='add'>+	INT_CLASS_DBG,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void kvmppc_set_pending_interrupt(struct kvm_vcpu *vcpu, enum int_class type);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Load up guest vcpu FP state if it's needed.</div><div class='add'>+ * It also set the MSR_FP in thread so that host know</div><div class='add'>+ * we're holding FPU, and then host can help to save</div><div class='add'>+ * guest vcpu FP state if other threads require to use FPU.</div><div class='add'>+ * This simulates an FP unavailable fault.</div><div class='add'>+ *</div><div class='add'>+ * It requires to be called with preemption disabled.</div><div class='add'>+ */</div><div class='add'>+static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_PPC_FPU</div><div class='add'>+	if (vcpu-&gt;fpu_active &amp;&amp; !(current-&gt;thread.regs-&gt;msr &amp; MSR_FP)) {</div><div class='add'>+		load_up_fpu();</div><div class='add'>+		current-&gt;thread.regs-&gt;msr |= MSR_FP;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Save guest vcpu FP state into thread.</div><div class='add'>+ * It requires to be called with preemption disabled.</div><div class='add'>+ */</div><div class='add'>+static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_PPC_FPU</div><div class='add'>+	if (vcpu-&gt;fpu_active &amp;&amp; (current-&gt;thread.regs-&gt;msr &amp; MSR_FP))</div><div class='add'>+		giveup_fpu(current);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='ctx'> #endif /* __KVM_BOOKE_H__ */</div><div class='head'>diff --git a/arch/powerpc/kvm/booke_emulate.c b/arch/powerpc/kvm/booke_emulate.c<br/>index 3e652da36534..6c76397f2af4 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/booke_emulate.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/booke_emulate.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/booke_emulate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/booke_emulate.c</a></div><div class='hunk'>@@ -40,8 +40,8 @@ int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'>                             unsigned int inst, int *advance)</div><div class='ctx'> {</div><div class='ctx'> 	int emulated = EMULATE_DONE;</div><div class='del'>-	int rs;</div><div class='del'>-	int rt;</div><div class='add'>+	int rs = get_rs(inst);</div><div class='add'>+	int rt = get_rt(inst);</div><div class='ctx'> </div><div class='ctx'> 	switch (get_op(inst)) {</div><div class='ctx'> 	case 19:</div><div class='hunk'>@@ -62,19 +62,16 @@ int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 		switch (get_xop(inst)) {</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_MFMSR:</div><div class='del'>-			rt = get_rt(inst);</div><div class='ctx'> 			kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;msr);</div><div class='ctx'> 			kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_MTMSR:</div><div class='del'>-			rs = get_rs(inst);</div><div class='ctx'> 			kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);</div><div class='ctx'> 			kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs));</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_WRTEE:</div><div class='del'>-			rs = get_rs(inst);</div><div class='ctx'> 			vcpu-&gt;arch.shared-&gt;msr = (vcpu-&gt;arch.shared-&gt;msr &amp; ~MSR_EE)</div><div class='ctx'> 					| (kvmppc_get_gpr(vcpu, rs) &amp; MSR_EE);</div><div class='ctx'> 			kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);</div><div class='hunk'>@@ -99,22 +96,32 @@ int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 	return emulated;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)</div><div class='add'>+/*</div><div class='add'>+ * NOTE: some of these registers are not emulated on BOOKE_HV (GS-mode).</div><div class='add'>+ * Their backing store is in real registers, and these functions</div><div class='add'>+ * will return the wrong result if called for them in another context</div><div class='add'>+ * (such as debugging).</div><div class='add'>+ */</div><div class='add'>+int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)</div><div class='ctx'> {</div><div class='ctx'> 	int emulated = EMULATE_DONE;</div><div class='del'>-	ulong spr_val = kvmppc_get_gpr(vcpu, rs);</div><div class='ctx'> </div><div class='ctx'> 	switch (sprn) {</div><div class='ctx'> 	case SPRN_DEAR:</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;dar = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;dar = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_ESR:</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;esr = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;esr = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_DBCR0:</div><div class='del'>-		vcpu-&gt;arch.dbcr0 = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.dbcr0 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_DBCR1:</div><div class='del'>-		vcpu-&gt;arch.dbcr1 = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.dbcr1 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_DBSR:</div><div class='del'>-		vcpu-&gt;arch.dbsr &amp;= ~spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.dbsr &amp;= ~spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_TSR:</div><div class='ctx'> 		kvmppc_clr_tsr_bits(vcpu, spr_val);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -122,20 +129,29 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)</div><div class='ctx'> 		kvmppc_set_tcr(vcpu, spr_val);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	/* Note: SPRG4-7 are user-readable. These values are</div><div class='del'>-	 * loaded into the real SPRGs when resuming the</div><div class='del'>-	 * guest. */</div><div class='add'>+	/*</div><div class='add'>+	 * Note: SPRG4-7 are user-readable.</div><div class='add'>+	 * These values are loaded into the real SPRGs when resuming the</div><div class='add'>+	 * guest (PR-mode only).</div><div class='add'>+	 */</div><div class='ctx'> 	case SPRN_SPRG4:</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;sprg4 = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;sprg4 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_SPRG5:</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;sprg5 = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;sprg5 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_SPRG6:</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;sprg6 = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;sprg6 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_SPRG7:</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;sprg7 = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;sprg7 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPRN_IVPR:</div><div class='ctx'> 		vcpu-&gt;arch.ivpr = spr_val;</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+		mtspr(SPRN_GIVPR, spr_val);</div><div class='add'>+#endif</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR0:</div><div class='ctx'> 		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_CRITICAL] = spr_val;</div><div class='hunk'>@@ -145,6 +161,9 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR2:</div><div class='ctx'> 		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = spr_val;</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+		mtspr(SPRN_GIVOR2, spr_val);</div><div class='add'>+#endif</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR3:</div><div class='ctx'> 		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = spr_val;</div><div class='hunk'>@@ -163,6 +182,9 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR8:</div><div class='ctx'> 		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SYSCALL] = spr_val;</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+		mtspr(SPRN_GIVOR8, spr_val);</div><div class='add'>+#endif</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR9:</div><div class='ctx'> 		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = spr_val;</div><div class='hunk'>@@ -193,75 +215,83 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)</div><div class='ctx'> 	return emulated;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)</div><div class='add'>+int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)</div><div class='ctx'> {</div><div class='ctx'> 	int emulated = EMULATE_DONE;</div><div class='ctx'> </div><div class='ctx'> 	switch (sprn) {</div><div class='ctx'> 	case SPRN_IVPR:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivpr); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivpr;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_DEAR:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;dar); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.shared-&gt;dar;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_ESR:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;esr); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.shared-&gt;esr;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_DBCR0:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.dbcr0); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.dbcr0;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_DBCR1:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.dbcr1); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.dbcr1;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_DBSR:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.dbsr); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.dbsr;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_TSR:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.tsr); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.tsr;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_TCR:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.tcr); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.tcr;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPRN_IVOR0:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_CRITICAL]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_CRITICAL];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR1:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR2:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR3:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR4:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_EXTERNAL]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_EXTERNAL];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR5:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR6:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_PROGRAM]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_PROGRAM];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR7:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR8:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SYSCALL]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SYSCALL];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR9:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR10:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DECREMENTER]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DECREMENTER];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR11:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_FIT]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_FIT];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR12:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_WATCHDOG]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_WATCHDOG];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR13:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR14:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR15:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DEBUG]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DEBUG];</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='head'>diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S<br/>index c8c4b878795a..8feec2ff3928 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/booke_interrupts.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/booke_interrupts.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/booke_interrupts.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/booke_interrupts.S</a></div><div class='hunk'>@@ -419,13 +419,13 @@ lightweight_exit:</div><div class='ctx'> 	 * written directly to the shared area, so we</div><div class='ctx'> 	 * need to reload them here with the guest's values.</div><div class='ctx'> 	 */</div><div class='del'>-	lwz	r3, VCPU_SHARED_SPRG4(r5)</div><div class='add'>+	PPC_LD(r3, VCPU_SHARED_SPRG4, r5)</div><div class='ctx'> 	mtspr	SPRN_SPRG4W, r3</div><div class='del'>-	lwz	r3, VCPU_SHARED_SPRG5(r5)</div><div class='add'>+	PPC_LD(r3, VCPU_SHARED_SPRG5, r5)</div><div class='ctx'> 	mtspr	SPRN_SPRG5W, r3</div><div class='del'>-	lwz	r3, VCPU_SHARED_SPRG6(r5)</div><div class='add'>+	PPC_LD(r3, VCPU_SHARED_SPRG6, r5)</div><div class='ctx'> 	mtspr	SPRN_SPRG6W, r3</div><div class='del'>-	lwz	r3, VCPU_SHARED_SPRG7(r5)</div><div class='add'>+	PPC_LD(r3, VCPU_SHARED_SPRG7, r5)</div><div class='ctx'> 	mtspr	SPRN_SPRG7W, r3</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KVM_EXIT_TIMING</div><div class='head'>diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S<br/>new file mode 100644<br/>index 000000000000..6048a00515d7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/bookehv_interrupts.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/bookehv_interrupts.S</a></div><div class='hunk'>@@ -0,0 +1,597 @@</div><div class='add'>+/*</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License, version 2, as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Author: Varun Sethi &lt;varun.sethi@freescale.com&gt;</div><div class='add'>+ * Author: Scott Wood &lt;scotwood@freescale.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is derived from arch/powerpc/kvm/booke_interrupts.S</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/ppc_asm.h&gt;</div><div class='add'>+#include &lt;asm/kvm_asm.h&gt;</div><div class='add'>+#include &lt;asm/reg.h&gt;</div><div class='add'>+#include &lt;asm/mmu-44x.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+#include &lt;asm/asm-compat.h&gt;</div><div class='add'>+#include &lt;asm/asm-offsets.h&gt;</div><div class='add'>+#include &lt;asm/bitsperlong.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../kernel/head_booke.h" /* for THREAD_NORMSAVE() */</div><div class='add'>+</div><div class='add'>+#define GET_VCPU(vcpu, thread)	\</div><div class='add'>+	PPC_LL	vcpu, THREAD_KVM_VCPU(thread)</div><div class='add'>+</div><div class='add'>+#define LONGBYTES		(BITS_PER_LONG / 8)</div><div class='add'>+</div><div class='add'>+#define VCPU_GPR(n)     	(VCPU_GPRS + (n * LONGBYTES))</div><div class='add'>+#define VCPU_GUEST_SPRG(n)	(VCPU_GUEST_SPRGS + (n * LONGBYTES))</div><div class='add'>+</div><div class='add'>+/* The host stack layout: */</div><div class='add'>+#define HOST_R1         (0 * LONGBYTES) /* Implied by stwu. */</div><div class='add'>+#define HOST_CALLEE_LR  (1 * LONGBYTES)</div><div class='add'>+#define HOST_RUN        (2 * LONGBYTES) /* struct kvm_run */</div><div class='add'>+/*</div><div class='add'>+ * r2 is special: it holds 'current', and it made nonvolatile in the</div><div class='add'>+ * kernel with the -ffixed-r2 gcc option.</div><div class='add'>+ */</div><div class='add'>+#define HOST_R2         (3 * LONGBYTES)</div><div class='add'>+#define HOST_CR         (4 * LONGBYTES)</div><div class='add'>+#define HOST_NV_GPRS    (5 * LONGBYTES)</div><div class='add'>+#define HOST_NV_GPR(n)  (HOST_NV_GPRS + ((n - 14) * LONGBYTES))</div><div class='add'>+#define HOST_MIN_STACK_SIZE (HOST_NV_GPR(31) + LONGBYTES)</div><div class='add'>+#define HOST_STACK_SIZE ((HOST_MIN_STACK_SIZE + 15) &amp; ~15) /* Align. */</div><div class='add'>+#define HOST_STACK_LR   (HOST_STACK_SIZE + LONGBYTES) /* In caller stack frame. */</div><div class='add'>+</div><div class='add'>+#define NEED_EMU		0x00000001 /* emulation -- save nv regs */</div><div class='add'>+#define NEED_DEAR		0x00000002 /* save faulting DEAR */</div><div class='add'>+#define NEED_ESR		0x00000004 /* save faulting ESR */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * On entry:</div><div class='add'>+ * r4 = vcpu, r5 = srr0, r6 = srr1</div><div class='add'>+ * saved in vcpu: cr, ctr, r3-r13</div><div class='add'>+ */</div><div class='add'>+.macro kvm_handler_common intno, srr0, flags</div><div class='add'>+	/* Restore host stack pointer */</div><div class='add'>+	PPC_STL	r1, VCPU_GPR(r1)(r4)</div><div class='add'>+	PPC_STL	r2, VCPU_GPR(r2)(r4)</div><div class='add'>+	PPC_LL	r1, VCPU_HOST_STACK(r4)</div><div class='add'>+	PPC_LL	r2, HOST_R2(r1)</div><div class='add'>+</div><div class='add'>+	mfspr	r10, SPRN_PID</div><div class='add'>+	lwz	r8, VCPU_HOST_PID(r4)</div><div class='add'>+	PPC_LL	r11, VCPU_SHARED(r4)</div><div class='add'>+	PPC_STL	r14, VCPU_GPR(r14)(r4) /* We need a non-volatile GPR. */</div><div class='add'>+	li	r14, \intno</div><div class='add'>+</div><div class='add'>+	stw	r10, VCPU_GUEST_PID(r4)</div><div class='add'>+	mtspr	SPRN_PID, r8</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_EXIT_TIMING</div><div class='add'>+	/* save exit time */</div><div class='add'>+1:	mfspr	r7, SPRN_TBRU</div><div class='add'>+	mfspr	r8, SPRN_TBRL</div><div class='add'>+	mfspr	r9, SPRN_TBRU</div><div class='add'>+	cmpw	r9, r7</div><div class='add'>+	stw	r8, VCPU_TIMING_EXIT_TBL(r4)</div><div class='add'>+	bne-	1b</div><div class='add'>+	stw	r9, VCPU_TIMING_EXIT_TBU(r4)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	oris	r8, r6, MSR_CE@h</div><div class='add'>+	PPC_STD(r6, VCPU_SHARED_MSR, r11)</div><div class='add'>+	ori	r8, r8, MSR_ME | MSR_RI</div><div class='add'>+	PPC_STL	r5, VCPU_PC(r4)</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure CE/ME/RI are set (if appropriate for exception type)</div><div class='add'>+	 * whether or not the guest had it set.  Since mfmsr/mtmsr are</div><div class='add'>+	 * somewhat expensive, skip in the common case where the guest</div><div class='add'>+	 * had all these bits set (and thus they're still set if</div><div class='add'>+	 * appropriate for the exception type).</div><div class='add'>+	 */</div><div class='add'>+	cmpw	r6, r8</div><div class='add'>+	beq	1f</div><div class='add'>+	mfmsr	r7</div><div class='add'>+	.if	\srr0 != SPRN_MCSRR0 &amp;&amp; \srr0 != SPRN_CSRR0</div><div class='add'>+	oris	r7, r7, MSR_CE@h</div><div class='add'>+	.endif</div><div class='add'>+	.if	\srr0 != SPRN_MCSRR0</div><div class='add'>+	ori	r7, r7, MSR_ME | MSR_RI</div><div class='add'>+	.endif</div><div class='add'>+	mtmsr	r7</div><div class='add'>+1:</div><div class='add'>+</div><div class='add'>+	.if	\flags &amp; NEED_EMU</div><div class='add'>+	/*</div><div class='add'>+	 * This assumes you have external PID support.</div><div class='add'>+	 * To support a bookehv CPU without external PID, you'll</div><div class='add'>+	 * need to look up the TLB entry and create a temporary mapping.</div><div class='add'>+	 *</div><div class='add'>+	 * FIXME: we don't currently handle if the lwepx faults.  PR-mode</div><div class='add'>+	 * booke doesn't handle it either.  Since Linux doesn't use</div><div class='add'>+	 * broadcast tlbivax anymore, the only way this should happen is</div><div class='add'>+	 * if the guest maps its memory execute-but-not-read, or if we</div><div class='add'>+	 * somehow take a TLB miss in the middle of this entry code and</div><div class='add'>+	 * evict the relevant entry.  On e500mc, all kernel lowmem is</div><div class='add'>+	 * bolted into TLB1 large page mappings, and we don't use</div><div class='add'>+	 * broadcast invalidates, so we should not take a TLB miss here.</div><div class='add'>+	 *</div><div class='add'>+	 * Later we'll need to deal with faults here.  Disallowing guest</div><div class='add'>+	 * mappings that are execute-but-not-read could be an option on</div><div class='add'>+	 * e500mc, but not on chips with an LRAT if it is used.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	mfspr	r3, SPRN_EPLC	/* will already have correct ELPID and EGS */</div><div class='add'>+	PPC_STL	r15, VCPU_GPR(r15)(r4)</div><div class='add'>+	PPC_STL	r16, VCPU_GPR(r16)(r4)</div><div class='add'>+	PPC_STL	r17, VCPU_GPR(r17)(r4)</div><div class='add'>+	PPC_STL	r18, VCPU_GPR(r18)(r4)</div><div class='add'>+	PPC_STL	r19, VCPU_GPR(r19)(r4)</div><div class='add'>+	mr	r8, r3</div><div class='add'>+	PPC_STL	r20, VCPU_GPR(r20)(r4)</div><div class='add'>+	rlwimi	r8, r6, EPC_EAS_SHIFT - MSR_IR_LG, EPC_EAS</div><div class='add'>+	PPC_STL	r21, VCPU_GPR(r21)(r4)</div><div class='add'>+	rlwimi	r8, r6, EPC_EPR_SHIFT - MSR_PR_LG, EPC_EPR</div><div class='add'>+	PPC_STL	r22, VCPU_GPR(r22)(r4)</div><div class='add'>+	rlwimi	r8, r10, EPC_EPID_SHIFT, EPC_EPID</div><div class='add'>+	PPC_STL	r23, VCPU_GPR(r23)(r4)</div><div class='add'>+	PPC_STL	r24, VCPU_GPR(r24)(r4)</div><div class='add'>+	PPC_STL	r25, VCPU_GPR(r25)(r4)</div><div class='add'>+	PPC_STL	r26, VCPU_GPR(r26)(r4)</div><div class='add'>+	PPC_STL	r27, VCPU_GPR(r27)(r4)</div><div class='add'>+	PPC_STL	r28, VCPU_GPR(r28)(r4)</div><div class='add'>+	PPC_STL	r29, VCPU_GPR(r29)(r4)</div><div class='add'>+	PPC_STL	r30, VCPU_GPR(r30)(r4)</div><div class='add'>+	PPC_STL	r31, VCPU_GPR(r31)(r4)</div><div class='add'>+	mtspr	SPRN_EPLC, r8</div><div class='add'>+</div><div class='add'>+	/* disable preemption, so we are sure we hit the fixup handler */</div><div class='add'>+#ifdef CONFIG_PPC64</div><div class='add'>+	clrrdi	r8,r1,THREAD_SHIFT</div><div class='add'>+#else</div><div class='add'>+	rlwinm	r8,r1,0,0,31-THREAD_SHIFT       /* current thread_info */</div><div class='add'>+#endif</div><div class='add'>+	li	r7, 1</div><div class='add'>+	stw	r7, TI_PREEMPT(r8)</div><div class='add'>+</div><div class='add'>+	isync</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In case the read goes wrong, we catch it and write an invalid value</div><div class='add'>+	 * in LAST_INST instead.</div><div class='add'>+	 */</div><div class='add'>+1:	lwepx	r9, 0, r5</div><div class='add'>+2:</div><div class='add'>+.section .fixup, "ax"</div><div class='add'>+3:	li	r9, KVM_INST_FETCH_FAILED</div><div class='add'>+	b	2b</div><div class='add'>+.previous</div><div class='add'>+.section __ex_table,"a"</div><div class='add'>+	PPC_LONG_ALIGN</div><div class='add'>+	PPC_LONG 1b,3b</div><div class='add'>+.previous</div><div class='add'>+</div><div class='add'>+	mtspr	SPRN_EPLC, r3</div><div class='add'>+	li	r7, 0</div><div class='add'>+	stw	r7, TI_PREEMPT(r8)</div><div class='add'>+	stw	r9, VCPU_LAST_INST(r4)</div><div class='add'>+	.endif</div><div class='add'>+</div><div class='add'>+	.if	\flags &amp; NEED_ESR</div><div class='add'>+	mfspr	r8, SPRN_ESR</div><div class='add'>+	PPC_STL	r8, VCPU_FAULT_ESR(r4)</div><div class='add'>+	.endif</div><div class='add'>+</div><div class='add'>+	.if	\flags &amp; NEED_DEAR</div><div class='add'>+	mfspr	r9, SPRN_DEAR</div><div class='add'>+	PPC_STL	r9, VCPU_FAULT_DEAR(r4)</div><div class='add'>+	.endif</div><div class='add'>+</div><div class='add'>+	b	kvmppc_resume_host</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For input register values, see arch/powerpc/include/asm/kvm_booke_hv_asm.h</div><div class='add'>+ */</div><div class='add'>+.macro kvm_handler intno srr0, srr1, flags</div><div class='add'>+_GLOBAL(kvmppc_handler_\intno\()_\srr1)</div><div class='add'>+	GET_VCPU(r11, r10)</div><div class='add'>+	PPC_STL r3, VCPU_GPR(r3)(r11)</div><div class='add'>+	mfspr	r3, SPRN_SPRG_RSCRATCH0</div><div class='add'>+	PPC_STL	r4, VCPU_GPR(r4)(r11)</div><div class='add'>+	PPC_LL	r4, THREAD_NORMSAVE(0)(r10)</div><div class='add'>+	PPC_STL	r5, VCPU_GPR(r5)(r11)</div><div class='add'>+	stw	r13, VCPU_CR(r11)</div><div class='add'>+	mfspr	r5, \srr0</div><div class='add'>+	PPC_STL	r3, VCPU_GPR(r10)(r11)</div><div class='add'>+	PPC_LL	r3, THREAD_NORMSAVE(2)(r10)</div><div class='add'>+	PPC_STL	r6, VCPU_GPR(r6)(r11)</div><div class='add'>+	PPC_STL	r4, VCPU_GPR(r11)(r11)</div><div class='add'>+	mfspr	r6, \srr1</div><div class='add'>+	PPC_STL	r7, VCPU_GPR(r7)(r11)</div><div class='add'>+	PPC_STL	r8, VCPU_GPR(r8)(r11)</div><div class='add'>+	PPC_STL	r9, VCPU_GPR(r9)(r11)</div><div class='add'>+	PPC_STL r3, VCPU_GPR(r13)(r11)</div><div class='add'>+	mfctr	r7</div><div class='add'>+	PPC_STL	r12, VCPU_GPR(r12)(r11)</div><div class='add'>+	PPC_STL	r7, VCPU_CTR(r11)</div><div class='add'>+	mr	r4, r11</div><div class='add'>+	kvm_handler_common \intno, \srr0, \flags</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro kvm_lvl_handler intno scratch srr0, srr1, flags</div><div class='add'>+_GLOBAL(kvmppc_handler_\intno\()_\srr1)</div><div class='add'>+	mfspr	r10, SPRN_SPRG_THREAD</div><div class='add'>+	GET_VCPU(r11, r10)</div><div class='add'>+	PPC_STL r3, VCPU_GPR(r3)(r11)</div><div class='add'>+	mfspr	r3, \scratch</div><div class='add'>+	PPC_STL	r4, VCPU_GPR(r4)(r11)</div><div class='add'>+	PPC_LL	r4, GPR9(r8)</div><div class='add'>+	PPC_STL	r5, VCPU_GPR(r5)(r11)</div><div class='add'>+	stw	r9, VCPU_CR(r11)</div><div class='add'>+	mfspr	r5, \srr0</div><div class='add'>+	PPC_STL	r3, VCPU_GPR(r8)(r11)</div><div class='add'>+	PPC_LL	r3, GPR10(r8)</div><div class='add'>+	PPC_STL	r6, VCPU_GPR(r6)(r11)</div><div class='add'>+	PPC_STL	r4, VCPU_GPR(r9)(r11)</div><div class='add'>+	mfspr	r6, \srr1</div><div class='add'>+	PPC_LL	r4, GPR11(r8)</div><div class='add'>+	PPC_STL	r7, VCPU_GPR(r7)(r11)</div><div class='add'>+	PPC_STL r3, VCPU_GPR(r10)(r11)</div><div class='add'>+	mfctr	r7</div><div class='add'>+	PPC_STL	r12, VCPU_GPR(r12)(r11)</div><div class='add'>+	PPC_STL r13, VCPU_GPR(r13)(r11)</div><div class='add'>+	PPC_STL	r4, VCPU_GPR(r11)(r11)</div><div class='add'>+	PPC_STL	r7, VCPU_CTR(r11)</div><div class='add'>+	mr	r4, r11</div><div class='add'>+	kvm_handler_common \intno, \srr0, \flags</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+kvm_lvl_handler BOOKE_INTERRUPT_CRITICAL, \</div><div class='add'>+	SPRN_SPRG_RSCRATCH_CRIT, SPRN_CSRR0, SPRN_CSRR1, 0</div><div class='add'>+kvm_lvl_handler BOOKE_INTERRUPT_MACHINE_CHECK, \</div><div class='add'>+	SPRN_SPRG_RSCRATCH_MC, SPRN_MCSRR0, SPRN_MCSRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_DATA_STORAGE, \</div><div class='add'>+	SPRN_SRR0, SPRN_SRR1, (NEED_EMU | NEED_DEAR)</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_INST_STORAGE, SPRN_SRR0, SPRN_SRR1, NEED_ESR</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_EXTERNAL, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_ALIGNMENT, \</div><div class='add'>+	SPRN_SRR0, SPRN_SRR1, (NEED_DEAR | NEED_ESR)</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_PROGRAM, SPRN_SRR0, SPRN_SRR1, NEED_ESR</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_FP_UNAVAIL, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_SYSCALL, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_AP_UNAVAIL, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_DECREMENTER, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_FIT, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_lvl_handler BOOKE_INTERRUPT_WATCHDOG, \</div><div class='add'>+	SPRN_SPRG_RSCRATCH_CRIT, SPRN_CSRR0, SPRN_CSRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_DTLB_MISS, \</div><div class='add'>+	SPRN_SRR0, SPRN_SRR1, (NEED_EMU | NEED_DEAR | NEED_ESR)</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_ITLB_MISS, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_SPE_UNAVAIL, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_SPE_FP_DATA, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_SPE_FP_ROUND, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_PERFORMANCE_MONITOR, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_DOORBELL, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_lvl_handler BOOKE_INTERRUPT_DOORBELL_CRITICAL, \</div><div class='add'>+	SPRN_SPRG_RSCRATCH_CRIT, SPRN_CSRR0, SPRN_CSRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_HV_PRIV, SPRN_SRR0, SPRN_SRR1, NEED_EMU</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_HV_SYSCALL, SPRN_SRR0, SPRN_SRR1, 0</div><div class='add'>+kvm_handler BOOKE_INTERRUPT_GUEST_DBELL, SPRN_GSRR0, SPRN_GSRR1, 0</div><div class='add'>+kvm_lvl_handler BOOKE_INTERRUPT_GUEST_DBELL_CRIT, \</div><div class='add'>+	SPRN_SPRG_RSCRATCH_CRIT, SPRN_CSRR0, SPRN_CSRR1, 0</div><div class='add'>+kvm_lvl_handler BOOKE_INTERRUPT_DEBUG, \</div><div class='add'>+	SPRN_SPRG_RSCRATCH_CRIT, SPRN_CSRR0, SPRN_CSRR1, 0</div><div class='add'>+kvm_lvl_handler BOOKE_INTERRUPT_DEBUG, \</div><div class='add'>+	SPRN_SPRG_RSCRATCH_DBG, SPRN_DSRR0, SPRN_DSRR1, 0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Registers:</div><div class='add'>+ *  SPRG_SCRATCH0: guest r10</div><div class='add'>+ *  r4: vcpu pointer</div><div class='add'>+ *  r11: vcpu-&gt;arch.shared</div><div class='add'>+ *  r14: KVM exit number</div><div class='add'>+ */</div><div class='add'>+_GLOBAL(kvmppc_resume_host)</div><div class='add'>+	/* Save remaining volatile guest register state to vcpu. */</div><div class='add'>+	mfspr	r3, SPRN_VRSAVE</div><div class='add'>+	PPC_STL	r0, VCPU_GPR(r0)(r4)</div><div class='add'>+	mflr	r5</div><div class='add'>+	mfspr	r6, SPRN_SPRG4</div><div class='add'>+	PPC_STL	r5, VCPU_LR(r4)</div><div class='add'>+	mfspr	r7, SPRN_SPRG5</div><div class='add'>+	stw	r3, VCPU_VRSAVE(r4)</div><div class='add'>+	PPC_STD(r6, VCPU_SHARED_SPRG4, r11)</div><div class='add'>+	mfspr	r8, SPRN_SPRG6</div><div class='add'>+	PPC_STD(r7, VCPU_SHARED_SPRG5, r11)</div><div class='add'>+	mfspr	r9, SPRN_SPRG7</div><div class='add'>+	PPC_STD(r8, VCPU_SHARED_SPRG6, r11)</div><div class='add'>+	mfxer	r3</div><div class='add'>+	PPC_STD(r9, VCPU_SHARED_SPRG7, r11)</div><div class='add'>+</div><div class='add'>+	/* save guest MAS registers and restore host mas4 &amp; mas6 */</div><div class='add'>+	mfspr	r5, SPRN_MAS0</div><div class='add'>+	PPC_STL	r3, VCPU_XER(r4)</div><div class='add'>+	mfspr	r6, SPRN_MAS1</div><div class='add'>+	stw	r5, VCPU_SHARED_MAS0(r11)</div><div class='add'>+	mfspr	r7, SPRN_MAS2</div><div class='add'>+	stw	r6, VCPU_SHARED_MAS1(r11)</div><div class='add'>+	PPC_STD(r7, VCPU_SHARED_MAS2, r11)</div><div class='add'>+	mfspr	r5, SPRN_MAS3</div><div class='add'>+	mfspr	r6, SPRN_MAS4</div><div class='add'>+	stw	r5, VCPU_SHARED_MAS7_3+4(r11)</div><div class='add'>+	mfspr	r7, SPRN_MAS6</div><div class='add'>+	stw	r6, VCPU_SHARED_MAS4(r11)</div><div class='add'>+	mfspr	r5, SPRN_MAS7</div><div class='add'>+	lwz	r6, VCPU_HOST_MAS4(r4)</div><div class='add'>+	stw	r7, VCPU_SHARED_MAS6(r11)</div><div class='add'>+	lwz	r8, VCPU_HOST_MAS6(r4)</div><div class='add'>+	mtspr	SPRN_MAS4, r6</div><div class='add'>+	stw	r5, VCPU_SHARED_MAS7_3+0(r11)</div><div class='add'>+	mtspr	SPRN_MAS6, r8</div><div class='add'>+	/* Enable MAS register updates via exception */</div><div class='add'>+	mfspr	r3, SPRN_EPCR</div><div class='add'>+	rlwinm	r3, r3, 0, ~SPRN_EPCR_DMIUH</div><div class='add'>+	mtspr	SPRN_EPCR, r3</div><div class='add'>+	isync</div><div class='add'>+</div><div class='add'>+	/* Switch to kernel stack and jump to handler. */</div><div class='add'>+	PPC_LL	r3, HOST_RUN(r1)</div><div class='add'>+	mr	r5, r14 /* intno */</div><div class='add'>+	mr	r14, r4 /* Save vcpu pointer. */</div><div class='add'>+	bl	kvmppc_handle_exit</div><div class='add'>+</div><div class='add'>+	/* Restore vcpu pointer and the nonvolatiles we used. */</div><div class='add'>+	mr	r4, r14</div><div class='add'>+	PPC_LL	r14, VCPU_GPR(r14)(r4)</div><div class='add'>+</div><div class='add'>+	andi.	r5, r3, RESUME_FLAG_NV</div><div class='add'>+	beq	skip_nv_load</div><div class='add'>+	PPC_LL	r15, VCPU_GPR(r15)(r4)</div><div class='add'>+	PPC_LL	r16, VCPU_GPR(r16)(r4)</div><div class='add'>+	PPC_LL	r17, VCPU_GPR(r17)(r4)</div><div class='add'>+	PPC_LL	r18, VCPU_GPR(r18)(r4)</div><div class='add'>+	PPC_LL	r19, VCPU_GPR(r19)(r4)</div><div class='add'>+	PPC_LL	r20, VCPU_GPR(r20)(r4)</div><div class='add'>+	PPC_LL	r21, VCPU_GPR(r21)(r4)</div><div class='add'>+	PPC_LL	r22, VCPU_GPR(r22)(r4)</div><div class='add'>+	PPC_LL	r23, VCPU_GPR(r23)(r4)</div><div class='add'>+	PPC_LL	r24, VCPU_GPR(r24)(r4)</div><div class='add'>+	PPC_LL	r25, VCPU_GPR(r25)(r4)</div><div class='add'>+	PPC_LL	r26, VCPU_GPR(r26)(r4)</div><div class='add'>+	PPC_LL	r27, VCPU_GPR(r27)(r4)</div><div class='add'>+	PPC_LL	r28, VCPU_GPR(r28)(r4)</div><div class='add'>+	PPC_LL	r29, VCPU_GPR(r29)(r4)</div><div class='add'>+	PPC_LL	r30, VCPU_GPR(r30)(r4)</div><div class='add'>+	PPC_LL	r31, VCPU_GPR(r31)(r4)</div><div class='add'>+skip_nv_load:</div><div class='add'>+	/* Should we return to the guest? */</div><div class='add'>+	andi.	r5, r3, RESUME_FLAG_HOST</div><div class='add'>+	beq	lightweight_exit</div><div class='add'>+</div><div class='add'>+	srawi	r3, r3, 2 /* Shift -ERR back down. */</div><div class='add'>+</div><div class='add'>+heavyweight_exit:</div><div class='add'>+	/* Not returning to guest. */</div><div class='add'>+	PPC_LL	r5, HOST_STACK_LR(r1)</div><div class='add'>+	lwz	r6, HOST_CR(r1)</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We already saved guest volatile register state; now save the</div><div class='add'>+	 * non-volatiles.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	PPC_STL	r15, VCPU_GPR(r15)(r4)</div><div class='add'>+	PPC_STL	r16, VCPU_GPR(r16)(r4)</div><div class='add'>+	PPC_STL	r17, VCPU_GPR(r17)(r4)</div><div class='add'>+	PPC_STL	r18, VCPU_GPR(r18)(r4)</div><div class='add'>+	PPC_STL	r19, VCPU_GPR(r19)(r4)</div><div class='add'>+	PPC_STL	r20, VCPU_GPR(r20)(r4)</div><div class='add'>+	PPC_STL	r21, VCPU_GPR(r21)(r4)</div><div class='add'>+	PPC_STL	r22, VCPU_GPR(r22)(r4)</div><div class='add'>+	PPC_STL	r23, VCPU_GPR(r23)(r4)</div><div class='add'>+	PPC_STL	r24, VCPU_GPR(r24)(r4)</div><div class='add'>+	PPC_STL	r25, VCPU_GPR(r25)(r4)</div><div class='add'>+	PPC_STL	r26, VCPU_GPR(r26)(r4)</div><div class='add'>+	PPC_STL	r27, VCPU_GPR(r27)(r4)</div><div class='add'>+	PPC_STL	r28, VCPU_GPR(r28)(r4)</div><div class='add'>+	PPC_STL	r29, VCPU_GPR(r29)(r4)</div><div class='add'>+	PPC_STL	r30, VCPU_GPR(r30)(r4)</div><div class='add'>+	PPC_STL	r31, VCPU_GPR(r31)(r4)</div><div class='add'>+</div><div class='add'>+	/* Load host non-volatile register state from host stack. */</div><div class='add'>+	PPC_LL	r14, HOST_NV_GPR(r14)(r1)</div><div class='add'>+	PPC_LL	r15, HOST_NV_GPR(r15)(r1)</div><div class='add'>+	PPC_LL	r16, HOST_NV_GPR(r16)(r1)</div><div class='add'>+	PPC_LL	r17, HOST_NV_GPR(r17)(r1)</div><div class='add'>+	PPC_LL	r18, HOST_NV_GPR(r18)(r1)</div><div class='add'>+	PPC_LL	r19, HOST_NV_GPR(r19)(r1)</div><div class='add'>+	PPC_LL	r20, HOST_NV_GPR(r20)(r1)</div><div class='add'>+	PPC_LL	r21, HOST_NV_GPR(r21)(r1)</div><div class='add'>+	PPC_LL	r22, HOST_NV_GPR(r22)(r1)</div><div class='add'>+	PPC_LL	r23, HOST_NV_GPR(r23)(r1)</div><div class='add'>+	PPC_LL	r24, HOST_NV_GPR(r24)(r1)</div><div class='add'>+	PPC_LL	r25, HOST_NV_GPR(r25)(r1)</div><div class='add'>+	PPC_LL	r26, HOST_NV_GPR(r26)(r1)</div><div class='add'>+	PPC_LL	r27, HOST_NV_GPR(r27)(r1)</div><div class='add'>+	PPC_LL	r28, HOST_NV_GPR(r28)(r1)</div><div class='add'>+	PPC_LL	r29, HOST_NV_GPR(r29)(r1)</div><div class='add'>+	PPC_LL	r30, HOST_NV_GPR(r30)(r1)</div><div class='add'>+	PPC_LL	r31, HOST_NV_GPR(r31)(r1)</div><div class='add'>+</div><div class='add'>+	/* Return to kvm_vcpu_run(). */</div><div class='add'>+	mtlr	r5</div><div class='add'>+	mtcr	r6</div><div class='add'>+	addi	r1, r1, HOST_STACK_SIZE</div><div class='add'>+	/* r3 still contains the return code from kvmppc_handle_exit(). */</div><div class='add'>+	blr</div><div class='add'>+</div><div class='add'>+/* Registers:</div><div class='add'>+ *  r3: kvm_run pointer</div><div class='add'>+ *  r4: vcpu pointer</div><div class='add'>+ */</div><div class='add'>+_GLOBAL(__kvmppc_vcpu_run)</div><div class='add'>+	stwu	r1, -HOST_STACK_SIZE(r1)</div><div class='add'>+	PPC_STL	r1, VCPU_HOST_STACK(r4)	/* Save stack pointer to vcpu. */</div><div class='add'>+</div><div class='add'>+	/* Save host state to stack. */</div><div class='add'>+	PPC_STL	r3, HOST_RUN(r1)</div><div class='add'>+	mflr	r3</div><div class='add'>+	mfcr	r5</div><div class='add'>+	PPC_STL	r3, HOST_STACK_LR(r1)</div><div class='add'>+</div><div class='add'>+	stw	r5, HOST_CR(r1)</div><div class='add'>+</div><div class='add'>+	/* Save host non-volatile register state to stack. */</div><div class='add'>+	PPC_STL	r14, HOST_NV_GPR(r14)(r1)</div><div class='add'>+	PPC_STL	r15, HOST_NV_GPR(r15)(r1)</div><div class='add'>+	PPC_STL	r16, HOST_NV_GPR(r16)(r1)</div><div class='add'>+	PPC_STL	r17, HOST_NV_GPR(r17)(r1)</div><div class='add'>+	PPC_STL	r18, HOST_NV_GPR(r18)(r1)</div><div class='add'>+	PPC_STL	r19, HOST_NV_GPR(r19)(r1)</div><div class='add'>+	PPC_STL	r20, HOST_NV_GPR(r20)(r1)</div><div class='add'>+	PPC_STL	r21, HOST_NV_GPR(r21)(r1)</div><div class='add'>+	PPC_STL	r22, HOST_NV_GPR(r22)(r1)</div><div class='add'>+	PPC_STL	r23, HOST_NV_GPR(r23)(r1)</div><div class='add'>+	PPC_STL	r24, HOST_NV_GPR(r24)(r1)</div><div class='add'>+	PPC_STL	r25, HOST_NV_GPR(r25)(r1)</div><div class='add'>+	PPC_STL	r26, HOST_NV_GPR(r26)(r1)</div><div class='add'>+	PPC_STL	r27, HOST_NV_GPR(r27)(r1)</div><div class='add'>+	PPC_STL	r28, HOST_NV_GPR(r28)(r1)</div><div class='add'>+	PPC_STL	r29, HOST_NV_GPR(r29)(r1)</div><div class='add'>+	PPC_STL	r30, HOST_NV_GPR(r30)(r1)</div><div class='add'>+	PPC_STL	r31, HOST_NV_GPR(r31)(r1)</div><div class='add'>+</div><div class='add'>+	/* Load guest non-volatiles. */</div><div class='add'>+	PPC_LL	r14, VCPU_GPR(r14)(r4)</div><div class='add'>+	PPC_LL	r15, VCPU_GPR(r15)(r4)</div><div class='add'>+	PPC_LL	r16, VCPU_GPR(r16)(r4)</div><div class='add'>+	PPC_LL	r17, VCPU_GPR(r17)(r4)</div><div class='add'>+	PPC_LL	r18, VCPU_GPR(r18)(r4)</div><div class='add'>+	PPC_LL	r19, VCPU_GPR(r19)(r4)</div><div class='add'>+	PPC_LL	r20, VCPU_GPR(r20)(r4)</div><div class='add'>+	PPC_LL	r21, VCPU_GPR(r21)(r4)</div><div class='add'>+	PPC_LL	r22, VCPU_GPR(r22)(r4)</div><div class='add'>+	PPC_LL	r23, VCPU_GPR(r23)(r4)</div><div class='add'>+	PPC_LL	r24, VCPU_GPR(r24)(r4)</div><div class='add'>+	PPC_LL	r25, VCPU_GPR(r25)(r4)</div><div class='add'>+	PPC_LL	r26, VCPU_GPR(r26)(r4)</div><div class='add'>+	PPC_LL	r27, VCPU_GPR(r27)(r4)</div><div class='add'>+	PPC_LL	r28, VCPU_GPR(r28)(r4)</div><div class='add'>+	PPC_LL	r29, VCPU_GPR(r29)(r4)</div><div class='add'>+	PPC_LL	r30, VCPU_GPR(r30)(r4)</div><div class='add'>+	PPC_LL	r31, VCPU_GPR(r31)(r4)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+lightweight_exit:</div><div class='add'>+	PPC_STL	r2, HOST_R2(r1)</div><div class='add'>+</div><div class='add'>+	mfspr	r3, SPRN_PID</div><div class='add'>+	stw	r3, VCPU_HOST_PID(r4)</div><div class='add'>+	lwz	r3, VCPU_GUEST_PID(r4)</div><div class='add'>+	mtspr	SPRN_PID, r3</div><div class='add'>+</div><div class='add'>+	PPC_LL	r11, VCPU_SHARED(r4)</div><div class='add'>+	/* Disable MAS register updates via exception */</div><div class='add'>+	mfspr	r3, SPRN_EPCR</div><div class='add'>+	oris	r3, r3, SPRN_EPCR_DMIUH@h</div><div class='add'>+	mtspr	SPRN_EPCR, r3</div><div class='add'>+	isync</div><div class='add'>+	/* Save host mas4 and mas6 and load guest MAS registers */</div><div class='add'>+	mfspr	r3, SPRN_MAS4</div><div class='add'>+	stw	r3, VCPU_HOST_MAS4(r4)</div><div class='add'>+	mfspr	r3, SPRN_MAS6</div><div class='add'>+	stw	r3, VCPU_HOST_MAS6(r4)</div><div class='add'>+	lwz	r3, VCPU_SHARED_MAS0(r11)</div><div class='add'>+	lwz	r5, VCPU_SHARED_MAS1(r11)</div><div class='add'>+	PPC_LD(r6, VCPU_SHARED_MAS2, r11)</div><div class='add'>+	lwz	r7, VCPU_SHARED_MAS7_3+4(r11)</div><div class='add'>+	lwz	r8, VCPU_SHARED_MAS4(r11)</div><div class='add'>+	mtspr	SPRN_MAS0, r3</div><div class='add'>+	mtspr	SPRN_MAS1, r5</div><div class='add'>+	mtspr	SPRN_MAS2, r6</div><div class='add'>+	mtspr	SPRN_MAS3, r7</div><div class='add'>+	mtspr	SPRN_MAS4, r8</div><div class='add'>+	lwz	r3, VCPU_SHARED_MAS6(r11)</div><div class='add'>+	lwz	r5, VCPU_SHARED_MAS7_3+0(r11)</div><div class='add'>+	mtspr	SPRN_MAS6, r3</div><div class='add'>+	mtspr	SPRN_MAS7, r5</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Host interrupt handlers may have clobbered these guest-readable</div><div class='add'>+	 * SPRGs, so we need to reload them here with the guest's values.</div><div class='add'>+	 */</div><div class='add'>+	lwz	r3, VCPU_VRSAVE(r4)</div><div class='add'>+	PPC_LD(r5, VCPU_SHARED_SPRG4, r11)</div><div class='add'>+	mtspr	SPRN_VRSAVE, r3</div><div class='add'>+	PPC_LD(r6, VCPU_SHARED_SPRG5, r11)</div><div class='add'>+	mtspr	SPRN_SPRG4W, r5</div><div class='add'>+	PPC_LD(r7, VCPU_SHARED_SPRG6, r11)</div><div class='add'>+	mtspr	SPRN_SPRG5W, r6</div><div class='add'>+	PPC_LD(r8, VCPU_SHARED_SPRG7, r11)</div><div class='add'>+	mtspr	SPRN_SPRG6W, r7</div><div class='add'>+	mtspr	SPRN_SPRG7W, r8</div><div class='add'>+</div><div class='add'>+	/* Load some guest volatiles. */</div><div class='add'>+	PPC_LL	r3, VCPU_LR(r4)</div><div class='add'>+	PPC_LL	r5, VCPU_XER(r4)</div><div class='add'>+	PPC_LL	r6, VCPU_CTR(r4)</div><div class='add'>+	lwz	r7, VCPU_CR(r4)</div><div class='add'>+	PPC_LL	r8, VCPU_PC(r4)</div><div class='add'>+	PPC_LD(r9, VCPU_SHARED_MSR, r11)</div><div class='add'>+	PPC_LL	r0, VCPU_GPR(r0)(r4)</div><div class='add'>+	PPC_LL	r1, VCPU_GPR(r1)(r4)</div><div class='add'>+	PPC_LL	r2, VCPU_GPR(r2)(r4)</div><div class='add'>+	PPC_LL	r10, VCPU_GPR(r10)(r4)</div><div class='add'>+	PPC_LL	r11, VCPU_GPR(r11)(r4)</div><div class='add'>+	PPC_LL	r12, VCPU_GPR(r12)(r4)</div><div class='add'>+	PPC_LL	r13, VCPU_GPR(r13)(r4)</div><div class='add'>+	mtlr	r3</div><div class='add'>+	mtxer	r5</div><div class='add'>+	mtctr	r6</div><div class='add'>+	mtsrr0	r8</div><div class='add'>+	mtsrr1	r9</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_EXIT_TIMING</div><div class='add'>+	/* save enter time */</div><div class='add'>+1:</div><div class='add'>+	mfspr	r6, SPRN_TBRU</div><div class='add'>+	mfspr	r9, SPRN_TBRL</div><div class='add'>+	mfspr	r8, SPRN_TBRU</div><div class='add'>+	cmpw	r8, r6</div><div class='add'>+	stw	r9, VCPU_TIMING_LAST_ENTER_TBL(r4)</div><div class='add'>+	bne	1b</div><div class='add'>+	stw	r8, VCPU_TIMING_LAST_ENTER_TBU(r4)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Don't execute any instruction which can change CR after</div><div class='add'>+	 * below instruction.</div><div class='add'>+	 */</div><div class='add'>+	mtcr	r7</div><div class='add'>+</div><div class='add'>+	/* Finish loading guest volatiles and jump to guest. */</div><div class='add'>+	PPC_LL	r5, VCPU_GPR(r5)(r4)</div><div class='add'>+	PPC_LL	r6, VCPU_GPR(r6)(r4)</div><div class='add'>+	PPC_LL	r7, VCPU_GPR(r7)(r4)</div><div class='add'>+	PPC_LL	r8, VCPU_GPR(r8)(r4)</div><div class='add'>+	PPC_LL	r9, VCPU_GPR(r9)(r4)</div><div class='add'>+</div><div class='add'>+	PPC_LL	r3, VCPU_GPR(r3)(r4)</div><div class='add'>+	PPC_LL	r4, VCPU_GPR(r4)(r4)</div><div class='add'>+	rfi</div><div class='head'>diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c<br/>index ddcd896fa2ff..b479ed77c515 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/e500.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/e500.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/e500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/e500.c</a></div><div class='hunk'>@@ -20,11 +20,282 @@</div><div class='ctx'> #include &lt;asm/reg.h&gt;</div><div class='ctx'> #include &lt;asm/cputable.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='del'>-#include &lt;asm/kvm_e500.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_ppc.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "../mm/mmu_decl.h"</div><div class='ctx'> #include "booke.h"</div><div class='del'>-#include "e500_tlb.h"</div><div class='add'>+#include "e500.h"</div><div class='add'>+</div><div class='add'>+struct id {</div><div class='add'>+	unsigned long val;</div><div class='add'>+	struct id **pentry;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define NUM_TIDS 256</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This table provide mappings from:</div><div class='add'>+ * (guestAS,guestTID,guestPR) --&gt; ID of physical cpu</div><div class='add'>+ * guestAS	[0..1]</div><div class='add'>+ * guestTID	[0..255]</div><div class='add'>+ * guestPR	[0..1]</div><div class='add'>+ * ID		[1..255]</div><div class='add'>+ * Each vcpu keeps one vcpu_id_table.</div><div class='add'>+ */</div><div class='add'>+struct vcpu_id_table {</div><div class='add'>+	struct id id[2][NUM_TIDS][2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This table provide reversed mappings of vcpu_id_table:</div><div class='add'>+ * ID --&gt; address of vcpu_id_table item.</div><div class='add'>+ * Each physical core has one pcpu_id_table.</div><div class='add'>+ */</div><div class='add'>+struct pcpu_id_table {</div><div class='add'>+	struct id *entry[NUM_TIDS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DEFINE_PER_CPU(struct pcpu_id_table, pcpu_sids);</div><div class='add'>+</div><div class='add'>+/* This variable keeps last used shadow ID on local core.</div><div class='add'>+ * The valid range of shadow ID is [1..255] */</div><div class='add'>+static DEFINE_PER_CPU(unsigned long, pcpu_last_used_sid);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Allocate a free shadow id and setup a valid sid mapping in given entry.</div><div class='add'>+ * A mapping is only valid when vcpu_id_table and pcpu_id_table are match.</div><div class='add'>+ *</div><div class='add'>+ * The caller must have preemption disabled, and keep it that way until</div><div class='add'>+ * it has finished with the returned shadow id (either written into the</div><div class='add'>+ * TLB or arch.shadow_pid, or discarded).</div><div class='add'>+ */</div><div class='add'>+static inline int local_sid_setup_one(struct id *entry)</div><div class='add'>+{</div><div class='add'>+	unsigned long sid;</div><div class='add'>+	int ret = -1;</div><div class='add'>+</div><div class='add'>+	sid = ++(__get_cpu_var(pcpu_last_used_sid));</div><div class='add'>+	if (sid &lt; NUM_TIDS) {</div><div class='add'>+		__get_cpu_var(pcpu_sids).entry[sid] = entry;</div><div class='add'>+		entry-&gt;val = sid;</div><div class='add'>+		entry-&gt;pentry = &amp;__get_cpu_var(pcpu_sids).entry[sid];</div><div class='add'>+		ret = sid;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If sid == NUM_TIDS, we've run out of sids.  We return -1, and</div><div class='add'>+	 * the caller will invalidate everything and start over.</div><div class='add'>+	 *</div><div class='add'>+	 * sid &gt; NUM_TIDS indicates a race, which we disable preemption to</div><div class='add'>+	 * avoid.</div><div class='add'>+	 */</div><div class='add'>+	WARN_ON(sid &gt; NUM_TIDS);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Check if given entry contain a valid shadow id mapping.</div><div class='add'>+ * An ID mapping is considered valid only if</div><div class='add'>+ * both vcpu and pcpu know this mapping.</div><div class='add'>+ *</div><div class='add'>+ * The caller must have preemption disabled, and keep it that way until</div><div class='add'>+ * it has finished with the returned shadow id (either written into the</div><div class='add'>+ * TLB or arch.shadow_pid, or discarded).</div><div class='add'>+ */</div><div class='add'>+static inline int local_sid_lookup(struct id *entry)</div><div class='add'>+{</div><div class='add'>+	if (entry &amp;&amp; entry-&gt;val != 0 &amp;&amp;</div><div class='add'>+	    __get_cpu_var(pcpu_sids).entry[entry-&gt;val] == entry &amp;&amp;</div><div class='add'>+	    entry-&gt;pentry == &amp;__get_cpu_var(pcpu_sids).entry[entry-&gt;val])</div><div class='add'>+		return entry-&gt;val;</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Invalidate all id mappings on local core -- call with preempt disabled */</div><div class='add'>+static inline void local_sid_destroy_all(void)</div><div class='add'>+{</div><div class='add'>+	__get_cpu_var(pcpu_last_used_sid) = 0;</div><div class='add'>+	memset(&amp;__get_cpu_var(pcpu_sids), 0, sizeof(__get_cpu_var(pcpu_sids)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *kvmppc_e500_id_table_alloc(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='add'>+{</div><div class='add'>+	vcpu_e500-&gt;idt = kzalloc(sizeof(struct vcpu_id_table), GFP_KERNEL);</div><div class='add'>+	return vcpu_e500-&gt;idt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvmppc_e500_id_table_free(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='add'>+{</div><div class='add'>+	kfree(vcpu_e500-&gt;idt);</div><div class='add'>+	vcpu_e500-&gt;idt = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Map guest pid to shadow.</div><div class='add'>+ * We use PID to keep shadow of current guest non-zero PID,</div><div class='add'>+ * and use PID1 to keep shadow of guest zero PID.</div><div class='add'>+ * So that guest tlbe with TID=0 can be accessed at any time */</div><div class='add'>+static void kvmppc_e500_recalc_shadow_pid(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='add'>+{</div><div class='add'>+	preempt_disable();</div><div class='add'>+	vcpu_e500-&gt;vcpu.arch.shadow_pid = kvmppc_e500_get_sid(vcpu_e500,</div><div class='add'>+			get_cur_as(&amp;vcpu_e500-&gt;vcpu),</div><div class='add'>+			get_cur_pid(&amp;vcpu_e500-&gt;vcpu),</div><div class='add'>+			get_cur_pr(&amp;vcpu_e500-&gt;vcpu), 1);</div><div class='add'>+	vcpu_e500-&gt;vcpu.arch.shadow_pid1 = kvmppc_e500_get_sid(vcpu_e500,</div><div class='add'>+			get_cur_as(&amp;vcpu_e500-&gt;vcpu), 0,</div><div class='add'>+			get_cur_pr(&amp;vcpu_e500-&gt;vcpu), 1);</div><div class='add'>+	preempt_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Invalidate all mappings on vcpu */</div><div class='add'>+static void kvmppc_e500_id_table_reset_all(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='add'>+{</div><div class='add'>+	memset(vcpu_e500-&gt;idt, 0, sizeof(struct vcpu_id_table));</div><div class='add'>+</div><div class='add'>+	/* Update shadow pid when mappings are changed */</div><div class='add'>+	kvmppc_e500_recalc_shadow_pid(vcpu_e500);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Invalidate one ID mapping on vcpu */</div><div class='add'>+static inline void kvmppc_e500_id_table_reset_one(</div><div class='add'>+			       struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='add'>+			       int as, int pid, int pr)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_id_table *idt = vcpu_e500-&gt;idt;</div><div class='add'>+</div><div class='add'>+	BUG_ON(as &gt;= 2);</div><div class='add'>+	BUG_ON(pid &gt;= NUM_TIDS);</div><div class='add'>+	BUG_ON(pr &gt;= 2);</div><div class='add'>+</div><div class='add'>+	idt-&gt;id[as][pid][pr].val = 0;</div><div class='add'>+	idt-&gt;id[as][pid][pr].pentry = NULL;</div><div class='add'>+</div><div class='add'>+	/* Update shadow pid when mappings are changed */</div><div class='add'>+	kvmppc_e500_recalc_shadow_pid(vcpu_e500);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Map guest (vcpu,AS,ID,PR) to physical core shadow id.</div><div class='add'>+ * This function first lookup if a valid mapping exists,</div><div class='add'>+ * if not, then creates a new one.</div><div class='add'>+ *</div><div class='add'>+ * The caller must have preemption disabled, and keep it that way until</div><div class='add'>+ * it has finished with the returned shadow id (either written into the</div><div class='add'>+ * TLB or arch.shadow_pid, or discarded).</div><div class='add'>+ */</div><div class='add'>+unsigned int kvmppc_e500_get_sid(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='add'>+				 unsigned int as, unsigned int gid,</div><div class='add'>+				 unsigned int pr, int avoid_recursion)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_id_table *idt = vcpu_e500-&gt;idt;</div><div class='add'>+	int sid;</div><div class='add'>+</div><div class='add'>+	BUG_ON(as &gt;= 2);</div><div class='add'>+	BUG_ON(gid &gt;= NUM_TIDS);</div><div class='add'>+	BUG_ON(pr &gt;= 2);</div><div class='add'>+</div><div class='add'>+	sid = local_sid_lookup(&amp;idt-&gt;id[as][gid][pr]);</div><div class='add'>+</div><div class='add'>+	while (sid &lt;= 0) {</div><div class='add'>+		/* No mapping yet */</div><div class='add'>+		sid = local_sid_setup_one(&amp;idt-&gt;id[as][gid][pr]);</div><div class='add'>+		if (sid &lt;= 0) {</div><div class='add'>+			_tlbil_all();</div><div class='add'>+			local_sid_destroy_all();</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Update shadow pid when mappings are changed */</div><div class='add'>+		if (!avoid_recursion)</div><div class='add'>+			kvmppc_e500_recalc_shadow_pid(vcpu_e500);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int kvmppc_e500_get_tlb_stid(struct kvm_vcpu *vcpu,</div><div class='add'>+				      struct kvm_book3e_206_tlb_entry *gtlbe)</div><div class='add'>+{</div><div class='add'>+	return kvmppc_e500_get_sid(to_e500(vcpu), get_tlb_ts(gtlbe),</div><div class='add'>+				   get_tlb_tid(gtlbe), get_cur_pr(vcpu), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='add'>+</div><div class='add'>+	if (vcpu-&gt;arch.pid != pid) {</div><div class='add'>+		vcpu_e500-&gt;pid[0] = vcpu-&gt;arch.pid = pid;</div><div class='add'>+		kvmppc_e500_recalc_shadow_pid(vcpu_e500);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* gtlbe must not be mapped by more than one host tlbe */</div><div class='add'>+void kvmppc_e500_tlbil_one(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='add'>+                           struct kvm_book3e_206_tlb_entry *gtlbe)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_id_table *idt = vcpu_e500-&gt;idt;</div><div class='add'>+	unsigned int pr, tid, ts, pid;</div><div class='add'>+	u32 val, eaddr;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	ts = get_tlb_ts(gtlbe);</div><div class='add'>+	tid = get_tlb_tid(gtlbe);</div><div class='add'>+</div><div class='add'>+	preempt_disable();</div><div class='add'>+</div><div class='add'>+	/* One guest ID may be mapped to two shadow IDs */</div><div class='add'>+	for (pr = 0; pr &lt; 2; pr++) {</div><div class='add'>+		/*</div><div class='add'>+		 * The shadow PID can have a valid mapping on at most one</div><div class='add'>+		 * host CPU.  In the common case, it will be valid on this</div><div class='add'>+		 * CPU, in which case we do a local invalidation of the</div><div class='add'>+		 * specific address.</div><div class='add'>+		 *</div><div class='add'>+		 * If the shadow PID is not valid on the current host CPU,</div><div class='add'>+		 * we invalidate the entire shadow PID.</div><div class='add'>+		 */</div><div class='add'>+		pid = local_sid_lookup(&amp;idt-&gt;id[ts][tid][pr]);</div><div class='add'>+		if (pid &lt;= 0) {</div><div class='add'>+			kvmppc_e500_id_table_reset_one(vcpu_e500, ts, tid, pr);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The guest is invalidating a 4K entry which is in a PID</div><div class='add'>+		 * that has a valid shadow mapping on this host CPU.  We</div><div class='add'>+		 * search host TLB to invalidate it's shadow TLB entry,</div><div class='add'>+		 * similar to __tlbil_va except that we need to look in AS1.</div><div class='add'>+		 */</div><div class='add'>+		val = (pid &lt;&lt; MAS6_SPID_SHIFT) | MAS6_SAS;</div><div class='add'>+		eaddr = get_tlb_eaddr(gtlbe);</div><div class='add'>+</div><div class='add'>+		local_irq_save(flags);</div><div class='add'>+</div><div class='add'>+		mtspr(SPRN_MAS6, val);</div><div class='add'>+		asm volatile("tlbsx 0, %[eaddr]" : : [eaddr] "r" (eaddr));</div><div class='add'>+		val = mfspr(SPRN_MAS1);</div><div class='add'>+		if (val &amp; MAS1_VALID) {</div><div class='add'>+			mtspr(SPRN_MAS1, val &amp; ~MAS1_VALID);</div><div class='add'>+			asm volatile("tlbwe");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		local_irq_restore(flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	preempt_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_e500_tlbil_all(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='add'>+{</div><div class='add'>+	kvmppc_e500_id_table_reset_all(vcpu_e500);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)</div><div class='add'>+{</div><div class='add'>+	/* Recalc shadow pid since MSR changes */</div><div class='add'>+	kvmppc_e500_recalc_shadow_pid(to_e500(vcpu));</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='hunk'>@@ -36,17 +307,20 @@ void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='ctx'> {</div><div class='del'>-	kvmppc_e500_tlb_load(vcpu, cpu);</div><div class='add'>+	kvmppc_booke_vcpu_load(vcpu, cpu);</div><div class='add'>+</div><div class='add'>+	/* Shadow PID may be expired on local core */</div><div class='add'>+	kvmppc_e500_recalc_shadow_pid(to_e500(vcpu));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	kvmppc_e500_tlb_put(vcpu);</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_SPE</div><div class='ctx'> 	if (vcpu-&gt;arch.shadow_msr &amp; MSR_SPE)</div><div class='ctx'> 		kvmppc_vcpu_disable_spe(vcpu);</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+	kvmppc_booke_vcpu_put(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvmppc_core_check_processor_compat(void)</div><div class='hunk'>@@ -61,6 +335,23 @@ int kvmppc_core_check_processor_compat(void)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='add'>+{</div><div class='add'>+	struct kvm_book3e_206_tlb_entry *tlbe;</div><div class='add'>+</div><div class='add'>+	/* Insert large initial mapping for guest. */</div><div class='add'>+	tlbe = get_entry(vcpu_e500, 1, 0);</div><div class='add'>+	tlbe-&gt;mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_256M);</div><div class='add'>+	tlbe-&gt;mas2 = 0;</div><div class='add'>+	tlbe-&gt;mas7_3 = E500_TLB_SUPER_PERM_MASK;</div><div class='add'>+</div><div class='add'>+	/* 4K map for serial output. Used by kernel wrapper. */</div><div class='add'>+	tlbe = get_entry(vcpu_e500, 1, 1);</div><div class='add'>+	tlbe-&gt;mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_4K);</div><div class='add'>+	tlbe-&gt;mas2 = (0xe0004500 &amp; 0xFFFFF000) | MAS2_I | MAS2_G;</div><div class='add'>+	tlbe-&gt;mas7_3 = (0xe0004500 &amp; 0xFFFFF000) | E500_TLB_SUPER_PERM_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='hunk'>@@ -76,32 +367,6 @@ int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* 'linear_address' is actually an encoding of AS|PID|EADDR . */</div><div class='del'>-int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,</div><div class='del'>-                               struct kvm_translation *tr)</div><div class='del'>-{</div><div class='del'>-	int index;</div><div class='del'>-	gva_t eaddr;</div><div class='del'>-	u8 pid;</div><div class='del'>-	u8 as;</div><div class='del'>-</div><div class='del'>-	eaddr = tr-&gt;linear_address;</div><div class='del'>-	pid = (tr-&gt;linear_address &gt;&gt; 32) &amp; 0xff;</div><div class='del'>-	as = (tr-&gt;linear_address &gt;&gt; 40) &amp; 0x1;</div><div class='del'>-</div><div class='del'>-	index = kvmppc_e500_tlb_search(vcpu, eaddr, pid, as);</div><div class='del'>-	if (index &lt; 0) {</div><div class='del'>-		tr-&gt;valid = 0;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tr-&gt;physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr);</div><div class='del'>-	/* XXX what does "writeable" and "usermode" even mean? */</div><div class='del'>-	tr-&gt;valid = 1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='hunk'>@@ -115,19 +380,6 @@ void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)</div><div class='ctx'> 	sregs-&gt;u.e.impl.fsl.hid0 = vcpu_e500-&gt;hid0;</div><div class='ctx'> 	sregs-&gt;u.e.impl.fsl.mcar = vcpu_e500-&gt;mcar;</div><div class='ctx'> </div><div class='del'>-	sregs-&gt;u.e.mas0 = vcpu-&gt;arch.shared-&gt;mas0;</div><div class='del'>-	sregs-&gt;u.e.mas1 = vcpu-&gt;arch.shared-&gt;mas1;</div><div class='del'>-	sregs-&gt;u.e.mas2 = vcpu-&gt;arch.shared-&gt;mas2;</div><div class='del'>-	sregs-&gt;u.e.mas7_3 = vcpu-&gt;arch.shared-&gt;mas7_3;</div><div class='del'>-	sregs-&gt;u.e.mas4 = vcpu-&gt;arch.shared-&gt;mas4;</div><div class='del'>-	sregs-&gt;u.e.mas6 = vcpu-&gt;arch.shared-&gt;mas6;</div><div class='del'>-</div><div class='del'>-	sregs-&gt;u.e.mmucfg = mfspr(SPRN_MMUCFG);</div><div class='del'>-	sregs-&gt;u.e.tlbcfg[0] = vcpu_e500-&gt;tlb0cfg;</div><div class='del'>-	sregs-&gt;u.e.tlbcfg[1] = vcpu_e500-&gt;tlb1cfg;</div><div class='del'>-	sregs-&gt;u.e.tlbcfg[2] = 0;</div><div class='del'>-	sregs-&gt;u.e.tlbcfg[3] = 0;</div><div class='del'>-</div><div class='ctx'> 	sregs-&gt;u.e.ivor_high[0] = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];</div><div class='ctx'> 	sregs-&gt;u.e.ivor_high[1] = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];</div><div class='ctx'> 	sregs-&gt;u.e.ivor_high[2] = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];</div><div class='hunk'>@@ -135,11 +387,13 @@ void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)</div><div class='ctx'> 		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];</div><div class='ctx'> </div><div class='ctx'> 	kvmppc_get_sregs_ivor(vcpu, sregs);</div><div class='add'>+	kvmppc_get_sregs_e500_tlb(vcpu, sregs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvmppc_core_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (sregs-&gt;u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {</div><div class='ctx'> 		vcpu_e500-&gt;svr = sregs-&gt;u.e.impl.fsl.svr;</div><div class='hunk'>@@ -147,14 +401,9 @@ int kvmppc_core_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)</div><div class='ctx'> 		vcpu_e500-&gt;mcar = sregs-&gt;u.e.impl.fsl.mcar;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (sregs-&gt;u.e.features &amp; KVM_SREGS_E_ARCH206_MMU) {</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;mas0 = sregs-&gt;u.e.mas0;</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;mas1 = sregs-&gt;u.e.mas1;</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;mas2 = sregs-&gt;u.e.mas2;</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;mas7_3 = sregs-&gt;u.e.mas7_3;</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;mas4 = sregs-&gt;u.e.mas4;</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;mas6 = sregs-&gt;u.e.mas6;</div><div class='del'>-	}</div><div class='add'>+	ret = kvmppc_set_sregs_e500_tlb(vcpu, sregs);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!(sregs-&gt;u.e.features &amp; KVM_SREGS_E_IVOR))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -193,9 +442,12 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto free_vcpu;</div><div class='ctx'> </div><div class='add'>+	if (kvmppc_e500_id_table_alloc(vcpu_e500) == NULL)</div><div class='add'>+		goto uninit_vcpu;</div><div class='add'>+</div><div class='ctx'> 	err = kvmppc_e500_tlb_init(vcpu_e500);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto uninit_vcpu;</div><div class='add'>+		goto uninit_id;</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.shared = (void*)__get_free_page(GFP_KERNEL|__GFP_ZERO);</div><div class='ctx'> 	if (!vcpu-&gt;arch.shared)</div><div class='hunk'>@@ -205,6 +457,8 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)</div><div class='ctx'> </div><div class='ctx'> uninit_tlb:</div><div class='ctx'> 	kvmppc_e500_tlb_uninit(vcpu_e500);</div><div class='add'>+uninit_id:</div><div class='add'>+	kvmppc_e500_id_table_free(vcpu_e500);</div><div class='ctx'> uninit_vcpu:</div><div class='ctx'> 	kvm_vcpu_uninit(vcpu);</div><div class='ctx'> free_vcpu:</div><div class='hunk'>@@ -218,11 +472,21 @@ void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	free_page((unsigned long)vcpu-&gt;arch.shared);</div><div class='del'>-	kvm_vcpu_uninit(vcpu);</div><div class='ctx'> 	kvmppc_e500_tlb_uninit(vcpu_e500);</div><div class='add'>+	kvmppc_e500_id_table_free(vcpu_e500);</div><div class='add'>+	kvm_vcpu_uninit(vcpu);</div><div class='ctx'> 	kmem_cache_free(kvm_vcpu_cache, vcpu_e500);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int kvmppc_core_init_vm(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_core_destroy_vm(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init kvmppc_e500_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int r, i;</div><div class='head'>diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h<br/>new file mode 100644<br/>index 000000000000..aa8b81428bf4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/e500.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/e500.h</a></div><div class='hunk'>@@ -0,0 +1,306 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * Author: Yu Liu &lt;yu.liu@freescale.com&gt;</div><div class='add'>+ *         Scott Wood &lt;scottwood@freescale.com&gt;</div><div class='add'>+ *         Ashish Kalra &lt;ashish.kalra@freescale.com&gt;</div><div class='add'>+ *         Varun Sethi &lt;varun.sethi@freescale.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Description:</div><div class='add'>+ * This file is based on arch/powerpc/kvm/44x_tlb.h and</div><div class='add'>+ * arch/powerpc/include/asm/kvm_44x.h by Hollis Blanchard &lt;hollisb@us.ibm.com&gt;,</div><div class='add'>+ * Copyright IBM Corp. 2007-2008</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License, version 2, as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef KVM_E500_H</div><div class='add'>+#define KVM_E500_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;asm/mmu-book3e.h&gt;</div><div class='add'>+#include &lt;asm/tlb.h&gt;</div><div class='add'>+</div><div class='add'>+#define E500_PID_NUM   3</div><div class='add'>+#define E500_TLB_NUM   2</div><div class='add'>+</div><div class='add'>+#define E500_TLB_VALID 1</div><div class='add'>+#define E500_TLB_DIRTY 2</div><div class='add'>+#define E500_TLB_BITMAP 4</div><div class='add'>+</div><div class='add'>+struct tlbe_ref {</div><div class='add'>+	pfn_t pfn;</div><div class='add'>+	unsigned int flags; /* E500_TLB_* */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tlbe_priv {</div><div class='add'>+	struct tlbe_ref ref; /* TLB0 only -- TLB1 uses tlb_refs */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_E500V2</div><div class='add'>+struct vcpu_id_table;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+struct kvmppc_e500_tlb_params {</div><div class='add'>+	int entries, ways, sets;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvmppc_vcpu_e500 {</div><div class='add'>+	struct kvm_vcpu vcpu;</div><div class='add'>+</div><div class='add'>+	/* Unmodified copy of the guest's TLB -- shared with host userspace. */</div><div class='add'>+	struct kvm_book3e_206_tlb_entry *gtlb_arch;</div><div class='add'>+</div><div class='add'>+	/* Starting entry number in gtlb_arch[] */</div><div class='add'>+	int gtlb_offset[E500_TLB_NUM];</div><div class='add'>+</div><div class='add'>+	/* KVM internal information associated with each guest TLB entry */</div><div class='add'>+	struct tlbe_priv *gtlb_priv[E500_TLB_NUM];</div><div class='add'>+</div><div class='add'>+	struct kvmppc_e500_tlb_params gtlb_params[E500_TLB_NUM];</div><div class='add'>+</div><div class='add'>+	unsigned int gtlb_nv[E500_TLB_NUM];</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * information associated with each host TLB entry --</div><div class='add'>+	 * TLB1 only for now.  If/when guest TLB1 entries can be</div><div class='add'>+	 * mapped with host TLB0, this will be used for that too.</div><div class='add'>+	 *</div><div class='add'>+	 * We don't want to use this for guest TLB0 because then we'd</div><div class='add'>+	 * have the overhead of doing the translation again even if</div><div class='add'>+	 * the entry is still in the guest TLB (e.g. we swapped out</div><div class='add'>+	 * and back, and our host TLB entries got evicted).</div><div class='add'>+	 */</div><div class='add'>+	struct tlbe_ref *tlb_refs[E500_TLB_NUM];</div><div class='add'>+	unsigned int host_tlb1_nv;</div><div class='add'>+</div><div class='add'>+	u32 svr;</div><div class='add'>+	u32 l1csr0;</div><div class='add'>+	u32 l1csr1;</div><div class='add'>+	u32 hid0;</div><div class='add'>+	u32 hid1;</div><div class='add'>+	u64 mcar;</div><div class='add'>+</div><div class='add'>+	struct page **shared_tlb_pages;</div><div class='add'>+	int num_shared_tlb_pages;</div><div class='add'>+</div><div class='add'>+	u64 *g2h_tlb1_map;</div><div class='add'>+	unsigned int *h2g_tlb1_rmap;</div><div class='add'>+</div><div class='add'>+	/* Minimum and maximum address mapped my TLB1 */</div><div class='add'>+	unsigned long tlb1_min_eaddr;</div><div class='add'>+	unsigned long tlb1_max_eaddr;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_E500V2</div><div class='add'>+	u32 pid[E500_PID_NUM];</div><div class='add'>+</div><div class='add'>+	/* vcpu id table */</div><div class='add'>+	struct vcpu_id_table *idt;</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct kvmppc_vcpu_e500 *to_e500(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return container_of(vcpu, struct kvmppc_vcpu_e500, vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* This geometry is the legacy default -- can be overridden by userspace */</div><div class='add'>+#define KVM_E500_TLB0_WAY_SIZE		128</div><div class='add'>+#define KVM_E500_TLB0_WAY_NUM		2</div><div class='add'>+</div><div class='add'>+#define KVM_E500_TLB0_SIZE  (KVM_E500_TLB0_WAY_SIZE * KVM_E500_TLB0_WAY_NUM)</div><div class='add'>+#define KVM_E500_TLB1_SIZE  16</div><div class='add'>+</div><div class='add'>+#define index_of(tlbsel, esel)	(((tlbsel) &lt;&lt; 16) | ((esel) &amp; 0xFFFF))</div><div class='add'>+#define tlbsel_of(index)	((index) &gt;&gt; 16)</div><div class='add'>+#define esel_of(index)		((index) &amp; 0xFFFF)</div><div class='add'>+</div><div class='add'>+#define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW)</div><div class='add'>+#define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW)</div><div class='add'>+#define MAS2_ATTRIB_MASK \</div><div class='add'>+	  (MAS2_X0 | MAS2_X1)</div><div class='add'>+#define MAS3_ATTRIB_MASK \</div><div class='add'>+	  (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \</div><div class='add'>+	   | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK)</div><div class='add'>+</div><div class='add'>+int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='add'>+				ulong value);</div><div class='add'>+int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu);</div><div class='add'>+int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu);</div><div class='add'>+int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb);</div><div class='add'>+int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int rt, int ra, int rb);</div><div class='add'>+int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb);</div><div class='add'>+int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500);</div><div class='add'>+void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500);</div><div class='add'>+</div><div class='add'>+void kvmppc_get_sregs_e500_tlb(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);</div><div class='add'>+int kvmppc_set_sregs_e500_tlb(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_E500V2</div><div class='add'>+unsigned int kvmppc_e500_get_sid(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='add'>+				 unsigned int as, unsigned int gid,</div><div class='add'>+				 unsigned int pr, int avoid_recursion);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* TLB helper functions */</div><div class='add'>+static inline unsigned int</div><div class='add'>+get_tlb_size(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='add'>+{</div><div class='add'>+	return (tlbe-&gt;mas1 &gt;&gt; 7) &amp; 0x1f;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline gva_t get_tlb_eaddr(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='add'>+{</div><div class='add'>+	return tlbe-&gt;mas2 &amp; 0xfffff000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 get_tlb_bytes(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='add'>+{</div><div class='add'>+	unsigned int pgsize = get_tlb_size(tlbe);</div><div class='add'>+	return 1ULL &lt;&lt; 10 &lt;&lt; pgsize;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline gva_t get_tlb_end(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='add'>+{</div><div class='add'>+	u64 bytes = get_tlb_bytes(tlbe);</div><div class='add'>+	return get_tlb_eaddr(tlbe) + bytes - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 get_tlb_raddr(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='add'>+{</div><div class='add'>+	return tlbe-&gt;mas7_3 &amp; ~0xfffULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+get_tlb_tid(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='add'>+{</div><div class='add'>+	return (tlbe-&gt;mas1 &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+get_tlb_ts(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='add'>+{</div><div class='add'>+	return (tlbe-&gt;mas1 &gt;&gt; 12) &amp; 0x1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+get_tlb_v(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='add'>+{</div><div class='add'>+	return (tlbe-&gt;mas1 &gt;&gt; 31) &amp; 0x1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+get_tlb_iprot(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='add'>+{</div><div class='add'>+	return (tlbe-&gt;mas1 &gt;&gt; 30) &amp; 0x1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+get_tlb_tsize(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='add'>+{</div><div class='add'>+	return (tlbe-&gt;mas1 &amp; MAS1_TSIZE_MASK) &gt;&gt; MAS1_TSIZE_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int get_cur_pid(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return vcpu-&gt;arch.pid &amp; 0xff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int get_cur_as(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return !!(vcpu-&gt;arch.shared-&gt;msr &amp; (MSR_IS | MSR_DS));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int get_cur_pr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return !!(vcpu-&gt;arch.shared-&gt;msr &amp; MSR_PR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int get_cur_spid(const struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return (vcpu-&gt;arch.shared-&gt;mas6 &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int get_cur_sas(const struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return vcpu-&gt;arch.shared-&gt;mas6 &amp; 0x1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int get_tlb_tlbsel(const struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Manual says that tlbsel has 2 bits wide.</div><div class='add'>+	 * Since we only have two TLBs, only lower bit is used.</div><div class='add'>+	 */</div><div class='add'>+	return (vcpu-&gt;arch.shared-&gt;mas0 &gt;&gt; 28) &amp; 0x1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int get_tlb_nv_bit(const struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return vcpu-&gt;arch.shared-&gt;mas0 &amp; 0xfff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int get_tlb_esel_bit(const struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return (vcpu-&gt;arch.shared-&gt;mas0 &gt;&gt; 16) &amp; 0xfff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,</div><div class='add'>+			const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='add'>+{</div><div class='add'>+	gpa_t gpa;</div><div class='add'>+</div><div class='add'>+	if (!get_tlb_v(tlbe))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	/* Does it match current guest AS? */</div><div class='add'>+	/* XXX what about IS != DS? */</div><div class='add'>+	if (get_tlb_ts(tlbe) != !!(vcpu-&gt;arch.shared-&gt;msr &amp; MSR_IS))</div><div class='add'>+		return 0;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	gpa = get_tlb_raddr(tlbe);</div><div class='add'>+	if (!gfn_to_memslot(vcpu-&gt;kvm, gpa &gt;&gt; PAGE_SHIFT))</div><div class='add'>+		/* Mapping is not for RAM. */</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct kvm_book3e_206_tlb_entry *get_entry(</div><div class='add'>+	struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel, int entry)</div><div class='add'>+{</div><div class='add'>+	int offset = vcpu_e500-&gt;gtlb_offset[tlbsel];</div><div class='add'>+	return &amp;vcpu_e500-&gt;gtlb_arch[offset + entry];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_e500_tlbil_one(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='add'>+			   struct kvm_book3e_206_tlb_entry *gtlbe);</div><div class='add'>+void kvmppc_e500_tlbil_all(struct kvmppc_vcpu_e500 *vcpu_e500);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+#define kvmppc_e500_get_tlb_stid(vcpu, gtlbe)       get_tlb_tid(gtlbe)</div><div class='add'>+#define get_tlbmiss_tid(vcpu)           get_cur_pid(vcpu)</div><div class='add'>+#define get_tlb_sts(gtlbe)              (gtlbe-&gt;mas1 &amp; MAS1_TS)</div><div class='add'>+#else</div><div class='add'>+unsigned int kvmppc_e500_get_tlb_stid(struct kvm_vcpu *vcpu,</div><div class='add'>+				      struct kvm_book3e_206_tlb_entry *gtlbe);</div><div class='add'>+</div><div class='add'>+static inline unsigned int get_tlbmiss_tid(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='add'>+	unsigned int tidseld = (vcpu-&gt;arch.shared-&gt;mas4 &gt;&gt; 16) &amp; 0xf;</div><div class='add'>+</div><div class='add'>+	return vcpu_e500-&gt;pid[tidseld];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Force TS=1 for all guest mappings. */</div><div class='add'>+#define get_tlb_sts(gtlbe)              (MAS1_TS)</div><div class='add'>+#endif /* !BOOKE_HV */</div><div class='add'>+</div><div class='add'>+#endif /* KVM_E500_H */</div><div class='head'>diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c<br/>index 6d0b2bd54fb0..8b99e076dc81 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/e500_emulate.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/e500_emulate.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/e500_emulate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/e500_emulate.c</a></div><div class='hunk'>@@ -14,27 +14,96 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/kvm_ppc.h&gt;</div><div class='ctx'> #include &lt;asm/disassemble.h&gt;</div><div class='del'>-#include &lt;asm/kvm_e500.h&gt;</div><div class='add'>+#include &lt;asm/dbell.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "booke.h"</div><div class='del'>-#include "e500_tlb.h"</div><div class='add'>+#include "e500.h"</div><div class='ctx'> </div><div class='add'>+#define XOP_MSGSND  206</div><div class='add'>+#define XOP_MSGCLR  238</div><div class='ctx'> #define XOP_TLBIVAX 786</div><div class='ctx'> #define XOP_TLBSX   914</div><div class='ctx'> #define XOP_TLBRE   946</div><div class='ctx'> #define XOP_TLBWE   978</div><div class='add'>+#define XOP_TLBILX  18</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_E500MC</div><div class='add'>+static int dbell2prio(ulong param)</div><div class='add'>+{</div><div class='add'>+	int msg = param &amp; PPC_DBELL_TYPE_MASK;</div><div class='add'>+	int prio = -1;</div><div class='add'>+</div><div class='add'>+	switch (msg) {</div><div class='add'>+	case PPC_DBELL_TYPE(PPC_DBELL):</div><div class='add'>+		prio = BOOKE_IRQPRIO_DBELL;</div><div class='add'>+		break;</div><div class='add'>+	case PPC_DBELL_TYPE(PPC_DBELL_CRIT):</div><div class='add'>+		prio = BOOKE_IRQPRIO_DBELL_CRIT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return prio;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)</div><div class='add'>+{</div><div class='add'>+	ulong param = vcpu-&gt;arch.gpr[rb];</div><div class='add'>+	int prio = dbell2prio(param);</div><div class='add'>+</div><div class='add'>+	if (prio &lt; 0)</div><div class='add'>+		return EMULATE_FAIL;</div><div class='add'>+</div><div class='add'>+	clear_bit(prio, &amp;vcpu-&gt;arch.pending_exceptions);</div><div class='add'>+	return EMULATE_DONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)</div><div class='add'>+{</div><div class='add'>+	ulong param = vcpu-&gt;arch.gpr[rb];</div><div class='add'>+	int prio = dbell2prio(rb);</div><div class='add'>+	int pir = param &amp; PPC_DBELL_PIR_MASK;</div><div class='add'>+	int i;</div><div class='add'>+	struct kvm_vcpu *cvcpu;</div><div class='add'>+</div><div class='add'>+	if (prio &lt; 0)</div><div class='add'>+		return EMULATE_FAIL;</div><div class='add'>+</div><div class='add'>+	kvm_for_each_vcpu(i, cvcpu, vcpu-&gt;kvm) {</div><div class='add'>+		int cpir = cvcpu-&gt;arch.shared-&gt;pir;</div><div class='add'>+		if ((param &amp; PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {</div><div class='add'>+			set_bit(prio, &amp;cvcpu-&gt;arch.pending_exceptions);</div><div class='add'>+			kvm_vcpu_kick(cvcpu);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return EMULATE_DONE;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'>                            unsigned int inst, int *advance)</div><div class='ctx'> {</div><div class='ctx'> 	int emulated = EMULATE_DONE;</div><div class='del'>-	int ra;</div><div class='del'>-	int rb;</div><div class='add'>+	int ra = get_ra(inst);</div><div class='add'>+	int rb = get_rb(inst);</div><div class='add'>+	int rt = get_rt(inst);</div><div class='ctx'> </div><div class='ctx'> 	switch (get_op(inst)) {</div><div class='ctx'> 	case 31:</div><div class='ctx'> 		switch (get_xop(inst)) {</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM_E500MC</div><div class='add'>+		case XOP_MSGSND:</div><div class='add'>+			emulated = kvmppc_e500_emul_msgsnd(vcpu, rb);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case XOP_MSGCLR:</div><div class='add'>+			emulated = kvmppc_e500_emul_msgclr(vcpu, rb);</div><div class='add'>+			break;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 		case XOP_TLBRE:</div><div class='ctx'> 			emulated = kvmppc_e500_emul_tlbre(vcpu);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -44,13 +113,14 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case XOP_TLBSX:</div><div class='del'>-			rb = get_rb(inst);</div><div class='ctx'> 			emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case XOP_TLBILX:</div><div class='add'>+			emulated = kvmppc_e500_emul_tlbilx(vcpu, rt, ra, rb);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		case XOP_TLBIVAX:</div><div class='del'>-			ra = get_ra(inst);</div><div class='del'>-			rb = get_rb(inst);</div><div class='ctx'> 			emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -70,52 +140,63 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,</div><div class='ctx'> 	return emulated;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)</div><div class='add'>+int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='ctx'> 	int emulated = EMULATE_DONE;</div><div class='del'>-	ulong spr_val = kvmppc_get_gpr(vcpu, rs);</div><div class='ctx'> </div><div class='ctx'> 	switch (sprn) {</div><div class='add'>+#ifndef CONFIG_KVM_BOOKE_HV</div><div class='ctx'> 	case SPRN_PID:</div><div class='ctx'> 		kvmppc_set_pid(vcpu, spr_val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_PID1:</div><div class='ctx'> 		if (spr_val != 0)</div><div class='ctx'> 			return EMULATE_FAIL;</div><div class='del'>-		vcpu_e500-&gt;pid[1] = spr_val; break;</div><div class='add'>+		vcpu_e500-&gt;pid[1] = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_PID2:</div><div class='ctx'> 		if (spr_val != 0)</div><div class='ctx'> 			return EMULATE_FAIL;</div><div class='del'>-		vcpu_e500-&gt;pid[2] = spr_val; break;</div><div class='add'>+		vcpu_e500-&gt;pid[2] = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_MAS0:</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;mas0 = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;mas0 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_MAS1:</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;mas1 = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;mas1 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_MAS2:</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;mas2 = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;mas2 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_MAS3:</div><div class='ctx'> 		vcpu-&gt;arch.shared-&gt;mas7_3 &amp;= ~(u64)0xffffffff;</div><div class='ctx'> 		vcpu-&gt;arch.shared-&gt;mas7_3 |= spr_val;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_MAS4:</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;mas4 = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;mas4 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_MAS6:</div><div class='del'>-		vcpu-&gt;arch.shared-&gt;mas6 = spr_val; break;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;mas6 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_MAS7:</div><div class='ctx'> 		vcpu-&gt;arch.shared-&gt;mas7_3 &amp;= (u64)0xffffffff;</div><div class='ctx'> 		vcpu-&gt;arch.shared-&gt;mas7_3 |= (u64)spr_val &lt;&lt; 32;</div><div class='ctx'> 		break;</div><div class='add'>+#endif</div><div class='ctx'> 	case SPRN_L1CSR0:</div><div class='ctx'> 		vcpu_e500-&gt;l1csr0 = spr_val;</div><div class='ctx'> 		vcpu_e500-&gt;l1csr0 &amp;= ~(L1CSR0_DCFI | L1CSR0_CLFC);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_L1CSR1:</div><div class='del'>-		vcpu_e500-&gt;l1csr1 = spr_val; break;</div><div class='add'>+		vcpu_e500-&gt;l1csr1 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_HID0:</div><div class='del'>-		vcpu_e500-&gt;hid0 = spr_val; break;</div><div class='add'>+		vcpu_e500-&gt;hid0 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_HID1:</div><div class='del'>-		vcpu_e500-&gt;hid1 = spr_val; break;</div><div class='add'>+		vcpu_e500-&gt;hid1 = spr_val;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPRN_MMUCSR0:</div><div class='ctx'> 		emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,</div><div class='hunk'>@@ -135,81 +216,112 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)</div><div class='ctx'> 	case SPRN_IVOR35:</div><div class='ctx'> 		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;</div><div class='ctx'> 		break;</div><div class='del'>-</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	case SPRN_IVOR36:</div><div class='add'>+		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;</div><div class='add'>+		break;</div><div class='add'>+	case SPRN_IVOR37:</div><div class='add'>+		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='ctx'> 	default:</div><div class='del'>-		emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);</div><div class='add'>+		emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return emulated;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)</div><div class='add'>+int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='ctx'> 	int emulated = EMULATE_DONE;</div><div class='del'>-	unsigned long val;</div><div class='ctx'> </div><div class='ctx'> 	switch (sprn) {</div><div class='add'>+#ifndef CONFIG_KVM_BOOKE_HV</div><div class='ctx'> 	case SPRN_PID:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu_e500-&gt;pid[0]); break;</div><div class='add'>+		*spr_val = vcpu_e500-&gt;pid[0];</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_PID1:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu_e500-&gt;pid[1]); break;</div><div class='add'>+		*spr_val = vcpu_e500-&gt;pid[1];</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_PID2:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu_e500-&gt;pid[2]); break;</div><div class='add'>+		*spr_val = vcpu_e500-&gt;pid[2];</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_MAS0:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;mas0); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.shared-&gt;mas0;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_MAS1:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;mas1); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.shared-&gt;mas1;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_MAS2:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;mas2); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.shared-&gt;mas2;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_MAS3:</div><div class='del'>-		val = (u32)vcpu-&gt;arch.shared-&gt;mas7_3;</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, val);</div><div class='add'>+		*spr_val = (u32)vcpu-&gt;arch.shared-&gt;mas7_3;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_MAS4:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;mas4); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.shared-&gt;mas4;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_MAS6:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;mas6); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.shared-&gt;mas6;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_MAS7:</div><div class='del'>-		val = vcpu-&gt;arch.shared-&gt;mas7_3 &gt;&gt; 32;</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, val);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.shared-&gt;mas7_3 &gt;&gt; 32;</div><div class='ctx'> 		break;</div><div class='add'>+#endif</div><div class='ctx'> 	case SPRN_TLB0CFG:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu_e500-&gt;tlb0cfg); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.tlbcfg[0];</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_TLB1CFG:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu_e500-&gt;tlb1cfg); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.tlbcfg[1];</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_L1CSR0:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu_e500-&gt;l1csr0); break;</div><div class='add'>+		*spr_val = vcpu_e500-&gt;l1csr0;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_L1CSR1:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu_e500-&gt;l1csr1); break;</div><div class='add'>+		*spr_val = vcpu_e500-&gt;l1csr1;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_HID0:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu_e500-&gt;hid0); break;</div><div class='add'>+		*spr_val = vcpu_e500-&gt;hid0;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_HID1:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu_e500-&gt;hid1); break;</div><div class='add'>+		*spr_val = vcpu_e500-&gt;hid1;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPRN_SVR:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu_e500-&gt;svr); break;</div><div class='add'>+		*spr_val = vcpu_e500-&gt;svr;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPRN_MMUCSR0:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, 0); break;</div><div class='add'>+		*spr_val = 0;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPRN_MMUCFG:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, mfspr(SPRN_MMUCFG)); break;</div><div class='add'>+		*spr_val = vcpu-&gt;arch.mmucfg;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='ctx'> 	/* extra exceptions */</div><div class='ctx'> 	case SPRN_IVOR32:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR33:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR34:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPRN_IVOR35:</div><div class='del'>-		kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]);</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];</div><div class='add'>+		break;</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	case SPRN_IVOR36:</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DBELL];</div><div class='add'>+		break;</div><div class='add'>+	case SPRN_IVOR37:</div><div class='add'>+		*spr_val = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];</div><div class='ctx'> 		break;</div><div class='add'>+#endif</div><div class='ctx'> 	default:</div><div class='del'>-		emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);</div><div class='add'>+		emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return emulated;</div><div class='head'>diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c<br/>index 6e53e4164de1..c510fc961302 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/e500_tlb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/e500_tlb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/e500_tlb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/e500_tlb.c</a></div><div class='hunk'>@@ -2,6 +2,9 @@</div><div class='ctx'>  * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * Author: Yu Liu, yu.liu@freescale.com</div><div class='add'>+ *         Scott Wood, scottwood@freescale.com</div><div class='add'>+ *         Ashish Kalra, ashish.kalra@freescale.com</div><div class='add'>+ *         Varun Sethi, varun.sethi@freescale.com</div><div class='ctx'>  *</div><div class='ctx'>  * Description:</div><div class='ctx'>  * This file is based on arch/powerpc/kvm/44x_tlb.c,</div><div class='hunk'>@@ -26,210 +29,15 @@</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/hugetlb.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_ppc.h&gt;</div><div class='del'>-#include &lt;asm/kvm_e500.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../mm/mmu_decl.h"</div><div class='del'>-#include "e500_tlb.h"</div><div class='add'>+#include "e500.h"</div><div class='ctx'> #include "trace.h"</div><div class='ctx'> #include "timing.h"</div><div class='ctx'> </div><div class='ctx'> #define to_htlb1_esel(esel) (host_tlb_params[1].entries - (esel) - 1)</div><div class='ctx'> </div><div class='del'>-struct id {</div><div class='del'>-	unsigned long val;</div><div class='del'>-	struct id **pentry;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define NUM_TIDS 256</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This table provide mappings from:</div><div class='del'>- * (guestAS,guestTID,guestPR) --&gt; ID of physical cpu</div><div class='del'>- * guestAS	[0..1]</div><div class='del'>- * guestTID	[0..255]</div><div class='del'>- * guestPR	[0..1]</div><div class='del'>- * ID		[1..255]</div><div class='del'>- * Each vcpu keeps one vcpu_id_table.</div><div class='del'>- */</div><div class='del'>-struct vcpu_id_table {</div><div class='del'>-	struct id id[2][NUM_TIDS][2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This table provide reversed mappings of vcpu_id_table:</div><div class='del'>- * ID --&gt; address of vcpu_id_table item.</div><div class='del'>- * Each physical core has one pcpu_id_table.</div><div class='del'>- */</div><div class='del'>-struct pcpu_id_table {</div><div class='del'>-	struct id *entry[NUM_TIDS];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static DEFINE_PER_CPU(struct pcpu_id_table, pcpu_sids);</div><div class='del'>-</div><div class='del'>-/* This variable keeps last used shadow ID on local core.</div><div class='del'>- * The valid range of shadow ID is [1..255] */</div><div class='del'>-static DEFINE_PER_CPU(unsigned long, pcpu_last_used_sid);</div><div class='del'>-</div><div class='ctx'> static struct kvmppc_e500_tlb_params host_tlb_params[E500_TLB_NUM];</div><div class='ctx'> </div><div class='del'>-static struct kvm_book3e_206_tlb_entry *get_entry(</div><div class='del'>-	struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel, int entry)</div><div class='del'>-{</div><div class='del'>-	int offset = vcpu_e500-&gt;gtlb_offset[tlbsel];</div><div class='del'>-	return &amp;vcpu_e500-&gt;gtlb_arch[offset + entry];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Allocate a free shadow id and setup a valid sid mapping in given entry.</div><div class='del'>- * A mapping is only valid when vcpu_id_table and pcpu_id_table are match.</div><div class='del'>- *</div><div class='del'>- * The caller must have preemption disabled, and keep it that way until</div><div class='del'>- * it has finished with the returned shadow id (either written into the</div><div class='del'>- * TLB or arch.shadow_pid, or discarded).</div><div class='del'>- */</div><div class='del'>-static inline int local_sid_setup_one(struct id *entry)</div><div class='del'>-{</div><div class='del'>-	unsigned long sid;</div><div class='del'>-	int ret = -1;</div><div class='del'>-</div><div class='del'>-	sid = ++(__get_cpu_var(pcpu_last_used_sid));</div><div class='del'>-	if (sid &lt; NUM_TIDS) {</div><div class='del'>-		__get_cpu_var(pcpu_sids).entry[sid] = entry;</div><div class='del'>-		entry-&gt;val = sid;</div><div class='del'>-		entry-&gt;pentry = &amp;__get_cpu_var(pcpu_sids).entry[sid];</div><div class='del'>-		ret = sid;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If sid == NUM_TIDS, we've run out of sids.  We return -1, and</div><div class='del'>-	 * the caller will invalidate everything and start over.</div><div class='del'>-	 *</div><div class='del'>-	 * sid &gt; NUM_TIDS indicates a race, which we disable preemption to</div><div class='del'>-	 * avoid.</div><div class='del'>-	 */</div><div class='del'>-	WARN_ON(sid &gt; NUM_TIDS);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Check if given entry contain a valid shadow id mapping.</div><div class='del'>- * An ID mapping is considered valid only if</div><div class='del'>- * both vcpu and pcpu know this mapping.</div><div class='del'>- *</div><div class='del'>- * The caller must have preemption disabled, and keep it that way until</div><div class='del'>- * it has finished with the returned shadow id (either written into the</div><div class='del'>- * TLB or arch.shadow_pid, or discarded).</div><div class='del'>- */</div><div class='del'>-static inline int local_sid_lookup(struct id *entry)</div><div class='del'>-{</div><div class='del'>-	if (entry &amp;&amp; entry-&gt;val != 0 &amp;&amp;</div><div class='del'>-	    __get_cpu_var(pcpu_sids).entry[entry-&gt;val] == entry &amp;&amp;</div><div class='del'>-	    entry-&gt;pentry == &amp;__get_cpu_var(pcpu_sids).entry[entry-&gt;val])</div><div class='del'>-		return entry-&gt;val;</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Invalidate all id mappings on local core -- call with preempt disabled */</div><div class='del'>-static inline void local_sid_destroy_all(void)</div><div class='del'>-{</div><div class='del'>-	__get_cpu_var(pcpu_last_used_sid) = 0;</div><div class='del'>-	memset(&amp;__get_cpu_var(pcpu_sids), 0, sizeof(__get_cpu_var(pcpu_sids)));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void *kvmppc_e500_id_table_alloc(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='del'>-{</div><div class='del'>-	vcpu_e500-&gt;idt = kzalloc(sizeof(struct vcpu_id_table), GFP_KERNEL);</div><div class='del'>-	return vcpu_e500-&gt;idt;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvmppc_e500_id_table_free(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='del'>-{</div><div class='del'>-	kfree(vcpu_e500-&gt;idt);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Invalidate all mappings on vcpu */</div><div class='del'>-static void kvmppc_e500_id_table_reset_all(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='del'>-{</div><div class='del'>-	memset(vcpu_e500-&gt;idt, 0, sizeof(struct vcpu_id_table));</div><div class='del'>-</div><div class='del'>-	/* Update shadow pid when mappings are changed */</div><div class='del'>-	kvmppc_e500_recalc_shadow_pid(vcpu_e500);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Invalidate one ID mapping on vcpu */</div><div class='del'>-static inline void kvmppc_e500_id_table_reset_one(</div><div class='del'>-			       struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='del'>-			       int as, int pid, int pr)</div><div class='del'>-{</div><div class='del'>-	struct vcpu_id_table *idt = vcpu_e500-&gt;idt;</div><div class='del'>-</div><div class='del'>-	BUG_ON(as &gt;= 2);</div><div class='del'>-	BUG_ON(pid &gt;= NUM_TIDS);</div><div class='del'>-	BUG_ON(pr &gt;= 2);</div><div class='del'>-</div><div class='del'>-	idt-&gt;id[as][pid][pr].val = 0;</div><div class='del'>-	idt-&gt;id[as][pid][pr].pentry = NULL;</div><div class='del'>-</div><div class='del'>-	/* Update shadow pid when mappings are changed */</div><div class='del'>-	kvmppc_e500_recalc_shadow_pid(vcpu_e500);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Map guest (vcpu,AS,ID,PR) to physical core shadow id.</div><div class='del'>- * This function first lookup if a valid mapping exists,</div><div class='del'>- * if not, then creates a new one.</div><div class='del'>- *</div><div class='del'>- * The caller must have preemption disabled, and keep it that way until</div><div class='del'>- * it has finished with the returned shadow id (either written into the</div><div class='del'>- * TLB or arch.shadow_pid, or discarded).</div><div class='del'>- */</div><div class='del'>-static unsigned int kvmppc_e500_get_sid(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='del'>-					unsigned int as, unsigned int gid,</div><div class='del'>-					unsigned int pr, int avoid_recursion)</div><div class='del'>-{</div><div class='del'>-	struct vcpu_id_table *idt = vcpu_e500-&gt;idt;</div><div class='del'>-	int sid;</div><div class='del'>-</div><div class='del'>-	BUG_ON(as &gt;= 2);</div><div class='del'>-	BUG_ON(gid &gt;= NUM_TIDS);</div><div class='del'>-	BUG_ON(pr &gt;= 2);</div><div class='del'>-</div><div class='del'>-	sid = local_sid_lookup(&amp;idt-&gt;id[as][gid][pr]);</div><div class='del'>-</div><div class='del'>-	while (sid &lt;= 0) {</div><div class='del'>-		/* No mapping yet */</div><div class='del'>-		sid = local_sid_setup_one(&amp;idt-&gt;id[as][gid][pr]);</div><div class='del'>-		if (sid &lt;= 0) {</div><div class='del'>-			_tlbil_all();</div><div class='del'>-			local_sid_destroy_all();</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Update shadow pid when mappings are changed */</div><div class='del'>-		if (!avoid_recursion)</div><div class='del'>-			kvmppc_e500_recalc_shadow_pid(vcpu_e500);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return sid;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Map guest pid to shadow.</div><div class='del'>- * We use PID to keep shadow of current guest non-zero PID,</div><div class='del'>- * and use PID1 to keep shadow of guest zero PID.</div><div class='del'>- * So that guest tlbe with TID=0 can be accessed at any time */</div><div class='del'>-void kvmppc_e500_recalc_shadow_pid(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='del'>-{</div><div class='del'>-	preempt_disable();</div><div class='del'>-	vcpu_e500-&gt;vcpu.arch.shadow_pid = kvmppc_e500_get_sid(vcpu_e500,</div><div class='del'>-			get_cur_as(&amp;vcpu_e500-&gt;vcpu),</div><div class='del'>-			get_cur_pid(&amp;vcpu_e500-&gt;vcpu),</div><div class='del'>-			get_cur_pr(&amp;vcpu_e500-&gt;vcpu), 1);</div><div class='del'>-	vcpu_e500-&gt;vcpu.arch.shadow_pid1 = kvmppc_e500_get_sid(vcpu_e500,</div><div class='del'>-			get_cur_as(&amp;vcpu_e500-&gt;vcpu), 0,</div><div class='del'>-			get_cur_pr(&amp;vcpu_e500-&gt;vcpu), 1);</div><div class='del'>-	preempt_enable();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline unsigned int gtlb0_get_next_victim(</div><div class='ctx'> 		struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='ctx'> {</div><div class='hunk'>@@ -258,6 +66,7 @@ static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)</div><div class='ctx'> 	/* Mask off reserved bits. */</div><div class='ctx'> 	mas3 &amp;= MAS3_ATTRIB_MASK;</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_KVM_BOOKE_HV</div><div class='ctx'> 	if (!usermode) {</div><div class='ctx'> 		/* Guest is in supervisor mode,</div><div class='ctx'> 		 * so we need to translate guest</div><div class='hunk'>@@ -265,8 +74,9 @@ static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)</div><div class='ctx'> 		mas3 &amp;= ~E500_TLB_USER_PERM_MASK;</div><div class='ctx'> 		mas3 |= (mas3 &amp; E500_TLB_SUPER_PERM_MASK) &lt;&lt; 1;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return mas3 | E500_TLB_SUPER_PERM_MASK;</div><div class='add'>+	mas3 |= E500_TLB_SUPER_PERM_MASK;</div><div class='add'>+#endif</div><div class='add'>+	return mas3;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)</div><div class='hunk'>@@ -292,7 +102,16 @@ static inline void __write_host_tlbe(struct kvm_book3e_206_tlb_entry *stlbe,</div><div class='ctx'> 	mtspr(SPRN_MAS2, (unsigned long)stlbe-&gt;mas2);</div><div class='ctx'> 	mtspr(SPRN_MAS3, (u32)stlbe-&gt;mas7_3);</div><div class='ctx'> 	mtspr(SPRN_MAS7, (u32)(stlbe-&gt;mas7_3 &gt;&gt; 32));</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	mtspr(SPRN_MAS8, stlbe-&gt;mas8);</div><div class='add'>+#endif</div><div class='ctx'> 	asm volatile("isync; tlbwe" : : : "memory");</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	/* Must clear mas8 for other host tlbwe's */</div><div class='add'>+	mtspr(SPRN_MAS8, 0);</div><div class='add'>+	isync();</div><div class='add'>+#endif</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> </div><div class='ctx'> 	trace_kvm_booke206_stlb_write(mas0, stlbe-&gt;mas8, stlbe-&gt;mas1,</div><div class='hunk'>@@ -337,6 +156,7 @@ static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM_E500V2</div><div class='ctx'> void kvmppc_map_magic(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='hunk'>@@ -361,75 +181,41 @@ void kvmppc_map_magic(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	__write_host_tlbe(&amp;magic, MAS0_TLBSEL(1) | MAS0_ESEL(tlbcam_index));</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-void kvmppc_e500_tlb_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='del'>-{</div><div class='del'>-	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='del'>-</div><div class='del'>-	/* Shadow PID may be expired on local core */</div><div class='del'>-	kvmppc_e500_recalc_shadow_pid(vcpu_e500);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void kvmppc_e500_tlb_put(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> 				int tlbsel, int esel)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_book3e_206_tlb_entry *gtlbe =</div><div class='ctx'> 		get_entry(vcpu_e500, tlbsel, esel);</div><div class='del'>-	struct vcpu_id_table *idt = vcpu_e500-&gt;idt;</div><div class='del'>-	unsigned int pr, tid, ts, pid;</div><div class='del'>-	u32 val, eaddr;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	ts = get_tlb_ts(gtlbe);</div><div class='del'>-	tid = get_tlb_tid(gtlbe);</div><div class='del'>-</div><div class='del'>-	preempt_disable();</div><div class='del'>-</div><div class='del'>-	/* One guest ID may be mapped to two shadow IDs */</div><div class='del'>-	for (pr = 0; pr &lt; 2; pr++) {</div><div class='del'>-		/*</div><div class='del'>-		 * The shadow PID can have a valid mapping on at most one</div><div class='del'>-		 * host CPU.  In the common case, it will be valid on this</div><div class='del'>-		 * CPU, in which case (for TLB0) we do a local invalidation</div><div class='del'>-		 * of the specific address.</div><div class='del'>-		 *</div><div class='del'>-		 * If the shadow PID is not valid on the current host CPU, or</div><div class='del'>-		 * if we're invalidating a TLB1 entry, we invalidate the</div><div class='del'>-		 * entire shadow PID.</div><div class='del'>-		 */</div><div class='del'>-		if (tlbsel == 1 ||</div><div class='del'>-		    (pid = local_sid_lookup(&amp;idt-&gt;id[ts][tid][pr])) &lt;= 0) {</div><div class='del'>-			kvmppc_e500_id_table_reset_one(vcpu_e500, ts, tid, pr);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * The guest is invalidating a TLB0 entry which is in a PID</div><div class='del'>-		 * that has a valid shadow mapping on this host CPU.  We</div><div class='del'>-		 * search host TLB0 to invalidate it's shadow TLB entry,</div><div class='del'>-		 * similar to __tlbil_va except that we need to look in AS1.</div><div class='del'>-		 */</div><div class='del'>-		val = (pid &lt;&lt; MAS6_SPID_SHIFT) | MAS6_SAS;</div><div class='del'>-		eaddr = get_tlb_eaddr(gtlbe);</div><div class='add'>+	if (tlbsel == 1 &amp;&amp;</div><div class='add'>+	    vcpu_e500-&gt;gtlb_priv[1][esel].ref.flags &amp; E500_TLB_BITMAP) {</div><div class='add'>+		u64 tmp = vcpu_e500-&gt;g2h_tlb1_map[esel];</div><div class='add'>+		int hw_tlb_indx;</div><div class='add'>+		unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 		local_irq_save(flags);</div><div class='del'>-</div><div class='del'>-		mtspr(SPRN_MAS6, val);</div><div class='del'>-		asm volatile("tlbsx 0, %[eaddr]" : : [eaddr] "r" (eaddr));</div><div class='del'>-		val = mfspr(SPRN_MAS1);</div><div class='del'>-		if (val &amp; MAS1_VALID) {</div><div class='del'>-			mtspr(SPRN_MAS1, val &amp; ~MAS1_VALID);</div><div class='add'>+		while (tmp) {</div><div class='add'>+			hw_tlb_indx = __ilog2_u64(tmp &amp; -tmp);</div><div class='add'>+			mtspr(SPRN_MAS0,</div><div class='add'>+			      MAS0_TLBSEL(1) |</div><div class='add'>+			      MAS0_ESEL(to_htlb1_esel(hw_tlb_indx)));</div><div class='add'>+			mtspr(SPRN_MAS1, 0);</div><div class='ctx'> 			asm volatile("tlbwe");</div><div class='add'>+			vcpu_e500-&gt;h2g_tlb1_rmap[hw_tlb_indx] = 0;</div><div class='add'>+			tmp &amp;= tmp - 1;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='add'>+		mb();</div><div class='add'>+		vcpu_e500-&gt;g2h_tlb1_map[esel] = 0;</div><div class='add'>+		vcpu_e500-&gt;gtlb_priv[1][esel].ref.flags &amp;= ~E500_TLB_BITMAP;</div><div class='ctx'> 		local_irq_restore(flags);</div><div class='add'>+</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	preempt_enable();</div><div class='add'>+	/* Guest tlbe is backed by at most one host tlbe per shadow pid. */</div><div class='add'>+	kvmppc_e500_tlbil_one(vcpu_e500, gtlbe);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tlb0_set_base(gva_t addr, int sets, int ways)</div><div class='hunk'>@@ -475,6 +261,9 @@ static int kvmppc_e500_tlb_index(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> 		set_base = gtlb0_set_base(vcpu_e500, eaddr);</div><div class='ctx'> 		size = vcpu_e500-&gt;gtlb_params[0].ways;</div><div class='ctx'> 	} else {</div><div class='add'>+		if (eaddr &lt; vcpu_e500-&gt;tlb1_min_eaddr ||</div><div class='add'>+				eaddr &gt; vcpu_e500-&gt;tlb1_max_eaddr)</div><div class='add'>+			return -1;</div><div class='ctx'> 		set_base = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -530,6 +319,16 @@ static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='add'>+{</div><div class='add'>+	if (vcpu_e500-&gt;g2h_tlb1_map)</div><div class='add'>+		memset(vcpu_e500-&gt;g2h_tlb1_map,</div><div class='add'>+		       sizeof(u64) * vcpu_e500-&gt;gtlb_params[1].entries, 0);</div><div class='add'>+	if (vcpu_e500-&gt;h2g_tlb1_rmap)</div><div class='add'>+		memset(vcpu_e500-&gt;h2g_tlb1_rmap,</div><div class='add'>+		       sizeof(unsigned int) * host_tlb_params[1].entries, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='ctx'> {</div><div class='ctx'> 	int tlbsel = 0;</div><div class='hunk'>@@ -547,7 +346,7 @@ static void clear_tlb_refs(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='ctx'> 	int stlbsel = 1;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	kvmppc_e500_id_table_reset_all(vcpu_e500);</div><div class='add'>+	kvmppc_e500_tlbil_all(vcpu_e500);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; host_tlb_params[stlbsel].entries; i++) {</div><div class='ctx'> 		struct tlbe_ref *ref =</div><div class='hunk'>@@ -562,19 +361,18 @@ static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		unsigned int eaddr, int as)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='del'>-	unsigned int victim, pidsel, tsized;</div><div class='add'>+	unsigned int victim, tsized;</div><div class='ctx'> 	int tlbsel;</div><div class='ctx'> </div><div class='ctx'> 	/* since we only have two TLBs, only lower bit is used. */</div><div class='ctx'> 	tlbsel = (vcpu-&gt;arch.shared-&gt;mas4 &gt;&gt; 28) &amp; 0x1;</div><div class='ctx'> 	victim = (tlbsel == 0) ? gtlb0_get_next_victim(vcpu_e500) : 0;</div><div class='del'>-	pidsel = (vcpu-&gt;arch.shared-&gt;mas4 &gt;&gt; 16) &amp; 0xf;</div><div class='ctx'> 	tsized = (vcpu-&gt;arch.shared-&gt;mas4 &gt;&gt; 7) &amp; 0x1f;</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.shared-&gt;mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)</div><div class='ctx'> 		| MAS0_NV(vcpu_e500-&gt;gtlb_nv[tlbsel]);</div><div class='ctx'> 	vcpu-&gt;arch.shared-&gt;mas1 = MAS1_VALID | (as ? MAS1_TS : 0)</div><div class='del'>-		| MAS1_TID(vcpu_e500-&gt;pid[pidsel])</div><div class='add'>+		| MAS1_TID(get_tlbmiss_tid(vcpu))</div><div class='ctx'> 		| MAS1_TSIZE(tsized);</div><div class='ctx'> 	vcpu-&gt;arch.shared-&gt;mas2 = (eaddr &amp; MAS2_EPN)</div><div class='ctx'> 		| (vcpu-&gt;arch.shared-&gt;mas4 &amp; MAS2_ATTRIB_MASK);</div><div class='hunk'>@@ -586,23 +384,26 @@ static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> /* TID must be supplied by the caller */</div><div class='ctx'> static inline void kvmppc_e500_setup_stlbe(</div><div class='del'>-	struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='add'>+	struct kvm_vcpu *vcpu,</div><div class='ctx'> 	struct kvm_book3e_206_tlb_entry *gtlbe,</div><div class='ctx'> 	int tsize, struct tlbe_ref *ref, u64 gvaddr,</div><div class='ctx'> 	struct kvm_book3e_206_tlb_entry *stlbe)</div><div class='ctx'> {</div><div class='ctx'> 	pfn_t pfn = ref-&gt;pfn;</div><div class='add'>+	u32 pr = vcpu-&gt;arch.shared-&gt;msr &amp; MSR_PR;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!(ref-&gt;flags &amp; E500_TLB_VALID));</div><div class='ctx'> </div><div class='del'>-	/* Force TS=1 IPROT=0 for all guest mappings. */</div><div class='del'>-	stlbe-&gt;mas1 = MAS1_TSIZE(tsize) | MAS1_TS | MAS1_VALID;</div><div class='del'>-	stlbe-&gt;mas2 = (gvaddr &amp; MAS2_EPN)</div><div class='del'>-		| e500_shadow_mas2_attrib(gtlbe-&gt;mas2,</div><div class='del'>-				vcpu_e500-&gt;vcpu.arch.shared-&gt;msr &amp; MSR_PR);</div><div class='del'>-	stlbe-&gt;mas7_3 = ((u64)pfn &lt;&lt; PAGE_SHIFT)</div><div class='del'>-		| e500_shadow_mas3_attrib(gtlbe-&gt;mas7_3,</div><div class='del'>-				vcpu_e500-&gt;vcpu.arch.shared-&gt;msr &amp; MSR_PR);</div><div class='add'>+	/* Force IPROT=0 for all guest mappings. */</div><div class='add'>+	stlbe-&gt;mas1 = MAS1_TSIZE(tsize) | get_tlb_sts(gtlbe) | MAS1_VALID;</div><div class='add'>+	stlbe-&gt;mas2 = (gvaddr &amp; MAS2_EPN) |</div><div class='add'>+		      e500_shadow_mas2_attrib(gtlbe-&gt;mas2, pr);</div><div class='add'>+	stlbe-&gt;mas7_3 = ((u64)pfn &lt;&lt; PAGE_SHIFT) |</div><div class='add'>+			e500_shadow_mas3_attrib(gtlbe-&gt;mas7_3, pr);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	stlbe-&gt;mas8 = MAS8_TGS | vcpu-&gt;kvm-&gt;arch.lpid;</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='hunk'>@@ -736,7 +537,8 @@ static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> 	kvmppc_e500_ref_release(ref);</div><div class='ctx'> 	kvmppc_e500_ref_setup(ref, gtlbe, pfn);</div><div class='ctx'> </div><div class='del'>-	kvmppc_e500_setup_stlbe(vcpu_e500, gtlbe, tsize, ref, gvaddr, stlbe);</div><div class='add'>+	kvmppc_e500_setup_stlbe(&amp;vcpu_e500-&gt;vcpu, gtlbe, tsize,</div><div class='add'>+				ref, gvaddr, stlbe);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* XXX only map the one-one case, for now use TLB0 */</div><div class='hunk'>@@ -760,7 +562,7 @@ static void kvmppc_e500_tlb0_map(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> /* XXX for both one-one and one-to-many , for now use TLB1 */</div><div class='ctx'> static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> 		u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,</div><div class='del'>-		struct kvm_book3e_206_tlb_entry *stlbe)</div><div class='add'>+		struct kvm_book3e_206_tlb_entry *stlbe, int esel)</div><div class='ctx'> {</div><div class='ctx'> 	struct tlbe_ref *ref;</div><div class='ctx'> 	unsigned int victim;</div><div class='hunk'>@@ -773,15 +575,74 @@ static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> 	ref = &amp;vcpu_e500-&gt;tlb_refs[1][victim];</div><div class='ctx'> 	kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe, ref);</div><div class='ctx'> </div><div class='add'>+	vcpu_e500-&gt;g2h_tlb1_map[esel] |= (u64)1 &lt;&lt; victim;</div><div class='add'>+	vcpu_e500-&gt;gtlb_priv[1][esel].ref.flags |= E500_TLB_BITMAP;</div><div class='add'>+	if (vcpu_e500-&gt;h2g_tlb1_rmap[victim]) {</div><div class='add'>+		unsigned int idx = vcpu_e500-&gt;h2g_tlb1_rmap[victim];</div><div class='add'>+		vcpu_e500-&gt;g2h_tlb1_map[idx] &amp;= ~(1ULL &lt;&lt; victim);</div><div class='add'>+	}</div><div class='add'>+	vcpu_e500-&gt;h2g_tlb1_rmap[victim] = esel;</div><div class='add'>+</div><div class='ctx'> 	return victim;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)</div><div class='add'>+static void kvmppc_recalc_tlb1map_range(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='add'>+{</div><div class='add'>+	int size = vcpu_e500-&gt;gtlb_params[1].entries;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	gva_t eaddr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	vcpu_e500-&gt;tlb1_min_eaddr = ~0UL;</div><div class='add'>+	vcpu_e500-&gt;tlb1_max_eaddr = 0;</div><div class='add'>+	offset = vcpu_e500-&gt;gtlb_offset[1];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; size; i++) {</div><div class='add'>+		struct kvm_book3e_206_tlb_entry *tlbe =</div><div class='add'>+			&amp;vcpu_e500-&gt;gtlb_arch[offset + i];</div><div class='add'>+</div><div class='add'>+		if (!get_tlb_v(tlbe))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		eaddr = get_tlb_eaddr(tlbe);</div><div class='add'>+		vcpu_e500-&gt;tlb1_min_eaddr =</div><div class='add'>+				min(vcpu_e500-&gt;tlb1_min_eaddr, eaddr);</div><div class='add'>+</div><div class='add'>+		eaddr = get_tlb_end(tlbe);</div><div class='add'>+		vcpu_e500-&gt;tlb1_max_eaddr =</div><div class='add'>+				max(vcpu_e500-&gt;tlb1_max_eaddr, eaddr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvmppc_need_recalc_tlb1map_range(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='add'>+				struct kvm_book3e_206_tlb_entry *gtlbe)</div><div class='ctx'> {</div><div class='add'>+	unsigned long start, end, size;</div><div class='add'>+</div><div class='add'>+	size = get_tlb_bytes(gtlbe);</div><div class='add'>+	start = get_tlb_eaddr(gtlbe) &amp; ~(size - 1);</div><div class='add'>+	end = start + size - 1;</div><div class='add'>+</div><div class='add'>+	return vcpu_e500-&gt;tlb1_min_eaddr == start ||</div><div class='add'>+			vcpu_e500-&gt;tlb1_max_eaddr == end;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function is supposed to be called for a adding a new valid tlb entry */</div><div class='add'>+static void kvmppc_set_tlb1map_range(struct kvm_vcpu *vcpu,</div><div class='add'>+				struct kvm_book3e_206_tlb_entry *gtlbe)</div><div class='add'>+{</div><div class='add'>+	unsigned long start, end, size;</div><div class='ctx'> 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='ctx'> </div><div class='del'>-	/* Recalc shadow pid since MSR changes */</div><div class='del'>-	kvmppc_e500_recalc_shadow_pid(vcpu_e500);</div><div class='add'>+	if (!get_tlb_v(gtlbe))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	size = get_tlb_bytes(gtlbe);</div><div class='add'>+	start = get_tlb_eaddr(gtlbe) &amp; ~(size - 1);</div><div class='add'>+	end = start + size - 1;</div><div class='add'>+</div><div class='add'>+	vcpu_e500-&gt;tlb1_min_eaddr = min(vcpu_e500-&gt;tlb1_min_eaddr, start);</div><div class='add'>+	vcpu_e500-&gt;tlb1_max_eaddr = max(vcpu_e500-&gt;tlb1_max_eaddr, end);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int kvmppc_e500_gtlbe_invalidate(</div><div class='hunk'>@@ -794,6 +655,9 @@ static inline int kvmppc_e500_gtlbe_invalidate(</div><div class='ctx'> 	if (unlikely(get_tlb_iprot(gtlbe)))</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='add'>+	if (tlbsel == 1 &amp;&amp; kvmppc_need_recalc_tlb1map_range(vcpu_e500, gtlbe))</div><div class='add'>+		kvmppc_recalc_tlb1map_range(vcpu_e500);</div><div class='add'>+</div><div class='ctx'> 	gtlbe-&gt;mas1 = 0;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -811,7 +675,7 @@ int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500, ulong value)</div><div class='ctx'> 			kvmppc_e500_gtlbe_invalidate(vcpu_e500, 1, esel);</div><div class='ctx'> </div><div class='ctx'> 	/* Invalidate all vcpu id mappings */</div><div class='del'>-	kvmppc_e500_id_table_reset_all(vcpu_e500);</div><div class='add'>+	kvmppc_e500_tlbil_all(vcpu_e500);</div><div class='ctx'> </div><div class='ctx'> 	return EMULATE_DONE;</div><div class='ctx'> }</div><div class='hunk'>@@ -844,7 +708,59 @@ int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Invalidate all vcpu id mappings */</div><div class='del'>-	kvmppc_e500_id_table_reset_all(vcpu_e500);</div><div class='add'>+	kvmppc_e500_tlbil_all(vcpu_e500);</div><div class='add'>+</div><div class='add'>+	return EMULATE_DONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tlbilx_all(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel,</div><div class='add'>+		       int pid, int rt)</div><div class='add'>+{</div><div class='add'>+	struct kvm_book3e_206_tlb_entry *tlbe;</div><div class='add'>+	int tid, esel;</div><div class='add'>+</div><div class='add'>+	/* invalidate all entries */</div><div class='add'>+	for (esel = 0; esel &lt; vcpu_e500-&gt;gtlb_params[tlbsel].entries; esel++) {</div><div class='add'>+		tlbe = get_entry(vcpu_e500, tlbsel, esel);</div><div class='add'>+		tid = get_tlb_tid(tlbe);</div><div class='add'>+		if (rt == 0 || tid == pid) {</div><div class='add'>+			inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);</div><div class='add'>+			kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tlbilx_one(struct kvmppc_vcpu_e500 *vcpu_e500, int pid,</div><div class='add'>+		       int ra, int rb)</div><div class='add'>+{</div><div class='add'>+	int tlbsel, esel;</div><div class='add'>+	gva_t ea;</div><div class='add'>+</div><div class='add'>+	ea = kvmppc_get_gpr(&amp;vcpu_e500-&gt;vcpu, rb);</div><div class='add'>+	if (ra)</div><div class='add'>+		ea += kvmppc_get_gpr(&amp;vcpu_e500-&gt;vcpu, ra);</div><div class='add'>+</div><div class='add'>+	for (tlbsel = 0; tlbsel &lt; 2; tlbsel++) {</div><div class='add'>+		esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, -1);</div><div class='add'>+		if (esel &gt;= 0) {</div><div class='add'>+			inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);</div><div class='add'>+			kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int rt, int ra, int rb)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='add'>+	int pid = get_cur_spid(vcpu);</div><div class='add'>+</div><div class='add'>+	if (rt == 0 || rt == 1) {</div><div class='add'>+		tlbilx_all(vcpu_e500, 0, pid, rt);</div><div class='add'>+		tlbilx_all(vcpu_e500, 1, pid, rt);</div><div class='add'>+	} else if (rt == 3) {</div><div class='add'>+		tlbilx_one(vcpu_e500, pid, ra, rb);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return EMULATE_DONE;</div><div class='ctx'> }</div><div class='hunk'>@@ -929,9 +845,7 @@ static void write_stlbe(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> 	int stid;</div><div class='ctx'> </div><div class='ctx'> 	preempt_disable();</div><div class='del'>-	stid = kvmppc_e500_get_sid(vcpu_e500, get_tlb_ts(gtlbe),</div><div class='del'>-				   get_tlb_tid(gtlbe),</div><div class='del'>-				   get_cur_pr(&amp;vcpu_e500-&gt;vcpu), 0);</div><div class='add'>+	stid = kvmppc_e500_get_tlb_stid(&amp;vcpu_e500-&gt;vcpu, gtlbe);</div><div class='ctx'> </div><div class='ctx'> 	stlbe-&gt;mas1 |= MAS1_TID(stid);</div><div class='ctx'> 	write_host_tlbe(vcpu_e500, stlbsel, sesel, stlbe);</div><div class='hunk'>@@ -941,16 +855,21 @@ static void write_stlbe(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='ctx'> int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='del'>-	struct kvm_book3e_206_tlb_entry *gtlbe;</div><div class='del'>-	int tlbsel, esel;</div><div class='add'>+	struct kvm_book3e_206_tlb_entry *gtlbe, stlbe;</div><div class='add'>+	int tlbsel, esel, stlbsel, sesel;</div><div class='add'>+	int recal = 0;</div><div class='ctx'> </div><div class='ctx'> 	tlbsel = get_tlb_tlbsel(vcpu);</div><div class='ctx'> 	esel = get_tlb_esel(vcpu, tlbsel);</div><div class='ctx'> </div><div class='ctx'> 	gtlbe = get_entry(vcpu_e500, tlbsel, esel);</div><div class='ctx'> </div><div class='del'>-	if (get_tlb_v(gtlbe))</div><div class='add'>+	if (get_tlb_v(gtlbe)) {</div><div class='ctx'> 		inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);</div><div class='add'>+		if ((tlbsel == 1) &amp;&amp;</div><div class='add'>+			kvmppc_need_recalc_tlb1map_range(vcpu_e500, gtlbe))</div><div class='add'>+			recal = 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	gtlbe-&gt;mas1 = vcpu-&gt;arch.shared-&gt;mas1;</div><div class='ctx'> 	gtlbe-&gt;mas2 = vcpu-&gt;arch.shared-&gt;mas2;</div><div class='hunk'>@@ -959,10 +878,20 @@ int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	trace_kvm_booke206_gtlb_write(vcpu-&gt;arch.shared-&gt;mas0, gtlbe-&gt;mas1,</div><div class='ctx'> 	                              gtlbe-&gt;mas2, gtlbe-&gt;mas7_3);</div><div class='ctx'> </div><div class='add'>+	if (tlbsel == 1) {</div><div class='add'>+		/*</div><div class='add'>+		 * If a valid tlb1 entry is overwritten then recalculate the</div><div class='add'>+		 * min/max TLB1 map address range otherwise no need to look</div><div class='add'>+		 * in tlb1 array.</div><div class='add'>+		 */</div><div class='add'>+		if (recal)</div><div class='add'>+			kvmppc_recalc_tlb1map_range(vcpu_e500);</div><div class='add'>+		else</div><div class='add'>+			kvmppc_set_tlb1map_range(vcpu, gtlbe);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */</div><div class='ctx'> 	if (tlbe_is_host_safe(vcpu, gtlbe)) {</div><div class='del'>-		struct kvm_book3e_206_tlb_entry stlbe;</div><div class='del'>-		int stlbsel, sesel;</div><div class='ctx'> 		u64 eaddr;</div><div class='ctx'> 		u64 raddr;</div><div class='ctx'> </div><div class='hunk'>@@ -989,7 +918,7 @@ int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			 * are mapped on the fly. */</div><div class='ctx'> 			stlbsel = 1;</div><div class='ctx'> 			sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr,</div><div class='del'>-					raddr &gt;&gt; PAGE_SHIFT, gtlbe, &amp;stlbe);</div><div class='add'>+				    raddr &gt;&gt; PAGE_SHIFT, gtlbe, &amp;stlbe, esel);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		default:</div><div class='hunk'>@@ -1003,6 +932,48 @@ int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return EMULATE_DONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,</div><div class='add'>+				  gva_t eaddr, unsigned int pid, int as)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='add'>+	int esel, tlbsel;</div><div class='add'>+</div><div class='add'>+	for (tlbsel = 0; tlbsel &lt; 2; tlbsel++) {</div><div class='add'>+		esel = kvmppc_e500_tlb_index(vcpu_e500, eaddr, tlbsel, pid, as);</div><div class='add'>+		if (esel &gt;= 0)</div><div class='add'>+			return index_of(tlbsel, esel);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* 'linear_address' is actually an encoding of AS|PID|EADDR . */</div><div class='add'>+int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,</div><div class='add'>+                               struct kvm_translation *tr)</div><div class='add'>+{</div><div class='add'>+	int index;</div><div class='add'>+	gva_t eaddr;</div><div class='add'>+	u8 pid;</div><div class='add'>+	u8 as;</div><div class='add'>+</div><div class='add'>+	eaddr = tr-&gt;linear_address;</div><div class='add'>+	pid = (tr-&gt;linear_address &gt;&gt; 32) &amp; 0xff;</div><div class='add'>+	as = (tr-&gt;linear_address &gt;&gt; 40) &amp; 0x1;</div><div class='add'>+</div><div class='add'>+	index = kvmppc_e500_tlb_search(vcpu, eaddr, pid, as);</div><div class='add'>+	if (index &lt; 0) {</div><div class='add'>+		tr-&gt;valid = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tr-&gt;physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr);</div><div class='add'>+	/* XXX what does "writeable" and "usermode" even mean? */</div><div class='add'>+	tr-&gt;valid = 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int as = !!(vcpu-&gt;arch.shared-&gt;msr &amp; MSR_IS);</div><div class='hunk'>@@ -1066,7 +1037,7 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,</div><div class='ctx'> 		sesel = 0; /* unused */</div><div class='ctx'> 		priv = &amp;vcpu_e500-&gt;gtlb_priv[tlbsel][esel];</div><div class='ctx'> </div><div class='del'>-		kvmppc_e500_setup_stlbe(vcpu_e500, gtlbe, BOOK3E_PAGESZ_4K,</div><div class='add'>+		kvmppc_e500_setup_stlbe(vcpu, gtlbe, BOOK3E_PAGESZ_4K,</div><div class='ctx'> 					&amp;priv-&gt;ref, eaddr, &amp;stlbe);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -1075,7 +1046,7 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,</div><div class='ctx'> </div><div class='ctx'> 		stlbsel = 1;</div><div class='ctx'> 		sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn,</div><div class='del'>-					     gtlbe, &amp;stlbe);</div><div class='add'>+					     gtlbe, &amp;stlbe, esel);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1087,52 +1058,13 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,</div><div class='ctx'> 	write_stlbe(vcpu_e500, gtlbe, &amp;stlbe, stlbsel, sesel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,</div><div class='del'>-				gva_t eaddr, unsigned int pid, int as)</div><div class='del'>-{</div><div class='del'>-	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='del'>-	int esel, tlbsel;</div><div class='del'>-</div><div class='del'>-	for (tlbsel = 0; tlbsel &lt; 2; tlbsel++) {</div><div class='del'>-		esel = kvmppc_e500_tlb_index(vcpu_e500, eaddr, tlbsel, pid, as);</div><div class='del'>-		if (esel &gt;= 0)</div><div class='del'>-			return index_of(tlbsel, esel);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)</div><div class='del'>-{</div><div class='del'>-	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='del'>-</div><div class='del'>-	if (vcpu-&gt;arch.pid != pid) {</div><div class='del'>-		vcpu_e500-&gt;pid[0] = vcpu-&gt;arch.pid = pid;</div><div class='del'>-		kvmppc_e500_recalc_shadow_pid(vcpu_e500);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='del'>-{</div><div class='del'>-	struct kvm_book3e_206_tlb_entry *tlbe;</div><div class='del'>-</div><div class='del'>-	/* Insert large initial mapping for guest. */</div><div class='del'>-	tlbe = get_entry(vcpu_e500, 1, 0);</div><div class='del'>-	tlbe-&gt;mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_256M);</div><div class='del'>-	tlbe-&gt;mas2 = 0;</div><div class='del'>-	tlbe-&gt;mas7_3 = E500_TLB_SUPER_PERM_MASK;</div><div class='del'>-</div><div class='del'>-	/* 4K map for serial output. Used by kernel wrapper. */</div><div class='del'>-	tlbe = get_entry(vcpu_e500, 1, 1);</div><div class='del'>-	tlbe-&gt;mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_4K);</div><div class='del'>-	tlbe-&gt;mas2 = (0xe0004500 &amp; 0xFFFFF000) | MAS2_I | MAS2_G;</div><div class='del'>-	tlbe-&gt;mas7_3 = (0xe0004500 &amp; 0xFFFFF000) | E500_TLB_SUPER_PERM_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void free_gtlb(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	clear_tlb1_bitmap(vcpu_e500);</div><div class='add'>+	kfree(vcpu_e500-&gt;g2h_tlb1_map);</div><div class='add'>+</div><div class='ctx'> 	clear_tlb_refs(vcpu_e500);</div><div class='ctx'> 	kfree(vcpu_e500-&gt;gtlb_priv[0]);</div><div class='ctx'> 	kfree(vcpu_e500-&gt;gtlb_priv[1]);</div><div class='hunk'>@@ -1155,6 +1087,36 @@ static void free_gtlb(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='ctx'> 	vcpu_e500-&gt;gtlb_arch = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void kvmppc_get_sregs_e500_tlb(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)</div><div class='add'>+{</div><div class='add'>+	sregs-&gt;u.e.mas0 = vcpu-&gt;arch.shared-&gt;mas0;</div><div class='add'>+	sregs-&gt;u.e.mas1 = vcpu-&gt;arch.shared-&gt;mas1;</div><div class='add'>+	sregs-&gt;u.e.mas2 = vcpu-&gt;arch.shared-&gt;mas2;</div><div class='add'>+	sregs-&gt;u.e.mas7_3 = vcpu-&gt;arch.shared-&gt;mas7_3;</div><div class='add'>+	sregs-&gt;u.e.mas4 = vcpu-&gt;arch.shared-&gt;mas4;</div><div class='add'>+	sregs-&gt;u.e.mas6 = vcpu-&gt;arch.shared-&gt;mas6;</div><div class='add'>+</div><div class='add'>+	sregs-&gt;u.e.mmucfg = vcpu-&gt;arch.mmucfg;</div><div class='add'>+	sregs-&gt;u.e.tlbcfg[0] = vcpu-&gt;arch.tlbcfg[0];</div><div class='add'>+	sregs-&gt;u.e.tlbcfg[1] = vcpu-&gt;arch.tlbcfg[1];</div><div class='add'>+	sregs-&gt;u.e.tlbcfg[2] = 0;</div><div class='add'>+	sregs-&gt;u.e.tlbcfg[3] = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvmppc_set_sregs_e500_tlb(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)</div><div class='add'>+{</div><div class='add'>+	if (sregs-&gt;u.e.features &amp; KVM_SREGS_E_ARCH206_MMU) {</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;mas0 = sregs-&gt;u.e.mas0;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;mas1 = sregs-&gt;u.e.mas1;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;mas2 = sregs-&gt;u.e.mas2;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;mas7_3 = sregs-&gt;u.e.mas7_3;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;mas4 = sregs-&gt;u.e.mas4;</div><div class='add'>+		vcpu-&gt;arch.shared-&gt;mas6 = sregs-&gt;u.e.mas6;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			      struct kvm_config_tlb *cfg)</div><div class='ctx'> {</div><div class='hunk'>@@ -1163,6 +1125,7 @@ int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	char *virt;</div><div class='ctx'> 	struct page **pages;</div><div class='ctx'> 	struct tlbe_priv *privs[2] = {};</div><div class='add'>+	u64 *g2h_bitmap = NULL;</div><div class='ctx'> 	size_t array_len;</div><div class='ctx'> 	u32 sets;</div><div class='ctx'> 	int num_pages, ret, i;</div><div class='hunk'>@@ -1224,10 +1187,16 @@ int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	if (!privs[0] || !privs[1])</div><div class='ctx'> 		goto err_put_page;</div><div class='ctx'> </div><div class='add'>+	g2h_bitmap = kzalloc(sizeof(u64) * params.tlb_sizes[1],</div><div class='add'>+	                     GFP_KERNEL);</div><div class='add'>+	if (!g2h_bitmap)</div><div class='add'>+		goto err_put_page;</div><div class='add'>+</div><div class='ctx'> 	free_gtlb(vcpu_e500);</div><div class='ctx'> </div><div class='ctx'> 	vcpu_e500-&gt;gtlb_priv[0] = privs[0];</div><div class='ctx'> 	vcpu_e500-&gt;gtlb_priv[1] = privs[1];</div><div class='add'>+	vcpu_e500-&gt;g2h_tlb1_map = g2h_bitmap;</div><div class='ctx'> </div><div class='ctx'> 	vcpu_e500-&gt;gtlb_arch = (struct kvm_book3e_206_tlb_entry *)</div><div class='ctx'> 		(virt + (cfg-&gt;array &amp; (PAGE_SIZE - 1)));</div><div class='hunk'>@@ -1238,14 +1207,16 @@ int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	vcpu_e500-&gt;gtlb_offset[0] = 0;</div><div class='ctx'> 	vcpu_e500-&gt;gtlb_offset[1] = params.tlb_sizes[0];</div><div class='ctx'> </div><div class='del'>-	vcpu_e500-&gt;tlb0cfg &amp;= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);</div><div class='add'>+	vcpu-&gt;arch.mmucfg = mfspr(SPRN_MMUCFG) &amp; ~MMUCFG_LPIDSIZE;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.tlbcfg[0] &amp;= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);</div><div class='ctx'> 	if (params.tlb_sizes[0] &lt;= 2048)</div><div class='del'>-		vcpu_e500-&gt;tlb0cfg |= params.tlb_sizes[0];</div><div class='del'>-	vcpu_e500-&gt;tlb0cfg |= params.tlb_ways[0] &lt;&lt; TLBnCFG_ASSOC_SHIFT;</div><div class='add'>+		vcpu-&gt;arch.tlbcfg[0] |= params.tlb_sizes[0];</div><div class='add'>+	vcpu-&gt;arch.tlbcfg[0] |= params.tlb_ways[0] &lt;&lt; TLBnCFG_ASSOC_SHIFT;</div><div class='ctx'> </div><div class='del'>-	vcpu_e500-&gt;tlb1cfg &amp;= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);</div><div class='del'>-	vcpu_e500-&gt;tlb1cfg |= params.tlb_sizes[1];</div><div class='del'>-	vcpu_e500-&gt;tlb1cfg |= params.tlb_ways[1] &lt;&lt; TLBnCFG_ASSOC_SHIFT;</div><div class='add'>+	vcpu-&gt;arch.tlbcfg[1] &amp;= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);</div><div class='add'>+	vcpu-&gt;arch.tlbcfg[1] |= params.tlb_sizes[1];</div><div class='add'>+	vcpu-&gt;arch.tlbcfg[1] |= params.tlb_ways[1] &lt;&lt; TLBnCFG_ASSOC_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	vcpu_e500-&gt;shared_tlb_pages = pages;</div><div class='ctx'> 	vcpu_e500-&gt;num_shared_tlb_pages = num_pages;</div><div class='hunk'>@@ -1256,6 +1227,7 @@ int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	vcpu_e500-&gt;gtlb_params[1].ways = params.tlb_sizes[1];</div><div class='ctx'> 	vcpu_e500-&gt;gtlb_params[1].sets = 1;</div><div class='ctx'> </div><div class='add'>+	kvmppc_recalc_tlb1map_range(vcpu_e500);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_put_page:</div><div class='hunk'>@@ -1274,13 +1246,14 @@ int kvm_vcpu_ioctl_dirty_tlb(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			     struct kvm_dirty_tlb *dirty)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='del'>-</div><div class='add'>+	kvmppc_recalc_tlb1map_range(vcpu_e500);</div><div class='ctx'> 	clear_tlb_refs(vcpu_e500);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_vcpu *vcpu = &amp;vcpu_e500-&gt;vcpu;</div><div class='ctx'> 	int entry_size = sizeof(struct kvm_book3e_206_tlb_entry);</div><div class='ctx'> 	int entries = KVM_E500_TLB0_SIZE + KVM_E500_TLB1_SIZE;</div><div class='ctx'> </div><div class='hunk'>@@ -1357,22 +1330,32 @@ int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='ctx'> 	if (!vcpu_e500-&gt;gtlb_priv[1])</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='del'>-	if (kvmppc_e500_id_table_alloc(vcpu_e500) == NULL)</div><div class='add'>+	vcpu_e500-&gt;g2h_tlb1_map = kzalloc(sizeof(unsigned int) *</div><div class='add'>+					  vcpu_e500-&gt;gtlb_params[1].entries,</div><div class='add'>+					  GFP_KERNEL);</div><div class='add'>+	if (!vcpu_e500-&gt;g2h_tlb1_map)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	vcpu_e500-&gt;h2g_tlb1_rmap = kzalloc(sizeof(unsigned int) *</div><div class='add'>+					   host_tlb_params[1].entries,</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+	if (!vcpu_e500-&gt;h2g_tlb1_rmap)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='ctx'> 	/* Init TLB configuration register */</div><div class='del'>-	vcpu_e500-&gt;tlb0cfg = mfspr(SPRN_TLB0CFG) &amp;</div><div class='add'>+	vcpu-&gt;arch.tlbcfg[0] = mfspr(SPRN_TLB0CFG) &amp;</div><div class='ctx'> 			     ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);</div><div class='del'>-	vcpu_e500-&gt;tlb0cfg |= vcpu_e500-&gt;gtlb_params[0].entries;</div><div class='del'>-	vcpu_e500-&gt;tlb0cfg |=</div><div class='add'>+	vcpu-&gt;arch.tlbcfg[0] |= vcpu_e500-&gt;gtlb_params[0].entries;</div><div class='add'>+	vcpu-&gt;arch.tlbcfg[0] |=</div><div class='ctx'> 		vcpu_e500-&gt;gtlb_params[0].ways &lt;&lt; TLBnCFG_ASSOC_SHIFT;</div><div class='ctx'> </div><div class='del'>-	vcpu_e500-&gt;tlb1cfg = mfspr(SPRN_TLB1CFG) &amp;</div><div class='add'>+	vcpu-&gt;arch.tlbcfg[1] = mfspr(SPRN_TLB1CFG) &amp;</div><div class='ctx'> 			     ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);</div><div class='del'>-	vcpu_e500-&gt;tlb0cfg |= vcpu_e500-&gt;gtlb_params[1].entries;</div><div class='del'>-	vcpu_e500-&gt;tlb0cfg |=</div><div class='add'>+	vcpu-&gt;arch.tlbcfg[1] |= vcpu_e500-&gt;gtlb_params[1].entries;</div><div class='add'>+	vcpu-&gt;arch.tlbcfg[1] |=</div><div class='ctx'> 		vcpu_e500-&gt;gtlb_params[1].ways &lt;&lt; TLBnCFG_ASSOC_SHIFT;</div><div class='ctx'> </div><div class='add'>+	kvmppc_recalc_tlb1map_range(vcpu_e500);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='hunk'>@@ -1385,8 +1368,7 @@ err:</div><div class='ctx'> void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='ctx'> {</div><div class='ctx'> 	free_gtlb(vcpu_e500);</div><div class='del'>-	kvmppc_e500_id_table_free(vcpu_e500);</div><div class='del'>-</div><div class='add'>+	kfree(vcpu_e500-&gt;h2g_tlb1_rmap);</div><div class='ctx'> 	kfree(vcpu_e500-&gt;tlb_refs[0]);</div><div class='ctx'> 	kfree(vcpu_e500-&gt;tlb_refs[1]);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/kvm/e500_tlb.h b/arch/powerpc/kvm/e500_tlb.h<br/>deleted file mode 100644<br/>index 5c6d2d7bf058..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/e500_tlb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/e500_tlb.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,174 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Author: Yu Liu, yu.liu@freescale.com</div><div class='del'>- *</div><div class='del'>- * Description:</div><div class='del'>- * This file is based on arch/powerpc/kvm/44x_tlb.h,</div><div class='del'>- * by Hollis Blanchard &lt;hollisb@us.ibm.com&gt;.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License, version 2, as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __KVM_E500_TLB_H__</div><div class='del'>-#define __KVM_E500_TLB_H__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kvm_host.h&gt;</div><div class='del'>-#include &lt;asm/mmu-book3e.h&gt;</div><div class='del'>-#include &lt;asm/tlb.h&gt;</div><div class='del'>-#include &lt;asm/kvm_e500.h&gt;</div><div class='del'>-</div><div class='del'>-/* This geometry is the legacy default -- can be overridden by userspace */</div><div class='del'>-#define KVM_E500_TLB0_WAY_SIZE		128</div><div class='del'>-#define KVM_E500_TLB0_WAY_NUM		2</div><div class='del'>-</div><div class='del'>-#define KVM_E500_TLB0_SIZE  (KVM_E500_TLB0_WAY_SIZE * KVM_E500_TLB0_WAY_NUM)</div><div class='del'>-#define KVM_E500_TLB1_SIZE  16</div><div class='del'>-</div><div class='del'>-#define index_of(tlbsel, esel)	(((tlbsel) &lt;&lt; 16) | ((esel) &amp; 0xFFFF))</div><div class='del'>-#define tlbsel_of(index)	((index) &gt;&gt; 16)</div><div class='del'>-#define esel_of(index)		((index) &amp; 0xFFFF)</div><div class='del'>-</div><div class='del'>-#define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW)</div><div class='del'>-#define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW)</div><div class='del'>-#define MAS2_ATTRIB_MASK \</div><div class='del'>-	  (MAS2_X0 | MAS2_X1)</div><div class='del'>-#define MAS3_ATTRIB_MASK \</div><div class='del'>-	  (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \</div><div class='del'>-	   | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK)</div><div class='del'>-</div><div class='del'>-extern void kvmppc_dump_tlbs(struct kvm_vcpu *);</div><div class='del'>-extern int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *, ulong);</div><div class='del'>-extern int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *);</div><div class='del'>-extern int kvmppc_e500_emul_tlbre(struct kvm_vcpu *);</div><div class='del'>-extern int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *, int, int);</div><div class='del'>-extern int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *, int);</div><div class='del'>-extern int kvmppc_e500_tlb_search(struct kvm_vcpu *, gva_t, unsigned int, int);</div><div class='del'>-extern void kvmppc_e500_tlb_put(struct kvm_vcpu *);</div><div class='del'>-extern void kvmppc_e500_tlb_load(struct kvm_vcpu *, int);</div><div class='del'>-extern int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *);</div><div class='del'>-extern void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *);</div><div class='del'>-extern void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *);</div><div class='del'>-extern void kvmppc_e500_recalc_shadow_pid(struct kvmppc_vcpu_e500 *);</div><div class='del'>-</div><div class='del'>-/* TLB helper functions */</div><div class='del'>-static inline unsigned int</div><div class='del'>-get_tlb_size(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='del'>-{</div><div class='del'>-	return (tlbe-&gt;mas1 &gt;&gt; 7) &amp; 0x1f;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline gva_t get_tlb_eaddr(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='del'>-{</div><div class='del'>-	return tlbe-&gt;mas2 &amp; 0xfffff000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u64 get_tlb_bytes(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='del'>-{</div><div class='del'>-	unsigned int pgsize = get_tlb_size(tlbe);</div><div class='del'>-	return 1ULL &lt;&lt; 10 &lt;&lt; pgsize;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline gva_t get_tlb_end(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='del'>-{</div><div class='del'>-	u64 bytes = get_tlb_bytes(tlbe);</div><div class='del'>-	return get_tlb_eaddr(tlbe) + bytes - 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u64 get_tlb_raddr(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='del'>-{</div><div class='del'>-	return tlbe-&gt;mas7_3 &amp; ~0xfffULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int</div><div class='del'>-get_tlb_tid(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='del'>-{</div><div class='del'>-	return (tlbe-&gt;mas1 &gt;&gt; 16) &amp; 0xff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int</div><div class='del'>-get_tlb_ts(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='del'>-{</div><div class='del'>-	return (tlbe-&gt;mas1 &gt;&gt; 12) &amp; 0x1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int</div><div class='del'>-get_tlb_v(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='del'>-{</div><div class='del'>-	return (tlbe-&gt;mas1 &gt;&gt; 31) &amp; 0x1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int</div><div class='del'>-get_tlb_iprot(const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='del'>-{</div><div class='del'>-	return (tlbe-&gt;mas1 &gt;&gt; 30) &amp; 0x1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_cur_pid(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return vcpu-&gt;arch.pid &amp; 0xff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_cur_as(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return !!(vcpu-&gt;arch.shared-&gt;msr &amp; (MSR_IS | MSR_DS));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_cur_pr(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return !!(vcpu-&gt;arch.shared-&gt;msr &amp; MSR_PR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_cur_spid(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return (vcpu-&gt;arch.shared-&gt;mas6 &gt;&gt; 16) &amp; 0xff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_cur_sas(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return vcpu-&gt;arch.shared-&gt;mas6 &amp; 0x1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_tlb_tlbsel(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Manual says that tlbsel has 2 bits wide.</div><div class='del'>-	 * Since we only have two TLBs, only lower bit is used.</div><div class='del'>-	 */</div><div class='del'>-	return (vcpu-&gt;arch.shared-&gt;mas0 &gt;&gt; 28) &amp; 0x1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_tlb_nv_bit(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return vcpu-&gt;arch.shared-&gt;mas0 &amp; 0xfff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_tlb_esel_bit(const struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return (vcpu-&gt;arch.shared-&gt;mas0 &gt;&gt; 16) &amp; 0xfff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,</div><div class='del'>-			const struct kvm_book3e_206_tlb_entry *tlbe)</div><div class='del'>-{</div><div class='del'>-	gpa_t gpa;</div><div class='del'>-</div><div class='del'>-	if (!get_tlb_v(tlbe))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Does it match current guest AS? */</div><div class='del'>-	/* XXX what about IS != DS? */</div><div class='del'>-	if (get_tlb_ts(tlbe) != !!(vcpu-&gt;arch.shared-&gt;msr &amp; MSR_IS))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	gpa = get_tlb_raddr(tlbe);</div><div class='del'>-	if (!gfn_to_memslot(vcpu-&gt;kvm, gpa &gt;&gt; PAGE_SHIFT))</div><div class='del'>-		/* Mapping is not for RAM. */</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* __KVM_E500_TLB_H__ */</div><div class='head'>diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c<br/>new file mode 100644<br/>index 000000000000..fe6c1de6b701<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/e500mc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/e500mc.c</a></div><div class='hunk'>@@ -0,0 +1,342 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2010 Freescale Semiconductor, Inc. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * Author: Varun Sethi, &lt;varun.sethi@freescale.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Description:</div><div class='add'>+ * This file is derived from arch/powerpc/kvm/e500.c,</div><div class='add'>+ * by Yu Liu &lt;yu.liu@freescale.com&gt;.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License, version 2, as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/reg.h&gt;</div><div class='add'>+#include &lt;asm/cputable.h&gt;</div><div class='add'>+#include &lt;asm/tlbflush.h&gt;</div><div class='add'>+#include &lt;asm/kvm_ppc.h&gt;</div><div class='add'>+#include &lt;asm/dbell.h&gt;</div><div class='add'>+</div><div class='add'>+#include "booke.h"</div><div class='add'>+#include "e500.h"</div><div class='add'>+</div><div class='add'>+void kvmppc_set_pending_interrupt(struct kvm_vcpu *vcpu, enum int_class type)</div><div class='add'>+{</div><div class='add'>+	enum ppc_dbell dbell_type;</div><div class='add'>+	unsigned long tag;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case INT_CLASS_NONCRIT:</div><div class='add'>+		dbell_type = PPC_G_DBELL;</div><div class='add'>+		break;</div><div class='add'>+	case INT_CLASS_CRIT:</div><div class='add'>+		dbell_type = PPC_G_DBELL_CRIT;</div><div class='add'>+		break;</div><div class='add'>+	case INT_CLASS_MC:</div><div class='add'>+		dbell_type = PPC_G_DBELL_MC;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(1, "%s: unknown int type %d\n", __func__, type);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	tag = PPC_DBELL_LPID(vcpu-&gt;kvm-&gt;arch.lpid) | vcpu-&gt;vcpu_id;</div><div class='add'>+	mb();</div><div class='add'>+	ppc_msgsnd(dbell_type, 0, tag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* gtlbe must not be mapped by more than one host tlb entry */</div><div class='add'>+void kvmppc_e500_tlbil_one(struct kvmppc_vcpu_e500 *vcpu_e500,</div><div class='add'>+			   struct kvm_book3e_206_tlb_entry *gtlbe)</div><div class='add'>+{</div><div class='add'>+	unsigned int tid, ts;</div><div class='add'>+	u32 val, eaddr, lpid;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	ts = get_tlb_ts(gtlbe);</div><div class='add'>+	tid = get_tlb_tid(gtlbe);</div><div class='add'>+	lpid = vcpu_e500-&gt;vcpu.kvm-&gt;arch.lpid;</div><div class='add'>+</div><div class='add'>+	/* We search the host TLB to invalidate its shadow TLB entry */</div><div class='add'>+	val = (tid &lt;&lt; 16) | ts;</div><div class='add'>+	eaddr = get_tlb_eaddr(gtlbe);</div><div class='add'>+</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+</div><div class='add'>+	mtspr(SPRN_MAS6, val);</div><div class='add'>+	mtspr(SPRN_MAS5, MAS5_SGS | lpid);</div><div class='add'>+</div><div class='add'>+	asm volatile("tlbsx 0, %[eaddr]\n" : : [eaddr] "r" (eaddr));</div><div class='add'>+	val = mfspr(SPRN_MAS1);</div><div class='add'>+	if (val &amp; MAS1_VALID) {</div><div class='add'>+		mtspr(SPRN_MAS1, val &amp; ~MAS1_VALID);</div><div class='add'>+		asm volatile("tlbwe");</div><div class='add'>+	}</div><div class='add'>+	mtspr(SPRN_MAS5, 0);</div><div class='add'>+	/* NOTE: tlbsx also updates mas8, so clear it for host tlbwe */</div><div class='add'>+	mtspr(SPRN_MAS8, 0);</div><div class='add'>+	isync();</div><div class='add'>+</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_e500_tlbil_all(struct kvmppc_vcpu_e500 *vcpu_e500)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+	mtspr(SPRN_MAS5, MAS5_SGS | vcpu_e500-&gt;vcpu.kvm-&gt;arch.lpid);</div><div class='add'>+	asm volatile("tlbilxlpid");</div><div class='add'>+	mtspr(SPRN_MAS5, 0);</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)</div><div class='add'>+{</div><div class='add'>+	vcpu-&gt;arch.pid = pid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='add'>+</div><div class='add'>+	kvmppc_booke_vcpu_load(vcpu, cpu);</div><div class='add'>+</div><div class='add'>+	mtspr(SPRN_LPID, vcpu-&gt;kvm-&gt;arch.lpid);</div><div class='add'>+	mtspr(SPRN_EPCR, vcpu-&gt;arch.shadow_epcr);</div><div class='add'>+	mtspr(SPRN_GPIR, vcpu-&gt;vcpu_id);</div><div class='add'>+	mtspr(SPRN_MSRP, vcpu-&gt;arch.shadow_msrp);</div><div class='add'>+	mtspr(SPRN_EPLC, vcpu-&gt;arch.eplc);</div><div class='add'>+	mtspr(SPRN_EPSC, vcpu-&gt;arch.epsc);</div><div class='add'>+</div><div class='add'>+	mtspr(SPRN_GIVPR, vcpu-&gt;arch.ivpr);</div><div class='add'>+	mtspr(SPRN_GIVOR2, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]);</div><div class='add'>+	mtspr(SPRN_GIVOR8, vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_SYSCALL]);</div><div class='add'>+	mtspr(SPRN_GSPRG0, (unsigned long)vcpu-&gt;arch.shared-&gt;sprg0);</div><div class='add'>+	mtspr(SPRN_GSPRG1, (unsigned long)vcpu-&gt;arch.shared-&gt;sprg1);</div><div class='add'>+	mtspr(SPRN_GSPRG2, (unsigned long)vcpu-&gt;arch.shared-&gt;sprg2);</div><div class='add'>+	mtspr(SPRN_GSPRG3, (unsigned long)vcpu-&gt;arch.shared-&gt;sprg3);</div><div class='add'>+</div><div class='add'>+	mtspr(SPRN_GSRR0, vcpu-&gt;arch.shared-&gt;srr0);</div><div class='add'>+	mtspr(SPRN_GSRR1, vcpu-&gt;arch.shared-&gt;srr1);</div><div class='add'>+</div><div class='add'>+	mtspr(SPRN_GEPR, vcpu-&gt;arch.epr);</div><div class='add'>+	mtspr(SPRN_GDEAR, vcpu-&gt;arch.shared-&gt;dar);</div><div class='add'>+	mtspr(SPRN_GESR, vcpu-&gt;arch.shared-&gt;esr);</div><div class='add'>+</div><div class='add'>+	if (vcpu-&gt;arch.oldpir != mfspr(SPRN_PIR))</div><div class='add'>+		kvmppc_e500_tlbil_all(vcpu_e500);</div><div class='add'>+</div><div class='add'>+	kvmppc_load_guest_fp(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	vcpu-&gt;arch.eplc = mfspr(SPRN_EPLC);</div><div class='add'>+	vcpu-&gt;arch.epsc = mfspr(SPRN_EPSC);</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;sprg0 = mfspr(SPRN_GSPRG0);</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;sprg1 = mfspr(SPRN_GSPRG1);</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;sprg2 = mfspr(SPRN_GSPRG2);</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;sprg3 = mfspr(SPRN_GSPRG3);</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;srr0 = mfspr(SPRN_GSRR0);</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;srr1 = mfspr(SPRN_GSRR1);</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.epr = mfspr(SPRN_GEPR);</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;dar = mfspr(SPRN_GDEAR);</div><div class='add'>+	vcpu-&gt;arch.shared-&gt;esr = mfspr(SPRN_GESR);</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.oldpir = mfspr(SPRN_PIR);</div><div class='add'>+</div><div class='add'>+	kvmppc_booke_vcpu_put(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvmppc_core_check_processor_compat(void)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if (strcmp(cur_cpu_spec-&gt;cpu_name, "e500mc") == 0)</div><div class='add'>+		r = 0;</div><div class='add'>+	else if (strcmp(cur_cpu_spec-&gt;cpu_name, "e5500") == 0)</div><div class='add'>+		r = 0;</div><div class='add'>+	else</div><div class='add'>+		r = -ENOTSUPP;</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.shadow_epcr = SPRN_EPCR_DSIGS | SPRN_EPCR_DGTMI | \</div><div class='add'>+				 SPRN_EPCR_DUVD;</div><div class='add'>+	vcpu-&gt;arch.shadow_msrp = MSRP_UCLEP | MSRP_DEP | MSRP_PMMP;</div><div class='add'>+	vcpu-&gt;arch.eplc = EPC_EGS | (vcpu-&gt;kvm-&gt;arch.lpid &lt;&lt; EPC_ELPID_SHIFT);</div><div class='add'>+	vcpu-&gt;arch.epsc = vcpu-&gt;arch.eplc;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.pvr = mfspr(SPRN_PVR);</div><div class='add'>+	vcpu_e500-&gt;svr = mfspr(SPRN_SVR);</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.cpu_type = KVM_CPU_E500MC;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='add'>+</div><div class='add'>+	sregs-&gt;u.e.features |= KVM_SREGS_E_ARCH206_MMU | KVM_SREGS_E_PM |</div><div class='add'>+			       KVM_SREGS_E_PC;</div><div class='add'>+	sregs-&gt;u.e.impl_id = KVM_SREGS_E_IMPL_FSL;</div><div class='add'>+</div><div class='add'>+	sregs-&gt;u.e.impl.fsl.features = 0;</div><div class='add'>+	sregs-&gt;u.e.impl.fsl.svr = vcpu_e500-&gt;svr;</div><div class='add'>+	sregs-&gt;u.e.impl.fsl.hid0 = vcpu_e500-&gt;hid0;</div><div class='add'>+	sregs-&gt;u.e.impl.fsl.mcar = vcpu_e500-&gt;mcar;</div><div class='add'>+</div><div class='add'>+	kvmppc_get_sregs_e500_tlb(vcpu, sregs);</div><div class='add'>+</div><div class='add'>+	sregs-&gt;u.e.ivor_high[3] =</div><div class='add'>+		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];</div><div class='add'>+	sregs-&gt;u.e.ivor_high[4] = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DBELL];</div><div class='add'>+	sregs-&gt;u.e.ivor_high[5] = vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];</div><div class='add'>+</div><div class='add'>+	kvmppc_get_sregs_ivor(vcpu, sregs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvmppc_core_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (sregs-&gt;u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {</div><div class='add'>+		vcpu_e500-&gt;svr = sregs-&gt;u.e.impl.fsl.svr;</div><div class='add'>+		vcpu_e500-&gt;hid0 = sregs-&gt;u.e.impl.fsl.hid0;</div><div class='add'>+		vcpu_e500-&gt;mcar = sregs-&gt;u.e.impl.fsl.mcar;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = kvmppc_set_sregs_e500_tlb(vcpu, sregs);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!(sregs-&gt;u.e.features &amp; KVM_SREGS_E_IVOR))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (sregs-&gt;u.e.features &amp; KVM_SREGS_E_PM) {</div><div class='add'>+		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] =</div><div class='add'>+			sregs-&gt;u.e.ivor_high[3];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sregs-&gt;u.e.features &amp; KVM_SREGS_E_PC) {</div><div class='add'>+		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DBELL] =</div><div class='add'>+			sregs-&gt;u.e.ivor_high[4];</div><div class='add'>+		vcpu-&gt;arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] =</div><div class='add'>+			sregs-&gt;u.e.ivor_high[5];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return kvmppc_set_sregs_ivor(vcpu, sregs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_vcpu_e500 *vcpu_e500;</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	vcpu_e500 = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);</div><div class='add'>+	if (!vcpu_e500) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	vcpu = &amp;vcpu_e500-&gt;vcpu;</div><div class='add'>+</div><div class='add'>+	/* Invalid PIR value -- this LPID dosn't have valid state on any cpu */</div><div class='add'>+	vcpu-&gt;arch.oldpir = 0xffffffff;</div><div class='add'>+</div><div class='add'>+	err = kvm_vcpu_init(vcpu, kvm, id);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_vcpu;</div><div class='add'>+</div><div class='add'>+	err = kvmppc_e500_tlb_init(vcpu_e500);</div><div class='add'>+	if (err)</div><div class='add'>+		goto uninit_vcpu;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.shared = (void *)__get_free_page(GFP_KERNEL | __GFP_ZERO);</div><div class='add'>+	if (!vcpu-&gt;arch.shared)</div><div class='add'>+		goto uninit_tlb;</div><div class='add'>+</div><div class='add'>+	return vcpu;</div><div class='add'>+</div><div class='add'>+uninit_tlb:</div><div class='add'>+	kvmppc_e500_tlb_uninit(vcpu_e500);</div><div class='add'>+uninit_vcpu:</div><div class='add'>+	kvm_vcpu_uninit(vcpu);</div><div class='add'>+</div><div class='add'>+free_vcpu:</div><div class='add'>+	kmem_cache_free(kvm_vcpu_cache, vcpu_e500);</div><div class='add'>+out:</div><div class='add'>+	return ERR_PTR(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);</div><div class='add'>+</div><div class='add'>+	free_page((unsigned long)vcpu-&gt;arch.shared);</div><div class='add'>+	kvmppc_e500_tlb_uninit(vcpu_e500);</div><div class='add'>+	kvm_vcpu_uninit(vcpu);</div><div class='add'>+	kmem_cache_free(kvm_vcpu_cache, vcpu_e500);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvmppc_core_init_vm(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	int lpid;</div><div class='add'>+</div><div class='add'>+	lpid = kvmppc_alloc_lpid();</div><div class='add'>+	if (lpid &lt; 0)</div><div class='add'>+		return lpid;</div><div class='add'>+</div><div class='add'>+	kvm-&gt;arch.lpid = lpid;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_core_destroy_vm(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	kvmppc_free_lpid(kvm-&gt;arch.lpid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init kvmppc_e500mc_init(void)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	r = kvmppc_booke_init();</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	kvmppc_init_lpid(64);</div><div class='add'>+	kvmppc_claim_lpid(0); /* host */</div><div class='add'>+</div><div class='add'>+	return kvm_init(NULL, sizeof(struct kvmppc_vcpu_e500), 0, THIS_MODULE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit kvmppc_e500mc_exit(void)</div><div class='add'>+{</div><div class='add'>+	kvmppc_booke_exit();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(kvmppc_e500mc_init);</div><div class='add'>+module_exit(kvmppc_e500mc_exit);</div><div class='head'>diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c<br/>index 968f40101883..f90e86dea7a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/emulate.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/emulate.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/emulate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/emulate.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;linux/clockchips.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/reg.h&gt;</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='hunk'>@@ -35,7 +36,9 @@</div><div class='ctx'> #define OP_TRAP 3</div><div class='ctx'> #define OP_TRAP_64 2</div><div class='ctx'> </div><div class='add'>+#define OP_31_XOP_TRAP      4</div><div class='ctx'> #define OP_31_XOP_LWZX      23</div><div class='add'>+#define OP_31_XOP_TRAP_64   68</div><div class='ctx'> #define OP_31_XOP_LBZX      87</div><div class='ctx'> #define OP_31_XOP_STWX      151</div><div class='ctx'> #define OP_31_XOP_STBX      215</div><div class='hunk'>@@ -102,8 +105,12 @@ void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	dec_time = vcpu-&gt;arch.dec;</div><div class='del'>-	dec_time *= 1000;</div><div class='del'>-	do_div(dec_time, tb_ticks_per_usec);</div><div class='add'>+	/*</div><div class='add'>+	 * Guest timebase ticks at the same frequency as host decrementer.</div><div class='add'>+	 * So use the host decrementer calculations for decrementer emulation.</div><div class='add'>+	 */</div><div class='add'>+	dec_time = dec_time &lt;&lt; decrementer_clockevent.shift;</div><div class='add'>+	do_div(dec_time, decrementer_clockevent.mult);</div><div class='ctx'> 	dec_nsec = do_div(dec_time, NSEC_PER_SEC);</div><div class='ctx'> 	hrtimer_start(&amp;vcpu-&gt;arch.dec_timer,</div><div class='ctx'> 		ktime_set(dec_time, dec_nsec), HRTIMER_MODE_REL);</div><div class='hunk'>@@ -141,14 +148,13 @@ u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb)</div><div class='ctx'> int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	u32 inst = kvmppc_get_last_inst(vcpu);</div><div class='del'>-	u32 ea;</div><div class='del'>-	int ra;</div><div class='del'>-	int rb;</div><div class='del'>-	int rs;</div><div class='del'>-	int rt;</div><div class='del'>-	int sprn;</div><div class='add'>+	int ra = get_ra(inst);</div><div class='add'>+	int rs = get_rs(inst);</div><div class='add'>+	int rt = get_rt(inst);</div><div class='add'>+	int sprn = get_sprn(inst);</div><div class='ctx'> 	enum emulation_result emulated = EMULATE_DONE;</div><div class='ctx'> 	int advance = 1;</div><div class='add'>+	ulong spr_val = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* this default type might be overwritten by subcategories */</div><div class='ctx'> 	kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);</div><div class='hunk'>@@ -170,173 +176,143 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)</div><div class='ctx'> 	case 31:</div><div class='ctx'> 		switch (get_xop(inst)) {</div><div class='ctx'> </div><div class='add'>+		case OP_31_XOP_TRAP:</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='add'>+		case OP_31_XOP_TRAP_64:</div><div class='add'>+#endif</div><div class='add'>+#ifdef CONFIG_PPC_BOOK3S</div><div class='add'>+			kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);</div><div class='add'>+#else</div><div class='add'>+			kvmppc_core_queue_program(vcpu,</div><div class='add'>+					vcpu-&gt;arch.shared-&gt;esr | ESR_PTR);</div><div class='add'>+#endif</div><div class='add'>+			advance = 0;</div><div class='add'>+			break;</div><div class='ctx'> 		case OP_31_XOP_LWZX:</div><div class='del'>-			rt = get_rt(inst);</div><div class='ctx'> 			emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_LBZX:</div><div class='del'>-			rt = get_rt(inst);</div><div class='ctx'> 			emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_LBZUX:</div><div class='del'>-			rt = get_rt(inst);</div><div class='del'>-			ra = get_ra(inst);</div><div class='del'>-			rb = get_rb(inst);</div><div class='del'>-</div><div class='del'>-			ea = kvmppc_get_gpr(vcpu, rb);</div><div class='del'>-			if (ra)</div><div class='del'>-				ea += kvmppc_get_gpr(vcpu, ra);</div><div class='del'>-</div><div class='ctx'> 			emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);</div><div class='del'>-			kvmppc_set_gpr(vcpu, ra, ea);</div><div class='add'>+			kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.vaddr_accessed);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_STWX:</div><div class='del'>-			rs = get_rs(inst);</div><div class='ctx'> 			emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 						       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 			                               4, 1);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_STBX:</div><div class='del'>-			rs = get_rs(inst);</div><div class='ctx'> 			emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 						       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 			                               1, 1);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_STBUX:</div><div class='del'>-			rs = get_rs(inst);</div><div class='del'>-			ra = get_ra(inst);</div><div class='del'>-			rb = get_rb(inst);</div><div class='del'>-</div><div class='del'>-			ea = kvmppc_get_gpr(vcpu, rb);</div><div class='del'>-			if (ra)</div><div class='del'>-				ea += kvmppc_get_gpr(vcpu, ra);</div><div class='del'>-</div><div class='ctx'> 			emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 						       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 			                               1, 1);</div><div class='del'>-			kvmppc_set_gpr(vcpu, rs, ea);</div><div class='add'>+			kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.vaddr_accessed);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_LHAX:</div><div class='del'>-			rt = get_rt(inst);</div><div class='ctx'> 			emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_LHZX:</div><div class='del'>-			rt = get_rt(inst);</div><div class='ctx'> 			emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_LHZUX:</div><div class='del'>-			rt = get_rt(inst);</div><div class='del'>-			ra = get_ra(inst);</div><div class='del'>-			rb = get_rb(inst);</div><div class='del'>-</div><div class='del'>-			ea = kvmppc_get_gpr(vcpu, rb);</div><div class='del'>-			if (ra)</div><div class='del'>-				ea += kvmppc_get_gpr(vcpu, ra);</div><div class='del'>-</div><div class='ctx'> 			emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);</div><div class='del'>-			kvmppc_set_gpr(vcpu, ra, ea);</div><div class='add'>+			kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.vaddr_accessed);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_MFSPR:</div><div class='del'>-			sprn = get_sprn(inst);</div><div class='del'>-			rt = get_rt(inst);</div><div class='del'>-</div><div class='ctx'> 			switch (sprn) {</div><div class='ctx'> 			case SPRN_SRR0:</div><div class='del'>-				kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;srr0);</div><div class='add'>+				spr_val = vcpu-&gt;arch.shared-&gt;srr0;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SPRN_SRR1:</div><div class='del'>-				kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;srr1);</div><div class='add'>+				spr_val = vcpu-&gt;arch.shared-&gt;srr1;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SPRN_PVR:</div><div class='del'>-				kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.pvr); break;</div><div class='add'>+				spr_val = vcpu-&gt;arch.pvr;</div><div class='add'>+				break;</div><div class='ctx'> 			case SPRN_PIR:</div><div class='del'>-				kvmppc_set_gpr(vcpu, rt, vcpu-&gt;vcpu_id); break;</div><div class='add'>+				spr_val = vcpu-&gt;vcpu_id;</div><div class='add'>+				break;</div><div class='ctx'> 			case SPRN_MSSSR0:</div><div class='del'>-				kvmppc_set_gpr(vcpu, rt, 0); break;</div><div class='add'>+				spr_val = 0;</div><div class='add'>+				break;</div><div class='ctx'> </div><div class='ctx'> 			/* Note: mftb and TBRL/TBWL are user-accessible, so</div><div class='ctx'> 			 * the guest can always access the real TB anyways.</div><div class='ctx'> 			 * In fact, we probably will never see these traps. */</div><div class='ctx'> 			case SPRN_TBWL:</div><div class='del'>-				kvmppc_set_gpr(vcpu, rt, get_tb() &gt;&gt; 32); break;</div><div class='add'>+				spr_val = get_tb() &gt;&gt; 32;</div><div class='add'>+				break;</div><div class='ctx'> 			case SPRN_TBWU:</div><div class='del'>-				kvmppc_set_gpr(vcpu, rt, get_tb()); break;</div><div class='add'>+				spr_val = get_tb();</div><div class='add'>+				break;</div><div class='ctx'> </div><div class='ctx'> 			case SPRN_SPRG0:</div><div class='del'>-				kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;sprg0);</div><div class='add'>+				spr_val = vcpu-&gt;arch.shared-&gt;sprg0;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SPRN_SPRG1:</div><div class='del'>-				kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;sprg1);</div><div class='add'>+				spr_val = vcpu-&gt;arch.shared-&gt;sprg1;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SPRN_SPRG2:</div><div class='del'>-				kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;sprg2);</div><div class='add'>+				spr_val = vcpu-&gt;arch.shared-&gt;sprg2;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SPRN_SPRG3:</div><div class='del'>-				kvmppc_set_gpr(vcpu, rt, vcpu-&gt;arch.shared-&gt;sprg3);</div><div class='add'>+				spr_val = vcpu-&gt;arch.shared-&gt;sprg3;</div><div class='ctx'> 				break;</div><div class='ctx'> 			/* Note: SPRG4-7 are user-readable, so we don't get</div><div class='ctx'> 			 * a trap. */</div><div class='ctx'> </div><div class='ctx'> 			case SPRN_DEC:</div><div class='del'>-			{</div><div class='del'>-				kvmppc_set_gpr(vcpu, rt,</div><div class='del'>-					       kvmppc_get_dec(vcpu, get_tb()));</div><div class='add'>+				spr_val = kvmppc_get_dec(vcpu, get_tb());</div><div class='ctx'> 				break;</div><div class='del'>-			}</div><div class='ctx'> 			default:</div><div class='del'>-				emulated = kvmppc_core_emulate_mfspr(vcpu, sprn, rt);</div><div class='del'>-				if (emulated == EMULATE_FAIL) {</div><div class='del'>-					printk("mfspr: unknown spr %x\n", sprn);</div><div class='del'>-					kvmppc_set_gpr(vcpu, rt, 0);</div><div class='add'>+				emulated = kvmppc_core_emulate_mfspr(vcpu, sprn,</div><div class='add'>+								     &amp;spr_val);</div><div class='add'>+				if (unlikely(emulated == EMULATE_FAIL)) {</div><div class='add'>+					printk(KERN_INFO "mfspr: unknown spr "</div><div class='add'>+						"0x%x\n", sprn);</div><div class='ctx'> 				}</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='add'>+			kvmppc_set_gpr(vcpu, rt, spr_val);</div><div class='ctx'> 			kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_STHX:</div><div class='del'>-			rs = get_rs(inst);</div><div class='del'>-			ra = get_ra(inst);</div><div class='del'>-			rb = get_rb(inst);</div><div class='del'>-</div><div class='ctx'> 			emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 						       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 			                               2, 1);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_STHUX:</div><div class='del'>-			rs = get_rs(inst);</div><div class='del'>-			ra = get_ra(inst);</div><div class='del'>-			rb = get_rb(inst);</div><div class='del'>-</div><div class='del'>-			ea = kvmppc_get_gpr(vcpu, rb);</div><div class='del'>-			if (ra)</div><div class='del'>-				ea += kvmppc_get_gpr(vcpu, ra);</div><div class='del'>-</div><div class='ctx'> 			emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 						       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 			                               2, 1);</div><div class='del'>-			kvmppc_set_gpr(vcpu, ra, ea);</div><div class='add'>+			kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.vaddr_accessed);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_MTSPR:</div><div class='del'>-			sprn = get_sprn(inst);</div><div class='del'>-			rs = get_rs(inst);</div><div class='add'>+			spr_val = kvmppc_get_gpr(vcpu, rs);</div><div class='ctx'> 			switch (sprn) {</div><div class='ctx'> 			case SPRN_SRR0:</div><div class='del'>-				vcpu-&gt;arch.shared-&gt;srr0 = kvmppc_get_gpr(vcpu, rs);</div><div class='add'>+				vcpu-&gt;arch.shared-&gt;srr0 = spr_val;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SPRN_SRR1:</div><div class='del'>-				vcpu-&gt;arch.shared-&gt;srr1 = kvmppc_get_gpr(vcpu, rs);</div><div class='add'>+				vcpu-&gt;arch.shared-&gt;srr1 = spr_val;</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			/* XXX We need to context-switch the timebase for</div><div class='hunk'>@@ -347,27 +323,29 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)</div><div class='ctx'> 			case SPRN_MSSSR0: break;</div><div class='ctx'> </div><div class='ctx'> 			case SPRN_DEC:</div><div class='del'>-				vcpu-&gt;arch.dec = kvmppc_get_gpr(vcpu, rs);</div><div class='add'>+				vcpu-&gt;arch.dec = spr_val;</div><div class='ctx'> 				kvmppc_emulate_dec(vcpu);</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			case SPRN_SPRG0:</div><div class='del'>-				vcpu-&gt;arch.shared-&gt;sprg0 = kvmppc_get_gpr(vcpu, rs);</div><div class='add'>+				vcpu-&gt;arch.shared-&gt;sprg0 = spr_val;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SPRN_SPRG1:</div><div class='del'>-				vcpu-&gt;arch.shared-&gt;sprg1 = kvmppc_get_gpr(vcpu, rs);</div><div class='add'>+				vcpu-&gt;arch.shared-&gt;sprg1 = spr_val;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SPRN_SPRG2:</div><div class='del'>-				vcpu-&gt;arch.shared-&gt;sprg2 = kvmppc_get_gpr(vcpu, rs);</div><div class='add'>+				vcpu-&gt;arch.shared-&gt;sprg2 = spr_val;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SPRN_SPRG3:</div><div class='del'>-				vcpu-&gt;arch.shared-&gt;sprg3 = kvmppc_get_gpr(vcpu, rs);</div><div class='add'>+				vcpu-&gt;arch.shared-&gt;sprg3 = spr_val;</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			default:</div><div class='del'>-				emulated = kvmppc_core_emulate_mtspr(vcpu, sprn, rs);</div><div class='add'>+				emulated = kvmppc_core_emulate_mtspr(vcpu, sprn,</div><div class='add'>+								     spr_val);</div><div class='ctx'> 				if (emulated == EMULATE_FAIL)</div><div class='del'>-					printk("mtspr: unknown spr %x\n", sprn);</div><div class='add'>+					printk(KERN_INFO "mtspr: unknown spr "</div><div class='add'>+						"0x%x\n", sprn);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);</div><div class='hunk'>@@ -382,7 +360,6 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_LWBRX:</div><div class='del'>-			rt = get_rt(inst);</div><div class='ctx'> 			emulated = kvmppc_handle_load(run, vcpu, rt, 4, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -390,25 +367,16 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_STWBRX:</div><div class='del'>-			rs = get_rs(inst);</div><div class='del'>-			ra = get_ra(inst);</div><div class='del'>-			rb = get_rb(inst);</div><div class='del'>-</div><div class='ctx'> 			emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 						       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 			                               4, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_LHBRX:</div><div class='del'>-			rt = get_rt(inst);</div><div class='ctx'> 			emulated = kvmppc_handle_load(run, vcpu, rt, 2, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_31_XOP_STHBRX:</div><div class='del'>-			rs = get_rs(inst);</div><div class='del'>-			ra = get_ra(inst);</div><div class='del'>-			rb = get_rb(inst);</div><div class='del'>-</div><div class='ctx'> 			emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 						       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 			                               2, 0);</div><div class='hunk'>@@ -421,99 +389,78 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_LWZ:</div><div class='del'>-		rt = get_rt(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_LWZU:</div><div class='del'>-		ra = get_ra(inst);</div><div class='del'>-		rt = get_rt(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);</div><div class='del'>-		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.paddr_accessed);</div><div class='add'>+		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.vaddr_accessed);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_LBZ:</div><div class='del'>-		rt = get_rt(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_LBZU:</div><div class='del'>-		ra = get_ra(inst);</div><div class='del'>-		rt = get_rt(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);</div><div class='del'>-		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.paddr_accessed);</div><div class='add'>+		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.vaddr_accessed);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_STW:</div><div class='del'>-		rs = get_rs(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 					       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 		                               4, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_STWU:</div><div class='del'>-		ra = get_ra(inst);</div><div class='del'>-		rs = get_rs(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 					       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 		                               4, 1);</div><div class='del'>-		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.paddr_accessed);</div><div class='add'>+		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.vaddr_accessed);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_STB:</div><div class='del'>-		rs = get_rs(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 					       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 		                               1, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_STBU:</div><div class='del'>-		ra = get_ra(inst);</div><div class='del'>-		rs = get_rs(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 					       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 		                               1, 1);</div><div class='del'>-		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.paddr_accessed);</div><div class='add'>+		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.vaddr_accessed);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_LHZ:</div><div class='del'>-		rt = get_rt(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_LHZU:</div><div class='del'>-		ra = get_ra(inst);</div><div class='del'>-		rt = get_rt(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);</div><div class='del'>-		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.paddr_accessed);</div><div class='add'>+		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.vaddr_accessed);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_LHA:</div><div class='del'>-		rt = get_rt(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_LHAU:</div><div class='del'>-		ra = get_ra(inst);</div><div class='del'>-		rt = get_rt(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);</div><div class='del'>-		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.paddr_accessed);</div><div class='add'>+		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.vaddr_accessed);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_STH:</div><div class='del'>-		rs = get_rs(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 					       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 		                               2, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case OP_STHU:</div><div class='del'>-		ra = get_ra(inst);</div><div class='del'>-		rs = get_rs(inst);</div><div class='ctx'> 		emulated = kvmppc_handle_store(run, vcpu,</div><div class='ctx'> 					       kvmppc_get_gpr(vcpu, rs),</div><div class='ctx'> 		                               2, 1);</div><div class='del'>-		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.paddr_accessed);</div><div class='add'>+		kvmppc_set_gpr(vcpu, ra, vcpu-&gt;arch.vaddr_accessed);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='head'>diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c<br/>index 00d7e345b3fe..1493c8de947b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/powerpc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/powerpc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/powerpc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/powerpc.c</a></div><div class='hunk'>@@ -43,6 +43,11 @@ int kvm_arch_vcpu_runnable(struct kvm_vcpu *v)</div><div class='ctx'> 	       v-&gt;requests;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvmppc_kvm_pv(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	int nr = kvmppc_get_gpr(vcpu, 11);</div><div class='hunk'>@@ -74,7 +79,7 @@ int kvmppc_kvm_pv(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	}</div><div class='ctx'> 	case HC_VENDOR_KVM | KVM_HC_FEATURES:</div><div class='ctx'> 		r = HC_EV_SUCCESS;</div><div class='del'>-#if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500)</div><div class='add'>+#if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2)</div><div class='ctx'> 		/* XXX Missing magic page on 44x */</div><div class='ctx'> 		r2 |= (1 &lt;&lt; KVM_FEATURE_MAGIC_PAGE);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -109,6 +114,11 @@ int kvmppc_sanity_check(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		goto out;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM_BOOKE_HV</div><div class='add'>+	if (!cpu_has_feature(CPU_FTR_EMB_HV))</div><div class='add'>+		goto out;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	r = true;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -225,7 +235,7 @@ int kvm_dev_ioctl_check_extension(long ext)</div><div class='ctx'> 	case KVM_CAP_PPC_PAIRED_SINGLES:</div><div class='ctx'> 	case KVM_CAP_PPC_OSI:</div><div class='ctx'> 	case KVM_CAP_PPC_GET_PVINFO:</div><div class='del'>-#ifdef CONFIG_KVM_E500</div><div class='add'>+#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)</div><div class='ctx'> 	case KVM_CAP_SW_TLB:</div><div class='ctx'> #endif</div><div class='ctx'> 		r = 1;</div><div class='hunk'>@@ -234,10 +244,12 @@ int kvm_dev_ioctl_check_extension(long ext)</div><div class='ctx'> 		r = KVM_COALESCED_MMIO_PAGE_OFFSET;</div><div class='ctx'> 		break;</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_KVM_BOOK3S_64_HV</div><div class='add'>+#ifdef CONFIG_PPC_BOOK3S_64</div><div class='ctx'> 	case KVM_CAP_SPAPR_TCE:</div><div class='ctx'> 		r = 1;</div><div class='ctx'> 		break;</div><div class='add'>+#endif /* CONFIG_PPC_BOOK3S_64 */</div><div class='add'>+#ifdef CONFIG_KVM_BOOK3S_64_HV</div><div class='ctx'> 	case KVM_CAP_PPC_SMT:</div><div class='ctx'> 		r = threads_per_core;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -267,6 +279,11 @@ int kvm_dev_ioctl_check_extension(long ext)</div><div class='ctx'> 	case KVM_CAP_MAX_VCPUS:</div><div class='ctx'> 		r = KVM_MAX_VCPUS;</div><div class='ctx'> 		break;</div><div class='add'>+#ifdef CONFIG_PPC_BOOK3S_64</div><div class='add'>+	case KVM_CAP_PPC_GET_SMMU_INFO:</div><div class='add'>+		r = 1;</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='ctx'> 	default:</div><div class='ctx'> 		r = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -588,21 +605,6 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_vcpu_kick(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	int me;</div><div class='del'>-	int cpu = vcpu-&gt;cpu;</div><div class='del'>-</div><div class='del'>-	me = get_cpu();</div><div class='del'>-	if (waitqueue_active(vcpu-&gt;arch.wqp)) {</div><div class='del'>-		wake_up_interruptible(vcpu-&gt;arch.wqp);</div><div class='del'>-		vcpu-&gt;stat.halt_wakeup++;</div><div class='del'>-	} else if (cpu != me &amp;&amp; cpu != -1) {</div><div class='del'>-		smp_send_reschedule(vcpu-&gt;cpu);</div><div class='del'>-	}</div><div class='del'>-	put_cpu();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq)</div><div class='ctx'> {</div><div class='ctx'> 	if (irq-&gt;irq == KVM_INTERRUPT_UNSET) {</div><div class='hunk'>@@ -611,6 +613,7 @@ int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kvmppc_core_queue_external(vcpu, irq);</div><div class='add'>+</div><div class='ctx'> 	kvm_vcpu_kick(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -633,7 +636,7 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		r = 0;</div><div class='ctx'> 		vcpu-&gt;arch.papr_enabled = true;</div><div class='ctx'> 		break;</div><div class='del'>-#ifdef CONFIG_KVM_E500</div><div class='add'>+#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)</div><div class='ctx'> 	case KVM_CAP_SW_TLB: {</div><div class='ctx'> 		struct kvm_config_tlb cfg;</div><div class='ctx'> 		void __user *user_ptr = (void __user *)(uintptr_t)cap-&gt;args[0];</div><div class='hunk'>@@ -710,7 +713,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_KVM_E500</div><div class='add'>+#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)</div><div class='ctx'> 	case KVM_DIRTY_TLB: {</div><div class='ctx'> 		struct kvm_dirty_tlb dirty;</div><div class='ctx'> 		r = -EFAULT;</div><div class='hunk'>@@ -720,7 +723,6 @@ long kvm_arch_vcpu_ioctl(struct file *filp,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='ctx'> 	default:</div><div class='ctx'> 		r = -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -777,7 +779,7 @@ long kvm_arch_vm_ioctl(struct file *filp,</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-#ifdef CONFIG_KVM_BOOK3S_64_HV</div><div class='add'>+#ifdef CONFIG_PPC_BOOK3S_64</div><div class='ctx'> 	case KVM_CREATE_SPAPR_TCE: {</div><div class='ctx'> 		struct kvm_create_spapr_tce create_tce;</div><div class='ctx'> 		struct kvm *kvm = filp-&gt;private_data;</div><div class='hunk'>@@ -788,7 +790,9 @@ long kvm_arch_vm_ioctl(struct file *filp,</div><div class='ctx'> 		r = kvm_vm_ioctl_create_spapr_tce(kvm, &amp;create_tce);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='add'>+#endif /* CONFIG_PPC_BOOK3S_64 */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM_BOOK3S_64_HV</div><div class='ctx'> 	case KVM_ALLOCATE_RMA: {</div><div class='ctx'> 		struct kvm *kvm = filp-&gt;private_data;</div><div class='ctx'> 		struct kvm_allocate_rma rma;</div><div class='hunk'>@@ -800,6 +804,18 @@ long kvm_arch_vm_ioctl(struct file *filp,</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* CONFIG_KVM_BOOK3S_64_HV */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PPC_BOOK3S_64</div><div class='add'>+	case KVM_PPC_GET_SMMU_INFO: {</div><div class='add'>+		struct kvm *kvm = filp-&gt;private_data;</div><div class='add'>+		struct kvm_ppc_smmu_info info;</div><div class='add'>+</div><div class='add'>+		memset(&amp;info, 0, sizeof(info));</div><div class='add'>+		r = kvm_vm_ioctl_get_smmu_info(kvm, &amp;info);</div><div class='add'>+		if (r &gt;= 0 &amp;&amp; copy_to_user(argp, &amp;info, sizeof(info)))</div><div class='add'>+			r = -EFAULT;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+#endif /* CONFIG_PPC_BOOK3S_64 */</div><div class='ctx'> 	default:</div><div class='ctx'> 		r = -ENOTTY;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -808,6 +824,40 @@ out:</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)];</div><div class='add'>+static unsigned long nr_lpids;</div><div class='add'>+</div><div class='add'>+long kvmppc_alloc_lpid(void)</div><div class='add'>+{</div><div class='add'>+	long lpid;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		lpid = find_first_zero_bit(lpid_inuse, KVMPPC_NR_LPIDS);</div><div class='add'>+		if (lpid &gt;= nr_lpids) {</div><div class='add'>+			pr_err("%s: No LPIDs free\n", __func__);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	} while (test_and_set_bit(lpid, lpid_inuse));</div><div class='add'>+</div><div class='add'>+	return lpid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_claim_lpid(long lpid)</div><div class='add'>+{</div><div class='add'>+	set_bit(lpid, lpid_inuse);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_free_lpid(long lpid)</div><div class='add'>+{</div><div class='add'>+	clear_bit(lpid, lpid_inuse);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvmppc_init_lpid(unsigned long nr_lpids_param)</div><div class='add'>+{</div><div class='add'>+	nr_lpids = min_t(unsigned long, KVMPPC_NR_LPIDS, nr_lpids_param);</div><div class='add'>+	memset(lpid_inuse, 0, sizeof(lpid_inuse));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvm_arch_init(void *opaque)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/powerpc/kvm/timing.h b/arch/powerpc/kvm/timing.h<br/>index 8167d42a776f..bf191e72b2d8 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/kvm/timing.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/kvm/timing.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/kvm/timing.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/kvm/timing.h</a></div><div class='hunk'>@@ -93,6 +93,12 @@ static inline void kvmppc_account_exit_stat(struct kvm_vcpu *vcpu, int type)</div><div class='ctx'> 	case SIGNAL_EXITS:</div><div class='ctx'> 		vcpu-&gt;stat.signal_exits++;</div><div class='ctx'> 		break;</div><div class='add'>+	case DBELL_EXITS:</div><div class='add'>+		vcpu-&gt;stat.dbell_exits++;</div><div class='add'>+		break;</div><div class='add'>+	case GDBELL_EXITS:</div><div class='add'>+		vcpu-&gt;stat.gdbell_exits++;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/lib/copyuser_64.S b/arch/powerpc/lib/copyuser_64.S<br/>index 773d38f90aaa..d73a59014900 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/lib/copyuser_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/lib/copyuser_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/lib/copyuser_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/lib/copyuser_64.S</a></div><div class='hunk'>@@ -30,7 +30,7 @@ _GLOBAL(__copy_tofrom_user_base)</div><div class='ctx'> 	dcbt	0,r4</div><div class='ctx'> 	beq	.Lcopy_page_4K</div><div class='ctx'> 	andi.	r6,r6,7</div><div class='del'>-	PPC_MTOCRF	0x01,r5</div><div class='add'>+	PPC_MTOCRF(0x01,r5)</div><div class='ctx'> 	blt	cr1,.Lshort_copy</div><div class='ctx'> /* Below we want to nop out the bne if we're on a CPU that has the</div><div class='ctx'>  * CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit</div><div class='hunk'>@@ -186,7 +186,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)</div><div class='ctx'> 	blr</div><div class='ctx'> </div><div class='ctx'> .Ldst_unaligned:</div><div class='del'>-	PPC_MTOCRF	0x01,r6		/* put #bytes to 8B bdry into cr7 */</div><div class='add'>+	PPC_MTOCRF(0x01,r6)		/* put #bytes to 8B bdry into cr7 */</div><div class='ctx'> 	subf	r5,r6,r5</div><div class='ctx'> 	li	r7,0</div><div class='ctx'> 	cmpldi	cr1,r5,16</div><div class='hunk'>@@ -201,7 +201,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)</div><div class='ctx'> 2:	bf	cr7*4+1,3f</div><div class='ctx'> 37:	lwzx	r0,r7,r4</div><div class='ctx'> 83:	stwx	r0,r7,r3</div><div class='del'>-3:	PPC_MTOCRF	0x01,r5</div><div class='add'>+3:	PPC_MTOCRF(0x01,r5)</div><div class='ctx'> 	add	r4,r6,r4</div><div class='ctx'> 	add	r3,r6,r3</div><div class='ctx'> 	b	.Ldst_aligned</div><div class='head'>diff --git a/arch/powerpc/lib/mem_64.S b/arch/powerpc/lib/mem_64.S<br/>index 11ce045e21fd..f4fcb0bc6563 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/lib/mem_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/lib/mem_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/lib/mem_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/lib/mem_64.S</a></div><div class='hunk'>@@ -19,7 +19,7 @@ _GLOBAL(memset)</div><div class='ctx'> 	rlwimi	r4,r4,16,0,15</div><div class='ctx'> 	cmplw	cr1,r5,r0		/* do we get that far? */</div><div class='ctx'> 	rldimi	r4,r4,32,0</div><div class='del'>-	PPC_MTOCRF	1,r0</div><div class='add'>+	PPC_MTOCRF(1,r0)</div><div class='ctx'> 	mr	r6,r3</div><div class='ctx'> 	blt	cr1,8f</div><div class='ctx'> 	beq+	3f			/* if already 8-byte aligned */</div><div class='hunk'>@@ -49,7 +49,7 @@ _GLOBAL(memset)</div><div class='ctx'> 	bdnz	4b</div><div class='ctx'> 5:	srwi.	r0,r5,3</div><div class='ctx'> 	clrlwi	r5,r5,29</div><div class='del'>-	PPC_MTOCRF	1,r0</div><div class='add'>+	PPC_MTOCRF(1,r0)</div><div class='ctx'> 	beq	8f</div><div class='ctx'> 	bf	29,6f</div><div class='ctx'> 	std	r4,0(r6)</div><div class='hunk'>@@ -65,7 +65,7 @@ _GLOBAL(memset)</div><div class='ctx'> 	std	r4,0(r6)</div><div class='ctx'> 	addi	r6,r6,8</div><div class='ctx'> 8:	cmpwi	r5,0</div><div class='del'>-	PPC_MTOCRF	1,r5</div><div class='add'>+	PPC_MTOCRF(1,r5)</div><div class='ctx'> 	beqlr+</div><div class='ctx'> 	bf	29,9f</div><div class='ctx'> 	stw	r4,0(r6)</div><div class='head'>diff --git a/arch/powerpc/lib/memcpy_64.S b/arch/powerpc/lib/memcpy_64.S<br/>index e178922b2c21..82fea3963e15 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/lib/memcpy_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/lib/memcpy_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/lib/memcpy_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/lib/memcpy_64.S</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> 	.align	7</div><div class='ctx'> _GLOBAL(memcpy)</div><div class='ctx'> 	std	r3,48(r1)	/* save destination pointer for return value */</div><div class='del'>-	PPC_MTOCRF	0x01,r5</div><div class='add'>+	PPC_MTOCRF(0x01,r5)</div><div class='ctx'> 	cmpldi	cr1,r5,16</div><div class='ctx'> 	neg	r6,r3		# LS 3 bits = # bytes to 8-byte dest bdry</div><div class='ctx'> 	andi.	r6,r6,7</div><div class='hunk'>@@ -154,7 +154,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)</div><div class='ctx'> 	blr</div><div class='ctx'> </div><div class='ctx'> .Ldst_unaligned:</div><div class='del'>-	PPC_MTOCRF	0x01,r6		# put #bytes to 8B bdry into cr7</div><div class='add'>+	PPC_MTOCRF(0x01,r6)		# put #bytes to 8B bdry into cr7</div><div class='ctx'> 	subf	r5,r6,r5</div><div class='ctx'> 	li	r7,0</div><div class='ctx'> 	cmpldi	cr1,r5,16</div><div class='hunk'>@@ -169,7 +169,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)</div><div class='ctx'> 2:	bf	cr7*4+1,3f</div><div class='ctx'> 	lwzx	r0,r7,r4</div><div class='ctx'> 	stwx	r0,r7,r3</div><div class='del'>-3:	PPC_MTOCRF	0x01,r5</div><div class='add'>+3:	PPC_MTOCRF(0x01,r5)</div><div class='ctx'> 	add	r4,r6,r4</div><div class='ctx'> 	add	r3,r6,r3</div><div class='ctx'> 	b	.Ldst_aligned</div><div class='head'>diff --git a/arch/powerpc/lib/string.S b/arch/powerpc/lib/string.S<br/>index 455881a5563f..093d6316435c 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/lib/string.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/lib/string.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/lib/string.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/lib/string.S</a></div><div class='hunk'>@@ -160,48 +160,3 @@ _GLOBAL(__clear_user)</div><div class='ctx'> 	PPC_LONG	1b,91b</div><div class='ctx'> 	PPC_LONG	8b,92b</div><div class='ctx'> 	.text</div><div class='del'>-</div><div class='del'>-_GLOBAL(__strncpy_from_user)</div><div class='del'>-	addi	r6,r3,-1</div><div class='del'>-	addi	r4,r4,-1</div><div class='del'>-	cmpwi	0,r5,0</div><div class='del'>-	beq	2f</div><div class='del'>-	mtctr	r5</div><div class='del'>-1:	lbzu	r0,1(r4)</div><div class='del'>-	cmpwi	0,r0,0</div><div class='del'>-	stbu	r0,1(r6)</div><div class='del'>-	bdnzf	2,1b		/* dec ctr, branch if ctr != 0 &amp;&amp; !cr0.eq */</div><div class='del'>-	beq	3f</div><div class='del'>-2:	addi	r6,r6,1</div><div class='del'>-3:	subf	r3,r3,r6</div><div class='del'>-	blr</div><div class='del'>-99:	li	r3,-EFAULT</div><div class='del'>-	blr</div><div class='del'>-</div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	PPC_LONG	1b,99b</div><div class='del'>-	.text</div><div class='del'>-</div><div class='del'>-/* r3 = str, r4 = len (&gt; 0), r5 = top (highest addr) */</div><div class='del'>-_GLOBAL(__strnlen_user)</div><div class='del'>-	addi	r7,r3,-1</div><div class='del'>-	subf	r6,r7,r5	/* top+1 - str */</div><div class='del'>-	cmplw	0,r4,r6</div><div class='del'>-	bge	0f</div><div class='del'>-	mr	r6,r4</div><div class='del'>-0:	mtctr	r6		/* ctr = min(len, top - str) */</div><div class='del'>-1:	lbzu	r0,1(r7)	/* get next byte */</div><div class='del'>-	cmpwi	0,r0,0</div><div class='del'>-	bdnzf	2,1b		/* loop if --ctr != 0 &amp;&amp; byte != 0 */</div><div class='del'>-	addi	r7,r7,1</div><div class='del'>-	subf	r3,r3,r7	/* number of bytes we have looked at */</div><div class='del'>-	beqlr			/* return if we found a 0 byte */</div><div class='del'>-	cmpw	0,r3,r4		/* did we look at all len bytes? */</div><div class='del'>-	blt	99f		/* if not, must have hit top */</div><div class='del'>-	addi	r3,r4,1		/* return len + 1 to indicate no null found */</div><div class='del'>-	blr</div><div class='del'>-99:	li	r3,0		/* bad address, return 0 */</div><div class='del'>-	blr</div><div class='del'>-</div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	PPC_LONG	1b,99b</div><div class='head'>diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c<br/>index fb05b123218f..1a6de0a7d8eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/hugetlbpage.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/hugetlbpage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -271,7 +271,8 @@ int alloc_bootmem_huge_page(struct hstate *hstate)</div><div class='ctx'> </div><div class='ctx'> unsigned long gpage_npages[MMU_PAGE_COUNT];</div><div class='ctx'> </div><div class='del'>-static int __init do_gpage_early_setup(char *param, char *val)</div><div class='add'>+static int __init do_gpage_early_setup(char *param, char *val,</div><div class='add'>+				       const char *unused)</div><div class='ctx'> {</div><div class='ctx'> 	static phys_addr_t size;</div><div class='ctx'> 	unsigned long npages;</div><div class='head'>diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c<br/>index 5b63bd3da4a9..e779642c25e5 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/mm/mmu_context_nohash.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/mm/mmu_context_nohash.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/mm/mmu_context_nohash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/mm/mmu_context_nohash.c</a></div><div class='hunk'>@@ -333,9 +333,7 @@ static int __cpuinit mmu_context_cpu_notify(struct notifier_block *self,</div><div class='ctx'> 					    unsigned long action, void *hcpu)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cpu = (unsigned int)(long)hcpu;</div><div class='del'>-#ifdef CONFIG_HOTPLUG_CPU</div><div class='del'>-	struct task_struct *p;</div><div class='del'>-#endif</div><div class='add'>+</div><div class='ctx'> 	/* We don't touch CPU 0 map, it's allocated at aboot and kept</div><div class='ctx'> 	 * around forever</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -358,12 +356,7 @@ static int __cpuinit mmu_context_cpu_notify(struct notifier_block *self,</div><div class='ctx'> 		stale_map[cpu] = NULL;</div><div class='ctx'> </div><div class='ctx'> 		/* We also clear the cpu_vm_mask bits of CPUs going away */</div><div class='del'>-		read_lock(&amp;tasklist_lock);</div><div class='del'>-		for_each_process(p) {</div><div class='del'>-			if (p-&gt;mm)</div><div class='del'>-				cpumask_clear_cpu(cpu, mm_cpumask(p-&gt;mm));</div><div class='del'>-		}</div><div class='del'>-		read_unlock(&amp;tasklist_lock);</div><div class='add'>+		clear_tasks_mm_cpumask(cpu);</div><div class='ctx'> 	break;</div><div class='ctx'> #endif /* CONFIG_HOTPLUG_CPU */</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h<br/>index af1ab5e9a691..5c3cf2d04e41 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/net/bpf_jit.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/net/bpf_jit.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/net/bpf_jit.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/net/bpf_jit.h</a></div><div class='hunk'>@@ -48,7 +48,13 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Assembly helpers from arch/powerpc/net/bpf_jit.S:</div><div class='ctx'>  */</div><div class='del'>-extern u8 sk_load_word[], sk_load_half[], sk_load_byte[], sk_load_byte_msh[];</div><div class='add'>+#define DECLARE_LOAD_FUNC(func)	\</div><div class='add'>+	extern u8 func[], func##_negative_offset[], func##_positive_offset[]</div><div class='add'>+</div><div class='add'>+DECLARE_LOAD_FUNC(sk_load_word);</div><div class='add'>+DECLARE_LOAD_FUNC(sk_load_half);</div><div class='add'>+DECLARE_LOAD_FUNC(sk_load_byte);</div><div class='add'>+DECLARE_LOAD_FUNC(sk_load_byte_msh);</div><div class='ctx'> </div><div class='ctx'> #define FUNCTION_DESCR_SIZE	24</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/net/bpf_jit_64.S b/arch/powerpc/net/bpf_jit_64.S<br/>index ff4506e85cce..55ba3855a97f 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/net/bpf_jit_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/net/bpf_jit_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/net/bpf_jit_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/net/bpf_jit_64.S</a></div><div class='hunk'>@@ -31,14 +31,13 @@</div><div class='ctx'>  * then branch directly to slow_path_XXX if required.  (In fact, could</div><div class='ctx'>  * load a spare GPR with the address of slow_path_generic and pass size</div><div class='ctx'>  * as an argument, making the call site a mtlr, li and bllr.)</div><div class='del'>- *</div><div class='del'>- * Technically, the "is addr &lt; 0" check is unnecessary &amp; slowing down</div><div class='del'>- * the ABS path, as it's statically checked on generation.</div><div class='ctx'>  */</div><div class='ctx'> 	.globl	sk_load_word</div><div class='ctx'> sk_load_word:</div><div class='ctx'> 	cmpdi	r_addr, 0</div><div class='del'>-	blt	bpf_error</div><div class='add'>+	blt	bpf_slow_path_word_neg</div><div class='add'>+	.globl	sk_load_word_positive_offset</div><div class='add'>+sk_load_word_positive_offset:</div><div class='ctx'> 	/* Are we accessing past headlen? */</div><div class='ctx'> 	subi	r_scratch1, r_HL, 4</div><div class='ctx'> 	cmpd	r_scratch1, r_addr</div><div class='hunk'>@@ -51,7 +50,9 @@ sk_load_word:</div><div class='ctx'> 	.globl	sk_load_half</div><div class='ctx'> sk_load_half:</div><div class='ctx'> 	cmpdi	r_addr, 0</div><div class='del'>-	blt	bpf_error</div><div class='add'>+	blt	bpf_slow_path_half_neg</div><div class='add'>+	.globl	sk_load_half_positive_offset</div><div class='add'>+sk_load_half_positive_offset:</div><div class='ctx'> 	subi	r_scratch1, r_HL, 2</div><div class='ctx'> 	cmpd	r_scratch1, r_addr</div><div class='ctx'> 	blt	bpf_slow_path_half</div><div class='hunk'>@@ -61,7 +62,9 @@ sk_load_half:</div><div class='ctx'> 	.globl	sk_load_byte</div><div class='ctx'> sk_load_byte:</div><div class='ctx'> 	cmpdi	r_addr, 0</div><div class='del'>-	blt	bpf_error</div><div class='add'>+	blt	bpf_slow_path_byte_neg</div><div class='add'>+	.globl	sk_load_byte_positive_offset</div><div class='add'>+sk_load_byte_positive_offset:</div><div class='ctx'> 	cmpd	r_HL, r_addr</div><div class='ctx'> 	ble	bpf_slow_path_byte</div><div class='ctx'> 	lbzx	r_A, r_D, r_addr</div><div class='hunk'>@@ -69,22 +72,20 @@ sk_load_byte:</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * BPF_S_LDX_B_MSH: ldxb  4*([offset]&amp;0xf)</div><div class='del'>- * r_addr is the offset value, already known positive</div><div class='add'>+ * r_addr is the offset value</div><div class='ctx'>  */</div><div class='ctx'> 	.globl sk_load_byte_msh</div><div class='ctx'> sk_load_byte_msh:</div><div class='add'>+	cmpdi	r_addr, 0</div><div class='add'>+	blt	bpf_slow_path_byte_msh_neg</div><div class='add'>+	.globl sk_load_byte_msh_positive_offset</div><div class='add'>+sk_load_byte_msh_positive_offset:</div><div class='ctx'> 	cmpd	r_HL, r_addr</div><div class='ctx'> 	ble	bpf_slow_path_byte_msh</div><div class='ctx'> 	lbzx	r_X, r_D, r_addr</div><div class='ctx'> 	rlwinm	r_X, r_X, 2, 32-4-2, 31-2</div><div class='ctx'> 	blr</div><div class='ctx'> </div><div class='del'>-bpf_error:</div><div class='del'>-	/* Entered with cr0 = lt */</div><div class='del'>-	li	r3, 0</div><div class='del'>-	/* Generated code will 'blt epilogue', returning 0. */</div><div class='del'>-	blr</div><div class='del'>-</div><div class='ctx'> /* Call out to skb_copy_bits:</div><div class='ctx'>  * We'll need to back up our volatile regs first; we have</div><div class='ctx'>  * local variable space at r1+(BPF_PPC_STACK_BASIC).</div><div class='hunk'>@@ -136,3 +137,84 @@ bpf_slow_path_byte_msh:</div><div class='ctx'> 	lbz	r_X, BPF_PPC_STACK_BASIC+(2*8)(r1)</div><div class='ctx'> 	rlwinm	r_X, r_X, 2, 32-4-2, 31-2</div><div class='ctx'> 	blr</div><div class='add'>+</div><div class='add'>+/* Call out to bpf_internal_load_pointer_neg_helper:</div><div class='add'>+ * We'll need to back up our volatile regs first; we have</div><div class='add'>+ * local variable space at r1+(BPF_PPC_STACK_BASIC).</div><div class='add'>+ * Allocate a new stack frame here to remain ABI-compliant in</div><div class='add'>+ * stashing LR.</div><div class='add'>+ */</div><div class='add'>+#define sk_negative_common(SIZE)				\</div><div class='add'>+	mflr	r0;						\</div><div class='add'>+	std	r0, 16(r1);					\</div><div class='add'>+	/* R3 goes in parameter space of caller's frame */	\</div><div class='add'>+	std	r_skb, (BPF_PPC_STACKFRAME+48)(r1);		\</div><div class='add'>+	std	r_A, (BPF_PPC_STACK_BASIC+(0*8))(r1);		\</div><div class='add'>+	std	r_X, (BPF_PPC_STACK_BASIC+(1*8))(r1);		\</div><div class='add'>+	stdu	r1, -BPF_PPC_SLOWPATH_FRAME(r1);		\</div><div class='add'>+	/* R3 = r_skb, as passed */				\</div><div class='add'>+	mr	r4, r_addr;					\</div><div class='add'>+	li	r5, SIZE;					\</div><div class='add'>+	bl	bpf_internal_load_pointer_neg_helper;		\</div><div class='add'>+	/* R3 != 0 on success */				\</div><div class='add'>+	addi	r1, r1, BPF_PPC_SLOWPATH_FRAME;			\</div><div class='add'>+	ld	r0, 16(r1);					\</div><div class='add'>+	ld	r_A, (BPF_PPC_STACK_BASIC+(0*8))(r1);		\</div><div class='add'>+	ld	r_X, (BPF_PPC_STACK_BASIC+(1*8))(r1);		\</div><div class='add'>+	mtlr	r0;						\</div><div class='add'>+	cmpldi	r3, 0;						\</div><div class='add'>+	beq	bpf_error_slow;	/* cr0 = EQ */			\</div><div class='add'>+	mr	r_addr, r3;					\</div><div class='add'>+	ld	r_skb, (BPF_PPC_STACKFRAME+48)(r1);		\</div><div class='add'>+	/* Great success! */</div><div class='add'>+</div><div class='add'>+bpf_slow_path_word_neg:</div><div class='add'>+	lis     r_scratch1,-32	/* SKF_LL_OFF */</div><div class='add'>+	cmpd	r_addr, r_scratch1	/* addr &lt; SKF_* */</div><div class='add'>+	blt	bpf_error	/* cr0 = LT */</div><div class='add'>+	.globl	sk_load_word_negative_offset</div><div class='add'>+sk_load_word_negative_offset:</div><div class='add'>+	sk_negative_common(4)</div><div class='add'>+	lwz	r_A, 0(r_addr)</div><div class='add'>+	blr</div><div class='add'>+</div><div class='add'>+bpf_slow_path_half_neg:</div><div class='add'>+	lis     r_scratch1,-32	/* SKF_LL_OFF */</div><div class='add'>+	cmpd	r_addr, r_scratch1	/* addr &lt; SKF_* */</div><div class='add'>+	blt	bpf_error	/* cr0 = LT */</div><div class='add'>+	.globl	sk_load_half_negative_offset</div><div class='add'>+sk_load_half_negative_offset:</div><div class='add'>+	sk_negative_common(2)</div><div class='add'>+	lhz	r_A, 0(r_addr)</div><div class='add'>+	blr</div><div class='add'>+</div><div class='add'>+bpf_slow_path_byte_neg:</div><div class='add'>+	lis     r_scratch1,-32	/* SKF_LL_OFF */</div><div class='add'>+	cmpd	r_addr, r_scratch1	/* addr &lt; SKF_* */</div><div class='add'>+	blt	bpf_error	/* cr0 = LT */</div><div class='add'>+	.globl	sk_load_byte_negative_offset</div><div class='add'>+sk_load_byte_negative_offset:</div><div class='add'>+	sk_negative_common(1)</div><div class='add'>+	lbz	r_A, 0(r_addr)</div><div class='add'>+	blr</div><div class='add'>+</div><div class='add'>+bpf_slow_path_byte_msh_neg:</div><div class='add'>+	lis     r_scratch1,-32	/* SKF_LL_OFF */</div><div class='add'>+	cmpd	r_addr, r_scratch1	/* addr &lt; SKF_* */</div><div class='add'>+	blt	bpf_error	/* cr0 = LT */</div><div class='add'>+	.globl	sk_load_byte_msh_negative_offset</div><div class='add'>+sk_load_byte_msh_negative_offset:</div><div class='add'>+	sk_negative_common(1)</div><div class='add'>+	lbz	r_X, 0(r_addr)</div><div class='add'>+	rlwinm	r_X, r_X, 2, 32-4-2, 31-2</div><div class='add'>+	blr</div><div class='add'>+</div><div class='add'>+bpf_error_slow:</div><div class='add'>+	/* fabricate a cr0 = lt */</div><div class='add'>+	li	r_scratch1, -1</div><div class='add'>+	cmpdi	r_scratch1, 0</div><div class='add'>+bpf_error:</div><div class='add'>+	/* Entered with cr0 = lt */</div><div class='add'>+	li	r3, 0</div><div class='add'>+	/* Generated code will 'blt epilogue', returning 0. */</div><div class='add'>+	blr</div><div class='head'>diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c<br/>index 73619d3aeb6c..2dc8b1484845 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/net/bpf_jit_comp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/net/bpf_jit_comp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -127,6 +127,9 @@ static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)</div><div class='ctx'> 	PPC_BLR();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define CHOOSE_LOAD_FUNC(K, func) \</div><div class='add'>+	((int)K &lt; 0 ? ((int)K &gt;= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)</div><div class='add'>+</div><div class='ctx'> /* Assemble the body code between the prologue &amp; epilogue. */</div><div class='ctx'> static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,</div><div class='ctx'> 			      struct codegen_context *ctx,</div><div class='hunk'>@@ -391,21 +394,16 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,</div><div class='ctx'> </div><div class='ctx'> 			/*** Absolute loads from packet header/data ***/</div><div class='ctx'> 		case BPF_S_LD_W_ABS:</div><div class='del'>-			func = sk_load_word;</div><div class='add'>+			func = CHOOSE_LOAD_FUNC(K, sk_load_word);</div><div class='ctx'> 			goto common_load;</div><div class='ctx'> 		case BPF_S_LD_H_ABS:</div><div class='del'>-			func = sk_load_half;</div><div class='add'>+			func = CHOOSE_LOAD_FUNC(K, sk_load_half);</div><div class='ctx'> 			goto common_load;</div><div class='ctx'> 		case BPF_S_LD_B_ABS:</div><div class='del'>-			func = sk_load_byte;</div><div class='add'>+			func = CHOOSE_LOAD_FUNC(K, sk_load_byte);</div><div class='ctx'> 		common_load:</div><div class='del'>-			/*</div><div class='del'>-			 * Load from [K].  Reference with the (negative)</div><div class='del'>-			 * SKF_NET_OFF/SKF_LL_OFF offsets is unsupported.</div><div class='del'>-			 */</div><div class='add'>+			/* Load from [K]. */</div><div class='ctx'> 			ctx-&gt;seen |= SEEN_DATAREF;</div><div class='del'>-			if ((int)K &lt; 0)</div><div class='del'>-				return -ENOTSUPP;</div><div class='ctx'> 			PPC_LI64(r_scratch1, func);</div><div class='ctx'> 			PPC_MTLR(r_scratch1);</div><div class='ctx'> 			PPC_LI32(r_addr, K);</div><div class='hunk'>@@ -429,7 +427,7 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,</div><div class='ctx'> 		common_load_ind:</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Load from [X + K].  Negative offsets are tested for</div><div class='del'>-			 * in the helper functions, and result in a 'ret 0'.</div><div class='add'>+			 * in the helper functions.</div><div class='ctx'> 			 */</div><div class='ctx'> 			ctx-&gt;seen |= SEEN_DATAREF | SEEN_XREG;</div><div class='ctx'> 			PPC_LI64(r_scratch1, func);</div><div class='hunk'>@@ -443,13 +441,7 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case BPF_S_LDX_B_MSH:</div><div class='del'>-			/*</div><div class='del'>-			 * x86 version drops packet (RET 0) when K&lt;0, whereas</div><div class='del'>-			 * interpreter does allow K&lt;0 (__load_pointer, special</div><div class='del'>-			 * ancillary data).  common_load returns ENOTSUPP if K&lt;0,</div><div class='del'>-			 * so we fall back to interpreter &amp; filter works.</div><div class='del'>-			 */</div><div class='del'>-			func = sk_load_byte_msh;</div><div class='add'>+			func = CHOOSE_LOAD_FUNC(K, sk_load_byte_msh);</div><div class='ctx'> 			goto common_load;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c<br/>index 02aee03e713c..8f84bcba18da 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/perf/core-book3s.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/perf/core-book3s.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/perf/core-book3s.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/perf/core-book3s.c</a></div><div class='hunk'>@@ -1299,8 +1299,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'> 	if (record) {</div><div class='ctx'> 		struct perf_sample_data data;</div><div class='ctx'> </div><div class='del'>-		perf_sample_data_init(&amp;data, ~0ULL);</div><div class='del'>-		data.period = event-&gt;hw.last_period;</div><div class='add'>+		perf_sample_data_init(&amp;data, ~0ULL, event-&gt;hw.last_period);</div><div class='ctx'> </div><div class='ctx'> 		if (event-&gt;attr.sample_type &amp; PERF_SAMPLE_ADDR)</div><div class='ctx'> 			perf_get_data_addr(regs, &amp;data.addr);</div><div class='head'>diff --git a/arch/powerpc/perf/core-fsl-emb.c b/arch/powerpc/perf/core-fsl-emb.c<br/>index 0a6d2a9d569c..106c53354675 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/perf/core-fsl-emb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/perf/core-fsl-emb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/perf/core-fsl-emb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/perf/core-fsl-emb.c</a></div><div class='hunk'>@@ -613,8 +613,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'> 	if (record) {</div><div class='ctx'> 		struct perf_sample_data data;</div><div class='ctx'> </div><div class='del'>-		perf_sample_data_init(&amp;data, 0);</div><div class='del'>-		data.period = event-&gt;hw.last_period;</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, event-&gt;hw.last_period);</div><div class='ctx'> </div><div class='ctx'> 		if (perf_event_overflow(event, &amp;data, regs))</div><div class='ctx'> 			fsl_emb_pmu_stop(event, 0);</div><div class='head'>diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig<br/>index 2e4e64abfab4..8abf6fb8f410 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/44x/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/44x/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/44x/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/44x/Kconfig</a></div><div class='hunk'>@@ -23,6 +23,8 @@ config BLUESTONE</div><div class='ctx'> 	default n</div><div class='ctx'> 	select PPC44x_SIMPLE</div><div class='ctx'> 	select APM821xx</div><div class='add'>+	select PCI_MSI</div><div class='add'>+	select PPC4xx_MSI</div><div class='ctx'> 	select PPC4xx_PCI_EXPRESS</div><div class='ctx'> 	select IBM_EMAC_RGMII</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype<br/>index 425db18580a2..61c9550819a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/Kconfig.cputype?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/Kconfig.cputype</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/Kconfig.cputype?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/Kconfig.cputype</a></div><div class='hunk'>@@ -78,6 +78,36 @@ config PPC_BOOK3E_64</div><div class='ctx'> </div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='add'>+choice</div><div class='add'>+	prompt "CPU selection"</div><div class='add'>+	depends on PPC64</div><div class='add'>+	default GENERIC_CPU</div><div class='add'>+	help</div><div class='add'>+	  This will create a kernel which is optimised for a particular CPU.</div><div class='add'>+	  The resulting kernel may not run on other CPUs, so use this with care.</div><div class='add'>+</div><div class='add'>+	  If unsure, select Generic.</div><div class='add'>+</div><div class='add'>+config GENERIC_CPU</div><div class='add'>+	bool "Generic"</div><div class='add'>+</div><div class='add'>+config CELL_CPU</div><div class='add'>+	bool "Cell Broadband Engine"</div><div class='add'>+</div><div class='add'>+config POWER4_CPU</div><div class='add'>+	bool "POWER4"</div><div class='add'>+</div><div class='add'>+config POWER5_CPU</div><div class='add'>+	bool "POWER5"</div><div class='add'>+</div><div class='add'>+config POWER6_CPU</div><div class='add'>+	bool "POWER6"</div><div class='add'>+</div><div class='add'>+config POWER7_CPU</div><div class='add'>+	bool "POWER7"</div><div class='add'>+</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='ctx'> config PPC_BOOK3S</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on PPC_BOOK3S_32 || PPC_BOOK3S_64</div><div class='hunk'>@@ -86,15 +116,6 @@ config PPC_BOOK3E</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on PPC_BOOK3E_64</div><div class='ctx'> </div><div class='del'>-config POWER4_ONLY</div><div class='del'>-	bool "Optimize for POWER4"</div><div class='del'>-	depends on PPC64 &amp;&amp; PPC_BOOK3S</div><div class='del'>-	default n</div><div class='del'>-	---help---</div><div class='del'>-	  Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.</div><div class='del'>-	  The resulting binary will not work on POWER3 or RS64 processors</div><div class='del'>-	  when compiled with binutils 2.15 or later.</div><div class='del'>-</div><div class='ctx'> config 6xx</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on PPC32 &amp;&amp; PPC_BOOK3S</div><div class='hunk'>@@ -258,7 +279,7 @@ config PPC_ICSWX_PID</div><div class='ctx'> 	default y</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  The PID register in server is used explicitly for ICSWX.  In</div><div class='del'>-	  embedded systems PID managment is done by the system.</div><div class='add'>+	  embedded systems PID management is done by the system.</div><div class='ctx'> </div><div class='ctx'> config PPC_ICSWX_USE_SIGILL</div><div class='ctx'> 	bool "Should a bad CT cause a SIGILL?"</div><div class='hunk'>@@ -266,7 +287,7 @@ config PPC_ICSWX_USE_SIGILL</div><div class='ctx'> 	default n</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Should a bad CT used for "non-record form ICSWX" cause an</div><div class='del'>-	  illegal intruction signal or should it be silent as</div><div class='add'>+	  illegal instruction signal or should it be silent as</div><div class='ctx'> 	  architected.</div><div class='ctx'> </div><div class='ctx'> 	  If in doubt, say N here.</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c<br/>index d09f3e8e6867..85825b5401e5 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/cell/axon_msi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/cell/axon_msi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/cell/axon_msi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/cell/axon_msi.c</a></div><div class='hunk'>@@ -114,7 +114,7 @@ static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 		pr_devel("axon_msi: woff %x roff %x msi %x\n",</div><div class='ctx'> 			  write_offset, msic-&gt;read_offset, msi);</div><div class='ctx'> </div><div class='del'>-		if (msi &lt; NR_IRQS &amp;&amp; irq_get_chip_data(msi) == msic) {</div><div class='add'>+		if (msi &lt; nr_irqs &amp;&amp; irq_get_chip_data(msi) == msic) {</div><div class='ctx'> 			generic_handle_irq(msi);</div><div class='ctx'> 			msic-&gt;fifo_virt[idx] = cpu_to_le32(0xffffffff);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -276,9 +276,6 @@ static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-	/* We rely on being able to stash a virq in a u16 */</div><div class='del'>-	BUILD_BUG_ON(NR_IRQS &gt; 65536);</div><div class='del'>-</div><div class='ctx'> 	list_for_each_entry(entry, &amp;dev-&gt;msi_list, list) {</div><div class='ctx'> 		virq = irq_create_direct_mapping(msic-&gt;irq_domain);</div><div class='ctx'> 		if (virq == NO_IRQ) {</div><div class='hunk'>@@ -392,7 +389,8 @@ static int axon_msi_probe(struct platform_device *device)</div><div class='ctx'> 	}</div><div class='ctx'> 	memset(msic-&gt;fifo_virt, 0xff, MSIC_FIFO_SIZE_BYTES);</div><div class='ctx'> </div><div class='del'>-	msic-&gt;irq_domain = irq_domain_add_nomap(dn, 0, &amp;msic_host_ops, msic);</div><div class='add'>+	/* We rely on being able to stash a virq in a u16, so limit irqs to &lt; 65536 */</div><div class='add'>+	msic-&gt;irq_domain = irq_domain_add_nomap(dn, 65536, &amp;msic_host_ops, msic);</div><div class='ctx'> 	if (!msic-&gt;irq_domain) {</div><div class='ctx'> 		printk(KERN_ERR "axon_msi: couldn't allocate irq_domain for %s\n",</div><div class='ctx'> 		       dn-&gt;full_name);</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c<br/>index f9a48af335cb..8c6dc42ecf65 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/cell/beat_interrupt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/cell/beat_interrupt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/cell/beat_interrupt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/cell/beat_interrupt.c</a></div><div class='hunk'>@@ -248,6 +248,6 @@ void beatic_deinit_IRQ(void)</div><div class='ctx'> {</div><div class='ctx'> 	int	i;</div><div class='ctx'> </div><div class='del'>-	for (i = 1; i &lt; NR_IRQS; i++)</div><div class='add'>+	for (i = 1; i &lt; nr_irqs; i++)</div><div class='ctx'> 		beat_destruct_irq_plug(i);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c<br/>index 1d75c92ea8fb..66519d263da7 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/cell/spufs/inode.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/cell/spufs/inode.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/cell/spufs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/cell/spufs/inode.c</a></div><div class='hunk'>@@ -151,7 +151,7 @@ static void</div><div class='ctx'> spufs_evict_inode(struct inode *inode)</div><div class='ctx'> {</div><div class='ctx'> 	struct spufs_inode_info *ei = SPUFS_I(inode);</div><div class='del'>-	end_writeback(inode);</div><div class='add'>+	clear_inode(inode);</div><div class='ctx'> 	if (ei-&gt;i_ctx)</div><div class='ctx'> 		put_spu_context(ei-&gt;i_ctx);</div><div class='ctx'> 	if (ei-&gt;i_gang)</div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c<br/>index 03685a329d7d..fc536f2971c0 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powermac/low_i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/powermac/low_i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powermac/low_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/powermac/low_i2c.c</a></div><div class='hunk'>@@ -1503,6 +1503,7 @@ static int __init pmac_i2c_create_platform_devices(void)</div><div class='ctx'> 		if (bus-&gt;platform_dev == NULL)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		bus-&gt;platform_dev-&gt;dev.platform_data = bus;</div><div class='add'>+		bus-&gt;platform_dev-&gt;dev.of_node = bus-&gt;busnode;</div><div class='ctx'> 		platform_device_add(bus-&gt;platform_dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c<br/>index 66ad93de1d55..c4e630576ff2 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/powermac/pic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/powermac/pic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/powermac/pic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/powermac/pic.c</a></div><div class='hunk'>@@ -57,9 +57,9 @@ static int max_real_irqs;</div><div class='ctx'> </div><div class='ctx'> static DEFINE_RAW_SPINLOCK(pmac_pic_lock);</div><div class='ctx'> </div><div class='del'>-#define NR_MASK_WORDS	((NR_IRQS + 31) / 32)</div><div class='del'>-static unsigned long ppc_lost_interrupts[NR_MASK_WORDS];</div><div class='del'>-static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];</div><div class='add'>+/* The max irq number this driver deals with is 128; see max_irqs */</div><div class='add'>+static DECLARE_BITMAP(ppc_lost_interrupts, 128);</div><div class='add'>+static DECLARE_BITMAP(ppc_cached_irq_mask, 128);</div><div class='ctx'> static int pmac_irq_cascade = -1;</div><div class='ctx'> static struct irq_domain *pmac_pic_host;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/Kconfig b/arch/powerpc/platforms/ps3/Kconfig<br/>index 476d9d9b2405..46b7f0232523 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/ps3/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/ps3/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/ps3/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/ps3/Kconfig</a></div><div class='hunk'>@@ -7,7 +7,6 @@ config PPC_PS3</div><div class='ctx'> 	select USB_OHCI_BIG_ENDIAN_MMIO</div><div class='ctx'> 	select USB_ARCH_HAS_EHCI</div><div class='ctx'> 	select USB_EHCI_BIG_ENDIAN_MMIO</div><div class='del'>-	select MEMORY_HOTPLUG</div><div class='ctx'> 	select PPC_PCI_CHOICE</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for the Sony PS3 game console</div><div class='hunk'>@@ -74,7 +73,7 @@ config PS3_PS3AV</div><div class='ctx'> 	help</div><div class='ctx'> 	  Include support for the PS3 AV Settings driver.</div><div class='ctx'> </div><div class='del'>-	  This support is required for graphics and sound. In</div><div class='add'>+	  This support is required for PS3 graphics and sound. In</div><div class='ctx'> 	  general, all users will say Y or M.</div><div class='ctx'> </div><div class='ctx'> config PS3_SYS_MANAGER</div><div class='hunk'>@@ -85,9 +84,22 @@ config PS3_SYS_MANAGER</div><div class='ctx'> 	help</div><div class='ctx'> 	  Include support for the PS3 System Manager.</div><div class='ctx'> </div><div class='del'>-	  This support is required for system control.  In</div><div class='add'>+	  This support is required for PS3 system control.  In</div><div class='ctx'> 	  general, all users will say Y or M.</div><div class='ctx'> </div><div class='add'>+config PS3_REPOSITORY_WRITE</div><div class='add'>+	bool "PS3 Repository write support" if PS3_ADVANCED</div><div class='add'>+	depends on PPC_PS3</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Enables support for writing to the PS3 System Repository.</div><div class='add'>+</div><div class='add'>+	  This support is intended for bootloaders that need to store data</div><div class='add'>+	  in the repository for later boot stages.</div><div class='add'>+</div><div class='add'>+	  If in doubt, say N here and reduce the size of the kernel by a</div><div class='add'>+	  small amount.</div><div class='add'>+</div><div class='ctx'> config PS3_STORAGE</div><div class='ctx'> 	depends on PPC_PS3</div><div class='ctx'> 	tristate</div><div class='hunk'>@@ -122,7 +134,7 @@ config PS3_FLASH</div><div class='ctx'> </div><div class='ctx'> 	  This support is required to access the PS3 FLASH ROM, which</div><div class='ctx'> 	  contains the boot loader and some boot options.</div><div class='del'>-	  In general, all users will say Y or M.</div><div class='add'>+	  In general, PS3 OtherOS users will say Y or M.</div><div class='ctx'> </div><div class='ctx'> 	  As this driver needs a fixed buffer of 256 KiB of memory, it can</div><div class='ctx'> 	  be disabled on the kernel command line using "ps3flash=off", to</div><div class='hunk'>@@ -156,7 +168,7 @@ config PS3GELIC_UDBG</div><div class='ctx'> 	  via the Ethernet port (UDP port number 18194).</div><div class='ctx'> </div><div class='ctx'> 	  This driver uses a trivial implementation and is independent</div><div class='del'>-	  from the main network driver.</div><div class='add'>+	  from the main PS3 gelic network driver.</div><div class='ctx'> </div><div class='ctx'> 	  If in doubt, say N here.</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c<br/>index de2aea421707..0c9f643d9e2a 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/ps3/mm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/ps3/mm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/ps3/mm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/ps3/mm.c</a></div><div class='hunk'>@@ -20,7 +20,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/memory_hotplug.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -79,12 +78,14 @@ enum {</div><div class='ctx'>  * @base: base address</div><div class='ctx'>  * @size: size in bytes</div><div class='ctx'>  * @offset: difference between base and rm.size</div><div class='add'>+ * @destroy: flag if region should be destroyed upon shutdown</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> struct mem_region {</div><div class='ctx'> 	u64 base;</div><div class='ctx'> 	u64 size;</div><div class='ctx'> 	unsigned long offset;</div><div class='add'>+	int destroy;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -96,7 +97,7 @@ struct mem_region {</div><div class='ctx'>  * The HV virtual address space (vas) allows for hotplug memory regions.</div><div class='ctx'>  * Memory regions can be created and destroyed in the vas at runtime.</div><div class='ctx'>  * @rm: real mode (bootmem) region</div><div class='del'>- * @r1: hotplug memory region(s)</div><div class='add'>+ * @r1: highmem region(s)</div><div class='ctx'>  *</div><div class='ctx'>  * ps3 addresses</div><div class='ctx'>  * virt_addr: a cpu 'translated' effective address</div><div class='hunk'>@@ -222,10 +223,6 @@ void ps3_mm_vas_destroy(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*============================================================================*/</div><div class='del'>-/* memory hotplug routines                                                    */</div><div class='del'>-/*============================================================================*/</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * ps3_mm_region_create - create a memory region in the vas</div><div class='ctx'>  * @r: pointer to a struct mem_region to accept initialized values</div><div class='hunk'>@@ -262,6 +259,7 @@ static int ps3_mm_region_create(struct mem_region *r, unsigned long size)</div><div class='ctx'> 		goto zero_region;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	r-&gt;destroy = 1;</div><div class='ctx'> 	r-&gt;offset = r-&gt;base - map.rm.size;</div><div class='ctx'> 	return result;</div><div class='ctx'> </div><div class='hunk'>@@ -279,7 +277,14 @@ static void ps3_mm_region_destroy(struct mem_region *r)</div><div class='ctx'> {</div><div class='ctx'> 	int result;</div><div class='ctx'> </div><div class='add'>+	if (!r-&gt;destroy) {</div><div class='add'>+		pr_info("%s:%d: Not destroying high region: %llxh %llxh\n",</div><div class='add'>+			__func__, __LINE__, r-&gt;base, r-&gt;size);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	DBG("%s:%d: r-&gt;base = %llxh\n", __func__, __LINE__, r-&gt;base);</div><div class='add'>+</div><div class='ctx'> 	if (r-&gt;base) {</div><div class='ctx'> 		result = lv1_release_memory(r-&gt;base);</div><div class='ctx'> 		BUG_ON(result);</div><div class='hunk'>@@ -288,50 +293,36 @@ static void ps3_mm_region_destroy(struct mem_region *r)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ps3_mm_add_memory - hot add memory</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init ps3_mm_add_memory(void)</div><div class='add'>+static int ps3_mm_get_repository_highmem(struct mem_region *r)</div><div class='ctx'> {</div><div class='ctx'> 	int result;</div><div class='del'>-	unsigned long start_addr;</div><div class='del'>-	unsigned long start_pfn;</div><div class='del'>-	unsigned long nr_pages;</div><div class='del'>-</div><div class='del'>-	if (!firmware_has_feature(FW_FEATURE_PS3_LV1))</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!mem_init_done);</div><div class='add'>+	/* Assume a single highmem region. */</div><div class='ctx'> </div><div class='del'>-	start_addr = map.rm.size;</div><div class='del'>-	start_pfn = start_addr &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	nr_pages = (map.r1.size + PAGE_SIZE - 1) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	result = ps3_repository_read_highmem_info(0, &amp;r-&gt;base, &amp;r-&gt;size);</div><div class='ctx'> </div><div class='del'>-	DBG("%s:%d: start_addr %lxh, start_pfn %lxh, nr_pages %lxh\n",</div><div class='del'>-		__func__, __LINE__, start_addr, start_pfn, nr_pages);</div><div class='del'>-</div><div class='del'>-	result = add_memory(0, start_addr, map.r1.size);</div><div class='add'>+	if (result)</div><div class='add'>+		goto zero_region;</div><div class='ctx'> </div><div class='del'>-	if (result) {</div><div class='del'>-		pr_err("%s:%d: add_memory failed: (%d)\n",</div><div class='del'>-			__func__, __LINE__, result);</div><div class='del'>-		return result;</div><div class='add'>+	if (!r-&gt;base || !r-&gt;size) {</div><div class='add'>+		result = -1;</div><div class='add'>+		goto zero_region;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memblock_add(start_addr, map.r1.size);</div><div class='add'>+	r-&gt;offset = r-&gt;base - map.rm.size;</div><div class='ctx'> </div><div class='del'>-	result = online_pages(start_pfn, nr_pages);</div><div class='add'>+	DBG("%s:%d: Found high region in repository: %llxh %llxh\n",</div><div class='add'>+	    __func__, __LINE__, r-&gt;base, r-&gt;size);</div><div class='ctx'> </div><div class='del'>-	if (result)</div><div class='del'>-		pr_err("%s:%d: online_pages failed: (%d)\n",</div><div class='del'>-			__func__, __LINE__, result);</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='add'>+zero_region:</div><div class='add'>+	DBG("%s:%d: No high region in repository.\n", __func__, __LINE__);</div><div class='add'>+</div><div class='add'>+	r-&gt;size = r-&gt;base = r-&gt;offset = 0;</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-device_initcall(ps3_mm_add_memory);</div><div class='del'>-</div><div class='ctx'> /*============================================================================*/</div><div class='ctx'> /* dma routines                                                               */</div><div class='ctx'> /*============================================================================*/</div><div class='hunk'>@@ -1217,13 +1208,23 @@ void __init ps3_mm_init(void)</div><div class='ctx'> 	BUG_ON(map.rm.base);</div><div class='ctx'> 	BUG_ON(!map.rm.size);</div><div class='ctx'> </div><div class='add'>+	/* Check if we got the highmem region from an earlier boot step */</div><div class='ctx'> </div><div class='del'>-	/* arrange to do this in ps3_mm_add_memory */</div><div class='del'>-	ps3_mm_region_create(&amp;map.r1, map.total - map.rm.size);</div><div class='add'>+	if (ps3_mm_get_repository_highmem(&amp;map.r1))</div><div class='add'>+		ps3_mm_region_create(&amp;map.r1, map.total - map.rm.size);</div><div class='ctx'> </div><div class='ctx'> 	/* correct map.total for the real total amount of memory we use */</div><div class='ctx'> 	map.total = map.rm.size + map.r1.size;</div><div class='ctx'> </div><div class='add'>+	if (!map.r1.size) {</div><div class='add'>+		DBG("%s:%d: No highmem region found\n", __func__, __LINE__);</div><div class='add'>+	} else {</div><div class='add'>+		DBG("%s:%d: Adding highmem region: %llxh %llxh\n",</div><div class='add'>+			__func__, __LINE__, map.rm.size,</div><div class='add'>+			map.total - map.rm.size);</div><div class='add'>+		memblock_add(map.rm.size, map.total - map.rm.size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	DBG(" &lt;- %s:%d\n", __func__, __LINE__);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/platform.h b/arch/powerpc/platforms/ps3/platform.h<br/>index 1a633ed0fe98..d71329a8e325 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/ps3/platform.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/ps3/platform.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/ps3/platform.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/ps3/platform.h</a></div><div class='hunk'>@@ -188,6 +188,22 @@ int ps3_repository_read_rm_size(unsigned int ppe_id, u64 *rm_size);</div><div class='ctx'> int ps3_repository_read_region_total(u64 *region_total);</div><div class='ctx'> int ps3_repository_read_mm_info(u64 *rm_base, u64 *rm_size,</div><div class='ctx'> 	u64 *region_total);</div><div class='add'>+int ps3_repository_read_highmem_region_count(unsigned int *region_count);</div><div class='add'>+int ps3_repository_read_highmem_base(unsigned int region_index,</div><div class='add'>+	u64 *highmem_base);</div><div class='add'>+int ps3_repository_read_highmem_size(unsigned int region_index,</div><div class='add'>+	u64 *highmem_size);</div><div class='add'>+int ps3_repository_read_highmem_info(unsigned int region_index,</div><div class='add'>+	u64 *highmem_base, u64 *highmem_size);</div><div class='add'>+</div><div class='add'>+int ps3_repository_write_highmem_region_count(unsigned int region_count);</div><div class='add'>+int ps3_repository_write_highmem_base(unsigned int region_index,</div><div class='add'>+	u64 highmem_base);</div><div class='add'>+int ps3_repository_write_highmem_size(unsigned int region_index,</div><div class='add'>+	u64 highmem_size);</div><div class='add'>+int ps3_repository_write_highmem_info(unsigned int region_index,</div><div class='add'>+	u64 highmem_base, u64 highmem_size);</div><div class='add'>+int ps3_repository_delete_highmem_info(unsigned int region_index);</div><div class='ctx'> </div><div class='ctx'> /* repository pme info */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/repository.c b/arch/powerpc/platforms/ps3/repository.c<br/>index 7bdfea336f5e..9b47ba7a5de7 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/ps3/repository.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/ps3/repository.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/ps3/repository.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/ps3/repository.c</a></div><div class='hunk'>@@ -779,6 +779,72 @@ int ps3_repository_read_mm_info(u64 *rm_base, u64 *rm_size, u64 *region_total)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ps3_repository_read_highmem_region_count - Read the number of highmem regions</div><div class='add'>+ *</div><div class='add'>+ * Bootloaders must arrange the repository nodes such that regions are indexed</div><div class='add'>+ * with a region_index from 0 to region_count-1.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int ps3_repository_read_highmem_region_count(unsigned int *region_count)</div><div class='add'>+{</div><div class='add'>+	int result;</div><div class='add'>+	u64 v1 = 0;</div><div class='add'>+</div><div class='add'>+	result = read_node(PS3_LPAR_ID_CURRENT,</div><div class='add'>+		make_first_field("highmem", 0),</div><div class='add'>+		make_field("region", 0),</div><div class='add'>+		make_field("count", 0),</div><div class='add'>+		0,</div><div class='add'>+		&amp;v1, NULL);</div><div class='add'>+	*region_count = v1;</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+int ps3_repository_read_highmem_base(unsigned int region_index,</div><div class='add'>+	u64 *highmem_base)</div><div class='add'>+{</div><div class='add'>+	return read_node(PS3_LPAR_ID_CURRENT,</div><div class='add'>+		make_first_field("highmem", 0),</div><div class='add'>+		make_field("region", region_index),</div><div class='add'>+		make_field("base", 0),</div><div class='add'>+		0,</div><div class='add'>+		highmem_base, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ps3_repository_read_highmem_size(unsigned int region_index,</div><div class='add'>+	u64 *highmem_size)</div><div class='add'>+{</div><div class='add'>+	return read_node(PS3_LPAR_ID_CURRENT,</div><div class='add'>+		make_first_field("highmem", 0),</div><div class='add'>+		make_field("region", region_index),</div><div class='add'>+		make_field("size", 0),</div><div class='add'>+		0,</div><div class='add'>+		highmem_size, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ps3_repository_read_highmem_info - Read high memory region info</div><div class='add'>+ * @region_index: Region index, {0,..,region_count-1}.</div><div class='add'>+ * @highmem_base: High memory base address.</div><div class='add'>+ * @highmem_size: High memory size.</div><div class='add'>+ *</div><div class='add'>+ * Bootloaders that preallocate highmem regions must place the</div><div class='add'>+ * region info into the repository at these well known nodes.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int ps3_repository_read_highmem_info(unsigned int region_index,</div><div class='add'>+	u64 *highmem_base, u64 *highmem_size)</div><div class='add'>+{</div><div class='add'>+	int result;</div><div class='add'>+</div><div class='add'>+	*highmem_base = 0;</div><div class='add'>+	result = ps3_repository_read_highmem_base(region_index, highmem_base);</div><div class='add'>+	return result ? result</div><div class='add'>+		: ps3_repository_read_highmem_size(region_index, highmem_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ps3_repository_read_num_spu_reserved - Number of physical spus reserved.</div><div class='ctx'>  * @num_spu: Number of physical spus.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1002,6 +1068,138 @@ int ps3_repository_read_lpm_privileges(unsigned int be_index, u64 *lpar,</div><div class='ctx'> 			    lpar, rights);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_PS3_REPOSITORY_WRITE)</div><div class='add'>+</div><div class='add'>+static int create_node(u64 n1, u64 n2, u64 n3, u64 n4, u64 v1, u64 v2)</div><div class='add'>+{</div><div class='add'>+	int result;</div><div class='add'>+</div><div class='add'>+	dump_node(0, n1, n2, n3, n4, v1, v2);</div><div class='add'>+</div><div class='add'>+	result = lv1_create_repository_node(n1, n2, n3, n4, v1, v2);</div><div class='add'>+</div><div class='add'>+	if (result) {</div><div class='add'>+		pr_devel("%s:%d: lv1_create_repository_node failed: %s\n",</div><div class='add'>+			__func__, __LINE__, ps3_result(result));</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int delete_node(u64 n1, u64 n2, u64 n3, u64 n4)</div><div class='add'>+{</div><div class='add'>+	int result;</div><div class='add'>+</div><div class='add'>+	dump_node(0, n1, n2, n3, n4, 0, 0);</div><div class='add'>+</div><div class='add'>+	result = lv1_delete_repository_node(n1, n2, n3, n4);</div><div class='add'>+</div><div class='add'>+	if (result) {</div><div class='add'>+		pr_devel("%s:%d: lv1_delete_repository_node failed: %s\n",</div><div class='add'>+			__func__, __LINE__, ps3_result(result));</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int write_node(u64 n1, u64 n2, u64 n3, u64 n4, u64 v1, u64 v2)</div><div class='add'>+{</div><div class='add'>+	int result;</div><div class='add'>+</div><div class='add'>+	result = create_node(n1, n2, n3, n4, v1, v2);</div><div class='add'>+</div><div class='add'>+	if (!result)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	result = lv1_write_repository_node(n1, n2, n3, n4, v1, v2);</div><div class='add'>+</div><div class='add'>+	if (result) {</div><div class='add'>+		pr_devel("%s:%d: lv1_write_repository_node failed: %s\n",</div><div class='add'>+			__func__, __LINE__, ps3_result(result));</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ps3_repository_write_highmem_region_count(unsigned int region_count)</div><div class='add'>+{</div><div class='add'>+	int result;</div><div class='add'>+	u64 v1 = (u64)region_count;</div><div class='add'>+</div><div class='add'>+	result = write_node(</div><div class='add'>+		make_first_field("highmem", 0),</div><div class='add'>+		make_field("region", 0),</div><div class='add'>+		make_field("count", 0),</div><div class='add'>+		0,</div><div class='add'>+		v1, 0);</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ps3_repository_write_highmem_base(unsigned int region_index,</div><div class='add'>+	u64 highmem_base)</div><div class='add'>+{</div><div class='add'>+	return write_node(</div><div class='add'>+		make_first_field("highmem", 0),</div><div class='add'>+		make_field("region", region_index),</div><div class='add'>+		make_field("base", 0),</div><div class='add'>+		0,</div><div class='add'>+		highmem_base, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ps3_repository_write_highmem_size(unsigned int region_index,</div><div class='add'>+	u64 highmem_size)</div><div class='add'>+{</div><div class='add'>+	return write_node(</div><div class='add'>+		make_first_field("highmem", 0),</div><div class='add'>+		make_field("region", region_index),</div><div class='add'>+		make_field("size", 0),</div><div class='add'>+		0,</div><div class='add'>+		highmem_size, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ps3_repository_write_highmem_info(unsigned int region_index,</div><div class='add'>+	u64 highmem_base, u64 highmem_size)</div><div class='add'>+{</div><div class='add'>+	int result;</div><div class='add'>+</div><div class='add'>+	result = ps3_repository_write_highmem_base(region_index, highmem_base);</div><div class='add'>+	return result ? result</div><div class='add'>+		: ps3_repository_write_highmem_size(region_index, highmem_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ps3_repository_delete_highmem_base(unsigned int region_index)</div><div class='add'>+{</div><div class='add'>+	return delete_node(</div><div class='add'>+		make_first_field("highmem", 0),</div><div class='add'>+		make_field("region", region_index),</div><div class='add'>+		make_field("base", 0),</div><div class='add'>+		0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ps3_repository_delete_highmem_size(unsigned int region_index)</div><div class='add'>+{</div><div class='add'>+	return delete_node(</div><div class='add'>+		make_first_field("highmem", 0),</div><div class='add'>+		make_field("region", region_index),</div><div class='add'>+		make_field("size", 0),</div><div class='add'>+		0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ps3_repository_delete_highmem_info(unsigned int region_index)</div><div class='add'>+{</div><div class='add'>+	int result;</div><div class='add'>+</div><div class='add'>+	result = ps3_repository_delete_highmem_base(region_index);</div><div class='add'>+	result += ps3_repository_delete_highmem_size(region_index);</div><div class='add'>+</div><div class='add'>+	return result ? -1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* defined(CONFIG_PS3_WRITE_REPOSITORY) */</div><div class='add'>+</div><div class='ctx'> #if defined(DEBUG)</div><div class='ctx'> </div><div class='ctx'> int ps3_repository_dump_resource_info(const struct ps3_repository_device *repo)</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig<br/>index aadbe4f6d537..837cf49357ed 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/pseries/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/pseries/Kconfig</a></div><div class='hunk'>@@ -30,9 +30,9 @@ config PPC_SPLPAR</div><div class='ctx'> 	  two or more partitions.</div><div class='ctx'> </div><div class='ctx'> config EEH</div><div class='del'>-	bool "PCI Extended Error Handling (EEH)" if EXPERT</div><div class='add'>+	bool</div><div class='ctx'> 	depends on PPC_PSERIES &amp;&amp; PCI</div><div class='del'>-	default y if !EXPERT</div><div class='add'>+	default y</div><div class='ctx'> </div><div class='ctx'> config PSERIES_MSI</div><div class='ctx'>        bool</div><div class='hunk'>@@ -67,7 +67,7 @@ config IO_EVENT_IRQ</div><div class='ctx'> </div><div class='ctx'> 	  This option will only enable the IO event platform code. You</div><div class='ctx'> 	  will still need to enable or compile the actual drivers</div><div class='del'>-	  that use this infrastruture to handle IO event interrupts.</div><div class='add'>+	  that use this infrastructure to handle IO event interrupts.</div><div class='ctx'> </div><div class='ctx'> 	  Say Y if you are unsure.</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c<br/>index a75e37dc41aa..ecd394cf34e6 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/eeh.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/pseries/eeh.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/eeh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/pseries/eeh.c</a></div><div class='hunk'>@@ -489,7 +489,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)</div><div class='ctx'> 	 * a stack trace will help the device-driver authors figure</div><div class='ctx'> 	 * out what happened.  So print that out.</div><div class='ctx'> 	 */</div><div class='del'>-	dump_stack();</div><div class='add'>+	WARN(1, "EEH: failure detected\n");</div><div class='ctx'> 	return 1;</div><div class='ctx'> </div><div class='ctx'> dn_unlock:</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/platforms/pseries/plpar_wrappers.h<br/>index 342797fc0f9c..13e8cc43adf7 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/plpar_wrappers.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/pseries/plpar_wrappers.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/plpar_wrappers.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/pseries/plpar_wrappers.h</a></div><div class='hunk'>@@ -22,12 +22,12 @@ static inline long poll_pending(void)</div><div class='ctx'> </div><div class='ctx'> static inline u8 get_cede_latency_hint(void)</div><div class='ctx'> {</div><div class='del'>-	return get_lppaca()-&gt;gpr5_dword.fields.cede_latency_hint;</div><div class='add'>+	return get_lppaca()-&gt;cede_latency_hint;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void set_cede_latency_hint(u8 latency_hint)</div><div class='ctx'> {</div><div class='del'>-	get_lppaca()-&gt;gpr5_dword.fields.cede_latency_hint = latency_hint;</div><div class='add'>+	get_lppaca()-&gt;cede_latency_hint = latency_hint;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline long cede_processor(void)</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c<br/>index 168651acdd83..7b3bf76ef834 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/reconfig.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/platforms/pseries/reconfig.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/platforms/pseries/reconfig.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/platforms/pseries/reconfig.c</a></div><div class='hunk'>@@ -103,11 +103,13 @@ int pSeries_reconfig_notifier_register(struct notifier_block *nb)</div><div class='ctx'> {</div><div class='ctx'> 	return blocking_notifier_chain_register(&amp;pSeries_reconfig_chain, nb);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(pSeries_reconfig_notifier_register);</div><div class='ctx'> </div><div class='ctx'> void pSeries_reconfig_notifier_unregister(struct notifier_block *nb)</div><div class='ctx'> {</div><div class='ctx'> 	blocking_notifier_chain_unregister(&amp;pSeries_reconfig_chain, nb);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(pSeries_reconfig_notifier_unregister);</div><div class='ctx'> </div><div class='ctx'> int pSeries_reconfig_notify(unsigned long action, void *p)</div><div class='ctx'> {</div><div class='hunk'>@@ -426,6 +428,7 @@ static int do_remove_property(char *buf, size_t bufsize)</div><div class='ctx'> static int do_update_property(char *buf, size_t bufsize)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np;</div><div class='add'>+	struct pSeries_reconfig_prop_update upd_value;</div><div class='ctx'> 	unsigned char *value;</div><div class='ctx'> 	char *name, *end, *next_prop;</div><div class='ctx'> 	int rc, length;</div><div class='hunk'>@@ -454,6 +457,10 @@ static int do_update_property(char *buf, size_t bufsize)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	upd_value.node = np;</div><div class='add'>+	upd_value.property = newprop;</div><div class='add'>+	pSeries_reconfig_notify(PSERIES_UPDATE_PROPERTY, &amp;upd_value);</div><div class='add'>+</div><div class='ctx'> 	rc = prom_update_property(np, newprop, oldprop);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='head'>diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c<br/>index d3be961e2ae7..10386b676d87 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/cpm2_pic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/sysdev/cpm2_pic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/cpm2_pic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/sysdev/cpm2_pic.c</a></div><div class='hunk'>@@ -51,8 +51,7 @@</div><div class='ctx'> static intctl_cpm2_t __iomem *cpm2_intctl;</div><div class='ctx'> </div><div class='ctx'> static struct irq_domain *cpm2_pic_host;</div><div class='del'>-#define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)</div><div class='del'>-static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];</div><div class='add'>+static unsigned long ppc_cached_irq_mask[2]; /* 2 32-bit registers */</div><div class='ctx'> </div><div class='ctx'> static const u_char irq_to_siureg[] = {</div><div class='ctx'> 	1, 1, 1, 1, 1, 1, 1, 1,</div><div class='head'>diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c<br/>index d5f5416be310..b724622c3a0b 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/mpc8xx_pic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/sysdev/mpc8xx_pic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/mpc8xx_pic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/sysdev/mpc8xx_pic.c</a></div><div class='hunk'>@@ -18,69 +18,45 @@</div><div class='ctx'> extern int cpm_get_irq(struct pt_regs *regs);</div><div class='ctx'> </div><div class='ctx'> static struct irq_domain *mpc8xx_pic_host;</div><div class='del'>-#define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)</div><div class='del'>-static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];</div><div class='add'>+static unsigned long mpc8xx_cached_irq_mask;</div><div class='ctx'> static sysconf8xx_t __iomem *siu_reg;</div><div class='ctx'> </div><div class='del'>-int cpm_get_irq(struct pt_regs *regs);</div><div class='add'>+static inline unsigned long mpc8xx_irqd_to_bit(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	return 0x80000000 &gt;&gt; irqd_to_hwirq(d);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static void mpc8xx_unmask_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	int	bit, word;</div><div class='del'>-	unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);</div><div class='del'>-</div><div class='del'>-	bit = irq_nr &amp; 0x1f;</div><div class='del'>-	word = irq_nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	ppc_cached_irq_mask[word] |= (1 &lt;&lt; (31-bit));</div><div class='del'>-	out_be32(&amp;siu_reg-&gt;sc_simask, ppc_cached_irq_mask[word]);</div><div class='add'>+	mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);</div><div class='add'>+	out_be32(&amp;siu_reg-&gt;sc_simask, mpc8xx_cached_irq_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mpc8xx_mask_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	int	bit, word;</div><div class='del'>-	unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);</div><div class='del'>-</div><div class='del'>-	bit = irq_nr &amp; 0x1f;</div><div class='del'>-	word = irq_nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	ppc_cached_irq_mask[word] &amp;= ~(1 &lt;&lt; (31-bit));</div><div class='del'>-	out_be32(&amp;siu_reg-&gt;sc_simask, ppc_cached_irq_mask[word]);</div><div class='add'>+	mpc8xx_cached_irq_mask &amp;= ~mpc8xx_irqd_to_bit(d);</div><div class='add'>+	out_be32(&amp;siu_reg-&gt;sc_simask, mpc8xx_cached_irq_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mpc8xx_ack(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	int	bit;</div><div class='del'>-	unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);</div><div class='del'>-</div><div class='del'>-	bit = irq_nr &amp; 0x1f;</div><div class='del'>-	out_be32(&amp;siu_reg-&gt;sc_sipend, 1 &lt;&lt; (31-bit));</div><div class='add'>+	out_be32(&amp;siu_reg-&gt;sc_sipend, mpc8xx_irqd_to_bit(d));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mpc8xx_end_irq(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	int bit, word;</div><div class='del'>-	unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);</div><div class='del'>-</div><div class='del'>-	bit = irq_nr &amp; 0x1f;</div><div class='del'>-	word = irq_nr &gt;&gt; 5;</div><div class='del'>-</div><div class='del'>-	ppc_cached_irq_mask[word] |= (1 &lt;&lt; (31-bit));</div><div class='del'>-	out_be32(&amp;siu_reg-&gt;sc_simask, ppc_cached_irq_mask[word]);</div><div class='add'>+	mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);</div><div class='add'>+	out_be32(&amp;siu_reg-&gt;sc_simask, mpc8xx_cached_irq_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type)</div><div class='ctx'> {</div><div class='del'>-	if (flow_type &amp; IRQ_TYPE_EDGE_FALLING) {</div><div class='del'>-		irq_hw_number_t hw = (unsigned int)irqd_to_hwirq(d);</div><div class='add'>+	/* only external IRQ senses are programmable */</div><div class='add'>+	if ((flow_type &amp; IRQ_TYPE_EDGE_FALLING) &amp;&amp; !(irqd_to_hwirq(d) &amp; 1)) {</div><div class='ctx'> 		unsigned int siel = in_be32(&amp;siu_reg-&gt;sc_siel);</div><div class='del'>-</div><div class='del'>-		/* only external IRQ senses are programmable */</div><div class='del'>-		if ((hw &amp; 1) == 0) {</div><div class='del'>-			siel |= (0x80000000 &gt;&gt; hw);</div><div class='del'>-			out_be32(&amp;siu_reg-&gt;sc_siel, siel);</div><div class='del'>-			__irq_set_handler_locked(d-&gt;irq, handle_edge_irq);</div><div class='del'>-		}</div><div class='add'>+		siel |= mpc8xx_irqd_to_bit(d);</div><div class='add'>+		out_be32(&amp;siu_reg-&gt;sc_siel, siel);</div><div class='add'>+		__irq_set_handler_locked(d-&gt;irq, handle_edge_irq);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -132,6 +108,9 @@ static int mpc8xx_pic_host_xlate(struct irq_domain *h, struct device_node *ct,</div><div class='ctx'> 		IRQ_TYPE_EDGE_FALLING,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	if (intspec[0] &gt; 0x1f)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	*out_hwirq = intspec[0];</div><div class='ctx'> 	if (intsize &gt; 1 &amp;&amp; intspec[1] &lt; 4)</div><div class='ctx'> 		*out_flags = map_pic_senses[intspec[1]];</div><div class='head'>diff --git a/arch/powerpc/sysdev/ppc4xx_msi.c b/arch/powerpc/sysdev/ppc4xx_msi.c<br/>index 1c2d7af17bbe..82c6702dcbab 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/ppc4xx_msi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/sysdev/ppc4xx_msi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/ppc4xx_msi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/sysdev/ppc4xx_msi.c</a></div><div class='hunk'>@@ -28,10 +28,11 @@</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='ctx'> #include &lt;asm/hw_irq.h&gt;</div><div class='ctx'> #include &lt;asm/ppc-pci.h&gt;</div><div class='del'>-#include &lt;boot/dcr.h&gt;</div><div class='add'>+#include &lt;asm/dcr.h&gt;</div><div class='ctx'> #include &lt;asm/dcr-regs.h&gt;</div><div class='ctx'> #include &lt;asm/msi_bitmap.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -43,13 +44,14 @@</div><div class='ctx'> #define PEIH_FLUSH0	0x30</div><div class='ctx'> #define PEIH_FLUSH1	0x38</div><div class='ctx'> #define PEIH_CNTRST	0x48</div><div class='del'>-#define NR_MSI_IRQS	4</div><div class='add'>+</div><div class='add'>+static int msi_irqs;</div><div class='ctx'> </div><div class='ctx'> struct ppc4xx_msi {</div><div class='ctx'> 	u32 msi_addr_lo;</div><div class='ctx'> 	u32 msi_addr_hi;</div><div class='ctx'> 	void __iomem *msi_regs;</div><div class='del'>-	int msi_virqs[NR_MSI_IRQS];</div><div class='add'>+	int *msi_virqs;</div><div class='ctx'> 	struct msi_bitmap bitmap;</div><div class='ctx'> 	struct device_node *msi_dev;</div><div class='ctx'> };</div><div class='hunk'>@@ -61,7 +63,7 @@ static int ppc4xx_msi_init_allocator(struct platform_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = msi_bitmap_alloc(&amp;msi_data-&gt;bitmap, NR_MSI_IRQS,</div><div class='add'>+	err = msi_bitmap_alloc(&amp;msi_data-&gt;bitmap, msi_irqs,</div><div class='ctx'> 			      dev-&gt;dev.of_node);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -83,6 +85,11 @@ static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)</div><div class='ctx'> 	struct msi_desc *entry;</div><div class='ctx'> 	struct ppc4xx_msi *msi_data = &amp;ppc4xx_msi;</div><div class='ctx'> </div><div class='add'>+	msi_data-&gt;msi_virqs = kmalloc((msi_irqs) * sizeof(int),</div><div class='add'>+					    GFP_KERNEL);</div><div class='add'>+	if (!msi_data-&gt;msi_virqs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry(entry, &amp;dev-&gt;msi_list, list) {</div><div class='ctx'> 		int_no = msi_bitmap_alloc_hwirqs(&amp;msi_data-&gt;bitmap, 1);</div><div class='ctx'> 		if (int_no &gt;= 0)</div><div class='hunk'>@@ -150,12 +157,11 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,</div><div class='ctx'> 	if (!sdr_addr)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	SDR0_WRITE(sdr_addr, (u64)res.start &gt;&gt; 32);	 /*HIGH addr */</div><div class='del'>-	SDR0_WRITE(sdr_addr + 1, res.start &amp; 0xFFFFFFFF); /* Low addr */</div><div class='del'>-</div><div class='add'>+	mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start));	/*HIGH addr */</div><div class='add'>+	mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start));	/* Low addr */</div><div class='ctx'> </div><div class='ctx'> 	msi-&gt;msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");</div><div class='del'>-	if (msi-&gt;msi_dev)</div><div class='add'>+	if (!msi-&gt;msi_dev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	msi-&gt;msi_regs = of_iomap(msi-&gt;msi_dev, 0);</div><div class='hunk'>@@ -167,9 +173,12 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,</div><div class='ctx'> 		(u32) (msi-&gt;msi_regs + PEIH_TERMADH), (u32) (msi-&gt;msi_regs));</div><div class='ctx'> </div><div class='ctx'> 	msi_virt = dma_alloc_coherent(&amp;dev-&gt;dev, 64, &amp;msi_phys, GFP_KERNEL);</div><div class='del'>-	msi-&gt;msi_addr_hi = 0x0;</div><div class='del'>-	msi-&gt;msi_addr_lo = (u32) msi_phys;</div><div class='del'>-	dev_dbg(&amp;dev-&gt;dev, "PCIE-MSI: msi address 0x%x\n", msi-&gt;msi_addr_lo);</div><div class='add'>+	if (!msi_virt)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	msi-&gt;msi_addr_hi = upper_32_bits(msi_phys);</div><div class='add'>+	msi-&gt;msi_addr_lo = lower_32_bits(msi_phys &amp; 0xffffffff);</div><div class='add'>+	dev_dbg(&amp;dev-&gt;dev, "PCIE-MSI: msi address high 0x%x, low 0x%x\n",</div><div class='add'>+		msi-&gt;msi_addr_hi, msi-&gt;msi_addr_lo);</div><div class='ctx'> </div><div class='ctx'> 	/* Progam the Interrupt handler Termination addr registers */</div><div class='ctx'> 	out_be32(msi-&gt;msi_regs + PEIH_TERMADH, msi-&gt;msi_addr_hi);</div><div class='hunk'>@@ -185,6 +194,8 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,</div><div class='ctx'> 	out_be32(msi-&gt;msi_regs + PEIH_MSIED, *msi_data);</div><div class='ctx'> 	out_be32(msi-&gt;msi_regs + PEIH_MSIMK, *msi_mask);</div><div class='ctx'> </div><div class='add'>+	dma_free_coherent(&amp;dev-&gt;dev, 64, msi_virt, msi_phys);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -194,7 +205,7 @@ static int ppc4xx_of_msi_remove(struct platform_device *dev)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int virq;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; NR_MSI_IRQS; i++) {</div><div class='add'>+	for (i = 0; i &lt; msi_irqs; i++) {</div><div class='ctx'> 		virq = msi-&gt;msi_virqs[i];</div><div class='ctx'> 		if (virq != NO_IRQ)</div><div class='ctx'> 			irq_dispose_mapping(virq);</div><div class='hunk'>@@ -215,8 +226,6 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)</div><div class='ctx'> 	struct resource res;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	msi = &amp;ppc4xx_msi;/*keep the msi data for further use*/</div><div class='del'>-</div><div class='ctx'> 	dev_dbg(&amp;dev-&gt;dev, "PCIE-MSI: Setting up MSI support...\n");</div><div class='ctx'> </div><div class='ctx'> 	msi = kzalloc(sizeof(struct ppc4xx_msi), GFP_KERNEL);</div><div class='hunk'>@@ -234,6 +243,10 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	msi_irqs = of_irq_count(dev-&gt;dev.of_node);</div><div class='add'>+	if (!msi_irqs)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	if (ppc4xx_setup_pcieh_hw(dev, res, msi))</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> </div><div class='hunk'>@@ -242,6 +255,7 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)</div><div class='ctx'> 		dev_err(&amp;dev-&gt;dev, "Error allocating MSI bitmap\n");</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> 	}</div><div class='add'>+	ppc4xx_msi = *msi;</div><div class='ctx'> </div><div class='ctx'> 	ppc_md.setup_msi_irqs = ppc4xx_setup_msi_irqs;</div><div class='ctx'> 	ppc_md.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;</div><div class='head'>diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c<br/>index ea5e204e3450..cd1d18db92c6 100644<br/>--- a/<a href='/drm-misc/tree/arch/powerpc/sysdev/xics/xics-common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/powerpc/sysdev/xics/xics-common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/powerpc/sysdev/xics/xics-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/powerpc/sysdev/xics/xics-common.c</a></div><div class='hunk'>@@ -188,6 +188,7 @@ void xics_migrate_irqs_away(void)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();</div><div class='ctx'> 	unsigned int irq, virq;</div><div class='add'>+	struct irq_desc *desc;</div><div class='ctx'> </div><div class='ctx'> 	/* If we used to be the default server, move to the new "boot_cpuid" */</div><div class='ctx'> 	if (hw_cpu == xics_default_server)</div><div class='hunk'>@@ -202,8 +203,7 @@ void xics_migrate_irqs_away(void)</div><div class='ctx'> 	/* Allow IPIs again... */</div><div class='ctx'> 	icp_ops-&gt;set_priority(DEFAULT_PRIORITY);</div><div class='ctx'> </div><div class='del'>-	for_each_irq(virq) {</div><div class='del'>-		struct irq_desc *desc;</div><div class='add'>+	for_each_irq_desc(virq, desc) {</div><div class='ctx'> 		struct irq_chip *chip;</div><div class='ctx'> 		long server;</div><div class='ctx'> 		unsigned long flags;</div><div class='hunk'>@@ -212,9 +212,8 @@ void xics_migrate_irqs_away(void)</div><div class='ctx'> 		/* We can't set affinity on ISA interrupts */</div><div class='ctx'> 		if (virq &lt; NUM_ISA_INTERRUPTS)</div><div class='ctx'> 			continue;</div><div class='del'>-		desc = irq_to_desc(virq);</div><div class='ctx'> 		/* We only need to migrate enabled IRQS */</div><div class='del'>-		if (!desc || !desc-&gt;action)</div><div class='add'>+		if (!desc-&gt;action)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (desc-&gt;irq_data.domain != xics_host)</div><div class='ctx'> 			continue;</div><div class='head'>diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig<br/>index 9015060919a0..a39b4690c171 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/Kconfig</a></div><div class='hunk'>@@ -28,12 +28,6 @@ config ARCH_HAS_ILOG2_U64</div><div class='ctx'> config GENERIC_HWEIGHT</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config GENERIC_TIME_VSYSCALL</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config GENERIC_BUG</div><div class='ctx'> 	def_bool y if BUG</div><div class='ctx'> </div><div class='hunk'>@@ -93,6 +87,7 @@ config S390</div><div class='ctx'> 	select ARCH_SAVE_PAGE_KEYS if HIBERNATION</div><div class='ctx'> 	select HAVE_MEMBLOCK</div><div class='ctx'> 	select HAVE_MEMBLOCK_NODE_MAP</div><div class='add'>+	select HAVE_CMPXCHG_LOCAL</div><div class='ctx'> 	select ARCH_DISCARD_MEMBLOCK</div><div class='ctx'> 	select ARCH_INLINE_SPIN_TRYLOCK</div><div class='ctx'> 	select ARCH_INLINE_SPIN_TRYLOCK_BH</div><div class='hunk'>@@ -122,6 +117,10 @@ config S390</div><div class='ctx'> 	select ARCH_INLINE_WRITE_UNLOCK_BH</div><div class='ctx'> 	select ARCH_INLINE_WRITE_UNLOCK_IRQ</div><div class='ctx'> 	select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='add'>+	select GENERIC_TIME_VSYSCALL</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select KTIME_SCALAR if 32BIT</div><div class='ctx'> </div><div class='ctx'> config SCHED_OMIT_FRAME_POINTER</div><div class='ctx'> 	def_bool y</div><div class='hunk'>@@ -134,8 +133,6 @@ menu "Base setup"</div><div class='ctx'> </div><div class='ctx'> comment "Processor type and features"</div><div class='ctx'> </div><div class='del'>-source "kernel/time/Kconfig"</div><div class='del'>-</div><div class='ctx'> config 64BIT</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	prompt "64 bit kernel"</div><div class='hunk'>@@ -146,9 +143,6 @@ config 64BIT</div><div class='ctx'> config 32BIT</div><div class='ctx'> 	def_bool y if !64BIT</div><div class='ctx'> </div><div class='del'>-config KTIME_SCALAR</div><div class='del'>-	def_bool 32BIT</div><div class='del'>-</div><div class='ctx'> config SMP</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	prompt "Symmetric multi-processing support"</div><div class='hunk'>@@ -217,7 +211,7 @@ config COMPAT</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	prompt "Kernel support for 31 bit emulation"</div><div class='ctx'> 	depends on 64BIT</div><div class='del'>-	select COMPAT_BINFMT_ELF</div><div class='add'>+	select COMPAT_BINFMT_ELF if BINFMT_ELF</div><div class='ctx'> 	select ARCH_WANT_OLD_COMPAT_IPC</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this option if you want to enable your system kernel to</div><div class='hunk'>@@ -234,6 +228,25 @@ config KEYS_COMPAT</div><div class='ctx'> config AUDIT_ARCH</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='add'>+config HAVE_MARCH_Z900_FEATURES</div><div class='add'>+	def_bool n</div><div class='add'>+</div><div class='add'>+config HAVE_MARCH_Z990_FEATURES</div><div class='add'>+	def_bool n</div><div class='add'>+	select HAVE_MARCH_Z900_FEATURES</div><div class='add'>+</div><div class='add'>+config HAVE_MARCH_Z9_109_FEATURES</div><div class='add'>+	def_bool n</div><div class='add'>+	select HAVE_MARCH_Z990_FEATURES</div><div class='add'>+</div><div class='add'>+config HAVE_MARCH_Z10_FEATURES</div><div class='add'>+	def_bool n</div><div class='add'>+	select HAVE_MARCH_Z9_109_FEATURES</div><div class='add'>+</div><div class='add'>+config HAVE_MARCH_Z196_FEATURES</div><div class='add'>+	def_bool n</div><div class='add'>+	select HAVE_MARCH_Z10_FEATURES</div><div class='add'>+</div><div class='ctx'> comment "Code generation options"</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='hunk'>@@ -249,6 +262,7 @@ config MARCH_G5</div><div class='ctx'> </div><div class='ctx'> config MARCH_Z900</div><div class='ctx'> 	bool "IBM zSeries model z800 and z900"</div><div class='add'>+	select HAVE_MARCH_Z900_FEATURES if 64BIT</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this to enable optimizations for model z800/z900 (2064 and</div><div class='ctx'> 	  2066 series). This will enable some optimizations that are not</div><div class='hunk'>@@ -256,6 +270,7 @@ config MARCH_Z900</div><div class='ctx'> </div><div class='ctx'> config MARCH_Z990</div><div class='ctx'> 	bool "IBM zSeries model z890 and z990"</div><div class='add'>+	select HAVE_MARCH_Z990_FEATURES if 64BIT</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this to enable optimizations for model z890/z990 (2084 and</div><div class='ctx'> 	  2086 series). The kernel will be slightly faster but will not work</div><div class='hunk'>@@ -263,6 +278,7 @@ config MARCH_Z990</div><div class='ctx'> </div><div class='ctx'> config MARCH_Z9_109</div><div class='ctx'> 	bool "IBM System z9"</div><div class='add'>+	select HAVE_MARCH_Z9_109_FEATURES if 64BIT</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this to enable optimizations for IBM System z9 (2094 and</div><div class='ctx'> 	  2096 series). The kernel will be slightly faster but will not work</div><div class='hunk'>@@ -270,6 +286,7 @@ config MARCH_Z9_109</div><div class='ctx'> </div><div class='ctx'> config MARCH_Z10</div><div class='ctx'> 	bool "IBM System z10"</div><div class='add'>+	select HAVE_MARCH_Z10_FEATURES if 64BIT</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this to enable optimizations for IBM System z10 (2097 and</div><div class='ctx'> 	  2098 series). The kernel will be slightly faster but will not work</div><div class='hunk'>@@ -277,6 +294,7 @@ config MARCH_Z10</div><div class='ctx'> </div><div class='ctx'> config MARCH_Z196</div><div class='ctx'> 	bool "IBM zEnterprise 114 and 196"</div><div class='add'>+	select HAVE_MARCH_Z196_FEATURES if 64BIT</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this to enable optimizations for IBM zEnterprise 114 and 196</div><div class='ctx'> 	  (2818 and 2817 series). The kernel will be slightly faster but will</div><div class='hunk'>@@ -406,33 +424,6 @@ config CHSC_SCH</div><div class='ctx'> </div><div class='ctx'> comment "Misc"</div><div class='ctx'> </div><div class='del'>-config IPL</div><div class='del'>-	def_bool y</div><div class='del'>-	prompt "Builtin IPL record support"</div><div class='del'>-	help</div><div class='del'>-	  If you want to use the produced kernel to IPL directly from a</div><div class='del'>-	  device, you have to merge a bootsector specific to the device</div><div class='del'>-	  into the first bytes of the kernel. You will have to select the</div><div class='del'>-	  IPL device.</div><div class='del'>-</div><div class='del'>-choice</div><div class='del'>-	prompt "IPL method generated into head.S"</div><div class='del'>-	depends on IPL</div><div class='del'>-	default IPL_VM</div><div class='del'>-	help</div><div class='del'>-	  Select "tape" if you want to IPL the image from a Tape.</div><div class='del'>-</div><div class='del'>-	  Select "vm_reader" if you are running under VM/ESA and want</div><div class='del'>-	  to IPL the image from the emulated card reader.</div><div class='del'>-</div><div class='del'>-config IPL_TAPE</div><div class='del'>-	bool "tape"</div><div class='del'>-</div><div class='del'>-config IPL_VM</div><div class='del'>-	bool "vm_reader"</div><div class='del'>-</div><div class='del'>-endchoice</div><div class='del'>-</div><div class='ctx'> source "fs/Kconfig.binfmt"</div><div class='ctx'> </div><div class='ctx'> config FORCE_MAX_ZONEORDER</div><div class='hunk'>@@ -569,7 +560,7 @@ config KEXEC</div><div class='ctx'> </div><div class='ctx'> config CRASH_DUMP</div><div class='ctx'> 	bool "kernel crash dumps"</div><div class='del'>-	depends on 64BIT</div><div class='add'>+	depends on 64BIT &amp;&amp; SMP</div><div class='ctx'> 	select KEXEC</div><div class='ctx'> 	help</div><div class='ctx'> 	  Generate crash dump after being started by kexec.</div><div class='head'>diff --git a/arch/s390/Makefile b/arch/s390/Makefile<br/>index 0ad2f1e1ce9e..49e76e8b477d 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/Makefile</a></div><div class='hunk'>@@ -91,7 +91,6 @@ OBJCOPYFLAGS	:= -O binary</div><div class='ctx'> </div><div class='ctx'> head-y		:= arch/s390/kernel/head.o</div><div class='ctx'> head-y		+= arch/s390/kernel/$(if $(CONFIG_64BIT),head64.o,head31.o)</div><div class='del'>-head-y		+= arch/s390/kernel/init_task.o</div><div class='ctx'> </div><div class='ctx'> # See arch/s390/Kbuild for content of core part of the kernel</div><div class='ctx'> core-y		+= arch/s390/</div><div class='head'>diff --git a/arch/s390/boot/.gitignore b/arch/s390/boot/.gitignore<br/>new file mode 100644<br/>index 000000000000..017d5912ad2d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/s390/boot/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/boot/.gitignore</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+image</div><div class='add'>+bzImage</div><div class='head'>diff --git a/arch/s390/boot/compressed/.gitignore b/arch/s390/boot/compressed/.gitignore<br/>new file mode 100644<br/>index 000000000000..ae06b9b4c02f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/s390/boot/compressed/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/boot/compressed/.gitignore</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+sizes.h</div><div class='add'>+vmlinux</div><div class='add'>+vmlinux.lds</div><div class='head'>diff --git a/arch/s390/defconfig b/arch/s390/defconfig<br/>index 1957a9dd256d..37d2bf267964 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/defconfig</a></div><div class='hunk'>@@ -155,7 +155,6 @@ CONFIG_CRYPTO_BLOWFISH=m</div><div class='ctx'> CONFIG_CRYPTO_CAMELLIA=m</div><div class='ctx'> CONFIG_CRYPTO_CAST5=m</div><div class='ctx'> CONFIG_CRYPTO_CAST6=m</div><div class='del'>-CONFIG_CRYPTO_DES=m</div><div class='ctx'> CONFIG_CRYPTO_FCRYPT=m</div><div class='ctx'> CONFIG_CRYPTO_KHAZAD=m</div><div class='ctx'> CONFIG_CRYPTO_SALSA20=m</div><div class='head'>diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c<br/>index 6a2cb560e968..73dae8b9b77a 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/hypfs/inode.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/hypfs/inode.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/hypfs/inode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/hypfs/inode.c</a></div><div class='hunk'>@@ -115,7 +115,7 @@ static struct inode *hypfs_make_inode(struct super_block *sb, umode_t mode)</div><div class='ctx'> </div><div class='ctx'> static void hypfs_evict_inode(struct inode *inode)</div><div class='ctx'> {</div><div class='del'>-	end_writeback(inode);</div><div class='add'>+	clear_inode(inode);</div><div class='ctx'> 	kfree(inode-&gt;i_private);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/include/asm/barrier.h b/arch/s390/include/asm/barrier.h<br/>index 451273ad4d34..10a508802940 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/barrier.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/barrier.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/barrier.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/barrier.h</a></div><div class='hunk'>@@ -11,25 +11,28 @@</div><div class='ctx'>  * Force strict CPU ordering.</div><div class='ctx'>  * And yes, this is required on UP too when we're talking</div><div class='ctx'>  * to devices.</div><div class='del'>- *</div><div class='del'>- * This is very similar to the ppc eieio/sync instruction in that is</div><div class='del'>- * does a checkpoint syncronisation &amp; makes sure that </div><div class='del'>- * all memory ops have completed wrt other CPU's ( see 7-15 POP  DJB ).</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define eieio()	asm volatile("bcr 15,0" : : : "memory")</div><div class='del'>-#define SYNC_OTHER_CORES(x)   eieio()</div><div class='del'>-#define mb()    eieio()</div><div class='del'>-#define rmb()   eieio()</div><div class='del'>-#define wmb()   eieio()</div><div class='del'>-#define read_barrier_depends() do { } while(0)</div><div class='del'>-#define smp_mb()       mb()</div><div class='del'>-#define smp_rmb()      rmb()</div><div class='del'>-#define smp_wmb()      wmb()</div><div class='del'>-#define smp_read_barrier_depends()    read_barrier_depends()</div><div class='del'>-#define smp_mb__before_clear_bit()     smp_mb()</div><div class='del'>-#define smp_mb__after_clear_bit()      smp_mb()</div><div class='add'>+static inline void mb(void)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES</div><div class='add'>+	/* Fast-BCR without checkpoint synchronization */</div><div class='add'>+	asm volatile("bcr 14,0" : : : "memory");</div><div class='add'>+#else</div><div class='add'>+	asm volatile("bcr 15,0" : : : "memory");</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define rmb()				mb()</div><div class='add'>+#define wmb()				mb()</div><div class='add'>+#define read_barrier_depends()		do { } while(0)</div><div class='add'>+#define smp_mb()			mb()</div><div class='add'>+#define smp_rmb()			rmb()</div><div class='add'>+#define smp_wmb()			wmb()</div><div class='add'>+#define smp_read_barrier_depends()	read_barrier_depends()</div><div class='add'>+#define smp_mb__before_clear_bit()	smp_mb()</div><div class='add'>+#define smp_mb__after_clear_bit()	smp_mb()</div><div class='ctx'> </div><div class='del'>-#define set_mb(var, value)      do { var = value; mb(); } while (0)</div><div class='add'>+#define set_mb(var, value)		do { var = value; mb(); } while (0)</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_BARRIER_H */</div><div class='head'>diff --git a/arch/s390/include/asm/bitops.h b/arch/s390/include/asm/bitops.h<br/>index e5beb490959b..a6ff5a83e227 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/bitops.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/bitops.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/bitops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/bitops.h</a></div><div class='hunk'>@@ -13,8 +13,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='ctx'> #ifndef _LINUX_BITOPS_H</div><div class='ctx'> #error only &lt;linux/bitops.h&gt; can be included directly</div><div class='ctx'> #endif</div><div class='hunk'>@@ -63,7 +61,7 @@ extern const char _ni_bitmap[];</div><div class='ctx'> extern const char _zb_findmap[];</div><div class='ctx'> extern const char _sb_findmap[];</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> </div><div class='ctx'> #define __BITOPS_ALIGN		3</div><div class='ctx'> #define __BITOPS_WORDSIZE	32</div><div class='hunk'>@@ -83,7 +81,7 @@ extern const char _sb_findmap[];</div><div class='ctx'> 		: "d" (__val), "Q" (*(unsigned long *) __addr)	\</div><div class='ctx'> 		: "cc");</div><div class='ctx'> </div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define __BITOPS_ALIGN		7</div><div class='ctx'> #define __BITOPS_WORDSIZE	64</div><div class='hunk'>@@ -103,7 +101,7 @@ extern const char _sb_findmap[];</div><div class='ctx'> 		: "d" (__val), "Q" (*(unsigned long *) __addr)	\</div><div class='ctx'> 		: "cc");</div><div class='ctx'> </div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define __BITOPS_WORDS(bits) (((bits)+__BITOPS_WORDSIZE-1)/__BITOPS_WORDSIZE)</div><div class='ctx'> #define __BITOPS_BARRIER() asm volatile("" : : : "memory")</div><div class='hunk'>@@ -412,7 +410,7 @@ static inline unsigned long __ffz_word_loop(const unsigned long *addr,</div><div class='ctx'> 	unsigned long bytes = 0;</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 		"	ahi	%1,-1\n"</div><div class='ctx'> 		"	sra	%1,5\n"</div><div class='ctx'> 		"	jz	1f\n"</div><div class='hunk'>@@ -449,7 +447,7 @@ static inline unsigned long __ffs_word_loop(const unsigned long *addr,</div><div class='ctx'> 	unsigned long bytes = 0;</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 		"	ahi	%1,-1\n"</div><div class='ctx'> 		"	sra	%1,5\n"</div><div class='ctx'> 		"	jz	1f\n"</div><div class='hunk'>@@ -481,7 +479,7 @@ static inline unsigned long __ffs_word_loop(const unsigned long *addr,</div><div class='ctx'>  */</div><div class='ctx'> static inline unsigned long __ffz_word(unsigned long nr, unsigned long word)</div><div class='ctx'> {</div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> 	if ((word &amp; 0xffffffff) == 0xffffffff) {</div><div class='ctx'> 		word &gt;&gt;= 32;</div><div class='ctx'> 		nr += 32;</div><div class='hunk'>@@ -505,7 +503,7 @@ static inline unsigned long __ffz_word(unsigned long nr, unsigned long word)</div><div class='ctx'>  */</div><div class='ctx'> static inline unsigned long __ffs_word(unsigned long nr, unsigned long word)</div><div class='ctx'> {</div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> 	if ((word &amp; 0xffffffff) == 0) {</div><div class='ctx'> 		word &gt;&gt;= 32;</div><div class='ctx'> 		nr += 32;</div><div class='hunk'>@@ -546,7 +544,7 @@ static inline unsigned long __load_ulong_le(const unsigned long *p,</div><div class='ctx'> 	unsigned long word;</div><div class='ctx'> </div><div class='ctx'> 	p = (unsigned long *)((unsigned long) p + offset);</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"	ic	%0,%O1(%R1)\n"</div><div class='ctx'> 		"	icm	%0,2,%O1+1(%R1)\n"</div><div class='hunk'>@@ -834,7 +832,4 @@ static inline int find_next_bit_le(void *vaddr, unsigned long size,</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/bitops/ext2-atomic-setbit.h&gt;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-</div><div class='ctx'> #endif /* _S390_BITOPS_H */</div><div class='head'>diff --git a/arch/s390/include/asm/ccwgroup.h b/arch/s390/include/asm/ccwgroup.h<br/>index f2ea2c56a7e1..f2ef34f6d6e5 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/ccwgroup.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/ccwgroup.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/ccwgroup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/ccwgroup.h</a></div><div class='hunk'>@@ -29,9 +29,7 @@ struct ccwgroup_device {</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct ccwgroup_driver - driver for ccw group devices</div><div class='del'>- * @max_slaves: maximum number of slave devices</div><div class='del'>- * @driver_id: unique id</div><div class='del'>- * @probe: function called on probe</div><div class='add'>+ * @setup: function called during device creation to setup the device</div><div class='ctx'>  * @remove: function called on remove</div><div class='ctx'>  * @set_online: function called when device is set online</div><div class='ctx'>  * @set_offline: function called when device is set offline</div><div class='hunk'>@@ -44,10 +42,7 @@ struct ccwgroup_device {</div><div class='ctx'>  * @driver: embedded driver structure</div><div class='ctx'>  */</div><div class='ctx'> struct ccwgroup_driver {</div><div class='del'>-	int max_slaves;</div><div class='del'>-	unsigned long driver_id;</div><div class='del'>-</div><div class='del'>-	int (*probe) (struct ccwgroup_device *);</div><div class='add'>+	int (*setup) (struct ccwgroup_device *);</div><div class='ctx'> 	void (*remove) (struct ccwgroup_device *);</div><div class='ctx'> 	int (*set_online) (struct ccwgroup_device *);</div><div class='ctx'> 	int (*set_offline) (struct ccwgroup_device *);</div><div class='hunk'>@@ -63,9 +58,8 @@ struct ccwgroup_driver {</div><div class='ctx'> </div><div class='ctx'> extern int  ccwgroup_driver_register   (struct ccwgroup_driver *cdriver);</div><div class='ctx'> extern void ccwgroup_driver_unregister (struct ccwgroup_driver *cdriver);</div><div class='del'>-int ccwgroup_create_from_string(struct device *root, unsigned int creator_id,</div><div class='del'>-				struct ccw_driver *cdrv, int num_devices,</div><div class='del'>-				const char *buf);</div><div class='add'>+int ccwgroup_create_dev(struct device *root, struct ccwgroup_driver *gdrv,</div><div class='add'>+			int num_devices, const char *buf);</div><div class='ctx'> </div><div class='ctx'> extern int ccwgroup_probe_ccwdev(struct ccw_device *cdev);</div><div class='ctx'> extern void ccwgroup_remove_ccwdev(struct ccw_device *cdev);</div><div class='head'>diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h<br/>index fc50a3342da3..4c8d4d5b8bd2 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/cio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/cio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/cio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/cio.h</a></div><div class='hunk'>@@ -10,8 +10,6 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='ctx'> #define LPM_ANYPATH 0xff</div><div class='ctx'> #define __MAX_CSSID 0</div><div class='ctx'> </div><div class='hunk'>@@ -291,5 +289,3 @@ int chsc_sstpc(void *page, unsigned int op, u16 ctrl);</div><div class='ctx'> int chsc_sstpi(void *page, void *result, size_t size);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/s390/include/asm/cmpxchg.h b/arch/s390/include/asm/cmpxchg.h<br/>index 81d7908416cf..8d798e962b63 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/cmpxchg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/cmpxchg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/cmpxchg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/cmpxchg.h</a></div><div class='hunk'>@@ -29,7 +29,7 @@ static inline unsigned long __xchg(unsigned long x, void *ptr, int size)</div><div class='ctx'> 			"	cs	%0,0,%4\n"</div><div class='ctx'> 			"	jl	0b\n"</div><div class='ctx'> 			: "=&amp;d" (old), "=Q" (*(int *) addr)</div><div class='del'>-			: "d" (x &lt;&lt; shift), "d" (~(255 &lt;&lt; shift)),</div><div class='add'>+			: "d" ((x &amp; 0xff) &lt;&lt; shift), "d" (~(0xff &lt;&lt; shift)),</div><div class='ctx'> 			  "Q" (*(int *) addr) : "memory", "cc", "0");</div><div class='ctx'> 		return old &gt;&gt; shift;</div><div class='ctx'> 	case 2:</div><div class='hunk'>@@ -44,7 +44,7 @@ static inline unsigned long __xchg(unsigned long x, void *ptr, int size)</div><div class='ctx'> 			"	cs	%0,0,%4\n"</div><div class='ctx'> 			"	jl	0b\n"</div><div class='ctx'> 			: "=&amp;d" (old), "=Q" (*(int *) addr)</div><div class='del'>-			: "d" (x &lt;&lt; shift), "d" (~(65535 &lt;&lt; shift)),</div><div class='add'>+			: "d" ((x &amp; 0xffff) &lt;&lt; shift), "d" (~(0xffff &lt;&lt; shift)),</div><div class='ctx'> 			  "Q" (*(int *) addr) : "memory", "cc", "0");</div><div class='ctx'> 		return old &gt;&gt; shift;</div><div class='ctx'> 	case 4:</div><div class='hunk'>@@ -113,9 +113,10 @@ static inline unsigned long __cmpxchg(void *ptr, unsigned long old,</div><div class='ctx'> 			"	nr	%1,%5\n"</div><div class='ctx'> 			"	jnz	0b\n"</div><div class='ctx'> 			"1:"</div><div class='del'>-			: "=&amp;d" (prev), "=&amp;d" (tmp), "=Q" (*(int *) ptr)</div><div class='del'>-			: "d" (old &lt;&lt; shift), "d" (new &lt;&lt; shift),</div><div class='del'>-			  "d" (~(255 &lt;&lt; shift)), "Q" (*(int *) ptr)</div><div class='add'>+			: "=&amp;d" (prev), "=&amp;d" (tmp), "+Q" (*(int *) addr)</div><div class='add'>+			: "d" ((old &amp; 0xff) &lt;&lt; shift),</div><div class='add'>+			  "d" ((new &amp; 0xff) &lt;&lt; shift),</div><div class='add'>+			  "d" (~(0xff &lt;&lt; shift))</div><div class='ctx'> 			: "memory", "cc");</div><div class='ctx'> 		return prev &gt;&gt; shift;</div><div class='ctx'> 	case 2:</div><div class='hunk'>@@ -134,9 +135,10 @@ static inline unsigned long __cmpxchg(void *ptr, unsigned long old,</div><div class='ctx'> 			"	nr	%1,%5\n"</div><div class='ctx'> 			"	jnz	0b\n"</div><div class='ctx'> 			"1:"</div><div class='del'>-			: "=&amp;d" (prev), "=&amp;d" (tmp), "=Q" (*(int *) ptr)</div><div class='del'>-			: "d" (old &lt;&lt; shift), "d" (new &lt;&lt; shift),</div><div class='del'>-			  "d" (~(65535 &lt;&lt; shift)), "Q" (*(int *) ptr)</div><div class='add'>+			: "=&amp;d" (prev), "=&amp;d" (tmp), "+Q" (*(int *) addr)</div><div class='add'>+			: "d" ((old &amp; 0xffff) &lt;&lt; shift),</div><div class='add'>+			  "d" ((new &amp; 0xffff) &lt;&lt; shift),</div><div class='add'>+			  "d" (~(0xffff &lt;&lt; shift))</div><div class='ctx'> 			: "memory", "cc");</div><div class='ctx'> 		return prev &gt;&gt; shift;</div><div class='ctx'> 	case 4:</div><div class='hunk'>@@ -160,9 +162,14 @@ static inline unsigned long __cmpxchg(void *ptr, unsigned long old,</div><div class='ctx'> 	return old;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define cmpxchg(ptr, o, n)						\</div><div class='del'>-	((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o),	\</div><div class='del'>-				       (unsigned long)(n), sizeof(*(ptr))))</div><div class='add'>+#define cmpxchg(ptr, o, n)						 \</div><div class='add'>+({									 \</div><div class='add'>+	__typeof__(*(ptr)) __ret;					 \</div><div class='add'>+	__ret = (__typeof__(*(ptr)))					 \</div><div class='add'>+		__cmpxchg((ptr), (unsigned long)(o), (unsigned long)(n), \</div><div class='add'>+			  sizeof(*(ptr)));				 \</div><div class='add'>+	__ret;								 \</div><div class='add'>+})</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_64BIT</div><div class='ctx'> #define cmpxchg64(ptr, o, n)						\</div><div class='hunk'>@@ -181,13 +188,19 @@ static inline unsigned long long __cmpxchg64(void *ptr,</div><div class='ctx'> 		"	cds	%0,%2,%1"</div><div class='ctx'> 		: "+&amp;d" (rp_old), "=Q" (ptr)</div><div class='ctx'> 		: "d" (rp_new), "Q" (ptr)</div><div class='del'>-		: "cc");</div><div class='add'>+		: "memory", "cc");</div><div class='ctx'> 	return rp_old.pair;</div><div class='ctx'> }</div><div class='del'>-#define cmpxchg64(ptr, o, n)						\</div><div class='del'>-	((__typeof__(*(ptr)))__cmpxchg64((ptr),				\</div><div class='del'>-					 (unsigned long long)(o),	\</div><div class='del'>-					 (unsigned long long)(n)))</div><div class='add'>+</div><div class='add'>+#define cmpxchg64(ptr, o, n)				\</div><div class='add'>+({							\</div><div class='add'>+	__typeof__(*(ptr)) __ret;			\</div><div class='add'>+	__ret = (__typeof__(*(ptr)))			\</div><div class='add'>+		__cmpxchg64((ptr),			\</div><div class='add'>+			    (unsigned long long)(o),	\</div><div class='add'>+			    (unsigned long long)(n));	\</div><div class='add'>+	__ret;						\</div><div class='add'>+})</div><div class='ctx'> #endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/cmpxchg-local.h&gt;</div><div class='hunk'>@@ -216,8 +229,13 @@ static inline unsigned long __cmpxchg_local(void *ptr,</div><div class='ctx'>  * them available.</div><div class='ctx'>  */</div><div class='ctx'> #define cmpxchg_local(ptr, o, n)					\</div><div class='del'>-	((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o),	\</div><div class='del'>-			(unsigned long)(n), sizeof(*(ptr))))</div><div class='add'>+({									\</div><div class='add'>+	__typeof__(*(ptr)) __ret;					\</div><div class='add'>+	__ret = (__typeof__(*(ptr)))					\</div><div class='add'>+		__cmpxchg_local((ptr), (unsigned long)(o),		\</div><div class='add'>+				(unsigned long)(n), sizeof(*(ptr)));	\</div><div class='add'>+	__ret;								\</div><div class='add'>+})</div><div class='ctx'> </div><div class='ctx'> #define cmpxchg64_local(ptr, o, n)	cmpxchg64((ptr), (o), (n))</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h<br/>index 24ef186a1c4f..718374de9c7f 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/cputime.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/cputime.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/cputime.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/cputime.h</a></div><div class='hunk'>@@ -21,15 +21,15 @@ typedef unsigned long long __nocast cputime64_t;</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long __div(unsigned long long n, unsigned long base)</div><div class='ctx'> {</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 	register_pair rp;</div><div class='ctx'> </div><div class='ctx'> 	rp.pair = n &gt;&gt; 1;</div><div class='ctx'> 	asm ("dr %0,%1" : "+d" (rp) : "d" (base &gt;&gt; 1));</div><div class='ctx'> 	return rp.subreg.odd;</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> 	return n / base;</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define cputime_one_jiffy		jiffies_to_cputime(1)</div><div class='hunk'>@@ -100,7 +100,7 @@ static inline void cputime_to_timespec(const cputime_t cputime,</div><div class='ctx'> 				       struct timespec *value)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long __cputime = (__force unsigned long long) cputime;</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 	register_pair rp;</div><div class='ctx'> </div><div class='ctx'> 	rp.pair = __cputime &gt;&gt; 1;</div><div class='hunk'>@@ -128,7 +128,7 @@ static inline void cputime_to_timeval(const cputime_t cputime,</div><div class='ctx'> 				      struct timeval *value)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long __cputime = (__force unsigned long long) cputime;</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 	register_pair rp;</div><div class='ctx'> </div><div class='ctx'> 	rp.pair = __cputime &gt;&gt; 1;</div><div class='head'>diff --git a/arch/s390/include/asm/ctl_reg.h b/arch/s390/include/asm/ctl_reg.h<br/>index ecde9417d669..debfda33d1f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/ctl_reg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/ctl_reg.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/ctl_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/ctl_reg.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'> #ifndef __ASM_CTL_REG_H</div><div class='ctx'> #define __ASM_CTL_REG_H</div><div class='ctx'> </div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> </div><div class='ctx'> #define __ctl_load(array, low, high) ({				\</div><div class='ctx'> 	typedef struct { char _[sizeof(array)]; } addrtype;	\</div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> 		: "i" (low), "i" (high));			\</div><div class='ctx'> 	})</div><div class='ctx'> </div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define __ctl_load(array, low, high) ({				\</div><div class='ctx'> 	typedef struct { char _[sizeof(array)]; } addrtype;	\</div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> 		: "i" (low), "i" (high));			\</div><div class='ctx'> 	})</div><div class='ctx'> </div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define __ctl_set_bit(cr, bit) ({	\</div><div class='ctx'> 	unsigned long __dummy;		\</div><div class='head'>diff --git a/arch/s390/include/asm/current.h b/arch/s390/include/asm/current.h<br/>index 83cf36cde2da..7a68084ec2f0 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/current.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/current.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/current.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/current.h</a></div><div class='hunk'>@@ -11,13 +11,10 @@</div><div class='ctx'> #ifndef _S390_CURRENT_H</div><div class='ctx'> #define _S390_CURRENT_H</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='ctx'> #include &lt;asm/lowcore.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct task_struct;</div><div class='ctx'> </div><div class='ctx'> #define current ((struct task_struct *const)S390_lowcore.current_task)</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #endif /* !(_S390_CURRENT_H) */</div><div class='head'>diff --git a/arch/s390/include/asm/elf.h b/arch/s390/include/asm/elf.h<br/>index c4ee39f7a4d6..06151e6a3098 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/elf.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/elf.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/elf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/elf.h</a></div><div class='hunk'>@@ -107,11 +107,11 @@</div><div class='ctx'> /*</div><div class='ctx'>  * These are used to set parameters in the core dumps.</div><div class='ctx'>  */</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define ELF_CLASS	ELFCLASS32</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> #define ELF_CLASS	ELFCLASS64</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> #define ELF_DATA	ELFDATA2MSB</div><div class='ctx'> #define ELF_ARCH	EM_S390</div><div class='ctx'> </div><div class='hunk'>@@ -181,9 +181,9 @@ extern unsigned long elf_hwcap;</div><div class='ctx'> extern char elf_platform[];</div><div class='ctx'> #define ELF_PLATFORM (elf_platform)</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define SET_PERSONALITY(ex) set_personality(PER_LINUX)</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> #define SET_PERSONALITY(ex)					\</div><div class='ctx'> do {								\</div><div class='ctx'> 	if (personality(current-&gt;personality) != PER_LINUX32)	\</div><div class='hunk'>@@ -194,7 +194,7 @@ do {								\</div><div class='ctx'> 	else							\</div><div class='ctx'> 		clear_thread_flag(TIF_31BIT);			\</div><div class='ctx'> } while (0)</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define STACK_RND_MASK	0x7ffUL</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/include/asm/futex.h b/arch/s390/include/asm/futex.h<br/>index 81cf36b691f1..96bc83ea5c90 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/futex.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/futex.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/futex.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/futex.h</a></div><div class='hunk'>@@ -1,8 +1,6 @@</div><div class='ctx'> #ifndef _ASM_S390_FUTEX_H</div><div class='ctx'> #define _ASM_S390_FUTEX_H</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='ctx'> #include &lt;linux/futex.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='hunk'>@@ -48,5 +46,4 @@ static inline int futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,</div><div class='ctx'> 	return uaccess.futex_atomic_cmpxchg(uval, uaddr, oldval, newval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_S390_FUTEX_H */</div><div class='head'>diff --git a/arch/s390/include/asm/idals.h b/arch/s390/include/asm/idals.h<br/>index aae276d00383..aef0dde340d1 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/idals.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/idals.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/idals.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/idals.h</a></div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> #include &lt;asm/cio.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> #define IDA_SIZE_LOG 12 /* 11 for 2k , 12 for 4k */</div><div class='ctx'> #else</div><div class='ctx'> #define IDA_SIZE_LOG 11 /* 11 for 2k , 12 for 4k */</div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> static inline int</div><div class='ctx'> idal_is_needed(void *vaddr, unsigned int length)</div><div class='ctx'> {</div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> 	return ((__pa(vaddr) + length - 1) &gt;&gt; 31) != 0;</div><div class='ctx'> #else</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -78,7 +78,7 @@ static inline unsigned long *idal_create_words(unsigned long *idaws,</div><div class='ctx'> static inline int</div><div class='ctx'> set_normalized_cda(struct ccw1 * ccw, void *vaddr)</div><div class='ctx'> {</div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> 	unsigned int nridaws;</div><div class='ctx'> 	unsigned long *idal;</div><div class='ctx'> </div><div class='hunk'>@@ -105,7 +105,7 @@ set_normalized_cda(struct ccw1 * ccw, void *vaddr)</div><div class='ctx'> static inline void</div><div class='ctx'> clear_normalized_cda(struct ccw1 * ccw)</div><div class='ctx'> {</div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> 	if (ccw-&gt;flags &amp; CCW_FLAG_IDA) {</div><div class='ctx'> 		kfree((void *)(unsigned long) ccw-&gt;cda);</div><div class='ctx'> 		ccw-&gt;flags &amp;= ~CCW_FLAG_IDA;</div><div class='hunk'>@@ -182,7 +182,7 @@ idal_buffer_free(struct idal_buffer *ib)</div><div class='ctx'> static inline int</div><div class='ctx'> __idal_buffer_is_needed(struct idal_buffer *ib)</div><div class='ctx'> {</div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> 	return ib-&gt;size &gt; (4096ul &lt;&lt; ib-&gt;page_order) ||</div><div class='ctx'> 		idal_is_needed(ib-&gt;data[0], ib-&gt;size);</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/s390/include/asm/io.h b/arch/s390/include/asm/io.h<br/>index b7ff6afc3caa..f81a0975cbea 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/io.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/io.h</a></div><div class='hunk'>@@ -11,8 +11,6 @@</div><div class='ctx'> #ifndef _S390_IO_H</div><div class='ctx'> #define _S390_IO_H</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define IO_SPACE_LIMIT 0xffffffff</div><div class='hunk'>@@ -38,17 +36,12 @@ static inline void * phys_to_virt(unsigned long address)</div><div class='ctx'> 	return (void *) address;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Convert a physical pointer to a virtual kernel pointer for /dev/mem</div><div class='del'>- * access</div><div class='del'>- */</div><div class='del'>-#define xlate_dev_mem_ptr(p)	__va(p)</div><div class='add'>+void *xlate_dev_mem_ptr(unsigned long phys);</div><div class='add'>+void unxlate_dev_mem_ptr(unsigned long phys, void *addr);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Convert a virtual cached pointer to an uncached pointer</div><div class='ctx'>  */</div><div class='ctx'> #define xlate_dev_kmem_ptr(p)	p</div><div class='ctx'> </div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/s390/include/asm/irq.h b/arch/s390/include/asm/irq.h<br/>index 5289cacd4861..2b9d41899d21 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/irq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/irq.h</a></div><div class='hunk'>@@ -17,7 +17,8 @@ enum interruption_class {</div><div class='ctx'> 	EXTINT_VRT,</div><div class='ctx'> 	EXTINT_SCP,</div><div class='ctx'> 	EXTINT_IUC,</div><div class='del'>-	EXTINT_CPM,</div><div class='add'>+	EXTINT_CMS,</div><div class='add'>+	EXTINT_CMC,</div><div class='ctx'> 	IOINT_CIO,</div><div class='ctx'> 	IOINT_QAI,</div><div class='ctx'> 	IOINT_DAS,</div><div class='head'>diff --git a/arch/s390/include/asm/kexec.h b/arch/s390/include/asm/kexec.h<br/>index 3f30dac804ea..f4f38826eebb 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/kexec.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/kexec.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/kexec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/kexec.h</a></div><div class='hunk'>@@ -10,10 +10,8 @@</div><div class='ctx'> #ifndef _S390_KEXEC_H</div><div class='ctx'> #define _S390_KEXEC_H</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#endif</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='ctx'> /*</div><div class='ctx'>  * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.</div><div class='ctx'>  * I.e. Maximum page that is mapped directly into kernel memory,</div><div class='head'>diff --git a/arch/s390/include/asm/kmap_types.h b/arch/s390/include/asm/kmap_types.h<br/>index 94ec3ee07983..0a88622339ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/kmap_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/kmap_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/kmap_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/kmap_types.h</a></div><div class='hunk'>@@ -1,8 +1,6 @@</div><div class='del'>-#ifdef __KERNEL__</div><div class='ctx'> #ifndef _ASM_KMAP_TYPES_H</div><div class='ctx'> #define _ASM_KMAP_TYPES_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/kmap_types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='del'>-#endif /* __KERNEL__ */</div><div class='head'>diff --git a/arch/s390/include/asm/kvm.h b/arch/s390/include/asm/kvm.h<br/>index 96076676e224..bdcbe0f8dd7b 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/kvm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/kvm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/kvm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/kvm.h</a></div><div class='hunk'>@@ -52,4 +52,9 @@ struct kvm_sync_regs {</div><div class='ctx'> 	__u32 acrs[16];	/* access registers */</div><div class='ctx'> 	__u64 crs[16];	/* control registers */</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#define KVM_REG_S390_TODPR	(KVM_REG_S390 | KVM_REG_SIZE_U32 | 0x1)</div><div class='add'>+#define KVM_REG_S390_EPOCHDIFF	(KVM_REG_S390 | KVM_REG_SIZE_U64 | 0x2)</div><div class='add'>+#define KVM_REG_S390_CPU_TIMER  (KVM_REG_S390 | KVM_REG_SIZE_U64 | 0x3)</div><div class='add'>+#define KVM_REG_S390_CLOCK_COMP (KVM_REG_S390 | KVM_REG_SIZE_U64 | 0x4)</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h<br/>index 7343872890a2..dd17537b9a9d 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/kvm_host.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/kvm_host.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/kvm_host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -148,6 +148,7 @@ struct kvm_vcpu_stat {</div><div class='ctx'> 	u32 instruction_sigp_restart;</div><div class='ctx'> 	u32 diagnose_10;</div><div class='ctx'> 	u32 diagnose_44;</div><div class='add'>+	u32 diagnose_9c;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_s390_io_info {</div><div class='head'>diff --git a/arch/s390/include/asm/kvm_para.h b/arch/s390/include/asm/kvm_para.h<br/>index 6964db226f83..a98832961035 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/kvm_para.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/kvm_para.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -149,6 +149,11 @@ static inline unsigned int kvm_arch_para_features(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool kvm_check_and_clear_guest_paused(void)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __S390_KVM_PARA_H */</div><div class='head'>diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h<br/>index 5d09e405c54d..69bdf72e95ec 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/mmu_context.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/mmu_context.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/mmu_context.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -49,7 +49,7 @@ static inline int init_new_context(struct task_struct *tsk,</div><div class='ctx'> </div><div class='ctx'> #define destroy_context(mm)             do { } while (0)</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define LCTL_OPCODE "lctl"</div><div class='ctx'> #else</div><div class='ctx'> #define LCTL_OPCODE "lctlg"</div><div class='head'>diff --git a/arch/s390/include/asm/module.h b/arch/s390/include/asm/module.h<br/>index 1cc1c5af705a..f0b6b26b6e59 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/module.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/module.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/module.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/module.h</a></div><div class='hunk'>@@ -28,7 +28,7 @@ struct mod_arch_specific</div><div class='ctx'> 	struct mod_arch_syminfo *syminfo;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> #define ElfW(x) Elf64_ ## x</div><div class='ctx'> #define ELFW(x) ELF64_ ## x</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/s390/include/asm/os_info.h b/arch/s390/include/asm/os_info.h<br/>index d07518af09ea..295f2c4f1c96 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/os_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/os_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/os_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/os_info.h</a></div><div class='hunk'>@@ -13,7 +13,6 @@</div><div class='ctx'> </div><div class='ctx'> #define OS_INFO_VMCOREINFO	0</div><div class='ctx'> #define OS_INFO_REIPL_BLOCK	1</div><div class='del'>-#define OS_INFO_INIT_FN		2</div><div class='ctx'> </div><div class='ctx'> struct os_info_entry {</div><div class='ctx'> 	u64	addr;</div><div class='hunk'>@@ -28,8 +27,8 @@ struct os_info {</div><div class='ctx'> 	u16	version_minor;</div><div class='ctx'> 	u64	crashkernel_addr;</div><div class='ctx'> 	u64	crashkernel_size;</div><div class='del'>-	struct os_info_entry entry[3];</div><div class='del'>-	u8	reserved[4004];</div><div class='add'>+	struct os_info_entry entry[2];</div><div class='add'>+	u8	reserved[4024];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> void os_info_init(void);</div><div class='head'>diff --git a/arch/s390/include/asm/percpu.h b/arch/s390/include/asm/percpu.h<br/>index 0fbd1899c7b0..6537e72e0853 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/percpu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/percpu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/percpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/percpu.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'>  * per cpu area, use weak definitions to force the compiler to</div><div class='ctx'>  * generate external references.</div><div class='ctx'>  */</div><div class='del'>-#if defined(CONFIG_SMP) &amp;&amp; defined(__s390x__) &amp;&amp; defined(MODULE)</div><div class='add'>+#if defined(CONFIG_SMP) &amp;&amp; defined(CONFIG_64BIT) &amp;&amp; defined(MODULE)</div><div class='ctx'> #define ARCH_NEEDS_WEAK_PER_CPU</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/include/asm/pgalloc.h b/arch/s390/include/asm/pgalloc.h<br/>index 78e3041919de..43078c194394 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/pgalloc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/pgalloc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/pgalloc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -48,7 +48,7 @@ static inline void crst_table_init(unsigned long *crst, unsigned long entry)</div><div class='ctx'> 	clear_table(crst, entry, sizeof(unsigned long)*2048);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long pgd_entry_type(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='hunk'>@@ -64,7 +64,7 @@ static inline unsigned long pgd_entry_type(struct mm_struct *mm)</div><div class='ctx'> #define pgd_populate(mm, pgd, pud)		BUG()</div><div class='ctx'> #define pud_populate(mm, pud, pmd)		BUG()</div><div class='ctx'> </div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long pgd_entry_type(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='hunk'>@@ -106,7 +106,7 @@ static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)</div><div class='ctx'> 	pud_val(*pud) = _REGION3_ENTRY | __pa(pmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> static inline pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h<br/>index 011358c1b18e..b3227415abda 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/pgtable.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/pgtable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/pgtable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/pgtable.h</a></div><div class='hunk'>@@ -74,15 +74,15 @@ static inline int is_zero_pfn(unsigned long pfn)</div><div class='ctx'>  * table can map</div><div class='ctx'>  * PGDIR_SHIFT determines what a third-level page table entry can map</div><div class='ctx'>  */</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> # define PMD_SHIFT	20</div><div class='ctx'> # define PUD_SHIFT	20</div><div class='ctx'> # define PGDIR_SHIFT	20</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> # define PMD_SHIFT	20</div><div class='ctx'> # define PUD_SHIFT	31</div><div class='ctx'> # define PGDIR_SHIFT	42</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define PMD_SIZE        (1UL &lt;&lt; PMD_SHIFT)</div><div class='ctx'> #define PMD_MASK        (~(PMD_SIZE-1))</div><div class='hunk'>@@ -98,13 +98,13 @@ static inline int is_zero_pfn(unsigned long pfn)</div><div class='ctx'>  * that leads to 1024 pte per pgd</div><div class='ctx'>  */</div><div class='ctx'> #define PTRS_PER_PTE	256</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define PTRS_PER_PMD	1</div><div class='ctx'> #define PTRS_PER_PUD	1</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> #define PTRS_PER_PMD	2048</div><div class='ctx'> #define PTRS_PER_PUD	2048</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> #define PTRS_PER_PGD	2048</div><div class='ctx'> </div><div class='ctx'> #define FIRST_USER_ADDRESS  0</div><div class='hunk'>@@ -276,7 +276,7 @@ extern struct page *vmemmap;</div><div class='ctx'>  * swap pte is 1011 and 0001, 0011, 0101, 0111 are invalid.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> </div><div class='ctx'> /* Bits in the segment table address-space-control-element */</div><div class='ctx'> #define _ASCE_SPACE_SWITCH	0x80000000UL	/* space switch event	    */</div><div class='hunk'>@@ -308,7 +308,7 @@ extern struct page *vmemmap;</div><div class='ctx'> #define KVM_UR_BIT	0x00008000UL</div><div class='ctx'> #define KVM_UC_BIT	0x00004000UL</div><div class='ctx'> </div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> /* Bits in the segment/region table address-space-control-element */</div><div class='ctx'> #define _ASCE_ORIGIN		~0xfffUL/* segment table origin		    */</div><div class='hunk'>@@ -363,7 +363,7 @@ extern struct page *vmemmap;</div><div class='ctx'> #define KVM_UR_BIT	0x0000800000000000UL</div><div class='ctx'> #define KVM_UC_BIT	0x0000400000000000UL</div><div class='ctx'> </div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * A user page table pointer has the space-switch-event bit, the</div><div class='hunk'>@@ -424,7 +424,7 @@ static inline int mm_has_pgste(struct mm_struct *mm)</div><div class='ctx'> /*</div><div class='ctx'>  * pgd/pmd/pte query functions</div><div class='ctx'>  */</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> </div><div class='ctx'> static inline int pgd_present(pgd_t pgd) { return 1; }</div><div class='ctx'> static inline int pgd_none(pgd_t pgd)    { return 0; }</div><div class='hunk'>@@ -434,7 +434,7 @@ static inline int pud_present(pud_t pud) { return 1; }</div><div class='ctx'> static inline int pud_none(pud_t pud)	 { return 0; }</div><div class='ctx'> static inline int pud_bad(pud_t pud)	 { return 0; }</div><div class='ctx'> </div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> static inline int pgd_present(pgd_t pgd)</div><div class='ctx'> {</div><div class='hunk'>@@ -490,7 +490,7 @@ static inline int pud_bad(pud_t pud)</div><div class='ctx'> 	return (pud_val(pud) &amp; mask) != 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> static inline int pmd_present(pmd_t pmd)</div><div class='ctx'> {</div><div class='hunk'>@@ -741,7 +741,7 @@ static inline int pte_young(pte_t pte)</div><div class='ctx'> </div><div class='ctx'> static inline void pgd_clear(pgd_t *pgd)</div><div class='ctx'> {</div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> 	if ((pgd_val(*pgd) &amp; _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)</div><div class='ctx'> 		pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -749,7 +749,7 @@ static inline void pgd_clear(pgd_t *pgd)</div><div class='ctx'> </div><div class='ctx'> static inline void pud_clear(pud_t *pud)</div><div class='ctx'> {</div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> 	if ((pud_val(*pud) &amp; _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)</div><div class='ctx'> 		pud_val(*pud) = _REGION3_ENTRY_EMPTY;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -921,7 +921,7 @@ static inline int ptep_clear_flush_young(struct vm_area_struct *vma,</div><div class='ctx'> static inline void __ptep_ipte(unsigned long address, pte_t *ptep)</div><div class='ctx'> {</div><div class='ctx'> 	if (!(pte_val(*ptep) &amp; _PAGE_INVALID)) {</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 		/* pto must point to the start of the segment table */</div><div class='ctx'> 		pte_t *pto = (pte_t *) (((unsigned long) ptep) &amp; 0x7ffffc00);</div><div class='ctx'> #else</div><div class='hunk'>@@ -1116,7 +1116,7 @@ static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)</div><div class='ctx'> #define pgd_offset(mm, address) ((mm)-&gt;pgd + pgd_index(address))</div><div class='ctx'> #define pgd_offset_k(address) pgd_offset(&amp;init_mm, address)</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> </div><div class='ctx'> #define pmd_deref(pmd) (pmd_val(pmd) &amp; _SEGMENT_ENTRY_ORIGIN)</div><div class='ctx'> #define pud_deref(pmd) ({ BUG(); 0UL; })</div><div class='hunk'>@@ -1125,7 +1125,7 @@ static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)</div><div class='ctx'> #define pud_offset(pgd, address) ((pud_t *) pgd)</div><div class='ctx'> #define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address))</div><div class='ctx'> </div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define pmd_deref(pmd) (pmd_val(pmd) &amp; _SEGMENT_ENTRY_ORIGIN)</div><div class='ctx'> #define pud_deref(pud) (pud_val(pud) &amp; _REGION_ENTRY_ORIGIN)</div><div class='hunk'>@@ -1147,7 +1147,7 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)</div><div class='ctx'> 	return pmd + pmd_index(address);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) &lt;&lt; PAGE_SHIFT),(pgprot))</div><div class='ctx'> #define pte_pfn(x) (pte_val(x) &gt;&gt; PAGE_SHIFT)</div><div class='hunk'>@@ -1196,7 +1196,7 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)</div><div class='ctx'>  *  0000000000111111111122222222223333333333444444444455 5555 5 55566 66</div><div class='ctx'>  *  0123456789012345678901234567890123456789012345678901 2345 6 78901 23</div><div class='ctx'>  */</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define __SWP_OFFSET_MASK (~0UL &gt;&gt; 12)</div><div class='ctx'> #else</div><div class='ctx'> #define __SWP_OFFSET_MASK (~0UL &gt;&gt; 11)</div><div class='hunk'>@@ -1217,11 +1217,11 @@ static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)</div><div class='ctx'> #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })</div><div class='ctx'> #define __swp_entry_to_pte(x)	((pte_t) { (x).val })</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> # define PTE_FILE_MAX_BITS	26</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> # define PTE_FILE_MAX_BITS	59</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define pte_to_pgoff(__pte) \</div><div class='ctx'> 	((((__pte).pte &gt;&gt; 12) &lt;&lt; 7) + (((__pte).pte &gt;&gt; 1) &amp; 0x7f))</div><div class='head'>diff --git a/arch/s390/include/asm/posix_types.h b/arch/s390/include/asm/posix_types.h<br/>index edf8527ff08d..7be104c0f192 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/posix_types.h</a></div><div class='hunk'>@@ -24,7 +24,6 @@ typedef unsigned short	__kernel_old_dev_t;</div><div class='ctx'> </div><div class='ctx'> typedef unsigned long   __kernel_ino_t;</div><div class='ctx'> typedef unsigned short  __kernel_mode_t;</div><div class='del'>-typedef unsigned short  __kernel_nlink_t;</div><div class='ctx'> typedef unsigned short  __kernel_ipc_pid_t;</div><div class='ctx'> typedef unsigned short  __kernel_uid_t;</div><div class='ctx'> typedef unsigned short  __kernel_gid_t;</div><div class='hunk'>@@ -35,7 +34,6 @@ typedef int             __kernel_ptrdiff_t;</div><div class='ctx'> </div><div class='ctx'> typedef unsigned int    __kernel_ino_t;</div><div class='ctx'> typedef unsigned int    __kernel_mode_t;</div><div class='del'>-typedef unsigned int    __kernel_nlink_t;</div><div class='ctx'> typedef int             __kernel_ipc_pid_t;</div><div class='ctx'> typedef unsigned int    __kernel_uid_t;</div><div class='ctx'> typedef unsigned int    __kernel_gid_t;</div><div class='hunk'>@@ -47,7 +45,6 @@ typedef unsigned long   __kernel_sigset_t;      /* at least 32 bits */</div><div class='ctx'> </div><div class='ctx'> #define __kernel_ino_t  __kernel_ino_t</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> #define __kernel_uid_t __kernel_uid_t</div><div class='ctx'> #define __kernel_gid_t __kernel_gid_t</div><div class='head'>diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h<br/>index d499b30ea487..20d0585cf905 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/processor.h</a></div><div class='hunk'>@@ -20,7 +20,6 @@</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='ctx'> /*</div><div class='ctx'>  * Default implementation of macro that returns current</div><div class='ctx'>  * instruction pointer ("program counter").</div><div class='hunk'>@@ -33,39 +32,33 @@ static inline void get_cpu_id(struct cpuid *ptr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern void s390_adjust_jiffies(void);</div><div class='del'>-extern int get_cpu_capability(unsigned int *);</div><div class='ctx'> extern const struct seq_operations cpuinfo_op;</div><div class='ctx'> extern int sysctl_ieee_emulation_warnings;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.</div><div class='ctx'>  */</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> </div><div class='ctx'> #define TASK_SIZE		(1UL &lt;&lt; 31)</div><div class='ctx'> #define TASK_UNMAPPED_BASE	(1UL &lt;&lt; 30)</div><div class='ctx'> </div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define TASK_SIZE_OF(tsk)	((tsk)-&gt;mm-&gt;context.asce_limit)</div><div class='ctx'> #define TASK_UNMAPPED_BASE	(test_thread_flag(TIF_31BIT) ? \</div><div class='ctx'> 					(1UL &lt;&lt; 30) : (1UL &lt;&lt; 41))</div><div class='ctx'> #define TASK_SIZE		TASK_SIZE_OF(current)</div><div class='ctx'> </div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define STACK_TOP		(1UL &lt;&lt; 31)</div><div class='ctx'> #define STACK_TOP_MAX		(1UL &lt;&lt; 31)</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> #define STACK_TOP		(1UL &lt;&lt; (test_thread_flag(TIF_31BIT) ? 31:42))</div><div class='ctx'> #define STACK_TOP_MAX		(1UL &lt;&lt; 42)</div><div class='del'>-#endif /* __s390x__ */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define HAVE_ARCH_PICK_MMAP_LAYOUT</div><div class='ctx'> </div><div class='hunk'>@@ -141,9 +134,6 @@ struct seq_file;</div><div class='ctx'> extern void release_thread(struct task_struct *);</div><div class='ctx'> extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Return saved PC of a blocked thread.</div><div class='ctx'>  */</div><div class='hunk'>@@ -185,7 +175,7 @@ static inline void psw_set_key(unsigned int key)</div><div class='ctx'>  */</div><div class='ctx'> static inline void __load_psw(psw_t psw)</div><div class='ctx'> {</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 	asm volatile("lpsw  %0" : : "Q" (psw) : "cc");</div><div class='ctx'> #else</div><div class='ctx'> 	asm volatile("lpswe %0" : : "Q" (psw) : "cc");</div><div class='hunk'>@@ -203,7 +193,7 @@ static inline void __load_psw_mask (unsigned long mask)</div><div class='ctx'> </div><div class='ctx'> 	psw.mask = mask;</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"	basr	%0,0\n"</div><div class='ctx'> 		"0:	ahi	%0,1f-0b\n"</div><div class='hunk'>@@ -211,14 +201,14 @@ static inline void __load_psw_mask (unsigned long mask)</div><div class='ctx'> 		"	lpsw	%1\n"</div><div class='ctx'> 		"1:"</div><div class='ctx'> 		: "=&amp;d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"	larl	%0,1f\n"</div><div class='ctx'> 		"	stg	%0,%O1+8(%R1)\n"</div><div class='ctx'> 		"	lpswe	%1\n"</div><div class='ctx'> 		"1:"</div><div class='ctx'> 		: "=&amp;d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -226,7 +216,7 @@ static inline void __load_psw_mask (unsigned long mask)</div><div class='ctx'>  */</div><div class='ctx'> static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)</div><div class='ctx'> {</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 	if (psw.addr &amp; PSW_ADDR_AMODE)</div><div class='ctx'> 		/* 31 bit mode */</div><div class='ctx'> 		return (psw.addr - ilc) | PSW_ADDR_AMODE;</div><div class='hunk'>@@ -256,7 +246,7 @@ static inline void __noreturn disabled_wait(unsigned long code)</div><div class='ctx'>          * Store status and then load disabled wait psw,</div><div class='ctx'>          * the processor is dead afterwards</div><div class='ctx'>          */</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"	stctl	0,0,0(%2)\n"</div><div class='ctx'> 		"	ni	0(%2),0xef\n"	/* switch off protection */</div><div class='hunk'>@@ -275,7 +265,7 @@ static inline void __noreturn disabled_wait(unsigned long code)</div><div class='ctx'> 		"	lpsw	0(%1)"</div><div class='ctx'> 		: "=m" (ctl_buf)</div><div class='ctx'> 		: "a" (&amp;dw_psw), "a" (&amp;ctl_buf), "m" (dw_psw) : "cc");</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"	stctg	0,0,0(%2)\n"</div><div class='ctx'> 		"	ni	4(%2),0xef\n"	/* switch off protection */</div><div class='hunk'>@@ -308,7 +298,7 @@ static inline void __noreturn disabled_wait(unsigned long code)</div><div class='ctx'> 		"	lpswe	0(%1)"</div><div class='ctx'> 		: "=m" (ctl_buf)</div><div class='ctx'> 		: "a" (&amp;dw_psw), "a" (&amp;ctl_buf), "m" (dw_psw) : "cc", "0", "1");</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> 	while (1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -341,12 +331,10 @@ extern void (*s390_base_ext_handler_fn)(void);</div><div class='ctx'> </div><div class='ctx'> #define ARCH_LOW_ADDRESS_LIMIT	0x7fffffffUL</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Helper macro for exception table entries</div><div class='ctx'>  */</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define EX_TABLE(_fault,_target)			\</div><div class='ctx'> 	".section __ex_table,\"a\"\n"			\</div><div class='ctx'> 	"	.align 4\n"				\</div><div class='head'>diff --git a/arch/s390/include/asm/qdio.h b/arch/s390/include/asm/qdio.h<br/>index d75c8e78f7e3..f039d86adf67 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/qdio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/qdio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/qdio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/qdio.h</a></div><div class='hunk'>@@ -258,11 +258,6 @@ struct slsb {</div><div class='ctx'> 	u8 val[QDIO_MAX_BUFFERS_PER_Q];</div><div class='ctx'> } __attribute__ ((packed, aligned(256)));</div><div class='ctx'> </div><div class='del'>-#define CHSC_AC2_MULTI_BUFFER_AVAILABLE	0x0080</div><div class='del'>-#define CHSC_AC2_MULTI_BUFFER_ENABLED	0x0040</div><div class='del'>-#define CHSC_AC2_DATA_DIV_AVAILABLE	0x0010</div><div class='del'>-#define CHSC_AC2_DATA_DIV_ENABLED	0x0002</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * struct qdio_outbuf_state - SBAL related asynchronous operation information</div><div class='ctx'>  *   (for communication with upper layer programs)</div><div class='hunk'>@@ -293,6 +288,8 @@ struct qdio_outbuf_state {</div><div class='ctx'> #define AC1_SC_QEBSM_AVAILABLE		0x02	/* available for subchannel */</div><div class='ctx'> #define AC1_SC_QEBSM_ENABLED		0x01	/* enabled for subchannel */</div><div class='ctx'> </div><div class='add'>+#define CHSC_AC2_MULTI_BUFFER_AVAILABLE	0x0080</div><div class='add'>+#define CHSC_AC2_MULTI_BUFFER_ENABLED	0x0040</div><div class='ctx'> #define CHSC_AC2_DATA_DIV_AVAILABLE	0x0010</div><div class='ctx'> #define CHSC_AC2_DATA_DIV_ENABLED	0x0002</div><div class='ctx'> </div><div class='hunk'>@@ -328,11 +325,13 @@ typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,</div><div class='ctx'> 			    int, int, unsigned long);</div><div class='ctx'> </div><div class='ctx'> /* qdio errors reported to the upper-layer program */</div><div class='del'>-#define QDIO_ERROR_SIGA_TARGET			0x02</div><div class='del'>-#define QDIO_ERROR_SIGA_ACCESS_EXCEPTION	0x10</div><div class='del'>-#define QDIO_ERROR_SIGA_BUSY			0x20</div><div class='del'>-#define QDIO_ERROR_ACTIVATE_CHECK_CONDITION	0x40</div><div class='del'>-#define QDIO_ERROR_SLSB_STATE			0x80</div><div class='add'>+#define QDIO_ERROR_ACTIVATE			0x0001</div><div class='add'>+#define QDIO_ERROR_GET_BUF_STATE		0x0002</div><div class='add'>+#define QDIO_ERROR_SET_BUF_STATE		0x0004</div><div class='add'>+#define QDIO_ERROR_SLSB_STATE			0x0100</div><div class='add'>+</div><div class='add'>+#define QDIO_ERROR_FATAL			0x00ff</div><div class='add'>+#define QDIO_ERROR_TEMPORARY			0xff00</div><div class='ctx'> </div><div class='ctx'> /* for qdio_cleanup */</div><div class='ctx'> #define QDIO_FLAG_CLEANUP_USING_CLEAR		0x01</div><div class='head'>diff --git a/arch/s390/include/asm/rwsem.h b/arch/s390/include/asm/rwsem.h<br/>index d0eb4653cebd..1ceee10264c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/rwsem.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/rwsem.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/rwsem.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/rwsem.h</a></div><div class='hunk'>@@ -41,19 +41,17 @@</div><div class='ctx'> #error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define RWSEM_UNLOCKED_VALUE	0x00000000</div><div class='ctx'> #define RWSEM_ACTIVE_BIAS	0x00000001</div><div class='ctx'> #define RWSEM_ACTIVE_MASK	0x0000ffff</div><div class='ctx'> #define RWSEM_WAITING_BIAS	(-0x00010000)</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> #define RWSEM_UNLOCKED_VALUE	0x0000000000000000L</div><div class='ctx'> #define RWSEM_ACTIVE_BIAS	0x0000000000000001L</div><div class='ctx'> #define RWSEM_ACTIVE_MASK	0x00000000ffffffffL</div><div class='ctx'> #define RWSEM_WAITING_BIAS	(-0x0000000100000000L)</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> #define RWSEM_ACTIVE_READ_BIAS	RWSEM_ACTIVE_BIAS</div><div class='ctx'> #define RWSEM_ACTIVE_WRITE_BIAS	(RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)</div><div class='ctx'> </div><div class='hunk'>@@ -65,19 +63,19 @@ static inline void __down_read(struct rw_semaphore *sem)</div><div class='ctx'> 	signed long old, new;</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 		"	l	%0,%2\n"</div><div class='ctx'> 		"0:	lr	%1,%0\n"</div><div class='ctx'> 		"	ahi	%1,%4\n"</div><div class='ctx'> 		"	cs	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> 		"	lg	%0,%2\n"</div><div class='ctx'> 		"0:	lgr	%1,%0\n"</div><div class='ctx'> 		"	aghi	%1,%4\n"</div><div class='ctx'> 		"	csg	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> 		: "=&amp;d" (old), "=&amp;d" (new), "=Q" (sem-&gt;count)</div><div class='ctx'> 		: "Q" (sem-&gt;count), "i" (RWSEM_ACTIVE_READ_BIAS)</div><div class='ctx'> 		: "cc", "memory");</div><div class='hunk'>@@ -93,7 +91,7 @@ static inline int __down_read_trylock(struct rw_semaphore *sem)</div><div class='ctx'> 	signed long old, new;</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 		"	l	%0,%2\n"</div><div class='ctx'> 		"0:	ltr	%1,%0\n"</div><div class='ctx'> 		"	jm	1f\n"</div><div class='hunk'>@@ -101,7 +99,7 @@ static inline int __down_read_trylock(struct rw_semaphore *sem)</div><div class='ctx'> 		"	cs	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b\n"</div><div class='ctx'> 		"1:"</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> 		"	lg	%0,%2\n"</div><div class='ctx'> 		"0:	ltgr	%1,%0\n"</div><div class='ctx'> 		"	jm	1f\n"</div><div class='hunk'>@@ -109,7 +107,7 @@ static inline int __down_read_trylock(struct rw_semaphore *sem)</div><div class='ctx'> 		"	csg	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b\n"</div><div class='ctx'> 		"1:"</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> 		: "=&amp;d" (old), "=&amp;d" (new), "=Q" (sem-&gt;count)</div><div class='ctx'> 		: "Q" (sem-&gt;count), "i" (RWSEM_ACTIVE_READ_BIAS)</div><div class='ctx'> 		: "cc", "memory");</div><div class='hunk'>@@ -125,19 +123,19 @@ static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)</div><div class='ctx'> </div><div class='ctx'> 	tmp = RWSEM_ACTIVE_WRITE_BIAS;</div><div class='ctx'> 	asm volatile(</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 		"	l	%0,%2\n"</div><div class='ctx'> 		"0:	lr	%1,%0\n"</div><div class='ctx'> 		"	a	%1,%4\n"</div><div class='ctx'> 		"	cs	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> 		"	lg	%0,%2\n"</div><div class='ctx'> 		"0:	lgr	%1,%0\n"</div><div class='ctx'> 		"	ag	%1,%4\n"</div><div class='ctx'> 		"	csg	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> 		: "=&amp;d" (old), "=&amp;d" (new), "=Q" (sem-&gt;count)</div><div class='ctx'> 		: "Q" (sem-&gt;count), "m" (tmp)</div><div class='ctx'> 		: "cc", "memory");</div><div class='hunk'>@@ -158,19 +156,19 @@ static inline int __down_write_trylock(struct rw_semaphore *sem)</div><div class='ctx'> 	signed long old;</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 		"	l	%0,%1\n"</div><div class='ctx'> 		"0:	ltr	%0,%0\n"</div><div class='ctx'> 		"	jnz	1f\n"</div><div class='ctx'> 		"	cs	%0,%3,%1\n"</div><div class='ctx'> 		"	jl	0b\n"</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> 		"	lg	%0,%1\n"</div><div class='ctx'> 		"0:	ltgr	%0,%0\n"</div><div class='ctx'> 		"	jnz	1f\n"</div><div class='ctx'> 		"	csg	%0,%3,%1\n"</div><div class='ctx'> 		"	jl	0b\n"</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> 		"1:"</div><div class='ctx'> 		: "=&amp;d" (old), "=Q" (sem-&gt;count)</div><div class='ctx'> 		: "Q" (sem-&gt;count), "d" (RWSEM_ACTIVE_WRITE_BIAS)</div><div class='hunk'>@@ -186,19 +184,19 @@ static inline void __up_read(struct rw_semaphore *sem)</div><div class='ctx'> 	signed long old, new;</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 		"	l	%0,%2\n"</div><div class='ctx'> 		"0:	lr	%1,%0\n"</div><div class='ctx'> 		"	ahi	%1,%4\n"</div><div class='ctx'> 		"	cs	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> 		"	lg	%0,%2\n"</div><div class='ctx'> 		"0:	lgr	%1,%0\n"</div><div class='ctx'> 		"	aghi	%1,%4\n"</div><div class='ctx'> 		"	csg	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> 		: "=&amp;d" (old), "=&amp;d" (new), "=Q" (sem-&gt;count)</div><div class='ctx'> 		: "Q" (sem-&gt;count), "i" (-RWSEM_ACTIVE_READ_BIAS)</div><div class='ctx'> 		: "cc", "memory");</div><div class='hunk'>@@ -216,19 +214,19 @@ static inline void __up_write(struct rw_semaphore *sem)</div><div class='ctx'> </div><div class='ctx'> 	tmp = -RWSEM_ACTIVE_WRITE_BIAS;</div><div class='ctx'> 	asm volatile(</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 		"	l	%0,%2\n"</div><div class='ctx'> 		"0:	lr	%1,%0\n"</div><div class='ctx'> 		"	a	%1,%4\n"</div><div class='ctx'> 		"	cs	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> 		"	lg	%0,%2\n"</div><div class='ctx'> 		"0:	lgr	%1,%0\n"</div><div class='ctx'> 		"	ag	%1,%4\n"</div><div class='ctx'> 		"	csg	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> 		: "=&amp;d" (old), "=&amp;d" (new), "=Q" (sem-&gt;count)</div><div class='ctx'> 		: "Q" (sem-&gt;count), "m" (tmp)</div><div class='ctx'> 		: "cc", "memory");</div><div class='hunk'>@@ -246,19 +244,19 @@ static inline void __downgrade_write(struct rw_semaphore *sem)</div><div class='ctx'> </div><div class='ctx'> 	tmp = -RWSEM_WAITING_BIAS;</div><div class='ctx'> 	asm volatile(</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 		"	l	%0,%2\n"</div><div class='ctx'> 		"0:	lr	%1,%0\n"</div><div class='ctx'> 		"	a	%1,%4\n"</div><div class='ctx'> 		"	cs	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> 		"	lg	%0,%2\n"</div><div class='ctx'> 		"0:	lgr	%1,%0\n"</div><div class='ctx'> 		"	ag	%1,%4\n"</div><div class='ctx'> 		"	csg	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> 		: "=&amp;d" (old), "=&amp;d" (new), "=Q" (sem-&gt;count)</div><div class='ctx'> 		: "Q" (sem-&gt;count), "m" (tmp)</div><div class='ctx'> 		: "cc", "memory");</div><div class='hunk'>@@ -274,19 +272,19 @@ static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)</div><div class='ctx'> 	signed long old, new;</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 		"	l	%0,%2\n"</div><div class='ctx'> 		"0:	lr	%1,%0\n"</div><div class='ctx'> 		"	ar	%1,%4\n"</div><div class='ctx'> 		"	cs	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> 		"	lg	%0,%2\n"</div><div class='ctx'> 		"0:	lgr	%1,%0\n"</div><div class='ctx'> 		"	agr	%1,%4\n"</div><div class='ctx'> 		"	csg	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> 		: "=&amp;d" (old), "=&amp;d" (new), "=Q" (sem-&gt;count)</div><div class='ctx'> 		: "Q" (sem-&gt;count), "d" (delta)</div><div class='ctx'> 		: "cc", "memory");</div><div class='hunk'>@@ -300,24 +298,23 @@ static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)</div><div class='ctx'> 	signed long old, new;</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 		"	l	%0,%2\n"</div><div class='ctx'> 		"0:	lr	%1,%0\n"</div><div class='ctx'> 		"	ar	%1,%4\n"</div><div class='ctx'> 		"	cs	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> 		"	lg	%0,%2\n"</div><div class='ctx'> 		"0:	lgr	%1,%0\n"</div><div class='ctx'> 		"	agr	%1,%4\n"</div><div class='ctx'> 		"	csg	%0,%1,%2\n"</div><div class='ctx'> 		"	jl	0b"</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> 		: "=&amp;d" (old), "=&amp;d" (new), "=Q" (sem-&gt;count)</div><div class='ctx'> 		: "Q" (sem-&gt;count), "d" (delta)</div><div class='ctx'> 		: "cc", "memory");</div><div class='ctx'> 	return new;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _S390_RWSEM_H */</div><div class='head'>diff --git a/arch/s390/include/asm/sclp.h b/arch/s390/include/asm/sclp.h<br/>index fed7bee650a0..bf238c55740b 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/sclp.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/sclp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/sclp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/sclp.h</a></div><div class='hunk'>@@ -48,6 +48,7 @@ int sclp_cpu_deconfigure(u8 cpu);</div><div class='ctx'> void sclp_facilities_detect(void);</div><div class='ctx'> unsigned long long sclp_get_rnmax(void);</div><div class='ctx'> unsigned long long sclp_get_rzm(void);</div><div class='add'>+u8 sclp_get_fac85(void);</div><div class='ctx'> int sclp_sdias_blk_count(void);</div><div class='ctx'> int sclp_sdias_copy(void *dest, int blk_num, int nr_blks);</div><div class='ctx'> int sclp_chp_configure(struct chp_id chpid);</div><div class='head'>diff --git a/arch/s390/include/asm/setup.h b/arch/s390/include/asm/setup.h<br/>index b21e46e5d4b8..40eb2ff88e9e 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/setup.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/setup.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/setup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/setup.h</a></div><div class='hunk'>@@ -22,19 +22,19 @@</div><div class='ctx'> #include &lt;asm/lowcore.h&gt;</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define IPL_DEVICE        (*(unsigned long *)  (0x10404))</div><div class='ctx'> #define INITRD_START      (*(unsigned long *)  (0x1040C))</div><div class='ctx'> #define INITRD_SIZE       (*(unsigned long *)  (0x10414))</div><div class='ctx'> #define OLDMEM_BASE	  (*(unsigned long *)  (0x1041C))</div><div class='ctx'> #define OLDMEM_SIZE	  (*(unsigned long *)  (0x10424))</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> #define IPL_DEVICE        (*(unsigned long *)  (0x10400))</div><div class='ctx'> #define INITRD_START      (*(unsigned long *)  (0x10408))</div><div class='ctx'> #define INITRD_SIZE       (*(unsigned long *)  (0x10410))</div><div class='ctx'> #define OLDMEM_BASE	  (*(unsigned long *)  (0x10418))</div><div class='ctx'> #define OLDMEM_SIZE	  (*(unsigned long *)  (0x10420))</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> #define COMMAND_LINE      ((char *)            (0x10480))</div><div class='ctx'> </div><div class='ctx'> #define CHUNK_READ_WRITE 0</div><div class='hunk'>@@ -82,7 +82,6 @@ extern unsigned int user_mode;</div><div class='ctx'> #define MACHINE_FLAG_LPAR	(1UL &lt;&lt; 12)</div><div class='ctx'> #define MACHINE_FLAG_SPP	(1UL &lt;&lt; 13)</div><div class='ctx'> #define MACHINE_FLAG_TOPOLOGY	(1UL &lt;&lt; 14)</div><div class='del'>-#define MACHINE_FLAG_STCKF	(1UL &lt;&lt; 15)</div><div class='ctx'> </div><div class='ctx'> #define MACHINE_IS_VM		(S390_lowcore.machine_flags &amp; MACHINE_FLAG_VM)</div><div class='ctx'> #define MACHINE_IS_KVM		(S390_lowcore.machine_flags &amp; MACHINE_FLAG_KVM)</div><div class='hunk'>@@ -90,7 +89,7 @@ extern unsigned int user_mode;</div><div class='ctx'> </div><div class='ctx'> #define MACHINE_HAS_DIAG9C	(S390_lowcore.machine_flags &amp; MACHINE_FLAG_DIAG9C)</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define MACHINE_HAS_IEEE	(S390_lowcore.machine_flags &amp; MACHINE_FLAG_IEEE)</div><div class='ctx'> #define MACHINE_HAS_CSP		(S390_lowcore.machine_flags &amp; MACHINE_FLAG_CSP)</div><div class='ctx'> #define MACHINE_HAS_IDTE	(0)</div><div class='hunk'>@@ -101,8 +100,7 @@ extern unsigned int user_mode;</div><div class='ctx'> #define MACHINE_HAS_PFMF	(0)</div><div class='ctx'> #define MACHINE_HAS_SPP		(0)</div><div class='ctx'> #define MACHINE_HAS_TOPOLOGY	(0)</div><div class='del'>-#define MACHINE_HAS_STCKF	(0)</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> #define MACHINE_HAS_IEEE	(1)</div><div class='ctx'> #define MACHINE_HAS_CSP		(1)</div><div class='ctx'> #define MACHINE_HAS_IDTE	(S390_lowcore.machine_flags &amp; MACHINE_FLAG_IDTE)</div><div class='hunk'>@@ -113,8 +111,7 @@ extern unsigned int user_mode;</div><div class='ctx'> #define MACHINE_HAS_PFMF	(S390_lowcore.machine_flags &amp; MACHINE_FLAG_PFMF)</div><div class='ctx'> #define MACHINE_HAS_SPP		(S390_lowcore.machine_flags &amp; MACHINE_FLAG_SPP)</div><div class='ctx'> #define MACHINE_HAS_TOPOLOGY	(S390_lowcore.machine_flags &amp; MACHINE_FLAG_TOPOLOGY)</div><div class='del'>-#define MACHINE_HAS_STCKF	(S390_lowcore.machine_flags &amp; MACHINE_FLAG_STCKF)</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define ZFCPDUMP_HSA_SIZE	(32UL&lt;&lt;20)</div><div class='ctx'> #define ZFCPDUMP_HSA_SIZE_MAX	(64UL&lt;&lt;20)</div><div class='hunk'>@@ -156,19 +153,19 @@ extern void (*_machine_power_off)(void);</div><div class='ctx'> </div><div class='ctx'> #else /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define IPL_DEVICE        0x10404</div><div class='ctx'> #define INITRD_START      0x1040C</div><div class='ctx'> #define INITRD_SIZE       0x10414</div><div class='ctx'> #define OLDMEM_BASE	  0x1041C</div><div class='ctx'> #define OLDMEM_SIZE	  0x10424</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> #define IPL_DEVICE        0x10400</div><div class='ctx'> #define INITRD_START      0x10408</div><div class='ctx'> #define INITRD_SIZE       0x10410</div><div class='ctx'> #define OLDMEM_BASE	  0x10418</div><div class='ctx'> #define OLDMEM_SIZE	  0x10420</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> #define COMMAND_LINE      0x10480</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='head'>diff --git a/arch/s390/include/asm/sfp-util.h b/arch/s390/include/asm/sfp-util.h<br/>index ca3f8814e361..5959bfb3b693 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/sfp-util.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/sfp-util.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/sfp-util.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/sfp-util.h</a></div><div class='hunk'>@@ -51,7 +51,7 @@</div><div class='ctx'> 	wl = __wl;					\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> #define udiv_qrnnd(q, r, n1, n0, d)			\</div><div class='ctx'>   do { unsigned long __n;				\</div><div class='ctx'>        unsigned int __r, __d;				\</div><div class='head'>diff --git a/arch/s390/include/asm/smp.h b/arch/s390/include/asm/smp.h<br/>index c77c6de6f6c0..0b6f586c1383 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/smp.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/smp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/smp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/smp.h</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> extern struct mutex smp_cpu_state_mutex;</div><div class='ctx'> extern struct save_area *zfcpdump_save_areas[NR_CPUS + 1];</div><div class='ctx'> </div><div class='del'>-extern int __cpu_up(unsigned int cpu);</div><div class='add'>+extern int __cpu_up(unsigned int cpu, struct task_struct *tidle);</div><div class='ctx'> </div><div class='ctx'> extern void arch_send_call_function_single_ipi(int cpu);</div><div class='ctx'> extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);</div><div class='head'>diff --git a/arch/s390/include/asm/string.h b/arch/s390/include/asm/string.h<br/>index cd0241db5a46..8cc160c9e1cb 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/string.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/string.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/string.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/string.h</a></div><div class='hunk'>@@ -9,8 +9,6 @@</div><div class='ctx'> #ifndef _S390_STRING_H_</div><div class='ctx'> #define _S390_STRING_H_</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='ctx'> #ifndef _LINUX_TYPES_H</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -152,6 +150,4 @@ size_t strlen(const char *s);</div><div class='ctx'> size_t strnlen(const char * s, size_t n);</div><div class='ctx'> #endif /* !IN_ARCH_STRING_C */</div><div class='ctx'> </div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-</div><div class='ctx'> #endif /* __S390_STRING_H_ */</div><div class='head'>diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h<br/>index a73038155e0d..4e40b25cd060 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/thread_info.h</a></div><div class='hunk'>@@ -9,15 +9,13 @@</div><div class='ctx'> #ifndef _ASM_THREAD_INFO_H</div><div class='ctx'> #define _ASM_THREAD_INFO_H</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Size of kernel stack for each process</div><div class='ctx'>  */</div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define THREAD_ORDER 1</div><div class='ctx'> #define ASYNC_ORDER  1</div><div class='del'>-#else /* __s390x__ */</div><div class='add'>+#else /* CONFIG_64BIT */</div><div class='ctx'> #ifndef __SMALL_STACK</div><div class='ctx'> #define THREAD_ORDER 2</div><div class='ctx'> #define ASYNC_ORDER  2</div><div class='hunk'>@@ -25,7 +23,7 @@</div><div class='ctx'> #define THREAD_ORDER 1</div><div class='ctx'> #define ASYNC_ORDER  1</div><div class='ctx'> #endif</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> #define THREAD_SIZE (PAGE_SIZE &lt;&lt; THREAD_ORDER)</div><div class='ctx'> #define ASYNC_SIZE  (PAGE_SIZE &lt;&lt; ASYNC_ORDER)</div><div class='hunk'>@@ -95,7 +93,6 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> #define TIF_SYSCALL_AUDIT	9	/* syscall auditing active */</div><div class='ctx'> #define TIF_SECCOMP		10	/* secure computing */</div><div class='ctx'> #define TIF_SYSCALL_TRACEPOINT	11	/* syscall tracepoint instrumentation */</div><div class='del'>-#define TIF_SIE			12	/* guest execution active */</div><div class='ctx'> #define TIF_POLLING_NRFLAG	16	/* true if poll_idle() is polling</div><div class='ctx'> 					   TIF_NEED_RESCHED */</div><div class='ctx'> #define TIF_31BIT		17	/* 32bit process */</div><div class='hunk'>@@ -114,7 +111,6 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> #define _TIF_SYSCALL_AUDIT	(1&lt;&lt;TIF_SYSCALL_AUDIT)</div><div class='ctx'> #define _TIF_SECCOMP		(1&lt;&lt;TIF_SECCOMP)</div><div class='ctx'> #define _TIF_SYSCALL_TRACEPOINT	(1&lt;&lt;TIF_SYSCALL_TRACEPOINT)</div><div class='del'>-#define _TIF_SIE		(1&lt;&lt;TIF_SIE)</div><div class='ctx'> #define _TIF_POLLING_NRFLAG	(1&lt;&lt;TIF_POLLING_NRFLAG)</div><div class='ctx'> #define _TIF_31BIT		(1&lt;&lt;TIF_31BIT)</div><div class='ctx'> #define _TIF_SINGLE_STEP	(1&lt;&lt;TIF_SINGLE_STEP)</div><div class='hunk'>@@ -125,8 +121,6 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> #define is_32bit_task()		(1)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-</div><div class='ctx'> #define PREEMPT_ACTIVE		0x4000000</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_THREAD_INFO_H */</div><div class='head'>diff --git a/arch/s390/include/asm/timer.h b/arch/s390/include/asm/timer.h<br/>index e63069ba39e3..15d647901e5c 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/timer.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/timer.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/timer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/timer.h</a></div><div class='hunk'>@@ -10,8 +10,6 @@</div><div class='ctx'> #ifndef _ASM_S390_TIMER_H</div><div class='ctx'> #define _ASM_S390_TIMER_H</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='ctx'> #include &lt;linux/timer.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define VTIMER_MAX_SLICE (0x7ffffffffffff000LL)</div><div class='hunk'>@@ -50,6 +48,4 @@ extern void vtime_init(void);</div><div class='ctx'> extern void vtime_stop_cpu(void);</div><div class='ctx'> extern void vtime_start_leave(void);</div><div class='ctx'> </div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-</div><div class='ctx'> #endif /* _ASM_S390_TIMER_H */</div><div class='head'>diff --git a/arch/s390/include/asm/timex.h b/arch/s390/include/asm/timex.h<br/>index c447a27a7fdb..239ece9e53c1 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/timex.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/timex.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/timex.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/timex.h</a></div><div class='hunk'>@@ -73,11 +73,15 @@ static inline void local_tick_enable(unsigned long long comp)</div><div class='ctx'> </div><div class='ctx'> typedef unsigned long long cycles_t;</div><div class='ctx'> </div><div class='del'>-static inline unsigned long long get_clock (void)</div><div class='add'>+static inline unsigned long long get_clock(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long clk;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES</div><div class='add'>+	asm volatile(".insn s,0xb27c0000,%0" : "=Q" (clk) : : "cc");</div><div class='add'>+#else</div><div class='ctx'> 	asm volatile("stck %0" : "=Q" (clk) : : "cc");</div><div class='add'>+#endif</div><div class='ctx'> 	return clk;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -86,17 +90,6 @@ static inline void get_clock_ext(char *clk)</div><div class='ctx'> 	asm volatile("stcke %0" : "=Q" (*clk) : : "cc");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long long get_clock_fast(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long long clk;</div><div class='del'>-</div><div class='del'>-	if (MACHINE_HAS_STCKF)</div><div class='del'>-		asm volatile(".insn	s,0xb27c0000,%0" : "=Q" (clk) : : "cc");</div><div class='del'>-	else</div><div class='del'>-		clk = get_clock();</div><div class='del'>-	return clk;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline unsigned long long get_clock_xt(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char clk[16];</div><div class='head'>diff --git a/arch/s390/include/asm/tlb.h b/arch/s390/include/asm/tlb.h<br/>index 775a5eea8f9e..06e5acbc84bd 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/tlb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/tlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/tlb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/tlb.h</a></div><div class='hunk'>@@ -106,7 +106,7 @@ static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,</div><div class='ctx'> static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,</div><div class='ctx'> 				unsigned long address)</div><div class='ctx'> {</div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> 	if (tlb-&gt;mm-&gt;context.asce_limit &lt;= (1UL &lt;&lt; 31))</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (!tlb-&gt;fullmm)</div><div class='hunk'>@@ -125,7 +125,7 @@ static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,</div><div class='ctx'> static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,</div><div class='ctx'> 				unsigned long address)</div><div class='ctx'> {</div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> 	if (tlb-&gt;mm-&gt;context.asce_limit &lt;= (1UL &lt;&lt; 42))</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (!tlb-&gt;fullmm)</div><div class='head'>diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h<br/>index 1d8648cf2fea..9fde315f3a7c 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/tlbflush.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/tlbflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/tlbflush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/tlbflush.h</a></div><div class='hunk'>@@ -27,12 +27,12 @@ static inline void __tlb_flush_global(void)</div><div class='ctx'> 	register unsigned long reg4 asm("4");</div><div class='ctx'> 	long dummy;</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 	if (!MACHINE_HAS_CSP) {</div><div class='ctx'> 		smp_ptlb_all();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-#endif /* __s390x__ */</div><div class='add'>+#endif /* CONFIG_64BIT */</div><div class='ctx'> </div><div class='ctx'> 	dummy = 0;</div><div class='ctx'> 	reg2 = reg3 = 0;</div><div class='head'>diff --git a/arch/s390/include/asm/types.h b/arch/s390/include/asm/types.h<br/>index 05ebbcdbbf6b..6c8c35f8df14 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/types.h</a></div><div class='hunk'>@@ -28,7 +28,7 @@ typedef __signed__ long saddr_t;</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> typedef union {</div><div class='ctx'> 	unsigned long long pair;</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -37,7 +37,7 @@ typedef union {</div><div class='ctx'> 	} subreg;</div><div class='ctx'> } register_pair;</div><div class='ctx'> </div><div class='del'>-#endif /* ! __s390x__   */</div><div class='add'>+#endif /* ! CONFIG_64BIT   */</div><div class='ctx'> #endif /* __ASSEMBLY__  */</div><div class='ctx'> #endif /* __KERNEL__    */</div><div class='ctx'> #endif /* _S390_TYPES_H */</div><div class='head'>diff --git a/arch/s390/include/asm/uaccess.h b/arch/s390/include/asm/uaccess.h<br/>index 8f2cada4f7c9..1f3a79bcd262 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/uaccess.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/uaccess.h</a></div><div class='hunk'>@@ -50,10 +50,15 @@</div><div class='ctx'> </div><div class='ctx'> #define segment_eq(a,b) ((a).ar4 == (b).ar4)</div><div class='ctx'> </div><div class='del'>-#define __access_ok(addr, size)	\</div><div class='del'>-({				\</div><div class='del'>-	__chk_user_ptr(addr);	\</div><div class='del'>-	1;			\</div><div class='add'>+static inline int __range_ok(unsigned long addr, unsigned long size)</div><div class='add'>+{</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define __access_ok(addr, size)				\</div><div class='add'>+({							\</div><div class='add'>+	__chk_user_ptr(addr);				\</div><div class='add'>+	__range_ok((unsigned long)(addr), (size));	\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> #define access_ok(type, addr, size) __access_ok(addr, size)</div><div class='hunk'>@@ -377,7 +382,7 @@ clear_user(void __user *to, unsigned long n)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern int memcpy_real(void *, void *, size_t);</div><div class='del'>-extern void copy_to_absolute_zero(void *dest, void *src, size_t count);</div><div class='add'>+extern void memcpy_absolute(void *, void *, size_t);</div><div class='ctx'> extern int copy_to_user_real(void __user *dest, void *src, size_t count);</div><div class='ctx'> extern int copy_from_user_real(void *dest, void __user *src, size_t count);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/include/asm/vdso.h b/arch/s390/include/asm/vdso.h<br/>index c4a11cfad3c8..a73eb2e1e918 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/include/asm/vdso.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/include/asm/vdso.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/include/asm/vdso.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/include/asm/vdso.h</a></div><div class='hunk'>@@ -1,8 +1,6 @@</div><div class='ctx'> #ifndef __S390_VDSO_H__</div><div class='ctx'> #define __S390_VDSO_H__</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='ctx'> /* Default link addresses for the vDSOs */</div><div class='ctx'> #define VDSO32_LBASE	0</div><div class='ctx'> #define VDSO64_LBASE	0</div><div class='hunk'>@@ -45,7 +43,4 @@ void vdso_free_per_cpu(struct _lowcore *lowcore);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='del'>-</div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-</div><div class='ctx'> #endif /* __S390_VDSO_H__ */</div><div class='head'>diff --git a/arch/s390/kernel/.gitignore b/arch/s390/kernel/.gitignore<br/>new file mode 100644<br/>index 000000000000..c5f676c3c224<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/.gitignore</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+vmlinux.lds</div><div class='head'>diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile<br/>index 884b18afc864..9733b3f0eb6d 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/Makefile</a></div><div class='hunk'>@@ -28,7 +28,7 @@ obj-y	:=  bitmap.o traps.o time.o process.o base.o early.o setup.o vtime.o \</div><div class='ctx'> obj-y	+= $(if $(CONFIG_64BIT),entry64.o,entry.o)</div><div class='ctx'> obj-y	+= $(if $(CONFIG_64BIT),reipl64.o,reipl.o)</div><div class='ctx'> </div><div class='del'>-extra-y				+= head.o init_task.o vmlinux.lds</div><div class='add'>+extra-y				+= head.o vmlinux.lds</div><div class='ctx'> extra-y				+= $(if $(CONFIG_64BIT),head64.o,head31.o)</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_MODULES)		+= s390_ksyms.o module.o</div><div class='head'>diff --git a/arch/s390/kernel/base.S b/arch/s390/kernel/base.S<br/>index 3aa4d00aaf50..c880ff72db44 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/base.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/base.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/base.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/base.S</a></div><div class='hunk'>@@ -88,6 +88,9 @@ ENTRY(diag308_reset)</div><div class='ctx'> 	stctg	%c0,%c15,0(%r4)</div><div class='ctx'> 	larl	%r4,.Lfpctl		# Floating point control register</div><div class='ctx'> 	stfpc	0(%r4)</div><div class='add'>+	larl	%r4,.Lcontinue_psw	# Save PSW flags</div><div class='add'>+	epsw	%r2,%r3</div><div class='add'>+	stm	%r2,%r3,0(%r4)</div><div class='ctx'> 	larl	%r4,.Lrestart_psw	# Setup restart PSW at absolute 0</div><div class='ctx'> 	lghi	%r3,0</div><div class='ctx'> 	lg	%r4,0(%r4)		# Save PSW</div><div class='hunk'>@@ -103,11 +106,20 @@ ENTRY(diag308_reset)</div><div class='ctx'> 	lctlg	%c0,%c15,0(%r4)</div><div class='ctx'> 	larl	%r4,.Lfpctl		# Restore floating point ctl register</div><div class='ctx'> 	lfpc	0(%r4)</div><div class='add'>+	larl	%r4,.Lcontinue_psw	# Restore PSW flags</div><div class='add'>+	lpswe	0(%r4)</div><div class='add'>+.Lcontinue:</div><div class='ctx'> 	br	%r14</div><div class='ctx'> .align 16</div><div class='ctx'> .Lrestart_psw:</div><div class='ctx'> 	.long	0x00080000,0x80000000 + .Lrestart_part2</div><div class='ctx'> </div><div class='add'>+	.section .data..nosave,"aw",@progbits</div><div class='add'>+.align 8</div><div class='add'>+.Lcontinue_psw:</div><div class='add'>+	.quad	0,.Lcontinue</div><div class='add'>+	.previous</div><div class='add'>+</div><div class='ctx'> 	.section .bss</div><div class='ctx'> .align 8</div><div class='ctx'> .Lctlregs:</div><div class='head'>diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c<br/>index ab64bdbab2ae..65426525d9f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/compat_linux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/compat_linux.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/compat_linux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/compat_linux.c</a></div><div class='hunk'>@@ -173,11 +173,14 @@ asmlinkage long sys32_setfsgid16(u16 gid)</div><div class='ctx'> </div><div class='ctx'> static int groups16_to_user(u16 __user *grouplist, struct group_info *group_info)</div><div class='ctx'> {</div><div class='add'>+	struct user_namespace *user_ns = current_user_ns();</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u16 group;</div><div class='add'>+	kgid_t kgid;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; group_info-&gt;ngroups; i++) {</div><div class='del'>-		group = (u16)GROUP_AT(group_info, i);</div><div class='add'>+		kgid = GROUP_AT(group_info, i);</div><div class='add'>+		group = (u16)from_kgid_munged(user_ns, kgid);</div><div class='ctx'> 		if (put_user(group, grouplist+i))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -187,13 +190,20 @@ static int groups16_to_user(u16 __user *grouplist, struct group_info *group_info</div><div class='ctx'> </div><div class='ctx'> static int groups16_from_user(struct group_info *group_info, u16 __user *grouplist)</div><div class='ctx'> {</div><div class='add'>+	struct user_namespace *user_ns = current_user_ns();</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u16 group;</div><div class='add'>+	kgid_t kgid;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; group_info-&gt;ngroups; i++) {</div><div class='ctx'> 		if (get_user(group, grouplist+i))</div><div class='ctx'> 			return  -EFAULT;</div><div class='del'>-		GROUP_AT(group_info, i) = (gid_t)group;</div><div class='add'>+</div><div class='add'>+		kgid = make_kgid(user_ns, (gid_t)group);</div><div class='add'>+		if (!gid_valid(kgid))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		GROUP_AT(group_info, i) = kgid;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -537,8 +547,8 @@ static int cp_stat64(struct stat64_emu31 __user *ubuf, struct kstat *stat)</div><div class='ctx'> 	tmp.__st_ino = (u32)stat-&gt;ino;</div><div class='ctx'> 	tmp.st_mode = stat-&gt;mode;</div><div class='ctx'> 	tmp.st_nlink = (unsigned int)stat-&gt;nlink;</div><div class='del'>-	tmp.st_uid = stat-&gt;uid;</div><div class='del'>-	tmp.st_gid = stat-&gt;gid;</div><div class='add'>+	tmp.st_uid = from_kuid_munged(current_user_ns(), stat-&gt;uid);</div><div class='add'>+	tmp.st_gid = from_kgid_munged(current_user_ns(), stat-&gt;gid);</div><div class='ctx'> 	tmp.st_rdev = huge_encode_dev(stat-&gt;rdev);</div><div class='ctx'> 	tmp.st_size = stat-&gt;size;</div><div class='ctx'> 	tmp.st_blksize = (u32)stat-&gt;blksize;</div><div class='head'>diff --git a/arch/s390/kernel/compat_signal.c b/arch/s390/kernel/compat_signal.c<br/>index 28040fd5e8a2..3c0c19830c37 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/compat_signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/compat_signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/compat_signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/compat_signal.c</a></div><div class='hunk'>@@ -32,8 +32,6 @@</div><div class='ctx'> #include "compat_ptrace.h"</div><div class='ctx'> #include "entry.h"</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> typedef struct </div><div class='ctx'> {</div><div class='ctx'> 	__u8 callee_used_stack[__SIGNAL_FRAMESIZE32];</div><div class='hunk'>@@ -364,7 +362,6 @@ asmlinkage long sys32_sigreturn(void)</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> 	if (__copy_from_user(&amp;set.sig, &amp;frame-&gt;sc.oldmask, _SIGMASK_COPY_SIZE32))</div><div class='ctx'> 		goto badframe;</div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> 	if (restore_sigregs32(regs, &amp;frame-&gt;sregs))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -390,7 +387,6 @@ asmlinkage long sys32_rt_sigreturn(void)</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> 	if (restore_sigregs32(regs, &amp;frame-&gt;uc.uc_mcontext))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -437,13 +433,6 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs * regs, size_t frame_size)</div><div class='ctx'> 			sp = current-&gt;sas_ss_sp + current-&gt;sas_ss_size;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* This is the legacy signal stack switching. */</div><div class='del'>-	else if (!user_mode(regs) &amp;&amp;</div><div class='del'>-		 !(ka-&gt;sa.sa_flags &amp; SA_RESTORER) &amp;&amp;</div><div class='del'>-		 ka-&gt;sa.sa_restorer) {</div><div class='del'>-		sp = (unsigned long) ka-&gt;sa.sa_restorer;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return (void __user *)((sp - frame_size) &amp; -8ul);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -579,7 +568,7 @@ give_sigsegv:</div><div class='ctx'>  * OK, we're invoking a handler</div><div class='ctx'>  */	</div><div class='ctx'> </div><div class='del'>-int handle_signal32(unsigned long sig, struct k_sigaction *ka,</div><div class='add'>+void handle_signal32(unsigned long sig, struct k_sigaction *ka,</div><div class='ctx'> 		    siginfo_t *info, sigset_t *oldset, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -590,8 +579,8 @@ int handle_signal32(unsigned long sig, struct k_sigaction *ka,</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = setup_frame32(sig, ka, oldset, regs);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-	block_sigmask(ka, sig);</div><div class='del'>-	return 0;</div><div class='add'>+		return;</div><div class='add'>+	signal_delivered(sig, info, ka, regs,</div><div class='add'>+				 test_thread_flag(TIF_SINGLE_STEP));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c<br/>index 9475e682727f..6684fff17558 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/early.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/early.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/early.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/early.c</a></div><div class='hunk'>@@ -237,7 +237,7 @@ static noinline __init void detect_machine_type(void)</div><div class='ctx'> 		S390_lowcore.machine_flags |= MACHINE_FLAG_VM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __init void early_pgm_check_handler(void)</div><div class='add'>+static void early_pgm_check_handler(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long addr;</div><div class='ctx'> 	const struct exception_table_entry *fixup;</div><div class='hunk'>@@ -374,8 +374,6 @@ static __init void detect_machine_facilities(void)</div><div class='ctx'> 		S390_lowcore.machine_flags |= MACHINE_FLAG_MVCOS;</div><div class='ctx'> 	if (test_facility(40))</div><div class='ctx'> 		S390_lowcore.machine_flags |= MACHINE_FLAG_SPP;</div><div class='del'>-	if (test_facility(25))</div><div class='del'>-		S390_lowcore.machine_flags |= MACHINE_FLAG_STCKF;</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S<br/>index 74ee563fe62b..1ae93b573d7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/entry.S</a></div><div class='hunk'>@@ -145,22 +145,23 @@ STACK_SIZE  = 1 &lt;&lt; STACK_SHIFT</div><div class='ctx'>  *  gpr2 = prev</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(__switch_to)</div><div class='add'>+	stm	%r6,%r15,__SF_GPRS(%r15)	# store gprs of prev task</div><div class='add'>+	st	%r15,__THREAD_ksp(%r2)		# store kernel stack of prev</div><div class='ctx'> 	l	%r4,__THREAD_info(%r2)		# get thread_info of prev</div><div class='ctx'> 	l	%r5,__THREAD_info(%r3)		# get thread_info of next</div><div class='add'>+	lr	%r15,%r5</div><div class='add'>+	ahi	%r15,STACK_SIZE			# end of kernel stack of next</div><div class='add'>+	st	%r3,__LC_CURRENT		# store task struct of next</div><div class='add'>+	st	%r5,__LC_THREAD_INFO		# store thread info of next</div><div class='add'>+	st	%r15,__LC_KERNEL_STACK		# store end of kernel stack</div><div class='add'>+	lctl	%c4,%c4,__TASK_pid(%r3)		# load pid to control reg. 4</div><div class='add'>+	mvc	__LC_CURRENT_PID(4,%r0),__TASK_pid(%r3)	# store pid of next</div><div class='add'>+	l	%r15,__THREAD_ksp(%r3)		# load kernel stack of next</div><div class='ctx'> 	tm	__TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?</div><div class='ctx'> 	jz	0f</div><div class='ctx'> 	ni	__TI_flags+3(%r4),255-_TIF_MCCK_PENDING	# clear flag in prev</div><div class='ctx'> 	oi	__TI_flags+3(%r5),_TIF_MCCK_PENDING	# set it in next</div><div class='del'>-0:	stm	%r6,%r15,__SF_GPRS(%r15)	# store gprs of prev task</div><div class='del'>-	st	%r15,__THREAD_ksp(%r2)		# store kernel stack of prev</div><div class='del'>-	l	%r15,__THREAD_ksp(%r3)		# load kernel stack of next</div><div class='del'>-	lctl	%c4,%c4,__TASK_pid(%r3)		# load pid to control reg. 4</div><div class='del'>-	lm	%r6,%r15,__SF_GPRS(%r15)	# load gprs of next task</div><div class='del'>-	st	%r3,__LC_CURRENT		# store task struct of next</div><div class='del'>-	mvc	__LC_CURRENT_PID(4,%r0),__TASK_pid(%r3)	# store pid of next</div><div class='del'>-	st	%r5,__LC_THREAD_INFO		# store thread info of next</div><div class='del'>-	ahi	%r5,STACK_SIZE			# end of kernel stack of next</div><div class='del'>-	st	%r5,__LC_KERNEL_STACK		# store end of kernel stack</div><div class='add'>+0:	lm	%r6,%r15,__SF_GPRS(%r15)	# load gprs of next task</div><div class='ctx'> 	br	%r14</div><div class='ctx'> </div><div class='ctx'> __critical_start:</div><div class='head'>diff --git a/arch/s390/kernel/entry.h b/arch/s390/kernel/entry.h<br/>index 6cdddac93a2e..f66a229ab0b3 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/entry.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/entry.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/entry.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/entry.h</a></div><div class='hunk'>@@ -31,7 +31,7 @@ void do_per_trap(struct pt_regs *regs);</div><div class='ctx'> void syscall_trace(struct pt_regs *regs, int entryexit);</div><div class='ctx'> void kernel_stack_overflow(struct pt_regs * regs);</div><div class='ctx'> void do_signal(struct pt_regs *regs);</div><div class='del'>-int handle_signal32(unsigned long sig, struct k_sigaction *ka,</div><div class='add'>+void handle_signal32(unsigned long sig, struct k_sigaction *ka,</div><div class='ctx'> 		    siginfo_t *info, sigset_t *oldset, struct pt_regs *regs);</div><div class='ctx'> void do_notify_resume(struct pt_regs *regs);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S<br/>index 4e1c292fa7e3..229fe1d07749 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/entry64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/entry64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/entry64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/entry64.S</a></div><div class='hunk'>@@ -81,16 +81,14 @@ _TIF_EXIT_SIE = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING)</div><div class='ctx'> </div><div class='ctx'> 	.macro	HANDLE_SIE_INTERCEPT scratch</div><div class='ctx'> #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)</div><div class='del'>-	tm	__TI_flags+6(%r12),_TIF_SIE&gt;&gt;8</div><div class='del'>-	jz	.+42</div><div class='del'>-	tm	__LC_MACHINE_FLAGS+6,0x20	# MACHINE_FLAG_SPP</div><div class='del'>-	jz	.+8</div><div class='del'>-	.insn	s,0xb2800000,BASED(.Lhost_id)	# set host id</div><div class='add'>+	tmhh	%r8,0x0001		# interrupting from user ?</div><div class='add'>+	jnz	.+42</div><div class='ctx'> 	lgr	\scratch,%r9</div><div class='ctx'> 	slg	\scratch,BASED(.Lsie_loop)</div><div class='ctx'> 	clg	\scratch,BASED(.Lsie_length)</div><div class='del'>-	jhe	.+10</div><div class='add'>+	jhe	.+22</div><div class='ctx'> 	lg	%r9,BASED(.Lsie_loop)</div><div class='add'>+	SPP	BASED(.Lhost_id)	# set host id</div><div class='ctx'> #endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='hunk'>@@ -148,6 +146,14 @@ _TIF_EXIT_SIE = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING)</div><div class='ctx'> 	ssm	__LC_RETURN_PSW</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='add'>+	.macro STCK savearea</div><div class='add'>+#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES</div><div class='add'>+	.insn	s,0xb27c0000,\savearea		# store clock fast</div><div class='add'>+#else</div><div class='add'>+	.insn	s,0xb2050000,\savearea		# store clock</div><div class='add'>+#endif</div><div class='add'>+	.endm</div><div class='add'>+</div><div class='ctx'> 	.section .kprobes.text, "ax"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -158,22 +164,23 @@ _TIF_EXIT_SIE = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING)</div><div class='ctx'>  *  gpr2 = prev</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(__switch_to)</div><div class='add'>+	stmg	%r6,%r15,__SF_GPRS(%r15)	# store gprs of prev task</div><div class='add'>+	stg	%r15,__THREAD_ksp(%r2)		# store kernel stack of prev</div><div class='ctx'> 	lg	%r4,__THREAD_info(%r2)		# get thread_info of prev</div><div class='ctx'> 	lg	%r5,__THREAD_info(%r3)		# get thread_info of next</div><div class='add'>+	lgr	%r15,%r5</div><div class='add'>+	aghi	%r15,STACK_SIZE			# end of kernel stack of next</div><div class='add'>+	stg	%r3,__LC_CURRENT		# store task struct of next</div><div class='add'>+	stg	%r5,__LC_THREAD_INFO		# store thread info of next</div><div class='add'>+	stg	%r15,__LC_KERNEL_STACK		# store end of kernel stack</div><div class='add'>+	lctl	%c4,%c4,__TASK_pid(%r3)		# load pid to control reg. 4</div><div class='add'>+	mvc	__LC_CURRENT_PID+4(4,%r0),__TASK_pid(%r3) # store pid of next</div><div class='add'>+	lg	%r15,__THREAD_ksp(%r3)		# load kernel stack of next</div><div class='ctx'> 	tm	__TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?</div><div class='ctx'> 	jz	0f</div><div class='ctx'> 	ni	__TI_flags+7(%r4),255-_TIF_MCCK_PENDING	# clear flag in prev</div><div class='ctx'> 	oi	__TI_flags+7(%r5),_TIF_MCCK_PENDING	# set it in next</div><div class='del'>-0:	stmg	%r6,%r15,__SF_GPRS(%r15)	# store gprs of prev task</div><div class='del'>-	stg	%r15,__THREAD_ksp(%r2)		# store kernel stack of prev</div><div class='del'>-	lg	%r15,__THREAD_ksp(%r3)		# load kernel stack of next</div><div class='del'>-	lctl	%c4,%c4,__TASK_pid(%r3)		# load pid to control reg. 4</div><div class='del'>-	lmg	%r6,%r15,__SF_GPRS(%r15)	# load gprs of next task</div><div class='del'>-	stg	%r3,__LC_CURRENT		# store task struct of next</div><div class='del'>-	mvc	__LC_CURRENT_PID+4(4,%r0),__TASK_pid(%r3) # store pid of next</div><div class='del'>-	stg	%r5,__LC_THREAD_INFO		# store thread info of next</div><div class='del'>-	aghi	%r5,STACK_SIZE			# end of kernel stack of next</div><div class='del'>-	stg	%r5,__LC_KERNEL_STACK		# store end of kernel stack</div><div class='add'>+0:	lmg	%r6,%r15,__SF_GPRS(%r15)	# load gprs of next task</div><div class='ctx'> 	br	%r14</div><div class='ctx'> </div><div class='ctx'> __critical_start:</div><div class='hunk'>@@ -458,7 +465,7 @@ pgm_svcper:</div><div class='ctx'>  * IO interrupt handler routine</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(io_int_handler)</div><div class='del'>-	stck	__LC_INT_CLOCK</div><div class='add'>+	STCK	__LC_INT_CLOCK</div><div class='ctx'> 	stpt	__LC_ASYNC_ENTER_TIMER</div><div class='ctx'> 	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC</div><div class='ctx'> 	lg	%r10,__LC_LAST_BREAK</div><div class='hunk'>@@ -604,7 +611,7 @@ io_notify_resume:</div><div class='ctx'>  * External interrupt handler routine</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(ext_int_handler)</div><div class='del'>-	stck	__LC_INT_CLOCK</div><div class='add'>+	STCK	__LC_INT_CLOCK</div><div class='ctx'> 	stpt	__LC_ASYNC_ENTER_TIMER</div><div class='ctx'> 	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC</div><div class='ctx'> 	lg	%r10,__LC_LAST_BREAK</div><div class='hunk'>@@ -622,6 +629,7 @@ ext_skip:</div><div class='ctx'> 	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC</div><div class='ctx'> 	stmg	%r8,%r9,__PT_PSW(%r11)</div><div class='ctx'> 	TRACE_IRQS_OFF</div><div class='add'>+	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)</div><div class='ctx'> 	lghi	%r1,4096</div><div class='ctx'> 	lgr	%r2,%r11		# pass pointer to pt_regs</div><div class='ctx'> 	llgf	%r3,__LC_EXT_CPU_ADDR	# get cpu address + interruption code</div><div class='hunk'>@@ -638,7 +646,7 @@ ENTRY(psw_idle)</div><div class='ctx'> 	larl	%r1,psw_idle_lpsw+4</div><div class='ctx'> 	stg	%r1,__SF_EMPTY+8(%r15)</div><div class='ctx'> 	larl	%r1,.Lvtimer_max</div><div class='del'>-	stck	__IDLE_ENTER(%r2)</div><div class='add'>+	STCK	__IDLE_ENTER(%r2)</div><div class='ctx'> 	ltr	%r5,%r5</div><div class='ctx'> 	stpt	__VQ_IDLE_ENTER(%r3)</div><div class='ctx'> 	jz	psw_idle_lpsw</div><div class='hunk'>@@ -654,7 +662,7 @@ __critical_end:</div><div class='ctx'>  * Machine check handler routines</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(mcck_int_handler)</div><div class='del'>-	stck	__LC_MCCK_CLOCK</div><div class='add'>+	STCK	__LC_MCCK_CLOCK</div><div class='ctx'> 	la	%r1,4095		# revalidate r1</div><div class='ctx'> 	spt	__LC_CPU_TIMER_SAVE_AREA-4095(%r1)	# revalidate cpu timer</div><div class='ctx'> 	lmg	%r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs</div><div class='hunk'>@@ -967,7 +975,6 @@ ENTRY(sie64a)</div><div class='ctx'> 	xc	__SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # host id == 0</div><div class='ctx'> 	lmg	%r0,%r13,0(%r3)			# load guest gprs 0-13</div><div class='ctx'> 	lg	%r14,__LC_THREAD_INFO		# pointer thread_info struct</div><div class='del'>-	oi	__TI_flags+6(%r14),_TIF_SIE&gt;&gt;8</div><div class='ctx'> sie_loop:</div><div class='ctx'> 	lg	%r14,__LC_THREAD_INFO		# pointer thread_info struct</div><div class='ctx'> 	tm	__TI_flags+7(%r14),_TIF_EXIT_SIE</div><div class='hunk'>@@ -985,7 +992,6 @@ sie_done:</div><div class='ctx'> 	lg	%r14,__LC_THREAD_INFO		# pointer thread_info struct</div><div class='ctx'> sie_exit:</div><div class='ctx'> 	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce</div><div class='del'>-	ni	__TI_flags+6(%r14),255-(_TIF_SIE&gt;&gt;8)</div><div class='ctx'> 	lg	%r14,__SF_EMPTY+8(%r15)		# load guest register save area</div><div class='ctx'> 	stmg	%r0,%r13,0(%r14)		# save guest gprs 0-13</div><div class='ctx'> 	lmg	%r6,%r14,__SF_GPRS(%r15)	# restore kernel registers</div><div class='hunk'>@@ -994,7 +1000,6 @@ sie_exit:</div><div class='ctx'> sie_fault:</div><div class='ctx'> 	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce</div><div class='ctx'> 	lg	%r14,__LC_THREAD_INFO		# pointer thread_info struct</div><div class='del'>-	ni	__TI_flags+6(%r14),255-(_TIF_SIE&gt;&gt;8)</div><div class='ctx'> 	lg	%r14,__SF_EMPTY+8(%r15)		# load guest register save area</div><div class='ctx'> 	stmg	%r0,%r13,0(%r14)		# save guest gprs 0-13</div><div class='ctx'> 	lmg	%r6,%r14,__SF_GPRS(%r15)	# restore kernel registers</div><div class='head'>diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S<br/>index adccd908ebc7..4939d15375aa 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/head.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/head.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/head.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/head.S</a></div><div class='hunk'>@@ -34,125 +34,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> __HEAD</div><div class='del'>-#ifndef CONFIG_IPL</div><div class='del'>-	.org   0</div><div class='del'>-	.long  0x00080000,0x80000000+startup	# Just a restart PSW</div><div class='del'>-#else</div><div class='del'>-#ifdef CONFIG_IPL_TAPE</div><div class='del'>-#define IPL_BS 1024</div><div class='del'>-	.org   0</div><div class='del'>-	.long  0x00080000,0x80000000+iplstart	# The first 24 bytes are loaded</div><div class='del'>-	.long  0x27000000,0x60000001		# by ipl to addresses 0-23.</div><div class='del'>-	.long  0x02000000,0x20000000+IPL_BS	# (a PSW and two CCWs).</div><div class='del'>-	.long  0x00000000,0x00000000		# external old psw</div><div class='del'>-	.long  0x00000000,0x00000000		# svc old psw</div><div class='del'>-	.long  0x00000000,0x00000000		# program check old psw</div><div class='del'>-	.long  0x00000000,0x00000000		# machine check old psw</div><div class='del'>-	.long  0x00000000,0x00000000		# io old psw</div><div class='del'>-	.long  0x00000000,0x00000000</div><div class='del'>-	.long  0x00000000,0x00000000</div><div class='del'>-	.long  0x00000000,0x00000000</div><div class='del'>-	.long  0x000a0000,0x00000058		# external new psw</div><div class='del'>-	.long  0x000a0000,0x00000060		# svc new psw</div><div class='del'>-	.long  0x000a0000,0x00000068		# program check new psw</div><div class='del'>-	.long  0x000a0000,0x00000070		# machine check new psw</div><div class='del'>-	.long  0x00080000,0x80000000+.Lioint	# io new psw</div><div class='ctx'> </div><div class='del'>-	.org   0x100</div><div class='del'>-#</div><div class='del'>-# subroutine for loading from tape</div><div class='del'>-# Parameters:</div><div class='del'>-#  R1 = device number</div><div class='del'>-#  R2 = load address</div><div class='del'>-.Lloader:</div><div class='del'>-	st	%r14,.Lldret</div><div class='del'>-	la	%r3,.Lorbread		# r3 = address of orb</div><div class='del'>-	la	%r5,.Lirb		# r5 = address of irb</div><div class='del'>-	st	%r2,.Lccwread+4 	# initialize CCW data addresses</div><div class='del'>-	lctl	%c6,%c6,.Lcr6</div><div class='del'>-	slr	%r2,%r2</div><div class='del'>-.Lldlp:</div><div class='del'>-	la	%r6,3			# 3 retries</div><div class='del'>-.Lssch:</div><div class='del'>-	ssch	0(%r3)			# load chunk of IPL_BS bytes</div><div class='del'>-	bnz	.Llderr</div><div class='del'>-.Lw4end:</div><div class='del'>-	bas	%r14,.Lwait4io</div><div class='del'>-	tm	8(%r5),0x82		# do we have a problem ?</div><div class='del'>-	bnz	.Lrecov</div><div class='del'>-	slr	%r7,%r7</div><div class='del'>-	icm	%r7,3,10(%r5)		# get residual count</div><div class='del'>-	lcr	%r7,%r7</div><div class='del'>-	la	%r7,IPL_BS(%r7) 	# IPL_BS-residual=#bytes read</div><div class='del'>-	ar	%r2,%r7 		# add to total size</div><div class='del'>-	tm	8(%r5),0x01		# found a tape mark ?</div><div class='del'>-	bnz	.Ldone</div><div class='del'>-	l	%r0,.Lccwread+4 	# update CCW data addresses</div><div class='del'>-	ar	%r0,%r7</div><div class='del'>-	st	%r0,.Lccwread+4</div><div class='del'>-	b	.Lldlp</div><div class='del'>-.Ldone:</div><div class='del'>-	l	%r14,.Lldret</div><div class='del'>-	br	%r14			# r2 contains the total size</div><div class='del'>-.Lrecov:</div><div class='del'>-	bas	%r14,.Lsense		# do the sensing</div><div class='del'>-	bct	%r6,.Lssch		# dec. retry count &amp; branch</div><div class='del'>-	b	.Llderr</div><div class='del'>-#</div><div class='del'>-# Sense subroutine</div><div class='del'>-#</div><div class='del'>-.Lsense:</div><div class='del'>-	st	%r14,.Lsnsret</div><div class='del'>-	la	%r7,.Lorbsense</div><div class='del'>-	ssch	0(%r7)			# start sense command</div><div class='del'>-	bnz	.Llderr</div><div class='del'>-	bas	%r14,.Lwait4io</div><div class='del'>-	l	%r14,.Lsnsret</div><div class='del'>-	tm	8(%r5),0x82		# do we have a problem ?</div><div class='del'>-	bnz	.Llderr</div><div class='del'>-	br	%r14</div><div class='del'>-#</div><div class='del'>-# Wait for interrupt subroutine</div><div class='del'>-#</div><div class='del'>-.Lwait4io:</div><div class='del'>-	lpsw	.Lwaitpsw</div><div class='del'>-.Lioint:</div><div class='del'>-	c	%r1,0xb8		# compare subchannel number</div><div class='del'>-	bne	.Lwait4io</div><div class='del'>-	tsch	0(%r5)</div><div class='del'>-	slr	%r0,%r0</div><div class='del'>-	tm	8(%r5),0x82		# do we have a problem ?</div><div class='del'>-	bnz	.Lwtexit</div><div class='del'>-	tm	8(%r5),0x04		# got device end ?</div><div class='del'>-	bz	.Lwait4io</div><div class='del'>-.Lwtexit:</div><div class='del'>-	br	%r14</div><div class='del'>-.Llderr:</div><div class='del'>-	lpsw	.Lcrash</div><div class='del'>-</div><div class='del'>-	.align	8</div><div class='del'>-.Lorbread:</div><div class='del'>-	.long	0x00000000,0x0080ff00,.Lccwread</div><div class='del'>-	.align	8</div><div class='del'>-.Lorbsense:</div><div class='del'>-	.long	0x00000000,0x0080ff00,.Lccwsense</div><div class='del'>-	.align	8</div><div class='del'>-.Lccwread:</div><div class='del'>-	.long	0x02200000+IPL_BS,0x00000000</div><div class='del'>-.Lccwsense:</div><div class='del'>-	.long	0x04200001,0x00000000</div><div class='del'>-.Lwaitpsw:</div><div class='del'>-	.long	0x020a0000,0x80000000+.Lioint</div><div class='del'>-</div><div class='del'>-.Lirb:	.long	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0</div><div class='del'>-.Lcr6:	.long	0xff000000</div><div class='del'>-	.align	8</div><div class='del'>-.Lcrash:.long	0x000a0000,0x00000000</div><div class='del'>-.Lldret:.long	0</div><div class='del'>-.Lsnsret: .long 0</div><div class='del'>-#endif	/* CONFIG_IPL_TAPE */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_IPL_VM</div><div class='ctx'> #define IPL_BS	0x730</div><div class='ctx'> 	.org	0</div><div class='ctx'> 	.long	0x00080000,0x80000000+iplstart	# The first 24 bytes are loaded</div><div class='hunk'>@@ -256,7 +138,6 @@ __HEAD</div><div class='ctx'> 	.long	0x02600050,0x00000000</div><div class='ctx'> 	.endr</div><div class='ctx'> 	.long	0x02200050,0x00000000</div><div class='del'>-#endif	/* CONFIG_IPL_VM */</div><div class='ctx'> </div><div class='ctx'> iplstart:</div><div class='ctx'> 	lh	%r1,0xb8		# test if subchannel number</div><div class='hunk'>@@ -325,7 +206,6 @@ iplstart:</div><div class='ctx'> 	clc	0(3,%r2),.L_eof</div><div class='ctx'> 	bz	.Lagain2</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_IPL_VM</div><div class='ctx'> #</div><div class='ctx'> # reset files in VM reader</div><div class='ctx'> #</div><div class='hunk'>@@ -358,7 +238,6 @@ iplstart:</div><div class='ctx'> 	.long	0x00080000,0x80000000+.Lrdrint</div><div class='ctx'> .Lrdrwaitpsw:</div><div class='ctx'> 	.long	0x020a0000,0x80000000+.Lrdrint</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # everything loaded, go for it</div><div class='hunk'>@@ -376,8 +255,6 @@ iplstart:</div><div class='ctx'> .L_eof: .long	0xc5d6c600	 /* C'EOF' */</div><div class='ctx'> .L_hdr: .long	0xc8c4d900	 /* C'HDR' */</div><div class='ctx'> </div><div class='del'>-#endif	/* CONFIG_IPL */</div><div class='del'>-</div><div class='ctx'> #</div><div class='ctx'> # SALIPL loader support. Based on a patch by Rob van der Heij.</div><div class='ctx'> # This entry point is called directly from the SALIPL loader and</div><div class='head'>diff --git a/arch/s390/kernel/head_kdump.S b/arch/s390/kernel/head_kdump.S<br/>index e1ac3893e972..796c976b5fdc 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/head_kdump.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/head_kdump.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/head_kdump.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/head_kdump.S</a></div><div class='hunk'>@@ -85,11 +85,6 @@ startup_kdump_relocated:</div><div class='ctx'> 	basr	%r13,0</div><div class='ctx'> 0:</div><div class='ctx'> 	mvc	0(8,%r0),.Lrestart_psw-0b(%r13)	# Setup restart PSW</div><div class='del'>-	mvc	464(16,%r0),.Lpgm_psw-0b(%r13)	# Setup pgm check PSW</div><div class='del'>-	lhi	%r1,1				# Start new kernel</div><div class='del'>-	diag	%r1,%r1,0x308			# with diag 308</div><div class='del'>-</div><div class='del'>-.Lno_diag308:					# No diag 308</div><div class='ctx'> 	sam31					# Switch to 31 bit addr mode</div><div class='ctx'> 	sr	%r1,%r1				# Erase register r1</div><div class='ctx'> 	sr	%r2,%r2				# Erase register r2</div><div class='hunk'>@@ -98,8 +93,6 @@ startup_kdump_relocated:</div><div class='ctx'> .align	8</div><div class='ctx'> .Lrestart_psw:</div><div class='ctx'> 	.long	0x00080000,0x80000000 + startup</div><div class='del'>-.Lpgm_psw:</div><div class='del'>-	.quad	0x0000000180000000,0x0000000000000000 + .Lno_diag308</div><div class='ctx'> #else</div><div class='ctx'> .align 2</div><div class='ctx'> .Lep_startup_kdump:</div><div class='head'>diff --git a/arch/s390/kernel/init_task.c b/arch/s390/kernel/init_task.c<br/>deleted file mode 100644<br/>index 4d1c9fb0b540..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,38 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  arch/s390/kernel/init_task.c</div><div class='del'>- *</div><div class='del'>- *  S390 version</div><div class='del'>- *</div><div class='del'>- *  Derived from "arch/i386/kernel/init_task.c"</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is THREAD_SIZE aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c<br/>index 8342e65a140d..2f6cfd460cb6 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/ipl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/ipl.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/ipl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/ipl.c</a></div><div class='hunk'>@@ -1528,12 +1528,15 @@ static struct shutdown_action __refdata dump_action = {</div><div class='ctx'> </div><div class='ctx'> static void dump_reipl_run(struct shutdown_trigger *trigger)</div><div class='ctx'> {</div><div class='del'>-	u32 csum;</div><div class='del'>-</div><div class='del'>-	csum = csum_partial(reipl_block_actual, reipl_block_actual-&gt;hdr.len, 0);</div><div class='del'>-	copy_to_absolute_zero(&amp;S390_lowcore.ipib_checksum, &amp;csum, sizeof(csum));</div><div class='del'>-	copy_to_absolute_zero(&amp;S390_lowcore.ipib, &amp;reipl_block_actual,</div><div class='del'>-			      sizeof(reipl_block_actual));</div><div class='add'>+	struct {</div><div class='add'>+		void	*addr;</div><div class='add'>+		__u32	csum;</div><div class='add'>+	} __packed ipib;</div><div class='add'>+</div><div class='add'>+	ipib.csum = csum_partial(reipl_block_actual,</div><div class='add'>+				 reipl_block_actual-&gt;hdr.len, 0);</div><div class='add'>+	ipib.addr = reipl_block_actual;</div><div class='add'>+	memcpy_absolute(&amp;S390_lowcore.ipib, &amp;ipib, sizeof(ipib));</div><div class='ctx'> 	dump_run(trigger);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1750,6 +1753,7 @@ static struct kobj_attribute on_restart_attr =</div><div class='ctx'> </div><div class='ctx'> static void __do_restart(void *ignore)</div><div class='ctx'> {</div><div class='add'>+	__arch_local_irq_stosm(0x04); /* enable DAT */</div><div class='ctx'> 	smp_send_stop();</div><div class='ctx'> #ifdef CONFIG_CRASH_DUMP</div><div class='ctx'> 	crash_kexec(NULL);</div><div class='head'>diff --git a/arch/s390/kernel/irq.c b/arch/s390/kernel/irq.c<br/>index 8a22c27219dd..b4f4a7133fa1 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/irq.c</a></div><div class='hunk'>@@ -42,7 +42,8 @@ static const struct irq_class intrclass_names[] = {</div><div class='ctx'> 	{.name = "VRT", .desc = "[EXT] Virtio" },</div><div class='ctx'> 	{.name = "SCP", .desc = "[EXT] Service Call" },</div><div class='ctx'> 	{.name = "IUC", .desc = "[EXT] IUCV" },</div><div class='del'>-	{.name = "CPM", .desc = "[EXT] CPU Measurement" },</div><div class='add'>+	{.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling" },</div><div class='add'>+	{.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter" },</div><div class='ctx'> 	{.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt" },</div><div class='ctx'> 	{.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt" },</div><div class='ctx'> 	{.name = "DAS", .desc = "[I/O] DASD" },</div><div class='head'>diff --git a/arch/s390/kernel/machine_kexec.c b/arch/s390/kernel/machine_kexec.c<br/>index bdad47d54478..cdacf8f91b2d 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/machine_kexec.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/machine_kexec.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/machine_kexec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/machine_kexec.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;asm/ipl.h&gt;</div><div class='ctx'> #include &lt;asm/diag.h&gt;</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='add'>+#include &lt;asm/os_info.h&gt;</div><div class='ctx'> </div><div class='ctx'> typedef void (*relocate_kernel_t)(kimage_entry_t *, unsigned long);</div><div class='ctx'> </div><div class='hunk'>@@ -79,8 +80,8 @@ static void __do_machine_kdump(void *image)</div><div class='ctx'> #ifdef CONFIG_CRASH_DUMP</div><div class='ctx'> 	int (*start_kdump)(int) = (void *)((struct kimage *) image)-&gt;start;</div><div class='ctx'> </div><div class='del'>-	__load_psw_mask(PSW_MASK_BASE | PSW_DEFAULT_KEY | PSW_MASK_EA | PSW_MASK_BA);</div><div class='ctx'> 	setup_regs();</div><div class='add'>+	__load_psw_mask(PSW_MASK_BASE | PSW_DEFAULT_KEY | PSW_MASK_EA | PSW_MASK_BA);</div><div class='ctx'> 	start_kdump(1);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='hunk'>@@ -114,8 +115,13 @@ static void crash_map_pages(int enable)</div><div class='ctx'> 	       size % KEXEC_CRASH_MEM_ALIGN);</div><div class='ctx'> 	if (enable)</div><div class='ctx'> 		vmem_add_mapping(crashk_res.start, size);</div><div class='del'>-	else</div><div class='add'>+	else {</div><div class='ctx'> 		vmem_remove_mapping(crashk_res.start, size);</div><div class='add'>+		if (size)</div><div class='add'>+			os_info_crashkernel_add(crashk_res.start, size);</div><div class='add'>+		else</div><div class='add'>+			os_info_crashkernel_add(0, 0);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -208,6 +214,7 @@ static void __machine_kexec(void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct kimage *image = data;</div><div class='ctx'> </div><div class='add'>+	__arch_local_irq_stosm(0x04); /* enable DAT */</div><div class='ctx'> 	pfault_fini();</div><div class='ctx'> 	tracing_off();</div><div class='ctx'> 	debug_locks_off();</div><div class='head'>diff --git a/arch/s390/kernel/os_info.c b/arch/s390/kernel/os_info.c<br/>index e8d6c214d498..95fa5ac6c4ce 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/os_info.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/os_info.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/os_info.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/os_info.c</a></div><div class='hunk'>@@ -60,7 +60,7 @@ void __init os_info_init(void)</div><div class='ctx'> 	os_info.version_minor = OS_INFO_VERSION_MINOR;</div><div class='ctx'> 	os_info.magic = OS_INFO_MAGIC;</div><div class='ctx'> 	os_info.csum = os_info_csum(&amp;os_info);</div><div class='del'>-	copy_to_absolute_zero(&amp;S390_lowcore.os_info, &amp;ptr, sizeof(ptr));</div><div class='add'>+	memcpy_absolute(&amp;S390_lowcore.os_info, &amp;ptr, sizeof(ptr));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CRASH_DUMP</div><div class='hunk'>@@ -138,7 +138,6 @@ static void os_info_old_init(void)</div><div class='ctx'> 		goto fail_free;</div><div class='ctx'> 	os_info_old_alloc(OS_INFO_VMCOREINFO, 1);</div><div class='ctx'> 	os_info_old_alloc(OS_INFO_REIPL_BLOCK, 1);</div><div class='del'>-	os_info_old_alloc(OS_INFO_INIT_FN, PAGE_SIZE);</div><div class='ctx'> 	pr_info("crashkernel: addr=0x%lx size=%lu\n",</div><div class='ctx'> 		(unsigned long) os_info_old-&gt;crashkernel_addr,</div><div class='ctx'> 		(unsigned long) os_info_old-&gt;crashkernel_size);</div><div class='head'>diff --git a/arch/s390/kernel/perf_cpum_cf.c b/arch/s390/kernel/perf_cpum_cf.c<br/>index cb019f429e88..9871b1971ed7 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/perf_cpum_cf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/perf_cpum_cf.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/perf_cpum_cf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/perf_cpum_cf.c</a></div><div class='hunk'>@@ -225,7 +225,7 @@ static void cpumf_measurement_alert(struct ext_code ext_code,</div><div class='ctx'> 	if (!(alert &amp; CPU_MF_INT_CF_MASK))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	kstat_cpu(smp_processor_id()).irqs[EXTINT_CPM]++;</div><div class='add'>+	kstat_cpu(smp_processor_id()).irqs[EXTINT_CMC]++;</div><div class='ctx'> 	cpuhw = &amp;__get_cpu_var(cpu_hw_events);</div><div class='ctx'> </div><div class='ctx'> 	/* Measurement alerts are shared and might happen when the PMU</div><div class='head'>diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c<br/>index 06264ae8ccd9..489d1d8d96b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/setup.c</a></div><div class='hunk'>@@ -428,10 +428,12 @@ static void __init setup_lowcore(void)</div><div class='ctx'> 	lc-&gt;restart_fn = (unsigned long) do_restart;</div><div class='ctx'> 	lc-&gt;restart_data = 0;</div><div class='ctx'> 	lc-&gt;restart_source = -1UL;</div><div class='del'>-	memcpy(&amp;S390_lowcore.restart_stack, &amp;lc-&gt;restart_stack,</div><div class='del'>-	       4*sizeof(unsigned long));</div><div class='del'>-	copy_to_absolute_zero(&amp;S390_lowcore.restart_psw,</div><div class='del'>-			      &amp;lc-&gt;restart_psw, sizeof(psw_t));</div><div class='add'>+</div><div class='add'>+	/* Setup absolute zero lowcore */</div><div class='add'>+	memcpy_absolute(&amp;S390_lowcore.restart_stack, &amp;lc-&gt;restart_stack,</div><div class='add'>+			4 * sizeof(unsigned long));</div><div class='add'>+	memcpy_absolute(&amp;S390_lowcore.restart_psw, &amp;lc-&gt;restart_psw,</div><div class='add'>+			sizeof(lc-&gt;restart_psw));</div><div class='ctx'> </div><div class='ctx'> 	set_prefix((u32)(unsigned long) lc);</div><div class='ctx'> 	lowcore_ptr[0] = lc;</div><div class='hunk'>@@ -598,7 +600,7 @@ static void __init setup_vmcoreinfo(void)</div><div class='ctx'> #ifdef CONFIG_KEXEC</div><div class='ctx'> 	unsigned long ptr = paddr_vmcoreinfo_note();</div><div class='ctx'> </div><div class='del'>-	copy_to_absolute_zero(&amp;S390_lowcore.vmcore_info, &amp;ptr, sizeof(ptr));</div><div class='add'>+	memcpy_absolute(&amp;S390_lowcore.vmcore_info, &amp;ptr, sizeof(ptr));</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c<br/>index f7582b27f600..ac565b44aabb 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/signal.c</a></div><div class='hunk'>@@ -33,9 +33,6 @@</div><div class='ctx'> #include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include "entry.h"</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> typedef struct </div><div class='ctx'> {</div><div class='ctx'> 	__u8 callee_used_stack[__SIGNAL_FRAMESIZE];</div><div class='hunk'>@@ -59,15 +56,8 @@ typedef struct</div><div class='ctx'> SYSCALL_DEFINE3(sigsuspend, int, history0, int, history1, old_sigset_t, mask)</div><div class='ctx'> {</div><div class='ctx'> 	sigset_t blocked;</div><div class='del'>-</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='ctx'> 	siginitset(&amp;blocked, mask);</div><div class='del'>-	set_current_blocked(&amp;blocked);</div><div class='del'>-	set_current_state(TASK_INTERRUPTIBLE);</div><div class='del'>-	schedule();</div><div class='del'>-	set_restore_sigmask();</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> SYSCALL_DEFINE3(sigaction, int, sig, const struct old_sigaction __user *, act,</div><div class='hunk'>@@ -176,7 +166,6 @@ SYSCALL_DEFINE0(sigreturn)</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> 	if (__copy_from_user(&amp;set.sig, &amp;frame-&gt;sc.oldmask, _SIGMASK_COPY_SIZE))</div><div class='ctx'> 		goto badframe;</div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> 	if (restore_sigregs(regs, &amp;frame-&gt;sregs))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -196,7 +185,6 @@ SYSCALL_DEFINE0(rt_sigreturn)</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> 	if (__copy_from_user(&amp;set.sig, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> 	if (restore_sigregs(regs, &amp;frame-&gt;uc.uc_mcontext))</div><div class='ctx'> 		goto badframe;</div><div class='hunk'>@@ -235,13 +223,6 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs * regs, size_t frame_size)</div><div class='ctx'> 			sp = current-&gt;sas_ss_sp + current-&gt;sas_ss_size;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* This is the legacy signal stack switching. */</div><div class='del'>-	else if (!user_mode(regs) &amp;&amp;</div><div class='del'>-		 !(ka-&gt;sa.sa_flags &amp; SA_RESTORER) &amp;&amp;</div><div class='del'>-		 ka-&gt;sa.sa_restorer) {</div><div class='del'>-		sp = (unsigned long) ka-&gt;sa.sa_restorer;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return (void __user *)((sp - frame_size) &amp; -8ul);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -381,7 +362,7 @@ give_sigsegv:</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int handle_signal(unsigned long sig, struct k_sigaction *ka,</div><div class='add'>+static void handle_signal(unsigned long sig, struct k_sigaction *ka,</div><div class='ctx'> 			 siginfo_t *info, sigset_t *oldset,</div><div class='ctx'> 			 struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -393,9 +374,9 @@ static int handle_signal(unsigned long sig, struct k_sigaction *ka,</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = setup_frame(sig, ka, oldset, regs);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-	block_sigmask(ka, sig);</div><div class='del'>-	return 0;</div><div class='add'>+		return;</div><div class='add'>+	signal_delivered(sig, info, ka, regs,</div><div class='add'>+				 test_thread_flag(TIF_SINGLE_STEP));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -412,21 +393,7 @@ void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='del'>-	sigset_t *oldset;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We want the common case to go fast, which</div><div class='del'>-	 * is why we may in certain cases get here from</div><div class='del'>-	 * kernel mode. Just return without doing anything</div><div class='del'>-	 * if so.</div><div class='del'>-	 */</div><div class='del'>-	if (!user_mode(regs))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Get signal to deliver. When running under ptrace, at this point</div><div class='hunk'>@@ -464,24 +431,10 @@ void do_signal(struct pt_regs *regs)</div><div class='ctx'> 		/* No longer in a system call */</div><div class='ctx'> 		clear_thread_flag(TIF_SYSCALL);</div><div class='ctx'> </div><div class='del'>-		if ((is_compat_task() ?</div><div class='del'>-		     handle_signal32(signr, &amp;ka, &amp;info, oldset, regs) :</div><div class='del'>-		     handle_signal(signr, &amp;ka, &amp;info, oldset, regs)) == 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * A signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag.</div><div class='del'>-			 */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Let tracing know that we've done the handler setup.</div><div class='del'>-			 */</div><div class='del'>-			tracehook_signal_handler(signr, &amp;info, &amp;ka, regs,</div><div class='del'>-					 test_thread_flag(TIF_SINGLE_STEP));</div><div class='del'>-		}</div><div class='add'>+		if (is_compat_task())</div><div class='add'>+			handle_signal32(signr, &amp;ka, &amp;info, oldset, regs);</div><div class='add'>+		else</div><div class='add'>+			handle_signal(signr, &amp;ka, &amp;info, oldset, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -507,16 +460,11 @@ void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If there's no signal to deliver, we just put the saved sigmask back.</div><div class='ctx'> 	 */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void do_notify_resume(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 	tracehook_notify_resume(regs);</div><div class='del'>-	if (current-&gt;replacement_session_keyring)</div><div class='del'>-		key_replace_session_keyring();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c<br/>index 1f77227669e8..15cca26ccb6c 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/smp.c</a></div><div class='hunk'>@@ -85,7 +85,6 @@ enum {</div><div class='ctx'> </div><div class='ctx'> struct pcpu {</div><div class='ctx'> 	struct cpu cpu;</div><div class='del'>-	struct task_struct *idle;	/* idle process for the cpu */</div><div class='ctx'> 	struct _lowcore *lowcore;	/* lowcore page(s) for the cpu */</div><div class='ctx'> 	unsigned long async_stack;	/* async stack for the cpu */</div><div class='ctx'> 	unsigned long panic_stack;	/* panic stack for the cpu */</div><div class='hunk'>@@ -226,6 +225,8 @@ out:</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HOTPLUG_CPU</div><div class='add'>+</div><div class='ctx'> static void pcpu_free_lowcore(struct pcpu *pcpu)</div><div class='ctx'> {</div><div class='ctx'> 	pcpu_sigp_retry(pcpu, sigp_set_prefix, 0);</div><div class='hunk'>@@ -247,6 +248,8 @@ static void pcpu_free_lowcore(struct pcpu *pcpu)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#endif /* CONFIG_HOTPLUG_CPU */</div><div class='add'>+</div><div class='ctx'> static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct _lowcore *lc = pcpu-&gt;lowcore;</div><div class='hunk'>@@ -294,26 +297,27 @@ static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)</div><div class='ctx'> static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),</div><div class='ctx'> 			  void *data, unsigned long stack)</div><div class='ctx'> {</div><div class='del'>-	struct _lowcore *lc = pcpu-&gt;lowcore;</div><div class='del'>-	unsigned short this_cpu;</div><div class='add'>+	struct _lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];</div><div class='add'>+	struct {</div><div class='add'>+		unsigned long	stack;</div><div class='add'>+		void		*func;</div><div class='add'>+		void		*data;</div><div class='add'>+		unsigned long	source;</div><div class='add'>+	} restart = { stack, func, data, stap() };</div><div class='ctx'> </div><div class='ctx'> 	__load_psw_mask(psw_kernel_bits);</div><div class='del'>-	this_cpu = stap();</div><div class='del'>-	if (pcpu-&gt;address == this_cpu)</div><div class='add'>+	if (pcpu-&gt;address == restart.source)</div><div class='ctx'> 		func(data);	/* should not return */</div><div class='ctx'> 	/* Stop target cpu (if func returns this stops the current cpu). */</div><div class='ctx'> 	pcpu_sigp_retry(pcpu, sigp_stop, 0);</div><div class='ctx'> 	/* Restart func on the target cpu and stop the current cpu. */</div><div class='del'>-	lc-&gt;restart_stack = stack;</div><div class='del'>-	lc-&gt;restart_fn = (unsigned long) func;</div><div class='del'>-	lc-&gt;restart_data = (unsigned long) data;</div><div class='del'>-	lc-&gt;restart_source = (unsigned long) this_cpu;</div><div class='add'>+	memcpy_absolute(&amp;lc-&gt;restart_stack, &amp;restart, sizeof(restart));</div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"0:	sigp	0,%0,6	# sigp restart to target cpu\n"</div><div class='ctx'> 		"	brc	2,0b	# busy, try again\n"</div><div class='ctx'> 		"1:	sigp	0,%1,5	# sigp stop to current cpu\n"</div><div class='ctx'> 		"	brc	2,1b	# busy, try again\n"</div><div class='del'>-		: : "d" (pcpu-&gt;address), "d" (this_cpu) : "0", "1", "cc");</div><div class='add'>+		: : "d" (pcpu-&gt;address), "d" (restart.source) : "0", "1", "cc");</div><div class='ctx'> 	for (;;) ;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -721,26 +725,9 @@ static void __cpuinit smp_start_secondary(void *cpuvoid)</div><div class='ctx'> 	cpu_idle();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct create_idle {</div><div class='del'>-	struct work_struct work;</div><div class='del'>-	struct task_struct *idle;</div><div class='del'>-	struct completion done;</div><div class='del'>-	int cpu;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __cpuinit smp_fork_idle(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct create_idle *c_idle;</div><div class='del'>-</div><div class='del'>-	c_idle = container_of(work, struct create_idle, work);</div><div class='del'>-	c_idle-&gt;idle = fork_idle(c_idle-&gt;cpu);</div><div class='del'>-	complete(&amp;c_idle-&gt;done);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Upping and downing of CPUs */</div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='del'>-	struct create_idle c_idle;</div><div class='ctx'> 	struct pcpu *pcpu;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='hunk'>@@ -750,22 +737,12 @@ int __cpuinit __cpu_up(unsigned int cpu)</div><div class='ctx'> 	if (pcpu_sigp_retry(pcpu, sigp_initial_cpu_reset, 0) !=</div><div class='ctx'> 	    sigp_order_code_accepted)</div><div class='ctx'> 		return -EIO;</div><div class='del'>-	if (!pcpu-&gt;idle) {</div><div class='del'>-		c_idle.done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done);</div><div class='del'>-		INIT_WORK_ONSTACK(&amp;c_idle.work, smp_fork_idle);</div><div class='del'>-		c_idle.cpu = cpu;</div><div class='del'>-		schedule_work(&amp;c_idle.work);</div><div class='del'>-		wait_for_completion(&amp;c_idle.done);</div><div class='del'>-		if (IS_ERR(c_idle.idle))</div><div class='del'>-			return PTR_ERR(c_idle.idle);</div><div class='del'>-		pcpu-&gt;idle = c_idle.idle;</div><div class='del'>-	}</div><div class='del'>-	init_idle(pcpu-&gt;idle, cpu);</div><div class='add'>+</div><div class='ctx'> 	rc = pcpu_alloc_lowcore(pcpu, cpu);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	pcpu_prepare_secondary(pcpu, cpu);</div><div class='del'>-	pcpu_attach_task(pcpu, pcpu-&gt;idle);</div><div class='add'>+	pcpu_attach_task(pcpu, tidle);</div><div class='ctx'> 	pcpu_start_fn(pcpu, smp_start_secondary, NULL);</div><div class='ctx'> 	while (!cpu_online(cpu))</div><div class='ctx'> 		cpu_relax();</div><div class='hunk'>@@ -824,17 +801,6 @@ void __noreturn cpu_die(void)</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_HOTPLUG_CPU */</div><div class='ctx'> </div><div class='del'>-static void smp_call_os_info_init_fn(void)</div><div class='del'>-{</div><div class='del'>-	int (*init_fn)(void);</div><div class='del'>-	unsigned long size;</div><div class='del'>-</div><div class='del'>-	init_fn = os_info_old_entry(OS_INFO_INIT_FN, &amp;size);</div><div class='del'>-	if (!init_fn)</div><div class='del'>-		return;</div><div class='del'>-	init_fn();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> {</div><div class='ctx'> 	/* request the 0x1201 emergency signal external interrupt */</div><div class='hunk'>@@ -843,7 +809,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 	/* request the 0x1202 external call external interrupt */</div><div class='ctx'> 	if (register_external_interrupt(0x1202, do_ext_call_interrupt) != 0)</div><div class='ctx'> 		panic("Couldn't request external interrupt 0x1202");</div><div class='del'>-	smp_call_os_info_init_fn();</div><div class='ctx'> 	smp_detect_cpus();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -852,7 +817,6 @@ void __init smp_prepare_boot_cpu(void)</div><div class='ctx'> 	struct pcpu *pcpu = pcpu_devices;</div><div class='ctx'> </div><div class='ctx'> 	boot_cpu_address = stap();</div><div class='del'>-	pcpu-&gt;idle = current;</div><div class='ctx'> 	pcpu-&gt;state = CPU_STATE_CONFIGURED;</div><div class='ctx'> 	pcpu-&gt;address = boot_cpu_address;</div><div class='ctx'> 	pcpu-&gt;lowcore = (struct _lowcore *)(unsigned long) store_prefix();</div><div class='hunk'>@@ -968,19 +932,6 @@ static struct attribute_group cpu_common_attr_group = {</div><div class='ctx'> 	.attrs = cpu_common_attrs,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static ssize_t show_capability(struct device *dev,</div><div class='del'>-				struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	unsigned int capability;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	rc = get_cpu_capability(&amp;capability);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='del'>-	return sprintf(buf, "%u\n", capability);</div><div class='del'>-}</div><div class='del'>-static DEVICE_ATTR(capability, 0444, show_capability, NULL);</div><div class='del'>-</div><div class='ctx'> static ssize_t show_idle_count(struct device *dev,</div><div class='ctx'> 				struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='hunk'>@@ -1018,7 +969,6 @@ static ssize_t show_idle_time(struct device *dev,</div><div class='ctx'> static DEVICE_ATTR(idle_time_us, 0444, show_idle_time, NULL);</div><div class='ctx'> </div><div class='ctx'> static struct attribute *cpu_online_attrs[] = {</div><div class='del'>-	&amp;dev_attr_capability.attr,</div><div class='ctx'> 	&amp;dev_attr_idle_count.attr,</div><div class='ctx'> 	&amp;dev_attr_idle_time_us.attr,</div><div class='ctx'> 	NULL,</div><div class='head'>diff --git a/arch/s390/kernel/sysinfo.c b/arch/s390/kernel/sysinfo.c<br/>index 2a94b774695c..fa0eb238dac7 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kernel/sysinfo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kernel/sysinfo.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/sysinfo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/sysinfo.c</a></div><div class='hunk'>@@ -393,27 +393,6 @@ static __init int create_proc_service_level(void)</div><div class='ctx'> subsys_initcall(create_proc_service_level);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Bogomips calculation based on cpu capability.</div><div class='del'>- */</div><div class='del'>-int get_cpu_capability(unsigned int *capability)</div><div class='del'>-{</div><div class='del'>-	struct sysinfo_1_2_2 *info;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	info = (void *) get_zeroed_page(GFP_KERNEL);</div><div class='del'>-	if (!info)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	rc = stsi(info, 1, 2, 2);</div><div class='del'>-	if (rc == -ENOSYS)</div><div class='del'>-		goto out;</div><div class='del'>-	rc = 0;</div><div class='del'>-	*capability = info-&gt;capability;</div><div class='del'>-out:</div><div class='del'>-	free_page((unsigned long) info);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * CPU capability might have changed. Therefore recalculate loops_per_jiffy.</div><div class='ctx'>  */</div><div class='ctx'> void s390_adjust_jiffies(void)</div><div class='head'>diff --git a/arch/s390/kernel/vdso32/.gitignore b/arch/s390/kernel/vdso32/.gitignore<br/>new file mode 100644<br/>index 000000000000..e45fba9d0ced<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/vdso32/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/vdso32/.gitignore</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+vdso32.lds</div><div class='head'>diff --git a/arch/s390/kernel/vdso64/.gitignore b/arch/s390/kernel/vdso64/.gitignore<br/>new file mode 100644<br/>index 000000000000..3fd18cf9fec2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/s390/kernel/vdso64/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kernel/vdso64/.gitignore</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+vdso64.lds</div><div class='head'>diff --git a/arch/s390/kvm/diag.c b/arch/s390/kvm/diag.c<br/>index a353f0ea45c2..b23d9ac77dfc 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kvm/diag.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kvm/diag.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kvm/diag.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kvm/diag.c</a></div><div class='hunk'>@@ -47,9 +47,30 @@ static int __diag_time_slice_end(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	VCPU_EVENT(vcpu, 5, "%s", "diag time slice end");</div><div class='ctx'> 	vcpu-&gt;stat.diagnose_44++;</div><div class='del'>-	vcpu_put(vcpu);</div><div class='del'>-	yield();</div><div class='del'>-	vcpu_load(vcpu);</div><div class='add'>+	kvm_vcpu_on_spin(vcpu);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __diag_time_slice_end_directed(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+	struct kvm_vcpu *tcpu;</div><div class='add'>+	int tid;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	tid = vcpu-&gt;run-&gt;s.regs.gprs[(vcpu-&gt;arch.sie_block-&gt;ipa &amp; 0xf0) &gt;&gt; 4];</div><div class='add'>+	vcpu-&gt;stat.diagnose_9c++;</div><div class='add'>+	VCPU_EVENT(vcpu, 5, "diag time slice end directed to %d", tid);</div><div class='add'>+</div><div class='add'>+	if (tid == vcpu-&gt;vcpu_id)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	kvm_for_each_vcpu(i, tcpu, kvm)</div><div class='add'>+		if (tcpu-&gt;vcpu_id == tid) {</div><div class='add'>+			kvm_vcpu_yield_to(tcpu);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -89,6 +110,8 @@ int kvm_s390_handle_diag(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		return diag_release_pages(vcpu);</div><div class='ctx'> 	case 0x44:</div><div class='ctx'> 		return __diag_time_slice_end(vcpu);</div><div class='add'>+	case 0x9c:</div><div class='add'>+		return __diag_time_slice_end_directed(vcpu);</div><div class='ctx'> 	case 0x308:</div><div class='ctx'> 		return __diag_ipl_functions(vcpu);</div><div class='ctx'> 	default:</div><div class='head'>diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c<br/>index 361456577c6f..979cbe55bf5e 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kvm/intercept.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kvm/intercept.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kvm/intercept.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kvm/intercept.c</a></div><div class='hunk'>@@ -101,6 +101,7 @@ static int handle_lctl(struct kvm_vcpu *vcpu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static intercept_handler_t instruction_handlers[256] = {</div><div class='add'>+	[0x01] = kvm_s390_handle_01,</div><div class='ctx'> 	[0x83] = kvm_s390_handle_diag,</div><div class='ctx'> 	[0xae] = kvm_s390_handle_sigp,</div><div class='ctx'> 	[0xb2] = kvm_s390_handle_b2,</div><div class='head'>diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c<br/>index 217ce44395a4..664766d0c83c 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kvm/kvm-s390.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kvm/kvm-s390.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kvm/kvm-s390.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kvm/kvm-s390.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='ctx'> #include &lt;asm/switch_to.h&gt;</div><div class='add'>+#include &lt;asm/sclp.h&gt;</div><div class='ctx'> #include "kvm-s390.h"</div><div class='ctx'> #include "gaccess.h"</div><div class='ctx'> </div><div class='hunk'>@@ -74,6 +75,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {</div><div class='ctx'> 	{ "instruction_sigp_restart", VCPU_STAT(instruction_sigp_restart) },</div><div class='ctx'> 	{ "diagnose_10", VCPU_STAT(diagnose_10) },</div><div class='ctx'> 	{ "diagnose_44", VCPU_STAT(diagnose_44) },</div><div class='add'>+	{ "diagnose_9c", VCPU_STAT(diagnose_9c) },</div><div class='ctx'> 	{ NULL }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -133,8 +135,16 @@ int kvm_dev_ioctl_check_extension(long ext)</div><div class='ctx'> 	case KVM_CAP_S390_UCONTROL:</div><div class='ctx'> #endif</div><div class='ctx'> 	case KVM_CAP_SYNC_REGS:</div><div class='add'>+	case KVM_CAP_ONE_REG:</div><div class='ctx'> 		r = 1;</div><div class='ctx'> 		break;</div><div class='add'>+	case KVM_CAP_NR_VCPUS:</div><div class='add'>+	case KVM_CAP_MAX_VCPUS:</div><div class='add'>+		r = KVM_MAX_VCPUS;</div><div class='add'>+		break;</div><div class='add'>+	case KVM_CAP_S390_COW:</div><div class='add'>+		r = sclp_get_fac85() &amp; 0x2;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		r = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -423,6 +433,71 @@ int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/* kvm common code refers to this, but never calls it */</div><div class='add'>+	BUG();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_arch_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu,</div><div class='add'>+					   struct kvm_one_reg *reg)</div><div class='add'>+{</div><div class='add'>+	int r = -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (reg-&gt;id) {</div><div class='add'>+	case KVM_REG_S390_TODPR:</div><div class='add'>+		r = put_user(vcpu-&gt;arch.sie_block-&gt;todpr,</div><div class='add'>+			     (u32 __user *)reg-&gt;addr);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_REG_S390_EPOCHDIFF:</div><div class='add'>+		r = put_user(vcpu-&gt;arch.sie_block-&gt;epoch,</div><div class='add'>+			     (u64 __user *)reg-&gt;addr);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_REG_S390_CPU_TIMER:</div><div class='add'>+		r = put_user(vcpu-&gt;arch.sie_block-&gt;cputm,</div><div class='add'>+			     (u64 __user *)reg-&gt;addr);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_REG_S390_CLOCK_COMP:</div><div class='add'>+		r = put_user(vcpu-&gt;arch.sie_block-&gt;ckc,</div><div class='add'>+			     (u64 __user *)reg-&gt;addr);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_arch_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu,</div><div class='add'>+					   struct kvm_one_reg *reg)</div><div class='add'>+{</div><div class='add'>+	int r = -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (reg-&gt;id) {</div><div class='add'>+	case KVM_REG_S390_TODPR:</div><div class='add'>+		r = get_user(vcpu-&gt;arch.sie_block-&gt;todpr,</div><div class='add'>+			     (u32 __user *)reg-&gt;addr);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_REG_S390_EPOCHDIFF:</div><div class='add'>+		r = get_user(vcpu-&gt;arch.sie_block-&gt;epoch,</div><div class='add'>+			     (u64 __user *)reg-&gt;addr);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_REG_S390_CPU_TIMER:</div><div class='add'>+		r = get_user(vcpu-&gt;arch.sie_block-&gt;cputm,</div><div class='add'>+			     (u64 __user *)reg-&gt;addr);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_REG_S390_CLOCK_COMP:</div><div class='add'>+		r = get_user(vcpu-&gt;arch.sie_block-&gt;ckc,</div><div class='add'>+			     (u64 __user *)reg-&gt;addr);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int kvm_arch_vcpu_ioctl_initial_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	kvm_s390_vcpu_initial_reset(vcpu);</div><div class='hunk'>@@ -753,6 +828,18 @@ long kvm_arch_vcpu_ioctl(struct file *filp,</div><div class='ctx'> 	case KVM_S390_INITIAL_RESET:</div><div class='ctx'> 		r = kvm_arch_vcpu_ioctl_initial_reset(vcpu);</div><div class='ctx'> 		break;</div><div class='add'>+	case KVM_SET_ONE_REG:</div><div class='add'>+	case KVM_GET_ONE_REG: {</div><div class='add'>+		struct kvm_one_reg reg;</div><div class='add'>+		r = -EFAULT;</div><div class='add'>+		if (copy_from_user(&amp;reg, argp, sizeof(reg)))</div><div class='add'>+			break;</div><div class='add'>+		if (ioctl == KVM_SET_ONE_REG)</div><div class='add'>+			r = kvm_arch_vcpu_ioctl_set_one_reg(vcpu, &amp;reg);</div><div class='add'>+		else</div><div class='add'>+			r = kvm_arch_vcpu_ioctl_get_one_reg(vcpu, &amp;reg);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> #ifdef CONFIG_KVM_S390_UCONTROL</div><div class='ctx'> 	case KVM_S390_UCAS_MAP: {</div><div class='ctx'> 		struct kvm_s390_ucas_mapping ucasmap;</div><div class='head'>diff --git a/arch/s390/kvm/kvm-s390.h b/arch/s390/kvm/kvm-s390.h<br/>index ff28f9d1c9eb..2294377975e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kvm/kvm-s390.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kvm/kvm-s390.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kvm/kvm-s390.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kvm/kvm-s390.h</a></div><div class='hunk'>@@ -79,6 +79,7 @@ int kvm_s390_inject_sigp_stop(struct kvm_vcpu *vcpu, int action);</div><div class='ctx'> /* implemented in priv.c */</div><div class='ctx'> int kvm_s390_handle_b2(struct kvm_vcpu *vcpu);</div><div class='ctx'> int kvm_s390_handle_e5(struct kvm_vcpu *vcpu);</div><div class='add'>+int kvm_s390_handle_01(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> /* implemented in sigp.c */</div><div class='ctx'> int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu);</div><div class='head'>diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c<br/>index e5a45dbd26ac..68a6b2ed16bf 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/kvm/priv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/kvm/priv.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/kvm/priv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/kvm/priv.c</a></div><div class='hunk'>@@ -380,3 +380,34 @@ int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int handle_sckpf(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	if (vcpu-&gt;arch.sie_block-&gt;gpsw.mask &amp; PSW_MASK_PSTATE)</div><div class='add'>+		return kvm_s390_inject_program_int(vcpu,</div><div class='add'>+						   PGM_PRIVILEGED_OPERATION);</div><div class='add'>+</div><div class='add'>+	if (vcpu-&gt;run-&gt;s.regs.gprs[0] &amp; 0x00000000ffff0000)</div><div class='add'>+		return kvm_s390_inject_program_int(vcpu,</div><div class='add'>+						   PGM_SPECIFICATION);</div><div class='add'>+</div><div class='add'>+	value = vcpu-&gt;run-&gt;s.regs.gprs[0] &amp; 0x000000000000ffff;</div><div class='add'>+	vcpu-&gt;arch.sie_block-&gt;todpr = value;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static intercept_handler_t x01_handlers[256] = {</div><div class='add'>+	[0x07] = handle_sckpf,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int kvm_s390_handle_01(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	intercept_handler_t handler;</div><div class='add'>+</div><div class='add'>+	handler = x01_handlers[vcpu-&gt;arch.sie_block-&gt;ipa &amp; 0x00ff];</div><div class='add'>+	if (handler)</div><div class='add'>+		return handler(vcpu);</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/s390/lib/uaccess_mvcos.c b/arch/s390/lib/uaccess_mvcos.c<br/>index 60455f104ea3..58a75a8ae90c 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/lib/uaccess_mvcos.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/lib/uaccess_mvcos.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/lib/uaccess_mvcos.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/lib/uaccess_mvcos.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;asm/futex.h&gt;</div><div class='ctx'> #include "uaccess.h"</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define AHI	"ahi"</div><div class='ctx'> #define ALR	"alr"</div><div class='ctx'> #define CLR	"clr"</div><div class='head'>diff --git a/arch/s390/lib/uaccess_std.c b/arch/s390/lib/uaccess_std.c<br/>index bb1a7eed42ce..57e94298539b 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/lib/uaccess_std.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/lib/uaccess_std.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/lib/uaccess_std.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/lib/uaccess_std.c</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #include &lt;asm/futex.h&gt;</div><div class='ctx'> #include "uaccess.h"</div><div class='ctx'> </div><div class='del'>-#ifndef __s390x__</div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> #define AHI	"ahi"</div><div class='ctx'> #define ALR	"alr"</div><div class='ctx'> #define CLR	"clr"</div><div class='head'>diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c<br/>index 46ef3fd0663b..72cec9ecd96c 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/mm/fault.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/mm/fault.c</a></div><div class='hunk'>@@ -294,7 +294,7 @@ static inline int do_exception(struct pt_regs *regs, int access)</div><div class='ctx'> 	down_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PGSTE</div><div class='del'>-	if (test_tsk_thread_flag(current, TIF_SIE) &amp;&amp; S390_lowcore.gmap) {</div><div class='add'>+	if ((current-&gt;flags &amp; PF_VCPU) &amp;&amp; S390_lowcore.gmap) {</div><div class='ctx'> 		address = __gmap_fault(address,</div><div class='ctx'> 				     (struct gmap *) S390_lowcore.gmap);</div><div class='ctx'> 		if (address == -EFAULT) {</div><div class='hunk'>@@ -549,19 +549,15 @@ static void pfault_interrupt(struct ext_code ext_code,</div><div class='ctx'> 	if ((subcode &amp; 0xff00) != __SUBCODE_MASK)</div><div class='ctx'> 		return;</div><div class='ctx'> 	kstat_cpu(smp_processor_id()).irqs[EXTINT_PFL]++;</div><div class='del'>-	if (subcode &amp; 0x0080) {</div><div class='del'>-		/* Get the token (= pid of the affected task). */</div><div class='del'>-		pid = sizeof(void *) == 4 ? param32 : param64;</div><div class='del'>-		rcu_read_lock();</div><div class='del'>-		tsk = find_task_by_pid_ns(pid, &amp;init_pid_ns);</div><div class='del'>-		if (tsk)</div><div class='del'>-			get_task_struct(tsk);</div><div class='del'>-		rcu_read_unlock();</div><div class='del'>-		if (!tsk)</div><div class='del'>-			return;</div><div class='del'>-	} else {</div><div class='del'>-		tsk = current;</div><div class='del'>-	}</div><div class='add'>+	/* Get the token (= pid of the affected task). */</div><div class='add'>+	pid = sizeof(void *) == 4 ? param32 : param64;</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	tsk = find_task_by_pid_ns(pid, &amp;init_pid_ns);</div><div class='add'>+	if (tsk)</div><div class='add'>+		get_task_struct(tsk);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	if (!tsk)</div><div class='add'>+		return;</div><div class='ctx'> 	spin_lock(&amp;pfault_lock);</div><div class='ctx'> 	if (subcode &amp; 0x0080) {</div><div class='ctx'> 		/* signal bit is set -&gt; a page has been swapped in by VM */</div><div class='hunk'>@@ -574,6 +570,7 @@ static void pfault_interrupt(struct ext_code ext_code,</div><div class='ctx'> 			tsk-&gt;thread.pfault_wait = 0;</div><div class='ctx'> 			list_del(&amp;tsk-&gt;thread.list);</div><div class='ctx'> 			wake_up_process(tsk);</div><div class='add'>+			put_task_struct(tsk);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Completion interrupt was faster than initial</div><div class='ctx'> 			 * interrupt. Set pfault_wait to -1 so the initial</div><div class='hunk'>@@ -585,24 +582,35 @@ static void pfault_interrupt(struct ext_code ext_code,</div><div class='ctx'> 			if (tsk-&gt;state == TASK_RUNNING)</div><div class='ctx'> 				tsk-&gt;thread.pfault_wait = -1;</div><div class='ctx'> 		}</div><div class='del'>-		put_task_struct(tsk);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* signal bit not set -&gt; a real page is missing. */</div><div class='del'>-		if (tsk-&gt;thread.pfault_wait == -1) {</div><div class='add'>+		if (WARN_ON_ONCE(tsk != current))</div><div class='add'>+			goto out;</div><div class='add'>+		if (tsk-&gt;thread.pfault_wait == 1) {</div><div class='add'>+			/* Already on the list with a reference: put to sleep */</div><div class='add'>+			__set_task_state(tsk, TASK_UNINTERRUPTIBLE);</div><div class='add'>+			set_tsk_need_resched(tsk);</div><div class='add'>+		} else if (tsk-&gt;thread.pfault_wait == -1) {</div><div class='ctx'> 			/* Completion interrupt was faster than the initial</div><div class='ctx'> 			 * interrupt (pfault_wait == -1). Set pfault_wait</div><div class='ctx'> 			 * back to zero and exit. */</div><div class='ctx'> 			tsk-&gt;thread.pfault_wait = 0;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Initial interrupt arrived before completion</div><div class='del'>-			 * interrupt. Let the task sleep. */</div><div class='add'>+			 * interrupt. Let the task sleep.</div><div class='add'>+			 * An extra task reference is needed since a different</div><div class='add'>+			 * cpu may set the task state to TASK_RUNNING again</div><div class='add'>+			 * before the scheduler is reached. */</div><div class='add'>+			get_task_struct(tsk);</div><div class='ctx'> 			tsk-&gt;thread.pfault_wait = 1;</div><div class='ctx'> 			list_add(&amp;tsk-&gt;thread.list, &amp;pfault_list);</div><div class='del'>-			set_task_state(tsk, TASK_UNINTERRUPTIBLE);</div><div class='add'>+			__set_task_state(tsk, TASK_UNINTERRUPTIBLE);</div><div class='ctx'> 			set_tsk_need_resched(tsk);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+out:</div><div class='ctx'> 	spin_unlock(&amp;pfault_lock);</div><div class='add'>+	put_task_struct(tsk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __cpuinit pfault_cpu_notify(struct notifier_block *self,</div><div class='hunk'>@@ -620,6 +628,7 @@ static int __cpuinit pfault_cpu_notify(struct notifier_block *self,</div><div class='ctx'> 			list_del(&amp;thread-&gt;list);</div><div class='ctx'> 			tsk = container_of(thread, struct task_struct, thread);</div><div class='ctx'> 			wake_up_process(tsk);</div><div class='add'>+			put_task_struct(tsk);</div><div class='ctx'> 		}</div><div class='ctx'> 		spin_unlock_irq(&amp;pfault_lock);</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/s390/mm/hugetlbpage.c b/arch/s390/mm/hugetlbpage.c<br/>index 597bb2d27c3c..900de2b3cf28 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/mm/hugetlbpage.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/mm/hugetlbpage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -58,6 +58,8 @@ void arch_release_hugepage(struct page *page)</div><div class='ctx'> 	ptep = (pte_t *) page[1].index;</div><div class='ctx'> 	if (!ptep)</div><div class='ctx'> 		return;</div><div class='add'>+	clear_table((unsigned long *) ptep, _PAGE_TYPE_EMPTY,</div><div class='add'>+		    PTRS_PER_PTE * sizeof(pte_t));</div><div class='ctx'> 	page_table_free(&amp;init_mm, (unsigned long *) ptep);</div><div class='ctx'> 	page[1].index = 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/s390/mm/maccess.c b/arch/s390/mm/maccess.c<br/>index e1335dc2b1b7..921fa541dc04 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/mm/maccess.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/mm/maccess.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/mm/maccess.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/mm/maccess.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/ctl_reg.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -100,19 +101,27 @@ int memcpy_real(void *dest, void *src, size_t count)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Copy memory to absolute zero</div><div class='add'>+ * Copy memory in absolute mode (kernel to kernel)</div><div class='ctx'>  */</div><div class='del'>-void copy_to_absolute_zero(void *dest, void *src, size_t count)</div><div class='add'>+void memcpy_absolute(void *dest, void *src, size_t count)</div><div class='ctx'> {</div><div class='del'>-	unsigned long cr0;</div><div class='add'>+	unsigned long cr0, flags, prefix;</div><div class='ctx'> </div><div class='del'>-	BUG_ON((unsigned long) dest + count &gt;= sizeof(struct _lowcore));</div><div class='del'>-	preempt_disable();</div><div class='add'>+	flags = arch_local_irq_save();</div><div class='ctx'> 	__ctl_store(cr0, 0, 0);</div><div class='ctx'> 	__ctl_clear_bit(0, 28); /* disable lowcore protection */</div><div class='del'>-	memcpy_real(dest + store_prefix(), src, count);</div><div class='add'>+	prefix = store_prefix();</div><div class='add'>+	if (prefix) {</div><div class='add'>+		local_mcck_disable();</div><div class='add'>+		set_prefix(0);</div><div class='add'>+		memcpy(dest, src, count);</div><div class='add'>+		set_prefix(prefix);</div><div class='add'>+		local_mcck_enable();</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(dest, src, count);</div><div class='add'>+	}</div><div class='ctx'> 	__ctl_load(cr0, 0, 0);</div><div class='del'>-	preempt_enable();</div><div class='add'>+	arch_local_irq_restore(flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -166,3 +175,55 @@ out:</div><div class='ctx'> 	free_page((unsigned long) buf);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Check if physical address is within prefix or zero page</div><div class='add'>+ */</div><div class='add'>+static int is_swapped(unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long lc;</div><div class='add'>+	int cpu;</div><div class='add'>+</div><div class='add'>+	if (addr &lt; sizeof(struct _lowcore))</div><div class='add'>+		return 1;</div><div class='add'>+	for_each_online_cpu(cpu) {</div><div class='add'>+		lc = (unsigned long) lowcore_ptr[cpu];</div><div class='add'>+		if (addr &gt; lc + sizeof(struct _lowcore) - 1 || addr &lt; lc)</div><div class='add'>+			continue;</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Convert a physical pointer for /dev/mem access</div><div class='add'>+ *</div><div class='add'>+ * For swapped prefix pages a new buffer is returned that contains a copy of</div><div class='add'>+ * the absolute memory. The buffer size is maximum one page large.</div><div class='add'>+ */</div><div class='add'>+void *xlate_dev_mem_ptr(unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	void *bounce = (void *) addr;</div><div class='add'>+	unsigned long size;</div><div class='add'>+</div><div class='add'>+	get_online_cpus();</div><div class='add'>+	preempt_disable();</div><div class='add'>+	if (is_swapped(addr)) {</div><div class='add'>+		size = PAGE_SIZE - (addr &amp; ~PAGE_MASK);</div><div class='add'>+		bounce = (void *) __get_free_page(GFP_ATOMIC);</div><div class='add'>+		if (bounce)</div><div class='add'>+			memcpy_absolute(bounce, (void *) addr, size);</div><div class='add'>+	}</div><div class='add'>+	preempt_enable();</div><div class='add'>+	put_online_cpus();</div><div class='add'>+	return bounce;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Free converted buffer for /dev/mem access (if necessary)</div><div class='add'>+ */</div><div class='add'>+void unxlate_dev_mem_ptr(unsigned long addr, void *buf)</div><div class='add'>+{</div><div class='add'>+	if ((void *) addr != buf)</div><div class='add'>+		free_page((unsigned long) buf);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c<br/>index 6e765bf00670..a3db5a3ea083 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/mm/pgtable.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/mm/pgtable.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/mm/pgtable.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/mm/pgtable.c</a></div><div class='hunk'>@@ -822,6 +822,8 @@ int s390_enable_sie(void)</div><div class='ctx'> </div><div class='ctx'> 	/* we copy the mm and let dup_mm create the page tables with_pgstes */</div><div class='ctx'> 	tsk-&gt;mm-&gt;context.alloc_pgste = 1;</div><div class='add'>+	/* make sure that both mms have a correct rss state */</div><div class='add'>+	sync_mm_rss(tsk-&gt;mm);</div><div class='ctx'> 	mm = dup_mm(tsk);</div><div class='ctx'> 	tsk-&gt;mm-&gt;context.alloc_pgste = 0;</div><div class='ctx'> 	if (!mm)</div><div class='head'>diff --git a/arch/s390/mm/vmem.c b/arch/s390/mm/vmem.c<br/>index 4799383e2df9..71ae20df674e 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/mm/vmem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/mm/vmem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/mm/vmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/mm/vmem.c</a></div><div class='hunk'>@@ -109,7 +109,7 @@ static int vmem_add_mem(unsigned long start, unsigned long size, int ro)</div><div class='ctx'> 		pte = mk_pte_phys(address, __pgprot(ro ? _PAGE_RO : 0));</div><div class='ctx'> 		pm_dir = pmd_offset(pu_dir, address);</div><div class='ctx'> </div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> 		if (MACHINE_HAS_HPAGE &amp;&amp; !(address &amp; ~HPAGE_MASK) &amp;&amp;</div><div class='ctx'> 		    (address + HPAGE_SIZE &lt;= start + size) &amp;&amp;</div><div class='ctx'> 		    (address &gt;= HPAGE_SIZE)) {</div><div class='head'>diff --git a/arch/s390/oprofile/hwsampler.c b/arch/s390/oprofile/hwsampler.c<br/>index c6646de07bf4..a4a89fa980d6 100644<br/>--- a/<a href='/drm-misc/tree/arch/s390/oprofile/hwsampler.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/s390/oprofile/hwsampler.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/s390/oprofile/hwsampler.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/s390/oprofile/hwsampler.c</a></div><div class='hunk'>@@ -235,7 +235,7 @@ static void hws_ext_handler(struct ext_code ext_code,</div><div class='ctx'> 	if (!(param32 &amp; CPU_MF_INT_SF_MASK))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	kstat_cpu(smp_processor_id()).irqs[EXTINT_CPM]++;</div><div class='add'>+	kstat_cpu(smp_processor_id()).irqs[EXTINT_CMS]++;</div><div class='ctx'> 	atomic_xchg(&amp;cb-&gt;ext_params, atomic_read(&amp;cb-&gt;ext_params) | param32);</div><div class='ctx'> </div><div class='ctx'> 	if (hws_wq)</div><div class='head'>diff --git a/arch/score/Kconfig b/arch/score/Kconfig<br/>index 4b285779ac05..ba0f412920be 100644<br/>--- a/<a href='/drm-misc/tree/arch/score/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/score/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/score/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/Kconfig</a></div><div class='hunk'>@@ -9,6 +9,7 @@ config SCORE</div><div class='ctx'>        select HAVE_MEMBLOCK_NODE_MAP</div><div class='ctx'>        select ARCH_DISCARD_MEMBLOCK</div><div class='ctx'>        select GENERIC_CPU_DEVICES</div><div class='add'>+       select GENERIC_CLOCKEVENTS</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='ctx'> 	prompt "System type"</div><div class='hunk'>@@ -51,9 +52,6 @@ config GENERIC_HWEIGHT</div><div class='ctx'> config GENERIC_CALIBRATE_DELAY</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> menu "Kernel type"</div><div class='ctx'> </div><div class='ctx'> config 32BIT</div><div class='hunk'>@@ -68,7 +66,6 @@ config MEMORY_START</div><div class='ctx'> 	hex</div><div class='ctx'> 	default	0xa0000000</div><div class='ctx'> </div><div class='del'>-source "kernel/time/Kconfig"</div><div class='ctx'> source "kernel/Kconfig.hz"</div><div class='ctx'> source "kernel/Kconfig.preempt"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/score/include/asm/kvm_para.h b/arch/score/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/score/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/score/include/asm/processor.h b/arch/score/include/asm/processor.h<br/>index 7e22f216d771..ab3aceb54209 100644<br/>--- a/<a href='/drm-misc/tree/arch/score/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/score/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/score/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/include/asm/processor.h</a></div><div class='hunk'>@@ -26,7 +26,6 @@ extern unsigned long get_wchan(struct task_struct *p);</div><div class='ctx'> </div><div class='ctx'> #define cpu_relax()		barrier()</div><div class='ctx'> #define release_thread(thread)	do {} while (0)</div><div class='del'>-#define prepare_to_copy(tsk)	do {} while (0)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * User space process size: 2GB. This is hardcoded into a few places,</div><div class='head'>diff --git a/arch/score/include/asm/thread_info.h b/arch/score/include/asm/thread_info.h<br/>index 2205c62284db..a18006e97f1c 100644<br/>--- a/<a href='/drm-misc/tree/arch/score/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/score/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/score/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/include/asm/thread_info.h</a></div><div class='hunk'>@@ -11,10 +11,9 @@</div><div class='ctx'> #include &lt;linux/const.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* thread information allocation */</div><div class='del'>-#define THREAD_SIZE_ORDER 	(1)</div><div class='del'>-#define THREAD_SIZE 		(PAGE_SIZE &lt;&lt; THREAD_SIZE_ORDER)</div><div class='del'>-#define THREAD_MASK 		(THREAD_SIZE - _AC(1,UL))</div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='add'>+#define THREAD_SIZE_ORDER	(1)</div><div class='add'>+#define THREAD_SIZE		(PAGE_SIZE &lt;&lt; THREAD_SIZE_ORDER)</div><div class='add'>+#define THREAD_MASK		(THREAD_SIZE - _AC(1,UL))</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='hunk'>@@ -71,9 +70,6 @@ struct thread_info {</div><div class='ctx'> register struct thread_info *__current_thread_info __asm__("r28");</div><div class='ctx'> #define current_thread_info()	__current_thread_info</div><div class='ctx'> </div><div class='del'>-#define alloc_thread_info_node(tsk, node) kmalloc_node(THREAD_SIZE, GFP_KERNEL, node)</div><div class='del'>-#define free_thread_info(info) kfree(info)</div><div class='del'>-</div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #define PREEMPT_ACTIVE		0x10000000</div><div class='head'>diff --git a/arch/score/kernel/Makefile b/arch/score/kernel/Makefile<br/>index f218673b5d3d..fb1802b3f542 100644<br/>--- a/<a href='/drm-misc/tree/arch/score/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/score/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/score/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/kernel/Makefile</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> extra-y	:= head.o vmlinux.lds</div><div class='ctx'> </div><div class='del'>-obj-y += entry.o init_task.o irq.o process.o ptrace.o \</div><div class='add'>+obj-y += entry.o irq.o process.o ptrace.o \</div><div class='ctx'> 	setup.o signal.o sys_score.o time.o traps.o \</div><div class='ctx'> 	sys_call_table.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/score/kernel/init_task.c b/arch/score/kernel/init_task.c<br/>deleted file mode 100644<br/>index baa03ee217d1..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/score/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/score/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,46 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/score/kernel/init_task.c</div><div class='del'>- *</div><div class='del'>- * Score Processor version.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see the file COPYING, or write</div><div class='del'>- * to the Free Software Foundation, Inc.,</div><div class='del'>- * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is THREAD_SIZE aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/score/kernel/signal.c b/arch/score/kernel/signal.c<br/>index aa57440e4973..e382c52ca0d9 100644<br/>--- a/<a href='/drm-misc/tree/arch/score/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/score/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/score/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/score/kernel/signal.c</a></div><div class='hunk'>@@ -28,13 +28,12 @@</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/unistd.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/tracehook.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/syscalls.h&gt;</div><div class='ctx'> #include &lt;asm/ucontext.h&gt;</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> struct rt_sigframe {</div><div class='ctx'> 	u32 rs_ass[4];		/* argument save space */</div><div class='ctx'> 	u32 rs_code[2];		/* signal trampoline */</div><div class='hunk'>@@ -152,17 +151,16 @@ score_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	stack_t st;</div><div class='ctx'> 	int sig;</div><div class='ctx'> </div><div class='add'>+	/* Always make any pending restarted system calls return -EINTR */</div><div class='add'>+	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='add'>+</div><div class='ctx'> 	frame = (struct rt_sigframe __user *) regs-&gt;regs[0];</div><div class='ctx'> 	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;rs_uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	current-&gt;blocked = set;</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	sig = restore_sigcontext(regs, &amp;frame-&gt;rs_uc.uc_mcontext);</div><div class='ctx'> 	if (sig &lt; 0)</div><div class='hunk'>@@ -236,17 +234,13 @@ static int setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> give_sigsegv:</div><div class='del'>-	if (signr == SIGSEGV)</div><div class='del'>-		ka-&gt;sa.sa_handler = SIG_DFL;</div><div class='del'>-	force_sig(SIGSEGV, current);</div><div class='add'>+	force_sigsegv(signr, current);</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int handle_signal(unsigned long sig, siginfo_t *info,</div><div class='del'>-	struct k_sigaction *ka, sigset_t *oldset, struct pt_regs *regs)</div><div class='add'>+static void handle_signal(unsigned long sig, siginfo_t *info,</div><div class='add'>+	struct k_sigaction *ka, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='ctx'> 	if (regs-&gt;is_syscall) {</div><div class='ctx'> 		switch (regs-&gt;regs[4]) {</div><div class='ctx'> 		case ERESTART_RESTARTBLOCK:</div><div class='hunk'>@@ -270,22 +264,15 @@ static int handle_signal(unsigned long sig, siginfo_t *info,</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Set up the stack frame</div><div class='ctx'> 	 */</div><div class='del'>-	ret = setup_rt_frame(ka, regs, sig, oldset, info);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	sigorsets(&amp;current-&gt;blocked, &amp;current-&gt;blocked, &amp;ka-&gt;sa.sa_mask);</div><div class='del'>-	if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-		sigaddset(&amp;current-&gt;blocked, sig);</div><div class='del'>-	recalc_sigpending();</div><div class='del'>-	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='add'>+	if (setup_rt_frame(ka, regs, sig, sigmask_to_save(), info) &lt; 0)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void do_signal(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> </div><div class='hunk'>@@ -297,25 +284,10 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		/* Actually deliver the signal.  */</div><div class='del'>-		if (handle_signal(signr, &amp;info, &amp;ka, oldset, regs) == 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * A signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag.</div><div class='del'>-			 */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		handle_signal(signr, &amp;info, &amp;ka, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -342,10 +314,7 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	 * If there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back</div><div class='ctx'> 	 */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -356,6 +325,10 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, void *unused,</div><div class='ctx'> 				__u32 thread_info_flags)</div><div class='ctx'> {</div><div class='ctx'> 	/* deal with pending signal delivery */</div><div class='del'>-	if (thread_info_flags &amp; (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))</div><div class='add'>+	if (thread_info_flags &amp; _TIF_SIGPENDING)</div><div class='ctx'> 		do_signal(regs);</div><div class='add'>+	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='add'>+		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='add'>+		tracehook_notify_resume(regs);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig<br/>index ff9e033ce626..99bcd0ee838d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/Kconfig</a></div><div class='hunk'>@@ -13,6 +13,7 @@ config SUPERH</div><div class='ctx'> 	select HAVE_DMA_ATTRS</div><div class='ctx'> 	select HAVE_IRQ_WORK</div><div class='ctx'> 	select HAVE_PERF_EVENTS</div><div class='add'>+	select ARCH_HAVE_CUSTOM_GPIO_H</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)</div><div class='ctx'> 	select PERF_USE_VMALLOC</div><div class='ctx'> 	select HAVE_KERNEL_GZIP</div><div class='hunk'>@@ -28,6 +29,9 @@ config SUPERH</div><div class='ctx'> 	select RTC_LIB</div><div class='ctx'> 	select GENERIC_ATOMIC64</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST</div><div class='ctx'> 	help</div><div class='ctx'> 	  The SuperH is a RISC processor targeted for use in embedded systems</div><div class='ctx'> 	  and consumer electronics; it was also used in the Sega Dreamcast</div><div class='hunk'>@@ -86,16 +90,6 @@ config GENERIC_GPIO</div><div class='ctx'> config GENERIC_CALIBRATE_DELAY</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='del'>-config GENERIC_CLOCKEVENTS_BROADCAST</div><div class='del'>-	bool</div><div class='del'>-</div><div class='del'>-config GENERIC_CMOS_UPDATE</div><div class='del'>-	def_bool y</div><div class='del'>-	depends on SH_SH03 || SH_DREAMCAST</div><div class='del'>-</div><div class='ctx'> config GENERIC_LOCKBREAK</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on SMP &amp;&amp; PREEMPT</div><div class='hunk'>@@ -152,12 +146,10 @@ config ARCH_NO_VIRT_TO_BUS</div><div class='ctx'> config ARCH_HAS_DEFAULT_IDLE</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config ARCH_HAS_CPU_IDLE_WAIT</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config NO_IOPORT</div><div class='ctx'> 	def_bool !PCI</div><div class='del'>-	depends on !SH_CAYMAN &amp;&amp; !SH_SH4202_MICRODEV &amp;&amp; !SH_SHMIN</div><div class='add'>+	depends on !SH_CAYMAN &amp;&amp; !SH_SH4202_MICRODEV &amp;&amp; !SH_SHMIN &amp;&amp; \</div><div class='add'>+		   !SH_HP6XX &amp;&amp; !SH_SOLUTION_ENGINE</div><div class='ctx'> </div><div class='ctx'> config IO_TRAPPED</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -288,6 +280,20 @@ config CPU_SUBTYPE_SH7263</div><div class='ctx'> 	select SYS_SUPPORTS_CMT</div><div class='ctx'> 	select SYS_SUPPORTS_MTU2</div><div class='ctx'> </div><div class='add'>+config CPU_SUBTYPE_SH7264</div><div class='add'>+	bool "Support SH7264 processor"</div><div class='add'>+	select CPU_SH2A</div><div class='add'>+	select CPU_HAS_FPU</div><div class='add'>+	select SYS_SUPPORTS_CMT</div><div class='add'>+	select SYS_SUPPORTS_MTU2</div><div class='add'>+</div><div class='add'>+config CPU_SUBTYPE_SH7269</div><div class='add'>+	bool "Support SH7269 processor"</div><div class='add'>+	select CPU_SH2A</div><div class='add'>+	select CPU_HAS_FPU</div><div class='add'>+	select SYS_SUPPORTS_CMT</div><div class='add'>+	select SYS_SUPPORTS_MTU2</div><div class='add'>+</div><div class='ctx'> config CPU_SUBTYPE_MXG</div><div class='ctx'> 	bool "Support MX-G processor"</div><div class='ctx'> 	select CPU_SH2A</div><div class='hunk'>@@ -427,6 +433,16 @@ config CPU_SUBTYPE_SH7724</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select SH7724 if you have an SH-MobileR2R CPU.</div><div class='ctx'> </div><div class='add'>+config CPU_SUBTYPE_SH7734</div><div class='add'>+	bool "Support SH7734 processor"</div><div class='add'>+	select CPU_SH4A</div><div class='add'>+	select CPU_SHX2</div><div class='add'>+	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='add'>+	select USB_ARCH_HAS_OHCI</div><div class='add'>+	select USB_ARCH_HAS_EHCI</div><div class='add'>+	help</div><div class='add'>+	  Select SH7734 if you have a SH4A SH7734 CPU.</div><div class='add'>+</div><div class='ctx'> config CPU_SUBTYPE_SH7757</div><div class='ctx'> 	bool "Support SH7757 processor"</div><div class='ctx'> 	select CPU_SH4A</div><div class='hunk'>@@ -584,9 +600,9 @@ config SH_CLK_CPG</div><div class='ctx'> config SH_CLK_CPG_LEGACY</div><div class='ctx'> 	depends on SH_CLK_CPG</div><div class='ctx'> 	def_bool y if !CPU_SUBTYPE_SH7785 &amp;&amp; !ARCH_SHMOBILE &amp;&amp; \</div><div class='del'>-		      !CPU_SHX3 &amp;&amp; !CPU_SUBTYPE_SH7757</div><div class='del'>-</div><div class='del'>-source "kernel/time/Kconfig"</div><div class='add'>+		      !CPU_SHX3 &amp;&amp; !CPU_SUBTYPE_SH7757 &amp;&amp; \</div><div class='add'>+		      !CPU_SUBTYPE_SH7734 &amp;&amp; !CPU_SUBTYPE_SH7264 &amp;&amp; \</div><div class='add'>+		      !CPU_SUBTYPE_SH7269</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='hunk'>@@ -685,6 +701,20 @@ config SECCOMP</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='add'>+config CC_STACKPROTECTOR</div><div class='add'>+	bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"</div><div class='add'>+	depends on SUPERH32 &amp;&amp; EXPERIMENTAL</div><div class='add'>+	help</div><div class='add'>+	  This option turns on the -fstack-protector GCC feature. This</div><div class='add'>+	  feature puts, at the beginning of functions, a canary value on</div><div class='add'>+	  the stack just before the return address, and validates</div><div class='add'>+	  the value just before actually returning.  Stack based buffer</div><div class='add'>+	  overflows (that need to overwrite this return address) now also</div><div class='add'>+	  overwrite the canary, which gets detected and the attack is then</div><div class='add'>+	  neutralized via a kernel panic.</div><div class='add'>+</div><div class='add'>+	  This feature requires gcc version 4.2 or above.</div><div class='add'>+</div><div class='ctx'> config SMP</div><div class='ctx'> 	bool "Symmetric multi-processing support"</div><div class='ctx'> 	depends on SYS_SUPPORTS_SMP</div><div class='head'>diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu<br/>index ddf096c7d8bf..770ff2d5b94d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/Kconfig.cpu?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/Kconfig.cpu</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/Kconfig.cpu?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/Kconfig.cpu</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> menu "Processor features"</div><div class='ctx'> </div><div class='ctx'> choice</div><div class='del'>-	prompt "Endianess selection" </div><div class='add'>+	prompt "Endianness selection" </div><div class='ctx'> 	default CPU_LITTLE_ENDIAN</div><div class='ctx'> 	help</div><div class='ctx'> 	  Some SuperH machines can be configured for either little or big</div><div class='head'>diff --git a/arch/sh/Makefile b/arch/sh/Makefile<br/>index 3fc0f413777c..46edf070da1c 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/Makefile</a></div><div class='hunk'>@@ -124,7 +124,7 @@ endif</div><div class='ctx'> </div><div class='ctx'> export ld-bfd BITS</div><div class='ctx'> </div><div class='del'>-head-y	:= arch/sh/kernel/init_task.o arch/sh/kernel/head_$(BITS).o</div><div class='add'>+head-y	:= arch/sh/kernel/head_$(BITS).o</div><div class='ctx'> </div><div class='ctx'> core-y				+= arch/sh/kernel/ arch/sh/mm/ arch/sh/boards/</div><div class='ctx'> core-$(CONFIG_SH_FPU_EMU)	+= arch/sh/math-emu/</div><div class='hunk'>@@ -199,6 +199,10 @@ ifeq ($(CONFIG_DWARF_UNWINDER),y)</div><div class='ctx'>   KBUILD_CFLAGS += -fasynchronous-unwind-tables</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+ifeq ($(CONFIG_CC_STACKPROTECTOR),y)</div><div class='add'>+  KBUILD_CFLAGS += -fstack-protector</div><div class='add'>+endif</div><div class='add'>+</div><div class='ctx'> libs-$(CONFIG_SUPERH32)		:= arch/sh/lib/	$(libs-y)</div><div class='ctx'> libs-$(CONFIG_SUPERH64)		:= arch/sh/lib64/ $(libs-y)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig<br/>index d893411022d5..1f56b35d3248 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/Kconfig</a></div><div class='hunk'>@@ -54,6 +54,7 @@ config SH_7724_SOLUTION_ENGINE</div><div class='ctx'> 	select SOLUTION_ENGINE</div><div class='ctx'> 	depends on CPU_SUBTYPE_SH7724</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='add'>+	select SND_SOC_AK4642 if SND_SIMPLE_CARD</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select 7724 SolutionEngine if configuring for a Hitachi SH7724</div><div class='ctx'> 	  evaluation board.</div><div class='hunk'>@@ -133,7 +134,8 @@ config SH_RTS7751R2D</div><div class='ctx'> </div><div class='ctx'> config SH_RSK</div><div class='ctx'> 	bool "Renesas Starter Kit"</div><div class='del'>-	depends on CPU_SUBTYPE_SH7201 || CPU_SUBTYPE_SH7203</div><div class='add'>+	depends on CPU_SUBTYPE_SH7201 || CPU_SUBTYPE_SH7203 || \</div><div class='add'>+	  CPU_SUBTYPE_SH7264 || CPU_SUBTYPE_SH7269</div><div class='ctx'> 	help</div><div class='ctx'> 	 Select this option if configuring for any of the RSK+ MCU</div><div class='ctx'> 	 evaluation platforms.</div><div class='hunk'>@@ -223,6 +225,7 @@ config SH_ECOVEC</div><div class='ctx'> 	bool "EcoVec"</div><div class='ctx'> 	depends on CPU_SUBTYPE_SH7724</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='add'>+	select SND_SOC_DA7210 if SND_SIMPLE_CARD</div><div class='ctx'> 	help</div><div class='ctx'> 	  Renesas "R0P7724LC0011/21RL (EcoVec)" support.</div><div class='ctx'> </div><div class='hunk'>@@ -338,8 +341,6 @@ config SH_APSH4AD0A</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A.</div><div class='ctx'> </div><div class='del'>-endmenu</div><div class='del'>-</div><div class='ctx'> source "arch/sh/boards/mach-r2d/Kconfig"</div><div class='ctx'> source "arch/sh/boards/mach-highlander/Kconfig"</div><div class='ctx'> source "arch/sh/boards/mach-sdk7780/Kconfig"</div><div class='hunk'>@@ -359,3 +360,5 @@ config SH_MAGIC_PANEL_R2_VERSION</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='add'>+</div><div class='add'>+endmenu</div><div class='head'>diff --git a/arch/sh/boards/board-edosk7705.c b/arch/sh/boards/board-edosk7705.c<br/>index 541d8a281035..5e24c17bbdad 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/board-edosk7705.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/board-edosk7705.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/board-edosk7705.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-edosk7705.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/smc91x.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;asm/machvec.h&gt;</div><div class='ctx'> #include &lt;asm/sizes.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -20,7 +21,7 @@</div><div class='ctx'> #define SMC_IO_OFFSET	0x300</div><div class='ctx'> #define SMC_IOADDR	(SMC_IOBASE + SMC_IO_OFFSET)</div><div class='ctx'> </div><div class='del'>-#define ETHERNET_IRQ	0x09</div><div class='add'>+#define ETHERNET_IRQ	evt2irq(0x320)</div><div class='ctx'> </div><div class='ctx'> static void __init sh_edosk7705_init_irq(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -73,6 +74,5 @@ device_initcall(init_edosk7705_devices);</div><div class='ctx'>  */</div><div class='ctx'> static struct sh_machine_vector mv_edosk7705 __initmv = {</div><div class='ctx'> 	.mv_name		= "EDOSK7705",</div><div class='del'>-	.mv_nr_irqs		= 80,</div><div class='ctx'> 	.mv_init_irq		= sh_edosk7705_init_irq,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/board-edosk7760.c b/arch/sh/boards/board-edosk7760.c<br/>index e9656a2cc4cc..bab5b9513904 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/board-edosk7760.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/board-edosk7760.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/board-edosk7760.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-edosk7760.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/smc91x.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='ctx'> #include &lt;asm/machvec.h&gt;</div><div class='hunk'>@@ -40,8 +41,6 @@</div><div class='ctx'> #define SMC_IO_OFFSET	0x300</div><div class='ctx'> #define SMC_IOADDR	(SMC_IOBASE + SMC_IO_OFFSET)</div><div class='ctx'> </div><div class='del'>-#define ETHERNET_IRQ	5</div><div class='del'>-</div><div class='ctx'> /* NOR flash */</div><div class='ctx'> static struct mtd_partition edosk7760_nor_flash_partitions[] = {</div><div class='ctx'> 	{</div><div class='hunk'>@@ -99,8 +98,8 @@ static struct resource sh7760_i2c1_res[] = {</div><div class='ctx'> 		.end	= SH7760_I2C1_MMIOEND,</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},{</div><div class='del'>-		.start	= SH7760_I2C1_IRQ,</div><div class='del'>-		.end	= SH7760_I2C1_IRQ,</div><div class='add'>+		.start	= evt2irq(0x9e0),</div><div class='add'>+		.end	= evt2irq(0x9e0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -122,8 +121,8 @@ static struct resource sh7760_i2c0_res[] = {</div><div class='ctx'> 		.end	= SH7760_I2C0_MMIOEND,</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	}, {</div><div class='del'>-		.start	= SH7760_I2C0_IRQ,</div><div class='del'>-		.end	= SH7760_I2C0_IRQ,</div><div class='add'>+		.start	= evt2irq(0x9c0),</div><div class='add'>+		.end	= evt2irq(0x9c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -150,8 +149,8 @@ static struct resource smc91x_res[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= ETHERNET_IRQ,</div><div class='del'>-		.end	= ETHERNET_IRQ,</div><div class='add'>+		.start	= evt2irq(0x2a0),</div><div class='add'>+		.end	= evt2irq(0x2a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ ,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='hunk'>@@ -189,5 +188,4 @@ device_initcall(init_edosk7760_devices);</div><div class='ctx'>  */</div><div class='ctx'> struct sh_machine_vector mv_edosk7760 __initmv = {</div><div class='ctx'> 	.mv_name	= "EDOSK7760",</div><div class='del'>-	.mv_nr_irqs	= 128,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/board-espt.c b/arch/sh/boards/board-espt.c<br/>index b3ae9d38cbc0..6cba0a7068bc 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/board-espt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/board-espt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/board-espt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-espt.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/sh_eth.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;asm/machvec.h&gt;</div><div class='ctx'> #include &lt;asm/sizes.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -71,7 +72,7 @@ static struct resource sh_eth_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	}, {</div><div class='ctx'> </div><div class='del'>-		.start  = 57,   /* irq number */</div><div class='add'>+		.start  = evt2irq(0x920),   /* irq number */</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/board-magicpanelr2.c b/arch/sh/boards/board-magicpanelr2.c<br/>index b2ca1d9948fb..90568f9de3a4 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/board-magicpanelr2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/board-magicpanelr2.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/board-magicpanelr2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-magicpanelr2.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/mtd/partitions.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/map.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;mach/magicpanelr2.h&gt;</div><div class='ctx'> #include &lt;asm/heartbeat.h&gt;</div><div class='ctx'> #include &lt;cpu/sh7720.h&gt;</div><div class='hunk'>@@ -245,8 +246,8 @@ static struct resource smsc911x_resources[] = {</div><div class='ctx'> 		.flags		= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start		= 35,</div><div class='del'>-		.end		= 35,</div><div class='add'>+		.start		= evt2irq(0x660),</div><div class='add'>+		.end		= evt2irq(0x660),</div><div class='ctx'> 		.flags		= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -358,17 +359,17 @@ static void __init init_mpr2_IRQ(void)</div><div class='ctx'> {</div><div class='ctx'> 	plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-5 */</div><div class='ctx'> </div><div class='del'>-	irq_set_irq_type(32, IRQ_TYPE_LEVEL_LOW);    /* IRQ0 CAN1 */</div><div class='del'>-	irq_set_irq_type(33, IRQ_TYPE_LEVEL_LOW);    /* IRQ1 CAN2 */</div><div class='del'>-	irq_set_irq_type(34, IRQ_TYPE_LEVEL_LOW);    /* IRQ2 CAN3 */</div><div class='del'>-	irq_set_irq_type(35, IRQ_TYPE_LEVEL_LOW);    /* IRQ3 SMSC9115 */</div><div class='del'>-	irq_set_irq_type(36, IRQ_TYPE_EDGE_RISING);  /* IRQ4 touchscreen */</div><div class='del'>-	irq_set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */</div><div class='del'>-</div><div class='del'>-	intc_set_priority(32, 13);		/* IRQ0 CAN1 */</div><div class='del'>-	intc_set_priority(33, 13);		/* IRQ0 CAN2 */</div><div class='del'>-	intc_set_priority(34, 13);		/* IRQ0 CAN3 */</div><div class='del'>-	intc_set_priority(35, 6);		/* IRQ3 SMSC9115 */</div><div class='add'>+	irq_set_irq_type(evt2irq(0x600), IRQ_TYPE_LEVEL_LOW);    /* IRQ0 CAN1 */</div><div class='add'>+	irq_set_irq_type(evt2irq(0x620), IRQ_TYPE_LEVEL_LOW);    /* IRQ1 CAN2 */</div><div class='add'>+	irq_set_irq_type(evt2irq(0x640), IRQ_TYPE_LEVEL_LOW);    /* IRQ2 CAN3 */</div><div class='add'>+	irq_set_irq_type(evt2irq(0x660), IRQ_TYPE_LEVEL_LOW);    /* IRQ3 SMSC9115 */</div><div class='add'>+	irq_set_irq_type(evt2irq(0x680), IRQ_TYPE_EDGE_RISING);  /* IRQ4 touchscreen */</div><div class='add'>+	irq_set_irq_type(evt2irq(0x6a0), IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */</div><div class='add'>+</div><div class='add'>+	intc_set_priority(evt2irq(0x600), 13);		/* IRQ0 CAN1 */</div><div class='add'>+	intc_set_priority(evt2irq(0x620), 13);		/* IRQ0 CAN2 */</div><div class='add'>+	intc_set_priority(evt2irq(0x640), 13);		/* IRQ0 CAN3 */</div><div class='add'>+	intc_set_priority(evt2irq(0x660), 6);		/* IRQ3 SMSC9115 */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/sh/boards/board-polaris.c b/arch/sh/boards/board-polaris.c<br/>index 594866356c24..37d03c097ae9 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/board-polaris.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/board-polaris.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/board-polaris.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-polaris.c</a></div><div class='hunk'>@@ -141,6 +141,5 @@ static void __init init_polaris_irq(void)</div><div class='ctx'> </div><div class='ctx'> static struct sh_machine_vector mv_polaris __initmv = {</div><div class='ctx'> 	.mv_name		= "Polaris",</div><div class='del'>-	.mv_nr_irqs		= 61,</div><div class='ctx'> 	.mv_init_irq		= init_polaris_irq,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/board-secureedge5410.c b/arch/sh/boards/board-secureedge5410.c<br/>index 03820c3c93d4..98b36205aa7b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/board-secureedge5410.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/board-secureedge5410.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/board-secureedge5410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-secureedge5410.c</a></div><div class='hunk'>@@ -71,6 +71,5 @@ static void __init init_snapgear_IRQ(void)</div><div class='ctx'>  */</div><div class='ctx'> static struct sh_machine_vector mv_snapgear __initmv = {</div><div class='ctx'> 	.mv_name		= "SnapGear SecureEdge5410",</div><div class='del'>-	.mv_nr_irqs		= 72,</div><div class='ctx'> 	.mv_init_irq		= init_snapgear_IRQ,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c<br/>index 24b1ee410daa..5087f8bb4cff 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/board-sh7757lcr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/board-sh7757lcr.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/board-sh7757lcr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-sh7757lcr.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/mmc/sh_mmcif.h&gt;</div><div class='ctx'> #include &lt;linux/mmc/sh_mobile_sdhi.h&gt;</div><div class='ctx'> #include &lt;linux/sh_eth.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/usb/renesas_usbhs.h&gt;</div><div class='ctx'> #include &lt;cpu/sh7757.h&gt;</div><div class='ctx'> #include &lt;asm/heartbeat.h&gt;</div><div class='hunk'>@@ -65,8 +66,8 @@ static struct resource sh_eth0_resources[] = {</div><div class='ctx'> 		.end    = 0xfef001ff,</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	}, {</div><div class='del'>-		.start  = 84,</div><div class='del'>-		.end    = 84,</div><div class='add'>+		.start  = evt2irq(0xc80),</div><div class='add'>+		.end    = evt2irq(0xc80),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -94,8 +95,8 @@ static struct resource sh_eth1_resources[] = {</div><div class='ctx'> 		.end    = 0xfef009ff,</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	}, {</div><div class='del'>-		.start  = 84,</div><div class='del'>-		.end    = 84,</div><div class='add'>+		.start  = evt2irq(0xc80),</div><div class='add'>+		.end    = evt2irq(0xc80),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -139,8 +140,8 @@ static struct resource sh_eth_giga0_resources[] = {</div><div class='ctx'> 		.end    = 0xfee01fff,</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	}, {</div><div class='del'>-		.start  = 315,</div><div class='del'>-		.end    = 315,</div><div class='add'>+		.start  = evt2irq(0x2960),</div><div class='add'>+		.end    = evt2irq(0x2960),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -174,8 +175,8 @@ static struct resource sh_eth_giga1_resources[] = {</div><div class='ctx'> 		.end    = 0xfee01fff,</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	}, {</div><div class='del'>-		.start  = 316,</div><div class='del'>-		.end    = 316,</div><div class='add'>+		.start  = evt2irq(0x2980),</div><div class='add'>+		.end    = evt2irq(0x2980),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -206,11 +207,11 @@ static struct resource sh_mmcif_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 211,</div><div class='add'>+		.start	= evt2irq(0x1c60),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='del'>-		.start	= 212,</div><div class='add'>+		.start	= evt2irq(0x1c80),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -248,7 +249,7 @@ static struct resource sdhi_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 20,</div><div class='add'>+		.start  = evt2irq(0x480),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -284,8 +285,8 @@ static struct resource usb0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 50,</div><div class='del'>-		.end	= 50,</div><div class='add'>+		.start	= evt2irq(0x840),</div><div class='add'>+		.end	= evt2irq(0x840),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c<br/>index d0d6221d7c2e..2c4771ee84cd 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/board-sh7785lcr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/board-sh7785lcr.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/board-sh7785lcr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-sh7785lcr.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;linux/i2c-pca-platform.h&gt;</div><div class='ctx'> #include &lt;linux/i2c-algo-pca.h&gt;</div><div class='ctx'> #include &lt;linux/usb/r8a66597.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='hunk'>@@ -105,8 +106,8 @@ static struct resource r8a66597_usb_host_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 2,</div><div class='del'>-		.end	= 2,</div><div class='add'>+		.start	= evt2irq(0x240),</div><div class='add'>+		.end	= evt2irq(0x240),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -135,7 +136,7 @@ static struct resource sm501_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2]	= {</div><div class='del'>-		.start	= 10,</div><div class='add'>+		.start	= evt2irq(0x340),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -223,8 +224,8 @@ static struct resource i2c_proto_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM | IORESOURCE_MEM_8BIT,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 12,</div><div class='del'>-		.end	= 12,</div><div class='add'>+		.start	= evt2irq(0x380),</div><div class='add'>+		.end	= evt2irq(0x380),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -236,8 +237,8 @@ static struct resource i2c_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM | IORESOURCE_MEM_8BIT,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 12,</div><div class='del'>-		.end	= 12,</div><div class='add'>+		.start	= evt2irq(0x380),</div><div class='add'>+		.end	= evt2irq(0x380),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c<br/>index 24e3316c5c17..b52abcc5259a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/board-urquell.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/board-urquell.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/board-urquell.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/board-urquell.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;mach/urquell.h&gt;</div><div class='ctx'> #include &lt;cpu/sh7786.h&gt;</div><div class='ctx'> #include &lt;asm/heartbeat.h&gt;</div><div class='hunk'>@@ -78,7 +79,7 @@ static struct resource smc91x_eth_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 11,</div><div class='add'>+		.start  = evt2irq(0x360),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c<br/>index 8cf02e343333..f33ebf447073 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-ap325rxa/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-ap325rxa/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-ap325rxa/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-ap325rxa/setup.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/smsc911x.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;media/ov772x.h&gt;</div><div class='ctx'> #include &lt;media/soc_camera.h&gt;</div><div class='ctx'> #include &lt;media/soc_camera_platform.h&gt;</div><div class='hunk'>@@ -47,8 +48,8 @@ static struct resource smsc9118_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 35,</div><div class='del'>-		.end	= 35,</div><div class='add'>+		.start	= evt2irq(0x660),</div><div class='add'>+		.end	= evt2irq(0x660),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='hunk'>@@ -166,7 +167,7 @@ static int ap320_wvga_set_brightness(int brightness)</div><div class='ctx'> 		__raw_writew(0, FPGA_BKLREG);</div><div class='ctx'> 		gpio_set_value(GPIO_PTS3, 1);</div><div class='ctx'> 	}</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -236,7 +237,7 @@ static struct resource lcdc_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 28,</div><div class='add'>+		.start	= evt2irq(0x580),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -404,7 +405,7 @@ static struct resource ceu_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 52,</div><div class='add'>+		.start  = evt2irq(0x880),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='hunk'>@@ -430,7 +431,7 @@ static struct resource sdhi0_cn3_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 100,</div><div class='add'>+		.start	= evt2irq(0xe80),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -457,7 +458,7 @@ static struct resource sdhi1_cn7_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 23,</div><div class='add'>+		.start	= evt2irq(0x4e0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-cayman/setup.c b/arch/sh/boards/mach-cayman/setup.c<br/>index e89e8e122a26..340fd40b381d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-cayman/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-cayman/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-cayman/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-cayman/setup.c</a></div><div class='hunk'>@@ -181,7 +181,6 @@ extern void init_cayman_irq(void);</div><div class='ctx'> </div><div class='ctx'> static struct sh_machine_vector mv_cayman __initmv = {</div><div class='ctx'> 	.mv_name		= "Hitachi Cayman",</div><div class='del'>-	.mv_nr_irqs		= 64,</div><div class='ctx'> 	.mv_ioport_map		= cayman_ioport_map,</div><div class='ctx'> 	.mv_init_irq		= init_cayman_irq,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c<br/>index d12fe9ddf3da..4158d70c0dea 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-ecovec24/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-ecovec24/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-ecovec24/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-ecovec24/setup.c</a></div><div class='hunk'>@@ -29,9 +29,11 @@</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='ctx'> #include &lt;linux/input/sh_keysc.h&gt;</div><div class='ctx'> #include &lt;linux/sh_eth.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='ctx'> #include &lt;video/sh_mobile_lcdc.h&gt;</div><div class='ctx'> #include &lt;sound/sh_fsi.h&gt;</div><div class='add'>+#include &lt;sound/simple_card.h&gt;</div><div class='ctx'> #include &lt;media/sh_mobile_ceu.h&gt;</div><div class='ctx'> #include &lt;media/soc_camera.h&gt;</div><div class='ctx'> #include &lt;media/tw9910.h&gt;</div><div class='hunk'>@@ -137,7 +139,7 @@ static struct resource sh_eth_resources[] = {</div><div class='ctx'> 		.flags = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start = 91,</div><div class='add'>+		.start = evt2irq(0xd60),</div><div class='ctx'> 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -178,8 +180,8 @@ static struct resource usb0_host_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 65,</div><div class='del'>-		.end	= 65,</div><div class='add'>+		.start	= evt2irq(0xa20),</div><div class='add'>+		.end	= evt2irq(0xa20),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -214,8 +216,8 @@ static struct resource usb1_common_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 66,</div><div class='del'>-		.end	= 66,</div><div class='add'>+		.start	= evt2irq(0xa40),</div><div class='add'>+		.end	= evt2irq(0xa40),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -261,8 +263,8 @@ static struct resource usbhs_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 66,</div><div class='del'>-		.end	= 66,</div><div class='add'>+		.start	= evt2irq(0xa40),</div><div class='add'>+		.end	= evt2irq(0xa40),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -348,7 +350,7 @@ static struct resource lcdc_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 106,</div><div class='add'>+		.start	= evt2irq(0xf40),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -375,7 +377,7 @@ static struct resource ceu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 52,</div><div class='add'>+		.start  = evt2irq(0x880),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='hunk'>@@ -406,7 +408,7 @@ static struct resource ceu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 63,</div><div class='add'>+		.start  = evt2irq(0x9e0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='hunk'>@@ -437,7 +439,7 @@ static struct i2c_board_info i2c1_devices[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		I2C_BOARD_INFO("lis3lv02d", 0x1c),</div><div class='del'>-		.irq = 33,</div><div class='add'>+		.irq = evt2irq(0x620),</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -463,7 +465,7 @@ static struct resource keysc_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 79,</div><div class='add'>+		.start  = evt2irq(0xbe0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -479,7 +481,8 @@ static struct platform_device keysc_device = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* TouchScreen */</div><div class='del'>-#define IRQ0 32</div><div class='add'>+#define IRQ0 evt2irq(0x600)</div><div class='add'>+</div><div class='ctx'> static int ts_get_pendown_state(void)</div><div class='ctx'> {</div><div class='ctx'> 	int val = 0;</div><div class='hunk'>@@ -544,7 +547,7 @@ static struct resource sdhi0_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 100,</div><div class='add'>+		.start  = evt2irq(0xe80),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -588,7 +591,7 @@ static struct resource sdhi1_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 23,</div><div class='add'>+		.start  = evt2irq(0x4e0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -653,7 +656,7 @@ static struct resource msiof0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 84,</div><div class='add'>+		.start	= evt2irq(0xc80),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -794,7 +797,7 @@ static struct resource fsi_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 108,</div><div class='add'>+		.start  = evt2irq(0xf80),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -809,6 +812,30 @@ static struct platform_device fsi_device = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct asoc_simple_dai_init_info fsi_da7210_init_info = {</div><div class='add'>+	.fmt		= SND_SOC_DAIFMT_I2S,</div><div class='add'>+	.codec_daifmt	= SND_SOC_DAIFMT_CBM_CFM,</div><div class='add'>+	.cpu_daifmt	= SND_SOC_DAIFMT_CBS_CFS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct asoc_simple_card_info fsi_da7210_info = {</div><div class='add'>+	.name		= "DA7210",</div><div class='add'>+	.card		= "FSIB-DA7210",</div><div class='add'>+	.cpu_dai	= "fsib-dai",</div><div class='add'>+	.codec		= "da7210.0-001a",</div><div class='add'>+	.platform	= "sh_fsi.0",</div><div class='add'>+	.codec_dai	= "da7210-hifi",</div><div class='add'>+	.init		= &amp;fsi_da7210_init_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device fsi_da7210_device = {</div><div class='add'>+	.name	= "asoc-simple-card",</div><div class='add'>+	.dev	= {</div><div class='add'>+		.platform_data	= &amp;fsi_da7210_info,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /* IrDA */</div><div class='ctx'> static struct resource irda_resources[] = {</div><div class='ctx'> 	[0] = {</div><div class='hunk'>@@ -818,7 +845,7 @@ static struct resource irda_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 20,</div><div class='add'>+		.start  = evt2irq(0x480),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -855,7 +882,7 @@ static struct resource sh_vou_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 55,</div><div class='add'>+		.start  = evt2irq(0x8e0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -891,12 +918,12 @@ static struct resource sh_mmcif_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='ctx'> 		/* MMC2I */</div><div class='del'>-		.start	= 29,</div><div class='add'>+		.start	= evt2irq(0x5a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='ctx'> 		/* MMC3I */</div><div class='del'>-		.start	= 30,</div><div class='add'>+		.start	= evt2irq(0x5c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -945,6 +972,7 @@ static struct platform_device *ecovec_devices[] __initdata = {</div><div class='ctx'> 	&amp;camera_devices[1],</div><div class='ctx'> 	&amp;camera_devices[2],</div><div class='ctx'> 	&amp;fsi_device,</div><div class='add'>+	&amp;fsi_da7210_device,</div><div class='ctx'> 	&amp;irda_device,</div><div class='ctx'> 	&amp;vou_device,</div><div class='ctx'> #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)</div><div class='head'>diff --git a/arch/sh/boards/mach-hp6xx/setup.c b/arch/sh/boards/mach-hp6xx/setup.c<br/>index 8c9add5f4cfa..05797b33f68e 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-hp6xx/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-hp6xx/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-hp6xx/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-hp6xx/setup.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;sound/sh_dac_audio.h&gt;</div><div class='ctx'> #include &lt;asm/hd64461.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='hunk'>@@ -35,7 +36,7 @@ static struct resource cf_ide_resources[] = {</div><div class='ctx'> 		.flags = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='del'>-		.start = 77,</div><div class='add'>+		.start = evt2irq(0xba0),</div><div class='ctx'> 		.flags = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -168,8 +169,6 @@ device_initcall(hp6xx_devices_setup);</div><div class='ctx'> static struct sh_machine_vector mv_hp6xx __initmv = {</div><div class='ctx'> 	.mv_name = "hp6xx",</div><div class='ctx'> 	.mv_setup = hp6xx_setup,</div><div class='del'>-	/* IRQ's : CPU(64) + CCHIP(16) + FREE_TO_USE(6) */</div><div class='del'>-	.mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM + 6,</div><div class='ctx'> 	/* Enable IRQ0 -&gt; IRQ3 in IRQ_MODE */</div><div class='ctx'> 	.mv_init_irq = hp6xx_init_irq,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c<br/>index d04a55d3b877..158c9176e42a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-kfr2r09/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-kfr2r09/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-kfr2r09/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-kfr2r09/setup.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/usb/r8a66597.h&gt;</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;media/rj54n1cb0c.h&gt;</div><div class='ctx'> #include &lt;media/soc_camera.h&gt;</div><div class='ctx'> #include &lt;media/sh_mobile_ceu.h&gt;</div><div class='hunk'>@@ -110,7 +111,7 @@ static struct resource kfr2r09_sh_keysc_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 79,</div><div class='add'>+		.start  = evt2irq(0xbe0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -175,7 +176,7 @@ static struct resource kfr2r09_sh_lcdc_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 106,</div><div class='add'>+		.start	= evt2irq(0xf40),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -200,8 +201,8 @@ static struct resource kfr2r09_usb0_gadget_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 65,</div><div class='del'>-		.end	= 65,</div><div class='add'>+		.start	= evtirq(0xa20),</div><div class='add'>+		.end	= evtirq(0xa20),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -230,8 +231,8 @@ static struct resource kfr2r09_ceu_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 52,</div><div class='del'>-		.end  = 52,</div><div class='add'>+		.start  = evt2irq(0x880),</div><div class='add'>+		.end	= evt2irq(0x880),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='hunk'>@@ -348,7 +349,7 @@ static struct resource kfr2r09_sh_sdhi0_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 100,</div><div class='add'>+		.start  = evt2irq(0xe80),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-lboxre2/setup.c b/arch/sh/boards/mach-lboxre2/setup.c<br/>index 79b4e0d77b71..6660622aa457 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-lboxre2/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-lboxre2/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-lboxre2/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-lboxre2/setup.c</a></div><div class='hunk'>@@ -79,6 +79,5 @@ device_initcall(lboxre2_devices_setup);</div><div class='ctx'>  */</div><div class='ctx'> static struct sh_machine_vector mv_lboxre2 __initmv = {</div><div class='ctx'> 	.mv_name		= "L-BOX RE2",</div><div class='del'>-	.mv_nr_irqs		= 72,</div><div class='ctx'> 	.mv_init_irq		= init_lboxre2_IRQ,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-microdev/setup.c b/arch/sh/boards/mach-microdev/setup.c<br/>index d8a747291e03..6c66ee4d842b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-microdev/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-microdev/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-microdev/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-microdev/setup.c</a></div><div class='hunk'>@@ -194,7 +194,6 @@ device_initcall(microdev_devices_setup);</div><div class='ctx'>  */</div><div class='ctx'> static struct sh_machine_vector mv_sh4202_microdev __initmv = {</div><div class='ctx'> 	.mv_name		= "SH4-202 MicroDev",</div><div class='del'>-	.mv_nr_irqs		= 72,</div><div class='ctx'> 	.mv_ioport_map		= microdev_ioport_map,</div><div class='ctx'> 	.mv_init_irq		= init_microdev_irq,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c<br/>index ff6f69c6906e..a8a1ca741c85 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-migor/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-migor/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-migor/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-migor/setup.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;video/sh_mobile_lcdc.h&gt;</div><div class='ctx'> #include &lt;media/sh_mobile_ceu.h&gt;</div><div class='ctx'> #include &lt;media/ov772x.h&gt;</div><div class='hunk'>@@ -54,7 +55,7 @@ static struct resource smc91x_eth_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 32, /* IRQ0 */</div><div class='add'>+		.start  = evt2irq(0x600), /* IRQ0 */</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -88,7 +89,7 @@ static struct resource sh_keysc_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 79,</div><div class='add'>+		.start  = evt2irq(0xbe0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -187,7 +188,6 @@ static struct platform_nand_data migor_nand_flash_data = {</div><div class='ctx'> 		.partitions = migor_nand_flash_partitions,</div><div class='ctx'> 		.nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),</div><div class='ctx'> 		.chip_delay = 20,</div><div class='del'>-		.part_probe_types = (const char *[]) { "cmdlinepart", NULL },</div><div class='ctx'> 	},</div><div class='ctx'> 	.ctrl = {</div><div class='ctx'> 		.dev_ready = migor_nand_flash_ready,</div><div class='hunk'>@@ -285,7 +285,7 @@ static struct resource migor_lcdc_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 28,</div><div class='add'>+		.start	= evt2irq(0x580),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -368,7 +368,7 @@ static struct resource migor_ceu_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 52,</div><div class='add'>+		.start  = evt2irq(0x880),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='hunk'>@@ -394,7 +394,7 @@ static struct resource sdhi_cn9_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 100,</div><div class='add'>+		.start	= evt2irq(0xe80),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -420,7 +420,7 @@ static struct i2c_board_info migor_i2c_devices[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		I2C_BOARD_INFO("migor_ts", 0x51),</div><div class='del'>-		.irq = 38, /* IRQ6 */</div><div class='add'>+		.irq = evt2irq(0x6c0), /* IRQ6 */</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		I2C_BOARD_INFO("wm8978", 0x1a),</div><div class='head'>diff --git a/arch/sh/boards/mach-rsk/Kconfig b/arch/sh/boards/mach-rsk/Kconfig<br/>index aeff3b042205..458a11ffd022 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-rsk/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-rsk/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-rsk/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-rsk/Kconfig</a></div><div class='hunk'>@@ -13,6 +13,16 @@ config SH_RSK7203</div><div class='ctx'> 	select ARCH_REQUIRE_GPIOLIB</div><div class='ctx'> 	depends on CPU_SUBTYPE_SH7203</div><div class='ctx'> </div><div class='add'>+config SH_RSK7264</div><div class='add'>+	bool "RSK2+SH7264"</div><div class='add'>+	select ARCH_REQUIRE_GPIOLIB</div><div class='add'>+	depends on CPU_SUBTYPE_SH7264</div><div class='add'>+</div><div class='add'>+config SH_RSK7269</div><div class='add'>+	bool "RSK2+SH7269"</div><div class='add'>+	select ARCH_REQUIRE_GPIOLIB</div><div class='add'>+	depends on CPU_SUBTYPE_SH7269</div><div class='add'>+</div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='head'>diff --git a/arch/sh/boards/mach-rsk/Makefile b/arch/sh/boards/mach-rsk/Makefile<br/>index 498da75ce38b..6a4e1b538a62 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-rsk/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-rsk/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-rsk/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-rsk/Makefile</a></div><div class='hunk'>@@ -1,2 +1,4 @@</div><div class='ctx'> obj-y				:= setup.o</div><div class='ctx'> obj-$(CONFIG_SH_RSK7203)	+= devices-rsk7203.o</div><div class='add'>+obj-$(CONFIG_SH_RSK7264)	+= devices-rsk7264.o</div><div class='add'>+obj-$(CONFIG_SH_RSK7269)	+= devices-rsk7269.o</div><div class='head'>diff --git a/arch/sh/boards/mach-rsk/devices-rsk7264.c b/arch/sh/boards/mach-rsk/devices-rsk7264.c<br/>new file mode 100644<br/>index 000000000000..7251e37a842f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-rsk/devices-rsk7264.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-rsk/devices-rsk7264.c</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+/*</div><div class='add'>+ * RSK+SH7264 Support.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Renesas Electronics Europe</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/smsc911x.h&gt;</div><div class='add'>+#include &lt;asm/machvec.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+</div><div class='add'>+static struct smsc911x_platform_config smsc911x_config = {</div><div class='add'>+	.phy_interface	= PHY_INTERFACE_MODE_MII,</div><div class='add'>+	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,</div><div class='add'>+	.irq_type	= SMSC911X_IRQ_TYPE_OPEN_DRAIN,</div><div class='add'>+	.flags		= SMSC911X_USE_16BIT | SMSC911X_SWAP_FIFO,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource smsc911x_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start		= 0x28000000,</div><div class='add'>+		.end		= 0x280000ff,</div><div class='add'>+		.flags		= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start		= 65,</div><div class='add'>+		.end		= 65,</div><div class='add'>+		.flags		= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device smsc911x_device = {</div><div class='add'>+	.name		= "smsc911x",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(smsc911x_resources),</div><div class='add'>+	.resource	= smsc911x_resources,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data = &amp;smsc911x_config,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *rsk7264_devices[] __initdata = {</div><div class='add'>+	&amp;smsc911x_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init rsk7264_devices_setup(void)</div><div class='add'>+{</div><div class='add'>+	return platform_add_devices(rsk7264_devices,</div><div class='add'>+				    ARRAY_SIZE(rsk7264_devices));</div><div class='add'>+}</div><div class='add'>+device_initcall(rsk7264_devices_setup);</div><div class='head'>diff --git a/arch/sh/boards/mach-rsk/devices-rsk7269.c b/arch/sh/boards/mach-rsk/devices-rsk7269.c<br/>new file mode 100644<br/>index 000000000000..4a544591d6f0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-rsk/devices-rsk7269.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-rsk/devices-rsk7269.c</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+/*</div><div class='add'>+ * RSK+SH7269 Support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012  Renesas Electronics Europe Ltd</div><div class='add'>+ * Copyright (C) 2012  Phil Edworthy</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/smsc911x.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;asm/machvec.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+</div><div class='add'>+static struct smsc911x_platform_config smsc911x_config = {</div><div class='add'>+	.phy_interface	= PHY_INTERFACE_MODE_MII,</div><div class='add'>+	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,</div><div class='add'>+	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,</div><div class='add'>+	.flags		= SMSC911X_USE_16BIT | SMSC911X_SWAP_FIFO,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource smsc911x_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start		= 0x24000000,</div><div class='add'>+		.end		= 0x240000ff,</div><div class='add'>+		.flags		= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start		= 85,</div><div class='add'>+		.end		= 85,</div><div class='add'>+		.flags		= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device smsc911x_device = {</div><div class='add'>+	.name		= "smsc911x",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(smsc911x_resources),</div><div class='add'>+	.resource	= smsc911x_resources,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data = &amp;smsc911x_config,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *rsk7269_devices[] __initdata = {</div><div class='add'>+	&amp;smsc911x_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init rsk7269_devices_setup(void)</div><div class='add'>+{</div><div class='add'>+	return platform_add_devices(rsk7269_devices,</div><div class='add'>+				    ARRAY_SIZE(rsk7269_devices));</div><div class='add'>+}</div><div class='add'>+device_initcall(rsk7269_devices_setup);</div><div class='head'>diff --git a/arch/sh/boards/mach-sdk7780/setup.c b/arch/sh/boards/mach-sdk7780/setup.c<br/>index 4da38db4b5fe..2241659c3299 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-sdk7780/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-sdk7780/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-sdk7780/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-sdk7780/setup.c</a></div><div class='hunk'>@@ -94,7 +94,6 @@ static void __init sdk7780_setup(char **cmdline_p)</div><div class='ctx'> static struct sh_machine_vector mv_se7780 __initmv = {</div><div class='ctx'> 	.mv_name        = "Renesas SDK7780-R3" ,</div><div class='ctx'> 	.mv_setup		= sdk7780_setup,</div><div class='del'>-	.mv_nr_irqs		= 111,</div><div class='ctx'> 	.mv_init_irq	= init_sdk7780_IRQ,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/boards/mach-se/7206/setup.c b/arch/sh/boards/mach-se/7206/setup.c<br/>index 8ab8330e3fd1..68883ec95682 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-se/7206/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-se/7206/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-se/7206/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/7206/setup.c</a></div><div class='hunk'>@@ -90,7 +90,6 @@ static int se7206_mode_pins(void)</div><div class='ctx'> </div><div class='ctx'> static struct sh_machine_vector mv_se __initmv = {</div><div class='ctx'> 	.mv_name		= "SolutionEngine",</div><div class='del'>-	.mv_nr_irqs		= 256,</div><div class='ctx'> 	.mv_init_irq		= init_se7206_IRQ,</div><div class='ctx'> 	.mv_mode_pins		= se7206_mode_pins,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c<br/>index 31330c65c0ce..9759d6ba7ffb 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-se/770x/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-se/770x/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-se/770x/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/770x/setup.c</a></div><div class='hunk'>@@ -184,16 +184,5 @@ device_initcall(se_devices_setup);</div><div class='ctx'> static struct sh_machine_vector mv_se __initmv = {</div><div class='ctx'> 	.mv_name		= "SolutionEngine",</div><div class='ctx'> 	.mv_setup		= smsc_setup,</div><div class='del'>-#if defined(CONFIG_CPU_SH4)</div><div class='del'>-	.mv_nr_irqs		= 48,</div><div class='del'>-#elif defined(CONFIG_CPU_SUBTYPE_SH7708)</div><div class='del'>-	.mv_nr_irqs		= 32,</div><div class='del'>-#elif defined(CONFIG_CPU_SUBTYPE_SH7709)</div><div class='del'>-	.mv_nr_irqs		= 61,</div><div class='del'>-#elif defined(CONFIG_CPU_SUBTYPE_SH7705)</div><div class='del'>-	.mv_nr_irqs		= 86,</div><div class='del'>-#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)</div><div class='del'>-	.mv_nr_irqs             = 104,</div><div class='del'>-#endif</div><div class='ctx'> 	.mv_init_irq		= init_se_IRQ,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c<br/>index 7416ad7ee53a..a0b3dba34ebf 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-se/7721/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-se/7721/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-se/7721/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/7721/setup.c</a></div><div class='hunk'>@@ -92,6 +92,5 @@ static void __init se7721_setup(char **cmdline_p)</div><div class='ctx'> struct sh_machine_vector mv_se7721 __initmv = {</div><div class='ctx'> 	.mv_name		= "Solution Engine 7721",</div><div class='ctx'> 	.mv_setup		= se7721_setup,</div><div class='del'>-	.mv_nr_irqs		= 109,</div><div class='ctx'> 	.mv_init_irq		= init_se7721_IRQ,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c<br/>index e1963fecd761..8f7f0550cfde 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-se/7722/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-se/7722/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-se/7722/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/7722/setup.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='ctx'> #include &lt;linux/input/sh_keysc.h&gt;</div><div class='ctx'> #include &lt;linux/smc91x.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;mach-se/mach/se7722.h&gt;</div><div class='ctx'> #include &lt;mach-se/mach/mrshpc.h&gt;</div><div class='ctx'> #include &lt;asm/machvec.h&gt;</div><div class='hunk'>@@ -114,7 +115,7 @@ static struct resource sh_keysc_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 79,</div><div class='add'>+		.start  = evt2irq(0xbe0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c<br/>index c540b16547c3..ffbf5bc7366b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-se/7724/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-se/7724/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-se/7724/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/7724/setup.c</a></div><div class='hunk'>@@ -24,10 +24,12 @@</div><div class='ctx'> #include &lt;linux/input/sh_keysc.h&gt;</div><div class='ctx'> #include &lt;linux/usb/r8a66597.h&gt;</div><div class='ctx'> #include &lt;linux/sh_eth.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='ctx'> #include &lt;video/sh_mobile_lcdc.h&gt;</div><div class='ctx'> #include &lt;media/sh_mobile_ceu.h&gt;</div><div class='ctx'> #include &lt;sound/sh_fsi.h&gt;</div><div class='add'>+#include &lt;sound/simple_card.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/heartbeat.h&gt;</div><div class='ctx'> #include &lt;asm/clock.h&gt;</div><div class='hunk'>@@ -197,7 +199,7 @@ static struct resource lcdc_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 106,</div><div class='add'>+		.start	= evt2irq(0xf40),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -224,7 +226,7 @@ static struct resource ceu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 52,</div><div class='add'>+		.start  = evt2irq(0x880),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='hunk'>@@ -255,7 +257,7 @@ static struct resource ceu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 63,</div><div class='add'>+		.start  = evt2irq(0x9e0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='hunk'>@@ -289,7 +291,7 @@ static struct resource fsi_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 108,</div><div class='add'>+		.start  = evt2irq(0xf80),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -304,17 +306,25 @@ static struct platform_device fsi_device = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct fsi_ak4642_info fsi_ak4642_info = {</div><div class='add'>+static struct asoc_simple_dai_init_info fsi2_ak4642_init_info = {</div><div class='add'>+	.fmt		= SND_SOC_DAIFMT_LEFT_J,</div><div class='add'>+	.codec_daifmt	= SND_SOC_DAIFMT_CBM_CFM,</div><div class='add'>+	.cpu_daifmt	= SND_SOC_DAIFMT_CBS_CFS,</div><div class='add'>+	.sysclk		= 11289600,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct asoc_simple_card_info fsi_ak4642_info = {</div><div class='ctx'> 	.name		= "AK4642",</div><div class='ctx'> 	.card		= "FSIA-AK4642",</div><div class='ctx'> 	.cpu_dai	= "fsia-dai",</div><div class='ctx'> 	.codec		= "ak4642-codec.0-0012",</div><div class='ctx'> 	.platform	= "sh_fsi.0",</div><div class='del'>-	.id		= FSI_PORT_A,</div><div class='add'>+	.codec_dai	= "ak4642-hifi",</div><div class='add'>+	.init		= &amp;fsi2_ak4642_init_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device fsi_ak4642_device = {</div><div class='del'>-	.name	= "fsi-ak4642-audio",</div><div class='add'>+	.name	= "asoc-simple-card",</div><div class='ctx'> 	.dev	= {</div><div class='ctx'> 		.platform_data	= &amp;fsi_ak4642_info,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -343,7 +353,7 @@ static struct resource keysc_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 79,</div><div class='add'>+		.start  = evt2irq(0xbe0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -366,7 +376,7 @@ static struct resource sh_eth_resources[] = {</div><div class='ctx'> 		.flags = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start = 91,</div><div class='add'>+		.start = evt2irq(0xd60),</div><div class='ctx'> 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -397,8 +407,8 @@ static struct resource sh7724_usb0_host_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 65,</div><div class='del'>-		.end	= 65,</div><div class='add'>+		.start	= evt2irq(0xa20),</div><div class='add'>+		.end	= evt2irq(0xa20),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -426,8 +436,8 @@ static struct resource sh7724_usb1_gadget_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 66,</div><div class='del'>-		.end	= 66,</div><div class='add'>+		.start	= evt2irq(0xa40),</div><div class='add'>+		.end	= evt2irq(0xa40),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -452,7 +462,7 @@ static struct resource sdhi0_cn7_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 100,</div><div class='add'>+		.start  = evt2irq(0xe80),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -481,7 +491,7 @@ static struct resource sdhi1_cn8_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 23,</div><div class='add'>+		.start  = evt2irq(0x4e0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -511,7 +521,7 @@ static struct resource irda_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 20,</div><div class='add'>+		.start  = evt2irq(0x480),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -549,7 +559,7 @@ static struct resource sh_vou_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 55,</div><div class='add'>+		.start  = evt2irq(0x8e0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -595,6 +605,7 @@ static struct i2c_board_info i2c0_devices[] = {</div><div class='ctx'> #define EEPROM_DATA 0xBA20600C</div><div class='ctx'> #define EEPROM_STAT 0xBA206010</div><div class='ctx'> #define EEPROM_STRT 0xBA206014</div><div class='add'>+</div><div class='ctx'> static int __init sh_eth_is_eeprom_ready(void)</div><div class='ctx'> {</div><div class='ctx'> 	int t = 10000;</div><div class='hunk'>@@ -651,7 +662,6 @@ extern char ms7724se_sdram_enter_end;</div><div class='ctx'> extern char ms7724se_sdram_leave_start;</div><div class='ctx'> extern char ms7724se_sdram_leave_end;</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int __init arch_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* enable I2C device */</div><div class='hunk'>@@ -928,5 +938,4 @@ device_initcall(devices_setup);</div><div class='ctx'> static struct sh_machine_vector mv_ms7724se __initmv = {</div><div class='ctx'> 	.mv_name	= "ms7724se",</div><div class='ctx'> 	.mv_init_irq	= init_se7724_IRQ,</div><div class='del'>-	.mv_nr_irqs	= SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-se/7751/setup.c b/arch/sh/boards/mach-se/7751/setup.c<br/>index 4ed60c5e221f..820f4e7ba0d2 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-se/7751/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-se/7751/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-se/7751/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/7751/setup.c</a></div><div class='hunk'>@@ -55,6 +55,5 @@ device_initcall(se7751_devices_setup);</div><div class='ctx'>  */</div><div class='ctx'> static struct sh_machine_vector mv_7751se __initmv = {</div><div class='ctx'> 	.mv_name		= "7751 SolutionEngine",</div><div class='del'>-	.mv_nr_irqs		= 72,</div><div class='ctx'> 	.mv_init_irq		= init_7751se_IRQ,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-se/7780/setup.c b/arch/sh/boards/mach-se/7780/setup.c<br/>index 6f7c207138e1..ae5a1d84fdf8 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-se/7780/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-se/7780/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-se/7780/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/7780/setup.c</a></div><div class='hunk'>@@ -110,6 +110,5 @@ static void __init se7780_setup(char **cmdline_p)</div><div class='ctx'> static struct sh_machine_vector mv_se7780 __initmv = {</div><div class='ctx'> 	.mv_name                = "Solution Engine 7780" ,</div><div class='ctx'> 	.mv_setup               = se7780_setup ,</div><div class='del'>-	.mv_nr_irqs		= 111 ,</div><div class='ctx'> 	.mv_init_irq		= init_se7780_IRQ,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-se/board-se7619.c b/arch/sh/boards/mach-se/board-se7619.c<br/>index 82b6d4a5dc02..958bcd7aacc5 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-se/board-se7619.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-se/board-se7619.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-se/board-se7619.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-se/board-se7619.c</a></div><div class='hunk'>@@ -22,6 +22,5 @@ static int se7619_mode_pins(void)</div><div class='ctx'> </div><div class='ctx'> static struct sh_machine_vector mv_se __initmv = {</div><div class='ctx'> 	.mv_name		= "SolutionEngine",</div><div class='del'>-	.mv_nr_irqs		= 108,</div><div class='ctx'> 	.mv_mode_pins		= se7619_mode_pins,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c<br/>index d4f79b2a6514..f582dab59343 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-sh03/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-sh03/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-sh03/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-sh03/setup.c</a></div><div class='hunk'>@@ -101,6 +101,5 @@ device_initcall(sh03_devices_setup);</div><div class='ctx'> static struct sh_machine_vector mv_sh03 __initmv = {</div><div class='ctx'> 	.mv_name		= "Interface (CTP/PCI-SH03)",</div><div class='ctx'> 	.mv_setup		= sh03_setup,</div><div class='del'>-	.mv_nr_irqs		= 48,</div><div class='ctx'> 	.mv_init_irq		= init_sh03_IRQ,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c<br/>index dd036f1661db..b7c75298dfb5 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/boards/mach-sh7763rdp/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/boards/mach-sh7763rdp/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/boards/mach-sh7763rdp/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/boards/mach-sh7763rdp/setup.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/fb.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/sh_eth.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;mach/sh7763rdp.h&gt;</div><div class='ctx'> #include &lt;asm/sh7760fb.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -67,7 +68,7 @@ static struct platform_device sh7763rdp_nor_flash_device = {</div><div class='ctx'>  * SH-Ether</div><div class='ctx'>  *</div><div class='ctx'>  * SH Ether of SH7763 has multi IRQ handling.</div><div class='del'>- * (57,58,59 -&gt; 57)</div><div class='add'>+ * (0x920,0x940,0x960 -&gt; 0x920)</div><div class='ctx'>  */</div><div class='ctx'> static struct resource sh_eth_resources[] = {</div><div class='ctx'> 	{</div><div class='hunk'>@@ -79,7 +80,7 @@ static struct resource sh_eth_resources[] = {</div><div class='ctx'> 		.end    = 0xFEE01FFF,</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	}, {</div><div class='del'>-		.start  = 57,   /* irq number */</div><div class='add'>+		.start  = evt2irq(0x920),   /* irq number */</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -213,6 +214,5 @@ static void __init sh7763rdp_setup(char **cmdline_p)</div><div class='ctx'> static struct sh_machine_vector mv_sh7763rdp __initmv = {</div><div class='ctx'> 	.mv_name = "sh7763drp",</div><div class='ctx'> 	.mv_setup = sh7763rdp_setup,</div><div class='del'>-	.mv_nr_irqs = 112,</div><div class='ctx'> 	.mv_init_irq = init_sh7763rdp_IRQ,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/configs/rsk7264_defconfig b/arch/sh/configs/rsk7264_defconfig<br/>new file mode 100644<br/>index 000000000000..1600426224c2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/configs/rsk7264_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/configs/rsk7264_defconfig</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+CONFIG_LOCALVERSION="uClinux RSK2+SH7264"</div><div class='add'>+# CONFIG_LOCALVERSION_AUTO is not set</div><div class='add'>+CONFIG_SYSVIPC=y</div><div class='add'>+CONFIG_BSD_PROCESS_ACCT=y</div><div class='add'>+CONFIG_IKCONFIG=y</div><div class='add'>+CONFIG_LOG_BUF_SHIFT=14</div><div class='add'>+CONFIG_NAMESPACES=y</div><div class='add'>+CONFIG_SYSFS_DEPRECATED=y</div><div class='add'>+CONFIG_SYSFS_DEPRECATED_V2=y</div><div class='add'>+CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='add'>+CONFIG_SYSCTL_SYSCALL=y</div><div class='add'>+CONFIG_KALLSYMS_ALL=y</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+CONFIG_PERF_COUNTERS=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+CONFIG_SLAB=y</div><div class='add'>+CONFIG_MMAP_ALLOW_UNINITIALIZED=y</div><div class='add'>+CONFIG_PROFILING=y</div><div class='add'>+# CONFIG_LBDAF is not set</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+CONFIG_PARTITION_ADVANCED=y</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+CONFIG_CPU_SUBTYPE_SH7264=y</div><div class='add'>+CONFIG_MEMORY_START=0x0c000000</div><div class='add'>+CONFIG_FLATMEM_MANUAL=y</div><div class='add'>+CONFIG_CPU_BIG_ENDIAN=y</div><div class='add'>+CONFIG_SH_RSK=y</div><div class='add'>+# CONFIG_SH_TIMER_MTU2 is not set</div><div class='add'>+CONFIG_BINFMT_FLAT=y</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+CONFIG_IP_PNP=y</div><div class='add'>+CONFIG_IP_PNP_DHCP=y</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='add'>+# CONFIG_INET_LRO is not set</div><div class='add'>+# CONFIG_INET_DIAG is not set</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='add'>+# CONFIG_PREVENT_FIRMWARE_BUILD is not set</div><div class='add'>+# CONFIG_FW_LOADER is not set</div><div class='add'>+CONFIG_BLK_DEV_LOOP=y</div><div class='add'>+CONFIG_BLK_DEV_RAM=y</div><div class='add'>+CONFIG_BLK_DEV_RAM_COUNT=4</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+CONFIG_SMSC911X=y</div><div class='add'>+CONFIG_SMSC_PHY=y</div><div class='add'>+CONFIG_INPUT_FF_MEMLESS=y</div><div class='add'>+# CONFIG_INPUT_MOUSEDEV is not set</div><div class='add'>+# CONFIG_INPUT_KEYBOARD is not set</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+CONFIG_VT_HW_CONSOLE_BINDING=y</div><div class='add'>+CONFIG_SERIAL_SH_SCI=y</div><div class='add'>+CONFIG_SERIAL_SH_SCI_NR_UARTS=8</div><div class='add'>+CONFIG_SERIAL_SH_SCI_CONSOLE=y</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+CONFIG_USB_DEBUG=y</div><div class='add'>+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y</div><div class='add'>+# CONFIG_USB_DEVICE_CLASS is not set</div><div class='add'>+CONFIG_USB_R8A66597_HCD=y</div><div class='add'>+CONFIG_USB_STORAGE=y</div><div class='add'>+CONFIG_USB_STORAGE_DEBUG=y</div><div class='add'>+CONFIG_USB_LIBUSUAL=y</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+CONFIG_EXT3_FS=y</div><div class='add'>+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+CONFIG_NFS_V3=y</div><div class='add'>+CONFIG_ROOT_NFS=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='head'>diff --git a/arch/sh/configs/rsk7269_defconfig b/arch/sh/configs/rsk7269_defconfig<br/>new file mode 100644<br/>index 000000000000..9f062b5837d7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/configs/rsk7269_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/configs/rsk7269_defconfig</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+CONFIG_LOG_BUF_SHIFT=14</div><div class='add'>+CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='add'>+CONFIG_EMBEDDED=y</div><div class='add'>+# CONFIG_VM_EVENT_COUNTERS is not set</div><div class='add'>+CONFIG_SLAB=y</div><div class='add'>+# CONFIG_LBDAF is not set</div><div class='add'>+# CONFIG_BLK_DEV_BSG is not set</div><div class='add'>+# CONFIG_IOSCHED_DEADLINE is not set</div><div class='add'>+# CONFIG_IOSCHED_CFQ is not set</div><div class='add'>+CONFIG_SWAP_IO_SPACE=y</div><div class='add'>+CONFIG_CPU_SUBTYPE_SH7269=y</div><div class='add'>+CONFIG_MEMORY_START=0x0c000000</div><div class='add'>+CONFIG_MEMORY_SIZE=0x02000000</div><div class='add'>+CONFIG_FLATMEM_MANUAL=y</div><div class='add'>+CONFIG_CPU_BIG_ENDIAN=y</div><div class='add'>+CONFIG_SH_RSK=y</div><div class='add'>+# CONFIG_SH_TIMER_MTU2 is not set</div><div class='add'>+CONFIG_SH_PCLK_FREQ=66700000</div><div class='add'>+CONFIG_BINFMT_FLAT=y</div><div class='add'>+CONFIG_NET=y</div><div class='add'>+CONFIG_INET=y</div><div class='add'>+CONFIG_IP_PNP=y</div><div class='add'>+CONFIG_IP_PNP_DHCP=y</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_TUNNEL is not set</div><div class='add'>+# CONFIG_INET_XFRM_MODE_BEET is not set</div><div class='add'>+# CONFIG_INET_LRO is not set</div><div class='add'>+# CONFIG_INET_DIAG is not set</div><div class='add'>+# CONFIG_IPV6 is not set</div><div class='add'>+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"</div><div class='add'>+# CONFIG_FW_LOADER is not set</div><div class='add'>+CONFIG_SCSI=y</div><div class='add'>+CONFIG_BLK_DEV_SD=y</div><div class='add'>+CONFIG_NETDEVICES=y</div><div class='add'>+CONFIG_SMSC911X=y</div><div class='add'>+CONFIG_SMSC_PHY=y</div><div class='add'>+# CONFIG_INPUT_MOUSEDEV is not set</div><div class='add'>+# CONFIG_INPUT_KEYBOARD is not set</div><div class='add'>+# CONFIG_INPUT_MOUSE is not set</div><div class='add'>+# CONFIG_SERIO is not set</div><div class='add'>+CONFIG_SERIAL_SH_SCI=y</div><div class='add'>+CONFIG_SERIAL_SH_SCI_NR_UARTS=8</div><div class='add'>+CONFIG_SERIAL_SH_SCI_CONSOLE=y</div><div class='add'>+# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_USB=y</div><div class='add'>+CONFIG_USB_DEBUG=y</div><div class='add'>+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y</div><div class='add'>+# CONFIG_USB_DEVICE_CLASS is not set</div><div class='add'>+CONFIG_USB_R8A66597_HCD=y</div><div class='add'>+CONFIG_USB_STORAGE=y</div><div class='add'>+CONFIG_USB_STORAGE_DEBUG=y</div><div class='add'>+CONFIG_USB_LIBUSUAL=y</div><div class='add'>+CONFIG_EXT2_FS=y</div><div class='add'>+CONFIG_EXT3_FS=y</div><div class='add'>+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set</div><div class='add'>+CONFIG_VFAT_FS=y</div><div class='add'>+CONFIG_NFS_FS=y</div><div class='add'>+CONFIG_NFS_V3=y</div><div class='add'>+CONFIG_ROOT_NFS=y</div><div class='add'>+CONFIG_PARTITION_ADVANCED=y</div><div class='add'>+CONFIG_NLS_CODEPAGE_437=y</div><div class='add'>+CONFIG_NLS_ISO8859_1=y</div><div class='add'>+# CONFIG_ENABLE_MUST_CHECK is not set</div><div class='add'>+CONFIG_SYSCTL_SYSCALL_CHECK=y</div><div class='add'>+# CONFIG_FTRACE is not set</div><div class='head'>diff --git a/arch/sh/configs/sh7785lcr_32bit_defconfig b/arch/sh/configs/sh7785lcr_32bit_defconfig<br/>index 7b9c696ac5e0..9bdcf72ec06a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/configs/sh7785lcr_32bit_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/configs/sh7785lcr_32bit_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/configs/sh7785lcr_32bit_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/configs/sh7785lcr_32bit_defconfig</a></div><div class='hunk'>@@ -5,7 +5,7 @@ CONFIG_BSD_PROCESS_ACCT=y</div><div class='ctx'> CONFIG_IKCONFIG=y</div><div class='ctx'> CONFIG_IKCONFIG_PROC=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=16</div><div class='del'>-CONFIG_PERF_COUNTERS=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='ctx'> CONFIG_SLAB=y</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='head'>diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig<br/>index 4d58eb0973d4..cfd5b90a8628 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/drivers/dma/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/drivers/dma/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/drivers/dma/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/dma/Kconfig</a></div><div class='hunk'>@@ -40,23 +40,6 @@ config NR_ONCHIP_DMA_CHANNELS</div><div class='ctx'> 	  DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the</div><div class='ctx'> 	  SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.</div><div class='ctx'> </div><div class='del'>-config NR_DMA_CHANNELS_BOOL</div><div class='del'>-	depends on SH_DMA</div><div class='del'>-	bool "Override default number of maximum DMA channels"</div><div class='del'>-	help</div><div class='del'>-	  This allows you to forcibly update the maximum number of supported</div><div class='del'>-	  DMA channels for a given board. If this is unset, this will default</div><div class='del'>-	  to the number of channels that the on-chip DMAC has.</div><div class='del'>-</div><div class='del'>-config NR_DMA_CHANNELS</div><div class='del'>-	int "Maximum number of DMA channels"</div><div class='del'>-	depends on SH_DMA &amp;&amp; NR_DMA_CHANNELS_BOOL</div><div class='del'>-	default NR_ONCHIP_DMA_CHANNELS</div><div class='del'>-	help</div><div class='del'>-	  This allows you to specify the maximum number of DMA channels to</div><div class='del'>-	  support. Setting this to a higher value allows for cascading DMACs</div><div class='del'>-	  with additional channels.</div><div class='del'>-</div><div class='ctx'> config SH_DMABRG</div><div class='ctx'> 	bool "SH7760 DMABRG support"</div><div class='ctx'> 	depends on CPU_SUBTYPE_SH7760</div><div class='head'>diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c<br/>index a60da6dd4d17..4c171f13b0e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/drivers/dma/dma-sh.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/drivers/dma/dma-sh.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/drivers/dma/dma-sh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/dma/dma-sh.c</a></div><div class='hunk'>@@ -14,35 +14,72 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;mach-dreamcast/mach/dma.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/dma-sh.h&gt;</div><div class='add'>+#include &lt;asm/dma-register.h&gt;</div><div class='add'>+#include &lt;cpu/dma-register.h&gt;</div><div class='add'>+#include &lt;cpu/dma.h&gt;</div><div class='ctx'> </div><div class='del'>-#if defined(DMAE1_IRQ)</div><div class='del'>-#define NR_DMAE		2</div><div class='del'>-#else</div><div class='del'>-#define NR_DMAE		1</div><div class='add'>+/*</div><div class='add'>+ * Define the default configuration for dual address memory-memory transfer.</div><div class='add'>+ * The 0x400 value represents auto-request, external-&gt;external.</div><div class='add'>+ */</div><div class='add'>+#define RS_DUAL	(DM_INC | SM_INC | 0x400 | TS_INDEX2VAL(XMIT_SZ_32BIT))</div><div class='add'>+</div><div class='add'>+static unsigned long dma_find_base(unsigned int chan)</div><div class='add'>+{</div><div class='add'>+	unsigned long base = SH_DMAC_BASE0;</div><div class='add'>+</div><div class='add'>+#ifdef SH_DMAC_BASE1</div><div class='add'>+	if (chan &gt;= 6)</div><div class='add'>+		base = SH_DMAC_BASE1;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static const char *dmae_name[] = {</div><div class='del'>-	"DMAC Address Error0", "DMAC Address Error1"</div><div class='del'>-};</div><div class='add'>+	return base;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long dma_base_addr(unsigned int chan)</div><div class='add'>+{</div><div class='add'>+	unsigned long base = dma_find_base(chan);</div><div class='add'>+</div><div class='add'>+	/* Normalize offset calculation */</div><div class='add'>+	if (chan &gt;= 9)</div><div class='add'>+		chan -= 6;</div><div class='add'>+	if (chan &gt;= 4)</div><div class='add'>+		base += 0x10;</div><div class='add'>+</div><div class='add'>+	return base + (chan * 0x10);</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_SH_DMA_IRQ_MULTI</div><div class='ctx'> static inline unsigned int get_dmte_irq(unsigned int chan)</div><div class='ctx'> {</div><div class='del'>-	unsigned int irq = 0;</div><div class='del'>-	if (chan &lt; ARRAY_SIZE(dmte_irq_map))</div><div class='del'>-		irq = dmte_irq_map[chan];</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_SH_DMA_IRQ_MULTI)</div><div class='del'>-	if (irq &gt; DMTE6_IRQ)</div><div class='del'>-		return DMTE6_IRQ;</div><div class='del'>-	return DMTE0_IRQ;</div><div class='add'>+	return chan &gt;= 6 ? DMTE6_IRQ : DMTE0_IRQ;</div><div class='add'>+}</div><div class='ctx'> #else</div><div class='del'>-	return irq;</div><div class='add'>+</div><div class='add'>+static unsigned int dmte_irq_map[] = {</div><div class='add'>+	DMTE0_IRQ, DMTE0_IRQ + 1, DMTE0_IRQ + 2, DMTE0_IRQ + 3,</div><div class='add'>+</div><div class='add'>+#ifdef DMTE4_IRQ</div><div class='add'>+	DMTE4_IRQ, DMTE4_IRQ + 1,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef DMTE6_IRQ</div><div class='add'>+	DMTE6_IRQ, DMTE6_IRQ + 1,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef DMTE8_IRQ</div><div class='add'>+	DMTE8_IRQ, DMTE9_IRQ, DMTE10_IRQ, DMTE11_IRQ,</div><div class='ctx'> #endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline unsigned int get_dmte_irq(unsigned int chan)</div><div class='add'>+{</div><div class='add'>+	return dmte_irq_map[chan];</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * We determine the correct shift size based off of the CHCR transmit size</div><div class='hunk'>@@ -53,9 +90,10 @@ static inline unsigned int get_dmte_irq(unsigned int chan)</div><div class='ctx'>  * iterations to complete the transfer.</div><div class='ctx'>  */</div><div class='ctx'> static unsigned int ts_shift[] = TS_SHIFT;</div><div class='add'>+</div><div class='ctx'> static inline unsigned int calc_xmit_shift(struct dma_channel *chan)</div><div class='ctx'> {</div><div class='del'>-	u32 chcr = __raw_readl(dma_base_addr[chan-&gt;chan] + CHCR);</div><div class='add'>+	u32 chcr = __raw_readl(dma_base_addr(chan-&gt;chan) + CHCR);</div><div class='ctx'> 	int cnt = ((chcr &amp; CHCR_TS_LOW_MASK) &gt;&gt; CHCR_TS_LOW_SHIFT) |</div><div class='ctx'> 		((chcr &amp; CHCR_TS_HIGH_MASK) &gt;&gt; CHCR_TS_HIGH_SHIFT);</div><div class='ctx'> </div><div class='hunk'>@@ -73,13 +111,13 @@ static irqreturn_t dma_tei(int irq, void *dev_id)</div><div class='ctx'> 	struct dma_channel *chan = dev_id;</div><div class='ctx'> 	u32 chcr;</div><div class='ctx'> </div><div class='del'>-	chcr = __raw_readl(dma_base_addr[chan-&gt;chan] + CHCR);</div><div class='add'>+	chcr = __raw_readl(dma_base_addr(chan-&gt;chan) + CHCR);</div><div class='ctx'> </div><div class='ctx'> 	if (!(chcr &amp; CHCR_TE))</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='ctx'> 	chcr &amp;= ~(CHCR_IE | CHCR_DE);</div><div class='del'>-	__raw_writel(chcr, (dma_base_addr[chan-&gt;chan] + CHCR));</div><div class='add'>+	__raw_writel(chcr, (dma_base_addr(chan-&gt;chan) + CHCR));</div><div class='ctx'> </div><div class='ctx'> 	wake_up(&amp;chan-&gt;wait_queue);</div><div class='ctx'> </div><div class='hunk'>@@ -91,13 +129,8 @@ static int sh_dmac_request_dma(struct dma_channel *chan)</div><div class='ctx'> 	if (unlikely(!(chan-&gt;flags &amp; DMA_TEI_CAPABLE)))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return request_irq(get_dmte_irq(chan-&gt;chan), dma_tei,</div><div class='del'>-#if defined(CONFIG_SH_DMA_IRQ_MULTI)</div><div class='del'>-				IRQF_SHARED,</div><div class='del'>-#else</div><div class='del'>-				0,</div><div class='del'>-#endif</div><div class='del'>-				chan-&gt;dev_id, chan);</div><div class='add'>+	return request_irq(get_dmte_irq(chan-&gt;chan), dma_tei, IRQF_SHARED,</div><div class='add'>+			   chan-&gt;dev_id, chan);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sh_dmac_free_dma(struct dma_channel *chan)</div><div class='hunk'>@@ -118,7 +151,7 @@ sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)</div><div class='ctx'> 		chan-&gt;flags &amp;= ~DMA_TEI_CAPABLE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	__raw_writel(chcr, (dma_base_addr[chan-&gt;chan] + CHCR));</div><div class='add'>+	__raw_writel(chcr, (dma_base_addr(chan-&gt;chan) + CHCR));</div><div class='ctx'> </div><div class='ctx'> 	chan-&gt;flags |= DMA_CONFIGURED;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -129,13 +162,13 @@ static void sh_dmac_enable_dma(struct dma_channel *chan)</div><div class='ctx'> 	int irq;</div><div class='ctx'> 	u32 chcr;</div><div class='ctx'> </div><div class='del'>-	chcr = __raw_readl(dma_base_addr[chan-&gt;chan] + CHCR);</div><div class='add'>+	chcr = __raw_readl(dma_base_addr(chan-&gt;chan) + CHCR);</div><div class='ctx'> 	chcr |= CHCR_DE;</div><div class='ctx'> </div><div class='ctx'> 	if (chan-&gt;flags &amp; DMA_TEI_CAPABLE)</div><div class='ctx'> 		chcr |= CHCR_IE;</div><div class='ctx'> </div><div class='del'>-	__raw_writel(chcr, (dma_base_addr[chan-&gt;chan] + CHCR));</div><div class='add'>+	__raw_writel(chcr, (dma_base_addr(chan-&gt;chan) + CHCR));</div><div class='ctx'> </div><div class='ctx'> 	if (chan-&gt;flags &amp; DMA_TEI_CAPABLE) {</div><div class='ctx'> 		irq = get_dmte_irq(chan-&gt;chan);</div><div class='hunk'>@@ -153,9 +186,9 @@ static void sh_dmac_disable_dma(struct dma_channel *chan)</div><div class='ctx'> 		disable_irq(irq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	chcr = __raw_readl(dma_base_addr[chan-&gt;chan] + CHCR);</div><div class='add'>+	chcr = __raw_readl(dma_base_addr(chan-&gt;chan) + CHCR);</div><div class='ctx'> 	chcr &amp;= ~(CHCR_DE | CHCR_TE | CHCR_IE);</div><div class='del'>-	__raw_writel(chcr, (dma_base_addr[chan-&gt;chan] + CHCR));</div><div class='add'>+	__raw_writel(chcr, (dma_base_addr(chan-&gt;chan) + CHCR));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sh_dmac_xfer_dma(struct dma_channel *chan)</div><div class='hunk'>@@ -186,13 +219,13 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (chan-&gt;sar || (mach_is_dreamcast() &amp;&amp;</div><div class='ctx'> 			  chan-&gt;chan == PVR2_CASCADE_CHAN))</div><div class='del'>-		__raw_writel(chan-&gt;sar, (dma_base_addr[chan-&gt;chan]+SAR));</div><div class='add'>+		__raw_writel(chan-&gt;sar, (dma_base_addr(chan-&gt;chan) + SAR));</div><div class='ctx'> 	if (chan-&gt;dar || (mach_is_dreamcast() &amp;&amp;</div><div class='ctx'> 			  chan-&gt;chan == PVR2_CASCADE_CHAN))</div><div class='del'>-		__raw_writel(chan-&gt;dar, (dma_base_addr[chan-&gt;chan] + DAR));</div><div class='add'>+		__raw_writel(chan-&gt;dar, (dma_base_addr(chan-&gt;chan) + DAR));</div><div class='ctx'> </div><div class='ctx'> 	__raw_writel(chan-&gt;count &gt;&gt; calc_xmit_shift(chan),</div><div class='del'>-		(dma_base_addr[chan-&gt;chan] + TCR));</div><div class='add'>+		(dma_base_addr(chan-&gt;chan) + TCR));</div><div class='ctx'> </div><div class='ctx'> 	sh_dmac_enable_dma(chan);</div><div class='ctx'> </div><div class='hunk'>@@ -201,13 +234,32 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)</div><div class='ctx'> </div><div class='ctx'> static int sh_dmac_get_dma_residue(struct dma_channel *chan)</div><div class='ctx'> {</div><div class='del'>-	if (!(__raw_readl(dma_base_addr[chan-&gt;chan] + CHCR) &amp; CHCR_DE))</div><div class='add'>+	if (!(__raw_readl(dma_base_addr(chan-&gt;chan) + CHCR) &amp; CHCR_DE))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return __raw_readl(dma_base_addr[chan-&gt;chan] + TCR)</div><div class='add'>+	return __raw_readl(dma_base_addr(chan-&gt;chan) + TCR)</div><div class='ctx'> 		 &lt;&lt; calc_xmit_shift(chan);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * DMAOR handling</div><div class='add'>+ */</div><div class='add'>+#if defined(CONFIG_CPU_SUBTYPE_SH7723)	|| \</div><div class='add'>+    defined(CONFIG_CPU_SUBTYPE_SH7724)	|| \</div><div class='add'>+    defined(CONFIG_CPU_SUBTYPE_SH7780)	|| \</div><div class='add'>+    defined(CONFIG_CPU_SUBTYPE_SH7785)</div><div class='add'>+#define NR_DMAOR	2</div><div class='add'>+#else</div><div class='add'>+#define NR_DMAOR	1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DMAOR bases are broken out amongst channel groups. DMAOR0 manages</div><div class='add'>+ * channels 0 - 5, DMAOR1 6 - 11 (optional).</div><div class='add'>+ */</div><div class='add'>+#define dmaor_read_reg(n)		__raw_readw(dma_find_base((n)*6))</div><div class='add'>+#define dmaor_write_reg(n, data)	__raw_writew(data, dma_find_base(n)*6)</div><div class='add'>+</div><div class='ctx'> static inline int dmaor_reset(int no)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long dmaor = dmaor_read_reg(no);</div><div class='hunk'>@@ -228,36 +280,86 @@ static inline int dmaor_reset(int no)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_CPU_SH4)</div><div class='del'>-static irqreturn_t dma_err(int irq, void *dummy)</div><div class='del'>-{</div><div class='del'>-#if defined(CONFIG_SH_DMA_IRQ_MULTI)</div><div class='del'>-	int cnt = 0;</div><div class='del'>-	switch (irq) {</div><div class='del'>-#if defined(DMTE6_IRQ) &amp;&amp; defined(DMAE1_IRQ)</div><div class='del'>-	case DMTE6_IRQ:</div><div class='del'>-		cnt++;</div><div class='add'>+/*</div><div class='add'>+ * DMAE handling</div><div class='add'>+ */</div><div class='add'>+#ifdef CONFIG_CPU_SH4</div><div class='add'>+</div><div class='add'>+#if defined(DMAE1_IRQ)</div><div class='add'>+#define NR_DMAE		2</div><div class='add'>+#else</div><div class='add'>+#define NR_DMAE		1</div><div class='ctx'> #endif</div><div class='del'>-	case DMTE0_IRQ:</div><div class='del'>-		if (dmaor_read_reg(cnt) &amp; (DMAOR_NMIF | DMAOR_AE)) {</div><div class='del'>-			disable_irq(irq);</div><div class='del'>-			/* DMA multi and error IRQ */</div><div class='del'>-			return IRQ_HANDLED;</div><div class='del'>-		}</div><div class='del'>-	default:</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+static const char *dmae_name[] = {</div><div class='add'>+	"DMAC Address Error0",</div><div class='add'>+	"DMAC Address Error1"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SH_DMA_IRQ_MULTI</div><div class='add'>+static inline unsigned int get_dma_error_irq(int n)</div><div class='add'>+{</div><div class='add'>+	return get_dmte_irq(n * 6);</div><div class='add'>+}</div><div class='ctx'> #else</div><div class='del'>-	dmaor_reset(0);</div><div class='del'>-#if defined(CONFIG_CPU_SUBTYPE_SH7723)	|| \</div><div class='del'>-		defined(CONFIG_CPU_SUBTYPE_SH7780)	|| \</div><div class='del'>-		defined(CONFIG_CPU_SUBTYPE_SH7785)</div><div class='del'>-	dmaor_reset(1);</div><div class='add'>+</div><div class='add'>+static unsigned int dmae_irq_map[] = {</div><div class='add'>+	DMAE0_IRQ,</div><div class='add'>+</div><div class='add'>+#ifdef DMAE1_IRQ</div><div class='add'>+	DMAE1_IRQ,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline unsigned int get_dma_error_irq(int n)</div><div class='add'>+{</div><div class='add'>+	return dmae_irq_map[n];</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+static irqreturn_t dma_err(int irq, void *dummy)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; NR_DMAOR; i++)</div><div class='add'>+		dmaor_reset(i);</div><div class='add'>+</div><div class='ctx'> 	disable_irq(irq);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='del'>-#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dmae_irq_init(void)</div><div class='add'>+{</div><div class='add'>+	int n;</div><div class='add'>+</div><div class='add'>+	for (n = 0; n &lt; NR_DMAE; n++) {</div><div class='add'>+		int i = request_irq(get_dma_error_irq(n), dma_err,</div><div class='add'>+				    IRQF_SHARED, dmae_name[n], NULL);</div><div class='add'>+		if (unlikely(i &lt; 0)) {</div><div class='add'>+			printk(KERN_ERR "%s request_irq fail\n", dmae_name[n]);</div><div class='add'>+			return i;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dmae_irq_free(void)</div><div class='add'>+{</div><div class='add'>+	int n;</div><div class='add'>+</div><div class='add'>+	for (n = 0; n &lt; NR_DMAE; n++)</div><div class='add'>+		free_irq(get_dma_error_irq(n), NULL);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline int dmae_irq_init(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dmae_irq_free(void)</div><div class='add'>+{</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -276,72 +378,34 @@ static struct dma_info sh_dmac_info = {</div><div class='ctx'> 	.flags		= DMAC_CHANNELS_TEI_CAPABLE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CPU_SH4</div><div class='del'>-static unsigned int get_dma_error_irq(int n)</div><div class='del'>-{</div><div class='del'>-#if defined(CONFIG_SH_DMA_IRQ_MULTI)</div><div class='del'>-	return (n == 0) ? get_dmte_irq(0) : get_dmte_irq(6);</div><div class='del'>-#else</div><div class='del'>-	return (n == 0) ? DMAE0_IRQ :</div><div class='del'>-#if defined(DMAE1_IRQ)</div><div class='del'>-				DMAE1_IRQ;</div><div class='del'>-#else</div><div class='del'>-				-1;</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static int __init sh_dmac_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct dma_info *info = &amp;sh_dmac_info;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CPU_SH4</div><div class='del'>-	int n;</div><div class='add'>+	int i, rc;</div><div class='ctx'> </div><div class='del'>-	for (n = 0; n &lt; NR_DMAE; n++) {</div><div class='del'>-		i = request_irq(get_dma_error_irq(n), dma_err,</div><div class='del'>-#if defined(CONFIG_SH_DMA_IRQ_MULTI)</div><div class='del'>-				IRQF_SHARED,</div><div class='del'>-#else</div><div class='del'>-				0,</div><div class='del'>-#endif</div><div class='del'>-				dmae_name[n], (void *)dmae_name[n]);</div><div class='del'>-		if (unlikely(i &lt; 0)) {</div><div class='del'>-			printk(KERN_ERR "%s request_irq fail\n", dmae_name[n]);</div><div class='del'>-			return i;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-#endif /* CONFIG_CPU_SH4 */</div><div class='add'>+	/*</div><div class='add'>+	 * Initialize DMAE, for parts that support it.</div><div class='add'>+	 */</div><div class='add'>+	rc = dmae_irq_init();</div><div class='add'>+	if (unlikely(rc != 0))</div><div class='add'>+		return rc;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize DMAOR, and clean up any error flags that may have</div><div class='ctx'> 	 * been set.</div><div class='ctx'> 	 */</div><div class='del'>-	i = dmaor_reset(0);</div><div class='del'>-	if (unlikely(i != 0))</div><div class='del'>-		return i;</div><div class='del'>-#if defined(CONFIG_CPU_SUBTYPE_SH7723)	|| \</div><div class='del'>-		defined(CONFIG_CPU_SUBTYPE_SH7780)	|| \</div><div class='del'>-		defined(CONFIG_CPU_SUBTYPE_SH7785)</div><div class='del'>-	i = dmaor_reset(1);</div><div class='del'>-	if (unlikely(i != 0))</div><div class='del'>-		return i;</div><div class='del'>-#endif</div><div class='add'>+	for (i = 0; i &lt; NR_DMAOR; i++) {</div><div class='add'>+		rc = dmaor_reset(i);</div><div class='add'>+		if (unlikely(rc != 0))</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return register_dmac(info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit sh_dmac_exit(void)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_CPU_SH4</div><div class='del'>-	int n;</div><div class='del'>-</div><div class='del'>-	for (n = 0; n &lt; NR_DMAE; n++) {</div><div class='del'>-		free_irq(get_dma_error_irq(n), (void *)dmae_name[n]);</div><div class='del'>-	}</div><div class='del'>-#endif /* CONFIG_CPU_SH4 */</div><div class='add'>+	dmae_irq_free();</div><div class='ctx'> 	unregister_dmac(&amp;sh_dmac_info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/drivers/dma/dma-sysfs.c b/arch/sh/drivers/dma/dma-sysfs.c<br/>index 67ee95603813..4b15feda54b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/drivers/dma/dma-sysfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/drivers/dma/dma-sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/drivers/dma/dma-sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/dma/dma-sysfs.c</a></div><div class='hunk'>@@ -29,7 +29,7 @@ static ssize_t dma_show_devices(struct device *dev,</div><div class='ctx'> 	ssize_t len = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MAX_DMA_CHANNELS; i++) {</div><div class='add'>+	for (i = 0; i &lt; 16; i++) {</div><div class='ctx'> 		struct dma_info *info = get_dma_info(i);</div><div class='ctx'> 		struct dma_channel *channel = get_dma_channel(i);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/drivers/pci/fixups-landisk.c b/arch/sh/drivers/pci/fixups-landisk.c<br/>index ecb1d1060638..db5b40a98e62 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/drivers/pci/fixups-landisk.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/drivers/pci/fixups-landisk.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/drivers/pci/fixups-landisk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/fixups-landisk.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include "pci-sh4.h"</div><div class='ctx'> </div><div class='ctx'> #define PCIMCR_MRSET_OFF	0xBFFFFFFF</div><div class='hunk'>@@ -27,7 +28,7 @@ int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)</div><div class='ctx'> 	 * slot2: pin1-4 = irq7,8,5,6</div><div class='ctx'> 	 * slot3: pin1-4 = irq8,5,6,7</div><div class='ctx'> 	 */</div><div class='del'>-	int irq = ((slot + pin - 1) &amp; 0x3) + 5;</div><div class='add'>+	int irq = ((slot + pin - 1) &amp; 0x3) + evt2irq(0x2a0);</div><div class='ctx'> </div><div class='ctx'> 	if ((slot | (pin - 1)) &gt; 0x3) {</div><div class='ctx'> 		printk(KERN_WARNING "PCI: Bad IRQ mapping request for slot %d pin %c\n",</div><div class='head'>diff --git a/arch/sh/drivers/pci/fixups-r7780rp.c b/arch/sh/drivers/pci/fixups-r7780rp.c<br/>index f9370dce0b70..57ed3f09d0c2 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/drivers/pci/fixups-r7780rp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/drivers/pci/fixups-r7780rp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/drivers/pci/fixups-r7780rp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/fixups-r7780rp.c</a></div><div class='hunk'>@@ -12,13 +12,10 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include "pci-sh4.h"</div><div class='ctx'> </div><div class='del'>-static char irq_tab[] __initdata = {</div><div class='del'>-	65, 66, 67, 68,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)</div><div class='ctx'> {</div><div class='del'>-	return irq_tab[slot];</div><div class='add'>+	return evt2irq(0xa20) + slot;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sh/drivers/pci/fixups-sdk7780.c b/arch/sh/drivers/pci/fixups-sdk7780.c<br/>index 0b8472501b88..c0a015ae6ecf 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/drivers/pci/fixups-sdk7780.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/drivers/pci/fixups-sdk7780.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/drivers/pci/fixups-sdk7780.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/fixups-sdk7780.c</a></div><div class='hunk'>@@ -13,18 +13,28 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include "pci-sh4.h"</div><div class='ctx'> </div><div class='add'>+#define IRQ_INTA	evt2irq(0xa20)</div><div class='add'>+#define IRQ_INTB	evt2irq(0xa40)</div><div class='add'>+#define IRQ_INTC	evt2irq(0xa60)</div><div class='add'>+#define IRQ_INTD	evt2irq(0xa80)</div><div class='add'>+</div><div class='ctx'> /* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */</div><div class='ctx'> static char sdk7780_irq_tab[4][16] __initdata = {</div><div class='ctx'> 	/* INTA */</div><div class='del'>-	{ 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },</div><div class='add'>+	{ IRQ_INTA, IRQ_INTD, IRQ_INTC, IRQ_INTD, -1, -1, -1, -1, -1, -1,</div><div class='add'>+	  -1, -1, -1, -1, -1, -1 },</div><div class='ctx'> 	/* INTB */</div><div class='del'>-	{ 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },</div><div class='add'>+	{ IRQ_INTB, IRQ_INTA, -1, IRQ_INTA, -1, -1, -1, -1, -1, -1, -1, -1,</div><div class='add'>+	  -1, -1, -1, -1 },</div><div class='ctx'> 	/* INTC */</div><div class='del'>-	{ 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },</div><div class='add'>+	{ IRQ_INTC, IRQ_INTB, -1, IRQ_INTB, -1, -1, -1, -1, -1, -1, -1, -1,</div><div class='add'>+	  -1, -1, -1, -1 },</div><div class='ctx'> 	/* INTD */</div><div class='del'>-	{ 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },</div><div class='add'>+	{ IRQ_INTD, IRQ_INTC, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,</div><div class='add'>+	  -1, -1, -1 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)</div><div class='head'>diff --git a/arch/sh/drivers/pci/fixups-se7751.c b/arch/sh/drivers/pci/fixups-se7751.c<br/>index 2ec146c3fa44..84a88ca92008 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/drivers/pci/fixups-se7751.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/drivers/pci/fixups-se7751.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/drivers/pci/fixups-se7751.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/fixups-se7751.c</a></div><div class='hunk'>@@ -4,13 +4,14 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include "pci-sh4.h"</div><div class='ctx'> </div><div class='ctx'> int __init pcibios_map_platform_irq(const struct pci_dev *, u8 slot, u8 pin)</div><div class='ctx'> {</div><div class='ctx'>         switch (slot) {</div><div class='del'>-        case 0: return 13;</div><div class='del'>-        case 1: return 13;	/* AMD Ethernet controller */</div><div class='add'>+        case 0: return evt2irq(0x3a0);</div><div class='add'>+        case 1: return evt2irq(0x3a0);	/* AMD Ethernet controller */</div><div class='ctx'>         case 2: return -1;</div><div class='ctx'>         case 3: return -1;</div><div class='ctx'>         case 4: return -1;</div><div class='head'>diff --git a/arch/sh/drivers/pci/fixups-sh03.c b/arch/sh/drivers/pci/fixups-sh03.c<br/>index 1615e5906168..16207bef9f52 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/drivers/pci/fixups-sh03.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/drivers/pci/fixups-sh03.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/drivers/pci/fixups-sh03.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/fixups-sh03.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> </div><div class='ctx'> int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> {</div><div class='hunk'>@@ -9,21 +10,21 @@ int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;bus-&gt;number == 0) {</div><div class='ctx'> 		switch (slot) {</div><div class='del'>-		case 4: return 5;	/* eth0       */</div><div class='del'>-		case 8: return 5;	/* eth1       */</div><div class='del'>-		case 6: return 2;	/* PCI bridge */</div><div class='add'>+		case 4: return evt2irq(0x2a0);	/* eth0       */</div><div class='add'>+		case 8: return evt2irq(0x2a0);	/* eth1       */</div><div class='add'>+		case 6: return evt2irq(0x240);	/* PCI bridge */</div><div class='ctx'> 		default:</div><div class='ctx'> 			printk(KERN_ERR "PCI: Bad IRQ mapping request "</div><div class='ctx'> 					"for slot %d\n", slot);</div><div class='del'>-			return 2;</div><div class='add'>+			return evt2irq(0x240);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		switch (pin) {</div><div class='del'>-		case 0:   irq =  2; break;</div><div class='del'>-		case 1:   irq =  2; break;</div><div class='del'>-		case 2:   irq =  2; break;</div><div class='del'>-		case 3:   irq =  2; break;</div><div class='del'>-		case 4:   irq =  2; break;</div><div class='add'>+		case 0:   irq =  evt2irq(0x240); break;</div><div class='add'>+		case 1:   irq =  evt2irq(0x240); break;</div><div class='add'>+		case 2:   irq =  evt2irq(0x240); break;</div><div class='add'>+		case 3:   irq =  evt2irq(0x240); break;</div><div class='add'>+		case 4:   irq =  evt2irq(0x240); break;</div><div class='ctx'> 		default:  irq = -1; break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/sh/drivers/pci/fixups-snapgear.c b/arch/sh/drivers/pci/fixups-snapgear.c<br/>index 4a093c648d12..6e33ba4cd076 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/drivers/pci/fixups-snapgear.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/drivers/pci/fixups-snapgear.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/drivers/pci/fixups-snapgear.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/fixups-snapgear.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include "pci-sh4.h"</div><div class='ctx'> </div><div class='ctx'> int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)</div><div class='hunk'>@@ -24,11 +25,11 @@ int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)</div><div class='ctx'> </div><div class='ctx'> 	switch (slot) {</div><div class='ctx'> 	case 8:  /* the PCI bridge */ break;</div><div class='del'>-	case 11: irq = 8;  break; /* USB    */</div><div class='del'>-	case 12: irq = 11; break; /* PCMCIA */</div><div class='del'>-	case 13: irq = 5;  break; /* eth0   */</div><div class='del'>-	case 14: irq = 8;  break; /* eth1   */</div><div class='del'>-	case 15: irq = 11; break; /* safenet (unused) */</div><div class='add'>+	case 11: irq = evt2irq(0x300); break; /* USB    */</div><div class='add'>+	case 12: irq = evt2irq(0x360); break; /* PCMCIA */</div><div class='add'>+	case 13: irq = evt2irq(0x2a0); break; /* eth0   */</div><div class='add'>+	case 14: irq = evt2irq(0x300); break; /* eth1   */</div><div class='add'>+	case 15: irq = evt2irq(0x360); break; /* safenet (unused) */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n",</div><div class='head'>diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c<br/>index 4df27c4fbf99..c045142f7338 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/drivers/pci/pcie-sh7786.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/drivers/pci/pcie-sh7786.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/drivers/pci/pcie-sh7786.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/drivers/pci/pcie-sh7786.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/sh_clk.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include "pcie-sh7786.h"</div><div class='ctx'> #include &lt;asm/sizes.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -468,7 +469,7 @@ static int __init pcie_init(struct sh7786_pcie_port *port)</div><div class='ctx'> </div><div class='ctx'> int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)</div><div class='ctx'> {</div><div class='del'>-        return 71;</div><div class='add'>+        return evt2irq(0xae0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init sh7786_pcie_core_init(void)</div><div class='head'>diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h<br/>deleted file mode 100644<br/>index f3acb8e34c6b..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/dma-sh.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/dma-sh.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,87 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/sh/include/asm/dma-sh.h</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2000  Takashi YOSHII</div><div class='del'>- * Copyright (C) 2003  Paul Mundt</div><div class='del'>- *</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License.  See the file "COPYING" in the main directory of this archive</div><div class='del'>- * for more details.</div><div class='del'>- */</div><div class='del'>-#ifndef __DMA_SH_H</div><div class='del'>-#define __DMA_SH_H</div><div class='del'>-</div><div class='del'>-#include &lt;asm/dma-register.h&gt;</div><div class='del'>-#include &lt;cpu/dma-register.h&gt;</div><div class='del'>-#include &lt;cpu/dma.h&gt;</div><div class='del'>-</div><div class='del'>-/* DMAOR contorl: The DMAOR access size is different by CPU.*/</div><div class='del'>-#if defined(CONFIG_CPU_SUBTYPE_SH7723)	|| \</div><div class='del'>-    defined(CONFIG_CPU_SUBTYPE_SH7724)	|| \</div><div class='del'>-    defined(CONFIG_CPU_SUBTYPE_SH7780)	|| \</div><div class='del'>-    defined(CONFIG_CPU_SUBTYPE_SH7785)</div><div class='del'>-#define dmaor_read_reg(n) \</div><div class='del'>-    (n ? __raw_readw(SH_DMAC_BASE1 + DMAOR) \</div><div class='del'>-	: __raw_readw(SH_DMAC_BASE0 + DMAOR))</div><div class='del'>-#define dmaor_write_reg(n, data) \</div><div class='del'>-    (n ? __raw_writew(data, SH_DMAC_BASE1 + DMAOR) \</div><div class='del'>-    : __raw_writew(data, SH_DMAC_BASE0 + DMAOR))</div><div class='del'>-#else /* Other CPU */</div><div class='del'>-#define dmaor_read_reg(n) __raw_readw(SH_DMAC_BASE0 + DMAOR)</div><div class='del'>-#define dmaor_write_reg(n, data) __raw_writew(data, SH_DMAC_BASE0 + DMAOR)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int dmte_irq_map[] __maybe_unused = {</div><div class='del'>-#if (MAX_DMA_CHANNELS &gt;= 4)</div><div class='del'>-    DMTE0_IRQ,</div><div class='del'>-    DMTE0_IRQ + 1,</div><div class='del'>-    DMTE0_IRQ + 2,</div><div class='del'>-    DMTE0_IRQ + 3,</div><div class='del'>-#endif</div><div class='del'>-#if (MAX_DMA_CHANNELS &gt;= 6)</div><div class='del'>-    DMTE4_IRQ,</div><div class='del'>-    DMTE4_IRQ + 1,</div><div class='del'>-#endif</div><div class='del'>-#if (MAX_DMA_CHANNELS &gt;= 8)</div><div class='del'>-    DMTE6_IRQ,</div><div class='del'>-    DMTE6_IRQ + 1,</div><div class='del'>-#endif</div><div class='del'>-#if (MAX_DMA_CHANNELS &gt;= 12)</div><div class='del'>-    DMTE8_IRQ,</div><div class='del'>-    DMTE9_IRQ,</div><div class='del'>-    DMTE10_IRQ,</div><div class='del'>-    DMTE11_IRQ,</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Define the default configuration for dual address memory-memory transfer.</div><div class='del'>- * The 0x400 value represents auto-request, external-&gt;external.</div><div class='del'>- */</div><div class='del'>-#define RS_DUAL	(DM_INC | SM_INC | 0x400 | TS_INDEX2VAL(XMIT_SZ_32BIT))</div><div class='del'>-</div><div class='del'>-/* DMA base address */</div><div class='del'>-static u32 dma_base_addr[] __maybe_unused = {</div><div class='del'>-#if (MAX_DMA_CHANNELS &gt;= 4)</div><div class='del'>-	SH_DMAC_BASE0 + 0x00,	/* channel 0 */</div><div class='del'>-	SH_DMAC_BASE0 + 0x10,</div><div class='del'>-	SH_DMAC_BASE0 + 0x20,</div><div class='del'>-	SH_DMAC_BASE0 + 0x30,</div><div class='del'>-#endif</div><div class='del'>-#if (MAX_DMA_CHANNELS &gt;= 6)</div><div class='del'>-	SH_DMAC_BASE0 + 0x50,</div><div class='del'>-	SH_DMAC_BASE0 + 0x60,</div><div class='del'>-#endif</div><div class='del'>-#if (MAX_DMA_CHANNELS &gt;= 8)</div><div class='del'>-	SH_DMAC_BASE1 + 0x00,</div><div class='del'>-	SH_DMAC_BASE1 + 0x10,</div><div class='del'>-#endif</div><div class='del'>-#if (MAX_DMA_CHANNELS &gt;= 12)</div><div class='del'>-	SH_DMAC_BASE1 + 0x20,</div><div class='del'>-	SH_DMAC_BASE1 + 0x30,</div><div class='del'>-	SH_DMAC_BASE1 + 0x50,</div><div class='del'>-	SH_DMAC_BASE1 + 0x60, /* channel 11 */</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif /* __DMA_SH_H */</div><div class='head'>diff --git a/arch/sh/include/asm/dma.h b/arch/sh/include/asm/dma.h<br/>index 6aa2080c0065..fb6e4f7b00a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/dma.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/dma.h</a></div><div class='hunk'>@@ -15,17 +15,8 @@</div><div class='ctx'> #include &lt;linux/wait.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;cpu/dma.h&gt;</div><div class='ctx'> #include &lt;asm-generic/dma.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_NR_DMA_CHANNELS</div><div class='del'>-#  define MAX_DMA_CHANNELS	(CONFIG_NR_DMA_CHANNELS)</div><div class='del'>-#elif defined(CONFIG_NR_ONCHIP_DMA_CHANNELS)</div><div class='del'>-#  define MAX_DMA_CHANNELS	(CONFIG_NR_ONCHIP_DMA_CHANNELS)</div><div class='del'>-#else</div><div class='del'>-#  define MAX_DMA_CHANNELS	0</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Read and write modes can mean drastically different things depending on the</div><div class='ctx'>  * channel configuration. Consult your DMAC documentation and module</div><div class='head'>diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h<br/>index bd7e79a12653..cbe0186b6794 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/fixmap.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/fixmap.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/fixmap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/fixmap.h</a></div><div class='hunk'>@@ -96,7 +96,7 @@ extern void __clear_fixmap(enum fixed_addresses idx, pgprot_t flags);</div><div class='ctx'> #ifdef CONFIG_SUPERH32</div><div class='ctx'> #define FIXADDR_TOP	(P4SEG - PAGE_SIZE)</div><div class='ctx'> #else</div><div class='del'>-#define FIXADDR_TOP	(0xff000000 - PAGE_SIZE)</div><div class='add'>+#define FIXADDR_TOP	((unsigned long)(-PAGE_SIZE))</div><div class='ctx'> #endif</div><div class='ctx'> #define FIXADDR_SIZE	(__end_of_fixed_addresses &lt;&lt; PAGE_SHIFT)</div><div class='ctx'> #define FIXADDR_START	(FIXADDR_TOP - FIXADDR_SIZE)</div><div class='head'>diff --git a/arch/sh/include/asm/i2c-sh7760.h b/arch/sh/include/asm/i2c-sh7760.h<br/>index 24182116711f..69fee1239b03 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/i2c-sh7760.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/i2c-sh7760.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/i2c-sh7760.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/i2c-sh7760.h</a></div><div class='hunk'>@@ -9,11 +9,9 @@</div><div class='ctx'> </div><div class='ctx'> #define SH7760_I2C0_MMIO	0xFE140000</div><div class='ctx'> #define SH7760_I2C0_MMIOEND	0xFE14003B</div><div class='del'>-#define SH7760_I2C0_IRQ		62</div><div class='ctx'> </div><div class='ctx'> #define SH7760_I2C1_MMIO	0xFE150000</div><div class='ctx'> #define SH7760_I2C1_MMIOEND	0xFE15003B</div><div class='del'>-#define SH7760_I2C1_IRQ		63</div><div class='ctx'> </div><div class='ctx'> struct sh7760_i2c_platdata {</div><div class='ctx'> 	unsigned int speed_khz;</div><div class='head'>diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h<br/>index ec464a6b95fe..0cf60a628814 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/io.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/io.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/io.h</a></div><div class='hunk'>@@ -218,8 +218,13 @@ __BUILD_IOPORT_STRING(w, u16)</div><div class='ctx'> __BUILD_IOPORT_STRING(l, u32)</div><div class='ctx'> __BUILD_IOPORT_STRING(q, u64)</div><div class='ctx'> </div><div class='add'>+#else /* !CONFIG_HAS_IOPORT */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/io_noioport.h&gt;</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> #define IO_SPACE_LIMIT 0xffffffff</div><div class='ctx'> </div><div class='ctx'> /* synco on SH-4A, otherwise a nop */</div><div class='head'>diff --git a/arch/sh/include/asm/io_noioport.h b/arch/sh/include/asm/io_noioport.h<br/>new file mode 100644<br/>index 000000000000..e136d28d1d2e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/io_noioport.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/io_noioport.h</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+#ifndef __ASM_SH_IO_NOIOPORT_H</div><div class='add'>+#define __ASM_SH_IO_NOIOPORT_H</div><div class='add'>+</div><div class='add'>+static inline u8 inb(unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	BUG();</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16 inw(unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	BUG();</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 inl(unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	BUG();</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define outb(x, y)	BUG()</div><div class='add'>+#define outw(x, y)	BUG()</div><div class='add'>+#define outl(x, y)	BUG()</div><div class='add'>+</div><div class='add'>+#define inb_p(addr)	inb(addr)</div><div class='add'>+#define inw_p(addr)	inw(addr)</div><div class='add'>+#define inl_p(addr)	inl(addr)</div><div class='add'>+#define outb_p(x, addr)	outb((x), (addr))</div><div class='add'>+#define outw_p(x, addr)	outw((x), (addr))</div><div class='add'>+#define outl_p(x, addr)	outl((x), (addr))</div><div class='add'>+</div><div class='add'>+#define insb(a, b, c)	BUG()</div><div class='add'>+#define insw(a, b, c)	BUG()</div><div class='add'>+#define insl(a, b, c)	BUG()</div><div class='add'>+</div><div class='add'>+#define outsb(a, b, c)	BUG()</div><div class='add'>+#define outsw(a, b, c)	BUG()</div><div class='add'>+#define outsl(a, b, c)	BUG()</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_SH_IO_NOIOPORT_H */</div><div class='head'>diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h<br/>index 2a62017eb275..0e4f532e4737 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/irq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/irq.h</a></div><div class='hunk'>@@ -5,12 +5,15 @@</div><div class='ctx'> #include &lt;asm/machvec.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * A sane default based on a reasonable vector table size, platforms are</div><div class='del'>- * advised to cap this at the hard limit that they're interested in</div><div class='del'>- * through the machvec.</div><div class='add'>+ * Only legacy non-sparseirq platforms have to set a reasonably sane</div><div class='add'>+ * value here. sparseirq platforms allocate their irq_descs on the fly,</div><div class='add'>+ * so will expand automatically based on the number of registered IRQs.</div><div class='ctx'>  */</div><div class='del'>-#define NR_IRQS			512</div><div class='del'>-#define NR_IRQS_LEGACY		8	/* Legacy external IRQ0-7 */</div><div class='add'>+#ifdef CONFIG_SPARSE_IRQ</div><div class='add'>+# define NR_IRQS		8</div><div class='add'>+#else</div><div class='add'>+# define NR_IRQS		512</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This is a special IRQ number for indicating that no IRQ has been</div><div class='head'>diff --git a/arch/sh/include/asm/kdebug.h b/arch/sh/include/asm/kdebug.h<br/>index 5f6d2e9ccb7c..a6201f10c273 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/kdebug.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/kdebug.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/kdebug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/kdebug.h</a></div><div class='hunk'>@@ -10,4 +10,6 @@ enum die_val {</div><div class='ctx'> 	DIE_SSTEP,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+extern void printk_address(unsigned long address, int reliable);</div><div class='add'>+</div><div class='ctx'> #endif /* __ASM_SH_KDEBUG_H */</div><div class='head'>diff --git a/arch/sh/include/asm/kgdb.h b/arch/sh/include/asm/kgdb.h<br/>index f3613952d1ae..9e7d2d1b03e0 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/kgdb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/kgdb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/kgdb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/kgdb.h</a></div><div class='hunk'>@@ -4,18 +4,6 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> </div><div class='del'>-/* Same as pt_regs but has vbr in place of syscall_nr */</div><div class='del'>-struct kgdb_regs {</div><div class='del'>-        unsigned long regs[16];</div><div class='del'>-        unsigned long pc;</div><div class='del'>-        unsigned long pr;</div><div class='del'>-        unsigned long sr;</div><div class='del'>-        unsigned long gbr;</div><div class='del'>-        unsigned long mach;</div><div class='del'>-        unsigned long macl;</div><div class='del'>-        unsigned long vbr;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> enum regnames {</div><div class='ctx'> 	GDB_R0, GDB_R1, GDB_R2, GDB_R3, GDB_R4, GDB_R5, GDB_R6, GDB_R7,</div><div class='ctx'> 	GDB_R8, GDB_R9, GDB_R10, GDB_R11, GDB_R12, GDB_R13, GDB_R14, GDB_R15,</div><div class='hunk'>@@ -23,17 +11,27 @@ enum regnames {</div><div class='ctx'> 	GDB_PC, GDB_PR, GDB_SR, GDB_GBR, GDB_MACH, GDB_MACL, GDB_VBR,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define NUMREGBYTES    ((GDB_VBR + 1) * 4)</div><div class='add'>+#define _GP_REGS	16</div><div class='add'>+#define _EXTRA_REGS	7</div><div class='add'>+#define GDB_SIZEOF_REG	sizeof(u32)</div><div class='add'>+</div><div class='add'>+#define DBG_MAX_REG_NUM	(_GP_REGS + _EXTRA_REGS)</div><div class='add'>+#define NUMREGBYTES	(DBG_MAX_REG_NUM * sizeof(GDB_SIZEOF_REG))</div><div class='ctx'> </div><div class='ctx'> static inline void arch_kgdb_breakpoint(void)</div><div class='ctx'> {</div><div class='ctx'> 	__asm__ __volatile__ ("trapa #0x3c\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define BUFMAX                 2048</div><div class='del'>-</div><div class='del'>-#define CACHE_FLUSH_IS_SAFE	1</div><div class='ctx'> #define BREAK_INSTR_SIZE	2</div><div class='add'>+#define BUFMAX			2048</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+# define CACHE_FLUSH_IS_SAFE	0</div><div class='add'>+#else</div><div class='add'>+# define CACHE_FLUSH_IS_SAFE	1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #define GDB_ADJUSTS_BREAK_OFFSET</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_SH_KGDB_H */</div><div class='head'>diff --git a/arch/sh/include/asm/kvm_para.h b/arch/sh/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h<br/>index 57c5c3d0f39f..eb9c20d971dd 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/machvec.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/machvec.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/machvec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/machvec.h</a></div><div class='hunk'>@@ -17,7 +17,6 @@</div><div class='ctx'> struct sh_machine_vector {</div><div class='ctx'> 	void (*mv_setup)(char **cmdline_p);</div><div class='ctx'> 	const char *mv_name;</div><div class='del'>-	int mv_nr_irqs;</div><div class='ctx'> </div><div class='ctx'> 	int (*mv_irq_demux)(int irq);</div><div class='ctx'> 	void (*mv_init_irq)(void);</div><div class='head'>diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h<br/>index 42cb9dd52161..dda8c82601b9 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/pgtable_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/pgtable_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/pgtable_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/pgtable_64.h</a></div><div class='hunk'>@@ -87,9 +87,6 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)</div><div class='ctx'> #define pte_unmap(pte)		do { } while (0)</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='del'>-#define IOBASE_VADDR	0xff000000</div><div class='del'>-#define IOBASE_END	0xffffffff</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * PTEL coherent flags.</div><div class='ctx'>  * See Chapter 17 ST50 CPU Core Volume 1, Architecture.</div><div class='head'>diff --git a/arch/sh/include/asm/posix_types_32.h b/arch/sh/include/asm/posix_types_32.h<br/>index abda58467ece..ba0bdc423b07 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/posix_types_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/posix_types_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/posix_types_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/posix_types_32.h</a></div><div class='hunk'>@@ -3,8 +3,6 @@</div><div class='ctx'> </div><div class='ctx'> typedef unsigned short	__kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='del'>-typedef unsigned short	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='ctx'> typedef unsigned short	__kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> typedef unsigned short	__kernel_uid_t;</div><div class='head'>diff --git a/arch/sh/include/asm/posix_types_64.h b/arch/sh/include/asm/posix_types_64.h<br/>index fcda07b4a616..244f7e950e17 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/posix_types_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/posix_types_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/posix_types_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/posix_types_64.h</a></div><div class='hunk'>@@ -3,8 +3,6 @@</div><div class='ctx'> </div><div class='ctx'> typedef unsigned short	__kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='del'>-typedef unsigned short	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='ctx'> typedef unsigned short	__kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> typedef unsigned short	__kernel_uid_t;</div><div class='head'>diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h<br/>index a229c393826a..3d14aeaef57c 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/processor.h</a></div><div class='hunk'>@@ -18,7 +18,8 @@ enum cpu_type {</div><div class='ctx'> 	CPU_SH7619,</div><div class='ctx'> </div><div class='ctx'> 	/* SH-2A types */</div><div class='del'>-	CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,</div><div class='add'>+	CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_SH7264, CPU_SH7269,</div><div class='add'>+	CPU_MXG,</div><div class='ctx'> </div><div class='ctx'> 	/* SH-3 types */</div><div class='ctx'> 	CPU_SH7705, CPU_SH7706, CPU_SH7707,</div><div class='hunk'>@@ -32,7 +33,7 @@ enum cpu_type {</div><div class='ctx'> </div><div class='ctx'> 	/* SH-4A types */</div><div class='ctx'> 	CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786,</div><div class='del'>-	CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3,</div><div class='add'>+	CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SH7734, CPU_SHX3,</div><div class='ctx'> </div><div class='ctx'> 	/* SH4AL-DSP types */</div><div class='ctx'> 	CPU_SH7343, CPU_SH7722, CPU_SH7366, CPU_SH7372,</div><div class='hunk'>@@ -85,10 +86,6 @@ struct sh_cpuinfo {</div><div class='ctx'> 	struct tlb_info itlb;</div><div class='ctx'> 	struct tlb_info dtlb;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	struct task_struct *idle;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	unsigned int phys_bits;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> } __attribute__ ((aligned(L1_CACHE_BYTES)));</div><div class='hunk'>@@ -102,7 +99,6 @@ extern struct sh_cpuinfo cpu_data[];</div><div class='ctx'> #define cpu_relax()	barrier()</div><div class='ctx'> </div><div class='ctx'> void default_idle(void);</div><div class='del'>-void cpu_idle_wait(void);</div><div class='ctx'> void stop_this_cpu(void *);</div><div class='ctx'> </div><div class='ctx'> /* Forward decl */</div><div class='head'>diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h<br/>index 900f8d72ffe2..b6311fd2d066 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/processor_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/processor_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/processor_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/processor_32.h</a></div><div class='hunk'>@@ -126,9 +126,6 @@ extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned lo</div><div class='ctx'> /* Free all resources held by a thread. */</div><div class='ctx'> extern void release_thread(struct task_struct *);</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-void prepare_to_copy(struct task_struct *tsk);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * create a kernel thread without removing it from tasklists</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h<br/>index e25c4c7d6b63..cd6029fb2c01 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/processor_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/processor_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/processor_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/processor_64.h</a></div><div class='hunk'>@@ -121,7 +121,6 @@ struct thread_struct {</div><div class='ctx'> 	   NULL for a kernel thread. */</div><div class='ctx'> 	struct pt_regs *uregs;</div><div class='ctx'> </div><div class='del'>-	unsigned long trap_no, error_code;</div><div class='ctx'> 	unsigned long address;</div><div class='ctx'> 	/* Hardware debugging registers may come here */</div><div class='ctx'> </div><div class='hunk'>@@ -138,8 +137,6 @@ struct thread_struct {</div><div class='ctx'> 	.pc		= 0,			\</div><div class='ctx'>         .kregs		= &amp;fake_swapper_regs,	\</div><div class='ctx'> 	.uregs	        = NULL,			\</div><div class='del'>-	.trap_no	= 0,			\</div><div class='del'>-	.error_code	= 0,			\</div><div class='ctx'> 	.address	= 0,			\</div><div class='ctx'> 	.flags		= 0,			\</div><div class='ctx'> }</div><div class='hunk'>@@ -172,7 +169,6 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);</div><div class='ctx'> #define copy_segments(p, mm)	do { } while (0)</div><div class='ctx'> #define release_segments(mm)	do { } while (0)</div><div class='ctx'> #define forget_segments()	do { } while (0)</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='ctx'> /*</div><div class='ctx'>  * FPU lazy state save handling.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/sh/include/asm/stackprotector.h b/arch/sh/include/asm/stackprotector.h<br/>new file mode 100644<br/>index 000000000000..d9df3a76847c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/stackprotector.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/stackprotector.h</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+#ifndef __ASM_SH_STACKPROTECTOR_H</div><div class='add'>+#define __ASM_SH_STACKPROTECTOR_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/random.h&gt;</div><div class='add'>+#include &lt;linux/version.h&gt;</div><div class='add'>+</div><div class='add'>+extern unsigned long __stack_chk_guard;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initialize the stackprotector canary value.</div><div class='add'>+ *</div><div class='add'>+ * NOTE: this must only be called from functions that never return,</div><div class='add'>+ * and it must always be inlined.</div><div class='add'>+ */</div><div class='add'>+static __always_inline void boot_init_stack_canary(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long canary;</div><div class='add'>+</div><div class='add'>+	/* Try to get a semi random initial value. */</div><div class='add'>+	get_random_bytes(&amp;canary, sizeof(canary));</div><div class='add'>+	canary ^= LINUX_VERSION_CODE;</div><div class='add'>+</div><div class='add'>+	current-&gt;stack_canary = canary;</div><div class='add'>+	__stack_chk_guard = current-&gt;stack_canary;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_SH_STACKPROTECTOR_H */</div><div class='head'>diff --git a/arch/sh/include/asm/syscalls_32.h b/arch/sh/include/asm/syscalls_32.h<br/>index ae717e3c26d6..6c1fa559753c 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/syscalls_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/syscalls_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/syscalls_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/syscalls_32.h</a></div><div class='hunk'>@@ -23,9 +23,7 @@ asmlinkage int sys_execve(const char __user *ufilename,</div><div class='ctx'> 			  const char __user *const __user *uargv,</div><div class='ctx'> 			  const char __user *const __user *uenvp,</div><div class='ctx'> 			  unsigned long r7, struct pt_regs __regs);</div><div class='del'>-asmlinkage int sys_sigsuspend(old_sigset_t mask, unsigned long r5,</div><div class='del'>-			      unsigned long r6, unsigned long r7,</div><div class='del'>-			      struct pt_regs __regs);</div><div class='add'>+asmlinkage int sys_sigsuspend(old_sigset_t mask);</div><div class='ctx'> asmlinkage int sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='ctx'> 			     struct old_sigaction __user *oact);</div><div class='ctx'> asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,</div><div class='head'>diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h<br/>index 20ee40af16e9..bc13b57cdc83 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/thread_info.h</a></div><div class='hunk'>@@ -10,8 +10,18 @@</div><div class='ctx'>  *  - Incorporating suggestions made by Linus Torvalds and Dave Miller</div><div class='ctx'>  */</div><div class='ctx'> #ifdef __KERNEL__</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Page fault error code bits</div><div class='add'>+ */</div><div class='add'>+#define FAULT_CODE_WRITE	(1 &lt;&lt; 0)	/* write access */</div><div class='add'>+#define FAULT_CODE_INITIAL	(1 &lt;&lt; 1)	/* initial page write */</div><div class='add'>+#define FAULT_CODE_ITLB		(1 &lt;&lt; 2)	/* ITLB miss */</div><div class='add'>+#define FAULT_CODE_PROT		(1 &lt;&lt; 3)	/* protection fault */</div><div class='add'>+#define FAULT_CODE_USER		(1 &lt;&lt; 4)	/* user-mode access */</div><div class='add'>+</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -88,29 +98,23 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> 	return ti;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* thread information allocation */</div><div class='del'>-#if THREAD_SHIFT &gt;= PAGE_SHIFT</div><div class='del'>-</div><div class='ctx'> #define THREAD_SIZE_ORDER	(THREAD_SHIFT - PAGE_SHIFT)</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-extern struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node);</div><div class='del'>-extern void free_thread_info(struct thread_info *ti);</div><div class='ctx'> extern void arch_task_cache_init(void);</div><div class='del'>-#define arch_task_cache_init arch_task_cache_init</div><div class='ctx'> extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);</div><div class='add'>+extern void arch_release_task_struct(struct task_struct *tsk);</div><div class='ctx'> extern void init_thread_xstate(void);</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * thread information flags</div><div class='del'>- * - these are process state flags that various assembly files may need to access</div><div class='del'>- * - pending work-to-be-done flags are in LSW</div><div class='del'>- * - other flags in MSW</div><div class='add'>+ * Thread information flags</div><div class='add'>+ *</div><div class='add'>+ * - Limited to 24 bits, upper byte used for fault code encoding.</div><div class='add'>+ *</div><div class='add'>+ * - _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or</div><div class='add'>+ *   we blow the tst immediate size constraints and need to fix up</div><div class='add'>+ *   arch/sh/kernel/entry-common.S.</div><div class='ctx'>  */</div><div class='ctx'> #define TIF_SYSCALL_TRACE	0	/* syscall trace active */</div><div class='ctx'> #define TIF_SIGPENDING		1	/* signal pending */</div><div class='hunk'>@@ -133,12 +137,6 @@ extern void init_thread_xstate(void);</div><div class='ctx'> #define _TIF_SYSCALL_TRACEPOINT	(1 &lt;&lt; TIF_SYSCALL_TRACEPOINT)</div><div class='ctx'> #define _TIF_POLLING_NRFLAG	(1 &lt;&lt; TIF_POLLING_NRFLAG)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or we</div><div class='del'>- * blow the tst immediate size constraints and need to fix up</div><div class='del'>- * arch/sh/kernel/entry-common.S.</div><div class='del'>- */</div><div class='del'>-</div><div class='ctx'> /* work to do in syscall trace */</div><div class='ctx'> #define _TIF_WORK_SYSCALL_MASK	(_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \</div><div class='ctx'> 				 _TIF_SYSCALL_AUDIT | _TIF_SECCOMP    | \</div><div class='hunk'>@@ -165,12 +163,48 @@ extern void init_thread_xstate(void);</div><div class='ctx'> #define TS_USEDFPU		0x0002	/* FPU used by this task this quantum */</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='add'>+</div><div class='ctx'> #define HAVE_SET_RESTORE_SIGMASK	1</div><div class='ctx'> static inline void set_restore_sigmask(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_info *ti = current_thread_info();</div><div class='ctx'> 	ti-&gt;status |= TS_RESTORE_SIGMASK;</div><div class='del'>-	set_bit(TIF_SIGPENDING, (unsigned long *)&amp;ti-&gt;flags);</div><div class='add'>+	WARN_ON(!test_bit(TIF_SIGPENDING, (unsigned long *)&amp;ti-&gt;flags));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define TI_FLAG_FAULT_CODE_SHIFT	24</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Additional thread flag encoding</div><div class='add'>+ */</div><div class='add'>+static inline void set_thread_fault_code(unsigned int val)</div><div class='add'>+{</div><div class='add'>+	struct thread_info *ti = current_thread_info();</div><div class='add'>+	ti-&gt;flags = (ti-&gt;flags &amp; (~0 &gt;&gt; (32 - TI_FLAG_FAULT_CODE_SHIFT)))</div><div class='add'>+		| (val &lt;&lt; TI_FLAG_FAULT_CODE_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int get_thread_fault_code(void)</div><div class='add'>+{</div><div class='add'>+	struct thread_info *ti = current_thread_info();</div><div class='add'>+	return ti-&gt;flags &gt;&gt; TI_FLAG_FAULT_CODE_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	return current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_and_clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	struct thread_info *ti = current_thread_info();</div><div class='add'>+	if (!(ti-&gt;status &amp; TS_RESTORE_SIGMASK))</div><div class='add'>+		return false;</div><div class='add'>+	ti-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> #endif	/* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h<br/>index 88e734069fa6..b0a282d65f6a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/topology.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/topology.h</a></div><div class='hunk'>@@ -3,31 +3,6 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_NUMA</div><div class='ctx'> </div><div class='del'>-/* sched_domains SD_NODE_INIT for sh machines */</div><div class='del'>-#define SD_NODE_INIT (struct sched_domain) {		\</div><div class='del'>-	.parent			= NULL,			\</div><div class='del'>-	.child			= NULL,			\</div><div class='del'>-	.groups			= NULL,			\</div><div class='del'>-	.min_interval		= 8,			\</div><div class='del'>-	.max_interval		= 32,			\</div><div class='del'>-	.busy_factor		= 32,			\</div><div class='del'>-	.imbalance_pct		= 125,			\</div><div class='del'>-	.cache_nice_tries	= 2,			\</div><div class='del'>-	.busy_idx		= 3,			\</div><div class='del'>-	.idle_idx		= 2,			\</div><div class='del'>-	.newidle_idx		= 0,			\</div><div class='del'>-	.wake_idx		= 0,			\</div><div class='del'>-	.forkexec_idx		= 0,			\</div><div class='del'>-	.flags			= SD_LOAD_BALANCE	\</div><div class='del'>-				| SD_BALANCE_FORK	\</div><div class='del'>-				| SD_BALANCE_EXEC	\</div><div class='del'>-				| SD_BALANCE_NEWIDLE	\</div><div class='del'>-				| SD_SERIALIZE,		\</div><div class='del'>-	.last_balance		= jiffies,		\</div><div class='del'>-	.balance_interval	= 1,			\</div><div class='del'>-	.nr_balance_failed	= 0,			\</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define cpu_to_node(cpu)	((void)(cpu),0)</div><div class='ctx'> #define parent_node(node)	((void)(node),0)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/include/asm/traps_64.h b/arch/sh/include/asm/traps_64.h<br/>index c52d7f9a06c1..ef5eff919449 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/traps_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/traps_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/traps_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/traps_64.h</a></div><div class='hunk'>@@ -10,8 +10,22 @@</div><div class='ctx'> #ifndef __ASM_SH_TRAPS_64_H</div><div class='ctx'> #define __ASM_SH_TRAPS_64_H</div><div class='ctx'> </div><div class='add'>+#include &lt;cpu/registers.h&gt;</div><div class='add'>+</div><div class='ctx'> extern void phys_stext(void);</div><div class='ctx'> </div><div class='add'>+#define lookup_exception_vector()		\</div><div class='add'>+({						\</div><div class='add'>+	unsigned long _vec;			\</div><div class='add'>+						\</div><div class='add'>+	__asm__ __volatile__ (			\</div><div class='add'>+		"getcon " __EXPEVT ", %0\n\t"	\</div><div class='add'>+		: "=r" (_vec)			\</div><div class='add'>+	);					\</div><div class='add'>+						\</div><div class='add'>+	_vec;					\</div><div class='add'>+})</div><div class='add'>+</div><div class='ctx'> static inline void trigger_address_error(void)</div><div class='ctx'> {</div><div class='ctx'> 	phys_stext();</div><div class='head'>diff --git a/arch/sh/include/asm/unistd.h b/arch/sh/include/asm/unistd.h<br/>index a42a5610a36a..e800a38c9f8d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/asm/unistd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/asm/unistd.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/asm/unistd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/asm/unistd.h</a></div><div class='hunk'>@@ -1,13 +1,11 @@</div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> # ifdef CONFIG_SUPERH32</div><div class='del'>-</div><div class='ctx'> #  include "unistd_32.h"</div><div class='del'>-#  define __ARCH_WANT_SYS_RT_SIGSUSPEND</div><div class='del'>-</div><div class='ctx'> # else</div><div class='ctx'> #  include "unistd_64.h"</div><div class='ctx'> # endif</div><div class='ctx'> </div><div class='add'>+# define __ARCH_WANT_SYS_RT_SIGSUSPEND</div><div class='ctx'> # define __ARCH_WANT_IPC_PARSE_VERSION</div><div class='ctx'> # define __ARCH_WANT_OLD_READDIR</div><div class='ctx'> # define __ARCH_WANT_OLD_STAT</div><div class='head'>diff --git a/arch/sh/include/cpu-sh2/cpu/dma.h b/arch/sh/include/cpu-sh2/cpu/dma.h<br/>deleted file mode 100644<br/>index d66b43cdc637..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/cpu-sh2/cpu/dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/cpu-sh2/cpu/dma.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Definitions for the SH-2 DMAC.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2003  Paul Mundt</div><div class='del'>- *</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License.  See the file "COPYING" in the main directory of this archive</div><div class='del'>- * for more details.</div><div class='del'>- */</div><div class='del'>-#ifndef __ASM_CPU_SH2_DMA_H</div><div class='del'>-#define __ASM_CPU_SH2_DMA_H</div><div class='del'>-</div><div class='del'>-#define SH_MAX_DMA_CHANNELS	2</div><div class='del'>-</div><div class='del'>-#define SAR	((unsigned long[]){ 0xffffff80, 0xffffff90 })</div><div class='del'>-#define DAR	((unsigned long[]){ 0xffffff84, 0xffffff94 })</div><div class='del'>-#define DMATCR	((unsigned long[]){ 0xffffff88, 0xffffff98 })</div><div class='del'>-#define CHCR	((unsigned long[]){ 0xfffffffc, 0xffffff9c })</div><div class='del'>-</div><div class='del'>-#define DMAOR	0xffffffb0</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_CPU_SH2_DMA_H */</div><div class='del'>-</div><div class='head'>diff --git a/arch/sh/include/cpu-sh2a/cpu/dma.h b/arch/sh/include/cpu-sh2a/cpu/dma.h<br/>deleted file mode 100644<br/>index 27a13ef4fdfc..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/cpu-sh2a/cpu/dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/cpu-sh2a/cpu/dma.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-#include &lt;cpu-sh2/cpu/dma.h&gt;</div><div class='head'>diff --git a/arch/sh/include/cpu-sh2a/cpu/sh7264.h b/arch/sh/include/cpu-sh2a/cpu/sh7264.h<br/>new file mode 100644<br/>index 000000000000..4d1ef6d74bd6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/cpu-sh2a/cpu/sh7264.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh2a/cpu/sh7264.h</a></div><div class='hunk'>@@ -0,0 +1,176 @@</div><div class='add'>+#ifndef __ASM_SH7264_H__</div><div class='add'>+#define __ASM_SH7264_H__</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	/* Port A */</div><div class='add'>+	GPIO_PA3, GPIO_PA2, GPIO_PA1, GPIO_PA0,</div><div class='add'>+</div><div class='add'>+	/* Port B */</div><div class='add'>+	GPIO_PB22, GPIO_PB21, GPIO_PB20,</div><div class='add'>+	GPIO_PB19, GPIO_PB18, GPIO_PB17, GPIO_PB16,</div><div class='add'>+	GPIO_PB15, GPIO_PB14, GPIO_PB13, GPIO_PB12,</div><div class='add'>+	GPIO_PB11, GPIO_PB10, GPIO_PB9, GPIO_PB8,</div><div class='add'>+	GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4,</div><div class='add'>+	GPIO_PB3, GPIO_PB2, GPIO_PB1,</div><div class='add'>+</div><div class='add'>+	/* Port C */</div><div class='add'>+	GPIO_PC10, GPIO_PC9, GPIO_PC8,</div><div class='add'>+	GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4,</div><div class='add'>+	GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0,</div><div class='add'>+</div><div class='add'>+	/* Port D */</div><div class='add'>+	GPIO_PD15, GPIO_PD14, GPIO_PD13, GPIO_PD12,</div><div class='add'>+	GPIO_PD11, GPIO_PD10, GPIO_PD9, GPIO_PD8,</div><div class='add'>+	GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4,</div><div class='add'>+	GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0,</div><div class='add'>+</div><div class='add'>+	/* Port E */</div><div class='add'>+	GPIO_PE5, GPIO_PE4,</div><div class='add'>+	GPIO_PE3, GPIO_PE2, GPIO_PE1, GPIO_PE0,</div><div class='add'>+</div><div class='add'>+	/* Port F */</div><div class='add'>+	GPIO_PF12,</div><div class='add'>+	GPIO_PF11, GPIO_PF10, GPIO_PF9, GPIO_PF8,</div><div class='add'>+	GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4,</div><div class='add'>+	GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0,</div><div class='add'>+</div><div class='add'>+	/* Port G */</div><div class='add'>+	GPIO_PG24,</div><div class='add'>+	GPIO_PG23, GPIO_PG22, GPIO_PG21, GPIO_PG20,</div><div class='add'>+	GPIO_PG19, GPIO_PG18, GPIO_PG17, GPIO_PG16,</div><div class='add'>+	GPIO_PG15, GPIO_PG14, GPIO_PG13, GPIO_PG12,</div><div class='add'>+	GPIO_PG11, GPIO_PG10, GPIO_PG9, GPIO_PG8,</div><div class='add'>+	GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4,</div><div class='add'>+	GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0,</div><div class='add'>+</div><div class='add'>+	/* Port H */</div><div class='add'>+	GPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4,</div><div class='add'>+	GPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0,</div><div class='add'>+</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+</div><div class='add'>+	/* Port J */</div><div class='add'>+	GPIO_PJ11, GPIO_PJ10, GPIO_PJ9, GPIO_PJ8,</div><div class='add'>+	GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4,</div><div class='add'>+	GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0,</div><div class='add'>+</div><div class='add'>+	/* Port K */</div><div class='add'>+	GPIO_PK11, GPIO_PK10, GPIO_PK9, GPIO_PK8,</div><div class='add'>+	GPIO_PK7, GPIO_PK6, GPIO_PK5, GPIO_PK4,</div><div class='add'>+	GPIO_PK3, GPIO_PK2, GPIO_PK1, GPIO_PK0,</div><div class='add'>+</div><div class='add'>+	/* INTC: IRQ and PINT on PB/PD/PE */</div><div class='add'>+	GPIO_FN_PINT7_PG, GPIO_FN_PINT6_PG, GPIO_FN_PINT5_PG, GPIO_FN_PINT4_PG,</div><div class='add'>+	GPIO_FN_PINT3_PG, GPIO_FN_PINT2_PG, GPIO_FN_PINT1_PG,</div><div class='add'>+</div><div class='add'>+	GPIO_FN_IRQ7_PC, GPIO_FN_IRQ6_PC, GPIO_FN_IRQ5_PC, GPIO_FN_IRQ4_PC,</div><div class='add'>+	GPIO_FN_IRQ3_PG, GPIO_FN_IRQ2_PG, GPIO_FN_IRQ1_PJ, GPIO_FN_IRQ0_PJ,</div><div class='add'>+	GPIO_FN_IRQ3_PE, GPIO_FN_IRQ2_PE, GPIO_FN_IRQ1_PE, GPIO_FN_IRQ0_PE,</div><div class='add'>+</div><div class='add'>+	/* WDT */</div><div class='add'>+	GPIO_FN_WDTOVF,</div><div class='add'>+</div><div class='add'>+	/* CAN */</div><div class='add'>+	GPIO_FN_CTX1, GPIO_FN_CRX1, GPIO_FN_CTX0, GPIO_FN_CTX0_CTX1,</div><div class='add'>+	GPIO_FN_CRX0, GPIO_FN_CRX0_CRX1,</div><div class='add'>+</div><div class='add'>+	/* DMAC */</div><div class='add'>+	GPIO_FN_TEND0, GPIO_FN_DACK0, GPIO_FN_DREQ0,</div><div class='add'>+	GPIO_FN_TEND1, GPIO_FN_DACK1, GPIO_FN_DREQ1,</div><div class='add'>+</div><div class='add'>+	/* ADC */</div><div class='add'>+	GPIO_FN_ADTRG,</div><div class='add'>+</div><div class='add'>+	/* BSC */</div><div class='add'>+</div><div class='add'>+	GPIO_FN_A25, GPIO_FN_A24,</div><div class='add'>+	GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20,</div><div class='add'>+	GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16,</div><div class='add'>+	GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12,</div><div class='add'>+	GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8,</div><div class='add'>+	GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4,</div><div class='add'>+	GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0,</div><div class='add'>+	GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12,</div><div class='add'>+	GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8,</div><div class='add'>+	GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4,</div><div class='add'>+	GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0,</div><div class='add'>+</div><div class='add'>+	GPIO_FN_BS,</div><div class='add'>+	GPIO_FN_CS4, GPIO_FN_CS3, GPIO_FN_CS2, GPIO_FN_CS1, GPIO_FN_CS0,</div><div class='add'>+	GPIO_FN_CS6CE1B, GPIO_FN_CS5CE1A,</div><div class='add'>+	GPIO_FN_CE2A, GPIO_FN_CE2B,</div><div class='add'>+	GPIO_FN_RD, GPIO_FN_RDWR,</div><div class='add'>+	GPIO_FN_ICIOWRAH, GPIO_FN_ICIORD,</div><div class='add'>+	GPIO_FN_WE1DQMUWE, GPIO_FN_WE0DQML,</div><div class='add'>+	GPIO_FN_RAS, GPIO_FN_CAS, GPIO_FN_CKE,</div><div class='add'>+	GPIO_FN_WAIT, GPIO_FN_BREQ, GPIO_FN_BACK,</div><div class='add'>+	GPIO_FN_IOIS16,</div><div class='add'>+</div><div class='add'>+	/* TMU */</div><div class='add'>+	GPIO_FN_TIOC4D, GPIO_FN_TIOC4C, GPIO_FN_TIOC4B, GPIO_FN_TIOC4A,</div><div class='add'>+	GPIO_FN_TIOC3D, GPIO_FN_TIOC3C, GPIO_FN_TIOC3B, GPIO_FN_TIOC3A,</div><div class='add'>+	GPIO_FN_TIOC2B, GPIO_FN_TIOC1B, GPIO_FN_TIOC2A, GPIO_FN_TIOC1A,</div><div class='add'>+	GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A,</div><div class='add'>+	GPIO_FN_TCLKD, GPIO_FN_TCLKC, GPIO_FN_TCLKB, GPIO_FN_TCLKA,</div><div class='add'>+</div><div class='add'>+	/* SSU */</div><div class='add'>+	GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD,</div><div class='add'>+	GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF,</div><div class='add'>+	GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD,</div><div class='add'>+	GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF,</div><div class='add'>+</div><div class='add'>+	/* SCIF */</div><div class='add'>+	GPIO_FN_SCK0, GPIO_FN_SCK1, GPIO_FN_SCK2, GPIO_FN_SCK3,</div><div class='add'>+	GPIO_FN_RXD0, GPIO_FN_RXD1, GPIO_FN_RXD2, GPIO_FN_RXD3,</div><div class='add'>+	GPIO_FN_TXD0, GPIO_FN_TXD1, GPIO_FN_TXD2, GPIO_FN_TXD3,</div><div class='add'>+	GPIO_FN_RXD4, GPIO_FN_RXD5, GPIO_FN_RXD6, GPIO_FN_RXD7,</div><div class='add'>+	GPIO_FN_TXD4, GPIO_FN_TXD5, GPIO_FN_TXD6, GPIO_FN_TXD7,</div><div class='add'>+	GPIO_FN_RTS1, GPIO_FN_RTS3, GPIO_FN_CTS1, GPIO_FN_CTS3,</div><div class='add'>+</div><div class='add'>+	/* RSPI */</div><div class='add'>+	GPIO_FN_RSPCK0, GPIO_FN_MOSI0,</div><div class='add'>+	GPIO_FN_MISO0_PF12, GPIO_FN_MISO1,</div><div class='add'>+	GPIO_FN_SSL00,</div><div class='add'>+	GPIO_FN_RSPCK1, GPIO_FN_MOSI1,</div><div class='add'>+	GPIO_FN_MISO1_PG19, GPIO_FN_SSL10,</div><div class='add'>+</div><div class='add'>+	/* IIC3 */</div><div class='add'>+	GPIO_FN_SCL0, GPIO_FN_SCL1, GPIO_FN_SCL2,</div><div class='add'>+	GPIO_FN_SDA2, GPIO_FN_SDA1, GPIO_FN_SDA0,</div><div class='add'>+</div><div class='add'>+	/* SSI */</div><div class='add'>+	GPIO_FN_SSISCK0, GPIO_FN_SSIWS0, GPIO_FN_SSITXD0, GPIO_FN_SSIRXD0,</div><div class='add'>+	GPIO_FN_SSIWS1, GPIO_FN_SSIWS2, GPIO_FN_SSIWS3,</div><div class='add'>+	GPIO_FN_SSISCK1, GPIO_FN_SSISCK2, GPIO_FN_SSISCK3,</div><div class='add'>+	GPIO_FN_SSIDATA1, GPIO_FN_SSIDATA2, GPIO_FN_SSIDATA3,</div><div class='add'>+	GPIO_FN_AUDIO_CLK,</div><div class='add'>+</div><div class='add'>+	/* SIOF */</div><div class='add'>+	GPIO_FN_SIOFTXD, GPIO_FN_SIOFRXD, GPIO_FN_SIOFSYNC, GPIO_FN_SIOFSCK,</div><div class='add'>+</div><div class='add'>+	/* SPDIF */</div><div class='add'>+	GPIO_FN_SPDIF_IN,</div><div class='add'>+	GPIO_FN_SPDIF_OUT,</div><div class='add'>+</div><div class='add'>+	/* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */</div><div class='add'>+	GPIO_FN_FCE,</div><div class='add'>+	GPIO_FN_FRB,</div><div class='add'>+</div><div class='add'>+	/* VDC3 */</div><div class='add'>+	GPIO_FN_DV_CLK, GPIO_FN_DV_VSYNC, GPIO_FN_DV_HSYNC,</div><div class='add'>+	GPIO_FN_DV_DATA7, GPIO_FN_DV_DATA6, GPIO_FN_DV_DATA5, GPIO_FN_DV_DATA4,</div><div class='add'>+	GPIO_FN_DV_DATA3, GPIO_FN_DV_DATA2, GPIO_FN_DV_DATA1, GPIO_FN_DV_DATA0,</div><div class='add'>+	GPIO_FN_LCD_CLK, GPIO_FN_LCD_EXTCLK,</div><div class='add'>+	GPIO_FN_LCD_VSYNC, GPIO_FN_LCD_HSYNC, GPIO_FN_LCD_DE,</div><div class='add'>+	GPIO_FN_LCD_DATA15, GPIO_FN_LCD_DATA14,</div><div class='add'>+	GPIO_FN_LCD_DATA13, GPIO_FN_LCD_DATA12,</div><div class='add'>+	GPIO_FN_LCD_DATA11, GPIO_FN_LCD_DATA10,</div><div class='add'>+	GPIO_FN_LCD_DATA9, GPIO_FN_LCD_DATA8,</div><div class='add'>+	GPIO_FN_LCD_DATA7, GPIO_FN_LCD_DATA6,</div><div class='add'>+	GPIO_FN_LCD_DATA5, GPIO_FN_LCD_DATA4,</div><div class='add'>+	GPIO_FN_LCD_DATA3, GPIO_FN_LCD_DATA2,</div><div class='add'>+	GPIO_FN_LCD_DATA1, GPIO_FN_LCD_DATA0,</div><div class='add'>+	GPIO_FN_LCD_M_DISP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_SH7264_H__ */</div><div class='head'>diff --git a/arch/sh/include/cpu-sh2a/cpu/sh7269.h b/arch/sh/include/cpu-sh2a/cpu/sh7269.h<br/>new file mode 100644<br/>index 000000000000..48d14498e774<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/cpu-sh2a/cpu/sh7269.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh2a/cpu/sh7269.h</a></div><div class='hunk'>@@ -0,0 +1,201 @@</div><div class='add'>+#ifndef __ASM_SH7269_H__</div><div class='add'>+#define __ASM_SH7269_H__</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	/* Port A */</div><div class='add'>+	GPIO_PA1, GPIO_PA0,</div><div class='add'>+</div><div class='add'>+	/* Port B */</div><div class='add'>+	GPIO_PB22, GPIO_PB21, GPIO_PB20,</div><div class='add'>+	GPIO_PB19, GPIO_PB18, GPIO_PB17, GPIO_PB16,</div><div class='add'>+	GPIO_PB15, GPIO_PB14, GPIO_PB13, GPIO_PB12,</div><div class='add'>+	GPIO_PB11, GPIO_PB10, GPIO_PB9, GPIO_PB8,</div><div class='add'>+	GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4,</div><div class='add'>+	GPIO_PB3, GPIO_PB2, GPIO_PB1,</div><div class='add'>+</div><div class='add'>+	/* Port C */</div><div class='add'>+	GPIO_PC8,</div><div class='add'>+	GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4,</div><div class='add'>+	GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0,</div><div class='add'>+</div><div class='add'>+	/* Port D */</div><div class='add'>+	GPIO_PD15, GPIO_PD14, GPIO_PD13, GPIO_PD12,</div><div class='add'>+	GPIO_PD11, GPIO_PD10, GPIO_PD9, GPIO_PD8,</div><div class='add'>+	GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4,</div><div class='add'>+	GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0,</div><div class='add'>+</div><div class='add'>+	/* Port E */</div><div class='add'>+	GPIO_PE7, GPIO_PE6, GPIO_PE5, GPIO_PE4,</div><div class='add'>+	GPIO_PE3, GPIO_PE2, GPIO_PE1, GPIO_PE0,</div><div class='add'>+</div><div class='add'>+	/* Port F */</div><div class='add'>+	GPIO_PF23, GPIO_PF22, GPIO_PF21, GPIO_PF20,</div><div class='add'>+	GPIO_PF19, GPIO_PF18, GPIO_PF17, GPIO_PF16,</div><div class='add'>+	GPIO_PF15, GPIO_PF14, GPIO_PF13, GPIO_PF12,</div><div class='add'>+	GPIO_PF11, GPIO_PF10, GPIO_PF9, GPIO_PF8,</div><div class='add'>+	GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4,</div><div class='add'>+	GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0,</div><div class='add'>+</div><div class='add'>+	/* Port G */</div><div class='add'>+	GPIO_PG27, GPIO_PG26, GPIO_PG25, GPIO_PG24,</div><div class='add'>+	GPIO_PG23, GPIO_PG22, GPIO_PG21, GPIO_PG20,</div><div class='add'>+	GPIO_PG19, GPIO_PG18, GPIO_PG17, GPIO_PG16,</div><div class='add'>+	GPIO_PG15, GPIO_PG14, GPIO_PG13, GPIO_PG12,</div><div class='add'>+	GPIO_PG11, GPIO_PG10, GPIO_PG9, GPIO_PG8,</div><div class='add'>+	GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4,</div><div class='add'>+	GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0,</div><div class='add'>+</div><div class='add'>+	/* Port H */</div><div class='add'>+	GPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4,</div><div class='add'>+	GPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0,</div><div class='add'>+</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+</div><div class='add'>+	/* Port J */</div><div class='add'>+	GPIO_PJ31, GPIO_PJ30, GPIO_PJ29, GPIO_PJ28,</div><div class='add'>+	GPIO_PJ27, GPIO_PJ26, GPIO_PJ25, GPIO_PJ24,</div><div class='add'>+	GPIO_PJ23, GPIO_PJ22, GPIO_PJ21, GPIO_PJ20,</div><div class='add'>+	GPIO_PJ19, GPIO_PJ18, GPIO_PJ17, GPIO_PJ16,</div><div class='add'>+	GPIO_PJ15, GPIO_PJ14, GPIO_PJ13, GPIO_PJ12,</div><div class='add'>+	GPIO_PJ11, GPIO_PJ10, GPIO_PJ9, GPIO_PJ8,</div><div class='add'>+	GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4,</div><div class='add'>+	GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0,</div><div class='add'>+</div><div class='add'>+	/* INTC: IRQ and PINT */</div><div class='add'>+	GPIO_FN_IRQ7_PG, GPIO_FN_IRQ6_PG, GPIO_FN_IRQ5_PG, GPIO_FN_IRQ4_PG,</div><div class='add'>+	GPIO_FN_IRQ3_PG, GPIO_FN_IRQ2_PG, GPIO_FN_IRQ1_PG, GPIO_FN_IRQ0_PG,</div><div class='add'>+	GPIO_FN_IRQ7_PF, GPIO_FN_IRQ6_PF, GPIO_FN_IRQ5_PF, GPIO_FN_IRQ4_PF,</div><div class='add'>+	GPIO_FN_IRQ3_PJ, GPIO_FN_IRQ2_PJ, GPIO_FN_IRQ1_PJ, GPIO_FN_IRQ0_PJ,</div><div class='add'>+	GPIO_FN_IRQ1_PC, GPIO_FN_IRQ0_PC,</div><div class='add'>+</div><div class='add'>+	GPIO_FN_PINT7_PG, GPIO_FN_PINT6_PG, GPIO_FN_PINT5_PG, GPIO_FN_PINT4_PG,</div><div class='add'>+	GPIO_FN_PINT3_PG, GPIO_FN_PINT2_PG, GPIO_FN_PINT1_PG, GPIO_FN_PINT0_PG,</div><div class='add'>+	GPIO_FN_PINT7_PH, GPIO_FN_PINT6_PH, GPIO_FN_PINT5_PH, GPIO_FN_PINT4_PH,</div><div class='add'>+	GPIO_FN_PINT3_PH, GPIO_FN_PINT2_PH, GPIO_FN_PINT1_PH, GPIO_FN_PINT0_PH,</div><div class='add'>+	GPIO_FN_PINT7_PJ, GPIO_FN_PINT6_PJ, GPIO_FN_PINT5_PJ, GPIO_FN_PINT4_PJ,</div><div class='add'>+	GPIO_FN_PINT3_PJ, GPIO_FN_PINT2_PJ, GPIO_FN_PINT1_PJ, GPIO_FN_PINT0_PJ,</div><div class='add'>+</div><div class='add'>+	/* WDT */</div><div class='add'>+	GPIO_FN_WDTOVF,</div><div class='add'>+</div><div class='add'>+	/* CAN */</div><div class='add'>+	GPIO_FN_CTX1, GPIO_FN_CRX1, GPIO_FN_CTX0, GPIO_FN_CTX0_CTX1,</div><div class='add'>+	GPIO_FN_CRX0, GPIO_FN_CRX0_CRX1, GPIO_FN_CRX0_CRX1_CRX2,</div><div class='add'>+</div><div class='add'>+	/* DMAC */</div><div class='add'>+	GPIO_FN_TEND0, GPIO_FN_DACK0, GPIO_FN_DREQ0,</div><div class='add'>+	GPIO_FN_TEND1, GPIO_FN_DACK1, GPIO_FN_DREQ1,</div><div class='add'>+</div><div class='add'>+	/* ADC */</div><div class='add'>+	GPIO_FN_ADTRG,</div><div class='add'>+</div><div class='add'>+	/* BSC */</div><div class='add'>+	GPIO_FN_A25, GPIO_FN_A24,</div><div class='add'>+	GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20,</div><div class='add'>+	GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16,</div><div class='add'>+	GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12,</div><div class='add'>+	GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8,</div><div class='add'>+	GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4,</div><div class='add'>+	GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0,</div><div class='add'>+	GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12,</div><div class='add'>+	GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8,</div><div class='add'>+	GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4,</div><div class='add'>+	GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0,</div><div class='add'>+</div><div class='add'>+	GPIO_FN_BS,</div><div class='add'>+	GPIO_FN_CS4, GPIO_FN_CS3, GPIO_FN_CS2, GPIO_FN_CS1, GPIO_FN_CS0,</div><div class='add'>+	GPIO_FN_CS5CE1A,</div><div class='add'>+	GPIO_FN_CE2A, GPIO_FN_CE2B,</div><div class='add'>+	GPIO_FN_RD, GPIO_FN_RDWR,</div><div class='add'>+	GPIO_FN_WE3ICIOWRAHDQMUU, GPIO_FN_WE2ICIORDDQMUL,</div><div class='add'>+	GPIO_FN_WE1DQMUWE, GPIO_FN_WE0DQML,</div><div class='add'>+	GPIO_FN_RAS, GPIO_FN_CAS, GPIO_FN_CKE,</div><div class='add'>+	GPIO_FN_WAIT, GPIO_FN_BREQ, GPIO_FN_BACK,</div><div class='add'>+	GPIO_FN_IOIS16,</div><div class='add'>+</div><div class='add'>+	/* TMU */</div><div class='add'>+	GPIO_FN_TIOC4D, GPIO_FN_TIOC4C, GPIO_FN_TIOC4B, GPIO_FN_TIOC4A,</div><div class='add'>+	GPIO_FN_TIOC3D, GPIO_FN_TIOC3C, GPIO_FN_TIOC3B, GPIO_FN_TIOC3A,</div><div class='add'>+	GPIO_FN_TIOC2B, GPIO_FN_TIOC1B, GPIO_FN_TIOC2A, GPIO_FN_TIOC1A,</div><div class='add'>+	GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A,</div><div class='add'>+	GPIO_FN_TCLKD, GPIO_FN_TCLKC, GPIO_FN_TCLKB, GPIO_FN_TCLKA,</div><div class='add'>+</div><div class='add'>+	/* SSU */</div><div class='add'>+	GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD,</div><div class='add'>+	GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF,</div><div class='add'>+	GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD,</div><div class='add'>+	GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF,</div><div class='add'>+</div><div class='add'>+	/* SCIF */</div><div class='add'>+	GPIO_FN_SCK0, GPIO_FN_RXD0, GPIO_FN_TXD0,</div><div class='add'>+	GPIO_FN_SCK1, GPIO_FN_RXD1, GPIO_FN_TXD1, GPIO_FN_RTS1, GPIO_FN_CTS1,</div><div class='add'>+	GPIO_FN_SCK2, GPIO_FN_RXD2, GPIO_FN_TXD2,</div><div class='add'>+	GPIO_FN_SCK3, GPIO_FN_RXD3, GPIO_FN_TXD3,</div><div class='add'>+	GPIO_FN_SCK4, GPIO_FN_RXD4, GPIO_FN_TXD4,</div><div class='add'>+	GPIO_FN_SCK5, GPIO_FN_RXD5, GPIO_FN_TXD5, GPIO_FN_RTS5, GPIO_FN_CTS5,</div><div class='add'>+	GPIO_FN_SCK6, GPIO_FN_RXD6, GPIO_FN_TXD6,</div><div class='add'>+	GPIO_FN_SCK7, GPIO_FN_RXD7, GPIO_FN_TXD7, GPIO_FN_RTS7, GPIO_FN_CTS7,</div><div class='add'>+</div><div class='add'>+	/* RSPI */</div><div class='add'>+	GPIO_FN_MISO0_PJ19, GPIO_FN_MISO0_PB20,</div><div class='add'>+	GPIO_FN_MOSI0_PJ18, GPIO_FN_MOSI0_PB19,</div><div class='add'>+	GPIO_FN_SSL00_PJ17, GPIO_FN_SSL00_PB18,</div><div class='add'>+	GPIO_FN_RSPCK0_PJ16, GPIO_FN_RSPCK0_PB17,</div><div class='add'>+	GPIO_FN_RSPCK1, GPIO_FN_MOSI1,</div><div class='add'>+	GPIO_FN_MISO1, GPIO_FN_SSL10,</div><div class='add'>+</div><div class='add'>+	/* IIC3 */</div><div class='add'>+	GPIO_FN_SCL0, GPIO_FN_SCL1, GPIO_FN_SCL2,</div><div class='add'>+	GPIO_FN_SDA2, GPIO_FN_SDA1, GPIO_FN_SDA0,</div><div class='add'>+</div><div class='add'>+	/* SSI */</div><div class='add'>+	GPIO_FN_SSISCK0, GPIO_FN_SSIWS0, GPIO_FN_SSITXD0, GPIO_FN_SSIRXD0,</div><div class='add'>+	GPIO_FN_SSIWS1, GPIO_FN_SSIWS2, GPIO_FN_SSIWS3,</div><div class='add'>+	GPIO_FN_SSISCK1, GPIO_FN_SSISCK2, GPIO_FN_SSISCK3,</div><div class='add'>+	GPIO_FN_SSIDATA1, GPIO_FN_SSIDATA2, GPIO_FN_SSIDATA3,</div><div class='add'>+	GPIO_FN_AUDIO_CLK,</div><div class='add'>+	GPIO_FN_AUDIO_XOUT,</div><div class='add'>+</div><div class='add'>+	/* SIOF */</div><div class='add'>+	GPIO_FN_SIOFTXD, GPIO_FN_SIOFRXD, GPIO_FN_SIOFSYNC, GPIO_FN_SIOFSCK,</div><div class='add'>+</div><div class='add'>+	/* SPDIF */</div><div class='add'>+	GPIO_FN_SPDIF_IN,</div><div class='add'>+	GPIO_FN_SPDIF_OUT,</div><div class='add'>+</div><div class='add'>+	/* NANDFMC  */ /* NOTE Controller is not available in boot mode 0 */</div><div class='add'>+	GPIO_FN_FCE,</div><div class='add'>+	GPIO_FN_FRB,</div><div class='add'>+</div><div class='add'>+	/* VDC */</div><div class='add'>+	GPIO_FN_DV_CLK, GPIO_FN_DV_VSYNC, GPIO_FN_DV_HSYNC,</div><div class='add'>+	GPIO_FN_DV_DATA23, GPIO_FN_DV_DATA22,</div><div class='add'>+	GPIO_FN_DV_DATA21, GPIO_FN_DV_DATA20,</div><div class='add'>+	GPIO_FN_DV_DATA19, GPIO_FN_DV_DATA18,</div><div class='add'>+	GPIO_FN_DV_DATA17, GPIO_FN_DV_DATA16,</div><div class='add'>+	GPIO_FN_DV_DATA15, GPIO_FN_DV_DATA14,</div><div class='add'>+	GPIO_FN_DV_DATA13, GPIO_FN_DV_DATA12,</div><div class='add'>+	GPIO_FN_DV_DATA11, GPIO_FN_DV_DATA10,</div><div class='add'>+	GPIO_FN_DV_DATA9, GPIO_FN_DV_DATA8,</div><div class='add'>+	GPIO_FN_DV_DATA7, GPIO_FN_DV_DATA6,</div><div class='add'>+	GPIO_FN_DV_DATA5, GPIO_FN_DV_DATA4,</div><div class='add'>+	GPIO_FN_DV_DATA3, GPIO_FN_DV_DATA2,</div><div class='add'>+	GPIO_FN_DV_DATA1, GPIO_FN_DV_DATA0,</div><div class='add'>+	GPIO_FN_LCD_CLK, GPIO_FN_LCD_EXTCLK,</div><div class='add'>+	GPIO_FN_LCD_VSYNC, GPIO_FN_LCD_HSYNC, GPIO_FN_LCD_DE,</div><div class='add'>+	GPIO_FN_LCD_DATA23, GPIO_FN_LCD_DATA22,</div><div class='add'>+	GPIO_FN_LCD_DATA21, GPIO_FN_LCD_DATA20,</div><div class='add'>+	GPIO_FN_LCD_DATA19, GPIO_FN_LCD_DATA18,</div><div class='add'>+	GPIO_FN_LCD_DATA17, GPIO_FN_LCD_DATA16,</div><div class='add'>+	GPIO_FN_LCD_DATA15, GPIO_FN_LCD_DATA14,</div><div class='add'>+	GPIO_FN_LCD_DATA13, GPIO_FN_LCD_DATA12,</div><div class='add'>+	GPIO_FN_LCD_DATA11, GPIO_FN_LCD_DATA10,</div><div class='add'>+	GPIO_FN_LCD_DATA9, GPIO_FN_LCD_DATA8,</div><div class='add'>+	GPIO_FN_LCD_DATA7, GPIO_FN_LCD_DATA6,</div><div class='add'>+	GPIO_FN_LCD_DATA5, GPIO_FN_LCD_DATA4,</div><div class='add'>+	GPIO_FN_LCD_DATA3, GPIO_FN_LCD_DATA2,</div><div class='add'>+	GPIO_FN_LCD_DATA1, GPIO_FN_LCD_DATA0,</div><div class='add'>+	GPIO_FN_LCD_M_DISP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_SH7269_H__ */</div><div class='head'>diff --git a/arch/sh/include/cpu-sh3/cpu/dma.h b/arch/sh/include/cpu-sh3/cpu/dma.h<br/>index 24e28b91c9d5..bccb4144a5e3 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/cpu-sh3/cpu/dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/cpu-sh3/cpu/dma.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/cpu-sh3/cpu/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh3/cpu/dma.h</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> #ifndef __ASM_CPU_SH3_DMA_H</div><div class='ctx'> #define __ASM_CPU_SH3_DMA_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='add'>+</div><div class='ctx'> #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \</div><div class='ctx'>     defined(CONFIG_CPU_SUBTYPE_SH7721) || \</div><div class='ctx'>     defined(CONFIG_CPU_SUBTYPE_SH7710) || \</div><div class='hunk'>@@ -10,14 +12,7 @@</div><div class='ctx'> #define SH_DMAC_BASE0	0xa4000020</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define DMTE0_IRQ	48</div><div class='del'>-#define DMTE4_IRQ	76</div><div class='del'>-</div><div class='del'>-/* Definitions for the SuperH DMAC */</div><div class='del'>-#define TM_BURST	0x00000020</div><div class='del'>-#define TS_8		0x00000000</div><div class='del'>-#define TS_16		0x00000008</div><div class='del'>-#define TS_32		0x00000010</div><div class='del'>-#define TS_128		0x00000018</div><div class='add'>+#define DMTE0_IRQ	evt2irq(0x800)</div><div class='add'>+#define DMTE4_IRQ	evt2irq(0xb80)</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_CPU_SH3_DMA_H */</div><div class='head'>diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h<br/>deleted file mode 100644<br/>index 9647e681fd27..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/cpu-sh4/cpu/dma-sh4a.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,83 +0,0 @@</div><div class='del'>-#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H</div><div class='del'>-#define __ASM_SH_CPU_SH4_DMA_SH7780_H</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \</div><div class='del'>-	defined(CONFIG_CPU_SUBTYPE_SH7730)</div><div class='del'>-#define DMTE0_IRQ	48</div><div class='del'>-#define DMTE4_IRQ	76</div><div class='del'>-#define DMAE0_IRQ	78	/* DMA Error IRQ*/</div><div class='del'>-#define SH_DMAC_BASE0	0xFE008020</div><div class='del'>-#define SH_DMARS_BASE0	0xFE009000</div><div class='del'>-#elif defined(CONFIG_CPU_SUBTYPE_SH7722)</div><div class='del'>-#define DMTE0_IRQ	48</div><div class='del'>-#define DMTE4_IRQ	76</div><div class='del'>-#define DMAE0_IRQ	78	/* DMA Error IRQ*/</div><div class='del'>-#define SH_DMAC_BASE0	0xFE008020</div><div class='del'>-#define SH_DMARS_BASE0	0xFE009000</div><div class='del'>-#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \</div><div class='del'>-	defined(CONFIG_CPU_SUBTYPE_SH7764)</div><div class='del'>-#define DMTE0_IRQ	34</div><div class='del'>-#define DMTE4_IRQ	44</div><div class='del'>-#define DMAE0_IRQ	38</div><div class='del'>-#define SH_DMAC_BASE0	0xFF608020</div><div class='del'>-#define SH_DMARS_BASE0	0xFF609000</div><div class='del'>-#elif defined(CONFIG_CPU_SUBTYPE_SH7723)</div><div class='del'>-#define DMTE0_IRQ	48	/* DMAC0A*/</div><div class='del'>-#define DMTE4_IRQ	76	/* DMAC0B */</div><div class='del'>-#define DMTE6_IRQ	40</div><div class='del'>-#define DMTE8_IRQ	42	/* DMAC1A */</div><div class='del'>-#define DMTE9_IRQ	43</div><div class='del'>-#define DMTE10_IRQ	72	/* DMAC1B */</div><div class='del'>-#define DMTE11_IRQ	73</div><div class='del'>-#define DMAE0_IRQ	78	/* DMA Error IRQ*/</div><div class='del'>-#define DMAE1_IRQ	74	/* DMA Error IRQ*/</div><div class='del'>-#define SH_DMAC_BASE0	0xFE008020</div><div class='del'>-#define SH_DMAC_BASE1	0xFDC08020</div><div class='del'>-#define SH_DMARS_BASE0	0xFDC09000</div><div class='del'>-#elif defined(CONFIG_CPU_SUBTYPE_SH7724)</div><div class='del'>-#define DMTE0_IRQ	48	/* DMAC0A*/</div><div class='del'>-#define DMTE4_IRQ	76	/* DMAC0B */</div><div class='del'>-#define DMTE6_IRQ	40</div><div class='del'>-#define DMTE8_IRQ	42	/* DMAC1A */</div><div class='del'>-#define DMTE9_IRQ	43</div><div class='del'>-#define DMTE10_IRQ	72	/* DMAC1B */</div><div class='del'>-#define DMTE11_IRQ	73</div><div class='del'>-#define DMAE0_IRQ	78	/* DMA Error IRQ*/</div><div class='del'>-#define DMAE1_IRQ	74	/* DMA Error IRQ*/</div><div class='del'>-#define SH_DMAC_BASE0	0xFE008020</div><div class='del'>-#define SH_DMAC_BASE1	0xFDC08020</div><div class='del'>-#define SH_DMARS_BASE0	0xFE009000</div><div class='del'>-#define SH_DMARS_BASE1	0xFDC09000</div><div class='del'>-#elif defined(CONFIG_CPU_SUBTYPE_SH7780)</div><div class='del'>-#define DMTE0_IRQ	34</div><div class='del'>-#define DMTE4_IRQ	44</div><div class='del'>-#define DMTE6_IRQ	46</div><div class='del'>-#define DMTE8_IRQ	92</div><div class='del'>-#define DMTE9_IRQ	93</div><div class='del'>-#define DMTE10_IRQ	94</div><div class='del'>-#define DMTE11_IRQ	95</div><div class='del'>-#define DMAE0_IRQ	38	/* DMA Error IRQ */</div><div class='del'>-#define SH_DMAC_BASE0	0xFC808020</div><div class='del'>-#define SH_DMAC_BASE1	0xFC818020</div><div class='del'>-#define SH_DMARS_BASE0	0xFC809000</div><div class='del'>-#else /* SH7785 */</div><div class='del'>-#define DMTE0_IRQ	33</div><div class='del'>-#define DMTE4_IRQ	37</div><div class='del'>-#define DMTE6_IRQ	52</div><div class='del'>-#define DMTE8_IRQ	54</div><div class='del'>-#define DMTE9_IRQ	55</div><div class='del'>-#define DMTE10_IRQ	56</div><div class='del'>-#define DMTE11_IRQ	57</div><div class='del'>-#define DMAE0_IRQ	39	/* DMA Error IRQ0 */</div><div class='del'>-#define DMAE1_IRQ	58	/* DMA Error IRQ1 */</div><div class='del'>-#define SH_DMAC_BASE0	0xFC808020</div><div class='del'>-#define SH_DMAC_BASE1	0xFCC08020</div><div class='del'>-#define SH_DMARS_BASE0	0xFC809000</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define REQ_HE		0x000000C0</div><div class='del'>-#define REQ_H		0x00000080</div><div class='del'>-#define REQ_LE		0x00000040</div><div class='del'>-#define TM_BURST	0x00000020</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */</div><div class='head'>diff --git a/arch/sh/include/cpu-sh4/cpu/dma.h b/arch/sh/include/cpu-sh4/cpu/dma.h<br/>index ca747e93c2ed..a520eb219621 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/cpu-sh4/cpu/dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/cpu-sh4/cpu/dma.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/cpu-sh4/cpu/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh4/cpu/dma.h</a></div><div class='hunk'>@@ -1,32 +1,17 @@</div><div class='ctx'> #ifndef __ASM_CPU_SH4_DMA_H</div><div class='ctx'> #define __ASM_CPU_SH4_DMA_H</div><div class='ctx'> </div><div class='del'>-/* SH7751/7760/7780 DMA IRQ sources */</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CPU_SH4A</div><div class='del'>-</div><div class='del'>-#include &lt;cpu/dma-sh4a.h&gt;</div><div class='del'>-</div><div class='del'>-#else /* CONFIG_CPU_SH4A */</div><div class='ctx'> /*</div><div class='ctx'>  * SH7750/SH7751/SH7760</div><div class='ctx'>  */</div><div class='del'>-#define DMTE0_IRQ	34</div><div class='del'>-#define DMTE4_IRQ	44</div><div class='del'>-#define DMTE6_IRQ	46</div><div class='del'>-#define DMAE0_IRQ	38</div><div class='add'>+#define DMTE0_IRQ	evt2irq(0x640)</div><div class='add'>+#define DMTE4_IRQ	evt2irq(0x780)</div><div class='add'>+#define DMTE6_IRQ	evt2irq(0x7c0)</div><div class='add'>+#define DMAE0_IRQ	evt2irq(0x6c0)</div><div class='ctx'> </div><div class='ctx'> #define SH_DMAC_BASE0	0xffa00000</div><div class='ctx'> #define SH_DMAC_BASE1	0xffa00070</div><div class='del'>-/* Definitions for the SuperH DMAC */</div><div class='del'>-#define TM_BURST	0x00000080</div><div class='del'>-#define TS_8		0x00000010</div><div class='del'>-#define TS_16		0x00000020</div><div class='del'>-#define TS_32		0x00000030</div><div class='del'>-#define TS_64		0x00000000</div><div class='del'>-</div><div class='del'>-#define DMAOR_COD	0x00000008</div><div class='del'>-</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_CPU_SH4_DMA_H */</div><div class='head'>diff --git a/arch/sh/include/cpu-sh4/cpu/freq.h b/arch/sh/include/cpu-sh4/cpu/freq.h<br/>index cffd25ed0240..1631fc238e6f 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/cpu-sh4/cpu/freq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/cpu-sh4/cpu/freq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/cpu-sh4/cpu/freq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh4/cpu/freq.h</a></div><div class='hunk'>@@ -47,6 +47,11 @@</div><div class='ctx'> #define MSTPCR1			0xa4150034</div><div class='ctx'> #define MSTPCR2			0xa4150038</div><div class='ctx'> </div><div class='add'>+#elif defined(CONFIG_CPU_SUBTYPE_SH7734)</div><div class='add'>+#define FRQCR0			0xffc80000</div><div class='add'>+#define FRQCR2			0xffc80008</div><div class='add'>+#define FRQMR1			0xffc80014</div><div class='add'>+#define FRQMR2			0xffc80018</div><div class='ctx'> #elif defined(CONFIG_CPU_SUBTYPE_SH7785)</div><div class='ctx'> #define FRQCR0			0xffc80000</div><div class='ctx'> #define FRQCR1			0xffc80004</div><div class='head'>diff --git a/arch/sh/include/cpu-sh4/cpu/sh7734.h b/arch/sh/include/cpu-sh4/cpu/sh7734.h<br/>new file mode 100644<br/>index 000000000000..2fb9a7b71b41<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/cpu-sh4/cpu/sh7734.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh4/cpu/sh7734.h</a></div><div class='hunk'>@@ -0,0 +1,306 @@</div><div class='add'>+#ifndef __ASM_SH7734_H__</div><div class='add'>+#define __ASM_SH7734_H__</div><div class='add'>+</div><div class='add'>+/* Pin Function Controller:</div><div class='add'>+ * GPIO_FN_xx - GPIO used to select pin function</div><div class='add'>+ * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU</div><div class='add'>+ */</div><div class='add'>+enum {</div><div class='add'>+	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,</div><div class='add'>+	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,</div><div class='add'>+	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,</div><div class='add'>+	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,</div><div class='add'>+	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,</div><div class='add'>+	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,</div><div class='add'>+	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,</div><div class='add'>+	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,</div><div class='add'>+</div><div class='add'>+	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,</div><div class='add'>+	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,</div><div class='add'>+	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,</div><div class='add'>+	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,</div><div class='add'>+	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,</div><div class='add'>+	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,</div><div class='add'>+	GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,</div><div class='add'>+	GPIO_GP_1_28, GPIO_GP_1_29, GPIO_GP_1_30, GPIO_GP_1_31,</div><div class='add'>+</div><div class='add'>+	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,</div><div class='add'>+	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,</div><div class='add'>+	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,</div><div class='add'>+	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,</div><div class='add'>+	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,</div><div class='add'>+	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,</div><div class='add'>+	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,</div><div class='add'>+	GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,</div><div class='add'>+</div><div class='add'>+	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,</div><div class='add'>+	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,</div><div class='add'>+	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,</div><div class='add'>+	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,</div><div class='add'>+	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,</div><div class='add'>+	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,</div><div class='add'>+	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,</div><div class='add'>+	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,</div><div class='add'>+</div><div class='add'>+	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,</div><div class='add'>+	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,</div><div class='add'>+	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,</div><div class='add'>+	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,</div><div class='add'>+	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,</div><div class='add'>+	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,</div><div class='add'>+	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,</div><div class='add'>+	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,</div><div class='add'>+</div><div class='add'>+	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,</div><div class='add'>+	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,</div><div class='add'>+	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,</div><div class='add'>+</div><div class='add'>+	GPIO_FN_CLKOUT, GPIO_FN_BS, GPIO_FN_CS0, GPIO_FN_EX_CS0, GPIO_FN_RD,</div><div class='add'>+		GPIO_FN_WE0, GPIO_FN_WE1,</div><div class='add'>+</div><div class='add'>+	GPIO_FN_SCL0, GPIO_FN_PENC0, GPIO_FN_USB_OVC0,</div><div class='add'>+</div><div class='add'>+	GPIO_FN_IRQ2_B, GPIO_FN_IRQ3_B,</div><div class='add'>+</div><div class='add'>+	/* IPSR0 */</div><div class='add'>+	GPIO_FN_A15, GPIO_FN_ST0_VCO_CLKIN, GPIO_FN_LCD_DATA15_A,</div><div class='add'>+		GPIO_FN_TIOC3D_C,</div><div class='add'>+	GPIO_FN_A14, GPIO_FN_LCD_DATA14_A, GPIO_FN_TIOC3C_C,</div><div class='add'>+	GPIO_FN_A13, GPIO_FN_LCD_DATA13_A, GPIO_FN_TIOC3B_C,</div><div class='add'>+	GPIO_FN_A12, GPIO_FN_LCD_DATA12_A, GPIO_FN_TIOC3A_C,</div><div class='add'>+	GPIO_FN_A11, GPIO_FN_ST0_D7, GPIO_FN_LCD_DATA11_A,</div><div class='add'>+		GPIO_FN_TIOC2B_C,</div><div class='add'>+	GPIO_FN_A10, GPIO_FN_ST0_D6, GPIO_FN_LCD_DATA10_A,</div><div class='add'>+		GPIO_FN_TIOC2A_C,</div><div class='add'>+	GPIO_FN_A9, GPIO_FN_ST0_D5, GPIO_FN_LCD_DATA9_A,</div><div class='add'>+		GPIO_FN_TIOC1B_C,</div><div class='add'>+	GPIO_FN_A8, GPIO_FN_ST0_D4, GPIO_FN_LCD_DATA8_A,</div><div class='add'>+		GPIO_FN_TIOC1A_C,</div><div class='add'>+	GPIO_FN_A7, GPIO_FN_ST0_D3, GPIO_FN_LCD_DATA7_A, GPIO_FN_TIOC0D_C,</div><div class='add'>+	GPIO_FN_A6, GPIO_FN_ST0_D2, GPIO_FN_LCD_DATA6_A, GPIO_FN_TIOC0C_C,</div><div class='add'>+	GPIO_FN_A5, GPIO_FN_ST0_D1, GPIO_FN_LCD_DATA5_A, GPIO_FN_TIOC0B_C,</div><div class='add'>+	GPIO_FN_A4, GPIO_FN_ST0_D0, GPIO_FN_LCD_DATA4_A, GPIO_FN_TIOC0A_C,</div><div class='add'>+	GPIO_FN_A3, GPIO_FN_ST0_VLD, GPIO_FN_LCD_DATA3_A, GPIO_FN_TCLKD_C,</div><div class='add'>+	GPIO_FN_A2, GPIO_FN_ST0_SYC, GPIO_FN_LCD_DATA2_A, GPIO_FN_TCLKC_C,</div><div class='add'>+	GPIO_FN_A1, GPIO_FN_ST0_REQ, GPIO_FN_LCD_DATA1_A, GPIO_FN_TCLKB_C,</div><div class='add'>+	GPIO_FN_A0, GPIO_FN_ST0_CLKIN, GPIO_FN_LCD_DATA0_A, GPIO_FN_TCLKA_C,</div><div class='add'>+</div><div class='add'>+	/* IPSR1 */</div><div class='add'>+	GPIO_FN_D3, GPIO_FN_SD0_DAT3_A, GPIO_FN_MMC_D3_A, GPIO_FN_ST1_D6,</div><div class='add'>+		GPIO_FN_FD3_A,</div><div class='add'>+	GPIO_FN_D2, GPIO_FN_SD0_DAT2_A, GPIO_FN_MMC_D2_A, GPIO_FN_ST1_D5,</div><div class='add'>+		GPIO_FN_FD2_A,</div><div class='add'>+	GPIO_FN_D1, GPIO_FN_SD0_DAT1_A, GPIO_FN_MMC_D1_A, GPIO_FN_ST1_D4,</div><div class='add'>+		GPIO_FN_FD1_A,</div><div class='add'>+	GPIO_FN_D0, GPIO_FN_SD0_DAT0_A, GPIO_FN_MMC_D0_A, GPIO_FN_ST1_D3,</div><div class='add'>+		GPIO_FN_FD0_A,</div><div class='add'>+	GPIO_FN_A25, GPIO_FN_TX2_D, GPIO_FN_ST1_D2,</div><div class='add'>+	GPIO_FN_A24, GPIO_FN_RX2_D, GPIO_FN_ST1_D1,</div><div class='add'>+	GPIO_FN_A23, GPIO_FN_ST1_D0, GPIO_FN_LCD_M_DISP_A,</div><div class='add'>+	GPIO_FN_A22, GPIO_FN_ST1_VLD, GPIO_FN_LCD_VEPWC_A,</div><div class='add'>+	GPIO_FN_A21, GPIO_FN_ST1_SYC, GPIO_FN_LCD_VCPWC_A,</div><div class='add'>+	GPIO_FN_A20, GPIO_FN_ST1_REQ, GPIO_FN_LCD_FLM_A,</div><div class='add'>+	GPIO_FN_A19, GPIO_FN_ST1_CLKIN, GPIO_FN_LCD_CLK_A, GPIO_FN_TIOC4D_C,</div><div class='add'>+	GPIO_FN_A18, GPIO_FN_ST1_PWM, GPIO_FN_LCD_CL2_A, GPIO_FN_TIOC4C_C,</div><div class='add'>+	GPIO_FN_A17, GPIO_FN_ST1_VCO_CLKIN, GPIO_FN_LCD_CL1_A, GPIO_FN_TIOC4B_C,</div><div class='add'>+	GPIO_FN_A16, GPIO_FN_ST0_PWM, GPIO_FN_LCD_DON_A, GPIO_FN_TIOC4A_C,</div><div class='add'>+</div><div class='add'>+	/* IPSR2 */</div><div class='add'>+	GPIO_FN_D14, GPIO_FN_TX2_B, GPIO_FN_FSE_A, GPIO_FN_ET0_TX_CLK_B,</div><div class='add'>+	GPIO_FN_D13, GPIO_FN_RX2_B, GPIO_FN_FRB_A,	GPIO_FN_ET0_ETXD6_B,</div><div class='add'>+	GPIO_FN_D12, GPIO_FN_FWE_A, GPIO_FN_ET0_ETXD5_B,</div><div class='add'>+	GPIO_FN_D11, GPIO_FN_RSPI_MISO_A, GPIO_FN_QMI_QIO1_A,</div><div class='add'>+		GPIO_FN_FRE_A, GPIO_FN_ET0_ETXD3_B,</div><div class='add'>+	GPIO_FN_D10, GPIO_FN_RSPI_MOSI_A, GPIO_FN_QMO_QIO0_A,</div><div class='add'>+		GPIO_FN_FALE_A, GPIO_FN_ET0_ETXD2_B,</div><div class='add'>+	GPIO_FN_D9, GPIO_FN_SD0_CMD_A, GPIO_FN_MMC_CMD_A, GPIO_FN_QIO3_A,</div><div class='add'>+		GPIO_FN_FCLE_A, GPIO_FN_ET0_ETXD1_B,</div><div class='add'>+	GPIO_FN_D8, GPIO_FN_SD0_CLK_A, GPIO_FN_MMC_CLK_A, GPIO_FN_QIO2_A,</div><div class='add'>+		GPIO_FN_FCE_A, GPIO_FN_ET0_GTX_CLK_B,</div><div class='add'>+	GPIO_FN_D7, GPIO_FN_RSPI_SSL_A, GPIO_FN_MMC_D7_A, GPIO_FN_QSSL_A,</div><div class='add'>+		GPIO_FN_FD7_A,</div><div class='add'>+	GPIO_FN_D6, GPIO_FN_RSPI_RSPCK_A, GPIO_FN_MMC_D6_A, GPIO_FN_QSPCLK_A,</div><div class='add'>+		GPIO_FN_FD6_A,</div><div class='add'>+	GPIO_FN_D5, GPIO_FN_SD0_WP_A, GPIO_FN_MMC_D5_A, GPIO_FN_FD5_A,</div><div class='add'>+	GPIO_FN_D4, GPIO_FN_SD0_CD_A, GPIO_FN_MMC_D4_A, GPIO_FN_ST1_D7,</div><div class='add'>+		GPIO_FN_FD4_A,</div><div class='add'>+</div><div class='add'>+	/* IPSR3 */</div><div class='add'>+	GPIO_FN_DRACK0, GPIO_FN_SD1_DAT2_A, GPIO_FN_ATAG, GPIO_FN_TCLK1_A,</div><div class='add'>+		GPIO_FN_ET0_ETXD7,</div><div class='add'>+	GPIO_FN_EX_WAIT2, GPIO_FN_SD1_DAT1_A, GPIO_FN_DACK2, GPIO_FN_CAN1_RX_C,</div><div class='add'>+		GPIO_FN_ET0_MAGIC_C, GPIO_FN_ET0_ETXD6_A,</div><div class='add'>+	GPIO_FN_EX_WAIT1, GPIO_FN_SD1_DAT0_A, GPIO_FN_DREQ2, GPIO_FN_CAN1_TX_C,</div><div class='add'>+		GPIO_FN_ET0_LINK_C, GPIO_FN_ET0_ETXD5_A,</div><div class='add'>+	GPIO_FN_EX_WAIT0, GPIO_FN_TCLK1_B,</div><div class='add'>+	GPIO_FN_RD_WR, GPIO_FN_TCLK0,</div><div class='add'>+	GPIO_FN_EX_CS5, GPIO_FN_SD1_CMD_A, GPIO_FN_ATADIR, GPIO_FN_QSSL_B,</div><div class='add'>+		GPIO_FN_ET0_ETXD3_A,</div><div class='add'>+	GPIO_FN_EX_CS4, GPIO_FN_SD1_WP_A, GPIO_FN_ATAWR, GPIO_FN_QMI_QIO1_B,</div><div class='add'>+		GPIO_FN_ET0_ETXD2_A,</div><div class='add'>+	GPIO_FN_EX_CS3, GPIO_FN_SD1_CD_A, GPIO_FN_ATARD, GPIO_FN_QMO_QIO0_B,</div><div class='add'>+		GPIO_FN_ET0_ETXD1_A,</div><div class='add'>+	GPIO_FN_EX_CS2, GPIO_FN_TX3_B, GPIO_FN_ATACS1, GPIO_FN_QSPCLK_B,</div><div class='add'>+		GPIO_FN_ET0_GTX_CLK_A,</div><div class='add'>+	GPIO_FN_EX_CS1, GPIO_FN_RX3_B, GPIO_FN_ATACS0, GPIO_FN_QIO2_B,</div><div class='add'>+		GPIO_FN_ET0_ETXD0,</div><div class='add'>+	GPIO_FN_CS1_A26, GPIO_FN_QIO3_B,</div><div class='add'>+	GPIO_FN_D15, GPIO_FN_SCK2_B,</div><div class='add'>+</div><div class='add'>+	/* IPSR4 */</div><div class='add'>+	GPIO_FN_SCK2_A, GPIO_FN_VI0_G3,</div><div class='add'>+	GPIO_FN_RTS1_B, GPIO_FN_VI0_G2,</div><div class='add'>+	GPIO_FN_CTS1_B, GPIO_FN_VI0_DATA7_VI0_G1,</div><div class='add'>+	GPIO_FN_TX1_B, GPIO_FN_VI0_DATA6_VI0_G0, GPIO_FN_ET0_PHY_INT_A,</div><div class='add'>+	GPIO_FN_RX1_B, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_ET0_MAGIC_A,</div><div class='add'>+	GPIO_FN_SCK1_B, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_ET0_LINK_A,</div><div class='add'>+	GPIO_FN_RTS0_B, GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_ET0_MDIO_A,</div><div class='add'>+	GPIO_FN_CTS0_B, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_RMII0_MDIO_A,</div><div class='add'>+		GPIO_FN_ET0_MDC,</div><div class='add'>+	GPIO_FN_HTX0_A, GPIO_FN_TX1_A, GPIO_FN_VI0_DATA1_VI0_B1,</div><div class='add'>+		GPIO_FN_RMII0_MDC_A, GPIO_FN_ET0_COL,</div><div class='add'>+	GPIO_FN_HRX0_A, GPIO_FN_RX1_A, GPIO_FN_VI0_DATA0_VI0_B0,</div><div class='add'>+		GPIO_FN_RMII0_CRS_DV_A, GPIO_FN_ET0_CRS,</div><div class='add'>+	GPIO_FN_HSCK0_A, GPIO_FN_SCK1_A, GPIO_FN_VI0_VSYNC,</div><div class='add'>+		GPIO_FN_RMII0_RX_ER_A, GPIO_FN_ET0_RX_ER,</div><div class='add'>+	GPIO_FN_HRTS0_A, GPIO_FN_RTS1_A, GPIO_FN_VI0_HSYNC,</div><div class='add'>+		GPIO_FN_RMII0_TXD_EN_A, GPIO_FN_ET0_RX_DV,</div><div class='add'>+	GPIO_FN_HCTS0_A, GPIO_FN_CTS1_A, GPIO_FN_VI0_FIELD,</div><div class='add'>+		GPIO_FN_RMII0_RXD1_A, GPIO_FN_ET0_ERXD7,</div><div class='add'>+</div><div class='add'>+	/* IPSR5 */</div><div class='add'>+	GPIO_FN_SD2_CLK_A, GPIO_FN_RX2_A, GPIO_FN_VI0_G4, GPIO_FN_ET0_RX_CLK_B,</div><div class='add'>+	GPIO_FN_SD2_CMD_A, GPIO_FN_TX2_A, GPIO_FN_VI0_G5, GPIO_FN_ET0_ERXD2_B,</div><div class='add'>+	GPIO_FN_SD2_DAT0_A, GPIO_FN_RX3_A, GPIO_FN_VI0_R0, GPIO_FN_ET0_ERXD3_B,</div><div class='add'>+	GPIO_FN_SD2_DAT1_A, GPIO_FN_TX3_A, GPIO_FN_VI0_R1, GPIO_FN_ET0_MDIO_B,</div><div class='add'>+	GPIO_FN_SD2_DAT2_A, GPIO_FN_RX4_A, GPIO_FN_VI0_R2, GPIO_FN_ET0_LINK_B,</div><div class='add'>+	GPIO_FN_SD2_DAT3_A, GPIO_FN_TX4_A, GPIO_FN_VI0_R3, GPIO_FN_ET0_MAGIC_B,</div><div class='add'>+	GPIO_FN_SD2_CD_A, GPIO_FN_RX5_A, GPIO_FN_VI0_R4, GPIO_FN_ET0_PHY_INT_B,</div><div class='add'>+	GPIO_FN_SD2_WP_A, GPIO_FN_TX5_A, GPIO_FN_VI0_R5,</div><div class='add'>+	GPIO_FN_REF125CK, GPIO_FN_ADTRG, GPIO_FN_RX5_C,</div><div class='add'>+	GPIO_FN_REF50CK, GPIO_FN_CTS1_E, GPIO_FN_HCTS0_D,</div><div class='add'>+</div><div class='add'>+	/* IPSR6 */</div><div class='add'>+	GPIO_FN_DU0_DR0, GPIO_FN_SCIF_CLK_B, GPIO_FN_HRX0_D, GPIO_FN_IETX_A,</div><div class='add'>+		GPIO_FN_TCLKA_A, GPIO_FN_HIFD00,</div><div class='add'>+	GPIO_FN_DU0_DR1, GPIO_FN_SCK0_B, GPIO_FN_HTX0_D, GPIO_FN_IERX_A,</div><div class='add'>+		GPIO_FN_TCLKB_A, GPIO_FN_HIFD01,</div><div class='add'>+	GPIO_FN_DU0_DR2, GPIO_FN_RX0_B, GPIO_FN_TCLKC_A, GPIO_FN_HIFD02,</div><div class='add'>+	GPIO_FN_DU0_DR3, GPIO_FN_TX0_B, GPIO_FN_TCLKD_A, GPIO_FN_HIFD03,</div><div class='add'>+	GPIO_FN_DU0_DR4, GPIO_FN_CTS0_C, GPIO_FN_TIOC0A_A, GPIO_FN_HIFD04,</div><div class='add'>+	GPIO_FN_DU0_DR5, GPIO_FN_RTS0_C, GPIO_FN_TIOC0B_A, GPIO_FN_HIFD05,</div><div class='add'>+	GPIO_FN_DU0_DR6, GPIO_FN_SCK1_C, GPIO_FN_TIOC0C_A, GPIO_FN_HIFD06,</div><div class='add'>+	GPIO_FN_DU0_DR7, GPIO_FN_RX1_C, GPIO_FN_TIOC0D_A, GPIO_FN_HIFD07,</div><div class='add'>+	GPIO_FN_DU0_DG0, GPIO_FN_TX1_C, GPIO_FN_HSCK0_D, GPIO_FN_IECLK_A,</div><div class='add'>+		GPIO_FN_TIOC1A_A, GPIO_FN_HIFD08,</div><div class='add'>+	GPIO_FN_DU0_DG1, GPIO_FN_CTS1_C, GPIO_FN_HRTS0_D, GPIO_FN_TIOC1B_A,</div><div class='add'>+		GPIO_FN_HIFD09,</div><div class='add'>+</div><div class='add'>+	/* IPSR7 */</div><div class='add'>+	GPIO_FN_DU0_DG2, GPIO_FN_RTS1_C, GPIO_FN_RMII0_MDC_B, GPIO_FN_TIOC2A_A,</div><div class='add'>+		GPIO_FN_HIFD10,</div><div class='add'>+	GPIO_FN_DU0_DG3, GPIO_FN_SCK2_C, GPIO_FN_RMII0_MDIO_B, GPIO_FN_TIOC2B_A,</div><div class='add'>+		GPIO_FN_HIFD11,</div><div class='add'>+	GPIO_FN_DU0_DG4, GPIO_FN_RX2_C, GPIO_FN_RMII0_CRS_DV_B,</div><div class='add'>+		GPIO_FN_TIOC3A_A, GPIO_FN_HIFD12,</div><div class='add'>+	GPIO_FN_DU0_DG5, GPIO_FN_TX2_C, GPIO_FN_RMII0_RX_ER_B,</div><div class='add'>+		GPIO_FN_TIOC3B_A, GPIO_FN_HIFD13,</div><div class='add'>+	GPIO_FN_DU0_DG6, GPIO_FN_RX3_C, GPIO_FN_RMII0_RXD0_B,</div><div class='add'>+		GPIO_FN_TIOC3C_A, GPIO_FN_HIFD14,</div><div class='add'>+	GPIO_FN_DU0_DG7, GPIO_FN_TX3_C, GPIO_FN_RMII0_RXD1_B,</div><div class='add'>+		GPIO_FN_TIOC3D_A, GPIO_FN_HIFD15,</div><div class='add'>+	GPIO_FN_DU0_DB0, GPIO_FN_RX4_C, GPIO_FN_RMII0_TXD_EN_B,</div><div class='add'>+		GPIO_FN_TIOC4A_A, GPIO_FN_HIFCS,</div><div class='add'>+	GPIO_FN_DU0_DB1, GPIO_FN_TX4_C, GPIO_FN_RMII0_TXD0_B,</div><div class='add'>+		GPIO_FN_TIOC4B_A, GPIO_FN_HIFRS,</div><div class='add'>+	GPIO_FN_DU0_DB2, GPIO_FN_RX5_B, GPIO_FN_RMII0_TXD1_B,</div><div class='add'>+		GPIO_FN_TIOC4C_A, GPIO_FN_HIFWR,</div><div class='add'>+	GPIO_FN_DU0_DB3, GPIO_FN_TX5_B, GPIO_FN_TIOC4D_A, GPIO_FN_HIFRD,</div><div class='add'>+	GPIO_FN_DU0_DB4, GPIO_FN_HIFINT,</div><div class='add'>+</div><div class='add'>+	/* IPSR8 */</div><div class='add'>+	GPIO_FN_DU0_DB5, GPIO_FN_HIFDREQ,</div><div class='add'>+	GPIO_FN_DU0_DB6, GPIO_FN_HIFRDY,</div><div class='add'>+	GPIO_FN_DU0_DB7, GPIO_FN_SSI_SCK0_B, GPIO_FN_HIFEBL_B,</div><div class='add'>+	GPIO_FN_DU0_DOTCLKIN, GPIO_FN_HSPI_CS0_C, GPIO_FN_SSI_WS0_B,</div><div class='add'>+	GPIO_FN_DU0_DOTCLKOUT, GPIO_FN_HSPI_CLK0_C, GPIO_FN_SSI_SDATA0_B,</div><div class='add'>+	GPIO_FN_DU0_EXHSYNC_DU0_HSYNC, GPIO_FN_HSPI_TX0_C, GPIO_FN_SSI_SCK1_B,</div><div class='add'>+	GPIO_FN_DU0_EXVSYNC_DU0_VSYNC, GPIO_FN_HSPI_RX0_C, GPIO_FN_SSI_WS1_B,</div><div class='add'>+	GPIO_FN_DU0_EXODDF_DU0_ODDF, GPIO_FN_CAN0_RX_B, GPIO_FN_HSCK0_B,</div><div class='add'>+		GPIO_FN_SSI_SDATA1_B,</div><div class='add'>+	GPIO_FN_DU0_DISP, GPIO_FN_CAN0_TX_B, GPIO_FN_HRX0_B,</div><div class='add'>+		GPIO_FN_AUDIO_CLKA_B,</div><div class='add'>+	GPIO_FN_DU0_CDE, GPIO_FN_HTX0_B, GPIO_FN_AUDIO_CLKB_B,</div><div class='add'>+		GPIO_FN_LCD_VCPWC_B,</div><div class='add'>+	GPIO_FN_IRQ0_A, GPIO_FN_HSPI_TX_B, GPIO_FN_RX3_E, GPIO_FN_ET0_ERXD0,</div><div class='add'>+	GPIO_FN_IRQ1_A, GPIO_FN_HSPI_RX_B, GPIO_FN_TX3_E, GPIO_FN_ET0_ERXD1,</div><div class='add'>+	GPIO_FN_IRQ2_A, GPIO_FN_CTS0_A, GPIO_FN_HCTS0_B, GPIO_FN_ET0_ERXD2_A,</div><div class='add'>+	GPIO_FN_IRQ3_A, GPIO_FN_RTS0_A, GPIO_FN_HRTS0_B, GPIO_FN_ET0_ERXD3_A,</div><div class='add'>+</div><div class='add'>+	/* IPSR9 */</div><div class='add'>+	GPIO_FN_VI1_CLK_A, GPIO_FN_FD0_B, GPIO_FN_LCD_DATA0_B,</div><div class='add'>+	GPIO_FN_VI1_0_A, GPIO_FN_FD1_B, GPIO_FN_LCD_DATA1_B,</div><div class='add'>+	GPIO_FN_VI1_1_A, GPIO_FN_FD2_B, GPIO_FN_LCD_DATA2_B,</div><div class='add'>+	GPIO_FN_VI1_2_A, GPIO_FN_FD3_B, GPIO_FN_LCD_DATA3_B,</div><div class='add'>+	GPIO_FN_VI1_3_A, GPIO_FN_FD4_B, GPIO_FN_LCD_DATA4_B,</div><div class='add'>+	GPIO_FN_VI1_4_A, GPIO_FN_FD5_B, GPIO_FN_LCD_DATA5_B,</div><div class='add'>+	GPIO_FN_VI1_5_A, GPIO_FN_FD6_B, GPIO_FN_LCD_DATA6_B,</div><div class='add'>+	GPIO_FN_VI1_6_A, GPIO_FN_FD7_B, GPIO_FN_LCD_DATA7_B,</div><div class='add'>+	GPIO_FN_VI1_7_A, GPIO_FN_FCE_B, GPIO_FN_LCD_DATA8_B,</div><div class='add'>+	GPIO_FN_SSI_SCK0_A, GPIO_FN_TIOC1A_B, GPIO_FN_LCD_DATA9_B,</div><div class='add'>+	GPIO_FN_SSI_WS0_A, GPIO_FN_TIOC1B_B, GPIO_FN_LCD_DATA10_B,</div><div class='add'>+	GPIO_FN_SSI_SDATA0_A, GPIO_FN_VI1_0_B, GPIO_FN_TIOC2A_B,</div><div class='add'>+		GPIO_FN_LCD_DATA11_B,</div><div class='add'>+	GPIO_FN_SSI_SCK1_A, GPIO_FN_VI1_1_B, GPIO_FN_TIOC2B_B,</div><div class='add'>+		GPIO_FN_LCD_DATA12_B,</div><div class='add'>+	GPIO_FN_SSI_WS1_A, GPIO_FN_VI1_2_B, GPIO_FN_LCD_DATA13_B,</div><div class='add'>+	GPIO_FN_SSI_SDATA1_A, GPIO_FN_VI1_3_B, GPIO_FN_LCD_DATA14_B,</div><div class='add'>+</div><div class='add'>+	/* IPSR10 */</div><div class='add'>+	GPIO_FN_SSI_SCK23, GPIO_FN_VI1_4_B, GPIO_FN_RX1_D, GPIO_FN_FCLE_B,</div><div class='add'>+		GPIO_FN_LCD_DATA15_B,</div><div class='add'>+	GPIO_FN_SSI_WS23, GPIO_FN_VI1_5_B, GPIO_FN_TX1_D, GPIO_FN_HSCK0_C,</div><div class='add'>+		GPIO_FN_FALE_B, GPIO_FN_LCD_DON_B,</div><div class='add'>+	GPIO_FN_SSI_SDATA2, GPIO_FN_VI1_6_B, GPIO_FN_HRX0_C, GPIO_FN_FRE_B,</div><div class='add'>+		GPIO_FN_LCD_CL1_B,</div><div class='add'>+	GPIO_FN_SSI_SDATA3, GPIO_FN_VI1_7_B, GPIO_FN_HTX0_C, GPIO_FN_FWE_B,</div><div class='add'>+		GPIO_FN_LCD_CL2_B,</div><div class='add'>+	GPIO_FN_AUDIO_CLKA_A, GPIO_FN_VI1_CLK_B, GPIO_FN_SCK1_D,</div><div class='add'>+		GPIO_FN_IECLK_B, GPIO_FN_LCD_FLM_B,</div><div class='add'>+	GPIO_FN_AUDIO_CLKB_A, GPIO_FN_LCD_CLK_B,</div><div class='add'>+	GPIO_FN_AUDIO_CLKC, GPIO_FN_SCK1_E, GPIO_FN_HCTS0_C, GPIO_FN_FRB_B,</div><div class='add'>+		GPIO_FN_LCD_VEPWC_B,</div><div class='add'>+	GPIO_FN_AUDIO_CLKOUT, GPIO_FN_TX1_E, GPIO_FN_HRTS0_C, GPIO_FN_FSE_B,</div><div class='add'>+		GPIO_FN_LCD_M_DISP_B,</div><div class='add'>+	GPIO_FN_CAN_CLK_A, GPIO_FN_RX4_D,</div><div class='add'>+	GPIO_FN_CAN0_TX_A, GPIO_FN_TX4_D, GPIO_FN_MLB_CLK,</div><div class='add'>+	GPIO_FN_CAN1_RX_A, GPIO_FN_IRQ1_B,</div><div class='add'>+	GPIO_FN_CAN0_RX_A, GPIO_FN_IRQ0_B, GPIO_FN_MLB_SIG,</div><div class='add'>+	GPIO_FN_CAN1_TX_A, GPIO_FN_TX5_C, GPIO_FN_MLB_DAT,</div><div class='add'>+</div><div class='add'>+	/* IPSR11 */</div><div class='add'>+	GPIO_FN_SCL1, GPIO_FN_SCIF_CLK_C,</div><div class='add'>+	GPIO_FN_SDA1, GPIO_FN_RX1_E,</div><div class='add'>+	GPIO_FN_SDA0, GPIO_FN_HIFEBL_A,</div><div class='add'>+	GPIO_FN_SDSELF, GPIO_FN_RTS1_E,</div><div class='add'>+	GPIO_FN_SCIF_CLK_A, GPIO_FN_HSPI_CLK_A, GPIO_FN_VI0_CLK,</div><div class='add'>+		GPIO_FN_RMII0_TXD0_A, GPIO_FN_ET0_ERXD4,</div><div class='add'>+	GPIO_FN_SCK0_A, GPIO_FN_HSPI_CS_A, GPIO_FN_VI0_CLKENB,</div><div class='add'>+		GPIO_FN_RMII0_TXD1_A, GPIO_FN_ET0_ERXD5,</div><div class='add'>+	GPIO_FN_RX0_A, GPIO_FN_HSPI_RX_A, GPIO_FN_RMII0_RXD0_A,</div><div class='add'>+		GPIO_FN_ET0_ERXD6,</div><div class='add'>+	GPIO_FN_TX0_A, GPIO_FN_HSPI_TX_A,</div><div class='add'>+	GPIO_FN_PENC1, GPIO_FN_TX3_D, GPIO_FN_CAN1_TX_B, GPIO_FN_TX5_D,</div><div class='add'>+		GPIO_FN_IETX_B,</div><div class='add'>+	GPIO_FN_USB_OVC1, GPIO_FN_RX3_D, GPIO_FN_CAN1_RX_B, GPIO_FN_RX5_D,</div><div class='add'>+		GPIO_FN_IERX_B,</div><div class='add'>+	GPIO_FN_DREQ0, GPIO_FN_SD1_CLK_A, GPIO_FN_ET0_TX_EN,</div><div class='add'>+	GPIO_FN_DACK0, GPIO_FN_SD1_DAT3_A, GPIO_FN_ET0_TX_ER,</div><div class='add'>+	GPIO_FN_DREQ1, GPIO_FN_HSPI_CLK_B, GPIO_FN_RX4_B, GPIO_FN_ET0_PHY_INT_C,</div><div class='add'>+		GPIO_FN_ET0_TX_CLK_A,</div><div class='add'>+	GPIO_FN_DACK1, GPIO_FN_HSPI_CS_B, GPIO_FN_TX4_B, GPIO_FN_ET0_RX_CLK_A,</div><div class='add'>+	GPIO_FN_PRESETOUT, GPIO_FN_ST_CLKOUT,</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_SH7734_H__ */</div><div class='head'>diff --git a/arch/sh/include/cpu-sh4a/cpu/dma.h b/arch/sh/include/cpu-sh4a/cpu/dma.h<br/>new file mode 100644<br/>index 000000000000..89afb650ce25<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/cpu-sh4a/cpu/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/cpu-sh4a/cpu/dma.h</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H</div><div class='add'>+#define __ASM_SH_CPU_SH4_DMA_SH7780_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \</div><div class='add'>+	defined(CONFIG_CPU_SUBTYPE_SH7730)</div><div class='add'>+#define DMTE0_IRQ	evt2irq(0x800)</div><div class='add'>+#define DMTE4_IRQ	evt2irq(0xb80)</div><div class='add'>+#define DMAE0_IRQ	evt2irq(0xbc0)	/* DMA Error IRQ*/</div><div class='add'>+#define SH_DMAC_BASE0	0xFE008020</div><div class='add'>+#elif defined(CONFIG_CPU_SUBTYPE_SH7722)</div><div class='add'>+#define DMTE0_IRQ	evt2irq(0x800)</div><div class='add'>+#define DMTE4_IRQ	evt2irq(0xb80)</div><div class='add'>+#define DMAE0_IRQ	evt2irq(0xbc0)	/* DMA Error IRQ*/</div><div class='add'>+#define SH_DMAC_BASE0	0xFE008020</div><div class='add'>+#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \</div><div class='add'>+	defined(CONFIG_CPU_SUBTYPE_SH7764)</div><div class='add'>+#define DMTE0_IRQ	evt2irq(0x640)</div><div class='add'>+#define DMTE4_IRQ	evt2irq(0x780)</div><div class='add'>+#define DMAE0_IRQ	evt2irq(0x6c0)</div><div class='add'>+#define SH_DMAC_BASE0	0xFF608020</div><div class='add'>+#elif defined(CONFIG_CPU_SUBTYPE_SH7723)</div><div class='add'>+#define DMTE0_IRQ	evt2irq(0x800)	/* DMAC0A*/</div><div class='add'>+#define DMTE4_IRQ	evt2irq(0xb80)	/* DMAC0B */</div><div class='add'>+#define DMTE6_IRQ	evt2irq(0x700)</div><div class='add'>+#define DMTE8_IRQ	evt2irq(0x740)	/* DMAC1A */</div><div class='add'>+#define DMTE9_IRQ	evt2irq(0x760)</div><div class='add'>+#define DMTE10_IRQ	evt2irq(0xb00)	/* DMAC1B */</div><div class='add'>+#define DMTE11_IRQ	evt2irq(0xb20)</div><div class='add'>+#define DMAE0_IRQ	evt2irq(0xbc0)	/* DMA Error IRQ*/</div><div class='add'>+#define DMAE1_IRQ	evt2irq(0xb40)	/* DMA Error IRQ*/</div><div class='add'>+#define SH_DMAC_BASE0	0xFE008020</div><div class='add'>+#define SH_DMAC_BASE1	0xFDC08020</div><div class='add'>+#elif defined(CONFIG_CPU_SUBTYPE_SH7724)</div><div class='add'>+#define DMTE0_IRQ	evt2irq(0x800)	/* DMAC0A*/</div><div class='add'>+#define DMTE4_IRQ	evt2irq(0xb80)	/* DMAC0B */</div><div class='add'>+#define DMTE6_IRQ	evt2irq(0x700)</div><div class='add'>+#define DMTE8_IRQ	evt2irq(0x740)	/* DMAC1A */</div><div class='add'>+#define DMTE9_IRQ	evt2irq(0x760)</div><div class='add'>+#define DMTE10_IRQ	evt2irq(0xb00)	/* DMAC1B */</div><div class='add'>+#define DMTE11_IRQ	evt2irq(0xb20)</div><div class='add'>+#define DMAE0_IRQ	evt2irq(0xbc0)	/* DMA Error IRQ*/</div><div class='add'>+#define DMAE1_IRQ	evt2irq(0xb40)	/* DMA Error IRQ*/</div><div class='add'>+#define SH_DMAC_BASE0	0xFE008020</div><div class='add'>+#define SH_DMAC_BASE1	0xFDC08020</div><div class='add'>+#elif defined(CONFIG_CPU_SUBTYPE_SH7780)</div><div class='add'>+#define DMTE0_IRQ	evt2irq(0x640)</div><div class='add'>+#define DMTE4_IRQ	evt2irq(0x780)</div><div class='add'>+#define DMTE6_IRQ	evt2irq(0x7c0)</div><div class='add'>+#define DMTE8_IRQ	evt2irq(0xd80)</div><div class='add'>+#define DMTE9_IRQ	evt2irq(0xda0)</div><div class='add'>+#define DMTE10_IRQ	evt2irq(0xdc0)</div><div class='add'>+#define DMTE11_IRQ	evt2irq(0xde0)</div><div class='add'>+#define DMAE0_IRQ	evt2irq(0x6c0)	/* DMA Error IRQ */</div><div class='add'>+#define SH_DMAC_BASE0	0xFC808020</div><div class='add'>+#define SH_DMAC_BASE1	0xFC818020</div><div class='add'>+#else /* SH7785 */</div><div class='add'>+#define DMTE0_IRQ	evt2irq(0x620)</div><div class='add'>+#define DMTE4_IRQ	evt2irq(0x6a0)</div><div class='add'>+#define DMTE6_IRQ	evt2irq(0x880)</div><div class='add'>+#define DMTE8_IRQ	evt2irq(0x8c0)</div><div class='add'>+#define DMTE9_IRQ	evt2irq(0x8e0)</div><div class='add'>+#define DMTE10_IRQ	evt2irq(0x900)</div><div class='add'>+#define DMTE11_IRQ	evt2irq(0x920)</div><div class='add'>+#define DMAE0_IRQ	evt2irq(0x6e0)	/* DMA Error IRQ0 */</div><div class='add'>+#define DMAE1_IRQ	evt2irq(0x940)	/* DMA Error IRQ1 */</div><div class='add'>+#define SH_DMAC_BASE0	0xFC808020</div><div class='add'>+#define SH_DMAC_BASE1	0xFCC08020</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */</div><div class='head'>diff --git a/arch/sh/include/cpu-sh5/cpu/dma.h b/arch/sh/include/cpu-sh5/cpu/dma.h<br/>deleted file mode 100644<br/>index 7bf6bb3d35ed..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/cpu-sh5/cpu/dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/cpu-sh5/cpu/dma.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,6 +0,0 @@</div><div class='del'>-#ifndef __ASM_SH_CPU_SH5_DMA_H</div><div class='del'>-#define __ASM_SH_CPU_SH5_DMA_H</div><div class='del'>-</div><div class='del'>-/* Nothing yet */</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_SH_CPU_SH5_DMA_H */</div><div class='head'>diff --git a/arch/sh/include/mach-common/mach/hp6xx.h b/arch/sh/include/mach-common/mach/hp6xx.h<br/>index bcc301ac12f4..6aaaf8596e6a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-common/mach/hp6xx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-common/mach/hp6xx.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-common/mach/hp6xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-common/mach/hp6xx.h</a></div><div class='hunk'>@@ -9,10 +9,11 @@</div><div class='ctx'>  * for more details.</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> </div><div class='del'>-#define HP680_BTN_IRQ		32	/* IRQ0_IRQ */</div><div class='del'>-#define HP680_TS_IRQ		35	/* IRQ3_IRQ */</div><div class='del'>-#define HP680_HD64461_IRQ	36	/* IRQ4_IRQ */</div><div class='add'>+#define HP680_BTN_IRQ		evt2irq(0x600)	/* IRQ0_IRQ */</div><div class='add'>+#define HP680_TS_IRQ		evt2irq(0x660)	/* IRQ3_IRQ */</div><div class='add'>+#define HP680_HD64461_IRQ	evt2irq(0x680)	/* IRQ4_IRQ */</div><div class='ctx'> </div><div class='ctx'> #define DAC_LCD_BRIGHTNESS	0</div><div class='ctx'> #define DAC_SPEAKER_VOLUME	1</div><div class='head'>diff --git a/arch/sh/include/mach-common/mach/lboxre2.h b/arch/sh/include/mach-common/mach/lboxre2.h<br/>index e6d160504923..3a4dcc5c74ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-common/mach/lboxre2.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-common/mach/lboxre2.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-common/mach/lboxre2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-common/mach/lboxre2.h</a></div><div class='hunk'>@@ -11,13 +11,14 @@</div><div class='ctx'>  * for more details.</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> </div><div class='del'>-#define IRQ_CF1		9	/* CF1 */</div><div class='del'>-#define IRQ_CF0		10	/* CF0 */</div><div class='del'>-#define IRQ_INTD	11	/* INTD */</div><div class='del'>-#define IRQ_ETH1	12	/* Ether1 */</div><div class='del'>-#define IRQ_ETH0	13	/* Ether0 */</div><div class='del'>-#define IRQ_INTA	14	/* INTA */</div><div class='add'>+#define IRQ_CF1		evt2irq(0x320)	/* CF1 */</div><div class='add'>+#define IRQ_CF0		evt2irq(0x340)	/* CF0 */</div><div class='add'>+#define IRQ_INTD	evt2irq(0x360)	/* INTD */</div><div class='add'>+#define IRQ_ETH1	evt2irq(0x380)	/* Ether1 */</div><div class='add'>+#define IRQ_ETH0	evt2irq(0x3a0)	/* Ether0 */</div><div class='add'>+#define IRQ_INTA	evt2irq(0x3c0)	/* INTA */</div><div class='ctx'> </div><div class='ctx'> void init_lboxre2_IRQ(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/include/mach-common/mach/sdk7780.h b/arch/sh/include/mach-common/mach/sdk7780.h<br/>index 697dc865f21b..ce64e02e9b50 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-common/mach/sdk7780.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-common/mach/sdk7780.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-common/mach/sdk7780.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-common/mach/sdk7780.h</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'>  * License.  See the file "COPYING" in the main directory of this archive</div><div class='ctx'>  * for more details.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Box specific addresses.  */</div><div class='hunk'>@@ -67,9 +68,9 @@</div><div class='ctx'> </div><div class='ctx'> #define SDK7780_NR_IRL			15</div><div class='ctx'> /* IDE/ATA interrupt */</div><div class='del'>-#define IRQ_CFCARD				14</div><div class='add'>+#define IRQ_CFCARD			evt2irq(0x3c0)</div><div class='ctx'> /* SMC interrupt */</div><div class='del'>-#define IRQ_ETHERNET			6</div><div class='add'>+#define IRQ_ETHERNET			evt2irq(0x2c0)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* arch/sh/boards/renesas/sdk7780/irq.c */</div><div class='head'>diff --git a/arch/sh/include/mach-common/mach/titan.h b/arch/sh/include/mach-common/mach/titan.h<br/>index 4a674d27cbb8..fa3cd801cf2e 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-common/mach/titan.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-common/mach/titan.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-common/mach/titan.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-common/mach/titan.h</a></div><div class='hunk'>@@ -4,14 +4,16 @@</div><div class='ctx'> #ifndef _ASM_SH_TITAN_H</div><div class='ctx'> #define _ASM_SH_TITAN_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='add'>+</div><div class='ctx'> #define __IO_PREFIX titan</div><div class='ctx'> #include &lt;asm/io_generic.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* IRQ assignments */</div><div class='del'>-#define TITAN_IRQ_WAN		2	/* eth0 (WAN) */</div><div class='del'>-#define TITAN_IRQ_LAN		5	/* eth1 (LAN) */</div><div class='del'>-#define TITAN_IRQ_MPCIA		8	/* mPCI A */</div><div class='del'>-#define TITAN_IRQ_MPCIB		11	/* mPCI B */</div><div class='del'>-#define TITAN_IRQ_USB		11	/* USB */</div><div class='add'>+#define TITAN_IRQ_WAN		evt2irq(0x240)	/* eth0 (WAN) */</div><div class='add'>+#define TITAN_IRQ_LAN		evt2irq(0x2a0)	/* eth1 (LAN) */</div><div class='add'>+#define TITAN_IRQ_MPCIA		evt2irq(0x300)	/* mPCI A */</div><div class='add'>+#define TITAN_IRQ_MPCIB		evt2irq(0x360)	/* mPCI B */</div><div class='add'>+#define TITAN_IRQ_USB		evt2irq(0x360)	/* USB */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_SH_TITAN_H */</div><div class='head'>diff --git a/arch/sh/include/mach-dreamcast/mach/dma.h b/arch/sh/include/mach-dreamcast/mach/dma.h<br/>index ddd68e788705..1dbfdf701c9d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-dreamcast/mach/dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-dreamcast/mach/dma.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-dreamcast/mach/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-dreamcast/mach/dma.h</a></div><div class='hunk'>@@ -11,9 +11,7 @@</div><div class='ctx'> #define __ASM_SH_DREAMCAST_DMA_H</div><div class='ctx'> </div><div class='ctx'> /* Number of DMA channels */</div><div class='del'>-#define ONCHIP_NR_DMA_CHANNELS	4</div><div class='ctx'> #define G2_NR_DMA_CHANNELS	4</div><div class='del'>-#define PVR2_NR_DMA_CHANNELS	1</div><div class='ctx'> </div><div class='ctx'> /* Channels for cascading */</div><div class='ctx'> #define PVR2_CASCADE_CHAN	2</div><div class='head'>diff --git a/arch/sh/include/mach-landisk/mach/iodata_landisk.h b/arch/sh/include/mach-landisk/mach/iodata_landisk.h<br/>index f432773a9571..ceeea48cc7af 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-landisk/mach/iodata_landisk.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-landisk/mach/iodata_landisk.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-landisk/mach/iodata_landisk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-landisk/mach/iodata_landisk.h</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * IO-DATA LANDISK support</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Box specific addresses.  */</div><div class='ctx'> </div><div class='hunk'>@@ -25,15 +26,15 @@</div><div class='ctx'> #define PA_PIDE_OFFSET	0x40		/* CF IDE Offset */</div><div class='ctx'> #define PA_SIDE_OFFSET	0x40		/* HDD IDE Offset */</div><div class='ctx'> </div><div class='del'>-#define IRQ_PCIINTA	5		/* PCI INTA IRQ */</div><div class='del'>-#define IRQ_PCIINTB	6		/* PCI INTB IRQ */</div><div class='del'>-#define IRQ_PCIINTC	7		/* PCI INTC IRQ */</div><div class='del'>-#define IRQ_PCIINTD	8		/* PCI INTD IRQ */</div><div class='del'>-#define IRQ_ATA		9		/* ATA IRQ */</div><div class='del'>-#define IRQ_FATA	10		/* FATA IRQ */</div><div class='del'>-#define IRQ_POWER	11		/* Power Switch IRQ */</div><div class='del'>-#define IRQ_BUTTON	12		/* USL-5P Button IRQ */</div><div class='del'>-#define IRQ_FAULT	13		/* USL-5P Fault  IRQ */</div><div class='add'>+#define IRQ_PCIINTA	evt2irq(0x2a0)	/* PCI INTA IRQ */</div><div class='add'>+#define IRQ_PCIINTB	evt2irq(0x2c0)	/* PCI INTB IRQ */</div><div class='add'>+#define IRQ_PCIINTC	evt2irq(0x2e0)	/* PCI INTC IRQ */</div><div class='add'>+#define IRQ_PCIINTD	evt2irq(0x300)	/* PCI INTD IRQ */</div><div class='add'>+#define IRQ_ATA		evt2irq(0x320)	/* ATA IRQ */</div><div class='add'>+#define IRQ_FATA	evt2irq(0x340)	/* FATA IRQ */</div><div class='add'>+#define IRQ_POWER	evt2irq(0x360)	/* Power Switch IRQ */</div><div class='add'>+#define IRQ_BUTTON	evt2irq(0x380)	/* USL-5P Button IRQ */</div><div class='add'>+#define IRQ_FAULT	evt2irq(0x3a0)	/* USL-5P Fault  IRQ */</div><div class='ctx'> </div><div class='ctx'> void init_landisk_IRQ(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/include/mach-se/mach/se.h b/arch/sh/include/mach-se/mach/se.h<br/>index 14be91c5a2f0..8a6d44b4987b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-se/mach/se.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se.h</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Hitachi SolutionEngine support</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Box specific addresses.  */</div><div class='ctx'> </div><div class='hunk'>@@ -82,16 +83,16 @@</div><div class='ctx'> #define INTC_IPRD       0xa4000018UL</div><div class='ctx'> #define INTC_IPRE       0xa400001aUL</div><div class='ctx'> </div><div class='del'>-#define IRQ0_IRQ        32</div><div class='del'>-#define IRQ1_IRQ        33</div><div class='add'>+#define IRQ0_IRQ        evt2irq(0x600)</div><div class='add'>+#define IRQ1_IRQ        evt2irq(0x620)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_CPU_SUBTYPE_SH7705)</div><div class='del'>-#define IRQ_STNIC	12</div><div class='del'>-#define IRQ_CFCARD	14</div><div class='add'>+#define IRQ_STNIC	evt2irq(0x380)</div><div class='add'>+#define IRQ_CFCARD	evt2irq(0x3c0)</div><div class='ctx'> #else</div><div class='del'>-#define IRQ_STNIC	10</div><div class='del'>-#define IRQ_CFCARD	7</div><div class='add'>+#define IRQ_STNIC	evt2irq(0x340)</div><div class='add'>+#define IRQ_CFCARD	evt2irq(0x2e0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* SH Ether support (SH7710/SH7712) */</div><div class='hunk'>@@ -105,9 +106,9 @@</div><div class='ctx'> # define PHY_ID 0x01</div><div class='ctx'> #endif</div><div class='ctx'> /* Ether IRQ */</div><div class='del'>-#define SH_ETH0_IRQ	80</div><div class='del'>-#define SH_ETH1_IRQ	81</div><div class='del'>-#define SH_TSU_IRQ	82</div><div class='add'>+#define SH_ETH0_IRQ	evt2irq(0xc00)</div><div class='add'>+#define SH_ETH1_IRQ	evt2irq(0xc20)</div><div class='add'>+#define SH_TSU_IRQ	evt2irq(0xc40)</div><div class='ctx'> </div><div class='ctx'> void init_se_IRQ(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h<br/>index 8d8170d6cc43..50b5d575dff0 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se7343.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-se/mach/se7343.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se7343.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se7343.h</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * SH-Mobile SolutionEngine 7343 support</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Box specific addresses.  */</div><div class='ctx'> </div><div class='hunk'>@@ -118,10 +119,10 @@</div><div class='ctx'> #define FPGA_IN		0xb1400000</div><div class='ctx'> #define FPGA_OUT	0xb1400002</div><div class='ctx'> </div><div class='del'>-#define IRQ0_IRQ        32</div><div class='del'>-#define IRQ1_IRQ        33</div><div class='del'>-#define IRQ4_IRQ        36</div><div class='del'>-#define IRQ5_IRQ        37</div><div class='add'>+#define IRQ0_IRQ        evt2irq(0x600)</div><div class='add'>+#define IRQ1_IRQ        evt2irq(0x620)</div><div class='add'>+#define IRQ4_IRQ        evt2irq(0x680)</div><div class='add'>+#define IRQ5_IRQ        evt2irq(0x6a0)</div><div class='ctx'> </div><div class='ctx'> #define SE7343_FPGA_IRQ_MRSHPC0	0</div><div class='ctx'> #define SE7343_FPGA_IRQ_MRSHPC1	1</div><div class='head'>diff --git a/arch/sh/include/mach-se/mach/se7721.h b/arch/sh/include/mach-se/mach/se7721.h<br/>index b957f6041193..eabd0538de44 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se7721.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-se/mach/se7721.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se7721.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se7721.h</a></div><div class='hunk'>@@ -11,6 +11,8 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASM_SH_SE7721_H</div><div class='ctx'> #define __ASM_SH_SE7721_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Box specific addresses. */</div><div class='hunk'>@@ -49,9 +51,9 @@</div><div class='ctx'> #define MRSHPC_PCIC_INFO	(PA_MRSHPC + 30)</div><div class='ctx'> </div><div class='ctx'> #define PA_LED		0xB6800000	/* 8bit LED */</div><div class='del'>-#define PA_FPGA		0xB7000000 	/* FPGA base address */</div><div class='add'>+#define PA_FPGA		0xB7000000	/* FPGA base address */</div><div class='ctx'> </div><div class='del'>-#define MRSHPC_IRQ0	10</div><div class='add'>+#define MRSHPC_IRQ0	evt2irq(0x340)</div><div class='ctx'> </div><div class='ctx'> #define FPGA_ILSR1	(PA_FPGA + 0x02)</div><div class='ctx'> #define FPGA_ILSR2	(PA_FPGA + 0x03)</div><div class='head'>diff --git a/arch/sh/include/mach-se/mach/se7722.h b/arch/sh/include/mach-se/mach/se7722.h<br/>index 16505bfb8a9e..201081ebdbce 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se7722.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-se/mach/se7722.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se7722.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se7722.h</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'>  * for more details.</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Box specific addresses.  */</div><div class='hunk'>@@ -31,7 +32,7 @@</div><div class='ctx'> </div><div class='ctx'> #define PA_PERIPHERAL	0xB0000000</div><div class='ctx'> </div><div class='del'>-#define PA_PCIC         PA_PERIPHERAL   		/* MR-SHPC-01 PCMCIA */</div><div class='add'>+#define PA_PCIC         PA_PERIPHERAL		/* MR-SHPC-01 PCMCIA */</div><div class='ctx'> #define PA_MRSHPC       (PA_PERIPHERAL + 0x003fffe0)    /* MR-SHPC-01 PCMCIA controller */</div><div class='ctx'> #define PA_MRSHPC_MW1   (PA_PERIPHERAL + 0x00400000)    /* MR-SHPC-01 memory window base */</div><div class='ctx'> #define PA_MRSHPC_MW2   (PA_PERIPHERAL + 0x00500000)    /* MR-SHPC-01 attribute window base */</div><div class='hunk'>@@ -51,7 +52,7 @@</div><div class='ctx'> #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)</div><div class='ctx'> </div><div class='ctx'> #define PA_LED		(PA_PERIPHERAL + 0x00800000)	/* 8bit LED */</div><div class='del'>-#define PA_FPGA		(PA_PERIPHERAL + 0x01800000) 	/* FPGA base address */</div><div class='add'>+#define PA_FPGA		(PA_PERIPHERAL + 0x01800000)	/* FPGA base address */</div><div class='ctx'> </div><div class='ctx'> #define PA_LAN		(PA_AREA6_IO + 0)		/* SMC LAN91C111 */</div><div class='ctx'> /* GPIO */</div><div class='hunk'>@@ -77,8 +78,8 @@</div><div class='ctx'> #define PORT_HIZCRC     0xA405015CUL</div><div class='ctx'> </div><div class='ctx'> /* IRQ */</div><div class='del'>-#define IRQ0_IRQ        32</div><div class='del'>-#define IRQ1_IRQ        33</div><div class='add'>+#define IRQ0_IRQ        evt2irq(0x600)</div><div class='add'>+#define IRQ1_IRQ        evt2irq(0x620)</div><div class='ctx'> </div><div class='ctx'> #define IRQ01_MODE      0xb1800000</div><div class='ctx'> #define IRQ01_STS       0xb1800004</div><div class='head'>diff --git a/arch/sh/include/mach-se/mach/se7724.h b/arch/sh/include/mach-se/mach/se7724.h<br/>index 29514a39d0f5..be842dd1ca02 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se7724.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-se/mach/se7724.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se7724.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se7724.h</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'>  * for more details.</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* SH Eth */</div><div class='hunk'>@@ -35,9 +36,9 @@</div><div class='ctx'> #define IRQ2_MR		(0xba200028)</div><div class='ctx'> </div><div class='ctx'> /* IRQ */</div><div class='del'>-#define IRQ0_IRQ        32</div><div class='del'>-#define IRQ1_IRQ        33</div><div class='del'>-#define IRQ2_IRQ        34</div><div class='add'>+#define IRQ0_IRQ        evt2irq(0x600)</div><div class='add'>+#define IRQ1_IRQ        evt2irq(0x620)</div><div class='add'>+#define IRQ2_IRQ        evt2irq(0x640)</div><div class='ctx'> </div><div class='ctx'> /* Bits in IRQ012 registers */</div><div class='ctx'> #define SE7724_FPGA_IRQ_BASE	220</div><div class='head'>diff --git a/arch/sh/include/mach-se/mach/se7751.h b/arch/sh/include/mach-se/mach/se7751.h<br/>index b36792ac5d66..271871793d59 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se7751.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-se/mach/se7751.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se7751.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se7751.h</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'>  * Modified for 7751 Solution Engine by</div><div class='ctx'>  * Ian da Silva and Jeremy Siegel, 2001.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Box specific addresses.  */</div><div class='ctx'> </div><div class='hunk'>@@ -63,7 +64,7 @@</div><div class='ctx'> #define BCR_ILCRF	(PA_BCR + 10)</div><div class='ctx'> #define BCR_ILCRG	(PA_BCR + 12)</div><div class='ctx'> </div><div class='del'>-#define IRQ_79C973	13</div><div class='add'>+#define IRQ_79C973	evt2irq(0x3a0)</div><div class='ctx'> </div><div class='ctx'> void init_7751se_IRQ(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/include/mach-se/mach/se7780.h b/arch/sh/include/mach-se/mach/se7780.h<br/>index 40e9b41458cd..bde357cf81bd 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se7780.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/include/mach-se/mach/se7780.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/include/mach-se/mach/se7780.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/include/mach-se/mach/se7780.h</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'>  * License.  See the file "COPYING" in the main directory of this archive</div><div class='ctx'>  * for more details.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;asm/addrspace.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Box specific addresses.  */</div><div class='hunk'>@@ -80,13 +81,13 @@</div><div class='ctx'> #define IRQPOS_PCCPW            (0 * 4)</div><div class='ctx'> </div><div class='ctx'> /* IDE interrupt */</div><div class='del'>-#define IRQ_IDE0                67 /* iVDR */</div><div class='add'>+#define IRQ_IDE0                evt2irq(0xa60) /* iVDR */</div><div class='ctx'> </div><div class='ctx'> /* SMC interrupt */</div><div class='del'>-#define SMC_IRQ                 8</div><div class='add'>+#define SMC_IRQ                 evt2irq(0x300)</div><div class='ctx'> </div><div class='ctx'> /* SM501 interrupt */</div><div class='del'>-#define SM501_IRQ               0</div><div class='add'>+#define SM501_IRQ               evt2irq(0x200)</div><div class='ctx'> </div><div class='ctx'> /* interrupt pin */</div><div class='ctx'> #define IRQPIN_EXTINT1          0 /* IRQ0 pin */</div><div class='head'>diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile<br/>index 77f7ae1d4647..88571ff8eeec 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Makefile for the Linux/SuperH kernel.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y	:= head_$(BITS).o init_task.o vmlinux.lds</div><div class='add'>+extra-y	:= head_$(BITS).o vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_FUNCTION_TRACER</div><div class='ctx'> # Do not profile debug and lowlevel utilities</div><div class='head'>diff --git a/arch/sh/kernel/cpu/proc.c b/arch/sh/kernel/cpu/proc.c<br/>index f47be8727b3b..9e6624c9108b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/proc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/proc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/proc.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> static const char *cpu_name[] = {</div><div class='ctx'> 	[CPU_SH7201]	= "SH7201",</div><div class='ctx'> 	[CPU_SH7203]	= "SH7203",	[CPU_SH7263]	= "SH7263",</div><div class='add'>+	[CPU_SH7264]	= "SH7264",	[CPU_SH7269]	= "SH7269",</div><div class='ctx'> 	[CPU_SH7206]	= "SH7206",	[CPU_SH7619]	= "SH7619",</div><div class='ctx'> 	[CPU_SH7705]	= "SH7705",	[CPU_SH7706]	= "SH7706",</div><div class='ctx'> 	[CPU_SH7707]	= "SH7707",	[CPU_SH7708]	= "SH7708",</div><div class='hunk'>@@ -25,7 +26,8 @@ static const char *cpu_name[] = {</div><div class='ctx'> 	[CPU_SH5_101]	= "SH5-101",	[CPU_SH5_103]	= "SH5-103",</div><div class='ctx'> 	[CPU_MXG]	= "MX-G",	[CPU_SH7723]	= "SH7723",</div><div class='ctx'> 	[CPU_SH7366]	= "SH7366",	[CPU_SH7724]	= "SH7724",</div><div class='del'>-	[CPU_SH7372]	= "SH7372",	[CPU_SH_NONE]	= "Unknown"</div><div class='add'>+	[CPU_SH7372]	= "SH7372",	[CPU_SH7734]	= "SH7734",</div><div class='add'>+	[CPU_SH_NONE]	= "Unknown"</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const char *get_cpu_subtype(struct sh_cpuinfo *c)</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c<br/>index 0f8befccf9fa..e0b740c831c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2/setup-sh7619.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh2/setup-sh7619.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2/setup-sh7619.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2/setup-sh7619.c</a></div><div class='hunk'>@@ -65,7 +65,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 88, 88, 88, 88 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(88),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif0_device = {</div><div class='hunk'>@@ -82,7 +82,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 92, 92, 92, 92 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(92),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif1_device = {</div><div class='hunk'>@@ -99,7 +99,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 96, 96, 96, 96 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(96),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif2_device = {</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile<br/>index 45f85c77ef75..7fdc102d0dd6 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh2a/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/Makefile</a></div><div class='hunk'>@@ -11,10 +11,14 @@ obj-$(CONFIG_SH_FPU)	+= fpu.o</div><div class='ctx'> obj-$(CONFIG_CPU_SUBTYPE_SH7201)	+= setup-sh7201.o clock-sh7201.o</div><div class='ctx'> obj-$(CONFIG_CPU_SUBTYPE_SH7203)	+= setup-sh7203.o clock-sh7203.o</div><div class='ctx'> obj-$(CONFIG_CPU_SUBTYPE_SH7263)	+= setup-sh7203.o clock-sh7203.o</div><div class='add'>+obj-$(CONFIG_CPU_SUBTYPE_SH7264)	+= setup-sh7264.o clock-sh7264.o</div><div class='ctx'> obj-$(CONFIG_CPU_SUBTYPE_SH7206)	+= setup-sh7206.o clock-sh7206.o</div><div class='add'>+obj-$(CONFIG_CPU_SUBTYPE_SH7269)	+= setup-sh7269.o clock-sh7269.o</div><div class='ctx'> obj-$(CONFIG_CPU_SUBTYPE_MXG)		+= setup-mxg.o clock-sh7206.o</div><div class='ctx'> </div><div class='ctx'> # Pinmux setup</div><div class='ctx'> pinmux-$(CONFIG_CPU_SUBTYPE_SH7203)	:= pinmux-sh7203.o</div><div class='add'>+pinmux-$(CONFIG_CPU_SUBTYPE_SH7264)	:= pinmux-sh7264.o</div><div class='add'>+pinmux-$(CONFIG_CPU_SUBTYPE_SH7269)	:= pinmux-sh7269.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_GENERIC_GPIO)	+= $(pinmux-y)</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7264.c b/arch/sh/kernel/cpu/sh2a/clock-sh7264.c<br/>new file mode 100644<br/>index 000000000000..fdf585c95289<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/clock-sh7264.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/clock-sh7264.c</a></div><div class='hunk'>@@ -0,0 +1,153 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/sh/kernel/cpu/sh2a/clock-sh7264.c</div><div class='add'>+ *</div><div class='add'>+ * SH7264 clock framework support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012  Phil Edworthy</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;asm/clock.h&gt;</div><div class='add'>+</div><div class='add'>+/* SH7264 registers */</div><div class='add'>+#define FRQCR		0xfffe0010</div><div class='add'>+#define STBCR3		0xfffe0408</div><div class='add'>+#define STBCR4		0xfffe040c</div><div class='add'>+#define STBCR5		0xfffe0410</div><div class='add'>+#define STBCR6		0xfffe0414</div><div class='add'>+#define STBCR7		0xfffe0418</div><div class='add'>+#define STBCR8		0xfffe041c</div><div class='add'>+</div><div class='add'>+static const unsigned int pll1rate[] = {8, 12};</div><div class='add'>+</div><div class='add'>+static unsigned int pll1_div;</div><div class='add'>+</div><div class='add'>+/* Fixed 32 KHz root clock for RTC */</div><div class='add'>+static struct clk r_clk = {</div><div class='add'>+	.rate           = 32768,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Default rate for the root input clock, reset this with clk_set_rate()</div><div class='add'>+ * from the platform code.</div><div class='add'>+ */</div><div class='add'>+static struct clk extal_clk = {</div><div class='add'>+	.rate		= 18000000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned long pll_recalc(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	unsigned long rate = clk-&gt;parent-&gt;rate / pll1_div;</div><div class='add'>+	return rate * pll1rate[(__raw_readw(FRQCR) &gt;&gt; 8) &amp; 1];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sh_clk_ops pll_clk_ops = {</div><div class='add'>+	.recalc		= pll_recalc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk pll_clk = {</div><div class='add'>+	.ops		= &amp;pll_clk_ops,</div><div class='add'>+	.parent		= &amp;extal_clk,</div><div class='add'>+	.flags		= CLK_ENABLE_ON_INIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *main_clks[] = {</div><div class='add'>+	&amp;r_clk,</div><div class='add'>+	&amp;extal_clk,</div><div class='add'>+	&amp;pll_clk,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int div2[] = { 1, 2, 3, 4, 6, 8, 12 };</div><div class='add'>+</div><div class='add'>+static struct clk_div_mult_table div4_div_mult_table = {</div><div class='add'>+	.divisors = div2,</div><div class='add'>+	.nr_divisors = ARRAY_SIZE(div2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_div4_table div4_table = {</div><div class='add'>+	.div_mult_table = &amp;div4_div_mult_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum { DIV4_I, DIV4_P,</div><div class='add'>+       DIV4_NR };</div><div class='add'>+</div><div class='add'>+#define DIV4(_reg, _bit, _mask, _flags) \</div><div class='add'>+  SH_CLK_DIV4(&amp;pll_clk, _reg, _bit, _mask, _flags)</div><div class='add'>+</div><div class='add'>+/* The mask field specifies the div2 entries that are valid */</div><div class='add'>+struct clk div4_clks[DIV4_NR] = {</div><div class='add'>+	[DIV4_I] = DIV4(FRQCR, 4, 0x7,  CLK_ENABLE_REG_16BIT</div><div class='add'>+					| CLK_ENABLE_ON_INIT),</div><div class='add'>+	[DIV4_P] = DIV4(FRQCR, 0, 0x78, CLK_ENABLE_REG_16BIT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {	MSTP77, MSTP74, MSTP72,</div><div class='add'>+	MSTP60,</div><div class='add'>+	MSTP35, MSTP34, MSTP33, MSTP32, MSTP30,</div><div class='add'>+	MSTP_NR };</div><div class='add'>+</div><div class='add'>+static struct clk mstp_clks[MSTP_NR] = {</div><div class='add'>+	[MSTP77] = SH_CLK_MSTP8(&amp;div4_clks[DIV4_P], STBCR7, 7, 0), /* SCIF */</div><div class='add'>+	[MSTP74] = SH_CLK_MSTP8(&amp;div4_clks[DIV4_P], STBCR7, 4, 0), /* VDC */</div><div class='add'>+	[MSTP72] = SH_CLK_MSTP8(&amp;div4_clks[DIV4_P], STBCR7, 2, 0), /* CMT */</div><div class='add'>+	[MSTP60] = SH_CLK_MSTP8(&amp;div4_clks[DIV4_P], STBCR6, 0, 0), /* USB */</div><div class='add'>+	[MSTP35] = SH_CLK_MSTP8(&amp;div4_clks[DIV4_P], STBCR3, 6, 0), /* MTU2 */</div><div class='add'>+	[MSTP34] = SH_CLK_MSTP8(&amp;div4_clks[DIV4_P], STBCR3, 4, 0), /* SDHI0 */</div><div class='add'>+	[MSTP33] = SH_CLK_MSTP8(&amp;div4_clks[DIV4_P], STBCR3, 3, 0), /* SDHI1 */</div><div class='add'>+	[MSTP32] = SH_CLK_MSTP8(&amp;div4_clks[DIV4_P], STBCR3, 2, 0), /* ADC */</div><div class='add'>+	[MSTP30] = SH_CLK_MSTP8(&amp;r_clk, STBCR3, 0, 0),	/* RTC */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup lookups[] = {</div><div class='add'>+	/* main clocks */</div><div class='add'>+	CLKDEV_CON_ID("rclk", &amp;r_clk),</div><div class='add'>+	CLKDEV_CON_ID("extal", &amp;extal_clk),</div><div class='add'>+	CLKDEV_CON_ID("pll_clk", &amp;pll_clk),</div><div class='add'>+</div><div class='add'>+	/* DIV4 clocks */</div><div class='add'>+	CLKDEV_CON_ID("cpu_clk", &amp;div4_clks[DIV4_I]),</div><div class='add'>+	CLKDEV_CON_ID("peripheral_clk", &amp;div4_clks[DIV4_P]),</div><div class='add'>+</div><div class='add'>+	/* MSTP clocks */</div><div class='add'>+	CLKDEV_CON_ID("sci_ick", &amp;mstp_clks[MSTP77]),</div><div class='add'>+	CLKDEV_CON_ID("vdc3", &amp;mstp_clks[MSTP74]),</div><div class='add'>+	CLKDEV_CON_ID("cmt_fck", &amp;mstp_clks[MSTP72]),</div><div class='add'>+	CLKDEV_CON_ID("usb0", &amp;mstp_clks[MSTP60]),</div><div class='add'>+	CLKDEV_CON_ID("mtu2_fck", &amp;mstp_clks[MSTP35]),</div><div class='add'>+	CLKDEV_CON_ID("sdhi0", &amp;mstp_clks[MSTP34]),</div><div class='add'>+	CLKDEV_CON_ID("sdhi1", &amp;mstp_clks[MSTP33]),</div><div class='add'>+	CLKDEV_CON_ID("adc0", &amp;mstp_clks[MSTP32]),</div><div class='add'>+	CLKDEV_CON_ID("rtc0", &amp;mstp_clks[MSTP30]),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __init arch_clk_init(void)</div><div class='add'>+{</div><div class='add'>+	int k, ret = 0;</div><div class='add'>+</div><div class='add'>+	if (test_mode_pin(MODE_PIN0)) {</div><div class='add'>+		if (test_mode_pin(MODE_PIN1))</div><div class='add'>+			pll1_div = 3;</div><div class='add'>+		else</div><div class='add'>+			pll1_div = 4;</div><div class='add'>+	} else</div><div class='add'>+		pll1_div = 1;</div><div class='add'>+</div><div class='add'>+	for (k = 0; !ret &amp;&amp; (k &lt; ARRAY_SIZE(main_clks)); k++)</div><div class='add'>+		ret = clk_register(main_clks[k]);</div><div class='add'>+</div><div class='add'>+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &amp;div4_table);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7269.c b/arch/sh/kernel/cpu/sh2a/clock-sh7269.c<br/>new file mode 100644<br/>index 000000000000..6b787620de99<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/clock-sh7269.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/clock-sh7269.c</a></div><div class='hunk'>@@ -0,0 +1,184 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/sh/kernel/cpu/sh2a/clock-sh7269.c</div><div class='add'>+ *</div><div class='add'>+ * SH7269 clock framework support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012  Phil Edworthy</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;asm/clock.h&gt;</div><div class='add'>+</div><div class='add'>+/* SH7269 registers */</div><div class='add'>+#define FRQCR		0xfffe0010</div><div class='add'>+#define STBCR3 		0xfffe0408</div><div class='add'>+#define STBCR4 		0xfffe040c</div><div class='add'>+#define STBCR5 		0xfffe0410</div><div class='add'>+#define STBCR6 		0xfffe0414</div><div class='add'>+#define STBCR7 		0xfffe0418</div><div class='add'>+</div><div class='add'>+#define PLL_RATE 20</div><div class='add'>+</div><div class='add'>+/* Fixed 32 KHz root clock for RTC */</div><div class='add'>+static struct clk r_clk = {</div><div class='add'>+	.rate           = 32768,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Default rate for the root input clock, reset this with clk_set_rate()</div><div class='add'>+ * from the platform code.</div><div class='add'>+ */</div><div class='add'>+static struct clk extal_clk = {</div><div class='add'>+	.rate		= 13340000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned long pll_recalc(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	return clk-&gt;parent-&gt;rate * PLL_RATE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sh_clk_ops pll_clk_ops = {</div><div class='add'>+	.recalc		= pll_recalc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk pll_clk = {</div><div class='add'>+	.ops		= &amp;pll_clk_ops,</div><div class='add'>+	.parent		= &amp;extal_clk,</div><div class='add'>+	.flags		= CLK_ENABLE_ON_INIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned long peripheral0_recalc(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	return clk-&gt;parent-&gt;rate / 8;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sh_clk_ops peripheral0_clk_ops = {</div><div class='add'>+	.recalc		= peripheral0_recalc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk peripheral0_clk = {</div><div class='add'>+	.ops		= &amp;peripheral0_clk_ops,</div><div class='add'>+	.parent		= &amp;pll_clk,</div><div class='add'>+	.flags		= CLK_ENABLE_ON_INIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned long peripheral1_recalc(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	return clk-&gt;parent-&gt;rate / 4;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sh_clk_ops peripheral1_clk_ops = {</div><div class='add'>+	.recalc		= peripheral1_recalc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk peripheral1_clk = {</div><div class='add'>+	.ops		= &amp;peripheral1_clk_ops,</div><div class='add'>+	.parent		= &amp;pll_clk,</div><div class='add'>+	.flags		= CLK_ENABLE_ON_INIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *main_clks[] = {</div><div class='add'>+	&amp;r_clk,</div><div class='add'>+	&amp;extal_clk,</div><div class='add'>+	&amp;pll_clk,</div><div class='add'>+	&amp;peripheral0_clk,</div><div class='add'>+	&amp;peripheral1_clk,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int div2[] = { 1, 2, 0, 4 };</div><div class='add'>+</div><div class='add'>+static struct clk_div_mult_table div4_div_mult_table = {</div><div class='add'>+	.divisors = div2,</div><div class='add'>+	.nr_divisors = ARRAY_SIZE(div2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_div4_table div4_table = {</div><div class='add'>+	.div_mult_table = &amp;div4_div_mult_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum { DIV4_I, DIV4_B,</div><div class='add'>+       DIV4_NR };</div><div class='add'>+</div><div class='add'>+#define DIV4(_reg, _bit, _mask, _flags) \</div><div class='add'>+  SH_CLK_DIV4(&amp;pll_clk, _reg, _bit, _mask, _flags)</div><div class='add'>+</div><div class='add'>+/* The mask field specifies the div2 entries that are valid */</div><div class='add'>+struct clk div4_clks[DIV4_NR] = {</div><div class='add'>+	[DIV4_I]  = DIV4(FRQCR, 8, 0xB, CLK_ENABLE_REG_16BIT</div><div class='add'>+					| CLK_ENABLE_ON_INIT),</div><div class='add'>+	[DIV4_B]  = DIV4(FRQCR, 4, 0xA, CLK_ENABLE_REG_16BIT</div><div class='add'>+					| CLK_ENABLE_ON_INIT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum { MSTP72,</div><div class='add'>+	MSTP60,</div><div class='add'>+	MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,</div><div class='add'>+	MSTP35, MSTP32, MSTP30,</div><div class='add'>+	MSTP_NR };</div><div class='add'>+</div><div class='add'>+static struct clk mstp_clks[MSTP_NR] = {</div><div class='add'>+	[MSTP72] = SH_CLK_MSTP8(&amp;peripheral0_clk, STBCR7, 2, 0), /* CMT */</div><div class='add'>+	[MSTP60] = SH_CLK_MSTP8(&amp;peripheral1_clk, STBCR6, 0, 0), /* USB */</div><div class='add'>+	[MSTP47] = SH_CLK_MSTP8(&amp;peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */</div><div class='add'>+	[MSTP46] = SH_CLK_MSTP8(&amp;peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */</div><div class='add'>+	[MSTP45] = SH_CLK_MSTP8(&amp;peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */</div><div class='add'>+	[MSTP44] = SH_CLK_MSTP8(&amp;peripheral1_clk, STBCR4, 4, 0), /* SCIF3 */</div><div class='add'>+	[MSTP43] = SH_CLK_MSTP8(&amp;peripheral1_clk, STBCR4, 3, 0), /* SCIF4 */</div><div class='add'>+	[MSTP42] = SH_CLK_MSTP8(&amp;peripheral1_clk, STBCR4, 2, 0), /* SCIF5 */</div><div class='add'>+	[MSTP41] = SH_CLK_MSTP8(&amp;peripheral1_clk, STBCR4, 1, 0), /* SCIF6 */</div><div class='add'>+	[MSTP40] = SH_CLK_MSTP8(&amp;peripheral1_clk, STBCR4, 0, 0), /* SCIF7 */</div><div class='add'>+	[MSTP35] = SH_CLK_MSTP8(&amp;peripheral0_clk, STBCR3, 5, 0), /* MTU2 */</div><div class='add'>+	[MSTP32] = SH_CLK_MSTP8(&amp;peripheral1_clk, STBCR3, 2, 0), /* ADC */</div><div class='add'>+	[MSTP30] = SH_CLK_MSTP8(&amp;r_clk, STBCR3, 0, 0), /* RTC */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup lookups[] = {</div><div class='add'>+	/* main clocks */</div><div class='add'>+	CLKDEV_CON_ID("rclk", &amp;r_clk),</div><div class='add'>+	CLKDEV_CON_ID("extal", &amp;extal_clk),</div><div class='add'>+	CLKDEV_CON_ID("pll_clk", &amp;pll_clk),</div><div class='add'>+	CLKDEV_CON_ID("peripheral_clk", &amp;peripheral1_clk),</div><div class='add'>+</div><div class='add'>+	/* DIV4 clocks */</div><div class='add'>+	CLKDEV_CON_ID("cpu_clk", &amp;div4_clks[DIV4_I]),</div><div class='add'>+	CLKDEV_CON_ID("bus_clk", &amp;div4_clks[DIV4_B]),</div><div class='add'>+</div><div class='add'>+	/* MSTP clocks */</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &amp;mstp_clks[MSTP47]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &amp;mstp_clks[MSTP46]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &amp;mstp_clks[MSTP45]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &amp;mstp_clks[MSTP44]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &amp;mstp_clks[MSTP43]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &amp;mstp_clks[MSTP42]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &amp;mstp_clks[MSTP41]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &amp;mstp_clks[MSTP40]),</div><div class='add'>+	CLKDEV_CON_ID("cmt_fck", &amp;mstp_clks[MSTP72]),</div><div class='add'>+	CLKDEV_CON_ID("usb0", &amp;mstp_clks[MSTP60]),</div><div class='add'>+	CLKDEV_CON_ID("mtu2_fck", &amp;mstp_clks[MSTP35]),</div><div class='add'>+	CLKDEV_CON_ID("adc0", &amp;mstp_clks[MSTP32]),</div><div class='add'>+	CLKDEV_CON_ID("rtc0", &amp;mstp_clks[MSTP30]),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __init arch_clk_init(void)</div><div class='add'>+{</div><div class='add'>+	int k, ret = 0;</div><div class='add'>+</div><div class='add'>+	for (k = 0; !ret &amp;&amp; (k &lt; ARRAY_SIZE(main_clks)); k++)</div><div class='add'>+		ret = clk_register(main_clks[k]);</div><div class='add'>+</div><div class='add'>+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &amp;div4_table);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c<br/>new file mode 100644<br/>index 000000000000..b055b55d6f27<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c</a></div><div class='hunk'>@@ -0,0 +1,2136 @@</div><div class='add'>+/*</div><div class='add'>+ * SH7264 Pinmux</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012  Renesas Electronics Europe Ltd</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;cpu/sh7264.h&gt;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	PINMUX_RESERVED = 0,</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA_BEGIN,</div><div class='add'>+	/* Port A */</div><div class='add'>+	PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,</div><div class='add'>+	/* Port B */</div><div class='add'>+	PB22_DATA, PB21_DATA, PB20_DATA,</div><div class='add'>+	PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA,</div><div class='add'>+	PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,</div><div class='add'>+	PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,</div><div class='add'>+	PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,</div><div class='add'>+	PB3_DATA, PB2_DATA, PB1_DATA,</div><div class='add'>+	/* Port C */</div><div class='add'>+	PC10_DATA, PC9_DATA, PC8_DATA,</div><div class='add'>+	PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,</div><div class='add'>+	PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,</div><div class='add'>+	/* Port D */</div><div class='add'>+	PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,</div><div class='add'>+	PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,</div><div class='add'>+	PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,</div><div class='add'>+	PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,</div><div class='add'>+	/* Port E */</div><div class='add'>+	PE5_DATA, PE4_DATA,</div><div class='add'>+	PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,</div><div class='add'>+	/* Port F */</div><div class='add'>+	PF12_DATA,</div><div class='add'>+	PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,</div><div class='add'>+	PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,</div><div class='add'>+	PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,</div><div class='add'>+	/* Port G */</div><div class='add'>+	PG24_DATA,</div><div class='add'>+	PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,</div><div class='add'>+	PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA,</div><div class='add'>+	PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,</div><div class='add'>+	PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,</div><div class='add'>+	PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,</div><div class='add'>+	PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,</div><div class='add'>+	/* Port H */</div><div class='add'>+	/* NOTE - Port H does not have a Data Register, but PH Data is</div><div class='add'>+	   connected to PH Port Register */</div><div class='add'>+	PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,</div><div class='add'>+	PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+	/* Port J */</div><div class='add'>+	PJ12_DATA,</div><div class='add'>+	PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,</div><div class='add'>+	PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,</div><div class='add'>+	PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA,</div><div class='add'>+	/* Port K */</div><div class='add'>+	PK12_DATA,</div><div class='add'>+	PK11_DATA, PK10_DATA, PK9_DATA, PK8_DATA,</div><div class='add'>+	PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,</div><div class='add'>+	PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA,</div><div class='add'>+	PINMUX_DATA_END,</div><div class='add'>+</div><div class='add'>+	PINMUX_INPUT_BEGIN,</div><div class='add'>+	FORCE_IN,</div><div class='add'>+	/* Port A */</div><div class='add'>+	PA3_IN, PA2_IN, PA1_IN, PA0_IN,</div><div class='add'>+	/* Port B */</div><div class='add'>+	PB22_IN, PB21_IN, PB20_IN,</div><div class='add'>+	PB19_IN, PB18_IN, PB17_IN, PB16_IN,</div><div class='add'>+	PB15_IN, PB14_IN, PB13_IN, PB12_IN,</div><div class='add'>+	PB11_IN, PB10_IN, PB9_IN, PB8_IN,</div><div class='add'>+	PB7_IN, PB6_IN, PB5_IN, PB4_IN,</div><div class='add'>+	PB3_IN, PB2_IN, PB1_IN,</div><div class='add'>+	/* Port C */</div><div class='add'>+	PC10_IN, PC9_IN, PC8_IN,</div><div class='add'>+	PC7_IN, PC6_IN, PC5_IN, PC4_IN,</div><div class='add'>+	PC3_IN, PC2_IN, PC1_IN, PC0_IN,</div><div class='add'>+	/* Port D */</div><div class='add'>+	PD15_IN, PD14_IN, PD13_IN, PD12_IN,</div><div class='add'>+	PD11_IN, PD10_IN, PD9_IN, PD8_IN,</div><div class='add'>+	PD7_IN, PD6_IN, PD5_IN, PD4_IN,</div><div class='add'>+	PD3_IN, PD2_IN, PD1_IN, PD0_IN,</div><div class='add'>+	/* Port E */</div><div class='add'>+	PE5_IN, PE4_IN,</div><div class='add'>+	PE3_IN, PE2_IN, PE1_IN, PE0_IN,</div><div class='add'>+	/* Port F */</div><div class='add'>+	PF12_IN,</div><div class='add'>+	PF11_IN, PF10_IN, PF9_IN, PF8_IN,</div><div class='add'>+	PF7_IN, PF6_IN, PF5_IN, PF4_IN,</div><div class='add'>+	PF3_IN, PF2_IN, PF1_IN, PF0_IN,</div><div class='add'>+	/* Port G */</div><div class='add'>+	PG24_IN,</div><div class='add'>+	PG23_IN, PG22_IN, PG21_IN, PG20_IN,</div><div class='add'>+	PG19_IN, PG18_IN, PG17_IN, PG16_IN,</div><div class='add'>+	PG15_IN, PG14_IN, PG13_IN, PG12_IN,</div><div class='add'>+	PG11_IN, PG10_IN, PG9_IN, PG8_IN,</div><div class='add'>+	PG7_IN, PG6_IN, PG5_IN, PG4_IN,</div><div class='add'>+	PG3_IN, PG2_IN, PG1_IN, PG0_IN,</div><div class='add'>+	/* Port H - Port H does not have a Data Register */</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+	/* Port J */</div><div class='add'>+	PJ12_IN,</div><div class='add'>+	PJ11_IN, PJ10_IN, PJ9_IN, PJ8_IN,</div><div class='add'>+	PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,</div><div class='add'>+	PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN,</div><div class='add'>+	/* Port K */</div><div class='add'>+	PK12_IN,</div><div class='add'>+	PK11_IN, PK10_IN, PK9_IN, PK8_IN,</div><div class='add'>+	PK7_IN, PK6_IN, PK5_IN, PK4_IN,</div><div class='add'>+	PK3_IN, PK2_IN, PK1_IN, PK0_IN,</div><div class='add'>+	PINMUX_INPUT_END,</div><div class='add'>+</div><div class='add'>+	PINMUX_OUTPUT_BEGIN,</div><div class='add'>+	FORCE_OUT,</div><div class='add'>+	/* Port A */</div><div class='add'>+	PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,</div><div class='add'>+	/* Port B */</div><div class='add'>+	PB22_OUT, PB21_OUT, PB20_OUT,</div><div class='add'>+	PB19_OUT, PB18_OUT, PB17_OUT, PB16_OUT,</div><div class='add'>+	PB15_OUT, PB14_OUT, PB13_OUT, PB12_OUT,</div><div class='add'>+	PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,</div><div class='add'>+	PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,</div><div class='add'>+	PB3_OUT, PB2_OUT, PB1_OUT,</div><div class='add'>+	/* Port C */</div><div class='add'>+	PC10_OUT, PC9_OUT, PC8_OUT,</div><div class='add'>+	PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,</div><div class='add'>+	PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,</div><div class='add'>+	/* Port D */</div><div class='add'>+	PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,</div><div class='add'>+	PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,</div><div class='add'>+	PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,</div><div class='add'>+	PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,</div><div class='add'>+	/* Port E */</div><div class='add'>+	PE5_OUT, PE4_OUT,</div><div class='add'>+	PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,</div><div class='add'>+	/* Port F */</div><div class='add'>+	PF12_OUT,</div><div class='add'>+	PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,</div><div class='add'>+	PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,</div><div class='add'>+	PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,</div><div class='add'>+	/* Port G */</div><div class='add'>+	PG24_OUT,</div><div class='add'>+	PG23_OUT, PG22_OUT, PG21_OUT, PG20_OUT,</div><div class='add'>+	PG19_OUT, PG18_OUT, PG17_OUT, PG16_OUT,</div><div class='add'>+	PG15_OUT, PG14_OUT, PG13_OUT, PG12_OUT,</div><div class='add'>+	PG11_OUT, PG10_OUT, PG9_OUT, PG8_OUT,</div><div class='add'>+	PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,</div><div class='add'>+	PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,</div><div class='add'>+	/* Port H - Port H does not have a Data Register */</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+	/* Port J */</div><div class='add'>+	PJ12_OUT,</div><div class='add'>+	PJ11_OUT, PJ10_OUT, PJ9_OUT, PJ8_OUT,</div><div class='add'>+	PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,</div><div class='add'>+	PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT,</div><div class='add'>+	/* Port K */</div><div class='add'>+	PK12_OUT,</div><div class='add'>+	PK11_OUT, PK10_OUT, PK9_OUT, PK8_OUT,</div><div class='add'>+	PK7_OUT, PK6_OUT, PK5_OUT, PK4_OUT,</div><div class='add'>+	PK3_OUT, PK2_OUT, PK1_OUT, PK0_OUT,</div><div class='add'>+	PINMUX_OUTPUT_END,</div><div class='add'>+</div><div class='add'>+	PINMUX_FUNCTION_BEGIN,</div><div class='add'>+	/* Port A */</div><div class='add'>+	PA3_IOR_IN, PA3_IOR_OUT,</div><div class='add'>+	PA2_IOR_IN, PA2_IOR_OUT,</div><div class='add'>+	PA1_IOR_IN, PA1_IOR_OUT,</div><div class='add'>+	PA0_IOR_IN, PA0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	/* Port B */</div><div class='add'>+	PB11_IOR_IN, PB11_IOR_OUT,</div><div class='add'>+	PB10_IOR_IN, PB10_IOR_OUT,</div><div class='add'>+	PB9_IOR_IN, PB9_IOR_OUT,</div><div class='add'>+	PB8_IOR_IN, PB8_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PB22MD_00, PB22MD_01, PB22MD_10,</div><div class='add'>+	PB21MD_0, PB21MD_1,</div><div class='add'>+	PB20MD_0, PB20MD_1,</div><div class='add'>+	PB19MD_00, PB19MD_01, PB19MD_10, PB19MD_11,</div><div class='add'>+	PB18MD_00, PB18MD_01, PB18MD_10, PB18MD_11,</div><div class='add'>+	PB17MD_00, PB17MD_01, PB17MD_10, PB17MD_11,</div><div class='add'>+	PB16MD_00, PB16MD_01, PB16MD_10, PB16MD_11,</div><div class='add'>+	PB15MD_00, PB15MD_01, PB15MD_10, PB15MD_11,</div><div class='add'>+	PB14MD_00, PB14MD_01, PB14MD_10, PB14MD_11,</div><div class='add'>+	PB13MD_00, PB13MD_01, PB13MD_10, PB13MD_11,</div><div class='add'>+	PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,</div><div class='add'>+	PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11,</div><div class='add'>+	PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11,</div><div class='add'>+	PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11,</div><div class='add'>+	PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11,</div><div class='add'>+	PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,</div><div class='add'>+	PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,</div><div class='add'>+	PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,</div><div class='add'>+	PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,</div><div class='add'>+	PB3MD_0, PB3MD_1,</div><div class='add'>+	PB2MD_0, PB2MD_1,</div><div class='add'>+	PB1MD_0, PB1MD_1,</div><div class='add'>+</div><div class='add'>+	/* Port C */</div><div class='add'>+	PC14_IOR_IN, PC14_IOR_OUT,</div><div class='add'>+	PC13_IOR_IN, PC13_IOR_OUT,</div><div class='add'>+	PC12_IOR_IN, PC12_IOR_OUT,</div><div class='add'>+	PC11_IOR_IN, PC11_IOR_OUT,</div><div class='add'>+	PC10_IOR_IN, PC10_IOR_OUT,</div><div class='add'>+	PC9_IOR_IN, PC9_IOR_OUT,</div><div class='add'>+	PC8_IOR_IN, PC8_IOR_OUT,</div><div class='add'>+	PC7_IOR_IN, PC7_IOR_OUT,</div><div class='add'>+	PC6_IOR_IN, PC6_IOR_OUT,</div><div class='add'>+	PC5_IOR_IN, PC5_IOR_OUT,</div><div class='add'>+	PC4_IOR_IN, PC4_IOR_OUT,</div><div class='add'>+	PC3_IOR_IN, PC3_IOR_OUT,</div><div class='add'>+	PC2_IOR_IN, PC2_IOR_OUT,</div><div class='add'>+	PC1_IOR_IN, PC1_IOR_OUT,</div><div class='add'>+	PC0_IOR_IN, PC0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PC10MD_0, PC10MD_1,</div><div class='add'>+	PC9MD_0, PC9MD_1,</div><div class='add'>+	PC8MD_00, PC8MD_01, PC8MD_10, PC8MD_11,</div><div class='add'>+	PC7MD_00, PC7MD_01, PC7MD_10, PC7MD_11,</div><div class='add'>+	PC6MD_00, PC6MD_01, PC6MD_10, PC6MD_11,</div><div class='add'>+	PC5MD_00, PC5MD_01, PC5MD_10, PC5MD_11,</div><div class='add'>+	PC4MD_0, PC4MD_1,</div><div class='add'>+	PC3MD_0, PC3MD_1,</div><div class='add'>+	PC2MD_0, PC2MD_1,</div><div class='add'>+	PC1MD_0, PC1MD_1,</div><div class='add'>+	PC0MD_0, PC0MD_1,</div><div class='add'>+</div><div class='add'>+	/* Port D */</div><div class='add'>+	PD15_IOR_IN, PD15_IOR_OUT,</div><div class='add'>+	PD14_IOR_IN, PD14_IOR_OUT,</div><div class='add'>+	PD13_IOR_IN, PD13_IOR_OUT,</div><div class='add'>+	PD12_IOR_IN, PD12_IOR_OUT,</div><div class='add'>+	PD11_IOR_IN, PD11_IOR_OUT,</div><div class='add'>+	PD10_IOR_IN, PD10_IOR_OUT,</div><div class='add'>+	PD9_IOR_IN, PD9_IOR_OUT,</div><div class='add'>+	PD8_IOR_IN, PD8_IOR_OUT,</div><div class='add'>+	PD7_IOR_IN, PD7_IOR_OUT,</div><div class='add'>+	PD6_IOR_IN, PD6_IOR_OUT,</div><div class='add'>+	PD5_IOR_IN, PD5_IOR_OUT,</div><div class='add'>+	PD4_IOR_IN, PD4_IOR_OUT,</div><div class='add'>+	PD3_IOR_IN, PD3_IOR_OUT,</div><div class='add'>+	PD2_IOR_IN, PD2_IOR_OUT,</div><div class='add'>+	PD1_IOR_IN, PD1_IOR_OUT,</div><div class='add'>+	PD0_IOR_IN, PD0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11,</div><div class='add'>+	PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11,</div><div class='add'>+	PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11,</div><div class='add'>+	PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11,</div><div class='add'>+	PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11,</div><div class='add'>+	PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11,</div><div class='add'>+	PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11,</div><div class='add'>+	PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11,</div><div class='add'>+	PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11,</div><div class='add'>+	PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11,</div><div class='add'>+	PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11,</div><div class='add'>+	PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11,</div><div class='add'>+	PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11,</div><div class='add'>+	PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11,</div><div class='add'>+	PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11,</div><div class='add'>+	PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11,</div><div class='add'>+</div><div class='add'>+	/* Port E */</div><div class='add'>+	PE5_IOR_IN, PE5_IOR_OUT,</div><div class='add'>+	PE4_IOR_IN, PE4_IOR_OUT,</div><div class='add'>+	PE3_IOR_IN, PE3_IOR_OUT,</div><div class='add'>+	PE2_IOR_IN, PE2_IOR_OUT,</div><div class='add'>+	PE1_IOR_IN, PE1_IOR_OUT,</div><div class='add'>+	PE0_IOR_IN, PE0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11,</div><div class='add'>+	PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11,</div><div class='add'>+	PE3MD_00, PE3MD_01, PE3MD_10, PE3MD_11,</div><div class='add'>+	PE2MD_00, PE2MD_01, PE2MD_10, PE2MD_11,</div><div class='add'>+	PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011,</div><div class='add'>+	PE1MD_100, PE1MD_101, PE1MD_110, PE1MD_111,</div><div class='add'>+	PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11,</div><div class='add'>+</div><div class='add'>+	/* Port F */</div><div class='add'>+	PF12_IOR_IN, PF12_IOR_OUT,</div><div class='add'>+	PF11_IOR_IN, PF11_IOR_OUT,</div><div class='add'>+	PF10_IOR_IN, PF10_IOR_OUT,</div><div class='add'>+	PF9_IOR_IN, PF9_IOR_OUT,</div><div class='add'>+	PF8_IOR_IN, PF8_IOR_OUT,</div><div class='add'>+	PF7_IOR_IN, PF7_IOR_OUT,</div><div class='add'>+	PF6_IOR_IN, PF6_IOR_OUT,</div><div class='add'>+	PF5_IOR_IN, PF5_IOR_OUT,</div><div class='add'>+	PF4_IOR_IN, PF4_IOR_OUT,</div><div class='add'>+	PF3_IOR_IN, PF3_IOR_OUT,</div><div class='add'>+	PF2_IOR_IN, PF2_IOR_OUT,</div><div class='add'>+	PF1_IOR_IN, PF1_IOR_OUT,</div><div class='add'>+	PF0_IOR_IN, PF0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PF12MD_000, PF12MD_001, PF12MD_010, PF12MD_011,</div><div class='add'>+	PF12MD_100, PF12MD_101, PF12MD_110, PF12MD_111,</div><div class='add'>+	PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011,</div><div class='add'>+	PF11MD_100, PF11MD_101, PF11MD_110, PF11MD_111,</div><div class='add'>+	PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011,</div><div class='add'>+	PF10MD_100, PF10MD_101, PF10MD_110, PF10MD_111,</div><div class='add'>+	PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011,</div><div class='add'>+	PF9MD_100, PF9MD_101, PF9MD_110, PF9MD_111,</div><div class='add'>+	PF8MD_00, PF8MD_01, PF8MD_10, PF8MD_11,</div><div class='add'>+	PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011,</div><div class='add'>+	PF7MD_100, PF7MD_101, PF7MD_110, PF7MD_111,</div><div class='add'>+	PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011,</div><div class='add'>+	PF6MD_100, PF6MD_101, PF6MD_110, PF6MD_111,</div><div class='add'>+	PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011,</div><div class='add'>+	PF5MD_100, PF5MD_101, PF5MD_110, PF5MD_111,</div><div class='add'>+	PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011,</div><div class='add'>+	PF4MD_100, PF4MD_101, PF4MD_110, PF4MD_111,</div><div class='add'>+	PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011,</div><div class='add'>+	PF3MD_100, PF3MD_101, PF3MD_110, PF3MD_111,</div><div class='add'>+	PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011,</div><div class='add'>+	PF2MD_100, PF2MD_101, PF2MD_110, PF2MD_111,</div><div class='add'>+	PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,</div><div class='add'>+	PF1MD_100, PF1MD_101, PF1MD_110, PF1MD_111,</div><div class='add'>+	PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011,</div><div class='add'>+	PF0MD_100, PF0MD_101, PF0MD_110, PF0MD_111,</div><div class='add'>+</div><div class='add'>+	/* Port G */</div><div class='add'>+	PG24_IOR_IN, PG24_IOR_OUT,</div><div class='add'>+	PG23_IOR_IN, PG23_IOR_OUT,</div><div class='add'>+	PG22_IOR_IN, PG22_IOR_OUT,</div><div class='add'>+	PG21_IOR_IN, PG21_IOR_OUT,</div><div class='add'>+	PG20_IOR_IN, PG20_IOR_OUT,</div><div class='add'>+	PG19_IOR_IN, PG19_IOR_OUT,</div><div class='add'>+	PG18_IOR_IN, PG18_IOR_OUT,</div><div class='add'>+	PG17_IOR_IN, PG17_IOR_OUT,</div><div class='add'>+	PG16_IOR_IN, PG16_IOR_OUT,</div><div class='add'>+	PG15_IOR_IN, PG15_IOR_OUT,</div><div class='add'>+	PG14_IOR_IN, PG14_IOR_OUT,</div><div class='add'>+	PG13_IOR_IN, PG13_IOR_OUT,</div><div class='add'>+	PG12_IOR_IN, PG12_IOR_OUT,</div><div class='add'>+	PG11_IOR_IN, PG11_IOR_OUT,</div><div class='add'>+	PG10_IOR_IN, PG10_IOR_OUT,</div><div class='add'>+	PG9_IOR_IN, PG9_IOR_OUT,</div><div class='add'>+	PG8_IOR_IN, PG8_IOR_OUT,</div><div class='add'>+	PG7_IOR_IN, PG7_IOR_OUT,</div><div class='add'>+	PG6_IOR_IN, PG6_IOR_OUT,</div><div class='add'>+	PG5_IOR_IN, PG5_IOR_OUT,</div><div class='add'>+	PG4_IOR_IN, PG4_IOR_OUT,</div><div class='add'>+	PG3_IOR_IN, PG3_IOR_OUT,</div><div class='add'>+	PG2_IOR_IN, PG2_IOR_OUT,</div><div class='add'>+	PG1_IOR_IN, PG1_IOR_OUT,</div><div class='add'>+	PG0_IOR_IN, PG0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11,</div><div class='add'>+	PG23MD_00, PG23MD_01, PG23MD_10, PG23MD_11,</div><div class='add'>+	PG22MD_00, PG22MD_01, PG22MD_10, PG22MD_11,</div><div class='add'>+	PG21MD_00, PG21MD_01, PG21MD_10, PG21MD_11,</div><div class='add'>+	PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011,</div><div class='add'>+	PG20MD_100, PG20MD_101, PG20MD_110, PG20MD_111,</div><div class='add'>+	PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011,</div><div class='add'>+	PG19MD_100, PG19MD_101, PG19MD_110, PG19MD_111,</div><div class='add'>+	PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011,</div><div class='add'>+	PG18MD_100, PG18MD_101, PG18MD_110, PG18MD_111,</div><div class='add'>+	PG17MD_000, PG17MD_001, PG17MD_010, PG17MD_011,</div><div class='add'>+	PG17MD_100, PG17MD_101, PG17MD_110, PG17MD_111,</div><div class='add'>+	PG16MD_000, PG16MD_001, PG16MD_010, PG16MD_011,</div><div class='add'>+	PG16MD_100, PG16MD_101, PG16MD_110, PG16MD_111,</div><div class='add'>+	PG15MD_000, PG15MD_001, PG15MD_010, PG15MD_011,</div><div class='add'>+	PG15MD_100, PG15MD_101, PG15MD_110, PG15MD_111,</div><div class='add'>+	PG14MD_000, PG14MD_001, PG14MD_010, PG14MD_011,</div><div class='add'>+	PG14MD_100, PG14MD_101, PG14MD_110, PG14MD_111,</div><div class='add'>+	PG13MD_000, PG13MD_001, PG13MD_010, PG13MD_011,</div><div class='add'>+	PG13MD_100, PG13MD_101, PG13MD_110, PG13MD_111,</div><div class='add'>+	PG12MD_000, PG12MD_001, PG12MD_010, PG12MD_011,</div><div class='add'>+	PG12MD_100, PG12MD_101, PG12MD_110, PG12MD_111,</div><div class='add'>+	PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011,</div><div class='add'>+	PG11MD_100, PG11MD_101, PG11MD_110, PG11MD_111,</div><div class='add'>+	PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011,</div><div class='add'>+	PG10MD_100, PG10MD_101, PG10MD_110, PG10MD_111,</div><div class='add'>+	PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011,</div><div class='add'>+	PG9MD_100, PG9MD_101, PG9MD_110, PG9MD_111,</div><div class='add'>+	PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011,</div><div class='add'>+	PG8MD_100, PG8MD_101, PG8MD_110, PG8MD_111,</div><div class='add'>+	PG7MD_00, PG7MD_01, PG7MD_10, PG7MD_11,</div><div class='add'>+	PG6MD_00, PG6MD_01, PG6MD_10, PG6MD_11,</div><div class='add'>+	PG5MD_00, PG5MD_01, PG5MD_10, PG5MD_11,</div><div class='add'>+	PG4MD_00, PG4MD_01, PG4MD_10, PG4MD_11,</div><div class='add'>+	PG3MD_00, PG3MD_01, PG3MD_10, PG3MD_11,</div><div class='add'>+	PG2MD_00, PG2MD_01, PG2MD_10, PG2MD_11,</div><div class='add'>+	PG1MD_00, PG1MD_01, PG1MD_10, PG1MD_11,</div><div class='add'>+	PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011,</div><div class='add'>+	PG0MD_100, PG0MD_101, PG0MD_110, PG0MD_111,</div><div class='add'>+</div><div class='add'>+	/* Port H */</div><div class='add'>+	PH7MD_0, PH7MD_1,</div><div class='add'>+	PH6MD_0, PH6MD_1,</div><div class='add'>+	PH5MD_0, PH5MD_1,</div><div class='add'>+	PH4MD_0, PH4MD_1,</div><div class='add'>+	PH3MD_0, PH3MD_1,</div><div class='add'>+	PH2MD_0, PH2MD_1,</div><div class='add'>+	PH1MD_0, PH1MD_1,</div><div class='add'>+	PH0MD_0, PH0MD_1,</div><div class='add'>+</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+</div><div class='add'>+	/* Port J */</div><div class='add'>+	PJ11_IOR_IN, PJ11_IOR_OUT,</div><div class='add'>+	PJ10_IOR_IN, PJ10_IOR_OUT,</div><div class='add'>+	PJ9_IOR_IN, PJ9_IOR_OUT,</div><div class='add'>+	PJ8_IOR_IN, PJ8_IOR_OUT,</div><div class='add'>+	PJ7_IOR_IN, PJ7_IOR_OUT,</div><div class='add'>+	PJ6_IOR_IN, PJ6_IOR_OUT,</div><div class='add'>+	PJ5_IOR_IN, PJ5_IOR_OUT,</div><div class='add'>+	PJ4_IOR_IN, PJ4_IOR_OUT,</div><div class='add'>+	PJ3_IOR_IN, PJ3_IOR_OUT,</div><div class='add'>+	PJ2_IOR_IN, PJ2_IOR_OUT,</div><div class='add'>+	PJ1_IOR_IN, PJ1_IOR_OUT,</div><div class='add'>+	PJ0_IOR_IN, PJ0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PJ11MD_00, PJ11MD_01, PJ11MD_10, PJ11MD_11,</div><div class='add'>+	PJ10MD_00, PJ10MD_01, PJ10MD_10, PJ10MD_11,</div><div class='add'>+	PJ9MD_00, PJ9MD_01, PJ9MD_10, PJ9MD_11,</div><div class='add'>+	PJ8MD_00, PJ8MD_01, PJ8MD_10, PJ8MD_11,</div><div class='add'>+	PJ7MD_00, PJ7MD_01, PJ7MD_10, PJ7MD_11,</div><div class='add'>+	PJ6MD_00, PJ6MD_01, PJ6MD_10, PJ6MD_11,</div><div class='add'>+	PJ5MD_00, PJ5MD_01, PJ5MD_10, PJ5MD_11,</div><div class='add'>+	PJ4MD_00, PJ4MD_01, PJ4MD_10, PJ4MD_11,</div><div class='add'>+	PJ3MD_00, PJ3MD_01, PJ3MD_10, PJ3MD_11,</div><div class='add'>+	PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011,</div><div class='add'>+	PJ2MD_100, PJ2MD_101, PJ2MD_110, PJ2MD_111,</div><div class='add'>+	PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011,</div><div class='add'>+	PJ1MD_100, PJ1MD_101, PJ1MD_110, PJ1MD_111,</div><div class='add'>+	PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011,</div><div class='add'>+	PJ0MD_100, PJ0MD_101, PJ0MD_110, PJ0MD_111,</div><div class='add'>+</div><div class='add'>+	/* Port K */</div><div class='add'>+	PK11_IOR_IN, PK11_IOR_OUT,</div><div class='add'>+	PK10_IOR_IN, PK10_IOR_OUT,</div><div class='add'>+	PK9_IOR_IN, PK9_IOR_OUT,</div><div class='add'>+	PK8_IOR_IN, PK8_IOR_OUT,</div><div class='add'>+	PK7_IOR_IN, PK7_IOR_OUT,</div><div class='add'>+	PK6_IOR_IN, PK6_IOR_OUT,</div><div class='add'>+	PK5_IOR_IN, PK5_IOR_OUT,</div><div class='add'>+	PK4_IOR_IN, PK4_IOR_OUT,</div><div class='add'>+	PK3_IOR_IN, PK3_IOR_OUT,</div><div class='add'>+	PK2_IOR_IN, PK2_IOR_OUT,</div><div class='add'>+	PK1_IOR_IN, PK1_IOR_OUT,</div><div class='add'>+	PK0_IOR_IN, PK0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PK11MD_00, PK11MD_01, PK11MD_10, PK11MD_11,</div><div class='add'>+	PK10MD_00, PK10MD_01, PK10MD_10, PK10MD_11,</div><div class='add'>+	PK9MD_00, PK9MD_01, PK9MD_10, PK9MD_11,</div><div class='add'>+	PK8MD_00, PK8MD_01, PK8MD_10, PK8MD_11,</div><div class='add'>+	PK7MD_00, PK7MD_01, PK7MD_10, PK7MD_11,</div><div class='add'>+	PK6MD_00, PK6MD_01, PK6MD_10, PK6MD_11,</div><div class='add'>+	PK5MD_00, PK5MD_01, PK5MD_10, PK5MD_11,</div><div class='add'>+	PK4MD_00, PK4MD_01, PK4MD_10, PK4MD_11,</div><div class='add'>+	PK3MD_00, PK3MD_01, PK3MD_10, PK3MD_11,</div><div class='add'>+	PK2MD_00, PK2MD_01, PK2MD_10, PK2MD_11,</div><div class='add'>+	PK1MD_00, PK1MD_01, PK1MD_10, PK1MD_11,</div><div class='add'>+	PK0MD_00, PK0MD_01, PK0MD_10, PK0MD_11,</div><div class='add'>+	PINMUX_FUNCTION_END,</div><div class='add'>+</div><div class='add'>+	PINMUX_MARK_BEGIN,</div><div class='add'>+	/* Port A */</div><div class='add'>+</div><div class='add'>+	/* Port B */</div><div class='add'>+</div><div class='add'>+	/* Port C */</div><div class='add'>+</div><div class='add'>+	/* Port D */</div><div class='add'>+</div><div class='add'>+	/* Port E */</div><div class='add'>+</div><div class='add'>+	/* Port F */</div><div class='add'>+</div><div class='add'>+	/* Port G */</div><div class='add'>+</div><div class='add'>+	/* Port H */</div><div class='add'>+	PHAN7_MARK, PHAN6_MARK, PHAN5_MARK, PHAN4_MARK,</div><div class='add'>+	PHAN3_MARK, PHAN2_MARK, PHAN1_MARK, PHAN0_MARK,</div><div class='add'>+</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+</div><div class='add'>+	/* Port J */</div><div class='add'>+</div><div class='add'>+	/* Port K */</div><div class='add'>+</div><div class='add'>+	IRQ7_PC_MARK, IRQ6_PC_MARK, IRQ5_PC_MARK, IRQ4_PC_MARK,</div><div class='add'>+	IRQ3_PG_MARK, IRQ2_PG_MARK, IRQ1_PJ_MARK, IRQ0_PJ_MARK,</div><div class='add'>+	IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK,</div><div class='add'>+</div><div class='add'>+	PINT7_PG_MARK, PINT6_PG_MARK, PINT5_PG_MARK, PINT4_PG_MARK,</div><div class='add'>+	PINT3_PG_MARK, PINT2_PG_MARK, PINT1_PG_MARK, PINT0_PG_MARK,</div><div class='add'>+</div><div class='add'>+	SD_CD_MARK, SD_D0_MARK, SD_D1_MARK, SD_D2_MARK, SD_D3_MARK,</div><div class='add'>+	SD_WP_MARK, SD_CLK_MARK, SD_CMD_MARK,</div><div class='add'>+	CRX0_MARK, CRX1_MARK,</div><div class='add'>+	CTX0_MARK, CTX1_MARK,</div><div class='add'>+</div><div class='add'>+	PWM1A_MARK, PWM1B_MARK, PWM1C_MARK, PWM1D_MARK,</div><div class='add'>+	PWM1E_MARK, PWM1F_MARK, PWM1G_MARK, PWM1H_MARK,</div><div class='add'>+	PWM2A_MARK, PWM2B_MARK, PWM2C_MARK, PWM2D_MARK,</div><div class='add'>+	PWM2E_MARK, PWM2F_MARK, PWM2G_MARK, PWM2H_MARK,</div><div class='add'>+	IERXD_MARK, IETXD_MARK,</div><div class='add'>+	CRX0CRX1_MARK,</div><div class='add'>+	WDTOVF_MARK,</div><div class='add'>+</div><div class='add'>+	CRX0X1_MARK,</div><div class='add'>+</div><div class='add'>+	/* DMAC */</div><div class='add'>+	TEND0_MARK, DACK0_MARK, DREQ0_MARK,</div><div class='add'>+	TEND1_MARK, DACK1_MARK, DREQ1_MARK,</div><div class='add'>+</div><div class='add'>+	/* ADC */</div><div class='add'>+	ADTRG_MARK,</div><div class='add'>+</div><div class='add'>+	/* BSC */</div><div class='add'>+	A25_MARK, A24_MARK,</div><div class='add'>+	A23_MARK, A22_MARK, A21_MARK, A20_MARK,</div><div class='add'>+	A19_MARK, A18_MARK, A17_MARK, A16_MARK,</div><div class='add'>+	A15_MARK, A14_MARK, A13_MARK, A12_MARK,</div><div class='add'>+	A11_MARK, A10_MARK, A9_MARK, A8_MARK,</div><div class='add'>+	A7_MARK, A6_MARK, A5_MARK, A4_MARK,</div><div class='add'>+	A3_MARK, A2_MARK, A1_MARK, A0_MARK,</div><div class='add'>+	D15_MARK, D14_MARK, D13_MARK, D12_MARK,</div><div class='add'>+	D11_MARK, D10_MARK, D9_MARK, D8_MARK,</div><div class='add'>+	D7_MARK, D6_MARK, D5_MARK, D4_MARK,</div><div class='add'>+	D3_MARK, D2_MARK, D1_MARK, D0_MARK,</div><div class='add'>+	BS_MARK,</div><div class='add'>+	CS4_MARK, CS3_MARK, CS2_MARK, CS1_MARK, CS0_MARK,</div><div class='add'>+	CS6CE1B_MARK, CS5CE1A_MARK,</div><div class='add'>+	CE2A_MARK, CE2B_MARK,</div><div class='add'>+	RD_MARK, RDWR_MARK,</div><div class='add'>+	ICIOWRAH_MARK,</div><div class='add'>+	ICIORD_MARK,</div><div class='add'>+	WE1DQMUWE_MARK,</div><div class='add'>+	WE0DQML_MARK,</div><div class='add'>+	RAS_MARK, CAS_MARK, CKE_MARK,</div><div class='add'>+	WAIT_MARK, BREQ_MARK, BACK_MARK, IOIS16_MARK,</div><div class='add'>+</div><div class='add'>+	/* TMU */</div><div class='add'>+	TIOC0A_MARK, TIOC0B_MARK, TIOC0C_MARK, TIOC0D_MARK,</div><div class='add'>+	TIOC1A_MARK, TIOC1B_MARK,</div><div class='add'>+	TIOC2A_MARK, TIOC2B_MARK,</div><div class='add'>+	TIOC3A_MARK, TIOC3B_MARK, TIOC3C_MARK, TIOC3D_MARK,</div><div class='add'>+	TIOC4A_MARK, TIOC4B_MARK, TIOC4C_MARK, TIOC4D_MARK,</div><div class='add'>+	TCLKA_MARK,	TCLKB_MARK, TCLKC_MARK, TCLKD_MARK,</div><div class='add'>+</div><div class='add'>+	/* SCIF */</div><div class='add'>+	SCK0_MARK, SCK1_MARK, SCK2_MARK, SCK3_MARK,</div><div class='add'>+	RXD0_MARK, RXD1_MARK, RXD2_MARK, RXD3_MARK,</div><div class='add'>+	TXD0_MARK, TXD1_MARK, TXD2_MARK, TXD3_MARK,</div><div class='add'>+	RXD4_MARK, RXD5_MARK, RXD6_MARK, RXD7_MARK,</div><div class='add'>+	TXD4_MARK, TXD5_MARK, TXD6_MARK, TXD7_MARK,</div><div class='add'>+	RTS1_MARK, RTS3_MARK,</div><div class='add'>+	CTS1_MARK, CTS3_MARK,</div><div class='add'>+</div><div class='add'>+	/* RSPI */</div><div class='add'>+	RSPCK0_MARK, RSPCK1_MARK,</div><div class='add'>+	MOSI0_MARK, MOSI1_MARK,</div><div class='add'>+	MISO0_PF12_MARK, MISO1_MARK, MISO1_PG19_MARK,</div><div class='add'>+	SSL00_MARK, SSL10_MARK,</div><div class='add'>+</div><div class='add'>+	/* IIC3 */</div><div class='add'>+	SCL0_MARK, SCL1_MARK, SCL2_MARK,</div><div class='add'>+	SDA0_MARK, SDA1_MARK, SDA2_MARK,</div><div class='add'>+</div><div class='add'>+	/* SSI */</div><div class='add'>+	SSISCK0_MARK,</div><div class='add'>+	SSIWS0_MARK,</div><div class='add'>+	SSITXD0_MARK,</div><div class='add'>+	SSIRXD0_MARK,</div><div class='add'>+	SSIWS1_MARK, SSIWS2_MARK, SSIWS3_MARK,</div><div class='add'>+	SSISCK1_MARK, SSISCK2_MARK, SSISCK3_MARK,</div><div class='add'>+	SSIDATA1_MARK, SSIDATA2_MARK, SSIDATA3_MARK,</div><div class='add'>+	AUDIO_CLK_MARK,</div><div class='add'>+</div><div class='add'>+	/* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */</div><div class='add'>+	SIOFTXD_MARK, SIOFRXD_MARK, SIOFSYNC_MARK, SIOFSCK_MARK,</div><div class='add'>+</div><div class='add'>+	/* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */</div><div class='add'>+	SPDIF_IN_MARK, SPDIF_OUT_MARK,</div><div class='add'>+</div><div class='add'>+	/* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */</div><div class='add'>+	FCE_MARK,</div><div class='add'>+	FRB_MARK,</div><div class='add'>+</div><div class='add'>+	/* VDC3 */</div><div class='add'>+	DV_CLK_MARK,</div><div class='add'>+	DV_VSYNC_MARK, DV_HSYNC_MARK,</div><div class='add'>+	DV_DATA7_MARK, DV_DATA6_MARK, DV_DATA5_MARK, DV_DATA4_MARK,</div><div class='add'>+	DV_DATA3_MARK, DV_DATA2_MARK, DV_DATA1_MARK, DV_DATA0_MARK,</div><div class='add'>+	LCD_CLK_MARK, LCD_EXTCLK_MARK,</div><div class='add'>+	LCD_VSYNC_MARK, LCD_HSYNC_MARK, LCD_DE_MARK,</div><div class='add'>+	LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,</div><div class='add'>+	LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,</div><div class='add'>+	LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,</div><div class='add'>+	LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,</div><div class='add'>+	LCD_M_DISP_MARK,</div><div class='add'>+	PINMUX_MARK_END,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static pinmux_enum_t pinmux_data[] = {</div><div class='add'>+</div><div class='add'>+	/* Port A */</div><div class='add'>+	PINMUX_DATA(PA3_DATA, PA3_IN),</div><div class='add'>+	PINMUX_DATA(PA2_DATA, PA2_IN),</div><div class='add'>+	PINMUX_DATA(PA1_DATA, PA1_IN),</div><div class='add'>+	PINMUX_DATA(PA0_DATA, PA0_IN),</div><div class='add'>+</div><div class='add'>+	/* Port B */</div><div class='add'>+	PINMUX_DATA(PB22_DATA, PB22MD_00, PB22_IN, PB22_OUT),</div><div class='add'>+	PINMUX_DATA(A22_MARK, PB22MD_01),</div><div class='add'>+	PINMUX_DATA(CS4_MARK, PB22MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PB21_DATA, PB21MD_0, PB21_IN, PB21_OUT),</div><div class='add'>+	PINMUX_DATA(A21_MARK, PB21MD_1),</div><div class='add'>+	PINMUX_DATA(A20_MARK, PB20MD_1),</div><div class='add'>+	PINMUX_DATA(A19_MARK, PB19MD_01),</div><div class='add'>+	PINMUX_DATA(A18_MARK, PB18MD_01),</div><div class='add'>+	PINMUX_DATA(A17_MARK, PB17MD_01),</div><div class='add'>+	PINMUX_DATA(A16_MARK, PB16MD_01),</div><div class='add'>+	PINMUX_DATA(A15_MARK, PB15MD_01),</div><div class='add'>+	PINMUX_DATA(A14_MARK, PB14MD_01),</div><div class='add'>+	PINMUX_DATA(A13_MARK, PB13MD_01),</div><div class='add'>+	PINMUX_DATA(A12_MARK, PB12MD_01),</div><div class='add'>+	PINMUX_DATA(A11_MARK, PB11MD_01),</div><div class='add'>+	PINMUX_DATA(A10_MARK, PB10MD_01),</div><div class='add'>+	PINMUX_DATA(A9_MARK, PB9MD_01),</div><div class='add'>+	PINMUX_DATA(A8_MARK, PB8MD_01),</div><div class='add'>+	PINMUX_DATA(A7_MARK, PB7MD_01),</div><div class='add'>+	PINMUX_DATA(A6_MARK, PB6MD_01),</div><div class='add'>+	PINMUX_DATA(A5_MARK, PB5MD_01),</div><div class='add'>+	PINMUX_DATA(A4_MARK, PB4MD_01),</div><div class='add'>+	PINMUX_DATA(A3_MARK, PB3MD_1),</div><div class='add'>+	PINMUX_DATA(A2_MARK, PB2MD_1),</div><div class='add'>+	PINMUX_DATA(A1_MARK, PB1MD_1),</div><div class='add'>+</div><div class='add'>+	/* Port C */</div><div class='add'>+	PINMUX_DATA(PC10_DATA, PC10MD_0),</div><div class='add'>+	PINMUX_DATA(TIOC2B_MARK, PC1MD_1),</div><div class='add'>+	PINMUX_DATA(PC9_DATA, PC9MD_0),</div><div class='add'>+	PINMUX_DATA(TIOC2A_MARK, PC9MD_1),</div><div class='add'>+	PINMUX_DATA(PC8_DATA, PC8MD_00),</div><div class='add'>+	PINMUX_DATA(CS3_MARK, PC8MD_01),</div><div class='add'>+	PINMUX_DATA(TIOC4D_MARK, PC8MD_10),</div><div class='add'>+	PINMUX_DATA(IRQ7_PC_MARK, PC8MD_11),</div><div class='add'>+	PINMUX_DATA(PC7_DATA, PC7MD_00),</div><div class='add'>+	PINMUX_DATA(CKE_MARK, PC7MD_01),</div><div class='add'>+	PINMUX_DATA(TIOC4C_MARK, PC7MD_10),</div><div class='add'>+	PINMUX_DATA(IRQ6_PC_MARK, PC7MD_11),</div><div class='add'>+	PINMUX_DATA(PC6_DATA, PC6MD_00),</div><div class='add'>+	PINMUX_DATA(CAS_MARK, PC6MD_01),</div><div class='add'>+	PINMUX_DATA(TIOC4B_MARK, PC6MD_10),</div><div class='add'>+	PINMUX_DATA(IRQ5_PC_MARK, PC6MD_11),</div><div class='add'>+	PINMUX_DATA(PC5_DATA, PC5MD_00),</div><div class='add'>+	PINMUX_DATA(RAS_MARK, PC5MD_01),</div><div class='add'>+	PINMUX_DATA(TIOC4A_MARK, PC5MD_10),</div><div class='add'>+	PINMUX_DATA(IRQ4_PC_MARK, PC5MD_11),</div><div class='add'>+	PINMUX_DATA(PC4_DATA, PC4MD_0),</div><div class='add'>+	PINMUX_DATA(WE1DQMUWE_MARK, PC4MD_1),</div><div class='add'>+	PINMUX_DATA(PC3_DATA, PC3MD_0),</div><div class='add'>+	PINMUX_DATA(WE0DQML_MARK, PC3MD_1),</div><div class='add'>+	PINMUX_DATA(PC2_DATA, PC2MD_0),</div><div class='add'>+	PINMUX_DATA(RDWR_MARK, PC2MD_1),</div><div class='add'>+	PINMUX_DATA(PC1_DATA, PC1MD_0),</div><div class='add'>+	PINMUX_DATA(RD_MARK, PC1MD_1),</div><div class='add'>+	PINMUX_DATA(PC0_DATA, PC0MD_0),</div><div class='add'>+	PINMUX_DATA(CS0_MARK, PC0MD_1),</div><div class='add'>+</div><div class='add'>+	/* Port D */</div><div class='add'>+	PINMUX_DATA(D15_MARK, PD15MD_01),</div><div class='add'>+	PINMUX_DATA(D14_MARK, PD14MD_01),</div><div class='add'>+	PINMUX_DATA(D13_MARK, PD13MD_01),</div><div class='add'>+	PINMUX_DATA(D12_MARK, PD12MD_01),</div><div class='add'>+	PINMUX_DATA(D11_MARK, PD11MD_01),</div><div class='add'>+	PINMUX_DATA(D10_MARK, PD10MD_01),</div><div class='add'>+	PINMUX_DATA(D9_MARK, PD9MD_01),</div><div class='add'>+	PINMUX_DATA(D8_MARK, PD8MD_01),</div><div class='add'>+	PINMUX_DATA(D7_MARK, PD7MD_01),</div><div class='add'>+	PINMUX_DATA(D6_MARK, PD6MD_01),</div><div class='add'>+	PINMUX_DATA(D5_MARK, PD5MD_01),</div><div class='add'>+	PINMUX_DATA(D4_MARK, PD4MD_01),</div><div class='add'>+	PINMUX_DATA(D3_MARK, PD3MD_01),</div><div class='add'>+	PINMUX_DATA(D2_MARK, PD2MD_01),</div><div class='add'>+	PINMUX_DATA(D1_MARK, PD1MD_01),</div><div class='add'>+	PINMUX_DATA(D0_MARK, PD0MD_01),</div><div class='add'>+</div><div class='add'>+	/* Port E */</div><div class='add'>+	PINMUX_DATA(PE5_DATA, PE5MD_00),</div><div class='add'>+	PINMUX_DATA(SDA2_MARK, PE5MD_01),</div><div class='add'>+	PINMUX_DATA(DV_HSYNC_MARK, PE5MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PE4_DATA, PE4MD_00),</div><div class='add'>+	PINMUX_DATA(SCL2_MARK, PE4MD_01),</div><div class='add'>+	PINMUX_DATA(DV_VSYNC_MARK, PE4MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PE3_DATA, PE3MD_00),</div><div class='add'>+	PINMUX_DATA(SDA1_MARK, PE3MD_01),</div><div class='add'>+	PINMUX_DATA(IRQ3_PE_MARK, PE3MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PE2_DATA, PE2MD_00),</div><div class='add'>+	PINMUX_DATA(SCL1_MARK, PE2MD_01),</div><div class='add'>+	PINMUX_DATA(IRQ2_PE_MARK, PE2MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PE1_DATA, PE1MD_000),</div><div class='add'>+	PINMUX_DATA(SDA0_MARK, PE1MD_001),</div><div class='add'>+	PINMUX_DATA(IOIS16_MARK, PE1MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ1_PE_MARK, PE1MD_011),</div><div class='add'>+	PINMUX_DATA(TCLKA_MARK, PE1MD_100),</div><div class='add'>+	PINMUX_DATA(ADTRG_MARK, PE1MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PE0_DATA, PE0MD_00),</div><div class='add'>+	PINMUX_DATA(SCL0_MARK, PE0MD_01),</div><div class='add'>+	PINMUX_DATA(AUDIO_CLK_MARK, PE0MD_10),</div><div class='add'>+	PINMUX_DATA(IRQ0_PE_MARK, PE0MD_11),</div><div class='add'>+</div><div class='add'>+	/* Port F */</div><div class='add'>+	PINMUX_DATA(PF12_DATA, PF12MD_000),</div><div class='add'>+	PINMUX_DATA(BS_MARK, PF12MD_001),</div><div class='add'>+	PINMUX_DATA(MISO0_PF12_MARK, PF12MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC3D_MARK, PF12MD_100),</div><div class='add'>+	PINMUX_DATA(SPDIF_OUT_MARK, PF12MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF11_DATA, PF11MD_000),</div><div class='add'>+	PINMUX_DATA(A25_MARK, PF11MD_001),</div><div class='add'>+	PINMUX_DATA(SSIDATA3_MARK, PF11MD_010),</div><div class='add'>+	PINMUX_DATA(MOSI0_MARK, PF11MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC3C_MARK, PF11MD_100),</div><div class='add'>+	PINMUX_DATA(SPDIF_IN_MARK, PF11MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF10_DATA, PF10MD_000),</div><div class='add'>+	PINMUX_DATA(A24_MARK, PF10MD_001),</div><div class='add'>+	PINMUX_DATA(SSIWS3_MARK, PF10MD_010),</div><div class='add'>+	PINMUX_DATA(SSL00_MARK, PF10MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC3B_MARK, PF10MD_100),</div><div class='add'>+	PINMUX_DATA(FCE_MARK, PF10MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF9_DATA, PF9MD_000),</div><div class='add'>+	PINMUX_DATA(A23_MARK, PF9MD_001),</div><div class='add'>+	PINMUX_DATA(SSISCK3_MARK, PF9MD_010),</div><div class='add'>+	PINMUX_DATA(RSPCK0_MARK, PF9MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC3A_MARK, PF9MD_100),</div><div class='add'>+	PINMUX_DATA(FRB_MARK, PF9MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF8_DATA, PF8MD_00),</div><div class='add'>+	PINMUX_DATA(CE2B_MARK, PF8MD_01),</div><div class='add'>+	PINMUX_DATA(SSIDATA3_MARK, PF8MD_10),</div><div class='add'>+	PINMUX_DATA(DV_CLK_MARK, PF8MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF7_DATA, PF7MD_000),</div><div class='add'>+	PINMUX_DATA(CE2A_MARK, PF7MD_001),</div><div class='add'>+	PINMUX_DATA(SSIWS3_MARK, PF7MD_010),</div><div class='add'>+	PINMUX_DATA(DV_DATA7_MARK, PF7MD_011),</div><div class='add'>+	PINMUX_DATA(TCLKD_MARK, PF7MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF6_DATA, PF6MD_000),</div><div class='add'>+	PINMUX_DATA(CS6CE1B_MARK, PF6MD_001),</div><div class='add'>+	PINMUX_DATA(SSISCK3_MARK, PF6MD_010),</div><div class='add'>+	PINMUX_DATA(DV_DATA6_MARK, PF6MD_011),</div><div class='add'>+	PINMUX_DATA(TCLKB_MARK, PF6MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF5_DATA, PF5MD_000),</div><div class='add'>+	PINMUX_DATA(CS5CE1A_MARK, PF5MD_001),</div><div class='add'>+	PINMUX_DATA(SSIDATA2_MARK, PF5MD_010),</div><div class='add'>+	PINMUX_DATA(DV_DATA5_MARK, PF5MD_011),</div><div class='add'>+	PINMUX_DATA(TCLKC_MARK, PF5MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF4_DATA, PF4MD_000),</div><div class='add'>+	PINMUX_DATA(ICIOWRAH_MARK, PF4MD_001),</div><div class='add'>+	PINMUX_DATA(SSIWS2_MARK, PF4MD_010),</div><div class='add'>+	PINMUX_DATA(DV_DATA4_MARK, PF4MD_011),</div><div class='add'>+	PINMUX_DATA(TXD3_MARK, PF4MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF3_DATA, PF3MD_000),</div><div class='add'>+	PINMUX_DATA(ICIORD_MARK, PF3MD_001),</div><div class='add'>+	PINMUX_DATA(SSISCK2_MARK, PF3MD_010),</div><div class='add'>+	PINMUX_DATA(DV_DATA3_MARK, PF3MD_011),</div><div class='add'>+	PINMUX_DATA(RXD3_MARK, PF3MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF2_DATA, PF2MD_000),</div><div class='add'>+	PINMUX_DATA(BACK_MARK, PF2MD_001),</div><div class='add'>+	PINMUX_DATA(SSIDATA1_MARK, PF2MD_010),</div><div class='add'>+	PINMUX_DATA(DV_DATA2_MARK, PF2MD_011),</div><div class='add'>+	PINMUX_DATA(TXD2_MARK, PF2MD_100),</div><div class='add'>+	PINMUX_DATA(DACK0_MARK, PF2MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF1_DATA, PF1MD_000),</div><div class='add'>+	PINMUX_DATA(BREQ_MARK, PF1MD_001),</div><div class='add'>+	PINMUX_DATA(SSIWS1_MARK, PF1MD_010),</div><div class='add'>+	PINMUX_DATA(DV_DATA1_MARK, PF1MD_011),</div><div class='add'>+	PINMUX_DATA(RXD2_MARK, PF1MD_100),</div><div class='add'>+	PINMUX_DATA(DREQ0_MARK, PF1MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF0_DATA, PF0MD_000),</div><div class='add'>+	PINMUX_DATA(WAIT_MARK, PF0MD_001),</div><div class='add'>+	PINMUX_DATA(SSISCK1_MARK, PF0MD_010),</div><div class='add'>+	PINMUX_DATA(DV_DATA0_MARK, PF0MD_011),</div><div class='add'>+	PINMUX_DATA(SCK2_MARK, PF0MD_100),</div><div class='add'>+	PINMUX_DATA(TEND0_MARK, PF0MD_101),</div><div class='add'>+</div><div class='add'>+	/* Port G */</div><div class='add'>+	PINMUX_DATA(PG24_DATA, PG24MD_00),</div><div class='add'>+	PINMUX_DATA(MOSI0_MARK, PG24MD_01),</div><div class='add'>+	PINMUX_DATA(TIOC0D_MARK, PG24MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG23_DATA, PG23MD_00),</div><div class='add'>+	PINMUX_DATA(MOSI1_MARK, PG23MD_01),</div><div class='add'>+	PINMUX_DATA(TIOC0C_MARK, PG23MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG22_DATA, PG22MD_00),</div><div class='add'>+	PINMUX_DATA(SSL10_MARK, PG22MD_01),</div><div class='add'>+	PINMUX_DATA(TIOC0B_MARK, PG22MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG21_DATA, PG21MD_00),</div><div class='add'>+	PINMUX_DATA(RSPCK1_MARK, PG21MD_01),</div><div class='add'>+	PINMUX_DATA(TIOC0A_MARK, PG21MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG20_DATA, PG20MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_EXTCLK_MARK, PG20MD_001),</div><div class='add'>+	PINMUX_DATA(MISO1_MARK, PG20MD_011),</div><div class='add'>+	PINMUX_DATA(TXD7_MARK, PG20MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG19_DATA, PG19MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_CLK_MARK, PG19MD_001),</div><div class='add'>+	PINMUX_DATA(TIOC2B_MARK, PG19MD_010),</div><div class='add'>+	PINMUX_DATA(MISO1_PG19_MARK, PG19MD_011),</div><div class='add'>+	PINMUX_DATA(RXD7_MARK, PG19MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG18_DATA, PG18MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_DE_MARK, PG18MD_001),</div><div class='add'>+	PINMUX_DATA(TIOC2A_MARK, PG18MD_010),</div><div class='add'>+	PINMUX_DATA(SSL10_MARK, PG18MD_011),</div><div class='add'>+	PINMUX_DATA(TXD6_MARK, PG18MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG17_DATA, PG17MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_HSYNC_MARK, PG17MD_001),</div><div class='add'>+	PINMUX_DATA(TIOC1B_MARK, PG17MD_010),</div><div class='add'>+	PINMUX_DATA(RSPCK1_MARK, PG17MD_011),</div><div class='add'>+	PINMUX_DATA(RXD6_MARK, PG17MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG16_DATA, PG16MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_VSYNC_MARK, PG16MD_001),</div><div class='add'>+	PINMUX_DATA(TIOC1A_MARK, PG16MD_010),</div><div class='add'>+	PINMUX_DATA(TXD3_MARK, PG16MD_011),</div><div class='add'>+	PINMUX_DATA(CTS1_MARK, PG16MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG15_DATA, PG15MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_DATA15_MARK, PG15MD_001),</div><div class='add'>+	PINMUX_DATA(TIOC0D_MARK, PG15MD_010),</div><div class='add'>+	PINMUX_DATA(RXD3_MARK, PG15MD_011),</div><div class='add'>+	PINMUX_DATA(RTS1_MARK, PG15MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG14_DATA, PG14MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_DATA14_MARK, PG14MD_001),</div><div class='add'>+	PINMUX_DATA(TIOC0C_MARK, PG14MD_010),</div><div class='add'>+	PINMUX_DATA(SCK1_MARK, PG14MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG13_DATA, PG13MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_DATA13_MARK, PG13MD_001),</div><div class='add'>+	PINMUX_DATA(TIOC0B_MARK, PG13MD_010),</div><div class='add'>+	PINMUX_DATA(TXD1_MARK, PG13MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG12_DATA, PG12MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_DATA12_MARK, PG12MD_001),</div><div class='add'>+	PINMUX_DATA(TIOC0A_MARK, PG12MD_010),</div><div class='add'>+	PINMUX_DATA(RXD1_MARK, PG12MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG11_DATA, PG11MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_DATA11_MARK, PG11MD_001),</div><div class='add'>+	PINMUX_DATA(SSITXD0_MARK, PG11MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ3_PG_MARK, PG11MD_011),</div><div class='add'>+	PINMUX_DATA(TXD5_MARK, PG11MD_100),</div><div class='add'>+	PINMUX_DATA(SIOFTXD_MARK, PG11MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG10_DATA, PG10MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_DATA10_MARK, PG10MD_001),</div><div class='add'>+	PINMUX_DATA(SSIRXD0_MARK, PG10MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ2_PG_MARK, PG10MD_011),</div><div class='add'>+	PINMUX_DATA(RXD5_MARK, PG10MD_100),</div><div class='add'>+	PINMUX_DATA(SIOFRXD_MARK, PG10MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG9_DATA, PG9MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_DATA9_MARK, PG9MD_001),</div><div class='add'>+	PINMUX_DATA(SSIWS0_MARK, PG9MD_010),</div><div class='add'>+	PINMUX_DATA(TXD4_MARK, PG9MD_100),</div><div class='add'>+	PINMUX_DATA(SIOFSYNC_MARK, PG9MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG8_DATA, PG8MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_DATA8_MARK, PG8MD_001),</div><div class='add'>+	PINMUX_DATA(SSISCK0_MARK, PG8MD_010),</div><div class='add'>+	PINMUX_DATA(RXD4_MARK, PG8MD_100),</div><div class='add'>+	PINMUX_DATA(SIOFSCK_MARK, PG8MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG7_DATA, PG7MD_00),</div><div class='add'>+	PINMUX_DATA(LCD_DATA7_MARK, PG7MD_01),</div><div class='add'>+	PINMUX_DATA(SD_CD_MARK, PG7MD_10),</div><div class='add'>+	PINMUX_DATA(PINT7_PG_MARK, PG7MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG6_DATA, PG7MD_00),</div><div class='add'>+	PINMUX_DATA(LCD_DATA6_MARK, PG7MD_01),</div><div class='add'>+	PINMUX_DATA(SD_WP_MARK, PG7MD_10),</div><div class='add'>+	PINMUX_DATA(PINT6_PG_MARK, PG7MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG5_DATA, PG5MD_00),</div><div class='add'>+	PINMUX_DATA(LCD_DATA5_MARK, PG5MD_01),</div><div class='add'>+	PINMUX_DATA(SD_D1_MARK, PG5MD_10),</div><div class='add'>+	PINMUX_DATA(PINT5_PG_MARK, PG5MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG4_DATA, PG4MD_00),</div><div class='add'>+	PINMUX_DATA(LCD_DATA4_MARK, PG4MD_01),</div><div class='add'>+	PINMUX_DATA(SD_D0_MARK, PG4MD_10),</div><div class='add'>+	PINMUX_DATA(PINT4_PG_MARK, PG4MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG3_DATA, PG3MD_00),</div><div class='add'>+	PINMUX_DATA(LCD_DATA3_MARK, PG3MD_01),</div><div class='add'>+	PINMUX_DATA(SD_CLK_MARK, PG3MD_10),</div><div class='add'>+	PINMUX_DATA(PINT3_PG_MARK, PG3MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG2_DATA, PG2MD_00),</div><div class='add'>+	PINMUX_DATA(LCD_DATA2_MARK, PG2MD_01),</div><div class='add'>+	PINMUX_DATA(SD_CMD_MARK, PG2MD_10),</div><div class='add'>+	PINMUX_DATA(PINT2_PG_MARK, PG2MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG1_DATA, PG1MD_00),</div><div class='add'>+	PINMUX_DATA(LCD_DATA1_MARK, PG1MD_01),</div><div class='add'>+	PINMUX_DATA(SD_D3_MARK, PG1MD_10),</div><div class='add'>+	PINMUX_DATA(PINT1_PG_MARK, PG1MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG0_DATA, PG0MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_DATA0_MARK, PG0MD_001),</div><div class='add'>+	PINMUX_DATA(SD_D2_MARK, PG0MD_010),</div><div class='add'>+	PINMUX_DATA(PINT0_PG_MARK, PG0MD_011),</div><div class='add'>+	PINMUX_DATA(WDTOVF_MARK, PG0MD_100),</div><div class='add'>+</div><div class='add'>+	/* Port H */</div><div class='add'>+	PINMUX_DATA(PH7_DATA, PH7MD_0),</div><div class='add'>+	PINMUX_DATA(PHAN7_MARK, PH7MD_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH6_DATA, PH6MD_0),</div><div class='add'>+	PINMUX_DATA(PHAN6_MARK, PH6MD_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH5_DATA, PH5MD_0),</div><div class='add'>+	PINMUX_DATA(PHAN5_MARK, PH5MD_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH4_DATA, PH4MD_0),</div><div class='add'>+	PINMUX_DATA(PHAN4_MARK, PH4MD_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH3_DATA, PH3MD_0),</div><div class='add'>+	PINMUX_DATA(PHAN3_MARK, PH3MD_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH2_DATA, PH2MD_0),</div><div class='add'>+	PINMUX_DATA(PHAN2_MARK, PH2MD_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH1_DATA, PH1MD_0),</div><div class='add'>+	PINMUX_DATA(PHAN1_MARK, PH1MD_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH0_DATA, PH0MD_0),</div><div class='add'>+	PINMUX_DATA(PHAN0_MARK, PH0MD_1),</div><div class='add'>+</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+</div><div class='add'>+	/* Port J */</div><div class='add'>+	PINMUX_DATA(PJ11_DATA, PJ11MD_00),</div><div class='add'>+	PINMUX_DATA(PWM2H_MARK, PJ11MD_01),</div><div class='add'>+	PINMUX_DATA(DACK1_MARK, PJ11MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ10_DATA, PJ10MD_00),</div><div class='add'>+	PINMUX_DATA(PWM2G_MARK, PJ10MD_01),</div><div class='add'>+	PINMUX_DATA(DREQ1_MARK, PJ10MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ9_DATA, PJ9MD_00),</div><div class='add'>+	PINMUX_DATA(PWM2F_MARK, PJ9MD_01),</div><div class='add'>+	PINMUX_DATA(TEND1_MARK, PJ9MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ8_DATA, PJ8MD_00),</div><div class='add'>+	PINMUX_DATA(PWM2E_MARK, PJ8MD_01),</div><div class='add'>+	PINMUX_DATA(RTS3_MARK, PJ8MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ7_DATA, PJ7MD_00),</div><div class='add'>+	PINMUX_DATA(TIOC1B_MARK, PJ7MD_01),</div><div class='add'>+	PINMUX_DATA(CTS3_MARK, PJ7MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ6_DATA, PJ6MD_00),</div><div class='add'>+	PINMUX_DATA(TIOC1A_MARK, PJ6MD_01),</div><div class='add'>+	PINMUX_DATA(SCK3_MARK, PJ6MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ5_DATA, PJ5MD_00),</div><div class='add'>+	PINMUX_DATA(IERXD_MARK, PJ5MD_01),</div><div class='add'>+	PINMUX_DATA(TXD3_MARK, PJ5MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ4_DATA, PJ4MD_00),</div><div class='add'>+	PINMUX_DATA(IETXD_MARK, PJ4MD_01),</div><div class='add'>+	PINMUX_DATA(RXD3_MARK, PJ4MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ3_DATA, PJ3MD_00),</div><div class='add'>+	PINMUX_DATA(CRX1_MARK, PJ3MD_01),</div><div class='add'>+	PINMUX_DATA(CRX0X1_MARK, PJ3MD_10),</div><div class='add'>+	PINMUX_DATA(IRQ1_PJ_MARK, PJ3MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ2_DATA, PJ2MD_000),</div><div class='add'>+	PINMUX_DATA(CTX1_MARK, PJ2MD_001),</div><div class='add'>+	PINMUX_DATA(CRX0CRX1_MARK, PJ2MD_010),</div><div class='add'>+	PINMUX_DATA(CS2_MARK, PJ2MD_011),</div><div class='add'>+	PINMUX_DATA(SCK0_MARK, PJ2MD_100),</div><div class='add'>+	PINMUX_DATA(LCD_M_DISP_MARK, PJ2MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ1_DATA, PJ1MD_000),</div><div class='add'>+	PINMUX_DATA(CRX0_MARK, PJ1MD_001),</div><div class='add'>+	PINMUX_DATA(IERXD_MARK, PJ1MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ0_PJ_MARK, PJ1MD_011),</div><div class='add'>+	PINMUX_DATA(RXD0_MARK, PJ1MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ0_DATA, PJ0MD_000),</div><div class='add'>+	PINMUX_DATA(CTX0_MARK, PJ0MD_001),</div><div class='add'>+	PINMUX_DATA(IERXD_MARK, PJ0MD_010),</div><div class='add'>+	PINMUX_DATA(CS1_MARK, PJ0MD_011),</div><div class='add'>+	PINMUX_DATA(TXD0_MARK, PJ0MD_100),</div><div class='add'>+	PINMUX_DATA(A0_MARK, PJ0MD_101),</div><div class='add'>+</div><div class='add'>+	/* Port K */</div><div class='add'>+	PINMUX_DATA(PK11_DATA, PK11MD_00),</div><div class='add'>+	PINMUX_DATA(PWM2D_MARK, PK11MD_01),</div><div class='add'>+	PINMUX_DATA(SSITXD0_MARK, PK11MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PK10_DATA, PK10MD_00),</div><div class='add'>+	PINMUX_DATA(PWM2C_MARK, PK10MD_01),</div><div class='add'>+	PINMUX_DATA(SSIRXD0_MARK, PK10MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PK9_DATA, PK9MD_00),</div><div class='add'>+	PINMUX_DATA(PWM2B_MARK, PK9MD_01),</div><div class='add'>+	PINMUX_DATA(SSIWS0_MARK, PK9MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PK8_DATA, PK8MD_00),</div><div class='add'>+	PINMUX_DATA(PWM2A_MARK, PK8MD_01),</div><div class='add'>+	PINMUX_DATA(SSISCK0_MARK, PK8MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PK7_DATA, PK7MD_00),</div><div class='add'>+	PINMUX_DATA(PWM1H_MARK, PK7MD_01),</div><div class='add'>+	PINMUX_DATA(SD_CD_MARK, PK7MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PK6_DATA, PK6MD_00),</div><div class='add'>+	PINMUX_DATA(PWM1G_MARK, PK6MD_01),</div><div class='add'>+	PINMUX_DATA(SD_WP_MARK, PK6MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PK5_DATA, PK5MD_00),</div><div class='add'>+	PINMUX_DATA(PWM1F_MARK, PK5MD_01),</div><div class='add'>+	PINMUX_DATA(SD_D1_MARK, PK5MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PK4_DATA, PK4MD_00),</div><div class='add'>+	PINMUX_DATA(PWM1E_MARK, PK4MD_01),</div><div class='add'>+	PINMUX_DATA(SD_D0_MARK, PK4MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PK3_DATA, PK3MD_00),</div><div class='add'>+	PINMUX_DATA(PWM1D_MARK, PK3MD_01),</div><div class='add'>+	PINMUX_DATA(SD_CLK_MARK, PK3MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PK2_DATA, PK2MD_00),</div><div class='add'>+	PINMUX_DATA(PWM1C_MARK, PK2MD_01),</div><div class='add'>+	PINMUX_DATA(SD_CMD_MARK, PK2MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PK1_DATA, PK1MD_00),</div><div class='add'>+	PINMUX_DATA(PWM1B_MARK, PK1MD_01),</div><div class='add'>+	PINMUX_DATA(SD_D3_MARK, PK1MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PK0_DATA, PK0MD_00),</div><div class='add'>+	PINMUX_DATA(PWM1A_MARK, PK0MD_01),</div><div class='add'>+	PINMUX_DATA(SD_D2_MARK, PK0MD_10),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinmux_gpio pinmux_gpios[] = {</div><div class='add'>+</div><div class='add'>+	/* Port A */</div><div class='add'>+	PINMUX_GPIO(GPIO_PA3, PA3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PA2, PA2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PA1, PA1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PA0, PA0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port B */</div><div class='add'>+	PINMUX_GPIO(GPIO_PB22, PB22_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB21, PB21_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB20, PB20_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB19, PB19_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB18, PB18_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB17, PB17_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB16, PB16_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB15, PB15_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB14, PB14_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB13, PB13_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB12, PB12_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB11, PB11_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB10, PB10_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB9, PB9_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB8, PB8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB7, PB7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB6, PB6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB5, PB5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB4, PB4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB3, PB3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB2, PB2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB1, PB1_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port C */</div><div class='add'>+	PINMUX_GPIO(GPIO_PC10, PC10_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC9, PC9_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC8, PC8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC7, PC7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC6, PC6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC5, PC5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC4, PC4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC3, PC3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC2, PC2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC1, PC1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC0, PC0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port D */</div><div class='add'>+	PINMUX_GPIO(GPIO_PD15, PD15_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD14, PD14_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD13, PD13_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD12, PD12_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD11, PD11_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD10, PD10_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD9, PD9_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD8, PD8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD7, PD7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD6, PD6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD5, PD5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD4, PD4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD3, PD3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD2, PD2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD1, PD1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD0, PD0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port E */</div><div class='add'>+	PINMUX_GPIO(GPIO_PE5, PE5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PE4, PE4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PE3, PE3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PE2, PE2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PE1, PE1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PE0, PE0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port F */</div><div class='add'>+	PINMUX_GPIO(GPIO_PF12, PF12_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF11, PF11_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF10, PF10_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF9, PF9_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF8, PF8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF7, PF7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF6, PF6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF5, PF5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF4, PF4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF3, PF3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF2, PF2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF1, PF1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF0, PF0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port G */</div><div class='add'>+	PINMUX_GPIO(GPIO_PG24, PG24_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG23, PG23_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG22, PG22_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG21, PG21_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG20, PG20_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG19, PG19_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG18, PG18_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG17, PG17_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG16, PG16_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG15, PG15_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG14, PG14_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG13, PG13_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG12, PG12_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG11, PG11_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG10, PG10_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG9, PG9_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG8, PG8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG7, PG7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG6, PG6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG5, PG5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG4, PG4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG3, PG3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG2, PG2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG1, PG1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG0, PG0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port H - Port H does not have a Data Register */</div><div class='add'>+</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+</div><div class='add'>+	/* Port J */</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ11, PJ11_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ10, PJ10_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ9, PJ9_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ8, PJ8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port K */</div><div class='add'>+	PINMUX_GPIO(GPIO_PK11, PK11_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PK10, PK10_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PK9, PK9_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PK8, PK8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PK7, PK7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PK6, PK6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PK5, PK5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PK4, PK4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PK3, PK3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PK2, PK2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PK1, PK1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PK0, PK0_DATA),</div><div class='add'>+</div><div class='add'>+	/* INTC */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT7_PG, PINT7_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT6_PG, PINT6_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT5_PG, PINT5_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT4_PG, PINT4_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT3_PG, PINT3_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT2_PG, PINT2_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT1_PG, PINT1_PG_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ7_PC, IRQ7_PC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ6_PC, IRQ6_PC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ5_PC, IRQ5_PC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ4_PC, IRQ4_PC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ3_PG, IRQ3_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ2_PG, IRQ2_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ1_PJ, IRQ1_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ0_PJ, IRQ0_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ3_PE, IRQ3_PE_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ2_PE, IRQ2_PE_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ1_PE, IRQ1_PE_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ0_PE, IRQ0_PE_MARK),</div><div class='add'>+</div><div class='add'>+	/* WDT */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),</div><div class='add'>+</div><div class='add'>+	/* CAN */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0CRX1_MARK),</div><div class='add'>+</div><div class='add'>+	/* DMAC */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),</div><div class='add'>+</div><div class='add'>+	/* ADC */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK),</div><div class='add'>+</div><div class='add'>+	/* BSCh */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A25, A25_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A24, A24_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A23, A23_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A22, A22_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A21, A21_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A20, A20_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A19, A19_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A18, A18_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A17, A17_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A16, A16_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A15, A15_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A14, A14_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A13, A13_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A12, A12_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A11, A11_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A10, A10_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A9, A9_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A8, A8_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A7, A7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A6, A6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A5, A5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A4, A4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A3, A3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A2, A2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A1, A1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A0, A0_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D15, D15_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D14, D14_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D13, D13_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D12, D12_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D11, D11_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D10, D10_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D9, D9_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D8, D8_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D7, D7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D6, D6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D5, D5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D4, D4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D3, D3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D2, D2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D1, D1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D0, D0_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_BS, BS_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS6CE1B, CS6CE1B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS5CE1A, CS5CE1A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RD, RD_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_ICIOWRAH, ICIOWRAH_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_ICIORD, ICIORD_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_WE1DQMUWE, WE1DQMUWE_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_WE0DQML, WE0DQML_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),</div><div class='add'>+</div><div class='add'>+	/* TMU */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TCLKD, TCLKD_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TCLKC, TCLKC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TCLKB, TCLKB_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TCLKA, TCLKA_MARK),</div><div class='add'>+</div><div class='add'>+	/* SCIF */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD5, TXD5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD5, RXD5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD6, TXD6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD6, RXD6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD7, TXD7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD7, RXD7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RTS1, RTS1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CTS1, CTS1_MARK),</div><div class='add'>+</div><div class='add'>+	/* RSPI */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RSPCK0, RSPCK0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_MOSI0, MOSI0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_MISO0_PF12, MISO0_PF12_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_MISO1, MISO1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSL00, SSL00_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RSPCK1, RSPCK1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_MOSI1, MOSI1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_MISO1_PG19, MISO1_PG19_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSL10, SSL10_MARK),</div><div class='add'>+</div><div class='add'>+	/* IIC3 */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),</div><div class='add'>+</div><div class='add'>+	/* SSI */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSITXD0, SSITXD0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIRXD0, SSIRXD0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK),</div><div class='add'>+</div><div class='add'>+	/* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SIOFTXD, SIOFTXD_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SIOFRXD, SIOFRXD_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SIOFSYNC, SIOFSYNC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SIOFSCK, SIOFSCK_MARK),</div><div class='add'>+</div><div class='add'>+	/* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SPDIF_IN, SPDIF_IN_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SPDIF_OUT, SPDIF_OUT_MARK),</div><div class='add'>+</div><div class='add'>+	/* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),</div><div class='add'>+</div><div class='add'>+	/* VDC3 */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA7, DV_DATA7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA6, DV_DATA6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA5, DV_DATA5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA4, DV_DATA4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA3, DV_DATA3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA2, DV_DATA2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA1, DV_DATA1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA0, DV_DATA0_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_EXTCLK, LCD_EXTCLK_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_VSYNC, LCD_VSYNC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinmux_cfg_reg pinmux_config_regs[] = {</div><div class='add'>+	{ PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PA3_IN, PA3_OUT,</div><div class='add'>+		PA2_IN, PA2_OUT,</div><div class='add'>+		PA1_IN, PA1_OUT,</div><div class='add'>+		PA0_IN,	PA0_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PB22MD_00, PB22MD_01, PB22MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PB21MD_0, PB21MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB20MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4) {</div><div class='add'>+		0, PB19MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB18MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB17MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB16MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4) {</div><div class='add'>+		0, PB15MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB14MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB13MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB12MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4) {</div><div class='add'>+		0, PB11MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB10MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB9MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB8MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4) {</div><div class='add'>+		0, PB7MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB6MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB5MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB4MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4) {</div><div class='add'>+		0, PB3MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB2MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB1MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0,</div><div class='add'>+		PB22_IN, PB22_OUT,</div><div class='add'>+		PB21_IN, PB21_OUT,</div><div class='add'>+		PB20_IN, PB20_OUT,</div><div class='add'>+		PB19_IN, PB19_OUT,</div><div class='add'>+		PB18_IN, PB18_OUT,</div><div class='add'>+		PB17_IN, PB17_OUT,</div><div class='add'>+		PB16_IN, PB16_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1) {</div><div class='add'>+		PB15_IN, PB15_OUT,</div><div class='add'>+		PB14_IN, PB14_OUT,</div><div class='add'>+		PB13_IN, PB13_OUT,</div><div class='add'>+		PB12_IN, PB12_OUT,</div><div class='add'>+		PB11_IN, PB11_OUT,</div><div class='add'>+		PB10_IN, PB10_OUT,</div><div class='add'>+		PB9_IN, PB9_OUT,</div><div class='add'>+		PB8_IN, PB8_OUT,</div><div class='add'>+		PB7_IN, PB7_OUT,</div><div class='add'>+		PB6_IN, PB6_OUT,</div><div class='add'>+		PB5_IN, PB5_OUT,</div><div class='add'>+		PB4_IN, PB4_OUT,</div><div class='add'>+		PB3_IN, PB3_OUT,</div><div class='add'>+		PB2_IN, PB2_OUT,</div><div class='add'>+		PB1_IN, PB1_OUT,</div><div class='add'>+		0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PC10MD_0, PC10MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PC9MD_0, PC9MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PC8MD_00, PC8MD_01, PC8MD_10, PC8MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PCCR1", 0xfffe384c, 16, 4) {</div><div class='add'>+		PC7MD_00, PC7MD_01, PC7MD_10, PC7MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PC6MD_00, PC6MD_01, PC6MD_10, PC6MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PC5MD_00, PC5MD_01, PC5MD_10, PC5MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PC4MD_0, PC4MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PCCR0", 0xfffe384e, 16, 4) {</div><div class='add'>+		PC3MD_0, PC3MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PC2MD_0, PC2MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PC1MD_0, PC1MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PC0MD_0, PC0MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PCIOR0", 0xfffe3852, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PC10_IN, PC10_OUT,</div><div class='add'>+		PC9_IN, PC9_OUT,</div><div class='add'>+		PC8_IN, PC8_OUT,</div><div class='add'>+		PC7_IN, PC7_OUT,</div><div class='add'>+		PC6_IN, PC6_OUT,</div><div class='add'>+		PC5_IN, PC5_OUT,</div><div class='add'>+		PC4_IN, PC4_OUT,</div><div class='add'>+		PC3_IN, PC3_OUT,</div><div class='add'>+		PC2_IN, PC2_OUT,</div><div class='add'>+		PC1_IN, PC1_OUT,</div><div class='add'>+		PC0_IN, PC0_OUT</div><div class='add'>+	 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PDCR3", 0xfffe3868, 16, 4) {</div><div class='add'>+		0, PD15MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PD14MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PD13MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PD12MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PDCR2", 0xfffe386a, 16, 4) {</div><div class='add'>+		0, PD11MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PD10MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PD9MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PD8MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PDCR1", 0xfffe386c, 16, 4) {</div><div class='add'>+		0, PD7MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PD6MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PD5MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PD4MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PDCR0", 0xfffe386e, 16, 4) {</div><div class='add'>+		0, PD3MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PD2MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PD1MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PD0MD_01, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PDIOR0", 0xfffe3872, 16, 1) {</div><div class='add'>+		PD15_IN, PD15_OUT,</div><div class='add'>+		PD14_IN, PD14_OUT,</div><div class='add'>+		PD13_IN, PD13_OUT,</div><div class='add'>+		PD12_IN, PD12_OUT,</div><div class='add'>+		PD11_IN, PD11_OUT,</div><div class='add'>+		PD10_IN, PD10_OUT,</div><div class='add'>+		PD9_IN, PD9_OUT,</div><div class='add'>+		PD8_IN, PD8_OUT,</div><div class='add'>+		PD7_IN, PD7_OUT,</div><div class='add'>+		PD6_IN, PD6_OUT,</div><div class='add'>+		PD5_IN, PD5_OUT,</div><div class='add'>+		PD4_IN, PD4_OUT,</div><div class='add'>+		PD3_IN, PD3_OUT,</div><div class='add'>+		PD2_IN, PD2_OUT,</div><div class='add'>+		PD1_IN, PD1_OUT,</div><div class='add'>+		PD0_IN, PD0_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PECR1", 0xfffe388c, 16, 4) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PE5MD_00, PE5MD_01, 0, PE5MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PE4MD_00, PE4MD_01, 0, PE4MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PECR0", 0xfffe388e, 16, 4) {</div><div class='add'>+		PE3MD_00, PE3MD_01, 0, PE3MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PE2MD_00, PE2MD_01, 0, PE2MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011,</div><div class='add'>+		PE1MD_100, PE1MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PEIOR0", 0xfffe3892, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0,</div><div class='add'>+		PE5_IN, PE5_OUT,</div><div class='add'>+		PE4_IN, PE4_OUT,</div><div class='add'>+		PE3_IN, PE3_OUT,</div><div class='add'>+		PE2_IN, PE2_OUT,</div><div class='add'>+		PE1_IN, PE1_OUT,</div><div class='add'>+		PE0_IN, PE0_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PFCR3", 0xfffe38a8, 16, 4) {</div><div class='add'>+		PF12MD_000, PF12MD_001, 0, PF12MD_011,</div><div class='add'>+		PF12MD_100, PF12MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PFCR2", 0xfffe38aa, 16, 4) {</div><div class='add'>+		PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011,</div><div class='add'>+		PF11MD_100, PF11MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011,</div><div class='add'>+		PF10MD_100, PF10MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011,</div><div class='add'>+		PF9MD_100, PF9MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PF8MD_00, PF8MD_01, PF8MD_10, PF8MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PFCR1", 0xfffe38ac, 16, 4) {</div><div class='add'>+		PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011,</div><div class='add'>+		PF7MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011,</div><div class='add'>+		PF6MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011,</div><div class='add'>+		PF5MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011,</div><div class='add'>+		PF4MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PFCR0", 0xfffe38ae, 16, 4) {</div><div class='add'>+		PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011,</div><div class='add'>+		PF3MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011,</div><div class='add'>+		PF2MD_100, PF2MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,</div><div class='add'>+		PF1MD_100, PF1MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0</div><div class='add'>+	 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PFIOR0", 0xfffe38b2, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0,</div><div class='add'>+		PF12_IN, PF12_OUT,</div><div class='add'>+		PF11_IN, PF11_OUT,</div><div class='add'>+		PF10_IN, PF10_OUT,</div><div class='add'>+		PF9_IN, PF9_OUT,</div><div class='add'>+		PF8_IN, PF8_OUT,</div><div class='add'>+		PF7_IN, PF7_OUT,</div><div class='add'>+		PF6_IN, PF6_OUT,</div><div class='add'>+		PF5_IN, PF5_OUT,</div><div class='add'>+		PF4_IN, PF4_OUT,</div><div class='add'>+		PF3_IN, PF3_OUT,</div><div class='add'>+		PF2_IN, PF2_OUT,</div><div class='add'>+		PF1_IN, PF1_OUT,</div><div class='add'>+		PF0_IN, PF0_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR7", 0xfffe38c0, 16, 4) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011,</div><div class='add'>+		PG0MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR6", 0xfffe38c2, 16, 4) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR5", 0xfffe38c4, 16, 4) {</div><div class='add'>+		PG23MD_00, PG23MD_01, PG23MD_10, PG23MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG22MD_00, PG22MD_01, PG22MD_10, PG22MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG21MD_00, PG21MD_01, PG21MD_10, PG21MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011,</div><div class='add'>+		PG20MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR4", 0xfffe38c6, 16, 4) {</div><div class='add'>+		PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011,</div><div class='add'>+		PG19MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011,</div><div class='add'>+		PG18MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG17MD_000, PG17MD_001, PG17MD_010, PG17MD_011,</div><div class='add'>+		PG17MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG16MD_000, PG16MD_001, PG16MD_010, PG16MD_011,</div><div class='add'>+		PG16MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR3", 0xfffe38c8, 16, 4) {</div><div class='add'>+		PG15MD_000, PG15MD_001, PG15MD_010, PG15MD_011,</div><div class='add'>+		PG15MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG14MD_000, PG14MD_001, PG14MD_010, 0,</div><div class='add'>+		PG14MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG13MD_000, PG13MD_001, PG13MD_010, 0,</div><div class='add'>+		PG13MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG12MD_000, PG12MD_001, PG12MD_010, 0,</div><div class='add'>+		PG12MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR2", 0xfffe38ca, 16, 4) {</div><div class='add'>+		PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011,</div><div class='add'>+		PG11MD_100, PG11MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011,</div><div class='add'>+		PG10MD_100, PG10MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011,</div><div class='add'>+		PG9MD_100, PG9MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011,</div><div class='add'>+		PG8MD_100, PG8MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR1", 0xfffe38cc, 16, 4) {</div><div class='add'>+		PG7MD_00, PG7MD_01, PG7MD_10, PG7MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG6MD_00, PG6MD_01, PG6MD_10, PG6MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG5MD_00, PG5MD_01, PG5MD_10, PG5MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG4MD_00, PG4MD_01, PG4MD_10, PG4MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR0", 0xfffe38ce, 16, 4) {</div><div class='add'>+		PG3MD_00, PG3MD_01, PG3MD_10, PG3MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG2MD_00, PG2MD_01, PG2MD_10, PG2MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG1MD_00, PG1MD_01, PG1MD_10, PG1MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PGIOR1", 0xfffe38d0, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG24_IN, PG24_OUT,</div><div class='add'>+		PG23_IN, PG23_OUT,</div><div class='add'>+		PG22_IN, PG22_OUT,</div><div class='add'>+		PG21_IN, PG21_OUT,</div><div class='add'>+		PG20_IN, PG20_OUT,</div><div class='add'>+		PG19_IN, PG19_OUT,</div><div class='add'>+		PG18_IN, PG18_OUT,</div><div class='add'>+		PG17_IN, PG17_OUT,</div><div class='add'>+		PG16_IN, PG16_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PGIOR0", 0xfffe38d2, 16, 1) {</div><div class='add'>+		PG15_IN, PG15_OUT,</div><div class='add'>+		PG14_IN, PG14_OUT,</div><div class='add'>+		PG13_IN, PG13_OUT,</div><div class='add'>+		PG12_IN, PG12_OUT,</div><div class='add'>+		PG11_IN, PG11_OUT,</div><div class='add'>+		PG10_IN, PG10_OUT,</div><div class='add'>+		PG9_IN, PG9_OUT,</div><div class='add'>+		PG8_IN, PG8_OUT,</div><div class='add'>+		PG7_IN, PG7_OUT,</div><div class='add'>+		PG6_IN, PG6_OUT,</div><div class='add'>+		PG5_IN, PG5_OUT,</div><div class='add'>+		PG4_IN, PG4_OUT,</div><div class='add'>+		PG3_IN, PG3_OUT,</div><div class='add'>+		PG2_IN, PG2_OUT,</div><div class='add'>+		PG1_IN, PG1_OUT,</div><div class='add'>+		PG0_IN, PG0_OUT</div><div class='add'>+	 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PHCR1", 0xfffe38ec, 16, 4) {</div><div class='add'>+		PH7MD_0, PH7MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PH6MD_0, PH6MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PH5MD_0, PH5MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PH4MD_0, PH4MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PHCR0", 0xfffe38ee, 16, 4) {</div><div class='add'>+		PH3MD_0, PH3MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PH2MD_0, PH2MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PH1MD_0, PH1MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PH0MD_0, PH0MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PJCR2", 0xfffe390a, 16, 4) {</div><div class='add'>+		PJ11MD_00, PJ11MD_01, PJ11MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PJ10MD_00, PJ10MD_01, PJ10MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PJ9MD_00, PJ9MD_01, PJ9MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PJ8MD_00, PJ8MD_01, PJ8MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PJCR1", 0xfffe390c, 16, 4) {</div><div class='add'>+		PJ7MD_00, PJ7MD_01, PJ7MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PJ6MD_00, PJ6MD_01, PJ6MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PJ5MD_00, PJ5MD_01, PJ5MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PJ4MD_00, PJ4MD_01, PJ4MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PJCR0", 0xfffe390e, 16, 4) {</div><div class='add'>+		PJ3MD_00, PJ3MD_01, PJ3MD_10, PJ3MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011,</div><div class='add'>+		PJ2MD_100, PJ2MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011,</div><div class='add'>+		PJ1MD_100, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011,</div><div class='add'>+		PJ0MD_100, PJ0MD_101, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PJIOR0", 0xfffe3912, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PJ11_IN, PJ11_OUT,</div><div class='add'>+		PJ10_IN, PJ10_OUT,</div><div class='add'>+		PJ9_IN, PJ9_OUT,</div><div class='add'>+		PJ8_IN, PJ8_OUT,</div><div class='add'>+		PJ7_IN, PJ7_OUT,</div><div class='add'>+		PJ6_IN, PJ6_OUT,</div><div class='add'>+		PJ5_IN, PJ5_OUT,</div><div class='add'>+		PJ4_IN, PJ4_OUT,</div><div class='add'>+		PJ3_IN, PJ3_OUT,</div><div class='add'>+		PJ2_IN, PJ2_OUT,</div><div class='add'>+		PJ1_IN, PJ1_OUT,</div><div class='add'>+		PJ0_IN, PJ0_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PKCR2", 0xfffe392a, 16, 4) {</div><div class='add'>+		PK11MD_00, PK11MD_01, PK11MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PK10MD_00, PK10MD_01, PK10MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PK9MD_00, PK9MD_01, PK9MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PK8MD_00, PK8MD_01, PK8MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PKCR1", 0xfffe392c, 16, 4) {</div><div class='add'>+		PK7MD_00, PK7MD_01, PK7MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PK6MD_00, PK6MD_01, PK6MD_10, 0,  0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PK5MD_00, PK5MD_01, PK5MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PK4MD_00, PK4MD_01, PK4MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PKCR0", 0xfffe392e, 16, 4) {</div><div class='add'>+		PK3MD_00, PK3MD_01, PK3MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PK2MD_00, PK2MD_01, PK2MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PK1MD_00, PK1MD_01, PK1MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PK0MD_00, PK0MD_01, PK0MD_10, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PKIOR0", 0xfffe3932, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PJ11_IN, PJ11_OUT,</div><div class='add'>+		PJ10_IN, PJ10_OUT,</div><div class='add'>+		PJ9_IN, PJ9_OUT,</div><div class='add'>+		PJ8_IN, PJ8_OUT,</div><div class='add'>+		PJ7_IN, PJ7_OUT,</div><div class='add'>+		PJ6_IN, PJ6_OUT,</div><div class='add'>+		PJ5_IN, PJ5_OUT,</div><div class='add'>+		PJ4_IN, PJ4_OUT,</div><div class='add'>+		PJ3_IN, PJ3_OUT,</div><div class='add'>+		PJ2_IN, PJ2_OUT,</div><div class='add'>+		PJ1_IN, PJ1_OUT,</div><div class='add'>+		PJ0_IN, PJ0_OUT }</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinmux_data_reg pinmux_data_regs[] = {</div><div class='add'>+	{ PINMUX_DATA_REG("PADR1", 0xfffe3814, 16) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, PA3_DATA,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, PA2_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, PA1_DATA,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, PA0_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB22_DATA, PB21_DATA, PB20_DATA,</div><div class='add'>+		PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16) {</div><div class='add'>+		PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,</div><div class='add'>+		PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,</div><div class='add'>+		PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,</div><div class='add'>+		PB3_DATA, PB2_DATA, PB1_DATA, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16) {</div><div class='add'>+		0, 0, 0, 0,</div><div class='add'>+		0, PC10_DATA, PC9_DATA, PC8_DATA,</div><div class='add'>+		PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,</div><div class='add'>+		PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16) {</div><div class='add'>+		PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,</div><div class='add'>+		PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,</div><div class='add'>+		PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,</div><div class='add'>+		PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, PE5_DATA, PE4_DATA,</div><div class='add'>+		PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16) {</div><div class='add'>+		0, 0, 0, PF12_DATA,</div><div class='add'>+		PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,</div><div class='add'>+		PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,</div><div class='add'>+		PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, PG24_DATA,</div><div class='add'>+		PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,</div><div class='add'>+		PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16) {</div><div class='add'>+		PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,</div><div class='add'>+		PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,</div><div class='add'>+		PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,</div><div class='add'>+		PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16) {</div><div class='add'>+		0, 0, 0, PJ12_DATA,</div><div class='add'>+		PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,</div><div class='add'>+		PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,</div><div class='add'>+		PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_DATA_REG("PKDR0", 0xfffe3936, 16) {</div><div class='add'>+		0, 0, 0, PK12_DATA,</div><div class='add'>+		PK11_DATA, PK10_DATA, PK9_DATA, PK8_DATA,</div><div class='add'>+		PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,</div><div class='add'>+		PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA }</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinmux_info sh7264_pinmux_info = {</div><div class='add'>+	.name = "sh7264_pfc",</div><div class='add'>+	.reserved_id = PINMUX_RESERVED,</div><div class='add'>+	.data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },</div><div class='add'>+	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },</div><div class='add'>+	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },</div><div class='add'>+	.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },</div><div class='add'>+	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },</div><div class='add'>+</div><div class='add'>+	.first_gpio = GPIO_PA3,</div><div class='add'>+	.last_gpio = GPIO_FN_LCD_M_DISP,</div><div class='add'>+</div><div class='add'>+	.gpios = pinmux_gpios,</div><div class='add'>+	.cfg_regs = pinmux_config_regs,</div><div class='add'>+	.data_regs = pinmux_data_regs,</div><div class='add'>+</div><div class='add'>+	.gpio_data = pinmux_data,</div><div class='add'>+	.gpio_data_size = ARRAY_SIZE(pinmux_data),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init plat_pinmux_setup(void)</div><div class='add'>+{</div><div class='add'>+	return register_pinmux(&amp;sh7264_pinmux_info);</div><div class='add'>+}</div><div class='add'>+arch_initcall(plat_pinmux_setup);</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c<br/>new file mode 100644<br/>index 000000000000..f25127c46eca<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c</a></div><div class='hunk'>@@ -0,0 +1,2800 @@</div><div class='add'>+/*</div><div class='add'>+ * SH7269 Pinmux</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012  Renesas Electronics Europe Ltd</div><div class='add'>+ * Copyright (C) 2012  Phil Edworthy</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;cpu/sh7269.h&gt;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	PINMUX_RESERVED = 0,</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA_BEGIN,</div><div class='add'>+	/* Port A */</div><div class='add'>+	PA1_DATA, PA0_DATA,</div><div class='add'>+	/* Port B */</div><div class='add'>+	PB22_DATA, PB21_DATA, PB20_DATA,</div><div class='add'>+	PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA,</div><div class='add'>+	PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,</div><div class='add'>+	PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,</div><div class='add'>+	PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,</div><div class='add'>+	PB3_DATA, PB2_DATA, PB1_DATA,</div><div class='add'>+	/* Port C */</div><div class='add'>+	PC8_DATA,</div><div class='add'>+	PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,</div><div class='add'>+	PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,</div><div class='add'>+	/* Port D */</div><div class='add'>+	PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,</div><div class='add'>+	PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,</div><div class='add'>+	PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,</div><div class='add'>+	PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,</div><div class='add'>+	/* Port E */</div><div class='add'>+	PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,</div><div class='add'>+	PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,</div><div class='add'>+	/* Port F */</div><div class='add'>+	PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,</div><div class='add'>+	PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA,</div><div class='add'>+	PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,</div><div class='add'>+	PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,</div><div class='add'>+	PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,</div><div class='add'>+	PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,</div><div class='add'>+	/* Port G */</div><div class='add'>+	PG27_DATA, PG26_DATA, PG25_DATA, PG24_DATA,</div><div class='add'>+	PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,</div><div class='add'>+	PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA,</div><div class='add'>+	PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,</div><div class='add'>+	PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,</div><div class='add'>+	PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,</div><div class='add'>+	PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,</div><div class='add'>+	/* Port H */</div><div class='add'>+	/* NOTE - Port H does not have a Data Register, but PH Data is</div><div class='add'>+	   connected to PH Port Register */</div><div class='add'>+	PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,</div><div class='add'>+	PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+	/* Port J */</div><div class='add'>+	PJ31_DATA, PJ30_DATA, PJ29_DATA, PJ28_DATA,</div><div class='add'>+	PJ27_DATA, PJ26_DATA, PJ25_DATA, PJ24_DATA,</div><div class='add'>+	PJ23_DATA, PJ22_DATA, PJ21_DATA, PJ20_DATA,</div><div class='add'>+	PJ19_DATA, PJ18_DATA, PJ17_DATA, PJ16_DATA,</div><div class='add'>+	PJ15_DATA, PJ14_DATA, PJ13_DATA, PJ12_DATA,</div><div class='add'>+	PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,</div><div class='add'>+	PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,</div><div class='add'>+	PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA,</div><div class='add'>+	PINMUX_DATA_END,</div><div class='add'>+</div><div class='add'>+	PINMUX_INPUT_BEGIN,</div><div class='add'>+	FORCE_IN,</div><div class='add'>+	/* Port A */</div><div class='add'>+	PA1_IN, PA0_IN,</div><div class='add'>+	/* Port B */</div><div class='add'>+	PB22_IN, PB21_IN, PB20_IN,</div><div class='add'>+	PB19_IN, PB18_IN, PB17_IN, PB16_IN,</div><div class='add'>+	PB15_IN, PB14_IN, PB13_IN, PB12_IN,</div><div class='add'>+	PB11_IN, PB10_IN, PB9_IN, PB8_IN,</div><div class='add'>+	PB7_IN, PB6_IN, PB5_IN, PB4_IN,</div><div class='add'>+	PB3_IN, PB2_IN, PB1_IN,</div><div class='add'>+	/* Port C */</div><div class='add'>+	PC8_IN,</div><div class='add'>+	PC7_IN, PC6_IN, PC5_IN, PC4_IN,</div><div class='add'>+	PC3_IN, PC2_IN, PC1_IN, PC0_IN,</div><div class='add'>+	/* Port D */</div><div class='add'>+	PD15_IN, PD14_IN, PD13_IN, PD12_IN,</div><div class='add'>+	PD11_IN, PD10_IN, PD9_IN, PD8_IN,</div><div class='add'>+	PD7_IN, PD6_IN, PD5_IN, PD4_IN,</div><div class='add'>+	PD3_IN, PD2_IN, PD1_IN, PD0_IN,</div><div class='add'>+	/* Port E */</div><div class='add'>+	PE7_IN, PE6_IN, PE5_IN, PE4_IN,</div><div class='add'>+	PE3_IN, PE2_IN, PE1_IN, PE0_IN,</div><div class='add'>+	/* Port F */</div><div class='add'>+	PF23_IN, PF22_IN, PF21_IN, PF20_IN,</div><div class='add'>+	PF19_IN, PF18_IN, PF17_IN, PF16_IN,</div><div class='add'>+	PF15_IN, PF14_IN, PF13_IN, PF12_IN,</div><div class='add'>+	PF11_IN, PF10_IN, PF9_IN, PF8_IN,</div><div class='add'>+	PF7_IN, PF6_IN, PF5_IN, PF4_IN,</div><div class='add'>+	PF3_IN, PF2_IN, PF1_IN, PF0_IN,</div><div class='add'>+	/* Port G */</div><div class='add'>+	PG27_IN, PG26_IN, PG25_IN, PG24_IN,</div><div class='add'>+	PG23_IN, PG22_IN, PG21_IN, PG20_IN,</div><div class='add'>+	PG19_IN, PG18_IN, PG17_IN, PG16_IN,</div><div class='add'>+	PG15_IN, PG14_IN, PG13_IN, PG12_IN,</div><div class='add'>+	PG11_IN, PG10_IN, PG9_IN, PG8_IN,</div><div class='add'>+	PG7_IN, PG6_IN, PG5_IN, PG4_IN,</div><div class='add'>+	PG3_IN, PG2_IN, PG1_IN, PG0_IN,</div><div class='add'>+	/* Port H - Port H does not have a Data Register */</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+	/* Port J */</div><div class='add'>+	PJ31_IN, PJ30_IN, PJ29_IN, PJ28_IN,</div><div class='add'>+	PJ27_IN, PJ26_IN, PJ25_IN, PJ24_IN,</div><div class='add'>+	PJ23_IN, PJ22_IN, PJ21_IN, PJ20_IN,</div><div class='add'>+	PJ19_IN, PJ18_IN, PJ17_IN, PJ16_IN,</div><div class='add'>+	PJ15_IN, PJ14_IN, PJ13_IN, PJ12_IN,</div><div class='add'>+	PJ11_IN, PJ10_IN, PJ9_IN, PJ8_IN,</div><div class='add'>+	PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,</div><div class='add'>+	PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN,</div><div class='add'>+	PINMUX_INPUT_END,</div><div class='add'>+</div><div class='add'>+	PINMUX_OUTPUT_BEGIN,</div><div class='add'>+	FORCE_OUT,</div><div class='add'>+	/* Port A */</div><div class='add'>+	PA1_OUT, PA0_OUT,</div><div class='add'>+	/* Port B */</div><div class='add'>+	PB22_OUT, PB21_OUT, PB20_OUT,</div><div class='add'>+	PB19_OUT, PB18_OUT, PB17_OUT, PB16_OUT,</div><div class='add'>+	PB15_OUT, PB14_OUT, PB13_OUT, PB12_OUT,</div><div class='add'>+	PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,</div><div class='add'>+	PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,</div><div class='add'>+	PB3_OUT, PB2_OUT, PB1_OUT,</div><div class='add'>+	/* Port C */</div><div class='add'>+	PC8_OUT,</div><div class='add'>+	PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,</div><div class='add'>+	PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,</div><div class='add'>+	/* Port D */</div><div class='add'>+	PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,</div><div class='add'>+	PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,</div><div class='add'>+	PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,</div><div class='add'>+	PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,</div><div class='add'>+	/* Port E */</div><div class='add'>+	PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,</div><div class='add'>+	PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,</div><div class='add'>+	/* Port F */</div><div class='add'>+	PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT,</div><div class='add'>+	PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT,</div><div class='add'>+	PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT,</div><div class='add'>+	PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,</div><div class='add'>+	PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,</div><div class='add'>+	PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,</div><div class='add'>+	/* Port G */</div><div class='add'>+	PG27_OUT, PG26_OUT, PG25_OUT, PG24_OUT,</div><div class='add'>+	PG23_OUT, PG22_OUT, PG21_OUT, PG20_OUT,</div><div class='add'>+	PG19_OUT, PG18_OUT, PG17_OUT, PG16_OUT,</div><div class='add'>+	PG15_OUT, PG14_OUT, PG13_OUT, PG12_OUT,</div><div class='add'>+	PG11_OUT, PG10_OUT, PG9_OUT, PG8_OUT,</div><div class='add'>+	PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,</div><div class='add'>+	PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,</div><div class='add'>+	/* Port H - Port H does not have a Data Register */</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+	/* Port J */</div><div class='add'>+	PJ31_OUT, PJ30_OUT, PJ29_OUT, PJ28_OUT,</div><div class='add'>+	PJ27_OUT, PJ26_OUT, PJ25_OUT, PJ24_OUT,</div><div class='add'>+	PJ23_OUT, PJ22_OUT, PJ21_OUT, PJ20_OUT,</div><div class='add'>+	PJ19_OUT, PJ18_OUT, PJ17_OUT, PJ16_OUT,</div><div class='add'>+	PJ15_OUT, PJ14_OUT, PJ13_OUT, PJ12_OUT,</div><div class='add'>+	PJ11_OUT, PJ10_OUT, PJ9_OUT, PJ8_OUT,</div><div class='add'>+	PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,</div><div class='add'>+	PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT,</div><div class='add'>+	PINMUX_OUTPUT_END,</div><div class='add'>+</div><div class='add'>+	PINMUX_FUNCTION_BEGIN,</div><div class='add'>+	/* Port A */</div><div class='add'>+	PA1_IOR_IN, PA1_IOR_OUT,</div><div class='add'>+	PA0_IOR_IN, PA0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	/* Port B */</div><div class='add'>+	PB22_IOR_IN, PB22_IOR_OUT,</div><div class='add'>+	PB21_IOR_IN, PB21_IOR_OUT,</div><div class='add'>+	PB20_IOR_IN, PB20_IOR_OUT,</div><div class='add'>+	PB19_IOR_IN, PB19_IOR_OUT,</div><div class='add'>+	PB18_IOR_IN, PB18_IOR_OUT,</div><div class='add'>+	PB17_IOR_IN, PB17_IOR_OUT,</div><div class='add'>+	PB16_IOR_IN, PB16_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PB15_IOR_IN, PB15_IOR_OUT,</div><div class='add'>+	PB14_IOR_IN, PB14_IOR_OUT,</div><div class='add'>+	PB13_IOR_IN, PB13_IOR_OUT,</div><div class='add'>+	PB12_IOR_IN, PB12_IOR_OUT,</div><div class='add'>+	PB11_IOR_IN, PB11_IOR_OUT,</div><div class='add'>+	PB10_IOR_IN, PB10_IOR_OUT,</div><div class='add'>+	PB9_IOR_IN, PB9_IOR_OUT,</div><div class='add'>+	PB8_IOR_IN, PB8_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PB7_IOR_IN, PB7_IOR_OUT,</div><div class='add'>+	PB6_IOR_IN, PB6_IOR_OUT,</div><div class='add'>+	PB5_IOR_IN, PB5_IOR_OUT,</div><div class='add'>+	PB4_IOR_IN, PB4_IOR_OUT,</div><div class='add'>+	PB3_IOR_IN, PB3_IOR_OUT,</div><div class='add'>+	PB2_IOR_IN, PB2_IOR_OUT,</div><div class='add'>+	PB1_IOR_IN, PB1_IOR_OUT,</div><div class='add'>+	PB0_IOR_IN, PB0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PB22MD_000, PB22MD_001, PB22MD_010, PB22MD_011,</div><div class='add'>+	PB22MD_100, PB22MD_101, PB22MD_110, PB22MD_111,</div><div class='add'>+	PB21MD_00, PB21MD_01, PB21MD_10, PB21MD_11,</div><div class='add'>+	PB20MD_000, PB20MD_001, PB20MD_010, PB20MD_011,</div><div class='add'>+	PB20MD_100, PB20MD_101, PB20MD_110, PB20MD_111,</div><div class='add'>+	PB19MD_000, PB19MD_001, PB19MD_010, PB19MD_011,</div><div class='add'>+	PB19MD_100, PB19MD_101, PB19MD_110, PB19MD_111,</div><div class='add'>+	PB18MD_000, PB18MD_001, PB18MD_010, PB18MD_011,</div><div class='add'>+	PB18MD_100, PB18MD_101, PB18MD_110, PB18MD_111,</div><div class='add'>+	PB17MD_000, PB17MD_001, PB17MD_010, PB17MD_011,</div><div class='add'>+	PB17MD_100, PB17MD_101, PB17MD_110, PB17MD_111,</div><div class='add'>+	PB16MD_000, PB16MD_001, PB16MD_010, PB16MD_011,</div><div class='add'>+	PB16MD_100, PB16MD_101, PB16MD_110, PB16MD_111,</div><div class='add'>+	PB15MD_000, PB15MD_001, PB15MD_010, PB15MD_011,</div><div class='add'>+	PB15MD_100, PB15MD_101, PB15MD_110, PB15MD_111,</div><div class='add'>+	PB14MD_000, PB14MD_001, PB14MD_010, PB14MD_011,</div><div class='add'>+	PB14MD_100, PB14MD_101, PB14MD_110, PB14MD_111,</div><div class='add'>+	PB13MD_000, PB13MD_001, PB13MD_010, PB13MD_011,</div><div class='add'>+	PB13MD_100, PB13MD_101, PB13MD_110, PB13MD_111,</div><div class='add'>+	PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,</div><div class='add'>+</div><div class='add'>+	PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11,</div><div class='add'>+	PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11,</div><div class='add'>+	PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11,</div><div class='add'>+	PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11,</div><div class='add'>+</div><div class='add'>+	PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,</div><div class='add'>+	PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,</div><div class='add'>+	PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,</div><div class='add'>+	PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,</div><div class='add'>+</div><div class='add'>+	PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,</div><div class='add'>+	PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,</div><div class='add'>+	PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,</div><div class='add'>+</div><div class='add'>+	/* Port C */</div><div class='add'>+	PC8_IOR_IN, PC8_IOR_OUT,</div><div class='add'>+	PC7_IOR_IN, PC7_IOR_OUT,</div><div class='add'>+	PC6_IOR_IN, PC6_IOR_OUT,</div><div class='add'>+	PC5_IOR_IN, PC5_IOR_OUT,</div><div class='add'>+	PC4_IOR_IN, PC4_IOR_OUT,</div><div class='add'>+	PC3_IOR_IN, PC3_IOR_OUT,</div><div class='add'>+	PC2_IOR_IN, PC2_IOR_OUT,</div><div class='add'>+	PC1_IOR_IN, PC1_IOR_OUT,</div><div class='add'>+	PC0_IOR_IN, PC0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PC8MD_000, PC8MD_001, PC8MD_010, PC8MD_011,</div><div class='add'>+	PC8MD_100, PC8MD_101, PC8MD_110, PC8MD_111,</div><div class='add'>+	PC7MD_000, PC7MD_001, PC7MD_010, PC7MD_011,</div><div class='add'>+	PC7MD_100, PC7MD_101, PC7MD_110, PC7MD_111,</div><div class='add'>+	PC6MD_000, PC6MD_001, PC6MD_010, PC6MD_011,</div><div class='add'>+	PC6MD_100, PC6MD_101, PC6MD_110, PC6MD_111,</div><div class='add'>+	PC5MD_000, PC5MD_001, PC5MD_010, PC5MD_011,</div><div class='add'>+	PC5MD_100, PC5MD_101, PC5MD_110, PC5MD_111,</div><div class='add'>+	PC4MD_00, PC4MD_01, PC4MD_10, PC4MD_11,</div><div class='add'>+</div><div class='add'>+	PC3MD_00, PC3MD_01, PC3MD_10, PC3MD_11,</div><div class='add'>+	PC2MD_00, PC2MD_01, PC2MD_10, PC2MD_11,</div><div class='add'>+	PC1MD_0, PC1MD_1,</div><div class='add'>+	PC0MD_0, PC0MD_1,</div><div class='add'>+</div><div class='add'>+	/* Port D */</div><div class='add'>+	PD15_IOR_IN, PD15_IOR_OUT,</div><div class='add'>+	PD14_IOR_IN, PD14_IOR_OUT,</div><div class='add'>+	PD13_IOR_IN, PD13_IOR_OUT,</div><div class='add'>+	PD12_IOR_IN, PD12_IOR_OUT,</div><div class='add'>+	PD11_IOR_IN, PD11_IOR_OUT,</div><div class='add'>+	PD10_IOR_IN, PD10_IOR_OUT,</div><div class='add'>+	PD9_IOR_IN, PD9_IOR_OUT,</div><div class='add'>+	PD8_IOR_IN, PD8_IOR_OUT,</div><div class='add'>+	PD7_IOR_IN, PD7_IOR_OUT,</div><div class='add'>+	PD6_IOR_IN, PD6_IOR_OUT,</div><div class='add'>+	PD5_IOR_IN, PD5_IOR_OUT,</div><div class='add'>+	PD4_IOR_IN, PD4_IOR_OUT,</div><div class='add'>+	PD3_IOR_IN, PD3_IOR_OUT,</div><div class='add'>+	PD2_IOR_IN, PD2_IOR_OUT,</div><div class='add'>+	PD1_IOR_IN, PD1_IOR_OUT,</div><div class='add'>+	PD0_IOR_IN, PD0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11,</div><div class='add'>+	PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11,</div><div class='add'>+	PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11,</div><div class='add'>+	PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11,</div><div class='add'>+</div><div class='add'>+	PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11,</div><div class='add'>+	PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11,</div><div class='add'>+	PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11,</div><div class='add'>+	PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11,</div><div class='add'>+</div><div class='add'>+	PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11,</div><div class='add'>+	PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11,</div><div class='add'>+	PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11,</div><div class='add'>+	PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11,</div><div class='add'>+</div><div class='add'>+	PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11,</div><div class='add'>+	PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11,</div><div class='add'>+	PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11,</div><div class='add'>+	PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11,</div><div class='add'>+</div><div class='add'>+	/* Port E */</div><div class='add'>+	PE7_IOR_IN, PE7_IOR_OUT,</div><div class='add'>+	PE6_IOR_IN, PE6_IOR_OUT,</div><div class='add'>+	PE5_IOR_IN, PE5_IOR_OUT,</div><div class='add'>+	PE4_IOR_IN, PE4_IOR_OUT,</div><div class='add'>+	PE3_IOR_IN, PE3_IOR_OUT,</div><div class='add'>+	PE2_IOR_IN, PE2_IOR_OUT,</div><div class='add'>+	PE1_IOR_IN, PE1_IOR_OUT,</div><div class='add'>+	PE0_IOR_IN, PE0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PE7MD_00, PE7MD_01, PE7MD_10, PE7MD_11,</div><div class='add'>+	PE6MD_00, PE6MD_01, PE6MD_10, PE6MD_11,</div><div class='add'>+	PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11,</div><div class='add'>+	PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11,</div><div class='add'>+</div><div class='add'>+	PE3MD_000, PE3MD_001, PE3MD_010, PE3MD_011,</div><div class='add'>+	PE3MD_100, PE3MD_101, PE3MD_110, PE3MD_111,</div><div class='add'>+	PE2MD_000, PE2MD_001, PE2MD_010, PE2MD_011,</div><div class='add'>+	PE2MD_100, PE2MD_101, PE2MD_110, PE2MD_111,</div><div class='add'>+	PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011,</div><div class='add'>+	PE1MD_100, PE1MD_101, PE1MD_110, PE1MD_111,</div><div class='add'>+	PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11,</div><div class='add'>+</div><div class='add'>+	/* Port F */</div><div class='add'>+	PF23_IOR_IN, PF23_IOR_OUT,</div><div class='add'>+	PF22_IOR_IN, PF22_IOR_OUT,</div><div class='add'>+	PF21_IOR_IN, PF21_IOR_OUT,</div><div class='add'>+	PF20_IOR_IN, PF20_IOR_OUT,</div><div class='add'>+	PF19_IOR_IN, PF19_IOR_OUT,</div><div class='add'>+	PF18_IOR_IN, PF18_IOR_OUT,</div><div class='add'>+	PF17_IOR_IN, PF17_IOR_OUT,</div><div class='add'>+	PF16_IOR_IN, PF16_IOR_OUT,</div><div class='add'>+	PF15_IOR_IN, PF15_IOR_OUT,</div><div class='add'>+	PF14_IOR_IN, PF14_IOR_OUT,</div><div class='add'>+	PF13_IOR_IN, PF13_IOR_OUT,</div><div class='add'>+	PF12_IOR_IN, PF12_IOR_OUT,</div><div class='add'>+	PF11_IOR_IN, PF11_IOR_OUT,</div><div class='add'>+	PF10_IOR_IN, PF10_IOR_OUT,</div><div class='add'>+	PF9_IOR_IN, PF9_IOR_OUT,</div><div class='add'>+	PF8_IOR_IN, PF8_IOR_OUT,</div><div class='add'>+	PF7_IOR_IN, PF7_IOR_OUT,</div><div class='add'>+	PF6_IOR_IN, PF6_IOR_OUT,</div><div class='add'>+	PF5_IOR_IN, PF5_IOR_OUT,</div><div class='add'>+	PF4_IOR_IN, PF4_IOR_OUT,</div><div class='add'>+	PF3_IOR_IN, PF3_IOR_OUT,</div><div class='add'>+	PF2_IOR_IN, PF2_IOR_OUT,</div><div class='add'>+	PF1_IOR_IN, PF1_IOR_OUT,</div><div class='add'>+	PF0_IOR_IN, PF0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PF23MD_000, PF23MD_001, PF23MD_010, PF23MD_011,</div><div class='add'>+	PF23MD_100, PF23MD_101, PF23MD_110, PF23MD_111,</div><div class='add'>+	PF22MD_000, PF22MD_001, PF22MD_010, PF22MD_011,</div><div class='add'>+	PF22MD_100, PF22MD_101, PF22MD_110, PF22MD_111,</div><div class='add'>+	PF21MD_000, PF21MD_001, PF21MD_010, PF21MD_011,</div><div class='add'>+	PF21MD_100, PF21MD_101, PF21MD_110, PF21MD_111,</div><div class='add'>+	PF20MD_000, PF20MD_001, PF20MD_010, PF20MD_011,</div><div class='add'>+	PF20MD_100, PF20MD_101, PF20MD_110, PF20MD_111,</div><div class='add'>+</div><div class='add'>+	PF19MD_000, PF19MD_001, PF19MD_010, PF19MD_011,</div><div class='add'>+	PF19MD_100, PF19MD_101, PF19MD_110, PF19MD_111,</div><div class='add'>+	PF18MD_000, PF18MD_001, PF18MD_010, PF18MD_011,</div><div class='add'>+	PF18MD_100, PF18MD_101, PF18MD_110, PF18MD_111,</div><div class='add'>+	PF17MD_000, PF17MD_001, PF17MD_010, PF17MD_011,</div><div class='add'>+	PF17MD_100, PF17MD_101, PF17MD_110, PF17MD_111,</div><div class='add'>+	PF16MD_000, PF16MD_001, PF16MD_010, PF16MD_011,</div><div class='add'>+	PF16MD_100, PF16MD_101, PF16MD_110, PF16MD_111,</div><div class='add'>+</div><div class='add'>+	PF15MD_000, PF15MD_001, PF15MD_010, PF15MD_011,</div><div class='add'>+	PF15MD_100, PF15MD_101, PF15MD_110, PF15MD_111,</div><div class='add'>+	PF14MD_000, PF14MD_001, PF14MD_010, PF14MD_011,</div><div class='add'>+	PF14MD_100, PF14MD_101, PF14MD_110, PF14MD_111,</div><div class='add'>+	PF13MD_000, PF13MD_001, PF13MD_010, PF13MD_011,</div><div class='add'>+	PF13MD_100, PF13MD_101, PF13MD_110, PF13MD_111,</div><div class='add'>+	PF12MD_000, PF12MD_001, PF12MD_010, PF12MD_011,</div><div class='add'>+	PF12MD_100, PF12MD_101, PF12MD_110, PF12MD_111,</div><div class='add'>+</div><div class='add'>+	PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011,</div><div class='add'>+	PF11MD_100, PF11MD_101, PF11MD_110, PF11MD_111,</div><div class='add'>+	PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011,</div><div class='add'>+	PF10MD_100, PF10MD_101, PF10MD_110, PF10MD_111,</div><div class='add'>+	PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011,</div><div class='add'>+	PF9MD_100, PF9MD_101, PF9MD_110, PF9MD_111,</div><div class='add'>+	PF8MD_000, PF8MD_001, PF8MD_010, PF8MD_011,</div><div class='add'>+	PF8MD_100, PF8MD_101, PF8MD_110, PF8MD_111,</div><div class='add'>+</div><div class='add'>+	PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011,</div><div class='add'>+	PF7MD_100, PF7MD_101, PF7MD_110, PF7MD_111,</div><div class='add'>+	PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011,</div><div class='add'>+	PF6MD_100, PF6MD_101, PF6MD_110, PF6MD_111,</div><div class='add'>+	PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011,</div><div class='add'>+	PF5MD_100, PF5MD_101, PF5MD_110, PF5MD_111,</div><div class='add'>+	PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011,</div><div class='add'>+	PF4MD_100, PF4MD_101, PF4MD_110, PF4MD_111,</div><div class='add'>+</div><div class='add'>+	PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011,</div><div class='add'>+	PF3MD_100, PF3MD_101, PF3MD_110, PF3MD_111,</div><div class='add'>+	PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011,</div><div class='add'>+	PF2MD_100, PF2MD_101, PF2MD_110, PF2MD_111,</div><div class='add'>+	PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,</div><div class='add'>+	PF1MD_100, PF1MD_101, PF1MD_110, PF1MD_111,</div><div class='add'>+	PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011,</div><div class='add'>+	PF0MD_100, PF0MD_101, PF0MD_110, PF0MD_111,</div><div class='add'>+</div><div class='add'>+	/* Port G */</div><div class='add'>+	PG27_IOR_IN, PG27_IOR_OUT,</div><div class='add'>+	PG26_IOR_IN, PG26_IOR_OUT,</div><div class='add'>+	PG25_IOR_IN, PG25_IOR_OUT,</div><div class='add'>+	PG24_IOR_IN, PG24_IOR_OUT,</div><div class='add'>+	PG23_IOR_IN, PG23_IOR_OUT,</div><div class='add'>+	PG22_IOR_IN, PG22_IOR_OUT,</div><div class='add'>+	PG21_IOR_IN, PG21_IOR_OUT,</div><div class='add'>+	PG20_IOR_IN, PG20_IOR_OUT,</div><div class='add'>+	PG19_IOR_IN, PG19_IOR_OUT,</div><div class='add'>+	PG18_IOR_IN, PG18_IOR_OUT,</div><div class='add'>+	PG17_IOR_IN, PG17_IOR_OUT,</div><div class='add'>+	PG16_IOR_IN, PG16_IOR_OUT,</div><div class='add'>+	PG15_IOR_IN, PG15_IOR_OUT,</div><div class='add'>+	PG14_IOR_IN, PG14_IOR_OUT,</div><div class='add'>+	PG13_IOR_IN, PG13_IOR_OUT,</div><div class='add'>+	PG12_IOR_IN, PG12_IOR_OUT,</div><div class='add'>+	PG11_IOR_IN, PG11_IOR_OUT,</div><div class='add'>+	PG10_IOR_IN, PG10_IOR_OUT,</div><div class='add'>+	PG9_IOR_IN, PG9_IOR_OUT,</div><div class='add'>+	PG8_IOR_IN, PG8_IOR_OUT,</div><div class='add'>+	PG7_IOR_IN, PG7_IOR_OUT,</div><div class='add'>+	PG6_IOR_IN, PG6_IOR_OUT,</div><div class='add'>+	PG5_IOR_IN, PG5_IOR_OUT,</div><div class='add'>+	PG4_IOR_IN, PG4_IOR_OUT,</div><div class='add'>+	PG3_IOR_IN, PG3_IOR_OUT,</div><div class='add'>+	PG2_IOR_IN, PG2_IOR_OUT,</div><div class='add'>+	PG1_IOR_IN, PG1_IOR_OUT,</div><div class='add'>+	PG0_IOR_IN, PG0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PG27MD_00, PG27MD_01, PG27MD_10, PG27MD_11,</div><div class='add'>+	PG26MD_00, PG26MD_01, PG26MD_10, PG26MD_11,</div><div class='add'>+	PG25MD_00, PG25MD_01, PG25MD_10, PG25MD_11,</div><div class='add'>+	PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11,</div><div class='add'>+</div><div class='add'>+	PG23MD_000, PG23MD_001, PG23MD_010, PG23MD_011,</div><div class='add'>+	PG23MD_100, PG23MD_101, PG23MD_110, PG23MD_111,</div><div class='add'>+	PG22MD_000, PG22MD_001, PG22MD_010, PG22MD_011,</div><div class='add'>+	PG22MD_100, PG22MD_101, PG22MD_110, PG22MD_111,</div><div class='add'>+	PG21MD_000, PG21MD_001, PG21MD_010, PG21MD_011,</div><div class='add'>+	PG21MD_100, PG21MD_101, PG21MD_110, PG21MD_111,</div><div class='add'>+	PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011,</div><div class='add'>+	PG20MD_100, PG20MD_101, PG20MD_110, PG20MD_111,</div><div class='add'>+</div><div class='add'>+	PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011,</div><div class='add'>+	PG19MD_100, PG19MD_101, PG19MD_110, PG19MD_111,</div><div class='add'>+	PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011,</div><div class='add'>+	PG18MD_100, PG18MD_101, PG18MD_110, PG18MD_111,</div><div class='add'>+	PG17MD_00, PG17MD_01, PG17MD_10, PG17MD_11,</div><div class='add'>+	PG16MD_00, PG16MD_01, PG16MD_10, PG16MD_11,</div><div class='add'>+</div><div class='add'>+	PG15MD_00, PG15MD_01, PG15MD_10, PG15MD_11,</div><div class='add'>+	PG14MD_00, PG14MD_01, PG14MD_10, PG14MD_11,</div><div class='add'>+	PG13MD_00, PG13MD_01, PG13MD_10, PG13MD_11,</div><div class='add'>+	PG12MD_00, PG12MD_01, PG12MD_10, PG12MD_11,</div><div class='add'>+</div><div class='add'>+	PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011,</div><div class='add'>+	PG11MD_100, PG11MD_101, PG11MD_110, PG11MD_111,</div><div class='add'>+	PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011,</div><div class='add'>+	PG10MD_100, PG10MD_101, PG10MD_110, PG10MD_111,</div><div class='add'>+	PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011,</div><div class='add'>+	PG9MD_100, PG9MD_101, PG9MD_110, PG9MD_111,</div><div class='add'>+	PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011,</div><div class='add'>+	PG8MD_100, PG8MD_101, PG8MD_110, PG8MD_111,</div><div class='add'>+</div><div class='add'>+	PG7MD_000, PG7MD_001, PG7MD_010, PG7MD_011,</div><div class='add'>+	PG7MD_100, PG7MD_101, PG7MD_110, PG7MD_111,</div><div class='add'>+	PG6MD_000, PG6MD_001, PG6MD_010, PG6MD_011,</div><div class='add'>+	PG6MD_100, PG6MD_101, PG6MD_110, PG6MD_111,</div><div class='add'>+	PG5MD_000, PG5MD_001, PG5MD_010, PG5MD_011,</div><div class='add'>+	PG5MD_100, PG5MD_101, PG5MD_110, PG5MD_111,</div><div class='add'>+	PG4MD_000, PG4MD_001, PG4MD_010, PG4MD_011,</div><div class='add'>+	PG4MD_100, PG4MD_101, PG4MD_110, PG4MD_111,</div><div class='add'>+</div><div class='add'>+	PG3MD_000, PG3MD_001, PG3MD_010, PG3MD_011,</div><div class='add'>+	PG3MD_100, PG3MD_101, PG3MD_110, PG3MD_111,</div><div class='add'>+	PG2MD_000, PG2MD_001, PG2MD_010, PG2MD_011,</div><div class='add'>+	PG2MD_100, PG2MD_101, PG2MD_110, PG2MD_111,</div><div class='add'>+	PG1MD_000, PG1MD_001, PG1MD_010, PG1MD_011,</div><div class='add'>+	PG1MD_100, PG1MD_101, PG1MD_110, PG1MD_111,</div><div class='add'>+	PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011,</div><div class='add'>+	PG0MD_100, PG0MD_101, PG0MD_110, PG0MD_111,</div><div class='add'>+</div><div class='add'>+	/* Port H */</div><div class='add'>+	PH7MD_00, PH7MD_01, PH7MD_10, PH7MD_11,</div><div class='add'>+	PH6MD_00, PH6MD_01, PH6MD_10, PH6MD_11,</div><div class='add'>+	PH5MD_00, PH5MD_01, PH5MD_10, PH5MD_11,</div><div class='add'>+	PH4MD_00, PH4MD_01, PH4MD_10, PH4MD_11,</div><div class='add'>+</div><div class='add'>+	PH3MD_00, PH3MD_01, PH3MD_10, PH3MD_11,</div><div class='add'>+	PH2MD_00, PH2MD_01, PH2MD_10, PH2MD_11,</div><div class='add'>+	PH1MD_00, PH1MD_01, PH1MD_10, PH1MD_11,</div><div class='add'>+	PH0MD_00, PH0MD_01, PH0MD_10, PH0MD_11,</div><div class='add'>+</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+</div><div class='add'>+	/* Port J */</div><div class='add'>+	PJ31_IOR_IN, PJ31_IOR_OUT,</div><div class='add'>+	PJ30_IOR_IN, PJ30_IOR_OUT,</div><div class='add'>+	PJ29_IOR_IN, PJ29_IOR_OUT,</div><div class='add'>+	PJ28_IOR_IN, PJ28_IOR_OUT,</div><div class='add'>+	PJ27_IOR_IN, PJ27_IOR_OUT,</div><div class='add'>+	PJ26_IOR_IN, PJ26_IOR_OUT,</div><div class='add'>+	PJ25_IOR_IN, PJ25_IOR_OUT,</div><div class='add'>+	PJ24_IOR_IN, PJ24_IOR_OUT,</div><div class='add'>+	PJ23_IOR_IN, PJ23_IOR_OUT,</div><div class='add'>+	PJ22_IOR_IN, PJ22_IOR_OUT,</div><div class='add'>+	PJ21_IOR_IN, PJ21_IOR_OUT,</div><div class='add'>+	PJ20_IOR_IN, PJ20_IOR_OUT,</div><div class='add'>+	PJ19_IOR_IN, PJ19_IOR_OUT,</div><div class='add'>+	PJ18_IOR_IN, PJ18_IOR_OUT,</div><div class='add'>+	PJ17_IOR_IN, PJ17_IOR_OUT,</div><div class='add'>+	PJ16_IOR_IN, PJ16_IOR_OUT,</div><div class='add'>+	PJ15_IOR_IN, PJ15_IOR_OUT,</div><div class='add'>+	PJ14_IOR_IN, PJ14_IOR_OUT,</div><div class='add'>+	PJ13_IOR_IN, PJ13_IOR_OUT,</div><div class='add'>+	PJ12_IOR_IN, PJ12_IOR_OUT,</div><div class='add'>+	PJ11_IOR_IN, PJ11_IOR_OUT,</div><div class='add'>+	PJ10_IOR_IN, PJ10_IOR_OUT,</div><div class='add'>+	PJ9_IOR_IN, PJ9_IOR_OUT,</div><div class='add'>+	PJ8_IOR_IN, PJ8_IOR_OUT,</div><div class='add'>+	PJ7_IOR_IN, PJ7_IOR_OUT,</div><div class='add'>+	PJ6_IOR_IN, PJ6_IOR_OUT,</div><div class='add'>+	PJ5_IOR_IN, PJ5_IOR_OUT,</div><div class='add'>+	PJ4_IOR_IN, PJ4_IOR_OUT,</div><div class='add'>+	PJ3_IOR_IN, PJ3_IOR_OUT,</div><div class='add'>+	PJ2_IOR_IN, PJ2_IOR_OUT,</div><div class='add'>+	PJ1_IOR_IN, PJ1_IOR_OUT,</div><div class='add'>+	PJ0_IOR_IN, PJ0_IOR_OUT,</div><div class='add'>+</div><div class='add'>+	PJ31MD_0, PJ31MD_1,</div><div class='add'>+	PJ30MD_000, PJ30MD_001, PJ30MD_010, PJ30MD_011,</div><div class='add'>+	PJ30MD_100, PJ30MD_101, PJ30MD_110, PJ30MD_111,</div><div class='add'>+	PJ29MD_000, PJ29MD_001, PJ29MD_010, PJ29MD_011,</div><div class='add'>+	PJ29MD_100, PJ29MD_101, PJ29MD_110, PJ29MD_111,</div><div class='add'>+	PJ28MD_000, PJ28MD_001, PJ28MD_010, PJ28MD_011,</div><div class='add'>+	PJ28MD_100, PJ28MD_101, PJ28MD_110, PJ28MD_111,</div><div class='add'>+</div><div class='add'>+	PJ27MD_000, PJ27MD_001, PJ27MD_010, PJ27MD_011,</div><div class='add'>+	PJ27MD_100, PJ27MD_101, PJ27MD_110, PJ27MD_111,</div><div class='add'>+	PJ26MD_000, PJ26MD_001, PJ26MD_010, PJ26MD_011,</div><div class='add'>+	PJ26MD_100, PJ26MD_101, PJ26MD_110, PJ26MD_111,</div><div class='add'>+	PJ25MD_000, PJ25MD_001, PJ25MD_010, PJ25MD_011,</div><div class='add'>+	PJ25MD_100, PJ25MD_101, PJ25MD_110, PJ25MD_111,</div><div class='add'>+	PJ24MD_000, PJ24MD_001, PJ24MD_010, PJ24MD_011,</div><div class='add'>+	PJ24MD_100, PJ24MD_101, PJ24MD_110, PJ24MD_111,</div><div class='add'>+</div><div class='add'>+	PJ23MD_000, PJ23MD_001, PJ23MD_010, PJ23MD_011,</div><div class='add'>+	PJ23MD_100, PJ23MD_101, PJ23MD_110, PJ23MD_111,</div><div class='add'>+	PJ22MD_000, PJ22MD_001, PJ22MD_010, PJ22MD_011,</div><div class='add'>+	PJ22MD_100, PJ22MD_101, PJ22MD_110, PJ22MD_111,</div><div class='add'>+	PJ21MD_000, PJ21MD_001, PJ21MD_010, PJ21MD_011,</div><div class='add'>+	PJ21MD_100, PJ21MD_101, PJ21MD_110, PJ21MD_111,</div><div class='add'>+	PJ20MD_000, PJ20MD_001, PJ20MD_010, PJ20MD_011,</div><div class='add'>+	PJ20MD_100, PJ20MD_101, PJ20MD_110, PJ20MD_111,</div><div class='add'>+</div><div class='add'>+	PJ19MD_000, PJ19MD_001, PJ19MD_010, PJ19MD_011,</div><div class='add'>+	PJ19MD_100, PJ19MD_101, PJ19MD_110, PJ19MD_111,</div><div class='add'>+	PJ18MD_000, PJ18MD_001, PJ18MD_010, PJ18MD_011,</div><div class='add'>+	PJ18MD_100, PJ18MD_101, PJ18MD_110, PJ18MD_111,</div><div class='add'>+	PJ17MD_000, PJ17MD_001, PJ17MD_010, PJ17MD_011,</div><div class='add'>+	PJ17MD_100, PJ17MD_101, PJ17MD_110, PJ17MD_111,</div><div class='add'>+	PJ16MD_000, PJ16MD_001, PJ16MD_010, PJ16MD_011,</div><div class='add'>+	PJ16MD_100, PJ16MD_101, PJ16MD_110, PJ16MD_111,</div><div class='add'>+</div><div class='add'>+	PJ15MD_000, PJ15MD_001, PJ15MD_010, PJ15MD_011,</div><div class='add'>+	PJ15MD_100, PJ15MD_101, PJ15MD_110, PJ15MD_111,</div><div class='add'>+	PJ14MD_000, PJ14MD_001, PJ14MD_010, PJ14MD_011,</div><div class='add'>+	PJ14MD_100, PJ14MD_101, PJ14MD_110, PJ14MD_111,</div><div class='add'>+	PJ13MD_000, PJ13MD_001, PJ13MD_010, PJ13MD_011,</div><div class='add'>+	PJ13MD_100, PJ13MD_101, PJ13MD_110, PJ13MD_111,</div><div class='add'>+	PJ12MD_000, PJ12MD_001, PJ12MD_010, PJ12MD_011,</div><div class='add'>+	PJ12MD_100, PJ12MD_101, PJ12MD_110, PJ12MD_111,</div><div class='add'>+</div><div class='add'>+	PJ11MD_000, PJ11MD_001, PJ11MD_010, PJ11MD_011,</div><div class='add'>+	PJ11MD_100, PJ11MD_101, PJ11MD_110, PJ11MD_111,</div><div class='add'>+	PJ10MD_000, PJ10MD_001, PJ10MD_010, PJ10MD_011,</div><div class='add'>+	PJ10MD_100, PJ10MD_101, PJ10MD_110, PJ10MD_111,</div><div class='add'>+	PJ9MD_000, PJ9MD_001, PJ9MD_010, PJ9MD_011,</div><div class='add'>+	PJ9MD_100, PJ9MD_101, PJ9MD_110, PJ9MD_111,</div><div class='add'>+	PJ8MD_000, PJ8MD_001, PJ8MD_010, PJ8MD_011,</div><div class='add'>+	PJ8MD_100, PJ8MD_101, PJ8MD_110, PJ8MD_111,</div><div class='add'>+</div><div class='add'>+	PJ7MD_000, PJ7MD_001, PJ7MD_010, PJ7MD_011,</div><div class='add'>+	PJ7MD_100, PJ7MD_101, PJ7MD_110, PJ7MD_111,</div><div class='add'>+	PJ6MD_000, PJ6MD_001, PJ6MD_010, PJ6MD_011,</div><div class='add'>+	PJ6MD_100, PJ6MD_101, PJ6MD_110, PJ6MD_111,</div><div class='add'>+	PJ5MD_000, PJ5MD_001, PJ5MD_010, PJ5MD_011,</div><div class='add'>+	PJ5MD_100, PJ5MD_101, PJ5MD_110, PJ5MD_111,</div><div class='add'>+	PJ4MD_000, PJ4MD_001, PJ4MD_010, PJ4MD_011,</div><div class='add'>+	PJ4MD_100, PJ4MD_101, PJ4MD_110, PJ4MD_111,</div><div class='add'>+</div><div class='add'>+	PJ3MD_000, PJ3MD_001, PJ3MD_010, PJ3MD_011,</div><div class='add'>+	PJ3MD_100, PJ3MD_101, PJ3MD_110, PJ3MD_111,</div><div class='add'>+	PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011,</div><div class='add'>+	PJ2MD_100, PJ2MD_101, PJ2MD_110, PJ2MD_111,</div><div class='add'>+	PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011,</div><div class='add'>+	PJ1MD_100, PJ1MD_101, PJ1MD_110, PJ1MD_111,</div><div class='add'>+	PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011,</div><div class='add'>+	PJ0MD_100, PJ0MD_101, PJ0MD_110, PJ0MD_111,</div><div class='add'>+</div><div class='add'>+	PINMUX_FUNCTION_END,</div><div class='add'>+</div><div class='add'>+	PINMUX_MARK_BEGIN,</div><div class='add'>+	/* Port H */</div><div class='add'>+	PHAN7_MARK, PHAN6_MARK, PHAN5_MARK, PHAN4_MARK,</div><div class='add'>+	PHAN3_MARK, PHAN2_MARK, PHAN1_MARK, PHAN0_MARK,</div><div class='add'>+</div><div class='add'>+	/* IRQs */</div><div class='add'>+	IRQ7_PG_MARK, IRQ6_PG_MARK, IRQ5_PG_MARK, IRQ4_PG_MARK,</div><div class='add'>+	IRQ3_PG_MARK, IRQ2_PG_MARK, IRQ1_PG_MARK, IRQ0_PG_MARK,</div><div class='add'>+	IRQ7_PF_MARK, IRQ6_PF_MARK, IRQ5_PF_MARK, IRQ4_PF_MARK,</div><div class='add'>+	IRQ3_PJ_MARK, IRQ2_PJ_MARK, IRQ1_PJ_MARK, IRQ0_PJ_MARK,</div><div class='add'>+	IRQ1_PC_MARK, IRQ0_PC_MARK,</div><div class='add'>+</div><div class='add'>+	PINT7_PG_MARK, PINT6_PG_MARK, PINT5_PG_MARK, PINT4_PG_MARK,</div><div class='add'>+	PINT3_PG_MARK, PINT2_PG_MARK, PINT1_PG_MARK, PINT0_PG_MARK,</div><div class='add'>+	PINT7_PH_MARK, PINT6_PH_MARK, PINT5_PH_MARK, PINT4_PH_MARK,</div><div class='add'>+	PINT3_PH_MARK, PINT2_PH_MARK, PINT1_PH_MARK, PINT0_PH_MARK,</div><div class='add'>+	PINT7_PJ_MARK, PINT6_PJ_MARK, PINT5_PJ_MARK, PINT4_PJ_MARK,</div><div class='add'>+	PINT3_PJ_MARK, PINT2_PJ_MARK, PINT1_PJ_MARK, PINT0_PJ_MARK,</div><div class='add'>+</div><div class='add'>+	/* SD */</div><div class='add'>+	SD_D0_MARK, SD_D1_MARK, SD_D2_MARK, SD_D3_MARK,</div><div class='add'>+	SD_WP_MARK, SD_CLK_MARK, SD_CMD_MARK, SD_CD_MARK,</div><div class='add'>+</div><div class='add'>+	/* MMC */</div><div class='add'>+	MMC_D0_MARK, MMC_D1_MARK, MMC_D2_MARK, MMC_D3_MARK,</div><div class='add'>+	MMC_D4_MARK, MMC_D5_MARK, MMC_D6_MARK, MMC_D7_MARK,</div><div class='add'>+	MMC_CLK_MARK, MMC_CMD_MARK, MMC_CD_MARK,</div><div class='add'>+</div><div class='add'>+	/* PWM */</div><div class='add'>+	PWM1A_MARK, PWM1B_MARK, PWM1C_MARK, PWM1D_MARK,</div><div class='add'>+	PWM1E_MARK, PWM1F_MARK, PWM1G_MARK, PWM1H_MARK,</div><div class='add'>+	PWM2A_MARK, PWM2B_MARK, PWM2C_MARK, PWM2D_MARK,</div><div class='add'>+	PWM2E_MARK, PWM2F_MARK, PWM2G_MARK, PWM2H_MARK,</div><div class='add'>+</div><div class='add'>+	/* IEBus */</div><div class='add'>+	IERXD_MARK, IETXD_MARK,</div><div class='add'>+</div><div class='add'>+	/* WDT */</div><div class='add'>+	WDTOVF_MARK,</div><div class='add'>+</div><div class='add'>+	/* DMAC */</div><div class='add'>+	TEND0_MARK, DACK0_MARK, DREQ0_MARK,</div><div class='add'>+	TEND1_MARK, DACK1_MARK, DREQ1_MARK,</div><div class='add'>+</div><div class='add'>+	/* ADC */</div><div class='add'>+	ADTRG_MARK,</div><div class='add'>+</div><div class='add'>+	/* BSC */</div><div class='add'>+	A25_MARK, A24_MARK,</div><div class='add'>+	A23_MARK, A22_MARK, A21_MARK, A20_MARK,</div><div class='add'>+	A19_MARK, A18_MARK, A17_MARK, A16_MARK,</div><div class='add'>+	A15_MARK, A14_MARK, A13_MARK, A12_MARK,</div><div class='add'>+	A11_MARK, A10_MARK, A9_MARK, A8_MARK,</div><div class='add'>+	A7_MARK, A6_MARK, A5_MARK, A4_MARK,</div><div class='add'>+	A3_MARK, A2_MARK, A1_MARK, A0_MARK,</div><div class='add'>+	D31_MARK, D30_MARK, D29_MARK, D28_MARK,</div><div class='add'>+	D27_MARK, D26_MARK, D25_MARK, D24_MARK,</div><div class='add'>+	D23_MARK, D22_MARK, D21_MARK, D20_MARK,</div><div class='add'>+	D19_MARK, D18_MARK, D17_MARK, D16_MARK,</div><div class='add'>+	D15_MARK, D14_MARK, D13_MARK, D12_MARK,</div><div class='add'>+	D11_MARK, D10_MARK, D9_MARK, D8_MARK,</div><div class='add'>+	D7_MARK, D6_MARK, D5_MARK, D4_MARK,</div><div class='add'>+	D3_MARK, D2_MARK, D1_MARK, D0_MARK,</div><div class='add'>+	BS_MARK,</div><div class='add'>+	CS4_MARK, CS3_MARK, CS2_MARK, CS1_MARK, CS0_MARK,</div><div class='add'>+	CS5CE1A_MARK,</div><div class='add'>+	CE2A_MARK, CE2B_MARK,</div><div class='add'>+	RD_MARK, RDWR_MARK,</div><div class='add'>+	WE3ICIOWRAHDQMUU_MARK,</div><div class='add'>+	WE2ICIORDDQMUL_MARK,</div><div class='add'>+	WE1DQMUWE_MARK,</div><div class='add'>+	WE0DQML_MARK,</div><div class='add'>+	RAS_MARK, CAS_MARK, CKE_MARK,</div><div class='add'>+	WAIT_MARK, BREQ_MARK, BACK_MARK, IOIS16_MARK,</div><div class='add'>+</div><div class='add'>+	/* TMU */</div><div class='add'>+	TIOC0A_MARK, TIOC0B_MARK, TIOC0C_MARK, TIOC0D_MARK,</div><div class='add'>+	TIOC1A_MARK, TIOC1B_MARK,</div><div class='add'>+	TIOC2A_MARK, TIOC2B_MARK,</div><div class='add'>+	TIOC3A_MARK, TIOC3B_MARK, TIOC3C_MARK, TIOC3D_MARK,</div><div class='add'>+	TIOC4A_MARK, TIOC4B_MARK, TIOC4C_MARK, TIOC4D_MARK,</div><div class='add'>+	TCLKA_MARK, TCLKB_MARK, TCLKC_MARK, TCLKD_MARK,</div><div class='add'>+</div><div class='add'>+	/* SCIF */</div><div class='add'>+	SCK0_MARK, RXD0_MARK, TXD0_MARK,</div><div class='add'>+	SCK1_MARK, RXD1_MARK, TXD1_MARK, RTS1_MARK, CTS1_MARK,</div><div class='add'>+	SCK2_MARK, RXD2_MARK, TXD2_MARK,</div><div class='add'>+	SCK3_MARK, RXD3_MARK, TXD3_MARK,</div><div class='add'>+	SCK4_MARK, RXD4_MARK, TXD4_MARK,</div><div class='add'>+	SCK5_MARK, RXD5_MARK, TXD5_MARK, RTS5_MARK, CTS5_MARK,</div><div class='add'>+	SCK6_MARK, RXD6_MARK, TXD6_MARK,</div><div class='add'>+	SCK7_MARK, RXD7_MARK, TXD7_MARK, RTS7_MARK, CTS7_MARK,</div><div class='add'>+</div><div class='add'>+	/* RSPI */</div><div class='add'>+	MISO0_PB20_MARK, MOSI0_PB19_MARK, SSL00_PB18_MARK, RSPCK0_PB17_MARK,</div><div class='add'>+	MISO0_PJ19_MARK, MOSI0_PJ18_MARK, SSL00_PJ17_MARK, RSPCK0_PJ16_MARK,</div><div class='add'>+	MISO1_MARK, MOSI1_MARK, SSL10_MARK, RSPCK1_MARK,</div><div class='add'>+</div><div class='add'>+	/* IIC3 */</div><div class='add'>+	SCL0_MARK, SDA0_MARK,</div><div class='add'>+	SCL1_MARK, SDA1_MARK,</div><div class='add'>+	SCL2_MARK, SDA2_MARK,</div><div class='add'>+	SCL3_MARK, SDA3_MARK,</div><div class='add'>+</div><div class='add'>+	/* SSI */</div><div class='add'>+	SSISCK0_MARK, SSIWS0_MARK, SSITXD0_MARK, SSIRXD0_MARK,</div><div class='add'>+	SSISCK1_MARK, SSIWS1_MARK, SSIDATA1_MARK,</div><div class='add'>+	SSISCK2_MARK, SSIWS2_MARK, SSIDATA2_MARK,</div><div class='add'>+	SSISCK3_MARK, SSIWS3_MARK, SSIDATA3_MARK,</div><div class='add'>+	SSISCK4_MARK, SSIWS4_MARK, SSIDATA4_MARK,</div><div class='add'>+	SSISCK5_MARK, SSIWS5_MARK, SSIDATA5_MARK,</div><div class='add'>+	AUDIO_CLK_MARK,</div><div class='add'>+	AUDIO_XOUT_MARK,</div><div class='add'>+</div><div class='add'>+	/* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */</div><div class='add'>+	SIOFTXD_MARK, SIOFRXD_MARK, SIOFSYNC_MARK, SIOFSCK_MARK,</div><div class='add'>+</div><div class='add'>+	/* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */</div><div class='add'>+	SPDIF_IN_MARK, SPDIF_OUT_MARK,</div><div class='add'>+	SPDIF_IN_PJ24_MARK, SPDIF_OUT_PJ25_MARK,</div><div class='add'>+</div><div class='add'>+	/* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */</div><div class='add'>+	FCE_MARK,</div><div class='add'>+	FRB_MARK,</div><div class='add'>+</div><div class='add'>+	/* CAN */</div><div class='add'>+	CRX0_MARK, CTX0_MARK,</div><div class='add'>+	CRX1_MARK, CTX1_MARK,</div><div class='add'>+	CRX2_MARK, CTX2_MARK,</div><div class='add'>+	CRX0CRX1_MARK,</div><div class='add'>+	CRX0CRX1CRX2_MARK,</div><div class='add'>+	CTX0CTX1CTX2_MARK,</div><div class='add'>+	CRX1_PJ22_MARK, CTX1_PJ23_MARK,</div><div class='add'>+	CRX2_PJ20_MARK, CTX2_PJ21_MARK,</div><div class='add'>+	CRX0CRX1_PJ22_MARK,</div><div class='add'>+	CRX0CRX1CRX2_PJ20_MARK,</div><div class='add'>+</div><div class='add'>+	/* VDC */</div><div class='add'>+	DV_CLK_MARK,</div><div class='add'>+	DV_VSYNC_MARK, DV_HSYNC_MARK,</div><div class='add'>+	DV_DATA23_MARK, DV_DATA22_MARK, DV_DATA21_MARK, DV_DATA20_MARK,</div><div class='add'>+	DV_DATA19_MARK, DV_DATA18_MARK, DV_DATA17_MARK, DV_DATA16_MARK,</div><div class='add'>+	DV_DATA15_MARK, DV_DATA14_MARK, DV_DATA13_MARK, DV_DATA12_MARK,</div><div class='add'>+	DV_DATA11_MARK, DV_DATA10_MARK, DV_DATA9_MARK, DV_DATA8_MARK,</div><div class='add'>+	DV_DATA7_MARK, DV_DATA6_MARK, DV_DATA5_MARK, DV_DATA4_MARK,</div><div class='add'>+	DV_DATA3_MARK, DV_DATA2_MARK, DV_DATA1_MARK, DV_DATA0_MARK,</div><div class='add'>+	LCD_CLK_MARK, LCD_EXTCLK_MARK,</div><div class='add'>+	LCD_VSYNC_MARK, LCD_HSYNC_MARK, LCD_DE_MARK,</div><div class='add'>+	LCD_DATA23_MARK, LCD_DATA22_MARK, LCD_DATA21_MARK, LCD_DATA20_MARK,</div><div class='add'>+	LCD_DATA19_MARK, LCD_DATA18_MARK, LCD_DATA17_MARK, LCD_DATA16_MARK,</div><div class='add'>+	LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,</div><div class='add'>+	LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,</div><div class='add'>+	LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,</div><div class='add'>+	LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,</div><div class='add'>+	LCD_TCON6_MARK, LCD_TCON5_MARK, LCD_TCON4_MARK,</div><div class='add'>+	LCD_TCON3_MARK, LCD_TCON2_MARK, LCD_TCON1_MARK, LCD_TCON0_MARK,</div><div class='add'>+	LCD_M_DISP_MARK,</div><div class='add'>+	PINMUX_MARK_END,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static pinmux_enum_t pinmux_data[] = {</div><div class='add'>+</div><div class='add'>+	/* Port A */</div><div class='add'>+	PINMUX_DATA(PA1_DATA, PA1_IN),</div><div class='add'>+	PINMUX_DATA(PA0_DATA, PA0_IN),</div><div class='add'>+</div><div class='add'>+	/* Port B */</div><div class='add'>+	PINMUX_DATA(PB22_DATA, PB22MD_000, PB22_IN, PB22_OUT),</div><div class='add'>+	PINMUX_DATA(A22_MARK, PB22MD_001),</div><div class='add'>+	PINMUX_DATA(CTX2_MARK, PB22MD_010),</div><div class='add'>+	PINMUX_DATA(IETXD_MARK, PB22MD_011),</div><div class='add'>+	PINMUX_DATA(CS4_MARK, PB22MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PB21_DATA, PB21MD_00, PB21_IN, PB21_OUT),</div><div class='add'>+	PINMUX_DATA(A21_MARK, PB21MD_01),</div><div class='add'>+	PINMUX_DATA(CRX2_MARK, PB21MD_10),</div><div class='add'>+	PINMUX_DATA(IERXD_MARK, PB21MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(A20_MARK, PB20MD_001),</div><div class='add'>+	PINMUX_DATA(A19_MARK, PB19MD_001),</div><div class='add'>+	PINMUX_DATA(A18_MARK, PB18MD_001),</div><div class='add'>+	PINMUX_DATA(A17_MARK, PB17MD_001),</div><div class='add'>+	PINMUX_DATA(A16_MARK, PB16MD_001),</div><div class='add'>+	PINMUX_DATA(A15_MARK, PB15MD_001),</div><div class='add'>+	PINMUX_DATA(A14_MARK, PB14MD_001),</div><div class='add'>+	PINMUX_DATA(A13_MARK, PB13MD_001),</div><div class='add'>+	PINMUX_DATA(A12_MARK, PB12MD_01),</div><div class='add'>+	PINMUX_DATA(A11_MARK, PB11MD_01),</div><div class='add'>+	PINMUX_DATA(A10_MARK, PB10MD_01),</div><div class='add'>+	PINMUX_DATA(A9_MARK, PB9MD_01),</div><div class='add'>+	PINMUX_DATA(A8_MARK, PB8MD_01),</div><div class='add'>+	PINMUX_DATA(A7_MARK, PB7MD_01),</div><div class='add'>+	PINMUX_DATA(A6_MARK, PB6MD_01),</div><div class='add'>+	PINMUX_DATA(A5_MARK, PB5MD_01),</div><div class='add'>+	PINMUX_DATA(A4_MARK, PB4MD_01),</div><div class='add'>+	PINMUX_DATA(A3_MARK, PB3MD_01),</div><div class='add'>+	PINMUX_DATA(A2_MARK, PB2MD_01),</div><div class='add'>+	PINMUX_DATA(A1_MARK, PB1MD_01),</div><div class='add'>+</div><div class='add'>+	/* Port C */</div><div class='add'>+	PINMUX_DATA(PC8_DATA, PC8MD_000),</div><div class='add'>+	PINMUX_DATA(CS3_MARK, PC8MD_001),</div><div class='add'>+	PINMUX_DATA(TXD7_MARK, PC8MD_010),</div><div class='add'>+	PINMUX_DATA(CTX1_MARK, PC8MD_011),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PC7_DATA, PC7MD_000),</div><div class='add'>+	PINMUX_DATA(CKE_MARK, PC7MD_001),</div><div class='add'>+	PINMUX_DATA(RXD7_MARK, PC7MD_010),</div><div class='add'>+	PINMUX_DATA(CRX1_MARK, PC7MD_011),</div><div class='add'>+	PINMUX_DATA(CRX0CRX1_MARK, PC7MD_100),</div><div class='add'>+	PINMUX_DATA(IRQ1_PC_MARK, PC7MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PC6_DATA, PC6MD_000),</div><div class='add'>+	PINMUX_DATA(CAS_MARK, PC6MD_001),</div><div class='add'>+	PINMUX_DATA(SCK7_MARK, PC6MD_010),</div><div class='add'>+	PINMUX_DATA(CTX0_MARK, PC6MD_011),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PC5_DATA, PC5MD_000),</div><div class='add'>+	PINMUX_DATA(RAS_MARK, PC5MD_001),</div><div class='add'>+	PINMUX_DATA(CRX0_MARK, PC5MD_011),</div><div class='add'>+	PINMUX_DATA(CTX0CTX1CTX2_MARK, PC5MD_100),</div><div class='add'>+	PINMUX_DATA(IRQ0_PC_MARK, PC5MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PC4_DATA, PC4MD_00),</div><div class='add'>+	PINMUX_DATA(WE1DQMUWE_MARK, PC4MD_01),</div><div class='add'>+	PINMUX_DATA(TXD6_MARK, PC4MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PC3_DATA, PC3MD_00),</div><div class='add'>+	PINMUX_DATA(WE0DQML_MARK, PC3MD_01),</div><div class='add'>+	PINMUX_DATA(RXD6_MARK, PC3MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PC2_DATA, PC2MD_00),</div><div class='add'>+	PINMUX_DATA(RDWR_MARK, PC2MD_01),</div><div class='add'>+	PINMUX_DATA(SCK5_MARK, PC2MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PC1_DATA, PC1MD_0),</div><div class='add'>+	PINMUX_DATA(RD_MARK, PC1MD_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PC0_DATA, PC0MD_0),</div><div class='add'>+	PINMUX_DATA(CS0_MARK, PC0MD_1),</div><div class='add'>+</div><div class='add'>+	/* Port D */</div><div class='add'>+	PINMUX_DATA(D15_MARK, PD15MD_01),</div><div class='add'>+	PINMUX_DATA(D14_MARK, PD14MD_01),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PD13_DATA, PD13MD_00),</div><div class='add'>+	PINMUX_DATA(D13_MARK, PD13MD_01),</div><div class='add'>+	PINMUX_DATA(PWM2F_MARK, PD13MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PD12_DATA, PD12MD_00),</div><div class='add'>+	PINMUX_DATA(D12_MARK, PD12MD_01),</div><div class='add'>+	PINMUX_DATA(PWM2E_MARK, PD12MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(D11_MARK, PD11MD_01),</div><div class='add'>+	PINMUX_DATA(D10_MARK, PD10MD_01),</div><div class='add'>+	PINMUX_DATA(D9_MARK, PD9MD_01),</div><div class='add'>+	PINMUX_DATA(D8_MARK, PD8MD_01),</div><div class='add'>+	PINMUX_DATA(D7_MARK, PD7MD_01),</div><div class='add'>+	PINMUX_DATA(D6_MARK, PD6MD_01),</div><div class='add'>+	PINMUX_DATA(D5_MARK, PD5MD_01),</div><div class='add'>+	PINMUX_DATA(D4_MARK, PD4MD_01),</div><div class='add'>+	PINMUX_DATA(D3_MARK, PD3MD_01),</div><div class='add'>+	PINMUX_DATA(D2_MARK, PD2MD_01),</div><div class='add'>+	PINMUX_DATA(D1_MARK, PD1MD_01),</div><div class='add'>+	PINMUX_DATA(D0_MARK, PD0MD_01),</div><div class='add'>+</div><div class='add'>+	/* Port E */</div><div class='add'>+	PINMUX_DATA(PE7_DATA, PE7MD_00),</div><div class='add'>+	PINMUX_DATA(SDA3_MARK, PE7MD_01),</div><div class='add'>+	PINMUX_DATA(RXD7_MARK, PE7MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PE6_DATA, PE6MD_00),</div><div class='add'>+	PINMUX_DATA(SCL3_MARK, PE6MD_01),</div><div class='add'>+	PINMUX_DATA(RXD6_MARK, PE6MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PE5_DATA, PE5MD_00),</div><div class='add'>+	PINMUX_DATA(SDA2_MARK, PE5MD_01),</div><div class='add'>+	PINMUX_DATA(RXD5_MARK, PE5MD_10),</div><div class='add'>+	PINMUX_DATA(DV_HSYNC_MARK, PE5MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PE4_DATA, PE4MD_00),</div><div class='add'>+	PINMUX_DATA(SCL2_MARK, PE4MD_01),</div><div class='add'>+	PINMUX_DATA(DV_VSYNC_MARK, PE4MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PE3_DATA, PE3MD_000),</div><div class='add'>+	PINMUX_DATA(SDA1_MARK, PE3MD_001),</div><div class='add'>+	PINMUX_DATA(TCLKD_MARK, PE3MD_010),</div><div class='add'>+	PINMUX_DATA(ADTRG_MARK, PE3MD_011),</div><div class='add'>+	PINMUX_DATA(DV_HSYNC_MARK, PE3MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PE2_DATA, PE2MD_000),</div><div class='add'>+	PINMUX_DATA(SCL1_MARK, PE2MD_001),</div><div class='add'>+	PINMUX_DATA(TCLKD_MARK, PE2MD_010),</div><div class='add'>+	PINMUX_DATA(IOIS16_MARK, PE2MD_011),</div><div class='add'>+	PINMUX_DATA(DV_VSYNC_MARK, PE2MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PE1_DATA, PE1MD_000),</div><div class='add'>+	PINMUX_DATA(SDA0_MARK, PE1MD_001),</div><div class='add'>+	PINMUX_DATA(TCLKB_MARK, PE1MD_010),</div><div class='add'>+	PINMUX_DATA(AUDIO_CLK_MARK, PE1MD_010),</div><div class='add'>+	PINMUX_DATA(DV_CLK_MARK, PE1MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PE0_DATA, PE0MD_00),</div><div class='add'>+	PINMUX_DATA(SCL0_MARK, PE0MD_01),</div><div class='add'>+	PINMUX_DATA(TCLKA_MARK, PE0MD_10),</div><div class='add'>+	PINMUX_DATA(LCD_EXTCLK_MARK, PE0MD_11),</div><div class='add'>+</div><div class='add'>+	/* Port F */</div><div class='add'>+	PINMUX_DATA(PF23_DATA, PF23MD_000),</div><div class='add'>+	PINMUX_DATA(SD_D2_MARK, PF23MD_001),</div><div class='add'>+	PINMUX_DATA(TXD3_MARK, PF23MD_100),</div><div class='add'>+	PINMUX_DATA(MMC_D2_MARK, PF23MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF22_DATA, PF22MD_000),</div><div class='add'>+	PINMUX_DATA(SD_D3_MARK, PF22MD_001),</div><div class='add'>+	PINMUX_DATA(RXD3_MARK, PF22MD_100),</div><div class='add'>+	PINMUX_DATA(MMC_D3_MARK, PF22MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF21_DATA, PF21MD_000),</div><div class='add'>+	PINMUX_DATA(SD_CMD_MARK, PF21MD_001),</div><div class='add'>+	PINMUX_DATA(SCK3_MARK, PF21MD_100),</div><div class='add'>+	PINMUX_DATA(MMC_CMD_MARK, PF21MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF20_DATA, PF20MD_000),</div><div class='add'>+	PINMUX_DATA(SD_CLK_MARK, PF20MD_001),</div><div class='add'>+	PINMUX_DATA(SSIDATA3_MARK, PF20MD_010),</div><div class='add'>+	PINMUX_DATA(MMC_CLK_MARK, PF20MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF19_DATA, PF19MD_000),</div><div class='add'>+	PINMUX_DATA(SD_D0_MARK, PF19MD_001),</div><div class='add'>+	PINMUX_DATA(SSIWS3_MARK, PF19MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ7_PF_MARK, PF19MD_100),</div><div class='add'>+	PINMUX_DATA(MMC_D0_MARK, PF19MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF18_DATA, PF18MD_000),</div><div class='add'>+	PINMUX_DATA(SD_D1_MARK, PF18MD_001),</div><div class='add'>+	PINMUX_DATA(SSISCK3_MARK, PF18MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ6_PF_MARK, PF18MD_100),</div><div class='add'>+	PINMUX_DATA(MMC_D1_MARK, PF18MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF17_DATA, PF17MD_000),</div><div class='add'>+	PINMUX_DATA(SD_WP_MARK, PF17MD_001),</div><div class='add'>+	PINMUX_DATA(FRB_MARK, PF17MD_011),</div><div class='add'>+	PINMUX_DATA(IRQ5_PF_MARK, PF17MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF16_DATA, PF16MD_000),</div><div class='add'>+	PINMUX_DATA(SD_CD_MARK, PF16MD_001),</div><div class='add'>+	PINMUX_DATA(FCE_MARK, PF16MD_011),</div><div class='add'>+	PINMUX_DATA(IRQ4_PF_MARK, PF16MD_100),</div><div class='add'>+	PINMUX_DATA(MMC_CD_MARK, PF16MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF15_DATA, PF15MD_000),</div><div class='add'>+	PINMUX_DATA(A0_MARK, PF15MD_001),</div><div class='add'>+	PINMUX_DATA(SSIDATA2_MARK, PF15MD_010),</div><div class='add'>+	PINMUX_DATA(WDTOVF_MARK, PF15MD_011),</div><div class='add'>+	PINMUX_DATA(TXD2_MARK, PF15MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF14_DATA, PF14MD_000),</div><div class='add'>+	PINMUX_DATA(A25_MARK, PF14MD_001),</div><div class='add'>+	PINMUX_DATA(SSIWS2_MARK, PF14MD_010),</div><div class='add'>+	PINMUX_DATA(RXD2_MARK, PF14MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF13_DATA, PF13MD_000),</div><div class='add'>+	PINMUX_DATA(A24_MARK, PF13MD_001),</div><div class='add'>+	PINMUX_DATA(SSISCK2_MARK, PF13MD_010),</div><div class='add'>+	PINMUX_DATA(SCK2_MARK, PF13MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF12_DATA, PF12MD_000),</div><div class='add'>+	PINMUX_DATA(SSIDATA1_MARK, PF12MD_010),</div><div class='add'>+	PINMUX_DATA(DV_DATA12_MARK, PF12MD_011),</div><div class='add'>+	PINMUX_DATA(TXD1_MARK, PF12MD_100),</div><div class='add'>+	PINMUX_DATA(MMC_D7_MARK, PF12MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF11_DATA, PF11MD_000),</div><div class='add'>+	PINMUX_DATA(SSIWS1_MARK, PF11MD_010),</div><div class='add'>+	PINMUX_DATA(DV_DATA2_MARK, PF11MD_011),</div><div class='add'>+	PINMUX_DATA(RXD1_MARK, PF11MD_100),</div><div class='add'>+	PINMUX_DATA(MMC_D6_MARK, PF11MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF10_DATA, PF10MD_000),</div><div class='add'>+	PINMUX_DATA(CS1_MARK, PF10MD_001),</div><div class='add'>+	PINMUX_DATA(SSISCK1_MARK, PF10MD_010),</div><div class='add'>+	PINMUX_DATA(DV_DATA1_MARK, PF10MD_011),</div><div class='add'>+	PINMUX_DATA(SCK1_MARK, PF10MD_100),</div><div class='add'>+	PINMUX_DATA(MMC_D5_MARK, PF10MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF9_DATA, PF9MD_000),</div><div class='add'>+	PINMUX_DATA(BS_MARK, PF9MD_001),</div><div class='add'>+	PINMUX_DATA(DV_DATA0_MARK, PF9MD_011),</div><div class='add'>+	PINMUX_DATA(SCK0_MARK, PF9MD_100),</div><div class='add'>+	PINMUX_DATA(MMC_D4_MARK, PF9MD_101),</div><div class='add'>+	PINMUX_DATA(RTS1_MARK, PF9MD_110),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF8_DATA, PF8MD_000),</div><div class='add'>+	PINMUX_DATA(A23_MARK, PF8MD_001),</div><div class='add'>+	PINMUX_DATA(TXD0_MARK, PF8MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF7_DATA, PF7MD_000),</div><div class='add'>+	PINMUX_DATA(SSIRXD0_MARK, PF7MD_010),</div><div class='add'>+	PINMUX_DATA(RXD0_MARK, PF7MD_100),</div><div class='add'>+	PINMUX_DATA(CTS1_MARK, PF7MD_110),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF6_DATA, PF6MD_000),</div><div class='add'>+	PINMUX_DATA(CE2A_MARK, PF6MD_001),</div><div class='add'>+	PINMUX_DATA(SSITXD0_MARK, PF6MD_010),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF5_DATA, PF5MD_000),</div><div class='add'>+	PINMUX_DATA(SSIWS0_MARK, PF5MD_010),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF4_DATA, PF4MD_000),</div><div class='add'>+	PINMUX_DATA(CS5CE1A_MARK, PF4MD_001),</div><div class='add'>+	PINMUX_DATA(SSISCK0_MARK, PF4MD_010),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF3_DATA, PF3MD_000),</div><div class='add'>+	PINMUX_DATA(CS2_MARK, PF3MD_001),</div><div class='add'>+	PINMUX_DATA(MISO1_MARK, PF3MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC4D_MARK, PF3MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF2_DATA, PF2MD_000),</div><div class='add'>+	PINMUX_DATA(WAIT_MARK, PF2MD_001),</div><div class='add'>+	PINMUX_DATA(MOSI1_MARK, PF2MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC4C_MARK, PF2MD_100),</div><div class='add'>+	PINMUX_DATA(TEND0_MARK, PF2MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF1_DATA, PF1MD_000),</div><div class='add'>+	PINMUX_DATA(BACK_MARK, PF1MD_001),</div><div class='add'>+	PINMUX_DATA(TIOC4B_MARK, PF1MD_100),</div><div class='add'>+	PINMUX_DATA(DACK0_MARK, PF1MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PF0_DATA, PF0MD_000),</div><div class='add'>+	PINMUX_DATA(BREQ_MARK, PF0MD_001),</div><div class='add'>+	PINMUX_DATA(RSPCK1_MARK, PF0MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC4A_MARK, PF0MD_100),</div><div class='add'>+	PINMUX_DATA(DREQ0_MARK, PF0MD_101),</div><div class='add'>+</div><div class='add'>+	/* Port G */</div><div class='add'>+	PINMUX_DATA(PG27_DATA, PG27MD_00),</div><div class='add'>+	PINMUX_DATA(LCD_TCON2_MARK, PG27MD_10),</div><div class='add'>+	PINMUX_DATA(LCD_EXTCLK_MARK, PG27MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG26_DATA, PG26MD_00),</div><div class='add'>+	PINMUX_DATA(LCD_TCON1_MARK, PG26MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG25_DATA, PG25MD_00),</div><div class='add'>+	PINMUX_DATA(LCD_TCON0_MARK, PG25MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG24_DATA, PG24MD_00),</div><div class='add'>+	PINMUX_DATA(LCD_CLK_MARK, PG24MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG23_DATA, PG23MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_DATA23_MARK, PG23MD_010),</div><div class='add'>+	PINMUX_DATA(LCD_TCON6_MARK, PG23MD_011),</div><div class='add'>+	PINMUX_DATA(TXD5_MARK, PG23MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG22_DATA, PG22MD_000),</div><div class='add'>+	PINMUX_DATA(LCD_DATA22_MARK, PG22MD_010),</div><div class='add'>+	PINMUX_DATA(LCD_TCON5_MARK, PG22MD_011),</div><div class='add'>+	PINMUX_DATA(RXD5_MARK, PG22MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG21_DATA, PG21MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA7_MARK, PG21MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA21_MARK, PG21MD_010),</div><div class='add'>+	PINMUX_DATA(LCD_TCON4_MARK, PG21MD_011),</div><div class='add'>+	PINMUX_DATA(TXD4_MARK, PG21MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG20_DATA, PG20MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA6_MARK, PG20MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA20_MARK, PG21MD_010),</div><div class='add'>+	PINMUX_DATA(LCD_TCON3_MARK, PG20MD_011),</div><div class='add'>+	PINMUX_DATA(RXD4_MARK, PG20MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG19_DATA, PG19MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA5_MARK, PG19MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA19_MARK, PG19MD_010),</div><div class='add'>+	PINMUX_DATA(SPDIF_OUT_MARK, PG19MD_011),</div><div class='add'>+	PINMUX_DATA(SCK5_MARK, PG19MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG18_DATA, PG18MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA4_MARK, PG18MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA18_MARK, PG18MD_010),</div><div class='add'>+	PINMUX_DATA(SPDIF_IN_MARK, PG18MD_011),</div><div class='add'>+	PINMUX_DATA(SCK4_MARK, PG18MD_100),</div><div class='add'>+</div><div class='add'>+// TODO hardware manual has PG17 3 bits wide in reg picture and 2 bits in description</div><div class='add'>+// we're going with 2 bits</div><div class='add'>+	PINMUX_DATA(PG17_DATA, PG17MD_00),</div><div class='add'>+	PINMUX_DATA(WE3ICIOWRAHDQMUU_MARK, PG17MD_01),</div><div class='add'>+	PINMUX_DATA(LCD_DATA17_MARK, PG17MD_10),</div><div class='add'>+</div><div class='add'>+// TODO hardware manual has PG16 3 bits wide in reg picture and 2 bits in description</div><div class='add'>+// we're going with 2 bits</div><div class='add'>+	PINMUX_DATA(PG16_DATA, PG16MD_00),</div><div class='add'>+	PINMUX_DATA(WE2ICIORDDQMUL_MARK, PG16MD_01),</div><div class='add'>+	PINMUX_DATA(LCD_DATA16_MARK, PG16MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG15_DATA, PG15MD_00),</div><div class='add'>+	PINMUX_DATA(D31_MARK, PG15MD_01),</div><div class='add'>+	PINMUX_DATA(LCD_DATA15_MARK, PG15MD_10),</div><div class='add'>+	PINMUX_DATA(PINT7_PG_MARK, PG15MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG14_DATA, PG14MD_00),</div><div class='add'>+	PINMUX_DATA(D30_MARK, PG14MD_01),</div><div class='add'>+	PINMUX_DATA(LCD_DATA14_MARK, PG14MD_10),</div><div class='add'>+	PINMUX_DATA(PINT6_PG_MARK, PG14MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG13_DATA, PG13MD_00),</div><div class='add'>+	PINMUX_DATA(D29_MARK, PG13MD_01),</div><div class='add'>+	PINMUX_DATA(LCD_DATA13_MARK, PG13MD_10),</div><div class='add'>+	PINMUX_DATA(PINT5_PG_MARK, PG13MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG12_DATA, PG12MD_00),</div><div class='add'>+	PINMUX_DATA(D28_MARK, PG12MD_01),</div><div class='add'>+	PINMUX_DATA(LCD_DATA12_MARK, PG12MD_10),</div><div class='add'>+	PINMUX_DATA(PINT4_PG_MARK, PG12MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG11_DATA, PG11MD_000),</div><div class='add'>+	PINMUX_DATA(D27_MARK, PG11MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA11_MARK, PG11MD_010),</div><div class='add'>+	PINMUX_DATA(PINT3_PG_MARK, PG11MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC3D_MARK, PG11MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG10_DATA, PG10MD_000),</div><div class='add'>+	PINMUX_DATA(D26_MARK, PG10MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA10_MARK, PG10MD_010),</div><div class='add'>+	PINMUX_DATA(PINT2_PG_MARK, PG10MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC3C_MARK, PG10MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG9_DATA, PG9MD_000),</div><div class='add'>+	PINMUX_DATA(D25_MARK, PG9MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA9_MARK, PG9MD_010),</div><div class='add'>+	PINMUX_DATA(PINT1_PG_MARK, PG9MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC3B_MARK, PG9MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG8_DATA, PG8MD_000),</div><div class='add'>+	PINMUX_DATA(D24_MARK, PG8MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA8_MARK, PG8MD_010),</div><div class='add'>+	PINMUX_DATA(PINT0_PG_MARK, PG8MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC3A_MARK, PG8MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG7_DATA, PG7MD_000),</div><div class='add'>+	PINMUX_DATA(D23_MARK, PG7MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA7_MARK, PG7MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ7_PG_MARK, PG7MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC2B_MARK, PG7MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG6_DATA, PG6MD_000),</div><div class='add'>+	PINMUX_DATA(D22_MARK, PG6MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA6_MARK, PG6MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ6_PG_MARK, PG6MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC2A_MARK, PG6MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG5_DATA, PG5MD_000),</div><div class='add'>+	PINMUX_DATA(D21_MARK, PG5MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA5_MARK, PG5MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ5_PG_MARK, PG5MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC1B_MARK, PG5MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG4_DATA, PG4MD_000),</div><div class='add'>+	PINMUX_DATA(D20_MARK, PG4MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA4_MARK, PG4MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ4_PG_MARK, PG4MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC1A_MARK, PG4MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG3_DATA, PG3MD_000),</div><div class='add'>+	PINMUX_DATA(D19_MARK, PG3MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA3_MARK, PG3MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ3_PG_MARK, PG3MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC0D_MARK, PG3MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG2_DATA, PG2MD_000),</div><div class='add'>+	PINMUX_DATA(D18_MARK, PG2MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA2_MARK, PG2MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ2_PG_MARK, PG2MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC0C_MARK, PG2MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG1_DATA, PG1MD_000),</div><div class='add'>+	PINMUX_DATA(D17_MARK, PG1MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA1_MARK, PG1MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ1_PG_MARK, PG1MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC0B_MARK, PG1MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PG0_DATA, PG0MD_000),</div><div class='add'>+	PINMUX_DATA(D16_MARK, PG0MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA0_MARK, PG0MD_010),</div><div class='add'>+	PINMUX_DATA(IRQ0_PG_MARK, PG0MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC0A_MARK, PG0MD_100),</div><div class='add'>+</div><div class='add'>+	/* Port H */</div><div class='add'>+	PINMUX_DATA(PH7_DATA, PH7MD_00),</div><div class='add'>+	PINMUX_DATA(PHAN7_MARK, PH7MD_01),</div><div class='add'>+	PINMUX_DATA(PINT7_PH_MARK, PH7MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH6_DATA, PH6MD_00),</div><div class='add'>+	PINMUX_DATA(PHAN6_MARK, PH6MD_01),</div><div class='add'>+	PINMUX_DATA(PINT6_PH_MARK, PH6MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH5_DATA, PH5MD_00),</div><div class='add'>+	PINMUX_DATA(PHAN5_MARK, PH5MD_01),</div><div class='add'>+	PINMUX_DATA(PINT5_PH_MARK, PH5MD_10),</div><div class='add'>+	PINMUX_DATA(LCD_EXTCLK_MARK, PH5MD_11),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH4_DATA, PH4MD_00),</div><div class='add'>+	PINMUX_DATA(PHAN4_MARK, PH4MD_01),</div><div class='add'>+	PINMUX_DATA(PINT4_PH_MARK, PH4MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH3_DATA, PH3MD_00),</div><div class='add'>+	PINMUX_DATA(PHAN3_MARK, PH3MD_01),</div><div class='add'>+	PINMUX_DATA(PINT3_PH_MARK, PH3MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH2_DATA, PH2MD_00),</div><div class='add'>+	PINMUX_DATA(PHAN2_MARK, PH2MD_01),</div><div class='add'>+	PINMUX_DATA(PINT2_PH_MARK, PH2MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH1_DATA, PH1MD_00),</div><div class='add'>+	PINMUX_DATA(PHAN1_MARK, PH1MD_01),</div><div class='add'>+	PINMUX_DATA(PINT1_PH_MARK, PH1MD_10),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PH0_DATA, PH0MD_00),</div><div class='add'>+	PINMUX_DATA(PHAN0_MARK, PH0MD_01),</div><div class='add'>+	PINMUX_DATA(PINT0_PH_MARK, PH0MD_10),</div><div class='add'>+</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+</div><div class='add'>+	/* Port J */</div><div class='add'>+	PINMUX_DATA(PJ31_DATA, PJ31MD_0),</div><div class='add'>+	PINMUX_DATA(DV_CLK_MARK, PJ31MD_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ30_DATA, PJ30MD_000),</div><div class='add'>+	PINMUX_DATA(SSIDATA5_MARK, PJ30MD_010),</div><div class='add'>+	PINMUX_DATA(TIOC2B_MARK, PJ30MD_100),</div><div class='add'>+	PINMUX_DATA(IETXD_MARK, PJ30MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ29_DATA, PJ29MD_000),</div><div class='add'>+	PINMUX_DATA(SSIWS5_MARK, PJ29MD_010),</div><div class='add'>+	PINMUX_DATA(TIOC2A_MARK, PJ29MD_100),</div><div class='add'>+	PINMUX_DATA(IERXD_MARK, PJ29MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ28_DATA, PJ28MD_000),</div><div class='add'>+	PINMUX_DATA(SSISCK5_MARK, PJ28MD_010),</div><div class='add'>+	PINMUX_DATA(TIOC1B_MARK, PJ28MD_100),</div><div class='add'>+	PINMUX_DATA(RTS7_MARK, PJ28MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ27_DATA, PJ27MD_000),</div><div class='add'>+	PINMUX_DATA(TIOC1A_MARK, PJ27MD_100),</div><div class='add'>+	PINMUX_DATA(CTS7_MARK, PJ27MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ26_DATA, PJ26MD_000),</div><div class='add'>+	PINMUX_DATA(SSIDATA4_MARK, PJ26MD_010),</div><div class='add'>+	PINMUX_DATA(LCD_TCON5_MARK, PJ26MD_011),</div><div class='add'>+	PINMUX_DATA(TXD7_MARK, PJ26MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ25_DATA, PJ25MD_000),</div><div class='add'>+	PINMUX_DATA(SSIWS4_MARK, PJ25MD_010),</div><div class='add'>+	PINMUX_DATA(LCD_TCON4_MARK, PJ25MD_011),</div><div class='add'>+	PINMUX_DATA(SPDIF_OUT_MARK, PJ25MD_100),</div><div class='add'>+	PINMUX_DATA(RXD7_MARK, PJ25MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ24_DATA, PJ24MD_000),</div><div class='add'>+	PINMUX_DATA(SSISCK4_MARK, PJ24MD_010),</div><div class='add'>+	PINMUX_DATA(LCD_TCON3_MARK, PJ24MD_011),</div><div class='add'>+	PINMUX_DATA(SPDIF_IN_MARK, PJ24MD_100),</div><div class='add'>+	PINMUX_DATA(SCK7_MARK, PJ24MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ23_DATA, PJ23MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA23_MARK, PJ23MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA23_MARK, PJ23MD_010),</div><div class='add'>+	PINMUX_DATA(LCD_TCON6_MARK, PJ23MD_011),</div><div class='add'>+	PINMUX_DATA(IRQ3_PJ_MARK, PJ23MD_100),</div><div class='add'>+	PINMUX_DATA(CTX1_MARK, PJ23MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ22_DATA, PJ22MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA22_MARK, PJ22MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA22_MARK, PJ22MD_010),</div><div class='add'>+	PINMUX_DATA(LCD_TCON5_MARK, PJ22MD_011),</div><div class='add'>+	PINMUX_DATA(IRQ2_PJ_MARK, PJ22MD_100),</div><div class='add'>+	PINMUX_DATA(CRX1_MARK, PJ22MD_101),</div><div class='add'>+	PINMUX_DATA(CRX0CRX1_MARK, PJ22MD_110),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ21_DATA, PJ21MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA21_MARK, PJ21MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA21_MARK, PJ21MD_010),</div><div class='add'>+	PINMUX_DATA(LCD_TCON4_MARK, PJ21MD_011),</div><div class='add'>+	PINMUX_DATA(IRQ1_PJ_MARK, PJ21MD_100),</div><div class='add'>+	PINMUX_DATA(CTX2_MARK, PJ21MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ20_DATA, PJ20MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA20_MARK, PJ20MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA20_MARK, PJ20MD_010),</div><div class='add'>+	PINMUX_DATA(LCD_TCON3_MARK, PJ20MD_011),</div><div class='add'>+	PINMUX_DATA(IRQ0_PJ_MARK, PJ20MD_100),</div><div class='add'>+	PINMUX_DATA(CRX2_MARK, PJ20MD_101),</div><div class='add'>+	PINMUX_DATA(CRX0CRX1CRX2_PJ20_MARK, PJ20MD_110),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ19_DATA, PJ19MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA19_MARK, PJ19MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA19_MARK, PJ19MD_010),</div><div class='add'>+	PINMUX_DATA(MISO0_PJ19_MARK, PJ19MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC0D_MARK, PJ19MD_100),</div><div class='add'>+	PINMUX_DATA(SIOFRXD_MARK, PJ19MD_101),</div><div class='add'>+	PINMUX_DATA(AUDIO_XOUT_MARK, PJ19MD_110),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ18_DATA, PJ18MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA18_MARK, PJ18MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA18_MARK, PJ18MD_010),</div><div class='add'>+	PINMUX_DATA(MOSI0_PJ18_MARK, PJ18MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC0C_MARK, PJ18MD_100),</div><div class='add'>+	PINMUX_DATA(SIOFTXD_MARK, PJ18MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ17_DATA, PJ17MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA17_MARK, PJ17MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA17_MARK, PJ17MD_010),</div><div class='add'>+	PINMUX_DATA(SSL00_PJ17_MARK, PJ17MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC0B_MARK, PJ17MD_100),</div><div class='add'>+	PINMUX_DATA(SIOFSYNC_MARK, PJ17MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ16_DATA, PJ16MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA16_MARK, PJ16MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA16_MARK, PJ16MD_010),</div><div class='add'>+	PINMUX_DATA(RSPCK0_PJ16_MARK, PJ16MD_011),</div><div class='add'>+	PINMUX_DATA(TIOC0A_MARK, PJ16MD_100),</div><div class='add'>+	PINMUX_DATA(SIOFSCK_MARK, PJ16MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ15_DATA, PJ15MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA15_MARK, PJ15MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA15_MARK, PJ15MD_010),</div><div class='add'>+	PINMUX_DATA(PINT7_PJ_MARK, PJ15MD_011),</div><div class='add'>+	PINMUX_DATA(PWM2H_MARK, PJ15MD_100),</div><div class='add'>+	PINMUX_DATA(TXD7_MARK, PJ15MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ14_DATA, PJ14MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA14_MARK, PJ14MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA14_MARK, PJ14MD_010),</div><div class='add'>+	PINMUX_DATA(PINT6_PJ_MARK, PJ14MD_011),</div><div class='add'>+	PINMUX_DATA(PWM2G_MARK, PJ14MD_100),</div><div class='add'>+	PINMUX_DATA(TXD6_MARK, PJ14MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ13_DATA, PJ13MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA13_MARK, PJ13MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA13_MARK, PJ13MD_010),</div><div class='add'>+	PINMUX_DATA(PINT5_PJ_MARK, PJ13MD_011),</div><div class='add'>+	PINMUX_DATA(PWM2F_MARK, PJ13MD_100),</div><div class='add'>+	PINMUX_DATA(TXD5_MARK, PJ13MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ12_DATA, PJ12MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA12_MARK, PJ12MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA12_MARK, PJ12MD_010),</div><div class='add'>+	PINMUX_DATA(PINT4_PJ_MARK, PJ12MD_011),</div><div class='add'>+	PINMUX_DATA(PWM2E_MARK, PJ12MD_100),</div><div class='add'>+	PINMUX_DATA(SCK7_MARK, PJ12MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ11_DATA, PJ11MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA11_MARK, PJ11MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA11_MARK, PJ11MD_010),</div><div class='add'>+	PINMUX_DATA(PINT3_PJ_MARK, PJ11MD_011),</div><div class='add'>+	PINMUX_DATA(PWM2D_MARK, PJ11MD_100),</div><div class='add'>+	PINMUX_DATA(SCK6_MARK, PJ11MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ10_DATA, PJ10MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA10_MARK, PJ10MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA10_MARK, PJ10MD_010),</div><div class='add'>+	PINMUX_DATA(PINT2_PJ_MARK, PJ10MD_011),</div><div class='add'>+	PINMUX_DATA(PWM2C_MARK, PJ10MD_100),</div><div class='add'>+	PINMUX_DATA(SCK5_MARK, PJ10MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ9_DATA, PJ9MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA9_MARK, PJ9MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA9_MARK, PJ9MD_010),</div><div class='add'>+	PINMUX_DATA(PINT1_PJ_MARK, PJ9MD_011),</div><div class='add'>+	PINMUX_DATA(PWM2B_MARK, PJ9MD_100),</div><div class='add'>+	PINMUX_DATA(RTS5_MARK, PJ9MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ8_DATA, PJ8MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA8_MARK, PJ8MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA8_MARK, PJ8MD_010),</div><div class='add'>+	PINMUX_DATA(PINT0_PJ_MARK, PJ8MD_011),</div><div class='add'>+	PINMUX_DATA(PWM2A_MARK, PJ8MD_100),</div><div class='add'>+	PINMUX_DATA(CTS5_MARK, PJ8MD_101),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ7_DATA, PJ7MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA7_MARK, PJ7MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA7_MARK, PJ7MD_010),</div><div class='add'>+	PINMUX_DATA(SD_D2_MARK, PJ7MD_011),</div><div class='add'>+	PINMUX_DATA(PWM1H_MARK, PJ7MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ6_DATA, PJ6MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA6_MARK, PJ6MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA6_MARK, PJ6MD_010),</div><div class='add'>+	PINMUX_DATA(SD_D3_MARK, PJ6MD_011),</div><div class='add'>+	PINMUX_DATA(PWM1G_MARK, PJ6MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ5_DATA, PJ5MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA5_MARK, PJ5MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA5_MARK, PJ5MD_010),</div><div class='add'>+	PINMUX_DATA(SD_CMD_MARK, PJ5MD_011),</div><div class='add'>+	PINMUX_DATA(PWM1F_MARK, PJ5MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ4_DATA, PJ4MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA4_MARK, PJ4MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA4_MARK, PJ4MD_010),</div><div class='add'>+	PINMUX_DATA(SD_CLK_MARK, PJ4MD_011),</div><div class='add'>+	PINMUX_DATA(PWM1E_MARK, PJ4MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ3_DATA, PJ3MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA3_MARK, PJ3MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA3_MARK, PJ3MD_010),</div><div class='add'>+	PINMUX_DATA(SD_D0_MARK, PJ3MD_011),</div><div class='add'>+	PINMUX_DATA(PWM1D_MARK, PJ3MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ2_DATA, PJ2MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA2_MARK, PJ2MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA2_MARK, PJ2MD_010),</div><div class='add'>+	PINMUX_DATA(SD_D1_MARK, PJ2MD_011),</div><div class='add'>+	PINMUX_DATA(PWM1C_MARK, PJ2MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ1_DATA, PJ1MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA1_MARK, PJ1MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA1_MARK, PJ1MD_010),</div><div class='add'>+	PINMUX_DATA(SD_WP_MARK, PJ1MD_011),</div><div class='add'>+	PINMUX_DATA(PWM1B_MARK, PJ1MD_100),</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(PJ0_DATA, PJ0MD_000),</div><div class='add'>+	PINMUX_DATA(DV_DATA0_MARK, PJ0MD_001),</div><div class='add'>+	PINMUX_DATA(LCD_DATA0_MARK, PJ0MD_010),</div><div class='add'>+	PINMUX_DATA(SD_CD_MARK, PJ0MD_011),</div><div class='add'>+	PINMUX_DATA(PWM1A_MARK, PJ0MD_100),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinmux_gpio pinmux_gpios[] = {</div><div class='add'>+	/* Port A */</div><div class='add'>+	PINMUX_GPIO(GPIO_PA1, PA1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PA0, PA0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port B */</div><div class='add'>+	PINMUX_GPIO(GPIO_PB22, PB22_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB21, PB21_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB20, PB20_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB19, PB19_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB18, PB18_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB17, PB17_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB16, PB16_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB15, PB15_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB14, PB14_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB13, PB13_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB12, PB12_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB11, PB11_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB10, PB10_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB9, PB9_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB8, PB8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB7, PB7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB6, PB6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB5, PB5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB4, PB4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB3, PB3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB2, PB2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PB1, PB1_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port C */</div><div class='add'>+	PINMUX_GPIO(GPIO_PC8, PC8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC7, PC7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC6, PC6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC5, PC5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC4, PC4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC3, PC3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC2, PC2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC1, PC1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PC0, PC0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port D */</div><div class='add'>+	PINMUX_GPIO(GPIO_PD15, PD15_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD14, PD14_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD13, PD13_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD12, PD12_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD11, PD11_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD10, PD10_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD9, PD9_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD8, PD8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD7, PD7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD6, PD6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD5, PD5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD4, PD4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD3, PD3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD2, PD2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD1, PD1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PD0, PD0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port E */</div><div class='add'>+	PINMUX_GPIO(GPIO_PE7, PE7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PE6, PE6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PE5, PE5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PE4, PE4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PE3, PE3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PE2, PE2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PE1, PE1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PE0, PE0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port F */</div><div class='add'>+	PINMUX_GPIO(GPIO_PF23, PF23_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF22, PF22_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF21, PF21_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF20, PF20_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF19, PF19_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF18, PF18_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF17, PF17_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF16, PF16_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF15, PF15_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF14, PF14_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF13, PF13_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF12, PF12_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF11, PF11_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF10, PF10_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF9, PF9_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF8, PF8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF7, PF7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF6, PF6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF5, PF5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF4, PF4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF3, PF3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF2, PF2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF1, PF1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PF0, PF0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port G */</div><div class='add'>+	PINMUX_GPIO(GPIO_PG27, PG27_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG26, PG26_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG25, PG25_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG24, PG24_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG23, PG23_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG22, PG22_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG21, PG21_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG20, PG20_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG19, PG19_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG18, PG18_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG17, PG17_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG16, PG16_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG15, PG15_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG14, PG14_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG13, PG13_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG12, PG12_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG11, PG11_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG10, PG10_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG9, PG9_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG8, PG8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG7, PG7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG6, PG6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG5, PG5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG4, PG4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG3, PG3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG2, PG2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG1, PG1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PG0, PG0_DATA),</div><div class='add'>+</div><div class='add'>+	/* Port H - Port H does not have a Data Register */</div><div class='add'>+</div><div class='add'>+	/* Port I - not on device */</div><div class='add'>+</div><div class='add'>+	/* Port J */</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ31, PJ31_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ30, PJ30_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ29, PJ29_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ28, PJ28_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ27, PJ27_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ26, PJ26_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ25, PJ25_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ24, PJ24_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ23, PJ23_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ22, PJ22_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ21, PJ21_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ20, PJ20_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ19, PJ19_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ18, PJ18_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ17, PJ17_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ16, PJ16_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ15, PJ15_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ14, PJ14_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ13, PJ13_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ12, PJ12_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ11, PJ11_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ10, PJ10_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ9, PJ9_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ8, PJ8_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),</div><div class='add'>+	PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),</div><div class='add'>+</div><div class='add'>+	/* INTC */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ7_PG, IRQ7_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ6_PG, IRQ6_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ5_PG, IRQ5_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ4_PG, IRQ4_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ3_PG, IRQ3_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ2_PG, IRQ2_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ1_PG, IRQ1_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ0_PG, IRQ0_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ7_PF, IRQ7_PF_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ6_PF, IRQ6_PF_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ5_PF, IRQ5_PF_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ4_PF, IRQ4_PF_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ3_PJ, IRQ3_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ2_PJ, IRQ2_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ1_PJ, IRQ1_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ0_PJ, IRQ0_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ1_PC, IRQ1_PC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IRQ0_PC, IRQ0_PC_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT7_PG, PINT7_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT6_PG, PINT6_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT5_PG, PINT5_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT4_PG, PINT4_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT3_PG, PINT3_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT2_PG, PINT2_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT1_PG, PINT1_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT0_PG, PINT0_PG_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT7_PH, PINT7_PH_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT6_PH, PINT6_PH_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT5_PH, PINT5_PH_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT4_PH, PINT4_PH_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT3_PH, PINT3_PH_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT2_PH, PINT2_PH_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT1_PH, PINT1_PH_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT0_PH, PINT0_PH_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT7_PJ, PINT7_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT6_PJ, PINT6_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT5_PJ, PINT5_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT4_PJ, PINT4_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT3_PJ, PINT3_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT2_PJ, PINT2_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT1_PJ, PINT1_PJ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_PINT0_PJ, PINT0_PJ_MARK),</div><div class='add'>+</div><div class='add'>+	/* WDT */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),</div><div class='add'>+</div><div class='add'>+	/* CAN */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0CRX1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CRX0_CRX1_CRX2, CRX0CRX1CRX2_MARK),</div><div class='add'>+</div><div class='add'>+	/* DMAC */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),</div><div class='add'>+</div><div class='add'>+	/* ADC */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK),</div><div class='add'>+</div><div class='add'>+	/* BSCh */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A25, A25_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A24, A24_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A23, A23_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A22, A22_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A21, A21_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A20, A20_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A19, A19_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A18, A18_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A17, A17_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A16, A16_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A15, A15_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A14, A14_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A13, A13_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A12, A12_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A11, A11_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A10, A10_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A9, A9_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A8, A8_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A7, A7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A6, A6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A5, A5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A4, A4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A3, A3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A2, A2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A1, A1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_A0, A0_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D15, D15_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D14, D14_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D13, D13_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D12, D12_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D11, D11_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D10, D10_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D9, D9_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D8, D8_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D7, D7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D6, D6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D5, D5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D4, D4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D3, D3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D2, D2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D1, D1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_D0, D0_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_BS, BS_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CS5CE1A, CS5CE1A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RD, RD_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_WE3ICIOWRAHDQMUU, WE3ICIOWRAHDQMUU_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_WE2ICIORDDQMUL, WE2ICIORDDQMUL_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_WE1DQMUWE, WE1DQMUWE_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_WE0DQML, WE0DQML_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),</div><div class='add'>+</div><div class='add'>+	/* TMU */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TCLKD, TCLKD_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TCLKC, TCLKC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TCLKB, TCLKB_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TCLKA, TCLKA_MARK),</div><div class='add'>+</div><div class='add'>+	/* SCIF */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RTS1, RTS1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CTS1, CTS1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCK5, SCK5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD5, TXD5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD5, RXD5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RTS5, RTS5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CTS5, CTS5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCK6, SCK6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD6, TXD6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD6, RXD6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCK7, SCK7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_TXD7, TXD7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RXD7, RXD7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RTS7, RTS7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_CTS7, CTS7_MARK),</div><div class='add'>+</div><div class='add'>+	/* RSPI */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RSPCK0_PJ16, RSPCK0_PJ16_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSL00_PJ17, SSL00_PJ17_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_MOSI0_PJ18, MOSI0_PJ18_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_MISO0_PJ19, MISO0_PJ19_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RSPCK0_PB17, RSPCK0_PB17_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSL00_PB18, SSL00_PB18_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_MOSI0_PB19, MOSI0_PB19_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_MISO0_PB20, MISO0_PB20_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_RSPCK1, RSPCK1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_MOSI1, MOSI1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_MISO1, MISO1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSL10, SSL10_MARK),</div><div class='add'>+</div><div class='add'>+	/* IIC3 */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),</div><div class='add'>+</div><div class='add'>+	/* SSI */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSITXD0, SSITXD0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIRXD0, SSIRXD0_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_AUDIO_XOUT, AUDIO_XOUT_MARK),</div><div class='add'>+</div><div class='add'>+	/* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SIOFTXD, SIOFTXD_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SIOFRXD, SIOFRXD_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SIOFSYNC, SIOFSYNC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SIOFSCK, SIOFSCK_MARK),</div><div class='add'>+</div><div class='add'>+	/* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SPDIF_IN, SPDIF_IN_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_SPDIF_OUT, SPDIF_OUT_MARK),</div><div class='add'>+</div><div class='add'>+	/* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),</div><div class='add'>+</div><div class='add'>+	/* VDC3 */</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA23, DV_DATA23_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA22, DV_DATA22_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA21, DV_DATA21_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA20, DV_DATA20_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA19, DV_DATA19_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA18, DV_DATA18_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA17, DV_DATA17_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA16, DV_DATA16_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA15, DV_DATA15_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA14, DV_DATA14_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA13, DV_DATA13_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA12, DV_DATA12_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA11, DV_DATA11_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA10, DV_DATA10_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA9, DV_DATA9_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA8, DV_DATA8_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA7, DV_DATA7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA6, DV_DATA6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA5, DV_DATA5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA4, DV_DATA4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA3, DV_DATA3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA2, DV_DATA2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA1, DV_DATA1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_DV_DATA0, DV_DATA0_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_EXTCLK, LCD_EXTCLK_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_VSYNC, LCD_VSYNC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA23, LCD_DATA23_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA22, LCD_DATA22_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA21, LCD_DATA21_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA20, LCD_DATA20_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA19, LCD_DATA19_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA18, LCD_DATA18_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA17, LCD_DATA17_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA16, LCD_DATA16_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),</div><div class='add'>+</div><div class='add'>+	PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinmux_cfg_reg pinmux_config_regs[] = {</div><div class='add'>+	/* "name" addr register_size Field_Width */</div><div class='add'>+</div><div class='add'>+	/* where Field_Width is 1 for single mode registers or 4 for upto 16</div><div class='add'>+	   mode registers and modes are described in assending order [0..16] */</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, PA1_IN, PA1_OUT,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, PA0_IN, PA0_OUT }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB22MD_000, PB22MD_001, PB22MD_010, PB22MD_011,</div><div class='add'>+		PB22MD_100, PB22MD_101, PB22MD_110, PB22MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB21MD_00, PB21MD_01, PB21MD_10, PB21MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB20MD_000, PB20MD_001, PB20MD_010, PB20MD_011,</div><div class='add'>+		PB20MD_100, PB20MD_101, PB20MD_110, PB20MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4) {</div><div class='add'>+		PB19MD_000, PB19MD_001, PB19MD_010, PB19MD_011,</div><div class='add'>+		PB19MD_100, PB19MD_101, PB19MD_110, PB19MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB18MD_000, PB18MD_001, PB18MD_010, PB18MD_011,</div><div class='add'>+		PB18MD_100, PB18MD_101, PB18MD_110, PB18MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB17MD_000, PB17MD_001, PB17MD_010, PB17MD_011,</div><div class='add'>+		PB17MD_100, PB17MD_101, PB17MD_110, PB17MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB16MD_000, PB16MD_001, PB16MD_010, PB16MD_011,</div><div class='add'>+		PB16MD_100, PB16MD_101, PB16MD_110, PB16MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4) {</div><div class='add'>+		PB15MD_000, PB15MD_001, PB15MD_010, PB15MD_011,</div><div class='add'>+		PB15MD_100, PB15MD_101, PB15MD_110, PB15MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB14MD_000, PB14MD_001, PB14MD_010, PB14MD_011,</div><div class='add'>+		PB14MD_100, PB14MD_101, PB14MD_110, PB14MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB13MD_000, PB13MD_001, PB13MD_010, PB13MD_011,</div><div class='add'>+		PB13MD_100, PB13MD_101, PB13MD_110, PB13MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4) {</div><div class='add'>+		PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4) {</div><div class='add'>+		PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4) {</div><div class='add'>+		PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0,</div><div class='add'>+		PB22_IN, PB22_OUT,</div><div class='add'>+		PB21_IN, PB21_OUT,</div><div class='add'>+		PB20_IN, PB20_OUT,</div><div class='add'>+		PB19_IN, PB19_OUT,</div><div class='add'>+		PB18_IN, PB18_OUT,</div><div class='add'>+		PB17_IN, PB17_OUT,</div><div class='add'>+		PB16_IN, PB16_OUT }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1) {</div><div class='add'>+		PB15_IN, PB15_OUT,</div><div class='add'>+		PB14_IN, PB14_OUT,</div><div class='add'>+		PB13_IN, PB13_OUT,</div><div class='add'>+		PB12_IN, PB12_OUT,</div><div class='add'>+		PB11_IN, PB11_OUT,</div><div class='add'>+		PB10_IN, PB10_OUT,</div><div class='add'>+		PB9_IN, PB9_OUT,</div><div class='add'>+		PB8_IN, PB8_OUT,</div><div class='add'>+		PB7_IN, PB7_OUT,</div><div class='add'>+		PB6_IN, PB6_OUT,</div><div class='add'>+		PB5_IN, PB5_OUT,</div><div class='add'>+		PB4_IN, PB4_OUT,</div><div class='add'>+		PB3_IN, PB3_OUT,</div><div class='add'>+		PB2_IN, PB2_OUT,</div><div class='add'>+		PB1_IN, PB1_OUT,</div><div class='add'>+		0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PC8MD_000, PC8MD_001, PC8MD_010, PC8MD_011,</div><div class='add'>+		PC8MD_100, PC8MD_101, PC8MD_110, PC8MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PCCR1", 0xfffe384c, 16, 4) {</div><div class='add'>+		PC7MD_000, PC7MD_001, PC7MD_010, PC7MD_011,</div><div class='add'>+		PC7MD_100, PC7MD_101, PC7MD_110, PC7MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PC6MD_000, PC6MD_001, PC6MD_010, PC6MD_011,</div><div class='add'>+		PC6MD_100, PC6MD_101, PC6MD_110, PC6MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PC5MD_000, PC5MD_001, PC5MD_010, PC5MD_011,</div><div class='add'>+		PC5MD_100, PC5MD_101, PC5MD_110, PC5MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PC4MD_00, PC4MD_01, PC4MD_10, PC4MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PCCR0", 0xfffe384e, 16, 4) {</div><div class='add'>+		PC3MD_00, PC3MD_01, PC3MD_10, PC3MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PC2MD_00, PC2MD_01, PC2MD_10, PC2MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PC1MD_0, PC1MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PC0MD_0, PC0MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PCIOR0", 0xfffe3852, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PC8_IN, PC8_OUT,</div><div class='add'>+		PC7_IN, PC7_OUT,</div><div class='add'>+		PC6_IN, PC6_OUT,</div><div class='add'>+		PC5_IN, PC5_OUT,</div><div class='add'>+		PC4_IN, PC4_OUT,</div><div class='add'>+		PC3_IN, PC3_OUT,</div><div class='add'>+		PC2_IN, PC2_OUT,</div><div class='add'>+		PC1_IN, PC1_OUT,</div><div class='add'>+		PC0_IN, PC0_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PDCR3", 0xfffe3868, 16, 4) {</div><div class='add'>+		PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PDCR2", 0xfffe386a, 16, 4) {</div><div class='add'>+		PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PDCR1", 0xfffe386c, 16, 4) {</div><div class='add'>+		PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PDCR0", 0xfffe386e, 16, 4) {</div><div class='add'>+		PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PDIOR0", 0xfffe3872, 16, 1) {</div><div class='add'>+		PD15_IN, PD15_OUT,</div><div class='add'>+		PD14_IN, PD14_OUT,</div><div class='add'>+		PD13_IN, PD13_OUT,</div><div class='add'>+		PD12_IN, PD12_OUT,</div><div class='add'>+		PD11_IN, PD11_OUT,</div><div class='add'>+		PD10_IN, PD10_OUT,</div><div class='add'>+		PD9_IN, PD9_OUT,</div><div class='add'>+		PD8_IN, PD8_OUT,</div><div class='add'>+		PD7_IN, PD7_OUT,</div><div class='add'>+		PD6_IN, PD6_OUT,</div><div class='add'>+		PD5_IN, PD5_OUT,</div><div class='add'>+		PD4_IN, PD4_OUT,</div><div class='add'>+		PD3_IN, PD3_OUT,</div><div class='add'>+		PD2_IN, PD2_OUT,</div><div class='add'>+		PD1_IN, PD1_OUT,</div><div class='add'>+		PD0_IN, PD0_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PECR1", 0xfffe388c, 16, 4) {</div><div class='add'>+		PE7MD_00, PE7MD_01, PE7MD_10, PE7MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PE6MD_00, PE6MD_01, PE6MD_10, PE6MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PECR0", 0xfffe388e, 16, 4) {</div><div class='add'>+		PE3MD_000, PE3MD_001, PE3MD_010, PE3MD_011,</div><div class='add'>+		PE3MD_100, PE3MD_101, PE3MD_110, PE3MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PE2MD_000, PE2MD_001, PE2MD_010, PE2MD_011,</div><div class='add'>+		PE2MD_100, PE2MD_101, PE2MD_110, PE2MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011,</div><div class='add'>+		PE1MD_100, PE1MD_101, PE1MD_110, PE1MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PEIOR0", 0xfffe3892, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PE7_IN, PE7_OUT,</div><div class='add'>+		PE6_IN, PE6_OUT,</div><div class='add'>+		PE5_IN, PE5_OUT,</div><div class='add'>+		PE4_IN, PE4_OUT,</div><div class='add'>+		PE3_IN, PE3_OUT,</div><div class='add'>+		PE2_IN, PE2_OUT,</div><div class='add'>+		PE1_IN, PE1_OUT,</div><div class='add'>+		PE0_IN, PE0_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PFCR6", 0xfffe38a2, 16, 4) {</div><div class='add'>+		PF23MD_000, PF23MD_001, PF23MD_010, PF23MD_011,</div><div class='add'>+		PF23MD_100, PF23MD_101, PF23MD_110, PF23MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF22MD_000, PF22MD_001, PF22MD_010, PF22MD_011,</div><div class='add'>+		PF22MD_100, PF22MD_101, PF22MD_110, PF22MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF21MD_000, PF21MD_001, PF21MD_010, PF21MD_011,</div><div class='add'>+		PF21MD_100, PF21MD_101, PF21MD_110, PF21MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF20MD_000, PF20MD_001, PF20MD_010, PF20MD_011,</div><div class='add'>+		PF20MD_100, PF20MD_101, PF20MD_110, PF20MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PFCR5", 0xfffe38a4, 16, 4) {</div><div class='add'>+		PF19MD_000, PF19MD_001, PF19MD_010, PF19MD_011,</div><div class='add'>+		PF19MD_100, PF19MD_101, PF19MD_110, PF19MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF18MD_000, PF18MD_001, PF18MD_010, PF18MD_011,</div><div class='add'>+		PF18MD_100, PF18MD_101, PF18MD_110, PF18MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF17MD_000, PF17MD_001, PF17MD_010, PF17MD_011,</div><div class='add'>+		PF17MD_100, PF17MD_101, PF17MD_110, PF17MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF16MD_000, PF16MD_001, PF16MD_010, PF16MD_011,</div><div class='add'>+		PF16MD_100, PF16MD_101, PF16MD_110, PF16MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PFCR4", 0xfffe38a6, 16, 4) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF15MD_000, PF15MD_001, PF15MD_010, PF15MD_011,</div><div class='add'>+		PF15MD_100, PF15MD_101, PF15MD_110, PF15MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PFCR3", 0xfffe38a8, 16, 4) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF14MD_000, PF14MD_001, PF14MD_010, PF14MD_011,</div><div class='add'>+		PF14MD_100, PF14MD_101, PF14MD_110, PF14MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF13MD_000, PF13MD_001, PF13MD_010, PF13MD_011,</div><div class='add'>+		PF13MD_100, PF13MD_101, PF13MD_110, PF13MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF12MD_000, PF12MD_001, PF12MD_010, PF12MD_011,</div><div class='add'>+		PF12MD_100, PF12MD_101, PF12MD_110, PF12MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PFCR2", 0xfffe38aa, 16, 4) {</div><div class='add'>+		PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011,</div><div class='add'>+		PF11MD_100, PF11MD_101, PF11MD_110, PF11MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011,</div><div class='add'>+		PF10MD_100, PF10MD_101, PF10MD_110, PF10MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011,</div><div class='add'>+		PF9MD_100, PF9MD_101, PF9MD_110, PF9MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF8MD_000, PF8MD_001, PF8MD_010, PF8MD_011,</div><div class='add'>+		PF8MD_100, PF8MD_101, PF8MD_110, PF8MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PFCR1", 0xfffe38ac, 16, 4) {</div><div class='add'>+		PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011,</div><div class='add'>+		PF7MD_100, PF7MD_101, PF7MD_110, PF7MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011,</div><div class='add'>+		PF6MD_100, PF6MD_101, PF6MD_110, PF6MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011,</div><div class='add'>+		PF5MD_100, PF5MD_101, PF5MD_110, PF5MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011,</div><div class='add'>+		PF4MD_100, PF4MD_101, PF4MD_110, PF4MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PFCR0", 0xfffe38ae, 16, 4) {</div><div class='add'>+		PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011,</div><div class='add'>+		PF3MD_100, PF3MD_101, PF3MD_110, PF3MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011,</div><div class='add'>+		PF2MD_100, PF2MD_101, PF2MD_110, PF2MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,</div><div class='add'>+		PF1MD_100, PF1MD_101, PF1MD_110, PF1MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011,</div><div class='add'>+		PF0MD_100, PF0MD_101, PF0MD_110, PF0MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PFIOR1", 0xfffe38b0, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PF23_IN, PF23_OUT,</div><div class='add'>+		PF22_IN, PF22_OUT,</div><div class='add'>+		PF21_IN, PF21_OUT,</div><div class='add'>+		PF20_IN, PF20_OUT,</div><div class='add'>+		PF19_IN, PF19_OUT,</div><div class='add'>+		PF18_IN, PF18_OUT,</div><div class='add'>+		PF17_IN, PF17_OUT,</div><div class='add'>+		PF16_IN, PF16_OUT }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PFIOR0", 0xfffe38b2, 16, 1) {</div><div class='add'>+		PF15_IN, PF15_OUT,</div><div class='add'>+		PF14_IN, PF14_OUT,</div><div class='add'>+		PF13_IN, PF13_OUT,</div><div class='add'>+		PF12_IN, PF12_OUT,</div><div class='add'>+		PF11_IN, PF11_OUT,</div><div class='add'>+		PF10_IN, PF10_OUT,</div><div class='add'>+		PF9_IN, PF9_OUT,</div><div class='add'>+		PF8_IN, PF8_OUT,</div><div class='add'>+		PF7_IN, PF7_OUT,</div><div class='add'>+		PF6_IN, PF6_OUT,</div><div class='add'>+		PF5_IN, PF5_OUT,</div><div class='add'>+		PF4_IN, PF4_OUT,</div><div class='add'>+		PF3_IN, PF3_OUT,</div><div class='add'>+		PF2_IN, PF2_OUT,</div><div class='add'>+		PF1_IN, PF1_OUT,</div><div class='add'>+		PF0_IN, PF0_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR6", 0xfffe38c2, 16, 4) {</div><div class='add'>+		PG27MD_00, PG27MD_01, PG27MD_10, PG27MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG26MD_00, PG26MD_01, PG26MD_10, PG26MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG25MD_00, PG25MD_01, PG25MD_10, PG25MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR5", 0xfffe38c4, 16, 4) {</div><div class='add'>+		PG23MD_000, PG23MD_001, PG23MD_010, PG23MD_011,</div><div class='add'>+		PG23MD_100, PG23MD_101, PG23MD_110, PG23MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG22MD_000, PG22MD_001, PG22MD_010, PG22MD_011,</div><div class='add'>+		PG22MD_100, PG22MD_101, PG22MD_110, PG22MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG21MD_000, PG21MD_001, PG21MD_010, PG21MD_011,</div><div class='add'>+		PG21MD_100, PG21MD_101, PG21MD_110, PG21MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011,</div><div class='add'>+		PG20MD_100, PG20MD_101, PG20MD_110, PG20MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR4", 0xfffe38c6, 16, 4) {</div><div class='add'>+		PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011,</div><div class='add'>+		PG19MD_100, PG19MD_101, PG19MD_110, PG19MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011,</div><div class='add'>+		PG18MD_100, PG18MD_101, PG18MD_110, PG18MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG17MD_00, PG17MD_01, PG17MD_10, PG17MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG16MD_00, PG16MD_01, PG16MD_10, PG16MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR3", 0xfffe38c8, 16, 4) {</div><div class='add'>+		PG15MD_00, PG15MD_01, PG15MD_10, PG15MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG14MD_00, PG14MD_01, PG14MD_10, PG14MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG13MD_00, PG13MD_01, PG13MD_10, PG13MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG12MD_00, PG12MD_01, PG12MD_10, PG12MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR2", 0xfffe38ca, 16, 4) {</div><div class='add'>+		PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011,</div><div class='add'>+		PG11MD_100, PG11MD_101, PG11MD_110, PG11MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011,</div><div class='add'>+		PG10MD_100, PG10MD_101, PG10MD_110, PG10MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011,</div><div class='add'>+		PG9MD_100, PG9MD_101, PG9MD_110, PG9MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011,</div><div class='add'>+		PG8MD_100, PG8MD_101, PG8MD_110, PG8MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR1", 0xfffe38cc, 16, 4) {</div><div class='add'>+		PG7MD_000, PG7MD_001, PG7MD_010, PG7MD_011,</div><div class='add'>+		PG7MD_100, PG7MD_101, PG7MD_110, PG7MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG6MD_000, PG6MD_001, PG6MD_010, PG6MD_011,</div><div class='add'>+		PG6MD_100, PG6MD_101, PG6MD_110, PG6MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG5MD_000, PG5MD_001, PG5MD_010, PG5MD_011,</div><div class='add'>+		PG5MD_100, PG5MD_101, PG5MD_110, PG5MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG4MD_000, PG4MD_001, PG4MD_010, PG4MD_011,</div><div class='add'>+		PG4MD_100, PG4MD_101, PG4MD_110, PG4MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PGCR0", 0xfffe38ce, 16, 4) {</div><div class='add'>+		PG3MD_000, PG3MD_001, PG3MD_010, PG3MD_011,</div><div class='add'>+		PG3MD_100, PG3MD_101, PG3MD_110, PG3MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG2MD_000, PG2MD_001, PG2MD_010, PG2MD_011,</div><div class='add'>+		PG2MD_100, PG2MD_101, PG2MD_110, PG2MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG1MD_000, PG1MD_001, PG1MD_010, PG1MD_011,</div><div class='add'>+		PG1MD_100, PG1MD_101, PG1MD_110, PG1MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011,</div><div class='add'>+		PG0MD_100, PG0MD_101, PG0MD_110, PG0MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PGIOR1", 0xfffe38d0, 16, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PG27_IN, PG27_OUT,</div><div class='add'>+		PG26_IN, PG26_OUT,</div><div class='add'>+		PG25_IN, PG25_OUT,</div><div class='add'>+		PG24_IN, PG24_OUT,</div><div class='add'>+		PG23_IN, PG23_OUT,</div><div class='add'>+		PG22_IN, PG22_OUT,</div><div class='add'>+		PG21_IN, PG21_OUT,</div><div class='add'>+		PG20_IN, PG20_OUT,</div><div class='add'>+		PG19_IN, PG19_OUT,</div><div class='add'>+		PG18_IN, PG18_OUT,</div><div class='add'>+		PG17_IN, PG17_OUT,</div><div class='add'>+		PG16_IN, PG16_OUT }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PGIOR0", 0xfffe38d2, 16, 1) {</div><div class='add'>+		PG15_IN, PG15_OUT,</div><div class='add'>+		PG14_IN, PG14_OUT,</div><div class='add'>+		PG13_IN, PG13_OUT,</div><div class='add'>+		PG12_IN, PG12_OUT,</div><div class='add'>+		PG11_IN, PG11_OUT,</div><div class='add'>+		PG10_IN, PG10_OUT,</div><div class='add'>+		PG9_IN, PG9_OUT,</div><div class='add'>+		PG8_IN, PG8_OUT,</div><div class='add'>+		PG7_IN, PG7_OUT,</div><div class='add'>+		PG6_IN, PG6_OUT,</div><div class='add'>+		PG5_IN, PG5_OUT,</div><div class='add'>+		PG4_IN, PG4_OUT,</div><div class='add'>+		PG3_IN, PG3_OUT,</div><div class='add'>+		PG2_IN, PG2_OUT,</div><div class='add'>+		PG1_IN, PG1_OUT,</div><div class='add'>+		PG0_IN, PG0_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PHCR1", 0xfffe38ec, 16, 4) {</div><div class='add'>+		PH7MD_00, PH7MD_01, PH7MD_10, PH7MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PH6MD_00, PH6MD_01, PH6MD_10, PH6MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PH5MD_00, PH5MD_01, PH5MD_10, PH5MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PH4MD_00, PH4MD_01, PH4MD_10, PH4MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PHCR0", 0xfffe38ee, 16, 4) {</div><div class='add'>+		PH3MD_00, PH3MD_01, PH3MD_10, PH3MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PH2MD_00, PH2MD_01, PH2MD_10, PH2MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PH1MD_00, PH1MD_01, PH1MD_10, PH1MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PH0MD_00, PH0MD_01, PH0MD_10, PH0MD_11, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PJCR7", 0xfffe3900, 16, 4) {</div><div class='add'>+		PJ31MD_0, PJ31MD_1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ30MD_000, PJ30MD_001, PJ30MD_010, PJ30MD_011,</div><div class='add'>+		PJ30MD_100, PJ30MD_101, PJ30MD_110, PJ30MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ29MD_000, PJ29MD_001, PJ29MD_010, PJ29MD_011,</div><div class='add'>+		PJ29MD_100, PJ29MD_101, PJ29MD_110, PJ29MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ28MD_000, PJ28MD_001, PJ28MD_010, PJ28MD_011,</div><div class='add'>+		PJ28MD_100, PJ28MD_101, PJ28MD_110, PJ28MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PJCR6", 0xfffe3902, 16, 4) {</div><div class='add'>+		PJ27MD_000, PJ27MD_001, PJ27MD_010, PJ27MD_011,</div><div class='add'>+		PJ27MD_100, PJ27MD_101, PJ27MD_110, PJ27MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ26MD_000, PJ26MD_001, PJ26MD_010, PJ26MD_011,</div><div class='add'>+		PJ26MD_100, PJ26MD_101, PJ26MD_110, PJ26MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ25MD_000, PJ25MD_001, PJ25MD_010, PJ25MD_011,</div><div class='add'>+		PJ25MD_100, PJ25MD_101, PJ25MD_110, PJ25MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ24MD_000, PJ24MD_001, PJ24MD_010, PJ24MD_011,</div><div class='add'>+		PJ24MD_100, PJ24MD_101, PJ24MD_110, PJ24MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PJCR5", 0xfffe3904, 16, 4) {</div><div class='add'>+		PJ23MD_000, PJ23MD_001, PJ23MD_010, PJ23MD_011,</div><div class='add'>+		PJ23MD_100, PJ23MD_101, PJ23MD_110, PJ23MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ22MD_000, PJ22MD_001, PJ22MD_010, PJ22MD_011,</div><div class='add'>+		PJ22MD_100, PJ22MD_101, PJ22MD_110, PJ22MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ21MD_000, PJ21MD_001, PJ21MD_010, PJ21MD_011,</div><div class='add'>+		PJ21MD_100, PJ21MD_101, PJ21MD_110, PJ21MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ20MD_000, PJ20MD_001, PJ20MD_010, PJ20MD_011,</div><div class='add'>+		PJ20MD_100, PJ20MD_101, PJ20MD_110, PJ20MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PJCR4", 0xfffe3906, 16, 4) {</div><div class='add'>+		PJ19MD_000, PJ19MD_001, PJ19MD_010, PJ19MD_011,</div><div class='add'>+		PJ19MD_100, PJ19MD_101, PJ19MD_110, PJ19MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ18MD_000, PJ18MD_001, PJ18MD_010, PJ18MD_011,</div><div class='add'>+		PJ18MD_100, PJ18MD_101, PJ18MD_110, PJ18MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ17MD_000, PJ17MD_001, PJ17MD_010, PJ17MD_011,</div><div class='add'>+		PJ17MD_100, PJ17MD_101, PJ17MD_110, PJ17MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ16MD_000, PJ16MD_001, PJ16MD_010, PJ16MD_011,</div><div class='add'>+		PJ16MD_100, PJ16MD_101, PJ16MD_110, PJ16MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PJCR3", 0xfffe3908, 16, 4) {</div><div class='add'>+		PJ15MD_000, PJ15MD_001, PJ15MD_010, PJ15MD_011,</div><div class='add'>+		PJ15MD_100, PJ15MD_101, PJ15MD_110, PJ15MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ14MD_000, PJ14MD_001, PJ14MD_010, PJ14MD_011,</div><div class='add'>+		PJ14MD_100, PJ14MD_101, PJ14MD_110, PJ14MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ13MD_000, PJ13MD_001, PJ13MD_010, PJ13MD_011,</div><div class='add'>+		PJ13MD_100, PJ13MD_101, PJ13MD_110, PJ13MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ12MD_000, PJ12MD_001, PJ12MD_010, PJ12MD_011,</div><div class='add'>+		PJ12MD_100, PJ12MD_101, PJ12MD_110, PJ12MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PJCR2", 0xfffe390a, 16, 4) {</div><div class='add'>+		PJ11MD_000, PJ11MD_001, PJ11MD_010, PJ11MD_011,</div><div class='add'>+		PJ11MD_100, PJ11MD_101, PJ11MD_110, PJ11MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ10MD_000, PJ10MD_001, PJ10MD_010, PJ10MD_011,</div><div class='add'>+		PJ10MD_100, PJ10MD_101, PJ10MD_110, PJ10MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ9MD_000, PJ9MD_001, PJ9MD_010, PJ9MD_011,</div><div class='add'>+		PJ9MD_100, PJ9MD_101, PJ9MD_110, PJ9MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ8MD_000, PJ8MD_001, PJ8MD_010, PJ8MD_011,</div><div class='add'>+		PJ8MD_100, PJ8MD_101, PJ8MD_110, PJ8MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PJCR1", 0xfffe390c, 16, 4) {</div><div class='add'>+		PJ7MD_000, PJ7MD_001, PJ7MD_010, PJ7MD_011,</div><div class='add'>+		PJ7MD_100, PJ7MD_101, PJ7MD_110, PJ7MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ6MD_000, PJ6MD_001, PJ6MD_010, PJ6MD_011,</div><div class='add'>+		PJ6MD_100, PJ6MD_101, PJ6MD_110, PJ6MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ5MD_000, PJ5MD_001, PJ5MD_010, PJ5MD_011,</div><div class='add'>+		PJ5MD_100, PJ5MD_101, PJ5MD_110, PJ5MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ4MD_000, PJ4MD_001, PJ4MD_010, PJ4MD_011,</div><div class='add'>+		PJ4MD_100, PJ4MD_101, PJ4MD_110, PJ4MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PJCR0", 0xfffe390e, 16, 4) {</div><div class='add'>+		PJ3MD_000, PJ3MD_001, PJ3MD_010, PJ3MD_011,</div><div class='add'>+		PJ3MD_100, PJ3MD_101, PJ3MD_110, PJ3MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011,</div><div class='add'>+		PJ2MD_100, PJ2MD_101, PJ2MD_110, PJ2MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011,</div><div class='add'>+		PJ1MD_100, PJ1MD_101, PJ1MD_110, PJ1MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+</div><div class='add'>+		PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011,</div><div class='add'>+		PJ0MD_100, PJ0MD_101, PJ0MD_110, PJ0MD_111,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("PJIOR1", 0xfffe3910, 16, 1) {</div><div class='add'>+		PJ31_IN, PJ31_OUT,</div><div class='add'>+		PJ30_IN, PJ30_OUT,</div><div class='add'>+		PJ29_IN, PJ29_OUT,</div><div class='add'>+		PJ28_IN, PJ28_OUT,</div><div class='add'>+		PJ27_IN, PJ27_OUT,</div><div class='add'>+		PJ26_IN, PJ26_OUT,</div><div class='add'>+		PJ25_IN, PJ25_OUT,</div><div class='add'>+		PJ24_IN, PJ24_OUT,</div><div class='add'>+		PJ23_IN, PJ23_OUT,</div><div class='add'>+		PJ22_IN, PJ22_OUT,</div><div class='add'>+		PJ21_IN, PJ21_OUT,</div><div class='add'>+		PJ20_IN, PJ20_OUT,</div><div class='add'>+		PJ19_IN, PJ19_OUT,</div><div class='add'>+		PJ18_IN, PJ18_OUT,</div><div class='add'>+		PJ17_IN, PJ17_OUT,</div><div class='add'>+		PJ16_IN, PJ16_OUT }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("PJIOR0", 0xfffe3912, 16, 1) {</div><div class='add'>+		PJ15_IN, PJ15_OUT,</div><div class='add'>+		PJ14_IN, PJ14_OUT,</div><div class='add'>+		PJ13_IN, PJ13_OUT,</div><div class='add'>+		PJ12_IN, PJ12_OUT,</div><div class='add'>+		PJ11_IN, PJ11_OUT,</div><div class='add'>+		PJ10_IN, PJ10_OUT,</div><div class='add'>+		PJ9_IN, PJ9_OUT,</div><div class='add'>+		PJ8_IN, PJ8_OUT,</div><div class='add'>+		PJ7_IN, PJ7_OUT,</div><div class='add'>+		PJ6_IN, PJ6_OUT,</div><div class='add'>+		PJ5_IN, PJ5_OUT,</div><div class='add'>+		PJ4_IN, PJ4_OUT,</div><div class='add'>+		PJ3_IN, PJ3_OUT,</div><div class='add'>+		PJ2_IN, PJ2_OUT,</div><div class='add'>+		PJ1_IN, PJ1_OUT,</div><div class='add'>+		PJ0_IN, PJ0_OUT }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinmux_data_reg pinmux_data_regs[] = {</div><div class='add'>+	{ PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, PA1_DATA,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, PA0_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, PB22_DATA, PB21_DATA, PB20_DATA,</div><div class='add'>+		PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16) {</div><div class='add'>+		PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,</div><div class='add'>+		PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,</div><div class='add'>+		PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,</div><div class='add'>+		PB3_DATA, PB2_DATA, PB1_DATA, 0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16) {</div><div class='add'>+		0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, PC8_DATA,</div><div class='add'>+		PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,</div><div class='add'>+		PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16) {</div><div class='add'>+		PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,</div><div class='add'>+		PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,</div><div class='add'>+		PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,</div><div class='add'>+		PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,</div><div class='add'>+		PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PFDR1", 0xfffe38b4, 16) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,</div><div class='add'>+		PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16) {</div><div class='add'>+		PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,</div><div class='add'>+		PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,</div><div class='add'>+		PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,</div><div class='add'>+		PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16) {</div><div class='add'>+		0, 0, 0, 0,</div><div class='add'>+		PG27_DATA, PG26_DATA, PG25_DATA, PG24_DATA,</div><div class='add'>+		PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,</div><div class='add'>+		PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16) {</div><div class='add'>+		PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,</div><div class='add'>+		PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,</div><div class='add'>+		PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,</div><div class='add'>+		PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_DATA_REG("PJDR1", 0xfffe3914, 16) {</div><div class='add'>+		PJ31_DATA, PJ30_DATA, PJ29_DATA, PJ28_DATA,</div><div class='add'>+		PJ27_DATA, PJ26_DATA, PJ25_DATA, PJ24_DATA,</div><div class='add'>+		PJ23_DATA, PJ22_DATA, PJ21_DATA, PJ20_DATA,</div><div class='add'>+		PJ19_DATA, PJ18_DATA, PJ17_DATA, PJ16_DATA }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16) {</div><div class='add'>+		PJ15_DATA, PJ14_DATA, PJ13_DATA, PJ12_DATA,</div><div class='add'>+		PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,</div><div class='add'>+		PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,</div><div class='add'>+		PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinmux_info sh7269_pinmux_info = {</div><div class='add'>+	.name = "sh7269_pfc",</div><div class='add'>+	.reserved_id = PINMUX_RESERVED,</div><div class='add'>+	.data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },</div><div class='add'>+	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },</div><div class='add'>+	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },</div><div class='add'>+	.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },</div><div class='add'>+	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },</div><div class='add'>+</div><div class='add'>+	.first_gpio = GPIO_PA1,</div><div class='add'>+	.last_gpio = GPIO_FN_LCD_M_DISP,</div><div class='add'>+</div><div class='add'>+	.gpios = pinmux_gpios,</div><div class='add'>+	.cfg_regs = pinmux_config_regs,</div><div class='add'>+	.data_regs = pinmux_data_regs,</div><div class='add'>+</div><div class='add'>+	.gpio_data = pinmux_data,</div><div class='add'>+	.gpio_data_size = ARRAY_SIZE(pinmux_data),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init plat_pinmux_setup(void)</div><div class='add'>+{</div><div class='add'>+	return register_pinmux(&amp;sh7269_pinmux_info);</div><div class='add'>+}</div><div class='add'>+arch_initcall(plat_pinmux_setup);</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c<br/>index 48e97a2a0c8d..5170b6aa4129 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/probe.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh2a/probe.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/probe.c</a></div><div class='hunk'>@@ -29,6 +29,12 @@ void __cpuinit cpu_probe(void)</div><div class='ctx'> #elif defined(CONFIG_CPU_SUBTYPE_SH7263)</div><div class='ctx'> 	boot_cpu_data.type			= CPU_SH7263;</div><div class='ctx'> 	boot_cpu_data.flags			|= CPU_HAS_FPU;</div><div class='add'>+#elif defined(CONFIG_CPU_SUBTYPE_SH7264)</div><div class='add'>+	boot_cpu_data.type			= CPU_SH7264;</div><div class='add'>+	boot_cpu_data.flags			|= CPU_HAS_FPU;</div><div class='add'>+#elif defined(CONFIG_CPU_SUBTYPE_SH7269)</div><div class='add'>+	boot_cpu_data.type			= CPU_SH7269;</div><div class='add'>+	boot_cpu_data.flags			|= CPU_HAS_FPU;</div><div class='ctx'> #elif defined(CONFIG_CPU_SUBTYPE_SH7206)</div><div class='ctx'> 	boot_cpu_data.type			= CPU_SH7206;</div><div class='ctx'> 	boot_cpu_data.flags			|= CPU_HAS_DSP;</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c<br/>index 949bf2bac28c..f7f1cf2af302 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/setup-mxg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh2a/setup-mxg.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/setup-mxg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/setup-mxg.c</a></div><div class='hunk'>@@ -204,7 +204,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 220, 220, 220, 220 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(220),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif0_device = {</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c<br/>index 9df558dcdb86..7b84785b8962 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/setup-sh7201.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh2a/setup-sh7201.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/setup-sh7201.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/setup-sh7201.c</a></div><div class='hunk'>@@ -183,7 +183,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 180, 180, 180, 180 }</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(180),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif0_device = {</div><div class='hunk'>@@ -200,7 +200,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 184, 184, 184, 184 }</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(184),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif1_device = {</div><div class='hunk'>@@ -217,7 +217,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 188, 188, 188, 188 }</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(188),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif2_device = {</div><div class='hunk'>@@ -234,7 +234,7 @@ static struct plat_sci_port scif3_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 192, 192, 192, 192 }</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(192),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif3_device = {</div><div class='hunk'>@@ -251,7 +251,7 @@ static struct plat_sci_port scif4_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 196, 196, 196, 196 }</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(196),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif4_device = {</div><div class='hunk'>@@ -268,7 +268,7 @@ static struct plat_sci_port scif5_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 200, 200, 200, 200 }</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(200),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif5_device = {</div><div class='hunk'>@@ -285,7 +285,7 @@ static struct plat_sci_port scif6_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 204, 204, 204, 204 }</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(204),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif6_device = {</div><div class='hunk'>@@ -302,7 +302,7 @@ static struct plat_sci_port scif7_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 208, 208, 208, 208 }</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(208),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif7_device = {</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c<br/>index 0bd744f9a3b7..bfc33f6a28c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/setup-sh7203.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh2a/setup-sh7203.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/setup-sh7203.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/setup-sh7203.c</a></div><div class='hunk'>@@ -180,7 +180,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 			  SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		=  { 192, 192, 192, 192 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(192),</div><div class='ctx'> 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -199,7 +199,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 			  SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		=  { 196, 196, 196, 196 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(196),</div><div class='ctx'> 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -218,7 +218,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 			  SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		=  { 200, 200, 200, 200 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(200),</div><div class='ctx'> 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -237,7 +237,7 @@ static struct plat_sci_port scif3_platform_data = {</div><div class='ctx'> 			  SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		=  { 204, 204, 204, 204 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(204),</div><div class='ctx'> 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c<br/>index 5d14f849aea3..a5010741de85 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/setup-sh7206.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh2a/setup-sh7206.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/setup-sh7206.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/setup-sh7206.c</a></div><div class='hunk'>@@ -139,7 +139,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 240, 240, 240, 240 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(240),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif0_device = {</div><div class='hunk'>@@ -156,7 +156,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 244, 244, 244, 244 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(244),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif1_device = {</div><div class='hunk'>@@ -173,7 +173,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 248, 248, 248, 248 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(248),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif2_device = {</div><div class='hunk'>@@ -190,7 +190,7 @@ static struct plat_sci_port scif3_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 252, 252, 252, 252 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(252),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif3_device = {</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c b/arch/sh/kernel/cpu/sh2a/setup-sh7264.c<br/>new file mode 100644<br/>index 000000000000..ce5c1b5aebfa<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/setup-sh7264.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/setup-sh7264.c</a></div><div class='hunk'>@@ -0,0 +1,606 @@</div><div class='add'>+/*</div><div class='add'>+ * SH7264 Setup</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012  Renesas Electronics Europe Ltd</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/serial.h&gt;</div><div class='add'>+#include &lt;linux/serial_sci.h&gt;</div><div class='add'>+#include &lt;linux/usb/r8a66597.h&gt;</div><div class='add'>+#include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	UNUSED = 0,</div><div class='add'>+</div><div class='add'>+	/* interrupt sources */</div><div class='add'>+	IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,</div><div class='add'>+	PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,</div><div class='add'>+</div><div class='add'>+	DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,</div><div class='add'>+	DMAC8, DMAC9, DMAC10, DMAC11, DMAC12, DMAC13, DMAC14, DMAC15,</div><div class='add'>+	USB, VDC3, CMT0, CMT1, BSC, WDT,</div><div class='add'>+	MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,</div><div class='add'>+	MTU3_ABCD, MTU3_TCI3V, MTU4_ABCD, MTU4_TCI4V,</div><div class='add'>+	PWMT1, PWMT2, ADC_ADI,</div><div class='add'>+	SSIF0, SSII1, SSII2, SSII3,</div><div class='add'>+	RSPDIF,</div><div class='add'>+	IIC30, IIC31, IIC32, IIC33,</div><div class='add'>+	SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,</div><div class='add'>+	SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,</div><div class='add'>+	SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,</div><div class='add'>+	SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,</div><div class='add'>+	SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI,</div><div class='add'>+	SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI,</div><div class='add'>+	SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI,</div><div class='add'>+	SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI,</div><div class='add'>+	SIO_FIFO, RSPIC0, RSPIC1,</div><div class='add'>+	RCAN0, RCAN1, IEBC, CD_ROMD,</div><div class='add'>+	NFMC, SDHI, RTC,</div><div class='add'>+	SRCC0, SRCC1, DCOMU, OFFI, IFEI,</div><div class='add'>+</div><div class='add'>+	/* interrupt groups */</div><div class='add'>+	PINT, SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_vect vectors[] __initdata = {</div><div class='add'>+	INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),</div><div class='add'>+	INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),</div><div class='add'>+	INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),</div><div class='add'>+	INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),</div><div class='add'>+	INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),</div><div class='add'>+	INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),</div><div class='add'>+	INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(DMAC0, 108), INTC_IRQ(DMAC0, 109),</div><div class='add'>+	INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113),</div><div class='add'>+	INTC_IRQ(DMAC2, 116), INTC_IRQ(DMAC2, 117),</div><div class='add'>+	INTC_IRQ(DMAC3, 120), INTC_IRQ(DMAC3, 121),</div><div class='add'>+	INTC_IRQ(DMAC4, 124), INTC_IRQ(DMAC4, 125),</div><div class='add'>+	INTC_IRQ(DMAC5, 128), INTC_IRQ(DMAC5, 129),</div><div class='add'>+	INTC_IRQ(DMAC6, 132), INTC_IRQ(DMAC6, 133),</div><div class='add'>+	INTC_IRQ(DMAC7, 136), INTC_IRQ(DMAC7, 137),</div><div class='add'>+	INTC_IRQ(DMAC8, 140), INTC_IRQ(DMAC8, 141),</div><div class='add'>+	INTC_IRQ(DMAC9, 144), INTC_IRQ(DMAC9, 145),</div><div class='add'>+	INTC_IRQ(DMAC10, 148), INTC_IRQ(DMAC10, 149),</div><div class='add'>+	INTC_IRQ(DMAC11, 152), INTC_IRQ(DMAC11, 153),</div><div class='add'>+	INTC_IRQ(DMAC12, 156), INTC_IRQ(DMAC12, 157),</div><div class='add'>+	INTC_IRQ(DMAC13, 160), INTC_IRQ(DMAC13, 161),</div><div class='add'>+	INTC_IRQ(DMAC14, 164), INTC_IRQ(DMAC14, 165),</div><div class='add'>+	INTC_IRQ(DMAC15, 168), INTC_IRQ(DMAC15, 169),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(USB, 170),</div><div class='add'>+	INTC_IRQ(VDC3, 171), INTC_IRQ(VDC3, 172),</div><div class='add'>+	INTC_IRQ(VDC3, 173), INTC_IRQ(VDC3, 174),</div><div class='add'>+	INTC_IRQ(CMT0, 175), INTC_IRQ(CMT1, 176),</div><div class='add'>+	INTC_IRQ(BSC, 177), INTC_IRQ(WDT, 178),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(MTU0_ABCD, 179), INTC_IRQ(MTU0_ABCD, 180),</div><div class='add'>+	INTC_IRQ(MTU0_ABCD, 181), INTC_IRQ(MTU0_ABCD, 182),</div><div class='add'>+	INTC_IRQ(MTU0_VEF, 183),</div><div class='add'>+	INTC_IRQ(MTU0_VEF, 184), INTC_IRQ(MTU0_VEF, 185),</div><div class='add'>+	INTC_IRQ(MTU1_AB, 186), INTC_IRQ(MTU1_AB, 187),</div><div class='add'>+	INTC_IRQ(MTU1_VU, 188), INTC_IRQ(MTU1_VU, 189),</div><div class='add'>+	INTC_IRQ(MTU2_AB, 190), INTC_IRQ(MTU2_AB, 191),</div><div class='add'>+	INTC_IRQ(MTU2_VU, 192), INTC_IRQ(MTU2_VU, 193),</div><div class='add'>+	INTC_IRQ(MTU3_ABCD, 194), INTC_IRQ(MTU3_ABCD, 195),</div><div class='add'>+	INTC_IRQ(MTU3_ABCD, 196), INTC_IRQ(MTU3_ABCD, 197),</div><div class='add'>+	INTC_IRQ(MTU3_TCI3V, 198),</div><div class='add'>+	INTC_IRQ(MTU4_ABCD, 199), INTC_IRQ(MTU4_ABCD, 200),</div><div class='add'>+	INTC_IRQ(MTU4_ABCD, 201), INTC_IRQ(MTU4_ABCD, 202),</div><div class='add'>+	INTC_IRQ(MTU4_TCI4V, 203),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(PWMT1, 204), INTC_IRQ(PWMT2, 205),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(ADC_ADI, 206),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(SSIF0, 207), INTC_IRQ(SSIF0, 208),</div><div class='add'>+	INTC_IRQ(SSIF0, 209),</div><div class='add'>+	INTC_IRQ(SSII1, 210), INTC_IRQ(SSII1, 211),</div><div class='add'>+	INTC_IRQ(SSII2, 212), INTC_IRQ(SSII2, 213),</div><div class='add'>+	INTC_IRQ(SSII3, 214), INTC_IRQ(SSII3, 215),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(RSPDIF, 216),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(IIC30, 217), INTC_IRQ(IIC30, 218),</div><div class='add'>+	INTC_IRQ(IIC30, 219), INTC_IRQ(IIC30, 220),</div><div class='add'>+	INTC_IRQ(IIC30, 221),</div><div class='add'>+	INTC_IRQ(IIC31, 222), INTC_IRQ(IIC31, 223),</div><div class='add'>+	INTC_IRQ(IIC31, 224), INTC_IRQ(IIC31, 225),</div><div class='add'>+	INTC_IRQ(IIC31, 226),</div><div class='add'>+	INTC_IRQ(IIC32, 227), INTC_IRQ(IIC32, 228),</div><div class='add'>+	INTC_IRQ(IIC32, 229), INTC_IRQ(IIC32, 230),</div><div class='add'>+	INTC_IRQ(IIC32, 231),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(SCIF0_BRI, 232), INTC_IRQ(SCIF0_ERI, 233),</div><div class='add'>+	INTC_IRQ(SCIF0_RXI, 234), INTC_IRQ(SCIF0_TXI, 235),</div><div class='add'>+	INTC_IRQ(SCIF1_BRI, 236), INTC_IRQ(SCIF1_ERI, 237),</div><div class='add'>+	INTC_IRQ(SCIF1_RXI, 238), INTC_IRQ(SCIF1_TXI, 239),</div><div class='add'>+	INTC_IRQ(SCIF2_BRI, 240), INTC_IRQ(SCIF2_ERI, 241),</div><div class='add'>+	INTC_IRQ(SCIF2_RXI, 242), INTC_IRQ(SCIF2_TXI, 243),</div><div class='add'>+	INTC_IRQ(SCIF3_BRI, 244), INTC_IRQ(SCIF3_ERI, 245),</div><div class='add'>+	INTC_IRQ(SCIF3_RXI, 246), INTC_IRQ(SCIF3_TXI, 247),</div><div class='add'>+	INTC_IRQ(SCIF4_BRI, 248), INTC_IRQ(SCIF4_ERI, 249),</div><div class='add'>+	INTC_IRQ(SCIF4_RXI, 250), INTC_IRQ(SCIF4_TXI, 251),</div><div class='add'>+	INTC_IRQ(SCIF5_BRI, 252), INTC_IRQ(SCIF5_ERI, 253),</div><div class='add'>+	INTC_IRQ(SCIF5_RXI, 254), INTC_IRQ(SCIF5_TXI, 255),</div><div class='add'>+	INTC_IRQ(SCIF6_BRI, 256), INTC_IRQ(SCIF6_ERI, 257),</div><div class='add'>+	INTC_IRQ(SCIF6_RXI, 258), INTC_IRQ(SCIF6_TXI, 259),</div><div class='add'>+	INTC_IRQ(SCIF7_BRI, 260), INTC_IRQ(SCIF7_ERI, 261),</div><div class='add'>+	INTC_IRQ(SCIF7_RXI, 262), INTC_IRQ(SCIF7_TXI, 263),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(SIO_FIFO, 264),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(RSPIC0, 265), INTC_IRQ(RSPIC0, 266),</div><div class='add'>+	INTC_IRQ(RSPIC0, 267),</div><div class='add'>+	INTC_IRQ(RSPIC1, 268), INTC_IRQ(RSPIC1, 269),</div><div class='add'>+	INTC_IRQ(RSPIC1, 270),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(RCAN0, 271), INTC_IRQ(RCAN0, 272),</div><div class='add'>+	INTC_IRQ(RCAN0, 273), INTC_IRQ(RCAN0, 274),</div><div class='add'>+	INTC_IRQ(RCAN0, 275),</div><div class='add'>+	INTC_IRQ(RCAN1, 276), INTC_IRQ(RCAN1, 277),</div><div class='add'>+	INTC_IRQ(RCAN1, 278), INTC_IRQ(RCAN1, 279),</div><div class='add'>+	INTC_IRQ(RCAN1, 280),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(IEBC, 281),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(CD_ROMD, 282), INTC_IRQ(CD_ROMD, 283),</div><div class='add'>+	INTC_IRQ(CD_ROMD, 284), INTC_IRQ(CD_ROMD, 285),</div><div class='add'>+	INTC_IRQ(CD_ROMD, 286), INTC_IRQ(CD_ROMD, 287),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(NFMC, 288), INTC_IRQ(NFMC, 289),</div><div class='add'>+	INTC_IRQ(NFMC, 290), INTC_IRQ(NFMC, 291),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(SDHI, 292), INTC_IRQ(SDHI, 293),</div><div class='add'>+	INTC_IRQ(SDHI, 294),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(RTC, 296), INTC_IRQ(RTC, 297),</div><div class='add'>+	INTC_IRQ(RTC, 298),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(SRCC0, 299), INTC_IRQ(SRCC0, 300),</div><div class='add'>+	INTC_IRQ(SRCC0, 301), INTC_IRQ(SRCC0, 302),</div><div class='add'>+	INTC_IRQ(SRCC0, 303),</div><div class='add'>+	INTC_IRQ(SRCC1, 304), INTC_IRQ(SRCC1, 305),</div><div class='add'>+	INTC_IRQ(SRCC1, 306), INTC_IRQ(SRCC1, 307),</div><div class='add'>+	INTC_IRQ(SRCC1, 308),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(DCOMU, 310), INTC_IRQ(DCOMU, 311),</div><div class='add'>+	INTC_IRQ(DCOMU, 312),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_group groups[] __initdata = {</div><div class='add'>+	INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,</div><div class='add'>+		   PINT4, PINT5, PINT6, PINT7),</div><div class='add'>+	INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),</div><div class='add'>+	INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),</div><div class='add'>+	INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),</div><div class='add'>+	INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),</div><div class='add'>+	INTC_GROUP(SCIF4, SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI),</div><div class='add'>+	INTC_GROUP(SCIF5, SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI),</div><div class='add'>+	INTC_GROUP(SCIF6, SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI),</div><div class='add'>+	INTC_GROUP(SCIF7, SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_prio_reg prio_registers[] __initdata = {</div><div class='add'>+	{ 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },</div><div class='add'>+	{ 0xfffe081a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },</div><div class='add'>+	{ 0xfffe0820, 0, 16, 4, /* IPR05 */ { PINT, 0, 0, 0 } },</div><div class='add'>+	{ 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0,  DMAC1,  DMAC2,  DMAC3 } },</div><div class='add'>+	{ 0xfffe0c02, 0, 16, 4, /* IPR07 */ { DMAC4,  DMAC5,  DMAC6,  DMAC7 } },</div><div class='add'>+	{ 0xfffe0c04, 0, 16, 4, /* IPR08 */ { DMAC8,  DMAC9,</div><div class='add'>+					      DMAC10, DMAC11 } },</div><div class='add'>+	{ 0xfffe0c06, 0, 16, 4, /* IPR09 */ { DMAC12, DMAC13,</div><div class='add'>+					      DMAC14, DMAC15 } },</div><div class='add'>+	{ 0xfffe0c08, 0, 16, 4, /* IPR10 */ { USB, VDC3, CMT0, CMT1 } },</div><div class='add'>+	{ 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } },</div><div class='add'>+	{ 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { MTU1_AB, MTU1_VU,</div><div class='add'>+					      MTU2_AB, MTU2_VU } },</div><div class='add'>+	{ 0xfffe0c0e, 0, 16, 4, /* IPR13 */ { MTU3_ABCD, MTU3_TCI3V,</div><div class='add'>+					      MTU4_ABCD, MTU4_TCI4V } },</div><div class='add'>+	{ 0xfffe0c10, 0, 16, 4, /* IPR14 */ { PWMT1, PWMT2, ADC_ADI, 0 } },</div><div class='add'>+	{ 0xfffe0c12, 0, 16, 4, /* IPR15 */ { SSIF0, SSII1, SSII2, SSII3 } },</div><div class='add'>+	{ 0xfffe0c14, 0, 16, 4, /* IPR16 */ { RSPDIF, IIC30, IIC31, IIC32 } },</div><div class='add'>+	{ 0xfffe0c16, 0, 16, 4, /* IPR17 */ { SCIF0, SCIF1, SCIF2, SCIF3 } },</div><div class='add'>+	{ 0xfffe0c18, 0, 16, 4, /* IPR18 */ { SCIF4, SCIF5, SCIF6, SCIF7 } },</div><div class='add'>+	{ 0xfffe0c1a, 0, 16, 4, /* IPR19 */ { SIO_FIFO, 0, RSPIC0, RSPIC1, } },</div><div class='add'>+	{ 0xfffe0c1c, 0, 16, 4, /* IPR20 */ { RCAN0, RCAN1, IEBC, CD_ROMD } },</div><div class='add'>+	{ 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { NFMC, SDHI, RTC, 0 } },</div><div class='add'>+	{ 0xfffe0c20, 0, 16, 4, /* IPR22 */ { SRCC0, SRCC1, 0, DCOMU } },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_mask_reg mask_registers[] __initdata = {</div><div class='add'>+	{ 0xfffe0808, 0, 16, /* PINTER */</div><div class='add'>+	  { 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+	    PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DECLARE_INTC_DESC(intc_desc, "sh7264", vectors, groups,</div><div class='add'>+			 mask_registers, prio_registers, NULL);</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif0_platform_data = {</div><div class='add'>+	.mapbase	= 0xfffe8000,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 233, 234, 235, 232 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif0_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif0_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif1_platform_data = {</div><div class='add'>+	.mapbase	= 0xfffe8800,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 237, 238, 239, 236 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif1_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 1,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif1_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif2_platform_data = {</div><div class='add'>+	.mapbase	= 0xfffe9000,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 241, 242, 243, 240 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif2_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 2,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif2_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif3_platform_data = {</div><div class='add'>+	.mapbase	= 0xfffe9800,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 245, 246, 247, 244 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif3_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 3,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif3_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif4_platform_data = {</div><div class='add'>+	.mapbase	= 0xfffea000,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 249, 250, 251, 248 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif4_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 4,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif4_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif5_platform_data = {</div><div class='add'>+	.mapbase	= 0xfffea800,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 253, 254, 255, 252 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif5_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 5,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif5_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif6_platform_data = {</div><div class='add'>+	.mapbase	= 0xfffeb000,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 257, 258, 259, 256 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif6_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 6,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif6_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif7_platform_data = {</div><div class='add'>+	.mapbase	= 0xfffeb800,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 261, 262, 263, 260 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif7_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 7,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif7_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config cmt0_platform_data = {</div><div class='add'>+	.channel_offset = 0x02,</div><div class='add'>+	.timer_bit = 0,</div><div class='add'>+	.clockevent_rating = 125,</div><div class='add'>+	.clocksource_rating = 0, /* disabled due to code generation issues */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource cmt0_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "CMT0",</div><div class='add'>+		.start	= 0xfffec002,</div><div class='add'>+		.end	= 0xfffec007,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= 175,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device cmt0_device = {</div><div class='add'>+	.name		= "sh_cmt",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;cmt0_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= cmt0_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(cmt0_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config cmt1_platform_data = {</div><div class='add'>+	.name = "CMT1",</div><div class='add'>+	.channel_offset = 0x08,</div><div class='add'>+	.timer_bit = 1,</div><div class='add'>+	.clockevent_rating = 125,</div><div class='add'>+	.clocksource_rating = 0, /* disabled due to code generation issues */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource cmt1_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "CMT1",</div><div class='add'>+		.start	= 0xfffec008,</div><div class='add'>+		.end	= 0xfffec00d,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= 176,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device cmt1_device = {</div><div class='add'>+	.name		= "sh_cmt",</div><div class='add'>+	.id		= 1,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;cmt1_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= cmt1_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(cmt1_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config mtu2_0_platform_data = {</div><div class='add'>+	.name = "MTU2_0",</div><div class='add'>+	.channel_offset = -0x80,</div><div class='add'>+	.timer_bit = 0,</div><div class='add'>+	.clockevent_rating = 200,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource mtu2_0_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "MTU2_0",</div><div class='add'>+		.start	= 0xfffe4300,</div><div class='add'>+		.end	= 0xfffe4326,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= 179,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device mtu2_0_device = {</div><div class='add'>+	.name		= "sh_mtu2",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;mtu2_0_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= mtu2_0_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(mtu2_0_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config mtu2_1_platform_data = {</div><div class='add'>+	.name = "MTU2_1",</div><div class='add'>+	.channel_offset = -0x100,</div><div class='add'>+	.timer_bit = 1,</div><div class='add'>+	.clockevent_rating = 200,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource mtu2_1_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "MTU2_1",</div><div class='add'>+		.start	= 0xfffe4380,</div><div class='add'>+		.end	= 0xfffe4390,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= 186,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device mtu2_1_device = {</div><div class='add'>+	.name		= "sh_mtu2",</div><div class='add'>+	.id		= 1,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;mtu2_1_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= mtu2_1_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(mtu2_1_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource rtc_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xfffe6000,</div><div class='add'>+		.end	= 0xfffe6000 + 0x30 - 1,</div><div class='add'>+		.flags	= IORESOURCE_IO,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		/* Shared Period/Carry/Alarm IRQ */</div><div class='add'>+		.start	= 296,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device rtc_device = {</div><div class='add'>+	.name		= "sh-rtc",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(rtc_resources),</div><div class='add'>+	.resource	= rtc_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB Host */</div><div class='add'>+static void usb_port_power(int port, int power)</div><div class='add'>+{</div><div class='add'>+	__raw_writew(0x200 , 0xffffc0c2) ; /* Initialise UACS25 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct r8a66597_platdata r8a66597_data = {</div><div class='add'>+	.on_chip = 1,</div><div class='add'>+	.endian = 1,</div><div class='add'>+	.port_power = usb_port_power,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource r8a66597_usb_host_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xffffc000,</div><div class='add'>+		.end	= 0xffffc0e4,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= 170,</div><div class='add'>+		.end	= 170,</div><div class='add'>+		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device r8a66597_usb_host_device = {</div><div class='add'>+	.name		= "r8a66597_hcd",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.dev = {</div><div class='add'>+		.dma_mask		= NULL,         /*  not use dma */</div><div class='add'>+		.coherent_dma_mask	= 0xffffffff,</div><div class='add'>+		.platform_data		= &amp;r8a66597_data,</div><div class='add'>+	},</div><div class='add'>+	.num_resources	= ARRAY_SIZE(r8a66597_usb_host_resources),</div><div class='add'>+	.resource	= r8a66597_usb_host_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *sh7264_devices[] __initdata = {</div><div class='add'>+	&amp;scif0_device,</div><div class='add'>+	&amp;scif1_device,</div><div class='add'>+	&amp;scif2_device,</div><div class='add'>+	&amp;scif3_device,</div><div class='add'>+	&amp;scif4_device,</div><div class='add'>+	&amp;scif5_device,</div><div class='add'>+	&amp;scif6_device,</div><div class='add'>+	&amp;scif7_device,</div><div class='add'>+	&amp;cmt0_device,</div><div class='add'>+	&amp;cmt1_device,</div><div class='add'>+	&amp;mtu2_0_device,</div><div class='add'>+	&amp;mtu2_1_device,</div><div class='add'>+	&amp;rtc_device,</div><div class='add'>+	&amp;r8a66597_usb_host_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init sh7264_devices_setup(void)</div><div class='add'>+{</div><div class='add'>+	return platform_add_devices(sh7264_devices,</div><div class='add'>+				    ARRAY_SIZE(sh7264_devices));</div><div class='add'>+}</div><div class='add'>+arch_initcall(sh7264_devices_setup);</div><div class='add'>+</div><div class='add'>+void __init plat_irq_setup(void)</div><div class='add'>+{</div><div class='add'>+	register_intc_controller(&amp;intc_desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_device *sh7264_early_devices[] __initdata = {</div><div class='add'>+	&amp;scif0_device,</div><div class='add'>+	&amp;scif1_device,</div><div class='add'>+	&amp;scif2_device,</div><div class='add'>+	&amp;scif3_device,</div><div class='add'>+	&amp;scif4_device,</div><div class='add'>+	&amp;scif5_device,</div><div class='add'>+	&amp;scif6_device,</div><div class='add'>+	&amp;scif7_device,</div><div class='add'>+	&amp;cmt0_device,</div><div class='add'>+	&amp;cmt1_device,</div><div class='add'>+	&amp;mtu2_0_device,</div><div class='add'>+	&amp;mtu2_1_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init plat_early_device_setup(void)</div><div class='add'>+{</div><div class='add'>+	early_platform_add_devices(sh7264_early_devices,</div><div class='add'>+				   ARRAY_SIZE(sh7264_early_devices));</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c b/arch/sh/kernel/cpu/sh2a/setup-sh7269.c<br/>new file mode 100644<br/>index 000000000000..e82ae9d8d3bc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh2a/setup-sh7269.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh2a/setup-sh7269.c</a></div><div class='hunk'>@@ -0,0 +1,615 @@</div><div class='add'>+/*</div><div class='add'>+ * SH7269 Setup</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012  Renesas Electronics Europe Ltd</div><div class='add'>+ * Copyright (C) 2012  Phil Edworthy</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/serial.h&gt;</div><div class='add'>+#include &lt;linux/serial_sci.h&gt;</div><div class='add'>+#include &lt;linux/usb/r8a66597.h&gt;</div><div class='add'>+#include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	UNUSED = 0,</div><div class='add'>+</div><div class='add'>+	/* interrupt sources */</div><div class='add'>+	IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,</div><div class='add'>+	PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,</div><div class='add'>+</div><div class='add'>+	DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,</div><div class='add'>+	DMAC8, DMAC9, DMAC10, DMAC11, DMAC12, DMAC13, DMAC14, DMAC15,</div><div class='add'>+	USB, VDC4, CMT0, CMT1, BSC, WDT,</div><div class='add'>+	MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,</div><div class='add'>+	MTU3_ABCD, MTU3_TCI3V, MTU4_ABCD, MTU4_TCI4V,</div><div class='add'>+	PWMT1, PWMT2, ADC_ADI,</div><div class='add'>+	SSIF0, SSII1, SSII2, SSII3, SSII4, SSII5,</div><div class='add'>+	RSPDIF,</div><div class='add'>+	IIC30, IIC31, IIC32, IIC33,</div><div class='add'>+	SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,</div><div class='add'>+	SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,</div><div class='add'>+	SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,</div><div class='add'>+	SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,</div><div class='add'>+	SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI,</div><div class='add'>+	SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI,</div><div class='add'>+	SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI,</div><div class='add'>+	SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI,</div><div class='add'>+	RCAN0, RCAN1, RCAN2,</div><div class='add'>+	RSPIC0, RSPIC1,</div><div class='add'>+	IEBC, CD_ROMD,</div><div class='add'>+	NFMC,</div><div class='add'>+	SDHI0, SDHI1,</div><div class='add'>+	RTC,</div><div class='add'>+	SRCC0, SRCC1, SRCC2,</div><div class='add'>+</div><div class='add'>+	/* interrupt groups */</div><div class='add'>+	PINT, SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_vect vectors[] __initdata = {</div><div class='add'>+	INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),</div><div class='add'>+	INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),</div><div class='add'>+	INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),</div><div class='add'>+	INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),</div><div class='add'>+	INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),</div><div class='add'>+	INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),</div><div class='add'>+	INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(DMAC0, 108), INTC_IRQ(DMAC0, 109),</div><div class='add'>+	INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113),</div><div class='add'>+	INTC_IRQ(DMAC2, 116), INTC_IRQ(DMAC2, 117),</div><div class='add'>+	INTC_IRQ(DMAC3, 120), INTC_IRQ(DMAC3, 121),</div><div class='add'>+	INTC_IRQ(DMAC4, 124), INTC_IRQ(DMAC4, 125),</div><div class='add'>+	INTC_IRQ(DMAC5, 128), INTC_IRQ(DMAC5, 129),</div><div class='add'>+	INTC_IRQ(DMAC6, 132), INTC_IRQ(DMAC6, 133),</div><div class='add'>+	INTC_IRQ(DMAC7, 136), INTC_IRQ(DMAC7, 137),</div><div class='add'>+	INTC_IRQ(DMAC8, 140), INTC_IRQ(DMAC8, 141),</div><div class='add'>+	INTC_IRQ(DMAC9, 144), INTC_IRQ(DMAC9, 145),</div><div class='add'>+	INTC_IRQ(DMAC10, 148), INTC_IRQ(DMAC10, 149),</div><div class='add'>+	INTC_IRQ(DMAC11, 152), INTC_IRQ(DMAC11, 153),</div><div class='add'>+	INTC_IRQ(DMAC12, 156), INTC_IRQ(DMAC12, 157),</div><div class='add'>+	INTC_IRQ(DMAC13, 160), INTC_IRQ(DMAC13, 161),</div><div class='add'>+	INTC_IRQ(DMAC14, 164), INTC_IRQ(DMAC14, 165),</div><div class='add'>+	INTC_IRQ(DMAC15, 168), INTC_IRQ(DMAC15, 169),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(USB, 170),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(VDC4, 171), INTC_IRQ(VDC4, 172),</div><div class='add'>+	INTC_IRQ(VDC4, 173), INTC_IRQ(VDC4, 174),</div><div class='add'>+	INTC_IRQ(VDC4, 175), INTC_IRQ(VDC4, 176),</div><div class='add'>+	INTC_IRQ(VDC4, 177), INTC_IRQ(VDC4, 177),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(CMT0, 188), INTC_IRQ(CMT1, 189),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(BSC, 190), INTC_IRQ(WDT, 191),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(MTU0_ABCD, 192), INTC_IRQ(MTU0_ABCD, 193),</div><div class='add'>+	INTC_IRQ(MTU0_ABCD, 194), INTC_IRQ(MTU0_ABCD, 195),</div><div class='add'>+	INTC_IRQ(MTU0_VEF, 196), INTC_IRQ(MTU0_VEF, 197),</div><div class='add'>+	INTC_IRQ(MTU0_VEF, 198),</div><div class='add'>+	INTC_IRQ(MTU1_AB, 199), INTC_IRQ(MTU1_AB, 200),</div><div class='add'>+	INTC_IRQ(MTU1_VU, 201), INTC_IRQ(MTU1_VU, 202),</div><div class='add'>+	INTC_IRQ(MTU2_AB, 203), INTC_IRQ(MTU2_AB, 204),</div><div class='add'>+	INTC_IRQ(MTU2_VU, 205), INTC_IRQ(MTU2_VU, 206),</div><div class='add'>+	INTC_IRQ(MTU3_ABCD, 207), INTC_IRQ(MTU3_ABCD, 208),</div><div class='add'>+	INTC_IRQ(MTU3_ABCD, 209), INTC_IRQ(MTU3_ABCD, 210),</div><div class='add'>+	INTC_IRQ(MTU3_TCI3V, 211),</div><div class='add'>+	INTC_IRQ(MTU4_ABCD, 212), INTC_IRQ(MTU4_ABCD, 213),</div><div class='add'>+	INTC_IRQ(MTU4_ABCD, 214), INTC_IRQ(MTU4_ABCD, 215),</div><div class='add'>+	INTC_IRQ(MTU4_TCI4V, 216),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(PWMT1, 217), INTC_IRQ(PWMT2, 218),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(ADC_ADI, 223),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(SSIF0, 224), INTC_IRQ(SSIF0, 225),</div><div class='add'>+	INTC_IRQ(SSIF0, 226),</div><div class='add'>+	INTC_IRQ(SSII1, 227), INTC_IRQ(SSII1, 228),</div><div class='add'>+	INTC_IRQ(SSII2, 229), INTC_IRQ(SSII2, 230),</div><div class='add'>+	INTC_IRQ(SSII3, 231), INTC_IRQ(SSII3, 232),</div><div class='add'>+	INTC_IRQ(SSII4, 233), INTC_IRQ(SSII4, 234),</div><div class='add'>+	INTC_IRQ(SSII5, 235), INTC_IRQ(SSII5, 236),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(RSPDIF, 237),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(IIC30, 238), INTC_IRQ(IIC30, 239),</div><div class='add'>+	INTC_IRQ(IIC30, 240), INTC_IRQ(IIC30, 241),</div><div class='add'>+	INTC_IRQ(IIC30, 242),</div><div class='add'>+	INTC_IRQ(IIC31, 243), INTC_IRQ(IIC31, 244),</div><div class='add'>+	INTC_IRQ(IIC31, 245), INTC_IRQ(IIC31, 246),</div><div class='add'>+	INTC_IRQ(IIC31, 247),</div><div class='add'>+	INTC_IRQ(IIC32, 248), INTC_IRQ(IIC32, 249),</div><div class='add'>+	INTC_IRQ(IIC32, 250), INTC_IRQ(IIC32, 251),</div><div class='add'>+	INTC_IRQ(IIC32, 252),</div><div class='add'>+	INTC_IRQ(IIC33, 253), INTC_IRQ(IIC33, 254),</div><div class='add'>+	INTC_IRQ(IIC33, 255), INTC_IRQ(IIC33, 256),</div><div class='add'>+	INTC_IRQ(IIC33, 257),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(SCIF0_BRI, 258), INTC_IRQ(SCIF0_ERI, 259),</div><div class='add'>+	INTC_IRQ(SCIF0_RXI, 260), INTC_IRQ(SCIF0_TXI, 261),</div><div class='add'>+	INTC_IRQ(SCIF1_BRI, 262), INTC_IRQ(SCIF1_ERI, 263),</div><div class='add'>+	INTC_IRQ(SCIF1_RXI, 264), INTC_IRQ(SCIF1_TXI, 265),</div><div class='add'>+	INTC_IRQ(SCIF2_BRI, 266), INTC_IRQ(SCIF2_ERI, 267),</div><div class='add'>+	INTC_IRQ(SCIF2_RXI, 268), INTC_IRQ(SCIF2_TXI, 269),</div><div class='add'>+	INTC_IRQ(SCIF3_BRI, 270), INTC_IRQ(SCIF3_ERI, 271),</div><div class='add'>+	INTC_IRQ(SCIF3_RXI, 272), INTC_IRQ(SCIF3_TXI, 273),</div><div class='add'>+	INTC_IRQ(SCIF4_BRI, 274), INTC_IRQ(SCIF4_ERI, 275),</div><div class='add'>+	INTC_IRQ(SCIF4_RXI, 276), INTC_IRQ(SCIF4_TXI, 277),</div><div class='add'>+	INTC_IRQ(SCIF5_BRI, 278), INTC_IRQ(SCIF5_ERI, 279),</div><div class='add'>+	INTC_IRQ(SCIF5_RXI, 280), INTC_IRQ(SCIF5_TXI, 281),</div><div class='add'>+	INTC_IRQ(SCIF6_BRI, 282), INTC_IRQ(SCIF6_ERI, 283),</div><div class='add'>+	INTC_IRQ(SCIF6_RXI, 284), INTC_IRQ(SCIF6_TXI, 285),</div><div class='add'>+	INTC_IRQ(SCIF7_BRI, 286), INTC_IRQ(SCIF7_ERI, 287),</div><div class='add'>+	INTC_IRQ(SCIF7_RXI, 288), INTC_IRQ(SCIF7_TXI, 289),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(RCAN0, 291), INTC_IRQ(RCAN0, 292),</div><div class='add'>+	INTC_IRQ(RCAN0, 293), INTC_IRQ(RCAN0, 294),</div><div class='add'>+	INTC_IRQ(RCAN0, 295),</div><div class='add'>+	INTC_IRQ(RCAN1, 296), INTC_IRQ(RCAN1, 297),</div><div class='add'>+	INTC_IRQ(RCAN1, 298), INTC_IRQ(RCAN1, 299),</div><div class='add'>+	INTC_IRQ(RCAN1, 300),</div><div class='add'>+	INTC_IRQ(RCAN2, 301), INTC_IRQ(RCAN2, 302),</div><div class='add'>+	INTC_IRQ(RCAN2, 303), INTC_IRQ(RCAN2, 304),</div><div class='add'>+	INTC_IRQ(RCAN2, 305),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(RSPIC0, 306), INTC_IRQ(RSPIC0, 307),</div><div class='add'>+	INTC_IRQ(RSPIC0, 308),</div><div class='add'>+	INTC_IRQ(RSPIC1, 309), INTC_IRQ(RSPIC1, 310),</div><div class='add'>+	INTC_IRQ(RSPIC1, 311),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(IEBC, 318),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(CD_ROMD, 319), INTC_IRQ(CD_ROMD, 320),</div><div class='add'>+	INTC_IRQ(CD_ROMD, 321), INTC_IRQ(CD_ROMD, 322),</div><div class='add'>+	INTC_IRQ(CD_ROMD, 323), INTC_IRQ(CD_ROMD, 324),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(NFMC, 325), INTC_IRQ(NFMC, 326),</div><div class='add'>+	INTC_IRQ(NFMC, 327), INTC_IRQ(NFMC, 328),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(SDHI0, 332), INTC_IRQ(SDHI0, 333),</div><div class='add'>+	INTC_IRQ(SDHI0, 334),</div><div class='add'>+	INTC_IRQ(SDHI1, 335), INTC_IRQ(SDHI1, 336),</div><div class='add'>+	INTC_IRQ(SDHI1, 337),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(RTC, 338), INTC_IRQ(RTC, 339),</div><div class='add'>+	INTC_IRQ(RTC, 340),</div><div class='add'>+</div><div class='add'>+	INTC_IRQ(SRCC0, 341), INTC_IRQ(SRCC0, 342),</div><div class='add'>+	INTC_IRQ(SRCC0, 343), INTC_IRQ(SRCC0, 344),</div><div class='add'>+	INTC_IRQ(SRCC0, 345),</div><div class='add'>+	INTC_IRQ(SRCC1, 346), INTC_IRQ(SRCC1, 347),</div><div class='add'>+	INTC_IRQ(SRCC1, 348), INTC_IRQ(SRCC1, 349),</div><div class='add'>+	INTC_IRQ(SRCC1, 350),</div><div class='add'>+	INTC_IRQ(SRCC2, 351), INTC_IRQ(SRCC2, 352),</div><div class='add'>+	INTC_IRQ(SRCC2, 353), INTC_IRQ(SRCC2, 354),</div><div class='add'>+	INTC_IRQ(SRCC2, 355),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_group groups[] __initdata = {</div><div class='add'>+	INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,</div><div class='add'>+		   PINT4, PINT5, PINT6, PINT7),</div><div class='add'>+	INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),</div><div class='add'>+	INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),</div><div class='add'>+	INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),</div><div class='add'>+	INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),</div><div class='add'>+	INTC_GROUP(SCIF4, SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI),</div><div class='add'>+	INTC_GROUP(SCIF5, SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI),</div><div class='add'>+	INTC_GROUP(SCIF6, SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI),</div><div class='add'>+	INTC_GROUP(SCIF7, SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_prio_reg prio_registers[] __initdata = {</div><div class='add'>+	{ 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },</div><div class='add'>+	{ 0xfffe081a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },</div><div class='add'>+	{ 0xfffe0820, 0, 16, 4, /* IPR05 */ { PINT, 0, 0, 0 } },</div><div class='add'>+	{ 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0,  DMAC1, DMAC2,  DMAC3 } },</div><div class='add'>+	{ 0xfffe0c02, 0, 16, 4, /* IPR07 */ { DMAC4,  DMAC5, DMAC6,  DMAC7 } },</div><div class='add'>+	{ 0xfffe0c04, 0, 16, 4, /* IPR08 */ { DMAC8,  DMAC9,</div><div class='add'>+					      DMAC10, DMAC11 } },</div><div class='add'>+	{ 0xfffe0c06, 0, 16, 4, /* IPR09 */ { DMAC12, DMAC13,</div><div class='add'>+					      DMAC14, DMAC15 } },</div><div class='add'>+	{ 0xfffe0c08, 0, 16, 4, /* IPR10 */ { USB, VDC4, VDC4, VDC4 } },</div><div class='add'>+	{ 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { 0, 0, 0, 0 } },</div><div class='add'>+	{ 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { CMT0, CMT1, BSC, WDT } },</div><div class='add'>+	{ 0xfffe0c0e, 0, 16, 4, /* IPR13 */ { MTU0_ABCD, MTU0_VEF,</div><div class='add'>+					      MTU1_AB, MTU1_VU } },</div><div class='add'>+	{ 0xfffe0c10, 0, 16, 4, /* IPR14 */ { MTU2_AB, MTU2_VU,</div><div class='add'>+					      MTU3_ABCD, MTU3_TCI3V } },</div><div class='add'>+	{ 0xfffe0c12, 0, 16, 4, /* IPR15 */ { MTU4_ABCD, MTU4_TCI4V,</div><div class='add'>+					      PWMT1, PWMT2 } },</div><div class='add'>+	{ 0xfffe0c14, 0, 16, 4, /* IPR16 */ { 0, 0, 0, 0 } },</div><div class='add'>+	{ 0xfffe0c16, 0, 16, 4, /* IPR17 */ { ADC_ADI, SSIF0, SSII1, SSII2 } },</div><div class='add'>+	{ 0xfffe0c18, 0, 16, 4, /* IPR18 */ { SSII3, SSII4, SSII5,  RSPDIF} },</div><div class='add'>+	{ 0xfffe0c1a, 0, 16, 4, /* IPR19 */ { IIC30, IIC31, IIC32, IIC33 } },</div><div class='add'>+	{ 0xfffe0c1c, 0, 16, 4, /* IPR20 */ { SCIF0, SCIF1, SCIF2, SCIF3 } },</div><div class='add'>+	{ 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { SCIF4, SCIF5, SCIF6, SCIF7 } },</div><div class='add'>+	{ 0xfffe0c20, 0, 16, 4, /* IPR22 */ { 0, RCAN0, RCAN1, RCAN2 } },</div><div class='add'>+	{ 0xfffe0c22, 0, 16, 4, /* IPR23 */ { RSPIC0, RSPIC1, 0, 0 } },</div><div class='add'>+	{ 0xfffe0c24, 0, 16, 4, /* IPR24 */ { IEBC, CD_ROMD, NFMC, 0 } },</div><div class='add'>+	{ 0xfffe0c26, 0, 16, 4, /* IPR25 */ { SDHI0, SDHI1, RTC, 0 } },</div><div class='add'>+	{ 0xfffe0c28, 0, 16, 4, /* IPR26 */ { SRCC0, SRCC1, SRCC2, 0 } },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_mask_reg mask_registers[] __initdata = {</div><div class='add'>+	{ 0xfffe0808, 0, 16, /* PINTER */</div><div class='add'>+	  { 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+	    PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DECLARE_INTC_DESC(intc_desc, "sh7269", vectors, groups,</div><div class='add'>+			 mask_registers, prio_registers, NULL);</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif0_platform_data = {</div><div class='add'>+	.mapbase	= 0xe8007000,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 259, 260, 261, 258 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif0_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif0_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif1_platform_data = {</div><div class='add'>+	.mapbase	= 0xe8007800,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 263, 264, 265, 262 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif1_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 1,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif1_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif2_platform_data = {</div><div class='add'>+	.mapbase	= 0xe8008000,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 267, 268, 269, 266 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif2_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 2,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif2_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif3_platform_data = {</div><div class='add'>+	.mapbase	= 0xe8008800,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 271, 272, 273, 270 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif3_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 3,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif3_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif4_platform_data = {</div><div class='add'>+	.mapbase	= 0xe8009000,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 275, 276, 277, 274 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif4_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 4,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif4_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif5_platform_data = {</div><div class='add'>+	.mapbase	= 0xe8009800,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 279, 280, 281, 278 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif5_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 5,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif5_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif6_platform_data = {</div><div class='add'>+	.mapbase	= 0xe800a000,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 283, 284, 285, 282 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif6_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 6,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif6_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif7_platform_data = {</div><div class='add'>+	.mapbase	= 0xe800a800,</div><div class='add'>+	.flags		= UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |</div><div class='add'>+			  SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type		= PORT_SCIF,</div><div class='add'>+	.irqs		=  { 287, 288, 289, 286 },</div><div class='add'>+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif7_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id		= 7,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif7_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config cmt0_platform_data = {</div><div class='add'>+	.channel_offset = 0x02,</div><div class='add'>+	.timer_bit = 0,</div><div class='add'>+	.clockevent_rating = 125,</div><div class='add'>+	.clocksource_rating = 0, /* disabled due to code generation issues */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource cmt0_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xfffec002,</div><div class='add'>+		.end	= 0xfffec007,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= 188,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device cmt0_device = {</div><div class='add'>+	.name		= "sh_cmt",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;cmt0_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= cmt0_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(cmt0_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config cmt1_platform_data = {</div><div class='add'>+	.channel_offset = 0x08,</div><div class='add'>+	.timer_bit = 1,</div><div class='add'>+	.clockevent_rating = 125,</div><div class='add'>+	.clocksource_rating = 0, /* disabled due to code generation issues */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource cmt1_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xfffec008,</div><div class='add'>+		.end	= 0xfffec00d,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= 189,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device cmt1_device = {</div><div class='add'>+	.name		= "sh_cmt",</div><div class='add'>+	.id		= 1,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;cmt1_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= cmt1_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(cmt1_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config mtu2_0_platform_data = {</div><div class='add'>+	.channel_offset = -0x80,</div><div class='add'>+	.timer_bit = 0,</div><div class='add'>+	.clockevent_rating = 200,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource mtu2_0_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xfffe4300,</div><div class='add'>+		.end	= 0xfffe4326,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= 192,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device mtu2_0_device = {</div><div class='add'>+	.name		= "sh_mtu2",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;mtu2_0_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= mtu2_0_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(mtu2_0_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config mtu2_1_platform_data = {</div><div class='add'>+	.channel_offset = -0x100,</div><div class='add'>+	.timer_bit = 1,</div><div class='add'>+	.clockevent_rating = 200,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource mtu2_1_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xfffe4380,</div><div class='add'>+		.end	= 0xfffe4390,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= 203,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device mtu2_1_device = {</div><div class='add'>+	.name		= "sh_mtu2",</div><div class='add'>+	.id		= 1,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;mtu2_1_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= mtu2_1_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(mtu2_1_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource rtc_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xfffe6000,</div><div class='add'>+		.end	= 0xfffe6000 + 0x30 - 1,</div><div class='add'>+		.flags	= IORESOURCE_IO,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		/* Shared Period/Carry/Alarm IRQ */</div><div class='add'>+		.start	= 338,</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device rtc_device = {</div><div class='add'>+	.name		= "sh-rtc",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(rtc_resources),</div><div class='add'>+	.resource	= rtc_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB Host */</div><div class='add'>+static struct r8a66597_platdata r8a66597_data = {</div><div class='add'>+	.on_chip = 1,</div><div class='add'>+	.endian = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource r8a66597_usb_host_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xe8010000,</div><div class='add'>+		.end	= 0xe80100e4,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= 170,</div><div class='add'>+		.end	= 170,</div><div class='add'>+		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device r8a66597_usb_host_device = {</div><div class='add'>+	.name		= "r8a66597_hcd",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.dev = {</div><div class='add'>+		.dma_mask		= NULL,         /*  not use dma */</div><div class='add'>+		.coherent_dma_mask	= 0xffffffff,</div><div class='add'>+		.platform_data		= &amp;r8a66597_data,</div><div class='add'>+	},</div><div class='add'>+	.num_resources	= ARRAY_SIZE(r8a66597_usb_host_resources),</div><div class='add'>+	.resource	= r8a66597_usb_host_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *sh7269_devices[] __initdata = {</div><div class='add'>+	&amp;scif0_device,</div><div class='add'>+	&amp;scif1_device,</div><div class='add'>+	&amp;scif2_device,</div><div class='add'>+	&amp;scif3_device,</div><div class='add'>+	&amp;scif4_device,</div><div class='add'>+	&amp;scif5_device,</div><div class='add'>+	&amp;scif6_device,</div><div class='add'>+	&amp;scif7_device,</div><div class='add'>+	&amp;cmt0_device,</div><div class='add'>+	&amp;cmt1_device,</div><div class='add'>+	&amp;mtu2_0_device,</div><div class='add'>+	&amp;mtu2_1_device,</div><div class='add'>+	&amp;rtc_device,</div><div class='add'>+	&amp;r8a66597_usb_host_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init sh7269_devices_setup(void)</div><div class='add'>+{</div><div class='add'>+	return platform_add_devices(sh7269_devices,</div><div class='add'>+				    ARRAY_SIZE(sh7269_devices));</div><div class='add'>+}</div><div class='add'>+arch_initcall(sh7269_devices_setup);</div><div class='add'>+</div><div class='add'>+void __init plat_irq_setup(void)</div><div class='add'>+{</div><div class='add'>+	register_intc_controller(&amp;intc_desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_device *sh7269_early_devices[] __initdata = {</div><div class='add'>+	&amp;scif0_device,</div><div class='add'>+	&amp;scif1_device,</div><div class='add'>+	&amp;scif2_device,</div><div class='add'>+	&amp;scif3_device,</div><div class='add'>+	&amp;scif4_device,</div><div class='add'>+	&amp;scif5_device,</div><div class='add'>+	&amp;scif6_device,</div><div class='add'>+	&amp;scif7_device,</div><div class='add'>+	&amp;cmt0_device,</div><div class='add'>+	&amp;cmt1_device,</div><div class='add'>+	&amp;mtu2_0_device,</div><div class='add'>+	&amp;mtu2_1_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init plat_early_device_setup(void)</div><div class='add'>+{</div><div class='add'>+	early_platform_add_devices(sh7269_early_devices,</div><div class='add'>+				   ARRAY_SIZE(sh7269_early_devices));</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S<br/>index f6a389c996cb..262db6ec067b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh3/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh3/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh3/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh3/entry.S</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'>  * arch/sh/kernel/cpu/sh3/entry.S</div><div class='ctx'>  *</div><div class='ctx'>  *  Copyright (C) 1999, 2000, 2002  Niibe Yutaka</div><div class='del'>- *  Copyright (C) 2003 - 2006  Paul Mundt</div><div class='add'>+ *  Copyright (C) 2003 - 2012  Paul Mundt</div><div class='ctx'>  *</div><div class='ctx'>  * This file is subject to the terms and conditions of the GNU General Public</div><div class='ctx'>  * License.  See the file "COPYING" in the main directory of this archive</div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;cpu/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;</div><div class='ctx'> </div><div class='ctx'> ! NOTE:</div><div class='ctx'> ! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address</div><div class='hunk'>@@ -114,22 +115,22 @@ ENTRY(tlb_miss_load)</div><div class='ctx'> 	.align	2</div><div class='ctx'> ENTRY(tlb_miss_store)</div><div class='ctx'> 	bra	call_handle_tlbmiss</div><div class='del'>-	 mov	#1, r5</div><div class='add'>+	 mov	#FAULT_CODE_WRITE, r5</div><div class='ctx'> </div><div class='ctx'> 	.align	2</div><div class='ctx'> ENTRY(initial_page_write)</div><div class='ctx'> 	bra	call_handle_tlbmiss</div><div class='del'>-	 mov	#2, r5</div><div class='add'>+	 mov	#FAULT_CODE_INITIAL, r5</div><div class='ctx'> </div><div class='ctx'> 	.align	2</div><div class='ctx'> ENTRY(tlb_protection_violation_load)</div><div class='ctx'> 	bra	call_do_page_fault</div><div class='del'>-	 mov	#0, r5</div><div class='add'>+	 mov	#FAULT_CODE_PROT, r5</div><div class='ctx'> </div><div class='ctx'> 	.align	2</div><div class='ctx'> ENTRY(tlb_protection_violation_store)</div><div class='ctx'> 	bra	call_do_page_fault</div><div class='del'>-	 mov	#1, r5</div><div class='add'>+	 mov	#(FAULT_CODE_PROT | FAULT_CODE_WRITE), r5</div><div class='ctx'> </div><div class='ctx'> call_handle_tlbmiss:</div><div class='ctx'> 	mov.l	1f, r0</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c<br/>index 2309618c015d..03e4c96f2b11 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh3/setup-sh7705.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh3/setup-sh7705.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh3/setup-sh7705.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh3/setup-sh7705.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/serial.h&gt;</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;asm/rtc.h&gt;</div><div class='ctx'> #include &lt;cpu/serial.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -75,7 +76,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 			  SCSCR_RE  | SCSCR_CKE1 | SCSCR_CKE0,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_4,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 56, 56, 56 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x900)),</div><div class='ctx'> 	.ops		= &amp;sh770x_sci_port_ops,</div><div class='ctx'> 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,</div><div class='ctx'> };</div><div class='hunk'>@@ -94,7 +95,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_4,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 52, 52, 52 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x880)),</div><div class='ctx'> 	.ops		= &amp;sh770x_sci_port_ops,</div><div class='ctx'> 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,</div><div class='ctx'> };</div><div class='hunk'>@@ -114,7 +115,7 @@ static struct resource rtc_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_IO,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] =	{</div><div class='del'>-		.start  = 20,</div><div class='add'>+		.start  = evt2irq(0x480),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -146,7 +147,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -174,7 +175,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -201,7 +202,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c<br/>index 3f3d5fe5892d..ba26cd9ce69b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh3/setup-sh770x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh3/setup-sh770x.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh3/setup-sh770x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh3/setup-sh770x.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/serial.h&gt;</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;cpu/serial.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -95,7 +96,7 @@ static struct resource rtc_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_IO,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] =	{</div><div class='del'>-		.start	= 20,</div><div class='add'>+		.start	= evt2irq(0x480),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -114,7 +115,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_TE | SCSCR_RE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCI,</div><div class='del'>-	.irqs		= { 23, 23, 23, 0 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x4e0)),</div><div class='ctx'> 	.ops		= &amp;sh770x_sci_port_ops,</div><div class='ctx'> 	.regshift	= 1,</div><div class='ctx'> };</div><div class='hunk'>@@ -135,7 +136,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_TE | SCSCR_RE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 56, 56, 56, 56 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x900)),</div><div class='ctx'> 	.ops		= &amp;sh770x_sci_port_ops,</div><div class='ctx'> 	.regtype	= SCIx_SH3_SCIF_REGTYPE,</div><div class='ctx'> };</div><div class='hunk'>@@ -157,7 +158,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_TE | SCSCR_RE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_IRDA,</div><div class='del'>-	.irqs		= { 52, 52, 52, 52 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x880)),</div><div class='ctx'> 	.ops		= &amp;sh770x_sci_port_ops,</div><div class='ctx'> 	.regshift	= 1,</div><div class='ctx'> };</div><div class='hunk'>@@ -184,7 +185,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -212,7 +213,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -239,7 +240,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c<br/>index 78f6b01d42c3..93c9c5e24a7a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh3/setup-sh7710.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh3/setup-sh7710.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh3/setup-sh7710.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh3/setup-sh7710.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/serial.h&gt;</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;asm/rtc.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -77,7 +78,7 @@ static struct resource rtc_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_IO,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] =	{</div><div class='del'>-		.start  = 20,</div><div class='add'>+		.start  = evt2irq(0x480),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -103,7 +104,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 			  SCSCR_CKE1 | SCSCR_CKE0,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 52, 52, 52, 52 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x880)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif0_device = {</div><div class='hunk'>@@ -121,7 +122,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 			  SCSCR_CKE1 | SCSCR_CKE0,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs           = { 56, 56, 56, 56 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif1_device = {</div><div class='hunk'>@@ -145,7 +146,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -173,7 +174,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -200,7 +201,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c<br/>index 94920345c14d..0c2f1b2c2e19 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh3/setup-sh7720.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh3/setup-sh7720.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh3/setup-sh7720.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh3/setup-sh7720.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;asm/rtc.h&gt;</div><div class='ctx'> #include &lt;cpu/serial.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -30,7 +31,7 @@ static struct resource rtc_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='ctx'> 		/* Shared Period/Carry/Alarm IRQ */</div><div class='del'>-		.start	= 20,</div><div class='add'>+		.start	= evt2irq(0x480),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -55,7 +56,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_4,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 80, 80, 80, 80 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xc00)),</div><div class='ctx'> 	.ops		= &amp;sh7720_sci_port_ops,</div><div class='ctx'> 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,</div><div class='ctx'> };</div><div class='hunk'>@@ -74,7 +75,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_4,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs           = { 81, 81, 81, 81 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),</div><div class='ctx'> 	.ops		= &amp;sh7720_sci_port_ops,</div><div class='ctx'> 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,</div><div class='ctx'> };</div><div class='hunk'>@@ -94,13 +95,14 @@ static struct resource usb_ohci_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 67,</div><div class='del'>-		.end	= 67,</div><div class='add'>+		.start	= evt2irq(0xa60),</div><div class='add'>+		.end	= evt2irq(0xa60),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u64 usb_ohci_dma_mask = 0xffffffffUL;</div><div class='add'>+</div><div class='ctx'> static struct platform_device usb_ohci_device = {</div><div class='ctx'> 	.name		= "sh_ohci",</div><div class='ctx'> 	.id		= -1,</div><div class='hunk'>@@ -121,8 +123,8 @@ static struct resource usbf_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='ctx'> 		.name	= "sh_udc",</div><div class='del'>-		.start	= 65,</div><div class='del'>-		.end	= 65,</div><div class='add'>+		.start	= evt2irq(0xa20),</div><div class='add'>+		.end	= evt2irq(0xa20),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -152,7 +154,7 @@ static struct resource cmt0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 104,</div><div class='add'>+		.start	= evt2irq(0xf00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -179,7 +181,7 @@ static struct resource cmt1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 104,</div><div class='add'>+		.start	= evt2irq(0xf00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -206,7 +208,7 @@ static struct resource cmt2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 104,</div><div class='add'>+		.start	= evt2irq(0xf00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -233,7 +235,7 @@ static struct resource cmt3_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 104,</div><div class='add'>+		.start	= evt2irq(0xf00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -260,7 +262,7 @@ static struct resource cmt4_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 104,</div><div class='add'>+		.start	= evt2irq(0xf00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -288,7 +290,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -316,7 +318,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -343,7 +345,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c<br/>index 971cf0fce4f5..0fbbd50bc8ad 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4/probe.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4/probe.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4/probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4/probe.c</a></div><div class='hunk'>@@ -158,6 +158,9 @@ void __cpuinit cpu_probe(void)</div><div class='ctx'> 		case 0x40: /* yon-ten-go */</div><div class='ctx'> 			boot_cpu_data.type = CPU_SH7372;</div><div class='ctx'> 			break;</div><div class='add'>+		case 0xE0: /* 0x4E0 */</div><div class='add'>+			boot_cpu_data.type = CPU_SH7734; /* SH7733/SH7734 */</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c<br/>index 5b2833159b7d..2a5320aa73bb 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4/setup-sh4-202.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4/setup-sh4-202.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4/setup-sh4-202.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4/setup-sh4-202.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/serial.h&gt;</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> static struct plat_sci_port scif0_platform_data = {</div><div class='hunk'>@@ -21,7 +22,10 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 40, 41, 43, 42 },</div><div class='add'>+	.irqs		= { evt2irq(0x700),</div><div class='add'>+			    evt2irq(0x720),</div><div class='add'>+			    evt2irq(0x760),</div><div class='add'>+			    evt2irq(0x740) },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif0_device = {</div><div class='hunk'>@@ -45,7 +49,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -73,7 +77,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -100,7 +104,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c<br/>index 98cc0c794c76..04a45512596f 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4/setup-sh7750.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4/setup-sh7750.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4/setup-sh7750.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4/setup-sh7750.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/serial.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> #include &lt;generated/machtypes.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -24,7 +25,7 @@ static struct resource rtc_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='ctx'> 		/* Shared Period/Carry/Alarm IRQ */</div><div class='del'>-		.start	= 20,</div><div class='add'>+		.start	= evt2irq(0x480),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -43,7 +44,7 @@ static struct plat_sci_port sci_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_TE | SCSCR_RE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCI,</div><div class='del'>-	.irqs		= { 23, 23, 23, 0 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x4e0)),</div><div class='ctx'> 	.regshift	= 2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -61,7 +62,7 @@ static struct plat_sci_port scif_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_TE | SCSCR_RE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 40, 40, 40, 40 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x700)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif_device = {</div><div class='hunk'>@@ -85,7 +86,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -113,7 +114,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -140,7 +141,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -172,7 +173,7 @@ static struct resource tmu3_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 72,</div><div class='add'>+		.start	= evt2irq(0xb00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -199,7 +200,7 @@ static struct resource tmu4_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 76,</div><div class='add'>+		.start	= evt2irq(0xb80),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c<br/>index c0b4c774700e..98e075ada44e 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4/setup-sh7760.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4/setup-sh7760.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4/setup-sh7760.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4/setup-sh7760.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/serial.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -132,7 +133,10 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 52, 53, 55, 54 },</div><div class='add'>+	.irqs		= { evt2irq(0x880),</div><div class='add'>+			    evt2irq(0x8a0),</div><div class='add'>+			    evt2irq(0x8e0),</div><div class='add'>+			    evt2irq(0x8c0) },</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -150,7 +154,10 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='del'>-	.irqs		= { 72, 73, 75, 74 },</div><div class='add'>+	.irqs		= { evt2irq(0xb00),</div><div class='add'>+			    evt2irq(0xb20),</div><div class='add'>+			    evt2irq(0xb60),</div><div class='add'>+			    evt2irq(0xb40) },</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -168,7 +175,10 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 76, 77, 79, 78 },</div><div class='add'>+	.irqs		= { evt2irq(0xb80),</div><div class='add'>+			    evt2irq(0xba0),</div><div class='add'>+			    evt2irq(0xbe0),</div><div class='add'>+			    evt2irq(0xbc0) },</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -186,7 +196,9 @@ static struct plat_sci_port scif3_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCI,</div><div class='del'>-	.irqs		= { 80, 81, 82, 0 },</div><div class='add'>+	.irqs		= { evt2irq(0xc00),</div><div class='add'>+			    evt2irq(0xc20),</div><div class='add'>+			    evt2irq(0xc40), },</div><div class='ctx'> 	.regshift	= 2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -211,7 +223,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -239,7 +251,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -266,7 +278,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile<br/>index 0b22d108f4c5..8fc6ec2be2fa 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/Makefile</a></div><div class='hunk'>@@ -13,6 +13,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7343)	+= setup-sh7343.o</div><div class='ctx'> obj-$(CONFIG_CPU_SUBTYPE_SH7722)	+= setup-sh7722.o serial-sh7722.o</div><div class='ctx'> obj-$(CONFIG_CPU_SUBTYPE_SH7723)	+= setup-sh7723.o</div><div class='ctx'> obj-$(CONFIG_CPU_SUBTYPE_SH7724)	+= setup-sh7724.o</div><div class='add'>+obj-$(CONFIG_CPU_SUBTYPE_SH7734)	+= setup-sh7734.o</div><div class='ctx'> obj-$(CONFIG_CPU_SUBTYPE_SH7366)	+= setup-sh7366.o</div><div class='ctx'> obj-$(CONFIG_CPU_SUBTYPE_SHX3)		+= setup-shx3.o intc-shx3.o</div><div class='ctx'> </div><div class='hunk'>@@ -30,6 +31,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7343)	:= clock-sh7343.o</div><div class='ctx'> clock-$(CONFIG_CPU_SUBTYPE_SH7722)	:= clock-sh7722.o</div><div class='ctx'> clock-$(CONFIG_CPU_SUBTYPE_SH7723)	:= clock-sh7723.o</div><div class='ctx'> clock-$(CONFIG_CPU_SUBTYPE_SH7724)	:= clock-sh7724.o</div><div class='add'>+clock-$(CONFIG_CPU_SUBTYPE_SH7734)	:= clock-sh7734.o</div><div class='ctx'> clock-$(CONFIG_CPU_SUBTYPE_SH7366)	:= clock-sh7366.o</div><div class='ctx'> clock-$(CONFIG_CPU_SUBTYPE_SHX3)	:= clock-shx3.o</div><div class='ctx'> </div><div class='hunk'>@@ -37,6 +39,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SHX3)	:= clock-shx3.o</div><div class='ctx'> pinmux-$(CONFIG_CPU_SUBTYPE_SH7722)	:= pinmux-sh7722.o</div><div class='ctx'> pinmux-$(CONFIG_CPU_SUBTYPE_SH7723)	:= pinmux-sh7723.o</div><div class='ctx'> pinmux-$(CONFIG_CPU_SUBTYPE_SH7724)	:= pinmux-sh7724.o</div><div class='add'>+pinmux-$(CONFIG_CPU_SUBTYPE_SH7734)	:= pinmux-sh7734.o</div><div class='ctx'> pinmux-$(CONFIG_CPU_SUBTYPE_SH7757)	:= pinmux-sh7757.o</div><div class='ctx'> pinmux-$(CONFIG_CPU_SUBTYPE_SH7785)	:= pinmux-sh7785.o</div><div class='ctx'> pinmux-$(CONFIG_CPU_SUBTYPE_SH7786)	:= pinmux-sh7786.o</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c<br/>new file mode 100644<br/>index 000000000000..1697642c1f73<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/clock-sh7734.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/clock-sh7734.c</a></div><div class='hunk'>@@ -0,0 +1,266 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/sh/kernel/cpu/sh4a/clock-sh7734.c</div><div class='add'>+ *</div><div class='add'>+ * Clock framework for SH7734</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011, 2012 Nobuhiro Iwamatsu &lt;nobuhiro.iwamatsu.yj@renesas.com&gt;</div><div class='add'>+ * Copyright (C) 2011, 2012 Renesas Solutions Corp.</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;asm/clock.h&gt;</div><div class='add'>+#include &lt;asm/freq.h&gt;</div><div class='add'>+</div><div class='add'>+static struct clk extal_clk = {</div><div class='add'>+	.rate       = 33333333,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MODEMR          (0xFFCC0020)</div><div class='add'>+#define MODEMR_MASK     (0x6)</div><div class='add'>+#define MODEMR_533MHZ   (0x2)</div><div class='add'>+</div><div class='add'>+static unsigned long pll_recalc(struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	int mode = 12;</div><div class='add'>+	u32 r = __raw_readl(MODEMR);</div><div class='add'>+</div><div class='add'>+	if ((r &amp; MODEMR_MASK) &amp; MODEMR_533MHZ)</div><div class='add'>+		mode = 16;</div><div class='add'>+</div><div class='add'>+	return clk-&gt;parent-&gt;rate * mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sh_clk_ops pll_clk_ops = {</div><div class='add'>+	.recalc		= pll_recalc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk pll_clk = {</div><div class='add'>+	.ops        = &amp;pll_clk_ops,</div><div class='add'>+	.parent     = &amp;extal_clk,</div><div class='add'>+	.flags      = CLK_ENABLE_ON_INIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *main_clks[] = {</div><div class='add'>+	&amp;extal_clk,</div><div class='add'>+	&amp;pll_clk,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int multipliers[] = { 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 };</div><div class='add'>+static int divisors[] = { 1, 3, 2, 3, 4, 6, 8, 9, 12, 16, 18, 24 };</div><div class='add'>+</div><div class='add'>+static struct clk_div_mult_table div4_div_mult_table = {</div><div class='add'>+	.divisors = divisors,</div><div class='add'>+	.nr_divisors = ARRAY_SIZE(divisors),</div><div class='add'>+	.multipliers = multipliers,</div><div class='add'>+	.nr_multipliers = ARRAY_SIZE(multipliers),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_div4_table div4_table = {</div><div class='add'>+	.div_mult_table = &amp;div4_div_mult_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum { DIV4_I, DIV4_S, DIV4_B, DIV4_M, DIV4_S1, DIV4_P, DIV4_NR };</div><div class='add'>+</div><div class='add'>+#define DIV4(_reg, _bit, _mask, _flags) \</div><div class='add'>+	SH_CLK_DIV4(&amp;pll_clk, _reg, _bit, _mask, _flags)</div><div class='add'>+</div><div class='add'>+struct clk div4_clks[DIV4_NR] = {</div><div class='add'>+	[DIV4_I] = DIV4(FRQMR1, 28, 0x0003, CLK_ENABLE_ON_INIT),</div><div class='add'>+	[DIV4_S] = DIV4(FRQMR1, 20, 0x000C, CLK_ENABLE_ON_INIT),</div><div class='add'>+	[DIV4_B] = DIV4(FRQMR1, 16, 0x0140, CLK_ENABLE_ON_INIT),</div><div class='add'>+	[DIV4_M] = DIV4(FRQMR1, 12, 0x0004, CLK_ENABLE_ON_INIT),</div><div class='add'>+	[DIV4_S1] = DIV4(FRQMR1, 4, 0x0030, CLK_ENABLE_ON_INIT),</div><div class='add'>+	[DIV4_P] = DIV4(FRQMR1, 0, 0x0140, CLK_ENABLE_ON_INIT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MSTPCR0	0xFFC80030</div><div class='add'>+#define MSTPCR1	0xFFC80034</div><div class='add'>+#define MSTPCR3	0xFFC8003C</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	MSTP030, MSTP029, /* IIC */</div><div class='add'>+	MSTP026, MSTP025, MSTP024, /* SCIF */</div><div class='add'>+	MSTP023,</div><div class='add'>+	MSTP022, MSTP021,</div><div class='add'>+	MSTP019, /* HSCIF */</div><div class='add'>+	MSTP016, MSTP015, MSTP014, /* TMU / TIMER */</div><div class='add'>+	MSTP012, MSTP011, MSTP010, MSTP009, MSTP008, /* SSI */</div><div class='add'>+	MSTP007, /* HSPI */</div><div class='add'>+	MSTP115, /* ADMAC */</div><div class='add'>+	MSTP114, /* GETHER */</div><div class='add'>+	MSTP111, /* DMAC */</div><div class='add'>+	MSTP109, /* VIDEOIN1 */</div><div class='add'>+	MSTP108, /* VIDEOIN0 */</div><div class='add'>+	MSTP107, /* RGPVBG */</div><div class='add'>+	MSTP106, /* 2DG */</div><div class='add'>+	MSTP103, /* VIEW */</div><div class='add'>+	MSTP100, /* USB */</div><div class='add'>+	MSTP331, /* MMC */</div><div class='add'>+	MSTP330, /* MIMLB */</div><div class='add'>+	MSTP323, /* SDHI0 */</div><div class='add'>+	MSTP322, /* SDHI1 */</div><div class='add'>+	MSTP321, /* SDHI2 */</div><div class='add'>+	MSTP320, /* RQSPI */</div><div class='add'>+	MSTP319, /* SRC0 */</div><div class='add'>+	MSTP318, /* SRC1 */</div><div class='add'>+	MSTP317, /* RSPI */</div><div class='add'>+	MSTP316, /* RCAN0 */</div><div class='add'>+	MSTP315, /* RCAN1 */</div><div class='add'>+	MSTP314, /* FLTCL */</div><div class='add'>+	MSTP313, /* ADC */</div><div class='add'>+	MSTP312, /* MTU */</div><div class='add'>+	MSTP304, /* IE-BUS */</div><div class='add'>+	MSTP303, /* RTC */</div><div class='add'>+	MSTP302, /* HIF */</div><div class='add'>+	MSTP301, /* STIF0 */</div><div class='add'>+	MSTP300, /* STIF1 */</div><div class='add'>+	MSTP_NR };</div><div class='add'>+</div><div class='add'>+static struct clk mstp_clks[MSTP_NR] = {</div><div class='add'>+	/* MSTPCR0 */</div><div class='add'>+	[MSTP030] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 30, 0),</div><div class='add'>+	[MSTP029] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 29, 0),</div><div class='add'>+	[MSTP026] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 26, 0),</div><div class='add'>+	[MSTP025] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 25, 0),</div><div class='add'>+	[MSTP024] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 24, 0),</div><div class='add'>+	[MSTP023] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 23, 0),</div><div class='add'>+	[MSTP022] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 22, 0),</div><div class='add'>+	[MSTP021] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 21, 0),</div><div class='add'>+	[MSTP019] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 19, 0),</div><div class='add'>+	[MSTP016] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 16, 0),</div><div class='add'>+	[MSTP015] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 15, 0),</div><div class='add'>+	[MSTP014] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 14, 0),</div><div class='add'>+	[MSTP012] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 12, 0),</div><div class='add'>+	[MSTP011] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 11, 0),</div><div class='add'>+	[MSTP010] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 10, 0),</div><div class='add'>+	[MSTP009] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 9, 0),</div><div class='add'>+	[MSTP008] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 8, 0),</div><div class='add'>+	[MSTP007] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR0, 7, 0),</div><div class='add'>+</div><div class='add'>+	/* MSTPCR1 */</div><div class='add'>+	[MSTP115] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR1, 15, 0),</div><div class='add'>+	[MSTP114] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR1, 14, 0),</div><div class='add'>+	[MSTP111] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR1, 11, 0),</div><div class='add'>+	[MSTP109] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR1, 9, 0),</div><div class='add'>+	[MSTP108] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR1, 8, 0),</div><div class='add'>+	[MSTP107] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR1, 7, 0),</div><div class='add'>+	[MSTP106] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR1, 6, 0),</div><div class='add'>+	[MSTP103] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR1, 3, 0),</div><div class='add'>+	[MSTP100] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR1, 0, 0),</div><div class='add'>+</div><div class='add'>+	/* MSTPCR3 */</div><div class='add'>+	[MSTP331] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 31, 0),</div><div class='add'>+	[MSTP330] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 30, 0),</div><div class='add'>+	[MSTP323] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 23, 0),</div><div class='add'>+	[MSTP322] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 22, 0),</div><div class='add'>+	[MSTP321] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 21, 0),</div><div class='add'>+	[MSTP320] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 20, 0),</div><div class='add'>+	[MSTP319] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 19, 0),</div><div class='add'>+	[MSTP318] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 18, 0),</div><div class='add'>+	[MSTP317] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 17, 0),</div><div class='add'>+	[MSTP316] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 16, 0),</div><div class='add'>+	[MSTP315] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 15, 0),</div><div class='add'>+	[MSTP314] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 14, 0),</div><div class='add'>+	[MSTP313] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 13, 0),</div><div class='add'>+	[MSTP312] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3, 12, 0),</div><div class='add'>+	[MSTP304] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3,  4, 0),</div><div class='add'>+	[MSTP303] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3,  3, 0),</div><div class='add'>+	[MSTP302] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3,  2, 0),</div><div class='add'>+	[MSTP301] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3,  1, 0),</div><div class='add'>+	[MSTP300] = SH_CLK_MSTP32(&amp;div4_clks[DIV4_P], MSTPCR3,  0, 0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup lookups[] = {</div><div class='add'>+	/* main clocks */</div><div class='add'>+	CLKDEV_CON_ID("extal", &amp;extal_clk),</div><div class='add'>+	CLKDEV_CON_ID("pll_clk", &amp;pll_clk),</div><div class='add'>+</div><div class='add'>+	/* clocks */</div><div class='add'>+	CLKDEV_CON_ID("cpu_clk", &amp;div4_clks[DIV4_I]),</div><div class='add'>+	CLKDEV_CON_ID("shyway_clk", &amp;div4_clks[DIV4_S]),</div><div class='add'>+	CLKDEV_CON_ID("ddr_clk", &amp;div4_clks[DIV4_M]),</div><div class='add'>+	CLKDEV_CON_ID("bus_clk", &amp;div4_clks[DIV4_B]),</div><div class='add'>+	CLKDEV_CON_ID("shyway_clk1", &amp;div4_clks[DIV4_S1]),</div><div class='add'>+	CLKDEV_CON_ID("peripheral_clk", &amp;div4_clks[DIV4_P]),</div><div class='add'>+</div><div class='add'>+	/* MSTP32 clocks */</div><div class='add'>+	CLKDEV_DEV_ID("i2c-sh7734.0", &amp;mstp_clks[MSTP030]),</div><div class='add'>+	CLKDEV_DEV_ID("i2c-sh7734.1", &amp;mstp_clks[MSTP029]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &amp;mstp_clks[MSTP026]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &amp;mstp_clks[MSTP025]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &amp;mstp_clks[MSTP024]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &amp;mstp_clks[MSTP023]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &amp;mstp_clks[MSTP022]),</div><div class='add'>+	CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &amp;mstp_clks[MSTP021]),</div><div class='add'>+	CLKDEV_CON_ID("hscif", &amp;mstp_clks[MSTP019]),</div><div class='add'>+	CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &amp;mstp_clks[MSTP016]),</div><div class='add'>+	CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &amp;mstp_clks[MSTP016]),</div><div class='add'>+	CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &amp;mstp_clks[MSTP016]),</div><div class='add'>+	CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &amp;mstp_clks[MSTP015]),</div><div class='add'>+	CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &amp;mstp_clks[MSTP015]),</div><div class='add'>+	CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &amp;mstp_clks[MSTP015]),</div><div class='add'>+	CLKDEV_ICK_ID("tmu_fck", "sh_tmu.6", &amp;mstp_clks[MSTP014]),</div><div class='add'>+	CLKDEV_ICK_ID("tmu_fck", "sh_tmu.7", &amp;mstp_clks[MSTP014]),</div><div class='add'>+	CLKDEV_ICK_ID("tmu_fck", "sh_tmu.8", &amp;mstp_clks[MSTP014]),</div><div class='add'>+	CLKDEV_CON_ID("ssi0", &amp;mstp_clks[MSTP012]),</div><div class='add'>+	CLKDEV_CON_ID("ssi1", &amp;mstp_clks[MSTP011]),</div><div class='add'>+	CLKDEV_CON_ID("ssi2", &amp;mstp_clks[MSTP010]),</div><div class='add'>+	CLKDEV_CON_ID("ssi3", &amp;mstp_clks[MSTP009]),</div><div class='add'>+	CLKDEV_CON_ID("sss", &amp;mstp_clks[MSTP008]),</div><div class='add'>+	CLKDEV_CON_ID("hspi", &amp;mstp_clks[MSTP007]),</div><div class='add'>+	CLKDEV_CON_ID("usb_fck", &amp;mstp_clks[MSTP100]),</div><div class='add'>+	CLKDEV_CON_ID("videoin0", &amp;mstp_clks[MSTP109]),</div><div class='add'>+	CLKDEV_CON_ID("videoin1", &amp;mstp_clks[MSTP108]),</div><div class='add'>+	CLKDEV_CON_ID("rgpvg", &amp;mstp_clks[MSTP107]),</div><div class='add'>+	CLKDEV_CON_ID("2dg", &amp;mstp_clks[MSTP106]),</div><div class='add'>+	CLKDEV_CON_ID("view", &amp;mstp_clks[MSTP103]),</div><div class='add'>+</div><div class='add'>+	CLKDEV_CON_ID("mmc0", &amp;mstp_clks[MSTP331]),</div><div class='add'>+	CLKDEV_CON_ID("mimlb0", &amp;mstp_clks[MSTP330]),</div><div class='add'>+	CLKDEV_CON_ID("sdhi0", &amp;mstp_clks[MSTP323]),</div><div class='add'>+	CLKDEV_CON_ID("sdhi1", &amp;mstp_clks[MSTP322]),</div><div class='add'>+	CLKDEV_CON_ID("sdhi2", &amp;mstp_clks[MSTP321]),</div><div class='add'>+	CLKDEV_CON_ID("rqspi0", &amp;mstp_clks[MSTP320]),</div><div class='add'>+	CLKDEV_CON_ID("src0", &amp;mstp_clks[MSTP319]),</div><div class='add'>+	CLKDEV_CON_ID("src1", &amp;mstp_clks[MSTP318]),</div><div class='add'>+	CLKDEV_CON_ID("rsp0", &amp;mstp_clks[MSTP317]),</div><div class='add'>+	CLKDEV_CON_ID("rcan0", &amp;mstp_clks[MSTP316]),</div><div class='add'>+	CLKDEV_CON_ID("rcan1", &amp;mstp_clks[MSTP315]),</div><div class='add'>+	CLKDEV_CON_ID("fltcl0", &amp;mstp_clks[MSTP314]),</div><div class='add'>+	CLKDEV_CON_ID("adc0", &amp;mstp_clks[MSTP313]),</div><div class='add'>+	CLKDEV_CON_ID("mtu0", &amp;mstp_clks[MSTP312]),</div><div class='add'>+	CLKDEV_CON_ID("iebus0", &amp;mstp_clks[MSTP304]),</div><div class='add'>+	CLKDEV_DEV_ID("sh-eth.0", &amp;mstp_clks[MSTP114]),</div><div class='add'>+	CLKDEV_CON_ID("rtc0", &amp;mstp_clks[MSTP303]),</div><div class='add'>+	CLKDEV_CON_ID("hif0", &amp;mstp_clks[MSTP302]),</div><div class='add'>+	CLKDEV_CON_ID("stif0", &amp;mstp_clks[MSTP301]),</div><div class='add'>+	CLKDEV_CON_ID("stif1", &amp;mstp_clks[MSTP300]),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __init arch_clk_init(void)</div><div class='add'>+{</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(main_clks); i++)</div><div class='add'>+		ret |= clk_register(main_clks[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(lookups); i++)</div><div class='add'>+		clkdev_add(&amp;lookups[i]);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),</div><div class='add'>+			&amp;div4_table);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c<br/>new file mode 100644<br/>index 000000000000..eed3b9d19d38<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c</a></div><div class='hunk'>@@ -0,0 +1,2497 @@</div><div class='add'>+/*</div><div class='add'>+ * SH7734 processor support - PFC hardware block</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012  Renesas Solutions Corp.</div><div class='add'>+ * Copyright (C) 2012  Nobuhiro Iwamatsu &lt;nobuhiro.iwamatsu.yj@renesas.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;cpu/sh7734.h&gt;</div><div class='add'>+</div><div class='add'>+#define CPU_32_PORT(fn, pfx, sfx)				\</div><div class='add'>+	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),	\</div><div class='add'>+	PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx),	\</div><div class='add'>+	PORT_1(fn, pfx##31, sfx)</div><div class='add'>+</div><div class='add'>+#define CPU_32_PORT5(fn, pfx, sfx)				\</div><div class='add'>+	PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),	\</div><div class='add'>+	PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),	\</div><div class='add'>+	PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),	\</div><div class='add'>+	PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),	\</div><div class='add'>+	PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx),	\</div><div class='add'>+	PORT_1(fn, pfx##10, sfx), PORT_1(fn, pfx##11, sfx)</div><div class='add'>+</div><div class='add'>+/* GPSR0 - GPSR5 */</div><div class='add'>+#define CPU_ALL_PORT(fn, pfx, sfx)				\</div><div class='add'>+	CPU_32_PORT(fn, pfx##_0_, sfx),			\</div><div class='add'>+	CPU_32_PORT(fn, pfx##_1_, sfx),				\</div><div class='add'>+	CPU_32_PORT(fn, pfx##_2_, sfx),				\</div><div class='add'>+	CPU_32_PORT(fn, pfx##_3_, sfx),				\</div><div class='add'>+	CPU_32_PORT(fn, pfx##_4_, sfx),				\</div><div class='add'>+	CPU_32_PORT5(fn, pfx##_5_, sfx)</div><div class='add'>+</div><div class='add'>+#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)</div><div class='add'>+#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN,	\</div><div class='add'>+				       GP##pfx##_IN, GP##pfx##_OUT)</div><div class='add'>+</div><div class='add'>+#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT</div><div class='add'>+#define _GP_INDT(pfx, sfx) GP##pfx##_DATA</div><div class='add'>+</div><div class='add'>+#define GP_ALL(str)	CPU_ALL_PORT(_PORT_ALL, GP, str)</div><div class='add'>+#define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, , unused)</div><div class='add'>+#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, , unused)</div><div class='add'>+</div><div class='add'>+#define PORT_10_REV(fn, pfx, sfx)	\</div><div class='add'>+	PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx),	\</div><div class='add'>+	PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx),	\</div><div class='add'>+	PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx),	\</div><div class='add'>+	PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx),	\</div><div class='add'>+	PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)</div><div class='add'>+</div><div class='add'>+#define CPU_32_PORT_REV(fn, pfx, sfx)	\</div><div class='add'>+	PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx),	\</div><div class='add'>+	PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx),	\</div><div class='add'>+	PORT_10_REV(fn, pfx, sfx)</div><div class='add'>+</div><div class='add'>+#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)</div><div class='add'>+#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)</div><div class='add'>+</div><div class='add'>+#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)</div><div class='add'>+#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \</div><div class='add'>+							  FN_##ipsr, FN_##fn)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	PINMUX_RESERVED = 0,</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA_BEGIN,</div><div class='add'>+	GP_ALL(DATA), /* GP_0_0_DATA -&gt; GP_5_11_DATA */</div><div class='add'>+	PINMUX_DATA_END,</div><div class='add'>+</div><div class='add'>+	PINMUX_INPUT_BEGIN,</div><div class='add'>+	GP_ALL(IN), /* GP_0_0_IN -&gt; GP_5_11_IN */</div><div class='add'>+	PINMUX_INPUT_END,</div><div class='add'>+</div><div class='add'>+	PINMUX_OUTPUT_BEGIN,</div><div class='add'>+	GP_ALL(OUT), /* GP_0_0_OUT -&gt; GP_5_11_OUT */</div><div class='add'>+	PINMUX_OUTPUT_END,</div><div class='add'>+</div><div class='add'>+	PINMUX_FUNCTION_BEGIN,</div><div class='add'>+	GP_ALL(FN), /* GP_0_0_FN -&gt; GP_5_11_FN */</div><div class='add'>+</div><div class='add'>+	/* GPSR0 */</div><div class='add'>+	FN_IP1_9_8, FN_IP1_11_10, FN_IP1_13_12, FN_IP1_15_14,</div><div class='add'>+	FN_IP0_7_6, FN_IP0_9_8, FN_IP0_11_10, FN_IP0_13_12,</div><div class='add'>+	FN_IP0_15_14, FN_IP0_17_16, FN_IP0_19_18, FN_IP0_21_20,</div><div class='add'>+	FN_IP0_23_22, FN_IP0_25_24, FN_IP0_27_26, FN_IP0_29_28,</div><div class='add'>+	FN_IP0_31_30, FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4,</div><div class='add'>+	FN_IP1_7_6, FN_IP11_28, FN_IP0_1_0, FN_IP0_3_2,</div><div class='add'>+	FN_IP0_5_4, FN_IP1_17_16, FN_IP1_19_18, FN_IP1_22_20,</div><div class='add'>+	FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0,</div><div class='add'>+</div><div class='add'>+	/* GPSR1 */</div><div class='add'>+	FN_IP3_20, FN_IP3_29_27, FN_IP11_20_19, FN_IP11_22_21,</div><div class='add'>+	FN_IP2_16_14, FN_IP2_19_17, FN_IP2_22_20, FN_IP2_24_23,</div><div class='add'>+	FN_IP2_27_25, FN_IP2_30_28, FN_IP3_1_0, FN_CLKOUT,</div><div class='add'>+	FN_BS, FN_CS0, FN_IP3_2, FN_EX_CS0,</div><div class='add'>+	FN_IP3_5_3, FN_IP3_8_6, FN_IP3_11_9, FN_IP3_14_12,</div><div class='add'>+	FN_IP3_17_15, FN_RD, FN_IP3_19_18, FN_WE0,</div><div class='add'>+	FN_WE1, FN_IP2_4_3, FN_IP3_23_21, FN_IP3_26_24,</div><div class='add'>+	FN_IP2_7_5, FN_IP2_10_8, FN_IP2_13_11, FN_IP11_25_23,</div><div class='add'>+</div><div class='add'>+	/* GPSR2 */</div><div class='add'>+	FN_IP11_6_4, FN_IP11_9_7, FN_IP11_11_10, FN_IP4_2_0,</div><div class='add'>+	FN_IP8_29_28, FN_IP11_27_26, FN_IP8_22_20, FN_IP8_25_23,</div><div class='add'>+	FN_IP11_12, FN_IP8_27_26, FN_IP4_5_3, FN_IP4_8_6,</div><div class='add'>+	FN_IP4_11_9, FN_IP4_14_12, FN_IP4_17_15, FN_IP4_19_18,</div><div class='add'>+	FN_IP4_21_20, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,</div><div class='add'>+	FN_IP4_29_28, FN_IP4_31_30, FN_IP5_2_0, FN_IP5_5_3,</div><div class='add'>+	FN_IP5_8_6, FN_IP5_11_9, FN_IP5_14_12, FN_IP5_17_15,</div><div class='add'>+	FN_IP5_20_18, FN_IP5_22_21, FN_IP5_24_23, FN_IP5_26_25,</div><div class='add'>+</div><div class='add'>+	/* GPSR3 */</div><div class='add'>+	FN_IP6_2_0, FN_IP6_5_3, FN_IP6_7_6, FN_IP6_9_8,</div><div class='add'>+	FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14, FN_IP6_17_16,</div><div class='add'>+	FN_IP6_20_18, FN_IP6_23_21, FN_IP7_2_0, FN_IP7_5_3,</div><div class='add'>+	FN_IP7_8_6, FN_IP7_11_9, FN_IP7_14_12, FN_IP7_17_15,</div><div class='add'>+	FN_IP7_20_18, FN_IP7_23_21, FN_IP7_26_24, FN_IP7_28_27,</div><div class='add'>+	FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4,</div><div class='add'>+	FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12,</div><div class='add'>+	FN_IP8_15_14, FN_IP8_17_16, FN_IP8_19_18, FN_IP9_1_0,</div><div class='add'>+</div><div class='add'>+	/* GPSR4 */</div><div class='add'>+	FN_IP9_19_18, FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24,</div><div class='add'>+	FN_IP9_11_10, FN_IP9_13_12, FN_IP9_15_14, FN_IP9_17_16,</div><div class='add'>+	FN_IP9_3_2, FN_IP9_5_4, FN_IP9_7_6, FN_IP9_9_8,</div><div class='add'>+	FN_IP9_27_26, FN_IP9_29_28, FN_IP10_2_0, FN_IP10_5_3,</div><div class='add'>+	FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_15,</div><div class='add'>+	FN_IP10_18_16, FN_IP10_21_19, FN_IP11_0, FN_IP11_1,</div><div class='add'>+	FN_SCL0, FN_IP11_2, FN_PENC0, FN_IP11_15_13, /* Need check*/</div><div class='add'>+	FN_USB_OVC0, FN_IP11_18_16,</div><div class='add'>+	FN_IP10_22, FN_IP10_24_23,</div><div class='add'>+</div><div class='add'>+	/* GPSR5 */</div><div class='add'>+	FN_IP10_25, FN_IP11_3, FN_IRQ2_B, FN_IRQ3_B,</div><div class='add'>+	FN_IP10_27_26, /* 10 */</div><div class='add'>+	FN_IP10_29_28, /* 11 */</div><div class='add'>+</div><div class='add'>+	/* IPSR0 */</div><div class='add'>+	FN_A15, FN_ST0_VCO_CLKIN, FN_LCD_DATA15_A, FN_TIOC3D_C,</div><div class='add'>+	FN_A14, FN_LCD_DATA14_A, FN_TIOC3C_C,</div><div class='add'>+	FN_A13, FN_LCD_DATA13_A, FN_TIOC3B_C,</div><div class='add'>+	FN_A12, FN_LCD_DATA12_A, FN_TIOC3A_C,</div><div class='add'>+	FN_A11, FN_ST0_D7, FN_LCD_DATA11_A, FN_TIOC2B_C,</div><div class='add'>+	FN_A10, FN_ST0_D6, FN_LCD_DATA10_A, FN_TIOC2A_C,</div><div class='add'>+	FN_A9, FN_ST0_D5, FN_LCD_DATA9_A, FN_TIOC1B_C,</div><div class='add'>+	FN_A8, FN_ST0_D4, FN_LCD_DATA8_A, FN_TIOC1A_C,</div><div class='add'>+	FN_A7, FN_ST0_D3, FN_LCD_DATA7_A, FN_TIOC0D_C,</div><div class='add'>+	FN_A6, FN_ST0_D2, FN_LCD_DATA6_A, FN_TIOC0C_C,</div><div class='add'>+	FN_A5, FN_ST0_D1, FN_LCD_DATA5_A, FN_TIOC0B_C,</div><div class='add'>+	FN_A4, FN_ST0_D0, FN_LCD_DATA4_A, FN_TIOC0A_C,</div><div class='add'>+	FN_A3, FN_ST0_VLD, FN_LCD_DATA3_A, FN_TCLKD_C,</div><div class='add'>+	FN_A2, FN_ST0_SYC, FN_LCD_DATA2_A, FN_TCLKC_C,</div><div class='add'>+	FN_A1, FN_ST0_REQ, FN_LCD_DATA1_A, FN_TCLKB_C,</div><div class='add'>+	FN_A0, FN_ST0_CLKIN, FN_LCD_DATA0_A, FN_TCLKA_C,</div><div class='add'>+</div><div class='add'>+	/* IPSR1 */</div><div class='add'>+	FN_D3, FN_SD0_DAT3_A, FN_MMC_D3_A, FN_ST1_D6, FN_FD3_A,</div><div class='add'>+	FN_D2, FN_SD0_DAT2_A, FN_MMC_D2_A, FN_ST1_D5, FN_FD2_A,</div><div class='add'>+	FN_D1, FN_SD0_DAT1_A, FN_MMC_D1_A, FN_ST1_D4, FN_FD1_A,</div><div class='add'>+	FN_D0, FN_SD0_DAT0_A, FN_MMC_D0_A, FN_ST1_D3, FN_FD0_A,</div><div class='add'>+	FN_A25, FN_TX2_D, FN_ST1_D2,</div><div class='add'>+	FN_A24, FN_RX2_D, FN_ST1_D1,</div><div class='add'>+	FN_A23, FN_ST1_D0, FN_LCD_M_DISP_A,</div><div class='add'>+	FN_A22, FN_ST1_VLD, FN_LCD_VEPWC_A,</div><div class='add'>+	FN_A21, FN_ST1_SYC, FN_LCD_VCPWC_A,</div><div class='add'>+	FN_A20, FN_ST1_REQ, FN_LCD_FLM_A,</div><div class='add'>+	FN_A19, FN_ST1_CLKIN, FN_LCD_CLK_A,	FN_TIOC4D_C,</div><div class='add'>+	FN_A18, FN_ST1_PWM, FN_LCD_CL2_A, FN_TIOC4C_C,</div><div class='add'>+	FN_A17, FN_ST1_VCO_CLKIN, FN_LCD_CL1_A,	FN_TIOC4B_C,</div><div class='add'>+	FN_A16, FN_ST0_PWM, FN_LCD_DON_A, FN_TIOC4A_C,</div><div class='add'>+</div><div class='add'>+	/* IPSR2 */</div><div class='add'>+	FN_D14, FN_TX2_B, FN_FSE_A, FN_ET0_TX_CLK_B,</div><div class='add'>+	FN_D13, FN_RX2_B, FN_FRB_A,	FN_ET0_ETXD6_B,</div><div class='add'>+	FN_D12, FN_FWE_A, FN_ET0_ETXD5_B,</div><div class='add'>+	FN_D11, FN_RSPI_MISO_A, FN_QMI_QIO1_A, FN_FRE_A,</div><div class='add'>+		FN_ET0_ETXD3_B,</div><div class='add'>+	FN_D10, FN_RSPI_MOSI_A, FN_QMO_QIO0_A, FN_FALE_A,</div><div class='add'>+		FN_ET0_ETXD2_B,</div><div class='add'>+	FN_D9, FN_SD0_CMD_A, FN_MMC_CMD_A, FN_QIO3_A, FN_FCLE_A,</div><div class='add'>+		FN_ET0_ETXD1_B,</div><div class='add'>+	FN_D8, FN_SD0_CLK_A, FN_MMC_CLK_A, FN_QIO2_A, FN_FCE_A,</div><div class='add'>+		FN_ET0_GTX_CLK_B,</div><div class='add'>+	FN_D7, FN_RSPI_SSL_A, FN_MMC_D7_A, FN_QSSL_A, FN_FD7_A,</div><div class='add'>+	FN_D6, FN_RSPI_RSPCK_A, FN_MMC_D6_A, FN_QSPCLK_A, FN_FD6_A,</div><div class='add'>+	FN_D5, FN_SD0_WP_A, FN_MMC_D5_A, FN_FD5_A,</div><div class='add'>+	FN_D4, FN_SD0_CD_A, FN_MMC_D4_A, FN_ST1_D7, FN_FD4_A,</div><div class='add'>+</div><div class='add'>+	/* IPSR3 */</div><div class='add'>+	FN_DRACK0, FN_SD1_DAT2_A, FN_ATAG, FN_TCLK1_A, FN_ET0_ETXD7,</div><div class='add'>+	FN_EX_WAIT2, FN_SD1_DAT1_A, FN_DACK2, FN_CAN1_RX_C,</div><div class='add'>+		FN_ET0_MAGIC_C, FN_ET0_ETXD6_A,</div><div class='add'>+	FN_EX_WAIT1, FN_SD1_DAT0_A, FN_DREQ2, FN_CAN1_TX_C,</div><div class='add'>+		FN_ET0_LINK_C, FN_ET0_ETXD5_A,</div><div class='add'>+	FN_EX_WAIT0, FN_TCLK1_B,</div><div class='add'>+	FN_RD_WR, FN_TCLK0, FN_CAN_CLK_B, FN_ET0_ETXD4,</div><div class='add'>+	FN_EX_CS5, FN_SD1_CMD_A, FN_ATADIR, FN_QSSL_B, FN_ET0_ETXD3_A,</div><div class='add'>+	FN_EX_CS4, FN_SD1_WP_A, FN_ATAWR, FN_QMI_QIO1_B, FN_ET0_ETXD2_A,</div><div class='add'>+	FN_EX_CS3, FN_SD1_CD_A, FN_ATARD, FN_QMO_QIO0_B, FN_ET0_ETXD1_A,</div><div class='add'>+	FN_EX_CS2, FN_TX3_B, FN_ATACS1, FN_QSPCLK_B, FN_ET0_GTX_CLK_A,</div><div class='add'>+	FN_EX_CS1, FN_RX3_B, FN_ATACS0, FN_QIO2_B, FN_ET0_ETXD0,</div><div class='add'>+	FN_CS1_A26, FN_QIO3_B,</div><div class='add'>+	FN_D15, FN_SCK2_B,</div><div class='add'>+</div><div class='add'>+	/* IPSR4 */</div><div class='add'>+	FN_SCK2_A, FN_VI0_G3,</div><div class='add'>+	FN_RTS1_B, FN_VI0_G2,</div><div class='add'>+	FN_CTS1_B, FN_VI0_DATA7_VI0_G1,</div><div class='add'>+	FN_TX1_B, FN_VI0_DATA6_VI0_G0, FN_ET0_PHY_INT_A,</div><div class='add'>+	FN_RX1_B, FN_VI0_DATA5_VI0_B5, FN_ET0_MAGIC_A,</div><div class='add'>+	FN_SCK1_B, FN_VI0_DATA4_VI0_B4, FN_ET0_LINK_A,</div><div class='add'>+	FN_RTS0_B, FN_VI0_DATA3_VI0_B3, FN_ET0_MDIO_A,</div><div class='add'>+	FN_CTS0_B, FN_VI0_DATA2_VI0_B2, FN_RMII0_MDIO_A, FN_ET0_MDC,</div><div class='add'>+	FN_HTX0_A, FN_TX1_A, FN_VI0_DATA1_VI0_B1, FN_RMII0_MDC_A, FN_ET0_COL,</div><div class='add'>+	FN_HRX0_A, FN_RX1_A, FN_VI0_DATA0_VI0_B0, FN_RMII0_CRS_DV_A, FN_ET0_CRS,</div><div class='add'>+	FN_HSCK0_A, FN_SCK1_A, FN_VI0_VSYNC, FN_RMII0_RX_ER_A, FN_ET0_RX_ER,</div><div class='add'>+	FN_HRTS0_A, FN_RTS1_A, FN_VI0_HSYNC, FN_RMII0_TXD_EN_A, FN_ET0_RX_DV,</div><div class='add'>+	FN_HCTS0_A, FN_CTS1_A, FN_VI0_FIELD, FN_RMII0_RXD1_A, FN_ET0_ERXD7,</div><div class='add'>+</div><div class='add'>+	/* IPSR5 */</div><div class='add'>+	FN_SD2_CLK_A, FN_RX2_A, FN_VI0_G4, FN_ET0_RX_CLK_B,</div><div class='add'>+	FN_SD2_CMD_A, FN_TX2_A, FN_VI0_G5, FN_ET0_ERXD2_B,</div><div class='add'>+	FN_SD2_DAT0_A, FN_RX3_A, FN_VI0_R0, FN_ET0_ERXD3_B,</div><div class='add'>+	FN_SD2_DAT1_A, FN_TX3_A, FN_VI0_R1, FN_ET0_MDIO_B,</div><div class='add'>+	FN_SD2_DAT2_A, FN_RX4_A, FN_VI0_R2, FN_ET0_LINK_B,</div><div class='add'>+	FN_SD2_DAT3_A, FN_TX4_A, FN_VI0_R3, FN_ET0_MAGIC_B,</div><div class='add'>+	FN_SD2_CD_A, FN_RX5_A, FN_VI0_R4, FN_ET0_PHY_INT_B,</div><div class='add'>+	FN_SD2_WP_A, FN_TX5_A, FN_VI0_R5,</div><div class='add'>+	FN_REF125CK, FN_ADTRG, FN_RX5_C,</div><div class='add'>+	FN_REF50CK, FN_CTS1_E, FN_HCTS0_D,</div><div class='add'>+</div><div class='add'>+	/* IPSR6 */</div><div class='add'>+	FN_DU0_DR0, FN_SCIF_CLK_B, FN_HRX0_D, FN_IETX_A, FN_TCLKA_A, FN_HIFD00,</div><div class='add'>+	FN_DU0_DR1, FN_SCK0_B, FN_HTX0_D, FN_IERX_A, FN_TCLKB_A, FN_HIFD01,</div><div class='add'>+	FN_DU0_DR2, FN_RX0_B, FN_TCLKC_A, FN_HIFD02,</div><div class='add'>+	FN_DU0_DR3, FN_TX0_B, FN_TCLKD_A, FN_HIFD03,</div><div class='add'>+	FN_DU0_DR4, FN_CTS0_C, FN_TIOC0A_A, FN_HIFD04,</div><div class='add'>+	FN_DU0_DR5, FN_RTS0_C, FN_TIOC0B_A, FN_HIFD05,</div><div class='add'>+	FN_DU0_DR6, FN_SCK1_C, FN_TIOC0C_A, FN_HIFD06,</div><div class='add'>+	FN_DU0_DR7, FN_RX1_C, FN_TIOC0D_A, FN_HIFD07,</div><div class='add'>+	FN_DU0_DG0, FN_TX1_C, FN_HSCK0_D, FN_IECLK_A, FN_TIOC1A_A, FN_HIFD08,</div><div class='add'>+	FN_DU0_DG1, FN_CTS1_C, FN_HRTS0_D, FN_TIOC1B_A, FN_HIFD09,</div><div class='add'>+</div><div class='add'>+	/* IPSR7 */</div><div class='add'>+	FN_DU0_DG2, FN_RTS1_C, FN_RMII0_MDC_B, FN_TIOC2A_A, FN_HIFD10,</div><div class='add'>+	FN_DU0_DG3, FN_SCK2_C, FN_RMII0_MDIO_B, FN_TIOC2B_A, FN_HIFD11,</div><div class='add'>+	FN_DU0_DG4, FN_RX2_C, FN_RMII0_CRS_DV_B, FN_TIOC3A_A, FN_HIFD12,</div><div class='add'>+	FN_DU0_DG5, FN_TX2_C, FN_RMII0_RX_ER_B, FN_TIOC3B_A, FN_HIFD13,</div><div class='add'>+	FN_DU0_DG6, FN_RX3_C, FN_RMII0_RXD0_B, FN_TIOC3C_A, FN_HIFD14,</div><div class='add'>+	FN_DU0_DG7, FN_TX3_C, FN_RMII0_RXD1_B, FN_TIOC3D_A, FN_HIFD15,</div><div class='add'>+	FN_DU0_DB0, FN_RX4_C, FN_RMII0_TXD_EN_B, FN_TIOC4A_A, FN_HIFCS,</div><div class='add'>+	FN_DU0_DB1, FN_TX4_C, FN_RMII0_TXD0_B, FN_TIOC4B_A, FN_HIFRS,</div><div class='add'>+	FN_DU0_DB2, FN_RX5_B, FN_RMII0_TXD1_B, FN_TIOC4C_A, FN_HIFWR,</div><div class='add'>+	FN_DU0_DB3, FN_TX5_B, FN_TIOC4D_A, FN_HIFRD,</div><div class='add'>+	FN_DU0_DB4, FN_HIFINT,</div><div class='add'>+</div><div class='add'>+	/* IPSR8 */</div><div class='add'>+	FN_DU0_DB5, FN_HIFDREQ,</div><div class='add'>+	FN_DU0_DB6, FN_HIFRDY,</div><div class='add'>+	FN_DU0_DB7, FN_SSI_SCK0_B, FN_HIFEBL_B,</div><div class='add'>+	FN_DU0_DOTCLKIN, FN_HSPI_CS0_C, FN_SSI_WS0_B,</div><div class='add'>+	FN_DU0_DOTCLKOUT, FN_HSPI_CLK0_C, FN_SSI_SDATA0_B,</div><div class='add'>+	FN_DU0_EXHSYNC_DU0_HSYNC, FN_HSPI_TX0_C, FN_SSI_SCK1_B,</div><div class='add'>+	FN_DU0_EXVSYNC_DU0_VSYNC, FN_HSPI_RX0_C, FN_SSI_WS1_B,</div><div class='add'>+	FN_DU0_EXODDF_DU0_ODDF, FN_CAN0_RX_B, FN_HSCK0_B, FN_SSI_SDATA1_B,</div><div class='add'>+	FN_DU0_DISP, FN_CAN0_TX_B, FN_HRX0_B, FN_AUDIO_CLKA_B,</div><div class='add'>+	FN_DU0_CDE, FN_HTX0_B, FN_AUDIO_CLKB_B, FN_LCD_VCPWC_B,</div><div class='add'>+	FN_IRQ0_A, FN_HSPI_TX_B, FN_RX3_E, FN_ET0_ERXD0,</div><div class='add'>+	FN_IRQ1_A, FN_HSPI_RX_B, FN_TX3_E, FN_ET0_ERXD1,</div><div class='add'>+	FN_IRQ2_A, FN_CTS0_A, FN_HCTS0_B, FN_ET0_ERXD2_A,</div><div class='add'>+	FN_IRQ3_A, FN_RTS0_A, FN_HRTS0_B, FN_ET0_ERXD3_A,</div><div class='add'>+</div><div class='add'>+	/* IPSR9 */</div><div class='add'>+	FN_VI1_CLK_A, FN_FD0_B, FN_LCD_DATA0_B,</div><div class='add'>+	FN_VI1_0_A, FN_FD1_B, FN_LCD_DATA1_B,</div><div class='add'>+	FN_VI1_1_A, FN_FD2_B, FN_LCD_DATA2_B,</div><div class='add'>+	FN_VI1_2_A, FN_FD3_B, FN_LCD_DATA3_B,</div><div class='add'>+	FN_VI1_3_A, FN_FD4_B, FN_LCD_DATA4_B,</div><div class='add'>+	FN_VI1_4_A, FN_FD5_B, FN_LCD_DATA5_B,</div><div class='add'>+	FN_VI1_5_A, FN_FD6_B, FN_LCD_DATA6_B,</div><div class='add'>+	FN_VI1_6_A, FN_FD7_B, FN_LCD_DATA7_B,</div><div class='add'>+	FN_VI1_7_A, FN_FCE_B, FN_LCD_DATA8_B,</div><div class='add'>+	FN_SSI_SCK0_A, FN_TIOC1A_B, FN_LCD_DATA9_B,</div><div class='add'>+	FN_SSI_WS0_A, FN_TIOC1B_B, FN_LCD_DATA10_B,</div><div class='add'>+	FN_SSI_SDATA0_A, FN_VI1_0_B, FN_TIOC2A_B, FN_LCD_DATA11_B,</div><div class='add'>+	FN_SSI_SCK1_A, FN_VI1_1_B, FN_TIOC2B_B, FN_LCD_DATA12_B,</div><div class='add'>+	FN_SSI_WS1_A, FN_VI1_2_B, FN_LCD_DATA13_B,</div><div class='add'>+	FN_SSI_SDATA1_A, FN_VI1_3_B, FN_LCD_DATA14_B,</div><div class='add'>+</div><div class='add'>+	/* IPSR10 */</div><div class='add'>+	FN_SSI_SCK23, FN_VI1_4_B, FN_RX1_D, FN_FCLE_B, FN_LCD_DATA15_B,</div><div class='add'>+	FN_SSI_WS23, FN_VI1_5_B, FN_TX1_D, FN_HSCK0_C, FN_FALE_B, FN_LCD_DON_B,</div><div class='add'>+	FN_SSI_SDATA2, FN_VI1_6_B, FN_HRX0_C, FN_FRE_B, FN_LCD_CL1_B,</div><div class='add'>+	FN_SSI_SDATA3, FN_VI1_7_B, FN_HTX0_C, FN_FWE_B, FN_LCD_CL2_B,</div><div class='add'>+	FN_AUDIO_CLKA_A, FN_VI1_CLK_B, FN_SCK1_D, FN_IECLK_B, FN_LCD_FLM_B,</div><div class='add'>+	FN_AUDIO_CLKB_A, FN_LCD_CLK_B,</div><div class='add'>+	FN_AUDIO_CLKC, FN_SCK1_E, FN_HCTS0_C, FN_FRB_B, FN_LCD_VEPWC_B,</div><div class='add'>+	FN_AUDIO_CLKOUT, FN_TX1_E, FN_HRTS0_C, FN_FSE_B, FN_LCD_M_DISP_B,</div><div class='add'>+	FN_CAN_CLK_A, FN_RX4_D,</div><div class='add'>+	FN_CAN0_TX_A, FN_TX4_D, FN_MLB_CLK,</div><div class='add'>+	FN_CAN1_RX_A, FN_IRQ1_B,</div><div class='add'>+	FN_CAN0_RX_A, FN_IRQ0_B, FN_MLB_SIG,</div><div class='add'>+	FN_CAN1_TX_A, FN_TX5_C, FN_MLB_DAT,</div><div class='add'>+</div><div class='add'>+	/* IPSR11 */</div><div class='add'>+	FN_SCL1, FN_SCIF_CLK_C,</div><div class='add'>+	FN_SDA1, FN_RX1_E,</div><div class='add'>+	FN_SDA0, FN_HIFEBL_A,</div><div class='add'>+	FN_SDSELF, FN_RTS1_E,</div><div class='add'>+	FN_SCIF_CLK_A, FN_HSPI_CLK_A, FN_VI0_CLK, FN_RMII0_TXD0_A, FN_ET0_ERXD4,</div><div class='add'>+	FN_SCK0_A, FN_HSPI_CS_A, FN_VI0_CLKENB, FN_RMII0_TXD1_A, FN_ET0_ERXD5,</div><div class='add'>+	FN_RX0_A, FN_HSPI_RX_A, FN_RMII0_RXD0_A, FN_ET0_ERXD6,</div><div class='add'>+	FN_TX0_A, FN_HSPI_TX_A,</div><div class='add'>+	FN_PENC1, FN_TX3_D, FN_CAN1_TX_B, FN_TX5_D, FN_IETX_B,</div><div class='add'>+	FN_USB_OVC1, FN_RX3_D, FN_CAN1_RX_B, FN_RX5_D, FN_IERX_B,</div><div class='add'>+	FN_DREQ0, FN_SD1_CLK_A, FN_ET0_TX_EN,</div><div class='add'>+	FN_DACK0, FN_SD1_DAT3_A, FN_ET0_TX_ER,</div><div class='add'>+	FN_DREQ1, FN_HSPI_CLK_B, FN_RX4_B, FN_ET0_PHY_INT_C, FN_ET0_TX_CLK_A,</div><div class='add'>+	FN_DACK1, FN_HSPI_CS_B, FN_TX4_B, FN_ET0_RX_CLK_A,</div><div class='add'>+	FN_PRESETOUT, FN_ST_CLKOUT,</div><div class='add'>+</div><div class='add'>+	/* MOD_SEL1 */</div><div class='add'>+	FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,</div><div class='add'>+	FN_SEL_RQSPI_0, FN_SEL_RQSPI_1,</div><div class='add'>+	FN_SEL_VIN1_0, FN_SEL_VIN1_1,</div><div class='add'>+	FN_SEL_HIF_0, FN_SEL_HIF_1,</div><div class='add'>+	FN_SEL_RSPI_0, FN_SEL_RSPI_1,</div><div class='add'>+	FN_SEL_LCDC_0, FN_SEL_LCDC_1,</div><div class='add'>+	FN_SEL_ET0_CTL_0, FN_SEL_ET0_CTL_1, FN_SEL_ET0_CTL_2,</div><div class='add'>+	FN_SEL_ET0_0, FN_SEL_ET0_1,</div><div class='add'>+	FN_SEL_RMII_0, FN_SEL_RMII_1,</div><div class='add'>+	FN_SEL_TMU_0, FN_SEL_TMU_1,</div><div class='add'>+	FN_SEL_HSPI_0, FN_SEL_HSPI_1, FN_SEL_HSPI_2,</div><div class='add'>+	FN_SEL_HSCIF_0, FN_SEL_HSCIF_1, FN_SEL_HSCIF_2, FN_SEL_HSCIF_3,</div><div class='add'>+	FN_SEL_RCAN_CLK_0, FN_SEL_RCAN_CLK_1,</div><div class='add'>+	FN_SEL_RCAN1_0, FN_SEL_RCAN1_1, FN_SEL_RCAN1_2,</div><div class='add'>+	FN_SEL_RCAN0_0, FN_SEL_RCAN0_1,</div><div class='add'>+	FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,</div><div class='add'>+	FN_SEL_SDHI1_0, FN_SEL_SDHI1_1,</div><div class='add'>+	FN_SEL_SDHI0_0, FN_SEL_SDHI0_1,</div><div class='add'>+	FN_SEL_SSI1_0, FN_SEL_SSI1_1,</div><div class='add'>+	FN_SEL_SSI0_0, FN_SEL_SSI0_1,</div><div class='add'>+	FN_SEL_AUDIO_CLKB_0, FN_SEL_AUDIO_CLKB_1,</div><div class='add'>+	FN_SEL_AUDIO_CLKA_0, FN_SEL_AUDIO_CLKA_1,</div><div class='add'>+	FN_SEL_FLCTL_0, FN_SEL_FLCTL_1,</div><div class='add'>+	FN_SEL_MMC_0, FN_SEL_MMC_1,</div><div class='add'>+	FN_SEL_INTC_0, FN_SEL_INTC_1,</div><div class='add'>+</div><div class='add'>+	/* MOD_SEL2 */</div><div class='add'>+	FN_SEL_MTU2_CLK_0, FN_SEL_MTU2_CLK_1,</div><div class='add'>+	FN_SEL_MTU2_CH4_0, FN_SEL_MTU2_CH4_1,</div><div class='add'>+	FN_SEL_MTU2_CH3_0, FN_SEL_MTU2_CH3_1,</div><div class='add'>+	FN_SEL_MTU2_CH2_0, FN_SEL_MTU2_CH2_1, FN_SEL_MTU2_CH2_2,</div><div class='add'>+	FN_SEL_MTU2_CH1_0, FN_SEL_MTU2_CH1_1, FN_SEL_MTU2_CH1_2,</div><div class='add'>+	FN_SEL_MTU2_CH0_0, FN_SEL_MTU2_CH0_1,</div><div class='add'>+	FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,</div><div class='add'>+	FN_SEL_SCIF5_2, FN_SEL_SCIF5_3,</div><div class='add'>+	FN_SEL_SCIF4_0, FN_SEL_SCIF4_1,</div><div class='add'>+	FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,</div><div class='add'>+	FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2,</div><div class='add'>+		FN_SEL_SCIF3_3, FN_SEL_SCIF3_4,</div><div class='add'>+	FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2,</div><div class='add'>+		FN_SEL_SCIF2_3,</div><div class='add'>+	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2,</div><div class='add'>+		FN_SEL_SCIF1_3, FN_SEL_SCIF1_4,</div><div class='add'>+	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2,</div><div class='add'>+	FN_SEL_SCIF_CLK_0, FN_SEL_SCIF_CLK_1, FN_SEL_SCIF_CLK_2,</div><div class='add'>+</div><div class='add'>+	PINMUX_FUNCTION_END,</div><div class='add'>+</div><div class='add'>+	PINMUX_MARK_BEGIN,</div><div class='add'>+</div><div class='add'>+	CLKOUT_MARK, BS_MARK, CS0_MARK, EX_CS0_MARK, RD_MARK,</div><div class='add'>+	WE0_MARK, WE1_MARK,</div><div class='add'>+</div><div class='add'>+	SCL0_MARK, PENC0_MARK, USB_OVC0_MARK,</div><div class='add'>+</div><div class='add'>+	IRQ2_B_MARK, IRQ3_B_MARK,</div><div class='add'>+</div><div class='add'>+	/* IPSR0 */</div><div class='add'>+	A15_MARK, ST0_VCO_CLKIN_MARK, LCD_DATA15_A_MARK, TIOC3D_C_MARK,</div><div class='add'>+	A14_MARK, LCD_DATA14_A_MARK, TIOC3C_C_MARK,</div><div class='add'>+	A13_MARK, LCD_DATA13_A_MARK, TIOC3B_C_MARK,</div><div class='add'>+	A12_MARK, LCD_DATA12_A_MARK, TIOC3A_C_MARK,</div><div class='add'>+	A11_MARK, ST0_D7_MARK, LCD_DATA11_A_MARK, TIOC2B_C_MARK,</div><div class='add'>+	A10_MARK, ST0_D6_MARK, LCD_DATA10_A_MARK, TIOC2A_C_MARK,</div><div class='add'>+	A9_MARK, ST0_D5_MARK, LCD_DATA9_A_MARK, TIOC1B_C_MARK,</div><div class='add'>+	A8_MARK, ST0_D4_MARK, LCD_DATA8_A_MARK, TIOC1A_C_MARK,</div><div class='add'>+	A7_MARK, ST0_D3_MARK, LCD_DATA7_A_MARK, TIOC0D_C_MARK,</div><div class='add'>+	A6_MARK, ST0_D2_MARK, LCD_DATA6_A_MARK, TIOC0C_C_MARK,</div><div class='add'>+	A5_MARK, ST0_D1_MARK, LCD_DATA5_A_MARK, TIOC0B_C_MARK,</div><div class='add'>+	A4_MARK, ST0_D0_MARK, LCD_DATA4_A_MARK, TIOC0A_C_MARK,</div><div class='add'>+	A3_MARK, ST0_VLD_MARK, LCD_DATA3_A_MARK, TCLKD_C_MARK,</div><div class='add'>+	A2_MARK, ST0_SYC_MARK, LCD_DATA2_A_MARK, TCLKC_C_MARK,</div><div class='add'>+	A1_MARK, ST0_REQ_MARK, LCD_DATA1_A_MARK, TCLKB_C_MARK,</div><div class='add'>+	A0_MARK, ST0_CLKIN_MARK, LCD_DATA0_A_MARK, TCLKA_C_MARK,</div><div class='add'>+</div><div class='add'>+	/* IPSR1 */</div><div class='add'>+	D3_MARK, SD0_DAT3_A_MARK, MMC_D3_A_MARK, ST1_D6_MARK, FD3_A_MARK,</div><div class='add'>+	D2_MARK, SD0_DAT2_A_MARK, MMC_D2_A_MARK, ST1_D5_MARK, FD2_A_MARK,</div><div class='add'>+	D1_MARK, SD0_DAT1_A_MARK, MMC_D1_A_MARK, ST1_D4_MARK, FD1_A_MARK,</div><div class='add'>+	D0_MARK, SD0_DAT0_A_MARK, MMC_D0_A_MARK, ST1_D3_MARK, FD0_A_MARK,</div><div class='add'>+	A25_MARK, TX2_D_MARK, ST1_D2_MARK,</div><div class='add'>+	A24_MARK, RX2_D_MARK, ST1_D1_MARK,</div><div class='add'>+	A23_MARK, ST1_D0_MARK, LCD_M_DISP_A_MARK,</div><div class='add'>+	A22_MARK, ST1_VLD_MARK, LCD_VEPWC_A_MARK,</div><div class='add'>+	A21_MARK, ST1_SYC_MARK, LCD_VCPWC_A_MARK,</div><div class='add'>+	A20_MARK, ST1_REQ_MARK, LCD_FLM_A_MARK,</div><div class='add'>+	A19_MARK, ST1_CLKIN_MARK, LCD_CLK_A_MARK,	TIOC4D_C_MARK,</div><div class='add'>+	A18_MARK, ST1_PWM_MARK, LCD_CL2_A_MARK, TIOC4C_C_MARK,</div><div class='add'>+	A17_MARK, ST1_VCO_CLKIN_MARK, LCD_CL1_A_MARK, TIOC4B_C_MARK,</div><div class='add'>+	A16_MARK, ST0_PWM_MARK, LCD_DON_A_MARK, TIOC4A_C_MARK,</div><div class='add'>+</div><div class='add'>+	/* IPSR2 */</div><div class='add'>+	D14_MARK, TX2_B_MARK, FSE_A_MARK, ET0_TX_CLK_B_MARK,</div><div class='add'>+	D13_MARK, RX2_B_MARK, FRB_A_MARK, ET0_ETXD6_B_MARK,</div><div class='add'>+	D12_MARK, FWE_A_MARK, ET0_ETXD5_B_MARK,</div><div class='add'>+	D11_MARK, RSPI_MISO_A_MARK, QMI_QIO1_A_MARK, FRE_A_MARK,</div><div class='add'>+		ET0_ETXD3_B_MARK,</div><div class='add'>+	D10_MARK, RSPI_MOSI_A_MARK, QMO_QIO0_A_MARK, FALE_A_MARK,</div><div class='add'>+		ET0_ETXD2_B_MARK,</div><div class='add'>+	D9_MARK, SD0_CMD_A_MARK, MMC_CMD_A_MARK, QIO3_A_MARK,</div><div class='add'>+		FCLE_A_MARK, ET0_ETXD1_B_MARK,</div><div class='add'>+	D8_MARK, SD0_CLK_A_MARK, MMC_CLK_A_MARK, QIO2_A_MARK,</div><div class='add'>+		FCE_A_MARK, ET0_GTX_CLK_B_MARK,</div><div class='add'>+	D7_MARK, RSPI_SSL_A_MARK, MMC_D7_A_MARK, QSSL_A_MARK,</div><div class='add'>+		FD7_A_MARK,</div><div class='add'>+	D6_MARK, RSPI_RSPCK_A_MARK, MMC_D6_A_MARK, QSPCLK_A_MARK,</div><div class='add'>+		FD6_A_MARK,</div><div class='add'>+	D5_MARK, SD0_WP_A_MARK, MMC_D5_A_MARK, FD5_A_MARK,</div><div class='add'>+	D4_MARK, SD0_CD_A_MARK, MMC_D4_A_MARK, ST1_D7_MARK,</div><div class='add'>+		FD4_A_MARK,</div><div class='add'>+</div><div class='add'>+	/* IPSR3 */</div><div class='add'>+	DRACK0_MARK, SD1_DAT2_A_MARK, ATAG_MARK, TCLK1_A_MARK, ET0_ETXD7_MARK,</div><div class='add'>+	EX_WAIT2_MARK, SD1_DAT1_A_MARK, DACK2_MARK, CAN1_RX_C_MARK,</div><div class='add'>+		ET0_MAGIC_C_MARK, ET0_ETXD6_A_MARK,</div><div class='add'>+	EX_WAIT1_MARK, SD1_DAT0_A_MARK, DREQ2_MARK, CAN1_TX_C_MARK,</div><div class='add'>+		ET0_LINK_C_MARK, ET0_ETXD5_A_MARK,</div><div class='add'>+	EX_WAIT0_MARK, TCLK1_B_MARK,</div><div class='add'>+	RD_WR_MARK, TCLK0_MARK, CAN_CLK_B_MARK, ET0_ETXD4_MARK,</div><div class='add'>+	EX_CS5_MARK, SD1_CMD_A_MARK, ATADIR_MARK, QSSL_B_MARK,</div><div class='add'>+		ET0_ETXD3_A_MARK,</div><div class='add'>+	EX_CS4_MARK, SD1_WP_A_MARK, ATAWR_MARK, QMI_QIO1_B_MARK,</div><div class='add'>+		ET0_ETXD2_A_MARK,</div><div class='add'>+	EX_CS3_MARK, SD1_CD_A_MARK, ATARD_MARK, QMO_QIO0_B_MARK,</div><div class='add'>+		ET0_ETXD1_A_MARK,</div><div class='add'>+	EX_CS2_MARK, TX3_B_MARK, ATACS1_MARK, QSPCLK_B_MARK,</div><div class='add'>+		ET0_GTX_CLK_A_MARK,</div><div class='add'>+	EX_CS1_MARK, RX3_B_MARK, ATACS0_MARK, QIO2_B_MARK,</div><div class='add'>+		ET0_ETXD0_MARK,</div><div class='add'>+	CS1_A26_MARK, QIO3_B_MARK,</div><div class='add'>+	D15_MARK, SCK2_B_MARK,</div><div class='add'>+</div><div class='add'>+	/* IPSR4 */</div><div class='add'>+	SCK2_A_MARK, VI0_G3_MARK,</div><div class='add'>+	RTS1_B_MARK, VI0_G2_MARK,</div><div class='add'>+	CTS1_B_MARK, VI0_DATA7_VI0_G1_MARK,</div><div class='add'>+	TX1_B_MARK, VI0_DATA6_VI0_G0_MARK, ET0_PHY_INT_A_MARK,</div><div class='add'>+	RX1_B_MARK, VI0_DATA5_VI0_B5_MARK, ET0_MAGIC_A_MARK,</div><div class='add'>+	SCK1_B_MARK, VI0_DATA4_VI0_B4_MARK, ET0_LINK_A_MARK,</div><div class='add'>+	RTS0_B_MARK, VI0_DATA3_VI0_B3_MARK, ET0_MDIO_A_MARK,</div><div class='add'>+	CTS0_B_MARK, VI0_DATA2_VI0_B2_MARK, RMII0_MDIO_A_MARK,</div><div class='add'>+		ET0_MDC_MARK,</div><div class='add'>+	HTX0_A_MARK, TX1_A_MARK, VI0_DATA1_VI0_B1_MARK,</div><div class='add'>+		RMII0_MDC_A_MARK, ET0_COL_MARK,</div><div class='add'>+	HRX0_A_MARK, RX1_A_MARK, VI0_DATA0_VI0_B0_MARK,</div><div class='add'>+		RMII0_CRS_DV_A_MARK, ET0_CRS_MARK,</div><div class='add'>+	HSCK0_A_MARK, SCK1_A_MARK, VI0_VSYNC_MARK,</div><div class='add'>+		RMII0_RX_ER_A_MARK, ET0_RX_ER_MARK,</div><div class='add'>+	HRTS0_A_MARK, RTS1_A_MARK, VI0_HSYNC_MARK,</div><div class='add'>+		RMII0_TXD_EN_A_MARK, ET0_RX_DV_MARK,</div><div class='add'>+	HCTS0_A_MARK, CTS1_A_MARK, VI0_FIELD_MARK,</div><div class='add'>+		RMII0_RXD1_A_MARK, ET0_ERXD7_MARK,</div><div class='add'>+</div><div class='add'>+	/* IPSR5 */</div><div class='add'>+	SD2_CLK_A_MARK, RX2_A_MARK, VI0_G4_MARK, ET0_RX_CLK_B_MARK,</div><div class='add'>+	SD2_CMD_A_MARK, TX2_A_MARK, VI0_G5_MARK, ET0_ERXD2_B_MARK,</div><div class='add'>+	SD2_DAT0_A_MARK, RX3_A_MARK, VI0_R0_MARK, ET0_ERXD3_B_MARK,</div><div class='add'>+	SD2_DAT1_A_MARK, TX3_A_MARK, VI0_R1_MARK, ET0_MDIO_B_MARK,</div><div class='add'>+	SD2_DAT2_A_MARK, RX4_A_MARK, VI0_R2_MARK, ET0_LINK_B_MARK,</div><div class='add'>+	SD2_DAT3_A_MARK, TX4_A_MARK, VI0_R3_MARK, ET0_MAGIC_B_MARK,</div><div class='add'>+	SD2_CD_A_MARK, RX5_A_MARK, VI0_R4_MARK, ET0_PHY_INT_B_MARK,</div><div class='add'>+	SD2_WP_A_MARK, TX5_A_MARK, VI0_R5_MARK,</div><div class='add'>+	REF125CK_MARK, ADTRG_MARK, RX5_C_MARK,</div><div class='add'>+	REF50CK_MARK, CTS1_E_MARK, HCTS0_D_MARK,</div><div class='add'>+</div><div class='add'>+	/* IPSR6 */</div><div class='add'>+	DU0_DR0_MARK, SCIF_CLK_B_MARK, HRX0_D_MARK, IETX_A_MARK,</div><div class='add'>+		TCLKA_A_MARK, HIFD00_MARK,</div><div class='add'>+	DU0_DR1_MARK, SCK0_B_MARK, HTX0_D_MARK, IERX_A_MARK,</div><div class='add'>+		TCLKB_A_MARK, HIFD01_MARK,</div><div class='add'>+	DU0_DR2_MARK, RX0_B_MARK, TCLKC_A_MARK, HIFD02_MARK,</div><div class='add'>+	DU0_DR3_MARK, TX0_B_MARK, TCLKD_A_MARK, HIFD03_MARK,</div><div class='add'>+	DU0_DR4_MARK, CTS0_C_MARK, TIOC0A_A_MARK, HIFD04_MARK,</div><div class='add'>+	DU0_DR5_MARK, RTS0_C_MARK, TIOC0B_A_MARK, HIFD05_MARK,</div><div class='add'>+	DU0_DR6_MARK, SCK1_C_MARK, TIOC0C_A_MARK, HIFD06_MARK,</div><div class='add'>+	DU0_DR7_MARK, RX1_C_MARK, TIOC0D_A_MARK, HIFD07_MARK,</div><div class='add'>+	DU0_DG0_MARK, TX1_C_MARK, HSCK0_D_MARK, IECLK_A_MARK,</div><div class='add'>+		TIOC1A_A_MARK, HIFD08_MARK,</div><div class='add'>+	DU0_DG1_MARK, CTS1_C_MARK, HRTS0_D_MARK, TIOC1B_A_MARK,</div><div class='add'>+		HIFD09_MARK,</div><div class='add'>+</div><div class='add'>+	/* IPSR7 */</div><div class='add'>+	DU0_DG2_MARK, RTS1_C_MARK, RMII0_MDC_B_MARK, TIOC2A_A_MARK,</div><div class='add'>+		HIFD10_MARK,</div><div class='add'>+	DU0_DG3_MARK, SCK2_C_MARK, RMII0_MDIO_B_MARK, TIOC2B_A_MARK,</div><div class='add'>+		HIFD11_MARK,</div><div class='add'>+	DU0_DG4_MARK, RX2_C_MARK, RMII0_CRS_DV_B_MARK, TIOC3A_A_MARK,</div><div class='add'>+		HIFD12_MARK,</div><div class='add'>+	DU0_DG5_MARK, TX2_C_MARK, RMII0_RX_ER_B_MARK, TIOC3B_A_MARK,</div><div class='add'>+		HIFD13_MARK,</div><div class='add'>+	DU0_DG6_MARK, RX3_C_MARK, RMII0_RXD0_B_MARK, TIOC3C_A_MARK,</div><div class='add'>+		HIFD14_MARK,</div><div class='add'>+	DU0_DG7_MARK, TX3_C_MARK, RMII0_RXD1_B_MARK, TIOC3D_A_MARK,</div><div class='add'>+		HIFD15_MARK,</div><div class='add'>+	DU0_DB0_MARK, RX4_C_MARK, RMII0_TXD_EN_B_MARK, TIOC4A_A_MARK,</div><div class='add'>+		HIFCS_MARK,</div><div class='add'>+	DU0_DB1_MARK, TX4_C_MARK, RMII0_TXD0_B_MARK, TIOC4B_A_MARK,</div><div class='add'>+		HIFRS_MARK,</div><div class='add'>+	DU0_DB2_MARK, RX5_B_MARK, RMII0_TXD1_B_MARK, TIOC4C_A_MARK,</div><div class='add'>+		HIFWR_MARK,</div><div class='add'>+	DU0_DB3_MARK, TX5_B_MARK, TIOC4D_A_MARK, HIFRD_MARK,</div><div class='add'>+	DU0_DB4_MARK, HIFINT_MARK,</div><div class='add'>+</div><div class='add'>+	/* IPSR8 */</div><div class='add'>+	DU0_DB5_MARK, HIFDREQ_MARK,</div><div class='add'>+	DU0_DB6_MARK, HIFRDY_MARK,</div><div class='add'>+	DU0_DB7_MARK, SSI_SCK0_B_MARK, HIFEBL_B_MARK,</div><div class='add'>+	DU0_DOTCLKIN_MARK, HSPI_CS0_C_MARK, SSI_WS0_B_MARK,</div><div class='add'>+	DU0_DOTCLKOUT_MARK, HSPI_CLK0_C_MARK, SSI_SDATA0_B_MARK,</div><div class='add'>+	DU0_EXHSYNC_DU0_HSYNC_MARK, HSPI_TX0_C_MARK, SSI_SCK1_B_MARK,</div><div class='add'>+	DU0_EXVSYNC_DU0_VSYNC_MARK, HSPI_RX0_C_MARK, SSI_WS1_B_MARK,</div><div class='add'>+	DU0_EXODDF_DU0_ODDF_MARK, CAN0_RX_B_MARK, HSCK0_B_MARK,</div><div class='add'>+		SSI_SDATA1_B_MARK,</div><div class='add'>+	DU0_DISP_MARK, CAN0_TX_B_MARK, HRX0_B_MARK, AUDIO_CLKA_B_MARK,</div><div class='add'>+	DU0_CDE_MARK, HTX0_B_MARK, AUDIO_CLKB_B_MARK, LCD_VCPWC_B_MARK,</div><div class='add'>+	IRQ0_A_MARK, HSPI_TX_B_MARK, RX3_E_MARK, ET0_ERXD0_MARK,</div><div class='add'>+	IRQ1_A_MARK, HSPI_RX_B_MARK, TX3_E_MARK, ET0_ERXD1_MARK,</div><div class='add'>+	IRQ2_A_MARK, CTS0_A_MARK, HCTS0_B_MARK, ET0_ERXD2_A_MARK,</div><div class='add'>+	IRQ3_A_MARK, RTS0_A_MARK, HRTS0_B_MARK, ET0_ERXD3_A_MARK,</div><div class='add'>+</div><div class='add'>+	/* IPSR9 */</div><div class='add'>+	VI1_CLK_A_MARK, FD0_B_MARK, LCD_DATA0_B_MARK,</div><div class='add'>+	VI1_0_A_MARK, FD1_B_MARK, LCD_DATA1_B_MARK,</div><div class='add'>+	VI1_1_A_MARK, FD2_B_MARK, LCD_DATA2_B_MARK,</div><div class='add'>+	VI1_2_A_MARK, FD3_B_MARK, LCD_DATA3_B_MARK,</div><div class='add'>+	VI1_3_A_MARK, FD4_B_MARK, LCD_DATA4_B_MARK,</div><div class='add'>+	VI1_4_A_MARK, FD5_B_MARK, LCD_DATA5_B_MARK,</div><div class='add'>+	VI1_5_A_MARK, FD6_B_MARK, LCD_DATA6_B_MARK,</div><div class='add'>+	VI1_6_A_MARK, FD7_B_MARK, LCD_DATA7_B_MARK,</div><div class='add'>+	VI1_7_A_MARK, FCE_B_MARK, LCD_DATA8_B_MARK,</div><div class='add'>+	SSI_SCK0_A_MARK, TIOC1A_B_MARK, LCD_DATA9_B_MARK,</div><div class='add'>+	SSI_WS0_A_MARK, TIOC1B_B_MARK, LCD_DATA10_B_MARK,</div><div class='add'>+	SSI_SDATA0_A_MARK, VI1_0_B_MARK, TIOC2A_B_MARK, LCD_DATA11_B_MARK,</div><div class='add'>+	SSI_SCK1_A_MARK, VI1_1_B_MARK, TIOC2B_B_MARK, LCD_DATA12_B_MARK,</div><div class='add'>+	SSI_WS1_A_MARK, VI1_2_B_MARK, LCD_DATA13_B_MARK,</div><div class='add'>+	SSI_SDATA1_A_MARK, VI1_3_B_MARK, LCD_DATA14_B_MARK,</div><div class='add'>+</div><div class='add'>+	/* IPSR10 */</div><div class='add'>+	SSI_SCK23_MARK, VI1_4_B_MARK, RX1_D_MARK, FCLE_B_MARK,</div><div class='add'>+		LCD_DATA15_B_MARK,</div><div class='add'>+	SSI_WS23_MARK, VI1_5_B_MARK, TX1_D_MARK, HSCK0_C_MARK,</div><div class='add'>+		FALE_B_MARK, LCD_DON_B_MARK,</div><div class='add'>+	SSI_SDATA2_MARK, VI1_6_B_MARK, HRX0_C_MARK, FRE_B_MARK,</div><div class='add'>+		LCD_CL1_B_MARK,</div><div class='add'>+	SSI_SDATA3_MARK, VI1_7_B_MARK, HTX0_C_MARK, FWE_B_MARK,</div><div class='add'>+		LCD_CL2_B_MARK,</div><div class='add'>+	AUDIO_CLKA_A_MARK, VI1_CLK_B_MARK, SCK1_D_MARK, IECLK_B_MARK,</div><div class='add'>+		LCD_FLM_B_MARK,</div><div class='add'>+	AUDIO_CLKB_A_MARK, LCD_CLK_B_MARK,</div><div class='add'>+	AUDIO_CLKC_MARK, SCK1_E_MARK, HCTS0_C_MARK, FRB_B_MARK,</div><div class='add'>+		LCD_VEPWC_B_MARK,</div><div class='add'>+	AUDIO_CLKOUT_MARK, TX1_E_MARK, HRTS0_C_MARK, FSE_B_MARK,</div><div class='add'>+		LCD_M_DISP_B_MARK,</div><div class='add'>+	CAN_CLK_A_MARK, RX4_D_MARK,</div><div class='add'>+	CAN0_TX_A_MARK, TX4_D_MARK, MLB_CLK_MARK,</div><div class='add'>+	CAN1_RX_A_MARK, IRQ1_B_MARK,</div><div class='add'>+	CAN0_RX_A_MARK, IRQ0_B_MARK, MLB_SIG_MARK,</div><div class='add'>+	CAN1_TX_A_MARK, TX5_C_MARK, MLB_DAT_MARK,</div><div class='add'>+</div><div class='add'>+	/* IPSR11 */</div><div class='add'>+	SCL1_MARK, SCIF_CLK_C_MARK,</div><div class='add'>+	SDA1_MARK, RX1_E_MARK,</div><div class='add'>+	SDA0_MARK, HIFEBL_A_MARK,</div><div class='add'>+	SDSELF_MARK, RTS1_E_MARK,</div><div class='add'>+	SCIF_CLK_A_MARK, HSPI_CLK_A_MARK, VI0_CLK_MARK, RMII0_TXD0_A_MARK,</div><div class='add'>+		ET0_ERXD4_MARK,</div><div class='add'>+	SCK0_A_MARK, HSPI_CS_A_MARK, VI0_CLKENB_MARK, RMII0_TXD1_A_MARK,</div><div class='add'>+		ET0_ERXD5_MARK,</div><div class='add'>+	RX0_A_MARK, HSPI_RX_A_MARK, RMII0_RXD0_A_MARK, ET0_ERXD6_MARK,</div><div class='add'>+	TX0_A_MARK, HSPI_TX_A_MARK,</div><div class='add'>+	PENC1_MARK, TX3_D_MARK, CAN1_TX_B_MARK, TX5_D_MARK,</div><div class='add'>+		IETX_B_MARK,</div><div class='add'>+	USB_OVC1_MARK, RX3_D_MARK, CAN1_RX_B_MARK, RX5_D_MARK,</div><div class='add'>+		IERX_B_MARK,</div><div class='add'>+	DREQ0_MARK, SD1_CLK_A_MARK, ET0_TX_EN_MARK,</div><div class='add'>+	DACK0_MARK, SD1_DAT3_A_MARK, ET0_TX_ER_MARK,</div><div class='add'>+	DREQ1_MARK, HSPI_CLK_B_MARK, RX4_B_MARK, ET0_PHY_INT_C_MARK,</div><div class='add'>+		ET0_TX_CLK_A_MARK,</div><div class='add'>+	DACK1_MARK, HSPI_CS_B_MARK, TX4_B_MARK, ET0_RX_CLK_A_MARK,</div><div class='add'>+	PRESETOUT_MARK, ST_CLKOUT_MARK,</div><div class='add'>+</div><div class='add'>+	PINMUX_MARK_END,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static pinmux_enum_t pinmux_data[] = {</div><div class='add'>+	PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */</div><div class='add'>+</div><div class='add'>+	PINMUX_DATA(CLKOUT_MARK, FN_CLKOUT),</div><div class='add'>+	PINMUX_DATA(BS_MARK, FN_BS), PINMUX_DATA(CS0_MARK, FN_CS0),</div><div class='add'>+	PINMUX_DATA(EX_CS0_MARK, FN_EX_CS0),</div><div class='add'>+	PINMUX_DATA(RD_MARK, FN_RD), PINMUX_DATA(WE0_MARK, FN_WE0),</div><div class='add'>+	PINMUX_DATA(WE1_MARK, FN_WE1),</div><div class='add'>+	PINMUX_DATA(SCL0_MARK, FN_SCL0), PINMUX_DATA(PENC0_MARK, FN_PENC0),</div><div class='add'>+	PINMUX_DATA(USB_OVC0_MARK, FN_USB_OVC0),</div><div class='add'>+	PINMUX_DATA(IRQ2_B_MARK, FN_IRQ2_B),</div><div class='add'>+		PINMUX_DATA(IRQ3_B_MARK, FN_IRQ3_B),</div><div class='add'>+</div><div class='add'>+	/* IPSR0 */</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_1_0, A0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_1_0, ST0_CLKIN),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_1_0, LCD_DATA0_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_1_0, TCLKA_C, SEL_MTU2_CLK_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_3_2, A1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_3_2, ST0_REQ),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_3_2, LCD_DATA1_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_3_2, TCLKB_C, SEL_MTU2_CLK_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_5_4, A2),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_5_4, ST0_SYC),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_5_4, LCD_DATA2_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_5_4, TCLKC_C, SEL_MTU2_CLK_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_7_6, A3),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_7_6, ST0_VLD),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_7_6, LCD_DATA3_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_7_6, TCLKD_C, SEL_MTU2_CLK_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_9_8, A4),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_9_8, ST0_D0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_9_8, LCD_DATA4_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_9_8, TIOC0A_C, SEL_MTU2_CH0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_11_10, A5),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_11_10, ST0_D1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_11_10, LCD_DATA5_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_11_10, TIOC0B_C, SEL_MTU2_CH0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_13_12, A6),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_13_12, ST0_D2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_13_12, LCD_DATA6_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_13_12, TIOC0C_C, SEL_MTU2_CH0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_15_14, A7),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_15_14, ST0_D3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_15_14, LCD_DATA7_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_15_14, TIOC0D_C, SEL_MTU2_CH0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_17_16, A8),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_17_16, ST0_D4),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_17_16, LCD_DATA8_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_17_16, TIOC1A_C, SEL_MTU2_CH1_2),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_19_18, A9),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_19_18, ST0_D5),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_19_18, LCD_DATA9_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_19_18, TIOC1B_C, SEL_MTU2_CH1_2),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_21_20, A10),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_21_20, ST0_D6),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_21_20, LCD_DATA10_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_21_20, TIOC2A_C, SEL_MTU2_CH2_2),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_23_22, A11),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_23_22, ST0_D7),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_23_22, LCD_DATA11_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_23_22, TIOC2B_C, SEL_MTU2_CH2_2),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_25_24, A12),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_25_24, LCD_DATA12_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_25_24, TIOC3A_C, SEL_MTU2_CH3_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_27_26, A13),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_27_26, LCD_DATA13_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_27_26, TIOC3B_C, SEL_MTU2_CH3_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_29_28, A14),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_29_28, LCD_DATA14_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_29_28, TIOC3C_C, SEL_MTU2_CH3_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_31_30, A15),</div><div class='add'>+	PINMUX_IPSR_DATA(IP0_31_30, ST0_VCO_CLKIN),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_31_30, LCD_DATA15_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP0_31_30, TIOC3D_C, SEL_MTU2_CH3_1),</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	/* IPSR1 */</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_1_0, A16),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_1_0, ST0_PWM),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_1_0, LCD_DON_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_1_0, TIOC4A_C, SEL_MTU2_CH4_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_3_2, A17),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_3_2, ST1_VCO_CLKIN),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_3_2, LCD_CL1_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_3_2, TIOC4B_C, SEL_MTU2_CH4_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_5_4, A18),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_5_4, ST1_PWM),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_5_4, LCD_CL2_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_5_4, TIOC4C_C, SEL_MTU2_CH4_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_7_6, A19),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_7_6, ST1_CLKIN),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_7_6, LCD_CLK_A, SEL_LCDC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_7_6, TIOC4D_C, SEL_MTU2_CH4_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_9_8, A20),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_9_8, ST1_REQ),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_9_8, LCD_FLM_A, SEL_LCDC_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_11_10, A21),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_11_10, ST1_SYC),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_11_10, LCD_VCPWC_A, SEL_LCDC_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_13_12, A22),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_13_12, ST1_VLD),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_13_12, LCD_VEPWC_A, SEL_LCDC_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_15_14, A23),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_15_14, ST1_D0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_15_14, LCD_M_DISP_A, SEL_LCDC_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_17_16, A24),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_17_16, RX2_D, SEL_SCIF2_3),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_17_16, ST1_D1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_19_18, A25),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_17_16, RX2_D, SEL_SCIF2_3),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_17_16, ST1_D2),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_22_20, D0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_22_20, SD0_DAT0_A, SEL_SDHI0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_22_20, MMC_D0_A, SEL_MMC_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_22_20, ST1_D3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_22_20, FD0_A, SEL_FLCTL_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_25_23, D1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_25_23, SD0_DAT0_A, SEL_SDHI0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_25_23, MMC_D1_A, SEL_MMC_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_25_23, ST1_D4),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_25_23, FD1_A, SEL_FLCTL_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_28_26, D2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_28_26, SD0_DAT0_A, SEL_SDHI0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_28_26, MMC_D2_A, SEL_MMC_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_28_26, ST1_D5),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_28_26, FD2_A, SEL_FLCTL_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_31_29, D3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_31_29, SD0_DAT0_A, SEL_SDHI0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_31_29, MMC_D3_A, SEL_MMC_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP1_31_29, ST1_D6),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP1_31_29, FD3_A, SEL_FLCTL_0),</div><div class='add'>+</div><div class='add'>+	/* IPSR2 */</div><div class='add'>+	PINMUX_IPSR_DATA(IP2_2_0, D4),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_2_0, SD0_CD_A, SEL_SDHI0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_2_0, MMC_D4_A, SEL_MMC_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP2_2_0, ST1_D7),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_2_0, FD4_A, SEL_FLCTL_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP2_4_3, D5),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_4_3, SD0_WP_A, SEL_SDHI0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_4_3, MMC_D5_A, SEL_MMC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_4_3, FD5_A, SEL_FLCTL_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP2_7_5, D6),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_7_5, RSPI_RSPCK_A, SEL_RSPI_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_7_5, MMC_D6_A, SEL_MMC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_7_5, QSPCLK_A, SEL_RQSPI_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_7_5, FD6_A, SEL_FLCTL_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP2_10_8, D7),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_10_8, RSPI_SSL_A, SEL_RSPI_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_10_8, MMC_D7_A, SEL_MMC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_10_8, QSSL_A, SEL_RQSPI_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_10_8, FD7_A, SEL_FLCTL_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP2_13_11, D8),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_13_11, SD0_CLK_A, SEL_SDHI0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_13_11, MMC_CLK_A, SEL_MMC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_13_11, QIO2_A, SEL_RQSPI_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_13_11, FCE_A, SEL_FLCTL_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_13_11, ET0_GTX_CLK_B, SEL_ET0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP2_16_14, D9),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_16_14, SD0_CMD_A, SEL_SDHI0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_16_14, MMC_CMD_A, SEL_MMC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_16_14, QIO3_A, SEL_RQSPI_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_16_14, FCLE_A, SEL_FLCTL_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_16_14, ET0_ETXD1_B, SEL_ET0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP2_19_17, D10),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_19_17, RSPI_MOSI_A, SEL_RSPI_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_19_17, QMO_QIO0_A, SEL_RQSPI_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_19_17, FALE_A, SEL_FLCTL_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_19_17, ET0_ETXD2_B, SEL_ET0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP2_22_20, D11),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_22_20, RSPI_MISO_A, SEL_RSPI_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_22_20, QMI_QIO1_A, SEL_RQSPI_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_22_20, FRE_A, SEL_FLCTL_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP2_24_23, D12),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_24_23, FWE_A, SEL_FLCTL_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_24_23, ET0_ETXD5_B, SEL_ET0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP2_27_25, D13),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_27_25, RX2_B, SEL_SCIF2_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_27_25, FRB_A, SEL_FLCTL_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_27_25, ET0_ETXD6_B, SEL_ET0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP2_30_28, D14),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_30_28, TX2_B, SEL_SCIF2_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_30_28, FSE_A, SEL_FLCTL_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP2_30_28, ET0_TX_CLK_B, SEL_ET0_1),</div><div class='add'>+</div><div class='add'>+	/* IPSR3 */</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_1_0, D15),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_1_0, SCK2_B, SEL_SCIF2_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_2, CS1_A26),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_2, QIO3_B, SEL_RQSPI_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_5_3, EX_CS1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_5_3, RX3_B, SEL_SCIF2_1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_5_3, ATACS0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_5_3, QIO2_B, SEL_RQSPI_1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_5_3, ET0_ETXD0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_8_6, EX_CS2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_8_6, TX3_B, SEL_SCIF3_1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_8_6, ATACS1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_8_6, QSPCLK_B, SEL_RQSPI_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_8_6, ET0_GTX_CLK_A, SEL_ET0_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_11_9, EX_CS3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_11_9, SD1_CD_A, SEL_SDHI1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_11_9, ATARD),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_11_9, QMO_QIO0_B, SEL_RQSPI_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_11_9, ET0_ETXD1_A, SEL_ET0_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_14_12, EX_CS4),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_14_12, SD1_WP_A, SEL_SDHI1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_14_12, ATAWR),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_14_12, QMI_QIO1_B, SEL_RQSPI_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_14_12, ET0_ETXD2_A, SEL_ET0_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_17_15, EX_CS5),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_17_15, SD1_CMD_A, SEL_SDHI1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_17_15, ATADIR),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_17_15, QSSL_B, SEL_RQSPI_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_17_15, ET0_ETXD3_A, SEL_ET0_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_19_18, RD_WR),</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_19_18, TCLK0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_19_18, CAN_CLK_B, SEL_RCAN_CLK_1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_19_18, ET0_ETXD4),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_20, EX_WAIT0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_20, TCLK1_B, SEL_TMU_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_23_21, EX_WAIT1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_23_21, SD1_DAT0_A, SEL_SDHI1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_23_21, DREQ2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_23_21, CAN1_TX_C, SEL_RCAN1_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_23_21, ET0_LINK_C, SEL_ET0_CTL_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_23_21, ET0_ETXD5_A, SEL_ET0_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_26_24, EX_WAIT2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_26_24, SD1_DAT1_A, SEL_SDHI1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_26_24, DACK2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_26_24, CAN1_RX_C, SEL_RCAN1_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_26_24, ET0_MAGIC_C, SEL_ET0_CTL_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_26_24, ET0_ETXD6_A, SEL_ET0_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_29_27, DRACK0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_29_27, SD1_DAT2_A, SEL_SDHI1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_29_27, ATAG),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP3_29_27, TCLK1_A, SEL_TMU_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP3_29_27, ET0_ETXD7),</div><div class='add'>+</div><div class='add'>+	/* IPSR4 */</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_2_0, HCTS0_A, SEL_HSCIF_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_2_0, CTS1_A, SEL_SCIF1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_2_0, VI0_FIELD),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_2_0, RMII0_RXD1_A, SEL_RMII_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_2_0, ET0_ERXD7),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_5_3, HRTS0_A, SEL_HSCIF_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_5_3, RTS1_A, SEL_SCIF1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_5_3, VI0_HSYNC),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_5_3, RMII0_TXD_EN_A, SEL_RMII_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_5_3, ET0_RX_DV),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_8_6, HSCK0_A, SEL_HSCIF_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_8_6, SCK1_A, SEL_SCIF1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_8_6, VI0_VSYNC),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_8_6, RMII0_RX_ER_A, SEL_RMII_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_8_6, ET0_RX_ER),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_11_9, HRX0_A, SEL_HSCIF_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_11_9, RX1_A, SEL_SCIF1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_11_9, VI0_DATA0_VI0_B0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_11_9, RMII0_CRS_DV_A, SEL_RMII_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_11_9, ET0_CRS),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_14_12, HTX0_A, SEL_HSCIF_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_14_12, TX1_A, SEL_SCIF1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_14_12, VI0_DATA1_VI0_B1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_14_12, RMII0_MDC_A, SEL_RMII_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_14_12, ET0_COL),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_17_15, CTS0_B, SEL_SCIF0_1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_17_15, VI0_DATA2_VI0_B2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_17_15, RMII0_MDIO_A, SEL_RMII_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_17_15, ET0_MDC),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_19_18, RTS0_B, SEL_SCIF0_1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_19_18, VI0_DATA3_VI0_B3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_19_18, ET0_MDIO_A, SEL_ET0_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_21_20, SCK1_B, SEL_SCIF1_1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_21_20, VI0_DATA4_VI0_B4),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_21_20, ET0_LINK_A, SEL_ET0_CTL_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_23_22, RX1_B, SEL_SCIF1_1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_23_22, VI0_DATA5_VI0_B5),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_23_22, ET0_MAGIC_A, SEL_ET0_CTL_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_25_24, TX1_B, SEL_SCIF1_1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_25_24, VI0_DATA6_VI0_G0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_25_24, ET0_PHY_INT_A, SEL_ET0_CTL_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_27_26, CTS1_B, SEL_SCIF1_1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_27_26, VI0_DATA7_VI0_G1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_29_28, RTS1_B, SEL_SCIF1_1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_29_28, VI0_G2),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_31_30, SCK2_A, SEL_SCIF2_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_31_30, VI0_G3),</div><div class='add'>+</div><div class='add'>+	/* IPSR5 */</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_2_0, SD2_CLK_A, SEL_SDHI2_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_2_0, RX2_A, SEL_SCIF2_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP5_2_0, VI0_G4),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_2_0, ET0_RX_CLK_B, SEL_ET0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, SD2_CMD_A, SEL_SDHI2_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, TX2_A, SEL_SCIF2_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP5_5_3, VI0_G5),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, ET0_ERXD2_B, SEL_ET0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_8_6, SD2_DAT0_A, SEL_SDHI2_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_8_6, RX3_A, SEL_SCIF3_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP4_8_6, VI0_R0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP4_8_6, ET0_ERXD2_B, SEL_ET0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_11_9, SD2_DAT1_A, SEL_SDHI2_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_11_9, TX3_A, SEL_SCIF3_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP5_11_9, VI0_R1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_11_9, ET0_MDIO_B, SEL_ET0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_14_12, SD2_DAT2_A, SEL_SDHI2_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_14_12, RX4_A, SEL_SCIF4_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP5_14_12, VI0_R2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_14_12, ET0_LINK_B, SEL_ET0_CTL_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_17_15, SD2_DAT3_A, SEL_SDHI2_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_17_15, TX4_A, SEL_SCIF4_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP5_17_15, VI0_R3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_17_15, ET0_MAGIC_B, SEL_ET0_CTL_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_20_18, SD2_CD_A, SEL_SDHI2_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_20_18, RX5_A, SEL_SCIF5_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP5_20_18, VI0_R4),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_20_18, ET0_PHY_INT_B, SEL_ET0_CTL_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_22_21, SD2_WP_A, SEL_SDHI2_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_22_21, TX5_A, SEL_SCIF5_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP5_22_21, VI0_R5),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP5_24_23, REF125CK),</div><div class='add'>+	PINMUX_IPSR_DATA(IP5_24_23, ADTRG),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_24_23, RX5_C, SEL_SCIF5_2),</div><div class='add'>+	PINMUX_IPSR_DATA(IP5_26_25, REF50CK),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_26_25, CTS1_E, SEL_SCIF1_3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP5_26_25, HCTS0_D, SEL_HSCIF_3),</div><div class='add'>+</div><div class='add'>+	/* IPSR6 */</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_2_0, DU0_DR0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SCIF_CLK_B, SEL_SCIF_CLK_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, HRX0_D, SEL_HSCIF_3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, IETX_A, SEL_IEBUS_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, TCLKA_A, SEL_MTU2_CLK_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_2_0, HIFD00),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_5_3, DU0_DR1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SCK0_B, SEL_SCIF0_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, HTX0_D, SEL_HSCIF_3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, IERX_A, SEL_IEBUS_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, TCLKB_A, SEL_MTU2_CLK_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_5_3, HIFD01),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_7_6, DU0_DR2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_7_6, RX0_B, SEL_SCIF0_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_7_6, TCLKC_A, SEL_MTU2_CLK_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_7_6, HIFD02),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_9_8, DU0_DR3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_9_8, TX0_B, SEL_SCIF0_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_9_8, TCLKD_A, SEL_MTU2_CLK_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_9_8, HIFD03),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_11_10, DU0_DR4),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_11_10, CTS0_C, SEL_SCIF0_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_11_10, TIOC0A_A, SEL_MTU2_CH0_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_11_10, HIFD04),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_13_12, DU0_DR5),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_13_12, RTS0_C, SEL_SCIF0_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_13_12, TIOC0B_A, SEL_MTU2_CH0_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_13_12, HIFD05),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_15_14, DU0_DR6),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_15_14, SCK1_C, SEL_SCIF1_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_15_14, TIOC0C_A, SEL_MTU2_CH0_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_15_14, HIFD06),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_17_16, DU0_DR7),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_17_16, RX1_C, SEL_SCIF1_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_17_16, TIOC0D_A, SEL_MTU2_CH0_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_17_16, HIFD07),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_20_18, DU0_DG0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_20_18, TX1_C, SEL_SCIF1_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_20_18, HSCK0_D, SEL_HSCIF_3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_20_18, IECLK_A, SEL_IEBUS_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_20_18, TIOC1A_A, SEL_MTU2_CH1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_20_18, HIFD08),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_23_21, DU0_DG1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_23_21, CTS1_C, SEL_SCIF1_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_23_21, HRTS0_D, SEL_HSCIF_3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP6_23_21, TIOC1B_A, SEL_MTU2_CH1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP6_23_21, HIFD09),</div><div class='add'>+</div><div class='add'>+	/* IPSR7 */</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_2_0, DU0_DG2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, RTS1_C, SEL_SCIF1_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, RMII0_MDC_B, SEL_RMII_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, TIOC2A_A, SEL_MTU2_CH2_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_2_0, HIFD10),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_5_3, DU0_DG3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, SCK2_C, SEL_SCIF2_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, RMII0_MDIO_B, SEL_RMII_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, TIOC2B_A, SEL_MTU2_CH2_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_5_3, HIFD11),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_8_6, DU0_DG4),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_8_6, RX2_C, SEL_SCIF2_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_8_6, RMII0_CRS_DV_B, SEL_RMII_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_8_6, TIOC3A_A, SEL_MTU2_CH3_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_8_6, HIFD12),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_11_9, DU0_DG5),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_11_9, TX2_C, SEL_SCIF2_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_11_9, RMII0_RX_ER_B, SEL_RMII_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_11_9, TIOC3B_A, SEL_MTU2_CH3_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_11_9, HIFD13),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_14_12, DU0_DG6),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_14_12, RX3_C, SEL_SCIF3_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_14_12, RMII0_RXD0_B, SEL_RMII_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_14_12, TIOC3C_A, SEL_MTU2_CH3_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_14_12, HIFD14),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_17_15, DU0_DG7),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_17_15, TX3_C, SEL_SCIF3_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_17_15, RMII0_RXD1_B, SEL_RMII_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_17_15, TIOC3D_A, SEL_MTU2_CH3_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_17_15, HIFD15),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_20_18, DU0_DB0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_20_18, RX4_C, SEL_SCIF4_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_20_18, RMII0_TXD_EN_B, SEL_RMII_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_20_18, TIOC4A_A, SEL_MTU2_CH4_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_20_18, HIFCS),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_23_21, DU0_DB1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_23_21, TX4_C, SEL_SCIF4_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_23_21, RMII0_TXD0_B, SEL_RMII_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_23_21, TIOC4B_A, SEL_MTU2_CH4_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_23_21, HIFWR),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_26_24, DU0_DB2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_26_24, RX5_B, SEL_SCIF5_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_26_24, RMII0_TXD1_B, SEL_RMII_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_26_24, TIOC4C_A, SEL_MTU2_CH4_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_28_27, DU0_DB3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_28_27, TX5_B, SEL_SCIF5_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP7_28_27, TIOC4D_A, SEL_MTU2_CH4_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_28_27, HIFRD),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_30_29, DU0_DB4),</div><div class='add'>+	PINMUX_IPSR_DATA(IP7_30_29, HIFINT),</div><div class='add'>+</div><div class='add'>+	/* IPSR8 */</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_1_0, DU0_DB5),</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_1_0, HIFDREQ),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_3_2, DU0_DB6),</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_3_2, HIFRDY),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_5_4, DU0_DB7),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_5_4, SSI_SCK0_B, SEL_SSI0_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_5_4, HIFEBL_B, SEL_HIF_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_7_6, DU0_DOTCLKIN),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_7_6, HSPI_CS0_C, SEL_HSPI_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_7_6, SSI_WS0_B, SEL_SSI0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_9_8, DU0_DOTCLKOUT),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_9_8, HSPI_CLK0_C, SEL_HSPI_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_9_8, SSI_SDATA0_B, SEL_SSI0_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_11_10, DU0_EXHSYNC_DU0_HSYNC),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_11_10, HSPI_TX0_C, SEL_HSPI_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_11_10, SSI_SCK1_B, SEL_SSI1_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_13_12, DU0_EXVSYNC_DU0_VSYNC),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_13_12, HSPI_RX0_C, SEL_HSPI_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_13_12, SSI_WS1_B, SEL_SSI1_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_15_14, DU0_EXODDF_DU0_ODDF),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_15_14, CAN0_RX_B, SEL_RCAN0_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_15_14, HSCK0_B, SEL_HSCIF_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_15_14, SSI_SDATA1_B, SEL_SSI1_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_17_16, DU0_DISP),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_17_16, CAN0_TX_B, SEL_RCAN0_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_17_16, HRX0_B, SEL_HSCIF_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_17_16, AUDIO_CLKA_B, SEL_AUDIO_CLKA_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_19_18, DU0_CDE),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_19_18, HTX0_B, SEL_HSCIF_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_19_18, AUDIO_CLKB_B, SEL_AUDIO_CLKB_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_19_18, LCD_VCPWC_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_22_20, IRQ0_A, SEL_INTC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_22_20, HSPI_TX_B, SEL_HSPI_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_22_20, RX3_E, SEL_SCIF3_4),</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_22_20, ET0_ERXD0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_25_23, IRQ1_A, SEL_INTC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_25_23, HSPI_RX_B, SEL_HSPI_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_25_23, TX3_E, SEL_SCIF3_4),</div><div class='add'>+	PINMUX_IPSR_DATA(IP8_25_23, ET0_ERXD1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_27_26, IRQ2_A, SEL_INTC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_27_26, CTS0_A, SEL_SCIF0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_27_26, HCTS0_B, SEL_HSCIF_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_27_26, ET0_ERXD2_A, SEL_ET0_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_29_28, IRQ3_A, SEL_INTC_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_29_28, RTS0_A, SEL_SCIF0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_29_28, HRTS0_B, SEL_HSCIF_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP8_29_28, ET0_ERXD3_A, SEL_ET0_0),</div><div class='add'>+</div><div class='add'>+	/* IPSR9 */</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_1_0, VI1_CLK_A, SEL_VIN1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_1_0, FD0_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_1_0, LCD_DATA0_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_3_2, VI1_0_A, SEL_VIN1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_3_2, FD1_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_3_2, LCD_DATA1_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_5_4, VI1_1_A, SEL_VIN1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_5_4, FD2_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_5_4, LCD_DATA2_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_7_6, VI1_2_A, SEL_VIN1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_7_6, FD3_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_7_6, LCD_DATA3_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_9_8, VI1_3_A, SEL_VIN1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_9_8, FD4_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_9_8, LCD_DATA4_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_11_10, VI1_4_A, SEL_VIN1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_11_10, FD5_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_11_10, LCD_DATA5_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_13_12, VI1_5_A, SEL_VIN1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_13_12, FD6_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_13_12, LCD_DATA6_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_15_14, VI1_6_A, SEL_VIN1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_15_14, FD7_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_15_14, LCD_DATA7_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_17_16, VI1_7_A, SEL_VIN1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_17_16, FCE_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_17_16, LCD_DATA8_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_19_18, SSI_SCK0_A, SEL_SSI0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_19_18, TIOC1A_B, SEL_MTU2_CH1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_19_18, LCD_DATA9_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_21_20, SSI_WS0_A, SEL_SSI0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_21_20, TIOC1B_B, SEL_MTU2_CH1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_21_20, LCD_DATA10_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_23_22, SSI_SDATA0_A, SEL_SSI0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_23_22, VI1_0_B, SEL_VIN1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_23_22, TIOC2A_B, SEL_MTU2_CH2_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_23_22, LCD_DATA11_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_25_24, SSI_SCK1_A, SEL_SSI1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_25_24, VI1_1_B, SEL_VIN1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_25_24, TIOC2B_B, SEL_MTU2_CH2_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_25_24, LCD_DATA12_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_27_26, SSI_WS1_A, SEL_SSI1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_27_26, VI1_2_B, SEL_VIN1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_27_26, LCD_DATA13_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_29_28, SSI_SDATA1_A, SEL_SSI1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_29_28, VI1_3_B, SEL_VIN1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP9_29_28, LCD_DATA14_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	/* IPSE10 */</div><div class='add'>+	PINMUX_IPSR_DATA(IP10_2_0, SSI_SCK23),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_2_0, VI1_4_B, SEL_VIN1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_2_0, RX1_D, SEL_SCIF1_3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_2_0, FCLE_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_2_0, LCD_DATA15_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP10_5_3, SSI_WS23),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_5_3, VI1_5_B, SEL_VIN1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_5_3, TX1_D, SEL_SCIF1_3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_5_3, HSCK0_C, SEL_HSCIF_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_5_3, FALE_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_5_3, LCD_DON_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP10_8_6, SSI_SDATA2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_8_6, VI1_6_B, SEL_VIN1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_8_6, HRX0_C, SEL_HSCIF_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_8_6, FRE_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_8_6, LCD_CL1_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP10_11_9, SSI_SDATA3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_11_9, VI1_7_B, SEL_VIN1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_11_9, HTX0_C, SEL_HSCIF_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_11_9, FWE_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_11_9, LCD_CL2_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_14_12, AUDIO_CLKA_A, SEL_AUDIO_CLKA_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_14_12, VI1_CLK_B, SEL_VIN1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_14_12, SCK1_D, SEL_SCIF1_3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_14_12, IECLK_B, SEL_IEBUS_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_14_12, LCD_FLM_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_15, AUDIO_CLKB_A, SEL_AUDIO_CLKB_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_15, LCD_CLK_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP10_18_16, AUDIO_CLKC),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_18_16, SCK1_E, SEL_SCIF1_4),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_18_16, HCTS0_C, SEL_HSCIF_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_18_16, FRB_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_18_16, LCD_VEPWC_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP10_21_19, AUDIO_CLKOUT),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_21_19, TX1_E, SEL_SCIF1_4),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_21_19, HRTS0_C, SEL_HSCIF_2),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_21_19, FSE_B, SEL_FLCTL_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_21_19, LCD_M_DISP_B, SEL_LCDC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_22, CAN_CLK_A, SEL_RCAN_CLK_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_22, RX4_D, SEL_SCIF4_3),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_24_23, CAN0_TX_A, SEL_RCAN0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_24_23, TX4_D, SEL_SCIF4_3),</div><div class='add'>+	PINMUX_IPSR_DATA(IP10_24_23, MLB_CLK),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_25, CAN1_RX_A, SEL_RCAN1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_25, IRQ1_B, SEL_INTC_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_27_26, CAN0_RX_A, SEL_RCAN0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_27_26, IRQ0_B, SEL_INTC_1),</div><div class='add'>+	PINMUX_IPSR_DATA(IP10_27_26, MLB_SIG),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_29_28, CAN1_TX_A, SEL_RCAN1_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP10_29_28, TX5_C, SEL_SCIF1_2),</div><div class='add'>+	PINMUX_IPSR_DATA(IP10_29_28, MLB_DAT),</div><div class='add'>+</div><div class='add'>+	/* IPSR11 */</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_0, SCL1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_0, SCIF_CLK_C, SEL_SCIF_CLK_2),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_1, SDA1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_0, RX1_E, SEL_SCIF1_4),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_2, SDA0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_2, HIFEBL_A, SEL_HIF_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_3, SDSELF),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_3, RTS1_E, SEL_SCIF1_3),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_6_4, SCIF_CLK_A, SEL_SCIF_CLK_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_6_4, HSPI_CLK_A, SEL_HSPI_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_6_4, VI0_CLK),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_6_4, RMII0_TXD0_A, SEL_RMII_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_6_4, ET0_ERXD4),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_9_7, SCK0_A, SEL_SCIF0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_9_7, HSPI_CS_A, SEL_HSPI_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_9_7, VI0_CLKENB),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_9_7, RMII0_TXD1_A, SEL_RMII_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_9_7, ET0_ERXD5),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_11_10, RX0_A, SEL_SCIF0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_11_10, HSPI_RX_A, SEL_HSPI_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_11_10, RMII0_RXD0_A, SEL_RMII_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_11_10, ET0_ERXD6),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_12, TX0_A, SEL_SCIF0_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_12, HSPI_TX_A, SEL_HSPI_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_15_13, PENC1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_15_13, TX3_D, SEL_SCIF3_3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_15_13, CAN1_TX_B,  SEL_RCAN1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_15_13, TX5_D, SEL_SCIF5_3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_15_13, IETX_B, SEL_IEBUS_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_18_16, USB_OVC1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_18_16, RX3_D, SEL_SCIF3_3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_18_16, CAN1_RX_B, SEL_RCAN1_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_18_16, RX5_D, SEL_SCIF5_3),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_18_16, IERX_B, SEL_IEBUS_1),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_20_19, DREQ0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_20_19, SD1_CLK_A, SEL_SDHI1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_20_19, ET0_TX_EN),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_22_21, DACK0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_22_21, SD1_DAT3_A, SEL_SDHI1_0),</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_22_21, ET0_TX_ER),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_25_23, DREQ1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_25_23, HSPI_CLK_B, SEL_HSPI_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_25_23, RX4_B, SEL_SCIF4_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_25_23, ET0_PHY_INT_C, SEL_ET0_CTL_0),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_25_23, ET0_TX_CLK_A, SEL_ET0_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_27_26, DACK1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_27_26, HSPI_CS_B, SEL_HSPI_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_27_26, TX4_B, SEL_SCIF3_1),</div><div class='add'>+	PINMUX_IPSR_MODSEL_DATA(IP11_27_26, ET0_RX_CLK_A, SEL_ET0_0),</div><div class='add'>+</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_28, PRESETOUT),</div><div class='add'>+	PINMUX_IPSR_DATA(IP11_28, ST_CLKOUT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinmux_gpio pinmux_gpios[] = {</div><div class='add'>+	PINMUX_GPIO_GP_ALL(),</div><div class='add'>+</div><div class='add'>+	GPIO_FN(CLKOUT), GPIO_FN(BS), GPIO_FN(CS0), GPIO_FN(EX_CS0),</div><div class='add'>+	GPIO_FN(RD), GPIO_FN(WE0), GPIO_FN(WE1),</div><div class='add'>+	GPIO_FN(SCL0), GPIO_FN(PENC0), GPIO_FN(USB_OVC0),</div><div class='add'>+	GPIO_FN(IRQ2_B), GPIO_FN(IRQ3_B),</div><div class='add'>+</div><div class='add'>+	/* IPSR0 */</div><div class='add'>+	GPIO_FN(A0), GPIO_FN(ST0_CLKIN), GPIO_FN(LCD_DATA0_A),</div><div class='add'>+	GPIO_FN(TCLKA_C),</div><div class='add'>+	GPIO_FN(A1), GPIO_FN(ST0_REQ), GPIO_FN(LCD_DATA1_A),</div><div class='add'>+	GPIO_FN(TCLKB_C),</div><div class='add'>+	GPIO_FN(A2), GPIO_FN(ST0_SYC), GPIO_FN(LCD_DATA2_A),</div><div class='add'>+	GPIO_FN(TCLKC_C),</div><div class='add'>+	GPIO_FN(A3), GPIO_FN(ST0_VLD), GPIO_FN(LCD_DATA3_A),</div><div class='add'>+	GPIO_FN(TCLKD_C),</div><div class='add'>+	GPIO_FN(A4), GPIO_FN(ST0_D0), GPIO_FN(LCD_DATA4_A),</div><div class='add'>+	GPIO_FN(TIOC0A_C),</div><div class='add'>+	GPIO_FN(A5), GPIO_FN(ST0_D1), GPIO_FN(LCD_DATA5_A),</div><div class='add'>+	GPIO_FN(TIOC0B_C),</div><div class='add'>+	GPIO_FN(A6), GPIO_FN(ST0_D2), GPIO_FN(LCD_DATA6_A),</div><div class='add'>+	GPIO_FN(TIOC0C_C),</div><div class='add'>+	GPIO_FN(A7), GPIO_FN(ST0_D3), GPIO_FN(LCD_DATA7_A),</div><div class='add'>+	GPIO_FN(TIOC0D_C),</div><div class='add'>+	GPIO_FN(A8), GPIO_FN(ST0_D4), GPIO_FN(LCD_DATA8_A),</div><div class='add'>+	GPIO_FN(TIOC1A_C),</div><div class='add'>+	GPIO_FN(A9), GPIO_FN(ST0_D5), GPIO_FN(LCD_DATA9_A),</div><div class='add'>+	GPIO_FN(TIOC1B_C),</div><div class='add'>+	GPIO_FN(A10), GPIO_FN(ST0_D6), GPIO_FN(LCD_DATA10_A),</div><div class='add'>+	GPIO_FN(TIOC2A_C),</div><div class='add'>+	GPIO_FN(A11), GPIO_FN(ST0_D7), GPIO_FN(LCD_DATA11_A),</div><div class='add'>+	GPIO_FN(TIOC2B_C),</div><div class='add'>+	GPIO_FN(A12), GPIO_FN(LCD_DATA12_A), GPIO_FN(TIOC3A_C),</div><div class='add'>+	GPIO_FN(A13), GPIO_FN(LCD_DATA13_A), GPIO_FN(TIOC3B_C),</div><div class='add'>+	GPIO_FN(A14), GPIO_FN(LCD_DATA14_A), GPIO_FN(TIOC3C_C),</div><div class='add'>+	GPIO_FN(A15), GPIO_FN(ST0_VCO_CLKIN), GPIO_FN(LCD_DATA15_A),</div><div class='add'>+	GPIO_FN(TIOC3D_C),</div><div class='add'>+</div><div class='add'>+	/* IPSR1 */</div><div class='add'>+	GPIO_FN(A16), GPIO_FN(ST0_PWM), GPIO_FN(LCD_DON_A),</div><div class='add'>+	GPIO_FN(TIOC4A_C),</div><div class='add'>+	GPIO_FN(A17), GPIO_FN(ST1_VCO_CLKIN), GPIO_FN(LCD_CL1_A),</div><div class='add'>+	GPIO_FN(TIOC4B_C),</div><div class='add'>+	GPIO_FN(A18), GPIO_FN(ST1_PWM), GPIO_FN(LCD_CL2_A),</div><div class='add'>+	GPIO_FN(TIOC4C_C),</div><div class='add'>+	GPIO_FN(A19), GPIO_FN(ST1_CLKIN), GPIO_FN(LCD_CLK_A),</div><div class='add'>+	GPIO_FN(TIOC4D_C),</div><div class='add'>+	GPIO_FN(A20), GPIO_FN(ST1_REQ), GPIO_FN(LCD_FLM_A),</div><div class='add'>+	GPIO_FN(A21), GPIO_FN(ST1_SYC), GPIO_FN(LCD_VCPWC_A),</div><div class='add'>+	GPIO_FN(A22), GPIO_FN(ST1_VLD), GPIO_FN(LCD_VEPWC_A),</div><div class='add'>+	GPIO_FN(A23), GPIO_FN(ST1_D0), GPIO_FN(LCD_M_DISP_A),</div><div class='add'>+	GPIO_FN(A24), GPIO_FN(RX2_D), GPIO_FN(ST1_D1),</div><div class='add'>+	GPIO_FN(A25), GPIO_FN(TX2_D), GPIO_FN(ST1_D2),</div><div class='add'>+	GPIO_FN(D0), GPIO_FN(SD0_DAT0_A), GPIO_FN(MMC_D0_A),</div><div class='add'>+	GPIO_FN(ST1_D3), GPIO_FN(FD0_A),</div><div class='add'>+	GPIO_FN(D1), GPIO_FN(SD0_DAT1_A), GPIO_FN(MMC_D1_A),</div><div class='add'>+	GPIO_FN(ST1_D4), GPIO_FN(FD1_A),</div><div class='add'>+	GPIO_FN(D2), GPIO_FN(SD0_DAT2_A), GPIO_FN(MMC_D2_A),</div><div class='add'>+	GPIO_FN(ST1_D5), GPIO_FN(FD2_A),</div><div class='add'>+	GPIO_FN(D3), GPIO_FN(SD0_DAT3_A), GPIO_FN(MMC_D3_A),</div><div class='add'>+	GPIO_FN(ST1_D6), GPIO_FN(FD3_A),</div><div class='add'>+</div><div class='add'>+	/* IPSR2 */</div><div class='add'>+	GPIO_FN(D4), GPIO_FN(SD0_CD_A), GPIO_FN(MMC_D4_A), GPIO_FN(ST1_D7),</div><div class='add'>+	GPIO_FN(FD4_A),</div><div class='add'>+	GPIO_FN(D5), GPIO_FN(SD0_WP_A), GPIO_FN(MMC_D5_A), GPIO_FN(FD5_A),</div><div class='add'>+	GPIO_FN(D6), GPIO_FN(RSPI_RSPCK_A), GPIO_FN(MMC_D6_A),</div><div class='add'>+		GPIO_FN(QSPCLK_A),</div><div class='add'>+	GPIO_FN(FD6_A),</div><div class='add'>+	GPIO_FN(D7), GPIO_FN(RSPI_SSL_A), GPIO_FN(MMC_D7_A), GPIO_FN(QSSL_A),</div><div class='add'>+	GPIO_FN(FD7_A),</div><div class='add'>+	GPIO_FN(D8), GPIO_FN(SD0_CLK_A), GPIO_FN(MMC_CLK_A), GPIO_FN(QIO2_A),</div><div class='add'>+	GPIO_FN(FCE_A), GPIO_FN(ET0_GTX_CLK_B),</div><div class='add'>+	GPIO_FN(D9), GPIO_FN(SD0_CMD_A), GPIO_FN(MMC_CMD_A), GPIO_FN(QIO3_A),</div><div class='add'>+	GPIO_FN(FCLE_A), GPIO_FN(ET0_ETXD1_B),</div><div class='add'>+	GPIO_FN(D10), GPIO_FN(RSPI_MOSI_A), GPIO_FN(QMO_QIO0_A),</div><div class='add'>+		GPIO_FN(FALE_A), GPIO_FN(ET0_ETXD2_B),</div><div class='add'>+	GPIO_FN(D11), GPIO_FN(RSPI_MISO_A), GPIO_FN(QMI_QIO1_A), GPIO_FN(FRE_A),</div><div class='add'>+		GPIO_FN(ET0_ETXD3_B),</div><div class='add'>+	GPIO_FN(D12), GPIO_FN(FWE_A), GPIO_FN(ET0_ETXD5_B),</div><div class='add'>+	GPIO_FN(D13), GPIO_FN(RX2_B), GPIO_FN(FRB_A), GPIO_FN(ET0_ETXD6_B),</div><div class='add'>+	GPIO_FN(D14), GPIO_FN(TX2_B), GPIO_FN(FSE_A), GPIO_FN(ET0_TX_CLK_B),</div><div class='add'>+</div><div class='add'>+	/* IPSR3 */</div><div class='add'>+	GPIO_FN(D15), GPIO_FN(SCK2_B),</div><div class='add'>+	GPIO_FN(CS1_A26), GPIO_FN(QIO3_B),</div><div class='add'>+	GPIO_FN(EX_CS1), GPIO_FN(RX3_B), GPIO_FN(ATACS0), GPIO_FN(QIO2_B),</div><div class='add'>+	GPIO_FN(ET0_ETXD0),</div><div class='add'>+	GPIO_FN(EX_CS2), GPIO_FN(TX3_B), GPIO_FN(ATACS1), GPIO_FN(QSPCLK_B),</div><div class='add'>+	GPIO_FN(ET0_GTX_CLK_A),</div><div class='add'>+	GPIO_FN(EX_CS3), GPIO_FN(SD1_CD_A), GPIO_FN(ATARD), GPIO_FN(QMO_QIO0_B),</div><div class='add'>+	GPIO_FN(ET0_ETXD1_A),</div><div class='add'>+	GPIO_FN(EX_CS4), GPIO_FN(SD1_WP_A), GPIO_FN(ATAWR), GPIO_FN(QMI_QIO1_B),</div><div class='add'>+	GPIO_FN(ET0_ETXD2_A),</div><div class='add'>+	GPIO_FN(EX_CS5), GPIO_FN(SD1_CMD_A), GPIO_FN(ATADIR), GPIO_FN(QSSL_B),</div><div class='add'>+	GPIO_FN(ET0_ETXD3_A),</div><div class='add'>+	GPIO_FN(RD_WR), GPIO_FN(TCLK1_B),</div><div class='add'>+	GPIO_FN(EX_WAIT0), GPIO_FN(TCLK1_B),</div><div class='add'>+	GPIO_FN(EX_WAIT1), GPIO_FN(SD1_DAT0_A), GPIO_FN(DREQ2),</div><div class='add'>+		GPIO_FN(CAN1_TX_C), GPIO_FN(ET0_LINK_C), GPIO_FN(ET0_ETXD5_A),</div><div class='add'>+	GPIO_FN(EX_WAIT2), GPIO_FN(SD1_DAT1_A), GPIO_FN(DACK2),</div><div class='add'>+		GPIO_FN(CAN1_RX_C), GPIO_FN(ET0_MAGIC_C), GPIO_FN(ET0_ETXD6_A),</div><div class='add'>+	GPIO_FN(DRACK0), GPIO_FN(SD1_DAT2_A), GPIO_FN(ATAG), GPIO_FN(TCLK1_A),</div><div class='add'>+	GPIO_FN(ET0_ETXD7),</div><div class='add'>+</div><div class='add'>+	/* IPSR4 */</div><div class='add'>+	GPIO_FN(HCTS0_A), GPIO_FN(CTS1_A), GPIO_FN(VI0_FIELD),</div><div class='add'>+		GPIO_FN(RMII0_RXD1_A), GPIO_FN(ET0_ERXD7),</div><div class='add'>+	GPIO_FN(HRTS0_A), GPIO_FN(RTS1_A), GPIO_FN(VI0_HSYNC),</div><div class='add'>+		GPIO_FN(RMII0_TXD_EN_A), GPIO_FN(ET0_RX_DV),</div><div class='add'>+	GPIO_FN(HSCK0_A), GPIO_FN(SCK1_A), GPIO_FN(VI0_VSYNC),</div><div class='add'>+		GPIO_FN(RMII0_RX_ER_A), GPIO_FN(ET0_RX_ER),</div><div class='add'>+	GPIO_FN(HRX0_A), GPIO_FN(RX1_A), GPIO_FN(VI0_DATA0_VI0_B0),</div><div class='add'>+		GPIO_FN(RMII0_CRS_DV_A), GPIO_FN(ET0_CRS),</div><div class='add'>+	GPIO_FN(HTX0_A), GPIO_FN(TX1_A), GPIO_FN(VI0_DATA1_VI0_B1),</div><div class='add'>+		GPIO_FN(RMII0_MDC_A), GPIO_FN(ET0_COL),</div><div class='add'>+	GPIO_FN(CTS0_B), GPIO_FN(VI0_DATA2_VI0_B2), GPIO_FN(RMII0_MDIO_A),</div><div class='add'>+		GPIO_FN(ET0_MDC),</div><div class='add'>+	GPIO_FN(RTS0_B), GPIO_FN(VI0_DATA3_VI0_B3), GPIO_FN(ET0_MDIO_A),</div><div class='add'>+	GPIO_FN(SCK1_B), GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(ET0_LINK_A),</div><div class='add'>+	GPIO_FN(RX1_B), GPIO_FN(VI0_DATA5_VI0_B5), GPIO_FN(ET0_MAGIC_A),</div><div class='add'>+	GPIO_FN(TX1_B), GPIO_FN(VI0_DATA6_VI0_G0), GPIO_FN(ET0_PHY_INT_A),</div><div class='add'>+	GPIO_FN(CTS1_B), GPIO_FN(VI0_DATA7_VI0_G1),</div><div class='add'>+	GPIO_FN(RTS1_B), GPIO_FN(VI0_G2),</div><div class='add'>+	GPIO_FN(SCK2_A), GPIO_FN(VI0_G3),</div><div class='add'>+</div><div class='add'>+	/* IPSR5 */</div><div class='add'>+	GPIO_FN(REF50CK), GPIO_FN(CTS1_E), GPIO_FN(HCTS0_D),</div><div class='add'>+	GPIO_FN(REF125CK), GPIO_FN(ADTRG), GPIO_FN(RX5_C),</div><div class='add'>+	GPIO_FN(SD2_WP_A), GPIO_FN(TX5_A), GPIO_FN(VI0_R5),</div><div class='add'>+	GPIO_FN(SD2_CD_A), GPIO_FN(RX5_A), GPIO_FN(VI0_R4),</div><div class='add'>+		GPIO_FN(ET0_PHY_INT_B),</div><div class='add'>+	GPIO_FN(SD2_DAT3_A), GPIO_FN(TX4_A), GPIO_FN(VI0_R3),</div><div class='add'>+		GPIO_FN(ET0_MAGIC_B),</div><div class='add'>+	GPIO_FN(SD2_DAT2_A), GPIO_FN(RX4_A), GPIO_FN(VI0_R2),</div><div class='add'>+		GPIO_FN(ET0_LINK_B),</div><div class='add'>+	GPIO_FN(SD2_DAT1_A), GPIO_FN(TX3_A), GPIO_FN(VI0_R1),</div><div class='add'>+		GPIO_FN(ET0_MDIO_B),</div><div class='add'>+	GPIO_FN(SD2_DAT0_A), GPIO_FN(RX3_A), GPIO_FN(VI0_R0),</div><div class='add'>+		GPIO_FN(ET0_ERXD3_B),</div><div class='add'>+	GPIO_FN(SD2_CMD_A), GPIO_FN(TX2_A), GPIO_FN(VI0_G5),</div><div class='add'>+		GPIO_FN(ET0_ERXD2_B),</div><div class='add'>+	GPIO_FN(SD2_CLK_A), GPIO_FN(RX2_A), GPIO_FN(VI0_G4),</div><div class='add'>+		GPIO_FN(ET0_RX_CLK_B),</div><div class='add'>+</div><div class='add'>+	/* IPSR6 */</div><div class='add'>+	GPIO_FN(DU0_DG1), GPIO_FN(CTS1_C), GPIO_FN(HRTS0_D),</div><div class='add'>+		GPIO_FN(TIOC1B_A), GPIO_FN(HIFD09),</div><div class='add'>+	GPIO_FN(DU0_DG0), GPIO_FN(TX1_C), GPIO_FN(HSCK0_D),</div><div class='add'>+		GPIO_FN(IECLK_A), GPIO_FN(TIOC1A_A), GPIO_FN(HIFD08),</div><div class='add'>+	GPIO_FN(DU0_DR7), GPIO_FN(RX1_C), GPIO_FN(TIOC0D_A),</div><div class='add'>+		GPIO_FN(HIFD07),</div><div class='add'>+	GPIO_FN(DU0_DR6), GPIO_FN(SCK1_C), GPIO_FN(TIOC0C_A),</div><div class='add'>+		GPIO_FN(HIFD06),</div><div class='add'>+	GPIO_FN(DU0_DR5), GPIO_FN(RTS0_C), GPIO_FN(TIOC0B_A),</div><div class='add'>+		GPIO_FN(HIFD05),</div><div class='add'>+	GPIO_FN(DU0_DR4), GPIO_FN(CTS0_C), GPIO_FN(TIOC0A_A),</div><div class='add'>+		GPIO_FN(HIFD04),</div><div class='add'>+	GPIO_FN(DU0_DR3), GPIO_FN(TX0_B), GPIO_FN(TCLKD_A), GPIO_FN(HIFD03),</div><div class='add'>+	GPIO_FN(DU0_DR2), GPIO_FN(RX0_B), GPIO_FN(TCLKC_A), GPIO_FN(HIFD02),</div><div class='add'>+	GPIO_FN(DU0_DR1), GPIO_FN(SCK0_B), GPIO_FN(HTX0_D),</div><div class='add'>+		GPIO_FN(IERX_A), GPIO_FN(TCLKB_A), GPIO_FN(HIFD01),</div><div class='add'>+	GPIO_FN(DU0_DR0), GPIO_FN(SCIF_CLK_B), GPIO_FN(HRX0_D),</div><div class='add'>+		GPIO_FN(IETX_A), GPIO_FN(TCLKA_A), GPIO_FN(HIFD00),</div><div class='add'>+</div><div class='add'>+	/* IPSR7 */</div><div class='add'>+	GPIO_FN(DU0_DB4), GPIO_FN(HIFINT),</div><div class='add'>+	GPIO_FN(DU0_DB3), GPIO_FN(TX5_B), GPIO_FN(TIOC4D_A), GPIO_FN(HIFRD),</div><div class='add'>+	GPIO_FN(DU0_DB2), GPIO_FN(RX5_B), GPIO_FN(RMII0_TXD1_B),</div><div class='add'>+		GPIO_FN(TIOC4C_A), GPIO_FN(HIFWR),</div><div class='add'>+	GPIO_FN(DU0_DB1), GPIO_FN(TX4_C), GPIO_FN(RMII0_TXD0_B),</div><div class='add'>+		GPIO_FN(TIOC4B_A), GPIO_FN(HIFRS),</div><div class='add'>+	GPIO_FN(DU0_DB0), GPIO_FN(RX4_C), GPIO_FN(RMII0_TXD_EN_B),</div><div class='add'>+		GPIO_FN(TIOC4A_A), GPIO_FN(HIFCS),</div><div class='add'>+	GPIO_FN(DU0_DG7), GPIO_FN(TX3_C), GPIO_FN(RMII0_RXD1_B),</div><div class='add'>+		GPIO_FN(TIOC3D_A), GPIO_FN(HIFD15),</div><div class='add'>+	GPIO_FN(DU0_DG6), GPIO_FN(RX3_C), GPIO_FN(RMII0_RXD0_B),</div><div class='add'>+		GPIO_FN(TIOC3C_A), GPIO_FN(HIFD14),</div><div class='add'>+	GPIO_FN(DU0_DG5), GPIO_FN(TX2_C), GPIO_FN(RMII0_RX_ER_B),</div><div class='add'>+		GPIO_FN(TIOC3B_A), GPIO_FN(HIFD13),</div><div class='add'>+	GPIO_FN(DU0_DG4), GPIO_FN(RX2_C), GPIO_FN(RMII0_CRS_DV_B),</div><div class='add'>+		GPIO_FN(TIOC3A_A), GPIO_FN(HIFD12),</div><div class='add'>+	GPIO_FN(DU0_DG3), GPIO_FN(SCK2_C), GPIO_FN(RMII0_MDIO_B),</div><div class='add'>+		GPIO_FN(TIOC2B_A), GPIO_FN(HIFD11),</div><div class='add'>+	GPIO_FN(DU0_DG2), GPIO_FN(RTS1_C), GPIO_FN(RMII0_MDC_B),</div><div class='add'>+		GPIO_FN(TIOC2A_A), GPIO_FN(HIFD10),</div><div class='add'>+</div><div class='add'>+	/* IPSR8 */</div><div class='add'>+	GPIO_FN(IRQ3_A), GPIO_FN(RTS0_A), GPIO_FN(HRTS0_B),</div><div class='add'>+		GPIO_FN(ET0_ERXD3_A),</div><div class='add'>+	GPIO_FN(IRQ2_A), GPIO_FN(CTS0_A), GPIO_FN(HCTS0_B),</div><div class='add'>+		GPIO_FN(ET0_ERXD2_A),</div><div class='add'>+	GPIO_FN(IRQ1_A), GPIO_FN(HSPI_RX_B), GPIO_FN(TX3_E),</div><div class='add'>+		GPIO_FN(ET0_ERXD1),</div><div class='add'>+	GPIO_FN(IRQ0_A), GPIO_FN(HSPI_TX_B), GPIO_FN(RX3_E),</div><div class='add'>+		GPIO_FN(ET0_ERXD0),</div><div class='add'>+	GPIO_FN(DU0_CDE), GPIO_FN(HTX0_B), GPIO_FN(AUDIO_CLKB_B),</div><div class='add'>+		GPIO_FN(LCD_VCPWC_B),</div><div class='add'>+	GPIO_FN(DU0_DISP), GPIO_FN(CAN0_TX_B), GPIO_FN(HRX0_B),</div><div class='add'>+		GPIO_FN(AUDIO_CLKA_B),</div><div class='add'>+	GPIO_FN(DU0_EXODDF_DU0_ODDF), GPIO_FN(CAN0_RX_B), GPIO_FN(HSCK0_B),</div><div class='add'>+		GPIO_FN(SSI_SDATA1_B),</div><div class='add'>+	GPIO_FN(DU0_EXVSYNC_DU0_VSYNC), GPIO_FN(HSPI_RX0_C),</div><div class='add'>+		GPIO_FN(SSI_WS1_B),</div><div class='add'>+	GPIO_FN(DU0_EXHSYNC_DU0_HSYNC), GPIO_FN(HSPI_TX0_C),</div><div class='add'>+		GPIO_FN(SSI_SCK1_B),</div><div class='add'>+	GPIO_FN(DU0_DOTCLKOUT), GPIO_FN(HSPI_CLK0_C),</div><div class='add'>+		GPIO_FN(SSI_SDATA0_B),</div><div class='add'>+	GPIO_FN(DU0_DOTCLKIN), GPIO_FN(HSPI_CS0_C),</div><div class='add'>+		GPIO_FN(SSI_WS0_B),</div><div class='add'>+	GPIO_FN(DU0_DB7), GPIO_FN(SSI_SCK0_B), GPIO_FN(HIFEBL_B),</div><div class='add'>+	GPIO_FN(DU0_DB6), GPIO_FN(HIFRDY),</div><div class='add'>+	GPIO_FN(DU0_DB5), GPIO_FN(HIFDREQ),</div><div class='add'>+</div><div class='add'>+	/* IPSR9 */</div><div class='add'>+	GPIO_FN(SSI_SDATA1_A), GPIO_FN(VI1_3_B), GPIO_FN(LCD_DATA14_B),</div><div class='add'>+	GPIO_FN(SSI_WS1_A), GPIO_FN(VI1_2_B), GPIO_FN(LCD_DATA13_B),</div><div class='add'>+	GPIO_FN(SSI_SCK1_A), GPIO_FN(VI1_1_B), GPIO_FN(TIOC2B_B),</div><div class='add'>+		GPIO_FN(LCD_DATA12_B),</div><div class='add'>+	GPIO_FN(SSI_SDATA0_A), GPIO_FN(VI1_0_B), GPIO_FN(TIOC2A_B),</div><div class='add'>+		GPIO_FN(LCD_DATA11_B),</div><div class='add'>+	GPIO_FN(SSI_WS0_A), GPIO_FN(TIOC1B_B), GPIO_FN(LCD_DATA10_B),</div><div class='add'>+	GPIO_FN(SSI_SCK0_A), GPIO_FN(TIOC1A_B), GPIO_FN(LCD_DATA9_B),</div><div class='add'>+	GPIO_FN(VI1_7_A), GPIO_FN(FCE_B), GPIO_FN(LCD_DATA8_B),</div><div class='add'>+	GPIO_FN(VI1_6_A), GPIO_FN(FD7_B), GPIO_FN(LCD_DATA7_B),</div><div class='add'>+	GPIO_FN(VI1_5_A), GPIO_FN(FD6_B), GPIO_FN(LCD_DATA6_B),</div><div class='add'>+	GPIO_FN(VI1_4_A), GPIO_FN(FD5_B), GPIO_FN(LCD_DATA5_B),</div><div class='add'>+	GPIO_FN(VI1_3_A), GPIO_FN(FD4_B), GPIO_FN(LCD_DATA4_B),</div><div class='add'>+	GPIO_FN(VI1_2_A), GPIO_FN(FD3_B), GPIO_FN(LCD_DATA3_B),</div><div class='add'>+	GPIO_FN(VI1_1_A), GPIO_FN(FD2_B), GPIO_FN(LCD_DATA2_B),</div><div class='add'>+	GPIO_FN(VI1_0_A), GPIO_FN(FD1_B), GPIO_FN(LCD_DATA1_B),</div><div class='add'>+	GPIO_FN(VI1_CLK_A), GPIO_FN(FD0_B), GPIO_FN(LCD_DATA0_B),</div><div class='add'>+</div><div class='add'>+	/* IPSR10 */</div><div class='add'>+	GPIO_FN(CAN1_TX_A), GPIO_FN(TX5_C), GPIO_FN(MLB_DAT),</div><div class='add'>+	GPIO_FN(CAN0_RX_A), GPIO_FN(IRQ0_B), GPIO_FN(MLB_SIG),</div><div class='add'>+	GPIO_FN(CAN1_RX_A), GPIO_FN(IRQ1_B),</div><div class='add'>+	GPIO_FN(CAN0_TX_A), GPIO_FN(TX4_D), GPIO_FN(MLB_CLK),</div><div class='add'>+	GPIO_FN(CAN_CLK_A), GPIO_FN(RX4_D),</div><div class='add'>+	GPIO_FN(AUDIO_CLKOUT), GPIO_FN(TX1_E), GPIO_FN(HRTS0_C),</div><div class='add'>+		GPIO_FN(FSE_B), GPIO_FN(LCD_M_DISP_B),</div><div class='add'>+	GPIO_FN(AUDIO_CLKC), GPIO_FN(SCK1_E), GPIO_FN(HCTS0_C),</div><div class='add'>+		GPIO_FN(FRB_B), GPIO_FN(LCD_VEPWC_B),</div><div class='add'>+	GPIO_FN(AUDIO_CLKB_A), GPIO_FN(LCD_CLK_B),</div><div class='add'>+	GPIO_FN(AUDIO_CLKA_A), GPIO_FN(VI1_CLK_B), GPIO_FN(SCK1_D),</div><div class='add'>+		GPIO_FN(IECLK_B), GPIO_FN(LCD_FLM_B),</div><div class='add'>+	GPIO_FN(SSI_SDATA3), GPIO_FN(VI1_7_B), GPIO_FN(HTX0_C),</div><div class='add'>+		GPIO_FN(FWE_B), GPIO_FN(LCD_CL2_B),</div><div class='add'>+	GPIO_FN(SSI_SDATA2), GPIO_FN(VI1_6_B), GPIO_FN(HRX0_C),</div><div class='add'>+		GPIO_FN(FRE_B), GPIO_FN(LCD_CL1_B),</div><div class='add'>+	GPIO_FN(SSI_WS23), GPIO_FN(VI1_5_B), GPIO_FN(TX1_D),</div><div class='add'>+		GPIO_FN(HSCK0_C), GPIO_FN(FALE_B), GPIO_FN(LCD_DON_B),</div><div class='add'>+	GPIO_FN(SSI_SCK23), GPIO_FN(VI1_4_B), GPIO_FN(RX1_D),</div><div class='add'>+		GPIO_FN(FCLE_B), GPIO_FN(LCD_DATA15_B),</div><div class='add'>+</div><div class='add'>+	/* IPSR11 */</div><div class='add'>+	GPIO_FN(PRESETOUT), GPIO_FN(ST_CLKOUT),</div><div class='add'>+	GPIO_FN(DACK1), GPIO_FN(HSPI_CS_B), GPIO_FN(TX4_B),</div><div class='add'>+		GPIO_FN(ET0_RX_CLK_A),</div><div class='add'>+	GPIO_FN(DREQ1), GPIO_FN(HSPI_CLK_B), GPIO_FN(RX4_B),</div><div class='add'>+		GPIO_FN(ET0_PHY_INT_C), GPIO_FN(ET0_TX_CLK_A),</div><div class='add'>+	GPIO_FN(DACK0), GPIO_FN(SD1_DAT3_A), GPIO_FN(ET0_TX_ER),</div><div class='add'>+	GPIO_FN(DREQ0), GPIO_FN(SD1_CLK_A), GPIO_FN(ET0_TX_EN),</div><div class='add'>+	GPIO_FN(USB_OVC1), GPIO_FN(RX3_D), GPIO_FN(CAN1_RX_B),</div><div class='add'>+		GPIO_FN(RX5_D), GPIO_FN(IERX_B),</div><div class='add'>+	GPIO_FN(PENC1), GPIO_FN(TX3_D), GPIO_FN(CAN1_TX_B),</div><div class='add'>+		GPIO_FN(TX5_D), GPIO_FN(IETX_B),</div><div class='add'>+	GPIO_FN(TX0_A), GPIO_FN(HSPI_TX_A),</div><div class='add'>+	GPIO_FN(RX0_A), GPIO_FN(HSPI_RX_A), GPIO_FN(RMII0_RXD0_A),</div><div class='add'>+		GPIO_FN(ET0_ERXD6),</div><div class='add'>+	GPIO_FN(SCK0_A), GPIO_FN(HSPI_CS_A), GPIO_FN(VI0_CLKENB),</div><div class='add'>+		GPIO_FN(RMII0_TXD1_A), GPIO_FN(ET0_ERXD5),</div><div class='add'>+	GPIO_FN(SCIF_CLK_A), GPIO_FN(HSPI_CLK_A), GPIO_FN(VI0_CLK),</div><div class='add'>+		GPIO_FN(RMII0_TXD0_A), GPIO_FN(ET0_ERXD4),</div><div class='add'>+	GPIO_FN(SDSELF), GPIO_FN(RTS1_E),</div><div class='add'>+	GPIO_FN(SDA0), GPIO_FN(HIFEBL_A),</div><div class='add'>+	GPIO_FN(SDA1), GPIO_FN(RX1_E),</div><div class='add'>+	GPIO_FN(SCL1), GPIO_FN(SCIF_CLK_C),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinmux_cfg_reg pinmux_config_regs[] = {</div><div class='add'>+	{ PINMUX_CFG_REG("GPSR0", 0xFFFC0004, 32, 1) {</div><div class='add'>+		GP_0_31_FN, FN_IP2_2_0,</div><div class='add'>+		GP_0_30_FN, FN_IP1_31_29,</div><div class='add'>+		GP_0_29_FN, FN_IP1_28_26,</div><div class='add'>+		GP_0_28_FN, FN_IP1_25_23,</div><div class='add'>+		GP_0_27_FN, FN_IP1_22_20,</div><div class='add'>+		GP_0_26_FN, FN_IP1_19_18,</div><div class='add'>+		GP_0_25_FN, FN_IP1_17_16,</div><div class='add'>+		GP_0_24_FN, FN_IP0_5_4,</div><div class='add'>+		GP_0_23_FN, FN_IP0_3_2,</div><div class='add'>+		GP_0_22_FN, FN_IP0_1_0,</div><div class='add'>+		GP_0_21_FN, FN_IP11_28,</div><div class='add'>+		GP_0_20_FN, FN_IP1_7_6,</div><div class='add'>+		GP_0_19_FN, FN_IP1_5_4,</div><div class='add'>+		GP_0_18_FN, FN_IP1_3_2,</div><div class='add'>+		GP_0_17_FN, FN_IP1_1_0,</div><div class='add'>+		GP_0_16_FN, FN_IP0_31_30,</div><div class='add'>+		GP_0_15_FN, FN_IP0_29_28,</div><div class='add'>+		GP_0_14_FN, FN_IP0_27_26,</div><div class='add'>+		GP_0_13_FN, FN_IP0_25_24,</div><div class='add'>+		GP_0_12_FN, FN_IP0_23_22,</div><div class='add'>+		GP_0_11_FN, FN_IP0_21_20,</div><div class='add'>+		GP_0_10_FN, FN_IP0_19_18,</div><div class='add'>+		GP_0_9_FN, FN_IP0_17_16,</div><div class='add'>+		GP_0_8_FN, FN_IP0_15_14,</div><div class='add'>+		GP_0_7_FN, FN_IP0_13_12,</div><div class='add'>+		GP_0_6_FN, FN_IP0_11_10,</div><div class='add'>+		GP_0_5_FN, FN_IP0_9_8,</div><div class='add'>+		GP_0_4_FN, FN_IP0_7_6,</div><div class='add'>+		GP_0_3_FN, FN_IP1_15_14,</div><div class='add'>+		GP_0_2_FN, FN_IP1_13_12,</div><div class='add'>+		GP_0_1_FN, FN_IP1_11_10,</div><div class='add'>+		GP_0_0_FN, FN_IP1_9_8 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("GPSR1", 0xFFFC0008, 32, 1) {</div><div class='add'>+		GP_1_31_FN, FN_IP11_25_23,</div><div class='add'>+		GP_1_30_FN, FN_IP2_13_11,</div><div class='add'>+		GP_1_29_FN, FN_IP2_10_8,</div><div class='add'>+		GP_1_28_FN, FN_IP2_7_5,</div><div class='add'>+		GP_1_27_FN, FN_IP3_26_24,</div><div class='add'>+		GP_1_26_FN, FN_IP3_23_21,</div><div class='add'>+		GP_1_25_FN, FN_IP2_4_3,</div><div class='add'>+		GP_1_24_FN, FN_WE1,</div><div class='add'>+		GP_1_23_FN, FN_WE0,</div><div class='add'>+		GP_1_22_FN, FN_IP3_19_18,</div><div class='add'>+		GP_1_21_FN, FN_RD,</div><div class='add'>+		GP_1_20_FN, FN_IP3_17_15,</div><div class='add'>+		GP_1_19_FN, FN_IP3_14_12,</div><div class='add'>+		GP_1_18_FN, FN_IP3_11_9,</div><div class='add'>+		GP_1_17_FN, FN_IP3_8_6,</div><div class='add'>+		GP_1_16_FN, FN_IP3_5_3,</div><div class='add'>+		GP_1_15_FN, FN_EX_CS0,</div><div class='add'>+		GP_1_14_FN, FN_IP3_2,</div><div class='add'>+		GP_1_13_FN, FN_CS0,</div><div class='add'>+		GP_1_12_FN, FN_BS,</div><div class='add'>+		GP_1_11_FN, FN_CLKOUT,</div><div class='add'>+		GP_1_10_FN, FN_IP3_1_0,</div><div class='add'>+		GP_1_9_FN, FN_IP2_30_28,</div><div class='add'>+		GP_1_8_FN, FN_IP2_27_25,</div><div class='add'>+		GP_1_7_FN, FN_IP2_24_23,</div><div class='add'>+		GP_1_6_FN, FN_IP2_22_20,</div><div class='add'>+		GP_1_5_FN, FN_IP2_19_17,</div><div class='add'>+		GP_1_4_FN, FN_IP2_16_14,</div><div class='add'>+		GP_1_3_FN, FN_IP11_22_21,</div><div class='add'>+		GP_1_2_FN, FN_IP11_20_19,</div><div class='add'>+		GP_1_1_FN, FN_IP3_29_27,</div><div class='add'>+		GP_1_0_FN, FN_IP3_20 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("GPSR2", 0xFFFC000C, 32, 1) {</div><div class='add'>+		GP_2_31_FN, FN_IP4_31_30,</div><div class='add'>+		GP_2_30_FN, FN_IP5_2_0,</div><div class='add'>+		GP_2_29_FN, FN_IP5_5_3,</div><div class='add'>+		GP_2_28_FN, FN_IP5_8_6,</div><div class='add'>+		GP_2_27_FN, FN_IP5_11_9,</div><div class='add'>+		GP_2_26_FN, FN_IP5_14_12,</div><div class='add'>+		GP_2_25_FN, FN_IP5_17_15,</div><div class='add'>+		GP_2_24_FN, FN_IP5_20_18,</div><div class='add'>+		GP_2_23_FN, FN_IP5_22_21,</div><div class='add'>+		GP_2_22_FN, FN_IP5_24_23,</div><div class='add'>+		GP_2_21_FN, FN_IP5_26_25,</div><div class='add'>+		GP_2_20_FN, FN_IP4_29_28,</div><div class='add'>+		GP_2_19_FN, FN_IP4_27_26,</div><div class='add'>+		GP_2_18_FN, FN_IP4_25_24,</div><div class='add'>+		GP_2_17_FN, FN_IP4_23_22,</div><div class='add'>+		GP_2_16_FN, FN_IP4_21_20,</div><div class='add'>+		GP_2_15_FN, FN_IP4_19_18,</div><div class='add'>+		GP_2_14_FN, FN_IP4_17_15,</div><div class='add'>+		GP_2_13_FN, FN_IP4_14_12,</div><div class='add'>+		GP_2_12_FN, FN_IP4_11_9,</div><div class='add'>+		GP_2_11_FN, FN_IP4_8_6,</div><div class='add'>+		GP_2_10_FN, FN_IP4_5_3,</div><div class='add'>+		GP_2_9_FN, FN_IP8_27_26,</div><div class='add'>+		GP_2_8_FN, FN_IP11_12,</div><div class='add'>+		GP_2_7_FN, FN_IP8_25_23,</div><div class='add'>+		GP_2_6_FN, FN_IP8_22_20,</div><div class='add'>+		GP_2_5_FN, FN_IP11_27_26,</div><div class='add'>+		GP_2_4_FN, FN_IP8_29_28,</div><div class='add'>+		GP_2_3_FN, FN_IP4_2_0,</div><div class='add'>+		GP_2_2_FN, FN_IP11_11_10,</div><div class='add'>+		GP_2_1_FN, FN_IP11_9_7,</div><div class='add'>+		GP_2_0_FN, FN_IP11_6_4 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("GPSR3", 0xFFFC0010, 32, 1) {</div><div class='add'>+		GP_3_31_FN, FN_IP9_1_0,</div><div class='add'>+		GP_3_30_FN, FN_IP8_19_18,</div><div class='add'>+		GP_3_29_FN, FN_IP8_17_16,</div><div class='add'>+		GP_3_28_FN, FN_IP8_15_14,</div><div class='add'>+		GP_3_27_FN, FN_IP8_13_12,</div><div class='add'>+		GP_3_26_FN, FN_IP8_11_10,</div><div class='add'>+		GP_3_25_FN, FN_IP8_9_8,</div><div class='add'>+		GP_3_24_FN, FN_IP8_7_6,</div><div class='add'>+		GP_3_23_FN, FN_IP8_5_4,</div><div class='add'>+		GP_3_22_FN, FN_IP8_3_2,</div><div class='add'>+		GP_3_21_FN, FN_IP8_1_0,</div><div class='add'>+		GP_3_20_FN, FN_IP7_30_29,</div><div class='add'>+		GP_3_19_FN, FN_IP7_28_27,</div><div class='add'>+		GP_3_18_FN, FN_IP7_26_24,</div><div class='add'>+		GP_3_17_FN, FN_IP7_23_21,</div><div class='add'>+		GP_3_16_FN, FN_IP7_20_18,</div><div class='add'>+		GP_3_15_FN, FN_IP7_17_15,</div><div class='add'>+		GP_3_14_FN, FN_IP7_14_12,</div><div class='add'>+		GP_3_13_FN, FN_IP7_11_9,</div><div class='add'>+		GP_3_12_FN, FN_IP7_8_6,</div><div class='add'>+		GP_3_11_FN, FN_IP7_5_3,</div><div class='add'>+		GP_3_10_FN, FN_IP7_2_0,</div><div class='add'>+		GP_3_9_FN, FN_IP6_23_21,</div><div class='add'>+		GP_3_8_FN, FN_IP6_20_18,</div><div class='add'>+		GP_3_7_FN, FN_IP6_17_16,</div><div class='add'>+		GP_3_6_FN, FN_IP6_15_14,</div><div class='add'>+		GP_3_5_FN, FN_IP6_13_12,</div><div class='add'>+		GP_3_4_FN, FN_IP6_11_10,</div><div class='add'>+		GP_3_3_FN, FN_IP6_9_8,</div><div class='add'>+		GP_3_2_FN, FN_IP6_7_6,</div><div class='add'>+		GP_3_1_FN, FN_IP6_5_3,</div><div class='add'>+		GP_3_0_FN, FN_IP6_2_0 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG("GPSR4", 0xFFFC0014, 32, 1) {</div><div class='add'>+		GP_4_31_FN, FN_IP10_24_23,</div><div class='add'>+		GP_4_30_FN, FN_IP10_22,</div><div class='add'>+		GP_4_29_FN, FN_IP11_18_16,</div><div class='add'>+		GP_4_28_FN, FN_USB_OVC0,</div><div class='add'>+		GP_4_27_FN, FN_IP11_15_13,</div><div class='add'>+		GP_4_26_FN, FN_PENC0,</div><div class='add'>+		GP_4_25_FN, FN_IP11_2,</div><div class='add'>+		GP_4_24_FN, FN_SCL0,</div><div class='add'>+		GP_4_23_FN, FN_IP11_1,</div><div class='add'>+		GP_4_22_FN, FN_IP11_0,</div><div class='add'>+		GP_4_21_FN, FN_IP10_21_19,</div><div class='add'>+		GP_4_20_FN, FN_IP10_18_16,</div><div class='add'>+		GP_4_19_FN, FN_IP10_15,</div><div class='add'>+		GP_4_18_FN, FN_IP10_14_12,</div><div class='add'>+		GP_4_17_FN, FN_IP10_11_9,</div><div class='add'>+		GP_4_16_FN, FN_IP10_8_6,</div><div class='add'>+		GP_4_15_FN, FN_IP10_5_3,</div><div class='add'>+		GP_4_14_FN, FN_IP10_2_0,</div><div class='add'>+		GP_4_13_FN, FN_IP9_29_28,</div><div class='add'>+		GP_4_12_FN, FN_IP9_27_26,</div><div class='add'>+		GP_4_11_FN, FN_IP9_9_8,</div><div class='add'>+		GP_4_10_FN, FN_IP9_7_6,</div><div class='add'>+		GP_4_9_FN, FN_IP9_5_4,</div><div class='add'>+		GP_4_8_FN, FN_IP9_3_2,</div><div class='add'>+		GP_4_7_FN, FN_IP9_17_16,</div><div class='add'>+		GP_4_6_FN, FN_IP9_15_14,</div><div class='add'>+		GP_4_5_FN, FN_IP9_13_12,</div><div class='add'>+		GP_4_4_FN, FN_IP9_11_10,</div><div class='add'>+		GP_4_3_FN, FN_IP9_25_24,</div><div class='add'>+		GP_4_2_FN, FN_IP9_23_22,</div><div class='add'>+		GP_4_1_FN, FN_IP9_21_20,</div><div class='add'>+		GP_4_0_FN, FN_IP9_19_18 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG("GPSR5", 0xFFFC0018, 32, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, /* 31 - 28 */</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, /* 27 - 24 */</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, /* 23 - 20 */</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, /* 19 - 16 */</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, /* 15 - 12 */</div><div class='add'>+		GP_5_11_FN, FN_IP10_29_28,</div><div class='add'>+		GP_5_10_FN, FN_IP10_27_26,</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, /* 9 - 6 */</div><div class='add'>+		0, 0, 0, 0, /* 5, 4 */</div><div class='add'>+		GP_5_3_FN, FN_IRQ3_B,</div><div class='add'>+		GP_5_2_FN, FN_IRQ2_B,</div><div class='add'>+		GP_5_1_FN, FN_IP11_3,</div><div class='add'>+		GP_5_0_FN, FN_IP10_25 }</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("IPSR0", 0xFFFC001C, 32,</div><div class='add'>+			2, 2, 2, 2, 2, 2, 2, 2,</div><div class='add'>+			2, 2, 2, 2, 2, 2, 2, 2) {</div><div class='add'>+		/* IP0_31_30 [2] */</div><div class='add'>+		FN_A15, FN_ST0_VCO_CLKIN, FN_LCD_DATA15_A,</div><div class='add'>+			FN_TIOC3D_C,</div><div class='add'>+		/* IP0_29_28 [2] */</div><div class='add'>+		FN_A14, FN_LCD_DATA14_A, FN_TIOC3C_C, 0,</div><div class='add'>+		/* IP0_27_26 [2] */</div><div class='add'>+		FN_A13, FN_LCD_DATA13_A, FN_TIOC3B_C, 0,</div><div class='add'>+		/* IP0_25_24 [2] */</div><div class='add'>+		FN_A12, FN_LCD_DATA12_A, FN_TIOC3A_C, 0,</div><div class='add'>+		/* IP0_23_22 [2] */</div><div class='add'>+		FN_A11, FN_ST0_D7, FN_LCD_DATA11_A, FN_TIOC2B_C,</div><div class='add'>+		/* IP0_21_20 [2] */</div><div class='add'>+		FN_A10, FN_ST0_D6, FN_LCD_DATA10_A, FN_TIOC2A_C,</div><div class='add'>+		/* IP0_19_18 [2] */</div><div class='add'>+		FN_A9, FN_ST0_D5, FN_LCD_DATA9_A, FN_TIOC1B_C,</div><div class='add'>+		/* IP0_17_16 [2] */</div><div class='add'>+		FN_A8, FN_ST0_D4, FN_LCD_DATA8_A, FN_TIOC1A_C,</div><div class='add'>+		/* IP0_15_14 [2] */</div><div class='add'>+		FN_A7, FN_ST0_D3, FN_LCD_DATA7_A, FN_TIOC0D_C,</div><div class='add'>+		/* IP0_13_12 [2] */</div><div class='add'>+		FN_A6, FN_ST0_D2, FN_LCD_DATA6_A, FN_TIOC0C_C,</div><div class='add'>+		/* IP0_11_10 [2] */</div><div class='add'>+		FN_A5, FN_ST0_D1, FN_LCD_DATA5_A, FN_TIOC0B_C,</div><div class='add'>+		/* IP0_9_8 [2] */</div><div class='add'>+		FN_A4, FN_ST0_D0, FN_LCD_DATA4_A, FN_TIOC0A_C,</div><div class='add'>+		/* IP0_7_6 [2] */</div><div class='add'>+		FN_A3, FN_ST0_VLD, FN_LCD_DATA3_A, FN_TCLKD_C,</div><div class='add'>+		/* IP0_5_4 [2] */</div><div class='add'>+		FN_A2, FN_ST0_SYC, FN_LCD_DATA2_A, FN_TCLKC_C,</div><div class='add'>+		/* IP0_3_2 [2] */</div><div class='add'>+		FN_A1, FN_ST0_REQ, FN_LCD_DATA1_A, FN_TCLKB_C,</div><div class='add'>+		/* IP0_1_0 [2] */</div><div class='add'>+		FN_A0, FN_ST0_CLKIN, FN_LCD_DATA0_A, FN_TCLKA_C }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("IPSR1", 0xFFFC0020, 32,</div><div class='add'>+			3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2) {</div><div class='add'>+		/* IP1_31_29 [3] */</div><div class='add'>+		FN_D3, FN_SD0_DAT3_A, FN_MMC_D3_A, FN_ST1_D6,</div><div class='add'>+			FN_FD3_A, 0, 0, 0,</div><div class='add'>+		/* IP1_28_26 [3] */</div><div class='add'>+		FN_D2, FN_SD0_DAT2_A, FN_MMC_D2_A, FN_ST1_D5,</div><div class='add'>+			FN_FD2_A, 0, 0, 0,</div><div class='add'>+		/* IP1_25_23 [3] */</div><div class='add'>+		FN_D1, FN_SD0_DAT1_A, FN_MMC_D1_A, FN_ST1_D4,</div><div class='add'>+			FN_FD1_A, 0, 0, 0,</div><div class='add'>+		/* IP1_22_20 [3] */</div><div class='add'>+		FN_D0, FN_SD0_DAT0_A, FN_MMC_D0_A, FN_ST1_D3,</div><div class='add'>+			FN_FD0_A, 0, 0, 0,</div><div class='add'>+		/* IP1_19_18 [2] */</div><div class='add'>+		FN_A25, FN_TX2_D, FN_ST1_D2, 0,</div><div class='add'>+		/* IP1_17_16 [2] */</div><div class='add'>+		FN_A24, FN_RX2_D, FN_ST1_D1, 0,</div><div class='add'>+		/* IP1_15_14 [2] */</div><div class='add'>+		FN_A23, FN_ST1_D0, FN_LCD_M_DISP_A, 0,</div><div class='add'>+		/* IP1_13_12 [2] */</div><div class='add'>+		FN_A22, FN_ST1_VLD, FN_LCD_VEPWC_A, 0,</div><div class='add'>+		/* IP1_11_10 [2] */</div><div class='add'>+		FN_A21, FN_ST1_SYC, FN_LCD_VCPWC_A, 0,</div><div class='add'>+		/* IP1_9_8 [2] */</div><div class='add'>+		FN_A20, FN_ST1_REQ, FN_LCD_FLM_A, 0,</div><div class='add'>+		/* IP1_7_6 [2] */</div><div class='add'>+		FN_A19, FN_ST1_CLKIN, FN_LCD_CLK_A,	FN_TIOC4D_C,</div><div class='add'>+		/* IP1_5_4 [2] */</div><div class='add'>+		FN_A18, FN_ST1_PWM, FN_LCD_CL2_A, FN_TIOC4C_C,</div><div class='add'>+		/* IP1_3_2 [2] */</div><div class='add'>+		FN_A17, FN_ST1_VCO_CLKIN, FN_LCD_CL1_A,	FN_TIOC4B_C,</div><div class='add'>+		/* IP1_1_0 [2] */</div><div class='add'>+		FN_A16, FN_ST0_PWM, FN_LCD_DON_A, FN_TIOC4A_C }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("IPSR2", 0xFFFC0024, 32,</div><div class='add'>+			     1, 3, 3, 2, 3, 3, 3, 3, 3, 3, 2, 3) {</div><div class='add'>+		/* IP2_31 [1] */</div><div class='add'>+		0, 0,</div><div class='add'>+		/* IP2_30_28 [3] */</div><div class='add'>+		FN_D14, FN_TX2_B, 0, FN_FSE_A,</div><div class='add'>+			FN_ET0_TX_CLK_B, 0, 0, 0,</div><div class='add'>+		/* IP2_27_25 [3] */</div><div class='add'>+		FN_D13, FN_RX2_B, 0, FN_FRB_A,</div><div class='add'>+			FN_ET0_ETXD6_B, 0, 0, 0,</div><div class='add'>+		/* IP2_24_23 [2] */</div><div class='add'>+		FN_D12, 0, FN_FWE_A, FN_ET0_ETXD5_B,</div><div class='add'>+		/* IP2_22_20 [3] */</div><div class='add'>+		FN_D11, FN_RSPI_MISO_A, 0, FN_QMI_QIO1_A,</div><div class='add'>+			FN_FRE_A, FN_ET0_ETXD3_B, 0, 0,</div><div class='add'>+		/* IP2_19_17 [3] */</div><div class='add'>+		FN_D10, FN_RSPI_MOSI_A, 0, FN_QMO_QIO0_A,</div><div class='add'>+			FN_FALE_A, FN_ET0_ETXD2_B, 0, 0,</div><div class='add'>+		/* IP2_16_14 [3] */</div><div class='add'>+		FN_D9, FN_SD0_CMD_A, FN_MMC_CMD_A, FN_QIO3_A,</div><div class='add'>+			FN_FCLE_A, FN_ET0_ETXD1_B, 0, 0,</div><div class='add'>+		/* IP2_13_11 [3] */</div><div class='add'>+		FN_D8, FN_SD0_CLK_A, FN_MMC_CLK_A, FN_QIO2_A,</div><div class='add'>+			FN_FCE_A, FN_ET0_GTX_CLK_B, 0, 0,</div><div class='add'>+		/* IP2_10_8 [3] */</div><div class='add'>+		FN_D7, FN_RSPI_SSL_A, FN_MMC_D7_A, FN_QSSL_A,</div><div class='add'>+			FN_FD7_A, 0, 0, 0,</div><div class='add'>+		/* IP2_7_5 [3] */</div><div class='add'>+		FN_D6, FN_RSPI_RSPCK_A, FN_MMC_D6_A, FN_QSPCLK_A,</div><div class='add'>+			FN_FD6_A, 0, 0, 0,</div><div class='add'>+		/* IP2_4_3 [2] */</div><div class='add'>+		FN_D5, FN_SD0_WP_A, FN_MMC_D5_A, FN_FD5_A,</div><div class='add'>+		/* IP2_2_0 [3] */</div><div class='add'>+		FN_D4, FN_SD0_CD_A, FN_MMC_D4_A, FN_ST1_D7,</div><div class='add'>+			FN_FD4_A, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("IPSR3", 0xFFFC0028, 32,</div><div class='add'>+				2, 3, 3, 3, 1, 2, 3, 3, 3, 3, 3, 1, 2) {</div><div class='add'>+	    /* IP3_31_30 [2] */</div><div class='add'>+		0, 0, 0, 0,</div><div class='add'>+	    /* IP3_29_27 [3] */</div><div class='add'>+		FN_DRACK0, FN_SD1_DAT2_A, FN_ATAG, FN_TCLK1_A,</div><div class='add'>+		FN_ET0_ETXD7, 0, 0, 0,</div><div class='add'>+	    /* IP3_26_24 [3] */</div><div class='add'>+		FN_EX_WAIT2, FN_SD1_DAT1_A, FN_DACK2, FN_CAN1_RX_C,</div><div class='add'>+		FN_ET0_MAGIC_C, FN_ET0_ETXD6_A, 0, 0,</div><div class='add'>+	    /* IP3_23_21 [3] */</div><div class='add'>+		FN_EX_WAIT1, FN_SD1_DAT0_A, FN_DREQ2, FN_CAN1_TX_C,</div><div class='add'>+		FN_ET0_LINK_C, FN_ET0_ETXD5_A, 0, 0,</div><div class='add'>+	    /* IP3_20 [1] */</div><div class='add'>+		FN_EX_WAIT0, FN_TCLK1_B,</div><div class='add'>+	    /* IP3_19_18 [2] */</div><div class='add'>+		FN_RD_WR, FN_TCLK1_B, 0, 0,</div><div class='add'>+	    /* IP3_17_15 [3] */</div><div class='add'>+		FN_EX_CS5, FN_SD1_CMD_A, FN_ATADIR, FN_QSSL_B,</div><div class='add'>+		FN_ET0_ETXD3_A, 0, 0, 0,</div><div class='add'>+	    /* IP3_14_12 [3] */</div><div class='add'>+		FN_EX_CS4, FN_SD1_WP_A, FN_ATAWR, FN_QMI_QIO1_B,</div><div class='add'>+		FN_ET0_ETXD2_A, 0, 0, 0,</div><div class='add'>+	    /* IP3_11_9 [3] */</div><div class='add'>+		FN_EX_CS3, FN_SD1_CD_A, FN_ATARD, FN_QMO_QIO0_B,</div><div class='add'>+		FN_ET0_ETXD1_A, 0, 0, 0,</div><div class='add'>+	    /* IP3_8_6 [3] */</div><div class='add'>+		FN_EX_CS2, FN_TX3_B, FN_ATACS1, FN_QSPCLK_B,</div><div class='add'>+		FN_ET0_GTX_CLK_A, 0, 0, 0,</div><div class='add'>+	    /* IP3_5_3 [3] */</div><div class='add'>+		FN_EX_CS1, FN_RX3_B, FN_ATACS0, FN_QIO2_B,</div><div class='add'>+		FN_ET0_ETXD0, 0, 0, 0,</div><div class='add'>+	    /* IP3_2 [1] */</div><div class='add'>+		FN_CS1_A26, FN_QIO3_B,</div><div class='add'>+	    /* IP3_1_0 [2] */</div><div class='add'>+		FN_D15, FN_SCK2_B, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("IPSR4", 0xFFFC002C, 32,</div><div class='add'>+				2, 2, 2, 2, 2, 2 , 2, 3, 3, 3, 3, 3, 3) {</div><div class='add'>+	    /* IP4_31_30 [2] */</div><div class='add'>+		0, FN_SCK2_A, FN_VI0_G3, 0,</div><div class='add'>+	    /* IP4_29_28 [2] */</div><div class='add'>+		0, FN_RTS1_B, FN_VI0_G2, 0,</div><div class='add'>+	    /* IP4_27_26 [2] */</div><div class='add'>+		0, FN_CTS1_B, FN_VI0_DATA7_VI0_G1, 0,</div><div class='add'>+	    /* IP4_25_24 [2] */</div><div class='add'>+		0, FN_TX1_B, FN_VI0_DATA6_VI0_G0, FN_ET0_PHY_INT_A,</div><div class='add'>+	    /* IP4_23_22 [2] */</div><div class='add'>+		0, FN_RX1_B, FN_VI0_DATA5_VI0_B5, FN_ET0_MAGIC_A,</div><div class='add'>+	    /* IP4_21_20 [2] */</div><div class='add'>+		0, FN_SCK1_B, FN_VI0_DATA4_VI0_B4, FN_ET0_LINK_A,</div><div class='add'>+	    /* IP4_19_18 [2] */</div><div class='add'>+		0, FN_RTS0_B, FN_VI0_DATA3_VI0_B3, FN_ET0_MDIO_A,</div><div class='add'>+	    /* IP4_17_15 [3] */</div><div class='add'>+		0, FN_CTS0_B, FN_VI0_DATA2_VI0_B2, FN_RMII0_MDIO_A,</div><div class='add'>+			FN_ET0_MDC, 0, 0, 0,</div><div class='add'>+	    /* IP4_14_12 [3] */</div><div class='add'>+		FN_HTX0_A, FN_TX1_A, FN_VI0_DATA1_VI0_B1, FN_RMII0_MDC_A,</div><div class='add'>+			FN_ET0_COL, 0, 0, 0,</div><div class='add'>+	    /* IP4_11_9 [3] */</div><div class='add'>+		FN_HRX0_A, FN_RX1_A, FN_VI0_DATA0_VI0_B0, FN_RMII0_CRS_DV_A,</div><div class='add'>+			FN_ET0_CRS, 0, 0, 0,</div><div class='add'>+	    /* IP4_8_6 [3] */</div><div class='add'>+		FN_HSCK0_A, FN_SCK1_A, FN_VI0_VSYNC, FN_RMII0_RX_ER_A,</div><div class='add'>+			FN_ET0_RX_ER, 0, 0, 0,</div><div class='add'>+	    /* IP4_5_3 [3] */</div><div class='add'>+		FN_HRTS0_A, FN_RTS1_A, FN_VI0_HSYNC, FN_RMII0_TXD_EN_A,</div><div class='add'>+			FN_ET0_RX_DV, 0, 0, 0,</div><div class='add'>+	    /* IP4_2_0 [3] */</div><div class='add'>+		FN_HCTS0_A, FN_CTS1_A, FN_VI0_FIELD, FN_RMII0_RXD1_A,</div><div class='add'>+			FN_ET0_ERXD7, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("IPSR5", 0xFFFC0030, 32,</div><div class='add'>+				1, 1, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3) {</div><div class='add'>+	    /* IP5_31 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP5_30 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP5_29 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP5_28 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP5_27 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP5_26_25 [2] */</div><div class='add'>+		FN_REF50CK, FN_CTS1_E, FN_HCTS0_D, 0,</div><div class='add'>+	    /* IP5_24_23 [2] */</div><div class='add'>+		FN_REF125CK, FN_ADTRG, FN_RX5_C, 0,</div><div class='add'>+	    /* IP5_22_21 [2] */</div><div class='add'>+		FN_SD2_WP_A, FN_TX5_A, FN_VI0_R5, 0,</div><div class='add'>+	    /* IP5_20_18 [3] */</div><div class='add'>+		FN_SD2_CD_A, FN_RX5_A, FN_VI0_R4, 0,</div><div class='add'>+		0, 0, 0, FN_ET0_PHY_INT_B,</div><div class='add'>+	    /* IP5_17_15 [3] */</div><div class='add'>+		FN_SD2_DAT3_A, FN_TX4_A, FN_VI0_R3, 0,</div><div class='add'>+		0, 0, 0, FN_ET0_MAGIC_B,</div><div class='add'>+	    /* IP5_14_12 [3] */</div><div class='add'>+		FN_SD2_DAT2_A, FN_RX4_A, FN_VI0_R2, 0,</div><div class='add'>+		0, 0, 0, FN_ET0_LINK_B,</div><div class='add'>+	    /* IP5_11_9 [3] */</div><div class='add'>+		FN_SD2_DAT1_A, FN_TX3_A, FN_VI0_R1, 0,</div><div class='add'>+		0, 0, 0, FN_ET0_MDIO_B,</div><div class='add'>+	    /* IP5_8_6 [3] */</div><div class='add'>+		FN_SD2_DAT0_A, FN_RX3_A, FN_VI0_R0, 0,</div><div class='add'>+		0, 0, 0, FN_ET0_ERXD3_B,</div><div class='add'>+	    /* IP5_5_3 [3] */</div><div class='add'>+		FN_SD2_CMD_A, FN_TX2_A, FN_VI0_G5, 0,</div><div class='add'>+		0, 0, 0, FN_ET0_ERXD2_B,</div><div class='add'>+	    /* IP5_2_0 [3] */</div><div class='add'>+		FN_SD2_CLK_A, FN_RX2_A, FN_VI0_G4, 0,</div><div class='add'>+		FN_ET0_RX_CLK_B, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("IPSR6", 0xFFFC0034, 32,</div><div class='add'>+				1, 1, 1, 1, 1, 1, 1, 1,</div><div class='add'>+				3, 3, 2, 2, 2, 2, 2, 2, 3, 3) {</div><div class='add'>+	    /* IP5_31 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP6_30 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP6_29 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP6_28 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP6_27 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP6_26 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP6_25 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP6_24 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP6_23_21 [3] */</div><div class='add'>+		FN_DU0_DG1, FN_CTS1_C, FN_HRTS0_D, FN_TIOC1B_A,</div><div class='add'>+		FN_HIFD09, 0, 0, 0,</div><div class='add'>+	    /* IP6_20_18 [3] */</div><div class='add'>+		FN_DU0_DG0, FN_TX1_C, FN_HSCK0_D, FN_IECLK_A,</div><div class='add'>+		FN_TIOC1A_A, FN_HIFD08, 0, 0,</div><div class='add'>+	    /* IP6_17_16 [2] */</div><div class='add'>+		FN_DU0_DR7, FN_RX1_C, FN_TIOC0D_A, FN_HIFD07,</div><div class='add'>+	    /* IP6_15_14 [2] */</div><div class='add'>+		FN_DU0_DR6, FN_SCK1_C, FN_TIOC0C_A, FN_HIFD06,</div><div class='add'>+	    /* IP6_13_12 [2] */</div><div class='add'>+		FN_DU0_DR5, FN_RTS0_C, FN_TIOC0B_A, FN_HIFD05,</div><div class='add'>+	    /* IP6_11_10 [2] */</div><div class='add'>+		FN_DU0_DR4, FN_CTS0_C, FN_TIOC0A_A, FN_HIFD04,</div><div class='add'>+	    /* IP6_9_8 [2] */</div><div class='add'>+		FN_DU0_DR3, FN_TX0_B, FN_TCLKD_A, FN_HIFD03,</div><div class='add'>+	    /* IP6_7_6 [2] */</div><div class='add'>+		FN_DU0_DR2, FN_RX0_B, FN_TCLKC_A, FN_HIFD02,</div><div class='add'>+	    /* IP6_5_3 [3] */</div><div class='add'>+		FN_DU0_DR1, FN_SCK0_B, FN_HTX0_D, FN_IERX_A,</div><div class='add'>+		FN_TCLKB_A, FN_HIFD01, 0, 0,</div><div class='add'>+	    /* IP6_2_0 [3] */</div><div class='add'>+		FN_DU0_DR0, FN_SCIF_CLK_B, FN_HRX0_D, FN_IETX_A,</div><div class='add'>+		FN_TCLKA_A, FN_HIFD00, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("IPSR7", 0xFFFC0038, 32,</div><div class='add'>+			     1, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3) {</div><div class='add'>+	    /* IP7_31 [1] */</div><div class='add'>+	    0, 0,</div><div class='add'>+	    /* IP7_30_29 [2] */</div><div class='add'>+		FN_DU0_DB4, 0, FN_HIFINT, 0,</div><div class='add'>+	    /* IP7_28_27 [2] */</div><div class='add'>+		FN_DU0_DB3, FN_TX5_B, FN_TIOC4D_A, FN_HIFRD,</div><div class='add'>+	    /* IP7_26_24 [3] */</div><div class='add'>+		FN_DU0_DB2, FN_RX5_B, FN_RMII0_TXD1_B, FN_TIOC4C_A,</div><div class='add'>+		FN_HIFWR, 0, 0, 0,</div><div class='add'>+	    /* IP7_23_21 [3] */</div><div class='add'>+		FN_DU0_DB1, FN_TX4_C, FN_RMII0_TXD0_B, FN_TIOC4B_A,</div><div class='add'>+		FN_HIFRS, 0, 0, 0,</div><div class='add'>+	    /* IP7_20_18 [3] */</div><div class='add'>+		FN_DU0_DB0, FN_RX4_C, FN_RMII0_TXD_EN_B, FN_TIOC4A_A,</div><div class='add'>+		FN_HIFCS, 0, 0, 0,</div><div class='add'>+	    /* IP7_17_15 [3] */</div><div class='add'>+		FN_DU0_DG7, FN_TX3_C, FN_RMII0_RXD1_B, FN_TIOC3D_A,</div><div class='add'>+		FN_HIFD15, 0, 0, 0,</div><div class='add'>+	    /* IP7_14_12 [3] */</div><div class='add'>+		FN_DU0_DG6, FN_RX3_C, FN_RMII0_RXD0_B, FN_TIOC3C_A,</div><div class='add'>+		FN_HIFD14, 0, 0, 0,</div><div class='add'>+	    /* IP7_11_9 [3] */</div><div class='add'>+		FN_DU0_DG5, FN_TX2_C, FN_RMII0_RX_ER_B, FN_TIOC3B_A,</div><div class='add'>+		FN_HIFD13, 0, 0, 0,</div><div class='add'>+	    /* IP7_8_6 [3] */</div><div class='add'>+		FN_DU0_DG4, FN_RX2_C, FN_RMII0_CRS_DV_B, FN_TIOC3A_A,</div><div class='add'>+		FN_HIFD12, 0, 0, 0,</div><div class='add'>+	    /* IP7_5_3 [3] */</div><div class='add'>+		FN_DU0_DG3, FN_SCK2_C, FN_RMII0_MDIO_B, FN_TIOC2B_A,</div><div class='add'>+		FN_HIFD11, 0, 0, 0,</div><div class='add'>+	    /* IP7_2_0 [3] */</div><div class='add'>+		FN_DU0_DG2, FN_RTS1_C, FN_RMII0_MDC_B, FN_TIOC2A_A,</div><div class='add'>+		FN_HIFD10, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("IPSR8", 0xFFFC003C, 32,</div><div class='add'>+			     2, 2, 2, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2) {</div><div class='add'>+	    /* IP9_31_30 [2] */</div><div class='add'>+	    0, 0, 0, 0,</div><div class='add'>+	    /* IP8_29_28 [2] */</div><div class='add'>+		FN_IRQ3_A, FN_RTS0_A, FN_HRTS0_B, FN_ET0_ERXD3_A,</div><div class='add'>+	    /* IP8_27_26 [2] */</div><div class='add'>+		FN_IRQ2_A, FN_CTS0_A, FN_HCTS0_B, FN_ET0_ERXD2_A,</div><div class='add'>+	    /* IP8_25_23 [3] */</div><div class='add'>+		FN_IRQ1_A, 0, FN_HSPI_RX_B, FN_TX3_E,</div><div class='add'>+			FN_ET0_ERXD1, 0, 0, 0,</div><div class='add'>+	    /* IP8_22_20 [3] */</div><div class='add'>+		FN_IRQ0_A, 0, FN_HSPI_TX_B, FN_RX3_E,</div><div class='add'>+			FN_ET0_ERXD0, 0, 0, 0,</div><div class='add'>+	    /* IP8_19_18 [2] */</div><div class='add'>+		FN_DU0_CDE, FN_HTX0_B, FN_AUDIO_CLKB_B, FN_LCD_VCPWC_B,</div><div class='add'>+	    /* IP8_17_16 [2] */</div><div class='add'>+		FN_DU0_DISP, FN_CAN0_TX_B, FN_HRX0_B, FN_AUDIO_CLKA_B,</div><div class='add'>+	    /* IP8_15_14 [2] */</div><div class='add'>+		FN_DU0_EXODDF_DU0_ODDF, FN_CAN0_RX_B, FN_HSCK0_B,</div><div class='add'>+			FN_SSI_SDATA1_B,</div><div class='add'>+	    /* IP8_13_12 [2] */</div><div class='add'>+		FN_DU0_EXVSYNC_DU0_VSYNC, 0, FN_HSPI_RX0_C, FN_SSI_WS1_B,</div><div class='add'>+	    /* IP8_11_10 [2] */</div><div class='add'>+		FN_DU0_EXHSYNC_DU0_HSYNC, 0, FN_HSPI_TX0_C, FN_SSI_SCK1_B,</div><div class='add'>+	    /* IP8_9_8 [2] */</div><div class='add'>+		FN_DU0_DOTCLKOUT, 0, FN_HSPI_CLK0_C, FN_SSI_SDATA0_B,</div><div class='add'>+	    /* IP8_7_6 [2] */</div><div class='add'>+		FN_DU0_DOTCLKIN, 0, FN_HSPI_CS0_C, FN_SSI_WS0_B,</div><div class='add'>+	    /* IP8_5_4 [2] */</div><div class='add'>+		FN_DU0_DB7, 0, FN_SSI_SCK0_B, FN_HIFEBL_B,</div><div class='add'>+	    /* IP8_3_2 [2] */</div><div class='add'>+		FN_DU0_DB6, 0, FN_HIFRDY, 0,</div><div class='add'>+	    /* IP8_1_0 [2] */</div><div class='add'>+		FN_DU0_DB5, 0, FN_HIFDREQ, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("IPSR9", 0xFFFC0040, 32,</div><div class='add'>+			     2, 2, 2, 2, 2, 2, 2, 2,</div><div class='add'>+			     2, 2, 2, 2, 2, 2, 2, 2) {</div><div class='add'>+	    /* IP9_31_30 [2] */</div><div class='add'>+	    0, 0, 0, 0,</div><div class='add'>+	    /* IP9_29_28 [2] */</div><div class='add'>+		FN_SSI_SDATA1_A, FN_VI1_3_B, FN_LCD_DATA14_B, 0,</div><div class='add'>+	    /* IP9_27_26 [2] */</div><div class='add'>+		FN_SSI_WS1_A, FN_VI1_2_B, FN_LCD_DATA13_B, 0,</div><div class='add'>+	    /* IP9_25_24 [2] */</div><div class='add'>+		FN_SSI_SCK1_A, FN_VI1_1_B, FN_TIOC2B_B, FN_LCD_DATA12_B,</div><div class='add'>+	    /* IP9_23_22 [2] */</div><div class='add'>+		FN_SSI_SDATA0_A, FN_VI1_0_B, FN_TIOC2A_B, FN_LCD_DATA11_B,</div><div class='add'>+	    /* IP9_21_20 [2] */</div><div class='add'>+		FN_SSI_WS0_A, FN_TIOC1B_B, FN_LCD_DATA10_B, 0,</div><div class='add'>+	    /* IP9_19_18 [2] */</div><div class='add'>+		FN_SSI_SCK0_A, FN_TIOC1A_B, FN_LCD_DATA9_B, 0,</div><div class='add'>+	    /* IP9_17_16 [2] */</div><div class='add'>+		FN_VI1_7_A, FN_FCE_B, FN_LCD_DATA8_B, 0,</div><div class='add'>+	    /* IP9_15_14 [2] */</div><div class='add'>+		FN_VI1_6_A, 0, FN_FD7_B, FN_LCD_DATA7_B,</div><div class='add'>+	    /* IP9_13_12 [2] */</div><div class='add'>+		FN_VI1_5_A, 0, FN_FD6_B, FN_LCD_DATA6_B,</div><div class='add'>+	    /* IP9_11_10 [2] */</div><div class='add'>+		FN_VI1_4_A, 0, FN_FD5_B, FN_LCD_DATA5_B,</div><div class='add'>+	    /* IP9_9_8 [2] */</div><div class='add'>+		FN_VI1_3_A, 0, FN_FD4_B, FN_LCD_DATA4_B,</div><div class='add'>+	    /* IP9_7_6 [2] */</div><div class='add'>+		FN_VI1_2_A, 0, FN_FD3_B, FN_LCD_DATA3_B,</div><div class='add'>+	    /* IP9_5_4 [2] */</div><div class='add'>+		FN_VI1_1_A, 0, FN_FD2_B, FN_LCD_DATA2_B,</div><div class='add'>+	    /* IP9_3_2 [2] */</div><div class='add'>+		FN_VI1_0_A, 0, FN_FD1_B, FN_LCD_DATA1_B,</div><div class='add'>+	    /* IP9_1_0 [2] */</div><div class='add'>+		FN_VI1_CLK_A, 0, FN_FD0_B, FN_LCD_DATA0_B }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("IPSR10", 0xFFFC0044, 32,</div><div class='add'>+					2, 2, 2, 1, 2, 1, 3,</div><div class='add'>+					3, 1, 3, 3, 3, 3, 3) {</div><div class='add'>+	    /* IP9_31_30 [2] */</div><div class='add'>+	    0, 0, 0, 0,</div><div class='add'>+	    /* IP10_29_28 [2] */</div><div class='add'>+		FN_CAN1_TX_A, FN_TX5_C, FN_MLB_DAT, 0,</div><div class='add'>+	    /* IP10_27_26 [2] */</div><div class='add'>+		FN_CAN0_RX_A, FN_IRQ0_B, FN_MLB_SIG, 0,</div><div class='add'>+	    /* IP10_25 [1] */</div><div class='add'>+		FN_CAN1_RX_A, FN_IRQ1_B,</div><div class='add'>+	    /* IP10_24_23 [2] */</div><div class='add'>+		FN_CAN0_TX_A, FN_TX4_D, FN_MLB_CLK, 0,</div><div class='add'>+	    /* IP10_22 [1] */</div><div class='add'>+		FN_CAN_CLK_A, FN_RX4_D,</div><div class='add'>+	    /* IP10_21_19 [3] */</div><div class='add'>+		FN_AUDIO_CLKOUT, FN_TX1_E, FN_HRTS0_C, FN_FSE_B,</div><div class='add'>+		FN_LCD_M_DISP_B, 0, 0, 0,</div><div class='add'>+	    /* IP10_18_16 [3] */</div><div class='add'>+		FN_AUDIO_CLKC, FN_SCK1_E, FN_HCTS0_C, FN_FRB_B,</div><div class='add'>+		FN_LCD_VEPWC_B, 0, 0, 0,</div><div class='add'>+	    /* IP10_15 [1] */</div><div class='add'>+		FN_AUDIO_CLKB_A, FN_LCD_CLK_B,</div><div class='add'>+	    /* IP10_14_12 [3] */</div><div class='add'>+		FN_AUDIO_CLKA_A, FN_VI1_CLK_B, FN_SCK1_D, FN_IECLK_B,</div><div class='add'>+		FN_LCD_FLM_B, 0, 0, 0,</div><div class='add'>+	    /* IP10_11_9 [3] */</div><div class='add'>+		FN_SSI_SDATA3, FN_VI1_7_B, FN_HTX0_C, FN_FWE_B,</div><div class='add'>+		FN_LCD_CL2_B, 0, 0, 0,</div><div class='add'>+	    /* IP10_8_6 [3] */</div><div class='add'>+		FN_SSI_SDATA2, FN_VI1_6_B, FN_HRX0_C, FN_FRE_B,</div><div class='add'>+		FN_LCD_CL1_B, 0, 0, 0,</div><div class='add'>+	    /* IP10_5_3 [3] */</div><div class='add'>+		FN_SSI_WS23, FN_VI1_5_B, FN_TX1_D, FN_HSCK0_C, FN_FALE_B,</div><div class='add'>+		FN_LCD_DON_B, 0, 0, 0,</div><div class='add'>+	    /* IP10_2_0 [3] */</div><div class='add'>+		FN_SSI_SCK23, FN_VI1_4_B, FN_RX1_D, FN_FCLE_B,</div><div class='add'>+		FN_LCD_DATA15_B, 0, 0, 0 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("IPSR11", 0xFFFC0048, 32,</div><div class='add'>+			3, 1, 2, 2, 2, 3, 3, 1, 2, 3, 3, 1, 1, 1, 1) {</div><div class='add'>+	    /* IP11_31_29 [3] */</div><div class='add'>+	    0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+	    /* IP11_28 [1] */</div><div class='add'>+		FN_PRESETOUT, FN_ST_CLKOUT,</div><div class='add'>+	    /* IP11_27_26 [2] */</div><div class='add'>+		FN_DACK1, FN_HSPI_CS_B, FN_TX4_B, FN_ET0_RX_CLK_A,</div><div class='add'>+	    /* IP11_25_23 [3] */</div><div class='add'>+		FN_DREQ1, FN_HSPI_CLK_B, FN_RX4_B, FN_ET0_PHY_INT_C,</div><div class='add'>+		FN_ET0_TX_CLK_A, 0, 0, 0,</div><div class='add'>+	    /* IP11_22_21 [2] */</div><div class='add'>+		FN_DACK0, FN_SD1_DAT3_A, FN_ET0_TX_ER, 0,</div><div class='add'>+	    /* IP11_20_19 [2] */</div><div class='add'>+		FN_DREQ0, FN_SD1_CLK_A, FN_ET0_TX_EN, 0,</div><div class='add'>+	    /* IP11_18_16 [3] */</div><div class='add'>+		FN_USB_OVC1, FN_RX3_D, FN_CAN1_RX_B, FN_RX5_D,</div><div class='add'>+		FN_IERX_B, 0, 0, 0,</div><div class='add'>+	    /* IP11_15_13 [3] */</div><div class='add'>+		FN_PENC1, FN_TX3_D, FN_CAN1_TX_B, FN_TX5_D,</div><div class='add'>+		FN_IETX_B, 0, 0, 0,</div><div class='add'>+	    /* IP11_12 [1] */</div><div class='add'>+		FN_TX0_A, FN_HSPI_TX_A,</div><div class='add'>+	    /* IP11_11_10 [2] */</div><div class='add'>+		FN_RX0_A, FN_HSPI_RX_A, FN_RMII0_RXD0_A, FN_ET0_ERXD6,</div><div class='add'>+	    /* IP11_9_7 [3] */</div><div class='add'>+		FN_SCK0_A, FN_HSPI_CS_A, FN_VI0_CLKENB, FN_RMII0_TXD1_A,</div><div class='add'>+		FN_ET0_ERXD5, 0, 0, 0,</div><div class='add'>+	    /* IP11_6_4 [3] */</div><div class='add'>+		FN_SCIF_CLK_A, FN_HSPI_CLK_A, FN_VI0_CLK, FN_RMII0_TXD0_A,</div><div class='add'>+		FN_ET0_ERXD4, 0, 0, 0,</div><div class='add'>+	    /* IP11_3 [1] */</div><div class='add'>+		FN_SDSELF, FN_RTS1_E,</div><div class='add'>+	    /* IP11_2 [1] */</div><div class='add'>+		FN_SDA0, FN_HIFEBL_A,</div><div class='add'>+	    /* IP11_1 [1] */</div><div class='add'>+		FN_SDA1, FN_RX1_E,</div><div class='add'>+	    /* IP11_0 [1] */</div><div class='add'>+		FN_SCL1, FN_SCIF_CLK_C }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("MOD_SEL1", 0xFFFC004C, 32,</div><div class='add'>+				3, 1, 1, 1, 1, 1, 1, 2, 1, 1, 1, 2, 2,</div><div class='add'>+				1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) {</div><div class='add'>+		/* SEL1_31_29 [3] */</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		/* SEL1_28 [1] */</div><div class='add'>+		FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,</div><div class='add'>+		/* SEL1_27 [1] */</div><div class='add'>+		FN_SEL_RQSPI_0, FN_SEL_RQSPI_1,</div><div class='add'>+		/* SEL1_26 [1] */</div><div class='add'>+		FN_SEL_VIN1_0, FN_SEL_VIN1_1,</div><div class='add'>+		/* SEL1_25 [1] */</div><div class='add'>+		FN_SEL_HIF_0, FN_SEL_HIF_1,</div><div class='add'>+		/* SEL1_24 [1] */</div><div class='add'>+		FN_SEL_RSPI_0, FN_SEL_RSPI_1,</div><div class='add'>+		/* SEL1_23 [1] */</div><div class='add'>+		FN_SEL_LCDC_0, FN_SEL_LCDC_1,</div><div class='add'>+		/* SEL1_22_21 [2] */</div><div class='add'>+		FN_SEL_ET0_CTL_0, FN_SEL_ET0_CTL_1, FN_SEL_ET0_CTL_2, 0,</div><div class='add'>+		/* SEL1_20 [1] */</div><div class='add'>+		FN_SEL_ET0_0, FN_SEL_ET0_1,</div><div class='add'>+		/* SEL1_19 [1] */</div><div class='add'>+		FN_SEL_RMII_0, FN_SEL_RMII_1,</div><div class='add'>+		/* SEL1_18 [1] */</div><div class='add'>+		FN_SEL_TMU_0, FN_SEL_TMU_1,</div><div class='add'>+		/* SEL1_17_16 [2] */</div><div class='add'>+		FN_SEL_HSPI_0, FN_SEL_HSPI_1, FN_SEL_HSPI_2, 0,</div><div class='add'>+		/* SEL1_15_14 [2] */</div><div class='add'>+		FN_SEL_HSCIF_0, FN_SEL_HSCIF_1, FN_SEL_HSCIF_2, FN_SEL_HSCIF_3,</div><div class='add'>+		/* SEL1_13 [1] */</div><div class='add'>+		FN_SEL_RCAN_CLK_0, FN_SEL_RCAN_CLK_1,</div><div class='add'>+		/* SEL1_12_11 [2] */</div><div class='add'>+		FN_SEL_RCAN1_0, FN_SEL_RCAN1_1, FN_SEL_RCAN1_2, 0,</div><div class='add'>+		/* SEL1_10 [1] */</div><div class='add'>+		FN_SEL_RCAN0_0, FN_SEL_RCAN0_1,</div><div class='add'>+		/* SEL1_9 [1] */</div><div class='add'>+		FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,</div><div class='add'>+		/* SEL1_8 [1] */</div><div class='add'>+		FN_SEL_SDHI1_0, FN_SEL_SDHI1_1,</div><div class='add'>+		/* SEL1_7 [1] */</div><div class='add'>+		FN_SEL_SDHI0_0, FN_SEL_SDHI0_1,</div><div class='add'>+		/* SEL1_6 [1] */</div><div class='add'>+		FN_SEL_SSI1_0, FN_SEL_SSI1_1,</div><div class='add'>+		/* SEL1_5 [1] */</div><div class='add'>+		FN_SEL_SSI0_0, FN_SEL_SSI0_1,</div><div class='add'>+		/* SEL1_4 [1] */</div><div class='add'>+		FN_SEL_AUDIO_CLKB_0, FN_SEL_AUDIO_CLKB_1,</div><div class='add'>+		/* SEL1_3 [1] */</div><div class='add'>+		FN_SEL_AUDIO_CLKA_0, FN_SEL_AUDIO_CLKA_1,</div><div class='add'>+		/* SEL1_2 [1] */</div><div class='add'>+		FN_SEL_FLCTL_0, FN_SEL_FLCTL_1,</div><div class='add'>+		/* SEL1_1 [1] */</div><div class='add'>+		FN_SEL_MMC_0, FN_SEL_MMC_1,</div><div class='add'>+		/* SEL1_0 [1] */</div><div class='add'>+		FN_SEL_INTC_0, FN_SEL_INTC_1 }</div><div class='add'>+	},</div><div class='add'>+	{ PINMUX_CFG_REG_VAR("MOD_SEL2", 0xFFFC0050, 32,</div><div class='add'>+				1, 1, 1, 1, 1, 1, 1, 1,</div><div class='add'>+				1, 1, 1, 2, 2, 1, 2, 2, 3, 2, 3, 2, 2) {</div><div class='add'>+		/* SEL2_31 [1] */</div><div class='add'>+		0, 0,</div><div class='add'>+		/* SEL2_30 [1] */</div><div class='add'>+		0, 0,</div><div class='add'>+		/* SEL2_29 [1] */</div><div class='add'>+		0, 0,</div><div class='add'>+		/* SEL2_28 [1] */</div><div class='add'>+		0, 0,</div><div class='add'>+		/* SEL2_27 [1] */</div><div class='add'>+		0, 0,</div><div class='add'>+		/* SEL2_26 [1] */</div><div class='add'>+		0, 0,</div><div class='add'>+		/* SEL2_25 [1] */</div><div class='add'>+		0, 0,</div><div class='add'>+		/* SEL2_24 [1] */</div><div class='add'>+		0, 0,</div><div class='add'>+		/* SEL2_23 [1] */</div><div class='add'>+		FN_SEL_MTU2_CLK_0, FN_SEL_MTU2_CLK_1,</div><div class='add'>+		/* SEL2_22 [1] */</div><div class='add'>+		FN_SEL_MTU2_CH4_0, FN_SEL_MTU2_CH4_1,</div><div class='add'>+		/* SEL2_21 [1] */</div><div class='add'>+		FN_SEL_MTU2_CH3_0, FN_SEL_MTU2_CH3_1,</div><div class='add'>+		/* SEL2_20_19 [2] */</div><div class='add'>+		FN_SEL_MTU2_CH2_0, FN_SEL_MTU2_CH2_1, FN_SEL_MTU2_CH2_2, 0,</div><div class='add'>+		/* SEL2_18_17 [2] */</div><div class='add'>+		FN_SEL_MTU2_CH1_0, FN_SEL_MTU2_CH1_1, FN_SEL_MTU2_CH1_2, 0,</div><div class='add'>+		/* SEL2_16 [1] */</div><div class='add'>+		FN_SEL_MTU2_CH0_0, FN_SEL_MTU2_CH0_1,</div><div class='add'>+		/* SEL2_15_14 [2] */</div><div class='add'>+		FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, FN_SEL_SCIF5_3,</div><div class='add'>+		/* SEL2_13_12 [2] */</div><div class='add'>+		FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,</div><div class='add'>+		/* SEL2_11_9 [3] */</div><div class='add'>+		FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,</div><div class='add'>+		FN_SEL_SCIF3_4, 0, 0, 0,</div><div class='add'>+		/* SEL2_8_7 [2] */</div><div class='add'>+		FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,</div><div class='add'>+		/* SEL2_6_4 [3] */</div><div class='add'>+		FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,</div><div class='add'>+			FN_SEL_SCIF1_4, 0, 0, 0,</div><div class='add'>+		/* SEL2_3_2 [2] */</div><div class='add'>+		FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, 0,</div><div class='add'>+		/* SEL2_1_0 [2] */</div><div class='add'>+		FN_SEL_SCIF_CLK_0, FN_SEL_SCIF_CLK_1, FN_SEL_SCIF_CLK_2, 0  }</div><div class='add'>+	},</div><div class='add'>+	/* GPIO 0 - 5*/</div><div class='add'>+	{ PINMUX_CFG_REG("INOUTSEL0", 0xFFC40004, 32, 1) { GP_INOUTSEL(0) } },</div><div class='add'>+	{ PINMUX_CFG_REG("INOUTSEL1", 0xFFC41004, 32, 1) { GP_INOUTSEL(1) } },</div><div class='add'>+	{ PINMUX_CFG_REG("INOUTSEL2", 0xFFC42004, 32, 1) { GP_INOUTSEL(2) } },</div><div class='add'>+	{ PINMUX_CFG_REG("INOUTSEL3", 0xFFC43004, 32, 1) { GP_INOUTSEL(3) } },</div><div class='add'>+	{ PINMUX_CFG_REG("INOUTSEL4", 0xFFC44004, 32, 1) { GP_INOUTSEL(4) } },</div><div class='add'>+	{ PINMUX_CFG_REG("INOUTSEL5", 0xffc45004, 32, 1) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 31 - 24 */</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 23 - 16 */</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, /* 15 - 12 */</div><div class='add'>+		GP_5_11_IN, GP_5_11_OUT,</div><div class='add'>+		GP_5_10_IN, GP_5_10_OUT,</div><div class='add'>+		GP_5_9_IN, GP_5_9_OUT,</div><div class='add'>+		GP_5_8_IN, GP_5_8_OUT,</div><div class='add'>+		GP_5_7_IN, GP_5_7_OUT,</div><div class='add'>+		GP_5_6_IN, GP_5_6_OUT,</div><div class='add'>+		GP_5_5_IN, GP_5_5_OUT,</div><div class='add'>+		GP_5_4_IN, GP_5_4_OUT,</div><div class='add'>+		GP_5_3_IN, GP_5_3_OUT,</div><div class='add'>+		GP_5_2_IN, GP_5_2_OUT,</div><div class='add'>+		GP_5_1_IN, GP_5_1_OUT,</div><div class='add'>+		GP_5_0_IN, GP_5_0_OUT }</div><div class='add'>+	},</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinmux_data_reg pinmux_data_regs[] = {</div><div class='add'>+	/* GPIO 0 - 5*/</div><div class='add'>+	{ PINMUX_DATA_REG("INDT0", 0xFFC4000C, 32) { GP_INDT(0) } },</div><div class='add'>+	{ PINMUX_DATA_REG("INDT1", 0xFFC4100C, 32) { GP_INDT(1) } },</div><div class='add'>+	{ PINMUX_DATA_REG("INDT2", 0xFFC4200C, 32) { GP_INDT(2) } },</div><div class='add'>+	{ PINMUX_DATA_REG("INDT3", 0xFFC4300C, 32) { GP_INDT(3) } },</div><div class='add'>+	{ PINMUX_DATA_REG("INDT4", 0xFFC4400C, 32) { GP_INDT(4) } },</div><div class='add'>+	{ PINMUX_DATA_REG("INDT5", 0xFFC4500C, 32) {</div><div class='add'>+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 0, 0, 0,</div><div class='add'>+		GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,</div><div class='add'>+		GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,</div><div class='add'>+		GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }</div><div class='add'>+	},</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource sh7734_pfc_resources[] = {</div><div class='add'>+	[0] = { /* PFC */</div><div class='add'>+		.start	= 0xFFFC0000,</div><div class='add'>+		.end	= 0xFFFC011C,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = { /* GPIO */</div><div class='add'>+		.start	= 0xFFC40000,</div><div class='add'>+		.end	= 0xFFC4502B,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinmux_info sh7734_pinmux_info = {</div><div class='add'>+	.name = "sh7734_pfc",</div><div class='add'>+</div><div class='add'>+	.resource = sh7734_pfc_resources,</div><div class='add'>+	.num_resources = ARRAY_SIZE(sh7734_pfc_resources),</div><div class='add'>+</div><div class='add'>+	.unlock_reg = 0xFFFC0000,</div><div class='add'>+</div><div class='add'>+	.reserved_id = PINMUX_RESERVED,</div><div class='add'>+	.data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },</div><div class='add'>+	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },</div><div class='add'>+	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },</div><div class='add'>+	.mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },</div><div class='add'>+	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },</div><div class='add'>+</div><div class='add'>+	.first_gpio = GPIO_GP_0_0,</div><div class='add'>+	.last_gpio = GPIO_FN_ST_CLKOUT,</div><div class='add'>+</div><div class='add'>+	.gpios = pinmux_gpios,</div><div class='add'>+	.cfg_regs = pinmux_config_regs,</div><div class='add'>+	.data_regs = pinmux_data_regs,</div><div class='add'>+</div><div class='add'>+	.gpio_data = pinmux_data,</div><div class='add'>+	.gpio_data_size = ARRAY_SIZE(pinmux_data),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init plat_pinmux_setup(void)</div><div class='add'>+{</div><div class='add'>+	return register_pinmux(&amp;sh7734_pinmux_info);</div><div class='add'>+}</div><div class='add'>+arch_initcall(plat_pinmux_setup);</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c<br/>index 1b8848317e9c..b91ea8300a3e 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7343.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/setup-sh7343.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7343.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7343.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> #include &lt;linux/uio_driver.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;asm/clock.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Serial */</div><div class='hunk'>@@ -22,7 +23,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 80, 80, 80, 80 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif0_device = {</div><div class='hunk'>@@ -39,7 +40,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 81, 81, 81, 81 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif1_device = {</div><div class='hunk'>@@ -56,7 +57,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 82, 82, 82, 82 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif2_device = {</div><div class='hunk'>@@ -73,7 +74,7 @@ static struct plat_sci_port scif3_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 83, 83, 83, 83 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc60)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif3_device = {</div><div class='hunk'>@@ -92,8 +93,8 @@ static struct resource iic0_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 96,</div><div class='del'>-		.end    = 99,</div><div class='add'>+		.start  = evt2irq(0xe00),</div><div class='add'>+		.end    = evt2irq(0xe60),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'>        },</div><div class='ctx'> };</div><div class='hunk'>@@ -113,8 +114,8 @@ static struct resource iic1_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 44,</div><div class='del'>-		.end    = 47,</div><div class='add'>+		.start  = evt2irq(0x780),</div><div class='add'>+		.end    = evt2irq(0x7e0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'>        },</div><div class='ctx'> };</div><div class='hunk'>@@ -129,7 +130,7 @@ static struct platform_device iic1_device = {</div><div class='ctx'> static struct uio_info vpu_platform_data = {</div><div class='ctx'> 	.name = "VPU4",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 60,</div><div class='add'>+	.irq = evt2irq(0x980),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource vpu_resources[] = {</div><div class='hunk'>@@ -157,7 +158,7 @@ static struct platform_device vpu_device = {</div><div class='ctx'> static struct uio_info veu_platform_data = {</div><div class='ctx'> 	.name = "VEU",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 54,</div><div class='add'>+	.irq = evt2irq(0x8c0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource veu_resources[] = {</div><div class='hunk'>@@ -185,7 +186,7 @@ static struct platform_device veu_device = {</div><div class='ctx'> static struct uio_info jpu_platform_data = {</div><div class='ctx'> 	.name = "JPU",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 27,</div><div class='add'>+	.irq = evt2irq(0x560),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource jpu_resources[] = {</div><div class='hunk'>@@ -224,7 +225,7 @@ static struct resource cmt_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 104,</div><div class='add'>+		.start	= evt2irq(0xf00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -252,7 +253,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -280,7 +281,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -307,7 +308,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c<br/>index 87773869a2f3..0bd09d51419f 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7366.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/setup-sh7366.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7366.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7366.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> #include &lt;linux/uio_driver.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/usb/r8a66597.h&gt;</div><div class='ctx'> #include &lt;asm/clock.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -25,7 +26,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 80, 80, 80, 80 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xc00)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif0_device = {</div><div class='hunk'>@@ -44,8 +45,8 @@ static struct resource iic_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 96,</div><div class='del'>-		.end    = 99,</div><div class='add'>+		.start  = evt2irq(0xe00),</div><div class='add'>+		.end    = evt2irq(0xe60),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'>        },</div><div class='ctx'> };</div><div class='hunk'>@@ -68,8 +69,8 @@ static struct resource usb_host_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 65,</div><div class='del'>-		.end    = 65,</div><div class='add'>+		.start  = evt2irq(0xa20),</div><div class='add'>+		.end    = evt2irq(0xa20),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -89,7 +90,7 @@ static struct platform_device usb_host_device = {</div><div class='ctx'> static struct uio_info vpu_platform_data = {</div><div class='ctx'> 	.name = "VPU5",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 60,</div><div class='add'>+	.irq = evt2irq(0x980),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource vpu_resources[] = {</div><div class='hunk'>@@ -117,7 +118,7 @@ static struct platform_device vpu_device = {</div><div class='ctx'> static struct uio_info veu0_platform_data = {</div><div class='ctx'> 	.name = "VEU",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 54,</div><div class='add'>+	.irq = evt2irq(0x8c0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource veu0_resources[] = {</div><div class='hunk'>@@ -145,7 +146,7 @@ static struct platform_device veu0_device = {</div><div class='ctx'> static struct uio_info veu1_platform_data = {</div><div class='ctx'> 	.name = "VEU",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 27,</div><div class='add'>+	.irq = evt2irq(0x560),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource veu1_resources[] = {</div><div class='hunk'>@@ -184,7 +185,7 @@ static struct resource cmt_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 104,</div><div class='add'>+		.start	= evt2irq(0xf00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -240,7 +241,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -267,7 +268,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c<br/>index 8420d4bc8bfc..0f5a21907da6 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7722.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/setup-sh7722.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7722.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7722.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/serial.h&gt;</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/uio_driver.h&gt;</div><div class='ctx'> #include &lt;linux/usb/m66592.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -147,20 +148,20 @@ static struct resource sh7722_dmae_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name	= "error_irq",</div><div class='del'>-		.start	= 78,</div><div class='del'>-		.end	= 78,</div><div class='add'>+		.start	= evt2irq(0xbc0),</div><div class='add'>+		.end	= evt2irq(0xbc0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 0-3 */</div><div class='del'>-		.start	= 48,</div><div class='del'>-		.end	= 51,</div><div class='add'>+		.start	= evt2irq(0x800),</div><div class='add'>+		.end	= evt2irq(0x860),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 4-5 */</div><div class='del'>-		.start	= 76,</div><div class='del'>-		.end	= 77,</div><div class='add'>+		.start	= evt2irq(0xb80),</div><div class='add'>+		.end	= evt2irq(0xba0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -182,7 +183,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 80, 80, 80, 80 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),</div><div class='ctx'> 	.ops		= &amp;sh7722_sci_port_ops,</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,</div><div class='ctx'> };</div><div class='hunk'>@@ -201,7 +202,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 81, 81, 81, 81 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),</div><div class='ctx'> 	.ops		= &amp;sh7722_sci_port_ops,</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,</div><div class='ctx'> };</div><div class='hunk'>@@ -220,7 +221,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 82, 82, 82, 82 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),</div><div class='ctx'> 	.ops		= &amp;sh7722_sci_port_ops,</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,</div><div class='ctx'> };</div><div class='hunk'>@@ -241,17 +242,17 @@ static struct resource rtc_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='ctx'> 		/* Period IRQ */</div><div class='del'>-		.start	= 45,</div><div class='add'>+		.start	= evt2irq(0x7a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='ctx'> 		/* Carry IRQ */</div><div class='del'>-		.start	= 46,</div><div class='add'>+		.start	= evt2irq(0x7c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[3] = {</div><div class='ctx'> 		/* Alarm IRQ */</div><div class='del'>-		.start	= 44,</div><div class='add'>+		.start	= evt2irq(0x780),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -275,8 +276,8 @@ static struct resource usbf_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 65,</div><div class='del'>-		.end	= 65,</div><div class='add'>+		.start	= evt2irq(0xa20),</div><div class='add'>+		.end	= evt2irq(0xa20),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -301,8 +302,8 @@ static struct resource iic_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 96,</div><div class='del'>-		.end    = 99,</div><div class='add'>+		.start  = evt2irq(0xe00),</div><div class='add'>+		.end    = evt2irq(0xe60),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'>        },</div><div class='ctx'> };</div><div class='hunk'>@@ -317,7 +318,7 @@ static struct platform_device iic_device = {</div><div class='ctx'> static struct uio_info vpu_platform_data = {</div><div class='ctx'> 	.name = "VPU4",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 60,</div><div class='add'>+	.irq = evt2irq(0x980),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource vpu_resources[] = {</div><div class='hunk'>@@ -345,7 +346,7 @@ static struct platform_device vpu_device = {</div><div class='ctx'> static struct uio_info veu_platform_data = {</div><div class='ctx'> 	.name = "VEU",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 54,</div><div class='add'>+	.irq = evt2irq(0x8c0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource veu_resources[] = {</div><div class='hunk'>@@ -373,7 +374,7 @@ static struct platform_device veu_device = {</div><div class='ctx'> static struct uio_info jpu_platform_data = {</div><div class='ctx'> 	.name = "JPU",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 27,</div><div class='add'>+	.irq = evt2irq(0x560),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource jpu_resources[] = {</div><div class='hunk'>@@ -412,7 +413,7 @@ static struct resource cmt_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 104,</div><div class='add'>+		.start	= evt2irq(0xf00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -440,7 +441,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -468,7 +469,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -525,7 +526,7 @@ static struct resource siu_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 108,</div><div class='add'>+		.start	= evt2irq(0xf80),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c<br/>index a188c9ea4393..28d6fd835fe0 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7723.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/setup-sh7723.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7723.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7723.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/uio_driver.h&gt;</div><div class='ctx'> #include &lt;linux/usb/r8a66597.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;asm/clock.h&gt;</div><div class='ctx'> #include &lt;asm/mmzone.h&gt;</div><div class='hunk'>@@ -28,7 +29,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 80, 80, 80, 80 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -47,7 +48,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 81, 81, 81, 81 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -66,7 +67,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 82, 82, 82, 82 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -85,7 +86,7 @@ static struct plat_sci_port scif3_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_3,</div><div class='ctx'> 	.type           = PORT_SCIFA,</div><div class='del'>-	.irqs           = { 56, 56, 56, 56 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif3_device = {</div><div class='hunk'>@@ -103,7 +104,7 @@ static struct plat_sci_port scif4_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_3,</div><div class='ctx'> 	.type           = PORT_SCIFA,</div><div class='del'>-	.irqs           = { 88, 88, 88, 88 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xd00)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif4_device = {</div><div class='hunk'>@@ -121,7 +122,7 @@ static struct plat_sci_port scif5_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_3,</div><div class='ctx'> 	.type           = PORT_SCIFA,</div><div class='del'>-	.irqs           = { 109, 109, 109, 109 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xfa0)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif5_device = {</div><div class='hunk'>@@ -135,7 +136,7 @@ static struct platform_device scif5_device = {</div><div class='ctx'> static struct uio_info vpu_platform_data = {</div><div class='ctx'> 	.name = "VPU5",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 60,</div><div class='add'>+	.irq = evt2irq(0x980),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource vpu_resources[] = {</div><div class='hunk'>@@ -163,7 +164,7 @@ static struct platform_device vpu_device = {</div><div class='ctx'> static struct uio_info veu0_platform_data = {</div><div class='ctx'> 	.name = "VEU2H",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 54,</div><div class='add'>+	.irq = evt2irq(0x8c0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource veu0_resources[] = {</div><div class='hunk'>@@ -191,7 +192,7 @@ static struct platform_device veu0_device = {</div><div class='ctx'> static struct uio_info veu1_platform_data = {</div><div class='ctx'> 	.name = "VEU2H",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 27,</div><div class='add'>+	.irq = evt2irq(0x560),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource veu1_resources[] = {</div><div class='hunk'>@@ -230,7 +231,7 @@ static struct resource cmt_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 104,</div><div class='add'>+		.start	= evt2irq(0xf00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -258,7 +259,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -286,7 +287,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -313,7 +314,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -340,7 +341,7 @@ static struct resource tmu3_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 57,</div><div class='add'>+		.start	= evt2irq(0x920),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -367,7 +368,7 @@ static struct resource tmu4_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 58,</div><div class='add'>+		.start	= evt2irq(0x940),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -394,7 +395,7 @@ static struct resource tmu5_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 57,</div><div class='add'>+		.start	= evt2irq(0x920),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -417,17 +418,17 @@ static struct resource rtc_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='ctx'> 		/* Period IRQ */</div><div class='del'>-		.start	= 69,</div><div class='add'>+		.start	= evt2irq(0xaa0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='ctx'> 		/* Carry IRQ */</div><div class='del'>-		.start	= 70,</div><div class='add'>+		.start	= evt2irq(0xac0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[3] = {</div><div class='ctx'> 		/* Alarm IRQ */</div><div class='del'>-		.start	= 68,</div><div class='add'>+		.start	= evt2irq(0xa80),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -450,8 +451,8 @@ static struct resource sh7723_usb_host_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 65,</div><div class='del'>-		.end	= 65,</div><div class='add'>+		.start	= evt2irq(0xa20),</div><div class='add'>+		.end	= evt2irq(0xa20),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -476,8 +477,8 @@ static struct resource iic_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 96,</div><div class='del'>-		.end    = 99,</div><div class='add'>+		.start  = evt2irq(0xe00),</div><div class='add'>+		.end    = evt2irq(0xe60),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'>        },</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c<br/>index 4c671cfe68aa..26b74c2f9496 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7724.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/setup-sh7724.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7724.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7724.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;linux/uio_driver.h&gt;</div><div class='ctx'> #include &lt;linux/sh_dma.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/notifier.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -215,20 +216,20 @@ static struct resource sh7724_dmae0_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name	= "error_irq",</div><div class='del'>-		.start	= 78,</div><div class='del'>-		.end	= 78,</div><div class='add'>+		.start	= evt2irq(0xbc0),</div><div class='add'>+		.end	= evt2irq(0xbc0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 0-3 */</div><div class='del'>-		.start	= 48,</div><div class='del'>-		.end	= 51,</div><div class='add'>+		.start	= evt2irq(0x800),</div><div class='add'>+		.end	= evt2irq(0x860),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 4-5 */</div><div class='del'>-		.start	= 76,</div><div class='del'>-		.end	= 77,</div><div class='add'>+		.start	= evt2irq(0xb80),</div><div class='add'>+		.end	= evt2irq(0xba0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -249,20 +250,20 @@ static struct resource sh7724_dmae1_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name	= "error_irq",</div><div class='del'>-		.start	= 74,</div><div class='del'>-		.end	= 74,</div><div class='add'>+		.start	= evt2irq(0xb40),</div><div class='add'>+		.end	= evt2irq(0xb40),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 0-3 */</div><div class='del'>-		.start	= 40,</div><div class='del'>-		.end	= 43,</div><div class='add'>+		.start	= evt2irq(0x700),</div><div class='add'>+		.end	= evt2irq(0x760),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 4-5 */</div><div class='del'>-		.start	= 72,</div><div class='del'>-		.end	= 73,</div><div class='add'>+		.start	= evt2irq(0xb00),</div><div class='add'>+		.end	= evt2irq(0xb20),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -295,7 +296,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 80, 80, 80, 80 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -314,7 +315,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 81, 81, 81, 81 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -333,7 +334,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type           = PORT_SCIF,</div><div class='del'>-	.irqs           = { 82, 82, 82, 82 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -352,7 +353,7 @@ static struct plat_sci_port scif3_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_3,</div><div class='ctx'> 	.type           = PORT_SCIFA,</div><div class='del'>-	.irqs           = { 56, 56, 56, 56 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif3_device = {</div><div class='hunk'>@@ -370,7 +371,7 @@ static struct plat_sci_port scif4_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_3,</div><div class='ctx'> 	.type           = PORT_SCIFA,</div><div class='del'>-	.irqs           = { 88, 88, 88, 88 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xd00)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif4_device = {</div><div class='hunk'>@@ -388,7 +389,7 @@ static struct plat_sci_port scif5_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_3,</div><div class='ctx'> 	.type           = PORT_SCIFA,</div><div class='del'>-	.irqs           = { 109, 109, 109, 109 },</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xfa0)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif5_device = {</div><div class='hunk'>@@ -408,17 +409,17 @@ static struct resource rtc_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='ctx'> 		/* Period IRQ */</div><div class='del'>-		.start	= 69,</div><div class='add'>+		.start	= evt2irq(0xaa0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[2] = {</div><div class='ctx'> 		/* Carry IRQ */</div><div class='del'>-		.start	= 70,</div><div class='add'>+		.start	= evt2irq(0xac0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	[3] = {</div><div class='ctx'> 		/* Alarm IRQ */</div><div class='del'>-		.start	= 68,</div><div class='add'>+		.start	= evt2irq(0xa80),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -439,8 +440,8 @@ static struct resource iic0_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 96,</div><div class='del'>-		.end    = 99,</div><div class='add'>+		.start  = evt2irq(0xe00),</div><div class='add'>+		.end    = evt2irq(0xe60),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -461,8 +462,8 @@ static struct resource iic1_resources[] = {</div><div class='ctx'> 		.flags  = IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start  = 92,</div><div class='del'>-		.end    = 95,</div><div class='add'>+		.start  = evt2irq(0xd80),</div><div class='add'>+		.end    = evt2irq(0xde0),</div><div class='ctx'> 		.flags  = IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -478,7 +479,7 @@ static struct platform_device iic1_device = {</div><div class='ctx'> static struct uio_info vpu_platform_data = {</div><div class='ctx'> 	.name = "VPU5F",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 60,</div><div class='add'>+	.irq = evt2irq(0x980),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource vpu_resources[] = {</div><div class='hunk'>@@ -507,7 +508,7 @@ static struct platform_device vpu_device = {</div><div class='ctx'> static struct uio_info veu0_platform_data = {</div><div class='ctx'> 	.name = "VEU3F0",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 83,</div><div class='add'>+	.irq = evt2irq(0xc60),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource veu0_resources[] = {</div><div class='hunk'>@@ -536,7 +537,7 @@ static struct platform_device veu0_device = {</div><div class='ctx'> static struct uio_info veu1_platform_data = {</div><div class='ctx'> 	.name = "VEU3F1",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 54,</div><div class='add'>+	.irq = evt2irq(0x8c0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource veu1_resources[] = {</div><div class='hunk'>@@ -633,7 +634,7 @@ static struct resource cmt_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 104,</div><div class='add'>+		.start	= evt2irq(0xf00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -661,7 +662,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -689,7 +690,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -716,7 +717,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -744,7 +745,7 @@ static struct resource tmu3_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 57,</div><div class='add'>+		.start	= evt2irq(0x920),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -771,7 +772,7 @@ static struct resource tmu4_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 58,</div><div class='add'>+		.start	= evt2irq(0x940),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -798,7 +799,7 @@ static struct resource tmu5_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 57,</div><div class='add'>+		.start	= evt2irq(0x920),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -817,7 +818,7 @@ static struct platform_device tmu5_device = {</div><div class='ctx'> static struct uio_info jpu_platform_data = {</div><div class='ctx'> 	.name = "JPU",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 27,</div><div class='add'>+	.irq = evt2irq(0x560),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource jpu_resources[] = {</div><div class='hunk'>@@ -846,7 +847,7 @@ static struct platform_device jpu_device = {</div><div class='ctx'> static struct uio_info spu0_platform_data = {</div><div class='ctx'> 	.name = "SPU2DSP0",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 86,</div><div class='add'>+	.irq = evt2irq(0xcc0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource spu0_resources[] = {</div><div class='hunk'>@@ -875,7 +876,7 @@ static struct platform_device spu0_device = {</div><div class='ctx'> static struct uio_info spu1_platform_data = {</div><div class='ctx'> 	.name = "SPU2DSP1",</div><div class='ctx'> 	.version = "0",</div><div class='del'>-	.irq = 87,</div><div class='add'>+	.irq = evt2irq(0xce0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct resource spu1_resources[] = {</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c<br/>new file mode 100644<br/>index 000000000000..f799971d453c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7734.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7734.c</a></div><div class='hunk'>@@ -0,0 +1,800 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/sh/kernel/cpu/sh4a/setup-sh7734.c</div><div class='add'>+</div><div class='add'>+ * SH7734 Setup</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011,2012 Nobuhiro Iwamatsu &lt;nobuhiro.iwamatsu.yj@renesas.com&gt;</div><div class='add'>+ * Copyright (C) 2011,2012 Renesas Solutions Corp.</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/serial.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/serial_sci.h&gt;</div><div class='add'>+#include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;asm/clock.h&gt;</div><div class='add'>+#include &lt;asm/irq.h&gt;</div><div class='add'>+#include &lt;cpu/sh7734.h&gt;</div><div class='add'>+</div><div class='add'>+/* SCIF */</div><div class='add'>+static struct plat_sci_port scif0_platform_data = {</div><div class='add'>+	.mapbase        = 0xFFE40000,</div><div class='add'>+	.flags          = UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='add'>+	.scbrr_algo_id  = SCBRR_ALGO_2,</div><div class='add'>+	.type           = PORT_SCIF,</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x8C0)),</div><div class='add'>+	.regtype        = SCIx_SH4_SCIF_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif0_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id			= 0,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif0_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif1_platform_data = {</div><div class='add'>+	.mapbase        = 0xFFE41000,</div><div class='add'>+	.flags          = UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type           = PORT_SCIF,</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x8E0)),</div><div class='add'>+	.regtype        = SCIx_SH4_SCIF_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif1_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id         = 1,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data = &amp;scif1_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif2_platform_data = {</div><div class='add'>+	.mapbase        = 0xFFE42000,</div><div class='add'>+	.flags          = UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='add'>+	.scbrr_algo_id  = SCBRR_ALGO_2,</div><div class='add'>+	.type           = PORT_SCIF,</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),</div><div class='add'>+	.regtype        = SCIx_SH4_SCIF_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif2_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id         = 2,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data = &amp;scif2_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif3_platform_data = {</div><div class='add'>+	.mapbase        = 0xFFE43000,</div><div class='add'>+	.flags          = UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,</div><div class='add'>+	.scbrr_algo_id  = SCBRR_ALGO_2,</div><div class='add'>+	.type           = PORT_SCIF,</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x920)),</div><div class='add'>+	.regtype        = SCIx_SH4_SCIF_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif3_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id	        = 3,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif3_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif4_platform_data = {</div><div class='add'>+	.mapbase        = 0xFFE44000,</div><div class='add'>+	.flags          = UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type           = PORT_SCIF,</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x940)),</div><div class='add'>+	.regtype        = SCIx_SH4_SCIF_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif4_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id	        = 4,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif4_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plat_sci_port scif5_platform_data = {</div><div class='add'>+	.mapbase        = 0xFFE43000,</div><div class='add'>+	.flags          = UPF_BOOT_AUTOCONF,</div><div class='add'>+	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='add'>+	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='add'>+	.type           = PORT_SCIF,</div><div class='add'>+	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x960)),</div><div class='add'>+	.regtype		= SCIx_SH4_SCIF_REGTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device scif5_device = {</div><div class='add'>+	.name		= "sh-sci",</div><div class='add'>+	.id	        = 5,</div><div class='add'>+	.dev		= {</div><div class='add'>+		.platform_data	= &amp;scif5_platform_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RTC */</div><div class='add'>+static struct resource rtc_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "rtc",</div><div class='add'>+		.start	= 0xFFFC5000,</div><div class='add'>+		.end	= 0xFFFC5000 + 0x26 - 1,</div><div class='add'>+		.flags	= IORESOURCE_IO,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= evt2irq(0xC00),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device rtc_device = {</div><div class='add'>+	.name		= "sh-rtc",</div><div class='add'>+	.id		= -1,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(rtc_resources),</div><div class='add'>+	.resource	= rtc_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C 0 */</div><div class='add'>+static struct resource i2c0_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.name	= "IIC0",</div><div class='add'>+		.start  = 0xFFC70000,</div><div class='add'>+		.end    = 0xFFC7000A - 1,</div><div class='add'>+		.flags  = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start  = evt2irq(0x860),</div><div class='add'>+		.flags  = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device i2c0_device = {</div><div class='add'>+	.name           = "i2c-sh7734",</div><div class='add'>+	.id             = 0,</div><div class='add'>+	.num_resources  = ARRAY_SIZE(i2c0_resources),</div><div class='add'>+	.resource       = i2c0_resources,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TMU */</div><div class='add'>+static struct sh_timer_config tmu0_platform_data = {</div><div class='add'>+	.channel_offset = 0x04,</div><div class='add'>+	.timer_bit = 0,</div><div class='add'>+	.clockevent_rating = 200,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource tmu0_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xFFD80008,</div><div class='add'>+		.end	= 0xFFD80014 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device tmu0_device = {</div><div class='add'>+	.name	= "sh_tmu",</div><div class='add'>+	.id		= 0,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;tmu0_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= tmu0_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(tmu0_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config tmu1_platform_data = {</div><div class='add'>+	.channel_offset = 0x10,</div><div class='add'>+	.timer_bit = 1,</div><div class='add'>+	.clocksource_rating = 200,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource tmu1_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xFFD80014,</div><div class='add'>+		.end	= 0xFFD80020 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device tmu1_device = {</div><div class='add'>+	.name		= "sh_tmu",</div><div class='add'>+	.id			= 1,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;tmu1_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= tmu1_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(tmu1_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config tmu2_platform_data = {</div><div class='add'>+	.channel_offset = 0x1c,</div><div class='add'>+	.timer_bit = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource tmu2_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xFFD80020,</div><div class='add'>+		.end	= 0xFFD80030 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device tmu2_device = {</div><div class='add'>+	.name		= "sh_tmu",</div><div class='add'>+	.id			= 2,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;tmu2_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= tmu2_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(tmu2_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config tmu3_platform_data = {</div><div class='add'>+	.channel_offset = 0x04,</div><div class='add'>+	.timer_bit = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource tmu3_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xFFD81008,</div><div class='add'>+		.end	= 0xFFD81014 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= evt2irq(0x480),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device tmu3_device = {</div><div class='add'>+	.name		= "sh_tmu",</div><div class='add'>+	.id			= 3,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;tmu3_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= tmu3_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(tmu3_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config tmu4_platform_data = {</div><div class='add'>+	.channel_offset = 0x10,</div><div class='add'>+	.timer_bit = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource tmu4_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xFFD81014,</div><div class='add'>+		.end	= 0xFFD81020 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= evt2irq(0x4A0),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device tmu4_device = {</div><div class='add'>+	.name		= "sh_tmu",</div><div class='add'>+	.id			= 4,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;tmu4_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= tmu4_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(tmu4_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config tmu5_platform_data = {</div><div class='add'>+	.channel_offset = 0x1c,</div><div class='add'>+	.timer_bit = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource tmu5_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xFFD81020,</div><div class='add'>+		.end	= 0xFFD81030 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= evt2irq(0x4C0),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device tmu5_device = {</div><div class='add'>+	.name		= "sh_tmu",</div><div class='add'>+	.id			= 5,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;tmu5_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= tmu5_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(tmu5_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config tmu6_platform_data = {</div><div class='add'>+	.channel_offset = 0x4,</div><div class='add'>+	.timer_bit = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource tmu6_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xFFD82008,</div><div class='add'>+		.end	= 0xFFD82014 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= evt2irq(0x500),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device tmu6_device = {</div><div class='add'>+	.name		= "sh_tmu",</div><div class='add'>+	.id			= 6,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;tmu6_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= tmu6_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(tmu6_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config tmu7_platform_data = {</div><div class='add'>+	.channel_offset = 0x10,</div><div class='add'>+	.timer_bit = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource tmu7_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xFFD82014,</div><div class='add'>+		.end	= 0xFFD82020 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= evt2irq(0x520),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device tmu7_device = {</div><div class='add'>+	.name		= "sh_tmu",</div><div class='add'>+	.id			= 7,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;tmu7_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= tmu7_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(tmu7_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sh_timer_config tmu8_platform_data = {</div><div class='add'>+	.channel_offset = 0x1c,</div><div class='add'>+	.timer_bit = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource tmu8_resources[] = {</div><div class='add'>+	[0] = {</div><div class='add'>+		.start	= 0xFFD82020,</div><div class='add'>+		.end	= 0xFFD82030 - 1,</div><div class='add'>+		.flags	= IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+	[1] = {</div><div class='add'>+		.start	= evt2irq(0x540),</div><div class='add'>+		.flags	= IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device tmu8_device = {</div><div class='add'>+	.name		= "sh_tmu",</div><div class='add'>+	.id			= 8,</div><div class='add'>+	.dev = {</div><div class='add'>+		.platform_data	= &amp;tmu8_platform_data,</div><div class='add'>+	},</div><div class='add'>+	.resource	= tmu8_resources,</div><div class='add'>+	.num_resources	= ARRAY_SIZE(tmu8_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *sh7734_devices[] __initdata = {</div><div class='add'>+	&amp;scif0_device,</div><div class='add'>+	&amp;scif1_device,</div><div class='add'>+	&amp;scif2_device,</div><div class='add'>+	&amp;scif3_device,</div><div class='add'>+	&amp;scif4_device,</div><div class='add'>+	&amp;scif5_device,</div><div class='add'>+	&amp;tmu0_device,</div><div class='add'>+	&amp;tmu1_device,</div><div class='add'>+	&amp;tmu2_device,</div><div class='add'>+	&amp;tmu3_device,</div><div class='add'>+	&amp;tmu4_device,</div><div class='add'>+	&amp;tmu5_device,</div><div class='add'>+	&amp;tmu6_device,</div><div class='add'>+	&amp;tmu7_device,</div><div class='add'>+	&amp;tmu8_device,</div><div class='add'>+	&amp;rtc_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *sh7734_early_devices[] __initdata = {</div><div class='add'>+	&amp;scif0_device,</div><div class='add'>+	&amp;scif1_device,</div><div class='add'>+	&amp;scif2_device,</div><div class='add'>+	&amp;scif3_device,</div><div class='add'>+	&amp;scif4_device,</div><div class='add'>+	&amp;scif5_device,</div><div class='add'>+	&amp;tmu0_device,</div><div class='add'>+	&amp;tmu1_device,</div><div class='add'>+	&amp;tmu2_device,</div><div class='add'>+	&amp;tmu3_device,</div><div class='add'>+	&amp;tmu4_device,</div><div class='add'>+	&amp;tmu5_device,</div><div class='add'>+	&amp;tmu6_device,</div><div class='add'>+	&amp;tmu7_device,</div><div class='add'>+	&amp;tmu8_device,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init plat_early_device_setup(void)</div><div class='add'>+{</div><div class='add'>+	early_platform_add_devices(sh7734_early_devices,</div><div class='add'>+		ARRAY_SIZE(sh7734_early_devices));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define GROUP 0</div><div class='add'>+enum {</div><div class='add'>+	UNUSED = 0,</div><div class='add'>+</div><div class='add'>+	/* interrupt sources */</div><div class='add'>+</div><div class='add'>+	IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,</div><div class='add'>+	IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,</div><div class='add'>+	IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH,</div><div class='add'>+	IRL0_HHLL, IRL0_HHLH, IRL0_HHHL,</div><div class='add'>+</div><div class='add'>+	IRQ0, IRQ1, IRQ2, IRQ3,</div><div class='add'>+	DU,</div><div class='add'>+	TMU00, TMU10, TMU20, TMU21,</div><div class='add'>+	TMU30, TMU40, TMU50, TMU51,</div><div class='add'>+	TMU60, TMU70, TMU80,</div><div class='add'>+	RESET_WDT,</div><div class='add'>+	USB,</div><div class='add'>+	HUDI,</div><div class='add'>+	SHDMAC,</div><div class='add'>+	SSI0, SSI1,	SSI2, SSI3,</div><div class='add'>+	VIN0,</div><div class='add'>+	RGPVG,</div><div class='add'>+	_2DG,</div><div class='add'>+	MMC,</div><div class='add'>+	HSPI,</div><div class='add'>+	LBSCATA,</div><div class='add'>+	I2C0,</div><div class='add'>+	RCAN0,</div><div class='add'>+	MIMLB,</div><div class='add'>+	SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5,</div><div class='add'>+	LBSCDMAC0, LBSCDMAC1, LBSCDMAC2,</div><div class='add'>+	RCAN1,</div><div class='add'>+	SDHI0, SDHI1,</div><div class='add'>+	IEBUS,</div><div class='add'>+	HPBDMAC0_3, HPBDMAC4_10, HPBDMAC11_18, HPBDMAC19_22, HPBDMAC23_25_27_28,</div><div class='add'>+	RTC,</div><div class='add'>+	VIN1,</div><div class='add'>+	LCDC,</div><div class='add'>+	SRC0, SRC1,</div><div class='add'>+	GETHER,</div><div class='add'>+	SDHI2,</div><div class='add'>+	GPIO0_3, GPIO4_5,</div><div class='add'>+	STIF0, STIF1,</div><div class='add'>+	ADMAC,</div><div class='add'>+	HIF,</div><div class='add'>+	FLCTL,</div><div class='add'>+	ADC,</div><div class='add'>+	MTU2,</div><div class='add'>+	RSPI,</div><div class='add'>+	QSPI,</div><div class='add'>+	HSCIF,</div><div class='add'>+	VEU3F_VE3,</div><div class='add'>+</div><div class='add'>+	/* Group */</div><div class='add'>+	/* Mask */</div><div class='add'>+	STIF_M,</div><div class='add'>+	GPIO_M,</div><div class='add'>+	HPBDMAC_M,</div><div class='add'>+	LBSCDMAC_M,</div><div class='add'>+	RCAN_M,</div><div class='add'>+	SRC_M,</div><div class='add'>+	SCIF_M,</div><div class='add'>+	LCDC_M,</div><div class='add'>+	_2DG_M,</div><div class='add'>+	VIN_M,</div><div class='add'>+	TMU_3_M,</div><div class='add'>+	TMU_0_M,</div><div class='add'>+</div><div class='add'>+	/* Priority */</div><div class='add'>+	RCAN_P,</div><div class='add'>+	LBSCDMAC_P,</div><div class='add'>+</div><div class='add'>+	/* Common */</div><div class='add'>+	SDHI,</div><div class='add'>+	SSI,</div><div class='add'>+	SPI,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_vect vectors[] __initdata = {</div><div class='add'>+	INTC_VECT(DU, 0x3E0),</div><div class='add'>+	INTC_VECT(TMU00, 0x400),</div><div class='add'>+	INTC_VECT(TMU10, 0x420),</div><div class='add'>+	INTC_VECT(TMU20, 0x440),</div><div class='add'>+	INTC_VECT(TMU30, 0x480),</div><div class='add'>+	INTC_VECT(TMU40, 0x4A0),</div><div class='add'>+	INTC_VECT(TMU50, 0x4C0),</div><div class='add'>+	INTC_VECT(TMU51, 0x4E0),</div><div class='add'>+	INTC_VECT(TMU60, 0x500),</div><div class='add'>+	INTC_VECT(TMU70, 0x520),</div><div class='add'>+	INTC_VECT(TMU80, 0x540),</div><div class='add'>+	INTC_VECT(RESET_WDT, 0x560),</div><div class='add'>+	INTC_VECT(USB, 0x580),</div><div class='add'>+	INTC_VECT(HUDI, 0x600),</div><div class='add'>+	INTC_VECT(SHDMAC, 0x620),</div><div class='add'>+	INTC_VECT(SSI0, 0x6C0),</div><div class='add'>+	INTC_VECT(SSI1, 0x6E0),</div><div class='add'>+	INTC_VECT(SSI2, 0x700),</div><div class='add'>+	INTC_VECT(SSI3, 0x720),</div><div class='add'>+	INTC_VECT(VIN0, 0x740),</div><div class='add'>+	INTC_VECT(RGPVG, 0x760),</div><div class='add'>+	INTC_VECT(_2DG, 0x780),</div><div class='add'>+	INTC_VECT(MMC, 0x7A0),</div><div class='add'>+	INTC_VECT(HSPI, 0x7E0),</div><div class='add'>+	INTC_VECT(LBSCATA, 0x840),</div><div class='add'>+	INTC_VECT(I2C0, 0x860),</div><div class='add'>+	INTC_VECT(RCAN0, 0x880),</div><div class='add'>+	INTC_VECT(SCIF0, 0x8A0),</div><div class='add'>+	INTC_VECT(SCIF1, 0x8C0),</div><div class='add'>+	INTC_VECT(SCIF2, 0x900),</div><div class='add'>+	INTC_VECT(SCIF3, 0x920),</div><div class='add'>+	INTC_VECT(SCIF4, 0x940),</div><div class='add'>+	INTC_VECT(SCIF5, 0x960),</div><div class='add'>+	INTC_VECT(LBSCDMAC0, 0x9E0),</div><div class='add'>+	INTC_VECT(LBSCDMAC1, 0xA00),</div><div class='add'>+	INTC_VECT(LBSCDMAC2, 0xA20),</div><div class='add'>+	INTC_VECT(RCAN1, 0xA60),</div><div class='add'>+	INTC_VECT(SDHI0, 0xAE0),</div><div class='add'>+	INTC_VECT(SDHI1, 0xB00),</div><div class='add'>+	INTC_VECT(IEBUS, 0xB20),</div><div class='add'>+	INTC_VECT(HPBDMAC0_3, 0xB60),</div><div class='add'>+	INTC_VECT(HPBDMAC4_10, 0xB80),</div><div class='add'>+	INTC_VECT(HPBDMAC11_18, 0xBA0),</div><div class='add'>+	INTC_VECT(HPBDMAC19_22, 0xBC0),</div><div class='add'>+	INTC_VECT(HPBDMAC23_25_27_28, 0xBE0),</div><div class='add'>+	INTC_VECT(RTC, 0xC00),</div><div class='add'>+	INTC_VECT(VIN1, 0xC20),</div><div class='add'>+	INTC_VECT(LCDC, 0xC40),</div><div class='add'>+	INTC_VECT(SRC0, 0xC60),</div><div class='add'>+	INTC_VECT(SRC1, 0xC80),</div><div class='add'>+	INTC_VECT(GETHER, 0xCA0),</div><div class='add'>+	INTC_VECT(SDHI2, 0xCC0),</div><div class='add'>+	INTC_VECT(GPIO0_3, 0xCE0),</div><div class='add'>+	INTC_VECT(GPIO4_5, 0xD00),</div><div class='add'>+	INTC_VECT(STIF0, 0xD20),</div><div class='add'>+	INTC_VECT(STIF1, 0xD40),</div><div class='add'>+	INTC_VECT(ADMAC, 0xDA0),</div><div class='add'>+	INTC_VECT(HIF, 0xDC0),</div><div class='add'>+	INTC_VECT(FLCTL, 0xDE0),</div><div class='add'>+	INTC_VECT(ADC, 0xE00),</div><div class='add'>+	INTC_VECT(MTU2, 0xE20),</div><div class='add'>+	INTC_VECT(RSPI, 0xE40),</div><div class='add'>+	INTC_VECT(QSPI, 0xE60),</div><div class='add'>+	INTC_VECT(HSCIF, 0xFC0),</div><div class='add'>+	INTC_VECT(VEU3F_VE3, 0xF40),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_group groups[] __initdata = {</div><div class='add'>+	/* Common */</div><div class='add'>+	INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2),</div><div class='add'>+	INTC_GROUP(SPI, HSPI, RSPI, QSPI),</div><div class='add'>+	INTC_GROUP(SSI, SSI0, SSI1, SSI2, SSI3),</div><div class='add'>+</div><div class='add'>+	/* Mask group */</div><div class='add'>+	INTC_GROUP(STIF_M, STIF0, STIF1), /* 22 */</div><div class='add'>+	INTC_GROUP(GPIO_M, GPIO0_3, GPIO4_5), /* 21 */</div><div class='add'>+	INTC_GROUP(HPBDMAC_M, HPBDMAC0_3, HPBDMAC4_10, HPBDMAC11_18,</div><div class='add'>+			HPBDMAC19_22, HPBDMAC23_25_27_28), /* 19 */</div><div class='add'>+	INTC_GROUP(LBSCDMAC_M, LBSCDMAC0, LBSCDMAC1, LBSCDMAC2), /* 18 */</div><div class='add'>+	INTC_GROUP(RCAN_M, RCAN0, RCAN1, IEBUS), /* 17 */</div><div class='add'>+	INTC_GROUP(SRC_M, SRC0, SRC1), /* 16 */</div><div class='add'>+	INTC_GROUP(SCIF_M, SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5,</div><div class='add'>+			HSCIF), /* 14 */</div><div class='add'>+	INTC_GROUP(LCDC_M, LCDC, MIMLB), /* 13 */</div><div class='add'>+	INTC_GROUP(_2DG_M, _2DG, RGPVG), /* 12 */</div><div class='add'>+	INTC_GROUP(VIN_M, VIN0, VIN1), /* 10 */</div><div class='add'>+	INTC_GROUP(TMU_3_M, TMU30, TMU40, TMU50, TMU51,</div><div class='add'>+			TMU60, TMU60, TMU70, TMU80), /* 2 */</div><div class='add'>+	INTC_GROUP(TMU_0_M, TMU00, TMU10, TMU20, TMU21), /* 1 */</div><div class='add'>+</div><div class='add'>+	/* Priority group*/</div><div class='add'>+	INTC_GROUP(RCAN_P, RCAN0, RCAN1), /* INT2PRI5 */</div><div class='add'>+	INTC_GROUP(LBSCDMAC_P, LBSCDMAC0, LBSCDMAC1), /* INT2PRI5 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_mask_reg mask_registers[] __initdata = {</div><div class='add'>+	{ 0xFF804040, 0xFF804044, 32, /* INT2MSKRG / INT2MSKCR */</div><div class='add'>+	  { 0,</div><div class='add'>+		VEU3F_VE3,</div><div class='add'>+		SDHI, /* SDHI 0-2 */</div><div class='add'>+		ADMAC,</div><div class='add'>+		FLCTL,</div><div class='add'>+		RESET_WDT,</div><div class='add'>+		HIF,</div><div class='add'>+		ADC,</div><div class='add'>+		MTU2,</div><div class='add'>+		STIF_M, /* STIF 0,1 */</div><div class='add'>+		GPIO_M, /* GPIO 0-5*/</div><div class='add'>+		GETHER,</div><div class='add'>+		HPBDMAC_M, /* HPBDMAC 0_3 - 23_25_27_28 */</div><div class='add'>+		LBSCDMAC_M, /* LBSCDMAC 0 - 2 */</div><div class='add'>+		RCAN_M, /* RCAN, IEBUS */</div><div class='add'>+		SRC_M,	/* SRC 0,1 */</div><div class='add'>+		LBSCATA,</div><div class='add'>+		SCIF_M, /* SCIF 0-5, HSCIF */</div><div class='add'>+		LCDC_M, /* LCDC, MIMLB */</div><div class='add'>+		_2DG_M,	/* 2DG, RGPVG */</div><div class='add'>+		SPI, /* HSPI, RSPI, QSPI */</div><div class='add'>+		VIN_M,	/* VIN0, 1 */</div><div class='add'>+		SSI,	/* SSI 0-3 */</div><div class='add'>+		USB,</div><div class='add'>+		SHDMAC,</div><div class='add'>+		HUDI,</div><div class='add'>+		MMC,</div><div class='add'>+		RTC,</div><div class='add'>+		I2C0, /* I2C */ /* I2C 0, 1*/</div><div class='add'>+		TMU_3_M, /* TMU30 - TMU80 */</div><div class='add'>+		TMU_0_M, /* TMU00 - TMU21 */</div><div class='add'>+		DU } },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_prio_reg prio_registers[] __initdata = {</div><div class='add'>+	{ 0xFF804000, 0, 32, 8, /* INT2PRI0 */</div><div class='add'>+		{ DU, TMU00, TMU10, TMU20 } },</div><div class='add'>+	{ 0xFF804004, 0, 32, 8, /* INT2PRI1 */</div><div class='add'>+		{ TMU30, TMU60, RTC, SDHI } },</div><div class='add'>+	{ 0xFF804008, 0, 32, 8, /* INT2PRI2 */</div><div class='add'>+		{ HUDI, SHDMAC, USB, SSI } },</div><div class='add'>+	{ 0xFF80400C, 0, 32, 8, /* INT2PRI3 */</div><div class='add'>+		{ VIN0, SPI, _2DG, LBSCATA } },</div><div class='add'>+	{ 0xFF804010, 0, 32, 8, /* INT2PRI4 */</div><div class='add'>+		{ SCIF0, SCIF3, HSCIF, LCDC } },</div><div class='add'>+	{ 0xFF804014, 0, 32, 8, /* INT2PRI5 */</div><div class='add'>+		{ RCAN_P, LBSCDMAC_P, LBSCDMAC2, MMC } },</div><div class='add'>+	{ 0xFF804018, 0, 32, 8, /* INT2PRI6 */</div><div class='add'>+		{ HPBDMAC0_3, HPBDMAC4_10, HPBDMAC11_18, HPBDMAC19_22 } },</div><div class='add'>+	{ 0xFF80401C, 0, 32, 8, /* INT2PRI7 */</div><div class='add'>+		{ HPBDMAC23_25_27_28, I2C0, SRC0, SRC1 } },</div><div class='add'>+	{ 0xFF804020, 0, 32, 8, /* INT2PRI8 */</div><div class='add'>+		{ 0 /* ADIF */, VIN1, RESET_WDT, HIF } },</div><div class='add'>+	{ 0xFF804024, 0, 32, 8, /* INT2PRI9 */</div><div class='add'>+		{ ADMAC, FLCTL, GPIO0_3, GPIO4_5 } },</div><div class='add'>+	{ 0xFF804028, 0, 32, 8, /* INT2PRI10 */</div><div class='add'>+		{ STIF0, STIF1, VEU3F_VE3, GETHER } },</div><div class='add'>+	{ 0xFF80402C, 0, 32, 8, /* INT2PRI11 */</div><div class='add'>+		{ MTU2, RGPVG, MIMLB, IEBUS } },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DECLARE_INTC_DESC(intc_desc, "sh7734", vectors, groups,</div><div class='add'>+	mask_registers, prio_registers, NULL);</div><div class='add'>+</div><div class='add'>+/* Support for external interrupt pins in IRQ mode */</div><div class='add'>+</div><div class='add'>+static struct intc_vect irq3210_vectors[] __initdata = {</div><div class='add'>+	INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),</div><div class='add'>+	INTC_VECT(IRQ2, 0x2C0), INTC_VECT(IRQ3, 0x300),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_sense_reg irq3210_sense_registers[] __initdata = {</div><div class='add'>+	{ 0xFF80201C, 32, 2, /* ICR1 */</div><div class='add'>+	{ IRQ0, IRQ1, IRQ2, IRQ3, } },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_mask_reg irq3210_ack_registers[] __initdata = {</div><div class='add'>+	{ 0xFF802024, 0, 32, /* INTREQ */</div><div class='add'>+	{ IRQ0, IRQ1, IRQ2, IRQ3, } },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_mask_reg irq3210_mask_registers[] __initdata = {</div><div class='add'>+	{ 0xFF802044, 0xFF802064, 32, /* INTMSK0 / INTMSKCLR0 */</div><div class='add'>+	{ IRQ0, IRQ1, IRQ2, IRQ3, } },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct intc_prio_reg irq3210_prio_registers[] __initdata = {</div><div class='add'>+	{ 0xFF802010, 0, 32, 4, /* INTPRI */</div><div class='add'>+	{ IRQ0, IRQ1, IRQ2, IRQ3, } },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DECLARE_INTC_DESC_ACK(intc_desc_irq3210, "sh7734-irq3210",</div><div class='add'>+	irq3210_vectors, NULL,</div><div class='add'>+	irq3210_mask_registers, irq3210_prio_registers,</div><div class='add'>+	irq3210_sense_registers, irq3210_ack_registers);</div><div class='add'>+</div><div class='add'>+/* External interrupt pins in IRL mode */</div><div class='add'>+</div><div class='add'>+static struct intc_vect vectors_irl3210[] __initdata = {</div><div class='add'>+	INTC_VECT(IRL0_LLLL, 0x200), INTC_VECT(IRL0_LLLH, 0x220),</div><div class='add'>+	INTC_VECT(IRL0_LLHL, 0x240), INTC_VECT(IRL0_LLHH, 0x260),</div><div class='add'>+	INTC_VECT(IRL0_LHLL, 0x280), INTC_VECT(IRL0_LHLH, 0x2a0),</div><div class='add'>+	INTC_VECT(IRL0_LHHL, 0x2c0), INTC_VECT(IRL0_LHHH, 0x2e0),</div><div class='add'>+	INTC_VECT(IRL0_HLLL, 0x300), INTC_VECT(IRL0_HLLH, 0x320),</div><div class='add'>+	INTC_VECT(IRL0_HLHL, 0x340), INTC_VECT(IRL0_HLHH, 0x360),</div><div class='add'>+	INTC_VECT(IRL0_HHLL, 0x380), INTC_VECT(IRL0_HHLH, 0x3a0),</div><div class='add'>+	INTC_VECT(IRL0_HHHL, 0x3c0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DECLARE_INTC_DESC(intc_desc_irl3210, "sh7734-irl3210",</div><div class='add'>+	vectors_irl3210, NULL, mask_registers, NULL, NULL);</div><div class='add'>+</div><div class='add'>+#define INTC_ICR0		0xFF802000</div><div class='add'>+#define INTC_INTMSK0    0xFF802044</div><div class='add'>+#define INTC_INTMSK1    0xFF802048</div><div class='add'>+#define INTC_INTMSKCLR0 0xFF802064</div><div class='add'>+#define INTC_INTMSKCLR1 0xFF802068</div><div class='add'>+</div><div class='add'>+void __init plat_irq_setup(void)</div><div class='add'>+{</div><div class='add'>+	/* disable IRQ3-0 */</div><div class='add'>+	__raw_writel(0xF0000000, INTC_INTMSK0);</div><div class='add'>+</div><div class='add'>+	/* disable IRL3-0 */</div><div class='add'>+	__raw_writel(0x80000000, INTC_INTMSK1);</div><div class='add'>+</div><div class='add'>+	/* select IRL mode for IRL3-0 */</div><div class='add'>+	__raw_writel(__raw_readl(INTC_ICR0) &amp; ~0x00800000, INTC_ICR0);</div><div class='add'>+</div><div class='add'>+	/* disable holding function, ie enable "SH-4 Mode (LVLMODE)" */</div><div class='add'>+	__raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);</div><div class='add'>+</div><div class='add'>+	register_intc_controller(&amp;intc_desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init plat_irq_setup_pins(int mode)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case IRQ_MODE_IRQ3210:</div><div class='add'>+		/* select IRQ mode for IRL3-0 */</div><div class='add'>+		__raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);</div><div class='add'>+		register_intc_controller(&amp;intc_desc_irq3210);</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_MODE_IRL3210:</div><div class='add'>+		/* enable IRL0-3 but don't provide any masking */</div><div class='add'>+		__raw_writel(0x80000000, INTC_INTMSKCLR1);</div><div class='add'>+		__raw_writel(0xf0000000, INTC_INTMSKCLR0);</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_MODE_IRL3210_MASK:</div><div class='add'>+		/* enable IRL0-3 and mask using cpu intc controller */</div><div class='add'>+		__raw_writel(0x80000000, INTC_INTMSKCLR0);</div><div class='add'>+		register_intc_controller(&amp;intc_desc_irl3210);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c<br/>index c8836cffa216..a7708425afa9 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7757.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/setup-sh7757.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7757.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7757.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='ctx'> #include &lt;linux/sh_dma.h&gt;</div><div class='del'>-</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;cpu/dma-register.h&gt;</div><div class='ctx'> #include &lt;cpu/sh7757.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -28,7 +28,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 40, 40, 40, 40 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x700)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif2_device = {</div><div class='hunk'>@@ -45,7 +45,7 @@ static struct plat_sci_port scif3_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 76, 76, 76, 76 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xb80)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif3_device = {</div><div class='hunk'>@@ -62,7 +62,7 @@ static struct plat_sci_port scif4_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 104, 104, 104, 104 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xF00)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif4_device = {</div><div class='hunk'>@@ -86,7 +86,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 28,</div><div class='add'>+		.start	= evt2irq(0x580),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -114,7 +114,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 29,</div><div class='add'>+		.start	= evt2irq(0x5a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -136,7 +136,7 @@ static struct resource spi0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM | IORESOURCE_MEM_32BIT,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 86,</div><div class='add'>+		.start	= evt2irq(0xcc0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -466,8 +466,8 @@ static struct resource sh7757_dmae0_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name	= "error_irq",</div><div class='del'>-		.start	= 34,</div><div class='del'>-		.end	= 34,</div><div class='add'>+		.start	= evt2irq(0x640),</div><div class='add'>+		.end	= evt2irq(0x640),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -488,56 +488,56 @@ static struct resource sh7757_dmae1_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name	= "error_irq",</div><div class='del'>-		.start	= 34,</div><div class='del'>-		.end	= 34,</div><div class='add'>+		.start	= evt2irq(0x640),</div><div class='add'>+		.end	= evt2irq(0x640),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 4 */</div><div class='del'>-		.start	= 46,</div><div class='del'>-		.end	= 46,</div><div class='add'>+		.start	= evt2irq(0x7c0),</div><div class='add'>+		.end	= evt2irq(0x7c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 5 */</div><div class='del'>-		.start	= 46,</div><div class='del'>-		.end	= 46,</div><div class='add'>+		.start	= evt2irq(0x7c0),</div><div class='add'>+		.end	= evt2irq(0x7c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 6 */</div><div class='del'>-		.start	= 88,</div><div class='del'>-		.end	= 88,</div><div class='add'>+		.start	= evt2irq(0xd00),</div><div class='add'>+		.end	= evt2irq(0xd00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 7 */</div><div class='del'>-		.start	= 88,</div><div class='del'>-		.end	= 88,</div><div class='add'>+		.start	= evt2irq(0xd00),</div><div class='add'>+		.end	= evt2irq(0xd00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 8 */</div><div class='del'>-		.start	= 88,</div><div class='del'>-		.end	= 88,</div><div class='add'>+		.start	= evt2irq(0xd00),</div><div class='add'>+		.end	= evt2irq(0xd00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 9 */</div><div class='del'>-		.start	= 88,</div><div class='del'>-		.end	= 88,</div><div class='add'>+		.start	= evt2irq(0xd00),</div><div class='add'>+		.end	= evt2irq(0xd00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 10 */</div><div class='del'>-		.start	= 88,</div><div class='del'>-		.end	= 88,</div><div class='add'>+		.start	= evt2irq(0xd00),</div><div class='add'>+		.end	= evt2irq(0xd00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 11 */</div><div class='del'>-		.start	= 88,</div><div class='del'>-		.end	= 88,</div><div class='add'>+		.start	= evt2irq(0xd00),</div><div class='add'>+		.end	= evt2irq(0xd00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -558,20 +558,20 @@ static struct resource sh7757_dmae2_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name	= "error_irq",</div><div class='del'>-		.start	= 323,</div><div class='del'>-		.end	= 323,</div><div class='add'>+		.start	= evt2irq(0x2a60),</div><div class='add'>+		.end	= evt2irq(0x2a60),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 12 to 16 */</div><div class='del'>-		.start	= 272,</div><div class='del'>-		.end	= 276,</div><div class='add'>+		.start	= evt2irq(0x2400),</div><div class='add'>+		.end	= evt2irq(0x2480),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channel 17 */</div><div class='del'>-		.start	= 279,</div><div class='del'>-		.end	= 279,</div><div class='add'>+		.start	= evt2irq(0x24e0),</div><div class='add'>+		.end	= evt2irq(0x24e0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -592,20 +592,20 @@ static struct resource sh7757_dmae3_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name	= "error_irq",</div><div class='del'>-		.start	= 324,</div><div class='del'>-		.end	= 324,</div><div class='add'>+		.start	= evt2irq(0x2a80),</div><div class='add'>+		.end	= evt2irq(0x2a80),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channels 18 to 22 */</div><div class='del'>-		.start	= 280,</div><div class='del'>-		.end	= 284,</div><div class='add'>+		.start	= evt2irq(0x2500),</div><div class='add'>+		.end	= evt2irq(0x2580),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* IRQ for channel 23 */</div><div class='del'>-		.start	= 288,</div><div class='del'>-		.end	= 288,</div><div class='add'>+		.start	= evt2irq(0x2600),</div><div class='add'>+		.end	= evt2irq(0x2600),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -668,7 +668,7 @@ static struct resource spi1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM | IORESOURCE_MEM_8BIT,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.start	= 54,</div><div class='add'>+		.start	= evt2irq(0x8c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -687,7 +687,7 @@ static struct resource rspi_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.start	= 220,</div><div class='add'>+		.start	= evt2irq(0x1d80),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -706,8 +706,8 @@ static struct resource usb_ehci_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 57,</div><div class='del'>-		.end	= 57,</div><div class='add'>+		.start	= evt2irq(0x920),</div><div class='add'>+		.end	= evt2irq(0x920),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -730,8 +730,8 @@ static struct resource usb_ohci_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 57,</div><div class='del'>-		.end	= 57,</div><div class='add'>+		.start	= evt2irq(0x920),</div><div class='add'>+		.end	= evt2irq(0x920),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c<br/>index 00113515f233..bd0a8fbe610f 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7763.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/setup-sh7763.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7763.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7763.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/serial.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -22,7 +23,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 40, 40, 40, 40 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x700)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -40,7 +41,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 76, 76, 76, 76 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xb80)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -58,7 +59,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 104, 104, 104, 104 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xf00)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -78,7 +79,7 @@ static struct resource rtc_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='ctx'> 		/* Shared Period/Carry/Alarm IRQ */</div><div class='del'>-		.start  = 20,</div><div class='add'>+		.start  = evt2irq(0x480),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -97,13 +98,14 @@ static struct resource usb_ohci_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 83,</div><div class='del'>-		.end	= 83,</div><div class='add'>+		.start	= evt2irq(0xc60),</div><div class='add'>+		.end	= evt2irq(0xc60),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u64 usb_ohci_dma_mask = 0xffffffffUL;</div><div class='add'>+</div><div class='ctx'> static struct platform_device usb_ohci_device = {</div><div class='ctx'> 	.name		= "sh_ohci",</div><div class='ctx'> 	.id		= -1,</div><div class='hunk'>@@ -122,8 +124,8 @@ static struct resource usbf_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 84,</div><div class='del'>-		.end	= 84,</div><div class='add'>+		.start	= evt2irq(0xc80),</div><div class='add'>+		.end	= evt2irq(0xc80),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -152,7 +154,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 28,</div><div class='add'>+		.start	= evt2irq(0x580),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -180,7 +182,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 29,</div><div class='add'>+		.start	= evt2irq(0x5a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -207,7 +209,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 30,</div><div class='add'>+		.start	= evt2irq(0x5c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -234,7 +236,7 @@ static struct resource tmu3_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 96,</div><div class='add'>+		.start	= evt2irq(0xe00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -261,7 +263,7 @@ static struct resource tmu4_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 97,</div><div class='add'>+		.start	= evt2irq(0xe20),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -288,7 +290,7 @@ static struct resource tmu5_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 98,</div><div class='add'>+		.start	= evt2irq(0xe40),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c<br/>index 2c6aa22cf5f6..256ea7a45164 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7770.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/setup-sh7770.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7770.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7770.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/serial.h&gt;</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> static struct plat_sci_port scif0_platform_data = {</div><div class='hunk'>@@ -20,7 +21,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 61, 61, 61, 61 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x9a0)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif0_device = {</div><div class='hunk'>@@ -37,7 +38,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 62, 62, 62, 62 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x9c0)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif1_device = {</div><div class='hunk'>@@ -54,7 +55,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 63, 63, 63, 63 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x9e0)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif2_device = {</div><div class='hunk'>@@ -71,7 +72,7 @@ static struct plat_sci_port scif3_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 64, 64, 64, 64 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xa00)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif3_device = {</div><div class='hunk'>@@ -88,7 +89,7 @@ static struct plat_sci_port scif4_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 65, 65, 65, 65 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xa20)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif4_device = {</div><div class='hunk'>@@ -105,7 +106,7 @@ static struct plat_sci_port scif5_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 66, 66, 66, 66 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xa40)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif5_device = {</div><div class='hunk'>@@ -122,7 +123,7 @@ static struct plat_sci_port scif6_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 67, 67, 67, 67 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xa60)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif6_device = {</div><div class='hunk'>@@ -139,7 +140,7 @@ static struct plat_sci_port scif7_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 68, 68, 68, 68 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xa80)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif7_device = {</div><div class='hunk'>@@ -156,7 +157,7 @@ static struct plat_sci_port scif8_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 69, 69, 69, 69 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xaa0)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif8_device = {</div><div class='hunk'>@@ -173,7 +174,7 @@ static struct plat_sci_port scif9_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 70, 70, 70, 70 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xac0)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif9_device = {</div><div class='hunk'>@@ -197,7 +198,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -225,7 +226,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -252,7 +253,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -279,7 +280,7 @@ static struct resource tmu3_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 19,</div><div class='add'>+		.start	= evt2irq(0x460),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -306,7 +307,7 @@ static struct resource tmu4_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 20,</div><div class='add'>+		.start	= evt2irq(0x480),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -333,7 +334,7 @@ static struct resource tmu5_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 21,</div><div class='add'>+		.start	= evt2irq(0x4a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -360,7 +361,7 @@ static struct resource tmu6_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 22,</div><div class='add'>+		.start	= evt2irq(0x4c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -387,7 +388,7 @@ static struct resource tmu7_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 23,</div><div class='add'>+		.start	= evt2irq(0x4e0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -414,7 +415,7 @@ static struct resource tmu8_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 24,</div><div class='add'>+		.start	= evt2irq(0x500),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c<br/>index d431b0052d0c..de45b704687a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7780.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/setup-sh7780.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7780.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7780.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/serial_sci.h&gt;</div><div class='ctx'> #include &lt;linux/sh_dma.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;cpu/dma-register.h&gt;</div><div class='ctx'> </div><div class='ctx'> static struct plat_sci_port scif0_platform_data = {</div><div class='hunk'>@@ -22,7 +23,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 40, 40, 40, 40 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x700)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -40,7 +41,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 76, 76, 76, 76 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xb80)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -65,7 +66,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 28,</div><div class='add'>+		.start	= evt2irq(0x580),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -93,7 +94,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 29,</div><div class='add'>+		.start	= evt2irq(0x5a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -120,7 +121,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 30,</div><div class='add'>+		.start	= evt2irq(0x5c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -147,7 +148,7 @@ static struct resource tmu3_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 96,</div><div class='add'>+		.start	= evt2irq(0xe00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -174,7 +175,7 @@ static struct resource tmu4_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 97,</div><div class='add'>+		.start	= evt2irq(0xe20),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -201,7 +202,7 @@ static struct resource tmu5_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 98,</div><div class='add'>+		.start	= evt2irq(0xe40),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -224,7 +225,7 @@ static struct resource rtc_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='ctx'> 		/* Shared Period/Carry/Alarm IRQ */</div><div class='del'>-		.start	= 20,</div><div class='add'>+		.start	= evt2irq(0x480),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -321,10 +322,13 @@ static struct resource sh7780_dmae0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		/* Real DMA error IRQ is 38, and channel IRQs are 34-37, 44-45 */</div><div class='add'>+		/*</div><div class='add'>+		 * Real DMA error vector is 0x6c0, and channel</div><div class='add'>+		 * vectors are 0x640-0x6a0, 0x780-0x7a0</div><div class='add'>+		 */</div><div class='ctx'> 		.name	= "error_irq",</div><div class='del'>-		.start	= 34,</div><div class='del'>-		.end	= 34,</div><div class='add'>+		.start	= evt2irq(0x640),</div><div class='add'>+		.end	= evt2irq(0x640),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -338,10 +342,13 @@ static struct resource sh7780_dmae1_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	/* DMAC1 has no DMARS */</div><div class='ctx'> 	{</div><div class='del'>-		/* Real DMA error IRQ is 38, and channel IRQs are 46-47, 92-95 */</div><div class='add'>+		/*</div><div class='add'>+		 * Real DMA error vector is 0x6c0, and channel</div><div class='add'>+		 * vectors are 0x7c0-0x7e0, 0xd80-0xde0</div><div class='add'>+		 */</div><div class='ctx'> 		.name	= "error_irq",</div><div class='del'>-		.start	= 46,</div><div class='del'>-		.end	= 46,</div><div class='add'>+		.start	= evt2irq(0x7c0),</div><div class='add'>+		.end	= evt2irq(0x7c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c<br/>index 81588ef15a6c..0968ecb962e6 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7785.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/setup-sh7785.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7785.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7785.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/sh_dma.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;asm/mmzone.h&gt;</div><div class='ctx'> #include &lt;cpu/dma-register.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -24,7 +25,7 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 40, 40, 40, 40 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x700)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -42,7 +43,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 44, 44, 44, 44 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x780)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -60,7 +61,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 60, 60, 60, 60 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x980)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -78,7 +79,7 @@ static struct plat_sci_port scif3_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 61, 61, 61, 61 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x9a0)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -96,7 +97,7 @@ static struct plat_sci_port scif4_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 62, 62, 62, 62 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x9c0)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -114,7 +115,7 @@ static struct plat_sci_port scif5_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 63, 63, 63, 63 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x9e0)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -139,7 +140,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 28,</div><div class='add'>+		.start	= evt2irq(0x580),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -167,7 +168,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 29,</div><div class='add'>+		.start	= evt2irq(0x5a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -194,7 +195,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 30,</div><div class='add'>+		.start	= evt2irq(0x5c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -221,7 +222,7 @@ static struct resource tmu3_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 96,</div><div class='add'>+		.start	= evt2irq(0xe00),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -248,7 +249,7 @@ static struct resource tmu4_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 97,</div><div class='add'>+		.start	= evt2irq(0xe20),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -275,7 +276,7 @@ static struct resource tmu5_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 98,</div><div class='add'>+		.start	= evt2irq(0xe40),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -375,10 +376,13 @@ static struct resource sh7785_dmae0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		/* Real DMA error IRQ is 39, and channel IRQs are 33-38 */</div><div class='add'>+		/*</div><div class='add'>+		 * Real DMA error vector is 0x6e0, and channel</div><div class='add'>+		 * vectors are 0x620-0x6c0</div><div class='add'>+		 */</div><div class='ctx'> 		.name	= "error_irq",</div><div class='del'>-		.start	= 33,</div><div class='del'>-		.end	= 33,</div><div class='add'>+		.start	= evt2irq(0x620),</div><div class='add'>+		.end	= evt2irq(0x620),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -392,10 +396,13 @@ static struct resource sh7785_dmae1_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	/* DMAC1 has no DMARS */</div><div class='ctx'> 	{</div><div class='del'>-		/* Real DMA error IRQ is 58, and channel IRQs are 52-57 */</div><div class='add'>+		/*</div><div class='add'>+		 * Real DMA error vector is 0x940, and channel</div><div class='add'>+		 * vectors are 0x880-0x920</div><div class='add'>+		 */</div><div class='ctx'> 		.name	= "error_irq",</div><div class='del'>-		.start	= 52,</div><div class='del'>-		.end	= 52,</div><div class='add'>+		.start	= evt2irq(0x880),</div><div class='add'>+		.end	= evt2irq(0x880),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c<br/>index 599022d73b28..2e6952f87848 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7786.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/setup-sh7786.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-sh7786.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-sh7786.c</a></div><div class='hunk'>@@ -32,7 +32,10 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 40, 41, 43, 42 },</div><div class='add'>+	.irqs		= { evt2irq(0x700),</div><div class='add'>+			    evt2irq(0x720),</div><div class='add'>+			    evt2irq(0x760),</div><div class='add'>+			    evt2irq(0x740) },</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -53,7 +56,7 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 44, 44, 44, 44 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x780)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -71,7 +74,7 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 50, 50, 50, 50 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x840)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -89,7 +92,7 @@ static struct plat_sci_port scif3_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 51, 51, 51, 51 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x860)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -107,7 +110,7 @@ static struct plat_sci_port scif4_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 52, 52, 52, 52 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x880)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -125,7 +128,7 @@ static struct plat_sci_port scif5_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_1,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 53, 53, 53, 53 },</div><div class='add'>+	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x8a0)),</div><div class='ctx'> 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -150,7 +153,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -178,7 +181,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -205,7 +208,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -232,7 +235,7 @@ static struct resource tmu3_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 20,</div><div class='add'>+		.start	= evt2irq(0x480),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -259,7 +262,7 @@ static struct resource tmu4_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 21,</div><div class='add'>+		.start	= evt2irq(0x4a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -286,7 +289,7 @@ static struct resource tmu5_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 22,</div><div class='add'>+		.start	= evt2irq(0x4c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -313,7 +316,7 @@ static struct resource tmu6_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 45,</div><div class='add'>+		.start	= evt2irq(0x7a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -340,7 +343,7 @@ static struct resource tmu7_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 45,</div><div class='add'>+		.start	= evt2irq(0x7a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -367,7 +370,7 @@ static struct resource tmu8_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 45,</div><div class='add'>+		.start	= evt2irq(0x7a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -394,7 +397,7 @@ static struct resource tmu9_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 46,</div><div class='add'>+		.start	= evt2irq(0x7c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -421,7 +424,7 @@ static struct resource tmu10_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 46,</div><div class='add'>+		.start	= evt2irq(0x7c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -448,7 +451,7 @@ static struct resource tmu11_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 46,</div><div class='add'>+		.start	= evt2irq(0x7c0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -550,8 +553,8 @@ static struct resource usb_ehci_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 77,</div><div class='del'>-		.end	= 77,</div><div class='add'>+		.start	= evt2irq(0xba0),</div><div class='add'>+		.end	= evt2irq(0xba0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -574,8 +577,8 @@ static struct resource usb_ohci_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 77,</div><div class='del'>-		.end	= 77,</div><div class='add'>+		.start	= evt2irq(0xba0),</div><div class='add'>+		.end	= evt2irq(0xba0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c<br/>index bb208806dc1a..688f7ed1bab1 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-shx3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh4a/setup-shx3.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh4a/setup-shx3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh4a/setup-shx3.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/sh_timer.h&gt;</div><div class='add'>+#include &lt;linux/sh_intc.h&gt;</div><div class='ctx'> #include &lt;cpu/shx3.h&gt;</div><div class='ctx'> #include &lt;asm/mmzone.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -32,7 +33,10 @@ static struct plat_sci_port scif0_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 40, 41, 43, 42 },</div><div class='add'>+	.irqs		= { evt2irq(0x700),</div><div class='add'>+			    evt2irq(0x720),</div><div class='add'>+			    evt2irq(0x760),</div><div class='add'>+			    evt2irq(0x740) },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif0_device = {</div><div class='hunk'>@@ -49,7 +53,10 @@ static struct plat_sci_port scif1_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 44, 45, 47, 46 },</div><div class='add'>+	.irqs		= { evt2irq(0x780),</div><div class='add'>+			    evt2irq(0x7a0),</div><div class='add'>+			    evt2irq(0x7e0),</div><div class='add'>+			    evt2irq(0x7c0) },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif1_device = {</div><div class='hunk'>@@ -66,7 +73,10 @@ static struct plat_sci_port scif2_platform_data = {</div><div class='ctx'> 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,</div><div class='ctx'> 	.scbrr_algo_id	= SCBRR_ALGO_2,</div><div class='ctx'> 	.type		= PORT_SCIF,</div><div class='del'>-	.irqs		= { 52, 53, 55, 54 },</div><div class='add'>+	.irqs		= { evt2irq(0x880),</div><div class='add'>+			    evt2irq(0x8a0),</div><div class='add'>+			    evt2irq(0x8e0),</div><div class='add'>+			    evt2irq(0x8c0) },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device scif2_device = {</div><div class='hunk'>@@ -90,7 +100,7 @@ static struct resource tmu0_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 16,</div><div class='add'>+		.start	= evt2irq(0x400),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -118,7 +128,7 @@ static struct resource tmu1_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 17,</div><div class='add'>+		.start	= evt2irq(0x420),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -145,7 +155,7 @@ static struct resource tmu2_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 18,</div><div class='add'>+		.start	= evt2irq(0x440),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -172,7 +182,7 @@ static struct resource tmu3_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 19,</div><div class='add'>+		.start	= evt2irq(0x460),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -199,7 +209,7 @@ static struct resource tmu4_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 20,</div><div class='add'>+		.start	= evt2irq(0x480),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -226,7 +236,7 @@ static struct resource tmu5_resources[] = {</div><div class='ctx'> 		.flags	= IORESOURCE_MEM,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='del'>-		.start	= 21,</div><div class='add'>+		.start	= evt2irq(0x4a0),</div><div class='ctx'> 		.flags	= IORESOURCE_IRQ,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -484,9 +494,6 @@ void __init plat_irq_setup_pins(int mode)</div><div class='ctx'> </div><div class='ctx'> void __init plat_irq_setup(void)</div><div class='ctx'> {</div><div class='del'>-	reserve_intc_vectors(vectors_irq, ARRAY_SIZE(vectors_irq));</div><div class='del'>-	reserve_intc_vectors(vectors_irl, ARRAY_SIZE(vectors_irl));</div><div class='del'>-</div><div class='ctx'> 	register_intc_controller(&amp;intc_desc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S<br/>index 6b80295dd7a4..ff1f0e6e9bec 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh5/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh5/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh5/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh5/entry.S</a></div><div class='hunk'>@@ -335,7 +335,7 @@ tlb_miss:</div><div class='ctx'> 	/* If the fast path handler fixed the fault, just drop through quickly</div><div class='ctx'> 	   to the restore code right away to return to the excepting context.</div><div class='ctx'> 	   */</div><div class='del'>-	beqi/u	r2, 0, tr1</div><div class='add'>+	bnei/u	r2, 0, tr1</div><div class='ctx'> </div><div class='ctx'> fast_tlb_miss_restore:</div><div class='ctx'> 	ld.q	SP, SAVED_TR0, r2</div><div class='hunk'>@@ -1079,9 +1079,8 @@ restore_all:</div><div class='ctx'>  *</div><div class='ctx'>  * Kernel TLB fault handlers will get a slightly different interface.</div><div class='ctx'>  * (r2)   struct pt_regs *, original register's frame pointer</div><div class='del'>- * (r3)   writeaccess, whether it's a store fault as opposed to load fault</div><div class='del'>- * (r4)   execaccess, whether it's a ITLB fault as opposed to DTLB fault</div><div class='del'>- * (r5)   Effective Address of fault</div><div class='add'>+ * (r3)   page fault error code (see asm/thread_info.h)</div><div class='add'>+ * (r4)   Effective Address of fault</div><div class='ctx'>  * (LINK) return address</div><div class='ctx'>  * (SP)   = r2</div><div class='ctx'>  *</div><div class='hunk'>@@ -1092,26 +1091,25 @@ restore_all:</div><div class='ctx'> tlb_miss_load:</div><div class='ctx'> 	or	SP, ZERO, r2</div><div class='ctx'> 	or	ZERO, ZERO, r3		/* Read */</div><div class='del'>-	or	ZERO, ZERO, r4		/* Data */</div><div class='del'>-	getcon	TEA, r5</div><div class='add'>+	getcon	TEA, r4</div><div class='ctx'> 	pta	call_do_page_fault, tr0</div><div class='ctx'> 	beq	ZERO, ZERO, tr0</div><div class='ctx'> </div><div class='ctx'> tlb_miss_store:</div><div class='ctx'> 	or	SP, ZERO, r2</div><div class='del'>-	movi	1, r3			/* Write */</div><div class='del'>-	or	ZERO, ZERO, r4		/* Data */</div><div class='del'>-	getcon	TEA, r5</div><div class='add'>+	movi	FAULT_CODE_WRITE, r3		/* Write */</div><div class='add'>+	getcon	TEA, r4</div><div class='ctx'> 	pta	call_do_page_fault, tr0</div><div class='ctx'> 	beq	ZERO, ZERO, tr0</div><div class='ctx'> </div><div class='ctx'> itlb_miss_or_IRQ:</div><div class='ctx'> 	pta	its_IRQ, tr0</div><div class='ctx'> 	beqi/u	r4, EVENT_INTERRUPT, tr0</div><div class='add'>+</div><div class='add'>+	/* ITLB miss */</div><div class='ctx'> 	or	SP, ZERO, r2</div><div class='del'>-	or	ZERO, ZERO, r3		/* Read */</div><div class='del'>-	movi	1, r4			/* Text */</div><div class='del'>-	getcon	TEA, r5</div><div class='add'>+	movi	FAULT_CODE_ITLB, r3</div><div class='add'>+	getcon	TEA, r4</div><div class='ctx'> 	/* Fall through */</div><div class='ctx'> </div><div class='ctx'> call_do_page_fault:</div><div class='head'>diff --git a/arch/sh/kernel/cpu/sh5/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c<br/>index 4b3bb35e99f3..9f8713aa7184 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh5/fpu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/cpu/sh5/fpu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/cpu/sh5/fpu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/cpu/sh5/fpu.c</a></div><div class='hunk'>@@ -107,8 +107,5 @@ asmlinkage void do_fpu_error(unsigned long ex, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	regs-&gt;pc += 4;</div><div class='ctx'> </div><div class='del'>-	tsk-&gt;thread.trap_no = 11;</div><div class='del'>-	tsk-&gt;thread.error_code = 0;</div><div class='del'>-</div><div class='ctx'> 	force_sig(SIGFPE, tsk);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c<br/>index ee226e20c20c..0c910163caa3 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/idle.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/idle.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/idle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/idle.c</a></div><div class='hunk'>@@ -132,10 +132,6 @@ void __init select_idle_routine(void)</div><div class='ctx'> 		pm_idle = poll_idle;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void do_nothing(void *unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void stop_this_cpu(void *unused)</div><div class='ctx'> {</div><div class='ctx'> 	local_irq_disable();</div><div class='hunk'>@@ -144,19 +140,3 @@ void stop_this_cpu(void *unused)</div><div class='ctx'> 	for (;;)</div><div class='ctx'> 		cpu_sleep();</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * cpu_idle_wait - Used to ensure that all the CPUs discard old value of</div><div class='del'>- * pm_idle and update to new pm_idle value. Required while changing pm_idle</div><div class='del'>- * handler on SMP systems.</div><div class='del'>- *</div><div class='del'>- * Caller must have changed pm_idle to the new value before the call. Old</div><div class='del'>- * pm_idle value will not be used by any CPU after the return of this function.</div><div class='del'>- */</div><div class='del'>-void cpu_idle_wait(void)</div><div class='del'>-{</div><div class='del'>-	smp_mb();</div><div class='del'>-	/* kick all the CPUs so that they exit out of pm_idle */</div><div class='del'>-	smp_call_function(do_nothing, NULL, 1);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cpu_idle_wait);</div><div class='head'>diff --git a/arch/sh/kernel/init_task.c b/arch/sh/kernel/init_task.c<br/>deleted file mode 100644<br/>index 11f2ea556a6b..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,30 +0,0 @@</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-struct pt_regs fake_swapper_regs;</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is 8192-byte aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c<br/>index a3ee91971129..dadce735f746 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/irq.c</a></div><div class='hunk'>@@ -234,8 +234,10 @@ void __init init_IRQ(void)</div><div class='ctx'> #ifdef CONFIG_SPARSE_IRQ</div><div class='ctx'> int __init arch_probe_nr_irqs(void)</div><div class='ctx'> {</div><div class='del'>-	nr_irqs = sh_mv.mv_nr_irqs;</div><div class='del'>-	return NR_IRQS_LEGACY;</div><div class='add'>+	/*</div><div class='add'>+	 * No pre-allocated IRQs.</div><div class='add'>+	 */</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c<br/>index b117781bfea2..38b313909ac9 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/kgdb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/kgdb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/kgdb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/kgdb.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * SuperH KGDB support</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2008 - 2009  Paul Mundt</div><div class='add'>+ * Copyright (C) 2008 - 2012  Paul Mundt</div><div class='ctx'>  *</div><div class='ctx'>  * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel.</div><div class='ctx'>  *</div><div class='hunk'>@@ -164,42 +164,89 @@ static void undo_single_step(struct pt_regs *linux_regs)</div><div class='ctx'> 	stepped_opcode = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='add'>+struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] = {</div><div class='add'>+	{ "r0",		GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[0]) },</div><div class='add'>+	{ "r1",		GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[1]) },</div><div class='add'>+	{ "r2",		GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[2]) },</div><div class='add'>+	{ "r3",		GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[3]) },</div><div class='add'>+	{ "r4",		GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[4]) },</div><div class='add'>+	{ "r5",		GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[5]) },</div><div class='add'>+	{ "r6",		GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[6]) },</div><div class='add'>+	{ "r7",		GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[7]) },</div><div class='add'>+	{ "r8",		GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[8]) },</div><div class='add'>+	{ "r9",		GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[9]) },</div><div class='add'>+	{ "r10",	GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[10]) },</div><div class='add'>+	{ "r11",	GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[11]) },</div><div class='add'>+	{ "r12",	GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[12]) },</div><div class='add'>+	{ "r13",	GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[13]) },</div><div class='add'>+	{ "r14",	GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[14]) },</div><div class='add'>+	{ "r15",	GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[15]) },</div><div class='add'>+	{ "pc",		GDB_SIZEOF_REG, offsetof(struct pt_regs, pc) },</div><div class='add'>+	{ "pr",		GDB_SIZEOF_REG, offsetof(struct pt_regs, pr) },</div><div class='add'>+	{ "sr",		GDB_SIZEOF_REG, offsetof(struct pt_regs, sr) },</div><div class='add'>+	{ "gbr",	GDB_SIZEOF_REG, offsetof(struct pt_regs, gbr) },</div><div class='add'>+	{ "mach",	GDB_SIZEOF_REG, offsetof(struct pt_regs, mach) },</div><div class='add'>+	{ "macl",	GDB_SIZEOF_REG, offsetof(struct pt_regs, macl) },</div><div class='add'>+	{ "vbr",	GDB_SIZEOF_REG, -1 },</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; 16; i++)</div><div class='del'>-		gdb_regs[GDB_R0 + i] = regs-&gt;regs[i];</div><div class='add'>+int dbg_set_reg(int regno, void *mem, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	if (regno &lt; 0 || regno &gt;= DBG_MAX_REG_NUM)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	gdb_regs[GDB_PC] = regs-&gt;pc;</div><div class='del'>-	gdb_regs[GDB_PR] = regs-&gt;pr;</div><div class='del'>-	gdb_regs[GDB_SR] = regs-&gt;sr;</div><div class='del'>-	gdb_regs[GDB_GBR] = regs-&gt;gbr;</div><div class='del'>-	gdb_regs[GDB_MACH] = regs-&gt;mach;</div><div class='del'>-	gdb_regs[GDB_MACL] = regs-&gt;macl;</div><div class='add'>+	if (dbg_reg_def[regno].offset != -1)</div><div class='add'>+		memcpy((void *)regs + dbg_reg_def[regno].offset, mem,</div><div class='add'>+		       dbg_reg_def[regno].size);</div><div class='ctx'> </div><div class='del'>-	__asm__ __volatile__ ("stc vbr, %0" : "=r" (gdb_regs[GDB_VBR]));</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)</div><div class='add'>+char *dbg_get_reg(int regno, void *mem, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	if (regno &gt;= DBG_MAX_REG_NUM || regno &lt; 0)</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; 16; i++)</div><div class='del'>-		regs-&gt;regs[GDB_R0 + i] = gdb_regs[GDB_R0 + i];</div><div class='add'>+	if (dbg_reg_def[regno].size != -1)</div><div class='add'>+		memcpy(mem, (void *)regs + dbg_reg_def[regno].offset,</div><div class='add'>+		       dbg_reg_def[regno].size);</div><div class='add'>+</div><div class='add'>+	switch (regno) {</div><div class='add'>+	case GDB_VBR:</div><div class='add'>+		__asm__ __volatile__ ("stc vbr, %0" : "=r" (mem));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	regs-&gt;pc = gdb_regs[GDB_PC];</div><div class='del'>-	regs-&gt;pr = gdb_regs[GDB_PR];</div><div class='del'>-	regs-&gt;sr = gdb_regs[GDB_SR];</div><div class='del'>-	regs-&gt;gbr = gdb_regs[GDB_GBR];</div><div class='del'>-	regs-&gt;mach = gdb_regs[GDB_MACH];</div><div class='del'>-	regs-&gt;macl = gdb_regs[GDB_MACL];</div><div class='add'>+	return dbg_reg_def[regno].name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)</div><div class='ctx'> {</div><div class='add'>+	struct pt_regs *thread_regs = task_pt_regs(p);</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	/* Initialize to zero */</div><div class='add'>+	for (reg = 0; reg &lt; DBG_MAX_REG_NUM; reg++)</div><div class='add'>+		gdb_regs[reg] = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Copy out GP regs 8 to 14.</div><div class='add'>+	 *</div><div class='add'>+	 * switch_to() relies on SR.RB toggling, so regs 0-&gt;7 are banked</div><div class='add'>+	 * and need privileged instructions to get to. The r15 value we</div><div class='add'>+	 * fetch from the thread info directly.</div><div class='add'>+	 */</div><div class='add'>+	for (reg = GDB_R8; reg &lt; GDB_R15; reg++)</div><div class='add'>+		gdb_regs[reg] = thread_regs-&gt;regs[reg];</div><div class='add'>+</div><div class='ctx'> 	gdb_regs[GDB_R15] = p-&gt;thread.sp;</div><div class='ctx'> 	gdb_regs[GDB_PC] = p-&gt;thread.pc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Additional registers we have context for</div><div class='add'>+	 */</div><div class='add'>+	gdb_regs[GDB_PR] = thread_regs-&gt;pr;</div><div class='add'>+	gdb_regs[GDB_GBR] = thread_regs-&gt;gbr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kgdb_arch_handle_exception(int e_vector, int signo, int err_code,</div><div class='hunk'>@@ -264,6 +311,18 @@ BUILD_TRAP_HANDLER(singlestep)</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kgdb_call_nmi_hook(void *ignored)</div><div class='add'>+{</div><div class='add'>+	kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs());</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kgdb_roundup_cpus(unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	local_irq_enable();</div><div class='add'>+	smp_call_function(kgdb_call_nmi_hook, NULL, 0);</div><div class='add'>+	local_irq_disable();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __kgdb_notify(struct die_args *args, unsigned long cmd)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='head'>diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c<br/>index 3d722e49db08..ec05f491c347 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/machvec.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/machvec.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/machvec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/machvec.c</a></div><div class='hunk'>@@ -121,7 +121,4 @@ void __init sh_mv_setup(void)</div><div class='ctx'> 	mv_set(irq_demux);</div><div class='ctx'> 	mv_set(mode_pins);</div><div class='ctx'> 	mv_set(mem_init);</div><div class='del'>-</div><div class='del'>-	if (!sh_mv.mv_nr_irqs)</div><div class='del'>-		sh_mv.mv_nr_irqs = NR_IRQS;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c<br/>index 325f98b1736d..9b7a459a4613 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/process.c</a></div><div class='hunk'>@@ -2,12 +2,26 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/stackprotector.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct kmem_cache *task_xstate_cachep = NULL;</div><div class='ctx'> unsigned int xstate_size;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_CC_STACKPROTECTOR</div><div class='add'>+unsigned long __stack_chk_guard __read_mostly;</div><div class='add'>+EXPORT_SYMBOL(__stack_chk_guard);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * this gets called so that we can store lazy state into memory and copy the</div><div class='add'>+ * current task into the new thread.</div><div class='add'>+ */</div><div class='ctx'> int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_SUPERH32</div><div class='add'>+	unlazy_fpu(src, task_pt_regs(src));</div><div class='add'>+#endif</div><div class='ctx'> 	*dst = *src;</div><div class='ctx'> </div><div class='ctx'> 	if (src-&gt;thread.xstate) {</div><div class='hunk'>@@ -29,52 +43,10 @@ void free_thread_xstate(struct task_struct *tsk)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if THREAD_SHIFT &lt; PAGE_SHIFT</div><div class='del'>-static struct kmem_cache *thread_info_cache;</div><div class='del'>-</div><div class='del'>-struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)</div><div class='del'>-{</div><div class='del'>-	struct thread_info *ti;</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-	gfp_t mask = GFP_KERNEL | __GFP_ZERO;</div><div class='del'>-#else</div><div class='del'>-	gfp_t mask = GFP_KERNEL;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	ti = kmem_cache_alloc_node(thread_info_cache, mask, node);</div><div class='del'>-	return ti;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void free_thread_info(struct thread_info *ti)</div><div class='del'>-{</div><div class='del'>-	free_thread_xstate(ti-&gt;task);</div><div class='del'>-	kmem_cache_free(thread_info_cache, ti);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void thread_info_cache_init(void)</div><div class='del'>-{</div><div class='del'>-	thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,</div><div class='del'>-					      THREAD_SIZE, SLAB_PANIC, NULL);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-	gfp_t mask = GFP_KERNEL | __GFP_ZERO;</div><div class='del'>-#else</div><div class='del'>-	gfp_t mask = GFP_KERNEL;</div><div class='del'>-#endif</div><div class='del'>-	struct page *page = alloc_pages_node(node, mask, THREAD_SIZE_ORDER);</div><div class='del'>-</div><div class='del'>-	return page ? page_address(page) : NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void free_thread_info(struct thread_info *ti)</div><div class='add'>+void arch_release_task_struct(struct task_struct *tsk)</div><div class='ctx'> {</div><div class='del'>-	free_thread_xstate(ti-&gt;task);</div><div class='del'>-	free_pages((unsigned long)ti, THREAD_SIZE_ORDER);</div><div class='add'>+	free_thread_xstate(tsk);</div><div class='ctx'> }</div><div class='del'>-#endif /* THREAD_SHIFT &lt; PAGE_SHIFT */</div><div class='ctx'> </div><div class='ctx'> void arch_task_cache_init(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c<br/>index 94273aaf78c1..59521e8a164d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/process_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/process_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/process_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/process_32.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='ctx'> #include &lt;linux/hw_breakpoint.h&gt;</div><div class='ctx'> #include &lt;linux/prefetch.h&gt;</div><div class='add'>+#include &lt;linux/stackprotector.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/fpu.h&gt;</div><div class='hunk'>@@ -155,15 +156,6 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dump_fpu);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This gets called before we allocate a new thread and copy</div><div class='del'>- * the current task into it.</div><div class='del'>- */</div><div class='del'>-void prepare_to_copy(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	unlazy_fpu(tsk, task_pt_regs(tsk));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> asmlinkage void ret_from_fork(void);</div><div class='ctx'> </div><div class='ctx'> int copy_thread(unsigned long clone_flags, unsigned long usp,</div><div class='hunk'>@@ -220,6 +212,10 @@ __switch_to(struct task_struct *prev, struct task_struct *next)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_struct *next_t = &amp;next-&gt;thread;</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_CC_STACKPROTECTOR) &amp;&amp; !defined(CONFIG_SMP)</div><div class='add'>+	__stack_chk_guard = next-&gt;stack_canary;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	unlazy_fpu(prev, task_pt_regs(prev));</div><div class='ctx'> </div><div class='ctx'> 	/* we're going to use this soon, after a few expensive things */</div><div class='head'>diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c<br/>index 5901fba3176e..d6b7b6154f87 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/signal_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/signal_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/signal_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/signal_32.c</a></div><div class='hunk'>@@ -32,8 +32,6 @@</div><div class='ctx'> #include &lt;asm/syscalls.h&gt;</div><div class='ctx'> #include &lt;asm/fpu.h&gt;</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> struct fdpic_func_descriptor {</div><div class='ctx'> 	unsigned long	text;</div><div class='ctx'> 	unsigned long	GOT;</div><div class='hunk'>@@ -53,23 +51,11 @@ struct fdpic_func_descriptor {</div><div class='ctx'>  * Atomically swap in the new signal mask, and wait for a signal.</div><div class='ctx'>  */</div><div class='ctx'> asmlinkage int</div><div class='del'>-sys_sigsuspend(old_sigset_t mask,</div><div class='del'>-	       unsigned long r5, unsigned long r6, unsigned long r7,</div><div class='del'>-	       struct pt_regs __regs)</div><div class='add'>+sys_sigsuspend(old_sigset_t mask)</div><div class='ctx'> {</div><div class='ctx'> 	sigset_t blocked;</div><div class='del'>-</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='ctx'> 	siginitset(&amp;blocked, mask);</div><div class='del'>-	set_current_blocked(&amp;blocked);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_restore_sigmask();</div><div class='del'>-</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage int</div><div class='hunk'>@@ -83,10 +69,10 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='ctx'> 		old_sigset_t mask;</div><div class='ctx'> 		if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='ctx'> 		    __get_user(new_ka.sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer))</div><div class='add'>+		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='add'>+		    __get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='add'>+		    __get_user(mask, &amp;act-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags);</div><div class='del'>-		__get_user(mask, &amp;act-&gt;sa_mask);</div><div class='ctx'> 		siginitset(&amp;new_ka.sa.sa_mask, mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -95,10 +81,10 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='ctx'> 	if (!ret &amp;&amp; oact) {</div><div class='ctx'> 		if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||</div><div class='ctx'> 		    __put_user(old_ka.sa.sa_handler, &amp;oact-&gt;sa_handler) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer))</div><div class='add'>+		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags);</div><div class='del'>-		__put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -162,12 +148,11 @@ static inline int save_sigcontext_fpu(struct sigcontext __user *sc,</div><div class='ctx'> 	if (!(boot_cpu_data.flags &amp; CPU_HAS_FPU))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (!used_math()) {</div><div class='del'>-		__put_user(0, &amp;sc-&gt;sc_ownedfp);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='add'>+	if (!used_math())</div><div class='add'>+		return __put_user(0, &amp;sc-&gt;sc_ownedfp);</div><div class='ctx'> </div><div class='del'>-	__put_user(1, &amp;sc-&gt;sc_ownedfp);</div><div class='add'>+	if (__put_user(1, &amp;sc-&gt;sc_ownedfp))</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	/* This will cause a "finit" to be triggered by the next</div><div class='ctx'> 	   attempted FPU operation by the 'current' process.</div><div class='hunk'>@@ -207,7 +192,7 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, int *r0_p</div><div class='ctx'> 		regs-&gt;sr |= SR_FD; /* Release FPU */</div><div class='ctx'> 		clear_fpu(tsk, regs);</div><div class='ctx'> 		clear_used_math();</div><div class='del'>-		__get_user (owned_fp, &amp;sc-&gt;sc_ownedfp);</div><div class='add'>+		err |= __get_user (owned_fp, &amp;sc-&gt;sc_ownedfp);</div><div class='ctx'> 		if (owned_fp)</div><div class='ctx'> 			err |= restore_sigcontext_fpu(sc);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -239,7 +224,6 @@ asmlinkage int sys_sigreturn(unsigned long r4, unsigned long r5,</div><div class='ctx'> 				    sizeof(frame-&gt;extramask))))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;sc, &amp;r0))</div><div class='hunk'>@@ -269,7 +253,6 @@ asmlinkage int sys_rt_sigreturn(unsigned long r4, unsigned long r5,</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext, &amp;r0))</div><div class='hunk'>@@ -398,11 +381,14 @@ static int setup_frame(int sig, struct k_sigaction *ka,</div><div class='ctx'> 		struct fdpic_func_descriptor __user *funcptr =</div><div class='ctx'> 			(struct fdpic_func_descriptor __user *)ka-&gt;sa.sa_handler;</div><div class='ctx'> </div><div class='del'>-		__get_user(regs-&gt;pc, &amp;funcptr-&gt;text);</div><div class='del'>-		__get_user(regs-&gt;regs[12], &amp;funcptr-&gt;GOT);</div><div class='add'>+		err |= __get_user(regs-&gt;pc, &amp;funcptr-&gt;text);</div><div class='add'>+		err |= __get_user(regs-&gt;regs[12], &amp;funcptr-&gt;GOT);</div><div class='ctx'> 	} else</div><div class='ctx'> 		regs-&gt;pc = (unsigned long)ka-&gt;sa.sa_handler;</div><div class='ctx'> </div><div class='add'>+	if (err)</div><div class='add'>+		goto give_sigsegv;</div><div class='add'>+</div><div class='ctx'> 	set_fs(USER_DS);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",</div><div class='hunk'>@@ -482,11 +468,14 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 		struct fdpic_func_descriptor __user *funcptr =</div><div class='ctx'> 			(struct fdpic_func_descriptor __user *)ka-&gt;sa.sa_handler;</div><div class='ctx'> </div><div class='del'>-		__get_user(regs-&gt;pc, &amp;funcptr-&gt;text);</div><div class='del'>-		__get_user(regs-&gt;regs[12], &amp;funcptr-&gt;GOT);</div><div class='add'>+		err |= __get_user(regs-&gt;pc, &amp;funcptr-&gt;text);</div><div class='add'>+		err |= __get_user(regs-&gt;regs[12], &amp;funcptr-&gt;GOT);</div><div class='ctx'> 	} else</div><div class='ctx'> 		regs-&gt;pc = (unsigned long)ka-&gt;sa.sa_handler;</div><div class='ctx'> </div><div class='add'>+	if (err)</div><div class='add'>+		goto give_sigsegv;</div><div class='add'>+</div><div class='ctx'> 	set_fs(USER_DS);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",</div><div class='hunk'>@@ -529,10 +518,11 @@ handle_syscall_restart(unsigned long save_r0, struct pt_regs *regs,</div><div class='ctx'> /*</div><div class='ctx'>  * OK, we're invoking a handler</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='add'>+static void</div><div class='ctx'> handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='del'>-	      sigset_t *oldset, struct pt_regs *regs, unsigned int save_r0)</div><div class='add'>+	      struct pt_regs *regs, unsigned int save_r0)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the stack frame */</div><div class='hunk'>@@ -541,10 +531,10 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = setup_frame(sig, ka, oldset, regs);</div><div class='ctx'> </div><div class='del'>-	if (ret == 0)</div><div class='del'>-		block_sigmask(ka, sig);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+	signal_delivered(sig, info, ka, regs,</div><div class='add'>+			test_thread_flag(TIF_SINGLESTEP));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -561,7 +551,6 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We want the common case to go fast, which</div><div class='hunk'>@@ -572,30 +561,12 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK)</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		handle_syscall_restart(save_r0, regs, &amp;ka.sa);</div><div class='ctx'> </div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  */</div><div class='del'>-		if (handle_signal(signr, &amp;ka, &amp;info, oldset,</div><div class='del'>-				  regs, save_r0) == 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * A signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TS_RESTORE_SIGMASK flag</div><div class='del'>-			 */</div><div class='del'>-			current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-</div><div class='del'>-			tracehook_signal_handler(signr, &amp;info, &amp;ka, regs,</div><div class='del'>-					test_thread_flag(TIF_SINGLESTEP));</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		handle_signal(signr, &amp;ka, &amp;info, regs, save_r0);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -617,10 +588,7 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)</div><div class='ctx'> 	 * If there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back.</div><div class='ctx'> 	 */</div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK) {</div><div class='del'>-		current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned int save_r0,</div><div class='hunk'>@@ -633,7 +601,5 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned int save_r0,</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c<br/>index 3c9a6f7dcdce..6b5b3dfe886b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/signal_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/signal_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/signal_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/signal_64.c</a></div><div class='hunk'>@@ -41,11 +41,9 @@</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_SIG 0</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='del'>-static int</div><div class='add'>+static void</div><div class='ctx'> handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='del'>-		sigset_t *oldset, struct pt_regs * regs);</div><div class='add'>+		struct pt_regs * regs);</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='ctx'> handle_syscall_restart(struct pt_regs *regs, struct sigaction *sa)</div><div class='hunk'>@@ -83,7 +81,7 @@ handle_syscall_restart(struct pt_regs *regs, struct sigaction *sa)</div><div class='ctx'>  * the kernel can handle, and then we build all the user-level signal handling</div><div class='ctx'>  * stack-frames in one go after that.</div><div class='ctx'>  */</div><div class='del'>-static int do_signal(struct pt_regs *regs, sigset_t *oldset)</div><div class='add'>+static void do_signal(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='hunk'>@@ -96,30 +94,15 @@ static int do_signal(struct pt_regs *regs, sigset_t *oldset)</div><div class='ctx'> 	 * if so.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK)</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else if (!oldset)</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, 0);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		handle_syscall_restart(regs, &amp;ka.sa);</div><div class='ctx'> </div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  */</div><div class='del'>-		if (handle_signal(signr, &amp;info, &amp;ka, oldset, regs) == 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * If a signal was successfully delivered, the</div><div class='del'>-			 * saved sigmask is in its frame, and we can</div><div class='del'>-			 * clear the TS_RESTORE_SIGMASK flag.</div><div class='del'>-			 */</div><div class='del'>-			current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-</div><div class='del'>-			tracehook_signal_handler(signr, &amp;info, &amp;ka, regs,</div><div class='del'>-					test_thread_flag(TIF_SINGLESTEP));</div><div class='del'>-			return 1;</div><div class='del'>-		}</div><div class='add'>+		handle_signal(signr, &amp;info, &amp;ka, regs);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Did we come from a system call? */</div><div class='hunk'>@@ -142,76 +125,18 @@ static int do_signal(struct pt_regs *regs, sigset_t *oldset)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* No signal to deliver -- put the saved sigmask back */</div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK) {</div><div class='del'>-		current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Atomically swap in the new signal mask, and wait for a signal.</div><div class='ctx'>  */</div><div class='ctx'> asmlinkage int</div><div class='del'>-sys_sigsuspend(old_sigset_t mask,</div><div class='del'>-	       unsigned long r3, unsigned long r4, unsigned long r5,</div><div class='del'>-	       unsigned long r6, unsigned long r7,</div><div class='del'>-	       struct pt_regs * regs)</div><div class='add'>+sys_sigsuspend(old_sigset_t mask)</div><div class='ctx'> {</div><div class='del'>-	sigset_t saveset, blocked;</div><div class='del'>-</div><div class='del'>-	saveset = current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='add'>+	sigset_t blocked;</div><div class='ctx'> 	siginitset(&amp;blocked, mask);</div><div class='del'>-	set_current_blocked(&amp;blocked);</div><div class='del'>-</div><div class='del'>-	REF_REG_RET = -EINTR;</div><div class='del'>-	while (1) {</div><div class='del'>-		current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-		schedule();</div><div class='del'>-		set_restore_sigmask();</div><div class='del'>-		regs-&gt;pc += 4;    /* because sys_sigreturn decrements the pc */</div><div class='del'>-		if (do_signal(regs, &amp;saveset)) {</div><div class='del'>-			/* pc now points at signal handler. Need to decrement</div><div class='del'>-			   it because entry.S will increment it. */</div><div class='del'>-			regs-&gt;pc -= 4;</div><div class='del'>-			return -EINTR;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage int</div><div class='del'>-sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize,</div><div class='del'>-	          unsigned long r4, unsigned long r5, unsigned long r6,</div><div class='del'>-	          unsigned long r7,</div><div class='del'>-	          struct pt_regs * regs)</div><div class='del'>-{</div><div class='del'>-	sigset_t saveset, newset;</div><div class='del'>-</div><div class='del'>-	/* XXX: Don't preclude handling different sized sigset_t's.  */</div><div class='del'>-	if (sigsetsize != sizeof(sigset_t))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;newset, unewset, sizeof(newset)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	sigdelsetmask(&amp;newset, ~_BLOCKABLE);</div><div class='del'>-	saveset = current-&gt;blocked;</div><div class='del'>-	set_current_blocked(&amp;newset);</div><div class='del'>-</div><div class='del'>-	REF_REG_RET = -EINTR;</div><div class='del'>-	while (1) {</div><div class='del'>-		current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-		schedule();</div><div class='del'>-		regs-&gt;pc += 4;    /* because sys_sigreturn decrements the pc */</div><div class='del'>-		if (do_signal(regs, &amp;saveset)) {</div><div class='del'>-			/* pc now points at signal handler. Need to decrement</div><div class='del'>-			   it because entry.S will increment it. */</div><div class='del'>-			regs-&gt;pc -= 4;</div><div class='del'>-			return -EINTR;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage int</div><div class='hunk'>@@ -225,10 +150,10 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='ctx'> 		old_sigset_t mask;</div><div class='ctx'> 		if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='ctx'> 		    __get_user(new_ka.sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer))</div><div class='add'>+		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='add'>+		    __get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='add'>+		    __get_user(mask, &amp;act-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags);</div><div class='del'>-		__get_user(mask, &amp;act-&gt;sa_mask);</div><div class='ctx'> 		siginitset(&amp;new_ka.sa.sa_mask, mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -237,10 +162,10 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='ctx'> 	if (!ret &amp;&amp; oact) {</div><div class='ctx'> 		if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||</div><div class='ctx'> 		    __put_user(old_ka.sa.sa_handler, &amp;oact-&gt;sa_handler) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer))</div><div class='add'>+		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags);</div><div class='del'>-		__put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -403,7 +328,6 @@ asmlinkage int sys_sigreturn(unsigned long r2, unsigned long r3,</div><div class='ctx'> 				    sizeof(frame-&gt;extramask))))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;sc, &amp;ret))</div><div class='hunk'>@@ -436,7 +360,6 @@ asmlinkage int sys_rt_sigreturn(unsigned long r2, unsigned long r3,</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext, &amp;ret))</div><div class='hunk'>@@ -711,10 +634,11 @@ give_sigsegv:</div><div class='ctx'> /*</div><div class='ctx'>  * OK, we're invoking a handler</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='add'>+static void</div><div class='ctx'> handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='del'>-		sigset_t *oldset, struct pt_regs * regs)</div><div class='add'>+		struct pt_regs * regs)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the stack frame */</div><div class='hunk'>@@ -723,21 +647,20 @@ handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = setup_frame(sig, ka, oldset, regs);</div><div class='ctx'> </div><div class='del'>-	if (ret == 0)</div><div class='del'>-		block_sigmask(ka, sig);</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	signal_delivered(sig, info, ka, regs,</div><div class='add'>+			test_thread_flag(TIF_SINGLESTEP));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags)</div><div class='ctx'> {</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_SIGPENDING)</div><div class='del'>-		do_signal(regs, 0);</div><div class='add'>+		do_signal(regs);</div><div class='ctx'> </div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c<br/>index eaebdf6a5c77..2062aa88af41 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/smp.c</a></div><div class='hunk'>@@ -123,7 +123,6 @@ void native_play_dead(void)</div><div class='ctx'> int __cpu_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cpu = smp_processor_id();</div><div class='del'>-	struct task_struct *p;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = mp_ops-&gt;cpu_disable(cpu);</div><div class='hunk'>@@ -153,11 +152,7 @@ int __cpu_disable(void)</div><div class='ctx'> 	flush_cache_all();</div><div class='ctx'> 	local_flush_tlb_all();</div><div class='ctx'> </div><div class='del'>-	read_lock(&amp;tasklist_lock);</div><div class='del'>-	for_each_process(p)</div><div class='del'>-		if (p-&gt;mm)</div><div class='del'>-			cpumask_clear_cpu(cpu, mm_cpumask(p-&gt;mm));</div><div class='del'>-	read_unlock(&amp;tasklist_lock);</div><div class='add'>+	clear_tasks_mm_cpumask(cpu);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -220,22 +215,10 @@ extern struct {</div><div class='ctx'> 	void *thread_info;</div><div class='ctx'> } stack_start;</div><div class='ctx'> </div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tsk)</div><div class='ctx'> {</div><div class='del'>-	struct task_struct *tsk;</div><div class='ctx'> 	unsigned long timeout;</div><div class='ctx'> </div><div class='del'>-	tsk = cpu_data[cpu].idle;</div><div class='del'>-	if (!tsk) {</div><div class='del'>-		tsk = fork_idle(cpu);</div><div class='del'>-		if (IS_ERR(tsk)) {</div><div class='del'>-			pr_err("Failed forking idle task for cpu %d\n", cpu);</div><div class='del'>-			return PTR_ERR(tsk);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		cpu_data[cpu].idle = tsk;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;</div><div class='ctx'> </div><div class='ctx'> 	/* Fill in data in head.S for secondary cpus */</div><div class='head'>diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c<br/>index 6c0486094e48..8dae93ed8aff 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/kernel/traps_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/kernel/traps_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/kernel/traps_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/kernel/traps_64.c</a></div><div class='hunk'>@@ -283,8 +283,6 @@ static void do_unhandled_exception(int trapnr, int signr, char *str, char *fn_na</div><div class='ctx'> 		unsigned long error_code, struct pt_regs *regs, struct task_struct *tsk)</div><div class='ctx'> {</div><div class='ctx'> 	show_excp_regs(fn_name, trapnr, signr, regs);</div><div class='del'>-	tsk-&gt;thread.error_code = error_code;</div><div class='del'>-	tsk-&gt;thread.trap_no = trapnr;</div><div class='ctx'> </div><div class='ctx'> 	if (user_mode(regs))</div><div class='ctx'> 		force_sig(signr, tsk);</div><div class='head'>diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile<br/>index 2228c8cee4d6..cee6b9999d86 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/mm/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/mm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/mm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/Makefile</a></div><div class='hunk'>@@ -15,8 +15,8 @@ cacheops-$(CONFIG_CPU_SHX3)		+= cache-shx3.o</div><div class='ctx'> obj-y			+= $(cacheops-y)</div><div class='ctx'> </div><div class='ctx'> mmu-y			:= nommu.o extable_32.o</div><div class='del'>-mmu-$(CONFIG_MMU)	:= extable_$(BITS).o fault_$(BITS).o gup.o \</div><div class='del'>-			   ioremap.o kmap.o pgtable.o tlbflush_$(BITS).o</div><div class='add'>+mmu-$(CONFIG_MMU)	:= extable_$(BITS).o fault.o gup.o ioremap.o kmap.o \</div><div class='add'>+			   pgtable.o tlbex_$(BITS).o tlbflush_$(BITS).o</div><div class='ctx'> </div><div class='ctx'> obj-y			+= $(mmu-y)</div><div class='ctx'> </div><div class='hunk'>@@ -44,7 +44,7 @@ obj-$(CONFIG_HAVE_SRAM_POOL)	+= sram.o</div><div class='ctx'> </div><div class='ctx'> GCOV_PROFILE_pmb.o := n</div><div class='ctx'> </div><div class='del'>-# Special flags for fault_64.o.  This puts restrictions on the number of</div><div class='add'>+# Special flags for tlbex_64.o.  This puts restrictions on the number of</div><div class='ctx'> # caller-save registers that the compiler can target when building this file.</div><div class='ctx'> # This is required because the code is called from a context in entry.S where</div><div class='ctx'> # very few registers have been saved in the exception handler (for speed</div><div class='hunk'>@@ -59,7 +59,7 @@ GCOV_PROFILE_pmb.o := n</div><div class='ctx'> # The resources not listed below are callee save, i.e. the compiler is free to</div><div class='ctx'> # use any of them and will spill them to the stack itself.</div><div class='ctx'> </div><div class='del'>-CFLAGS_fault_64.o += -ffixed-r7 \</div><div class='add'>+CFLAGS_tlbex_64.o += -ffixed-r7 \</div><div class='ctx'> 	-ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12 \</div><div class='ctx'> 	-ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \</div><div class='ctx'> 	-ffixed-r20 -ffixed-r21 -ffixed-r22 -ffixed-r23 \</div><div class='head'>diff --git a/arch/sh/mm/fault.c b/arch/sh/mm/fault.c<br/>new file mode 100644<br/>index 000000000000..1fc25d85e515<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/fault.c</a></div><div class='hunk'>@@ -0,0 +1,514 @@</div><div class='add'>+/*</div><div class='add'>+ * Page fault handler for SH with an MMU.</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 1999  Niibe Yutaka</div><div class='add'>+ *  Copyright (C) 2003 - 2012  Paul Mundt</div><div class='add'>+ *</div><div class='add'>+ *  Based on linux/arch/i386/mm/fault.c:</div><div class='add'>+ *   Copyright (C) 1995  Linus Torvalds</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/hardirq.h&gt;</div><div class='add'>+#include &lt;linux/kprobes.h&gt;</div><div class='add'>+#include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include &lt;linux/kdebug.h&gt;</div><div class='add'>+#include &lt;asm/io_trapped.h&gt;</div><div class='add'>+#include &lt;asm/mmu_context.h&gt;</div><div class='add'>+#include &lt;asm/tlbflush.h&gt;</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='add'>+</div><div class='add'>+static inline int notify_page_fault(struct pt_regs *regs, int trap)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (kprobes_built_in() &amp;&amp; !user_mode(regs)) {</div><div class='add'>+		preempt_disable();</div><div class='add'>+		if (kprobe_running() &amp;&amp; kprobe_fault_handler(regs, trap))</div><div class='add'>+			ret = 1;</div><div class='add'>+		preempt_enable();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+force_sig_info_fault(int si_signo, int si_code, unsigned long address,</div><div class='add'>+		     struct task_struct *tsk)</div><div class='add'>+{</div><div class='add'>+	siginfo_t info;</div><div class='add'>+</div><div class='add'>+	info.si_signo	= si_signo;</div><div class='add'>+	info.si_errno	= 0;</div><div class='add'>+	info.si_code	= si_code;</div><div class='add'>+	info.si_addr	= (void __user *)address;</div><div class='add'>+</div><div class='add'>+	force_sig_info(si_signo, &amp;info, tsk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is useful to dump out the page tables associated with</div><div class='add'>+ * 'addr' in mm 'mm'.</div><div class='add'>+ */</div><div class='add'>+static void show_pte(struct mm_struct *mm, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	pgd_t *pgd;</div><div class='add'>+</div><div class='add'>+	if (mm)</div><div class='add'>+		pgd = mm-&gt;pgd;</div><div class='add'>+	else</div><div class='add'>+		pgd = get_TTB();</div><div class='add'>+</div><div class='add'>+	printk(KERN_ALERT "pgd = %p\n", pgd);</div><div class='add'>+	pgd += pgd_index(addr);</div><div class='add'>+	printk(KERN_ALERT "[%08lx] *pgd=%0*Lx", addr,</div><div class='add'>+	       (u32)(sizeof(*pgd) * 2), (u64)pgd_val(*pgd));</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		pud_t *pud;</div><div class='add'>+		pmd_t *pmd;</div><div class='add'>+		pte_t *pte;</div><div class='add'>+</div><div class='add'>+		if (pgd_none(*pgd))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (pgd_bad(*pgd)) {</div><div class='add'>+			printk("(bad)");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pud = pud_offset(pgd, addr);</div><div class='add'>+		if (PTRS_PER_PUD != 1)</div><div class='add'>+			printk(", *pud=%0*Lx", (u32)(sizeof(*pud) * 2),</div><div class='add'>+			       (u64)pud_val(*pud));</div><div class='add'>+</div><div class='add'>+		if (pud_none(*pud))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (pud_bad(*pud)) {</div><div class='add'>+			printk("(bad)");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pmd = pmd_offset(pud, addr);</div><div class='add'>+		if (PTRS_PER_PMD != 1)</div><div class='add'>+			printk(", *pmd=%0*Lx", (u32)(sizeof(*pmd) * 2),</div><div class='add'>+			       (u64)pmd_val(*pmd));</div><div class='add'>+</div><div class='add'>+		if (pmd_none(*pmd))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (pmd_bad(*pmd)) {</div><div class='add'>+			printk("(bad)");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* We must not map this if we have highmem enabled */</div><div class='add'>+		if (PageHighMem(pfn_to_page(pmd_val(*pmd) &gt;&gt; PAGE_SHIFT)))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		pte = pte_offset_kernel(pmd, addr);</div><div class='add'>+		printk(", *pte=%0*Lx", (u32)(sizeof(*pte) * 2),</div><div class='add'>+		       (u64)pte_val(*pte));</div><div class='add'>+	} while (0);</div><div class='add'>+</div><div class='add'>+	printk("\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)</div><div class='add'>+{</div><div class='add'>+	unsigned index = pgd_index(address);</div><div class='add'>+	pgd_t *pgd_k;</div><div class='add'>+	pud_t *pud, *pud_k;</div><div class='add'>+	pmd_t *pmd, *pmd_k;</div><div class='add'>+</div><div class='add'>+	pgd += index;</div><div class='add'>+	pgd_k = init_mm.pgd + index;</div><div class='add'>+</div><div class='add'>+	if (!pgd_present(*pgd_k))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	pud = pud_offset(pgd, address);</div><div class='add'>+	pud_k = pud_offset(pgd_k, address);</div><div class='add'>+	if (!pud_present(*pud_k))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!pud_present(*pud))</div><div class='add'>+	    set_pud(pud, *pud_k);</div><div class='add'>+</div><div class='add'>+	pmd = pmd_offset(pud, address);</div><div class='add'>+	pmd_k = pmd_offset(pud_k, address);</div><div class='add'>+	if (!pmd_present(*pmd_k))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!pmd_present(*pmd))</div><div class='add'>+		set_pmd(pmd, *pmd_k);</div><div class='add'>+	else {</div><div class='add'>+		/*</div><div class='add'>+		 * The page tables are fully synchronised so there must</div><div class='add'>+		 * be another reason for the fault. Return NULL here to</div><div class='add'>+		 * signal that we have not taken care of the fault.</div><div class='add'>+		 */</div><div class='add'>+		BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pmd_k;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SH_STORE_QUEUES</div><div class='add'>+#define __FAULT_ADDR_LIMIT	P3_ADDR_MAX</div><div class='add'>+#else</div><div class='add'>+#define __FAULT_ADDR_LIMIT	VMALLOC_END</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Handle a fault on the vmalloc or module mapping area</div><div class='add'>+ */</div><div class='add'>+static noinline int vmalloc_fault(unsigned long address)</div><div class='add'>+{</div><div class='add'>+	pgd_t *pgd_k;</div><div class='add'>+	pmd_t *pmd_k;</div><div class='add'>+	pte_t *pte_k;</div><div class='add'>+</div><div class='add'>+	/* Make sure we are in vmalloc/module/P3 area: */</div><div class='add'>+	if (!(address &gt;= VMALLOC_START &amp;&amp; address &lt; __FAULT_ADDR_LIMIT))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Synchronize this task's top level page-table</div><div class='add'>+	 * with the 'reference' page table.</div><div class='add'>+	 *</div><div class='add'>+	 * Do _not_ use "current" here. We might be inside</div><div class='add'>+	 * an interrupt in the middle of a task switch..</div><div class='add'>+	 */</div><div class='add'>+	pgd_k = get_TTB();</div><div class='add'>+	pmd_k = vmalloc_sync_one(pgd_k, address);</div><div class='add'>+	if (!pmd_k)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	pte_k = pte_offset_kernel(pmd_k, address);</div><div class='add'>+	if (!pte_present(*pte_k))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+show_fault_oops(struct pt_regs *regs, unsigned long address)</div><div class='add'>+{</div><div class='add'>+	if (!oops_may_print())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	printk(KERN_ALERT "BUG: unable to handle kernel ");</div><div class='add'>+	if (address &lt; PAGE_SIZE)</div><div class='add'>+		printk(KERN_CONT "NULL pointer dereference");</div><div class='add'>+	else</div><div class='add'>+		printk(KERN_CONT "paging request");</div><div class='add'>+</div><div class='add'>+	printk(KERN_CONT " at %08lx\n", address);</div><div class='add'>+	printk(KERN_ALERT "PC:");</div><div class='add'>+	printk_address(regs-&gt;pc, 1);</div><div class='add'>+</div><div class='add'>+	show_pte(NULL, address);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static noinline void</div><div class='add'>+no_context(struct pt_regs *regs, unsigned long error_code,</div><div class='add'>+	   unsigned long address)</div><div class='add'>+{</div><div class='add'>+	/* Are we prepared to handle this kernel fault?  */</div><div class='add'>+	if (fixup_exception(regs))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (handle_trapped_io(regs, address))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Oops. The kernel tried to access some bad page. We'll have to</div><div class='add'>+	 * terminate things with extreme prejudice.</div><div class='add'>+	 */</div><div class='add'>+	bust_spinlocks(1);</div><div class='add'>+</div><div class='add'>+	show_fault_oops(regs, address);</div><div class='add'>+</div><div class='add'>+	die("Oops", regs, error_code);</div><div class='add'>+	bust_spinlocks(0);</div><div class='add'>+	do_exit(SIGKILL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+__bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,</div><div class='add'>+		       unsigned long address, int si_code)</div><div class='add'>+{</div><div class='add'>+	struct task_struct *tsk = current;</div><div class='add'>+</div><div class='add'>+	/* User mode accesses just cause a SIGSEGV */</div><div class='add'>+	if (user_mode(regs)) {</div><div class='add'>+		/*</div><div class='add'>+		 * It's possible to have interrupts off here:</div><div class='add'>+		 */</div><div class='add'>+		local_irq_enable();</div><div class='add'>+</div><div class='add'>+		force_sig_info_fault(SIGSEGV, si_code, address, tsk);</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	no_context(regs, error_code, address);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static noinline void</div><div class='add'>+bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,</div><div class='add'>+		     unsigned long address)</div><div class='add'>+{</div><div class='add'>+	__bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+__bad_area(struct pt_regs *regs, unsigned long error_code,</div><div class='add'>+	   unsigned long address, int si_code)</div><div class='add'>+{</div><div class='add'>+	struct mm_struct *mm = current-&gt;mm;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Something tried to access memory that isn't in our memory map..</div><div class='add'>+	 * Fix it, but check if it's kernel or user first..</div><div class='add'>+	 */</div><div class='add'>+	up_read(&amp;mm-&gt;mmap_sem);</div><div class='add'>+</div><div class='add'>+	__bad_area_nosemaphore(regs, error_code, address, si_code);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static noinline void</div><div class='add'>+bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address)</div><div class='add'>+{</div><div class='add'>+	__bad_area(regs, error_code, address, SEGV_MAPERR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static noinline void</div><div class='add'>+bad_area_access_error(struct pt_regs *regs, unsigned long error_code,</div><div class='add'>+		      unsigned long address)</div><div class='add'>+{</div><div class='add'>+	__bad_area(regs, error_code, address, SEGV_ACCERR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void out_of_memory(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * We ran out of memory, call the OOM killer, and return the userspace</div><div class='add'>+	 * (which will retry the fault, or kill us if we got oom-killed):</div><div class='add'>+	 */</div><div class='add'>+	up_read(&amp;current-&gt;mm-&gt;mmap_sem);</div><div class='add'>+</div><div class='add'>+	pagefault_out_of_memory();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address)</div><div class='add'>+{</div><div class='add'>+	struct task_struct *tsk = current;</div><div class='add'>+	struct mm_struct *mm = tsk-&gt;mm;</div><div class='add'>+</div><div class='add'>+	up_read(&amp;mm-&gt;mmap_sem);</div><div class='add'>+</div><div class='add'>+	/* Kernel mode? Handle exceptions or die: */</div><div class='add'>+	if (!user_mode(regs))</div><div class='add'>+		no_context(regs, error_code, address);</div><div class='add'>+</div><div class='add'>+	force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static noinline int</div><div class='add'>+mm_fault_error(struct pt_regs *regs, unsigned long error_code,</div><div class='add'>+	       unsigned long address, unsigned int fault)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Pagefault was interrupted by SIGKILL. We have no reason to</div><div class='add'>+	 * continue pagefault.</div><div class='add'>+	 */</div><div class='add'>+	if (fatal_signal_pending(current)) {</div><div class='add'>+		if (!(fault &amp; VM_FAULT_RETRY))</div><div class='add'>+			up_read(&amp;current-&gt;mm-&gt;mmap_sem);</div><div class='add'>+		if (!user_mode(regs))</div><div class='add'>+			no_context(regs, error_code, address);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(fault &amp; VM_FAULT_ERROR))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (fault &amp; VM_FAULT_OOM) {</div><div class='add'>+		/* Kernel mode? Handle exceptions or die: */</div><div class='add'>+		if (!user_mode(regs)) {</div><div class='add'>+			up_read(&amp;current-&gt;mm-&gt;mmap_sem);</div><div class='add'>+			no_context(regs, error_code, address);</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		out_of_memory();</div><div class='add'>+	} else {</div><div class='add'>+		if (fault &amp; VM_FAULT_SIGBUS)</div><div class='add'>+			do_sigbus(regs, error_code, address);</div><div class='add'>+		else</div><div class='add'>+			BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int access_error(int error_code, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	if (error_code &amp; FAULT_CODE_WRITE) {</div><div class='add'>+		/* write, present and write, not present: */</div><div class='add'>+		if (unlikely(!(vma-&gt;vm_flags &amp; VM_WRITE)))</div><div class='add'>+			return 1;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* ITLB miss on NX page */</div><div class='add'>+	if (unlikely((error_code &amp; FAULT_CODE_ITLB) &amp;&amp;</div><div class='add'>+		     !(vma-&gt;vm_flags &amp; VM_EXEC)))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	/* read, not present: */</div><div class='add'>+	if (unlikely(!(vma-&gt;vm_flags &amp; (VM_READ | VM_EXEC | VM_WRITE))))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fault_in_kernel_space(unsigned long address)</div><div class='add'>+{</div><div class='add'>+	return address &gt;= TASK_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This routine handles page faults.  It determines the address,</div><div class='add'>+ * and the problem, and then passes it off to one of the appropriate</div><div class='add'>+ * routines.</div><div class='add'>+ */</div><div class='add'>+asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,</div><div class='add'>+					unsigned long error_code,</div><div class='add'>+					unsigned long address)</div><div class='add'>+{</div><div class='add'>+	unsigned long vec;</div><div class='add'>+	struct task_struct *tsk;</div><div class='add'>+	struct mm_struct *mm;</div><div class='add'>+	struct vm_area_struct * vma;</div><div class='add'>+	int fault;</div><div class='add'>+	int write = error_code &amp; FAULT_CODE_WRITE;</div><div class='add'>+	unsigned int flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |</div><div class='add'>+			      (write ? FAULT_FLAG_WRITE : 0));</div><div class='add'>+</div><div class='add'>+	tsk = current;</div><div class='add'>+	mm = tsk-&gt;mm;</div><div class='add'>+	vec = lookup_exception_vector();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We fault-in kernel-space virtual memory on-demand. The</div><div class='add'>+	 * 'reference' page table is init_mm.pgd.</div><div class='add'>+	 *</div><div class='add'>+	 * NOTE! We MUST NOT take any locks for this case. We may</div><div class='add'>+	 * be in an interrupt or a critical region, and should</div><div class='add'>+	 * only copy the information from the master page table,</div><div class='add'>+	 * nothing more.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(fault_in_kernel_space(address))) {</div><div class='add'>+		if (vmalloc_fault(address) &gt;= 0)</div><div class='add'>+			return;</div><div class='add'>+		if (notify_page_fault(regs, vec))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		bad_area_nosemaphore(regs, error_code, address);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(notify_page_fault(regs, vec)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Only enable interrupts if they were on before the fault */</div><div class='add'>+	if ((regs-&gt;sr &amp; SR_IMASK) != SR_IMASK)</div><div class='add'>+		local_irq_enable();</div><div class='add'>+</div><div class='add'>+	perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we're in an interrupt, have no user context or are running</div><div class='add'>+	 * in an atomic region then we must not take the fault:</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(in_atomic() || !mm)) {</div><div class='add'>+		bad_area_nosemaphore(regs, error_code, address);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+retry:</div><div class='add'>+	down_read(&amp;mm-&gt;mmap_sem);</div><div class='add'>+</div><div class='add'>+	vma = find_vma(mm, address);</div><div class='add'>+	if (unlikely(!vma)) {</div><div class='add'>+		bad_area(regs, error_code, address);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (likely(vma-&gt;vm_start &lt;= address))</div><div class='add'>+		goto good_area;</div><div class='add'>+	if (unlikely(!(vma-&gt;vm_flags &amp; VM_GROWSDOWN))) {</div><div class='add'>+		bad_area(regs, error_code, address);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (unlikely(expand_stack(vma, address))) {</div><div class='add'>+		bad_area(regs, error_code, address);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Ok, we have a good vm_area for this memory access, so</div><div class='add'>+	 * we can handle it..</div><div class='add'>+	 */</div><div class='add'>+good_area:</div><div class='add'>+	if (unlikely(access_error(error_code, vma))) {</div><div class='add'>+		bad_area_access_error(regs, error_code, address);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_thread_fault_code(error_code);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If for any reason at all we couldn't handle the fault,</div><div class='add'>+	 * make sure we exit gracefully rather than endlessly redo</div><div class='add'>+	 * the fault.</div><div class='add'>+	 */</div><div class='add'>+	fault = handle_mm_fault(mm, vma, address, flags);</div><div class='add'>+</div><div class='add'>+	if (unlikely(fault &amp; (VM_FAULT_RETRY | VM_FAULT_ERROR)))</div><div class='add'>+		if (mm_fault_error(regs, error_code, address, fault))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; FAULT_FLAG_ALLOW_RETRY) {</div><div class='add'>+		if (fault &amp; VM_FAULT_MAJOR) {</div><div class='add'>+			tsk-&gt;maj_flt++;</div><div class='add'>+			perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,</div><div class='add'>+				      regs, address);</div><div class='add'>+		} else {</div><div class='add'>+			tsk-&gt;min_flt++;</div><div class='add'>+			perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,</div><div class='add'>+				      regs, address);</div><div class='add'>+		}</div><div class='add'>+		if (fault &amp; VM_FAULT_RETRY) {</div><div class='add'>+			flags &amp;= ~FAULT_FLAG_ALLOW_RETRY;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * No need to up_read(&amp;mm-&gt;mmap_sem) as we would</div><div class='add'>+			 * have already released it in __lock_page_or_retry</div><div class='add'>+			 * in mm/filemap.c.</div><div class='add'>+			 */</div><div class='add'>+			goto retry;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	up_read(&amp;mm-&gt;mmap_sem);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c<br/>deleted file mode 100644<br/>index e99b104d967a..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sh/mm/fault_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/mm/fault_32.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,374 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Page fault handler for SH with an MMU.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1999  Niibe Yutaka</div><div class='del'>- *  Copyright (C) 2003 - 2009  Paul Mundt</div><div class='del'>- *</div><div class='del'>- *  Based on linux/arch/i386/mm/fault.c:</div><div class='del'>- *   Copyright (C) 1995  Linus Torvalds</div><div class='del'>- *</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License.  See the file "COPYING" in the main directory of this archive</div><div class='del'>- * for more details.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/hardirq.h&gt;</div><div class='del'>-#include &lt;linux/kprobes.h&gt;</div><div class='del'>-#include &lt;linux/perf_event.h&gt;</div><div class='del'>-#include &lt;asm/io_trapped.h&gt;</div><div class='del'>-#include &lt;asm/mmu_context.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-#include &lt;asm/traps.h&gt;</div><div class='del'>-</div><div class='del'>-static inline int notify_page_fault(struct pt_regs *regs, int trap)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (kprobes_built_in() &amp;&amp; !user_mode(regs)) {</div><div class='del'>-		preempt_disable();</div><div class='del'>-		if (kprobe_running() &amp;&amp; kprobe_fault_handler(regs, trap))</div><div class='del'>-			ret = 1;</div><div class='del'>-		preempt_enable();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	unsigned index = pgd_index(address);</div><div class='del'>-	pgd_t *pgd_k;</div><div class='del'>-	pud_t *pud, *pud_k;</div><div class='del'>-	pmd_t *pmd, *pmd_k;</div><div class='del'>-</div><div class='del'>-	pgd += index;</div><div class='del'>-	pgd_k = init_mm.pgd + index;</div><div class='del'>-</div><div class='del'>-	if (!pgd_present(*pgd_k))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	pud = pud_offset(pgd, address);</div><div class='del'>-	pud_k = pud_offset(pgd_k, address);</div><div class='del'>-	if (!pud_present(*pud_k))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	if (!pud_present(*pud))</div><div class='del'>-	    set_pud(pud, *pud_k);</div><div class='del'>-</div><div class='del'>-	pmd = pmd_offset(pud, address);</div><div class='del'>-	pmd_k = pmd_offset(pud_k, address);</div><div class='del'>-	if (!pmd_present(*pmd_k))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	if (!pmd_present(*pmd))</div><div class='del'>-		set_pmd(pmd, *pmd_k);</div><div class='del'>-	else {</div><div class='del'>-		/*</div><div class='del'>-		 * The page tables are fully synchronised so there must</div><div class='del'>-		 * be another reason for the fault. Return NULL here to</div><div class='del'>-		 * signal that we have not taken care of the fault.</div><div class='del'>-		 */</div><div class='del'>-		BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return pmd_k;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Handle a fault on the vmalloc or module mapping area</div><div class='del'>- */</div><div class='del'>-static noinline int vmalloc_fault(unsigned long address)</div><div class='del'>-{</div><div class='del'>-	pgd_t *pgd_k;</div><div class='del'>-	pmd_t *pmd_k;</div><div class='del'>-	pte_t *pte_k;</div><div class='del'>-</div><div class='del'>-	/* Make sure we are in vmalloc/module/P3 area: */</div><div class='del'>-	if (!(address &gt;= P3SEG &amp;&amp; address &lt; P3_ADDR_MAX))</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Synchronize this task's top level page-table</div><div class='del'>-	 * with the 'reference' page table.</div><div class='del'>-	 *</div><div class='del'>-	 * Do _not_ use "current" here. We might be inside</div><div class='del'>-	 * an interrupt in the middle of a task switch..</div><div class='del'>-	 */</div><div class='del'>-	pgd_k = get_TTB();</div><div class='del'>-	pmd_k = vmalloc_sync_one(pgd_k, address);</div><div class='del'>-	if (!pmd_k)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	pte_k = pte_offset_kernel(pmd_k, address);</div><div class='del'>-	if (!pte_present(*pte_k))</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fault_in_kernel_space(unsigned long address)</div><div class='del'>-{</div><div class='del'>-	return address &gt;= TASK_SIZE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This routine handles page faults.  It determines the address,</div><div class='del'>- * and the problem, and then passes it off to one of the appropriate</div><div class='del'>- * routines.</div><div class='del'>- */</div><div class='del'>-asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,</div><div class='del'>-					unsigned long writeaccess,</div><div class='del'>-					unsigned long address)</div><div class='del'>-{</div><div class='del'>-	unsigned long vec;</div><div class='del'>-	struct task_struct *tsk;</div><div class='del'>-	struct mm_struct *mm;</div><div class='del'>-	struct vm_area_struct * vma;</div><div class='del'>-	int si_code;</div><div class='del'>-	int fault;</div><div class='del'>-	siginfo_t info;</div><div class='del'>-</div><div class='del'>-	tsk = current;</div><div class='del'>-	mm = tsk-&gt;mm;</div><div class='del'>-	si_code = SEGV_MAPERR;</div><div class='del'>-	vec = lookup_exception_vector();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We fault-in kernel-space virtual memory on-demand. The</div><div class='del'>-	 * 'reference' page table is init_mm.pgd.</div><div class='del'>-	 *</div><div class='del'>-	 * NOTE! We MUST NOT take any locks for this case. We may</div><div class='del'>-	 * be in an interrupt or a critical region, and should</div><div class='del'>-	 * only copy the information from the master page table,</div><div class='del'>-	 * nothing more.</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(fault_in_kernel_space(address))) {</div><div class='del'>-		if (vmalloc_fault(address) &gt;= 0)</div><div class='del'>-			return;</div><div class='del'>-		if (notify_page_fault(regs, vec))</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-		goto bad_area_nosemaphore;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(notify_page_fault(regs, vec)))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Only enable interrupts if they were on before the fault */</div><div class='del'>-	if ((regs-&gt;sr &amp; SR_IMASK) != SR_IMASK)</div><div class='del'>-		local_irq_enable();</div><div class='del'>-</div><div class='del'>-	perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If we're in an interrupt, have no user context or are running</div><div class='del'>-	 * in an atomic region then we must not take the fault:</div><div class='del'>-	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='del'>-		goto no_context;</div><div class='del'>-</div><div class='del'>-	down_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-</div><div class='del'>-	vma = find_vma(mm, address);</div><div class='del'>-	if (!vma)</div><div class='del'>-		goto bad_area;</div><div class='del'>-	if (vma-&gt;vm_start &lt;= address)</div><div class='del'>-		goto good_area;</div><div class='del'>-	if (!(vma-&gt;vm_flags &amp; VM_GROWSDOWN))</div><div class='del'>-		goto bad_area;</div><div class='del'>-	if (expand_stack(vma, address))</div><div class='del'>-		goto bad_area;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Ok, we have a good vm_area for this memory access, so</div><div class='del'>-	 * we can handle it..</div><div class='del'>-	 */</div><div class='del'>-good_area:</div><div class='del'>-	si_code = SEGV_ACCERR;</div><div class='del'>-	if (writeaccess) {</div><div class='del'>-		if (!(vma-&gt;vm_flags &amp; VM_WRITE))</div><div class='del'>-			goto bad_area;</div><div class='del'>-	} else {</div><div class='del'>-		if (!(vma-&gt;vm_flags &amp; (VM_READ | VM_EXEC | VM_WRITE)))</div><div class='del'>-			goto bad_area;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If for any reason at all we couldn't handle the fault,</div><div class='del'>-	 * make sure we exit gracefully rather than endlessly redo</div><div class='del'>-	 * the fault.</div><div class='del'>-	 */</div><div class='del'>-	fault = handle_mm_fault(mm, vma, address, writeaccess ? FAULT_FLAG_WRITE : 0);</div><div class='del'>-	if (unlikely(fault &amp; VM_FAULT_ERROR)) {</div><div class='del'>-		if (fault &amp; VM_FAULT_OOM)</div><div class='del'>-			goto out_of_memory;</div><div class='del'>-		else if (fault &amp; VM_FAULT_SIGBUS)</div><div class='del'>-			goto do_sigbus;</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-	if (fault &amp; VM_FAULT_MAJOR) {</div><div class='del'>-		tsk-&gt;maj_flt++;</div><div class='del'>-		perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,</div><div class='del'>-				     regs, address);</div><div class='del'>-	} else {</div><div class='del'>-		tsk-&gt;min_flt++;</div><div class='del'>-		perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,</div><div class='del'>-				     regs, address);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	up_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-	return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Something tried to access memory that isn't in our memory map..</div><div class='del'>-	 * Fix it, but check if it's kernel or user first..</div><div class='del'>-	 */</div><div class='del'>-bad_area:</div><div class='del'>-	up_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-</div><div class='del'>-bad_area_nosemaphore:</div><div class='del'>-	if (user_mode(regs)) {</div><div class='del'>-		info.si_signo = SIGSEGV;</div><div class='del'>-		info.si_errno = 0;</div><div class='del'>-		info.si_code = si_code;</div><div class='del'>-		info.si_addr = (void *) address;</div><div class='del'>-		force_sig_info(SIGSEGV, &amp;info, tsk);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-no_context:</div><div class='del'>-	/* Are we prepared to handle this kernel fault?  */</div><div class='del'>-	if (fixup_exception(regs))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (handle_trapped_io(regs, address))</div><div class='del'>-		return;</div><div class='del'>-/*</div><div class='del'>- * Oops. The kernel tried to access some bad page. We'll have to</div><div class='del'>- * terminate things with extreme prejudice.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-	bust_spinlocks(1);</div><div class='del'>-</div><div class='del'>-	if (oops_may_print()) {</div><div class='del'>-		unsigned long page;</div><div class='del'>-</div><div class='del'>-		if (address &lt; PAGE_SIZE)</div><div class='del'>-			printk(KERN_ALERT "Unable to handle kernel NULL "</div><div class='del'>-					  "pointer dereference");</div><div class='del'>-		else</div><div class='del'>-			printk(KERN_ALERT "Unable to handle kernel paging "</div><div class='del'>-					  "request");</div><div class='del'>-		printk(" at virtual address %08lx\n", address);</div><div class='del'>-		printk(KERN_ALERT "pc = %08lx\n", regs-&gt;pc);</div><div class='del'>-		page = (unsigned long)get_TTB();</div><div class='del'>-		if (page) {</div><div class='del'>-			page = ((__typeof__(page) *)page)[address &gt;&gt; PGDIR_SHIFT];</div><div class='del'>-			printk(KERN_ALERT "*pde = %08lx\n", page);</div><div class='del'>-			if (page &amp; _PAGE_PRESENT) {</div><div class='del'>-				page &amp;= PAGE_MASK;</div><div class='del'>-				address &amp;= 0x003ff000;</div><div class='del'>-				page = ((__typeof__(page) *)</div><div class='del'>-						__va(page))[address &gt;&gt;</div><div class='del'>-							    PAGE_SHIFT];</div><div class='del'>-				printk(KERN_ALERT "*pte = %08lx\n", page);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	die("Oops", regs, writeaccess);</div><div class='del'>-	bust_spinlocks(0);</div><div class='del'>-	do_exit(SIGKILL);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We ran out of memory, or some other thing happened to us that made</div><div class='del'>- * us unable to handle the page fault gracefully.</div><div class='del'>- */</div><div class='del'>-out_of_memory:</div><div class='del'>-	up_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-	if (!user_mode(regs))</div><div class='del'>-		goto no_context;</div><div class='del'>-	pagefault_out_of_memory();</div><div class='del'>-	return;</div><div class='del'>-</div><div class='del'>-do_sigbus:</div><div class='del'>-	up_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Send a sigbus, regardless of whether we were in kernel</div><div class='del'>-	 * or user mode.</div><div class='del'>-	 */</div><div class='del'>-	info.si_signo = SIGBUS;</div><div class='del'>-	info.si_errno = 0;</div><div class='del'>-	info.si_code = BUS_ADRERR;</div><div class='del'>-	info.si_addr = (void *)address;</div><div class='del'>-	force_sig_info(SIGBUS, &amp;info, tsk);</div><div class='del'>-</div><div class='del'>-	/* Kernel mode? Handle exceptions or die */</div><div class='del'>-	if (!user_mode(regs))</div><div class='del'>-		goto no_context;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Called with interrupts disabled.</div><div class='del'>- */</div><div class='del'>-asmlinkage int __kprobes</div><div class='del'>-handle_tlbmiss(struct pt_regs *regs, unsigned long writeaccess,</div><div class='del'>-	       unsigned long address)</div><div class='del'>-{</div><div class='del'>-	pgd_t *pgd;</div><div class='del'>-	pud_t *pud;</div><div class='del'>-	pmd_t *pmd;</div><div class='del'>-	pte_t *pte;</div><div class='del'>-	pte_t entry;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We don't take page faults for P1, P2, and parts of P4, these</div><div class='del'>-	 * are always mapped, whether it be due to legacy behaviour in</div><div class='del'>-	 * 29-bit mode, or due to PMB configuration in 32-bit mode.</div><div class='del'>-	 */</div><div class='del'>-	if (address &gt;= P3SEG &amp;&amp; address &lt; P3_ADDR_MAX) {</div><div class='del'>-		pgd = pgd_offset_k(address);</div><div class='del'>-	} else {</div><div class='del'>-		if (unlikely(address &gt;= TASK_SIZE || !current-&gt;mm))</div><div class='del'>-			return 1;</div><div class='del'>-</div><div class='del'>-		pgd = pgd_offset(current-&gt;mm, address);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pud = pud_offset(pgd, address);</div><div class='del'>-	if (pud_none_or_clear_bad(pud))</div><div class='del'>-		return 1;</div><div class='del'>-	pmd = pmd_offset(pud, address);</div><div class='del'>-	if (pmd_none_or_clear_bad(pmd))</div><div class='del'>-		return 1;</div><div class='del'>-	pte = pte_offset_kernel(pmd, address);</div><div class='del'>-	entry = *pte;</div><div class='del'>-	if (unlikely(pte_none(entry) || pte_not_present(entry)))</div><div class='del'>-		return 1;</div><div class='del'>-	if (unlikely(writeaccess &amp;&amp; !pte_write(entry)))</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	if (writeaccess)</div><div class='del'>-		entry = pte_mkdirty(entry);</div><div class='del'>-	entry = pte_mkyoung(entry);</div><div class='del'>-</div><div class='del'>-	set_pte(pte, entry);</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_CPU_SH4) &amp;&amp; !defined(CONFIG_SMP)</div><div class='del'>-	/*</div><div class='del'>-	 * SH-4 does not set MMUCR.RC to the corresponding TLB entry in</div><div class='del'>-	 * the case of an initial page write exception, so we need to</div><div class='del'>-	 * flush it in order to avoid potential TLB entry duplication.</div><div class='del'>-	 */</div><div class='del'>-	if (writeaccess == 2)</div><div class='del'>-		local_flush_tlb_one(get_asid(), address &amp; PAGE_MASK);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	update_mmu_cache(NULL, address, pte);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/sh/mm/fault_64.c b/arch/sh/mm/fault_64.c<br/>deleted file mode 100644<br/>index 44a341029e7b..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sh/mm/fault_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/mm/fault_64.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,265 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * The SH64 TLB miss.</div><div class='del'>- *</div><div class='del'>- * Original code from fault.c</div><div class='del'>- * Copyright (C) 2000, 2001  Paolo Alberelli</div><div class='del'>- *</div><div class='del'>- * Fast PTE-&gt;TLB refill path</div><div class='del'>- * Copyright (C) 2003 Richard.Curnow@superh.com</div><div class='del'>- *</div><div class='del'>- * IMPORTANT NOTES :</div><div class='del'>- * The do_fast_page_fault function is called from a context in entry.S</div><div class='del'>- * where very few registers have been saved.  In particular, the code in</div><div class='del'>- * this file must be compiled not to use ANY caller-save registers that</div><div class='del'>- * are not part of the restricted save set.  Also, it means that code in</div><div class='del'>- * this file must not make calls to functions elsewhere in the kernel, or</div><div class='del'>- * else the excepting context will see corruption in its caller-save</div><div class='del'>- * registers.  Plus, the entry.S save area is non-reentrant, so this code</div><div class='del'>- * has to run with SR.BL==1, i.e. no interrupts taken inside it and panic</div><div class='del'>- * on any exception.</div><div class='del'>- *</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License.  See the file "COPYING" in the main directory of this archive</div><div class='del'>- * for more details.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/signal.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/mman.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/smp.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;asm/tlb.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgalloc.h&gt;</div><div class='del'>-#include &lt;asm/mmu_context.h&gt;</div><div class='del'>-#include &lt;cpu/registers.h&gt;</div><div class='del'>-</div><div class='del'>-/* Callable from fault.c, so not static */</div><div class='del'>-inline void __do_tlb_refill(unsigned long address,</div><div class='del'>-                            unsigned long long is_text_not_data, pte_t *pte)</div><div class='del'>-{</div><div class='del'>-	unsigned long long ptel;</div><div class='del'>-	unsigned long long pteh=0;</div><div class='del'>-	struct tlb_info *tlbp;</div><div class='del'>-	unsigned long long next;</div><div class='del'>-</div><div class='del'>-	/* Get PTEL first */</div><div class='del'>-	ptel = pte_val(*pte);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set PTEH register</div><div class='del'>-	 */</div><div class='del'>-	pteh = neff_sign_extend(address &amp; MMU_VPN_MASK);</div><div class='del'>-</div><div class='del'>-	/* Set the ASID. */</div><div class='del'>-	pteh |= get_asid() &lt;&lt; PTEH_ASID_SHIFT;</div><div class='del'>-	pteh |= PTEH_VALID;</div><div class='del'>-</div><div class='del'>-	/* Set PTEL register, set_pte has performed the sign extension */</div><div class='del'>-	ptel &amp;= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */</div><div class='del'>-</div><div class='del'>-	tlbp = is_text_not_data ? &amp;(cpu_data-&gt;itlb) : &amp;(cpu_data-&gt;dtlb);</div><div class='del'>-	next = tlbp-&gt;next;</div><div class='del'>-	__flush_tlb_slot(next);</div><div class='del'>-	asm volatile ("putcfg %0,1,%2\n\n\t"</div><div class='del'>-		      "putcfg %0,0,%1\n"</div><div class='del'>-		      :  : "r" (next), "r" (pteh), "r" (ptel) );</div><div class='del'>-</div><div class='del'>-	next += TLB_STEP;</div><div class='del'>-	if (next &gt; tlbp-&gt;last) next = tlbp-&gt;first;</div><div class='del'>-	tlbp-&gt;next = next;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int handle_vmalloc_fault(struct mm_struct *mm,</div><div class='del'>-				unsigned long protection_flags,</div><div class='del'>-                                unsigned long long textaccess,</div><div class='del'>-				unsigned long address)</div><div class='del'>-{</div><div class='del'>-	pgd_t *dir;</div><div class='del'>-	pud_t *pud;</div><div class='del'>-	pmd_t *pmd;</div><div class='del'>-	static pte_t *pte;</div><div class='del'>-	pte_t entry;</div><div class='del'>-</div><div class='del'>-	dir = pgd_offset_k(address);</div><div class='del'>-</div><div class='del'>-	pud = pud_offset(dir, address);</div><div class='del'>-	if (pud_none_or_clear_bad(pud))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	pmd = pmd_offset(pud, address);</div><div class='del'>-	if (pmd_none_or_clear_bad(pmd))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	pte = pte_offset_kernel(pmd, address);</div><div class='del'>-	entry = *pte;</div><div class='del'>-</div><div class='del'>-	if (pte_none(entry) || !pte_present(entry))</div><div class='del'>-		return 0;</div><div class='del'>-	if ((pte_val(entry) &amp; protection_flags) != protection_flags)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-        __do_tlb_refill(address, textaccess, pte);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int handle_tlbmiss(struct mm_struct *mm,</div><div class='del'>-			  unsigned long long protection_flags,</div><div class='del'>-			  unsigned long long textaccess,</div><div class='del'>-			  unsigned long address)</div><div class='del'>-{</div><div class='del'>-	pgd_t *dir;</div><div class='del'>-	pud_t *pud;</div><div class='del'>-	pmd_t *pmd;</div><div class='del'>-	pte_t *pte;</div><div class='del'>-	pte_t entry;</div><div class='del'>-</div><div class='del'>-	/* NB. The PGD currently only contains a single entry - there is no</div><div class='del'>-	   page table tree stored for the top half of the address space since</div><div class='del'>-	   virtual pages in that region should never be mapped in user mode.</div><div class='del'>-	   (In kernel mode, the only things in that region are the 512Mb super</div><div class='del'>-	   page (locked in), and vmalloc (modules) +  I/O device pages (handled</div><div class='del'>-	   by handle_vmalloc_fault), so no PGD for the upper half is required</div><div class='del'>-	   by kernel mode either).</div><div class='del'>-</div><div class='del'>-	   See how mm-&gt;pgd is allocated and initialised in pgd_alloc to see why</div><div class='del'>-	   the next test is necessary.  - RPC */</div><div class='del'>-	if (address &gt;= (unsigned long) TASK_SIZE)</div><div class='del'>-		/* upper half - never has page table entries. */</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	dir = pgd_offset(mm, address);</div><div class='del'>-	if (pgd_none(*dir) || !pgd_present(*dir))</div><div class='del'>-		return 0;</div><div class='del'>-	if (!pgd_present(*dir))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	pud = pud_offset(dir, address);</div><div class='del'>-	if (pud_none(*pud) || !pud_present(*pud))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	pmd = pmd_offset(pud, address);</div><div class='del'>-	if (pmd_none(*pmd) || !pmd_present(*pmd))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	pte = pte_offset_kernel(pmd, address);</div><div class='del'>-	entry = *pte;</div><div class='del'>-</div><div class='del'>-	if (pte_none(entry) || !pte_present(entry))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the page doesn't have sufficient protection bits set to</div><div class='del'>-	 * service the kind of fault being handled, there's not much</div><div class='del'>-	 * point doing the TLB refill.  Punt the fault to the general</div><div class='del'>-	 * handler.</div><div class='del'>-	 */</div><div class='del'>-	if ((pte_val(entry) &amp; protection_flags) != protection_flags)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-        __do_tlb_refill(address, textaccess, pte);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Put all this information into one structure so that everything is just</div><div class='del'>- * arithmetic relative to a single base address.  This reduces the number</div><div class='del'>- * of movi/shori pairs needed just to load addresses of static data.</div><div class='del'>- */</div><div class='del'>-struct expevt_lookup {</div><div class='del'>-	unsigned short protection_flags[8];</div><div class='del'>-	unsigned char  is_text_access[8];</div><div class='del'>-	unsigned char  is_write_access[8];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define PRU (1&lt;&lt;9)</div><div class='del'>-#define PRW (1&lt;&lt;8)</div><div class='del'>-#define PRX (1&lt;&lt;7)</div><div class='del'>-#define PRR (1&lt;&lt;6)</div><div class='del'>-</div><div class='del'>-#define DIRTY (_PAGE_DIRTY | _PAGE_ACCESSED)</div><div class='del'>-#define YOUNG (_PAGE_ACCESSED)</div><div class='del'>-</div><div class='del'>-/* Sized as 8 rather than 4 to allow checking the PTE's PRU bit against whether</div><div class='del'>-   the fault happened in user mode or privileged mode. */</div><div class='del'>-static struct expevt_lookup expevt_lookup_table = {</div><div class='del'>-	.protection_flags = {PRX, PRX, 0, 0, PRR, PRR, PRW, PRW},</div><div class='del'>-	.is_text_access   = {1,   1,   0, 0, 0,   0,   0,   0}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-   This routine handles page faults that can be serviced just by refilling a</div><div class='del'>-   TLB entry from an existing page table entry.  (This case represents a very</div><div class='del'>-   large majority of page faults.) Return 1 if the fault was successfully</div><div class='del'>-   handled.  Return 0 if the fault could not be handled.  (This leads into the</div><div class='del'>-   general fault handling in fault.c which deals with mapping file-backed</div><div class='del'>-   pages, stack growth, segmentation faults, swapping etc etc)</div><div class='del'>- */</div><div class='del'>-asmlinkage int do_fast_page_fault(unsigned long long ssr_md,</div><div class='del'>-				  unsigned long long expevt,</div><div class='del'>-			          unsigned long address)</div><div class='del'>-{</div><div class='del'>-	struct task_struct *tsk;</div><div class='del'>-	struct mm_struct *mm;</div><div class='del'>-	unsigned long long textaccess;</div><div class='del'>-	unsigned long long protection_flags;</div><div class='del'>-	unsigned long long index;</div><div class='del'>-	unsigned long long expevt4;</div><div class='del'>-</div><div class='del'>-	/* The next few lines implement a way of hashing EXPEVT into a</div><div class='del'>-	 * small array index which can be used to lookup parameters</div><div class='del'>-	 * specific to the type of TLBMISS being handled.</div><div class='del'>-	 *</div><div class='del'>-	 * Note:</div><div class='del'>-	 *	ITLBMISS has EXPEVT==0xa40</div><div class='del'>-	 *	RTLBMISS has EXPEVT==0x040</div><div class='del'>-	 *	WTLBMISS has EXPEVT==0x060</div><div class='del'>-	 */</div><div class='del'>-	expevt4 = (expevt &gt;&gt; 4);</div><div class='del'>-	/* TODO : xor ssr_md into this expression too. Then we can check</div><div class='del'>-	 * that PRU is set when it needs to be. */</div><div class='del'>-	index = expevt4 ^ (expevt4 &gt;&gt; 5);</div><div class='del'>-	index &amp;= 7;</div><div class='del'>-	protection_flags = expevt_lookup_table.protection_flags[index];</div><div class='del'>-	textaccess       = expevt_lookup_table.is_text_access[index];</div><div class='del'>-</div><div class='del'>-	/* SIM</div><div class='del'>-	 * Note this is now called with interrupts still disabled</div><div class='del'>-	 * This is to cope with being called for a missing IO port</div><div class='del'>-	 * address with interrupts disabled. This should be fixed as</div><div class='del'>-	 * soon as we have a better 'fast path' miss handler.</div><div class='del'>-	 *</div><div class='del'>-	 * Plus take care how you try and debug this stuff.</div><div class='del'>-	 * For example, writing debug data to a port which you</div><div class='del'>-	 * have just faulted on is not going to work.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	tsk = current;</div><div class='del'>-	mm = tsk-&gt;mm;</div><div class='del'>-</div><div class='del'>-	if ((address &gt;= VMALLOC_START &amp;&amp; address &lt; VMALLOC_END) ||</div><div class='del'>-	    (address &gt;= IOBASE_VADDR  &amp;&amp; address &lt; IOBASE_END)) {</div><div class='del'>-		if (ssr_md)</div><div class='del'>-			/*</div><div class='del'>-			 * Process-contexts can never have this address</div><div class='del'>-			 * range mapped</div><div class='del'>-			 */</div><div class='del'>-			if (handle_vmalloc_fault(mm, protection_flags,</div><div class='del'>-						 textaccess, address))</div><div class='del'>-				return 1;</div><div class='del'>-	} else if (!in_interrupt() &amp;&amp; mm) {</div><div class='del'>-		if (handle_tlbmiss(mm, protection_flags, textaccess, address))</div><div class='del'>-			return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c<br/>index f27dbe1c1599..3aea25dc431a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/mm/tlb-sh5.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/mm/tlb-sh5.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/mm/tlb-sh5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/tlb-sh5.c</a></div><div class='hunk'>@@ -182,3 +182,43 @@ void tlb_unwire_entry(void)</div><div class='ctx'> </div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)</div><div class='add'>+{</div><div class='add'>+	unsigned long long ptel;</div><div class='add'>+	unsigned long long pteh=0;</div><div class='add'>+	struct tlb_info *tlbp;</div><div class='add'>+	unsigned long long next;</div><div class='add'>+	unsigned int fault_code = get_thread_fault_code();</div><div class='add'>+</div><div class='add'>+	/* Get PTEL first */</div><div class='add'>+	ptel = pte.pte_low;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set PTEH register</div><div class='add'>+	 */</div><div class='add'>+	pteh = neff_sign_extend(address &amp; MMU_VPN_MASK);</div><div class='add'>+</div><div class='add'>+	/* Set the ASID. */</div><div class='add'>+	pteh |= get_asid() &lt;&lt; PTEH_ASID_SHIFT;</div><div class='add'>+	pteh |= PTEH_VALID;</div><div class='add'>+</div><div class='add'>+	/* Set PTEL register, set_pte has performed the sign extension */</div><div class='add'>+	ptel &amp;= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */</div><div class='add'>+</div><div class='add'>+	if (fault_code &amp; FAULT_CODE_ITLB)</div><div class='add'>+		tlbp = &amp;cpu_data-&gt;itlb;</div><div class='add'>+	else</div><div class='add'>+		tlbp = &amp;cpu_data-&gt;dtlb;</div><div class='add'>+</div><div class='add'>+	next = tlbp-&gt;next;</div><div class='add'>+	__flush_tlb_slot(next);</div><div class='add'>+	asm volatile ("putcfg %0,1,%2\n\n\t"</div><div class='add'>+		      "putcfg %0,0,%1\n"</div><div class='add'>+		      :  : "r" (next), "r" (pteh), "r" (ptel) );</div><div class='add'>+</div><div class='add'>+	next += TLB_STEP;</div><div class='add'>+	if (next &gt; tlbp-&gt;last)</div><div class='add'>+		next = tlbp-&gt;first;</div><div class='add'>+	tlbp-&gt;next = next;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sh/mm/tlbex_32.c b/arch/sh/mm/tlbex_32.c<br/>new file mode 100644<br/>index 000000000000..382262dc0c4b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/mm/tlbex_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/tlbex_32.c</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+/*</div><div class='add'>+ * TLB miss handler for SH with an MMU.</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 1999  Niibe Yutaka</div><div class='add'>+ *  Copyright (C) 2003 - 2012  Paul Mundt</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/kprobes.h&gt;</div><div class='add'>+#include &lt;linux/kdebug.h&gt;</div><div class='add'>+#include &lt;asm/mmu_context.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called with interrupts disabled.</div><div class='add'>+ */</div><div class='add'>+asmlinkage int __kprobes</div><div class='add'>+handle_tlbmiss(struct pt_regs *regs, unsigned long error_code,</div><div class='add'>+	       unsigned long address)</div><div class='add'>+{</div><div class='add'>+	pgd_t *pgd;</div><div class='add'>+	pud_t *pud;</div><div class='add'>+	pmd_t *pmd;</div><div class='add'>+	pte_t *pte;</div><div class='add'>+	pte_t entry;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We don't take page faults for P1, P2, and parts of P4, these</div><div class='add'>+	 * are always mapped, whether it be due to legacy behaviour in</div><div class='add'>+	 * 29-bit mode, or due to PMB configuration in 32-bit mode.</div><div class='add'>+	 */</div><div class='add'>+	if (address &gt;= P3SEG &amp;&amp; address &lt; P3_ADDR_MAX) {</div><div class='add'>+		pgd = pgd_offset_k(address);</div><div class='add'>+	} else {</div><div class='add'>+		if (unlikely(address &gt;= TASK_SIZE || !current-&gt;mm))</div><div class='add'>+			return 1;</div><div class='add'>+</div><div class='add'>+		pgd = pgd_offset(current-&gt;mm, address);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pud = pud_offset(pgd, address);</div><div class='add'>+	if (pud_none_or_clear_bad(pud))</div><div class='add'>+		return 1;</div><div class='add'>+	pmd = pmd_offset(pud, address);</div><div class='add'>+	if (pmd_none_or_clear_bad(pmd))</div><div class='add'>+		return 1;</div><div class='add'>+	pte = pte_offset_kernel(pmd, address);</div><div class='add'>+	entry = *pte;</div><div class='add'>+	if (unlikely(pte_none(entry) || pte_not_present(entry)))</div><div class='add'>+		return 1;</div><div class='add'>+	if (unlikely(error_code &amp;&amp; !pte_write(entry)))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	if (error_code)</div><div class='add'>+		entry = pte_mkdirty(entry);</div><div class='add'>+	entry = pte_mkyoung(entry);</div><div class='add'>+</div><div class='add'>+	set_pte(pte, entry);</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_SH4) &amp;&amp; !defined(CONFIG_SMP)</div><div class='add'>+	/*</div><div class='add'>+	 * SH-4 does not set MMUCR.RC to the corresponding TLB entry in</div><div class='add'>+	 * the case of an initial page write exception, so we need to</div><div class='add'>+	 * flush it in order to avoid potential TLB entry duplication.</div><div class='add'>+	 */</div><div class='add'>+	if (error_code == FAULT_CODE_INITIAL)</div><div class='add'>+		local_flush_tlb_one(get_asid(), address &amp; PAGE_MASK);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	set_thread_fault_code(error_code);</div><div class='add'>+	update_mmu_cache(NULL, address, pte);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sh/mm/tlbex_64.c b/arch/sh/mm/tlbex_64.c<br/>new file mode 100644<br/>index 000000000000..8557548fc53e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sh/mm/tlbex_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/tlbex_64.c</a></div><div class='hunk'>@@ -0,0 +1,166 @@</div><div class='add'>+/*</div><div class='add'>+ * The SH64 TLB miss.</div><div class='add'>+ *</div><div class='add'>+ * Original code from fault.c</div><div class='add'>+ * Copyright (C) 2000, 2001  Paolo Alberelli</div><div class='add'>+ *</div><div class='add'>+ * Fast PTE-&gt;TLB refill path</div><div class='add'>+ * Copyright (C) 2003 Richard.Curnow@superh.com</div><div class='add'>+ *</div><div class='add'>+ * IMPORTANT NOTES :</div><div class='add'>+ * The do_fast_page_fault function is called from a context in entry.S</div><div class='add'>+ * where very few registers have been saved.  In particular, the code in</div><div class='add'>+ * this file must be compiled not to use ANY caller-save registers that</div><div class='add'>+ * are not part of the restricted save set.  Also, it means that code in</div><div class='add'>+ * this file must not make calls to functions elsewhere in the kernel, or</div><div class='add'>+ * else the excepting context will see corruption in its caller-save</div><div class='add'>+ * registers.  Plus, the entry.S save area is non-reentrant, so this code</div><div class='add'>+ * has to run with SR.BL==1, i.e. no interrupts taken inside it and panic</div><div class='add'>+ * on any exception.</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='add'>+#include &lt;linux/mman.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/kprobes.h&gt;</div><div class='add'>+#include &lt;asm/tlb.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/pgalloc.h&gt;</div><div class='add'>+#include &lt;asm/mmu_context.h&gt;</div><div class='add'>+</div><div class='add'>+static int handle_tlbmiss(unsigned long long protection_flags,</div><div class='add'>+			  unsigned long address)</div><div class='add'>+{</div><div class='add'>+	pgd_t *pgd;</div><div class='add'>+	pud_t *pud;</div><div class='add'>+	pmd_t *pmd;</div><div class='add'>+	pte_t *pte;</div><div class='add'>+	pte_t entry;</div><div class='add'>+</div><div class='add'>+	if (is_vmalloc_addr((void *)address)) {</div><div class='add'>+		pgd = pgd_offset_k(address);</div><div class='add'>+	} else {</div><div class='add'>+		if (unlikely(address &gt;= TASK_SIZE || !current-&gt;mm))</div><div class='add'>+			return 1;</div><div class='add'>+</div><div class='add'>+		pgd = pgd_offset(current-&gt;mm, address);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pud = pud_offset(pgd, address);</div><div class='add'>+	if (pud_none(*pud) || !pud_present(*pud))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	pmd = pmd_offset(pud, address);</div><div class='add'>+	if (pmd_none(*pmd) || !pmd_present(*pmd))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	pte = pte_offset_kernel(pmd, address);</div><div class='add'>+	entry = *pte;</div><div class='add'>+	if (pte_none(entry) || !pte_present(entry))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the page doesn't have sufficient protection bits set to</div><div class='add'>+	 * service the kind of fault being handled, there's not much</div><div class='add'>+	 * point doing the TLB refill.  Punt the fault to the general</div><div class='add'>+	 * handler.</div><div class='add'>+	 */</div><div class='add'>+	if ((pte_val(entry) &amp; protection_flags) != protection_flags)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	update_mmu_cache(NULL, address, pte);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Put all this information into one structure so that everything is just</div><div class='add'>+ * arithmetic relative to a single base address.  This reduces the number</div><div class='add'>+ * of movi/shori pairs needed just to load addresses of static data.</div><div class='add'>+ */</div><div class='add'>+struct expevt_lookup {</div><div class='add'>+	unsigned short protection_flags[8];</div><div class='add'>+	unsigned char  is_text_access[8];</div><div class='add'>+	unsigned char  is_write_access[8];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define PRU (1&lt;&lt;9)</div><div class='add'>+#define PRW (1&lt;&lt;8)</div><div class='add'>+#define PRX (1&lt;&lt;7)</div><div class='add'>+#define PRR (1&lt;&lt;6)</div><div class='add'>+</div><div class='add'>+/* Sized as 8 rather than 4 to allow checking the PTE's PRU bit against whether</div><div class='add'>+   the fault happened in user mode or privileged mode. */</div><div class='add'>+static struct expevt_lookup expevt_lookup_table = {</div><div class='add'>+	.protection_flags = {PRX, PRX, 0, 0, PRR, PRR, PRW, PRW},</div><div class='add'>+	.is_text_access   = {1,   1,   0, 0, 0,   0,   0,   0}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+expevt_to_fault_code(unsigned long expevt)</div><div class='add'>+{</div><div class='add'>+	if (expevt == 0xa40)</div><div class='add'>+		return FAULT_CODE_ITLB;</div><div class='add'>+	else if (expevt == 0x060)</div><div class='add'>+		return FAULT_CODE_WRITE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+   This routine handles page faults that can be serviced just by refilling a</div><div class='add'>+   TLB entry from an existing page table entry.  (This case represents a very</div><div class='add'>+   large majority of page faults.) Return 1 if the fault was successfully</div><div class='add'>+   handled.  Return 0 if the fault could not be handled.  (This leads into the</div><div class='add'>+   general fault handling in fault.c which deals with mapping file-backed</div><div class='add'>+   pages, stack growth, segmentation faults, swapping etc etc)</div><div class='add'>+ */</div><div class='add'>+asmlinkage int __kprobes</div><div class='add'>+do_fast_page_fault(unsigned long long ssr_md, unsigned long long expevt,</div><div class='add'>+		   unsigned long address)</div><div class='add'>+{</div><div class='add'>+	unsigned long long protection_flags;</div><div class='add'>+	unsigned long long index;</div><div class='add'>+	unsigned long long expevt4;</div><div class='add'>+	unsigned int fault_code;</div><div class='add'>+</div><div class='add'>+	/* The next few lines implement a way of hashing EXPEVT into a</div><div class='add'>+	 * small array index which can be used to lookup parameters</div><div class='add'>+	 * specific to the type of TLBMISS being handled.</div><div class='add'>+	 *</div><div class='add'>+	 * Note:</div><div class='add'>+	 *	ITLBMISS has EXPEVT==0xa40</div><div class='add'>+	 *	RTLBMISS has EXPEVT==0x040</div><div class='add'>+	 *	WTLBMISS has EXPEVT==0x060</div><div class='add'>+	 */</div><div class='add'>+	expevt4 = (expevt &gt;&gt; 4);</div><div class='add'>+	/* TODO : xor ssr_md into this expression too. Then we can check</div><div class='add'>+	 * that PRU is set when it needs to be. */</div><div class='add'>+	index = expevt4 ^ (expevt4 &gt;&gt; 5);</div><div class='add'>+	index &amp;= 7;</div><div class='add'>+</div><div class='add'>+	fault_code = expevt_to_fault_code(expevt);</div><div class='add'>+</div><div class='add'>+	protection_flags = expevt_lookup_table.protection_flags[index];</div><div class='add'>+</div><div class='add'>+	if (expevt_lookup_table.is_text_access[index])</div><div class='add'>+		fault_code |= FAULT_CODE_ITLB;</div><div class='add'>+	if (!ssr_md)</div><div class='add'>+		fault_code |= FAULT_CODE_USER;</div><div class='add'>+</div><div class='add'>+	set_thread_fault_code(fault_code);</div><div class='add'>+</div><div class='add'>+	return handle_tlbmiss(protection_flags, address);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sh/mm/tlbflush_64.c b/arch/sh/mm/tlbflush_64.c<br/>index 11c5a18f10ed..f33fdd2558e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/mm/tlbflush_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/mm/tlbflush_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/mm/tlbflush_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/mm/tlbflush_64.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2000, 2001  Paolo Alberelli</div><div class='ctx'>  * Copyright (C) 2003  Richard Curnow (/proc/tlb, bug fixes)</div><div class='del'>- * Copyright (C) 2003 - 2009 Paul Mundt</div><div class='add'>+ * Copyright (C) 2003 - 2012 Paul Mundt</div><div class='ctx'>  *</div><div class='ctx'>  * This file is subject to the terms and conditions of the GNU General Public</div><div class='ctx'>  * License.  See the file "COPYING" in the main directory of this archive</div><div class='hunk'>@@ -28,294 +28,6 @@</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> </div><div class='del'>-extern void die(const char *,struct pt_regs *,long);</div><div class='del'>-</div><div class='del'>-#define PFLAG(val,flag)   (( (val) &amp; (flag) ) ? #flag : "" )</div><div class='del'>-#define PPROT(flag) PFLAG(pgprot_val(prot),flag)</div><div class='del'>-</div><div class='del'>-static inline void print_prots(pgprot_t prot)</div><div class='del'>-{</div><div class='del'>-	printk("prot is 0x%016llx\n",pgprot_val(prot));</div><div class='del'>-</div><div class='del'>-	printk("%s %s %s %s %s\n",PPROT(_PAGE_SHARED),PPROT(_PAGE_READ),</div><div class='del'>-	       PPROT(_PAGE_EXECUTE),PPROT(_PAGE_WRITE),PPROT(_PAGE_USER));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void print_vma(struct vm_area_struct *vma)</div><div class='del'>-{</div><div class='del'>-	printk("vma start 0x%08lx\n", vma-&gt;vm_start);</div><div class='del'>-	printk("vma end   0x%08lx\n", vma-&gt;vm_end);</div><div class='del'>-</div><div class='del'>-	print_prots(vma-&gt;vm_page_prot);</div><div class='del'>-	printk("vm_flags 0x%08lx\n", vma-&gt;vm_flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void print_task(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	printk("Task pid %d\n", task_pid_nr(tsk));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static pte_t *lookup_pte(struct mm_struct *mm, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	pgd_t *dir;</div><div class='del'>-	pud_t *pud;</div><div class='del'>-	pmd_t *pmd;</div><div class='del'>-	pte_t *pte;</div><div class='del'>-	pte_t entry;</div><div class='del'>-</div><div class='del'>-	dir = pgd_offset(mm, address);</div><div class='del'>-	if (pgd_none(*dir))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	pud = pud_offset(dir, address);</div><div class='del'>-	if (pud_none(*pud))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	pmd = pmd_offset(pud, address);</div><div class='del'>-	if (pmd_none(*pmd))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	pte = pte_offset_kernel(pmd, address);</div><div class='del'>-	entry = *pte;</div><div class='del'>-	if (pte_none(entry) || !pte_present(entry))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	return pte;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This routine handles page faults.  It determines the address,</div><div class='del'>- * and the problem, and then passes it off to one of the appropriate</div><div class='del'>- * routines.</div><div class='del'>- */</div><div class='del'>-asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long writeaccess,</div><div class='del'>-			      unsigned long textaccess, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	struct task_struct *tsk;</div><div class='del'>-	struct mm_struct *mm;</div><div class='del'>-	struct vm_area_struct * vma;</div><div class='del'>-	const struct exception_table_entry *fixup;</div><div class='del'>-	pte_t *pte;</div><div class='del'>-	int fault;</div><div class='del'>-</div><div class='del'>-	/* SIM</div><div class='del'>-	 * Note this is now called with interrupts still disabled</div><div class='del'>-	 * This is to cope with being called for a missing IO port</div><div class='del'>-	 * address with interrupts disabled. This should be fixed as</div><div class='del'>-	 * soon as we have a better 'fast path' miss handler.</div><div class='del'>-	 *</div><div class='del'>-	 * Plus take care how you try and debug this stuff.</div><div class='del'>-	 * For example, writing debug data to a port which you</div><div class='del'>-	 * have just faulted on is not going to work.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	tsk = current;</div><div class='del'>-	mm = tsk-&gt;mm;</div><div class='del'>-</div><div class='del'>-	/* Not an IO address, so reenable interrupts */</div><div class='del'>-	local_irq_enable();</div><div class='del'>-</div><div class='del'>-	perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If we're in an interrupt or have no user</div><div class='del'>-	 * context, we must not take the fault..</div><div class='del'>-	 */</div><div class='del'>-	if (in_atomic() || !mm)</div><div class='del'>-		goto no_context;</div><div class='del'>-</div><div class='del'>-	/* TLB misses upon some cache flushes get done under cli() */</div><div class='del'>-	down_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-</div><div class='del'>-	vma = find_vma(mm, address);</div><div class='del'>-</div><div class='del'>-	if (!vma) {</div><div class='del'>-#ifdef DEBUG_FAULT</div><div class='del'>-		print_task(tsk);</div><div class='del'>-		printk("%s:%d fault, address is 0x%08x PC %016Lx textaccess %d writeaccess %d\n",</div><div class='del'>-		       __func__, __LINE__,</div><div class='del'>-		       address,regs-&gt;pc,textaccess,writeaccess);</div><div class='del'>-		show_regs(regs);</div><div class='del'>-#endif</div><div class='del'>-		goto bad_area;</div><div class='del'>-	}</div><div class='del'>-	if (vma-&gt;vm_start &lt;= address) {</div><div class='del'>-		goto good_area;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!(vma-&gt;vm_flags &amp; VM_GROWSDOWN)) {</div><div class='del'>-#ifdef DEBUG_FAULT</div><div class='del'>-		print_task(tsk);</div><div class='del'>-		printk("%s:%d fault, address is 0x%08x PC %016Lx textaccess %d writeaccess %d\n",</div><div class='del'>-		       __func__, __LINE__,</div><div class='del'>-		       address,regs-&gt;pc,textaccess,writeaccess);</div><div class='del'>-		show_regs(regs);</div><div class='del'>-</div><div class='del'>-		print_vma(vma);</div><div class='del'>-#endif</div><div class='del'>-		goto bad_area;</div><div class='del'>-	}</div><div class='del'>-	if (expand_stack(vma, address)) {</div><div class='del'>-#ifdef DEBUG_FAULT</div><div class='del'>-		print_task(tsk);</div><div class='del'>-		printk("%s:%d fault, address is 0x%08x PC %016Lx textaccess %d writeaccess %d\n",</div><div class='del'>-		       __func__, __LINE__,</div><div class='del'>-		       address,regs-&gt;pc,textaccess,writeaccess);</div><div class='del'>-		show_regs(regs);</div><div class='del'>-#endif</div><div class='del'>-		goto bad_area;</div><div class='del'>-	}</div><div class='del'>-/*</div><div class='del'>- * Ok, we have a good vm_area for this memory access, so</div><div class='del'>- * we can handle it..</div><div class='del'>- */</div><div class='del'>-good_area:</div><div class='del'>-	if (textaccess) {</div><div class='del'>-		if (!(vma-&gt;vm_flags &amp; VM_EXEC))</div><div class='del'>-			goto bad_area;</div><div class='del'>-	} else {</div><div class='del'>-		if (writeaccess) {</div><div class='del'>-			if (!(vma-&gt;vm_flags &amp; VM_WRITE))</div><div class='del'>-				goto bad_area;</div><div class='del'>-		} else {</div><div class='del'>-			if (!(vma-&gt;vm_flags &amp; VM_READ))</div><div class='del'>-				goto bad_area;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If for any reason at all we couldn't handle the fault,</div><div class='del'>-	 * make sure we exit gracefully rather than endlessly redo</div><div class='del'>-	 * the fault.</div><div class='del'>-	 */</div><div class='del'>-	fault = handle_mm_fault(mm, vma, address, writeaccess ? FAULT_FLAG_WRITE : 0);</div><div class='del'>-	if (unlikely(fault &amp; VM_FAULT_ERROR)) {</div><div class='del'>-		if (fault &amp; VM_FAULT_OOM)</div><div class='del'>-			goto out_of_memory;</div><div class='del'>-		else if (fault &amp; VM_FAULT_SIGBUS)</div><div class='del'>-			goto do_sigbus;</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (fault &amp; VM_FAULT_MAJOR) {</div><div class='del'>-		tsk-&gt;maj_flt++;</div><div class='del'>-		perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,</div><div class='del'>-				     regs, address);</div><div class='del'>-	} else {</div><div class='del'>-		tsk-&gt;min_flt++;</div><div class='del'>-		perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,</div><div class='del'>-				     regs, address);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If we get here, the page fault has been handled.  Do the TLB refill</div><div class='del'>-	   now from the newly-setup PTE, to avoid having to fault again right</div><div class='del'>-	   away on the same instruction. */</div><div class='del'>-	pte = lookup_pte (mm, address);</div><div class='del'>-	if (!pte) {</div><div class='del'>-		/* From empirical evidence, we can get here, due to</div><div class='del'>-		   !pte_present(pte).  (e.g. if a swap-in occurs, and the page</div><div class='del'>-		   is swapped back out again before the process that wanted it</div><div class='del'>-		   gets rescheduled?) */</div><div class='del'>-		goto no_pte;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__do_tlb_refill(address, textaccess, pte);</div><div class='del'>-</div><div class='del'>-no_pte:</div><div class='del'>-</div><div class='del'>-	up_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-	return;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Something tried to access memory that isn't in our memory map..</div><div class='del'>- * Fix it, but check if it's kernel or user first..</div><div class='del'>- */</div><div class='del'>-bad_area:</div><div class='del'>-#ifdef DEBUG_FAULT</div><div class='del'>-	printk("fault:bad area\n");</div><div class='del'>-#endif</div><div class='del'>-	up_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-</div><div class='del'>-	if (user_mode(regs)) {</div><div class='del'>-		static int count=0;</div><div class='del'>-		siginfo_t info;</div><div class='del'>-		if (count &lt; 4) {</div><div class='del'>-			/* This is really to help debug faults when starting</div><div class='del'>-			 * usermode, so only need a few */</div><div class='del'>-			count++;</div><div class='del'>-			printk("user mode bad_area address=%08lx pid=%d (%s) pc=%08lx\n",</div><div class='del'>-				address, task_pid_nr(current), current-&gt;comm,</div><div class='del'>-				(unsigned long) regs-&gt;pc);</div><div class='del'>-#if 0</div><div class='del'>-			show_regs(regs);</div><div class='del'>-#endif</div><div class='del'>-		}</div><div class='del'>-		if (is_global_init(tsk)) {</div><div class='del'>-			panic("INIT had user mode bad_area\n");</div><div class='del'>-		}</div><div class='del'>-		tsk-&gt;thread.address = address;</div><div class='del'>-		tsk-&gt;thread.error_code = writeaccess;</div><div class='del'>-		info.si_signo = SIGSEGV;</div><div class='del'>-		info.si_errno = 0;</div><div class='del'>-		info.si_addr = (void *) address;</div><div class='del'>-		force_sig_info(SIGSEGV, &amp;info, tsk);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-no_context:</div><div class='del'>-#ifdef DEBUG_FAULT</div><div class='del'>-	printk("fault:No context\n");</div><div class='del'>-#endif</div><div class='del'>-	/* Are we prepared to handle this kernel fault?  */</div><div class='del'>-	fixup = search_exception_tables(regs-&gt;pc);</div><div class='del'>-	if (fixup) {</div><div class='del'>-		regs-&gt;pc = fixup-&gt;fixup;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Oops. The kernel tried to access some bad page. We'll have to</div><div class='del'>- * terminate things with extreme prejudice.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-	if (address &lt; PAGE_SIZE)</div><div class='del'>-		printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");</div><div class='del'>-	else</div><div class='del'>-		printk(KERN_ALERT "Unable to handle kernel paging request");</div><div class='del'>-	printk(" at virtual address %08lx\n", address);</div><div class='del'>-	printk(KERN_ALERT "pc = %08Lx%08Lx\n", regs-&gt;pc &gt;&gt; 32, regs-&gt;pc &amp; 0xffffffff);</div><div class='del'>-	die("Oops", regs, writeaccess);</div><div class='del'>-	do_exit(SIGKILL);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We ran out of memory, or some other thing happened to us that made</div><div class='del'>- * us unable to handle the page fault gracefully.</div><div class='del'>- */</div><div class='del'>-out_of_memory:</div><div class='del'>-	up_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-	if (!user_mode(regs))</div><div class='del'>-		goto no_context;</div><div class='del'>-	pagefault_out_of_memory();</div><div class='del'>-	return;</div><div class='del'>-</div><div class='del'>-do_sigbus:</div><div class='del'>-	printk("fault:Do sigbus\n");</div><div class='del'>-	up_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Send a sigbus, regardless of whether we were in kernel</div><div class='del'>-	 * or user mode.</div><div class='del'>-	 */</div><div class='del'>-	tsk-&gt;thread.address = address;</div><div class='del'>-	tsk-&gt;thread.error_code = writeaccess;</div><div class='del'>-	tsk-&gt;thread.trap_no = 14;</div><div class='del'>-	force_sig(SIGBUS, tsk);</div><div class='del'>-</div><div class='del'>-	/* Kernel mode? Handle exceptions or die */</div><div class='del'>-	if (!user_mode(regs))</div><div class='del'>-		goto no_context;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void local_flush_tlb_one(unsigned long asid, unsigned long page)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long match, pteh=0, lpage;</div><div class='hunk'>@@ -458,7 +170,3 @@ void __flush_tlb_global(void)</div><div class='ctx'> {</div><div class='ctx'> 	flush_tlb_all();</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)</div><div class='del'>-{</div><div class='del'>-}</div><div class='head'>diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types<br/>index 6dd56c4d0054..569977e52c91 100644<br/>--- a/<a href='/drm-misc/tree/arch/sh/tools/mach-types?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sh/tools/mach-types</a><br/>+++ b/<a href='/drm-misc/tree/arch/sh/tools/mach-types?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sh/tools/mach-types</a></div><div class='hunk'>@@ -51,6 +51,8 @@ SDK7780			SH_SDK7780</div><div class='ctx'> MIGOR			SH_MIGOR</div><div class='ctx'> RSK7201			SH_RSK7201</div><div class='ctx'> RSK7203			SH_RSK7203</div><div class='add'>+RSK7264			SH_RSK7264</div><div class='add'>+RSK7269			SH_RSK7269</div><div class='ctx'> AP325RXA		SH_AP325RXA</div><div class='ctx'> SH2007			SH_SH2007</div><div class='ctx'> SH7757LCR		SH_SH7757LCR</div><div class='head'>diff --git a/arch/sparc/Kbuild b/arch/sparc/Kbuild<br/>new file mode 100644<br/>index 000000000000..5cd01161fd00<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sparc/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/Kbuild</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+#</div><div class='add'>+# core part of the sparc kernel</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-y += kernel/</div><div class='add'>+obj-y += mm/</div><div class='add'>+obj-y += math-emu/</div><div class='add'>+obj-y += net/</div><div class='head'>diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig<br/>index 76c7ccfb1ebe..e74ff1377626 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/Kconfig</a></div><div class='hunk'>@@ -30,6 +30,12 @@ config SPARC</div><div class='ctx'> 	select USE_GENERIC_SMP_HELPERS if SMP</div><div class='ctx'> 	select GENERIC_PCI_IOMAP</div><div class='ctx'> 	select HAVE_NMI_WATCHDOG if SPARC64</div><div class='add'>+	select HAVE_BPF_JIT</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='add'>+	select GENERIC_CMOS_UPDATE</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select GENERIC_STRNCPY_FROM_USER</div><div class='add'>+	select GENERIC_STRNLEN_USER</div><div class='ctx'> </div><div class='ctx'> config SPARC32</div><div class='ctx'> 	def_bool !64BIT</div><div class='hunk'>@@ -61,6 +67,7 @@ config SPARC64</div><div class='ctx'> 	select IRQ_PREFLOW_FASTEOI</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='ctx'> 	select HAVE_C_RECORDMCOUNT</div><div class='add'>+	select NO_BOOTMEM</div><div class='ctx'> </div><div class='ctx'> config ARCH_DEFCONFIG</div><div class='ctx'> 	string</div><div class='hunk'>@@ -73,18 +80,6 @@ config BITS</div><div class='ctx'> 	default 32 if SPARC32</div><div class='ctx'> 	default 64 if SPARC64</div><div class='ctx'> </div><div class='del'>-config ARCH_USES_GETTIMEOFFSET</div><div class='del'>-	bool</div><div class='del'>-	default y if SPARC32</div><div class='del'>-</div><div class='del'>-config GENERIC_CMOS_UPDATE</div><div class='del'>-	bool</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	bool</div><div class='del'>-	default y if SPARC64</div><div class='del'>-</div><div class='ctx'> config IOMMU_HELPER</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y if SPARC64</div><div class='hunk'>@@ -154,7 +149,7 @@ source "kernel/Kconfig.freezer"</div><div class='ctx'> menu "Processor type and features"</div><div class='ctx'> </div><div class='ctx'> config SMP</div><div class='del'>-	bool "Symmetric multi-processing support (does not work on sun4/sun4c)"</div><div class='add'>+	bool "Symmetric multi-processing support"</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  This enables support for systems with more than one CPU. If you have</div><div class='ctx'> 	  a system with only one CPU, say N. If you have a system with more</div><div class='hunk'>@@ -275,8 +270,6 @@ config HOTPLUG_CPU</div><div class='ctx'> 	  can be controlled through /sys/devices/system/cpu/cpu#.</div><div class='ctx'> 	  Say N if you want to disable CPU hotplug.</div><div class='ctx'> </div><div class='del'>-source "kernel/time/Kconfig"</div><div class='del'>-</div><div class='ctx'> if SPARC64</div><div class='ctx'> source "drivers/cpufreq/Kconfig"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/Makefile b/arch/sparc/Makefile<br/>index eddcfb36aafb..541b8b075c7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/Makefile</a></div><div class='hunk'>@@ -19,39 +19,27 @@ ifeq ($(CONFIG_SPARC32),y)</div><div class='ctx'> # sparc32</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-#</div><div class='del'>-# Uncomment the first KBUILD_CFLAGS if you are doing kgdb source level</div><div class='del'>-# debugging of the kernel to get the proper debugging information.</div><div class='del'>-</div><div class='del'>-AS             := $(AS) -32</div><div class='del'>-LDFLAGS        := -m elf32_sparc</div><div class='ctx'> CHECKFLAGS     += -D__sparc__</div><div class='add'>+LDFLAGS        := -m elf32_sparc</div><div class='ctx'> export BITS    := 32</div><div class='ctx'> UTS_MACHINE    := sparc</div><div class='ctx'> </div><div class='del'>-#KBUILD_CFLAGS += -g -pipe -fcall-used-g5 -fcall-used-g7</div><div class='del'>-KBUILD_CFLAGS += -m32 -pipe -mno-fpu -fcall-used-g5 -fcall-used-g7</div><div class='del'>-KBUILD_AFLAGS += -m32 -Wa,-Av8</div><div class='del'>-</div><div class='del'>-#LDFLAGS_vmlinux = -N -Ttext 0xf0004000</div><div class='del'>-#  Since 2.5.40, the first stage is left not btfix-ed.</div><div class='del'>-#  Actual linking is done with "make image".</div><div class='del'>-LDFLAGS_vmlinux = -r</div><div class='add'>+KBUILD_CFLAGS  += -m32 -mcpu=v8 -pipe -mno-fpu -fcall-used-g5 -fcall-used-g7</div><div class='add'>+KBUILD_AFLAGS  += -m32 -Wa,-Av8</div><div class='ctx'> </div><div class='ctx'> else</div><div class='ctx'> #####</div><div class='ctx'> # sparc64</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-CHECKFLAGS      += -D__sparc__ -D__sparc_v9__ -D__arch64__ -m64</div><div class='add'>+CHECKFLAGS    += -D__sparc__ -D__sparc_v9__ -D__arch64__ -m64</div><div class='add'>+LDFLAGS       := -m elf64_sparc</div><div class='add'>+export BITS   := 64</div><div class='add'>+UTS_MACHINE   := sparc64</div><div class='ctx'> </div><div class='del'>-LDFLAGS              := -m elf64_sparc</div><div class='del'>-export BITS          := 64</div><div class='del'>-UTS_MACHINE          := sparc64</div><div class='del'>-</div><div class='del'>-KBUILD_CFLAGS += -m64 -pipe -mno-fpu -mcpu=ultrasparc -mcmodel=medlow   \</div><div class='del'>-                 -ffixed-g4 -ffixed-g5 -fcall-used-g7 -Wno-sign-compare \</div><div class='del'>-                 -Wa,--undeclared-regs</div><div class='add'>+KBUILD_CFLAGS += -m64 -pipe -mno-fpu -mcpu=ultrasparc -mcmodel=medlow</div><div class='add'>+KBUILD_CFLAGS += -ffixed-g4 -ffixed-g5 -fcall-used-g7 -Wno-sign-compare</div><div class='add'>+KBUILD_CFLAGS += -Wa,--undeclared-regs</div><div class='ctx'> KBUILD_CFLAGS += $(call cc-option,-mtune=ultrasparc3)</div><div class='ctx'> KBUILD_AFLAGS += -m64 -mcpu=ultrasparc -Wa,--undeclared-regs</div><div class='ctx'> </div><div class='hunk'>@@ -62,27 +50,15 @@ endif</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> head-y                 := arch/sparc/kernel/head_$(BITS).o</div><div class='del'>-head-y                 += arch/sparc/kernel/init_task.o</div><div class='ctx'> </div><div class='del'>-core-y                 += arch/sparc/kernel/</div><div class='del'>-core-y                 += arch/sparc/mm/ arch/sparc/math-emu/</div><div class='add'>+# See arch/sparc/Kbuild for the core part of the kernel</div><div class='add'>+core-y                 += arch/sparc/</div><div class='ctx'> </div><div class='ctx'> libs-y                 += arch/sparc/prom/</div><div class='ctx'> libs-y                 += arch/sparc/lib/</div><div class='ctx'> </div><div class='ctx'> drivers-$(CONFIG_OPROFILE)	+= arch/sparc/oprofile/</div><div class='ctx'> </div><div class='del'>-# Export what is needed by arch/sparc/boot/Makefile</div><div class='del'>-export VMLINUX_INIT VMLINUX_MAIN</div><div class='del'>-VMLINUX_INIT := $(head-y) $(init-y)</div><div class='del'>-VMLINUX_MAIN := $(core-y) kernel/ mm/ fs/ ipc/ security/ crypto/ block/</div><div class='del'>-VMLINUX_MAIN += $(patsubst %/, %/lib.a, $(libs-y)) $(libs-y)</div><div class='del'>-VMLINUX_MAIN += $(drivers-y) $(net-y)</div><div class='del'>-</div><div class='del'>-ifdef CONFIG_KALLSYMS</div><div class='del'>-export kallsyms.o := .tmp_kallsyms2.o</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> boot := arch/sparc/boot</div><div class='ctx'> </div><div class='ctx'> # Default target</div><div class='head'>diff --git a/arch/sparc/boot/Makefile b/arch/sparc/boot/Makefile<br/>index d56d199c1aa8..6e63afb128d9 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/boot/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/boot/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/boot/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/boot/Makefile</a></div><div class='hunk'>@@ -6,8 +6,8 @@</div><div class='ctx'> ROOT_IMG	:= /usr/src/root.img</div><div class='ctx'> ELFTOAOUT	:= elftoaout</div><div class='ctx'> </div><div class='del'>-hostprogs-y	:= piggyback btfixupprep</div><div class='del'>-targets		:= tftpboot.img btfix.o btfix.S image zImage vmlinux.aout</div><div class='add'>+hostprogs-y	:= piggyback</div><div class='add'>+targets		:= tftpboot.img image zImage vmlinux.aout</div><div class='ctx'> clean-files	:= System.map</div><div class='ctx'> </div><div class='ctx'> quiet_cmd_elftoaout	= ELFTOAOUT $@</div><div class='hunk'>@@ -17,58 +17,9 @@ quiet_cmd_piggy		= PIGGY   $@</div><div class='ctx'> quiet_cmd_strip		= STRIP   $@</div><div class='ctx'>       cmd_strip		= $(STRIP) -R .comment -R .note -K sun4u_init -K _end -K _start $&lt; -o $@</div><div class='ctx'> </div><div class='del'>-ifeq ($(CONFIG_SPARC32),y)</div><div class='del'>-quiet_cmd_btfix		= BTFIX   $@</div><div class='del'>-      cmd_btfix		= $(OBJDUMP) -x vmlinux | $(obj)/btfixupprep &gt; $@</div><div class='del'>-quiet_cmd_sysmap        = SYSMAP  $(obj)/System.map</div><div class='del'>-      cmd_sysmap        = $(CONFIG_SHELL) $(srctree)/scripts/mksysmap</div><div class='del'>-quiet_cmd_image = LD      $@</div><div class='del'>-      cmd_image = $(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) $(LDFLAGS_$(@F)) -o $@</div><div class='del'>-</div><div class='del'>-define rule_image</div><div class='del'>-	$(if $($(quiet)cmd_image),               \</div><div class='del'>-	  echo '  $($(quiet)cmd_image)' &amp;&amp;)      \</div><div class='del'>-	  $(cmd_image);                          \</div><div class='del'>-	$(if $($(quiet)cmd_sysmap),              \</div><div class='del'>-	  echo '  $($(quiet)cmd_sysmap)' &amp;&amp;)  \</div><div class='del'>-	$(cmd_sysmap) $@ $(obj)/System.map;      \</div><div class='del'>-	if [ $$? -ne 0 ]; then                   \</div><div class='del'>-		rm -f $@;                        \</div><div class='del'>-		/bin/false;                      \</div><div class='del'>-	fi;                                      \</div><div class='del'>-	echo 'cmd_$@ := $(cmd_image)' &gt; $(@D)/.$(@F).cmd</div><div class='del'>-endef</div><div class='del'>-</div><div class='del'>-BTOBJS := $(patsubst %/, %/built-in.o, $(VMLINUX_INIT))</div><div class='del'>-BTLIBS := $(patsubst %/, %/built-in.o, $(VMLINUX_MAIN))</div><div class='del'>-LDFLAGS_image := -T arch/sparc/kernel/vmlinux.lds $(BTOBJS) \</div><div class='del'>-                  --start-group $(BTLIBS) --end-group \</div><div class='del'>-                  $(kallsyms.o) $(obj)/btfix.o</div><div class='del'>-</div><div class='del'>-# Link the final image including btfixup'ed symbols.</div><div class='del'>-# This is a replacement for the link done in the top-level Makefile.</div><div class='del'>-# Note: No dependency on the prerequisite files since that would require</div><div class='del'>-# make to try check if they are updated - and due to changes</div><div class='del'>-# in gcc options (path for example) this would result in</div><div class='del'>-# these files being recompiled for each build.</div><div class='del'>-$(obj)/image: $(obj)/btfix.o FORCE</div><div class='del'>-	$(call if_changed_rule,image)</div><div class='del'>-</div><div class='del'>-$(obj)/zImage: $(obj)/image</div><div class='del'>-	$(call if_changed,strip)</div><div class='del'>-	@echo '  kernel: $@ is ready'</div><div class='del'>-</div><div class='del'>-$(obj)/btfix.S: $(obj)/btfixupprep vmlinux FORCE</div><div class='del'>-	$(call if_changed,btfix)</div><div class='del'>-</div><div class='del'>-endif</div><div class='del'>-</div><div class='ctx'> ifeq ($(CONFIG_SPARC64),y)</div><div class='ctx'> </div><div class='ctx'> # Actual linking</div><div class='del'>-$(obj)/image: vmlinux FORCE</div><div class='del'>-	$(call if_changed,strip)</div><div class='del'>-	@echo '  kernel: $@ is ready'</div><div class='ctx'> </div><div class='ctx'> $(obj)/zImage: $(obj)/image</div><div class='ctx'> 	$(call if_changed,gzip)</div><div class='hunk'>@@ -79,6 +30,10 @@ $(obj)/vmlinux.aout: vmlinux FORCE</div><div class='ctx'> 	@echo '  kernel: $@ is ready'</div><div class='ctx'> else</div><div class='ctx'> </div><div class='add'>+$(obj)/zImage: $(obj)/image</div><div class='add'>+	$(call if_changed,strip)</div><div class='add'>+	@echo '  kernel: $@ is ready'</div><div class='add'>+</div><div class='ctx'> # The following lines make a readable image for U-Boot.</div><div class='ctx'> #  uImage   - Binary file read by U-boot</div><div class='ctx'> #  uImage.o - object file of uImage for loading with a</div><div class='hunk'>@@ -107,6 +62,10 @@ $(obj)/uImage: $(obj)/image.gz</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+$(obj)/image: vmlinux FORCE</div><div class='add'>+	$(call if_changed,strip)</div><div class='add'>+	@echo '  kernel: $@ is ready'</div><div class='add'>+</div><div class='ctx'> $(obj)/tftpboot.img: $(obj)/image $(obj)/piggyback System.map $(ROOT_IMG) FORCE</div><div class='ctx'> 	$(call if_changed,elftoaout)</div><div class='ctx'> 	$(call if_changed,piggy)</div><div class='head'>diff --git a/arch/sparc/boot/btfixupprep.c b/arch/sparc/boot/btfixupprep.c<br/>deleted file mode 100644<br/>index da031159e2b7..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/boot/btfixupprep.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/boot/btfixupprep.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,386 +0,0 @@</div><div class='del'>-/*</div><div class='del'>-   Simple utility to prepare vmlinux image for sparc.</div><div class='del'>-   Resolves all BTFIXUP uses and settings and creates</div><div class='del'>-   a special .s object to link to the image.</div><div class='del'>-   </div><div class='del'>-   Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)</div><div class='del'>-   </div><div class='del'>-   This program is free software; you can redistribute it and/or modify</div><div class='del'>-   it under the terms of the GNU General Public License as published by</div><div class='del'>-   the Free Software Foundation; either version 2 of the License, or</div><div class='del'>-   (at your option) any later version.</div><div class='del'>-   </div><div class='del'>-   This program is distributed in the hope that it will be useful,</div><div class='del'>-   but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>-   GNU General Public License for more details.</div><div class='del'>-</div><div class='del'>-   You should have received a copy of the GNU General Public License</div><div class='del'>-   along with this program; if not, write to the Free Software</div><div class='del'>-   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */</div><div class='del'>-   </div><div class='del'>-#include &lt;stdio.h&gt;</div><div class='del'>-#include &lt;string.h&gt;</div><div class='del'>-#include &lt;ctype.h&gt;</div><div class='del'>-#include &lt;errno.h&gt;</div><div class='del'>-#include &lt;unistd.h&gt;</div><div class='del'>-#include &lt;stdlib.h&gt;</div><div class='del'>-#include &lt;malloc.h&gt;</div><div class='del'>-</div><div class='del'>-#define MAXSYMS 1024</div><div class='del'>-</div><div class='del'>-static char *symtab = "SYMBOL TABLE:";</div><div class='del'>-static char *relrec = "RELOCATION RECORDS FOR [";</div><div class='del'>-static int rellen;</div><div class='del'>-static int symlen;</div><div class='del'>-int mode;</div><div class='del'>-</div><div class='del'>-struct _btfixup;</div><div class='del'>-</div><div class='del'>-typedef struct _btfixuprel {</div><div class='del'>-	char *sect;</div><div class='del'>-	unsigned long offset;</div><div class='del'>-	struct _btfixup *f;</div><div class='del'>-	int frel;</div><div class='del'>-	struct _btfixuprel *next;</div><div class='del'>-} btfixuprel;</div><div class='del'>-</div><div class='del'>-typedef struct _btfixup {</div><div class='del'>-	int type;</div><div class='del'>-	int setinitval;</div><div class='del'>-	unsigned int initval;</div><div class='del'>-	char *initvalstr;</div><div class='del'>-	char *name;</div><div class='del'>-	btfixuprel *rel;</div><div class='del'>-} btfixup;</div><div class='del'>-</div><div class='del'>-btfixup array[MAXSYMS];</div><div class='del'>-int last = 0;</div><div class='del'>-char buffer[1024];</div><div class='del'>-unsigned long lastfoffset = -1;</div><div class='del'>-unsigned long lastfrelno;</div><div class='del'>-btfixup *lastf;</div><div class='del'>-</div><div class='del'>-static void fatal(void) __attribute__((noreturn));</div><div class='del'>-static void fatal(void)</div><div class='del'>-{</div><div class='del'>-	fprintf(stderr, "Malformed output from objdump\n%s\n", buffer);</div><div class='del'>-	exit(1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static btfixup *find(int type, char *name)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	for (i = 0; i &lt; last; i++) {</div><div class='del'>-		if (array[i].type == type &amp;&amp; !strcmp(array[i].name, name))</div><div class='del'>-			return array + i;</div><div class='del'>-	}</div><div class='del'>-	array[last].type = type;</div><div class='del'>-	array[last].name = strdup(name);</div><div class='del'>-	array[last].setinitval = 0;</div><div class='del'>-	if (!array[last].name) fatal();</div><div class='del'>-	array[last].rel = NULL;</div><div class='del'>-	last++;</div><div class='del'>-	if (last &gt;= MAXSYMS) {</div><div class='del'>-		fprintf(stderr, "Ugh. Something strange. More than %d different BTFIXUP symbols\n", MAXSYMS);</div><div class='del'>-		exit(1);</div><div class='del'>-	}</div><div class='del'>-	return array + last - 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void set_mode (char *buffer)</div><div class='del'>-{</div><div class='del'>-  	for (mode = 0;; mode++)</div><div class='del'>-		if (buffer[mode] &lt; '0' || buffer[mode] &gt; '9')</div><div class='del'>-			break;</div><div class='del'>-	if (mode != 8 &amp;&amp; mode != 16)</div><div class='del'>-		fatal();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-int main(int argc,char **argv)</div><div class='del'>-{</div><div class='del'>-	char *p, *q;</div><div class='del'>-	char *sect;</div><div class='del'>-	int i, j, k;</div><div class='del'>-	unsigned int initval;</div><div class='del'>-	int shift;</div><div class='del'>-	btfixup *f;</div><div class='del'>-	btfixuprel *r, **rr;</div><div class='del'>-	unsigned long offset;</div><div class='del'>-	char *initvalstr;</div><div class='del'>-</div><div class='del'>-	symlen = strlen(symtab);</div><div class='del'>-	while (fgets (buffer, 1024, stdin) != NULL)</div><div class='del'>-		if (!strncmp (buffer, symtab, symlen))</div><div class='del'>-			goto main0;</div><div class='del'>-	fatal();</div><div class='del'>-main0:</div><div class='del'>-	rellen = strlen(relrec);</div><div class='del'>-	while (fgets (buffer, 1024, stdin) != NULL)</div><div class='del'>-		if (!strncmp (buffer, relrec, rellen))</div><div class='del'>-			goto main1;</div><div class='del'>-	fatal();</div><div class='del'>-main1:</div><div class='del'>-	sect = malloc(strlen (buffer + rellen) + 1);</div><div class='del'>-	if (!sect) fatal();</div><div class='del'>-	strcpy (sect, buffer + rellen);</div><div class='del'>-	p = strchr (sect, ']');</div><div class='del'>-	if (!p) fatal();</div><div class='del'>-	*p = 0;</div><div class='del'>-	if (fgets (buffer, 1024, stdin) == NULL)</div><div class='del'>-		fatal();</div><div class='del'>-	while (fgets (buffer, 1024, stdin) != NULL) {</div><div class='del'>-		int nbase;</div><div class='del'>-		if (!strncmp (buffer, relrec, rellen))</div><div class='del'>-			goto main1;</div><div class='del'>-		if (mode == 0)</div><div class='del'>-			set_mode (buffer);</div><div class='del'>-		p = strchr (buffer, '\n');</div><div class='del'>-		if (p) *p = 0;</div><div class='del'>-		if (strlen (buffer) &lt; 22+mode)</div><div class='del'>-			continue;</div><div class='del'>-		if (strncmp (buffer + mode, " R_SPARC_", 9))</div><div class='del'>-			continue;</div><div class='del'>-		nbase = 27 - 8 + mode;</div><div class='del'>-		if (buffer[nbase] != '_' || buffer[nbase+1] != '_' || buffer[nbase+2] != '_')</div><div class='del'>-			continue;</div><div class='del'>-		switch (buffer[nbase+3]) {</div><div class='del'>-			case 'f':	/* CALL */</div><div class='del'>-			case 'b':	/* BLACKBOX */</div><div class='del'>-			case 's':	/* SIMM13 */</div><div class='del'>-			case 'a':	/* HALF */</div><div class='del'>-			case 'h':	/* SETHI */</div><div class='del'>-			case 'i':	/* INT */</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				continue;</div><div class='del'>-		}</div><div class='del'>-		p = strchr (buffer + nbase+5, '+');</div><div class='del'>-		if (p) *p = 0;</div><div class='del'>-		shift = nbase + 5;</div><div class='del'>-		if (buffer[nbase+4] == 's' &amp;&amp; buffer[nbase+5] == '_') {</div><div class='del'>-			shift = nbase + 6;</div><div class='del'>-			if (strcmp (sect, ".init.text")) {</div><div class='del'>-				fprintf(stderr,</div><div class='del'>-				    "Wrong use of '%s' BTFIXUPSET in '%s' section.\n"</div><div class='del'>-				    "BTFIXUPSET_CALL can be used only in"</div><div class='del'>-				    " __init sections\n",</div><div class='del'>-				    buffer + shift, sect);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-		} else if (buffer[nbase+4] != '_')</div><div class='del'>-			continue;</div><div class='del'>-		if (!strcmp (sect, ".text.exit"))</div><div class='del'>-			continue;</div><div class='del'>-		if (strcmp (sect, ".text") &amp;&amp;</div><div class='del'>-		    strcmp (sect, ".init.text") &amp;&amp;</div><div class='del'>-		    strcmp (sect, ".fixup") &amp;&amp;</div><div class='del'>-		    (strcmp (sect, "__ksymtab") || buffer[nbase+3] != 'f')) {</div><div class='del'>-			if (buffer[nbase+3] == 'f')</div><div class='del'>-				fprintf(stderr,</div><div class='del'>-				    "Wrong use of '%s' in '%s' section.\n"</div><div class='del'>-				    " It can be used only in .text, .init.text,"</div><div class='del'>-				    " .fixup and __ksymtab\n",</div><div class='del'>-				    buffer + shift, sect);</div><div class='del'>-			else</div><div class='del'>-				fprintf(stderr,</div><div class='del'>-				    "Wrong use of '%s' in '%s' section.\n"</div><div class='del'>-				    " It can be only used in .text, .init.text,"</div><div class='del'>-				    " and .fixup\n", buffer + shift, sect);</div><div class='del'>-			exit(1);</div><div class='del'>-		}</div><div class='del'>-		p = strstr (buffer + shift, "__btset_");</div><div class='del'>-		if (p &amp;&amp; buffer[nbase+4] == 's') {</div><div class='del'>-			fprintf(stderr, "__btset_ in BTFIXUP name can only be used when defining the variable, not for setting\n%s\n", buffer);</div><div class='del'>-			exit(1);</div><div class='del'>-		}</div><div class='del'>-		initval = 0;</div><div class='del'>-		initvalstr = NULL;</div><div class='del'>-		if (p) {</div><div class='del'>-			if (p[8] != '0' || p[9] != 'x') {</div><div class='del'>-				fprintf(stderr, "Pre-initialized values can be only initialized with hexadecimal constants starting 0x\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			initval = strtoul(p + 10, &amp;q, 16);</div><div class='del'>-			if (*q || !initval) {</div><div class='del'>-				fprintf(stderr, "Pre-initialized values can be only in the form name__btset_0xXXXXXXXX where X are hex digits.\nThey cannot be name__btset_0x00000000 though. Use BTFIXUPDEF_XX instead of BTFIXUPDEF_XX_INIT then.\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			initvalstr = p + 10;</div><div class='del'>-			*p = 0;</div><div class='del'>-		}</div><div class='del'>-		f = find(buffer[nbase+3], buffer + shift);</div><div class='del'>-		if (buffer[nbase+4] == 's')</div><div class='del'>-			continue;</div><div class='del'>-		switch (buffer[nbase+3]) {</div><div class='del'>-		case 'f':</div><div class='del'>-			if (initval) {</div><div class='del'>-				fprintf(stderr, "Cannot use pre-initialized fixups for calls\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			if (!strcmp (sect, "__ksymtab")) {</div><div class='del'>-				if (strncmp (buffer + mode+9, "32        ", 10)) {</div><div class='del'>-					fprintf(stderr, "BTFIXUP_CALL in EXPORT_SYMBOL results in relocation other than R_SPARC_32\n\%s\n", buffer);</div><div class='del'>-					exit(1);</div><div class='del'>-				}</div><div class='del'>-			} else if (strncmp (buffer + mode+9, "WDISP30   ", 10) &amp;&amp;</div><div class='del'>-				   strncmp (buffer + mode+9, "HI22      ", 10) &amp;&amp;</div><div class='del'>-				   strncmp (buffer + mode+9, "LO10      ", 10)) {</div><div class='del'>-				fprintf(stderr, "BTFIXUP_CALL results in relocation other than R_SPARC_WDISP30, R_SPARC_HI22 or R_SPARC_LO10\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 'b':</div><div class='del'>-			if (initval) {</div><div class='del'>-				fprintf(stderr, "Cannot use pre-initialized fixups for blackboxes\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			if (strncmp (buffer + mode+9, "HI22      ", 10)) {</div><div class='del'>-				fprintf(stderr, "BTFIXUP_BLACKBOX results in relocation other than R_SPARC_HI22\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 's':</div><div class='del'>-			if (initval + 0x1000 &gt;= 0x2000) {</div><div class='del'>-				fprintf(stderr, "Wrong initializer for SIMM13. Has to be from $fffff000 to $00000fff\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			if (strncmp (buffer + mode+9, "13        ", 10)) {</div><div class='del'>-				fprintf(stderr, "BTFIXUP_SIMM13 results in relocation other than R_SPARC_13\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 'a':</div><div class='del'>-			if (initval + 0x1000 &gt;= 0x2000 &amp;&amp; (initval &amp; 0x3ff)) {</div><div class='del'>-				fprintf(stderr, "Wrong initializer for HALF.\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			if (strncmp (buffer + mode+9, "13        ", 10)) {</div><div class='del'>-				fprintf(stderr, "BTFIXUP_HALF results in relocation other than R_SPARC_13\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 'h':</div><div class='del'>-			if (initval &amp; 0x3ff) {</div><div class='del'>-				fprintf(stderr, "Wrong initializer for SETHI. Cannot have set low 10 bits\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			if (strncmp (buffer + mode+9, "HI22      ", 10)) {</div><div class='del'>-				fprintf(stderr, "BTFIXUP_SETHI results in relocation other than R_SPARC_HI22\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 'i':</div><div class='del'>-			if (initval) {</div><div class='del'>-				fprintf(stderr, "Cannot use pre-initialized fixups for INT\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			if (strncmp (buffer + mode+9, "HI22      ", 10) &amp;&amp; strncmp (buffer + mode+9, "LO10      ", 10)) {</div><div class='del'>-				fprintf(stderr, "BTFIXUP_INT results in relocation other than R_SPARC_HI22 and R_SPARC_LO10\n%s\n", buffer);</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (!f-&gt;setinitval) {</div><div class='del'>-			f-&gt;initval = initval;</div><div class='del'>-			if (initvalstr) {</div><div class='del'>-				f-&gt;initvalstr = strdup(initvalstr);</div><div class='del'>-				if (!f-&gt;initvalstr) fatal();</div><div class='del'>-			}</div><div class='del'>-			f-&gt;setinitval = 1;</div><div class='del'>-		} else if (f-&gt;initval != initval) {</div><div class='del'>-			fprintf(stderr, "Btfixup %s previously used with initializer %s which doesn't match with current initializer\n%s\n",</div><div class='del'>-					f-&gt;name, f-&gt;initvalstr ? : "0x00000000", buffer);</div><div class='del'>-			exit(1);</div><div class='del'>-		} else if (initval &amp;&amp; strcmp(f-&gt;initvalstr, initvalstr)) {</div><div class='del'>-			fprintf(stderr, "Btfixup %s previously used with initializer %s which doesn't match with current initializer.\n"</div><div class='del'>-					"Initializers have to match literally as well.\n%s\n",</div><div class='del'>-					f-&gt;name, f-&gt;initvalstr, buffer);</div><div class='del'>-			exit(1);</div><div class='del'>-		}</div><div class='del'>-		offset = strtoul(buffer, &amp;q, 16);</div><div class='del'>-		if (q != buffer + mode || (!offset &amp;&amp; (mode == 8 ? strncmp (buffer, "00000000 ", 9) : strncmp (buffer, "0000000000000000 ", 17)))) {</div><div class='del'>-			fprintf(stderr, "Malformed relocation address in\n%s\n", buffer);</div><div class='del'>-			exit(1);</div><div class='del'>-		}</div><div class='del'>-		for (k = 0, r = f-&gt;rel, rr = &amp;f-&gt;rel; r; rr = &amp;r-&gt;next, r = r-&gt;next, k++)</div><div class='del'>-			if (r-&gt;offset == offset &amp;&amp; !strcmp(r-&gt;sect, sect)) {</div><div class='del'>-				fprintf(stderr, "Ugh. One address has two relocation records\n");</div><div class='del'>-				exit(1);</div><div class='del'>-			}</div><div class='del'>-		*rr = malloc(sizeof(btfixuprel));</div><div class='del'>-		if (!*rr) fatal();</div><div class='del'>-		(*rr)-&gt;offset = offset;</div><div class='del'>-		(*rr)-&gt;f = NULL;</div><div class='del'>-		if (buffer[nbase+3] == 'f') {</div><div class='del'>-			lastf = f;</div><div class='del'>-			lastfoffset = offset;</div><div class='del'>-			lastfrelno = k;</div><div class='del'>-		} else if (lastfoffset + 4 == offset) {</div><div class='del'>-			(*rr)-&gt;f = lastf;</div><div class='del'>-			(*rr)-&gt;frel = lastfrelno;</div><div class='del'>-		}</div><div class='del'>-		(*rr)-&gt;sect = sect;</div><div class='del'>-		(*rr)-&gt;next = NULL;</div><div class='del'>-	}</div><div class='del'>-	printf("! Generated by btfixupprep. Do not edit.\n\n");</div><div class='del'>-	printf("\t.section\t\".data..init\",#alloc,#write\n\t.align\t4\n\n");</div><div class='del'>-	printf("\t.global\t___btfixup_start\n___btfixup_start:\n\n");</div><div class='del'>-	for (i = 0; i &lt; last; i++) {</div><div class='del'>-		f = array + i;</div><div class='del'>-		printf("\t.global\t___%cs_%s\n", f-&gt;type, f-&gt;name);</div><div class='del'>-		if (f-&gt;type == 'f')</div><div class='del'>-			printf("___%cs_%s:\n\t.word 0x%08x,0,0,", f-&gt;type, f-&gt;name, f-&gt;type &lt;&lt; 24);</div><div class='del'>-		else</div><div class='del'>-			printf("___%cs_%s:\n\t.word 0x%08x,0,", f-&gt;type, f-&gt;name, f-&gt;type &lt;&lt; 24);</div><div class='del'>-		for (j = 0, r = f-&gt;rel; r != NULL; j++, r = r-&gt;next);</div><div class='del'>-		if (j)</div><div class='del'>-			printf("%d\n\t.word\t", j * 2);</div><div class='del'>-		else</div><div class='del'>-			printf("0\n");</div><div class='del'>-		for (r = f-&gt;rel, j--; r != NULL; j--, r = r-&gt;next) {</div><div class='del'>-			if (!strcmp (r-&gt;sect, ".text"))</div><div class='del'>-				printf ("_stext+0x%08lx", r-&gt;offset);</div><div class='del'>-			else if (!strcmp (r-&gt;sect, ".init.text"))</div><div class='del'>-				printf ("__init_begin+0x%08lx", r-&gt;offset);</div><div class='del'>-			else if (!strcmp (r-&gt;sect, "__ksymtab"))</div><div class='del'>-				printf ("__start___ksymtab+0x%08lx", r-&gt;offset);</div><div class='del'>-			else if (!strcmp (r-&gt;sect, ".fixup"))</div><div class='del'>-				printf ("__start___fixup+0x%08lx", r-&gt;offset);</div><div class='del'>-			else</div><div class='del'>-				fatal();</div><div class='del'>-			if (f-&gt;type == 'f' || !r-&gt;f)</div><div class='del'>-				printf (",0");</div><div class='del'>-			else</div><div class='del'>-				printf (",___fs_%s+0x%08x", r-&gt;f-&gt;name, (4 + r-&gt;frel*2)*4 + 4);</div><div class='del'>-			if (j) printf (",");</div><div class='del'>-			else printf ("\n");</div><div class='del'>-		}</div><div class='del'>-		printf("\n");</div><div class='del'>-	}</div><div class='del'>-	printf("\n\t.global\t___btfixup_end\n___btfixup_end:\n");</div><div class='del'>-	printf("\n\n! Define undefined references\n\n");</div><div class='del'>-	for (i = 0; i &lt; last; i++) {</div><div class='del'>-		f = array + i;</div><div class='del'>-		if (f-&gt;type == 'f') {</div><div class='del'>-			printf("\t.global\t___f_%s\n", f-&gt;name);</div><div class='del'>-			printf("___f_%s:\n", f-&gt;name);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	printf("\tretl\n\t nop\n\n");</div><div class='del'>-	for (i = 0; i &lt; last; i++) {</div><div class='del'>-		f = array + i;</div><div class='del'>-		if (f-&gt;type != 'f') {</div><div class='del'>-			if (!f-&gt;initval) {</div><div class='del'>-				printf("\t.global\t___%c_%s\n", f-&gt;type, f-&gt;name);</div><div class='del'>-				printf("___%c_%s = 0\n", f-&gt;type, f-&gt;name);</div><div class='del'>-			} else {</div><div class='del'>-				printf("\t.global\t___%c_%s__btset_0x%s\n", f-&gt;type, f-&gt;name, f-&gt;initvalstr);</div><div class='del'>-				printf("___%c_%s__btset_0x%s = 0x%08x\n", f-&gt;type, f-&gt;name, f-&gt;initvalstr, f-&gt;initval);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	printf("\n\n");</div><div class='del'>-    	exit(0);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/sparc/configs/sparc64_defconfig b/arch/sparc/configs/sparc64_defconfig<br/>index 3c1e85807403..9d8521b8c854 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/configs/sparc64_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/configs/sparc64_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/configs/sparc64_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/configs/sparc64_defconfig</a></div><div class='hunk'>@@ -5,7 +5,7 @@ CONFIG_SYSVIPC=y</div><div class='ctx'> CONFIG_POSIX_MQUEUE=y</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=18</div><div class='ctx'> CONFIG_BLK_DEV_INITRD=y</div><div class='del'>-CONFIG_PERF_COUNTERS=y</div><div class='add'>+CONFIG_PERF_EVENTS=y</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='ctx'> CONFIG_SLAB=y</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='head'>diff --git a/arch/sparc/include/asm/Kbuild b/arch/sparc/include/asm/Kbuild<br/>index 2c2e38821f60..67f83e0a0d68 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/Kbuild?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/Kbuild</a></div><div class='hunk'>@@ -21,3 +21,4 @@ generic-y += div64.h</div><div class='ctx'> generic-y += local64.h</div><div class='ctx'> generic-y += irq_regs.h</div><div class='ctx'> generic-y += local.h</div><div class='add'>+generic-y += word-at-a-time.h</div><div class='head'>diff --git a/arch/sparc/include/asm/asi.h b/arch/sparc/include/asm/asi.h<br/>index b2e3db63a64b..61ebe7411ceb 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/asi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/asi.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/asi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/asi.h</a></div><div class='hunk'>@@ -40,11 +40,7 @@</div><div class='ctx'> #define ASI_M_UNA01         0x01   /* Same here... */</div><div class='ctx'> #define ASI_M_MXCC          0x02   /* Access to TI VIKING MXCC registers */</div><div class='ctx'> #define ASI_M_FLUSH_PROBE   0x03   /* Reference MMU Flush/Probe; rw, ss */</div><div class='del'>-#ifndef CONFIG_SPARC_LEON</div><div class='ctx'> #define ASI_M_MMUREGS       0x04   /* MMU Registers; rw, ss */</div><div class='del'>-#else</div><div class='del'>-#define ASI_M_MMUREGS       0x19</div><div class='del'>-#endif /* CONFIG_SPARC_LEON */</div><div class='ctx'> #define ASI_M_TLBDIAG       0x05   /* MMU TLB only Diagnostics */</div><div class='ctx'> #define ASI_M_DIAGS         0x06   /* Reference MMU Diagnostics */</div><div class='ctx'> #define ASI_M_IODIAG        0x07   /* MMU I/O TLB only Diagnostics */</div><div class='hunk'>@@ -112,6 +108,20 @@</div><div class='ctx'> </div><div class='ctx'> #define ASI_M_ACTION       0x4c   /* Breakpoint Action Register (GNU/Viking) */</div><div class='ctx'> </div><div class='add'>+/* LEON ASI */</div><div class='add'>+#define ASI_LEON_NOCACHE        0x01</div><div class='add'>+</div><div class='add'>+#define ASI_LEON_DCACHE_MISS    0x01</div><div class='add'>+</div><div class='add'>+#define ASI_LEON_CACHEREGS      0x02</div><div class='add'>+#define ASI_LEON_IFLUSH         0x10</div><div class='add'>+#define ASI_LEON_DFLUSH         0x11</div><div class='add'>+</div><div class='add'>+#define ASI_LEON_MMUFLUSH       0x18</div><div class='add'>+#define ASI_LEON_MMUREGS        0x19</div><div class='add'>+#define ASI_LEON_BYPASS         0x1c</div><div class='add'>+#define ASI_LEON_FLUSH_PAGE     0x10</div><div class='add'>+</div><div class='ctx'> /* V9 Architecture mandary ASIs. */</div><div class='ctx'> #define ASI_N			0x04 /* Nucleus				*/</div><div class='ctx'> #define ASI_NL			0x0c /* Nucleus, little endian		*/</div><div class='head'>diff --git a/arch/sparc/include/asm/asmmacro.h b/arch/sparc/include/asm/asmmacro.h<br/>index a995bf8aba3f..a0e28ef02558 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/asmmacro.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/asmmacro.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/asmmacro.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/asmmacro.h</a></div><div class='hunk'>@@ -6,17 +6,6 @@</div><div class='ctx'> #ifndef _SPARC_ASMMACRO_H</div><div class='ctx'> #define _SPARC_ASMMACRO_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='del'>-#include &lt;asm/asi.h&gt;</div><div class='del'>-</div><div class='del'>-#define GET_PROCESSOR4M_ID(reg) \</div><div class='del'>-	rd	%tbr, %reg; \</div><div class='del'>-	srl	%reg, 12, %reg; \</div><div class='del'>-	and	%reg, 3, %reg;</div><div class='del'>-</div><div class='del'>-#define GET_PROCESSOR4D_ID(reg) \</div><div class='del'>-	lda	[%g0] ASI_M_VIKING_TMP1, %reg;</div><div class='del'>-</div><div class='ctx'> /* All trap entry points _must_ begin with this macro or else you</div><div class='ctx'>  * lose.  It makes sure the kernel has a proper window so that</div><div class='ctx'>  * c-code can be called.</div><div class='hunk'>@@ -31,10 +20,26 @@</div><div class='ctx'> /* All traps low-level code here must end with this macro. */</div><div class='ctx'> #define RESTORE_ALL b ret_trap_entry; clr %l6;</div><div class='ctx'> </div><div class='del'>-/* sun4 probably wants half word accesses to ASI_SEGMAP, while sun4c+</div><div class='del'>-   likes byte accesses. These are to avoid ifdef mania. */</div><div class='del'>-</div><div class='del'>-#define lduXa	lduba</div><div class='del'>-#define stXa	stba</div><div class='add'>+/* Support for run-time patching of single instructions.</div><div class='add'>+ * This is used to handle the differences in the ASI for</div><div class='add'>+ * MMUREGS for LEON and SUN.</div><div class='add'>+ *</div><div class='add'>+ * Sample:</div><div class='add'>+ * LEON_PI(lda [%g0] ASI_LEON_MMUREGS, %o0</div><div class='add'>+ * SUN_PI_(lda [%g0] ASI_M_MMUREGS, %o0</div><div class='add'>+ * PI == Patch Instruction</div><div class='add'>+ *</div><div class='add'>+ * For LEON we will use the first variant,</div><div class='add'>+ * and for all other we will use the SUN variant.</div><div class='add'>+ * The order is important.</div><div class='add'>+ */</div><div class='add'>+#define LEON_PI(...)				\</div><div class='add'>+662:	__VA_ARGS__</div><div class='add'>+</div><div class='add'>+#define SUN_PI_(...)				\</div><div class='add'>+	.section .leon_1insn_patch, "ax";	\</div><div class='add'>+	.word 662b;				\</div><div class='add'>+	__VA_ARGS__;				\</div><div class='add'>+	.previous</div><div class='ctx'> </div><div class='ctx'> #endif /* !(_SPARC_ASMMACRO_H) */</div><div class='head'>diff --git a/arch/sparc/include/asm/btfixup.h b/arch/sparc/include/asm/btfixup.h<br/>deleted file mode 100644<br/>index 797722cf69f2..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/btfixup.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/btfixup.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,208 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  asm/btfixup.h:    Macros for boot time linking.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)</div><div class='del'>- */</div><div class='del'>- </div><div class='del'>-#ifndef _SPARC_BTFIXUP_H</div><div class='del'>-#define _SPARC_BTFIXUP_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='del'>-extern unsigned int ___illegal_use_of_BTFIXUP_SIMM13_in_module(void);</div><div class='del'>-extern unsigned int ___illegal_use_of_BTFIXUP_SETHI_in_module(void);</div><div class='del'>-extern unsigned int ___illegal_use_of_BTFIXUP_HALF_in_module(void);</div><div class='del'>-extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);</div><div class='del'>-</div><div class='del'>-#define BTFIXUP_SIMM13(__name) ___illegal_use_of_BTFIXUP_SIMM13_in_module()</div><div class='del'>-#define BTFIXUP_HALF(__name) ___illegal_use_of_BTFIXUP_HALF_in_module()</div><div class='del'>-#define BTFIXUP_SETHI(__name) ___illegal_use_of_BTFIXUP_SETHI_in_module()</div><div class='del'>-#define BTFIXUP_INT(__name) ___illegal_use_of_BTFIXUP_INT_in_module()</div><div class='del'>-#define BTFIXUP_BLACKBOX(__name) ___illegal_use_of_BTFIXUP_BLACKBOX_in_module</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#define BTFIXUP_SIMM13(__name) ___sf_##__name()</div><div class='del'>-#define BTFIXUP_HALF(__name) ___af_##__name()</div><div class='del'>-#define BTFIXUP_SETHI(__name) ___hf_##__name()</div><div class='del'>-#define BTFIXUP_INT(__name) ((unsigned int)&amp;___i_##__name)</div><div class='del'>-/* This must be written in assembly and present in a sethi */</div><div class='del'>-#define BTFIXUP_BLACKBOX(__name) ___b_##__name</div><div class='del'>-#endif /* MODULE */</div><div class='del'>-</div><div class='del'>-/* Fixup call xx */</div><div class='del'>-</div><div class='del'>-#define BTFIXUPDEF_CALL(__type, __name, __args...) 					\</div><div class='del'>-	extern __type ___f_##__name(__args);						\</div><div class='del'>-	extern unsigned ___fs_##__name[3];</div><div class='del'>-#define BTFIXUPDEF_CALL_CONST(__type, __name, __args...) 				\</div><div class='del'>-	extern __type ___f_##__name(__args) __attribute_const__;			\</div><div class='del'>-	extern unsigned ___fs_##__name[3];</div><div class='del'>-#define BTFIXUP_CALL(__name) ___f_##__name</div><div class='del'>-</div><div class='del'>-#define BTFIXUPDEF_BLACKBOX(__name)							\</div><div class='del'>-	extern unsigned ___bs_##__name[2];</div><div class='del'>-</div><div class='del'>-/* Put bottom 13bits into some register variable */</div><div class='del'>-</div><div class='del'>-#define BTFIXUPDEF_SIMM13(__name)							\</div><div class='del'>-	static inline unsigned int ___sf_##__name(void) __attribute_const__;		\</div><div class='del'>-	extern unsigned ___ss_##__name[2];						\</div><div class='del'>-	static inline unsigned int ___sf_##__name(void) {				\</div><div class='del'>-		unsigned int ret;							\</div><div class='del'>-		__asm__ ("or %%g0, ___s_" #__name ", %0" : "=r"(ret));			\</div><div class='del'>-		return ret;								\</div><div class='del'>-	}</div><div class='del'>-#define BTFIXUPDEF_SIMM13_INIT(__name,__val)						\</div><div class='del'>-	static inline unsigned int ___sf_##__name(void) __attribute_const__;		\</div><div class='del'>-	extern unsigned ___ss_##__name[2];						\</div><div class='del'>-	static inline unsigned int ___sf_##__name(void) {				\</div><div class='del'>-		unsigned int ret;							\</div><div class='del'>-		__asm__ ("or %%g0, ___s_" #__name "__btset_" #__val ", %0" : "=r"(ret));\</div><div class='del'>-		return ret;								\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-/* Put either bottom 13 bits, or upper 22 bits into some register variable</div><div class='del'>- * (depending on the value, this will lead into sethi FIX, reg; or</div><div class='del'>- * mov FIX, reg; )</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define BTFIXUPDEF_HALF(__name)								\</div><div class='del'>-	static inline unsigned int ___af_##__name(void) __attribute_const__;		\</div><div class='del'>-	extern unsigned ___as_##__name[2];						\</div><div class='del'>-	static inline unsigned int ___af_##__name(void) {				\</div><div class='del'>-		unsigned int ret;							\</div><div class='del'>-		__asm__ ("or %%g0, ___a_" #__name ", %0" : "=r"(ret));			\</div><div class='del'>-		return ret;								\</div><div class='del'>-	}</div><div class='del'>-#define BTFIXUPDEF_HALF_INIT(__name,__val)						\</div><div class='del'>-	static inline unsigned int ___af_##__name(void) __attribute_const__;		\</div><div class='del'>-	extern unsigned ___as_##__name[2];						\</div><div class='del'>-	static inline unsigned int ___af_##__name(void) {				\</div><div class='del'>-		unsigned int ret;							\</div><div class='del'>-		__asm__ ("or %%g0, ___a_" #__name "__btset_" #__val ", %0" : "=r"(ret));\</div><div class='del'>-		return ret;								\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-/* Put upper 22 bits into some register variable */</div><div class='del'>-</div><div class='del'>-#define BTFIXUPDEF_SETHI(__name)							\</div><div class='del'>-	static inline unsigned int ___hf_##__name(void) __attribute_const__;		\</div><div class='del'>-	extern unsigned ___hs_##__name[2];						\</div><div class='del'>-	static inline unsigned int ___hf_##__name(void) {				\</div><div class='del'>-		unsigned int ret;							\</div><div class='del'>-		__asm__ ("sethi %%hi(___h_" #__name "), %0" : "=r"(ret));		\</div><div class='del'>-		return ret;								\</div><div class='del'>-	}</div><div class='del'>-#define BTFIXUPDEF_SETHI_INIT(__name,__val)						\</div><div class='del'>-	static inline unsigned int ___hf_##__name(void) __attribute_const__;		\</div><div class='del'>-	extern unsigned ___hs_##__name[2];						\</div><div class='del'>-	static inline unsigned int ___hf_##__name(void) {				\</div><div class='del'>-		unsigned int ret;							\</div><div class='del'>-		__asm__ ("sethi %%hi(___h_" #__name "__btset_" #__val "), %0" : 	\</div><div class='del'>-			 "=r"(ret));							\</div><div class='del'>-		return ret;								\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-/* Put a full 32bit integer into some register variable */</div><div class='del'>-</div><div class='del'>-#define BTFIXUPDEF_INT(__name)								\</div><div class='del'>-	extern unsigned char ___i_##__name;						\</div><div class='del'>-	extern unsigned ___is_##__name[2];</div><div class='del'>-</div><div class='del'>-#define BTFIXUPCALL_NORM	0x00000000			/* Always call */</div><div class='del'>-#define BTFIXUPCALL_NOP		0x01000000			/* Possibly optimize to nop */</div><div class='del'>-#define BTFIXUPCALL_RETINT(i)	(0x90102000|((i) &amp; 0x1fff))	/* Possibly optimize to mov i, %o0 */</div><div class='del'>-#define BTFIXUPCALL_ORINT(i)	(0x90122000|((i) &amp; 0x1fff))	/* Possibly optimize to or %o0, i, %o0 */</div><div class='del'>-#define BTFIXUPCALL_RETO0	0x01000000			/* Return first parameter, actually a nop */</div><div class='del'>-#define BTFIXUPCALL_ANDNINT(i)	(0x902a2000|((i) &amp; 0x1fff))	/* Possibly optimize to andn %o0, i, %o0 */</div><div class='del'>-#define BTFIXUPCALL_SWAPO0O1	0xd27a0000			/* Possibly optimize to swap [%o0],%o1 */</div><div class='del'>-#define BTFIXUPCALL_SWAPO0G0	0xc07a0000			/* Possibly optimize to swap [%o0],%g0 */</div><div class='del'>-#define BTFIXUPCALL_SWAPG1G2	0xc4784000			/* Possibly optimize to swap [%g1],%g2 */</div><div class='del'>-#define BTFIXUPCALL_STG0O0	0xc0220000			/* Possibly optimize to st %g0,[%o0] */</div><div class='del'>-#define BTFIXUPCALL_STO1O0	0xd2220000			/* Possibly optimize to st %o1,[%o0] */</div><div class='del'>-</div><div class='del'>-#define BTFIXUPSET_CALL(__name, __addr, __insn)						\</div><div class='del'>-	do {										\</div><div class='del'>-		___fs_##__name[0] |= 1;							\</div><div class='del'>-		___fs_##__name[1] = (unsigned long)__addr;				\</div><div class='del'>-		___fs_##__name[2] = __insn;						\</div><div class='del'>-	} while (0)</div><div class='del'>-	</div><div class='del'>-#define BTFIXUPSET_BLACKBOX(__name, __func)						\</div><div class='del'>-	do {										\</div><div class='del'>-		___bs_##__name[0] |= 1;							\</div><div class='del'>-		___bs_##__name[1] = (unsigned long)__func;				\</div><div class='del'>-	} while (0)</div><div class='del'>-	</div><div class='del'>-#define BTFIXUPCOPY_CALL(__name, __from)						\</div><div class='del'>-	do {										\</div><div class='del'>-		___fs_##__name[0] |= 1;							\</div><div class='del'>-		___fs_##__name[1] = ___fs_##__from[1];					\</div><div class='del'>-		___fs_##__name[2] = ___fs_##__from[2];					\</div><div class='del'>-	} while (0)</div><div class='del'>-		</div><div class='del'>-#define BTFIXUPSET_SIMM13(__name, __val)						\</div><div class='del'>-	do {										\</div><div class='del'>-		___ss_##__name[0] |= 1;							\</div><div class='del'>-		___ss_##__name[1] = (unsigned)__val;					\</div><div class='del'>-	} while (0)</div><div class='del'>-	</div><div class='del'>-#define BTFIXUPCOPY_SIMM13(__name, __from)						\</div><div class='del'>-	do {										\</div><div class='del'>-		___ss_##__name[0] |= 1;							\</div><div class='del'>-		___ss_##__name[1] = ___ss_##__from[1];					\</div><div class='del'>-	} while (0)</div><div class='del'>-		</div><div class='del'>-#define BTFIXUPSET_HALF(__name, __val)							\</div><div class='del'>-	do {										\</div><div class='del'>-		___as_##__name[0] |= 1;							\</div><div class='del'>-		___as_##__name[1] = (unsigned)__val;					\</div><div class='del'>-	} while (0)</div><div class='del'>-	</div><div class='del'>-#define BTFIXUPCOPY_HALF(__name, __from)						\</div><div class='del'>-	do {										\</div><div class='del'>-		___as_##__name[0] |= 1;							\</div><div class='del'>-		___as_##__name[1] = ___as_##__from[1];					\</div><div class='del'>-	} while (0)</div><div class='del'>-		</div><div class='del'>-#define BTFIXUPSET_SETHI(__name, __val)							\</div><div class='del'>-	do {										\</div><div class='del'>-		___hs_##__name[0] |= 1;							\</div><div class='del'>-		___hs_##__name[1] = (unsigned)__val;					\</div><div class='del'>-	} while (0)</div><div class='del'>-	</div><div class='del'>-#define BTFIXUPCOPY_SETHI(__name, __from)						\</div><div class='del'>-	do {										\</div><div class='del'>-		___hs_##__name[0] |= 1;							\</div><div class='del'>-		___hs_##__name[1] = ___hs_##__from[1];					\</div><div class='del'>-	} while (0)</div><div class='del'>-		</div><div class='del'>-#define BTFIXUPSET_INT(__name, __val)							\</div><div class='del'>-	do {										\</div><div class='del'>-		___is_##__name[0] |= 1;							\</div><div class='del'>-		___is_##__name[1] = (unsigned)__val;					\</div><div class='del'>-	} while (0)</div><div class='del'>-	</div><div class='del'>-#define BTFIXUPCOPY_INT(__name, __from)							\</div><div class='del'>-	do {										\</div><div class='del'>-		___is_##__name[0] |= 1;							\</div><div class='del'>-		___is_##__name[1] = ___is_##__from[1];					\</div><div class='del'>-	} while (0)</div><div class='del'>-	</div><div class='del'>-#define BTFIXUPVAL_CALL(__name)								\</div><div class='del'>-	((unsigned long)___fs_##__name[1])</div><div class='del'>-	</div><div class='del'>-extern void btfixup(void);</div><div class='del'>-</div><div class='del'>-#else /* __ASSEMBLY__ */</div><div class='del'>-</div><div class='del'>-#define BTFIXUP_SETHI(__name)			%hi(___h_ ## __name)</div><div class='del'>-#define BTFIXUP_SETHI_INIT(__name,__val)	%hi(___h_ ## __name ## __btset_ ## __val)</div><div class='del'>-</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='del'>-	</div><div class='del'>-#endif /* !(_SPARC_BTFIXUP_H) */</div><div class='head'>diff --git a/arch/sparc/include/asm/cache.h b/arch/sparc/include/asm/cache.h<br/>index 69358b590c91..5bb6991b4857 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/cache.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/cache.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/cache.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cache.h</a></div><div class='hunk'>@@ -22,118 +22,4 @@</div><div class='ctx'> </div><div class='ctx'> #define __read_mostly __attribute__((__section__(".data..read_mostly")))</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPARC32</div><div class='del'>-#include &lt;asm/asi.h&gt;</div><div class='del'>-</div><div class='del'>-/* Direct access to the instruction cache is provided through and</div><div class='del'>- * alternate address space.  The IDC bit must be off in the ICCR on</div><div class='del'>- * HyperSparcs for these accesses to work.  The code below does not do</div><div class='del'>- * any checking, the caller must do so.  These routines are for</div><div class='del'>- * diagnostics only, but could end up being useful.  Use with care.</div><div class='del'>- * Also, you are asking for trouble if you execute these in one of the</div><div class='del'>- * three instructions following a %asr/%psr access or modification.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* First, cache-tag access. */</div><div class='del'>-static inline unsigned int get_icache_tag(int setnum, int tagnum)</div><div class='del'>-{</div><div class='del'>-	unsigned int vaddr, retval;</div><div class='del'>-</div><div class='del'>-	vaddr = ((setnum&amp;1) &lt;&lt; 12) | ((tagnum&amp;0x7f) &lt;&lt; 5);</div><div class='del'>-	__asm__ __volatile__("lda [%1] %2, %0\n\t" :</div><div class='del'>-			     "=r" (retval) :</div><div class='del'>-			     "r" (vaddr), "i" (ASI_M_TXTC_TAG));</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void put_icache_tag(int setnum, int tagnum, unsigned int entry)</div><div class='del'>-{</div><div class='del'>-	unsigned int vaddr;</div><div class='del'>-</div><div class='del'>-	vaddr = ((setnum&amp;1) &lt;&lt; 12) | ((tagnum&amp;0x7f) &lt;&lt; 5);</div><div class='del'>-	__asm__ __volatile__("sta %0, [%1] %2\n\t" : :</div><div class='del'>-			     "r" (entry), "r" (vaddr), "i" (ASI_M_TXTC_TAG) :</div><div class='del'>-			     "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Second cache-data access.  The data is returned two-32bit quantities</div><div class='del'>- * at a time.</div><div class='del'>- */</div><div class='del'>-static inline void get_icache_data(int setnum, int tagnum, int subblock,</div><div class='del'>-				       unsigned int *data)</div><div class='del'>-{</div><div class='del'>-	unsigned int value1, value2, vaddr;</div><div class='del'>-</div><div class='del'>-	vaddr = ((setnum&amp;0x1) &lt;&lt; 12) | ((tagnum&amp;0x7f) &lt;&lt; 5) |</div><div class='del'>-		((subblock&amp;0x3) &lt;&lt; 3);</div><div class='del'>-	__asm__ __volatile__("ldda [%2] %3, %%g2\n\t"</div><div class='del'>-			     "or %%g0, %%g2, %0\n\t"</div><div class='del'>-			     "or %%g0, %%g3, %1\n\t" :</div><div class='del'>-			     "=r" (value1), "=r" (value2) :</div><div class='del'>-			     "r" (vaddr), "i" (ASI_M_TXTC_DATA) :</div><div class='del'>-			     "g2", "g3");</div><div class='del'>-	data[0] = value1; data[1] = value2;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void put_icache_data(int setnum, int tagnum, int subblock,</div><div class='del'>-				       unsigned int *data)</div><div class='del'>-{</div><div class='del'>-	unsigned int value1, value2, vaddr;</div><div class='del'>-</div><div class='del'>-	vaddr = ((setnum&amp;0x1) &lt;&lt; 12) | ((tagnum&amp;0x7f) &lt;&lt; 5) |</div><div class='del'>-		((subblock&amp;0x3) &lt;&lt; 3);</div><div class='del'>-	value1 = data[0]; value2 = data[1];</div><div class='del'>-	__asm__ __volatile__("or %%g0, %0, %%g2\n\t"</div><div class='del'>-			     "or %%g0, %1, %%g3\n\t"</div><div class='del'>-			     "stda %%g2, [%2] %3\n\t" : :</div><div class='del'>-			     "r" (value1), "r" (value2), </div><div class='del'>-			     "r" (vaddr), "i" (ASI_M_TXTC_DATA) :</div><div class='del'>-			     "g2", "g3", "memory" /* no joke */);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Different types of flushes with the ICACHE.  Some of the flushes</div><div class='del'>- * affect both the ICACHE and the external cache.  Others only clear</div><div class='del'>- * the ICACHE entries on the cpu itself.  V8's (most) allow</div><div class='del'>- * granularity of flushes on the packet (element in line), whole line,</div><div class='del'>- * and entire cache (ie. all lines) level.  The ICACHE only flushes are</div><div class='del'>- * ROSS HyperSparc specific and are in ross.h</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* Flushes which clear out both the on-chip and external caches */</div><div class='del'>-static inline void flush_ei_page(unsigned int addr)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :</div><div class='del'>-			     "r" (addr), "i" (ASI_M_FLUSH_PAGE) :</div><div class='del'>-			     "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void flush_ei_seg(unsigned int addr)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :</div><div class='del'>-			     "r" (addr), "i" (ASI_M_FLUSH_SEG) :</div><div class='del'>-			     "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void flush_ei_region(unsigned int addr)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :</div><div class='del'>-			     "r" (addr), "i" (ASI_M_FLUSH_REGION) :</div><div class='del'>-			     "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void flush_ei_ctx(unsigned int addr)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :</div><div class='del'>-			     "r" (addr), "i" (ASI_M_FLUSH_CTX) :</div><div class='del'>-			     "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void flush_ei_user(unsigned int addr)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :</div><div class='del'>-			     "r" (addr), "i" (ASI_M_FLUSH_USER) :</div><div class='del'>-			     "memory");</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_SPARC32 */</div><div class='del'>-</div><div class='ctx'> #endif /* !(_SPARC_CACHE_H) */</div><div class='head'>diff --git a/arch/sparc/include/asm/cacheflush.h b/arch/sparc/include/asm/cacheflush.h<br/>index 049168087b19..f6c4839b8388 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/cacheflush.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/cacheflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/cacheflush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -1,5 +1,9 @@</div><div class='ctx'> #ifndef ___ASM_SPARC_CACHEFLUSH_H</div><div class='ctx'> #define ___ASM_SPARC_CACHEFLUSH_H</div><div class='add'>+</div><div class='add'>+/* flush addr - to allow use of self-modifying code */</div><div class='add'>+#define flushi(addr)	__asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory")</div><div class='add'>+</div><div class='ctx'> #if defined(__sparc__) &amp;&amp; defined(__arch64__)</div><div class='ctx'> #include &lt;asm/cacheflush_64.h&gt;</div><div class='ctx'> #else</div><div class='head'>diff --git a/arch/sparc/include/asm/cacheflush_32.h b/arch/sparc/include/asm/cacheflush_32.h<br/>index 68431b47a22a..bb014c24f318 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/cacheflush_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/cacheflush_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/cacheflush_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cacheflush_32.h</a></div><div class='hunk'>@@ -1,56 +1,18 @@</div><div class='ctx'> #ifndef _SPARC_CACHEFLUSH_H</div><div class='ctx'> #define _SPARC_CACHEFLUSH_H</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/mm.h&gt;		/* Common for other includes */</div><div class='del'>-// #include &lt;linux/kernel.h&gt; from pgalloc.h</div><div class='del'>-// #include &lt;linux/sched.h&gt;  from pgalloc.h</div><div class='del'>-</div><div class='del'>-// #include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Fine grained cache flushing.</div><div class='del'>- */</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_CALL(void, local_flush_cache_all, void)</div><div class='del'>-BTFIXUPDEF_CALL(void, local_flush_cache_mm, struct mm_struct *)</div><div class='del'>-BTFIXUPDEF_CALL(void, local_flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long)</div><div class='del'>-BTFIXUPDEF_CALL(void, local_flush_cache_page, struct vm_area_struct *, unsigned long)</div><div class='del'>-</div><div class='del'>-#define local_flush_cache_all() BTFIXUP_CALL(local_flush_cache_all)()</div><div class='del'>-#define local_flush_cache_mm(mm) BTFIXUP_CALL(local_flush_cache_mm)(mm)</div><div class='del'>-#define local_flush_cache_range(vma,start,end) BTFIXUP_CALL(local_flush_cache_range)(vma,start,end)</div><div class='del'>-#define local_flush_cache_page(vma,addr) BTFIXUP_CALL(local_flush_cache_page)(vma,addr)</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_CALL(void, local_flush_page_to_ram, unsigned long)</div><div class='del'>-BTFIXUPDEF_CALL(void, local_flush_sig_insns, struct mm_struct *, unsigned long)</div><div class='del'>-</div><div class='del'>-#define local_flush_page_to_ram(addr) BTFIXUP_CALL(local_flush_page_to_ram)(addr)</div><div class='del'>-#define local_flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(local_flush_sig_insns)(mm,insn_addr)</div><div class='del'>-</div><div class='del'>-extern void smp_flush_cache_all(void);</div><div class='del'>-extern void smp_flush_cache_mm(struct mm_struct *mm);</div><div class='del'>-extern void smp_flush_cache_range(struct vm_area_struct *vma,</div><div class='del'>-				  unsigned long start,</div><div class='del'>-				  unsigned long end);</div><div class='del'>-extern void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page);</div><div class='del'>-</div><div class='del'>-extern void smp_flush_page_to_ram(unsigned long page);</div><div class='del'>-extern void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr);</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_SMP */</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_CALL(void, flush_cache_all, void)</div><div class='del'>-BTFIXUPDEF_CALL(void, flush_cache_mm, struct mm_struct *)</div><div class='del'>-BTFIXUPDEF_CALL(void, flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long)</div><div class='del'>-BTFIXUPDEF_CALL(void, flush_cache_page, struct vm_area_struct *, unsigned long)</div><div class='del'>-</div><div class='del'>-#define flush_cache_all() BTFIXUP_CALL(flush_cache_all)()</div><div class='del'>-#define flush_cache_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm)</div><div class='del'>-#define flush_cache_dup_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm)</div><div class='del'>-#define flush_cache_range(vma,start,end) BTFIXUP_CALL(flush_cache_range)(vma,start,end)</div><div class='del'>-#define flush_cache_page(vma,addr,pfn) BTFIXUP_CALL(flush_cache_page)(vma,addr)</div><div class='add'>+#include &lt;asm/cachetlb_32.h&gt;</div><div class='add'>+</div><div class='add'>+#define flush_cache_all() \</div><div class='add'>+	sparc32_cachetlb_ops-&gt;cache_all()</div><div class='add'>+#define flush_cache_mm(mm) \</div><div class='add'>+	sparc32_cachetlb_ops-&gt;cache_mm(mm)</div><div class='add'>+#define flush_cache_dup_mm(mm) \</div><div class='add'>+	sparc32_cachetlb_ops-&gt;cache_mm(mm)</div><div class='add'>+#define flush_cache_range(vma,start,end) \</div><div class='add'>+	sparc32_cachetlb_ops-&gt;cache_range(vma, start, end)</div><div class='add'>+#define flush_cache_page(vma,addr,pfn) \</div><div class='add'>+	sparc32_cachetlb_ops-&gt;cache_page(vma, addr)</div><div class='ctx'> #define flush_icache_range(start, end)		do { } while (0)</div><div class='ctx'> #define flush_icache_page(vma, pg)		do { } while (0)</div><div class='ctx'> </div><div class='hunk'>@@ -67,11 +29,12 @@ BTFIXUPDEF_CALL(void, flush_cache_page, struct vm_area_struct *, unsigned long)</div><div class='ctx'> 		memcpy(dst, src, len);				\</div><div class='ctx'> 	} while (0)</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(void, __flush_page_to_ram, unsigned long)</div><div class='del'>-BTFIXUPDEF_CALL(void, flush_sig_insns, struct mm_struct *, unsigned long)</div><div class='del'>-</div><div class='del'>-#define __flush_page_to_ram(addr) BTFIXUP_CALL(__flush_page_to_ram)(addr)</div><div class='del'>-#define flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(flush_sig_insns)(mm,insn_addr)</div><div class='add'>+#define __flush_page_to_ram(addr) \</div><div class='add'>+	sparc32_cachetlb_ops-&gt;page_to_ram(addr)</div><div class='add'>+#define flush_sig_insns(mm,insn_addr) \</div><div class='add'>+	sparc32_cachetlb_ops-&gt;sig_insns(mm, insn_addr)</div><div class='add'>+#define flush_page_for_dma(addr) \</div><div class='add'>+	sparc32_cachetlb_ops-&gt;page_for_dma(addr)</div><div class='ctx'> </div><div class='ctx'> extern void sparc_flush_page_to_ram(struct page *page);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/cacheflush_64.h b/arch/sparc/include/asm/cacheflush_64.h<br/>index 2efea2ff88b7..301736d9e7a1 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/cacheflush_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/cacheflush_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/cacheflush_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cacheflush_64.h</a></div><div class='hunk'>@@ -8,9 +8,6 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Cache flush operations. */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define flushi(addr)	__asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory")</div><div class='ctx'> #define flushw_all()	__asm__ __volatile__("flushw")</div><div class='ctx'> </div><div class='ctx'> extern void __flushw_user(void);</div><div class='head'>diff --git a/arch/sparc/include/asm/cachetlb_32.h b/arch/sparc/include/asm/cachetlb_32.h<br/>new file mode 100644<br/>index 000000000000..efb19889a083<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/cachetlb_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cachetlb_32.h</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+#ifndef _SPARC_CACHETLB_H</div><div class='add'>+#define _SPARC_CACHETLB_H</div><div class='add'>+</div><div class='add'>+struct mm_struct;</div><div class='add'>+struct vm_area_struct;</div><div class='add'>+</div><div class='add'>+struct sparc32_cachetlb_ops {</div><div class='add'>+	void (*cache_all)(void);</div><div class='add'>+	void (*cache_mm)(struct mm_struct *);</div><div class='add'>+	void (*cache_range)(struct vm_area_struct *, unsigned long,</div><div class='add'>+			    unsigned long);</div><div class='add'>+	void (*cache_page)(struct vm_area_struct *, unsigned long);</div><div class='add'>+</div><div class='add'>+	void (*tlb_all)(void);</div><div class='add'>+	void (*tlb_mm)(struct mm_struct *);</div><div class='add'>+	void (*tlb_range)(struct vm_area_struct *, unsigned long,</div><div class='add'>+			  unsigned long);</div><div class='add'>+	void (*tlb_page)(struct vm_area_struct *, unsigned long);</div><div class='add'>+</div><div class='add'>+	void (*page_to_ram)(unsigned long);</div><div class='add'>+	void (*sig_insns)(struct mm_struct *, unsigned long);</div><div class='add'>+	void (*page_for_dma)(unsigned long);</div><div class='add'>+};</div><div class='add'>+extern const struct sparc32_cachetlb_ops *sparc32_cachetlb_ops;</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+extern const struct sparc32_cachetlb_ops *local_ops;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* SPARC_CACHETLB_H */</div><div class='head'>diff --git a/arch/sparc/include/asm/cmpxchg_32.h b/arch/sparc/include/asm/cmpxchg_32.h<br/>index c786b0a92b51..1fae1a02e3c2 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/cmpxchg_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/cmpxchg_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/cmpxchg_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cmpxchg_32.h</a></div><div class='hunk'>@@ -11,40 +11,13 @@</div><div class='ctx'> #ifndef __ARCH_SPARC_CMPXCHG__</div><div class='ctx'> #define __ARCH_SPARC_CMPXCHG__</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='del'>-</div><div class='del'>-/* This has special calling conventions */</div><div class='del'>-#ifndef CONFIG_SMP</div><div class='del'>-BTFIXUPDEF_CALL(void, ___xchg32, void)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='ctx'> 	__asm__ __volatile__("swap [%2], %0"</div><div class='ctx'> 			     : "=&amp;r" (val)</div><div class='ctx'> 			     : "0" (val), "r" (m)</div><div class='ctx'> 			     : "memory");</div><div class='ctx'> 	return val;</div><div class='del'>-#else</div><div class='del'>-	register unsigned long *ptr asm("g1");</div><div class='del'>-	register unsigned long ret asm("g2");</div><div class='del'>-</div><div class='del'>-	ptr = (unsigned long *) m;</div><div class='del'>-	ret = val;</div><div class='del'>-</div><div class='del'>-	/* Note: this is magic and the nop there is</div><div class='del'>-	   really needed. */</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"mov	%%o7, %%g4\n\t"</div><div class='del'>-	"call	___f____xchg32\n\t"</div><div class='del'>-	" nop\n\t"</div><div class='del'>-	: "=&amp;r" (ret)</div><div class='del'>-	: "0" (ret), "r" (ptr)</div><div class='del'>-	: "g3", "g4", "g7", "memory", "cc");</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern void __xchg_called_with_bad_pointer(void);</div><div class='head'>diff --git a/arch/sparc/include/asm/contregs.h b/arch/sparc/include/asm/contregs.h<br/>index 48fa8a4ef357..b8abdfcf5555 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/contregs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/contregs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/contregs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/contregs.h</a></div><div class='hunk'>@@ -7,28 +7,6 @@</div><div class='ctx'>  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/* 3=sun3</div><div class='del'>-   4=sun4 (as in sun4 sysmaint student book)</div><div class='del'>-   c=sun4c (according to davem) */</div><div class='del'>-</div><div class='del'>-#define AC_IDPROM     0x00000000    /* 34  ID PROM, R/O, byte, 32 bytes      */</div><div class='del'>-#define AC_PAGEMAP    0x10000000    /* 3   Pagemap R/W, long                 */</div><div class='del'>-#define AC_SEGMAP     0x20000000    /* 3   Segment map, byte                 */</div><div class='del'>-#define AC_CONTEXT    0x30000000    /* 34c current mmu-context               */</div><div class='del'>-#define AC_SENABLE    0x40000000    /* 34c system dvma/cache/reset enable reg*/</div><div class='del'>-#define AC_UDVMA_ENB  0x50000000    /* 34  Not used on Sun boards, byte      */</div><div class='del'>-#define AC_BUS_ERROR  0x60000000    /* 34  Not cleared on read, byte.        */</div><div class='del'>-#define AC_SYNC_ERR   0x60000000    /*  c fault type                         */</div><div class='del'>-#define AC_SYNC_VA    0x60000004    /*  c fault virtual address              */</div><div class='del'>-#define AC_ASYNC_ERR  0x60000008    /*  c asynchronous fault type            */</div><div class='del'>-#define AC_ASYNC_VA   0x6000000c    /*  c async fault virtual address        */</div><div class='del'>-#define AC_LEDS       0x70000000    /* 34  Zero turns on LEDs, byte          */</div><div class='del'>-#define AC_CACHETAGS  0x80000000    /* 34c direct access to the VAC tags     */</div><div class='del'>-#define AC_CACHEDDATA 0x90000000    /* 3 c direct access to the VAC data     */</div><div class='del'>-#define AC_UDVMA_MAP  0xD0000000    /* 4  Not used on Sun boards, byte       */</div><div class='del'>-#define AC_VME_VECTOR 0xE0000000    /* 4  For non-Autovector VME, byte       */</div><div class='del'>-#define AC_BOOT_SCC   0xF0000000    /* 34  bypass to access Zilog 8530. byte.*/</div><div class='del'>-</div><div class='ctx'> /* s=Swift, h=Ross_HyperSPARC, v=TI_Viking, t=Tsunami, r=Ross_Cypress        */</div><div class='ctx'> #define AC_M_PCR      0x0000        /* shv Processor Control Reg             */</div><div class='ctx'> #define AC_M_CTPR     0x0100        /* shv Context Table Pointer Reg         */</div><div class='head'>diff --git a/arch/sparc/include/asm/cpu_type.h b/arch/sparc/include/asm/cpu_type.h<br/>index 4ca184d95d82..84d7d83b8084 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/cpu_type.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/cpu_type.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/cpu_type.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cpu_type.h</a></div><div class='hunk'>@@ -5,30 +5,24 @@</div><div class='ctx'>  * Sparc (general) CPU types</div><div class='ctx'>  */</div><div class='ctx'> enum sparc_cpu {</div><div class='del'>-  sun4        = 0x00,</div><div class='del'>-  sun4c       = 0x01,</div><div class='del'>-  sun4m       = 0x02,</div><div class='del'>-  sun4d       = 0x03,</div><div class='del'>-  sun4e       = 0x04,</div><div class='del'>-  sun4u       = 0x05, /* V8 ploos ploos */</div><div class='del'>-  sun_unknown = 0x06,</div><div class='del'>-  ap1000      = 0x07, /* almost a sun4m */</div><div class='del'>-  sparc_leon  = 0x08, /* Leon SoC */</div><div class='add'>+  sun4m       = 0x00,</div><div class='add'>+  sun4d       = 0x01,</div><div class='add'>+  sun4e       = 0x02,</div><div class='add'>+  sun4u       = 0x03, /* V8 ploos ploos */</div><div class='add'>+  sun_unknown = 0x04,</div><div class='add'>+  ap1000      = 0x05, /* almost a sun4m */</div><div class='add'>+  sparc_leon  = 0x06, /* Leon SoC */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SPARC32</div><div class='ctx'> extern enum sparc_cpu sparc_cpu_model;</div><div class='ctx'> </div><div class='del'>-#define ARCH_SUN4C (sparc_cpu_model==sun4c)</div><div class='del'>-</div><div class='ctx'> #define SUN4M_NCPUS            4              /* Architectural limit of sun4m. */</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='ctx'> #define sparc_cpu_model sun4u</div><div class='ctx'> </div><div class='del'>-/* This cannot ever be a sun4c :) That's just history. */</div><div class='del'>-#define ARCH_SUN4C 0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_CPU_TYPE_H */</div><div class='head'>diff --git a/arch/sparc/include/asm/cpudata_32.h b/arch/sparc/include/asm/cpudata_32.h<br/>index a4c5a938b936..0300d94c25b3 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/cpudata_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/cpudata_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/cpudata_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/cpudata_32.h</a></div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'> typedef struct {</div><div class='ctx'> 	unsigned long udelay_val;</div><div class='ctx'> 	unsigned long clock_tick;</div><div class='del'>-	unsigned int multiplier;</div><div class='ctx'> 	unsigned int counter;</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	unsigned int irq_resched_count;</div><div class='head'>diff --git a/arch/sparc/include/asm/cypress.h b/arch/sparc/include/asm/cypress.h<br/>deleted file mode 100644<br/>index 95e9772ea394..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/cypress.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/cypress.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,79 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * cypress.h: Cypress module specific definitions and defines.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _SPARC_CYPRESS_H</div><div class='del'>-#define _SPARC_CYPRESS_H</div><div class='del'>-</div><div class='del'>-/* Cypress chips have %psr 'impl' of '0001' and 'vers' of '0001'. */</div><div class='del'>-</div><div class='del'>-/* The MMU control register fields on the Sparc Cypress 604/605 MMU's.</div><div class='del'>- *</div><div class='del'>- * ---------------------------------------------------------------</div><div class='del'>- * |implvers| MCA | MCM |MV| MID |BM| C|RSV|MR|CM|CL|CE|RSV|NF|ME|</div><div class='del'>- * ---------------------------------------------------------------</div><div class='del'>- *  31    24 23-22 21-20 19 18-15 14 13  12 11 10  9  8 7-2  1  0</div><div class='del'>- *</div><div class='del'>- * MCA: MultiChip Access -- Used for configuration of multiple</div><div class='del'>- *      CY7C604/605 cache units.</div><div class='del'>- * MCM: MultiChip Mask -- Again, for multiple cache unit config.</div><div class='del'>- * MV: MultiChip Valid -- Indicates MCM and MCA have valid settings.</div><div class='del'>- * MID: ModuleID -- Unique processor ID for MBus transactions. (605 only)</div><div class='del'>- * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode</div><div class='del'>- * C: Cacheable -- Indicates whether accesses are cacheable while</div><div class='del'>- *    the MMU is off.  0=no 1=yes</div><div class='del'>- * MR: MemoryReflection -- Indicates whether the bus attached to the</div><div class='del'>- *     MBus supports memory reflection. 0=no 1=yes (605 only)</div><div class='del'>- * CM: CacheMode -- Indicates whether the cache is operating in write</div><div class='del'>- *     through or copy-back mode. 0=write-through 1=copy-back</div><div class='del'>- * CL: CacheLock -- Indicates if the entire cache is locked or not.</div><div class='del'>- *     0=not-locked 1=locked  (604 only)</div><div class='del'>- * CE: CacheEnable -- Is the virtual cache on? 0=no 1=yes</div><div class='del'>- * NF: NoFault -- Do faults generate traps? 0=yes 1=no</div><div class='del'>- * ME: MmuEnable -- Is the MMU doing translations? 0=no 1=yes</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define CYPRESS_MCA       0x00c00000</div><div class='del'>-#define CYPRESS_MCM       0x00300000</div><div class='del'>-#define CYPRESS_MVALID    0x00080000</div><div class='del'>-#define CYPRESS_MIDMASK   0x00078000   /* Only on 605 */</div><div class='del'>-#define CYPRESS_BMODE     0x00004000</div><div class='del'>-#define CYPRESS_ACENABLE  0x00002000</div><div class='del'>-#define CYPRESS_MRFLCT    0x00000800   /* Only on 605 */</div><div class='del'>-#define CYPRESS_CMODE     0x00000400</div><div class='del'>-#define CYPRESS_CLOCK     0x00000200   /* Only on 604 */</div><div class='del'>-#define CYPRESS_CENABLE   0x00000100</div><div class='del'>-#define CYPRESS_NFAULT    0x00000002</div><div class='del'>-#define CYPRESS_MENABLE   0x00000001</div><div class='del'>-</div><div class='del'>-static inline void cypress_flush_page(unsigned long page)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :</div><div class='del'>-			     "r" (page), "i" (ASI_M_FLUSH_PAGE));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cypress_flush_segment(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :</div><div class='del'>-			     "r" (addr), "i" (ASI_M_FLUSH_SEG));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cypress_flush_region(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :</div><div class='del'>-			     "r" (addr), "i" (ASI_M_FLUSH_REGION));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cypress_flush_context(void)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :</div><div class='del'>-			     "i" (ASI_M_FLUSH_CTX));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* XXX Displacement flushes for buggy chips and initial testing</div><div class='del'>- * XXX go here.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#endif /* !(_SPARC_CYPRESS_H) */</div><div class='head'>diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h<br/>index 48a7c65731d2..8493fd3c7ba5 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/dma-mapping.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/dma-mapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -12,13 +12,18 @@ extern int dma_supported(struct device *dev, u64 mask);</div><div class='ctx'> #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)</div><div class='ctx'> #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)</div><div class='ctx'> </div><div class='del'>-extern struct dma_map_ops *dma_ops, pci32_dma_ops;</div><div class='add'>+extern struct dma_map_ops *dma_ops;</div><div class='add'>+extern struct dma_map_ops *leon_dma_ops;</div><div class='add'>+extern struct dma_map_ops pci32_dma_ops;</div><div class='add'>+</div><div class='ctx'> extern struct bus_type pci_bus_type;</div><div class='ctx'> </div><div class='ctx'> static inline struct dma_map_ops *get_dma_ops(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> #if defined(CONFIG_SPARC32) &amp;&amp; defined(CONFIG_PCI)</div><div class='del'>-	if (dev-&gt;bus == &amp;pci_bus_type)</div><div class='add'>+	if (sparc_cpu_model == sparc_leon)</div><div class='add'>+		return leon_dma_ops;</div><div class='add'>+	else if (dev-&gt;bus == &amp;pci_bus_type)</div><div class='ctx'> 		return &amp;pci32_dma_ops;</div><div class='ctx'> #endif</div><div class='ctx'> 	return dma_ops;</div><div class='head'>diff --git a/arch/sparc/include/asm/dma.h b/arch/sparc/include/asm/dma.h<br/>index b554927bbaf6..3d434ef5eae3 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/dma.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/dma.h</a></div><div class='hunk'>@@ -92,27 +92,31 @@ extern int isa_dma_bridge_buggy;</div><div class='ctx'> #ifdef CONFIG_SPARC32</div><div class='ctx'> </div><div class='ctx'> /* Routines for data transfer buffers. */</div><div class='del'>-BTFIXUPDEF_CALL(char *, mmu_lockarea, char *, unsigned long)</div><div class='del'>-BTFIXUPDEF_CALL(void,   mmu_unlockarea, char *, unsigned long)</div><div class='del'>-</div><div class='del'>-#define mmu_lockarea(vaddr,len) BTFIXUP_CALL(mmu_lockarea)(vaddr,len)</div><div class='del'>-#define mmu_unlockarea(vaddr,len) BTFIXUP_CALL(mmu_unlockarea)(vaddr,len)</div><div class='del'>-</div><div class='del'>-struct page;</div><div class='ctx'> struct device;</div><div class='ctx'> struct scatterlist;</div><div class='ctx'> </div><div class='del'>-/* These are implementations for sbus_map_sg/sbus_unmap_sg... collapse later */</div><div class='del'>-BTFIXUPDEF_CALL(__u32, mmu_get_scsi_one, struct device *, char *, unsigned long)</div><div class='del'>-BTFIXUPDEF_CALL(void,  mmu_get_scsi_sgl, struct device *, struct scatterlist *, int)</div><div class='del'>-BTFIXUPDEF_CALL(void,  mmu_release_scsi_one, struct device *, __u32, unsigned long)</div><div class='del'>-BTFIXUPDEF_CALL(void,  mmu_release_scsi_sgl, struct device *, struct scatterlist *, int)</div><div class='del'>-</div><div class='del'>-#define mmu_get_scsi_one(dev,vaddr,len) BTFIXUP_CALL(mmu_get_scsi_one)(dev,vaddr,len)</div><div class='del'>-#define mmu_get_scsi_sgl(dev,sg,sz) BTFIXUP_CALL(mmu_get_scsi_sgl)(dev,sg,sz)</div><div class='del'>-#define mmu_release_scsi_one(dev,vaddr,len) BTFIXUP_CALL(mmu_release_scsi_one)(dev,vaddr,len)</div><div class='del'>-#define mmu_release_scsi_sgl(dev,sg,sz) BTFIXUP_CALL(mmu_release_scsi_sgl)(dev,sg,sz)</div><div class='del'>-</div><div class='add'>+struct sparc32_dma_ops {</div><div class='add'>+	__u32 (*get_scsi_one)(struct device *, char *, unsigned long);</div><div class='add'>+	void (*get_scsi_sgl)(struct device *, struct scatterlist *, int);</div><div class='add'>+	void (*release_scsi_one)(struct device *, __u32, unsigned long);</div><div class='add'>+	void (*release_scsi_sgl)(struct device *, struct scatterlist *,int);</div><div class='add'>+#ifdef CONFIG_SBUS</div><div class='add'>+	int (*map_dma_area)(struct device *, dma_addr_t *, unsigned long, unsigned long, int);</div><div class='add'>+	void (*unmap_dma_area)(struct device *, unsigned long, int);</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+extern const struct sparc32_dma_ops *sparc32_dma_ops;</div><div class='add'>+</div><div class='add'>+#define mmu_get_scsi_one(dev,vaddr,len) \</div><div class='add'>+	sparc32_dma_ops-&gt;get_scsi_one(dev, vaddr, len)</div><div class='add'>+#define mmu_get_scsi_sgl(dev,sg,sz) \</div><div class='add'>+	sparc32_dma_ops-&gt;get_scsi_sgl(dev, sg, sz)</div><div class='add'>+#define mmu_release_scsi_one(dev,vaddr,len) \</div><div class='add'>+	sparc32_dma_ops-&gt;release_scsi_one(dev, vaddr,len)</div><div class='add'>+#define mmu_release_scsi_sgl(dev,sg,sz) \</div><div class='add'>+	sparc32_dma_ops-&gt;release_scsi_sgl(dev, sg, sz)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SBUS</div><div class='ctx'> /*</div><div class='ctx'>  * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep.</div><div class='ctx'>  *</div><div class='hunk'>@@ -123,17 +127,17 @@ BTFIXUPDEF_CALL(void,  mmu_release_scsi_sgl, struct device *, struct scatterlist</div><div class='ctx'>  * Second mapping is for device visible address, or "bus" address.</div><div class='ctx'>  * The bus address is returned at '*pba'.</div><div class='ctx'>  *</div><div class='del'>- * These functions seem distinct, but are hard to split. On sun4c,</div><div class='del'>- * at least for now, 'a' is equal to bus address, and retured in *pba.</div><div class='add'>+ * These functions seem distinct, but are hard to split.</div><div class='ctx'>  * On sun4m, page attributes depend on the CPU type, so we have to</div><div class='ctx'>  * know if we are mapping RAM or I/O, so it has to be an additional argument</div><div class='ctx'>  * to a separate mapping function for CPU visible mappings.</div><div class='ctx'>  */</div><div class='del'>-BTFIXUPDEF_CALL(int, mmu_map_dma_area, struct device *, dma_addr_t *, unsigned long, unsigned long, int len)</div><div class='del'>-BTFIXUPDEF_CALL(void, mmu_unmap_dma_area, struct device *, unsigned long busa, int len)</div><div class='add'>+#define sbus_map_dma_area(dev,pba,va,a,len) \</div><div class='add'>+	sparc32_dma_ops-&gt;map_dma_area(dev, pba, va, a, len)</div><div class='add'>+#define sbus_unmap_dma_area(dev,ba,len) \</div><div class='add'>+	sparc32_dma_ops-&gt;unmap_dma_area(dev, ba, len)</div><div class='add'>+#endif /* CONFIG_SBUS */</div><div class='ctx'> </div><div class='del'>-#define mmu_map_dma_area(dev,pba,va,a,len) BTFIXUP_CALL(mmu_map_dma_area)(dev,pba,va,a,len)</div><div class='del'>-#define mmu_unmap_dma_area(dev,ba,len) BTFIXUP_CALL(mmu_unmap_dma_area)(dev,ba,len)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* !(_ASM_SPARC_DMA_H) */</div><div class='head'>diff --git a/arch/sparc/include/asm/elf_32.h b/arch/sparc/include/asm/elf_32.h<br/>index 4269ca6ad18a..2d4d755cba9e 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/elf_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/elf_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/elf_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/elf_32.h</a></div><div class='hunk'>@@ -118,16 +118,9 @@ typedef struct {</div><div class='ctx'>    instruction set this cpu supports.  This can NOT be done in userspace</div><div class='ctx'>    on Sparc.  */</div><div class='ctx'> </div><div class='del'>-/* Sun4c has none of the capabilities, most sun4m's have them all.</div><div class='del'>- * XXX This is gross, set some global variable at boot time. -DaveM</div><div class='del'>- */</div><div class='del'>-#define ELF_HWCAP	((ARCH_SUN4C) ? 0 : \</div><div class='del'>-			 (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \</div><div class='del'>-			  HWCAP_SPARC_SWAP | \</div><div class='del'>-			  ((srmmu_modtype != Cypress &amp;&amp; \</div><div class='del'>-			    srmmu_modtype != Cypress_vE &amp;&amp; \</div><div class='del'>-			    srmmu_modtype != Cypress_vD) ? \</div><div class='del'>-			   HWCAP_SPARC_MULDIV : 0)))</div><div class='add'>+/* Most sun4m's have them all.  */</div><div class='add'>+#define ELF_HWCAP	(HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \</div><div class='add'>+			 HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV)</div><div class='ctx'> </div><div class='ctx'> /* This yields a string that ld.so will use to load implementation</div><div class='ctx'>    specific libraries for optimization.  This is more specific in</div><div class='head'>diff --git a/arch/sparc/include/asm/floppy_32.h b/arch/sparc/include/asm/floppy_32.h<br/>index 698d9559fead..fb3f16954c69 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/floppy_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/floppy_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/floppy_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/floppy_32.h</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/idprom.h&gt;</div><div class='del'>-#include &lt;asm/machines.h&gt;</div><div class='ctx'> #include &lt;asm/oplib.h&gt;</div><div class='ctx'> #include &lt;asm/auxio.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='hunk'>@@ -103,25 +102,13 @@ static struct sun_floppy_ops sun_fdops;</div><div class='ctx'> /* Routines unique to each controller type on a Sun. */</div><div class='ctx'> static void sun_set_dor(unsigned char value, int fdc_82077)</div><div class='ctx'> {</div><div class='del'>-	if (sparc_cpu_model == sun4c) {</div><div class='del'>-		unsigned int bits = 0;</div><div class='del'>-		if (value &amp; 0x10)</div><div class='del'>-			bits |= AUXIO_FLPY_DSEL;</div><div class='del'>-		if ((value &amp; 0x80) == 0)</div><div class='del'>-			bits |= AUXIO_FLPY_EJCT;</div><div class='del'>-		set_auxio(bits, (~bits) &amp; (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT));</div><div class='del'>-	}</div><div class='del'>-	if (fdc_82077) {</div><div class='add'>+	if (fdc_82077)</div><div class='ctx'> 		sun_fdc-&gt;dor_82077 = value;</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned char sun_read_dir(void)</div><div class='ctx'> {</div><div class='del'>-	if (sparc_cpu_model == sun4c)</div><div class='del'>-		return (get_auxio() &amp; AUXIO_FLPY_DCHG) ? 0x80 : 0;</div><div class='del'>-	else</div><div class='del'>-		return sun_fdc-&gt;dir_82077;</div><div class='add'>+	return sun_fdc-&gt;dir_82077;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned char sun_82072_fd_inb(int port)</div><div class='hunk'>@@ -242,10 +229,7 @@ static inline void virtual_dma_init(void)</div><div class='ctx'> static inline void sun_fd_disable_dma(void)</div><div class='ctx'> {</div><div class='ctx'> 	doing_pdma = 0;</div><div class='del'>-	if (pdma_base) {</div><div class='del'>-		mmu_unlockarea(pdma_base, pdma_areasize);</div><div class='del'>-		pdma_base = NULL;</div><div class='del'>-	}</div><div class='add'>+	pdma_base = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void sun_fd_set_dma_mode(int mode)</div><div class='hunk'>@@ -275,7 +259,6 @@ static inline void sun_fd_set_dma_count(int length)</div><div class='ctx'> </div><div class='ctx'> static inline void sun_fd_enable_dma(void)</div><div class='ctx'> {</div><div class='del'>-	pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size);</div><div class='ctx'> 	pdma_base = pdma_vaddr;</div><div class='ctx'> 	pdma_areasize = pdma_size;</div><div class='ctx'> }</div><div class='hunk'>@@ -301,38 +284,36 @@ static int sun_floppy_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *op;</div><div class='ctx'> 	struct device_node *dp;</div><div class='add'>+	struct resource r;</div><div class='ctx'> 	char state[128];</div><div class='del'>-	phandle tnode, fd_node;</div><div class='add'>+	phandle fd_node;</div><div class='add'>+	phandle tnode;</div><div class='ctx'> 	int num_regs;</div><div class='del'>-	struct resource r;</div><div class='ctx'> </div><div class='ctx'> 	use_virtual_dma = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* Forget it if we aren't on a machine that could possibly</div><div class='ctx'> 	 * ever have a floppy drive.</div><div class='ctx'> 	 */</div><div class='del'>-	if((sparc_cpu_model != sun4c &amp;&amp; sparc_cpu_model != sun4m) ||</div><div class='del'>-	   ((idprom-&gt;id_machtype == (SM_SUN4C | SM_4C_SLC)) ||</div><div class='del'>-	    (idprom-&gt;id_machtype == (SM_SUN4C | SM_4C_ELC)))) {</div><div class='add'>+	if (sparc_cpu_model != sun4m) {</div><div class='ctx'> 		/* We certainly don't have a floppy controller. */</div><div class='ctx'> 		goto no_sun_fdc;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Well, try to find one. */</div><div class='ctx'> 	tnode = prom_getchild(prom_root_node);</div><div class='ctx'> 	fd_node = prom_searchsiblings(tnode, "obio");</div><div class='del'>-	if(fd_node != 0) {</div><div class='add'>+	if (fd_node != 0) {</div><div class='ctx'> 		tnode = prom_getchild(fd_node);</div><div class='ctx'> 		fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo");</div><div class='ctx'> 	} else {</div><div class='ctx'> 		fd_node = prom_searchsiblings(tnode, "fd");</div><div class='ctx'> 	}</div><div class='del'>-	if(fd_node == 0) {</div><div class='add'>+	if (fd_node == 0) {</div><div class='ctx'> 		goto no_sun_fdc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* The sun4m lets us know if the controller is actually usable. */</div><div class='del'>-	if(sparc_cpu_model == sun4m &amp;&amp;</div><div class='del'>-	   prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) {</div><div class='add'>+	if (prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) {</div><div class='ctx'> 		if(!strcmp(state, "disabled")) {</div><div class='ctx'> 			goto no_sun_fdc;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -343,12 +324,12 @@ static int sun_floppy_init(void)</div><div class='ctx'> 	memset(&amp;r, 0, sizeof(r));</div><div class='ctx'> 	r.flags = fd_regs[0].which_io;</div><div class='ctx'> 	r.start = fd_regs[0].phys_addr;</div><div class='del'>-	sun_fdc = (struct sun_flpy_controller *)</div><div class='del'>-	    of_ioremap(&amp;r, 0, fd_regs[0].reg_size, "floppy");</div><div class='add'>+	sun_fdc = of_ioremap(&amp;r, 0, fd_regs[0].reg_size, "floppy");</div><div class='ctx'> </div><div class='ctx'> 	/* Look up irq in platform_device.</div><div class='ctx'> 	 * We try "SUNW,fdtwo" and "fd"</div><div class='ctx'> 	 */</div><div class='add'>+	op = NULL;</div><div class='ctx'> 	for_each_node_by_name(dp, "SUNW,fdtwo") {</div><div class='ctx'> 		op = of_find_device_by_node(dp);</div><div class='ctx'> 		if (op)</div><div class='hunk'>@@ -367,7 +348,7 @@ static int sun_floppy_init(void)</div><div class='ctx'> 	FLOPPY_IRQ = op-&gt;archdata.irqs[0];</div><div class='ctx'> </div><div class='ctx'> 	/* Last minute sanity check... */</div><div class='del'>-	if(sun_fdc-&gt;status_82072 == 0xff) {</div><div class='add'>+	if (sun_fdc-&gt;status_82072 == 0xff) {</div><div class='ctx'> 		sun_fdc = NULL;</div><div class='ctx'> 		goto no_sun_fdc;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/sparc/include/asm/floppy_64.h b/arch/sparc/include/asm/floppy_64.h<br/>index bcef1f5a2a6d..e204f902e6c9 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/floppy_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/floppy_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/floppy_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/floppy_64.h</a></div><div class='hunk'>@@ -161,10 +161,7 @@ unsigned long pdma_areasize;</div><div class='ctx'> static void sun_fd_disable_dma(void)</div><div class='ctx'> {</div><div class='ctx'> 	doing_pdma = 0;</div><div class='del'>-	if (pdma_base) {</div><div class='del'>-		mmu_unlockarea(pdma_base, pdma_areasize);</div><div class='del'>-		pdma_base = NULL;</div><div class='del'>-	}</div><div class='add'>+	pdma_base = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sun_fd_set_dma_mode(int mode)</div><div class='hunk'>@@ -194,7 +191,6 @@ static void sun_fd_set_dma_count(int length)</div><div class='ctx'> </div><div class='ctx'> static void sun_fd_enable_dma(void)</div><div class='ctx'> {</div><div class='del'>-	pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size);</div><div class='ctx'> 	pdma_base = pdma_vaddr;</div><div class='ctx'> 	pdma_areasize = pdma_size;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sparc/include/asm/gpio.h b/arch/sparc/include/asm/gpio.h<br/>index a0e3ac0af599..b3799d88ffcf 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/gpio.h</a></div><div class='hunk'>@@ -1,36 +1,4 @@</div><div class='del'>-#ifndef __ASM_SPARC_GPIO_H</div><div class='del'>-#define __ASM_SPARC_GPIO_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;asm-generic/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_GPIOLIB</div><div class='del'>-</div><div class='del'>-static inline int gpio_get_value(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_get_value(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void gpio_set_value(unsigned int gpio, int value)</div><div class='del'>-{</div><div class='del'>-	__gpio_set_value(gpio, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_cansleep(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_cansleep(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_to_irq(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return -ENOSYS;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int irq_to_gpio(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_GPIOLIB */</div><div class='del'>-</div><div class='del'>-#endif /* __ASM_SPARC_GPIO_H */</div><div class='add'>+#ifndef __LINUX_GPIO_H</div><div class='add'>+#warning Include linux/gpio.h instead of asm/gpio.h</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/sparc/include/asm/head_32.h b/arch/sparc/include/asm/head_32.h<br/>index 7c35491a8b53..a76874838f61 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/head_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/head_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/head_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/head_32.h</a></div><div class='hunk'>@@ -2,15 +2,8 @@</div><div class='ctx'> #define __SPARC_HEAD_H</div><div class='ctx'> </div><div class='ctx'> #define KERNBASE        0xf0000000  /* First address the kernel will eventually be */</div><div class='del'>-#define LOAD_ADDR       0x4000      /* prom jumps to us here unless this is elf /boot */</div><div class='del'>-#define SUN4C_SEGSZ     (1 &lt;&lt; 18)</div><div class='del'>-#define SRMMU_L1_KBASE_OFFSET ((KERNBASE&gt;&gt;24)&lt;&lt;2)  /* Used in boot remapping. */</div><div class='del'>-#define INTS_ENAB        0x01           /* entry.S uses this. */</div><div class='del'>-</div><div class='del'>-#define SUN4_PROM_VECTOR 0xFFE81000     /* SUN4 PROM needs to be hardwired */</div><div class='ctx'> </div><div class='ctx'> #define WRITE_PAUSE      nop; nop; nop; /* Have to do this after %wim/%psr chg */</div><div class='del'>-#define NOP_INSN         0x01000000     /* Used to patch sparc_save_state */</div><div class='ctx'> </div><div class='ctx'> /* Here are some trap goodies */</div><div class='ctx'> </div><div class='hunk'>@@ -18,9 +11,7 @@</div><div class='ctx'> #define TRAP_ENTRY(type, label) \</div><div class='ctx'> 	rd %psr, %l0; b label; rd %wim, %l3; nop;</div><div class='ctx'> </div><div class='del'>-/* Data/text faults. Defaults to sun4c version at boot time. */</div><div class='del'>-#define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;</div><div class='del'>-#define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;</div><div class='add'>+/* Data/text faults */</div><div class='ctx'> #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;</div><div class='ctx'> #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;</div><div class='ctx'> </div><div class='hunk'>@@ -80,16 +71,6 @@</div><div class='ctx'> #define TRAP_ENTRY_INTERRUPT(int_level) \</div><div class='ctx'>         mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;</div><div class='ctx'> </div><div class='del'>-/* NMI's (Non Maskable Interrupts) are special, you can't keep them</div><div class='del'>- * from coming in, and basically if you get one, the shows over. ;(</div><div class='del'>- * On the sun4c they are usually asynchronous memory errors, on the</div><div class='del'>- * the sun4m they could be either due to mem errors or a software</div><div class='del'>- * initiated interrupt from the prom/kern on an SMP box saying "I</div><div class='del'>- * command you to do CPU tricks, read your mailbox for more info."</div><div class='del'>- */</div><div class='del'>-#define NMI_TRAP \</div><div class='del'>-        rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop;</div><div class='del'>-</div><div class='ctx'> /* Window overflows/underflows are special and we need to try to be as</div><div class='ctx'>  * efficient as possible here....</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/sparc/include/asm/kvm_para.h b/arch/sparc/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/sparc/include/asm/leon.h b/arch/sparc/include/asm/leon.h<br/>index a4e457f003ed..3375c6293893 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/leon.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/leon.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/leon.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/leon.h</a></div><div class='hunk'>@@ -8,21 +8,6 @@</div><div class='ctx'> #ifndef LEON_H_INCLUDE</div><div class='ctx'> #define LEON_H_INCLUDE</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPARC_LEON</div><div class='del'>-</div><div class='del'>-#define ASI_LEON_NOCACHE	0x01</div><div class='del'>-</div><div class='del'>-#define ASI_LEON_DCACHE_MISS	0x1</div><div class='del'>-</div><div class='del'>-#define ASI_LEON_CACHEREGS	0x02</div><div class='del'>-#define ASI_LEON_IFLUSH		0x10</div><div class='del'>-#define ASI_LEON_DFLUSH		0x11</div><div class='del'>-</div><div class='del'>-#define ASI_LEON_MMUFLUSH	0x18</div><div class='del'>-#define ASI_LEON_MMUREGS	0x19</div><div class='del'>-#define ASI_LEON_BYPASS		0x1c</div><div class='del'>-#define ASI_LEON_FLUSH_PAGE	0x10</div><div class='del'>-</div><div class='ctx'> /* mmu register access, ASI_LEON_MMUREGS */</div><div class='ctx'> #define LEON_CNR_CTRL		0x000</div><div class='ctx'> #define LEON_CNR_CTXP		0x100</div><div class='hunk'>@@ -57,29 +42,6 @@</div><div class='ctx'> #define LEON_IRQMASK_R		0x0000fffe	/* bit 15- 1 of lregs.irqmask */</div><div class='ctx'> #define LEON_IRQPRIO_R		0xfffe0000	/* bit 31-17 of lregs.irqmask */</div><div class='ctx'> </div><div class='del'>-/* leon uart register definitions */</div><div class='del'>-#define LEON_OFF_UDATA	0x0</div><div class='del'>-#define LEON_OFF_USTAT	0x4</div><div class='del'>-#define LEON_OFF_UCTRL	0x8</div><div class='del'>-#define LEON_OFF_USCAL	0xc</div><div class='del'>-</div><div class='del'>-#define LEON_UCTRL_RE	0x01</div><div class='del'>-#define LEON_UCTRL_TE	0x02</div><div class='del'>-#define LEON_UCTRL_RI	0x04</div><div class='del'>-#define LEON_UCTRL_TI	0x08</div><div class='del'>-#define LEON_UCTRL_PS	0x10</div><div class='del'>-#define LEON_UCTRL_PE	0x20</div><div class='del'>-#define LEON_UCTRL_FL	0x40</div><div class='del'>-#define LEON_UCTRL_LB	0x80</div><div class='del'>-</div><div class='del'>-#define LEON_USTAT_DR	0x01</div><div class='del'>-#define LEON_USTAT_TS	0x02</div><div class='del'>-#define LEON_USTAT_TH	0x04</div><div class='del'>-#define LEON_USTAT_BR	0x08</div><div class='del'>-#define LEON_USTAT_OV	0x10</div><div class='del'>-#define LEON_USTAT_PE	0x20</div><div class='del'>-#define LEON_USTAT_FE	0x40</div><div class='del'>-</div><div class='ctx'> #define LEON_MCFG2_SRAMDIS		0x00002000</div><div class='ctx'> #define LEON_MCFG2_SDRAMEN		0x00004000</div><div class='ctx'> #define LEON_MCFG2_SRAMBANKSZ		0x00001e00	/* [12-9] */</div><div class='hunk'>@@ -89,8 +51,6 @@</div><div class='ctx'> </div><div class='ctx'> #define LEON_TCNT0_MASK	0x7fffff</div><div class='ctx'> </div><div class='del'>-#define LEON_USTAT_ERROR (LEON_USTAT_OV | LEON_USTAT_PE | LEON_USTAT_FE)</div><div class='del'>-/* no break yet */</div><div class='ctx'> </div><div class='ctx'> #define ASI_LEON3_SYSCTRL		0x02</div><div class='ctx'> #define ASI_LEON3_SYSCTRL_ICFG		0x08</div><div class='hunk'>@@ -100,15 +60,6 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='del'>-/* do a virtual address read without cache */</div><div class='del'>-static inline unsigned long leon_readnobuffer_reg(unsigned long paddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long retval;</div><div class='del'>-	__asm__ __volatile__("lda [%1] %2, %0\n\t" :</div><div class='del'>-			     "=r"(retval) : "r"(paddr), "i"(ASI_LEON_NOCACHE));</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* do a physical address bypass write, i.e. for 0x80000000 */</div><div class='ctx'> static inline void leon_store_reg(unsigned long paddr, unsigned long value)</div><div class='ctx'> {</div><div class='hunk'>@@ -125,47 +76,16 @@ static inline unsigned long leon_load_reg(unsigned long paddr)</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void leon_srmmu_disabletlb(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int retval;</div><div class='del'>-	__asm__ __volatile__("lda [%%g0] %2, %0\n\t" : "=r"(retval) : "r"(0),</div><div class='del'>-			     "i"(ASI_LEON_MMUREGS));</div><div class='del'>-	retval |= LEON_CNR_CTRL_TLBDIS;</div><div class='del'>-	__asm__ __volatile__("sta %0, [%%g0] %2\n\t" : : "r"(retval), "r"(0),</div><div class='del'>-			     "i"(ASI_LEON_MMUREGS) : "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void leon_srmmu_enabletlb(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int retval;</div><div class='del'>-	__asm__ __volatile__("lda [%%g0] %2, %0\n\t" : "=r"(retval) : "r"(0),</div><div class='del'>-			     "i"(ASI_LEON_MMUREGS));</div><div class='del'>-	retval = retval &amp; ~LEON_CNR_CTRL_TLBDIS;</div><div class='del'>-	__asm__ __volatile__("sta %0, [%%g0] %2\n\t" : : "r"(retval), "r"(0),</div><div class='del'>-			     "i"(ASI_LEON_MMUREGS) : "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* macro access for leon_load_reg() and leon_store_reg() */</div><div class='ctx'> #define LEON3_BYPASS_LOAD_PA(x)	    (leon_load_reg((unsigned long)(x)))</div><div class='ctx'> #define LEON3_BYPASS_STORE_PA(x, v) (leon_store_reg((unsigned long)(x), (unsigned long)(v)))</div><div class='del'>-#define LEON3_BYPASS_ANDIN_PA(x, v) LEON3_BYPASS_STORE_PA(x, LEON3_BYPASS_LOAD_PA(x) &amp; v)</div><div class='del'>-#define LEON3_BYPASS_ORIN_PA(x, v)  LEON3_BYPASS_STORE_PA(x, LEON3_BYPASS_LOAD_PA(x) | v)</div><div class='ctx'> #define LEON_BYPASS_LOAD_PA(x)      leon_load_reg((unsigned long)(x))</div><div class='ctx'> #define LEON_BYPASS_STORE_PA(x, v)  leon_store_reg((unsigned long)(x), (unsigned long)(v))</div><div class='del'>-#define LEON_REGLOAD_PA(x)          leon_load_reg((unsigned long)(x)+LEON_PREGS)</div><div class='del'>-#define LEON_REGSTORE_PA(x, v)      leon_store_reg((unsigned long)(x)+LEON_PREGS, (unsigned long)(v))</div><div class='del'>-#define LEON_REGSTORE_OR_PA(x, v)   LEON_REGSTORE_PA(x, LEON_REGLOAD_PA(x) | (unsigned long)(v))</div><div class='del'>-#define LEON_REGSTORE_AND_PA(x, v)  LEON_REGSTORE_PA(x, LEON_REGLOAD_PA(x) &amp; (unsigned long)(v))</div><div class='del'>-</div><div class='del'>-/* macro access for leon_readnobuffer_reg() */</div><div class='del'>-#define LEON_BYPASSCACHE_LOAD_VA(x) leon_readnobuffer_reg((unsigned long)(x))</div><div class='ctx'> </div><div class='ctx'> extern void leon_init(void);</div><div class='ctx'> extern void leon_switch_mm(void);</div><div class='ctx'> extern void leon_init_IRQ(void);</div><div class='ctx'> </div><div class='del'>-extern unsigned long last_valid_pfn;</div><div class='del'>-</div><div class='ctx'> static inline unsigned long sparc_leon3_get_dcachecfg(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int retval;</div><div class='hunk'>@@ -268,9 +188,6 @@ static inline int sparc_leon3_cpuid(void)</div><div class='ctx'> #error cannot determine LEON_PAGE_SIZE_LEON</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define PAGE_MIN_SHIFT   (12)</div><div class='del'>-#define PAGE_MIN_SIZE    (1UL &lt;&lt; PAGE_MIN_SHIFT)</div><div class='del'>-</div><div class='ctx'> #define LEON3_XCCR_SETS_MASK  0x07000000UL</div><div class='ctx'> #define LEON3_XCCR_SSIZE_MASK 0x00f00000UL</div><div class='ctx'> </div><div class='hunk'>@@ -278,18 +195,11 @@ static inline int sparc_leon3_cpuid(void)</div><div class='ctx'> #define LEON2_CFG_SSIZE_MASK 0x00007000UL</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='del'>-extern unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr);</div><div class='del'>-extern void leon_flush_icache_all(void);</div><div class='del'>-extern void leon_flush_dcache_all(void);</div><div class='del'>-extern void leon_flush_cache_all(void);</div><div class='del'>-extern void leon_flush_tlb_all(void);</div><div class='del'>-extern int leon_flush_during_switch;</div><div class='del'>-extern int leon_flush_needed(void);</div><div class='del'>-</div><div class='ctx'> struct vm_area_struct;</div><div class='add'>+</div><div class='add'>+extern unsigned long leon_swprobe(unsigned long vaddr, unsigned long *paddr);</div><div class='ctx'> extern void leon_flush_icache_all(void);</div><div class='ctx'> extern void leon_flush_dcache_all(void);</div><div class='del'>-extern void leon_flush_pcache_all(struct vm_area_struct *vma, unsigned long page);</div><div class='ctx'> extern void leon_flush_cache_all(void);</div><div class='ctx'> extern void leon_flush_tlb_all(void);</div><div class='ctx'> extern int leon_flush_during_switch;</div><div class='hunk'>@@ -303,40 +213,23 @@ struct leon3_cacheregs {</div><div class='ctx'> 	unsigned long dccr;	/* 0x0c - Data Cache Configuration Register */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* struct that hold LEON2 cache configuration register</div><div class='del'>- * &amp; configuration register</div><div class='del'>- */</div><div class='del'>-struct leon2_cacheregs {</div><div class='del'>-	unsigned long ccr, cfg;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct device_node;</div><div class='add'>+struct task_struct;</div><div class='ctx'> extern unsigned int leon_build_device_irq(unsigned int real_irq,</div><div class='ctx'> 					   irq_flow_handler_t flow_handler,</div><div class='ctx'> 					   const char *name, int do_ack);</div><div class='ctx'> extern void leon_update_virq_handling(unsigned int virq,</div><div class='ctx'> 			      irq_flow_handler_t flow_handler,</div><div class='ctx'> 			      const char *name, int do_ack);</div><div class='del'>-extern void leon_clear_clock_irq(void);</div><div class='del'>-extern void leon_load_profile_irq(int cpu, unsigned int limit);</div><div class='del'>-extern void leon_init_timers(irq_handler_t counter_fn);</div><div class='del'>-extern void leon_clear_clock_irq(void);</div><div class='del'>-extern void leon_load_profile_irq(int cpu, unsigned int limit);</div><div class='add'>+extern void leon_init_timers(void);</div><div class='ctx'> extern void leon_trans_init(struct device_node *dp);</div><div class='ctx'> extern void leon_node_init(struct device_node *dp, struct device_node ***nextp);</div><div class='del'>-extern void leon_init_IRQ(void);</div><div class='del'>-extern void leon_init(void);</div><div class='del'>-extern unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr);</div><div class='ctx'> extern void init_leon(void);</div><div class='ctx'> extern void poke_leonsparc(void);</div><div class='ctx'> extern void leon3_getCacheRegs(struct leon3_cacheregs *regs);</div><div class='del'>-extern int leon_flush_needed(void);</div><div class='del'>-extern void leon_switch_mm(void);</div><div class='del'>-extern int srmmu_swprobe_trace;</div><div class='ctx'> extern int leon3_ticker_irq;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='hunk'>@@ -344,26 +237,17 @@ extern int leon_smp_nrcpus(void);</div><div class='ctx'> extern void leon_clear_profile_irq(int cpu);</div><div class='ctx'> extern void leon_smp_done(void);</div><div class='ctx'> extern void leon_boot_cpus(void);</div><div class='del'>-extern int leon_boot_one_cpu(int i);</div><div class='add'>+extern int leon_boot_one_cpu(int i, struct task_struct *);</div><div class='ctx'> void leon_init_smp(void);</div><div class='del'>-extern void cpu_idle(void);</div><div class='del'>-extern void init_IRQ(void);</div><div class='del'>-extern void cpu_panic(void);</div><div class='del'>-extern int __leon_processor_id(void);</div><div class='ctx'> void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu);</div><div class='ctx'> extern irqreturn_t leon_percpu_timer_interrupt(int irq, void *unused);</div><div class='ctx'> </div><div class='del'>-extern unsigned int real_irq_entry[];</div><div class='ctx'> extern unsigned int smpleon_ipi[];</div><div class='del'>-extern unsigned int patchme_maybe_smp_msg[];</div><div class='del'>-extern unsigned int t_nmi[], linux_trap_ipi15_leon[];</div><div class='del'>-extern unsigned int linux_trap_ipi15_sun4m[];</div><div class='add'>+extern unsigned int linux_trap_ipi15_leon[];</div><div class='ctx'> extern int leon_ipi_irq;</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> /* macros used in leon_mm.c */</div><div class='hunk'>@@ -371,18 +255,4 @@ extern int leon_ipi_irq;</div><div class='ctx'> #define _pfn_valid(pfn)	 ((pfn &lt; last_valid_pfn) &amp;&amp; (pfn &gt;= PFN(phys_base)))</div><div class='ctx'> #define _SRMMU_PTE_PMASK_LEON 0xffffffff</div><div class='ctx'> </div><div class='del'>-#else /* defined(CONFIG_SPARC_LEON) */</div><div class='del'>-</div><div class='del'>-/* nop definitions for !LEON case */</div><div class='del'>-#define leon_init() do {} while (0)</div><div class='del'>-#define leon_switch_mm() do {} while (0)</div><div class='del'>-#define leon_init_IRQ() do {} while (0)</div><div class='del'>-#define init_leon() do {} while (0)</div><div class='del'>-#define leon_smp_done() do {} while (0)</div><div class='del'>-#define leon_boot_cpus() do {} while (0)</div><div class='del'>-#define leon_boot_one_cpu(i) 1</div><div class='del'>-#define leon_init_smp() do {} while (0)</div><div class='del'>-</div><div class='del'>-#endif /* !defined(CONFIG_SPARC_LEON) */</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/sparc/include/asm/leon_amba.h b/arch/sparc/include/asm/leon_amba.h<br/>index e50f326e71bd..f3034eddf468 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/leon_amba.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/leon_amba.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/leon_amba.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/leon_amba.h</a></div><div class='hunk'>@@ -87,8 +87,6 @@ struct amba_prom_registers {</div><div class='ctx'> #define LEON3_GPTIMER_CONFIG_NRTIMERS(c) ((c)-&gt;config &amp; 0x7)</div><div class='ctx'> #define LEON3_GPTIMER_CTRL_ISPENDING(r)  (((r)&amp;LEON3_GPTIMER_CTRL_PENDING) ? 1 : 0)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPARC_LEON</div><div class='del'>-</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> struct leon3_irqctrl_regs_map {</div><div class='hunk'>@@ -264,6 +262,4 @@ extern unsigned int sparc_leon_eirq;</div><div class='ctx'> </div><div class='ctx'> #define amba_device(x) (((x) &gt;&gt; 12) &amp; 0xfff)</div><div class='ctx'> </div><div class='del'>-#endif /* !defined(CONFIG_SPARC_LEON) */</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/sparc/include/asm/machines.h b/arch/sparc/include/asm/machines.h<br/>index cd9c099567e4..fd6ddb05d1b7 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/machines.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/machines.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/machines.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/machines.h</a></div><div class='hunk'>@@ -12,11 +12,6 @@ struct Sun_Machine_Models {</div><div class='ctx'> 	unsigned char id_machtype;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Current number of machines we know about that has an IDPROM</div><div class='del'>- * machtype entry including one entry for the 0x80 OBP machines.</div><div class='del'>- */</div><div class='del'>-#define NUM_SUN_MACHINES   16</div><div class='del'>-</div><div class='ctx'> /* The machine type in the idprom area looks like this:</div><div class='ctx'>  *</div><div class='ctx'>  * ---------------</div><div class='hunk'>@@ -24,36 +19,20 @@ struct Sun_Machine_Models {</div><div class='ctx'>  * ---------------</div><div class='ctx'>  *  7    4 3    0</div><div class='ctx'>  *</div><div class='del'>- * The ARCH field determines the architecture line (sun4, sun4c, etc).</div><div class='add'>+ * The ARCH field determines the architecture line (sun4m, etc).</div><div class='ctx'>  * The MACH field determines the machine make within that architecture.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define SM_ARCH_MASK  0xf0</div><div class='del'>-#define SM_SUN4       0x20</div><div class='ctx'> #define  M_LEON       0x30</div><div class='del'>-#define SM_SUN4C      0x50</div><div class='ctx'> #define SM_SUN4M      0x70</div><div class='ctx'> #define SM_SUN4M_OBP  0x80</div><div class='ctx'> </div><div class='ctx'> #define SM_TYP_MASK   0x0f</div><div class='del'>-/* Sun4 machines */</div><div class='del'>-#define SM_4_260      0x01    /* Sun 4/200 series */</div><div class='del'>-#define SM_4_110      0x02    /* Sun 4/100 series */</div><div class='del'>-#define SM_4_330      0x03    /* Sun 4/300 series */</div><div class='del'>-#define SM_4_470      0x04    /* Sun 4/400 series */</div><div class='ctx'> </div><div class='ctx'> /* Leon machines */</div><div class='ctx'> #define M_LEON3_SOC   0x02    /* Leon3 SoC */</div><div class='ctx'> </div><div class='del'>-/* Sun4c machines                Full Name              - PROM NAME */</div><div class='del'>-#define SM_4C_SS1     0x01    /* Sun4c SparcStation 1   - Sun 4/60  */</div><div class='del'>-#define SM_4C_IPC     0x02    /* Sun4c SparcStation IPC - Sun 4/40  */</div><div class='del'>-#define SM_4C_SS1PLUS 0x03    /* Sun4c SparcStation 1+  - Sun 4/65  */</div><div class='del'>-#define SM_4C_SLC     0x04    /* Sun4c SparcStation SLC - Sun 4/20  */</div><div class='del'>-#define SM_4C_SS2     0x05    /* Sun4c SparcStation 2   - Sun 4/75  */</div><div class='del'>-#define SM_4C_ELC     0x06    /* Sun4c SparcStation ELC - Sun 4/25  */</div><div class='del'>-#define SM_4C_IPX     0x07    /* Sun4c SparcStation IPX - Sun 4/50  */</div><div class='del'>-</div><div class='ctx'> /* Sun4m machines, these predate the OpenBoot.  These values only mean</div><div class='ctx'>  * something if the value in the ARCH field is SM_SUN4M, if it is</div><div class='ctx'>  * SM_SUN4M_OBP then you have the following situation:</div><div class='head'>diff --git a/arch/sparc/include/asm/mbus.h b/arch/sparc/include/asm/mbus.h<br/>index 69f07a022ee6..14128bcc5821 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/mbus.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/mbus.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/mbus.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/mbus.h</a></div><div class='hunk'>@@ -8,14 +8,10 @@</div><div class='ctx'> #define _SPARC_MBUS_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/ross.h&gt;    /* HyperSparc stuff */</div><div class='del'>-#include &lt;asm/cypress.h&gt; /* Cypress Chips */</div><div class='ctx'> #include &lt;asm/viking.h&gt;  /* Ugh, bug city... */</div><div class='ctx'> </div><div class='ctx'> enum mbus_module {</div><div class='ctx'> 	HyperSparc        = 0,</div><div class='del'>-	Cypress           = 1,</div><div class='del'>-	Cypress_vE        = 2,</div><div class='del'>-	Cypress_vD        = 3,</div><div class='ctx'> 	Swift_ok          = 4,</div><div class='ctx'> 	Swift_bad_c       = 5,</div><div class='ctx'> 	Swift_lots_o_bugs = 6,</div><div class='head'>diff --git a/arch/sparc/include/asm/memreg.h b/arch/sparc/include/asm/memreg.h<br/>deleted file mode 100644<br/>index 845ad2b39183..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/memreg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/memreg.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,51 +0,0 @@</div><div class='del'>-#ifndef _SPARC_MEMREG_H</div><div class='del'>-#define _SPARC_MEMREG_H</div><div class='del'>-/* memreg.h:  Definitions of the values found in the synchronous</div><div class='del'>- *            and asynchronous memory error registers when a fault</div><div class='del'>- *            occurs on the sun4c.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* First the synchronous error codes, these are usually just</div><div class='del'>- * normal page faults.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define SUN4C_SYNC_WDRESET   0x0001  /* watchdog reset */</div><div class='del'>-#define SUN4C_SYNC_SIZE      0x0002  /* bad access size? whuz this? */</div><div class='del'>-#define SUN4C_SYNC_PARITY    0x0008  /* bad ram chips caused a parity error */</div><div class='del'>-#define SUN4C_SYNC_SBUS      0x0010  /* the SBUS had some problems... */</div><div class='del'>-#define SUN4C_SYNC_NOMEM     0x0020  /* translation to non-existent ram */</div><div class='del'>-#define SUN4C_SYNC_PROT      0x0040  /* access violated pte protections */</div><div class='del'>-#define SUN4C_SYNC_NPRESENT  0x0080  /* pte said that page was not present */</div><div class='del'>-#define SUN4C_SYNC_BADWRITE  0x8000  /* while writing something went bogus */</div><div class='del'>-</div><div class='del'>-#define SUN4C_SYNC_BOLIXED  \</div><div class='del'>-        (SUN4C_SYNC_WDRESET | SUN4C_SYNC_SIZE | SUN4C_SYNC_SBUS | \</div><div class='del'>-         SUN4C_SYNC_NOMEM | SUN4C_SYNC_PARITY)</div><div class='del'>-</div><div class='del'>-/* Now the asynchronous error codes, these are almost always produced</div><div class='del'>- * by the cache writing things back to memory and getting a bad translation.</div><div class='del'>- * Bad DVMA transactions can cause these faults too.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define SUN4C_ASYNC_BADDVMA 0x0010  /* error during DVMA access */</div><div class='del'>-#define SUN4C_ASYNC_NOMEM   0x0020  /* write back pointed to bad phys addr */</div><div class='del'>-#define SUN4C_ASYNC_BADWB   0x0080  /* write back points to non-present page */</div><div class='del'>-</div><div class='del'>-/* Memory parity error register with associated bit constants. */</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-extern __volatile__ unsigned long __iomem *sun4c_memerr_reg;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define	SUN4C_MPE_ERROR	0x80	/* Parity error detected. (ro) */</div><div class='del'>-#define	SUN4C_MPE_MULTI	0x40	/* Multiple parity errors detected. (ro) */</div><div class='del'>-#define	SUN4C_MPE_TEST	0x20	/* Write inverse parity. (rw) */</div><div class='del'>-#define	SUN4C_MPE_CHECK	0x10	/* Enable parity checking. (rw) */</div><div class='del'>-#define	SUN4C_MPE_ERR00	0x08	/* Parity error in bits 0-7. (ro) */</div><div class='del'>-#define	SUN4C_MPE_ERR08	0x04	/* Parity error in bits 8-15. (ro) */</div><div class='del'>-#define	SUN4C_MPE_ERR16	0x02	/* Parity error in bits 16-23. (ro) */</div><div class='del'>-#define	SUN4C_MPE_ERR24	0x01	/* Parity error in bits 24-31. (ro) */</div><div class='del'>-#define	SUN4C_MPE_ERRS	0x0F	/* Bit mask for the error bits. (ro) */</div><div class='del'>-</div><div class='del'>-#endif /* !(_SPARC_MEMREG_H) */</div><div class='head'>diff --git a/arch/sparc/include/asm/mmu_context_32.h b/arch/sparc/include/asm/mmu_context_32.h<br/>index 671a997b9e69..01456c900720 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/mmu_context_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/mmu_context_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/mmu_context_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/mmu_context_32.h</a></div><div class='hunk'>@@ -1,8 +1,6 @@</div><div class='ctx'> #ifndef __SPARC_MMU_CONTEXT_H</div><div class='ctx'> #define __SPARC_MMU_CONTEXT_H</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='del'>-</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/mm_hooks.h&gt;</div><div class='hunk'>@@ -23,14 +21,11 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)</div><div class='ctx'>  * all the page tables have been flushed.  Our job is to destroy</div><div class='ctx'>  * any remaining processor-specific state.</div><div class='ctx'>  */</div><div class='del'>-BTFIXUPDEF_CALL(void, destroy_context, struct mm_struct *)</div><div class='del'>-</div><div class='del'>-#define destroy_context(mm) BTFIXUP_CALL(destroy_context)(mm)</div><div class='add'>+void destroy_context(struct mm_struct *mm);</div><div class='ctx'> </div><div class='ctx'> /* Switch the current MM context. */</div><div class='del'>-BTFIXUPDEF_CALL(void, switch_mm, struct mm_struct *, struct mm_struct *, struct task_struct *)</div><div class='del'>-</div><div class='del'>-#define switch_mm(old_mm, mm, tsk) BTFIXUP_CALL(switch_mm)(old_mm, mm, tsk)</div><div class='add'>+void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm,</div><div class='add'>+	       struct task_struct *tsk);</div><div class='ctx'> </div><div class='ctx'> #define deactivate_mm(tsk,mm)	do { } while (0)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/obio.h b/arch/sparc/include/asm/obio.h<br/>index 4ade0c8a2c79..910c1d9af1f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/obio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/obio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/obio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/obio.h</a></div><div class='hunk'>@@ -220,19 +220,6 @@ static inline void cc_set_igen(unsigned gen)</div><div class='ctx'> 			      "i" (ASI_M_MXCC));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* +-------+-------------+-----------+------------------------------------+</div><div class='del'>- * | bcast |  devid      |   sid     |              levels mask           |</div><div class='del'>- * +-------+-------------+-----------+------------------------------------+</div><div class='del'>- *  31      30         23 22       15 14                                 0</div><div class='del'>- */</div><div class='del'>-#define IGEN_MESSAGE(bcast, devid, sid, levels) \</div><div class='del'>-	(((bcast) &lt;&lt; 31) | ((devid) &lt;&lt; 23) | ((sid) &lt;&lt; 15) | (levels))</div><div class='del'>-            </div><div class='del'>-static inline void sun4d_send_ipi(int cpu, int level)</div><div class='del'>-{</div><div class='del'>-	cc_set_igen(IGEN_MESSAGE(0, cpu &lt;&lt; 3, 6 + ((level &gt;&gt; 1) &amp; 7), 1 &lt;&lt; (level - 1)));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* !(_SPARC_OBIO_H) */</div><div class='head'>diff --git a/arch/sparc/include/asm/oplib_32.h b/arch/sparc/include/asm/oplib_32.h<br/>index 71e5e9aeb67e..27517879a6c2 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/oplib_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/oplib_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/oplib_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/oplib_32.h</a></div><div class='hunk'>@@ -105,14 +105,6 @@ extern void prom_write(const char *buf, unsigned int len);</div><div class='ctx'> extern int prom_startcpu(int cpunode, struct linux_prom_registers *context_table,</div><div class='ctx'> 			 int context, char *program_counter);</div><div class='ctx'> </div><div class='del'>-/* Sun4/sun4c specific memory-management startup hook. */</div><div class='del'>-</div><div class='del'>-/* Map the passed segment in the given context at the passed</div><div class='del'>- * virtual address.</div><div class='del'>- */</div><div class='del'>-extern void prom_putsegment(int context, unsigned long virt_addr,</div><div class='del'>-			    int physical_segment);</div><div class='del'>-</div><div class='ctx'> /* Initialize the memory lists based upon the prom version. */</div><div class='ctx'> void prom_meminit(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/page_32.h b/arch/sparc/include/asm/page_32.h<br/>index bb5c2ac4055d..fab78a308ebf 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/page_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/page_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/page_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/page_32.h</a></div><div class='hunk'>@@ -14,8 +14,6 @@</div><div class='ctx'> #define PAGE_SIZE    (_AC(1, UL) &lt;&lt; PAGE_SHIFT)</div><div class='ctx'> #define PAGE_MASK    (~(PAGE_SIZE-1))</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='del'>-</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #define clear_page(page)	 memset((void *)(page), 0, PAGE_SIZE)</div><div class='hunk'>@@ -45,12 +43,6 @@ struct sparc_phys_banks {</div><div class='ctx'> </div><div class='ctx'> extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS+1];</div><div class='ctx'> </div><div class='del'>-/* Cache alias structure.  Entry is valid if context != -1. */</div><div class='del'>-struct cache_palias {</div><div class='del'>-	unsigned long vaddr;</div><div class='del'>-	int context;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* passing structs on the Sparc slow us down tremendously... */</div><div class='ctx'> </div><div class='ctx'> /* #define STRICT_MM_TYPECHECKS */</div><div class='hunk'>@@ -116,10 +108,7 @@ typedef unsigned long iopgprot_t;</div><div class='ctx'> typedef struct page *pgtable_t;</div><div class='ctx'> </div><div class='ctx'> extern unsigned long sparc_unmapped_base;</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_SETHI(sparc_unmapped_base)</div><div class='del'>-</div><div class='del'>-#define TASK_UNMAPPED_BASE	BTFIXUP_SETHI(sparc_unmapped_base)</div><div class='add'>+#define TASK_UNMAPPED_BASE	sparc_unmapped_base</div><div class='ctx'> </div><div class='ctx'> #else /* !(__ASSEMBLY__) */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/pgalloc_32.h b/arch/sparc/include/asm/pgalloc_32.h<br/>index ca2b34456c4b..e5b169b46d21 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/pgalloc_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/pgalloc_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/pgalloc_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/pgalloc_32.h</a></div><div class='hunk'>@@ -4,8 +4,10 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/pgtsrmmu.h&gt;</div><div class='add'>+#include &lt;asm/pgtable.h&gt;</div><div class='add'>+#include &lt;asm/vaddrs.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct page;</div><div class='ctx'> </div><div class='hunk'>@@ -15,54 +17,74 @@ extern struct pgtable_cache_struct {</div><div class='ctx'> 	unsigned long pgtable_cache_sz;</div><div class='ctx'> 	unsigned long pgd_cache_sz;</div><div class='ctx'> } pgt_quicklists;</div><div class='add'>+</div><div class='add'>+unsigned long srmmu_get_nocache(int size, int align);</div><div class='add'>+void srmmu_free_nocache(unsigned long vaddr, int size);</div><div class='add'>+</div><div class='ctx'> #define pgd_quicklist           (pgt_quicklists.pgd_cache)</div><div class='ctx'> #define pmd_quicklist           ((unsigned long *)0)</div><div class='ctx'> #define pte_quicklist           (pgt_quicklists.pte_cache)</div><div class='ctx'> #define pgtable_cache_size      (pgt_quicklists.pgtable_cache_sz)</div><div class='ctx'> #define pgd_cache_size		(pgt_quicklists.pgd_cache_sz)</div><div class='ctx'> </div><div class='del'>-extern void check_pgt_cache(void);</div><div class='del'>-BTFIXUPDEF_CALL(void,	 do_check_pgt_cache, int, int)</div><div class='del'>-#define do_check_pgt_cache(low,high) BTFIXUP_CALL(do_check_pgt_cache)(low,high)</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_CALL(pgd_t *, get_pgd_fast, void)</div><div class='del'>-#define get_pgd_fast()		BTFIXUP_CALL(get_pgd_fast)()</div><div class='add'>+#define check_pgt_cache()	do { } while (0)</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(void, free_pgd_fast, pgd_t *)</div><div class='del'>-#define free_pgd_fast(pgd)	BTFIXUP_CALL(free_pgd_fast)(pgd)</div><div class='add'>+pgd_t *get_pgd_fast(void);</div><div class='add'>+static inline void free_pgd_fast(pgd_t *pgd)</div><div class='add'>+{</div><div class='add'>+	srmmu_free_nocache((unsigned long)pgd, SRMMU_PGD_TABLE_SIZE);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define pgd_free(mm, pgd)	free_pgd_fast(pgd)</div><div class='ctx'> #define pgd_alloc(mm)	get_pgd_fast()</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(void, pgd_set, pgd_t *, pmd_t *)</div><div class='del'>-#define pgd_set(pgdp,pmdp) BTFIXUP_CALL(pgd_set)(pgdp,pmdp)</div><div class='add'>+static inline void pgd_set(pgd_t * pgdp, pmd_t * pmdp)</div><div class='add'>+{</div><div class='add'>+	unsigned long pa = __nocache_pa((unsigned long)pmdp);</div><div class='add'>+</div><div class='add'>+	set_pte((pte_t *)pgdp, (SRMMU_ET_PTD | (pa &gt;&gt; 4)));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define pgd_populate(MM, PGD, PMD)      pgd_set(PGD, PMD)</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(pmd_t *, pmd_alloc_one, struct mm_struct *, unsigned long)</div><div class='del'>-#define pmd_alloc_one(mm, address)	BTFIXUP_CALL(pmd_alloc_one)(mm, address)</div><div class='add'>+static inline pmd_t *pmd_alloc_one(struct mm_struct *mm,</div><div class='add'>+				   unsigned long address)</div><div class='add'>+{</div><div class='add'>+	return (pmd_t *)srmmu_get_nocache(SRMMU_PMD_TABLE_SIZE,</div><div class='add'>+					  SRMMU_PMD_TABLE_SIZE);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(void, free_pmd_fast, pmd_t *)</div><div class='del'>-#define free_pmd_fast(pmd)	BTFIXUP_CALL(free_pmd_fast)(pmd)</div><div class='add'>+static inline void free_pmd_fast(pmd_t * pmd)</div><div class='add'>+{</div><div class='add'>+	srmmu_free_nocache((unsigned long)pmd, SRMMU_PMD_TABLE_SIZE);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define pmd_free(mm, pmd)		free_pmd_fast(pmd)</div><div class='ctx'> #define __pmd_free_tlb(tlb, pmd, addr)	pmd_free((tlb)-&gt;mm, pmd)</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(void, pmd_populate, pmd_t *, struct page *)</div><div class='del'>-#define pmd_populate(MM, PMD, PTE)        BTFIXUP_CALL(pmd_populate)(PMD, PTE)</div><div class='add'>+void pmd_populate(struct mm_struct *mm, pmd_t *pmdp, struct page *ptep);</div><div class='ctx'> #define pmd_pgtable(pmd) pmd_page(pmd)</div><div class='del'>-BTFIXUPDEF_CALL(void, pmd_set, pmd_t *, pte_t *)</div><div class='del'>-#define pmd_populate_kernel(MM, PMD, PTE) BTFIXUP_CALL(pmd_set)(PMD, PTE)</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(pgtable_t , pte_alloc_one, struct mm_struct *, unsigned long)</div><div class='del'>-#define pte_alloc_one(mm, address)	BTFIXUP_CALL(pte_alloc_one)(mm, address)</div><div class='del'>-BTFIXUPDEF_CALL(pte_t *, pte_alloc_one_kernel, struct mm_struct *, unsigned long)</div><div class='del'>-#define pte_alloc_one_kernel(mm, addr)	BTFIXUP_CALL(pte_alloc_one_kernel)(mm, addr)</div><div class='add'>+void pmd_set(pmd_t *pmdp, pte_t *ptep);</div><div class='add'>+#define pmd_populate_kernel(MM, PMD, PTE) pmd_set(PMD, PTE)</div><div class='add'>+</div><div class='add'>+pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address);</div><div class='add'>+</div><div class='add'>+static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,</div><div class='add'>+					  unsigned long address)</div><div class='add'>+{</div><div class='add'>+	return (pte_t *)srmmu_get_nocache(PTE_SIZE, PTE_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static inline void free_pte_fast(pte_t *pte)</div><div class='add'>+{</div><div class='add'>+	srmmu_free_nocache((unsigned long)pte, PTE_SIZE);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(void, free_pte_fast, pte_t *)</div><div class='del'>-#define pte_free_kernel(mm, pte)	BTFIXUP_CALL(free_pte_fast)(pte)</div><div class='add'>+#define pte_free_kernel(mm, pte)	free_pte_fast(pte)</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(void, pte_free, pgtable_t )</div><div class='del'>-#define pte_free(mm, pte)		BTFIXUP_CALL(pte_free)(pte)</div><div class='add'>+void pte_free(struct mm_struct * mm, pgtable_t pte);</div><div class='ctx'> #define __pte_free_tlb(tlb, pte, addr)	pte_free((tlb)-&gt;mm, pte)</div><div class='ctx'> </div><div class='ctx'> #endif /* _SPARC_PGALLOC_H */</div><div class='head'>diff --git a/arch/sparc/include/asm/pgtable_32.h b/arch/sparc/include/asm/pgtable_32.h<br/>index 3d7101860e68..cbbbed5cb3aa 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/pgtable_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/pgtable_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/pgtable_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/pgtable_32.h</a></div><div class='hunk'>@@ -16,11 +16,9 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/swap.h&gt;</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='del'>-#include &lt;asm/pgtsun4c.h&gt;</div><div class='ctx'> #include &lt;asm/pgtsrmmu.h&gt;</div><div class='del'>-#include &lt;asm/vac-ops.h&gt;</div><div class='add'>+#include &lt;asm/vaddrs.h&gt;</div><div class='ctx'> #include &lt;asm/oplib.h&gt;</div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_type.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -30,87 +28,55 @@ struct page;</div><div class='ctx'> extern void load_mmu(void);</div><div class='ctx'> extern unsigned long calc_highpages(void);</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_SIMM13(pgdir_shift)</div><div class='del'>-BTFIXUPDEF_SETHI(pgdir_size)</div><div class='del'>-BTFIXUPDEF_SETHI(pgdir_mask)</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_SIMM13(ptrs_per_pmd)</div><div class='del'>-BTFIXUPDEF_SIMM13(ptrs_per_pgd)</div><div class='del'>-BTFIXUPDEF_SIMM13(user_ptrs_per_pgd)</div><div class='del'>-</div><div class='ctx'> #define pte_ERROR(e)   __builtin_trap()</div><div class='ctx'> #define pmd_ERROR(e)   __builtin_trap()</div><div class='ctx'> #define pgd_ERROR(e)   __builtin_trap()</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_INT(page_none)</div><div class='del'>-BTFIXUPDEF_INT(page_copy)</div><div class='del'>-BTFIXUPDEF_INT(page_readonly)</div><div class='del'>-BTFIXUPDEF_INT(page_kernel)</div><div class='del'>-</div><div class='del'>-#define PMD_SHIFT		SUN4C_PMD_SHIFT</div><div class='add'>+#define PMD_SHIFT		22</div><div class='ctx'> #define PMD_SIZE        	(1UL &lt;&lt; PMD_SHIFT)</div><div class='ctx'> #define PMD_MASK        	(~(PMD_SIZE-1))</div><div class='ctx'> #define PMD_ALIGN(__addr) 	(((__addr) + ~PMD_MASK) &amp; PMD_MASK)</div><div class='del'>-#define PGDIR_SHIFT     	BTFIXUP_SIMM13(pgdir_shift)</div><div class='del'>-#define PGDIR_SIZE      	BTFIXUP_SETHI(pgdir_size)</div><div class='del'>-#define PGDIR_MASK      	BTFIXUP_SETHI(pgdir_mask)</div><div class='add'>+#define PGDIR_SHIFT     	SRMMU_PGDIR_SHIFT</div><div class='add'>+#define PGDIR_SIZE      	SRMMU_PGDIR_SIZE</div><div class='add'>+#define PGDIR_MASK      	SRMMU_PGDIR_MASK</div><div class='ctx'> #define PTRS_PER_PTE    	1024</div><div class='del'>-#define PTRS_PER_PMD    	BTFIXUP_SIMM13(ptrs_per_pmd)</div><div class='del'>-#define PTRS_PER_PGD    	BTFIXUP_SIMM13(ptrs_per_pgd)</div><div class='del'>-#define USER_PTRS_PER_PGD	BTFIXUP_SIMM13(user_ptrs_per_pgd)</div><div class='add'>+#define PTRS_PER_PMD    	SRMMU_PTRS_PER_PMD</div><div class='add'>+#define PTRS_PER_PGD    	SRMMU_PTRS_PER_PGD</div><div class='add'>+#define USER_PTRS_PER_PGD	PAGE_OFFSET / SRMMU_PGDIR_SIZE</div><div class='ctx'> #define FIRST_USER_ADDRESS	0</div><div class='ctx'> #define PTE_SIZE		(PTRS_PER_PTE*4)</div><div class='ctx'> </div><div class='del'>-#define PAGE_NONE      __pgprot(BTFIXUP_INT(page_none))</div><div class='del'>-extern pgprot_t PAGE_SHARED;</div><div class='del'>-#define PAGE_COPY      __pgprot(BTFIXUP_INT(page_copy))</div><div class='del'>-#define PAGE_READONLY  __pgprot(BTFIXUP_INT(page_readonly))</div><div class='del'>-</div><div class='del'>-extern unsigned long page_kernel;</div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='del'>-#define PAGE_KERNEL	page_kernel</div><div class='del'>-#else</div><div class='del'>-#define PAGE_KERNEL    __pgprot(BTFIXUP_INT(page_kernel))</div><div class='del'>-#endif</div><div class='add'>+#define PAGE_NONE	SRMMU_PAGE_NONE</div><div class='add'>+#define PAGE_SHARED	SRMMU_PAGE_SHARED</div><div class='add'>+#define PAGE_COPY	SRMMU_PAGE_COPY</div><div class='add'>+#define PAGE_READONLY	SRMMU_PAGE_RDONLY</div><div class='add'>+#define PAGE_KERNEL	SRMMU_PAGE_KERNEL</div><div class='ctx'> </div><div class='ctx'> /* Top-level page directory */</div><div class='ctx'> extern pgd_t swapper_pg_dir[1024];</div><div class='ctx'> </div><div class='ctx'> extern void paging_init(void);</div><div class='ctx'> </div><div class='del'>-/* Page table for 0-4MB for everybody, on the Sparc this</div><div class='del'>- * holds the same as on the i386.</div><div class='del'>- */</div><div class='del'>-extern pte_t pg0[1024];</div><div class='del'>-extern pte_t pg1[1024];</div><div class='del'>-extern pte_t pg2[1024];</div><div class='del'>-extern pte_t pg3[1024];</div><div class='del'>-</div><div class='ctx'> extern unsigned long ptr_in_current_pgd;</div><div class='ctx'> </div><div class='del'>-/* Here is a trick, since mmap.c need the initializer elements for</div><div class='del'>- * protection_map[] to be constant at compile time, I set the following</div><div class='del'>- * to all zeros.  I set it to the real values after I link in the</div><div class='del'>- * appropriate MMU page table routines at boot time.</div><div class='del'>- */</div><div class='del'>-#define __P000  __pgprot(0)</div><div class='del'>-#define __P001  __pgprot(0)</div><div class='del'>-#define __P010  __pgprot(0)</div><div class='del'>-#define __P011  __pgprot(0)</div><div class='del'>-#define __P100  __pgprot(0)</div><div class='del'>-#define __P101  __pgprot(0)</div><div class='del'>-#define __P110  __pgprot(0)</div><div class='del'>-#define __P111  __pgprot(0)</div><div class='del'>-</div><div class='del'>-#define __S000	__pgprot(0)</div><div class='del'>-#define __S001	__pgprot(0)</div><div class='del'>-#define __S010	__pgprot(0)</div><div class='del'>-#define __S011	__pgprot(0)</div><div class='del'>-#define __S100	__pgprot(0)</div><div class='del'>-#define __S101	__pgprot(0)</div><div class='del'>-#define __S110	__pgprot(0)</div><div class='del'>-#define __S111	__pgprot(0)</div><div class='add'>+/*         xwr */</div><div class='add'>+#define __P000  PAGE_NONE</div><div class='add'>+#define __P001  PAGE_READONLY</div><div class='add'>+#define __P010  PAGE_COPY</div><div class='add'>+#define __P011  PAGE_COPY</div><div class='add'>+#define __P100  PAGE_READONLY</div><div class='add'>+#define __P101  PAGE_READONLY</div><div class='add'>+#define __P110  PAGE_COPY</div><div class='add'>+#define __P111  PAGE_COPY</div><div class='add'>+</div><div class='add'>+#define __S000	PAGE_NONE</div><div class='add'>+#define __S001	PAGE_READONLY</div><div class='add'>+#define __S010	PAGE_SHARED</div><div class='add'>+#define __S011	PAGE_SHARED</div><div class='add'>+#define __S100	PAGE_READONLY</div><div class='add'>+#define __S101	PAGE_READONLY</div><div class='add'>+#define __S110	PAGE_SHARED</div><div class='add'>+#define __S111	PAGE_SHARED</div><div class='ctx'> </div><div class='ctx'> extern int num_contexts;</div><div class='ctx'> </div><div class='hunk'>@@ -137,82 +103,137 @@ extern unsigned long empty_zero_page;</div><div class='ctx'> #define ZERO_PAGE(vaddr) (virt_to_page(&amp;empty_zero_page))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * In general all page table modifications should use the V8 atomic</div><div class='add'>+ * swap instruction.  This insures the mmu and the cpu are in sync</div><div class='add'>+ * with respect to ref/mod bits in the page tables.</div><div class='add'>+ */</div><div class='add'>+static inline unsigned long srmmu_swap(unsigned long *addr, unsigned long value)</div><div class='add'>+{</div><div class='add'>+	__asm__ __volatile__("swap [%2], %0" : "=&amp;r" (value) : "0" (value), "r" (addr));</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Certain architectures need to do special things when pte's</div><div class='add'>+ * within a page table are directly modified.  Thus, the following</div><div class='add'>+ * hook is made available.</div><div class='ctx'>  */</div><div class='del'>-BTFIXUPDEF_CALL_CONST(struct page *, pmd_page, pmd_t)</div><div class='del'>-BTFIXUPDEF_CALL_CONST(unsigned long, pgd_page_vaddr, pgd_t)</div><div class='ctx'> </div><div class='del'>-#define pmd_page(pmd) BTFIXUP_CALL(pmd_page)(pmd)</div><div class='del'>-#define pgd_page_vaddr(pgd) BTFIXUP_CALL(pgd_page_vaddr)(pgd)</div><div class='add'>+static inline void set_pte(pte_t *ptep, pte_t pteval)</div><div class='add'>+{</div><div class='add'>+	srmmu_swap((unsigned long *)ptep, pte_val(pteval));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)</div><div class='add'>+</div><div class='add'>+static inline int srmmu_device_memory(unsigned long x)</div><div class='add'>+{</div><div class='add'>+	return ((x &amp; 0xF0000000) != 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct page *pmd_page(pmd_t pmd)</div><div class='add'>+{</div><div class='add'>+	if (srmmu_device_memory(pmd_val(pmd)))</div><div class='add'>+		BUG();</div><div class='add'>+	return pfn_to_page((pmd_val(pmd) &amp; SRMMU_PTD_PMASK) &gt;&gt; (PAGE_SHIFT-4));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned long pgd_page_vaddr(pgd_t pgd)</div><div class='add'>+{</div><div class='add'>+	if (srmmu_device_memory(pgd_val(pgd))) {</div><div class='add'>+		return ~0;</div><div class='add'>+	} else {</div><div class='add'>+		unsigned long v = pgd_val(pgd) &amp; SRMMU_PTD_PMASK;</div><div class='add'>+		return (unsigned long)__nocache_va(v &lt;&lt; 4);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t)</div><div class='del'>-BTFIXUPDEF_CALL(void, pte_clear, pte_t *)</div><div class='add'>+static inline int pte_present(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return ((pte_val(pte) &amp; SRMMU_ET_MASK) == SRMMU_ET_PTE);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static inline int pte_none(pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	return !pte_val(pte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define pte_present(pte) BTFIXUP_CALL(pte_present)(pte)</div><div class='del'>-#define pte_clear(mm,addr,pte) BTFIXUP_CALL(pte_clear)(pte)</div><div class='add'>+static inline void __pte_clear(pte_t *ptep)</div><div class='add'>+{</div><div class='add'>+	set_pte(ptep, __pte(0));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)</div><div class='add'>+{</div><div class='add'>+	__pte_clear(ptep);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int pmd_bad(pmd_t pmd)</div><div class='add'>+{</div><div class='add'>+	return (pmd_val(pmd) &amp; SRMMU_ET_MASK) != SRMMU_ET_PTD;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t)</div><div class='del'>-BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t)</div><div class='del'>-BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *)</div><div class='add'>+static inline int pmd_present(pmd_t pmd)</div><div class='add'>+{</div><div class='add'>+	return ((pmd_val(pmd) &amp; SRMMU_ET_MASK) == SRMMU_ET_PTD);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static inline int pmd_none(pmd_t pmd)</div><div class='ctx'> {</div><div class='ctx'> 	return !pmd_val(pmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define pmd_bad(pmd) BTFIXUP_CALL(pmd_bad)(pmd)</div><div class='del'>-#define pmd_present(pmd) BTFIXUP_CALL(pmd_present)(pmd)</div><div class='del'>-#define pmd_clear(pmd) BTFIXUP_CALL(pmd_clear)(pmd)</div><div class='add'>+static inline void pmd_clear(pmd_t *pmdp)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	for (i = 0; i &lt; PTRS_PER_PTE/SRMMU_REAL_PTRS_PER_PTE; i++)</div><div class='add'>+		set_pte((pte_t *)&amp;pmdp-&gt;pmdv[i], __pte(0));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL_CONST(int, pgd_none, pgd_t)</div><div class='del'>-BTFIXUPDEF_CALL_CONST(int, pgd_bad, pgd_t)</div><div class='del'>-BTFIXUPDEF_CALL_CONST(int, pgd_present, pgd_t)</div><div class='del'>-BTFIXUPDEF_CALL(void, pgd_clear, pgd_t *)</div><div class='add'>+static inline int pgd_none(pgd_t pgd)          </div><div class='add'>+{</div><div class='add'>+	return !(pgd_val(pgd) &amp; 0xFFFFFFF);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#define pgd_none(pgd) BTFIXUP_CALL(pgd_none)(pgd)</div><div class='del'>-#define pgd_bad(pgd) BTFIXUP_CALL(pgd_bad)(pgd)</div><div class='del'>-#define pgd_present(pgd) BTFIXUP_CALL(pgd_present)(pgd)</div><div class='del'>-#define pgd_clear(pgd) BTFIXUP_CALL(pgd_clear)(pgd)</div><div class='add'>+static inline int pgd_bad(pgd_t pgd)</div><div class='add'>+{</div><div class='add'>+	return (pgd_val(pgd) &amp; SRMMU_ET_MASK) != SRMMU_ET_PTD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int pgd_present(pgd_t pgd)</div><div class='add'>+{</div><div class='add'>+	return ((pgd_val(pgd) &amp; SRMMU_ET_MASK) == SRMMU_ET_PTD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void pgd_clear(pgd_t *pgdp)</div><div class='add'>+{</div><div class='add'>+	set_pte((pte_t *)pgdp, __pte(0));</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The following only work if pte_present() is true.</div><div class='ctx'>  * Undefined behaviour if not..</div><div class='ctx'>  */</div><div class='del'>-BTFIXUPDEF_HALF(pte_writei)</div><div class='del'>-BTFIXUPDEF_HALF(pte_dirtyi)</div><div class='del'>-BTFIXUPDEF_HALF(pte_youngi)</div><div class='del'>-</div><div class='del'>-static int pte_write(pte_t pte) __attribute_const__;</div><div class='ctx'> static inline int pte_write(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	return pte_val(pte) &amp; BTFIXUP_HALF(pte_writei);</div><div class='add'>+	return pte_val(pte) &amp; SRMMU_WRITE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pte_dirty(pte_t pte) __attribute_const__;</div><div class='ctx'> static inline int pte_dirty(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	return pte_val(pte) &amp; BTFIXUP_HALF(pte_dirtyi);</div><div class='add'>+	return pte_val(pte) &amp; SRMMU_DIRTY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pte_young(pte_t pte) __attribute_const__;</div><div class='ctx'> static inline int pte_young(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	return pte_val(pte) &amp; BTFIXUP_HALF(pte_youngi);</div><div class='add'>+	return pte_val(pte) &amp; SRMMU_REF;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The following only work if pte_present() is not true.</div><div class='ctx'>  */</div><div class='del'>-BTFIXUPDEF_HALF(pte_filei)</div><div class='del'>-</div><div class='del'>-static int pte_file(pte_t pte) __attribute_const__;</div><div class='ctx'> static inline int pte_file(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	return pte_val(pte) &amp; BTFIXUP_HALF(pte_filei);</div><div class='add'>+	return pte_val(pte) &amp; SRMMU_FILE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int pte_special(pte_t pte)</div><div class='hunk'>@@ -220,68 +241,85 @@ static inline int pte_special(pte_t pte)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- */</div><div class='del'>-BTFIXUPDEF_HALF(pte_wrprotecti)</div><div class='del'>-BTFIXUPDEF_HALF(pte_mkcleani)</div><div class='del'>-BTFIXUPDEF_HALF(pte_mkoldi)</div><div class='del'>-</div><div class='del'>-static pte_t pte_wrprotect(pte_t pte) __attribute_const__;</div><div class='ctx'> static inline pte_t pte_wrprotect(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	return __pte(pte_val(pte) &amp; ~BTFIXUP_HALF(pte_wrprotecti));</div><div class='add'>+	return __pte(pte_val(pte) &amp; ~SRMMU_WRITE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static pte_t pte_mkclean(pte_t pte) __attribute_const__;</div><div class='ctx'> static inline pte_t pte_mkclean(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	return __pte(pte_val(pte) &amp; ~BTFIXUP_HALF(pte_mkcleani));</div><div class='add'>+	return __pte(pte_val(pte) &amp; ~SRMMU_DIRTY);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static pte_t pte_mkold(pte_t pte) __attribute_const__;</div><div class='ctx'> static inline pte_t pte_mkold(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	return __pte(pte_val(pte) &amp; ~BTFIXUP_HALF(pte_mkoldi));</div><div class='add'>+	return __pte(pte_val(pte) &amp; ~SRMMU_REF);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL_CONST(pte_t, pte_mkwrite, pte_t)</div><div class='del'>-BTFIXUPDEF_CALL_CONST(pte_t, pte_mkdirty, pte_t)</div><div class='del'>-BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t)</div><div class='add'>+static inline pte_t pte_mkwrite(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return __pte(pte_val(pte) | SRMMU_WRITE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline pte_t pte_mkdirty(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return __pte(pte_val(pte) | SRMMU_DIRTY);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#define pte_mkwrite(pte) BTFIXUP_CALL(pte_mkwrite)(pte)</div><div class='del'>-#define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte)</div><div class='del'>-#define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte)</div><div class='add'>+static inline pte_t pte_mkyoung(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return __pte(pte_val(pte) | SRMMU_REF);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define pte_mkspecial(pte)    (pte)</div><div class='ctx'> </div><div class='ctx'> #define pfn_pte(pfn, prot)		mk_pte(pfn_to_page(pfn), prot)</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(unsigned long,	 pte_pfn, pte_t)</div><div class='del'>-#define pte_pfn(pte) BTFIXUP_CALL(pte_pfn)(pte)</div><div class='add'>+static inline unsigned long pte_pfn(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	if (srmmu_device_memory(pte_val(pte))) {</div><div class='add'>+		/* Just return something that will cause</div><div class='add'>+		 * pfn_valid() to return false.  This makes</div><div class='add'>+		 * copy_one_pte() to just directly copy to</div><div class='add'>+		 * PTE over.</div><div class='add'>+		 */</div><div class='add'>+		return ~0UL;</div><div class='add'>+	}</div><div class='add'>+	return (pte_val(pte) &amp; SRMMU_PTE_PMASK) &gt;&gt; (PAGE_SHIFT-4);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define pte_page(pte)	pfn_to_page(pte_pfn(pte))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Conversion functions: convert a page and protection to a page entry,</div><div class='ctx'>  * and a page entry and page directory to the page they refer to.</div><div class='ctx'>  */</div><div class='del'>-BTFIXUPDEF_CALL_CONST(pte_t, mk_pte, struct page *, pgprot_t)</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_phys, unsigned long, pgprot_t)</div><div class='del'>-BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int)</div><div class='del'>-BTFIXUPDEF_CALL_CONST(pgprot_t, pgprot_noncached, pgprot_t)</div><div class='add'>+static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)</div><div class='add'>+{</div><div class='add'>+	return __pte((page_to_pfn(page) &lt;&lt; (PAGE_SHIFT-4)) | pgprot_val(pgprot));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#define mk_pte(page,pgprot) BTFIXUP_CALL(mk_pte)(page,pgprot)</div><div class='del'>-#define mk_pte_phys(page,pgprot) BTFIXUP_CALL(mk_pte_phys)(page,pgprot)</div><div class='del'>-#define mk_pte_io(page,pgprot,space) BTFIXUP_CALL(mk_pte_io)(page,pgprot,space)</div><div class='add'>+static inline pte_t mk_pte_phys(unsigned long page, pgprot_t pgprot)</div><div class='add'>+{</div><div class='add'>+	return __pte(((page) &gt;&gt; 4) | pgprot_val(pgprot));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#define pgprot_noncached(pgprot) BTFIXUP_CALL(pgprot_noncached)(pgprot)</div><div class='add'>+static inline pte_t mk_pte_io(unsigned long page, pgprot_t pgprot, int space)</div><div class='add'>+{</div><div class='add'>+	return __pte(((page) &gt;&gt; 4) | (space &lt;&lt; 28) | pgprot_val(pgprot));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_INT(pte_modify_mask)</div><div class='add'>+#define pgprot_noncached pgprot_noncached</div><div class='add'>+static inline pgprot_t pgprot_noncached(pgprot_t prot)</div><div class='add'>+{</div><div class='add'>+	prot &amp;= ~__pgprot(SRMMU_CACHE);</div><div class='add'>+	return prot;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__;</div><div class='ctx'> static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> {</div><div class='del'>-	return __pte((pte_val(pte) &amp; BTFIXUP_INT(pte_modify_mask)) |</div><div class='add'>+	return __pte((pte_val(pte) &amp; SRMMU_CHG_MASK) |</div><div class='ctx'> 		pgprot_val(newprot));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -294,74 +332,69 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> #define pgd_offset_k(address) pgd_offset(&amp;init_mm, address)</div><div class='ctx'> </div><div class='ctx'> /* Find an entry in the second-level page table.. */</div><div class='del'>-BTFIXUPDEF_CALL(pmd_t *, pmd_offset, pgd_t *, unsigned long)</div><div class='del'>-#define pmd_offset(dir,addr) BTFIXUP_CALL(pmd_offset)(dir,addr)</div><div class='add'>+static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)</div><div class='add'>+{</div><div class='add'>+	return (pmd_t *) pgd_page_vaddr(*dir) +</div><div class='add'>+		((address &gt;&gt; PMD_SHIFT) &amp; (PTRS_PER_PMD - 1));</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /* Find an entry in the third-level page table.. */</div><div class='del'>-BTFIXUPDEF_CALL(pte_t *, pte_offset_kernel, pmd_t *, unsigned long)</div><div class='del'>-#define pte_offset_kernel(dir,addr) BTFIXUP_CALL(pte_offset_kernel)(dir,addr)</div><div class='add'>+pte_t *pte_offset_kernel(pmd_t * dir, unsigned long address);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * This shortcut works on sun4m (and sun4d) because the nocache area is static,</div><div class='del'>- * and sun4c is guaranteed to have no highmem anyway.</div><div class='add'>+ * This shortcut works on sun4m (and sun4d) because the nocache area is static.</div><div class='ctx'>  */</div><div class='ctx'> #define pte_offset_map(d, a)		pte_offset_kernel(d,a)</div><div class='ctx'> #define pte_unmap(pte)		do{}while(0)</div><div class='ctx'> </div><div class='del'>-/* Certain architectures need to do special things when pte's</div><div class='del'>- * within a page table are directly modified.  Thus, the following</div><div class='del'>- * hook is made available.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_CALL(void, set_pte, pte_t *, pte_t)</div><div class='del'>-</div><div class='del'>-#define set_pte(ptep,pteval) BTFIXUP_CALL(set_pte)(ptep,pteval)</div><div class='del'>-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)</div><div class='del'>-</div><div class='ctx'> struct seq_file;</div><div class='del'>-BTFIXUPDEF_CALL(void, mmu_info, struct seq_file *)</div><div class='del'>-</div><div class='del'>-#define mmu_info(p) BTFIXUP_CALL(mmu_info)(p)</div><div class='add'>+void mmu_info(struct seq_file *m);</div><div class='ctx'> </div><div class='ctx'> /* Fault handler stuff... */</div><div class='ctx'> #define FAULT_CODE_PROT     0x1</div><div class='ctx'> #define FAULT_CODE_WRITE    0x2</div><div class='ctx'> #define FAULT_CODE_USER     0x4</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(void, update_mmu_cache, struct vm_area_struct *, unsigned long, pte_t *)</div><div class='del'>-</div><div class='del'>-#define update_mmu_cache(vma,addr,ptep) BTFIXUP_CALL(update_mmu_cache)(vma,addr,ptep)</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_CALL(void, sparc_mapiorange, unsigned int, unsigned long,</div><div class='del'>-    unsigned long, unsigned int)</div><div class='del'>-BTFIXUPDEF_CALL(void, sparc_unmapiorange, unsigned long, unsigned int)</div><div class='del'>-#define sparc_mapiorange(bus,pa,va,len) BTFIXUP_CALL(sparc_mapiorange)(bus,pa,va,len)</div><div class='del'>-#define sparc_unmapiorange(va,len) BTFIXUP_CALL(sparc_unmapiorange)(va,len)</div><div class='add'>+#define update_mmu_cache(vma, address, ptep) do { } while (0)</div><div class='ctx'> </div><div class='del'>-extern int invalid_segment;</div><div class='add'>+void srmmu_mapiorange(unsigned int bus, unsigned long xpa,</div><div class='add'>+                      unsigned long xva, unsigned int len);</div><div class='add'>+void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len);</div><div class='ctx'> </div><div class='ctx'> /* Encode and de-code a swap entry */</div><div class='del'>-BTFIXUPDEF_CALL(unsigned long, __swp_type, swp_entry_t)</div><div class='del'>-BTFIXUPDEF_CALL(unsigned long, __swp_offset, swp_entry_t)</div><div class='del'>-BTFIXUPDEF_CALL(swp_entry_t, __swp_entry, unsigned long, unsigned long)</div><div class='add'>+static inline unsigned long __swp_type(swp_entry_t entry)</div><div class='add'>+{</div><div class='add'>+	return (entry.val &gt;&gt; SRMMU_SWP_TYPE_SHIFT) &amp; SRMMU_SWP_TYPE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned long __swp_offset(swp_entry_t entry)</div><div class='add'>+{</div><div class='add'>+	return (entry.val &gt;&gt; SRMMU_SWP_OFF_SHIFT) &amp; SRMMU_SWP_OFF_MASK;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#define __swp_type(__x)			BTFIXUP_CALL(__swp_type)(__x)</div><div class='del'>-#define __swp_offset(__x)		BTFIXUP_CALL(__swp_offset)(__x)</div><div class='del'>-#define __swp_entry(__type,__off)	BTFIXUP_CALL(__swp_entry)(__type,__off)</div><div class='add'>+static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset)</div><div class='add'>+{</div><div class='add'>+	return (swp_entry_t) {</div><div class='add'>+		(type &amp; SRMMU_SWP_TYPE_MASK) &lt;&lt; SRMMU_SWP_TYPE_SHIFT</div><div class='add'>+		| (offset &amp; SRMMU_SWP_OFF_MASK) &lt;&lt; SRMMU_SWP_OFF_SHIFT };</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })</div><div class='ctx'> #define __swp_entry_to_pte(x)		((pte_t) { (x).val })</div><div class='ctx'> </div><div class='ctx'> /* file-offset-in-pte helpers */</div><div class='del'>-BTFIXUPDEF_CALL(unsigned long, pte_to_pgoff, pte_t pte);</div><div class='del'>-BTFIXUPDEF_CALL(pte_t, pgoff_to_pte, unsigned long pgoff);</div><div class='add'>+static inline unsigned long pte_to_pgoff(pte_t pte)</div><div class='add'>+{</div><div class='add'>+	return pte_val(pte) &gt;&gt; SRMMU_PTE_FILE_SHIFT;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#define pte_to_pgoff(pte) BTFIXUP_CALL(pte_to_pgoff)(pte)</div><div class='del'>-#define pgoff_to_pte(off) BTFIXUP_CALL(pgoff_to_pte)(off)</div><div class='add'>+static inline pte_t pgoff_to_pte(unsigned long pgoff)</div><div class='add'>+{</div><div class='add'>+	return __pte((pgoff &lt;&lt; SRMMU_PTE_FILE_SHIFT) | SRMMU_FILE);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This is made a constant because mm/fremap.c required a constant.</div><div class='del'>- * Note that layout of these bits is different between sun4c.c and srmmu.c.</div><div class='ctx'>  */</div><div class='ctx'> #define PTE_FILE_MAX_BITS 24</div><div class='ctx'> </div><div class='hunk'>@@ -399,9 +432,6 @@ static inline unsigned long</div><div class='ctx'> __get_phys (unsigned long addr)</div><div class='ctx'> {</div><div class='ctx'> 	switch (sparc_cpu_model){</div><div class='del'>-	case sun4:</div><div class='del'>-	case sun4c:</div><div class='del'>-		return sun4c_get_pte (addr) &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> 	case sun4m:</div><div class='ctx'> 	case sun4d:</div><div class='ctx'> 		return ((srmmu_get_pte (addr) &amp; 0xffffff00) &lt;&lt; 4);</div><div class='hunk'>@@ -414,9 +444,6 @@ static inline int</div><div class='ctx'> __get_iospace (unsigned long addr)</div><div class='ctx'> {</div><div class='ctx'> 	switch (sparc_cpu_model){</div><div class='del'>-	case sun4:</div><div class='del'>-	case sun4c:</div><div class='del'>-		return -1; /* Don't check iospace on sun4c */</div><div class='ctx'> 	case sun4m:</div><div class='ctx'> 	case sun4d:</div><div class='ctx'> 		return (srmmu_get_pte (addr) &gt;&gt; 28);</div><div class='hunk'>@@ -463,7 +490,7 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma,</div><div class='ctx'> 		set_pte_at((__vma)-&gt;vm_mm, (__address), __ptep, __entry); \</div><div class='ctx'> 		flush_tlb_page(__vma, __address);			  \</div><div class='ctx'> 	}								  \</div><div class='del'>-	(sparc_cpu_model == sun4c) || __changed;			  \</div><div class='add'>+	__changed;							  \</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/pgtable.h&gt;</div><div class='hunk'>@@ -471,10 +498,8 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma,</div><div class='ctx'> #endif /* !(__ASSEMBLY__) */</div><div class='ctx'> </div><div class='ctx'> #define VMALLOC_START           _AC(0xfe600000,UL)</div><div class='del'>-/* XXX Alter this when I get around to fixing sun4c - Anton */</div><div class='ctx'> #define VMALLOC_END             _AC(0xffc00000,UL)</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /* We provide our own get_unmapped_area to cope with VA holes for userland */</div><div class='ctx'> #define HAVE_ARCH_UNMAPPED_AREA</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h<br/>index 76e4a52aa85e..61210db139fb 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/pgtable_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/pgtable_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/pgtable_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/pgtable_64.h</a></div><div class='hunk'>@@ -717,10 +717,6 @@ extern unsigned long find_ecache_flush_span(unsigned long size);</div><div class='ctx'> struct seq_file;</div><div class='ctx'> extern void mmu_info(struct seq_file *);</div><div class='ctx'> </div><div class='del'>-/* These do nothing with the way I have things setup. */</div><div class='del'>-#define mmu_lockarea(vaddr, len)		(vaddr)</div><div class='del'>-#define mmu_unlockarea(vaddr, len)		do { } while(0)</div><div class='del'>-</div><div class='ctx'> struct vm_area_struct;</div><div class='ctx'> extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/pgtsrmmu.h b/arch/sparc/include/asm/pgtsrmmu.h<br/>index f6ae2b2b6870..79da17866fa8 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/pgtsrmmu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/pgtsrmmu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/pgtsrmmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/pgtsrmmu.h</a></div><div class='hunk'>@@ -139,6 +139,7 @@</div><div class='ctx'> 	 restore %g0, %g0, %g0;</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='add'>+extern unsigned long last_valid_pfn;</div><div class='ctx'> </div><div class='ctx'> /* This makes sense. Honest it does - Anton */</div><div class='ctx'> /* XXX Yes but it's ugly as sin.  FIXME. -KMW */</div><div class='hunk'>@@ -148,78 +149,13 @@ extern void *srmmu_nocache_pool;</div><div class='ctx'> #define __nocache_fix(VADDR) __va(__nocache_pa(VADDR))</div><div class='ctx'> </div><div class='ctx'> /* Accessing the MMU control register. */</div><div class='del'>-static inline unsigned int srmmu_get_mmureg(void)</div><div class='del'>-{</div><div class='del'>-        unsigned int retval;</div><div class='del'>-	__asm__ __volatile__("lda [%%g0] %1, %0\n\t" :</div><div class='del'>-			     "=r" (retval) :</div><div class='del'>-			     "i" (ASI_M_MMUREGS));</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void srmmu_set_mmureg(unsigned long regval)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("sta %0, [%%g0] %1\n\t" : :</div><div class='del'>-			     "r" (regval), "i" (ASI_M_MMUREGS) : "memory");</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void srmmu_set_ctable_ptr(unsigned long paddr)</div><div class='del'>-{</div><div class='del'>-	paddr = ((paddr &gt;&gt; 4) &amp; SRMMU_CTX_PMASK);</div><div class='del'>-	__asm__ __volatile__("sta %0, [%1] %2\n\t" : :</div><div class='del'>-			     "r" (paddr), "r" (SRMMU_CTXTBL_PTR),</div><div class='del'>-			     "i" (ASI_M_MMUREGS) :</div><div class='del'>-			     "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned long srmmu_get_ctable_ptr(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int retval;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__("lda [%1] %2, %0\n\t" :</div><div class='del'>-			     "=r" (retval) :</div><div class='del'>-			     "r" (SRMMU_CTXTBL_PTR),</div><div class='del'>-			     "i" (ASI_M_MMUREGS));</div><div class='del'>-	return (retval &amp; SRMMU_CTX_PMASK) &lt;&lt; 4;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void srmmu_set_context(int context)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("sta %0, [%1] %2\n\t" : :</div><div class='del'>-			     "r" (context), "r" (SRMMU_CTX_REG),</div><div class='del'>-			     "i" (ASI_M_MMUREGS) : "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int srmmu_get_context(void)</div><div class='del'>-{</div><div class='del'>-	register int retval;</div><div class='del'>-	__asm__ __volatile__("lda [%1] %2, %0\n\t" :</div><div class='del'>-			     "=r" (retval) :</div><div class='del'>-			     "r" (SRMMU_CTX_REG),</div><div class='del'>-			     "i" (ASI_M_MMUREGS));</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int srmmu_get_fstatus(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int retval;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__("lda [%1] %2, %0\n\t" :</div><div class='del'>-			     "=r" (retval) :</div><div class='del'>-			     "r" (SRMMU_FAULT_STATUS), "i" (ASI_M_MMUREGS));</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int srmmu_get_faddr(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int retval;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__("lda [%1] %2, %0\n\t" :</div><div class='del'>-			     "=r" (retval) :</div><div class='del'>-			     "r" (SRMMU_FAULT_ADDR), "i" (ASI_M_MMUREGS));</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='add'>+unsigned int srmmu_get_mmureg(void);</div><div class='add'>+void srmmu_set_mmureg(unsigned long regval);</div><div class='add'>+void srmmu_set_ctable_ptr(unsigned long paddr);</div><div class='add'>+void srmmu_set_context(int context);</div><div class='add'>+int srmmu_get_context(void);</div><div class='add'>+unsigned int srmmu_get_fstatus(void);</div><div class='add'>+unsigned int srmmu_get_faddr(void);</div><div class='ctx'> </div><div class='ctx'> /* This is guaranteed on all SRMMU's. */</div><div class='ctx'> static inline void srmmu_flush_whole_tlb(void)</div><div class='hunk'>@@ -230,59 +166,6 @@ static inline void srmmu_flush_whole_tlb(void)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* These flush types are not available on all chips... */</div><div class='del'>-static inline void srmmu_flush_tlb_ctx(void)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%0] %1\n\t": :</div><div class='del'>-			     "r" (0x300),        /* Flush TLB ctx.. */</div><div class='del'>-			     "i" (ASI_M_FLUSH_PROBE) : "memory");</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void srmmu_flush_tlb_region(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	addr &amp;= SRMMU_PGDIR_MASK;</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%0] %1\n\t": :</div><div class='del'>-			     "r" (addr | 0x200), /* Flush TLB region.. */</div><div class='del'>-			     "i" (ASI_M_FLUSH_PROBE) : "memory");</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static inline void srmmu_flush_tlb_segment(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	addr &amp;= SRMMU_REAL_PMD_MASK;</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%0] %1\n\t": :</div><div class='del'>-			     "r" (addr | 0x100), /* Flush TLB segment.. */</div><div class='del'>-			     "i" (ASI_M_FLUSH_PROBE) : "memory");</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void srmmu_flush_tlb_page(unsigned long page)</div><div class='del'>-{</div><div class='del'>-	page &amp;= PAGE_MASK;</div><div class='del'>-	__asm__ __volatile__("sta %%g0, [%0] %1\n\t": :</div><div class='del'>-			     "r" (page),        /* Flush TLB page.. */</div><div class='del'>-			     "i" (ASI_M_FLUSH_PROBE) : "memory");</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_SPARC_LEON</div><div class='del'>-static inline unsigned long srmmu_hwprobe(unsigned long vaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long retval;</div><div class='del'>-</div><div class='del'>-	vaddr &amp;= PAGE_MASK;</div><div class='del'>-	__asm__ __volatile__("lda [%1] %2, %0\n\t" :</div><div class='del'>-			     "=r" (retval) :</div><div class='del'>-			     "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE));</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-#define srmmu_hwprobe(addr) srmmu_swprobe(addr, 0)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static inline int</div><div class='ctx'> srmmu_get_pte (unsigned long addr)</div><div class='ctx'> {</div><div class='hunk'>@@ -294,9 +177,6 @@ srmmu_get_pte (unsigned long addr)</div><div class='ctx'> 	return entry;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern unsigned long (*srmmu_read_physical)(unsigned long paddr);</div><div class='del'>-extern void (*srmmu_write_physical)(unsigned long paddr, unsigned long word);</div><div class='del'>-</div><div class='ctx'> #endif /* !(__ASSEMBLY__) */</div><div class='ctx'> </div><div class='ctx'> #endif /* !(_SPARC_PGTSRMMU_H) */</div><div class='head'>diff --git a/arch/sparc/include/asm/pgtsun4c.h b/arch/sparc/include/asm/pgtsun4c.h<br/>deleted file mode 100644<br/>index aeb25e912179..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/pgtsun4c.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/pgtsun4c.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,172 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * pgtsun4c.h:  Sun4c specific pgtable.h defines and code.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)</div><div class='del'>- */</div><div class='del'>-#ifndef _SPARC_PGTSUN4C_H</div><div class='del'>-#define _SPARC_PGTSUN4C_H</div><div class='del'>-</div><div class='del'>-#include &lt;asm/contregs.h&gt;</div><div class='del'>-</div><div class='del'>-/* PMD_SHIFT determines the size of the area a second-level page table can map */</div><div class='del'>-#define SUN4C_PMD_SHIFT       22</div><div class='del'>-</div><div class='del'>-/* PGDIR_SHIFT determines what a third-level page table entry can map */</div><div class='del'>-#define SUN4C_PGDIR_SHIFT       22</div><div class='del'>-#define SUN4C_PGDIR_SIZE        (1UL &lt;&lt; SUN4C_PGDIR_SHIFT)</div><div class='del'>-#define SUN4C_PGDIR_MASK        (~(SUN4C_PGDIR_SIZE-1))</div><div class='del'>-#define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&amp;SUN4C_PGDIR_MASK)</div><div class='del'>-</div><div class='del'>-/* To represent how the sun4c mmu really lays things out. */</div><div class='del'>-#define SUN4C_REAL_PGDIR_SHIFT       18</div><div class='del'>-#define SUN4C_REAL_PGDIR_SIZE        (1UL &lt;&lt; SUN4C_REAL_PGDIR_SHIFT)</div><div class='del'>-#define SUN4C_REAL_PGDIR_MASK        (~(SUN4C_REAL_PGDIR_SIZE-1))</div><div class='del'>-#define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&amp;SUN4C_REAL_PGDIR_MASK)</div><div class='del'>-</div><div class='del'>-/* 16 bit PFN on sun4c */</div><div class='del'>-#define SUN4C_PFN_MASK 0xffff</div><div class='del'>-</div><div class='del'>-/* Don't increase these unless the structures in sun4c.c are fixed */</div><div class='del'>-#define SUN4C_MAX_SEGMAPS 256</div><div class='del'>-#define SUN4C_MAX_CONTEXTS 16</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * To be efficient, and not have to worry about allocating such</div><div class='del'>- * a huge pgd, we make the kernel sun4c tables each hold 1024</div><div class='del'>- * entries and the pgd similarly just like the i386 tables.</div><div class='del'>- */</div><div class='del'>-#define SUN4C_PTRS_PER_PTE    1024</div><div class='del'>-#define SUN4C_PTRS_PER_PMD    1</div><div class='del'>-#define SUN4C_PTRS_PER_PGD    1024</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Sparc SUN4C pte fields.</div><div class='del'>- */</div><div class='del'>-#define _SUN4C_PAGE_VALID        0x80000000</div><div class='del'>-#define _SUN4C_PAGE_SILENT_READ  0x80000000   /* synonym */</div><div class='del'>-#define _SUN4C_PAGE_DIRTY        0x40000000</div><div class='del'>-#define _SUN4C_PAGE_SILENT_WRITE 0x40000000   /* synonym */</div><div class='del'>-#define _SUN4C_PAGE_PRIV         0x20000000   /* privileged page */</div><div class='del'>-#define _SUN4C_PAGE_NOCACHE      0x10000000   /* non-cacheable page */</div><div class='del'>-#define _SUN4C_PAGE_PRESENT      0x08000000   /* implemented in software */</div><div class='del'>-#define _SUN4C_PAGE_IO           0x04000000   /* I/O page */</div><div class='del'>-#define _SUN4C_PAGE_FILE         0x02000000   /* implemented in software */</div><div class='del'>-#define _SUN4C_PAGE_READ         0x00800000   /* implemented in software */</div><div class='del'>-#define _SUN4C_PAGE_WRITE        0x00400000   /* implemented in software */</div><div class='del'>-#define _SUN4C_PAGE_ACCESSED     0x00200000   /* implemented in software */</div><div class='del'>-#define _SUN4C_PAGE_MODIFIED     0x00100000   /* implemented in software */</div><div class='del'>-</div><div class='del'>-#define _SUN4C_READABLE		(_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\</div><div class='del'>-				 _SUN4C_PAGE_ACCESSED)</div><div class='del'>-#define _SUN4C_WRITEABLE	(_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\</div><div class='del'>-				 _SUN4C_PAGE_MODIFIED)</div><div class='del'>-</div><div class='del'>-#define _SUN4C_PAGE_CHG_MASK	(0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED)</div><div class='del'>-</div><div class='del'>-#define SUN4C_PAGE_NONE		__pgprot(_SUN4C_PAGE_PRESENT)</div><div class='del'>-#define SUN4C_PAGE_SHARED	__pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\</div><div class='del'>-					 _SUN4C_PAGE_WRITE)</div><div class='del'>-#define SUN4C_PAGE_COPY		__pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE)</div><div class='del'>-#define SUN4C_PAGE_READONLY	__pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE)</div><div class='del'>-#define SUN4C_PAGE_KERNEL	__pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\</div><div class='del'>-					 _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV)</div><div class='del'>-</div><div class='del'>-/* SUN4C swap entry encoding</div><div class='del'>- *</div><div class='del'>- * We use 5 bits for the type and 19 for the offset.  This gives us</div><div class='del'>- * 32 swapfiles of 4GB each.  Encoding looks like:</div><div class='del'>- *</div><div class='del'>- * RRRRRRRRooooooooooooooooooottttt</div><div class='del'>- * fedcba9876543210fedcba9876543210</div><div class='del'>- *</div><div class='del'>- * The top 8 bits are reserved for protection and status bits, especially</div><div class='del'>- * FILE and PRESENT.</div><div class='del'>- */</div><div class='del'>-#define SUN4C_SWP_TYPE_MASK	0x1f</div><div class='del'>-#define SUN4C_SWP_OFF_MASK	0x7ffff</div><div class='del'>-#define SUN4C_SWP_OFF_SHIFT	5</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-static inline unsigned long sun4c_get_synchronous_error(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long sync_err;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__("lda [%1] %2, %0\n\t" :</div><div class='del'>-			     "=r" (sync_err) :</div><div class='del'>-			     "r" (AC_SYNC_ERR), "i" (ASI_CONTROL));</div><div class='del'>-	return sync_err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned long sun4c_get_synchronous_address(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long sync_addr;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__("lda [%1] %2, %0\n\t" :</div><div class='del'>-			     "=r" (sync_addr) :</div><div class='del'>-			     "r" (AC_SYNC_VA), "i" (ASI_CONTROL));</div><div class='del'>-	return sync_addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* SUN4C pte, segmap, and context manipulation */</div><div class='del'>-static inline unsigned long sun4c_get_segmap(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-  register unsigned long entry;</div><div class='del'>-</div><div class='del'>-  __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" : </div><div class='del'>-		       "=r" (entry) :</div><div class='del'>-		       "r" (addr), "i" (ASI_SEGMAP));</div><div class='del'>-</div><div class='del'>-  return entry;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void sun4c_put_segmap(unsigned long addr, unsigned long entry)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-  __asm__ __volatile__("\n\tstba %1, [%0] %2; nop; nop; nop;\n\t" : :</div><div class='del'>-		       "r" (addr), "r" (entry),</div><div class='del'>-		       "i" (ASI_SEGMAP)</div><div class='del'>-		       : "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned long sun4c_get_pte(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-  register unsigned long entry;</div><div class='del'>-</div><div class='del'>-  __asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" : </div><div class='del'>-		       "=r" (entry) :</div><div class='del'>-		       "r" (addr), "i" (ASI_PTE));</div><div class='del'>-  return entry;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void sun4c_put_pte(unsigned long addr, unsigned long entry)</div><div class='del'>-{</div><div class='del'>-  __asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : :</div><div class='del'>-		       "r" (addr), </div><div class='del'>-		       "r" ((entry &amp; ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE)</div><div class='del'>-		       : "memory");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int sun4c_get_context(void)</div><div class='del'>-{</div><div class='del'>-  register int ctx;</div><div class='del'>-</div><div class='del'>-  __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" :</div><div class='del'>-		       "=r" (ctx) :</div><div class='del'>-		       "r" (AC_CONTEXT), "i" (ASI_CONTROL));</div><div class='del'>-</div><div class='del'>-  return ctx;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int sun4c_set_context(int ctx)</div><div class='del'>-{</div><div class='del'>-  __asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : :</div><div class='del'>-		       "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL)</div><div class='del'>-		       : "memory");</div><div class='del'>-</div><div class='del'>-  return ctx;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* !(__ASSEMBLY__) */</div><div class='del'>-</div><div class='del'>-#endif /* !(_SPARC_PGTSUN4C_H) */</div><div class='head'>diff --git a/arch/sparc/include/asm/posix_types.h b/arch/sparc/include/asm/posix_types.h<br/>index 3070f25ae90a..156220ed99eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/posix_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/posix_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/posix_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/posix_types.h</a></div><div class='hunk'>@@ -9,8 +9,6 @@</div><div class='ctx'> </div><div class='ctx'> #if defined(__sparc__) &amp;&amp; defined(__arch64__)</div><div class='ctx'> /* sparc 64 bit */</div><div class='del'>-typedef unsigned int           __kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='ctx'> </div><div class='ctx'> typedef unsigned short 	       __kernel_old_uid_t;</div><div class='ctx'> typedef unsigned short         __kernel_old_gid_t;</div><div class='hunk'>@@ -38,9 +36,6 @@ typedef unsigned short         __kernel_gid_t;</div><div class='ctx'> typedef unsigned short         __kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='ctx'> </div><div class='del'>-typedef short                  __kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef long                   __kernel_daddr_t;</div><div class='ctx'> #define __kernel_daddr_t __kernel_daddr_t</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/processor_32.h b/arch/sparc/include/asm/processor_32.h<br/>index 09521c6a5edb..f74ac9ee33a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/processor_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/processor_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/processor_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/processor_32.h</a></div><div class='hunk'>@@ -16,7 +16,6 @@</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/head.h&gt;</div><div class='ctx'> #include &lt;asm/signal.h&gt;</div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -109,9 +108,6 @@ static inline void start_thread(struct pt_regs * regs, unsigned long pc,</div><div class='ctx'> #define release_thread(tsk)		do { } while(0)</div><div class='ctx'> extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> extern unsigned long get_wchan(struct task_struct *);</div><div class='ctx'> </div><div class='ctx'> #define task_pt_regs(tsk) ((tsk)-&gt;thread.kregs)</div><div class='head'>diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h<br/>index e713db249931..4e5a483122a0 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/processor_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/processor_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/processor_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/processor_64.h</a></div><div class='hunk'>@@ -42,7 +42,9 @@</div><div class='ctx'> #define TASK_SIZE_OF(tsk) \</div><div class='ctx'> 	(test_tsk_thread_flag(tsk,TIF_32BIT) ? \</div><div class='ctx'> 	 (1UL &lt;&lt; 32UL) : ((unsigned long)-VPTE_SIZE))</div><div class='del'>-#define TASK_SIZE	TASK_SIZE_OF(current)</div><div class='add'>+#define TASK_SIZE \</div><div class='add'>+	(test_thread_flag(TIF_32BIT) ? \</div><div class='add'>+	 (1UL &lt;&lt; 32UL) : ((unsigned long)-VPTE_SIZE))</div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='ctx'> #define STACK_TOP32	((1UL &lt;&lt; 32UL) - PAGE_SIZE)</div><div class='hunk'>@@ -186,9 +188,6 @@ do { \</div><div class='ctx'> /* Free all resources held by a thread. */</div><div class='ctx'> #define release_thread(tsk)		do { } while (0)</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);</div><div class='ctx'> </div><div class='ctx'> extern unsigned long get_wchan(struct task_struct *task);</div><div class='head'>diff --git a/arch/sparc/include/asm/psr.h b/arch/sparc/include/asm/psr.h<br/>index b8c0e5f0a66b..cee7ed9c927d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/psr.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/psr.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/psr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/psr.h</a></div><div class='hunk'>@@ -35,6 +35,14 @@</div><div class='ctx'> #define PSR_VERS    0x0f000000         /* cpu-version field          */</div><div class='ctx'> #define PSR_IMPL    0xf0000000         /* cpu-implementation field   */</div><div class='ctx'> </div><div class='add'>+#define PSR_VERS_SHIFT		24</div><div class='add'>+#define PSR_IMPL_SHIFT		28</div><div class='add'>+#define PSR_VERS_SHIFTED_MASK	0xf</div><div class='add'>+#define PSR_IMPL_SHIFTED_MASK	0xf</div><div class='add'>+</div><div class='add'>+#define PSR_IMPL_TI		0x4</div><div class='add'>+#define PSR_IMPL_LEON		0xf</div><div class='add'>+</div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='head'>diff --git a/arch/sparc/include/asm/sections.h b/arch/sparc/include/asm/sections.h<br/>index 0b0553bbd8a0..f300d1a9b2b6 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/sections.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/sections.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/sections.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/sections.h</a></div><div class='hunk'>@@ -7,4 +7,7 @@</div><div class='ctx'> /* sparc entry point */</div><div class='ctx'> extern char _start[];</div><div class='ctx'> </div><div class='add'>+extern char __leon_1insn_patch[];</div><div class='add'>+extern char __leon_1insn_patch_end[];</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/sparc/include/asm/setup.h b/arch/sparc/include/asm/setup.h<br/>index 00497abec996..8a83699a5507 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/setup.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/setup.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/setup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/setup.h</a></div><div class='hunk'>@@ -20,10 +20,7 @@ extern char reboot_command[];</div><div class='ctx'>  * Only sun4d + leon may have boot_cpu_id != 0</div><div class='ctx'>  */</div><div class='ctx'> extern unsigned char boot_cpu_id;</div><div class='del'>-extern unsigned char boot_cpu_id4;</div><div class='ctx'> </div><div class='del'>-extern unsigned long empty_bad_page;</div><div class='del'>-extern unsigned long empty_bad_page_table;</div><div class='ctx'> extern unsigned long empty_zero_page;</div><div class='ctx'> </div><div class='ctx'> extern int serial_console;</div><div class='head'>diff --git a/arch/sparc/include/asm/shmparam_32.h b/arch/sparc/include/asm/shmparam_32.h<br/>index 59a1243c12f3..142825c8d3ac 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/shmparam_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/shmparam_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/shmparam_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/shmparam_32.h</a></div><div class='hunk'>@@ -4,8 +4,6 @@</div><div class='ctx'> #define __ARCH_FORCE_SHMLBA 	1</div><div class='ctx'> </div><div class='ctx'> extern int vac_cache_size;</div><div class='del'>-#define SHMLBA (vac_cache_size ? vac_cache_size : \</div><div class='del'>-		(sparc_cpu_model == sun4c ? (64 * 1024) : \</div><div class='del'>-		 (sparc_cpu_model == sun4 ? (128 * 1024) : PAGE_SIZE)))</div><div class='add'>+#define SHMLBA (vac_cache_size ? vac_cache_size : PAGE_SIZE)</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASMSPARC_SHMPARAM_H */</div><div class='head'>diff --git a/arch/sparc/include/asm/smp_32.h b/arch/sparc/include/asm/smp_32.h<br/>index 01c51c704341..b73da3c5f10a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/smp_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/smp_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/smp_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/smp_32.h</a></div><div class='hunk'>@@ -8,7 +8,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/threads.h&gt;</div><div class='ctx'> #include &lt;asm/head.h&gt;</div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='hunk'>@@ -58,104 +57,53 @@ struct seq_file;</div><div class='ctx'> void smp_bogo(struct seq_file *);</div><div class='ctx'> void smp_info(struct seq_file *);</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, cpumask_t, unsigned long, unsigned long, unsigned long, unsigned long)</div><div class='del'>-BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void)</div><div class='del'>-BTFIXUPDEF_CALL(void, smp_ipi_resched, int);</div><div class='del'>-BTFIXUPDEF_CALL(void, smp_ipi_single, int);</div><div class='del'>-BTFIXUPDEF_CALL(void, smp_ipi_mask_one, int);</div><div class='del'>-BTFIXUPDEF_BLACKBOX(hard_smp_processor_id)</div><div class='del'>-BTFIXUPDEF_BLACKBOX(load_current)</div><div class='del'>-</div><div class='del'>-#define smp_cross_call(func,mask,arg1,arg2,arg3,arg4) BTFIXUP_CALL(smp_cross_call)(func,mask,arg1,arg2,arg3,arg4)</div><div class='add'>+struct sparc32_ipi_ops {</div><div class='add'>+	void (*cross_call)(smpfunc_t func, cpumask_t mask, unsigned long arg1,</div><div class='add'>+			   unsigned long arg2, unsigned long arg3,</div><div class='add'>+			   unsigned long arg4);</div><div class='add'>+	void (*resched)(int cpu);</div><div class='add'>+	void (*single)(int cpu);</div><div class='add'>+	void (*mask_one)(int cpu);</div><div class='add'>+};</div><div class='add'>+extern const struct sparc32_ipi_ops *sparc32_ipi_ops;</div><div class='add'>+</div><div class='add'>+static inline void xc0(smpfunc_t func)</div><div class='add'>+{</div><div class='add'>+	sparc32_ipi_ops-&gt;cross_call(func, *cpu_online_mask, 0, 0, 0, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static inline void xc0(smpfunc_t func) { smp_cross_call(func, *cpu_online_mask, 0, 0, 0, 0); }</div><div class='ctx'> static inline void xc1(smpfunc_t func, unsigned long arg1)</div><div class='del'>-{ smp_cross_call(func, *cpu_online_mask, arg1, 0, 0, 0); }</div><div class='del'>-static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)</div><div class='del'>-{ smp_cross_call(func, *cpu_online_mask, arg1, arg2, 0, 0); }</div><div class='del'>-static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,</div><div class='del'>-			   unsigned long arg3)</div><div class='del'>-{ smp_cross_call(func, *cpu_online_mask, arg1, arg2, arg3, 0); }</div><div class='del'>-static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,</div><div class='del'>-			   unsigned long arg3, unsigned long arg4)</div><div class='del'>-{ smp_cross_call(func, *cpu_online_mask, arg1, arg2, arg3, arg4); }</div><div class='del'>-</div><div class='del'>-extern void arch_send_call_function_single_ipi(int cpu);</div><div class='del'>-extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);</div><div class='del'>-</div><div class='del'>-static inline int cpu_logical_map(int cpu)</div><div class='ctx'> {</div><div class='del'>-	return cpu;</div><div class='add'>+	sparc32_ipi_ops-&gt;cross_call(func, *cpu_online_mask, arg1, 0, 0, 0);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static inline int hard_smp4m_processor_id(void)</div><div class='add'>+static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)</div><div class='ctx'> {</div><div class='del'>-	int cpuid;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__("rd %%tbr, %0\n\t"</div><div class='del'>-			     "srl %0, 12, %0\n\t"</div><div class='del'>-			     "and %0, 3, %0\n\t" :</div><div class='del'>-			     "=&amp;r" (cpuid));</div><div class='del'>-	return cpuid;</div><div class='add'>+	sparc32_ipi_ops-&gt;cross_call(func, *cpu_online_mask, arg1, arg2, 0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int hard_smp4d_processor_id(void)</div><div class='add'>+static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,</div><div class='add'>+		       unsigned long arg3)</div><div class='ctx'> {</div><div class='del'>-	int cpuid;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__("lda [%%g0] %1, %0\n\t" :</div><div class='del'>-			     "=&amp;r" (cpuid) : "i" (ASI_M_VIKING_TMP1));</div><div class='del'>-	return cpuid;</div><div class='add'>+	sparc32_ipi_ops-&gt;cross_call(func, *cpu_online_mask,</div><div class='add'>+				    arg1, arg2, arg3, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern inline int hard_smpleon_processor_id(void)</div><div class='add'>+static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,</div><div class='add'>+		       unsigned long arg3, unsigned long arg4)</div><div class='ctx'> {</div><div class='del'>-	int cpuid;</div><div class='del'>-	__asm__ __volatile__("rd     %%asr17,%0\n\t"</div><div class='del'>-			     "srl    %0,28,%0" :</div><div class='del'>-			     "=&amp;r" (cpuid) : );</div><div class='del'>-	return cpuid;</div><div class='add'>+	sparc32_ipi_ops-&gt;cross_call(func, *cpu_online_mask,</div><div class='add'>+				    arg1, arg2, arg3, arg4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifndef MODULE</div><div class='del'>-static inline int hard_smp_processor_id(void)</div><div class='add'>+extern void arch_send_call_function_single_ipi(int cpu);</div><div class='add'>+extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);</div><div class='add'>+</div><div class='add'>+static inline int cpu_logical_map(int cpu)</div><div class='ctx'> {</div><div class='del'>-	int cpuid;</div><div class='del'>-</div><div class='del'>-	/* Black box - sun4m</div><div class='del'>-		__asm__ __volatile__("rd %%tbr, %0\n\t"</div><div class='del'>-				     "srl %0, 12, %0\n\t"</div><div class='del'>-				     "and %0, 3, %0\n\t" :</div><div class='del'>-				     "=&amp;r" (cpuid));</div><div class='del'>-	             - sun4d</div><div class='del'>-		__asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t"</div><div class='del'>-				     "nop; nop" :</div><div class='del'>-				     "=&amp;r" (cpuid));</div><div class='del'>-		     - leon</div><div class='del'>-		__asm__ __volatile__(	"rd %asr17, %0\n\t"</div><div class='del'>-					"srl %0, 0x1c, %0\n\t"</div><div class='del'>-					"nop\n\t" :</div><div class='del'>-					"=&amp;r" (cpuid));</div><div class='del'>-	   See btfixup.h and btfixupprep.c to understand how a blackbox works.</div><div class='del'>-	 */</div><div class='del'>-	__asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t"</div><div class='del'>-			     "sethi %%hi(boot_cpu_id), %0\n\t"</div><div class='del'>-			     "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" :</div><div class='del'>-			     "=&amp;r" (cpuid));</div><div class='del'>-	return cpuid;</div><div class='add'>+	return cpu;</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-static inline int hard_smp_processor_id(void)</div><div class='del'>-{</div><div class='del'>-	int cpuid;</div><div class='ctx'> </div><div class='del'>-	__asm__ __volatile__("mov %%o7, %%g1\n\t"</div><div class='del'>-			     "call ___f___hard_smp_processor_id\n\t"</div><div class='del'>-			     " nop\n\t"</div><div class='del'>-			     "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2");</div><div class='del'>-	return cpuid;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='add'>+extern int hard_smp_processor_id(void);</div><div class='ctx'> </div><div class='ctx'> #define raw_smp_processor_id()		(current_thread_info()-&gt;cpu)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/smpprim.h b/arch/sparc/include/asm/smpprim.h<br/>deleted file mode 100644<br/>index eb849d862c64..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/smpprim.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/smpprim.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,54 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  smpprim.h:  SMP locking primitives on the Sparc</div><div class='del'>- *</div><div class='del'>- *  God knows we won't be actually using this code for some time</div><div class='del'>- *  but I thought I'd write it since I knew how.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __SPARC_SMPPRIM_H</div><div class='del'>-#define __SPARC_SMPPRIM_H</div><div class='del'>-</div><div class='del'>-/* Test and set the unsigned byte at ADDR to 1.  Returns the previous</div><div class='del'>- * value.  On the Sparc we use the ldstub instruction since it is</div><div class='del'>- * atomic.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline __volatile__ char test_and_set(void *addr)</div><div class='del'>-{</div><div class='del'>-	char state = 0;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__("ldstub [%0], %1         ! test_and_set\n\t"</div><div class='del'>-			     "=r" (addr), "=r" (state) :</div><div class='del'>-			     "0" (addr), "1" (state) : "memory");</div><div class='del'>-</div><div class='del'>-	return state;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Initialize a spin-lock. */</div><div class='del'>-static inline __volatile__ smp_initlock(void *spinlock)</div><div class='del'>-{</div><div class='del'>-	/* Unset the lock. */</div><div class='del'>-	*((unsigned char *) spinlock) = 0;</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* This routine spins until it acquires the lock at ADDR. */</div><div class='del'>-static inline __volatile__ smp_lock(void *addr)</div><div class='del'>-{</div><div class='del'>-	while(test_and_set(addr) == 0xff)</div><div class='del'>-		;</div><div class='del'>-</div><div class='del'>-	/* We now have the lock */</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* This routine releases the lock at ADDR. */</div><div class='del'>-static inline __volatile__ smp_unlock(void *addr)</div><div class='del'>-{</div><div class='del'>-	*((unsigned char *) addr) = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* !(__SPARC_SMPPRIM_H) */</div><div class='head'>diff --git a/arch/sparc/include/asm/string_32.h b/arch/sparc/include/asm/string_32.h<br/>index edf196ee4ef8..12f67857152e 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/string_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/string_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/string_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/string_32.h</a></div><div class='hunk'>@@ -61,68 +61,7 @@ extern int memcmp(const void *,const void *,__kernel_size_t);</div><div class='ctx'> extern __kernel_size_t strlen(const char *);</div><div class='ctx'> </div><div class='ctx'> #define __HAVE_ARCH_STRNCMP</div><div class='del'>-</div><div class='del'>-extern int __strncmp(const char *, const char *, __kernel_size_t);</div><div class='del'>-</div><div class='del'>-static inline int __constant_strncmp(const char *src, const char *dest, __kernel_size_t count)</div><div class='del'>-{</div><div class='del'>-	register int retval;</div><div class='del'>-	switch(count) {</div><div class='del'>-	case 0: return 0;</div><div class='del'>-	case 1: return (src[0] - dest[0]);</div><div class='del'>-	case 2: retval = (src[0] - dest[0]);</div><div class='del'>-		if(!retval &amp;&amp; src[0])</div><div class='del'>-		  retval = (src[1] - dest[1]);</div><div class='del'>-		return retval;</div><div class='del'>-	case 3: retval = (src[0] - dest[0]);</div><div class='del'>-		if(!retval &amp;&amp; src[0]) {</div><div class='del'>-		  retval = (src[1] - dest[1]);</div><div class='del'>-		  if(!retval &amp;&amp; src[1])</div><div class='del'>-		    retval = (src[2] - dest[2]);</div><div class='del'>-		}</div><div class='del'>-		return retval;</div><div class='del'>-	case 4: retval = (src[0] - dest[0]);</div><div class='del'>-		if(!retval &amp;&amp; src[0]) {</div><div class='del'>-		  retval = (src[1] - dest[1]);</div><div class='del'>-		  if(!retval &amp;&amp; src[1]) {</div><div class='del'>-		    retval = (src[2] - dest[2]);</div><div class='del'>-		    if (!retval &amp;&amp; src[2])</div><div class='del'>-		      retval = (src[3] - dest[3]);</div><div class='del'>-		  }</div><div class='del'>-		}</div><div class='del'>-		return retval;</div><div class='del'>-	case 5: retval = (src[0] - dest[0]);</div><div class='del'>-		if(!retval &amp;&amp; src[0]) {</div><div class='del'>-		  retval = (src[1] - dest[1]);</div><div class='del'>-		  if(!retval &amp;&amp; src[1]) {</div><div class='del'>-		    retval = (src[2] - dest[2]);</div><div class='del'>-		    if (!retval &amp;&amp; src[2]) {</div><div class='del'>-		      retval = (src[3] - dest[3]);</div><div class='del'>-		      if (!retval &amp;&amp; src[3])</div><div class='del'>-		        retval = (src[4] - dest[4]);</div><div class='del'>-		    }</div><div class='del'>-		  }</div><div class='del'>-		}</div><div class='del'>-		return retval;</div><div class='del'>-	default:</div><div class='del'>-		retval = (src[0] - dest[0]);</div><div class='del'>-		if(!retval &amp;&amp; src[0]) {</div><div class='del'>-		  retval = (src[1] - dest[1]);</div><div class='del'>-		  if(!retval &amp;&amp; src[1]) {</div><div class='del'>-		    retval = (src[2] - dest[2]);</div><div class='del'>-		    if(!retval &amp;&amp; src[2])</div><div class='del'>-		      retval = __strncmp(src+3,dest+3,count-3);</div><div class='del'>-		  }</div><div class='del'>-		}</div><div class='del'>-		return retval;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#undef strncmp</div><div class='del'>-#define strncmp(__arg0, __arg1, __arg2)	\</div><div class='del'>-(__builtin_constant_p(__arg2) ?	\</div><div class='del'>- __constant_strncmp(__arg0, __arg1, __arg2) : \</div><div class='del'>- __strncmp(__arg0, __arg1, __arg2))</div><div class='add'>+extern int strncmp(const char *, const char *, __kernel_size_t);</div><div class='ctx'> </div><div class='ctx'> #endif /* !EXPORT_SYMTAB_STROPS */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/sysen.h b/arch/sparc/include/asm/sysen.h<br/>deleted file mode 100644<br/>index 6af34abde6e7..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/sysen.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/sysen.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,15 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * sysen.h:  Bit fields within the "System Enable" register accessed via</div><div class='del'>- *           the ASI_CONTROL address space at address AC_SYSENABLE.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _SPARC_SYSEN_H</div><div class='del'>-#define _SPARC_SYSEN_H</div><div class='del'>-</div><div class='del'>-#define SENABLE_DVMA   0x20   /* enable dvma transfers */</div><div class='del'>-#define SENABLE_CACHE  0x10   /* enable VAC cache */</div><div class='del'>-#define SENABLE_RESET  0x04   /* reset whole machine, danger Will Robinson */</div><div class='del'>-</div><div class='del'>-#endif /* _SPARC_SYSEN_H */</div><div class='head'>diff --git a/arch/sparc/include/asm/thread_info_32.h b/arch/sparc/include/asm/thread_info_32.h<br/>index c2a1080cdd3b..e6cd224506a9 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/thread_info_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/thread_info_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/thread_info_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/thread_info_32.h</a></div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -78,23 +77,11 @@ register struct thread_info *current_thread_info_reg asm("g6");</div><div class='ctx'> /*</div><div class='ctx'>  * thread information allocation</div><div class='ctx'>  */</div><div class='del'>-#define THREAD_INFO_ORDER  1</div><div class='del'>-</div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info_node, int)</div><div class='del'>-#define alloc_thread_info_node(tsk, node) BTFIXUP_CALL(alloc_thread_info_node)(node)</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *)</div><div class='del'>-#define free_thread_info(ti) BTFIXUP_CALL(free_thread_info)(ti)</div><div class='add'>+#define THREAD_SIZE_ORDER  1</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Size of kernel stack for each process.</div><div class='del'>- * Observe the order of get_free_pages() in alloc_thread_info_node().</div><div class='del'>- * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste.</div><div class='del'>- */</div><div class='add'>+/* Size of kernel stack for each process */</div><div class='ctx'> #define THREAD_SIZE		(2 * PAGE_SIZE)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -144,8 +131,7 @@ BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *)</div><div class='ctx'> #define _TIF_POLLING_NRFLAG	(1&lt;&lt;TIF_POLLING_NRFLAG)</div><div class='ctx'> </div><div class='ctx'> #define _TIF_DO_NOTIFY_RESUME_MASK	(_TIF_NOTIFY_RESUME | \</div><div class='del'>-					 _TIF_SIGPENDING | \</div><div class='del'>-					 _TIF_RESTORE_SIGMASK)</div><div class='add'>+					 _TIF_SIGPENDING)</div><div class='ctx'> </div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h<br/>index 01d057fe6a3f..cfa8c38fb9c8 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/thread_info_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/thread_info_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/thread_info_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/thread_info_64.h</a></div><div class='hunk'>@@ -138,32 +138,11 @@ register struct thread_info *current_thread_info_reg asm("g6");</div><div class='ctx'> </div><div class='ctx'> /* thread information allocation */</div><div class='ctx'> #if PAGE_SHIFT == 13</div><div class='del'>-#define __THREAD_INFO_ORDER	1</div><div class='add'>+#define THREAD_SIZE_ORDER	1</div><div class='ctx'> #else /* PAGE_SHIFT == 13 */</div><div class='del'>-#define __THREAD_INFO_ORDER	0</div><div class='add'>+#define THREAD_SIZE_ORDER	0</div><div class='ctx'> #endif /* PAGE_SHIFT == 13 */</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-#define THREAD_FLAGS (GFP_KERNEL | __GFP_ZERO)</div><div class='del'>-#else</div><div class='del'>-#define THREAD_FLAGS (GFP_KERNEL)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define alloc_thread_info_node(tsk, node)				\</div><div class='del'>-({									\</div><div class='del'>-	struct page *page = alloc_pages_node(node, THREAD_FLAGS,	\</div><div class='del'>-					     __THREAD_INFO_ORDER);	\</div><div class='del'>-	struct thread_info *ret;					\</div><div class='del'>-									\</div><div class='del'>-	ret = page ? page_address(page) : NULL;				\</div><div class='del'>-	ret;								\</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-#define free_thread_info(ti) \</div><div class='del'>-	free_pages((unsigned long)(ti),__THREAD_INFO_ORDER)</div><div class='del'>-</div><div class='ctx'> #define __thread_flag_byte_ptr(ti)	\</div><div class='ctx'> 	((unsigned char *)(&amp;((ti)-&gt;flags)))</div><div class='ctx'> #define __cur_thread_flag_byte_ptr	__thread_flag_byte_ptr(current_thread_info())</div><div class='hunk'>@@ -259,7 +238,23 @@ static inline void set_restore_sigmask(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_info *ti = current_thread_info();</div><div class='ctx'> 	ti-&gt;status |= TS_RESTORE_SIGMASK;</div><div class='del'>-	set_bit(TIF_SIGPENDING, &amp;ti-&gt;flags);</div><div class='add'>+	WARN_ON(!test_bit(TIF_SIGPENDING, &amp;ti-&gt;flags));</div><div class='add'>+}</div><div class='add'>+static inline void clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	return current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_and_clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	struct thread_info *ti = current_thread_info();</div><div class='add'>+	if (!(ti-&gt;status &amp; TS_RESTORE_SIGMASK))</div><div class='add'>+		return false;</div><div class='add'>+	ti-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> #endif	/* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/timer_32.h b/arch/sparc/include/asm/timer_32.h<br/>index 1a91e11dd104..72f40a546de3 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/timer_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/timer_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/timer_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/timer_32.h</a></div><div class='hunk'>@@ -8,14 +8,37 @@</div><div class='ctx'> #ifndef _SPARC_TIMER_H</div><div class='ctx'> #define _SPARC_TIMER_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/clocksource.h&gt;</div><div class='add'>+#include &lt;linux/irqreturn.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/percpu.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/cpu_type.h&gt;  /* For SUN4M_NCPUS */</div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='add'>+</div><div class='add'>+#define SBUS_CLOCK_RATE   2000000 /* 2MHz */</div><div class='add'>+#define TIMER_VALUE_SHIFT 9</div><div class='add'>+#define TIMER_VALUE_MASK  0x3fffff</div><div class='add'>+#define TIMER_LIMIT_BIT   (1 &lt;&lt; 31)  /* Bit 31 in Counter-Timer register */</div><div class='add'>+</div><div class='add'>+/* The counter timer register has the value offset by 9 bits.</div><div class='add'>+ * From sun4m manual:</div><div class='add'>+ * When a counter reaches the value in the corresponding limit register,</div><div class='add'>+ * the Limit bit is set and the counter is set to 500 nS (i.e. 0x00000200).</div><div class='add'>+ *</div><div class='add'>+ * To compensate for this add one to the value.</div><div class='add'>+ */</div><div class='add'>+static inline unsigned int timer_value(unsigned int value)</div><div class='add'>+{</div><div class='add'>+	return (value + 1) &lt;&lt; TIMER_VALUE_SHIFT;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> extern __volatile__ unsigned int *master_l10_counter;</div><div class='ctx'> </div><div class='del'>-/* FIXME: Make do_[gs]ettimeofday btfixup calls */</div><div class='del'>-struct timespec;</div><div class='del'>-BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv)</div><div class='del'>-#define bus_do_settimeofday(tv) BTFIXUP_CALL(bus_do_settimeofday)(tv)</div><div class='add'>+extern irqreturn_t notrace timer_interrupt(int dummy, void *dev_id);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+DECLARE_PER_CPU(struct clock_event_device, sparc32_clockevent);</div><div class='add'>+extern void register_percpu_ce(int cpu);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #endif /* !(_SPARC_TIMER_H) */</div><div class='head'>diff --git a/arch/sparc/include/asm/timex_32.h b/arch/sparc/include/asm/timex_32.h<br/>index a254750e4c03..b6ccdb0d6f7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/timex_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/timex_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/timex_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/timex_32.h</a></div><div class='hunk'>@@ -12,5 +12,4 @@</div><div class='ctx'> typedef unsigned long cycles_t;</div><div class='ctx'> #define get_cycles()	(0)</div><div class='ctx'> </div><div class='del'>-extern u32 (*do_arch_gettimeoffset)(void);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/sparc/include/asm/tlbflush_32.h b/arch/sparc/include/asm/tlbflush_32.h<br/>index fe0a71abc9bb..a5c4142130f5 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/tlbflush_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/tlbflush_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/tlbflush_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/tlbflush_32.h</a></div><div class='hunk'>@@ -1,52 +1,16 @@</div><div class='ctx'> #ifndef _SPARC_TLBFLUSH_H</div><div class='ctx'> #define _SPARC_TLBFLUSH_H</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-// #include &lt;asm/processor.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * TLB flushing:</div><div class='del'>- *</div><div class='del'>- *  - flush_tlb() flushes the current mm struct TLBs	XXX Exists?</div><div class='del'>- *  - flush_tlb_all() flushes all processes TLBs</div><div class='del'>- *  - flush_tlb_mm(mm) flushes the specified mm context TLB's</div><div class='del'>- *  - flush_tlb_page(vma, vmaddr) flushes one page</div><div class='del'>- *  - flush_tlb_range(vma, start, end) flushes a range of pages</div><div class='del'>- *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_CALL(void, local_flush_tlb_all, void)</div><div class='del'>-BTFIXUPDEF_CALL(void, local_flush_tlb_mm, struct mm_struct *)</div><div class='del'>-BTFIXUPDEF_CALL(void, local_flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long)</div><div class='del'>-BTFIXUPDEF_CALL(void, local_flush_tlb_page, struct vm_area_struct *, unsigned long)</div><div class='del'>-</div><div class='del'>-#define local_flush_tlb_all() BTFIXUP_CALL(local_flush_tlb_all)()</div><div class='del'>-#define local_flush_tlb_mm(mm) BTFIXUP_CALL(local_flush_tlb_mm)(mm)</div><div class='del'>-#define local_flush_tlb_range(vma,start,end) BTFIXUP_CALL(local_flush_tlb_range)(vma,start,end)</div><div class='del'>-#define local_flush_tlb_page(vma,addr) BTFIXUP_CALL(local_flush_tlb_page)(vma,addr)</div><div class='del'>-</div><div class='del'>-extern void smp_flush_tlb_all(void);</div><div class='del'>-extern void smp_flush_tlb_mm(struct mm_struct *mm);</div><div class='del'>-extern void smp_flush_tlb_range(struct vm_area_struct *vma,</div><div class='del'>-				  unsigned long start,</div><div class='del'>-				  unsigned long end);</div><div class='del'>-extern void smp_flush_tlb_page(struct vm_area_struct *mm, unsigned long page);</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_SMP */</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_CALL(void, flush_tlb_all, void)</div><div class='del'>-BTFIXUPDEF_CALL(void, flush_tlb_mm, struct mm_struct *)</div><div class='del'>-BTFIXUPDEF_CALL(void, flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long)</div><div class='del'>-BTFIXUPDEF_CALL(void, flush_tlb_page, struct vm_area_struct *, unsigned long)</div><div class='del'>-</div><div class='del'>-#define flush_tlb_all() BTFIXUP_CALL(flush_tlb_all)()</div><div class='del'>-#define flush_tlb_mm(mm) BTFIXUP_CALL(flush_tlb_mm)(mm)</div><div class='del'>-#define flush_tlb_range(vma,start,end) BTFIXUP_CALL(flush_tlb_range)(vma,start,end)</div><div class='del'>-#define flush_tlb_page(vma,addr) BTFIXUP_CALL(flush_tlb_page)(vma,addr)</div><div class='del'>-</div><div class='del'>-// #define flush_tlb() flush_tlb_mm(current-&gt;active_mm)	/* XXX Sure? */</div><div class='add'>+#include &lt;asm/cachetlb_32.h&gt;</div><div class='add'>+</div><div class='add'>+#define flush_tlb_all() \</div><div class='add'>+	sparc32_cachetlb_ops-&gt;tlb_all()</div><div class='add'>+#define flush_tlb_mm(mm) \</div><div class='add'>+	sparc32_cachetlb_ops-&gt;tlb_mm(mm)</div><div class='add'>+#define flush_tlb_range(vma, start, end) \</div><div class='add'>+	sparc32_cachetlb_ops-&gt;tlb_range(vma, start, end)</div><div class='add'>+#define flush_tlb_page(vma, addr) \</div><div class='add'>+	sparc32_cachetlb_ops-&gt;tlb_page(vma, addr)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This is a kludge, until I know better. --zaitcev XXX</div><div class='head'>diff --git a/arch/sparc/include/asm/topology_64.h b/arch/sparc/include/asm/topology_64.h<br/>index 8b9c556d630b..1754390a426f 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/topology_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/topology_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/topology_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/topology_64.h</a></div><div class='hunk'>@@ -31,25 +31,6 @@ static inline int pcibus_to_node(struct pci_bus *pbus)</div><div class='ctx'> 	 cpu_all_mask : \</div><div class='ctx'> 	 cpumask_of_node(pcibus_to_node(bus)))</div><div class='ctx'> </div><div class='del'>-#define SD_NODE_INIT (struct sched_domain) {		\</div><div class='del'>-	.min_interval		= 8,			\</div><div class='del'>-	.max_interval		= 32,			\</div><div class='del'>-	.busy_factor		= 32,			\</div><div class='del'>-	.imbalance_pct		= 125,			\</div><div class='del'>-	.cache_nice_tries	= 2,			\</div><div class='del'>-	.busy_idx		= 3,			\</div><div class='del'>-	.idle_idx		= 2,			\</div><div class='del'>-	.newidle_idx		= 0, 			\</div><div class='del'>-	.wake_idx		= 0,			\</div><div class='del'>-	.forkexec_idx		= 0,			\</div><div class='del'>-	.flags			= SD_LOAD_BALANCE	\</div><div class='del'>-				| SD_BALANCE_FORK	\</div><div class='del'>-				| SD_BALANCE_EXEC	\</div><div class='del'>-				| SD_SERIALIZE,		\</div><div class='del'>-	.last_balance		= jiffies,		\</div><div class='del'>-	.balance_interval	= 1,			\</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #else /* CONFIG_NUMA */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/topology.h&gt;</div><div class='head'>diff --git a/arch/sparc/include/asm/uaccess.h b/arch/sparc/include/asm/uaccess.h<br/>index e88fbe5c0457..0167d26d0d1d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/uaccess.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/uaccess.h</a></div><div class='hunk'>@@ -5,4 +5,10 @@</div><div class='ctx'> #else</div><div class='ctx'> #include &lt;asm/uaccess_32.h&gt;</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#define user_addr_max() \</div><div class='add'>+	(segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL)</div><div class='add'>+</div><div class='add'>+extern long strncpy_from_user(char *dest, const char __user *src, long count);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/sparc/include/asm/uaccess_32.h b/arch/sparc/include/asm/uaccess_32.h<br/>index 8303ac481034..53a28dd59f59 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/uaccess_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/uaccess_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/uaccess_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/uaccess_32.h</a></div><div class='hunk'>@@ -12,11 +12,12 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;asm/vac-ops.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/processor.h&gt;</div><div class='add'>+</div><div class='ctx'> #define ARCH_HAS_SORT_EXTABLE</div><div class='ctx'> #define ARCH_HAS_SEARCH_EXTABLE</div><div class='ctx'> </div><div class='hunk'>@@ -305,34 +306,8 @@ static inline unsigned long clear_user(void __user *addr, unsigned long n)</div><div class='ctx'> 		return n;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern long __strncpy_from_user(char *dest, const char __user *src, long count);</div><div class='del'>-</div><div class='del'>-static inline long strncpy_from_user(char *dest, const char __user *src, long count)</div><div class='del'>-{</div><div class='del'>-	if (__access_ok((unsigned long) src, count))</div><div class='del'>-		return __strncpy_from_user(dest, src, count);</div><div class='del'>-	else</div><div class='del'>-		return -EFAULT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-extern long __strlen_user(const char __user *);</div><div class='del'>-extern long __strnlen_user(const char __user *, long len);</div><div class='del'>-</div><div class='del'>-static inline long strlen_user(const char __user *str)</div><div class='del'>-{</div><div class='del'>-	if (!access_ok(VERIFY_READ, str, 0))</div><div class='del'>-		return 0;</div><div class='del'>-	else</div><div class='del'>-		return __strlen_user(str);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline long strnlen_user(const char __user *str, long len)</div><div class='del'>-{</div><div class='del'>-	if (!access_ok(VERIFY_READ, str, 0))</div><div class='del'>-		return 0;</div><div class='del'>-	else</div><div class='del'>-		return __strnlen_user(str, len);</div><div class='del'>-}</div><div class='add'>+extern __must_check long strlen_user(const char __user *str);</div><div class='add'>+extern __must_check long strnlen_user(const char __user *str, long n);</div><div class='ctx'> </div><div class='ctx'> #endif  /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/uaccess_64.h b/arch/sparc/include/asm/uaccess_64.h<br/>index a1091afb8831..7c831d848b4e 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/uaccess_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/uaccess_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/uaccess_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/uaccess_64.h</a></div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/processor.h&gt;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Sparc64 is segmented, though more like the M68K than the I386.</div><div class='ctx'>  * We use the secondary ASI to address user memory, which references a</div><div class='hunk'>@@ -257,15 +259,9 @@ extern unsigned long __must_check __clear_user(void __user *, unsigned long);</div><div class='ctx'> </div><div class='ctx'> #define clear_user __clear_user</div><div class='ctx'> </div><div class='del'>-extern long __must_check __strncpy_from_user(char *dest, const char __user *src, long count);</div><div class='del'>-</div><div class='del'>-#define strncpy_from_user __strncpy_from_user</div><div class='del'>-</div><div class='del'>-extern long __strlen_user(const char __user *);</div><div class='del'>-extern long __strnlen_user(const char __user *, long len);</div><div class='add'>+extern __must_check long strlen_user(const char __user *str);</div><div class='add'>+extern __must_check long strnlen_user(const char __user *str, long n);</div><div class='ctx'> </div><div class='del'>-#define strlen_user __strlen_user</div><div class='del'>-#define strnlen_user __strnlen_user</div><div class='ctx'> #define __copy_to_user_inatomic ___copy_to_user</div><div class='ctx'> #define __copy_from_user_inatomic ___copy_from_user</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/include/asm/vac-ops.h b/arch/sparc/include/asm/vac-ops.h<br/>deleted file mode 100644<br/>index a63e88ef0426..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/vac-ops.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/vac-ops.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,127 +0,0 @@</div><div class='del'>-#ifndef _SPARC_VAC_OPS_H</div><div class='del'>-#define _SPARC_VAC_OPS_H</div><div class='del'>-</div><div class='del'>-/* vac-ops.h: Inline assembly routines to do operations on the Sparc</div><div class='del'>- *            VAC (virtual address cache) for the sun4c.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1994, David S. Miller (davem@caip.rutgers.edu)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/sysen.h&gt;</div><div class='del'>-#include &lt;asm/contregs.h&gt;</div><div class='del'>-#include &lt;asm/asi.h&gt;</div><div class='del'>-</div><div class='del'>-/* The SUN4C models have a virtually addressed write-through</div><div class='del'>- * cache.</div><div class='del'>- *</div><div class='del'>- * The cache tags are directly accessible through an ASI and</div><div class='del'>- * each have the form:</div><div class='del'>- *</div><div class='del'>- * ------------------------------------------------------------</div><div class='del'>- * | MBZ | CONTEXT | WRITE | PRIV | VALID | MBZ | TagID | MBZ |</div><div class='del'>- * ------------------------------------------------------------</div><div class='del'>- *  31 25  24   22     21     20     19    18 16  15   2  1  0</div><div class='del'>- *</div><div class='del'>- * MBZ: These bits are either unused and/or reserved and should</div><div class='del'>- *      be written as zeroes.</div><div class='del'>- *</div><div class='del'>- * CONTEXT: Records the context to which this cache line belongs.</div><div class='del'>- *</div><div class='del'>- * WRITE: A copy of the writable bit from the mmu pte access bits.</div><div class='del'>- *</div><div class='del'>- * PRIV: A copy of the privileged bit from the pte access bits.</div><div class='del'>- *</div><div class='del'>- * VALID: If set, this line is valid, else invalid.</div><div class='del'>- *</div><div class='del'>- * TagID: Fourteen bits of tag ID.</div><div class='del'>- *</div><div class='del'>- * Every virtual address is seen by the cache like this:</div><div class='del'>- *</div><div class='del'>- * ----------------------------------------</div><div class='del'>- * |  RESV  | TagID | LINE | BYTE-in-LINE |</div><div class='del'>- * ----------------------------------------</div><div class='del'>- *  31    30 29   16 15   4 3            0</div><div class='del'>- *</div><div class='del'>- * RESV: Unused/reserved.</div><div class='del'>- *</div><div class='del'>- * TagID: Used to match the Tag-ID in that vac tags.</div><div class='del'>- *</div><div class='del'>- * LINE: Which line within the cache</div><div class='del'>- *</div><div class='del'>- * BYTE-in-LINE: Which byte within the cache line.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* Sun4c VAC Tags */</div><div class='del'>-#define S4CVACTAG_CID      0x01c00000</div><div class='del'>-#define S4CVACTAG_W        0x00200000</div><div class='del'>-#define S4CVACTAG_P        0x00100000</div><div class='del'>-#define S4CVACTAG_V        0x00080000</div><div class='del'>-#define S4CVACTAG_TID      0x0000fffc</div><div class='del'>-</div><div class='del'>-/* Sun4c VAC Virtual Address */</div><div class='del'>-/* These aren't used, why bother? (Anton) */</div><div class='del'>-#if 0</div><div class='del'>-#define S4CVACVA_TID       0x3fff0000</div><div class='del'>-#define S4CVACVA_LINE      0x0000fff0</div><div class='del'>-#define S4CVACVA_BIL       0x0000000f</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* The indexing of cache lines creates a problem.  Because the line</div><div class='del'>- * field of a virtual address extends past the page offset within</div><div class='del'>- * the virtual address it is possible to have what are called</div><div class='del'>- * 'bad aliases' which will create inconsistencies.  So we must make</div><div class='del'>- * sure that within a context that if a physical page is mapped</div><div class='del'>- * more than once, that 'extra' line bits are the same.  If this is</div><div class='del'>- * not the case, and thus is a 'bad alias' we must turn off the</div><div class='del'>- * cacheable bit in the pte's of all such pages.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define S4CVAC_BADBITS    0x0000f000</div><div class='del'>-</div><div class='del'>-/* The following is true if vaddr1 and vaddr2 would cause</div><div class='del'>- * a 'bad alias'.</div><div class='del'>- */</div><div class='del'>-#define S4CVAC_BADALIAS(vaddr1, vaddr2) \</div><div class='del'>-        ((((unsigned long) (vaddr1)) ^ ((unsigned long) (vaddr2))) &amp; \</div><div class='del'>-	 (S4CVAC_BADBITS))</div><div class='del'>-</div><div class='del'>-/* The following structure describes the characteristics of a sun4c</div><div class='del'>- * VAC as probed from the prom during boot time.</div><div class='del'>- */</div><div class='del'>-struct sun4c_vac_props {</div><div class='del'>-	unsigned int num_bytes;     /* Size of the cache */</div><div class='del'>-	unsigned int do_hwflushes;  /* Hardware flushing available? */</div><div class='del'>-	unsigned int linesize;      /* Size of each line in bytes */</div><div class='del'>-	unsigned int log2lsize;     /* log2(linesize) */</div><div class='del'>-	unsigned int on;            /* VAC is enabled */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct sun4c_vac_props sun4c_vacinfo;</div><div class='del'>-</div><div class='del'>-/* sun4c_enable_vac() enables the sun4c virtual address cache. */</div><div class='del'>-static inline void sun4c_enable_vac(void)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("lduba [%0] %1, %%g1\n\t"</div><div class='del'>-			     "or    %%g1, %2, %%g1\n\t"</div><div class='del'>-			     "stba  %%g1, [%0] %1\n\t"</div><div class='del'>-			     : /* no outputs */</div><div class='del'>-			     : "r" ((unsigned int) AC_SENABLE),</div><div class='del'>-			     "i" (ASI_CONTROL), "i" (SENABLE_CACHE)</div><div class='del'>-			     : "g1", "memory");</div><div class='del'>-	sun4c_vacinfo.on = 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* sun4c_disable_vac() disables the virtual address cache. */</div><div class='del'>-static inline void sun4c_disable_vac(void)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("lduba [%0] %1, %%g1\n\t"</div><div class='del'>-			     "andn  %%g1, %2, %%g1\n\t"</div><div class='del'>-			     "stba  %%g1, [%0] %1\n\t"</div><div class='del'>-			     : /* no outputs */</div><div class='del'>-			     : "r" ((unsigned int) AC_SENABLE),</div><div class='del'>-			     "i" (ASI_CONTROL), "i" (SENABLE_CACHE)</div><div class='del'>-			     : "g1", "memory");</div><div class='del'>-	sun4c_vacinfo.on = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* !(_SPARC_VAC_OPS_H) */</div><div class='head'>diff --git a/arch/sparc/include/asm/vaddrs.h b/arch/sparc/include/asm/vaddrs.h<br/>index 541e13755cec..da6535d88a72 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/vaddrs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/vaddrs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/vaddrs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/vaddrs.h</a></div><div class='hunk'>@@ -34,22 +34,6 @@</div><div class='ctx'> #define IOBASE_VADDR		0xfe000000</div><div class='ctx'> #define IOBASE_END		0xfe600000</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * On the sun4/4c we need a place</div><div class='del'>- * to reliably map locked down kernel data.  This includes the</div><div class='del'>- * task_struct and kernel stack pages of each process plus the</div><div class='del'>- * scsi buffers during dvma IO transfers, also the floppy buffers</div><div class='del'>- * during pseudo dma which runs with traps off (no faults allowed).</div><div class='del'>- * Some quick calculations yield:</div><div class='del'>- *       NR_TASKS &lt;512&gt; * (3 * PAGE_SIZE) == 0x600000</div><div class='del'>- * Subtract this from 0xc00000 and you get 0x927C0 of vm left</div><div class='del'>- * over to map SCSI dvma + floppy pseudo-dma buffers.  So be</div><div class='del'>- * careful if you change NR_TASKS or else there won't be enough</div><div class='del'>- * room for it all.</div><div class='del'>- */</div><div class='del'>-#define SUN4C_LOCK_VADDR	0xff000000</div><div class='del'>-#define SUN4C_LOCK_END		0xffc00000</div><div class='del'>-</div><div class='ctx'> #define KADB_DEBUGGER_BEGVM	0xffc00000 /* Where kern debugger is in virt-mem */</div><div class='ctx'> #define KADB_DEBUGGER_ENDVM	0xffd00000</div><div class='ctx'> #define DEBUG_FIRSTVADDR	KADB_DEBUGGER_BEGVM</div><div class='head'>diff --git a/arch/sparc/include/asm/winmacro.h b/arch/sparc/include/asm/winmacro.h<br/>index a9be04b0d049..9b7b21764cde 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/include/asm/winmacro.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/include/asm/winmacro.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/include/asm/winmacro.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/include/asm/winmacro.h</a></div><div class='hunk'>@@ -103,37 +103,24 @@</div><div class='ctx'>         st       %scratch, [%cur_reg + TI_W_SAVED];</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-/* Results of LOAD_CURRENT() after BTFIXUP for SUN4M, SUN4D &amp; LEON (comments) */</div><div class='del'>-#define LOAD_CURRENT4M(dest_reg, idreg) \</div><div class='del'>-        rd       %tbr, %idreg; \</div><div class='del'>-	sethi    %hi(current_set), %dest_reg; \</div><div class='del'>-        srl      %idreg, 10, %idreg; \</div><div class='del'>-	or       %dest_reg, %lo(current_set), %dest_reg; \</div><div class='del'>-	and      %idreg, 0xc, %idreg; \</div><div class='del'>-	ld       [%idreg + %dest_reg], %dest_reg;</div><div class='del'>-</div><div class='del'>-#define LOAD_CURRENT4D(dest_reg, idreg) \</div><div class='del'>-	lda	 [%g0] ASI_M_VIKING_TMP1, %idreg; \</div><div class='del'>-	sethi	%hi(C_LABEL(current_set)), %dest_reg; \</div><div class='del'>-	sll	%idreg, 2, %idreg; \</div><div class='del'>-	or	%dest_reg, %lo(C_LABEL(current_set)), %dest_reg; \</div><div class='del'>-	ld	[%idreg + %dest_reg], %dest_reg;</div><div class='del'>-</div><div class='del'>-#define LOAD_CURRENT_LEON(dest_reg, idreg)			\</div><div class='del'>-	rd	%asr17, %idreg;					\</div><div class='del'>-	sethi	%hi(current_set), %dest_reg;			\</div><div class='del'>-	srl	%idreg, 0x1c, %idreg;				\</div><div class='del'>-	or	%dest_reg, %lo(current_set), %dest_reg;		\</div><div class='del'>-	sll	%idreg, 0x2, %idreg;				\</div><div class='del'>-	ld	[%idreg + %dest_reg], %dest_reg;</div><div class='del'>-</div><div class='del'>-/* Blackbox - take care with this... - check smp4m and smp4d before changing this. */</div><div class='del'>-#define LOAD_CURRENT(dest_reg, idreg) 					\</div><div class='del'>-	sethi	 %hi(___b_load_current), %idreg;			\</div><div class='del'>-	sethi    %hi(current_set), %dest_reg; 			\</div><div class='del'>-	sethi    %hi(boot_cpu_id4), %idreg; 			\</div><div class='del'>-	or       %dest_reg, %lo(current_set), %dest_reg; 	\</div><div class='del'>-	ldub	 [%idreg + %lo(boot_cpu_id4)], %idreg;		\</div><div class='add'>+#define LOAD_CURRENT(dest_reg, idreg) 			\</div><div class='add'>+661:	rd	%tbr, %idreg;				\</div><div class='add'>+	srl	%idreg, 10, %idreg;			\</div><div class='add'>+	and	%idreg, 0xc, %idreg;			\</div><div class='add'>+	.section	.cpuid_patch, "ax";		\</div><div class='add'>+	/* Instruction location. */			\</div><div class='add'>+	.word		661b;				\</div><div class='add'>+	/* SUN4D implementation. */			\</div><div class='add'>+	lda	 [%g0] ASI_M_VIKING_TMP1, %idreg;	\</div><div class='add'>+	sll	 %idreg, 2, %idreg;			\</div><div class='add'>+	nop;						\</div><div class='add'>+	/* LEON implementation. */			\</div><div class='add'>+	rd 	%asr17, %idreg;				\</div><div class='add'>+	srl	%idreg, 0x1c, %idreg;			\</div><div class='add'>+	sll	%idreg, 0x02, %idreg;			\</div><div class='add'>+	.previous;					\</div><div class='add'>+	sethi    %hi(current_set), %dest_reg; 		\</div><div class='add'>+	or       %dest_reg, %lo(current_set), %dest_reg;\</div><div class='ctx'> 	ld       [%idreg + %dest_reg], %dest_reg;</div><div class='ctx'> #else</div><div class='ctx'> #define LOAD_CURRENT(dest_reg, idreg) \</div><div class='head'>diff --git a/arch/sparc/kernel/Makefile b/arch/sparc/kernel/Makefile<br/>index cb85458f89d2..6cf591b7e1c6 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/Makefile</a></div><div class='hunk'>@@ -6,7 +6,6 @@ asflags-y := -ansi</div><div class='ctx'> ccflags-y := -Werror</div><div class='ctx'> </div><div class='ctx'> extra-y     := head_$(BITS).o</div><div class='del'>-extra-y     += init_task.o</div><div class='ctx'> </div><div class='ctx'> # Undefine sparc when processing vmlinux.lds - it is used</div><div class='ctx'> # And teach CPP we are doing $(BITS) builds (for this case)</div><div class='hunk'>@@ -28,7 +27,7 @@ obj-y                   += traps_$(BITS).o</div><div class='ctx'> </div><div class='ctx'> # IRQ</div><div class='ctx'> obj-y                   += irq_$(BITS).o</div><div class='del'>-obj-$(CONFIG_SPARC32)   += sun4m_irq.o sun4c_irq.o sun4d_irq.o</div><div class='add'>+obj-$(CONFIG_SPARC32)   += sun4m_irq.o sun4d_irq.o</div><div class='ctx'> </div><div class='ctx'> obj-y                   += process_$(BITS).o</div><div class='ctx'> obj-y                   += signal_$(BITS).o</div><div class='hunk'>@@ -46,15 +45,14 @@ obj-$(CONFIG_SPARC32)   += tadpole.o</div><div class='ctx'> obj-y                   += ptrace_$(BITS).o</div><div class='ctx'> obj-y                   += unaligned_$(BITS).o</div><div class='ctx'> obj-y                   += una_asm_$(BITS).o</div><div class='del'>-obj-$(CONFIG_SPARC32)   += muldiv.o</div><div class='ctx'> obj-y                   += prom_common.o</div><div class='ctx'> obj-y                   += prom_$(BITS).o</div><div class='ctx'> obj-y                   += of_device_common.o</div><div class='ctx'> obj-y                   += of_device_$(BITS).o</div><div class='ctx'> obj-$(CONFIG_SPARC64)   += prom_irqtrans.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_SPARC_LEON)+= leon_kernel.o</div><div class='del'>-obj-$(CONFIG_SPARC_LEON)+= leon_pmc.o</div><div class='add'>+obj-$(CONFIG_SPARC32)   += leon_kernel.o</div><div class='add'>+obj-$(CONFIG_SPARC32)   += leon_pmc.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SPARC64)   += reboot.o</div><div class='ctx'> obj-$(CONFIG_SPARC64)   += sysfs.o</div><div class='head'>diff --git a/arch/sparc/kernel/auxio_32.c b/arch/sparc/kernel/auxio_32.c<br/>index 56d0f52c3e62..e20cc55fb768 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/auxio_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/auxio_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/auxio_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/auxio_32.c</a></div><div class='hunk'>@@ -32,7 +32,6 @@ void __init auxio_probe(void)</div><div class='ctx'> 	switch (sparc_cpu_model) {</div><div class='ctx'> 	case sparc_leon:</div><div class='ctx'> 	case sun4d:</div><div class='del'>-	case sun4:</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -65,9 +64,8 @@ void __init auxio_probe(void)</div><div class='ctx'> 	r.start = auxregs[0].phys_addr;</div><div class='ctx'> 	r.end = auxregs[0].phys_addr + auxregs[0].reg_size - 1;</div><div class='ctx'> 	auxio_register = of_ioremap(&amp;r, 0, auxregs[0].reg_size, "auxio");</div><div class='del'>-	/* Fix the address on sun4m and sun4c. */</div><div class='del'>-	if((((unsigned long) auxregs[0].phys_addr) &amp; 3) == 3 ||</div><div class='del'>-	   sparc_cpu_model == sun4c)</div><div class='add'>+	/* Fix the address on sun4m. */</div><div class='add'>+	if ((((unsigned long) auxregs[0].phys_addr) &amp; 3) == 3)</div><div class='ctx'> 		auxio_register += (3 - ((unsigned long)auxio_register &amp; 3));</div><div class='ctx'> </div><div class='ctx'> 	set_auxio(AUXIO_LED, 0);</div><div class='hunk'>@@ -86,12 +84,7 @@ void set_auxio(unsigned char bits_on, unsigned char bits_off)</div><div class='ctx'> 	unsigned char regval;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	spin_lock_irqsave(&amp;auxio_lock, flags);</div><div class='del'>-	switch(sparc_cpu_model) {</div><div class='del'>-	case sun4c:</div><div class='del'>-		regval = sbus_readb(auxio_register);</div><div class='del'>-		sbus_writeb(((regval | bits_on) &amp; ~bits_off) | AUXIO_ORMEIN,</div><div class='del'>-			auxio_register);</div><div class='del'>-		break;</div><div class='add'>+	switch (sparc_cpu_model) {</div><div class='ctx'> 	case sun4m:</div><div class='ctx'> 		if(!auxio_register)</div><div class='ctx'> 			break;     /* VME chassis sun4m, no auxio. */</div><div class='head'>diff --git a/arch/sparc/kernel/central.c b/arch/sparc/kernel/central.c<br/>index 38d48a59879c..9708851a8b9f 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/central.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/central.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/central.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/central.c</a></div><div class='hunk'>@@ -269,4 +269,4 @@ static int __init sunfire_init(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(sunfire_init);</div><div class='add'>+fs_initcall(sunfire_init);</div><div class='head'>diff --git a/arch/sparc/kernel/cpu.c b/arch/sparc/kernel/cpu.c<br/>index 2d1819641769..a6c94a2bf9d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/cpu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/cpu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/cpu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/cpu.c</a></div><div class='hunk'>@@ -121,7 +121,7 @@ static const struct manufacturer_info __initconst manufacturer_info[] = {</div><div class='ctx'> 		FPU(-1, NULL)</div><div class='ctx'> 	}</div><div class='ctx'> },{</div><div class='del'>-	4,</div><div class='add'>+	PSR_IMPL_TI,</div><div class='ctx'> 	.cpu_info = {</div><div class='ctx'> 		CPU(0, "Texas Instruments, Inc. - SuperSparc-(II)"),</div><div class='ctx'> 		/* SparcClassic  --  borned STP1010TAB-50*/</div><div class='hunk'>@@ -191,7 +191,7 @@ static const struct manufacturer_info __initconst manufacturer_info[] = {</div><div class='ctx'> 		FPU(-1, NULL)</div><div class='ctx'> 	}</div><div class='ctx'> },{</div><div class='del'>-	0xF,		/* Aeroflex Gaisler */</div><div class='add'>+	PSR_IMPL_LEON,		/* Aeroflex Gaisler */</div><div class='ctx'> 	.cpu_info = {</div><div class='ctx'> 		CPU(3, "LEON"),</div><div class='ctx'> 		CPU(-1, NULL)</div><div class='hunk'>@@ -440,16 +440,16 @@ static int __init cpu_type_probe(void)</div><div class='ctx'> 	int psr_impl, psr_vers, fpu_vers;</div><div class='ctx'> 	int psr;</div><div class='ctx'> </div><div class='del'>-	psr_impl = ((get_psr() &gt;&gt; 28) &amp; 0xf);</div><div class='del'>-	psr_vers = ((get_psr() &gt;&gt; 24) &amp; 0xf);</div><div class='add'>+	psr_impl = ((get_psr() &gt;&gt; PSR_IMPL_SHIFT) &amp; PSR_IMPL_SHIFTED_MASK);</div><div class='add'>+	psr_vers = ((get_psr() &gt;&gt; PSR_VERS_SHIFT) &amp; PSR_VERS_SHIFTED_MASK);</div><div class='ctx'> </div><div class='ctx'> 	psr = get_psr();</div><div class='ctx'> 	put_psr(psr | PSR_EF);</div><div class='del'>-#ifdef CONFIG_SPARC_LEON</div><div class='del'>-	fpu_vers = get_psr() &amp; PSR_EF ? ((get_fsr() &gt;&gt; 17) &amp; 0x7) : 7;</div><div class='del'>-#else</div><div class='del'>-	fpu_vers = ((get_fsr() &gt;&gt; 17) &amp; 0x7);</div><div class='del'>-#endif</div><div class='add'>+</div><div class='add'>+	if (psr_impl == PSR_IMPL_LEON)</div><div class='add'>+		fpu_vers = get_psr() &amp; PSR_EF ? ((get_fsr() &gt;&gt; 17) &amp; 0x7) : 7;</div><div class='add'>+	else</div><div class='add'>+		fpu_vers = ((get_fsr() &gt;&gt; 17) &amp; 0x7);</div><div class='ctx'> </div><div class='ctx'> 	put_psr(psr);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/kernel/devices.c b/arch/sparc/kernel/devices.c<br/>index 6b2f56a6f8af..3d465e87f7e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/devices.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/devices.c</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'> #include &lt;asm/cpu_type.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern void clock_stop_probe(void); /* tadpole.c */</div><div class='del'>-extern void sun4c_probe_memerr_reg(void);</div><div class='ctx'> </div><div class='ctx'> static char *cpu_mid_prop(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -139,7 +138,4 @@ void __init device_scan(void)</div><div class='ctx'> 		auxio_power_probe();</div><div class='ctx'> 	}</div><div class='ctx'> 	clock_stop_probe();</div><div class='del'>-</div><div class='del'>-	if (ARCH_SUN4C)</div><div class='del'>-		sun4c_probe_memerr_reg();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sparc/kernel/ds.c b/arch/sparc/kernel/ds.c<br/>index b93c2c9ccb1d..f09257c86107 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/ds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/ds.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/ds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/ds.c</a></div><div class='hunk'>@@ -868,7 +868,7 @@ void ldom_power_off(void)</div><div class='ctx'> </div><div class='ctx'> static void ds_conn_reset(struct ds_info *dp)</div><div class='ctx'> {</div><div class='del'>-	printk(KERN_ERR "ds-%llu: ds_conn_reset() from %p\n",</div><div class='add'>+	printk(KERN_ERR "ds-%llu: ds_conn_reset() from %pf\n",</div><div class='ctx'> 	       dp-&gt;id, __builtin_return_address(0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/kernel/entry.S b/arch/sparc/kernel/entry.S<br/>index f445e98463e6..dcaa1cf0de40 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/entry.S</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'>  * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/head.h&gt;</div><div class='hunk'>@@ -17,10 +18,8 @@</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/psr.h&gt;</div><div class='ctx'> #include &lt;asm/vaddrs.h&gt;</div><div class='del'>-#include &lt;asm/memreg.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/pgtsun4c.h&gt;</div><div class='ctx'> #include &lt;asm/winmacro.h&gt;</div><div class='ctx'> #include &lt;asm/signal.h&gt;</div><div class='ctx'> #include &lt;asm/obio.h&gt;</div><div class='hunk'>@@ -125,22 +124,11 @@ floppy_tdone:</div><div class='ctx'> 	set	auxio_register, %l7</div><div class='ctx'> 	ld	[%l7], %l7</div><div class='ctx'> </div><div class='del'>-	set	sparc_cpu_model, %l5</div><div class='del'>-	ld	[%l5], %l5</div><div class='del'>-	subcc   %l5, 1, %g0		/* enum { sun4c = 1 }; */</div><div class='del'>-	be	1f</div><div class='del'>-	 ldub	[%l7], %l5</div><div class='add'>+	ldub	[%l7], %l5</div><div class='ctx'> </div><div class='ctx'> 	or	%l5, 0xc2, %l5</div><div class='ctx'> 	stb	%l5, [%l7]</div><div class='ctx'> 	andn    %l5, 0x02, %l5</div><div class='del'>-	b	2f</div><div class='del'>-	 nop</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	or      %l5, 0xf4, %l5</div><div class='del'>-	stb     %l5, [%l7]</div><div class='del'>-	andn    %l5, 0x04, %l5</div><div class='ctx'> </div><div class='ctx'> 2:</div><div class='ctx'> 	/* Kill some time so the bits set */</div><div class='hunk'>@@ -266,6 +254,11 @@ smp4m_ticker:</div><div class='ctx'> 	WRITE_PAUSE</div><div class='ctx'> 	RESTORE_ALL</div><div class='ctx'> </div><div class='add'>+#define GET_PROCESSOR4M_ID(reg)	\</div><div class='add'>+	rd	%tbr, %reg;	\</div><div class='add'>+	srl	%reg, 12, %reg;	\</div><div class='add'>+	and	%reg, 3, %reg;</div><div class='add'>+</div><div class='ctx'> 	/* Here is where we check for possible SMP IPI passed to us</div><div class='ctx'> 	 * on some level other than 15 which is the NMI and only used</div><div class='ctx'> 	 * for cross calls.  That has a separate entry point below.</div><div class='hunk'>@@ -328,7 +321,7 @@ linux_trap_ipi15_sun4m:</div><div class='ctx'> 	ld	[%o5 + %o0], %o5</div><div class='ctx'> 	ld	[%o5 + 0x00], %o3	! sun4m_irq_percpu[cpu]-&gt;pending</div><div class='ctx'> 	andcc	%o3, %o2, %g0</div><div class='del'>-	be	1f			! Must be an NMI async memory error</div><div class='add'>+	be	sun4m_nmi_error		! Must be an NMI async memory error</div><div class='ctx'> 	 st	%o2, [%o5 + 0x04]	! sun4m_irq_percpu[cpu]-&gt;clear=0x80000000</div><div class='ctx'> 	WRITE_PAUSE</div><div class='ctx'> 	ld	[%o5 + 0x00], %g0	! sun4m_irq_percpu[cpu]-&gt;pending</div><div class='hunk'>@@ -342,27 +335,6 @@ linux_trap_ipi15_sun4m:</div><div class='ctx'> 	 nop</div><div class='ctx'> 	b	ret_trap_lockless_ipi</div><div class='ctx'> 	 clr	%l6</div><div class='del'>-1:</div><div class='del'>-	/* NMI async memory error handling. */</div><div class='del'>-	sethi	%hi(0x80000000), %l4</div><div class='del'>-	sethi	%hi(sun4m_irq_global), %o5</div><div class='del'>-	ld	[%o5 + %lo(sun4m_irq_global)], %l5</div><div class='del'>-	st	%l4, [%l5 + 0x0c]	! sun4m_irq_global-&gt;mask_set=0x80000000</div><div class='del'>-	WRITE_PAUSE</div><div class='del'>-	ld	[%l5 + 0x00], %g0	! sun4m_irq_global-&gt;pending</div><div class='del'>-	WRITE_PAUSE</div><div class='del'>-	or	%l0, PSR_PIL, %l4</div><div class='del'>-	wr	%l4, 0x0, %psr</div><div class='del'>-	WRITE_PAUSE</div><div class='del'>-	wr	%l4, PSR_ET, %psr</div><div class='del'>-	WRITE_PAUSE</div><div class='del'>-	call	sun4m_nmi</div><div class='del'>-	 nop</div><div class='del'>-	st	%l4, [%l5 + 0x08]	! sun4m_irq_global-&gt;mask_clear=0x80000000</div><div class='del'>-	WRITE_PAUSE</div><div class='del'>-	ld	[%l5 + 0x00], %g0	! sun4m_irq_global-&gt;pending</div><div class='del'>-	WRITE_PAUSE</div><div class='del'>-	RESTORE_ALL</div><div class='ctx'> </div><div class='ctx'> 	.globl	smp4d_ticker</div><div class='ctx'> 	/* SMP per-cpu ticker interrupts are handled specially. */</div><div class='hunk'>@@ -421,7 +393,6 @@ linux_trap_ipi15_sun4d:</div><div class='ctx'> 	/* FIXME */</div><div class='ctx'> 1:	b,a	1b</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPARC_LEON</div><div class='ctx'> 	.globl	smpleon_ipi</div><div class='ctx'> 	.extern leon_ipi_interrupt</div><div class='ctx'> 	/* SMP per-cpu IPI interrupts are handled specially. */</div><div class='hunk'>@@ -452,8 +423,6 @@ linux_trap_ipi15_leon:</div><div class='ctx'> 	b	ret_trap_lockless_ipi</div><div class='ctx'> 	 clr	%l6</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_SPARC_LEON */</div><div class='del'>-</div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='ctx'> 	/* This routine handles illegal instructions and privileged</div><div class='hunk'>@@ -760,326 +729,37 @@ setcc_trap_handler:</div><div class='ctx'> 	jmp	%l2		! advance over trap instruction</div><div class='ctx'> 	rett	%l2 + 0x4	! like this...</div><div class='ctx'> </div><div class='del'>-	.align	4</div><div class='del'>-	.globl	linux_trap_nmi_sun4c</div><div class='del'>-linux_trap_nmi_sun4c:</div><div class='del'>-	SAVE_ALL</div><div class='del'>-</div><div class='del'>-	/* Ugh, we need to clear the IRQ line.  This is now</div><div class='del'>-	 * a very sun4c specific trap handler...</div><div class='del'>-	 */</div><div class='del'>-	sethi	%hi(interrupt_enable), %l5</div><div class='del'>-	ld	[%l5 + %lo(interrupt_enable)], %l5</div><div class='del'>-	ldub	[%l5], %l6</div><div class='del'>-	andn	%l6, INTS_ENAB, %l6</div><div class='del'>-	stb	%l6, [%l5]</div><div class='del'>-</div><div class='del'>-	/* Now it is safe to re-enable traps without recursion. */</div><div class='del'>-	or	%l0, PSR_PIL, %l0</div><div class='del'>-	wr	%l0, PSR_ET, %psr</div><div class='add'>+sun4m_nmi_error:</div><div class='add'>+	/* NMI async memory error handling. */</div><div class='add'>+	sethi	%hi(0x80000000), %l4</div><div class='add'>+	sethi	%hi(sun4m_irq_global), %o5</div><div class='add'>+	ld	[%o5 + %lo(sun4m_irq_global)], %l5</div><div class='add'>+	st	%l4, [%l5 + 0x0c]	! sun4m_irq_global-&gt;mask_set=0x80000000</div><div class='ctx'> 	WRITE_PAUSE</div><div class='del'>-</div><div class='del'>-	/* Now call the c-code with the pt_regs frame ptr and the</div><div class='del'>-	 * memory error registers as arguments.  The ordering chosen</div><div class='del'>-	 * here is due to unlatching semantics.</div><div class='del'>-	 */</div><div class='del'>-	sethi	%hi(AC_SYNC_ERR), %o0</div><div class='del'>-	add	%o0, 0x4, %o0</div><div class='del'>-	lda	[%o0] ASI_CONTROL, %o2	! sync vaddr</div><div class='del'>-	sub	%o0, 0x4, %o0</div><div class='del'>-	lda	[%o0] ASI_CONTROL, %o1	! sync error</div><div class='del'>-	add	%o0, 0xc, %o0</div><div class='del'>-	lda	[%o0] ASI_CONTROL, %o4	! async vaddr</div><div class='del'>-	sub	%o0, 0x4, %o0</div><div class='del'>-	lda	[%o0] ASI_CONTROL, %o3	! async error</div><div class='del'>-	call	sparc_lvl15_nmi</div><div class='del'>-	 add	%sp, STACKFRAME_SZ, %o0</div><div class='del'>-</div><div class='del'>-	RESTORE_ALL</div><div class='del'>-</div><div class='del'>-	.align	4</div><div class='del'>-	.globl	invalid_segment_patch1_ff</div><div class='del'>-	.globl	invalid_segment_patch2_ff</div><div class='del'>-invalid_segment_patch1_ff:	cmp	%l4, 0xff</div><div class='del'>-invalid_segment_patch2_ff:	mov	0xff, %l3</div><div class='del'>-</div><div class='del'>-	.align	4</div><div class='del'>-	.globl	invalid_segment_patch1_1ff</div><div class='del'>-	.globl	invalid_segment_patch2_1ff</div><div class='del'>-invalid_segment_patch1_1ff:	cmp	%l4, 0x1ff</div><div class='del'>-invalid_segment_patch2_1ff:	mov	0x1ff, %l3</div><div class='del'>-</div><div class='del'>-	.align	4</div><div class='del'>-	.globl	num_context_patch1_16, num_context_patch2_16</div><div class='del'>-num_context_patch1_16:		mov	0x10, %l7</div><div class='del'>-num_context_patch2_16:		mov	0x10, %l7</div><div class='del'>-</div><div class='del'>-	.align	4</div><div class='del'>-	.globl	vac_linesize_patch_32</div><div class='del'>-vac_linesize_patch_32:		subcc	%l7, 32, %l7</div><div class='del'>-</div><div class='del'>-	.align	4</div><div class='del'>-	.globl	vac_hwflush_patch1_on, vac_hwflush_patch2_on</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Ugly, but we can't use hardware flushing on the sun4 and we'd require</div><div class='del'>- * two instructions (Anton)</div><div class='del'>- */</div><div class='del'>-vac_hwflush_patch1_on:		addcc	%l7, -PAGE_SIZE, %l7</div><div class='del'>-</div><div class='del'>-vac_hwflush_patch2_on:		sta	%g0, [%l3 + %l7] ASI_HWFLUSHSEG</div><div class='del'>-</div><div class='del'>-	.globl	invalid_segment_patch1, invalid_segment_patch2</div><div class='del'>-	.globl	num_context_patch1</div><div class='del'>-	.globl	vac_linesize_patch, vac_hwflush_patch1</div><div class='del'>-	.globl	vac_hwflush_patch2</div><div class='del'>-</div><div class='del'>-	.align	4</div><div class='del'>-	.globl	sun4c_fault</div><div class='del'>-</div><div class='del'>-! %l0 = %psr</div><div class='del'>-! %l1 = %pc</div><div class='del'>-! %l2 = %npc</div><div class='del'>-! %l3 = %wim</div><div class='del'>-! %l7 = 1 for textfault</div><div class='del'>-! We want error in %l5, vaddr in %l6</div><div class='del'>-sun4c_fault:</div><div class='del'>-	sethi	%hi(AC_SYNC_ERR), %l4</div><div class='del'>-	add	%l4, 0x4, %l6			! AC_SYNC_VA in %l6</div><div class='del'>-	lda	[%l6] ASI_CONTROL, %l5		! Address</div><div class='del'>-	lda	[%l4] ASI_CONTROL, %l6		! Error, retained for a bit</div><div class='del'>-</div><div class='del'>-	andn	%l5, 0xfff, %l5			! Encode all info into l7</div><div class='del'>-	srl	%l6, 14, %l4</div><div class='del'>-</div><div class='del'>-	and	%l4, 2, %l4</div><div class='del'>-	or	%l5, %l4, %l4</div><div class='del'>-</div><div class='del'>-	or	%l4, %l7, %l7			! l7 = [addr,write,txtfault]</div><div class='del'>-</div><div class='del'>-	andcc	%l0, PSR_PS, %g0</div><div class='del'>-	be	sun4c_fault_fromuser</div><div class='del'>-	 andcc	%l7, 1, %g0			! Text fault?</div><div class='del'>-</div><div class='del'>-	be	1f</div><div class='del'>-	 sethi	%hi(KERNBASE), %l4</div><div class='del'>-</div><div class='del'>-	mov	%l1, %l5			! PC</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	cmp	%l5, %l4</div><div class='del'>-	blu	sun4c_fault_fromuser</div><div class='del'>-	 sethi	%hi(~((1 &lt;&lt; SUN4C_REAL_PGDIR_SHIFT) - 1)), %l4</div><div class='del'>-</div><div class='del'>-	/* If the kernel references a bum kernel pointer, or a pte which</div><div class='del'>-	 * points to a non existent page in ram, we will run this code</div><div class='del'>-	 * _forever_ and lock up the machine!!!!! So we must check for</div><div class='del'>-	 * this condition, the AC_SYNC_ERR bits are what we must examine.</div><div class='del'>-	 * Also a parity error would make this happen as well.  So we just</div><div class='del'>-	 * check that we are in fact servicing a tlb miss and not some</div><div class='del'>-	 * other type of fault for the kernel.</div><div class='del'>-	 */</div><div class='del'>-	andcc	%l6, 0x80, %g0</div><div class='del'>-	be	sun4c_fault_fromuser</div><div class='del'>-	 and	%l5, %l4, %l5</div><div class='del'>-</div><div class='del'>-	/* Test for NULL pte_t * in vmalloc area. */</div><div class='del'>-	sethi   %hi(VMALLOC_START), %l4</div><div class='del'>-	cmp     %l5, %l4</div><div class='del'>-	blu,a   invalid_segment_patch1</div><div class='del'>-	 lduXa	[%l5] ASI_SEGMAP, %l4</div><div class='del'>-</div><div class='del'>-	sethi   %hi(swapper_pg_dir), %l4</div><div class='del'>-	srl     %l5, SUN4C_PGDIR_SHIFT, %l6</div><div class='del'>-	or      %l4, %lo(swapper_pg_dir), %l4</div><div class='del'>-	sll     %l6, 2, %l6</div><div class='del'>-	ld      [%l4 + %l6], %l4</div><div class='del'>-	andcc   %l4, PAGE_MASK, %g0</div><div class='del'>-	be      sun4c_fault_fromuser</div><div class='del'>-	 lduXa  [%l5] ASI_SEGMAP, %l4</div><div class='del'>-</div><div class='del'>-invalid_segment_patch1:</div><div class='del'>-	cmp	%l4, 0x7f</div><div class='del'>-	bne	1f</div><div class='del'>-	 sethi	%hi(sun4c_kfree_ring), %l4</div><div class='del'>-	or	%l4, %lo(sun4c_kfree_ring), %l4</div><div class='del'>-	ld	[%l4 + 0x18], %l3</div><div class='del'>-	deccc	%l3			! do we have a free entry?</div><div class='del'>-	bcs,a	2f			! no, unmap one.</div><div class='del'>-	 sethi	%hi(sun4c_kernel_ring), %l4</div><div class='del'>-</div><div class='del'>-	st	%l3, [%l4 + 0x18]	! sun4c_kfree_ring.num_entries--</div><div class='del'>-</div><div class='del'>-	ld	[%l4 + 0x00], %l6	! entry = sun4c_kfree_ring.ringhd.next</div><div class='del'>-	st	%l5, [%l6 + 0x08]	! entry-&gt;vaddr = address</div><div class='del'>-</div><div class='del'>-	ld	[%l6 + 0x00], %l3	! next = entry-&gt;next</div><div class='del'>-	ld	[%l6 + 0x04], %l7	! entry-&gt;prev</div><div class='del'>-</div><div class='del'>-	st	%l7, [%l3 + 0x04]	! next-&gt;prev = entry-&gt;prev</div><div class='del'>-	st	%l3, [%l7 + 0x00]	! entry-&gt;prev-&gt;next = next</div><div class='del'>-</div><div class='del'>-	sethi	%hi(sun4c_kernel_ring), %l4</div><div class='del'>-	or	%l4, %lo(sun4c_kernel_ring), %l4</div><div class='del'>-					! head = &amp;sun4c_kernel_ring.ringhd</div><div class='del'>-</div><div class='del'>-	ld	[%l4 + 0x00], %l7	! head-&gt;next</div><div class='del'>-</div><div class='del'>-	st	%l4, [%l6 + 0x04]	! entry-&gt;prev = head</div><div class='del'>-	st	%l7, [%l6 + 0x00]	! entry-&gt;next = head-&gt;next</div><div class='del'>-	st	%l6, [%l7 + 0x04]	! head-&gt;next-&gt;prev = entry</div><div class='del'>-</div><div class='del'>-	st	%l6, [%l4 + 0x00]	! head-&gt;next = entry</div><div class='del'>-</div><div class='del'>-	ld	[%l4 + 0x18], %l3</div><div class='del'>-	inc	%l3			! sun4c_kernel_ring.num_entries++</div><div class='del'>-	st	%l3, [%l4 + 0x18]</div><div class='del'>-	b	4f</div><div class='del'>-	 ld	[%l6 + 0x08], %l5</div><div class='del'>-</div><div class='del'>-2:</div><div class='del'>-	or	%l4, %lo(sun4c_kernel_ring), %l4</div><div class='del'>-					! head = &amp;sun4c_kernel_ring.ringhd</div><div class='del'>-</div><div class='del'>-	ld	[%l4 + 0x04], %l6	! entry = head-&gt;prev</div><div class='del'>-</div><div class='del'>-	ld	[%l6 + 0x08], %l3	! tmp = entry-&gt;vaddr</div><div class='del'>-</div><div class='del'>-	! Flush segment from the cache.</div><div class='del'>-	sethi	%hi((64 * 1024)), %l7</div><div class='del'>-9:</div><div class='del'>-vac_hwflush_patch1:</div><div class='del'>-vac_linesize_patch:</div><div class='del'>-	subcc	%l7, 16, %l7</div><div class='del'>-	bne	9b</div><div class='del'>-vac_hwflush_patch2:</div><div class='del'>-	 sta	%g0, [%l3 + %l7] ASI_FLUSHSEG</div><div class='del'>-</div><div class='del'>-	st	%l5, [%l6 + 0x08]	! entry-&gt;vaddr = address</div><div class='del'>-</div><div class='del'>-	ld	[%l6 + 0x00], %l5	! next = entry-&gt;next</div><div class='del'>-	ld	[%l6 + 0x04], %l7	! entry-&gt;prev</div><div class='del'>-</div><div class='del'>-	st	%l7, [%l5 + 0x04]	! next-&gt;prev = entry-&gt;prev</div><div class='del'>-	st	%l5, [%l7 + 0x00]	! entry-&gt;prev-&gt;next = next</div><div class='del'>-	st	%l4, [%l6 + 0x04]	! entry-&gt;prev = head</div><div class='del'>-</div><div class='del'>-	ld	[%l4 + 0x00], %l7	! head-&gt;next</div><div class='del'>-</div><div class='del'>-	st	%l7, [%l6 + 0x00]	! entry-&gt;next = head-&gt;next</div><div class='del'>-	st	%l6, [%l7 + 0x04]	! head-&gt;next-&gt;prev = entry</div><div class='del'>-	st	%l6, [%l4 + 0x00]	! head-&gt;next = entry</div><div class='del'>-</div><div class='del'>-	mov	%l3, %l5		! address = tmp</div><div class='del'>-</div><div class='del'>-4:</div><div class='del'>-num_context_patch1:</div><div class='del'>-	mov	0x08, %l7</div><div class='del'>-</div><div class='del'>-	ld	[%l6 + 0x08], %l4</div><div class='del'>-	ldub	[%l6 + 0x0c], %l3</div><div class='del'>-	or	%l4, %l3, %l4		! encode new vaddr/pseg into l4</div><div class='del'>-</div><div class='del'>-	sethi	%hi(AC_CONTEXT), %l3</div><div class='del'>-	lduba	[%l3] ASI_CONTROL, %l6</div><div class='del'>-</div><div class='del'>-	/* Invalidate old mapping, instantiate new mapping,</div><div class='del'>-	 * for each context.  Registers l6/l7 are live across</div><div class='del'>-	 * this loop.</div><div class='del'>-	 */</div><div class='del'>-3:	deccc	%l7</div><div class='del'>-	sethi	%hi(AC_CONTEXT), %l3</div><div class='del'>-	stba	%l7, [%l3] ASI_CONTROL</div><div class='del'>-invalid_segment_patch2:</div><div class='del'>-	mov	0x7f, %l3</div><div class='del'>-	stXa	%l3, [%l5] ASI_SEGMAP</div><div class='del'>-	andn	%l4, 0x1ff, %l3</div><div class='del'>-	bne	3b</div><div class='del'>-	 stXa	%l4, [%l3] ASI_SEGMAP</div><div class='del'>-</div><div class='del'>-	sethi	%hi(AC_CONTEXT), %l3</div><div class='del'>-	stba	%l6, [%l3] ASI_CONTROL</div><div class='del'>-</div><div class='del'>-	andn	%l4, 0x1ff, %l5</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	sethi	%hi(VMALLOC_START), %l4</div><div class='del'>-	cmp	%l5, %l4</div><div class='del'>-</div><div class='del'>-	bgeu	1f</div><div class='del'>-	 mov	1 &lt;&lt; (SUN4C_REAL_PGDIR_SHIFT - PAGE_SHIFT), %l7</div><div class='del'>-</div><div class='del'>-	sethi	%hi(KERNBASE), %l6</div><div class='del'>-</div><div class='del'>-	sub	%l5, %l6, %l4</div><div class='del'>-	srl	%l4, PAGE_SHIFT, %l4</div><div class='del'>-	sethi	%hi((SUN4C_PAGE_KERNEL &amp; 0xf4000000)), %l3</div><div class='del'>-	or	%l3, %l4, %l3</div><div class='del'>-</div><div class='del'>-	sethi	%hi(PAGE_SIZE), %l4</div><div class='del'>-</div><div class='del'>-2:</div><div class='del'>-	sta	%l3, [%l5] ASI_PTE</div><div class='del'>-	deccc	%l7</div><div class='del'>-	inc	%l3</div><div class='del'>-	bne	2b</div><div class='del'>-	 add	%l5, %l4, %l5</div><div class='del'>-</div><div class='del'>-	b	7f</div><div class='del'>-	 sethi	%hi(sun4c_kernel_faults), %l4</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	srl	%l5, SUN4C_PGDIR_SHIFT, %l3</div><div class='del'>-	sethi	%hi(swapper_pg_dir), %l4</div><div class='del'>-	or	%l4, %lo(swapper_pg_dir), %l4</div><div class='del'>-	sll	%l3, 2, %l3</div><div class='del'>-	ld	[%l4 + %l3], %l4</div><div class='del'>-	and	%l4, PAGE_MASK, %l4</div><div class='del'>-</div><div class='del'>-	srl	%l5, (PAGE_SHIFT - 2), %l6</div><div class='del'>-	and	%l6, ((SUN4C_PTRS_PER_PTE - 1) &lt;&lt; 2), %l6</div><div class='del'>-	add	%l6, %l4, %l6</div><div class='del'>-</div><div class='del'>-	sethi	%hi(PAGE_SIZE), %l4</div><div class='del'>-</div><div class='del'>-2:</div><div class='del'>-	ld	[%l6], %l3</div><div class='del'>-	deccc	%l7</div><div class='del'>-	sta	%l3, [%l5] ASI_PTE</div><div class='del'>-	add	%l6, 0x4, %l6</div><div class='del'>-	bne	2b</div><div class='del'>-	 add	%l5, %l4, %l5</div><div class='del'>-</div><div class='del'>-	sethi	%hi(sun4c_kernel_faults), %l4</div><div class='del'>-7:</div><div class='del'>-	ld	[%l4 + %lo(sun4c_kernel_faults)], %l3</div><div class='del'>-	inc	%l3</div><div class='del'>-	st	%l3, [%l4 + %lo(sun4c_kernel_faults)]</div><div class='del'>-</div><div class='del'>-	/* Restore condition codes */</div><div class='del'>-	wr	%l0, 0x0, %psr</div><div class='add'>+	ld	[%l5 + 0x00], %g0	! sun4m_irq_global-&gt;pending</div><div class='ctx'> 	WRITE_PAUSE</div><div class='del'>-	jmp	%l1</div><div class='del'>-	 rett	%l2</div><div class='del'>-</div><div class='del'>-sun4c_fault_fromuser:</div><div class='del'>-	SAVE_ALL</div><div class='add'>+	or	%l0, PSR_PIL, %l4</div><div class='add'>+	wr	%l4, 0x0, %psr</div><div class='add'>+	WRITE_PAUSE</div><div class='add'>+	wr	%l4, PSR_ET, %psr</div><div class='add'>+	WRITE_PAUSE</div><div class='add'>+	call	sun4m_nmi</div><div class='ctx'> 	 nop</div><div class='del'>-	</div><div class='del'>-	mov	%l7, %o1		! Decode the info from %l7</div><div class='del'>-	mov	%l7, %o2</div><div class='del'>-	and	%o1, 1, %o1		! arg2 = text_faultp</div><div class='del'>-	mov	%l7, %o3</div><div class='del'>-	and	%o2, 2, %o2		! arg3 = writep</div><div class='del'>-	andn	%o3, 0xfff, %o3		! arg4 = faulting address</div><div class='del'>-</div><div class='del'>-	wr	%l0, PSR_ET, %psr</div><div class='add'>+	st	%l4, [%l5 + 0x08]	! sun4m_irq_global-&gt;mask_clear=0x80000000</div><div class='add'>+	WRITE_PAUSE</div><div class='add'>+	ld	[%l5 + 0x00], %g0	! sun4m_irq_global-&gt;pending</div><div class='ctx'> 	WRITE_PAUSE</div><div class='add'>+	RESTORE_ALL</div><div class='ctx'> </div><div class='del'>-	call	do_sun4c_fault</div><div class='del'>-	 add	%sp, STACKFRAME_SZ, %o0	! arg1 = pt_regs ptr</div><div class='add'>+#ifndef CONFIG_SMP</div><div class='add'>+	.align	4</div><div class='add'>+	.globl	linux_trap_ipi15_sun4m</div><div class='add'>+linux_trap_ipi15_sun4m:</div><div class='add'>+	SAVE_ALL</div><div class='ctx'> </div><div class='del'>-	RESTORE_ALL</div><div class='add'>+	ba	sun4m_nmi_error</div><div class='add'>+	 nop</div><div class='add'>+#endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='ctx'> 	.align	4</div><div class='ctx'> 	.globl	srmmu_fault</div><div class='hunk'>@@ -1087,8 +767,11 @@ srmmu_fault:</div><div class='ctx'> 	mov	0x400, %l5</div><div class='ctx'> 	mov	0x300, %l4</div><div class='ctx'> </div><div class='del'>-	lda	[%l5] ASI_M_MMUREGS, %l6	! read sfar first</div><div class='del'>-	lda	[%l4] ASI_M_MMUREGS, %l5	! read sfsr last</div><div class='add'>+LEON_PI(lda	[%l5] ASI_LEON_MMUREGS, %l6)	! read sfar first</div><div class='add'>+SUN_PI_(lda	[%l5] ASI_M_MMUREGS, %l6)	! read sfar first</div><div class='add'>+</div><div class='add'>+LEON_PI(lda	[%l4] ASI_LEON_MMUREGS, %l5)	! read sfsr last</div><div class='add'>+SUN_PI_(lda	[%l4] ASI_M_MMUREGS, %l5)	! read sfsr last</div><div class='ctx'> </div><div class='ctx'> 	andn	%l6, 0xfff, %l6</div><div class='ctx'> 	srl	%l5, 6, %l5			! and encode all info into l7</div><div class='hunk'>@@ -1483,11 +1166,13 @@ fpload:</div><div class='ctx'> 	.globl	__ndelay</div><div class='ctx'> __ndelay:</div><div class='ctx'> 	save	%sp, -STACKFRAME_SZ, %sp</div><div class='del'>-	mov	%i0, %o0</div><div class='del'>-	call	.umul			! round multiplier up so large ns ok</div><div class='del'>-	 mov	0x1ae, %o1		! 2**32 / (1 000 000 000 / HZ)</div><div class='del'>-	call	.umul</div><div class='del'>-	 mov	%i1, %o1		! udelay_val</div><div class='add'>+	mov	%i0, %o0		! round multiplier up so large ns ok</div><div class='add'>+	mov	0x1ae, %o1		! 2**32 / (1 000 000 000 / HZ)</div><div class='add'>+	umul	%o0, %o1, %o0</div><div class='add'>+	rd	%y, %o1</div><div class='add'>+	mov	%i1, %o1		! udelay_val</div><div class='add'>+	umul	%o0, %o1, %o0</div><div class='add'>+	rd	%y, %o1</div><div class='ctx'> 	ba	delay_continue</div><div class='ctx'> 	 mov	%o1, %o0		! &gt;&gt;32 later for better resolution</div><div class='ctx'> </div><div class='hunk'>@@ -1496,18 +1181,21 @@ __udelay:</div><div class='ctx'> 	save	%sp, -STACKFRAME_SZ, %sp</div><div class='ctx'> 	mov	%i0, %o0</div><div class='ctx'> 	sethi	%hi(0x10c7), %o1	! round multiplier up so large us ok</div><div class='del'>-	call	.umul</div><div class='del'>-	 or	%o1, %lo(0x10c7), %o1	! 2**32 / 1 000 000</div><div class='del'>-	call	.umul</div><div class='del'>-	 mov	%i1, %o1		! udelay_val</div><div class='add'>+	or	%o1, %lo(0x10c7), %o1	! 2**32 / 1 000 000</div><div class='add'>+	umul	%o0, %o1, %o0</div><div class='add'>+	rd	%y, %o1</div><div class='add'>+	mov	%i1, %o1		! udelay_val</div><div class='add'>+	umul	%o0, %o1, %o0</div><div class='add'>+	rd	%y, %o1</div><div class='ctx'> 	sethi	%hi(0x028f4b62), %l0	! Add in rounding constant * 2**32,</div><div class='ctx'> 	or	%g0, %lo(0x028f4b62), %l0</div><div class='ctx'> 	addcc	%o0, %l0, %o0		! 2**32 * 0.009 999</div><div class='ctx'> 	bcs,a	3f</div><div class='ctx'> 	 add	%o1, 0x01, %o1</div><div class='ctx'> 3:</div><div class='del'>-	call	.umul</div><div class='del'>-	 mov	HZ, %o0			! &gt;&gt;32 earlier for wider range</div><div class='add'>+	mov	HZ, %o0			! &gt;&gt;32 earlier for wider range</div><div class='add'>+	umul	%o0, %o1, %o0</div><div class='add'>+	rd	%y, %o1</div><div class='ctx'> </div><div class='ctx'> delay_continue:</div><div class='ctx'> 	cmp	%o0, 0x0</div><div class='hunk'>@@ -1670,4 +1358,26 @@ flushw_all:</div><div class='ctx'> 	ret</div><div class='ctx'> 	 restore</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+ENTRY(hard_smp_processor_id)</div><div class='add'>+661:	rd		%tbr, %g1</div><div class='add'>+	srl		%g1, 12, %o0</div><div class='add'>+	and		%o0, 3, %o0</div><div class='add'>+	.section	.cpuid_patch, "ax"</div><div class='add'>+	/* Instruction location. */</div><div class='add'>+	.word		661b</div><div class='add'>+	/* SUN4D implementation. */</div><div class='add'>+	lda		[%g0] ASI_M_VIKING_TMP1, %o0</div><div class='add'>+	nop</div><div class='add'>+	nop</div><div class='add'>+	/* LEON implementation. */</div><div class='add'>+	rd		%asr17, %o0</div><div class='add'>+	srl		%o0, 0x1c, %o0</div><div class='add'>+	nop</div><div class='add'>+	.previous</div><div class='add'>+	retl</div><div class='add'>+	 nop</div><div class='add'>+ENDPROC(hard_smp_processor_id)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* End of entry.S */</div><div class='head'>diff --git a/arch/sparc/kernel/etrap_32.S b/arch/sparc/kernel/etrap_32.S<br/>index e806fcdc46db..e3e80d65e39a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/etrap_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/etrap_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/etrap_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/etrap_32.S</a></div><div class='hunk'>@@ -216,9 +216,7 @@ tsetup_patch6:</div><div class='ctx'> 	/* Call MMU-architecture dependent stack checking</div><div class='ctx'> 	 * routine.</div><div class='ctx'> 	 */</div><div class='del'>-	.globl	tsetup_mmu_patchme</div><div class='del'>-tsetup_mmu_patchme:</div><div class='del'>-	b	tsetup_sun4c_stackchk</div><div class='add'>+	b	tsetup_srmmu_stackchk</div><div class='ctx'> 	 andcc	%sp, 0x7, %g0</div><div class='ctx'> </div><div class='ctx'> 	/* Architecture specific stack checking routines.  When either</div><div class='hunk'>@@ -228,52 +226,6 @@ tsetup_mmu_patchme:</div><div class='ctx'> 	 */</div><div class='ctx'> #define glob_tmp     g1</div><div class='ctx'> </div><div class='del'>-tsetup_sun4c_stackchk:</div><div class='del'>-	/* Done by caller: andcc %sp, 0x7, %g0 */</div><div class='del'>-	bne	trap_setup_user_stack_is_bolixed</div><div class='del'>-	 sra	%sp, 29, %glob_tmp</div><div class='del'>-</div><div class='del'>-	add	%glob_tmp, 0x1, %glob_tmp</div><div class='del'>-	andncc	%glob_tmp, 0x1, %g0</div><div class='del'>-	bne	trap_setup_user_stack_is_bolixed</div><div class='del'>-	 and	%sp, 0xfff, %glob_tmp		! delay slot</div><div class='del'>-</div><div class='del'>-	/* See if our dump area will be on more than one</div><div class='del'>-	 * page.</div><div class='del'>-	 */</div><div class='del'>-	add	%glob_tmp, 0x38, %glob_tmp</div><div class='del'>-	andncc	%glob_tmp, 0xff8, %g0</div><div class='del'>-	be	tsetup_sun4c_onepage		! only one page to check</div><div class='del'>-	 lda	[%sp] ASI_PTE, %glob_tmp	! have to check first page anyways</div><div class='del'>-</div><div class='del'>-tsetup_sun4c_twopages:</div><div class='del'>-	/* Is first page ok permission wise? */</div><div class='del'>-	srl	%glob_tmp, 29, %glob_tmp</div><div class='del'>-	cmp	%glob_tmp, 0x6</div><div class='del'>-	bne	trap_setup_user_stack_is_bolixed</div><div class='del'>-	 add	%sp, 0x38, %glob_tmp		/* Is second page in vma hole? */</div><div class='del'>-</div><div class='del'>-	sra	%glob_tmp, 29, %glob_tmp</div><div class='del'>-	add	%glob_tmp, 0x1, %glob_tmp</div><div class='del'>-	andncc	%glob_tmp, 0x1, %g0</div><div class='del'>-	bne	trap_setup_user_stack_is_bolixed</div><div class='del'>-	 add	%sp, 0x38, %glob_tmp</div><div class='del'>-</div><div class='del'>-	lda	[%glob_tmp] ASI_PTE, %glob_tmp</div><div class='del'>-</div><div class='del'>-tsetup_sun4c_onepage:</div><div class='del'>-	srl	%glob_tmp, 29, %glob_tmp</div><div class='del'>-	cmp	%glob_tmp, 0x6				! can user write to it?</div><div class='del'>-	bne	trap_setup_user_stack_is_bolixed	! failure</div><div class='del'>-	 nop</div><div class='del'>-</div><div class='del'>-	STORE_WINDOW(sp)</div><div class='del'>-</div><div class='del'>-	restore %g0, %g0, %g0</div><div class='del'>-</div><div class='del'>-	jmpl	%t_retpc + 0x8, %g0</div><div class='del'>-	 mov	%t_kstack, %sp</div><div class='del'>-</div><div class='ctx'> 	.globl	tsetup_srmmu_stackchk</div><div class='ctx'> tsetup_srmmu_stackchk:</div><div class='ctx'> 	/* Check results of callers andcc %sp, 0x7, %g0 */</div><div class='hunk'>@@ -282,7 +234,8 @@ tsetup_srmmu_stackchk:</div><div class='ctx'> </div><div class='ctx'> 	cmp	%glob_tmp, %sp</div><div class='ctx'> 	bleu,a	1f</div><div class='del'>-	 lda	[%g0] ASI_M_MMUREGS, %glob_tmp		! read MMU control</div><div class='add'>+LEON_PI( lda	[%g0] ASI_LEON_MMUREGS, %glob_tmp)	! read MMU control</div><div class='add'>+SUN_PI_( lda	[%g0] ASI_M_MMUREGS, %glob_tmp)		! read MMU control</div><div class='ctx'> </div><div class='ctx'> trap_setup_user_stack_is_bolixed:</div><div class='ctx'> 	/* From user/kernel into invalid window w/bad user</div><div class='hunk'>@@ -297,18 +250,25 @@ trap_setup_user_stack_is_bolixed:</div><div class='ctx'> 1:</div><div class='ctx'> 	/* Clear the fault status and turn on the no_fault bit. */</div><div class='ctx'> 	or	%glob_tmp, 0x2, %glob_tmp		! or in no_fault bit</div><div class='del'>-	sta	%glob_tmp, [%g0] ASI_M_MMUREGS		! set it</div><div class='add'>+LEON_PI(sta	%glob_tmp, [%g0] ASI_LEON_MMUREGS)		! set it</div><div class='add'>+SUN_PI_(sta	%glob_tmp, [%g0] ASI_M_MMUREGS)		! set it</div><div class='ctx'> </div><div class='ctx'> 	/* Dump the registers and cross fingers. */</div><div class='ctx'> 	STORE_WINDOW(sp)</div><div class='ctx'> </div><div class='ctx'> 	/* Clear the no_fault bit and check the status. */</div><div class='ctx'> 	andn	%glob_tmp, 0x2, %glob_tmp</div><div class='del'>-	sta	%glob_tmp, [%g0] ASI_M_MMUREGS</div><div class='add'>+LEON_PI(sta	%glob_tmp, [%g0] ASI_LEON_MMUREGS)</div><div class='add'>+SUN_PI_(sta	%glob_tmp, [%g0] ASI_M_MMUREGS)</div><div class='add'>+</div><div class='ctx'> 	mov	AC_M_SFAR, %glob_tmp</div><div class='del'>-	lda	[%glob_tmp] ASI_M_MMUREGS, %g0</div><div class='add'>+LEON_PI(lda	[%glob_tmp] ASI_LEON_MMUREGS, %g0)</div><div class='add'>+SUN_PI_(lda	[%glob_tmp] ASI_M_MMUREGS, %g0)</div><div class='add'>+</div><div class='ctx'> 	mov	AC_M_SFSR, %glob_tmp</div><div class='del'>-	lda	[%glob_tmp] ASI_M_MMUREGS, %glob_tmp	! save away status of winstore</div><div class='add'>+LEON_PI(lda	[%glob_tmp] ASI_LEON_MMUREGS, %glob_tmp)! save away status of winstore</div><div class='add'>+SUN_PI_(lda	[%glob_tmp] ASI_M_MMUREGS, %glob_tmp)	! save away status of winstore</div><div class='add'>+</div><div class='ctx'> 	andcc	%glob_tmp, 0x2, %g0			! did we fault?</div><div class='ctx'> 	bne	trap_setup_user_stack_is_bolixed	! failure</div><div class='ctx'> 	 nop</div><div class='head'>diff --git a/arch/sparc/kernel/head_32.S b/arch/sparc/kernel/head_32.S<br/>index 587785759838..afeb1d770303 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/head_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/head_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/head_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/head_32.S</a></div><div class='hunk'>@@ -26,396 +26,41 @@</div><div class='ctx'> #include &lt;asm/pgtsrmmu.h&gt;	/* SRMMU_PGDIR_SHIFT */</div><div class='ctx'> </div><div class='ctx'> 	.data</div><div class='del'>-/* </div><div class='del'>- * The following are used with the prom_vector node-ops to figure out</div><div class='del'>- * the cpu-type </div><div class='add'>+/* The following are used with the prom_vector node-ops to figure out</div><div class='add'>+ * the cpu-type</div><div class='ctx'>  */</div><div class='del'>-</div><div class='del'>-	.align 4</div><div class='del'>-cputyp:</div><div class='del'>-        .word   1</div><div class='del'>-</div><div class='ctx'> 	.align 4</div><div class='ctx'> 	.globl cputypval</div><div class='ctx'> cputypval:</div><div class='del'>-	.asciz "sun4c"</div><div class='add'>+	.asciz "sun4m"</div><div class='ctx'> 	.ascii "     "</div><div class='ctx'> </div><div class='del'>-cputypvalend:</div><div class='del'>-cputypvallen = cputypvar - cputypval</div><div class='del'>-</div><div class='add'>+/* Tested on SS-5, SS-10 */</div><div class='ctx'> 	.align 4</div><div class='del'>-/*</div><div class='del'>- * Sun people can't spell worth damn. "compatability" indeed.</div><div class='del'>- * At least we *know* we can't spell, and use a spell-checker.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* Uh, actually Linus it is I who cannot spell. Too much murky</div><div class='del'>- * Sparc assembly will do this to ya.</div><div class='del'>- */</div><div class='ctx'> cputypvar:</div><div class='del'>-	.asciz "compatability"</div><div class='del'>-</div><div class='del'>-/* Tested on SS-5, SS-10. Probably someone at Sun applied a spell-checker. */</div><div class='del'>-	.align 4</div><div class='del'>-cputypvar_sun4m:</div><div class='ctx'> 	.asciz "compatible"</div><div class='ctx'> </div><div class='ctx'> 	.align 4</div><div class='ctx'> </div><div class='del'>-sun4_notsup:</div><div class='del'>-	.asciz	"Sparc-Linux sun4 support does no longer exist.\n\n"</div><div class='add'>+notsup:</div><div class='add'>+	.asciz	"Sparc-Linux sun4/sun4c or MMU-less not supported\n\n"</div><div class='ctx'> 	.align 4</div><div class='ctx'> </div><div class='ctx'> sun4e_notsup:</div><div class='ctx'>         .asciz  "Sparc-Linux sun4e support does not exist\n\n"</div><div class='ctx'> 	.align 4</div><div class='ctx'> </div><div class='del'>-	/* The Sparc trap table, bootloader gives us control at _start. */</div><div class='del'>-	__HEAD</div><div class='del'>-	.globl	_stext, _start, __stext</div><div class='del'>-	.globl  trapbase</div><div class='del'>-_start:   /* danger danger */</div><div class='del'>-__stext:</div><div class='del'>-_stext:</div><div class='del'>-trapbase:</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-trapbase_cpu0:</div><div class='del'>-#endif</div><div class='del'>-/* We get control passed to us here at t_zero. */</div><div class='del'>-t_zero:	b gokernel; nop; nop; nop;</div><div class='del'>-t_tflt:	SPARC_TFAULT                        /* Inst. Access Exception        */</div><div class='del'>-t_bins:	TRAP_ENTRY(0x2, bad_instruction)    /* Illegal Instruction           */</div><div class='del'>-t_pins:	TRAP_ENTRY(0x3, priv_instruction)   /* Privileged Instruction        */</div><div class='del'>-t_fpd:	TRAP_ENTRY(0x4, fpd_trap_handler)   /* Floating Point Disabled       */</div><div class='del'>-t_wovf:	WINDOW_SPILL                        /* Window Overflow               */</div><div class='del'>-t_wunf:	WINDOW_FILL                         /* Window Underflow              */</div><div class='del'>-t_mna:	TRAP_ENTRY(0x7, mna_handler)        /* Memory Address Not Aligned    */</div><div class='del'>-t_fpe:	TRAP_ENTRY(0x8, fpe_trap_handler)   /* Floating Point Exception      */</div><div class='del'>-t_dflt:	SPARC_DFAULT                        /* Data Miss Exception           */</div><div class='del'>-t_tio:	TRAP_ENTRY(0xa, do_tag_overflow)    /* Tagged Instruction Ovrflw     */</div><div class='del'>-t_wpt:	TRAP_ENTRY(0xb, do_watchpoint)      /* Watchpoint Detected           */</div><div class='del'>-t_badc:	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)</div><div class='del'>-t_irq1:	TRAP_ENTRY_INTERRUPT(1)             /* IRQ Software/SBUS Level 1     */</div><div class='del'>-t_irq2:	TRAP_ENTRY_INTERRUPT(2)             /* IRQ SBUS Level 2              */</div><div class='del'>-t_irq3:	TRAP_ENTRY_INTERRUPT(3)             /* IRQ SCSI/DMA/SBUS Level 3     */</div><div class='del'>-t_irq4:	TRAP_ENTRY_INTERRUPT(4)             /* IRQ Software Level 4          */</div><div class='del'>-t_irq5:	TRAP_ENTRY_INTERRUPT(5)             /* IRQ SBUS/Ethernet Level 5     */</div><div class='del'>-t_irq6:	TRAP_ENTRY_INTERRUPT(6)             /* IRQ Software Level 6          */</div><div class='del'>-t_irq7:	TRAP_ENTRY_INTERRUPT(7)             /* IRQ Video/SBUS Level 5        */</div><div class='del'>-t_irq8:	TRAP_ENTRY_INTERRUPT(8)             /* IRQ SBUS Level 6              */</div><div class='del'>-t_irq9:	TRAP_ENTRY_INTERRUPT(9)             /* IRQ SBUS Level 7              */</div><div class='del'>-t_irq10:TRAP_ENTRY_INTERRUPT(10)            /* IRQ Timer #1 (one we use)     */</div><div class='del'>-t_irq11:TRAP_ENTRY_INTERRUPT(11)            /* IRQ Floppy Intr.              */</div><div class='del'>-t_irq12:TRAP_ENTRY_INTERRUPT(12)            /* IRQ Zilog serial chip         */</div><div class='del'>-t_irq13:TRAP_ENTRY_INTERRUPT(13)            /* IRQ Audio Intr.               */</div><div class='del'>-t_irq14:TRAP_ENTRY_INTERRUPT(14)            /* IRQ Timer #2                  */</div><div class='del'>-	.globl	t_nmi</div><div class='del'>-#ifndef CONFIG_SMP</div><div class='del'>-t_nmi:	NMI_TRAP                            /* Level 15 (NMI)                */</div><div class='del'>-#else</div><div class='del'>-t_nmi:	TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)</div><div class='del'>-#endif</div><div class='del'>-t_racc:	TRAP_ENTRY(0x20, do_reg_access)     /* General Register Access Error */</div><div class='del'>-t_iacce:BAD_TRAP(0x21)                      /* Instr Access Error            */</div><div class='del'>-t_bad22:BAD_TRAP(0x22) BAD_TRAP(0x23)</div><div class='del'>-t_cpdis:TRAP_ENTRY(0x24, do_cp_disabled)    /* Co-Processor Disabled         */</div><div class='del'>-t_uflsh:SKIP_TRAP(0x25, unimp_flush)        /* Unimplemented FLUSH inst.     */</div><div class='del'>-t_bad26:BAD_TRAP(0x26) BAD_TRAP(0x27)</div><div class='del'>-t_cpexc:TRAP_ENTRY(0x28, do_cp_exception)   /* Co-Processor Exception        */</div><div class='del'>-t_dacce:SPARC_DFAULT                        /* Data Access Error             */</div><div class='del'>-t_hwdz:	TRAP_ENTRY(0x2a, do_hw_divzero)     /* Division by zero, you lose... */</div><div class='del'>-t_dserr:BAD_TRAP(0x2b)                      /* Data Store Error              */</div><div class='del'>-t_daccm:BAD_TRAP(0x2c)                      /* Data Access MMU-Miss          */</div><div class='del'>-t_bad2d:BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)</div><div class='del'>-t_bad32:BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)</div><div class='del'>-t_bad37:BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)</div><div class='del'>-t_iaccm:BAD_TRAP(0x3c)                      /* Instr Access MMU-Miss         */</div><div class='del'>-t_bad3d:BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40) BAD_TRAP(0x41)</div><div class='del'>-t_bad42:BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45) BAD_TRAP(0x46)</div><div class='del'>-t_bad47:BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a) BAD_TRAP(0x4b)</div><div class='del'>-t_bad4c:BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f) BAD_TRAP(0x50)</div><div class='del'>-t_bad51:BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)</div><div class='del'>-t_bad56:BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)</div><div class='del'>-t_bad5b:BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)</div><div class='del'>-t_bad60:BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)</div><div class='del'>-t_bad65:BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)</div><div class='del'>-t_bad6a:BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)</div><div class='del'>-t_bad6f:BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)</div><div class='del'>-t_bad74:BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)</div><div class='del'>-t_bad79:BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)</div><div class='del'>-t_bad7e:BAD_TRAP(0x7e) BAD_TRAP(0x7f)</div><div class='del'>-t_bad80:BAD_TRAP(0x80)                      /* SunOS System Call             */</div><div class='del'>-t_sbkpt:BREAKPOINT_TRAP                     /* Software Breakpoint/KGDB      */</div><div class='del'>-t_divz:	TRAP_ENTRY(0x82, do_hw_divzero)     /* Divide by zero trap           */</div><div class='del'>-t_flwin:TRAP_ENTRY(0x83, do_flush_windows)  /* Flush Windows Trap            */</div><div class='del'>-t_clwin:BAD_TRAP(0x84)                      /* Clean Windows Trap            */</div><div class='del'>-t_rchk:	BAD_TRAP(0x85)                      /* Range Check                   */</div><div class='del'>-t_funal:BAD_TRAP(0x86)                      /* Fix Unaligned Access Trap     */</div><div class='del'>-t_iovf:	BAD_TRAP(0x87)                      /* Integer Overflow Trap         */</div><div class='del'>-t_bad88:BAD_TRAP(0x88)                      /* Slowaris System Call          */</div><div class='del'>-t_bad89:BAD_TRAP(0x89)                      /* Net-B.S. System Call          */</div><div class='del'>-t_bad8a:BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c) BAD_TRAP(0x8d) BAD_TRAP(0x8e)</div><div class='del'>-t_bad8f:BAD_TRAP(0x8f)</div><div class='del'>-t_linux:LINUX_SYSCALL_TRAP                  /* Linux System Call             */</div><div class='del'>-t_bad91:BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94) BAD_TRAP(0x95)</div><div class='del'>-t_bad96:BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99) BAD_TRAP(0x9a)</div><div class='del'>-t_bad9b:BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e) BAD_TRAP(0x9f)</div><div class='del'>-t_getcc:GETCC_TRAP                          /* Get Condition Codes           */</div><div class='del'>-t_setcc:SETCC_TRAP                          /* Set Condition Codes           */</div><div class='del'>-t_getpsr:GETPSR_TRAP                        /* Get PSR Register              */</div><div class='del'>-t_bada3:BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)</div><div class='del'>-t_bada7:BAD_TRAP(0xa7)</div><div class='del'>-t_bada8:BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)</div><div class='del'>-t_badac:BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)</div><div class='del'>-t_badb1:BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)</div><div class='del'>-t_badb6:BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)</div><div class='del'>-t_badbb:BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)</div><div class='del'>-t_badc0:BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)</div><div class='del'>-t_badc5:BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)</div><div class='del'>-t_badca:BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)</div><div class='del'>-t_badcf:BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)</div><div class='del'>-t_badd4:BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)</div><div class='del'>-t_badd9:BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)</div><div class='del'>-t_badde:BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)</div><div class='del'>-t_bade3:BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)</div><div class='del'>-t_bade8:BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)</div><div class='del'>-t_baded:BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)</div><div class='del'>-t_badf2:BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)</div><div class='del'>-t_badf7:BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)</div><div class='del'>-t_badfc:BAD_TRAP(0xfc)</div><div class='del'>-t_kgdb:	KGDB_TRAP(0xfd)</div><div class='del'>-dbtrap:	BAD_TRAP(0xfe)                      /* Debugger/PROM breakpoint #1   */</div><div class='del'>-dbtrap2:BAD_TRAP(0xff)                      /* Debugger/PROM breakpoint #2   */	</div><div class='del'>-</div><div class='del'>-	.globl	end_traptable</div><div class='del'>-end_traptable:</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	/* Trap tables for the other cpus. */</div><div class='del'>-	.globl	trapbase_cpu1, trapbase_cpu2, trapbase_cpu3</div><div class='del'>-trapbase_cpu1:</div><div class='del'>-	BAD_TRAP(0x0) SRMMU_TFAULT TRAP_ENTRY(0x2, bad_instruction)</div><div class='del'>-	TRAP_ENTRY(0x3, priv_instruction) TRAP_ENTRY(0x4, fpd_trap_handler)</div><div class='del'>-	WINDOW_SPILL WINDOW_FILL TRAP_ENTRY(0x7, mna_handler)</div><div class='del'>-	TRAP_ENTRY(0x8, fpe_trap_handler) SRMMU_DFAULT</div><div class='del'>-	TRAP_ENTRY(0xa, do_tag_overflow) TRAP_ENTRY(0xb, do_watchpoint)</div><div class='del'>-	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(1) TRAP_ENTRY_INTERRUPT(2)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(3) TRAP_ENTRY_INTERRUPT(4)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(5) TRAP_ENTRY_INTERRUPT(6)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(7)	TRAP_ENTRY_INTERRUPT(8)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(9) TRAP_ENTRY_INTERRUPT(10)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(11) TRAP_ENTRY_INTERRUPT(12)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(13) TRAP_ENTRY_INTERRUPT(14)</div><div class='del'>-	TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)</div><div class='del'>-	TRAP_ENTRY(0x20, do_reg_access) BAD_TRAP(0x21) BAD_TRAP(0x22)</div><div class='del'>-	BAD_TRAP(0x23) TRAP_ENTRY(0x24, do_cp_disabled) SKIP_TRAP(0x25, unimp_flush)</div><div class='del'>-	BAD_TRAP(0x26) BAD_TRAP(0x27) TRAP_ENTRY(0x28, do_cp_exception)</div><div class='del'>-	SRMMU_DFAULT TRAP_ENTRY(0x2a, do_hw_divzero) BAD_TRAP(0x2b) BAD_TRAP(0x2c)</div><div class='del'>-	BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)</div><div class='del'>-	BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)</div><div class='del'>-	BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)</div><div class='del'>-	BAD_TRAP(0x3c) BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40)</div><div class='del'>-	BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45)</div><div class='del'>-	BAD_TRAP(0x46) BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a)</div><div class='del'>-	BAD_TRAP(0x4b) BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)</div><div class='del'>-	BAD_TRAP(0x50)</div><div class='del'>-	BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)</div><div class='del'>-	BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)</div><div class='del'>-	BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)</div><div class='del'>-	BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)</div><div class='del'>-	BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)</div><div class='del'>-	BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)</div><div class='del'>-	BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)</div><div class='del'>-	BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)</div><div class='del'>-	BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)</div><div class='del'>-	BAD_TRAP(0x7e) BAD_TRAP(0x7f)</div><div class='del'>-	BAD_TRAP(0x80)</div><div class='del'>-	BREAKPOINT_TRAP</div><div class='del'>-	TRAP_ENTRY(0x82, do_hw_divzero)</div><div class='del'>-	TRAP_ENTRY(0x83, do_flush_windows) BAD_TRAP(0x84) BAD_TRAP(0x85)</div><div class='del'>-	BAD_TRAP(0x86) BAD_TRAP(0x87) BAD_TRAP(0x88)</div><div class='del'>-	BAD_TRAP(0x89) BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c)</div><div class='del'>-	BAD_TRAP(0x8d) BAD_TRAP(0x8e) BAD_TRAP(0x8f)</div><div class='del'>-	LINUX_SYSCALL_TRAP BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94)</div><div class='del'>-	BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99)</div><div class='del'>-	BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e)</div><div class='del'>-	BAD_TRAP(0x9f) GETCC_TRAP SETCC_TRAP GETPSR_TRAP</div><div class='del'>-	BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)</div><div class='del'>-	BAD_TRAP(0xa7) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)</div><div class='del'>-	BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)</div><div class='del'>-	BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)</div><div class='del'>-	BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)</div><div class='del'>-	BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)</div><div class='del'>-	BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)</div><div class='del'>-	BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)</div><div class='del'>-	BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)</div><div class='del'>-	BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)</div><div class='del'>-	BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)</div><div class='del'>-	BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)</div><div class='del'>-	BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)</div><div class='del'>-	BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)</div><div class='del'>-	BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)</div><div class='del'>-	BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)</div><div class='del'>-	BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)</div><div class='del'>-	BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)</div><div class='del'>-	BAD_TRAP(0xfc) KGDB_TRAP(0xfd) BAD_TRAP(0xfe) BAD_TRAP(0xff)</div><div class='del'>-</div><div class='del'>-trapbase_cpu2:</div><div class='del'>-	BAD_TRAP(0x0) SRMMU_TFAULT TRAP_ENTRY(0x2, bad_instruction)</div><div class='del'>-	TRAP_ENTRY(0x3, priv_instruction) TRAP_ENTRY(0x4, fpd_trap_handler)</div><div class='del'>-	WINDOW_SPILL WINDOW_FILL TRAP_ENTRY(0x7, mna_handler)</div><div class='del'>-	TRAP_ENTRY(0x8, fpe_trap_handler) SRMMU_DFAULT</div><div class='del'>-	TRAP_ENTRY(0xa, do_tag_overflow) TRAP_ENTRY(0xb, do_watchpoint)</div><div class='del'>-	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(1) TRAP_ENTRY_INTERRUPT(2)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(3) TRAP_ENTRY_INTERRUPT(4)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(5) TRAP_ENTRY_INTERRUPT(6)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(7)	TRAP_ENTRY_INTERRUPT(8)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(9) TRAP_ENTRY_INTERRUPT(10)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(11) TRAP_ENTRY_INTERRUPT(12)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(13) TRAP_ENTRY_INTERRUPT(14)</div><div class='del'>-	TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)</div><div class='del'>-	TRAP_ENTRY(0x20, do_reg_access) BAD_TRAP(0x21) BAD_TRAP(0x22)</div><div class='del'>-	BAD_TRAP(0x23) TRAP_ENTRY(0x24, do_cp_disabled) SKIP_TRAP(0x25, unimp_flush)</div><div class='del'>-	BAD_TRAP(0x26) BAD_TRAP(0x27) TRAP_ENTRY(0x28, do_cp_exception)</div><div class='del'>-	SRMMU_DFAULT TRAP_ENTRY(0x2a, do_hw_divzero) BAD_TRAP(0x2b) BAD_TRAP(0x2c)</div><div class='del'>-	BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)</div><div class='del'>-	BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)</div><div class='del'>-	BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)</div><div class='del'>-	BAD_TRAP(0x3c) BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40)</div><div class='del'>-	BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45)</div><div class='del'>-	BAD_TRAP(0x46) BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a)</div><div class='del'>-	BAD_TRAP(0x4b) BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)</div><div class='del'>-	BAD_TRAP(0x50)</div><div class='del'>-	BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)</div><div class='del'>-	BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)</div><div class='del'>-	BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)</div><div class='del'>-	BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)</div><div class='del'>-	BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)</div><div class='del'>-	BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)</div><div class='del'>-	BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)</div><div class='del'>-	BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)</div><div class='del'>-	BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)</div><div class='del'>-	BAD_TRAP(0x7e) BAD_TRAP(0x7f)</div><div class='del'>-	BAD_TRAP(0x80)</div><div class='del'>-	BREAKPOINT_TRAP</div><div class='del'>-	TRAP_ENTRY(0x82, do_hw_divzero)</div><div class='del'>-	TRAP_ENTRY(0x83, do_flush_windows) BAD_TRAP(0x84) BAD_TRAP(0x85)</div><div class='del'>-	BAD_TRAP(0x86) BAD_TRAP(0x87) BAD_TRAP(0x88)</div><div class='del'>-	BAD_TRAP(0x89) BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c)</div><div class='del'>-	BAD_TRAP(0x8d) BAD_TRAP(0x8e) BAD_TRAP(0x8f)</div><div class='del'>-	LINUX_SYSCALL_TRAP BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94)</div><div class='del'>-	BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99)</div><div class='del'>-	BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e)</div><div class='del'>-	BAD_TRAP(0x9f) GETCC_TRAP SETCC_TRAP GETPSR_TRAP</div><div class='del'>-	BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)</div><div class='del'>-	BAD_TRAP(0xa7) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)</div><div class='del'>-	BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)</div><div class='del'>-	BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)</div><div class='del'>-	BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)</div><div class='del'>-	BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)</div><div class='del'>-	BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)</div><div class='del'>-	BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)</div><div class='del'>-	BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)</div><div class='del'>-	BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)</div><div class='del'>-	BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)</div><div class='del'>-	BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)</div><div class='del'>-	BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)</div><div class='del'>-	BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)</div><div class='del'>-	BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)</div><div class='del'>-	BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)</div><div class='del'>-	BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)</div><div class='del'>-	BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)</div><div class='del'>-	BAD_TRAP(0xfc) KGDB_TRAP(0xfd) BAD_TRAP(0xfe) BAD_TRAP(0xff)</div><div class='del'>-</div><div class='del'>-trapbase_cpu3:</div><div class='del'>-	BAD_TRAP(0x0) SRMMU_TFAULT TRAP_ENTRY(0x2, bad_instruction)</div><div class='del'>-	TRAP_ENTRY(0x3, priv_instruction) TRAP_ENTRY(0x4, fpd_trap_handler)</div><div class='del'>-	WINDOW_SPILL WINDOW_FILL TRAP_ENTRY(0x7, mna_handler)</div><div class='del'>-	TRAP_ENTRY(0x8, fpe_trap_handler) SRMMU_DFAULT</div><div class='del'>-	TRAP_ENTRY(0xa, do_tag_overflow) TRAP_ENTRY(0xb, do_watchpoint)</div><div class='del'>-	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(1) TRAP_ENTRY_INTERRUPT(2)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(3) TRAP_ENTRY_INTERRUPT(4)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(5) TRAP_ENTRY_INTERRUPT(6)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(7)	TRAP_ENTRY_INTERRUPT(8)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(9) TRAP_ENTRY_INTERRUPT(10)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(11) TRAP_ENTRY_INTERRUPT(12)</div><div class='del'>-	TRAP_ENTRY_INTERRUPT(13) TRAP_ENTRY_INTERRUPT(14)</div><div class='del'>-	TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)</div><div class='del'>-	TRAP_ENTRY(0x20, do_reg_access) BAD_TRAP(0x21) BAD_TRAP(0x22)</div><div class='del'>-	BAD_TRAP(0x23) TRAP_ENTRY(0x24, do_cp_disabled) SKIP_TRAP(0x25, unimp_flush)</div><div class='del'>-	BAD_TRAP(0x26) BAD_TRAP(0x27) TRAP_ENTRY(0x28, do_cp_exception)</div><div class='del'>-	SRMMU_DFAULT TRAP_ENTRY(0x2a, do_hw_divzero) BAD_TRAP(0x2b) BAD_TRAP(0x2c)</div><div class='del'>-	BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)</div><div class='del'>-	BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)</div><div class='del'>-	BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)</div><div class='del'>-	BAD_TRAP(0x3c) BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40)</div><div class='del'>-	BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45)</div><div class='del'>-	BAD_TRAP(0x46) BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a)</div><div class='del'>-	BAD_TRAP(0x4b) BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)</div><div class='del'>-	BAD_TRAP(0x50)</div><div class='del'>-	BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)</div><div class='del'>-	BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)</div><div class='del'>-	BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)</div><div class='del'>-	BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)</div><div class='del'>-	BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)</div><div class='del'>-	BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)</div><div class='del'>-	BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)</div><div class='del'>-	BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)</div><div class='del'>-	BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)</div><div class='del'>-	BAD_TRAP(0x7e) BAD_TRAP(0x7f)</div><div class='del'>-	BAD_TRAP(0x80)</div><div class='del'>-	BREAKPOINT_TRAP</div><div class='del'>-	TRAP_ENTRY(0x82, do_hw_divzero)</div><div class='del'>-	TRAP_ENTRY(0x83, do_flush_windows) BAD_TRAP(0x84) BAD_TRAP(0x85)</div><div class='del'>-	BAD_TRAP(0x86) BAD_TRAP(0x87) BAD_TRAP(0x88)</div><div class='del'>-	BAD_TRAP(0x89) BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c)</div><div class='del'>-	BAD_TRAP(0x8d) BAD_TRAP(0x8e) BAD_TRAP(0x8f)</div><div class='del'>-	LINUX_SYSCALL_TRAP BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94)</div><div class='del'>-	BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99)</div><div class='del'>-	BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e)</div><div class='del'>-	BAD_TRAP(0x9f) GETCC_TRAP SETCC_TRAP GETPSR_TRAP</div><div class='del'>-	BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)</div><div class='del'>-	BAD_TRAP(0xa7) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)</div><div class='del'>-	BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)</div><div class='del'>-	BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)</div><div class='del'>-	BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)</div><div class='del'>-	BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)</div><div class='del'>-	BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)</div><div class='del'>-	BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)</div><div class='del'>-	BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)</div><div class='del'>-	BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)</div><div class='del'>-	BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)</div><div class='del'>-	BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)</div><div class='del'>-	BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)</div><div class='del'>-	BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)</div><div class='del'>-	BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)</div><div class='del'>-	BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)</div><div class='del'>-	BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)</div><div class='del'>-	BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)</div><div class='del'>-	BAD_TRAP(0xfc) KGDB_TRAP(0xfd) BAD_TRAP(0xfe) BAD_TRAP(0xff)</div><div class='add'>+/* The trap-table - located in the __HEAD section */</div><div class='add'>+#include "ttable_32.S"</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='ctx'> 	.align PAGE_SIZE</div><div class='ctx'> </div><div class='ctx'> /* This was the only reasonable way I could think of to properly align</div><div class='ctx'>  * these page-table data structures.</div><div class='ctx'>  */</div><div class='del'>-	.globl pg0, pg1, pg2, pg3</div><div class='del'>-	.globl empty_bad_page</div><div class='del'>-	.globl empty_bad_page_table</div><div class='del'>-	.globl empty_zero_page</div><div class='ctx'> 	.globl swapper_pg_dir</div><div class='ctx'> swapper_pg_dir:		.skip PAGE_SIZE</div><div class='del'>-pg0:			.skip PAGE_SIZE</div><div class='del'>-pg1:			.skip PAGE_SIZE</div><div class='del'>-pg2:			.skip PAGE_SIZE</div><div class='del'>-pg3:			.skip PAGE_SIZE</div><div class='del'>-empty_bad_page:		.skip PAGE_SIZE</div><div class='del'>-empty_bad_page_table:	.skip PAGE_SIZE</div><div class='add'>+	.globl empty_zero_page</div><div class='ctx'> empty_zero_page:	.skip PAGE_SIZE</div><div class='ctx'> </div><div class='ctx'> 	.global root_flags</div><div class='hunk'>@@ -474,7 +119,7 @@ current_pc:</div><div class='ctx'> 		tst	%o0</div><div class='ctx'> 		be	no_sun4u_here</div><div class='ctx'> 		 mov	%g4, %o7		/* Previous %o7. */</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 		mov	%o0, %l0		! stash away romvec</div><div class='ctx'> 		mov	%o0, %g7		! put it here too</div><div class='ctx'> 		mov	%o1, %l1		! stash away debug_vec too</div><div class='hunk'>@@ -483,7 +128,7 @@ current_pc:</div><div class='ctx'> 		set	current_pc, %g5</div><div class='ctx'> 		cmp	%g3, %g5</div><div class='ctx'> 		be	already_mapped</div><div class='del'>-		 nop </div><div class='add'>+		 nop</div><div class='ctx'> </div><div class='ctx'> 		/* %l6 will hold the offset we have to subtract</div><div class='ctx'> 		 * from absolute symbols in order to access areas</div><div class='hunk'>@@ -523,10 +168,10 @@ copy_prom_lvl14:</div><div class='ctx'> 		ldd	[%g2 + 0x8], %g4</div><div class='ctx'> 		std	%g4, [%g3 + 0x8]	! Copy proms handler</div><div class='ctx'> </div><div class='del'>-/* Must determine whether we are on a sun4c MMU, SRMMU, or SUN4/400 MUTANT</div><div class='del'>- * MMU so we can remap ourselves properly.  DON'T TOUCH %l0 thru %l5 in these</div><div class='del'>- * remapping routines, we need their values afterwards!</div><div class='add'>+/* DON'T TOUCH %l0 thru %l5 in these remapping routines,</div><div class='add'>+ * we need their values afterwards!</div><div class='ctx'>  */</div><div class='add'>+</div><div class='ctx'> 		/* Now check whether we are already mapped, if we</div><div class='ctx'> 		 * are we can skip all this garbage coming up.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -535,33 +180,49 @@ copy_prom_done:</div><div class='ctx'> 		be	go_to_highmem		! this will be a nop then</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='del'>-		set	LOAD_ADDR, %g6</div><div class='add'>+		/* Validate that we are in fact running on an</div><div class='add'>+		 * SRMMU based cpu.</div><div class='add'>+		 */</div><div class='add'>+		set	0x4000, %g6</div><div class='ctx'> 		cmp	%g7, %g6</div><div class='del'>-		bne	remap_not_a_sun4	! This is not a Sun4</div><div class='add'>+		bne	not_a_sun4</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='del'>-		or	%g0, 0x1, %g1</div><div class='del'>-		lduba	[%g1] ASI_CONTROL, %g1	! Only safe to try on Sun4.</div><div class='del'>-		subcc	%g1, 0x24, %g0		! Is this a mutant Sun4/400???</div><div class='del'>-		be	sun4_mutant_remap	! Ugh, it is...</div><div class='add'>+halt_notsup:</div><div class='add'>+		ld	[%g7 + 0x68], %o1</div><div class='add'>+		set	notsup, %o0</div><div class='add'>+		sub	%o0, %l6, %o0</div><div class='add'>+		call	%o1</div><div class='ctx'> 		 nop</div><div class='add'>+		ba	halt_me</div><div class='add'>+		 nop</div><div class='add'>+</div><div class='add'>+not_a_sun4:</div><div class='add'>+		/* It looks like this is a machine we support.</div><div class='add'>+		 * Now find out what MMU we are dealing with</div><div class='add'>+		 * LEON - identified by the psr.impl field</div><div class='add'>+		 * Viking - identified by the psr.impl field</div><div class='add'>+		 * In all other cases a sun4m srmmu.</div><div class='add'>+		 * We check that the MMU is enabled in all cases.</div><div class='add'>+		 */</div><div class='ctx'> </div><div class='del'>-		b	sun4_normal_remap	! regular sun4, 2 level mmu</div><div class='add'>+		/* Check if this is a LEON CPU */</div><div class='add'>+		rd	%psr, %g3</div><div class='add'>+		srl	%g3, PSR_IMPL_SHIFT, %g3</div><div class='add'>+		and	%g3, PSR_IMPL_SHIFTED_MASK, %g3</div><div class='add'>+		cmp	%g3, PSR_IMPL_LEON</div><div class='add'>+		be	leon_remap		/* It is a LEON - jump */</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='del'>-remap_not_a_sun4:</div><div class='del'>-		lda	[%g0] ASI_M_MMUREGS, %g1 ! same as ASI_PTE on sun4c</div><div class='del'>-		and	%g1, 0x1, %g1		! Test SRMMU Enable bit ;-)</div><div class='del'>-		cmp	%g1, 0x0</div><div class='del'>-		be	sun4c_remap		! A sun4c MMU or normal Sun4</div><div class='add'>+		/* Sanity-check, is MMU enabled */</div><div class='add'>+		lda	[%g0] ASI_M_MMUREGS, %g1</div><div class='add'>+		andcc	%g1, 1, %g0</div><div class='add'>+		be	halt_notsup</div><div class='ctx'> 		 nop</div><div class='del'>-srmmu_remap:</div><div class='del'>-		/* First, check for a viking (TI) module. */</div><div class='del'>-		set	0x40000000, %g2</div><div class='del'>-		rd	%psr, %g3</div><div class='del'>-		and	%g2, %g3, %g3</div><div class='del'>-		subcc	%g3, 0x0, %g0</div><div class='del'>-		bz	srmmu_nviking</div><div class='add'>+</div><div class='add'>+		/* Check for a viking (TI) module. */</div><div class='add'>+		cmp	%g3, PSR_IMPL_TI</div><div class='add'>+		bne	srmmu_not_viking</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='ctx'> 		/* Figure out what kind of viking we are on.</div><div class='hunk'>@@ -576,14 +237,14 @@ srmmu_remap:</div><div class='ctx'> 		lda	[%g0] ASI_M_MMUREGS, %g3	! peek in the control reg</div><div class='ctx'> 		and	%g2, %g3, %g3</div><div class='ctx'> 		subcc	%g3, 0x0, %g0</div><div class='del'>-		bnz	srmmu_nviking			! is in mbus mode</div><div class='add'>+		bnz	srmmu_not_viking			! is in mbus mode</div><div class='ctx'> 		 nop</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		rd	%psr, %g3			! DO NOT TOUCH %g3</div><div class='ctx'> 		andn	%g3, PSR_ET, %g2</div><div class='ctx'> 		wr	%g2, 0x0, %psr</div><div class='ctx'> 		WRITE_PAUSE</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		/* Get context table pointer, then convert to</div><div class='ctx'> 		 * a physical address, which is 36 bits.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -606,12 +267,12 @@ srmmu_remap:</div><div class='ctx'> 		lda	[%g4] ASI_M_BYPASS, %o1		! This is a level 1 ptr</div><div class='ctx'> 		srl	%o1, 0x4, %o1			! Clear low 4 bits</div><div class='ctx'> 		sll	%o1, 0x8, %o1			! Make physical</div><div class='del'>-		</div><div class='add'>+</div><div class='ctx'> 		/* Ok, pull in the PTD. */</div><div class='ctx'> 		lda	[%o1] ASI_M_BYPASS, %o2		! This is the 0x0 16MB pgd</div><div class='ctx'> </div><div class='ctx'> 		/* Calculate to KERNBASE entry. */</div><div class='del'>-		add	%o1, KERNBASE &gt;&gt; (SRMMU_PGDIR_SHIFT - 2), %o3		</div><div class='add'>+		add	%o1, KERNBASE &gt;&gt; (SRMMU_PGDIR_SHIFT - 2), %o3</div><div class='ctx'> </div><div class='ctx'> 		/* Poke the entry into the calculated address. */</div><div class='ctx'> 		sta	%o2, [%o3] ASI_M_BYPASS</div><div class='hunk'>@@ -641,12 +302,12 @@ srmmu_remap:</div><div class='ctx'> 		b	go_to_highmem</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='add'>+srmmu_not_viking:</div><div class='ctx'> 		/* This works on viking's in Mbus mode and all</div><div class='ctx'> 		 * other MBUS modules.  It is virtually the same as</div><div class='ctx'> 		 * the above madness sans turning traps off and flipping</div><div class='ctx'> 		 * the AC bit.</div><div class='ctx'> 		 */</div><div class='del'>-srmmu_nviking:</div><div class='ctx'> 		set	AC_M_CTPR, %g1</div><div class='ctx'> 		lda	[%g1] ASI_M_MMUREGS, %g1	! get ctx table ptr</div><div class='ctx'> 		sll	%g1, 0x4, %g1			! make physical addr</div><div class='hunk'>@@ -660,72 +321,29 @@ srmmu_nviking:</div><div class='ctx'> 		b	go_to_highmem</div><div class='ctx'> 		 nop					! wheee....</div><div class='ctx'> </div><div class='del'>-		/* This remaps the kernel on Sun4/4xx machines</div><div class='del'>-		 * that have the Sun Mutant Three Level MMU.</div><div class='del'>-		 * It's like a platypus, Sun didn't have the</div><div class='del'>-		 * SRMMU in conception so they kludged the three</div><div class='del'>-		 * level logic in the regular Sun4 MMU probably.</div><div class='del'>-		 *</div><div class='del'>-		 * Basically, you take each entry in the top level</div><div class='del'>-		 * directory that maps the low 3MB starting at</div><div class='del'>-		 * address zero and put the mapping in the KERNBASE</div><div class='del'>-		 * slots.  These top level pgd's are called regmaps.</div><div class='del'>-		 */</div><div class='del'>-sun4_mutant_remap:</div><div class='del'>-		or	%g0, %g0, %g3		! source base</div><div class='del'>-		sethi	%hi(KERNBASE), %g4	! destination base</div><div class='del'>-		or	%g4, %lo(KERNBASE), %g4</div><div class='del'>-		sethi	%hi(0x300000), %g5</div><div class='del'>-		or	%g5, %lo(0x300000), %g5	! upper bound 3MB</div><div class='del'>-		or	%g0, 0x1, %l6</div><div class='del'>-		sll	%l6, 24, %l6		! Regmap mapping size</div><div class='del'>-		add	%g3, 0x2, %g3		! Base magic</div><div class='del'>-		add	%g4, 0x2, %g4		! Base magic</div><div class='del'>-</div><div class='del'>-		/* Main remapping loop on Sun4-Mutant-MMU.</div><div class='del'>-		 * "I am not an animal..." -Famous Mutant Person</div><div class='del'>-		 */</div><div class='del'>-sun4_mutant_loop:</div><div class='del'>-		lduha	[%g3] ASI_REGMAP, %g2	! Get lower entry</div><div class='del'>-		stha	%g2, [%g4] ASI_REGMAP	! Store in high entry</div><div class='del'>-		add	%g4, %l6, %g4		! Move up high memory ptr</div><div class='del'>-		subcc	%g3, %g5, %g0		! Reached our limit?</div><div class='del'>-		blu	sun4_mutant_loop	! Nope, loop again</div><div class='del'>-		 add	%g3, %l6, %g3		! delay, Move up low ptr</div><div class='del'>-		b	go_to_highmem		! Jump to high memory.</div><div class='del'>-		 nop</div><div class='ctx'> </div><div class='del'>-		/* The following is for non-4/4xx sun4 MMU's. */</div><div class='del'>-sun4_normal_remap:</div><div class='del'>-		mov	0, %g3			! source base</div><div class='del'>-		set	KERNBASE, %g4		! destination base</div><div class='del'>-		set	0x300000, %g5		! upper bound 3MB</div><div class='del'>-		mov	1, %l6</div><div class='del'>-		sll	%l6, 18, %l6		! sun4 mmu segmap size</div><div class='del'>-sun4_normal_loop:</div><div class='del'>-		lduha	[%g3] ASI_SEGMAP, %g6	! load phys_seg</div><div class='del'>-		stha	%g6, [%g4] ASI_SEGMAP	! stort new virt mapping</div><div class='del'>-		add	%g3, %l6, %g3		! increment source pointer</div><div class='del'>-		subcc	%g3, %g5, %g0		! reached limit?</div><div class='del'>-		blu	sun4_normal_loop	! nope, loop again</div><div class='del'>-		 add	%g4, %l6, %g4		! delay, increment dest ptr</div><div class='del'>-		b	go_to_highmem</div><div class='add'>+leon_remap:</div><div class='add'>+		/* Sanity-check, is MMU enabled */</div><div class='add'>+		lda	[%g0] ASI_LEON_MMUREGS, %g1</div><div class='add'>+		andcc	%g1, 1, %g0</div><div class='add'>+		be	halt_notsup</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='del'>-		/* The following works for Sun4c MMU's */</div><div class='del'>-sun4c_remap:</div><div class='del'>-		mov	0, %g3			! source base</div><div class='del'>-		set	KERNBASE, %g4		! destination base</div><div class='del'>-		set	0x300000, %g5		! upper bound 3MB</div><div class='del'>-		mov	1, %l6</div><div class='del'>-		sll	%l6, 18, %l6		! sun4c mmu segmap size</div><div class='del'>-sun4c_remap_loop:</div><div class='del'>-		lda	[%g3] ASI_SEGMAP, %g6	! load phys_seg</div><div class='del'>-		sta	%g6, [%g4] ASI_SEGMAP   ! store new virt mapping</div><div class='del'>-		add	%g3, %l6, %g3		! Increment source ptr</div><div class='del'>-		subcc	%g3, %g5, %g0		! Reached limit?</div><div class='del'>-		bl	sun4c_remap_loop	! Nope, loop again</div><div class='del'>-		 add	%g4, %l6, %g4		! delay, Increment dest ptr</div><div class='add'>+		/* Same code as in the srmmu_not_viking case,</div><div class='add'>+		 * with the LEON ASI for mmuregs</div><div class='add'>+		 */</div><div class='add'>+		set	AC_M_CTPR, %g1</div><div class='add'>+		lda	[%g1] ASI_LEON_MMUREGS, %g1	! get ctx table ptr</div><div class='add'>+		sll	%g1, 0x4, %g1			! make physical addr</div><div class='add'>+		lda	[%g1] ASI_M_BYPASS, %g1		! ptr to level 1 pg_table</div><div class='add'>+		srl	%g1, 0x4, %g1</div><div class='add'>+		sll	%g1, 0x8, %g1			! make phys addr for l1 tbl</div><div class='add'>+</div><div class='add'>+		lda	[%g1] ASI_M_BYPASS, %g2		! get level1 entry for 0x0</div><div class='add'>+		add	%g1, KERNBASE &gt;&gt; (SRMMU_PGDIR_SHIFT - 2), %g3</div><div class='add'>+		sta	%g2, [%g3] ASI_M_BYPASS		! place at KERNBASE entry</div><div class='add'>+		b	go_to_highmem</div><div class='add'>+		 nop					! wheee....</div><div class='ctx'> </div><div class='ctx'> /* Now do a non-relative jump so that PC is in high-memory */</div><div class='ctx'> go_to_highmem:</div><div class='hunk'>@@ -750,35 +368,13 @@ execute_in_high_mem:</div><div class='ctx'> 		sethi	%hi(linux_dbvec), %g1</div><div class='ctx'> 		st	%o1, [%g1 + %lo(linux_dbvec)]</div><div class='ctx'> </div><div class='del'>-		ld	[%o0 + 0x4], %o3</div><div class='del'>-		and	%o3, 0x3, %o5			! get the version</div><div class='del'>-</div><div class='del'>-		cmp	%o3, 0x2			! a v2 prom?</div><div class='del'>-		be	found_version</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-		/* paul@sfe.com.au */</div><div class='del'>-		cmp	%o3, 0x3			! a v3 prom?</div><div class='del'>-		be	found_version</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-/* Old sun4's pass our load address into %o0 instead of the prom</div><div class='del'>- * pointer. On sun4's you have to hard code the romvec pointer into</div><div class='del'>- * your code. Sun probably still does that because they don't even</div><div class='del'>- * trust their own "OpenBoot" specifications.</div><div class='del'>- */</div><div class='del'>-		set	LOAD_ADDR, %g6</div><div class='del'>-		cmp	%o0, %g6		! an old sun4?</div><div class='del'>-		be	sun4_init</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-found_version:</div><div class='del'>-/* Get the machine type via the mysterious romvec node operations. */</div><div class='del'>-</div><div class='del'>-		add	%g7, 0x1c, %l1		</div><div class='add'>+		/* Get the machine type via the romvec</div><div class='add'>+		 * getprops node operation</div><div class='add'>+		 */</div><div class='add'>+		add	%g7, 0x1c, %l1</div><div class='ctx'> 		ld	[%l1], %l0</div><div class='ctx'> 		ld	[%l0], %l0</div><div class='del'>-		call 	%l0</div><div class='add'>+		call	%l0</div><div class='ctx'> 		 or	%g0, %g0, %o0		! next_node(0) = first_node</div><div class='ctx'> 		or	%o0, %g0, %g6</div><div class='ctx'> </div><div class='hunk'>@@ -786,31 +382,49 @@ found_version:</div><div class='ctx'> 		or	%o1, %lo(cputypvar), %o1</div><div class='ctx'> 		sethi	%hi(cputypval), %o2	! information, the string</div><div class='ctx'> 		or	%o2, %lo(cputypval), %o2</div><div class='del'>-		ld	[%l1], %l0		! 'compatibility' tells</div><div class='add'>+		ld	[%l1], %l0		! 'compatible' tells</div><div class='ctx'> 		ld	[%l0 + 0xc], %l0	! that we want 'sun4x' where</div><div class='del'>-		call	%l0			! x is one of '', 'c', 'm',</div><div class='del'>-		 nop				! 'd' or 'e'. %o2 holds pointer</div><div class='add'>+		call	%l0			! x is one of 'm', 'd' or 'e'.</div><div class='add'>+		 nop				! %o2 holds pointer</div><div class='ctx'> 						! to a buf where above string</div><div class='ctx'> 						! will get stored by the prom.</div><div class='ctx'> </div><div class='del'>-		subcc	%o0, %g0, %g0</div><div class='del'>-		bpos	got_prop		! Got the property</div><div class='del'>-		 nop</div><div class='ctx'> </div><div class='del'>-		or	%g6, %g0, %o0</div><div class='del'>-		sethi	%hi(cputypvar_sun4m), %o1</div><div class='del'>-		or	%o1, %lo(cputypvar_sun4m), %o1</div><div class='del'>-		sethi	%hi(cputypval), %o2</div><div class='del'>-		or	%o2, %lo(cputypval), %o2</div><div class='del'>-		ld	[%l1], %l0</div><div class='del'>-		ld	[%l0 + 0xc], %l0</div><div class='del'>-		call	%l0</div><div class='add'>+		/* Check value of "compatible" property.</div><div class='add'>+		 * "value" =&gt; "model"</div><div class='add'>+		 * leon =&gt; sparc_leon</div><div class='add'>+		 * sun4m =&gt; sun4m</div><div class='add'>+		 * sun4s =&gt; sun4m</div><div class='add'>+		 * sun4d =&gt; sun4d</div><div class='add'>+		 * sun4e =&gt; "no_sun4e_here"</div><div class='add'>+		 * '*'   =&gt; "no_sun4u_here"</div><div class='add'>+		 * Check single letters only</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		set	cputypval, %o2</div><div class='add'>+		/* If cputypval[0] == 'l' (lower case letter L) this is leon */</div><div class='add'>+		ldub	[%o2], %l1</div><div class='add'>+		cmp	%l1, 'l'</div><div class='add'>+		be	leon_init</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='del'>-got_prop:</div><div class='del'>-#ifdef CONFIG_SPARC_LEON</div><div class='del'>-	        /* no cpu-type check is needed, it is a SPARC-LEON */</div><div class='add'>+		/* Check cputypval[4] to find the sun model */</div><div class='add'>+		ldub	[%o2 + 0x4], %l1</div><div class='add'>+</div><div class='add'>+		cmp	%l1, 'm'</div><div class='add'>+		be	sun4m_init</div><div class='add'>+		 cmp	%l1, 's'</div><div class='add'>+		be	sun4m_init</div><div class='add'>+		 cmp	%l1, 'd'</div><div class='add'>+		be	sun4d_init</div><div class='add'>+		 cmp	%l1, 'e'</div><div class='add'>+		be	no_sun4e_here		! Could be a sun4e.</div><div class='add'>+		 nop</div><div class='add'>+		b	no_sun4u_here		! AIEEE, a V9 sun4u... Get our BIG BROTHER kernel :))</div><div class='add'>+		 nop</div><div class='ctx'> </div><div class='add'>+leon_init:</div><div class='add'>+		/* LEON CPU - set boot_cpu_id */</div><div class='ctx'> 		sethi	%hi(boot_cpu_id), %g2	! boot-cpu index</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='hunk'>@@ -826,43 +440,7 @@ got_prop:</div><div class='ctx'> 		/* Update boot_cpu_id only on boot cpu */</div><div class='ctx'> 		stub	%g1, [%g2 + %lo(boot_cpu_id)]</div><div class='ctx'> </div><div class='del'>-		ba sun4c_continue_boot</div><div class='del'>-		 nop</div><div class='del'>-#endif</div><div class='del'>-		set	cputypval, %o2</div><div class='del'>-		ldub	[%o2 + 0x4], %l1</div><div class='del'>-</div><div class='del'>-		cmp	%l1, ' '</div><div class='del'>-		be	1f</div><div class='del'>-		 cmp	%l1, 'c'</div><div class='del'>-		be	1f</div><div class='del'>-		 cmp	%l1, 'm'</div><div class='del'>-		be	1f</div><div class='del'>-		 cmp	%l1, 's'</div><div class='del'>-		be	1f</div><div class='del'>-		 cmp	%l1, 'd'</div><div class='del'>-		be	1f</div><div class='del'>-		 cmp	%l1, 'e'</div><div class='del'>-		be	no_sun4e_here		! Could be a sun4e.</div><div class='del'>-		 nop</div><div class='del'>-		b	no_sun4u_here		! AIEEE, a V9 sun4u... Get our BIG BROTHER kernel :))</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-1:		set	cputypval, %l1</div><div class='del'>-		ldub	[%l1 + 0x4], %l1</div><div class='del'>-		cmp	%l1, 'm'		! Test for sun4d, sun4e ?</div><div class='del'>-		be	sun4m_init</div><div class='del'>-		 cmp	%l1, 's'		! Treat sun4s as sun4m</div><div class='del'>-		be	sun4m_init</div><div class='del'>-		 cmp	%l1, 'd'		! Let us see how the beast will die</div><div class='del'>-		be	sun4d_init</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-		/* Jump into mmu context zero. */</div><div class='del'>-		set	AC_CONTEXT, %g1</div><div class='del'>-		stba	%g0, [%g1] ASI_CONTROL</div><div class='del'>-</div><div class='del'>-		b	sun4c_continue_boot</div><div class='add'>+		ba continue_boot</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='ctx'> /* CPUID in bootbus can be found at PA 0xff0140000 */</div><div class='hunk'>@@ -892,66 +470,6 @@ sun4d_init:</div><div class='ctx'> 	/* Fall through to sun4m_init */</div><div class='ctx'> </div><div class='ctx'> sun4m_init:</div><div class='del'>-	/* XXX Fucking Cypress... */</div><div class='del'>-	lda	[%g0] ASI_M_MMUREGS, %g5</div><div class='del'>-	srl	%g5, 28, %g4</div><div class='del'>-</div><div class='del'>-	cmp	%g4, 1</div><div class='del'>-	bne	1f</div><div class='del'>-	 srl	%g5, 24, %g4</div><div class='del'>-</div><div class='del'>-	and	%g4, 0xf, %g4</div><div class='del'>-	cmp	%g4, 7		/* This would be a HyperSparc. */</div><div class='del'>-</div><div class='del'>-	bne	2f</div><div class='del'>-	 nop</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-</div><div class='del'>-#define PATCH_IT(dst, src)	\</div><div class='del'>-	set	(dst), %g5;	\</div><div class='del'>-	set	(src), %g4;	\</div><div class='del'>-	ld	[%g4], %g3;	\</div><div class='del'>-	st	%g3, [%g5];	\</div><div class='del'>-	ld	[%g4+0x4], %g3;	\</div><div class='del'>-	st	%g3, [%g5+0x4];</div><div class='del'>-</div><div class='del'>-	/* Signed multiply. */</div><div class='del'>-	PATCH_IT(.mul, .mul_patch)</div><div class='del'>-	PATCH_IT(.mul+0x08, .mul_patch+0x08)</div><div class='del'>-</div><div class='del'>-	/* Signed remainder. */</div><div class='del'>-	PATCH_IT(.rem, .rem_patch)</div><div class='del'>-	PATCH_IT(.rem+0x08, .rem_patch+0x08)</div><div class='del'>-	PATCH_IT(.rem+0x10, .rem_patch+0x10)</div><div class='del'>-	PATCH_IT(.rem+0x18, .rem_patch+0x18)</div><div class='del'>-	PATCH_IT(.rem+0x20, .rem_patch+0x20)</div><div class='del'>-	PATCH_IT(.rem+0x28, .rem_patch+0x28)</div><div class='del'>-</div><div class='del'>-	/* Signed division. */</div><div class='del'>-	PATCH_IT(.div, .div_patch)</div><div class='del'>-	PATCH_IT(.div+0x08, .div_patch+0x08)</div><div class='del'>-	PATCH_IT(.div+0x10, .div_patch+0x10)</div><div class='del'>-	PATCH_IT(.div+0x18, .div_patch+0x18)</div><div class='del'>-	PATCH_IT(.div+0x20, .div_patch+0x20)</div><div class='del'>-</div><div class='del'>-	/* Unsigned multiply. */</div><div class='del'>-	PATCH_IT(.umul, .umul_patch)</div><div class='del'>-	PATCH_IT(.umul+0x08, .umul_patch+0x08)</div><div class='del'>-</div><div class='del'>-	/* Unsigned remainder. */</div><div class='del'>-	PATCH_IT(.urem, .urem_patch)</div><div class='del'>-	PATCH_IT(.urem+0x08, .urem_patch+0x08)</div><div class='del'>-	PATCH_IT(.urem+0x10, .urem_patch+0x10)</div><div class='del'>-	PATCH_IT(.urem+0x18, .urem_patch+0x18)</div><div class='del'>-</div><div class='del'>-	/* Unsigned division. */</div><div class='del'>-	PATCH_IT(.udiv, .udiv_patch)</div><div class='del'>-	PATCH_IT(.udiv+0x08, .udiv_patch+0x08)</div><div class='del'>-	PATCH_IT(.udiv+0x10, .udiv_patch+0x10)</div><div class='del'>-</div><div class='del'>-#undef PATCH_IT</div><div class='del'>-</div><div class='ctx'> /* Ok, the PROM could have done funny things and apple cider could still</div><div class='ctx'>  * be sitting in the fault status/address registers.  Read them all to</div><div class='ctx'>  * clear them so we don't get magic faults later on.</div><div class='hunk'>@@ -959,10 +477,10 @@ sun4m_init:</div><div class='ctx'> /* This sucks, apparently this makes Vikings call prom panic, will fix later */</div><div class='ctx'> 2:</div><div class='ctx'> 		rd	%psr, %o1</div><div class='del'>-		srl	%o1, 28, %o1		! Get a type of the CPU</div><div class='add'>+		srl	%o1, PSR_IMPL_SHIFT, %o1	! Get a type of the CPU</div><div class='ctx'> </div><div class='del'>-		subcc	%o1, 4, %g0		! TI: Viking or MicroSPARC</div><div class='del'>-		be	sun4c_continue_boot</div><div class='add'>+		subcc	%o1, PSR_IMPL_TI, %g0		! TI: Viking or MicroSPARC</div><div class='add'>+		be	continue_boot</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='ctx'> 		set	AC_M_SFSR, %o0</div><div class='hunk'>@@ -972,7 +490,7 @@ sun4m_init:</div><div class='ctx'> </div><div class='ctx'> 		/* Fujitsu MicroSPARC-II has no asynchronous flavors of FARs */</div><div class='ctx'> 		subcc	%o1, 0, %g0</div><div class='del'>-		be	sun4c_continue_boot</div><div class='add'>+		be	continue_boot</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='ctx'> 		set	AC_M_AFSR, %o0</div><div class='hunk'>@@ -982,16 +500,11 @@ sun4m_init:</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-sun4c_continue_boot:</div><div class='del'>-</div><div class='add'>+continue_boot:</div><div class='ctx'> </div><div class='ctx'> /* Aieee, now set PC and nPC, enable traps, give ourselves a stack and it's</div><div class='ctx'>  * show-time!</div><div class='ctx'>  */</div><div class='del'>-</div><div class='del'>-		sethi	%hi(cputyp), %o0</div><div class='del'>-		st	%g4, [%o0 + %lo(cputyp)]</div><div class='del'>-</div><div class='ctx'> 		/* Turn on Supervisor, EnableFloating, and all the PIL bits.</div><div class='ctx'> 		 * Also puts us in register window zero with traps off.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -1009,7 +522,7 @@ sun4c_continue_boot:</div><div class='ctx'> 		set	__bss_start , %o0	! First address of BSS</div><div class='ctx'> 		set	_end , %o1		! Last address of BSS</div><div class='ctx'> 		add	%o0, 0x1, %o0</div><div class='del'>-1:	</div><div class='add'>+1:</div><div class='ctx'> 		stb	%g0, [%o0]</div><div class='ctx'> 		subcc	%o0, %o1, %g0</div><div class='ctx'> 		bl	1b</div><div class='hunk'>@@ -1026,10 +539,7 @@ sun4c_continue_boot:</div><div class='ctx'> 		mov	%g0, %g3</div><div class='ctx'> 		stub	%g3, [%g2 + %lo(boot_cpu_id)]</div><div class='ctx'> </div><div class='del'>-1:		/* boot_cpu_id set. calculate boot_cpu_id4 = boot_cpu_id*4 */</div><div class='del'>-		sll	%g3, 2, %g3</div><div class='del'>-		sethi	%hi(boot_cpu_id4), %g2</div><div class='del'>-		stub	%g3, [%g2 + %lo(boot_cpu_id4)]</div><div class='add'>+1:		sll	%g3, 2, %g3</div><div class='ctx'> </div><div class='ctx'> 		/* Initialize the uwinmask value for init task just in case.</div><div class='ctx'> 		 * But first make current_set[boot_cpu_id] point to something useful.</div><div class='hunk'>@@ -1078,7 +588,7 @@ sun4c_continue_boot:</div><div class='ctx'> 		set	dest, %g2; \</div><div class='ctx'> 		ld	[%g5], %g4; \</div><div class='ctx'> 		st	%g4, [%g2];</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 		/* Patch for window spills... */</div><div class='ctx'> 		PATCH_INSN(spnwin_patch1_7win, spnwin_patch1)</div><div class='ctx'> 		PATCH_INSN(spnwin_patch2_7win, spnwin_patch2)</div><div class='hunk'>@@ -1129,7 +639,7 @@ sun4c_continue_boot:</div><div class='ctx'> 		st	%g4, [%g5 + 0x18]</div><div class='ctx'> 		st	%g4, [%g5 + 0x1c]</div><div class='ctx'> </div><div class='del'>-2:		</div><div class='add'>+2:</div><div class='ctx'> 		sethi	%hi(nwindows), %g4</div><div class='ctx'> 		st	%g3, [%g4 + %lo(nwindows)]	! store final value</div><div class='ctx'> 		sub	%g3, 0x1, %g3</div><div class='hunk'>@@ -1149,35 +659,16 @@ sun4c_continue_boot:</div><div class='ctx'> 		wr	%g3, PSR_ET, %psr</div><div class='ctx'> 		WRITE_PAUSE</div><div class='ctx'> </div><div class='del'>-		/* First we call prom_init() to set up PROMLIB, then</div><div class='del'>-		 * off to start_kernel().</div><div class='del'>-		 */</div><div class='del'>-</div><div class='add'>+		/* Call sparc32_start_kernel(struct linux_romvec *rp) */</div><div class='ctx'> 		sethi	%hi(prom_vector_p), %g5</div><div class='ctx'> 		ld	[%g5 + %lo(prom_vector_p)], %o0</div><div class='del'>-		call	prom_init</div><div class='add'>+		call	sparc32_start_kernel</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='del'>-		call 	start_kernel</div><div class='del'>-		 nop</div><div class='del'>-	</div><div class='ctx'> 		/* We should not get here. */</div><div class='ctx'> 		call	halt_me</div><div class='ctx'> 		 nop</div><div class='ctx'> </div><div class='del'>-sun4_init:</div><div class='del'>-		sethi   %hi(SUN4_PROM_VECTOR+0x84), %o1</div><div class='del'>-		ld      [%o1 + %lo(SUN4_PROM_VECTOR+0x84)], %o1</div><div class='del'>-		set     sun4_notsup, %o0</div><div class='del'>-		call    %o1	/* printf */</div><div class='del'>-		 nop</div><div class='del'>-		sethi   %hi(SUN4_PROM_VECTOR+0xc4), %o1</div><div class='del'>-		ld      [%o1 + %lo(SUN4_PROM_VECTOR+0xc4)], %o1</div><div class='del'>-		call    %o1	/* exittomon */</div><div class='del'>-		 nop</div><div class='del'>-1:		ba      1b                      ! Cannot exit into KMON</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='ctx'> no_sun4e_here:</div><div class='ctx'> 		ld	[%g7 + 0x68], %o1</div><div class='ctx'> 		set	sun4e_notsup, %o0</div><div class='hunk'>@@ -1204,7 +695,7 @@ sun4u_5:</div><div class='ctx'> 		.asciz "write"</div><div class='ctx'> 		.align	4</div><div class='ctx'> sun4u_6:</div><div class='del'>-        	.asciz  "\n\rOn sun4u you have to use UltraLinux (64bit) kernel\n\rand not a 32bit sun4[cdem] version\n\r\n\r"</div><div class='add'>+		.asciz  "\n\rOn sun4u you have to use sparc64 kernel\n\rand not a sparc32 version\n\r\n\r"</div><div class='ctx'> sun4u_6e:</div><div class='ctx'> 		.align	4</div><div class='ctx'> sun4u_7:</div><div class='head'>diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S<br/>index 0d810c2f1d00..b42ddbf9651e 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/head_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/head_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/head_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/head_64.S</a></div><div class='hunk'>@@ -906,7 +906,7 @@ swapper_4m_tsb:</div><div class='ctx'> 	 * error and will instead write junk into the relocation and</div><div class='ctx'> 	 * you'll have an unbootable kernel.</div><div class='ctx'> 	 */</div><div class='del'>-#include "ttable.S"</div><div class='add'>+#include "ttable_64.S"</div><div class='ctx'> </div><div class='ctx'> ! 0x0000000000428000</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/kernel/idprom.c b/arch/sparc/kernel/idprom.c<br/>index 9167db40720e..6bd75012109d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/idprom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/idprom.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/idprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/idprom.c</a></div><div class='hunk'>@@ -25,22 +25,9 @@ static struct idprom idprom_buffer;</div><div class='ctx'>  * of the Sparc CPU and have a meaningful IDPROM machtype value that we</div><div class='ctx'>  * know about.  See asm-sparc/machines.h for empirical constants.</div><div class='ctx'>  */</div><div class='del'>-static struct Sun_Machine_Models Sun_Machines[NUM_SUN_MACHINES] = {</div><div class='del'>-/* First, Sun4's */</div><div class='del'>-{ .name = "Sun 4/100 Series",        .id_machtype = (SM_SUN4 | SM_4_110) },</div><div class='del'>-{ .name = "Sun 4/200 Series",        .id_machtype = (SM_SUN4 | SM_4_260) },</div><div class='del'>-{ .name = "Sun 4/300 Series",        .id_machtype = (SM_SUN4 | SM_4_330) },</div><div class='del'>-{ .name = "Sun 4/400 Series",        .id_machtype = (SM_SUN4 | SM_4_470) },</div><div class='del'>-/* Now Leon */</div><div class='add'>+static struct Sun_Machine_Models Sun_Machines[] = {</div><div class='add'>+/* First, Leon */</div><div class='ctx'> { .name = "Leon3 System-on-a-Chip",  .id_machtype = (M_LEON | M_LEON3_SOC) },</div><div class='del'>-/* Now, Sun4c's */</div><div class='del'>-{ .name = "Sun4c SparcStation 1",    .id_machtype = (SM_SUN4C | SM_4C_SS1) },</div><div class='del'>-{ .name = "Sun4c SparcStation IPC",  .id_machtype = (SM_SUN4C | SM_4C_IPC) },</div><div class='del'>-{ .name = "Sun4c SparcStation 1+",   .id_machtype = (SM_SUN4C | SM_4C_SS1PLUS) },</div><div class='del'>-{ .name = "Sun4c SparcStation SLC",  .id_machtype = (SM_SUN4C | SM_4C_SLC) },</div><div class='del'>-{ .name = "Sun4c SparcStation 2",    .id_machtype = (SM_SUN4C | SM_4C_SS2) },</div><div class='del'>-{ .name = "Sun4c SparcStation ELC",  .id_machtype = (SM_SUN4C | SM_4C_ELC) },</div><div class='del'>-{ .name = "Sun4c SparcStation IPX",  .id_machtype = (SM_SUN4C | SM_4C_IPX) },</div><div class='ctx'> /* Finally, early Sun4m's */</div><div class='ctx'> { .name = "Sun4m SparcSystem600",    .id_machtype = (SM_SUN4M | SM_4M_SS60) },</div><div class='ctx'> { .name = "Sun4m SparcStation10/20", .id_machtype = (SM_SUN4M | SM_4M_SS50) },</div><div class='hunk'>@@ -53,7 +40,7 @@ static void __init display_system_type(unsigned char machtype)</div><div class='ctx'> 	char sysname[128];</div><div class='ctx'> 	register int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; NUM_SUN_MACHINES; i++) {</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(Sun_Machines); i++) {</div><div class='ctx'> 		if (Sun_Machines[i].id_machtype == machtype) {</div><div class='ctx'> 			if (machtype != (SM_SUN4M_OBP | 0x00) ||</div><div class='ctx'> 			    prom_getproperty(prom_root_node, "banner-name",</div><div class='head'>diff --git a/arch/sparc/kernel/init_task.c b/arch/sparc/kernel/init_task.c<br/>deleted file mode 100644<br/>index 35f141a9f506..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='del'>-</div><div class='del'>-/* .text section in head.S is aligned at 8k boundary and this gets linked</div><div class='del'>- * right after that so that the init_thread_union is aligned properly as well.</div><div class='del'>- * If this is not aligned on a 8k boundary, then you should change code</div><div class='del'>- * in etrap.S which assumes it.</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='head'>diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c<br/>index 21bd73943f7f..0f094db918c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/ioport.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/ioport.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/ioport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/ioport.c</a></div><div class='hunk'>@@ -50,20 +50,18 @@</div><div class='ctx'> #include &lt;asm/io-unit.h&gt;</div><div class='ctx'> #include &lt;asm/leon.h&gt;</div><div class='ctx'> </div><div class='add'>+const struct sparc32_dma_ops *sparc32_dma_ops;</div><div class='add'>+</div><div class='ctx'> /* This function must make sure that caches and memory are coherent after DMA</div><div class='ctx'>  * On LEON systems without cache snooping it flushes the entire D-CACHE.</div><div class='ctx'>  */</div><div class='del'>-#ifndef CONFIG_SPARC_LEON</div><div class='del'>-static inline void dma_make_coherent(unsigned long pa, unsigned long len)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-#else</div><div class='ctx'> static inline void dma_make_coherent(unsigned long pa, unsigned long len)</div><div class='ctx'> {</div><div class='del'>-	if (!sparc_leon3_snooping_enabled())</div><div class='del'>-		leon_flush_dcache_all();</div><div class='add'>+	if (sparc_cpu_model == sparc_leon) {</div><div class='add'>+		if (!sparc_leon3_snooping_enabled())</div><div class='add'>+			leon_flush_dcache_all();</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz);</div><div class='ctx'> static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,</div><div class='hunk'>@@ -229,7 +227,7 @@ _sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pa &amp;= PAGE_MASK;</div><div class='del'>-	sparc_mapiorange(bus, pa, res-&gt;start, resource_size(res));</div><div class='add'>+	srmmu_mapiorange(bus, pa, res-&gt;start, resource_size(res));</div><div class='ctx'> </div><div class='ctx'> 	return (void __iomem *)(unsigned long)(res-&gt;start + offset);</div><div class='ctx'> }</div><div class='hunk'>@@ -243,7 +241,7 @@ static void _sparc_free_io(struct resource *res)</div><div class='ctx'> </div><div class='ctx'> 	plen = resource_size(res);</div><div class='ctx'> 	BUG_ON((plen &amp; (PAGE_SIZE-1)) != 0);</div><div class='del'>-	sparc_unmapiorange(res-&gt;start, plen);</div><div class='add'>+	srmmu_unmapiorange(res-&gt;start, plen);</div><div class='ctx'> 	release_resource(res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -292,13 +290,13 @@ static void *sbus_alloc_coherent(struct device *dev, size_t len,</div><div class='ctx'> 		goto err_nova;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	// XXX The mmu_map_dma_area does this for us below, see comments.</div><div class='del'>-	// sparc_mapiorange(0, virt_to_phys(va), res-&gt;start, len_total);</div><div class='add'>+	// XXX The sbus_map_dma_area does this for us below, see comments.</div><div class='add'>+	// srmmu_mapiorange(0, virt_to_phys(va), res-&gt;start, len_total);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * XXX That's where sdev would be used. Currently we load</div><div class='ctx'> 	 * all iommu tables with the same translations.</div><div class='ctx'> 	 */</div><div class='del'>-	if (mmu_map_dma_area(dev, dma_addrp, va, res-&gt;start, len_total) != 0)</div><div class='add'>+	if (sbus_map_dma_area(dev, dma_addrp, va, res-&gt;start, len_total) != 0)</div><div class='ctx'> 		goto err_noiommu;</div><div class='ctx'> </div><div class='ctx'> 	res-&gt;name = op-&gt;dev.of_node-&gt;name;</div><div class='hunk'>@@ -343,7 +341,7 @@ static void sbus_free_coherent(struct device *dev, size_t n, void *p,</div><div class='ctx'> 	kfree(res);</div><div class='ctx'> </div><div class='ctx'> 	pgv = virt_to_page(p);</div><div class='del'>-	mmu_unmap_dma_area(dev, ba, n);</div><div class='add'>+	sbus_unmap_dma_area(dev, ba, n);</div><div class='ctx'> </div><div class='ctx'> 	__free_pages(pgv, get_order(n));</div><div class='ctx'> }</div><div class='hunk'>@@ -381,11 +379,6 @@ static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n,</div><div class='ctx'> 		       enum dma_data_direction dir, struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	mmu_get_scsi_sgl(dev, sg, n);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * XXX sparc64 can return a partial length here. sun4c should do this</div><div class='del'>-	 * but it currently panics if it can't fulfill the request - Anton</div><div class='del'>-	 */</div><div class='ctx'> 	return n;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -430,9 +423,6 @@ arch_initcall(sparc_register_ioport);</div><div class='ctx'> #endif /* CONFIG_SBUS */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/* LEON reuses PCI DMA ops */</div><div class='del'>-#if defined(CONFIG_PCI) || defined(CONFIG_SPARC_LEON)</div><div class='del'>-</div><div class='ctx'> /* Allocate and map kernel buffer using consistent mode DMA for a device.</div><div class='ctx'>  * hwdev should be valid struct pci_dev pointer for PCI devices.</div><div class='ctx'>  */</div><div class='hunk'>@@ -469,7 +459,7 @@ static void *pci32_alloc_coherent(struct device *dev, size_t len,</div><div class='ctx'> 		printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total);</div><div class='ctx'> 		goto err_nova;</div><div class='ctx'> 	}</div><div class='del'>-	sparc_mapiorange(0, virt_to_phys(va), res-&gt;start, len_total);</div><div class='add'>+	srmmu_mapiorange(0, virt_to_phys(va), res-&gt;start, len_total);</div><div class='ctx'> </div><div class='ctx'> 	*pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */</div><div class='ctx'> 	return (void *) res-&gt;start;</div><div class='hunk'>@@ -514,7 +504,7 @@ static void pci32_free_coherent(struct device *dev, size_t n, void *p,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dma_make_coherent(ba, n);</div><div class='del'>-	sparc_unmapiorange((unsigned long)p, n);</div><div class='add'>+	srmmu_unmapiorange((unsigned long)p, n);</div><div class='ctx'> </div><div class='ctx'> 	release_resource(res);</div><div class='ctx'> 	kfree(res);</div><div class='hunk'>@@ -660,14 +650,11 @@ struct dma_map_ops pci32_dma_ops = {</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL(pci32_dma_ops);</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_PCI || CONFIG_SPARC_LEON */</div><div class='add'>+/* leon re-uses pci32_dma_ops */</div><div class='add'>+struct dma_map_ops *leon_dma_ops = &amp;pci32_dma_ops;</div><div class='add'>+EXPORT_SYMBOL(leon_dma_ops);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPARC_LEON</div><div class='del'>-struct dma_map_ops *dma_ops = &amp;pci32_dma_ops;</div><div class='del'>-#elif defined(CONFIG_SBUS)</div><div class='ctx'> struct dma_map_ops *dma_ops = &amp;sbus_dma_ops;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> EXPORT_SYMBOL(dma_ops);</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/kernel/irq.h b/arch/sparc/kernel/irq.h<br/>index 5a021dd2f854..b66b6aad1d6d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/irq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/irq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/irq.h</a></div><div class='hunk'>@@ -1,6 +1,5 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_type.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct irq_bucket {</div><div class='hunk'>@@ -10,6 +9,9 @@ struct irq_bucket {</div><div class='ctx'>         unsigned int pil;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define SUN4M_HARD_INT(x)       (0x000000001 &lt;&lt; (x))</div><div class='add'>+#define SUN4M_SOFT_INT(x)       (0x000010000 &lt;&lt; (x))</div><div class='add'>+</div><div class='ctx'> #define SUN4D_MAX_BOARD 10</div><div class='ctx'> #define SUN4D_MAX_IRQ ((SUN4D_MAX_BOARD + 2) &lt;&lt; 5)</div><div class='ctx'> </div><div class='hunk'>@@ -41,52 +43,46 @@ struct sun4m_irq_global {</div><div class='ctx'> extern struct sun4m_irq_percpu __iomem *sun4m_irq_percpu[SUN4M_NCPUS];</div><div class='ctx'> extern struct sun4m_irq_global __iomem *sun4m_irq_global;</div><div class='ctx'> </div><div class='add'>+/* The following definitions describe the individual platform features: */</div><div class='add'>+#define FEAT_L10_CLOCKSOURCE (1 &lt;&lt; 0) /* L10 timer is used as a clocksource */</div><div class='add'>+#define FEAT_L10_CLOCKEVENT  (1 &lt;&lt; 1) /* L10 timer is used as a clockevent */</div><div class='add'>+#define FEAT_L14_ONESHOT     (1 &lt;&lt; 2) /* L14 timer clockevent can oneshot */</div><div class='add'>+</div><div class='ctx'> /*</div><div class='del'>- * Platform specific irq configuration</div><div class='add'>+ * Platform specific configuration</div><div class='ctx'>  * The individual platforms assign their platform</div><div class='ctx'>  * specifics in their init functions.</div><div class='ctx'>  */</div><div class='del'>-struct sparc_irq_config {</div><div class='del'>-	void (*init_timers)(irq_handler_t);</div><div class='add'>+struct sparc_config {</div><div class='add'>+	void (*init_timers)(void);</div><div class='ctx'> 	unsigned int (*build_device_irq)(struct platform_device *op,</div><div class='ctx'> 	                                 unsigned int real_irq);</div><div class='add'>+</div><div class='add'>+	/* generic clockevent features - see FEAT_* above */</div><div class='add'>+	int features;</div><div class='add'>+</div><div class='add'>+	/* clock rate used for clock event timer */</div><div class='add'>+	int clock_rate;</div><div class='add'>+</div><div class='add'>+	/* one period for clock source timer */</div><div class='add'>+	unsigned int cs_period;</div><div class='add'>+</div><div class='add'>+	/* function to obtain offsett for cs period */</div><div class='add'>+	unsigned int (*get_cycles_offset)(void);</div><div class='add'>+</div><div class='add'>+	void (*clear_clock_irq)(void);</div><div class='add'>+	void (*load_profile_irq)(int cpu, unsigned int limit);</div><div class='ctx'> };</div><div class='del'>-extern struct sparc_irq_config sparc_irq_config;</div><div class='add'>+extern struct sparc_config sparc_config;</div><div class='ctx'> </div><div class='ctx'> unsigned int irq_alloc(unsigned int real_irq, unsigned int pil);</div><div class='ctx'> void irq_link(unsigned int irq);</div><div class='ctx'> void irq_unlink(unsigned int irq);</div><div class='ctx'> void handler_irq(unsigned int pil, struct pt_regs *regs);</div><div class='ctx'> </div><div class='del'>-/* Dave Redman (djhr@tadpole.co.uk)</div><div class='del'>- * changed these to function pointers.. it saves cycles and will allow</div><div class='del'>- * the irq dependencies to be split into different files at a later date</div><div class='del'>- * sun4c_irq.c, sun4m_irq.c etc so we could reduce the kernel size.</div><div class='del'>- * Jakub Jelinek (jj@sunsite.mff.cuni.cz)</div><div class='del'>- * Changed these to btfixup entities... It saves cycles :)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-BTFIXUPDEF_CALL(void, clear_clock_irq, void)</div><div class='del'>-BTFIXUPDEF_CALL(void, load_profile_irq, int, unsigned int)</div><div class='del'>-</div><div class='del'>-static inline void clear_clock_irq(void)</div><div class='del'>-{</div><div class='del'>-	BTFIXUP_CALL(clear_clock_irq)();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void load_profile_irq(int cpu, int limit)</div><div class='del'>-{</div><div class='del'>-	BTFIXUP_CALL(load_profile_irq)(cpu, limit);</div><div class='del'>-}</div><div class='add'>+unsigned long leon_get_irqmask(unsigned int irq);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-BTFIXUPDEF_CALL(void, set_cpu_int, int, int)</div><div class='del'>-BTFIXUPDEF_CALL(void, clear_cpu_int, int, int)</div><div class='del'>-BTFIXUPDEF_CALL(void, set_irq_udt, int)</div><div class='del'>-</div><div class='del'>-#define set_cpu_int(cpu,level) BTFIXUP_CALL(set_cpu_int)(cpu,level)</div><div class='del'>-#define clear_cpu_int(cpu,level) BTFIXUP_CALL(clear_cpu_int)(cpu,level)</div><div class='del'>-#define set_irq_udt(cpu) BTFIXUP_CALL(set_irq_udt)(cpu)</div><div class='ctx'> </div><div class='ctx'> /* All SUN4D IPIs are sent on this IRQ, may be shared with hard IRQs */</div><div class='ctx'> #define SUN4D_IPI_IRQ 13</div><div class='head'>diff --git a/arch/sparc/kernel/irq_32.c b/arch/sparc/kernel/irq_32.c<br/>index b2668afd1c34..c145f6fd123b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/irq_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/irq_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/irq_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/irq_32.c</a></div><div class='hunk'>@@ -23,16 +23,8 @@</div><div class='ctx'> #include "kernel.h"</div><div class='ctx'> #include "irq.h"</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-#define SMP_NOP2 "nop; nop;\n\t"</div><div class='del'>-#define SMP_NOP3 "nop; nop; nop;\n\t"</div><div class='del'>-#else</div><div class='del'>-#define SMP_NOP2</div><div class='del'>-#define SMP_NOP3</div><div class='del'>-#endif /* SMP */</div><div class='del'>-</div><div class='ctx'> /* platform specific irq setup */</div><div class='del'>-struct sparc_irq_config sparc_irq_config;</div><div class='add'>+struct sparc_config sparc_config;</div><div class='ctx'> </div><div class='ctx'> unsigned long arch_local_irq_save(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -41,7 +33,6 @@ unsigned long arch_local_irq_save(void)</div><div class='ctx'> </div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 		"rd	%%psr, %0\n\t"</div><div class='del'>-		SMP_NOP3	/* Sun4m + Cypress + SMP bug */</div><div class='ctx'> 		"or	%0, %2, %1\n\t"</div><div class='ctx'> 		"wr	%1, 0, %%psr\n\t"</div><div class='ctx'> 		"nop; nop; nop\n"</div><div class='hunk'>@@ -59,7 +50,6 @@ void arch_local_irq_enable(void)</div><div class='ctx'> </div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 		"rd	%%psr, %0\n\t"</div><div class='del'>-		SMP_NOP3	/* Sun4m + Cypress + SMP bug */</div><div class='ctx'> 		"andn	%0, %1, %0\n\t"</div><div class='ctx'> 		"wr	%0, 0, %%psr\n\t"</div><div class='ctx'> 		"nop; nop; nop\n"</div><div class='hunk'>@@ -76,7 +66,6 @@ void arch_local_irq_restore(unsigned long old_psr)</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='ctx'> 		"rd	%%psr, %0\n\t"</div><div class='ctx'> 		"and	%2, %1, %2\n\t"</div><div class='del'>-		SMP_NOP2	/* Sun4m + Cypress + SMP bug */</div><div class='ctx'> 		"andn	%0, %1, %0\n\t"</div><div class='ctx'> 		"wr	%0, %2, %%psr\n\t"</div><div class='ctx'> 		"nop; nop; nop\n"</div><div class='hunk'>@@ -252,9 +241,6 @@ int sparc_floppy_request_irq(unsigned int irq, irq_handler_t irq_handler)</div><div class='ctx'> 	unsigned int cpu_irq;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-#if defined CONFIG_SMP &amp;&amp; !defined CONFIG_SPARC_LEON</div><div class='del'>-	struct tt_entry *trap_table;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	err = request_irq(irq, irq_handler, 0, "floppy", NULL);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -275,13 +261,18 @@ int sparc_floppy_request_irq(unsigned int irq, irq_handler_t irq_handler)</div><div class='ctx'> 	table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_four = SPARC_NOP;</div><div class='ctx'> </div><div class='ctx'> 	INSTANTIATE(sparc_ttable)</div><div class='del'>-#if defined CONFIG_SMP &amp;&amp; !defined CONFIG_SPARC_LEON</div><div class='del'>-	trap_table = &amp;trapbase_cpu1;</div><div class='del'>-	INSTANTIATE(trap_table)</div><div class='del'>-	trap_table = &amp;trapbase_cpu2;</div><div class='del'>-	INSTANTIATE(trap_table)</div><div class='del'>-	trap_table = &amp;trapbase_cpu3;</div><div class='del'>-	INSTANTIATE(trap_table)</div><div class='add'>+</div><div class='add'>+#if defined CONFIG_SMP</div><div class='add'>+	if (sparc_cpu_model != sparc_leon) {</div><div class='add'>+		struct tt_entry *trap_table;</div><div class='add'>+</div><div class='add'>+		trap_table = &amp;trapbase_cpu1;</div><div class='add'>+		INSTANTIATE(trap_table)</div><div class='add'>+		trap_table = &amp;trapbase_cpu2;</div><div class='add'>+		INSTANTIATE(trap_table)</div><div class='add'>+		trap_table = &amp;trapbase_cpu3;</div><div class='add'>+		INSTANTIATE(trap_table)</div><div class='add'>+	}</div><div class='ctx'> #endif</div><div class='ctx'> #undef INSTANTIATE</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -346,11 +337,6 @@ void sparc_floppy_irq(int irq, void *dev_id, struct pt_regs *regs)</div><div class='ctx'> void __init init_IRQ(void)</div><div class='ctx'> {</div><div class='ctx'> 	switch (sparc_cpu_model) {</div><div class='del'>-	case sun4c:</div><div class='del'>-	case sun4:</div><div class='del'>-		sun4c_init_IRQ();</div><div class='del'>-		break;</div><div class='del'>-</div><div class='ctx'> 	case sun4m:</div><div class='ctx'> 		pcic_probe();</div><div class='ctx'> 		if (pcic_present())</div><div class='hunk'>@@ -371,6 +357,5 @@ void __init init_IRQ(void)</div><div class='ctx'> 		prom_printf("Cannot initialize IRQs on this Sun machine...");</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	btfixup();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c<br/>index dff2c3d7d370..9bcbbe2c4e7e 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/irq_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/irq_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/irq_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/irq_64.c</a></div><div class='hunk'>@@ -799,7 +799,7 @@ static void kill_prom_timer(void)</div><div class='ctx'> 	prom_limit0 = prom_timers-&gt;limit0;</div><div class='ctx'> 	prom_limit1 = prom_timers-&gt;limit1;</div><div class='ctx'> </div><div class='del'>-	/* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.</div><div class='add'>+	/* Just as in sun4c PROM uses timer which ticks at IRQ 14.</div><div class='ctx'> 	 * We turn both off here just to be paranoid.</div><div class='ctx'> 	 */</div><div class='ctx'> 	prom_timers-&gt;limit0 = 0;</div><div class='head'>diff --git a/arch/sparc/kernel/kernel.h b/arch/sparc/kernel/kernel.h<br/>index fd6c36b1df74..291bb5de9ce0 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/kernel.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/kernel.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/kernel.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/kernel.h</a></div><div class='hunk'>@@ -26,15 +26,15 @@ static inline unsigned long kimage_addr_to_ra(const char *p)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SPARC32</div><div class='add'>+/* setup_32.c */</div><div class='add'>+void sparc32_start_kernel(struct linux_romvec *rp);</div><div class='add'>+</div><div class='ctx'> /* cpu.c */</div><div class='ctx'> extern void cpu_probe(void);</div><div class='ctx'> </div><div class='ctx'> /* traps_32.c */</div><div class='ctx'> extern void handle_hw_divzero(struct pt_regs *regs, unsigned long pc,</div><div class='ctx'>                               unsigned long npc, unsigned long psr);</div><div class='del'>-/* muldiv.c */</div><div class='del'>-extern int do_user_muldiv (struct pt_regs *, unsigned long);</div><div class='del'>-</div><div class='ctx'> /* irq_32.c */</div><div class='ctx'> extern struct irqaction static_irqaction[];</div><div class='ctx'> extern int static_irq_count;</div><div class='hunk'>@@ -43,12 +43,7 @@ extern spinlock_t irq_action_lock;</div><div class='ctx'> extern void unexpected_irq(int irq, void *dev_id, struct pt_regs * regs);</div><div class='ctx'> extern void init_IRQ(void);</div><div class='ctx'> </div><div class='del'>-/* sun4c_irq.c */</div><div class='del'>-extern void sun4c_init_IRQ(void);</div><div class='del'>-</div><div class='ctx'> /* sun4m_irq.c */</div><div class='del'>-extern unsigned int lvl14_resolution;</div><div class='del'>-</div><div class='ctx'> extern void sun4m_init_IRQ(void);</div><div class='ctx'> extern void sun4m_unmask_profile_irq(void);</div><div class='ctx'> extern void sun4m_clear_profile_irq(int cpu);</div><div class='hunk'>@@ -85,8 +80,6 @@ extern unsigned int patchme_maybe_smp_msg[];</div><div class='ctx'> extern void floppy_hardint(void);</div><div class='ctx'> </div><div class='ctx'> /* trampoline_32.S */</div><div class='del'>-extern int __smp4m_processor_id(void);</div><div class='del'>-extern int __smp4d_processor_id(void);</div><div class='ctx'> extern unsigned long sun4m_cpu_startup;</div><div class='ctx'> extern unsigned long sun4d_cpu_startup;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c<br/>index 35e43673c453..e34e2c40c060 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/leon_kernel.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/leon_kernel.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/leon_kernel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/leon_kernel.c</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/clocksource.h&gt;</div><div class='add'>+#include &lt;linux/clockchips.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/oplib.h&gt;</div><div class='ctx'> #include &lt;asm/timer.h&gt;</div><div class='hunk'>@@ -21,6 +23,7 @@</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "kernel.h"</div><div class='ctx'> #include "prom.h"</div><div class='ctx'> #include "irq.h"</div><div class='ctx'> </div><div class='hunk'>@@ -84,7 +87,7 @@ void leon_eirq_setup(unsigned int eirq)</div><div class='ctx'> 	sparc_leon_eirq = eirq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long get_irqmask(unsigned int irq)</div><div class='add'>+unsigned long leon_get_irqmask(unsigned int irq)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long mask;</div><div class='ctx'> </div><div class='hunk'>@@ -210,7 +213,7 @@ unsigned int leon_build_device_irq(unsigned int real_irq,</div><div class='ctx'> 	unsigned long mask;</div><div class='ctx'> </div><div class='ctx'> 	irq = 0;</div><div class='del'>-	mask = get_irqmask(real_irq);</div><div class='add'>+	mask = leon_get_irqmask(real_irq);</div><div class='ctx'> 	if (mask == 0)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -250,7 +253,38 @@ void leon_update_virq_handling(unsigned int virq,</div><div class='ctx'> 	irq_set_chip_data(virq, (void *)mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init leon_init_timers(irq_handler_t counter_fn)</div><div class='add'>+static u32 leon_cycles_offset(void)</div><div class='add'>+{</div><div class='add'>+	u32 rld, val, off;</div><div class='add'>+	rld = LEON3_BYPASS_LOAD_PA(&amp;leon3_gptimer_regs-&gt;e[leon3_gptimer_idx].rld);</div><div class='add'>+	val = LEON3_BYPASS_LOAD_PA(&amp;leon3_gptimer_regs-&gt;e[leon3_gptimer_idx].val);</div><div class='add'>+	off = rld - val;</div><div class='add'>+	return rld - val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+</div><div class='add'>+/* smp clockevent irq */</div><div class='add'>+irqreturn_t leon_percpu_timer_ce_interrupt(int irq, void *unused)</div><div class='add'>+{</div><div class='add'>+	struct clock_event_device *ce;</div><div class='add'>+	int cpu = smp_processor_id();</div><div class='add'>+</div><div class='add'>+	leon_clear_profile_irq(cpu);</div><div class='add'>+</div><div class='add'>+	ce = &amp;per_cpu(sparc32_clockevent, cpu);</div><div class='add'>+</div><div class='add'>+	irq_enter();</div><div class='add'>+	if (ce-&gt;event_handler)</div><div class='add'>+		ce-&gt;event_handler(ce);</div><div class='add'>+	irq_exit();</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_SMP */</div><div class='add'>+</div><div class='add'>+void __init leon_init_timers(void)</div><div class='ctx'> {</div><div class='ctx'> 	int irq, eirq;</div><div class='ctx'> 	struct device_node *rootnp, *np, *nnp;</div><div class='hunk'>@@ -260,6 +294,14 @@ void __init leon_init_timers(irq_handler_t counter_fn)</div><div class='ctx'> 	int ampopts;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	sparc_config.get_cycles_offset = leon_cycles_offset;</div><div class='add'>+	sparc_config.cs_period = 1000000 / HZ;</div><div class='add'>+	sparc_config.features |= FEAT_L10_CLOCKSOURCE;</div><div class='add'>+</div><div class='add'>+#ifndef CONFIG_SMP</div><div class='add'>+	sparc_config.features |= FEAT_L10_CLOCKEVENT;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	leondebug_irq_disable = 0;</div><div class='ctx'> 	leon_debug_irqout = 0;</div><div class='ctx'> 	master_l10_counter = (unsigned int *)&amp;dummy_master_l10_counter;</div><div class='hunk'>@@ -369,7 +411,7 @@ void __init leon_init_timers(irq_handler_t counter_fn)</div><div class='ctx'> 		leon_eirq_setup(eirq);</div><div class='ctx'> </div><div class='ctx'> 	irq = _leon_build_device_irq(NULL, leon3_gptimer_irq+leon3_gptimer_idx);</div><div class='del'>-	err = request_irq(irq, counter_fn, IRQF_TIMER, "timer", NULL);</div><div class='add'>+	err = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		printk(KERN_ERR "unable to attach timer IRQ%d\n", irq);</div><div class='ctx'> 		prom_halt();</div><div class='hunk'>@@ -386,7 +428,7 @@ void __init leon_init_timers(irq_handler_t counter_fn)</div><div class='ctx'> 		 */</div><div class='ctx'> 		local_irq_save(flags);</div><div class='ctx'> 		patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */</div><div class='del'>-		local_flush_cache_all();</div><div class='add'>+		local_ops-&gt;cache_all();</div><div class='ctx'> 		local_irq_restore(flags);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='hunk'>@@ -401,7 +443,7 @@ void __init leon_init_timers(irq_handler_t counter_fn)</div><div class='ctx'> 	/* Install per-cpu IRQ handler for broadcasted ticker */</div><div class='ctx'> 	irq = leon_build_device_irq(leon3_ticker_irq, handle_percpu_irq,</div><div class='ctx'> 				    "per-cpu", 0);</div><div class='del'>-	err = request_irq(irq, leon_percpu_timer_interrupt,</div><div class='add'>+	err = request_irq(irq, leon_percpu_timer_ce_interrupt,</div><div class='ctx'> 			  IRQF_PERCPU | IRQF_TIMER, "ticker",</div><div class='ctx'> 			  NULL);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -422,13 +464,12 @@ bad:</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void leon_clear_clock_irq(void)</div><div class='add'>+static void leon_clear_clock_irq(void)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void leon_load_profile_irq(int cpu, unsigned int limit)</div><div class='add'>+static void leon_load_profile_irq(int cpu, unsigned int limit)</div><div class='ctx'> {</div><div class='del'>-	BUG();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init leon_trans_init(struct device_node *dp)</div><div class='hunk'>@@ -457,25 +498,6 @@ void __init leon_node_init(struct device_node *dp, struct device_node ***nextp)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-</div><div class='del'>-void leon_set_cpu_int(int cpu, int level)</div><div class='del'>-{</div><div class='del'>-	unsigned long mask;</div><div class='del'>-	mask = get_irqmask(level);</div><div class='del'>-	LEON3_BYPASS_STORE_PA(&amp;leon3_irqctrl_regs-&gt;force[cpu], mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void leon_clear_ipi(int cpu, int level)</div><div class='del'>-{</div><div class='del'>-	unsigned long mask;</div><div class='del'>-	mask = get_irqmask(level);</div><div class='del'>-	LEON3_BYPASS_STORE_PA(&amp;leon3_irqctrl_regs-&gt;force[cpu], mask&lt;&lt;16);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void leon_set_udt(int cpu)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void leon_clear_profile_irq(int cpu)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='hunk'>@@ -483,7 +505,7 @@ void leon_clear_profile_irq(int cpu)</div><div class='ctx'> void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long mask, flags, *addr;</div><div class='del'>-	mask = get_irqmask(irq_nr);</div><div class='add'>+	mask = leon_get_irqmask(irq_nr);</div><div class='ctx'> 	spin_lock_irqsave(&amp;leon_irq_lock, flags);</div><div class='ctx'> 	addr = (unsigned long *)LEON_IMASK(cpu);</div><div class='ctx'> 	LEON3_BYPASS_STORE_PA(addr, (LEON3_BYPASS_LOAD_PA(addr) | mask));</div><div class='hunk'>@@ -494,20 +516,11 @@ void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu)</div><div class='ctx'> </div><div class='ctx'> void __init leon_init_IRQ(void)</div><div class='ctx'> {</div><div class='del'>-	sparc_irq_config.init_timers      = leon_init_timers;</div><div class='del'>-	sparc_irq_config.build_device_irq = _leon_build_device_irq;</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(clear_clock_irq, leon_clear_clock_irq,</div><div class='del'>-			BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(load_profile_irq, leon_load_profile_irq,</div><div class='del'>-			BTFIXUPCALL_NOP);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	BTFIXUPSET_CALL(set_cpu_int, leon_set_cpu_int, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(clear_cpu_int, leon_clear_ipi, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(set_irq_udt, leon_set_udt, BTFIXUPCALL_NORM);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='add'>+	sparc_config.init_timers      = leon_init_timers;</div><div class='add'>+	sparc_config.build_device_irq = _leon_build_device_irq;</div><div class='add'>+	sparc_config.clock_rate       = 1000000;</div><div class='add'>+	sparc_config.clear_clock_irq  = leon_clear_clock_irq;</div><div class='add'>+	sparc_config.load_profile_irq = leon_load_profile_irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init leon_init(void)</div><div class='head'>diff --git a/arch/sparc/kernel/leon_pmc.c b/arch/sparc/kernel/leon_pmc.c<br/>index 519ca923f59f..4e174321097d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/leon_pmc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/leon_pmc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/leon_pmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/leon_pmc.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include &lt;linux/pm.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/leon_amba.h&gt;</div><div class='add'>+#include &lt;asm/cpu_type.h&gt;</div><div class='ctx'> #include &lt;asm/leon.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* List of Systems that need fixup instructions around power-down instruction */</div><div class='hunk'>@@ -65,13 +66,15 @@ void pmc_leon_idle(void)</div><div class='ctx'> /* Install LEON Power Down function */</div><div class='ctx'> static int __init leon_pmc_install(void)</div><div class='ctx'> {</div><div class='del'>-	/* Assign power management IDLE handler */</div><div class='del'>-	if (pmc_leon_need_fixup())</div><div class='del'>-		pm_idle = pmc_leon_idle_fixup;</div><div class='del'>-	else</div><div class='del'>-		pm_idle = pmc_leon_idle;</div><div class='add'>+	if (sparc_cpu_model == sparc_leon) {</div><div class='add'>+		/* Assign power management IDLE handler */</div><div class='add'>+		if (pmc_leon_need_fixup())</div><div class='add'>+			pm_idle = pmc_leon_idle_fixup;</div><div class='add'>+		else</div><div class='add'>+			pm_idle = pmc_leon_idle;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "leon: power management initialized\n");</div><div class='add'>+		printk(KERN_INFO "leon: power management initialized\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sparc/kernel/leon_smp.c b/arch/sparc/kernel/leon_smp.c<br/>index 160cac9c4036..0f3fb6d9c8ef 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/leon_smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/leon_smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/leon_smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/leon_smp.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='add'>+#include &lt;linux/clockchips.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='hunk'>@@ -43,18 +44,17 @@</div><div class='ctx'> #include &lt;asm/asi.h&gt;</div><div class='ctx'> #include &lt;asm/leon.h&gt;</div><div class='ctx'> #include &lt;asm/leon_amba.h&gt;</div><div class='add'>+#include &lt;asm/timer.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "kernel.h"</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPARC_LEON</div><div class='del'>-</div><div class='ctx'> #include "irq.h"</div><div class='ctx'> </div><div class='ctx'> extern ctxd_t *srmmu_ctx_table_phys;</div><div class='ctx'> static int smp_processors_ready;</div><div class='ctx'> extern volatile unsigned long cpu_callin_map[NR_CPUS];</div><div class='ctx'> extern cpumask_t smp_commenced_mask;</div><div class='del'>-void __init leon_configure_cache_smp(void);</div><div class='add'>+void __cpuinit leon_configure_cache_smp(void);</div><div class='ctx'> static void leon_ipi_init(void);</div><div class='ctx'> </div><div class='ctx'> /* IRQ number of LEON IPIs */</div><div class='hunk'>@@ -69,26 +69,24 @@ static inline unsigned long do_swap(volatile unsigned long *ptr,</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void smp_setup_percpu_timer(void);</div><div class='del'>-</div><div class='ctx'> void __cpuinit leon_callin(void)</div><div class='ctx'> {</div><div class='del'>-	int cpuid = hard_smpleon_processor_id();</div><div class='add'>+	int cpuid = hard_smp_processor_id();</div><div class='ctx'> </div><div class='del'>-	local_flush_cache_all();</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> 	leon_configure_cache_smp();</div><div class='ctx'> </div><div class='ctx'> 	notify_cpu_starting(cpuid);</div><div class='ctx'> </div><div class='ctx'> 	/* Get our local ticker going. */</div><div class='del'>-	smp_setup_percpu_timer();</div><div class='add'>+	register_percpu_ce(cpuid);</div><div class='ctx'> </div><div class='ctx'> 	calibrate_delay();</div><div class='ctx'> 	smp_store_cpu_info(cpuid);</div><div class='ctx'> </div><div class='del'>-	local_flush_cache_all();</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Unblock the master CPU _only_ when the scheduler state</div><div class='hunk'>@@ -99,8 +97,8 @@ void __cpuinit leon_callin(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	do_swap(&amp;cpu_callin_map[cpuid], 1);</div><div class='ctx'> </div><div class='del'>-	local_flush_cache_all();</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> </div><div class='ctx'> 	/* Fix idle thread fields. */</div><div class='ctx'> 	__asm__ __volatile__("ld [%0], %%g6\n\t" : : "r"(&amp;current_set[cpuid])</div><div class='hunk'>@@ -123,7 +121,7 @@ void __cpuinit leon_callin(void)</div><div class='ctx'> </div><div class='ctx'> extern struct linux_prom_registers smp_penguin_ctable;</div><div class='ctx'> </div><div class='del'>-void __init leon_configure_cache_smp(void)</div><div class='add'>+void __cpuinit leon_configure_cache_smp(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long cfg = sparc_leon3_get_dcachecfg();</div><div class='ctx'> 	int me = smp_processor_id();</div><div class='hunk'>@@ -143,8 +141,8 @@ void __init leon_configure_cache_smp(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	local_flush_cache_all();</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void leon_smp_setbroadcast(unsigned int mask)</div><div class='hunk'>@@ -199,21 +197,15 @@ void __init leon_boot_cpus(void)</div><div class='ctx'> 	leon_smp_setbroadcast(1 &lt;&lt; LEON3_IRQ_TICKER);</div><div class='ctx'> </div><div class='ctx'> 	leon_configure_cache_smp();</div><div class='del'>-	smp_setup_percpu_timer();</div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __cpuinit leon_boot_one_cpu(int i)</div><div class='add'>+int __cpuinit leon_boot_one_cpu(int i, struct task_struct *idle)</div><div class='ctx'> {</div><div class='del'>-</div><div class='del'>-	struct task_struct *p;</div><div class='ctx'> 	int timeout;</div><div class='ctx'> </div><div class='del'>-	/* Cook up an idler for this guy. */</div><div class='del'>-	p = fork_idle(i);</div><div class='del'>-</div><div class='del'>-	current_set[i] = task_thread_info(p);</div><div class='add'>+	current_set[i] = task_thread_info(idle);</div><div class='ctx'> </div><div class='ctx'> 	/* See trampoline.S:leon_smp_cpu_startup for details...</div><div class='ctx'> 	 * Initialize the contexts table</div><div class='hunk'>@@ -227,7 +219,7 @@ int __cpuinit leon_boot_one_cpu(int i)</div><div class='ctx'> 	/* whirrr, whirrr, whirrrrrrrrr... */</div><div class='ctx'> 	printk(KERN_INFO "Starting CPU %d : (irqmp: 0x%x)\n", (unsigned int)i,</div><div class='ctx'> 	       (unsigned int)&amp;leon3_irqctrl_regs-&gt;mpstatus);</div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure all IRQs are of from the start for this new CPU */</div><div class='ctx'> 	LEON_BYPASS_STORE_PA(&amp;leon3_irqctrl_regs-&gt;mask[i], 0);</div><div class='hunk'>@@ -252,7 +244,7 @@ int __cpuinit leon_boot_one_cpu(int i)</div><div class='ctx'> 		leon_enable_irq_cpu(leon_ipi_irq, i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -272,7 +264,7 @@ void __init leon_smp_done(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	*prev = first;</div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> </div><div class='ctx'> 	/* Free unneeded trap tables */</div><div class='ctx'> 	if (!cpu_present(1)) {</div><div class='hunk'>@@ -338,7 +330,7 @@ static void __init leon_ipi_init(void)</div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> 	trap_table = &amp;sparc_ttable[SP_TRAP_IRQ1 + (leon_ipi_irq - 1)];</div><div class='ctx'> 	trap_table-&gt;inst_three += smpleon_ipi - real_irq_entry;</div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> </div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='hunk'>@@ -347,6 +339,13 @@ static void __init leon_ipi_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void leon_send_ipi(int cpu, int level)</div><div class='add'>+{</div><div class='add'>+	unsigned long mask;</div><div class='add'>+	mask = leon_get_irqmask(level);</div><div class='add'>+	LEON3_BYPASS_STORE_PA(&amp;leon3_irqctrl_regs-&gt;force[cpu], mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void leon_ipi_single(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct leon_ipi_work *work = &amp;per_cpu(leon_ipi_work, cpu);</div><div class='hunk'>@@ -355,7 +354,7 @@ static void leon_ipi_single(int cpu)</div><div class='ctx'> 	work-&gt;single = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* Generate IRQ on the CPU */</div><div class='del'>-	set_cpu_int(cpu, leon_ipi_irq);</div><div class='add'>+	leon_send_ipi(cpu, leon_ipi_irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void leon_ipi_mask_one(int cpu)</div><div class='hunk'>@@ -366,7 +365,7 @@ static void leon_ipi_mask_one(int cpu)</div><div class='ctx'> 	work-&gt;msk = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* Generate IRQ on the CPU */</div><div class='del'>-	set_cpu_int(cpu, leon_ipi_irq);</div><div class='add'>+	leon_send_ipi(cpu, leon_ipi_irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void leon_ipi_resched(int cpu)</div><div class='hunk'>@@ -377,7 +376,7 @@ static void leon_ipi_resched(int cpu)</div><div class='ctx'> 	work-&gt;resched = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* Generate IRQ on the CPU (any IRQ will cause resched) */</div><div class='del'>-	set_cpu_int(cpu, leon_ipi_irq);</div><div class='add'>+	leon_send_ipi(cpu, leon_ipi_irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void leonsmp_ipi_interrupt(void)</div><div class='hunk'>@@ -449,7 +448,7 @@ static void leon_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,</div><div class='ctx'> 				if (cpumask_test_cpu(i, &amp;mask)) {</div><div class='ctx'> 					ccall_info.processors_in[i] = 0;</div><div class='ctx'> 					ccall_info.processors_out[i] = 0;</div><div class='del'>-					set_cpu_int(i, LEON3_IRQ_CROSS_CALL);</div><div class='add'>+					leon_send_ipi(i, LEON3_IRQ_CROSS_CALL);</div><div class='ctx'> </div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='hunk'>@@ -492,68 +491,17 @@ void leon_cross_call_irq(void)</div><div class='ctx'> 	ccall_info.processors_out[i] = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-irqreturn_t leon_percpu_timer_interrupt(int irq, void *unused)</div><div class='del'>-{</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='del'>-</div><div class='del'>-	leon_clear_profile_irq(cpu);</div><div class='del'>-</div><div class='del'>-	profile_tick(CPU_PROFILING);</div><div class='del'>-</div><div class='del'>-	if (!--prof_counter(cpu)) {</div><div class='del'>-		int user = user_mode(get_irq_regs());</div><div class='del'>-</div><div class='del'>-		update_process_times(user);</div><div class='del'>-</div><div class='del'>-		prof_counter(cpu) = prof_multiplier(cpu);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init smp_setup_percpu_timer(void)</div><div class='del'>-{</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='del'>-</div><div class='del'>-	prof_counter(cpu) = prof_multiplier(cpu) = 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init leon_blackbox_id(unsigned *addr)</div><div class='del'>-{</div><div class='del'>-	int rd = *addr &amp; 0x3e000000;</div><div class='del'>-	int rs1 = rd &gt;&gt; 11;</div><div class='del'>-</div><div class='del'>-	/* patch places where ___b_hard_smp_processor_id appears */</div><div class='del'>-	addr[0] = 0x81444000 | rd;	/* rd %asr17, reg */</div><div class='del'>-	addr[1] = 0x8130201c | rd | rs1;	/* srl reg, 0x1c, reg */</div><div class='del'>-	addr[2] = 0x01000000;	/* nop */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init leon_blackbox_current(unsigned *addr)</div><div class='del'>-{</div><div class='del'>-	int rd = *addr &amp; 0x3e000000;</div><div class='del'>-	int rs1 = rd &gt;&gt; 11;</div><div class='del'>-</div><div class='del'>-	/* patch LOAD_CURRENT macro where ___b_load_current appears */</div><div class='del'>-	addr[0] = 0x81444000 | rd;	/* rd %asr17, reg */</div><div class='del'>-	addr[2] = 0x8130201c | rd | rs1;	/* srl reg, 0x1c, reg */</div><div class='del'>-	addr[4] = 0x81282002 | rd | rs1;	/* sll reg, 0x2, reg */</div><div class='del'>-</div><div class='del'>-}</div><div class='add'>+static const struct sparc32_ipi_ops leon_ipi_ops = {</div><div class='add'>+	.cross_call = leon_cross_call,</div><div class='add'>+	.resched    = leon_ipi_resched,</div><div class='add'>+	.single     = leon_ipi_single,</div><div class='add'>+	.mask_one   = leon_ipi_mask_one,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> void __init leon_init_smp(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Patch ipi15 trap table */</div><div class='ctx'> 	t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_leon - linux_trap_ipi15_sun4m);</div><div class='ctx'> </div><div class='del'>-	BTFIXUPSET_BLACKBOX(hard_smp_processor_id, leon_blackbox_id);</div><div class='del'>-	BTFIXUPSET_BLACKBOX(load_current, leon_blackbox_current);</div><div class='del'>-	BTFIXUPSET_CALL(smp_cross_call, leon_cross_call, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(__hard_smp_processor_id, __leon_processor_id,</div><div class='del'>-			BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(smp_ipi_resched, leon_ipi_resched, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(smp_ipi_single, leon_ipi_single, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(smp_ipi_mask_one, leon_ipi_mask_one, BTFIXUPCALL_NORM);</div><div class='add'>+	sparc32_ipi_ops = &amp;leon_ipi_ops;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_SPARC_LEON */</div><div class='head'>diff --git a/arch/sparc/kernel/module.c b/arch/sparc/kernel/module.c<br/>index 276359e1ff56..15e0a1693976 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/module.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/module.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/module.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/module.c</a></div><div class='hunk'>@@ -32,26 +32,11 @@ static void *module_map(unsigned long size)</div><div class='ctx'> 				GFP_KERNEL, PAGE_KERNEL, -1,</div><div class='ctx'> 				__builtin_return_address(0));</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static char *dot2underscore(char *name)</div><div class='del'>-{</div><div class='del'>-	return name;</div><div class='del'>-}</div><div class='ctx'> #else</div><div class='ctx'> static void *module_map(unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	return vmalloc(size);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/* Replace references to .func with _Func */</div><div class='del'>-static char *dot2underscore(char *name)</div><div class='del'>-{</div><div class='del'>-	if (name[0] == '.') {</div><div class='del'>-		name[0] = '_';</div><div class='del'>-                name[1] = toupper(name[1]);</div><div class='del'>-	}</div><div class='del'>-	return name;</div><div class='del'>-}</div><div class='ctx'> #endif /* CONFIG_SPARC64 */</div><div class='ctx'> </div><div class='ctx'> void *module_alloc(unsigned long size)</div><div class='hunk'>@@ -93,12 +78,8 @@ int module_frob_arch_sections(Elf_Ehdr *hdr,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 1; i &lt; sechdrs[symidx].sh_size / sizeof(Elf_Sym); i++) {</div><div class='ctx'> 		if (sym[i].st_shndx == SHN_UNDEF) {</div><div class='del'>-			if (ELF_ST_TYPE(sym[i].st_info) == STT_REGISTER) {</div><div class='add'>+			if (ELF_ST_TYPE(sym[i].st_info) == STT_REGISTER)</div><div class='ctx'> 				sym[i].st_shndx = SHN_ABS;</div><div class='del'>-			} else {</div><div class='del'>-				char *name = strtab + sym[i].st_name;</div><div class='del'>-				dot2underscore(name);</div><div class='del'>-			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/sparc/kernel/muldiv.c b/arch/sparc/kernel/muldiv.c<br/>deleted file mode 100644<br/>index f7db516b07d8..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/muldiv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/muldiv.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,238 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * muldiv.c: Hardware multiply/division illegal instruction trap</div><div class='del'>- *		for sun4c/sun4 (which do not have those instructions)</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz)</div><div class='del'>- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)</div><div class='del'>- *</div><div class='del'>- * 2004-12-25	Krzysztof Helt (krzysztof.h1@wp.pl) </div><div class='del'>- *		- fixed registers constrains in inline assembly declarations</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-#include "kernel.h"</div><div class='del'>-</div><div class='del'>-/* #define DEBUG_MULDIV */</div><div class='del'>-</div><div class='del'>-static inline int has_imm13(int insn)</div><div class='del'>-{</div><div class='del'>-	return (insn &amp; 0x2000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int is_foocc(int insn)</div><div class='del'>-{</div><div class='del'>-	return (insn &amp; 0x800000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int sign_extend_imm13(int imm)</div><div class='del'>-{</div><div class='del'>-	return imm &lt;&lt; 19 &gt;&gt; 19;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void advance(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	regs-&gt;pc   = regs-&gt;npc;</div><div class='del'>-	regs-&gt;npc += 4;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,</div><div class='del'>-				       unsigned int rd)</div><div class='del'>-{</div><div class='del'>-	if(rs2 &gt;= 16 || rs1 &gt;= 16 || rd &gt;= 16) {</div><div class='del'>-		/* Wheee... */</div><div class='del'>-		__asm__ __volatile__("save %sp, -0x40, %sp\n\t"</div><div class='del'>-				     "save %sp, -0x40, %sp\n\t"</div><div class='del'>-				     "save %sp, -0x40, %sp\n\t"</div><div class='del'>-				     "save %sp, -0x40, %sp\n\t"</div><div class='del'>-				     "save %sp, -0x40, %sp\n\t"</div><div class='del'>-				     "save %sp, -0x40, %sp\n\t"</div><div class='del'>-				     "save %sp, -0x40, %sp\n\t"</div><div class='del'>-				     "restore; restore; restore; restore;\n\t"</div><div class='del'>-				     "restore; restore; restore;\n\t");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define fetch_reg(reg, regs) ({						\</div><div class='del'>-	struct reg_window32 __user *win;					\</div><div class='del'>-	register unsigned long ret;					\</div><div class='del'>-									\</div><div class='del'>-	if (!(reg)) ret = 0;						\</div><div class='del'>-	else if ((reg) &lt; 16) {						\</div><div class='del'>-		ret = regs-&gt;u_regs[(reg)];				\</div><div class='del'>-	} else {							\</div><div class='del'>-		/* Ho hum, the slightly complicated case. */		\</div><div class='del'>-		win = (struct reg_window32 __user *)regs-&gt;u_regs[UREG_FP];\</div><div class='del'>-		if (get_user (ret, &amp;win-&gt;locals[(reg) - 16])) return -1;\</div><div class='del'>-	}								\</div><div class='del'>-	ret;								\</div><div class='del'>-})</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-store_reg(unsigned int result, unsigned int reg, struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	struct reg_window32 __user *win;</div><div class='del'>-</div><div class='del'>-	if (!reg)</div><div class='del'>-		return 0;</div><div class='del'>-	if (reg &lt; 16) {</div><div class='del'>-		regs-&gt;u_regs[reg] = result;</div><div class='del'>-		return 0;</div><div class='del'>-	} else {</div><div class='del'>-		/* need to use put_user() in this case: */</div><div class='del'>-		win = (struct reg_window32 __user *) regs-&gt;u_regs[UREG_FP];</div><div class='del'>-		return (put_user(result, &amp;win-&gt;locals[reg - 16]));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Should return 0 if mul/div emulation succeeded and SIGILL should</div><div class='del'>- * not be issued.</div><div class='del'>- */</div><div class='del'>-int do_user_muldiv(struct pt_regs *regs, unsigned long pc)</div><div class='del'>-{</div><div class='del'>-	unsigned int insn;</div><div class='del'>-	int inst;</div><div class='del'>-	unsigned int rs1, rs2, rdv;</div><div class='del'>-</div><div class='del'>-	if (!pc)</div><div class='del'>-		return -1; /* This happens to often, I think */</div><div class='del'>-	if (get_user (insn, (unsigned int __user *)pc))</div><div class='del'>-		return -1;</div><div class='del'>-	if ((insn &amp; 0xc1400000) != 0x80400000)</div><div class='del'>-		return -1;</div><div class='del'>-	inst = ((insn &gt;&gt; 19) &amp; 0xf);</div><div class='del'>-	if ((inst &amp; 0xe) != 10 &amp;&amp; (inst &amp; 0xe) != 14)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	/* Now we know we have to do something with umul, smul, udiv or sdiv */</div><div class='del'>-	rs1 = (insn &gt;&gt; 14) &amp; 0x1f;</div><div class='del'>-	rs2 = insn &amp; 0x1f;</div><div class='del'>-	rdv = (insn &gt;&gt; 25) &amp; 0x1f;</div><div class='del'>-	if (has_imm13(insn)) {</div><div class='del'>-		maybe_flush_windows(rs1, 0, rdv);</div><div class='del'>-		rs2 = sign_extend_imm13(insn);</div><div class='del'>-	} else {</div><div class='del'>-		maybe_flush_windows(rs1, rs2, rdv);</div><div class='del'>-		rs2 = fetch_reg(rs2, regs);</div><div class='del'>-	}</div><div class='del'>-	rs1 = fetch_reg(rs1, regs);</div><div class='del'>-	switch (inst) {</div><div class='del'>-	case 10: /* umul */</div><div class='del'>-#ifdef DEBUG_MULDIV	</div><div class='del'>-		printk ("unsigned muldiv: 0x%x * 0x%x = ", rs1, rs2);</div><div class='del'>-#endif		</div><div class='del'>-		__asm__ __volatile__ ("\n\t"</div><div class='del'>-			"mov	%0, %%o0\n\t"</div><div class='del'>-			"call	.umul\n\t"</div><div class='del'>-			" mov	%1, %%o1\n\t"</div><div class='del'>-			"mov	%%o0, %0\n\t"</div><div class='del'>-			"mov	%%o1, %1\n\t"</div><div class='del'>-			: "=r" (rs1), "=r" (rs2)</div><div class='del'>-		        : "0" (rs1), "1" (rs2)</div><div class='del'>-			: "o0", "o1", "o2", "o3", "o4", "o5", "o7", "cc");</div><div class='del'>-#ifdef DEBUG_MULDIV</div><div class='del'>-		printk ("0x%x%08x\n", rs2, rs1);</div><div class='del'>-#endif</div><div class='del'>-		if (store_reg(rs1, rdv, regs))</div><div class='del'>-			return -1;</div><div class='del'>-		regs-&gt;y = rs2;</div><div class='del'>-		break;</div><div class='del'>-	case 11: /* smul */</div><div class='del'>-#ifdef DEBUG_MULDIV</div><div class='del'>-		printk ("signed muldiv: 0x%x * 0x%x = ", rs1, rs2);</div><div class='del'>-#endif</div><div class='del'>-		__asm__ __volatile__ ("\n\t"</div><div class='del'>-			"mov	%0, %%o0\n\t"</div><div class='del'>-			"call	.mul\n\t"</div><div class='del'>-			" mov	%1, %%o1\n\t"</div><div class='del'>-			"mov	%%o0, %0\n\t"</div><div class='del'>-			"mov	%%o1, %1\n\t"</div><div class='del'>-			: "=r" (rs1), "=r" (rs2)</div><div class='del'>-		        : "0" (rs1), "1" (rs2)</div><div class='del'>-			: "o0", "o1", "o2", "o3", "o4", "o5", "o7", "cc");</div><div class='del'>-#ifdef DEBUG_MULDIV</div><div class='del'>-		printk ("0x%x%08x\n", rs2, rs1);</div><div class='del'>-#endif</div><div class='del'>-		if (store_reg(rs1, rdv, regs))</div><div class='del'>-			return -1;</div><div class='del'>-		regs-&gt;y = rs2;</div><div class='del'>-		break;</div><div class='del'>-	case 14: /* udiv */</div><div class='del'>-#ifdef DEBUG_MULDIV</div><div class='del'>-		printk ("unsigned muldiv: 0x%x%08x / 0x%x = ", regs-&gt;y, rs1, rs2);</div><div class='del'>-#endif</div><div class='del'>-		if (!rs2) {</div><div class='del'>-#ifdef DEBUG_MULDIV</div><div class='del'>-			printk ("DIVISION BY ZERO\n");</div><div class='del'>-#endif</div><div class='del'>-			handle_hw_divzero (regs, pc, regs-&gt;npc, regs-&gt;psr);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		__asm__ __volatile__ ("\n\t"</div><div class='del'>-			"mov	%2, %%o0\n\t"</div><div class='del'>-			"mov	%0, %%o1\n\t"</div><div class='del'>-			"mov	%%g0, %%o2\n\t"</div><div class='del'>-			"call	__udivdi3\n\t"</div><div class='del'>-			" mov	%1, %%o3\n\t"</div><div class='del'>-			"mov	%%o1, %0\n\t"</div><div class='del'>-			"mov	%%o0, %1\n\t"</div><div class='del'>-			: "=r" (rs1), "=r" (rs2)</div><div class='del'>-			: "r" (regs-&gt;y), "0" (rs1), "1" (rs2)</div><div class='del'>-			: "o0", "o1", "o2", "o3", "o4", "o5", "o7",</div><div class='del'>-			  "g1", "g2", "g3", "cc");</div><div class='del'>-#ifdef DEBUG_MULDIV</div><div class='del'>-		printk ("0x%x\n", rs1);</div><div class='del'>-#endif</div><div class='del'>-		if (store_reg(rs1, rdv, regs))</div><div class='del'>-			return -1;</div><div class='del'>-		break;</div><div class='del'>-	case 15: /* sdiv */</div><div class='del'>-#ifdef DEBUG_MULDIV</div><div class='del'>-		printk ("signed muldiv: 0x%x%08x / 0x%x = ", regs-&gt;y, rs1, rs2);</div><div class='del'>-#endif</div><div class='del'>-		if (!rs2) {</div><div class='del'>-#ifdef DEBUG_MULDIV</div><div class='del'>-			printk ("DIVISION BY ZERO\n");</div><div class='del'>-#endif</div><div class='del'>-			handle_hw_divzero (regs, pc, regs-&gt;npc, regs-&gt;psr);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		__asm__ __volatile__ ("\n\t"</div><div class='del'>-			"mov	%2, %%o0\n\t"</div><div class='del'>-			"mov	%0, %%o1\n\t"</div><div class='del'>-			"mov	%%g0, %%o2\n\t"</div><div class='del'>-			"call	__divdi3\n\t"</div><div class='del'>-			" mov	%1, %%o3\n\t"</div><div class='del'>-			"mov	%%o1, %0\n\t"</div><div class='del'>-			"mov	%%o0, %1\n\t"</div><div class='del'>-			: "=r" (rs1), "=r" (rs2)</div><div class='del'>-			: "r" (regs-&gt;y), "0" (rs1), "1" (rs2)</div><div class='del'>-			: "o0", "o1", "o2", "o3", "o4", "o5", "o7",</div><div class='del'>-			  "g1", "g2", "g3", "cc");</div><div class='del'>-#ifdef DEBUG_MULDIV</div><div class='del'>-		printk ("0x%x\n", rs1);</div><div class='del'>-#endif</div><div class='del'>-		if (store_reg(rs1, rdv, regs))</div><div class='del'>-			return -1;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	if (is_foocc (insn)) {</div><div class='del'>-		regs-&gt;psr &amp;= ~PSR_ICC;</div><div class='del'>-		if ((inst &amp; 0xe) == 14) {</div><div class='del'>-			/* ?div */</div><div class='del'>-			if (rs2) regs-&gt;psr |= PSR_V;</div><div class='del'>-		}</div><div class='del'>-		if (!rs1) regs-&gt;psr |= PSR_Z;</div><div class='del'>-		if (((int)rs1) &lt; 0) regs-&gt;psr |= PSR_N;</div><div class='del'>-#ifdef DEBUG_MULDIV</div><div class='del'>-		printk ("psr muldiv: %08x\n", regs-&gt;psr);</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='del'>-	advance(regs);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/sparc/kernel/of_device_32.c b/arch/sparc/kernel/of_device_32.c<br/>index 4ee8ce0d5d8d..185aa96fa5be 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/of_device_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/of_device_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/of_device_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/of_device_32.c</a></div><div class='hunk'>@@ -356,7 +356,7 @@ static struct platform_device * __init scan_one_device(struct device_node *dp,</div><div class='ctx'> 		op-&gt;archdata.num_irqs = len / sizeof(struct linux_prom_irqs);</div><div class='ctx'> 		for (i = 0; i &lt; op-&gt;archdata.num_irqs; i++)</div><div class='ctx'> 			op-&gt;archdata.irqs[i] =</div><div class='del'>-			    sparc_irq_config.build_device_irq(op, intr[i].pri);</div><div class='add'>+			    sparc_config.build_device_irq(op, intr[i].pri);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		const unsigned int *irq =</div><div class='ctx'> 			of_get_property(dp, "interrupts", &amp;len);</div><div class='hunk'>@@ -365,7 +365,7 @@ static struct platform_device * __init scan_one_device(struct device_node *dp,</div><div class='ctx'> 			op-&gt;archdata.num_irqs = len / sizeof(unsigned int);</div><div class='ctx'> 			for (i = 0; i &lt; op-&gt;archdata.num_irqs; i++)</div><div class='ctx'> 				op-&gt;archdata.irqs[i] =</div><div class='del'>-				    sparc_irq_config.build_device_irq(op, irq[i]);</div><div class='add'>+				    sparc_config.build_device_irq(op, irq[i]);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			op-&gt;archdata.num_irqs = 0;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c<br/>index fcc148effaac..ded3f6090c3f 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/pcic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/pcic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/pcic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/pcic.c</a></div><div class='hunk'>@@ -703,31 +703,28 @@ static void pcic_clear_clock_irq(void)</div><div class='ctx'> 	pcic_timer_dummy = readl(pcic0.pcic_regs+PCI_SYS_LIMIT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t pcic_timer_handler (int irq, void *h)</div><div class='add'>+/* CPU frequency is 100 MHz, timer increments every 4 CPU clocks */</div><div class='add'>+#define USECS_PER_JIFFY  (1000000 / HZ)</div><div class='add'>+#define TICK_TIMER_LIMIT ((100 * 1000000 / 4) / HZ)</div><div class='add'>+</div><div class='add'>+static unsigned int pcic_cycles_offset(void)</div><div class='ctx'> {</div><div class='del'>-	pcic_clear_clock_irq();</div><div class='del'>-	xtime_update(1);</div><div class='del'>-#ifndef CONFIG_SMP</div><div class='del'>-	update_process_times(user_mode(get_irq_regs()));</div><div class='del'>-#endif</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='add'>+	u32 value, count;</div><div class='ctx'> </div><div class='del'>-#define USECS_PER_JIFFY  10000  /* We have 100HZ "standard" timer for sparc */</div><div class='del'>-#define TICK_TIMER_LIMIT ((100*1000000/4)/100)</div><div class='add'>+	value = readl(pcic0.pcic_regs + PCI_SYS_COUNTER);</div><div class='add'>+	count = value &amp; ~PCI_SYS_COUNTER_OVERFLOW;</div><div class='ctx'> </div><div class='del'>-u32 pci_gettimeoffset(void)</div><div class='del'>-{</div><div class='add'>+	if (value &amp; PCI_SYS_COUNTER_OVERFLOW)</div><div class='add'>+		count += TICK_TIMER_LIMIT;</div><div class='ctx'> 	/*</div><div class='del'>-	 * We divide all by 100</div><div class='add'>+	 * We divide all by HZ</div><div class='ctx'> 	 * to have microsecond resolution and to avoid overflow</div><div class='ctx'> 	 */</div><div class='del'>-	unsigned long count =</div><div class='del'>-	    readl(pcic0.pcic_regs+PCI_SYS_COUNTER) &amp; ~PCI_SYS_COUNTER_OVERFLOW;</div><div class='del'>-	count = ((count/100)*USECS_PER_JIFFY) / (TICK_TIMER_LIMIT/100);</div><div class='del'>-	return count * 1000;</div><div class='del'>-}</div><div class='add'>+	count = ((count / HZ) * USECS_PER_JIFFY) / (TICK_TIMER_LIMIT / HZ);</div><div class='ctx'> </div><div class='add'>+	/* Coordinate with the sparc_config.clock_rate setting */</div><div class='add'>+	return count * 2;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> void __init pci_time_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -736,9 +733,16 @@ void __init pci_time_init(void)</div><div class='ctx'> 	int timer_irq, irq;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	do_arch_gettimeoffset = pci_gettimeoffset;</div><div class='del'>-</div><div class='del'>-	btfixup();</div><div class='add'>+#ifndef CONFIG_SMP</div><div class='add'>+	/*</div><div class='add'>+	 * The clock_rate is in SBUS dimension.</div><div class='add'>+	 * We take into account this in pcic_cycles_offset()</div><div class='add'>+	 */</div><div class='add'>+	sparc_config.clock_rate = SBUS_CLOCK_RATE / HZ;</div><div class='add'>+	sparc_config.features |= FEAT_L10_CLOCKEVENT;</div><div class='add'>+#endif</div><div class='add'>+	sparc_config.features |= FEAT_L10_CLOCKSOURCE;</div><div class='add'>+	sparc_config.get_cycles_offset = pcic_cycles_offset;</div><div class='ctx'> </div><div class='ctx'> 	writel (TICK_TIMER_LIMIT, pcic-&gt;pcic_regs+PCI_SYS_LIMIT);</div><div class='ctx'> 	/* PROM should set appropriate irq */</div><div class='hunk'>@@ -747,7 +751,7 @@ void __init pci_time_init(void)</div><div class='ctx'> 	writel (PCI_COUNTER_IRQ_SET(timer_irq, 0),</div><div class='ctx'> 		pcic-&gt;pcic_regs+PCI_COUNTER_IRQ);</div><div class='ctx'> 	irq = pcic_build_device_irq(NULL, timer_irq);</div><div class='del'>-	err = request_irq(irq, pcic_timer_handler,</div><div class='add'>+	err = request_irq(irq, timer_interrupt,</div><div class='ctx'> 			  IRQF_TIMER, "timer", NULL);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		prom_printf("time_init: unable to attach IRQ%d\n", timer_irq);</div><div class='hunk'>@@ -875,10 +879,9 @@ static void pcic_load_profile_irq(int cpu, unsigned int limit)</div><div class='ctx'> </div><div class='ctx'> void __init sun4m_pci_init_IRQ(void)</div><div class='ctx'> {</div><div class='del'>-	sparc_irq_config.build_device_irq = pcic_build_device_irq;</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM);</div><div class='add'>+	sparc_config.build_device_irq = pcic_build_device_irq;</div><div class='add'>+	sparc_config.clear_clock_irq  = pcic_clear_clock_irq;</div><div class='add'>+	sparc_config.load_profile_irq = pcic_load_profile_irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int pcibios_assign_resource(struct pci_dev *pdev, int resource)</div><div class='head'>diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c<br/>index 28559ce5eeb5..5713957dcb8a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/perf_event.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/perf_event.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/perf_event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/perf_event.c</a></div><div class='hunk'>@@ -1296,8 +1296,6 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self,</div><div class='ctx'> </div><div class='ctx'> 	regs = args-&gt;regs;</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0);</div><div class='del'>-</div><div class='ctx'> 	cpuc = &amp;__get_cpu_var(cpu_hw_events);</div><div class='ctx'> </div><div class='ctx'> 	/* If the PMU has the TOE IRQ enable bits, we need to do a</div><div class='hunk'>@@ -1321,7 +1319,7 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self,</div><div class='ctx'> 		if (val &amp; (1ULL &lt;&lt; 31))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		data.period = event-&gt;hw.last_period;</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='ctx'> 		if (!sparc_perf_event_set_period(event, hwc, idx))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/kernel/process_32.c b/arch/sparc/kernel/process_32.c<br/>index efa07542e85f..cb36e82dcd5d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/process_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/process_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/process_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/process_32.c</a></div><div class='hunk'>@@ -65,84 +65,25 @@ extern void fpsave(unsigned long *, unsigned long *, void *, unsigned long *);</div><div class='ctx'> struct task_struct *last_task_used_math = NULL;</div><div class='ctx'> struct thread_info *current_set[NR_CPUS];</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_SMP</div><div class='del'>-</div><div class='del'>-#define SUN4C_FAULT_HIGH 100</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * the idle loop on a Sparc... ;)</div><div class='ctx'>  */</div><div class='ctx'> void cpu_idle(void)</div><div class='ctx'> {</div><div class='del'>-	/* endless idle loop with no priority at all */</div><div class='del'>-	for (;;) {</div><div class='del'>-		if (ARCH_SUN4C) {</div><div class='del'>-			static int count = HZ;</div><div class='del'>-			static unsigned long last_jiffies;</div><div class='del'>-			static unsigned long last_faults;</div><div class='del'>-			static unsigned long fps;</div><div class='del'>-			unsigned long now;</div><div class='del'>-			unsigned long faults;</div><div class='del'>-</div><div class='del'>-			extern unsigned long sun4c_kernel_faults;</div><div class='del'>-			extern void sun4c_grow_kernel_ring(void);</div><div class='del'>-</div><div class='del'>-			local_irq_disable();</div><div class='del'>-			now = jiffies;</div><div class='del'>-			count -= (now - last_jiffies);</div><div class='del'>-			last_jiffies = now;</div><div class='del'>-			if (count &lt; 0) {</div><div class='del'>-				count += HZ;</div><div class='del'>-				faults = sun4c_kernel_faults;</div><div class='del'>-				fps = (fps + (faults - last_faults)) &gt;&gt; 1;</div><div class='del'>-				last_faults = faults;</div><div class='del'>-#if 0</div><div class='del'>-				printk("kernel faults / second = %ld\n", fps);</div><div class='del'>-#endif</div><div class='del'>-				if (fps &gt;= SUN4C_FAULT_HIGH) {</div><div class='del'>-					sun4c_grow_kernel_ring();</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-			local_irq_enable();</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (pm_idle) {</div><div class='del'>-			while (!need_resched())</div><div class='del'>-				(*pm_idle)();</div><div class='del'>-		} else {</div><div class='del'>-			while (!need_resched())</div><div class='del'>-				cpu_relax();</div><div class='del'>-		}</div><div class='del'>-		schedule_preempt_disabled();</div><div class='del'>-		check_pgt_cache();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+	set_thread_flag(TIF_POLLING_NRFLAG);</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-/* This is being executed in task 0 'user space'. */</div><div class='del'>-void cpu_idle(void)</div><div class='del'>-{</div><div class='del'>-        set_thread_flag(TIF_POLLING_NRFLAG);</div><div class='ctx'> 	/* endless idle loop with no priority at all */</div><div class='del'>-	while(1) {</div><div class='del'>-#ifdef CONFIG_SPARC_LEON</div><div class='del'>-		if (pm_idle) {</div><div class='del'>-			while (!need_resched())</div><div class='add'>+	for (;;) {</div><div class='add'>+		while (!need_resched()) {</div><div class='add'>+			if (pm_idle)</div><div class='ctx'> 				(*pm_idle)();</div><div class='del'>-		} else</div><div class='del'>-#endif</div><div class='del'>-		{</div><div class='del'>-			while (!need_resched())</div><div class='add'>+			else</div><div class='ctx'> 				cpu_relax();</div><div class='ctx'> 		}</div><div class='ctx'> 		schedule_preempt_disabled();</div><div class='del'>-		check_pgt_cache();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* XXX cli/sti -&gt; local_irq_xxx here, check this works once SMP is fixed. */</div><div class='ctx'> void machine_halt(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -179,88 +120,6 @@ void machine_power_off(void)</div><div class='ctx'> 	machine_halt();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if 0</div><div class='del'>-</div><div class='del'>-static DEFINE_SPINLOCK(sparc_backtrace_lock);</div><div class='del'>-</div><div class='del'>-void __show_backtrace(unsigned long fp)</div><div class='del'>-{</div><div class='del'>-	struct reg_window32 *rw;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;sparc_backtrace_lock, flags);</div><div class='del'>-</div><div class='del'>-	rw = (struct reg_window32 *)fp;</div><div class='del'>-        while(rw &amp;&amp; (((unsigned long) rw) &gt;= PAGE_OFFSET) &amp;&amp;</div><div class='del'>-            !(((unsigned long) rw) &amp; 0x7)) {</div><div class='del'>-		printk("CPU[%d]: ARGS[%08lx,%08lx,%08lx,%08lx,%08lx,%08lx] "</div><div class='del'>-		       "FP[%08lx] CALLER[%08lx]: ", cpu,</div><div class='del'>-		       rw-&gt;ins[0], rw-&gt;ins[1], rw-&gt;ins[2], rw-&gt;ins[3],</div><div class='del'>-		       rw-&gt;ins[4], rw-&gt;ins[5],</div><div class='del'>-		       rw-&gt;ins[6],</div><div class='del'>-		       rw-&gt;ins[7]);</div><div class='del'>-		printk("%pS\n", (void *) rw-&gt;ins[7]);</div><div class='del'>-		rw = (struct reg_window32 *) rw-&gt;ins[6];</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;sparc_backtrace_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define __SAVE __asm__ __volatile__("save %sp, -0x40, %sp\n\t")</div><div class='del'>-#define __RESTORE __asm__ __volatile__("restore %g0, %g0, %g0\n\t")</div><div class='del'>-#define __GET_FP(fp) __asm__ __volatile__("mov %%i6, %0" : "=r" (fp))</div><div class='del'>-</div><div class='del'>-void show_backtrace(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long fp;</div><div class='del'>-</div><div class='del'>-	__SAVE; __SAVE; __SAVE; __SAVE;</div><div class='del'>-	__SAVE; __SAVE; __SAVE; __SAVE;</div><div class='del'>-	__RESTORE; __RESTORE; __RESTORE; __RESTORE;</div><div class='del'>-	__RESTORE; __RESTORE; __RESTORE; __RESTORE;</div><div class='del'>-</div><div class='del'>-	__GET_FP(fp);</div><div class='del'>-</div><div class='del'>-	__show_backtrace(fp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-void smp_show_backtrace_all_cpus(void)</div><div class='del'>-{</div><div class='del'>-	xc0((smpfunc_t) show_backtrace);</div><div class='del'>-	show_backtrace();</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-void show_stackframe(struct sparc_stackf *sf)</div><div class='del'>-{</div><div class='del'>-	unsigned long size;</div><div class='del'>-	unsigned long *stk;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	printk("l0: %08lx l1: %08lx l2: %08lx l3: %08lx "</div><div class='del'>-	       "l4: %08lx l5: %08lx l6: %08lx l7: %08lx\n",</div><div class='del'>-	       sf-&gt;locals[0], sf-&gt;locals[1], sf-&gt;locals[2], sf-&gt;locals[3],</div><div class='del'>-	       sf-&gt;locals[4], sf-&gt;locals[5], sf-&gt;locals[6], sf-&gt;locals[7]);</div><div class='del'>-	printk("i0: %08lx i1: %08lx i2: %08lx i3: %08lx "</div><div class='del'>-	       "i4: %08lx i5: %08lx fp: %08lx i7: %08lx\n",</div><div class='del'>-	       sf-&gt;ins[0], sf-&gt;ins[1], sf-&gt;ins[2], sf-&gt;ins[3],</div><div class='del'>-	       sf-&gt;ins[4], sf-&gt;ins[5], (unsigned long)sf-&gt;fp, sf-&gt;callers_pc);</div><div class='del'>-	printk("sp: %08lx x0: %08lx x1: %08lx x2: %08lx "</div><div class='del'>-	       "x3: %08lx x4: %08lx x5: %08lx xx: %08lx\n",</div><div class='del'>-	       (unsigned long)sf-&gt;structptr, sf-&gt;xargs[0], sf-&gt;xargs[1],</div><div class='del'>-	       sf-&gt;xargs[2], sf-&gt;xargs[3], sf-&gt;xargs[4], sf-&gt;xargs[5],</div><div class='del'>-	       sf-&gt;xxargs[0]);</div><div class='del'>-	size = ((unsigned long)sf-&gt;fp) - ((unsigned long)sf);</div><div class='del'>-	size -= STACKFRAME_SZ;</div><div class='del'>-	stk = (unsigned long *)((unsigned long)sf + STACKFRAME_SZ);</div><div class='del'>-	i = 0;</div><div class='del'>-	do {</div><div class='del'>-		printk("s%d: %08lx\n", i++, *stk++);</div><div class='del'>-	} while ((size -= sizeof(unsigned long)));</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> void show_regs(struct pt_regs *r)</div><div class='ctx'> {</div><div class='ctx'> 	struct reg_window32 *rw = (struct reg_window32 *) r-&gt;u_regs[14];</div><div class='head'>diff --git a/arch/sparc/kernel/prom_common.c b/arch/sparc/kernel/prom_common.c<br/>index 741df916c124..1303021748c8 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/prom_common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/prom_common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/prom_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/prom_common.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> #include &lt;linux/of_pdt.h&gt;</div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='ctx'> #include &lt;asm/oplib.h&gt;</div><div class='del'>-#include &lt;asm/leon.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "prom.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/kernel/rtrap_32.S b/arch/sparc/kernel/rtrap_32.S<br/>index 5f5f74c2c2ca..6c34de0c2abd 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/rtrap_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/rtrap_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/rtrap_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/rtrap_32.S</a></div><div class='hunk'>@@ -128,13 +128,12 @@ rtrap_patch2:	and	%glob_tmp, 0xff, %glob_tmp</div><div class='ctx'> </div><div class='ctx'> 		wr	%glob_tmp, 0x0, %wim</div><div class='ctx'> </div><div class='del'>-				/* Here comes the architecture specific </div><div class='del'>-				 * branch to the user stack checking routine</div><div class='del'>-				 * for return from traps.</div><div class='del'>-				 */</div><div class='del'>-				.globl	rtrap_mmu_patchme</div><div class='del'>-rtrap_mmu_patchme:	b	sun4c_rett_stackchk</div><div class='del'>-				 andcc	%fp, 0x7, %g0	</div><div class='add'>+	/* Here comes the architecture specific</div><div class='add'>+	 * branch to the user stack checking routine</div><div class='add'>+	 * for return from traps.</div><div class='add'>+	 */</div><div class='add'>+	b	srmmu_rett_stackchk</div><div class='add'>+	 andcc	%fp, 0x7, %g0</div><div class='ctx'> </div><div class='ctx'> ret_trap_userwins_ok:</div><div class='ctx'> 	LOAD_PT_PRIV(sp, t_psr, t_pc, t_npc)</div><div class='hunk'>@@ -225,69 +224,6 @@ ret_trap_user_stack_is_bolixed:</div><div class='ctx'> 	b	signal_p</div><div class='ctx'> 	 ld	[%curptr + TI_FLAGS], %g2</div><div class='ctx'> </div><div class='del'>-sun4c_rett_stackchk:</div><div class='del'>-	be	1f</div><div class='del'>-	 and	%fp, 0xfff, %g1		! delay slot</div><div class='del'>-</div><div class='del'>-	b	ret_trap_user_stack_is_bolixed + 0x4</div><div class='del'>-	 wr	%t_wim, 0x0, %wim</div><div class='del'>-</div><div class='del'>-	/* See if we have to check the sanity of one page or two */</div><div class='del'>-1:</div><div class='del'>-	add	%g1, 0x38, %g1</div><div class='del'>-	sra	%fp, 29, %g2</div><div class='del'>-	add	%g2, 0x1, %g2</div><div class='del'>-	andncc	%g2, 0x1, %g0</div><div class='del'>-	be	1f</div><div class='del'>-	 andncc	%g1, 0xff8, %g0</div><div class='del'>-</div><div class='del'>-	/* %sp is in vma hole, yuck */</div><div class='del'>-	b	ret_trap_user_stack_is_bolixed + 0x4</div><div class='del'>-	 wr	%t_wim, 0x0, %wim</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	be	sun4c_rett_onepage	/* Only one page to check */</div><div class='del'>-	 lda	[%fp] ASI_PTE, %g2</div><div class='del'>-</div><div class='del'>-sun4c_rett_twopages:</div><div class='del'>-	add	%fp, 0x38, %g1</div><div class='del'>-	sra	%g1, 29, %g2</div><div class='del'>-	add	%g2, 0x1, %g2</div><div class='del'>-	andncc	%g2, 0x1, %g0</div><div class='del'>-	be	1f</div><div class='del'>-	 lda	[%g1] ASI_PTE, %g2</div><div class='del'>-</div><div class='del'>-	/* Second page is in vma hole */</div><div class='del'>-	b	ret_trap_user_stack_is_bolixed + 0x4</div><div class='del'>-	 wr	%t_wim, 0x0, %wim</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	srl	%g2, 29, %g2</div><div class='del'>-	andcc	%g2, 0x4, %g0</div><div class='del'>-	bne	sun4c_rett_onepage</div><div class='del'>-	 lda	[%fp] ASI_PTE, %g2</div><div class='del'>-</div><div class='del'>-	/* Second page has bad perms */</div><div class='del'>-	b	ret_trap_user_stack_is_bolixed + 0x4</div><div class='del'>-	 wr	%t_wim, 0x0, %wim</div><div class='del'>-</div><div class='del'>-sun4c_rett_onepage:</div><div class='del'>-	srl	%g2, 29, %g2</div><div class='del'>-	andcc	%g2, 0x4, %g0</div><div class='del'>-	bne,a	1f</div><div class='del'>-	 restore %g0, %g0, %g0</div><div class='del'>-</div><div class='del'>-	/* A page had bad page permissions, losing... */</div><div class='del'>-	b	ret_trap_user_stack_is_bolixed + 0x4</div><div class='del'>-	 wr	%t_wim, 0x0, %wim</div><div class='del'>-</div><div class='del'>-	/* Whee, things are ok, load the window and continue. */</div><div class='del'>-1:</div><div class='del'>-	LOAD_WINDOW(sp)</div><div class='del'>-</div><div class='del'>-	b	ret_trap_userwins_ok</div><div class='del'>-	 save	%g0, %g0, %g0</div><div class='del'>-</div><div class='ctx'> 	.globl	srmmu_rett_stackchk</div><div class='ctx'> srmmu_rett_stackchk:</div><div class='ctx'> 	bne	ret_trap_user_stack_is_bolixed</div><div class='hunk'>@@ -295,11 +231,14 @@ srmmu_rett_stackchk:</div><div class='ctx'> 	cmp	%g1, %fp</div><div class='ctx'> 	bleu	ret_trap_user_stack_is_bolixed</div><div class='ctx'> 	 mov	AC_M_SFSR, %g1</div><div class='del'>-	lda	[%g1] ASI_M_MMUREGS, %g0</div><div class='add'>+LEON_PI(lda	[%g1] ASI_LEON_MMUREGS, %g0)</div><div class='add'>+SUN_PI_(lda	[%g1] ASI_M_MMUREGS, %g0)</div><div class='ctx'> </div><div class='del'>-	lda	[%g0] ASI_M_MMUREGS, %g1</div><div class='add'>+LEON_PI(lda	[%g0] ASI_LEON_MMUREGS, %g1)</div><div class='add'>+SUN_PI_(lda	[%g0] ASI_M_MMUREGS, %g1)</div><div class='ctx'> 	or	%g1, 0x2, %g1</div><div class='del'>-	sta	%g1, [%g0] ASI_M_MMUREGS</div><div class='add'>+LEON_PI(sta	%g1, [%g0] ASI_LEON_MMUREGS)</div><div class='add'>+SUN_PI_(sta	%g1, [%g0] ASI_M_MMUREGS)</div><div class='ctx'> </div><div class='ctx'> 	restore	%g0, %g0, %g0</div><div class='ctx'> </div><div class='hunk'>@@ -308,13 +247,16 @@ srmmu_rett_stackchk:</div><div class='ctx'> 	save	%g0, %g0, %g0</div><div class='ctx'> </div><div class='ctx'> 	andn	%g1, 0x2, %g1</div><div class='del'>-	sta	%g1, [%g0] ASI_M_MMUREGS</div><div class='add'>+LEON_PI(sta	%g1, [%g0] ASI_LEON_MMUREGS)</div><div class='add'>+SUN_PI_(sta	%g1, [%g0] ASI_M_MMUREGS)</div><div class='ctx'> </div><div class='ctx'> 	mov	AC_M_SFAR, %g2</div><div class='del'>-	lda	[%g2] ASI_M_MMUREGS, %g2</div><div class='add'>+LEON_PI(lda	[%g2] ASI_LEON_MMUREGS, %g2)</div><div class='add'>+SUN_PI_(lda	[%g2] ASI_M_MMUREGS, %g2)</div><div class='ctx'> </div><div class='ctx'> 	mov	AC_M_SFSR, %g1</div><div class='del'>-	lda	[%g1] ASI_M_MMUREGS, %g1</div><div class='add'>+LEON_PI(lda	[%g1] ASI_LEON_MMUREGS, %g1)</div><div class='add'>+SUN_PI_(lda	[%g1] ASI_M_MMUREGS, %g1)</div><div class='ctx'> 	andcc	%g1, 0x2, %g0</div><div class='ctx'> 	be	ret_trap_userwins_ok</div><div class='ctx'> 	 nop</div><div class='head'>diff --git a/arch/sparc/kernel/rtrap_64.S b/arch/sparc/kernel/rtrap_64.S<br/>index 9171fc238def..afa2a9e3d0a0 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/rtrap_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/rtrap_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/rtrap_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/rtrap_64.S</a></div><div class='hunk'>@@ -73,18 +73,8 @@ rtrap_nmi:	ldx			[%sp + PTREGS_OFF + PT_V9_TSTATE], %l1</div><div class='ctx'> 		.globl			rtrap_irq, rtrap, irqsz_patchme, rtrap_xcall</div><div class='ctx'> rtrap_irq:</div><div class='ctx'> rtrap:</div><div class='del'>-#ifndef CONFIG_SMP</div><div class='del'>-		sethi			%hi(__cpu_data), %l0</div><div class='del'>-		lduw			[%l0 + %lo(__cpu_data)], %l1</div><div class='del'>-#else</div><div class='del'>-		sethi			%hi(__cpu_data), %l0</div><div class='del'>-		or			%l0, %lo(__cpu_data), %l0</div><div class='del'>-		lduw			[%l0 + %g5], %l1</div><div class='del'>-#endif</div><div class='del'>-		cmp			%l1, 0</div><div class='del'>-</div><div class='ctx'> 		/* mm/ultra.S:xcall_report_regs KNOWS about this load. */</div><div class='del'>-		 ldx			[%sp + PTREGS_OFF + PT_V9_TSTATE], %l1</div><div class='add'>+		ldx			[%sp + PTREGS_OFF + PT_V9_TSTATE], %l1</div><div class='ctx'> rtrap_xcall:</div><div class='ctx'> 		sethi			%hi(0xf &lt;&lt; 20), %l4</div><div class='ctx'> 		and			%l1, %l4, %l4</div><div class='head'>diff --git a/arch/sparc/kernel/setup_32.c b/arch/sparc/kernel/setup_32.c<br/>index d444468b27f6..efe3e64bba38 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/setup_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/setup_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/setup_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/setup_32.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/kdebug.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/start_kernel.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='hunk'>@@ -42,10 +43,10 @@</div><div class='ctx'> #include &lt;asm/vaddrs.h&gt;</div><div class='ctx'> #include &lt;asm/mbus.h&gt;</div><div class='ctx'> #include &lt;asm/idprom.h&gt;</div><div class='del'>-#include &lt;asm/machines.h&gt;</div><div class='ctx'> #include &lt;asm/cpudata.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "kernel.h"</div><div class='ctx'> </div><div class='hunk'>@@ -106,7 +107,6 @@ unsigned long cmdline_memory_size __initdata = 0;</div><div class='ctx'> </div><div class='ctx'> /* which CPU booted us (0xff = not set) */</div><div class='ctx'> unsigned char boot_cpu_id = 0xff; /* 0xff will make it into DATA section... */</div><div class='del'>-unsigned char boot_cpu_id4; /* boot_cpu_id &lt;&lt; 2 */</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> prom_console_write(struct console *con, const char *s, unsigned n)</div><div class='hunk'>@@ -182,13 +182,6 @@ static void __init boot_flags_init(char *commands)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* This routine will in the future do all the nasty prom stuff</div><div class='del'>- * to probe for the mmu type and its parameters, etc. This will</div><div class='del'>- * also be where SMP things happen.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-extern void sun4c_probe_vac(void);</div><div class='del'>-</div><div class='ctx'> extern unsigned short root_flags;</div><div class='ctx'> extern unsigned short root_dev;</div><div class='ctx'> extern unsigned short ram_flags;</div><div class='hunk'>@@ -200,35 +193,91 @@ extern int root_mountflags;</div><div class='ctx'> </div><div class='ctx'> char reboot_command[COMMAND_LINE_SIZE];</div><div class='ctx'> </div><div class='add'>+struct cpuid_patch_entry {</div><div class='add'>+	unsigned int	addr;</div><div class='add'>+	unsigned int	sun4d[3];</div><div class='add'>+	unsigned int	leon[3];</div><div class='add'>+};</div><div class='add'>+extern struct cpuid_patch_entry __cpuid_patch, __cpuid_patch_end;</div><div class='add'>+</div><div class='add'>+static void __init per_cpu_patch(void)</div><div class='add'>+{</div><div class='add'>+	struct cpuid_patch_entry *p;</div><div class='add'>+</div><div class='add'>+	if (sparc_cpu_model == sun4m) {</div><div class='add'>+		/* Nothing to do, this is what the unpatched code</div><div class='add'>+		 * targets.</div><div class='add'>+		 */</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	p = &amp;__cpuid_patch;</div><div class='add'>+	while (p &lt; &amp;__cpuid_patch_end) {</div><div class='add'>+		unsigned long addr = p-&gt;addr;</div><div class='add'>+		unsigned int *insns;</div><div class='add'>+</div><div class='add'>+		switch (sparc_cpu_model) {</div><div class='add'>+		case sun4d:</div><div class='add'>+			insns = &amp;p-&gt;sun4d[0];</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case sparc_leon:</div><div class='add'>+			insns = &amp;p-&gt;leon[0];</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			prom_printf("Unknown cpu type, halting.\n");</div><div class='add'>+			prom_halt();</div><div class='add'>+		}</div><div class='add'>+		*(unsigned int *) (addr + 0) = insns[0];</div><div class='add'>+		flushi(addr + 0);</div><div class='add'>+		*(unsigned int *) (addr + 4) = insns[1];</div><div class='add'>+		flushi(addr + 4);</div><div class='add'>+		*(unsigned int *) (addr + 8) = insns[2];</div><div class='add'>+		flushi(addr + 8);</div><div class='add'>+</div><div class='add'>+		p++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct leon_1insn_patch_entry {</div><div class='add'>+	unsigned int addr;</div><div class='add'>+	unsigned int insn;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum sparc_cpu sparc_cpu_model;</div><div class='ctx'> EXPORT_SYMBOL(sparc_cpu_model);</div><div class='ctx'> </div><div class='del'>-struct tt_entry *sparc_ttable;</div><div class='add'>+static __init void leon_patch(void)</div><div class='add'>+{</div><div class='add'>+	struct leon_1insn_patch_entry *start = (void *)__leon_1insn_patch;</div><div class='add'>+	struct leon_1insn_patch_entry *end = (void *)__leon_1insn_patch_end;</div><div class='ctx'> </div><div class='del'>-struct pt_regs fake_swapper_regs;</div><div class='add'>+	/* Default instruction is leon - no patching */</div><div class='add'>+	if (sparc_cpu_model == sparc_leon)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-void __init setup_arch(char **cmdline_p)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	unsigned long highest_paddr;</div><div class='add'>+	while (start &lt; end) {</div><div class='add'>+		unsigned long addr = start-&gt;addr;</div><div class='ctx'> </div><div class='del'>-	sparc_ttable = (struct tt_entry *) &amp;trapbase;</div><div class='add'>+		*(unsigned int *)(addr) = start-&gt;insn;</div><div class='add'>+		flushi(addr);</div><div class='ctx'> </div><div class='del'>-	/* Initialize PROM console and command line. */</div><div class='del'>-	*cmdline_p = prom_getbootargs();</div><div class='del'>-	strcpy(boot_command_line, *cmdline_p);</div><div class='del'>-	parse_early_param();</div><div class='add'>+		start++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	boot_flags_init(*cmdline_p);</div><div class='add'>+struct tt_entry *sparc_ttable;</div><div class='add'>+struct pt_regs fake_swapper_regs;</div><div class='ctx'> </div><div class='del'>-	register_console(&amp;prom_early_console);</div><div class='add'>+/* Called from head_32.S - before we have setup anything</div><div class='add'>+ * in the kernel. Be very careful with what you do here.</div><div class='add'>+ */</div><div class='add'>+void __init sparc32_start_kernel(struct linux_romvec *rp)</div><div class='add'>+{</div><div class='add'>+	prom_init(rp);</div><div class='ctx'> </div><div class='ctx'> 	/* Set sparc_cpu_model */</div><div class='ctx'> 	sparc_cpu_model = sun_unknown;</div><div class='del'>-	if (!strcmp(&amp;cputypval[0], "sun4 "))</div><div class='del'>-		sparc_cpu_model = sun4;</div><div class='del'>-	if (!strcmp(&amp;cputypval[0], "sun4c"))</div><div class='del'>-		sparc_cpu_model = sun4c;</div><div class='ctx'> 	if (!strcmp(&amp;cputypval[0], "sun4m"))</div><div class='ctx'> 		sparc_cpu_model = sun4m;</div><div class='ctx'> 	if (!strcmp(&amp;cputypval[0], "sun4s"))</div><div class='hunk'>@@ -242,14 +291,28 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	if (!strncmp(&amp;cputypval[0], "leon" , 4))</div><div class='ctx'> 		sparc_cpu_model = sparc_leon;</div><div class='ctx'> </div><div class='add'>+	leon_patch();</div><div class='add'>+	start_kernel();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init setup_arch(char **cmdline_p)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	unsigned long highest_paddr;</div><div class='add'>+</div><div class='add'>+	sparc_ttable = (struct tt_entry *) &amp;trapbase;</div><div class='add'>+</div><div class='add'>+	/* Initialize PROM console and command line. */</div><div class='add'>+	*cmdline_p = prom_getbootargs();</div><div class='add'>+	strcpy(boot_command_line, *cmdline_p);</div><div class='add'>+	parse_early_param();</div><div class='add'>+</div><div class='add'>+	boot_flags_init(*cmdline_p);</div><div class='add'>+</div><div class='add'>+	register_console(&amp;prom_early_console);</div><div class='add'>+</div><div class='ctx'> 	printk("ARCH: ");</div><div class='ctx'> 	switch(sparc_cpu_model) {</div><div class='del'>-	case sun4:</div><div class='del'>-		printk("SUN4\n");</div><div class='del'>-		break;</div><div class='del'>-	case sun4c:</div><div class='del'>-		printk("SUN4C\n");</div><div class='del'>-		break;</div><div class='ctx'> 	case sun4m:</div><div class='ctx'> 		printk("SUN4M\n");</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -275,8 +338,6 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	idprom_init();</div><div class='del'>-	if (ARCH_SUN4C)</div><div class='del'>-		sun4c_probe_vac();</div><div class='ctx'> 	load_mmu();</div><div class='ctx'> </div><div class='ctx'> 	phys_base = 0xffffffffUL;</div><div class='hunk'>@@ -313,6 +374,9 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	init_mm.context = (unsigned long) NO_CONTEXT;</div><div class='ctx'> 	init_task.thread.kregs = &amp;fake_swapper_regs;</div><div class='ctx'> </div><div class='add'>+	/* Run-time patch instructions to match the cpu model */</div><div class='add'>+	per_cpu_patch();</div><div class='add'>+</div><div class='ctx'> 	paging_init();</div><div class='ctx'> </div><div class='ctx'> 	smp_setup_cpu_possible_map();</div><div class='head'>diff --git a/arch/sparc/kernel/signal32.c b/arch/sparc/kernel/signal32.c<br/>index 948700fb9036..a53e0a5fd3a3 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/signal32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/signal32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/signal32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/signal32.c</a></div><div class='hunk'>@@ -32,8 +32,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "sigutil.h"</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> /* This magic should be in g_upper[0] for all upper parts</div><div class='ctx'>  * to be valid.</div><div class='ctx'>  */</div><div class='hunk'>@@ -215,8 +213,9 @@ void do_sigreturn32(struct pt_regs *regs)</div><div class='ctx'> 	    (((unsigned long) sf) &amp; 3))</div><div class='ctx'> 		goto segv;</div><div class='ctx'> </div><div class='del'>-	get_user(pc, &amp;sf-&gt;info.si_regs.pc);</div><div class='del'>-	__get_user(npc, &amp;sf-&gt;info.si_regs.npc);</div><div class='add'>+	if (get_user(pc, &amp;sf-&gt;info.si_regs.pc) ||</div><div class='add'>+	    __get_user(npc, &amp;sf-&gt;info.si_regs.npc))</div><div class='add'>+		goto segv;</div><div class='ctx'> </div><div class='ctx'> 	if ((pc | npc) &amp; 3)</div><div class='ctx'> 		goto segv;</div><div class='hunk'>@@ -273,7 +272,6 @@ void do_sigreturn32(struct pt_regs *regs)</div><div class='ctx'> 		case 2: set.sig[1] = seta[2] + (((long)seta[3]) &lt;&lt; 32);</div><div class='ctx'> 		case 1: set.sig[0] = seta[0] + (((long)seta[1]) &lt;&lt; 32);</div><div class='ctx'> 	}</div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='hunk'>@@ -305,8 +303,9 @@ asmlinkage void do_rt_sigreturn32(struct pt_regs *regs)</div><div class='ctx'> 	    (((unsigned long) sf) &amp; 3))</div><div class='ctx'> 		goto segv;</div><div class='ctx'> </div><div class='del'>-	get_user(pc, &amp;sf-&gt;regs.pc);</div><div class='del'>-	__get_user(npc, &amp;sf-&gt;regs.npc);</div><div class='add'>+	if (get_user(pc, &amp;sf-&gt;regs.pc) || </div><div class='add'>+	    __get_user(npc, &amp;sf-&gt;regs.npc))</div><div class='add'>+		goto segv;</div><div class='ctx'> </div><div class='ctx'> 	if ((pc | npc) &amp; 3)</div><div class='ctx'> 		goto segv;</div><div class='hunk'>@@ -374,7 +373,6 @@ asmlinkage void do_rt_sigreturn32(struct pt_regs *regs)</div><div class='ctx'> 		case 2: set.sig[1] = seta.sig[2] + (((long)seta.sig[3]) &lt;&lt; 32);</div><div class='ctx'> 		case 1: set.sig[0] = seta.sig[0] + (((long)seta.sig[1]) &lt;&lt; 32);</div><div class='ctx'> 	}</div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> 	return;</div><div class='ctx'> segv:</div><div class='hunk'>@@ -773,7 +771,7 @@ sigsegv:</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int handle_signal32(unsigned long signr, struct k_sigaction *ka,</div><div class='add'>+static inline void handle_signal32(unsigned long signr, struct k_sigaction *ka,</div><div class='ctx'> 				  siginfo_t *info,</div><div class='ctx'> 				  sigset_t *oldset, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -785,12 +783,9 @@ static inline int handle_signal32(unsigned long signr, struct k_sigaction *ka,</div><div class='ctx'> 		err = setup_frame32(ka, regs, signr, oldset);</div><div class='ctx'> </div><div class='ctx'> 	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	block_sigmask(ka, signr);</div><div class='del'>-	tracehook_signal_handler(signr, info, ka, regs, 0);</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	signal_delivered(signr, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void syscall_restart32(unsigned long orig_i0, struct pt_regs *regs,</div><div class='hunk'>@@ -839,14 +834,7 @@ void do_signal32(sigset_t *oldset, struct pt_regs * regs)</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		if (restart_syscall)</div><div class='ctx'> 			syscall_restart32(orig_i0, regs, &amp;ka.sa);</div><div class='del'>-		if (handle_signal32(signr, &amp;ka, &amp;info, oldset, regs) == 0) {</div><div class='del'>-			/* A signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TS_RESTORE_SIGMASK flag.</div><div class='del'>-			 */</div><div class='del'>-			current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-		}</div><div class='add'>+		handle_signal32(signr, &amp;ka, &amp;info, oldset, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (restart_syscall &amp;&amp;</div><div class='hunk'>@@ -870,10 +858,7 @@ void do_signal32(sigset_t *oldset, struct pt_regs * regs)</div><div class='ctx'> 	/* If there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back</div><div class='ctx'> 	 */</div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK) {</div><div class='del'>-		current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-		set_current_blocked(&amp;current-&gt;saved_sigmask);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct sigstack32 {</div><div class='head'>diff --git a/arch/sparc/kernel/signal_32.c b/arch/sparc/kernel/signal_32.c<br/>index 1e750e415d7a..68f9c8650af4 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/signal_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/signal_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/signal_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/signal_32.c</a></div><div class='hunk'>@@ -29,8 +29,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "sigutil.h"</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> extern void fpsave(unsigned long *fpregs, unsigned long *fsr,</div><div class='ctx'> 		   void *fpqueue, unsigned long *fpqdepth);</div><div class='ctx'> extern void fpload(unsigned long *fpregs, unsigned long *fsr);</div><div class='hunk'>@@ -64,18 +62,8 @@ struct rt_signal_frame {</div><div class='ctx'> static int _sigpause_common(old_sigset_t set)</div><div class='ctx'> {</div><div class='ctx'> 	sigset_t blocked;</div><div class='del'>-</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-	set &amp;= _BLOCKABLE;</div><div class='ctx'> 	siginitset(&amp;blocked, set);</div><div class='del'>-	set_current_blocked(&amp;blocked);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage int sys_sigsuspend(old_sigset_t set)</div><div class='hunk'>@@ -140,7 +128,6 @@ asmlinkage void do_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto segv_and_exit;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='hunk'>@@ -207,7 +194,6 @@ asmlinkage void do_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 			goto segv;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> 	return;</div><div class='ctx'> segv:</div><div class='hunk'>@@ -217,12 +203,9 @@ segv:</div><div class='ctx'> /* Checks if the fp is valid */</div><div class='ctx'> static inline int invalid_frame_pointer(void __user *fp, int fplen)</div><div class='ctx'> {</div><div class='del'>-	if ((((unsigned long) fp) &amp; 7) ||</div><div class='del'>-	    !__access_ok((unsigned long)fp, fplen) ||</div><div class='del'>-	    ((sparc_cpu_model == sun4 || sparc_cpu_model == sun4c) &amp;&amp;</div><div class='del'>-	     ((unsigned long) fp &lt; 0xe0000000 &amp;&amp; (unsigned long) fp &gt;= 0x20000000)))</div><div class='add'>+	if ((((unsigned long) fp) &amp; 7) || !__access_ok((unsigned long)fp, fplen))</div><div class='ctx'> 		return 1;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -462,10 +445,11 @@ sigsegv:</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int</div><div class='add'>+static inline void</div><div class='ctx'> handle_signal(unsigned long signr, struct k_sigaction *ka,</div><div class='del'>-	      siginfo_t *info, sigset_t *oldset, struct pt_regs *regs)</div><div class='add'>+	      siginfo_t *info, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (ka-&gt;sa.sa_flags &amp; SA_SIGINFO)</div><div class='hunk'>@@ -474,12 +458,9 @@ handle_signal(unsigned long signr, struct k_sigaction *ka,</div><div class='ctx'> 		err = setup_frame(ka, regs, signr, oldset);</div><div class='ctx'> </div><div class='ctx'> 	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	block_sigmask(ka, signr);</div><div class='del'>-	tracehook_signal_handler(signr, info, ka, regs, 0);</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	signal_delivered(signr, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,</div><div class='hunk'>@@ -511,7 +492,6 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)</div><div class='ctx'> {</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='ctx'> 	int restart_syscall;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> </div><div class='hunk'>@@ -536,11 +516,6 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)</div><div class='ctx'> 	if (pt_regs_is_syscall(regs) &amp;&amp; (regs-&gt;psr &amp; PSR_C))</div><div class='ctx'> 		regs-&gt;u_regs[UREG_G6] = orig_i0;</div><div class='ctx'> </div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* If the debugger messes with the program counter, it clears</div><div class='hunk'>@@ -557,15 +532,7 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		if (restart_syscall)</div><div class='ctx'> 			syscall_restart(orig_i0, regs, &amp;ka.sa);</div><div class='del'>-		if (handle_signal(signr, &amp;ka, &amp;info, oldset, regs) == 0) {</div><div class='del'>-			/* a signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag.</div><div class='del'>-			 */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		}</div><div class='add'>+		handle_signal(signr, &amp;ka, &amp;info, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (restart_syscall &amp;&amp;</div><div class='hunk'>@@ -589,22 +556,17 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)</div><div class='ctx'> 	/* if there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back</div><div class='ctx'> 	 */</div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		set_current_blocked(&amp;current-&gt;saved_sigmask);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0,</div><div class='ctx'> 		      unsigned long thread_info_flags)</div><div class='ctx'> {</div><div class='del'>-	if (thread_info_flags &amp; (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))</div><div class='add'>+	if (thread_info_flags &amp; _TIF_SIGPENDING)</div><div class='ctx'> 		do_signal(regs, orig_i0);</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/kernel/signal_64.c b/arch/sparc/kernel/signal_64.c<br/>index 48b0f57b65f7..867de2f8189c 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/signal_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/signal_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/signal_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/signal_64.c</a></div><div class='hunk'>@@ -38,8 +38,6 @@</div><div class='ctx'> #include "systbls.h"</div><div class='ctx'> #include "sigutil.h"</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> /* {set, get}context() needed for 64-bit SparcLinux userland. */</div><div class='ctx'> asmlinkage void sparc64_set_context(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -71,7 +69,6 @@ asmlinkage void sparc64_set_context(struct pt_regs *regs)</div><div class='ctx'> 			if (__copy_from_user(&amp;set, &amp;ucp-&gt;uc_sigmask, sizeof(sigset_t)))</div><div class='ctx'> 				goto do_sigsegv;</div><div class='ctx'> 		}</div><div class='del'>-		sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 		set_current_blocked(&amp;set);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (test_thread_flag(TIF_32BIT)) {</div><div class='hunk'>@@ -242,19 +239,8 @@ struct rt_signal_frame {</div><div class='ctx'> static long _sigpause_common(old_sigset_t set)</div><div class='ctx'> {</div><div class='ctx'> 	sigset_t blocked;</div><div class='del'>-</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-	set &amp;= _BLOCKABLE;</div><div class='ctx'> 	siginitset(&amp;blocked, set);</div><div class='del'>-	set_current_blocked(&amp;blocked);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-</div><div class='del'>-	set_restore_sigmask();</div><div class='del'>-</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage long sys_sigpause(unsigned int set)</div><div class='hunk'>@@ -326,7 +312,6 @@ void do_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	/* Prevent syscall restart.  */</div><div class='ctx'> 	pt_regs_clear_syscall(regs);</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> 	return;</div><div class='ctx'> segv:</div><div class='hunk'>@@ -477,7 +462,7 @@ sigsegv:</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int handle_signal(unsigned long signr, struct k_sigaction *ka,</div><div class='add'>+static inline void handle_signal(unsigned long signr, struct k_sigaction *ka,</div><div class='ctx'> 				siginfo_t *info,</div><div class='ctx'> 				sigset_t *oldset, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -486,12 +471,9 @@ static inline int handle_signal(unsigned long signr, struct k_sigaction *ka,</div><div class='ctx'> 	err = setup_rt_frame(ka, regs, signr, oldset,</div><div class='ctx'> 			     (ka-&gt;sa.sa_flags &amp; SA_SIGINFO) ? info : NULL);</div><div class='ctx'> 	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	block_sigmask(ka, signr);</div><div class='del'>-	tracehook_signal_handler(signr, info, ka, regs, 0);</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	signal_delivered(signr, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,</div><div class='hunk'>@@ -523,7 +505,7 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)</div><div class='ctx'> {</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='ctx'> 	int restart_syscall;</div><div class='del'>-	sigset_t *oldset;</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> 	</div><div class='hunk'>@@ -549,11 +531,6 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)</div><div class='ctx'> 	    (regs-&gt;tstate &amp; (TSTATE_XCARRY | TSTATE_ICARRY)))</div><div class='ctx'> 		regs-&gt;u_regs[UREG_G6] = orig_i0;</div><div class='ctx'> </div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK)</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='ctx'> 	if (test_thread_flag(TIF_32BIT)) {</div><div class='ctx'> 		extern void do_signal32(sigset_t *, struct pt_regs *);</div><div class='hunk'>@@ -574,14 +551,7 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		if (restart_syscall)</div><div class='ctx'> 			syscall_restart(orig_i0, regs, &amp;ka.sa);</div><div class='del'>-		if (handle_signal(signr, &amp;ka, &amp;info, oldset, regs) == 0) {</div><div class='del'>-			/* A signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TS_RESTORE_SIGMASK flag.</div><div class='del'>-			 */</div><div class='del'>-			current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-		}</div><div class='add'>+		handle_signal(signr, &amp;ka, &amp;info, oldset, regs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (restart_syscall &amp;&amp;</div><div class='hunk'>@@ -605,10 +575,7 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)</div><div class='ctx'> 	/* If there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back</div><div class='ctx'> 	 */</div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK) {</div><div class='del'>-		current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-		set_current_blocked(&amp;current-&gt;saved_sigmask);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, unsigned long thread_info_flags)</div><div class='hunk'>@@ -618,8 +585,6 @@ void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, unsigned long</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/kernel/smp_32.c b/arch/sparc/kernel/smp_32.c<br/>index f671e7fd6ddc..79db45e5134a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/smp_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/smp_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/smp_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/smp_32.c</a></div><div class='hunk'>@@ -40,6 +40,8 @@ volatile unsigned long cpu_callin_map[NR_CPUS] __cpuinitdata = {0,};</div><div class='ctx'> </div><div class='ctx'> cpumask_t smp_commenced_mask = CPU_MASK_NONE;</div><div class='ctx'> </div><div class='add'>+const struct sparc32_ipi_ops *sparc32_ipi_ops;</div><div class='add'>+</div><div class='ctx'> /* The only guaranteed locking primitive available on all Sparc</div><div class='ctx'>  * processors is 'ldstub [%reg + immediate], %dest_reg' which atomically</div><div class='ctx'>  * places the current byte at the effective address into dest_reg and</div><div class='hunk'>@@ -85,14 +87,6 @@ void __init smp_cpus_done(unsigned int max_cpus)</div><div class='ctx'> 		(bogosum/(5000/HZ))%100);</div><div class='ctx'> </div><div class='ctx'> 	switch(sparc_cpu_model) {</div><div class='del'>-	case sun4:</div><div class='del'>-		printk("SUN4\n");</div><div class='del'>-		BUG();</div><div class='del'>-		break;</div><div class='del'>-	case sun4c:</div><div class='del'>-		printk("SUN4C\n");</div><div class='del'>-		BUG();</div><div class='del'>-		break;</div><div class='ctx'> 	case sun4m:</div><div class='ctx'> 		smp4m_smp_done();</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -132,7 +126,7 @@ void smp_send_reschedule(int cpu)</div><div class='ctx'> 	 * a single CPU. The trap handler needs only to do trap entry/return</div><div class='ctx'> 	 * to call schedule.</div><div class='ctx'> 	 */</div><div class='del'>-	BTFIXUP_CALL(smp_ipi_resched)(cpu);</div><div class='add'>+	sparc32_ipi_ops-&gt;resched(cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void smp_send_stop(void)</div><div class='hunk'>@@ -142,7 +136,7 @@ void smp_send_stop(void)</div><div class='ctx'> void arch_send_call_function_single_ipi(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	/* trigger one IPI single call on one CPU */</div><div class='del'>-	BTFIXUP_CALL(smp_ipi_single)(cpu);</div><div class='add'>+	sparc32_ipi_ops-&gt;single(cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_send_call_function_ipi_mask(const struct cpumask *mask)</div><div class='hunk'>@@ -151,7 +145,7 @@ void arch_send_call_function_ipi_mask(const struct cpumask *mask)</div><div class='ctx'> </div><div class='ctx'> 	/* trigger IPI mask call on each CPU */</div><div class='ctx'> 	for_each_cpu(cpu, mask)</div><div class='del'>-		BTFIXUP_CALL(smp_ipi_mask_one)(cpu);</div><div class='add'>+		sparc32_ipi_ops-&gt;mask_one(cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void smp_resched_interrupt(void)</div><div class='hunk'>@@ -179,150 +173,9 @@ void smp_call_function_interrupt(void)</div><div class='ctx'> 	irq_exit();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void smp_flush_cache_all(void)</div><div class='del'>-{</div><div class='del'>-	xc0((smpfunc_t) BTFIXUP_CALL(local_flush_cache_all));</div><div class='del'>-	local_flush_cache_all();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void smp_flush_tlb_all(void)</div><div class='del'>-{</div><div class='del'>-	xc0((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_all));</div><div class='del'>-	local_flush_tlb_all();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void smp_flush_cache_mm(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	if(mm-&gt;context != NO_CONTEXT) {</div><div class='del'>-		cpumask_t cpu_mask;</div><div class='del'>-		cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='del'>-		cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='del'>-		if (!cpumask_empty(&amp;cpu_mask))</div><div class='del'>-			xc1((smpfunc_t) BTFIXUP_CALL(local_flush_cache_mm), (unsigned long) mm);</div><div class='del'>-		local_flush_cache_mm(mm);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void smp_flush_tlb_mm(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	if(mm-&gt;context != NO_CONTEXT) {</div><div class='del'>-		cpumask_t cpu_mask;</div><div class='del'>-		cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='del'>-		cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='del'>-		if (!cpumask_empty(&amp;cpu_mask)) {</div><div class='del'>-			xc1((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_mm), (unsigned long) mm);</div><div class='del'>-			if(atomic_read(&amp;mm-&gt;mm_users) == 1 &amp;&amp; current-&gt;active_mm == mm)</div><div class='del'>-				cpumask_copy(mm_cpumask(mm),</div><div class='del'>-					     cpumask_of(smp_processor_id()));</div><div class='del'>-		}</div><div class='del'>-		local_flush_tlb_mm(mm);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void smp_flush_cache_range(struct vm_area_struct *vma, unsigned long start,</div><div class='del'>-			   unsigned long end)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-</div><div class='del'>-	if (mm-&gt;context != NO_CONTEXT) {</div><div class='del'>-		cpumask_t cpu_mask;</div><div class='del'>-		cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='del'>-		cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='del'>-		if (!cpumask_empty(&amp;cpu_mask))</div><div class='del'>-			xc3((smpfunc_t) BTFIXUP_CALL(local_flush_cache_range), (unsigned long) vma, start, end);</div><div class='del'>-		local_flush_cache_range(vma, start, end);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void smp_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,</div><div class='del'>-			 unsigned long end)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-</div><div class='del'>-	if (mm-&gt;context != NO_CONTEXT) {</div><div class='del'>-		cpumask_t cpu_mask;</div><div class='del'>-		cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='del'>-		cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='del'>-		if (!cpumask_empty(&amp;cpu_mask))</div><div class='del'>-			xc3((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_range), (unsigned long) vma, start, end);</div><div class='del'>-		local_flush_tlb_range(vma, start, end);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-</div><div class='del'>-	if(mm-&gt;context != NO_CONTEXT) {</div><div class='del'>-		cpumask_t cpu_mask;</div><div class='del'>-		cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='del'>-		cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='del'>-		if (!cpumask_empty(&amp;cpu_mask))</div><div class='del'>-			xc2((smpfunc_t) BTFIXUP_CALL(local_flush_cache_page), (unsigned long) vma, page);</div><div class='del'>-		local_flush_cache_page(vma, page);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-</div><div class='del'>-	if(mm-&gt;context != NO_CONTEXT) {</div><div class='del'>-		cpumask_t cpu_mask;</div><div class='del'>-		cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='del'>-		cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='del'>-		if (!cpumask_empty(&amp;cpu_mask))</div><div class='del'>-			xc2((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_page), (unsigned long) vma, page);</div><div class='del'>-		local_flush_tlb_page(vma, page);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void smp_flush_page_to_ram(unsigned long page)</div><div class='del'>-{</div><div class='del'>-	/* Current theory is that those who call this are the one's</div><div class='del'>-	 * who have just dirtied their cache with the pages contents</div><div class='del'>-	 * in kernel space, therefore we only run this on local cpu.</div><div class='del'>-	 *</div><div class='del'>-	 * XXX This experiment failed, research further... -DaveM</div><div class='del'>-	 */</div><div class='del'>-#if 1</div><div class='del'>-	xc1((smpfunc_t) BTFIXUP_CALL(local_flush_page_to_ram), page);</div><div class='del'>-#endif</div><div class='del'>-	local_flush_page_to_ram(page);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr)</div><div class='del'>-{</div><div class='del'>-	cpumask_t cpu_mask;</div><div class='del'>-	cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='del'>-	cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='del'>-	if (!cpumask_empty(&amp;cpu_mask))</div><div class='del'>-		xc2((smpfunc_t) BTFIXUP_CALL(local_flush_sig_insns), (unsigned long) mm, insn_addr);</div><div class='del'>-	local_flush_sig_insns(mm, insn_addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-extern unsigned int lvl14_resolution;</div><div class='del'>-</div><div class='del'>-/* /proc/profile writes can call this, don't __init it please. */</div><div class='del'>-static DEFINE_SPINLOCK(prof_setup_lock);</div><div class='del'>-</div><div class='ctx'> int setup_profiling_timer(unsigned int multiplier)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/* Prevent level14 ticker IRQ flooding. */</div><div class='del'>-	if((!multiplier) || (lvl14_resolution / multiplier) &lt; 500)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;prof_setup_lock, flags);</div><div class='del'>-	for_each_possible_cpu(i) {</div><div class='del'>-		load_profile_irq(i, lvl14_resolution / multiplier);</div><div class='del'>-		prof_multiplier(i) = multiplier;</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;prof_setup_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init smp_prepare_cpus(unsigned int max_cpus)</div><div class='hunk'>@@ -345,14 +198,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 	smp_store_cpu_info(boot_cpu_id);</div><div class='ctx'> </div><div class='ctx'> 	switch(sparc_cpu_model) {</div><div class='del'>-	case sun4:</div><div class='del'>-		printk("SUN4\n");</div><div class='del'>-		BUG();</div><div class='del'>-		break;</div><div class='del'>-	case sun4c:</div><div class='del'>-		printk("SUN4C\n");</div><div class='del'>-		BUG();</div><div class='del'>-		break;</div><div class='ctx'> 	case sun4m:</div><div class='ctx'> 		smp4m_boot_cpus();</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -411,29 +256,21 @@ void __init smp_prepare_boot_cpu(void)</div><div class='ctx'> 	set_cpu_possible(cpuid, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='del'>-	extern int __cpuinit smp4m_boot_one_cpu(int);</div><div class='del'>-	extern int __cpuinit smp4d_boot_one_cpu(int);</div><div class='add'>+	extern int __cpuinit smp4m_boot_one_cpu(int, struct task_struct *);</div><div class='add'>+	extern int __cpuinit smp4d_boot_one_cpu(int, struct task_struct *);</div><div class='ctx'> 	int ret=0;</div><div class='ctx'> </div><div class='ctx'> 	switch(sparc_cpu_model) {</div><div class='del'>-	case sun4:</div><div class='del'>-		printk("SUN4\n");</div><div class='del'>-		BUG();</div><div class='del'>-		break;</div><div class='del'>-	case sun4c:</div><div class='del'>-		printk("SUN4C\n");</div><div class='del'>-		BUG();</div><div class='del'>-		break;</div><div class='ctx'> 	case sun4m:</div><div class='del'>-		ret = smp4m_boot_one_cpu(cpu);</div><div class='add'>+		ret = smp4m_boot_one_cpu(cpu, tidle);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case sun4d:</div><div class='del'>-		ret = smp4d_boot_one_cpu(cpu);</div><div class='add'>+		ret = smp4d_boot_one_cpu(cpu, tidle);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case sparc_leon:</div><div class='del'>-		ret = leon_boot_one_cpu(cpu);</div><div class='add'>+		ret = leon_boot_one_cpu(cpu, tidle);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case sun4e:</div><div class='ctx'> 		printk("SUN4E\n");</div><div class='head'>diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c<br/>index 3b1bd7c50164..f591598d92f6 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/smp_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/smp_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/smp_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/smp_64.c</a></div><div class='hunk'>@@ -343,21 +343,17 @@ extern unsigned long sparc64_cpu_startup;</div><div class='ctx'>  */</div><div class='ctx'> static struct thread_info *cpu_new_thread = NULL;</div><div class='ctx'> </div><div class='del'>-static int __cpuinit smp_boot_one_cpu(unsigned int cpu)</div><div class='add'>+static int __cpuinit smp_boot_one_cpu(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long entry =</div><div class='ctx'> 		(unsigned long)(&amp;sparc64_cpu_startup);</div><div class='ctx'> 	unsigned long cookie =</div><div class='ctx'> 		(unsigned long)(&amp;cpu_new_thread);</div><div class='del'>-	struct task_struct *p;</div><div class='ctx'> 	void *descr = NULL;</div><div class='ctx'> 	int timeout, ret;</div><div class='ctx'> </div><div class='del'>-	p = fork_idle(cpu);</div><div class='del'>-	if (IS_ERR(p))</div><div class='del'>-		return PTR_ERR(p);</div><div class='ctx'> 	callin_flag = 0;</div><div class='del'>-	cpu_new_thread = task_thread_info(p);</div><div class='add'>+	cpu_new_thread = task_thread_info(idle);</div><div class='ctx'> </div><div class='ctx'> 	if (tlb_type == hypervisor) {</div><div class='ctx'> #if defined(CONFIG_SUN_LDOMS) &amp;&amp; defined(CONFIG_HOTPLUG_CPU)</div><div class='hunk'>@@ -1227,9 +1223,9 @@ void __devinit smp_fill_in_sib_core_maps(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='del'>-	int ret = smp_boot_one_cpu(cpu);</div><div class='add'>+	int ret = smp_boot_one_cpu(cpu, tidle);</div><div class='ctx'> </div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		cpumask_set_cpu(cpu, &amp;smp_commenced_mask);</div><div class='head'>diff --git a/arch/sparc/kernel/sparc_ksyms_32.c b/arch/sparc/kernel/sparc_ksyms_32.c<br/>index baeab8720237..e521c54560f9 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/sparc_ksyms_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/sparc_ksyms_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/sparc_ksyms_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sparc_ksyms_32.c</a></div><div class='hunk'>@@ -28,19 +28,5 @@ EXPORT_SYMBOL(__ndelay);</div><div class='ctx'> EXPORT_SYMBOL(__ret_efault);</div><div class='ctx'> EXPORT_SYMBOL(empty_zero_page);</div><div class='ctx'> </div><div class='del'>-/* Defined using magic */</div><div class='del'>-#ifndef CONFIG_SMP</div><div class='del'>-EXPORT_SYMBOL(BTFIXUP_CALL(___xchg32));</div><div class='del'>-#else</div><div class='del'>-EXPORT_SYMBOL(BTFIXUP_CALL(__hard_smp_processor_id));</div><div class='del'>-#endif</div><div class='del'>-EXPORT_SYMBOL(BTFIXUP_CALL(mmu_unlockarea));</div><div class='del'>-EXPORT_SYMBOL(BTFIXUP_CALL(mmu_lockarea));</div><div class='del'>-EXPORT_SYMBOL(BTFIXUP_CALL(mmu_get_scsi_sgl));</div><div class='del'>-EXPORT_SYMBOL(BTFIXUP_CALL(mmu_get_scsi_one));</div><div class='del'>-EXPORT_SYMBOL(BTFIXUP_CALL(mmu_release_scsi_sgl));</div><div class='del'>-EXPORT_SYMBOL(BTFIXUP_CALL(mmu_release_scsi_one));</div><div class='del'>-EXPORT_SYMBOL(BTFIXUP_CALL(pgprot_noncached));</div><div class='del'>-</div><div class='ctx'> /* Exporting a symbol from /init/main.c */</div><div class='ctx'> EXPORT_SYMBOL(saved_command_line);</div><div class='head'>diff --git a/arch/sparc/kernel/sun4c_irq.c b/arch/sparc/kernel/sun4c_irq.c<br/>deleted file mode 100644<br/>index f6bf25a2ff80..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/sun4c_irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/sun4c_irq.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,264 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * sun4c irq support</div><div class='del'>- *</div><div class='del'>- *  djhr: Hacked out of irq.c into a CPU dependent version.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)</div><div class='del'>- *  Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)</div><div class='del'>- *  Copyright (C) 1995 Pete A. Zaitcev (zaitcev@yahoo.com)</div><div class='del'>- *  Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/oplib.h&gt;</div><div class='del'>-#include &lt;asm/timer.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include "irq.h"</div><div class='del'>-</div><div class='del'>-/* Sun4c interrupts are typically laid out as follows:</div><div class='del'>- *</div><div class='del'>- *  1 - Software interrupt, SBUS level 1</div><div class='del'>- *  2 - SBUS level 2</div><div class='del'>- *  3 - ESP SCSI, SBUS level 3</div><div class='del'>- *  4 - Software interrupt</div><div class='del'>- *  5 - Lance ethernet, SBUS level 4</div><div class='del'>- *  6 - Software interrupt</div><div class='del'>- *  7 - Graphics card, SBUS level 5</div><div class='del'>- *  8 - SBUS level 6</div><div class='del'>- *  9 - SBUS level 7</div><div class='del'>- * 10 - Counter timer</div><div class='del'>- * 11 - Floppy</div><div class='del'>- * 12 - Zilog uart</div><div class='del'>- * 13 - CS4231 audio</div><div class='del'>- * 14 - Profiling timer</div><div class='del'>- * 15 - NMI</div><div class='del'>- *</div><div class='del'>- * The interrupt enable bits in the interrupt mask register are</div><div class='del'>- * really only used to enable/disable the timer interrupts, and</div><div class='del'>- * for signalling software interrupts.  There is also a master</div><div class='del'>- * interrupt enable bit in this register.</div><div class='del'>- *</div><div class='del'>- * Interrupts are enabled by setting the SUN4C_INT_* bits, they</div><div class='del'>- * are disabled by clearing those bits.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Bit field defines for the interrupt registers on various</div><div class='del'>- * Sparc machines.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* The sun4c interrupt register. */</div><div class='del'>-#define SUN4C_INT_ENABLE  0x01     /* Allow interrupts. */</div><div class='del'>-#define SUN4C_INT_E14     0x80     /* Enable level 14 IRQ. */</div><div class='del'>-#define SUN4C_INT_E10     0x20     /* Enable level 10 IRQ. */</div><div class='del'>-#define SUN4C_INT_E8      0x10     /* Enable level 8 IRQ. */</div><div class='del'>-#define SUN4C_INT_E6      0x08     /* Enable level 6 IRQ. */</div><div class='del'>-#define SUN4C_INT_E4      0x04     /* Enable level 4 IRQ. */</div><div class='del'>-#define SUN4C_INT_E1      0x02     /* Enable level 1 IRQ. */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Pointer to the interrupt enable byte</div><div class='del'>- * Used by entry.S</div><div class='del'>- */</div><div class='del'>-unsigned char __iomem *interrupt_enable;</div><div class='del'>-</div><div class='del'>-static void sun4c_mask_irq(struct irq_data *data)</div><div class='del'>-{</div><div class='del'>-	unsigned long mask = (unsigned long)data-&gt;chip_data;</div><div class='del'>-</div><div class='del'>-	if (mask) {</div><div class='del'>-		unsigned long flags;</div><div class='del'>-</div><div class='del'>-		local_irq_save(flags);</div><div class='del'>-		mask = sbus_readb(interrupt_enable) &amp; ~mask;</div><div class='del'>-		sbus_writeb(mask, interrupt_enable);</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_unmask_irq(struct irq_data *data)</div><div class='del'>-{</div><div class='del'>-	unsigned long mask = (unsigned long)data-&gt;chip_data;</div><div class='del'>-</div><div class='del'>-	if (mask) {</div><div class='del'>-		unsigned long flags;</div><div class='del'>-</div><div class='del'>-		local_irq_save(flags);</div><div class='del'>-		mask = sbus_readb(interrupt_enable) | mask;</div><div class='del'>-		sbus_writeb(mask, interrupt_enable);</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int sun4c_startup_irq(struct irq_data *data)</div><div class='del'>-{</div><div class='del'>-	irq_link(data-&gt;irq);</div><div class='del'>-	sun4c_unmask_irq(data);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_shutdown_irq(struct irq_data *data)</div><div class='del'>-{</div><div class='del'>-	sun4c_mask_irq(data);</div><div class='del'>-	irq_unlink(data-&gt;irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip sun4c_irq = {</div><div class='del'>-	.name		= "sun4c",</div><div class='del'>-	.irq_startup	= sun4c_startup_irq,</div><div class='del'>-	.irq_shutdown	= sun4c_shutdown_irq,</div><div class='del'>-	.irq_mask	= sun4c_mask_irq,</div><div class='del'>-	.irq_unmask	= sun4c_unmask_irq,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned int sun4c_build_device_irq(struct platform_device *op,</div><div class='del'>-					   unsigned int real_irq)</div><div class='del'>-{</div><div class='del'>-	 unsigned int irq;</div><div class='del'>-</div><div class='del'>-	if (real_irq &gt;= 16) {</div><div class='del'>-		prom_printf("Bogus sun4c IRQ %u\n", real_irq);</div><div class='del'>-		prom_halt();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	irq = irq_alloc(real_irq, real_irq);</div><div class='del'>-	if (irq) {</div><div class='del'>-		unsigned long mask = 0UL;</div><div class='del'>-</div><div class='del'>-		switch (real_irq) {</div><div class='del'>-		case 1:</div><div class='del'>-			mask = SUN4C_INT_E1;</div><div class='del'>-			break;</div><div class='del'>-		case 8:</div><div class='del'>-			mask = SUN4C_INT_E8;</div><div class='del'>-			break;</div><div class='del'>-		case 10:</div><div class='del'>-			mask = SUN4C_INT_E10;</div><div class='del'>-			break;</div><div class='del'>-		case 14:</div><div class='del'>-			mask = SUN4C_INT_E14;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			/* All the rest are either always enabled,</div><div class='del'>-			 * or are for signalling software interrupts.</div><div class='del'>-			 */</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		irq_set_chip_and_handler_name(irq, &amp;sun4c_irq,</div><div class='del'>-		                              handle_level_irq, "level");</div><div class='del'>-		irq_set_chip_data(irq, (void *)mask);</div><div class='del'>-	}</div><div class='del'>-	return irq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct sun4c_timer_info {</div><div class='del'>-	u32		l10_count;</div><div class='del'>-	u32		l10_limit;</div><div class='del'>-	u32		l14_count;</div><div class='del'>-	u32		l14_limit;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct sun4c_timer_info __iomem *sun4c_timers;</div><div class='del'>-</div><div class='del'>-static void sun4c_clear_clock_irq(void)</div><div class='del'>-{</div><div class='del'>-	sbus_readl(&amp;sun4c_timers-&gt;l10_limit);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_load_profile_irq(int cpu, unsigned int limit)</div><div class='del'>-{</div><div class='del'>-	/* Errm.. not sure how to do this.. */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init sun4c_init_timers(irq_handler_t counter_fn)</div><div class='del'>-{</div><div class='del'>-	const struct linux_prom_irqs *prom_irqs;</div><div class='del'>-	struct device_node *dp;</div><div class='del'>-	unsigned int irq;</div><div class='del'>-	const u32 *addr;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	dp = of_find_node_by_name(NULL, "counter-timer");</div><div class='del'>-	if (!dp) {</div><div class='del'>-		prom_printf("sun4c_init_timers: Unable to find counter-timer\n");</div><div class='del'>-		prom_halt();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	addr = of_get_property(dp, "address", NULL);</div><div class='del'>-	if (!addr) {</div><div class='del'>-		prom_printf("sun4c_init_timers: No address property\n");</div><div class='del'>-		prom_halt();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sun4c_timers = (void __iomem *) (unsigned long) addr[0];</div><div class='del'>-</div><div class='del'>-	prom_irqs = of_get_property(dp, "intr", NULL);</div><div class='del'>-	of_node_put(dp);</div><div class='del'>-	if (!prom_irqs) {</div><div class='del'>-		prom_printf("sun4c_init_timers: No intr property\n");</div><div class='del'>-		prom_halt();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Have the level 10 timer tick at 100HZ.  We don't touch the</div><div class='del'>-	 * level 14 timer limit since we are letting the prom handle</div><div class='del'>-	 * them until we have a real console driver so L1-A works.</div><div class='del'>-	 */</div><div class='del'>-	sbus_writel((((1000000/HZ) + 1) &lt;&lt; 10), &amp;sun4c_timers-&gt;l10_limit);</div><div class='del'>-</div><div class='del'>-	master_l10_counter = &amp;sun4c_timers-&gt;l10_count;</div><div class='del'>-</div><div class='del'>-	irq = sun4c_build_device_irq(NULL, prom_irqs[0].pri);</div><div class='del'>-	err = request_irq(irq, counter_fn, IRQF_TIMER, "timer", NULL);</div><div class='del'>-	if (err) {</div><div class='del'>-		prom_printf("sun4c_init_timers: request_irq() fails with %d\n", err);</div><div class='del'>-		prom_halt();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* disable timer interrupt */</div><div class='del'>-	sun4c_mask_irq(irq_get_irq_data(irq));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-static void sun4c_nop(void)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-void __init sun4c_init_IRQ(void)</div><div class='del'>-{</div><div class='del'>-	struct device_node *dp;</div><div class='del'>-	const u32 *addr;</div><div class='del'>-</div><div class='del'>-	dp = of_find_node_by_name(NULL, "interrupt-enable");</div><div class='del'>-	if (!dp) {</div><div class='del'>-		prom_printf("sun4c_init_IRQ: Unable to find interrupt-enable\n");</div><div class='del'>-		prom_halt();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	addr = of_get_property(dp, "address", NULL);</div><div class='del'>-	of_node_put(dp);</div><div class='del'>-	if (!addr) {</div><div class='del'>-		prom_printf("sun4c_init_IRQ: No address property\n");</div><div class='del'>-		prom_halt();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	interrupt_enable = (void __iomem *) (unsigned long) addr[0];</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(clear_clock_irq, sun4c_clear_clock_irq, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(load_profile_irq, sun4c_load_profile_irq, BTFIXUPCALL_NOP);</div><div class='del'>-</div><div class='del'>-	sparc_irq_config.init_timers      = sun4c_init_timers;</div><div class='del'>-	sparc_irq_config.build_device_irq = sun4c_build_device_irq;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	BTFIXUPSET_CALL(set_cpu_int, sun4c_nop, BTFIXUPCALL_NOP);</div><div class='del'>-	BTFIXUPSET_CALL(clear_cpu_int, sun4c_nop, BTFIXUPCALL_NOP);</div><div class='del'>-	BTFIXUPSET_CALL(set_irq_udt, sun4c_nop, BTFIXUPCALL_NOP);</div><div class='del'>-#endif</div><div class='del'>-	sbus_writeb(SUN4C_INT_ENABLE, interrupt_enable);</div><div class='del'>-	/* Cannot enable interrupts until OBP ticker is disabled. */</div><div class='del'>-}</div><div class='head'>diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c<br/>index 1d13c5bda0b1..e490ac9327c7 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/sun4d_irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/sun4d_irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/sun4d_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sun4d_irq.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;asm/sbi.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/oplib.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "kernel.h"</div><div class='ctx'> #include "irq.h"</div><div class='hunk'>@@ -243,19 +244,6 @@ struct irq_chip sun4d_irq = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-static void sun4d_set_cpu_int(int cpu, int level)</div><div class='del'>-{</div><div class='del'>-	sun4d_send_ipi(cpu, level);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4d_clear_ipi(int cpu, int level)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4d_set_udt(int cpu)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Setup IRQ distribution scheme. */</div><div class='ctx'> void __init sun4d_distribute_irqs(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -282,7 +270,8 @@ static void sun4d_clear_clock_irq(void)</div><div class='ctx'> </div><div class='ctx'> static void sun4d_load_profile_irq(int cpu, unsigned int limit)</div><div class='ctx'> {</div><div class='del'>-	bw_set_prof_limit(cpu, limit);</div><div class='add'>+	unsigned int value = limit ? timer_value(limit) : 0;</div><div class='add'>+	bw_set_prof_limit(cpu, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init sun4d_load_profile_irqs(void)</div><div class='hunk'>@@ -418,12 +407,12 @@ static void __init sun4d_fixup_trap_table(void)</div><div class='ctx'> 	trap_table-&gt;inst_two = lvl14_save[1];</div><div class='ctx'> 	trap_table-&gt;inst_three = lvl14_save[2];</div><div class='ctx'> 	trap_table-&gt;inst_four = lvl14_save[3];</div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init sun4d_init_timers(irq_handler_t counter_fn)</div><div class='add'>+static void __init sun4d_init_timers(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *dp;</div><div class='ctx'> 	struct resource res;</div><div class='hunk'>@@ -466,12 +455,20 @@ static void __init sun4d_init_timers(irq_handler_t counter_fn)</div><div class='ctx'> 		prom_halt();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sbus_writel((((1000000/HZ) + 1) &lt;&lt; 10), &amp;sun4d_timers-&gt;l10_timer_limit);</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	sparc_config.cs_period = SBUS_CLOCK_RATE * 2;  /* 2 seconds */</div><div class='add'>+#else</div><div class='add'>+	sparc_config.cs_period = SBUS_CLOCK_RATE / HZ; /* 1/HZ sec  */</div><div class='add'>+	sparc_config.features |= FEAT_L10_CLOCKEVENT;</div><div class='add'>+#endif</div><div class='add'>+	sparc_config.features |= FEAT_L10_CLOCKSOURCE;</div><div class='add'>+	sbus_writel(timer_value(sparc_config.cs_period),</div><div class='add'>+		    &amp;sun4d_timers-&gt;l10_timer_limit);</div><div class='ctx'> </div><div class='ctx'> 	master_l10_counter = &amp;sun4d_timers-&gt;l10_cur_count;</div><div class='ctx'> </div><div class='ctx'> 	irq = sun4d_build_timer_irq(board, SUN4D_TIMER_IRQ);</div><div class='del'>-	err = request_irq(irq, counter_fn, IRQF_TIMER, "timer", NULL);</div><div class='add'>+	err = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		prom_printf("sun4d_init_timers: request_irq() failed with %d\n",</div><div class='ctx'> 		             err);</div><div class='hunk'>@@ -509,16 +506,11 @@ void __init sun4d_init_IRQ(void)</div><div class='ctx'> {</div><div class='ctx'> 	local_irq_disable();</div><div class='ctx'> </div><div class='del'>-	BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM);</div><div class='add'>+	sparc_config.init_timers      = sun4d_init_timers;</div><div class='add'>+	sparc_config.build_device_irq = sun4d_build_device_irq;</div><div class='add'>+	sparc_config.clock_rate       = SBUS_CLOCK_RATE;</div><div class='add'>+	sparc_config.clear_clock_irq  = sun4d_clear_clock_irq;</div><div class='add'>+	sparc_config.load_profile_irq = sun4d_load_profile_irq;</div><div class='ctx'> </div><div class='del'>-	sparc_irq_config.init_timers      = sun4d_init_timers;</div><div class='del'>-	sparc_irq_config.build_device_irq = sun4d_build_device_irq;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(clear_cpu_int, sun4d_clear_ipi, BTFIXUPCALL_NOP);</div><div class='del'>-	BTFIXUPSET_CALL(set_irq_udt, sun4d_set_udt, BTFIXUPCALL_NOP);</div><div class='del'>-#endif</div><div class='ctx'> 	/* Cannot enable interrupts until OBP ticker is disabled. */</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sparc/kernel/sun4d_smp.c b/arch/sparc/kernel/sun4d_smp.c<br/>index 540b2fec09f0..ddaea31de586 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/sun4d_smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/sun4d_smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/sun4d_smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sun4d_smp.c</a></div><div class='hunk'>@@ -6,16 +6,20 @@</div><div class='ctx'>  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/clockchips.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/profile.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/switch_to.h&gt;</div><div class='add'>+#include &lt;asm/tlbflush.h&gt;</div><div class='add'>+#include &lt;asm/timer.h&gt;</div><div class='add'>+#include &lt;asm/oplib.h&gt;</div><div class='ctx'> #include &lt;asm/sbi.h&gt;</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='del'>-#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "kernel.h"</div><div class='ctx'> #include "irq.h"</div><div class='hunk'>@@ -34,7 +38,6 @@ static inline unsigned long sun4d_swap(volatile unsigned long *ptr, unsigned lon</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void smp4d_ipi_init(void);</div><div class='del'>-static void smp_setup_percpu_timer(void);</div><div class='ctx'> </div><div class='ctx'> static unsigned char cpu_leds[32];</div><div class='ctx'> </div><div class='hunk'>@@ -49,7 +52,7 @@ static inline void show_leds(int cpuid)</div><div class='ctx'> </div><div class='ctx'> void __cpuinit smp4d_callin(void)</div><div class='ctx'> {</div><div class='del'>-	int cpuid = hard_smp4d_processor_id();</div><div class='add'>+	int cpuid = hard_smp_processor_id();</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	/* Show we are alive */</div><div class='hunk'>@@ -59,8 +62,8 @@ void __cpuinit smp4d_callin(void)</div><div class='ctx'> 	/* Enable level15 interrupt, disable level14 interrupt for now */</div><div class='ctx'> 	cc_set_imsk((cc_get_imsk() &amp; ~0x8000) | 0x4000);</div><div class='ctx'> </div><div class='del'>-	local_flush_cache_all();</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> </div><div class='ctx'> 	notify_cpu_starting(cpuid);</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -70,17 +73,17 @@ void __cpuinit smp4d_callin(void)</div><div class='ctx'> 	 * to call the scheduler code.</div><div class='ctx'> 	 */</div><div class='ctx'> 	/* Get our local ticker going. */</div><div class='del'>-	smp_setup_percpu_timer();</div><div class='add'>+	register_percpu_ce(cpuid);</div><div class='ctx'> </div><div class='ctx'> 	calibrate_delay();</div><div class='ctx'> 	smp_store_cpu_info(cpuid);</div><div class='del'>-	local_flush_cache_all();</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> </div><div class='ctx'> 	/* Allow master to continue. */</div><div class='ctx'> 	sun4d_swap((unsigned long *)&amp;cpu_callin_map[cpuid], 1);</div><div class='del'>-	local_flush_cache_all();</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> </div><div class='ctx'> 	while ((unsigned long)current_set[cpuid] &lt; PAGE_OFFSET)</div><div class='ctx'> 		barrier();</div><div class='hunk'>@@ -100,8 +103,8 @@ void __cpuinit smp4d_callin(void)</div><div class='ctx'> 	atomic_inc(&amp;init_mm.mm_count);</div><div class='ctx'> 	current-&gt;active_mm = &amp;init_mm;</div><div class='ctx'> </div><div class='del'>-	local_flush_cache_all();</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> </div><div class='ctx'> 	local_irq_enable();	/* We don't allow PIL 14 yet */</div><div class='ctx'> </div><div class='hunk'>@@ -123,22 +126,17 @@ void __init smp4d_boot_cpus(void)</div><div class='ctx'> 	smp4d_ipi_init();</div><div class='ctx'> 	if (boot_cpu_id)</div><div class='ctx'> 		current_set[0] = NULL;</div><div class='del'>-	smp_setup_percpu_timer();</div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __cpuinit smp4d_boot_one_cpu(int i)</div><div class='add'>+int __cpuinit smp4d_boot_one_cpu(int i, struct task_struct *idle)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long *entry = &amp;sun4d_cpu_startup;</div><div class='del'>-	struct task_struct *p;</div><div class='ctx'> 	int timeout;</div><div class='ctx'> 	int cpu_node;</div><div class='ctx'> </div><div class='ctx'> 	cpu_find_by_instance(i, &amp;cpu_node, NULL);</div><div class='del'>-	/* Cook up an idler for this guy. */</div><div class='del'>-	p = fork_idle(i);</div><div class='del'>-	current_set[i] = task_thread_info(p);</div><div class='del'>-</div><div class='add'>+	current_set[i] = task_thread_info(idle);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize the contexts table</div><div class='ctx'> 	 * Since the call to prom_startcpu() trashes the structure,</div><div class='hunk'>@@ -150,7 +148,7 @@ int __cpuinit smp4d_boot_one_cpu(int i)</div><div class='ctx'> </div><div class='ctx'> 	/* whirrr, whirrr, whirrrrrrrrr... */</div><div class='ctx'> 	printk(KERN_INFO "Starting CPU %d at %p\n", i, entry);</div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> 	prom_startcpu(cpu_node,</div><div class='ctx'> 		      &amp;smp_penguin_ctable, 0, (char *)entry);</div><div class='ctx'> </div><div class='hunk'>@@ -168,7 +166,7 @@ int __cpuinit smp4d_boot_one_cpu(int i)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -185,7 +183,7 @@ void __init smp4d_smp_done(void)</div><div class='ctx'> 		prev = &amp;cpu_data(i).next;</div><div class='ctx'> 	}</div><div class='ctx'> 	*prev = first;</div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> </div><div class='ctx'> 	/* Ok, they are spinning and ready to go. */</div><div class='ctx'> 	smp_processors_ready = 1;</div><div class='hunk'>@@ -233,7 +231,20 @@ void sun4d_ipi_interrupt(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void smp4d_ipi_single(int cpu)</div><div class='add'>+/* +-------+-------------+-----------+------------------------------------+</div><div class='add'>+ * | bcast |  devid      |   sid     |              levels mask           |</div><div class='add'>+ * +-------+-------------+-----------+------------------------------------+</div><div class='add'>+ *  31      30         23 22       15 14                                 0</div><div class='add'>+ */</div><div class='add'>+#define IGEN_MESSAGE(bcast, devid, sid, levels) \</div><div class='add'>+	(((bcast) &lt;&lt; 31) | ((devid) &lt;&lt; 23) | ((sid) &lt;&lt; 15) | (levels))</div><div class='add'>+</div><div class='add'>+static void sun4d_send_ipi(int cpu, int level)</div><div class='add'>+{</div><div class='add'>+	cc_set_igen(IGEN_MESSAGE(0, cpu &lt;&lt; 3, 6 + ((level &gt;&gt; 1) &amp; 7), 1 &lt;&lt; (level - 1)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sun4d_ipi_single(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct sun4d_ipi_work *work = &amp;per_cpu(sun4d_ipi_work, cpu);</div><div class='ctx'> </div><div class='hunk'>@@ -244,7 +255,7 @@ static void smp4d_ipi_single(int cpu)</div><div class='ctx'> 	sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void smp4d_ipi_mask_one(int cpu)</div><div class='add'>+static void sun4d_ipi_mask_one(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct sun4d_ipi_work *work = &amp;per_cpu(sun4d_ipi_work, cpu);</div><div class='ctx'> </div><div class='hunk'>@@ -255,7 +266,7 @@ static void smp4d_ipi_mask_one(int cpu)</div><div class='ctx'> 	sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void smp4d_ipi_resched(int cpu)</div><div class='add'>+static void sun4d_ipi_resched(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct sun4d_ipi_work *work = &amp;per_cpu(sun4d_ipi_work, cpu);</div><div class='ctx'> </div><div class='hunk'>@@ -280,7 +291,7 @@ static struct smp_funcall {</div><div class='ctx'> static DEFINE_SPINLOCK(cross_call_lock);</div><div class='ctx'> </div><div class='ctx'> /* Cross calls must be serialized, at least currently. */</div><div class='del'>-static void smp4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,</div><div class='add'>+static void sun4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,</div><div class='ctx'> 			     unsigned long arg2, unsigned long arg3,</div><div class='ctx'> 			     unsigned long arg4)</div><div class='ctx'> {</div><div class='hunk'>@@ -352,7 +363,7 @@ static void smp4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,</div><div class='ctx'> /* Running cross calls. */</div><div class='ctx'> void smp4d_cross_call_irq(void)</div><div class='ctx'> {</div><div class='del'>-	int i = hard_smp4d_processor_id();</div><div class='add'>+	int i = hard_smp_processor_id();</div><div class='ctx'> </div><div class='ctx'> 	ccall_info.processors_in[i] = 1;</div><div class='ctx'> 	ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,</div><div class='hunk'>@@ -363,7 +374,8 @@ void smp4d_cross_call_irq(void)</div><div class='ctx'> void smp4d_percpu_timer_interrupt(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct pt_regs *old_regs;</div><div class='del'>-	int cpu = hard_smp4d_processor_id();</div><div class='add'>+	int cpu = hard_smp_processor_id();</div><div class='add'>+	struct clock_event_device *ce;</div><div class='ctx'> 	static int cpu_tick[NR_CPUS];</div><div class='ctx'> 	static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };</div><div class='ctx'> </div><div class='hunk'>@@ -379,45 +391,21 @@ void smp4d_percpu_timer_interrupt(struct pt_regs *regs)</div><div class='ctx'> 		show_leds(cpu);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	profile_tick(CPU_PROFILING);</div><div class='del'>-</div><div class='del'>-	if (!--prof_counter(cpu)) {</div><div class='del'>-		int user = user_mode(regs);</div><div class='add'>+	ce = &amp;per_cpu(sparc32_clockevent, cpu);</div><div class='ctx'> </div><div class='del'>-		irq_enter();</div><div class='del'>-		update_process_times(user);</div><div class='del'>-		irq_exit();</div><div class='add'>+	irq_enter();</div><div class='add'>+	ce-&gt;event_handler(ce);</div><div class='add'>+	irq_exit();</div><div class='ctx'> </div><div class='del'>-		prof_counter(cpu) = prof_multiplier(cpu);</div><div class='del'>-	}</div><div class='ctx'> 	set_irq_regs(old_regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __cpuinit smp_setup_percpu_timer(void)</div><div class='del'>-{</div><div class='del'>-	int cpu = hard_smp4d_processor_id();</div><div class='del'>-</div><div class='del'>-	prof_counter(cpu) = prof_multiplier(cpu) = 1;</div><div class='del'>-	load_profile_irq(cpu, lvl14_resolution);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init smp4d_blackbox_id(unsigned *addr)</div><div class='del'>-{</div><div class='del'>-	int rd = *addr &amp; 0x3e000000;</div><div class='del'>-</div><div class='del'>-	addr[0] = 0xc0800800 | rd;		/* lda [%g0] ASI_M_VIKING_TMP1, reg */</div><div class='del'>-	addr[1] = 0x01000000;			/* nop */</div><div class='del'>-	addr[2] = 0x01000000;			/* nop */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init smp4d_blackbox_current(unsigned *addr)</div><div class='del'>-{</div><div class='del'>-	int rd = *addr &amp; 0x3e000000;</div><div class='del'>-</div><div class='del'>-	addr[0] = 0xc0800800 | rd;		/* lda [%g0] ASI_M_VIKING_TMP1, reg */</div><div class='del'>-	addr[2] = 0x81282002 | rd | (rd &gt;&gt; 11);	/* sll reg, 2, reg */</div><div class='del'>-	addr[4] = 0x01000000;			/* nop */</div><div class='del'>-}</div><div class='add'>+static const struct sparc32_ipi_ops sun4d_ipi_ops = {</div><div class='add'>+	.cross_call = sun4d_cross_call,</div><div class='add'>+	.resched    = sun4d_ipi_resched,</div><div class='add'>+	.single     = sun4d_ipi_single,</div><div class='add'>+	.mask_one   = sun4d_ipi_mask_one,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> void __init sun4d_init_smp(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -426,14 +414,7 @@ void __init sun4d_init_smp(void)</div><div class='ctx'> 	/* Patch ipi15 trap table */</div><div class='ctx'> 	t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);</div><div class='ctx'> </div><div class='del'>-	/* And set btfixup... */</div><div class='del'>-	BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);</div><div class='del'>-	BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);</div><div class='del'>-	BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(smp_ipi_resched, smp4d_ipi_resched, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(smp_ipi_single, smp4d_ipi_single, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(smp_ipi_mask_one, smp4d_ipi_mask_one, BTFIXUPCALL_NORM);</div><div class='add'>+	sparc32_ipi_ops = &amp;sun4d_ipi_ops;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; NR_CPUS; i++) {</div><div class='ctx'> 		ccall_info.processors_in[i] = 1;</div><div class='head'>diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c<br/>index e61165161dd3..c5ade9d27a1d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/sun4m_irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/sun4m_irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/sun4m_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sun4m_irq.c</a></div><div class='hunk'>@@ -112,9 +112,6 @@ struct sun4m_handler_data {</div><div class='ctx'> #define SUN4M_INT_E14		0x00000080</div><div class='ctx'> #define SUN4M_INT_E10		0x00080000</div><div class='ctx'> </div><div class='del'>-#define SUN4M_HARD_INT(x)	(0x000000001 &lt;&lt; (x))</div><div class='del'>-#define SUN4M_SOFT_INT(x)	(0x000010000 &lt;&lt; (x))</div><div class='del'>-</div><div class='ctx'> #define	SUN4M_INT_MASKALL	0x80000000	  /* mask all interrupts */</div><div class='ctx'> #define	SUN4M_INT_MODULE_ERR	0x40000000	  /* module error */</div><div class='ctx'> #define	SUN4M_INT_M2S_WRITE_ERR	0x20000000	  /* write buffer error */</div><div class='hunk'>@@ -282,23 +279,6 @@ out:</div><div class='ctx'> 	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-static void sun4m_send_ipi(int cpu, int level)</div><div class='del'>-{</div><div class='del'>-	sbus_writel(SUN4M_SOFT_INT(level), &amp;sun4m_irq_percpu[cpu]-&gt;set);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4m_clear_ipi(int cpu, int level)</div><div class='del'>-{</div><div class='del'>-	sbus_writel(SUN4M_SOFT_INT(level), &amp;sun4m_irq_percpu[cpu]-&gt;clear);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4m_set_udt(int cpu)</div><div class='del'>-{</div><div class='del'>-	sbus_writel(cpu, &amp;sun4m_irq_global-&gt;interrupt_target);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> struct sun4m_timer_percpu {</div><div class='ctx'> 	u32		l14_limit;</div><div class='ctx'> 	u32		l14_count;</div><div class='hunk'>@@ -318,9 +298,6 @@ struct sun4m_timer_global {</div><div class='ctx'> </div><div class='ctx'> static struct sun4m_timer_global __iomem *timers_global;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-unsigned int lvl14_resolution = (((1000000/HZ) + 1) &lt;&lt; 10);</div><div class='del'>-</div><div class='ctx'> static void sun4m_clear_clock_irq(void)</div><div class='ctx'> {</div><div class='ctx'> 	sbus_readl(&amp;timers_global-&gt;l10_limit);</div><div class='hunk'>@@ -369,10 +346,11 @@ void sun4m_clear_profile_irq(int cpu)</div><div class='ctx'> </div><div class='ctx'> static void sun4m_load_profile_irq(int cpu, unsigned int limit)</div><div class='ctx'> {</div><div class='del'>-	sbus_writel(limit, &amp;timers_percpu[cpu]-&gt;l14_limit);</div><div class='add'>+	unsigned int value = limit ? timer_value(limit) : 0;</div><div class='add'>+	sbus_writel(value, &amp;timers_percpu[cpu]-&gt;l14_limit);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init sun4m_init_timers(irq_handler_t counter_fn)</div><div class='add'>+static void __init sun4m_init_timers(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *dp = of_find_node_by_name(NULL, "counter");</div><div class='ctx'> 	int i, err, len, num_cpu_timers;</div><div class='hunk'>@@ -402,13 +380,22 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn)</div><div class='ctx'> 	/* Every per-cpu timer works in timer mode */</div><div class='ctx'> 	sbus_writel(0x00000000, &amp;timers_global-&gt;timer_config);</div><div class='ctx'> </div><div class='del'>-	sbus_writel((((1000000/HZ) + 1) &lt;&lt; 10), &amp;timers_global-&gt;l10_limit);</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	sparc_config.cs_period = SBUS_CLOCK_RATE * 2;  /* 2 seconds */</div><div class='add'>+	sparc_config.features |= FEAT_L14_ONESHOT;</div><div class='add'>+#else</div><div class='add'>+	sparc_config.cs_period = SBUS_CLOCK_RATE / HZ; /* 1/HZ sec  */</div><div class='add'>+	sparc_config.features |= FEAT_L10_CLOCKEVENT;</div><div class='add'>+#endif</div><div class='add'>+	sparc_config.features |= FEAT_L10_CLOCKSOURCE;</div><div class='add'>+	sbus_writel(timer_value(sparc_config.cs_period),</div><div class='add'>+	            &amp;timers_global-&gt;l10_limit);</div><div class='ctx'> </div><div class='ctx'> 	master_l10_counter = &amp;timers_global-&gt;l10_count;</div><div class='ctx'> </div><div class='ctx'> 	irq = sun4m_build_device_irq(NULL, SUN4M_TIMER_IRQ);</div><div class='ctx'> </div><div class='del'>-	err = request_irq(irq, counter_fn, IRQF_TIMER, "timer", NULL);</div><div class='add'>+	err = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		printk(KERN_ERR "sun4m_init_timers: Register IRQ error %d.\n",</div><div class='ctx'> 			err);</div><div class='hunk'>@@ -434,7 +421,7 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn)</div><div class='ctx'> 		trap_table-&gt;inst_two = lvl14_save[1];</div><div class='ctx'> 		trap_table-&gt;inst_three = lvl14_save[2];</div><div class='ctx'> 		trap_table-&gt;inst_four = lvl14_save[3];</div><div class='del'>-		local_flush_cache_all();</div><div class='add'>+		local_ops-&gt;cache_all();</div><div class='ctx'> 		local_irq_restore(flags);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='hunk'>@@ -475,17 +462,12 @@ void __init sun4m_init_IRQ(void)</div><div class='ctx'> 	if (num_cpu_iregs == 4)</div><div class='ctx'> 		sbus_writel(0, &amp;sun4m_irq_global-&gt;interrupt_target);</div><div class='ctx'> </div><div class='del'>-	BTFIXUPSET_CALL(clear_clock_irq, sun4m_clear_clock_irq, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(load_profile_irq, sun4m_load_profile_irq, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	sparc_irq_config.init_timers = sun4m_init_timers;</div><div class='del'>-	sparc_irq_config.build_device_irq = sun4m_build_device_irq;</div><div class='add'>+	sparc_config.init_timers      = sun4m_init_timers;</div><div class='add'>+	sparc_config.build_device_irq = sun4m_build_device_irq;</div><div class='add'>+	sparc_config.clock_rate       = SBUS_CLOCK_RATE;</div><div class='add'>+	sparc_config.clear_clock_irq  = sun4m_clear_clock_irq;</div><div class='add'>+	sparc_config.load_profile_irq = sun4m_load_profile_irq;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	BTFIXUPSET_CALL(set_cpu_int, sun4m_send_ipi, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(clear_cpu_int, sun4m_clear_ipi, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(set_irq_udt, sun4m_set_udt, BTFIXUPCALL_NORM);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	/* Cannot enable interrupts until OBP ticker is disabled. */</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c<br/>index 02db9a0412ce..128af7304288 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/sun4m_smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/sun4m_smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/sun4m_smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sun4m_smp.c</a></div><div class='hunk'>@@ -4,14 +4,18 @@</div><div class='ctx'>  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/clockchips.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/profile.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='add'>+#include &lt;asm/timer.h&gt;</div><div class='add'>+#include &lt;asm/oplib.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "irq.h"</div><div class='ctx'> #include "kernel.h"</div><div class='hunk'>@@ -30,26 +34,22 @@ swap_ulong(volatile unsigned long *ptr, unsigned long val)</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void smp4m_ipi_init(void);</div><div class='del'>-static void smp_setup_percpu_timer(void);</div><div class='del'>-</div><div class='ctx'> void __cpuinit smp4m_callin(void)</div><div class='ctx'> {</div><div class='ctx'> 	int cpuid = hard_smp_processor_id();</div><div class='ctx'> </div><div class='del'>-	local_flush_cache_all();</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> </div><div class='ctx'> 	notify_cpu_starting(cpuid);</div><div class='ctx'> </div><div class='del'>-	/* Get our local ticker going. */</div><div class='del'>-	smp_setup_percpu_timer();</div><div class='add'>+	register_percpu_ce(cpuid);</div><div class='ctx'> </div><div class='ctx'> 	calibrate_delay();</div><div class='ctx'> 	smp_store_cpu_info(cpuid);</div><div class='ctx'> </div><div class='del'>-	local_flush_cache_all();</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Unblock the master CPU _only_ when the scheduler state</div><div class='hunk'>@@ -61,8 +61,8 @@ void __cpuinit smp4m_callin(void)</div><div class='ctx'> 	swap_ulong(&amp;cpu_callin_map[cpuid], 1);</div><div class='ctx'> </div><div class='ctx'> 	/* XXX: What's up with all the flushes? */</div><div class='del'>-	local_flush_cache_all();</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> </div><div class='ctx'> 	/* Fix idle thread fields. */</div><div class='ctx'> 	__asm__ __volatile__("ld [%0], %%g6\n\t"</div><div class='hunk'>@@ -86,23 +86,19 @@ void __cpuinit smp4m_callin(void)</div><div class='ctx'>  */</div><div class='ctx'> void __init smp4m_boot_cpus(void)</div><div class='ctx'> {</div><div class='del'>-	smp4m_ipi_init();</div><div class='del'>-	smp_setup_percpu_timer();</div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	sun4m_unmask_profile_irq();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __cpuinit smp4m_boot_one_cpu(int i)</div><div class='add'>+int __cpuinit smp4m_boot_one_cpu(int i, struct task_struct *idle)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long *entry = &amp;sun4m_cpu_startup;</div><div class='del'>-	struct task_struct *p;</div><div class='ctx'> 	int timeout;</div><div class='ctx'> 	int cpu_node;</div><div class='ctx'> </div><div class='ctx'> 	cpu_find_by_mid(i, &amp;cpu_node);</div><div class='add'>+	current_set[i] = task_thread_info(idle);</div><div class='ctx'> </div><div class='del'>-	/* Cook up an idler for this guy. */</div><div class='del'>-	p = fork_idle(i);</div><div class='del'>-	current_set[i] = task_thread_info(p);</div><div class='ctx'> 	/* See trampoline.S for details... */</div><div class='ctx'> 	entry += ((i - 1) * 3);</div><div class='ctx'> </div><div class='hunk'>@@ -117,7 +113,7 @@ int __cpuinit smp4m_boot_one_cpu(int i)</div><div class='ctx'> </div><div class='ctx'> 	/* whirrr, whirrr, whirrrrrrrrr... */</div><div class='ctx'> 	printk(KERN_INFO "Starting CPU %d at %p\n", i, entry);</div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> 	prom_startcpu(cpu_node, &amp;smp_penguin_ctable, 0, (char *)entry);</div><div class='ctx'> </div><div class='ctx'> 	/* wheee... it's going... */</div><div class='hunk'>@@ -132,7 +128,7 @@ int __cpuinit smp4m_boot_one_cpu(int i)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -149,30 +145,29 @@ void __init smp4m_smp_done(void)</div><div class='ctx'> 		prev = &amp;cpu_data(i).next;</div><div class='ctx'> 	}</div><div class='ctx'> 	*prev = first;</div><div class='del'>-	local_flush_cache_all();</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> </div><div class='ctx'> 	/* Ok, they are spinning and ready to go. */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* Initialize IPIs on the SUN4M SMP machine */</div><div class='del'>-static void __init smp4m_ipi_init(void)</div><div class='add'>+static void sun4m_send_ipi(int cpu, int level)</div><div class='ctx'> {</div><div class='add'>+	sbus_writel(SUN4M_SOFT_INT(level), &amp;sun4m_irq_percpu[cpu]-&gt;set);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void smp4m_ipi_resched(int cpu)</div><div class='add'>+static void sun4m_ipi_resched(int cpu)</div><div class='ctx'> {</div><div class='del'>-	set_cpu_int(cpu, IRQ_IPI_RESCHED);</div><div class='add'>+	sun4m_send_ipi(cpu, IRQ_IPI_RESCHED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void smp4m_ipi_single(int cpu)</div><div class='add'>+static void sun4m_ipi_single(int cpu)</div><div class='ctx'> {</div><div class='del'>-	set_cpu_int(cpu, IRQ_IPI_SINGLE);</div><div class='add'>+	sun4m_send_ipi(cpu, IRQ_IPI_SINGLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void smp4m_ipi_mask_one(int cpu)</div><div class='add'>+static void sun4m_ipi_mask_one(int cpu)</div><div class='ctx'> {</div><div class='del'>-	set_cpu_int(cpu, IRQ_IPI_MASK);</div><div class='add'>+	sun4m_send_ipi(cpu, IRQ_IPI_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct smp_funcall {</div><div class='hunk'>@@ -189,7 +184,7 @@ static struct smp_funcall {</div><div class='ctx'> static DEFINE_SPINLOCK(cross_call_lock);</div><div class='ctx'> </div><div class='ctx'> /* Cross calls must be serialized, at least currently. */</div><div class='del'>-static void smp4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,</div><div class='add'>+static void sun4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,</div><div class='ctx'> 			     unsigned long arg2, unsigned long arg3,</div><div class='ctx'> 			     unsigned long arg4)</div><div class='ctx'> {</div><div class='hunk'>@@ -216,7 +211,7 @@ static void smp4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,</div><div class='ctx'> 				if (cpumask_test_cpu(i, &amp;mask)) {</div><div class='ctx'> 					ccall_info.processors_in[i] = 0;</div><div class='ctx'> 					ccall_info.processors_out[i] = 0;</div><div class='del'>-					set_cpu_int(i, IRQ_CROSS_CALL);</div><div class='add'>+					sun4m_send_ipi(i, IRQ_CROSS_CALL);</div><div class='ctx'> 				} else {</div><div class='ctx'> 					ccall_info.processors_in[i] = 1;</div><div class='ctx'> 					ccall_info.processors_out[i] = 1;</div><div class='hunk'>@@ -260,64 +255,33 @@ void smp4m_cross_call_irq(void)</div><div class='ctx'> void smp4m_percpu_timer_interrupt(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct pt_regs *old_regs;</div><div class='add'>+	struct clock_event_device *ce;</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> </div><div class='ctx'> 	old_regs = set_irq_regs(regs);</div><div class='ctx'> </div><div class='del'>-	sun4m_clear_profile_irq(cpu);</div><div class='del'>-</div><div class='del'>-	profile_tick(CPU_PROFILING);</div><div class='add'>+	ce = &amp;per_cpu(sparc32_clockevent, cpu);</div><div class='ctx'> </div><div class='del'>-	if (!--prof_counter(cpu)) {</div><div class='del'>-		int user = user_mode(regs);</div><div class='add'>+	if (ce-&gt;mode &amp; CLOCK_EVT_MODE_PERIODIC)</div><div class='add'>+		sun4m_clear_profile_irq(cpu);</div><div class='add'>+	else</div><div class='add'>+		sparc_config.load_profile_irq(cpu, 0); /* Is this needless? */</div><div class='ctx'> </div><div class='del'>-		irq_enter();</div><div class='del'>-		update_process_times(user);</div><div class='del'>-		irq_exit();</div><div class='add'>+	irq_enter();</div><div class='add'>+	ce-&gt;event_handler(ce);</div><div class='add'>+	irq_exit();</div><div class='ctx'> </div><div class='del'>-		prof_counter(cpu) = prof_multiplier(cpu);</div><div class='del'>-	}</div><div class='ctx'> 	set_irq_regs(old_regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __cpuinit smp_setup_percpu_timer(void)</div><div class='del'>-{</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='del'>-</div><div class='del'>-	prof_counter(cpu) = prof_multiplier(cpu) = 1;</div><div class='del'>-	load_profile_irq(cpu, lvl14_resolution);</div><div class='del'>-</div><div class='del'>-	if (cpu == boot_cpu_id)</div><div class='del'>-		sun4m_unmask_profile_irq();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init smp4m_blackbox_id(unsigned *addr)</div><div class='del'>-{</div><div class='del'>-	int rd = *addr &amp; 0x3e000000;</div><div class='del'>-	int rs1 = rd &gt;&gt; 11;</div><div class='del'>-</div><div class='del'>-	addr[0] = 0x81580000 | rd;		/* rd %tbr, reg */</div><div class='del'>-	addr[1] = 0x8130200c | rd | rs1;	/* srl reg, 0xc, reg */</div><div class='del'>-	addr[2] = 0x80082003 | rd | rs1;	/* and reg, 3, reg */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init smp4m_blackbox_current(unsigned *addr)</div><div class='del'>-{</div><div class='del'>-	int rd = *addr &amp; 0x3e000000;</div><div class='del'>-	int rs1 = rd &gt;&gt; 11;</div><div class='del'>-</div><div class='del'>-	addr[0] = 0x81580000 | rd;		/* rd %tbr, reg */</div><div class='del'>-	addr[2] = 0x8130200a | rd | rs1;	/* srl reg, 0xa, reg */</div><div class='del'>-	addr[4] = 0x8008200c | rd | rs1;	/* and reg, 0xc, reg */</div><div class='del'>-}</div><div class='add'>+static const struct sparc32_ipi_ops sun4m_ipi_ops = {</div><div class='add'>+	.cross_call = sun4m_cross_call,</div><div class='add'>+	.resched    = sun4m_ipi_resched,</div><div class='add'>+	.single     = sun4m_ipi_single,</div><div class='add'>+	.mask_one   = sun4m_ipi_mask_one,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> void __init sun4m_init_smp(void)</div><div class='ctx'> {</div><div class='del'>-	BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);</div><div class='del'>-	BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);</div><div class='del'>-	BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(smp_ipi_resched, smp4m_ipi_resched, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(smp_ipi_single, smp4m_ipi_single, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(smp_ipi_mask_one, smp4m_ipi_mask_one, BTFIXUPCALL_NORM);</div><div class='add'>+	sparc32_ipi_ops = &amp;sun4m_ipi_ops;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sparc/kernel/sys_sparc32.c b/arch/sparc/kernel/sys_sparc32.c<br/>index 29c478ffed91..f7392336961f 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/sys_sparc32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/sys_sparc32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/sys_sparc32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sys_sparc32.c</a></div><div class='hunk'>@@ -139,8 +139,8 @@ static int cp_compat_stat64(struct kstat *stat,</div><div class='ctx'> 	err |= put_user(stat-&gt;ino, &amp;statbuf-&gt;st_ino);</div><div class='ctx'> 	err |= put_user(stat-&gt;mode, &amp;statbuf-&gt;st_mode);</div><div class='ctx'> 	err |= put_user(stat-&gt;nlink, &amp;statbuf-&gt;st_nlink);</div><div class='del'>-	err |= put_user(stat-&gt;uid, &amp;statbuf-&gt;st_uid);</div><div class='del'>-	err |= put_user(stat-&gt;gid, &amp;statbuf-&gt;st_gid);</div><div class='add'>+	err |= put_user(from_kuid_munged(current_user_ns(), stat-&gt;uid), &amp;statbuf-&gt;st_uid);</div><div class='add'>+	err |= put_user(from_kgid_munged(current_user_ns(), stat-&gt;gid), &amp;statbuf-&gt;st_gid);</div><div class='ctx'> 	err |= put_user(huge_encode_dev(stat-&gt;rdev), &amp;statbuf-&gt;st_rdev);</div><div class='ctx'> 	err |= put_user(0, (unsigned long __user *) &amp;statbuf-&gt;__pad3[0]);</div><div class='ctx'> 	err |= put_user(stat-&gt;size, &amp;statbuf-&gt;st_size);</div><div class='head'>diff --git a/arch/sparc/kernel/sys_sparc_32.c b/arch/sparc/kernel/sys_sparc_32.c<br/>index 42b282fa6112..0c9b31b22e07 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/sys_sparc_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/sys_sparc_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/sys_sparc_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sys_sparc_32.c</a></div><div class='hunk'>@@ -53,8 +53,6 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsi</div><div class='ctx'> 	/* See asm-sparc/uaccess.h */</div><div class='ctx'> 	if (len &gt; TASK_SIZE - PAGE_SIZE)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	if (ARCH_SUN4C &amp;&amp; len &gt; 0x20000000)</div><div class='del'>-		return -ENOMEM;</div><div class='ctx'> 	if (!addr)</div><div class='ctx'> 		addr = TASK_UNMAPPED_BASE;</div><div class='ctx'> </div><div class='hunk'>@@ -65,10 +63,6 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsi</div><div class='ctx'> </div><div class='ctx'> 	for (vmm = find_vma(current-&gt;mm, addr); ; vmm = vmm-&gt;vm_next) {</div><div class='ctx'> 		/* At this point:  (!vmm || addr &lt; vmm-&gt;vm_end). */</div><div class='del'>-		if (ARCH_SUN4C &amp;&amp; addr &lt; 0xe0000000 &amp;&amp; 0x20000000 - len &lt; addr) {</div><div class='del'>-			addr = PAGE_OFFSET;</div><div class='del'>-			vmm = find_vma(current-&gt;mm, PAGE_OFFSET);</div><div class='del'>-		}</div><div class='ctx'> 		if (TASK_SIZE - PAGE_SIZE - len &lt; addr)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		if (!vmm || addr + len &lt;= vmm-&gt;vm_start)</div><div class='hunk'>@@ -99,11 +93,6 @@ out:</div><div class='ctx'> </div><div class='ctx'> int sparc_mmap_check(unsigned long addr, unsigned long len)</div><div class='ctx'> {</div><div class='del'>-	if (ARCH_SUN4C &amp;&amp;</div><div class='del'>-	    (len &gt; 0x20000000 ||</div><div class='del'>-	     (addr &lt; 0xe0000000 &amp;&amp; addr + len &gt; 0x20000000)))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	/* See asm-sparc/uaccess.h */</div><div class='ctx'> 	if (len &gt; TASK_SIZE - PAGE_SIZE || addr + len &gt; TASK_SIZE - PAGE_SIZE)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -195,10 +184,10 @@ sparc_sigaction (int sig, const struct old_sigaction __user *act,</div><div class='ctx'> </div><div class='ctx'> 		if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='ctx'> 		    __get_user(new_ka.sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer))</div><div class='add'>+		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='add'>+		    __get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='add'>+		    __get_user(mask, &amp;act-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags);</div><div class='del'>-		__get_user(mask, &amp;act-&gt;sa_mask);</div><div class='ctx'> 		siginitset(&amp;new_ka.sa.sa_mask, mask);</div><div class='ctx'> 		new_ka.ka_restorer = NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -206,17 +195,12 @@ sparc_sigaction (int sig, const struct old_sigaction __user *act,</div><div class='ctx'> 	ret = do_sigaction(sig, act ? &amp;new_ka : NULL, oact ? &amp;old_ka : NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (!ret &amp;&amp; oact) {</div><div class='del'>-		/* In the clone() case we could copy half consistent</div><div class='del'>-		 * state to the user, however this could sleep and</div><div class='del'>-		 * deadlock us if we held the signal lock on SMP.  So for</div><div class='del'>-		 * now I take the easy way out and do no locking.</div><div class='del'>-		 */</div><div class='ctx'> 		if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||</div><div class='ctx'> 		    __put_user(old_ka.sa.sa_handler, &amp;oact-&gt;sa_handler) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer))</div><div class='add'>+		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags);</div><div class='del'>-		__put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c<br/>index 3ee51f189a55..275f74fd6f6a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/sys_sparc_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/sys_sparc_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/sys_sparc_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/sys_sparc_64.c</a></div><div class='hunk'>@@ -580,16 +580,9 @@ SYSCALL_DEFINE5(64_mremap, unsigned long, addr,	unsigned long, old_len,</div><div class='ctx'> 		unsigned long, new_len, unsigned long, flags,</div><div class='ctx'> 		unsigned long, new_addr)</div><div class='ctx'> {</div><div class='del'>-	unsigned long ret = -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	if (test_thread_flag(TIF_32BIT))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	down_write(&amp;current-&gt;mm-&gt;mmap_sem);</div><div class='del'>-	ret = do_mremap(addr, old_len, new_len, flags, new_addr);</div><div class='del'>-	up_write(&amp;current-&gt;mm-&gt;mmap_sem);</div><div class='del'>-out:</div><div class='del'>-	return ret;       </div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return sys_mremap(addr, old_len, new_len, flags, new_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* we come to here via sys_nis_syscall so it can setup the regs argument */</div><div class='head'>diff --git a/arch/sparc/kernel/time_32.c b/arch/sparc/kernel/time_32.c<br/>index 7d0c088e8aba..953641549e82 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/time_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/time_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/time_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/time_32.c</a></div><div class='hunk'>@@ -26,6 +26,8 @@</div><div class='ctx'> #include &lt;linux/rtc.h&gt;</div><div class='ctx'> #include &lt;linux/rtc/m48t59.h&gt;</div><div class='ctx'> #include &lt;linux/timex.h&gt;</div><div class='add'>+#include &lt;linux/clocksource.h&gt;</div><div class='add'>+#include &lt;linux/clockchips.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='hunk'>@@ -40,13 +42,24 @@</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/idprom.h&gt;</div><div class='del'>-#include &lt;asm/machines.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pcic.h&gt;</div><div class='ctx'> #include &lt;asm/irq_regs.h&gt;</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "irq.h"</div><div class='ctx'> </div><div class='add'>+static __cacheline_aligned_in_smp DEFINE_SEQLOCK(timer_cs_lock);</div><div class='add'>+static __volatile__ u64 timer_cs_internal_counter = 0;</div><div class='add'>+static char timer_cs_enabled = 0;</div><div class='add'>+</div><div class='add'>+static struct clock_event_device timer_ce;</div><div class='add'>+static char timer_ce_enabled = 0;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+DEFINE_PER_CPU(struct clock_event_device, sparc32_clockevent);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> DEFINE_SPINLOCK(rtc_lock);</div><div class='ctx'> EXPORT_SYMBOL(rtc_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -55,7 +68,6 @@ static int set_rtc_mmss(unsigned long);</div><div class='ctx'> unsigned long profile_pc(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	extern char __copy_user_begin[], __copy_user_end[];</div><div class='del'>-	extern char __atomic_begin[], __atomic_end[];</div><div class='ctx'> 	extern char __bzero_begin[], __bzero_end[];</div><div class='ctx'> </div><div class='ctx'> 	unsigned long pc = regs-&gt;pc;</div><div class='hunk'>@@ -63,8 +75,6 @@ unsigned long profile_pc(struct pt_regs *regs)</div><div class='ctx'> 	if (in_lock_functions(pc) ||</div><div class='ctx'> 	    (pc &gt;= (unsigned long) __copy_user_begin &amp;&amp;</div><div class='ctx'> 	     pc &lt; (unsigned long) __copy_user_end) ||</div><div class='del'>-	    (pc &gt;= (unsigned long) __atomic_begin &amp;&amp;</div><div class='del'>-	     pc &lt; (unsigned long) __atomic_end) ||</div><div class='ctx'> 	    (pc &gt;= (unsigned long) __bzero_begin &amp;&amp;</div><div class='ctx'> 	     pc &lt; (unsigned long) __bzero_end))</div><div class='ctx'> 		pc = regs-&gt;u_regs[UREG_RETPC];</div><div class='hunk'>@@ -75,36 +85,168 @@ EXPORT_SYMBOL(profile_pc);</div><div class='ctx'> </div><div class='ctx'> __volatile__ unsigned int *master_l10_counter;</div><div class='ctx'> </div><div class='del'>-u32 (*do_arch_gettimeoffset)(void);</div><div class='del'>-</div><div class='ctx'> int update_persistent_clock(struct timespec now)</div><div class='ctx'> {</div><div class='ctx'> 	return set_rtc_mmss(now.tv_sec);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * timer_interrupt() needs to keep up the real-time clock,</div><div class='del'>- * as well as call the "xtime_update()" routine every clocktick</div><div class='del'>- */</div><div class='add'>+irqreturn_t notrace timer_interrupt(int dummy, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	if (timer_cs_enabled) {</div><div class='add'>+		write_seqlock(&amp;timer_cs_lock);</div><div class='add'>+		timer_cs_internal_counter++;</div><div class='add'>+		sparc_config.clear_clock_irq();</div><div class='add'>+		write_sequnlock(&amp;timer_cs_lock);</div><div class='add'>+	} else {</div><div class='add'>+		sparc_config.clear_clock_irq();</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-#define TICK_SIZE (tick_nsec / 1000)</div><div class='add'>+	if (timer_ce_enabled)</div><div class='add'>+		timer_ce.event_handler(&amp;timer_ce);</div><div class='ctx'> </div><div class='del'>-static irqreturn_t timer_interrupt(int dummy, void *dev_id)</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void timer_ce_set_mode(enum clock_event_mode mode,</div><div class='add'>+			      struct clock_event_device *evt)</div><div class='ctx'> {</div><div class='del'>-#ifndef CONFIG_SMP</div><div class='del'>-	profile_tick(CPU_PROFILING);</div><div class='del'>-#endif</div><div class='add'>+	switch (mode) {</div><div class='add'>+		case CLOCK_EVT_MODE_PERIODIC:</div><div class='add'>+		case CLOCK_EVT_MODE_RESUME:</div><div class='add'>+			timer_ce_enabled = 1;</div><div class='add'>+			break;</div><div class='add'>+		case CLOCK_EVT_MODE_SHUTDOWN:</div><div class='add'>+			timer_ce_enabled = 0;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	smp_mb();</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	clear_clock_irq();</div><div class='add'>+static __init void setup_timer_ce(void)</div><div class='add'>+{</div><div class='add'>+	struct clock_event_device *ce = &amp;timer_ce;</div><div class='add'>+</div><div class='add'>+	BUG_ON(smp_processor_id() != boot_cpu_id);</div><div class='add'>+</div><div class='add'>+	ce-&gt;name     = "timer_ce";</div><div class='add'>+	ce-&gt;rating   = 100;</div><div class='add'>+	ce-&gt;features = CLOCK_EVT_FEAT_PERIODIC;</div><div class='add'>+	ce-&gt;set_mode = timer_ce_set_mode;</div><div class='add'>+	ce-&gt;cpumask  = cpu_possible_mask;</div><div class='add'>+	ce-&gt;shift    = 32;</div><div class='add'>+	ce-&gt;mult     = div_sc(sparc_config.clock_rate, NSEC_PER_SEC,</div><div class='add'>+	                      ce-&gt;shift);</div><div class='add'>+	clockevents_register_device(ce);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	xtime_update(1);</div><div class='add'>+static unsigned int sbus_cycles_offset(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int val, offset;</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_SMP</div><div class='del'>-	update_process_times(user_mode(get_irq_regs()));</div><div class='del'>-#endif</div><div class='del'>-	return IRQ_HANDLED;</div><div class='add'>+	val = *master_l10_counter;</div><div class='add'>+	offset = (val &gt;&gt; TIMER_VALUE_SHIFT) &amp; TIMER_VALUE_MASK;</div><div class='add'>+</div><div class='add'>+	/* Limit hit? */</div><div class='add'>+	if (val &amp; TIMER_LIMIT_BIT)</div><div class='add'>+		offset += sparc_config.cs_period;</div><div class='add'>+</div><div class='add'>+	return offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static cycle_t timer_cs_read(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	unsigned int seq, offset;</div><div class='add'>+	u64 cycles;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		seq = read_seqbegin(&amp;timer_cs_lock);</div><div class='add'>+</div><div class='add'>+		cycles = timer_cs_internal_counter;</div><div class='add'>+		offset = sparc_config.get_cycles_offset();</div><div class='add'>+	} while (read_seqretry(&amp;timer_cs_lock, seq));</div><div class='add'>+</div><div class='add'>+	/* Count absolute cycles */</div><div class='add'>+	cycles *= sparc_config.cs_period;</div><div class='add'>+	cycles += offset;</div><div class='add'>+</div><div class='add'>+	return cycles;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clocksource timer_cs = {</div><div class='add'>+	.name	= "timer_cs",</div><div class='add'>+	.rating	= 100,</div><div class='add'>+	.read	= timer_cs_read,</div><div class='add'>+	.mask	= CLOCKSOURCE_MASK(64),</div><div class='add'>+	.shift	= 2,</div><div class='add'>+	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __init int setup_timer_cs(void)</div><div class='add'>+{</div><div class='add'>+	timer_cs_enabled = 1;</div><div class='add'>+	timer_cs.mult = clocksource_hz2mult(sparc_config.clock_rate,</div><div class='add'>+	                                    timer_cs.shift);</div><div class='add'>+</div><div class='add'>+	return clocksource_register(&amp;timer_cs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+static void percpu_ce_setup(enum clock_event_mode mode,</div><div class='add'>+			struct clock_event_device *evt)</div><div class='add'>+{</div><div class='add'>+	int cpu = __first_cpu(evt-&gt;cpumask);</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+		case CLOCK_EVT_MODE_PERIODIC:</div><div class='add'>+			sparc_config.load_profile_irq(cpu,</div><div class='add'>+						      SBUS_CLOCK_RATE / HZ);</div><div class='add'>+			break;</div><div class='add'>+		case CLOCK_EVT_MODE_ONESHOT:</div><div class='add'>+		case CLOCK_EVT_MODE_SHUTDOWN:</div><div class='add'>+		case CLOCK_EVT_MODE_UNUSED:</div><div class='add'>+			sparc_config.load_profile_irq(cpu, 0);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int percpu_ce_set_next_event(unsigned long delta,</div><div class='add'>+				    struct clock_event_device *evt)</div><div class='add'>+{</div><div class='add'>+	int cpu = __first_cpu(evt-&gt;cpumask);</div><div class='add'>+	unsigned int next = (unsigned int)delta;</div><div class='add'>+</div><div class='add'>+	sparc_config.load_profile_irq(cpu, next);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void register_percpu_ce(int cpu)</div><div class='add'>+{</div><div class='add'>+	struct clock_event_device *ce = &amp;per_cpu(sparc32_clockevent, cpu);</div><div class='add'>+	unsigned int features = CLOCK_EVT_FEAT_PERIODIC;</div><div class='add'>+</div><div class='add'>+	if (sparc_config.features &amp; FEAT_L14_ONESHOT)</div><div class='add'>+		features |= CLOCK_EVT_FEAT_ONESHOT;</div><div class='add'>+</div><div class='add'>+	ce-&gt;name           = "percpu_ce";</div><div class='add'>+	ce-&gt;rating         = 200;</div><div class='add'>+	ce-&gt;features       = features;</div><div class='add'>+	ce-&gt;set_mode       = percpu_ce_setup;</div><div class='add'>+	ce-&gt;set_next_event = percpu_ce_set_next_event;</div><div class='add'>+	ce-&gt;cpumask        = cpumask_of(cpu);</div><div class='add'>+	ce-&gt;shift          = 32;</div><div class='add'>+	ce-&gt;mult           = div_sc(sparc_config.clock_rate, NSEC_PER_SEC,</div><div class='add'>+	                            ce-&gt;shift);</div><div class='add'>+	ce-&gt;max_delta_ns   = clockevent_delta2ns(sparc_config.clock_rate, ce);</div><div class='add'>+	ce-&gt;min_delta_ns   = clockevent_delta2ns(100, ce);</div><div class='add'>+</div><div class='add'>+	clockevents_register_device(ce);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static unsigned char mostek_read_byte(struct device *dev, u32 ofs)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *pdev = to_platform_device(dev);</div><div class='hunk'>@@ -195,38 +337,28 @@ static int __init clock_init(void)</div><div class='ctx'>  */</div><div class='ctx'> fs_initcall(clock_init);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-u32 sbus_do_gettimeoffset(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long val = *master_l10_counter;</div><div class='del'>-	unsigned long usec = (val &gt;&gt; 10) &amp; 0x1fffff;</div><div class='del'>-</div><div class='del'>-	/* Limit hit?  */</div><div class='del'>-	if (val &amp; 0x80000000)</div><div class='del'>-		usec += 1000000 / HZ;</div><div class='del'>-</div><div class='del'>-	return usec * 1000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-u32 arch_gettimeoffset(void)</div><div class='add'>+static void __init sparc32_late_time_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (unlikely(!do_arch_gettimeoffset))</div><div class='del'>-		return 0;</div><div class='del'>-	return do_arch_gettimeoffset();</div><div class='add'>+	if (sparc_config.features &amp; FEAT_L10_CLOCKEVENT)</div><div class='add'>+		setup_timer_ce();</div><div class='add'>+	if (sparc_config.features &amp; FEAT_L10_CLOCKSOURCE)</div><div class='add'>+		setup_timer_cs();</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	register_percpu_ce(smp_processor_id());</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init sbus_time_init(void)</div><div class='ctx'> {</div><div class='del'>-	do_arch_gettimeoffset = sbus_do_gettimeoffset;</div><div class='del'>-</div><div class='del'>-	btfixup();</div><div class='del'>-</div><div class='del'>-	sparc_irq_config.init_timers(timer_interrupt);</div><div class='add'>+	sparc_config.get_cycles_offset = sbus_cycles_offset;</div><div class='add'>+	sparc_config.init_timers();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init time_init(void)</div><div class='ctx'> {</div><div class='add'>+	sparc_config.features = 0;</div><div class='add'>+	late_time_init = sparc32_late_time_init;</div><div class='add'>+</div><div class='ctx'> 	if (pcic_present())</div><div class='ctx'> 		pci_time_init();</div><div class='ctx'> 	else</div><div class='head'>diff --git a/arch/sparc/kernel/trampoline_32.S b/arch/sparc/kernel/trampoline_32.S<br/>index 691f484e03b3..af27acab4486 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/trampoline_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/trampoline_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/trampoline_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/trampoline_32.S</a></div><div class='hunk'>@@ -15,8 +15,8 @@</div><div class='ctx'> #include &lt;asm/contregs.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='ctx'> </div><div class='del'>-	.globl sun4m_cpu_startup, __smp4m_processor_id, __leon_processor_id</div><div class='del'>-	.globl sun4d_cpu_startup, __smp4d_processor_id</div><div class='add'>+	.globl sun4m_cpu_startup</div><div class='add'>+	.globl sun4d_cpu_startup</div><div class='ctx'> </div><div class='ctx'> 	__CPUINIT</div><div class='ctx'> 	.align 4</div><div class='hunk'>@@ -94,24 +94,6 @@ smp_do_cpu_idle:</div><div class='ctx'> 	call	cpu_panic</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='del'>-__smp4m_processor_id:</div><div class='del'>-	rd	%tbr, %g2</div><div class='del'>-	srl	%g2, 12, %g2</div><div class='del'>-	and	%g2, 3, %g2</div><div class='del'>-	retl</div><div class='del'>-	 mov	%g1, %o7</div><div class='del'>-</div><div class='del'>-__smp4d_processor_id:</div><div class='del'>-	lda	[%g0] ASI_M_VIKING_TMP1, %g2</div><div class='del'>-	retl</div><div class='del'>-	 mov	%g1, %o7</div><div class='del'>-</div><div class='del'>-__leon_processor_id:</div><div class='del'>-	rd     %asr17,%g2</div><div class='del'>-        srl    %g2,28,%g2</div><div class='del'>-	retl</div><div class='del'>-	 mov	%g1, %o7</div><div class='del'>-</div><div class='ctx'> /* CPUID in bootbus can be found at PA 0xff0140000 */</div><div class='ctx'> #define SUN4D_BOOTBUS_CPUID	0xf0140000</div><div class='ctx'> </div><div class='hunk'>@@ -167,8 +149,6 @@ sun4d_cpu_startup:</div><div class='ctx'> </div><div class='ctx'> 	b,a	smp_do_cpu_idle</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPARC_LEON</div><div class='del'>-</div><div class='ctx'> 	__CPUINIT</div><div class='ctx'> 	.align	4</div><div class='ctx'>         .global leon_smp_cpu_startup, smp_penguin_ctable</div><div class='hunk'>@@ -179,7 +159,7 @@ leon_smp_cpu_startup:</div><div class='ctx'>         ld [%g1+4],%g1</div><div class='ctx'>         srl %g1,4,%g1</div><div class='ctx'>         set 0x00000100,%g5 /* SRMMU_CTXTBL_PTR */</div><div class='del'>-	sta %g1, [%g5] ASI_M_MMUREGS</div><div class='add'>+	sta %g1, [%g5] ASI_LEON_MMUREGS</div><div class='ctx'> </div><div class='ctx'> 	/* Set up a sane %psr -- PIL&lt;0xf&gt; S&lt;0x1&gt; PS&lt;0x1&gt; CWP&lt;0x0&gt; */</div><div class='ctx'> 	set	(PSR_PIL | PSR_S | PSR_PS), %g1</div><div class='hunk'>@@ -225,5 +205,3 @@ leon_smp_cpu_startup:</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='ctx'> 	b,a	smp_do_cpu_idle</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/sparc/kernel/traps_32.c b/arch/sparc/kernel/traps_32.c<br/>index d2de21333146..a5785ea2a85d 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/traps_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/traps_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/traps_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/traps_32.c</a></div><div class='hunk'>@@ -120,8 +120,6 @@ void do_illegal_instruction(struct pt_regs *regs, unsigned long pc, unsigned lon</div><div class='ctx'> 	printk("Ill instr. at pc=%08lx instruction is %08lx\n",</div><div class='ctx'> 	       regs-&gt;pc, *(unsigned long *)regs-&gt;pc);</div><div class='ctx'> #endif</div><div class='del'>-	if (!do_user_muldiv (regs, pc))</div><div class='del'>-		return;</div><div class='ctx'> </div><div class='ctx'> 	info.si_signo = SIGILL;</div><div class='ctx'> 	info.si_errno = 0;</div><div class='head'>diff --git a/arch/sparc/kernel/traps_64.c b/arch/sparc/kernel/traps_64.c<br/>index c72fdf55e1c1..3b05e6697710 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/traps_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/traps_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/traps_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/traps_64.c</a></div><div class='hunk'>@@ -2054,7 +2054,7 @@ void do_fpieee(struct pt_regs *regs)</div><div class='ctx'> 	do_fpe_common(regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern int do_mathemu(struct pt_regs *, struct fpustate *);</div><div class='add'>+extern int do_mathemu(struct pt_regs *, struct fpustate *, bool);</div><div class='ctx'> </div><div class='ctx'> void do_fpother(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -2068,7 +2068,7 @@ void do_fpother(struct pt_regs *regs)</div><div class='ctx'> 	switch ((current_thread_info()-&gt;xfsr[0] &amp; 0x1c000)) {</div><div class='ctx'> 	case (2 &lt;&lt; 14): /* unfinished_FPop */</div><div class='ctx'> 	case (3 &lt;&lt; 14): /* unimplemented_FPop */</div><div class='del'>-		ret = do_mathemu(regs, f);</div><div class='add'>+		ret = do_mathemu(regs, f, false);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -2308,10 +2308,12 @@ void do_illegal_instruction(struct pt_regs *regs)</div><div class='ctx'> 			} else {</div><div class='ctx'> 				struct fpustate *f = FPUSTATE;</div><div class='ctx'> </div><div class='del'>-				/* XXX maybe verify XFSR bits like</div><div class='del'>-				 * XXX do_fpother() does?</div><div class='add'>+				/* On UltraSPARC T2 and later, FPU insns which</div><div class='add'>+				 * are not implemented in HW signal an illegal</div><div class='add'>+				 * instruction trap and do not set the FP Trap</div><div class='add'>+				 * Trap in the %fsr to unimplemented_FPop.</div><div class='ctx'> 				 */</div><div class='del'>-				if (do_mathemu(regs, f))</div><div class='add'>+				if (do_mathemu(regs, f, true))</div><div class='ctx'> 					return;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='head'>diff --git a/arch/sparc/kernel/ttable_32.S b/arch/sparc/kernel/ttable_32.S<br/>new file mode 100644<br/>index 000000000000..8a7a96ca676f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/ttable_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/ttable_32.S</a></div><div class='hunk'>@@ -0,0 +1,417 @@</div><div class='add'>+/* The Sparc trap table, bootloader gives us control at _start. */</div><div class='add'>+        __HEAD</div><div class='add'>+</div><div class='add'>+        .globl  _start</div><div class='add'>+_start:</div><div class='add'>+</div><div class='add'>+	.globl _stext</div><div class='add'>+_stext:</div><div class='add'>+</div><div class='add'>+	.globl  trapbase</div><div class='add'>+trapbase:</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+trapbase_cpu0:</div><div class='add'>+#endif</div><div class='add'>+/* We get control passed to us here at t_zero. */</div><div class='add'>+t_zero:	b gokernel; nop; nop; nop;</div><div class='add'>+t_tflt:	SRMMU_TFAULT                        /* Inst. Access Exception        */</div><div class='add'>+t_bins:	TRAP_ENTRY(0x2, bad_instruction)    /* Illegal Instruction           */</div><div class='add'>+t_pins:	TRAP_ENTRY(0x3, priv_instruction)   /* Privileged Instruction        */</div><div class='add'>+t_fpd:	TRAP_ENTRY(0x4, fpd_trap_handler)   /* Floating Point Disabled       */</div><div class='add'>+t_wovf:	WINDOW_SPILL                        /* Window Overflow               */</div><div class='add'>+t_wunf:	WINDOW_FILL                         /* Window Underflow              */</div><div class='add'>+t_mna:	TRAP_ENTRY(0x7, mna_handler)        /* Memory Address Not Aligned    */</div><div class='add'>+t_fpe:	TRAP_ENTRY(0x8, fpe_trap_handler)   /* Floating Point Exception      */</div><div class='add'>+t_dflt:	SRMMU_DFAULT                        /* Data Miss Exception           */</div><div class='add'>+t_tio:	TRAP_ENTRY(0xa, do_tag_overflow)    /* Tagged Instruction Ovrflw     */</div><div class='add'>+t_wpt:	TRAP_ENTRY(0xb, do_watchpoint)      /* Watchpoint Detected           */</div><div class='add'>+t_badc:	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)</div><div class='add'>+t_irq1:	TRAP_ENTRY_INTERRUPT(1)             /* IRQ Software/SBUS Level 1     */</div><div class='add'>+t_irq2:	TRAP_ENTRY_INTERRUPT(2)             /* IRQ SBUS Level 2              */</div><div class='add'>+t_irq3:	TRAP_ENTRY_INTERRUPT(3)             /* IRQ SCSI/DMA/SBUS Level 3     */</div><div class='add'>+t_irq4:	TRAP_ENTRY_INTERRUPT(4)             /* IRQ Software Level 4          */</div><div class='add'>+t_irq5:	TRAP_ENTRY_INTERRUPT(5)             /* IRQ SBUS/Ethernet Level 5     */</div><div class='add'>+t_irq6:	TRAP_ENTRY_INTERRUPT(6)             /* IRQ Software Level 6          */</div><div class='add'>+t_irq7:	TRAP_ENTRY_INTERRUPT(7)             /* IRQ Video/SBUS Level 5        */</div><div class='add'>+t_irq8:	TRAP_ENTRY_INTERRUPT(8)             /* IRQ SBUS Level 6              */</div><div class='add'>+t_irq9:	TRAP_ENTRY_INTERRUPT(9)             /* IRQ SBUS Level 7              */</div><div class='add'>+t_irq10:TRAP_ENTRY_INTERRUPT(10)            /* IRQ Timer #1 (one we use)     */</div><div class='add'>+t_irq11:TRAP_ENTRY_INTERRUPT(11)            /* IRQ Floppy Intr.              */</div><div class='add'>+t_irq12:TRAP_ENTRY_INTERRUPT(12)            /* IRQ Zilog serial chip         */</div><div class='add'>+t_irq13:TRAP_ENTRY_INTERRUPT(13)            /* IRQ Audio Intr.               */</div><div class='add'>+t_irq14:TRAP_ENTRY_INTERRUPT(14)            /* IRQ Timer #2                  */</div><div class='add'>+</div><div class='add'>+	.globl	t_nmi</div><div class='add'>+t_nmi:	TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)</div><div class='add'>+</div><div class='add'>+t_racc:	TRAP_ENTRY(0x20, do_reg_access)     /* General Register Access Error */</div><div class='add'>+t_iacce:BAD_TRAP(0x21)                      /* Instr Access Error            */</div><div class='add'>+t_bad22:BAD_TRAP(0x22)</div><div class='add'>+	BAD_TRAP(0x23)</div><div class='add'>+t_cpdis:TRAP_ENTRY(0x24, do_cp_disabled)    /* Co-Processor Disabled         */</div><div class='add'>+t_uflsh:SKIP_TRAP(0x25, unimp_flush)        /* Unimplemented FLUSH inst.     */</div><div class='add'>+t_bad26:BAD_TRAP(0x26) BAD_TRAP(0x27)</div><div class='add'>+t_cpexc:TRAP_ENTRY(0x28, do_cp_exception)   /* Co-Processor Exception        */</div><div class='add'>+t_dacce:SRMMU_DFAULT                        /* Data Access Error             */</div><div class='add'>+t_hwdz:	TRAP_ENTRY(0x2a, do_hw_divzero)     /* Division by zero, you lose... */</div><div class='add'>+t_dserr:BAD_TRAP(0x2b)                      /* Data Store Error              */</div><div class='add'>+t_daccm:BAD_TRAP(0x2c)                      /* Data Access MMU-Miss          */</div><div class='add'>+t_bad2d:BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)</div><div class='add'>+t_bad32:BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)</div><div class='add'>+t_bad37:BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)</div><div class='add'>+t_iaccm:BAD_TRAP(0x3c)                      /* Instr Access MMU-Miss         */</div><div class='add'>+t_bad3d:BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40) BAD_TRAP(0x41)</div><div class='add'>+t_bad42:BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45) BAD_TRAP(0x46)</div><div class='add'>+t_bad47:BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a) BAD_TRAP(0x4b)</div><div class='add'>+t_bad4c:BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f) BAD_TRAP(0x50)</div><div class='add'>+t_bad51:BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)</div><div class='add'>+t_bad56:BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)</div><div class='add'>+t_bad5b:BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)</div><div class='add'>+t_bad60:BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)</div><div class='add'>+t_bad65:BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)</div><div class='add'>+t_bad6a:BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)</div><div class='add'>+t_bad6f:BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)</div><div class='add'>+t_bad74:BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)</div><div class='add'>+t_bad79:BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)</div><div class='add'>+t_bad7e:BAD_TRAP(0x7e) BAD_TRAP(0x7f)</div><div class='add'>+t_bad80:BAD_TRAP(0x80)                      /* SunOS System Call             */</div><div class='add'>+t_sbkpt:BREAKPOINT_TRAP                     /* Software Breakpoint/KGDB      */</div><div class='add'>+t_divz:	TRAP_ENTRY(0x82, do_hw_divzero)     /* Divide by zero trap           */</div><div class='add'>+t_flwin:TRAP_ENTRY(0x83, do_flush_windows)  /* Flush Windows Trap            */</div><div class='add'>+t_clwin:BAD_TRAP(0x84)                      /* Clean Windows Trap            */</div><div class='add'>+t_rchk:	BAD_TRAP(0x85)                      /* Range Check                   */</div><div class='add'>+t_funal:BAD_TRAP(0x86)                      /* Fix Unaligned Access Trap     */</div><div class='add'>+t_iovf:	BAD_TRAP(0x87)                      /* Integer Overflow Trap         */</div><div class='add'>+t_bad88:BAD_TRAP(0x88)                      /* Slowaris System Call          */</div><div class='add'>+t_bad89:BAD_TRAP(0x89)                      /* Net-B.S. System Call          */</div><div class='add'>+t_bad8a:BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c) BAD_TRAP(0x8d) BAD_TRAP(0x8e)</div><div class='add'>+t_bad8f:BAD_TRAP(0x8f)</div><div class='add'>+t_linux:LINUX_SYSCALL_TRAP                  /* Linux System Call             */</div><div class='add'>+t_bad91:BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94) BAD_TRAP(0x95)</div><div class='add'>+t_bad96:BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99) BAD_TRAP(0x9a)</div><div class='add'>+t_bad9b:BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e) BAD_TRAP(0x9f)</div><div class='add'>+t_getcc:GETCC_TRAP                          /* Get Condition Codes           */</div><div class='add'>+t_setcc:SETCC_TRAP                          /* Set Condition Codes           */</div><div class='add'>+t_getpsr:GETPSR_TRAP                        /* Get PSR Register              */</div><div class='add'>+t_bada3:BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)</div><div class='add'>+t_bada7:BAD_TRAP(0xa7)</div><div class='add'>+t_bada8:BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)</div><div class='add'>+t_badac:BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)</div><div class='add'>+t_badb1:BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)</div><div class='add'>+t_badb6:BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)</div><div class='add'>+t_badbb:BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)</div><div class='add'>+t_badc0:BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)</div><div class='add'>+t_badc5:BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)</div><div class='add'>+t_badca:BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)</div><div class='add'>+t_badcf:BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)</div><div class='add'>+t_badd4:BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)</div><div class='add'>+t_badd9:BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)</div><div class='add'>+t_badde:BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)</div><div class='add'>+t_bade3:BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)</div><div class='add'>+t_bade8:BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)</div><div class='add'>+t_baded:BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)</div><div class='add'>+t_badf2:BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)</div><div class='add'>+t_badf7:BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)</div><div class='add'>+t_badfc:BAD_TRAP(0xfc)</div><div class='add'>+t_kgdb:	KGDB_TRAP(0xfd)</div><div class='add'>+dbtrap:	BAD_TRAP(0xfe)                      /* Debugger/PROM breakpoint #1   */</div><div class='add'>+dbtrap2:BAD_TRAP(0xff)                      /* Debugger/PROM breakpoint #2   */</div><div class='add'>+</div><div class='add'>+	.globl	end_traptable</div><div class='add'>+end_traptable:</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	/* Trap tables for the other cpus. */</div><div class='add'>+	.globl	trapbase_cpu1, trapbase_cpu2, trapbase_cpu3</div><div class='add'>+trapbase_cpu1:</div><div class='add'>+	BAD_TRAP(0x0)</div><div class='add'>+	SRMMU_TFAULT</div><div class='add'>+	TRAP_ENTRY(0x2, bad_instruction)</div><div class='add'>+	TRAP_ENTRY(0x3, priv_instruction)</div><div class='add'>+	TRAP_ENTRY(0x4, fpd_trap_handler)</div><div class='add'>+	WINDOW_SPILL</div><div class='add'>+	WINDOW_FILL</div><div class='add'>+	TRAP_ENTRY(0x7, mna_handler)</div><div class='add'>+	TRAP_ENTRY(0x8, fpe_trap_handler)</div><div class='add'>+	SRMMU_DFAULT</div><div class='add'>+	TRAP_ENTRY(0xa, do_tag_overflow)</div><div class='add'>+	TRAP_ENTRY(0xb, do_watchpoint)</div><div class='add'>+	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(1) TRAP_ENTRY_INTERRUPT(2)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(3) TRAP_ENTRY_INTERRUPT(4)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(5) TRAP_ENTRY_INTERRUPT(6)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(7)	TRAP_ENTRY_INTERRUPT(8)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(9) TRAP_ENTRY_INTERRUPT(10)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(11) TRAP_ENTRY_INTERRUPT(12)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(13) TRAP_ENTRY_INTERRUPT(14)</div><div class='add'>+	TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)</div><div class='add'>+	TRAP_ENTRY(0x20, do_reg_access)</div><div class='add'>+	BAD_TRAP(0x21)</div><div class='add'>+	BAD_TRAP(0x22)</div><div class='add'>+	BAD_TRAP(0x23)</div><div class='add'>+	TRAP_ENTRY(0x24, do_cp_disabled)</div><div class='add'>+	SKIP_TRAP(0x25, unimp_flush)</div><div class='add'>+	BAD_TRAP(0x26)</div><div class='add'>+	BAD_TRAP(0x27)</div><div class='add'>+	TRAP_ENTRY(0x28, do_cp_exception)</div><div class='add'>+	SRMMU_DFAULT</div><div class='add'>+	TRAP_ENTRY(0x2a, do_hw_divzero)</div><div class='add'>+	BAD_TRAP(0x2b)</div><div class='add'>+	BAD_TRAP(0x2c)</div><div class='add'>+	BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)</div><div class='add'>+	BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)</div><div class='add'>+	BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)</div><div class='add'>+	BAD_TRAP(0x3c) BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40)</div><div class='add'>+	BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45)</div><div class='add'>+	BAD_TRAP(0x46) BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a)</div><div class='add'>+	BAD_TRAP(0x4b) BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)</div><div class='add'>+	BAD_TRAP(0x50)</div><div class='add'>+	BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)</div><div class='add'>+	BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)</div><div class='add'>+	BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)</div><div class='add'>+	BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)</div><div class='add'>+	BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)</div><div class='add'>+	BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)</div><div class='add'>+	BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)</div><div class='add'>+	BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)</div><div class='add'>+	BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)</div><div class='add'>+	BAD_TRAP(0x7e) BAD_TRAP(0x7f)</div><div class='add'>+	BAD_TRAP(0x80)</div><div class='add'>+	BREAKPOINT_TRAP</div><div class='add'>+	TRAP_ENTRY(0x82, do_hw_divzero)</div><div class='add'>+	TRAP_ENTRY(0x83, do_flush_windows)</div><div class='add'>+	BAD_TRAP(0x84) BAD_TRAP(0x85) BAD_TRAP(0x86)</div><div class='add'>+	BAD_TRAP(0x87) BAD_TRAP(0x88) BAD_TRAP(0x89)</div><div class='add'>+	BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c)</div><div class='add'>+	BAD_TRAP(0x8d) BAD_TRAP(0x8e) BAD_TRAP(0x8f)</div><div class='add'>+	LINUX_SYSCALL_TRAP BAD_TRAP(0x91)</div><div class='add'>+	BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94)</div><div class='add'>+	BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99)</div><div class='add'>+	BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e)</div><div class='add'>+	BAD_TRAP(0x9f)</div><div class='add'>+	GETCC_TRAP</div><div class='add'>+	SETCC_TRAP</div><div class='add'>+	GETPSR_TRAP</div><div class='add'>+	BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)</div><div class='add'>+	BAD_TRAP(0xa7) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)</div><div class='add'>+	BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)</div><div class='add'>+	BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)</div><div class='add'>+	BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)</div><div class='add'>+	BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)</div><div class='add'>+	BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)</div><div class='add'>+	BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)</div><div class='add'>+	BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)</div><div class='add'>+	BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)</div><div class='add'>+	BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)</div><div class='add'>+	BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)</div><div class='add'>+	BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)</div><div class='add'>+	BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)</div><div class='add'>+	BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)</div><div class='add'>+	BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)</div><div class='add'>+	BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)</div><div class='add'>+	BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)</div><div class='add'>+	BAD_TRAP(0xfc)</div><div class='add'>+	KGDB_TRAP(0xfd)</div><div class='add'>+	BAD_TRAP(0xfe)</div><div class='add'>+	BAD_TRAP(0xff)</div><div class='add'>+</div><div class='add'>+trapbase_cpu2:</div><div class='add'>+	BAD_TRAP(0x0)</div><div class='add'>+	SRMMU_TFAULT</div><div class='add'>+	TRAP_ENTRY(0x2, bad_instruction)</div><div class='add'>+	TRAP_ENTRY(0x3, priv_instruction)</div><div class='add'>+	TRAP_ENTRY(0x4, fpd_trap_handler)</div><div class='add'>+	WINDOW_SPILL</div><div class='add'>+	WINDOW_FILL</div><div class='add'>+	TRAP_ENTRY(0x7, mna_handler)</div><div class='add'>+	TRAP_ENTRY(0x8, fpe_trap_handler)</div><div class='add'>+	SRMMU_DFAULT</div><div class='add'>+	TRAP_ENTRY(0xa, do_tag_overflow)</div><div class='add'>+	TRAP_ENTRY(0xb, do_watchpoint)</div><div class='add'>+	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(1)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(2)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(3)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(4)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(5)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(6)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(7)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(8)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(9)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(10)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(11)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(12)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(13)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(14)</div><div class='add'>+	TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)</div><div class='add'>+	TRAP_ENTRY(0x20, do_reg_access)</div><div class='add'>+	BAD_TRAP(0x21)</div><div class='add'>+	BAD_TRAP(0x22)</div><div class='add'>+	BAD_TRAP(0x23)</div><div class='add'>+	TRAP_ENTRY(0x24, do_cp_disabled)</div><div class='add'>+	SKIP_TRAP(0x25, unimp_flush)</div><div class='add'>+	BAD_TRAP(0x26)</div><div class='add'>+	BAD_TRAP(0x27)</div><div class='add'>+	TRAP_ENTRY(0x28, do_cp_exception)</div><div class='add'>+	SRMMU_DFAULT</div><div class='add'>+	TRAP_ENTRY(0x2a, do_hw_divzero)</div><div class='add'>+	BAD_TRAP(0x2b)</div><div class='add'>+	BAD_TRAP(0x2c)</div><div class='add'>+	BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)</div><div class='add'>+	BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)</div><div class='add'>+	BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)</div><div class='add'>+	BAD_TRAP(0x3c) BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40)</div><div class='add'>+	BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45)</div><div class='add'>+	BAD_TRAP(0x46) BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a)</div><div class='add'>+	BAD_TRAP(0x4b) BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)</div><div class='add'>+	BAD_TRAP(0x50)</div><div class='add'>+	BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)</div><div class='add'>+	BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)</div><div class='add'>+	BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)</div><div class='add'>+	BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)</div><div class='add'>+	BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)</div><div class='add'>+	BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)</div><div class='add'>+	BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)</div><div class='add'>+	BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)</div><div class='add'>+	BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)</div><div class='add'>+	BAD_TRAP(0x7e) BAD_TRAP(0x7f)</div><div class='add'>+	BAD_TRAP(0x80)</div><div class='add'>+	BREAKPOINT_TRAP</div><div class='add'>+	TRAP_ENTRY(0x82, do_hw_divzero)</div><div class='add'>+	TRAP_ENTRY(0x83, do_flush_windows)</div><div class='add'>+	BAD_TRAP(0x84)</div><div class='add'>+	BAD_TRAP(0x85)</div><div class='add'>+	BAD_TRAP(0x86) BAD_TRAP(0x87) BAD_TRAP(0x88)</div><div class='add'>+	BAD_TRAP(0x89) BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c)</div><div class='add'>+	BAD_TRAP(0x8d) BAD_TRAP(0x8e) BAD_TRAP(0x8f)</div><div class='add'>+	LINUX_SYSCALL_TRAP BAD_TRAP(0x91)</div><div class='add'>+	BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94)</div><div class='add'>+	BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99)</div><div class='add'>+	BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e)</div><div class='add'>+	BAD_TRAP(0x9f)</div><div class='add'>+	GETCC_TRAP</div><div class='add'>+	SETCC_TRAP</div><div class='add'>+	GETPSR_TRAP</div><div class='add'>+	BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)</div><div class='add'>+	BAD_TRAP(0xa7) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)</div><div class='add'>+	BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)</div><div class='add'>+	BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)</div><div class='add'>+	BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)</div><div class='add'>+	BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)</div><div class='add'>+	BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)</div><div class='add'>+	BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)</div><div class='add'>+	BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)</div><div class='add'>+	BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)</div><div class='add'>+	BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)</div><div class='add'>+	BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)</div><div class='add'>+	BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)</div><div class='add'>+	BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)</div><div class='add'>+	BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)</div><div class='add'>+	BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)</div><div class='add'>+	BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)</div><div class='add'>+	BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)</div><div class='add'>+	BAD_TRAP(0xfc)</div><div class='add'>+	KGDB_TRAP(0xfd)</div><div class='add'>+	BAD_TRAP(0xfe)</div><div class='add'>+	BAD_TRAP(0xff)</div><div class='add'>+</div><div class='add'>+trapbase_cpu3:</div><div class='add'>+	BAD_TRAP(0x0)</div><div class='add'>+	SRMMU_TFAULT</div><div class='add'>+	TRAP_ENTRY(0x2, bad_instruction)</div><div class='add'>+	TRAP_ENTRY(0x3, priv_instruction)</div><div class='add'>+	TRAP_ENTRY(0x4, fpd_trap_handler)</div><div class='add'>+	WINDOW_SPILL</div><div class='add'>+	WINDOW_FILL</div><div class='add'>+	TRAP_ENTRY(0x7, mna_handler)</div><div class='add'>+	TRAP_ENTRY(0x8, fpe_trap_handler)</div><div class='add'>+	SRMMU_DFAULT</div><div class='add'>+	TRAP_ENTRY(0xa, do_tag_overflow)</div><div class='add'>+	TRAP_ENTRY(0xb, do_watchpoint)</div><div class='add'>+	BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(1)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(2)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(3)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(4)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(5)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(6)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(7)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(8)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(9)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(10)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(11)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(12)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(13)</div><div class='add'>+	TRAP_ENTRY_INTERRUPT(14)</div><div class='add'>+	TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)</div><div class='add'>+	TRAP_ENTRY(0x20, do_reg_access)</div><div class='add'>+	BAD_TRAP(0x21)</div><div class='add'>+	BAD_TRAP(0x22)</div><div class='add'>+	BAD_TRAP(0x23)</div><div class='add'>+	TRAP_ENTRY(0x24, do_cp_disabled)</div><div class='add'>+	SKIP_TRAP(0x25, unimp_flush)</div><div class='add'>+	BAD_TRAP(0x26)</div><div class='add'>+	BAD_TRAP(0x27)</div><div class='add'>+	TRAP_ENTRY(0x28, do_cp_exception)</div><div class='add'>+	SRMMU_DFAULT</div><div class='add'>+	TRAP_ENTRY(0x2a, do_hw_divzero)</div><div class='add'>+	BAD_TRAP(0x2b) BAD_TRAP(0x2c)</div><div class='add'>+	BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f) BAD_TRAP(0x30) BAD_TRAP(0x31)</div><div class='add'>+	BAD_TRAP(0x32) BAD_TRAP(0x33) BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36)</div><div class='add'>+	BAD_TRAP(0x37) BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)</div><div class='add'>+	BAD_TRAP(0x3c) BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f) BAD_TRAP(0x40)</div><div class='add'>+	BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43) BAD_TRAP(0x44) BAD_TRAP(0x45)</div><div class='add'>+	BAD_TRAP(0x46) BAD_TRAP(0x47) BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a)</div><div class='add'>+	BAD_TRAP(0x4b) BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)</div><div class='add'>+	BAD_TRAP(0x50)</div><div class='add'>+	BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53) BAD_TRAP(0x54) BAD_TRAP(0x55)</div><div class='add'>+	BAD_TRAP(0x56) BAD_TRAP(0x57) BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a)</div><div class='add'>+	BAD_TRAP(0x5b) BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)</div><div class='add'>+	BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63) BAD_TRAP(0x64)</div><div class='add'>+	BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67) BAD_TRAP(0x68) BAD_TRAP(0x69)</div><div class='add'>+	BAD_TRAP(0x6a) BAD_TRAP(0x6b) BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e)</div><div class='add'>+	BAD_TRAP(0x6f) BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)</div><div class='add'>+	BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77) BAD_TRAP(0x78)</div><div class='add'>+	BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b) BAD_TRAP(0x7c) BAD_TRAP(0x7d)</div><div class='add'>+	BAD_TRAP(0x7e) BAD_TRAP(0x7f)</div><div class='add'>+	BAD_TRAP(0x80)</div><div class='add'>+	BREAKPOINT_TRAP</div><div class='add'>+	TRAP_ENTRY(0x82, do_hw_divzero)</div><div class='add'>+	TRAP_ENTRY(0x83, do_flush_windows)</div><div class='add'>+	BAD_TRAP(0x84) BAD_TRAP(0x85)</div><div class='add'>+	BAD_TRAP(0x86) BAD_TRAP(0x87) BAD_TRAP(0x88)</div><div class='add'>+	BAD_TRAP(0x89) BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c)</div><div class='add'>+	BAD_TRAP(0x8d) BAD_TRAP(0x8e) BAD_TRAP(0x8f)</div><div class='add'>+	LINUX_SYSCALL_TRAP</div><div class='add'>+	BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93) BAD_TRAP(0x94)</div><div class='add'>+	BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97) BAD_TRAP(0x98) BAD_TRAP(0x99)</div><div class='add'>+	BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e)</div><div class='add'>+	BAD_TRAP(0x9f)</div><div class='add'>+	GETCC_TRAP</div><div class='add'>+	SETCC_TRAP</div><div class='add'>+	GETPSR_TRAP</div><div class='add'>+	BAD_TRAP(0xa3) BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)</div><div class='add'>+	BAD_TRAP(0xa7) BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)</div><div class='add'>+	BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf) BAD_TRAP(0xb0)</div><div class='add'>+	BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3) BAD_TRAP(0xb4) BAD_TRAP(0xb5)</div><div class='add'>+	BAD_TRAP(0xb6) BAD_TRAP(0xb7) BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba)</div><div class='add'>+	BAD_TRAP(0xbb) BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)</div><div class='add'>+	BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3) BAD_TRAP(0xc4)</div><div class='add'>+	BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7) BAD_TRAP(0xc8) BAD_TRAP(0xc9)</div><div class='add'>+	BAD_TRAP(0xca) BAD_TRAP(0xcb) BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce)</div><div class='add'>+	BAD_TRAP(0xcf) BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)</div><div class='add'>+	BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7) BAD_TRAP(0xd8)</div><div class='add'>+	BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb) BAD_TRAP(0xdc) BAD_TRAP(0xdd)</div><div class='add'>+	BAD_TRAP(0xde) BAD_TRAP(0xdf) BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2)</div><div class='add'>+	BAD_TRAP(0xe3) BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)</div><div class='add'>+	BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb) BAD_TRAP(0xec)</div><div class='add'>+	BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef) BAD_TRAP(0xf0) BAD_TRAP(0xf1)</div><div class='add'>+	BAD_TRAP(0xf2) BAD_TRAP(0xf3) BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6)</div><div class='add'>+	BAD_TRAP(0xf7) BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)</div><div class='add'>+	BAD_TRAP(0xfc)</div><div class='add'>+	KGDB_TRAP(0xfd)</div><div class='add'>+	BAD_TRAP(0xfe)</div><div class='add'>+	BAD_TRAP(0xff)</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/sparc/kernel/ttable.S b/arch/sparc/kernel/ttable_64.S<br/>index c6dfdaa29e20..c6dfdaa29e20 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/ttable.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/ttable.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/ttable_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/ttable_64.S</a></div><div class='head'>diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c<br/>index dae85bc2eda5..f81d038f7340 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/unaligned_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/unaligned_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/unaligned_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/unaligned_64.c</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;linux/ratelimit.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;asm/fpumacro.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S<br/>index 0e1605697b49..89c2c29f154b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/vmlinux.lds.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/vmlinux.lds.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -107,6 +107,11 @@ SECTIONS</div><div class='ctx'> 		*(.sun4v_2insn_patch)</div><div class='ctx'> 		__sun4v_2insn_patch_end = .;</div><div class='ctx'> 	}</div><div class='add'>+	.leon_1insn_patch : {</div><div class='add'>+		__leon_1insn_patch = .;</div><div class='add'>+		*(.leon_1insn_patch)</div><div class='add'>+		__leon_1insn_patch_end = .;</div><div class='add'>+	}</div><div class='ctx'> 	.swapper_tsb_phys_patch : {</div><div class='ctx'> 		__swapper_tsb_phys_patch = .;</div><div class='ctx'> 		*(.swapper_tsb_phys_patch)</div><div class='head'>diff --git a/arch/sparc/kernel/wof.S b/arch/sparc/kernel/wof.S<br/>index 3bbcd8dc9abf..28a7bc69f82b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/wof.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/wof.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/wof.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/wof.S</a></div><div class='hunk'>@@ -163,9 +163,8 @@ spwin_fromuser:</div><div class='ctx'> 	 * the label 'spwin_user_stack_is_bolixed' which will take</div><div class='ctx'> 	 * care of things at that point.</div><div class='ctx'> 	 */</div><div class='del'>-	.globl	spwin_mmu_patchme</div><div class='del'>-spwin_mmu_patchme:	b	spwin_sun4c_stackchk</div><div class='del'>-				 andcc	%sp, 0x7, %g0</div><div class='add'>+	b	spwin_srmmu_stackchk</div><div class='add'>+	 andcc	%sp, 0x7, %g0</div><div class='ctx'> </div><div class='ctx'> spwin_good_ustack:</div><div class='ctx'> 	/* LOCATION: Window to be saved */</div><div class='hunk'>@@ -306,73 +305,6 @@ spwin_bad_ustack_from_kernel:</div><div class='ctx'>  * As noted above %curptr cannot be touched by this routine at all.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-spwin_sun4c_stackchk:</div><div class='del'>-	/* LOCATION: Window to be saved on the stack */</div><div class='del'>-</div><div class='del'>-	/* See if the stack is in the address space hole but first,</div><div class='del'>-	 * check results of callers andcc %sp, 0x7, %g0</div><div class='del'>-	 */</div><div class='del'>-	be	1f</div><div class='del'>-	 sra	%sp, 29, %glob_tmp</div><div class='del'>-</div><div class='del'>-	rd	%psr, %glob_tmp</div><div class='del'>-	b	spwin_user_stack_is_bolixed + 0x4</div><div class='del'>-	 nop</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	add	%glob_tmp, 0x1, %glob_tmp</div><div class='del'>-	andncc	%glob_tmp, 0x1, %g0</div><div class='del'>-	be	1f</div><div class='del'>-	 and	%sp, 0xfff, %glob_tmp		! delay slot</div><div class='del'>-</div><div class='del'>-	rd	%psr, %glob_tmp</div><div class='del'>-	b	spwin_user_stack_is_bolixed + 0x4</div><div class='del'>-	 nop</div><div class='del'>-</div><div class='del'>-	/* See if our dump area will be on more than one</div><div class='del'>-	 * page.</div><div class='del'>-	 */</div><div class='del'>-1:</div><div class='del'>-	add	%glob_tmp, 0x38, %glob_tmp</div><div class='del'>-	andncc	%glob_tmp, 0xff8, %g0</div><div class='del'>-	be	spwin_sun4c_onepage		! only one page to check</div><div class='del'>-	 lda	[%sp] ASI_PTE, %glob_tmp	! have to check first page anyways</div><div class='del'>-</div><div class='del'>-spwin_sun4c_twopages:</div><div class='del'>-	/* Is first page ok permission wise? */</div><div class='del'>-	srl	%glob_tmp, 29, %glob_tmp</div><div class='del'>-	cmp	%glob_tmp, 0x6</div><div class='del'>-	be	1f</div><div class='del'>-	 add	%sp, 0x38, %glob_tmp	/* Is second page in vma hole? */</div><div class='del'>-</div><div class='del'>-	rd	%psr, %glob_tmp</div><div class='del'>-	b	spwin_user_stack_is_bolixed + 0x4</div><div class='del'>-	 nop</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	sra	%glob_tmp, 29, %glob_tmp</div><div class='del'>-	add	%glob_tmp, 0x1, %glob_tmp</div><div class='del'>-	andncc	%glob_tmp, 0x1, %g0</div><div class='del'>-	be	1f</div><div class='del'>-	 add	%sp, 0x38, %glob_tmp</div><div class='del'>-</div><div class='del'>-	rd	%psr, %glob_tmp</div><div class='del'>-	b	spwin_user_stack_is_bolixed + 0x4</div><div class='del'>-	 nop</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	lda	[%glob_tmp] ASI_PTE, %glob_tmp</div><div class='del'>-</div><div class='del'>-spwin_sun4c_onepage:</div><div class='del'>-	srl	%glob_tmp, 29, %glob_tmp</div><div class='del'>-	cmp	%glob_tmp, 0x6				! can user write to it?</div><div class='del'>-	be	spwin_good_ustack			! success</div><div class='del'>-	 nop</div><div class='del'>-</div><div class='del'>-	rd	%psr, %glob_tmp</div><div class='del'>-	b	spwin_user_stack_is_bolixed + 0x4</div><div class='del'>-	 nop</div><div class='del'>-</div><div class='ctx'> 	/* This is a generic SRMMU routine.  As far as I know this</div><div class='ctx'> 	 * works for all current v8/srmmu implementations, we'll</div><div class='ctx'> 	 * see...</div><div class='hunk'>@@ -400,24 +332,30 @@ spwin_srmmu_stackchk:</div><div class='ctx'> 	 mov	AC_M_SFSR, %glob_tmp</div><div class='ctx'> </div><div class='ctx'> 	/* Clear the fault status and turn on the no_fault bit. */</div><div class='del'>-	lda	[%glob_tmp] ASI_M_MMUREGS, %g0		! eat SFSR</div><div class='add'>+LEON_PI(lda	[%glob_tmp] ASI_LEON_MMUREGS, %g0)	! eat SFSR</div><div class='add'>+SUN_PI_(lda	[%glob_tmp] ASI_M_MMUREGS, %g0)		! eat SFSR</div><div class='ctx'> </div><div class='del'>-	lda	[%g0] ASI_M_MMUREGS, %glob_tmp		! read MMU control</div><div class='add'>+LEON_PI(lda	[%g0] ASI_LEON_MMUREGS, %glob_tmp)	! read MMU control</div><div class='add'>+SUN_PI_(lda	[%g0] ASI_M_MMUREGS, %glob_tmp)		! read MMU control</div><div class='ctx'> 	or	%glob_tmp, 0x2, %glob_tmp		! or in no_fault bit</div><div class='del'>-	sta	%glob_tmp, [%g0] ASI_M_MMUREGS		! set it</div><div class='add'>+LEON_PI(sta	%glob_tmp, [%g0] ASI_LEON_MMUREGS)	! set it</div><div class='add'>+SUN_PI_(sta	%glob_tmp, [%g0] ASI_M_MMUREGS)		! set it</div><div class='ctx'> </div><div class='ctx'> 	/* Dump the registers and cross fingers. */</div><div class='ctx'> 	STORE_WINDOW(sp)</div><div class='ctx'> </div><div class='ctx'> 	/* Clear the no_fault bit and check the status. */</div><div class='ctx'> 	andn	%glob_tmp, 0x2, %glob_tmp</div><div class='del'>-	sta	%glob_tmp, [%g0] ASI_M_MMUREGS</div><div class='add'>+LEON_PI(sta	%glob_tmp, [%g0] ASI_LEON_MMUREGS)</div><div class='add'>+SUN_PI_(sta	%glob_tmp, [%g0] ASI_M_MMUREGS)</div><div class='ctx'> </div><div class='ctx'> 	mov	AC_M_SFAR, %glob_tmp</div><div class='del'>-	lda	[%glob_tmp] ASI_M_MMUREGS, %g0</div><div class='add'>+LEON_PI(lda	[%glob_tmp] ASI_LEON_MMUREGS, %g0)</div><div class='add'>+SUN_PI_(lda	[%glob_tmp] ASI_M_MMUREGS, %g0)</div><div class='ctx'> </div><div class='ctx'> 	mov	AC_M_SFSR, %glob_tmp</div><div class='del'>-	lda	[%glob_tmp] ASI_M_MMUREGS, %glob_tmp</div><div class='add'>+LEON_PI(lda	[%glob_tmp] ASI_LEON_MMUREGS, %glob_tmp)</div><div class='add'>+SUN_PI_(lda	[%glob_tmp] ASI_M_MMUREGS, %glob_tmp)</div><div class='ctx'> 	andcc	%glob_tmp, 0x2, %g0			! did we fault?</div><div class='ctx'> 	be,a	spwin_finish_up + 0x4			! cool beans, success</div><div class='ctx'> 	 restore %g0, %g0, %g0</div><div class='head'>diff --git a/arch/sparc/kernel/wuf.S b/arch/sparc/kernel/wuf.S<br/>index 779ff750603d..2c21cc59683e 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/kernel/wuf.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/kernel/wuf.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/kernel/wuf.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/kernel/wuf.S</a></div><div class='hunk'>@@ -131,12 +131,9 @@ fwin_from_user:</div><div class='ctx'> </div><div class='ctx'> 	/* LOCATION: Window 'W' */</div><div class='ctx'> </div><div class='del'>-	/* Branch to the architecture specific stack validation</div><div class='del'>-	 * routine.  They can be found below...</div><div class='del'>-	 */</div><div class='del'>-	.globl	fwin_mmu_patchme</div><div class='del'>-fwin_mmu_patchme:	b	sun4c_fwin_stackchk</div><div class='del'>-				 andcc	%sp, 0x7, %g0</div><div class='add'>+	/* Branch to the stack validation routine */</div><div class='add'>+	b	srmmu_fwin_stackchk</div><div class='add'>+	 andcc	%sp, 0x7, %g0</div><div class='ctx'> </div><div class='ctx'> #define STACK_OFFSET (THREAD_SIZE - TRACEREG_SZ - STACKFRAME_SZ)</div><div class='ctx'> </div><div class='hunk'>@@ -242,57 +239,6 @@ fwin_user_finish_up:</div><div class='ctx'> 	 * 'someone elses' window possibly.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	.align	4</div><div class='del'>-sun4c_fwin_stackchk:</div><div class='del'>-	/* LOCATION: Window 'W' */</div><div class='del'>-</div><div class='del'>-	/* Caller did 'andcc %sp, 0x7, %g0' */</div><div class='del'>-	be	1f</div><div class='del'>-	 and	%sp, 0xfff, %l0		! delay slot</div><div class='del'>-</div><div class='del'>-	b,a	fwin_user_stack_is_bolixed</div><div class='del'>-</div><div class='del'>-	/* See if we have to check the sanity of one page or two */</div><div class='del'>-1:</div><div class='del'>-	add	%l0, 0x38, %l0</div><div class='del'>-	sra	%sp, 29, %l5</div><div class='del'>-	add	%l5, 0x1, %l5</div><div class='del'>-	andncc	%l5, 0x1, %g0</div><div class='del'>-	be	1f</div><div class='del'>-	 andncc	%l0, 0xff8, %g0</div><div class='del'>-</div><div class='del'>-	b,a	fwin_user_stack_is_bolixed	/* %sp is in vma hole, yuck */</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	be	sun4c_fwin_onepage	/* Only one page to check */</div><div class='del'>-	 lda	[%sp] ASI_PTE, %l1</div><div class='del'>-sun4c_fwin_twopages:</div><div class='del'>-	add	%sp, 0x38, %l0</div><div class='del'>-	sra	%l0, 29, %l5</div><div class='del'>-	add	%l5, 0x1, %l5</div><div class='del'>-	andncc	%l5, 0x1, %g0</div><div class='del'>-	be	1f</div><div class='del'>-	 lda	[%l0] ASI_PTE, %l1</div><div class='del'>-</div><div class='del'>-	b,a	fwin_user_stack_is_bolixed	/* Second page in vma hole */</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	srl	%l1, 29, %l1</div><div class='del'>-	andcc	%l1, 0x4, %g0</div><div class='del'>-	bne	sun4c_fwin_onepage</div><div class='del'>-	 lda	[%sp] ASI_PTE, %l1	</div><div class='del'>-</div><div class='del'>-	b,a	fwin_user_stack_is_bolixed	/* Second page has bad perms */</div><div class='del'>-</div><div class='del'>-sun4c_fwin_onepage:</div><div class='del'>-	srl	%l1, 29, %l1</div><div class='del'>-	andcc	%l1, 0x4, %g0</div><div class='del'>-	bne	fwin_user_stack_is_ok</div><div class='del'>-	 nop</div><div class='del'>-</div><div class='del'>-	/* A page had bad page permissions, losing... */</div><div class='del'>-	b,a	fwin_user_stack_is_bolixed</div><div class='del'>-</div><div class='ctx'> 	.globl	srmmu_fwin_stackchk</div><div class='ctx'> srmmu_fwin_stackchk:</div><div class='ctx'> 	/* LOCATION: Window 'W' */</div><div class='hunk'>@@ -308,16 +254,19 @@ srmmu_fwin_stackchk:</div><div class='ctx'> 	mov	AC_M_SFSR, %l4</div><div class='ctx'> 	cmp	%l5, %sp</div><div class='ctx'> 	bleu	fwin_user_stack_is_bolixed</div><div class='del'>-	 lda	[%l4] ASI_M_MMUREGS, %g0	! clear fault status</div><div class='add'>+LEON_PI( lda	[%l4] ASI_LEON_MMUREGS, %g0)	! clear fault status</div><div class='add'>+SUN_PI_( lda	[%l4] ASI_M_MMUREGS, %g0)	! clear fault status</div><div class='ctx'> </div><div class='ctx'> 	/* The technique is, turn off faults on this processor,</div><div class='ctx'> 	 * just let the load rip, then check the sfsr to see if</div><div class='ctx'> 	 * a fault did occur.  Then we turn on fault traps again</div><div class='ctx'> 	 * and branch conditionally based upon what happened.</div><div class='ctx'> 	 */</div><div class='del'>-	lda	[%g0] ASI_M_MMUREGS, %l5	! read mmu-ctrl reg</div><div class='add'>+LEON_PI(lda	[%g0] ASI_LEON_MMUREGS, %l5)	! read mmu-ctrl reg</div><div class='add'>+SUN_PI_(lda	[%g0] ASI_M_MMUREGS, %l5)	! read mmu-ctrl reg</div><div class='ctx'> 	or	%l5, 0x2, %l5			! turn on no-fault bit</div><div class='del'>-	sta	%l5, [%g0] ASI_M_MMUREGS	! store it</div><div class='add'>+LEON_PI(sta	%l5, [%g0] ASI_LEON_MMUREGS)	! store it</div><div class='add'>+SUN_PI_(sta	%l5, [%g0] ASI_M_MMUREGS)	! store it</div><div class='ctx'> </div><div class='ctx'> 	/* Cross fingers and go for it. */</div><div class='ctx'> 	LOAD_WINDOW(sp)</div><div class='hunk'>@@ -329,18 +278,22 @@ srmmu_fwin_stackchk:</div><div class='ctx'> </div><div class='ctx'> 	/* LOCATION: Window 'T' */</div><div class='ctx'> </div><div class='del'>-	lda	[%g0] ASI_M_MMUREGS, %twin_tmp1	! load mmu-ctrl again</div><div class='del'>-	andn	%twin_tmp1, 0x2, %twin_tmp1	! clear no-fault bit</div><div class='del'>-	sta	%twin_tmp1, [%g0] ASI_M_MMUREGS	! store it</div><div class='add'>+LEON_PI(lda	[%g0] ASI_LEON_MMUREGS, %twin_tmp1)	! load mmu-ctrl again</div><div class='add'>+SUN_PI_(lda	[%g0] ASI_M_MMUREGS, %twin_tmp1)	! load mmu-ctrl again</div><div class='add'>+	andn	%twin_tmp1, 0x2, %twin_tmp1		! clear no-fault bit</div><div class='add'>+LEON_PI(sta	%twin_tmp1, [%g0] ASI_LEON_MMUREGS)	! store it</div><div class='add'>+SUN_PI_(sta	%twin_tmp1, [%g0] ASI_M_MMUREGS)	! store it</div><div class='ctx'> </div><div class='ctx'> 	mov	AC_M_SFAR, %twin_tmp2</div><div class='del'>-	lda	[%twin_tmp2] ASI_M_MMUREGS, %g0	! read fault address</div><div class='add'>+LEON_PI(lda	[%twin_tmp2] ASI_LEON_MMUREGS, %g0)	! read fault address</div><div class='add'>+SUN_PI_(lda	[%twin_tmp2] ASI_M_MMUREGS, %g0)	! read fault address</div><div class='ctx'> </div><div class='ctx'> 	mov	AC_M_SFSR, %twin_tmp2</div><div class='del'>-	lda	[%twin_tmp2] ASI_M_MMUREGS, %twin_tmp2	! read fault status</div><div class='del'>-	andcc	%twin_tmp2, 0x2, %g0			! did fault occur?</div><div class='add'>+LEON_PI(lda	[%twin_tmp2] ASI_LEON_MMUREGS, %twin_tmp2) ! read fault status</div><div class='add'>+SUN_PI_(lda	[%twin_tmp2] ASI_M_MMUREGS, %twin_tmp2)	   ! read fault status</div><div class='add'>+	andcc	%twin_tmp2, 0x2, %g0			   ! did fault occur?</div><div class='ctx'> </div><div class='del'>-	bne	1f					! yep, cleanup</div><div class='add'>+	bne	1f					   ! yep, cleanup</div><div class='ctx'> 	 nop</div><div class='ctx'> </div><div class='ctx'> 	wr	%t_psr, 0x0, %psr</div><div class='head'>diff --git a/arch/sparc/lib/Makefile b/arch/sparc/lib/Makefile<br/>index a3fc4375a150..dff4096f3dec 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/Makefile</a></div><div class='hunk'>@@ -4,16 +4,15 @@</div><div class='ctx'> asflags-y := -ansi -DST_DIV0=0x02</div><div class='ctx'> ccflags-y := -Werror</div><div class='ctx'> </div><div class='del'>-lib-$(CONFIG_SPARC32) += mul.o rem.o sdiv.o udiv.o umul.o urem.o ashrdi3.o</div><div class='add'>+lib-$(CONFIG_SPARC32) += ashrdi3.o</div><div class='ctx'> lib-$(CONFIG_SPARC32) += memcpy.o memset.o</div><div class='ctx'> lib-y                 += strlen.o</div><div class='ctx'> lib-y                 += checksum_$(BITS).o</div><div class='ctx'> lib-$(CONFIG_SPARC32) += blockops.o</div><div class='ctx'> lib-y                 += memscan_$(BITS).o memcmp.o strncmp_$(BITS).o</div><div class='del'>-lib-y                 += strncpy_from_user_$(BITS).o strlen_user_$(BITS).o</div><div class='ctx'> lib-$(CONFIG_SPARC32) += divdi3.o udivdi3.o</div><div class='ctx'> lib-$(CONFIG_SPARC32) += copy_user.o locks.o</div><div class='del'>-lib-y                 += atomic_$(BITS).o</div><div class='add'>+lib-$(CONFIG_SPARC64) += atomic_64.o</div><div class='ctx'> lib-$(CONFIG_SPARC32) += lshrdi3.o ashldi3.o</div><div class='ctx'> lib-$(CONFIG_SPARC32) += muldi3.o bitext.o cmpdi2.o</div><div class='ctx'> </div><div class='hunk'>@@ -40,7 +39,7 @@ lib-$(CONFIG_SPARC64) += copy_in_user.o user_fixup.o memmove.o</div><div class='ctx'> lib-$(CONFIG_SPARC64) += mcount.o ipcsum.o xor.o hweight.o ffs.o</div><div class='ctx'> </div><div class='ctx'> obj-y                 += iomap.o</div><div class='del'>-obj-$(CONFIG_SPARC32) += atomic32.o</div><div class='add'>+obj-$(CONFIG_SPARC32) += atomic32.o ucmpdi2.o</div><div class='ctx'> obj-y                 += ksyms.o</div><div class='ctx'> obj-$(CONFIG_SPARC64) += PeeCeeI.o</div><div class='ctx'> obj-y                 += usercopy.o</div><div class='head'>diff --git a/arch/sparc/lib/ashldi3.S b/arch/sparc/lib/ashldi3.S<br/>index 17912e608716..86f60de07b0a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/ashldi3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/ashldi3.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/ashldi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/ashldi3.S</a></div><div class='hunk'>@@ -5,10 +5,10 @@</div><div class='ctx'>  * Copyright (C) 1999 David S. Miller (davem@redhat.com)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='ctx'> 	.text</div><div class='del'>-	.align	4</div><div class='del'>-	.globl	__ashldi3</div><div class='del'>-__ashldi3:</div><div class='add'>+ENTRY(__ashldi3)</div><div class='ctx'> 	cmp	%o2, 0</div><div class='ctx'> 	be	9f</div><div class='ctx'> 	 mov	0x20, %g2</div><div class='hunk'>@@ -32,3 +32,4 @@ __ashldi3:</div><div class='ctx'> 9:</div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='add'>+ENDPROC(__ashldi3)</div><div class='head'>diff --git a/arch/sparc/lib/ashrdi3.S b/arch/sparc/lib/ashrdi3.S<br/>index 85398fd6dcc9..6eb8ba2dd50e 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/ashrdi3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/ashrdi3.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/ashrdi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/ashrdi3.S</a></div><div class='hunk'>@@ -5,10 +5,10 @@</div><div class='ctx'>  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='ctx'> 	.text</div><div class='del'>-	.align	4</div><div class='del'>-	.globl __ashrdi3</div><div class='del'>-__ashrdi3:</div><div class='add'>+ENTRY(__ashrdi3)</div><div class='ctx'> 	tst	%o2</div><div class='ctx'> 	be	3f</div><div class='ctx'> 	 or	%g0, 32, %g2</div><div class='hunk'>@@ -34,3 +34,4 @@ __ashrdi3:</div><div class='ctx'> 3:</div><div class='ctx'> 	jmpl	%o7 + 8, %g0</div><div class='ctx'> 	 nop</div><div class='add'>+ENDPROC(__ashrdi3)</div><div class='head'>diff --git a/arch/sparc/lib/atomic_32.S b/arch/sparc/lib/atomic_32.S<br/>deleted file mode 100644<br/>index eb6c7359cbd1..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/atomic_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/atomic_32.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,44 +0,0 @@</div><div class='del'>-/* atomic.S: Move this stuff here for better ICACHE hit rates.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1996 David S. Miller (davem@caipfs.rutgers.edu)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/psr.h&gt;</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-	.align	4</div><div class='del'>-</div><div class='del'>-	.globl  __atomic_begin</div><div class='del'>-__atomic_begin:</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_SMP</div><div class='del'>-	.globl	___xchg32_sun4c</div><div class='del'>-___xchg32_sun4c:</div><div class='del'>-	rd	%psr, %g3</div><div class='del'>-	andcc	%g3, PSR_PIL, %g0</div><div class='del'>-	bne	1f</div><div class='del'>-	 nop</div><div class='del'>-	wr	%g3, PSR_PIL, %psr</div><div class='del'>-	nop; nop; nop</div><div class='del'>-1:</div><div class='del'>-	andcc	%g3, PSR_PIL, %g0</div><div class='del'>-	ld	[%g1], %g7</div><div class='del'>-	bne	1f</div><div class='del'>-	 st	%g2, [%g1]</div><div class='del'>-	wr	%g3, 0x0, %psr</div><div class='del'>-	nop; nop; nop</div><div class='del'>-1:</div><div class='del'>-	mov	%g7, %g2</div><div class='del'>-	jmpl	%o7 + 8, %g0</div><div class='del'>-	 mov	%g4, %o7</div><div class='del'>-</div><div class='del'>-	.globl	___xchg32_sun4md</div><div class='del'>-___xchg32_sun4md:</div><div class='del'>-	swap	[%g1], %g2</div><div class='del'>-	jmpl	%o7 + 8, %g0</div><div class='del'>-	 mov	%g4, %o7</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	.globl  __atomic_end</div><div class='del'>-__atomic_end:</div><div class='head'>diff --git a/arch/sparc/lib/atomic_64.S b/arch/sparc/lib/atomic_64.S<br/>index 59186e0fcf39..4d502da3de78 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/atomic_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/atomic_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/atomic_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/atomic_64.S</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/asi.h&gt;</div><div class='ctx'> #include &lt;asm/backoff.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -13,9 +14,7 @@</div><div class='ctx'> 	 * memory barriers, and a second which returns</div><div class='ctx'> 	 * a value and does the barriers.</div><div class='ctx'> 	 */</div><div class='del'>-	.globl	atomic_add</div><div class='del'>-	.type	atomic_add,#function</div><div class='del'>-atomic_add: /* %o0 = increment, %o1 = atomic_ptr */</div><div class='add'>+ENTRY(atomic_add) /* %o0 = increment, %o1 = atomic_ptr */</div><div class='ctx'> 	BACKOFF_SETUP(%o2)</div><div class='ctx'> 1:	lduw	[%o1], %g1</div><div class='ctx'> 	add	%g1, %o0, %g7</div><div class='hunk'>@@ -26,11 +25,9 @@ atomic_add: /* %o0 = increment, %o1 = atomic_ptr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='ctx'> 2:	BACKOFF_SPIN(%o2, %o3, 1b)</div><div class='del'>-	.size	atomic_add, .-atomic_add</div><div class='add'>+ENDPROC(atomic_add)</div><div class='ctx'> </div><div class='del'>-	.globl	atomic_sub</div><div class='del'>-	.type	atomic_sub,#function</div><div class='del'>-atomic_sub: /* %o0 = decrement, %o1 = atomic_ptr */</div><div class='add'>+ENTRY(atomic_sub) /* %o0 = decrement, %o1 = atomic_ptr */</div><div class='ctx'> 	BACKOFF_SETUP(%o2)</div><div class='ctx'> 1:	lduw	[%o1], %g1</div><div class='ctx'> 	sub	%g1, %o0, %g7</div><div class='hunk'>@@ -41,11 +38,9 @@ atomic_sub: /* %o0 = decrement, %o1 = atomic_ptr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='ctx'> 2:	BACKOFF_SPIN(%o2, %o3, 1b)</div><div class='del'>-	.size	atomic_sub, .-atomic_sub</div><div class='add'>+ENDPROC(atomic_sub)</div><div class='ctx'> </div><div class='del'>-	.globl	atomic_add_ret</div><div class='del'>-	.type	atomic_add_ret,#function</div><div class='del'>-atomic_add_ret: /* %o0 = increment, %o1 = atomic_ptr */</div><div class='add'>+ENTRY(atomic_add_ret) /* %o0 = increment, %o1 = atomic_ptr */</div><div class='ctx'> 	BACKOFF_SETUP(%o2)</div><div class='ctx'> 1:	lduw	[%o1], %g1</div><div class='ctx'> 	add	%g1, %o0, %g7</div><div class='hunk'>@@ -56,11 +51,9 @@ atomic_add_ret: /* %o0 = increment, %o1 = atomic_ptr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 sra	%g1, 0, %o0</div><div class='ctx'> 2:	BACKOFF_SPIN(%o2, %o3, 1b)</div><div class='del'>-	.size	atomic_add_ret, .-atomic_add_ret</div><div class='add'>+ENDPROC(atomic_add_ret)</div><div class='ctx'> </div><div class='del'>-	.globl	atomic_sub_ret</div><div class='del'>-	.type	atomic_sub_ret,#function</div><div class='del'>-atomic_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */</div><div class='add'>+ENTRY(atomic_sub_ret) /* %o0 = decrement, %o1 = atomic_ptr */</div><div class='ctx'> 	BACKOFF_SETUP(%o2)</div><div class='ctx'> 1:	lduw	[%o1], %g1</div><div class='ctx'> 	sub	%g1, %o0, %g7</div><div class='hunk'>@@ -71,11 +64,9 @@ atomic_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 sra	%g1, 0, %o0</div><div class='ctx'> 2:	BACKOFF_SPIN(%o2, %o3, 1b)</div><div class='del'>-	.size	atomic_sub_ret, .-atomic_sub_ret</div><div class='add'>+ENDPROC(atomic_sub_ret)</div><div class='ctx'> </div><div class='del'>-	.globl	atomic64_add</div><div class='del'>-	.type	atomic64_add,#function</div><div class='del'>-atomic64_add: /* %o0 = increment, %o1 = atomic_ptr */</div><div class='add'>+ENTRY(atomic64_add) /* %o0 = increment, %o1 = atomic_ptr */</div><div class='ctx'> 	BACKOFF_SETUP(%o2)</div><div class='ctx'> 1:	ldx	[%o1], %g1</div><div class='ctx'> 	add	%g1, %o0, %g7</div><div class='hunk'>@@ -86,11 +77,9 @@ atomic64_add: /* %o0 = increment, %o1 = atomic_ptr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='ctx'> 2:	BACKOFF_SPIN(%o2, %o3, 1b)</div><div class='del'>-	.size	atomic64_add, .-atomic64_add</div><div class='add'>+ENDPROC(atomic64_add)</div><div class='ctx'> </div><div class='del'>-	.globl	atomic64_sub</div><div class='del'>-	.type	atomic64_sub,#function</div><div class='del'>-atomic64_sub: /* %o0 = decrement, %o1 = atomic_ptr */</div><div class='add'>+ENTRY(atomic64_sub) /* %o0 = decrement, %o1 = atomic_ptr */</div><div class='ctx'> 	BACKOFF_SETUP(%o2)</div><div class='ctx'> 1:	ldx	[%o1], %g1</div><div class='ctx'> 	sub	%g1, %o0, %g7</div><div class='hunk'>@@ -101,11 +90,9 @@ atomic64_sub: /* %o0 = decrement, %o1 = atomic_ptr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='ctx'> 2:	BACKOFF_SPIN(%o2, %o3, 1b)</div><div class='del'>-	.size	atomic64_sub, .-atomic64_sub</div><div class='add'>+ENDPROC(atomic64_sub)</div><div class='ctx'> </div><div class='del'>-	.globl	atomic64_add_ret</div><div class='del'>-	.type	atomic64_add_ret,#function</div><div class='del'>-atomic64_add_ret: /* %o0 = increment, %o1 = atomic_ptr */</div><div class='add'>+ENTRY(atomic64_add_ret) /* %o0 = increment, %o1 = atomic_ptr */</div><div class='ctx'> 	BACKOFF_SETUP(%o2)</div><div class='ctx'> 1:	ldx	[%o1], %g1</div><div class='ctx'> 	add	%g1, %o0, %g7</div><div class='hunk'>@@ -116,11 +103,9 @@ atomic64_add_ret: /* %o0 = increment, %o1 = atomic_ptr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 add	%g1, %o0, %o0</div><div class='ctx'> 2:	BACKOFF_SPIN(%o2, %o3, 1b)</div><div class='del'>-	.size	atomic64_add_ret, .-atomic64_add_ret</div><div class='add'>+ENDPROC(atomic64_add_ret)</div><div class='ctx'> </div><div class='del'>-	.globl	atomic64_sub_ret</div><div class='del'>-	.type	atomic64_sub_ret,#function</div><div class='del'>-atomic64_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */</div><div class='add'>+ENTRY(atomic64_sub_ret) /* %o0 = decrement, %o1 = atomic_ptr */</div><div class='ctx'> 	BACKOFF_SETUP(%o2)</div><div class='ctx'> 1:	ldx	[%o1], %g1</div><div class='ctx'> 	sub	%g1, %o0, %g7</div><div class='hunk'>@@ -131,4 +116,4 @@ atomic64_sub_ret: /* %o0 = decrement, %o1 = atomic_ptr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 sub	%g1, %o0, %o0</div><div class='ctx'> 2:	BACKOFF_SPIN(%o2, %o3, 1b)</div><div class='del'>-	.size	atomic64_sub_ret, .-atomic64_sub_ret</div><div class='add'>+ENDPROC(atomic64_sub_ret)</div><div class='head'>diff --git a/arch/sparc/lib/bitops.S b/arch/sparc/lib/bitops.S<br/>index 3dc61d5537c0..36f72cc0e67e 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/bitops.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/bitops.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/bitops.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/bitops.S</a></div><div class='hunk'>@@ -3,14 +3,13 @@</div><div class='ctx'>  * Copyright (C) 2000, 2007 David S. Miller (davem@davemloft.net)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/asi.h&gt;</div><div class='ctx'> #include &lt;asm/backoff.h&gt;</div><div class='ctx'> </div><div class='ctx'> 	.text</div><div class='ctx'> </div><div class='del'>-	.globl	test_and_set_bit</div><div class='del'>-	.type	test_and_set_bit,#function</div><div class='del'>-test_and_set_bit:	/* %o0=nr, %o1=addr */</div><div class='add'>+ENTRY(test_and_set_bit)	/* %o0=nr, %o1=addr */</div><div class='ctx'> 	BACKOFF_SETUP(%o3)</div><div class='ctx'> 	srlx	%o0, 6, %g1</div><div class='ctx'> 	mov	1, %o2</div><div class='hunk'>@@ -29,11 +28,9 @@ test_and_set_bit:	/* %o0=nr, %o1=addr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='ctx'> 2:	BACKOFF_SPIN(%o3, %o4, 1b)</div><div class='del'>-	.size	test_and_set_bit, .-test_and_set_bit</div><div class='add'>+ENDPROC(test_and_set_bit)</div><div class='ctx'> </div><div class='del'>-	.globl	test_and_clear_bit</div><div class='del'>-	.type	test_and_clear_bit,#function</div><div class='del'>-test_and_clear_bit:	/* %o0=nr, %o1=addr */</div><div class='add'>+ENTRY(test_and_clear_bit) /* %o0=nr, %o1=addr */</div><div class='ctx'> 	BACKOFF_SETUP(%o3)</div><div class='ctx'> 	srlx	%o0, 6, %g1</div><div class='ctx'> 	mov	1, %o2</div><div class='hunk'>@@ -52,11 +49,9 @@ test_and_clear_bit:	/* %o0=nr, %o1=addr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='ctx'> 2:	BACKOFF_SPIN(%o3, %o4, 1b)</div><div class='del'>-	.size	test_and_clear_bit, .-test_and_clear_bit</div><div class='add'>+ENDPROC(test_and_clear_bit)</div><div class='ctx'> </div><div class='del'>-	.globl	test_and_change_bit</div><div class='del'>-	.type	test_and_change_bit,#function</div><div class='del'>-test_and_change_bit:	/* %o0=nr, %o1=addr */</div><div class='add'>+ENTRY(test_and_change_bit) /* %o0=nr, %o1=addr */</div><div class='ctx'> 	BACKOFF_SETUP(%o3)</div><div class='ctx'> 	srlx	%o0, 6, %g1</div><div class='ctx'> 	mov	1, %o2</div><div class='hunk'>@@ -75,11 +70,9 @@ test_and_change_bit:	/* %o0=nr, %o1=addr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='ctx'> 2:	BACKOFF_SPIN(%o3, %o4, 1b)</div><div class='del'>-	.size	test_and_change_bit, .-test_and_change_bit</div><div class='add'>+ENDPROC(test_and_change_bit)</div><div class='ctx'> </div><div class='del'>-	.globl	set_bit</div><div class='del'>-	.type	set_bit,#function</div><div class='del'>-set_bit:		/* %o0=nr, %o1=addr */</div><div class='add'>+ENTRY(set_bit) /* %o0=nr, %o1=addr */</div><div class='ctx'> 	BACKOFF_SETUP(%o3)</div><div class='ctx'> 	srlx	%o0, 6, %g1</div><div class='ctx'> 	mov	1, %o2</div><div class='hunk'>@@ -96,11 +89,9 @@ set_bit:		/* %o0=nr, %o1=addr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='ctx'> 2:	BACKOFF_SPIN(%o3, %o4, 1b)</div><div class='del'>-	.size	set_bit, .-set_bit</div><div class='add'>+ENDPROC(set_bit)</div><div class='ctx'> </div><div class='del'>-	.globl	clear_bit</div><div class='del'>-	.type	clear_bit,#function</div><div class='del'>-clear_bit:		/* %o0=nr, %o1=addr */</div><div class='add'>+ENTRY(clear_bit) /* %o0=nr, %o1=addr */</div><div class='ctx'> 	BACKOFF_SETUP(%o3)</div><div class='ctx'> 	srlx	%o0, 6, %g1</div><div class='ctx'> 	mov	1, %o2</div><div class='hunk'>@@ -117,11 +108,9 @@ clear_bit:		/* %o0=nr, %o1=addr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='ctx'> 2:	BACKOFF_SPIN(%o3, %o4, 1b)</div><div class='del'>-	.size	clear_bit, .-clear_bit</div><div class='add'>+ENDPROC(clear_bit)</div><div class='ctx'> </div><div class='del'>-	.globl	change_bit</div><div class='del'>-	.type	change_bit,#function</div><div class='del'>-change_bit:		/* %o0=nr, %o1=addr */</div><div class='add'>+ENTRY(change_bit) /* %o0=nr, %o1=addr */</div><div class='ctx'> 	BACKOFF_SETUP(%o3)</div><div class='ctx'> 	srlx	%o0, 6, %g1</div><div class='ctx'> 	mov	1, %o2</div><div class='hunk'>@@ -138,4 +127,4 @@ change_bit:		/* %o0=nr, %o1=addr */</div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='ctx'> 2:	BACKOFF_SPIN(%o3, %o4, 1b)</div><div class='del'>-	.size	change_bit, .-change_bit</div><div class='add'>+ENDPROC(change_bit)</div><div class='head'>diff --git a/arch/sparc/lib/blockops.S b/arch/sparc/lib/blockops.S<br/>index 804be87f9a42..3c771011ff4b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/blockops.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/blockops.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/blockops.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/blockops.S</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> 	/* Zero out 64 bytes of memory at (buf + offset).</div><div class='hunk'>@@ -44,10 +45,7 @@</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	.text</div><div class='del'>-	.align	4</div><div class='del'>-	.globl	bzero_1page, __copy_1page</div><div class='del'>-</div><div class='del'>-bzero_1page:</div><div class='add'>+ENTRY(bzero_1page)</div><div class='ctx'> /* NOTE: If you change the number of insns of this routine, please check</div><div class='ctx'>  * arch/sparc/mm/hypersparc.S */</div><div class='ctx'> 	/* %o0 = buf */</div><div class='hunk'>@@ -65,8 +63,9 @@ bzero_1page:</div><div class='ctx'> </div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='add'>+ENDPROC(bzero_1page)</div><div class='ctx'> </div><div class='del'>-__copy_1page:</div><div class='add'>+ENTRY(__copy_1page)</div><div class='ctx'> /* NOTE: If you change the number of insns of this routine, please check</div><div class='ctx'>  * arch/sparc/mm/hypersparc.S */</div><div class='ctx'> 	/* %o0 = dst, %o1 = src */</div><div class='hunk'>@@ -87,3 +86,4 @@ __copy_1page:</div><div class='ctx'> </div><div class='ctx'> 	retl</div><div class='ctx'> 	 nop</div><div class='add'>+ENDPROC(__copy_1page)</div><div class='head'>diff --git a/arch/sparc/lib/bzero.S b/arch/sparc/lib/bzero.S<br/>index 615f401edf69..8c058114b649 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/bzero.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/bzero.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/bzero.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/bzero.S</a></div><div class='hunk'>@@ -4,11 +4,11 @@</div><div class='ctx'>  * Copyright (C) 2005 David S. Miller &lt;davem@davemloft.net&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='ctx'> 	.text</div><div class='ctx'> </div><div class='del'>-	.globl	memset</div><div class='del'>-	.type	memset, #function</div><div class='del'>-memset:			/* %o0=buf, %o1=pat, %o2=len */</div><div class='add'>+ENTRY(memset) /* %o0=buf, %o1=pat, %o2=len */</div><div class='ctx'> 	and		%o1, 0xff, %o3</div><div class='ctx'> 	mov		%o2, %o1</div><div class='ctx'> 	sllx		%o3, 8, %g1</div><div class='hunk'>@@ -19,9 +19,7 @@ memset:			/* %o0=buf, %o1=pat, %o2=len */</div><div class='ctx'> 	ba,pt		%xcc, 1f</div><div class='ctx'> 	 or		%g1, %o2, %o2</div><div class='ctx'> </div><div class='del'>-	.globl	__bzero</div><div class='del'>-	.type	__bzero, #function</div><div class='del'>-__bzero:		/* %o0=buf, %o1=len */</div><div class='add'>+ENTRY(__bzero) /* %o0=buf, %o1=len */</div><div class='ctx'> 	clr		%o2</div><div class='ctx'> 1:	mov		%o0, %o3</div><div class='ctx'> 	brz,pn		%o1, __bzero_done</div><div class='hunk'>@@ -78,8 +76,8 @@ __bzero_tiny:</div><div class='ctx'> __bzero_done:</div><div class='ctx'> 	retl</div><div class='ctx'> 	 mov		%o3, %o0</div><div class='del'>-	.size		__bzero, .-__bzero</div><div class='del'>-	.size		memset, .-memset</div><div class='add'>+ENDPROC(__bzero)</div><div class='add'>+ENDPROC(memset)</div><div class='ctx'> </div><div class='ctx'> #define EX_ST(x,y)		\</div><div class='ctx'> 98:	x,y;			\</div><div class='hunk'>@@ -89,9 +87,7 @@ __bzero_done:</div><div class='ctx'> 	.text;			\</div><div class='ctx'> 	.align 4;</div><div class='ctx'> </div><div class='del'>-	.globl	__clear_user</div><div class='del'>-	.type	__clear_user, #function</div><div class='del'>-__clear_user:		/* %o0=buf, %o1=len */</div><div class='add'>+ENTRY(__clear_user) /* %o0=buf, %o1=len */</div><div class='ctx'> 	brz,pn		%o1, __clear_user_done</div><div class='ctx'> 	 cmp		%o1, 16</div><div class='ctx'> 	bl,pn		%icc, __clear_user_tiny</div><div class='hunk'>@@ -146,4 +142,4 @@ __clear_user_tiny:</div><div class='ctx'> __clear_user_done:</div><div class='ctx'> 	retl</div><div class='ctx'> 	 clr		%o0</div><div class='del'>-	.size		__clear_user, .-__clear_user</div><div class='add'>+ENDPROC(__clear_user)</div><div class='head'>diff --git a/arch/sparc/lib/divdi3.S b/arch/sparc/lib/divdi3.S<br/>index d74bc0925f2d..9614b48b6ef8 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/divdi3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/divdi3.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/divdi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/divdi3.S</a></div><div class='hunk'>@@ -19,7 +19,6 @@ Boston, MA 02111-1307, USA.  */</div><div class='ctx'> </div><div class='ctx'> 	.text</div><div class='ctx'> 	.align 4</div><div class='del'>-	.global .udiv</div><div class='ctx'> 	.globl __divdi3</div><div class='ctx'> __divdi3:</div><div class='ctx'> 	save %sp,-104,%sp</div><div class='hunk'>@@ -83,8 +82,9 @@ __divdi3:</div><div class='ctx'> 	bne .LL85</div><div class='ctx'> 	mov %i0,%o2</div><div class='ctx'> 	mov 1,%o0</div><div class='del'>-	call .udiv,0</div><div class='ctx'> 	mov 0,%o1</div><div class='add'>+	wr %g0, 0, %y</div><div class='add'>+	udiv %o0, %o1, %o0</div><div class='ctx'> 	mov %o0,%o4</div><div class='ctx'> 	mov %i0,%o2</div><div class='ctx'> .LL85:</div><div class='head'>diff --git a/arch/sparc/lib/ipcsum.S b/arch/sparc/lib/ipcsum.S<br/>index 58ca5b9a8778..4742d59029ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/ipcsum.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/ipcsum.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/ipcsum.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/ipcsum.S</a></div><div class='hunk'>@@ -1,8 +1,7 @@</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='ctx'> 	.text</div><div class='del'>-	.align	32</div><div class='del'>-	.globl	ip_fast_csum</div><div class='del'>-	.type	ip_fast_csum,#function</div><div class='del'>-ip_fast_csum:	/* %o0 = iph, %o1 = ihl */</div><div class='add'>+ENTRY(ip_fast_csum) /* %o0 = iph, %o1 = ihl */</div><div class='ctx'> 	sub	%o1, 4, %g7</div><div class='ctx'> 	lduw	[%o0 + 0x00], %o2</div><div class='ctx'> 	lduw	[%o0 + 0x04], %g2</div><div class='hunk'>@@ -31,4 +30,4 @@ ip_fast_csum:	/* %o0 = iph, %o1 = ihl */</div><div class='ctx'> 	set	0xffff, %o1</div><div class='ctx'> 	retl</div><div class='ctx'> 	 and	%o2, %o1, %o0</div><div class='del'>-	.size	ip_fast_csum, .-ip_fast_csum</div><div class='add'>+ENDPROC(ip_fast_csum)</div><div class='head'>diff --git a/arch/sparc/lib/ksyms.c b/arch/sparc/lib/ksyms.c<br/>index f73c2240fe60..3b31218cafc6 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/ksyms.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/ksyms.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/ksyms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/ksyms.c</a></div><div class='hunk'>@@ -15,8 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> /* string functions */</div><div class='ctx'> EXPORT_SYMBOL(strlen);</div><div class='del'>-EXPORT_SYMBOL(__strlen_user);</div><div class='del'>-EXPORT_SYMBOL(__strnlen_user);</div><div class='ctx'> EXPORT_SYMBOL(strncmp);</div><div class='ctx'> </div><div class='ctx'> /* mem* functions */</div><div class='hunk'>@@ -33,9 +31,6 @@ EXPORT_SYMBOL(memset);</div><div class='ctx'> EXPORT_SYMBOL(memmove);</div><div class='ctx'> EXPORT_SYMBOL(__bzero);</div><div class='ctx'> </div><div class='del'>-/* Moving data to/from/in userspace. */</div><div class='del'>-EXPORT_SYMBOL(__strncpy_from_user);</div><div class='del'>-</div><div class='ctx'> /* Networking helper routines. */</div><div class='ctx'> EXPORT_SYMBOL(csum_partial);</div><div class='ctx'> </div><div class='hunk'>@@ -56,23 +51,11 @@ extern int __divdi3(int, int);</div><div class='ctx'> extern void (*__copy_1page)(void *, const void *);</div><div class='ctx'> extern void (*bzero_1page)(void *);</div><div class='ctx'> </div><div class='del'>-extern int __strncmp(const char *, const char *, __kernel_size_t);</div><div class='del'>-</div><div class='ctx'> extern void ___rw_read_enter(void);</div><div class='ctx'> extern void ___rw_read_try(void);</div><div class='ctx'> extern void ___rw_read_exit(void);</div><div class='ctx'> extern void ___rw_write_enter(void);</div><div class='ctx'> </div><div class='del'>-/* Alias functions whose names begin with "." and export the aliases.</div><div class='del'>- * The module references will be fixed up by module_frob_arch_sections.</div><div class='del'>- */</div><div class='del'>-extern int _Div(int, int);</div><div class='del'>-extern int _Mul(int, int);</div><div class='del'>-extern int _Rem(int, int);</div><div class='del'>-extern unsigned _Udiv(unsigned, unsigned);</div><div class='del'>-extern unsigned _Umul(unsigned, unsigned);</div><div class='del'>-extern unsigned _Urem(unsigned, unsigned);</div><div class='del'>-</div><div class='ctx'> /* Networking helper routines. */</div><div class='ctx'> EXPORT_SYMBOL(__csum_partial_copy_sparc_generic);</div><div class='ctx'> </div><div class='hunk'>@@ -81,9 +64,6 @@ EXPORT_SYMBOL(__copy_1page);</div><div class='ctx'> EXPORT_SYMBOL(__memmove);</div><div class='ctx'> EXPORT_SYMBOL(bzero_1page);</div><div class='ctx'> </div><div class='del'>-/* string functions */</div><div class='del'>-EXPORT_SYMBOL(__strncmp);</div><div class='del'>-</div><div class='ctx'> /* Moving data to/from/in userspace. */</div><div class='ctx'> EXPORT_SYMBOL(__copy_user);</div><div class='ctx'> </div><div class='hunk'>@@ -100,13 +80,6 @@ EXPORT_SYMBOL(__ashldi3);</div><div class='ctx'> EXPORT_SYMBOL(__lshrdi3);</div><div class='ctx'> EXPORT_SYMBOL(__muldi3);</div><div class='ctx'> EXPORT_SYMBOL(__divdi3);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(_Rem);</div><div class='del'>-EXPORT_SYMBOL(_Urem);</div><div class='del'>-EXPORT_SYMBOL(_Mul);</div><div class='del'>-EXPORT_SYMBOL(_Umul);</div><div class='del'>-EXPORT_SYMBOL(_Div);</div><div class='del'>-EXPORT_SYMBOL(_Udiv);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/sparc/lib/lshrdi3.S b/arch/sparc/lib/lshrdi3.S<br/>index 47a1354c1602..60ebc7cdbee0 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/lshrdi3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/lshrdi3.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/lshrdi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/lshrdi3.S</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='ctx'> </div><div class='del'>-	.globl	__lshrdi3</div><div class='del'>-__lshrdi3:</div><div class='add'>+ENTRY(__lshrdi3)</div><div class='ctx'> 	cmp	%o2, 0</div><div class='ctx'> 	be	3f</div><div class='ctx'> 	 mov	0x20, %g2</div><div class='hunk'>@@ -24,3 +24,4 @@ __lshrdi3:</div><div class='ctx'> 3:</div><div class='ctx'> 	retl </div><div class='ctx'> 	 nop </div><div class='add'>+ENDPROC(__lshrdi3)</div><div class='head'>diff --git a/arch/sparc/lib/memmove.S b/arch/sparc/lib/memmove.S<br/>index 97395802c23c..b7f6334e159f 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/memmove.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/memmove.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/memmove.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/memmove.S</a></div><div class='hunk'>@@ -4,11 +4,10 @@</div><div class='ctx'>  * Copyright (C) 1996, 1997, 1998, 1999 Jakub Jelinek (jj@ultra.linux.cz)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='ctx'> 	.text</div><div class='del'>-	.align		32</div><div class='del'>-	.globl		memmove</div><div class='del'>-	.type		memmove,#function</div><div class='del'>-memmove:		/* o0=dst o1=src o2=len */</div><div class='add'>+ENTRY(memmove) /* o0=dst o1=src o2=len */</div><div class='ctx'> 	mov		%o0, %g1</div><div class='ctx'> 	cmp		%o0, %o1</div><div class='ctx'> 	bleu,pt		%xcc, memcpy</div><div class='hunk'>@@ -28,4 +27,4 @@ memmove:		/* o0=dst o1=src o2=len */</div><div class='ctx'> </div><div class='ctx'> 	retl</div><div class='ctx'> 	 mov		%g1, %o0</div><div class='del'>-	.size		memmove, .-memmove</div><div class='add'>+ENDPROC(memmove)</div><div class='head'>diff --git a/arch/sparc/lib/mul.S b/arch/sparc/lib/mul.S<br/>deleted file mode 100644<br/>index c45470d0b0ce..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/mul.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/mul.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,137 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * mul.S:       This routine was taken from glibc-1.09 and is covered</div><div class='del'>- *              by the GNU Library General Public License Version 2.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Signed multiply, from Appendix E of the Sparc Version 8</div><div class='del'>- * Architecture Manual.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Returns %o0 * %o1 in %o1%o0 (i.e., %o1 holds the upper 32 bits of</div><div class='del'>- * the 64-bit product).</div><div class='del'>- *</div><div class='del'>- * This code optimizes short (less than 13-bit) multiplies.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-	.globl .mul</div><div class='del'>-	.globl _Mul</div><div class='del'>-.mul:</div><div class='del'>-_Mul:	/* needed for export */</div><div class='del'>-	mov	%o0, %y		! multiplier -&gt; Y</div><div class='del'>-	andncc	%o0, 0xfff, %g0	! test bits 12..31</div><div class='del'>-	be	Lmul_shortway	! if zero, can do it the short way</div><div class='del'>-	 andcc	%g0, %g0, %o4	! zero the partial product and clear N and V</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Long multiply.  32 steps, followed by a final shift step.</div><div class='del'>-	 */</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 1</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 2</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 3</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 4</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 5</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 6</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 7</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 8</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 9</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 10</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 11</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 12</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 13</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 14</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 15</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 16</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 17</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 18</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 19</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 20</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 21</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 22</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 23</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 24</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 25</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 26</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 27</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 28</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 29</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 30</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 31</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 32</div><div class='del'>-	mulscc	%o4, %g0, %o4	! final shift</div><div class='del'>-</div><div class='del'>-	! If %o0 was negative, the result is</div><div class='del'>-	!	(%o0 * %o1) + (%o1 &lt;&lt; 32))</div><div class='del'>-	! We fix that here.</div><div class='del'>-</div><div class='del'>-#if 0</div><div class='del'>-	tst	%o0</div><div class='del'>-	bge	1f</div><div class='del'>-	 rd	%y, %o0</div><div class='del'>-</div><div class='del'>-	! %o0 was indeed negative; fix upper 32 bits of result by subtracting </div><div class='del'>-	! %o1 (i.e., return %o4 - %o1 in %o1).</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o4, %o1, %o1</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	retl</div><div class='del'>-	 mov	%o4, %o1</div><div class='del'>-#else</div><div class='del'>-	/* Faster code adapted from tege@sics.se's code for umul.S.  */</div><div class='del'>-	sra	%o0, 31, %o2	! make mask from sign bit</div><div class='del'>-	and	%o1, %o2, %o2	! %o2 = 0 or %o1, depending on sign of %o0</div><div class='del'>-	rd	%y, %o0		! get lower half of product</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o4, %o2, %o1	! subtract compensation </div><div class='del'>-				!  and put upper half in place</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-Lmul_shortway:</div><div class='del'>-	/*</div><div class='del'>-	 * Short multiply.  12 steps, followed by a final shift step.</div><div class='del'>-	 * The resulting bits are off by 12 and (32-12) = 20 bit positions,</div><div class='del'>-	 * but there is no problem with %o0 being negative (unlike above).</div><div class='del'>-	 */</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 1</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 2</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 3</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 4</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 5</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 6</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 7</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 8</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 9</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 10</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 11</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 12</div><div class='del'>-	mulscc	%o4, %g0, %o4	! final shift</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *  %o4 has 20 of the bits that should be in the low part of the</div><div class='del'>-	 * result; %y has the bottom 12 (as %y's top 12).  That is:</div><div class='del'>-	 *</div><div class='del'>-	 *	  %o4		    %y</div><div class='del'>-	 * +----------------+----------------+</div><div class='del'>-	 * | -12- |   -20-  | -12- |   -20-  |</div><div class='del'>-	 * +------(---------+------)---------+</div><div class='del'>-	 *  --hi-- ----low-part----</div><div class='del'>-	 *</div><div class='del'>-	 * The upper 12 bits of %o4 should be sign-extended to form the</div><div class='del'>-	 * high part of the product (i.e., highpart = %o4 &gt;&gt; 20).</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	rd	%y, %o5</div><div class='del'>-	sll	%o4, 12, %o0	! shift middle bits left 12</div><div class='del'>-	srl	%o5, 20, %o5	! shift low bits right 20, zero fill at left</div><div class='del'>-	or	%o5, %o0, %o0	! construct low part of result</div><div class='del'>-	retl</div><div class='del'>-	 sra	%o4, 20, %o1	! ... and extract high part of result</div><div class='del'>-</div><div class='del'>-	.globl	.mul_patch</div><div class='del'>-.mul_patch:</div><div class='del'>-	smul	%o0, %o1, %o0</div><div class='del'>-	retl</div><div class='del'>-	 rd	%y, %o1</div><div class='del'>-	nop</div><div class='head'>diff --git a/arch/sparc/lib/muldi3.S b/arch/sparc/lib/muldi3.S<br/>index 7f17872d0603..9794939d1c12 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/muldi3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/muldi3.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/muldi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/muldi3.S</a></div><div class='hunk'>@@ -63,12 +63,12 @@ __muldi3:</div><div class='ctx'> 	rd  %y, %o1</div><div class='ctx'> 	mov  %o1, %l3</div><div class='ctx'> 	mov  %i1, %o0</div><div class='del'>-	call  .umul</div><div class='ctx'> 	mov  %i2, %o1</div><div class='add'>+	umul %o0, %o1, %o0</div><div class='ctx'> 	mov  %o0, %l0</div><div class='ctx'> 	mov  %i0, %o0</div><div class='del'>-	call  .umul</div><div class='ctx'> 	mov  %i3, %o1</div><div class='add'>+	umul %o0, %o1, %o0</div><div class='ctx'> 	add  %l0, %o0, %l0</div><div class='ctx'> 	mov  %l2, %i0</div><div class='ctx'> 	add  %l2, %l0, %i0</div><div class='head'>diff --git a/arch/sparc/lib/rem.S b/arch/sparc/lib/rem.S<br/>deleted file mode 100644<br/>index 42fb86252815..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/rem.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/rem.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,384 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * rem.S:       This routine was taken from glibc-1.09 and is covered</div><div class='del'>- *              by the GNU Library General Public License Version 2.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* This file is generated from divrem.m4; DO NOT EDIT! */</div><div class='del'>-/*</div><div class='del'>- * Division and remainder, from Appendix E of the Sparc Version 8</div><div class='del'>- * Architecture Manual, with fixes from Gordon Irlam.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Input: dividend and divisor in %o0 and %o1 respectively.</div><div class='del'>- *</div><div class='del'>- * m4 parameters:</div><div class='del'>- *  .rem	name of function to generate</div><div class='del'>- *  rem		rem=div =&gt; %o0 / %o1; rem=rem =&gt; %o0 % %o1</div><div class='del'>- *  true		true=true =&gt; signed; true=false =&gt; unsigned</div><div class='del'>- *</div><div class='del'>- * Algorithm parameters:</div><div class='del'>- *  N		how many bits per iteration we try to get (4)</div><div class='del'>- *  WORDSIZE	total number of bits (32)</div><div class='del'>- *</div><div class='del'>- * Derived constants:</div><div class='del'>- *  TOPBITS	number of bits in the top decade of a number</div><div class='del'>- *</div><div class='del'>- * Important variables:</div><div class='del'>- *  Q		the partial quotient under development (initially 0)</div><div class='del'>- *  R		the remainder so far, initially the dividend</div><div class='del'>- *  ITER	number of main division loop iterations required;</div><div class='del'>- *		equal to ceil(log2(quotient) / N).  Note that this</div><div class='del'>- *		is the log base (2^N) of the quotient.</div><div class='del'>- *  V		the current comparand, initially divisor*2^(ITER*N-1)</div><div class='del'>- *</div><div class='del'>- * Cost:</div><div class='del'>- *  Current estimate for non-large dividend is</div><div class='del'>- *	ceil(log2(quotient) / N) * (10 + 7N/2) + C</div><div class='del'>- *  A large dividend is one greater than 2^(31-TOPBITS) and takes a</div><div class='del'>- *  different path, as the upper bits of the quotient must be developed</div><div class='del'>- *  one bit at a time.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	.globl .rem</div><div class='del'>-	.globl _Rem</div><div class='del'>-.rem:</div><div class='del'>-_Rem:	/* needed for export */</div><div class='del'>-	! compute sign of result; if neither is negative, no problem</div><div class='del'>-	orcc	%o1, %o0, %g0	! either negative?</div><div class='del'>-	bge	2f			! no, go do the divide</div><div class='del'>-	 mov	%o0, %g2	! compute sign in any case</div><div class='del'>-</div><div class='del'>-	tst	%o1</div><div class='del'>-	bge	1f</div><div class='del'>-	 tst	%o0</div><div class='del'>-	! %o1 is definitely negative; %o0 might also be negative</div><div class='del'>-	bge	2f			! if %o0 not negative...</div><div class='del'>-	 sub	%g0, %o1, %o1	! in any case, make %o1 nonneg</div><div class='del'>-1:	! %o0 is negative, %o1 is nonnegative</div><div class='del'>-	sub	%g0, %o0, %o0	! make %o0 nonnegative</div><div class='del'>-2:</div><div class='del'>-</div><div class='del'>-	! Ready to divide.  Compute size of quotient; scale comparand.</div><div class='del'>-	orcc	%o1, %g0, %o5</div><div class='del'>-	bne	1f</div><div class='del'>-	 mov	%o0, %o3</div><div class='del'>-</div><div class='del'>-		! Divide by zero trap.  If it returns, return 0 (about as</div><div class='del'>-		! wrong as possible, but that is what SunOS does...).</div><div class='del'>-		ta	ST_DIV0</div><div class='del'>-		retl</div><div class='del'>-		 clr	%o0</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	cmp	%o3, %o5			! if %o1 exceeds %o0, done</div><div class='del'>-	blu	Lgot_result		! (and algorithm fails otherwise)</div><div class='del'>-	 clr	%o2</div><div class='del'>-</div><div class='del'>-	sethi	%hi(1 &lt;&lt; (32 - 4 - 1)), %g1</div><div class='del'>-</div><div class='del'>-	cmp	%o3, %g1</div><div class='del'>-	blu	Lnot_really_big</div><div class='del'>-	 clr	%o4</div><div class='del'>-</div><div class='del'>-	! Here the dividend is &gt;= 2**(31-N) or so.  We must be careful here,</div><div class='del'>-	! as our usual N-at-a-shot divide step will cause overflow and havoc.</div><div class='del'>-	! The number of bits in the result here is N*ITER+SC, where SC &lt;= N.</div><div class='del'>-	! Compute ITER in an unorthodox manner: know we need to shift V into</div><div class='del'>-	! the top decade: so do not even bother to compare to R.</div><div class='del'>-	1:</div><div class='del'>-		cmp	%o5, %g1</div><div class='del'>-		bgeu	3f</div><div class='del'>-		 mov	1, %g7</div><div class='del'>-</div><div class='del'>-		sll	%o5, 4, %o5</div><div class='del'>-</div><div class='del'>-		b	1b</div><div class='del'>-		 add	%o4, 1, %o4</div><div class='del'>-</div><div class='del'>-	! Now compute %g7.</div><div class='del'>-	2:</div><div class='del'>-		addcc	%o5, %o5, %o5</div><div class='del'>-</div><div class='del'>-		bcc	Lnot_too_big</div><div class='del'>-		 add	%g7, 1, %g7</div><div class='del'>-</div><div class='del'>-		! We get here if the %o1 overflowed while shifting.</div><div class='del'>-		! This means that %o3 has the high-order bit set.</div><div class='del'>-		! Restore %o5 and subtract from %o3.</div><div class='del'>-		sll	%g1, 4, %g1	! high order bit</div><div class='del'>-		srl	%o5, 1, %o5		! rest of %o5</div><div class='del'>-		add	%o5, %g1, %o5</div><div class='del'>-</div><div class='del'>-		b	Ldo_single_div</div><div class='del'>-		 sub	%g7, 1, %g7</div><div class='del'>-</div><div class='del'>-	Lnot_too_big:</div><div class='del'>-	3:</div><div class='del'>-		cmp	%o5, %o3</div><div class='del'>-		blu	2b</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-		be	Ldo_single_div</div><div class='del'>-		 nop</div><div class='del'>-	/* NB: these are commented out in the V8-Sparc manual as well */</div><div class='del'>-	/* (I do not understand this) */</div><div class='del'>-	! %o5 &gt; %o3: went too far: back up 1 step</div><div class='del'>-	!	srl	%o5, 1, %o5</div><div class='del'>-	!	dec	%g7</div><div class='del'>-	! do single-bit divide steps</div><div class='del'>-	!</div><div class='del'>-	! We have to be careful here.  We know that %o3 &gt;= %o5, so we can do the</div><div class='del'>-	! first divide step without thinking.  BUT, the others are conditional,</div><div class='del'>-	! and are only done if %o3 &gt;= 0.  Because both %o3 and %o5 may have the high-</div><div class='del'>-	! order bit set in the first step, just falling into the regular</div><div class='del'>-	! division loop will mess up the first time around.</div><div class='del'>-	! So we unroll slightly...</div><div class='del'>-	Ldo_single_div:</div><div class='del'>-		subcc	%g7, 1, %g7</div><div class='del'>-		bl	Lend_regular_divide</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-		sub	%o3, %o5, %o3</div><div class='del'>-		mov	1, %o2</div><div class='del'>-</div><div class='del'>-		b	Lend_single_divloop</div><div class='del'>-		 nop</div><div class='del'>-	Lsingle_divloop:</div><div class='del'>-		sll	%o2, 1, %o2</div><div class='del'>-</div><div class='del'>-		bl	1f</div><div class='del'>-		 srl	%o5, 1, %o5</div><div class='del'>-		! %o3 &gt;= 0</div><div class='del'>-		sub	%o3, %o5, %o3</div><div class='del'>-</div><div class='del'>-		b	2f</div><div class='del'>-		 add	%o2, 1, %o2</div><div class='del'>-	1:	! %o3 &lt; 0</div><div class='del'>-		add	%o3, %o5, %o3</div><div class='del'>-		sub	%o2, 1, %o2</div><div class='del'>-	2:</div><div class='del'>-	Lend_single_divloop:</div><div class='del'>-		subcc	%g7, 1, %g7</div><div class='del'>-		bge	Lsingle_divloop</div><div class='del'>-		 tst	%o3</div><div class='del'>-</div><div class='del'>-		b,a	Lend_regular_divide</div><div class='del'>-</div><div class='del'>-Lnot_really_big:</div><div class='del'>-1:</div><div class='del'>-	sll	%o5, 4, %o5</div><div class='del'>-	cmp	%o5, %o3</div><div class='del'>-	bleu	1b</div><div class='del'>-	 addcc	%o4, 1, %o4</div><div class='del'>-	be	Lgot_result</div><div class='del'>-	 sub	%o4, 1, %o4</div><div class='del'>-</div><div class='del'>-	tst	%o3	! set up for initial iteration</div><div class='del'>-Ldivloop:</div><div class='del'>-	sll	%o2, 4, %o2</div><div class='del'>-		! depth 1, accumulated bits 0</div><div class='del'>-	bl	L.1.16</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 2, accumulated bits 1</div><div class='del'>-	bl	L.2.17</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits 3</div><div class='del'>-	bl	L.3.19</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 7</div><div class='del'>-	bl	L.4.23</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (7*2+1), %o2</div><div class='del'>-	</div><div class='del'>-L.4.23:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (7*2-1), %o2</div><div class='del'>-	</div><div class='del'>-L.3.19:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 5</div><div class='del'>-	bl	L.4.21</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (5*2+1), %o2</div><div class='del'>-	</div><div class='del'>-L.4.21:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (5*2-1), %o2</div><div class='del'>-	</div><div class='del'>-L.2.17:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits 1</div><div class='del'>-	bl	L.3.17</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 3</div><div class='del'>-	bl	L.4.19</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (3*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.19:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (3*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.17:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 1</div><div class='del'>-	bl	L.4.17</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (1*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.17:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (1*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.1.16:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 2, accumulated bits -1</div><div class='del'>-	bl	L.2.15</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits -1</div><div class='del'>-	bl	L.3.15</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -1</div><div class='del'>-	bl	L.4.15</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-1*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.15:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-1*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.15:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -3</div><div class='del'>-	bl	L.4.13</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-3*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.13:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-3*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.2.15:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits -3</div><div class='del'>-	bl	L.3.13</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -5</div><div class='del'>-	bl	L.4.11</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-5*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.11:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-5*2-1), %o2</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-L.3.13:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -7</div><div class='del'>-	bl	L.4.9</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-7*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.9:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-7*2-1), %o2</div><div class='del'>-</div><div class='del'>-	9:</div><div class='del'>-Lend_regular_divide:</div><div class='del'>-	subcc	%o4, 1, %o4</div><div class='del'>-	bge	Ldivloop</div><div class='del'>-	 tst	%o3</div><div class='del'>-</div><div class='del'>-	bl,a	Lgot_result</div><div class='del'>-	! non-restoring fixup here (one instruction only!)</div><div class='del'>-	add	%o3, %o1, %o3</div><div class='del'>-</div><div class='del'>-Lgot_result:</div><div class='del'>-	! check to see if answer should be &lt; 0</div><div class='del'>-	tst	%g2</div><div class='del'>-	bl,a	1f</div><div class='del'>-	 sub %g0, %o3, %o3</div><div class='del'>-1:</div><div class='del'>-	retl</div><div class='del'>-	 mov %o3, %o0</div><div class='del'>-</div><div class='del'>-	.globl	.rem_patch</div><div class='del'>-.rem_patch:</div><div class='del'>-	sra	%o0, 0x1f, %o4</div><div class='del'>-	wr	%o4, 0x0, %y</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	sdivcc	%o0, %o1, %o2</div><div class='del'>-	bvs,a	1f</div><div class='del'>-	 xnor	%o2, %g0, %o2</div><div class='del'>-1:	smul	%o2, %o1, %o2</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o0, %o2, %o0</div><div class='del'>-	nop</div><div class='head'>diff --git a/arch/sparc/lib/sdiv.S b/arch/sparc/lib/sdiv.S<br/>deleted file mode 100644<br/>index f0a0d4e4db78..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/sdiv.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/sdiv.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,381 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * sdiv.S:      This routine was taken from glibc-1.09 and is covered</div><div class='del'>- *              by the GNU Library General Public License Version 2.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* This file is generated from divrem.m4; DO NOT EDIT! */</div><div class='del'>-/*</div><div class='del'>- * Division and remainder, from Appendix E of the Sparc Version 8</div><div class='del'>- * Architecture Manual, with fixes from Gordon Irlam.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Input: dividend and divisor in %o0 and %o1 respectively.</div><div class='del'>- *</div><div class='del'>- * m4 parameters:</div><div class='del'>- *  .div	name of function to generate</div><div class='del'>- *  div		div=div =&gt; %o0 / %o1; div=rem =&gt; %o0 % %o1</div><div class='del'>- *  true		true=true =&gt; signed; true=false =&gt; unsigned</div><div class='del'>- *</div><div class='del'>- * Algorithm parameters:</div><div class='del'>- *  N		how many bits per iteration we try to get (4)</div><div class='del'>- *  WORDSIZE	total number of bits (32)</div><div class='del'>- *</div><div class='del'>- * Derived constants:</div><div class='del'>- *  TOPBITS	number of bits in the top decade of a number</div><div class='del'>- *</div><div class='del'>- * Important variables:</div><div class='del'>- *  Q		the partial quotient under development (initially 0)</div><div class='del'>- *  R		the remainder so far, initially the dividend</div><div class='del'>- *  ITER	number of main division loop iterations required;</div><div class='del'>- *		equal to ceil(log2(quotient) / N).  Note that this</div><div class='del'>- *		is the log base (2^N) of the quotient.</div><div class='del'>- *  V		the current comparand, initially divisor*2^(ITER*N-1)</div><div class='del'>- *</div><div class='del'>- * Cost:</div><div class='del'>- *  Current estimate for non-large dividend is</div><div class='del'>- *	ceil(log2(quotient) / N) * (10 + 7N/2) + C</div><div class='del'>- *  A large dividend is one greater than 2^(31-TOPBITS) and takes a</div><div class='del'>- *  different path, as the upper bits of the quotient must be developed</div><div class='del'>- *  one bit at a time.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	.globl .div</div><div class='del'>-	.globl _Div</div><div class='del'>-.div:</div><div class='del'>-_Div:	/* needed for export */</div><div class='del'>-	! compute sign of result; if neither is negative, no problem</div><div class='del'>-	orcc	%o1, %o0, %g0	! either negative?</div><div class='del'>-	bge	2f			! no, go do the divide</div><div class='del'>-	 xor	%o1, %o0, %g2	! compute sign in any case</div><div class='del'>-</div><div class='del'>-	tst	%o1</div><div class='del'>-	bge	1f</div><div class='del'>-	 tst	%o0</div><div class='del'>-	! %o1 is definitely negative; %o0 might also be negative</div><div class='del'>-	bge	2f			! if %o0 not negative...</div><div class='del'>-	 sub	%g0, %o1, %o1	! in any case, make %o1 nonneg</div><div class='del'>-1:	! %o0 is negative, %o1 is nonnegative</div><div class='del'>-	sub	%g0, %o0, %o0	! make %o0 nonnegative</div><div class='del'>-2:</div><div class='del'>-</div><div class='del'>-	! Ready to divide.  Compute size of quotient; scale comparand.</div><div class='del'>-	orcc	%o1, %g0, %o5</div><div class='del'>-	bne	1f</div><div class='del'>-	 mov	%o0, %o3</div><div class='del'>-</div><div class='del'>-		! Divide by zero trap.  If it returns, return 0 (about as</div><div class='del'>-		! wrong as possible, but that is what SunOS does...).</div><div class='del'>-		ta	ST_DIV0</div><div class='del'>-		retl</div><div class='del'>-		 clr	%o0</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	cmp	%o3, %o5			! if %o1 exceeds %o0, done</div><div class='del'>-	blu	Lgot_result		! (and algorithm fails otherwise)</div><div class='del'>-	 clr	%o2</div><div class='del'>-</div><div class='del'>-	sethi	%hi(1 &lt;&lt; (32 - 4 - 1)), %g1</div><div class='del'>-</div><div class='del'>-	cmp	%o3, %g1</div><div class='del'>-	blu	Lnot_really_big</div><div class='del'>-	 clr	%o4</div><div class='del'>-</div><div class='del'>-	! Here the dividend is &gt;= 2**(31-N) or so.  We must be careful here,</div><div class='del'>-	! as our usual N-at-a-shot divide step will cause overflow and havoc.</div><div class='del'>-	! The number of bits in the result here is N*ITER+SC, where SC &lt;= N.</div><div class='del'>-	! Compute ITER in an unorthodox manner: know we need to shift V into</div><div class='del'>-	! the top decade: so do not even bother to compare to R.</div><div class='del'>-	1:</div><div class='del'>-		cmp	%o5, %g1</div><div class='del'>-		bgeu	3f</div><div class='del'>-		 mov	1, %g7</div><div class='del'>-</div><div class='del'>-		sll	%o5, 4, %o5</div><div class='del'>-</div><div class='del'>-		b	1b</div><div class='del'>-		 add	%o4, 1, %o4</div><div class='del'>-</div><div class='del'>-	! Now compute %g7.</div><div class='del'>-	2:</div><div class='del'>-		addcc	%o5, %o5, %o5</div><div class='del'>-		bcc	Lnot_too_big</div><div class='del'>-		 add	%g7, 1, %g7</div><div class='del'>-</div><div class='del'>-		! We get here if the %o1 overflowed while shifting.</div><div class='del'>-		! This means that %o3 has the high-order bit set.</div><div class='del'>-		! Restore %o5 and subtract from %o3.</div><div class='del'>-		sll	%g1, 4, %g1	! high order bit</div><div class='del'>-		srl	%o5, 1, %o5		! rest of %o5</div><div class='del'>-		add	%o5, %g1, %o5</div><div class='del'>-</div><div class='del'>-		b	Ldo_single_div</div><div class='del'>-		 sub	%g7, 1, %g7</div><div class='del'>-</div><div class='del'>-	Lnot_too_big:</div><div class='del'>-	3:</div><div class='del'>-		cmp	%o5, %o3</div><div class='del'>-		blu	2b</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-		be	Ldo_single_div</div><div class='del'>-		 nop</div><div class='del'>-	/* NB: these are commented out in the V8-Sparc manual as well */</div><div class='del'>-	/* (I do not understand this) */</div><div class='del'>-	! %o5 &gt; %o3: went too far: back up 1 step</div><div class='del'>-	!	srl	%o5, 1, %o5</div><div class='del'>-	!	dec	%g7</div><div class='del'>-	! do single-bit divide steps</div><div class='del'>-	!</div><div class='del'>-	! We have to be careful here.  We know that %o3 &gt;= %o5, so we can do the</div><div class='del'>-	! first divide step without thinking.  BUT, the others are conditional,</div><div class='del'>-	! and are only done if %o3 &gt;= 0.  Because both %o3 and %o5 may have the high-</div><div class='del'>-	! order bit set in the first step, just falling into the regular</div><div class='del'>-	! division loop will mess up the first time around.</div><div class='del'>-	! So we unroll slightly...</div><div class='del'>-	Ldo_single_div:</div><div class='del'>-		subcc	%g7, 1, %g7</div><div class='del'>-		bl	Lend_regular_divide</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-		sub	%o3, %o5, %o3</div><div class='del'>-		mov	1, %o2</div><div class='del'>-</div><div class='del'>-		b	Lend_single_divloop</div><div class='del'>-		 nop</div><div class='del'>-	Lsingle_divloop:</div><div class='del'>-		sll	%o2, 1, %o2</div><div class='del'>-</div><div class='del'>-		bl	1f</div><div class='del'>-		 srl	%o5, 1, %o5</div><div class='del'>-		! %o3 &gt;= 0</div><div class='del'>-		sub	%o3, %o5, %o3</div><div class='del'>-</div><div class='del'>-		b	2f</div><div class='del'>-		 add	%o2, 1, %o2</div><div class='del'>-	1:	! %o3 &lt; 0</div><div class='del'>-		add	%o3, %o5, %o3</div><div class='del'>-		sub	%o2, 1, %o2</div><div class='del'>-	2:</div><div class='del'>-	Lend_single_divloop:</div><div class='del'>-		subcc	%g7, 1, %g7</div><div class='del'>-		bge	Lsingle_divloop</div><div class='del'>-		 tst	%o3</div><div class='del'>-</div><div class='del'>-		b,a	Lend_regular_divide</div><div class='del'>-</div><div class='del'>-Lnot_really_big:</div><div class='del'>-1:</div><div class='del'>-	sll	%o5, 4, %o5</div><div class='del'>-	cmp	%o5, %o3</div><div class='del'>-	bleu	1b</div><div class='del'>-	 addcc	%o4, 1, %o4</div><div class='del'>-</div><div class='del'>-	be	Lgot_result</div><div class='del'>-	 sub	%o4, 1, %o4</div><div class='del'>-</div><div class='del'>-	tst	%o3	! set up for initial iteration</div><div class='del'>-Ldivloop:</div><div class='del'>-	sll	%o2, 4, %o2</div><div class='del'>-		! depth 1, accumulated bits 0</div><div class='del'>-	bl	L.1.16</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 2, accumulated bits 1</div><div class='del'>-	bl	L.2.17</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits 3</div><div class='del'>-	bl	L.3.19</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 7</div><div class='del'>-	bl	L.4.23</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (7*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.23:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (7*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.19:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 5</div><div class='del'>-	bl	L.4.21</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (5*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.21:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (5*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.2.17:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits 1</div><div class='del'>-	bl	L.3.17</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 3</div><div class='del'>-	bl	L.4.19</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (3*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.19:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (3*2-1), %o2</div><div class='del'>-	</div><div class='del'>-	</div><div class='del'>-L.3.17:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 1</div><div class='del'>-	bl	L.4.17</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (1*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.17:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (1*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.1.16:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 2, accumulated bits -1</div><div class='del'>-	bl	L.2.15</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits -1</div><div class='del'>-	bl	L.3.15</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -1</div><div class='del'>-	bl	L.4.15</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-1*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.15:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-1*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.15:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -3</div><div class='del'>-	bl	L.4.13</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-3*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.13:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-3*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.2.15:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits -3</div><div class='del'>-	bl	L.3.13</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -5</div><div class='del'>-	bl	L.4.11</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-5*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.11:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-5*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.13:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -7</div><div class='del'>-	bl	L.4.9</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-7*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.9:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-7*2-1), %o2</div><div class='del'>-</div><div class='del'>-	9:</div><div class='del'>-Lend_regular_divide:</div><div class='del'>-	subcc	%o4, 1, %o4</div><div class='del'>-	bge	Ldivloop</div><div class='del'>-	 tst	%o3</div><div class='del'>-</div><div class='del'>-	bl,a	Lgot_result</div><div class='del'>-	! non-restoring fixup here (one instruction only!)</div><div class='del'>-	sub	%o2, 1, %o2</div><div class='del'>-</div><div class='del'>-Lgot_result:</div><div class='del'>-	! check to see if answer should be &lt; 0</div><div class='del'>-	tst	%g2</div><div class='del'>-	bl,a	1f</div><div class='del'>-	 sub %g0, %o2, %o2</div><div class='del'>-1:</div><div class='del'>-	retl</div><div class='del'>-	 mov %o2, %o0</div><div class='del'>-</div><div class='del'>-	.globl	.div_patch</div><div class='del'>-.div_patch:</div><div class='del'>-	sra	%o0, 0x1f, %o2</div><div class='del'>-	wr	%o2, 0x0, %y</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	sdivcc	%o0, %o1, %o0</div><div class='del'>-	bvs,a	1f</div><div class='del'>-	 xnor	%o0, %g0, %o0</div><div class='del'>-1:	retl</div><div class='del'>-	 nop</div><div class='head'>diff --git a/arch/sparc/lib/strlen_user_32.S b/arch/sparc/lib/strlen_user_32.S<br/>deleted file mode 100644<br/>index 8c8a371df3c9..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/strlen_user_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/strlen_user_32.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,109 +0,0 @@</div><div class='del'>-/* strlen_user.S: Sparc optimized strlen_user code</div><div class='del'>- *</div><div class='del'>- * Return length of string in userspace including terminating 0</div><div class='del'>- * or 0 for error</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1991,1996 Free Software Foundation</div><div class='del'>- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)</div><div class='del'>- * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define LO_MAGIC 0x01010101</div><div class='del'>-#define HI_MAGIC 0x80808080</div><div class='del'>-</div><div class='del'>-10:</div><div class='del'>-	ldub	[%o0], %o5</div><div class='del'>-	cmp	%o5, 0</div><div class='del'>-	be	1f</div><div class='del'>-	 add	%o0, 1, %o0</div><div class='del'>-	andcc	%o0, 3, %g0</div><div class='del'>-	be	4f</div><div class='del'>-	 or	%o4, %lo(HI_MAGIC), %o3</div><div class='del'>-11:</div><div class='del'>-	ldub	[%o0], %o5</div><div class='del'>-	cmp	%o5, 0</div><div class='del'>-	be	2f</div><div class='del'>-	 add	%o0, 1, %o0</div><div class='del'>-	andcc	%o0, 3, %g0</div><div class='del'>-	be	5f</div><div class='del'>-	 sethi	%hi(LO_MAGIC), %o4</div><div class='del'>-12:</div><div class='del'>-	ldub	[%o0], %o5</div><div class='del'>-	cmp	%o5, 0</div><div class='del'>-	be	3f</div><div class='del'>-	 add	%o0, 1, %o0</div><div class='del'>-	b	13f</div><div class='del'>-	 or	%o4, %lo(LO_MAGIC), %o2</div><div class='del'>-1:</div><div class='del'>-	retl</div><div class='del'>-	 mov	1, %o0</div><div class='del'>-2:</div><div class='del'>-	retl</div><div class='del'>-	 mov	2, %o0</div><div class='del'>-3:</div><div class='del'>-	retl</div><div class='del'>-	 mov	3, %o0</div><div class='del'>-</div><div class='del'>-	.align 4</div><div class='del'>-	.global __strlen_user, __strnlen_user</div><div class='del'>-__strlen_user:</div><div class='del'>-	sethi	%hi(32768), %o1</div><div class='del'>-__strnlen_user:</div><div class='del'>-	mov	%o1, %g1</div><div class='del'>-	mov	%o0, %o1</div><div class='del'>-	andcc	%o0, 3, %g0</div><div class='del'>-	bne	10b</div><div class='del'>-	 sethi	%hi(HI_MAGIC), %o4</div><div class='del'>-	or	%o4, %lo(HI_MAGIC), %o3</div><div class='del'>-4:</div><div class='del'>-	sethi	%hi(LO_MAGIC), %o4</div><div class='del'>-5:</div><div class='del'>-	or	%o4, %lo(LO_MAGIC), %o2</div><div class='del'>-13:</div><div class='del'>-	ld	[%o0], %o5</div><div class='del'>-2:</div><div class='del'>-	sub	%o5, %o2, %o4</div><div class='del'>-	andcc	%o4, %o3, %g0</div><div class='del'>-	bne	82f</div><div class='del'>-	 add	%o0, 4, %o0</div><div class='del'>-	sub	%o0, %o1, %g2</div><div class='del'>-81:	cmp	%g2, %g1</div><div class='del'>-	blu	13b</div><div class='del'>-	 mov	%o0, %o4</div><div class='del'>-	ba,a	1f</div><div class='del'>-</div><div class='del'>-	/* Check every byte. */</div><div class='del'>-82:	srl	%o5, 24, %g5</div><div class='del'>-	andcc	%g5, 0xff, %g0</div><div class='del'>-	be	1f</div><div class='del'>-	 add	%o0, -3, %o4</div><div class='del'>-	srl	%o5, 16, %g5</div><div class='del'>-	andcc	%g5, 0xff, %g0</div><div class='del'>-	be	1f</div><div class='del'>-	 add	%o4, 1, %o4</div><div class='del'>-	srl	%o5, 8, %g5</div><div class='del'>-	andcc	%g5, 0xff, %g0</div><div class='del'>-	be	1f</div><div class='del'>-	 add	%o4, 1, %o4</div><div class='del'>-	andcc	%o5, 0xff, %g0</div><div class='del'>-	bne	81b</div><div class='del'>-	 sub	%o0, %o1, %g2</div><div class='del'>-</div><div class='del'>-	add	%o4, 1, %o4</div><div class='del'>-1:</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o4, %o1, %o0</div><div class='del'>-</div><div class='del'>-	.section .fixup,#alloc,#execinstr</div><div class='del'>-	.align	4</div><div class='del'>-9:</div><div class='del'>-	retl</div><div class='del'>-	 clr	%o0</div><div class='del'>-</div><div class='del'>-	.section __ex_table,#alloc</div><div class='del'>-	.align	4</div><div class='del'>-</div><div class='del'>-	.word	10b, 9b</div><div class='del'>-	.word	11b, 9b</div><div class='del'>-	.word	12b, 9b</div><div class='del'>-	.word	13b, 9b</div><div class='head'>diff --git a/arch/sparc/lib/strlen_user_64.S b/arch/sparc/lib/strlen_user_64.S<br/>deleted file mode 100644<br/>index 114ed111e251..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/strlen_user_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/strlen_user_64.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,95 +0,0 @@</div><div class='del'>-/* strlen_user.S: Sparc64 optimized strlen_user code</div><div class='del'>- *</div><div class='del'>- * Return length of string in userspace including terminating 0</div><div class='del'>- * or 0 for error</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1991,1996 Free Software Foundation</div><div class='del'>- * Copyright (C) 1996,1999 David S. Miller (davem@redhat.com)</div><div class='del'>- * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/asi.h&gt;</div><div class='del'>-</div><div class='del'>-#define LO_MAGIC 0x01010101</div><div class='del'>-#define HI_MAGIC 0x80808080</div><div class='del'>-</div><div class='del'>-	.align 4</div><div class='del'>-	.global __strlen_user, __strnlen_user</div><div class='del'>-__strlen_user:</div><div class='del'>-	sethi	%hi(32768), %o1</div><div class='del'>-__strnlen_user:	</div><div class='del'>-	mov	%o1, %g1</div><div class='del'>-	mov	%o0, %o1</div><div class='del'>-	andcc	%o0, 3, %g0</div><div class='del'>-	be,pt	%icc, 9f</div><div class='del'>-	 sethi	%hi(HI_MAGIC), %o4</div><div class='del'>-10:	lduba	[%o0] %asi, %o5</div><div class='del'>-	brz,pn	%o5, 21f</div><div class='del'>-	 add	%o0, 1, %o0</div><div class='del'>-	andcc	%o0, 3, %g0</div><div class='del'>-	be,pn	%icc, 4f</div><div class='del'>-	 or	%o4, %lo(HI_MAGIC), %o3</div><div class='del'>-11:	lduba	[%o0] %asi, %o5</div><div class='del'>-	brz,pn	%o5, 22f</div><div class='del'>-	 add	%o0, 1, %o0</div><div class='del'>-	andcc	%o0, 3, %g0</div><div class='del'>-	be,pt	%icc, 13f</div><div class='del'>-	 srl	%o3, 7, %o2</div><div class='del'>-12:	lduba	[%o0] %asi, %o5</div><div class='del'>-	brz,pn	%o5, 23f</div><div class='del'>-	 add	%o0, 1, %o0</div><div class='del'>-	ba,pt	%icc, 2f</div><div class='del'>-15:	 lda	[%o0] %asi, %o5</div><div class='del'>-9:	or	%o4, %lo(HI_MAGIC), %o3</div><div class='del'>-4:	srl	%o3, 7, %o2</div><div class='del'>-13:	lda	[%o0] %asi, %o5</div><div class='del'>-2:	sub	%o5, %o2, %o4</div><div class='del'>-	andcc	%o4, %o3, %g0</div><div class='del'>-	bne,pn	%icc, 82f</div><div class='del'>-	 add	%o0, 4, %o0</div><div class='del'>-	sub	%o0, %o1, %g2</div><div class='del'>-81:	cmp	%g2, %g1</div><div class='del'>-	blu,pt	%icc, 13b</div><div class='del'>-	 mov	%o0, %o4</div><div class='del'>-	ba,a,pt	%xcc, 1f</div><div class='del'>-</div><div class='del'>-	/* Check every byte. */</div><div class='del'>-82:	srl	%o5, 24, %g7</div><div class='del'>-	andcc	%g7, 0xff, %g0</div><div class='del'>-	be,pn	%icc, 1f</div><div class='del'>-	 add	%o0, -3, %o4</div><div class='del'>-	srl	%o5, 16, %g7</div><div class='del'>-	andcc	%g7, 0xff, %g0</div><div class='del'>-	be,pn	%icc, 1f</div><div class='del'>-	 add	%o4, 1, %o4</div><div class='del'>-	srl	%o5, 8, %g7</div><div class='del'>-	andcc	%g7, 0xff, %g0</div><div class='del'>-	be,pn	%icc, 1f</div><div class='del'>-	 add	%o4, 1, %o4</div><div class='del'>-	andcc	%o5, 0xff, %g0</div><div class='del'>-	bne,pt	%icc, 81b</div><div class='del'>-	 sub	%o0, %o1, %g2</div><div class='del'>-	add	%o4, 1, %o4</div><div class='del'>-1:	retl</div><div class='del'>-	 sub	%o4, %o1, %o0</div><div class='del'>-21:	retl</div><div class='del'>-	 mov	1, %o0</div><div class='del'>-22:	retl</div><div class='del'>-	 mov	2, %o0</div><div class='del'>-23:	retl</div><div class='del'>-	 mov	3, %o0</div><div class='del'>-</div><div class='del'>-        .section .fixup,#alloc,#execinstr</div><div class='del'>-        .align  4</div><div class='del'>-30:</div><div class='del'>-        retl</div><div class='del'>-         clr    %o0</div><div class='del'>-</div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.align	4</div><div class='del'>-</div><div class='del'>-	.word	10b, 30b</div><div class='del'>-	.word	11b, 30b</div><div class='del'>-	.word	12b, 30b</div><div class='del'>-	.word	15b, 30b</div><div class='del'>-	.word	13b, 30b</div><div class='head'>diff --git a/arch/sparc/lib/strncmp_32.S b/arch/sparc/lib/strncmp_32.S<br/>index 494ec664537a..c0d1b568c1c5 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/strncmp_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/strncmp_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/strncmp_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/strncmp_32.S</a></div><div class='hunk'>@@ -3,11 +3,10 @@</div><div class='ctx'>  *            generic strncmp routine.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='ctx'> 	.text</div><div class='del'>-	.align 4</div><div class='del'>-	.global __strncmp, strncmp</div><div class='del'>-__strncmp:</div><div class='del'>-strncmp:</div><div class='add'>+ENTRY(strncmp)</div><div class='ctx'> 	mov	%o0, %g3</div><div class='ctx'> 	mov	0, %o3</div><div class='ctx'> </div><div class='hunk'>@@ -116,3 +115,4 @@ strncmp:</div><div class='ctx'> 	and	%g2, 0xff, %o0</div><div class='ctx'> 	retl</div><div class='ctx'> 	 sub	%o3, %o0, %o0</div><div class='add'>+ENDPROC(strncmp)</div><div class='head'>diff --git a/arch/sparc/lib/strncmp_64.S b/arch/sparc/lib/strncmp_64.S<br/>index 980e83751556..0656627166f3 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/strncmp_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/strncmp_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/strncmp_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/strncmp_64.S</a></div><div class='hunk'>@@ -4,13 +4,11 @@</div><div class='ctx'>  * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/asi.h&gt;</div><div class='ctx'> </div><div class='ctx'> 	.text</div><div class='del'>-	.align	32</div><div class='del'>-	.globl	strncmp</div><div class='del'>-	.type	strncmp,#function</div><div class='del'>-strncmp:</div><div class='add'>+ENTRY(strncmp)</div><div class='ctx'> 	brlez,pn %o2, 3f</div><div class='ctx'> 	 lduba	[%o0] (ASI_PNF), %o3</div><div class='ctx'> 1:</div><div class='hunk'>@@ -29,4 +27,4 @@ strncmp:</div><div class='ctx'> 3:</div><div class='ctx'> 	retl</div><div class='ctx'> 	 clr	%o0</div><div class='del'>-	.size	strncmp, .-strncmp</div><div class='add'>+ENDPROC(strncmp)</div><div class='head'>diff --git a/arch/sparc/lib/strncpy_from_user_32.S b/arch/sparc/lib/strncpy_from_user_32.S<br/>deleted file mode 100644<br/>index d77198976a66..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/strncpy_from_user_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/strncpy_from_user_32.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,47 +0,0 @@</div><div class='del'>-/* strncpy_from_user.S: Sparc strncpy from userspace.</div><div class='del'>- *</div><div class='del'>- *  Copyright(C) 1996 David S. Miller</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/ptrace.h&gt;</div><div class='del'>-#include &lt;asm/errno.h&gt;</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-	.align	4</div><div class='del'>-</div><div class='del'>-	/* Must return:</div><div class='del'>-	 *</div><div class='del'>-	 * -EFAULT		for an exception</div><div class='del'>-	 * count		if we hit the buffer limit</div><div class='del'>-	 * bytes copied		if we hit a null byte</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	.globl	__strncpy_from_user</div><div class='del'>-__strncpy_from_user:</div><div class='del'>-	/* %o0=dest, %o1=src, %o2=count */</div><div class='del'>-	mov	%o2, %o3</div><div class='del'>-1:</div><div class='del'>-	subcc	%o2, 1, %o2</div><div class='del'>-	bneg	2f</div><div class='del'>-	 nop</div><div class='del'>-10:</div><div class='del'>-	ldub	[%o1], %o4</div><div class='del'>-	add	%o0, 1, %o0</div><div class='del'>-	cmp	%o4, 0</div><div class='del'>-	add	%o1, 1, %o1</div><div class='del'>-	bne	1b</div><div class='del'>-	 stb	%o4, [%o0 - 1]</div><div class='del'>-2:</div><div class='del'>-	add	%o2, 1, %o0</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o3, %o0, %o0</div><div class='del'>-</div><div class='del'>-	.section .fixup,#alloc,#execinstr</div><div class='del'>-	.align	4</div><div class='del'>-4:</div><div class='del'>-	retl</div><div class='del'>-	 mov	-EFAULT, %o0</div><div class='del'>-</div><div class='del'>-	.section __ex_table,#alloc</div><div class='del'>-	.align	4</div><div class='del'>-	.word	10b, 4b</div><div class='head'>diff --git a/arch/sparc/lib/strncpy_from_user_64.S b/arch/sparc/lib/strncpy_from_user_64.S<br/>deleted file mode 100644<br/>index 511c8f136f95..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/strncpy_from_user_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/strncpy_from_user_64.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,135 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * strncpy_from_user.S: Sparc64 strncpy from userspace.</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/asi.h&gt;</div><div class='del'>-#include &lt;asm/errno.h&gt;</div><div class='del'>-</div><div class='del'>-	.data</div><div class='del'>-	.align	8</div><div class='del'>-0:	.xword	0x0101010101010101</div><div class='del'>-</div><div class='del'>-	.text</div><div class='del'>-	.align	32</div><div class='del'>-</div><div class='del'>-	/* Must return:</div><div class='del'>-	 *</div><div class='del'>-	 * -EFAULT		for an exception</div><div class='del'>-	 * count		if we hit the buffer limit</div><div class='del'>-	 * bytes copied		if we hit a null byte</div><div class='del'>-	 * (without the null byte)</div><div class='del'>-	 *</div><div class='del'>-	 * This implementation assumes:</div><div class='del'>-	 * %o1 is 8 aligned =&gt; !(%o2 &amp; 7)</div><div class='del'>-	 * %o0 is 8 aligned (if not, it will be slooooow, but will work)</div><div class='del'>-	 *</div><div class='del'>-	 * This is optimized for the common case:</div><div class='del'>-	 * in my stats, 90% of src are 8 aligned (even on sparc32)</div><div class='del'>-	 * and average length is 18 or so.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	.globl	__strncpy_from_user</div><div class='del'>-	.type	__strncpy_from_user,#function</div><div class='del'>-__strncpy_from_user:</div><div class='del'>-	/* %o0=dest, %o1=src, %o2=count */</div><div class='del'>-	andcc	%o1, 7, %g0		! IEU1	Group</div><div class='del'>-	bne,pn	%icc, 30f		! CTI</div><div class='del'>-	 add	%o0, %o2, %g3		! IEU0</div><div class='del'>-60:	ldxa	[%o1] %asi, %g1		! Load	Group</div><div class='del'>-	brlez,pn %o2, 10f		! CTI</div><div class='del'>-	 mov	%o0, %o3		! IEU0</div><div class='del'>-50:	sethi	%hi(0b), %o4		! IEU0	Group</div><div class='del'>-	ldx	[%o4 + %lo(0b)], %o4	! Load</div><div class='del'>-	sllx	%o4, 7, %o5		! IEU1	Group</div><div class='del'>-1:	sub	%g1, %o4, %g2		! IEU0	Group</div><div class='del'>-	stx	%g1, [%o0]		! Store</div><div class='del'>-	add	%o0, 8, %o0		! IEU1</div><div class='del'>-	andcc	%g2, %o5, %g0		! IEU1	Group</div><div class='del'>-	bne,pn	%xcc, 5f		! CTI</div><div class='del'>-	 add	%o1, 8, %o1		! IEU0</div><div class='del'>-	cmp	%o0, %g3		! IEU1	Group</div><div class='del'>-	bl,a,pt %xcc, 1b		! CTI</div><div class='del'>-61:	 ldxa	[%o1] %asi, %g1		! Load</div><div class='del'>-10:	retl				! CTI	Group</div><div class='del'>-	 mov	%o2, %o0		! IEU0</div><div class='del'>-5:	srlx	%g2, 32, %g7		! IEU0	Group</div><div class='del'>-	sethi	%hi(0xff00), %o4	! IEU1</div><div class='del'>-	andcc	%g7, %o5, %g0		! IEU1	Group</div><div class='del'>-	be,pn	%icc, 2f		! CTI</div><div class='del'>-	 or	%o4, %lo(0xff00), %o4	! IEU0</div><div class='del'>-	srlx	%g1, 48, %g7		! IEU0	Group</div><div class='del'>-	andcc	%g7, %o4, %g0		! IEU1	Group</div><div class='del'>-	be,pn	%icc, 50f		! CTI</div><div class='del'>-	 andcc	%g7, 0xff, %g0		! IEU1	Group</div><div class='del'>-	be,pn	%icc, 51f		! CTI</div><div class='del'>-	 srlx	%g1, 32, %g7		! IEU0</div><div class='del'>-	andcc	%g7, %o4, %g0		! IEU1	Group</div><div class='del'>-	be,pn	%icc, 52f		! CTI</div><div class='del'>-	 andcc	%g7, 0xff, %g0		! IEU1	Group</div><div class='del'>-	be,pn	%icc, 53f		! CTI</div><div class='del'>-2:	 andcc	%g2, %o5, %g0		! IEU1	Group</div><div class='del'>-	be,pn	%icc, 2f		! CTI</div><div class='del'>-	 srl	%g1, 16, %g7		! IEU0</div><div class='del'>-	andcc	%g7, %o4, %g0		! IEU1	Group</div><div class='del'>-	be,pn	%icc, 54f		! CTI</div><div class='del'>-	 andcc	%g7, 0xff, %g0		! IEU1	Group</div><div class='del'>-	be,pn	%icc, 55f		! CTI</div><div class='del'>-	 andcc	%g1, %o4, %g0		! IEU1	Group</div><div class='del'>-	be,pn	%icc, 56f		! CTI</div><div class='del'>-	 andcc	%g1, 0xff, %g0		! IEU1	Group</div><div class='del'>-	be,a,pn	%icc, 57f		! CTI</div><div class='del'>-	 sub	%o0, %o3, %o0		! IEU0</div><div class='del'>-2:	cmp	%o0, %g3		! IEU1	Group</div><div class='del'>-	bl,a,pt	%xcc, 50b		! CTI</div><div class='del'>-62:	 ldxa	[%o1] %asi, %g1		! Load</div><div class='del'>-	retl				! CTI	Group</div><div class='del'>-	 mov	%o2, %o0		! IEU0</div><div class='del'>-50:	sub	%o0, %o3, %o0</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o0, 8, %o0</div><div class='del'>-51:	sub	%o0, %o3, %o0</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o0, 7, %o0</div><div class='del'>-52:	sub	%o0, %o3, %o0</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o0, 6, %o0</div><div class='del'>-53:	sub	%o0, %o3, %o0</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o0, 5, %o0</div><div class='del'>-54:	sub	%o0, %o3, %o0</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o0, 4, %o0</div><div class='del'>-55:	sub	%o0, %o3, %o0</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o0, 3, %o0</div><div class='del'>-56:	sub	%o0, %o3, %o0</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o0, 2, %o0</div><div class='del'>-57:	retl</div><div class='del'>-	 sub	%o0, 1, %o0</div><div class='del'>-30:	brlez,pn %o2, 3f</div><div class='del'>-	 sub	%g0, %o2, %o3</div><div class='del'>-	add	%o0, %o2, %o0</div><div class='del'>-63:	lduba	[%o1] %asi, %o4</div><div class='del'>-1:	add	%o1, 1, %o1</div><div class='del'>-	brz,pn	%o4, 2f</div><div class='del'>-	 stb	%o4, [%o0 + %o3]</div><div class='del'>-	addcc	%o3, 1, %o3</div><div class='del'>-	bne,pt	%xcc, 1b</div><div class='del'>-64:	 lduba	[%o1] %asi, %o4</div><div class='del'>-3:	retl</div><div class='del'>-	 mov	%o2, %o0</div><div class='del'>-2:	retl</div><div class='del'>-	 add	%o2, %o3, %o0</div><div class='del'>-	.size	__strncpy_from_user, .-__strncpy_from_user</div><div class='del'>-</div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.align	4</div><div class='del'>-	.word	60b, __retl_efault</div><div class='del'>-	.word	61b, __retl_efault</div><div class='del'>-	.word	62b, __retl_efault</div><div class='del'>-	.word	63b, __retl_efault</div><div class='del'>-	.word	64b, __retl_efault</div><div class='del'>-	.previous</div><div class='head'>diff --git a/arch/sparc/lib/ucmpdi2.c b/arch/sparc/lib/ucmpdi2.c<br/>new file mode 100644<br/>index 000000000000..1e06ed500682<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/ucmpdi2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/ucmpdi2.c</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include "libgcc.h"</div><div class='add'>+</div><div class='add'>+word_type __ucmpdi2(unsigned long long a, unsigned long long b)</div><div class='add'>+{</div><div class='add'>+	const DWunion au = {.ll = a};</div><div class='add'>+	const DWunion bu = {.ll = b};</div><div class='add'>+</div><div class='add'>+	if ((unsigned int) au.s.high &lt; (unsigned int) bu.s.high)</div><div class='add'>+		return 0;</div><div class='add'>+	else if ((unsigned int) au.s.high &gt; (unsigned int) bu.s.high)</div><div class='add'>+		return 2;</div><div class='add'>+	if ((unsigned int) au.s.low &lt; (unsigned int) bu.s.low)</div><div class='add'>+		return 0;</div><div class='add'>+	else if ((unsigned int) au.s.low &gt; (unsigned int) bu.s.low)</div><div class='add'>+		return 2;</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(__ucmpdi2);</div><div class='head'>diff --git a/arch/sparc/lib/udiv.S b/arch/sparc/lib/udiv.S<br/>deleted file mode 100644<br/>index 2101405bdfcb..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/udiv.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/udiv.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,357 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * udiv.S:      This routine was taken from glibc-1.09 and is covered</div><div class='del'>- *              by the GNU Library General Public License Version 2.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* This file is generated from divrem.m4; DO NOT EDIT! */</div><div class='del'>-/*</div><div class='del'>- * Division and remainder, from Appendix E of the Sparc Version 8</div><div class='del'>- * Architecture Manual, with fixes from Gordon Irlam.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Input: dividend and divisor in %o0 and %o1 respectively.</div><div class='del'>- *</div><div class='del'>- * m4 parameters:</div><div class='del'>- *  .udiv	name of function to generate</div><div class='del'>- *  div		div=div =&gt; %o0 / %o1; div=rem =&gt; %o0 % %o1</div><div class='del'>- *  false		false=true =&gt; signed; false=false =&gt; unsigned</div><div class='del'>- *</div><div class='del'>- * Algorithm parameters:</div><div class='del'>- *  N		how many bits per iteration we try to get (4)</div><div class='del'>- *  WORDSIZE	total number of bits (32)</div><div class='del'>- *</div><div class='del'>- * Derived constants:</div><div class='del'>- *  TOPBITS	number of bits in the top decade of a number</div><div class='del'>- *</div><div class='del'>- * Important variables:</div><div class='del'>- *  Q		the partial quotient under development (initially 0)</div><div class='del'>- *  R		the remainder so far, initially the dividend</div><div class='del'>- *  ITER	number of main division loop iterations required;</div><div class='del'>- *		equal to ceil(log2(quotient) / N).  Note that this</div><div class='del'>- *		is the log base (2^N) of the quotient.</div><div class='del'>- *  V		the current comparand, initially divisor*2^(ITER*N-1)</div><div class='del'>- *</div><div class='del'>- * Cost:</div><div class='del'>- *  Current estimate for non-large dividend is</div><div class='del'>- *	ceil(log2(quotient) / N) * (10 + 7N/2) + C</div><div class='del'>- *  A large dividend is one greater than 2^(31-TOPBITS) and takes a</div><div class='del'>- *  different path, as the upper bits of the quotient must be developed</div><div class='del'>- *  one bit at a time.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	.globl .udiv</div><div class='del'>-	.globl _Udiv</div><div class='del'>-.udiv:</div><div class='del'>-_Udiv:	/* needed for export */</div><div class='del'>-</div><div class='del'>-	! Ready to divide.  Compute size of quotient; scale comparand.</div><div class='del'>-	orcc	%o1, %g0, %o5</div><div class='del'>-	bne	1f</div><div class='del'>-	 mov	%o0, %o3</div><div class='del'>-</div><div class='del'>-		! Divide by zero trap.  If it returns, return 0 (about as</div><div class='del'>-		! wrong as possible, but that is what SunOS does...).</div><div class='del'>-		ta	ST_DIV0</div><div class='del'>-		retl</div><div class='del'>-		 clr	%o0</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	cmp	%o3, %o5			! if %o1 exceeds %o0, done</div><div class='del'>-	blu	Lgot_result		! (and algorithm fails otherwise)</div><div class='del'>-	 clr	%o2</div><div class='del'>-</div><div class='del'>-	sethi	%hi(1 &lt;&lt; (32 - 4 - 1)), %g1</div><div class='del'>-</div><div class='del'>-	cmp	%o3, %g1</div><div class='del'>-	blu	Lnot_really_big</div><div class='del'>-	 clr	%o4</div><div class='del'>-</div><div class='del'>-	! Here the dividend is &gt;= 2**(31-N) or so.  We must be careful here,</div><div class='del'>-	! as our usual N-at-a-shot divide step will cause overflow and havoc.</div><div class='del'>-	! The number of bits in the result here is N*ITER+SC, where SC &lt;= N.</div><div class='del'>-	! Compute ITER in an unorthodox manner: know we need to shift V into</div><div class='del'>-	! the top decade: so do not even bother to compare to R.</div><div class='del'>-	1:</div><div class='del'>-		cmp	%o5, %g1</div><div class='del'>-		bgeu	3f</div><div class='del'>-		 mov	1, %g7</div><div class='del'>-</div><div class='del'>-		sll	%o5, 4, %o5</div><div class='del'>-</div><div class='del'>-		b	1b</div><div class='del'>-		 add	%o4, 1, %o4</div><div class='del'>-</div><div class='del'>-	! Now compute %g7.</div><div class='del'>-	2:</div><div class='del'>-		addcc	%o5, %o5, %o5</div><div class='del'>-		bcc	Lnot_too_big</div><div class='del'>-		 add	%g7, 1, %g7</div><div class='del'>-</div><div class='del'>-		! We get here if the %o1 overflowed while shifting.</div><div class='del'>-		! This means that %o3 has the high-order bit set.</div><div class='del'>-		! Restore %o5 and subtract from %o3.</div><div class='del'>-		sll	%g1, 4, %g1	! high order bit</div><div class='del'>-		srl	%o5, 1, %o5		! rest of %o5</div><div class='del'>-		add	%o5, %g1, %o5</div><div class='del'>-</div><div class='del'>-		b	Ldo_single_div</div><div class='del'>-		 sub	%g7, 1, %g7</div><div class='del'>-</div><div class='del'>-	Lnot_too_big:</div><div class='del'>-	3:</div><div class='del'>-		cmp	%o5, %o3</div><div class='del'>-		blu	2b</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-		be	Ldo_single_div</div><div class='del'>-		 nop</div><div class='del'>-	/* NB: these are commented out in the V8-Sparc manual as well */</div><div class='del'>-	/* (I do not understand this) */</div><div class='del'>-	! %o5 &gt; %o3: went too far: back up 1 step</div><div class='del'>-	!	srl	%o5, 1, %o5</div><div class='del'>-	!	dec	%g7</div><div class='del'>-	! do single-bit divide steps</div><div class='del'>-	!</div><div class='del'>-	! We have to be careful here.  We know that %o3 &gt;= %o5, so we can do the</div><div class='del'>-	! first divide step without thinking.  BUT, the others are conditional,</div><div class='del'>-	! and are only done if %o3 &gt;= 0.  Because both %o3 and %o5 may have the high-</div><div class='del'>-	! order bit set in the first step, just falling into the regular</div><div class='del'>-	! division loop will mess up the first time around.</div><div class='del'>-	! So we unroll slightly...</div><div class='del'>-	Ldo_single_div:</div><div class='del'>-		subcc	%g7, 1, %g7</div><div class='del'>-		bl	Lend_regular_divide</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-		sub	%o3, %o5, %o3</div><div class='del'>-		mov	1, %o2</div><div class='del'>-</div><div class='del'>-		b	Lend_single_divloop</div><div class='del'>-		 nop</div><div class='del'>-	Lsingle_divloop:</div><div class='del'>-		sll	%o2, 1, %o2</div><div class='del'>-		bl	1f</div><div class='del'>-		 srl	%o5, 1, %o5</div><div class='del'>-		! %o3 &gt;= 0</div><div class='del'>-		sub	%o3, %o5, %o3</div><div class='del'>-		b	2f</div><div class='del'>-		 add	%o2, 1, %o2</div><div class='del'>-	1:	! %o3 &lt; 0</div><div class='del'>-		add	%o3, %o5, %o3</div><div class='del'>-		sub	%o2, 1, %o2</div><div class='del'>-	2:</div><div class='del'>-	Lend_single_divloop:</div><div class='del'>-		subcc	%g7, 1, %g7</div><div class='del'>-		bge	Lsingle_divloop</div><div class='del'>-		 tst	%o3</div><div class='del'>-</div><div class='del'>-		b,a	Lend_regular_divide</div><div class='del'>-</div><div class='del'>-Lnot_really_big:</div><div class='del'>-1:</div><div class='del'>-	sll	%o5, 4, %o5</div><div class='del'>-</div><div class='del'>-	cmp	%o5, %o3</div><div class='del'>-	bleu	1b</div><div class='del'>-	 addcc	%o4, 1, %o4</div><div class='del'>-</div><div class='del'>-	be	Lgot_result</div><div class='del'>-	 sub	%o4, 1, %o4</div><div class='del'>-</div><div class='del'>-	tst	%o3	! set up for initial iteration</div><div class='del'>-Ldivloop:</div><div class='del'>-	sll	%o2, 4, %o2</div><div class='del'>-		! depth 1, accumulated bits 0</div><div class='del'>-	bl	L.1.16</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 2, accumulated bits 1</div><div class='del'>-	bl	L.2.17</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits 3</div><div class='del'>-	bl	L.3.19</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 7</div><div class='del'>-	bl	L.4.23</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (7*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.23:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (7*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.19:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 5</div><div class='del'>-	bl	L.4.21</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (5*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.21:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (5*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.2.17:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits 1</div><div class='del'>-	bl	L.3.17</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 3</div><div class='del'>-	bl	L.4.19</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (3*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.19:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (3*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.17:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 1</div><div class='del'>-	bl	L.4.17</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (1*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.17:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (1*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.1.16:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 2, accumulated bits -1</div><div class='del'>-	bl	L.2.15</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits -1</div><div class='del'>-	bl	L.3.15</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -1</div><div class='del'>-	bl	L.4.15</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-1*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.15:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-1*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.15:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -3</div><div class='del'>-	bl	L.4.13</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-3*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.13:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-3*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.2.15:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits -3</div><div class='del'>-	bl	L.3.13</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -5</div><div class='del'>-	bl	L.4.11</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-5*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.11:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-5*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.13:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -7</div><div class='del'>-	bl	L.4.9</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-7*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.9:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-7*2-1), %o2</div><div class='del'>-</div><div class='del'>-	9:</div><div class='del'>-Lend_regular_divide:</div><div class='del'>-	subcc	%o4, 1, %o4</div><div class='del'>-	bge	Ldivloop</div><div class='del'>-	 tst	%o3</div><div class='del'>-</div><div class='del'>-	bl,a	Lgot_result</div><div class='del'>-	! non-restoring fixup here (one instruction only!)</div><div class='del'>-	sub	%o2, 1, %o2</div><div class='del'>-</div><div class='del'>-Lgot_result:</div><div class='del'>-</div><div class='del'>-	retl</div><div class='del'>-	 mov %o2, %o0</div><div class='del'>-</div><div class='del'>-	.globl	.udiv_patch</div><div class='del'>-.udiv_patch:</div><div class='del'>-	wr	%g0, 0x0, %y</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	retl</div><div class='del'>-	 udiv	%o0, %o1, %o0</div><div class='del'>-	nop</div><div class='head'>diff --git a/arch/sparc/lib/udivdi3.S b/arch/sparc/lib/udivdi3.S<br/>index b430f1f0ef62..24e0a355e2e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/udivdi3.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/udivdi3.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/udivdi3.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/udivdi3.S</a></div><div class='hunk'>@@ -60,8 +60,9 @@ __udivdi3:</div><div class='ctx'> 	bne .LL77</div><div class='ctx'> 	mov %i0,%o2</div><div class='ctx'> 	mov 1,%o0</div><div class='del'>-	call .udiv,0</div><div class='ctx'> 	mov 0,%o1</div><div class='add'>+	wr %g0, 0, %y</div><div class='add'>+	udiv %o0, %o1, %o0</div><div class='ctx'> 	mov %o0,%o3</div><div class='ctx'> 	mov %i0,%o2</div><div class='ctx'> .LL77:</div><div class='head'>diff --git a/arch/sparc/lib/umul.S b/arch/sparc/lib/umul.S<br/>deleted file mode 100644<br/>index 1f36ae682529..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/umul.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/umul.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,171 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * umul.S:      This routine was taken from glibc-1.09 and is covered</div><div class='del'>- *              by the GNU Library General Public License Version 2.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Unsigned multiply.  Returns %o0 * %o1 in %o1%o0 (i.e., %o1 holds the</div><div class='del'>- * upper 32 bits of the 64-bit product).</div><div class='del'>- *</div><div class='del'>- * This code optimizes short (less than 13-bit) multiplies.  Short</div><div class='del'>- * multiplies require 25 instruction cycles, and long ones require</div><div class='del'>- * 45 instruction cycles.</div><div class='del'>- *</div><div class='del'>- * On return, overflow has occurred (%o1 is not zero) if and only if</div><div class='del'>- * the Z condition code is clear, allowing, e.g., the following:</div><div class='del'>- *</div><div class='del'>- *	call	.umul</div><div class='del'>- *	nop</div><div class='del'>- *	bnz	overflow	(or tnz)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-	.globl .umul</div><div class='del'>-	.globl _Umul</div><div class='del'>-.umul:</div><div class='del'>-_Umul:	/* needed for export */</div><div class='del'>-	or	%o0, %o1, %o4</div><div class='del'>-	mov	%o0, %y		! multiplier -&gt; Y</div><div class='del'>-</div><div class='del'>-	andncc	%o4, 0xfff, %g0	! test bits 12..31 of *both* args</div><div class='del'>-	be	Lmul_shortway	! if zero, can do it the short way</div><div class='del'>-	 andcc	%g0, %g0, %o4	! zero the partial product and clear N and V</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Long multiply.  32 steps, followed by a final shift step.</div><div class='del'>-	 */</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 1</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 2</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 3</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 4</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 5</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 6</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 7</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 8</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 9</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 10</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 11</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 12</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 13</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 14</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 15</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 16</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 17</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 18</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 19</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 20</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 21</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 22</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 23</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 24</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 25</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 26</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 27</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 28</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 29</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 30</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 31</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 32</div><div class='del'>-	mulscc	%o4, %g0, %o4	! final shift</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Normally, with the shift-and-add approach, if both numbers are</div><div class='del'>-	 * positive you get the correct result.  With 32-bit two's-complement</div><div class='del'>-	 * numbers, -x is represented as</div><div class='del'>-	 *</div><div class='del'>-	 *		  x		    32</div><div class='del'>-	 *	( 2  -  ------ ) mod 2  *  2</div><div class='del'>-	 *		   32</div><div class='del'>-	 *		  2</div><div class='del'>-	 *</div><div class='del'>-	 * (the `mod 2' subtracts 1 from 1.bbbb).  To avoid lots of 2^32s,</div><div class='del'>-	 * we can treat this as if the radix point were just to the left</div><div class='del'>-	 * of the sign bit (multiply by 2^32), and get</div><div class='del'>-	 *</div><div class='del'>-	 *	-x  =  (2 - x) mod 2</div><div class='del'>-	 *</div><div class='del'>-	 * Then, ignoring the `mod 2's for convenience:</div><div class='del'>-	 *</div><div class='del'>-	 *   x *  y	= xy</div><div class='del'>-	 *  -x *  y	= 2y - xy</div><div class='del'>-	 *   x * -y	= 2x - xy</div><div class='del'>-	 *  -x * -y	= 4 - 2x - 2y + xy</div><div class='del'>-	 *</div><div class='del'>-	 * For signed multiplies, we subtract (x &lt;&lt; 32) from the partial</div><div class='del'>-	 * product to fix this problem for negative multipliers (see mul.s).</div><div class='del'>-	 * Because of the way the shift into the partial product is calculated</div><div class='del'>-	 * (N xor V), this term is automatically removed for the multiplicand,</div><div class='del'>-	 * so we don't have to adjust.</div><div class='del'>-	 *</div><div class='del'>-	 * But for unsigned multiplies, the high order bit wasn't a sign bit,</div><div class='del'>-	 * and the correction is wrong.  So for unsigned multiplies where the</div><div class='del'>-	 * high order bit is one, we end up with xy - (y &lt;&lt; 32).  To fix it</div><div class='del'>-	 * we add y &lt;&lt; 32.</div><div class='del'>-	 */</div><div class='del'>-#if 0</div><div class='del'>-	tst	%o1</div><div class='del'>-	bl,a	1f		! if %o1 &lt; 0 (high order bit = 1),</div><div class='del'>-	 add	%o4, %o0, %o4	! %o4 += %o0 (add y to upper half)</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	rd	%y, %o0		! get lower half of product</div><div class='del'>-	retl</div><div class='del'>-	 addcc	%o4, %g0, %o1	! put upper half in place and set Z for %o1==0</div><div class='del'>-#else</div><div class='del'>-	/* Faster code from tege@sics.se.  */</div><div class='del'>-	sra	%o1, 31, %o2	! make mask from sign bit</div><div class='del'>-	and	%o0, %o2, %o2	! %o2 = 0 or %o0, depending on sign of %o1</div><div class='del'>-	rd	%y, %o0		! get lower half of product</div><div class='del'>-	retl</div><div class='del'>-	 addcc	%o4, %o2, %o1	! add compensation and put upper half in place</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-Lmul_shortway:</div><div class='del'>-	/*</div><div class='del'>-	 * Short multiply.  12 steps, followed by a final shift step.</div><div class='del'>-	 * The resulting bits are off by 12 and (32-12) = 20 bit positions,</div><div class='del'>-	 * but there is no problem with %o0 being negative (unlike above),</div><div class='del'>-	 * and overflow is impossible (the answer is at most 24 bits long).</div><div class='del'>-	 */</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 1</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 2</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 3</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 4</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 5</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 6</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 7</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 8</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 9</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 10</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 11</div><div class='del'>-	mulscc	%o4, %o1, %o4	! 12</div><div class='del'>-	mulscc	%o4, %g0, %o4	! final shift</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * %o4 has 20 of the bits that should be in the result; %y has</div><div class='del'>-	 * the bottom 12 (as %y's top 12).  That is:</div><div class='del'>-	 *</div><div class='del'>-	 *	  %o4		    %y</div><div class='del'>-	 * +----------------+----------------+</div><div class='del'>-	 * | -12- |   -20-  | -12- |   -20-  |</div><div class='del'>-	 * +------(---------+------)---------+</div><div class='del'>-	 *	   -----result-----</div><div class='del'>-	 *</div><div class='del'>-	 * The 12 bits of %o4 left of the `result' area are all zero;</div><div class='del'>-	 * in fact, all top 20 bits of %o4 are zero.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	rd	%y, %o5</div><div class='del'>-	sll	%o4, 12, %o0	! shift middle bits left 12</div><div class='del'>-	srl	%o5, 20, %o5	! shift low bits right 20</div><div class='del'>-	or	%o5, %o0, %o0</div><div class='del'>-	retl</div><div class='del'>-	 addcc	%g0, %g0, %o1	! %o1 = zero, and set Z</div><div class='del'>-</div><div class='del'>-	.globl	.umul_patch</div><div class='del'>-.umul_patch:</div><div class='del'>-	umul	%o0, %o1, %o0</div><div class='del'>-	retl</div><div class='del'>-	 rd	%y, %o1</div><div class='del'>-	nop</div><div class='head'>diff --git a/arch/sparc/lib/urem.S b/arch/sparc/lib/urem.S<br/>deleted file mode 100644<br/>index 77123eb83c44..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/urem.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/urem.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,357 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * urem.S:      This routine was taken from glibc-1.09 and is covered</div><div class='del'>- *              by the GNU Library General Public License Version 2.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* This file is generated from divrem.m4; DO NOT EDIT! */</div><div class='del'>-/*</div><div class='del'>- * Division and remainder, from Appendix E of the Sparc Version 8</div><div class='del'>- * Architecture Manual, with fixes from Gordon Irlam.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Input: dividend and divisor in %o0 and %o1 respectively.</div><div class='del'>- *</div><div class='del'>- * m4 parameters:</div><div class='del'>- *  .urem	name of function to generate</div><div class='del'>- *  rem		rem=div =&gt; %o0 / %o1; rem=rem =&gt; %o0 % %o1</div><div class='del'>- *  false		false=true =&gt; signed; false=false =&gt; unsigned</div><div class='del'>- *</div><div class='del'>- * Algorithm parameters:</div><div class='del'>- *  N		how many bits per iteration we try to get (4)</div><div class='del'>- *  WORDSIZE	total number of bits (32)</div><div class='del'>- *</div><div class='del'>- * Derived constants:</div><div class='del'>- *  TOPBITS	number of bits in the top decade of a number</div><div class='del'>- *</div><div class='del'>- * Important variables:</div><div class='del'>- *  Q		the partial quotient under development (initially 0)</div><div class='del'>- *  R		the remainder so far, initially the dividend</div><div class='del'>- *  ITER	number of main division loop iterations required;</div><div class='del'>- *		equal to ceil(log2(quotient) / N).  Note that this</div><div class='del'>- *		is the log base (2^N) of the quotient.</div><div class='del'>- *  V		the current comparand, initially divisor*2^(ITER*N-1)</div><div class='del'>- *</div><div class='del'>- * Cost:</div><div class='del'>- *  Current estimate for non-large dividend is</div><div class='del'>- *	ceil(log2(quotient) / N) * (10 + 7N/2) + C</div><div class='del'>- *  A large dividend is one greater than 2^(31-TOPBITS) and takes a</div><div class='del'>- *  different path, as the upper bits of the quotient must be developed</div><div class='del'>- *  one bit at a time.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-	.globl .urem</div><div class='del'>-	.globl _Urem</div><div class='del'>-.urem:</div><div class='del'>-_Urem:	/* needed for export */</div><div class='del'>-</div><div class='del'>-	! Ready to divide.  Compute size of quotient; scale comparand.</div><div class='del'>-	orcc	%o1, %g0, %o5</div><div class='del'>-	bne	1f</div><div class='del'>-	 mov	%o0, %o3</div><div class='del'>-</div><div class='del'>-		! Divide by zero trap.  If it returns, return 0 (about as</div><div class='del'>-		! wrong as possible, but that is what SunOS does...).</div><div class='del'>-		ta	ST_DIV0</div><div class='del'>-		retl</div><div class='del'>-		 clr	%o0</div><div class='del'>-</div><div class='del'>-1:</div><div class='del'>-	cmp	%o3, %o5			! if %o1 exceeds %o0, done</div><div class='del'>-	blu	Lgot_result		! (and algorithm fails otherwise)</div><div class='del'>-	 clr	%o2</div><div class='del'>-</div><div class='del'>-	sethi	%hi(1 &lt;&lt; (32 - 4 - 1)), %g1</div><div class='del'>-</div><div class='del'>-	cmp	%o3, %g1</div><div class='del'>-	blu	Lnot_really_big</div><div class='del'>-	 clr	%o4</div><div class='del'>-</div><div class='del'>-	! Here the dividend is &gt;= 2**(31-N) or so.  We must be careful here,</div><div class='del'>-	! as our usual N-at-a-shot divide step will cause overflow and havoc.</div><div class='del'>-	! The number of bits in the result here is N*ITER+SC, where SC &lt;= N.</div><div class='del'>-	! Compute ITER in an unorthodox manner: know we need to shift V into</div><div class='del'>-	! the top decade: so do not even bother to compare to R.</div><div class='del'>-	1:</div><div class='del'>-		cmp	%o5, %g1</div><div class='del'>-		bgeu	3f</div><div class='del'>-		 mov	1, %g7</div><div class='del'>-</div><div class='del'>-		sll	%o5, 4, %o5</div><div class='del'>-</div><div class='del'>-		b	1b</div><div class='del'>-		 add	%o4, 1, %o4</div><div class='del'>-</div><div class='del'>-	! Now compute %g7.</div><div class='del'>-	2:</div><div class='del'>-		addcc	%o5, %o5, %o5</div><div class='del'>-		bcc	Lnot_too_big</div><div class='del'>-		 add	%g7, 1, %g7</div><div class='del'>-</div><div class='del'>-		! We get here if the %o1 overflowed while shifting.</div><div class='del'>-		! This means that %o3 has the high-order bit set.</div><div class='del'>-		! Restore %o5 and subtract from %o3.</div><div class='del'>-		sll	%g1, 4, %g1	! high order bit</div><div class='del'>-		srl	%o5, 1, %o5		! rest of %o5</div><div class='del'>-		add	%o5, %g1, %o5</div><div class='del'>-</div><div class='del'>-		b	Ldo_single_div</div><div class='del'>-		 sub	%g7, 1, %g7</div><div class='del'>-</div><div class='del'>-	Lnot_too_big:</div><div class='del'>-	3:</div><div class='del'>-		cmp	%o5, %o3</div><div class='del'>-		blu	2b</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-		be	Ldo_single_div</div><div class='del'>-		 nop</div><div class='del'>-	/* NB: these are commented out in the V8-Sparc manual as well */</div><div class='del'>-	/* (I do not understand this) */</div><div class='del'>-	! %o5 &gt; %o3: went too far: back up 1 step</div><div class='del'>-	!	srl	%o5, 1, %o5</div><div class='del'>-	!	dec	%g7</div><div class='del'>-	! do single-bit divide steps</div><div class='del'>-	!</div><div class='del'>-	! We have to be careful here.  We know that %o3 &gt;= %o5, so we can do the</div><div class='del'>-	! first divide step without thinking.  BUT, the others are conditional,</div><div class='del'>-	! and are only done if %o3 &gt;= 0.  Because both %o3 and %o5 may have the high-</div><div class='del'>-	! order bit set in the first step, just falling into the regular</div><div class='del'>-	! division loop will mess up the first time around.</div><div class='del'>-	! So we unroll slightly...</div><div class='del'>-	Ldo_single_div:</div><div class='del'>-		subcc	%g7, 1, %g7</div><div class='del'>-		bl	Lend_regular_divide</div><div class='del'>-		 nop</div><div class='del'>-</div><div class='del'>-		sub	%o3, %o5, %o3</div><div class='del'>-		mov	1, %o2</div><div class='del'>-</div><div class='del'>-		b	Lend_single_divloop</div><div class='del'>-		 nop</div><div class='del'>-	Lsingle_divloop:</div><div class='del'>-		sll	%o2, 1, %o2</div><div class='del'>-		bl	1f</div><div class='del'>-		 srl	%o5, 1, %o5</div><div class='del'>-		! %o3 &gt;= 0</div><div class='del'>-		sub	%o3, %o5, %o3</div><div class='del'>-		b	2f</div><div class='del'>-		 add	%o2, 1, %o2</div><div class='del'>-	1:	! %o3 &lt; 0</div><div class='del'>-		add	%o3, %o5, %o3</div><div class='del'>-		sub	%o2, 1, %o2</div><div class='del'>-	2:</div><div class='del'>-	Lend_single_divloop:</div><div class='del'>-		subcc	%g7, 1, %g7</div><div class='del'>-		bge	Lsingle_divloop</div><div class='del'>-		 tst	%o3</div><div class='del'>-</div><div class='del'>-		b,a	Lend_regular_divide</div><div class='del'>-</div><div class='del'>-Lnot_really_big:</div><div class='del'>-1:</div><div class='del'>-	sll	%o5, 4, %o5</div><div class='del'>-</div><div class='del'>-	cmp	%o5, %o3</div><div class='del'>-	bleu	1b</div><div class='del'>-	 addcc	%o4, 1, %o4</div><div class='del'>-</div><div class='del'>-	be	Lgot_result</div><div class='del'>-	 sub	%o4, 1, %o4</div><div class='del'>-</div><div class='del'>-	tst	%o3	! set up for initial iteration</div><div class='del'>-Ldivloop:</div><div class='del'>-	sll	%o2, 4, %o2</div><div class='del'>-		! depth 1, accumulated bits 0</div><div class='del'>-	bl	L.1.16</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 2, accumulated bits 1</div><div class='del'>-	bl	L.2.17</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits 3</div><div class='del'>-	bl	L.3.19</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 7</div><div class='del'>-	bl	L.4.23</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (7*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.23:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (7*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.19:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 5</div><div class='del'>-	bl	L.4.21</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (5*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.21:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (5*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.2.17:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits 1</div><div class='del'>-	bl	L.3.17</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 3</div><div class='del'>-	bl	L.4.19</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (3*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.19:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (3*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.17:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits 1</div><div class='del'>-	bl	L.4.17</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (1*2+1), %o2</div><div class='del'>-	</div><div class='del'>-L.4.17:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (1*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.1.16:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 2, accumulated bits -1</div><div class='del'>-	bl	L.2.15</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits -1</div><div class='del'>-	bl	L.3.15</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -1</div><div class='del'>-	bl	L.4.15</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-1*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.15:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-1*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.15:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -3</div><div class='del'>-	bl	L.4.13</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-3*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.13:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-3*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.2.15:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 3, accumulated bits -3</div><div class='del'>-	bl	L.3.13</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -5</div><div class='del'>-	bl	L.4.11</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-5*2+1), %o2</div><div class='del'>-	</div><div class='del'>-L.4.11:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-5*2-1), %o2</div><div class='del'>-</div><div class='del'>-L.3.13:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-			! depth 4, accumulated bits -7</div><div class='del'>-	bl	L.4.9</div><div class='del'>-	 srl	%o5,1,%o5</div><div class='del'>-	! remainder is positive</div><div class='del'>-	subcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-7*2+1), %o2</div><div class='del'>-</div><div class='del'>-L.4.9:</div><div class='del'>-	! remainder is negative</div><div class='del'>-	addcc	%o3,%o5,%o3</div><div class='del'>-	b	9f</div><div class='del'>-	 add	%o2, (-7*2-1), %o2</div><div class='del'>-</div><div class='del'>-	9:</div><div class='del'>-Lend_regular_divide:</div><div class='del'>-	subcc	%o4, 1, %o4</div><div class='del'>-	bge	Ldivloop</div><div class='del'>-	 tst	%o3</div><div class='del'>-</div><div class='del'>-	bl,a	Lgot_result</div><div class='del'>-	! non-restoring fixup here (one instruction only!)</div><div class='del'>-	add	%o3, %o1, %o3</div><div class='del'>-</div><div class='del'>-Lgot_result:</div><div class='del'>-</div><div class='del'>-	retl</div><div class='del'>-	 mov %o3, %o0</div><div class='del'>-</div><div class='del'>-	.globl	.urem_patch</div><div class='del'>-.urem_patch:</div><div class='del'>-	wr	%g0, 0x0, %y</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	udiv	%o0, %o1, %o2</div><div class='del'>-	umul	%o2, %o1, %o2</div><div class='del'>-	retl</div><div class='del'>-	 sub	%o0, %o2, %o0</div><div class='head'>diff --git a/arch/sparc/lib/usercopy.c b/arch/sparc/lib/usercopy.c<br/>index 14b363fec8a2..5c4284ce1c03 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/usercopy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/usercopy.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/usercopy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/usercopy.c</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> </div><div class='ctx'> void copy_from_user_overflow(void)</div><div class='head'>diff --git a/arch/sparc/lib/xor.S b/arch/sparc/lib/xor.S<br/>index f44f58f40234..2c05641c3263 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/lib/xor.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/lib/xor.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/lib/xor.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/lib/xor.S</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'>  * Copyright (C) 2006 David S. Miller &lt;davem@davemloft.net&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/visasm.h&gt;</div><div class='ctx'> #include &lt;asm/asi.h&gt;</div><div class='ctx'> #include &lt;asm/dcu.h&gt;</div><div class='hunk'>@@ -19,12 +20,9 @@</div><div class='ctx'>  *	!(len &amp; 127) &amp;&amp; len &gt;= 256</div><div class='ctx'>  */</div><div class='ctx'> 	.text</div><div class='del'>-	.align	32</div><div class='ctx'> </div><div class='ctx'> 	/* VIS versions. */</div><div class='del'>-	.globl	xor_vis_2</div><div class='del'>-	.type	xor_vis_2,#function</div><div class='del'>-xor_vis_2:</div><div class='add'>+ENTRY(xor_vis_2)</div><div class='ctx'> 	rd	%fprs, %o5</div><div class='ctx'> 	andcc	%o5, FPRS_FEF|FPRS_DU, %g0</div><div class='ctx'> 	be,pt	%icc, 0f</div><div class='hunk'>@@ -91,11 +89,9 @@ xor_vis_2:</div><div class='ctx'> 	wr	%g1, %g0, %asi</div><div class='ctx'> 	retl</div><div class='ctx'> 	  wr	%g0, 0, %fprs</div><div class='del'>-	.size	xor_vis_2, .-xor_vis_2</div><div class='add'>+ENDPROC(xor_vis_2)</div><div class='ctx'> </div><div class='del'>-	.globl	xor_vis_3</div><div class='del'>-	.type	xor_vis_3,#function</div><div class='del'>-xor_vis_3:</div><div class='add'>+ENTRY(xor_vis_3)</div><div class='ctx'> 	rd	%fprs, %o5</div><div class='ctx'> 	andcc	%o5, FPRS_FEF|FPRS_DU, %g0</div><div class='ctx'> 	be,pt	%icc, 0f</div><div class='hunk'>@@ -159,11 +155,9 @@ xor_vis_3:</div><div class='ctx'> 	wr	%g1, %g0, %asi</div><div class='ctx'> 	retl</div><div class='ctx'> 	 wr	%g0, 0, %fprs</div><div class='del'>-	.size	xor_vis_3, .-xor_vis_3</div><div class='add'>+ENDPROC(xor_vis_3)</div><div class='ctx'> </div><div class='del'>-	.globl	xor_vis_4</div><div class='del'>-	.type	xor_vis_4,#function</div><div class='del'>-xor_vis_4:</div><div class='add'>+ENTRY(xor_vis_4)</div><div class='ctx'> 	rd	%fprs, %o5</div><div class='ctx'> 	andcc	%o5, FPRS_FEF|FPRS_DU, %g0</div><div class='ctx'> 	be,pt	%icc, 0f</div><div class='hunk'>@@ -246,11 +240,9 @@ xor_vis_4:</div><div class='ctx'> 	wr	%g1, %g0, %asi</div><div class='ctx'> 	retl</div><div class='ctx'> 	 wr	%g0, 0, %fprs</div><div class='del'>-	.size	xor_vis_4, .-xor_vis_4</div><div class='add'>+ENDPROC(xor_vis_4)</div><div class='ctx'> </div><div class='del'>-	.globl	xor_vis_5</div><div class='del'>-	.type	xor_vis_5,#function</div><div class='del'>-xor_vis_5:</div><div class='add'>+ENTRY(xor_vis_5)</div><div class='ctx'> 	save	%sp, -192, %sp</div><div class='ctx'> 	rd	%fprs, %o5</div><div class='ctx'> 	andcc	%o5, FPRS_FEF|FPRS_DU, %g0</div><div class='hunk'>@@ -354,12 +346,10 @@ xor_vis_5:</div><div class='ctx'> 	wr	%g0, 0, %fprs</div><div class='ctx'> 	ret</div><div class='ctx'> 	 restore</div><div class='del'>-	.size	xor_vis_5, .-xor_vis_5</div><div class='add'>+ENDPROC(xor_vis_5)</div><div class='ctx'> </div><div class='ctx'> 	/* Niagara versions. */</div><div class='del'>-	.globl		xor_niagara_2</div><div class='del'>-	.type		xor_niagara_2,#function</div><div class='del'>-xor_niagara_2:		/* %o0=bytes, %o1=dest, %o2=src */</div><div class='add'>+ENTRY(xor_niagara_2) /* %o0=bytes, %o1=dest, %o2=src */</div><div class='ctx'> 	save		%sp, -192, %sp</div><div class='ctx'> 	prefetch	[%i1], #n_writes</div><div class='ctx'> 	prefetch	[%i2], #one_read</div><div class='hunk'>@@ -402,11 +392,9 @@ xor_niagara_2:		/* %o0=bytes, %o1=dest, %o2=src */</div><div class='ctx'> 	wr		%g7, 0x0, %asi</div><div class='ctx'> 	ret</div><div class='ctx'> 	 restore</div><div class='del'>-	.size		xor_niagara_2, .-xor_niagara_2</div><div class='add'>+ENDPROC(xor_niagara_2)</div><div class='ctx'> </div><div class='del'>-	.globl		xor_niagara_3</div><div class='del'>-	.type		xor_niagara_3,#function</div><div class='del'>-xor_niagara_3:		/* %o0=bytes, %o1=dest, %o2=src1, %o3=src2 */</div><div class='add'>+ENTRY(xor_niagara_3) /* %o0=bytes, %o1=dest, %o2=src1, %o3=src2 */</div><div class='ctx'> 	save		%sp, -192, %sp</div><div class='ctx'> 	prefetch	[%i1], #n_writes</div><div class='ctx'> 	prefetch	[%i2], #one_read</div><div class='hunk'>@@ -465,11 +453,9 @@ xor_niagara_3:		/* %o0=bytes, %o1=dest, %o2=src1, %o3=src2 */</div><div class='ctx'> 	wr		%g7, 0x0, %asi</div><div class='ctx'> 	ret</div><div class='ctx'> 	 restore</div><div class='del'>-	.size		xor_niagara_3, .-xor_niagara_3</div><div class='add'>+ENDPROC(xor_niagara_3)</div><div class='ctx'> </div><div class='del'>-	.globl		xor_niagara_4</div><div class='del'>-	.type		xor_niagara_4,#function</div><div class='del'>-xor_niagara_4:		/* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3 */</div><div class='add'>+ENTRY(xor_niagara_4) /* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3 */</div><div class='ctx'> 	save		%sp, -192, %sp</div><div class='ctx'> 	prefetch	[%i1], #n_writes</div><div class='ctx'> 	prefetch	[%i2], #one_read</div><div class='hunk'>@@ -549,11 +535,9 @@ xor_niagara_4:		/* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3 */</div><div class='ctx'> 	wr		%g7, 0x0, %asi</div><div class='ctx'> 	ret</div><div class='ctx'> 	 restore</div><div class='del'>-	.size		xor_niagara_4, .-xor_niagara_4</div><div class='add'>+ENDPROC(xor_niagara_4)</div><div class='ctx'> </div><div class='del'>-	.globl		xor_niagara_5</div><div class='del'>-	.type		xor_niagara_5,#function</div><div class='del'>-xor_niagara_5:		/* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3, %o5=src4 */</div><div class='add'>+ENTRY(xor_niagara_5) /* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3, %o5=src4 */</div><div class='ctx'> 	save		%sp, -192, %sp</div><div class='ctx'> 	prefetch	[%i1], #n_writes</div><div class='ctx'> 	prefetch	[%i2], #one_read</div><div class='hunk'>@@ -649,4 +633,4 @@ xor_niagara_5:		/* %o0=bytes, %o1=dest, %o2=src1, %o3=src2, %o4=src3, %o5=src4 *</div><div class='ctx'> 	wr		%g7, 0x0, %asi</div><div class='ctx'> 	ret</div><div class='ctx'> 	 restore</div><div class='del'>-	.size		xor_niagara_5, .-xor_niagara_5</div><div class='add'>+ENDPROC(xor_niagara_5)</div><div class='head'>diff --git a/arch/sparc/math-emu/math_64.c b/arch/sparc/math-emu/math_64.c<br/>index 2bbe2f28ad23..1704068da928 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/math-emu/math_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/math-emu/math_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/math-emu/math_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/math-emu/math_64.c</a></div><div class='hunk'>@@ -163,7 +163,7 @@ typedef union {</div><div class='ctx'> 	u64 q[2];</div><div class='ctx'> } *argp;</div><div class='ctx'> </div><div class='del'>-int do_mathemu(struct pt_regs *regs, struct fpustate *f)</div><div class='add'>+int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long pc = regs-&gt;tpc;</div><div class='ctx'> 	unsigned long tstate = regs-&gt;tstate;</div><div class='hunk'>@@ -218,7 +218,7 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f)</div><div class='ctx'> 			case FSQRTS: {</div><div class='ctx'> 				unsigned long x = current_thread_info()-&gt;xfsr[0];</div><div class='ctx'> </div><div class='del'>-				x = (x &gt;&gt; 14) &amp; 0xf;</div><div class='add'>+				x = (x &gt;&gt; 14) &amp; 0x7;</div><div class='ctx'> 				TYPE(x,1,1,1,1,0,0);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -226,7 +226,7 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f)</div><div class='ctx'> 			case FSQRTD: {</div><div class='ctx'> 				unsigned long x = current_thread_info()-&gt;xfsr[0];</div><div class='ctx'> </div><div class='del'>-				x = (x &gt;&gt; 14) &amp; 0xf;</div><div class='add'>+				x = (x &gt;&gt; 14) &amp; 0x7;</div><div class='ctx'> 				TYPE(x,2,1,2,1,0,0);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -357,9 +357,17 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f)</div><div class='ctx'> 	if (type) {</div><div class='ctx'> 		argp rs1 = NULL, rs2 = NULL, rd = NULL;</div><div class='ctx'> 		</div><div class='del'>-		freg = (current_thread_info()-&gt;xfsr[0] &gt;&gt; 14) &amp; 0xf;</div><div class='del'>-		if (freg != (type &gt;&gt; 9))</div><div class='del'>-			goto err;</div><div class='add'>+		/* Starting with UltraSPARC-T2, the cpu does not set the FP Trap</div><div class='add'>+		 * Type field in the %fsr to unimplemented_FPop.  Nor does it</div><div class='add'>+		 * use the fp_exception_other trap.  Instead it signals an</div><div class='add'>+		 * illegal instruction and leaves the FP trap type field of</div><div class='add'>+		 * the %fsr unchanged.</div><div class='add'>+		 */</div><div class='add'>+		if (!illegal_insn_trap) {</div><div class='add'>+			int ftt = (current_thread_info()-&gt;xfsr[0] &gt;&gt; 14) &amp; 0x7;</div><div class='add'>+			if (ftt != (type &gt;&gt; 9))</div><div class='add'>+				goto err;</div><div class='add'>+		}</div><div class='ctx'> 		current_thread_info()-&gt;xfsr[0] &amp;= ~0x1c000;</div><div class='ctx'> 		freg = ((insn &gt;&gt; 14) &amp; 0x1f);</div><div class='ctx'> 		switch (type &amp; 0x3) {</div><div class='head'>diff --git a/arch/sparc/mm/Makefile b/arch/sparc/mm/Makefile<br/>index 301421c11291..30c3eccfdf5a 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/Makefile</a></div><div class='hunk'>@@ -7,19 +7,13 @@ ccflags-y := -Werror</div><div class='ctx'> obj-$(CONFIG_SPARC64)   += ultra.o tlb.o tsb.o gup.o</div><div class='ctx'> obj-y                   += fault_$(BITS).o</div><div class='ctx'> obj-y                   += init_$(BITS).o</div><div class='del'>-obj-$(CONFIG_SPARC32)   += loadmmu.o</div><div class='del'>-obj-$(CONFIG_SPARC32)   += extable.o btfixup.o srmmu.o iommu.o io-unit.o</div><div class='add'>+obj-$(CONFIG_SPARC32)   += extable.o srmmu.o iommu.o io-unit.o</div><div class='add'>+obj-$(CONFIG_SPARC32)   += srmmu_access.o</div><div class='ctx'> obj-$(CONFIG_SPARC32)   += hypersparc.o viking.o tsunami.o swift.o</div><div class='del'>-obj-$(CONFIG_SPARC_LEON)+= leon_mm.o</div><div class='add'>+obj-$(CONFIG_SPARC32)   += leon_mm.o</div><div class='ctx'> </div><div class='ctx'> # Only used by sparc64</div><div class='ctx'> obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o</div><div class='ctx'> </div><div class='ctx'> # Only used by sparc32</div><div class='ctx'> obj-$(CONFIG_HIGHMEM)   += highmem.o</div><div class='del'>-</div><div class='del'>-ifdef CONFIG_SMP</div><div class='del'>-obj-$(CONFIG_SPARC32) += nosun4c.o</div><div class='del'>-else</div><div class='del'>-obj-$(CONFIG_SPARC32) += sun4c.o</div><div class='del'>-endif</div><div class='head'>diff --git a/arch/sparc/mm/btfixup.c b/arch/sparc/mm/btfixup.c<br/>deleted file mode 100644<br/>index 09d6af22db2d..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/btfixup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/btfixup.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,328 +0,0 @@</div><div class='del'>-/* btfixup.c: Boot time code fixup and relocator, so that</div><div class='del'>- * we can get rid of most indirect calls to achieve single</div><div class='del'>- * image sun4c and srmmu kernel.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/pgalloc.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/oplib.h&gt;</div><div class='del'>-#include &lt;asm/cacheflush.h&gt;</div><div class='del'>-</div><div class='del'>-#define BTFIXUP_OPTIMIZE_NOP</div><div class='del'>-#define BTFIXUP_OPTIMIZE_OTHER</div><div class='del'>-</div><div class='del'>-extern char *srmmu_name;</div><div class='del'>-static char version[] __initdata = "Boot time fixup v1.6. 4/Mar/98 Jakub Jelinek (jj@ultra.linux.cz). Patching kernel for ";</div><div class='del'>-static char str_sun4c[] __initdata = "sun4c\n";</div><div class='del'>-static char str_srmmu[] __initdata = "srmmu[%s]/";</div><div class='del'>-static char str_iommu[] __initdata = "iommu\n";</div><div class='del'>-static char str_iounit[] __initdata = "io-unit\n";</div><div class='del'>-</div><div class='del'>-static int visited __initdata = 0;</div><div class='del'>-extern unsigned int ___btfixup_start[], ___btfixup_end[], __init_begin[], __init_end[], __init_text_end[];</div><div class='del'>-extern unsigned int _stext[], _end[], __start___ksymtab[], __stop___ksymtab[];</div><div class='del'>-static char wrong_f[] __initdata = "Trying to set f fixup %p to invalid function %08x\n";</div><div class='del'>-static char wrong_b[] __initdata = "Trying to set b fixup %p to invalid function %08x\n";</div><div class='del'>-static char wrong_s[] __initdata = "Trying to set s fixup %p to invalid value %08x\n";</div><div class='del'>-static char wrong_h[] __initdata = "Trying to set h fixup %p to invalid value %08x\n";</div><div class='del'>-static char wrong_a[] __initdata = "Trying to set a fixup %p to invalid value %08x\n";</div><div class='del'>-static char wrong[] __initdata = "Wrong address for %c fixup %p\n";</div><div class='del'>-static char insn_f[] __initdata = "Fixup f %p refers to weird instructions at %p[%08x,%08x]\n";</div><div class='del'>-static char insn_b[] __initdata = "Fixup b %p doesn't refer to a SETHI at %p[%08x]\n";</div><div class='del'>-static char insn_s[] __initdata = "Fixup s %p doesn't refer to an OR at %p[%08x]\n";</div><div class='del'>-static char insn_h[] __initdata = "Fixup h %p doesn't refer to a SETHI at %p[%08x]\n";</div><div class='del'>-static char insn_a[] __initdata = "Fixup a %p doesn't refer to a SETHI nor OR at %p[%08x]\n";</div><div class='del'>-static char insn_i[] __initdata = "Fixup i %p doesn't refer to a valid instruction at %p[%08x]\n";</div><div class='del'>-static char fca_und[] __initdata = "flush_cache_all undefined in btfixup()\n";</div><div class='del'>-static char wrong_setaddr[] __initdata = "Garbled CALL/INT patch at %p[%08x,%08x,%08x]=%08x\n";</div><div class='del'>-</div><div class='del'>-#ifdef BTFIXUP_OPTIMIZE_OTHER</div><div class='del'>-static void __init set_addr(unsigned int *addr, unsigned int q1, int fmangled, unsigned int value)</div><div class='del'>-{</div><div class='del'>-	if (!fmangled)</div><div class='del'>-		*addr = value;</div><div class='del'>-	else {</div><div class='del'>-		unsigned int *q = (unsigned int *)q1;</div><div class='del'>-		if (*addr == 0x01000000) {</div><div class='del'>-			/* Noped */</div><div class='del'>-			*q = value;</div><div class='del'>-		} else if (addr[-1] == *q) {</div><div class='del'>-			/* Moved */</div><div class='del'>-			addr[-1] = value;</div><div class='del'>-			*q = value;</div><div class='del'>-		} else {</div><div class='del'>-			prom_printf(wrong_setaddr, addr-1, addr[-1], *addr, *q, value);</div><div class='del'>-			prom_halt();</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline void set_addr(unsigned int *addr, unsigned int q1, int fmangled, unsigned int value)</div><div class='del'>-{</div><div class='del'>-	*addr = value;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-void __init btfixup(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int *p, *q;</div><div class='del'>-	int type, count;</div><div class='del'>-	unsigned insn;</div><div class='del'>-	unsigned *addr;</div><div class='del'>-	int fmangled = 0;</div><div class='del'>-	void (*flush_cacheall)(void);</div><div class='del'>-	</div><div class='del'>-	if (!visited) {</div><div class='del'>-		visited++;</div><div class='del'>-		printk(version);</div><div class='del'>-		if (ARCH_SUN4C)</div><div class='del'>-			printk(str_sun4c);</div><div class='del'>-		else {</div><div class='del'>-			printk(str_srmmu, srmmu_name);</div><div class='del'>-			if (sparc_cpu_model == sun4d)</div><div class='del'>-				printk(str_iounit);</div><div class='del'>-			else</div><div class='del'>-				printk(str_iommu);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	for (p = ___btfixup_start; p &lt; ___btfixup_end; ) {</div><div class='del'>-		count = p[2];</div><div class='del'>-		q = p + 3;</div><div class='del'>-		switch (type = *(unsigned char *)p) {</div><div class='del'>-		case 'f': </div><div class='del'>-			count = p[3];</div><div class='del'>-			q = p + 4;</div><div class='del'>-			if (((p[0] &amp; 1) || p[1]) </div><div class='del'>-			    &amp;&amp; ((p[1] &amp; 3) || (unsigned *)(p[1]) &lt; _stext || (unsigned *)(p[1]) &gt;= _end)) {</div><div class='del'>-				prom_printf(wrong_f, p, p[1]);</div><div class='del'>-				prom_halt();</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 'b':</div><div class='del'>-			if (p[1] &lt; (unsigned long)__init_begin || p[1] &gt;= (unsigned long)__init_text_end || (p[1] &amp; 3)) {</div><div class='del'>-				prom_printf(wrong_b, p, p[1]);</div><div class='del'>-				prom_halt();</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 's':</div><div class='del'>-			if (p[1] + 0x1000 &gt;= 0x2000) {</div><div class='del'>-				prom_printf(wrong_s, p, p[1]);</div><div class='del'>-				prom_halt();</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 'h':</div><div class='del'>-			if (p[1] &amp; 0x3ff) {</div><div class='del'>-				prom_printf(wrong_h, p, p[1]);</div><div class='del'>-				prom_halt();</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 'a':</div><div class='del'>-			if (p[1] + 0x1000 &gt;= 0x2000 &amp;&amp; (p[1] &amp; 0x3ff)) {</div><div class='del'>-				prom_printf(wrong_a, p, p[1]);</div><div class='del'>-				prom_halt();</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (p[0] &amp; 1) {</div><div class='del'>-			p[0] &amp;= ~1;</div><div class='del'>-			while (count) {</div><div class='del'>-				fmangled = 0;</div><div class='del'>-				addr = (unsigned *)*q;</div><div class='del'>-				if (addr &lt; _stext || addr &gt;= _end) {</div><div class='del'>-					prom_printf(wrong, type, p);</div><div class='del'>-					prom_halt();</div><div class='del'>-				}</div><div class='del'>-				insn = *addr;</div><div class='del'>-#ifdef BTFIXUP_OPTIMIZE_OTHER				</div><div class='del'>-				if (type != 'f' &amp;&amp; q[1]) {</div><div class='del'>-					insn = *(unsigned int *)q[1];</div><div class='del'>-					if (!insn || insn == 1)</div><div class='del'>-						insn = *addr;</div><div class='del'>-					else</div><div class='del'>-						fmangled = 1;</div><div class='del'>-				}</div><div class='del'>-#endif</div><div class='del'>-				switch (type) {</div><div class='del'>-				case 'f':	/* CALL */</div><div class='del'>-					if (addr &gt;= __start___ksymtab &amp;&amp; addr &lt; __stop___ksymtab) {</div><div class='del'>-						*addr = p[1];</div><div class='del'>-						break;</div><div class='del'>-					} else if (!q[1]) {</div><div class='del'>-						if ((insn &amp; 0xc1c00000) == 0x01000000) { /* SETHI */</div><div class='del'>-							*addr = (insn &amp; 0xffc00000) | (p[1] &gt;&gt; 10); break;</div><div class='del'>-						} else if ((insn &amp; 0xc1f82000) == 0x80102000) { /* OR X, %LO(i), Y */</div><div class='del'>-							*addr = (insn &amp; 0xffffe000) | (p[1] &amp; 0x3ff); break;</div><div class='del'>-						} else if ((insn &amp; 0xc0000000) != 0x40000000) { /* !CALL */</div><div class='del'>-				bad_f:</div><div class='del'>-							prom_printf(insn_f, p, addr, insn, addr[1]);</div><div class='del'>-							prom_halt();</div><div class='del'>-						}</div><div class='del'>-					} else if (q[1] != 1)</div><div class='del'>-						addr[1] = q[1];</div><div class='del'>-					if (p[2] == BTFIXUPCALL_NORM) {</div><div class='del'>-				norm_f:	</div><div class='del'>-						*addr = 0x40000000 | ((p[1] - (unsigned)addr) &gt;&gt; 2);</div><div class='del'>-						q[1] = 0;</div><div class='del'>-						break;</div><div class='del'>-					}</div><div class='del'>-#ifndef BTFIXUP_OPTIMIZE_NOP</div><div class='del'>-					goto norm_f;</div><div class='del'>-#else</div><div class='del'>-					if (!(addr[1] &amp; 0x80000000)) {</div><div class='del'>-						if ((addr[1] &amp; 0xc1c00000) != 0x01000000)	/* !SETHI */</div><div class='del'>-							goto bad_f; /* CALL, Bicc, FBfcc, CBccc are weird in delay slot, aren't they? */</div><div class='del'>-					} else {</div><div class='del'>-						if ((addr[1] &amp; 0x01800000) == 0x01800000) {</div><div class='del'>-							if ((addr[1] &amp; 0x01f80000) == 0x01e80000) {</div><div class='del'>-								/* RESTORE */</div><div class='del'>-								goto norm_f; /* It is dangerous to patch that */</div><div class='del'>-							}</div><div class='del'>-							goto bad_f;</div><div class='del'>-						}</div><div class='del'>-						if ((addr[1] &amp; 0xffffe003) == 0x9e03e000) {</div><div class='del'>-							/* ADD %O7, XX, %o7 */</div><div class='del'>-							int displac = (addr[1] &lt;&lt; 19);</div><div class='del'>-							</div><div class='del'>-							displac = (displac &gt;&gt; 21) + 2;</div><div class='del'>-							*addr = (0x10800000) + (displac &amp; 0x3fffff);</div><div class='del'>-							q[1] = addr[1];</div><div class='del'>-							addr[1] = p[2];</div><div class='del'>-							break;</div><div class='del'>-						}</div><div class='del'>-						if ((addr[1] &amp; 0x201f) == 0x200f || (addr[1] &amp; 0x7c000) == 0x3c000)</div><div class='del'>-							goto norm_f; /* Someone is playing bad tricks with us: rs1 or rs2 is o7 */</div><div class='del'>-						if ((addr[1] &amp; 0x3e000000) == 0x1e000000)</div><div class='del'>-							goto norm_f; /* rd is %o7. We'd better take care. */</div><div class='del'>-					}</div><div class='del'>-					if (p[2] == BTFIXUPCALL_NOP) {</div><div class='del'>-						*addr = 0x01000000;</div><div class='del'>-						q[1] = 1;</div><div class='del'>-						break;</div><div class='del'>-					}</div><div class='del'>-#ifndef BTFIXUP_OPTIMIZE_OTHER</div><div class='del'>-					goto norm_f;</div><div class='del'>-#else</div><div class='del'>-					if (addr[1] == 0x01000000) {	/* NOP in the delay slot */</div><div class='del'>-						q[1] = addr[1];</div><div class='del'>-						*addr = p[2];</div><div class='del'>-						break;</div><div class='del'>-					}</div><div class='del'>-					if ((addr[1] &amp; 0xc0000000) != 0xc0000000) {</div><div class='del'>-						/* Not a memory operation */</div><div class='del'>-						if ((addr[1] &amp; 0x30000000) == 0x10000000) {</div><div class='del'>-							/* Ok, non-memory op with rd %oX */</div><div class='del'>-							if ((addr[1] &amp; 0x3e000000) == 0x1c000000)</div><div class='del'>-								goto bad_f; /* Aiee. Someone is playing strange %sp tricks */</div><div class='del'>-							if ((addr[1] &amp; 0x3e000000) &gt; 0x12000000 ||</div><div class='del'>-							    ((addr[1] &amp; 0x3e000000) == 0x12000000 &amp;&amp;</div><div class='del'>-							     p[2] != BTFIXUPCALL_STO1O0 &amp;&amp; p[2] != BTFIXUPCALL_SWAPO0O1) ||</div><div class='del'>-							    ((p[2] &amp; 0xffffe000) == BTFIXUPCALL_RETINT(0))) {</div><div class='del'>-								/* Nobody uses the result. We can nop it out. */</div><div class='del'>-								*addr = p[2];</div><div class='del'>-								q[1] = addr[1];</div><div class='del'>-								addr[1] = 0x01000000;</div><div class='del'>-								break;</div><div class='del'>-							}</div><div class='del'>-							if ((addr[1] &amp; 0xf1ffffe0) == 0x90100000) {</div><div class='del'>-								/* MOV %reg, %Ox */</div><div class='del'>-								if ((addr[1] &amp; 0x3e000000) == 0x10000000 &amp;&amp;</div><div class='del'>-								    (p[2] &amp; 0x7c000) == 0x20000) {</div><div class='del'>-								    	/* Ok, it is call xx; mov reg, %o0 and call optimizes</div><div class='del'>-								    	   to doing something on %o0. Patch the patch. */</div><div class='del'>-									*addr = (p[2] &amp; ~0x7c000) | ((addr[1] &amp; 0x1f) &lt;&lt; 14);</div><div class='del'>-									q[1] = addr[1];</div><div class='del'>-									addr[1] = 0x01000000;</div><div class='del'>-									break;</div><div class='del'>-								}</div><div class='del'>-								if ((addr[1] &amp; 0x3e000000) == 0x12000000 &amp;&amp;</div><div class='del'>-								    p[2] == BTFIXUPCALL_STO1O0) {</div><div class='del'>-								    	*addr = (p[2] &amp; ~0x3e000000) | ((addr[1] &amp; 0x1f) &lt;&lt; 25);</div><div class='del'>-								    	q[1] = addr[1];</div><div class='del'>-								    	addr[1] = 0x01000000;</div><div class='del'>-								    	break;</div><div class='del'>-								}</div><div class='del'>-							}</div><div class='del'>-						}</div><div class='del'>-					}</div><div class='del'>-					*addr = addr[1];</div><div class='del'>-					q[1] = addr[1];</div><div class='del'>-					addr[1] = p[2];</div><div class='del'>-					break;</div><div class='del'>-#endif /* BTFIXUP_OPTIMIZE_OTHER */</div><div class='del'>-#endif /* BTFIXUP_OPTIMIZE_NOP */</div><div class='del'>-				case 'b':	/* BLACKBOX */</div><div class='del'>-					/* Has to be sethi i, xx */</div><div class='del'>-					if ((insn &amp; 0xc1c00000) != 0x01000000) {</div><div class='del'>-						prom_printf(insn_b, p, addr, insn);</div><div class='del'>-						prom_halt();</div><div class='del'>-					} else {</div><div class='del'>-						void (*do_fixup)(unsigned *);</div><div class='del'>-						</div><div class='del'>-						do_fixup = (void (*)(unsigned *))p[1];</div><div class='del'>-						do_fixup(addr);</div><div class='del'>-					}</div><div class='del'>-					break;</div><div class='del'>-				case 's':	/* SIMM13 */</div><div class='del'>-					/* Has to be or %g0, i, xx */</div><div class='del'>-					if ((insn &amp; 0xc1ffe000) != 0x80102000) {</div><div class='del'>-						prom_printf(insn_s, p, addr, insn);</div><div class='del'>-						prom_halt();</div><div class='del'>-					}</div><div class='del'>-					set_addr(addr, q[1], fmangled, (insn &amp; 0xffffe000) | (p[1] &amp; 0x1fff));</div><div class='del'>-					break;</div><div class='del'>-				case 'h':	/* SETHI */</div><div class='del'>-					/* Has to be sethi i, xx */</div><div class='del'>-					if ((insn &amp; 0xc1c00000) != 0x01000000) {</div><div class='del'>-						prom_printf(insn_h, p, addr, insn);</div><div class='del'>-						prom_halt();</div><div class='del'>-					}</div><div class='del'>-					set_addr(addr, q[1], fmangled, (insn &amp; 0xffc00000) | (p[1] &gt;&gt; 10));</div><div class='del'>-					break;</div><div class='del'>-				case 'a':	/* HALF */</div><div class='del'>-					/* Has to be sethi i, xx or or %g0, i, xx */</div><div class='del'>-					if ((insn &amp; 0xc1c00000) != 0x01000000 &amp;&amp;</div><div class='del'>-					    (insn &amp; 0xc1ffe000) != 0x80102000) {</div><div class='del'>-						prom_printf(insn_a, p, addr, insn);</div><div class='del'>-						prom_halt();</div><div class='del'>-					}</div><div class='del'>-					if (p[1] &amp; 0x3ff)</div><div class='del'>-						set_addr(addr, q[1], fmangled, </div><div class='del'>-							(insn &amp; 0x3e000000) | 0x80102000 | (p[1] &amp; 0x1fff));</div><div class='del'>-					else</div><div class='del'>-						set_addr(addr, q[1], fmangled, </div><div class='del'>-							(insn &amp; 0x3e000000) | 0x01000000 | (p[1] &gt;&gt; 10));</div><div class='del'>-					break;</div><div class='del'>-				case 'i':	/* INT */</div><div class='del'>-					if ((insn &amp; 0xc1c00000) == 0x01000000) /* %HI */</div><div class='del'>-						set_addr(addr, q[1], fmangled, (insn &amp; 0xffc00000) | (p[1] &gt;&gt; 10));</div><div class='del'>-					else if ((insn &amp; 0x80002000) == 0x80002000) /* %LO */</div><div class='del'>-						set_addr(addr, q[1], fmangled, (insn &amp; 0xffffe000) | (p[1] &amp; 0x3ff));</div><div class='del'>-					else {</div><div class='del'>-						prom_printf(insn_i, p, addr, insn);</div><div class='del'>-						prom_halt();</div><div class='del'>-					}</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='del'>-				count -= 2;</div><div class='del'>-				q += 2;</div><div class='del'>-			}</div><div class='del'>-		} else</div><div class='del'>-			p = q + count;</div><div class='del'>-	}</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	flush_cacheall = (void (*)(void))BTFIXUPVAL_CALL(local_flush_cache_all);</div><div class='del'>-#else</div><div class='del'>-	flush_cacheall = (void (*)(void))BTFIXUPVAL_CALL(flush_cache_all);</div><div class='del'>-#endif</div><div class='del'>-	if (!flush_cacheall) {</div><div class='del'>-		prom_printf(fca_und);</div><div class='del'>-		prom_halt();</div><div class='del'>-	}</div><div class='del'>-	(*flush_cacheall)();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/sparc/mm/fault_32.c b/arch/sparc/mm/fault_32.c<br/>index df3155a17991..f46cf6be3370 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/fault_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/fault_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/fault_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/fault_32.c</a></div><div class='hunk'>@@ -24,29 +24,19 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/memreg.h&gt;</div><div class='ctx'> #include &lt;asm/openprom.h&gt;</div><div class='ctx'> #include &lt;asm/oplib.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> </div><div class='del'>-extern int prom_node_root;</div><div class='del'>-</div><div class='ctx'> int show_unhandled_signals = 1;</div><div class='ctx'> </div><div class='ctx'> /* At boot time we determine these two values necessary for setting</div><div class='ctx'>  * up the segment maps and page table entries (pte's).</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-int num_segmaps, num_contexts;</div><div class='del'>-int invalid_segment;</div><div class='del'>-</div><div class='del'>-/* various Virtual Address Cache parameters we find at boot time... */</div><div class='del'>-</div><div class='del'>-int vac_size, vac_linesize, vac_do_hw_vac_flushes;</div><div class='del'>-int vac_entries_per_context, vac_entries_per_segment;</div><div class='del'>-int vac_entries_per_page;</div><div class='add'>+int num_contexts;</div><div class='ctx'> </div><div class='ctx'> /* Return how much physical memory we have.  */</div><div class='ctx'> unsigned long probe_memory(void)</div><div class='hunk'>@@ -60,55 +50,36 @@ unsigned long probe_memory(void)</div><div class='ctx'> 	return total;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern void sun4c_complete_all_stores(void);</div><div class='del'>-</div><div class='del'>-/* Whee, a level 15 NMI interrupt memory error.  Let's have fun... */</div><div class='del'>-asmlinkage void sparc_lvl15_nmi(struct pt_regs *regs, unsigned long serr,</div><div class='del'>-				unsigned long svaddr, unsigned long aerr,</div><div class='del'>-				unsigned long avaddr)</div><div class='del'>-{</div><div class='del'>-	sun4c_complete_all_stores();</div><div class='del'>-	printk("FAULT: NMI received\n");</div><div class='del'>-	printk("SREGS: Synchronous Error %08lx\n", serr);</div><div class='del'>-	printk("       Synchronous Vaddr %08lx\n", svaddr);</div><div class='del'>-	printk("      Asynchronous Error %08lx\n", aerr);</div><div class='del'>-	printk("      Asynchronous Vaddr %08lx\n", avaddr);</div><div class='del'>-	if (sun4c_memerr_reg)</div><div class='del'>-		printk("     Memory Parity Error %08lx\n", *sun4c_memerr_reg);</div><div class='del'>-	printk("REGISTER DUMP:\n");</div><div class='del'>-	show_regs(regs);</div><div class='del'>-	prom_halt();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void unhandled_fault(unsigned long, struct task_struct *,</div><div class='ctx'> 		struct pt_regs *) __attribute__ ((noreturn));</div><div class='ctx'> </div><div class='del'>-static void unhandled_fault(unsigned long address, struct task_struct *tsk,</div><div class='del'>-                     struct pt_regs *regs)</div><div class='add'>+static void __noreturn unhandled_fault(unsigned long address,</div><div class='add'>+				       struct task_struct *tsk,</div><div class='add'>+				       struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	if((unsigned long) address &lt; PAGE_SIZE) {</div><div class='add'>+	if ((unsigned long) address &lt; PAGE_SIZE) {</div><div class='ctx'> 		printk(KERN_ALERT</div><div class='ctx'> 		    "Unable to handle kernel NULL pointer dereference\n");</div><div class='ctx'> 	} else {</div><div class='del'>-		printk(KERN_ALERT "Unable to handle kernel paging request "</div><div class='del'>-		       "at virtual address %08lx\n", address);</div><div class='add'>+		printk(KERN_ALERT "Unable to handle kernel paging request at virtual address %08lx\n",</div><div class='add'>+		       address);</div><div class='ctx'> 	}</div><div class='ctx'> 	printk(KERN_ALERT "tsk-&gt;{mm,active_mm}-&gt;context = %08lx\n",</div><div class='ctx'> 		(tsk-&gt;mm ? tsk-&gt;mm-&gt;context : tsk-&gt;active_mm-&gt;context));</div><div class='ctx'> 	printk(KERN_ALERT "tsk-&gt;{mm,active_mm}-&gt;pgd = %08lx\n",</div><div class='ctx'> 		(tsk-&gt;mm ? (unsigned long) tsk-&gt;mm-&gt;pgd :</div><div class='del'>-		 	(unsigned long) tsk-&gt;active_mm-&gt;pgd));</div><div class='add'>+			(unsigned long) tsk-&gt;active_mm-&gt;pgd));</div><div class='ctx'> 	die_if_kernel("Oops", regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-asmlinkage int lookup_fault(unsigned long pc, unsigned long ret_pc, </div><div class='add'>+asmlinkage int lookup_fault(unsigned long pc, unsigned long ret_pc,</div><div class='ctx'> 			    unsigned long address)</div><div class='ctx'> {</div><div class='ctx'> 	struct pt_regs regs;</div><div class='ctx'> 	unsigned long g2;</div><div class='ctx'> 	unsigned int insn;</div><div class='ctx'> 	int i;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	i = search_extables_range(ret_pc, &amp;g2);</div><div class='ctx'> 	switch (i) {</div><div class='ctx'> 	case 3:</div><div class='hunk'>@@ -128,14 +99,14 @@ asmlinkage int lookup_fault(unsigned long pc, unsigned long ret_pc,</div><div class='ctx'> 		/* for _from_ macros */</div><div class='ctx'> 		insn = *((unsigned int *) pc);</div><div class='ctx'> 		if (!((insn &gt;&gt; 21) &amp; 1) || ((insn&gt;&gt;19)&amp;0x3f) == 15)</div><div class='del'>-			return 2; </div><div class='del'>-		break; </div><div class='add'>+			return 2;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memset(&amp;regs, 0, sizeof (regs));</div><div class='add'>+	memset(&amp;regs, 0, sizeof(regs));</div><div class='ctx'> 	regs.pc = pc;</div><div class='ctx'> 	regs.npc = pc + 4;</div><div class='ctx'> 	__asm__ __volatile__(</div><div class='hunk'>@@ -198,11 +169,10 @@ static unsigned long compute_si_addr(struct pt_regs *regs, int text_fault)</div><div class='ctx'> 	if (text_fault)</div><div class='ctx'> 		return regs-&gt;pc;</div><div class='ctx'> </div><div class='del'>-	if (regs-&gt;psr &amp; PSR_PS) {</div><div class='add'>+	if (regs-&gt;psr &amp; PSR_PS)</div><div class='ctx'> 		insn = *(unsigned int *) regs-&gt;pc;</div><div class='del'>-	} else {</div><div class='add'>+	else</div><div class='ctx'> 		__get_user(insn, (unsigned int *) regs-&gt;pc);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return safe_compute_effective_address(regs, insn);</div><div class='ctx'> }</div><div class='hunk'>@@ -228,7 +198,7 @@ asmlinkage void do_sparc_fault(struct pt_regs *regs, int text_fault, int write,</div><div class='ctx'> 	unsigned int flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |</div><div class='ctx'> 			      (write ? FAULT_FLAG_WRITE : 0));</div><div class='ctx'> </div><div class='del'>-	if(text_fault)</div><div class='add'>+	if (text_fault)</div><div class='ctx'> 		address = regs-&gt;pc;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -241,36 +211,32 @@ asmlinkage void do_sparc_fault(struct pt_regs *regs, int text_fault, int write,</div><div class='ctx'> 	 * nothing more.</div><div class='ctx'> 	 */</div><div class='ctx'> 	code = SEGV_MAPERR;</div><div class='del'>-	if (!ARCH_SUN4C &amp;&amp; address &gt;= TASK_SIZE)</div><div class='add'>+	if (address &gt;= TASK_SIZE)</div><div class='ctx'> 		goto vmalloc_fault;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we're in an interrupt or have no user</div><div class='ctx'> 	 * context, we must not take the fault..</div><div class='ctx'> 	 */</div><div class='del'>-        if (in_atomic() || !mm)</div><div class='del'>-                goto no_context;</div><div class='add'>+	if (in_atomic() || !mm)</div><div class='add'>+		goto no_context;</div><div class='ctx'> </div><div class='ctx'> 	perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);</div><div class='ctx'> </div><div class='ctx'> retry:</div><div class='ctx'> 	down_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The kernel referencing a bad kernel pointer can lock up</div><div class='del'>-	 * a sun4c machine completely, so we must attempt recovery.</div><div class='del'>-	 */</div><div class='del'>-	if(!from_user &amp;&amp; address &gt;= PAGE_OFFSET)</div><div class='add'>+	if (!from_user &amp;&amp; address &gt;= PAGE_OFFSET)</div><div class='ctx'> 		goto bad_area;</div><div class='ctx'> </div><div class='ctx'> 	vma = find_vma(mm, address);</div><div class='del'>-	if(!vma)</div><div class='add'>+	if (!vma)</div><div class='ctx'> 		goto bad_area;</div><div class='del'>-	if(vma-&gt;vm_start &lt;= address)</div><div class='add'>+	if (vma-&gt;vm_start &lt;= address)</div><div class='ctx'> 		goto good_area;</div><div class='del'>-	if(!(vma-&gt;vm_flags &amp; VM_GROWSDOWN))</div><div class='add'>+	if (!(vma-&gt;vm_flags &amp; VM_GROWSDOWN))</div><div class='ctx'> 		goto bad_area;</div><div class='del'>-	if(expand_stack(vma, address))</div><div class='add'>+	if (expand_stack(vma, address))</div><div class='ctx'> 		goto bad_area;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ok, we have a good vm_area for this memory access, so</div><div class='hunk'>@@ -278,12 +244,12 @@ retry:</div><div class='ctx'> 	 */</div><div class='ctx'> good_area:</div><div class='ctx'> 	code = SEGV_ACCERR;</div><div class='del'>-	if(write) {</div><div class='del'>-		if(!(vma-&gt;vm_flags &amp; VM_WRITE))</div><div class='add'>+	if (write) {</div><div class='add'>+		if (!(vma-&gt;vm_flags &amp; VM_WRITE))</div><div class='ctx'> 			goto bad_area;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Allow reads even for write-only mappings */</div><div class='del'>-		if(!(vma-&gt;vm_flags &amp; (VM_READ | VM_EXEC)))</div><div class='add'>+		if (!(vma-&gt;vm_flags &amp; (VM_READ | VM_EXEC)))</div><div class='ctx'> 			goto bad_area;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -349,14 +315,16 @@ no_context:</div><div class='ctx'> 	g2 = regs-&gt;u_regs[UREG_G2];</div><div class='ctx'> 	if (!from_user) {</div><div class='ctx'> 		fixup = search_extables_range(regs-&gt;pc, &amp;g2);</div><div class='del'>-		if (fixup &gt; 10) { /* Values below are reserved for other things */</div><div class='add'>+		/* Values below 10 are reserved for other things */</div><div class='add'>+		if (fixup &gt; 10) {</div><div class='ctx'> 			extern const unsigned __memset_start[];</div><div class='ctx'> 			extern const unsigned __memset_end[];</div><div class='ctx'> 			extern const unsigned __csum_partial_copy_start[];</div><div class='ctx'> 			extern const unsigned __csum_partial_copy_end[];</div><div class='ctx'> </div><div class='ctx'> #ifdef DEBUG_EXCEPTIONS</div><div class='del'>-			printk("Exception: PC&lt;%08lx&gt; faddr&lt;%08lx&gt;\n", regs-&gt;pc, address);</div><div class='add'>+			printk("Exception: PC&lt;%08lx&gt; faddr&lt;%08lx&gt;\n",</div><div class='add'>+			       regs-&gt;pc, address);</div><div class='ctx'> 			printk("EX_TABLE: insn&lt;%08lx&gt; fixup&lt;%08x&gt; g2&lt;%08lx&gt;\n",</div><div class='ctx'> 				regs-&gt;pc, fixup, g2);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -364,7 +332,7 @@ no_context:</div><div class='ctx'> 			     regs-&gt;pc &lt; (unsigned long)__memset_end) ||</div><div class='ctx'> 			    (regs-&gt;pc &gt;= (unsigned long)__csum_partial_copy_start &amp;&amp;</div><div class='ctx'> 			     regs-&gt;pc &lt; (unsigned long)__csum_partial_copy_end)) {</div><div class='del'>-			        regs-&gt;u_regs[UREG_I4] = address;</div><div class='add'>+				regs-&gt;u_regs[UREG_I4] = address;</div><div class='ctx'> 				regs-&gt;u_regs[UREG_I5] = regs-&gt;pc;</div><div class='ctx'> 			}</div><div class='ctx'> 			regs-&gt;u_regs[UREG_G2] = g2;</div><div class='hunk'>@@ -373,8 +341,8 @@ no_context:</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	</div><div class='del'>-	unhandled_fault (address, tsk, regs);</div><div class='add'>+</div><div class='add'>+	unhandled_fault(address, tsk, regs);</div><div class='ctx'> 	do_exit(SIGKILL);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -420,97 +388,12 @@ vmalloc_fault:</div><div class='ctx'> </div><div class='ctx'> 		if (pmd_present(*pmd) || !pmd_present(*pmd_k))</div><div class='ctx'> 			goto bad_area_nosemaphore;</div><div class='add'>+</div><div class='ctx'> 		*pmd = *pmd_k;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-asmlinkage void do_sun4c_fault(struct pt_regs *regs, int text_fault, int write,</div><div class='del'>-			       unsigned long address)</div><div class='del'>-{</div><div class='del'>-	extern void sun4c_update_mmu_cache(struct vm_area_struct *,</div><div class='del'>-					   unsigned long,pte_t *);</div><div class='del'>-	extern pte_t *sun4c_pte_offset_kernel(pmd_t *,unsigned long);</div><div class='del'>-	struct task_struct *tsk = current;</div><div class='del'>-	struct mm_struct *mm = tsk-&gt;mm;</div><div class='del'>-	pgd_t *pgdp;</div><div class='del'>-	pte_t *ptep;</div><div class='del'>-</div><div class='del'>-	if (text_fault) {</div><div class='del'>-		address = regs-&gt;pc;</div><div class='del'>-	} else if (!write &amp;&amp;</div><div class='del'>-		   !(regs-&gt;psr &amp; PSR_PS)) {</div><div class='del'>-		unsigned int insn, __user *ip;</div><div class='del'>-</div><div class='del'>-		ip = (unsigned int __user *)regs-&gt;pc;</div><div class='del'>-		if (!get_user(insn, ip)) {</div><div class='del'>-			if ((insn &amp; 0xc1680000) == 0xc0680000)</div><div class='del'>-				write = 1;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!mm) {</div><div class='del'>-		/* We are oopsing. */</div><div class='del'>-		do_sparc_fault(regs, text_fault, write, address);</div><div class='del'>-		BUG();	/* P3 Oops already, you bitch */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pgdp = pgd_offset(mm, address);</div><div class='del'>-	ptep = sun4c_pte_offset_kernel((pmd_t *) pgdp, address);</div><div class='del'>-</div><div class='del'>-	if (pgd_val(*pgdp)) {</div><div class='del'>-	    if (write) {</div><div class='del'>-		if ((pte_val(*ptep) &amp; (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_PRESENT))</div><div class='del'>-				   == (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_PRESENT)) {</div><div class='del'>-			unsigned long flags;</div><div class='del'>-</div><div class='del'>-			*ptep = __pte(pte_val(*ptep) | _SUN4C_PAGE_ACCESSED |</div><div class='del'>-				      _SUN4C_PAGE_MODIFIED |</div><div class='del'>-				      _SUN4C_PAGE_VALID |</div><div class='del'>-				      _SUN4C_PAGE_DIRTY);</div><div class='del'>-</div><div class='del'>-			local_irq_save(flags);</div><div class='del'>-			if (sun4c_get_segmap(address) != invalid_segment) {</div><div class='del'>-				sun4c_put_pte(address, pte_val(*ptep));</div><div class='del'>-				local_irq_restore(flags);</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-			local_irq_restore(flags);</div><div class='del'>-		}</div><div class='del'>-	    } else {</div><div class='del'>-		if ((pte_val(*ptep) &amp; (_SUN4C_PAGE_READ|_SUN4C_PAGE_PRESENT))</div><div class='del'>-				   == (_SUN4C_PAGE_READ|_SUN4C_PAGE_PRESENT)) {</div><div class='del'>-			unsigned long flags;</div><div class='del'>-</div><div class='del'>-			*ptep = __pte(pte_val(*ptep) | _SUN4C_PAGE_ACCESSED |</div><div class='del'>-				      _SUN4C_PAGE_VALID);</div><div class='del'>-</div><div class='del'>-			local_irq_save(flags);</div><div class='del'>-			if (sun4c_get_segmap(address) != invalid_segment) {</div><div class='del'>-				sun4c_put_pte(address, pte_val(*ptep));</div><div class='del'>-				local_irq_restore(flags);</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-			local_irq_restore(flags);</div><div class='del'>-		}</div><div class='del'>-	    }</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* This conditional is 'interesting'. */</div><div class='del'>-	if (pgd_val(*pgdp) &amp;&amp; !(write &amp;&amp; !(pte_val(*ptep) &amp; _SUN4C_PAGE_WRITE))</div><div class='del'>-	    &amp;&amp; (pte_val(*ptep) &amp; _SUN4C_PAGE_VALID))</div><div class='del'>-		/* Note: It is safe to not grab the MMAP semaphore here because</div><div class='del'>-		 *       we know that update_mmu_cache() will not sleep for</div><div class='del'>-		 *       any reason (at least not in the current implementation)</div><div class='del'>-		 *       and therefore there is no danger of another thread getting</div><div class='del'>-		 *       on the CPU and doing a shrink_mmap() on this vma.</div><div class='del'>-		 */</div><div class='del'>-		sun4c_update_mmu_cache (find_vma(current-&gt;mm, address), address,</div><div class='del'>-					ptep);</div><div class='del'>-	else</div><div class='del'>-		do_sparc_fault(regs, text_fault, write, address);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* This always deals with user addresses. */</div><div class='ctx'> static void force_user_fault(unsigned long address, int write)</div><div class='ctx'> {</div><div class='hunk'>@@ -523,21 +406,21 @@ static void force_user_fault(unsigned long address, int write)</div><div class='ctx'> </div><div class='ctx'> 	down_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	vma = find_vma(mm, address);</div><div class='del'>-	if(!vma)</div><div class='add'>+	if (!vma)</div><div class='ctx'> 		goto bad_area;</div><div class='del'>-	if(vma-&gt;vm_start &lt;= address)</div><div class='add'>+	if (vma-&gt;vm_start &lt;= address)</div><div class='ctx'> 		goto good_area;</div><div class='del'>-	if(!(vma-&gt;vm_flags &amp; VM_GROWSDOWN))</div><div class='add'>+	if (!(vma-&gt;vm_flags &amp; VM_GROWSDOWN))</div><div class='ctx'> 		goto bad_area;</div><div class='del'>-	if(expand_stack(vma, address))</div><div class='add'>+	if (expand_stack(vma, address))</div><div class='ctx'> 		goto bad_area;</div><div class='ctx'> good_area:</div><div class='ctx'> 	code = SEGV_ACCERR;</div><div class='del'>-	if(write) {</div><div class='del'>-		if(!(vma-&gt;vm_flags &amp; VM_WRITE))</div><div class='add'>+	if (write) {</div><div class='add'>+		if (!(vma-&gt;vm_flags &amp; VM_WRITE))</div><div class='ctx'> 			goto bad_area;</div><div class='ctx'> 	} else {</div><div class='del'>-		if(!(vma-&gt;vm_flags &amp; (VM_READ | VM_EXEC)))</div><div class='add'>+		if (!(vma-&gt;vm_flags &amp; (VM_READ | VM_EXEC)))</div><div class='ctx'> 			goto bad_area;</div><div class='ctx'> 	}</div><div class='ctx'> 	switch (handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0)) {</div><div class='hunk'>@@ -568,7 +451,7 @@ void window_overflow_fault(void)</div><div class='ctx'> 	unsigned long sp;</div><div class='ctx'> </div><div class='ctx'> 	sp = current_thread_info()-&gt;rwbuf_stkptrs[0];</div><div class='del'>-	if(((sp + 0x38) &amp; PAGE_MASK) != (sp &amp; PAGE_MASK))</div><div class='add'>+	if (((sp + 0x38) &amp; PAGE_MASK) != (sp &amp; PAGE_MASK))</div><div class='ctx'> 		force_user_fault(sp + 0x38, 1);</div><div class='ctx'> 	force_user_fault(sp, 1);</div><div class='ctx'> </div><div class='hunk'>@@ -577,7 +460,7 @@ void window_overflow_fault(void)</div><div class='ctx'> </div><div class='ctx'> void window_underflow_fault(unsigned long sp)</div><div class='ctx'> {</div><div class='del'>-	if(((sp + 0x38) &amp; PAGE_MASK) != (sp &amp; PAGE_MASK))</div><div class='add'>+	if (((sp + 0x38) &amp; PAGE_MASK) != (sp &amp; PAGE_MASK))</div><div class='ctx'> 		force_user_fault(sp + 0x38, 0);</div><div class='ctx'> 	force_user_fault(sp, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -589,7 +472,7 @@ void window_ret_fault(struct pt_regs *regs)</div><div class='ctx'> 	unsigned long sp;</div><div class='ctx'> </div><div class='ctx'> 	sp = regs-&gt;u_regs[UREG_FP];</div><div class='del'>-	if(((sp + 0x38) &amp; PAGE_MASK) != (sp &amp; PAGE_MASK))</div><div class='add'>+	if (((sp + 0x38) &amp; PAGE_MASK) != (sp &amp; PAGE_MASK))</div><div class='ctx'> 		force_user_fault(sp + 0x38, 0);</div><div class='ctx'> 	force_user_fault(sp, 0);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/mm/init_32.c b/arch/sparc/mm/init_32.c<br/>index c5f9021b1a01..ef5c779ec855 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/init_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/init_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/init_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/init_32.c</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='del'>-#include &lt;asm/vac-ops.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/vaddrs.h&gt;</div><div class='hunk'>@@ -45,9 +44,6 @@ EXPORT_SYMBOL(phys_base);</div><div class='ctx'> unsigned long pfn_base;</div><div class='ctx'> EXPORT_SYMBOL(pfn_base);</div><div class='ctx'> </div><div class='del'>-unsigned long page_kernel;</div><div class='del'>-EXPORT_SYMBOL(page_kernel);</div><div class='del'>-</div><div class='ctx'> struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS+1];</div><div class='ctx'> unsigned long sparc_unmapped_base;</div><div class='ctx'> </div><div class='hunk'>@@ -287,44 +283,16 @@ unsigned long __init bootmem_init(unsigned long *pages_avail)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * check_pgt_cache</div><div class='del'>- *</div><div class='del'>- * This is called at the end of unmapping of VMA (zap_page_range),</div><div class='del'>- * to rescan the page cache for architecture specific things,</div><div class='del'>- * presumably something like sun4/sun4c PMEGs. Most architectures</div><div class='del'>- * define check_pgt_cache empty.</div><div class='del'>- *</div><div class='del'>- * We simply copy the 2.4 implementation for now.</div><div class='del'>- */</div><div class='del'>-static int pgt_cache_water[2] = { 25, 50 };</div><div class='del'>-</div><div class='del'>-void check_pgt_cache(void)</div><div class='del'>-{</div><div class='del'>-	do_check_pgt_cache(pgt_cache_water[0], pgt_cache_water[1]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * paging_init() sets up the page tables: We call the MMU specific</div><div class='ctx'>  * init routine based upon the Sun model type on the Sparc.</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-extern void sun4c_paging_init(void);</div><div class='ctx'> extern void srmmu_paging_init(void);</div><div class='ctx'> extern void device_scan(void);</div><div class='ctx'> </div><div class='del'>-pgprot_t PAGE_SHARED __read_mostly;</div><div class='del'>-EXPORT_SYMBOL(PAGE_SHARED);</div><div class='del'>-</div><div class='ctx'> void __init paging_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	switch(sparc_cpu_model) {</div><div class='del'>-	case sun4c:</div><div class='del'>-	case sun4e:</div><div class='del'>-	case sun4:</div><div class='del'>-		sun4c_paging_init();</div><div class='del'>-		sparc_unmapped_base = 0xe0000000;</div><div class='del'>-		BTFIXUPSET_SETHI(sparc_unmapped_base, 0xe0000000);</div><div class='del'>-		break;</div><div class='ctx'> 	case sparc_leon:</div><div class='ctx'> 		leon_init();</div><div class='ctx'> 		/* fall through */</div><div class='hunk'>@@ -332,7 +300,6 @@ void __init paging_init(void)</div><div class='ctx'> 	case sun4d:</div><div class='ctx'> 		srmmu_paging_init();</div><div class='ctx'> 		sparc_unmapped_base = 0x50000000;</div><div class='del'>-		BTFIXUPSET_SETHI(sparc_unmapped_base, 0x50000000);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		prom_printf("paging_init: Cannot init paging on this Sparc\n");</div><div class='hunk'>@@ -341,24 +308,6 @@ void __init paging_init(void)</div><div class='ctx'> 		prom_halt();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Initialize the protection map with non-constant, MMU dependent values. */</div><div class='del'>-	protection_map[0] = PAGE_NONE;</div><div class='del'>-	protection_map[1] = PAGE_READONLY;</div><div class='del'>-	protection_map[2] = PAGE_COPY;</div><div class='del'>-	protection_map[3] = PAGE_COPY;</div><div class='del'>-	protection_map[4] = PAGE_READONLY;</div><div class='del'>-	protection_map[5] = PAGE_READONLY;</div><div class='del'>-	protection_map[6] = PAGE_COPY;</div><div class='del'>-	protection_map[7] = PAGE_COPY;</div><div class='del'>-	protection_map[8] = PAGE_NONE;</div><div class='del'>-	protection_map[9] = PAGE_READONLY;</div><div class='del'>-	protection_map[10] = PAGE_SHARED;</div><div class='del'>-	protection_map[11] = PAGE_SHARED;</div><div class='del'>-	protection_map[12] = PAGE_READONLY;</div><div class='del'>-	protection_map[13] = PAGE_READONLY;</div><div class='del'>-	protection_map[14] = PAGE_SHARED;</div><div class='del'>-	protection_map[15] = PAGE_SHARED;</div><div class='del'>-	btfixup();</div><div class='ctx'> 	prom_build_devicetree();</div><div class='ctx'> 	of_fill_in_cpu_data();</div><div class='ctx'> 	device_scan();</div><div class='head'>diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c<br/>index 21faaeea85de..6026fdd1b2ed 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/init_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/init_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/init_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/init_64.c</a></div><div class='hunk'>@@ -741,7 +741,6 @@ static void __init find_ramdisk(unsigned long phys_base)</div><div class='ctx'> struct node_mem_mask {</div><div class='ctx'> 	unsigned long mask;</div><div class='ctx'> 	unsigned long val;</div><div class='del'>-	unsigned long bootmem_paddr;</div><div class='ctx'> };</div><div class='ctx'> static struct node_mem_mask node_masks[MAX_NUMNODES];</div><div class='ctx'> static int num_node_masks;</div><div class='hunk'>@@ -806,12 +805,6 @@ static u64 memblock_nid_range(u64 start, u64 end, int *nid)</div><div class='ctx'> </div><div class='ctx'> 	return start;</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-static u64 memblock_nid_range(u64 start, u64 end, int *nid)</div><div class='del'>-{</div><div class='del'>-	*nid = 0;</div><div class='del'>-	return end;</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* This must be invoked after performing all of the necessary</div><div class='hunk'>@@ -820,10 +813,11 @@ static u64 memblock_nid_range(u64 start, u64 end, int *nid)</div><div class='ctx'>  */</div><div class='ctx'> static void __init allocate_node_data(int nid)</div><div class='ctx'> {</div><div class='del'>-	unsigned long paddr, num_pages, start_pfn, end_pfn;</div><div class='ctx'> 	struct pglist_data *p;</div><div class='del'>-</div><div class='add'>+	unsigned long start_pfn, end_pfn;</div><div class='ctx'> #ifdef CONFIG_NEED_MULTIPLE_NODES</div><div class='add'>+	unsigned long paddr;</div><div class='add'>+</div><div class='ctx'> 	paddr = memblock_alloc_try_nid(sizeof(struct pglist_data), SMP_CACHE_BYTES, nid);</div><div class='ctx'> 	if (!paddr) {</div><div class='ctx'> 		prom_printf("Cannot allocate pglist_data for nid[%d]\n", nid);</div><div class='hunk'>@@ -832,7 +826,7 @@ static void __init allocate_node_data(int nid)</div><div class='ctx'> 	NODE_DATA(nid) = __va(paddr);</div><div class='ctx'> 	memset(NODE_DATA(nid), 0, sizeof(struct pglist_data));</div><div class='ctx'> </div><div class='del'>-	NODE_DATA(nid)-&gt;bdata = &amp;bootmem_node_data[nid];</div><div class='add'>+	NODE_DATA(nid)-&gt;node_id = nid;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	p = NODE_DATA(nid);</div><div class='hunk'>@@ -840,18 +834,6 @@ static void __init allocate_node_data(int nid)</div><div class='ctx'> 	get_pfn_range_for_nid(nid, &amp;start_pfn, &amp;end_pfn);</div><div class='ctx'> 	p-&gt;node_start_pfn = start_pfn;</div><div class='ctx'> 	p-&gt;node_spanned_pages = end_pfn - start_pfn;</div><div class='del'>-</div><div class='del'>-	if (p-&gt;node_spanned_pages) {</div><div class='del'>-		num_pages = bootmem_bootmap_pages(p-&gt;node_spanned_pages);</div><div class='del'>-</div><div class='del'>-		paddr = memblock_alloc_try_nid(num_pages &lt;&lt; PAGE_SHIFT, PAGE_SIZE, nid);</div><div class='del'>-		if (!paddr) {</div><div class='del'>-			prom_printf("Cannot allocate bootmap for nid[%d]\n",</div><div class='del'>-				  nid);</div><div class='del'>-			prom_halt();</div><div class='del'>-		}</div><div class='del'>-		node_masks[nid].bootmem_paddr = paddr;</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void init_node_masks_nonnuma(void)</div><div class='hunk'>@@ -1292,75 +1274,9 @@ static void __init bootmem_init_nonnuma(void)</div><div class='ctx'> 	node_set_online(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init reserve_range_in_node(int nid, unsigned long start,</div><div class='del'>-					 unsigned long end)</div><div class='del'>-{</div><div class='del'>-	numadbg("    reserve_range_in_node(nid[%d],start[%lx],end[%lx]\n",</div><div class='del'>-		nid, start, end);</div><div class='del'>-	while (start &lt; end) {</div><div class='del'>-		unsigned long this_end;</div><div class='del'>-		int n;</div><div class='del'>-</div><div class='del'>-		this_end = memblock_nid_range(start, end, &amp;n);</div><div class='del'>-		if (n == nid) {</div><div class='del'>-			numadbg("      MATCH reserving range [%lx:%lx]\n",</div><div class='del'>-				start, this_end);</div><div class='del'>-			reserve_bootmem_node(NODE_DATA(nid), start,</div><div class='del'>-					     (this_end - start), BOOTMEM_DEFAULT);</div><div class='del'>-		} else</div><div class='del'>-			numadbg("      NO MATCH, advancing start to %lx\n",</div><div class='del'>-				this_end);</div><div class='del'>-</div><div class='del'>-		start = this_end;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init trim_reserved_in_node(int nid)</div><div class='del'>-{</div><div class='del'>-	struct memblock_region *reg;</div><div class='del'>-</div><div class='del'>-	numadbg("  trim_reserved_in_node(%d)\n", nid);</div><div class='del'>-</div><div class='del'>-	for_each_memblock(reserved, reg)</div><div class='del'>-		reserve_range_in_node(nid, reg-&gt;base, reg-&gt;base + reg-&gt;size);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init bootmem_init_one_node(int nid)</div><div class='del'>-{</div><div class='del'>-	struct pglist_data *p;</div><div class='del'>-</div><div class='del'>-	numadbg("bootmem_init_one_node(%d)\n", nid);</div><div class='del'>-</div><div class='del'>-	p = NODE_DATA(nid);</div><div class='del'>-</div><div class='del'>-	if (p-&gt;node_spanned_pages) {</div><div class='del'>-		unsigned long paddr = node_masks[nid].bootmem_paddr;</div><div class='del'>-		unsigned long end_pfn;</div><div class='del'>-</div><div class='del'>-		end_pfn = p-&gt;node_start_pfn + p-&gt;node_spanned_pages;</div><div class='del'>-</div><div class='del'>-		numadbg("  init_bootmem_node(%d, %lx, %lx, %lx)\n",</div><div class='del'>-			nid, paddr &gt;&gt; PAGE_SHIFT, p-&gt;node_start_pfn, end_pfn);</div><div class='del'>-</div><div class='del'>-		init_bootmem_node(p, paddr &gt;&gt; PAGE_SHIFT,</div><div class='del'>-				  p-&gt;node_start_pfn, end_pfn);</div><div class='del'>-</div><div class='del'>-		numadbg("  free_bootmem_with_active_regions(%d, %lx)\n",</div><div class='del'>-			nid, end_pfn);</div><div class='del'>-		free_bootmem_with_active_regions(nid, end_pfn);</div><div class='del'>-</div><div class='del'>-		trim_reserved_in_node(nid);</div><div class='del'>-</div><div class='del'>-		numadbg("  sparse_memory_present_with_active_regions(%d)\n",</div><div class='del'>-			nid);</div><div class='del'>-		sparse_memory_present_with_active_regions(nid);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static unsigned long __init bootmem_init(unsigned long phys_base)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long end_pfn;</div><div class='del'>-	int nid;</div><div class='ctx'> </div><div class='ctx'> 	end_pfn = memblock_end_of_DRAM() &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	max_pfn = max_low_pfn = end_pfn;</div><div class='hunk'>@@ -1369,11 +1285,12 @@ static unsigned long __init bootmem_init(unsigned long phys_base)</div><div class='ctx'> 	if (bootmem_init_numa() &lt; 0)</div><div class='ctx'> 		bootmem_init_nonnuma();</div><div class='ctx'> </div><div class='del'>-	/* XXX cpu notifier XXX */</div><div class='add'>+	/* Dump memblock with node info. */</div><div class='add'>+	memblock_dump_all();</div><div class='ctx'> </div><div class='del'>-	for_each_online_node(nid)</div><div class='del'>-		bootmem_init_one_node(nid);</div><div class='add'>+	/* XXX cpu notifier XXX */</div><div class='ctx'> </div><div class='add'>+	sparse_memory_present_with_active_regions(MAX_NUMNODES);</div><div class='ctx'> 	sparse_init();</div><div class='ctx'> </div><div class='ctx'> 	return end_pfn;</div><div class='hunk'>@@ -1701,6 +1618,7 @@ void __init paging_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long end_pfn, shift, phys_base;</div><div class='ctx'> 	unsigned long real_end, i;</div><div class='add'>+	int node;</div><div class='ctx'> </div><div class='ctx'> 	/* These build time checkes make sure that the dcache_dirty_cpu()</div><div class='ctx'> 	 * page-&gt;flags usage will work.</div><div class='hunk'>@@ -1826,22 +1744,24 @@ void __init paging_init(void)</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Setup bootmem... */</div><div class='add'>+	last_valid_pfn = end_pfn = bootmem_init(phys_base);</div><div class='add'>+</div><div class='ctx'> 	/* Once the OF device tree and MDESC have been setup, we know</div><div class='ctx'> 	 * the list of possible cpus.  Therefore we can allocate the</div><div class='ctx'> 	 * IRQ stacks.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for_each_possible_cpu(i) {</div><div class='del'>-		/* XXX Use node local allocations... XXX */</div><div class='del'>-		softirq_stack[i] = __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));</div><div class='del'>-		hardirq_stack[i] = __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));</div><div class='del'>-	}</div><div class='add'>+		node = cpu_to_node(i);</div><div class='ctx'> </div><div class='del'>-	/* Setup bootmem... */</div><div class='del'>-	last_valid_pfn = end_pfn = bootmem_init(phys_base);</div><div class='add'>+		softirq_stack[i] = __alloc_bootmem_node(NODE_DATA(node),</div><div class='add'>+							THREAD_SIZE,</div><div class='add'>+							THREAD_SIZE, 0);</div><div class='add'>+		hardirq_stack[i] = __alloc_bootmem_node(NODE_DATA(node),</div><div class='add'>+							THREAD_SIZE,</div><div class='add'>+							THREAD_SIZE, 0);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_NEED_MULTIPLE_NODES</div><div class='del'>-	max_mapnr = last_valid_pfn;</div><div class='del'>-#endif</div><div class='ctx'> 	kernel_physical_mapping_init();</div><div class='ctx'> </div><div class='ctx'> 	{</div><div class='hunk'>@@ -1973,6 +1893,7 @@ void __init mem_init(void)</div><div class='ctx'> 					free_all_bootmem_node(NODE_DATA(i));</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+		totalram_pages += free_low_memory_core_early(MAX_NUMNODES);</div><div class='ctx'> 	}</div><div class='ctx'> #else</div><div class='ctx'> 	totalram_pages = free_all_bootmem();</div><div class='head'>diff --git a/arch/sparc/mm/io-unit.c b/arch/sparc/mm/io-unit.c<br/>index fc58c3e917df..eb99862e9654 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/io-unit.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/io-unit.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/io-unit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/io-unit.c</a></div><div class='hunk'>@@ -197,7 +197,7 @@ static void iounit_release_scsi_sgl(struct device *dev, struct scatterlist *sg,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SBUS</div><div class='del'>-static int iounit_map_dma_area(struct device *dev, dma_addr_t *pba, unsigned long va, __u32 addr, int len)</div><div class='add'>+static int iounit_map_dma_area(struct device *dev, dma_addr_t *pba, unsigned long va, unsigned long addr, int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct iounit_struct *iounit = dev-&gt;archdata.iommu;</div><div class='ctx'> 	unsigned long page, end;</div><div class='hunk'>@@ -242,29 +242,18 @@ static void iounit_unmap_dma_area(struct device *dev, unsigned long addr, int le</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static char *iounit_lockarea(char *vaddr, unsigned long len)</div><div class='del'>-{</div><div class='del'>-/* FIXME: Write this */</div><div class='del'>-	return vaddr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iounit_unlockarea(char *vaddr, unsigned long len)</div><div class='del'>-{</div><div class='del'>-/* FIXME: Write this */</div><div class='del'>-}</div><div class='add'>+static const struct sparc32_dma_ops iounit_dma_ops = {</div><div class='add'>+	.get_scsi_one		= iounit_get_scsi_one,</div><div class='add'>+	.get_scsi_sgl		= iounit_get_scsi_sgl,</div><div class='add'>+	.release_scsi_one	= iounit_release_scsi_one,</div><div class='add'>+	.release_scsi_sgl	= iounit_release_scsi_sgl,</div><div class='add'>+#ifdef CONFIG_SBUS</div><div class='add'>+	.map_dma_area		= iounit_map_dma_area,</div><div class='add'>+	.unmap_dma_area		= iounit_unmap_dma_area,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> void __init ld_mmu_iounit(void)</div><div class='ctx'> {</div><div class='del'>-	BTFIXUPSET_CALL(mmu_lockarea, iounit_lockarea, BTFIXUPCALL_RETO0);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_unlockarea, iounit_unlockarea, BTFIXUPCALL_NOP);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(mmu_get_scsi_one, iounit_get_scsi_one, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_get_scsi_sgl, iounit_get_scsi_sgl, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_release_scsi_one, iounit_release_scsi_one, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_release_scsi_sgl, iounit_release_scsi_sgl, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SBUS</div><div class='del'>-	BTFIXUPSET_CALL(mmu_map_dma_area, iounit_map_dma_area, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_unmap_dma_area, iounit_unmap_dma_area, BTFIXUPCALL_NORM);</div><div class='del'>-#endif</div><div class='add'>+	sparc32_dma_ops = &amp;iounit_dma_ops;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/sparc/mm/iommu.c b/arch/sparc/mm/iommu.c<br/>index 07fc6a65d9b6..a8a58cad9d2b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/iommu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/iommu.c</a></div><div class='hunk'>@@ -39,8 +39,6 @@</div><div class='ctx'> </div><div class='ctx'> /* srmmu.c */</div><div class='ctx'> extern int viking_mxcc_present;</div><div class='del'>-BTFIXUPDEF_CALL(void, flush_page_for_dma, unsigned long)</div><div class='del'>-#define flush_page_for_dma(page) BTFIXUP_CALL(flush_page_for_dma)(page)</div><div class='ctx'> extern int flush_page_for_dma_global;</div><div class='ctx'> static int viking_flush;</div><div class='ctx'> /* viking.S */</div><div class='hunk'>@@ -143,7 +141,6 @@ static int __init iommu_init(void)</div><div class='ctx'> </div><div class='ctx'> subsys_initcall(iommu_init);</div><div class='ctx'> </div><div class='del'>-/* This begs to be btfixup-ed by srmmu. */</div><div class='ctx'> /* Flush the iotlb entries to ram. */</div><div class='ctx'> /* This could be better if we didn't have to flush whole pages. */</div><div class='ctx'> static void iommu_flush_iotlb(iopte_t *iopte, unsigned int niopte)</div><div class='hunk'>@@ -216,11 +213,6 @@ static u32 iommu_get_scsi_one(struct device *dev, char *vaddr, unsigned int len)</div><div class='ctx'> 	return busa + off;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __u32 iommu_get_scsi_one_noflush(struct device *dev, char *vaddr, unsigned long len)</div><div class='del'>-{</div><div class='del'>-	return iommu_get_scsi_one(dev, vaddr, len);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static __u32 iommu_get_scsi_one_gflush(struct device *dev, char *vaddr, unsigned long len)</div><div class='ctx'> {</div><div class='ctx'> 	flush_page_for_dma(0);</div><div class='hunk'>@@ -238,19 +230,6 @@ static __u32 iommu_get_scsi_one_pflush(struct device *dev, char *vaddr, unsigned</div><div class='ctx'> 	return iommu_get_scsi_one(dev, vaddr, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iommu_get_scsi_sgl_noflush(struct device *dev, struct scatterlist *sg, int sz)</div><div class='del'>-{</div><div class='del'>-	int n;</div><div class='del'>-</div><div class='del'>-	while (sz != 0) {</div><div class='del'>-		--sz;</div><div class='del'>-		n = (sg-&gt;length + sg-&gt;offset + PAGE_SIZE-1) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		sg-&gt;dma_address = iommu_get_one(dev, sg_page(sg), n) + sg-&gt;offset;</div><div class='del'>-		sg-&gt;dma_length = sg-&gt;length;</div><div class='del'>-		sg = sg_next(sg);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void iommu_get_scsi_sgl_gflush(struct device *dev, struct scatterlist *sg, int sz)</div><div class='ctx'> {</div><div class='ctx'> 	int n;</div><div class='hunk'>@@ -426,40 +405,36 @@ static void iommu_unmap_dma_area(struct device *dev, unsigned long busa, int len</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static char *iommu_lockarea(char *vaddr, unsigned long len)</div><div class='del'>-{</div><div class='del'>-	return vaddr;</div><div class='del'>-}</div><div class='add'>+static const struct sparc32_dma_ops iommu_dma_gflush_ops = {</div><div class='add'>+	.get_scsi_one		= iommu_get_scsi_one_gflush,</div><div class='add'>+	.get_scsi_sgl		= iommu_get_scsi_sgl_gflush,</div><div class='add'>+	.release_scsi_one	= iommu_release_scsi_one,</div><div class='add'>+	.release_scsi_sgl	= iommu_release_scsi_sgl,</div><div class='add'>+#ifdef CONFIG_SBUS</div><div class='add'>+	.map_dma_area		= iommu_map_dma_area,</div><div class='add'>+	.unmap_dma_area		= iommu_unmap_dma_area,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void iommu_unlockarea(char *vaddr, unsigned long len)</div><div class='del'>-{</div><div class='del'>-}</div><div class='add'>+static const struct sparc32_dma_ops iommu_dma_pflush_ops = {</div><div class='add'>+	.get_scsi_one		= iommu_get_scsi_one_pflush,</div><div class='add'>+	.get_scsi_sgl		= iommu_get_scsi_sgl_pflush,</div><div class='add'>+	.release_scsi_one	= iommu_release_scsi_one,</div><div class='add'>+	.release_scsi_sgl	= iommu_release_scsi_sgl,</div><div class='add'>+#ifdef CONFIG_SBUS</div><div class='add'>+	.map_dma_area		= iommu_map_dma_area,</div><div class='add'>+	.unmap_dma_area		= iommu_unmap_dma_area,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> void __init ld_mmu_iommu(void)</div><div class='ctx'> {</div><div class='del'>-	viking_flush = (BTFIXUPVAL_CALL(flush_page_for_dma) == (unsigned long)viking_flush_page);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_lockarea, iommu_lockarea, BTFIXUPCALL_RETO0);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_unlockarea, iommu_unlockarea, BTFIXUPCALL_NOP);</div><div class='del'>-</div><div class='del'>-	if (!BTFIXUPVAL_CALL(flush_page_for_dma)) {</div><div class='del'>-		/* IO coherent chip */</div><div class='del'>-		BTFIXUPSET_CALL(mmu_get_scsi_one, iommu_get_scsi_one_noflush, BTFIXUPCALL_RETO0);</div><div class='del'>-		BTFIXUPSET_CALL(mmu_get_scsi_sgl, iommu_get_scsi_sgl_noflush, BTFIXUPCALL_NORM);</div><div class='del'>-	} else if (flush_page_for_dma_global) {</div><div class='add'>+	if (flush_page_for_dma_global) {</div><div class='ctx'> 		/* flush_page_for_dma flushes everything, no matter of what page is it */</div><div class='del'>-		BTFIXUPSET_CALL(mmu_get_scsi_one, iommu_get_scsi_one_gflush, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(mmu_get_scsi_sgl, iommu_get_scsi_sgl_gflush, BTFIXUPCALL_NORM);</div><div class='add'>+		sparc32_dma_ops = &amp;iommu_dma_gflush_ops;</div><div class='ctx'> 	} else {</div><div class='del'>-		BTFIXUPSET_CALL(mmu_get_scsi_one, iommu_get_scsi_one_pflush, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(mmu_get_scsi_sgl, iommu_get_scsi_sgl_pflush, BTFIXUPCALL_NORM);</div><div class='add'>+		sparc32_dma_ops = &amp;iommu_dma_pflush_ops;</div><div class='ctx'> 	}</div><div class='del'>-	BTFIXUPSET_CALL(mmu_release_scsi_one, iommu_release_scsi_one, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_release_scsi_sgl, iommu_release_scsi_sgl, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SBUS</div><div class='del'>-	BTFIXUPSET_CALL(mmu_map_dma_area, iommu_map_dma_area, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_unmap_dma_area, iommu_unmap_dma_area, BTFIXUPCALL_NORM);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	if (viking_mxcc_present || srmmu_modtype == HyperSparc) {</div><div class='ctx'> 		dvma_prot = __pgprot(SRMMU_CACHE | SRMMU_ET_PTE | SRMMU_PRIV);</div><div class='head'>diff --git a/arch/sparc/mm/leon_mm.c b/arch/sparc/mm/leon_mm.c<br/>index 13c2169822a8..5bed085a2c17 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/leon_mm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/leon_mm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/leon_mm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/leon_mm.c</a></div><div class='hunk'>@@ -15,10 +15,24 @@</div><div class='ctx'> #include &lt;asm/leon.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "srmmu.h"</div><div class='add'>+</div><div class='ctx'> int leon_flush_during_switch = 1;</div><div class='ctx'> int srmmu_swprobe_trace;</div><div class='ctx'> </div><div class='del'>-unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr)</div><div class='add'>+static inline unsigned long leon_get_ctable_ptr(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int retval;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__("lda [%1] %2, %0\n\t" :</div><div class='add'>+			     "=r" (retval) :</div><div class='add'>+			     "r" (SRMMU_CTXTBL_PTR),</div><div class='add'>+			     "i" (ASI_LEON_MMUREGS));</div><div class='add'>+	return (retval &amp; SRMMU_CTX_PMASK) &lt;&lt; 4;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+unsigned long leon_swprobe(unsigned long vaddr, unsigned long *paddr)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='ctx'> 	unsigned int ctxtbl;</div><div class='hunk'>@@ -33,10 +47,10 @@ unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr)</div><div class='ctx'> 	if (srmmu_swprobe_trace)</div><div class='ctx'> 		printk(KERN_INFO "swprobe: trace on\n");</div><div class='ctx'> </div><div class='del'>-	ctxtbl = srmmu_get_ctable_ptr();</div><div class='add'>+	ctxtbl = leon_get_ctable_ptr();</div><div class='ctx'> 	if (!(ctxtbl)) {</div><div class='ctx'> 		if (srmmu_swprobe_trace)</div><div class='del'>-			printk(KERN_INFO "swprobe: srmmu_get_ctable_ptr returned 0=&gt;0\n");</div><div class='add'>+			printk(KERN_INFO "swprobe: leon_get_ctable_ptr returned 0=&gt;0\n");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!_pfn_valid(PFN(ctxtbl))) {</div><div class='hunk'>@@ -258,3 +272,80 @@ void leon_switch_mm(void)</div><div class='ctx'> 	if (leon_flush_during_switch)</div><div class='ctx'> 		leon_flush_cache_all();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void leon_flush_cache_mm(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	leon_flush_cache_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void leon_flush_cache_page(struct vm_area_struct *vma, unsigned long page)</div><div class='add'>+{</div><div class='add'>+	leon_flush_pcache_all(vma, page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void leon_flush_cache_range(struct vm_area_struct *vma,</div><div class='add'>+				   unsigned long start,</div><div class='add'>+				   unsigned long end)</div><div class='add'>+{</div><div class='add'>+	leon_flush_cache_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void leon_flush_tlb_mm(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	leon_flush_tlb_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void leon_flush_tlb_page(struct vm_area_struct *vma,</div><div class='add'>+				unsigned long page)</div><div class='add'>+{</div><div class='add'>+	leon_flush_tlb_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void leon_flush_tlb_range(struct vm_area_struct *vma,</div><div class='add'>+				 unsigned long start,</div><div class='add'>+				 unsigned long end)</div><div class='add'>+{</div><div class='add'>+	leon_flush_tlb_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void leon_flush_page_to_ram(unsigned long page)</div><div class='add'>+{</div><div class='add'>+	leon_flush_cache_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void leon_flush_sig_insns(struct mm_struct *mm, unsigned long page)</div><div class='add'>+{</div><div class='add'>+	leon_flush_cache_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void leon_flush_page_for_dma(unsigned long page)</div><div class='add'>+{</div><div class='add'>+	leon_flush_dcache_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init poke_leonsparc(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct sparc32_cachetlb_ops leon_ops = {</div><div class='add'>+	.cache_all	= leon_flush_cache_all,</div><div class='add'>+	.cache_mm	= leon_flush_cache_mm,</div><div class='add'>+	.cache_page	= leon_flush_cache_page,</div><div class='add'>+	.cache_range	= leon_flush_cache_range,</div><div class='add'>+	.tlb_all	= leon_flush_tlb_all,</div><div class='add'>+	.tlb_mm		= leon_flush_tlb_mm,</div><div class='add'>+	.tlb_page	= leon_flush_tlb_page,</div><div class='add'>+	.tlb_range	= leon_flush_tlb_range,</div><div class='add'>+	.page_to_ram	= leon_flush_page_to_ram,</div><div class='add'>+	.sig_insns	= leon_flush_sig_insns,</div><div class='add'>+	.page_for_dma	= leon_flush_page_for_dma,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init init_leon(void)</div><div class='add'>+{</div><div class='add'>+	srmmu_name = "LEON";</div><div class='add'>+	sparc32_cachetlb_ops = &amp;leon_ops;</div><div class='add'>+	poke_srmmu = poke_leonsparc;</div><div class='add'>+</div><div class='add'>+	leon_flush_during_switch = leon_flush_needed();</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sparc/mm/loadmmu.c b/arch/sparc/mm/loadmmu.c<br/>deleted file mode 100644<br/>index c5bf2a6c3858..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/loadmmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/loadmmu.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,43 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * loadmmu.c:  This code loads up all the mm function pointers once the</div><div class='del'>- *             machine type has been determined.  It also sets the static</div><div class='del'>- *             mmu values such as PAGE_NONE, etc.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)</div><div class='del'>- * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/mmu_context.h&gt;</div><div class='del'>-#include &lt;asm/oplib.h&gt;</div><div class='del'>-</div><div class='del'>-struct ctx_list *ctx_list_pool;</div><div class='del'>-struct ctx_list ctx_free;</div><div class='del'>-struct ctx_list ctx_used;</div><div class='del'>-</div><div class='del'>-extern void ld_mmu_sun4c(void);</div><div class='del'>-extern void ld_mmu_srmmu(void);</div><div class='del'>-</div><div class='del'>-void __init load_mmu(void)</div><div class='del'>-{</div><div class='del'>-	switch(sparc_cpu_model) {</div><div class='del'>-	case sun4c:</div><div class='del'>-	case sun4:</div><div class='del'>-		ld_mmu_sun4c();</div><div class='del'>-		break;</div><div class='del'>-	case sun4m:</div><div class='del'>-	case sun4d:</div><div class='del'>-	case sparc_leon:</div><div class='del'>-		ld_mmu_srmmu();</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		prom_printf("load_mmu: %d unsupported\n", (int)sparc_cpu_model);</div><div class='del'>-		prom_halt();</div><div class='del'>-	}</div><div class='del'>-	btfixup();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/sparc/mm/nosun4c.c b/arch/sparc/mm/nosun4c.c<br/>deleted file mode 100644<br/>index 4e62c27147c4..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/nosun4c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/nosun4c.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,77 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * nosun4c.c: This file is a bunch of dummies for SMP compiles, </div><div class='del'>- *         so that it does not need sun4c and avoid ifdefs.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static char shouldnothappen[] __initdata = "32bit SMP kernel only supports sun4m and sun4d\n";</div><div class='del'>-</div><div class='del'>-/* Dummies */</div><div class='del'>-struct sun4c_mmu_ring {</div><div class='del'>-	unsigned long xxx1[3];</div><div class='del'>-	unsigned char xxx2[2];</div><div class='del'>-	int xxx3;</div><div class='del'>-};</div><div class='del'>-struct sun4c_mmu_ring sun4c_kernel_ring;</div><div class='del'>-struct sun4c_mmu_ring sun4c_kfree_ring;</div><div class='del'>-unsigned long sun4c_kernel_faults;</div><div class='del'>-unsigned long *sun4c_memerr_reg;</div><div class='del'>-</div><div class='del'>-static void __init should_not_happen(void)</div><div class='del'>-{</div><div class='del'>-	prom_printf(shouldnothappen);</div><div class='del'>-	prom_halt();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned long __init sun4c_paging_init(unsigned long start_mem, unsigned long end_mem)</div><div class='del'>-{</div><div class='del'>-	should_not_happen();</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init ld_mmu_sun4c(void)</div><div class='del'>-{</div><div class='del'>-	should_not_happen();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void sun4c_mapioaddr(unsigned long physaddr, unsigned long virt_addr, int bus_type, int rdonly)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void sun4c_unmapioaddr(unsigned long virt_addr)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void sun4c_complete_all_stores(void)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-pte_t *sun4c_pte_offset(pmd_t * dir, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-pte_t *sun4c_pte_offset_kernel(pmd_t *dir, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void sun4c_update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init sun4c_probe_vac(void)</div><div class='del'>-{</div><div class='del'>-	should_not_happen();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init sun4c_probe_memerr_reg(void)</div><div class='del'>-{</div><div class='del'>-	should_not_happen();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c<br/>index cbef74e793b8..62e3f5773303 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/srmmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/srmmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/srmmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/srmmu.c</a></div><div class='hunk'>@@ -48,39 +48,37 @@</div><div class='ctx'> #include &lt;asm/turbosparc.h&gt;</div><div class='ctx'> #include &lt;asm/leon.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='add'>+#include "srmmu.h"</div><div class='ctx'> </div><div class='ctx'> enum mbus_module srmmu_modtype;</div><div class='ctx'> static unsigned int hwbug_bitmask;</div><div class='ctx'> int vac_cache_size;</div><div class='ctx'> int vac_line_size;</div><div class='ctx'> </div><div class='add'>+struct ctx_list *ctx_list_pool;</div><div class='add'>+struct ctx_list ctx_free;</div><div class='add'>+struct ctx_list ctx_used;</div><div class='add'>+</div><div class='ctx'> extern struct resource sparc_iomap;</div><div class='ctx'> </div><div class='ctx'> extern unsigned long last_valid_pfn;</div><div class='ctx'> </div><div class='del'>-extern unsigned long page_kernel;</div><div class='del'>-</div><div class='ctx'> static pgd_t *srmmu_swapper_pg_dir;</div><div class='ctx'> </div><div class='add'>+const struct sparc32_cachetlb_ops *sparc32_cachetlb_ops;</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='add'>+const struct sparc32_cachetlb_ops *local_ops;</div><div class='add'>+</div><div class='ctx'> #define FLUSH_BEGIN(mm)</div><div class='ctx'> #define FLUSH_END</div><div class='ctx'> #else</div><div class='del'>-#define FLUSH_BEGIN(mm) if((mm)-&gt;context != NO_CONTEXT) {</div><div class='add'>+#define FLUSH_BEGIN(mm) if ((mm)-&gt;context != NO_CONTEXT) {</div><div class='ctx'> #define FLUSH_END	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-BTFIXUPDEF_CALL(void, flush_page_for_dma, unsigned long)</div><div class='del'>-#define flush_page_for_dma(page) BTFIXUP_CALL(flush_page_for_dma)(page)</div><div class='del'>-</div><div class='ctx'> int flush_page_for_dma_global = 1;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-BTFIXUPDEF_CALL(void, local_flush_page_for_dma, unsigned long)</div><div class='del'>-#define local_flush_page_for_dma(page) BTFIXUP_CALL(local_flush_page_for_dma)(page)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> char *srmmu_name;</div><div class='ctx'> </div><div class='ctx'> ctxd_t *srmmu_ctx_table_phys;</div><div class='hunk'>@@ -91,28 +89,6 @@ static DEFINE_SPINLOCK(srmmu_context_spinlock);</div><div class='ctx'> </div><div class='ctx'> static int is_hypersparc;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * In general all page table modifications should use the V8 atomic</div><div class='del'>- * swap instruction.  This insures the mmu and the cpu are in sync</div><div class='del'>- * with respect to ref/mod bits in the page tables.</div><div class='del'>- */</div><div class='del'>-static inline unsigned long srmmu_swap(unsigned long *addr, unsigned long value)</div><div class='del'>-{</div><div class='del'>-	__asm__ __volatile__("swap [%2], %0" : "=&amp;r" (value) : "0" (value), "r" (addr));</div><div class='del'>-	return value;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void srmmu_set_pte(pte_t *ptep, pte_t pteval)</div><div class='del'>-{</div><div class='del'>-	srmmu_swap((unsigned long *)ptep, pte_val(pteval));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* The very generic SRMMU page table operations. */</div><div class='del'>-static inline int srmmu_device_memory(unsigned long x)</div><div class='del'>-{</div><div class='del'>-	return ((x &amp; 0xF0000000) != 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int srmmu_cache_pagetables;</div><div class='ctx'> </div><div class='ctx'> /* these will be initialized in srmmu_nocache_calcsize() */</div><div class='hunk'>@@ -129,145 +105,39 @@ void *srmmu_nocache_pool;</div><div class='ctx'> void *srmmu_nocache_bitmap;</div><div class='ctx'> static struct bit_map srmmu_nocache_map;</div><div class='ctx'> </div><div class='del'>-static unsigned long srmmu_pte_pfn(pte_t pte)</div><div class='del'>-{</div><div class='del'>-	if (srmmu_device_memory(pte_val(pte))) {</div><div class='del'>-		/* Just return something that will cause</div><div class='del'>-		 * pfn_valid() to return false.  This makes</div><div class='del'>-		 * copy_one_pte() to just directly copy to</div><div class='del'>-		 * PTE over.</div><div class='del'>-		 */</div><div class='del'>-		return ~0UL;</div><div class='del'>-	}</div><div class='del'>-	return (pte_val(pte) &amp; SRMMU_PTE_PMASK) &gt;&gt; (PAGE_SHIFT-4);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct page *srmmu_pmd_page(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	if (srmmu_device_memory(pmd_val(pmd)))</div><div class='del'>-		BUG();</div><div class='del'>-	return pfn_to_page((pmd_val(pmd) &amp; SRMMU_PTD_PMASK) &gt;&gt; (PAGE_SHIFT-4));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned long srmmu_pgd_page(pgd_t pgd)</div><div class='del'>-{ return srmmu_device_memory(pgd_val(pgd))?~0:(unsigned long)__nocache_va((pgd_val(pgd) &amp; SRMMU_PTD_PMASK) &lt;&lt; 4); }</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static inline int srmmu_pte_none(pte_t pte)</div><div class='del'>-{ return !(pte_val(pte) &amp; 0xFFFFFFF); }</div><div class='del'>-</div><div class='del'>-static inline int srmmu_pte_present(pte_t pte)</div><div class='del'>-{ return ((pte_val(pte) &amp; SRMMU_ET_MASK) == SRMMU_ET_PTE); }</div><div class='del'>-</div><div class='del'>-static inline void srmmu_pte_clear(pte_t *ptep)</div><div class='del'>-{ srmmu_set_pte(ptep, __pte(0)); }</div><div class='del'>-</div><div class='ctx'> static inline int srmmu_pmd_none(pmd_t pmd)</div><div class='ctx'> { return !(pmd_val(pmd) &amp; 0xFFFFFFF); }</div><div class='ctx'> </div><div class='del'>-static inline int srmmu_pmd_bad(pmd_t pmd)</div><div class='del'>-{ return (pmd_val(pmd) &amp; SRMMU_ET_MASK) != SRMMU_ET_PTD; }</div><div class='del'>-</div><div class='del'>-static inline int srmmu_pmd_present(pmd_t pmd)</div><div class='del'>-{ return ((pmd_val(pmd) &amp; SRMMU_ET_MASK) == SRMMU_ET_PTD); }</div><div class='del'>-</div><div class='del'>-static inline void srmmu_pmd_clear(pmd_t *pmdp) {</div><div class='del'>-	int i;</div><div class='del'>-	for (i = 0; i &lt; PTRS_PER_PTE/SRMMU_REAL_PTRS_PER_PTE; i++)</div><div class='del'>-		srmmu_set_pte((pte_t *)&amp;pmdp-&gt;pmdv[i], __pte(0));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int srmmu_pgd_none(pgd_t pgd)          </div><div class='del'>-{ return !(pgd_val(pgd) &amp; 0xFFFFFFF); }</div><div class='del'>-</div><div class='del'>-static inline int srmmu_pgd_bad(pgd_t pgd)</div><div class='del'>-{ return (pgd_val(pgd) &amp; SRMMU_ET_MASK) != SRMMU_ET_PTD; }</div><div class='del'>-</div><div class='del'>-static inline int srmmu_pgd_present(pgd_t pgd)</div><div class='del'>-{ return ((pgd_val(pgd) &amp; SRMMU_ET_MASK) == SRMMU_ET_PTD); }</div><div class='del'>-</div><div class='del'>-static inline void srmmu_pgd_clear(pgd_t * pgdp)</div><div class='del'>-{ srmmu_set_pte((pte_t *)pgdp, __pte(0)); }</div><div class='del'>-</div><div class='del'>-static inline pte_t srmmu_pte_wrprotect(pte_t pte)</div><div class='del'>-{ return __pte(pte_val(pte) &amp; ~SRMMU_WRITE);}</div><div class='del'>-</div><div class='del'>-static inline pte_t srmmu_pte_mkclean(pte_t pte)</div><div class='del'>-{ return __pte(pte_val(pte) &amp; ~SRMMU_DIRTY);}</div><div class='del'>-</div><div class='del'>-static inline pte_t srmmu_pte_mkold(pte_t pte)</div><div class='del'>-{ return __pte(pte_val(pte) &amp; ~SRMMU_REF);}</div><div class='del'>-</div><div class='del'>-static inline pte_t srmmu_pte_mkwrite(pte_t pte)</div><div class='del'>-{ return __pte(pte_val(pte) | SRMMU_WRITE);}</div><div class='del'>-</div><div class='del'>-static inline pte_t srmmu_pte_mkdirty(pte_t pte)</div><div class='del'>-{ return __pte(pte_val(pte) | SRMMU_DIRTY);}</div><div class='del'>-</div><div class='del'>-static inline pte_t srmmu_pte_mkyoung(pte_t pte)</div><div class='del'>-{ return __pte(pte_val(pte) | SRMMU_REF);}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Conversion functions: convert a page and protection to a page entry,</div><div class='del'>- * and a page entry and page directory to the page they refer to.</div><div class='del'>- */</div><div class='del'>-static pte_t srmmu_mk_pte(struct page *page, pgprot_t pgprot)</div><div class='del'>-{ return __pte((page_to_pfn(page) &lt;&lt; (PAGE_SHIFT-4)) | pgprot_val(pgprot)); }</div><div class='del'>-</div><div class='del'>-static pte_t srmmu_mk_pte_phys(unsigned long page, pgprot_t pgprot)</div><div class='del'>-{ return __pte(((page) &gt;&gt; 4) | pgprot_val(pgprot)); }</div><div class='del'>-</div><div class='del'>-static pte_t srmmu_mk_pte_io(unsigned long page, pgprot_t pgprot, int space)</div><div class='del'>-{ return __pte(((page) &gt;&gt; 4) | (space &lt;&lt; 28) | pgprot_val(pgprot)); }</div><div class='del'>-</div><div class='ctx'> /* XXX should we hyper_flush_whole_icache here - Anton */</div><div class='ctx'> static inline void srmmu_ctxd_set(ctxd_t *ctxp, pgd_t *pgdp)</div><div class='del'>-{ srmmu_set_pte((pte_t *)ctxp, (SRMMU_ET_PTD | (__nocache_pa((unsigned long) pgdp) &gt;&gt; 4))); }</div><div class='del'>-</div><div class='del'>-static inline void srmmu_pgd_set(pgd_t * pgdp, pmd_t * pmdp)</div><div class='del'>-{ srmmu_set_pte((pte_t *)pgdp, (SRMMU_ET_PTD | (__nocache_pa((unsigned long) pmdp) &gt;&gt; 4))); }</div><div class='add'>+{ set_pte((pte_t *)ctxp, (SRMMU_ET_PTD | (__nocache_pa((unsigned long) pgdp) &gt;&gt; 4))); }</div><div class='ctx'> </div><div class='del'>-static void srmmu_pmd_set(pmd_t *pmdp, pte_t *ptep)</div><div class='add'>+void pmd_set(pmd_t *pmdp, pte_t *ptep)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ptp;	/* Physical address, shifted right by 4 */</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	ptp = __nocache_pa((unsigned long) ptep) &gt;&gt; 4;</div><div class='ctx'> 	for (i = 0; i &lt; PTRS_PER_PTE/SRMMU_REAL_PTRS_PER_PTE; i++) {</div><div class='del'>-		srmmu_set_pte((pte_t *)&amp;pmdp-&gt;pmdv[i], SRMMU_ET_PTD | ptp);</div><div class='add'>+		set_pte((pte_t *)&amp;pmdp-&gt;pmdv[i], SRMMU_ET_PTD | ptp);</div><div class='ctx'> 		ptp += (SRMMU_REAL_PTRS_PER_PTE*sizeof(pte_t) &gt;&gt; 4);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void srmmu_pmd_populate(pmd_t *pmdp, struct page *ptep)</div><div class='add'>+void pmd_populate(struct mm_struct *mm, pmd_t *pmdp, struct page *ptep)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ptp;	/* Physical address, shifted right by 4 */</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	ptp = page_to_pfn(ptep) &lt;&lt; (PAGE_SHIFT-4);	/* watch for overflow */</div><div class='ctx'> 	for (i = 0; i &lt; PTRS_PER_PTE/SRMMU_REAL_PTRS_PER_PTE; i++) {</div><div class='del'>-		srmmu_set_pte((pte_t *)&amp;pmdp-&gt;pmdv[i], SRMMU_ET_PTD | ptp);</div><div class='add'>+		set_pte((pte_t *)&amp;pmdp-&gt;pmdv[i], SRMMU_ET_PTD | ptp);</div><div class='ctx'> 		ptp += (SRMMU_REAL_PTRS_PER_PTE*sizeof(pte_t) &gt;&gt; 4);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline pte_t srmmu_pte_modify(pte_t pte, pgprot_t newprot)</div><div class='del'>-{ return __pte((pte_val(pte) &amp; SRMMU_CHG_MASK) | pgprot_val(newprot)); }</div><div class='del'>-</div><div class='del'>-/* to find an entry in a top-level page table... */</div><div class='del'>-static inline pgd_t *srmmu_pgd_offset(struct mm_struct * mm, unsigned long address)</div><div class='del'>-{ return mm-&gt;pgd + (address &gt;&gt; SRMMU_PGDIR_SHIFT); }</div><div class='del'>-</div><div class='del'>-/* Find an entry in the second-level page table.. */</div><div class='del'>-static inline pmd_t *srmmu_pmd_offset(pgd_t * dir, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	return (pmd_t *) srmmu_pgd_page(*dir) +</div><div class='del'>-	    ((address &gt;&gt; PMD_SHIFT) &amp; (PTRS_PER_PMD - 1));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Find an entry in the third-level page table.. */ </div><div class='del'>-static inline pte_t *srmmu_pte_offset(pmd_t * dir, unsigned long address)</div><div class='add'>+pte_t *pte_offset_kernel(pmd_t * dir, unsigned long address)</div><div class='ctx'> {</div><div class='ctx'> 	void *pte;</div><div class='ctx'> </div><div class='hunk'>@@ -276,23 +146,6 @@ static inline pte_t *srmmu_pte_offset(pmd_t * dir, unsigned long address)</div><div class='ctx'> 	    ((address &gt;&gt; PAGE_SHIFT) &amp; (PTRS_PER_PTE - 1));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned long srmmu_swp_type(swp_entry_t entry)</div><div class='del'>-{</div><div class='del'>-	return (entry.val &gt;&gt; SRMMU_SWP_TYPE_SHIFT) &amp; SRMMU_SWP_TYPE_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long srmmu_swp_offset(swp_entry_t entry)</div><div class='del'>-{</div><div class='del'>-	return (entry.val &gt;&gt; SRMMU_SWP_OFF_SHIFT) &amp; SRMMU_SWP_OFF_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static swp_entry_t srmmu_swp_entry(unsigned long type, unsigned long offset)</div><div class='del'>-{</div><div class='del'>-	return (swp_entry_t) {</div><div class='del'>-		  (type &amp; SRMMU_SWP_TYPE_MASK) &lt;&lt; SRMMU_SWP_TYPE_SHIFT</div><div class='del'>-		| (offset &amp; SRMMU_SWP_OFF_MASK) &lt;&lt; SRMMU_SWP_OFF_SHIFT };</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * size: bytes to allocate in the nocache area.</div><div class='ctx'>  * align: bytes, number to align at.</div><div class='hunk'>@@ -325,7 +178,7 @@ static unsigned long __srmmu_get_nocache(int size, int align)</div><div class='ctx'> 	return (SRMMU_NOCACHE_VADDR + (offset &lt;&lt; SRMMU_NOCACHE_BITMAP_SHIFT));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned long srmmu_get_nocache(int size, int align)</div><div class='add'>+unsigned long srmmu_get_nocache(int size, int align)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long tmp;</div><div class='ctx'> </div><div class='hunk'>@@ -337,7 +190,7 @@ static unsigned long srmmu_get_nocache(int size, int align)</div><div class='ctx'> 	return tmp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void srmmu_free_nocache(unsigned long vaddr, int size)</div><div class='add'>+void srmmu_free_nocache(unsigned long vaddr, int size)</div><div class='ctx'> {</div><div class='ctx'> 	int offset;</div><div class='ctx'> </div><div class='hunk'>@@ -429,15 +282,15 @@ static void __init srmmu_nocache_init(void)</div><div class='ctx'> </div><div class='ctx'> 	while (vaddr &lt; srmmu_nocache_end) {</div><div class='ctx'> 		pgd = pgd_offset_k(vaddr);</div><div class='del'>-		pmd = srmmu_pmd_offset(__nocache_fix(pgd), vaddr);</div><div class='del'>-		pte = srmmu_pte_offset(__nocache_fix(pmd), vaddr);</div><div class='add'>+		pmd = pmd_offset(__nocache_fix(pgd), vaddr);</div><div class='add'>+		pte = pte_offset_kernel(__nocache_fix(pmd), vaddr);</div><div class='ctx'> </div><div class='ctx'> 		pteval = ((paddr &gt;&gt; 4) | SRMMU_ET_PTE | SRMMU_PRIV);</div><div class='ctx'> </div><div class='ctx'> 		if (srmmu_cache_pagetables)</div><div class='ctx'> 			pteval |= SRMMU_CACHE;</div><div class='ctx'> </div><div class='del'>-		srmmu_set_pte(__nocache_fix(pte), __pte(pteval));</div><div class='add'>+		set_pte(__nocache_fix(pte), __pte(pteval));</div><div class='ctx'> </div><div class='ctx'> 		vaddr += PAGE_SIZE;</div><div class='ctx'> 		paddr += PAGE_SIZE;</div><div class='hunk'>@@ -447,7 +300,7 @@ static void __init srmmu_nocache_init(void)</div><div class='ctx'> 	flush_tlb_all();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline pgd_t *srmmu_get_pgd_fast(void)</div><div class='add'>+pgd_t *get_pgd_fast(void)</div><div class='ctx'> {</div><div class='ctx'> 	pgd_t *pgd = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -462,21 +315,6 @@ static inline pgd_t *srmmu_get_pgd_fast(void)</div><div class='ctx'> 	return pgd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void srmmu_free_pgd_fast(pgd_t *pgd)</div><div class='del'>-{</div><div class='del'>-	srmmu_free_nocache((unsigned long)pgd, SRMMU_PGD_TABLE_SIZE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static pmd_t *srmmu_pmd_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	return (pmd_t *)srmmu_get_nocache(SRMMU_PMD_TABLE_SIZE, SRMMU_PMD_TABLE_SIZE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void srmmu_pmd_free(pmd_t * pmd)</div><div class='del'>-{</div><div class='del'>-	srmmu_free_nocache((unsigned long)pmd, SRMMU_PMD_TABLE_SIZE);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Hardware needs alignment to 256 only, but we align to whole page size</div><div class='ctx'>  * to reduce fragmentation problems due to the buddy principle.</div><div class='hunk'>@@ -485,31 +323,19 @@ static void srmmu_pmd_free(pmd_t * pmd)</div><div class='ctx'>  * Alignments up to the page size are the same for physical and virtual</div><div class='ctx'>  * addresses of the nocache area.</div><div class='ctx'>  */</div><div class='del'>-static pte_t *</div><div class='del'>-srmmu_pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	return (pte_t *)srmmu_get_nocache(PTE_SIZE, PTE_SIZE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static pgtable_t</div><div class='del'>-srmmu_pte_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='add'>+pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long pte;</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> </div><div class='del'>-	if ((pte = (unsigned long)srmmu_pte_alloc_one_kernel(mm, address)) == 0)</div><div class='add'>+	if ((pte = (unsigned long)pte_alloc_one_kernel(mm, address)) == 0)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	page = pfn_to_page( __nocache_pa(pte) &gt;&gt; PAGE_SHIFT );</div><div class='ctx'> 	pgtable_page_ctor(page);</div><div class='ctx'> 	return page;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void srmmu_free_pte_fast(pte_t *pte)</div><div class='del'>-{</div><div class='del'>-	srmmu_free_nocache((unsigned long)pte, PTE_SIZE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void srmmu_pte_free(pgtable_t pte)</div><div class='add'>+void pte_free(struct mm_struct *mm, pgtable_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long p;</div><div class='ctx'> </div><div class='hunk'>@@ -560,8 +386,8 @@ static inline void free_context(int context)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static void srmmu_switch_mm(struct mm_struct *old_mm, struct mm_struct *mm,</div><div class='del'>-    struct task_struct *tsk, int cpu)</div><div class='add'>+void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm,</div><div class='add'>+	       struct task_struct *tsk)</div><div class='ctx'> {</div><div class='ctx'> 	if(mm-&gt;context == NO_CONTEXT) {</div><div class='ctx'> 		spin_lock(&amp;srmmu_context_spinlock);</div><div class='hunk'>@@ -590,8 +416,8 @@ static inline void srmmu_mapioaddr(unsigned long physaddr,</div><div class='ctx'> </div><div class='ctx'> 	physaddr &amp;= PAGE_MASK;</div><div class='ctx'> 	pgdp = pgd_offset_k(virt_addr);</div><div class='del'>-	pmdp = srmmu_pmd_offset(pgdp, virt_addr);</div><div class='del'>-	ptep = srmmu_pte_offset(pmdp, virt_addr);</div><div class='add'>+	pmdp = pmd_offset(pgdp, virt_addr);</div><div class='add'>+	ptep = pte_offset_kernel(pmdp, virt_addr);</div><div class='ctx'> 	tmp = (physaddr &gt;&gt; 4) | SRMMU_ET_PTE;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -602,11 +428,11 @@ static inline void srmmu_mapioaddr(unsigned long physaddr,</div><div class='ctx'> 	tmp |= (bus_type &lt;&lt; 28);</div><div class='ctx'> 	tmp |= SRMMU_PRIV;</div><div class='ctx'> 	__flush_page_to_ram(virt_addr);</div><div class='del'>-	srmmu_set_pte(ptep, __pte(tmp));</div><div class='add'>+	set_pte(ptep, __pte(tmp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void srmmu_mapiorange(unsigned int bus, unsigned long xpa,</div><div class='del'>-    unsigned long xva, unsigned int len)</div><div class='add'>+void srmmu_mapiorange(unsigned int bus, unsigned long xpa,</div><div class='add'>+		      unsigned long xva, unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	while (len != 0) {</div><div class='ctx'> 		len -= PAGE_SIZE;</div><div class='hunk'>@@ -624,14 +450,14 @@ static inline void srmmu_unmapioaddr(unsigned long virt_addr)</div><div class='ctx'> 	pte_t *ptep;</div><div class='ctx'> </div><div class='ctx'> 	pgdp = pgd_offset_k(virt_addr);</div><div class='del'>-	pmdp = srmmu_pmd_offset(pgdp, virt_addr);</div><div class='del'>-	ptep = srmmu_pte_offset(pmdp, virt_addr);</div><div class='add'>+	pmdp = pmd_offset(pgdp, virt_addr);</div><div class='add'>+	ptep = pte_offset_kernel(pmdp, virt_addr);</div><div class='ctx'> </div><div class='ctx'> 	/* No need to flush uncacheable page. */</div><div class='del'>-	srmmu_pte_clear(ptep);</div><div class='add'>+	__pte_clear(ptep);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len)</div><div class='add'>+void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	while (len != 0) {</div><div class='ctx'> 		len -= PAGE_SIZE;</div><div class='hunk'>@@ -641,34 +467,6 @@ static void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len)</div><div class='ctx'> 	flush_tlb_all();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * On the SRMMU we do not have the problems with limited tlb entries</div><div class='del'>- * for mapping kernel pages, so we just take things from the free page</div><div class='del'>- * pool.  As a side effect we are putting a little too much pressure</div><div class='del'>- * on the gfp() subsystem.  This setup also makes the logic of the</div><div class='del'>- * iommu mapping code a lot easier as we can transparently handle</div><div class='del'>- * mappings on the kernel stack without any special code as we did</div><div class='del'>- * need on the sun4c.</div><div class='del'>- */</div><div class='del'>-static struct thread_info *srmmu_alloc_thread_info_node(int node)</div><div class='del'>-{</div><div class='del'>-	struct thread_info *ret;</div><div class='del'>-</div><div class='del'>-	ret = (struct thread_info *)__get_free_pages(GFP_KERNEL,</div><div class='del'>-						     THREAD_INFO_ORDER);</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-	if (ret)</div><div class='del'>-		memset(ret, 0, PAGE_SIZE &lt;&lt; THREAD_INFO_ORDER);</div><div class='del'>-#endif /* DEBUG_STACK_USAGE */</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void srmmu_free_thread_info(struct thread_info *ti)</div><div class='del'>-{</div><div class='del'>-	free_pages((unsigned long)ti, THREAD_INFO_ORDER);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* tsunami.S */</div><div class='ctx'> extern void tsunami_flush_cache_all(void);</div><div class='ctx'> extern void tsunami_flush_cache_mm(struct mm_struct *mm);</div><div class='hunk'>@@ -683,38 +481,6 @@ extern void tsunami_flush_tlb_range(struct vm_area_struct *vma, unsigned long st</div><div class='ctx'> extern void tsunami_flush_tlb_page(struct vm_area_struct *vma, unsigned long page);</div><div class='ctx'> extern void tsunami_setup_blockops(void);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Workaround, until we find what's going on with Swift. When low on memory,</div><div class='del'>- * it sometimes loops in fault/handle_mm_fault incl. flush_tlb_page to find</div><div class='del'>- * out it is already in page tables/ fault again on the same instruction.</div><div class='del'>- * I really don't understand it, have checked it and contexts</div><div class='del'>- * are right, flush_tlb_all is done as well, and it faults again...</div><div class='del'>- * Strange. -jj</div><div class='del'>- *</div><div class='del'>- * The following code is a deadwood that may be necessary when</div><div class='del'>- * we start to make precise page flushes again. --zaitcev</div><div class='del'>- */</div><div class='del'>-static void swift_update_mmu_cache(struct vm_area_struct * vma, unsigned long address, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-#if 0</div><div class='del'>-	static unsigned long last;</div><div class='del'>-	unsigned int val;</div><div class='del'>-	/* unsigned int n; */</div><div class='del'>-</div><div class='del'>-	if (address == last) {</div><div class='del'>-		val = srmmu_hwprobe(address);</div><div class='del'>-		if (val != 0 &amp;&amp; pte_val(*ptep) != val) {</div><div class='del'>-			printk("swift_update_mmu_cache: "</div><div class='del'>-			    "addr %lx put %08x probed %08x from %p\n",</div><div class='del'>-			    address, pte_val(*ptep), val,</div><div class='del'>-			    __builtin_return_address(0));</div><div class='del'>-			srmmu_flush_whole_tlb();</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	last = address;</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* swift.S */</div><div class='ctx'> extern void swift_flush_cache_all(void);</div><div class='ctx'> extern void swift_flush_cache_mm(struct mm_struct *mm);</div><div class='hunk'>@@ -767,244 +533,6 @@ void swift_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)</div><div class='ctx'>  * with respect to cache coherency.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/* Cypress flushes. */</div><div class='del'>-static void cypress_flush_cache_all(void)</div><div class='del'>-{</div><div class='del'>-	volatile unsigned long cypress_sucks;</div><div class='del'>-	unsigned long faddr, tagval;</div><div class='del'>-</div><div class='del'>-	flush_user_windows();</div><div class='del'>-	for(faddr = 0; faddr &lt; 0x10000; faddr += 0x20) {</div><div class='del'>-		__asm__ __volatile__("lda [%1 + %2] %3, %0\n\t" :</div><div class='del'>-				     "=r" (tagval) :</div><div class='del'>-				     "r" (faddr), "r" (0x40000),</div><div class='del'>-				     "i" (ASI_M_DATAC_TAG));</div><div class='del'>-</div><div class='del'>-		/* If modified and valid, kick it. */</div><div class='del'>-		if((tagval &amp; 0x60) == 0x60)</div><div class='del'>-			cypress_sucks = *(unsigned long *)(0xf0020000 + faddr);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cypress_flush_cache_mm(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	register unsigned long a, b, c, d, e, f, g;</div><div class='del'>-	unsigned long flags, faddr;</div><div class='del'>-	int octx;</div><div class='del'>-</div><div class='del'>-	FLUSH_BEGIN(mm)</div><div class='del'>-	flush_user_windows();</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	octx = srmmu_get_context();</div><div class='del'>-	srmmu_set_context(mm-&gt;context);</div><div class='del'>-	a = 0x20; b = 0x40; c = 0x60;</div><div class='del'>-	d = 0x80; e = 0xa0; f = 0xc0; g = 0xe0;</div><div class='del'>-</div><div class='del'>-	faddr = (0x10000 - 0x100);</div><div class='del'>-	goto inside;</div><div class='del'>-	do {</div><div class='del'>-		faddr -= 0x100;</div><div class='del'>-	inside:</div><div class='del'>-		__asm__ __volatile__("sta %%g0, [%0] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %2] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %3] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %4] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %5] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %6] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %7] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %8] %1\n\t" : :</div><div class='del'>-				     "r" (faddr), "i" (ASI_M_FLUSH_CTX),</div><div class='del'>-				     "r" (a), "r" (b), "r" (c), "r" (d),</div><div class='del'>-				     "r" (e), "r" (f), "r" (g));</div><div class='del'>-	} while(faddr);</div><div class='del'>-	srmmu_set_context(octx);</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-	FLUSH_END</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cypress_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-	register unsigned long a, b, c, d, e, f, g;</div><div class='del'>-	unsigned long flags, faddr;</div><div class='del'>-	int octx;</div><div class='del'>-</div><div class='del'>-	FLUSH_BEGIN(mm)</div><div class='del'>-	flush_user_windows();</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	octx = srmmu_get_context();</div><div class='del'>-	srmmu_set_context(mm-&gt;context);</div><div class='del'>-	a = 0x20; b = 0x40; c = 0x60;</div><div class='del'>-	d = 0x80; e = 0xa0; f = 0xc0; g = 0xe0;</div><div class='del'>-</div><div class='del'>-	start &amp;= SRMMU_REAL_PMD_MASK;</div><div class='del'>-	while(start &lt; end) {</div><div class='del'>-		faddr = (start + (0x10000 - 0x100));</div><div class='del'>-		goto inside;</div><div class='del'>-		do {</div><div class='del'>-			faddr -= 0x100;</div><div class='del'>-		inside:</div><div class='del'>-			__asm__ __volatile__("sta %%g0, [%0] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %2] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %3] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %4] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %5] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %6] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %7] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %8] %1\n\t" : :</div><div class='del'>-					     "r" (faddr),</div><div class='del'>-					     "i" (ASI_M_FLUSH_SEG),</div><div class='del'>-					     "r" (a), "r" (b), "r" (c), "r" (d),</div><div class='del'>-					     "r" (e), "r" (f), "r" (g));</div><div class='del'>-		} while (faddr != start);</div><div class='del'>-		start += SRMMU_REAL_PMD_SIZE;</div><div class='del'>-	}</div><div class='del'>-	srmmu_set_context(octx);</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-	FLUSH_END</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cypress_flush_cache_page(struct vm_area_struct *vma, unsigned long page)</div><div class='del'>-{</div><div class='del'>-	register unsigned long a, b, c, d, e, f, g;</div><div class='del'>-	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-	unsigned long flags, line;</div><div class='del'>-	int octx;</div><div class='del'>-</div><div class='del'>-	FLUSH_BEGIN(mm)</div><div class='del'>-	flush_user_windows();</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	octx = srmmu_get_context();</div><div class='del'>-	srmmu_set_context(mm-&gt;context);</div><div class='del'>-	a = 0x20; b = 0x40; c = 0x60;</div><div class='del'>-	d = 0x80; e = 0xa0; f = 0xc0; g = 0xe0;</div><div class='del'>-</div><div class='del'>-	page &amp;= PAGE_MASK;</div><div class='del'>-	line = (page + PAGE_SIZE) - 0x100;</div><div class='del'>-	goto inside;</div><div class='del'>-	do {</div><div class='del'>-		line -= 0x100;</div><div class='del'>-	inside:</div><div class='del'>-			__asm__ __volatile__("sta %%g0, [%0] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %2] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %3] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %4] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %5] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %6] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %7] %1\n\t"</div><div class='del'>-					     "sta %%g0, [%0 + %8] %1\n\t" : :</div><div class='del'>-					     "r" (line),</div><div class='del'>-					     "i" (ASI_M_FLUSH_PAGE),</div><div class='del'>-					     "r" (a), "r" (b), "r" (c), "r" (d),</div><div class='del'>-					     "r" (e), "r" (f), "r" (g));</div><div class='del'>-	} while(line != page);</div><div class='del'>-	srmmu_set_context(octx);</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-	FLUSH_END</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Cypress is copy-back, at least that is how we configure it. */</div><div class='del'>-static void cypress_flush_page_to_ram(unsigned long page)</div><div class='del'>-{</div><div class='del'>-	register unsigned long a, b, c, d, e, f, g;</div><div class='del'>-	unsigned long line;</div><div class='del'>-</div><div class='del'>-	a = 0x20; b = 0x40; c = 0x60; d = 0x80; e = 0xa0; f = 0xc0; g = 0xe0;</div><div class='del'>-	page &amp;= PAGE_MASK;</div><div class='del'>-	line = (page + PAGE_SIZE) - 0x100;</div><div class='del'>-	goto inside;</div><div class='del'>-	do {</div><div class='del'>-		line -= 0x100;</div><div class='del'>-	inside:</div><div class='del'>-		__asm__ __volatile__("sta %%g0, [%0] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %2] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %3] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %4] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %5] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %6] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %7] %1\n\t"</div><div class='del'>-				     "sta %%g0, [%0 + %8] %1\n\t" : :</div><div class='del'>-				     "r" (line),</div><div class='del'>-				     "i" (ASI_M_FLUSH_PAGE),</div><div class='del'>-				     "r" (a), "r" (b), "r" (c), "r" (d),</div><div class='del'>-				     "r" (e), "r" (f), "r" (g));</div><div class='del'>-	} while(line != page);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Cypress is also IO cache coherent. */</div><div class='del'>-static void cypress_flush_page_for_dma(unsigned long page)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Cypress has unified L2 VIPT, from which both instructions and data</div><div class='del'>- * are stored.  It does not have an onboard icache of any sort, therefore</div><div class='del'>- * no flush is necessary.</div><div class='del'>- */</div><div class='del'>-static void cypress_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cypress_flush_tlb_all(void)</div><div class='del'>-{</div><div class='del'>-	srmmu_flush_whole_tlb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cypress_flush_tlb_mm(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	FLUSH_BEGIN(mm)</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"lda	[%0] %3, %%g5\n\t"</div><div class='del'>-	"sta	%2, [%0] %3\n\t"</div><div class='del'>-	"sta	%%g0, [%1] %4\n\t"</div><div class='del'>-	"sta	%%g5, [%0] %3\n"</div><div class='del'>-	: /* no outputs */</div><div class='del'>-	: "r" (SRMMU_CTX_REG), "r" (0x300), "r" (mm-&gt;context),</div><div class='del'>-	  "i" (ASI_M_MMUREGS), "i" (ASI_M_FLUSH_PROBE)</div><div class='del'>-	: "g5");</div><div class='del'>-	FLUSH_END</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cypress_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-	unsigned long size;</div><div class='del'>-</div><div class='del'>-	FLUSH_BEGIN(mm)</div><div class='del'>-	start &amp;= SRMMU_PGDIR_MASK;</div><div class='del'>-	size = SRMMU_PGDIR_ALIGN(end) - start;</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-		"lda	[%0] %5, %%g5\n\t"</div><div class='del'>-		"sta	%1, [%0] %5\n"</div><div class='del'>-		"1:\n\t"</div><div class='del'>-		"subcc	%3, %4, %3\n\t"</div><div class='del'>-		"bne	1b\n\t"</div><div class='del'>-		" sta	%%g0, [%2 + %3] %6\n\t"</div><div class='del'>-		"sta	%%g5, [%0] %5\n"</div><div class='del'>-	: /* no outputs */</div><div class='del'>-	: "r" (SRMMU_CTX_REG), "r" (mm-&gt;context), "r" (start | 0x200),</div><div class='del'>-	  "r" (size), "r" (SRMMU_PGDIR_SIZE), "i" (ASI_M_MMUREGS),</div><div class='del'>-	  "i" (ASI_M_FLUSH_PROBE)</div><div class='del'>-	: "g5", "cc");</div><div class='del'>-	FLUSH_END</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cypress_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-</div><div class='del'>-	FLUSH_BEGIN(mm)</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"lda	[%0] %3, %%g5\n\t"</div><div class='del'>-	"sta	%1, [%0] %3\n\t"</div><div class='del'>-	"sta	%%g0, [%2] %4\n\t"</div><div class='del'>-	"sta	%%g5, [%0] %3\n"</div><div class='del'>-	: /* no outputs */</div><div class='del'>-	: "r" (SRMMU_CTX_REG), "r" (mm-&gt;context), "r" (page &amp; PAGE_MASK),</div><div class='del'>-	  "i" (ASI_M_MMUREGS), "i" (ASI_M_FLUSH_PROBE)</div><div class='del'>-	: "g5");</div><div class='del'>-	FLUSH_END</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* viking.S */</div><div class='ctx'> extern void viking_flush_cache_all(void);</div><div class='ctx'> extern void viking_flush_cache_mm(struct mm_struct *mm);</div><div class='hunk'>@@ -1065,21 +593,21 @@ static void __init srmmu_early_allocate_ptable_skeleton(unsigned long start,</div><div class='ctx'> </div><div class='ctx'> 	while(start &lt; end) {</div><div class='ctx'> 		pgdp = pgd_offset_k(start);</div><div class='del'>-		if(srmmu_pgd_none(*(pgd_t *)__nocache_fix(pgdp))) {</div><div class='add'>+		if (pgd_none(*(pgd_t *)__nocache_fix(pgdp))) {</div><div class='ctx'> 			pmdp = (pmd_t *) __srmmu_get_nocache(</div><div class='ctx'> 			    SRMMU_PMD_TABLE_SIZE, SRMMU_PMD_TABLE_SIZE);</div><div class='ctx'> 			if (pmdp == NULL)</div><div class='ctx'> 				early_pgtable_allocfail("pmd");</div><div class='ctx'> 			memset(__nocache_fix(pmdp), 0, SRMMU_PMD_TABLE_SIZE);</div><div class='del'>-			srmmu_pgd_set(__nocache_fix(pgdp), pmdp);</div><div class='add'>+			pgd_set(__nocache_fix(pgdp), pmdp);</div><div class='ctx'> 		}</div><div class='del'>-		pmdp = srmmu_pmd_offset(__nocache_fix(pgdp), start);</div><div class='add'>+		pmdp = pmd_offset(__nocache_fix(pgdp), start);</div><div class='ctx'> 		if(srmmu_pmd_none(*(pmd_t *)__nocache_fix(pmdp))) {</div><div class='ctx'> 			ptep = (pte_t *)__srmmu_get_nocache(PTE_SIZE, PTE_SIZE);</div><div class='ctx'> 			if (ptep == NULL)</div><div class='ctx'> 				early_pgtable_allocfail("pte");</div><div class='ctx'> 			memset(__nocache_fix(ptep), 0, PTE_SIZE);</div><div class='del'>-			srmmu_pmd_set(__nocache_fix(pmdp), ptep);</div><div class='add'>+			pmd_set(__nocache_fix(pmdp), ptep);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (start &gt; (0xffffffffUL - PMD_SIZE))</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1096,21 +624,21 @@ static void __init srmmu_allocate_ptable_skeleton(unsigned long start,</div><div class='ctx'> </div><div class='ctx'> 	while(start &lt; end) {</div><div class='ctx'> 		pgdp = pgd_offset_k(start);</div><div class='del'>-		if(srmmu_pgd_none(*pgdp)) {</div><div class='add'>+		if (pgd_none(*pgdp)) {</div><div class='ctx'> 			pmdp = (pmd_t *)__srmmu_get_nocache(SRMMU_PMD_TABLE_SIZE, SRMMU_PMD_TABLE_SIZE);</div><div class='ctx'> 			if (pmdp == NULL)</div><div class='ctx'> 				early_pgtable_allocfail("pmd");</div><div class='ctx'> 			memset(pmdp, 0, SRMMU_PMD_TABLE_SIZE);</div><div class='del'>-			srmmu_pgd_set(pgdp, pmdp);</div><div class='add'>+			pgd_set(pgdp, pmdp);</div><div class='ctx'> 		}</div><div class='del'>-		pmdp = srmmu_pmd_offset(pgdp, start);</div><div class='add'>+		pmdp = pmd_offset(pgdp, start);</div><div class='ctx'> 		if(srmmu_pmd_none(*pmdp)) {</div><div class='ctx'> 			ptep = (pte_t *) __srmmu_get_nocache(PTE_SIZE,</div><div class='ctx'> 							     PTE_SIZE);</div><div class='ctx'> 			if (ptep == NULL)</div><div class='ctx'> 				early_pgtable_allocfail("pte");</div><div class='ctx'> 			memset(ptep, 0, PTE_SIZE);</div><div class='del'>-			srmmu_pmd_set(pmdp, ptep);</div><div class='add'>+			pmd_set(pmdp, ptep);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (start &gt; (0xffffffffUL - PMD_SIZE))</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1118,6 +646,23 @@ static void __init srmmu_allocate_ptable_skeleton(unsigned long start,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* These flush types are not available on all chips... */</div><div class='add'>+static inline unsigned long srmmu_probe(unsigned long vaddr)</div><div class='add'>+{</div><div class='add'>+	unsigned long retval;</div><div class='add'>+</div><div class='add'>+	if (sparc_cpu_model != sparc_leon) {</div><div class='add'>+</div><div class='add'>+		vaddr &amp;= PAGE_MASK;</div><div class='add'>+		__asm__ __volatile__("lda [%1] %2, %0\n\t" :</div><div class='add'>+				     "=r" (retval) :</div><div class='add'>+				     "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE));</div><div class='add'>+	} else {</div><div class='add'>+		retval = leon_swprobe(vaddr, 0);</div><div class='add'>+	}</div><div class='add'>+	return retval;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This is much cleaner than poking around physical address space</div><div class='ctx'>  * looking at the prom's page table directly which is what most</div><div class='hunk'>@@ -1137,7 +682,7 @@ static void __init srmmu_inherit_prom_mappings(unsigned long start,</div><div class='ctx'> 			break; /* probably wrap around */</div><div class='ctx'> 		if(start == 0xfef00000)</div><div class='ctx'> 			start = KADB_DEBUGGER_BEGVM;</div><div class='del'>-		if(!(prompte = srmmu_hwprobe(start))) {</div><div class='add'>+		if(!(prompte = srmmu_probe(start))) {</div><div class='ctx'> 			start += PAGE_SIZE;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1146,12 +691,12 @@ static void __init srmmu_inherit_prom_mappings(unsigned long start,</div><div class='ctx'> 		what = 0;</div><div class='ctx'>     </div><div class='ctx'> 		if(!(start &amp; ~(SRMMU_REAL_PMD_MASK))) {</div><div class='del'>-			if(srmmu_hwprobe((start-PAGE_SIZE) + SRMMU_REAL_PMD_SIZE) == prompte)</div><div class='add'>+			if(srmmu_probe((start-PAGE_SIZE) + SRMMU_REAL_PMD_SIZE) == prompte)</div><div class='ctx'> 				what = 1;</div><div class='ctx'> 		}</div><div class='ctx'>     </div><div class='ctx'> 		if(!(start &amp; ~(SRMMU_PGDIR_MASK))) {</div><div class='del'>-			if(srmmu_hwprobe((start-PAGE_SIZE) + SRMMU_PGDIR_SIZE) ==</div><div class='add'>+			if(srmmu_probe((start-PAGE_SIZE) + SRMMU_PGDIR_SIZE) ==</div><div class='ctx'> 			   prompte)</div><div class='ctx'> 				what = 2;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1162,21 +707,21 @@ static void __init srmmu_inherit_prom_mappings(unsigned long start,</div><div class='ctx'> 			start += SRMMU_PGDIR_SIZE;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		if(srmmu_pgd_none(*(pgd_t *)__nocache_fix(pgdp))) {</div><div class='add'>+		if (pgd_none(*(pgd_t *)__nocache_fix(pgdp))) {</div><div class='ctx'> 			pmdp = (pmd_t *)__srmmu_get_nocache(SRMMU_PMD_TABLE_SIZE, SRMMU_PMD_TABLE_SIZE);</div><div class='ctx'> 			if (pmdp == NULL)</div><div class='ctx'> 				early_pgtable_allocfail("pmd");</div><div class='ctx'> 			memset(__nocache_fix(pmdp), 0, SRMMU_PMD_TABLE_SIZE);</div><div class='del'>-			srmmu_pgd_set(__nocache_fix(pgdp), pmdp);</div><div class='add'>+			pgd_set(__nocache_fix(pgdp), pmdp);</div><div class='ctx'> 		}</div><div class='del'>-		pmdp = srmmu_pmd_offset(__nocache_fix(pgdp), start);</div><div class='add'>+		pmdp = pmd_offset(__nocache_fix(pgdp), start);</div><div class='ctx'> 		if(srmmu_pmd_none(*(pmd_t *)__nocache_fix(pmdp))) {</div><div class='ctx'> 			ptep = (pte_t *) __srmmu_get_nocache(PTE_SIZE,</div><div class='ctx'> 							     PTE_SIZE);</div><div class='ctx'> 			if (ptep == NULL)</div><div class='ctx'> 				early_pgtable_allocfail("pte");</div><div class='ctx'> 			memset(__nocache_fix(ptep), 0, PTE_SIZE);</div><div class='del'>-			srmmu_pmd_set(__nocache_fix(pmdp), ptep);</div><div class='add'>+			pmd_set(__nocache_fix(pmdp), ptep);</div><div class='ctx'> 		}</div><div class='ctx'> 		if(what == 1) {</div><div class='ctx'> 			/*</div><div class='hunk'>@@ -1190,7 +735,7 @@ static void __init srmmu_inherit_prom_mappings(unsigned long start,</div><div class='ctx'> 			start += SRMMU_REAL_PMD_SIZE;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		ptep = srmmu_pte_offset(__nocache_fix(pmdp), start);</div><div class='add'>+		ptep = pte_offset_kernel(__nocache_fix(pmdp), start);</div><div class='ctx'> 		*(pte_t *)__nocache_fix(ptep) = __pte(prompte);</div><div class='ctx'> 		start += PAGE_SIZE;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1231,13 +776,6 @@ static unsigned long __init map_spbank(unsigned long vbase, int sp_entry)</div><div class='ctx'> 	return vstart;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void memprobe_error(char *msg)</div><div class='del'>-{</div><div class='del'>-	prom_printf(msg);</div><div class='del'>-	prom_printf("Halting now...\n");</div><div class='del'>-	prom_halt();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void map_kernel(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1249,8 +787,6 @@ static inline void map_kernel(void)</div><div class='ctx'> 	for (i = 0; sp_banks[i].num_bytes != 0; i++) {</div><div class='ctx'> 		map_spbank((unsigned long)__va(sp_banks[i].base_addr), i);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_SIMM13(user_ptrs_per_pgd, PAGE_OFFSET / SRMMU_PGDIR_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Paging initialization on the Sparc Reference MMU. */</div><div class='hunk'>@@ -1312,7 +848,7 @@ void __init srmmu_paging_init(void)</div><div class='ctx'> 	srmmu_set_ctable_ptr((unsigned long)srmmu_ctx_table_phys);</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	/* Stop from hanging here... */</div><div class='del'>-	local_flush_tlb_all();</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> #else</div><div class='ctx'> 	flush_tlb_all();</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1326,8 +862,8 @@ void __init srmmu_paging_init(void)</div><div class='ctx'> 	srmmu_allocate_ptable_skeleton(PKMAP_BASE, PKMAP_END);</div><div class='ctx'> </div><div class='ctx'> 	pgd = pgd_offset_k(PKMAP_BASE);</div><div class='del'>-	pmd = srmmu_pmd_offset(pgd, PKMAP_BASE);</div><div class='del'>-	pte = srmmu_pte_offset(pmd, PKMAP_BASE);</div><div class='add'>+	pmd = pmd_offset(pgd, PKMAP_BASE);</div><div class='add'>+	pte = pte_offset_kernel(pmd, PKMAP_BASE);</div><div class='ctx'> 	pkmap_page_table = pte;</div><div class='ctx'> </div><div class='ctx'> 	flush_cache_all();</div><div class='hunk'>@@ -1359,7 +895,7 @@ void __init srmmu_paging_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void srmmu_mmu_info(struct seq_file *m)</div><div class='add'>+void mmu_info(struct seq_file *m)</div><div class='ctx'> {</div><div class='ctx'> 	seq_printf(m, </div><div class='ctx'> 		   "MMU type\t: %s\n"</div><div class='hunk'>@@ -1372,11 +908,7 @@ static void srmmu_mmu_info(struct seq_file *m)</div><div class='ctx'> 		   srmmu_nocache_map.used &lt;&lt; SRMMU_NOCACHE_BITMAP_SHIFT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void srmmu_update_mmu_cache(struct vm_area_struct * vma, unsigned long address, pte_t pte)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void srmmu_destroy_context(struct mm_struct *mm)</div><div class='add'>+void destroy_context(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='ctx'> 	if(mm-&gt;context != NO_CONTEXT) {</div><div class='hunk'>@@ -1474,6 +1006,20 @@ static void __cpuinit poke_hypersparc(void)</div><div class='ctx'> 	clear = srmmu_get_fstatus();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct sparc32_cachetlb_ops hypersparc_ops = {</div><div class='add'>+	.cache_all	= hypersparc_flush_cache_all,</div><div class='add'>+	.cache_mm	= hypersparc_flush_cache_mm,</div><div class='add'>+	.cache_page	= hypersparc_flush_cache_page,</div><div class='add'>+	.cache_range	= hypersparc_flush_cache_range,</div><div class='add'>+	.tlb_all	= hypersparc_flush_tlb_all,</div><div class='add'>+	.tlb_mm		= hypersparc_flush_tlb_mm,</div><div class='add'>+	.tlb_page	= hypersparc_flush_tlb_page,</div><div class='add'>+	.tlb_range	= hypersparc_flush_tlb_range,</div><div class='add'>+	.page_to_ram	= hypersparc_flush_page_to_ram,</div><div class='add'>+	.sig_insns	= hypersparc_flush_sig_insns,</div><div class='add'>+	.page_for_dma	= hypersparc_flush_page_for_dma,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void __init init_hypersparc(void)</div><div class='ctx'> {</div><div class='ctx'> 	srmmu_name = "ROSS HyperSparc";</div><div class='hunk'>@@ -1482,118 +1028,13 @@ static void __init init_hypersparc(void)</div><div class='ctx'> 	init_vac_layout();</div><div class='ctx'> </div><div class='ctx'> 	is_hypersparc = 1;</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(pte_clear, srmmu_pte_clear, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_clear, srmmu_pmd_clear, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pgd_clear, srmmu_pgd_clear, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_all, hypersparc_flush_cache_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_mm, hypersparc_flush_cache_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_range, hypersparc_flush_cache_range, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_page, hypersparc_flush_cache_page, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_all, hypersparc_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_mm, hypersparc_flush_tlb_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_range, hypersparc_flush_tlb_range, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_page, hypersparc_flush_tlb_page, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(__flush_page_to_ram, hypersparc_flush_page_to_ram, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_sig_insns, hypersparc_flush_sig_insns, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_page_for_dma, hypersparc_flush_page_for_dma, BTFIXUPCALL_NOP);</div><div class='del'>-</div><div class='add'>+	sparc32_cachetlb_ops = &amp;hypersparc_ops;</div><div class='ctx'> </div><div class='ctx'> 	poke_srmmu = poke_hypersparc;</div><div class='ctx'> </div><div class='ctx'> 	hypersparc_setup_blockops();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __cpuinit poke_cypress(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long mreg = srmmu_get_mmureg();</div><div class='del'>-	unsigned long faddr, tagval;</div><div class='del'>-	volatile unsigned long cypress_sucks;</div><div class='del'>-	volatile unsigned long clear;</div><div class='del'>-</div><div class='del'>-	clear = srmmu_get_faddr();</div><div class='del'>-	clear = srmmu_get_fstatus();</div><div class='del'>-</div><div class='del'>-	if (!(mreg &amp; CYPRESS_CENABLE)) {</div><div class='del'>-		for(faddr = 0x0; faddr &lt; 0x10000; faddr += 20) {</div><div class='del'>-			__asm__ __volatile__("sta %%g0, [%0 + %1] %2\n\t"</div><div class='del'>-					     "sta %%g0, [%0] %2\n\t" : :</div><div class='del'>-					     "r" (faddr), "r" (0x40000),</div><div class='del'>-					     "i" (ASI_M_DATAC_TAG));</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		for(faddr = 0; faddr &lt; 0x10000; faddr += 0x20) {</div><div class='del'>-			__asm__ __volatile__("lda [%1 + %2] %3, %0\n\t" :</div><div class='del'>-					     "=r" (tagval) :</div><div class='del'>-					     "r" (faddr), "r" (0x40000),</div><div class='del'>-					     "i" (ASI_M_DATAC_TAG));</div><div class='del'>-</div><div class='del'>-			/* If modified and valid, kick it. */</div><div class='del'>-			if((tagval &amp; 0x60) == 0x60)</div><div class='del'>-				cypress_sucks = *(unsigned long *)</div><div class='del'>-							(0xf0020000 + faddr);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* And one more, for our good neighbor, Mr. Broken Cypress. */</div><div class='del'>-	clear = srmmu_get_faddr();</div><div class='del'>-	clear = srmmu_get_fstatus();</div><div class='del'>-</div><div class='del'>-	mreg |= (CYPRESS_CENABLE | CYPRESS_CMODE);</div><div class='del'>-	srmmu_set_mmureg(mreg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init init_cypress_common(void)</div><div class='del'>-{</div><div class='del'>-	init_vac_layout();</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(pte_clear, srmmu_pte_clear, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_clear, srmmu_pmd_clear, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pgd_clear, srmmu_pgd_clear, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_all, cypress_flush_cache_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_mm, cypress_flush_cache_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_range, cypress_flush_cache_range, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_page, cypress_flush_cache_page, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_all, cypress_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_mm, cypress_flush_tlb_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_page, cypress_flush_tlb_page, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_range, cypress_flush_tlb_range, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(__flush_page_to_ram, cypress_flush_page_to_ram, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_sig_insns, cypress_flush_sig_insns, BTFIXUPCALL_NOP);</div><div class='del'>-	BTFIXUPSET_CALL(flush_page_for_dma, cypress_flush_page_for_dma, BTFIXUPCALL_NOP);</div><div class='del'>-</div><div class='del'>-	poke_srmmu = poke_cypress;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init init_cypress_604(void)</div><div class='del'>-{</div><div class='del'>-	srmmu_name = "ROSS Cypress-604(UP)";</div><div class='del'>-	srmmu_modtype = Cypress;</div><div class='del'>-	init_cypress_common();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init init_cypress_605(unsigned long mrev)</div><div class='del'>-{</div><div class='del'>-	srmmu_name = "ROSS Cypress-605(MP)";</div><div class='del'>-	if(mrev == 0xe) {</div><div class='del'>-		srmmu_modtype = Cypress_vE;</div><div class='del'>-		hwbug_bitmask |= HWBUG_COPYBACK_BROKEN;</div><div class='del'>-	} else {</div><div class='del'>-		if(mrev == 0xd) {</div><div class='del'>-			srmmu_modtype = Cypress_vD;</div><div class='del'>-			hwbug_bitmask |= HWBUG_ASIFLUSH_BROKEN;</div><div class='del'>-		} else {</div><div class='del'>-			srmmu_modtype = Cypress;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	init_cypress_common();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void __cpuinit poke_swift(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long mreg;</div><div class='hunk'>@@ -1617,6 +1058,20 @@ static void __cpuinit poke_swift(void)</div><div class='ctx'> 	srmmu_set_mmureg(mreg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct sparc32_cachetlb_ops swift_ops = {</div><div class='add'>+	.cache_all	= swift_flush_cache_all,</div><div class='add'>+	.cache_mm	= swift_flush_cache_mm,</div><div class='add'>+	.cache_page	= swift_flush_cache_page,</div><div class='add'>+	.cache_range	= swift_flush_cache_range,</div><div class='add'>+	.tlb_all	= swift_flush_tlb_all,</div><div class='add'>+	.tlb_mm		= swift_flush_tlb_mm,</div><div class='add'>+	.tlb_page	= swift_flush_tlb_page,</div><div class='add'>+	.tlb_range	= swift_flush_tlb_range,</div><div class='add'>+	.page_to_ram	= swift_flush_page_to_ram,</div><div class='add'>+	.sig_insns	= swift_flush_sig_insns,</div><div class='add'>+	.page_for_dma	= swift_flush_page_for_dma,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define SWIFT_MASKID_ADDR  0x10003018</div><div class='ctx'> static void __init init_swift(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -1667,23 +1122,7 @@ static void __init init_swift(void)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_all, swift_flush_cache_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_mm, swift_flush_cache_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_page, swift_flush_cache_page, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_range, swift_flush_cache_range, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_all, swift_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_mm, swift_flush_tlb_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_page, swift_flush_tlb_page, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_range, swift_flush_tlb_range, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(__flush_page_to_ram, swift_flush_page_to_ram, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_sig_insns, swift_flush_sig_insns, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_page_for_dma, swift_flush_page_for_dma, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(update_mmu_cache, swift_update_mmu_cache, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='add'>+	sparc32_cachetlb_ops = &amp;swift_ops;</div><div class='ctx'> 	flush_page_for_dma_global = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1734,7 +1173,7 @@ static void turbosparc_flush_page_to_ram(unsigned long page)</div><div class='ctx'> #ifdef TURBOSPARC_WRITEBACK</div><div class='ctx'> 	volatile unsigned long clear;</div><div class='ctx'> </div><div class='del'>-	if (srmmu_hwprobe(page))</div><div class='add'>+	if (srmmu_probe(page))</div><div class='ctx'> 		turbosparc_flush_page_cache(page);</div><div class='ctx'> 	clear = srmmu_get_fstatus();</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1816,26 +1255,25 @@ static void __cpuinit poke_turbosparc(void)</div><div class='ctx'> 	srmmu_set_mmureg(mreg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct sparc32_cachetlb_ops turbosparc_ops = {</div><div class='add'>+	.cache_all	= turbosparc_flush_cache_all,</div><div class='add'>+	.cache_mm	= turbosparc_flush_cache_mm,</div><div class='add'>+	.cache_page	= turbosparc_flush_cache_page,</div><div class='add'>+	.cache_range	= turbosparc_flush_cache_range,</div><div class='add'>+	.tlb_all	= turbosparc_flush_tlb_all,</div><div class='add'>+	.tlb_mm		= turbosparc_flush_tlb_mm,</div><div class='add'>+	.tlb_page	= turbosparc_flush_tlb_page,</div><div class='add'>+	.tlb_range	= turbosparc_flush_tlb_range,</div><div class='add'>+	.page_to_ram	= turbosparc_flush_page_to_ram,</div><div class='add'>+	.sig_insns	= turbosparc_flush_sig_insns,</div><div class='add'>+	.page_for_dma	= turbosparc_flush_page_for_dma,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void __init init_turbosparc(void)</div><div class='ctx'> {</div><div class='ctx'> 	srmmu_name = "Fujitsu TurboSparc";</div><div class='ctx'> 	srmmu_modtype = TurboSparc;</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_all, turbosparc_flush_cache_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_mm, turbosparc_flush_cache_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_page, turbosparc_flush_cache_page, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_range, turbosparc_flush_cache_range, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_all, turbosparc_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_mm, turbosparc_flush_tlb_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_page, turbosparc_flush_tlb_page, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_range, turbosparc_flush_tlb_range, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(__flush_page_to_ram, turbosparc_flush_page_to_ram, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_sig_insns, turbosparc_flush_sig_insns, BTFIXUPCALL_NOP);</div><div class='del'>-	BTFIXUPSET_CALL(flush_page_for_dma, turbosparc_flush_page_for_dma, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='add'>+	sparc32_cachetlb_ops = &amp;turbosparc_ops;</div><div class='ctx'> 	poke_srmmu = poke_turbosparc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1850,6 +1288,20 @@ static void __cpuinit poke_tsunami(void)</div><div class='ctx'> 	srmmu_set_mmureg(mreg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct sparc32_cachetlb_ops tsunami_ops = {</div><div class='add'>+	.cache_all	= tsunami_flush_cache_all,</div><div class='add'>+	.cache_mm	= tsunami_flush_cache_mm,</div><div class='add'>+	.cache_page	= tsunami_flush_cache_page,</div><div class='add'>+	.cache_range	= tsunami_flush_cache_range,</div><div class='add'>+	.tlb_all	= tsunami_flush_tlb_all,</div><div class='add'>+	.tlb_mm		= tsunami_flush_tlb_mm,</div><div class='add'>+	.tlb_page	= tsunami_flush_tlb_page,</div><div class='add'>+	.tlb_range	= tsunami_flush_tlb_range,</div><div class='add'>+	.page_to_ram	= tsunami_flush_page_to_ram,</div><div class='add'>+	.sig_insns	= tsunami_flush_sig_insns,</div><div class='add'>+	.page_for_dma	= tsunami_flush_page_for_dma,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void __init init_tsunami(void)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1860,22 +1312,7 @@ static void __init init_tsunami(void)</div><div class='ctx'> </div><div class='ctx'> 	srmmu_name = "TI Tsunami";</div><div class='ctx'> 	srmmu_modtype = Tsunami;</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_all, tsunami_flush_cache_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_mm, tsunami_flush_cache_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_page, tsunami_flush_cache_page, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_range, tsunami_flush_cache_range, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_all, tsunami_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_mm, tsunami_flush_tlb_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_page, tsunami_flush_tlb_page, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_range, tsunami_flush_tlb_range, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(__flush_page_to_ram, tsunami_flush_page_to_ram, BTFIXUPCALL_NOP);</div><div class='del'>-	BTFIXUPSET_CALL(flush_sig_insns, tsunami_flush_sig_insns, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_page_for_dma, tsunami_flush_page_for_dma, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='add'>+	sparc32_cachetlb_ops = &amp;tsunami_ops;</div><div class='ctx'> 	poke_srmmu = poke_tsunami;</div><div class='ctx'> </div><div class='ctx'> 	tsunami_setup_blockops();</div><div class='hunk'>@@ -1886,7 +1323,7 @@ static void __cpuinit poke_viking(void)</div><div class='ctx'> 	unsigned long mreg = srmmu_get_mmureg();</div><div class='ctx'> 	static int smp_catch;</div><div class='ctx'> </div><div class='del'>-	if(viking_mxcc_present) {</div><div class='add'>+	if (viking_mxcc_present) {</div><div class='ctx'> 		unsigned long mxcc_control = mxcc_get_creg();</div><div class='ctx'> </div><div class='ctx'> 		mxcc_control |= (MXCC_CTL_ECE | MXCC_CTL_PRE | MXCC_CTL_MCE);</div><div class='hunk'>@@ -1923,6 +1360,52 @@ static void __cpuinit poke_viking(void)</div><div class='ctx'> 	srmmu_set_mmureg(mreg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct sparc32_cachetlb_ops viking_ops = {</div><div class='add'>+	.cache_all	= viking_flush_cache_all,</div><div class='add'>+	.cache_mm	= viking_flush_cache_mm,</div><div class='add'>+	.cache_page	= viking_flush_cache_page,</div><div class='add'>+	.cache_range	= viking_flush_cache_range,</div><div class='add'>+	.tlb_all	= viking_flush_tlb_all,</div><div class='add'>+	.tlb_mm		= viking_flush_tlb_mm,</div><div class='add'>+	.tlb_page	= viking_flush_tlb_page,</div><div class='add'>+	.tlb_range	= viking_flush_tlb_range,</div><div class='add'>+	.page_to_ram	= viking_flush_page_to_ram,</div><div class='add'>+	.sig_insns	= viking_flush_sig_insns,</div><div class='add'>+	.page_for_dma	= viking_flush_page_for_dma,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+/* On sun4d the cpu broadcasts local TLB flushes, so we can just</div><div class='add'>+ * perform the local TLB flush and all the other cpus will see it.</div><div class='add'>+ * But, unfortunately, there is a bug in the sun4d XBUS backplane</div><div class='add'>+ * that requires that we add some synchronization to these flushes.</div><div class='add'>+ *</div><div class='add'>+ * The bug is that the fifo which keeps track of all the pending TLB</div><div class='add'>+ * broadcasts in the system is an entry or two too small, so if we</div><div class='add'>+ * have too many going at once we'll overflow that fifo and lose a TLB</div><div class='add'>+ * flush resulting in corruption.</div><div class='add'>+ *</div><div class='add'>+ * Our workaround is to take a global spinlock around the TLB flushes,</div><div class='add'>+ * which guarentees we won't ever have too many pending.  It's a big</div><div class='add'>+ * hammer, but a semaphore like system to make sure we only have N TLB</div><div class='add'>+ * flushes going at once will require SMP locking anyways so there's</div><div class='add'>+ * no real value in trying any harder than this.</div><div class='add'>+ */</div><div class='add'>+static struct sparc32_cachetlb_ops viking_sun4d_smp_ops = {</div><div class='add'>+	.cache_all	= viking_flush_cache_all,</div><div class='add'>+	.cache_mm	= viking_flush_cache_mm,</div><div class='add'>+	.cache_page	= viking_flush_cache_page,</div><div class='add'>+	.cache_range	= viking_flush_cache_range,</div><div class='add'>+	.tlb_all	= sun4dsmp_flush_tlb_all,</div><div class='add'>+	.tlb_mm		= sun4dsmp_flush_tlb_mm,</div><div class='add'>+	.tlb_page	= sun4dsmp_flush_tlb_page,</div><div class='add'>+	.tlb_range	= sun4dsmp_flush_tlb_range,</div><div class='add'>+	.page_to_ram	= viking_flush_page_to_ram,</div><div class='add'>+	.sig_insns	= viking_flush_sig_insns,</div><div class='add'>+	.page_for_dma	= viking_flush_page_for_dma,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static void __init init_viking(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long mreg = srmmu_get_mmureg();</div><div class='hunk'>@@ -1933,10 +1416,6 @@ static void __init init_viking(void)</div><div class='ctx'> 		viking_mxcc_present = 0;</div><div class='ctx'> 		msi_set_sync();</div><div class='ctx'> </div><div class='del'>-		BTFIXUPSET_CALL(pte_clear, srmmu_pte_clear, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(pmd_clear, srmmu_pmd_clear, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(pgd_clear, srmmu_pgd_clear, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * We need this to make sure old viking takes no hits</div><div class='ctx'> 		 * on it's cache for dma snoops to workaround the</div><div class='hunk'>@@ -1944,84 +1423,28 @@ static void __init init_viking(void)</div><div class='ctx'> 		 * This is only necessary because of the new way in</div><div class='ctx'> 		 * which we use the IOMMU.</div><div class='ctx'> 		 */</div><div class='del'>-		BTFIXUPSET_CALL(flush_page_for_dma, viking_flush_page, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='add'>+		viking_ops.page_for_dma = viking_flush_page;</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+		viking_sun4d_smp_ops.page_for_dma = viking_flush_page;</div><div class='add'>+#endif</div><div class='ctx'> 		flush_page_for_dma_global = 0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		srmmu_name = "TI Viking/MXCC";</div><div class='ctx'> 		viking_mxcc_present = 1;</div><div class='del'>-</div><div class='ctx'> 		srmmu_cache_pagetables = 1;</div><div class='del'>-</div><div class='del'>-		/* MXCC vikings lack the DMA snooping bug. */</div><div class='del'>-		BTFIXUPSET_CALL(flush_page_for_dma, viking_flush_page_for_dma, BTFIXUPCALL_NOP);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_all, viking_flush_cache_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_mm, viking_flush_cache_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_page, viking_flush_cache_page, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_range, viking_flush_cache_range, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='add'>+	sparc32_cachetlb_ops = (const struct sparc32_cachetlb_ops *)</div><div class='add'>+		&amp;viking_ops;</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-	if (sparc_cpu_model == sun4d) {</div><div class='del'>-		BTFIXUPSET_CALL(flush_tlb_all, sun4dsmp_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(flush_tlb_mm, sun4dsmp_flush_tlb_mm, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(flush_tlb_page, sun4dsmp_flush_tlb_page, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(flush_tlb_range, sun4dsmp_flush_tlb_range, BTFIXUPCALL_NORM);</div><div class='del'>-	} else</div><div class='add'>+	if (sparc_cpu_model == sun4d)</div><div class='add'>+		sparc32_cachetlb_ops = (const struct sparc32_cachetlb_ops *)</div><div class='add'>+			&amp;viking_sun4d_smp_ops;</div><div class='ctx'> #endif</div><div class='del'>-	{</div><div class='del'>-		BTFIXUPSET_CALL(flush_tlb_all, viking_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(flush_tlb_mm, viking_flush_tlb_mm, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(flush_tlb_page, viking_flush_tlb_page, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(flush_tlb_range, viking_flush_tlb_range, BTFIXUPCALL_NORM);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(__flush_page_to_ram, viking_flush_page_to_ram, BTFIXUPCALL_NOP);</div><div class='del'>-	BTFIXUPSET_CALL(flush_sig_insns, viking_flush_sig_insns, BTFIXUPCALL_NOP);</div><div class='ctx'> </div><div class='ctx'> 	poke_srmmu = poke_viking;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPARC_LEON</div><div class='del'>-</div><div class='del'>-void __init poke_leonsparc(void)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init init_leon(void)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	srmmu_name = "LEON";</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_all, leon_flush_cache_all,</div><div class='del'>-			BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_mm, leon_flush_cache_all,</div><div class='del'>-			BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_page, leon_flush_pcache_all,</div><div class='del'>-			BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_range, leon_flush_cache_all,</div><div class='del'>-			BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_page_for_dma, leon_flush_dcache_all,</div><div class='del'>-			BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_all, leon_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_mm, leon_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_page, leon_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_range, leon_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(__flush_page_to_ram, leon_flush_cache_all,</div><div class='del'>-			BTFIXUPCALL_NOP);</div><div class='del'>-	BTFIXUPSET_CALL(flush_sig_insns, leon_flush_cache_all, BTFIXUPCALL_NOP);</div><div class='del'>-</div><div class='del'>-	poke_srmmu = poke_leonsparc;</div><div class='del'>-</div><div class='del'>-	srmmu_cache_pagetables = 0;</div><div class='del'>-</div><div class='del'>-	leon_flush_during_switch = leon_flush_needed();</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* Probe for the srmmu chip version. */</div><div class='ctx'> static void __init get_srmmu_type(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -2052,22 +1475,15 @@ static void __init get_srmmu_type(void)</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 0:</div><div class='ctx'> 		case 2:</div><div class='del'>-			/* Uniprocessor Cypress */</div><div class='del'>-			init_cypress_604();</div><div class='del'>-			break;</div><div class='ctx'> 		case 10:</div><div class='ctx'> 		case 11:</div><div class='ctx'> 		case 12:</div><div class='del'>-			/* _REALLY OLD_ Cypress MP chips... */</div><div class='ctx'> 		case 13:</div><div class='ctx'> 		case 14:</div><div class='ctx'> 		case 15:</div><div class='del'>-			/* MP Cypress mmu/cache-controller */</div><div class='del'>-			init_cypress_605(mod_rev);</div><div class='del'>-			break;</div><div class='ctx'> 		default:</div><div class='del'>-			/* Some other Cypress revision, assume a 605. */</div><div class='del'>-			init_cypress_605(mod_rev);</div><div class='add'>+			prom_printf("Sparc-Linux Cypress support does not longer exit.\n");</div><div class='add'>+			prom_halt();</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -2123,203 +1539,193 @@ static void __init get_srmmu_type(void)</div><div class='ctx'> 	srmmu_is_bad();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* don't laugh, static pagetables */</div><div class='del'>-static void srmmu_check_pgt_cache(int low, int high)</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+/* Local cross-calls. */</div><div class='add'>+static void smp_flush_page_for_dma(unsigned long page)</div><div class='ctx'> {</div><div class='add'>+	xc1((smpfunc_t) local_ops-&gt;page_for_dma, page);</div><div class='add'>+	local_ops-&gt;page_for_dma(page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern unsigned long spwin_mmu_patchme, fwin_mmu_patchme,</div><div class='del'>-	tsetup_mmu_patchme, rtrap_mmu_patchme;</div><div class='del'>-</div><div class='del'>-extern unsigned long spwin_srmmu_stackchk, srmmu_fwin_stackchk,</div><div class='del'>-	tsetup_srmmu_stackchk, srmmu_rett_stackchk;</div><div class='del'>-</div><div class='del'>-extern unsigned long srmmu_fault;</div><div class='del'>-</div><div class='del'>-#define PATCH_BRANCH(insn, dest) do { \</div><div class='del'>-		iaddr = &amp;(insn); \</div><div class='del'>-		daddr = &amp;(dest); \</div><div class='del'>-		*iaddr = SPARC_BRANCH((unsigned long) daddr, (unsigned long) iaddr); \</div><div class='del'>-	} while(0)</div><div class='del'>-</div><div class='del'>-static void __init patch_window_trap_handlers(void)</div><div class='add'>+static void smp_flush_cache_all(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned long *iaddr, *daddr;</div><div class='del'>-	</div><div class='del'>-	PATCH_BRANCH(spwin_mmu_patchme, spwin_srmmu_stackchk);</div><div class='del'>-	PATCH_BRANCH(fwin_mmu_patchme, srmmu_fwin_stackchk);</div><div class='del'>-	PATCH_BRANCH(tsetup_mmu_patchme, tsetup_srmmu_stackchk);</div><div class='del'>-	PATCH_BRANCH(rtrap_mmu_patchme, srmmu_rett_stackchk);</div><div class='del'>-	PATCH_BRANCH(sparc_ttable[SP_TRAP_TFLT].inst_three, srmmu_fault);</div><div class='del'>-	PATCH_BRANCH(sparc_ttable[SP_TRAP_DFLT].inst_three, srmmu_fault);</div><div class='del'>-	PATCH_BRANCH(sparc_ttable[SP_TRAP_DACC].inst_three, srmmu_fault);</div><div class='add'>+	xc0((smpfunc_t) local_ops-&gt;cache_all);</div><div class='add'>+	local_ops-&gt;cache_all();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-/* Local cross-calls. */</div><div class='del'>-static void smp_flush_page_for_dma(unsigned long page)</div><div class='add'>+static void smp_flush_tlb_all(void)</div><div class='ctx'> {</div><div class='del'>-	xc1((smpfunc_t) BTFIXUP_CALL(local_flush_page_for_dma), page);</div><div class='del'>-	local_flush_page_for_dma(page);</div><div class='add'>+	xc0((smpfunc_t) local_ops-&gt;tlb_all);</div><div class='add'>+	local_ops-&gt;tlb_all();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static pte_t srmmu_pgoff_to_pte(unsigned long pgoff)</div><div class='add'>+static void smp_flush_cache_mm(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	return __pte((pgoff &lt;&lt; SRMMU_PTE_FILE_SHIFT) | SRMMU_FILE);</div><div class='add'>+	if (mm-&gt;context != NO_CONTEXT) {</div><div class='add'>+		cpumask_t cpu_mask;</div><div class='add'>+		cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='add'>+		cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='add'>+		if (!cpumask_empty(&amp;cpu_mask))</div><div class='add'>+			xc1((smpfunc_t) local_ops-&gt;cache_mm, (unsigned long) mm);</div><div class='add'>+		local_ops-&gt;cache_mm(mm);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned long srmmu_pte_to_pgoff(pte_t pte)</div><div class='add'>+static void smp_flush_tlb_mm(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	return pte_val(pte) &gt;&gt; SRMMU_PTE_FILE_SHIFT;</div><div class='add'>+	if (mm-&gt;context != NO_CONTEXT) {</div><div class='add'>+		cpumask_t cpu_mask;</div><div class='add'>+		cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='add'>+		cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='add'>+		if (!cpumask_empty(&amp;cpu_mask)) {</div><div class='add'>+			xc1((smpfunc_t) local_ops-&gt;tlb_mm, (unsigned long) mm);</div><div class='add'>+			if (atomic_read(&amp;mm-&gt;mm_users) == 1 &amp;&amp; current-&gt;active_mm == mm)</div><div class='add'>+				cpumask_copy(mm_cpumask(mm),</div><div class='add'>+					     cpumask_of(smp_processor_id()));</div><div class='add'>+		}</div><div class='add'>+		local_ops-&gt;tlb_mm(mm);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static pgprot_t srmmu_pgprot_noncached(pgprot_t prot)</div><div class='add'>+static void smp_flush_cache_range(struct vm_area_struct *vma,</div><div class='add'>+				  unsigned long start,</div><div class='add'>+				  unsigned long end)</div><div class='ctx'> {</div><div class='del'>-	prot &amp;= ~__pgprot(SRMMU_CACHE);</div><div class='add'>+	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='ctx'> </div><div class='del'>-	return prot;</div><div class='add'>+	if (mm-&gt;context != NO_CONTEXT) {</div><div class='add'>+		cpumask_t cpu_mask;</div><div class='add'>+		cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='add'>+		cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='add'>+		if (!cpumask_empty(&amp;cpu_mask))</div><div class='add'>+			xc3((smpfunc_t) local_ops-&gt;cache_range,</div><div class='add'>+			    (unsigned long) vma, start, end);</div><div class='add'>+		local_ops-&gt;cache_range(vma, start, end);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Load up routines and constants for sun4m and sun4d mmu */</div><div class='del'>-void __init ld_mmu_srmmu(void)</div><div class='add'>+static void smp_flush_tlb_range(struct vm_area_struct *vma,</div><div class='add'>+				unsigned long start,</div><div class='add'>+				unsigned long end)</div><div class='ctx'> {</div><div class='del'>-	extern void ld_mmu_iommu(void);</div><div class='del'>-	extern void ld_mmu_iounit(void);</div><div class='del'>-	extern void ___xchg32_sun4md(void);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_SIMM13(pgdir_shift, SRMMU_PGDIR_SHIFT);</div><div class='del'>-	BTFIXUPSET_SETHI(pgdir_size, SRMMU_PGDIR_SIZE);</div><div class='del'>-	BTFIXUPSET_SETHI(pgdir_mask, SRMMU_PGDIR_MASK);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_SIMM13(ptrs_per_pmd, SRMMU_PTRS_PER_PMD);</div><div class='del'>-	BTFIXUPSET_SIMM13(ptrs_per_pgd, SRMMU_PTRS_PER_PGD);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_INT(page_none, pgprot_val(SRMMU_PAGE_NONE));</div><div class='del'>-	PAGE_SHARED = pgprot_val(SRMMU_PAGE_SHARED);</div><div class='del'>-	BTFIXUPSET_INT(page_copy, pgprot_val(SRMMU_PAGE_COPY));</div><div class='del'>-	BTFIXUPSET_INT(page_readonly, pgprot_val(SRMMU_PAGE_RDONLY));</div><div class='del'>-	BTFIXUPSET_INT(page_kernel, pgprot_val(SRMMU_PAGE_KERNEL));</div><div class='del'>-	page_kernel = pgprot_val(SRMMU_PAGE_KERNEL);</div><div class='add'>+	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='ctx'> </div><div class='del'>-	/* Functions */</div><div class='del'>-	BTFIXUPSET_CALL(pgprot_noncached, srmmu_pgprot_noncached, BTFIXUPCALL_NORM);</div><div class='del'>-#ifndef CONFIG_SMP	</div><div class='del'>-	BTFIXUPSET_CALL(___xchg32, ___xchg32_sun4md, BTFIXUPCALL_SWAPG1G2);</div><div class='del'>-#endif</div><div class='del'>-	BTFIXUPSET_CALL(do_check_pgt_cache, srmmu_check_pgt_cache, BTFIXUPCALL_NOP);</div><div class='add'>+	if (mm-&gt;context != NO_CONTEXT) {</div><div class='add'>+		cpumask_t cpu_mask;</div><div class='add'>+		cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='add'>+		cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='add'>+		if (!cpumask_empty(&amp;cpu_mask))</div><div class='add'>+			xc3((smpfunc_t) local_ops-&gt;tlb_range,</div><div class='add'>+			    (unsigned long) vma, start, end);</div><div class='add'>+		local_ops-&gt;tlb_range(vma, start, end);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	BTFIXUPSET_CALL(set_pte, srmmu_set_pte, BTFIXUPCALL_SWAPO0O1);</div><div class='del'>-	BTFIXUPSET_CALL(switch_mm, srmmu_switch_mm, BTFIXUPCALL_NORM);</div><div class='add'>+static void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page)</div><div class='add'>+{</div><div class='add'>+	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='ctx'> </div><div class='del'>-	BTFIXUPSET_CALL(pte_pfn, srmmu_pte_pfn, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_page, srmmu_pmd_page, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pgd_page_vaddr, srmmu_pgd_page, BTFIXUPCALL_NORM);</div><div class='add'>+	if (mm-&gt;context != NO_CONTEXT) {</div><div class='add'>+		cpumask_t cpu_mask;</div><div class='add'>+		cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='add'>+		cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='add'>+		if (!cpumask_empty(&amp;cpu_mask))</div><div class='add'>+			xc2((smpfunc_t) local_ops-&gt;cache_page,</div><div class='add'>+			    (unsigned long) vma, page);</div><div class='add'>+		local_ops-&gt;cache_page(vma, page);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	BTFIXUPSET_CALL(pte_present, srmmu_pte_present, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pte_clear, srmmu_pte_clear, BTFIXUPCALL_SWAPO0G0);</div><div class='add'>+static void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)</div><div class='add'>+{</div><div class='add'>+	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='ctx'> </div><div class='del'>-	BTFIXUPSET_CALL(pmd_bad, srmmu_pmd_bad, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_present, srmmu_pmd_present, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_clear, srmmu_pmd_clear, BTFIXUPCALL_SWAPO0G0);</div><div class='add'>+	if (mm-&gt;context != NO_CONTEXT) {</div><div class='add'>+		cpumask_t cpu_mask;</div><div class='add'>+		cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='add'>+		cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='add'>+		if (!cpumask_empty(&amp;cpu_mask))</div><div class='add'>+			xc2((smpfunc_t) local_ops-&gt;tlb_page,</div><div class='add'>+			    (unsigned long) vma, page);</div><div class='add'>+		local_ops-&gt;tlb_page(vma, page);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	BTFIXUPSET_CALL(pgd_none, srmmu_pgd_none, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pgd_bad, srmmu_pgd_bad, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pgd_present, srmmu_pgd_present, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pgd_clear, srmmu_pgd_clear, BTFIXUPCALL_SWAPO0G0);</div><div class='add'>+static void smp_flush_page_to_ram(unsigned long page)</div><div class='add'>+{</div><div class='add'>+	/* Current theory is that those who call this are the one's</div><div class='add'>+	 * who have just dirtied their cache with the pages contents</div><div class='add'>+	 * in kernel space, therefore we only run this on local cpu.</div><div class='add'>+	 *</div><div class='add'>+	 * XXX This experiment failed, research further... -DaveM</div><div class='add'>+	 */</div><div class='add'>+#if 1</div><div class='add'>+	xc1((smpfunc_t) local_ops-&gt;page_to_ram, page);</div><div class='add'>+#endif</div><div class='add'>+	local_ops-&gt;page_to_ram(page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr)</div><div class='add'>+{</div><div class='add'>+	cpumask_t cpu_mask;</div><div class='add'>+	cpumask_copy(&amp;cpu_mask, mm_cpumask(mm));</div><div class='add'>+	cpumask_clear_cpu(smp_processor_id(), &amp;cpu_mask);</div><div class='add'>+	if (!cpumask_empty(&amp;cpu_mask))</div><div class='add'>+		xc2((smpfunc_t) local_ops-&gt;sig_insns,</div><div class='add'>+		    (unsigned long) mm, insn_addr);</div><div class='add'>+	local_ops-&gt;sig_insns(mm, insn_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sparc32_cachetlb_ops smp_cachetlb_ops = {</div><div class='add'>+	.cache_all	= smp_flush_cache_all,</div><div class='add'>+	.cache_mm	= smp_flush_cache_mm,</div><div class='add'>+	.cache_page	= smp_flush_cache_page,</div><div class='add'>+	.cache_range	= smp_flush_cache_range,</div><div class='add'>+	.tlb_all	= smp_flush_tlb_all,</div><div class='add'>+	.tlb_mm		= smp_flush_tlb_mm,</div><div class='add'>+	.tlb_page	= smp_flush_tlb_page,</div><div class='add'>+	.tlb_range	= smp_flush_tlb_range,</div><div class='add'>+	.page_to_ram	= smp_flush_page_to_ram,</div><div class='add'>+	.sig_insns	= smp_flush_sig_insns,</div><div class='add'>+	.page_for_dma	= smp_flush_page_for_dma,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	BTFIXUPSET_CALL(mk_pte, srmmu_mk_pte, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mk_pte_phys, srmmu_mk_pte_phys, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mk_pte_io, srmmu_mk_pte_io, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pgd_set, srmmu_pgd_set, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_set, srmmu_pmd_set, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_populate, srmmu_pmd_populate, BTFIXUPCALL_NORM);</div><div class='del'>-	</div><div class='del'>-	BTFIXUPSET_INT(pte_modify_mask, SRMMU_CHG_MASK);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_offset, srmmu_pmd_offset, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pte_offset_kernel, srmmu_pte_offset, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(free_pte_fast, srmmu_free_pte_fast, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pte_free, srmmu_pte_free, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pte_alloc_one_kernel, srmmu_pte_alloc_one_kernel, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pte_alloc_one, srmmu_pte_alloc_one, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(free_pmd_fast, srmmu_pmd_free, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_alloc_one, srmmu_pmd_alloc_one, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(free_pgd_fast, srmmu_free_pgd_fast, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(get_pgd_fast, srmmu_get_pgd_fast, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_HALF(pte_writei, SRMMU_WRITE);</div><div class='del'>-	BTFIXUPSET_HALF(pte_dirtyi, SRMMU_DIRTY);</div><div class='del'>-	BTFIXUPSET_HALF(pte_youngi, SRMMU_REF);</div><div class='del'>-	BTFIXUPSET_HALF(pte_filei, SRMMU_FILE);</div><div class='del'>-	BTFIXUPSET_HALF(pte_wrprotecti, SRMMU_WRITE);</div><div class='del'>-	BTFIXUPSET_HALF(pte_mkcleani, SRMMU_DIRTY);</div><div class='del'>-	BTFIXUPSET_HALF(pte_mkoldi, SRMMU_REF);</div><div class='del'>-	BTFIXUPSET_CALL(pte_mkwrite, srmmu_pte_mkwrite, BTFIXUPCALL_ORINT(SRMMU_WRITE));</div><div class='del'>-	BTFIXUPSET_CALL(pte_mkdirty, srmmu_pte_mkdirty, BTFIXUPCALL_ORINT(SRMMU_DIRTY));</div><div class='del'>-	BTFIXUPSET_CALL(pte_mkyoung, srmmu_pte_mkyoung, BTFIXUPCALL_ORINT(SRMMU_REF));</div><div class='del'>-	BTFIXUPSET_CALL(update_mmu_cache, srmmu_update_mmu_cache, BTFIXUPCALL_NOP);</div><div class='del'>-	BTFIXUPSET_CALL(destroy_context, srmmu_destroy_context, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(sparc_mapiorange, srmmu_mapiorange, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(sparc_unmapiorange, srmmu_unmapiorange, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(__swp_type, srmmu_swp_type, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(__swp_offset, srmmu_swp_offset, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(__swp_entry, srmmu_swp_entry, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(mmu_info, srmmu_mmu_info, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(alloc_thread_info_node, srmmu_alloc_thread_info_node, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(free_thread_info, srmmu_free_thread_info, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(pte_to_pgoff, srmmu_pte_to_pgoff, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pgoff_to_pte, srmmu_pgoff_to_pte, BTFIXUPCALL_NORM);</div><div class='add'>+/* Load up routines and constants for sun4m and sun4d mmu */</div><div class='add'>+void __init load_mmu(void)</div><div class='add'>+{</div><div class='add'>+	extern void ld_mmu_iommu(void);</div><div class='add'>+	extern void ld_mmu_iounit(void);</div><div class='ctx'> </div><div class='add'>+	/* Functions */</div><div class='ctx'> 	get_srmmu_type();</div><div class='del'>-	patch_window_trap_handlers();</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	/* El switcheroo... */</div><div class='add'>+	local_ops = sparc32_cachetlb_ops;</div><div class='ctx'> </div><div class='del'>-	BTFIXUPCOPY_CALL(local_flush_cache_all, flush_cache_all);</div><div class='del'>-	BTFIXUPCOPY_CALL(local_flush_cache_mm, flush_cache_mm);</div><div class='del'>-	BTFIXUPCOPY_CALL(local_flush_cache_range, flush_cache_range);</div><div class='del'>-	BTFIXUPCOPY_CALL(local_flush_cache_page, flush_cache_page);</div><div class='del'>-	BTFIXUPCOPY_CALL(local_flush_tlb_all, flush_tlb_all);</div><div class='del'>-	BTFIXUPCOPY_CALL(local_flush_tlb_mm, flush_tlb_mm);</div><div class='del'>-	BTFIXUPCOPY_CALL(local_flush_tlb_range, flush_tlb_range);</div><div class='del'>-	BTFIXUPCOPY_CALL(local_flush_tlb_page, flush_tlb_page);</div><div class='del'>-	BTFIXUPCOPY_CALL(local_flush_page_to_ram, __flush_page_to_ram);</div><div class='del'>-	BTFIXUPCOPY_CALL(local_flush_sig_insns, flush_sig_insns);</div><div class='del'>-	BTFIXUPCOPY_CALL(local_flush_page_for_dma, flush_page_for_dma);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_all, smp_flush_cache_all, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_mm, smp_flush_cache_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_range, smp_flush_cache_range, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_page, smp_flush_cache_page, BTFIXUPCALL_NORM);</div><div class='del'>-	if (sparc_cpu_model != sun4d &amp;&amp;</div><div class='del'>-	    sparc_cpu_model != sparc_leon) {</div><div class='del'>-		BTFIXUPSET_CALL(flush_tlb_all, smp_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(flush_tlb_mm, smp_flush_tlb_mm, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(flush_tlb_range, smp_flush_tlb_range, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(flush_tlb_page, smp_flush_tlb_page, BTFIXUPCALL_NORM);</div><div class='add'>+	if (sparc_cpu_model == sun4d || sparc_cpu_model == sparc_leon) {</div><div class='add'>+		smp_cachetlb_ops.tlb_all = local_ops-&gt;tlb_all;</div><div class='add'>+		smp_cachetlb_ops.tlb_mm = local_ops-&gt;tlb_mm;</div><div class='add'>+		smp_cachetlb_ops.tlb_range = local_ops-&gt;tlb_range;</div><div class='add'>+		smp_cachetlb_ops.tlb_page = local_ops-&gt;tlb_page;</div><div class='ctx'> 	}</div><div class='del'>-	BTFIXUPSET_CALL(__flush_page_to_ram, smp_flush_page_to_ram, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_sig_insns, smp_flush_sig_insns, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_page_for_dma, smp_flush_page_for_dma, BTFIXUPCALL_NORM);</div><div class='ctx'> </div><div class='ctx'> 	if (poke_srmmu == poke_viking) {</div><div class='ctx'> 		/* Avoid unnecessary cross calls. */</div><div class='del'>-		BTFIXUPCOPY_CALL(flush_cache_all, local_flush_cache_all);</div><div class='del'>-		BTFIXUPCOPY_CALL(flush_cache_mm, local_flush_cache_mm);</div><div class='del'>-		BTFIXUPCOPY_CALL(flush_cache_range, local_flush_cache_range);</div><div class='del'>-		BTFIXUPCOPY_CALL(flush_cache_page, local_flush_cache_page);</div><div class='del'>-		BTFIXUPCOPY_CALL(__flush_page_to_ram, local_flush_page_to_ram);</div><div class='del'>-		BTFIXUPCOPY_CALL(flush_sig_insns, local_flush_sig_insns);</div><div class='del'>-		BTFIXUPCOPY_CALL(flush_page_for_dma, local_flush_page_for_dma);</div><div class='add'>+		smp_cachetlb_ops.cache_all = local_ops-&gt;cache_all;</div><div class='add'>+		smp_cachetlb_ops.cache_mm = local_ops-&gt;cache_mm;</div><div class='add'>+		smp_cachetlb_ops.cache_range = local_ops-&gt;cache_range;</div><div class='add'>+		smp_cachetlb_ops.cache_page = local_ops-&gt;cache_page;</div><div class='add'>+</div><div class='add'>+		smp_cachetlb_ops.page_to_ram = local_ops-&gt;page_to_ram;</div><div class='add'>+		smp_cachetlb_ops.sig_insns = local_ops-&gt;sig_insns;</div><div class='add'>+		smp_cachetlb_ops.page_for_dma = local_ops-&gt;page_for_dma;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* It really is const after this point. */</div><div class='add'>+	sparc32_cachetlb_ops = (const struct sparc32_cachetlb_ops *)</div><div class='add'>+		&amp;smp_cachetlb_ops;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	if (sparc_cpu_model == sun4d)</div><div class='head'>diff --git a/arch/sparc/mm/srmmu.h b/arch/sparc/mm/srmmu.h<br/>new file mode 100644<br/>index 000000000000..5703274ccf89<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/srmmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/srmmu.h</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+/* srmmu.c */</div><div class='add'>+extern char *srmmu_name;</div><div class='add'>+</div><div class='add'>+extern void (*poke_srmmu)(void);</div><div class='head'>diff --git a/arch/sparc/mm/srmmu_access.S b/arch/sparc/mm/srmmu_access.S<br/>new file mode 100644<br/>index 000000000000..d0a67b2c2383<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/srmmu_access.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/srmmu_access.S</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+/* Assembler variants of srmmu access functions.</div><div class='add'>+ * Implemented in assembler to allow run-time patching.</div><div class='add'>+ * LEON uses a different ASI for MMUREGS than SUN.</div><div class='add'>+ *</div><div class='add'>+ * The leon_1insn_patch infrastructure is used</div><div class='add'>+ * for the run-time patching.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/asmmacro.h&gt;</div><div class='add'>+#include &lt;asm/pgtsrmmu.h&gt;</div><div class='add'>+#include &lt;asm/asi.h&gt;</div><div class='add'>+</div><div class='add'>+/* unsigned int srmmu_get_mmureg(void) */</div><div class='add'>+ENTRY(srmmu_get_mmureg)</div><div class='add'>+LEON_PI(lda	[%g0] ASI_LEON_MMUREGS, %o0)</div><div class='add'>+SUN_PI_(lda	[%g0] ASI_M_MMUREGS, %o0)</div><div class='add'>+	retl</div><div class='add'>+	 nop</div><div class='add'>+ENDPROC(srmmu_get_mmureg)</div><div class='add'>+</div><div class='add'>+/* void srmmu_set_mmureg(unsigned long regval) */</div><div class='add'>+ENTRY(srmmu_set_mmureg)</div><div class='add'>+LEON_PI(sta	%o0, [%g0] ASI_LEON_MMUREGS)</div><div class='add'>+SUN_PI_(sta	%o0, [%g0] ASI_M_MMUREGS)</div><div class='add'>+	retl</div><div class='add'>+	 nop</div><div class='add'>+ENDPROC(srmmu_set_mmureg)</div><div class='add'>+</div><div class='add'>+/* void srmmu_set_ctable_ptr(unsigned long paddr) */</div><div class='add'>+ENTRY(srmmu_set_ctable_ptr)</div><div class='add'>+	/* paddr = ((paddr &gt;&gt; 4) &amp; SRMMU_CTX_PMASK); */</div><div class='add'>+	srl	%o0, 4, %g1</div><div class='add'>+	and	%g1, SRMMU_CTX_PMASK, %g1</div><div class='add'>+</div><div class='add'>+	mov	SRMMU_CTXTBL_PTR, %g2</div><div class='add'>+LEON_PI(sta	%g1, [%g2] ASI_LEON_MMUREGS)</div><div class='add'>+SUN_PI_(sta	%g1, [%g2] ASI_M_MMUREGS)</div><div class='add'>+	retl</div><div class='add'>+	 nop</div><div class='add'>+ENDPROC(srmmu_set_ctable_ptr)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* void srmmu_set_context(int context) */</div><div class='add'>+ENTRY(srmmu_set_context)</div><div class='add'>+	mov	SRMMU_CTX_REG, %g1</div><div class='add'>+LEON_PI(sta	%o0, [%g1] ASI_LEON_MMUREGS)</div><div class='add'>+SUN_PI_(sta	%o0, [%g1] ASI_M_MMUREGS)</div><div class='add'>+	retl</div><div class='add'>+	 nop</div><div class='add'>+ENDPROC(srmmu_set_context)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* int srmmu_get_context(void) */</div><div class='add'>+ENTRY(srmmu_get_context)</div><div class='add'>+	mov	SRMMU_CTX_REG, %o0</div><div class='add'>+LEON_PI(lda     [%o0] ASI_LEON_MMUREGS, %o0)</div><div class='add'>+SUN_PI_(lda	[%o0] ASI_M_MMUREGS, %o0)</div><div class='add'>+	retl</div><div class='add'>+	 nop</div><div class='add'>+ENDPROC(srmmu_get_context)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* unsigned int srmmu_get_fstatus(void) */</div><div class='add'>+ENTRY(srmmu_get_fstatus)</div><div class='add'>+	mov	SRMMU_FAULT_STATUS, %o0</div><div class='add'>+LEON_PI(lda     [%o0] ASI_LEON_MMUREGS, %o0)</div><div class='add'>+SUN_PI_(lda	[%o0] ASI_M_MMUREGS, %o0)</div><div class='add'>+	retl</div><div class='add'>+	 nop</div><div class='add'>+ENDPROC(srmmu_get_fstatus)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* unsigned int srmmu_get_faddr(void) */</div><div class='add'>+ENTRY(srmmu_get_faddr)</div><div class='add'>+	mov	SRMMU_FAULT_ADDR, %o0</div><div class='add'>+LEON_PI(lda     [%o0] ASI_LEON_MMUREGS, %o0)</div><div class='add'>+SUN_PI_(lda	[%o0] ASI_M_MMUREGS, %o0)</div><div class='add'>+	retl</div><div class='add'>+	 nop</div><div class='add'>+ENDPROC(srmmu_get_faddr)</div><div class='head'>diff --git a/arch/sparc/mm/sun4c.c b/arch/sparc/mm/sun4c.c<br/>deleted file mode 100644<br/>index 1cf4f198709a..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/sun4c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/sun4c.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,2166 +0,0 @@</div><div class='del'>-/* sun4c.c: Doing in software what should be done in hardware.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1996 David S. Miller (davem@davemloft.net)</div><div class='del'>- * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)</div><div class='del'>- * Copyright (C) 1996 Andrew Tridgell (Andrew.Tridgell@anu.edu.au)</div><div class='del'>- * Copyright (C) 1997-2000 Anton Blanchard (anton@samba.org)</div><div class='del'>- * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define NR_TASK_BUCKETS 512</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/bootmem.h&gt;</div><div class='del'>-#include &lt;linux/highmem.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;linux/scatterlist.h&gt;</div><div class='del'>-#include &lt;linux/bitmap.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/sections.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/pgalloc.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/vaddrs.h&gt;</div><div class='del'>-#include &lt;asm/idprom.h&gt;</div><div class='del'>-#include &lt;asm/machines.h&gt;</div><div class='del'>-#include &lt;asm/memreg.h&gt;</div><div class='del'>-#include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/auxio.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/oplib.h&gt;</div><div class='del'>-#include &lt;asm/openprom.h&gt;</div><div class='del'>-#include &lt;asm/mmu_context.h&gt;</div><div class='del'>-#include &lt;asm/highmem.h&gt;</div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='del'>-#include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-</div><div class='del'>-/* Because of our dynamic kernel TLB miss strategy, and how</div><div class='del'>- * our DVMA mapping allocation works, you _MUST_:</div><div class='del'>- *</div><div class='del'>- * 1) Disable interrupts _and_ not touch any dynamic kernel</div><div class='del'>- *    memory while messing with kernel MMU state.  By</div><div class='del'>- *    dynamic memory I mean any object which is not in</div><div class='del'>- *    the kernel image itself or a thread_union (both of</div><div class='del'>- *    which are locked into the MMU).</div><div class='del'>- * 2) Disable interrupts while messing with user MMU state.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-extern int num_segmaps, num_contexts;</div><div class='del'>-</div><div class='del'>-extern unsigned long page_kernel;</div><div class='del'>-</div><div class='del'>-/* That's it, we prom_halt() on sun4c if the cache size is something other than 65536.</div><div class='del'>- * So let's save some cycles and just use that everywhere except for that bootup</div><div class='del'>- * sanity check.</div><div class='del'>- */</div><div class='del'>-#define SUN4C_VAC_SIZE 65536</div><div class='del'>-</div><div class='del'>-#define SUN4C_KERNEL_BUCKETS 32</div><div class='del'>-</div><div class='del'>-/* Flushing the cache. */</div><div class='del'>-struct sun4c_vac_props sun4c_vacinfo;</div><div class='del'>-unsigned long sun4c_kernel_faults;</div><div class='del'>-</div><div class='del'>-/* Invalidate every sun4c cache line tag. */</div><div class='del'>-static void __init sun4c_flush_all(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long begin, end;</div><div class='del'>-</div><div class='del'>-	if (sun4c_vacinfo.on)</div><div class='del'>-		panic("SUN4C: AIEEE, trying to invalidate vac while it is on.");</div><div class='del'>-</div><div class='del'>-	/* Clear 'valid' bit in all cache line tags */</div><div class='del'>-	begin = AC_CACHETAGS;</div><div class='del'>-	end = (AC_CACHETAGS + SUN4C_VAC_SIZE);</div><div class='del'>-	while (begin &lt; end) {</div><div class='del'>-		__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :</div><div class='del'>-				     "r" (begin), "i" (ASI_CONTROL));</div><div class='del'>-		begin += sun4c_vacinfo.linesize;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_flush_context_hw(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long end = SUN4C_VAC_SIZE;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-		"1:	addcc	%0, -4096, %0\n\t"</div><div class='del'>-		"	bne	1b\n\t"</div><div class='del'>-		"	 sta	%%g0, [%0] %2"</div><div class='del'>-	: "=&amp;r" (end)</div><div class='del'>-	: "0" (end), "i" (ASI_HWFLUSHCONTEXT)</div><div class='del'>-	: "cc");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called minimally with IRQs disabled. */</div><div class='del'>-static void sun4c_flush_segment_hw(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	if (sun4c_get_segmap(addr) != invalid_segment) {</div><div class='del'>-		unsigned long vac_size = SUN4C_VAC_SIZE;</div><div class='del'>-</div><div class='del'>-		__asm__ __volatile__(</div><div class='del'>-			"1:	addcc	%0, -4096, %0\n\t"</div><div class='del'>-			"	bne	1b\n\t"</div><div class='del'>-			"	 sta	%%g0, [%2 + %0] %3"</div><div class='del'>-			: "=&amp;r" (vac_size)</div><div class='del'>-			: "0" (vac_size), "r" (addr), "i" (ASI_HWFLUSHSEG)</div><div class='del'>-			: "cc");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* File local boot time fixups. */</div><div class='del'>-BTFIXUPDEF_CALL(void, sun4c_flush_page, unsigned long)</div><div class='del'>-BTFIXUPDEF_CALL(void, sun4c_flush_segment, unsigned long)</div><div class='del'>-BTFIXUPDEF_CALL(void, sun4c_flush_context, void)</div><div class='del'>-</div><div class='del'>-#define sun4c_flush_page(addr) BTFIXUP_CALL(sun4c_flush_page)(addr)</div><div class='del'>-#define sun4c_flush_segment(addr) BTFIXUP_CALL(sun4c_flush_segment)(addr)</div><div class='del'>-#define sun4c_flush_context() BTFIXUP_CALL(sun4c_flush_context)()</div><div class='del'>-</div><div class='del'>-/* Must be called minimally with interrupts disabled. */</div><div class='del'>-static void sun4c_flush_page_hw(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	addr &amp;= PAGE_MASK;</div><div class='del'>-	if ((int)sun4c_get_pte(addr) &lt; 0)</div><div class='del'>-		__asm__ __volatile__("sta %%g0, [%0] %1"</div><div class='del'>-				     : : "r" (addr), "i" (ASI_HWFLUSHPAGE));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Don't inline the software version as it eats too many cache lines if expanded. */</div><div class='del'>-static void sun4c_flush_context_sw(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long nbytes = SUN4C_VAC_SIZE;</div><div class='del'>-	unsigned long lsize = sun4c_vacinfo.linesize;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-	"add	%2, %2, %%g1\n\t"</div><div class='del'>-	"add	%2, %%g1, %%g2\n\t"</div><div class='del'>-	"add	%2, %%g2, %%g3\n\t"</div><div class='del'>-	"add	%2, %%g3, %%g4\n\t"</div><div class='del'>-	"add	%2, %%g4, %%g5\n\t"</div><div class='del'>-	"add	%2, %%g5, %%o4\n\t"</div><div class='del'>-	"add	%2, %%o4, %%o5\n"</div><div class='del'>-	"1:\n\t"</div><div class='del'>-	"subcc	%0, %%o5, %0\n\t"</div><div class='del'>-	"sta	%%g0, [%0] %3\n\t"</div><div class='del'>-	"sta	%%g0, [%0 + %2] %3\n\t"</div><div class='del'>-	"sta	%%g0, [%0 + %%g1] %3\n\t"</div><div class='del'>-	"sta	%%g0, [%0 + %%g2] %3\n\t"</div><div class='del'>-	"sta	%%g0, [%0 + %%g3] %3\n\t"</div><div class='del'>-	"sta	%%g0, [%0 + %%g4] %3\n\t"</div><div class='del'>-	"sta	%%g0, [%0 + %%g5] %3\n\t"</div><div class='del'>-	"bg	1b\n\t"</div><div class='del'>-	" sta	%%g0, [%1 + %%o4] %3\n"</div><div class='del'>-	: "=&amp;r" (nbytes)</div><div class='del'>-	: "0" (nbytes), "r" (lsize), "i" (ASI_FLUSHCTX)</div><div class='del'>-	: "g1", "g2", "g3", "g4", "g5", "o4", "o5", "cc");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Don't inline the software version as it eats too many cache lines if expanded. */</div><div class='del'>-static void sun4c_flush_segment_sw(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	if (sun4c_get_segmap(addr) != invalid_segment) {</div><div class='del'>-		unsigned long nbytes = SUN4C_VAC_SIZE;</div><div class='del'>-		unsigned long lsize = sun4c_vacinfo.linesize;</div><div class='del'>-</div><div class='del'>-		__asm__ __volatile__(</div><div class='del'>-		"add	%2, %2, %%g1\n\t"</div><div class='del'>-		"add	%2, %%g1, %%g2\n\t"</div><div class='del'>-		"add	%2, %%g2, %%g3\n\t"</div><div class='del'>-		"add	%2, %%g3, %%g4\n\t"</div><div class='del'>-		"add	%2, %%g4, %%g5\n\t"</div><div class='del'>-		"add	%2, %%g5, %%o4\n\t"</div><div class='del'>-		"add	%2, %%o4, %%o5\n"</div><div class='del'>-		"1:\n\t"</div><div class='del'>-		"subcc	%1, %%o5, %1\n\t"</div><div class='del'>-		"sta	%%g0, [%0] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %2] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %%g1] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %%g2] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %%g3] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %%g4] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %%g5] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %%o4] %6\n\t"</div><div class='del'>-		"bg	1b\n\t"</div><div class='del'>-		" add	%0, %%o5, %0\n"</div><div class='del'>-		: "=&amp;r" (addr), "=&amp;r" (nbytes), "=&amp;r" (lsize)</div><div class='del'>-		: "0" (addr), "1" (nbytes), "2" (lsize),</div><div class='del'>-		  "i" (ASI_FLUSHSEG)</div><div class='del'>-		: "g1", "g2", "g3", "g4", "g5", "o4", "o5", "cc");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Don't inline the software version as it eats too many cache lines if expanded. */</div><div class='del'>-static void sun4c_flush_page_sw(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	addr &amp;= PAGE_MASK;</div><div class='del'>-	if ((sun4c_get_pte(addr) &amp; (_SUN4C_PAGE_NOCACHE | _SUN4C_PAGE_VALID)) ==</div><div class='del'>-	    _SUN4C_PAGE_VALID) {</div><div class='del'>-		unsigned long left = PAGE_SIZE;</div><div class='del'>-		unsigned long lsize = sun4c_vacinfo.linesize;</div><div class='del'>-</div><div class='del'>-		__asm__ __volatile__(</div><div class='del'>-		"add	%2, %2, %%g1\n\t"</div><div class='del'>-		"add	%2, %%g1, %%g2\n\t"</div><div class='del'>-		"add	%2, %%g2, %%g3\n\t"</div><div class='del'>-		"add	%2, %%g3, %%g4\n\t"</div><div class='del'>-		"add	%2, %%g4, %%g5\n\t"</div><div class='del'>-		"add	%2, %%g5, %%o4\n\t"</div><div class='del'>-		"add	%2, %%o4, %%o5\n"</div><div class='del'>-		"1:\n\t"</div><div class='del'>-		"subcc	%1, %%o5, %1\n\t"</div><div class='del'>-		"sta	%%g0, [%0] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %2] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %%g1] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %%g2] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %%g3] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %%g4] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %%g5] %6\n\t"</div><div class='del'>-		"sta	%%g0, [%0 + %%o4] %6\n\t"</div><div class='del'>-		"bg	1b\n\t"</div><div class='del'>-		" add	%0, %%o5, %0\n"</div><div class='del'>-		: "=&amp;r" (addr), "=&amp;r" (left), "=&amp;r" (lsize)</div><div class='del'>-		: "0" (addr), "1" (left), "2" (lsize),</div><div class='del'>-		  "i" (ASI_FLUSHPG)</div><div class='del'>-		: "g1", "g2", "g3", "g4", "g5", "o4", "o5", "cc");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* The sun4c's do have an on chip store buffer.  And the way you</div><div class='del'>- * clear them out isn't so obvious.  The only way I can think of</div><div class='del'>- * to accomplish this is to read the current context register,</div><div class='del'>- * store the same value there, then read an external hardware</div><div class='del'>- * register.</div><div class='del'>- */</div><div class='del'>-void sun4c_complete_all_stores(void)</div><div class='del'>-{</div><div class='del'>-	volatile int _unused;</div><div class='del'>-</div><div class='del'>-	_unused = sun4c_get_context();</div><div class='del'>-	sun4c_set_context(_unused);</div><div class='del'>-	_unused = get_auxio();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Bootup utility functions. */</div><div class='del'>-static inline void sun4c_init_clean_segmap(unsigned char pseg)</div><div class='del'>-{</div><div class='del'>-	unsigned long vaddr;</div><div class='del'>-</div><div class='del'>-	sun4c_put_segmap(0, pseg);</div><div class='del'>-	for (vaddr = 0; vaddr &lt; SUN4C_REAL_PGDIR_SIZE; vaddr += PAGE_SIZE)</div><div class='del'>-		sun4c_put_pte(vaddr, 0);</div><div class='del'>-	sun4c_put_segmap(0, invalid_segment);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void sun4c_init_clean_mmu(unsigned long kernel_end)</div><div class='del'>-{</div><div class='del'>-	unsigned long vaddr;</div><div class='del'>-	unsigned char savectx, ctx;</div><div class='del'>-</div><div class='del'>-	savectx = sun4c_get_context();</div><div class='del'>-	for (ctx = 0; ctx &lt; num_contexts; ctx++) {</div><div class='del'>-		sun4c_set_context(ctx);</div><div class='del'>-		for (vaddr = 0; vaddr &lt; 0x20000000; vaddr += SUN4C_REAL_PGDIR_SIZE)</div><div class='del'>-			sun4c_put_segmap(vaddr, invalid_segment);</div><div class='del'>-		for (vaddr = 0xe0000000; vaddr &lt; KERNBASE; vaddr += SUN4C_REAL_PGDIR_SIZE)</div><div class='del'>-			sun4c_put_segmap(vaddr, invalid_segment);</div><div class='del'>-		for (vaddr = kernel_end; vaddr &lt; KADB_DEBUGGER_BEGVM; vaddr += SUN4C_REAL_PGDIR_SIZE)</div><div class='del'>-			sun4c_put_segmap(vaddr, invalid_segment);</div><div class='del'>-		for (vaddr = LINUX_OPPROM_ENDVM; vaddr; vaddr += SUN4C_REAL_PGDIR_SIZE)</div><div class='del'>-			sun4c_put_segmap(vaddr, invalid_segment);</div><div class='del'>-	}</div><div class='del'>-	sun4c_set_context(savectx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init sun4c_probe_vac(void)</div><div class='del'>-{</div><div class='del'>-	sun4c_disable_vac();</div><div class='del'>-</div><div class='del'>-	if ((idprom-&gt;id_machtype == (SM_SUN4C | SM_4C_SS1)) ||</div><div class='del'>-	    (idprom-&gt;id_machtype == (SM_SUN4C | SM_4C_SS1PLUS))) {</div><div class='del'>-		/* PROM on SS1 lacks this info, to be super safe we</div><div class='del'>-		 * hard code it here since this arch is cast in stone.</div><div class='del'>-		 */</div><div class='del'>-		sun4c_vacinfo.num_bytes = 65536;</div><div class='del'>-		sun4c_vacinfo.linesize = 16;</div><div class='del'>-	} else {</div><div class='del'>-		sun4c_vacinfo.num_bytes =</div><div class='del'>-		 prom_getintdefault(prom_root_node, "vac-size", 65536);</div><div class='del'>-		sun4c_vacinfo.linesize =</div><div class='del'>-		 prom_getintdefault(prom_root_node, "vac-linesize", 16);</div><div class='del'>-	}</div><div class='del'>-	sun4c_vacinfo.do_hwflushes =</div><div class='del'>-	 prom_getintdefault(prom_root_node, "vac-hwflush", 0);</div><div class='del'>-</div><div class='del'>-	if (sun4c_vacinfo.do_hwflushes == 0)</div><div class='del'>-		sun4c_vacinfo.do_hwflushes =</div><div class='del'>-		 prom_getintdefault(prom_root_node, "vac_hwflush", 0);</div><div class='del'>-</div><div class='del'>-	if (sun4c_vacinfo.num_bytes != 65536) {</div><div class='del'>-		prom_printf("WEIRD Sun4C VAC cache size, "</div><div class='del'>-			    "tell sparclinux@vger.kernel.org");</div><div class='del'>-		prom_halt();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (sun4c_vacinfo.linesize) {</div><div class='del'>-	case 16:</div><div class='del'>-		sun4c_vacinfo.log2lsize = 4;</div><div class='del'>-		break;</div><div class='del'>-	case 32:</div><div class='del'>-		sun4c_vacinfo.log2lsize = 5;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		prom_printf("probe_vac: Didn't expect vac-linesize of %d, halting\n",</div><div class='del'>-			    sun4c_vacinfo.linesize);</div><div class='del'>-		prom_halt();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sun4c_flush_all();</div><div class='del'>-	sun4c_enable_vac();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Patch instructions for the low level kernel fault handler. */</div><div class='del'>-extern unsigned long invalid_segment_patch1, invalid_segment_patch1_ff;</div><div class='del'>-extern unsigned long invalid_segment_patch2, invalid_segment_patch2_ff;</div><div class='del'>-extern unsigned long invalid_segment_patch1_1ff, invalid_segment_patch2_1ff;</div><div class='del'>-extern unsigned long num_context_patch1, num_context_patch1_16;</div><div class='del'>-extern unsigned long num_context_patch2_16;</div><div class='del'>-extern unsigned long vac_linesize_patch, vac_linesize_patch_32;</div><div class='del'>-extern unsigned long vac_hwflush_patch1, vac_hwflush_patch1_on;</div><div class='del'>-extern unsigned long vac_hwflush_patch2, vac_hwflush_patch2_on;</div><div class='del'>-</div><div class='del'>-#define PATCH_INSN(src, dst) do {	\</div><div class='del'>-		daddr = &amp;(dst);		\</div><div class='del'>-		iaddr = &amp;(src);		\</div><div class='del'>-		*daddr = *iaddr;	\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-static void __init patch_kernel_fault_handler(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long *iaddr, *daddr;</div><div class='del'>-</div><div class='del'>-	switch (num_segmaps) {</div><div class='del'>-		case 128:</div><div class='del'>-			/* Default, nothing to do. */</div><div class='del'>-			break;</div><div class='del'>-		case 256:</div><div class='del'>-			PATCH_INSN(invalid_segment_patch1_ff,</div><div class='del'>-				   invalid_segment_patch1);</div><div class='del'>-			PATCH_INSN(invalid_segment_patch2_ff,</div><div class='del'>-				   invalid_segment_patch2);</div><div class='del'>-			break;</div><div class='del'>-		case 512:</div><div class='del'>-			PATCH_INSN(invalid_segment_patch1_1ff,</div><div class='del'>-				   invalid_segment_patch1);</div><div class='del'>-			PATCH_INSN(invalid_segment_patch2_1ff,</div><div class='del'>-				   invalid_segment_patch2);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			prom_printf("Unhandled number of segmaps: %d\n",</div><div class='del'>-				    num_segmaps);</div><div class='del'>-			prom_halt();</div><div class='del'>-	}</div><div class='del'>-	switch (num_contexts) {</div><div class='del'>-		case 8:</div><div class='del'>-			/* Default, nothing to do. */</div><div class='del'>-			break;</div><div class='del'>-		case 16:</div><div class='del'>-			PATCH_INSN(num_context_patch1_16,</div><div class='del'>-				   num_context_patch1);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			prom_printf("Unhandled number of contexts: %d\n",</div><div class='del'>-				    num_contexts);</div><div class='del'>-			prom_halt();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (sun4c_vacinfo.do_hwflushes != 0) {</div><div class='del'>-		PATCH_INSN(vac_hwflush_patch1_on, vac_hwflush_patch1);</div><div class='del'>-		PATCH_INSN(vac_hwflush_patch2_on, vac_hwflush_patch2);</div><div class='del'>-	} else {</div><div class='del'>-		switch (sun4c_vacinfo.linesize) {</div><div class='del'>-		case 16:</div><div class='del'>-			/* Default, nothing to do. */</div><div class='del'>-			break;</div><div class='del'>-		case 32:</div><div class='del'>-			PATCH_INSN(vac_linesize_patch_32, vac_linesize_patch);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			prom_printf("Impossible VAC linesize %d, halting...\n",</div><div class='del'>-				    sun4c_vacinfo.linesize);</div><div class='del'>-			prom_halt();</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init sun4c_probe_mmu(void)</div><div class='del'>-{</div><div class='del'>-	if ((idprom-&gt;id_machtype == (SM_SUN4C | SM_4C_SS1)) ||</div><div class='del'>-	    (idprom-&gt;id_machtype == (SM_SUN4C | SM_4C_SS1PLUS))) {</div><div class='del'>-		/* Hardcode these just to be safe, PROM on SS1 does</div><div class='del'>-		* not have this info available in the root node.</div><div class='del'>-		*/</div><div class='del'>-		num_segmaps = 128;</div><div class='del'>-		num_contexts = 8;</div><div class='del'>-	} else {</div><div class='del'>-		num_segmaps =</div><div class='del'>-		    prom_getintdefault(prom_root_node, "mmu-npmg", 128);</div><div class='del'>-		num_contexts =</div><div class='del'>-		    prom_getintdefault(prom_root_node, "mmu-nctx", 0x8);</div><div class='del'>-	}</div><div class='del'>-	patch_kernel_fault_handler();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-volatile unsigned long __iomem *sun4c_memerr_reg = NULL;</div><div class='del'>-</div><div class='del'>-void __init sun4c_probe_memerr_reg(void)</div><div class='del'>-{</div><div class='del'>-	phandle node;</div><div class='del'>-	struct linux_prom_registers regs[1];</div><div class='del'>-</div><div class='del'>-	node = prom_getchild(prom_root_node);</div><div class='del'>-	node = prom_searchsiblings(prom_root_node, "memory-error");</div><div class='del'>-	if (!node)</div><div class='del'>-		return;</div><div class='del'>-	if (prom_getproperty(node, "reg", (char *)regs, sizeof(regs)) &lt;= 0)</div><div class='del'>-		return;</div><div class='del'>-	/* hmm I think regs[0].which_io is zero here anyways */</div><div class='del'>-	sun4c_memerr_reg = ioremap(regs[0].phys_addr, regs[0].reg_size);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void sun4c_init_ss2_cache_bug(void)</div><div class='del'>-{</div><div class='del'>-	if ((idprom-&gt;id_machtype == (SM_SUN4C | SM_4C_SS2)) ||</div><div class='del'>-	    (idprom-&gt;id_machtype == (SM_SUN4C | SM_4C_IPX)) ||</div><div class='del'>-	    (idprom-&gt;id_machtype == (SM_SUN4C | SM_4C_ELC))) {</div><div class='del'>-		/* Whee.. */</div><div class='del'>-		printk("SS2 cache bug detected, uncaching trap table page\n");</div><div class='del'>-		sun4c_flush_page((unsigned int) &amp;_start);</div><div class='del'>-		sun4c_put_pte(((unsigned long) &amp;_start),</div><div class='del'>-			(sun4c_get_pte((unsigned long) &amp;_start) | _SUN4C_PAGE_NOCACHE));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Addr is always aligned on a page boundary for us already. */</div><div class='del'>-static int sun4c_map_dma_area(struct device *dev, dma_addr_t *pba, unsigned long va,</div><div class='del'>-			      unsigned long addr, int len)</div><div class='del'>-{</div><div class='del'>-	unsigned long page, end;</div><div class='del'>-</div><div class='del'>-	*pba = addr;</div><div class='del'>-</div><div class='del'>-	end = PAGE_ALIGN((addr + len));</div><div class='del'>-	while (addr &lt; end) {</div><div class='del'>-		page = va;</div><div class='del'>-		sun4c_flush_page(page);</div><div class='del'>-		page -= PAGE_OFFSET;</div><div class='del'>-		page &gt;&gt;= PAGE_SHIFT;</div><div class='del'>-		page |= (_SUN4C_PAGE_VALID | _SUN4C_PAGE_DIRTY |</div><div class='del'>-			 _SUN4C_PAGE_NOCACHE | _SUN4C_PAGE_PRIV);</div><div class='del'>-		sun4c_put_pte(addr, page);</div><div class='del'>-		addr += PAGE_SIZE;</div><div class='del'>-		va += PAGE_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_unmap_dma_area(struct device *dev, unsigned long busa, int len)</div><div class='del'>-{</div><div class='del'>-	/* Fortunately for us, bus_addr == uncached_virt in sun4c. */</div><div class='del'>-	/* XXX Implement this */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* TLB management. */</div><div class='del'>-</div><div class='del'>-/* Don't change this struct without changing entry.S. This is used</div><div class='del'>- * in the in-window kernel fault handler, and you don't want to mess</div><div class='del'>- * with that. (See sun4c_fault in entry.S).</div><div class='del'>- */</div><div class='del'>-struct sun4c_mmu_entry {</div><div class='del'>-	struct sun4c_mmu_entry *next;</div><div class='del'>-	struct sun4c_mmu_entry *prev;</div><div class='del'>-	unsigned long vaddr;</div><div class='del'>-	unsigned char pseg;</div><div class='del'>-	unsigned char locked;</div><div class='del'>-</div><div class='del'>-	/* For user mappings only, and completely hidden from kernel</div><div class='del'>-	 * TLB miss code.</div><div class='del'>-	 */</div><div class='del'>-	unsigned char ctx;</div><div class='del'>-	struct sun4c_mmu_entry *lru_next;</div><div class='del'>-	struct sun4c_mmu_entry *lru_prev;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct sun4c_mmu_entry mmu_entry_pool[SUN4C_MAX_SEGMAPS];</div><div class='del'>-</div><div class='del'>-static void __init sun4c_init_mmu_entry_pool(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i=0; i &lt; SUN4C_MAX_SEGMAPS; i++) {</div><div class='del'>-		mmu_entry_pool[i].pseg = i;</div><div class='del'>-		mmu_entry_pool[i].next = NULL;</div><div class='del'>-		mmu_entry_pool[i].prev = NULL;</div><div class='del'>-		mmu_entry_pool[i].vaddr = 0;</div><div class='del'>-		mmu_entry_pool[i].locked = 0;</div><div class='del'>-		mmu_entry_pool[i].ctx = 0;</div><div class='del'>-		mmu_entry_pool[i].lru_next = NULL;</div><div class='del'>-		mmu_entry_pool[i].lru_prev = NULL;</div><div class='del'>-	}</div><div class='del'>-	mmu_entry_pool[invalid_segment].locked = 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void fix_permissions(unsigned long vaddr, unsigned long bits_on,</div><div class='del'>-				   unsigned long bits_off)</div><div class='del'>-{</div><div class='del'>-	unsigned long start, end;</div><div class='del'>-</div><div class='del'>-	end = vaddr + SUN4C_REAL_PGDIR_SIZE;</div><div class='del'>-	for (start = vaddr; start &lt; end; start += PAGE_SIZE)</div><div class='del'>-		if (sun4c_get_pte(start) &amp; _SUN4C_PAGE_VALID)</div><div class='del'>-			sun4c_put_pte(start, (sun4c_get_pte(start) | bits_on) &amp;</div><div class='del'>-				      ~bits_off);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void sun4c_init_map_kernelprom(unsigned long kernel_end)</div><div class='del'>-{</div><div class='del'>-	unsigned long vaddr;</div><div class='del'>-	unsigned char pseg, ctx;</div><div class='del'>-</div><div class='del'>-	for (vaddr = KADB_DEBUGGER_BEGVM;</div><div class='del'>-	     vaddr &lt; LINUX_OPPROM_ENDVM;</div><div class='del'>-	     vaddr += SUN4C_REAL_PGDIR_SIZE) {</div><div class='del'>-		pseg = sun4c_get_segmap(vaddr);</div><div class='del'>-		if (pseg != invalid_segment) {</div><div class='del'>-			mmu_entry_pool[pseg].locked = 1;</div><div class='del'>-			for (ctx = 0; ctx &lt; num_contexts; ctx++)</div><div class='del'>-				prom_putsegment(ctx, vaddr, pseg);</div><div class='del'>-			fix_permissions(vaddr, _SUN4C_PAGE_PRIV, 0);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (vaddr = KERNBASE; vaddr &lt; kernel_end; vaddr += SUN4C_REAL_PGDIR_SIZE) {</div><div class='del'>-		pseg = sun4c_get_segmap(vaddr);</div><div class='del'>-		mmu_entry_pool[pseg].locked = 1;</div><div class='del'>-		for (ctx = 0; ctx &lt; num_contexts; ctx++)</div><div class='del'>-			prom_putsegment(ctx, vaddr, pseg);</div><div class='del'>-		fix_permissions(vaddr, _SUN4C_PAGE_PRIV, _SUN4C_PAGE_NOCACHE);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init sun4c_init_lock_area(unsigned long start, unsigned long end)</div><div class='del'>-{</div><div class='del'>-	int i, ctx;</div><div class='del'>-</div><div class='del'>-	while (start &lt; end) {</div><div class='del'>-		for (i = 0; i &lt; invalid_segment; i++)</div><div class='del'>-			if (!mmu_entry_pool[i].locked)</div><div class='del'>-				break;</div><div class='del'>-		mmu_entry_pool[i].locked = 1;</div><div class='del'>-		sun4c_init_clean_segmap(i);</div><div class='del'>-		for (ctx = 0; ctx &lt; num_contexts; ctx++)</div><div class='del'>-			prom_putsegment(ctx, start, mmu_entry_pool[i].pseg);</div><div class='del'>-		start += SUN4C_REAL_PGDIR_SIZE;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Don't change this struct without changing entry.S. This is used</div><div class='del'>- * in the in-window kernel fault handler, and you don't want to mess</div><div class='del'>- * with that. (See sun4c_fault in entry.S).</div><div class='del'>- */</div><div class='del'>-struct sun4c_mmu_ring {</div><div class='del'>-	struct sun4c_mmu_entry ringhd;</div><div class='del'>-	int num_entries;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct sun4c_mmu_ring sun4c_context_ring[SUN4C_MAX_CONTEXTS]; /* used user entries */</div><div class='del'>-static struct sun4c_mmu_ring sun4c_ufree_ring;       /* free user entries */</div><div class='del'>-static struct sun4c_mmu_ring sun4c_ulru_ring;	     /* LRU user entries */</div><div class='del'>-struct sun4c_mmu_ring sun4c_kernel_ring;      /* used kernel entries */</div><div class='del'>-struct sun4c_mmu_ring sun4c_kfree_ring;       /* free kernel entries */</div><div class='del'>-</div><div class='del'>-static inline void sun4c_init_rings(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; SUN4C_MAX_CONTEXTS; i++) {</div><div class='del'>-		sun4c_context_ring[i].ringhd.next =</div><div class='del'>-			sun4c_context_ring[i].ringhd.prev =</div><div class='del'>-			&amp;sun4c_context_ring[i].ringhd;</div><div class='del'>-		sun4c_context_ring[i].num_entries = 0;</div><div class='del'>-	}</div><div class='del'>-	sun4c_ufree_ring.ringhd.next = sun4c_ufree_ring.ringhd.prev =</div><div class='del'>-		&amp;sun4c_ufree_ring.ringhd;</div><div class='del'>-	sun4c_ufree_ring.num_entries = 0;</div><div class='del'>-	sun4c_ulru_ring.ringhd.lru_next = sun4c_ulru_ring.ringhd.lru_prev =</div><div class='del'>-		&amp;sun4c_ulru_ring.ringhd;</div><div class='del'>-	sun4c_ulru_ring.num_entries = 0;</div><div class='del'>-	sun4c_kernel_ring.ringhd.next = sun4c_kernel_ring.ringhd.prev =</div><div class='del'>-		&amp;sun4c_kernel_ring.ringhd;</div><div class='del'>-	sun4c_kernel_ring.num_entries = 0;</div><div class='del'>-	sun4c_kfree_ring.ringhd.next = sun4c_kfree_ring.ringhd.prev =</div><div class='del'>-		&amp;sun4c_kfree_ring.ringhd;</div><div class='del'>-	sun4c_kfree_ring.num_entries = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void add_ring(struct sun4c_mmu_ring *ring,</div><div class='del'>-		     struct sun4c_mmu_entry *entry)</div><div class='del'>-{</div><div class='del'>-	struct sun4c_mmu_entry *head = &amp;ring-&gt;ringhd;</div><div class='del'>-</div><div class='del'>-	entry-&gt;prev = head;</div><div class='del'>-	(entry-&gt;next = head-&gt;next)-&gt;prev = entry;</div><div class='del'>-	head-&gt;next = entry;</div><div class='del'>-	ring-&gt;num_entries++;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void add_lru(struct sun4c_mmu_entry *entry)</div><div class='del'>-{</div><div class='del'>-	struct sun4c_mmu_ring *ring = &amp;sun4c_ulru_ring;</div><div class='del'>-	struct sun4c_mmu_entry *head = &amp;ring-&gt;ringhd;</div><div class='del'>-</div><div class='del'>-	entry-&gt;lru_next = head;</div><div class='del'>-	(entry-&gt;lru_prev = head-&gt;lru_prev)-&gt;lru_next = entry;</div><div class='del'>-	head-&gt;lru_prev = entry;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void add_ring_ordered(struct sun4c_mmu_ring *ring,</div><div class='del'>-			     struct sun4c_mmu_entry *entry)</div><div class='del'>-{</div><div class='del'>-	struct sun4c_mmu_entry *head = &amp;ring-&gt;ringhd;</div><div class='del'>-	unsigned long addr = entry-&gt;vaddr;</div><div class='del'>-</div><div class='del'>-	while ((head-&gt;next != &amp;ring-&gt;ringhd) &amp;&amp; (head-&gt;next-&gt;vaddr &lt; addr))</div><div class='del'>-		head = head-&gt;next;</div><div class='del'>-</div><div class='del'>-	entry-&gt;prev = head;</div><div class='del'>-	(entry-&gt;next = head-&gt;next)-&gt;prev = entry;</div><div class='del'>-	head-&gt;next = entry;</div><div class='del'>-	ring-&gt;num_entries++;</div><div class='del'>-</div><div class='del'>-	add_lru(entry);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void remove_ring(struct sun4c_mmu_ring *ring,</div><div class='del'>-				   struct sun4c_mmu_entry *entry)</div><div class='del'>-{</div><div class='del'>-	struct sun4c_mmu_entry *next = entry-&gt;next;</div><div class='del'>-</div><div class='del'>-	(next-&gt;prev = entry-&gt;prev)-&gt;next = next;</div><div class='del'>-	ring-&gt;num_entries--;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void remove_lru(struct sun4c_mmu_entry *entry)</div><div class='del'>-{</div><div class='del'>-	struct sun4c_mmu_entry *next = entry-&gt;lru_next;</div><div class='del'>-</div><div class='del'>-	(next-&gt;lru_prev = entry-&gt;lru_prev)-&gt;lru_next = next;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void free_user_entry(int ctx, struct sun4c_mmu_entry *entry)</div><div class='del'>-{</div><div class='del'>-        remove_ring(sun4c_context_ring+ctx, entry);</div><div class='del'>-	remove_lru(entry);</div><div class='del'>-        add_ring(&amp;sun4c_ufree_ring, entry);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void free_kernel_entry(struct sun4c_mmu_entry *entry,</div><div class='del'>-			      struct sun4c_mmu_ring *ring)</div><div class='del'>-{</div><div class='del'>-        remove_ring(ring, entry);</div><div class='del'>-        add_ring(&amp;sun4c_kfree_ring, entry);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init sun4c_init_fill_kernel_ring(int howmany)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	while (howmany) {</div><div class='del'>-		for (i = 0; i &lt; invalid_segment; i++)</div><div class='del'>-			if (!mmu_entry_pool[i].locked)</div><div class='del'>-				break;</div><div class='del'>-		mmu_entry_pool[i].locked = 1;</div><div class='del'>-		sun4c_init_clean_segmap(i);</div><div class='del'>-		add_ring(&amp;sun4c_kfree_ring, &amp;mmu_entry_pool[i]);</div><div class='del'>-		howmany--;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init sun4c_init_fill_user_ring(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; invalid_segment; i++) {</div><div class='del'>-		if (mmu_entry_pool[i].locked)</div><div class='del'>-			continue;</div><div class='del'>-		sun4c_init_clean_segmap(i);</div><div class='del'>-		add_ring(&amp;sun4c_ufree_ring, &amp;mmu_entry_pool[i]);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_kernel_unmap(struct sun4c_mmu_entry *kentry)</div><div class='del'>-{</div><div class='del'>-	int savectx, ctx;</div><div class='del'>-</div><div class='del'>-	savectx = sun4c_get_context();</div><div class='del'>-	for (ctx = 0; ctx &lt; num_contexts; ctx++) {</div><div class='del'>-		sun4c_set_context(ctx);</div><div class='del'>-		sun4c_put_segmap(kentry-&gt;vaddr, invalid_segment);</div><div class='del'>-	}</div><div class='del'>-	sun4c_set_context(savectx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_kernel_map(struct sun4c_mmu_entry *kentry)</div><div class='del'>-{</div><div class='del'>-	int savectx, ctx;</div><div class='del'>-</div><div class='del'>-	savectx = sun4c_get_context();</div><div class='del'>-	for (ctx = 0; ctx &lt; num_contexts; ctx++) {</div><div class='del'>-		sun4c_set_context(ctx);</div><div class='del'>-		sun4c_put_segmap(kentry-&gt;vaddr, kentry-&gt;pseg);</div><div class='del'>-	}</div><div class='del'>-	sun4c_set_context(savectx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define sun4c_user_unmap(__entry) \</div><div class='del'>-	sun4c_put_segmap((__entry)-&gt;vaddr, invalid_segment)</div><div class='del'>-</div><div class='del'>-static void sun4c_demap_context(struct sun4c_mmu_ring *crp, unsigned char ctx)</div><div class='del'>-{</div><div class='del'>-	struct sun4c_mmu_entry *head = &amp;crp-&gt;ringhd;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	if (head-&gt;next != head) {</div><div class='del'>-		struct sun4c_mmu_entry *entry = head-&gt;next;</div><div class='del'>-		int savectx = sun4c_get_context();</div><div class='del'>-</div><div class='del'>-		flush_user_windows();</div><div class='del'>-		sun4c_set_context(ctx);</div><div class='del'>-		sun4c_flush_context();</div><div class='del'>-		do {</div><div class='del'>-			struct sun4c_mmu_entry *next = entry-&gt;next;</div><div class='del'>-</div><div class='del'>-			sun4c_user_unmap(entry);</div><div class='del'>-			free_user_entry(ctx, entry);</div><div class='del'>-</div><div class='del'>-			entry = next;</div><div class='del'>-		} while (entry != head);</div><div class='del'>-		sun4c_set_context(savectx);</div><div class='del'>-	}</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sun4c_user_taken_entries;  /* This is how much we have.             */</div><div class='del'>-static int max_user_taken_entries;    /* This limits us and prevents deadlock. */</div><div class='del'>-</div><div class='del'>-static struct sun4c_mmu_entry *sun4c_kernel_strategy(void)</div><div class='del'>-{</div><div class='del'>-	struct sun4c_mmu_entry *this_entry;</div><div class='del'>-</div><div class='del'>-	/* If some are free, return first one. */</div><div class='del'>-	if (sun4c_kfree_ring.num_entries) {</div><div class='del'>-		this_entry = sun4c_kfree_ring.ringhd.next;</div><div class='del'>-		return this_entry;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Else free one up. */</div><div class='del'>-	this_entry = sun4c_kernel_ring.ringhd.prev;</div><div class='del'>-	sun4c_flush_segment(this_entry-&gt;vaddr);</div><div class='del'>-	sun4c_kernel_unmap(this_entry);</div><div class='del'>-	free_kernel_entry(this_entry, &amp;sun4c_kernel_ring);</div><div class='del'>-	this_entry = sun4c_kfree_ring.ringhd.next;</div><div class='del'>-</div><div class='del'>-	return this_entry;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Using this method to free up mmu entries eliminates a lot of</div><div class='del'>- * potential races since we have a kernel that incurs tlb</div><div class='del'>- * replacement faults.  There may be performance penalties.</div><div class='del'>- *</div><div class='del'>- * NOTE: Must be called with interrupts disabled.</div><div class='del'>- */</div><div class='del'>-static struct sun4c_mmu_entry *sun4c_user_strategy(void)</div><div class='del'>-{</div><div class='del'>-	struct sun4c_mmu_entry *entry;</div><div class='del'>-	unsigned char ctx;</div><div class='del'>-	int savectx;</div><div class='del'>-</div><div class='del'>-	/* If some are free, return first one. */</div><div class='del'>-	if (sun4c_ufree_ring.num_entries) {</div><div class='del'>-		entry = sun4c_ufree_ring.ringhd.next;</div><div class='del'>-		goto unlink_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (sun4c_user_taken_entries) {</div><div class='del'>-		entry = sun4c_kernel_strategy();</div><div class='del'>-		sun4c_user_taken_entries--;</div><div class='del'>-		goto kunlink_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Grab from the beginning of the LRU list. */</div><div class='del'>-	entry = sun4c_ulru_ring.ringhd.lru_next;</div><div class='del'>-	ctx = entry-&gt;ctx;</div><div class='del'>-</div><div class='del'>-	savectx = sun4c_get_context();</div><div class='del'>-	flush_user_windows();</div><div class='del'>-	sun4c_set_context(ctx);</div><div class='del'>-	sun4c_flush_segment(entry-&gt;vaddr);</div><div class='del'>-	sun4c_user_unmap(entry);</div><div class='del'>-	remove_ring(sun4c_context_ring + ctx, entry);</div><div class='del'>-	remove_lru(entry);</div><div class='del'>-	sun4c_set_context(savectx);</div><div class='del'>-</div><div class='del'>-	return entry;</div><div class='del'>-</div><div class='del'>-unlink_out:</div><div class='del'>-	remove_ring(&amp;sun4c_ufree_ring, entry);</div><div class='del'>-	return entry;</div><div class='del'>-kunlink_out:</div><div class='del'>-	remove_ring(&amp;sun4c_kfree_ring, entry);</div><div class='del'>-	return entry;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* NOTE: Must be called with interrupts disabled. */</div><div class='del'>-void sun4c_grow_kernel_ring(void)</div><div class='del'>-{</div><div class='del'>-	struct sun4c_mmu_entry *entry;</div><div class='del'>-</div><div class='del'>-	/* Prevent deadlock condition. */</div><div class='del'>-	if (sun4c_user_taken_entries &gt;= max_user_taken_entries)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (sun4c_ufree_ring.num_entries) {</div><div class='del'>-		entry = sun4c_ufree_ring.ringhd.next;</div><div class='del'>-        	remove_ring(&amp;sun4c_ufree_ring, entry);</div><div class='del'>-		add_ring(&amp;sun4c_kfree_ring, entry);</div><div class='del'>-		sun4c_user_taken_entries++;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* 2 page buckets for task struct and kernel stack allocation.</div><div class='del'>- *</div><div class='del'>- * TASK_STACK_BEGIN</div><div class='del'>- * bucket[0]</div><div class='del'>- * bucket[1]</div><div class='del'>- *   [ ... ]</div><div class='del'>- * bucket[NR_TASK_BUCKETS-1]</div><div class='del'>- * TASK_STACK_BEGIN + (sizeof(struct task_bucket) * NR_TASK_BUCKETS)</div><div class='del'>- *</div><div class='del'>- * Each slot looks like:</div><div class='del'>- *</div><div class='del'>- *  page 1 --  task struct + beginning of kernel stack</div><div class='del'>- *  page 2 --  rest of kernel stack</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-union task_union *sun4c_bucket[NR_TASK_BUCKETS];</div><div class='del'>-</div><div class='del'>-static int sun4c_lowbucket_avail;</div><div class='del'>-</div><div class='del'>-#define BUCKET_EMPTY     ((union task_union *) 0)</div><div class='del'>-#define BUCKET_SHIFT     (PAGE_SHIFT + 1)        /* log2(sizeof(struct task_bucket)) */</div><div class='del'>-#define BUCKET_SIZE      (1 &lt;&lt; BUCKET_SHIFT)</div><div class='del'>-#define BUCKET_NUM(addr) ((((addr) - SUN4C_LOCK_VADDR) &gt;&gt; BUCKET_SHIFT))</div><div class='del'>-#define BUCKET_ADDR(num) (((num) &lt;&lt; BUCKET_SHIFT) + SUN4C_LOCK_VADDR)</div><div class='del'>-#define BUCKET_PTE(page)       \</div><div class='del'>-        ((((page) - PAGE_OFFSET) &gt;&gt; PAGE_SHIFT) | pgprot_val(SUN4C_PAGE_KERNEL))</div><div class='del'>-#define BUCKET_PTE_PAGE(pte)   \</div><div class='del'>-        (PAGE_OFFSET + (((pte) &amp; SUN4C_PFN_MASK) &lt;&lt; PAGE_SHIFT))</div><div class='del'>-</div><div class='del'>-static void get_locked_segment(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	struct sun4c_mmu_entry *stolen;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	addr &amp;= SUN4C_REAL_PGDIR_MASK;</div><div class='del'>-	stolen = sun4c_user_strategy();</div><div class='del'>-	max_user_taken_entries--;</div><div class='del'>-	stolen-&gt;vaddr = addr;</div><div class='del'>-	flush_user_windows();</div><div class='del'>-	sun4c_kernel_map(stolen);</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void free_locked_segment(unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	struct sun4c_mmu_entry *entry;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned char pseg;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	addr &amp;= SUN4C_REAL_PGDIR_MASK;</div><div class='del'>-	pseg = sun4c_get_segmap(addr);</div><div class='del'>-	entry = &amp;mmu_entry_pool[pseg];</div><div class='del'>-</div><div class='del'>-	flush_user_windows();</div><div class='del'>-	sun4c_flush_segment(addr);</div><div class='del'>-	sun4c_kernel_unmap(entry);</div><div class='del'>-	add_ring(&amp;sun4c_ufree_ring, entry);</div><div class='del'>-	max_user_taken_entries++;</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void garbage_collect(int entry)</div><div class='del'>-{</div><div class='del'>-	int start, end;</div><div class='del'>-</div><div class='del'>-	/* 32 buckets per segment... */</div><div class='del'>-	entry &amp;= ~31;</div><div class='del'>-	start = entry;</div><div class='del'>-	for (end = (start + 32); start &lt; end; start++)</div><div class='del'>-		if (sun4c_bucket[start] != BUCKET_EMPTY)</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-	/* Entire segment empty, release it. */</div><div class='del'>-	free_locked_segment(BUCKET_ADDR(entry));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct thread_info *sun4c_alloc_thread_info_node(int node)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr, pages;</div><div class='del'>-	int entry;</div><div class='del'>-</div><div class='del'>-	pages = __get_free_pages(GFP_KERNEL, THREAD_INFO_ORDER);</div><div class='del'>-	if (!pages)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	for (entry = sun4c_lowbucket_avail; entry &lt; NR_TASK_BUCKETS; entry++)</div><div class='del'>-		if (sun4c_bucket[entry] == BUCKET_EMPTY)</div><div class='del'>-			break;</div><div class='del'>-	if (entry == NR_TASK_BUCKETS) {</div><div class='del'>-		free_pages(pages, THREAD_INFO_ORDER);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-	if (entry &gt;= sun4c_lowbucket_avail)</div><div class='del'>-		sun4c_lowbucket_avail = entry + 1;</div><div class='del'>-</div><div class='del'>-	addr = BUCKET_ADDR(entry);</div><div class='del'>-	sun4c_bucket[entry] = (union task_union *) addr;</div><div class='del'>-	if(sun4c_get_segmap(addr) == invalid_segment)</div><div class='del'>-		get_locked_segment(addr);</div><div class='del'>-</div><div class='del'>-	/* We are changing the virtual color of the page(s)</div><div class='del'>-	 * so we must flush the cache to guarantee consistency.</div><div class='del'>-	 */</div><div class='del'>-	sun4c_flush_page(pages);</div><div class='del'>-	sun4c_flush_page(pages + PAGE_SIZE);</div><div class='del'>-</div><div class='del'>-	sun4c_put_pte(addr, BUCKET_PTE(pages));</div><div class='del'>-	sun4c_put_pte(addr + PAGE_SIZE, BUCKET_PTE(pages + PAGE_SIZE));</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-	memset((void *)addr, 0, PAGE_SIZE &lt;&lt; THREAD_INFO_ORDER);</div><div class='del'>-#endif /* DEBUG_STACK_USAGE */</div><div class='del'>-</div><div class='del'>-	return (struct thread_info *) addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_free_thread_info(struct thread_info *ti)</div><div class='del'>-{</div><div class='del'>-	unsigned long tiaddr = (unsigned long) ti;</div><div class='del'>-	unsigned long pages = BUCKET_PTE_PAGE(sun4c_get_pte(tiaddr));</div><div class='del'>-	int entry = BUCKET_NUM(tiaddr);</div><div class='del'>-</div><div class='del'>-	/* We are deleting a mapping, so the flush here is mandatory. */</div><div class='del'>-	sun4c_flush_page(tiaddr);</div><div class='del'>-	sun4c_flush_page(tiaddr + PAGE_SIZE);</div><div class='del'>-</div><div class='del'>-	sun4c_put_pte(tiaddr, 0);</div><div class='del'>-	sun4c_put_pte(tiaddr + PAGE_SIZE, 0);</div><div class='del'>-</div><div class='del'>-	sun4c_bucket[entry] = BUCKET_EMPTY;</div><div class='del'>-	if (entry &lt; sun4c_lowbucket_avail)</div><div class='del'>-		sun4c_lowbucket_avail = entry;</div><div class='del'>-</div><div class='del'>-	free_pages(pages, THREAD_INFO_ORDER);</div><div class='del'>-	garbage_collect(entry);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init sun4c_init_buckets(void)</div><div class='del'>-{</div><div class='del'>-	int entry;</div><div class='del'>-</div><div class='del'>-	if (sizeof(union thread_union) != (PAGE_SIZE &lt;&lt; THREAD_INFO_ORDER)) {</div><div class='del'>-		extern void thread_info_size_is_bolixed_pete(void);</div><div class='del'>-		thread_info_size_is_bolixed_pete();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (entry = 0; entry &lt; NR_TASK_BUCKETS; entry++)</div><div class='del'>-		sun4c_bucket[entry] = BUCKET_EMPTY;</div><div class='del'>-	sun4c_lowbucket_avail = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long sun4c_iobuffer_start;</div><div class='del'>-static unsigned long sun4c_iobuffer_end;</div><div class='del'>-static unsigned long sun4c_iobuffer_high;</div><div class='del'>-static unsigned long *sun4c_iobuffer_map;</div><div class='del'>-static int iobuffer_map_size;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Alias our pages so they do not cause a trap.</div><div class='del'>- * Also one page may be aliased into several I/O areas and we may</div><div class='del'>- * finish these I/O separately.</div><div class='del'>- */</div><div class='del'>-static char *sun4c_lockarea(char *vaddr, unsigned long size)</div><div class='del'>-{</div><div class='del'>-	unsigned long base, scan;</div><div class='del'>-	unsigned long npages;</div><div class='del'>-	unsigned long vpage;</div><div class='del'>-	unsigned long pte;</div><div class='del'>-	unsigned long apage;</div><div class='del'>-	unsigned long high;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	npages = (((unsigned long)vaddr &amp; ~PAGE_MASK) +</div><div class='del'>-		  size + (PAGE_SIZE-1)) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	base = bitmap_find_next_zero_area(sun4c_iobuffer_map, iobuffer_map_size,</div><div class='del'>-						0, npages, 0);</div><div class='del'>-	if (base &gt;= iobuffer_map_size)</div><div class='del'>-		goto abend;</div><div class='del'>-</div><div class='del'>-	high = ((base + npages) &lt;&lt; PAGE_SHIFT) + sun4c_iobuffer_start;</div><div class='del'>-	high = SUN4C_REAL_PGDIR_ALIGN(high);</div><div class='del'>-	while (high &gt; sun4c_iobuffer_high) {</div><div class='del'>-		get_locked_segment(sun4c_iobuffer_high);</div><div class='del'>-		sun4c_iobuffer_high += SUN4C_REAL_PGDIR_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vpage = ((unsigned long) vaddr) &amp; PAGE_MASK;</div><div class='del'>-	for (scan = base; scan &lt; base+npages; scan++) {</div><div class='del'>-		pte = ((vpage-PAGE_OFFSET) &gt;&gt; PAGE_SHIFT);</div><div class='del'>- 		pte |= pgprot_val(SUN4C_PAGE_KERNEL);</div><div class='del'>-		pte |= _SUN4C_PAGE_NOCACHE;</div><div class='del'>-		set_bit(scan, sun4c_iobuffer_map);</div><div class='del'>-		apage = (scan &lt;&lt; PAGE_SHIFT) + sun4c_iobuffer_start;</div><div class='del'>-</div><div class='del'>-		/* Flush original mapping so we see the right things later. */</div><div class='del'>-		sun4c_flush_page(vpage);</div><div class='del'>-</div><div class='del'>-		sun4c_put_pte(apage, pte);</div><div class='del'>-		vpage += PAGE_SIZE;</div><div class='del'>-	}</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-	return (char *) ((base &lt;&lt; PAGE_SHIFT) + sun4c_iobuffer_start +</div><div class='del'>-			 (((unsigned long) vaddr) &amp; ~PAGE_MASK));</div><div class='del'>-</div><div class='del'>-abend:</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-	printk("DMA vaddr=0x%p size=%08lx\n", vaddr, size);</div><div class='del'>-	panic("Out of iobuffer table");</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_unlockarea(char *vaddr, unsigned long size)</div><div class='del'>-{</div><div class='del'>-	unsigned long vpage, npages;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int scan, high;</div><div class='del'>-</div><div class='del'>-	vpage = (unsigned long)vaddr &amp; PAGE_MASK;</div><div class='del'>-	npages = (((unsigned long)vaddr &amp; ~PAGE_MASK) +</div><div class='del'>-		  size + (PAGE_SIZE-1)) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	while (npages != 0) {</div><div class='del'>-		--npages;</div><div class='del'>-</div><div class='del'>-		/* This mapping is marked non-cachable, no flush necessary. */</div><div class='del'>-		sun4c_put_pte(vpage, 0);</div><div class='del'>-		clear_bit((vpage - sun4c_iobuffer_start) &gt;&gt; PAGE_SHIFT,</div><div class='del'>-			  sun4c_iobuffer_map);</div><div class='del'>-		vpage += PAGE_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* garbage collect */</div><div class='del'>-	scan = (sun4c_iobuffer_high - sun4c_iobuffer_start) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	while (scan &gt;= 0 &amp;&amp; !sun4c_iobuffer_map[scan &gt;&gt; 5])</div><div class='del'>-		scan -= 32;</div><div class='del'>-	scan += 32;</div><div class='del'>-	high = sun4c_iobuffer_start + (scan &lt;&lt; PAGE_SHIFT);</div><div class='del'>-	high = SUN4C_REAL_PGDIR_ALIGN(high) + SUN4C_REAL_PGDIR_SIZE;</div><div class='del'>-	while (high &lt; sun4c_iobuffer_high) {</div><div class='del'>-		sun4c_iobuffer_high -= SUN4C_REAL_PGDIR_SIZE;</div><div class='del'>-		free_locked_segment(sun4c_iobuffer_high);</div><div class='del'>-	}</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Note the scsi code at init time passes to here buffers</div><div class='del'>- * which sit on the kernel stack, those are already locked</div><div class='del'>- * by implication and fool the page locking code above</div><div class='del'>- * if passed to by mistake.</div><div class='del'>- */</div><div class='del'>-static __u32 sun4c_get_scsi_one(struct device *dev, char *bufptr, unsigned long len)</div><div class='del'>-{</div><div class='del'>-	unsigned long page;</div><div class='del'>-</div><div class='del'>-	page = ((unsigned long)bufptr) &amp; PAGE_MASK;</div><div class='del'>-	if (!virt_addr_valid(page)) {</div><div class='del'>-		sun4c_flush_page(page);</div><div class='del'>-		return (__u32)bufptr; /* already locked */</div><div class='del'>-	}</div><div class='del'>-	return (__u32)sun4c_lockarea(bufptr, len);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_get_scsi_sgl(struct device *dev, struct scatterlist *sg, int sz)</div><div class='del'>-{</div><div class='del'>-	while (sz != 0) {</div><div class='del'>-		--sz;</div><div class='del'>-		sg-&gt;dma_address = (__u32)sun4c_lockarea(sg_virt(sg), sg-&gt;length);</div><div class='del'>-		sg-&gt;dma_length = sg-&gt;length;</div><div class='del'>-		sg = sg_next(sg);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_release_scsi_one(struct device *dev, __u32 bufptr, unsigned long len)</div><div class='del'>-{</div><div class='del'>-	if (bufptr &lt; sun4c_iobuffer_start)</div><div class='del'>-		return; /* On kernel stack or similar, see above */</div><div class='del'>-	sun4c_unlockarea((char *)bufptr, len);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_release_scsi_sgl(struct device *dev, struct scatterlist *sg, int sz)</div><div class='del'>-{</div><div class='del'>-	while (sz != 0) {</div><div class='del'>-		--sz;</div><div class='del'>-		sun4c_unlockarea((char *)sg-&gt;dma_address, sg-&gt;length);</div><div class='del'>-		sg = sg_next(sg);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define TASK_ENTRY_SIZE    BUCKET_SIZE /* see above */</div><div class='del'>-#define LONG_ALIGN(x) (((x)+(sizeof(long))-1)&amp;~((sizeof(long))-1))</div><div class='del'>-</div><div class='del'>-struct vm_area_struct sun4c_kstack_vma;</div><div class='del'>-</div><div class='del'>-static void __init sun4c_init_lock_areas(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long sun4c_taskstack_start;</div><div class='del'>-	unsigned long sun4c_taskstack_end;</div><div class='del'>-	int bitmap_size;</div><div class='del'>-</div><div class='del'>-	sun4c_init_buckets();</div><div class='del'>-	sun4c_taskstack_start = SUN4C_LOCK_VADDR;</div><div class='del'>-	sun4c_taskstack_end = (sun4c_taskstack_start +</div><div class='del'>-			       (TASK_ENTRY_SIZE * NR_TASK_BUCKETS));</div><div class='del'>-	if (sun4c_taskstack_end &gt;= SUN4C_LOCK_END) {</div><div class='del'>-		prom_printf("Too many tasks, decrease NR_TASK_BUCKETS please.\n");</div><div class='del'>-		prom_halt();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sun4c_iobuffer_start = sun4c_iobuffer_high =</div><div class='del'>-				SUN4C_REAL_PGDIR_ALIGN(sun4c_taskstack_end);</div><div class='del'>-	sun4c_iobuffer_end = SUN4C_LOCK_END;</div><div class='del'>-	bitmap_size = (sun4c_iobuffer_end - sun4c_iobuffer_start) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	bitmap_size = (bitmap_size + 7) &gt;&gt; 3;</div><div class='del'>-	bitmap_size = LONG_ALIGN(bitmap_size);</div><div class='del'>-	iobuffer_map_size = bitmap_size &lt;&lt; 3;</div><div class='del'>-	sun4c_iobuffer_map = __alloc_bootmem(bitmap_size, SMP_CACHE_BYTES, 0UL);</div><div class='del'>-	memset((void *) sun4c_iobuffer_map, 0, bitmap_size);</div><div class='del'>-</div><div class='del'>-	sun4c_kstack_vma.vm_mm = &amp;init_mm;</div><div class='del'>-	sun4c_kstack_vma.vm_start = sun4c_taskstack_start;</div><div class='del'>-	sun4c_kstack_vma.vm_end = sun4c_taskstack_end;</div><div class='del'>-	sun4c_kstack_vma.vm_page_prot = PAGE_SHARED;</div><div class='del'>-	sun4c_kstack_vma.vm_flags = VM_READ | VM_WRITE | VM_EXEC;</div><div class='del'>-	insert_vm_struct(&amp;init_mm, &amp;sun4c_kstack_vma);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Cache flushing on the sun4c. */</div><div class='del'>-static void sun4c_flush_cache_all(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long begin, end;</div><div class='del'>-</div><div class='del'>-	flush_user_windows();</div><div class='del'>-	begin = (KERNBASE + SUN4C_REAL_PGDIR_SIZE);</div><div class='del'>-	end = (begin + SUN4C_VAC_SIZE);</div><div class='del'>-</div><div class='del'>-	if (sun4c_vacinfo.linesize == 32) {</div><div class='del'>-		while (begin &lt; end) {</div><div class='del'>-			__asm__ __volatile__(</div><div class='del'>-			"ld	[%0 + 0x00], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x20], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x40], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x60], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x80], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0xa0], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0xc0], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0xe0], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x100], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x120], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x140], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x160], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x180], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x1a0], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x1c0], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x1e0], %%g0\n"</div><div class='del'>-			: : "r" (begin));</div><div class='del'>-			begin += 512;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		while (begin &lt; end) {</div><div class='del'>-			__asm__ __volatile__(</div><div class='del'>-			"ld	[%0 + 0x00], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x10], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x20], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x30], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x40], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x50], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x60], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x70], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x80], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0x90], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0xa0], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0xb0], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0xc0], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0xd0], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0xe0], %%g0\n\t"</div><div class='del'>-			"ld	[%0 + 0xf0], %%g0\n"</div><div class='del'>-			: : "r" (begin));</div><div class='del'>-			begin += 256;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_flush_cache_mm(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	int new_ctx = mm-&gt;context;</div><div class='del'>-</div><div class='del'>-	if (new_ctx != NO_CONTEXT) {</div><div class='del'>-		flush_user_windows();</div><div class='del'>-</div><div class='del'>-		if (sun4c_context_ring[new_ctx].num_entries) {</div><div class='del'>-			struct sun4c_mmu_entry *head = &amp;sun4c_context_ring[new_ctx].ringhd;</div><div class='del'>-			unsigned long flags;</div><div class='del'>-</div><div class='del'>-			local_irq_save(flags);</div><div class='del'>-			if (head-&gt;next != head) {</div><div class='del'>-				struct sun4c_mmu_entry *entry = head-&gt;next;</div><div class='del'>-				int savectx = sun4c_get_context();</div><div class='del'>-</div><div class='del'>-				sun4c_set_context(new_ctx);</div><div class='del'>-				sun4c_flush_context();</div><div class='del'>-				do {</div><div class='del'>-					struct sun4c_mmu_entry *next = entry-&gt;next;</div><div class='del'>-</div><div class='del'>-					sun4c_user_unmap(entry);</div><div class='del'>-					free_user_entry(new_ctx, entry);</div><div class='del'>-</div><div class='del'>-					entry = next;</div><div class='del'>-				} while (entry != head);</div><div class='del'>-				sun4c_set_context(savectx);</div><div class='del'>-			}</div><div class='del'>-			local_irq_restore(flags);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-	int new_ctx = mm-&gt;context;</div><div class='del'>-</div><div class='del'>-	if (new_ctx != NO_CONTEXT) {</div><div class='del'>-		struct sun4c_mmu_entry *head = &amp;sun4c_context_ring[new_ctx].ringhd;</div><div class='del'>-		struct sun4c_mmu_entry *entry;</div><div class='del'>-		unsigned long flags;</div><div class='del'>-</div><div class='del'>-		flush_user_windows();</div><div class='del'>-</div><div class='del'>-		local_irq_save(flags);</div><div class='del'>-		/* All user segmap chains are ordered on entry-&gt;vaddr. */</div><div class='del'>-		for (entry = head-&gt;next;</div><div class='del'>-		     (entry != head) &amp;&amp; ((entry-&gt;vaddr+SUN4C_REAL_PGDIR_SIZE) &lt; start);</div><div class='del'>-		     entry = entry-&gt;next)</div><div class='del'>-			;</div><div class='del'>-</div><div class='del'>-		/* Tracing various job mixtures showed that this conditional</div><div class='del'>-		 * only passes ~35% of the time for most worse case situations,</div><div class='del'>-		 * therefore we avoid all of this gross overhead ~65% of the time.</div><div class='del'>-		 */</div><div class='del'>-		if ((entry != head) &amp;&amp; (entry-&gt;vaddr &lt; end)) {</div><div class='del'>-			int octx = sun4c_get_context();</div><div class='del'>-			sun4c_set_context(new_ctx);</div><div class='del'>-</div><div class='del'>-			/* At this point, always, (start &gt;= entry-&gt;vaddr) and</div><div class='del'>-			 * (entry-&gt;vaddr &lt; end), once the latter condition</div><div class='del'>-			 * ceases to hold, or we hit the end of the list, we</div><div class='del'>-			 * exit the loop.  The ordering of all user allocated</div><div class='del'>-			 * segmaps makes this all work out so beautifully.</div><div class='del'>-			 */</div><div class='del'>-			do {</div><div class='del'>-				struct sun4c_mmu_entry *next = entry-&gt;next;</div><div class='del'>-				unsigned long realend;</div><div class='del'>-</div><div class='del'>-				/* "realstart" is always &gt;= entry-&gt;vaddr */</div><div class='del'>-				realend = entry-&gt;vaddr + SUN4C_REAL_PGDIR_SIZE;</div><div class='del'>-				if (end &lt; realend)</div><div class='del'>-					realend = end;</div><div class='del'>-				if ((realend - entry-&gt;vaddr) &lt;= (PAGE_SIZE &lt;&lt; 3)) {</div><div class='del'>-					unsigned long page = entry-&gt;vaddr;</div><div class='del'>-					while (page &lt; realend) {</div><div class='del'>-						sun4c_flush_page(page);</div><div class='del'>-						page += PAGE_SIZE;</div><div class='del'>-					}</div><div class='del'>-				} else {</div><div class='del'>-					sun4c_flush_segment(entry-&gt;vaddr);</div><div class='del'>-					sun4c_user_unmap(entry);</div><div class='del'>-					free_user_entry(new_ctx, entry);</div><div class='del'>-				}</div><div class='del'>-				entry = next;</div><div class='del'>-			} while ((entry != head) &amp;&amp; (entry-&gt;vaddr &lt; end));</div><div class='del'>-			sun4c_set_context(octx);</div><div class='del'>-		}</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_flush_cache_page(struct vm_area_struct *vma, unsigned long page)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-	int new_ctx = mm-&gt;context;</div><div class='del'>-</div><div class='del'>-	/* Sun4c has no separate I/D caches so cannot optimize for non</div><div class='del'>-	 * text page flushes.</div><div class='del'>-	 */</div><div class='del'>-	if (new_ctx != NO_CONTEXT) {</div><div class='del'>-		int octx = sun4c_get_context();</div><div class='del'>-		unsigned long flags;</div><div class='del'>-</div><div class='del'>-		flush_user_windows();</div><div class='del'>-		local_irq_save(flags);</div><div class='del'>-		sun4c_set_context(new_ctx);</div><div class='del'>-		sun4c_flush_page(page);</div><div class='del'>-		sun4c_set_context(octx);</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_flush_page_to_ram(unsigned long page)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	sun4c_flush_page(page);</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Sun4c cache is unified, both instructions and data live there, so</div><div class='del'>- * no need to flush the on-stack instructions for new signal handlers.</div><div class='del'>- */</div><div class='del'>-static void sun4c_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* TLB flushing on the sun4c.  These routines count on the cache</div><div class='del'>- * flushing code to flush the user register windows so that we need</div><div class='del'>- * not do so when we get here.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void sun4c_flush_tlb_all(void)</div><div class='del'>-{</div><div class='del'>-	struct sun4c_mmu_entry *this_entry, *next_entry;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int savectx, ctx;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	this_entry = sun4c_kernel_ring.ringhd.next;</div><div class='del'>-	savectx = sun4c_get_context();</div><div class='del'>-	flush_user_windows();</div><div class='del'>-	while (sun4c_kernel_ring.num_entries) {</div><div class='del'>-		next_entry = this_entry-&gt;next;</div><div class='del'>-		sun4c_flush_segment(this_entry-&gt;vaddr);</div><div class='del'>-		for (ctx = 0; ctx &lt; num_contexts; ctx++) {</div><div class='del'>-			sun4c_set_context(ctx);</div><div class='del'>-			sun4c_put_segmap(this_entry-&gt;vaddr, invalid_segment);</div><div class='del'>-		}</div><div class='del'>-		free_kernel_entry(this_entry, &amp;sun4c_kernel_ring);</div><div class='del'>-		this_entry = next_entry;</div><div class='del'>-	}</div><div class='del'>-	sun4c_set_context(savectx);</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_flush_tlb_mm(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	int new_ctx = mm-&gt;context;</div><div class='del'>-</div><div class='del'>-	if (new_ctx != NO_CONTEXT) {</div><div class='del'>-		struct sun4c_mmu_entry *head = &amp;sun4c_context_ring[new_ctx].ringhd;</div><div class='del'>-		unsigned long flags;</div><div class='del'>-</div><div class='del'>-		local_irq_save(flags);</div><div class='del'>-		if (head-&gt;next != head) {</div><div class='del'>-			struct sun4c_mmu_entry *entry = head-&gt;next;</div><div class='del'>-			int savectx = sun4c_get_context();</div><div class='del'>-</div><div class='del'>-			sun4c_set_context(new_ctx);</div><div class='del'>-			sun4c_flush_context();</div><div class='del'>-			do {</div><div class='del'>-				struct sun4c_mmu_entry *next = entry-&gt;next;</div><div class='del'>-</div><div class='del'>-				sun4c_user_unmap(entry);</div><div class='del'>-				free_user_entry(new_ctx, entry);</div><div class='del'>-</div><div class='del'>-				entry = next;</div><div class='del'>-			} while (entry != head);</div><div class='del'>-			sun4c_set_context(savectx);</div><div class='del'>-		}</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-	int new_ctx = mm-&gt;context;</div><div class='del'>-</div><div class='del'>-	if (new_ctx != NO_CONTEXT) {</div><div class='del'>-		struct sun4c_mmu_entry *head = &amp;sun4c_context_ring[new_ctx].ringhd;</div><div class='del'>-		struct sun4c_mmu_entry *entry;</div><div class='del'>-		unsigned long flags;</div><div class='del'>-</div><div class='del'>-		local_irq_save(flags);</div><div class='del'>-		/* See commentary in sun4c_flush_cache_range(). */</div><div class='del'>-		for (entry = head-&gt;next;</div><div class='del'>-		     (entry != head) &amp;&amp; ((entry-&gt;vaddr+SUN4C_REAL_PGDIR_SIZE) &lt; start);</div><div class='del'>-		     entry = entry-&gt;next)</div><div class='del'>-			;</div><div class='del'>-</div><div class='del'>-		if ((entry != head) &amp;&amp; (entry-&gt;vaddr &lt; end)) {</div><div class='del'>-			int octx = sun4c_get_context();</div><div class='del'>-</div><div class='del'>-			sun4c_set_context(new_ctx);</div><div class='del'>-			do {</div><div class='del'>-				struct sun4c_mmu_entry *next = entry-&gt;next;</div><div class='del'>-</div><div class='del'>-				sun4c_flush_segment(entry-&gt;vaddr);</div><div class='del'>-				sun4c_user_unmap(entry);</div><div class='del'>-				free_user_entry(new_ctx, entry);</div><div class='del'>-</div><div class='del'>-				entry = next;</div><div class='del'>-			} while ((entry != head) &amp;&amp; (entry-&gt;vaddr &lt; end));</div><div class='del'>-			sun4c_set_context(octx);</div><div class='del'>-		}</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)</div><div class='del'>-{</div><div class='del'>-	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-	int new_ctx = mm-&gt;context;</div><div class='del'>-</div><div class='del'>-	if (new_ctx != NO_CONTEXT) {</div><div class='del'>-		int savectx = sun4c_get_context();</div><div class='del'>-		unsigned long flags;</div><div class='del'>-</div><div class='del'>-		local_irq_save(flags);</div><div class='del'>-		sun4c_set_context(new_ctx);</div><div class='del'>-		page &amp;= PAGE_MASK;</div><div class='del'>-		sun4c_flush_page(page);</div><div class='del'>-		sun4c_put_pte(page, 0);</div><div class='del'>-		sun4c_set_context(savectx);</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void sun4c_mapioaddr(unsigned long physaddr, unsigned long virt_addr)</div><div class='del'>-{</div><div class='del'>-	unsigned long page_entry, pg_iobits;</div><div class='del'>-</div><div class='del'>-	pg_iobits = _SUN4C_PAGE_PRESENT | _SUN4C_READABLE | _SUN4C_WRITEABLE |</div><div class='del'>-		    _SUN4C_PAGE_IO | _SUN4C_PAGE_NOCACHE;</div><div class='del'>-</div><div class='del'>-	page_entry = ((physaddr &gt;&gt; PAGE_SHIFT) &amp; SUN4C_PFN_MASK);</div><div class='del'>-	page_entry |= ((pg_iobits | _SUN4C_PAGE_PRIV) &amp; ~(_SUN4C_PAGE_PRESENT));</div><div class='del'>-	sun4c_put_pte(virt_addr, page_entry);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_mapiorange(unsigned int bus, unsigned long xpa,</div><div class='del'>-    unsigned long xva, unsigned int len)</div><div class='del'>-{</div><div class='del'>-	while (len != 0) {</div><div class='del'>-		len -= PAGE_SIZE;</div><div class='del'>-		sun4c_mapioaddr(xpa, xva);</div><div class='del'>-		xva += PAGE_SIZE;</div><div class='del'>-		xpa += PAGE_SIZE;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_unmapiorange(unsigned long virt_addr, unsigned int len)</div><div class='del'>-{</div><div class='del'>-	while (len != 0) {</div><div class='del'>-		len -= PAGE_SIZE;</div><div class='del'>-		sun4c_put_pte(virt_addr, 0);</div><div class='del'>-		virt_addr += PAGE_SIZE;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_alloc_context(struct mm_struct *old_mm, struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	struct ctx_list *ctxp;</div><div class='del'>-</div><div class='del'>-	ctxp = ctx_free.next;</div><div class='del'>-	if (ctxp != &amp;ctx_free) {</div><div class='del'>-		remove_from_ctx_list(ctxp);</div><div class='del'>-		add_to_used_ctxlist(ctxp);</div><div class='del'>-		mm-&gt;context = ctxp-&gt;ctx_number;</div><div class='del'>-		ctxp-&gt;ctx_mm = mm;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	ctxp = ctx_used.next;</div><div class='del'>-	if (ctxp-&gt;ctx_mm == old_mm)</div><div class='del'>-		ctxp = ctxp-&gt;next;</div><div class='del'>-	remove_from_ctx_list(ctxp);</div><div class='del'>-	add_to_used_ctxlist(ctxp);</div><div class='del'>-	ctxp-&gt;ctx_mm-&gt;context = NO_CONTEXT;</div><div class='del'>-	ctxp-&gt;ctx_mm = mm;</div><div class='del'>-	mm-&gt;context = ctxp-&gt;ctx_number;</div><div class='del'>-	sun4c_demap_context(&amp;sun4c_context_ring[ctxp-&gt;ctx_number],</div><div class='del'>-			       ctxp-&gt;ctx_number);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Switch the current MM context. */</div><div class='del'>-static void sun4c_switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk, int cpu)</div><div class='del'>-{</div><div class='del'>-	struct ctx_list *ctx;</div><div class='del'>-	int dirty = 0;</div><div class='del'>-</div><div class='del'>-	if (mm-&gt;context == NO_CONTEXT) {</div><div class='del'>-		dirty = 1;</div><div class='del'>-		sun4c_alloc_context(old_mm, mm);</div><div class='del'>-	} else {</div><div class='del'>-		/* Update the LRU ring of contexts. */</div><div class='del'>-		ctx = ctx_list_pool + mm-&gt;context;</div><div class='del'>-		remove_from_ctx_list(ctx);</div><div class='del'>-		add_to_used_ctxlist(ctx);</div><div class='del'>-	}</div><div class='del'>-	if (dirty || old_mm != mm)</div><div class='del'>-		sun4c_set_context(mm-&gt;context);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_destroy_context(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	struct ctx_list *ctx_old;</div><div class='del'>-</div><div class='del'>-	if (mm-&gt;context != NO_CONTEXT) {</div><div class='del'>-		sun4c_demap_context(&amp;sun4c_context_ring[mm-&gt;context], mm-&gt;context);</div><div class='del'>-		ctx_old = ctx_list_pool + mm-&gt;context;</div><div class='del'>-		remove_from_ctx_list(ctx_old);</div><div class='del'>-		add_to_free_ctxlist(ctx_old);</div><div class='del'>-		mm-&gt;context = NO_CONTEXT;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_mmu_info(struct seq_file *m)</div><div class='del'>-{</div><div class='del'>-	int used_user_entries, i;</div><div class='del'>-</div><div class='del'>-	used_user_entries = 0;</div><div class='del'>-	for (i = 0; i &lt; num_contexts; i++)</div><div class='del'>-		used_user_entries += sun4c_context_ring[i].num_entries;</div><div class='del'>-</div><div class='del'>-	seq_printf(m, </div><div class='del'>-		   "vacsize\t\t: %d bytes\n"</div><div class='del'>-		   "vachwflush\t: %s\n"</div><div class='del'>-		   "vaclinesize\t: %d bytes\n"</div><div class='del'>-		   "mmuctxs\t\t: %d\n"</div><div class='del'>-		   "mmupsegs\t: %d\n"</div><div class='del'>-		   "kernelpsegs\t: %d\n"</div><div class='del'>-		   "kfreepsegs\t: %d\n"</div><div class='del'>-		   "usedpsegs\t: %d\n"</div><div class='del'>-		   "ufreepsegs\t: %d\n"</div><div class='del'>-		   "user_taken\t: %d\n"</div><div class='del'>-		   "max_taken\t: %d\n",</div><div class='del'>-		   sun4c_vacinfo.num_bytes,</div><div class='del'>-		   (sun4c_vacinfo.do_hwflushes ? "yes" : "no"),</div><div class='del'>-		   sun4c_vacinfo.linesize,</div><div class='del'>-		   num_contexts,</div><div class='del'>-		   (invalid_segment + 1),</div><div class='del'>-		   sun4c_kernel_ring.num_entries,</div><div class='del'>-		   sun4c_kfree_ring.num_entries,</div><div class='del'>-		   used_user_entries,</div><div class='del'>-		   sun4c_ufree_ring.num_entries,</div><div class='del'>-		   sun4c_user_taken_entries,</div><div class='del'>-		   max_user_taken_entries);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Nothing below here should touch the mmu hardware nor the mmu_entry</div><div class='del'>- * data structures.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* First the functions which the mid-level code uses to directly</div><div class='del'>- * manipulate the software page tables.  Some defines since we are</div><div class='del'>- * emulating the i386 page directory layout.</div><div class='del'>- */</div><div class='del'>-#define PGD_PRESENT  0x001</div><div class='del'>-#define PGD_RW       0x002</div><div class='del'>-#define PGD_USER     0x004</div><div class='del'>-#define PGD_ACCESSED 0x020</div><div class='del'>-#define PGD_DIRTY    0x040</div><div class='del'>-#define PGD_TABLE    (PGD_PRESENT | PGD_RW | PGD_USER | PGD_ACCESSED | PGD_DIRTY)</div><div class='del'>-</div><div class='del'>-static void sun4c_set_pte(pte_t *ptep, pte_t pte)</div><div class='del'>-{</div><div class='del'>-	*ptep = pte;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_pgd_set(pgd_t * pgdp, pmd_t * pmdp)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_pmd_set(pmd_t * pmdp, pte_t * ptep)</div><div class='del'>-{</div><div class='del'>-	pmdp-&gt;pmdv[0] = PGD_TABLE | (unsigned long) ptep;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_pmd_populate(pmd_t * pmdp, struct page * ptep)</div><div class='del'>-{</div><div class='del'>-	if (page_address(ptep) == NULL) BUG();	/* No highmem on sun4c */</div><div class='del'>-	pmdp-&gt;pmdv[0] = PGD_TABLE | (unsigned long) page_address(ptep);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sun4c_pte_present(pte_t pte)</div><div class='del'>-{</div><div class='del'>-	return ((pte_val(pte) &amp; (_SUN4C_PAGE_PRESENT | _SUN4C_PAGE_PRIV)) != 0);</div><div class='del'>-}</div><div class='del'>-static void sun4c_pte_clear(pte_t *ptep)	{ *ptep = __pte(0); }</div><div class='del'>-</div><div class='del'>-static int sun4c_pmd_bad(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return (((pmd_val(pmd) &amp; ~PAGE_MASK) != PGD_TABLE) ||</div><div class='del'>-		(!virt_addr_valid(pmd_val(pmd))));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sun4c_pmd_present(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return ((pmd_val(pmd) &amp; PGD_PRESENT) != 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#if 0 /* if PMD takes one word */</div><div class='del'>-static void sun4c_pmd_clear(pmd_t *pmdp)	{ *pmdp = __pmd(0); }</div><div class='del'>-#else /* if pmd_t is a longish aggregate */</div><div class='del'>-static void sun4c_pmd_clear(pmd_t *pmdp) {</div><div class='del'>-	memset((void *)pmdp, 0, sizeof(pmd_t));</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int sun4c_pgd_none(pgd_t pgd)		{ return 0; }</div><div class='del'>-static int sun4c_pgd_bad(pgd_t pgd)		{ return 0; }</div><div class='del'>-static int sun4c_pgd_present(pgd_t pgd)	        { return 1; }</div><div class='del'>-static void sun4c_pgd_clear(pgd_t * pgdp)	{ }</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The following only work if pte_present() is true.</div><div class='del'>- * Undefined behaviour if not..</div><div class='del'>- */</div><div class='del'>-static pte_t sun4c_pte_mkwrite(pte_t pte)</div><div class='del'>-{</div><div class='del'>-	pte = __pte(pte_val(pte) | _SUN4C_PAGE_WRITE);</div><div class='del'>-	if (pte_val(pte) &amp; _SUN4C_PAGE_MODIFIED)</div><div class='del'>-		pte = __pte(pte_val(pte) | _SUN4C_PAGE_SILENT_WRITE);</div><div class='del'>-	return pte;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static pte_t sun4c_pte_mkdirty(pte_t pte)</div><div class='del'>-{</div><div class='del'>-	pte = __pte(pte_val(pte) | _SUN4C_PAGE_MODIFIED);</div><div class='del'>-	if (pte_val(pte) &amp; _SUN4C_PAGE_WRITE)</div><div class='del'>-		pte = __pte(pte_val(pte) | _SUN4C_PAGE_SILENT_WRITE);</div><div class='del'>-	return pte;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static pte_t sun4c_pte_mkyoung(pte_t pte)</div><div class='del'>-{</div><div class='del'>-	pte = __pte(pte_val(pte) | _SUN4C_PAGE_ACCESSED);</div><div class='del'>-	if (pte_val(pte) &amp; _SUN4C_PAGE_READ)</div><div class='del'>-		pte = __pte(pte_val(pte) | _SUN4C_PAGE_SILENT_READ);</div><div class='del'>-	return pte;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Conversion functions: convert a page and protection to a page entry,</div><div class='del'>- * and a page entry and page directory to the page they refer to.</div><div class='del'>- */</div><div class='del'>-static pte_t sun4c_mk_pte(struct page *page, pgprot_t pgprot)</div><div class='del'>-{</div><div class='del'>-	return __pte(page_to_pfn(page) | pgprot_val(pgprot));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static pte_t sun4c_mk_pte_phys(unsigned long phys_page, pgprot_t pgprot)</div><div class='del'>-{</div><div class='del'>-	return __pte((phys_page &gt;&gt; PAGE_SHIFT) | pgprot_val(pgprot));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static pte_t sun4c_mk_pte_io(unsigned long page, pgprot_t pgprot, int space)</div><div class='del'>-{</div><div class='del'>-	return __pte(((page - PAGE_OFFSET) &gt;&gt; PAGE_SHIFT) | pgprot_val(pgprot));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long sun4c_pte_pfn(pte_t pte)</div><div class='del'>-{</div><div class='del'>-	return pte_val(pte) &amp; SUN4C_PFN_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static pte_t sun4c_pgoff_to_pte(unsigned long pgoff)</div><div class='del'>-{</div><div class='del'>-	return __pte(pgoff | _SUN4C_PAGE_FILE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long sun4c_pte_to_pgoff(pte_t pte)</div><div class='del'>-{</div><div class='del'>-	return pte_val(pte) &amp; ((1UL &lt;&lt; PTE_FILE_MAX_BITS) - 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static inline unsigned long sun4c_pmd_page_v(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return (pmd_val(pmd) &amp; PAGE_MASK);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct page *sun4c_pmd_page(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return virt_to_page(sun4c_pmd_page_v(pmd));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long sun4c_pgd_page(pgd_t pgd) { return 0; }</div><div class='del'>-</div><div class='del'>-/* to find an entry in a page-table-directory */</div><div class='del'>-static inline pgd_t *sun4c_pgd_offset(struct mm_struct * mm, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	return mm-&gt;pgd + (address &gt;&gt; SUN4C_PGDIR_SHIFT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Find an entry in the second-level page table.. */</div><div class='del'>-static pmd_t *sun4c_pmd_offset(pgd_t * dir, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	return (pmd_t *) dir;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Find an entry in the third-level page table.. */ </div><div class='del'>-pte_t *sun4c_pte_offset_kernel(pmd_t * dir, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	return (pte_t *) sun4c_pmd_page_v(*dir) +</div><div class='del'>-			((address &gt;&gt; PAGE_SHIFT) &amp; (SUN4C_PTRS_PER_PTE - 1));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long sun4c_swp_type(swp_entry_t entry)</div><div class='del'>-{</div><div class='del'>-	return (entry.val &amp; SUN4C_SWP_TYPE_MASK);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long sun4c_swp_offset(swp_entry_t entry)</div><div class='del'>-{</div><div class='del'>-	return (entry.val &gt;&gt; SUN4C_SWP_OFF_SHIFT) &amp; SUN4C_SWP_OFF_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static swp_entry_t sun4c_swp_entry(unsigned long type, unsigned long offset)</div><div class='del'>-{</div><div class='del'>-	return (swp_entry_t) {</div><div class='del'>-		  (offset &amp; SUN4C_SWP_OFF_MASK) &lt;&lt; SUN4C_SWP_OFF_SHIFT</div><div class='del'>-		| (type &amp; SUN4C_SWP_TYPE_MASK) };</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_free_pte_slow(pte_t *pte)</div><div class='del'>-{</div><div class='del'>-	free_page((unsigned long)pte);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_free_pgd_slow(pgd_t *pgd)</div><div class='del'>-{</div><div class='del'>-	free_page((unsigned long)pgd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static pgd_t *sun4c_get_pgd_fast(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long *ret;</div><div class='del'>-</div><div class='del'>-	if ((ret = pgd_quicklist) != NULL) {</div><div class='del'>-		pgd_quicklist = (unsigned long *)(*ret);</div><div class='del'>-		ret[0] = ret[1];</div><div class='del'>-		pgtable_cache_size--;</div><div class='del'>-	} else {</div><div class='del'>-		pgd_t *init;</div><div class='del'>-		</div><div class='del'>-		ret = (unsigned long *)__get_free_page(GFP_KERNEL);</div><div class='del'>-		memset (ret, 0, (KERNBASE / SUN4C_PGDIR_SIZE) * sizeof(pgd_t));</div><div class='del'>-		init = sun4c_pgd_offset(&amp;init_mm, 0);</div><div class='del'>-		memcpy (((pgd_t *)ret) + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD,</div><div class='del'>-			(PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));</div><div class='del'>-	}</div><div class='del'>-	return (pgd_t *)ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_free_pgd_fast(pgd_t *pgd)</div><div class='del'>-{</div><div class='del'>-	*(unsigned long *)pgd = (unsigned long) pgd_quicklist;</div><div class='del'>-	pgd_quicklist = (unsigned long *) pgd;</div><div class='del'>-	pgtable_cache_size++;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static inline pte_t *</div><div class='del'>-sun4c_pte_alloc_one_fast(struct mm_struct *mm, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	unsigned long *ret;</div><div class='del'>-</div><div class='del'>-	if ((ret = (unsigned long *)pte_quicklist) != NULL) {</div><div class='del'>-		pte_quicklist = (unsigned long *)(*ret);</div><div class='del'>-		ret[0] = ret[1];</div><div class='del'>-		pgtable_cache_size--;</div><div class='del'>-	}</div><div class='del'>-	return (pte_t *)ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static pte_t *sun4c_pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	pte_t *pte;</div><div class='del'>-</div><div class='del'>-	if ((pte = sun4c_pte_alloc_one_fast(mm, address)) != NULL)</div><div class='del'>-		return pte;</div><div class='del'>-</div><div class='del'>-	pte = (pte_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);</div><div class='del'>-	return pte;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static pgtable_t sun4c_pte_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	pte_t *pte;</div><div class='del'>-	struct page *page;</div><div class='del'>-</div><div class='del'>-	pte = sun4c_pte_alloc_one_kernel(mm, address);</div><div class='del'>-	if (pte == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-	page = virt_to_page(pte);</div><div class='del'>-	pgtable_page_ctor(page);</div><div class='del'>-	return page;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void sun4c_free_pte_fast(pte_t *pte)</div><div class='del'>-{</div><div class='del'>-	*(unsigned long *)pte = (unsigned long) pte_quicklist;</div><div class='del'>-	pte_quicklist = (unsigned long *) pte;</div><div class='del'>-	pgtable_cache_size++;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_pte_free(pgtable_t pte)</div><div class='del'>-{</div><div class='del'>-	pgtable_page_dtor(pte);</div><div class='del'>-	sun4c_free_pte_fast(page_address(pte));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * allocating and freeing a pmd is trivial: the 1-entry pmd is</div><div class='del'>- * inside the pgd, so has no extra memory associated with it.</div><div class='del'>- */</div><div class='del'>-static pmd_t *sun4c_pmd_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	BUG();</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sun4c_free_pmd_fast(pmd_t * pmd) { }</div><div class='del'>-</div><div class='del'>-static void sun4c_check_pgt_cache(int low, int high)</div><div class='del'>-{</div><div class='del'>-	if (pgtable_cache_size &gt; high) {</div><div class='del'>-		do {</div><div class='del'>-			if (pgd_quicklist)</div><div class='del'>-				sun4c_free_pgd_slow(sun4c_get_pgd_fast());</div><div class='del'>-			if (pte_quicklist)</div><div class='del'>-				sun4c_free_pte_slow(sun4c_pte_alloc_one_fast(NULL, 0));</div><div class='del'>-		} while (pgtable_cache_size &gt; low);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* An experiment, turn off by default for now... -DaveM */</div><div class='del'>-#define SUN4C_PRELOAD_PSEG</div><div class='del'>-</div><div class='del'>-void sun4c_update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int pseg;</div><div class='del'>-</div><div class='del'>-	if (vma-&gt;vm_mm-&gt;context == NO_CONTEXT)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	address &amp;= PAGE_MASK;</div><div class='del'>-	if ((pseg = sun4c_get_segmap(address)) == invalid_segment) {</div><div class='del'>-		struct sun4c_mmu_entry *entry = sun4c_user_strategy();</div><div class='del'>-		struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-		unsigned long start, end;</div><div class='del'>-</div><div class='del'>-		entry-&gt;vaddr = start = (address &amp; SUN4C_REAL_PGDIR_MASK);</div><div class='del'>-		entry-&gt;ctx = mm-&gt;context;</div><div class='del'>-		add_ring_ordered(sun4c_context_ring + mm-&gt;context, entry);</div><div class='del'>-		sun4c_put_segmap(entry-&gt;vaddr, entry-&gt;pseg);</div><div class='del'>-		end = start + SUN4C_REAL_PGDIR_SIZE;</div><div class='del'>-		while (start &lt; end) {</div><div class='del'>-#ifdef SUN4C_PRELOAD_PSEG</div><div class='del'>-			pgd_t *pgdp = sun4c_pgd_offset(mm, start);</div><div class='del'>-			pte_t *ptep;</div><div class='del'>-</div><div class='del'>-			if (!pgdp)</div><div class='del'>-				goto no_mapping;</div><div class='del'>-			ptep = sun4c_pte_offset_kernel((pmd_t *) pgdp, start);</div><div class='del'>-			if (!ptep || !(pte_val(*ptep) &amp; _SUN4C_PAGE_PRESENT))</div><div class='del'>-				goto no_mapping;</div><div class='del'>-			sun4c_put_pte(start, pte_val(*ptep));</div><div class='del'>-			goto next;</div><div class='del'>-</div><div class='del'>-		no_mapping:</div><div class='del'>-#endif</div><div class='del'>-			sun4c_put_pte(start, 0);</div><div class='del'>-#ifdef SUN4C_PRELOAD_PSEG</div><div class='del'>-		next:</div><div class='del'>-#endif</div><div class='del'>-			start += PAGE_SIZE;</div><div class='del'>-		}</div><div class='del'>-#ifndef SUN4C_PRELOAD_PSEG</div><div class='del'>-		sun4c_put_pte(address, pte_val(*ptep));</div><div class='del'>-#endif</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-		return;</div><div class='del'>-	} else {</div><div class='del'>-		struct sun4c_mmu_entry *entry = &amp;mmu_entry_pool[pseg];</div><div class='del'>-</div><div class='del'>-		remove_lru(entry);</div><div class='del'>-		add_lru(entry);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sun4c_put_pte(address, pte_val(*ptep));</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-extern void sparc_context_init(int);</div><div class='del'>-extern unsigned long bootmem_init(unsigned long *pages_avail);</div><div class='del'>-extern unsigned long last_valid_pfn;</div><div class='del'>-</div><div class='del'>-void __init sun4c_paging_init(void)</div><div class='del'>-{</div><div class='del'>-	int i, cnt;</div><div class='del'>-	unsigned long kernel_end, vaddr;</div><div class='del'>-	extern struct resource sparc_iomap;</div><div class='del'>-	unsigned long end_pfn, pages_avail;</div><div class='del'>-</div><div class='del'>-	kernel_end = (unsigned long) &amp;_end;</div><div class='del'>-	kernel_end = SUN4C_REAL_PGDIR_ALIGN(kernel_end);</div><div class='del'>-</div><div class='del'>-	pages_avail = 0;</div><div class='del'>-	last_valid_pfn = bootmem_init(&amp;pages_avail);</div><div class='del'>-	end_pfn = last_valid_pfn;</div><div class='del'>-</div><div class='del'>-	sun4c_probe_mmu();</div><div class='del'>-	invalid_segment = (num_segmaps - 1);</div><div class='del'>-	sun4c_init_mmu_entry_pool();</div><div class='del'>-	sun4c_init_rings();</div><div class='del'>-	sun4c_init_map_kernelprom(kernel_end);</div><div class='del'>-	sun4c_init_clean_mmu(kernel_end);</div><div class='del'>-	sun4c_init_fill_kernel_ring(SUN4C_KERNEL_BUCKETS);</div><div class='del'>-	sun4c_init_lock_area(sparc_iomap.start, IOBASE_END);</div><div class='del'>-	sun4c_init_lock_area(DVMA_VADDR, DVMA_END);</div><div class='del'>-	sun4c_init_lock_areas();</div><div class='del'>-	sun4c_init_fill_user_ring();</div><div class='del'>-</div><div class='del'>-	sun4c_set_context(0);</div><div class='del'>-	memset(swapper_pg_dir, 0, PAGE_SIZE);</div><div class='del'>-	memset(pg0, 0, PAGE_SIZE);</div><div class='del'>-	memset(pg1, 0, PAGE_SIZE);</div><div class='del'>-	memset(pg2, 0, PAGE_SIZE);</div><div class='del'>-	memset(pg3, 0, PAGE_SIZE);</div><div class='del'>-</div><div class='del'>-	/* Save work later. */</div><div class='del'>-	vaddr = VMALLOC_START;</div><div class='del'>-	swapper_pg_dir[vaddr&gt;&gt;SUN4C_PGDIR_SHIFT] = __pgd(PGD_TABLE | (unsigned long) pg0);</div><div class='del'>-	vaddr += SUN4C_PGDIR_SIZE;</div><div class='del'>-	swapper_pg_dir[vaddr&gt;&gt;SUN4C_PGDIR_SHIFT] = __pgd(PGD_TABLE | (unsigned long) pg1);</div><div class='del'>-	vaddr += SUN4C_PGDIR_SIZE;</div><div class='del'>-	swapper_pg_dir[vaddr&gt;&gt;SUN4C_PGDIR_SHIFT] = __pgd(PGD_TABLE | (unsigned long) pg2);</div><div class='del'>-	vaddr += SUN4C_PGDIR_SIZE;</div><div class='del'>-	swapper_pg_dir[vaddr&gt;&gt;SUN4C_PGDIR_SHIFT] = __pgd(PGD_TABLE | (unsigned long) pg3);</div><div class='del'>-	sun4c_init_ss2_cache_bug();</div><div class='del'>-	sparc_context_init(num_contexts);</div><div class='del'>-</div><div class='del'>-	{</div><div class='del'>-		unsigned long zones_size[MAX_NR_ZONES];</div><div class='del'>-		unsigned long zholes_size[MAX_NR_ZONES];</div><div class='del'>-		unsigned long npages;</div><div class='del'>-		int znum;</div><div class='del'>-</div><div class='del'>-		for (znum = 0; znum &lt; MAX_NR_ZONES; znum++)</div><div class='del'>-			zones_size[znum] = zholes_size[znum] = 0;</div><div class='del'>-</div><div class='del'>-		npages = max_low_pfn - pfn_base;</div><div class='del'>-</div><div class='del'>-		zones_size[ZONE_DMA] = npages;</div><div class='del'>-		zholes_size[ZONE_DMA] = npages - pages_avail;</div><div class='del'>-</div><div class='del'>-		npages = highend_pfn - max_low_pfn;</div><div class='del'>-		zones_size[ZONE_HIGHMEM] = npages;</div><div class='del'>-		zholes_size[ZONE_HIGHMEM] = npages - calc_highpages();</div><div class='del'>-</div><div class='del'>-		free_area_init_node(0, zones_size, pfn_base, zholes_size);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cnt = 0;</div><div class='del'>-	for (i = 0; i &lt; num_segmaps; i++)</div><div class='del'>-		if (mmu_entry_pool[i].locked)</div><div class='del'>-			cnt++;</div><div class='del'>-</div><div class='del'>-	max_user_taken_entries = num_segmaps - cnt - 40 - 1;</div><div class='del'>-</div><div class='del'>-	printk("SUN4C: %d mmu entries for the kernel\n", cnt);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static pgprot_t sun4c_pgprot_noncached(pgprot_t prot)</div><div class='del'>-{</div><div class='del'>-	prot |= __pgprot(_SUN4C_PAGE_IO | _SUN4C_PAGE_NOCACHE);</div><div class='del'>-</div><div class='del'>-	return prot;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Load up routines and constants for sun4c mmu */</div><div class='del'>-void __init ld_mmu_sun4c(void)</div><div class='del'>-{</div><div class='del'>-	extern void ___xchg32_sun4c(void);</div><div class='del'>-	</div><div class='del'>-	printk("Loading sun4c MMU routines\n");</div><div class='del'>-</div><div class='del'>-	/* First the constants */</div><div class='del'>-	BTFIXUPSET_SIMM13(pgdir_shift, SUN4C_PGDIR_SHIFT);</div><div class='del'>-	BTFIXUPSET_SETHI(pgdir_size, SUN4C_PGDIR_SIZE);</div><div class='del'>-	BTFIXUPSET_SETHI(pgdir_mask, SUN4C_PGDIR_MASK);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_SIMM13(ptrs_per_pmd, SUN4C_PTRS_PER_PMD);</div><div class='del'>-	BTFIXUPSET_SIMM13(ptrs_per_pgd, SUN4C_PTRS_PER_PGD);</div><div class='del'>-	BTFIXUPSET_SIMM13(user_ptrs_per_pgd, KERNBASE / SUN4C_PGDIR_SIZE);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_INT(page_none, pgprot_val(SUN4C_PAGE_NONE));</div><div class='del'>-	PAGE_SHARED = pgprot_val(SUN4C_PAGE_SHARED);</div><div class='del'>-	BTFIXUPSET_INT(page_copy, pgprot_val(SUN4C_PAGE_COPY));</div><div class='del'>-	BTFIXUPSET_INT(page_readonly, pgprot_val(SUN4C_PAGE_READONLY));</div><div class='del'>-	BTFIXUPSET_INT(page_kernel, pgprot_val(SUN4C_PAGE_KERNEL));</div><div class='del'>-	page_kernel = pgprot_val(SUN4C_PAGE_KERNEL);</div><div class='del'>-</div><div class='del'>-	/* Functions */</div><div class='del'>-	BTFIXUPSET_CALL(pgprot_noncached, sun4c_pgprot_noncached, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(___xchg32, ___xchg32_sun4c, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(do_check_pgt_cache, sun4c_check_pgt_cache, BTFIXUPCALL_NORM);</div><div class='del'>-	</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_all, sun4c_flush_cache_all, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	if (sun4c_vacinfo.do_hwflushes) {</div><div class='del'>-		BTFIXUPSET_CALL(sun4c_flush_page, sun4c_flush_page_hw, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(sun4c_flush_segment, sun4c_flush_segment_hw, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(sun4c_flush_context, sun4c_flush_context_hw, BTFIXUPCALL_NORM);</div><div class='del'>-	} else {</div><div class='del'>-		BTFIXUPSET_CALL(sun4c_flush_page, sun4c_flush_page_sw, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(sun4c_flush_segment, sun4c_flush_segment_sw, BTFIXUPCALL_NORM);</div><div class='del'>-		BTFIXUPSET_CALL(sun4c_flush_context, sun4c_flush_context_sw, BTFIXUPCALL_NORM);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_mm, sun4c_flush_tlb_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_mm, sun4c_flush_cache_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(destroy_context, sun4c_destroy_context, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(switch_mm, sun4c_switch_mm, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_page, sun4c_flush_cache_page, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_page, sun4c_flush_tlb_page, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_range, sun4c_flush_tlb_range, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_cache_range, sun4c_flush_cache_range, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(__flush_page_to_ram, sun4c_flush_page_to_ram, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(flush_tlb_all, sun4c_flush_tlb_all, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(flush_sig_insns, sun4c_flush_sig_insns, BTFIXUPCALL_NOP);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(set_pte, sun4c_set_pte, BTFIXUPCALL_STO1O0);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(pte_pfn, sun4c_pte_pfn, BTFIXUPCALL_NORM);</div><div class='del'>-#if 0 /* PAGE_SHIFT &lt;= 12 */ /* Eek. Investigate. XXX */</div><div class='del'>-	BTFIXUPSET_CALL(pmd_page, sun4c_pmd_page, BTFIXUPCALL_ANDNINT(PAGE_SIZE - 1));</div><div class='del'>-#else</div><div class='del'>-	BTFIXUPSET_CALL(pmd_page, sun4c_pmd_page, BTFIXUPCALL_NORM);</div><div class='del'>-#endif</div><div class='del'>-	BTFIXUPSET_CALL(pmd_set, sun4c_pmd_set, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_populate, sun4c_pmd_populate, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(pte_present, sun4c_pte_present, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pte_clear, sun4c_pte_clear, BTFIXUPCALL_STG0O0);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(pmd_bad, sun4c_pmd_bad, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_present, sun4c_pmd_present, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_clear, sun4c_pmd_clear, BTFIXUPCALL_STG0O0);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(pgd_none, sun4c_pgd_none, BTFIXUPCALL_RETINT(0));</div><div class='del'>-	BTFIXUPSET_CALL(pgd_bad, sun4c_pgd_bad, BTFIXUPCALL_RETINT(0));</div><div class='del'>-	BTFIXUPSET_CALL(pgd_present, sun4c_pgd_present, BTFIXUPCALL_RETINT(1));</div><div class='del'>-	BTFIXUPSET_CALL(pgd_clear, sun4c_pgd_clear, BTFIXUPCALL_NOP);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(mk_pte, sun4c_mk_pte, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mk_pte_phys, sun4c_mk_pte_phys, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mk_pte_io, sun4c_mk_pte_io, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_INT(pte_modify_mask, _SUN4C_PAGE_CHG_MASK);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_offset, sun4c_pmd_offset, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pte_offset_kernel, sun4c_pte_offset_kernel, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(free_pte_fast, sun4c_free_pte_fast, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pte_free, sun4c_pte_free, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pte_alloc_one_kernel, sun4c_pte_alloc_one_kernel, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pte_alloc_one, sun4c_pte_alloc_one, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(free_pmd_fast, sun4c_free_pmd_fast, BTFIXUPCALL_NOP);</div><div class='del'>-	BTFIXUPSET_CALL(pmd_alloc_one, sun4c_pmd_alloc_one, BTFIXUPCALL_RETO0);</div><div class='del'>-	BTFIXUPSET_CALL(free_pgd_fast, sun4c_free_pgd_fast, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(get_pgd_fast, sun4c_get_pgd_fast, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_HALF(pte_writei, _SUN4C_PAGE_WRITE);</div><div class='del'>-	BTFIXUPSET_HALF(pte_dirtyi, _SUN4C_PAGE_MODIFIED);</div><div class='del'>-	BTFIXUPSET_HALF(pte_youngi, _SUN4C_PAGE_ACCESSED);</div><div class='del'>-	BTFIXUPSET_HALF(pte_filei, _SUN4C_PAGE_FILE);</div><div class='del'>-	BTFIXUPSET_HALF(pte_wrprotecti, _SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE);</div><div class='del'>-	BTFIXUPSET_HALF(pte_mkcleani, _SUN4C_PAGE_MODIFIED|_SUN4C_PAGE_SILENT_WRITE);</div><div class='del'>-	BTFIXUPSET_HALF(pte_mkoldi, _SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_SILENT_READ);</div><div class='del'>-	BTFIXUPSET_CALL(pte_mkwrite, sun4c_pte_mkwrite, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pte_mkdirty, sun4c_pte_mkdirty, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pte_mkyoung, sun4c_pte_mkyoung, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(update_mmu_cache, sun4c_update_mmu_cache, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(pte_to_pgoff, sun4c_pte_to_pgoff, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(pgoff_to_pte, sun4c_pgoff_to_pte, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(mmu_lockarea, sun4c_lockarea, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_unlockarea, sun4c_unlockarea, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(mmu_get_scsi_one, sun4c_get_scsi_one, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_get_scsi_sgl, sun4c_get_scsi_sgl, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_release_scsi_one, sun4c_release_scsi_one, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_release_scsi_sgl, sun4c_release_scsi_sgl, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(mmu_map_dma_area, sun4c_map_dma_area, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(mmu_unmap_dma_area, sun4c_unmap_dma_area, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(sparc_mapiorange, sun4c_mapiorange, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(sparc_unmapiorange, sun4c_unmapiorange, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(__swp_type, sun4c_swp_type, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(__swp_offset, sun4c_swp_offset, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(__swp_entry, sun4c_swp_entry, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(alloc_thread_info_node, sun4c_alloc_thread_info_node, BTFIXUPCALL_NORM);</div><div class='del'>-	BTFIXUPSET_CALL(free_thread_info, sun4c_free_thread_info, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	BTFIXUPSET_CALL(mmu_info, sun4c_mmu_info, BTFIXUPCALL_NORM);</div><div class='del'>-</div><div class='del'>-	/* These should _never_ get called with two level tables. */</div><div class='del'>-	BTFIXUPSET_CALL(pgd_set, sun4c_pgd_set, BTFIXUPCALL_NOP);</div><div class='del'>-	BTFIXUPSET_CALL(pgd_page_vaddr, sun4c_pgd_page, BTFIXUPCALL_RETO0);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/sparc/mm/ultra.S b/arch/sparc/mm/ultra.S<br/>index b57a5942ba64..874162a11ceb 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/ultra.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/ultra.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/ultra.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/ultra.S</a></div><div class='hunk'>@@ -495,11 +495,11 @@ xcall_fetch_glob_regs:</div><div class='ctx'> 	stx		%o7, [%g1 + GR_SNAP_O7]</div><div class='ctx'> 	stx		%i7, [%g1 + GR_SNAP_I7]</div><div class='ctx'> 	/* Don't try this at home kids... */</div><div class='del'>-	rdpr		%cwp, %g2</div><div class='del'>-	sub		%g2, 1, %g7</div><div class='add'>+	rdpr		%cwp, %g3</div><div class='add'>+	sub		%g3, 1, %g7</div><div class='ctx'> 	wrpr		%g7, %cwp</div><div class='ctx'> 	mov		%i7, %g7</div><div class='del'>-	wrpr		%g2, %cwp</div><div class='add'>+	wrpr		%g3, %cwp</div><div class='ctx'> 	stx		%g7, [%g1 + GR_SNAP_RPC]</div><div class='ctx'> 	sethi		%hi(trap_block), %g7</div><div class='ctx'> 	or		%g7, %lo(trap_block), %g7</div><div class='head'>diff --git a/arch/sparc/mm/viking.S b/arch/sparc/mm/viking.S<br/>index 6dfcc13d3100..bf8ee0613ae7 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/mm/viking.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/mm/viking.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/mm/viking.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/mm/viking.S</a></div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pgtsrmmu.h&gt;</div><div class='ctx'> #include &lt;asm/viking.h&gt;</div><div class='del'>-#include &lt;asm/btfixup.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	.data</div><div class='head'>diff --git a/arch/sparc/net/Makefile b/arch/sparc/net/Makefile<br/>new file mode 100644<br/>index 000000000000..1306a58ac541<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sparc/net/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/net/Makefile</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+#</div><div class='add'>+# Arch-specific network modules</div><div class='add'>+#</div><div class='add'>+obj-$(CONFIG_BPF_JIT) += bpf_jit_asm.o bpf_jit_comp.o</div><div class='head'>diff --git a/arch/sparc/net/bpf_jit.h b/arch/sparc/net/bpf_jit.h<br/>new file mode 100644<br/>index 000000000000..33d6b375ff12<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sparc/net/bpf_jit.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/net/bpf_jit.h</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+#ifndef _BPF_JIT_H</div><div class='add'>+#define _BPF_JIT_H</div><div class='add'>+</div><div class='add'>+/* Conventions:</div><div class='add'>+ *  %g1 : temporary</div><div class='add'>+ *  %g2 : Secondary temporary used by SKB data helper stubs.</div><div class='add'>+ *  %g3 : packet offset passed into SKB data helper stubs.</div><div class='add'>+ *  %o0 : pointer to skb (first argument given to JIT function)</div><div class='add'>+ *  %o1 : BPF A accumulator</div><div class='add'>+ *  %o2 : BPF X accumulator</div><div class='add'>+ *  %o3 : Holds saved %o7 so we can call helper functions without needing</div><div class='add'>+ *        to allocate a register window.</div><div class='add'>+ *  %o4 : skb-&gt;len - skb-&gt;data_len</div><div class='add'>+ *  %o5 : skb-&gt;data</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLER__</div><div class='add'>+#define G0		0x00</div><div class='add'>+#define G1		0x01</div><div class='add'>+#define G3		0x03</div><div class='add'>+#define G6		0x06</div><div class='add'>+#define O0		0x08</div><div class='add'>+#define O1		0x09</div><div class='add'>+#define O2		0x0a</div><div class='add'>+#define O3		0x0b</div><div class='add'>+#define O4		0x0c</div><div class='add'>+#define O5		0x0d</div><div class='add'>+#define SP		0x0e</div><div class='add'>+#define O7		0x0f</div><div class='add'>+#define FP		0x1e</div><div class='add'>+</div><div class='add'>+#define r_SKB		O0</div><div class='add'>+#define r_A		O1</div><div class='add'>+#define r_X		O2</div><div class='add'>+#define r_saved_O7	O3</div><div class='add'>+#define r_HEADLEN	O4</div><div class='add'>+#define r_SKB_DATA	O5</div><div class='add'>+#define r_TMP		G1</div><div class='add'>+#define r_TMP2		G2</div><div class='add'>+#define r_OFF		G3</div><div class='add'>+</div><div class='add'>+/* assembly code in arch/sparc/net/bpf_jit_asm.S */</div><div class='add'>+extern u32 bpf_jit_load_word[];</div><div class='add'>+extern u32 bpf_jit_load_half[];</div><div class='add'>+extern u32 bpf_jit_load_byte[];</div><div class='add'>+extern u32 bpf_jit_load_byte_msh[];</div><div class='add'>+extern u32 bpf_jit_load_word_positive_offset[];</div><div class='add'>+extern u32 bpf_jit_load_half_positive_offset[];</div><div class='add'>+extern u32 bpf_jit_load_byte_positive_offset[];</div><div class='add'>+extern u32 bpf_jit_load_byte_msh_positive_offset[];</div><div class='add'>+extern u32 bpf_jit_load_word_negative_offset[];</div><div class='add'>+extern u32 bpf_jit_load_half_negative_offset[];</div><div class='add'>+extern u32 bpf_jit_load_byte_negative_offset[];</div><div class='add'>+extern u32 bpf_jit_load_byte_msh_negative_offset[];</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+#define r_SKB		%o0</div><div class='add'>+#define r_A		%o1</div><div class='add'>+#define r_X		%o2</div><div class='add'>+#define r_saved_O7	%o3</div><div class='add'>+#define r_HEADLEN	%o4</div><div class='add'>+#define r_SKB_DATA	%o5</div><div class='add'>+#define r_TMP		%g1</div><div class='add'>+#define r_TMP2		%g2</div><div class='add'>+#define r_OFF		%g3</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* _BPF_JIT_H */</div><div class='head'>diff --git a/arch/sparc/net/bpf_jit_asm.S b/arch/sparc/net/bpf_jit_asm.S<br/>new file mode 100644<br/>index 000000000000..9d016c7017f7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sparc/net/bpf_jit_asm.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/net/bpf_jit_asm.S</a></div><div class='hunk'>@@ -0,0 +1,205 @@</div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bpf_jit.h"</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SPARC64</div><div class='add'>+#define SAVE_SZ		176</div><div class='add'>+#define SCRATCH_OFF	STACK_BIAS + 128</div><div class='add'>+#define BE_PTR(label)	be,pn %xcc, label</div><div class='add'>+#else</div><div class='add'>+#define SAVE_SZ		96</div><div class='add'>+#define SCRATCH_OFF	72</div><div class='add'>+#define BE_PTR(label)	be label</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define SKF_MAX_NEG_OFF	(-0x200000) /* SKF_LL_OFF from filter.h */</div><div class='add'>+</div><div class='add'>+	.text</div><div class='add'>+	.globl	bpf_jit_load_word</div><div class='add'>+bpf_jit_load_word:</div><div class='add'>+	cmp	r_OFF, 0</div><div class='add'>+	bl	bpf_slow_path_word_neg</div><div class='add'>+	 nop</div><div class='add'>+	.globl	bpf_jit_load_word_positive_offset</div><div class='add'>+bpf_jit_load_word_positive_offset:</div><div class='add'>+	sub	r_HEADLEN, r_OFF, r_TMP</div><div class='add'>+	cmp	r_TMP, 3</div><div class='add'>+	ble	bpf_slow_path_word</div><div class='add'>+	 add	r_SKB_DATA, r_OFF, r_TMP</div><div class='add'>+	andcc	r_TMP, 3, %g0</div><div class='add'>+	bne	load_word_unaligned</div><div class='add'>+	 nop</div><div class='add'>+	retl</div><div class='add'>+	 ld	[r_TMP], r_A</div><div class='add'>+load_word_unaligned:</div><div class='add'>+	ldub	[r_TMP + 0x0], r_OFF</div><div class='add'>+	ldub	[r_TMP + 0x1], r_TMP2</div><div class='add'>+	sll	r_OFF, 8, r_OFF</div><div class='add'>+	or	r_OFF, r_TMP2, r_OFF</div><div class='add'>+	ldub	[r_TMP + 0x2], r_TMP2</div><div class='add'>+	sll	r_OFF, 8, r_OFF</div><div class='add'>+	or	r_OFF, r_TMP2, r_OFF</div><div class='add'>+	ldub	[r_TMP + 0x3], r_TMP2</div><div class='add'>+	sll	r_OFF, 8, r_OFF</div><div class='add'>+	retl</div><div class='add'>+	 or	r_OFF, r_TMP2, r_A</div><div class='add'>+</div><div class='add'>+	.globl	bpf_jit_load_half</div><div class='add'>+bpf_jit_load_half:</div><div class='add'>+	cmp	r_OFF, 0</div><div class='add'>+	bl	bpf_slow_path_half_neg</div><div class='add'>+	 nop</div><div class='add'>+	.globl	bpf_jit_load_half_positive_offset</div><div class='add'>+bpf_jit_load_half_positive_offset:</div><div class='add'>+	sub	r_HEADLEN, r_OFF, r_TMP</div><div class='add'>+	cmp	r_TMP, 1</div><div class='add'>+	ble	bpf_slow_path_half</div><div class='add'>+	 add	r_SKB_DATA, r_OFF, r_TMP</div><div class='add'>+	andcc	r_TMP, 1, %g0</div><div class='add'>+	bne	load_half_unaligned</div><div class='add'>+	 nop</div><div class='add'>+	retl</div><div class='add'>+	 lduh	[r_TMP], r_A</div><div class='add'>+load_half_unaligned:</div><div class='add'>+	ldub	[r_TMP + 0x0], r_OFF</div><div class='add'>+	ldub	[r_TMP + 0x1], r_TMP2</div><div class='add'>+	sll	r_OFF, 8, r_OFF</div><div class='add'>+	retl</div><div class='add'>+	 or	r_OFF, r_TMP2, r_A</div><div class='add'>+</div><div class='add'>+	.globl	bpf_jit_load_byte</div><div class='add'>+bpf_jit_load_byte:</div><div class='add'>+	cmp	r_OFF, 0</div><div class='add'>+	bl	bpf_slow_path_byte_neg</div><div class='add'>+	 nop</div><div class='add'>+	.globl	bpf_jit_load_byte_positive_offset</div><div class='add'>+bpf_jit_load_byte_positive_offset:</div><div class='add'>+	cmp	r_OFF, r_HEADLEN</div><div class='add'>+	bge	bpf_slow_path_byte</div><div class='add'>+	 nop</div><div class='add'>+	retl</div><div class='add'>+	 ldub	[r_SKB_DATA + r_OFF], r_A</div><div class='add'>+</div><div class='add'>+	.globl	bpf_jit_load_byte_msh</div><div class='add'>+bpf_jit_load_byte_msh:</div><div class='add'>+	cmp	r_OFF, 0</div><div class='add'>+	bl	bpf_slow_path_byte_msh_neg</div><div class='add'>+	 nop</div><div class='add'>+	.globl	bpf_jit_load_byte_msh_positive_offset</div><div class='add'>+bpf_jit_load_byte_msh_positive_offset:</div><div class='add'>+	cmp	r_OFF, r_HEADLEN</div><div class='add'>+	bge	bpf_slow_path_byte_msh</div><div class='add'>+	 nop</div><div class='add'>+	ldub	[r_SKB_DATA + r_OFF], r_OFF</div><div class='add'>+	and	r_OFF, 0xf, r_OFF</div><div class='add'>+	retl</div><div class='add'>+	 sll	r_OFF, 2, r_X</div><div class='add'>+</div><div class='add'>+#define bpf_slow_path_common(LEN)	\</div><div class='add'>+	save	%sp, -SAVE_SZ, %sp;	\</div><div class='add'>+	mov	%i0, %o0;		\</div><div class='add'>+	mov	r_OFF, %o1;		\</div><div class='add'>+	add	%fp, SCRATCH_OFF, %o2;	\</div><div class='add'>+	call	skb_copy_bits;		\</div><div class='add'>+	 mov	(LEN), %o3;		\</div><div class='add'>+	cmp	%o0, 0;			\</div><div class='add'>+	restore;</div><div class='add'>+</div><div class='add'>+bpf_slow_path_word:</div><div class='add'>+	bpf_slow_path_common(4)</div><div class='add'>+	bl	bpf_error</div><div class='add'>+	 ld	[%sp + SCRATCH_OFF], r_A</div><div class='add'>+	retl</div><div class='add'>+	 nop</div><div class='add'>+bpf_slow_path_half:</div><div class='add'>+	bpf_slow_path_common(2)</div><div class='add'>+	bl	bpf_error</div><div class='add'>+	 lduh	[%sp + SCRATCH_OFF], r_A</div><div class='add'>+	retl</div><div class='add'>+	 nop</div><div class='add'>+bpf_slow_path_byte:</div><div class='add'>+	bpf_slow_path_common(1)</div><div class='add'>+	bl	bpf_error</div><div class='add'>+	 ldub	[%sp + SCRATCH_OFF], r_A</div><div class='add'>+	retl</div><div class='add'>+	 nop</div><div class='add'>+bpf_slow_path_byte_msh:</div><div class='add'>+	bpf_slow_path_common(1)</div><div class='add'>+	bl	bpf_error</div><div class='add'>+	 ldub	[%sp + SCRATCH_OFF], r_A</div><div class='add'>+	and	r_OFF, 0xf, r_OFF</div><div class='add'>+	retl</div><div class='add'>+	 sll	r_OFF, 2, r_X</div><div class='add'>+</div><div class='add'>+#define bpf_negative_common(LEN)			\</div><div class='add'>+	save	%sp, -SAVE_SZ, %sp;			\</div><div class='add'>+	mov	%i0, %o0;				\</div><div class='add'>+	mov	r_OFF, %o1;				\</div><div class='add'>+	call	bpf_internal_load_pointer_neg_helper;	\</div><div class='add'>+	 mov	(LEN), %o2;				\</div><div class='add'>+	mov	%o0, r_TMP;				\</div><div class='add'>+	cmp	%o0, 0;					\</div><div class='add'>+	BE_PTR(bpf_error);				\</div><div class='add'>+	 restore;</div><div class='add'>+</div><div class='add'>+bpf_slow_path_word_neg:</div><div class='add'>+	sethi	%hi(SKF_MAX_NEG_OFF), r_TMP</div><div class='add'>+	cmp	r_OFF, r_TMP</div><div class='add'>+	bl	bpf_error</div><div class='add'>+	 nop</div><div class='add'>+	.globl	bpf_jit_load_word_negative_offset</div><div class='add'>+bpf_jit_load_word_negative_offset:</div><div class='add'>+	bpf_negative_common(4)</div><div class='add'>+	andcc	r_TMP, 3, %g0</div><div class='add'>+	bne	load_word_unaligned</div><div class='add'>+	 nop</div><div class='add'>+	retl</div><div class='add'>+	 ld	[r_TMP], r_A</div><div class='add'>+</div><div class='add'>+bpf_slow_path_half_neg:</div><div class='add'>+	sethi	%hi(SKF_MAX_NEG_OFF), r_TMP</div><div class='add'>+	cmp	r_OFF, r_TMP</div><div class='add'>+	bl	bpf_error</div><div class='add'>+	 nop</div><div class='add'>+	.globl	bpf_jit_load_half_negative_offset</div><div class='add'>+bpf_jit_load_half_negative_offset:</div><div class='add'>+	bpf_negative_common(2)</div><div class='add'>+	andcc	r_TMP, 1, %g0</div><div class='add'>+	bne	load_half_unaligned</div><div class='add'>+	 nop</div><div class='add'>+	retl</div><div class='add'>+	 lduh	[r_TMP], r_A</div><div class='add'>+</div><div class='add'>+bpf_slow_path_byte_neg:</div><div class='add'>+	sethi	%hi(SKF_MAX_NEG_OFF), r_TMP</div><div class='add'>+	cmp	r_OFF, r_TMP</div><div class='add'>+	bl	bpf_error</div><div class='add'>+	 nop</div><div class='add'>+	.globl	bpf_jit_load_byte_negative_offset</div><div class='add'>+bpf_jit_load_byte_negative_offset:</div><div class='add'>+	bpf_negative_common(1)</div><div class='add'>+	retl</div><div class='add'>+	 ldub	[r_TMP], r_A</div><div class='add'>+</div><div class='add'>+bpf_slow_path_byte_msh_neg:</div><div class='add'>+	sethi	%hi(SKF_MAX_NEG_OFF), r_TMP</div><div class='add'>+	cmp	r_OFF, r_TMP</div><div class='add'>+	bl	bpf_error</div><div class='add'>+	 nop</div><div class='add'>+	.globl	bpf_jit_load_byte_msh_negative_offset</div><div class='add'>+bpf_jit_load_byte_msh_negative_offset:</div><div class='add'>+	bpf_negative_common(1)</div><div class='add'>+	ldub	[r_TMP], r_OFF</div><div class='add'>+	and	r_OFF, 0xf, r_OFF</div><div class='add'>+	retl</div><div class='add'>+	 sll	r_OFF, 2, r_X</div><div class='add'>+</div><div class='add'>+bpf_error:</div><div class='add'>+	/* Make the JIT program return zero.  The JIT epilogue</div><div class='add'>+	 * stores away the original %o7 into r_saved_O7.  The</div><div class='add'>+	 * normal leaf function return is to use "retl" which</div><div class='add'>+	 * would evalute to "jmpl %o7 + 8, %g0" but we want to</div><div class='add'>+	 * use the saved value thus the sequence you see here.</div><div class='add'>+	 */</div><div class='add'>+	jmpl	r_saved_O7 + 8, %g0</div><div class='add'>+	 clr	%o0</div><div class='head'>diff --git a/arch/sparc/net/bpf_jit_comp.c b/arch/sparc/net/bpf_jit_comp.c<br/>new file mode 100644<br/>index 000000000000..1a69244e785b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/sparc/net/bpf_jit_comp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -0,0 +1,802 @@</div><div class='add'>+#include &lt;linux/moduleloader.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/filter.h&gt;</div><div class='add'>+#include &lt;linux/cache.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bpf_jit.h"</div><div class='add'>+</div><div class='add'>+int bpf_jit_enable __read_mostly;</div><div class='add'>+</div><div class='add'>+static inline bool is_simm13(unsigned int value)</div><div class='add'>+{</div><div class='add'>+	return value + 0x1000 &lt; 0x2000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bpf_flush_icache(void *start_, void *end_)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_SPARC64</div><div class='add'>+	/* Cheetah's I-cache is fully coherent.  */</div><div class='add'>+	if (tlb_type == spitfire) {</div><div class='add'>+		unsigned long start = (unsigned long) start_;</div><div class='add'>+		unsigned long end = (unsigned long) end_;</div><div class='add'>+</div><div class='add'>+		start &amp;= ~7UL;</div><div class='add'>+		end = (end + 7UL) &amp; ~7UL;</div><div class='add'>+		while (start &lt; end) {</div><div class='add'>+			flushi(start);</div><div class='add'>+			start += 32;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define SEEN_DATAREF 1 /* might call external helpers */</div><div class='add'>+#define SEEN_XREG    2 /* ebx is used */</div><div class='add'>+#define SEEN_MEM     4 /* use mem[] for temporary storage */</div><div class='add'>+</div><div class='add'>+#define S13(X)		((X) &amp; 0x1fff)</div><div class='add'>+#define IMMED		0x00002000</div><div class='add'>+#define RD(X)		((X) &lt;&lt; 25)</div><div class='add'>+#define RS1(X)		((X) &lt;&lt; 14)</div><div class='add'>+#define RS2(X)		((X))</div><div class='add'>+#define OP(X)		((X) &lt;&lt; 30)</div><div class='add'>+#define OP2(X)		((X) &lt;&lt; 22)</div><div class='add'>+#define OP3(X)		((X) &lt;&lt; 19)</div><div class='add'>+#define COND(X)		((X) &lt;&lt; 25)</div><div class='add'>+#define F1(X)		OP(X)</div><div class='add'>+#define F2(X, Y)	(OP(X) | OP2(Y))</div><div class='add'>+#define F3(X, Y)	(OP(X) | OP3(Y))</div><div class='add'>+</div><div class='add'>+#define CONDN		COND(0x0)</div><div class='add'>+#define CONDE		COND(0x1)</div><div class='add'>+#define CONDLE		COND(0x2)</div><div class='add'>+#define CONDL		COND(0x3)</div><div class='add'>+#define CONDLEU		COND(0x4)</div><div class='add'>+#define CONDCS		COND(0x5)</div><div class='add'>+#define CONDNEG		COND(0x6)</div><div class='add'>+#define CONDVC		COND(0x7)</div><div class='add'>+#define CONDA		COND(0x8)</div><div class='add'>+#define CONDNE		COND(0x9)</div><div class='add'>+#define CONDG		COND(0xa)</div><div class='add'>+#define CONDGE		COND(0xb)</div><div class='add'>+#define CONDGU		COND(0xc)</div><div class='add'>+#define CONDCC		COND(0xd)</div><div class='add'>+#define CONDPOS		COND(0xe)</div><div class='add'>+#define CONDVS		COND(0xf)</div><div class='add'>+</div><div class='add'>+#define CONDGEU		CONDCC</div><div class='add'>+#define CONDLU		CONDCS</div><div class='add'>+</div><div class='add'>+#define WDISP22(X)	(((X) &gt;&gt; 2) &amp; 0x3fffff)</div><div class='add'>+</div><div class='add'>+#define BA		(F2(0, 2) | CONDA)</div><div class='add'>+#define BGU		(F2(0, 2) | CONDGU)</div><div class='add'>+#define BLEU		(F2(0, 2) | CONDLEU)</div><div class='add'>+#define BGEU		(F2(0, 2) | CONDGEU)</div><div class='add'>+#define BLU		(F2(0, 2) | CONDLU)</div><div class='add'>+#define BE		(F2(0, 2) | CONDE)</div><div class='add'>+#define BNE		(F2(0, 2) | CONDNE)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SPARC64</div><div class='add'>+#define BNE_PTR		(F2(0, 1) | CONDNE | (2 &lt;&lt; 20))</div><div class='add'>+#else</div><div class='add'>+#define BNE_PTR		BNE</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define SETHI(K, REG)	\</div><div class='add'>+	(F2(0, 0x4) | RD(REG) | (((K) &gt;&gt; 10) &amp; 0x3fffff))</div><div class='add'>+#define OR_LO(K, REG)	\</div><div class='add'>+	(F3(2, 0x02) | IMMED | RS1(REG) | ((K) &amp; 0x3ff) | RD(REG))</div><div class='add'>+</div><div class='add'>+#define ADD		F3(2, 0x00)</div><div class='add'>+#define AND		F3(2, 0x01)</div><div class='add'>+#define ANDCC		F3(2, 0x11)</div><div class='add'>+#define OR		F3(2, 0x02)</div><div class='add'>+#define SUB		F3(2, 0x04)</div><div class='add'>+#define SUBCC		F3(2, 0x14)</div><div class='add'>+#define MUL		F3(2, 0x0a)	/* umul */</div><div class='add'>+#define DIV		F3(2, 0x0e)	/* udiv */</div><div class='add'>+#define SLL		F3(2, 0x25)</div><div class='add'>+#define SRL		F3(2, 0x26)</div><div class='add'>+#define JMPL		F3(2, 0x38)</div><div class='add'>+#define CALL		F1(1)</div><div class='add'>+#define BR		F2(0, 0x01)</div><div class='add'>+#define RD_Y		F3(2, 0x28)</div><div class='add'>+#define WR_Y		F3(2, 0x30)</div><div class='add'>+</div><div class='add'>+#define LD32		F3(3, 0x00)</div><div class='add'>+#define LD8		F3(3, 0x01)</div><div class='add'>+#define LD16		F3(3, 0x02)</div><div class='add'>+#define LD64		F3(3, 0x0b)</div><div class='add'>+#define ST32		F3(3, 0x04)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SPARC64</div><div class='add'>+#define LDPTR		LD64</div><div class='add'>+#define BASE_STACKFRAME	176</div><div class='add'>+#else</div><div class='add'>+#define LDPTR		LD32</div><div class='add'>+#define BASE_STACKFRAME	96</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define LD32I		(LD32 | IMMED)</div><div class='add'>+#define LD8I		(LD8 | IMMED)</div><div class='add'>+#define LD16I		(LD16 | IMMED)</div><div class='add'>+#define LD64I		(LD64 | IMMED)</div><div class='add'>+#define LDPTRI		(LDPTR | IMMED)</div><div class='add'>+#define ST32I		(ST32 | IMMED)</div><div class='add'>+</div><div class='add'>+#define emit_nop()		\</div><div class='add'>+do {				\</div><div class='add'>+	*prog++ = SETHI(0, G0);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_neg()					\</div><div class='add'>+do {	/* sub %g0, r_A, r_A */				\</div><div class='add'>+	*prog++ = SUB | RS1(G0) | RS2(r_A) | RD(r_A);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_reg_move(FROM, TO)				\</div><div class='add'>+do {	/* or %g0, FROM, TO */				\</div><div class='add'>+	*prog++ = OR | RS1(G0) | RS2(FROM) | RD(TO);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_clear(REG)					\</div><div class='add'>+do {	/* or %g0, %g0, REG */				\</div><div class='add'>+	*prog++ = OR | RS1(G0) | RS2(G0) | RD(REG);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_set_const(K, REG)					\</div><div class='add'>+do {	/* sethi %hi(K), REG */					\</div><div class='add'>+	*prog++ = SETHI(K, REG);				\</div><div class='add'>+	/* or REG, %lo(K), REG */				\</div><div class='add'>+	*prog++ = OR_LO(K, REG);				\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+	/* Emit</div><div class='add'>+	 *</div><div class='add'>+	 *	OP	r_A, r_X, r_A</div><div class='add'>+	 */</div><div class='add'>+#define emit_alu_X(OPCODE)					\</div><div class='add'>+do {								\</div><div class='add'>+	seen |= SEEN_XREG;					\</div><div class='add'>+	*prog++ = OPCODE | RS1(r_A) | RS2(r_X) | RD(r_A);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+	/* Emit either:</div><div class='add'>+	 *</div><div class='add'>+	 *	OP	r_A, K, r_A</div><div class='add'>+	 *</div><div class='add'>+	 * or</div><div class='add'>+	 *</div><div class='add'>+	 *	sethi	%hi(K), r_TMP</div><div class='add'>+	 *	or	r_TMP, %lo(K), r_TMP</div><div class='add'>+	 *	OP	r_A, r_TMP, r_A</div><div class='add'>+	 *</div><div class='add'>+	 * depending upon whether K fits in a signed 13-bit</div><div class='add'>+	 * immediate instruction field.  Emit nothing if K</div><div class='add'>+	 * is zero.</div><div class='add'>+	 */</div><div class='add'>+#define emit_alu_K(OPCODE, K)					\</div><div class='add'>+do {								\</div><div class='add'>+	if (K) {						\</div><div class='add'>+		unsigned int _insn = OPCODE;			\</div><div class='add'>+		_insn |= RS1(r_A) | RD(r_A);			\</div><div class='add'>+		if (is_simm13(K)) {				\</div><div class='add'>+			*prog++ = _insn | IMMED | S13(K);	\</div><div class='add'>+		} else {					\</div><div class='add'>+			emit_set_const(K, r_TMP);		\</div><div class='add'>+			*prog++ = _insn | RS2(r_TMP);		\</div><div class='add'>+		}						\</div><div class='add'>+	}							\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_loadimm(K, DEST)						\</div><div class='add'>+do {									\</div><div class='add'>+	if (is_simm13(K)) {						\</div><div class='add'>+		/* or %g0, K, DEST */					\</div><div class='add'>+		*prog++ = OR | IMMED | RS1(G0) | S13(K) | RD(DEST);	\</div><div class='add'>+	} else {							\</div><div class='add'>+		emit_set_const(K, DEST);				\</div><div class='add'>+	}								\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_loadptr(BASE, STRUCT, FIELD, DEST)				\</div><div class='add'>+do {	unsigned int _off = offsetof(STRUCT, FIELD);			\</div><div class='add'>+	BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(void *));	\</div><div class='add'>+	*prog++ = LDPTRI | RS1(BASE) | S13(_off) | RD(DEST);		\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_load32(BASE, STRUCT, FIELD, DEST)				\</div><div class='add'>+do {	unsigned int _off = offsetof(STRUCT, FIELD);			\</div><div class='add'>+	BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(u32));	\</div><div class='add'>+	*prog++ = LD32I | RS1(BASE) | S13(_off) | RD(DEST);		\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_load16(BASE, STRUCT, FIELD, DEST)				\</div><div class='add'>+do {	unsigned int _off = offsetof(STRUCT, FIELD);			\</div><div class='add'>+	BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(u16));	\</div><div class='add'>+	*prog++ = LD16I | RS1(BASE) | S13(_off) | RD(DEST);		\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define __emit_load8(BASE, STRUCT, FIELD, DEST)				\</div><div class='add'>+do {	unsigned int _off = offsetof(STRUCT, FIELD);			\</div><div class='add'>+	*prog++ = LD8I | RS1(BASE) | S13(_off) | RD(DEST);		\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_load8(BASE, STRUCT, FIELD, DEST)				\</div><div class='add'>+do {	BUILD_BUG_ON(FIELD_SIZEOF(STRUCT, FIELD) != sizeof(u8));	\</div><div class='add'>+	__emit_load8(BASE, STRUCT, FIELD, DEST);			\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_ldmem(OFF, DEST)					\</div><div class='add'>+do {	*prog++ = LD32I | RS1(FP) | S13(-(OFF)) | RD(DEST);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_stmem(OFF, SRC)					\</div><div class='add'>+do {	*prog++ = LD32I | RS1(FP) | S13(-(OFF)) | RD(SRC);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+#ifdef CONFIG_SPARC64</div><div class='add'>+#define emit_load_cpu(REG)						\</div><div class='add'>+	emit_load16(G6, struct thread_info, cpu, REG)</div><div class='add'>+#else</div><div class='add'>+#define emit_load_cpu(REG)						\</div><div class='add'>+	emit_load32(G6, struct thread_info, cpu, REG)</div><div class='add'>+#endif</div><div class='add'>+#else</div><div class='add'>+#define emit_load_cpu(REG)	emit_clear(REG)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define emit_skb_loadptr(FIELD, DEST) \</div><div class='add'>+	emit_loadptr(r_SKB, struct sk_buff, FIELD, DEST)</div><div class='add'>+#define emit_skb_load32(FIELD, DEST) \</div><div class='add'>+	emit_load32(r_SKB, struct sk_buff, FIELD, DEST)</div><div class='add'>+#define emit_skb_load16(FIELD, DEST) \</div><div class='add'>+	emit_load16(r_SKB, struct sk_buff, FIELD, DEST)</div><div class='add'>+#define __emit_skb_load8(FIELD, DEST) \</div><div class='add'>+	__emit_load8(r_SKB, struct sk_buff, FIELD, DEST)</div><div class='add'>+#define emit_skb_load8(FIELD, DEST) \</div><div class='add'>+	emit_load8(r_SKB, struct sk_buff, FIELD, DEST)</div><div class='add'>+</div><div class='add'>+#define emit_jmpl(BASE, IMM_OFF, LREG) \</div><div class='add'>+	*prog++ = (JMPL | IMMED | RS1(BASE) | S13(IMM_OFF) | RD(LREG))</div><div class='add'>+</div><div class='add'>+#define emit_call(FUNC)					\</div><div class='add'>+do {	void *_here = image + addrs[i] - 8;		\</div><div class='add'>+	unsigned int _off = (void *)(FUNC) - _here;	\</div><div class='add'>+	*prog++ = CALL | (((_off) &gt;&gt; 2) &amp; 0x3fffffff);	\</div><div class='add'>+	emit_nop();					\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_branch(BR_OPC, DEST)			\</div><div class='add'>+do {	unsigned int _here = addrs[i] - 8;		\</div><div class='add'>+	*prog++ = BR_OPC | WDISP22((DEST) - _here);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_branch_off(BR_OPC, OFF)			\</div><div class='add'>+do {	*prog++ = BR_OPC | WDISP22(OFF);		\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define emit_jump(DEST)		emit_branch(BA, DEST)</div><div class='add'>+</div><div class='add'>+#define emit_read_y(REG)	*prog++ = RD_Y | RD(REG)</div><div class='add'>+#define emit_write_y(REG)	*prog++ = WR_Y | IMMED | RS1(REG) | S13(0)</div><div class='add'>+</div><div class='add'>+#define emit_cmp(R1, R2) \</div><div class='add'>+	*prog++ = (SUBCC | RS1(R1) | RS2(R2) | RD(G0))</div><div class='add'>+</div><div class='add'>+#define emit_cmpi(R1, IMM) \</div><div class='add'>+	*prog++ = (SUBCC | IMMED | RS1(R1) | S13(IMM) | RD(G0));</div><div class='add'>+</div><div class='add'>+#define emit_btst(R1, R2) \</div><div class='add'>+	*prog++ = (ANDCC | RS1(R1) | RS2(R2) | RD(G0))</div><div class='add'>+</div><div class='add'>+#define emit_btsti(R1, IMM) \</div><div class='add'>+	*prog++ = (ANDCC | IMMED | RS1(R1) | S13(IMM) | RD(G0));</div><div class='add'>+</div><div class='add'>+#define emit_sub(R1, R2, R3) \</div><div class='add'>+	*prog++ = (SUB | RS1(R1) | RS2(R2) | RD(R3))</div><div class='add'>+</div><div class='add'>+#define emit_subi(R1, IMM, R3) \</div><div class='add'>+	*prog++ = (SUB | IMMED | RS1(R1) | S13(IMM) | RD(R3))</div><div class='add'>+</div><div class='add'>+#define emit_add(R1, R2, R3) \</div><div class='add'>+	*prog++ = (ADD | RS1(R1) | RS2(R2) | RD(R3))</div><div class='add'>+</div><div class='add'>+#define emit_addi(R1, IMM, R3) \</div><div class='add'>+	*prog++ = (ADD | IMMED | RS1(R1) | S13(IMM) | RD(R3))</div><div class='add'>+</div><div class='add'>+#define emit_alloc_stack(SZ) \</div><div class='add'>+	*prog++ = (SUB | IMMED | RS1(SP) | S13(SZ) | RD(SP))</div><div class='add'>+</div><div class='add'>+#define emit_release_stack(SZ) \</div><div class='add'>+	*prog++ = (ADD | IMMED | RS1(SP) | S13(SZ) | RD(SP))</div><div class='add'>+</div><div class='add'>+/* A note about branch offset calculations.  The addrs[] array,</div><div class='add'>+ * indexed by BPF instruction, records the address after all the</div><div class='add'>+ * sparc instructions emitted for that BPF instruction.</div><div class='add'>+ *</div><div class='add'>+ * The most common case is to emit a branch at the end of such</div><div class='add'>+ * a code sequence.  So this would be two instructions, the</div><div class='add'>+ * branch and it's delay slot.</div><div class='add'>+ *</div><div class='add'>+ * Therefore by default the branch emitters calculate the branch</div><div class='add'>+ * offset field as:</div><div class='add'>+ *</div><div class='add'>+ *	destination - (addrs[i] - 8)</div><div class='add'>+ *</div><div class='add'>+ * This "addrs[i] - 8" is the address of the branch itself or</div><div class='add'>+ * what "." would be in assembler notation.  The "8" part is</div><div class='add'>+ * how we take into consideration the branch and it's delay</div><div class='add'>+ * slot mentioned above.</div><div class='add'>+ *</div><div class='add'>+ * Sometimes we need to emit a branch earlier in the code</div><div class='add'>+ * sequence.  And in these situations we adjust "destination"</div><div class='add'>+ * to accomodate this difference.  For example, if we needed</div><div class='add'>+ * to emit a branch (and it's delay slot) right before the</div><div class='add'>+ * final instruction emitted for a BPF opcode, we'd use</div><div class='add'>+ * "destination + 4" instead of just plain "destination" above.</div><div class='add'>+ *</div><div class='add'>+ * This is why you see all of these funny emit_branch() and</div><div class='add'>+ * emit_jump() calls with adjusted offsets.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+void bpf_jit_compile(struct sk_filter *fp)</div><div class='add'>+{</div><div class='add'>+	unsigned int cleanup_addr, proglen, oldproglen = 0;</div><div class='add'>+	u32 temp[8], *prog, *func, seen = 0, pass;</div><div class='add'>+	const struct sock_filter *filter = fp-&gt;insns;</div><div class='add'>+	int i, flen = fp-&gt;len, pc_ret0 = -1;</div><div class='add'>+	unsigned int *addrs;</div><div class='add'>+	void *image;</div><div class='add'>+</div><div class='add'>+	if (!bpf_jit_enable)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	addrs = kmalloc(flen * sizeof(*addrs), GFP_KERNEL);</div><div class='add'>+	if (addrs == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Before first pass, make a rough estimation of addrs[]</div><div class='add'>+	 * each bpf instruction is translated to less than 64 bytes</div><div class='add'>+	 */</div><div class='add'>+	for (proglen = 0, i = 0; i &lt; flen; i++) {</div><div class='add'>+		proglen += 64;</div><div class='add'>+		addrs[i] = proglen;</div><div class='add'>+	}</div><div class='add'>+	cleanup_addr = proglen; /* epilogue address */</div><div class='add'>+	image = NULL;</div><div class='add'>+	for (pass = 0; pass &lt; 10; pass++) {</div><div class='add'>+		u8 seen_or_pass0 = (pass == 0) ? (SEEN_XREG | SEEN_DATAREF | SEEN_MEM) : seen;</div><div class='add'>+</div><div class='add'>+		/* no prologue/epilogue for trivial filters (RET something) */</div><div class='add'>+		proglen = 0;</div><div class='add'>+		prog = temp;</div><div class='add'>+</div><div class='add'>+		/* Prologue */</div><div class='add'>+		if (seen_or_pass0) {</div><div class='add'>+			if (seen_or_pass0 &amp; SEEN_MEM) {</div><div class='add'>+				unsigned int sz = BASE_STACKFRAME;</div><div class='add'>+				sz += BPF_MEMWORDS * sizeof(u32);</div><div class='add'>+				emit_alloc_stack(sz);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* Make sure we dont leek kernel memory. */</div><div class='add'>+			if (seen_or_pass0 &amp; SEEN_XREG)</div><div class='add'>+				emit_clear(r_X);</div><div class='add'>+</div><div class='add'>+			/* If this filter needs to access skb data,</div><div class='add'>+			 * load %o4 and %o5 with:</div><div class='add'>+			 *  %o4 = skb-&gt;len - skb-&gt;data_len</div><div class='add'>+			 *  %o5 = skb-&gt;data</div><div class='add'>+			 * And also back up %o7 into r_saved_O7 so we can</div><div class='add'>+			 * invoke the stubs using 'call'.</div><div class='add'>+			 */</div><div class='add'>+			if (seen_or_pass0 &amp; SEEN_DATAREF) {</div><div class='add'>+				emit_load32(r_SKB, struct sk_buff, len, r_HEADLEN);</div><div class='add'>+				emit_load32(r_SKB, struct sk_buff, data_len, r_TMP);</div><div class='add'>+				emit_sub(r_HEADLEN, r_TMP, r_HEADLEN);</div><div class='add'>+				emit_loadptr(r_SKB, struct sk_buff, data, r_SKB_DATA);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		emit_reg_move(O7, r_saved_O7);</div><div class='add'>+</div><div class='add'>+		switch (filter[0].code) {</div><div class='add'>+		case BPF_S_RET_K:</div><div class='add'>+		case BPF_S_LD_W_LEN:</div><div class='add'>+		case BPF_S_ANC_PROTOCOL:</div><div class='add'>+		case BPF_S_ANC_PKTTYPE:</div><div class='add'>+		case BPF_S_ANC_IFINDEX:</div><div class='add'>+		case BPF_S_ANC_MARK:</div><div class='add'>+		case BPF_S_ANC_RXHASH:</div><div class='add'>+		case BPF_S_ANC_CPU:</div><div class='add'>+		case BPF_S_ANC_QUEUE:</div><div class='add'>+		case BPF_S_LD_W_ABS:</div><div class='add'>+		case BPF_S_LD_H_ABS:</div><div class='add'>+		case BPF_S_LD_B_ABS:</div><div class='add'>+			/* The first instruction sets the A register (or is</div><div class='add'>+			 * a "RET 'constant'")</div><div class='add'>+			 */</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			/* Make sure we dont leak kernel information to the</div><div class='add'>+			 * user.</div><div class='add'>+			 */</div><div class='add'>+			emit_clear(r_A); /* A = 0 */</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; flen; i++) {</div><div class='add'>+			unsigned int K = filter[i].k;</div><div class='add'>+			unsigned int t_offset;</div><div class='add'>+			unsigned int f_offset;</div><div class='add'>+			u32 t_op, f_op;</div><div class='add'>+			int ilen;</div><div class='add'>+</div><div class='add'>+			switch (filter[i].code) {</div><div class='add'>+			case BPF_S_ALU_ADD_X:	/* A += X; */</div><div class='add'>+				emit_alu_X(ADD);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_ADD_K:	/* A += K; */</div><div class='add'>+				emit_alu_K(ADD, K);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_SUB_X:	/* A -= X; */</div><div class='add'>+				emit_alu_X(SUB);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_SUB_K:	/* A -= K */</div><div class='add'>+				emit_alu_K(SUB, K);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_AND_X:	/* A &amp;= X */</div><div class='add'>+				emit_alu_X(AND);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_AND_K:	/* A &amp;= K */</div><div class='add'>+				emit_alu_K(AND, K);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_OR_X:	/* A |= X */</div><div class='add'>+				emit_alu_X(OR);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_OR_K:	/* A |= K */</div><div class='add'>+				emit_alu_K(OR, K);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_LSH_X:	/* A &lt;&lt;= X */</div><div class='add'>+				emit_alu_X(SLL);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_LSH_K:	/* A &lt;&lt;= K */</div><div class='add'>+				emit_alu_K(SLL, K);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_RSH_X:	/* A &gt;&gt;= X */</div><div class='add'>+				emit_alu_X(SRL);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_RSH_K:	/* A &gt;&gt;= K */</div><div class='add'>+				emit_alu_K(SRL, K);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_MUL_X:	/* A *= X; */</div><div class='add'>+				emit_alu_X(MUL);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_MUL_K:	/* A *= K */</div><div class='add'>+				emit_alu_K(MUL, K);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_DIV_K:	/* A /= K */</div><div class='add'>+				emit_alu_K(MUL, K);</div><div class='add'>+				emit_read_y(r_A);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_DIV_X:	/* A /= X; */</div><div class='add'>+				emit_cmpi(r_X, 0);</div><div class='add'>+				if (pc_ret0 &gt; 0) {</div><div class='add'>+					t_offset = addrs[pc_ret0 - 1];</div><div class='add'>+#ifdef CONFIG_SPARC32</div><div class='add'>+					emit_branch(BE, t_offset + 20);</div><div class='add'>+#else</div><div class='add'>+					emit_branch(BE, t_offset + 8);</div><div class='add'>+#endif</div><div class='add'>+					emit_nop(); /* delay slot */</div><div class='add'>+				} else {</div><div class='add'>+					emit_branch_off(BNE, 16);</div><div class='add'>+					emit_nop();</div><div class='add'>+#ifdef CONFIG_SPARC32</div><div class='add'>+					emit_jump(cleanup_addr + 20);</div><div class='add'>+#else</div><div class='add'>+					emit_jump(cleanup_addr + 8);</div><div class='add'>+#endif</div><div class='add'>+					emit_clear(r_A);</div><div class='add'>+				}</div><div class='add'>+				emit_write_y(G0);</div><div class='add'>+#ifdef CONFIG_SPARC32</div><div class='add'>+				/* The Sparc v8 architecture requires</div><div class='add'>+				 * three instructions between a %y</div><div class='add'>+				 * register write and the first use.</div><div class='add'>+				 */</div><div class='add'>+				emit_nop();</div><div class='add'>+				emit_nop();</div><div class='add'>+				emit_nop();</div><div class='add'>+#endif</div><div class='add'>+				emit_alu_X(DIV);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ALU_NEG:</div><div class='add'>+				emit_neg();</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_RET_K:</div><div class='add'>+				if (!K) {</div><div class='add'>+					if (pc_ret0 == -1)</div><div class='add'>+						pc_ret0 = i;</div><div class='add'>+					emit_clear(r_A);</div><div class='add'>+				} else {</div><div class='add'>+					emit_loadimm(K, r_A);</div><div class='add'>+				}</div><div class='add'>+				/* Fallthrough */</div><div class='add'>+			case BPF_S_RET_A:</div><div class='add'>+				if (seen_or_pass0) {</div><div class='add'>+					if (i != flen - 1) {</div><div class='add'>+						emit_jump(cleanup_addr);</div><div class='add'>+						emit_nop();</div><div class='add'>+						break;</div><div class='add'>+					}</div><div class='add'>+					if (seen_or_pass0 &amp; SEEN_MEM) {</div><div class='add'>+						unsigned int sz = BASE_STACKFRAME;</div><div class='add'>+						sz += BPF_MEMWORDS * sizeof(u32);</div><div class='add'>+						emit_release_stack(sz);</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='add'>+				/* jmpl %r_saved_O7 + 8, %g0 */</div><div class='add'>+				emit_jmpl(r_saved_O7, 8, G0);</div><div class='add'>+				emit_reg_move(r_A, O0); /* delay slot */</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_MISC_TAX:</div><div class='add'>+				seen |= SEEN_XREG;</div><div class='add'>+				emit_reg_move(r_A, r_X);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_MISC_TXA:</div><div class='add'>+				seen |= SEEN_XREG;</div><div class='add'>+				emit_reg_move(r_X, r_A);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ANC_CPU:</div><div class='add'>+				emit_load_cpu(r_A);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ANC_PROTOCOL:</div><div class='add'>+				emit_skb_load16(protocol, r_A);</div><div class='add'>+				break;</div><div class='add'>+#if 0</div><div class='add'>+				/* GCC won't let us take the address of</div><div class='add'>+				 * a bit field even though we very much</div><div class='add'>+				 * know what we are doing here.</div><div class='add'>+				 */</div><div class='add'>+			case BPF_S_ANC_PKTTYPE:</div><div class='add'>+				__emit_skb_load8(pkt_type, r_A);</div><div class='add'>+				emit_alu_K(SRL, 5);</div><div class='add'>+				break;</div><div class='add'>+#endif</div><div class='add'>+			case BPF_S_ANC_IFINDEX:</div><div class='add'>+				emit_skb_loadptr(dev, r_A);</div><div class='add'>+				emit_cmpi(r_A, 0);</div><div class='add'>+				emit_branch(BNE_PTR, cleanup_addr + 4);</div><div class='add'>+				emit_nop();</div><div class='add'>+				emit_load32(r_A, struct net_device, ifindex, r_A);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ANC_MARK:</div><div class='add'>+				emit_skb_load32(mark, r_A);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ANC_QUEUE:</div><div class='add'>+				emit_skb_load16(queue_mapping, r_A);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ANC_HATYPE:</div><div class='add'>+				emit_skb_loadptr(dev, r_A);</div><div class='add'>+				emit_cmpi(r_A, 0);</div><div class='add'>+				emit_branch(BNE_PTR, cleanup_addr + 4);</div><div class='add'>+				emit_nop();</div><div class='add'>+				emit_load16(r_A, struct net_device, type, r_A);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ANC_RXHASH:</div><div class='add'>+				emit_skb_load32(rxhash, r_A);</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			case BPF_S_LD_IMM:</div><div class='add'>+				emit_loadimm(K, r_A);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_LDX_IMM:</div><div class='add'>+				emit_loadimm(K, r_X);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_LD_MEM:</div><div class='add'>+				emit_ldmem(K * 4, r_A);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_LDX_MEM:</div><div class='add'>+				emit_ldmem(K * 4, r_X);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_ST:</div><div class='add'>+				emit_stmem(K * 4, r_A);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_STX:</div><div class='add'>+				emit_stmem(K * 4, r_X);</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+#define CHOOSE_LOAD_FUNC(K, func) \</div><div class='add'>+	((int)K &lt; 0 ? ((int)K &gt;= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)</div><div class='add'>+</div><div class='add'>+			case BPF_S_LD_W_ABS:</div><div class='add'>+				func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_word);</div><div class='add'>+common_load:			seen |= SEEN_DATAREF;</div><div class='add'>+				emit_loadimm(K, r_OFF);</div><div class='add'>+				emit_call(func);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_LD_H_ABS:</div><div class='add'>+				func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_half);</div><div class='add'>+				goto common_load;</div><div class='add'>+			case BPF_S_LD_B_ABS:</div><div class='add'>+				func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_byte);</div><div class='add'>+				goto common_load;</div><div class='add'>+			case BPF_S_LDX_B_MSH:</div><div class='add'>+				func = CHOOSE_LOAD_FUNC(K, bpf_jit_load_byte_msh);</div><div class='add'>+				goto common_load;</div><div class='add'>+			case BPF_S_LD_W_IND:</div><div class='add'>+				func = bpf_jit_load_word;</div><div class='add'>+common_load_ind:		seen |= SEEN_DATAREF | SEEN_XREG;</div><div class='add'>+				if (K) {</div><div class='add'>+					if (is_simm13(K)) {</div><div class='add'>+						emit_addi(r_X, K, r_OFF);</div><div class='add'>+					} else {</div><div class='add'>+						emit_loadimm(K, r_TMP);</div><div class='add'>+						emit_add(r_X, r_TMP, r_OFF);</div><div class='add'>+					}</div><div class='add'>+				} else {</div><div class='add'>+					emit_reg_move(r_X, r_OFF);</div><div class='add'>+				}</div><div class='add'>+				emit_call(func);</div><div class='add'>+				break;</div><div class='add'>+			case BPF_S_LD_H_IND:</div><div class='add'>+				func = bpf_jit_load_half;</div><div class='add'>+				goto common_load_ind;</div><div class='add'>+			case BPF_S_LD_B_IND:</div><div class='add'>+				func = bpf_jit_load_byte;</div><div class='add'>+				goto common_load_ind;</div><div class='add'>+			case BPF_S_JMP_JA:</div><div class='add'>+				emit_jump(addrs[i + K]);</div><div class='add'>+				emit_nop();</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+#define COND_SEL(CODE, TOP, FOP)	\</div><div class='add'>+	case CODE:			\</div><div class='add'>+		t_op = TOP;		\</div><div class='add'>+		f_op = FOP;		\</div><div class='add'>+		goto cond_branch</div><div class='add'>+</div><div class='add'>+			COND_SEL(BPF_S_JMP_JGT_K, BGU, BLEU);</div><div class='add'>+			COND_SEL(BPF_S_JMP_JGE_K, BGEU, BLU);</div><div class='add'>+			COND_SEL(BPF_S_JMP_JEQ_K, BE, BNE);</div><div class='add'>+			COND_SEL(BPF_S_JMP_JSET_K, BNE, BE);</div><div class='add'>+			COND_SEL(BPF_S_JMP_JGT_X, BGU, BLEU);</div><div class='add'>+			COND_SEL(BPF_S_JMP_JGE_X, BGEU, BLU);</div><div class='add'>+			COND_SEL(BPF_S_JMP_JEQ_X, BE, BNE);</div><div class='add'>+			COND_SEL(BPF_S_JMP_JSET_X, BNE, BE);</div><div class='add'>+</div><div class='add'>+cond_branch:			f_offset = addrs[i + filter[i].jf];</div><div class='add'>+				t_offset = addrs[i + filter[i].jt];</div><div class='add'>+</div><div class='add'>+				/* same targets, can avoid doing the test :) */</div><div class='add'>+				if (filter[i].jt == filter[i].jf) {</div><div class='add'>+					emit_jump(t_offset);</div><div class='add'>+					emit_nop();</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				switch (filter[i].code) {</div><div class='add'>+				case BPF_S_JMP_JGT_X:</div><div class='add'>+				case BPF_S_JMP_JGE_X:</div><div class='add'>+				case BPF_S_JMP_JEQ_X:</div><div class='add'>+					seen |= SEEN_XREG;</div><div class='add'>+					emit_cmp(r_A, r_X);</div><div class='add'>+					break;</div><div class='add'>+				case BPF_S_JMP_JSET_X:</div><div class='add'>+					seen |= SEEN_XREG;</div><div class='add'>+					emit_btst(r_A, r_X);</div><div class='add'>+					break;</div><div class='add'>+				case BPF_S_JMP_JEQ_K:</div><div class='add'>+				case BPF_S_JMP_JGT_K:</div><div class='add'>+				case BPF_S_JMP_JGE_K:</div><div class='add'>+					if (is_simm13(K)) {</div><div class='add'>+						emit_cmpi(r_A, K);</div><div class='add'>+					} else {</div><div class='add'>+						emit_loadimm(K, r_TMP);</div><div class='add'>+						emit_cmp(r_A, r_TMP);</div><div class='add'>+					}</div><div class='add'>+					break;</div><div class='add'>+				case BPF_S_JMP_JSET_K:</div><div class='add'>+					if (is_simm13(K)) {</div><div class='add'>+						emit_btsti(r_A, K);</div><div class='add'>+					} else {</div><div class='add'>+						emit_loadimm(K, r_TMP);</div><div class='add'>+						emit_btst(r_A, r_TMP);</div><div class='add'>+					}</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+				if (filter[i].jt != 0) {</div><div class='add'>+					if (filter[i].jf)</div><div class='add'>+						t_offset += 8;</div><div class='add'>+					emit_branch(t_op, t_offset);</div><div class='add'>+					emit_nop(); /* delay slot */</div><div class='add'>+					if (filter[i].jf) {</div><div class='add'>+						emit_jump(f_offset);</div><div class='add'>+						emit_nop();</div><div class='add'>+					}</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+				emit_branch(f_op, f_offset);</div><div class='add'>+				emit_nop(); /* delay slot */</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			default:</div><div class='add'>+				/* hmm, too complex filter, give up with jit compiler */</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			ilen = (void *) prog - (void *) temp;</div><div class='add'>+			if (image) {</div><div class='add'>+				if (unlikely(proglen + ilen &gt; oldproglen)) {</div><div class='add'>+					pr_err("bpb_jit_compile fatal error\n");</div><div class='add'>+					kfree(addrs);</div><div class='add'>+					module_free(NULL, image);</div><div class='add'>+					return;</div><div class='add'>+				}</div><div class='add'>+				memcpy(image + proglen, temp, ilen);</div><div class='add'>+			}</div><div class='add'>+			proglen += ilen;</div><div class='add'>+			addrs[i] = proglen;</div><div class='add'>+			prog = temp;</div><div class='add'>+		}</div><div class='add'>+		/* last bpf instruction is always a RET :</div><div class='add'>+		 * use it to give the cleanup instruction(s) addr</div><div class='add'>+		 */</div><div class='add'>+		cleanup_addr = proglen - 8; /* jmpl; mov r_A,%o0; */</div><div class='add'>+		if (seen_or_pass0 &amp; SEEN_MEM)</div><div class='add'>+			cleanup_addr -= 4; /* add %sp, X, %sp; */</div><div class='add'>+</div><div class='add'>+		if (image) {</div><div class='add'>+			if (proglen != oldproglen)</div><div class='add'>+				pr_err("bpb_jit_compile proglen=%u != oldproglen=%u\n",</div><div class='add'>+				       proglen, oldproglen);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (proglen == oldproglen) {</div><div class='add'>+			image = module_alloc(max_t(unsigned int,</div><div class='add'>+						   proglen,</div><div class='add'>+						   sizeof(struct work_struct)));</div><div class='add'>+			if (!image)</div><div class='add'>+				goto out;</div><div class='add'>+		}</div><div class='add'>+		oldproglen = proglen;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bpf_jit_enable &gt; 1)</div><div class='add'>+		pr_err("flen=%d proglen=%u pass=%d image=%p\n",</div><div class='add'>+		       flen, proglen, pass, image);</div><div class='add'>+</div><div class='add'>+	if (image) {</div><div class='add'>+		if (bpf_jit_enable &gt; 1)</div><div class='add'>+			print_hex_dump(KERN_ERR, "JIT code: ", DUMP_PREFIX_ADDRESS,</div><div class='add'>+				       16, 1, image, proglen, false);</div><div class='add'>+		bpf_flush_icache(image, image + proglen);</div><div class='add'>+		fp-&gt;bpf_func = (void *)image;</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	kfree(addrs);</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void jit_free_defer(struct work_struct *arg)</div><div class='add'>+{</div><div class='add'>+	module_free(NULL, arg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* run from softirq, we must use a work_struct to call</div><div class='add'>+ * module_free() from process context</div><div class='add'>+ */</div><div class='add'>+void bpf_jit_free(struct sk_filter *fp)</div><div class='add'>+{</div><div class='add'>+	if (fp-&gt;bpf_func != sk_run_filter) {</div><div class='add'>+		struct work_struct *work = (struct work_struct *)fp-&gt;bpf_func;</div><div class='add'>+</div><div class='add'>+		INIT_WORK(work, jit_free_defer);</div><div class='add'>+		schedule_work(work);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/sparc/prom/Makefile b/arch/sparc/prom/Makefile<br/>index 8287bbe88768..020300b18c0b 100644<br/>--- a/<a href='/drm-misc/tree/arch/sparc/prom/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/prom/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/sparc/prom/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/sparc/prom/Makefile</a></div><div class='hunk'>@@ -10,7 +10,6 @@ lib-$(CONFIG_SPARC32) += memory.o</div><div class='ctx'> lib-y                 += misc_$(BITS).o</div><div class='ctx'> lib-$(CONFIG_SPARC32) += mp.o</div><div class='ctx'> lib-$(CONFIG_SPARC32) += ranges.o</div><div class='del'>-lib-$(CONFIG_SPARC32) += segment.o</div><div class='ctx'> lib-y                 += console_$(BITS).o</div><div class='ctx'> lib-y                 += printf.o</div><div class='ctx'> lib-y                 += tree_$(BITS).o</div><div class='head'>diff --git a/arch/sparc/prom/segment.c b/arch/sparc/prom/segment.c<br/>deleted file mode 100644<br/>index 86a663f1d3c5..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/sparc/prom/segment.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/sparc/prom/segment.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * segment.c:  Prom routine to map segments in other contexts before</div><div class='del'>- *             a standalone is completely mapped.  This is for sun4 and</div><div class='del'>- *             sun4c architectures only.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;asm/openprom.h&gt;</div><div class='del'>-#include &lt;asm/oplib.h&gt;</div><div class='del'>-</div><div class='del'>-extern void restore_current(void);</div><div class='del'>-</div><div class='del'>-/* Set physical segment 'segment' at virtual address 'vaddr' in</div><div class='del'>- * context 'ctx'.</div><div class='del'>- */</div><div class='del'>-void</div><div class='del'>-prom_putsegment(int ctx, unsigned long vaddr, int segment)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	spin_lock_irqsave(&amp;prom_lock, flags);</div><div class='del'>-	(*(romvec-&gt;pv_setctxt))(ctx, (char *) vaddr, segment);</div><div class='del'>-	restore_current();</div><div class='del'>-	spin_unlock_irqrestore(&amp;prom_lock, flags);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig<br/>index 96033e2d6845..fe128816c448 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/Kconfig</a></div><div class='hunk'>@@ -11,8 +11,10 @@ config TILE</div><div class='ctx'> 	select GENERIC_IRQ_PROBE</div><div class='ctx'> 	select GENERIC_PENDING_IRQ if SMP</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='add'>+	select HAVE_SYSCALL_WRAPPERS if TILEGX</div><div class='ctx'> 	select SYS_HYPERVISOR</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='ctx'> </div><div class='ctx'> # FIXME: investigate whether we need/want these options.</div><div class='ctx'> #	select HAVE_IOREMAP_PROT</div><div class='hunk'>@@ -46,7 +48,12 @@ config NEED_PER_CPU_PAGE_FIRST_CHUNK</div><div class='ctx'> config SYS_SUPPORTS_HUGETLBFS</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='add'>+# Support for additional huge page sizes besides HPAGE_SIZE.</div><div class='add'>+# The software support is currently only present in the TILE-Gx</div><div class='add'>+# hypervisor. TILEPro in any case does not support page sizes</div><div class='add'>+# larger than the default HPAGE_SIZE.</div><div class='add'>+config HUGETLB_SUPER_PAGES</div><div class='add'>+	depends on HUGETLB_PAGE &amp;&amp; TILEGX</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='ctx'> # FIXME: tilegx can implement a more efficient rwsem.</div><div class='hunk'>@@ -108,16 +115,14 @@ config HVC_TILE</div><div class='ctx'> 	select HVC_DRIVER</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-# Please note: TILE-Gx support is not yet finalized; this is</div><div class='del'>-# the preliminary support.  TILE-Gx drivers are only provided</div><div class='del'>-# with the alpha or beta test versions for Tilera customers.</div><div class='ctx'> config TILEGX</div><div class='del'>-	depends on EXPERIMENTAL</div><div class='ctx'> 	bool "Building with TILE-Gx (64-bit) compiler and toolchain"</div><div class='ctx'> </div><div class='add'>+config TILEPRO</div><div class='add'>+	def_bool !TILEGX</div><div class='add'>+</div><div class='ctx'> config 64BIT</div><div class='del'>-	depends on TILEGX</div><div class='del'>-	def_bool y</div><div class='add'>+	def_bool TILEGX</div><div class='ctx'> </div><div class='ctx'> config ARCH_DEFCONFIG</div><div class='ctx'> 	string</div><div class='hunk'>@@ -138,7 +143,30 @@ config NR_CPUS</div><div class='ctx'> 	  smaller kernel memory footprint results from using a smaller</div><div class='ctx'> 	  value on chips with fewer tiles.</div><div class='ctx'> </div><div class='del'>-source "kernel/time/Kconfig"</div><div class='add'>+if TILEGX</div><div class='add'>+</div><div class='add'>+choice</div><div class='add'>+	prompt "Kernel page size"</div><div class='add'>+	default PAGE_SIZE_64KB</div><div class='add'>+	help</div><div class='add'>+	  This lets you select the page size of the kernel.  For best</div><div class='add'>+	  performance on memory-intensive applications, a page size of 64KB</div><div class='add'>+	  is recommended.  For workloads involving many small files, many</div><div class='add'>+	  connections, etc., it may be better to select 16KB, which uses</div><div class='add'>+	  memory more efficiently at some cost in TLB performance.</div><div class='add'>+</div><div class='add'>+	  Note that this option is TILE-Gx specific; currently</div><div class='add'>+	  TILEPro page size is set by rebuilding the hypervisor.</div><div class='add'>+</div><div class='add'>+config PAGE_SIZE_16KB</div><div class='add'>+	bool "16KB"</div><div class='add'>+</div><div class='add'>+config PAGE_SIZE_64KB</div><div class='add'>+	bool "64KB"</div><div class='add'>+</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='add'>+endif</div><div class='ctx'> </div><div class='ctx'> source "kernel/Kconfig.hz"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/Makefile b/arch/tile/Makefile<br/>index 9520bc5a4b7f..e20b0a0b64a1 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/Makefile</a></div><div class='hunk'>@@ -34,7 +34,12 @@ LIBGCC_PATH     := \</div><div class='ctx'>   $(shell $(CC) $(KBUILD_CFLAGS) $(KCFLAGS) -print-libgcc-file-name)</div><div class='ctx'> </div><div class='ctx'> # Provide the path to use for "make defconfig".</div><div class='del'>-KBUILD_DEFCONFIG := $(ARCH)_defconfig</div><div class='add'>+# We default to the newer TILE-Gx architecture if only "tile" is given.</div><div class='add'>+ifeq ($(ARCH),tile)</div><div class='add'>+        KBUILD_DEFCONFIG := tilegx_defconfig</div><div class='add'>+else</div><div class='add'>+        KBUILD_DEFCONFIG := $(ARCH)_defconfig</div><div class='add'>+endif</div><div class='ctx'> </div><div class='ctx'> # Used as a file extension when useful, e.g. head_$(BITS).o</div><div class='ctx'> # Not needed for (e.g.) "$(CC) -m32" since the compiler automatically</div><div class='head'>diff --git a/arch/tile/include/arch/spr_def_32.h b/arch/tile/include/arch/spr_def_32.h<br/>index bbc1f4c924ee..78bbce2fb19a 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/arch/spr_def_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/arch/spr_def_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/arch/spr_def_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/arch/spr_def_32.h</a></div><div class='hunk'>@@ -65,6 +65,31 @@</div><div class='ctx'> #define SPR_EX_CONTEXT_2_1__ICS_RMASK 0x1</div><div class='ctx'> #define SPR_EX_CONTEXT_2_1__ICS_MASK  0x4</div><div class='ctx'> #define SPR_FAIL 0x4e09</div><div class='add'>+#define SPR_IDN_AVAIL_EN 0x3e05</div><div class='add'>+#define SPR_IDN_CA_DATA 0x0b00</div><div class='add'>+#define SPR_IDN_DATA_AVAIL 0x0b03</div><div class='add'>+#define SPR_IDN_DEADLOCK_TIMEOUT 0x3406</div><div class='add'>+#define SPR_IDN_DEMUX_CA_COUNT 0x0a05</div><div class='add'>+#define SPR_IDN_DEMUX_COUNT_0 0x0a06</div><div class='add'>+#define SPR_IDN_DEMUX_COUNT_1 0x0a07</div><div class='add'>+#define SPR_IDN_DEMUX_CTL 0x0a08</div><div class='add'>+#define SPR_IDN_DEMUX_QUEUE_SEL 0x0a0a</div><div class='add'>+#define SPR_IDN_DEMUX_STATUS 0x0a0b</div><div class='add'>+#define SPR_IDN_DEMUX_WRITE_FIFO 0x0a0c</div><div class='add'>+#define SPR_IDN_DIRECTION_PROTECT 0x2e05</div><div class='add'>+#define SPR_IDN_PENDING 0x0a0e</div><div class='add'>+#define SPR_IDN_REFILL_EN 0x0e05</div><div class='add'>+#define SPR_IDN_SP_FIFO_DATA 0x0a0f</div><div class='add'>+#define SPR_IDN_SP_FIFO_SEL 0x0a10</div><div class='add'>+#define SPR_IDN_SP_FREEZE 0x0a11</div><div class='add'>+#define SPR_IDN_SP_FREEZE__SP_FRZ_MASK  0x1</div><div class='add'>+#define SPR_IDN_SP_FREEZE__DEMUX_FRZ_MASK  0x2</div><div class='add'>+#define SPR_IDN_SP_FREEZE__NON_DEST_EXT_MASK  0x4</div><div class='add'>+#define SPR_IDN_SP_STATE 0x0a12</div><div class='add'>+#define SPR_IDN_TAG_0 0x0a13</div><div class='add'>+#define SPR_IDN_TAG_1 0x0a14</div><div class='add'>+#define SPR_IDN_TAG_VALID 0x0a15</div><div class='add'>+#define SPR_IDN_TILE_COORD 0x0a16</div><div class='ctx'> #define SPR_INTCTRL_0_STATUS 0x4a07</div><div class='ctx'> #define SPR_INTCTRL_1_STATUS 0x4807</div><div class='ctx'> #define SPR_INTCTRL_2_STATUS 0x4607</div><div class='hunk'>@@ -87,12 +112,36 @@</div><div class='ctx'> #define SPR_INTERRUPT_MASK_SET_1_1 0x480e</div><div class='ctx'> #define SPR_INTERRUPT_MASK_SET_2_0 0x460c</div><div class='ctx'> #define SPR_INTERRUPT_MASK_SET_2_1 0x460d</div><div class='add'>+#define SPR_MPL_AUX_PERF_COUNT_SET_0 0x6000</div><div class='add'>+#define SPR_MPL_AUX_PERF_COUNT_SET_1 0x6001</div><div class='add'>+#define SPR_MPL_AUX_PERF_COUNT_SET_2 0x6002</div><div class='ctx'> #define SPR_MPL_DMA_CPL_SET_0 0x5800</div><div class='ctx'> #define SPR_MPL_DMA_CPL_SET_1 0x5801</div><div class='ctx'> #define SPR_MPL_DMA_CPL_SET_2 0x5802</div><div class='ctx'> #define SPR_MPL_DMA_NOTIFY_SET_0 0x3800</div><div class='ctx'> #define SPR_MPL_DMA_NOTIFY_SET_1 0x3801</div><div class='ctx'> #define SPR_MPL_DMA_NOTIFY_SET_2 0x3802</div><div class='add'>+#define SPR_MPL_IDN_ACCESS_SET_0 0x0a00</div><div class='add'>+#define SPR_MPL_IDN_ACCESS_SET_1 0x0a01</div><div class='add'>+#define SPR_MPL_IDN_ACCESS_SET_2 0x0a02</div><div class='add'>+#define SPR_MPL_IDN_AVAIL_SET_0 0x3e00</div><div class='add'>+#define SPR_MPL_IDN_AVAIL_SET_1 0x3e01</div><div class='add'>+#define SPR_MPL_IDN_AVAIL_SET_2 0x3e02</div><div class='add'>+#define SPR_MPL_IDN_CA_SET_0 0x3a00</div><div class='add'>+#define SPR_MPL_IDN_CA_SET_1 0x3a01</div><div class='add'>+#define SPR_MPL_IDN_CA_SET_2 0x3a02</div><div class='add'>+#define SPR_MPL_IDN_COMPLETE_SET_0 0x1200</div><div class='add'>+#define SPR_MPL_IDN_COMPLETE_SET_1 0x1201</div><div class='add'>+#define SPR_MPL_IDN_COMPLETE_SET_2 0x1202</div><div class='add'>+#define SPR_MPL_IDN_FIREWALL_SET_0 0x2e00</div><div class='add'>+#define SPR_MPL_IDN_FIREWALL_SET_1 0x2e01</div><div class='add'>+#define SPR_MPL_IDN_FIREWALL_SET_2 0x2e02</div><div class='add'>+#define SPR_MPL_IDN_REFILL_SET_0 0x0e00</div><div class='add'>+#define SPR_MPL_IDN_REFILL_SET_1 0x0e01</div><div class='add'>+#define SPR_MPL_IDN_REFILL_SET_2 0x0e02</div><div class='add'>+#define SPR_MPL_IDN_TIMER_SET_0 0x3400</div><div class='add'>+#define SPR_MPL_IDN_TIMER_SET_1 0x3401</div><div class='add'>+#define SPR_MPL_IDN_TIMER_SET_2 0x3402</div><div class='ctx'> #define SPR_MPL_INTCTRL_0_SET_0 0x4a00</div><div class='ctx'> #define SPR_MPL_INTCTRL_0_SET_1 0x4a01</div><div class='ctx'> #define SPR_MPL_INTCTRL_0_SET_2 0x4a02</div><div class='hunk'>@@ -102,6 +151,9 @@</div><div class='ctx'> #define SPR_MPL_INTCTRL_2_SET_0 0x4600</div><div class='ctx'> #define SPR_MPL_INTCTRL_2_SET_1 0x4601</div><div class='ctx'> #define SPR_MPL_INTCTRL_2_SET_2 0x4602</div><div class='add'>+#define SPR_MPL_PERF_COUNT_SET_0 0x4200</div><div class='add'>+#define SPR_MPL_PERF_COUNT_SET_1 0x4201</div><div class='add'>+#define SPR_MPL_PERF_COUNT_SET_2 0x4202</div><div class='ctx'> #define SPR_MPL_SN_ACCESS_SET_0 0x0800</div><div class='ctx'> #define SPR_MPL_SN_ACCESS_SET_1 0x0801</div><div class='ctx'> #define SPR_MPL_SN_ACCESS_SET_2 0x0802</div><div class='hunk'>@@ -181,6 +233,7 @@</div><div class='ctx'> #define SPR_UDN_DEMUX_STATUS 0x0c0d</div><div class='ctx'> #define SPR_UDN_DEMUX_WRITE_FIFO 0x0c0e</div><div class='ctx'> #define SPR_UDN_DIRECTION_PROTECT 0x3005</div><div class='add'>+#define SPR_UDN_PENDING 0x0c10</div><div class='ctx'> #define SPR_UDN_REFILL_EN 0x1005</div><div class='ctx'> #define SPR_UDN_SP_FIFO_DATA 0x0c11</div><div class='ctx'> #define SPR_UDN_SP_FIFO_SEL 0x0c12</div><div class='hunk'>@@ -195,6 +248,9 @@</div><div class='ctx'> #define SPR_UDN_TAG_3 0x0c18</div><div class='ctx'> #define SPR_UDN_TAG_VALID 0x0c19</div><div class='ctx'> #define SPR_UDN_TILE_COORD 0x0c1a</div><div class='add'>+#define SPR_WATCH_CTL 0x4209</div><div class='add'>+#define SPR_WATCH_MASK 0x420a</div><div class='add'>+#define SPR_WATCH_VAL 0x420b</div><div class='ctx'> </div><div class='ctx'> #endif /* !defined(__ARCH_SPR_DEF_H__) */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/include/arch/spr_def_64.h b/arch/tile/include/arch/spr_def_64.h<br/>index cd3e5f95d5fd..0da86faa3370 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/arch/spr_def_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/arch/spr_def_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/arch/spr_def_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/arch/spr_def_64.h</a></div><div class='hunk'>@@ -52,6 +52,13 @@</div><div class='ctx'> #define SPR_EX_CONTEXT_2_1__ICS_RMASK 0x1</div><div class='ctx'> #define SPR_EX_CONTEXT_2_1__ICS_MASK  0x4</div><div class='ctx'> #define SPR_FAIL 0x2707</div><div class='add'>+#define SPR_IDN_AVAIL_EN 0x1a05</div><div class='add'>+#define SPR_IDN_DATA_AVAIL 0x0a80</div><div class='add'>+#define SPR_IDN_DEADLOCK_TIMEOUT 0x1806</div><div class='add'>+#define SPR_IDN_DEMUX_COUNT_0 0x0a05</div><div class='add'>+#define SPR_IDN_DEMUX_COUNT_1 0x0a06</div><div class='add'>+#define SPR_IDN_DIRECTION_PROTECT 0x1405</div><div class='add'>+#define SPR_IDN_PENDING 0x0a08</div><div class='ctx'> #define SPR_ILL_TRANS_REASON__I_STREAM_VA_RMASK 0x1</div><div class='ctx'> #define SPR_INTCTRL_0_STATUS 0x2505</div><div class='ctx'> #define SPR_INTCTRL_1_STATUS 0x2405</div><div class='hunk'>@@ -88,9 +95,27 @@</div><div class='ctx'> #define SPR_IPI_MASK_SET_0 0x1f0a</div><div class='ctx'> #define SPR_IPI_MASK_SET_1 0x1e0a</div><div class='ctx'> #define SPR_IPI_MASK_SET_2 0x1d0a</div><div class='add'>+#define SPR_MPL_AUX_PERF_COUNT_SET_0 0x2100</div><div class='add'>+#define SPR_MPL_AUX_PERF_COUNT_SET_1 0x2101</div><div class='add'>+#define SPR_MPL_AUX_PERF_COUNT_SET_2 0x2102</div><div class='ctx'> #define SPR_MPL_AUX_TILE_TIMER_SET_0 0x1700</div><div class='ctx'> #define SPR_MPL_AUX_TILE_TIMER_SET_1 0x1701</div><div class='ctx'> #define SPR_MPL_AUX_TILE_TIMER_SET_2 0x1702</div><div class='add'>+#define SPR_MPL_IDN_ACCESS_SET_0 0x0a00</div><div class='add'>+#define SPR_MPL_IDN_ACCESS_SET_1 0x0a01</div><div class='add'>+#define SPR_MPL_IDN_ACCESS_SET_2 0x0a02</div><div class='add'>+#define SPR_MPL_IDN_AVAIL_SET_0 0x1a00</div><div class='add'>+#define SPR_MPL_IDN_AVAIL_SET_1 0x1a01</div><div class='add'>+#define SPR_MPL_IDN_AVAIL_SET_2 0x1a02</div><div class='add'>+#define SPR_MPL_IDN_COMPLETE_SET_0 0x0500</div><div class='add'>+#define SPR_MPL_IDN_COMPLETE_SET_1 0x0501</div><div class='add'>+#define SPR_MPL_IDN_COMPLETE_SET_2 0x0502</div><div class='add'>+#define SPR_MPL_IDN_FIREWALL_SET_0 0x1400</div><div class='add'>+#define SPR_MPL_IDN_FIREWALL_SET_1 0x1401</div><div class='add'>+#define SPR_MPL_IDN_FIREWALL_SET_2 0x1402</div><div class='add'>+#define SPR_MPL_IDN_TIMER_SET_0 0x1800</div><div class='add'>+#define SPR_MPL_IDN_TIMER_SET_1 0x1801</div><div class='add'>+#define SPR_MPL_IDN_TIMER_SET_2 0x1802</div><div class='ctx'> #define SPR_MPL_INTCTRL_0_SET_0 0x2500</div><div class='ctx'> #define SPR_MPL_INTCTRL_0_SET_1 0x2501</div><div class='ctx'> #define SPR_MPL_INTCTRL_0_SET_2 0x2502</div><div class='hunk'>@@ -100,6 +125,21 @@</div><div class='ctx'> #define SPR_MPL_INTCTRL_2_SET_0 0x2300</div><div class='ctx'> #define SPR_MPL_INTCTRL_2_SET_1 0x2301</div><div class='ctx'> #define SPR_MPL_INTCTRL_2_SET_2 0x2302</div><div class='add'>+#define SPR_MPL_IPI_0 0x1f04</div><div class='add'>+#define SPR_MPL_IPI_0_SET_0 0x1f00</div><div class='add'>+#define SPR_MPL_IPI_0_SET_1 0x1f01</div><div class='add'>+#define SPR_MPL_IPI_0_SET_2 0x1f02</div><div class='add'>+#define SPR_MPL_IPI_1 0x1e04</div><div class='add'>+#define SPR_MPL_IPI_1_SET_0 0x1e00</div><div class='add'>+#define SPR_MPL_IPI_1_SET_1 0x1e01</div><div class='add'>+#define SPR_MPL_IPI_1_SET_2 0x1e02</div><div class='add'>+#define SPR_MPL_IPI_2 0x1d04</div><div class='add'>+#define SPR_MPL_IPI_2_SET_0 0x1d00</div><div class='add'>+#define SPR_MPL_IPI_2_SET_1 0x1d01</div><div class='add'>+#define SPR_MPL_IPI_2_SET_2 0x1d02</div><div class='add'>+#define SPR_MPL_PERF_COUNT_SET_0 0x2000</div><div class='add'>+#define SPR_MPL_PERF_COUNT_SET_1 0x2001</div><div class='add'>+#define SPR_MPL_PERF_COUNT_SET_2 0x2002</div><div class='ctx'> #define SPR_MPL_UDN_ACCESS_SET_0 0x0b00</div><div class='ctx'> #define SPR_MPL_UDN_ACCESS_SET_1 0x0b01</div><div class='ctx'> #define SPR_MPL_UDN_ACCESS_SET_2 0x0b02</div><div class='hunk'>@@ -167,6 +207,9 @@</div><div class='ctx'> #define SPR_UDN_DEMUX_COUNT_2 0x0b07</div><div class='ctx'> #define SPR_UDN_DEMUX_COUNT_3 0x0b08</div><div class='ctx'> #define SPR_UDN_DIRECTION_PROTECT 0x1505</div><div class='add'>+#define SPR_UDN_PENDING 0x0b0a</div><div class='add'>+#define SPR_WATCH_MASK 0x200a</div><div class='add'>+#define SPR_WATCH_VAL 0x200b</div><div class='ctx'> </div><div class='ctx'> #endif /* !defined(__ARCH_SPR_DEF_H__) */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/include/asm/Kbuild b/arch/tile/include/asm/Kbuild<br/>index 0bb42642343a..143473e3a0bb 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/Kbuild?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/Kbuild</a></div><div class='hunk'>@@ -2,6 +2,7 @@ include include/asm-generic/Kbuild.asm</div><div class='ctx'> </div><div class='ctx'> header-y += ../arch/</div><div class='ctx'> </div><div class='add'>+header-y += cachectl.h</div><div class='ctx'> header-y += ucontext.h</div><div class='ctx'> header-y += hardwall.h</div><div class='ctx'> </div><div class='hunk'>@@ -21,7 +22,6 @@ generic-y += ipcbuf.h</div><div class='ctx'> generic-y += irq_regs.h</div><div class='ctx'> generic-y += kdebug.h</div><div class='ctx'> generic-y += local.h</div><div class='del'>-generic-y += module.h</div><div class='ctx'> generic-y += msgbuf.h</div><div class='ctx'> generic-y += mutex.h</div><div class='ctx'> generic-y += param.h</div><div class='head'>diff --git a/arch/tile/include/asm/atomic_32.h b/arch/tile/include/asm/atomic_32.h<br/>index 54d1da826f93..e7fb5cfb9597 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/atomic_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/atomic_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/atomic_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/atomic_32.h</a></div><div class='hunk'>@@ -303,7 +303,14 @@ void __init_atomic_per_cpu(void);</div><div class='ctx'> void __atomic_fault_unlock(int *lock_ptr);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/* Return a pointer to the lock for the given address. */</div><div class='add'>+int *__atomic_hashed_lock(volatile void *v);</div><div class='add'>+</div><div class='ctx'> /* Private helper routines in lib/atomic_asm_32.S */</div><div class='add'>+struct __get_user {</div><div class='add'>+	unsigned long val;</div><div class='add'>+	int err;</div><div class='add'>+};</div><div class='ctx'> extern struct __get_user __atomic_cmpxchg(volatile int *p,</div><div class='ctx'> 					  int *lock, int o, int n);</div><div class='ctx'> extern struct __get_user __atomic_xchg(volatile int *p, int *lock, int n);</div><div class='hunk'>@@ -319,6 +326,9 @@ extern u64 __atomic64_xchg_add(volatile u64 *p, int *lock, u64 n);</div><div class='ctx'> extern u64 __atomic64_xchg_add_unless(volatile u64 *p,</div><div class='ctx'> 				      int *lock, u64 o, u64 n);</div><div class='ctx'> </div><div class='add'>+/* Return failure from the atomic wrappers. */</div><div class='add'>+struct __get_user __atomic_bad_address(int __user *addr);</div><div class='add'>+</div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_TILE_ATOMIC_32_H */</div><div class='head'>diff --git a/arch/tile/include/asm/bitops.h b/arch/tile/include/asm/bitops.h<br/>index 16f1fa51fea1..bd186c4eaa50 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/bitops.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/bitops.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/bitops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/bitops.h</a></div><div class='hunk'>@@ -77,6 +77,11 @@ static inline int ffs(int x)</div><div class='ctx'> 	return __builtin_ffs(x);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int fls64(__u64 w)</div><div class='add'>+{</div><div class='add'>+	return (sizeof(__u64) * 8) - __builtin_clzll(w);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * fls - find last set bit in word</div><div class='ctx'>  * @x: the word to search</div><div class='hunk'>@@ -90,12 +95,7 @@ static inline int ffs(int x)</div><div class='ctx'>  */</div><div class='ctx'> static inline int fls(int x)</div><div class='ctx'> {</div><div class='del'>-	return (sizeof(int) * 8) - __builtin_clz(x);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int fls64(__u64 w)</div><div class='del'>-{</div><div class='del'>-	return (sizeof(__u64) * 8) - __builtin_clzll(w);</div><div class='add'>+	return fls64((unsigned int) x);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int __arch_hweight32(unsigned int w)</div><div class='head'>diff --git a/arch/tile/include/asm/byteorder.h b/arch/tile/include/asm/byteorder.h<br/>index 9558416d578b..fb72ecf49218 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/byteorder.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/byteorder.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/byteorder.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/byteorder.h</a></div><div class='hunk'>@@ -1 +1,21 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Tilera Corporation. All Rights Reserved.</div><div class='add'>+ *</div><div class='add'>+ *   This program is free software; you can redistribute it and/or</div><div class='add'>+ *   modify it under the terms of the GNU General Public License</div><div class='add'>+ *   as published by the Free Software Foundation, version 2.</div><div class='add'>+ *</div><div class='add'>+ *   This program is distributed in the hope that it will be useful, but</div><div class='add'>+ *   WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or</div><div class='add'>+ *   NON INFRINGEMENT.  See the GNU General Public License for</div><div class='add'>+ *   more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#if defined (__BIG_ENDIAN__)</div><div class='add'>+#include &lt;linux/byteorder/big_endian.h&gt;</div><div class='add'>+#elif defined (__LITTLE_ENDIAN__)</div><div class='ctx'> #include &lt;linux/byteorder/little_endian.h&gt;</div><div class='add'>+#else</div><div class='add'>+#error "__BIG_ENDIAN__ or __LITTLE_ENDIAN__ must be defined."</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/tile/include/asm/cachectl.h b/arch/tile/include/asm/cachectl.h<br/>new file mode 100644<br/>index 000000000000..af4c9f9154d1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/cachectl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/cachectl.h</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Tilera Corporation. All Rights Reserved.</div><div class='add'>+ *</div><div class='add'>+ *   This program is free software; you can redistribute it and/or</div><div class='add'>+ *   modify it under the terms of the GNU General Public License</div><div class='add'>+ *   as published by the Free Software Foundation, version 2.</div><div class='add'>+ *</div><div class='add'>+ *   This program is distributed in the hope that it will be useful, but</div><div class='add'>+ *   WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or</div><div class='add'>+ *   NON INFRINGEMENT.  See the GNU General Public License for</div><div class='add'>+ *   more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_TILE_CACHECTL_H</div><div class='add'>+#define _ASM_TILE_CACHECTL_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Options for cacheflush system call.</div><div class='add'>+ *</div><div class='add'>+ * The ICACHE flush is performed on all cores currently running the</div><div class='add'>+ * current process's address space.  The intent is for user</div><div class='add'>+ * applications to be able to modify code, invoke the system call,</div><div class='add'>+ * then allow arbitrary other threads in the same address space to see</div><div class='add'>+ * the newly-modified code.  Passing a length of CHIP_L1I_CACHE_SIZE()</div><div class='add'>+ * or more invalidates the entire icache on all cores in the address</div><div class='add'>+ * spaces.  (Note: currently this option invalidates the entire icache</div><div class='add'>+ * regardless of the requested address and length, but we may choose</div><div class='add'>+ * to honor the arguments at some point.)</div><div class='add'>+ *</div><div class='add'>+ * Flush and invalidation of memory can normally be performed with the</div><div class='add'>+ * __insn_flush(), __insn_inv(), and __insn_finv() instructions from</div><div class='add'>+ * userspace.  The DCACHE option to the system call allows userspace</div><div class='add'>+ * to flush the entire L1+L2 data cache from the core.  In this case,</div><div class='add'>+ * the address and length arguments are not used.  The DCACHE flush is</div><div class='add'>+ * restricted to the current core, not all cores in the address space.</div><div class='add'>+ */</div><div class='add'>+#define	ICACHE	(1&lt;&lt;0)		/* invalidate L1 instruction cache */</div><div class='add'>+#define	DCACHE	(1&lt;&lt;1)		/* flush and invalidate data cache */</div><div class='add'>+#define	BCACHE	(ICACHE|DCACHE)	/* flush both caches               */</div><div class='add'>+</div><div class='add'>+#endif	/* _ASM_TILE_CACHECTL_H */</div><div class='head'>diff --git a/arch/tile/include/asm/compat.h b/arch/tile/include/asm/compat.h<br/>index 4b4b28969a65..6e74450ff0a1 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/compat.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/compat.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/compat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/compat.h</a></div><div class='hunk'>@@ -44,7 +44,6 @@ typedef __kernel_uid32_t __compat_gid32_t;</div><div class='ctx'> typedef __kernel_mode_t compat_mode_t;</div><div class='ctx'> typedef __kernel_dev_t compat_dev_t;</div><div class='ctx'> typedef __kernel_loff_t compat_loff_t;</div><div class='del'>-typedef __kernel_nlink_t compat_nlink_t;</div><div class='ctx'> typedef __kernel_ipc_pid_t compat_ipc_pid_t;</div><div class='ctx'> typedef __kernel_daddr_t compat_daddr_t;</div><div class='ctx'> typedef __kernel_fsid_t	compat_fsid_t;</div><div class='hunk'>@@ -242,9 +241,6 @@ long compat_sys_fallocate(int fd, int mode,</div><div class='ctx'> long compat_sys_sched_rr_get_interval(compat_pid_t pid,</div><div class='ctx'> 				      struct compat_timespec __user *interval);</div><div class='ctx'> </div><div class='del'>-/* Tilera Linux syscalls that don't have "compat" versions. */</div><div class='del'>-#define compat_sys_flush_cache sys_flush_cache</div><div class='del'>-</div><div class='ctx'> /* These are the intvec_64.S trampolines. */</div><div class='ctx'> long _compat_sys_execve(const char __user *path,</div><div class='ctx'> 			const compat_uptr_t __user *argv,</div><div class='head'>diff --git a/arch/tile/include/asm/elf.h b/arch/tile/include/asm/elf.h<br/>index 623a6bb741c1..d16d006d660e 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/elf.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/elf.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/elf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/elf.h</a></div><div class='hunk'>@@ -44,7 +44,11 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];</div><div class='ctx'> #else</div><div class='ctx'> #define ELF_CLASS	ELFCLASS32</div><div class='ctx'> #endif</div><div class='add'>+#ifdef __BIG_ENDIAN__</div><div class='add'>+#define ELF_DATA	ELFDATA2MSB</div><div class='add'>+#else</div><div class='ctx'> #define ELF_DATA	ELFDATA2LSB</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * There seems to be a bug in how compat_binfmt_elf.c works: it</div><div class='hunk'>@@ -59,6 +63,7 @@ enum { ELF_ARCH = CHIP_ELF_TYPE() };</div><div class='ctx'>  */</div><div class='ctx'> #define elf_check_arch(x)  \</div><div class='ctx'> 	((x)-&gt;e_ident[EI_CLASS] == ELF_CLASS &amp;&amp; \</div><div class='add'>+	 (x)-&gt;e_ident[EI_DATA] == ELF_DATA &amp;&amp; \</div><div class='ctx'> 	 (x)-&gt;e_machine == CHIP_ELF_TYPE())</div><div class='ctx'> </div><div class='ctx'> /* The module loader only handles a few relocation types. */</div><div class='head'>diff --git a/arch/tile/include/asm/futex.h b/arch/tile/include/asm/futex.h<br/>index d03ec124a598..5909ac3d7218 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/futex.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/futex.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/futex.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/futex.h</a></div><div class='hunk'>@@ -28,29 +28,81 @@</div><div class='ctx'> #include &lt;linux/futex.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;asm/atomic.h&gt;</div><div class='ctx'> </div><div class='del'>-extern struct __get_user futex_set(u32 __user *v, int i);</div><div class='del'>-extern struct __get_user futex_add(u32 __user *v, int n);</div><div class='del'>-extern struct __get_user futex_or(u32 __user *v, int n);</div><div class='del'>-extern struct __get_user futex_andn(u32 __user *v, int n);</div><div class='del'>-extern struct __get_user futex_cmpxchg(u32 __user *v, int o, int n);</div><div class='add'>+/*</div><div class='add'>+ * Support macros for futex operations.  Do not use these macros directly.</div><div class='add'>+ * They assume "ret", "val", "oparg", and "uaddr" in the lexical context.</div><div class='add'>+ * __futex_cmpxchg() additionally assumes "oldval".</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef __tilegx__</div><div class='add'>+</div><div class='add'>+#define __futex_asm(OP) \</div><div class='add'>+	asm("1: {" #OP " %1, %3, %4; movei %0, 0 }\n"		\</div><div class='add'>+	    ".pushsection .fixup,\"ax\"\n"			\</div><div class='add'>+	    "0: { movei %0, %5; j 9f }\n"			\</div><div class='add'>+	    ".section __ex_table,\"a\"\n"			\</div><div class='add'>+	    ".quad 1b, 0b\n"					\</div><div class='add'>+	    ".popsection\n"					\</div><div class='add'>+	    "9:"						\</div><div class='add'>+	    : "=r" (ret), "=r" (val), "+m" (*(uaddr))		\</div><div class='add'>+	    : "r" (uaddr), "r" (oparg), "i" (-EFAULT))</div><div class='add'>+</div><div class='add'>+#define __futex_set() __futex_asm(exch4)</div><div class='add'>+#define __futex_add() __futex_asm(fetchadd4)</div><div class='add'>+#define __futex_or() __futex_asm(fetchor4)</div><div class='add'>+#define __futex_andn() ({ oparg = ~oparg; __futex_asm(fetchand4); })</div><div class='add'>+#define __futex_cmpxchg() \</div><div class='add'>+	({ __insn_mtspr(SPR_CMPEXCH_VALUE, oldval); __futex_asm(cmpexch4); })</div><div class='add'>+</div><div class='add'>+#define __futex_xor()						\</div><div class='add'>+	({							\</div><div class='add'>+		u32 oldval, n = oparg;				\</div><div class='add'>+		if ((ret = __get_user(oldval, uaddr)) == 0) {	\</div><div class='add'>+			do {					\</div><div class='add'>+				oparg = oldval ^ n;		\</div><div class='add'>+				__futex_cmpxchg();		\</div><div class='add'>+			} while (ret == 0 &amp;&amp; oldval != val);	\</div><div class='add'>+		}						\</div><div class='add'>+	})</div><div class='add'>+</div><div class='add'>+/* No need to prefetch, since the atomic ops go to the home cache anyway. */</div><div class='add'>+#define __futex_prolog()</div><div class='ctx'> </div><div class='del'>-#ifndef __tilegx__</div><div class='del'>-extern struct __get_user futex_xor(u32 __user *v, int n);</div><div class='ctx'> #else</div><div class='del'>-static inline struct __get_user futex_xor(u32 __user *uaddr, int n)</div><div class='del'>-{</div><div class='del'>-	struct __get_user asm_ret = __get_user_4(uaddr);</div><div class='del'>-	if (!asm_ret.err) {</div><div class='del'>-		int oldval, newval;</div><div class='del'>-		do {</div><div class='del'>-			oldval = asm_ret.val;</div><div class='del'>-			newval = oldval ^ n;</div><div class='del'>-			asm_ret = futex_cmpxchg(uaddr, oldval, newval);</div><div class='del'>-		} while (asm_ret.err == 0 &amp;&amp; oldval != asm_ret.val);</div><div class='add'>+</div><div class='add'>+#define __futex_call(FN)						\</div><div class='add'>+	{								\</div><div class='add'>+		struct __get_user gu = FN((u32 __force *)uaddr, lock, oparg); \</div><div class='add'>+		val = gu.val;						\</div><div class='add'>+		ret = gu.err;						\</div><div class='ctx'> 	}</div><div class='del'>-	return asm_ret;</div><div class='del'>-}</div><div class='add'>+</div><div class='add'>+#define __futex_set() __futex_call(__atomic_xchg)</div><div class='add'>+#define __futex_add() __futex_call(__atomic_xchg_add)</div><div class='add'>+#define __futex_or() __futex_call(__atomic_or)</div><div class='add'>+#define __futex_andn() __futex_call(__atomic_andn)</div><div class='add'>+#define __futex_xor() __futex_call(__atomic_xor)</div><div class='add'>+</div><div class='add'>+#define __futex_cmpxchg()						\</div><div class='add'>+	{								\</div><div class='add'>+		struct __get_user gu = __atomic_cmpxchg((u32 __force *)uaddr, \</div><div class='add'>+							lock, oldval, oparg); \</div><div class='add'>+		val = gu.val;						\</div><div class='add'>+		ret = gu.err;						\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Find the lock pointer for the atomic calls to use, and issue a</div><div class='add'>+ * prefetch to the user address to bring it into cache.  Similar to</div><div class='add'>+ * __atomic_setup(), but we can't do a read into the L1 since it might</div><div class='add'>+ * fault; instead we do a prefetch into the L2.</div><div class='add'>+ */</div><div class='add'>+#define __futex_prolog()					\</div><div class='add'>+	int *lock;						\</div><div class='add'>+	__insn_prefetch(uaddr);					\</div><div class='add'>+	lock = __atomic_hashed_lock((int __force *)uaddr)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)</div><div class='hunk'>@@ -59,8 +111,12 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)</div><div class='ctx'> 	int cmp = (encoded_op &gt;&gt; 24) &amp; 15;</div><div class='ctx'> 	int oparg = (encoded_op &lt;&lt; 8) &gt;&gt; 20;</div><div class='ctx'> 	int cmparg = (encoded_op &lt;&lt; 20) &gt;&gt; 20;</div><div class='del'>-	int ret;</div><div class='del'>-	struct __get_user asm_ret;</div><div class='add'>+	int uninitialized_var(val), ret;</div><div class='add'>+</div><div class='add'>+	__futex_prolog();</div><div class='add'>+</div><div class='add'>+	/* The 32-bit futex code makes this assumption, so validate it here. */</div><div class='add'>+	BUILD_BUG_ON(sizeof(atomic_t) != sizeof(int));</div><div class='ctx'> </div><div class='ctx'> 	if (encoded_op &amp; (FUTEX_OP_OPARG_SHIFT &lt;&lt; 28))</div><div class='ctx'> 		oparg = 1 &lt;&lt; oparg;</div><div class='hunk'>@@ -71,46 +127,45 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)</div><div class='ctx'> 	pagefault_disable();</div><div class='ctx'> 	switch (op) {</div><div class='ctx'> 	case FUTEX_OP_SET:</div><div class='del'>-		asm_ret = futex_set(uaddr, oparg);</div><div class='add'>+		__futex_set();</div><div class='ctx'> 		break;</div><div class='ctx'> 	case FUTEX_OP_ADD:</div><div class='del'>-		asm_ret = futex_add(uaddr, oparg);</div><div class='add'>+		__futex_add();</div><div class='ctx'> 		break;</div><div class='ctx'> 	case FUTEX_OP_OR:</div><div class='del'>-		asm_ret = futex_or(uaddr, oparg);</div><div class='add'>+		__futex_or();</div><div class='ctx'> 		break;</div><div class='ctx'> 	case FUTEX_OP_ANDN:</div><div class='del'>-		asm_ret = futex_andn(uaddr, oparg);</div><div class='add'>+		__futex_andn();</div><div class='ctx'> 		break;</div><div class='ctx'> 	case FUTEX_OP_XOR:</div><div class='del'>-		asm_ret = futex_xor(uaddr, oparg);</div><div class='add'>+		__futex_xor();</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		asm_ret.err = -ENOSYS;</div><div class='add'>+		ret = -ENOSYS;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	pagefault_enable();</div><div class='ctx'> </div><div class='del'>-	ret = asm_ret.err;</div><div class='del'>-</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		switch (cmp) {</div><div class='ctx'> 		case FUTEX_OP_CMP_EQ:</div><div class='del'>-			ret = (asm_ret.val == cmparg);</div><div class='add'>+			ret = (val == cmparg);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FUTEX_OP_CMP_NE:</div><div class='del'>-			ret = (asm_ret.val != cmparg);</div><div class='add'>+			ret = (val != cmparg);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FUTEX_OP_CMP_LT:</div><div class='del'>-			ret = (asm_ret.val &lt; cmparg);</div><div class='add'>+			ret = (val &lt; cmparg);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FUTEX_OP_CMP_GE:</div><div class='del'>-			ret = (asm_ret.val &gt;= cmparg);</div><div class='add'>+			ret = (val &gt;= cmparg);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FUTEX_OP_CMP_LE:</div><div class='del'>-			ret = (asm_ret.val &lt;= cmparg);</div><div class='add'>+			ret = (val &lt;= cmparg);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FUTEX_OP_CMP_GT:</div><div class='del'>-			ret = (asm_ret.val &gt; cmparg);</div><div class='add'>+			ret = (val &gt; cmparg);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			ret = -ENOSYS;</div><div class='hunk'>@@ -120,22 +175,20 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,</div><div class='del'>-						u32 oldval, u32 newval)</div><div class='add'>+						u32 oldval, u32 oparg)</div><div class='ctx'> {</div><div class='del'>-	struct __get_user asm_ret;</div><div class='add'>+	int ret, val;</div><div class='add'>+</div><div class='add'>+	__futex_prolog();</div><div class='ctx'> </div><div class='ctx'> 	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	asm_ret = futex_cmpxchg(uaddr, oldval, newval);</div><div class='del'>-	*uval = asm_ret.val;</div><div class='del'>-	return asm_ret.err;</div><div class='del'>-}</div><div class='add'>+	__futex_cmpxchg();</div><div class='ctx'> </div><div class='del'>-#ifndef __tilegx__</div><div class='del'>-/* Return failure from the atomic wrappers. */</div><div class='del'>-struct __get_user __atomic_bad_address(int __user *addr);</div><div class='del'>-#endif</div><div class='add'>+	*uval = val;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/include/asm/hardwall.h b/arch/tile/include/asm/hardwall.h<br/>index 2ac422848c7d..47514a58d685 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/hardwall.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/hardwall.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/hardwall.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/hardwall.h</a></div><div class='hunk'>@@ -11,12 +11,14 @@</div><div class='ctx'>  *   NON INFRINGEMENT.  See the GNU General Public License for</div><div class='ctx'>  *   more details.</div><div class='ctx'>  *</div><div class='del'>- * Provide methods for the HARDWALL_FILE for accessing the UDN.</div><div class='add'>+ * Provide methods for access control of per-cpu resources like</div><div class='add'>+ * UDN, IDN, or IPI.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _ASM_TILE_HARDWALL_H</div><div class='ctx'> #define _ASM_TILE_HARDWALL_H</div><div class='ctx'> </div><div class='add'>+#include &lt;arch/chip.h&gt;</div><div class='ctx'> #include &lt;linux/ioctl.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define HARDWALL_IOCTL_BASE 0xa2</div><div class='hunk'>@@ -24,8 +26,9 @@</div><div class='ctx'> /*</div><div class='ctx'>  * The HARDWALL_CREATE() ioctl is a macro with a "size" argument.</div><div class='ctx'>  * The resulting ioctl value is passed to the kernel in conjunction</div><div class='del'>- * with a pointer to a little-endian bitmask of cpus, which must be</div><div class='del'>- * physically in a rectangular configuration on the chip.</div><div class='add'>+ * with a pointer to a standard kernel bitmask of cpus.</div><div class='add'>+ * For network resources (UDN or IDN) the bitmask must physically</div><div class='add'>+ * represent a rectangular configuration on the chip.</div><div class='ctx'>  * The "size" is the number of bytes of cpu mask data.</div><div class='ctx'>  */</div><div class='ctx'> #define _HARDWALL_CREATE 1</div><div class='hunk'>@@ -44,13 +47,7 @@</div><div class='ctx'> #define HARDWALL_GET_ID \</div><div class='ctx'>  _IO(HARDWALL_IOCTL_BASE, _HARDWALL_GET_ID)</div><div class='ctx'> </div><div class='del'>-#ifndef __KERNEL__</div><div class='del'>-</div><div class='del'>-/* This is the canonical name expected by userspace. */</div><div class='del'>-#define HARDWALL_FILE "/dev/hardwall"</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='add'>+#ifdef __KERNEL__</div><div class='ctx'> /* /proc hooks for hardwall. */</div><div class='ctx'> struct proc_dir_entry;</div><div class='ctx'> #ifdef CONFIG_HARDWALL</div><div class='hunk'>@@ -59,7 +56,6 @@ int proc_pid_hardwall(struct task_struct *task, char *buffer);</div><div class='ctx'> #else</div><div class='ctx'> static inline void proc_tile_hardwall_init(struct proc_dir_entry *root) {}</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_TILE_HARDWALL_H */</div><div class='head'>diff --git a/arch/tile/include/asm/hugetlb.h b/arch/tile/include/asm/hugetlb.h<br/>index d396d1805163..b2042380a5aa 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/hugetlb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/hugetlb.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/hugetlb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -106,4 +106,25 @@ static inline void arch_release_hugepage(struct page *page)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HUGETLB_SUPER_PAGES</div><div class='add'>+static inline pte_t arch_make_huge_pte(pte_t entry, struct vm_area_struct *vma,</div><div class='add'>+				       struct page *page, int writable)</div><div class='add'>+{</div><div class='add'>+	size_t pagesize = huge_page_size(hstate_vma(vma));</div><div class='add'>+	if (pagesize != PUD_SIZE &amp;&amp; pagesize != PMD_SIZE)</div><div class='add'>+		entry = pte_mksuper(entry);</div><div class='add'>+	return entry;</div><div class='add'>+}</div><div class='add'>+#define arch_make_huge_pte arch_make_huge_pte</div><div class='add'>+</div><div class='add'>+/* Sizes to scale up page size for PTEs with HV_PTE_SUPER bit. */</div><div class='add'>+enum {</div><div class='add'>+	HUGE_SHIFT_PGDIR = 0,</div><div class='add'>+	HUGE_SHIFT_PMD = 1,</div><div class='add'>+	HUGE_SHIFT_PAGE = 2,</div><div class='add'>+	HUGE_SHIFT_ENTRIES</div><div class='add'>+};</div><div class='add'>+extern int huge_shift[HUGE_SHIFT_ENTRIES];</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_TILE_HUGETLB_H */</div><div class='head'>diff --git a/arch/tile/include/asm/irqflags.h b/arch/tile/include/asm/irqflags.h<br/>index 5db0ce54284d..b4e96fef2cf8 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/irqflags.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/irqflags.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/irqflags.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/irqflags.h</a></div><div class='hunk'>@@ -28,10 +28,10 @@</div><div class='ctx'>  */</div><div class='ctx'> #if CHIP_HAS_AUX_PERF_COUNTERS()</div><div class='ctx'> #define LINUX_MASKABLE_INTERRUPTS_HI \</div><div class='del'>-       (~(INT_MASK_HI(INT_PERF_COUNT) | INT_MASK_HI(INT_AUX_PERF_COUNT)))</div><div class='add'>+	(~(INT_MASK_HI(INT_PERF_COUNT) | INT_MASK_HI(INT_AUX_PERF_COUNT)))</div><div class='ctx'> #else</div><div class='ctx'> #define LINUX_MASKABLE_INTERRUPTS_HI \</div><div class='del'>-       (~(INT_MASK_HI(INT_PERF_COUNT)))</div><div class='add'>+	(~(INT_MASK_HI(INT_PERF_COUNT)))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='hunk'>@@ -90,6 +90,14 @@</div><div class='ctx'> 	__insn_mtspr(SPR_INTERRUPT_MASK_RESET_K_0, (unsigned long)(__m)); \</div><div class='ctx'> 	__insn_mtspr(SPR_INTERRUPT_MASK_RESET_K_1, (unsigned long)(__m&gt;&gt;32)); \</div><div class='ctx'> } while (0)</div><div class='add'>+#define interrupt_mask_save_mask() \</div><div class='add'>+	(__insn_mfspr(SPR_INTERRUPT_MASK_SET_K_0) | \</div><div class='add'>+	 (((unsigned long long)__insn_mfspr(SPR_INTERRUPT_MASK_SET_K_1))&lt;&lt;32))</div><div class='add'>+#define interrupt_mask_restore_mask(mask) do { \</div><div class='add'>+	unsigned long long __m = (mask); \</div><div class='add'>+	__insn_mtspr(SPR_INTERRUPT_MASK_K_0, (unsigned long)(__m)); \</div><div class='add'>+	__insn_mtspr(SPR_INTERRUPT_MASK_K_1, (unsigned long)(__m&gt;&gt;32)); \</div><div class='add'>+} while (0)</div><div class='ctx'> #else</div><div class='ctx'> #define interrupt_mask_set(n) \</div><div class='ctx'> 	__insn_mtspr(SPR_INTERRUPT_MASK_SET_K, (1UL &lt;&lt; (n)))</div><div class='hunk'>@@ -101,6 +109,10 @@</div><div class='ctx'> 	__insn_mtspr(SPR_INTERRUPT_MASK_SET_K, (mask))</div><div class='ctx'> #define interrupt_mask_reset_mask(mask) \</div><div class='ctx'> 	__insn_mtspr(SPR_INTERRUPT_MASK_RESET_K, (mask))</div><div class='add'>+#define interrupt_mask_save_mask() \</div><div class='add'>+	__insn_mfspr(SPR_INTERRUPT_MASK_K)</div><div class='add'>+#define interrupt_mask_restore_mask(mask) \</div><div class='add'>+	__insn_mtspr(SPR_INTERRUPT_MASK_K, (mask))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -122,7 +134,7 @@ DECLARE_PER_CPU(unsigned long long, interrupts_enabled_mask);</div><div class='ctx'> </div><div class='ctx'> /* Disable all interrupts, including NMIs. */</div><div class='ctx'> #define arch_local_irq_disable_all() \</div><div class='del'>-	interrupt_mask_set_mask(-1UL)</div><div class='add'>+	interrupt_mask_set_mask(-1ULL)</div><div class='ctx'> </div><div class='ctx'> /* Re-enable all maskable interrupts. */</div><div class='ctx'> #define arch_local_irq_enable() \</div><div class='hunk'>@@ -179,7 +191,7 @@ DECLARE_PER_CPU(unsigned long long, interrupts_enabled_mask);</div><div class='ctx'> #ifdef __tilegx__</div><div class='ctx'> </div><div class='ctx'> #if INT_MEM_ERROR != 0</div><div class='del'>-# error Fix IRQ_DISABLED() macro</div><div class='add'>+# error Fix IRQS_DISABLED() macro</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* Return 0 or 1 to indicate whether interrupts are currently disabled. */</div><div class='hunk'>@@ -207,9 +219,10 @@ DECLARE_PER_CPU(unsigned long long, interrupts_enabled_mask);</div><div class='ctx'> 	mtspr   SPR_INTERRUPT_MASK_SET_K, tmp</div><div class='ctx'> </div><div class='ctx'> /* Enable interrupts. */</div><div class='del'>-#define IRQ_ENABLE(tmp0, tmp1)					\</div><div class='add'>+#define IRQ_ENABLE_LOAD(tmp0, tmp1)				\</div><div class='ctx'> 	GET_INTERRUPTS_ENABLED_MASK_PTR(tmp0);			\</div><div class='del'>-	ld      tmp0, tmp0;					\</div><div class='add'>+	ld      tmp0, tmp0</div><div class='add'>+#define IRQ_ENABLE_APPLY(tmp0, tmp1)				\</div><div class='ctx'> 	mtspr   SPR_INTERRUPT_MASK_RESET_K, tmp0</div><div class='ctx'> </div><div class='ctx'> #else /* !__tilegx__ */</div><div class='hunk'>@@ -253,17 +266,22 @@ DECLARE_PER_CPU(unsigned long long, interrupts_enabled_mask);</div><div class='ctx'> 	mtspr   SPR_INTERRUPT_MASK_SET_K_1, tmp</div><div class='ctx'> </div><div class='ctx'> /* Enable interrupts. */</div><div class='del'>-#define IRQ_ENABLE(tmp0, tmp1)					\</div><div class='add'>+#define IRQ_ENABLE_LOAD(tmp0, tmp1)				\</div><div class='ctx'> 	GET_INTERRUPTS_ENABLED_MASK_PTR(tmp0);			\</div><div class='ctx'> 	{							\</div><div class='ctx'> 	 lw     tmp0, tmp0;					\</div><div class='ctx'> 	 addi   tmp1, tmp0, 4					\</div><div class='ctx'> 	};							\</div><div class='del'>-	lw      tmp1, tmp1;					\</div><div class='add'>+	lw      tmp1, tmp1</div><div class='add'>+#define IRQ_ENABLE_APPLY(tmp0, tmp1)				\</div><div class='ctx'> 	mtspr   SPR_INTERRUPT_MASK_RESET_K_0, tmp0;		\</div><div class='ctx'> 	mtspr   SPR_INTERRUPT_MASK_RESET_K_1, tmp1</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define IRQ_ENABLE(tmp0, tmp1)					\</div><div class='add'>+	IRQ_ENABLE_LOAD(tmp0, tmp1);				\</div><div class='add'>+	IRQ_ENABLE_APPLY(tmp0, tmp1)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Do the CPU's IRQ-state tracing from assembly code. We call a</div><div class='ctx'>  * C function, but almost everywhere we do, we don't mind clobbering</div><div class='head'>diff --git a/arch/tile/include/asm/kexec.h b/arch/tile/include/asm/kexec.h<br/>index c11a6cc73bb8..fc98ccfc98ac 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/kexec.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/kexec.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/kexec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/kexec.h</a></div><div class='hunk'>@@ -19,12 +19,24 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifndef __tilegx__</div><div class='ctx'> /* Maximum physical address we can use pages from. */</div><div class='ctx'> #define KEXEC_SOURCE_MEMORY_LIMIT TASK_SIZE</div><div class='ctx'> /* Maximum address we can reach in physical address mode. */</div><div class='ctx'> #define KEXEC_DESTINATION_MEMORY_LIMIT TASK_SIZE</div><div class='ctx'> /* Maximum address we can use for the control code buffer. */</div><div class='ctx'> #define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE</div><div class='add'>+#else</div><div class='add'>+/* We need to limit the memory below PGDIR_SIZE since</div><div class='add'>+ * we only setup page table for [0, PGDIR_SIZE) before final kexec.</div><div class='add'>+ */</div><div class='add'>+/* Maximum physical address we can use pages from. */</div><div class='add'>+#define KEXEC_SOURCE_MEMORY_LIMIT PGDIR_SIZE</div><div class='add'>+/* Maximum address we can reach in physical address mode. */</div><div class='add'>+#define KEXEC_DESTINATION_MEMORY_LIMIT PGDIR_SIZE</div><div class='add'>+/* Maximum address we can use for the control code buffer. */</div><div class='add'>+#define KEXEC_CONTROL_MEMORY_LIMIT PGDIR_SIZE</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #define KEXEC_CONTROL_PAGE_SIZE	PAGE_SIZE</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/include/asm/kvm_para.h b/arch/tile/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/tile/include/asm/mmu.h b/arch/tile/include/asm/mmu.h<br/>index 92f94c77b6e4..e2c789096795 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/mmu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/mmu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/mmu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/mmu.h</a></div><div class='hunk'>@@ -21,7 +21,7 @@ struct mm_context {</div><div class='ctx'> 	 * Written under the mmap_sem semaphore; read without the</div><div class='ctx'> 	 * semaphore but atomically, but it is conservatively set.</div><div class='ctx'> 	 */</div><div class='del'>-	unsigned int priority_cached;</div><div class='add'>+	unsigned long priority_cached;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> typedef struct mm_context mm_context_t;</div><div class='head'>diff --git a/arch/tile/include/asm/mmu_context.h b/arch/tile/include/asm/mmu_context.h<br/>index 15fb24641120..37f0b741dee7 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/mmu_context.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/mmu_context.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/mmu_context.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -30,11 +30,15 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Note that arch/tile/kernel/head.S also calls hv_install_context() */</div><div class='add'>+/*</div><div class='add'>+ * Note that arch/tile/kernel/head_NN.S and arch/tile/mm/migrate_NN.S</div><div class='add'>+ * also call hv_install_context().</div><div class='add'>+ */</div><div class='ctx'> static inline void __install_page_table(pgd_t *pgdir, int asid, pgprot_t prot)</div><div class='ctx'> {</div><div class='ctx'> 	/* FIXME: DIRECTIO should not always be set. FIXME. */</div><div class='del'>-	int rc = hv_install_context(__pa(pgdir), prot, asid, HV_CTX_DIRECTIO);</div><div class='add'>+	int rc = hv_install_context(__pa(pgdir), prot, asid,</div><div class='add'>+				    HV_CTX_DIRECTIO | CTX_PAGE_FLAG);</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='ctx'> 		panic("hv_install_context failed: %d", rc);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/tile/include/asm/module.h b/arch/tile/include/asm/module.h<br/>new file mode 100644<br/>index 000000000000..44ed07ccd3d2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/module.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/module.h</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Tilera Corporation. All Rights Reserved.</div><div class='add'>+ *</div><div class='add'>+ *   This program is free software; you can redistribute it and/or</div><div class='add'>+ *   modify it under the terms of the GNU General Public License</div><div class='add'>+ *   as published by the Free Software Foundation, version 2.</div><div class='add'>+ *</div><div class='add'>+ *   This program is distributed in the hope that it will be useful, but</div><div class='add'>+ *   WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or</div><div class='add'>+ *   NON INFRINGEMENT.  See the GNU General Public License for</div><div class='add'>+ *   more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_TILE_MODULE_H</div><div class='add'>+#define _ASM_TILE_MODULE_H</div><div class='add'>+</div><div class='add'>+#include &lt;arch/chip.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/module.h&gt;</div><div class='add'>+</div><div class='add'>+/* We can't use modules built with different page sizes. */</div><div class='add'>+#if defined(CONFIG_PAGE_SIZE_16KB)</div><div class='add'>+# define MODULE_PGSZ " 16KB"</div><div class='add'>+#elif defined(CONFIG_PAGE_SIZE_64KB)</div><div class='add'>+# define MODULE_PGSZ " 64KB"</div><div class='add'>+#else</div><div class='add'>+# define MODULE_PGSZ ""</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* We don't really support no-SMP so tag if someone tries. */</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+#define MODULE_NOSMP ""</div><div class='add'>+#else</div><div class='add'>+#define MODULE_NOSMP " nosmp"</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define MODULE_ARCH_VERMAGIC CHIP_ARCH_NAME MODULE_PGSZ MODULE_NOSMP</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_TILE_MODULE_H */</div><div class='head'>diff --git a/arch/tile/include/asm/page.h b/arch/tile/include/asm/page.h<br/>index db93518fac03..9d9131e5c552 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/page.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/page.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/page.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/page.h</a></div><div class='hunk'>@@ -20,8 +20,17 @@</div><div class='ctx'> #include &lt;arch/chip.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* PAGE_SHIFT and HPAGE_SHIFT determine the page sizes. */</div><div class='del'>-#define PAGE_SHIFT	HV_LOG2_PAGE_SIZE_SMALL</div><div class='del'>-#define HPAGE_SHIFT	HV_LOG2_PAGE_SIZE_LARGE</div><div class='add'>+#if defined(CONFIG_PAGE_SIZE_16KB)</div><div class='add'>+#define PAGE_SHIFT	14</div><div class='add'>+#define CTX_PAGE_FLAG	HV_CTX_PG_SM_16K</div><div class='add'>+#elif defined(CONFIG_PAGE_SIZE_64KB)</div><div class='add'>+#define PAGE_SHIFT	16</div><div class='add'>+#define CTX_PAGE_FLAG	HV_CTX_PG_SM_64K</div><div class='add'>+#else</div><div class='add'>+#define PAGE_SHIFT	HV_LOG2_DEFAULT_PAGE_SIZE_SMALL</div><div class='add'>+#define CTX_PAGE_FLAG	0</div><div class='add'>+#endif</div><div class='add'>+#define HPAGE_SHIFT	HV_LOG2_DEFAULT_PAGE_SIZE_LARGE</div><div class='ctx'> </div><div class='ctx'> #define PAGE_SIZE	(_AC(1, UL) &lt;&lt; PAGE_SHIFT)</div><div class='ctx'> #define HPAGE_SIZE	(_AC(1, UL) &lt;&lt; HPAGE_SHIFT)</div><div class='hunk'>@@ -78,8 +87,7 @@ typedef HV_PTE pgprot_t;</div><div class='ctx'> /*</div><div class='ctx'>  * User L2 page tables are managed as one L2 page table per page,</div><div class='ctx'>  * because we use the page allocator for them.  This keeps the allocation</div><div class='del'>- * simple and makes it potentially useful to implement HIGHPTE at some point.</div><div class='del'>- * However, it's also inefficient, since L2 page tables are much smaller</div><div class='add'>+ * simple, but it's also inefficient, since L2 page tables are much smaller</div><div class='ctx'>  * than pages (currently 2KB vs 64KB).  So we should revisit this.</div><div class='ctx'>  */</div><div class='ctx'> typedef struct page *pgtable_t;</div><div class='hunk'>@@ -128,7 +136,7 @@ static inline __attribute_const__ int get_order(unsigned long size)</div><div class='ctx'> </div><div class='ctx'> #define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)</div><div class='ctx'> </div><div class='del'>-#define HUGE_MAX_HSTATE		2</div><div class='add'>+#define HUGE_MAX_HSTATE		6</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HUGETLB_PAGE</div><div class='ctx'> #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA</div><div class='head'>diff --git a/arch/tile/include/asm/pgalloc.h b/arch/tile/include/asm/pgalloc.h<br/>index e919c0bdc22d..1b902508b664 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/pgalloc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/pgalloc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/pgalloc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -19,24 +19,24 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/mmzone.h&gt;</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;hv/hypervisor.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Bits for the size of the second-level page table. */</div><div class='del'>-#define L2_KERNEL_PGTABLE_SHIFT \</div><div class='del'>-  (HV_LOG2_PAGE_SIZE_LARGE - HV_LOG2_PAGE_SIZE_SMALL + HV_LOG2_PTE_SIZE)</div><div class='add'>+#define L2_KERNEL_PGTABLE_SHIFT _HV_LOG2_L2_SIZE(HPAGE_SHIFT, PAGE_SHIFT)</div><div class='add'>+</div><div class='add'>+/* How big is a kernel L2 page table? */</div><div class='add'>+#define L2_KERNEL_PGTABLE_SIZE (1UL &lt;&lt; L2_KERNEL_PGTABLE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> /* We currently allocate user L2 page tables by page (unlike kernel L2s). */</div><div class='del'>-#if L2_KERNEL_PGTABLE_SHIFT &lt; HV_LOG2_PAGE_SIZE_SMALL</div><div class='del'>-#define L2_USER_PGTABLE_SHIFT HV_LOG2_PAGE_SIZE_SMALL</div><div class='add'>+#if L2_KERNEL_PGTABLE_SHIFT &lt; PAGE_SHIFT</div><div class='add'>+#define L2_USER_PGTABLE_SHIFT PAGE_SHIFT</div><div class='ctx'> #else</div><div class='ctx'> #define L2_USER_PGTABLE_SHIFT L2_KERNEL_PGTABLE_SHIFT</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* How many pages do we need, as an "order", for a user L2 page table? */</div><div class='del'>-#define L2_USER_PGTABLE_ORDER (L2_USER_PGTABLE_SHIFT - HV_LOG2_PAGE_SIZE_SMALL)</div><div class='del'>-</div><div class='del'>-/* How big is a kernel L2 page table? */</div><div class='del'>-#define L2_KERNEL_PGTABLE_SIZE (1 &lt;&lt; L2_KERNEL_PGTABLE_SHIFT)</div><div class='add'>+#define L2_USER_PGTABLE_ORDER (L2_USER_PGTABLE_SHIFT - PAGE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)</div><div class='ctx'> {</div><div class='hunk'>@@ -50,14 +50,14 @@ static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)</div><div class='ctx'> static inline void pmd_populate_kernel(struct mm_struct *mm,</div><div class='ctx'> 				       pmd_t *pmd, pte_t *ptep)</div><div class='ctx'> {</div><div class='del'>-	set_pmd(pmd, ptfn_pmd(__pa(ptep) &gt;&gt; HV_LOG2_PAGE_TABLE_ALIGN,</div><div class='add'>+	set_pmd(pmd, ptfn_pmd(HV_CPA_TO_PTFN(__pa(ptep)),</div><div class='ctx'> 			      __pgprot(_PAGE_PRESENT)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,</div><div class='ctx'> 				pgtable_t page)</div><div class='ctx'> {</div><div class='del'>-	set_pmd(pmd, ptfn_pmd(HV_PFN_TO_PTFN(page_to_pfn(page)),</div><div class='add'>+	set_pmd(pmd, ptfn_pmd(HV_CPA_TO_PTFN(PFN_PHYS(page_to_pfn(page))),</div><div class='ctx'> 			      __pgprot(_PAGE_PRESENT)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -68,8 +68,20 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,</div><div class='ctx'> extern pgd_t *pgd_alloc(struct mm_struct *mm);</div><div class='ctx'> extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);</div><div class='ctx'> </div><div class='del'>-extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address);</div><div class='del'>-extern void pte_free(struct mm_struct *mm, struct page *pte);</div><div class='add'>+extern pgtable_t pgtable_alloc_one(struct mm_struct *mm, unsigned long address,</div><div class='add'>+				   int order);</div><div class='add'>+extern void pgtable_free(struct mm_struct *mm, struct page *pte, int order);</div><div class='add'>+</div><div class='add'>+static inline pgtable_t pte_alloc_one(struct mm_struct *mm,</div><div class='add'>+				      unsigned long address)</div><div class='add'>+{</div><div class='add'>+	return pgtable_alloc_one(mm, address, L2_USER_PGTABLE_ORDER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void pte_free(struct mm_struct *mm, struct page *pte)</div><div class='add'>+{</div><div class='add'>+	pgtable_free(mm, pte, L2_USER_PGTABLE_ORDER);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define pmd_pgtable(pmd) pmd_page(pmd)</div><div class='ctx'> </div><div class='hunk'>@@ -85,8 +97,13 @@ static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)</div><div class='ctx'> 	pte_free(mm, virt_to_page(pte));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte,</div><div class='del'>-			   unsigned long address);</div><div class='add'>+extern void __pgtable_free_tlb(struct mmu_gather *tlb, struct page *pte,</div><div class='add'>+			       unsigned long address, int order);</div><div class='add'>+static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte,</div><div class='add'>+				  unsigned long address)</div><div class='add'>+{</div><div class='add'>+	__pgtable_free_tlb(tlb, pte, address, L2_USER_PGTABLE_ORDER);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define check_pgt_cache()	do { } while (0)</div><div class='ctx'> </div><div class='hunk'>@@ -104,19 +121,44 @@ void shatter_pmd(pmd_t *pmd);</div><div class='ctx'> void shatter_huge_page(unsigned long addr);</div><div class='ctx'> </div><div class='ctx'> #ifdef __tilegx__</div><div class='del'>-/* We share a single page allocator for both L1 and L2 page tables. */</div><div class='del'>-#if HV_L1_SIZE != HV_L2_SIZE</div><div class='del'>-# error Rework assumption that L1 and L2 page tables are same size.</div><div class='del'>-#endif</div><div class='del'>-#define L1_USER_PGTABLE_ORDER L2_USER_PGTABLE_ORDER</div><div class='add'>+</div><div class='ctx'> #define pud_populate(mm, pud, pmd) \</div><div class='ctx'>   pmd_populate_kernel((mm), (pmd_t *)(pud), (pte_t *)(pmd))</div><div class='del'>-#define pmd_alloc_one(mm, addr) \</div><div class='del'>-  ((pmd_t *)page_to_virt(pte_alloc_one((mm), (addr))))</div><div class='del'>-#define pmd_free(mm, pmdp) \</div><div class='del'>-  pte_free((mm), virt_to_page(pmdp))</div><div class='del'>-#define __pmd_free_tlb(tlb, pmdp, address) \</div><div class='del'>-  __pte_free_tlb((tlb), virt_to_page(pmdp), (address))</div><div class='add'>+</div><div class='add'>+/* Bits for the size of the L1 (intermediate) page table. */</div><div class='add'>+#define L1_KERNEL_PGTABLE_SHIFT _HV_LOG2_L1_SIZE(HPAGE_SHIFT)</div><div class='add'>+</div><div class='add'>+/* How big is a kernel L2 page table? */</div><div class='add'>+#define L1_KERNEL_PGTABLE_SIZE (1UL &lt;&lt; L1_KERNEL_PGTABLE_SHIFT)</div><div class='add'>+</div><div class='add'>+/* We currently allocate L1 page tables by page. */</div><div class='add'>+#if L1_KERNEL_PGTABLE_SHIFT &lt; PAGE_SHIFT</div><div class='add'>+#define L1_USER_PGTABLE_SHIFT PAGE_SHIFT</div><div class='add'>+#else</div><div class='add'>+#define L1_USER_PGTABLE_SHIFT L1_KERNEL_PGTABLE_SHIFT</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/* How many pages do we need, as an "order", for an L1 page table? */</div><div class='add'>+#define L1_USER_PGTABLE_ORDER (L1_USER_PGTABLE_SHIFT - PAGE_SHIFT)</div><div class='add'>+</div><div class='add'>+static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='add'>+{</div><div class='add'>+	struct page *p = pgtable_alloc_one(mm, address, L1_USER_PGTABLE_ORDER);</div><div class='add'>+	return (pmd_t *)page_to_virt(p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void pmd_free(struct mm_struct *mm, pmd_t *pmdp)</div><div class='add'>+{</div><div class='add'>+	pgtable_free(mm, virt_to_page(pmdp), L1_USER_PGTABLE_ORDER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,</div><div class='add'>+				  unsigned long address)</div><div class='add'>+{</div><div class='add'>+	__pgtable_free_tlb(tlb, virt_to_page(pmdp), address,</div><div class='add'>+			   L1_USER_PGTABLE_ORDER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* __tilegx__ */</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_TILE_PGALLOC_H */</div><div class='head'>diff --git a/arch/tile/include/asm/pgtable.h b/arch/tile/include/asm/pgtable.h<br/>index 67490910774d..73b1a4c9ad03 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/pgtable.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/pgtable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/pgtable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/pgtable.h</a></div><div class='hunk'>@@ -27,8 +27,10 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/pfn.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct mm_struct;</div><div class='ctx'> struct vm_area_struct;</div><div class='hunk'>@@ -69,6 +71,7 @@ extern void set_page_homes(void);</div><div class='ctx'> </div><div class='ctx'> #define _PAGE_PRESENT           HV_PTE_PRESENT</div><div class='ctx'> #define _PAGE_HUGE_PAGE         HV_PTE_PAGE</div><div class='add'>+#define _PAGE_SUPER_PAGE        HV_PTE_SUPER</div><div class='ctx'> #define _PAGE_READABLE          HV_PTE_READABLE</div><div class='ctx'> #define _PAGE_WRITABLE          HV_PTE_WRITABLE</div><div class='ctx'> #define _PAGE_EXECUTABLE        HV_PTE_EXECUTABLE</div><div class='hunk'>@@ -85,6 +88,7 @@ extern void set_page_homes(void);</div><div class='ctx'> #define _PAGE_ALL (\</div><div class='ctx'>   _PAGE_PRESENT | \</div><div class='ctx'>   _PAGE_HUGE_PAGE | \</div><div class='add'>+  _PAGE_SUPER_PAGE | \</div><div class='ctx'>   _PAGE_READABLE | \</div><div class='ctx'>   _PAGE_WRITABLE | \</div><div class='ctx'>   _PAGE_EXECUTABLE | \</div><div class='hunk'>@@ -162,7 +166,7 @@ extern void set_page_homes(void);</div><div class='ctx'>   (pgprot_t) { ((oldprot).val &amp; ~_PAGE_ALL) | (newprot).val }</div><div class='ctx'> </div><div class='ctx'> /* Just setting the PFN to zero suffices. */</div><div class='del'>-#define pte_pgprot(x) hv_pte_set_pfn((x), 0)</div><div class='add'>+#define pte_pgprot(x) hv_pte_set_pa((x), 0)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * For PTEs and PDEs, we must clear the Present bit first when</div><div class='hunk'>@@ -187,6 +191,7 @@ static inline void __pte_clear(pte_t *ptep)</div><div class='ctx'>  * Undefined behaviour if not..</div><div class='ctx'>  */</div><div class='ctx'> #define pte_present hv_pte_get_present</div><div class='add'>+#define pte_mknotpresent hv_pte_clear_present</div><div class='ctx'> #define pte_user hv_pte_get_user</div><div class='ctx'> #define pte_read hv_pte_get_readable</div><div class='ctx'> #define pte_dirty hv_pte_get_dirty</div><div class='hunk'>@@ -194,6 +199,7 @@ static inline void __pte_clear(pte_t *ptep)</div><div class='ctx'> #define pte_write hv_pte_get_writable</div><div class='ctx'> #define pte_exec hv_pte_get_executable</div><div class='ctx'> #define pte_huge hv_pte_get_page</div><div class='add'>+#define pte_super hv_pte_get_super</div><div class='ctx'> #define pte_rdprotect hv_pte_clear_readable</div><div class='ctx'> #define pte_exprotect hv_pte_clear_executable</div><div class='ctx'> #define pte_mkclean hv_pte_clear_dirty</div><div class='hunk'>@@ -206,6 +212,7 @@ static inline void __pte_clear(pte_t *ptep)</div><div class='ctx'> #define pte_mkyoung hv_pte_set_accessed</div><div class='ctx'> #define pte_mkwrite hv_pte_set_writable</div><div class='ctx'> #define pte_mkhuge hv_pte_set_page</div><div class='add'>+#define pte_mksuper hv_pte_set_super</div><div class='ctx'> </div><div class='ctx'> #define pte_special(pte) 0</div><div class='ctx'> #define pte_mkspecial(pte) (pte)</div><div class='hunk'>@@ -261,7 +268,7 @@ static inline int pte_none(pte_t pte)</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long pte_pfn(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	return hv_pte_get_pfn(pte);</div><div class='add'>+	return PFN_DOWN(hv_pte_get_pa(pte));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Set or get the remote cache cpu in a pgprot with remote caching. */</div><div class='hunk'>@@ -270,7 +277,7 @@ extern int get_remote_cache_cpu(pgprot_t prot);</div><div class='ctx'> </div><div class='ctx'> static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	return hv_pte_set_pfn(prot, pfn);</div><div class='add'>+	return hv_pte_set_pa(prot, PFN_PHYS(pfn));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Support for priority mappings. */</div><div class='hunk'>@@ -312,7 +319,7 @@ extern void check_mm_caching(struct mm_struct *prev, struct mm_struct *next);</div><div class='ctx'>  */</div><div class='ctx'> static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'> {</div><div class='del'>-	return pfn_pte(hv_pte_get_pfn(pte), newprot);</div><div class='add'>+	return pfn_pte(pte_pfn(pte), newprot);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -335,13 +342,8 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)</div><div class='ctx'>  */</div><div class='ctx'> #define pgd_offset_k(address) pgd_offset(&amp;init_mm, address)</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_HIGHPTE)</div><div class='del'>-extern pte_t *pte_offset_map(pmd_t *, unsigned long address);</div><div class='del'>-#define pte_unmap(pte) kunmap_atomic(pte)</div><div class='del'>-#else</div><div class='ctx'> #define pte_offset_map(dir, address) pte_offset_kernel(dir, address)</div><div class='ctx'> #define pte_unmap(pte) do { } while (0)</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /* Clear a non-executable kernel PTE and flush it from the TLB. */</div><div class='ctx'> #define kpte_clear_flush(ptep, vaddr)		\</div><div class='hunk'>@@ -410,6 +412,46 @@ static inline unsigned long pmd_index(unsigned long address)</div><div class='ctx'> 	return (address &gt;&gt; PMD_SHIFT) &amp; (PTRS_PER_PMD - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG</div><div class='add'>+static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,</div><div class='add'>+					    unsigned long address,</div><div class='add'>+					    pmd_t *pmdp)</div><div class='add'>+{</div><div class='add'>+	return ptep_test_and_clear_young(vma, address, pmdp_ptep(pmdp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define __HAVE_ARCH_PMDP_SET_WRPROTECT</div><div class='add'>+static inline void pmdp_set_wrprotect(struct mm_struct *mm,</div><div class='add'>+				      unsigned long address, pmd_t *pmdp)</div><div class='add'>+{</div><div class='add'>+	ptep_set_wrprotect(mm, address, pmdp_ptep(pmdp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define __HAVE_ARCH_PMDP_GET_AND_CLEAR</div><div class='add'>+static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,</div><div class='add'>+				       unsigned long address,</div><div class='add'>+				       pmd_t *pmdp)</div><div class='add'>+{</div><div class='add'>+	return pte_pmd(ptep_get_and_clear(mm, address, pmdp_ptep(pmdp)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __set_pmd(pmd_t *pmdp, pmd_t pmdval)</div><div class='add'>+{</div><div class='add'>+	set_pte(pmdp_ptep(pmdp), pmd_pte(pmdval));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define set_pmd_at(mm, addr, pmdp, pmdval) __set_pmd(pmdp, pmdval)</div><div class='add'>+</div><div class='add'>+/* Create a pmd from a PTFN. */</div><div class='add'>+static inline pmd_t ptfn_pmd(unsigned long ptfn, pgprot_t prot)</div><div class='add'>+{</div><div class='add'>+	return pte_pmd(hv_pte_set_ptfn(prot, ptfn));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Return the page-table frame number (ptfn) that a pmd_t points at. */</div><div class='add'>+#define pmd_ptfn(pmd) hv_pte_get_ptfn(pmd_pte(pmd))</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * A given kernel pmd_t maps to a specific virtual address (either a</div><div class='ctx'>  * kernel huge page or a kernel pte_t table).  Since kernel pte_t</div><div class='hunk'>@@ -430,7 +472,48 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd)</div><div class='ctx'>  * OK for pte_lockptr(), since we just end up with potentially one</div><div class='ctx'>  * lock being used for several pte_t arrays.</div><div class='ctx'>  */</div><div class='del'>-#define pmd_page(pmd) pfn_to_page(HV_PTFN_TO_PFN(pmd_ptfn(pmd)))</div><div class='add'>+#define pmd_page(pmd) pfn_to_page(PFN_DOWN(HV_PTFN_TO_CPA(pmd_ptfn(pmd))))</div><div class='add'>+</div><div class='add'>+static inline void pmd_clear(pmd_t *pmdp)</div><div class='add'>+{</div><div class='add'>+	__pte_clear(pmdp_ptep(pmdp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define pmd_mknotpresent(pmd)	pte_pmd(pte_mknotpresent(pmd_pte(pmd)))</div><div class='add'>+#define pmd_young(pmd)		pte_young(pmd_pte(pmd))</div><div class='add'>+#define pmd_mkyoung(pmd)	pte_pmd(pte_mkyoung(pmd_pte(pmd)))</div><div class='add'>+#define pmd_mkold(pmd)		pte_pmd(pte_mkold(pmd_pte(pmd)))</div><div class='add'>+#define pmd_mkwrite(pmd)	pte_pmd(pte_mkwrite(pmd_pte(pmd)))</div><div class='add'>+#define pmd_write(pmd)		pte_write(pmd_pte(pmd))</div><div class='add'>+#define pmd_wrprotect(pmd)	pte_pmd(pte_wrprotect(pmd_pte(pmd)))</div><div class='add'>+#define pmd_mkdirty(pmd)	pte_pmd(pte_mkdirty(pmd_pte(pmd)))</div><div class='add'>+#define pmd_huge_page(pmd)	pte_huge(pmd_pte(pmd))</div><div class='add'>+#define pmd_mkhuge(pmd)		pte_pmd(pte_mkhuge(pmd_pte(pmd)))</div><div class='add'>+#define __HAVE_ARCH_PMD_WRITE</div><div class='add'>+</div><div class='add'>+#define pfn_pmd(pfn, pgprot)	pte_pmd(pfn_pte((pfn), (pgprot)))</div><div class='add'>+#define pmd_pfn(pmd)		pte_pfn(pmd_pte(pmd))</div><div class='add'>+#define mk_pmd(page, pgprot)	pfn_pmd(page_to_pfn(page), (pgprot))</div><div class='add'>+</div><div class='add'>+static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)</div><div class='add'>+{</div><div class='add'>+	return pfn_pmd(pmd_pfn(pmd), newprot);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='add'>+#define has_transparent_hugepage() 1</div><div class='add'>+#define pmd_trans_huge pmd_huge_page</div><div class='add'>+</div><div class='add'>+static inline pmd_t pmd_mksplitting(pmd_t pmd)</div><div class='add'>+{</div><div class='add'>+	return pte_pmd(hv_pte_set_client2(pmd_pte(pmd)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int pmd_trans_splitting(pmd_t pmd)</div><div class='add'>+{</div><div class='add'>+	return hv_pte_get_client2(pmd_pte(pmd));</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]</div><div class='hunk'>@@ -448,17 +531,13 @@ static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)</div><div class='ctx'>        return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int pmd_huge_page(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return pmd_val(pmd) &amp; _PAGE_HUGE_PAGE;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #include &lt;asm-generic/pgtable.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Support /proc/NN/pgtable API. */</div><div class='ctx'> struct seq_file;</div><div class='ctx'> int arch_proc_pgtable_show(struct seq_file *m, struct mm_struct *mm,</div><div class='del'>-			   unsigned long vaddr, pte_t *ptep, void **datap);</div><div class='add'>+			   unsigned long vaddr, unsigned long pagesize,</div><div class='add'>+			   pte_t *ptep, void **datap);</div><div class='ctx'> </div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/include/asm/pgtable_32.h b/arch/tile/include/asm/pgtable_32.h<br/>index 9f98529761fd..4ce4a7a99c24 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/pgtable_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/pgtable_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/pgtable_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/pgtable_32.h</a></div><div class='hunk'>@@ -20,11 +20,12 @@</div><div class='ctx'>  * The level-1 index is defined by the huge page size.  A PGD is composed</div><div class='ctx'>  * of PTRS_PER_PGD pgd_t's and is the top level of the page table.</div><div class='ctx'>  */</div><div class='del'>-#define PGDIR_SHIFT	HV_LOG2_PAGE_SIZE_LARGE</div><div class='del'>-#define PGDIR_SIZE	HV_PAGE_SIZE_LARGE</div><div class='add'>+#define PGDIR_SHIFT	HPAGE_SHIFT</div><div class='add'>+#define PGDIR_SIZE	HPAGE_SIZE</div><div class='ctx'> #define PGDIR_MASK	(~(PGDIR_SIZE-1))</div><div class='del'>-#define PTRS_PER_PGD	(1 &lt;&lt; (32 - PGDIR_SHIFT))</div><div class='del'>-#define SIZEOF_PGD	(PTRS_PER_PGD * sizeof(pgd_t))</div><div class='add'>+#define PTRS_PER_PGD	_HV_L1_ENTRIES(HPAGE_SHIFT)</div><div class='add'>+#define PGD_INDEX(va)	_HV_L1_INDEX(va, HPAGE_SHIFT)</div><div class='add'>+#define SIZEOF_PGD	_HV_L1_SIZE(HPAGE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The level-2 index is defined by the difference between the huge</div><div class='hunk'>@@ -33,8 +34,9 @@</div><div class='ctx'>  * Note that the hypervisor docs use PTE for what we call pte_t, so</div><div class='ctx'>  * this nomenclature is somewhat confusing.</div><div class='ctx'>  */</div><div class='del'>-#define PTRS_PER_PTE (1 &lt;&lt; (HV_LOG2_PAGE_SIZE_LARGE - HV_LOG2_PAGE_SIZE_SMALL))</div><div class='del'>-#define SIZEOF_PTE	(PTRS_PER_PTE * sizeof(pte_t))</div><div class='add'>+#define PTRS_PER_PTE	_HV_L2_ENTRIES(HPAGE_SHIFT, PAGE_SHIFT)</div><div class='add'>+#define PTE_INDEX(va)	_HV_L2_INDEX(va, HPAGE_SHIFT, PAGE_SHIFT)</div><div class='add'>+#define SIZEOF_PTE	_HV_L2_SIZE(HPAGE_SHIFT, PAGE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='hunk'>@@ -111,24 +113,14 @@ static inline pte_t ptep_get_and_clear(struct mm_struct *mm,</div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __set_pmd(pmd_t *pmdp, pmd_t pmdval)</div><div class='del'>-{</div><div class='del'>-	set_pte(&amp;pmdp-&gt;pud.pgd, pmdval.pud.pgd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Create a pmd from a PTFN. */</div><div class='del'>-static inline pmd_t ptfn_pmd(unsigned long ptfn, pgprot_t prot)</div><div class='del'>-{</div><div class='del'>-	return (pmd_t){ { hv_pte_set_ptfn(prot, ptfn) } };</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Return the page-table frame number (ptfn) that a pmd_t points at. */</div><div class='del'>-#define pmd_ptfn(pmd) hv_pte_get_ptfn((pmd).pud.pgd)</div><div class='del'>-</div><div class='del'>-static inline void pmd_clear(pmd_t *pmdp)</div><div class='del'>-{</div><div class='del'>-	__pte_clear(&amp;pmdp-&gt;pud.pgd);</div><div class='del'>-}</div><div class='add'>+/*</div><div class='add'>+ * pmds are wrappers around pgds, which are the same as ptes.</div><div class='add'>+ * It's often convenient to "cast" back and forth and use the pte methods,</div><div class='add'>+ * which are the methods supplied by the hypervisor.</div><div class='add'>+ */</div><div class='add'>+#define pmd_pte(pmd) ((pmd).pud.pgd)</div><div class='add'>+#define pmdp_ptep(pmdp) (&amp;(pmdp)-&gt;pud.pgd)</div><div class='add'>+#define pte_pmd(pte) ((pmd_t){ { (pte) } })</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/include/asm/pgtable_64.h b/arch/tile/include/asm/pgtable_64.h<br/>index fd80328523b4..2492fa5478e7 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/pgtable_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/pgtable_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/pgtable_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/pgtable_64.h</a></div><div class='hunk'>@@ -21,17 +21,19 @@</div><div class='ctx'> #define PGDIR_SIZE	HV_L1_SPAN</div><div class='ctx'> #define PGDIR_MASK	(~(PGDIR_SIZE-1))</div><div class='ctx'> #define PTRS_PER_PGD	HV_L0_ENTRIES</div><div class='del'>-#define SIZEOF_PGD	(PTRS_PER_PGD * sizeof(pgd_t))</div><div class='add'>+#define PGD_INDEX(va)	HV_L0_INDEX(va)</div><div class='add'>+#define SIZEOF_PGD	HV_L0_SIZE</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The level-1 index is defined by the huge page size.  A PMD is composed</div><div class='ctx'>  * of PTRS_PER_PMD pgd_t's and is the middle level of the page table.</div><div class='ctx'>  */</div><div class='del'>-#define PMD_SHIFT	HV_LOG2_PAGE_SIZE_LARGE</div><div class='del'>-#define PMD_SIZE	HV_PAGE_SIZE_LARGE</div><div class='add'>+#define PMD_SHIFT	HPAGE_SHIFT</div><div class='add'>+#define PMD_SIZE	HPAGE_SIZE</div><div class='ctx'> #define PMD_MASK	(~(PMD_SIZE-1))</div><div class='del'>-#define PTRS_PER_PMD	(1 &lt;&lt; (PGDIR_SHIFT - PMD_SHIFT))</div><div class='del'>-#define SIZEOF_PMD	(PTRS_PER_PMD * sizeof(pmd_t))</div><div class='add'>+#define PTRS_PER_PMD	_HV_L1_ENTRIES(HPAGE_SHIFT)</div><div class='add'>+#define PMD_INDEX(va)	_HV_L1_INDEX(va, HPAGE_SHIFT)</div><div class='add'>+#define SIZEOF_PMD	_HV_L1_SIZE(HPAGE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The level-2 index is defined by the difference between the huge</div><div class='hunk'>@@ -40,17 +42,19 @@</div><div class='ctx'>  * Note that the hypervisor docs use PTE for what we call pte_t, so</div><div class='ctx'>  * this nomenclature is somewhat confusing.</div><div class='ctx'>  */</div><div class='del'>-#define PTRS_PER_PTE (1 &lt;&lt; (HV_LOG2_PAGE_SIZE_LARGE - HV_LOG2_PAGE_SIZE_SMALL))</div><div class='del'>-#define SIZEOF_PTE	(PTRS_PER_PTE * sizeof(pte_t))</div><div class='add'>+#define PTRS_PER_PTE	_HV_L2_ENTRIES(HPAGE_SHIFT, PAGE_SHIFT)</div><div class='add'>+#define PTE_INDEX(va)	_HV_L2_INDEX(va, HPAGE_SHIFT, PAGE_SHIFT)</div><div class='add'>+#define SIZEOF_PTE	_HV_L2_SIZE(HPAGE_SHIFT, PAGE_SHIFT)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Align the vmalloc area to an L2 page table, and leave a guard page</div><div class='del'>- * at the beginning and end.  The vmalloc code also puts in an internal</div><div class='add'>+ * Align the vmalloc area to an L2 page table.  Omit guard pages at</div><div class='add'>+ * the beginning and end for simplicity (particularly in the per-cpu</div><div class='add'>+ * memory allocation code).  The vmalloc code puts in an internal</div><div class='ctx'>  * guard page between each allocation.</div><div class='ctx'>  */</div><div class='ctx'> #define _VMALLOC_END	HUGE_VMAP_BASE</div><div class='del'>-#define VMALLOC_END	(_VMALLOC_END - PAGE_SIZE)</div><div class='del'>-#define VMALLOC_START	(_VMALLOC_START + PAGE_SIZE)</div><div class='add'>+#define VMALLOC_END	_VMALLOC_END</div><div class='add'>+#define VMALLOC_START	_VMALLOC_START</div><div class='ctx'> </div><div class='ctx'> #define HUGE_VMAP_END	(HUGE_VMAP_BASE + PGDIR_SIZE)</div><div class='ctx'> </div><div class='hunk'>@@ -98,7 +102,7 @@ static inline int pud_bad(pud_t pud)</div><div class='ctx'>  * A pud_t points to a pmd_t array.  Since we can have multiple per</div><div class='ctx'>  * page, we don't have a one-to-one mapping of pud_t's to pages.</div><div class='ctx'>  */</div><div class='del'>-#define pud_page(pud) pfn_to_page(HV_PTFN_TO_PFN(pud_ptfn(pud)))</div><div class='add'>+#define pud_page(pud) pfn_to_page(PFN_DOWN(HV_PTFN_TO_CPA(pud_ptfn(pud))))</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long pud_index(unsigned long address)</div><div class='ctx'> {</div><div class='hunk'>@@ -108,28 +112,6 @@ static inline unsigned long pud_index(unsigned long address)</div><div class='ctx'> #define pmd_offset(pud, address) \</div><div class='ctx'> 	((pmd_t *)pud_page_vaddr(*(pud)) + pmd_index(address))</div><div class='ctx'> </div><div class='del'>-static inline void __set_pmd(pmd_t *pmdp, pmd_t pmdval)</div><div class='del'>-{</div><div class='del'>-	set_pte(pmdp, pmdval);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Create a pmd from a PTFN and pgprot. */</div><div class='del'>-static inline pmd_t ptfn_pmd(unsigned long ptfn, pgprot_t prot)</div><div class='del'>-{</div><div class='del'>-	return hv_pte_set_ptfn(prot, ptfn);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Return the page-table frame number (ptfn) that a pmd_t points at. */</div><div class='del'>-static inline unsigned long pmd_ptfn(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return hv_pte_get_ptfn(pmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void pmd_clear(pmd_t *pmdp)</div><div class='del'>-{</div><div class='del'>-	__pte_clear(pmdp);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Normalize an address to having the correct high bits set. */</div><div class='ctx'> #define pgd_addr_normalize pgd_addr_normalize</div><div class='ctx'> static inline unsigned long pgd_addr_normalize(unsigned long addr)</div><div class='hunk'>@@ -170,6 +152,13 @@ static inline pte_t ptep_get_and_clear(struct mm_struct *mm,</div><div class='ctx'> 	return hv_pte(__insn_exch(&amp;ptep-&gt;val, 0UL));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * pmds are the same as pgds and ptes, so converting is a no-op.</div><div class='add'>+ */</div><div class='add'>+#define pmd_pte(pmd) (pmd)</div><div class='add'>+#define pmdp_ptep(pmdp) (pmdp)</div><div class='add'>+#define pte_pmd(pte) (pte)</div><div class='add'>+</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_TILE_PGTABLE_64_H */</div><div class='head'>diff --git a/arch/tile/include/asm/processor.h b/arch/tile/include/asm/processor.h<br/>index 34c1e01ffb5e..8c4dd9ff91eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/processor.h</a></div><div class='hunk'>@@ -76,6 +76,17 @@ struct async_tlb {</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HARDWALL</div><div class='ctx'> struct hardwall_info;</div><div class='add'>+struct hardwall_task {</div><div class='add'>+	/* Which hardwall is this task tied to? (or NULL if none) */</div><div class='add'>+	struct hardwall_info *info;</div><div class='add'>+	/* Chains this task into the list at info-&gt;task_head. */</div><div class='add'>+	struct list_head list;</div><div class='add'>+};</div><div class='add'>+#ifdef __tilepro__</div><div class='add'>+#define HARDWALL_TYPES 1   /* udn */</div><div class='add'>+#else</div><div class='add'>+#define HARDWALL_TYPES 3   /* udn, idn, and ipi */</div><div class='add'>+#endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> struct thread_struct {</div><div class='hunk'>@@ -116,10 +127,8 @@ struct thread_struct {</div><div class='ctx'> 	unsigned long dstream_pf;</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_HARDWALL</div><div class='del'>-	/* Is this task tied to an activated hardwall? */</div><div class='del'>-	struct hardwall_info *hardwall;</div><div class='del'>-	/* Chains this task into the list at hardwall-&gt;list. */</div><div class='del'>-	struct list_head hardwall_list;</div><div class='add'>+	/* Hardwall information for various resources. */</div><div class='add'>+	struct hardwall_task hardwall[HARDWALL_TYPES];</div><div class='ctx'> #endif</div><div class='ctx'> #if CHIP_HAS_TILE_DMA()</div><div class='ctx'> 	/* Async DMA TLB fault information */</div><div class='hunk'>@@ -210,9 +219,6 @@ static inline void release_thread(struct task_struct *dead_task)</div><div class='ctx'> 	/* Nothing for now */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status. */</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);</div><div class='ctx'> </div><div class='ctx'> extern int do_work_pending(struct pt_regs *regs, u32 flags);</div><div class='head'>diff --git a/arch/tile/include/asm/setup.h b/arch/tile/include/asm/setup.h<br/>index e58613e0752f..c67eb70ea78e 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/setup.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/setup.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/setup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/setup.h</a></div><div class='hunk'>@@ -41,15 +41,15 @@ void restrict_dma_mpls(void);</div><div class='ctx'> #ifdef CONFIG_HARDWALL</div><div class='ctx'> /* User-level network management functions */</div><div class='ctx'> void reset_network_state(void);</div><div class='del'>-void grant_network_mpls(void);</div><div class='del'>-void restrict_network_mpls(void);</div><div class='ctx'> struct task_struct;</div><div class='del'>-int hardwall_deactivate(struct task_struct *task);</div><div class='add'>+void hardwall_switch_tasks(struct task_struct *prev, struct task_struct *next);</div><div class='add'>+void hardwall_deactivate_all(struct task_struct *task);</div><div class='add'>+int hardwall_ipi_valid(int cpu);</div><div class='ctx'> </div><div class='ctx'> /* Hook hardwall code into changes in affinity. */</div><div class='ctx'> #define arch_set_cpus_allowed(p, new_mask) do { \</div><div class='del'>-	if (p-&gt;thread.hardwall &amp;&amp; !cpumask_equal(&amp;p-&gt;cpus_allowed, new_mask)) \</div><div class='del'>-		hardwall_deactivate(p); \</div><div class='add'>+	if (!cpumask_equal(&amp;p-&gt;cpus_allowed, new_mask)) \</div><div class='add'>+		hardwall_deactivate_all(p); \</div><div class='ctx'> } while (0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/include/asm/syscalls.h b/arch/tile/include/asm/syscalls.h<br/>index 3b5507c31eae..06f0464cfed9 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/syscalls.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/syscalls.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/syscalls.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/syscalls.h</a></div><div class='hunk'>@@ -43,7 +43,8 @@ long sys32_fadvise64(int fd, u32 offset_lo, u32 offset_hi,</div><div class='ctx'> 		     u32 len, int advice);</div><div class='ctx'> int sys32_fadvise64_64(int fd, u32 offset_lo, u32 offset_hi,</div><div class='ctx'> 		       u32 len_lo, u32 len_hi, int advice);</div><div class='del'>-long sys_flush_cache(void);</div><div class='add'>+long sys_cacheflush(unsigned long addr, unsigned long len,</div><div class='add'>+		    unsigned long flags);</div><div class='ctx'> #ifndef __tilegx__  /* No mmap() in the 32-bit kernel. */</div><div class='ctx'> #define sys_mmap sys_mmap</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/tile/include/asm/thread_info.h b/arch/tile/include/asm/thread_info.h<br/>index bc4f562bd459..e9c670d7a7fe 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/thread_info.h</a></div><div class='hunk'>@@ -77,32 +77,30 @@ struct thread_info {</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='add'>+void arch_release_thread_info(struct thread_info *info);</div><div class='add'>+</div><div class='ctx'> /* How to get the thread information struct from C. */</div><div class='ctx'> register unsigned long stack_pointer __asm__("sp");</div><div class='ctx'> </div><div class='ctx'> #define current_thread_info() \</div><div class='ctx'>   ((struct thread_info *)(stack_pointer &amp; -THREAD_SIZE))</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-extern struct thread_info *alloc_thread_info_node(struct task_struct *task, int node);</div><div class='del'>-extern void free_thread_info(struct thread_info *info);</div><div class='del'>-</div><div class='ctx'> /* Sit on a nap instruction until interrupted. */</div><div class='ctx'> extern void smp_nap(void);</div><div class='ctx'> </div><div class='ctx'> /* Enable interrupts racelessly and nap forever: helper for cpu_idle(). */</div><div class='ctx'> extern void _cpu_idle(void);</div><div class='ctx'> </div><div class='del'>-/* Switch boot idle thread to a freshly-allocated stack and free old stack. */</div><div class='del'>-extern void cpu_idle_on_new_stack(struct thread_info *old_ti,</div><div class='del'>-				  unsigned long new_sp,</div><div class='del'>-				  unsigned long new_ss10);</div><div class='del'>-</div><div class='ctx'> #else /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='del'>-/* how to get the thread information struct from ASM */</div><div class='add'>+/*</div><div class='add'>+ * How to get the thread information struct from assembly.</div><div class='add'>+ * Note that we use different macros since different architectures</div><div class='add'>+ * have different semantics in their "mm" instruction and we would</div><div class='add'>+ * like to guarantee that the macro expands to exactly one instruction.</div><div class='add'>+ */</div><div class='ctx'> #ifdef __tilegx__</div><div class='del'>-#define GET_THREAD_INFO(reg) move reg, sp; mm reg, zero, LOG2_THREAD_SIZE, 63</div><div class='add'>+#define EXTRACT_THREAD_INFO(reg) mm reg, zero, LOG2_THREAD_SIZE, 63</div><div class='ctx'> #else</div><div class='ctx'> #define GET_THREAD_INFO(reg) mm reg, sp, zero, LOG2_THREAD_SIZE, 31</div><div class='ctx'> #endif</div><div class='hunk'>@@ -163,7 +161,23 @@ static inline void set_restore_sigmask(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_info *ti = current_thread_info();</div><div class='ctx'> 	ti-&gt;status |= TS_RESTORE_SIGMASK;</div><div class='del'>-	set_bit(TIF_SIGPENDING, &amp;ti-&gt;flags);</div><div class='add'>+	WARN_ON(!test_bit(TIF_SIGPENDING, &amp;ti-&gt;flags));</div><div class='add'>+}</div><div class='add'>+static inline void clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	return current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_and_clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	struct thread_info *ti = current_thread_info();</div><div class='add'>+	if (!(ti-&gt;status &amp; TS_RESTORE_SIGMASK))</div><div class='add'>+		return false;</div><div class='add'>+	ti-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> #endif	/* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/include/asm/tlbflush.h b/arch/tile/include/asm/tlbflush.h<br/>index 96199d214fb8..dcf91b25a1e5 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/tlbflush.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/tlbflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/tlbflush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/tlbflush.h</a></div><div class='hunk'>@@ -38,16 +38,11 @@ DECLARE_PER_CPU(int, current_asid);</div><div class='ctx'> /* The hypervisor tells us what ASIDs are available to us. */</div><div class='ctx'> extern int min_asid, max_asid;</div><div class='ctx'> </div><div class='del'>-static inline unsigned long hv_page_size(const struct vm_area_struct *vma)</div><div class='del'>-{</div><div class='del'>-	return (vma-&gt;vm_flags &amp; VM_HUGETLB) ? HPAGE_SIZE : PAGE_SIZE;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Pass as vma pointer for non-executable mapping, if no vma available. */</div><div class='del'>-#define FLUSH_NONEXEC ((const struct vm_area_struct *)-1UL)</div><div class='add'>+#define FLUSH_NONEXEC ((struct vm_area_struct *)-1UL)</div><div class='ctx'> </div><div class='ctx'> /* Flush a single user page on this cpu. */</div><div class='del'>-static inline void local_flush_tlb_page(const struct vm_area_struct *vma,</div><div class='add'>+static inline void local_flush_tlb_page(struct vm_area_struct *vma,</div><div class='ctx'> 					unsigned long addr,</div><div class='ctx'> 					unsigned long page_size)</div><div class='ctx'> {</div><div class='hunk'>@@ -60,7 +55,7 @@ static inline void local_flush_tlb_page(const struct vm_area_struct *vma,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Flush range of user pages on this cpu. */</div><div class='del'>-static inline void local_flush_tlb_pages(const struct vm_area_struct *vma,</div><div class='add'>+static inline void local_flush_tlb_pages(struct vm_area_struct *vma,</div><div class='ctx'> 					 unsigned long addr,</div><div class='ctx'> 					 unsigned long page_size,</div><div class='ctx'> 					 unsigned long len)</div><div class='hunk'>@@ -117,10 +112,10 @@ extern void flush_tlb_all(void);</div><div class='ctx'> extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);</div><div class='ctx'> extern void flush_tlb_current_task(void);</div><div class='ctx'> extern void flush_tlb_mm(struct mm_struct *);</div><div class='del'>-extern void flush_tlb_page(const struct vm_area_struct *, unsigned long);</div><div class='del'>-extern void flush_tlb_page_mm(const struct vm_area_struct *,</div><div class='add'>+extern void flush_tlb_page(struct vm_area_struct *, unsigned long);</div><div class='add'>+extern void flush_tlb_page_mm(struct vm_area_struct *,</div><div class='ctx'> 			      struct mm_struct *, unsigned long);</div><div class='del'>-extern void flush_tlb_range(const struct vm_area_struct *,</div><div class='add'>+extern void flush_tlb_range(struct vm_area_struct *,</div><div class='ctx'> 			    unsigned long start, unsigned long end);</div><div class='ctx'> </div><div class='ctx'> #define flush_tlb()     flush_tlb_current_task()</div><div class='head'>diff --git a/arch/tile/include/asm/topology.h b/arch/tile/include/asm/topology.h<br/>index 6fdd0c860193..7a7ce390534f 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/topology.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/topology.h</a></div><div class='hunk'>@@ -78,32 +78,6 @@ static inline const struct cpumask *cpumask_of_node(int node)</div><div class='ctx'> 	.balance_interval	= 32,					\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* sched_domains SD_NODE_INIT for TILE architecture */</div><div class='del'>-#define SD_NODE_INIT (struct sched_domain) {				\</div><div class='del'>-	.min_interval		= 16,					\</div><div class='del'>-	.max_interval		= 512,					\</div><div class='del'>-	.busy_factor		= 32,					\</div><div class='del'>-	.imbalance_pct		= 125,					\</div><div class='del'>-	.cache_nice_tries	= 1,					\</div><div class='del'>-	.busy_idx		= 3,					\</div><div class='del'>-	.idle_idx		= 1,					\</div><div class='del'>-	.newidle_idx		= 2,					\</div><div class='del'>-	.wake_idx		= 1,					\</div><div class='del'>-	.flags			= 1*SD_LOAD_BALANCE			\</div><div class='del'>-				| 1*SD_BALANCE_NEWIDLE			\</div><div class='del'>-				| 1*SD_BALANCE_EXEC			\</div><div class='del'>-				| 1*SD_BALANCE_FORK			\</div><div class='del'>-				| 0*SD_BALANCE_WAKE			\</div><div class='del'>-				| 0*SD_WAKE_AFFINE			\</div><div class='del'>-				| 0*SD_PREFER_LOCAL			\</div><div class='del'>-				| 0*SD_SHARE_CPUPOWER			\</div><div class='del'>-				| 0*SD_SHARE_PKG_RESOURCES		\</div><div class='del'>-				| 1*SD_SERIALIZE			\</div><div class='del'>-				,					\</div><div class='del'>-	.last_balance		= jiffies,				\</div><div class='del'>-	.balance_interval	= 128,					\</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* By definition, we create nodes based on online memory. */</div><div class='ctx'> #define node_has_online_mem(nid) 1</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/include/asm/uaccess.h b/arch/tile/include/asm/uaccess.h<br/>index ef34d2caa5b1..c3dd275f25e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/uaccess.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/uaccess.h</a></div><div class='hunk'>@@ -114,45 +114,75 @@ struct exception_table_entry {</div><div class='ctx'> extern int fixup_exception(struct pt_regs *regs);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * We return the __get_user_N function results in a structure,</div><div class='del'>- * thus in r0 and r1.  If "err" is zero, "val" is the result</div><div class='del'>- * of the read; otherwise, "err" is -EFAULT.</div><div class='del'>- *</div><div class='del'>- * We rarely need 8-byte values on a 32-bit architecture, but</div><div class='del'>- * we size the structure to accommodate.  In practice, for the</div><div class='del'>- * the smaller reads, we can zero the high word for free, and</div><div class='del'>- * the caller will ignore it by virtue of casting anyway.</div><div class='add'>+ * Support macros for __get_user().</div><div class='add'>+ *</div><div class='add'>+ * Implementation note: The "case 8" logic of casting to the type of</div><div class='add'>+ * the result of subtracting the value from itself is basically a way</div><div class='add'>+ * of keeping all integer types the same, but casting any pointers to</div><div class='add'>+ * ptrdiff_t, i.e. also an integer type.  This way there are no</div><div class='add'>+ * questionable casts seen by the compiler on an ILP32 platform.</div><div class='add'>+ *</div><div class='add'>+ * Note that __get_user() and __put_user() assume proper alignment.</div><div class='ctx'>  */</div><div class='del'>-struct __get_user {</div><div class='del'>-	unsigned long long val;</div><div class='del'>-	int err;</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * FIXME: we should express these as inline extended assembler, since</div><div class='del'>- * they're fundamentally just a variable dereference and some</div><div class='del'>- * supporting exception_table gunk.  Note that (a la i386) we can</div><div class='del'>- * extend the copy_to_user and copy_from_user routines to call into</div><div class='del'>- * such extended assembler routines, though we will have to use a</div><div class='del'>- * different return code in that case (1, 2, or 4, rather than -EFAULT).</div><div class='del'>- */</div><div class='del'>-extern struct __get_user __get_user_1(const void __user *);</div><div class='del'>-extern struct __get_user __get_user_2(const void __user *);</div><div class='del'>-extern struct __get_user __get_user_4(const void __user *);</div><div class='del'>-extern struct __get_user __get_user_8(const void __user *);</div><div class='del'>-extern int __put_user_1(long, void __user *);</div><div class='del'>-extern int __put_user_2(long, void __user *);</div><div class='del'>-extern int __put_user_4(long, void __user *);</div><div class='del'>-extern int __put_user_8(long long, void __user *);</div><div class='del'>-</div><div class='del'>-/* Unimplemented routines to cause linker failures */</div><div class='del'>-extern struct __get_user __get_user_bad(void);</div><div class='del'>-extern int __put_user_bad(void);</div><div class='add'>+#ifdef __LP64__</div><div class='add'>+#define _ASM_PTR	".quad"</div><div class='add'>+#else</div><div class='add'>+#define _ASM_PTR	".long"</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define __get_user_asm(OP, x, ptr, ret)					\</div><div class='add'>+	asm volatile("1: {" #OP " %1, %2; movei %0, 0 }\n"		\</div><div class='add'>+		     ".pushsection .fixup,\"ax\"\n"			\</div><div class='add'>+		     "0: { movei %1, 0; movei %0, %3 }\n"		\</div><div class='add'>+		     "j 9f\n"						\</div><div class='add'>+		     ".section __ex_table,\"a\"\n"			\</div><div class='add'>+		     _ASM_PTR " 1b, 0b\n"				\</div><div class='add'>+		     ".popsection\n"					\</div><div class='add'>+		     "9:"						\</div><div class='add'>+		     : "=r" (ret), "=r" (x)				\</div><div class='add'>+		     : "r" (ptr), "i" (-EFAULT))</div><div class='add'>+</div><div class='add'>+#ifdef __tilegx__</div><div class='add'>+#define __get_user_1(x, ptr, ret) __get_user_asm(ld1u, x, ptr, ret)</div><div class='add'>+#define __get_user_2(x, ptr, ret) __get_user_asm(ld2u, x, ptr, ret)</div><div class='add'>+#define __get_user_4(x, ptr, ret) __get_user_asm(ld4u, x, ptr, ret)</div><div class='add'>+#define __get_user_8(x, ptr, ret) __get_user_asm(ld, x, ptr, ret)</div><div class='add'>+#else</div><div class='add'>+#define __get_user_1(x, ptr, ret) __get_user_asm(lb_u, x, ptr, ret)</div><div class='add'>+#define __get_user_2(x, ptr, ret) __get_user_asm(lh_u, x, ptr, ret)</div><div class='add'>+#define __get_user_4(x, ptr, ret) __get_user_asm(lw, x, ptr, ret)</div><div class='add'>+#ifdef __LITTLE_ENDIAN</div><div class='add'>+#define __lo32(a, b) a</div><div class='add'>+#define __hi32(a, b) b</div><div class='add'>+#else</div><div class='add'>+#define __lo32(a, b) b</div><div class='add'>+#define __hi32(a, b) a</div><div class='add'>+#endif</div><div class='add'>+#define __get_user_8(x, ptr, ret)					\</div><div class='add'>+	({								\</div><div class='add'>+		unsigned int __a, __b;					\</div><div class='add'>+		asm volatile("1: { lw %1, %3; addi %2, %3, 4 }\n"	\</div><div class='add'>+			     "2: { lw %2, %2; movei %0, 0 }\n"		\</div><div class='add'>+			     ".pushsection .fixup,\"ax\"\n"		\</div><div class='add'>+			     "0: { movei %1, 0; movei %2, 0 }\n"	\</div><div class='add'>+			     "{ movei %0, %4; j 9f }\n"			\</div><div class='add'>+			     ".section __ex_table,\"a\"\n"		\</div><div class='add'>+			     ".word 1b, 0b\n"				\</div><div class='add'>+			     ".word 2b, 0b\n"				\</div><div class='add'>+			     ".popsection\n"				\</div><div class='add'>+			     "9:"					\</div><div class='add'>+			     : "=r" (ret), "=r" (__a), "=&amp;r" (__b)	\</div><div class='add'>+			     : "r" (ptr), "i" (-EFAULT));		\</div><div class='add'>+		(x) = (__typeof(x))(__typeof((x)-(x)))			\</div><div class='add'>+			(((u64)__hi32(__a, __b) &lt;&lt; 32) |		\</div><div class='add'>+			 __lo32(__a, __b));				\</div><div class='add'>+	})</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+extern int __get_user_bad(void)</div><div class='add'>+  __attribute__((warning("sizeof __get_user argument not 1, 2, 4 or 8")));</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Careful: we have to cast the result to the type of the pointer</div><div class='del'>- * for sign reasons.</div><div class='del'>- */</div><div class='ctx'> /**</div><div class='ctx'>  * __get_user: - Get a simple variable from user space, with less checking.</div><div class='ctx'>  * @x:   Variable to store result.</div><div class='hunk'>@@ -174,30 +204,62 @@ extern int __put_user_bad(void);</div><div class='ctx'>  * function.</div><div class='ctx'>  */</div><div class='ctx'> #define __get_user(x, ptr)						\</div><div class='del'>-({	struct __get_user __ret;					\</div><div class='del'>-	__typeof__(*(ptr)) const __user *__gu_addr = (ptr);		\</div><div class='del'>-	__chk_user_ptr(__gu_addr);					\</div><div class='del'>-	switch (sizeof(*(__gu_addr))) {					\</div><div class='del'>-	case 1:								\</div><div class='del'>-		__ret = __get_user_1(__gu_addr);			\</div><div class='del'>-		break;							\</div><div class='del'>-	case 2:								\</div><div class='del'>-		__ret = __get_user_2(__gu_addr);			\</div><div class='del'>-		break;							\</div><div class='del'>-	case 4:								\</div><div class='del'>-		__ret = __get_user_4(__gu_addr);			\</div><div class='del'>-		break;							\</div><div class='del'>-	case 8:								\</div><div class='del'>-		__ret = __get_user_8(__gu_addr);			\</div><div class='del'>-		break;							\</div><div class='del'>-	default:							\</div><div class='del'>-		__ret = __get_user_bad();				\</div><div class='del'>-		break;							\</div><div class='del'>-	}								\</div><div class='del'>-	(x) = (__typeof__(*__gu_addr)) (__typeof__(*__gu_addr - *__gu_addr)) \</div><div class='del'>-	  __ret.val;			                                \</div><div class='del'>-	__ret.err;							\</div><div class='del'>-})</div><div class='add'>+	({								\</div><div class='add'>+		int __ret;						\</div><div class='add'>+		__chk_user_ptr(ptr);					\</div><div class='add'>+		switch (sizeof(*(ptr))) {				\</div><div class='add'>+		case 1: __get_user_1(x, ptr, __ret); break;		\</div><div class='add'>+		case 2: __get_user_2(x, ptr, __ret); break;		\</div><div class='add'>+		case 4: __get_user_4(x, ptr, __ret); break;		\</div><div class='add'>+		case 8: __get_user_8(x, ptr, __ret); break;		\</div><div class='add'>+		default: __ret = __get_user_bad(); break;		\</div><div class='add'>+		}							\</div><div class='add'>+		__ret;							\</div><div class='add'>+	})</div><div class='add'>+</div><div class='add'>+/* Support macros for __put_user(). */</div><div class='add'>+</div><div class='add'>+#define __put_user_asm(OP, x, ptr, ret)			\</div><div class='add'>+	asm volatile("1: {" #OP " %1, %2; movei %0, 0 }\n"		\</div><div class='add'>+		     ".pushsection .fixup,\"ax\"\n"			\</div><div class='add'>+		     "0: { movei %0, %3; j 9f }\n"			\</div><div class='add'>+		     ".section __ex_table,\"a\"\n"			\</div><div class='add'>+		     _ASM_PTR " 1b, 0b\n"				\</div><div class='add'>+		     ".popsection\n"					\</div><div class='add'>+		     "9:"						\</div><div class='add'>+		     : "=r" (ret)					\</div><div class='add'>+		     : "r" (ptr), "r" (x), "i" (-EFAULT))</div><div class='add'>+</div><div class='add'>+#ifdef __tilegx__</div><div class='add'>+#define __put_user_1(x, ptr, ret) __put_user_asm(st1, x, ptr, ret)</div><div class='add'>+#define __put_user_2(x, ptr, ret) __put_user_asm(st2, x, ptr, ret)</div><div class='add'>+#define __put_user_4(x, ptr, ret) __put_user_asm(st4, x, ptr, ret)</div><div class='add'>+#define __put_user_8(x, ptr, ret) __put_user_asm(st, x, ptr, ret)</div><div class='add'>+#else</div><div class='add'>+#define __put_user_1(x, ptr, ret) __put_user_asm(sb, x, ptr, ret)</div><div class='add'>+#define __put_user_2(x, ptr, ret) __put_user_asm(sh, x, ptr, ret)</div><div class='add'>+#define __put_user_4(x, ptr, ret) __put_user_asm(sw, x, ptr, ret)</div><div class='add'>+#define __put_user_8(x, ptr, ret)					\</div><div class='add'>+	({								\</div><div class='add'>+		u64 __x = (__typeof((x)-(x)))(x);			\</div><div class='add'>+		int __lo = (int) __x, __hi = (int) (__x &gt;&gt; 32);		\</div><div class='add'>+		asm volatile("1: { sw %1, %2; addi %0, %1, 4 }\n"	\</div><div class='add'>+			     "2: { sw %0, %3; movei %0, 0 }\n"		\</div><div class='add'>+			     ".pushsection .fixup,\"ax\"\n"		\</div><div class='add'>+			     "0: { movei %0, %4; j 9f }\n"		\</div><div class='add'>+			     ".section __ex_table,\"a\"\n"		\</div><div class='add'>+			     ".word 1b, 0b\n"				\</div><div class='add'>+			     ".word 2b, 0b\n"				\</div><div class='add'>+			     ".popsection\n"				\</div><div class='add'>+			     "9:"					\</div><div class='add'>+			     : "=&amp;r" (ret)				\</div><div class='add'>+			     : "r" (ptr), "r" (__lo32(__lo, __hi)),	\</div><div class='add'>+			     "r" (__hi32(__lo, __hi)), "i" (-EFAULT));	\</div><div class='add'>+	})</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+extern int __put_user_bad(void)</div><div class='add'>+  __attribute__((warning("sizeof __put_user argument not 1, 2, 4 or 8")));</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * __put_user: - Write a simple value into user space, with less checking.</div><div class='hunk'>@@ -217,39 +279,19 @@ extern int __put_user_bad(void);</div><div class='ctx'>  * function.</div><div class='ctx'>  *</div><div class='ctx'>  * Returns zero on success, or -EFAULT on error.</div><div class='del'>- *</div><div class='del'>- * Implementation note: The "case 8" logic of casting to the type of</div><div class='del'>- * the result of subtracting the value from itself is basically a way</div><div class='del'>- * of keeping all integer types the same, but casting any pointers to</div><div class='del'>- * ptrdiff_t, i.e. also an integer type.  This way there are no</div><div class='del'>- * questionable casts seen by the compiler on an ILP32 platform.</div><div class='ctx'>  */</div><div class='ctx'> #define __put_user(x, ptr)						\</div><div class='ctx'> ({									\</div><div class='del'>-	int __pu_err = 0;						\</div><div class='del'>-	__typeof__(*(ptr)) __user *__pu_addr = (ptr);			\</div><div class='del'>-	typeof(*__pu_addr) __pu_val = (x);				\</div><div class='del'>-	__chk_user_ptr(__pu_addr);					\</div><div class='del'>-	switch (sizeof(__pu_val)) {					\</div><div class='del'>-	case 1:								\</div><div class='del'>-		__pu_err = __put_user_1((long)__pu_val, __pu_addr);	\</div><div class='del'>-		break;							\</div><div class='del'>-	case 2:								\</div><div class='del'>-		__pu_err = __put_user_2((long)__pu_val, __pu_addr);	\</div><div class='del'>-		break;							\</div><div class='del'>-	case 4:								\</div><div class='del'>-		__pu_err = __put_user_4((long)__pu_val, __pu_addr);	\</div><div class='del'>-		break;							\</div><div class='del'>-	case 8:								\</div><div class='del'>-		__pu_err =						\</div><div class='del'>-		  __put_user_8((__typeof__(__pu_val - __pu_val))__pu_val,\</div><div class='del'>-			__pu_addr);					\</div><div class='del'>-		break;							\</div><div class='del'>-	default:							\</div><div class='del'>-		__pu_err = __put_user_bad();				\</div><div class='del'>-		break;							\</div><div class='add'>+	int __ret;							\</div><div class='add'>+	__chk_user_ptr(ptr);						\</div><div class='add'>+	switch (sizeof(*(ptr))) {					\</div><div class='add'>+	case 1: __put_user_1(x, ptr, __ret); break;			\</div><div class='add'>+	case 2: __put_user_2(x, ptr, __ret); break;			\</div><div class='add'>+	case 4: __put_user_4(x, ptr, __ret); break;			\</div><div class='add'>+	case 8: __put_user_8(x, ptr, __ret); break;			\</div><div class='add'>+	default: __ret = __put_user_bad(); break;			\</div><div class='ctx'> 	}								\</div><div class='del'>-	__pu_err;							\</div><div class='add'>+	__ret;								\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -378,7 +420,7 @@ static inline unsigned long __must_check copy_from_user(void *to,</div><div class='ctx'> /**</div><div class='ctx'>  * __copy_in_user() - copy data within user space, with less checking.</div><div class='ctx'>  * @to:   Destination address, in user space.</div><div class='del'>- * @from: Source address, in kernel space.</div><div class='add'>+ * @from: Source address, in user space.</div><div class='ctx'>  * @n:    Number of bytes to copy.</div><div class='ctx'>  *</div><div class='ctx'>  * Context: User context only.  This function may sleep.</div><div class='head'>diff --git a/arch/tile/include/asm/unistd.h b/arch/tile/include/asm/unistd.h<br/>index f70bf1c541f1..a017246ca0ce 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/asm/unistd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/asm/unistd.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/asm/unistd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/asm/unistd.h</a></div><div class='hunk'>@@ -24,8 +24,8 @@</div><div class='ctx'> #include &lt;asm-generic/unistd.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Additional Tilera-specific syscalls. */</div><div class='del'>-#define __NR_flush_cache	(__NR_arch_specific_syscall + 1)</div><div class='del'>-__SYSCALL(__NR_flush_cache, sys_flush_cache)</div><div class='add'>+#define __NR_cacheflush	(__NR_arch_specific_syscall + 1)</div><div class='add'>+__SYSCALL(__NR_cacheflush, sys_cacheflush)</div><div class='ctx'> </div><div class='ctx'> #ifndef __tilegx__</div><div class='ctx'> /* "Fast" syscalls provide atomic support for 32-bit chips. */</div><div class='head'>diff --git a/arch/tile/include/hv/drv_xgbe_intf.h b/arch/tile/include/hv/drv_xgbe_intf.h<br/>index f13188ac281a..2a20b266d944 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/hv/drv_xgbe_intf.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/hv/drv_xgbe_intf.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/hv/drv_xgbe_intf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/hv/drv_xgbe_intf.h</a></div><div class='hunk'>@@ -460,7 +460,7 @@ typedef void* lepp_comp_t;</div><div class='ctx'>  *  linux's "MAX_SKB_FRAGS", and presumably over-estimates by one, for</div><div class='ctx'>  *  our page size of exactly 65536.  We add one for a "body" fragment.</div><div class='ctx'>  */</div><div class='del'>-#define LEPP_MAX_FRAGS (65536 / HV_PAGE_SIZE_SMALL + 2 + 1)</div><div class='add'>+#define LEPP_MAX_FRAGS (65536 / HV_DEFAULT_PAGE_SIZE_SMALL + 2 + 1)</div><div class='ctx'> </div><div class='ctx'> /** Total number of bytes needed for an lepp_tso_cmd_t. */</div><div class='ctx'> #define LEPP_TSO_CMD_SIZE(num_frags, header_size) \</div><div class='head'>diff --git a/arch/tile/include/hv/hypervisor.h b/arch/tile/include/hv/hypervisor.h<br/>index 72ec1e972f15..ccd847e2347f 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/include/hv/hypervisor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/include/hv/hypervisor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/include/hv/hypervisor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/include/hv/hypervisor.h</a></div><div class='hunk'>@@ -17,8 +17,8 @@</div><div class='ctx'>  * The hypervisor's public API.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef _TILE_HV_H</div><div class='del'>-#define _TILE_HV_H</div><div class='add'>+#ifndef _HV_HV_H</div><div class='add'>+#define _HV_HV_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;arch/chip.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -42,25 +42,45 @@</div><div class='ctx'>  */</div><div class='ctx'> #define HV_L1_SPAN (__HV_SIZE_ONE &lt;&lt; HV_LOG2_L1_SPAN)</div><div class='ctx'> </div><div class='del'>-/** The log2 of the size of small pages, in bytes. This value should</div><div class='del'>- * be verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL).</div><div class='add'>+/** The log2 of the initial size of small pages, in bytes.</div><div class='add'>+ * See HV_DEFAULT_PAGE_SIZE_SMALL.</div><div class='ctx'>  */</div><div class='del'>-#define HV_LOG2_PAGE_SIZE_SMALL 16</div><div class='add'>+#define HV_LOG2_DEFAULT_PAGE_SIZE_SMALL 16</div><div class='ctx'> </div><div class='del'>-/** The size of small pages, in bytes. This value should be verified</div><div class='add'>+/** The initial size of small pages, in bytes. This value should be verified</div><div class='ctx'>  * at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL).</div><div class='add'>+ * It may also be modified when installing a new context.</div><div class='ctx'>  */</div><div class='del'>-#define HV_PAGE_SIZE_SMALL (__HV_SIZE_ONE &lt;&lt; HV_LOG2_PAGE_SIZE_SMALL)</div><div class='add'>+#define HV_DEFAULT_PAGE_SIZE_SMALL \</div><div class='add'>+  (__HV_SIZE_ONE &lt;&lt; HV_LOG2_DEFAULT_PAGE_SIZE_SMALL)</div><div class='ctx'> </div><div class='del'>-/** The log2 of the size of large pages, in bytes. This value should be</div><div class='del'>- * verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE).</div><div class='add'>+/** The log2 of the initial size of large pages, in bytes.</div><div class='add'>+ * See HV_DEFAULT_PAGE_SIZE_LARGE.</div><div class='ctx'>  */</div><div class='del'>-#define HV_LOG2_PAGE_SIZE_LARGE 24</div><div class='add'>+#define HV_LOG2_DEFAULT_PAGE_SIZE_LARGE 24</div><div class='ctx'> </div><div class='del'>-/** The size of large pages, in bytes. This value should be verified</div><div class='add'>+/** The initial size of large pages, in bytes. This value should be verified</div><div class='ctx'>  * at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE).</div><div class='add'>+ * It may also be modified when installing a new context.</div><div class='ctx'>  */</div><div class='del'>-#define HV_PAGE_SIZE_LARGE (__HV_SIZE_ONE &lt;&lt; HV_LOG2_PAGE_SIZE_LARGE)</div><div class='add'>+#define HV_DEFAULT_PAGE_SIZE_LARGE \</div><div class='add'>+  (__HV_SIZE_ONE &lt;&lt; HV_LOG2_DEFAULT_PAGE_SIZE_LARGE)</div><div class='add'>+</div><div class='add'>+#if CHIP_VA_WIDTH() &gt; 32</div><div class='add'>+</div><div class='add'>+/** The log2 of the initial size of jumbo pages, in bytes.</div><div class='add'>+ * See HV_DEFAULT_PAGE_SIZE_JUMBO.</div><div class='add'>+ */</div><div class='add'>+#define HV_LOG2_DEFAULT_PAGE_SIZE_JUMBO 32</div><div class='add'>+</div><div class='add'>+/** The initial size of jumbo pages, in bytes. This value should</div><div class='add'>+ * be verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_JUMBO).</div><div class='add'>+ * It may also be modified when installing a new context.</div><div class='add'>+ */</div><div class='add'>+#define HV_DEFAULT_PAGE_SIZE_JUMBO \</div><div class='add'>+  (__HV_SIZE_ONE &lt;&lt; HV_LOG2_DEFAULT_PAGE_SIZE_JUMBO)</div><div class='add'>+</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /** The log2 of the granularity at which page tables must be aligned;</div><div class='ctx'>  *  in other words, the CPA for a page table must have this many zero</div><div class='hunk'>@@ -280,8 +300,11 @@</div><div class='ctx'> #define HV_DISPATCH_GET_IPI_PTE                   56</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/** hv_set_pte_super_shift */</div><div class='add'>+#define HV_DISPATCH_SET_PTE_SUPER_SHIFT           57</div><div class='add'>+</div><div class='ctx'> /** One more than the largest dispatch value */</div><div class='del'>-#define _HV_DISPATCH_END                          57</div><div class='add'>+#define _HV_DISPATCH_END                          58</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLER__</div><div class='hunk'>@@ -401,7 +424,18 @@ typedef enum {</div><div class='ctx'>    *  that the temperature has hit an upper limit and is no longer being</div><div class='ctx'>    *  accurately tracked.</div><div class='ctx'>    */</div><div class='del'>-  HV_SYSCONF_BOARD_TEMP      = 6</div><div class='add'>+  HV_SYSCONF_BOARD_TEMP      = 6,</div><div class='add'>+</div><div class='add'>+  /** Legal page size bitmask for hv_install_context().</div><div class='add'>+   * For example, if 16KB and 64KB small pages are supported,</div><div class='add'>+   * it would return "HV_CTX_PG_SM_16K | HV_CTX_PG_SM_64K".</div><div class='add'>+   */</div><div class='add'>+  HV_SYSCONF_VALID_PAGE_SIZES = 7,</div><div class='add'>+</div><div class='add'>+  /** The size of jumbo pages, in bytes.</div><div class='add'>+   * If no jumbo pages are available, zero will be returned.</div><div class='add'>+   */</div><div class='add'>+  HV_SYSCONF_PAGE_SIZE_JUMBO = 8,</div><div class='ctx'> </div><div class='ctx'> } HV_SysconfQuery;</div><div class='ctx'> </div><div class='hunk'>@@ -474,7 +508,19 @@ typedef enum {</div><div class='ctx'>   HV_CONFSTR_SWITCH_CONTROL  = 14,</div><div class='ctx'> </div><div class='ctx'>   /** Chip revision level. */</div><div class='del'>-  HV_CONFSTR_CHIP_REV        = 15</div><div class='add'>+  HV_CONFSTR_CHIP_REV        = 15,</div><div class='add'>+</div><div class='add'>+  /** CPU module part number. */</div><div class='add'>+  HV_CONFSTR_CPUMOD_PART_NUM = 16,</div><div class='add'>+</div><div class='add'>+  /** CPU module serial number. */</div><div class='add'>+  HV_CONFSTR_CPUMOD_SERIAL_NUM = 17,</div><div class='add'>+</div><div class='add'>+  /** CPU module revision level. */</div><div class='add'>+  HV_CONFSTR_CPUMOD_REV      = 18,</div><div class='add'>+</div><div class='add'>+  /** Human-readable CPU module description. */</div><div class='add'>+  HV_CONFSTR_CPUMOD_DESC     = 19</div><div class='ctx'> </div><div class='ctx'> } HV_ConfstrQuery;</div><div class='ctx'> </div><div class='hunk'>@@ -494,11 +540,16 @@ int hv_confstr(HV_ConfstrQuery query, HV_VirtAddr buf, int len);</div><div class='ctx'> /** Tile coordinate */</div><div class='ctx'> typedef struct</div><div class='ctx'> {</div><div class='add'>+#ifndef __BIG_ENDIAN__</div><div class='ctx'>   /** X coordinate, relative to supervisor's top-left coordinate */</div><div class='ctx'>   int x;</div><div class='ctx'> </div><div class='ctx'>   /** Y coordinate, relative to supervisor's top-left coordinate */</div><div class='ctx'>   int y;</div><div class='add'>+#else</div><div class='add'>+  int y;</div><div class='add'>+  int x;</div><div class='add'>+#endif</div><div class='ctx'> } HV_Coord;</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -649,6 +700,12 @@ void hv_set_rtc(HV_RTCTime time);</div><div class='ctx'>  *  new page table does not need to contain any mapping for the</div><div class='ctx'>  *  hv_install_context address itself.</div><div class='ctx'>  *</div><div class='add'>+ *  At most one HV_CTX_PG_SM_* flag may be specified in "flags";</div><div class='add'>+ *  if multiple flags are specified, HV_EINVAL is returned.</div><div class='add'>+ *  Specifying none of the flags results in using the default page size.</div><div class='add'>+ *  All cores participating in a given client must request the same</div><div class='add'>+ *  page size, or the results are undefined.</div><div class='add'>+ *</div><div class='ctx'>  * @param page_table Root of the page table.</div><div class='ctx'>  * @param access PTE providing info on how to read the page table.  This</div><div class='ctx'>  *   value must be consistent between multiple tiles sharing a page table,</div><div class='hunk'>@@ -667,8 +724,36 @@ int hv_install_context(HV_PhysAddr page_table, HV_PTE access, HV_ASID asid,</div><div class='ctx'> #define HV_CTX_DIRECTIO     0x1   /**&lt; Direct I/O requests are accepted from</div><div class='ctx'>                                        PL0. */</div><div class='ctx'> </div><div class='add'>+#define HV_CTX_PG_SM_4K     0x10  /**&lt; Use 4K small pages, if available. */</div><div class='add'>+#define HV_CTX_PG_SM_16K    0x20  /**&lt; Use 16K small pages, if available. */</div><div class='add'>+#define HV_CTX_PG_SM_64K    0x40  /**&lt; Use 64K small pages, if available. */</div><div class='add'>+#define HV_CTX_PG_SM_MASK   0xf0  /**&lt; Mask of all possible small pages. */</div><div class='add'>+</div><div class='ctx'> #ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+/** Set the number of pages ganged together by HV_PTE_SUPER at a</div><div class='add'>+ * particular level of the page table.</div><div class='add'>+ *</div><div class='add'>+ * The current TILE-Gx hardware only supports powers of four</div><div class='add'>+ * (i.e. log2_count must be a multiple of two), and the requested</div><div class='add'>+ * "super" page size must be less than the span of the next level in</div><div class='add'>+ * the page table.  The largest size that can be requested is 64GB.</div><div class='add'>+ *</div><div class='add'>+ * The shift value is initially "0" for all page table levels,</div><div class='add'>+ * indicating that the HV_PTE_SUPER bit is effectively ignored.</div><div class='add'>+ *</div><div class='add'>+ * If you change the count from one non-zero value to another, the</div><div class='add'>+ * hypervisor will flush the entire TLB and TSB to avoid confusion.</div><div class='add'>+ *</div><div class='add'>+ * @param level Page table level (0, 1, or 2)</div><div class='add'>+ * @param log2_count Base-2 log of the number of pages to gang together,</div><div class='add'>+ * i.e. how much to shift left the base page size for the super page size.</div><div class='add'>+ * @return Zero on success, or a hypervisor error code on failure.</div><div class='add'>+ */</div><div class='add'>+int hv_set_pte_super_shift(int level, int log2_count);</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /** Value returned from hv_inquire_context(). */</div><div class='ctx'> typedef struct</div><div class='ctx'> {</div><div class='hunk'>@@ -986,8 +1071,13 @@ HV_VirtAddrRange hv_inquire_virtual(int idx);</div><div class='ctx'> /** A range of ASID values. */</div><div class='ctx'> typedef struct</div><div class='ctx'> {</div><div class='add'>+#ifndef __BIG_ENDIAN__</div><div class='ctx'>   HV_ASID start;        /**&lt; First ASID in the range. */</div><div class='ctx'>   unsigned int size;    /**&lt; Number of ASIDs. Zero for an invalid range. */</div><div class='add'>+#else</div><div class='add'>+  unsigned int size;    /**&lt; Number of ASIDs. Zero for an invalid range. */</div><div class='add'>+  HV_ASID start;        /**&lt; First ASID in the range. */</div><div class='add'>+#endif</div><div class='ctx'> } HV_ASIDRange;</div><div class='ctx'> </div><div class='ctx'> /** Returns information about a range of ASIDs.</div><div class='hunk'>@@ -1238,11 +1328,14 @@ HV_Errno hv_set_command_line(HV_VirtAddr buf, int length);</div><div class='ctx'>  * with the existing priority pages) or "red/black" (if they don't).</div><div class='ctx'>  * The bitmask provides information on which parts of the cache</div><div class='ctx'>  * have been used for pinned pages so far on this tile; if (1 &lt;&lt; N)</div><div class='del'>- * appears in the bitmask, that indicates that a page has been marked</div><div class='del'>- * "priority" whose PFN equals N, mod 8.</div><div class='add'>+ * appears in the bitmask, that indicates that a 4KB region of the</div><div class='add'>+ * cache starting at (N * 4KB) is in use by a "priority" page.</div><div class='add'>+ * The portion of cache used by a particular page can be computed</div><div class='add'>+ * by taking the page's PA, modulo CHIP_L2_CACHE_SIZE(), and setting</div><div class='add'>+ * all the "4KB" bits corresponding to the actual page size.</div><div class='ctx'>  * @param bitmask A bitmap of priority page set values</div><div class='ctx'>  */</div><div class='del'>-void hv_set_caching(unsigned int bitmask);</div><div class='add'>+void hv_set_caching(unsigned long bitmask);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /** Zero out a specified number of pages.</div><div class='hunk'>@@ -1308,6 +1401,7 @@ typedef enum</div><div class='ctx'> /** Message recipient. */</div><div class='ctx'> typedef struct</div><div class='ctx'> {</div><div class='add'>+#ifndef __BIG_ENDIAN__</div><div class='ctx'>   /** X coordinate, relative to supervisor's top-left coordinate */</div><div class='ctx'>   unsigned int x:11;</div><div class='ctx'> </div><div class='hunk'>@@ -1316,6 +1410,11 @@ typedef struct</div><div class='ctx'> </div><div class='ctx'>   /** Status of this recipient */</div><div class='ctx'>   HV_Recip_State state:10;</div><div class='add'>+#else //__BIG_ENDIAN__</div><div class='add'>+  HV_Recip_State state:10;</div><div class='add'>+  unsigned int y:11;</div><div class='add'>+  unsigned int x:11;</div><div class='add'>+#endif</div><div class='ctx'> } HV_Recipient;</div><div class='ctx'> </div><div class='ctx'> /** Send a message to a set of recipients.</div><div class='hunk'>@@ -1851,12 +1950,12 @@ int hv_flush_remote(HV_PhysAddr cache_pa, unsigned long cache_control,</div><div class='ctx'> #define HV_PTE_INDEX_USER            10  /**&lt; Page is user-accessible */</div><div class='ctx'> #define HV_PTE_INDEX_ACCESSED        11  /**&lt; Page has been accessed */</div><div class='ctx'> #define HV_PTE_INDEX_DIRTY           12  /**&lt; Page has been written */</div><div class='del'>-                                         /*   Bits 13-15 are reserved for</div><div class='add'>+                                         /*   Bits 13-14 are reserved for</div><div class='ctx'>                                               future use. */</div><div class='add'>+#define HV_PTE_INDEX_SUPER           15  /**&lt; Pages ganged together for TLB */</div><div class='ctx'> #define HV_PTE_INDEX_MODE            16  /**&lt; Page mode; see HV_PTE_MODE_xxx */</div><div class='ctx'> #define HV_PTE_MODE_BITS              3  /**&lt; Number of bits in mode */</div><div class='del'>-                                         /*   Bit 19 is reserved for</div><div class='del'>-                                              future use. */</div><div class='add'>+#define HV_PTE_INDEX_CLIENT2         19  /**&lt; Page client state 2 */</div><div class='ctx'> #define HV_PTE_INDEX_LOTAR           20  /**&lt; Page's LOTAR; must be high bits</div><div class='ctx'>                                               of word */</div><div class='ctx'> #define HV_PTE_LOTAR_BITS            12  /**&lt; Number of bits in a LOTAR */</div><div class='hunk'>@@ -1869,15 +1968,6 @@ int hv_flush_remote(HV_PhysAddr cache_pa, unsigned long cache_control,</div><div class='ctx'>                                               of word */</div><div class='ctx'> #define HV_PTE_PTFN_BITS             29  /**&lt; Number of bits in a PTFN */</div><div class='ctx'> </div><div class='del'>-/** Position of the PFN field within the PTE (subset of the PTFN). */</div><div class='del'>-#define HV_PTE_INDEX_PFN (HV_PTE_INDEX_PTFN + (HV_LOG2_PAGE_SIZE_SMALL - \</div><div class='del'>-                                               HV_LOG2_PAGE_TABLE_ALIGN))</div><div class='del'>-</div><div class='del'>-/** Length of the PFN field within the PTE (subset of the PTFN). */</div><div class='del'>-#define HV_PTE_INDEX_PFN_BITS (HV_PTE_INDEX_PTFN_BITS - \</div><div class='del'>-                               (HV_LOG2_PAGE_SIZE_SMALL - \</div><div class='del'>-                                HV_LOG2_PAGE_TABLE_ALIGN))</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Legal values for the PTE's mode field</div><div class='ctx'>  */</div><div class='hunk'>@@ -1957,7 +2047,10 @@ int hv_flush_remote(HV_PhysAddr cache_pa, unsigned long cache_control,</div><div class='ctx'> </div><div class='ctx'> /** Does this PTE map a page?</div><div class='ctx'>  *</div><div class='del'>- * If this bit is set in the level-1 page table, the entry should be</div><div class='add'>+ * If this bit is set in a level-0 page table, the entry should be</div><div class='add'>+ * interpreted as a level-2 page table entry mapping a jumbo page.</div><div class='add'>+ *</div><div class='add'>+ * If this bit is set in a level-1 page table, the entry should be</div><div class='ctx'>  * interpreted as a level-2 page table entry mapping a large page.</div><div class='ctx'>  *</div><div class='ctx'>  * This bit should not be modified by the client while PRESENT is set, as</div><div class='hunk'>@@ -1967,6 +2060,18 @@ int hv_flush_remote(HV_PhysAddr cache_pa, unsigned long cache_control,</div><div class='ctx'>  */</div><div class='ctx'> #define HV_PTE_PAGE                  (__HV_PTE_ONE &lt;&lt; HV_PTE_INDEX_PAGE)</div><div class='ctx'> </div><div class='add'>+/** Does this PTE implicitly reference multiple pages?</div><div class='add'>+ *</div><div class='add'>+ * If this bit is set in the page table (either in the level-2 page table,</div><div class='add'>+ * or in a higher level page table in conjunction with the PAGE bit)</div><div class='add'>+ * then the PTE specifies a range of contiguous pages, not a single page.</div><div class='add'>+ * The hv_set_pte_super_shift() allows you to specify the count for</div><div class='add'>+ * each level of the page table.</div><div class='add'>+ *</div><div class='add'>+ * Note: this bit is not supported on TILEPro systems.</div><div class='add'>+ */</div><div class='add'>+#define HV_PTE_SUPER                 (__HV_PTE_ONE &lt;&lt; HV_PTE_INDEX_SUPER)</div><div class='add'>+</div><div class='ctx'> /** Is this a global (non-ASID) mapping?</div><div class='ctx'>  *</div><div class='ctx'>  * If this bit is set, the translations established by this PTE will</div><div class='hunk'>@@ -2046,6 +2151,13 @@ int hv_flush_remote(HV_PhysAddr cache_pa, unsigned long cache_control,</div><div class='ctx'>  */</div><div class='ctx'> #define HV_PTE_CLIENT1               (__HV_PTE_ONE &lt;&lt; HV_PTE_INDEX_CLIENT1)</div><div class='ctx'> </div><div class='add'>+/** Client-private bit in PTE.</div><div class='add'>+ *</div><div class='add'>+ * This bit is guaranteed not to be inspected or modified by the</div><div class='add'>+ * hypervisor.</div><div class='add'>+ */</div><div class='add'>+#define HV_PTE_CLIENT2               (__HV_PTE_ONE &lt;&lt; HV_PTE_INDEX_CLIENT2)</div><div class='add'>+</div><div class='ctx'> /** Non-coherent (NC) bit in PTE.</div><div class='ctx'>  *</div><div class='ctx'>  * If this bit is set, the mapping that is set up will be non-coherent</div><div class='hunk'>@@ -2178,8 +2290,10 @@ hv_pte_clear_##name(HV_PTE pte)                                 \</div><div class='ctx'>  */</div><div class='ctx'> _HV_BIT(present,         PRESENT)</div><div class='ctx'> _HV_BIT(page,            PAGE)</div><div class='add'>+_HV_BIT(super,           SUPER)</div><div class='ctx'> _HV_BIT(client0,         CLIENT0)</div><div class='ctx'> _HV_BIT(client1,         CLIENT1)</div><div class='add'>+_HV_BIT(client2,         CLIENT2)</div><div class='ctx'> _HV_BIT(migrating,       MIGRATING)</div><div class='ctx'> _HV_BIT(nc,              NC)</div><div class='ctx'> _HV_BIT(readable,        READABLE)</div><div class='hunk'>@@ -2222,40 +2336,11 @@ hv_pte_set_mode(HV_PTE pte, unsigned int val)</div><div class='ctx'>  *</div><div class='ctx'>  * This field contains the upper bits of the CPA (client physical</div><div class='ctx'>  * address) of the target page; the complete CPA is this field with</div><div class='del'>- * HV_LOG2_PAGE_SIZE_SMALL zero bits appended to it.</div><div class='del'>- *</div><div class='del'>- * For PTEs in a level-1 page table where the Page bit is set, the</div><div class='del'>- * CPA must be aligned modulo the large page size.</div><div class='del'>- */</div><div class='del'>-static __inline unsigned int</div><div class='del'>-hv_pte_get_pfn(const HV_PTE pte)</div><div class='del'>-{</div><div class='del'>-  return pte.val &gt;&gt; HV_PTE_INDEX_PFN;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/** Set the page frame number into a PTE.  See hv_pte_get_pfn. */</div><div class='del'>-static __inline HV_PTE</div><div class='del'>-hv_pte_set_pfn(HV_PTE pte, unsigned int val)</div><div class='del'>-{</div><div class='del'>-  /*</div><div class='del'>-   * Note that the use of "PTFN" in the next line is intentional; we</div><div class='del'>-   * don't want any garbage lower bits left in that field.</div><div class='del'>-   */</div><div class='del'>-  pte.val &amp;= ~(((1ULL &lt;&lt; HV_PTE_PTFN_BITS) - 1) &lt;&lt; HV_PTE_INDEX_PTFN);</div><div class='del'>-  pte.val |= (__hv64) val &lt;&lt; HV_PTE_INDEX_PFN;</div><div class='del'>-  return pte;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/** Get the page table frame number from the PTE.</div><div class='del'>- *</div><div class='del'>- * This field contains the upper bits of the CPA (client physical</div><div class='del'>- * address) of the target page table; the complete CPA is this field with</div><div class='del'>- * with HV_PAGE_TABLE_ALIGN zero bits appended to it.</div><div class='add'>+ * HV_LOG2_PAGE_TABLE_ALIGN zero bits appended to it.</div><div class='ctx'>  *</div><div class='del'>- * For PTEs in a level-1 page table when the Page bit is not set, the</div><div class='del'>- * CPA must be aligned modulo the sticter of HV_PAGE_TABLE_ALIGN and</div><div class='del'>- * the level-2 page table size.</div><div class='add'>+ * For all PTEs in the lowest-level page table, and for all PTEs with</div><div class='add'>+ * the Page bit set in all page tables, the CPA must be aligned modulo</div><div class='add'>+ * the relevant page size.</div><div class='ctx'>  */</div><div class='ctx'> static __inline unsigned long</div><div class='ctx'> hv_pte_get_ptfn(const HV_PTE pte)</div><div class='hunk'>@@ -2263,7 +2348,6 @@ hv_pte_get_ptfn(const HV_PTE pte)</div><div class='ctx'>   return pte.val &gt;&gt; HV_PTE_INDEX_PTFN;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /** Set the page table frame number into a PTE.  See hv_pte_get_ptfn. */</div><div class='ctx'> static __inline HV_PTE</div><div class='ctx'> hv_pte_set_ptfn(HV_PTE pte, unsigned long val)</div><div class='hunk'>@@ -2273,6 +2357,20 @@ hv_pte_set_ptfn(HV_PTE pte, unsigned long val)</div><div class='ctx'>   return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/** Get the client physical address from the PTE.  See hv_pte_set_ptfn. */</div><div class='add'>+static __inline HV_PhysAddr</div><div class='add'>+hv_pte_get_pa(const HV_PTE pte)</div><div class='add'>+{</div><div class='add'>+  return (__hv64) hv_pte_get_ptfn(pte) &lt;&lt; HV_LOG2_PAGE_TABLE_ALIGN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/** Set the client physical address into a PTE.  See hv_pte_get_ptfn. */</div><div class='add'>+static __inline HV_PTE</div><div class='add'>+hv_pte_set_pa(HV_PTE pte, HV_PhysAddr pa)</div><div class='add'>+{</div><div class='add'>+  return hv_pte_set_ptfn(pte, pa &gt;&gt; HV_LOG2_PAGE_TABLE_ALIGN);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /** Get the remote tile caching this page.</div><div class='ctx'>  *</div><div class='hunk'>@@ -2308,28 +2406,20 @@ hv_pte_set_lotar(HV_PTE pte, unsigned int val)</div><div class='ctx'> </div><div class='ctx'> #endif  /* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='del'>-/** Converts a client physical address to a pfn. */</div><div class='del'>-#define HV_CPA_TO_PFN(p) ((p) &gt;&gt; HV_LOG2_PAGE_SIZE_SMALL)</div><div class='del'>-</div><div class='del'>-/** Converts a pfn to a client physical address. */</div><div class='del'>-#define HV_PFN_TO_CPA(p) (((HV_PhysAddr)(p)) &lt;&lt; HV_LOG2_PAGE_SIZE_SMALL)</div><div class='del'>-</div><div class='ctx'> /** Converts a client physical address to a ptfn. */</div><div class='ctx'> #define HV_CPA_TO_PTFN(p) ((p) &gt;&gt; HV_LOG2_PAGE_TABLE_ALIGN)</div><div class='ctx'> </div><div class='ctx'> /** Converts a ptfn to a client physical address. */</div><div class='ctx'> #define HV_PTFN_TO_CPA(p) (((HV_PhysAddr)(p)) &lt;&lt; HV_LOG2_PAGE_TABLE_ALIGN)</div><div class='ctx'> </div><div class='del'>-/** Converts a ptfn to a pfn. */</div><div class='del'>-#define HV_PTFN_TO_PFN(p) \</div><div class='del'>-  ((p) &gt;&gt; (HV_LOG2_PAGE_SIZE_SMALL - HV_LOG2_PAGE_TABLE_ALIGN))</div><div class='del'>-</div><div class='del'>-/** Converts a pfn to a ptfn. */</div><div class='del'>-#define HV_PFN_TO_PTFN(p) \</div><div class='del'>-  ((p) &lt;&lt; (HV_LOG2_PAGE_SIZE_SMALL - HV_LOG2_PAGE_TABLE_ALIGN))</div><div class='del'>-</div><div class='ctx'> #if CHIP_VA_WIDTH() &gt; 32</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Note that we currently do not allow customizing the page size</div><div class='add'>+ * of the L0 pages, but fix them at 4GB, so we do not use the</div><div class='add'>+ * "_HV_xxx" nomenclature for the L0 macros.</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> /** Log number of HV_PTE entries in L0 page table */</div><div class='ctx'> #define HV_LOG2_L0_ENTRIES (CHIP_VA_WIDTH() - HV_LOG2_L1_SPAN)</div><div class='ctx'> </div><div class='hunk'>@@ -2359,69 +2449,104 @@ hv_pte_set_lotar(HV_PTE pte, unsigned int val)</div><div class='ctx'> #endif /* CHIP_VA_WIDTH() &gt; 32 */</div><div class='ctx'> </div><div class='ctx'> /** Log number of HV_PTE entries in L1 page table */</div><div class='del'>-#define HV_LOG2_L1_ENTRIES (HV_LOG2_L1_SPAN - HV_LOG2_PAGE_SIZE_LARGE)</div><div class='add'>+#define _HV_LOG2_L1_ENTRIES(log2_page_size_large) \</div><div class='add'>+  (HV_LOG2_L1_SPAN - log2_page_size_large)</div><div class='ctx'> </div><div class='ctx'> /** Number of HV_PTE entries in L1 page table */</div><div class='del'>-#define HV_L1_ENTRIES (1 &lt;&lt; HV_LOG2_L1_ENTRIES)</div><div class='add'>+#define _HV_L1_ENTRIES(log2_page_size_large) \</div><div class='add'>+  (1 &lt;&lt; _HV_LOG2_L1_ENTRIES(log2_page_size_large))</div><div class='ctx'> </div><div class='ctx'> /** Log size of L1 page table in bytes */</div><div class='del'>-#define HV_LOG2_L1_SIZE (HV_LOG2_PTE_SIZE + HV_LOG2_L1_ENTRIES)</div><div class='add'>+#define _HV_LOG2_L1_SIZE(log2_page_size_large) \</div><div class='add'>+  (HV_LOG2_PTE_SIZE + _HV_LOG2_L1_ENTRIES(log2_page_size_large))</div><div class='ctx'> </div><div class='ctx'> /** Size of L1 page table in bytes */</div><div class='del'>-#define HV_L1_SIZE (1 &lt;&lt; HV_LOG2_L1_SIZE)</div><div class='add'>+#define _HV_L1_SIZE(log2_page_size_large) \</div><div class='add'>+  (1 &lt;&lt; _HV_LOG2_L1_SIZE(log2_page_size_large))</div><div class='ctx'> </div><div class='ctx'> /** Log number of HV_PTE entries in level-2 page table */</div><div class='del'>-#define HV_LOG2_L2_ENTRIES (HV_LOG2_PAGE_SIZE_LARGE - HV_LOG2_PAGE_SIZE_SMALL)</div><div class='add'>+#define _HV_LOG2_L2_ENTRIES(log2_page_size_large, log2_page_size_small) \</div><div class='add'>+  (log2_page_size_large - log2_page_size_small)</div><div class='ctx'> </div><div class='ctx'> /** Number of HV_PTE entries in level-2 page table */</div><div class='del'>-#define HV_L2_ENTRIES (1 &lt;&lt; HV_LOG2_L2_ENTRIES)</div><div class='add'>+#define _HV_L2_ENTRIES(log2_page_size_large, log2_page_size_small) \</div><div class='add'>+  (1 &lt;&lt; _HV_LOG2_L2_ENTRIES(log2_page_size_large, log2_page_size_small))</div><div class='ctx'> </div><div class='ctx'> /** Log size of level-2 page table in bytes */</div><div class='del'>-#define HV_LOG2_L2_SIZE (HV_LOG2_PTE_SIZE + HV_LOG2_L2_ENTRIES)</div><div class='add'>+#define _HV_LOG2_L2_SIZE(log2_page_size_large, log2_page_size_small) \</div><div class='add'>+  (HV_LOG2_PTE_SIZE + \</div><div class='add'>+   _HV_LOG2_L2_ENTRIES(log2_page_size_large, log2_page_size_small))</div><div class='ctx'> </div><div class='ctx'> /** Size of level-2 page table in bytes */</div><div class='del'>-#define HV_L2_SIZE (1 &lt;&lt; HV_LOG2_L2_SIZE)</div><div class='add'>+#define _HV_L2_SIZE(log2_page_size_large, log2_page_size_small) \</div><div class='add'>+  (1 &lt;&lt; _HV_LOG2_L2_SIZE(log2_page_size_large, log2_page_size_small))</div><div class='ctx'> </div><div class='ctx'> #ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #if CHIP_VA_WIDTH() &gt; 32</div><div class='ctx'> </div><div class='ctx'> /** Index in L1 for a specific VA */</div><div class='del'>-#define HV_L1_INDEX(va) \</div><div class='del'>-  (((va) &gt;&gt; HV_LOG2_PAGE_SIZE_LARGE) &amp; (HV_L1_ENTRIES - 1))</div><div class='add'>+#define _HV_L1_INDEX(va, log2_page_size_large) \</div><div class='add'>+  (((va) &gt;&gt; log2_page_size_large) &amp; (_HV_L1_ENTRIES(log2_page_size_large) - 1))</div><div class='ctx'> </div><div class='ctx'> #else /* CHIP_VA_WIDTH() &gt; 32 */</div><div class='ctx'> </div><div class='ctx'> /** Index in L1 for a specific VA */</div><div class='del'>-#define HV_L1_INDEX(va) \</div><div class='del'>-  (((va) &gt;&gt; HV_LOG2_PAGE_SIZE_LARGE))</div><div class='add'>+#define _HV_L1_INDEX(va, log2_page_size_large) \</div><div class='add'>+  (((va) &gt;&gt; log2_page_size_large))</div><div class='ctx'> </div><div class='ctx'> #endif /* CHIP_VA_WIDTH() &gt; 32 */</div><div class='ctx'> </div><div class='ctx'> /** Index in level-2 page table for a specific VA */</div><div class='del'>-#define HV_L2_INDEX(va) \</div><div class='del'>-  (((va) &gt;&gt; HV_LOG2_PAGE_SIZE_SMALL) &amp; (HV_L2_ENTRIES - 1))</div><div class='add'>+#define _HV_L2_INDEX(va, log2_page_size_large, log2_page_size_small) \</div><div class='add'>+  (((va) &gt;&gt; log2_page_size_small) &amp; \</div><div class='add'>+   (_HV_L2_ENTRIES(log2_page_size_large, log2_page_size_small) - 1))</div><div class='ctx'> </div><div class='ctx'> #else /* __ASSEMBLER __ */</div><div class='ctx'> </div><div class='ctx'> #if CHIP_VA_WIDTH() &gt; 32</div><div class='ctx'> </div><div class='ctx'> /** Index in L1 for a specific VA */</div><div class='del'>-#define HV_L1_INDEX(va) \</div><div class='del'>-  (((HV_VirtAddr)(va) &gt;&gt; HV_LOG2_PAGE_SIZE_LARGE) &amp; (HV_L1_ENTRIES - 1))</div><div class='add'>+#define _HV_L1_INDEX(va, log2_page_size_large) \</div><div class='add'>+  (((HV_VirtAddr)(va) &gt;&gt; log2_page_size_large) &amp; \</div><div class='add'>+   (_HV_L1_ENTRIES(log2_page_size_large) - 1))</div><div class='ctx'> </div><div class='ctx'> #else /* CHIP_VA_WIDTH() &gt; 32 */</div><div class='ctx'> </div><div class='ctx'> /** Index in L1 for a specific VA */</div><div class='del'>-#define HV_L1_INDEX(va) \</div><div class='del'>-  (((HV_VirtAddr)(va) &gt;&gt; HV_LOG2_PAGE_SIZE_LARGE))</div><div class='add'>+#define _HV_L1_INDEX(va, log2_page_size_large) \</div><div class='add'>+  (((HV_VirtAddr)(va) &gt;&gt; log2_page_size_large))</div><div class='ctx'> </div><div class='ctx'> #endif /* CHIP_VA_WIDTH() &gt; 32 */</div><div class='ctx'> </div><div class='ctx'> /** Index in level-2 page table for a specific VA */</div><div class='del'>-#define HV_L2_INDEX(va) \</div><div class='del'>-  (((HV_VirtAddr)(va) &gt;&gt; HV_LOG2_PAGE_SIZE_SMALL) &amp; (HV_L2_ENTRIES - 1))</div><div class='add'>+#define _HV_L2_INDEX(va, log2_page_size_large, log2_page_size_small) \</div><div class='add'>+  (((HV_VirtAddr)(va) &gt;&gt; log2_page_size_small) &amp; \</div><div class='add'>+   (_HV_L2_ENTRIES(log2_page_size_large, log2_page_size_small) - 1))</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASSEMBLER __ */</div><div class='ctx'> </div><div class='del'>-#endif /* _TILE_HV_H */</div><div class='add'>+/** Position of the PFN field within the PTE (subset of the PTFN). */</div><div class='add'>+#define _HV_PTE_INDEX_PFN(log2_page_size) \</div><div class='add'>+  (HV_PTE_INDEX_PTFN + (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))</div><div class='add'>+</div><div class='add'>+/** Length of the PFN field within the PTE (subset of the PTFN). */</div><div class='add'>+#define _HV_PTE_INDEX_PFN_BITS(log2_page_size) \</div><div class='add'>+  (HV_PTE_INDEX_PTFN_BITS - (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))</div><div class='add'>+</div><div class='add'>+/** Converts a client physical address to a pfn. */</div><div class='add'>+#define _HV_CPA_TO_PFN(p, log2_page_size) ((p) &gt;&gt; log2_page_size)</div><div class='add'>+</div><div class='add'>+/** Converts a pfn to a client physical address. */</div><div class='add'>+#define _HV_PFN_TO_CPA(p, log2_page_size) \</div><div class='add'>+  (((HV_PhysAddr)(p)) &lt;&lt; log2_page_size)</div><div class='add'>+</div><div class='add'>+/** Converts a ptfn to a pfn. */</div><div class='add'>+#define _HV_PTFN_TO_PFN(p, log2_page_size) \</div><div class='add'>+  ((p) &gt;&gt; (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))</div><div class='add'>+</div><div class='add'>+/** Converts a pfn to a ptfn. */</div><div class='add'>+#define _HV_PFN_TO_PTFN(p, log2_page_size) \</div><div class='add'>+  ((p) &lt;&lt; (log2_page_size - HV_LOG2_PAGE_TABLE_ALIGN))</div><div class='add'>+</div><div class='add'>+#endif /* _HV_HV_H */</div><div class='head'>diff --git a/arch/tile/kernel/Makefile b/arch/tile/kernel/Makefile<br/>index b4dbc057baad..5de99248d8df 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/Makefile</a></div><div class='hunk'>@@ -3,16 +3,15 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> extra-y := vmlinux.lds head_$(BITS).o</div><div class='del'>-obj-y := backtrace.o entry.o init_task.o irq.o messaging.o \</div><div class='add'>+obj-y := backtrace.o entry.o irq.o messaging.o \</div><div class='ctx'> 	pci-dma.o proc.o process.o ptrace.o reboot.o \</div><div class='ctx'> 	setup.o signal.o single_step.o stack.o sys.o sysfs.o time.o traps.o \</div><div class='ctx'> 	intvec_$(BITS).o regs_$(BITS).o tile-desc_$(BITS).o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_HARDWALL)		+= hardwall.o</div><div class='del'>-obj-$(CONFIG_TILEGX)		+= futex_64.o</div><div class='ctx'> obj-$(CONFIG_COMPAT)		+= compat.o compat_signal.o</div><div class='ctx'> obj-$(CONFIG_SMP)		+= smpboot.o smp.o tlb.o</div><div class='ctx'> obj-$(CONFIG_MODULES)		+= module.o</div><div class='ctx'> obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o</div><div class='del'>-obj-$(CONFIG_KEXEC)		+= machine_kexec.o relocate_kernel.o</div><div class='add'>+obj-$(CONFIG_KEXEC)		+= machine_kexec.o relocate_kernel_$(BITS).o</div><div class='ctx'> obj-$(CONFIG_PCI)		+= pci.o</div><div class='head'>diff --git a/arch/tile/kernel/compat_signal.c b/arch/tile/kernel/compat_signal.c<br/>index 77763ccd5a7d..474571b84085 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/compat_signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/compat_signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/compat_signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/compat_signal.c</a></div><div class='hunk'>@@ -118,8 +118,6 @@ struct compat_rt_sigframe {</div><div class='ctx'> 	struct compat_ucontext uc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> long compat_sys_rt_sigaction(int sig, struct compat_sigaction __user *act,</div><div class='ctx'> 			     struct compat_sigaction __user *oact,</div><div class='ctx'> 			     size_t sigsetsize)</div><div class='hunk'>@@ -302,7 +300,6 @@ long compat_sys_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext))</div><div class='hunk'>@@ -403,19 +400,17 @@ int compat_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 	 * Set up registers for signal handler.</div><div class='ctx'> 	 * Registers that we don't modify keep the value they had from</div><div class='ctx'> 	 * user-space at the time we took the signal.</div><div class='add'>+	 * We always pass siginfo and mcontext, regardless of SA_SIGINFO,</div><div class='add'>+	 * since some things rely on this (e.g. glibc's debug/segfault.c).</div><div class='ctx'> 	 */</div><div class='ctx'> 	regs-&gt;pc = ptr_to_compat_reg(ka-&gt;sa.sa_handler);</div><div class='ctx'> 	regs-&gt;ex1 = PL_ICS_EX1(USER_PL, 1); /* set crit sec in handler */</div><div class='ctx'> 	regs-&gt;sp = ptr_to_compat_reg(frame);</div><div class='ctx'> 	regs-&gt;lr = restorer;</div><div class='ctx'> 	regs-&gt;regs[0] = (unsigned long) usig;</div><div class='del'>-</div><div class='del'>-	if (ka-&gt;sa.sa_flags &amp; SA_SIGINFO) {</div><div class='del'>-		/* Need extra arguments, so mark to restore caller-saves. */</div><div class='del'>-		regs-&gt;regs[1] = ptr_to_compat_reg(&amp;frame-&gt;info);</div><div class='del'>-		regs-&gt;regs[2] = ptr_to_compat_reg(&amp;frame-&gt;uc);</div><div class='del'>-		regs-&gt;flags |= PT_FLAGS_CALLER_SAVES;</div><div class='del'>-	}</div><div class='add'>+	regs-&gt;regs[1] = ptr_to_compat_reg(&amp;frame-&gt;info);</div><div class='add'>+	regs-&gt;regs[2] = ptr_to_compat_reg(&amp;frame-&gt;uc);</div><div class='add'>+	regs-&gt;flags |= PT_FLAGS_CALLER_SAVES;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Notify any tracer that was single-stepping it.</div><div class='head'>diff --git a/arch/tile/kernel/entry.S b/arch/tile/kernel/entry.S<br/>index ec91568df880..c31637baff28 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/entry.S</a></div><div class='hunk'>@@ -68,20 +68,6 @@ STD_ENTRY(KBacktraceIterator_init_current)</div><div class='ctx'> 	jrp lr   /* keep backtracer happy */</div><div class='ctx'> 	STD_ENDPROC(KBacktraceIterator_init_current)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Reset our stack to r1/r2 (sp and ksp0+cpu respectively), then</div><div class='del'>- * free the old stack (passed in r0) and re-invoke cpu_idle().</div><div class='del'>- * We update sp and ksp0 simultaneously to avoid backtracer warnings.</div><div class='del'>- */</div><div class='del'>-STD_ENTRY(cpu_idle_on_new_stack)</div><div class='del'>-	{</div><div class='del'>-	 move sp, r1</div><div class='del'>-	 mtspr SPR_SYSTEM_SAVE_K_0, r2</div><div class='del'>-	}</div><div class='del'>-	jal free_thread_info</div><div class='del'>-	j cpu_idle</div><div class='del'>-	STD_ENDPROC(cpu_idle_on_new_stack)</div><div class='del'>-</div><div class='ctx'> /* Loop forever on a nap during SMP boot. */</div><div class='ctx'> STD_ENTRY(smp_nap)</div><div class='ctx'> 	nap</div><div class='hunk'>@@ -100,8 +86,9 @@ STD_ENTRY(smp_nap)</div><div class='ctx'>  */</div><div class='ctx'> STD_ENTRY(_cpu_idle)</div><div class='ctx'> 	movei r1, 1</div><div class='add'>+	IRQ_ENABLE_LOAD(r2, r3)</div><div class='ctx'> 	mtspr INTERRUPT_CRITICAL_SECTION, r1</div><div class='del'>-	IRQ_ENABLE(r2, r3)             /* unmask, but still with ICS set */</div><div class='add'>+	IRQ_ENABLE_APPLY(r2, r3)       /* unmask, but still with ICS set */</div><div class='ctx'> 	mtspr INTERRUPT_CRITICAL_SECTION, zero</div><div class='ctx'> 	.global _cpu_idle_nap</div><div class='ctx'> _cpu_idle_nap:</div><div class='head'>diff --git a/arch/tile/kernel/hardwall.c b/arch/tile/kernel/hardwall.c<br/>index 8c41891aab34..20273ee37deb 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/hardwall.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/hardwall.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/hardwall.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/hardwall.c</a></div><div class='hunk'>@@ -33,59 +33,157 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * This data structure tracks the rectangle data, etc., associated</div><div class='del'>- * one-to-one with a "struct file *" from opening HARDWALL_FILE.</div><div class='add'>+ * Implement a per-cpu "hardwall" resource class such as UDN or IPI.</div><div class='add'>+ * We use "hardwall" nomenclature throughout for historical reasons.</div><div class='add'>+ * The lock here controls access to the list data structure as well as</div><div class='add'>+ * to the items on the list.</div><div class='add'>+ */</div><div class='add'>+struct hardwall_type {</div><div class='add'>+	int index;</div><div class='add'>+	int is_xdn;</div><div class='add'>+	int is_idn;</div><div class='add'>+	int disabled;</div><div class='add'>+	const char *name;</div><div class='add'>+	struct list_head list;</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	struct proc_dir_entry *proc_dir;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hardwall_index {</div><div class='add'>+	HARDWALL_UDN = 0,</div><div class='add'>+#ifndef __tilepro__</div><div class='add'>+	HARDWALL_IDN = 1,</div><div class='add'>+	HARDWALL_IPI = 2,</div><div class='add'>+#endif</div><div class='add'>+	_HARDWALL_TYPES</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct hardwall_type hardwall_types[] = {</div><div class='add'>+	{  /* user-space access to UDN */</div><div class='add'>+		0,</div><div class='add'>+		1,</div><div class='add'>+		0,</div><div class='add'>+		0,</div><div class='add'>+		"udn",</div><div class='add'>+		LIST_HEAD_INIT(hardwall_types[HARDWALL_UDN].list),</div><div class='add'>+		__SPIN_LOCK_INITIALIZER(hardwall_types[HARDWALL_UDN].lock),</div><div class='add'>+		NULL</div><div class='add'>+	},</div><div class='add'>+#ifndef __tilepro__</div><div class='add'>+	{  /* user-space access to IDN */</div><div class='add'>+		1,</div><div class='add'>+		1,</div><div class='add'>+		1,</div><div class='add'>+		1,  /* disabled pending hypervisor support */</div><div class='add'>+		"idn",</div><div class='add'>+		LIST_HEAD_INIT(hardwall_types[HARDWALL_IDN].list),</div><div class='add'>+		__SPIN_LOCK_INITIALIZER(hardwall_types[HARDWALL_IDN].lock),</div><div class='add'>+		NULL</div><div class='add'>+	},</div><div class='add'>+	{  /* access to user-space IPI */</div><div class='add'>+		2,</div><div class='add'>+		0,</div><div class='add'>+		0,</div><div class='add'>+		0,</div><div class='add'>+		"ipi",</div><div class='add'>+		LIST_HEAD_INIT(hardwall_types[HARDWALL_IPI].list),</div><div class='add'>+		__SPIN_LOCK_INITIALIZER(hardwall_types[HARDWALL_IPI].lock),</div><div class='add'>+		NULL</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This data structure tracks the cpu data, etc., associated</div><div class='add'>+ * one-to-one with a "struct file *" from opening a hardwall device file.</div><div class='ctx'>  * Note that the file's private data points back to this structure.</div><div class='ctx'>  */</div><div class='ctx'> struct hardwall_info {</div><div class='del'>-	struct list_head list;             /* "rectangles" list */</div><div class='add'>+	struct list_head list;             /* for hardwall_types.list */</div><div class='ctx'> 	struct list_head task_head;        /* head of tasks in this hardwall */</div><div class='del'>-	struct cpumask cpumask;            /* cpus in the rectangle */</div><div class='add'>+	struct hardwall_type *type;        /* type of this resource */</div><div class='add'>+	struct cpumask cpumask;            /* cpus reserved */</div><div class='add'>+	int id;                            /* integer id for this hardwall */</div><div class='add'>+	int teardown_in_progress;          /* are we tearing this one down? */</div><div class='add'>+</div><div class='add'>+	/* Remaining fields only valid for user-network resources. */</div><div class='ctx'> 	int ulhc_x;                        /* upper left hand corner x coord */</div><div class='ctx'> 	int ulhc_y;                        /* upper left hand corner y coord */</div><div class='ctx'> 	int width;                         /* rectangle width */</div><div class='ctx'> 	int height;                        /* rectangle height */</div><div class='del'>-	int id;                            /* integer id for this hardwall */</div><div class='del'>-	int teardown_in_progress;          /* are we tearing this one down? */</div><div class='add'>+#if CHIP_HAS_REV1_XDN()</div><div class='add'>+	atomic_t xdn_pending_count;        /* cores in phase 1 of drain */</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Currently allocated hardwall rectangles */</div><div class='del'>-static LIST_HEAD(rectangles);</div><div class='ctx'> </div><div class='ctx'> /* /proc/tile/hardwall */</div><div class='ctx'> static struct proc_dir_entry *hardwall_proc_dir;</div><div class='ctx'> </div><div class='ctx'> /* Functions to manage files in /proc/tile/hardwall. */</div><div class='del'>-static void hardwall_add_proc(struct hardwall_info *rect);</div><div class='del'>-static void hardwall_remove_proc(struct hardwall_info *rect);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Guard changes to the hardwall data structures.</div><div class='del'>- * This could be finer grained (e.g. one lock for the list of hardwall</div><div class='del'>- * rectangles, then separate embedded locks for each one's list of tasks),</div><div class='del'>- * but there are subtle correctness issues when trying to start with</div><div class='del'>- * a task's "hardwall" pointer and lock the correct rectangle's embedded</div><div class='del'>- * lock in the presence of a simultaneous deactivation, so it seems</div><div class='del'>- * easier to have a single lock, given that none of these data</div><div class='del'>- * structures are touched very frequently during normal operation.</div><div class='del'>- */</div><div class='del'>-static DEFINE_SPINLOCK(hardwall_lock);</div><div class='add'>+static void hardwall_add_proc(struct hardwall_info *);</div><div class='add'>+static void hardwall_remove_proc(struct hardwall_info *);</div><div class='ctx'> </div><div class='ctx'> /* Allow disabling UDN access. */</div><div class='del'>-static int udn_disabled;</div><div class='ctx'> static int __init noudn(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	pr_info("User-space UDN access is disabled\n");</div><div class='del'>-	udn_disabled = 1;</div><div class='add'>+	hardwall_types[HARDWALL_UDN].disabled = 1;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> early_param("noudn", noudn);</div><div class='ctx'> </div><div class='add'>+#ifndef __tilepro__</div><div class='add'>+/* Allow disabling IDN access. */</div><div class='add'>+static int __init noidn(char *str)</div><div class='add'>+{</div><div class='add'>+	pr_info("User-space IDN access is disabled\n");</div><div class='add'>+	hardwall_types[HARDWALL_IDN].disabled = 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+early_param("noidn", noidn);</div><div class='add'>+</div><div class='add'>+/* Allow disabling IPI access. */</div><div class='add'>+static int __init noipi(char *str)</div><div class='add'>+{</div><div class='add'>+	pr_info("User-space IPI access is disabled\n");</div><div class='add'>+	hardwall_types[HARDWALL_IPI].disabled = 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+early_param("noipi", noipi);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Low-level primitives</div><div class='add'>+ * Low-level primitives for UDN/IDN</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#ifdef __tilepro__</div><div class='add'>+#define mtspr_XDN(hwt, name, val) \</div><div class='add'>+	do { (void)(hwt); __insn_mtspr(SPR_UDN_##name, (val)); } while (0)</div><div class='add'>+#define mtspr_MPL_XDN(hwt, name, val) \</div><div class='add'>+	do { (void)(hwt); __insn_mtspr(SPR_MPL_UDN_##name, (val)); } while (0)</div><div class='add'>+#define mfspr_XDN(hwt, name) \</div><div class='add'>+	((void)(hwt), __insn_mfspr(SPR_UDN_##name))</div><div class='add'>+#else</div><div class='add'>+#define mtspr_XDN(hwt, name, val)					\</div><div class='add'>+	do {								\</div><div class='add'>+		if ((hwt)-&gt;is_idn)					\</div><div class='add'>+			__insn_mtspr(SPR_IDN_##name, (val));		\</div><div class='add'>+		else							\</div><div class='add'>+			__insn_mtspr(SPR_UDN_##name, (val));		\</div><div class='add'>+	} while (0)</div><div class='add'>+#define mtspr_MPL_XDN(hwt, name, val)					\</div><div class='add'>+	do {								\</div><div class='add'>+		if ((hwt)-&gt;is_idn)					\</div><div class='add'>+			__insn_mtspr(SPR_MPL_IDN_##name, (val));	\</div><div class='add'>+		else							\</div><div class='add'>+			__insn_mtspr(SPR_MPL_UDN_##name, (val));	\</div><div class='add'>+	} while (0)</div><div class='add'>+#define mfspr_XDN(hwt, name) \</div><div class='add'>+  ((hwt)-&gt;is_idn ? __insn_mfspr(SPR_IDN_##name) : __insn_mfspr(SPR_UDN_##name))</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* Set a CPU bit if the CPU is online. */</div><div class='ctx'> #define cpu_online_set(cpu, dst) do { \</div><div class='ctx'> 	if (cpu_online(cpu))          \</div><div class='hunk'>@@ -101,7 +199,7 @@ static int contains(struct hardwall_info *r, int x, int y)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Compute the rectangle parameters and validate the cpumask. */</div><div class='del'>-static int setup_rectangle(struct hardwall_info *r, struct cpumask *mask)</div><div class='add'>+static int check_rectangle(struct hardwall_info *r, struct cpumask *mask)</div><div class='ctx'> {</div><div class='ctx'> 	int x, y, cpu, ulhc, lrhc;</div><div class='ctx'> </div><div class='hunk'>@@ -114,8 +212,6 @@ static int setup_rectangle(struct hardwall_info *r, struct cpumask *mask)</div><div class='ctx'> 	r-&gt;ulhc_y = cpu_y(ulhc);</div><div class='ctx'> 	r-&gt;width = cpu_x(lrhc) - r-&gt;ulhc_x + 1;</div><div class='ctx'> 	r-&gt;height = cpu_y(lrhc) - r-&gt;ulhc_y + 1;</div><div class='del'>-	cpumask_copy(&amp;r-&gt;cpumask, mask);</div><div class='del'>-	r-&gt;id = ulhc;   /* The ulhc cpu id can be the hardwall id. */</div><div class='ctx'> </div><div class='ctx'> 	/* Width and height must be positive */</div><div class='ctx'> 	if (r-&gt;width &lt;= 0 || r-&gt;height &lt;= 0)</div><div class='hunk'>@@ -128,7 +224,7 @@ static int setup_rectangle(struct hardwall_info *r, struct cpumask *mask)</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Note that offline cpus can't be drained when this UDN</div><div class='add'>+	 * Note that offline cpus can't be drained when this user network</div><div class='ctx'> 	 * rectangle eventually closes.  We used to detect this</div><div class='ctx'> 	 * situation and print a warning, but it annoyed users and</div><div class='ctx'> 	 * they ignored it anyway, so now we just return without a</div><div class='hunk'>@@ -137,16 +233,6 @@ static int setup_rectangle(struct hardwall_info *r, struct cpumask *mask)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Do the two given rectangles overlap on any cpu? */</div><div class='del'>-static int overlaps(struct hardwall_info *a, struct hardwall_info *b)</div><div class='del'>-{</div><div class='del'>-	return a-&gt;ulhc_x + a-&gt;width &gt; b-&gt;ulhc_x &amp;&amp;    /* A not to the left */</div><div class='del'>-		b-&gt;ulhc_x + b-&gt;width &gt; a-&gt;ulhc_x &amp;&amp;   /* B not to the left */</div><div class='del'>-		a-&gt;ulhc_y + a-&gt;height &gt; b-&gt;ulhc_y &amp;&amp;  /* A not above */</div><div class='del'>-		b-&gt;ulhc_y + b-&gt;height &gt; a-&gt;ulhc_y;    /* B not above */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Hardware management of hardwall setup, teardown, trapping,</div><div class='ctx'>  * and enabling/disabling PL0 access to the networks.</div><div class='hunk'>@@ -157,23 +243,35 @@ enum direction_protect {</div><div class='ctx'> 	N_PROTECT = (1 &lt;&lt; 0),</div><div class='ctx'> 	E_PROTECT = (1 &lt;&lt; 1),</div><div class='ctx'> 	S_PROTECT = (1 &lt;&lt; 2),</div><div class='del'>-	W_PROTECT = (1 &lt;&lt; 3)</div><div class='add'>+	W_PROTECT = (1 &lt;&lt; 3),</div><div class='add'>+	C_PROTECT = (1 &lt;&lt; 4),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void enable_firewall_interrupts(void)</div><div class='add'>+static inline int xdn_which_interrupt(struct hardwall_type *hwt)</div><div class='add'>+{</div><div class='add'>+#ifndef __tilepro__</div><div class='add'>+	if (hwt-&gt;is_idn)</div><div class='add'>+		return INT_IDN_FIREWALL;</div><div class='add'>+#endif</div><div class='add'>+	return INT_UDN_FIREWALL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enable_firewall_interrupts(struct hardwall_type *hwt)</div><div class='ctx'> {</div><div class='del'>-	arch_local_irq_unmask_now(INT_UDN_FIREWALL);</div><div class='add'>+	arch_local_irq_unmask_now(xdn_which_interrupt(hwt));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void disable_firewall_interrupts(void)</div><div class='add'>+static void disable_firewall_interrupts(struct hardwall_type *hwt)</div><div class='ctx'> {</div><div class='del'>-	arch_local_irq_mask_now(INT_UDN_FIREWALL);</div><div class='add'>+	arch_local_irq_mask_now(xdn_which_interrupt(hwt));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Set up hardwall on this cpu based on the passed hardwall_info. */</div><div class='del'>-static void hardwall_setup_ipi_func(void *info)</div><div class='add'>+static void hardwall_setup_func(void *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct hardwall_info *r = info;</div><div class='add'>+	struct hardwall_type *hwt = r-&gt;type;</div><div class='add'>+</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> 	int x = cpu % smp_width;</div><div class='ctx'> 	int y = cpu / smp_width;</div><div class='hunk'>@@ -187,13 +285,12 @@ static void hardwall_setup_ipi_func(void *info)</div><div class='ctx'> 	if (y == r-&gt;ulhc_y + r-&gt;height - 1)</div><div class='ctx'> 		bits |= S_PROTECT;</div><div class='ctx'> 	BUG_ON(bits == 0);</div><div class='del'>-	__insn_mtspr(SPR_UDN_DIRECTION_PROTECT, bits);</div><div class='del'>-	enable_firewall_interrupts();</div><div class='del'>-</div><div class='add'>+	mtspr_XDN(hwt, DIRECTION_PROTECT, bits);</div><div class='add'>+	enable_firewall_interrupts(hwt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Set up all cpus on edge of rectangle to enable/disable hardwall SPRs. */</div><div class='del'>-static void hardwall_setup(struct hardwall_info *r)</div><div class='add'>+static void hardwall_protect_rectangle(struct hardwall_info *r)</div><div class='ctx'> {</div><div class='ctx'> 	int x, y, cpu, delta;</div><div class='ctx'> 	struct cpumask rect_cpus;</div><div class='hunk'>@@ -217,37 +314,50 @@ static void hardwall_setup(struct hardwall_info *r)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Then tell all the cpus to set up their protection SPR */</div><div class='del'>-	on_each_cpu_mask(&amp;rect_cpus, hardwall_setup_ipi_func, r, 1);</div><div class='add'>+	on_each_cpu_mask(&amp;rect_cpus, hardwall_setup_func, r, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __kprobes do_hardwall_trap(struct pt_regs* regs, int fault_num)</div><div class='ctx'> {</div><div class='ctx'> 	struct hardwall_info *rect;</div><div class='add'>+	struct hardwall_type *hwt;</div><div class='ctx'> 	struct task_struct *p;</div><div class='ctx'> 	struct siginfo info;</div><div class='del'>-	int x, y;</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> 	int found_processes;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-</div><div class='ctx'> 	struct pt_regs *old_regs = set_irq_regs(regs);</div><div class='add'>+</div><div class='ctx'> 	irq_enter();</div><div class='ctx'> </div><div class='add'>+	/* Figure out which network trapped. */</div><div class='add'>+	switch (fault_num) {</div><div class='add'>+#ifndef __tilepro__</div><div class='add'>+	case INT_IDN_FIREWALL:</div><div class='add'>+		hwt = &amp;hardwall_types[HARDWALL_IDN];</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='add'>+	case INT_UDN_FIREWALL:</div><div class='add'>+		hwt = &amp;hardwall_types[HARDWALL_UDN];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+	BUG_ON(hwt-&gt;disabled);</div><div class='add'>+</div><div class='ctx'> 	/* This tile trapped a network access; find the rectangle. */</div><div class='del'>-	x = cpu % smp_width;</div><div class='del'>-	y = cpu / smp_width;</div><div class='del'>-	spin_lock_irqsave(&amp;hardwall_lock, flags);</div><div class='del'>-	list_for_each_entry(rect, &amp;rectangles, list) {</div><div class='del'>-		if (contains(rect, x, y))</div><div class='add'>+	spin_lock_irqsave(&amp;hwt-&gt;lock, flags);</div><div class='add'>+	list_for_each_entry(rect, &amp;hwt-&gt;list, list) {</div><div class='add'>+		if (cpumask_test_cpu(cpu, &amp;rect-&gt;cpumask))</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * It shouldn't be possible not to find this cpu on the</div><div class='ctx'> 	 * rectangle list, since only cpus in rectangles get hardwalled.</div><div class='del'>-	 * The hardwall is only removed after the UDN is drained.</div><div class='add'>+	 * The hardwall is only removed after the user network is drained.</div><div class='ctx'> 	 */</div><div class='del'>-	BUG_ON(&amp;rect-&gt;list == &amp;rectangles);</div><div class='add'>+	BUG_ON(&amp;rect-&gt;list == &amp;hwt-&gt;list);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we already started teardown on this hardwall, don't worry;</div><div class='hunk'>@@ -255,30 +365,32 @@ void __kprobes do_hardwall_trap(struct pt_regs* regs, int fault_num)</div><div class='ctx'> 	 * to quiesce.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (rect-&gt;teardown_in_progress) {</div><div class='del'>-		pr_notice("cpu %d: detected hardwall violation %#lx"</div><div class='add'>+		pr_notice("cpu %d: detected %s hardwall violation %#lx"</div><div class='ctx'> 		       " while teardown already in progress\n",</div><div class='del'>-		       cpu, (long) __insn_mfspr(SPR_UDN_DIRECTION_PROTECT));</div><div class='add'>+			  cpu, hwt-&gt;name,</div><div class='add'>+			  (long)mfspr_XDN(hwt, DIRECTION_PROTECT));</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Kill off any process that is activated in this rectangle.</div><div class='ctx'> 	 * We bypass security to deliver the signal, since it must be</div><div class='del'>-	 * one of the activated processes that generated the UDN</div><div class='add'>+	 * one of the activated processes that generated the user network</div><div class='ctx'> 	 * message that caused this trap, and all the activated</div><div class='ctx'> 	 * processes shared a single open file so are pretty tightly</div><div class='ctx'> 	 * bound together from a security point of view to begin with.</div><div class='ctx'> 	 */</div><div class='ctx'> 	rect-&gt;teardown_in_progress = 1;</div><div class='ctx'> 	wmb(); /* Ensure visibility of rectangle before notifying processes. */</div><div class='del'>-	pr_notice("cpu %d: detected hardwall violation %#lx...\n",</div><div class='del'>-	       cpu, (long) __insn_mfspr(SPR_UDN_DIRECTION_PROTECT));</div><div class='add'>+	pr_notice("cpu %d: detected %s hardwall violation %#lx...\n",</div><div class='add'>+		  cpu, hwt-&gt;name, (long)mfspr_XDN(hwt, DIRECTION_PROTECT));</div><div class='ctx'> 	info.si_signo = SIGILL;</div><div class='ctx'> 	info.si_errno = 0;</div><div class='ctx'> 	info.si_code = ILL_HARDWALL;</div><div class='ctx'> 	found_processes = 0;</div><div class='del'>-	list_for_each_entry(p, &amp;rect-&gt;task_head, thread.hardwall_list) {</div><div class='del'>-		BUG_ON(p-&gt;thread.hardwall != rect);</div><div class='add'>+	list_for_each_entry(p, &amp;rect-&gt;task_head,</div><div class='add'>+			    thread.hardwall[hwt-&gt;index].list) {</div><div class='add'>+		BUG_ON(p-&gt;thread.hardwall[hwt-&gt;index].info != rect);</div><div class='ctx'> 		if (!(p-&gt;flags &amp; PF_EXITING)) {</div><div class='ctx'> 			found_processes = 1;</div><div class='ctx'> 			pr_notice("hardwall: killing %d\n", p-&gt;pid);</div><div class='hunk'>@@ -289,7 +401,7 @@ void __kprobes do_hardwall_trap(struct pt_regs* regs, int fault_num)</div><div class='ctx'> 		pr_notice("hardwall: no associated processes!\n");</div><div class='ctx'> </div><div class='ctx'>  done:</div><div class='del'>-	spin_unlock_irqrestore(&amp;hardwall_lock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;hwt-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We have to disable firewall interrupts now, or else when we</div><div class='hunk'>@@ -298,48 +410,87 @@ void __kprobes do_hardwall_trap(struct pt_regs* regs, int fault_num)</div><div class='ctx'> 	 * haven't yet drained the network, and that would allow packets</div><div class='ctx'> 	 * to cross out of the hardwall region.</div><div class='ctx'> 	 */</div><div class='del'>-	disable_firewall_interrupts();</div><div class='add'>+	disable_firewall_interrupts(hwt);</div><div class='ctx'> </div><div class='ctx'> 	irq_exit();</div><div class='ctx'> 	set_irq_regs(old_regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Allow access from user space to the UDN. */</div><div class='del'>-void grant_network_mpls(void)</div><div class='add'>+/* Allow access from user space to the user network. */</div><div class='add'>+void grant_hardwall_mpls(struct hardwall_type *hwt)</div><div class='ctx'> {</div><div class='del'>-	__insn_mtspr(SPR_MPL_UDN_ACCESS_SET_0, 1);</div><div class='del'>-	__insn_mtspr(SPR_MPL_UDN_AVAIL_SET_0, 1);</div><div class='del'>-	__insn_mtspr(SPR_MPL_UDN_COMPLETE_SET_0, 1);</div><div class='del'>-	__insn_mtspr(SPR_MPL_UDN_TIMER_SET_0, 1);</div><div class='add'>+#ifndef __tilepro__</div><div class='add'>+	if (!hwt-&gt;is_xdn) {</div><div class='add'>+		__insn_mtspr(SPR_MPL_IPI_0_SET_0, 1);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	mtspr_MPL_XDN(hwt, ACCESS_SET_0, 1);</div><div class='add'>+	mtspr_MPL_XDN(hwt, AVAIL_SET_0, 1);</div><div class='add'>+	mtspr_MPL_XDN(hwt, COMPLETE_SET_0, 1);</div><div class='add'>+	mtspr_MPL_XDN(hwt, TIMER_SET_0, 1);</div><div class='ctx'> #if !CHIP_HAS_REV1_XDN()</div><div class='del'>-	__insn_mtspr(SPR_MPL_UDN_REFILL_SET_0, 1);</div><div class='del'>-	__insn_mtspr(SPR_MPL_UDN_CA_SET_0, 1);</div><div class='add'>+	mtspr_MPL_XDN(hwt, REFILL_SET_0, 1);</div><div class='add'>+	mtspr_MPL_XDN(hwt, CA_SET_0, 1);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Deny access from user space to the UDN. */</div><div class='del'>-void restrict_network_mpls(void)</div><div class='add'>+/* Deny access from user space to the user network. */</div><div class='add'>+void restrict_hardwall_mpls(struct hardwall_type *hwt)</div><div class='ctx'> {</div><div class='del'>-	__insn_mtspr(SPR_MPL_UDN_ACCESS_SET_1, 1);</div><div class='del'>-	__insn_mtspr(SPR_MPL_UDN_AVAIL_SET_1, 1);</div><div class='del'>-	__insn_mtspr(SPR_MPL_UDN_COMPLETE_SET_1, 1);</div><div class='del'>-	__insn_mtspr(SPR_MPL_UDN_TIMER_SET_1, 1);</div><div class='add'>+#ifndef __tilepro__</div><div class='add'>+	if (!hwt-&gt;is_xdn) {</div><div class='add'>+		__insn_mtspr(SPR_MPL_IPI_0_SET_1, 1);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	mtspr_MPL_XDN(hwt, ACCESS_SET_1, 1);</div><div class='add'>+	mtspr_MPL_XDN(hwt, AVAIL_SET_1, 1);</div><div class='add'>+	mtspr_MPL_XDN(hwt, COMPLETE_SET_1, 1);</div><div class='add'>+	mtspr_MPL_XDN(hwt, TIMER_SET_1, 1);</div><div class='ctx'> #if !CHIP_HAS_REV1_XDN()</div><div class='del'>-	__insn_mtspr(SPR_MPL_UDN_REFILL_SET_1, 1);</div><div class='del'>-	__insn_mtspr(SPR_MPL_UDN_CA_SET_1, 1);</div><div class='add'>+	mtspr_MPL_XDN(hwt, REFILL_SET_1, 1);</div><div class='add'>+	mtspr_MPL_XDN(hwt, CA_SET_1, 1);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Restrict or deny as necessary for the task we're switching to. */</div><div class='add'>+void hardwall_switch_tasks(struct task_struct *prev,</div><div class='add'>+			   struct task_struct *next)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	for (i = 0; i &lt; HARDWALL_TYPES; ++i) {</div><div class='add'>+		if (prev-&gt;thread.hardwall[i].info != NULL) {</div><div class='add'>+			if (next-&gt;thread.hardwall[i].info == NULL)</div><div class='add'>+				restrict_hardwall_mpls(&amp;hardwall_types[i]);</div><div class='add'>+		} else if (next-&gt;thread.hardwall[i].info != NULL) {</div><div class='add'>+			grant_hardwall_mpls(&amp;hardwall_types[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Does this task have the right to IPI the given cpu? */</div><div class='add'>+int hardwall_ipi_valid(int cpu)</div><div class='add'>+{</div><div class='add'>+#ifdef __tilegx__</div><div class='add'>+	struct hardwall_info *info =</div><div class='add'>+		current-&gt;thread.hardwall[HARDWALL_IPI].info;</div><div class='add'>+	return info &amp;&amp; cpumask_test_cpu(cpu, &amp;info-&gt;cpumask);</div><div class='add'>+#else</div><div class='add'>+	return 0;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Code to create, activate, deactivate, and destroy hardwall rectangles.</div><div class='add'>+ * Code to create, activate, deactivate, and destroy hardwall resources.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/* Create a hardwall for the given rectangle */</div><div class='del'>-static struct hardwall_info *hardwall_create(</div><div class='del'>-	size_t size, const unsigned char __user *bits)</div><div class='add'>+/* Create a hardwall for the given resource */</div><div class='add'>+static struct hardwall_info *hardwall_create(struct hardwall_type *hwt,</div><div class='add'>+					     size_t size,</div><div class='add'>+					     const unsigned char __user *bits)</div><div class='ctx'> {</div><div class='del'>-	struct hardwall_info *iter, *rect;</div><div class='add'>+	struct hardwall_info *iter, *info;</div><div class='ctx'> 	struct cpumask mask;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -370,55 +521,62 @@ static struct hardwall_info *hardwall_create(</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Allocate a new rectangle optimistically. */</div><div class='del'>-	rect = kmalloc(sizeof(struct hardwall_info),</div><div class='add'>+	/* Allocate a new hardwall_info optimistically. */</div><div class='add'>+	info = kmalloc(sizeof(struct hardwall_info),</div><div class='ctx'> 			GFP_KERNEL | __GFP_ZERO);</div><div class='del'>-	if (rect == NULL)</div><div class='add'>+	if (info == NULL)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='del'>-	INIT_LIST_HEAD(&amp;rect-&gt;task_head);</div><div class='add'>+	INIT_LIST_HEAD(&amp;info-&gt;task_head);</div><div class='add'>+	info-&gt;type = hwt;</div><div class='ctx'> </div><div class='ctx'> 	/* Compute the rectangle size and validate that it's plausible. */</div><div class='del'>-	rc = setup_rectangle(rect, &amp;mask);</div><div class='del'>-	if (rc != 0) {</div><div class='del'>-		kfree(rect);</div><div class='del'>-		return ERR_PTR(rc);</div><div class='add'>+	cpumask_copy(&amp;info-&gt;cpumask, &amp;mask);</div><div class='add'>+	info-&gt;id = find_first_bit(cpumask_bits(&amp;mask), nr_cpumask_bits);</div><div class='add'>+	if (hwt-&gt;is_xdn) {</div><div class='add'>+		rc = check_rectangle(info, &amp;mask);</div><div class='add'>+		if (rc != 0) {</div><div class='add'>+			kfree(info);</div><div class='add'>+			return ERR_PTR(rc);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Confirm it doesn't overlap and add it to the list. */</div><div class='del'>-	spin_lock_irqsave(&amp;hardwall_lock, flags);</div><div class='del'>-	list_for_each_entry(iter, &amp;rectangles, list) {</div><div class='del'>-		if (overlaps(iter, rect)) {</div><div class='del'>-			spin_unlock_irqrestore(&amp;hardwall_lock, flags);</div><div class='del'>-			kfree(rect);</div><div class='add'>+	spin_lock_irqsave(&amp;hwt-&gt;lock, flags);</div><div class='add'>+	list_for_each_entry(iter, &amp;hwt-&gt;list, list) {</div><div class='add'>+		if (cpumask_intersects(&amp;iter-&gt;cpumask, &amp;info-&gt;cpumask)) {</div><div class='add'>+			spin_unlock_irqrestore(&amp;hwt-&gt;lock, flags);</div><div class='add'>+			kfree(info);</div><div class='ctx'> 			return ERR_PTR(-EBUSY);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	list_add_tail(&amp;rect-&gt;list, &amp;rectangles);</div><div class='del'>-	spin_unlock_irqrestore(&amp;hardwall_lock, flags);</div><div class='add'>+	list_add_tail(&amp;info-&gt;list, &amp;hwt-&gt;list);</div><div class='add'>+	spin_unlock_irqrestore(&amp;hwt-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* Set up appropriate hardwalling on all affected cpus. */</div><div class='del'>-	hardwall_setup(rect);</div><div class='add'>+	if (hwt-&gt;is_xdn)</div><div class='add'>+		hardwall_protect_rectangle(info);</div><div class='ctx'> </div><div class='ctx'> 	/* Create a /proc/tile/hardwall entry. */</div><div class='del'>-	hardwall_add_proc(rect);</div><div class='add'>+	hardwall_add_proc(info);</div><div class='ctx'> </div><div class='del'>-	return rect;</div><div class='add'>+	return info;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Activate a given hardwall on this cpu for this process. */</div><div class='del'>-static int hardwall_activate(struct hardwall_info *rect)</div><div class='add'>+static int hardwall_activate(struct hardwall_info *info)</div><div class='ctx'> {</div><div class='del'>-	int cpu, x, y;</div><div class='add'>+	int cpu;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct task_struct *p = current;</div><div class='ctx'> 	struct thread_struct *ts = &amp;p-&gt;thread;</div><div class='add'>+	struct hardwall_type *hwt;</div><div class='ctx'> </div><div class='del'>-	/* Require a rectangle. */</div><div class='del'>-	if (rect == NULL)</div><div class='add'>+	/* Require a hardwall. */</div><div class='add'>+	if (info == NULL)</div><div class='ctx'> 		return -ENODATA;</div><div class='ctx'> </div><div class='del'>-	/* Not allowed to activate a rectangle that is being torn down. */</div><div class='del'>-	if (rect-&gt;teardown_in_progress)</div><div class='add'>+	/* Not allowed to activate a hardwall that is being torn down. */</div><div class='add'>+	if (info-&gt;teardown_in_progress)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -428,78 +586,87 @@ static int hardwall_activate(struct hardwall_info *rect)</div><div class='ctx'> 	if (cpumask_weight(&amp;p-&gt;cpus_allowed) != 1)</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	/* Make sure we are bound to a cpu in this rectangle. */</div><div class='add'>+	/* Make sure we are bound to a cpu assigned to this resource. */</div><div class='ctx'> 	cpu = smp_processor_id();</div><div class='ctx'> 	BUG_ON(cpumask_first(&amp;p-&gt;cpus_allowed) != cpu);</div><div class='del'>-	x = cpu_x(cpu);</div><div class='del'>-	y = cpu_y(cpu);</div><div class='del'>-	if (!contains(rect, x, y))</div><div class='add'>+	if (!cpumask_test_cpu(cpu, &amp;info-&gt;cpumask))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* If we are already bound to this hardwall, it's a no-op. */</div><div class='del'>-	if (ts-&gt;hardwall) {</div><div class='del'>-		BUG_ON(ts-&gt;hardwall != rect);</div><div class='add'>+	hwt = info-&gt;type;</div><div class='add'>+	if (ts-&gt;hardwall[hwt-&gt;index].info) {</div><div class='add'>+		BUG_ON(ts-&gt;hardwall[hwt-&gt;index].info != info);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Success!  This process gets to use the user networks on this cpu. */</div><div class='del'>-	ts-&gt;hardwall = rect;</div><div class='del'>-	spin_lock_irqsave(&amp;hardwall_lock, flags);</div><div class='del'>-	list_add(&amp;ts-&gt;hardwall_list, &amp;rect-&gt;task_head);</div><div class='del'>-	spin_unlock_irqrestore(&amp;hardwall_lock, flags);</div><div class='del'>-	grant_network_mpls();</div><div class='del'>-	printk(KERN_DEBUG "Pid %d (%s) activated for hardwall: cpu %d\n",</div><div class='del'>-	       p-&gt;pid, p-&gt;comm, cpu);</div><div class='add'>+	/* Success!  This process gets to use the resource on this cpu. */</div><div class='add'>+	ts-&gt;hardwall[hwt-&gt;index].info = info;</div><div class='add'>+	spin_lock_irqsave(&amp;hwt-&gt;lock, flags);</div><div class='add'>+	list_add(&amp;ts-&gt;hardwall[hwt-&gt;index].list, &amp;info-&gt;task_head);</div><div class='add'>+	spin_unlock_irqrestore(&amp;hwt-&gt;lock, flags);</div><div class='add'>+	grant_hardwall_mpls(hwt);</div><div class='add'>+	printk(KERN_DEBUG "Pid %d (%s) activated for %s hardwall: cpu %d\n",</div><div class='add'>+	       p-&gt;pid, p-&gt;comm, hwt-&gt;name, cpu);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Deactivate a task's hardwall.  Must hold hardwall_lock.</div><div class='add'>+ * Deactivate a task's hardwall.  Must hold lock for hardwall_type.</div><div class='ctx'>  * This method may be called from free_task(), so we don't want to</div><div class='ctx'>  * rely on too many fields of struct task_struct still being valid.</div><div class='ctx'>  * We assume the cpus_allowed, pid, and comm fields are still valid.</div><div class='ctx'>  */</div><div class='del'>-static void _hardwall_deactivate(struct task_struct *task)</div><div class='add'>+static void _hardwall_deactivate(struct hardwall_type *hwt,</div><div class='add'>+				 struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_struct *ts = &amp;task-&gt;thread;</div><div class='ctx'> </div><div class='ctx'> 	if (cpumask_weight(&amp;task-&gt;cpus_allowed) != 1) {</div><div class='del'>-		pr_err("pid %d (%s) releasing networks with"</div><div class='add'>+		pr_err("pid %d (%s) releasing %s hardwall with"</div><div class='ctx'> 		       " an affinity mask containing %d cpus!\n",</div><div class='del'>-		       task-&gt;pid, task-&gt;comm,</div><div class='add'>+		       task-&gt;pid, task-&gt;comm, hwt-&gt;name,</div><div class='ctx'> 		       cpumask_weight(&amp;task-&gt;cpus_allowed));</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BUG_ON(ts-&gt;hardwall == NULL);</div><div class='del'>-	ts-&gt;hardwall = NULL;</div><div class='del'>-	list_del(&amp;ts-&gt;hardwall_list);</div><div class='add'>+	BUG_ON(ts-&gt;hardwall[hwt-&gt;index].info == NULL);</div><div class='add'>+	ts-&gt;hardwall[hwt-&gt;index].info = NULL;</div><div class='add'>+	list_del(&amp;ts-&gt;hardwall[hwt-&gt;index].list);</div><div class='ctx'> 	if (task == current)</div><div class='del'>-		restrict_network_mpls();</div><div class='add'>+		restrict_hardwall_mpls(hwt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Deactivate a task's hardwall. */</div><div class='del'>-int hardwall_deactivate(struct task_struct *task)</div><div class='add'>+static int hardwall_deactivate(struct hardwall_type *hwt,</div><div class='add'>+			       struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int activated;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;hardwall_lock, flags);</div><div class='del'>-	activated = (task-&gt;thread.hardwall != NULL);</div><div class='add'>+	spin_lock_irqsave(&amp;hwt-&gt;lock, flags);</div><div class='add'>+	activated = (task-&gt;thread.hardwall[hwt-&gt;index].info != NULL);</div><div class='ctx'> 	if (activated)</div><div class='del'>-		_hardwall_deactivate(task);</div><div class='del'>-	spin_unlock_irqrestore(&amp;hardwall_lock, flags);</div><div class='add'>+		_hardwall_deactivate(hwt, task);</div><div class='add'>+	spin_unlock_irqrestore(&amp;hwt-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (!activated)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_DEBUG "Pid %d (%s) deactivated for hardwall: cpu %d\n",</div><div class='del'>-	       task-&gt;pid, task-&gt;comm, smp_processor_id());</div><div class='add'>+	printk(KERN_DEBUG "Pid %d (%s) deactivated for %s hardwall: cpu %d\n",</div><div class='add'>+	       task-&gt;pid, task-&gt;comm, hwt-&gt;name, smp_processor_id());</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Stop a UDN switch before draining the network. */</div><div class='del'>-static void stop_udn_switch(void *ignored)</div><div class='add'>+void hardwall_deactivate_all(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	for (i = 0; i &lt; HARDWALL_TYPES; ++i)</div><div class='add'>+		if (task-&gt;thread.hardwall[i].info)</div><div class='add'>+			hardwall_deactivate(&amp;hardwall_types[i], task);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Stop the switch before draining the network. */</div><div class='add'>+static void stop_xdn_switch(void *arg)</div><div class='ctx'> {</div><div class='ctx'> #if !CHIP_HAS_REV1_XDN()</div><div class='ctx'> 	/* Freeze the switch and the demux. */</div><div class='hunk'>@@ -507,13 +674,71 @@ static void stop_udn_switch(void *ignored)</div><div class='ctx'> 		     SPR_UDN_SP_FREEZE__SP_FRZ_MASK |</div><div class='ctx'> 		     SPR_UDN_SP_FREEZE__DEMUX_FRZ_MASK |</div><div class='ctx'> 		     SPR_UDN_SP_FREEZE__NON_DEST_EXT_MASK);</div><div class='add'>+#else</div><div class='add'>+	/*</div><div class='add'>+	 * Drop all packets bound for the core or off the edge.</div><div class='add'>+	 * We rely on the normal hardwall protection setup code</div><div class='add'>+	 * to have set the low four bits to trigger firewall interrupts,</div><div class='add'>+	 * and shift those bits up to trigger "drop on send" semantics,</div><div class='add'>+	 * plus adding "drop on send to core" for all switches.</div><div class='add'>+	 * In practice it seems the switches latch the DIRECTION_PROTECT</div><div class='add'>+	 * SPR so they won't start dropping if they're already</div><div class='add'>+	 * delivering the last message to the core, but it doesn't</div><div class='add'>+	 * hurt to enable it here.</div><div class='add'>+	 */</div><div class='add'>+	struct hardwall_type *hwt = arg;</div><div class='add'>+	unsigned long protect = mfspr_XDN(hwt, DIRECTION_PROTECT);</div><div class='add'>+	mtspr_XDN(hwt, DIRECTION_PROTECT, (protect | C_PROTECT) &lt;&lt; 5);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void empty_xdn_demuxes(struct hardwall_type *hwt)</div><div class='add'>+{</div><div class='add'>+#ifndef __tilepro__</div><div class='add'>+	if (hwt-&gt;is_idn) {</div><div class='add'>+		while (__insn_mfspr(SPR_IDN_DATA_AVAIL) &amp; (1 &lt;&lt; 0))</div><div class='add'>+			(void) __tile_idn0_receive();</div><div class='add'>+		while (__insn_mfspr(SPR_IDN_DATA_AVAIL) &amp; (1 &lt;&lt; 1))</div><div class='add'>+			(void) __tile_idn1_receive();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	while (__insn_mfspr(SPR_UDN_DATA_AVAIL) &amp; (1 &lt;&lt; 0))</div><div class='add'>+		(void) __tile_udn0_receive();</div><div class='add'>+	while (__insn_mfspr(SPR_UDN_DATA_AVAIL) &amp; (1 &lt;&lt; 1))</div><div class='add'>+		(void) __tile_udn1_receive();</div><div class='add'>+	while (__insn_mfspr(SPR_UDN_DATA_AVAIL) &amp; (1 &lt;&lt; 2))</div><div class='add'>+		(void) __tile_udn2_receive();</div><div class='add'>+	while (__insn_mfspr(SPR_UDN_DATA_AVAIL) &amp; (1 &lt;&lt; 3))</div><div class='add'>+		(void) __tile_udn3_receive();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Drain all the state from a stopped switch. */</div><div class='del'>-static void drain_udn_switch(void *ignored)</div><div class='add'>+static void drain_xdn_switch(void *arg)</div><div class='ctx'> {</div><div class='del'>-#if !CHIP_HAS_REV1_XDN()</div><div class='add'>+	struct hardwall_info *info = arg;</div><div class='add'>+	struct hardwall_type *hwt = info-&gt;type;</div><div class='add'>+</div><div class='add'>+#if CHIP_HAS_REV1_XDN()</div><div class='add'>+	/*</div><div class='add'>+	 * The switches have been configured to drop any messages</div><div class='add'>+	 * destined for cores (or off the edge of the rectangle).</div><div class='add'>+	 * But the current message may continue to be delivered,</div><div class='add'>+	 * so we wait until all the cores have finished any pending</div><div class='add'>+	 * messages before we stop draining.</div><div class='add'>+	 */</div><div class='add'>+	int pending = mfspr_XDN(hwt, PENDING);</div><div class='add'>+	while (pending--) {</div><div class='add'>+		empty_xdn_demuxes(hwt);</div><div class='add'>+		if (hwt-&gt;is_idn)</div><div class='add'>+			__tile_idn_send(0);</div><div class='add'>+		else</div><div class='add'>+			__tile_udn_send(0);</div><div class='add'>+	}</div><div class='add'>+	atomic_dec(&amp;info-&gt;xdn_pending_count);</div><div class='add'>+	while (atomic_read(&amp;info-&gt;xdn_pending_count))</div><div class='add'>+		empty_xdn_demuxes(hwt);</div><div class='add'>+#else</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int from_tile_words, ca_count;</div><div class='ctx'> </div><div class='hunk'>@@ -533,15 +758,7 @@ static void drain_udn_switch(void *ignored)</div><div class='ctx'> 		(void) __insn_mfspr(SPR_UDN_DEMUX_WRITE_FIFO);</div><div class='ctx'> </div><div class='ctx'> 	/* Empty out demuxes. */</div><div class='del'>-	while (__insn_mfspr(SPR_UDN_DATA_AVAIL) &amp; (1 &lt;&lt; 0))</div><div class='del'>-		(void) __tile_udn0_receive();</div><div class='del'>-	while (__insn_mfspr(SPR_UDN_DATA_AVAIL) &amp; (1 &lt;&lt; 1))</div><div class='del'>-		(void) __tile_udn1_receive();</div><div class='del'>-	while (__insn_mfspr(SPR_UDN_DATA_AVAIL) &amp; (1 &lt;&lt; 2))</div><div class='del'>-		(void) __tile_udn2_receive();</div><div class='del'>-	while (__insn_mfspr(SPR_UDN_DATA_AVAIL) &amp; (1 &lt;&lt; 3))</div><div class='del'>-		(void) __tile_udn3_receive();</div><div class='del'>-	BUG_ON((__insn_mfspr(SPR_UDN_DATA_AVAIL) &amp; 0xF) != 0);</div><div class='add'>+	empty_xdn_demuxes(hwt);</div><div class='ctx'> </div><div class='ctx'> 	/* Empty out catch all. */</div><div class='ctx'> 	ca_count = __insn_mfspr(SPR_UDN_DEMUX_CA_COUNT);</div><div class='hunk'>@@ -563,21 +780,25 @@ static void drain_udn_switch(void *ignored)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Reset random UDN state registers at boot up and during hardwall teardown. */</div><div class='del'>-void reset_network_state(void)</div><div class='add'>+/* Reset random XDN state registers at boot up and during hardwall teardown. */</div><div class='add'>+static void reset_xdn_network_state(struct hardwall_type *hwt)</div><div class='ctx'> {</div><div class='del'>-#if !CHIP_HAS_REV1_XDN()</div><div class='del'>-	/* Reset UDN coordinates to their standard value */</div><div class='del'>-	unsigned int cpu = smp_processor_id();</div><div class='del'>-	unsigned int x = cpu % smp_width;</div><div class='del'>-	unsigned int y = cpu / smp_width;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (udn_disabled)</div><div class='add'>+	if (hwt-&gt;disabled)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* Clear out other random registers so we have a clean slate. */</div><div class='add'>+	mtspr_XDN(hwt, DIRECTION_PROTECT, 0);</div><div class='add'>+	mtspr_XDN(hwt, AVAIL_EN, 0);</div><div class='add'>+	mtspr_XDN(hwt, DEADLOCK_TIMEOUT, 0);</div><div class='add'>+</div><div class='ctx'> #if !CHIP_HAS_REV1_XDN()</div><div class='del'>-	__insn_mtspr(SPR_UDN_TILE_COORD, (x &lt;&lt; 18) | (y &lt;&lt; 7));</div><div class='add'>+	/* Reset UDN coordinates to their standard value */</div><div class='add'>+	{</div><div class='add'>+		unsigned int cpu = smp_processor_id();</div><div class='add'>+		unsigned int x = cpu % smp_width;</div><div class='add'>+		unsigned int y = cpu / smp_width;</div><div class='add'>+		__insn_mtspr(SPR_UDN_TILE_COORD, (x &lt;&lt; 18) | (y &lt;&lt; 7));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set demux tags to predefined values and enable them. */</div><div class='ctx'> 	__insn_mtspr(SPR_UDN_TAG_VALID, 0xf);</div><div class='hunk'>@@ -585,56 +806,50 @@ void reset_network_state(void)</div><div class='ctx'> 	__insn_mtspr(SPR_UDN_TAG_1, (1 &lt;&lt; 1));</div><div class='ctx'> 	__insn_mtspr(SPR_UDN_TAG_2, (1 &lt;&lt; 2));</div><div class='ctx'> 	__insn_mtspr(SPR_UDN_TAG_3, (1 &lt;&lt; 3));</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-	/* Clear out other random registers so we have a clean slate. */</div><div class='del'>-	__insn_mtspr(SPR_UDN_AVAIL_EN, 0);</div><div class='del'>-	__insn_mtspr(SPR_UDN_DEADLOCK_TIMEOUT, 0);</div><div class='del'>-#if !CHIP_HAS_REV1_XDN()</div><div class='add'>+	/* Set other rev0 random registers to a clean state. */</div><div class='ctx'> 	__insn_mtspr(SPR_UDN_REFILL_EN, 0);</div><div class='ctx'> 	__insn_mtspr(SPR_UDN_DEMUX_QUEUE_SEL, 0);</div><div class='ctx'> 	__insn_mtspr(SPR_UDN_SP_FIFO_SEL, 0);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	/* Start the switch and demux. */</div><div class='del'>-#if !CHIP_HAS_REV1_XDN()</div><div class='ctx'> 	__insn_mtspr(SPR_UDN_SP_FREEZE, 0);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Restart a UDN switch after draining. */</div><div class='del'>-static void restart_udn_switch(void *ignored)</div><div class='add'>+void reset_network_state(void)</div><div class='ctx'> {</div><div class='del'>-	reset_network_state();</div><div class='del'>-</div><div class='del'>-	/* Disable firewall interrupts. */</div><div class='del'>-	__insn_mtspr(SPR_UDN_DIRECTION_PROTECT, 0);</div><div class='del'>-	disable_firewall_interrupts();</div><div class='add'>+	reset_xdn_network_state(&amp;hardwall_types[HARDWALL_UDN]);</div><div class='add'>+#ifndef __tilepro__</div><div class='add'>+	reset_xdn_network_state(&amp;hardwall_types[HARDWALL_IDN]);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Build a struct cpumask containing all valid tiles in bounding rectangle. */</div><div class='del'>-static void fill_mask(struct hardwall_info *r, struct cpumask *result)</div><div class='add'>+/* Restart an XDN switch after draining. */</div><div class='add'>+static void restart_xdn_switch(void *arg)</div><div class='ctx'> {</div><div class='del'>-	int x, y, cpu;</div><div class='add'>+	struct hardwall_type *hwt = arg;</div><div class='ctx'> </div><div class='del'>-	cpumask_clear(result);</div><div class='add'>+#if CHIP_HAS_REV1_XDN()</div><div class='add'>+	/* One last drain step to avoid races with injection and draining. */</div><div class='add'>+	empty_xdn_demuxes(hwt);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	cpu = r-&gt;ulhc_y * smp_width + r-&gt;ulhc_x;</div><div class='del'>-	for (y = 0; y &lt; r-&gt;height; ++y, cpu += smp_width - r-&gt;width) {</div><div class='del'>-		for (x = 0; x &lt; r-&gt;width; ++x, ++cpu)</div><div class='del'>-			cpu_online_set(cpu, result);</div><div class='del'>-	}</div><div class='add'>+	reset_xdn_network_state(hwt);</div><div class='add'>+</div><div class='add'>+	/* Disable firewall interrupts. */</div><div class='add'>+	disable_firewall_interrupts(hwt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Last reference to a hardwall is gone, so clear the network. */</div><div class='del'>-static void hardwall_destroy(struct hardwall_info *rect)</div><div class='add'>+static void hardwall_destroy(struct hardwall_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct task_struct *task;</div><div class='add'>+	struct hardwall_type *hwt;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	struct cpumask mask;</div><div class='ctx'> </div><div class='del'>-	/* Make sure this file actually represents a rectangle. */</div><div class='del'>-	if (rect == NULL)</div><div class='add'>+	/* Make sure this file actually represents a hardwall. */</div><div class='add'>+	if (info == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -644,39 +859,53 @@ static void hardwall_destroy(struct hardwall_info *rect)</div><div class='ctx'> 	 * deactivate any remaining tasks before freeing the</div><div class='ctx'> 	 * hardwall_info object itself.</div><div class='ctx'> 	 */</div><div class='del'>-	spin_lock_irqsave(&amp;hardwall_lock, flags);</div><div class='del'>-	list_for_each_entry(task, &amp;rect-&gt;task_head, thread.hardwall_list)</div><div class='del'>-		_hardwall_deactivate(task);</div><div class='del'>-	spin_unlock_irqrestore(&amp;hardwall_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* Drain the UDN. */</div><div class='del'>-	printk(KERN_DEBUG "Clearing hardwall rectangle %dx%d %d,%d\n",</div><div class='del'>-	       rect-&gt;width, rect-&gt;height, rect-&gt;ulhc_x, rect-&gt;ulhc_y);</div><div class='del'>-	fill_mask(rect, &amp;mask);</div><div class='del'>-	on_each_cpu_mask(&amp;mask, stop_udn_switch, NULL, 1);</div><div class='del'>-	on_each_cpu_mask(&amp;mask, drain_udn_switch, NULL, 1);</div><div class='add'>+	hwt = info-&gt;type;</div><div class='add'>+	info-&gt;teardown_in_progress = 1;</div><div class='add'>+	spin_lock_irqsave(&amp;hwt-&gt;lock, flags);</div><div class='add'>+	list_for_each_entry(task, &amp;info-&gt;task_head,</div><div class='add'>+			    thread.hardwall[hwt-&gt;index].list)</div><div class='add'>+		_hardwall_deactivate(hwt, task);</div><div class='add'>+	spin_unlock_irqrestore(&amp;hwt-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (hwt-&gt;is_xdn) {</div><div class='add'>+		/* Configure the switches for draining the user network. */</div><div class='add'>+		printk(KERN_DEBUG</div><div class='add'>+		       "Clearing %s hardwall rectangle %dx%d %d,%d\n",</div><div class='add'>+		       hwt-&gt;name, info-&gt;width, info-&gt;height,</div><div class='add'>+		       info-&gt;ulhc_x, info-&gt;ulhc_y);</div><div class='add'>+		on_each_cpu_mask(&amp;info-&gt;cpumask, stop_xdn_switch, hwt, 1);</div><div class='add'>+</div><div class='add'>+		/* Drain the network. */</div><div class='add'>+#if CHIP_HAS_REV1_XDN()</div><div class='add'>+		atomic_set(&amp;info-&gt;xdn_pending_count,</div><div class='add'>+			   cpumask_weight(&amp;info-&gt;cpumask));</div><div class='add'>+		on_each_cpu_mask(&amp;info-&gt;cpumask, drain_xdn_switch, info, 0);</div><div class='add'>+#else</div><div class='add'>+		on_each_cpu_mask(&amp;info-&gt;cpumask, drain_xdn_switch, info, 1);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	/* Restart switch and disable firewall. */</div><div class='del'>-	on_each_cpu_mask(&amp;mask, restart_udn_switch, NULL, 1);</div><div class='add'>+		/* Restart switch and disable firewall. */</div><div class='add'>+		on_each_cpu_mask(&amp;info-&gt;cpumask, restart_xdn_switch, hwt, 1);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Remove the /proc/tile/hardwall entry. */</div><div class='del'>-	hardwall_remove_proc(rect);</div><div class='del'>-</div><div class='del'>-	/* Now free the rectangle from the list. */</div><div class='del'>-	spin_lock_irqsave(&amp;hardwall_lock, flags);</div><div class='del'>-	BUG_ON(!list_empty(&amp;rect-&gt;task_head));</div><div class='del'>-	list_del(&amp;rect-&gt;list);</div><div class='del'>-	spin_unlock_irqrestore(&amp;hardwall_lock, flags);</div><div class='del'>-	kfree(rect);</div><div class='add'>+	hardwall_remove_proc(info);</div><div class='add'>+</div><div class='add'>+	/* Now free the hardwall from the list. */</div><div class='add'>+	spin_lock_irqsave(&amp;hwt-&gt;lock, flags);</div><div class='add'>+	BUG_ON(!list_empty(&amp;info-&gt;task_head));</div><div class='add'>+	list_del(&amp;info-&gt;list);</div><div class='add'>+	spin_unlock_irqrestore(&amp;hwt-&gt;lock, flags);</div><div class='add'>+	kfree(info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static int hardwall_proc_show(struct seq_file *sf, void *v)</div><div class='ctx'> {</div><div class='del'>-	struct hardwall_info *rect = sf-&gt;private;</div><div class='add'>+	struct hardwall_info *info = sf-&gt;private;</div><div class='ctx'> 	char buf[256];</div><div class='ctx'> </div><div class='del'>-	int rc = cpulist_scnprintf(buf, sizeof(buf), &amp;rect-&gt;cpumask);</div><div class='add'>+	int rc = cpulist_scnprintf(buf, sizeof(buf), &amp;info-&gt;cpumask);</div><div class='ctx'> 	buf[rc++] = '\n';</div><div class='ctx'> 	seq_write(sf, buf, rc);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -695,31 +924,45 @@ static const struct file_operations hardwall_proc_fops = {</div><div class='ctx'> 	.release	= single_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void hardwall_add_proc(struct hardwall_info *rect)</div><div class='add'>+static void hardwall_add_proc(struct hardwall_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	char buf[64];</div><div class='del'>-	snprintf(buf, sizeof(buf), "%d", rect-&gt;id);</div><div class='del'>-	proc_create_data(buf, 0444, hardwall_proc_dir,</div><div class='del'>-			 &amp;hardwall_proc_fops, rect);</div><div class='add'>+	snprintf(buf, sizeof(buf), "%d", info-&gt;id);</div><div class='add'>+	proc_create_data(buf, 0444, info-&gt;type-&gt;proc_dir,</div><div class='add'>+			 &amp;hardwall_proc_fops, info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hardwall_remove_proc(struct hardwall_info *rect)</div><div class='add'>+static void hardwall_remove_proc(struct hardwall_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	char buf[64];</div><div class='del'>-	snprintf(buf, sizeof(buf), "%d", rect-&gt;id);</div><div class='del'>-	remove_proc_entry(buf, hardwall_proc_dir);</div><div class='add'>+	snprintf(buf, sizeof(buf), "%d", info-&gt;id);</div><div class='add'>+	remove_proc_entry(buf, info-&gt;type-&gt;proc_dir);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int proc_pid_hardwall(struct task_struct *task, char *buffer)</div><div class='ctx'> {</div><div class='del'>-	struct hardwall_info *rect = task-&gt;thread.hardwall;</div><div class='del'>-	return rect ? sprintf(buffer, "%d\n", rect-&gt;id) : 0;</div><div class='add'>+	int i;</div><div class='add'>+	int n = 0;</div><div class='add'>+	for (i = 0; i &lt; HARDWALL_TYPES; ++i) {</div><div class='add'>+		struct hardwall_info *info = task-&gt;thread.hardwall[i].info;</div><div class='add'>+		if (info)</div><div class='add'>+			n += sprintf(&amp;buffer[n], "%s: %d\n",</div><div class='add'>+				     info-&gt;type-&gt;name, info-&gt;id);</div><div class='add'>+	}</div><div class='add'>+	return n;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void proc_tile_hardwall_init(struct proc_dir_entry *root)</div><div class='ctx'> {</div><div class='del'>-	if (!udn_disabled)</div><div class='del'>-		hardwall_proc_dir = proc_mkdir("hardwall", root);</div><div class='add'>+	int i;</div><div class='add'>+	for (i = 0; i &lt; HARDWALL_TYPES; ++i) {</div><div class='add'>+		struct hardwall_type *hwt = &amp;hardwall_types[i];</div><div class='add'>+		if (hwt-&gt;disabled)</div><div class='add'>+			continue;</div><div class='add'>+		if (hardwall_proc_dir == NULL)</div><div class='add'>+			hardwall_proc_dir = proc_mkdir("hardwall", root);</div><div class='add'>+		hwt-&gt;proc_dir = proc_mkdir(hwt-&gt;name, hardwall_proc_dir);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -729,34 +972,45 @@ void proc_tile_hardwall_init(struct proc_dir_entry *root)</div><div class='ctx'> </div><div class='ctx'> static long hardwall_ioctl(struct file *file, unsigned int a, unsigned long b)</div><div class='ctx'> {</div><div class='del'>-	struct hardwall_info *rect = file-&gt;private_data;</div><div class='add'>+	struct hardwall_info *info = file-&gt;private_data;</div><div class='add'>+	int minor = iminor(file-&gt;f_mapping-&gt;host);</div><div class='add'>+	struct hardwall_type* hwt;</div><div class='ctx'> </div><div class='ctx'> 	if (_IOC_TYPE(a) != HARDWALL_IOCTL_BASE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	BUILD_BUG_ON(HARDWALL_TYPES != _HARDWALL_TYPES);</div><div class='add'>+	BUILD_BUG_ON(HARDWALL_TYPES !=</div><div class='add'>+		     sizeof(hardwall_types)/sizeof(hardwall_types[0]));</div><div class='add'>+</div><div class='add'>+	if (minor &lt; 0 || minor &gt;= HARDWALL_TYPES)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	hwt = &amp;hardwall_types[minor];</div><div class='add'>+	WARN_ON(info &amp;&amp; hwt != info-&gt;type);</div><div class='add'>+</div><div class='ctx'> 	switch (_IOC_NR(a)) {</div><div class='ctx'> 	case _HARDWALL_CREATE:</div><div class='del'>-		if (udn_disabled)</div><div class='add'>+		if (hwt-&gt;disabled)</div><div class='ctx'> 			return -ENOSYS;</div><div class='del'>-		if (rect != NULL)</div><div class='add'>+		if (info != NULL)</div><div class='ctx'> 			return -EALREADY;</div><div class='del'>-		rect = hardwall_create(_IOC_SIZE(a),</div><div class='del'>-					(const unsigned char __user *)b);</div><div class='del'>-		if (IS_ERR(rect))</div><div class='del'>-			return PTR_ERR(rect);</div><div class='del'>-		file-&gt;private_data = rect;</div><div class='add'>+		info = hardwall_create(hwt, _IOC_SIZE(a),</div><div class='add'>+				       (const unsigned char __user *)b);</div><div class='add'>+		if (IS_ERR(info))</div><div class='add'>+			return PTR_ERR(info);</div><div class='add'>+		file-&gt;private_data = info;</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	case _HARDWALL_ACTIVATE:</div><div class='del'>-		return hardwall_activate(rect);</div><div class='add'>+		return hardwall_activate(info);</div><div class='ctx'> </div><div class='ctx'> 	case _HARDWALL_DEACTIVATE:</div><div class='del'>-		if (current-&gt;thread.hardwall != rect)</div><div class='add'>+		if (current-&gt;thread.hardwall[hwt-&gt;index].info != info)</div><div class='ctx'> 			return -EINVAL;</div><div class='del'>-		return hardwall_deactivate(current);</div><div class='add'>+		return hardwall_deactivate(hwt, current);</div><div class='ctx'> </div><div class='ctx'> 	case _HARDWALL_GET_ID:</div><div class='del'>-		return rect ? rect-&gt;id : -EINVAL;</div><div class='add'>+		return info ? info-&gt;id : -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -775,26 +1029,28 @@ static long hardwall_compat_ioctl(struct file *file,</div><div class='ctx'> /* The user process closed the file; revoke access to user networks. */</div><div class='ctx'> static int hardwall_flush(struct file *file, fl_owner_t owner)</div><div class='ctx'> {</div><div class='del'>-	struct hardwall_info *rect = file-&gt;private_data;</div><div class='add'>+	struct hardwall_info *info = file-&gt;private_data;</div><div class='ctx'> 	struct task_struct *task, *tmp;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (rect) {</div><div class='add'>+	if (info) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * NOTE: if multiple threads are activated on this hardwall</div><div class='ctx'> 		 * file, the other threads will continue having access to the</div><div class='del'>-		 * UDN until they are context-switched out and back in again.</div><div class='add'>+		 * user network until they are context-switched out and back</div><div class='add'>+		 * in again.</div><div class='ctx'> 		 *</div><div class='ctx'> 		 * NOTE: A NULL files pointer means the task is being torn</div><div class='ctx'> 		 * down, so in that case we also deactivate it.</div><div class='ctx'> 		 */</div><div class='del'>-		spin_lock_irqsave(&amp;hardwall_lock, flags);</div><div class='del'>-		list_for_each_entry_safe(task, tmp, &amp;rect-&gt;task_head,</div><div class='del'>-					 thread.hardwall_list) {</div><div class='add'>+		struct hardwall_type *hwt = info-&gt;type;</div><div class='add'>+		spin_lock_irqsave(&amp;hwt-&gt;lock, flags);</div><div class='add'>+		list_for_each_entry_safe(task, tmp, &amp;info-&gt;task_head,</div><div class='add'>+					 thread.hardwall[hwt-&gt;index].list) {</div><div class='ctx'> 			if (task-&gt;files == owner || task-&gt;files == NULL)</div><div class='del'>-				_hardwall_deactivate(task);</div><div class='add'>+				_hardwall_deactivate(hwt, task);</div><div class='ctx'> 		}</div><div class='del'>-		spin_unlock_irqrestore(&amp;hardwall_lock, flags);</div><div class='add'>+		spin_unlock_irqrestore(&amp;hwt-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -824,11 +1080,11 @@ static int __init dev_hardwall_init(void)</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	dev_t dev;</div><div class='ctx'> </div><div class='del'>-	rc = alloc_chrdev_region(&amp;dev, 0, 1, "hardwall");</div><div class='add'>+	rc = alloc_chrdev_region(&amp;dev, 0, HARDWALL_TYPES, "hardwall");</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	cdev_init(&amp;hardwall_dev, &amp;dev_hardwall_fops);</div><div class='del'>-	rc = cdev_add(&amp;hardwall_dev, dev, 1);</div><div class='add'>+	rc = cdev_add(&amp;hardwall_dev, dev, HARDWALL_TYPES);</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/kernel/head_32.S b/arch/tile/kernel/head_32.S<br/>index 1a39b7c1c87e..f71bfeeaf1a9 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/head_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/head_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/head_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/head_32.S</a></div><div class='hunk'>@@ -69,7 +69,7 @@ ENTRY(_start)</div><div class='ctx'> 	}</div><div class='ctx'> 	{</div><div class='ctx'> 	  moveli lr, lo16(1f)</div><div class='del'>-	  move r5, zero</div><div class='add'>+	  moveli r5, CTX_PAGE_FLAG</div><div class='ctx'> 	}</div><div class='ctx'> 	{</div><div class='ctx'> 	  auli lr, lr, ha16(1f)</div><div class='hunk'>@@ -141,11 +141,11 @@ ENTRY(empty_zero_page)</div><div class='ctx'> </div><div class='ctx'> 	.macro PTE va, cpa, bits1, no_org=0</div><div class='ctx'> 	.ifeq \no_org</div><div class='del'>-	.org swapper_pg_dir + HV_L1_INDEX(\va) * HV_PTE_SIZE</div><div class='add'>+	.org swapper_pg_dir + PGD_INDEX(\va) * HV_PTE_SIZE</div><div class='ctx'> 	.endif</div><div class='ctx'> 	.word HV_PTE_PAGE | HV_PTE_DIRTY | HV_PTE_PRESENT | HV_PTE_ACCESSED | \</div><div class='ctx'> 	      (HV_PTE_MODE_CACHE_NO_L3 &lt;&lt; HV_PTE_INDEX_MODE)</div><div class='del'>-	.word (\bits1) | (HV_CPA_TO_PFN(\cpa) &lt;&lt; (HV_PTE_INDEX_PFN - 32))</div><div class='add'>+	.word (\bits1) | (HV_CPA_TO_PTFN(\cpa) &lt;&lt; (HV_PTE_INDEX_PTFN - 32))</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> __PAGE_ALIGNED_DATA</div><div class='hunk'>@@ -166,7 +166,7 @@ ENTRY(swapper_pg_dir)</div><div class='ctx'> 	/* The true text VAs are mapped as VA = PA + MEM_SV_INTRPT */</div><div class='ctx'> 	PTE MEM_SV_INTRPT, 0, (1 &lt;&lt; (HV_PTE_INDEX_READABLE - 32)) | \</div><div class='ctx'> 			      (1 &lt;&lt; (HV_PTE_INDEX_EXECUTABLE - 32))</div><div class='del'>-	.org swapper_pg_dir + HV_L1_SIZE</div><div class='add'>+	.org swapper_pg_dir + PGDIR_SIZE</div><div class='ctx'> 	END(swapper_pg_dir)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/tile/kernel/head_64.S b/arch/tile/kernel/head_64.S<br/>index 6bc3a932fe45..f9a2734f7b82 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/head_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/head_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/head_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/head_64.S</a></div><div class='hunk'>@@ -114,7 +114,7 @@ ENTRY(_start)</div><div class='ctx'> 	  shl16insli r0, r0, hw0(swapper_pg_dir - PAGE_OFFSET)</div><div class='ctx'> 	}</div><div class='ctx'> 	{</div><div class='del'>-	  move r3, zero</div><div class='add'>+	  moveli r3, CTX_PAGE_FLAG</div><div class='ctx'> 	  j hv_install_context</div><div class='ctx'> 	}</div><div class='ctx'> 1:</div><div class='hunk'>@@ -210,19 +210,19 @@ ENTRY(empty_zero_page)</div><div class='ctx'> 	.macro PTE cpa, bits1</div><div class='ctx'> 	.quad HV_PTE_PAGE | HV_PTE_DIRTY | HV_PTE_PRESENT | HV_PTE_ACCESSED |\</div><div class='ctx'> 	      HV_PTE_GLOBAL | (HV_PTE_MODE_CACHE_NO_L3 &lt;&lt; HV_PTE_INDEX_MODE) |\</div><div class='del'>-	      (\bits1) | (HV_CPA_TO_PFN(\cpa) &lt;&lt; HV_PTE_INDEX_PFN)</div><div class='add'>+	      (\bits1) | (HV_CPA_TO_PTFN(\cpa) &lt;&lt; HV_PTE_INDEX_PTFN)</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> __PAGE_ALIGNED_DATA</div><div class='ctx'> 	.align PAGE_SIZE</div><div class='ctx'> ENTRY(swapper_pg_dir)</div><div class='del'>-	.org swapper_pg_dir + HV_L0_INDEX(PAGE_OFFSET) * HV_PTE_SIZE</div><div class='add'>+	.org swapper_pg_dir + PGD_INDEX(PAGE_OFFSET) * HV_PTE_SIZE</div><div class='ctx'> .Lsv_data_pmd:</div><div class='ctx'> 	.quad 0  /* PTE temp_data_pmd - PAGE_OFFSET, 0 */</div><div class='del'>-	.org swapper_pg_dir + HV_L0_INDEX(MEM_SV_START) * HV_PTE_SIZE</div><div class='add'>+	.org swapper_pg_dir + PGD_INDEX(MEM_SV_START) * HV_PTE_SIZE</div><div class='ctx'> .Lsv_code_pmd:</div><div class='ctx'> 	.quad 0  /* PTE temp_code_pmd - PAGE_OFFSET, 0 */</div><div class='del'>-	.org swapper_pg_dir + HV_L0_SIZE</div><div class='add'>+	.org swapper_pg_dir + SIZEOF_PGD</div><div class='ctx'> 	END(swapper_pg_dir)</div><div class='ctx'> </div><div class='ctx'> 	.align HV_PAGE_TABLE_ALIGN</div><div class='hunk'>@@ -233,11 +233,11 @@ ENTRY(temp_data_pmd)</div><div class='ctx'> 	 * permissions later.</div><div class='ctx'> 	 */</div><div class='ctx'> 	.set addr, 0</div><div class='del'>-	.rept HV_L1_ENTRIES</div><div class='add'>+	.rept PTRS_PER_PMD</div><div class='ctx'> 	PTE addr, HV_PTE_READABLE | HV_PTE_WRITABLE</div><div class='del'>-	.set addr, addr + HV_PAGE_SIZE_LARGE</div><div class='add'>+	.set addr, addr + HPAGE_SIZE</div><div class='ctx'> 	.endr</div><div class='del'>-	.org temp_data_pmd + HV_L1_SIZE</div><div class='add'>+	.org temp_data_pmd + SIZEOF_PMD</div><div class='ctx'> 	END(temp_data_pmd)</div><div class='ctx'> </div><div class='ctx'> 	.align HV_PAGE_TABLE_ALIGN</div><div class='hunk'>@@ -248,11 +248,11 @@ ENTRY(temp_code_pmd)</div><div class='ctx'> 	 * permissions later.</div><div class='ctx'> 	 */</div><div class='ctx'> 	.set addr, 0</div><div class='del'>-	.rept HV_L1_ENTRIES</div><div class='add'>+	.rept PTRS_PER_PMD</div><div class='ctx'> 	PTE addr, HV_PTE_READABLE | HV_PTE_EXECUTABLE</div><div class='del'>-	.set addr, addr + HV_PAGE_SIZE_LARGE</div><div class='add'>+	.set addr, addr + HPAGE_SIZE</div><div class='ctx'> 	.endr</div><div class='del'>-	.org temp_code_pmd + HV_L1_SIZE</div><div class='add'>+	.org temp_code_pmd + SIZEOF_PMD</div><div class='ctx'> 	END(temp_code_pmd)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/tile/kernel/hvglue.lds b/arch/tile/kernel/hvglue.lds<br/>index 2b7cd0a659a9..d44c5a67a1ed 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/hvglue.lds?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/hvglue.lds</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/hvglue.lds?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/hvglue.lds</a></div><div class='hunk'>@@ -55,4 +55,5 @@ hv_store_mapping = TEXT_OFFSET + 0x106a0;</div><div class='ctx'> hv_inquire_realpa = TEXT_OFFSET + 0x106c0;</div><div class='ctx'> hv_flush_all = TEXT_OFFSET + 0x106e0;</div><div class='ctx'> hv_get_ipi_pte = TEXT_OFFSET + 0x10700;</div><div class='del'>-hv_glue_internals = TEXT_OFFSET + 0x10720;</div><div class='add'>+hv_set_pte_super_shift = TEXT_OFFSET + 0x10720;</div><div class='add'>+hv_glue_internals = TEXT_OFFSET + 0x10740;</div><div class='head'>diff --git a/arch/tile/kernel/init_task.c b/arch/tile/kernel/init_task.c<br/>deleted file mode 100644<br/>index 928b31870669..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,59 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright 2010 Tilera Corporation. All Rights Reserved.</div><div class='del'>- *</div><div class='del'>- *   This program is free software; you can redistribute it and/or</div><div class='del'>- *   modify it under the terms of the GNU General Public License</div><div class='del'>- *   as published by the Free Software Foundation, version 2.</div><div class='del'>- *</div><div class='del'>- *   This program is distributed in the hope that it will be useful, but</div><div class='del'>- *   WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or</div><div class='del'>- *   NON INFRINGEMENT.  See the GNU General Public License for</div><div class='del'>- *   more details.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/start_kernel.h&gt;</div><div class='del'>-#include &lt;linux/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is THREAD_SIZE aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data = {</div><div class='del'>-	INIT_THREAD_INFO(init_task)</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * per-CPU stack and boot info.</div><div class='del'>- */</div><div class='del'>-DEFINE_PER_CPU(unsigned long, boot_sp) =</div><div class='del'>-	(unsigned long)init_stack + THREAD_SIZE;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-DEFINE_PER_CPU(unsigned long, boot_pc) = (unsigned long)start_kernel;</div><div class='del'>-#else</div><div class='del'>-/*</div><div class='del'>- * The variable must be __initdata since it references __init code.</div><div class='del'>- * With CONFIG_SMP it is per-cpu data, which is exempt from validation.</div><div class='del'>- */</div><div class='del'>-unsigned long __initdata boot_pc = (unsigned long)start_kernel;</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/tile/kernel/intvec_32.S b/arch/tile/kernel/intvec_32.S<br/>index 5d56a1ef5ba5..6943515100f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/intvec_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/intvec_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/intvec_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/intvec_32.S</a></div><div class='hunk'>@@ -839,6 +839,18 @@ STD_ENTRY(interrupt_return)</div><div class='ctx'> 	FEEDBACK_REENTER(interrupt_return)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * Use r33 to hold whether we have already loaded the callee-saves</div><div class='add'>+	 * into ptregs.  We don't want to do it twice in this loop, since</div><div class='add'>+	 * then we'd clobber whatever changes are made by ptrace, etc.</div><div class='add'>+	 * Get base of stack in r32.</div><div class='add'>+	 */</div><div class='add'>+	{</div><div class='add'>+	 GET_THREAD_INFO(r32)</div><div class='add'>+	 movei  r33, 0</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+.Lretry_work_pending:</div><div class='add'>+	/*</div><div class='ctx'> 	 * Disable interrupts so as to make sure we don't</div><div class='ctx'> 	 * miss an interrupt that sets any of the thread flags (like</div><div class='ctx'> 	 * need_resched or sigpending) between sampling and the iret.</div><div class='hunk'>@@ -848,9 +860,6 @@ STD_ENTRY(interrupt_return)</div><div class='ctx'> 	IRQ_DISABLE(r20, r21)</div><div class='ctx'> 	TRACE_IRQS_OFF  /* Note: clobbers registers r0-r29 */</div><div class='ctx'> </div><div class='del'>-	/* Get base of stack in r32; note r30/31 are used as arguments here. */</div><div class='del'>-	GET_THREAD_INFO(r32)</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> 	/* Check to see if there is any work to do before returning to user. */</div><div class='ctx'> 	{</div><div class='hunk'>@@ -866,16 +875,18 @@ STD_ENTRY(interrupt_return)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make sure we have all the registers saved for signal</div><div class='del'>-	 * handling or single-step.  Call out to C code to figure out</div><div class='del'>-	 * exactly what we need to do for each flag bit, then if</div><div class='del'>-	 * necessary, reload the flags and recheck.</div><div class='add'>+	 * handling, notify-resume, or single-step.  Call out to C</div><div class='add'>+	 * code to figure out exactly what we need to do for each flag bit,</div><div class='add'>+	 * then if necessary, reload the flags and recheck.</div><div class='ctx'> 	 */</div><div class='del'>-	push_extra_callee_saves r0</div><div class='ctx'> 	{</div><div class='ctx'> 	 PTREGS_PTR(r0, PTREGS_OFFSET_BASE)</div><div class='del'>-	 jal    do_work_pending</div><div class='add'>+	 bnz    r33, 1f</div><div class='ctx'> 	}</div><div class='del'>-	bnz     r0, .Lresume_userspace</div><div class='add'>+	push_extra_callee_saves r0</div><div class='add'>+	movei   r33, 1</div><div class='add'>+1:	jal     do_work_pending</div><div class='add'>+	bnz     r0, .Lretry_work_pending</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * In the NMI case we</div><div class='hunk'>@@ -1180,10 +1191,12 @@ handle_syscall:</div><div class='ctx'> 	add     r20, r20, tp</div><div class='ctx'> 	lw      r21, r20</div><div class='ctx'> 	addi    r21, r21, 1</div><div class='del'>-	sw      r20, r21</div><div class='add'>+	{</div><div class='add'>+	 sw     r20, r21</div><div class='add'>+	 GET_THREAD_INFO(r31)</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Trace syscalls, if requested. */</div><div class='del'>-	GET_THREAD_INFO(r31)</div><div class='ctx'> 	addi	r31, r31, THREAD_INFO_FLAGS_OFFSET</div><div class='ctx'> 	lw	r30, r31</div><div class='ctx'> 	andi    r30, r30, _TIF_SYSCALL_TRACE</div><div class='hunk'>@@ -1362,7 +1375,10 @@ handle_ill:</div><div class='ctx'> 3:</div><div class='ctx'> 	/* set PC and continue */</div><div class='ctx'> 	lw      r26, r24</div><div class='del'>-	sw      r28, r26</div><div class='add'>+	{</div><div class='add'>+	 sw     r28, r26</div><div class='add'>+	 GET_THREAD_INFO(r0)</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Clear TIF_SINGLESTEP to prevent recursion if we execute an ill.</div><div class='hunk'>@@ -1370,7 +1386,6 @@ handle_ill:</div><div class='ctx'> 	 * need to clear it here and can't really impose on all other arches.</div><div class='ctx'> 	 * So what's another write between friends?</div><div class='ctx'> 	 */</div><div class='del'>-	GET_THREAD_INFO(r0)</div><div class='ctx'> </div><div class='ctx'> 	addi    r1, r0, THREAD_INFO_FLAGS_OFFSET</div><div class='ctx'> 	{</div><div class='head'>diff --git a/arch/tile/kernel/intvec_64.S b/arch/tile/kernel/intvec_64.S<br/>index 49d9d6621682..7c06d597ffd0 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/intvec_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/intvec_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/intvec_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/intvec_64.S</a></div><div class='hunk'>@@ -220,7 +220,9 @@ intvec_\vecname:</div><div class='ctx'> 	 * This routine saves just the first four registers, plus the</div><div class='ctx'> 	 * stack context so we can do proper backtracing right away,</div><div class='ctx'> 	 * and defers to handle_interrupt to save the rest.</div><div class='del'>-	 * The backtracer needs pc, ex1, lr, sp, r52, and faultnum.</div><div class='add'>+	 * The backtracer needs pc, ex1, lr, sp, r52, and faultnum,</div><div class='add'>+	 * and needs sp set to its final location at the bottom of</div><div class='add'>+	 * the stack frame.</div><div class='ctx'> 	 */</div><div class='ctx'> 	addli   r0, r0, PTREGS_OFFSET_LR - (PTREGS_SIZE + KSTK_PTREGS_GAP)</div><div class='ctx'> 	wh64    r0   /* cache line 7 */</div><div class='hunk'>@@ -450,23 +452,6 @@ intvec_\vecname:</div><div class='ctx'> 	push_reg r5, r52</div><div class='ctx'> 	st      r52, r4</div><div class='ctx'> </div><div class='del'>-	/* Load tp with our per-cpu offset. */</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	{</div><div class='del'>-	 mfspr  r20, SPR_SYSTEM_SAVE_K_0</div><div class='del'>-	 moveli r21, hw2_last(__per_cpu_offset)</div><div class='del'>-	}</div><div class='del'>-	{</div><div class='del'>-	 shl16insli r21, r21, hw1(__per_cpu_offset)</div><div class='del'>-	 bfextu r20, r20, 0, LOG2_THREAD_SIZE-1</div><div class='del'>-	}</div><div class='del'>-	shl16insli r21, r21, hw0(__per_cpu_offset)</div><div class='del'>-	shl3add r20, r20, r21</div><div class='del'>-	ld      tp, r20</div><div class='del'>-#else</div><div class='del'>-	move    tp, zero</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we will be returning to the kernel, we will need to</div><div class='ctx'> 	 * reset the interrupt masks to the state they had before.</div><div class='hunk'>@@ -489,6 +474,44 @@ intvec_\vecname:</div><div class='ctx'> 	.endif</div><div class='ctx'> 	st      r21, r32</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * we've captured enough state to the stack (including in</div><div class='add'>+	 * particular our EX_CONTEXT state) that we can now release</div><div class='add'>+	 * the interrupt critical section and replace it with our</div><div class='add'>+	 * standard "interrupts disabled" mask value.  This allows</div><div class='add'>+	 * synchronous interrupts (and profile interrupts) to punch</div><div class='add'>+	 * through from this point onwards.</div><div class='add'>+	 *</div><div class='add'>+	 * It's important that no code before this point touch memory</div><div class='add'>+	 * other than our own stack (to keep the invariant that this</div><div class='add'>+	 * is all that gets touched under ICS), and that no code after</div><div class='add'>+	 * this point reference any interrupt-specific SPR, in particular</div><div class='add'>+	 * the EX_CONTEXT_K_ values.</div><div class='add'>+	 */</div><div class='add'>+	.ifc \function,handle_nmi</div><div class='add'>+	IRQ_DISABLE_ALL(r20)</div><div class='add'>+	.else</div><div class='add'>+	IRQ_DISABLE(r20, r21)</div><div class='add'>+	.endif</div><div class='add'>+	mtspr   INTERRUPT_CRITICAL_SECTION, zero</div><div class='add'>+</div><div class='add'>+	/* Load tp with our per-cpu offset. */</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	{</div><div class='add'>+	 mfspr  r20, SPR_SYSTEM_SAVE_K_0</div><div class='add'>+	 moveli r21, hw2_last(__per_cpu_offset)</div><div class='add'>+	}</div><div class='add'>+	{</div><div class='add'>+	 shl16insli r21, r21, hw1(__per_cpu_offset)</div><div class='add'>+	 bfextu r20, r20, 0, LOG2_THREAD_SIZE-1</div><div class='add'>+	}</div><div class='add'>+	shl16insli r21, r21, hw0(__per_cpu_offset)</div><div class='add'>+	shl3add r20, r20, r21</div><div class='add'>+	ld      tp, r20</div><div class='add'>+#else</div><div class='add'>+	move    tp, zero</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef __COLLECT_LINKER_FEEDBACK__</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Notify the feedback routines that we were in the</div><div class='hunk'>@@ -513,21 +536,6 @@ intvec_\vecname:</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * we've captured enough state to the stack (including in</div><div class='del'>-	 * particular our EX_CONTEXT state) that we can now release</div><div class='del'>-	 * the interrupt critical section and replace it with our</div><div class='del'>-	 * standard "interrupts disabled" mask value.  This allows</div><div class='del'>-	 * synchronous interrupts (and profile interrupts) to punch</div><div class='del'>-	 * through from this point onwards.</div><div class='del'>-	 */</div><div class='del'>-	.ifc \function,handle_nmi</div><div class='del'>-	IRQ_DISABLE_ALL(r20)</div><div class='del'>-	.else</div><div class='del'>-	IRQ_DISABLE(r20, r21)</div><div class='del'>-	.endif</div><div class='del'>-	mtspr   INTERRUPT_CRITICAL_SECTION, zero</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * Prepare the first 256 stack bytes to be rapidly accessible</div><div class='ctx'> 	 * without having to fetch the background data.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -647,6 +655,20 @@ STD_ENTRY(interrupt_return)</div><div class='ctx'> 	FEEDBACK_REENTER(interrupt_return)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * Use r33 to hold whether we have already loaded the callee-saves</div><div class='add'>+	 * into ptregs.  We don't want to do it twice in this loop, since</div><div class='add'>+	 * then we'd clobber whatever changes are made by ptrace, etc.</div><div class='add'>+	 */</div><div class='add'>+	{</div><div class='add'>+	 movei  r33, 0</div><div class='add'>+	 move   r32, sp</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Get base of stack in r32. */</div><div class='add'>+	EXTRACT_THREAD_INFO(r32)</div><div class='add'>+</div><div class='add'>+.Lretry_work_pending:</div><div class='add'>+	/*</div><div class='ctx'> 	 * Disable interrupts so as to make sure we don't</div><div class='ctx'> 	 * miss an interrupt that sets any of the thread flags (like</div><div class='ctx'> 	 * need_resched or sigpending) between sampling and the iret.</div><div class='hunk'>@@ -656,9 +678,6 @@ STD_ENTRY(interrupt_return)</div><div class='ctx'> 	IRQ_DISABLE(r20, r21)</div><div class='ctx'> 	TRACE_IRQS_OFF  /* Note: clobbers registers r0-r29 */</div><div class='ctx'> </div><div class='del'>-	/* Get base of stack in r32; note r30/31 are used as arguments here. */</div><div class='del'>-	GET_THREAD_INFO(r32)</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> 	/* Check to see if there is any work to do before returning to user. */</div><div class='ctx'> 	{</div><div class='hunk'>@@ -674,16 +693,18 @@ STD_ENTRY(interrupt_return)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make sure we have all the registers saved for signal</div><div class='del'>-	 * handling or single-step.  Call out to C code to figure out</div><div class='add'>+	 * handling or notify-resume.  Call out to C code to figure out</div><div class='ctx'> 	 * exactly what we need to do for each flag bit, then if</div><div class='ctx'> 	 * necessary, reload the flags and recheck.</div><div class='ctx'> 	 */</div><div class='del'>-	push_extra_callee_saves r0</div><div class='ctx'> 	{</div><div class='ctx'> 	 PTREGS_PTR(r0, PTREGS_OFFSET_BASE)</div><div class='del'>-	 jal    do_work_pending</div><div class='add'>+	 bnez   r33, 1f</div><div class='ctx'> 	}</div><div class='del'>-	bnez    r0, .Lresume_userspace</div><div class='add'>+	push_extra_callee_saves r0</div><div class='add'>+	movei   r33, 1</div><div class='add'>+1:	jal     do_work_pending</div><div class='add'>+	bnez    r0, .Lretry_work_pending</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * In the NMI case we</div><div class='hunk'>@@ -723,9 +744,10 @@ STD_ENTRY(interrupt_return)</div><div class='ctx'> 	beqzt   r30, .Lrestore_regs</div><div class='ctx'> 	j       3f</div><div class='ctx'> 2:	TRACE_IRQS_ON</div><div class='add'>+	IRQ_ENABLE_LOAD(r20, r21)</div><div class='ctx'> 	movei   r0, 1</div><div class='ctx'> 	mtspr   INTERRUPT_CRITICAL_SECTION, r0</div><div class='del'>-	IRQ_ENABLE(r20, r21)</div><div class='add'>+	IRQ_ENABLE_APPLY(r20, r21)</div><div class='ctx'> 	beqzt   r30, .Lrestore_regs</div><div class='ctx'> 3:</div><div class='ctx'> </div><div class='hunk'>@@ -742,7 +764,6 @@ STD_ENTRY(interrupt_return)</div><div class='ctx'> 	 * that will save some cycles if this turns out to be a syscall.</div><div class='ctx'> 	 */</div><div class='ctx'> .Lrestore_regs:</div><div class='del'>-	FEEDBACK_REENTER(interrupt_return)   /* called from elsewhere */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Rotate so we have one high bit and one low bit to test.</div><div class='hunk'>@@ -968,11 +989,16 @@ handle_syscall:</div><div class='ctx'> 	shl16insli r20, r20, hw0(irq_stat + IRQ_CPUSTAT_SYSCALL_COUNT_OFFSET)</div><div class='ctx'> 	add     r20, r20, tp</div><div class='ctx'> 	ld4s    r21, r20</div><div class='del'>-	addi    r21, r21, 1</div><div class='del'>-	st4     r20, r21</div><div class='add'>+	{</div><div class='add'>+	 addi   r21, r21, 1</div><div class='add'>+	 move   r31, sp</div><div class='add'>+	}</div><div class='add'>+	{</div><div class='add'>+	 st4    r20, r21</div><div class='add'>+	 EXTRACT_THREAD_INFO(r31)</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Trace syscalls, if requested. */</div><div class='del'>-	GET_THREAD_INFO(r31)</div><div class='ctx'> 	addi	r31, r31, THREAD_INFO_FLAGS_OFFSET</div><div class='ctx'> 	ld	r30, r31</div><div class='ctx'> 	andi    r30, r30, _TIF_SYSCALL_TRACE</div><div class='hunk'>@@ -1231,7 +1257,7 @@ STD_ENTRY(fill_ra_stack)</div><div class='ctx'> 	int_hand     INT_UNALIGN_DATA, UNALIGN_DATA, int_unalign</div><div class='ctx'> 	int_hand     INT_DTLB_MISS, DTLB_MISS, do_page_fault</div><div class='ctx'> 	int_hand     INT_DTLB_ACCESS, DTLB_ACCESS, do_page_fault</div><div class='del'>-	int_hand     INT_IDN_FIREWALL, IDN_FIREWALL, bad_intr</div><div class='add'>+	int_hand     INT_IDN_FIREWALL, IDN_FIREWALL, do_hardwall_trap</div><div class='ctx'> 	int_hand     INT_UDN_FIREWALL, UDN_FIREWALL, do_hardwall_trap</div><div class='ctx'> 	int_hand     INT_TILE_TIMER, TILE_TIMER, do_timer_interrupt</div><div class='ctx'> 	int_hand     INT_IDN_TIMER, IDN_TIMER, bad_intr</div><div class='head'>diff --git a/arch/tile/kernel/machine_kexec.c b/arch/tile/kernel/machine_kexec.c<br/>index 6255f2eab112..f0b54a934712 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/machine_kexec.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/machine_kexec.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/machine_kexec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/machine_kexec.c</a></div><div class='hunk'>@@ -31,6 +31,8 @@</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/checksum.h&gt;</div><div class='add'>+#include &lt;asm/tlbflush.h&gt;</div><div class='add'>+#include &lt;asm/homecache.h&gt;</div><div class='ctx'> #include &lt;hv/hypervisor.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -222,11 +224,22 @@ struct page *kimage_alloc_pages_arch(gfp_t gfp_mask, unsigned int order)</div><div class='ctx'> 	return alloc_pages_node(0, gfp_mask, order);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Address range in which pa=va mapping is set in setup_quasi_va_is_pa().</div><div class='add'>+ * For tilepro, PAGE_OFFSET is used since this is the largest possbile value</div><div class='add'>+ * for tilepro, while for tilegx, we limit it to entire middle level page</div><div class='add'>+ * table which we assume has been allocated and is undoubtedly large enough.</div><div class='add'>+ */</div><div class='add'>+#ifndef __tilegx__</div><div class='add'>+#define	QUASI_VA_IS_PA_ADDR_RANGE PAGE_OFFSET</div><div class='add'>+#else</div><div class='add'>+#define	QUASI_VA_IS_PA_ADDR_RANGE PGDIR_SIZE</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static void setup_quasi_va_is_pa(void)</div><div class='ctx'> {</div><div class='del'>-	HV_PTE *pgtable;</div><div class='ctx'> 	HV_PTE pte;</div><div class='del'>-	int i;</div><div class='add'>+	unsigned long i;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Flush our TLB to prevent conflicts between the previous contents</div><div class='hunk'>@@ -234,16 +247,22 @@ static void setup_quasi_va_is_pa(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	local_flush_tlb_all();</div><div class='ctx'> </div><div class='del'>-	/* setup VA is PA, at least up to PAGE_OFFSET */</div><div class='del'>-</div><div class='del'>-	pgtable = (HV_PTE *)current-&gt;mm-&gt;pgd;</div><div class='add'>+	/*</div><div class='add'>+	 * setup VA is PA, at least up to QUASI_VA_IS_PA_ADDR_RANGE.</div><div class='add'>+	 * Note here we assume that level-1 page table is defined by</div><div class='add'>+	 * HPAGE_SIZE.</div><div class='add'>+	 */</div><div class='ctx'> 	pte = hv_pte(_PAGE_KERNEL | _PAGE_HUGE_PAGE);</div><div class='ctx'> 	pte = hv_pte_set_mode(pte, HV_PTE_MODE_CACHE_NO_L3);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; pgd_index(PAGE_OFFSET); i++) {</div><div class='add'>+	for (i = 0; i &lt; (QUASI_VA_IS_PA_ADDR_RANGE &gt;&gt; HPAGE_SHIFT); i++) {</div><div class='add'>+		unsigned long vaddr = i &lt;&lt; HPAGE_SHIFT;</div><div class='add'>+		pgd_t *pgd = pgd_offset(current-&gt;mm, vaddr);</div><div class='add'>+		pud_t *pud = pud_offset(pgd, vaddr);</div><div class='add'>+		pte_t *ptep = (pte_t *) pmd_offset(pud, vaddr);</div><div class='ctx'> 		unsigned long pfn = i &lt;&lt; (HPAGE_SHIFT - PAGE_SHIFT);</div><div class='add'>+</div><div class='ctx'> 		if (pfn_valid(pfn))</div><div class='del'>-			__set_pte(&amp;pgtable[i], pfn_pte(pfn, pte));</div><div class='add'>+			__set_pte(ptep, pfn_pte(pfn, pte));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -251,6 +270,7 @@ static void setup_quasi_va_is_pa(void)</div><div class='ctx'> void machine_kexec(struct kimage *image)</div><div class='ctx'> {</div><div class='ctx'> 	void *reboot_code_buffer;</div><div class='add'>+	pte_t *ptep;</div><div class='ctx'> 	void (*rnk)(unsigned long, void *, unsigned long)</div><div class='ctx'> 		__noreturn;</div><div class='ctx'> </div><div class='hunk'>@@ -266,8 +286,10 @@ void machine_kexec(struct kimage *image)</div><div class='ctx'> 	 */</div><div class='ctx'> 	homecache_change_page_home(image-&gt;control_code_page, 0,</div><div class='ctx'> 				   smp_processor_id());</div><div class='del'>-	reboot_code_buffer = vmap(&amp;image-&gt;control_code_page, 1, 0,</div><div class='del'>-				  __pgprot(_PAGE_KERNEL | _PAGE_EXECUTABLE));</div><div class='add'>+	reboot_code_buffer = page_address(image-&gt;control_code_page);</div><div class='add'>+	BUG_ON(reboot_code_buffer == NULL);</div><div class='add'>+	ptep = virt_to_pte(NULL, (unsigned long)reboot_code_buffer);</div><div class='add'>+	__set_pte(ptep, pte_mkexec(*ptep));</div><div class='ctx'> 	memcpy(reboot_code_buffer, relocate_new_kernel,</div><div class='ctx'> 	       relocate_new_kernel_size);</div><div class='ctx'> 	__flush_icache_range(</div><div class='head'>diff --git a/arch/tile/kernel/module.c b/arch/tile/kernel/module.c<br/>index 98d476920106..001cbfa10ac6 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/module.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/module.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/module.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/module.c</a></div><div class='hunk'>@@ -159,7 +159,17 @@ int apply_relocate_add(Elf_Shdr *sechdrs,</div><div class='ctx'> </div><div class='ctx'> 		switch (ELF_R_TYPE(rel[i].r_info)) {</div><div class='ctx'> </div><div class='del'>-#define MUNGE(func) (*location = ((*location &amp; ~func(-1)) | func(value)))</div><div class='add'>+#ifdef __LITTLE_ENDIAN</div><div class='add'>+# define MUNGE(func) \</div><div class='add'>+	(*location = ((*location &amp; ~func(-1)) | func(value)))</div><div class='add'>+#else</div><div class='add'>+/*</div><div class='add'>+ * Instructions are always little-endian, so when we read them as data,</div><div class='add'>+ * we have to swap them around before and after modifying them.</div><div class='add'>+ */</div><div class='add'>+# define MUNGE(func) \</div><div class='add'>+	(*location = swab64((swab64(*location) &amp; ~func(-1)) | func(value)))</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifndef __tilegx__</div><div class='ctx'> 		case R_TILE_32:</div><div class='head'>diff --git a/arch/tile/kernel/proc.c b/arch/tile/kernel/proc.c<br/>index 446a7f52cc11..dafc447b5125 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/proc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/proc.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/proc.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/proc_fs.h&gt;</div><div class='ctx'> #include &lt;linux/sysctl.h&gt;</div><div class='ctx'> #include &lt;linux/hardirq.h&gt;</div><div class='add'>+#include &lt;linux/hugetlb.h&gt;</div><div class='ctx'> #include &lt;linux/mman.h&gt;</div><div class='ctx'> #include &lt;asm/unaligned.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='head'>diff --git a/arch/tile/kernel/process.c b/arch/tile/kernel/process.c<br/>index 2d5ef617bb39..6be799150501 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/process.c</a></div><div class='hunk'>@@ -114,27 +114,10 @@ void cpu_idle(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct thread_info *alloc_thread_info_node(struct task_struct *task, int node)</div><div class='del'>-{</div><div class='del'>-	struct page *page;</div><div class='del'>-	gfp_t flags = GFP_KERNEL;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-	flags |= __GFP_ZERO;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	page = alloc_pages_node(node, flags, THREAD_SIZE_ORDER);</div><div class='del'>-	if (!page)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	return (struct thread_info *)page_address(page);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='del'>- * Free a thread_info node, and all of its derivative</div><div class='del'>- * data structures.</div><div class='add'>+ * Release a thread_info structure</div><div class='ctx'>  */</div><div class='del'>-void free_thread_info(struct thread_info *info)</div><div class='add'>+void arch_release_thread_info(struct thread_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct single_step_state *step_state = info-&gt;step_state;</div><div class='ctx'> </div><div class='hunk'>@@ -145,10 +128,10 @@ void free_thread_info(struct thread_info *info)</div><div class='ctx'> 	 * Calling deactivate here just frees up the data structures.</div><div class='ctx'> 	 * If the task we're freeing held the last reference to a</div><div class='ctx'> 	 * hardwall fd, it would have been released prior to this point</div><div class='del'>-	 * anyway via exit_files(), and "hardwall" would be NULL by now.</div><div class='add'>+	 * anyway via exit_files(), and the hardwall_task.info pointers</div><div class='add'>+	 * would be NULL by now.</div><div class='ctx'> 	 */</div><div class='del'>-	if (info-&gt;task-&gt;thread.hardwall)</div><div class='del'>-		hardwall_deactivate(info-&gt;task);</div><div class='add'>+	hardwall_deactivate_all(info-&gt;task);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	if (step_state) {</div><div class='hunk'>@@ -169,8 +152,6 @@ void free_thread_info(struct thread_info *info)</div><div class='ctx'> 		 */</div><div class='ctx'> 		kfree(step_state);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	free_pages((unsigned long)info, THREAD_SIZE_ORDER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void save_arch_state(struct thread_struct *t);</div><div class='hunk'>@@ -264,7 +245,8 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HARDWALL</div><div class='ctx'> 	/* New thread does not own any networks. */</div><div class='del'>-	p-&gt;thread.hardwall = NULL;</div><div class='add'>+	memset(&amp;p-&gt;thread.hardwall[0], 0,</div><div class='add'>+	       sizeof(struct hardwall_task) * HARDWALL_TYPES);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -534,12 +516,7 @@ struct task_struct *__sched _switch_to(struct task_struct *prev,</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HARDWALL</div><div class='ctx'> 	/* Enable or disable access to the network registers appropriately. */</div><div class='del'>-	if (prev-&gt;thread.hardwall != NULL) {</div><div class='del'>-		if (next-&gt;thread.hardwall == NULL)</div><div class='del'>-			restrict_network_mpls();</div><div class='del'>-	} else if (next-&gt;thread.hardwall != NULL) {</div><div class='del'>-		grant_network_mpls();</div><div class='del'>-	}</div><div class='add'>+	hardwall_switch_tasks(prev, next);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -567,6 +544,10 @@ struct task_struct *__sched _switch_to(struct task_struct *prev,</div><div class='ctx'>  */</div><div class='ctx'> int do_work_pending(struct pt_regs *regs, u32 thread_info_flags)</div><div class='ctx'> {</div><div class='add'>+	/* If we enter in kernel mode, do nothing and exit the caller loop. */</div><div class='add'>+	if (!user_mode(regs))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NEED_RESCHED) {</div><div class='ctx'> 		schedule();</div><div class='ctx'> 		return 1;</div><div class='hunk'>@@ -584,13 +565,10 @@ int do_work_pending(struct pt_regs *regs, u32 thread_info_flags)</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_SINGLESTEP) {</div><div class='del'>-		if ((regs-&gt;ex1 &amp; SPR_EX_CONTEXT_1_1__PL_MASK) == 0)</div><div class='del'>-			single_step_once(regs);</div><div class='add'>+		single_step_once(regs);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	panic("work_pending: bad flags %#x\n", thread_info_flags);</div><div class='head'>diff --git a/arch/tile/kernel/relocate_kernel.S b/arch/tile/kernel/relocate_kernel_32.S<br/>index 010b418515f8..010b418515f8 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/relocate_kernel.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/relocate_kernel.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/relocate_kernel_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/relocate_kernel_32.S</a></div><div class='head'>diff --git a/arch/tile/kernel/relocate_kernel_64.S b/arch/tile/kernel/relocate_kernel_64.S<br/>new file mode 100644<br/>index 000000000000..1c09a4f5a4ea<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/relocate_kernel_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/relocate_kernel_64.S</a></div><div class='hunk'>@@ -0,0 +1,260 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Tilera Corporation. All Rights Reserved.</div><div class='add'>+ *</div><div class='add'>+ *   This program is free software; you can redistribute it and/or</div><div class='add'>+ *   modify it under the terms of the GNU General Public License</div><div class='add'>+ *   as published by the Free Software Foundation, version 2.</div><div class='add'>+ *</div><div class='add'>+ *   This program is distributed in the hope that it will be useful, but</div><div class='add'>+ *   WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or</div><div class='add'>+ *   NON INFRINGEMENT.  See the GNU General Public License for</div><div class='add'>+ *   more details.</div><div class='add'>+ *</div><div class='add'>+ * copy new kernel into place and then call hv_reexec</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;arch/chip.h&gt;</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+#include &lt;hv/hypervisor.h&gt;</div><div class='add'>+</div><div class='add'>+#undef RELOCATE_NEW_KERNEL_VERBOSE</div><div class='add'>+</div><div class='add'>+STD_ENTRY(relocate_new_kernel)</div><div class='add'>+</div><div class='add'>+	move	r30, r0		/* page list */</div><div class='add'>+	move	r31, r1		/* address of page we are on */</div><div class='add'>+	move	r32, r2		/* start address of new kernel */</div><div class='add'>+</div><div class='add'>+	shrui	r1, r1, PAGE_SHIFT</div><div class='add'>+	addi	r1, r1, 1</div><div class='add'>+	shli	sp, r1, PAGE_SHIFT</div><div class='add'>+	addi	sp, sp, -8</div><div class='add'>+	/* we now have a stack (whether we need one or not) */</div><div class='add'>+</div><div class='add'>+	moveli	r40, hw2_last(hv_console_putc)</div><div class='add'>+	shl16insli r40, r40, hw1(hv_console_putc)</div><div class='add'>+	shl16insli r40, r40, hw0(hv_console_putc)</div><div class='add'>+</div><div class='add'>+#ifdef RELOCATE_NEW_KERNEL_VERBOSE</div><div class='add'>+	moveli	r0, 'r'</div><div class='add'>+	jalr	r40</div><div class='add'>+</div><div class='add'>+	moveli	r0, '_'</div><div class='add'>+	jalr	r40</div><div class='add'>+</div><div class='add'>+	moveli	r0, 'n'</div><div class='add'>+	jalr	r40</div><div class='add'>+</div><div class='add'>+	moveli	r0, '_'</div><div class='add'>+	jalr	r40</div><div class='add'>+</div><div class='add'>+	moveli	r0, 'k'</div><div class='add'>+	jalr	r40</div><div class='add'>+</div><div class='add'>+	moveli	r0, '\n'</div><div class='add'>+	jalr	r40</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Throughout this code r30 is pointer to the element of page</div><div class='add'>+	 * list we are working on.</div><div class='add'>+	 *</div><div class='add'>+	 * Normally we get to the next element of the page list by</div><div class='add'>+	 * incrementing r30 by eight.  The exception is if the element</div><div class='add'>+	 * on the page list is an IND_INDIRECTION in which case we use</div><div class='add'>+	 * the element with the low bits masked off as the new value</div><div class='add'>+	 * of r30.</div><div class='add'>+	 *</div><div class='add'>+	 * To get this started, we need the value passed to us (which</div><div class='add'>+	 * will always be an IND_INDIRECTION) in memory somewhere with</div><div class='add'>+	 * r30 pointing at it.  To do that, we push the value passed</div><div class='add'>+	 * to us on the stack and make r30 point to it.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	st	sp, r30</div><div class='add'>+	move	r30, sp</div><div class='add'>+	addi	sp, sp, -16</div><div class='add'>+</div><div class='add'>+#if CHIP_HAS_CBOX_HOME_MAP()</div><div class='add'>+	/*</div><div class='add'>+	 * On TILE-GX, we need to flush all tiles' caches, since we may</div><div class='add'>+	 * have been doing hash-for-home caching there.  Note that we</div><div class='add'>+	 * must do this _after_ we're completely done modifying any memory</div><div class='add'>+	 * other than our output buffer (which we know is locally cached).</div><div class='add'>+	 * We want the caches to be fully clean when we do the reexec,</div><div class='add'>+	 * because the hypervisor is going to do this flush again at that</div><div class='add'>+	 * point, and we don't want that second flush to overwrite any memory.</div><div class='add'>+	 */</div><div class='add'>+	{</div><div class='add'>+	 move	r0, zero	 /* cache_pa */</div><div class='add'>+	 moveli	r1, hw2_last(HV_FLUSH_EVICT_L2)</div><div class='add'>+	}</div><div class='add'>+	{</div><div class='add'>+	 shl16insli	r1, r1, hw1(HV_FLUSH_EVICT_L2)</div><div class='add'>+	 movei	r2, -1		 /* cache_cpumask; -1 means all client tiles */</div><div class='add'>+	}</div><div class='add'>+	{</div><div class='add'>+	 shl16insli	r1, r1, hw0(HV_FLUSH_EVICT_L2)  /* cache_control */</div><div class='add'>+	 move	r3, zero	 /* tlb_va */</div><div class='add'>+	}</div><div class='add'>+	{</div><div class='add'>+	 move	r4, zero	 /* tlb_length */</div><div class='add'>+	 move	r5, zero	 /* tlb_pgsize */</div><div class='add'>+	}</div><div class='add'>+	{</div><div class='add'>+	 move	r6, zero	 /* tlb_cpumask */</div><div class='add'>+	 move	r7, zero	 /* asids */</div><div class='add'>+	}</div><div class='add'>+	{</div><div class='add'>+	 moveli	r20, hw2_last(hv_flush_remote)</div><div class='add'>+	 move	r8, zero	 /* asidcount */</div><div class='add'>+	}</div><div class='add'>+	shl16insli	r20, r20, hw1(hv_flush_remote)</div><div class='add'>+	shl16insli	r20, r20, hw0(hv_flush_remote)</div><div class='add'>+</div><div class='add'>+	jalr	r20</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* r33 is destination pointer, default to zero */</div><div class='add'>+</div><div class='add'>+	moveli	r33, 0</div><div class='add'>+</div><div class='add'>+.Lloop:	ld	r10, r30</div><div class='add'>+</div><div class='add'>+	andi	r9, r10, 0xf	/* low 4 bits tell us what type it is */</div><div class='add'>+	xor	r10, r10, r9	/* r10 is now value with low 4 bits stripped */</div><div class='add'>+</div><div class='add'>+	cmpeqi	r0, r9, 0x1	/* IND_DESTINATION */</div><div class='add'>+	beqzt	r0, .Ltry2</div><div class='add'>+</div><div class='add'>+	move	r33, r10</div><div class='add'>+</div><div class='add'>+#ifdef RELOCATE_NEW_KERNEL_VERBOSE</div><div class='add'>+	moveli	r0, 'd'</div><div class='add'>+	jalr	r40</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	addi	r30, r30, 8</div><div class='add'>+	j	.Lloop</div><div class='add'>+</div><div class='add'>+.Ltry2:</div><div class='add'>+	cmpeqi	r0, r9, 0x2	/* IND_INDIRECTION */</div><div class='add'>+	beqzt	r0, .Ltry4</div><div class='add'>+</div><div class='add'>+	move	r30, r10</div><div class='add'>+</div><div class='add'>+#ifdef RELOCATE_NEW_KERNEL_VERBOSE</div><div class='add'>+	moveli	r0, 'i'</div><div class='add'>+	jalr	r40</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	j	.Lloop</div><div class='add'>+</div><div class='add'>+.Ltry4:</div><div class='add'>+	cmpeqi	r0, r9, 0x4	/* IND_DONE */</div><div class='add'>+	beqzt	r0, .Ltry8</div><div class='add'>+</div><div class='add'>+	mf</div><div class='add'>+</div><div class='add'>+#ifdef RELOCATE_NEW_KERNEL_VERBOSE</div><div class='add'>+	moveli	r0, 'D'</div><div class='add'>+	jalr	r40</div><div class='add'>+	moveli	r0, '\n'</div><div class='add'>+	jalr	r40</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	move	r0, r32</div><div class='add'>+</div><div class='add'>+	moveli	r41, hw2_last(hv_reexec)</div><div class='add'>+	shl16insli	r41, r41, hw1(hv_reexec)</div><div class='add'>+	shl16insli	r41, r41, hw0(hv_reexec)</div><div class='add'>+</div><div class='add'>+	jalr	r41</div><div class='add'>+</div><div class='add'>+	/* we should not get here */</div><div class='add'>+</div><div class='add'>+	moveli	r0, '?'</div><div class='add'>+	jalr	r40</div><div class='add'>+	moveli	r0, '\n'</div><div class='add'>+	jalr	r40</div><div class='add'>+</div><div class='add'>+	j	.Lhalt</div><div class='add'>+</div><div class='add'>+.Ltry8:	cmpeqi	r0, r9, 0x8	/* IND_SOURCE */</div><div class='add'>+	beqz	r0, .Lerr	/* unknown type */</div><div class='add'>+</div><div class='add'>+	/* copy page at r10 to page at r33 */</div><div class='add'>+</div><div class='add'>+	move	r11, r33</div><div class='add'>+</div><div class='add'>+	moveli	r0, hw2_last(PAGE_SIZE)</div><div class='add'>+	shl16insli	r0, r0, hw1(PAGE_SIZE)</div><div class='add'>+	shl16insli	r0, r0, hw0(PAGE_SIZE)</div><div class='add'>+	add	r33, r33, r0</div><div class='add'>+</div><div class='add'>+	/* copy word at r10 to word at r11 until r11 equals r33 */</div><div class='add'>+</div><div class='add'>+	/* We know page size must be multiple of 8, so we can unroll</div><div class='add'>+	 * 8 times safely without any edge case checking.</div><div class='add'>+	 *</div><div class='add'>+	 * Issue a flush of the destination every 8 words to avoid</div><div class='add'>+	 * incoherence when starting the new kernel.  (Now this is</div><div class='add'>+	 * just good paranoia because the hv_reexec call will also</div><div class='add'>+	 * take care of this.)</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+1:</div><div class='add'>+	{ ld	r0, r10; addi	r10, r10, 8 }</div><div class='add'>+	{ st	r11, r0; addi	r11, r11, 8 }</div><div class='add'>+	{ ld	r0, r10; addi	r10, r10, 8 }</div><div class='add'>+	{ st	r11, r0; addi	r11, r11, 8 }</div><div class='add'>+	{ ld	r0, r10; addi	r10, r10, 8 }</div><div class='add'>+	{ st	r11, r0; addi	r11, r11, 8 }</div><div class='add'>+	{ ld	r0, r10; addi	r10, r10, 8 }</div><div class='add'>+	{ st	r11, r0; addi	r11, r11, 8 }</div><div class='add'>+	{ ld	r0, r10; addi	r10, r10, 8 }</div><div class='add'>+	{ st	r11, r0; addi	r11, r11, 8 }</div><div class='add'>+	{ ld	r0, r10; addi	r10, r10, 8 }</div><div class='add'>+	{ st	r11, r0; addi	r11, r11, 8 }</div><div class='add'>+	{ ld	r0, r10; addi	r10, r10, 8 }</div><div class='add'>+	{ st	r11, r0; addi	r11, r11, 8 }</div><div class='add'>+	{ ld	r0, r10; addi	r10, r10, 8 }</div><div class='add'>+	{ st	r11, r0 }</div><div class='add'>+	{ flush r11    ; addi	r11, r11, 8 }</div><div class='add'>+</div><div class='add'>+	cmpeq	r0, r33, r11</div><div class='add'>+	beqzt	r0, 1b</div><div class='add'>+</div><div class='add'>+#ifdef RELOCATE_NEW_KERNEL_VERBOSE</div><div class='add'>+	moveli	r0, 's'</div><div class='add'>+	jalr	r40</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	addi	r30, r30, 8</div><div class='add'>+	j	.Lloop</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+.Lerr:	moveli	r0, 'e'</div><div class='add'>+	jalr	r40</div><div class='add'>+	moveli	r0, 'r'</div><div class='add'>+	jalr	r40</div><div class='add'>+	moveli	r0, 'r'</div><div class='add'>+	jalr	r40</div><div class='add'>+	moveli	r0, '\n'</div><div class='add'>+	jalr	r40</div><div class='add'>+.Lhalt:</div><div class='add'>+	moveli r41, hw2_last(hv_halt)</div><div class='add'>+	shl16insli r41, r41, hw1(hv_halt)</div><div class='add'>+	shl16insli r41, r41, hw0(hv_halt)</div><div class='add'>+</div><div class='add'>+	jalr	r41</div><div class='add'>+	STD_ENDPROC(relocate_new_kernel)</div><div class='add'>+</div><div class='add'>+	.section .rodata,"a"</div><div class='add'>+</div><div class='add'>+	.globl relocate_new_kernel_size</div><div class='add'>+relocate_new_kernel_size:</div><div class='add'>+	.long .Lend_relocate_new_kernel - relocate_new_kernel</div><div class='head'>diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c<br/>index bff23f476110..dd87f3420390 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/setup.c</a></div><div class='hunk'>@@ -28,6 +28,8 @@</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/timex.h&gt;</div><div class='add'>+#include &lt;linux/hugetlb.h&gt;</div><div class='add'>+#include &lt;linux/start_kernel.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='hunk'>@@ -49,9 +51,6 @@ char chip_model[64] __write_once;</div><div class='ctx'> struct pglist_data node_data[MAX_NUMNODES] __read_mostly;</div><div class='ctx'> EXPORT_SYMBOL(node_data);</div><div class='ctx'> </div><div class='del'>-/* We only create bootmem data on node 0. */</div><div class='del'>-static bootmem_data_t __initdata node0_bdata;</div><div class='del'>-</div><div class='ctx'> /* Information on the NUMA nodes that we compute early */</div><div class='ctx'> unsigned long __cpuinitdata node_start_pfn[MAX_NUMNODES];</div><div class='ctx'> unsigned long __cpuinitdata node_end_pfn[MAX_NUMNODES];</div><div class='hunk'>@@ -61,6 +60,22 @@ unsigned long __initdata node_free_pfn[MAX_NUMNODES];</div><div class='ctx'> </div><div class='ctx'> static unsigned long __initdata node_percpu[MAX_NUMNODES];</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * per-CPU stack and boot info.</div><div class='add'>+ */</div><div class='add'>+DEFINE_PER_CPU(unsigned long, boot_sp) =</div><div class='add'>+	(unsigned long)init_stack + THREAD_SIZE;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+DEFINE_PER_CPU(unsigned long, boot_pc) = (unsigned long)start_kernel;</div><div class='add'>+#else</div><div class='add'>+/*</div><div class='add'>+ * The variable must be __initdata since it references __init code.</div><div class='add'>+ * With CONFIG_SMP it is per-cpu data, which is exempt from validation.</div><div class='add'>+ */</div><div class='add'>+unsigned long __initdata boot_pc = (unsigned long)start_kernel;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_HIGHMEM</div><div class='ctx'> /* Page frame index of end of lowmem on each controller. */</div><div class='ctx'> unsigned long __cpuinitdata node_lowmem_end_pfn[MAX_NUMNODES];</div><div class='hunk'>@@ -518,37 +533,96 @@ static void __init setup_memory(void)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init setup_bootmem_allocator(void)</div><div class='add'>+/*</div><div class='add'>+ * On 32-bit machines, we only put bootmem on the low controller,</div><div class='add'>+ * since PAs &gt; 4GB can't be used in bootmem.  In principle one could</div><div class='add'>+ * imagine, e.g., multiple 1 GB controllers all of which could support</div><div class='add'>+ * bootmem, but in practice using controllers this small isn't a</div><div class='add'>+ * particularly interesting scenario, so we just keep it simple and</div><div class='add'>+ * use only the first controller for bootmem on 32-bit machines.</div><div class='add'>+ */</div><div class='add'>+static inline int node_has_bootmem(int nid)</div><div class='ctx'> {</div><div class='del'>-	unsigned long bootmap_size, first_alloc_pfn, last_alloc_pfn;</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='add'>+	return 1;</div><div class='add'>+#else</div><div class='add'>+	return nid == 0;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Provide a node 0 bdata. */</div><div class='del'>-	NODE_DATA(0)-&gt;bdata = &amp;node0_bdata;</div><div class='add'>+static inline unsigned long alloc_bootmem_pfn(int nid,</div><div class='add'>+					      unsigned long size,</div><div class='add'>+					      unsigned long goal)</div><div class='add'>+{</div><div class='add'>+	void *kva = __alloc_bootmem_node(NODE_DATA(nid), size,</div><div class='add'>+					 PAGE_SIZE, goal);</div><div class='add'>+	unsigned long pfn = kaddr_to_pfn(kva);</div><div class='add'>+	BUG_ON(goal &amp;&amp; PFN_PHYS(pfn) != goal);</div><div class='add'>+	return pfn;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PCI</div><div class='del'>-	/* Don't let boot memory alias the PCI region. */</div><div class='del'>-	last_alloc_pfn = min(max_low_pfn, pci_reserve_start_pfn);</div><div class='add'>+static void __init setup_bootmem_allocator_node(int i)</div><div class='add'>+{</div><div class='add'>+	unsigned long start, end, mapsize, mapstart;</div><div class='add'>+</div><div class='add'>+	if (node_has_bootmem(i)) {</div><div class='add'>+		NODE_DATA(i)-&gt;bdata = &amp;bootmem_node_data[i];</div><div class='add'>+	} else {</div><div class='add'>+		/* Share controller zero's bdata for now. */</div><div class='add'>+		NODE_DATA(i)-&gt;bdata = &amp;bootmem_node_data[0];</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Skip up to after the bss in node 0. */</div><div class='add'>+	start = (i == 0) ? min_low_pfn : node_start_pfn[i];</div><div class='add'>+</div><div class='add'>+	/* Only lowmem, if we're a HIGHMEM build. */</div><div class='add'>+#ifdef CONFIG_HIGHMEM</div><div class='add'>+	end = node_lowmem_end_pfn[i];</div><div class='ctx'> #else</div><div class='del'>-	last_alloc_pfn = max_low_pfn;</div><div class='add'>+	end = node_end_pfn[i];</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Initialize the boot-time allocator (with low memory only):</div><div class='del'>-	 * The first argument says where to put the bitmap, and the</div><div class='del'>-	 * second says where the end of allocatable memory is.</div><div class='del'>-	 */</div><div class='del'>-	bootmap_size = init_bootmem(min_low_pfn, last_alloc_pfn);</div><div class='add'>+	/* No memory here. */</div><div class='add'>+	if (end == start)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Figure out where the bootmem bitmap is located. */</div><div class='add'>+	mapsize = bootmem_bootmap_pages(end - start);</div><div class='add'>+	if (i == 0) {</div><div class='add'>+		/* Use some space right before the heap on node 0. */</div><div class='add'>+		mapstart = start;</div><div class='add'>+		start += mapsize;</div><div class='add'>+	} else {</div><div class='add'>+		/* Allocate bitmap on node 0 to avoid page table issues. */</div><div class='add'>+		mapstart = alloc_bootmem_pfn(0, PFN_PHYS(mapsize), 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initialize a node. */</div><div class='add'>+	init_bootmem_node(NODE_DATA(i), mapstart, start, end);</div><div class='ctx'> </div><div class='add'>+	/* Free all the space back into the allocator. */</div><div class='add'>+	free_bootmem(PFN_PHYS(start), PFN_PHYS(end - start));</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_PCI)</div><div class='ctx'> 	/*</div><div class='del'>-	 * Let the bootmem allocator use all the space we've given it</div><div class='del'>-	 * except for its own bitmap.</div><div class='add'>+	 * Throw away any memory aliased by the PCI region.  FIXME: this</div><div class='add'>+	 * is a temporary hack to work around bug 10502, and needs to be</div><div class='add'>+	 * fixed properly.</div><div class='ctx'> 	 */</div><div class='del'>-	first_alloc_pfn = min_low_pfn + PFN_UP(bootmap_size);</div><div class='del'>-	if (first_alloc_pfn &gt;= last_alloc_pfn)</div><div class='del'>-		early_panic("Not enough memory on controller 0 for bootmem\n");</div><div class='add'>+	if (pci_reserve_start_pfn &lt; end &amp;&amp; pci_reserve_end_pfn &gt; start)</div><div class='add'>+		reserve_bootmem(PFN_PHYS(pci_reserve_start_pfn),</div><div class='add'>+				PFN_PHYS(pci_reserve_end_pfn -</div><div class='add'>+					 pci_reserve_start_pfn),</div><div class='add'>+				BOOTMEM_EXCLUSIVE);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	free_bootmem(PFN_PHYS(first_alloc_pfn),</div><div class='del'>-		     PFN_PHYS(last_alloc_pfn - first_alloc_pfn));</div><div class='add'>+static void __init setup_bootmem_allocator(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	for (i = 0; i &lt; MAX_NUMNODES; ++i)</div><div class='add'>+		setup_bootmem_allocator_node(i);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KEXEC</div><div class='ctx'> 	if (crashk_res.start != crashk_res.end)</div><div class='hunk'>@@ -579,14 +653,6 @@ static int __init percpu_size(void)</div><div class='ctx'> 	return size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long alloc_bootmem_pfn(int size, unsigned long goal)</div><div class='del'>-{</div><div class='del'>-	void *kva = __alloc_bootmem(size, PAGE_SIZE, goal);</div><div class='del'>-	unsigned long pfn = kaddr_to_pfn(kva);</div><div class='del'>-	BUG_ON(goal &amp;&amp; PFN_PHYS(pfn) != goal);</div><div class='del'>-	return pfn;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void __init zone_sizes_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long zones_size[MAX_NR_ZONES] = { 0 };</div><div class='hunk'>@@ -624,21 +690,22 @@ static void __init zone_sizes_init(void)</div><div class='ctx'> 		 * though, there'll be no lowmem, so we just alloc_bootmem</div><div class='ctx'> 		 * the memmap.  There will be no percpu memory either.</div><div class='ctx'> 		 */</div><div class='del'>-		if (__pfn_to_highbits(start) == 0) {</div><div class='del'>-			/* In low PAs, allocate via bootmem. */</div><div class='add'>+		if (i != 0 &amp;&amp; cpu_isset(i, isolnodes)) {</div><div class='add'>+			node_memmap_pfn[i] =</div><div class='add'>+				alloc_bootmem_pfn(0, memmap_size, 0);</div><div class='add'>+			BUG_ON(node_percpu[i] != 0);</div><div class='add'>+		} else if (node_has_bootmem(start)) {</div><div class='ctx'> 			unsigned long goal = 0;</div><div class='ctx'> 			node_memmap_pfn[i] =</div><div class='del'>-				alloc_bootmem_pfn(memmap_size, goal);</div><div class='add'>+				alloc_bootmem_pfn(i, memmap_size, 0);</div><div class='ctx'> 			if (kdata_huge)</div><div class='ctx'> 				goal = PFN_PHYS(lowmem_end) - node_percpu[i];</div><div class='ctx'> 			if (node_percpu[i])</div><div class='ctx'> 				node_percpu_pfn[i] =</div><div class='del'>-				    alloc_bootmem_pfn(node_percpu[i], goal);</div><div class='del'>-		} else if (cpu_isset(i, isolnodes)) {</div><div class='del'>-			node_memmap_pfn[i] = alloc_bootmem_pfn(memmap_size, 0);</div><div class='del'>-			BUG_ON(node_percpu[i] != 0);</div><div class='add'>+					alloc_bootmem_pfn(i, node_percpu[i],</div><div class='add'>+							  goal);</div><div class='ctx'> 		} else {</div><div class='del'>-			/* In high PAs, just reserve some pages. */</div><div class='add'>+			/* In non-bootmem zones, just reserve some pages. */</div><div class='ctx'> 			node_memmap_pfn[i] = node_free_pfn[i];</div><div class='ctx'> 			node_free_pfn[i] += PFN_UP(memmap_size);</div><div class='ctx'> 			if (!kdata_huge) {</div><div class='hunk'>@@ -662,16 +729,9 @@ static void __init zone_sizes_init(void)</div><div class='ctx'> 		zones_size[ZONE_NORMAL] = end - start;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Everyone shares node 0's bootmem allocator, but</div><div class='del'>-		 * we use alloc_remap(), above, to put the actual</div><div class='del'>-		 * struct page array on the individual controllers,</div><div class='del'>-		 * which is most of the data that we actually care about.</div><div class='del'>-		 * We can't place bootmem allocators on the other</div><div class='del'>-		 * controllers since the bootmem allocator can only</div><div class='del'>-		 * operate on 32-bit physical addresses.</div><div class='del'>-		 */</div><div class='del'>-		NODE_DATA(i)-&gt;bdata = NODE_DATA(0)-&gt;bdata;</div><div class='add'>+		/* Take zone metadata from controller 0 if we're isolnode. */</div><div class='add'>+		if (node_isset(i, isolnodes))</div><div class='add'>+			NODE_DATA(i)-&gt;bdata = &amp;bootmem_node_data[0];</div><div class='ctx'> </div><div class='ctx'> 		free_area_init_node(i, zones_size, start, NULL);</div><div class='ctx'> 		printk(KERN_DEBUG "  Normal zone: %ld per-cpu pages\n",</div><div class='hunk'>@@ -854,6 +914,22 @@ subsys_initcall(topology_init);</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_NUMA */</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Initialize hugepage support on this cpu.  We do this on all cores</div><div class='add'>+ * early in boot: before argument parsing for the boot cpu, and after</div><div class='add'>+ * argument parsing but before the init functions run on the secondaries.</div><div class='add'>+ * So the values we set up here in the hypervisor may be overridden on</div><div class='add'>+ * the boot cpu as arguments are parsed.</div><div class='add'>+ */</div><div class='add'>+static __cpuinit void init_super_pages(void)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_HUGETLB_SUPER_PAGES</div><div class='add'>+	int i;</div><div class='add'>+	for (i = 0; i &lt; HUGE_SHIFT_ENTRIES; ++i)</div><div class='add'>+		hv_set_pte_super_shift(i, huge_shift[i]);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * setup_cpu() - Do all necessary per-cpu, tile-specific initialization.</div><div class='ctx'>  * @boot: Is this the boot cpu?</div><div class='hunk'>@@ -908,6 +984,8 @@ void __cpuinit setup_cpu(int boot)</div><div class='ctx'> 	/* Reset the network state on this cpu. */</div><div class='ctx'> 	reset_network_state();</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+	init_super_pages();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_BLK_DEV_INITRD</div><div class='hunk'>@@ -1396,13 +1474,13 @@ void __init setup_per_cpu_areas(void)</div><div class='ctx'> 		for (i = 0; i &lt; size; i += PAGE_SIZE, ++pfn, ++pg) {</div><div class='ctx'> </div><div class='ctx'> 			/* Update the vmalloc mapping and page home. */</div><div class='del'>-			pte_t *ptep =</div><div class='del'>-				virt_to_pte(NULL, (unsigned long)ptr + i);</div><div class='add'>+			unsigned long addr = (unsigned long)ptr + i;</div><div class='add'>+			pte_t *ptep = virt_to_pte(NULL, addr);</div><div class='ctx'> 			pte_t pte = *ptep;</div><div class='ctx'> 			BUG_ON(pfn != pte_pfn(pte));</div><div class='ctx'> 			pte = hv_pte_set_mode(pte, HV_PTE_MODE_CACHE_TILE_L3);</div><div class='ctx'> 			pte = set_remote_cache_cpu(pte, cpu);</div><div class='del'>-			set_pte(ptep, pte);</div><div class='add'>+			set_pte_at(&amp;init_mm, addr, ptep, pte);</div><div class='ctx'> </div><div class='ctx'> 			/* Update the lowmem mapping for consistency. */</div><div class='ctx'> 			lowmem_va = (unsigned long)pfn_to_kaddr(pfn);</div><div class='hunk'>@@ -1415,7 +1493,7 @@ void __init setup_per_cpu_areas(void)</div><div class='ctx'> 				BUG_ON(pte_huge(*ptep));</div><div class='ctx'> 			}</div><div class='ctx'> 			BUG_ON(pfn != pte_pfn(*ptep));</div><div class='del'>-			set_pte(ptep, pte);</div><div class='add'>+			set_pte_at(&amp;init_mm, lowmem_va, ptep, pte);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/kernel/signal.c b/arch/tile/kernel/signal.c<br/>index f79d4b88c747..e29b0553211d 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/signal.c</a></div><div class='hunk'>@@ -37,8 +37,6 @@</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_SIG 0</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> SYSCALL_DEFINE3(sigaltstack, const stack_t __user *, uss,</div><div class='ctx'> 		stack_t __user *, uoss, struct pt_regs *, regs)</div><div class='ctx'> {</div><div class='hunk'>@@ -96,7 +94,6 @@ SYSCALL_DEFINE1(rt_sigreturn, struct pt_regs *, regs)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext))</div><div class='hunk'>@@ -242,10 +239,11 @@ give_sigsegv:</div><div class='ctx'>  * OK, we're invoking a handler</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static int handle_signal(unsigned long sig, siginfo_t *info,</div><div class='del'>-			 struct k_sigaction *ka, sigset_t *oldset,</div><div class='add'>+static void handle_signal(unsigned long sig, siginfo_t *info,</div><div class='add'>+			 struct k_sigaction *ka,</div><div class='ctx'> 			 struct pt_regs *regs)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Are we from a system call? */</div><div class='hunk'>@@ -278,15 +276,9 @@ static int handle_signal(unsigned long sig, siginfo_t *info,</div><div class='ctx'> 	else</div><div class='ctx'> #endif</div><div class='ctx'> 		ret = setup_rt_frame(sig, ka, info, oldset, regs);</div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		/* This code is only called from system calls or from</div><div class='del'>-		 * the work_pending path in the return-to-user code, and</div><div class='del'>-		 * either way we can re-enable interrupts unconditionally.</div><div class='del'>-		 */</div><div class='del'>-		block_sigmask(ka, sig);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+	signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -299,7 +291,6 @@ void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * i386 will check if we're coming from kernel mode and bail out</div><div class='hunk'>@@ -308,24 +299,10 @@ void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	 * helpful, we can reinstate the check on "!user_mode(regs)".</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK)</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		/* Whee! Actually deliver the signal.  */</div><div class='del'>-		if (handle_signal(signr, &amp;info, &amp;ka, oldset, regs) == 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * A signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TS_RESTORE_SIGMASK flag.</div><div class='del'>-			 */</div><div class='del'>-			current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		handle_signal(signr, &amp;info, &amp;ka, regs);</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -350,10 +327,7 @@ void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* If there's no signal to deliver, just put the saved sigmask back. */</div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK) {</div><div class='del'>-		current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='ctx'> 	/* Avoid double syscall restart if there are nested signals. */</div><div class='head'>diff --git a/arch/tile/kernel/single_step.c b/arch/tile/kernel/single_step.c<br/>index 89529c9f0605..27742e87e255 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/single_step.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/single_step.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/single_step.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/single_step.c</a></div><div class='hunk'>@@ -172,9 +172,6 @@ static tile_bundle_bits rewrite_load_store_unaligned(</div><div class='ctx'> 		return (tilepro_bundle_bits) 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifndef __LITTLE_ENDIAN</div><div class='del'>-# error We assume little-endian representation with copy_xx_user size 2 here</div><div class='del'>-#endif</div><div class='ctx'> 	/* Handle unaligned load/store */</div><div class='ctx'> 	if (mem_op == MEMOP_LOAD || mem_op == MEMOP_LOAD_POSTINCR) {</div><div class='ctx'> 		unsigned short val_16;</div><div class='hunk'>@@ -195,8 +192,19 @@ static tile_bundle_bits rewrite_load_store_unaligned(</div><div class='ctx'> 			state-&gt;update = 1;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='add'>+		unsigned short val_16;</div><div class='ctx'> 		val = (val_reg == TREG_ZERO) ? 0 : regs-&gt;regs[val_reg];</div><div class='del'>-		err = copy_to_user(addr, &amp;val, size);</div><div class='add'>+		switch (size) {</div><div class='add'>+		case 2:</div><div class='add'>+			val_16 = val;</div><div class='add'>+			err = copy_to_user(addr, &amp;val_16, sizeof(val_16));</div><div class='add'>+			break;</div><div class='add'>+		case 4:</div><div class='add'>+			err = copy_to_user(addr, &amp;val, sizeof(val));</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			BUG();</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (err) {</div><div class='head'>diff --git a/arch/tile/kernel/smp.c b/arch/tile/kernel/smp.c<br/>index 91da0f721958..cbc73a8b8fe1 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/smp.c</a></div><div class='hunk'>@@ -203,7 +203,7 @@ void __init ipi_init(void)</div><div class='ctx'> 		if (hv_get_ipi_pte(tile, KERNEL_PL, &amp;pte) != 0)</div><div class='ctx'> 			panic("Failed to initialize IPI for cpu %d\n", cpu);</div><div class='ctx'> </div><div class='del'>-		offset = hv_pte_get_pfn(pte) &lt;&lt; PAGE_SHIFT;</div><div class='add'>+		offset = PFN_PHYS(pte_pfn(pte));</div><div class='ctx'> 		ipi_mappings[cpu] = ioremap_prot(offset, PAGE_SIZE, pte);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/tile/kernel/smpboot.c b/arch/tile/kernel/smpboot.c<br/>index 172aef7d3159..84873fbe8f27 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/smpboot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/smpboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/smpboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/smpboot.c</a></div><div class='hunk'>@@ -222,7 +222,7 @@ void __cpuinit online_secondary(void)</div><div class='ctx'> 	cpu_idle();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __cpuinit __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='ctx'> 	/* Wait 5s total for all CPUs for them to come online */</div><div class='ctx'> 	static int timeout;</div><div class='head'>diff --git a/arch/tile/kernel/sys.c b/arch/tile/kernel/sys.c<br/>index cb44ba7ccd2d..b08095b402d6 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/sys.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/sys.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/sys.c</a></div><div class='hunk'>@@ -32,11 +32,17 @@</div><div class='ctx'> #include &lt;asm/syscalls.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/homecache.h&gt;</div><div class='add'>+#include &lt;asm/cachectl.h&gt;</div><div class='ctx'> #include &lt;arch/chip.h&gt;</div><div class='ctx'> </div><div class='del'>-SYSCALL_DEFINE0(flush_cache)</div><div class='add'>+SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, len,</div><div class='add'>+		unsigned long, flags)</div><div class='ctx'> {</div><div class='del'>-	homecache_evict(cpumask_of(smp_processor_id()));</div><div class='add'>+	if (flags &amp; DCACHE)</div><div class='add'>+		homecache_evict(cpumask_of(smp_processor_id()));</div><div class='add'>+	if (flags &amp; ICACHE)</div><div class='add'>+		flush_remote(0, HV_FLUSH_EVICT_L1I, mm_cpumask(current-&gt;mm),</div><div class='add'>+			     0, 0, 0, NULL, NULL, 0);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/tile/kernel/sysfs.c b/arch/tile/kernel/sysfs.c<br/>index 71ae728e9d0b..e25b0a89c18f 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/sysfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/sysfs.c</a></div><div class='hunk'>@@ -93,6 +93,10 @@ HV_CONF_ATTR(mezz_part,		HV_CONFSTR_MEZZ_PART_NUM)</div><div class='ctx'> HV_CONF_ATTR(mezz_serial,	HV_CONFSTR_MEZZ_SERIAL_NUM)</div><div class='ctx'> HV_CONF_ATTR(mezz_revision,	HV_CONFSTR_MEZZ_REV)</div><div class='ctx'> HV_CONF_ATTR(mezz_description,	HV_CONFSTR_MEZZ_DESC)</div><div class='add'>+HV_CONF_ATTR(cpumod_part,	HV_CONFSTR_CPUMOD_PART_NUM)</div><div class='add'>+HV_CONF_ATTR(cpumod_serial,	HV_CONFSTR_CPUMOD_SERIAL_NUM)</div><div class='add'>+HV_CONF_ATTR(cpumod_revision,	HV_CONFSTR_CPUMOD_REV)</div><div class='add'>+HV_CONF_ATTR(cpumod_description,HV_CONFSTR_CPUMOD_DESC)</div><div class='ctx'> HV_CONF_ATTR(switch_control,	HV_CONFSTR_SWITCH_CONTROL)</div><div class='ctx'> </div><div class='ctx'> static struct attribute *board_attrs[] = {</div><div class='hunk'>@@ -104,6 +108,10 @@ static struct attribute *board_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_mezz_serial.attr,</div><div class='ctx'> 	&amp;dev_attr_mezz_revision.attr,</div><div class='ctx'> 	&amp;dev_attr_mezz_description.attr,</div><div class='add'>+	&amp;dev_attr_cpumod_part.attr,</div><div class='add'>+	&amp;dev_attr_cpumod_serial.attr,</div><div class='add'>+	&amp;dev_attr_cpumod_revision.attr,</div><div class='add'>+	&amp;dev_attr_cpumod_description.attr,</div><div class='ctx'> 	&amp;dev_attr_switch_control.attr,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/tile/kernel/tlb.c b/arch/tile/kernel/tlb.c<br/>index a5f241c24cac..3fd54d5bbd4c 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/tlb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/tlb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/tlb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/tlb.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/cpumask.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/hugetlb.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/homecache.h&gt;</div><div class='ctx'> #include &lt;hv/hypervisor.h&gt;</div><div class='hunk'>@@ -49,25 +50,25 @@ void flush_tlb_current_task(void)</div><div class='ctx'> 	flush_tlb_mm(current-&gt;mm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void flush_tlb_page_mm(const struct vm_area_struct *vma, struct mm_struct *mm,</div><div class='add'>+void flush_tlb_page_mm(struct vm_area_struct *vma, struct mm_struct *mm,</div><div class='ctx'> 		       unsigned long va)</div><div class='ctx'> {</div><div class='del'>-	unsigned long size = hv_page_size(vma);</div><div class='add'>+	unsigned long size = vma_kernel_pagesize(vma);</div><div class='ctx'> 	int cache = (vma-&gt;vm_flags &amp; VM_EXEC) ? HV_FLUSH_EVICT_L1I : 0;</div><div class='ctx'> 	flush_remote(0, cache, mm_cpumask(mm),</div><div class='ctx'> 		     va, size, size, mm_cpumask(mm), NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void flush_tlb_page(const struct vm_area_struct *vma, unsigned long va)</div><div class='add'>+void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)</div><div class='ctx'> {</div><div class='ctx'> 	flush_tlb_page_mm(vma, vma-&gt;vm_mm, va);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(flush_tlb_page);</div><div class='ctx'> </div><div class='del'>-void flush_tlb_range(const struct vm_area_struct *vma,</div><div class='add'>+void flush_tlb_range(struct vm_area_struct *vma,</div><div class='ctx'> 		     unsigned long start, unsigned long end)</div><div class='ctx'> {</div><div class='del'>-	unsigned long size = hv_page_size(vma);</div><div class='add'>+	unsigned long size = vma_kernel_pagesize(vma);</div><div class='ctx'> 	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='ctx'> 	int cache = (vma-&gt;vm_flags &amp; VM_EXEC) ? HV_FLUSH_EVICT_L1I : 0;</div><div class='ctx'> 	flush_remote(0, cache, mm_cpumask(mm), start, end - start, size,</div><div class='head'>diff --git a/arch/tile/kernel/traps.c b/arch/tile/kernel/traps.c<br/>index 73cff814ac57..5b19a23c8908 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/kernel/traps.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/kernel/traps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/kernel/traps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/kernel/traps.c</a></div><div class='hunk'>@@ -195,6 +195,25 @@ static int special_ill(bundle_bits bundle, int *sigp, int *codep)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const char *const int_name[] = {</div><div class='add'>+	[INT_MEM_ERROR] = "Memory error",</div><div class='add'>+	[INT_ILL] = "Illegal instruction",</div><div class='add'>+	[INT_GPV] = "General protection violation",</div><div class='add'>+	[INT_UDN_ACCESS] = "UDN access",</div><div class='add'>+	[INT_IDN_ACCESS] = "IDN access",</div><div class='add'>+#if CHIP_HAS_SN()</div><div class='add'>+	[INT_SN_ACCESS] = "SN access",</div><div class='add'>+#endif</div><div class='add'>+	[INT_SWINT_3] = "Software interrupt 3",</div><div class='add'>+	[INT_SWINT_2] = "Software interrupt 2",</div><div class='add'>+	[INT_SWINT_0] = "Software interrupt 0",</div><div class='add'>+	[INT_UNALIGN_DATA] = "Unaligned data",</div><div class='add'>+	[INT_DOUBLE_FAULT] = "Double fault",</div><div class='add'>+#ifdef __tilegx__</div><div class='add'>+	[INT_ILL_TRANS] = "Illegal virtual address",</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> void __kprobes do_trap(struct pt_regs *regs, int fault_num,</div><div class='ctx'> 		       unsigned long reason)</div><div class='ctx'> {</div><div class='hunk'>@@ -211,10 +230,17 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,</div><div class='ctx'> 	 * current process and hope for the best.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!user_mode(regs)) {</div><div class='add'>+		const char *name;</div><div class='ctx'> 		if (fixup_exception(regs))  /* only UNALIGN_DATA in practice */</div><div class='ctx'> 			return;</div><div class='del'>-		pr_alert("Kernel took bad trap %d at PC %#lx\n",</div><div class='del'>-		       fault_num, regs-&gt;pc);</div><div class='add'>+		if (fault_num &gt;= 0 &amp;&amp;</div><div class='add'>+		    fault_num &lt; sizeof(int_name)/sizeof(int_name[0]) &amp;&amp;</div><div class='add'>+		    int_name[fault_num] != NULL)</div><div class='add'>+			name = int_name[fault_num];</div><div class='add'>+		else</div><div class='add'>+			name = "Unknown interrupt";</div><div class='add'>+		pr_alert("Kernel took bad trap %d (%s) at PC %#lx\n",</div><div class='add'>+			 fault_num, name, regs-&gt;pc);</div><div class='ctx'> 		if (fault_num == INT_GPV)</div><div class='ctx'> 			pr_alert("GPV_REASON is %#lx\n", reason);</div><div class='ctx'> 		show_regs(regs);</div><div class='head'>diff --git a/arch/tile/lib/atomic_32.c b/arch/tile/lib/atomic_32.c<br/>index 771b251b409d..f5cada70c3c8 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/atomic_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/lib/atomic_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/atomic_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/atomic_32.c</a></div><div class='hunk'>@@ -18,7 +18,6 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='del'>-#include &lt;asm/futex.h&gt;</div><div class='ctx'> #include &lt;arch/chip.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* See &lt;asm/atomic_32.h&gt; */</div><div class='hunk'>@@ -50,7 +49,7 @@ int atomic_locks[PAGE_SIZE / sizeof(int)] __page_aligned_bss;</div><div class='ctx'> </div><div class='ctx'> #endif /* ATOMIC_LOCKS_FOUND_VIA_TABLE() */</div><div class='ctx'> </div><div class='del'>-static inline int *__atomic_hashed_lock(volatile void *v)</div><div class='add'>+int *__atomic_hashed_lock(volatile void *v)</div><div class='ctx'> {</div><div class='ctx'> 	/* NOTE: this code must match "sys_cmpxchg" in kernel/intvec_32.S */</div><div class='ctx'> #if ATOMIC_LOCKS_FOUND_VIA_TABLE()</div><div class='hunk'>@@ -191,47 +190,6 @@ u64 _atomic64_cmpxchg(atomic64_t *v, u64 o, u64 n)</div><div class='ctx'> EXPORT_SYMBOL(_atomic64_cmpxchg);</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static inline int *__futex_setup(int __user *v)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Issue a prefetch to the counter to bring it into cache.</div><div class='del'>-	 * As for __atomic_setup, but we can't do a read into the L1</div><div class='del'>-	 * since it might fault; instead we do a prefetch into the L2.</div><div class='del'>-	 */</div><div class='del'>-	__insn_prefetch(v);</div><div class='del'>-	return __atomic_hashed_lock((int __force *)v);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct __get_user futex_set(u32 __user *v, int i)</div><div class='del'>-{</div><div class='del'>-	return __atomic_xchg((int __force *)v, __futex_setup(v), i);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct __get_user futex_add(u32 __user *v, int n)</div><div class='del'>-{</div><div class='del'>-	return __atomic_xchg_add((int __force *)v, __futex_setup(v), n);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct __get_user futex_or(u32 __user *v, int n)</div><div class='del'>-{</div><div class='del'>-	return __atomic_or((int __force *)v, __futex_setup(v), n);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct __get_user futex_andn(u32 __user *v, int n)</div><div class='del'>-{</div><div class='del'>-	return __atomic_andn((int __force *)v, __futex_setup(v), n);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct __get_user futex_xor(u32 __user *v, int n)</div><div class='del'>-{</div><div class='del'>-	return __atomic_xor((int __force *)v, __futex_setup(v), n);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct __get_user futex_cmpxchg(u32 __user *v, int o, int n)</div><div class='del'>-{</div><div class='del'>-	return __atomic_cmpxchg((int __force *)v, __futex_setup(v), o, n);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * If any of the atomic or futex routines hit a bad address (not in</div><div class='ctx'>  * the page tables at kernel PL) this routine is called.  The futex</div><div class='hunk'>@@ -323,7 +281,4 @@ void __init __init_atomic_per_cpu(void)</div><div class='ctx'> 	BUILD_BUG_ON((PAGE_SIZE &gt;&gt; 3) &gt; ATOMIC_HASH_SIZE);</div><div class='ctx'> </div><div class='ctx'> #endif /* ATOMIC_LOCKS_FOUND_VIA_TABLE() */</div><div class='del'>-</div><div class='del'>-	/* The futex code makes this assumption, so we validate it here. */</div><div class='del'>-	BUILD_BUG_ON(sizeof(atomic_t) != sizeof(int));</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/tile/lib/exports.c b/arch/tile/lib/exports.c<br/>index 2a81d32de0da..dd5f0a33fdaf 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/exports.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/lib/exports.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/exports.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/exports.c</a></div><div class='hunk'>@@ -18,14 +18,6 @@</div><div class='ctx'> </div><div class='ctx'> /* arch/tile/lib/usercopy.S */</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='del'>-EXPORT_SYMBOL(__get_user_1);</div><div class='del'>-EXPORT_SYMBOL(__get_user_2);</div><div class='del'>-EXPORT_SYMBOL(__get_user_4);</div><div class='del'>-EXPORT_SYMBOL(__get_user_8);</div><div class='del'>-EXPORT_SYMBOL(__put_user_1);</div><div class='del'>-EXPORT_SYMBOL(__put_user_2);</div><div class='del'>-EXPORT_SYMBOL(__put_user_4);</div><div class='del'>-EXPORT_SYMBOL(__put_user_8);</div><div class='ctx'> EXPORT_SYMBOL(strnlen_user_asm);</div><div class='ctx'> EXPORT_SYMBOL(strncpy_from_user_asm);</div><div class='ctx'> EXPORT_SYMBOL(clear_user_asm);</div><div class='head'>diff --git a/arch/tile/lib/memchr_64.c b/arch/tile/lib/memchr_64.c<br/>index 84fdc8d8e735..6f867dbf7c56 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/memchr_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/lib/memchr_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/memchr_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/memchr_64.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include "string-endian.h"</div><div class='ctx'> </div><div class='ctx'> void *memchr(const void *s, int c, size_t n)</div><div class='ctx'> {</div><div class='hunk'>@@ -39,11 +40,8 @@ void *memchr(const void *s, int c, size_t n)</div><div class='ctx'> </div><div class='ctx'> 	/* Read the first word, but munge it so that bytes before the array</div><div class='ctx'> 	 * will not match goal.</div><div class='del'>-	 *</div><div class='del'>-	 * Note that this shift count expression works because we know</div><div class='del'>-	 * shift counts are taken mod 64.</div><div class='ctx'> 	 */</div><div class='del'>-	before_mask = (1ULL &lt;&lt; (s_int &lt;&lt; 3)) - 1;</div><div class='add'>+	before_mask = MASK(s_int);</div><div class='ctx'> 	v = (*p | before_mask) ^ (goal &amp; before_mask);</div><div class='ctx'> </div><div class='ctx'> 	/* Compute the address of the last byte. */</div><div class='hunk'>@@ -65,7 +63,7 @@ void *memchr(const void *s, int c, size_t n)</div><div class='ctx'> 	/* We found a match, but it might be in a byte past the end</div><div class='ctx'> 	 * of the array.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = ((char *)p) + (__insn_ctz(bits) &gt;&gt; 3);</div><div class='add'>+	ret = ((char *)p) + (CFZ(bits) &gt;&gt; 3);</div><div class='ctx'> 	return (ret &lt;= last_byte_ptr) ? ret : NULL;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(memchr);</div><div class='head'>diff --git a/arch/tile/lib/memcpy_64.c b/arch/tile/lib/memcpy_64.c<br/>index 3fab9a6a2bbe..c79b8e7c6828 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/memcpy_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/lib/memcpy_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/memcpy_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/memcpy_64.c</a></div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#define __memcpy memcpy</div><div class='ctx'> /* EXPORT_SYMBOL() is in arch/tile/lib/exports.c since this should be asm. */</div><div class='ctx'> </div><div class='ctx'> /* Must be 8 bytes in size. */</div><div class='hunk'>@@ -188,6 +187,7 @@ int USERCOPY_FUNC(void *__restrict dstv, const void *__restrict srcv, size_t n)</div><div class='ctx'> </div><div class='ctx'> 	/* n != 0 if we get here.  Write out any trailing bytes. */</div><div class='ctx'> 	dst1 = (char *)dst8;</div><div class='add'>+#ifndef __BIG_ENDIAN__</div><div class='ctx'> 	if (n &amp; 4) {</div><div class='ctx'> 		ST4((uint32_t *)dst1, final);</div><div class='ctx'> 		dst1 += 4;</div><div class='hunk'>@@ -202,11 +202,30 @@ int USERCOPY_FUNC(void *__restrict dstv, const void *__restrict srcv, size_t n)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (n)</div><div class='ctx'> 		ST1((uint8_t *)dst1, final);</div><div class='add'>+#else</div><div class='add'>+	if (n &amp; 4) {</div><div class='add'>+		ST4((uint32_t *)dst1, final &gt;&gt; 32);</div><div class='add'>+		dst1 += 4;</div><div class='add'>+        }</div><div class='add'>+        else</div><div class='add'>+        {</div><div class='add'>+		final &gt;&gt;= 32;</div><div class='add'>+        }</div><div class='add'>+	if (n &amp; 2) {</div><div class='add'>+		ST2((uint16_t *)dst1, final &gt;&gt; 16);</div><div class='add'>+		dst1 += 2;</div><div class='add'>+        }</div><div class='add'>+        else</div><div class='add'>+        {</div><div class='add'>+		final &gt;&gt;= 16;</div><div class='add'>+        }</div><div class='add'>+	if (n &amp; 1)</div><div class='add'>+		ST1((uint8_t *)dst1, final &gt;&gt; 8);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	return RETVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #ifdef USERCOPY_FUNC</div><div class='ctx'> #undef ST1</div><div class='ctx'> #undef ST2</div><div class='head'>diff --git a/arch/tile/lib/memcpy_tile64.c b/arch/tile/lib/memcpy_tile64.c<br/>index b2fe15e01075..3bc4b4e40d93 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/memcpy_tile64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/lib/memcpy_tile64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/memcpy_tile64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/memcpy_tile64.c</a></div><div class='hunk'>@@ -160,7 +160,7 @@ retry_source:</div><div class='ctx'> 			break;</div><div class='ctx'> 		if (get_remote_cache_cpu(src_pte) == smp_processor_id())</div><div class='ctx'> 			break;</div><div class='del'>-		src_page = pfn_to_page(hv_pte_get_pfn(src_pte));</div><div class='add'>+		src_page = pfn_to_page(pte_pfn(src_pte));</div><div class='ctx'> 		get_page(src_page);</div><div class='ctx'> 		if (pte_val(src_pte) != pte_val(*src_ptep)) {</div><div class='ctx'> 			put_page(src_page);</div><div class='hunk'>@@ -168,7 +168,7 @@ retry_source:</div><div class='ctx'> 		}</div><div class='ctx'> 		if (pte_huge(src_pte)) {</div><div class='ctx'> 			/* Adjust the PTE to correspond to a small page */</div><div class='del'>-			int pfn = hv_pte_get_pfn(src_pte);</div><div class='add'>+			int pfn = pte_pfn(src_pte);</div><div class='ctx'> 			pfn += (((unsigned long)source &amp; (HPAGE_SIZE-1))</div><div class='ctx'> 				&gt;&gt; PAGE_SHIFT);</div><div class='ctx'> 			src_pte = pfn_pte(pfn, src_pte);</div><div class='hunk'>@@ -188,7 +188,7 @@ retry_dest:</div><div class='ctx'> 			put_page(src_page);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		dst_page = pfn_to_page(hv_pte_get_pfn(dst_pte));</div><div class='add'>+		dst_page = pfn_to_page(pte_pfn(dst_pte));</div><div class='ctx'> 		if (dst_page == src_page) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Source and dest are on the same page; this</div><div class='hunk'>@@ -206,7 +206,7 @@ retry_dest:</div><div class='ctx'> 		}</div><div class='ctx'> 		if (pte_huge(dst_pte)) {</div><div class='ctx'> 			/* Adjust the PTE to correspond to a small page */</div><div class='del'>-			int pfn = hv_pte_get_pfn(dst_pte);</div><div class='add'>+			int pfn = pte_pfn(dst_pte);</div><div class='ctx'> 			pfn += (((unsigned long)dest &amp; (HPAGE_SIZE-1))</div><div class='ctx'> 				&gt;&gt; PAGE_SHIFT);</div><div class='ctx'> 			dst_pte = pfn_pte(pfn, dst_pte);</div><div class='head'>diff --git a/arch/tile/lib/strchr_64.c b/arch/tile/lib/strchr_64.c<br/>index 617a9273aaa8..f39f9dc422b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/strchr_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/lib/strchr_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/strchr_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/strchr_64.c</a></div><div class='hunk'>@@ -15,8 +15,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#undef strchr</div><div class='add'>+#include "string-endian.h"</div><div class='ctx'> </div><div class='ctx'> char *strchr(const char *s, int c)</div><div class='ctx'> {</div><div class='hunk'>@@ -33,13 +32,9 @@ char *strchr(const char *s, int c)</div><div class='ctx'> 	 * match neither zero nor goal (we make sure the high bit of each</div><div class='ctx'> 	 * byte is 1, and the low 7 bits are all the opposite of the goal</div><div class='ctx'> 	 * byte).</div><div class='del'>-	 *</div><div class='del'>-	 * Note that this shift count expression works because we know shift</div><div class='del'>-	 * counts are taken mod 64.</div><div class='ctx'> 	 */</div><div class='del'>-	const uint64_t before_mask = (1ULL &lt;&lt; (s_int &lt;&lt; 3)) - 1;</div><div class='del'>-	uint64_t v = (*p | before_mask) ^</div><div class='del'>-		(goal &amp; __insn_v1shrsi(before_mask, 1));</div><div class='add'>+	const uint64_t before_mask = MASK(s_int);</div><div class='add'>+	uint64_t v = (*p | before_mask) ^ (goal &amp; __insn_v1shrui(before_mask, 1));</div><div class='ctx'> </div><div class='ctx'> 	uint64_t zero_matches, goal_matches;</div><div class='ctx'> 	while (1) {</div><div class='hunk'>@@ -55,8 +50,8 @@ char *strchr(const char *s, int c)</div><div class='ctx'> 		v = *++p;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	z = __insn_ctz(zero_matches);</div><div class='del'>-	g = __insn_ctz(goal_matches);</div><div class='add'>+	z = CFZ(zero_matches);</div><div class='add'>+	g = CFZ(goal_matches);</div><div class='ctx'> </div><div class='ctx'> 	/* If we found c before '\0' we got a match. Note that if c == '\0'</div><div class='ctx'> 	 * then g == z, and we correctly return the address of the '\0'</div><div class='head'>diff --git a/arch/tile/lib/string-endian.h b/arch/tile/lib/string-endian.h<br/>new file mode 100644<br/>index 000000000000..c0eed7ce69c3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/string-endian.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/string-endian.h</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Tilera Corporation. All Rights Reserved.</div><div class='add'>+ *</div><div class='add'>+ *   This program is free software; you can redistribute it and/or</div><div class='add'>+ *   modify it under the terms of the GNU General Public License</div><div class='add'>+ *   as published by the Free Software Foundation, version 2.</div><div class='add'>+ *</div><div class='add'>+ *   This program is distributed in the hope that it will be useful, but</div><div class='add'>+ *   WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or</div><div class='add'>+ *   NON INFRINGEMENT.  See the GNU General Public License for</div><div class='add'>+ *   more details.</div><div class='add'>+ *</div><div class='add'>+ * Provide a mask based on the pointer alignment that</div><div class='add'>+ * sets up non-zero bytes before the beginning of the string.</div><div class='add'>+ * The MASK expression works because shift counts are taken mod 64.</div><div class='add'>+ * Also, specify how to count "first" and "last" bits</div><div class='add'>+ * when the bits have been read as a word.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/byteorder.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef __LITTLE_ENDIAN</div><div class='add'>+#define MASK(x) (__insn_shl(1ULL, (x &lt;&lt; 3)) - 1)</div><div class='add'>+#define NULMASK(x) ((2ULL &lt;&lt; x) - 1)</div><div class='add'>+#define CFZ(x) __insn_ctz(x)</div><div class='add'>+#define REVCZ(x) __insn_clz(x)</div><div class='add'>+#else</div><div class='add'>+#define MASK(x) (__insn_shl(-2LL, ((-x &lt;&lt; 3) - 1)))</div><div class='add'>+#define NULMASK(x) (-2LL &lt;&lt; (63 - x))</div><div class='add'>+#define CFZ(x) __insn_clz(x)</div><div class='add'>+#define REVCZ(x) __insn_ctz(x)</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/tile/lib/strlen_64.c b/arch/tile/lib/strlen_64.c<br/>index 1c92d46202a8..9583fc3361fa 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/strlen_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/lib/strlen_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/strlen_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/strlen_64.c</a></div><div class='hunk'>@@ -15,8 +15,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#undef strlen</div><div class='add'>+#include "string-endian.h"</div><div class='ctx'> </div><div class='ctx'> size_t strlen(const char *s)</div><div class='ctx'> {</div><div class='hunk'>@@ -24,15 +23,13 @@ size_t strlen(const char *s)</div><div class='ctx'> 	const uintptr_t s_int = (uintptr_t) s;</div><div class='ctx'> 	const uint64_t *p = (const uint64_t *)(s_int &amp; -8);</div><div class='ctx'> </div><div class='del'>-	/* Read the first word, but force bytes before the string to be nonzero.</div><div class='del'>-	 * This expression works because we know shift counts are taken mod 64.</div><div class='del'>-	 */</div><div class='del'>-	uint64_t v = *p | ((1ULL &lt;&lt; (s_int &lt;&lt; 3)) - 1);</div><div class='add'>+	/* Read and MASK the first word. */</div><div class='add'>+	uint64_t v = *p | MASK(s_int);</div><div class='ctx'> </div><div class='ctx'> 	uint64_t bits;</div><div class='ctx'> 	while ((bits = __insn_v1cmpeqi(v, 0)) == 0)</div><div class='ctx'> 		v = *++p;</div><div class='ctx'> </div><div class='del'>-	return ((const char *)p) + (__insn_ctz(bits) &gt;&gt; 3) - s;</div><div class='add'>+	return ((const char *)p) + (CFZ(bits) &gt;&gt; 3) - s;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(strlen);</div><div class='head'>diff --git a/arch/tile/lib/usercopy_32.S b/arch/tile/lib/usercopy_32.S<br/>index 979f76d83746..b62d002af009 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/usercopy_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/lib/usercopy_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/usercopy_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/usercopy_32.S</a></div><div class='hunk'>@@ -19,82 +19,6 @@</div><div class='ctx'> </div><div class='ctx'> /* Access user memory, but use MMU to avoid propagating kernel exceptions. */</div><div class='ctx'> </div><div class='del'>-	.pushsection .fixup,"ax"</div><div class='del'>-</div><div class='del'>-get_user_fault:</div><div class='del'>-	{ move r0, zero; move r1, zero }</div><div class='del'>-	{ movei r2, -EFAULT; jrp lr }</div><div class='del'>-	ENDPROC(get_user_fault)</div><div class='del'>-</div><div class='del'>-put_user_fault:</div><div class='del'>-	{ movei r0, -EFAULT; jrp lr }</div><div class='del'>-	ENDPROC(put_user_fault)</div><div class='del'>-</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __get_user_N functions take a pointer in r0, and return 0 in r2</div><div class='del'>- * on success, with the value in r0; or else -EFAULT in r2.</div><div class='del'>- */</div><div class='del'>-#define __get_user_N(bytes, LOAD) \</div><div class='del'>-	STD_ENTRY(__get_user_##bytes); \</div><div class='del'>-1:	{ LOAD r0, r0; move r1, zero; move r2, zero }; \</div><div class='del'>-	jrp lr; \</div><div class='del'>-	STD_ENDPROC(__get_user_##bytes); \</div><div class='del'>-	.pushsection __ex_table,"a"; \</div><div class='del'>-	.word 1b, get_user_fault; \</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-__get_user_N(1, lb_u)</div><div class='del'>-__get_user_N(2, lh_u)</div><div class='del'>-__get_user_N(4, lw)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __get_user_8 takes a pointer in r0, and returns 0 in r2</div><div class='del'>- * on success, with the value in r0/r1; or else -EFAULT in r2.</div><div class='del'>- */</div><div class='del'>-	STD_ENTRY(__get_user_8);</div><div class='del'>-1:	{ lw r0, r0; addi r1, r0, 4 };</div><div class='del'>-2:	{ lw r1, r1; move r2, zero };</div><div class='del'>-	jrp lr;</div><div class='del'>-	STD_ENDPROC(__get_user_8);</div><div class='del'>-	.pushsection __ex_table,"a";</div><div class='del'>-	.word 1b, get_user_fault;</div><div class='del'>-	.word 2b, get_user_fault;</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __put_user_N functions take a value in r0 and a pointer in r1,</div><div class='del'>- * and return 0 in r0 on success or -EFAULT on failure.</div><div class='del'>- */</div><div class='del'>-#define __put_user_N(bytes, STORE) \</div><div class='del'>-	STD_ENTRY(__put_user_##bytes); \</div><div class='del'>-1:	{ STORE r1, r0; move r0, zero }; \</div><div class='del'>-	jrp lr; \</div><div class='del'>-	STD_ENDPROC(__put_user_##bytes); \</div><div class='del'>-	.pushsection __ex_table,"a"; \</div><div class='del'>-	.word 1b, put_user_fault; \</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-__put_user_N(1, sb)</div><div class='del'>-__put_user_N(2, sh)</div><div class='del'>-__put_user_N(4, sw)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __put_user_8 takes a value in r0/r1 and a pointer in r2,</div><div class='del'>- * and returns 0 in r0 on success or -EFAULT on failure.</div><div class='del'>- */</div><div class='del'>-STD_ENTRY(__put_user_8)</div><div class='del'>-1:      { sw r2, r0; addi r2, r2, 4 }</div><div class='del'>-2:      { sw r2, r1; move r0, zero }</div><div class='del'>-	jrp lr</div><div class='del'>-	STD_ENDPROC(__put_user_8)</div><div class='del'>-	.pushsection __ex_table,"a"</div><div class='del'>-	.word 1b, put_user_fault</div><div class='del'>-	.word 2b, put_user_fault</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * strnlen_user_asm takes the pointer in r0, and the length bound in r1.</div><div class='ctx'>  * It returns the length, including the terminating NUL, or zero on exception.</div><div class='head'>diff --git a/arch/tile/lib/usercopy_64.S b/arch/tile/lib/usercopy_64.S<br/>index 2ff44f87b78e..adb2dbbc70cd 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/lib/usercopy_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/lib/usercopy_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/lib/usercopy_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/lib/usercopy_64.S</a></div><div class='hunk'>@@ -19,55 +19,6 @@</div><div class='ctx'> </div><div class='ctx'> /* Access user memory, but use MMU to avoid propagating kernel exceptions. */</div><div class='ctx'> </div><div class='del'>-	.pushsection .fixup,"ax"</div><div class='del'>-</div><div class='del'>-get_user_fault:</div><div class='del'>-	{ movei r1, -EFAULT; move r0, zero }</div><div class='del'>-	jrp lr</div><div class='del'>-	ENDPROC(get_user_fault)</div><div class='del'>-</div><div class='del'>-put_user_fault:</div><div class='del'>-	{ movei r0, -EFAULT; jrp lr }</div><div class='del'>-	ENDPROC(put_user_fault)</div><div class='del'>-</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __get_user_N functions take a pointer in r0, and return 0 in r1</div><div class='del'>- * on success, with the value in r0; or else -EFAULT in r1.</div><div class='del'>- */</div><div class='del'>-#define __get_user_N(bytes, LOAD) \</div><div class='del'>-	STD_ENTRY(__get_user_##bytes); \</div><div class='del'>-1:	{ LOAD r0, r0; move r1, zero }; \</div><div class='del'>-	jrp lr; \</div><div class='del'>-	STD_ENDPROC(__get_user_##bytes); \</div><div class='del'>-	.pushsection __ex_table,"a"; \</div><div class='del'>-	.quad 1b, get_user_fault; \</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-__get_user_N(1, ld1u)</div><div class='del'>-__get_user_N(2, ld2u)</div><div class='del'>-__get_user_N(4, ld4u)</div><div class='del'>-__get_user_N(8, ld)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * __put_user_N functions take a value in r0 and a pointer in r1,</div><div class='del'>- * and return 0 in r0 on success or -EFAULT on failure.</div><div class='del'>- */</div><div class='del'>-#define __put_user_N(bytes, STORE) \</div><div class='del'>-	STD_ENTRY(__put_user_##bytes); \</div><div class='del'>-1:	{ STORE r1, r0; move r0, zero }; \</div><div class='del'>-	jrp lr; \</div><div class='del'>-	STD_ENDPROC(__put_user_##bytes); \</div><div class='del'>-	.pushsection __ex_table,"a"; \</div><div class='del'>-	.quad 1b, put_user_fault; \</div><div class='del'>-	.popsection</div><div class='del'>-</div><div class='del'>-__put_user_N(1, st1)</div><div class='del'>-__put_user_N(2, st2)</div><div class='del'>-__put_user_N(4, st4)</div><div class='del'>-__put_user_N(8, st)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * strnlen_user_asm takes the pointer in r0, and the length bound in r1.</div><div class='ctx'>  * It returns the length, including the terminating NUL, or zero on exception.</div><div class='head'>diff --git a/arch/tile/mm/fault.c b/arch/tile/mm/fault.c<br/>index 22e58f51ed23..84ce7abbf5af 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/mm/fault.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/fault.c</a></div><div class='hunk'>@@ -187,7 +187,7 @@ static pgd_t *get_current_pgd(void)</div><div class='ctx'> 	HV_Context ctx = hv_inquire_context();</div><div class='ctx'> 	unsigned long pgd_pfn = ctx.page_table &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	struct page *pgd_page = pfn_to_page(pgd_pfn);</div><div class='del'>-	BUG_ON(PageHighMem(pgd_page));   /* oops, HIGHPTE? */</div><div class='add'>+	BUG_ON(PageHighMem(pgd_page));</div><div class='ctx'> 	return (pgd_t *) __va(ctx.page_table);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -273,11 +273,15 @@ static int handle_page_fault(struct pt_regs *regs,</div><div class='ctx'> 	int si_code;</div><div class='ctx'> 	int is_kernel_mode;</div><div class='ctx'> 	pgd_t *pgd;</div><div class='add'>+	unsigned int flags;</div><div class='ctx'> </div><div class='ctx'> 	/* on TILE, protection faults are always writes */</div><div class='ctx'> 	if (!is_page_fault)</div><div class='ctx'> 		write = 1;</div><div class='ctx'> </div><div class='add'>+	flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |</div><div class='add'>+		 (write ? FAULT_FLAG_WRITE : 0));</div><div class='add'>+</div><div class='ctx'> 	is_kernel_mode = (EX1_PL(regs-&gt;ex1) != USER_PL);</div><div class='ctx'> </div><div class='ctx'> 	tsk = validate_current();</div><div class='hunk'>@@ -382,6 +386,8 @@ static int handle_page_fault(struct pt_regs *regs,</div><div class='ctx'> 			vma = NULL;  /* happy compiler */</div><div class='ctx'> 			goto bad_area_nosemaphore;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+retry:</div><div class='ctx'> 		down_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -429,7 +435,11 @@ good_area:</div><div class='ctx'> 	 * make sure we exit gracefully rather than endlessly redo</div><div class='ctx'> 	 * the fault.</div><div class='ctx'> 	 */</div><div class='del'>-	fault = handle_mm_fault(mm, vma, address, write);</div><div class='add'>+	fault = handle_mm_fault(mm, vma, address, flags);</div><div class='add'>+</div><div class='add'>+	if ((fault &amp; VM_FAULT_RETRY) &amp;&amp; fatal_signal_pending(current))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(fault &amp; VM_FAULT_ERROR)) {</div><div class='ctx'> 		if (fault &amp; VM_FAULT_OOM)</div><div class='ctx'> 			goto out_of_memory;</div><div class='hunk'>@@ -437,10 +447,22 @@ good_area:</div><div class='ctx'> 			goto do_sigbus;</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='del'>-	if (fault &amp; VM_FAULT_MAJOR)</div><div class='del'>-		tsk-&gt;maj_flt++;</div><div class='del'>-	else</div><div class='del'>-		tsk-&gt;min_flt++;</div><div class='add'>+	if (flags &amp; FAULT_FLAG_ALLOW_RETRY) {</div><div class='add'>+		if (fault &amp; VM_FAULT_MAJOR)</div><div class='add'>+			tsk-&gt;maj_flt++;</div><div class='add'>+		else</div><div class='add'>+			tsk-&gt;min_flt++;</div><div class='add'>+		if (fault &amp; VM_FAULT_RETRY) {</div><div class='add'>+			flags &amp;= ~FAULT_FLAG_ALLOW_RETRY;</div><div class='add'>+</div><div class='add'>+			 /*</div><div class='add'>+			  * No need to up_read(&amp;mm-&gt;mmap_sem) as we would</div><div class='add'>+			  * have already released it in __lock_page_or_retry</div><div class='add'>+			  * in mm/filemap.c.</div><div class='add'>+			  */</div><div class='add'>+			goto retry;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> #if CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC()</div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/tile/mm/homecache.c b/arch/tile/mm/homecache.c<br/>index 499f73770b05..dbcbdf7b8aa8 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/mm/homecache.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/mm/homecache.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/mm/homecache.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/homecache.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include &lt;linux/cache.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/hugetlb.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='head'>diff --git a/arch/tile/mm/hugetlbpage.c b/arch/tile/mm/hugetlbpage.c<br/>index 42cfcba4e1ef..812e2d037972 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/mm/hugetlbpage.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/mm/hugetlbpage.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/mm/hugetlbpage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -27,85 +27,161 @@</div><div class='ctx'> #include &lt;linux/mman.h&gt;</div><div class='ctx'> #include &lt;asm/tlb.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_HUGETLB_SUPER_PAGES</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Provide an additional huge page size (in addition to the regular default</div><div class='add'>+ * huge page size) if no "hugepagesz" arguments are specified.</div><div class='add'>+ * Note that it must be smaller than the default huge page size so</div><div class='add'>+ * that it's possible to allocate them on demand from the buddy allocator.</div><div class='add'>+ * You can change this to 64K (on a 16K build), 256K, 1M, or 4M,</div><div class='add'>+ * or not define it at all.</div><div class='add'>+ */</div><div class='add'>+#define ADDITIONAL_HUGE_SIZE (1024 * 1024UL)</div><div class='add'>+</div><div class='add'>+/* "Extra" page-size multipliers, one per level of the page table. */</div><div class='add'>+int huge_shift[HUGE_SHIFT_ENTRIES] = {</div><div class='add'>+#ifdef ADDITIONAL_HUGE_SIZE</div><div class='add'>+#define ADDITIONAL_HUGE_SHIFT __builtin_ctzl(ADDITIONAL_HUGE_SIZE / PAGE_SIZE)</div><div class='add'>+	[HUGE_SHIFT_PAGE] = ADDITIONAL_HUGE_SHIFT</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This routine is a hybrid of pte_alloc_map() and pte_alloc_kernel().</div><div class='add'>+ * It assumes that L2 PTEs are never in HIGHMEM (we don't support that).</div><div class='add'>+ * It locks the user pagetable, and bumps up the mm-&gt;nr_ptes field,</div><div class='add'>+ * but otherwise allocate the page table using the kernel versions.</div><div class='add'>+ */</div><div class='add'>+static pte_t *pte_alloc_hugetlb(struct mm_struct *mm, pmd_t *pmd,</div><div class='add'>+				unsigned long address)</div><div class='add'>+{</div><div class='add'>+	pte_t *new;</div><div class='add'>+</div><div class='add'>+	if (pmd_none(*pmd)) {</div><div class='add'>+		new = pte_alloc_one_kernel(mm, address);</div><div class='add'>+		if (!new)</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		smp_wmb(); /* See comment in __pte_alloc */</div><div class='add'>+</div><div class='add'>+		spin_lock(&amp;mm-&gt;page_table_lock);</div><div class='add'>+		if (likely(pmd_none(*pmd))) {  /* Has another populated it ? */</div><div class='add'>+			mm-&gt;nr_ptes++;</div><div class='add'>+			pmd_populate_kernel(mm, pmd, new);</div><div class='add'>+			new = NULL;</div><div class='add'>+		} else</div><div class='add'>+			VM_BUG_ON(pmd_trans_splitting(*pmd));</div><div class='add'>+		spin_unlock(&amp;mm-&gt;page_table_lock);</div><div class='add'>+		if (new)</div><div class='add'>+			pte_free_kernel(mm, new);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pte_offset_kernel(pmd, address);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> pte_t *huge_pte_alloc(struct mm_struct *mm,</div><div class='ctx'> 		      unsigned long addr, unsigned long sz)</div><div class='ctx'> {</div><div class='ctx'> 	pgd_t *pgd;</div><div class='ctx'> 	pud_t *pud;</div><div class='del'>-	pte_t *pte = NULL;</div><div class='ctx'> </div><div class='del'>-	/* We do not yet support multiple huge page sizes. */</div><div class='del'>-	BUG_ON(sz != PMD_SIZE);</div><div class='add'>+	addr &amp;= -sz;   /* Mask off any low bits in the address. */</div><div class='ctx'> </div><div class='ctx'> 	pgd = pgd_offset(mm, addr);</div><div class='ctx'> 	pud = pud_alloc(mm, pgd, addr);</div><div class='del'>-	if (pud)</div><div class='del'>-		pte = (pte_t *) pmd_alloc(mm, pud, addr);</div><div class='del'>-	BUG_ON(pte &amp;&amp; !pte_none(*pte) &amp;&amp; !pte_huge(*pte));</div><div class='ctx'> </div><div class='del'>-	return pte;</div><div class='add'>+#ifdef CONFIG_HUGETLB_SUPER_PAGES</div><div class='add'>+	if (sz &gt;= PGDIR_SIZE) {</div><div class='add'>+		BUG_ON(sz != PGDIR_SIZE &amp;&amp;</div><div class='add'>+		       sz != PGDIR_SIZE &lt;&lt; huge_shift[HUGE_SHIFT_PGDIR]);</div><div class='add'>+		return (pte_t *)pud;</div><div class='add'>+	} else {</div><div class='add'>+		pmd_t *pmd = pmd_alloc(mm, pud, addr);</div><div class='add'>+		if (sz &gt;= PMD_SIZE) {</div><div class='add'>+			BUG_ON(sz != PMD_SIZE &amp;&amp;</div><div class='add'>+			       sz != (PMD_SIZE &lt;&lt; huge_shift[HUGE_SHIFT_PMD]));</div><div class='add'>+			return (pte_t *)pmd;</div><div class='add'>+		}</div><div class='add'>+		else {</div><div class='add'>+			if (sz != PAGE_SIZE &lt;&lt; huge_shift[HUGE_SHIFT_PAGE])</div><div class='add'>+				panic("Unexpected page size %#lx\n", sz);</div><div class='add'>+			return pte_alloc_hugetlb(mm, pmd, addr);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+#else</div><div class='add'>+	BUG_ON(sz != PMD_SIZE);</div><div class='add'>+	return (pte_t *) pmd_alloc(mm, pud, addr);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)</div><div class='add'>+static pte_t *get_pte(pte_t *base, int index, int level)</div><div class='ctx'> {</div><div class='del'>-	pgd_t *pgd;</div><div class='del'>-	pud_t *pud;</div><div class='del'>-	pmd_t *pmd = NULL;</div><div class='del'>-</div><div class='del'>-	pgd = pgd_offset(mm, addr);</div><div class='del'>-	if (pgd_present(*pgd)) {</div><div class='del'>-		pud = pud_offset(pgd, addr);</div><div class='del'>-		if (pud_present(*pud))</div><div class='del'>-			pmd = pmd_offset(pud, addr);</div><div class='add'>+	pte_t *ptep = base + index;</div><div class='add'>+#ifdef CONFIG_HUGETLB_SUPER_PAGES</div><div class='add'>+	if (!pte_present(*ptep) &amp;&amp; huge_shift[level] != 0) {</div><div class='add'>+		unsigned long mask = -1UL &lt;&lt; huge_shift[level];</div><div class='add'>+		pte_t *super_ptep = base + (index &amp; mask);</div><div class='add'>+		pte_t pte = *super_ptep;</div><div class='add'>+		if (pte_present(pte) &amp;&amp; pte_super(pte))</div><div class='add'>+			ptep = super_ptep;</div><div class='ctx'> 	}</div><div class='del'>-	return (pte_t *) pmd;</div><div class='add'>+#endif</div><div class='add'>+	return ptep;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef HUGETLB_TEST</div><div class='del'>-struct page *follow_huge_addr(struct mm_struct *mm, unsigned long address,</div><div class='del'>-			      int write)</div><div class='add'>+pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)</div><div class='ctx'> {</div><div class='del'>-	unsigned long start = address;</div><div class='del'>-	int length = 1;</div><div class='del'>-	int nr;</div><div class='del'>-	struct page *page;</div><div class='del'>-	struct vm_area_struct *vma;</div><div class='del'>-</div><div class='del'>-	vma = find_vma(mm, addr);</div><div class='del'>-	if (!vma || !is_vm_hugetlb_page(vma))</div><div class='del'>-		return ERR_PTR(-EINVAL);</div><div class='del'>-</div><div class='del'>-	pte = huge_pte_offset(mm, address);</div><div class='add'>+	pgd_t *pgd;</div><div class='add'>+	pud_t *pud;</div><div class='add'>+	pmd_t *pmd;</div><div class='add'>+#ifdef CONFIG_HUGETLB_SUPER_PAGES</div><div class='add'>+	pte_t *pte;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	/* hugetlb should be locked, and hence, prefaulted */</div><div class='del'>-	WARN_ON(!pte || pte_none(*pte));</div><div class='add'>+	/* Get the top-level page table entry. */</div><div class='add'>+	pgd = (pgd_t *)get_pte((pte_t *)mm-&gt;pgd, pgd_index(addr), 0);</div><div class='add'>+	if (!pgd_present(*pgd))</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='del'>-	page = &amp;pte_page(*pte)[vpfn % (HPAGE_SIZE/PAGE_SIZE)];</div><div class='add'>+	/* We don't have four levels. */</div><div class='add'>+	pud = pud_offset(pgd, addr);</div><div class='add'>+#ifndef __PAGETABLE_PUD_FOLDED</div><div class='add'>+# error support fourth page table level</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	WARN_ON(!PageHead(page));</div><div class='add'>+	/* Check for an L0 huge PTE, if we have three levels. */</div><div class='add'>+#ifndef __PAGETABLE_PMD_FOLDED</div><div class='add'>+	if (pud_huge(*pud))</div><div class='add'>+		return (pte_t *)pud;</div><div class='ctx'> </div><div class='del'>-	return page;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int pmd_huge(pmd_t pmd)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	pmd = (pmd_t *)get_pte((pte_t *)pud_page_vaddr(*pud),</div><div class='add'>+			       pmd_index(addr), 1);</div><div class='add'>+	if (!pmd_present(*pmd))</div><div class='add'>+		return NULL;</div><div class='add'>+#else</div><div class='add'>+	pmd = pmd_offset(pud, addr);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-int pud_huge(pud_t pud)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	/* Check for an L1 huge PTE. */</div><div class='add'>+	if (pmd_huge(*pmd))</div><div class='add'>+		return (pte_t *)pmd;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_HUGETLB_SUPER_PAGES</div><div class='add'>+	/* Check for an L2 huge PTE. */</div><div class='add'>+	pte = get_pte((pte_t *)pmd_page_vaddr(*pmd), pte_index(addr), 2);</div><div class='add'>+	if (!pte_present(*pte))</div><div class='add'>+		return NULL;</div><div class='add'>+	if (pte_super(*pte))</div><div class='add'>+		return pte;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address,</div><div class='del'>-			     pmd_t *pmd, int write)</div><div class='del'>-{</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-</div><div class='ctx'> struct page *follow_huge_addr(struct mm_struct *mm, unsigned long address,</div><div class='ctx'> 			      int write)</div><div class='ctx'> {</div><div class='hunk'>@@ -149,8 +225,6 @@ int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #ifdef HAVE_ARCH_HUGETLB_UNMAPPED_AREA</div><div class='ctx'> static unsigned long hugetlb_get_unmapped_area_bottomup(struct file *file,</div><div class='ctx'> 		unsigned long addr, unsigned long len,</div><div class='hunk'>@@ -322,21 +396,102 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,</div><div class='ctx'> 		return hugetlb_get_unmapped_area_topdown(file, addr, len,</div><div class='ctx'> 				pgoff, flags);</div><div class='ctx'> }</div><div class='add'>+#endif /* HAVE_ARCH_HUGETLB_UNMAPPED_AREA */</div><div class='ctx'> </div><div class='del'>-static __init int setup_hugepagesz(char *opt)</div><div class='add'>+#ifdef CONFIG_HUGETLB_SUPER_PAGES</div><div class='add'>+static __init int __setup_hugepagesz(unsigned long ps)</div><div class='ctx'> {</div><div class='del'>-	unsigned long ps = memparse(opt, &amp;opt);</div><div class='del'>-	if (ps == PMD_SIZE) {</div><div class='del'>-		hugetlb_add_hstate(PMD_SHIFT - PAGE_SHIFT);</div><div class='del'>-	} else if (ps == PUD_SIZE) {</div><div class='del'>-		hugetlb_add_hstate(PUD_SHIFT - PAGE_SHIFT);</div><div class='add'>+	int log_ps = __builtin_ctzl(ps);</div><div class='add'>+	int level, base_shift;</div><div class='add'>+</div><div class='add'>+	if ((1UL &lt;&lt; log_ps) != ps || (log_ps &amp; 1) != 0) {</div><div class='add'>+		pr_warn("Not enabling %ld byte huge pages;"</div><div class='add'>+			" must be a power of four.\n", ps);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ps &gt; 64*1024*1024*1024UL) {</div><div class='add'>+		pr_warn("Not enabling %ld MB huge pages;"</div><div class='add'>+			" largest legal value is 64 GB .\n", ps &gt;&gt; 20);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	} else if (ps &gt;= PUD_SIZE) {</div><div class='add'>+		static long hv_jpage_size;</div><div class='add'>+		if (hv_jpage_size == 0)</div><div class='add'>+			hv_jpage_size = hv_sysconf(HV_SYSCONF_PAGE_SIZE_JUMBO);</div><div class='add'>+		if (hv_jpage_size != PUD_SIZE) {</div><div class='add'>+			pr_warn("Not enabling &gt;= %ld MB huge pages:"</div><div class='add'>+				" hypervisor reports size %ld\n",</div><div class='add'>+				PUD_SIZE &gt;&gt; 20, hv_jpage_size);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		level = 0;</div><div class='add'>+		base_shift = PUD_SHIFT;</div><div class='add'>+	} else if (ps &gt;= PMD_SIZE) {</div><div class='add'>+		level = 1;</div><div class='add'>+		base_shift = PMD_SHIFT;</div><div class='add'>+	} else if (ps &gt; PAGE_SIZE) {</div><div class='add'>+		level = 2;</div><div class='add'>+		base_shift = PAGE_SHIFT;</div><div class='ctx'> 	} else {</div><div class='del'>-		pr_err("hugepagesz: Unsupported page size %lu M\n",</div><div class='del'>-			ps &gt;&gt; 20);</div><div class='del'>-		return 0;</div><div class='add'>+		pr_err("hugepagesz: huge page size %ld too small\n", ps);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	return 1;</div><div class='add'>+</div><div class='add'>+	if (log_ps != base_shift) {</div><div class='add'>+		int shift_val = log_ps - base_shift;</div><div class='add'>+		if (huge_shift[level] != 0) {</div><div class='add'>+			int old_shift = base_shift + huge_shift[level];</div><div class='add'>+			pr_warn("Not enabling %ld MB huge pages;"</div><div class='add'>+				" already have size %ld MB.\n",</div><div class='add'>+				ps &gt;&gt; 20, (1UL &lt;&lt; old_shift) &gt;&gt; 20);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		if (hv_set_pte_super_shift(level, shift_val) != 0) {</div><div class='add'>+			pr_warn("Not enabling %ld MB huge pages;"</div><div class='add'>+				" no hypervisor support.\n", ps &gt;&gt; 20);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		printk(KERN_DEBUG "Enabled %ld MB huge pages\n", ps &gt;&gt; 20);</div><div class='add'>+		huge_shift[level] = shift_val;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hugetlb_add_hstate(log_ps - PAGE_SHIFT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool saw_hugepagesz;</div><div class='add'>+</div><div class='add'>+static __init int setup_hugepagesz(char *opt)</div><div class='add'>+{</div><div class='add'>+	if (!saw_hugepagesz) {</div><div class='add'>+		saw_hugepagesz = true;</div><div class='add'>+		memset(huge_shift, 0, sizeof(huge_shift));</div><div class='add'>+	}</div><div class='add'>+	return __setup_hugepagesz(memparse(opt, NULL));</div><div class='ctx'> }</div><div class='ctx'> __setup("hugepagesz=", setup_hugepagesz);</div><div class='ctx'> </div><div class='del'>-#endif /*HAVE_ARCH_HUGETLB_UNMAPPED_AREA*/</div><div class='add'>+#ifdef ADDITIONAL_HUGE_SIZE</div><div class='add'>+/*</div><div class='add'>+ * Provide an additional huge page size if no "hugepagesz" args are given.</div><div class='add'>+ * In that case, all the cores have properly set up their hv super_shift</div><div class='add'>+ * already, but we need to notify the hugetlb code to enable the</div><div class='add'>+ * new huge page size from the Linux point of view.</div><div class='add'>+ */</div><div class='add'>+static __init int add_default_hugepagesz(void)</div><div class='add'>+{</div><div class='add'>+	if (!saw_hugepagesz) {</div><div class='add'>+		BUILD_BUG_ON(ADDITIONAL_HUGE_SIZE &gt;= PMD_SIZE ||</div><div class='add'>+			     ADDITIONAL_HUGE_SIZE &lt;= PAGE_SIZE);</div><div class='add'>+		BUILD_BUG_ON((PAGE_SIZE &lt;&lt; ADDITIONAL_HUGE_SHIFT) !=</div><div class='add'>+			     ADDITIONAL_HUGE_SIZE);</div><div class='add'>+		BUILD_BUG_ON(ADDITIONAL_HUGE_SHIFT &amp; 1);</div><div class='add'>+		hugetlb_add_hstate(ADDITIONAL_HUGE_SHIFT);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+arch_initcall(add_default_hugepagesz);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_HUGETLB_SUPER_PAGES */</div><div class='head'>diff --git a/arch/tile/mm/init.c b/arch/tile/mm/init.c<br/>index 6a9d20ddc34f..630dd2ce2afe 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/mm/init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/mm/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/mm/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/init.c</a></div><div class='hunk'>@@ -82,7 +82,7 @@ static int num_l2_ptes[MAX_NUMNODES];</div><div class='ctx'> </div><div class='ctx'> static void init_prealloc_ptes(int node, int pages)</div><div class='ctx'> {</div><div class='del'>-	BUG_ON(pages &amp; (HV_L2_ENTRIES-1));</div><div class='add'>+	BUG_ON(pages &amp; (PTRS_PER_PTE - 1));</div><div class='ctx'> 	if (pages) {</div><div class='ctx'> 		num_l2_ptes[node] = pages;</div><div class='ctx'> 		l2_ptes[node] = __alloc_bootmem(pages * sizeof(pte_t),</div><div class='hunk'>@@ -131,14 +131,9 @@ static void __init assign_pte(pmd_t *pmd, pte_t *page_table)</div><div class='ctx'> </div><div class='ctx'> #ifdef __tilegx__</div><div class='ctx'> </div><div class='del'>-#if HV_L1_SIZE != HV_L2_SIZE</div><div class='del'>-# error Rework assumption that L1 and L2 page tables are same size.</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* Since pmd_t arrays and pte_t arrays are the same size, just use casts. */</div><div class='ctx'> static inline pmd_t *alloc_pmd(void)</div><div class='ctx'> {</div><div class='del'>-	return (pmd_t *)alloc_pte();</div><div class='add'>+	return __alloc_bootmem(L1_KERNEL_PGTABLE_SIZE, HV_PAGE_TABLE_ALIGN, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void assign_pmd(pud_t *pud, pmd_t *pmd)</div><div class='hunk'>@@ -444,6 +439,7 @@ static pgd_t pgtables[PTRS_PER_PGD]</div><div class='ctx'>  */</div><div class='ctx'> static void __init kernel_physical_mapping_init(pgd_t *pgd_base)</div><div class='ctx'> {</div><div class='add'>+	unsigned long long irqmask;</div><div class='ctx'> 	unsigned long address, pfn;</div><div class='ctx'> 	pmd_t *pmd;</div><div class='ctx'> 	pte_t *pte;</div><div class='hunk'>@@ -633,10 +629,13 @@ static void __init kernel_physical_mapping_init(pgd_t *pgd_base)</div><div class='ctx'> 	 *  - install pgtables[] as the real page table</div><div class='ctx'> 	 *  - flush the TLB so the new page table takes effect</div><div class='ctx'> 	 */</div><div class='add'>+	irqmask = interrupt_mask_save_mask();</div><div class='add'>+	interrupt_mask_set_mask(-1ULL);</div><div class='ctx'> 	rc = flush_and_install_context(__pa(pgtables),</div><div class='ctx'> 				       init_pgprot((unsigned long)pgtables),</div><div class='ctx'> 				       __get_cpu_var(current_asid),</div><div class='ctx'> 				       cpumask_bits(my_cpu_mask));</div><div class='add'>+	interrupt_mask_restore_mask(irqmask);</div><div class='ctx'> 	BUG_ON(rc != 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Copy the page table back to the normal swapper_pg_dir. */</div><div class='hunk'>@@ -699,6 +698,7 @@ static void __init permanent_kmaps_init(pgd_t *pgd_base)</div><div class='ctx'> #endif /* CONFIG_HIGHMEM */</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> static void __init init_free_pfn_range(unsigned long start, unsigned long end)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long pfn;</div><div class='hunk'>@@ -771,6 +771,7 @@ static void __init set_non_bootmem_pages_init(void)</div><div class='ctx'> 		init_free_pfn_range(start, end);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * paging_init() sets up the page tables - note that all of lowmem is</div><div class='hunk'>@@ -807,7 +808,7 @@ void __init paging_init(void)</div><div class='ctx'> 	 * changing init_mm once we get up and running, and there's no</div><div class='ctx'> 	 * need for e.g. vmalloc_sync_all().</div><div class='ctx'> 	 */</div><div class='del'>-	BUILD_BUG_ON(pgd_index(VMALLOC_START) != pgd_index(VMALLOC_END));</div><div class='add'>+	BUILD_BUG_ON(pgd_index(VMALLOC_START) != pgd_index(VMALLOC_END - 1));</div><div class='ctx'> 	pud = pud_offset(pgd_base + pgd_index(VMALLOC_START), VMALLOC_START);</div><div class='ctx'> 	assign_pmd(pud, alloc_pmd());</div><div class='ctx'> #endif</div><div class='hunk'>@@ -859,8 +860,10 @@ void __init mem_init(void)</div><div class='ctx'> 	/* this will put all bootmem onto the freelists */</div><div class='ctx'> 	totalram_pages += free_all_bootmem();</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_64BIT</div><div class='ctx'> 	/* count all remaining LOWMEM and give all HIGHMEM to page allocator */</div><div class='ctx'> 	set_non_bootmem_pages_init();</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	codesize =  (unsigned long)&amp;_etext - (unsigned long)&amp;_text;</div><div class='ctx'> 	datasize =  (unsigned long)&amp;_end - (unsigned long)&amp;_sdata;</div><div class='head'>diff --git a/arch/tile/mm/migrate.h b/arch/tile/mm/migrate.h<br/>index cd45a0837fa6..91683d97917e 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/mm/migrate.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/mm/migrate.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/mm/migrate.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/migrate.h</a></div><div class='hunk'>@@ -24,6 +24,9 @@</div><div class='ctx'> /*</div><div class='ctx'>  * This function is used as a helper when setting up the initial</div><div class='ctx'>  * page table (swapper_pg_dir).</div><div class='add'>+ *</div><div class='add'>+ * You must mask ALL interrupts prior to invoking this code, since</div><div class='add'>+ * you can't legally touch the stack during the cache flush.</div><div class='ctx'>  */</div><div class='ctx'> extern int flush_and_install_context(HV_PhysAddr page_table, HV_PTE access,</div><div class='ctx'> 				     HV_ASID asid,</div><div class='hunk'>@@ -39,6 +42,9 @@ extern int flush_and_install_context(HV_PhysAddr page_table, HV_PTE access,</div><div class='ctx'>  *</div><div class='ctx'>  * Note that any non-NULL pointers must not point to the page that</div><div class='ctx'>  * is handled by the stack_pte itself.</div><div class='add'>+ *</div><div class='add'>+ * You must mask ALL interrupts prior to invoking this code, since</div><div class='add'>+ * you can't legally touch the stack during the cache flush.</div><div class='ctx'>  */</div><div class='ctx'> extern int homecache_migrate_stack_and_flush(pte_t stack_pte, unsigned long va,</div><div class='ctx'> 				     size_t length, pte_t *stack_ptep,</div><div class='head'>diff --git a/arch/tile/mm/migrate_32.S b/arch/tile/mm/migrate_32.S<br/>index ac01a7cdf77f..5305814bf187 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/mm/migrate_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/mm/migrate_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/mm/migrate_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/migrate_32.S</a></div><div class='hunk'>@@ -40,8 +40,7 @@</div><div class='ctx'> #define FRAME_R32	16</div><div class='ctx'> #define FRAME_R33	20</div><div class='ctx'> #define FRAME_R34	24</div><div class='del'>-#define FRAME_R35	28</div><div class='del'>-#define FRAME_SIZE	32</div><div class='add'>+#define FRAME_SIZE	28</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -66,12 +65,11 @@</div><div class='ctx'> #define r_my_cpumask	r5</div><div class='ctx'> </div><div class='ctx'> /* Locals (callee-save); must not be more than FRAME_xxx above. */</div><div class='del'>-#define r_save_ics	r30</div><div class='del'>-#define r_context_lo	r31</div><div class='del'>-#define r_context_hi	r32</div><div class='del'>-#define r_access_lo	r33</div><div class='del'>-#define r_access_hi	r34</div><div class='del'>-#define r_asid		r35</div><div class='add'>+#define r_context_lo	r30</div><div class='add'>+#define r_context_hi	r31</div><div class='add'>+#define r_access_lo	r32</div><div class='add'>+#define r_access_hi	r33</div><div class='add'>+#define r_asid		r34</div><div class='ctx'> </div><div class='ctx'> STD_ENTRY(flush_and_install_context)</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -104,11 +102,7 @@ STD_ENTRY(flush_and_install_context)</div><div class='ctx'> 	 sw r_tmp, r33</div><div class='ctx'> 	 addi r_tmp, sp, FRAME_R34</div><div class='ctx'> 	}</div><div class='del'>-	{</div><div class='del'>-	 sw r_tmp, r34</div><div class='del'>-	 addi r_tmp, sp, FRAME_R35</div><div class='del'>-	}</div><div class='del'>-	sw r_tmp, r35</div><div class='add'>+	sw r_tmp, r34</div><div class='ctx'> </div><div class='ctx'> 	/* Move some arguments to callee-save registers. */</div><div class='ctx'> 	{</div><div class='hunk'>@@ -121,13 +115,6 @@ STD_ENTRY(flush_and_install_context)</div><div class='ctx'> 	}</div><div class='ctx'> 	move r_asid, r_asid_in</div><div class='ctx'> </div><div class='del'>-	/* Disable interrupts, since we can't use our stack. */</div><div class='del'>-	{</div><div class='del'>-	 mfspr r_save_ics, INTERRUPT_CRITICAL_SECTION</div><div class='del'>-	 movei r_tmp, 1</div><div class='del'>-	}</div><div class='del'>-	mtspr INTERRUPT_CRITICAL_SECTION, r_tmp</div><div class='del'>-</div><div class='ctx'> 	/* First, flush our L2 cache. */</div><div class='ctx'> 	{</div><div class='ctx'> 	 move r0, zero  /* cache_pa */</div><div class='hunk'>@@ -163,7 +150,7 @@ STD_ENTRY(flush_and_install_context)</div><div class='ctx'> 	}</div><div class='ctx'> 	{</div><div class='ctx'> 	 move r4, r_asid</div><div class='del'>-	 movei r5, HV_CTX_DIRECTIO</div><div class='add'>+	 moveli r5, HV_CTX_DIRECTIO | CTX_PAGE_FLAG</div><div class='ctx'> 	}</div><div class='ctx'> 	jal hv_install_context</div><div class='ctx'> 	bnz r0, .Ldone</div><div class='hunk'>@@ -175,9 +162,6 @@ STD_ENTRY(flush_and_install_context)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> .Ldone:</div><div class='del'>-	/* Reset interrupts back how they were before. */</div><div class='del'>-	mtspr INTERRUPT_CRITICAL_SECTION, r_save_ics</div><div class='del'>-</div><div class='ctx'> 	/* Restore the callee-saved registers and return. */</div><div class='ctx'> 	addli lr, sp, FRAME_SIZE</div><div class='ctx'> 	{</div><div class='hunk'>@@ -202,10 +186,6 @@ STD_ENTRY(flush_and_install_context)</div><div class='ctx'> 	}</div><div class='ctx'> 	{</div><div class='ctx'> 	 lw r34, r_tmp</div><div class='del'>-	 addli r_tmp, sp, FRAME_R35</div><div class='del'>-	}</div><div class='del'>-	{</div><div class='del'>-	 lw r35, r_tmp</div><div class='ctx'> 	 addi sp, sp, FRAME_SIZE</div><div class='ctx'> 	}</div><div class='ctx'> 	jrp lr</div><div class='head'>diff --git a/arch/tile/mm/migrate_64.S b/arch/tile/mm/migrate_64.S<br/>index e76fea688beb..1d15b10833d1 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/mm/migrate_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/mm/migrate_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/mm/migrate_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/migrate_64.S</a></div><div class='hunk'>@@ -38,8 +38,7 @@</div><div class='ctx'> #define FRAME_R30	16</div><div class='ctx'> #define FRAME_R31	24</div><div class='ctx'> #define FRAME_R32	32</div><div class='del'>-#define FRAME_R33	40</div><div class='del'>-#define FRAME_SIZE	48</div><div class='add'>+#define FRAME_SIZE	40</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -60,10 +59,9 @@</div><div class='ctx'> #define r_my_cpumask	r3</div><div class='ctx'> </div><div class='ctx'> /* Locals (callee-save); must not be more than FRAME_xxx above. */</div><div class='del'>-#define r_save_ics	r30</div><div class='del'>-#define r_context	r31</div><div class='del'>-#define r_access	r32</div><div class='del'>-#define r_asid		r33</div><div class='add'>+#define r_context	r30</div><div class='add'>+#define r_access	r31</div><div class='add'>+#define r_asid		r32</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Caller-save locals and frame constants are the same as</div><div class='hunk'>@@ -93,11 +91,7 @@ STD_ENTRY(flush_and_install_context)</div><div class='ctx'> 	 st r_tmp, r31</div><div class='ctx'> 	 addi r_tmp, sp, FRAME_R32</div><div class='ctx'> 	}</div><div class='del'>-	{</div><div class='del'>-	 st r_tmp, r32</div><div class='del'>-	 addi r_tmp, sp, FRAME_R33</div><div class='del'>-	}</div><div class='del'>-	st r_tmp, r33</div><div class='add'>+	st r_tmp, r32</div><div class='ctx'> </div><div class='ctx'> 	/* Move some arguments to callee-save registers. */</div><div class='ctx'> 	{</div><div class='hunk'>@@ -106,13 +100,6 @@ STD_ENTRY(flush_and_install_context)</div><div class='ctx'> 	}</div><div class='ctx'> 	move r_asid, r_asid_in</div><div class='ctx'> </div><div class='del'>-	/* Disable interrupts, since we can't use our stack. */</div><div class='del'>-	{</div><div class='del'>-	 mfspr r_save_ics, INTERRUPT_CRITICAL_SECTION</div><div class='del'>-	 movei r_tmp, 1</div><div class='del'>-	}</div><div class='del'>-	mtspr INTERRUPT_CRITICAL_SECTION, r_tmp</div><div class='del'>-</div><div class='ctx'> 	/* First, flush our L2 cache. */</div><div class='ctx'> 	{</div><div class='ctx'> 	 move r0, zero  /* cache_pa */</div><div class='hunk'>@@ -147,7 +134,7 @@ STD_ENTRY(flush_and_install_context)</div><div class='ctx'> 	}</div><div class='ctx'> 	{</div><div class='ctx'> 	 move r2, r_asid</div><div class='del'>-	 movei r3, HV_CTX_DIRECTIO</div><div class='add'>+	 moveli r3, HV_CTX_DIRECTIO | CTX_PAGE_FLAG</div><div class='ctx'> 	}</div><div class='ctx'> 	jal hv_install_context</div><div class='ctx'> 	bnez r0, 1f</div><div class='hunk'>@@ -158,10 +145,7 @@ STD_ENTRY(flush_and_install_context)</div><div class='ctx'> 	 jal hv_flush_all</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-1:      /* Reset interrupts back how they were before. */</div><div class='del'>-	mtspr INTERRUPT_CRITICAL_SECTION, r_save_ics</div><div class='del'>-</div><div class='del'>-	/* Restore the callee-saved registers and return. */</div><div class='add'>+1:	/* Restore the callee-saved registers and return. */</div><div class='ctx'> 	addli lr, sp, FRAME_SIZE</div><div class='ctx'> 	{</div><div class='ctx'> 	 ld lr, lr</div><div class='hunk'>@@ -177,10 +161,6 @@ STD_ENTRY(flush_and_install_context)</div><div class='ctx'> 	}</div><div class='ctx'> 	{</div><div class='ctx'> 	 ld r32, r_tmp</div><div class='del'>-	 addli r_tmp, sp, FRAME_R33</div><div class='del'>-	}</div><div class='del'>-	{</div><div class='del'>-	 ld r33, r_tmp</div><div class='ctx'> 	 addi sp, sp, FRAME_SIZE</div><div class='ctx'> 	}</div><div class='ctx'> 	jrp lr</div><div class='head'>diff --git a/arch/tile/mm/pgtable.c b/arch/tile/mm/pgtable.c<br/>index 2410aa899b3e..345edfed9fcd 100644<br/>--- a/<a href='/drm-misc/tree/arch/tile/mm/pgtable.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/tile/mm/pgtable.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/tile/mm/pgtable.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/tile/mm/pgtable.c</a></div><div class='hunk'>@@ -132,15 +132,6 @@ void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t flags)</div><div class='ctx'> 	set_pte_pfn(address, phys &gt;&gt; PAGE_SHIFT, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_HIGHPTE)</div><div class='del'>-pte_t *_pte_offset_map(pmd_t *dir, unsigned long address)</div><div class='del'>-{</div><div class='del'>-	pte_t *pte = kmap_atomic(pmd_page(*dir)) +</div><div class='del'>-		(pmd_ptfn(*dir) &lt;&lt; HV_LOG2_PAGE_TABLE_ALIGN) &amp; ~PAGE_MASK;</div><div class='del'>-	return &amp;pte[pte_index(address)];</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * shatter_huge_page() - ensure a given address is mapped by a small page.</div><div class='ctx'>  *</div><div class='hunk'>@@ -289,33 +280,26 @@ void pgd_free(struct mm_struct *mm, pgd_t *pgd)</div><div class='ctx'> </div><div class='ctx'> #define L2_USER_PGTABLE_PAGES (1 &lt;&lt; L2_USER_PGTABLE_ORDER)</div><div class='ctx'> </div><div class='del'>-struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='add'>+struct page *pgtable_alloc_one(struct mm_struct *mm, unsigned long address,</div><div class='add'>+			       int order)</div><div class='ctx'> {</div><div class='ctx'> 	gfp_t flags = GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO;</div><div class='ctx'> 	struct page *p;</div><div class='del'>-#if L2_USER_PGTABLE_ORDER &gt; 0</div><div class='ctx'> 	int i;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_HIGHPTE</div><div class='del'>-	flags |= __GFP_HIGHMEM;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	p = alloc_pages(flags, L2_USER_PGTABLE_ORDER);</div><div class='ctx'> 	if (p == NULL)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-#if L2_USER_PGTABLE_ORDER &gt; 0</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make every page have a page_count() of one, not just the first.</div><div class='ctx'> 	 * We don't use __GFP_COMP since it doesn't look like it works</div><div class='ctx'> 	 * correctly with tlb_remove_page().</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 1; i &lt; L2_USER_PGTABLE_PAGES; ++i) {</div><div class='add'>+	for (i = 1; i &lt; order; ++i) {</div><div class='ctx'> 		init_page_count(p+i);</div><div class='ctx'> 		inc_zone_page_state(p+i, NR_PAGETABLE);</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	pgtable_page_ctor(p);</div><div class='ctx'> 	return p;</div><div class='hunk'>@@ -326,28 +310,28 @@ struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)</div><div class='ctx'>  * process).  We have to correct whatever pte_alloc_one() did before</div><div class='ctx'>  * returning the pages to the allocator.</div><div class='ctx'>  */</div><div class='del'>-void pte_free(struct mm_struct *mm, struct page *p)</div><div class='add'>+void pgtable_free(struct mm_struct *mm, struct page *p, int order)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	pgtable_page_dtor(p);</div><div class='ctx'> 	__free_page(p);</div><div class='ctx'> </div><div class='del'>-	for (i = 1; i &lt; L2_USER_PGTABLE_PAGES; ++i) {</div><div class='add'>+	for (i = 1; i &lt; order; ++i) {</div><div class='ctx'> 		__free_page(p+i);</div><div class='ctx'> 		dec_zone_page_state(p+i, NR_PAGETABLE);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte,</div><div class='del'>-		    unsigned long address)</div><div class='add'>+void __pgtable_free_tlb(struct mmu_gather *tlb, struct page *pte,</div><div class='add'>+			unsigned long address, int order)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	pgtable_page_dtor(pte);</div><div class='ctx'> 	tlb_remove_page(tlb, pte);</div><div class='ctx'> </div><div class='del'>-	for (i = 1; i &lt; L2_USER_PGTABLE_PAGES; ++i) {</div><div class='add'>+	for (i = 1; i &lt; order; ++i) {</div><div class='ctx'> 		tlb_remove_page(tlb, pte + i);</div><div class='ctx'> 		dec_zone_page_state(pte + i, NR_PAGETABLE);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -490,7 +474,7 @@ void set_pte(pte_t *ptep, pte_t pte)</div><div class='ctx'> /* Can this mm load a PTE with cached_priority set? */</div><div class='ctx'> static inline int mm_is_priority_cached(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='del'>-	return mm-&gt;context.priority_cached;</div><div class='add'>+	return mm-&gt;context.priority_cached != 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -500,8 +484,8 @@ static inline int mm_is_priority_cached(struct mm_struct *mm)</div><div class='ctx'> void start_mm_caching(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	if (!mm_is_priority_cached(mm)) {</div><div class='del'>-		mm-&gt;context.priority_cached = -1U;</div><div class='del'>-		hv_set_caching(-1U);</div><div class='add'>+		mm-&gt;context.priority_cached = -1UL;</div><div class='add'>+		hv_set_caching(-1UL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -516,7 +500,7 @@ void start_mm_caching(struct mm_struct *mm)</div><div class='ctx'>  * Presumably we'll come back later and have more luck and clear</div><div class='ctx'>  * the value then; for now we'll just keep the cache marked for priority.</div><div class='ctx'>  */</div><div class='del'>-static unsigned int update_priority_cached(struct mm_struct *mm)</div><div class='add'>+static unsigned long update_priority_cached(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	if (mm-&gt;context.priority_cached &amp;&amp; down_write_trylock(&amp;mm-&gt;mmap_sem)) {</div><div class='ctx'> 		struct vm_area_struct *vm;</div><div class='head'>diff --git a/arch/um/Kconfig.common b/arch/um/Kconfig.common<br/>index 20a49ba93cb9..cb837c223922 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/Kconfig.common?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/Kconfig.common</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/Kconfig.common?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/Kconfig.common</a></div><div class='hunk'>@@ -10,6 +10,7 @@ config UML</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='ctx'> 	select GENERIC_CPU_DEVICES</div><div class='ctx'> 	select GENERIC_IO</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='ctx'> </div><div class='ctx'> config MMU</div><div class='ctx'> 	bool</div><div class='hunk'>@@ -52,15 +53,6 @@ config GENERIC_BUG</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on BUG</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	bool</div><div class='del'>-	default y</div><div class='del'>-</div><div class='del'>-# Used in kernel/irq/manage.c and include/linux/irq.h</div><div class='del'>-config IRQ_RELEASE_METHOD</div><div class='del'>-	bool</div><div class='del'>-	default y</div><div class='del'>-</div><div class='ctx'> config HZ</div><div class='ctx'> 	int</div><div class='ctx'> 	default 100</div><div class='head'>diff --git a/arch/um/Kconfig.um b/arch/um/Kconfig.um<br/>index 70fd690964e4..bf87f25eb2de 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/Kconfig.um?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/Kconfig.um</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/Kconfig.um?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/Kconfig.um</a></div><div class='hunk'>@@ -10,7 +10,6 @@ config STATIC_LINK</div><div class='ctx'> 	  2.75G) for UML.</div><div class='ctx'> </div><div class='ctx'> source "mm/Kconfig"</div><div class='del'>-source "kernel/time/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config LD_SCRIPT_STATIC</div><div class='ctx'> 	bool</div><div class='head'>diff --git a/arch/um/Makefile b/arch/um/Makefile<br/>index 55c0661e2b5d..097091059aaa 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/Makefile</a></div><div class='hunk'>@@ -121,15 +121,8 @@ LINK_WRAPS = -Wl,--wrap,malloc -Wl,--wrap,free -Wl,--wrap,calloc</div><div class='ctx'> </div><div class='ctx'> LD_FLAGS_CMDLINE = $(foreach opt,$(LDFLAGS),-Wl,$(opt))</div><div class='ctx'> </div><div class='del'>-CFLAGS_vmlinux := $(LINK-y) $(LINK_WRAPS) $(LD_FLAGS_CMDLINE)</div><div class='del'>-define cmd_vmlinux__</div><div class='del'>-	$(CC) $(CFLAGS_vmlinux) -o $@ \</div><div class='del'>-	-Wl,-T,$(vmlinux-lds) $(vmlinux-init) \</div><div class='del'>-	-Wl,--start-group $(vmlinux-main) -Wl,--end-group \</div><div class='del'>-	-lutil \</div><div class='del'>-	$(filter-out $(vmlinux-lds) $(vmlinux-init) $(vmlinux-main) vmlinux.o \</div><div class='del'>-	FORCE ,$^) ; rm -f linux</div><div class='del'>-endef</div><div class='add'>+# Used by link-vmlinux.sh which has special support for um link</div><div class='add'>+export CFLAGS_vmlinux := $(LINK-y) $(LINK_WRAPS) $(LD_FLAGS_CMDLINE)</div><div class='ctx'> </div><div class='ctx'> # When cleaning we don't include .config, so we don't include</div><div class='ctx'> # TT or skas makefiles and don't clean skas_ptregs.h.</div><div class='head'>diff --git a/arch/um/defconfig b/arch/um/defconfig<br/>index fdc97e2c3d73..7823ab12e6a4 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/defconfig</a></div><div class='hunk'>@@ -12,7 +12,6 @@ CONFIG_LOCKDEP_SUPPORT=y</div><div class='ctx'> CONFIG_GENERIC_CALIBRATE_DELAY=y</div><div class='ctx'> CONFIG_GENERIC_BUG=y</div><div class='ctx'> CONFIG_GENERIC_CLOCKEVENTS=y</div><div class='del'>-CONFIG_IRQ_RELEASE_METHOD=y</div><div class='ctx'> CONFIG_HZ=100</div><div class='ctx'> </div><div class='ctx'> #</div><div class='head'>diff --git a/arch/um/drivers/chan_kern.c b/arch/um/drivers/chan_kern.c<br/>index ca4c7ebfd0aa..45e248c2f43c 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/drivers/chan_kern.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/drivers/chan_kern.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/drivers/chan_kern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/drivers/chan_kern.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/tty_flip.h&gt;</div><div class='ctx'> #include "chan.h"</div><div class='ctx'> #include "os.h"</div><div class='add'>+#include "irq_kern.h"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_NOCONFIG_CHAN</div><div class='ctx'> static void *not_configged_init(char *str, int device,</div><div class='hunk'>@@ -213,9 +214,9 @@ void free_irqs(void)</div><div class='ctx'> 		chan = list_entry(ele, struct chan, free_list);</div><div class='ctx'> </div><div class='ctx'> 		if (chan-&gt;input &amp;&amp; chan-&gt;enabled)</div><div class='del'>-			free_irq(chan-&gt;line-&gt;driver-&gt;read_irq, chan);</div><div class='add'>+			um_free_irq(chan-&gt;line-&gt;driver-&gt;read_irq, chan);</div><div class='ctx'> 		if (chan-&gt;output &amp;&amp; chan-&gt;enabled)</div><div class='del'>-			free_irq(chan-&gt;line-&gt;driver-&gt;write_irq, chan);</div><div class='add'>+			um_free_irq(chan-&gt;line-&gt;driver-&gt;write_irq, chan);</div><div class='ctx'> 		chan-&gt;enabled = 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -234,9 +235,9 @@ static void close_one_chan(struct chan *chan, int delay_free_irq)</div><div class='ctx'> 	}</div><div class='ctx'> 	else {</div><div class='ctx'> 		if (chan-&gt;input &amp;&amp; chan-&gt;enabled)</div><div class='del'>-			free_irq(chan-&gt;line-&gt;driver-&gt;read_irq, chan);</div><div class='add'>+			um_free_irq(chan-&gt;line-&gt;driver-&gt;read_irq, chan);</div><div class='ctx'> 		if (chan-&gt;output &amp;&amp; chan-&gt;enabled)</div><div class='del'>-			free_irq(chan-&gt;line-&gt;driver-&gt;write_irq, chan);</div><div class='add'>+			um_free_irq(chan-&gt;line-&gt;driver-&gt;write_irq, chan);</div><div class='ctx'> 		chan-&gt;enabled = 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (chan-&gt;ops-&gt;close != NULL)</div><div class='head'>diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c<br/>index 4ab0d9c0911c..acfd0e0fd0c9 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/drivers/line.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/drivers/line.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/drivers/line.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/drivers/line.c</a></div><div class='hunk'>@@ -699,7 +699,7 @@ struct winch {</div><div class='ctx'> static void __free_winch(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct winch *winch = container_of(work, struct winch, work);</div><div class='del'>-	free_irq(WINCH_IRQ, winch);</div><div class='add'>+	um_free_irq(WINCH_IRQ, winch);</div><div class='ctx'> </div><div class='ctx'> 	if (winch-&gt;pid != -1)</div><div class='ctx'> 		os_kill_process(winch-&gt;pid, 1);</div><div class='head'>diff --git a/arch/um/drivers/mconsole_kern.c b/arch/um/drivers/mconsole_kern.c<br/>index 43b39d61b538..88e466b159dc 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/drivers/mconsole_kern.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/drivers/mconsole_kern.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/drivers/mconsole_kern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/drivers/mconsole_kern.c</a></div><div class='hunk'>@@ -705,6 +705,7 @@ static void stack_proc(void *arg)</div><div class='ctx'> 	struct task_struct *from = current, *to = arg;</div><div class='ctx'> </div><div class='ctx'> 	to-&gt;thread.saved_task = from;</div><div class='add'>+	rcu_switch_from(from);</div><div class='ctx'> 	switch_to(from, to, from);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c<br/>index 95f4416e6d9f..0d60c5685c26 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/drivers/net_kern.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/drivers/net_kern.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/drivers/net_kern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/drivers/net_kern.c</a></div><div class='hunk'>@@ -195,7 +195,7 @@ static int uml_net_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	um_free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 	if (lp-&gt;close != NULL)</div><div class='ctx'> 		(*lp-&gt;close)(lp-&gt;fd, &amp;lp-&gt;user);</div><div class='ctx'> 	lp-&gt;fd = -1;</div><div class='hunk'>@@ -835,7 +835,7 @@ static void close_devices(void)</div><div class='ctx'> 	spin_lock(&amp;opened_lock);</div><div class='ctx'> 	list_for_each(ele, &amp;opened) {</div><div class='ctx'> 		lp = list_entry(ele, struct uml_net_private, list);</div><div class='del'>-		free_irq(lp-&gt;dev-&gt;irq, lp-&gt;dev);</div><div class='add'>+		um_free_irq(lp-&gt;dev-&gt;irq, lp-&gt;dev);</div><div class='ctx'> 		if ((lp-&gt;close != NULL) &amp;&amp; (lp-&gt;fd &gt;= 0))</div><div class='ctx'> 			(*lp-&gt;close)(lp-&gt;fd, &amp;lp-&gt;user);</div><div class='ctx'> 		if (lp-&gt;remove != NULL)</div><div class='head'>diff --git a/arch/um/drivers/port_kern.c b/arch/um/drivers/port_kern.c<br/>index e31680e662a4..11866ffd45a9 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/drivers/port_kern.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/drivers/port_kern.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/drivers/port_kern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/drivers/port_kern.c</a></div><div class='hunk'>@@ -254,7 +254,7 @@ int port_wait(void *data)</div><div class='ctx'> 		 * connection.  Then we loop here throwing out failed</div><div class='ctx'> 		 * connections until a good one is found.</div><div class='ctx'> 		 */</div><div class='del'>-		free_irq(TELNETD_IRQ, conn);</div><div class='add'>+		um_free_irq(TELNETD_IRQ, conn);</div><div class='ctx'> </div><div class='ctx'> 		if (conn-&gt;fd &gt;= 0)</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/arch/um/drivers/xterm_kern.c b/arch/um/drivers/xterm_kern.c<br/>index 8bd130f0bda3..b68bbe269e01 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/drivers/xterm_kern.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/drivers/xterm_kern.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/drivers/xterm_kern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/drivers/xterm_kern.c</a></div><div class='hunk'>@@ -65,7 +65,7 @@ int xterm_fd(int socket, int *pid_out)</div><div class='ctx'> 	 * isn't set) this will hang... */</div><div class='ctx'> 	wait_for_completion(&amp;data-&gt;ready);</div><div class='ctx'> </div><div class='del'>-	free_irq(XTERM_IRQ, data);</div><div class='add'>+	um_free_irq(XTERM_IRQ, data);</div><div class='ctx'> </div><div class='ctx'> 	ret = data-&gt;new_fd;</div><div class='ctx'> 	*pid_out = data-&gt;pid;</div><div class='head'>diff --git a/arch/um/include/asm/kvm_para.h b/arch/um/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/um/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/um/include/asm/pgtable.h b/arch/um/include/asm/pgtable.h<br/>index 6a3f9845743e..5888f1b83477 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/include/asm/pgtable.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/include/asm/pgtable.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/include/asm/pgtable.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/include/asm/pgtable.h</a></div><div class='hunk'>@@ -273,6 +273,12 @@ static inline void set_pte(pte_t *pteptr, pte_t pteval)</div><div class='ctx'> }</div><div class='ctx'> #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)</div><div class='ctx'> </div><div class='add'>+#define __HAVE_ARCH_PTE_SAME</div><div class='add'>+static inline int pte_same(pte_t pte_a, pte_t pte_b)</div><div class='add'>+{</div><div class='add'>+	return !((pte_val(pte_a) ^ pte_val(pte_b)) &amp; ~_PAGE_NEWPAGE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Conversion functions: convert a page and protection to a page entry,</div><div class='ctx'>  * and a page entry and page directory to the page they refer to.</div><div class='hunk'>@@ -348,11 +354,11 @@ extern pte_t *virt_to_pte(struct mm_struct *mm, unsigned long addr);</div><div class='ctx'> #define update_mmu_cache(vma,address,ptep) do ; while (0)</div><div class='ctx'> </div><div class='ctx'> /* Encode and de-code a swap entry */</div><div class='del'>-#define __swp_type(x)			(((x).val &gt;&gt; 4) &amp; 0x3f)</div><div class='add'>+#define __swp_type(x)			(((x).val &gt;&gt; 5) &amp; 0x1f)</div><div class='ctx'> #define __swp_offset(x)			((x).val &gt;&gt; 11)</div><div class='ctx'> </div><div class='ctx'> #define __swp_entry(type, offset) \</div><div class='del'>-	((swp_entry_t) { ((type) &lt;&lt; 4) | ((offset) &lt;&lt; 11) })</div><div class='add'>+	((swp_entry_t) { ((type) &lt;&lt; 5) | ((offset) &lt;&lt; 11) })</div><div class='ctx'> #define __pte_to_swp_entry(pte) \</div><div class='ctx'> 	((swp_entry_t) { pte_val(pte_mkuptodate(pte)) })</div><div class='ctx'> #define __swp_entry_to_pte(x)		((pte_t) { (x).val })</div><div class='head'>diff --git a/arch/um/include/asm/processor-generic.h b/arch/um/include/asm/processor-generic.h<br/>index 98d01bc4fa92..69f1c57a8d0d 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/include/asm/processor-generic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/include/asm/processor-generic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/include/asm/processor-generic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/include/asm/processor-generic.h</a></div><div class='hunk'>@@ -68,19 +68,12 @@ struct thread_struct {</div><div class='ctx'> 	.request		= { 0 } \</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern struct task_struct *alloc_task_struct_node(int node);</div><div class='del'>-</div><div class='ctx'> static inline void release_thread(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);</div><div class='ctx'> </div><div class='del'>-static inline void prepare_to_copy(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> extern unsigned long thread_saved_pc(struct task_struct *t);</div><div class='ctx'> </div><div class='ctx'> static inline void mm_copy_segments(struct mm_struct *from_mm,</div><div class='head'>diff --git a/arch/um/include/asm/thread_info.h b/arch/um/include/asm/thread_info.h<br/>index 200c4ab1240c..c04e5ab68f56 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/include/asm/thread_info.h</a></div><div class='hunk'>@@ -71,6 +71,7 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> #define TIF_MEMDIE		5	/* is terminating due to OOM killer */</div><div class='ctx'> #define TIF_SYSCALL_AUDIT	6</div><div class='ctx'> #define TIF_RESTORE_SIGMASK	7</div><div class='add'>+#define TIF_NOTIFY_RESUME	8</div><div class='ctx'> </div><div class='ctx'> #define _TIF_SYSCALL_TRACE	(1 &lt;&lt; TIF_SYSCALL_TRACE)</div><div class='ctx'> #define _TIF_SIGPENDING		(1 &lt;&lt; TIF_SIGPENDING)</div><div class='hunk'>@@ -78,6 +79,5 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> #define _TIF_POLLING_NRFLAG     (1 &lt;&lt; TIF_POLLING_NRFLAG)</div><div class='ctx'> #define _TIF_MEMDIE		(1 &lt;&lt; TIF_MEMDIE)</div><div class='ctx'> #define _TIF_SYSCALL_AUDIT	(1 &lt;&lt; TIF_SYSCALL_AUDIT)</div><div class='del'>-#define _TIF_RESTORE_SIGMASK	(1 &lt;&lt; TIF_RESTORE_SIGMASK)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/um/include/shared/frame_kern.h b/arch/um/include/shared/frame_kern.h<br/>index 76078490c258..e584e40ee832 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/include/shared/frame_kern.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/include/shared/frame_kern.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/include/shared/frame_kern.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/include/shared/frame_kern.h</a></div><div class='hunk'>@@ -6,9 +6,6 @@</div><div class='ctx'> #ifndef __FRAME_KERN_H_</div><div class='ctx'> #define __FRAME_KERN_H_</div><div class='ctx'> </div><div class='del'>-#define _S(nr) (1&lt;&lt;((nr)-1))</div><div class='del'>-#define _BLOCKABLE (~(_S(SIGKILL) | _S(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> extern int setup_signal_stack_sc(unsigned long stack_top, int sig, </div><div class='ctx'> 				 struct k_sigaction *ka,</div><div class='ctx'> 				 struct pt_regs *regs, </div><div class='head'>diff --git a/arch/um/include/shared/irq_kern.h b/arch/um/include/shared/irq_kern.h<br/>index b05d22f3d84e..7a5bfa6291b8 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/include/shared/irq_kern.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/include/shared/irq_kern.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/include/shared/irq_kern.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/include/shared/irq_kern.h</a></div><div class='hunk'>@@ -13,6 +13,6 @@ extern int um_request_irq(unsigned int irq, int fd, int type,</div><div class='ctx'> 			  irq_handler_t handler,</div><div class='ctx'> 			  unsigned long irqflags,  const char * devname,</div><div class='ctx'> 			  void *dev_id);</div><div class='del'>-</div><div class='add'>+void um_free_irq(unsigned int irq, void *dev);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/um/kernel/Makefile b/arch/um/kernel/Makefile<br/>index 65a1c3d690ea..babe21826e3e 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/Makefile</a></div><div class='hunk'>@@ -10,7 +10,7 @@ CPPFLAGS_vmlinux.lds := -DSTART=$(LDS_START)		\</div><div class='ctx'> extra-y := vmlinux.lds</div><div class='ctx'> clean-files :=</div><div class='ctx'> </div><div class='del'>-obj-y = config.o exec.o exitcode.o init_task.o irq.o ksyms.o mem.o \</div><div class='add'>+obj-y = config.o exec.o exitcode.o irq.o ksyms.o mem.o \</div><div class='ctx'> 	physmem.o process.o ptrace.o reboot.o sigio.o \</div><div class='ctx'> 	signal.o smp.o syscall.o sysrq.o time.o tlb.o trap.o \</div><div class='ctx'> 	um_arch.o umid.o skas/</div><div class='head'>diff --git a/arch/um/kernel/init_task.c b/arch/um/kernel/init_task.c<br/>deleted file mode 100644<br/>index ddc9698b66ed..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,38 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,intel.linux}.com)</div><div class='del'>- * Licensed under the GPL</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include "linux/sched.h"</div><div class='del'>-#include "linux/init_task.h"</div><div class='del'>-#include "linux/fs.h"</div><div class='del'>-#include "linux/module.h"</div><div class='del'>-#include "linux/mqueue.h"</div><div class='del'>-#include "asm/uaccess.h"</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-union thread_union cpu0_irqstack</div><div class='del'>-	__attribute__((__section__(".data..init_irqstack"))) =</div><div class='del'>-		{ INIT_THREAD_INFO(init_task) };</div><div class='head'>diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c<br/>index 71b8c947e5ef..00506c3d5d6e 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/kernel/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/irq.c</a></div><div class='hunk'>@@ -297,6 +297,13 @@ unsigned int do_IRQ(int irq, struct uml_pt_regs *regs)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void um_free_irq(unsigned int irq, void *dev)</div><div class='add'>+{</div><div class='add'>+	free_irq_by_irq_and_dev(irq, dev);</div><div class='add'>+	free_irq(irq, dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(um_free_irq);</div><div class='add'>+</div><div class='ctx'> int um_request_irq(unsigned int irq, int fd, int type,</div><div class='ctx'> 		   irq_handler_t handler,</div><div class='ctx'> 		   unsigned long irqflags, const char * devname,</div><div class='hunk'>@@ -327,7 +334,6 @@ static void dummy(struct irq_data *d)</div><div class='ctx'> /* This is used for everything else than the timer. */</div><div class='ctx'> static struct irq_chip normal_irq_type = {</div><div class='ctx'> 	.name = "SIGIO",</div><div class='del'>-	.release = free_irq_by_irq_and_dev,</div><div class='ctx'> 	.irq_disable = dummy,</div><div class='ctx'> 	.irq_enable = dummy,</div><div class='ctx'> 	.irq_ack = dummy,</div><div class='hunk'>@@ -335,7 +341,6 @@ static struct irq_chip normal_irq_type = {</div><div class='ctx'> </div><div class='ctx'> static struct irq_chip SIGVTALRM_irq_type = {</div><div class='ctx'> 	.name = "SIGVTALRM",</div><div class='del'>-	.release = free_irq_by_irq_and_dev,</div><div class='ctx'> 	.irq_disable = dummy,</div><div class='ctx'> 	.irq_enable = dummy,</div><div class='ctx'> 	.irq_ack = dummy,</div><div class='head'>diff --git a/arch/um/kernel/process.c b/arch/um/kernel/process.c<br/>index 2b73dedb44ca..ccb9a9d283f1 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/process.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/tick.h&gt;</div><div class='ctx'> #include &lt;linux/threads.h&gt;</div><div class='add'>+#include &lt;linux/tracehook.h&gt;</div><div class='ctx'> #include &lt;asm/current.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='hunk'>@@ -114,8 +115,10 @@ void interrupt_end(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (need_resched())</div><div class='ctx'> 		schedule();</div><div class='del'>-	if (test_tsk_thread_flag(current, TIF_SIGPENDING))</div><div class='add'>+	if (test_thread_flag(TIF_SIGPENDING))</div><div class='ctx'> 		do_signal();</div><div class='add'>+	if (test_and_clear_thread_flag(TIF_NOTIFY_RESUME))</div><div class='add'>+		tracehook_notify_resume(&amp;current-&gt;thread.regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void exit_thread(void)</div><div class='hunk'>@@ -190,7 +193,7 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,</div><div class='ctx'> 	if (current-&gt;thread.forking) {</div><div class='ctx'> 	  	memcpy(&amp;p-&gt;thread.regs.regs, &amp;regs-&gt;regs,</div><div class='ctx'> 		       sizeof(p-&gt;thread.regs.regs));</div><div class='del'>-		REGS_SET_SYSCALL_RETURN(p-&gt;thread.regs.regs.gp, 0);</div><div class='add'>+		UPT_SET_SYSCALL_RETURN(&amp;p-&gt;thread.regs.regs, 0);</div><div class='ctx'> 		if (sp != 0)</div><div class='ctx'> 			REGS_SP(p-&gt;thread.regs.regs.gp) = sp;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/um/kernel/reboot.c b/arch/um/kernel/reboot.c<br/>index 4d93dff6b371..3d15243ce692 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/reboot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/kernel/reboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/reboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/reboot.c</a></div><div class='hunk'>@@ -4,7 +4,9 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "linux/sched.h"</div><div class='add'>+#include "linux/spinlock.h"</div><div class='ctx'> #include "linux/slab.h"</div><div class='add'>+#include "linux/oom.h"</div><div class='ctx'> #include "kern_util.h"</div><div class='ctx'> #include "os.h"</div><div class='ctx'> #include "skas.h"</div><div class='hunk'>@@ -22,13 +24,18 @@ static void kill_off_processes(void)</div><div class='ctx'> 		struct task_struct *p;</div><div class='ctx'> 		int pid;</div><div class='ctx'> </div><div class='add'>+		read_lock(&amp;tasklist_lock);</div><div class='ctx'> 		for_each_process(p) {</div><div class='del'>-			if (p-&gt;mm == NULL)</div><div class='del'>-				continue;</div><div class='add'>+			struct task_struct *t;</div><div class='ctx'> </div><div class='del'>-			pid = p-&gt;mm-&gt;context.id.u.pid;</div><div class='add'>+			t = find_lock_task_mm(p);</div><div class='add'>+			if (!t)</div><div class='add'>+				continue;</div><div class='add'>+			pid = t-&gt;mm-&gt;context.id.u.pid;</div><div class='add'>+			task_unlock(t);</div><div class='ctx'> 			os_kill_ptraced_process(pid, 1);</div><div class='ctx'> 		}</div><div class='add'>+		read_unlock(&amp;tasklist_lock);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/um/kernel/signal.c b/arch/um/kernel/signal.c<br/>index fb12f4c5e649..7362d58efc29 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/signal.c</a></div><div class='hunk'>@@ -15,23 +15,16 @@</div><div class='ctx'> EXPORT_SYMBOL(block_signals);</div><div class='ctx'> EXPORT_SYMBOL(unblock_signals);</div><div class='ctx'> </div><div class='del'>-#define _S(nr) (1&lt;&lt;((nr)-1))</div><div class='del'>-</div><div class='del'>-#define _BLOCKABLE (~(_S(SIGKILL) | _S(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * OK, we're invoking a handler</div><div class='ctx'>  */</div><div class='del'>-static int handle_signal(struct pt_regs *regs, unsigned long signr,</div><div class='del'>-			 struct k_sigaction *ka, siginfo_t *info,</div><div class='del'>-			 sigset_t *oldset)</div><div class='add'>+static void handle_signal(struct pt_regs *regs, unsigned long signr,</div><div class='add'>+			 struct k_sigaction *ka, siginfo_t *info)</div><div class='ctx'> {</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	unsigned long sp;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* Always make any pending restarted system calls return -EINTR */</div><div class='del'>-	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='del'>-</div><div class='ctx'> 	/* Did we come from a system call? */</div><div class='ctx'> 	if (PT_REGS_SYSCALL_NR(regs) &gt;= 0) {</div><div class='ctx'> 		/* If so, check system call restarting.. */</div><div class='hunk'>@@ -68,37 +61,19 @@ static int handle_signal(struct pt_regs *regs, unsigned long signr,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		force_sigsegv(signr, current);</div><div class='ctx'> 	else</div><div class='del'>-		block_sigmask(ka, signr);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+		signal_delivered(signr, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int kern_do_signal(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	struct k_sigaction ka_copy;</div><div class='ctx'> 	siginfo_t info;</div><div class='del'>-	sigset_t *oldset;</div><div class='ctx'> 	int sig, handled_sig = 0;</div><div class='ctx'> </div><div class='del'>-	if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-		oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-	else</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	while ((sig = get_signal_to_deliver(&amp;info, &amp;ka_copy, regs, NULL)) &gt; 0) {</div><div class='ctx'> 		handled_sig = 1;</div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  */</div><div class='del'>-		if (!handle_signal(regs, sig, &amp;ka_copy, &amp;info, oldset)) {</div><div class='del'>-			/*</div><div class='del'>-			 * a signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag</div><div class='del'>-			 */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+		handle_signal(regs, sig, &amp;ka_copy, &amp;info);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Did we come from a system call? */</div><div class='hunk'>@@ -134,10 +109,8 @@ static int kern_do_signal(struct pt_regs *regs)</div><div class='ctx'> 	 * if there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back</div><div class='ctx'> 	 */</div><div class='del'>-	if (!handled_sig &amp;&amp; test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-		clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-	}</div><div class='add'>+	if (!handled_sig)</div><div class='add'>+		restore_saved_sigmask();</div><div class='ctx'> 	return handled_sig;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -152,15 +125,8 @@ int do_signal(void)</div><div class='ctx'> long sys_sigsuspend(int history0, int history1, old_sigset_t mask)</div><div class='ctx'> {</div><div class='ctx'> 	sigset_t blocked;</div><div class='del'>-</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='ctx'> 	siginitset(&amp;blocked, mask);</div><div class='del'>-	set_current_blocked(&amp;blocked);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-	set_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> long sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)</div><div class='head'>diff --git a/arch/um/kernel/skas/syscall.c b/arch/um/kernel/skas/syscall.c<br/>index f5173e1ec3ac..05fbeb480e0b 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/skas/syscall.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/kernel/skas/syscall.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/skas/syscall.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/skas/syscall.c</a></div><div class='hunk'>@@ -34,7 +34,7 @@ void handle_syscall(struct uml_pt_regs *r)</div><div class='ctx'> 		result = -ENOSYS;</div><div class='ctx'> 	else result = EXECUTE_SYSCALL(syscall, regs);</div><div class='ctx'> </div><div class='del'>-	REGS_SET_SYSCALL_RETURN(r-&gt;gp, result);</div><div class='add'>+	UPT_SET_SYSCALL_RETURN(r, result);</div><div class='ctx'> </div><div class='ctx'> 	syscall_trace(r, 1);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/um/kernel/smp.c b/arch/um/kernel/smp.c<br/>index 6f588e160fb0..a02b7e9e6b94 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/smp.c</a></div><div class='hunk'>@@ -140,7 +140,7 @@ void smp_prepare_boot_cpu(void)</div><div class='ctx'> 	set_cpu_online(smp_processor_id(), true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __cpu_up(unsigned int cpu)</div><div class='add'>+int __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='ctx'> 	cpu_set(cpu, smp_commenced_mask);</div><div class='ctx'> 	while (!cpu_online(cpu))</div><div class='head'>diff --git a/arch/um/kernel/tlb.c b/arch/um/kernel/tlb.c<br/>index 7f3d4d86431a..f819af951c19 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/tlb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/kernel/tlb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/tlb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/tlb.c</a></div><div class='hunk'>@@ -75,6 +75,7 @@ static int do_ops(struct host_vm_change *hvc, int end,</div><div class='ctx'> 		default:</div><div class='ctx'> 			printk(KERN_ERR "Unknown op type %d in do_ops\n",</div><div class='ctx'> 			       op-&gt;type);</div><div class='add'>+			BUG();</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/um/kernel/trap.c b/arch/um/kernel/trap.c<br/>index dafc94715950..3be60765c0e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/trap.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/kernel/trap.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/trap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/trap.c</a></div><div class='hunk'>@@ -30,6 +30,8 @@ int handle_page_fault(unsigned long address, unsigned long ip,</div><div class='ctx'> 	pmd_t *pmd;</div><div class='ctx'> 	pte_t *pte;</div><div class='ctx'> 	int err = -EFAULT;</div><div class='add'>+	unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |</div><div class='add'>+				 (is_write ? FAULT_FLAG_WRITE : 0);</div><div class='ctx'> </div><div class='ctx'> 	*code_out = SEGV_MAPERR;</div><div class='ctx'> </div><div class='hunk'>@@ -40,6 +42,7 @@ int handle_page_fault(unsigned long address, unsigned long ip,</div><div class='ctx'> 	if (in_atomic())</div><div class='ctx'> 		goto out_nosemaphore;</div><div class='ctx'> </div><div class='add'>+retry:</div><div class='ctx'> 	down_read(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	vma = find_vma(mm, address);</div><div class='ctx'> 	if (!vma)</div><div class='hunk'>@@ -65,7 +68,11 @@ good_area:</div><div class='ctx'> 	do {</div><div class='ctx'> 		int fault;</div><div class='ctx'> </div><div class='del'>-		fault = handle_mm_fault(mm, vma, address, is_write ? FAULT_FLAG_WRITE : 0);</div><div class='add'>+		fault = handle_mm_fault(mm, vma, address, flags);</div><div class='add'>+</div><div class='add'>+		if ((fault &amp; VM_FAULT_RETRY) &amp;&amp; fatal_signal_pending(current))</div><div class='add'>+			goto out_nosemaphore;</div><div class='add'>+</div><div class='ctx'> 		if (unlikely(fault &amp; VM_FAULT_ERROR)) {</div><div class='ctx'> 			if (fault &amp; VM_FAULT_OOM) {</div><div class='ctx'> 				goto out_of_memory;</div><div class='hunk'>@@ -75,10 +82,17 @@ good_area:</div><div class='ctx'> 			}</div><div class='ctx'> 			BUG();</div><div class='ctx'> 		}</div><div class='del'>-		if (fault &amp; VM_FAULT_MAJOR)</div><div class='del'>-			current-&gt;maj_flt++;</div><div class='del'>-		else</div><div class='del'>-			current-&gt;min_flt++;</div><div class='add'>+		if (flags &amp; FAULT_FLAG_ALLOW_RETRY) {</div><div class='add'>+			if (fault &amp; VM_FAULT_MAJOR)</div><div class='add'>+				current-&gt;maj_flt++;</div><div class='add'>+			else</div><div class='add'>+				current-&gt;min_flt++;</div><div class='add'>+			if (fault &amp; VM_FAULT_RETRY) {</div><div class='add'>+				flags &amp;= ~FAULT_FLAG_ALLOW_RETRY;</div><div class='add'>+</div><div class='add'>+				goto retry;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		pgd = pgd_offset(mm, address);</div><div class='ctx'> 		pud = pud_offset(pgd, address);</div><div class='head'>diff --git a/arch/um/kernel/um_arch.c b/arch/um/kernel/um_arch.c<br/>index ba00eae45aad..4db8770906ca 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/kernel/um_arch.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/kernel/um_arch.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/kernel/um_arch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/kernel/um_arch.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/utsname.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='hunk'>@@ -47,6 +48,10 @@ struct cpuinfo_um boot_cpu_data = {</div><div class='ctx'> 	.ipi_pipe		= { -1, -1 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+union thread_union cpu0_irqstack</div><div class='add'>+	__attribute__((__section__(".data..init_irqstack"))) =</div><div class='add'>+		{ INIT_THREAD_INFO(init_task) };</div><div class='add'>+</div><div class='ctx'> unsigned long thread_saved_pc(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	/* FIXME: Need to look up userspace_pid by cpu */</div><div class='head'>diff --git a/arch/um/os-Linux/skas/mem.c b/arch/um/os-Linux/skas/mem.c<br/>index c0afff7af4bd..90b310d29179 100644<br/>--- a/<a href='/drm-misc/tree/arch/um/os-Linux/skas/mem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/um/os-Linux/skas/mem.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/um/os-Linux/skas/mem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/um/os-Linux/skas/mem.c</a></div><div class='hunk'>@@ -48,10 +48,6 @@ __initcall(init_syscall_regs);</div><div class='ctx'> </div><div class='ctx'> extern int proc_mm;</div><div class='ctx'> </div><div class='del'>-int single_count = 0;</div><div class='del'>-int multi_count = 0;</div><div class='del'>-int multi_op_count = 0;</div><div class='del'>-</div><div class='ctx'> static inline long do_syscall_stub(struct mm_id * mm_idp, void **addr)</div><div class='ctx'> {</div><div class='ctx'> 	int n, i;</div><div class='hunk'>@@ -64,8 +60,6 @@ static inline long do_syscall_stub(struct mm_id * mm_idp, void **addr)</div><div class='ctx'> 		/* FIXME: Need to look up userspace_pid by cpu */</div><div class='ctx'> 		pid = userspace_pid[0];</div><div class='ctx'> </div><div class='del'>-	multi_count++;</div><div class='del'>-</div><div class='ctx'> 	n = ptrace_setregs(pid, syscall_regs);</div><div class='ctx'> 	if (n &lt; 0) {</div><div class='ctx'> 		printk(UM_KERN_ERR "Registers - \n");</div><div class='hunk'>@@ -126,9 +120,6 @@ long run_syscall_stub(struct mm_id * mm_idp, int syscall,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long *stack = check_init_stack(mm_idp, *addr);</div><div class='ctx'> </div><div class='del'>-	if (done &amp;&amp; *addr == NULL)</div><div class='del'>-		single_count++;</div><div class='del'>-</div><div class='ctx'> 	*stack += sizeof(long);</div><div class='ctx'> 	stack += *stack / sizeof(long);</div><div class='ctx'> </div><div class='hunk'>@@ -141,7 +132,6 @@ long run_syscall_stub(struct mm_id * mm_idp, int syscall,</div><div class='ctx'> 	*stack++ = args[5];</div><div class='ctx'> 	*stack++ = expected;</div><div class='ctx'> 	*stack = 0;</div><div class='del'>-	multi_op_count++;</div><div class='ctx'> </div><div class='ctx'> 	if (!done &amp;&amp; ((((unsigned long) stack) &amp; ~UM_KERN_PAGE_MASK) &lt;</div><div class='ctx'> 		     UM_KERN_PAGE_SIZE - 10 * sizeof(long))) {</div><div class='head'>diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig<br/>index eeb8054c7cd8..03c9ff808b5a 100644<br/>--- a/<a href='/drm-misc/tree/arch/unicore32/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/unicore32/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/unicore32/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/Kconfig</a></div><div class='hunk'>@@ -8,6 +8,7 @@ config UNICORE32</div><div class='ctx'> 	select HAVE_KERNEL_BZIP2</div><div class='ctx'> 	select HAVE_KERNEL_LZO</div><div class='ctx'> 	select HAVE_KERNEL_LZMA</div><div class='add'>+	select ARCH_HAVE_CUSTOM_GPIO_H</div><div class='ctx'> 	select GENERIC_FIND_FIRST_BIT</div><div class='ctx'> 	select GENERIC_IRQ_PROBE</div><div class='ctx'> 	select GENERIC_IRQ_SHOW</div><div class='hunk'>@@ -25,9 +26,6 @@ config HAVE_PWM</div><div class='ctx'> config GENERIC_GPIO</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> config GENERIC_CSUM</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='hunk'>@@ -146,8 +144,6 @@ endmenu</div><div class='ctx'> </div><div class='ctx'> menu "Kernel Features"</div><div class='ctx'> </div><div class='del'>-source "kernel/time/Kconfig"</div><div class='del'>-</div><div class='ctx'> source "kernel/Kconfig.preempt"</div><div class='ctx'> </div><div class='ctx'> source "kernel/Kconfig.hz"</div><div class='head'>diff --git a/arch/unicore32/Makefile b/arch/unicore32/Makefile<br/>index 6af4bc415f2b..b6f5c4c1eaf9 100644<br/>--- a/<a href='/drm-misc/tree/arch/unicore32/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/unicore32/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/unicore32/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/Makefile</a></div><div class='hunk'>@@ -33,7 +33,6 @@ endif</div><div class='ctx'> CHECKFLAGS		+= -D__unicore32__</div><div class='ctx'> </div><div class='ctx'> head-y			:= arch/unicore32/kernel/head.o</div><div class='del'>-head-y			+= arch/unicore32/kernel/init_task.o</div><div class='ctx'> </div><div class='ctx'> core-y			+= arch/unicore32/kernel/</div><div class='ctx'> core-y			+= arch/unicore32/mm/</div><div class='head'>diff --git a/arch/unicore32/include/asm/kvm_para.h b/arch/unicore32/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/unicore32/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/unicore32/include/asm/processor.h b/arch/unicore32/include/asm/processor.h<br/>index f0d780a51f9b..14382cb09657 100644<br/>--- a/<a href='/drm-misc/tree/arch/unicore32/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/unicore32/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/unicore32/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/include/asm/processor.h</a></div><div class='hunk'>@@ -68,9 +68,6 @@ struct task_struct;</div><div class='ctx'> /* Free all resources held by a thread. */</div><div class='ctx'> extern void release_thread(struct task_struct *);</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-#define prepare_to_copy(tsk)	do { } while (0)</div><div class='del'>-</div><div class='ctx'> unsigned long get_wchan(struct task_struct *p);</div><div class='ctx'> </div><div class='ctx'> #define cpu_relax()			barrier()</div><div class='head'>diff --git a/arch/unicore32/kernel/Makefile b/arch/unicore32/kernel/Makefile<br/>index aeb0f181568e..324010156958 100644<br/>--- a/<a href='/drm-misc/tree/arch/unicore32/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/unicore32/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/unicore32/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/kernel/Makefile</a></div><div class='hunk'>@@ -29,4 +29,4 @@ obj-$(CONFIG_PUV3_NB0916)	+= puv3-nb0916.o</div><div class='ctx'> head-y				:= head.o</div><div class='ctx'> obj-$(CONFIG_DEBUG_LL)		+= debug.o</div><div class='ctx'> </div><div class='del'>-extra-y				:= $(head-y) init_task.o vmlinux.lds</div><div class='add'>+extra-y				:= $(head-y) vmlinux.lds</div><div class='head'>diff --git a/arch/unicore32/kernel/init_task.c b/arch/unicore32/kernel/init_task.c<br/>deleted file mode 100644<br/>index a35a1e50e4f4..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/unicore32/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/unicore32/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,44 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/arch/unicore32/kernel/init_task.c</div><div class='del'>- *</div><div class='del'>- * Code specific to PKUnity SoC and UniCore ISA</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2001-2010 GUAN Xue-tao</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-#include &lt;linux/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is 8192-byte aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by making sure</div><div class='del'>- * the linker maps this in the .text segment right after head.S,</div><div class='del'>- * and making head.S ensure the proper alignment.</div><div class='del'>- *</div><div class='del'>- * The things we do for performance..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data = {</div><div class='del'>-	INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/unicore32/kernel/signal.c b/arch/unicore32/kernel/signal.c<br/>index 911b549a6df5..8adedb37720a 100644<br/>--- a/<a href='/drm-misc/tree/arch/unicore32/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/unicore32/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/unicore32/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/unicore32/kernel/signal.c</a></div><div class='hunk'>@@ -21,8 +21,6 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/ucontext.h&gt;</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * For UniCore syscalls, we encode the syscall number into the instruction.</div><div class='ctx'>  */</div><div class='hunk'>@@ -61,10 +59,8 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = __copy_from_user(&amp;set, &amp;sf-&gt;uc.uc_sigmask, sizeof(set));</div><div class='del'>-	if (err == 0) {</div><div class='del'>-		sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='add'>+	if (err == 0)</div><div class='ctx'> 		set_current_blocked(&amp;set);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	err |= __get_user(regs-&gt;UCreg_00, &amp;sf-&gt;uc.uc_mcontext.regs.UCreg_00);</div><div class='ctx'> 	err |= __get_user(regs-&gt;UCreg_01, &amp;sf-&gt;uc.uc_mcontext.regs.UCreg_01);</div><div class='hunk'>@@ -312,13 +308,12 @@ static inline void setup_syscall_restart(struct pt_regs *regs)</div><div class='ctx'> /*</div><div class='ctx'>  * OK, we're invoking a handler</div><div class='ctx'>  */</div><div class='del'>-static int handle_signal(unsigned long sig, struct k_sigaction *ka,</div><div class='del'>-	      siginfo_t *info, sigset_t *oldset,</div><div class='del'>-	      struct pt_regs *regs, int syscall)</div><div class='add'>+static void handle_signal(unsigned long sig, struct k_sigaction *ka,</div><div class='add'>+	      siginfo_t *info, struct pt_regs *regs, int syscall)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_info *thread = current_thread_info();</div><div class='ctx'> 	struct task_struct *tsk = current;</div><div class='del'>-	sigset_t blocked;</div><div class='add'>+	sigset_t *oldset = sigmask_to_save();</div><div class='ctx'> 	int usig = sig;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -364,18 +359,10 @@ static int handle_signal(unsigned long sig, struct k_sigaction *ka,</div><div class='ctx'> </div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		force_sigsegv(sig, tsk);</div><div class='del'>-		return ret;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Block the signal if we were successful.</div><div class='del'>-	 */</div><div class='del'>-	sigorsets(&amp;blocked, &amp;tsk-&gt;blocked, &amp;ka-&gt;sa.sa_mask);</div><div class='del'>-	if (!(ka-&gt;sa.sa_flags &amp; SA_NODEFER))</div><div class='del'>-		sigaddset(&amp;blocked, sig);</div><div class='del'>-	set_current_blocked(&amp;blocked);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	signal_delivered(sig, info, ka, regs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -402,32 +389,12 @@ static void do_signal(struct pt_regs *regs, int syscall)</div><div class='ctx'> 	if (!user_mode(regs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (try_to_freeze())</div><div class='del'>-		goto no_signal;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='del'>-		sigset_t *oldset;</div><div class='del'>-</div><div class='del'>-		if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-			oldset = &amp;current-&gt;saved_sigmask;</div><div class='del'>-		else</div><div class='del'>-			oldset = &amp;current-&gt;blocked;</div><div class='del'>-		if (handle_signal(signr, &amp;ka, &amp;info, oldset, regs, syscall)</div><div class='del'>-				== 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * A signal was successfully delivered; the saved</div><div class='del'>-			 * sigmask will have been stored in the signal frame,</div><div class='del'>-			 * and will be restored by sigreturn, so we can simply</div><div class='del'>-			 * clear the TIF_RESTORE_SIGMASK flag.</div><div class='del'>-			 */</div><div class='del'>-			if (test_thread_flag(TIF_RESTORE_SIGMASK))</div><div class='del'>-				clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-		}</div><div class='add'>+		handle_signal(signr, &amp;ka, &amp;info, regs, syscall);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>- no_signal:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * No signal to deliver to the process - restart the syscall.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -450,15 +417,11 @@ static void do_signal(struct pt_regs *regs, int syscall)</div><div class='ctx'> 		    regs-&gt;UCreg_00 == -ERESTARTNOINTR) {</div><div class='ctx'> 			setup_syscall_restart(regs);</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		/* If there's no signal to deliver, we just put the saved</div><div class='del'>-		 * sigmask back.</div><div class='del'>-		 */</div><div class='del'>-		if (test_thread_flag(TIF_RESTORE_SIGMASK)) {</div><div class='del'>-			clear_thread_flag(TIF_RESTORE_SIGMASK);</div><div class='del'>-			sigprocmask(SIG_SETMASK, &amp;current-&gt;saved_sigmask, NULL);</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='add'>+	/* If there's no signal to deliver, we just put the saved</div><div class='add'>+	 * sigmask back.</div><div class='add'>+	 */</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage void do_notify_resume(struct pt_regs *regs,</div><div class='hunk'>@@ -470,8 +433,6 @@ asmlinkage void do_notify_resume(struct pt_regs *regs,</div><div class='ctx'> 	if (thread_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/Kbuild b/arch/x86/Kbuild<br/>index 0e9dec6cadd1..e5287d8517aa 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/Kbuild?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/Kbuild</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/Kbuild?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/Kbuild</a></div><div class='hunk'>@@ -1,4 +1,3 @@</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_KVM) += kvm/</div><div class='ctx'> </div><div class='ctx'> # Xen paravirtualization support</div><div class='hunk'>@@ -7,6 +6,7 @@ obj-$(CONFIG_XEN) += xen/</div><div class='ctx'> # lguest paravirtualization support</div><div class='ctx'> obj-$(CONFIG_LGUEST_GUEST) += lguest/</div><div class='ctx'> </div><div class='add'>+obj-y += realmode/</div><div class='ctx'> obj-y += kernel/</div><div class='ctx'> obj-y += mm/</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig<br/>index 3a41c4424a0a..c70684f859e1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/Kconfig</a></div><div class='hunk'>@@ -12,6 +12,7 @@ config X86_32</div><div class='ctx'> </div><div class='ctx'> config X86_64</div><div class='ctx'> 	def_bool 64BIT</div><div class='add'>+	select X86_DEV_DMA_OPS</div><div class='ctx'> </div><div class='ctx'> ### Arch settings</div><div class='ctx'> config X86</div><div class='hunk'>@@ -31,6 +32,7 @@ config X86</div><div class='ctx'> 	select ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='ctx'> 	select ARCH_WANT_FRAME_POINTERS</div><div class='ctx'> 	select HAVE_DMA_ATTRS</div><div class='add'>+	select HAVE_DMA_CONTIGUOUS if !SWIOTLB</div><div class='ctx'> 	select HAVE_KRETPROBES</div><div class='ctx'> 	select HAVE_OPTPROBES</div><div class='ctx'> 	select HAVE_FTRACE_MCOUNT_RECORD</div><div class='hunk'>@@ -40,7 +42,6 @@ config X86</div><div class='ctx'> 	select HAVE_FUNCTION_GRAPH_TRACER</div><div class='ctx'> 	select HAVE_FUNCTION_GRAPH_FP_TEST</div><div class='ctx'> 	select HAVE_FUNCTION_TRACE_MCOUNT_TEST</div><div class='del'>-	select HAVE_FTRACE_NMI_ENTER if DYNAMIC_FTRACE</div><div class='ctx'> 	select HAVE_SYSCALL_TRACEPOINTS</div><div class='ctx'> 	select HAVE_KVM</div><div class='ctx'> 	select HAVE_ARCH_KGDB</div><div class='hunk'>@@ -77,15 +78,26 @@ config X86</div><div class='ctx'> 	select GENERIC_CLOCKEVENTS_MIN_ADJUST</div><div class='ctx'> 	select IRQ_FORCED_THREADING</div><div class='ctx'> 	select USE_GENERIC_SMP_HELPERS if SMP</div><div class='del'>-	select HAVE_BPF_JIT if (X86_64 &amp;&amp; NET)</div><div class='add'>+	select HAVE_BPF_JIT if X86_64</div><div class='ctx'> 	select CLKEVT_I8253</div><div class='ctx'> 	select ARCH_HAVE_NMI_SAFE_CMPXCHG</div><div class='ctx'> 	select GENERIC_IOMAP</div><div class='del'>-	select DCACHE_WORD_ACCESS if !DEBUG_PAGEALLOC</div><div class='add'>+	select DCACHE_WORD_ACCESS</div><div class='add'>+	select GENERIC_SMP_IDLE_THREAD</div><div class='ctx'> 	select HAVE_ARCH_SECCOMP_FILTER</div><div class='add'>+	select BUILDTIME_EXTABLE_SORT</div><div class='add'>+	select GENERIC_CMOS_UPDATE</div><div class='add'>+	select CLOCKSOURCE_WATCHDOG</div><div class='add'>+	select GENERIC_CLOCKEVENTS</div><div class='add'>+	select ARCH_CLOCKSOURCE_DATA if X86_64</div><div class='add'>+	select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 &amp;&amp; X86_LOCAL_APIC)</div><div class='add'>+	select GENERIC_TIME_VSYSCALL if X86_64</div><div class='add'>+	select KTIME_SCALAR if X86_32</div><div class='add'>+	select GENERIC_STRNCPY_FROM_USER</div><div class='add'>+	select GENERIC_STRNLEN_USER</div><div class='ctx'> </div><div class='ctx'> config INSTRUCTION_DECODER</div><div class='del'>-	def_bool (KPROBES || PERF_EVENTS)</div><div class='add'>+	def_bool (KPROBES || PERF_EVENTS || UPROBES)</div><div class='ctx'> </div><div class='ctx'> config OUTPUT_FORMAT</div><div class='ctx'> 	string</div><div class='hunk'>@@ -97,23 +109,6 @@ config ARCH_DEFCONFIG</div><div class='ctx'> 	default "arch/x86/configs/i386_defconfig" if X86_32</div><div class='ctx'> 	default "arch/x86/configs/x86_64_defconfig" if X86_64</div><div class='ctx'> </div><div class='del'>-config GENERIC_CMOS_UPDATE</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='del'>-config CLOCKSOURCE_WATCHDOG</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='del'>-config GENERIC_CLOCKEVENTS</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='del'>-config ARCH_CLOCKSOURCE_DATA</div><div class='del'>-	def_bool y</div><div class='del'>-	depends on X86_64</div><div class='del'>-</div><div class='del'>-config GENERIC_CLOCKEVENTS_BROADCAST</div><div class='del'>-	def_bool y</div><div class='del'>-	depends on X86_64 || (X86_32 &amp;&amp; X86_LOCAL_APIC)</div><div class='del'>-</div><div class='ctx'> config LOCKDEP_SUPPORT</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='hunk'>@@ -161,16 +156,9 @@ config RWSEM_GENERIC_SPINLOCK</div><div class='ctx'> config RWSEM_XCHGADD_ALGORITHM</div><div class='ctx'> 	def_bool X86_XADD</div><div class='ctx'> </div><div class='del'>-config ARCH_HAS_CPU_IDLE_WAIT</div><div class='del'>-	def_bool y</div><div class='del'>-</div><div class='ctx'> config GENERIC_CALIBRATE_DELAY</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config GENERIC_TIME_VSYSCALL</div><div class='del'>-	bool</div><div class='del'>-	default X86_64</div><div class='del'>-</div><div class='ctx'> config ARCH_HAS_CPU_RELAX</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='hunk'>@@ -237,13 +225,13 @@ config ARCH_HWEIGHT_CFLAGS</div><div class='ctx'> 	default "-fcall-saved-ecx -fcall-saved-edx" if X86_32</div><div class='ctx'> 	default "-fcall-saved-rdi -fcall-saved-rsi -fcall-saved-rdx -fcall-saved-rcx -fcall-saved-r8 -fcall-saved-r9 -fcall-saved-r10 -fcall-saved-r11" if X86_64</div><div class='ctx'> </div><div class='del'>-config KTIME_SCALAR</div><div class='del'>-	def_bool X86_32</div><div class='del'>-</div><div class='ctx'> config ARCH_CPU_PROBE_RELEASE</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on HOTPLUG_CPU</div><div class='ctx'> </div><div class='add'>+config ARCH_SUPPORTS_UPROBES</div><div class='add'>+	def_bool y</div><div class='add'>+</div><div class='ctx'> source "init/Kconfig"</div><div class='ctx'> source "kernel/Kconfig.freezer"</div><div class='ctx'> </div><div class='hunk'>@@ -259,8 +247,6 @@ config ZONE_DMA</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say Y.</div><div class='ctx'> </div><div class='del'>-source "kernel/time/Kconfig"</div><div class='del'>-</div><div class='ctx'> config SMP</div><div class='ctx'> 	bool "Symmetric multi-processing support"</div><div class='ctx'> 	---help---</div><div class='hunk'>@@ -329,6 +315,7 @@ config X86_EXTENDED_PLATFORM</div><div class='ctx'> 		NUMAQ (IBM/Sequent)</div><div class='ctx'> 		RDC R-321x SoC</div><div class='ctx'> 		SGI 320/540 (Visual Workstation)</div><div class='add'>+		STA2X11-based (e.g. Northville)</div><div class='ctx'> 		Summit/EXA (IBM x440)</div><div class='ctx'> 		Unisys ES7000 IA32 series</div><div class='ctx'> 		Moorestown MID devices</div><div class='hunk'>@@ -375,6 +362,7 @@ config X86_VSMP</div><div class='ctx'> 	select PARAVIRT</div><div class='ctx'> 	depends on X86_64 &amp;&amp; PCI</div><div class='ctx'> 	depends on X86_EXTENDED_PLATFORM</div><div class='add'>+	depends on SMP</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Support for ScaleMP vSMP systems.  Say 'Y' here if this kernel is</div><div class='ctx'> 	  supposed to run on these EM64T-based machines.  Only choose this option</div><div class='hunk'>@@ -461,10 +449,10 @@ config X86_32_NON_STANDARD</div><div class='ctx'> 	depends on X86_32 &amp;&amp; SMP</div><div class='ctx'> 	depends on X86_EXTENDED_PLATFORM</div><div class='ctx'> 	---help---</div><div class='del'>-	  This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default</div><div class='del'>-	  subarchitectures.  It is intended for a generic binary kernel.</div><div class='del'>-	  if you select them all, kernel will probe it one by one. and will</div><div class='del'>-	  fallback to default.</div><div class='add'>+	  This option compiles in the NUMAQ, Summit, bigsmp, ES7000,</div><div class='add'>+	  STA2X11, default subarchitectures.  It is intended for a generic</div><div class='add'>+	  binary kernel. If you select them all, kernel will probe it</div><div class='add'>+	  one by one and will fallback to default.</div><div class='ctx'> </div><div class='ctx'> # Alphabetically sorted list of Non standard 32 bit platforms</div><div class='ctx'> </div><div class='hunk'>@@ -504,6 +492,22 @@ config X86_VISWS</div><div class='ctx'> 	  A kernel compiled for the Visual Workstation will run on general</div><div class='ctx'> 	  PCs as well. See &lt;file:Documentation/sgi-visws.txt&gt; for details.</div><div class='ctx'> </div><div class='add'>+config STA2X11</div><div class='add'>+	bool "STA2X11 Companion Chip Support"</div><div class='add'>+	depends on X86_32_NON_STANDARD &amp;&amp; PCI</div><div class='add'>+	select X86_DEV_DMA_OPS</div><div class='add'>+	select X86_DMA_REMAP</div><div class='add'>+	select SWIOTLB</div><div class='add'>+	select MFD_STA2X11</div><div class='add'>+	select ARCH_REQUIRE_GPIOLIB</div><div class='add'>+	default n</div><div class='add'>+	---help---</div><div class='add'>+	  This adds support for boards based on the STA2X11 IO-Hub,</div><div class='add'>+	  a.k.a. "ConneXt". The chip is used in place of the standard</div><div class='add'>+	  PC chipset, so all "standard" peripherals are missing. If this</div><div class='add'>+	  option is selected the kernel will still be able to boot on</div><div class='add'>+	  standard PC machines.</div><div class='add'>+</div><div class='ctx'> config X86_SUMMIT</div><div class='ctx'> 	bool "Summit/EXA (IBM x440)"</div><div class='ctx'> 	depends on X86_32_NON_STANDARD</div><div class='hunk'>@@ -1240,10 +1244,6 @@ config NODES_SHIFT</div><div class='ctx'> 	  Specify the maximum number of NUMA Nodes available on the target</div><div class='ctx'> 	  system.  Increases memory reserved to accommodate various tables.</div><div class='ctx'> </div><div class='del'>-config HAVE_ARCH_BOOTMEM</div><div class='del'>-	def_bool y</div><div class='del'>-	depends on X86_32 &amp;&amp; NUMA</div><div class='del'>-</div><div class='ctx'> config HAVE_ARCH_ALLOC_REMAP</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on X86_32 &amp;&amp; NUMA</div><div class='hunk'>@@ -1506,6 +1506,8 @@ config EFI_STUB</div><div class='ctx'>           This kernel feature allows a bzImage to be loaded directly</div><div class='ctx'> 	  by EFI firmware without the use of a bootloader.</div><div class='ctx'> </div><div class='add'>+	  See Documentation/x86/efi-stub.txt for more information.</div><div class='add'>+</div><div class='ctx'> config SECCOMP</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	prompt "Enable seccomp to safely compute untrusted bytecode"</div><div class='hunk'>@@ -2024,16 +2026,6 @@ config EISA</div><div class='ctx'> </div><div class='ctx'> source "drivers/eisa/Kconfig"</div><div class='ctx'> </div><div class='del'>-config MCA</div><div class='del'>-	bool "MCA support"</div><div class='del'>-	---help---</div><div class='del'>-	  MicroChannel Architecture is found in some IBM PS/2 machines and</div><div class='del'>-	  laptops.  It is a bus system similar to PCI or ISA. See</div><div class='del'>-	  &lt;file:Documentation/mca.txt&gt; (and especially the web page given</div><div class='del'>-	  there) before attempting to build an MCA bus kernel.</div><div class='del'>-</div><div class='del'>-source "drivers/mca/Kconfig"</div><div class='del'>-</div><div class='ctx'> config SCx200</div><div class='ctx'> 	tristate "NatSemi SCx200 support"</div><div class='ctx'> 	---help---</div><div class='hunk'>@@ -2216,6 +2208,14 @@ config HAVE_TEXT_POKE_SMP</div><div class='ctx'> 	bool</div><div class='ctx'> 	select STOP_MACHINE if SMP</div><div class='ctx'> </div><div class='add'>+config X86_DEV_DMA_OPS</div><div class='add'>+	bool</div><div class='add'>+	depends on X86_64 || STA2X11</div><div class='add'>+</div><div class='add'>+config X86_DMA_REMAP</div><div class='add'>+	bool</div><div class='add'>+	depends on STA2X11</div><div class='add'>+</div><div class='ctx'> source "net/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/Kconfig"</div><div class='head'>diff --git a/arch/x86/Makefile b/arch/x86/Makefile<br/>index 41a7237606a3..1f2521434554 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/Makefile</a></div><div class='hunk'>@@ -115,9 +115,10 @@ cfi-sections := $(call as-instr,.cfi_sections .debug_frame,-DCONFIG_AS_CFI_SECTI</div><div class='ctx'> </div><div class='ctx'> # does binutils support specific instructions?</div><div class='ctx'> asinstr := $(call as-instr,fxsaveq (%rax),-DCONFIG_AS_FXSAVEQ=1)</div><div class='add'>+avx_instr := $(call as-instr,vxorps %ymm0$(comma)%ymm1$(comma)%ymm2,-DCONFIG_AS_AVX=1)</div><div class='ctx'> </div><div class='del'>-KBUILD_AFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr)</div><div class='del'>-KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr)</div><div class='add'>+KBUILD_AFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr)</div><div class='add'>+KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr)</div><div class='ctx'> </div><div class='ctx'> LDFLAGS := -m elf_$(UTS_MACHINE)</div><div class='ctx'> </div><div class='hunk'>@@ -134,6 +135,9 @@ KBUILD_CFLAGS += $(call cc-option,-mno-avx,)</div><div class='ctx'> KBUILD_CFLAGS += $(mflags-y)</div><div class='ctx'> KBUILD_AFLAGS += $(mflags-y)</div><div class='ctx'> </div><div class='add'>+archscripts:</div><div class='add'>+	$(Q)$(MAKE) $(build)=arch/x86/tools relocs</div><div class='add'>+</div><div class='ctx'> ###</div><div class='ctx'> # Syscall table generation</div><div class='ctx'> </div><div class='hunk'>@@ -146,7 +150,6 @@ archheaders:</div><div class='ctx'> head-y := arch/x86/kernel/head_$(BITS).o</div><div class='ctx'> head-y += arch/x86/kernel/head$(BITS).o</div><div class='ctx'> head-y += arch/x86/kernel/head.o</div><div class='del'>-head-y += arch/x86/kernel/init_task.o</div><div class='ctx'> </div><div class='ctx'> libs-y  += arch/x86/lib/</div><div class='ctx'> </div><div class='hunk'>@@ -203,6 +206,7 @@ archclean:</div><div class='ctx'> 	$(Q)rm -rf $(objtree)/arch/i386</div><div class='ctx'> 	$(Q)rm -rf $(objtree)/arch/x86_64</div><div class='ctx'> 	$(Q)$(MAKE) $(clean)=$(boot)</div><div class='add'>+	$(Q)$(MAKE) $(clean)=arch/x86/tools</div><div class='ctx'> </div><div class='ctx'> define archhelp</div><div class='ctx'>   echo  '* bzImage      - Compressed kernel image (arch/x86/boot/bzImage)'</div><div class='head'>diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile<br/>index fd55a2ff3ad8..e398bb5d63bb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/boot/compressed/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/boot/compressed/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/boot/compressed/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/boot/compressed/Makefile</a></div><div class='hunk'>@@ -40,13 +40,12 @@ OBJCOPYFLAGS_vmlinux.bin :=  -R .comment -S</div><div class='ctx'> $(obj)/vmlinux.bin: vmlinux FORCE</div><div class='ctx'> 	$(call if_changed,objcopy)</div><div class='ctx'> </div><div class='add'>+targets += vmlinux.bin.all vmlinux.relocs</div><div class='ctx'> </div><div class='del'>-targets += vmlinux.bin.all vmlinux.relocs relocs</div><div class='del'>-hostprogs-$(CONFIG_X86_NEED_RELOCS) += relocs</div><div class='del'>-</div><div class='add'>+CMD_RELOCS = arch/x86/tools/relocs</div><div class='ctx'> quiet_cmd_relocs = RELOCS  $@</div><div class='del'>-      cmd_relocs = $(obj)/relocs $&lt; &gt; $@;$(obj)/relocs --abs-relocs $&lt;</div><div class='del'>-$(obj)/vmlinux.relocs: vmlinux $(obj)/relocs FORCE</div><div class='add'>+      cmd_relocs = $(CMD_RELOCS) $&lt; &gt; $@;$(CMD_RELOCS) --abs-relocs $&lt;</div><div class='add'>+$(obj)/vmlinux.relocs: vmlinux FORCE</div><div class='ctx'> 	$(call if_changed,relocs)</div><div class='ctx'> </div><div class='ctx'> vmlinux.bin.all-y := $(obj)/vmlinux.bin</div><div class='head'>diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c<br/>index 0cdfc0d2315e..4e85f5f85837 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/boot/compressed/eboot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/boot/compressed/eboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/boot/compressed/eboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/boot/compressed/eboot.c</a></div><div class='hunk'>@@ -16,6 +16,26 @@</div><div class='ctx'> </div><div class='ctx'> static efi_system_table_t *sys_table;</div><div class='ctx'> </div><div class='add'>+static void efi_printk(char *str)</div><div class='add'>+{</div><div class='add'>+	char *s8;</div><div class='add'>+</div><div class='add'>+	for (s8 = str; *s8; s8++) {</div><div class='add'>+		struct efi_simple_text_output_protocol *out;</div><div class='add'>+		efi_char16_t ch[2] = { 0 };</div><div class='add'>+</div><div class='add'>+		ch[0] = *s8;</div><div class='add'>+		out = (struct efi_simple_text_output_protocol *)sys_table-&gt;con_out;</div><div class='add'>+</div><div class='add'>+		if (*s8 == '\n') {</div><div class='add'>+			efi_char16_t nl[2] = { '\r', 0 };</div><div class='add'>+			efi_call_phys2(out-&gt;output_string, out, nl);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		efi_call_phys2(out-&gt;output_string, out, ch);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static efi_status_t __get_map(efi_memory_desc_t **map, unsigned long *map_size,</div><div class='ctx'> 			      unsigned long *desc_size)</div><div class='ctx'> {</div><div class='hunk'>@@ -531,8 +551,10 @@ static efi_status_t handle_ramdisks(efi_loaded_image_t *image,</div><div class='ctx'> 				EFI_LOADER_DATA,</div><div class='ctx'> 				nr_initrds * sizeof(*initrds),</div><div class='ctx'> 				&amp;initrds);</div><div class='del'>-	if (status != EFI_SUCCESS)</div><div class='add'>+	if (status != EFI_SUCCESS) {</div><div class='add'>+		efi_printk("Failed to alloc mem for initrds\n");</div><div class='ctx'> 		goto fail;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	str = (char *)(unsigned long)hdr-&gt;cmd_line_ptr;</div><div class='ctx'> 	for (i = 0; i &lt; nr_initrds; i++) {</div><div class='hunk'>@@ -575,32 +597,42 @@ static efi_status_t handle_ramdisks(efi_loaded_image_t *image,</div><div class='ctx'> </div><div class='ctx'> 			status = efi_call_phys3(boottime-&gt;handle_protocol,</div><div class='ctx'> 					image-&gt;device_handle, &amp;fs_proto, &amp;io);</div><div class='del'>-			if (status != EFI_SUCCESS)</div><div class='add'>+			if (status != EFI_SUCCESS) {</div><div class='add'>+				efi_printk("Failed to handle fs_proto\n");</div><div class='ctx'> 				goto free_initrds;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='ctx'> 			status = efi_call_phys2(io-&gt;open_volume, io, &amp;fh);</div><div class='del'>-			if (status != EFI_SUCCESS)</div><div class='add'>+			if (status != EFI_SUCCESS) {</div><div class='add'>+				efi_printk("Failed to open volume\n");</div><div class='ctx'> 				goto free_initrds;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		status = efi_call_phys5(fh-&gt;open, fh, &amp;h, filename_16,</div><div class='ctx'> 					EFI_FILE_MODE_READ, (u64)0);</div><div class='del'>-		if (status != EFI_SUCCESS)</div><div class='add'>+		if (status != EFI_SUCCESS) {</div><div class='add'>+			efi_printk("Failed to open initrd file\n");</div><div class='ctx'> 			goto close_handles;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		initrd-&gt;handle = h;</div><div class='ctx'> </div><div class='ctx'> 		info_sz = 0;</div><div class='ctx'> 		status = efi_call_phys4(h-&gt;get_info, h, &amp;info_guid,</div><div class='ctx'> 					&amp;info_sz, NULL);</div><div class='del'>-		if (status != EFI_BUFFER_TOO_SMALL)</div><div class='add'>+		if (status != EFI_BUFFER_TOO_SMALL) {</div><div class='add'>+			efi_printk("Failed to get initrd info size\n");</div><div class='ctx'> 			goto close_handles;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> grow:</div><div class='ctx'> 		status = efi_call_phys3(sys_table-&gt;boottime-&gt;allocate_pool,</div><div class='ctx'> 					EFI_LOADER_DATA, info_sz, &amp;info);</div><div class='del'>-		if (status != EFI_SUCCESS)</div><div class='add'>+		if (status != EFI_SUCCESS) {</div><div class='add'>+			efi_printk("Failed to alloc mem for initrd info\n");</div><div class='ctx'> 			goto close_handles;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		status = efi_call_phys4(h-&gt;get_info, h, &amp;info_guid,</div><div class='ctx'> 					&amp;info_sz, info);</div><div class='hunk'>@@ -612,8 +644,10 @@ grow:</div><div class='ctx'> 		file_sz = info-&gt;file_size;</div><div class='ctx'> 		efi_call_phys1(sys_table-&gt;boottime-&gt;free_pool, info);</div><div class='ctx'> </div><div class='del'>-		if (status != EFI_SUCCESS)</div><div class='add'>+		if (status != EFI_SUCCESS) {</div><div class='add'>+			efi_printk("Failed to get initrd info\n");</div><div class='ctx'> 			goto close_handles;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		initrd-&gt;size = file_sz;</div><div class='ctx'> 		initrd_total += file_sz;</div><div class='hunk'>@@ -629,11 +663,14 @@ grow:</div><div class='ctx'> 		 */</div><div class='ctx'> 		status = high_alloc(initrd_total, 0x1000,</div><div class='ctx'> 				   &amp;initrd_addr, hdr-&gt;initrd_addr_max);</div><div class='del'>-		if (status != EFI_SUCCESS)</div><div class='add'>+		if (status != EFI_SUCCESS) {</div><div class='add'>+			efi_printk("Failed to alloc highmem for initrds\n");</div><div class='ctx'> 			goto close_handles;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* We've run out of free low memory. */</div><div class='ctx'> 		if (initrd_addr &gt; hdr-&gt;initrd_addr_max) {</div><div class='add'>+			efi_printk("We've run out of free low memory\n");</div><div class='ctx'> 			status = EFI_INVALID_PARAMETER;</div><div class='ctx'> 			goto free_initrd_total;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -652,8 +689,10 @@ grow:</div><div class='ctx'> 				status = efi_call_phys3(fh-&gt;read,</div><div class='ctx'> 							initrds[j].handle,</div><div class='ctx'> 							&amp;chunksize, addr);</div><div class='del'>-				if (status != EFI_SUCCESS)</div><div class='add'>+				if (status != EFI_SUCCESS) {</div><div class='add'>+					efi_printk("Failed to read initrd\n");</div><div class='ctx'> 					goto free_initrd_total;</div><div class='add'>+				}</div><div class='ctx'> 				addr += chunksize;</div><div class='ctx'> 				size -= chunksize;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -674,7 +713,7 @@ free_initrd_total:</div><div class='ctx'> 	low_free(initrd_total, initrd_addr);</div><div class='ctx'> </div><div class='ctx'> close_handles:</div><div class='del'>-	for (k = j; k &lt; nr_initrds; k++)</div><div class='add'>+	for (k = j; k &lt; i; k++)</div><div class='ctx'> 		efi_call_phys1(fh-&gt;close, initrds[k].handle);</div><div class='ctx'> free_initrds:</div><div class='ctx'> 	efi_call_phys1(sys_table-&gt;boottime-&gt;free_pool, initrds);</div><div class='hunk'>@@ -732,8 +771,10 @@ static efi_status_t make_boot_params(struct boot_params *boot_params,</div><div class='ctx'> 			options_size++;	/* NUL termination */</div><div class='ctx'> </div><div class='ctx'> 			status = low_alloc(options_size, 1, &amp;cmdline);</div><div class='del'>-			if (status != EFI_SUCCESS)</div><div class='add'>+			if (status != EFI_SUCCESS) {</div><div class='add'>+				efi_printk("Failed to alloc mem for cmdline\n");</div><div class='ctx'> 				goto fail;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='ctx'> 			s1 = (u8 *)(unsigned long)cmdline;</div><div class='ctx'> 			s2 = (u16 *)options;</div><div class='hunk'>@@ -895,20 +936,32 @@ struct boot_params *efi_main(void *handle, efi_system_table_t *_table)</div><div class='ctx'> </div><div class='ctx'> 	status = efi_call_phys3(sys_table-&gt;boottime-&gt;handle_protocol,</div><div class='ctx'> 				handle, &amp;proto, (void *)&amp;image);</div><div class='del'>-	if (status != EFI_SUCCESS)</div><div class='add'>+	if (status != EFI_SUCCESS) {</div><div class='add'>+		efi_printk("Failed to get handle for LOADED_IMAGE_PROTOCOL\n");</div><div class='ctx'> 		goto fail;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	status = low_alloc(0x4000, 1, (unsigned long *)&amp;boot_params);</div><div class='del'>-	if (status != EFI_SUCCESS)</div><div class='add'>+	if (status != EFI_SUCCESS) {</div><div class='add'>+		efi_printk("Failed to alloc lowmem for boot params\n");</div><div class='ctx'> 		goto fail;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	memset(boot_params, 0x0, 0x4000);</div><div class='ctx'> </div><div class='del'>-	/* Copy first two sectors to boot_params */</div><div class='del'>-	memcpy(boot_params, image-&gt;image_base, 1024);</div><div class='del'>-</div><div class='ctx'> 	hdr = &amp;boot_params-&gt;hdr;</div><div class='ctx'> </div><div class='add'>+	/* Copy the second sector to boot_params */</div><div class='add'>+	memcpy(&amp;hdr-&gt;jump, image-&gt;image_base + 512, 512);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Fill out some of the header fields ourselves because the</div><div class='add'>+	 * EFI firmware loader doesn't load the first sector.</div><div class='add'>+	 */</div><div class='add'>+	hdr-&gt;root_flags = 1;</div><div class='add'>+	hdr-&gt;vid_mode = 0xffff;</div><div class='add'>+	hdr-&gt;boot_flag = 0xAA55;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The EFI firmware loader could have placed the kernel image</div><div class='ctx'> 	 * anywhere in memory, but the kernel has various restrictions</div><div class='hunk'>@@ -925,8 +978,10 @@ struct boot_params *efi_main(void *handle, efi_system_table_t *_table)</div><div class='ctx'> 	if (status != EFI_SUCCESS) {</div><div class='ctx'> 		status = low_alloc(hdr-&gt;init_size, hdr-&gt;kernel_alignment,</div><div class='ctx'> 				   &amp;start);</div><div class='del'>-		if (status != EFI_SUCCESS)</div><div class='add'>+		if (status != EFI_SUCCESS) {</div><div class='add'>+			efi_printk("Failed to alloc mem for kernel\n");</div><div class='ctx'> 			goto fail;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	hdr-&gt;code32_start = (__u32)start;</div><div class='hunk'>@@ -937,19 +992,25 @@ struct boot_params *efi_main(void *handle, efi_system_table_t *_table)</div><div class='ctx'> 	status = efi_call_phys3(sys_table-&gt;boottime-&gt;allocate_pool,</div><div class='ctx'> 				EFI_LOADER_DATA, sizeof(*gdt),</div><div class='ctx'> 				(void **)&amp;gdt);</div><div class='del'>-	if (status != EFI_SUCCESS)</div><div class='add'>+	if (status != EFI_SUCCESS) {</div><div class='add'>+		efi_printk("Failed to alloc mem for gdt structure\n");</div><div class='ctx'> 		goto fail;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	gdt-&gt;size = 0x800;</div><div class='ctx'> 	status = low_alloc(gdt-&gt;size, 8, (unsigned long *)&amp;gdt-&gt;address);</div><div class='del'>-	if (status != EFI_SUCCESS)</div><div class='add'>+	if (status != EFI_SUCCESS) {</div><div class='add'>+		efi_printk("Failed to alloc mem for gdt\n");</div><div class='ctx'> 		goto fail;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	status = efi_call_phys3(sys_table-&gt;boottime-&gt;allocate_pool,</div><div class='ctx'> 				EFI_LOADER_DATA, sizeof(*idt),</div><div class='ctx'> 				(void **)&amp;idt);</div><div class='del'>-	if (status != EFI_SUCCESS)</div><div class='add'>+	if (status != EFI_SUCCESS) {</div><div class='add'>+		efi_printk("Failed to alloc mem for idt structure\n");</div><div class='ctx'> 		goto fail;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	idt-&gt;size = 0;</div><div class='ctx'> 	idt-&gt;address = 0;</div><div class='head'>diff --git a/arch/x86/boot/compressed/eboot.h b/arch/x86/boot/compressed/eboot.h<br/>index 39251663e65b..3b6e15627c55 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/boot/compressed/eboot.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/boot/compressed/eboot.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/boot/compressed/eboot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/boot/compressed/eboot.h</a></div><div class='hunk'>@@ -58,4 +58,10 @@ struct efi_uga_draw_protocol {</div><div class='ctx'> 	void *blt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct efi_simple_text_output_protocol {</div><div class='add'>+	void *reset;</div><div class='add'>+	void *output_string;</div><div class='add'>+	void *test_string;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif /* BOOT_COMPRESSED_EBOOT_H */</div><div class='head'>diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S<br/>index f1bbeeb09148..efe5acfc79c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/boot/header.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/boot/header.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/boot/header.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/boot/header.S</a></div><div class='hunk'>@@ -94,10 +94,10 @@ bs_die:</div><div class='ctx'> </div><div class='ctx'> 	.section ".bsdata", "a"</div><div class='ctx'> bugger_off_msg:</div><div class='del'>-	.ascii	"Direct booting from floppy is no longer supported.\r\n"</div><div class='del'>-	.ascii	"Please use a boot loader program instead.\r\n"</div><div class='add'>+	.ascii	"Direct floppy boot is not supported. "</div><div class='add'>+	.ascii	"Use a boot loader program instead.\r\n"</div><div class='ctx'> 	.ascii	"\n"</div><div class='del'>-	.ascii	"Remove disk and press any key to reboot . . .\r\n"</div><div class='add'>+	.ascii	"Remove disk and press any key to reboot ...\r\n"</div><div class='ctx'> 	.byte	0</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_EFI_STUB</div><div class='hunk'>@@ -111,7 +111,7 @@ coff_header:</div><div class='ctx'> #else</div><div class='ctx'> 	.word	0x8664				# x86-64</div><div class='ctx'> #endif</div><div class='del'>-	.word	2				# nr_sections</div><div class='add'>+	.word	3				# nr_sections</div><div class='ctx'> 	.long	0 				# TimeDateStamp</div><div class='ctx'> 	.long	0				# PointerToSymbolTable</div><div class='ctx'> 	.long	1				# NumberOfSymbols</div><div class='hunk'>@@ -147,7 +147,7 @@ optional_header:</div><div class='ctx'> 	# Filled in by build.c</div><div class='ctx'> 	.long	0x0000				# AddressOfEntryPoint</div><div class='ctx'> </div><div class='del'>-	.long	0x0000				# BaseOfCode</div><div class='add'>+	.long	0x0200				# BaseOfCode</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> 	.long	0				# data</div><div class='ctx'> #endif</div><div class='hunk'>@@ -158,8 +158,8 @@ extra_header_fields:</div><div class='ctx'> #else</div><div class='ctx'> 	.quad	0				# ImageBase</div><div class='ctx'> #endif</div><div class='del'>-	.long	0x1000				# SectionAlignment</div><div class='del'>-	.long	0x200				# FileAlignment</div><div class='add'>+	.long	0x20				# SectionAlignment</div><div class='add'>+	.long	0x20				# FileAlignment</div><div class='ctx'> 	.word	0				# MajorOperatingSystemVersion</div><div class='ctx'> 	.word	0				# MinorOperatingSystemVersion</div><div class='ctx'> 	.word	0				# MajorImageVersion</div><div class='hunk'>@@ -189,7 +189,7 @@ extra_header_fields:</div><div class='ctx'> 	.quad	0				# SizeOfHeapCommit</div><div class='ctx'> #endif</div><div class='ctx'> 	.long	0				# LoaderFlags</div><div class='del'>-	.long	0x1				# NumberOfRvaAndSizes</div><div class='add'>+	.long	0x6				# NumberOfRvaAndSizes</div><div class='ctx'> </div><div class='ctx'> 	.quad	0				# ExportTable</div><div class='ctx'> 	.quad	0				# ImportTable</div><div class='hunk'>@@ -200,8 +200,10 @@ extra_header_fields:</div><div class='ctx'> </div><div class='ctx'> 	# Section table</div><div class='ctx'> section_table:</div><div class='del'>-	.ascii	".text"</div><div class='del'>-	.byte	0</div><div class='add'>+	#</div><div class='add'>+	# The offset &amp; size fields are filled in by build.c.</div><div class='add'>+	#</div><div class='add'>+	.ascii	".setup"</div><div class='ctx'> 	.byte	0</div><div class='ctx'> 	.byte	0</div><div class='ctx'> 	.long	0</div><div class='hunk'>@@ -217,23 +219,40 @@ section_table:</div><div class='ctx'> </div><div class='ctx'> 	#</div><div class='ctx'> 	# The EFI application loader requires a relocation section</div><div class='del'>-	# because EFI applications are relocatable and not having</div><div class='del'>-	# this section seems to confuse it. But since we don't need</div><div class='del'>-	# the loader to fixup any relocs for us just fill it with a</div><div class='del'>-	# single dummy reloc.</div><div class='add'>+	# because EFI applications must be relocatable. The .reloc</div><div class='add'>+	# offset &amp; size fields are filled in by build.c.</div><div class='ctx'> 	#</div><div class='ctx'> 	.ascii	".reloc"</div><div class='ctx'> 	.byte	0</div><div class='ctx'> 	.byte	0</div><div class='del'>-	.long	reloc_end - reloc_start</div><div class='del'>-	.long	reloc_start</div><div class='del'>-	.long	reloc_end - reloc_start		# SizeOfRawData</div><div class='del'>-	.long	reloc_start			# PointerToRawData</div><div class='add'>+	.long	0</div><div class='add'>+	.long	0</div><div class='add'>+	.long	0				# SizeOfRawData</div><div class='add'>+	.long	0				# PointerToRawData</div><div class='ctx'> 	.long	0				# PointerToRelocations</div><div class='ctx'> 	.long	0				# PointerToLineNumbers</div><div class='ctx'> 	.word	0				# NumberOfRelocations</div><div class='ctx'> 	.word	0				# NumberOfLineNumbers</div><div class='ctx'> 	.long	0x42100040			# Characteristics (section flags)</div><div class='add'>+</div><div class='add'>+	#</div><div class='add'>+	# The offset &amp; size fields are filled in by build.c.</div><div class='add'>+	#</div><div class='add'>+	.ascii	".text"</div><div class='add'>+	.byte	0</div><div class='add'>+	.byte	0</div><div class='add'>+	.byte	0</div><div class='add'>+	.long	0</div><div class='add'>+	.long	0x0				# startup_{32,64}</div><div class='add'>+	.long	0				# Size of initialized data</div><div class='add'>+						# on disk</div><div class='add'>+	.long	0x0				# startup_{32,64}</div><div class='add'>+	.long	0				# PointerToRelocations</div><div class='add'>+	.long	0				# PointerToLineNumbers</div><div class='add'>+	.word	0				# NumberOfRelocations</div><div class='add'>+	.word	0				# NumberOfLineNumbers</div><div class='add'>+	.long	0x60500020			# Characteristics (section flags)</div><div class='add'>+</div><div class='ctx'> #endif /* CONFIG_EFI_STUB */</div><div class='ctx'> </div><div class='ctx'> 	# Kernel attributes; used by setup.  This is part 1 of the</div><div class='hunk'>@@ -469,10 +488,3 @@ setup_corrupt:</div><div class='ctx'> </div><div class='ctx'> 	.data</div><div class='ctx'> dummy:	.long	0</div><div class='del'>-</div><div class='del'>-	.section .reloc</div><div class='del'>-reloc_start:</div><div class='del'>-	.long	dummy - reloc_start</div><div class='del'>-	.long	10</div><div class='del'>-	.word	0</div><div class='del'>-reloc_end:</div><div class='head'>diff --git a/arch/x86/boot/main.c b/arch/x86/boot/main.c<br/>index 40358c8905be..cf6083d444f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/boot/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/boot/main.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/boot/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/boot/main.c</a></div><div class='hunk'>@@ -57,14 +57,20 @@ static void copy_boot_params(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Set the keyboard repeat rate to maximum.  Unclear why this</div><div class='add'>+ * Query the keyboard lock status as given by the BIOS, and</div><div class='add'>+ * set the keyboard repeat rate to maximum.  Unclear why the latter</div><div class='ctx'>  * is done here; this might be possible to kill off as stale code.</div><div class='ctx'>  */</div><div class='del'>-static void keyboard_set_repeat(void)</div><div class='add'>+static void keyboard_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct biosregs ireg;</div><div class='add'>+	struct biosregs ireg, oreg;</div><div class='ctx'> 	initregs(&amp;ireg);</div><div class='del'>-	ireg.ax = 0x0305;</div><div class='add'>+</div><div class='add'>+	ireg.ah = 0x02;		/* Get keyboard status */</div><div class='add'>+	intcall(0x16, &amp;ireg, &amp;oreg);</div><div class='add'>+	boot_params.kbd_status = oreg.al;</div><div class='add'>+</div><div class='add'>+	ireg.ax = 0x0305;	/* Set keyboard repeat rate */</div><div class='ctx'> 	intcall(0x16, &amp;ireg, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -151,8 +157,8 @@ void main(void)</div><div class='ctx'> 	/* Detect memory layout */</div><div class='ctx'> 	detect_memory();</div><div class='ctx'> </div><div class='del'>-	/* Set keyboard repeat rate (why?) */</div><div class='del'>-	keyboard_set_repeat();</div><div class='add'>+	/* Set keyboard repeat rate (why?) and query the lock flags */</div><div class='add'>+	keyboard_init();</div><div class='ctx'> </div><div class='ctx'> 	/* Query MCA information */</div><div class='ctx'> 	query_mca();</div><div class='head'>diff --git a/arch/x86/boot/tools/build.c b/arch/x86/boot/tools/build.c<br/>index 24443a332083..4b8e165ee572 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/boot/tools/build.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/boot/tools/build.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/boot/tools/build.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/boot/tools/build.c</a></div><div class='hunk'>@@ -50,6 +50,8 @@ typedef unsigned int   u32;</div><div class='ctx'> u8 buf[SETUP_SECT_MAX*512];</div><div class='ctx'> int is_big_kernel;</div><div class='ctx'> </div><div class='add'>+#define PECOFF_RELOC_RESERVE 0x20</div><div class='add'>+</div><div class='ctx'> /*----------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='ctx'> static const u32 crctab32[] = {</div><div class='hunk'>@@ -133,11 +135,103 @@ static void usage(void)</div><div class='ctx'> 	die("Usage: build setup system [&gt; image]");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int main(int argc, char ** argv)</div><div class='del'>-{</div><div class='ctx'> #ifdef CONFIG_EFI_STUB</div><div class='del'>-	unsigned int file_sz, pe_header;</div><div class='add'>+</div><div class='add'>+static void update_pecoff_section_header(char *section_name, u32 offset, u32 size)</div><div class='add'>+{</div><div class='add'>+	unsigned int pe_header;</div><div class='add'>+	unsigned short num_sections;</div><div class='add'>+	u8 *section;</div><div class='add'>+</div><div class='add'>+	pe_header = get_unaligned_le32(&amp;buf[0x3c]);</div><div class='add'>+	num_sections = get_unaligned_le16(&amp;buf[pe_header + 6]);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_32</div><div class='add'>+	section = &amp;buf[pe_header + 0xa8];</div><div class='add'>+#else</div><div class='add'>+	section = &amp;buf[pe_header + 0xb8];</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+	while (num_sections &gt; 0) {</div><div class='add'>+		if (strncmp((char*)section, section_name, 8) == 0) {</div><div class='add'>+			/* section header size field */</div><div class='add'>+			put_unaligned_le32(size, section + 0x8);</div><div class='add'>+</div><div class='add'>+			/* section header vma field */</div><div class='add'>+			put_unaligned_le32(offset, section + 0xc);</div><div class='add'>+</div><div class='add'>+			/* section header 'size of initialised data' field */</div><div class='add'>+			put_unaligned_le32(size, section + 0x10);</div><div class='add'>+</div><div class='add'>+			/* section header 'file offset' field */</div><div class='add'>+			put_unaligned_le32(offset, section + 0x14);</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		section += 0x28;</div><div class='add'>+		num_sections--;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void update_pecoff_setup_and_reloc(unsigned int size)</div><div class='add'>+{</div><div class='add'>+	u32 setup_offset = 0x200;</div><div class='add'>+	u32 reloc_offset = size - PECOFF_RELOC_RESERVE;</div><div class='add'>+	u32 setup_size = reloc_offset - setup_offset;</div><div class='add'>+</div><div class='add'>+	update_pecoff_section_header(".setup", setup_offset, setup_size);</div><div class='add'>+	update_pecoff_section_header(".reloc", reloc_offset, PECOFF_RELOC_RESERVE);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Modify .reloc section contents with a single entry. The</div><div class='add'>+	 * relocation is applied to offset 10 of the relocation section.</div><div class='add'>+	 */</div><div class='add'>+	put_unaligned_le32(reloc_offset + 10, &amp;buf[reloc_offset]);</div><div class='add'>+	put_unaligned_le32(10, &amp;buf[reloc_offset + 4]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void update_pecoff_text(unsigned int text_start, unsigned int file_sz)</div><div class='add'>+{</div><div class='add'>+	unsigned int pe_header;</div><div class='add'>+	unsigned int text_sz = file_sz - text_start;</div><div class='add'>+</div><div class='add'>+	pe_header = get_unaligned_le32(&amp;buf[0x3c]);</div><div class='add'>+</div><div class='add'>+	/* Size of image */</div><div class='add'>+	put_unaligned_le32(file_sz, &amp;buf[pe_header + 0x50]);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Size of code: Subtract the size of the first sector (512 bytes)</div><div class='add'>+	 * which includes the header.</div><div class='add'>+	 */</div><div class='add'>+	put_unaligned_le32(file_sz - 512, &amp;buf[pe_header + 0x1c]);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_32</div><div class='add'>+	/*</div><div class='add'>+	 * Address of entry point.</div><div class='add'>+	 *</div><div class='add'>+	 * The EFI stub entry point is +16 bytes from the start of</div><div class='add'>+	 * the .text section.</div><div class='add'>+	 */</div><div class='add'>+	put_unaligned_le32(text_start + 16, &amp;buf[pe_header + 0x28]);</div><div class='add'>+#else</div><div class='add'>+	/*</div><div class='add'>+	 * Address of entry point. startup_32 is at the beginning and</div><div class='add'>+	 * the 64-bit entry point (startup_64) is always 512 bytes</div><div class='add'>+	 * after. The EFI stub entry point is 16 bytes after that, as</div><div class='add'>+	 * the first instruction allows legacy loaders to jump over</div><div class='add'>+	 * the EFI stub initialisation</div><div class='add'>+	 */</div><div class='add'>+	put_unaligned_le32(text_start + 528, &amp;buf[pe_header + 0x28]);</div><div class='add'>+#endif /* CONFIG_X86_32 */</div><div class='add'>+</div><div class='add'>+	update_pecoff_section_header(".text", text_start, text_sz);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_EFI_STUB */</div><div class='add'>+</div><div class='add'>+int main(int argc, char ** argv)</div><div class='add'>+{</div><div class='ctx'> 	unsigned int i, sz, setup_sectors;</div><div class='ctx'> 	int c;</div><div class='ctx'> 	u32 sys_size;</div><div class='hunk'>@@ -163,6 +257,12 @@ int main(int argc, char ** argv)</div><div class='ctx'> 		die("Boot block hasn't got boot flag (0xAA55)");</div><div class='ctx'> 	fclose(file);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_EFI_STUB</div><div class='add'>+	/* Reserve 0x20 bytes for .reloc section */</div><div class='add'>+	memset(buf+c, 0, PECOFF_RELOC_RESERVE);</div><div class='add'>+	c += PECOFF_RELOC_RESERVE;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	/* Pad unused space with zeros */</div><div class='ctx'> 	setup_sectors = (c + 511) / 512;</div><div class='ctx'> 	if (setup_sectors &lt; SETUP_SECT_MIN)</div><div class='hunk'>@@ -170,6 +270,10 @@ int main(int argc, char ** argv)</div><div class='ctx'> 	i = setup_sectors*512;</div><div class='ctx'> 	memset(buf+c, 0, i-c);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_EFI_STUB</div><div class='add'>+	update_pecoff_setup_and_reloc(i);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	/* Set the default root device */</div><div class='ctx'> 	put_unaligned_le16(DEFAULT_ROOT_DEV, &amp;buf[508]);</div><div class='ctx'> </div><div class='hunk'>@@ -194,48 +298,8 @@ int main(int argc, char ** argv)</div><div class='ctx'> 	put_unaligned_le32(sys_size, &amp;buf[0x1f4]);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_EFI_STUB</div><div class='del'>-	file_sz = sz + i + ((sys_size * 16) - sz);</div><div class='del'>-</div><div class='del'>-	pe_header = get_unaligned_le32(&amp;buf[0x3c]);</div><div class='del'>-</div><div class='del'>-	/* Size of code */</div><div class='del'>-	put_unaligned_le32(file_sz, &amp;buf[pe_header + 0x1c]);</div><div class='del'>-</div><div class='del'>-	/* Size of image */</div><div class='del'>-	put_unaligned_le32(file_sz, &amp;buf[pe_header + 0x50]);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_X86_32</div><div class='del'>-	/*</div><div class='del'>-	 * Address of entry point.</div><div class='del'>-	 *</div><div class='del'>-	 * The EFI stub entry point is +16 bytes from the start of</div><div class='del'>-	 * the .text section.</div><div class='del'>-	 */</div><div class='del'>-	put_unaligned_le32(i + 16, &amp;buf[pe_header + 0x28]);</div><div class='del'>-</div><div class='del'>-	/* .text size */</div><div class='del'>-	put_unaligned_le32(file_sz, &amp;buf[pe_header + 0xb0]);</div><div class='del'>-</div><div class='del'>-	/* .text size of initialised data */</div><div class='del'>-	put_unaligned_le32(file_sz, &amp;buf[pe_header + 0xb8]);</div><div class='del'>-#else</div><div class='del'>-	/*</div><div class='del'>-	 * Address of entry point. startup_32 is at the beginning and</div><div class='del'>-	 * the 64-bit entry point (startup_64) is always 512 bytes</div><div class='del'>-	 * after. The EFI stub entry point is 16 bytes after that, as</div><div class='del'>-	 * the first instruction allows legacy loaders to jump over</div><div class='del'>-	 * the EFI stub initialisation</div><div class='del'>-	 */</div><div class='del'>-	put_unaligned_le32(i + 528, &amp;buf[pe_header + 0x28]);</div><div class='del'>-</div><div class='del'>-	/* .text size */</div><div class='del'>-	put_unaligned_le32(file_sz, &amp;buf[pe_header + 0xc0]);</div><div class='del'>-</div><div class='del'>-	/* .text size of initialised data */</div><div class='del'>-	put_unaligned_le32(file_sz, &amp;buf[pe_header + 0xc8]);</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_X86_32 */</div><div class='del'>-#endif /* CONFIG_EFI_STUB */</div><div class='add'>+	update_pecoff_text(setup_sectors * 512, sz + i + ((sys_size * 16) - sz));</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	crc = partial_crc32(buf, i, crc);</div><div class='ctx'> 	if (fwrite(buf, 1, i, stdout) != i)</div><div class='head'>diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c<br/>index c799352e24fc..ac7f5cd019e8 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/crypto/aesni-intel_glue.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/crypto/aesni-intel_glue.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/crypto/aesni-intel_glue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/crypto/aesni-intel_glue.c</a></div><div class='hunk'>@@ -222,27 +222,6 @@ static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_alg aesni_alg = {</div><div class='del'>-	.cra_name		= "aes",</div><div class='del'>-	.cra_driver_name	= "aes-aesni",</div><div class='del'>-	.cra_priority		= 300,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_CIPHER,</div><div class='del'>-	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(aesni_alg.cra_list),</div><div class='del'>-	.cra_u	= {</div><div class='del'>-		.cipher	= {</div><div class='del'>-			.cia_min_keysize	= AES_MIN_KEY_SIZE,</div><div class='del'>-			.cia_max_keysize	= AES_MAX_KEY_SIZE,</div><div class='del'>-			.cia_setkey		= aes_set_key,</div><div class='del'>-			.cia_encrypt		= aes_encrypt,</div><div class='del'>-			.cia_decrypt		= aes_decrypt</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));</div><div class='hunk'>@@ -257,27 +236,6 @@ static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)</div><div class='ctx'> 	aesni_dec(ctx, dst, src);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_alg __aesni_alg = {</div><div class='del'>-	.cra_name		= "__aes-aesni",</div><div class='del'>-	.cra_driver_name	= "__driver-aes-aesni",</div><div class='del'>-	.cra_priority		= 0,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_CIPHER,</div><div class='del'>-	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(__aesni_alg.cra_list),</div><div class='del'>-	.cra_u	= {</div><div class='del'>-		.cipher	= {</div><div class='del'>-			.cia_min_keysize	= AES_MIN_KEY_SIZE,</div><div class='del'>-			.cia_max_keysize	= AES_MAX_KEY_SIZE,</div><div class='del'>-			.cia_setkey		= aes_set_key,</div><div class='del'>-			.cia_encrypt		= __aes_encrypt,</div><div class='del'>-			.cia_decrypt		= __aes_decrypt</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int ecb_encrypt(struct blkcipher_desc *desc,</div><div class='ctx'> 		       struct scatterlist *dst, struct scatterlist *src,</div><div class='ctx'> 		       unsigned int nbytes)</div><div class='hunk'>@@ -326,28 +284,6 @@ static int ecb_decrypt(struct blkcipher_desc *desc,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_alg blk_ecb_alg = {</div><div class='del'>-	.cra_name		= "__ecb-aes-aesni",</div><div class='del'>-	.cra_driver_name	= "__driver-ecb-aes-aesni",</div><div class='del'>-	.cra_priority		= 0,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_BLKCIPHER,</div><div class='del'>-	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_blkcipher_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(blk_ecb_alg.cra_list),</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.blkcipher = {</div><div class='del'>-			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='del'>-			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='del'>-			.setkey		= aes_set_key,</div><div class='del'>-			.encrypt	= ecb_encrypt,</div><div class='del'>-			.decrypt	= ecb_decrypt,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int cbc_encrypt(struct blkcipher_desc *desc,</div><div class='ctx'> 		       struct scatterlist *dst, struct scatterlist *src,</div><div class='ctx'> 		       unsigned int nbytes)</div><div class='hunk'>@@ -396,28 +332,6 @@ static int cbc_decrypt(struct blkcipher_desc *desc,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_alg blk_cbc_alg = {</div><div class='del'>-	.cra_name		= "__cbc-aes-aesni",</div><div class='del'>-	.cra_driver_name	= "__driver-cbc-aes-aesni",</div><div class='del'>-	.cra_priority		= 0,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_BLKCIPHER,</div><div class='del'>-	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_blkcipher_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(blk_cbc_alg.cra_list),</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.blkcipher = {</div><div class='del'>-			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='del'>-			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='del'>-			.setkey		= aes_set_key,</div><div class='del'>-			.encrypt	= cbc_encrypt,</div><div class='del'>-			.decrypt	= cbc_decrypt,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> static void ctr_crypt_final(struct crypto_aes_ctx *ctx,</div><div class='ctx'> 			    struct blkcipher_walk *walk)</div><div class='hunk'>@@ -461,29 +375,6 @@ static int ctr_crypt(struct blkcipher_desc *desc,</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static struct crypto_alg blk_ctr_alg = {</div><div class='del'>-	.cra_name		= "__ctr-aes-aesni",</div><div class='del'>-	.cra_driver_name	= "__driver-ctr-aes-aesni",</div><div class='del'>-	.cra_priority		= 0,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_BLKCIPHER,</div><div class='del'>-	.cra_blocksize		= 1,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_blkcipher_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(blk_ctr_alg.cra_list),</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.blkcipher = {</div><div class='del'>-			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='del'>-			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='del'>-			.ivsize		= AES_BLOCK_SIZE,</div><div class='del'>-			.setkey		= aes_set_key,</div><div class='del'>-			.encrypt	= ctr_crypt,</div><div class='del'>-			.decrypt	= ctr_crypt,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key,</div><div class='hunk'>@@ -551,281 +442,65 @@ static void ablk_exit(struct crypto_tfm *tfm)</div><div class='ctx'> 	cryptd_free_ablkcipher(ctx-&gt;cryptd_tfm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ablk_init_common(struct crypto_tfm *tfm,</div><div class='del'>-			     struct cryptd_ablkcipher *cryptd_tfm)</div><div class='add'>+static int ablk_init_common(struct crypto_tfm *tfm, const char *drv_name)</div><div class='ctx'> {</div><div class='ctx'> 	struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct cryptd_ablkcipher *cryptd_tfm;</div><div class='add'>+</div><div class='add'>+	cryptd_tfm = cryptd_alloc_ablkcipher(drv_name, 0, 0);</div><div class='add'>+	if (IS_ERR(cryptd_tfm))</div><div class='add'>+		return PTR_ERR(cryptd_tfm);</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;cryptd_tfm = cryptd_tfm;</div><div class='ctx'> 	tfm-&gt;crt_ablkcipher.reqsize = sizeof(struct ablkcipher_request) +</div><div class='ctx'> 		crypto_ablkcipher_reqsize(&amp;cryptd_tfm-&gt;base);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ablk_ecb_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct cryptd_ablkcipher *cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ecb-aes-aesni", 0, 0);</div><div class='del'>-	if (IS_ERR(cryptd_tfm))</div><div class='del'>-		return PTR_ERR(cryptd_tfm);</div><div class='del'>-	ablk_init_common(tfm, cryptd_tfm);</div><div class='del'>-	return 0;</div><div class='add'>+	return ablk_init_common(tfm, "__driver-ecb-aes-aesni");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_alg ablk_ecb_alg = {</div><div class='del'>-	.cra_name		= "ecb(aes)",</div><div class='del'>-	.cra_driver_name	= "ecb-aes-aesni",</div><div class='del'>-	.cra_priority		= 400,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,</div><div class='del'>-	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(ablk_ecb_alg.cra_list),</div><div class='del'>-	.cra_init		= ablk_ecb_init,</div><div class='del'>-	.cra_exit		= ablk_exit,</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.ablkcipher = {</div><div class='del'>-			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='del'>-			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='del'>-			.setkey		= ablk_set_key,</div><div class='del'>-			.encrypt	= ablk_encrypt,</div><div class='del'>-			.decrypt	= ablk_decrypt,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int ablk_cbc_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct cryptd_ablkcipher *cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	cryptd_tfm = cryptd_alloc_ablkcipher("__driver-cbc-aes-aesni", 0, 0);</div><div class='del'>-	if (IS_ERR(cryptd_tfm))</div><div class='del'>-		return PTR_ERR(cryptd_tfm);</div><div class='del'>-	ablk_init_common(tfm, cryptd_tfm);</div><div class='del'>-	return 0;</div><div class='add'>+	return ablk_init_common(tfm, "__driver-cbc-aes-aesni");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_alg ablk_cbc_alg = {</div><div class='del'>-	.cra_name		= "cbc(aes)",</div><div class='del'>-	.cra_driver_name	= "cbc-aes-aesni",</div><div class='del'>-	.cra_priority		= 400,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,</div><div class='del'>-	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(ablk_cbc_alg.cra_list),</div><div class='del'>-	.cra_init		= ablk_cbc_init,</div><div class='del'>-	.cra_exit		= ablk_exit,</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.ablkcipher = {</div><div class='del'>-			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='del'>-			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='del'>-			.ivsize		= AES_BLOCK_SIZE,</div><div class='del'>-			.setkey		= ablk_set_key,</div><div class='del'>-			.encrypt	= ablk_encrypt,</div><div class='del'>-			.decrypt	= ablk_decrypt,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> static int ablk_ctr_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct cryptd_ablkcipher *cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ctr-aes-aesni", 0, 0);</div><div class='del'>-	if (IS_ERR(cryptd_tfm))</div><div class='del'>-		return PTR_ERR(cryptd_tfm);</div><div class='del'>-	ablk_init_common(tfm, cryptd_tfm);</div><div class='del'>-	return 0;</div><div class='add'>+	return ablk_init_common(tfm, "__driver-ctr-aes-aesni");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_alg ablk_ctr_alg = {</div><div class='del'>-	.cra_name		= "ctr(aes)",</div><div class='del'>-	.cra_driver_name	= "ctr-aes-aesni",</div><div class='del'>-	.cra_priority		= 400,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,</div><div class='del'>-	.cra_blocksize		= 1,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(ablk_ctr_alg.cra_list),</div><div class='del'>-	.cra_init		= ablk_ctr_init,</div><div class='del'>-	.cra_exit		= ablk_exit,</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.ablkcipher = {</div><div class='del'>-			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='del'>-			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='del'>-			.ivsize		= AES_BLOCK_SIZE,</div><div class='del'>-			.setkey		= ablk_set_key,</div><div class='del'>-			.encrypt	= ablk_encrypt,</div><div class='del'>-			.decrypt	= ablk_encrypt,</div><div class='del'>-			.geniv		= "chainiv",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #ifdef HAS_CTR</div><div class='ctx'> static int ablk_rfc3686_ctr_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct cryptd_ablkcipher *cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	cryptd_tfm = cryptd_alloc_ablkcipher(</div><div class='del'>-		"rfc3686(__driver-ctr-aes-aesni)", 0, 0);</div><div class='del'>-	if (IS_ERR(cryptd_tfm))</div><div class='del'>-		return PTR_ERR(cryptd_tfm);</div><div class='del'>-	ablk_init_common(tfm, cryptd_tfm);</div><div class='del'>-	return 0;</div><div class='add'>+	return ablk_init_common(tfm, "rfc3686(__driver-ctr-aes-aesni)");</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static struct crypto_alg ablk_rfc3686_ctr_alg = {</div><div class='del'>-	.cra_name		= "rfc3686(ctr(aes))",</div><div class='del'>-	.cra_driver_name	= "rfc3686-ctr-aes-aesni",</div><div class='del'>-	.cra_priority		= 400,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,</div><div class='del'>-	.cra_blocksize		= 1,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(ablk_rfc3686_ctr_alg.cra_list),</div><div class='del'>-	.cra_init		= ablk_rfc3686_ctr_init,</div><div class='del'>-	.cra_exit		= ablk_exit,</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.ablkcipher = {</div><div class='del'>-			.min_keysize = AES_MIN_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,</div><div class='del'>-			.max_keysize = AES_MAX_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,</div><div class='del'>-			.ivsize	     = CTR_RFC3686_IV_SIZE,</div><div class='del'>-			.setkey	     = ablk_set_key,</div><div class='del'>-			.encrypt     = ablk_encrypt,</div><div class='del'>-			.decrypt     = ablk_decrypt,</div><div class='del'>-			.geniv	     = "seqiv",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef HAS_LRW</div><div class='ctx'> static int ablk_lrw_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct cryptd_ablkcipher *cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	cryptd_tfm = cryptd_alloc_ablkcipher("fpu(lrw(__driver-aes-aesni))",</div><div class='del'>-					     0, 0);</div><div class='del'>-	if (IS_ERR(cryptd_tfm))</div><div class='del'>-		return PTR_ERR(cryptd_tfm);</div><div class='del'>-	ablk_init_common(tfm, cryptd_tfm);</div><div class='del'>-	return 0;</div><div class='add'>+	return ablk_init_common(tfm, "fpu(lrw(__driver-aes-aesni))");</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static struct crypto_alg ablk_lrw_alg = {</div><div class='del'>-	.cra_name		= "lrw(aes)",</div><div class='del'>-	.cra_driver_name	= "lrw-aes-aesni",</div><div class='del'>-	.cra_priority		= 400,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,</div><div class='del'>-	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(ablk_lrw_alg.cra_list),</div><div class='del'>-	.cra_init		= ablk_lrw_init,</div><div class='del'>-	.cra_exit		= ablk_exit,</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.ablkcipher = {</div><div class='del'>-			.min_keysize	= AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,</div><div class='del'>-			.max_keysize	= AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,</div><div class='del'>-			.ivsize		= AES_BLOCK_SIZE,</div><div class='del'>-			.setkey		= ablk_set_key,</div><div class='del'>-			.encrypt	= ablk_encrypt,</div><div class='del'>-			.decrypt	= ablk_decrypt,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef HAS_PCBC</div><div class='ctx'> static int ablk_pcbc_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct cryptd_ablkcipher *cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	cryptd_tfm = cryptd_alloc_ablkcipher("fpu(pcbc(__driver-aes-aesni))",</div><div class='del'>-					     0, 0);</div><div class='del'>-	if (IS_ERR(cryptd_tfm))</div><div class='del'>-		return PTR_ERR(cryptd_tfm);</div><div class='del'>-	ablk_init_common(tfm, cryptd_tfm);</div><div class='del'>-	return 0;</div><div class='add'>+	return ablk_init_common(tfm, "fpu(pcbc(__driver-aes-aesni))");</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static struct crypto_alg ablk_pcbc_alg = {</div><div class='del'>-	.cra_name		= "pcbc(aes)",</div><div class='del'>-	.cra_driver_name	= "pcbc-aes-aesni",</div><div class='del'>-	.cra_priority		= 400,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,</div><div class='del'>-	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(ablk_pcbc_alg.cra_list),</div><div class='del'>-	.cra_init		= ablk_pcbc_init,</div><div class='del'>-	.cra_exit		= ablk_exit,</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.ablkcipher = {</div><div class='del'>-			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='del'>-			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='del'>-			.ivsize		= AES_BLOCK_SIZE,</div><div class='del'>-			.setkey		= ablk_set_key,</div><div class='del'>-			.encrypt	= ablk_encrypt,</div><div class='del'>-			.decrypt	= ablk_decrypt,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef HAS_XTS</div><div class='ctx'> static int ablk_xts_init(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct cryptd_ablkcipher *cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	cryptd_tfm = cryptd_alloc_ablkcipher("fpu(xts(__driver-aes-aesni))",</div><div class='del'>-					     0, 0);</div><div class='del'>-	if (IS_ERR(cryptd_tfm))</div><div class='del'>-		return PTR_ERR(cryptd_tfm);</div><div class='del'>-	ablk_init_common(tfm, cryptd_tfm);</div><div class='del'>-	return 0;</div><div class='add'>+	return ablk_init_common(tfm, "fpu(xts(__driver-aes-aesni))");</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static struct crypto_alg ablk_xts_alg = {</div><div class='del'>-	.cra_name		= "xts(aes)",</div><div class='del'>-	.cra_driver_name	= "xts-aes-aesni",</div><div class='del'>-	.cra_priority		= 400,</div><div class='del'>-	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,</div><div class='del'>-	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='del'>-	.cra_alignmask		= 0,</div><div class='del'>-	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='del'>-	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(ablk_xts_alg.cra_list),</div><div class='del'>-	.cra_init		= ablk_xts_init,</div><div class='del'>-	.cra_exit		= ablk_exit,</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.ablkcipher = {</div><div class='del'>-			.min_keysize	= 2 * AES_MIN_KEY_SIZE,</div><div class='del'>-			.max_keysize	= 2 * AES_MAX_KEY_SIZE,</div><div class='del'>-			.ivsize		= AES_BLOCK_SIZE,</div><div class='del'>-			.setkey		= ablk_set_key,</div><div class='del'>-			.encrypt	= ablk_encrypt,</div><div class='del'>-			.decrypt	= ablk_decrypt,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='hunk'>@@ -1050,32 +725,6 @@ static int rfc4106_decrypt(struct aead_request *req)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_alg rfc4106_alg = {</div><div class='del'>-	.cra_name = "rfc4106(gcm(aes))",</div><div class='del'>-	.cra_driver_name = "rfc4106-gcm-aesni",</div><div class='del'>-	.cra_priority = 400,</div><div class='del'>-	.cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,</div><div class='del'>-	.cra_blocksize = 1,</div><div class='del'>-	.cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) + AESNI_ALIGN,</div><div class='del'>-	.cra_alignmask = 0,</div><div class='del'>-	.cra_type = &amp;crypto_nivaead_type,</div><div class='del'>-	.cra_module = THIS_MODULE,</div><div class='del'>-	.cra_list = LIST_HEAD_INIT(rfc4106_alg.cra_list),</div><div class='del'>-	.cra_init = rfc4106_init,</div><div class='del'>-	.cra_exit = rfc4106_exit,</div><div class='del'>-	.cra_u = {</div><div class='del'>-		.aead = {</div><div class='del'>-			.setkey = rfc4106_set_key,</div><div class='del'>-			.setauthsize = rfc4106_set_authsize,</div><div class='del'>-			.encrypt = rfc4106_encrypt,</div><div class='del'>-			.decrypt = rfc4106_decrypt,</div><div class='del'>-			.geniv = "seqiv",</div><div class='del'>-			.ivsize = 8,</div><div class='del'>-			.maxauthsize = 16,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int __driver_rfc4106_encrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	u8 one_entry_in_sg = 0;</div><div class='hunk'>@@ -1233,26 +882,316 @@ static int __driver_rfc4106_decrypt(struct aead_request *req)</div><div class='ctx'> 	}</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-static struct crypto_alg __rfc4106_alg = {</div><div class='add'>+static struct crypto_alg aesni_algs[] = { {</div><div class='add'>+	.cra_name		= "aes",</div><div class='add'>+	.cra_driver_name	= "aes-aesni",</div><div class='add'>+	.cra_priority		= 300,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_CIPHER,</div><div class='add'>+	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct crypto_aes_ctx) +</div><div class='add'>+				  AESNI_ALIGN - 1,</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_u	= {</div><div class='add'>+		.cipher	= {</div><div class='add'>+			.cia_min_keysize	= AES_MIN_KEY_SIZE,</div><div class='add'>+			.cia_max_keysize	= AES_MAX_KEY_SIZE,</div><div class='add'>+			.cia_setkey		= aes_set_key,</div><div class='add'>+			.cia_encrypt		= aes_encrypt,</div><div class='add'>+			.cia_decrypt		= aes_decrypt</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}, {</div><div class='add'>+	.cra_name		= "__aes-aesni",</div><div class='add'>+	.cra_driver_name	= "__driver-aes-aesni",</div><div class='add'>+	.cra_priority		= 0,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_CIPHER,</div><div class='add'>+	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct crypto_aes_ctx) +</div><div class='add'>+				  AESNI_ALIGN - 1,</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_u	= {</div><div class='add'>+		.cipher	= {</div><div class='add'>+			.cia_min_keysize	= AES_MIN_KEY_SIZE,</div><div class='add'>+			.cia_max_keysize	= AES_MAX_KEY_SIZE,</div><div class='add'>+			.cia_setkey		= aes_set_key,</div><div class='add'>+			.cia_encrypt		= __aes_encrypt,</div><div class='add'>+			.cia_decrypt		= __aes_decrypt</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}, {</div><div class='add'>+	.cra_name		= "__ecb-aes-aesni",</div><div class='add'>+	.cra_driver_name	= "__driver-ecb-aes-aesni",</div><div class='add'>+	.cra_priority		= 0,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_BLKCIPHER,</div><div class='add'>+	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct crypto_aes_ctx) +</div><div class='add'>+				  AESNI_ALIGN - 1,</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_type		= &amp;crypto_blkcipher_type,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_u = {</div><div class='add'>+		.blkcipher = {</div><div class='add'>+			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='add'>+			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='add'>+			.setkey		= aes_set_key,</div><div class='add'>+			.encrypt	= ecb_encrypt,</div><div class='add'>+			.decrypt	= ecb_decrypt,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+}, {</div><div class='add'>+	.cra_name		= "__cbc-aes-aesni",</div><div class='add'>+	.cra_driver_name	= "__driver-cbc-aes-aesni",</div><div class='add'>+	.cra_priority		= 0,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_BLKCIPHER,</div><div class='add'>+	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct crypto_aes_ctx) +</div><div class='add'>+				  AESNI_ALIGN - 1,</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_type		= &amp;crypto_blkcipher_type,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_u = {</div><div class='add'>+		.blkcipher = {</div><div class='add'>+			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='add'>+			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='add'>+			.setkey		= aes_set_key,</div><div class='add'>+			.encrypt	= cbc_encrypt,</div><div class='add'>+			.decrypt	= cbc_decrypt,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+}, {</div><div class='add'>+	.cra_name		= "ecb(aes)",</div><div class='add'>+	.cra_driver_name	= "ecb-aes-aesni",</div><div class='add'>+	.cra_priority		= 400,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,</div><div class='add'>+	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_init		= ablk_ecb_init,</div><div class='add'>+	.cra_exit		= ablk_exit,</div><div class='add'>+	.cra_u = {</div><div class='add'>+		.ablkcipher = {</div><div class='add'>+			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='add'>+			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='add'>+			.setkey		= ablk_set_key,</div><div class='add'>+			.encrypt	= ablk_encrypt,</div><div class='add'>+			.decrypt	= ablk_decrypt,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+}, {</div><div class='add'>+	.cra_name		= "cbc(aes)",</div><div class='add'>+	.cra_driver_name	= "cbc-aes-aesni",</div><div class='add'>+	.cra_priority		= 400,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,</div><div class='add'>+	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_init		= ablk_cbc_init,</div><div class='add'>+	.cra_exit		= ablk_exit,</div><div class='add'>+	.cra_u = {</div><div class='add'>+		.ablkcipher = {</div><div class='add'>+			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='add'>+			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='add'>+			.ivsize		= AES_BLOCK_SIZE,</div><div class='add'>+			.setkey		= ablk_set_key,</div><div class='add'>+			.encrypt	= ablk_encrypt,</div><div class='add'>+			.decrypt	= ablk_decrypt,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+}, {</div><div class='add'>+	.cra_name		= "__ctr-aes-aesni",</div><div class='add'>+	.cra_driver_name	= "__driver-ctr-aes-aesni",</div><div class='add'>+	.cra_priority		= 0,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_BLKCIPHER,</div><div class='add'>+	.cra_blocksize		= 1,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct crypto_aes_ctx) +</div><div class='add'>+				  AESNI_ALIGN - 1,</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_type		= &amp;crypto_blkcipher_type,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_u = {</div><div class='add'>+		.blkcipher = {</div><div class='add'>+			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='add'>+			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='add'>+			.ivsize		= AES_BLOCK_SIZE,</div><div class='add'>+			.setkey		= aes_set_key,</div><div class='add'>+			.encrypt	= ctr_crypt,</div><div class='add'>+			.decrypt	= ctr_crypt,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+}, {</div><div class='add'>+	.cra_name		= "ctr(aes)",</div><div class='add'>+	.cra_driver_name	= "ctr-aes-aesni",</div><div class='add'>+	.cra_priority		= 400,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,</div><div class='add'>+	.cra_blocksize		= 1,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_init		= ablk_ctr_init,</div><div class='add'>+	.cra_exit		= ablk_exit,</div><div class='add'>+	.cra_u = {</div><div class='add'>+		.ablkcipher = {</div><div class='add'>+			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='add'>+			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='add'>+			.ivsize		= AES_BLOCK_SIZE,</div><div class='add'>+			.setkey		= ablk_set_key,</div><div class='add'>+			.encrypt	= ablk_encrypt,</div><div class='add'>+			.decrypt	= ablk_encrypt,</div><div class='add'>+			.geniv		= "chainiv",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+}, {</div><div class='ctx'> 	.cra_name		= "__gcm-aes-aesni",</div><div class='ctx'> 	.cra_driver_name	= "__driver-gcm-aes-aesni",</div><div class='ctx'> 	.cra_priority		= 0,</div><div class='ctx'> 	.cra_flags		= CRYPTO_ALG_TYPE_AEAD,</div><div class='ctx'> 	.cra_blocksize		= 1,</div><div class='del'>-	.cra_ctxsize	= sizeof(struct aesni_rfc4106_gcm_ctx) + AESNI_ALIGN,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct aesni_rfc4106_gcm_ctx) +</div><div class='add'>+				  AESNI_ALIGN,</div><div class='ctx'> 	.cra_alignmask		= 0,</div><div class='ctx'> 	.cra_type		= &amp;crypto_aead_type,</div><div class='ctx'> 	.cra_module		= THIS_MODULE,</div><div class='del'>-	.cra_list		= LIST_HEAD_INIT(__rfc4106_alg.cra_list),</div><div class='ctx'> 	.cra_u = {</div><div class='ctx'> 		.aead = {</div><div class='ctx'> 			.encrypt	= __driver_rfc4106_encrypt,</div><div class='ctx'> 			.decrypt	= __driver_rfc4106_decrypt,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-};</div><div class='add'>+}, {</div><div class='add'>+	.cra_name		= "rfc4106(gcm(aes))",</div><div class='add'>+	.cra_driver_name	= "rfc4106-gcm-aesni",</div><div class='add'>+	.cra_priority		= 400,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,</div><div class='add'>+	.cra_blocksize		= 1,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct aesni_rfc4106_gcm_ctx) +</div><div class='add'>+				  AESNI_ALIGN,</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_type		= &amp;crypto_nivaead_type,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_init		= rfc4106_init,</div><div class='add'>+	.cra_exit		= rfc4106_exit,</div><div class='add'>+	.cra_u = {</div><div class='add'>+		.aead = {</div><div class='add'>+			.setkey		= rfc4106_set_key,</div><div class='add'>+			.setauthsize	= rfc4106_set_authsize,</div><div class='add'>+			.encrypt	= rfc4106_encrypt,</div><div class='add'>+			.decrypt	= rfc4106_decrypt,</div><div class='add'>+			.geniv		= "seqiv",</div><div class='add'>+			.ivsize		= 8,</div><div class='add'>+			.maxauthsize	= 16,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+#ifdef HAS_CTR</div><div class='add'>+}, {</div><div class='add'>+	.cra_name		= "rfc3686(ctr(aes))",</div><div class='add'>+	.cra_driver_name	= "rfc3686-ctr-aes-aesni",</div><div class='add'>+	.cra_priority		= 400,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,</div><div class='add'>+	.cra_blocksize		= 1,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_init		= ablk_rfc3686_ctr_init,</div><div class='add'>+	.cra_exit		= ablk_exit,</div><div class='add'>+	.cra_u = {</div><div class='add'>+		.ablkcipher = {</div><div class='add'>+			.min_keysize = AES_MIN_KEY_SIZE +</div><div class='add'>+				       CTR_RFC3686_NONCE_SIZE,</div><div class='add'>+			.max_keysize = AES_MAX_KEY_SIZE +</div><div class='add'>+				       CTR_RFC3686_NONCE_SIZE,</div><div class='add'>+			.ivsize	     = CTR_RFC3686_IV_SIZE,</div><div class='add'>+			.setkey	     = ablk_set_key,</div><div class='add'>+			.encrypt     = ablk_encrypt,</div><div class='add'>+			.decrypt     = ablk_decrypt,</div><div class='add'>+			.geniv	     = "seqiv",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+#ifdef HAS_LRW</div><div class='add'>+}, {</div><div class='add'>+	.cra_name		= "lrw(aes)",</div><div class='add'>+	.cra_driver_name	= "lrw-aes-aesni",</div><div class='add'>+	.cra_priority		= 400,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,</div><div class='add'>+	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_init		= ablk_lrw_init,</div><div class='add'>+	.cra_exit		= ablk_exit,</div><div class='add'>+	.cra_u = {</div><div class='add'>+		.ablkcipher = {</div><div class='add'>+			.min_keysize	= AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,</div><div class='add'>+			.max_keysize	= AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,</div><div class='add'>+			.ivsize		= AES_BLOCK_SIZE,</div><div class='add'>+			.setkey		= ablk_set_key,</div><div class='add'>+			.encrypt	= ablk_encrypt,</div><div class='add'>+			.decrypt	= ablk_decrypt,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+#ifdef HAS_PCBC</div><div class='add'>+}, {</div><div class='add'>+	.cra_name		= "pcbc(aes)",</div><div class='add'>+	.cra_driver_name	= "pcbc-aes-aesni",</div><div class='add'>+	.cra_priority		= 400,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,</div><div class='add'>+	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_init		= ablk_pcbc_init,</div><div class='add'>+	.cra_exit		= ablk_exit,</div><div class='add'>+	.cra_u = {</div><div class='add'>+		.ablkcipher = {</div><div class='add'>+			.min_keysize	= AES_MIN_KEY_SIZE,</div><div class='add'>+			.max_keysize	= AES_MAX_KEY_SIZE,</div><div class='add'>+			.ivsize		= AES_BLOCK_SIZE,</div><div class='add'>+			.setkey		= ablk_set_key,</div><div class='add'>+			.encrypt	= ablk_encrypt,</div><div class='add'>+			.decrypt	= ablk_decrypt,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> #endif</div><div class='add'>+#ifdef HAS_XTS</div><div class='add'>+}, {</div><div class='add'>+	.cra_name		= "xts(aes)",</div><div class='add'>+	.cra_driver_name	= "xts-aes-aesni",</div><div class='add'>+	.cra_priority		= 400,</div><div class='add'>+	.cra_flags		= CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,</div><div class='add'>+	.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='add'>+	.cra_ctxsize		= sizeof(struct async_aes_ctx),</div><div class='add'>+	.cra_alignmask		= 0,</div><div class='add'>+	.cra_type		= &amp;crypto_ablkcipher_type,</div><div class='add'>+	.cra_module		= THIS_MODULE,</div><div class='add'>+	.cra_init		= ablk_xts_init,</div><div class='add'>+	.cra_exit		= ablk_exit,</div><div class='add'>+	.cra_u = {</div><div class='add'>+		.ablkcipher = {</div><div class='add'>+			.min_keysize	= 2 * AES_MIN_KEY_SIZE,</div><div class='add'>+			.max_keysize	= 2 * AES_MAX_KEY_SIZE,</div><div class='add'>+			.ivsize		= AES_BLOCK_SIZE,</div><div class='add'>+			.setkey		= ablk_set_key,</div><div class='add'>+			.encrypt	= ablk_encrypt,</div><div class='add'>+			.decrypt	= ablk_decrypt,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+} };</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id aesni_cpu_id[] = {</div><div class='hunk'>@@ -1263,120 +1202,24 @@ MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);</div><div class='ctx'> </div><div class='ctx'> static int __init aesni_init(void)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='add'>+	int err, i;</div><div class='ctx'> </div><div class='ctx'> 	if (!x86_match_cpu(aesni_cpu_id))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if ((err = crypto_fpu_init()))</div><div class='del'>-		goto fpu_err;</div><div class='del'>-	if ((err = crypto_register_alg(&amp;aesni_alg)))</div><div class='del'>-		goto aes_err;</div><div class='del'>-	if ((err = crypto_register_alg(&amp;__aesni_alg)))</div><div class='del'>-		goto __aes_err;</div><div class='del'>-	if ((err = crypto_register_alg(&amp;blk_ecb_alg)))</div><div class='del'>-		goto blk_ecb_err;</div><div class='del'>-	if ((err = crypto_register_alg(&amp;blk_cbc_alg)))</div><div class='del'>-		goto blk_cbc_err;</div><div class='del'>-	if ((err = crypto_register_alg(&amp;ablk_ecb_alg)))</div><div class='del'>-		goto ablk_ecb_err;</div><div class='del'>-	if ((err = crypto_register_alg(&amp;ablk_cbc_alg)))</div><div class='del'>-		goto ablk_cbc_err;</div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='del'>-	if ((err = crypto_register_alg(&amp;blk_ctr_alg)))</div><div class='del'>-		goto blk_ctr_err;</div><div class='del'>-	if ((err = crypto_register_alg(&amp;ablk_ctr_alg)))</div><div class='del'>-		goto ablk_ctr_err;</div><div class='del'>-	if ((err = crypto_register_alg(&amp;__rfc4106_alg)))</div><div class='del'>-		goto __aead_gcm_err;</div><div class='del'>-	if ((err = crypto_register_alg(&amp;rfc4106_alg)))</div><div class='del'>-		goto aead_gcm_err;</div><div class='del'>-#ifdef HAS_CTR</div><div class='del'>-	if ((err = crypto_register_alg(&amp;ablk_rfc3686_ctr_alg)))</div><div class='del'>-		goto ablk_rfc3686_ctr_err;</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-#ifdef HAS_LRW</div><div class='del'>-	if ((err = crypto_register_alg(&amp;ablk_lrw_alg)))</div><div class='del'>-		goto ablk_lrw_err;</div><div class='del'>-#endif</div><div class='del'>-#ifdef HAS_PCBC</div><div class='del'>-	if ((err = crypto_register_alg(&amp;ablk_pcbc_alg)))</div><div class='del'>-		goto ablk_pcbc_err;</div><div class='del'>-#endif</div><div class='del'>-#ifdef HAS_XTS</div><div class='del'>-	if ((err = crypto_register_alg(&amp;ablk_xts_alg)))</div><div class='del'>-		goto ablk_xts_err;</div><div class='del'>-#endif</div><div class='del'>-	return err;</div><div class='add'>+	err = crypto_fpu_init();</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-#ifdef HAS_XTS</div><div class='del'>-ablk_xts_err:</div><div class='del'>-#endif</div><div class='del'>-#ifdef HAS_PCBC</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_pcbc_alg);</div><div class='del'>-ablk_pcbc_err:</div><div class='del'>-#endif</div><div class='del'>-#ifdef HAS_LRW</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_lrw_alg);</div><div class='del'>-ablk_lrw_err:</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='del'>-#ifdef HAS_CTR</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_rfc3686_ctr_alg);</div><div class='del'>-ablk_rfc3686_ctr_err:</div><div class='del'>-#endif</div><div class='del'>-	crypto_unregister_alg(&amp;rfc4106_alg);</div><div class='del'>-aead_gcm_err:</div><div class='del'>-	crypto_unregister_alg(&amp;__rfc4106_alg);</div><div class='del'>-__aead_gcm_err:</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_ctr_alg);</div><div class='del'>-ablk_ctr_err:</div><div class='del'>-	crypto_unregister_alg(&amp;blk_ctr_alg);</div><div class='del'>-blk_ctr_err:</div><div class='del'>-#endif</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_cbc_alg);</div><div class='del'>-ablk_cbc_err:</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_ecb_alg);</div><div class='del'>-ablk_ecb_err:</div><div class='del'>-	crypto_unregister_alg(&amp;blk_cbc_alg);</div><div class='del'>-blk_cbc_err:</div><div class='del'>-	crypto_unregister_alg(&amp;blk_ecb_alg);</div><div class='del'>-blk_ecb_err:</div><div class='del'>-	crypto_unregister_alg(&amp;__aesni_alg);</div><div class='del'>-__aes_err:</div><div class='del'>-	crypto_unregister_alg(&amp;aesni_alg);</div><div class='del'>-aes_err:</div><div class='del'>-fpu_err:</div><div class='del'>-	return err;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(aesni_algs); i++)</div><div class='add'>+		INIT_LIST_HEAD(&amp;aesni_algs[i].cra_list);</div><div class='add'>+</div><div class='add'>+	return crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit aesni_exit(void)</div><div class='ctx'> {</div><div class='del'>-#ifdef HAS_XTS</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_xts_alg);</div><div class='del'>-#endif</div><div class='del'>-#ifdef HAS_PCBC</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_pcbc_alg);</div><div class='del'>-#endif</div><div class='del'>-#ifdef HAS_LRW</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_lrw_alg);</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='del'>-#ifdef HAS_CTR</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_rfc3686_ctr_alg);</div><div class='del'>-#endif</div><div class='del'>-	crypto_unregister_alg(&amp;rfc4106_alg);</div><div class='del'>-	crypto_unregister_alg(&amp;__rfc4106_alg);</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_ctr_alg);</div><div class='del'>-	crypto_unregister_alg(&amp;blk_ctr_alg);</div><div class='del'>-#endif</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_cbc_alg);</div><div class='del'>-	crypto_unregister_alg(&amp;ablk_ecb_alg);</div><div class='del'>-	crypto_unregister_alg(&amp;blk_cbc_alg);</div><div class='del'>-	crypto_unregister_alg(&amp;blk_ecb_alg);</div><div class='del'>-	crypto_unregister_alg(&amp;__aesni_alg);</div><div class='del'>-	crypto_unregister_alg(&amp;aesni_alg);</div><div class='add'>+	crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));</div><div class='ctx'> </div><div class='ctx'> 	crypto_fpu_exit();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c<br/>index 4824fb45560f..07b3a68d2d29 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/ia32/ia32_aout.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/ia32/ia32_aout.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/ia32/ia32_aout.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/ia32/ia32_aout.c</a></div><div class='hunk'>@@ -294,8 +294,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	/* OK, This is the point of no return */</div><div class='ctx'> 	set_personality(PER_LINUX);</div><div class='del'>-	set_thread_flag(TIF_IA32);</div><div class='del'>-	current-&gt;mm-&gt;context.ia32_compat = 1;</div><div class='add'>+	set_personality_ia32(false);</div><div class='ctx'> </div><div class='ctx'> 	setup_new_exec(bprm);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/ia32/ia32_signal.c b/arch/x86/ia32/ia32_signal.c<br/>index 0b3f2354f6aa..daeca56211e3 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/ia32/ia32_signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/ia32/ia32_signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/ia32/ia32_signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/ia32/ia32_signal.c</a></div><div class='hunk'>@@ -131,18 +131,8 @@ int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from)</div><div class='ctx'> asmlinkage long sys32_sigsuspend(int history0, int history1, old_sigset_t mask)</div><div class='ctx'> {</div><div class='ctx'> 	sigset_t blocked;</div><div class='del'>-</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='ctx'> 	siginitset(&amp;blocked, mask);</div><div class='del'>-	set_current_blocked(&amp;blocked);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-</div><div class='del'>-	set_restore_sigmask();</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr,</div><div class='hunk'>@@ -283,7 +273,6 @@ asmlinkage long sys32_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 				    sizeof(frame-&gt;extramask))))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (ia32_restore_sigcontext(regs, &amp;frame-&gt;sc, &amp;ax))</div><div class='hunk'>@@ -309,7 +298,6 @@ asmlinkage long sys32_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (ia32_restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext, &amp;ax))</div><div class='head'>diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S<br/>index e3e734005e19..20e5f7ba0e6b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/ia32/ia32entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/ia32/ia32entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/ia32/ia32entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/ia32/ia32entry.S</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;	</div><div class='ctx'> #include &lt;asm/segment.h&gt;</div><div class='ctx'> #include &lt;asm/irqflags.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -146,9 +147,7 @@ ENTRY(ia32_sysenter_target)</div><div class='ctx'>  	/* no need to do an access_ok check here because rbp has been</div><div class='ctx'>  	   32bit zero extended */ </div><div class='ctx'> 1:	movl	(%rbp),%ebp</div><div class='del'>- 	.section __ex_table,"a"</div><div class='del'>- 	.quad 1b,ia32_badarg</div><div class='del'>- 	.previous	</div><div class='add'>+	_ASM_EXTABLE(1b,ia32_badarg)</div><div class='ctx'> 	orl     $TS_COMPAT,TI_status+THREAD_INFO(%rsp,RIP-ARGOFFSET)</div><div class='ctx'> 	testl   $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)</div><div class='ctx'> 	CFI_REMEMBER_STATE</div><div class='hunk'>@@ -303,9 +302,7 @@ ENTRY(ia32_cstar_target)</div><div class='ctx'> 	   32bit zero extended */ </div><div class='ctx'> 	/* hardware stack frame is complete now */	</div><div class='ctx'> 1:	movl	(%r8),%r9d</div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.quad 1b,ia32_badarg</div><div class='del'>-	.previous	</div><div class='add'>+	_ASM_EXTABLE(1b,ia32_badarg)</div><div class='ctx'> 	orl     $TS_COMPAT,TI_status+THREAD_INFO(%rsp,RIP-ARGOFFSET)</div><div class='ctx'> 	testl   $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)</div><div class='ctx'> 	CFI_REMEMBER_STATE</div><div class='head'>diff --git a/arch/x86/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c<br/>index aec2202a596c..4540bece0946 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/ia32/sys_ia32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/ia32/sys_ia32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/ia32/sys_ia32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/ia32/sys_ia32.c</a></div><div class='hunk'>@@ -71,8 +71,8 @@ static int cp_stat64(struct stat64 __user *ubuf, struct kstat *stat)</div><div class='ctx'> {</div><div class='ctx'> 	typeof(ubuf-&gt;st_uid) uid = 0;</div><div class='ctx'> 	typeof(ubuf-&gt;st_gid) gid = 0;</div><div class='del'>-	SET_UID(uid, stat-&gt;uid);</div><div class='del'>-	SET_GID(gid, stat-&gt;gid);</div><div class='add'>+	SET_UID(uid, from_kuid_munged(current_user_ns(), stat-&gt;uid));</div><div class='add'>+	SET_GID(gid, from_kgid_munged(current_user_ns(), stat-&gt;gid));</div><div class='ctx'> 	if (!access_ok(VERIFY_WRITE, ubuf, sizeof(struct stat64)) ||</div><div class='ctx'> 	    __put_user(huge_encode_dev(stat-&gt;dev), &amp;ubuf-&gt;st_dev) ||</div><div class='ctx'> 	    __put_user(stat-&gt;ino, &amp;ubuf-&gt;__st_ino) ||</div><div class='hunk'>@@ -287,11 +287,6 @@ asmlinkage long sys32_sigaction(int sig, struct old_sigaction32 __user *act,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-asmlinkage long sys32_alarm(unsigned int seconds)</div><div class='del'>-{</div><div class='del'>-	return alarm_setitimer(seconds);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> asmlinkage long sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr,</div><div class='ctx'> 			      int options)</div><div class='ctx'> {</div><div class='hunk'>@@ -300,11 +295,6 @@ asmlinkage long sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr,</div><div class='ctx'> </div><div class='ctx'> /* 32-bit timeval and related flotsam.  */</div><div class='ctx'> </div><div class='del'>-asmlinkage long sys32_sysfs(int option, u32 arg1, u32 arg2)</div><div class='del'>-{</div><div class='del'>-	return sys_sysfs(option, arg1, arg2);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> asmlinkage long sys32_sched_rr_get_interval(compat_pid_t pid,</div><div class='ctx'> 				    struct compat_timespec __user *interval)</div><div class='ctx'> {</div><div class='hunk'>@@ -375,19 +365,6 @@ asmlinkage long sys32_pwrite(unsigned int fd, const char __user *ubuf,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-asmlinkage long sys32_personality(unsigned long personality)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (personality(current-&gt;personality) == PER_LINUX32 &amp;&amp;</div><div class='del'>-		personality == PER_LINUX)</div><div class='del'>-		personality = PER_LINUX32;</div><div class='del'>-	ret = sys_personality(personality);</div><div class='del'>-	if (ret == PER_LINUX32)</div><div class='del'>-		ret = PER_LINUX;</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> asmlinkage long sys32_sendfile(int out_fd, int in_fd,</div><div class='ctx'> 			       compat_off_t __user *offset, s32 count)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h<br/>index 610001d385dd..0c44630d1789 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/acpi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/acpi.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/acpi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/acpi.h</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> #include &lt;asm/mpspec.h&gt;</div><div class='del'>-#include &lt;asm/trampoline.h&gt;</div><div class='add'>+#include &lt;asm/realmode.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define COMPILER_DEPENDENT_INT64   long long</div><div class='ctx'> #define COMPILER_DEPENDENT_UINT64  unsigned long long</div><div class='hunk'>@@ -117,11 +117,8 @@ static inline void acpi_disable_pci(void)</div><div class='ctx'> /* Low-level suspend routine. */</div><div class='ctx'> extern int acpi_suspend_lowlevel(void);</div><div class='ctx'> </div><div class='del'>-extern const unsigned char acpi_wakeup_code[];</div><div class='del'>-#define acpi_wakeup_address (__pa(TRAMPOLINE_SYM(acpi_wakeup_code)))</div><div class='del'>-</div><div class='del'>-/* early initialization routine */</div><div class='del'>-extern void acpi_reserve_wakeup_memory(void);</div><div class='add'>+/* Physical address to resume after wakeup */</div><div class='add'>+#define acpi_wakeup_address ((unsigned long)(real_mode_header-&gt;wakeup_start))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Check if the CPU can handle C2 and deeper</div><div class='head'>diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h<br/>index d85410171260..eaff4790ed96 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/apic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/apic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/apic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/apic.h</a></div><div class='hunk'>@@ -138,6 +138,11 @@ static inline void native_apic_msr_write(u32 reg, u32 v)</div><div class='ctx'> 	wrmsr(APIC_BASE_MSR + (reg &gt;&gt; 4), v, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void native_apic_msr_eoi_write(u32 reg, u32 v)</div><div class='add'>+{</div><div class='add'>+	wrmsr(APIC_BASE_MSR + (APIC_EOI &gt;&gt; 4), APIC_EOI_ACK, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u32 native_apic_msr_read(u32 reg)</div><div class='ctx'> {</div><div class='ctx'> 	u64 msr;</div><div class='hunk'>@@ -351,6 +356,14 @@ struct apic {</div><div class='ctx'> 	/* apic ops */</div><div class='ctx'> 	u32 (*read)(u32 reg);</div><div class='ctx'> 	void (*write)(u32 reg, u32 v);</div><div class='add'>+	/*</div><div class='add'>+	 * -&gt;eoi_write() has the same signature as -&gt;write().</div><div class='add'>+	 *</div><div class='add'>+	 * Drivers can support both -&gt;eoi_write() and -&gt;write() by passing the same</div><div class='add'>+	 * callback value. Kernel can override -&gt;eoi_write() and fall back</div><div class='add'>+	 * on write for EOI.</div><div class='add'>+	 */</div><div class='add'>+	void (*eoi_write)(u32 reg, u32 v);</div><div class='ctx'> 	u64 (*icr_read)(void);</div><div class='ctx'> 	void (*icr_write)(u32 low, u32 high);</div><div class='ctx'> 	void (*wait_icr_idle)(void);</div><div class='hunk'>@@ -426,6 +439,11 @@ static inline void apic_write(u32 reg, u32 val)</div><div class='ctx'> 	apic-&gt;write(reg, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void apic_eoi(void)</div><div class='add'>+{</div><div class='add'>+	apic-&gt;eoi_write(APIC_EOI, APIC_EOI_ACK);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u64 apic_icr_read(void)</div><div class='ctx'> {</div><div class='ctx'> 	return apic-&gt;icr_read();</div><div class='hunk'>@@ -450,6 +468,7 @@ static inline u32 safe_apic_wait_icr_idle(void)</div><div class='ctx'> </div><div class='ctx'> static inline u32 apic_read(u32 reg) { return 0; }</div><div class='ctx'> static inline void apic_write(u32 reg, u32 val) { }</div><div class='add'>+static inline void apic_eoi(void) { }</div><div class='ctx'> static inline u64 apic_icr_read(void) { return 0; }</div><div class='ctx'> static inline void apic_icr_write(u32 low, u32 high) { }</div><div class='ctx'> static inline void apic_wait_icr_idle(void) { }</div><div class='hunk'>@@ -463,9 +482,7 @@ static inline void ack_APIC_irq(void)</div><div class='ctx'> 	 * ack_APIC_irq() actually gets compiled as a single instruction</div><div class='ctx'> 	 * ... yummie.</div><div class='ctx'> 	 */</div><div class='del'>-</div><div class='del'>-	/* Docs say use 0 for future compatibility */</div><div class='del'>-	apic_write(APIC_EOI, 0);</div><div class='add'>+	apic_eoi();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned default_get_apic_id(unsigned long x)</div><div class='head'>diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h<br/>index 134bba00df09..c46bb99d5fb2 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/apicdef.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/apicdef.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/apicdef.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/apicdef.h</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> #define		APIC_ARBPRI_MASK	0xFFu</div><div class='ctx'> #define	APIC_PROCPRI	0xA0</div><div class='ctx'> #define	APIC_EOI	0xB0</div><div class='del'>-#define		APIC_EIO_ACK		0x0</div><div class='add'>+#define		APIC_EOI_ACK		0x0 /* Docs say 0 for future compat. */</div><div class='ctx'> #define	APIC_RRR	0xC0</div><div class='ctx'> #define	APIC_LDR	0xD0</div><div class='ctx'> #define		APIC_LDR_MASK		(0xFFu &lt;&lt; 24)</div><div class='head'>diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h<br/>index 9412d6558c88..1c2d247f65ce 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/asm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/asm.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/asm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/asm.h</a></div><div class='hunk'>@@ -4,11 +4,9 @@</div><div class='ctx'> #ifdef __ASSEMBLY__</div><div class='ctx'> # define __ASM_FORM(x)	x</div><div class='ctx'> # define __ASM_FORM_COMMA(x) x,</div><div class='del'>-# define __ASM_EX_SEC	.section __ex_table, "a"</div><div class='ctx'> #else</div><div class='ctx'> # define __ASM_FORM(x)	" " #x " "</div><div class='ctx'> # define __ASM_FORM_COMMA(x) " " #x ","</div><div class='del'>-# define __ASM_EX_SEC	" .section __ex_table,\"a\"\n"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='hunk'>@@ -42,17 +40,33 @@</div><div class='ctx'> </div><div class='ctx'> /* Exception table entry */</div><div class='ctx'> #ifdef __ASSEMBLY__</div><div class='del'>-# define _ASM_EXTABLE(from,to)	    \</div><div class='del'>-	__ASM_EX_SEC ;		    \</div><div class='del'>-	_ASM_ALIGN ;		    \</div><div class='del'>-	_ASM_PTR from , to ;	    \</div><div class='del'>-	.previous</div><div class='add'>+# define _ASM_EXTABLE(from,to)					\</div><div class='add'>+	.pushsection "__ex_table","a" ;				\</div><div class='add'>+	.balign 8 ;						\</div><div class='add'>+	.long (from) - . ;					\</div><div class='add'>+	.long (to) - . ;					\</div><div class='add'>+	.popsection</div><div class='add'>+</div><div class='add'>+# define _ASM_EXTABLE_EX(from,to)				\</div><div class='add'>+	.pushsection "__ex_table","a" ;				\</div><div class='add'>+	.balign 8 ;						\</div><div class='add'>+	.long (from) - . ;					\</div><div class='add'>+	.long (to) - . + 0x7ffffff0 ;				\</div><div class='add'>+	.popsection</div><div class='ctx'> #else</div><div class='del'>-# define _ASM_EXTABLE(from,to) \</div><div class='del'>-	__ASM_EX_SEC	\</div><div class='del'>-	_ASM_ALIGN "\n" \</div><div class='del'>-	_ASM_PTR #from "," #to "\n" \</div><div class='del'>-	" .previous\n"</div><div class='add'>+# define _ASM_EXTABLE(from,to)					\</div><div class='add'>+	" .pushsection \"__ex_table\",\"a\"\n"			\</div><div class='add'>+	" .balign 8\n"						\</div><div class='add'>+	" .long (" #from ") - .\n"				\</div><div class='add'>+	" .long (" #to ") - .\n"				\</div><div class='add'>+	" .popsection\n"</div><div class='add'>+</div><div class='add'>+# define _ASM_EXTABLE_EX(from,to)				\</div><div class='add'>+	" .pushsection \"__ex_table\",\"a\"\n"			\</div><div class='add'>+	" .balign 8\n"						\</div><div class='add'>+	" .long (" #from ") - .\n"				\</div><div class='add'>+	" .long (" #to ") - . + 0x7ffffff0\n"			\</div><div class='add'>+	" .popsection\n"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_X86_ASM_H */</div><div class='head'>diff --git a/arch/x86/include/asm/atomic64_32.h b/arch/x86/include/asm/atomic64_32.h<br/>index 198119910da5..b154de75c90c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/atomic64_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/atomic64_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/atomic64_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/atomic64_32.h</a></div><div class='hunk'>@@ -63,7 +63,7 @@ ATOMIC64_DECL(add_unless);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * atomic64_cmpxchg - cmpxchg atomic64 variable</div><div class='del'>- * @p: pointer to type atomic64_t</div><div class='add'>+ * @v: pointer to type atomic64_t</div><div class='ctx'>  * @o: expected value</div><div class='ctx'>  * @n: new value</div><div class='ctx'>  *</div><div class='hunk'>@@ -98,7 +98,7 @@ static inline long long atomic64_xchg(atomic64_t *v, long long n)</div><div class='ctx'> /**</div><div class='ctx'>  * atomic64_set - set atomic64 variable</div><div class='ctx'>  * @v: pointer to type atomic64_t</div><div class='del'>- * @n: value to assign</div><div class='add'>+ * @i: value to assign</div><div class='ctx'>  *</div><div class='ctx'>  * Atomically sets the value of @v to @n.</div><div class='ctx'>  */</div><div class='hunk'>@@ -200,7 +200,7 @@ static inline long long atomic64_sub(long long i, atomic64_t *v)</div><div class='ctx'>  * atomic64_sub_and_test - subtract value from variable and test result</div><div class='ctx'>  * @i: integer value to subtract</div><div class='ctx'>  * @v: pointer to type atomic64_t</div><div class='del'>-  *</div><div class='add'>+ *</div><div class='ctx'>  * Atomically subtracts @i from @v and returns</div><div class='ctx'>  * true if the result is zero, or false for all</div><div class='ctx'>  * other cases.</div><div class='hunk'>@@ -224,9 +224,9 @@ static inline void atomic64_inc(atomic64_t *v)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * atomic64_dec - decrement atomic64 variable</div><div class='del'>- * @ptr: pointer to type atomic64_t</div><div class='add'>+ * @v: pointer to type atomic64_t</div><div class='ctx'>  *</div><div class='del'>- * Atomically decrements @ptr by 1.</div><div class='add'>+ * Atomically decrements @v by 1.</div><div class='ctx'>  */</div><div class='ctx'> static inline void atomic64_dec(atomic64_t *v)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h<br/>index b97596e2b68c..a6983b277220 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/bitops.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/bitops.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/bitops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/bitops.h</a></div><div class='hunk'>@@ -15,6 +15,8 @@</div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='ctx'> </div><div class='add'>+#define BIT_64(n)			(U64_C(1) &lt;&lt; (n))</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * These have to be done with inline assembly: that way the bit-setting</div><div class='ctx'>  * is guaranteed to be atomic. All bit operations return 0 if the bit</div><div class='head'>diff --git a/arch/x86/include/asm/boot.h b/arch/x86/include/asm/boot.h<br/>index 5e1a2eef3e7c..b13fe63bdc59 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/boot.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/boot.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/boot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/boot.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> #define MIN_KERNEL_ALIGN_LG2	PMD_SHIFT</div><div class='ctx'> #else</div><div class='del'>-#define MIN_KERNEL_ALIGN_LG2	(PAGE_SHIFT + THREAD_ORDER)</div><div class='add'>+#define MIN_KERNEL_ALIGN_LG2	(PAGE_SHIFT + THREAD_SIZE_ORDER)</div><div class='ctx'> #endif</div><div class='ctx'> #define MIN_KERNEL_ALIGN	(_AC(1, UL) &lt;&lt; MIN_KERNEL_ALIGN_LG2)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h<br/>index 2f90c51cc49d..eb45aa6b1f27 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/bootparam.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/bootparam.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/bootparam.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/bootparam.h</a></div><div class='hunk'>@@ -112,7 +112,8 @@ struct boot_params {</div><div class='ctx'> 	__u8  e820_entries;				/* 0x1e8 */</div><div class='ctx'> 	__u8  eddbuf_entries;				/* 0x1e9 */</div><div class='ctx'> 	__u8  edd_mbr_sig_buf_entries;			/* 0x1ea */</div><div class='del'>-	__u8  _pad6[6];					/* 0x1eb */</div><div class='add'>+	__u8  kbd_status;				/* 0x1eb */</div><div class='add'>+	__u8  _pad6[5];					/* 0x1ec */</div><div class='ctx'> 	struct setup_header hdr;    /* setup header */	/* 0x1f1 */</div><div class='ctx'> 	__u8  _pad7[0x290-0x1f1-sizeof(struct setup_header)];</div><div class='ctx'> 	__u32 edd_mbr_sig_buffer[EDD_MBR_SIG_MAX];	/* 0x290 */</div><div class='head'>diff --git a/arch/x86/include/asm/compat.h b/arch/x86/include/asm/compat.h<br/>index d6805798d6fc..fedf32b73e65 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/compat.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/compat.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/compat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/compat.h</a></div><div class='hunk'>@@ -229,7 +229,7 @@ static inline void __user *arch_compat_alloc_user_space(long len)</div><div class='ctx'> 		sp = task_pt_regs(current)-&gt;sp;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* -128 for the x32 ABI redzone */</div><div class='del'>-		sp = percpu_read(old_rsp) - 128;</div><div class='add'>+		sp = this_cpu_read(old_rsp) - 128;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return (void __user *)round_down(sp - len, 16);</div><div class='head'>diff --git a/arch/x86/include/asm/current.h b/arch/x86/include/asm/current.h<br/>index 4d447b732d82..9476c04ee635 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/current.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/current.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/current.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/current.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@ DECLARE_PER_CPU(struct task_struct *, current_task);</div><div class='ctx'> </div><div class='ctx'> static __always_inline struct task_struct *get_current(void)</div><div class='ctx'> {</div><div class='del'>-	return percpu_read_stable(current_task);</div><div class='add'>+	return this_cpu_read_stable(current_task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define current get_current()</div><div class='head'>diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h<br/>index e95822d683f4..8bf1c06070d5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/desc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/desc.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/desc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/desc.h</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;asm/mmu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/percpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> static inline void fill_ldt(struct desc_struct *desc, const struct user_desc *info)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/include/asm/device.h b/arch/x86/include/asm/device.h<br/>index 63a2a03d7d51..93e1c55f14ab 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/device.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/device.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/device.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/device.h</a></div><div class='hunk'>@@ -5,8 +5,8 @@ struct dev_archdata {</div><div class='ctx'> #ifdef CONFIG_ACPI</div><div class='ctx'> 	void	*acpi_handle;</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='del'>-struct dma_map_ops *dma_ops;</div><div class='add'>+#ifdef CONFIG_X86_DEV_DMA_OPS</div><div class='add'>+	struct dma_map_ops *dma_ops;</div><div class='ctx'> #endif</div><div class='ctx'> #if defined(CONFIG_INTEL_IOMMU) || defined(CONFIG_AMD_IOMMU)</div><div class='ctx'> 	void *iommu; /* hook for IOMMU specific extension */</div><div class='head'>diff --git a/arch/x86/include/asm/dma-contiguous.h b/arch/x86/include/asm/dma-contiguous.h<br/>new file mode 100644<br/>index 000000000000..c09241659971<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/dma-contiguous.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/dma-contiguous.h</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+#ifndef ASMX86_DMA_CONTIGUOUS_H</div><div class='add'>+#define ASMX86_DMA_CONTIGUOUS_H</div><div class='add'>+</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm-generic/dma-contiguous.h&gt;</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+dma_contiguous_early_fixup(phys_addr_t base, unsigned long size) { }</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h<br/>index 4b4331d71935..f7b4c7903e7e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/dma-mapping.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/dma-mapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/dma-mapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/dma-mapping.h</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/swiotlb.h&gt;</div><div class='ctx'> #include &lt;asm-generic/dma-coherent.h&gt;</div><div class='add'>+#include &lt;linux/dma-contiguous.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ISA</div><div class='ctx'> # define ISA_DMA_BIT_MASK DMA_BIT_MASK(24)</div><div class='hunk'>@@ -30,7 +31,7 @@ extern struct dma_map_ops *dma_ops;</div><div class='ctx'> </div><div class='ctx'> static inline struct dma_map_ops *get_dma_ops(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_X86_32</div><div class='add'>+#ifndef CONFIG_X86_DEV_DMA_OPS</div><div class='ctx'> 	return dma_ops;</div><div class='ctx'> #else</div><div class='ctx'> 	if (unlikely(!dev) || !dev-&gt;archdata.dma_ops)</div><div class='hunk'>@@ -62,6 +63,16 @@ extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,</div><div class='ctx'> 					dma_addr_t *dma_addr, gfp_t flag,</div><div class='ctx'> 					struct dma_attrs *attrs);</div><div class='ctx'> </div><div class='add'>+extern void dma_generic_free_coherent(struct device *dev, size_t size,</div><div class='add'>+				      void *vaddr, dma_addr_t dma_addr,</div><div class='add'>+				      struct dma_attrs *attrs);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_DMA_REMAP /* Platform code defines bridge-specific code */</div><div class='add'>+extern bool dma_capable(struct device *dev, dma_addr_t addr, size_t size);</div><div class='add'>+extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);</div><div class='add'>+extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);</div><div class='add'>+#else</div><div class='add'>+</div><div class='ctx'> static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	if (!dev-&gt;dma_mask)</div><div class='hunk'>@@ -79,6 +90,7 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)</div><div class='ctx'> {</div><div class='ctx'> 	return daddr;</div><div class='ctx'> }</div><div class='add'>+#endif /* CONFIG_X86_DMA_REMAP */</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='ctx'> dma_cache_sync(struct device *dev, void *vaddr, size_t size,</div><div class='head'>diff --git a/arch/x86/include/asm/fpu-internal.h b/arch/x86/include/asm/fpu-internal.h<br/>index 4fa88154e4de..75f4c6d6a331 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/fpu-internal.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/fpu-internal.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/fpu-internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/fpu-internal.h</a></div><div class='hunk'>@@ -290,14 +290,14 @@ static inline int __thread_has_fpu(struct task_struct *tsk)</div><div class='ctx'> static inline void __thread_clear_has_fpu(struct task_struct *tsk)</div><div class='ctx'> {</div><div class='ctx'> 	tsk-&gt;thread.fpu.has_fpu = 0;</div><div class='del'>-	percpu_write(fpu_owner_task, NULL);</div><div class='add'>+	this_cpu_write(fpu_owner_task, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Must be paired with a 'clts' before! */</div><div class='ctx'> static inline void __thread_set_has_fpu(struct task_struct *tsk)</div><div class='ctx'> {</div><div class='ctx'> 	tsk-&gt;thread.fpu.has_fpu = 1;</div><div class='del'>-	percpu_write(fpu_owner_task, tsk);</div><div class='add'>+	this_cpu_write(fpu_owner_task, tsk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -344,7 +344,7 @@ typedef struct { int preload; } fpu_switch_t;</div><div class='ctx'>  */</div><div class='ctx'> static inline int fpu_lazy_restore(struct task_struct *new, unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	return new == percpu_read_stable(fpu_owner_task) &amp;&amp;</div><div class='add'>+	return new == this_cpu_read_stable(fpu_owner_task) &amp;&amp;</div><div class='ctx'> 		cpu == new-&gt;thread.fpu.last_cpu;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/ftrace.h b/arch/x86/include/asm/ftrace.h<br/>index 268c783ab1c0..b0767bc08740 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/ftrace.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/ftrace.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/ftrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/ftrace.h</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> extern void mcount(void);</div><div class='add'>+extern atomic_t modifying_ftrace_code;</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long ftrace_call_adjust(unsigned long addr)</div><div class='ctx'> {</div><div class='hunk'>@@ -50,6 +51,8 @@ struct dyn_arch_ftrace {</div><div class='ctx'> 	/* No extra data needed for x86 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+int ftrace_int3_handler(struct pt_regs *regs);</div><div class='add'>+</div><div class='ctx'> #endif /*  CONFIG_DYNAMIC_FTRACE */</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> #endif /* CONFIG_FUNCTION_TRACER */</div><div class='head'>diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h<br/>index 91d915a65259..b3799d88ffcf 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/gpio.h</a></div><div class='hunk'>@@ -1,53 +1,4 @@</div><div class='del'>-/*</div><div class='del'>- * Generic GPIO API implementation for x86.</div><div class='del'>- *</div><div class='del'>- * Derived from the generic GPIO API for powerpc:</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2007-2008  MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * Author: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _ASM_X86_GPIO_H</div><div class='del'>-#define _ASM_X86_GPIO_H</div><div class='del'>-</div><div class='del'>-#include &lt;asm-generic/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_GPIOLIB</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Just call gpiolib.</div><div class='del'>- */</div><div class='del'>-static inline int gpio_get_value(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_get_value(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void gpio_set_value(unsigned int gpio, int value)</div><div class='del'>-{</div><div class='del'>-	__gpio_set_value(gpio, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_cansleep(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_cansleep(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_to_irq(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_to_irq(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int irq_to_gpio(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_GPIOLIB */</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_X86_GPIO_H */</div><div class='add'>+#ifndef __LINUX_GPIO_H</div><div class='add'>+#warning Include linux/gpio.h instead of asm/gpio.h</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h<br/>index 382f75d735f3..d3895dbf4ddb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/hardirq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/hardirq.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/hardirq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/hardirq.h</a></div><div class='hunk'>@@ -35,14 +35,15 @@ DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);</div><div class='ctx'> </div><div class='ctx'> #define __ARCH_IRQ_STAT</div><div class='ctx'> </div><div class='del'>-#define inc_irq_stat(member)	percpu_inc(irq_stat.member)</div><div class='add'>+#define inc_irq_stat(member)	this_cpu_inc(irq_stat.member)</div><div class='ctx'> </div><div class='del'>-#define local_softirq_pending()	percpu_read(irq_stat.__softirq_pending)</div><div class='add'>+#define local_softirq_pending()	this_cpu_read(irq_stat.__softirq_pending)</div><div class='ctx'> </div><div class='ctx'> #define __ARCH_SET_SOFTIRQ_PENDING</div><div class='ctx'> </div><div class='del'>-#define set_softirq_pending(x)	percpu_write(irq_stat.__softirq_pending, (x))</div><div class='del'>-#define or_softirq_pending(x)	percpu_or(irq_stat.__softirq_pending, (x))</div><div class='add'>+#define set_softirq_pending(x)	\</div><div class='add'>+		this_cpu_write(irq_stat.__softirq_pending, (x))</div><div class='add'>+#define or_softirq_pending(x)	this_cpu_or(irq_stat.__softirq_pending, (x))</div><div class='ctx'> </div><div class='ctx'> extern void ack_bad_irq(unsigned int irq);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h<br/>index 2c4943de5150..73d8c5398ea9 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/io_apic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/io_apic.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/io_apic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/io_apic.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #include &lt;asm/mpspec.h&gt;</div><div class='ctx'> #include &lt;asm/apicdef.h&gt;</div><div class='ctx'> #include &lt;asm/irq_vectors.h&gt;</div><div class='del'>-</div><div class='add'>+#include &lt;asm/x86_init.h&gt;</div><div class='ctx'> /*</div><div class='ctx'>  * Intel IO-APIC support for SMP and UP systems.</div><div class='ctx'>  *</div><div class='hunk'>@@ -21,15 +21,6 @@</div><div class='ctx'> #define IO_APIC_REDIR_LEVEL_TRIGGER	(1 &lt;&lt; 15)</div><div class='ctx'> #define IO_APIC_REDIR_MASKED		(1 &lt;&lt; 16)</div><div class='ctx'> </div><div class='del'>-struct io_apic_ops {</div><div class='del'>-	void		(*init)  (void);</div><div class='del'>-	unsigned int	(*read)  (unsigned int apic, unsigned int reg);</div><div class='del'>-	void		(*write) (unsigned int apic, unsigned int reg, unsigned int value);</div><div class='del'>-	void		(*modify)(unsigned int apic, unsigned int reg, unsigned int value);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init set_io_apic_ops(const struct io_apic_ops *);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The structure of the IO-APIC:</div><div class='ctx'>  */</div><div class='hunk'>@@ -156,7 +147,6 @@ struct io_apic_irq_attr;</div><div class='ctx'> extern int io_apic_set_pci_routing(struct device *dev, int irq,</div><div class='ctx'> 		 struct io_apic_irq_attr *irq_attr);</div><div class='ctx'> void setup_IO_APIC_irq_extra(u32 gsi);</div><div class='del'>-extern void ioapic_and_gsi_init(void);</div><div class='ctx'> extern void ioapic_insert_resources(void);</div><div class='ctx'> </div><div class='ctx'> int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr);</div><div class='hunk'>@@ -185,12 +175,29 @@ extern void mp_save_irq(struct mpc_intsrc *m);</div><div class='ctx'> </div><div class='ctx'> extern void disable_ioapic_support(void);</div><div class='ctx'> </div><div class='add'>+extern void __init native_io_apic_init_mappings(void);</div><div class='add'>+extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);</div><div class='add'>+extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);</div><div class='add'>+extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);</div><div class='add'>+</div><div class='add'>+static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	return x86_io_apic_ops.read(apic, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)</div><div class='add'>+{</div><div class='add'>+	x86_io_apic_ops.write(apic, reg, value);</div><div class='add'>+}</div><div class='add'>+static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)</div><div class='add'>+{</div><div class='add'>+	x86_io_apic_ops.modify(apic, reg, value);</div><div class='add'>+}</div><div class='ctx'> #else  /* !CONFIG_X86_IO_APIC */</div><div class='ctx'> </div><div class='ctx'> #define io_apic_assign_pci_irqs 0</div><div class='ctx'> #define setup_ioapic_ids_from_mpc x86_init_noop</div><div class='ctx'> static const int timer_through_8259 = 0;</div><div class='del'>-static inline void ioapic_and_gsi_init(void) { }</div><div class='ctx'> static inline void ioapic_insert_resources(void) { }</div><div class='ctx'> #define gsi_top (NR_IRQS_LEGACY)</div><div class='ctx'> static inline int mp_find_ioapic(u32 gsi) { return 0; }</div><div class='hunk'>@@ -212,6 +219,10 @@ static inline int restore_ioapic_entries(void)</div><div class='ctx'> </div><div class='ctx'> static inline void mp_save_irq(struct mpc_intsrc *m) { };</div><div class='ctx'> static inline void disable_ioapic_support(void) { }</div><div class='add'>+#define native_io_apic_init_mappings	NULL</div><div class='add'>+#define native_io_apic_read		NULL</div><div class='add'>+#define native_io_apic_write		NULL</div><div class='add'>+#define native_io_apic_modify		NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_X86_IO_APIC_H */</div><div class='head'>diff --git a/arch/x86/include/asm/irq_regs.h b/arch/x86/include/asm/irq_regs.h<br/>index 77843225b7ea..d82250b1debb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/irq_regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/irq_regs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/irq_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/irq_regs.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@ DECLARE_PER_CPU(struct pt_regs *, irq_regs);</div><div class='ctx'> </div><div class='ctx'> static inline struct pt_regs *get_irq_regs(void)</div><div class='ctx'> {</div><div class='del'>-	return percpu_read(irq_regs);</div><div class='add'>+	return this_cpu_read(irq_regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)</div><div class='hunk'>@@ -23,7 +23,7 @@ static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)</div><div class='ctx'> 	struct pt_regs *old_regs;</div><div class='ctx'> </div><div class='ctx'> 	old_regs = get_irq_regs();</div><div class='del'>-	percpu_write(irq_regs, new_regs);</div><div class='add'>+	this_cpu_write(irq_regs, new_regs);</div><div class='ctx'> </div><div class='ctx'> 	return old_regs;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h<br/>index 47d99934580f..5fb9bbbd2f14 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/irq_remapping.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/irq_remapping.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/irq_remapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/irq_remapping.h</a></div><div class='hunk'>@@ -1,45 +1,101 @@</div><div class='del'>-#ifndef _ASM_X86_IRQ_REMAPPING_H</div><div class='del'>-#define _ASM_X86_IRQ_REMAPPING_H</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 Advanced Micro Devices, Inc.</div><div class='add'>+ * Author: Joerg Roedel &lt;joerg.roedel@amd.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ * by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA</div><div class='add'>+ *</div><div class='add'>+ * This header file contains the interface of the interrupt remapping code to</div><div class='add'>+ * the x86 interrupt management code.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-#define IRTE_DEST(dest) ((x2apic_mode) ? dest : dest &lt;&lt; 8)</div><div class='add'>+#ifndef __X86_IRQ_REMAPPING_H</div><div class='add'>+#define __X86_IRQ_REMAPPING_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/io_apic.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_IRQ_REMAP</div><div class='del'>-static void irq_remap_modify_chip_defaults(struct irq_chip *chip);</div><div class='del'>-static inline void prepare_irte(struct irte *irte, int vector,</div><div class='del'>-			        unsigned int dest)</div><div class='add'>+</div><div class='add'>+extern int irq_remapping_enabled;</div><div class='add'>+</div><div class='add'>+extern void setup_irq_remapping_ops(void);</div><div class='add'>+extern int irq_remapping_supported(void);</div><div class='add'>+extern int irq_remapping_prepare(void);</div><div class='add'>+extern int irq_remapping_enable(void);</div><div class='add'>+extern void irq_remapping_disable(void);</div><div class='add'>+extern int irq_remapping_reenable(int);</div><div class='add'>+extern int irq_remap_enable_fault_handling(void);</div><div class='add'>+extern int setup_ioapic_remapped_entry(int irq,</div><div class='add'>+				       struct IO_APIC_route_entry *entry,</div><div class='add'>+				       unsigned int destination,</div><div class='add'>+				       int vector,</div><div class='add'>+				       struct io_apic_irq_attr *attr);</div><div class='add'>+extern int set_remapped_irq_affinity(struct irq_data *data,</div><div class='add'>+				     const struct cpumask *mask,</div><div class='add'>+				     bool force);</div><div class='add'>+extern void free_remapped_irq(int irq);</div><div class='add'>+extern void compose_remapped_msi_msg(struct pci_dev *pdev,</div><div class='add'>+				     unsigned int irq, unsigned int dest,</div><div class='add'>+				     struct msi_msg *msg, u8 hpet_id);</div><div class='add'>+extern int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec);</div><div class='add'>+extern int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,</div><div class='add'>+				  int index, int sub_handle);</div><div class='add'>+extern int setup_hpet_msi_remapped(unsigned int irq, unsigned int id);</div><div class='add'>+</div><div class='add'>+#else  /* CONFIG_IRQ_REMAP */</div><div class='add'>+</div><div class='add'>+#define irq_remapping_enabled	0</div><div class='add'>+</div><div class='add'>+static inline void setup_irq_remapping_ops(void) { }</div><div class='add'>+static inline int irq_remapping_supported(void) { return 0; }</div><div class='add'>+static inline int irq_remapping_prepare(void) { return -ENODEV; }</div><div class='add'>+static inline int irq_remapping_enable(void) { return -ENODEV; }</div><div class='add'>+static inline void irq_remapping_disable(void) { }</div><div class='add'>+static inline int irq_remapping_reenable(int eim) { return -ENODEV; }</div><div class='add'>+static inline int irq_remap_enable_fault_handling(void) { return -ENODEV; }</div><div class='add'>+static inline int setup_ioapic_remapped_entry(int irq,</div><div class='add'>+					      struct IO_APIC_route_entry *entry,</div><div class='add'>+					      unsigned int destination,</div><div class='add'>+					      int vector,</div><div class='add'>+					      struct io_apic_irq_attr *attr)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+static inline int set_remapped_irq_affinity(struct irq_data *data,</div><div class='add'>+					    const struct cpumask *mask,</div><div class='add'>+					    bool force)</div><div class='ctx'> {</div><div class='del'>-	memset(irte, 0, sizeof(*irte));</div><div class='del'>-</div><div class='del'>-	irte-&gt;present = 1;</div><div class='del'>-	irte-&gt;dst_mode = apic-&gt;irq_dest_mode;</div><div class='del'>-	/*</div><div class='del'>-	 * Trigger mode in the IRTE will always be edge, and for IO-APIC, the</div><div class='del'>-	 * actual level or edge trigger will be setup in the IO-APIC</div><div class='del'>-	 * RTE. This will help simplify level triggered irq migration.</div><div class='del'>-	 * For more details, see the comments (in io_apic.c) explainig IO-APIC</div><div class='del'>-	 * irq migration in the presence of interrupt-remapping.</div><div class='del'>-	*/</div><div class='del'>-	irte-&gt;trigger_mode = 0;</div><div class='del'>-	irte-&gt;dlvry_mode = apic-&gt;irq_delivery_mode;</div><div class='del'>-	irte-&gt;vector = vector;</div><div class='del'>-	irte-&gt;dest_id = IRTE_DEST(dest);</div><div class='del'>-	irte-&gt;redir_hint = 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='del'>-static inline bool irq_remapped(struct irq_cfg *cfg)</div><div class='add'>+static inline void free_remapped_irq(int irq) { }</div><div class='add'>+static inline void compose_remapped_msi_msg(struct pci_dev *pdev,</div><div class='add'>+					    unsigned int irq, unsigned int dest,</div><div class='add'>+					    struct msi_msg *msg, u8 hpet_id)</div><div class='ctx'> {</div><div class='del'>-	return cfg-&gt;irq_2_iommu.iommu != NULL;</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-static void prepare_irte(struct irte *irte, int vector, unsigned int dest)</div><div class='add'>+static inline int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)</div><div class='ctx'> {</div><div class='add'>+	return -ENODEV;</div><div class='ctx'> }</div><div class='del'>-static inline bool irq_remapped(struct irq_cfg *cfg)</div><div class='add'>+static inline int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,</div><div class='add'>+					 int index, int sub_handle)</div><div class='ctx'> {</div><div class='del'>-	return false;</div><div class='add'>+	return -ENODEV;</div><div class='ctx'> }</div><div class='del'>-static inline void irq_remap_modify_chip_defaults(struct irq_chip *chip)</div><div class='add'>+static inline int setup_hpet_msi_remapped(unsigned int irq, unsigned int id)</div><div class='ctx'> {</div><div class='add'>+	return -ENODEV;</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='add'>+#endif /* CONFIG_IRQ_REMAP */</div><div class='ctx'> </div><div class='del'>-#endif	/* _ASM_X86_IRQ_REMAPPING_H */</div><div class='add'>+#endif /* __X86_IRQ_REMAPPING_H */</div><div class='head'>diff --git a/arch/x86/include/asm/kbdleds.h b/arch/x86/include/asm/kbdleds.h<br/>new file mode 100644<br/>index 000000000000..f27ac5ff597d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/kbdleds.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/kbdleds.h</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+#ifndef _ASM_X86_KBDLEDS_H</div><div class='add'>+#define _ASM_X86_KBDLEDS_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Some laptops take the 789uiojklm,. keys as number pad when NumLock is on.</div><div class='add'>+ * This seems a good reason to start with NumLock off. That's why on X86 we</div><div class='add'>+ * ask the bios for the correct state.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+</div><div class='add'>+static inline int kbd_defleds(void)</div><div class='add'>+{</div><div class='add'>+	return boot_params.kbd_status &amp; 0x20 ? (1 &lt;&lt; VC_NUMLOCK) : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_X86_KBDLEDS_H */</div><div class='head'>diff --git a/arch/x86/include/asm/kdebug.h b/arch/x86/include/asm/kdebug.h<br/>index d73f1571bde7..2c37aadcbc35 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/kdebug.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/kdebug.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/kdebug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/kdebug.h</a></div><div class='hunk'>@@ -24,7 +24,6 @@ enum die_val {</div><div class='ctx'> extern void printk_address(unsigned long address, int reliable);</div><div class='ctx'> extern void die(const char *, struct pt_regs *,long);</div><div class='ctx'> extern int __must_check __die(const char *, struct pt_regs *, long);</div><div class='del'>-extern void show_registers(struct pt_regs *regs);</div><div class='ctx'> extern void show_trace(struct task_struct *t, struct pt_regs *regs,</div><div class='ctx'> 		       unsigned long *sp, unsigned long bp);</div><div class='ctx'> extern void __show_regs(struct pt_regs *regs, int all);</div><div class='head'>diff --git a/arch/x86/include/asm/kvm_emulate.h b/arch/x86/include/asm/kvm_emulate.h<br/>index c222e1a1b12a..1ac46c22dd50 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/kvm_emulate.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/kvm_emulate.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/kvm_emulate.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/kvm_emulate.h</a></div><div class='hunk'>@@ -200,7 +200,7 @@ typedef u32 __attribute__((vector_size(16))) sse128_t;</div><div class='ctx'> </div><div class='ctx'> /* Type, address-of, and value of an instruction's operand. */</div><div class='ctx'> struct operand {</div><div class='del'>-	enum { OP_REG, OP_MEM, OP_IMM, OP_XMM, OP_NONE } type;</div><div class='add'>+	enum { OP_REG, OP_MEM, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;</div><div class='ctx'> 	unsigned int bytes;</div><div class='ctx'> 	union {</div><div class='ctx'> 		unsigned long orig_val;</div><div class='hunk'>@@ -213,12 +213,14 @@ struct operand {</div><div class='ctx'> 			unsigned seg;</div><div class='ctx'> 		} mem;</div><div class='ctx'> 		unsigned xmm;</div><div class='add'>+		unsigned mm;</div><div class='ctx'> 	} addr;</div><div class='ctx'> 	union {</div><div class='ctx'> 		unsigned long val;</div><div class='ctx'> 		u64 val64;</div><div class='ctx'> 		char valptr[sizeof(unsigned long) + 2];</div><div class='ctx'> 		sse128_t vec_val;</div><div class='add'>+		u64 mm_val;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h<br/>index e216ba066e79..db7c1f2709a2 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/kvm_host.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/kvm_host.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/kvm_host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #include &lt;asm/mtrr.h&gt;</div><div class='ctx'> #include &lt;asm/msr-index.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define KVM_MAX_VCPUS 254</div><div class='ctx'> #define KVM_SOFT_MAX_VCPUS 160</div><div class='hunk'>@@ -172,6 +173,9 @@ enum {</div><div class='ctx'> #define DR7_FIXED_1	0x00000400</div><div class='ctx'> #define DR7_VOLATILE	0xffff23ff</div><div class='ctx'> </div><div class='add'>+/* apic attention bits */</div><div class='add'>+#define KVM_APIC_CHECK_VAPIC	0</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * We don't want allocation failures within the mmu code, so we preallocate</div><div class='ctx'>  * enough memory for a single page fault in a cache.</div><div class='hunk'>@@ -237,8 +241,6 @@ struct kvm_mmu_page {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	int write_flooding_count;</div><div class='del'>-</div><div class='del'>-	struct rcu_head rcu;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_pio_request {</div><div class='hunk'>@@ -337,6 +339,7 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	u64 efer;</div><div class='ctx'> 	u64 apic_base;</div><div class='ctx'> 	struct kvm_lapic *apic;    /* kernel irqchip context */</div><div class='add'>+	unsigned long apic_attention;</div><div class='ctx'> 	int32_t apic_arb_prio;</div><div class='ctx'> 	int mp_state;</div><div class='ctx'> 	int sipi_vector;</div><div class='hunk'>@@ -536,8 +539,6 @@ struct kvm_arch {</div><div class='ctx'> 	u64 hv_guest_os_id;</div><div class='ctx'> 	u64 hv_hypercall;</div><div class='ctx'> </div><div class='del'>-	atomic_t reader_counter;</div><div class='del'>-</div><div class='ctx'> 	#ifdef CONFIG_KVM_MMU_AUDIT</div><div class='ctx'> 	int audit_point;</div><div class='ctx'> 	#endif</div><div class='hunk'>@@ -712,8 +713,9 @@ void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,</div><div class='ctx'> </div><div class='ctx'> int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);</div><div class='ctx'> void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);</div><div class='del'>-int kvm_mmu_rmap_write_protect(struct kvm *kvm, u64 gfn,</div><div class='del'>-			       struct kvm_memory_slot *slot);</div><div class='add'>+void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,</div><div class='add'>+				     struct kvm_memory_slot *slot,</div><div class='add'>+				     gfn_t gfn_offset, unsigned long mask);</div><div class='ctx'> void kvm_mmu_zap_all(struct kvm *kvm);</div><div class='ctx'> unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);</div><div class='ctx'> void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);</div><div class='hunk'>@@ -921,9 +923,7 @@ extern bool kvm_rebooting;</div><div class='ctx'> 	__ASM_SIZE(push) " $666b \n\t"	      \</div><div class='ctx'> 	"call kvm_spurious_fault \n\t"	      \</div><div class='ctx'> 	".popsection \n\t" \</div><div class='del'>-	".pushsection __ex_table, \"a\" \n\t" \</div><div class='del'>-	_ASM_PTR " 666b, 667b \n\t" \</div><div class='del'>-	".popsection"</div><div class='add'>+	_ASM_EXTABLE(666b, 667b)</div><div class='ctx'> </div><div class='ctx'> #define __kvm_handle_fault_on_reboot(insn)		\</div><div class='ctx'> 	____kvm_handle_fault_on_reboot(insn, "")</div><div class='head'>diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h<br/>index 734c3767cfac..63ab1661d00e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/kvm_para.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/kvm_para.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -95,6 +95,14 @@ struct kvm_vcpu_pv_apf_data {</div><div class='ctx'> extern void kvmclock_init(void);</div><div class='ctx'> extern int kvm_register_clock(char *txt);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM_CLOCK</div><div class='add'>+bool kvm_check_and_clear_guest_paused(void);</div><div class='add'>+#else</div><div class='add'>+static inline bool kvm_check_and_clear_guest_paused(void)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_KVMCLOCK */</div><div class='ctx'> </div><div class='ctx'> /* This instruction is vmcall.  On non-VT architectures, it will generate a</div><div class='ctx'>  * trap that we will then rewrite to the appropriate instruction.</div><div class='hunk'>@@ -170,14 +178,19 @@ static inline int kvm_para_available(void)</div><div class='ctx'> 	unsigned int eax, ebx, ecx, edx;</div><div class='ctx'> 	char signature[13];</div><div class='ctx'> </div><div class='del'>-	cpuid(KVM_CPUID_SIGNATURE, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='del'>-	memcpy(signature + 0, &amp;ebx, 4);</div><div class='del'>-	memcpy(signature + 4, &amp;ecx, 4);</div><div class='del'>-	memcpy(signature + 8, &amp;edx, 4);</div><div class='del'>-	signature[12] = 0;</div><div class='add'>+	if (boot_cpu_data.cpuid_level &lt; 0)</div><div class='add'>+		return 0;	/* So we don't blow up on old processors */</div><div class='add'>+</div><div class='add'>+	if (cpu_has_hypervisor) {</div><div class='add'>+		cpuid(KVM_CPUID_SIGNATURE, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+		memcpy(signature + 0, &amp;ebx, 4);</div><div class='add'>+		memcpy(signature + 4, &amp;ecx, 4);</div><div class='add'>+		memcpy(signature + 8, &amp;edx, 4);</div><div class='add'>+		signature[12] = 0;</div><div class='ctx'> </div><div class='del'>-	if (strcmp(signature, "KVMKVMKVM") == 0)</div><div class='del'>-		return 1;</div><div class='add'>+		if (strcmp(signature, "KVMKVMKVM") == 0)</div><div class='add'>+			return 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/include/asm/mca.h b/arch/x86/include/asm/mca.h<br/>deleted file mode 100644<br/>index eedbb6cc1efb..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/mca.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/mca.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,43 +0,0 @@</div><div class='del'>-/* -*- mode: c; c-basic-offset: 8 -*- */</div><div class='del'>-</div><div class='del'>-/* Platform specific MCA defines */</div><div class='del'>-#ifndef _ASM_X86_MCA_H</div><div class='del'>-#define _ASM_X86_MCA_H</div><div class='del'>-</div><div class='del'>-/* Maximal number of MCA slots - actually, some machines have less, but</div><div class='del'>- * they all have sufficient number of POS registers to cover 8.</div><div class='del'>- */</div><div class='del'>-#define MCA_MAX_SLOT_NR  8</div><div class='del'>-</div><div class='del'>-/* Most machines have only one MCA bus.  The only multiple bus machines</div><div class='del'>- * I know have at most two */</div><div class='del'>-#define MAX_MCA_BUSSES 2</div><div class='del'>-</div><div class='del'>-#define MCA_PRIMARY_BUS		0</div><div class='del'>-#define MCA_SECONDARY_BUS	1</div><div class='del'>-</div><div class='del'>-/* Dummy slot numbers on primary MCA for integrated functions */</div><div class='del'>-#define MCA_INTEGSCSI	(MCA_MAX_SLOT_NR)</div><div class='del'>-#define MCA_INTEGVIDEO	(MCA_MAX_SLOT_NR+1)</div><div class='del'>-#define MCA_MOTHERBOARD (MCA_MAX_SLOT_NR+2)</div><div class='del'>-</div><div class='del'>-/* Dummy POS values for integrated functions */</div><div class='del'>-#define MCA_DUMMY_POS_START	0x10000</div><div class='del'>-#define MCA_INTEGSCSI_POS	(MCA_DUMMY_POS_START+1)</div><div class='del'>-#define MCA_INTEGVIDEO_POS	(MCA_DUMMY_POS_START+2)</div><div class='del'>-#define MCA_MOTHERBOARD_POS	(MCA_DUMMY_POS_START+3)</div><div class='del'>-</div><div class='del'>-/* MCA registers */</div><div class='del'>-</div><div class='del'>-#define MCA_MOTHERBOARD_SETUP_REG	0x94</div><div class='del'>-#define MCA_ADAPTER_SETUP_REG		0x96</div><div class='del'>-#define MCA_POS_REG(n)			(0x100+(n))</div><div class='del'>-</div><div class='del'>-#define MCA_ENABLED	0x01	/* POS 2, set if adapter enabled */</div><div class='del'>-</div><div class='del'>-/* Max number of adapters, including both slots and various integrated</div><div class='del'>- * things.</div><div class='del'>- */</div><div class='del'>-#define MCA_NUMADAPTERS (MCA_MAX_SLOT_NR+3)</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_X86_MCA_H */</div><div class='head'>diff --git a/arch/x86/include/asm/mca_dma.h b/arch/x86/include/asm/mca_dma.h<br/>deleted file mode 100644<br/>index 45271aef82dd..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/mca_dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/mca_dma.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,201 +0,0 @@</div><div class='del'>-#ifndef _ASM_X86_MCA_DMA_H</div><div class='del'>-#define _ASM_X86_MCA_DMA_H</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Microchannel specific DMA stuff.  DMA on an MCA machine is fairly similar to</div><div class='del'>- *   standard PC dma, but it certainly has its quirks.  DMA register addresses</div><div class='del'>- *   are in a different place and there are some added functions.  Most of this</div><div class='del'>- *   should be pretty obvious on inspection.  Note that the user must divide</div><div class='del'>- *   count by 2 when using 16-bit dma; that is not handled by these functions.</div><div class='del'>- *</div><div class='del'>- * Ramen Noodles are yummy.</div><div class='del'>- *</div><div class='del'>- *  1998 Tymm Twillman &lt;tymm@computer.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Registers that are used by the DMA controller; FN is the function register</div><div class='del'>- *   (tell the controller what to do) and EXE is the execution register (how</div><div class='del'>- *   to do it)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define MCA_DMA_REG_FN  0x18</div><div class='del'>-#define MCA_DMA_REG_EXE 0x1A</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Functions that the DMA controller can do</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define MCA_DMA_FN_SET_IO       0x00</div><div class='del'>-#define MCA_DMA_FN_SET_ADDR     0x20</div><div class='del'>-#define MCA_DMA_FN_GET_ADDR     0x30</div><div class='del'>-#define MCA_DMA_FN_SET_COUNT    0x40</div><div class='del'>-#define MCA_DMA_FN_GET_COUNT    0x50</div><div class='del'>-#define MCA_DMA_FN_GET_STATUS   0x60</div><div class='del'>-#define MCA_DMA_FN_SET_MODE     0x70</div><div class='del'>-#define MCA_DMA_FN_SET_ARBUS    0x80</div><div class='del'>-#define MCA_DMA_FN_MASK         0x90</div><div class='del'>-#define MCA_DMA_FN_RESET_MASK   0xA0</div><div class='del'>-#define MCA_DMA_FN_MASTER_CLEAR 0xD0</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Modes (used by setting MCA_DMA_FN_MODE in the function register)</div><div class='del'>- *</div><div class='del'>- * Note that the MODE_READ is read from memory (write to device), and</div><div class='del'>- *   MODE_WRITE is vice-versa.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define MCA_DMA_MODE_XFER  0x04  /* read by default */</div><div class='del'>-#define MCA_DMA_MODE_READ  0x04  /* same as XFER */</div><div class='del'>-#define MCA_DMA_MODE_WRITE 0x08  /* OR with MODE_XFER to use */</div><div class='del'>-#define MCA_DMA_MODE_IO    0x01  /* DMA from IO register */</div><div class='del'>-#define MCA_DMA_MODE_16    0x40  /* 16 bit xfers */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_enable_dma	-	channel to enable DMA on</div><div class='del'>- *	@dmanr: DMA channel</div><div class='del'>- *</div><div class='del'>- *	Enable the MCA bus DMA on a channel. This can be called from</div><div class='del'>- *	IRQ context.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline void mca_enable_dma(unsigned int dmanr)</div><div class='del'>-{</div><div class='del'>-	outb(MCA_DMA_FN_RESET_MASK | dmanr, MCA_DMA_REG_FN);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_disble_dma	-	channel to disable DMA on</div><div class='del'>- *	@dmanr: DMA channel</div><div class='del'>- *</div><div class='del'>- *	Enable the MCA bus DMA on a channel. This can be called from</div><div class='del'>- *	IRQ context.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline void mca_disable_dma(unsigned int dmanr)</div><div class='del'>-{</div><div class='del'>-	outb(MCA_DMA_FN_MASK | dmanr, MCA_DMA_REG_FN);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_set_dma_addr -	load a 24bit DMA address</div><div class='del'>- *	@dmanr: DMA channel</div><div class='del'>- *	@a: 24bit bus address</div><div class='del'>- *</div><div class='del'>- *	Load the address register in the DMA controller. This has a 24bit</div><div class='del'>- *	limitation (16Mb).</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline void mca_set_dma_addr(unsigned int dmanr, unsigned int a)</div><div class='del'>-{</div><div class='del'>-	outb(MCA_DMA_FN_SET_ADDR | dmanr, MCA_DMA_REG_FN);</div><div class='del'>-	outb(a &amp; 0xff, MCA_DMA_REG_EXE);</div><div class='del'>-	outb((a &gt;&gt; 8) &amp; 0xff, MCA_DMA_REG_EXE);</div><div class='del'>-	outb((a &gt;&gt; 16) &amp; 0xff, MCA_DMA_REG_EXE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_get_dma_addr -	load a 24bit DMA address</div><div class='del'>- *	@dmanr: DMA channel</div><div class='del'>- *</div><div class='del'>- *	Read the address register in the DMA controller. This has a 24bit</div><div class='del'>- *	limitation (16Mb). The return is a bus address.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline unsigned int mca_get_dma_addr(unsigned int dmanr)</div><div class='del'>-{</div><div class='del'>-	unsigned int addr;</div><div class='del'>-</div><div class='del'>-	outb(MCA_DMA_FN_GET_ADDR | dmanr, MCA_DMA_REG_FN);</div><div class='del'>-	addr = inb(MCA_DMA_REG_EXE);</div><div class='del'>-	addr |= inb(MCA_DMA_REG_EXE) &lt;&lt; 8;</div><div class='del'>-	addr |= inb(MCA_DMA_REG_EXE) &lt;&lt; 16;</div><div class='del'>-</div><div class='del'>-	return addr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_set_dma_count -	load a 16bit transfer count</div><div class='del'>- *	@dmanr: DMA channel</div><div class='del'>- *	@count: count</div><div class='del'>- *</div><div class='del'>- *	Set the DMA count for this channel. This can be up to 64Kbytes.</div><div class='del'>- *	Setting a count of zero will not do what you expect.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline void mca_set_dma_count(unsigned int dmanr, unsigned int count)</div><div class='del'>-{</div><div class='del'>-	count--;  /* transfers one more than count -- correct for this */</div><div class='del'>-</div><div class='del'>-	outb(MCA_DMA_FN_SET_COUNT | dmanr, MCA_DMA_REG_FN);</div><div class='del'>-	outb(count &amp; 0xff, MCA_DMA_REG_EXE);</div><div class='del'>-	outb((count &gt;&gt; 8) &amp; 0xff, MCA_DMA_REG_EXE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_get_dma_residue -	get the remaining bytes to transfer</div><div class='del'>- *	@dmanr: DMA channel</div><div class='del'>- *</div><div class='del'>- *	This function returns the number of bytes left to transfer</div><div class='del'>- *	on this DMA channel.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline unsigned int mca_get_dma_residue(unsigned int dmanr)</div><div class='del'>-{</div><div class='del'>-	unsigned short count;</div><div class='del'>-</div><div class='del'>-	outb(MCA_DMA_FN_GET_COUNT | dmanr, MCA_DMA_REG_FN);</div><div class='del'>-	count = 1 + inb(MCA_DMA_REG_EXE);</div><div class='del'>-	count += inb(MCA_DMA_REG_EXE) &lt;&lt; 8;</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_set_dma_io -	set the port for an I/O transfer</div><div class='del'>- *	@dmanr: DMA channel</div><div class='del'>- *	@io_addr: an I/O port number</div><div class='del'>- *</div><div class='del'>- *	Unlike the ISA bus DMA controllers the DMA on MCA bus can transfer</div><div class='del'>- *	with an I/O port target.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline void mca_set_dma_io(unsigned int dmanr, unsigned int io_addr)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * DMA from a port address -- set the io address</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	outb(MCA_DMA_FN_SET_IO | dmanr, MCA_DMA_REG_FN);</div><div class='del'>-	outb(io_addr &amp; 0xff, MCA_DMA_REG_EXE);</div><div class='del'>-	outb((io_addr &gt;&gt;  8) &amp; 0xff, MCA_DMA_REG_EXE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_set_dma_mode -	set the DMA mode</div><div class='del'>- *	@dmanr: DMA channel</div><div class='del'>- *	@mode: mode to set</div><div class='del'>- *</div><div class='del'>- *	The DMA controller supports several modes. The mode values you can</div><div class='del'>- *	set are-</div><div class='del'>- *</div><div class='del'>- *	%MCA_DMA_MODE_READ when reading from the DMA device.</div><div class='del'>- *</div><div class='del'>- *	%MCA_DMA_MODE_WRITE to writing to the DMA device.</div><div class='del'>- *</div><div class='del'>- *	%MCA_DMA_MODE_IO to do DMA to or from an I/O port.</div><div class='del'>- *</div><div class='del'>- *	%MCA_DMA_MODE_16 to do 16bit transfers.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline void mca_set_dma_mode(unsigned int dmanr, unsigned int mode)</div><div class='del'>-{</div><div class='del'>-	outb(MCA_DMA_FN_SET_MODE | dmanr, MCA_DMA_REG_FN);</div><div class='del'>-	outb(mode, MCA_DMA_REG_EXE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_X86_MCA_DMA_H */</div><div class='head'>diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h<br/>index 69021528b43c..cdbf36776106 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/mmu_context.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/mmu_context.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/mmu_context.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -25,8 +25,8 @@ void destroy_context(struct mm_struct *mm);</div><div class='ctx'> static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-	if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK)</div><div class='del'>-		percpu_write(cpu_tlbstate.state, TLBSTATE_LAZY);</div><div class='add'>+	if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK)</div><div class='add'>+		this_cpu_write(cpu_tlbstate.state, TLBSTATE_LAZY);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -37,8 +37,8 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,</div><div class='ctx'> </div><div class='ctx'> 	if (likely(prev != next)) {</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-		percpu_write(cpu_tlbstate.state, TLBSTATE_OK);</div><div class='del'>-		percpu_write(cpu_tlbstate.active_mm, next);</div><div class='add'>+		this_cpu_write(cpu_tlbstate.state, TLBSTATE_OK);</div><div class='add'>+		this_cpu_write(cpu_tlbstate.active_mm, next);</div><div class='ctx'> #endif</div><div class='ctx'> 		cpumask_set_cpu(cpu, mm_cpumask(next));</div><div class='ctx'> </div><div class='hunk'>@@ -56,8 +56,8 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	else {</div><div class='del'>-		percpu_write(cpu_tlbstate.state, TLBSTATE_OK);</div><div class='del'>-		BUG_ON(percpu_read(cpu_tlbstate.active_mm) != next);</div><div class='add'>+		this_cpu_write(cpu_tlbstate.state, TLBSTATE_OK);</div><div class='add'>+		BUG_ON(this_cpu_read(cpu_tlbstate.active_mm) != next);</div><div class='ctx'> </div><div class='ctx'> 		if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next))) {</div><div class='ctx'> 			/* We were in lazy tlb mode and leave_mm disabled</div><div class='head'>diff --git a/arch/x86/include/asm/mmzone_32.h b/arch/x86/include/asm/mmzone_32.h<br/>index 55728e121473..eb05fb3b02fb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/mmzone_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/mmzone_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/mmzone_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/mmzone_32.h</a></div><div class='hunk'>@@ -61,10 +61,4 @@ static inline int pfn_valid(int pfn)</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_DISCONTIGMEM */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_NEED_MULTIPLE_NODES</div><div class='del'>-/* always use node 0 for bootmem on this numa platform */</div><div class='del'>-#define bootmem_arch_preferred_node(__bdata, size, align, goal, limit)	\</div><div class='del'>-	(NODE_DATA(0)-&gt;bdata)</div><div class='del'>-#endif /* CONFIG_NEED_MULTIPLE_NODES */</div><div class='del'>-</div><div class='ctx'> #endif /* _ASM_X86_MMZONE_32_H */</div><div class='head'>diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h<br/>index 9c7d95f6174b..3e2f42a4b872 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/mpspec.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/mpspec.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/mpspec.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/mpspec.h</a></div><div class='hunk'>@@ -40,7 +40,7 @@ extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_X86_64 */</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_MCA) || defined(CONFIG_EISA)</div><div class='add'>+#ifdef CONFIG_EISA</div><div class='ctx'> extern int mp_bus_id_to_type[MAX_MP_BUSSES];</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/mpspec_def.h b/arch/x86/include/asm/mpspec_def.h<br/>index c0a955a9a087..b31f8c098271 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/mpspec_def.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/mpspec_def.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/mpspec_def.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/mpspec_def.h</a></div><div class='hunk'>@@ -84,7 +84,7 @@ struct mpc_bus {</div><div class='ctx'> #define BUSTYPE_EISA	"EISA"</div><div class='ctx'> #define BUSTYPE_ISA	"ISA"</div><div class='ctx'> #define BUSTYPE_INTERN	"INTERN"	/* Internal BUS */</div><div class='del'>-#define BUSTYPE_MCA	"MCA"</div><div class='add'>+#define BUSTYPE_MCA	"MCA"		/* Obsolete */</div><div class='ctx'> #define BUSTYPE_VL	"VL"		/* Local bus */</div><div class='ctx'> #define BUSTYPE_PCI	"PCI"</div><div class='ctx'> #define BUSTYPE_PCMCIA	"PCMCIA"</div><div class='hunk'>@@ -169,6 +169,5 @@ enum mp_bustype {</div><div class='ctx'> 	MP_BUS_ISA = 1,</div><div class='ctx'> 	MP_BUS_EISA,</div><div class='ctx'> 	MP_BUS_PCI,</div><div class='del'>-	MP_BUS_MCA,</div><div class='ctx'> };</div><div class='ctx'> #endif /* _ASM_X86_MPSPEC_DEF_H */</div><div class='head'>diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h<br/>index ccb805966f68..957ec87385af 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/msr-index.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/msr-index.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/msr-index.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/msr-index.h</a></div><div class='hunk'>@@ -134,6 +134,8 @@</div><div class='ctx'> #define MSR_AMD64_IBSFETCHCTL		0xc0011030</div><div class='ctx'> #define MSR_AMD64_IBSFETCHLINAD		0xc0011031</div><div class='ctx'> #define MSR_AMD64_IBSFETCHPHYSAD	0xc0011032</div><div class='add'>+#define MSR_AMD64_IBSFETCH_REG_COUNT	3</div><div class='add'>+#define MSR_AMD64_IBSFETCH_REG_MASK	((1UL&lt;&lt;MSR_AMD64_IBSFETCH_REG_COUNT)-1)</div><div class='ctx'> #define MSR_AMD64_IBSOPCTL		0xc0011033</div><div class='ctx'> #define MSR_AMD64_IBSOPRIP		0xc0011034</div><div class='ctx'> #define MSR_AMD64_IBSOPDATA		0xc0011035</div><div class='hunk'>@@ -141,8 +143,11 @@</div><div class='ctx'> #define MSR_AMD64_IBSOPDATA3		0xc0011037</div><div class='ctx'> #define MSR_AMD64_IBSDCLINAD		0xc0011038</div><div class='ctx'> #define MSR_AMD64_IBSDCPHYSAD		0xc0011039</div><div class='add'>+#define MSR_AMD64_IBSOP_REG_COUNT	7</div><div class='add'>+#define MSR_AMD64_IBSOP_REG_MASK	((1UL&lt;&lt;MSR_AMD64_IBSOP_REG_COUNT)-1)</div><div class='ctx'> #define MSR_AMD64_IBSCTL		0xc001103a</div><div class='ctx'> #define MSR_AMD64_IBSBRTARGET		0xc001103b</div><div class='add'>+#define MSR_AMD64_IBS_REG_COUNT_MAX	8 /* includes MSR_AMD64_IBSBRTARGET */</div><div class='ctx'> </div><div class='ctx'> /* Fam 15h MSRs */</div><div class='ctx'> #define MSR_F15H_PERF_CTL		0xc0010200</div><div class='head'>diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h<br/>index 95203d40ffdd..084ef95274cd 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/msr.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/msr.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/msr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/msr.h</a></div><div class='hunk'>@@ -169,14 +169,7 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)</div><div class='ctx'> 	return native_write_msr_safe(msr, low, high);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * rdmsr with exception handling.</div><div class='del'>- *</div><div class='del'>- * Please note that the exception handling works only after we've</div><div class='del'>- * switched to the "smart" #GP handler in trap_init() which knows about</div><div class='del'>- * exception tables - using this macro earlier than that causes machine</div><div class='del'>- * hangs on boxes which do not implement the @msr in the first argument.</div><div class='del'>- */</div><div class='add'>+/* rdmsr with exception handling */</div><div class='ctx'> #define rdmsr_safe(msr, p1, p2)					\</div><div class='ctx'> ({								\</div><div class='ctx'> 	int __err;						\</div><div class='head'>diff --git a/arch/x86/include/asm/nmi.h b/arch/x86/include/asm/nmi.h<br/>index fd3f9f18cf3f..dc580c42851c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/nmi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/nmi.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/nmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/nmi.h</a></div><div class='hunk'>@@ -27,6 +27,8 @@ void arch_trigger_all_cpu_backtrace(void);</div><div class='ctx'> enum {</div><div class='ctx'> 	NMI_LOCAL=0,</div><div class='ctx'> 	NMI_UNKNOWN,</div><div class='add'>+	NMI_SERR,</div><div class='add'>+	NMI_IO_CHECK,</div><div class='ctx'> 	NMI_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -35,8 +37,38 @@ enum {</div><div class='ctx'> </div><div class='ctx'> typedef int (*nmi_handler_t)(unsigned int, struct pt_regs *);</div><div class='ctx'> </div><div class='del'>-int register_nmi_handler(unsigned int, nmi_handler_t, unsigned long,</div><div class='del'>-			 const char *);</div><div class='add'>+struct nmiaction {</div><div class='add'>+	struct list_head	list;</div><div class='add'>+	nmi_handler_t		handler;</div><div class='add'>+	unsigned long		flags;</div><div class='add'>+	const char		*name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define register_nmi_handler(t, fn, fg, n)		\</div><div class='add'>+({							\</div><div class='add'>+	static struct nmiaction fn##_na = {		\</div><div class='add'>+		.handler = (fn),			\</div><div class='add'>+		.name = (n),				\</div><div class='add'>+		.flags = (fg),				\</div><div class='add'>+	};						\</div><div class='add'>+	__register_nmi_handler((t), &amp;fn##_na);	\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For special handlers that register/unregister in the</div><div class='add'>+ * init section only.  This should be considered rare.</div><div class='add'>+ */</div><div class='add'>+#define register_nmi_handler_initonly(t, fn, fg, n)		\</div><div class='add'>+({							\</div><div class='add'>+	static struct nmiaction fn##_na __initdata = {		\</div><div class='add'>+		.handler = (fn),			\</div><div class='add'>+		.name = (n),				\</div><div class='add'>+		.flags = (fg),				\</div><div class='add'>+	};						\</div><div class='add'>+	__register_nmi_handler((t), &amp;fn##_na);	\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+int __register_nmi_handler(unsigned int, struct nmiaction *);</div><div class='ctx'> </div><div class='ctx'> void unregister_nmi_handler(unsigned int, const char *);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/nops.h b/arch/x86/include/asm/nops.h<br/>index 405b4032a60b..aff2b3356101 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/nops.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/nops.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/nops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/nops.h</a></div><div class='hunk'>@@ -87,7 +87,11 @@</div><div class='ctx'> #define P6_NOP8	0x0f,0x1f,0x84,0x00,0,0,0,0</div><div class='ctx'> #define P6_NOP5_ATOMIC P6_NOP5</div><div class='ctx'> </div><div class='add'>+#ifdef __ASSEMBLY__</div><div class='add'>+#define _ASM_MK_NOP(x) .byte x</div><div class='add'>+#else</div><div class='ctx'> #define _ASM_MK_NOP(x) ".byte " __stringify(x) "\n"</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_MK7)</div><div class='ctx'> #define ASM_NOP1 _ASM_MK_NOP(K7_NOP1)</div><div class='head'>diff --git a/arch/x86/include/asm/page_32_types.h b/arch/x86/include/asm/page_32_types.h<br/>index ade619ff9e2a..ef17af013475 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/page_32_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/page_32_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/page_32_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/page_32_types.h</a></div><div class='hunk'>@@ -15,8 +15,8 @@</div><div class='ctx'>  */</div><div class='ctx'> #define __PAGE_OFFSET		_AC(CONFIG_PAGE_OFFSET, UL)</div><div class='ctx'> </div><div class='del'>-#define THREAD_ORDER	1</div><div class='del'>-#define THREAD_SIZE 	(PAGE_SIZE &lt;&lt; THREAD_ORDER)</div><div class='add'>+#define THREAD_SIZE_ORDER	1</div><div class='add'>+#define THREAD_SIZE		(PAGE_SIZE &lt;&lt; THREAD_SIZE_ORDER)</div><div class='ctx'> </div><div class='ctx'> #define STACKFAULT_STACK 0</div><div class='ctx'> #define DOUBLEFAULT_STACK 1</div><div class='head'>diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h<br/>index 7639dbf5d223..320f7bb95f76 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/page_64_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/page_64_types.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/page_64_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/page_64_types.h</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> #ifndef _ASM_X86_PAGE_64_DEFS_H</div><div class='ctx'> #define _ASM_X86_PAGE_64_DEFS_H</div><div class='ctx'> </div><div class='del'>-#define THREAD_ORDER	1</div><div class='del'>-#define THREAD_SIZE  (PAGE_SIZE &lt;&lt; THREAD_ORDER)</div><div class='add'>+#define THREAD_SIZE_ORDER	1</div><div class='add'>+#define THREAD_SIZE  (PAGE_SIZE &lt;&lt; THREAD_SIZE_ORDER)</div><div class='ctx'> #define CURRENT_MASK (~(THREAD_SIZE - 1))</div><div class='ctx'> </div><div class='ctx'> #define EXCEPTION_STACK_ORDER 0</div><div class='head'>diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h<br/>index aa0f91308367..6cbbabf52707 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/paravirt.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/paravirt.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/paravirt.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/paravirt.h</a></div><div class='hunk'>@@ -1023,10 +1023,8 @@ extern void default_banner(void);</div><div class='ctx'> 		  call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs)		\</div><div class='ctx'> 		 )</div><div class='ctx'> </div><div class='del'>-#define GET_CR2_INTO_RCX				\</div><div class='del'>-	call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2);	\</div><div class='del'>-	movq %rax, %rcx;				\</div><div class='del'>-	xorq %rax, %rax;</div><div class='add'>+#define GET_CR2_INTO_RAX				\</div><div class='add'>+	call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)</div><div class='ctx'> </div><div class='ctx'> #define PARAVIRT_ADJUST_EXCEPTION_FRAME					\</div><div class='ctx'> 	PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \</div><div class='head'>diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h<br/>index 7a11910a63c4..d9b8e3f7f42a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/percpu.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/percpu.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/percpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/percpu.h</a></div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> #define __percpu_prefix		"%%"__stringify(__percpu_seg)":"</div><div class='del'>-#define __my_cpu_offset		percpu_read(this_cpu_off)</div><div class='add'>+#define __my_cpu_offset		this_cpu_read(this_cpu_off)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Compared to the generic __my_cpu_offset version, the following</div><div class='hunk'>@@ -351,23 +351,15 @@ do {									\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * percpu_read() makes gcc load the percpu variable every time it is</div><div class='del'>- * accessed while percpu_read_stable() allows the value to be cached.</div><div class='del'>- * percpu_read_stable() is more efficient and can be used if its value</div><div class='add'>+ * this_cpu_read() makes gcc load the percpu variable every time it is</div><div class='add'>+ * accessed while this_cpu_read_stable() allows the value to be cached.</div><div class='add'>+ * this_cpu_read_stable() is more efficient and can be used if its value</div><div class='ctx'>  * is guaranteed to be valid across cpus.  The current users include</div><div class='ctx'>  * get_current() and get_thread_info() both of which are actually</div><div class='ctx'>  * per-thread variables implemented as per-cpu variables and thus</div><div class='ctx'>  * stable for the duration of the respective task.</div><div class='ctx'>  */</div><div class='del'>-#define percpu_read(var)		percpu_from_op("mov", var, "m" (var))</div><div class='del'>-#define percpu_read_stable(var)		percpu_from_op("mov", var, "p" (&amp;(var)))</div><div class='del'>-#define percpu_write(var, val)		percpu_to_op("mov", var, val)</div><div class='del'>-#define percpu_add(var, val)		percpu_add_op(var, val)</div><div class='del'>-#define percpu_sub(var, val)		percpu_add_op(var, -(val))</div><div class='del'>-#define percpu_and(var, val)		percpu_to_op("and", var, val)</div><div class='del'>-#define percpu_or(var, val)		percpu_to_op("or", var, val)</div><div class='del'>-#define percpu_xor(var, val)		percpu_to_op("xor", var, val)</div><div class='del'>-#define percpu_inc(var)		percpu_unary_op("inc", var)</div><div class='add'>+#define this_cpu_read_stable(var)	percpu_from_op("mov", var, "p" (&amp;(var)))</div><div class='ctx'> </div><div class='ctx'> #define __this_cpu_read_1(pcp)		percpu_from_op("mov", (pcp), "m"(pcp))</div><div class='ctx'> #define __this_cpu_read_2(pcp)		percpu_from_op("mov", (pcp), "m"(pcp))</div><div class='hunk'>@@ -512,7 +504,11 @@ static __always_inline int x86_this_cpu_constant_test_bit(unsigned int nr,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long __percpu *a = (unsigned long *)addr + nr / BITS_PER_LONG;</div><div class='ctx'> </div><div class='del'>-	return ((1UL &lt;&lt; (nr % BITS_PER_LONG)) &amp; percpu_read(*a)) != 0;</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	return ((1UL &lt;&lt; (nr % BITS_PER_LONG)) &amp; __this_cpu_read_8(*a)) != 0;</div><div class='add'>+#else</div><div class='add'>+	return ((1UL &lt;&lt; (nr % BITS_PER_LONG)) &amp; __this_cpu_read_4(*a)) != 0;</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int x86_this_cpu_variable_test_bit(int nr,</div><div class='head'>diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h<br/>index 2291895b1836..588f52ea810e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/perf_event.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/perf_event.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/perf_event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/perf_event.h</a></div><div class='hunk'>@@ -158,6 +158,7 @@ struct x86_pmu_capability {</div><div class='ctx'> #define IBS_CAPS_OPCNT			(1U&lt;&lt;4)</div><div class='ctx'> #define IBS_CAPS_BRNTRGT		(1U&lt;&lt;5)</div><div class='ctx'> #define IBS_CAPS_OPCNTEXT		(1U&lt;&lt;6)</div><div class='add'>+#define IBS_CAPS_RIPINVALIDCHK		(1U&lt;&lt;7)</div><div class='ctx'> </div><div class='ctx'> #define IBS_CAPS_DEFAULT		(IBS_CAPS_AVAIL		\</div><div class='ctx'> 					 | IBS_CAPS_FETCHSAM	\</div><div class='hunk'>@@ -170,21 +171,28 @@ struct x86_pmu_capability {</div><div class='ctx'> #define IBSCTL_LVT_OFFSET_VALID		(1ULL&lt;&lt;8)</div><div class='ctx'> #define IBSCTL_LVT_OFFSET_MASK		0x0F</div><div class='ctx'> </div><div class='del'>-/* IbsFetchCtl bits/masks */</div><div class='add'>+/* ibs fetch bits/masks */</div><div class='ctx'> #define IBS_FETCH_RAND_EN	(1ULL&lt;&lt;57)</div><div class='ctx'> #define IBS_FETCH_VAL		(1ULL&lt;&lt;49)</div><div class='ctx'> #define IBS_FETCH_ENABLE	(1ULL&lt;&lt;48)</div><div class='ctx'> #define IBS_FETCH_CNT		0xFFFF0000ULL</div><div class='ctx'> #define IBS_FETCH_MAX_CNT	0x0000FFFFULL</div><div class='ctx'> </div><div class='del'>-/* IbsOpCtl bits */</div><div class='add'>+/* ibs op bits/masks */</div><div class='add'>+/* lower 4 bits of the current count are ignored: */</div><div class='add'>+#define IBS_OP_CUR_CNT		(0xFFFF0ULL&lt;&lt;32)</div><div class='ctx'> #define IBS_OP_CNT_CTL		(1ULL&lt;&lt;19)</div><div class='ctx'> #define IBS_OP_VAL		(1ULL&lt;&lt;18)</div><div class='ctx'> #define IBS_OP_ENABLE		(1ULL&lt;&lt;17)</div><div class='ctx'> #define IBS_OP_MAX_CNT		0x0000FFFFULL</div><div class='ctx'> #define IBS_OP_MAX_CNT_EXT	0x007FFFFFULL	/* not a register bit mask */</div><div class='add'>+#define IBS_RIP_INVALID		(1ULL&lt;&lt;38)</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_X86_LOCAL_APIC</div><div class='ctx'> extern u32 get_ibs_caps(void);</div><div class='add'>+#else</div><div class='add'>+static inline u32 get_ibs_caps(void) { return 0; }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PERF_EVENTS</div><div class='ctx'> extern void perf_events_lapic_init(void);</div><div class='head'>diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h<br/>index effff47a3c82..43876f16caf1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/pgtable-3level.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/pgtable-3level.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/pgtable-3level.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/pgtable-3level.h</a></div><div class='hunk'>@@ -31,6 +31,56 @@ static inline void native_set_pte(pte_t *ptep, pte_t pte)</div><div class='ctx'> 	ptep-&gt;pte_low = pte.pte_low;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define pmd_read_atomic pmd_read_atomic</div><div class='add'>+/*</div><div class='add'>+ * pte_offset_map_lock on 32bit PAE kernels was reading the pmd_t with</div><div class='add'>+ * a "*pmdp" dereference done by gcc. Problem is, in certain places</div><div class='add'>+ * where pte_offset_map_lock is called, concurrent page faults are</div><div class='add'>+ * allowed, if the mmap_sem is hold for reading. An example is mincore</div><div class='add'>+ * vs page faults vs MADV_DONTNEED. On the page fault side</div><div class='add'>+ * pmd_populate rightfully does a set_64bit, but if we're reading the</div><div class='add'>+ * pmd_t with a "*pmdp" on the mincore side, a SMP race can happen</div><div class='add'>+ * because gcc will not read the 64bit of the pmd atomically. To fix</div><div class='add'>+ * this all places running pmd_offset_map_lock() while holding the</div><div class='add'>+ * mmap_sem in read mode, shall read the pmdp pointer using this</div><div class='add'>+ * function to know if the pmd is null nor not, and in turn to know if</div><div class='add'>+ * they can run pmd_offset_map_lock or pmd_trans_huge or other pmd</div><div class='add'>+ * operations.</div><div class='add'>+ *</div><div class='add'>+ * Without THP if the mmap_sem is hold for reading, the</div><div class='add'>+ * pmd can only transition from null to not null while pmd_read_atomic runs.</div><div class='add'>+ * So there's no need of literally reading it atomically.</div><div class='add'>+ *</div><div class='add'>+ * With THP if the mmap_sem is hold for reading, the pmd can become</div><div class='add'>+ * THP or null or point to a pte (and in turn become "stable") at any</div><div class='add'>+ * time under pmd_read_atomic, so it's mandatory to read it atomically</div><div class='add'>+ * with cmpxchg8b.</div><div class='add'>+ */</div><div class='add'>+#ifndef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='add'>+static inline pmd_t pmd_read_atomic(pmd_t *pmdp)</div><div class='add'>+{</div><div class='add'>+	pmdval_t ret;</div><div class='add'>+	u32 *tmp = (u32 *)pmdp;</div><div class='add'>+</div><div class='add'>+	ret = (pmdval_t) (*tmp);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/*</div><div class='add'>+		 * If the low part is null, we must not read the high part</div><div class='add'>+		 * or we can end up with a partial pmd.</div><div class='add'>+		 */</div><div class='add'>+		smp_rmb();</div><div class='add'>+		ret |= ((pmdval_t)*(tmp + 1)) &lt;&lt; 32;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return (pmd_t) { ret };</div><div class='add'>+}</div><div class='add'>+#else /* CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='add'>+static inline pmd_t pmd_read_atomic(pmd_t *pmdp)</div><div class='add'>+{</div><div class='add'>+	return (pmd_t) { atomic64_read((atomic64_t *)pmdp) };</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='add'>+</div><div class='ctx'> static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)</div><div class='ctx'> {</div><div class='ctx'> 	set_64bit((unsigned long long *)(ptep), native_pte_val(pte));</div><div class='head'>diff --git a/arch/x86/include/asm/posix_types_32.h b/arch/x86/include/asm/posix_types_32.h<br/>index 99f262e04b91..8e525059e7d8 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/posix_types_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/posix_types_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/posix_types_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/posix_types_32.h</a></div><div class='hunk'>@@ -10,9 +10,6 @@</div><div class='ctx'> typedef unsigned short	__kernel_mode_t;</div><div class='ctx'> #define __kernel_mode_t __kernel_mode_t</div><div class='ctx'> </div><div class='del'>-typedef unsigned short	__kernel_nlink_t;</div><div class='del'>-#define __kernel_nlink_t __kernel_nlink_t</div><div class='del'>-</div><div class='ctx'> typedef unsigned short	__kernel_ipc_pid_t;</div><div class='ctx'> #define __kernel_ipc_pid_t __kernel_ipc_pid_t</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h<br/>index 4fa7dcceb6c0..39bc5777211a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/processor.h</a></div><div class='hunk'>@@ -544,13 +544,16 @@ static inline void load_sp0(struct tss_struct *tss,</div><div class='ctx'>  * enable), so that any CPU's that boot up</div><div class='ctx'>  * after us can get the correct flags.</div><div class='ctx'>  */</div><div class='del'>-extern unsigned long		mmu_cr4_features;</div><div class='add'>+extern unsigned long mmu_cr4_features;</div><div class='add'>+extern u32 *trampoline_cr4_features;</div><div class='ctx'> </div><div class='ctx'> static inline void set_in_cr4(unsigned long mask)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long cr4;</div><div class='ctx'> </div><div class='ctx'> 	mmu_cr4_features |= mask;</div><div class='add'>+	if (trampoline_cr4_features)</div><div class='add'>+		*trampoline_cr4_features = mmu_cr4_features;</div><div class='ctx'> 	cr4 = read_cr4();</div><div class='ctx'> 	cr4 |= mask;</div><div class='ctx'> 	write_cr4(cr4);</div><div class='hunk'>@@ -561,6 +564,8 @@ static inline void clear_in_cr4(unsigned long mask)</div><div class='ctx'> 	unsigned long cr4;</div><div class='ctx'> </div><div class='ctx'> 	mmu_cr4_features &amp;= ~mask;</div><div class='add'>+	if (trampoline_cr4_features)</div><div class='add'>+		*trampoline_cr4_features = mmu_cr4_features;</div><div class='ctx'> 	cr4 = read_cr4();</div><div class='ctx'> 	cr4 &amp;= ~mask;</div><div class='ctx'> 	write_cr4(cr4);</div><div class='hunk'>@@ -579,9 +584,6 @@ extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);</div><div class='ctx'> /* Free all resources held by a thread. */</div><div class='ctx'> extern void release_thread(struct task_struct *);</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy state */</div><div class='del'>-extern void prepare_to_copy(struct task_struct *tsk);</div><div class='del'>-</div><div class='ctx'> unsigned long get_wchan(struct task_struct *p);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -974,8 +976,6 @@ extern bool cpu_has_amd_erratum(const int *);</div><div class='ctx'> #define cpu_has_amd_erratum(x)	(false)</div><div class='ctx'> #endif /* CONFIG_CPU_SUP_AMD */</div><div class='ctx'> </div><div class='del'>-void cpu_idle_wait(void);</div><div class='del'>-</div><div class='ctx'> extern unsigned long arch_align_stack(unsigned long sp);</div><div class='ctx'> extern void free_init_pages(char *what, unsigned long begin, unsigned long end);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/pvclock-abi.h b/arch/x86/include/asm/pvclock-abi.h<br/>index 35f2d1948ada..6167fd798188 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/pvclock-abi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/pvclock-abi.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/pvclock-abi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/pvclock-abi.h</a></div><div class='hunk'>@@ -40,5 +40,6 @@ struct pvclock_wall_clock {</div><div class='ctx'> } __attribute__((__packed__));</div><div class='ctx'> </div><div class='ctx'> #define PVCLOCK_TSC_STABLE_BIT	(1 &lt;&lt; 0)</div><div class='add'>+#define PVCLOCK_GUEST_STOPPED	(1 &lt;&lt; 1)</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> #endif /* _ASM_X86_PVCLOCK_ABI_H */</div><div class='head'>diff --git a/arch/x86/include/asm/realmode.h b/arch/x86/include/asm/realmode.h<br/>new file mode 100644<br/>index 000000000000..fce3f4ae5bd6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/realmode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/realmode.h</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+#ifndef _ARCH_X86_REALMODE_H</div><div class='add'>+#define _ARCH_X86_REALMODE_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+</div><div class='add'>+/* This must match data at realmode.S */</div><div class='add'>+struct real_mode_header {</div><div class='add'>+	u32	text_start;</div><div class='add'>+	u32	ro_end;</div><div class='add'>+	/* SMP trampoline */</div><div class='add'>+	u32	trampoline_start;</div><div class='add'>+	u32	trampoline_status;</div><div class='add'>+	u32	trampoline_header;</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	u32	trampoline_pgd;</div><div class='add'>+#endif</div><div class='add'>+	/* ACPI S3 wakeup */</div><div class='add'>+#ifdef CONFIG_ACPI_SLEEP</div><div class='add'>+	u32	wakeup_start;</div><div class='add'>+	u32	wakeup_header;</div><div class='add'>+#endif</div><div class='add'>+	/* APM/BIOS reboot */</div><div class='add'>+#ifdef CONFIG_X86_32</div><div class='add'>+	u32	machine_real_restart_asm;</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This must match data at trampoline_32/64.S */</div><div class='add'>+struct trampoline_header {</div><div class='add'>+#ifdef CONFIG_X86_32</div><div class='add'>+	u32 start;</div><div class='add'>+	u16 gdt_pad;</div><div class='add'>+	u16 gdt_limit;</div><div class='add'>+	u32 gdt_base;</div><div class='add'>+#else</div><div class='add'>+	u64 start;</div><div class='add'>+	u64 efer;</div><div class='add'>+	u32 cr4;</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct real_mode_header *real_mode_header;</div><div class='add'>+extern unsigned char real_mode_blob_end[];</div><div class='add'>+</div><div class='add'>+extern unsigned long init_rsp;</div><div class='add'>+extern unsigned long initial_code;</div><div class='add'>+extern unsigned long initial_gs;</div><div class='add'>+</div><div class='add'>+extern unsigned char real_mode_blob[];</div><div class='add'>+extern unsigned char real_mode_relocs[];</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_32</div><div class='add'>+extern unsigned char startup_32_smp[];</div><div class='add'>+extern unsigned char boot_gdt[];</div><div class='add'>+#else</div><div class='add'>+extern unsigned char secondary_startup_64[];</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+extern void __init setup_real_mode(void);</div><div class='add'>+</div><div class='add'>+#endif /* _ARCH_X86_REALMODE_H */</div><div class='head'>diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h<br/>index 165466233ab0..c48a95035a77 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/segment.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/segment.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/segment.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/segment.h</a></div><div class='hunk'>@@ -205,13 +205,15 @@</div><div class='ctx'> </div><div class='ctx'> #define IDT_ENTRIES 256</div><div class='ctx'> #define NUM_EXCEPTION_VECTORS 32</div><div class='add'>+/* Bitmask of exception vectors which push an error code on the stack */</div><div class='add'>+#define EXCEPTION_ERRCODE_MASK  0x00027d00</div><div class='ctx'> #define GDT_SIZE (GDT_ENTRIES * 8)</div><div class='ctx'> #define GDT_ENTRY_TLS_ENTRIES 3</div><div class='ctx'> #define TLS_SIZE (GDT_ENTRY_TLS_ENTRIES * 8)</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='del'>-extern const char early_idt_handlers[NUM_EXCEPTION_VECTORS][10];</div><div class='add'>+extern const char early_idt_handlers[NUM_EXCEPTION_VECTORS][2+2+5];</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Load a segment. Fall back on loading the zero</div><div class='head'>diff --git a/arch/x86/include/asm/sighandling.h b/arch/x86/include/asm/sighandling.h<br/>index ada93b3b8c66..beff97f7df37 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/sighandling.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/sighandling.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/sighandling.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/sighandling.h</a></div><div class='hunk'>@@ -7,8 +7,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/processor-flags.h&gt;</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='ctx'> #define __FIX_EFLAGS	(X86_EFLAGS_AC | X86_EFLAGS_OF | \</div><div class='ctx'> 			 X86_EFLAGS_DF | X86_EFLAGS_TF | X86_EFLAGS_SF | \</div><div class='ctx'> 			 X86_EFLAGS_ZF | X86_EFLAGS_AF | X86_EFLAGS_PF | \</div><div class='head'>diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h<br/>index 0434c400287c..f48394513c37 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/smp.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/smp.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/smp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/smp.h</a></div><div class='hunk'>@@ -62,6 +62,8 @@ DECLARE_EARLY_PER_CPU(int, x86_cpu_to_logical_apicid);</div><div class='ctx'> /* Static state in head.S used to set up a CPU */</div><div class='ctx'> extern unsigned long stack_start; /* Initial stack pointer address */</div><div class='ctx'> </div><div class='add'>+struct task_struct;</div><div class='add'>+</div><div class='ctx'> struct smp_ops {</div><div class='ctx'> 	void (*smp_prepare_boot_cpu)(void);</div><div class='ctx'> 	void (*smp_prepare_cpus)(unsigned max_cpus);</div><div class='hunk'>@@ -70,7 +72,7 @@ struct smp_ops {</div><div class='ctx'> 	void (*stop_other_cpus)(int wait);</div><div class='ctx'> 	void (*smp_send_reschedule)(int cpu);</div><div class='ctx'> </div><div class='del'>-	int (*cpu_up)(unsigned cpu);</div><div class='add'>+	int (*cpu_up)(unsigned cpu, struct task_struct *tidle);</div><div class='ctx'> 	int (*cpu_disable)(void);</div><div class='ctx'> 	void (*cpu_die)(unsigned int cpu);</div><div class='ctx'> 	void (*play_dead)(void);</div><div class='hunk'>@@ -113,9 +115,9 @@ static inline void smp_cpus_done(unsigned int max_cpus)</div><div class='ctx'> 	smp_ops.smp_cpus_done(max_cpus);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int __cpu_up(unsigned int cpu)</div><div class='add'>+static inline int __cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='del'>-	return smp_ops.cpu_up(cpu);</div><div class='add'>+	return smp_ops.cpu_up(cpu, tidle);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int __cpu_disable(void)</div><div class='hunk'>@@ -152,7 +154,7 @@ void cpu_disable_common(void);</div><div class='ctx'> void native_smp_prepare_boot_cpu(void);</div><div class='ctx'> void native_smp_prepare_cpus(unsigned int max_cpus);</div><div class='ctx'> void native_smp_cpus_done(unsigned int max_cpus);</div><div class='del'>-int native_cpu_up(unsigned int cpunum);</div><div class='add'>+int native_cpu_up(unsigned int cpunum, struct task_struct *tidle);</div><div class='ctx'> int native_cpu_disable(void);</div><div class='ctx'> void native_cpu_die(unsigned int cpu);</div><div class='ctx'> void native_play_dead(void);</div><div class='hunk'>@@ -162,6 +164,7 @@ int wbinvd_on_all_cpus(void);</div><div class='ctx'> </div><div class='ctx'> void native_send_call_func_ipi(const struct cpumask *mask);</div><div class='ctx'> void native_send_call_func_single_ipi(int cpu);</div><div class='add'>+void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle);</div><div class='ctx'> </div><div class='ctx'> void smp_store_cpu_info(int id);</div><div class='ctx'> #define cpu_physical_id(cpu)	per_cpu(x86_cpu_to_apicid, cpu)</div><div class='hunk'>@@ -188,11 +191,11 @@ extern unsigned disabled_cpus __cpuinitdata;</div><div class='ctx'>  * from the initial startup. We map APIC_BASE very early in page_setup(),</div><div class='ctx'>  * so this is correct in the x86 case.</div><div class='ctx'>  */</div><div class='del'>-#define raw_smp_processor_id() (percpu_read(cpu_number))</div><div class='add'>+#define raw_smp_processor_id() (this_cpu_read(cpu_number))</div><div class='ctx'> extern int safe_smp_processor_id(void);</div><div class='ctx'> </div><div class='ctx'> #elif defined(CONFIG_X86_64_SMP)</div><div class='del'>-#define raw_smp_processor_id() (percpu_read(cpu_number))</div><div class='add'>+#define raw_smp_processor_id() (this_cpu_read(cpu_number))</div><div class='ctx'> </div><div class='ctx'> #define stack_smp_processor_id()					\</div><div class='ctx'> ({								\</div><div class='head'>diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h<br/>index 76bfa2cf301d..b315a33867f2 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/spinlock.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/spinlock.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/spinlock.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/spinlock.h</a></div><div class='hunk'>@@ -20,10 +20,8 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> # define LOCK_PTR_REG "a"</div><div class='del'>-# define REG_PTR_MODE "k"</div><div class='ctx'> #else</div><div class='ctx'> # define LOCK_PTR_REG "D"</div><div class='del'>-# define REG_PTR_MODE "q"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_X86_32) &amp;&amp; \</div><div class='head'>diff --git a/arch/x86/include/asm/sta2x11.h b/arch/x86/include/asm/sta2x11.h<br/>new file mode 100644<br/>index 000000000000..e9d32df89ccc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/sta2x11.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/sta2x11.h</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+/*</div><div class='add'>+ * Header file for STMicroelectronics ConneXt (STA2X11) IOHub</div><div class='add'>+ */</div><div class='add'>+#ifndef __ASM_STA2X11_H</div><div class='add'>+#define __ASM_STA2X11_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+/* This needs to be called from the MFD to configure its sub-devices */</div><div class='add'>+struct sta2x11_instance *sta2x11_get_instance(struct pci_dev *pdev);</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_STA2X11_H */</div><div class='head'>diff --git a/arch/x86/include/asm/stackprotector.h b/arch/x86/include/asm/stackprotector.h<br/>index b5d9533d2c38..6a998598f172 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/stackprotector.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/stackprotector.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/stackprotector.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/stackprotector.h</a></div><div class='hunk'>@@ -75,9 +75,9 @@ static __always_inline void boot_init_stack_canary(void)</div><div class='ctx'> </div><div class='ctx'> 	current-&gt;stack_canary = canary;</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='del'>-	percpu_write(irq_stack_union.stack_canary, canary);</div><div class='add'>+	this_cpu_write(irq_stack_union.stack_canary, canary);</div><div class='ctx'> #else</div><div class='del'>-	percpu_write(stack_canary.canary, canary);</div><div class='add'>+	this_cpu_write(stack_canary.canary, canary);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/stat.h b/arch/x86/include/asm/stat.h<br/>index e0b1d9bbcbc6..7b3ddc348585 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/stat.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/stat.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/stat.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/stat.h</a></div><div class='hunk'>@@ -25,6 +25,12 @@ struct stat {</div><div class='ctx'> 	unsigned long  __unused5;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* We don't need to memset the whole thing just to initialize the padding */</div><div class='add'>+#define INIT_STRUCT_STAT_PADDING(st) do {	\</div><div class='add'>+	st.__unused4 = 0;			\</div><div class='add'>+	st.__unused5 = 0;			\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='ctx'> #define STAT64_HAS_BROKEN_ST_INO	1</div><div class='ctx'> </div><div class='ctx'> /* This matches struct stat64 in glibc2.1, hence the absolutely</div><div class='hunk'>@@ -63,6 +69,12 @@ struct stat64 {</div><div class='ctx'> 	unsigned long long	st_ino;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* We don't need to memset the whole thing just to initialize the padding */</div><div class='add'>+#define INIT_STRUCT_STAT64_PADDING(st) do {		\</div><div class='add'>+	memset(&amp;st.__pad0, 0, sizeof(st.__pad0));	\</div><div class='add'>+	memset(&amp;st.__pad3, 0, sizeof(st.__pad3));	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='ctx'> #else /* __i386__ */</div><div class='ctx'> </div><div class='ctx'> struct stat {</div><div class='hunk'>@@ -87,6 +99,15 @@ struct stat {</div><div class='ctx'> 	unsigned long   st_ctime_nsec;</div><div class='ctx'> 	long		__unused[3];</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+/* We don't need to memset the whole thing just to initialize the padding */</div><div class='add'>+#define INIT_STRUCT_STAT_PADDING(st) do {	\</div><div class='add'>+	st.__pad0 = 0;				\</div><div class='add'>+	st.__unused[0] = 0;			\</div><div class='add'>+	st.__unused[1] = 0;			\</div><div class='add'>+	st.__unused[2] = 0;			\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* for 32bit emulation and 32 bit kernels */</div><div class='head'>diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h<br/>index ad6df8ccd715..89f794f007ec 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/thread_info.h</a></div><div class='hunk'>@@ -85,6 +85,7 @@ struct thread_info {</div><div class='ctx'> #define TIF_SECCOMP		8	/* secure computing */</div><div class='ctx'> #define TIF_MCE_NOTIFY		10	/* notify userspace of an MCE */</div><div class='ctx'> #define TIF_USER_RETURN_NOTIFY	11	/* notify kernel of userspace return */</div><div class='add'>+#define TIF_UPROBE		12	/* breakpointed or singlestepping */</div><div class='ctx'> #define TIF_NOTSC		16	/* TSC is not accessible in userland */</div><div class='ctx'> #define TIF_IA32		17	/* IA32 compatibility process */</div><div class='ctx'> #define TIF_FORK		18	/* ret_from_fork */</div><div class='hunk'>@@ -109,6 +110,7 @@ struct thread_info {</div><div class='ctx'> #define _TIF_SECCOMP		(1 &lt;&lt; TIF_SECCOMP)</div><div class='ctx'> #define _TIF_MCE_NOTIFY		(1 &lt;&lt; TIF_MCE_NOTIFY)</div><div class='ctx'> #define _TIF_USER_RETURN_NOTIFY	(1 &lt;&lt; TIF_USER_RETURN_NOTIFY)</div><div class='add'>+#define _TIF_UPROBE		(1 &lt;&lt; TIF_UPROBE)</div><div class='ctx'> #define _TIF_NOTSC		(1 &lt;&lt; TIF_NOTSC)</div><div class='ctx'> #define _TIF_IA32		(1 &lt;&lt; TIF_IA32)</div><div class='ctx'> #define _TIF_FORK		(1 &lt;&lt; TIF_FORK)</div><div class='hunk'>@@ -155,24 +157,6 @@ struct thread_info {</div><div class='ctx'> </div><div class='ctx'> #define PREEMPT_ACTIVE		0x10000000</div><div class='ctx'> </div><div class='del'>-/* thread information allocation */</div><div class='del'>-#ifdef CONFIG_DEBUG_STACK_USAGE</div><div class='del'>-#define THREAD_FLAGS (GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO)</div><div class='del'>-#else</div><div class='del'>-#define THREAD_FLAGS (GFP_KERNEL | __GFP_NOTRACK)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR</div><div class='del'>-</div><div class='del'>-#define alloc_thread_info_node(tsk, node)				\</div><div class='del'>-({									\</div><div class='del'>-	struct page *page = alloc_pages_node(node, THREAD_FLAGS,	\</div><div class='del'>-					     THREAD_ORDER);		\</div><div class='del'>-	struct thread_info *ret = page ? page_address(page) : NULL;	\</div><div class='del'>-									\</div><div class='del'>-	ret;								\</div><div class='del'>-})</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> </div><div class='ctx'> #define STACK_WARN	(THREAD_SIZE/8)</div><div class='hunk'>@@ -222,7 +206,7 @@ DECLARE_PER_CPU(unsigned long, kernel_stack);</div><div class='ctx'> static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_info *ti;</div><div class='del'>-	ti = (void *)(percpu_read_stable(kernel_stack) +</div><div class='add'>+	ti = (void *)(this_cpu_read_stable(kernel_stack) +</div><div class='ctx'> 		      KERNEL_STACK_OFFSET - THREAD_SIZE);</div><div class='ctx'> 	return ti;</div><div class='ctx'> }</div><div class='hunk'>@@ -264,7 +248,23 @@ static inline void set_restore_sigmask(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_info *ti = current_thread_info();</div><div class='ctx'> 	ti-&gt;status |= TS_RESTORE_SIGMASK;</div><div class='del'>-	set_bit(TIF_SIGPENDING, (unsigned long *)&amp;ti-&gt;flags);</div><div class='add'>+	WARN_ON(!test_bit(TIF_SIGPENDING, (unsigned long *)&amp;ti-&gt;flags));</div><div class='add'>+}</div><div class='add'>+static inline void clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	return current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK;</div><div class='add'>+}</div><div class='add'>+static inline bool test_and_clear_restore_sigmask(void)</div><div class='add'>+{</div><div class='add'>+	struct thread_info *ti = current_thread_info();</div><div class='add'>+	if (!(ti-&gt;status &amp; TS_RESTORE_SIGMASK))</div><div class='add'>+		return false;</div><div class='add'>+	ti-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool is_ia32_task(void)</div><div class='hunk'>@@ -282,8 +282,7 @@ static inline bool is_ia32_task(void)</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> extern void arch_task_cache_init(void);</div><div class='del'>-extern void free_thread_info(struct thread_info *ti);</div><div class='ctx'> extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);</div><div class='del'>-#define arch_task_cache_init arch_task_cache_init</div><div class='add'>+extern void arch_release_task_struct(struct task_struct *tsk);</div><div class='ctx'> #endif</div><div class='ctx'> #endif /* _ASM_X86_THREAD_INFO_H */</div><div class='head'>diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h<br/>index c0e108e08079..36a1a2ab87d2 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/tlbflush.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/tlbflush.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/tlbflush.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/tlbflush.h</a></div><div class='hunk'>@@ -62,11 +62,7 @@ static inline void __flush_tlb_one(unsigned long addr)</div><div class='ctx'> 		__flush_tlb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_32</div><div class='del'>-# define TLB_FLUSH_ALL	0xffffffff</div><div class='del'>-#else</div><div class='del'>-# define TLB_FLUSH_ALL	-1ULL</div><div class='del'>-#endif</div><div class='add'>+#define TLB_FLUSH_ALL	-1UL</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * TLB flushing:</div><div class='hunk'>@@ -156,8 +152,8 @@ DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate);</div><div class='ctx'> </div><div class='ctx'> static inline void reset_lazy_tlbstate(void)</div><div class='ctx'> {</div><div class='del'>-	percpu_write(cpu_tlbstate.state, 0);</div><div class='del'>-	percpu_write(cpu_tlbstate.active_mm, &amp;init_mm);</div><div class='add'>+	this_cpu_write(cpu_tlbstate.state, 0);</div><div class='add'>+	this_cpu_write(cpu_tlbstate.active_mm, &amp;init_mm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif	/* SMP */</div><div class='head'>diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h<br/>index b9676ae37ada..095b21507b6a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/topology.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/topology.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/topology.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/topology.h</a></div><div class='hunk'>@@ -92,44 +92,6 @@ extern void setup_node_to_cpumask_map(void);</div><div class='ctx'> </div><div class='ctx'> #define pcibus_to_node(bus) __pcibus_to_node(bus)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_32</div><div class='del'>-# define SD_CACHE_NICE_TRIES	1</div><div class='del'>-# define SD_IDLE_IDX		1</div><div class='del'>-#else</div><div class='del'>-# define SD_CACHE_NICE_TRIES	2</div><div class='del'>-# define SD_IDLE_IDX		2</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* sched_domains SD_NODE_INIT for NUMA machines */</div><div class='del'>-#define SD_NODE_INIT (struct sched_domain) {				\</div><div class='del'>-	.min_interval		= 8,					\</div><div class='del'>-	.max_interval		= 32,					\</div><div class='del'>-	.busy_factor		= 32,					\</div><div class='del'>-	.imbalance_pct		= 125,					\</div><div class='del'>-	.cache_nice_tries	= SD_CACHE_NICE_TRIES,			\</div><div class='del'>-	.busy_idx		= 3,					\</div><div class='del'>-	.idle_idx		= SD_IDLE_IDX,				\</div><div class='del'>-	.newidle_idx		= 0,					\</div><div class='del'>-	.wake_idx		= 0,					\</div><div class='del'>-	.forkexec_idx		= 0,					\</div><div class='del'>-									\</div><div class='del'>-	.flags			= 1*SD_LOAD_BALANCE			\</div><div class='del'>-				| 1*SD_BALANCE_NEWIDLE			\</div><div class='del'>-				| 1*SD_BALANCE_EXEC			\</div><div class='del'>-				| 1*SD_BALANCE_FORK			\</div><div class='del'>-				| 0*SD_BALANCE_WAKE			\</div><div class='del'>-				| 1*SD_WAKE_AFFINE			\</div><div class='del'>-				| 0*SD_PREFER_LOCAL			\</div><div class='del'>-				| 0*SD_SHARE_CPUPOWER			\</div><div class='del'>-				| 0*SD_POWERSAVINGS_BALANCE		\</div><div class='del'>-				| 0*SD_SHARE_PKG_RESOURCES		\</div><div class='del'>-				| 1*SD_SERIALIZE			\</div><div class='del'>-				| 0*SD_PREFER_SIBLING			\</div><div class='del'>-				,					\</div><div class='del'>-	.last_balance		= jiffies,				\</div><div class='del'>-	.balance_interval	= 1,					\</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> extern int __node_distance(int, int);</div><div class='ctx'> #define node_distance(a, b) __node_distance(a, b)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/trampoline.h b/arch/x86/include/asm/trampoline.h<br/>deleted file mode 100644<br/>index feca3118a73b..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/trampoline.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/trampoline.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,39 +0,0 @@</div><div class='del'>-#ifndef _ASM_X86_TRAMPOLINE_H</div><div class='del'>-#define _ASM_X86_TRAMPOLINE_H</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLY__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Trampoline 80x86 program as an array.  These are in the init rodata</div><div class='del'>- * segment, but that's okay, because we only care about the relative</div><div class='del'>- * addresses of the symbols.</div><div class='del'>- */</div><div class='del'>-extern const unsigned char x86_trampoline_start [];</div><div class='del'>-extern const unsigned char x86_trampoline_end   [];</div><div class='del'>-extern unsigned char *x86_trampoline_base;</div><div class='del'>-</div><div class='del'>-extern unsigned long init_rsp;</div><div class='del'>-extern unsigned long initial_code;</div><div class='del'>-extern unsigned long initial_gs;</div><div class='del'>-</div><div class='del'>-extern void __init setup_trampolines(void);</div><div class='del'>-</div><div class='del'>-extern const unsigned char trampoline_data[];</div><div class='del'>-extern const unsigned char trampoline_status[];</div><div class='del'>-</div><div class='del'>-#define TRAMPOLINE_SYM(x)						\</div><div class='del'>-	((void *)(x86_trampoline_base +					\</div><div class='del'>-		  ((const unsigned char *)(x) - x86_trampoline_start)))</div><div class='del'>-</div><div class='del'>-/* Address of the SMP trampoline */</div><div class='del'>-static inline unsigned long trampoline_address(void)</div><div class='del'>-{</div><div class='del'>-	return virt_to_phys(TRAMPOLINE_SYM(trampoline_data));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_X86_TRAMPOLINE_H */</div><div class='head'>diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h<br/>index e0544597cfe7..e1f3a17034fc 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/uaccess.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/uaccess.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/uaccess.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/uaccess.h</a></div><div class='hunk'>@@ -32,9 +32,9 @@</div><div class='ctx'> </div><div class='ctx'> #define segment_eq(a, b)	((a).seg == (b).seg)</div><div class='ctx'> </div><div class='del'>-#define __addr_ok(addr)					\</div><div class='del'>-	((unsigned long __force)(addr) &lt;		\</div><div class='del'>-	 (current_thread_info()-&gt;addr_limit.seg))</div><div class='add'>+#define user_addr_max() (current_thread_info()-&gt;addr_limit.seg)</div><div class='add'>+#define __addr_ok(addr) 	\</div><div class='add'>+	((unsigned long __force)(addr) &lt; user_addr_max())</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Test whether a block of memory is a valid user space address.</div><div class='hunk'>@@ -46,14 +46,14 @@</div><div class='ctx'>  * This needs 33-bit (65-bit for x86_64) arithmetic. We have a carry...</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define __range_not_ok(addr, size)					\</div><div class='add'>+#define __range_not_ok(addr, size, limit)				\</div><div class='ctx'> ({									\</div><div class='ctx'> 	unsigned long flag, roksum;					\</div><div class='ctx'> 	__chk_user_ptr(addr);						\</div><div class='ctx'> 	asm("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0"		\</div><div class='ctx'> 	    : "=&amp;r" (flag), "=r" (roksum)				\</div><div class='ctx'> 	    : "1" (addr), "g" ((long)(size)),				\</div><div class='del'>-	      "rm" (current_thread_info()-&gt;addr_limit.seg));		\</div><div class='add'>+	      "rm" (limit));						\</div><div class='ctx'> 	flag;								\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='hunk'>@@ -76,14 +76,16 @@</div><div class='ctx'>  * checks that the pointer is in the user space range - after calling</div><div class='ctx'>  * this function, memory access functions may still return -EFAULT.</div><div class='ctx'>  */</div><div class='del'>-#define access_ok(type, addr, size) (likely(__range_not_ok(addr, size) == 0))</div><div class='add'>+#define access_ok(type, addr, size) \</div><div class='add'>+	(likely(__range_not_ok(addr, size, user_addr_max()) == 0))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * The exception table consists of pairs of addresses: the first is the</div><div class='del'>- * address of an instruction that is allowed to fault, and the second is</div><div class='del'>- * the address at which the program should continue.  No registers are</div><div class='del'>- * modified, so it is entirely up to the continuation code to figure out</div><div class='del'>- * what to do.</div><div class='add'>+ * The exception table consists of pairs of addresses relative to the</div><div class='add'>+ * exception table enty itself: the first is the address of an</div><div class='add'>+ * instruction that is allowed to fault, and the second is the address</div><div class='add'>+ * at which the program should continue.  No registers are modified,</div><div class='add'>+ * so it is entirely up to the continuation code to figure out what to</div><div class='add'>+ * do.</div><div class='ctx'>  *</div><div class='ctx'>  * All the routines below use bits of fixup code that are out of line</div><div class='ctx'>  * with the main instruction path.  This means when everything is well,</div><div class='hunk'>@@ -92,10 +94,14 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> struct exception_table_entry {</div><div class='del'>-	unsigned long insn, fixup;</div><div class='add'>+	int insn, fixup;</div><div class='ctx'> };</div><div class='add'>+/* This is not the generic standard exception_table_entry format */</div><div class='add'>+#define ARCH_HAS_SORT_EXTABLE</div><div class='add'>+#define ARCH_HAS_SEARCH_EXTABLE</div><div class='ctx'> </div><div class='ctx'> extern int fixup_exception(struct pt_regs *regs);</div><div class='add'>+extern int early_fixup_exception(unsigned long *ip);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * These are the main single-value transfer routines.  They automatically</div><div class='hunk'>@@ -202,8 +208,8 @@ extern int __get_user_bad(void);</div><div class='ctx'> 	asm volatile("1:	movl %%eax,0(%1)\n"			\</div><div class='ctx'> 		     "2:	movl %%edx,4(%1)\n"			\</div><div class='ctx'> 		     "3:\n"						\</div><div class='del'>-		     _ASM_EXTABLE(1b, 2b - 1b)				\</div><div class='del'>-		     _ASM_EXTABLE(2b, 3b - 2b)				\</div><div class='add'>+		     _ASM_EXTABLE_EX(1b, 2b)				\</div><div class='add'>+		     _ASM_EXTABLE_EX(2b, 3b)				\</div><div class='ctx'> 		     : : "A" (x), "r" (addr))</div><div class='ctx'> </div><div class='ctx'> #define __put_user_x8(x, ptr, __ret_pu)				\</div><div class='hunk'>@@ -408,7 +414,7 @@ do {									\</div><div class='ctx'> #define __get_user_asm_ex(x, addr, itype, rtype, ltype)			\</div><div class='ctx'> 	asm volatile("1:	mov"itype" %1,%"rtype"0\n"		\</div><div class='ctx'> 		     "2:\n"						\</div><div class='del'>-		     _ASM_EXTABLE(1b, 2b - 1b)				\</div><div class='add'>+		     _ASM_EXTABLE_EX(1b, 2b)				\</div><div class='ctx'> 		     : ltype(x) : "m" (__m(addr)))</div><div class='ctx'> </div><div class='ctx'> #define __put_user_nocheck(x, ptr, size)			\</div><div class='hunk'>@@ -450,7 +456,7 @@ struct __large_struct { unsigned long buf[100]; };</div><div class='ctx'> #define __put_user_asm_ex(x, addr, itype, rtype, ltype)			\</div><div class='ctx'> 	asm volatile("1:	mov"itype" %"rtype"0,%1\n"		\</div><div class='ctx'> 		     "2:\n"						\</div><div class='del'>-		     _ASM_EXTABLE(1b, 2b - 1b)				\</div><div class='add'>+		     _ASM_EXTABLE_EX(1b, 2b)				\</div><div class='ctx'> 		     : : ltype(x), "m" (__m(addr)))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -560,6 +566,9 @@ copy_from_user_nmi(void *to, const void __user *from, unsigned long n);</div><div class='ctx'> extern __must_check long</div><div class='ctx'> strncpy_from_user(char *dst, const char __user *src, long count);</div><div class='ctx'> </div><div class='add'>+extern __must_check long strlen_user(const char __user *str);</div><div class='add'>+extern __must_check long strnlen_user(const char __user *str, long n);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * movsl can be slow when source and dest are not both 8-byte aligned</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/x86/include/asm/uaccess_32.h b/arch/x86/include/asm/uaccess_32.h<br/>index 8084bc73b18c..576e39bca6ad 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/uaccess_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/uaccess_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/uaccess_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/uaccess_32.h</a></div><div class='hunk'>@@ -213,23 +213,6 @@ static inline unsigned long __must_check copy_from_user(void *to,</div><div class='ctx'> 	return n;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * strlen_user: - Get the size of a string in user space.</div><div class='del'>- * @str: The string to measure.</div><div class='del'>- *</div><div class='del'>- * Context: User context only.  This function may sleep.</div><div class='del'>- *</div><div class='del'>- * Get the size of a NUL-terminated string in user space.</div><div class='del'>- *</div><div class='del'>- * Returns the size of the string INCLUDING the terminating NUL.</div><div class='del'>- * On exception, returns 0.</div><div class='del'>- *</div><div class='del'>- * If there is a limit on the length of a valid string, you may wish to</div><div class='del'>- * consider using strnlen_user() instead.</div><div class='del'>- */</div><div class='del'>-#define strlen_user(str) strnlen_user(str, LONG_MAX)</div><div class='del'>-</div><div class='del'>-long strnlen_user(const char __user *str, long n);</div><div class='ctx'> unsigned long __must_check clear_user(void __user *mem, unsigned long len);</div><div class='ctx'> unsigned long __must_check __clear_user(void __user *mem, unsigned long len);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uaccess_64.h<br/>index fcd4b6f3ef02..8e796fbbf9c6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/uaccess_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/uaccess_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/uaccess_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/uaccess_64.h</a></div><div class='hunk'>@@ -208,9 +208,6 @@ int __copy_in_user(void __user *dst, const void __user *src, unsigned size)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-__must_check long strnlen_user(const char __user *str, long n);</div><div class='del'>-__must_check long __strnlen_user(const char __user *str, long n);</div><div class='del'>-__must_check long strlen_user(const char __user *str);</div><div class='ctx'> __must_check unsigned long clear_user(void __user *mem, unsigned long len);</div><div class='ctx'> __must_check unsigned long __clear_user(void __user *mem, unsigned long len);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/uprobes.h b/arch/x86/include/asm/uprobes.h<br/>new file mode 100644<br/>index 000000000000..1e9bed14f7ae<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/uprobes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/uprobes.h</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+#ifndef _ASM_UPROBES_H</div><div class='add'>+#define _ASM_UPROBES_H</div><div class='add'>+/*</div><div class='add'>+ * User-space Probes (UProbes) for x86</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) IBM Corporation, 2008-2011</div><div class='add'>+ * Authors:</div><div class='add'>+ *	Srikar Dronamraju</div><div class='add'>+ *	Jim Keniston</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/notifier.h&gt;</div><div class='add'>+</div><div class='add'>+typedef u8 uprobe_opcode_t;</div><div class='add'>+</div><div class='add'>+#define MAX_UINSN_BYTES			  16</div><div class='add'>+#define UPROBE_XOL_SLOT_BYTES		 128	/* to keep it cache aligned */</div><div class='add'>+</div><div class='add'>+#define UPROBE_SWBP_INSN		0xcc</div><div class='add'>+#define UPROBE_SWBP_INSN_SIZE		   1</div><div class='add'>+</div><div class='add'>+struct arch_uprobe {</div><div class='add'>+	u16				fixups;</div><div class='add'>+	u8				insn[MAX_UINSN_BYTES];</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	unsigned long			rip_rela_target_address;</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct arch_uprobe_task {</div><div class='add'>+	unsigned long			saved_trap_nr;</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	unsigned long			saved_scratch_register;</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern int  arch_uprobe_analyze_insn(struct arch_uprobe *aup, struct mm_struct *mm);</div><div class='add'>+extern int  arch_uprobe_pre_xol(struct arch_uprobe *aup, struct pt_regs *regs);</div><div class='add'>+extern int  arch_uprobe_post_xol(struct arch_uprobe *aup, struct pt_regs *regs);</div><div class='add'>+extern bool arch_uprobe_xol_was_trapped(struct task_struct *tsk);</div><div class='add'>+extern int  arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val, void *data);</div><div class='add'>+extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs);</div><div class='add'>+#endif	/* _ASM_UPROBES_H */</div><div class='head'>diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h<br/>index becf47b81735..6149b476d9df 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/uv/uv_bau.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/uv/uv_bau.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/uv/uv_bau.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/uv/uv_bau.h</a></div><div class='hunk'>@@ -149,7 +149,6 @@</div><div class='ctx'> /* 4 bits of software ack period */</div><div class='ctx'> #define UV2_ACK_MASK			0x7UL</div><div class='ctx'> #define UV2_ACK_UNITS_SHFT		3</div><div class='del'>-#define UV2_LEG_SHFT UV2H_LB_BAU_MISC_CONTROL_USE_LEGACY_DESCRIPTOR_FORMATS_SHFT</div><div class='ctx'> #define UV2_EXT_SHFT UV2H_LB_BAU_MISC_CONTROL_ENABLE_EXTENDED_SB_STATUS_SHFT</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/include/asm/vga.h b/arch/x86/include/asm/vga.h<br/>index c4b9dc2f67c5..44282fbf7bf9 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/vga.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/vga.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/vga.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/vga.h</a></div><div class='hunk'>@@ -17,4 +17,10 @@</div><div class='ctx'> #define vga_readb(x) (*(x))</div><div class='ctx'> #define vga_writeb(x, y) (*(y) = (x))</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_FB_EFI</div><div class='add'>+#define __ARCH_HAS_VGA_DEFAULT_DEVICE</div><div class='add'>+extern struct pci_dev *vga_default_device(void);</div><div class='add'>+extern void vga_set_default_device(struct pci_dev *pdev);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_X86_VGA_H */</div><div class='head'>diff --git a/arch/x86/include/asm/word-at-a-time.h b/arch/x86/include/asm/word-at-a-time.h<br/>index 6fe6767b7124..5b238981542a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/word-at-a-time.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/word-at-a-time.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/word-at-a-time.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/word-at-a-time.h</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> #ifndef _ASM_WORD_AT_A_TIME_H</div><div class='ctx'> #define _ASM_WORD_AT_A_TIME_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This is largely generic for little-endian machines, but the</div><div class='ctx'>  * optimal byte mask counting is probably going to be something</div><div class='hunk'>@@ -8,6 +10,11 @@</div><div class='ctx'>  * bit count instruction, that might be better than the multiply</div><div class='ctx'>  * and shift, for example.</div><div class='ctx'>  */</div><div class='add'>+struct word_at_a_time {</div><div class='add'>+	const unsigned long one_bits, high_bits;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define WORD_AT_A_TIME_CONSTANTS { REPEAT_BYTE(0x01), REPEAT_BYTE(0x80) }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_64BIT</div><div class='ctx'> </div><div class='hunk'>@@ -35,12 +42,64 @@ static inline long count_masked_bytes(long mask)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define REPEAT_BYTE(x)	((~0ul / 0xff) * (x))</div><div class='add'>+/* Return nonzero if it has a zero */</div><div class='add'>+static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c)</div><div class='add'>+{</div><div class='add'>+	unsigned long mask = ((a - c-&gt;one_bits) &amp; ~a) &amp; c-&gt;high_bits;</div><div class='add'>+	*bits = mask;</div><div class='add'>+	return mask;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-/* Return the high bit set in the first byte that is a zero */</div><div class='del'>-static inline unsigned long has_zero(unsigned long a)</div><div class='add'>+static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c)</div><div class='ctx'> {</div><div class='del'>-	return ((a - REPEAT_BYTE(0x01)) &amp; ~a) &amp; REPEAT_BYTE(0x80);</div><div class='add'>+	return bits;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned long create_zero_mask(unsigned long bits)</div><div class='add'>+{</div><div class='add'>+	bits = (bits - 1) &amp; ~bits;</div><div class='add'>+	return bits &gt;&gt; 7;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The mask we created is directly usable as a bytemask */</div><div class='add'>+#define zero_bytemask(mask) (mask)</div><div class='add'>+</div><div class='add'>+static inline unsigned long find_zero(unsigned long mask)</div><div class='add'>+{</div><div class='add'>+	return count_masked_bytes(mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Load an unaligned word from kernel space.</div><div class='add'>+ *</div><div class='add'>+ * In the (very unlikely) case of the word being a page-crosser</div><div class='add'>+ * and the next page not being mapped, take the exception and</div><div class='add'>+ * return zeroes in the non-existing part.</div><div class='add'>+ */</div><div class='add'>+static inline unsigned long load_unaligned_zeropad(const void *addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long ret, dummy;</div><div class='add'>+</div><div class='add'>+	asm(</div><div class='add'>+		"1:\tmov %2,%0\n"</div><div class='add'>+		"2:\n"</div><div class='add'>+		".section .fixup,\"ax\"\n"</div><div class='add'>+		"3:\t"</div><div class='add'>+		"lea %2,%1\n\t"</div><div class='add'>+		"and %3,%1\n\t"</div><div class='add'>+		"mov (%1),%0\n\t"</div><div class='add'>+		"leal %2,%%ecx\n\t"</div><div class='add'>+		"andl %4,%%ecx\n\t"</div><div class='add'>+		"shll $3,%%ecx\n\t"</div><div class='add'>+		"shr %%cl,%0\n\t"</div><div class='add'>+		"jmp 2b\n"</div><div class='add'>+		".previous\n"</div><div class='add'>+		_ASM_EXTABLE(1b, 3b)</div><div class='add'>+		:"=&amp;r" (ret),"=&amp;c" (dummy)</div><div class='add'>+		:"m" (*(unsigned long *)addr),</div><div class='add'>+		 "i" (-sizeof(unsigned long)),</div><div class='add'>+		 "i" (sizeof(unsigned long)-1));</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_WORD_AT_A_TIME_H */</div><div class='head'>diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h<br/>index 764b66a4cf89..c090af10ac7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/x86_init.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/x86_init.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/x86_init.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/x86_init.h</a></div><div class='hunk'>@@ -188,11 +188,18 @@ struct x86_msi_ops {</div><div class='ctx'> 	void (*restore_msi_irqs)(struct pci_dev *dev, int irq);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct x86_io_apic_ops {</div><div class='add'>+	void		(*init)  (void);</div><div class='add'>+	unsigned int	(*read)  (unsigned int apic, unsigned int reg);</div><div class='add'>+	void		(*write) (unsigned int apic, unsigned int reg, unsigned int value);</div><div class='add'>+	void		(*modify)(unsigned int apic, unsigned int reg, unsigned int value);</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> extern struct x86_init_ops x86_init;</div><div class='ctx'> extern struct x86_cpuinit_ops x86_cpuinit;</div><div class='ctx'> extern struct x86_platform_ops x86_platform;</div><div class='ctx'> extern struct x86_msi_ops x86_msi;</div><div class='del'>-</div><div class='add'>+extern struct x86_io_apic_ops x86_io_apic_ops;</div><div class='ctx'> extern void x86_init_noop(void);</div><div class='ctx'> extern void x86_init_uint_noop(unsigned int unused);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/xen/events.h b/arch/x86/include/asm/xen/events.h<br/>index 1df35417c412..cc146d51449e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/xen/events.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/xen/events.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/xen/events.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/xen/events.h</a></div><div class='hunk'>@@ -6,6 +6,7 @@ enum ipi_vector {</div><div class='ctx'> 	XEN_CALL_FUNCTION_VECTOR,</div><div class='ctx'> 	XEN_CALL_FUNCTION_SINGLE_VECTOR,</div><div class='ctx'> 	XEN_SPIN_UNLOCK_VECTOR,</div><div class='add'>+	XEN_IRQ_WORK_VECTOR,</div><div class='ctx'> </div><div class='ctx'> 	XEN_NR_IPIS,</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h<br/>index c34f96c2f7a0..93971e841dd5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/xen/page.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/xen/page.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/xen/page.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/xen/page.h</a></div><div class='hunk'>@@ -44,6 +44,7 @@ extern unsigned long  machine_to_phys_nr;</div><div class='ctx'> </div><div class='ctx'> extern unsigned long get_phys_to_machine(unsigned long pfn);</div><div class='ctx'> extern bool set_phys_to_machine(unsigned long pfn, unsigned long mfn);</div><div class='add'>+extern bool __init early_set_phys_to_machine(unsigned long pfn, unsigned long mfn);</div><div class='ctx'> extern bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn);</div><div class='ctx'> extern unsigned long set_phys_range_identity(unsigned long pfn_s,</div><div class='ctx'> 					     unsigned long pfn_e);</div><div class='head'>diff --git a/arch/x86/include/asm/xor_32.h b/arch/x86/include/asm/xor_32.h<br/>index 133b40a0f495..454570891bdc 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/xor_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/xor_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/xor_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/xor_32.h</a></div><div class='hunk'>@@ -861,6 +861,9 @@ static struct xor_block_template xor_block_pIII_sse = {</div><div class='ctx'> 	.do_5 = xor_sse_5,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Also try the AVX routines */</div><div class='add'>+#include "xor_avx.h"</div><div class='add'>+</div><div class='ctx'> /* Also try the generic routines.  */</div><div class='ctx'> #include &lt;asm-generic/xor.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -871,6 +874,7 @@ do {							\</div><div class='ctx'> 	xor_speed(&amp;xor_block_8regs_p);			\</div><div class='ctx'> 	xor_speed(&amp;xor_block_32regs);			\</div><div class='ctx'> 	xor_speed(&amp;xor_block_32regs_p);			\</div><div class='add'>+	AVX_XOR_SPEED;					\</div><div class='ctx'> 	if (cpu_has_xmm)				\</div><div class='ctx'> 		xor_speed(&amp;xor_block_pIII_sse);		\</div><div class='ctx'> 	if (cpu_has_mmx) {				\</div><div class='hunk'>@@ -883,6 +887,6 @@ do {							\</div><div class='ctx'>    We may also be able to load into the L1 only depending on how the cpu</div><div class='ctx'>    deals with a load to a line that is being prefetched.  */</div><div class='ctx'> #define XOR_SELECT_TEMPLATE(FASTEST)			\</div><div class='del'>-	(cpu_has_xmm ? &amp;xor_block_pIII_sse : FASTEST)</div><div class='add'>+	AVX_SELECT(cpu_has_xmm ? &amp;xor_block_pIII_sse : FASTEST)</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_X86_XOR_32_H */</div><div class='head'>diff --git a/arch/x86/include/asm/xor_64.h b/arch/x86/include/asm/xor_64.h<br/>index 1549b5e261f6..b9b2323e90fe 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/xor_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/xor_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/xor_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/xor_64.h</a></div><div class='hunk'>@@ -347,15 +347,21 @@ static struct xor_block_template xor_block_sse = {</div><div class='ctx'> 	.do_5 = xor_sse_5,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+/* Also try the AVX routines */</div><div class='add'>+#include "xor_avx.h"</div><div class='add'>+</div><div class='ctx'> #undef XOR_TRY_TEMPLATES</div><div class='ctx'> #define XOR_TRY_TEMPLATES			\</div><div class='ctx'> do {						\</div><div class='add'>+	AVX_XOR_SPEED;				\</div><div class='ctx'> 	xor_speed(&amp;xor_block_sse);		\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='ctx'> /* We force the use of the SSE xor block because it can write around L2.</div><div class='ctx'>    We may also be able to load into the L1 only depending on how the cpu</div><div class='ctx'>    deals with a load to a line that is being prefetched.  */</div><div class='del'>-#define XOR_SELECT_TEMPLATE(FASTEST) (&amp;xor_block_sse)</div><div class='add'>+#define XOR_SELECT_TEMPLATE(FASTEST) \</div><div class='add'>+	AVX_SELECT(&amp;xor_block_sse)</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_X86_XOR_64_H */</div><div class='head'>diff --git a/arch/x86/include/asm/xor_avx.h b/arch/x86/include/asm/xor_avx.h<br/>new file mode 100644<br/>index 000000000000..2510d35f480e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/xor_avx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/xor_avx.h</a></div><div class='hunk'>@@ -0,0 +1,214 @@</div><div class='add'>+#ifndef _ASM_X86_XOR_AVX_H</div><div class='add'>+#define _ASM_X86_XOR_AVX_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Optimized RAID-5 checksumming functions for AVX</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Intel Corporation</div><div class='add'>+ * Author: Jim Kukunas &lt;james.t.kukunas@linux.intel.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Based on Ingo Molnar and Zach Brown's respective MMX and SSE routines</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * as published by the Free Software Foundation; version 2</div><div class='add'>+ * of the License.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AS_AVX</div><div class='add'>+</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;asm/i387.h&gt;</div><div class='add'>+</div><div class='add'>+#define ALIGN32 __aligned(32)</div><div class='add'>+</div><div class='add'>+#define YMM_SAVED_REGS 4</div><div class='add'>+</div><div class='add'>+#define YMMS_SAVE \</div><div class='add'>+do { \</div><div class='add'>+	preempt_disable(); \</div><div class='add'>+	cr0 = read_cr0(); \</div><div class='add'>+	clts(); \</div><div class='add'>+	asm volatile("vmovaps %%ymm0, %0" : "=m" (ymm_save[0]) : : "memory"); \</div><div class='add'>+	asm volatile("vmovaps %%ymm1, %0" : "=m" (ymm_save[32]) : : "memory"); \</div><div class='add'>+	asm volatile("vmovaps %%ymm2, %0" : "=m" (ymm_save[64]) : : "memory"); \</div><div class='add'>+	asm volatile("vmovaps %%ymm3, %0" : "=m" (ymm_save[96]) : : "memory"); \</div><div class='add'>+} while (0);</div><div class='add'>+</div><div class='add'>+#define YMMS_RESTORE \</div><div class='add'>+do { \</div><div class='add'>+	asm volatile("sfence" : : : "memory"); \</div><div class='add'>+	asm volatile("vmovaps %0, %%ymm3" : : "m" (ymm_save[96])); \</div><div class='add'>+	asm volatile("vmovaps %0, %%ymm2" : : "m" (ymm_save[64])); \</div><div class='add'>+	asm volatile("vmovaps %0, %%ymm1" : : "m" (ymm_save[32])); \</div><div class='add'>+	asm volatile("vmovaps %0, %%ymm0" : : "m" (ymm_save[0])); \</div><div class='add'>+	write_cr0(cr0); \</div><div class='add'>+	preempt_enable(); \</div><div class='add'>+} while (0);</div><div class='add'>+</div><div class='add'>+#define BLOCK4(i) \</div><div class='add'>+		BLOCK(32 * i, 0) \</div><div class='add'>+		BLOCK(32 * (i + 1), 1) \</div><div class='add'>+		BLOCK(32 * (i + 2), 2) \</div><div class='add'>+		BLOCK(32 * (i + 3), 3)</div><div class='add'>+</div><div class='add'>+#define BLOCK16() \</div><div class='add'>+		BLOCK4(0) \</div><div class='add'>+		BLOCK4(4) \</div><div class='add'>+		BLOCK4(8) \</div><div class='add'>+		BLOCK4(12)</div><div class='add'>+</div><div class='add'>+static void xor_avx_2(unsigned long bytes, unsigned long *p0, unsigned long *p1)</div><div class='add'>+{</div><div class='add'>+	unsigned long cr0, lines = bytes &gt;&gt; 9;</div><div class='add'>+	char ymm_save[32 * YMM_SAVED_REGS] ALIGN32;</div><div class='add'>+</div><div class='add'>+	YMMS_SAVE</div><div class='add'>+</div><div class='add'>+	while (lines--) {</div><div class='add'>+#undef BLOCK</div><div class='add'>+#define BLOCK(i, reg) \</div><div class='add'>+do { \</div><div class='add'>+	asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p1[i / sizeof(*p1)])); \</div><div class='add'>+	asm volatile("vxorps %0, %%ymm" #reg ", %%ymm"  #reg : : \</div><div class='add'>+		"m" (p0[i / sizeof(*p0)])); \</div><div class='add'>+	asm volatile("vmovdqa %%ymm" #reg ", %0" : \</div><div class='add'>+		"=m" (p0[i / sizeof(*p0)])); \</div><div class='add'>+} while (0);</div><div class='add'>+</div><div class='add'>+		BLOCK16()</div><div class='add'>+</div><div class='add'>+		p0 = (unsigned long *)((uintptr_t)p0 + 512);</div><div class='add'>+		p1 = (unsigned long *)((uintptr_t)p1 + 512);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	YMMS_RESTORE</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xor_avx_3(unsigned long bytes, unsigned long *p0, unsigned long *p1,</div><div class='add'>+	unsigned long *p2)</div><div class='add'>+{</div><div class='add'>+	unsigned long cr0, lines = bytes &gt;&gt; 9;</div><div class='add'>+	char ymm_save[32 * YMM_SAVED_REGS] ALIGN32;</div><div class='add'>+</div><div class='add'>+	YMMS_SAVE</div><div class='add'>+</div><div class='add'>+	while (lines--) {</div><div class='add'>+#undef BLOCK</div><div class='add'>+#define BLOCK(i, reg) \</div><div class='add'>+do { \</div><div class='add'>+	asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p2[i / sizeof(*p2)])); \</div><div class='add'>+	asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \</div><div class='add'>+		"m" (p1[i / sizeof(*p1)])); \</div><div class='add'>+	asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \</div><div class='add'>+		"m" (p0[i / sizeof(*p0)])); \</div><div class='add'>+	asm volatile("vmovdqa %%ymm" #reg ", %0" : \</div><div class='add'>+		"=m" (p0[i / sizeof(*p0)])); \</div><div class='add'>+} while (0);</div><div class='add'>+</div><div class='add'>+		BLOCK16()</div><div class='add'>+</div><div class='add'>+		p0 = (unsigned long *)((uintptr_t)p0 + 512);</div><div class='add'>+		p1 = (unsigned long *)((uintptr_t)p1 + 512);</div><div class='add'>+		p2 = (unsigned long *)((uintptr_t)p2 + 512);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	YMMS_RESTORE</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xor_avx_4(unsigned long bytes, unsigned long *p0, unsigned long *p1,</div><div class='add'>+	unsigned long *p2, unsigned long *p3)</div><div class='add'>+{</div><div class='add'>+	unsigned long cr0, lines = bytes &gt;&gt; 9;</div><div class='add'>+	char ymm_save[32 * YMM_SAVED_REGS] ALIGN32;</div><div class='add'>+</div><div class='add'>+	YMMS_SAVE</div><div class='add'>+</div><div class='add'>+	while (lines--) {</div><div class='add'>+#undef BLOCK</div><div class='add'>+#define BLOCK(i, reg) \</div><div class='add'>+do { \</div><div class='add'>+	asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p3[i / sizeof(*p3)])); \</div><div class='add'>+	asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \</div><div class='add'>+		"m" (p2[i / sizeof(*p2)])); \</div><div class='add'>+	asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \</div><div class='add'>+		"m" (p1[i / sizeof(*p1)])); \</div><div class='add'>+	asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \</div><div class='add'>+		"m" (p0[i / sizeof(*p0)])); \</div><div class='add'>+	asm volatile("vmovdqa %%ymm" #reg ", %0" : \</div><div class='add'>+		"=m" (p0[i / sizeof(*p0)])); \</div><div class='add'>+} while (0);</div><div class='add'>+</div><div class='add'>+		BLOCK16();</div><div class='add'>+</div><div class='add'>+		p0 = (unsigned long *)((uintptr_t)p0 + 512);</div><div class='add'>+		p1 = (unsigned long *)((uintptr_t)p1 + 512);</div><div class='add'>+		p2 = (unsigned long *)((uintptr_t)p2 + 512);</div><div class='add'>+		p3 = (unsigned long *)((uintptr_t)p3 + 512);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	YMMS_RESTORE</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xor_avx_5(unsigned long bytes, unsigned long *p0, unsigned long *p1,</div><div class='add'>+	unsigned long *p2, unsigned long *p3, unsigned long *p4)</div><div class='add'>+{</div><div class='add'>+	unsigned long cr0, lines = bytes &gt;&gt; 9;</div><div class='add'>+	char ymm_save[32 * YMM_SAVED_REGS] ALIGN32;</div><div class='add'>+</div><div class='add'>+	YMMS_SAVE</div><div class='add'>+</div><div class='add'>+	while (lines--) {</div><div class='add'>+#undef BLOCK</div><div class='add'>+#define BLOCK(i, reg) \</div><div class='add'>+do { \</div><div class='add'>+	asm volatile("vmovdqa %0, %%ymm" #reg : : "m" (p4[i / sizeof(*p4)])); \</div><div class='add'>+	asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \</div><div class='add'>+		"m" (p3[i / sizeof(*p3)])); \</div><div class='add'>+	asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \</div><div class='add'>+		"m" (p2[i / sizeof(*p2)])); \</div><div class='add'>+	asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \</div><div class='add'>+		"m" (p1[i / sizeof(*p1)])); \</div><div class='add'>+	asm volatile("vxorps %0, %%ymm" #reg ", %%ymm" #reg : : \</div><div class='add'>+		"m" (p0[i / sizeof(*p0)])); \</div><div class='add'>+	asm volatile("vmovdqa %%ymm" #reg ", %0" : \</div><div class='add'>+		"=m" (p0[i / sizeof(*p0)])); \</div><div class='add'>+} while (0);</div><div class='add'>+</div><div class='add'>+		BLOCK16()</div><div class='add'>+</div><div class='add'>+		p0 = (unsigned long *)((uintptr_t)p0 + 512);</div><div class='add'>+		p1 = (unsigned long *)((uintptr_t)p1 + 512);</div><div class='add'>+		p2 = (unsigned long *)((uintptr_t)p2 + 512);</div><div class='add'>+		p3 = (unsigned long *)((uintptr_t)p3 + 512);</div><div class='add'>+		p4 = (unsigned long *)((uintptr_t)p4 + 512);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	YMMS_RESTORE</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct xor_block_template xor_block_avx = {</div><div class='add'>+	.name = "avx",</div><div class='add'>+	.do_2 = xor_avx_2,</div><div class='add'>+	.do_3 = xor_avx_3,</div><div class='add'>+	.do_4 = xor_avx_4,</div><div class='add'>+	.do_5 = xor_avx_5,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AVX_XOR_SPEED \</div><div class='add'>+do { \</div><div class='add'>+	if (cpu_has_avx) \</div><div class='add'>+		xor_speed(&amp;xor_block_avx); \</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define AVX_SELECT(FASTEST) \</div><div class='add'>+	(cpu_has_avx ? &amp;xor_block_avx : FASTEST)</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+#define AVX_XOR_SPEED {}</div><div class='add'>+</div><div class='add'>+#define AVX_SELECT(FASTEST) (FASTEST)</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/x86/include/asm/xsave.h b/arch/x86/include/asm/xsave.h<br/>index c6ce2452f10c..8a1b6f9b594a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/include/asm/xsave.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/include/asm/xsave.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/include/asm/xsave.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/include/asm/xsave.h</a></div><div class='hunk'>@@ -80,10 +80,7 @@ static inline int xsave_user(struct xsave_struct __user *buf)</div><div class='ctx'> 			     "3:  movl $-1,%[err]\n"</div><div class='ctx'> 			     "    jmp  2b\n"</div><div class='ctx'> 			     ".previous\n"</div><div class='del'>-			     ".section __ex_table,\"a\"\n"</div><div class='del'>-			     _ASM_ALIGN "\n"</div><div class='del'>-			     _ASM_PTR "1b,3b\n"</div><div class='del'>-			     ".previous"</div><div class='add'>+			     _ASM_EXTABLE(1b,3b)</div><div class='ctx'> 			     : [err] "=r" (err)</div><div class='ctx'> 			     : "D" (buf), "a" (-1), "d" (-1), "0" (0)</div><div class='ctx'> 			     : "memory");</div><div class='hunk'>@@ -106,10 +103,7 @@ static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask)</div><div class='ctx'> 			     "3:  movl $-1,%[err]\n"</div><div class='ctx'> 			     "    jmp  2b\n"</div><div class='ctx'> 			     ".previous\n"</div><div class='del'>-			     ".section __ex_table,\"a\"\n"</div><div class='del'>-			     _ASM_ALIGN "\n"</div><div class='del'>-			     _ASM_PTR "1b,3b\n"</div><div class='del'>-			     ".previous"</div><div class='add'>+			     _ASM_EXTABLE(1b,3b)</div><div class='ctx'> 			     : [err] "=r" (err)</div><div class='ctx'> 			     : "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)</div><div class='ctx'> 			     : "memory");	/* memory required? */</div><div class='head'>diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile<br/>index 532d2e090e6f..8215e5652d97 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Makefile for the linux kernel.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-extra-y                := head_$(BITS).o head$(BITS).o head.o init_task.o vmlinux.lds</div><div class='add'>+extra-y                := head_$(BITS).o head$(BITS).o head.o vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> CPPFLAGS_vmlinux.lds += -U$(UTS_MACHINE)</div><div class='ctx'> </div><div class='hunk'>@@ -35,7 +35,6 @@ obj-y			+= tsc.o io_delay.o rtc.o</div><div class='ctx'> obj-y			+= pci-iommu_table.o</div><div class='ctx'> obj-y			+= resource.o</div><div class='ctx'> </div><div class='del'>-obj-y				+= trampoline.o trampoline_$(BITS).o</div><div class='ctx'> obj-y				+= process.o</div><div class='ctx'> obj-y				+= i387.o xsave.o</div><div class='ctx'> obj-y				+= ptrace.o</div><div class='hunk'>@@ -48,8 +47,6 @@ obj-$(CONFIG_STACKTRACE)	+= stacktrace.o</div><div class='ctx'> obj-y				+= cpu/</div><div class='ctx'> obj-y				+= acpi/</div><div class='ctx'> obj-y				+= reboot.o</div><div class='del'>-obj-$(CONFIG_X86_32)		+= reboot_32.o</div><div class='del'>-obj-$(CONFIG_MCA)		+= mca_32.o</div><div class='ctx'> obj-$(CONFIG_X86_MSR)		+= msr.o</div><div class='ctx'> obj-$(CONFIG_X86_CPUID)		+= cpuid.o</div><div class='ctx'> obj-$(CONFIG_PCI)		+= early-quirks.o</div><div class='hunk'>@@ -101,6 +98,7 @@ obj-$(CONFIG_X86_CHECK_BIOS_CORRUPTION) += check.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SWIOTLB)			+= pci-swiotlb.o</div><div class='ctx'> obj-$(CONFIG_OF)			+= devicetree.o</div><div class='add'>+obj-$(CONFIG_UPROBES)			+= uprobes.o</div><div class='ctx'> </div><div class='ctx'> ###</div><div class='ctx'> # 64 bit specific files</div><div class='head'>diff --git a/arch/x86/kernel/acpi/Makefile b/arch/x86/kernel/acpi/Makefile<br/>index 6f35260bb3ef..163b22581472 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/acpi/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/Makefile</a></div><div class='hunk'>@@ -1,14 +1,7 @@</div><div class='del'>-subdir-				:= realmode</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_ACPI)		+= boot.o</div><div class='del'>-obj-$(CONFIG_ACPI_SLEEP)	+= sleep.o wakeup_rm.o wakeup_$(BITS).o</div><div class='add'>+obj-$(CONFIG_ACPI_SLEEP)	+= sleep.o wakeup_$(BITS).o</div><div class='ctx'> </div><div class='ctx'> ifneq ($(CONFIG_ACPI_PROCESSOR),)</div><div class='ctx'> obj-y				+= cstate.o</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='del'>-$(obj)/wakeup_rm.o:    $(obj)/realmode/wakeup.bin</div><div class='del'>-</div><div class='del'>-$(obj)/realmode/wakeup.bin: FORCE</div><div class='del'>-	$(Q)$(MAKE) $(build)=$(obj)/realmode</div><div class='del'>-</div><div class='head'>diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c<br/>index a415b1f44365..8afb69319815 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/boot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/boot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/acpi/boot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/boot.c</a></div><div class='hunk'>@@ -593,7 +593,7 @@ void __init acpi_set_irq_model_ioapic(void)</div><div class='ctx'> #ifdef CONFIG_ACPI_HOTPLUG_CPU</div><div class='ctx'> #include &lt;acpi/processor.h&gt;</div><div class='ctx'> </div><div class='del'>-static void __cpuinitdata acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)</div><div class='add'>+static void __cpuinit acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_ACPI_NUMA</div><div class='ctx'> 	int nid;</div><div class='hunk'>@@ -990,7 +990,7 @@ void __init mp_config_acpi_legacy_irqs(void)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct mpc_intsrc mp_irq;</div><div class='ctx'> </div><div class='del'>-#if defined (CONFIG_MCA) || defined (CONFIG_EISA)</div><div class='add'>+#ifdef CONFIG_EISA</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Fabricate the legacy ISA bus (bus #31).</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/.gitignore b/arch/x86/kernel/acpi/realmode/.gitignore<br/>deleted file mode 100644<br/>index 58f1f48a58f8..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/.gitignore?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/.gitignore</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,3 +0,0 @@</div><div class='del'>-wakeup.bin</div><div class='del'>-wakeup.elf</div><div class='del'>-wakeup.lds</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/Makefile b/arch/x86/kernel/acpi/realmode/Makefile<br/>deleted file mode 100644<br/>index 6a564ac67ef5..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,59 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# arch/x86/kernel/acpi/realmode/Makefile</div><div class='del'>-#</div><div class='del'>-# This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>-# License.  See the file "COPYING" in the main directory of this archive</div><div class='del'>-# for more details.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-always		:= wakeup.bin</div><div class='del'>-targets		:= wakeup.elf wakeup.lds</div><div class='del'>-</div><div class='del'>-wakeup-y	+= wakeup.o wakemain.o video-mode.o copy.o bioscall.o regs.o</div><div class='del'>-</div><div class='del'>-# The link order of the video-*.o modules can matter.  In particular,</div><div class='del'>-# video-vga.o *must* be listed first, followed by video-vesa.o.</div><div class='del'>-# Hardware-specific drivers should follow in the order they should be</div><div class='del'>-# probed, and video-bios.o should typically be last.</div><div class='del'>-wakeup-y	+= video-vga.o</div><div class='del'>-wakeup-y	+= video-vesa.o</div><div class='del'>-wakeup-y	+= video-bios.o</div><div class='del'>-</div><div class='del'>-targets		+= $(wakeup-y)</div><div class='del'>-</div><div class='del'>-bootsrc		:= $(src)/../../../boot</div><div class='del'>-</div><div class='del'>-# ---------------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-# How to compile the 16-bit code.  Note we always compile for -march=i386,</div><div class='del'>-# that way we can complain to the user if the CPU is insufficient.</div><div class='del'>-# Compile with _SETUP since this is similar to the boot-time setup code.</div><div class='del'>-KBUILD_CFLAGS	:= $(LINUXINCLUDE) -g -Os -D_SETUP -D_WAKEUP -D__KERNEL__ \</div><div class='del'>-		   -I$(srctree)/$(bootsrc) \</div><div class='del'>-		   $(cflags-y) \</div><div class='del'>-		   -Wall -Wstrict-prototypes \</div><div class='del'>-		   -march=i386 -mregparm=3 \</div><div class='del'>-		   -include $(srctree)/$(bootsrc)/code16gcc.h \</div><div class='del'>-		   -fno-strict-aliasing -fomit-frame-pointer \</div><div class='del'>-		   $(call cc-option, -ffreestanding) \</div><div class='del'>-		   $(call cc-option, -fno-toplevel-reorder,\</div><div class='del'>-			$(call cc-option, -fno-unit-at-a-time)) \</div><div class='del'>-		   $(call cc-option, -fno-stack-protector) \</div><div class='del'>-		   $(call cc-option, -mpreferred-stack-boundary=2)</div><div class='del'>-KBUILD_CFLAGS	+= $(call cc-option, -m32)</div><div class='del'>-KBUILD_AFLAGS	:= $(KBUILD_CFLAGS) -D__ASSEMBLY__</div><div class='del'>-GCOV_PROFILE := n</div><div class='del'>-</div><div class='del'>-WAKEUP_OBJS = $(addprefix $(obj)/,$(wakeup-y))</div><div class='del'>-</div><div class='del'>-LDFLAGS_wakeup.elf	:= -T</div><div class='del'>-</div><div class='del'>-CPPFLAGS_wakeup.lds += -P -C</div><div class='del'>-</div><div class='del'>-$(obj)/wakeup.elf: $(obj)/wakeup.lds $(WAKEUP_OBJS) FORCE</div><div class='del'>-	$(call if_changed,ld)</div><div class='del'>-</div><div class='del'>-OBJCOPYFLAGS_wakeup.bin	:= -O binary</div><div class='del'>-</div><div class='del'>-$(obj)/wakeup.bin: $(obj)/wakeup.elf FORCE</div><div class='del'>-	$(call if_changed,objcopy)</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/bioscall.S b/arch/x86/kernel/acpi/realmode/bioscall.S<br/>deleted file mode 100644<br/>index f51eb0bb56ce..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/bioscall.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/bioscall.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-#include "../../../boot/bioscall.S"</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/copy.S b/arch/x86/kernel/acpi/realmode/copy.S<br/>deleted file mode 100644<br/>index dc59ebee69d8..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/copy.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/copy.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-#include "../../../boot/copy.S"</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/regs.c b/arch/x86/kernel/acpi/realmode/regs.c<br/>deleted file mode 100644<br/>index 6206033ba202..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/regs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/regs.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-#include "../../../boot/regs.c"</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/video-bios.c b/arch/x86/kernel/acpi/realmode/video-bios.c<br/>deleted file mode 100644<br/>index 7deabc144a27..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/video-bios.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/video-bios.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-#include "../../../boot/video-bios.c"</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/video-mode.c b/arch/x86/kernel/acpi/realmode/video-mode.c<br/>deleted file mode 100644<br/>index 328ad209f113..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/video-mode.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/video-mode.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-#include "../../../boot/video-mode.c"</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/video-vesa.c b/arch/x86/kernel/acpi/realmode/video-vesa.c<br/>deleted file mode 100644<br/>index 9dbb9672226a..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/video-vesa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/video-vesa.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-#include "../../../boot/video-vesa.c"</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/video-vga.c b/arch/x86/kernel/acpi/realmode/video-vga.c<br/>deleted file mode 100644<br/>index bcc81255f374..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/video-vga.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/video-vga.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-#include "../../../boot/video-vga.c"</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/wakeup.lds.S b/arch/x86/kernel/acpi/realmode/wakeup.lds.S<br/>deleted file mode 100644<br/>index d4f8010a5b1b..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/wakeup.lds.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/wakeup.lds.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,62 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * wakeup.ld</div><div class='del'>- *</div><div class='del'>- * Linker script for the real-mode wakeup code</div><div class='del'>- */</div><div class='del'>-#undef i386</div><div class='del'>-#include "wakeup.h"</div><div class='del'>-</div><div class='del'>-OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")</div><div class='del'>-OUTPUT_ARCH(i386)</div><div class='del'>-ENTRY(_start)</div><div class='del'>-</div><div class='del'>-SECTIONS</div><div class='del'>-{</div><div class='del'>-	. = 0;</div><div class='del'>-	.jump	: {</div><div class='del'>-		*(.jump)</div><div class='del'>-	} = 0x90909090</div><div class='del'>-</div><div class='del'>-	. = WAKEUP_HEADER_OFFSET;</div><div class='del'>-	.header : {</div><div class='del'>-		*(.header)</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	. = ALIGN(16);</div><div class='del'>-	.text : {</div><div class='del'>-		 *(.text*)</div><div class='del'>-	} = 0x90909090</div><div class='del'>-</div><div class='del'>-	. = ALIGN(16);</div><div class='del'>-	.rodata : {</div><div class='del'>-		*(.rodata*)</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	.videocards : {</div><div class='del'>-		video_cards = .;</div><div class='del'>-		*(.videocards)</div><div class='del'>-		video_cards_end = .;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	. = ALIGN(16);</div><div class='del'>-	.data : {</div><div class='del'>-		 *(.data*)</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	. = ALIGN(16);</div><div class='del'>-	.bss :	{</div><div class='del'>-		__bss_start = .;</div><div class='del'>-		*(.bss)</div><div class='del'>-		__bss_end = .;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	.signature : {</div><div class='del'>-		*(.signature)</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	_end = .;</div><div class='del'>-</div><div class='del'>-	/DISCARD/ : {</div><div class='del'>-		*(.note*)</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c<br/>index 146a49c763a4..95bf99de9058 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/sleep.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/sleep.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/acpi/sleep.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/sleep.c</a></div><div class='hunk'>@@ -14,8 +14,9 @@</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/realmode.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "realmode/wakeup.h"</div><div class='add'>+#include "../../realmode/rm/wakeup.h"</div><div class='ctx'> #include "sleep.h"</div><div class='ctx'> </div><div class='ctx'> unsigned long acpi_realmode_flags;</div><div class='hunk'>@@ -36,13 +37,9 @@ asmlinkage void acpi_enter_s3(void)</div><div class='ctx'>  */</div><div class='ctx'> int acpi_suspend_lowlevel(void)</div><div class='ctx'> {</div><div class='del'>-	struct wakeup_header *header;</div><div class='del'>-	/* address in low memory of the wakeup routine. */</div><div class='del'>-	char *acpi_realmode;</div><div class='add'>+	struct wakeup_header *header =</div><div class='add'>+		(struct wakeup_header *) __va(real_mode_header-&gt;wakeup_header);</div><div class='ctx'> </div><div class='del'>-	acpi_realmode = TRAMPOLINE_SYM(acpi_wakeup_code);</div><div class='del'>-</div><div class='del'>-	header = (struct wakeup_header *)(acpi_realmode + WAKEUP_HEADER_OFFSET);</div><div class='ctx'> 	if (header-&gt;signature != WAKEUP_HEADER_SIGNATURE) {</div><div class='ctx'> 		printk(KERN_ERR "wakeup header does not match\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -50,27 +47,6 @@ int acpi_suspend_lowlevel(void)</div><div class='ctx'> </div><div class='ctx'> 	header-&gt;video_mode = saved_video_mode;</div><div class='ctx'> </div><div class='del'>-	header-&gt;wakeup_jmp_seg = acpi_wakeup_address &gt;&gt; 4;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set up the wakeup GDT.  We set these up as Big Real Mode,</div><div class='del'>-	 * that is, with limits set to 4 GB.  At least the Lenovo</div><div class='del'>-	 * Thinkpad X61 is known to need this for the video BIOS</div><div class='del'>-	 * initialization quirk to work; this is likely to also</div><div class='del'>-	 * be the case for other laptops or integrated video devices.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/* GDT[0]: GDT self-pointer */</div><div class='del'>-	header-&gt;wakeup_gdt[0] =</div><div class='del'>-		(u64)(sizeof(header-&gt;wakeup_gdt) - 1) +</div><div class='del'>-		((u64)__pa(&amp;header-&gt;wakeup_gdt) &lt;&lt; 16);</div><div class='del'>-	/* GDT[1]: big real mode-like code segment */</div><div class='del'>-	header-&gt;wakeup_gdt[1] =</div><div class='del'>-		GDT_ENTRY(0x809b, acpi_wakeup_address, 0xfffff);</div><div class='del'>-	/* GDT[2]: big real mode-like data segment */</div><div class='del'>-	header-&gt;wakeup_gdt[2] =</div><div class='del'>-		GDT_ENTRY(0x8093, acpi_wakeup_address, 0xfffff);</div><div class='del'>-</div><div class='ctx'> #ifndef CONFIG_64BIT</div><div class='ctx'> 	store_gdt((struct desc_ptr *)&amp;header-&gt;pmode_gdt);</div><div class='ctx'> </div><div class='hunk'>@@ -95,7 +71,6 @@ int acpi_suspend_lowlevel(void)</div><div class='ctx'> 	header-&gt;pmode_cr3 = (u32)__pa(&amp;initial_page_table);</div><div class='ctx'> 	saved_magic = 0x12345678;</div><div class='ctx'> #else /* CONFIG_64BIT */</div><div class='del'>-	header-&gt;trampoline_segment = trampoline_address() &gt;&gt; 4;</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	stack_start = (unsigned long)temp_stack + sizeof(temp_stack);</div><div class='ctx'> 	early_gdt_descr.address =</div><div class='head'>diff --git a/arch/x86/kernel/acpi/sleep.h b/arch/x86/kernel/acpi/sleep.h<br/>index d68677a2a010..5653a5791ec9 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/sleep.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/sleep.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/acpi/sleep.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/acpi/sleep.h</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'>  *	Variables and functions used by the code in sleep.c</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/trampoline.h&gt;</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/realmode.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern unsigned long saved_video_mode;</div><div class='ctx'> extern long saved_magic;</div><div class='head'>diff --git a/arch/x86/kernel/acpi/wakeup_rm.S b/arch/x86/kernel/acpi/wakeup_rm.S<br/>deleted file mode 100644<br/>index 63b8ab524f2c..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/wakeup_rm.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/wakeup_rm.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Wrapper script for the realmode binary as a transport object</div><div class='del'>- * before copying to low memory.</div><div class='del'>- */</div><div class='del'>-#include &lt;asm/page_types.h&gt;</div><div class='del'>-</div><div class='del'>-	.section ".x86_trampoline","a"</div><div class='del'>-	.balign PAGE_SIZE</div><div class='del'>-	.globl	acpi_wakeup_code</div><div class='del'>-acpi_wakeup_code:</div><div class='del'>-	.incbin	"arch/x86/kernel/acpi/realmode/wakeup.bin"</div><div class='del'>-	.size	acpi_wakeup_code, .-acpi_wakeup_code</div><div class='head'>diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c<br/>index 6e76c191a835..d5fd66f0d4cd 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/aperture_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/aperture_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/aperture_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/aperture_64.c</a></div><div class='hunk'>@@ -20,7 +20,6 @@</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='del'>-#include &lt;linux/kmemleak.h&gt;</div><div class='ctx'> #include &lt;asm/e820.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/iommu.h&gt;</div><div class='hunk'>@@ -95,11 +94,6 @@ static u32 __init allocate_aperture(void)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	memblock_reserve(addr, aper_size);</div><div class='del'>-	/*</div><div class='del'>-	 * Kmemleak should not scan this block as it may not be mapped via the</div><div class='del'>-	 * kernel direct mapping.</div><div class='del'>-	 */</div><div class='del'>-	kmemleak_ignore(phys_to_virt(addr));</div><div class='ctx'> 	printk(KERN_INFO "Mapping aperture over %d KB of RAM @ %lx\n",</div><div class='ctx'> 			aper_size &gt;&gt; 10, addr);</div><div class='ctx'> 	insert_aperture_resource((u32)addr, aper_size);</div><div class='head'>diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c<br/>index edc24480469f..39a222e094af 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/apic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/apic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/apic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/apic.c</a></div><div class='hunk'>@@ -35,6 +35,7 @@</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/irq_remapping.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='ctx'> #include &lt;asm/x86_init.h&gt;</div><div class='ctx'> #include &lt;asm/pgalloc.h&gt;</div><div class='hunk'>@@ -1325,11 +1326,13 @@ void __cpuinit setup_local_APIC(void)</div><div class='ctx'> 			       acked);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		if (cpu_has_tsc) {</div><div class='del'>-			rdtscll(ntsc);</div><div class='del'>-			max_loops = (cpu_khz &lt;&lt; 10) - (ntsc - tsc);</div><div class='del'>-		} else</div><div class='del'>-			max_loops--;</div><div class='add'>+		if (queued) {</div><div class='add'>+			if (cpu_has_tsc) {</div><div class='add'>+				rdtscll(ntsc);</div><div class='add'>+				max_loops = (cpu_khz &lt;&lt; 10) - (ntsc - tsc);</div><div class='add'>+			} else</div><div class='add'>+				max_loops--;</div><div class='add'>+		}</div><div class='ctx'> 	} while (queued &amp;&amp; max_loops &gt; 0);</div><div class='ctx'> 	WARN_ON(max_loops &lt;= 0);</div><div class='ctx'> </div><div class='hunk'>@@ -1441,8 +1444,8 @@ void __init bsp_end_local_APIC_setup(void)</div><div class='ctx'> 	 * Now that local APIC setup is completed for BP, configure the fault</div><div class='ctx'> 	 * handling for interrupt remapping.</div><div class='ctx'> 	 */</div><div class='del'>-	if (intr_remapping_enabled)</div><div class='del'>-		enable_drhd_fault_handling();</div><div class='add'>+	if (irq_remapping_enabled)</div><div class='add'>+		irq_remap_enable_fault_handling();</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1517,7 +1520,7 @@ void enable_x2apic(void)</div><div class='ctx'> int __init enable_IR(void)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_IRQ_REMAP</div><div class='del'>-	if (!intr_remapping_supported()) {</div><div class='add'>+	if (!irq_remapping_supported()) {</div><div class='ctx'> 		pr_debug("intr-remapping not supported\n");</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1528,7 +1531,7 @@ int __init enable_IR(void)</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return enable_intr_remapping();</div><div class='add'>+	return irq_remapping_enable();</div><div class='ctx'> #endif</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='hunk'>@@ -1537,10 +1540,13 @@ void __init enable_IR_x2apic(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret, x2apic_enabled = 0;</div><div class='del'>-	int dmar_table_init_ret;</div><div class='add'>+	int hardware_init_ret;</div><div class='add'>+</div><div class='add'>+	/* Make sure irq_remap_ops are initialized */</div><div class='add'>+	setup_irq_remapping_ops();</div><div class='ctx'> </div><div class='del'>-	dmar_table_init_ret = dmar_table_init();</div><div class='del'>-	if (dmar_table_init_ret &amp;&amp; !x2apic_supported())</div><div class='add'>+	hardware_init_ret = irq_remapping_prepare();</div><div class='add'>+	if (hardware_init_ret &amp;&amp; !x2apic_supported())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	ret = save_ioapic_entries();</div><div class='hunk'>@@ -1556,7 +1562,7 @@ void __init enable_IR_x2apic(void)</div><div class='ctx'> 	if (x2apic_preenabled &amp;&amp; nox2apic)</div><div class='ctx'> 		disable_x2apic();</div><div class='ctx'> </div><div class='del'>-	if (dmar_table_init_ret)</div><div class='add'>+	if (hardware_init_ret)</div><div class='ctx'> 		ret = -1;</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = enable_IR();</div><div class='hunk'>@@ -2176,8 +2182,8 @@ static int lapic_suspend(void)</div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> 	disable_local_APIC();</div><div class='ctx'> </div><div class='del'>-	if (intr_remapping_enabled)</div><div class='del'>-		disable_intr_remapping();</div><div class='add'>+	if (irq_remapping_enabled)</div><div class='add'>+		irq_remapping_disable();</div><div class='ctx'> </div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2193,7 +2199,7 @@ static void lapic_resume(void)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='del'>-	if (intr_remapping_enabled) {</div><div class='add'>+	if (irq_remapping_enabled) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * IO-APIC and PIC have their own resume routines.</div><div class='ctx'> 		 * We just mask them here to make sure the interrupt</div><div class='hunk'>@@ -2245,8 +2251,8 @@ static void lapic_resume(void)</div><div class='ctx'> 	apic_write(APIC_ESR, 0);</div><div class='ctx'> 	apic_read(APIC_ESR);</div><div class='ctx'> </div><div class='del'>-	if (intr_remapping_enabled)</div><div class='del'>-		reenable_intr_remapping(x2apic_mode);</div><div class='add'>+	if (irq_remapping_enabled)</div><div class='add'>+		irq_remapping_reenable(x2apic_mode);</div><div class='ctx'> </div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c<br/>index 359b6899a36c..0e881c46e8c8 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/apic_flat_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/apic_flat_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/apic_flat_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/apic_flat_64.c</a></div><div class='hunk'>@@ -227,6 +227,7 @@ static struct apic apic_flat =  {</div><div class='ctx'> </div><div class='ctx'> 	.read				= native_apic_mem_read,</div><div class='ctx'> 	.write				= native_apic_mem_write,</div><div class='add'>+	.eoi_write			= native_apic_mem_write,</div><div class='ctx'> 	.icr_read			= native_apic_icr_read,</div><div class='ctx'> 	.icr_write			= native_apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= native_apic_wait_icr_idle,</div><div class='hunk'>@@ -386,6 +387,7 @@ static struct apic apic_physflat =  {</div><div class='ctx'> </div><div class='ctx'> 	.read				= native_apic_mem_read,</div><div class='ctx'> 	.write				= native_apic_mem_write,</div><div class='add'>+	.eoi_write			= native_apic_mem_write,</div><div class='ctx'> 	.icr_read			= native_apic_icr_read,</div><div class='ctx'> 	.icr_write			= native_apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= native_apic_wait_icr_idle,</div><div class='head'>diff --git a/arch/x86/kernel/apic/apic_noop.c b/arch/x86/kernel/apic/apic_noop.c<br/>index 634ae6cdd5c9..a6e4c6e06c08 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/apic_noop.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/apic_noop.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/apic_noop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/apic_noop.c</a></div><div class='hunk'>@@ -181,6 +181,7 @@ struct apic apic_noop = {</div><div class='ctx'> </div><div class='ctx'> 	.read				= noop_apic_read,</div><div class='ctx'> 	.write				= noop_apic_write,</div><div class='add'>+	.eoi_write			= noop_apic_write,</div><div class='ctx'> 	.icr_read			= noop_apic_icr_read,</div><div class='ctx'> 	.icr_write			= noop_apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= noop_apic_wait_icr_idle,</div><div class='head'>diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c<br/>index 23e75422e013..6ec6d5d297c3 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/apic_numachip.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/apic_numachip.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/apic_numachip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/apic_numachip.c</a></div><div class='hunk'>@@ -295,6 +295,7 @@ static struct apic apic_numachip __refconst = {</div><div class='ctx'> </div><div class='ctx'> 	.read				= native_apic_mem_read,</div><div class='ctx'> 	.write				= native_apic_mem_write,</div><div class='add'>+	.eoi_write			= native_apic_mem_write,</div><div class='ctx'> 	.icr_read			= native_apic_icr_read,</div><div class='ctx'> 	.icr_write			= native_apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= native_apic_wait_icr_idle,</div><div class='head'>diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp_32.c<br/>index 0cdec7065aff..31fbdbfbf960 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/bigsmp_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/bigsmp_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/bigsmp_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/bigsmp_32.c</a></div><div class='hunk'>@@ -248,6 +248,7 @@ static struct apic apic_bigsmp = {</div><div class='ctx'> </div><div class='ctx'> 	.read				= native_apic_mem_read,</div><div class='ctx'> 	.write				= native_apic_mem_write,</div><div class='add'>+	.eoi_write			= native_apic_mem_write,</div><div class='ctx'> 	.icr_read			= native_apic_icr_read,</div><div class='ctx'> 	.icr_write			= native_apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= native_apic_wait_icr_idle,</div><div class='head'>diff --git a/arch/x86/kernel/apic/es7000_32.c b/arch/x86/kernel/apic/es7000_32.c<br/>index e42d1d3b9134..db4ab1be3c79 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/es7000_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/es7000_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/es7000_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/es7000_32.c</a></div><div class='hunk'>@@ -678,6 +678,7 @@ static struct apic __refdata apic_es7000_cluster = {</div><div class='ctx'> </div><div class='ctx'> 	.read				= native_apic_mem_read,</div><div class='ctx'> 	.write				= native_apic_mem_write,</div><div class='add'>+	.eoi_write			= native_apic_mem_write,</div><div class='ctx'> 	.icr_read			= native_apic_icr_read,</div><div class='ctx'> 	.icr_write			= native_apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= native_apic_wait_icr_idle,</div><div class='hunk'>@@ -742,6 +743,7 @@ static struct apic __refdata apic_es7000 = {</div><div class='ctx'> </div><div class='ctx'> 	.read				= native_apic_mem_read,</div><div class='ctx'> 	.write				= native_apic_mem_write,</div><div class='add'>+	.eoi_write			= native_apic_mem_write,</div><div class='ctx'> 	.icr_read			= native_apic_icr_read,</div><div class='ctx'> 	.icr_write			= native_apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= native_apic_wait_icr_idle,</div><div class='head'>diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c<br/>index e88300d8e80a..5f0ff597437c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/io_apic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/io_apic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/io_apic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/io_apic.c</a></div><div class='hunk'>@@ -68,23 +68,21 @@</div><div class='ctx'> #define for_each_irq_pin(entry, head) \</div><div class='ctx'> 	for (entry = head; entry; entry = entry-&gt;next)</div><div class='ctx'> </div><div class='del'>-static void		__init __ioapic_init_mappings(void);</div><div class='del'>-</div><div class='del'>-static unsigned int	__io_apic_read  (unsigned int apic, unsigned int reg);</div><div class='del'>-static void		__io_apic_write (unsigned int apic, unsigned int reg, unsigned int val);</div><div class='del'>-static void		__io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);</div><div class='del'>-</div><div class='del'>-static struct io_apic_ops io_apic_ops = {</div><div class='del'>-	.init	= __ioapic_init_mappings,</div><div class='del'>-	.read	= __io_apic_read,</div><div class='del'>-	.write	= __io_apic_write,</div><div class='del'>-	.modify = __io_apic_modify,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init set_io_apic_ops(const struct io_apic_ops *ops)</div><div class='add'>+#ifdef CONFIG_IRQ_REMAP</div><div class='add'>+static void irq_remap_modify_chip_defaults(struct irq_chip *chip);</div><div class='add'>+static inline bool irq_remapped(struct irq_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	return cfg-&gt;irq_2_iommu.iommu != NULL;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline bool irq_remapped(struct irq_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+static inline void irq_remap_modify_chip_defaults(struct irq_chip *chip)</div><div class='ctx'> {</div><div class='del'>-	io_apic_ops = *ops;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  *      Is the SiS APIC rmw bug present ?</div><div class='hunk'>@@ -142,7 +140,7 @@ int mp_irq_entries;</div><div class='ctx'> /* GSI interrupts */</div><div class='ctx'> static int nr_irqs_gsi = NR_IRQS_LEGACY;</div><div class='ctx'> </div><div class='del'>-#if defined (CONFIG_MCA) || defined (CONFIG_EISA)</div><div class='add'>+#ifdef CONFIG_EISA</div><div class='ctx'> int mp_bus_id_to_type[MAX_MP_BUSSES];</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -313,21 +311,6 @@ static void free_irq_at(unsigned int at, struct irq_cfg *cfg)</div><div class='ctx'> 	irq_free_desc(at);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)</div><div class='del'>-{</div><div class='del'>-	return io_apic_ops.read(apic, reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)</div><div class='del'>-{</div><div class='del'>-	io_apic_ops.write(apic, reg, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)</div><div class='del'>-{</div><div class='del'>-	io_apic_ops.modify(apic, reg, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> struct io_apic {</div><div class='ctx'> 	unsigned int index;</div><div class='hunk'>@@ -349,14 +332,14 @@ static inline void io_apic_eoi(unsigned int apic, unsigned int vector)</div><div class='ctx'> 	writel(vector, &amp;io_apic-&gt;eoi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int __io_apic_read(unsigned int apic, unsigned int reg)</div><div class='add'>+unsigned int native_io_apic_read(unsigned int apic, unsigned int reg)</div><div class='ctx'> {</div><div class='ctx'> 	struct io_apic __iomem *io_apic = io_apic_base(apic);</div><div class='ctx'> 	writel(reg, &amp;io_apic-&gt;index);</div><div class='ctx'> 	return readl(&amp;io_apic-&gt;data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)</div><div class='add'>+void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct io_apic __iomem *io_apic = io_apic_base(apic);</div><div class='ctx'> </div><div class='hunk'>@@ -370,7 +353,7 @@ static void __io_apic_write(unsigned int apic, unsigned int reg, unsigned int va</div><div class='ctx'>  *</div><div class='ctx'>  * Older SiS APIC requires we rewrite the index register</div><div class='ctx'>  */</div><div class='del'>-static void __io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)</div><div class='add'>+void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct io_apic __iomem *io_apic = io_apic_base(apic);</div><div class='ctx'> </div><div class='hunk'>@@ -379,29 +362,6 @@ static void __io_apic_modify(unsigned int apic, unsigned int reg, unsigned int v</div><div class='ctx'> 	writel(value, &amp;io_apic-&gt;data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool io_apic_level_ack_pending(struct irq_cfg *cfg)</div><div class='del'>-{</div><div class='del'>-	struct irq_pin_list *entry;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	raw_spin_lock_irqsave(&amp;ioapic_lock, flags);</div><div class='del'>-	for_each_irq_pin(entry, cfg-&gt;irq_2_pin) {</div><div class='del'>-		unsigned int reg;</div><div class='del'>-		int pin;</div><div class='del'>-</div><div class='del'>-		pin = entry-&gt;pin;</div><div class='del'>-		reg = io_apic_read(entry-&gt;apic, 0x10 + pin*2);</div><div class='del'>-		/* Is the remote IRR bit set? */</div><div class='del'>-		if (reg &amp; IO_APIC_REDIR_REMOTE_IRR) {</div><div class='del'>-			raw_spin_unlock_irqrestore(&amp;ioapic_lock, flags);</div><div class='del'>-			return true;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;ioapic_lock, flags);</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> union entry_union {</div><div class='ctx'> 	struct { u32 w1, w2; };</div><div class='ctx'> 	struct IO_APIC_route_entry entry;</div><div class='hunk'>@@ -875,7 +835,7 @@ static int __init find_isa_irq_apic(int irq, int type)</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_EISA) || defined(CONFIG_MCA)</div><div class='add'>+#ifdef CONFIG_EISA</div><div class='ctx'> /*</div><div class='ctx'>  * EISA Edge/Level control register, ELCR</div><div class='ctx'>  */</div><div class='hunk'>@@ -912,12 +872,6 @@ static int EISA_ELCR(unsigned int irq)</div><div class='ctx'> #define default_PCI_trigger(idx)	(1)</div><div class='ctx'> #define default_PCI_polarity(idx)	(1)</div><div class='ctx'> </div><div class='del'>-/* MCA interrupts are always polarity zero level triggered,</div><div class='del'>- * when listed as conforming in the MP table. */</div><div class='del'>-</div><div class='del'>-#define default_MCA_trigger(idx)	(1)</div><div class='del'>-#define default_MCA_polarity(idx)	default_ISA_polarity(idx)</div><div class='del'>-</div><div class='ctx'> static int irq_polarity(int idx)</div><div class='ctx'> {</div><div class='ctx'> 	int bus = mp_irqs[idx].srcbus;</div><div class='hunk'>@@ -975,7 +929,7 @@ static int irq_trigger(int idx)</div><div class='ctx'> 				trigger = default_ISA_trigger(idx);</div><div class='ctx'> 			else</div><div class='ctx'> 				trigger = default_PCI_trigger(idx);</div><div class='del'>-#if defined(CONFIG_EISA) || defined(CONFIG_MCA)</div><div class='add'>+#ifdef CONFIG_EISA</div><div class='ctx'> 			switch (mp_bus_id_to_type[bus]) {</div><div class='ctx'> 				case MP_BUS_ISA: /* ISA pin */</div><div class='ctx'> 				{</div><div class='hunk'>@@ -992,11 +946,6 @@ static int irq_trigger(int idx)</div><div class='ctx'> 					/* set before the switch */</div><div class='ctx'> 					break;</div><div class='ctx'> 				}</div><div class='del'>-				case MP_BUS_MCA: /* MCA pin */</div><div class='del'>-				{</div><div class='del'>-					trigger = default_MCA_trigger(idx);</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='ctx'> 				default:</div><div class='ctx'> 				{</div><div class='ctx'> 					printk(KERN_WARNING "broken BIOS!!\n");</div><div class='hunk'>@@ -1246,7 +1195,7 @@ static void __clear_irq_vector(int irq, struct irq_cfg *cfg)</div><div class='ctx'> 	BUG_ON(!cfg-&gt;vector);</div><div class='ctx'> </div><div class='ctx'> 	vector = cfg-&gt;vector;</div><div class='del'>-	for_each_cpu_and(cpu, cfg-&gt;domain, cpu_online_mask)</div><div class='add'>+	for_each_cpu(cpu, cfg-&gt;domain)</div><div class='ctx'> 		per_cpu(vector_irq, cpu)[vector] = -1;</div><div class='ctx'> </div><div class='ctx'> 	cfg-&gt;vector = 0;</div><div class='hunk'>@@ -1254,7 +1203,7 @@ static void __clear_irq_vector(int irq, struct irq_cfg *cfg)</div><div class='ctx'> </div><div class='ctx'> 	if (likely(!cfg-&gt;move_in_progress))</div><div class='ctx'> 		return;</div><div class='del'>-	for_each_cpu_and(cpu, cfg-&gt;old_domain, cpu_online_mask) {</div><div class='add'>+	for_each_cpu(cpu, cfg-&gt;old_domain) {</div><div class='ctx'> 		for (vector = FIRST_EXTERNAL_VECTOR; vector &lt; NR_VECTORS;</div><div class='ctx'> 								vector++) {</div><div class='ctx'> 			if (per_cpu(vector_irq, cpu)[vector] != irq)</div><div class='hunk'>@@ -1361,77 +1310,13 @@ static void ioapic_register_intr(unsigned int irq, struct irq_cfg *cfg,</div><div class='ctx'> 				      fasteoi ? "fasteoi" : "edge");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static int setup_ir_ioapic_entry(int irq,</div><div class='del'>-			      struct IR_IO_APIC_route_entry *entry,</div><div class='del'>-			      unsigned int destination, int vector,</div><div class='del'>-			      struct io_apic_irq_attr *attr)</div><div class='del'>-{</div><div class='del'>-	int index;</div><div class='del'>-	struct irte irte;</div><div class='del'>-	int ioapic_id = mpc_ioapic_id(attr-&gt;ioapic);</div><div class='del'>-	struct intel_iommu *iommu = map_ioapic_to_ir(ioapic_id);</div><div class='del'>-</div><div class='del'>-	if (!iommu) {</div><div class='del'>-		pr_warn("No mapping iommu for ioapic %d\n", ioapic_id);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	index = alloc_irte(iommu, irq, 1);</div><div class='del'>-	if (index &lt; 0) {</div><div class='del'>-		pr_warn("Failed to allocate IRTE for ioapic %d\n", ioapic_id);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	prepare_irte(&amp;irte, vector, destination);</div><div class='del'>-</div><div class='del'>-	/* Set source-id of interrupt request */</div><div class='del'>-	set_ioapic_sid(&amp;irte, ioapic_id);</div><div class='del'>-</div><div class='del'>-	modify_irte(irq, &amp;irte);</div><div class='del'>-</div><div class='del'>-	apic_printk(APIC_VERBOSE, KERN_DEBUG "IOAPIC[%d]: "</div><div class='del'>-		"Set IRTE entry (P:%d FPD:%d Dst_Mode:%d "</div><div class='del'>-		"Redir_hint:%d Trig_Mode:%d Dlvry_Mode:%X "</div><div class='del'>-		"Avail:%X Vector:%02X Dest:%08X "</div><div class='del'>-		"SID:%04X SQ:%X SVT:%X)\n",</div><div class='del'>-		attr-&gt;ioapic, irte.present, irte.fpd, irte.dst_mode,</div><div class='del'>-		irte.redir_hint, irte.trigger_mode, irte.dlvry_mode,</div><div class='del'>-		irte.avail, irte.vector, irte.dest_id,</div><div class='del'>-		irte.sid, irte.sq, irte.svt);</div><div class='del'>-</div><div class='del'>-	memset(entry, 0, sizeof(*entry));</div><div class='del'>-</div><div class='del'>-	entry-&gt;index2	= (index &gt;&gt; 15) &amp; 0x1;</div><div class='del'>-	entry-&gt;zero	= 0;</div><div class='del'>-	entry-&gt;format	= 1;</div><div class='del'>-	entry-&gt;index	= (index &amp; 0x7fff);</div><div class='del'>-	/*</div><div class='del'>-	 * IO-APIC RTE will be configured with virtual vector.</div><div class='del'>-	 * irq handler will do the explicit EOI to the io-apic.</div><div class='del'>-	 */</div><div class='del'>-	entry-&gt;vector	= attr-&gt;ioapic_pin;</div><div class='del'>-	entry-&gt;mask	= 0;			/* enable IRQ */</div><div class='del'>-	entry-&gt;trigger	= attr-&gt;trigger;</div><div class='del'>-	entry-&gt;polarity	= attr-&gt;polarity;</div><div class='del'>-</div><div class='del'>-	/* Mask level triggered irqs.</div><div class='del'>-	 * Use IRQ_DELAYED_DISABLE for edge triggered irqs.</div><div class='del'>-	 */</div><div class='del'>-	if (attr-&gt;trigger)</div><div class='del'>-		entry-&gt;mask = 1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int setup_ioapic_entry(int irq, struct IO_APIC_route_entry *entry,</div><div class='ctx'> 			       unsigned int destination, int vector,</div><div class='ctx'> 			       struct io_apic_irq_attr *attr)</div><div class='ctx'> {</div><div class='del'>-	if (intr_remapping_enabled)</div><div class='del'>-		return setup_ir_ioapic_entry(irq,</div><div class='del'>-			 (struct IR_IO_APIC_route_entry *)entry,</div><div class='del'>-			 destination, vector, attr);</div><div class='add'>+	if (irq_remapping_enabled)</div><div class='add'>+		return setup_ioapic_remapped_entry(irq, entry, destination,</div><div class='add'>+						   vector, attr);</div><div class='ctx'> </div><div class='ctx'> 	memset(entry, 0, sizeof(*entry));</div><div class='ctx'> </div><div class='hunk'>@@ -1588,7 +1473,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int ioapic_idx,</div><div class='ctx'> {</div><div class='ctx'> 	struct IO_APIC_route_entry entry;</div><div class='ctx'> </div><div class='del'>-	if (intr_remapping_enabled)</div><div class='add'>+	if (irq_remapping_enabled)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;entry, 0, sizeof(entry));</div><div class='hunk'>@@ -1674,7 +1559,7 @@ __apicdebuginit(void) print_IO_APIC(int ioapic_idx)</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_DEBUG ".... IRQ redirection table:\n");</div><div class='ctx'> </div><div class='del'>-	if (intr_remapping_enabled) {</div><div class='add'>+	if (irq_remapping_enabled) {</div><div class='ctx'> 		printk(KERN_DEBUG " NR Indx Fmt Mask Trig IRR"</div><div class='ctx'> 			" Pol Stat Indx2 Zero Vect:\n");</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1683,7 +1568,7 @@ __apicdebuginit(void) print_IO_APIC(int ioapic_idx)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt;= reg_01.bits.entries; i++) {</div><div class='del'>-		if (intr_remapping_enabled) {</div><div class='add'>+		if (irq_remapping_enabled) {</div><div class='ctx'> 			struct IO_APIC_route_entry entry;</div><div class='ctx'> 			struct IR_IO_APIC_route_entry *ir_entry;</div><div class='ctx'> </div><div class='hunk'>@@ -2050,7 +1935,7 @@ void disable_IO_APIC(void)</div><div class='ctx'> 	 * IOAPIC RTE as well as interrupt-remapping table entry).</div><div class='ctx'> 	 * As this gets called during crash dump, keep this simple for now.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ioapic_i8259.pin != -1 &amp;&amp; !intr_remapping_enabled) {</div><div class='add'>+	if (ioapic_i8259.pin != -1 &amp;&amp; !irq_remapping_enabled) {</div><div class='ctx'> 		struct IO_APIC_route_entry entry;</div><div class='ctx'> </div><div class='ctx'> 		memset(&amp;entry, 0, sizeof(entry));</div><div class='hunk'>@@ -2074,7 +1959,7 @@ void disable_IO_APIC(void)</div><div class='ctx'> 	 * Use virtual wire A mode when interrupt remapping is enabled.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpu_has_apic || apic_from_smp_config())</div><div class='del'>-		disconnect_bsp_APIC(!intr_remapping_enabled &amp;&amp;</div><div class='add'>+		disconnect_bsp_APIC(!irq_remapping_enabled &amp;&amp;</div><div class='ctx'> 				ioapic_i8259.pin != -1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2390,71 +2275,6 @@ ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_IRQ_REMAP</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Migrate the IO-APIC irq in the presence of intr-remapping.</div><div class='del'>- *</div><div class='del'>- * For both level and edge triggered, irq migration is a simple atomic</div><div class='del'>- * update(of vector and cpu destination) of IRTE and flush the hardware cache.</div><div class='del'>- *</div><div class='del'>- * For level triggered, we eliminate the io-apic RTE modification (with the</div><div class='del'>- * updated vector information), by using a virtual vector (io-apic pin number).</div><div class='del'>- * Real vector that is used for interrupting cpu will be coming from</div><div class='del'>- * the interrupt-remapping table entry.</div><div class='del'>- *</div><div class='del'>- * As the migration is a simple atomic update of IRTE, the same mechanism</div><div class='del'>- * is used to migrate MSI irq's in the presence of interrupt-remapping.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-ir_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,</div><div class='del'>-		       bool force)</div><div class='del'>-{</div><div class='del'>-	struct irq_cfg *cfg = data-&gt;chip_data;</div><div class='del'>-	unsigned int dest, irq = data-&gt;irq;</div><div class='del'>-	struct irte irte;</div><div class='del'>-</div><div class='del'>-	if (!cpumask_intersects(mask, cpu_online_mask))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (get_irte(irq, &amp;irte))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	if (assign_irq_vector(irq, cfg, mask))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	dest = apic-&gt;cpu_mask_to_apicid_and(cfg-&gt;domain, mask);</div><div class='del'>-</div><div class='del'>-	irte.vector = cfg-&gt;vector;</div><div class='del'>-	irte.dest_id = IRTE_DEST(dest);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Atomically updates the IRTE with the new destination, vector</div><div class='del'>-	 * and flushes the interrupt entry cache.</div><div class='del'>-	 */</div><div class='del'>-	modify_irte(irq, &amp;irte);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * After this point, all the interrupts will start arriving</div><div class='del'>-	 * at the new destination. So, time to cleanup the previous</div><div class='del'>-	 * vector allocation.</div><div class='del'>-	 */</div><div class='del'>-	if (cfg-&gt;move_in_progress)</div><div class='del'>-		send_cleanup_vector(cfg);</div><div class='del'>-</div><div class='del'>-	cpumask_copy(data-&gt;affinity, mask);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-static inline int</div><div class='del'>-ir_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,</div><div class='del'>-		       bool force)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> asmlinkage void smp_irq_move_cleanup_interrupt(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned vector, me;</div><div class='hunk'>@@ -2552,6 +2372,29 @@ static void ack_apic_edge(struct irq_data *data)</div><div class='ctx'> atomic_t irq_mis_count;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_GENERIC_PENDING_IRQ</div><div class='add'>+static bool io_apic_level_ack_pending(struct irq_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	struct irq_pin_list *entry;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	raw_spin_lock_irqsave(&amp;ioapic_lock, flags);</div><div class='add'>+	for_each_irq_pin(entry, cfg-&gt;irq_2_pin) {</div><div class='add'>+		unsigned int reg;</div><div class='add'>+		int pin;</div><div class='add'>+</div><div class='add'>+		pin = entry-&gt;pin;</div><div class='add'>+		reg = io_apic_read(entry-&gt;apic, 0x10 + pin*2);</div><div class='add'>+		/* Is the remote IRR bit set? */</div><div class='add'>+		if (reg &amp; IO_APIC_REDIR_REMOTE_IRR) {</div><div class='add'>+			raw_spin_unlock_irqrestore(&amp;ioapic_lock, flags);</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;ioapic_lock, flags);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool ioapic_irqd_mask(struct irq_data *data, struct irq_cfg *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	/* If we are moving the irq we need to mask it */</div><div class='hunk'>@@ -2699,7 +2542,7 @@ static void irq_remap_modify_chip_defaults(struct irq_chip *chip)</div><div class='ctx'> 	chip-&gt;irq_eoi = ir_ack_apic_level;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='del'>-	chip-&gt;irq_set_affinity = ir_ioapic_set_affinity;</div><div class='add'>+	chip-&gt;irq_set_affinity = set_remapped_irq_affinity;</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_IRQ_REMAP */</div><div class='hunk'>@@ -2912,7 +2755,7 @@ static inline void __init check_timer(void)</div><div class='ctx'> 	 * 8259A.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (pin1 == -1) {</div><div class='del'>-		if (intr_remapping_enabled)</div><div class='add'>+		if (irq_remapping_enabled)</div><div class='ctx'> 			panic("BIOS bug: timer not connected to IO-APIC");</div><div class='ctx'> 		pin1 = pin2;</div><div class='ctx'> 		apic1 = apic2;</div><div class='hunk'>@@ -2945,7 +2788,7 @@ static inline void __init check_timer(void)</div><div class='ctx'> 				clear_IO_APIC_pin(0, pin1);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='del'>-		if (intr_remapping_enabled)</div><div class='add'>+		if (irq_remapping_enabled)</div><div class='ctx'> 			panic("timer doesn't work through Interrupt-remapped IO-APIC");</div><div class='ctx'> 		local_irq_disable();</div><div class='ctx'> 		clear_IO_APIC_pin(apic1, pin1);</div><div class='hunk'>@@ -3169,7 +3012,7 @@ void destroy_irq(unsigned int irq)</div><div class='ctx'> 	irq_set_status_flags(irq, IRQ_NOREQUEST|IRQ_NOPROBE);</div><div class='ctx'> </div><div class='ctx'> 	if (irq_remapped(cfg))</div><div class='del'>-		free_irte(irq);</div><div class='add'>+		free_remapped_irq(irq);</div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;vector_lock, flags);</div><div class='ctx'> 	__clear_irq_vector(irq, cfg);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;vector_lock, flags);</div><div class='hunk'>@@ -3198,54 +3041,34 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,</div><div class='ctx'> 	dest = apic-&gt;cpu_mask_to_apicid_and(cfg-&gt;domain, apic-&gt;target_cpus());</div><div class='ctx'> </div><div class='ctx'> 	if (irq_remapped(cfg)) {</div><div class='del'>-		struct irte irte;</div><div class='del'>-		int ir_index;</div><div class='del'>-		u16 sub_handle;</div><div class='del'>-</div><div class='del'>-		ir_index = map_irq_to_irte_handle(irq, &amp;sub_handle);</div><div class='del'>-		BUG_ON(ir_index == -1);</div><div class='del'>-</div><div class='del'>-		prepare_irte(&amp;irte, cfg-&gt;vector, dest);</div><div class='del'>-</div><div class='del'>-		/* Set source-id of interrupt request */</div><div class='del'>-		if (pdev)</div><div class='del'>-			set_msi_sid(&amp;irte, pdev);</div><div class='del'>-		else</div><div class='del'>-			set_hpet_sid(&amp;irte, hpet_id);</div><div class='del'>-</div><div class='del'>-		modify_irte(irq, &amp;irte);</div><div class='add'>+		compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	if (x2apic_enabled())</div><div class='add'>+		msg-&gt;address_hi = MSI_ADDR_BASE_HI |</div><div class='add'>+				  MSI_ADDR_EXT_DEST_ID(dest);</div><div class='add'>+	else</div><div class='ctx'> 		msg-&gt;address_hi = MSI_ADDR_BASE_HI;</div><div class='del'>-		msg-&gt;data = sub_handle;</div><div class='del'>-		msg-&gt;address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT |</div><div class='del'>-				  MSI_ADDR_IR_SHV |</div><div class='del'>-				  MSI_ADDR_IR_INDEX1(ir_index) |</div><div class='del'>-				  MSI_ADDR_IR_INDEX2(ir_index);</div><div class='del'>-	} else {</div><div class='del'>-		if (x2apic_enabled())</div><div class='del'>-			msg-&gt;address_hi = MSI_ADDR_BASE_HI |</div><div class='del'>-					  MSI_ADDR_EXT_DEST_ID(dest);</div><div class='del'>-		else</div><div class='del'>-			msg-&gt;address_hi = MSI_ADDR_BASE_HI;</div><div class='ctx'> </div><div class='del'>-		msg-&gt;address_lo =</div><div class='del'>-			MSI_ADDR_BASE_LO |</div><div class='del'>-			((apic-&gt;irq_dest_mode == 0) ?</div><div class='del'>-				MSI_ADDR_DEST_MODE_PHYSICAL:</div><div class='del'>-				MSI_ADDR_DEST_MODE_LOGICAL) |</div><div class='del'>-			((apic-&gt;irq_delivery_mode != dest_LowestPrio) ?</div><div class='del'>-				MSI_ADDR_REDIRECTION_CPU:</div><div class='del'>-				MSI_ADDR_REDIRECTION_LOWPRI) |</div><div class='del'>-			MSI_ADDR_DEST_ID(dest);</div><div class='add'>+	msg-&gt;address_lo =</div><div class='add'>+		MSI_ADDR_BASE_LO |</div><div class='add'>+		((apic-&gt;irq_dest_mode == 0) ?</div><div class='add'>+			MSI_ADDR_DEST_MODE_PHYSICAL:</div><div class='add'>+			MSI_ADDR_DEST_MODE_LOGICAL) |</div><div class='add'>+		((apic-&gt;irq_delivery_mode != dest_LowestPrio) ?</div><div class='add'>+			MSI_ADDR_REDIRECTION_CPU:</div><div class='add'>+			MSI_ADDR_REDIRECTION_LOWPRI) |</div><div class='add'>+		MSI_ADDR_DEST_ID(dest);</div><div class='add'>+</div><div class='add'>+	msg-&gt;data =</div><div class='add'>+		MSI_DATA_TRIGGER_EDGE |</div><div class='add'>+		MSI_DATA_LEVEL_ASSERT |</div><div class='add'>+		((apic-&gt;irq_delivery_mode != dest_LowestPrio) ?</div><div class='add'>+			MSI_DATA_DELIVERY_FIXED:</div><div class='add'>+			MSI_DATA_DELIVERY_LOWPRI) |</div><div class='add'>+		MSI_DATA_VECTOR(cfg-&gt;vector);</div><div class='ctx'> </div><div class='del'>-		msg-&gt;data =</div><div class='del'>-			MSI_DATA_TRIGGER_EDGE |</div><div class='del'>-			MSI_DATA_LEVEL_ASSERT |</div><div class='del'>-			((apic-&gt;irq_delivery_mode != dest_LowestPrio) ?</div><div class='del'>-				MSI_DATA_DELIVERY_FIXED:</div><div class='del'>-				MSI_DATA_DELIVERY_LOWPRI) |</div><div class='del'>-			MSI_DATA_VECTOR(cfg-&gt;vector);</div><div class='del'>-	}</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3288,33 +3111,6 @@ static struct irq_chip msi_chip = {</div><div class='ctx'> 	.irq_retrigger		= ioapic_retrigger_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Map the PCI dev to the corresponding remapping hardware unit</div><div class='del'>- * and allocate 'nvec' consecutive interrupt-remapping table entries</div><div class='del'>- * in it.</div><div class='del'>- */</div><div class='del'>-static int msi_alloc_irte(struct pci_dev *dev, int irq, int nvec)</div><div class='del'>-{</div><div class='del'>-	struct intel_iommu *iommu;</div><div class='del'>-	int index;</div><div class='del'>-</div><div class='del'>-	iommu = map_dev_to_ir(dev);</div><div class='del'>-	if (!iommu) {</div><div class='del'>-		printk(KERN_ERR</div><div class='del'>-		       "Unable to map PCI %s to iommu\n", pci_name(dev));</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	index = alloc_irte(iommu, irq, nvec);</div><div class='del'>-	if (index &lt; 0) {</div><div class='del'>-		printk(KERN_ERR</div><div class='del'>-		       "Unable to allocate %d IRTE for PCI %s\n", nvec,</div><div class='del'>-		       pci_name(dev));</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-	}</div><div class='del'>-	return index;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_chip *chip = &amp;msi_chip;</div><div class='hunk'>@@ -3345,7 +3141,6 @@ int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)</div><div class='ctx'> 	int node, ret, sub_handle, index = 0;</div><div class='ctx'> 	unsigned int irq, irq_want;</div><div class='ctx'> 	struct msi_desc *msidesc;</div><div class='del'>-	struct intel_iommu *iommu = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* x86 doesn't support multiple MSI yet */</div><div class='ctx'> 	if (type == PCI_CAP_ID_MSI &amp;&amp; nvec &gt; 1)</div><div class='hunk'>@@ -3359,7 +3154,7 @@ int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)</div><div class='ctx'> 		if (irq == 0)</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		irq_want = irq + 1;</div><div class='del'>-		if (!intr_remapping_enabled)</div><div class='add'>+		if (!irq_remapping_enabled)</div><div class='ctx'> 			goto no_ir;</div><div class='ctx'> </div><div class='ctx'> 		if (!sub_handle) {</div><div class='hunk'>@@ -3367,23 +3162,16 @@ int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)</div><div class='ctx'> 			 * allocate the consecutive block of IRTE's</div><div class='ctx'> 			 * for 'nvec'</div><div class='ctx'> 			 */</div><div class='del'>-			index = msi_alloc_irte(dev, irq, nvec);</div><div class='add'>+			index = msi_alloc_remapped_irq(dev, irq, nvec);</div><div class='ctx'> 			if (index &lt; 0) {</div><div class='ctx'> 				ret = index;</div><div class='ctx'> 				goto error;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='del'>-			iommu = map_dev_to_ir(dev);</div><div class='del'>-			if (!iommu) {</div><div class='del'>-				ret = -ENOENT;</div><div class='add'>+			ret = msi_setup_remapped_irq(dev, irq, index,</div><div class='add'>+						     sub_handle);</div><div class='add'>+			if (ret &lt; 0)</div><div class='ctx'> 				goto error;</div><div class='del'>-			}</div><div class='del'>-			/*</div><div class='del'>-			 * setup the mapping between the irq and the IRTE</div><div class='del'>-			 * base index, the sub_handle pointing to the</div><div class='del'>-			 * appropriate interrupt remap table entry.</div><div class='del'>-			 */</div><div class='del'>-			set_irte_irq(irq, iommu, index, sub_handle);</div><div class='ctx'> 		}</div><div class='ctx'> no_ir:</div><div class='ctx'> 		ret = setup_msi_irq(dev, msidesc, irq);</div><div class='hunk'>@@ -3501,15 +3289,8 @@ int arch_setup_hpet_msi(unsigned int irq, unsigned int id)</div><div class='ctx'> 	struct msi_msg msg;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (intr_remapping_enabled) {</div><div class='del'>-		struct intel_iommu *iommu = map_hpet_to_ir(id);</div><div class='del'>-		int index;</div><div class='del'>-</div><div class='del'>-		if (!iommu)</div><div class='del'>-			return -1;</div><div class='del'>-</div><div class='del'>-		index = alloc_irte(iommu, irq, 1);</div><div class='del'>-		if (index &lt; 0)</div><div class='add'>+	if (irq_remapping_enabled) {</div><div class='add'>+		if (!setup_hpet_msi_remapped(irq, id))</div><div class='ctx'> 			return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3888,8 +3669,8 @@ void __init setup_ioapic_dest(void)</div><div class='ctx'> 		else</div><div class='ctx'> 			mask = apic-&gt;target_cpus();</div><div class='ctx'> </div><div class='del'>-		if (intr_remapping_enabled)</div><div class='del'>-			ir_ioapic_set_affinity(idata, mask, false);</div><div class='add'>+		if (irq_remapping_enabled)</div><div class='add'>+			set_remapped_irq_affinity(idata, mask, false);</div><div class='ctx'> 		else</div><div class='ctx'> 			ioapic_set_affinity(idata, mask, false);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3931,12 +3712,7 @@ static struct resource * __init ioapic_setup_resources(int nr_ioapics)</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init ioapic_and_gsi_init(void)</div><div class='del'>-{</div><div class='del'>-	io_apic_ops.init();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init __ioapic_init_mappings(void)</div><div class='add'>+void __init native_io_apic_init_mappings(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0;</div><div class='ctx'> 	struct resource *ioapic_res;</div><div class='head'>diff --git a/arch/x86/kernel/apic/numaq_32.c b/arch/x86/kernel/apic/numaq_32.c<br/>index 00d2422ca7c9..f00a68cca37a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/numaq_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/numaq_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/numaq_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/numaq_32.c</a></div><div class='hunk'>@@ -530,6 +530,7 @@ static struct apic __refdata apic_numaq = {</div><div class='ctx'> </div><div class='ctx'> 	.read				= native_apic_mem_read,</div><div class='ctx'> 	.write				= native_apic_mem_write,</div><div class='add'>+	.eoi_write			= native_apic_mem_write,</div><div class='ctx'> 	.icr_read			= native_apic_icr_read,</div><div class='ctx'> 	.icr_write			= native_apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= native_apic_wait_icr_idle,</div><div class='head'>diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c<br/>index ff2c1b9aac4d..1b291da09e60 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/probe_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/probe_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/probe_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/probe_32.c</a></div><div class='hunk'>@@ -142,6 +142,7 @@ static struct apic apic_default = {</div><div class='ctx'> </div><div class='ctx'> 	.read				= native_apic_mem_read,</div><div class='ctx'> 	.write				= native_apic_mem_write,</div><div class='add'>+	.eoi_write			= native_apic_mem_write,</div><div class='ctx'> 	.icr_read			= native_apic_icr_read,</div><div class='ctx'> 	.icr_write			= native_apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= native_apic_wait_icr_idle,</div><div class='head'>diff --git a/arch/x86/kernel/apic/summit_32.c b/arch/x86/kernel/apic/summit_32.c<br/>index fea000b27f07..659897c00755 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/summit_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/summit_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/summit_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/summit_32.c</a></div><div class='hunk'>@@ -546,6 +546,7 @@ static struct apic apic_summit = {</div><div class='ctx'> </div><div class='ctx'> 	.read				= native_apic_mem_read,</div><div class='ctx'> 	.write				= native_apic_mem_write,</div><div class='add'>+	.eoi_write			= native_apic_mem_write,</div><div class='ctx'> 	.icr_read			= native_apic_icr_read,</div><div class='ctx'> 	.icr_write			= native_apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= native_apic_wait_icr_idle,</div><div class='head'>diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c<br/>index 48f3103b3c93..ff35cff0e1a7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/x2apic_cluster.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/x2apic_cluster.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/x2apic_cluster.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/x2apic_cluster.c</a></div><div class='hunk'>@@ -260,6 +260,7 @@ static struct apic apic_x2apic_cluster = {</div><div class='ctx'> </div><div class='ctx'> 	.read				= native_apic_msr_read,</div><div class='ctx'> 	.write				= native_apic_msr_write,</div><div class='add'>+	.eoi_write			= native_apic_msr_eoi_write,</div><div class='ctx'> 	.icr_read			= native_x2apic_icr_read,</div><div class='ctx'> 	.icr_write			= native_x2apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= native_x2apic_wait_icr_idle,</div><div class='head'>diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c<br/>index 991e315f4227..c17e982db275 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/x2apic_phys.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/x2apic_phys.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/x2apic_phys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/x2apic_phys.c</a></div><div class='hunk'>@@ -172,6 +172,7 @@ static struct apic apic_x2apic_phys = {</div><div class='ctx'> </div><div class='ctx'> 	.read				= native_apic_msr_read,</div><div class='ctx'> 	.write				= native_apic_msr_write,</div><div class='add'>+	.eoi_write			= native_apic_msr_eoi_write,</div><div class='ctx'> 	.icr_read			= native_x2apic_icr_read,</div><div class='ctx'> 	.icr_write			= native_x2apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= native_x2apic_wait_icr_idle,</div><div class='head'>diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c<br/>index 87bfa69e216e..c6d03f7a4401 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apic/x2apic_uv_x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apic/x2apic_uv_x.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apic/x2apic_uv_x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apic/x2apic_uv_x.c</a></div><div class='hunk'>@@ -404,6 +404,7 @@ static struct apic __refdata apic_x2apic_uv_x = {</div><div class='ctx'> </div><div class='ctx'> 	.read				= native_apic_msr_read,</div><div class='ctx'> 	.write				= native_apic_msr_write,</div><div class='add'>+	.eoi_write			= native_apic_msr_eoi_write,</div><div class='ctx'> 	.icr_read			= native_x2apic_icr_read,</div><div class='ctx'> 	.icr_write			= native_x2apic_icr_write,</div><div class='ctx'> 	.wait_icr_idle			= native_x2apic_wait_icr_idle,</div><div class='head'>diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c<br/>index 459e78cbf61e..07b0c0db466c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/apm_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/apm_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/apm_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/apm_32.c</a></div><div class='hunk'>@@ -2401,7 +2401,7 @@ static void __exit apm_exit(void)</div><div class='ctx'> 		 * (pm_idle), Wait for all processors to update cached/local</div><div class='ctx'> 		 * copies of pm_idle before proceeding.</div><div class='ctx'> 		 */</div><div class='del'>-		cpu_idle_wait();</div><div class='add'>+		kick_all_cpus_sync();</div><div class='ctx'> 	}</div><div class='ctx'> 	if (((apm_info.bios.flags &amp; APM_BIOS_DISENGAGED) == 0)</div><div class='ctx'> 	    &amp;&amp; (apm_info.connection_version &gt; 0x0100)) {</div><div class='head'>diff --git a/arch/x86/kernel/check.c b/arch/x86/kernel/check.c<br/>index 5da1269e8ddc..e2dbcb7dabdd 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/check.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/check.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/check.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/check.c</a></div><div class='hunk'>@@ -27,21 +27,29 @@ static int num_scan_areas;</div><div class='ctx'> </div><div class='ctx'> static __init int set_corruption_check(char *arg)</div><div class='ctx'> {</div><div class='del'>-	char *end;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+	unsigned long val;</div><div class='ctx'> </div><div class='del'>-	memory_corruption_check = simple_strtol(arg, &amp;end, 10);</div><div class='add'>+	ret = kstrtoul(arg, 10, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	return (*end == 0) ? 0 : -EINVAL;</div><div class='add'>+	memory_corruption_check = val;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> early_param("memory_corruption_check", set_corruption_check);</div><div class='ctx'> </div><div class='ctx'> static __init int set_corruption_check_period(char *arg)</div><div class='ctx'> {</div><div class='del'>-	char *end;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+	unsigned long val;</div><div class='ctx'> </div><div class='del'>-	corruption_check_period = simple_strtoul(arg, &amp;end, 10);</div><div class='add'>+	ret = kstrtoul(arg, 10, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	return (*end == 0) ? 0 : -EINVAL;</div><div class='add'>+	corruption_check_period = val;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> early_param("memory_corruption_check_period", set_corruption_check_period);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c<br/>index 1c67ca100e4c..146bb6218eec 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/amd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/amd.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/amd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/amd.c</a></div><div class='hunk'>@@ -580,6 +580,24 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* re-enable TopologyExtensions if switched off by BIOS */</div><div class='add'>+	if ((c-&gt;x86 == 0x15) &amp;&amp;</div><div class='add'>+	    (c-&gt;x86_model &gt;= 0x10) &amp;&amp; (c-&gt;x86_model &lt;= 0x1f) &amp;&amp;</div><div class='add'>+	    !cpu_has(c, X86_FEATURE_TOPOEXT)) {</div><div class='add'>+		u64 val;</div><div class='add'>+</div><div class='add'>+		if (!rdmsrl_amd_safe(0xc0011005, &amp;val)) {</div><div class='add'>+			val |= 1ULL &lt;&lt; 54;</div><div class='add'>+			wrmsrl_amd_safe(0xc0011005, val);</div><div class='add'>+			rdmsrl(0xc0011005, val);</div><div class='add'>+			if (val &amp; (1ULL &lt;&lt; 54)) {</div><div class='add'>+				set_cpu_cap(c, X86_FEATURE_TOPOEXT);</div><div class='add'>+				printk(KERN_INFO FW_INFO "CPU: Re-enabling "</div><div class='add'>+				  "disabled Topology Extensions Support\n");</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	cpu_detect_cache_sizes(c);</div><div class='ctx'> </div><div class='ctx'> 	/* Multi core CPU? */</div><div class='head'>diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c<br/>index cf79302198a6..6b9333b429ba 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/common.c</a></div><div class='hunk'>@@ -1101,14 +1101,20 @@ int is_debug_stack(unsigned long addr)</div><div class='ctx'> 		 addr &gt; (__get_cpu_var(debug_stack_addr) - DEBUG_STKSZ));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static DEFINE_PER_CPU(u32, debug_stack_use_ctr);</div><div class='add'>+</div><div class='ctx'> void debug_stack_set_zero(void)</div><div class='ctx'> {</div><div class='add'>+	this_cpu_inc(debug_stack_use_ctr);</div><div class='ctx'> 	load_idt((const struct desc_ptr *)&amp;nmi_idt_descr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void debug_stack_reset(void)</div><div class='ctx'> {</div><div class='del'>-	load_idt((const struct desc_ptr *)&amp;idt_descr);</div><div class='add'>+	if (WARN_ON(!this_cpu_read(debug_stack_use_ctr)))</div><div class='add'>+		return;</div><div class='add'>+	if (this_cpu_dec_return(debug_stack_use_ctr) == 0)</div><div class='add'>+		load_idt((const struct desc_ptr *)&amp;idt_descr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else	/* CONFIG_X86_64 */</div><div class='hunk'>@@ -1185,7 +1191,7 @@ void __cpuinit cpu_init(void)</div><div class='ctx'> 	oist = &amp;per_cpu(orig_ist, cpu);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_NUMA</div><div class='del'>-	if (cpu != 0 &amp;&amp; percpu_read(numa_node) == 0 &amp;&amp;</div><div class='add'>+	if (cpu != 0 &amp;&amp; this_cpu_read(numa_node) == 0 &amp;&amp;</div><div class='ctx'> 	    early_cpu_to_node(cpu) != NUMA_NO_NODE)</div><div class='ctx'> 		set_numa_node(early_cpu_to_node(cpu));</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c<br/>index b8f3653dddbc..9a7c90d80bc4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/intel_cacheinfo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/intel_cacheinfo.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/intel_cacheinfo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/intel_cacheinfo.c</a></div><div class='hunk'>@@ -615,14 +615,14 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)</div><div class='ctx'> 					new_l2 = this_leaf.size/1024;</div><div class='ctx'> 					num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;</div><div class='ctx'> 					index_msb = get_count_order(num_threads_sharing);</div><div class='del'>-					l2_id = c-&gt;apicid &gt;&gt; index_msb;</div><div class='add'>+					l2_id = c-&gt;apicid &amp; ~((1 &lt;&lt; index_msb) - 1);</div><div class='ctx'> 					break;</div><div class='ctx'> 				case 3:</div><div class='ctx'> 					new_l3 = this_leaf.size/1024;</div><div class='ctx'> 					num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;</div><div class='ctx'> 					index_msb = get_count_order(</div><div class='ctx'> 							num_threads_sharing);</div><div class='del'>-					l3_id = c-&gt;apicid &gt;&gt; index_msb;</div><div class='add'>+					l3_id = c-&gt;apicid &amp; ~((1 &lt;&lt; index_msb) - 1);</div><div class='ctx'> 					break;</div><div class='ctx'> 				default:</div><div class='ctx'> 					break;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/match.c b/arch/x86/kernel/cpu/match.c<br/>index 5502b289341b..36565373af87 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/match.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/match.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/match.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/match.c</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'>  * %X86_MODEL_ANY, %X86_FEATURE_ANY or 0 (except for vendor)</div><div class='ctx'>  *</div><div class='ctx'>  * Arrays used to match for this should also be declared using</div><div class='del'>- * MODULE_DEVICE_TABLE(x86_cpu, ...)</div><div class='add'>+ * MODULE_DEVICE_TABLE(x86cpu, ...)</div><div class='ctx'>  *</div><div class='ctx'>  * This always matches against the boot cpu, assuming models and features are</div><div class='ctx'>  * consistent over all CPUs.</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mcheck/mce-apei.c b/arch/x86/kernel/cpu/mcheck/mce-apei.c<br/>index 507ea58688e2..cd8b166a1735 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce-apei.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/mcheck/mce-apei.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce-apei.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/mcheck/mce-apei.c</a></div><div class='hunk'>@@ -42,7 +42,8 @@ void apei_mce_report_mem_error(int corrected, struct cper_sec_mem_err *mem_err)</div><div class='ctx'> 	struct mce m;</div><div class='ctx'> </div><div class='ctx'> 	/* Only corrected MC is reported */</div><div class='del'>-	if (!corrected)</div><div class='add'>+	if (!corrected || !(mem_err-&gt;validation_bits &amp;</div><div class='add'>+				CPER_MEM_VALID_PHYSICAL_ADDRESS))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mce_setup(&amp;m);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c<br/>index 0c82091b1652..413c2ced887c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce-severity.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/mcheck/mce-severity.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce-severity.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/mcheck/mce-severity.c</a></div><div class='hunk'>@@ -126,6 +126,16 @@ static struct severity {</div><div class='ctx'> 		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),</div><div class='ctx'> 		USER</div><div class='ctx'> 		),</div><div class='add'>+	MCESEV(</div><div class='add'>+		KEEP, "HT thread notices Action required: instruction fetch error",</div><div class='add'>+		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),</div><div class='add'>+		MCGMASK(MCG_STATUS_EIPV, 0)</div><div class='add'>+		),</div><div class='add'>+	MCESEV(</div><div class='add'>+		AR, "Action required: instruction fetch error",</div><div class='add'>+		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),</div><div class='add'>+		USER</div><div class='add'>+		),</div><div class='ctx'> #endif</div><div class='ctx'> 	MCESEV(</div><div class='ctx'> 		PANIC, "Action required: unknown MCACOD",</div><div class='hunk'>@@ -165,15 +175,19 @@ static struct severity {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * If the EIPV bit is set, it means the saved IP is the</div><div class='del'>- * instruction which caused the MCE.</div><div class='add'>+ * If mcgstatus indicated that ip/cs on the stack were</div><div class='add'>+ * no good, then "m-&gt;cs" will be zero and we will have</div><div class='add'>+ * to assume the worst case (IN_KERNEL) as we actually</div><div class='add'>+ * have no idea what we were executing when the machine</div><div class='add'>+ * check hit.</div><div class='add'>+ * If we do have a good "m-&gt;cs" (or a faked one in the</div><div class='add'>+ * case we were executing in VM86 mode) we can use it to</div><div class='add'>+ * distinguish an exception taken in user from from one</div><div class='add'>+ * taken in the kernel.</div><div class='ctx'>  */</div><div class='ctx'> static int error_context(struct mce *m)</div><div class='ctx'> {</div><div class='del'>-	if (m-&gt;mcgstatus &amp; MCG_STATUS_EIPV)</div><div class='del'>-		return (m-&gt;ip &amp;&amp; (m-&gt;cs &amp; 3) == 3) ? IN_USER : IN_KERNEL;</div><div class='del'>-	/* Unknown, assume kernel */</div><div class='del'>-	return IN_KERNEL;</div><div class='add'>+	return ((m-&gt;cs &amp; 3) == 3) ? IN_USER : IN_KERNEL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mce_severity(struct mce *m, int tolerant, char **msg)</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c<br/>index d086a09c087d..da27c5d2168a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/mcheck/mce.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/mcheck/mce.c</a></div><div class='hunk'>@@ -437,6 +437,14 @@ static inline void mce_gather_info(struct mce *m, struct pt_regs *regs)</div><div class='ctx'> 		if (m-&gt;mcgstatus &amp; (MCG_STATUS_RIPV|MCG_STATUS_EIPV)) {</div><div class='ctx'> 			m-&gt;ip = regs-&gt;ip;</div><div class='ctx'> 			m-&gt;cs = regs-&gt;cs;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * When in VM86 mode make the cs look like ring 3</div><div class='add'>+			 * always. This is a lie, but it's better than passing</div><div class='add'>+			 * the additional vm86 bit around everywhere.</div><div class='add'>+			 */</div><div class='add'>+			if (v8086_mode(regs))</div><div class='add'>+				m-&gt;cs |= 3;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Use accurate RIP reporting if available. */</div><div class='ctx'> 		if (rip_msr)</div><div class='hunk'>@@ -583,7 +591,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)</div><div class='ctx'> 	struct mce m;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	percpu_inc(mce_poll_count);</div><div class='add'>+	this_cpu_inc(mce_poll_count);</div><div class='ctx'> </div><div class='ctx'> 	mce_gather_info(&amp;m, NULL);</div><div class='ctx'> </div><div class='hunk'>@@ -641,16 +649,18 @@ EXPORT_SYMBOL_GPL(machine_check_poll);</div><div class='ctx'>  * Do a quick check if any of the events requires a panic.</div><div class='ctx'>  * This decides if we keep the events around or clear them.</div><div class='ctx'>  */</div><div class='del'>-static int mce_no_way_out(struct mce *m, char **msg)</div><div class='add'>+static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	int i, ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; banks; i++) {</div><div class='ctx'> 		m-&gt;status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));</div><div class='add'>+		if (m-&gt;status &amp; MCI_STATUS_VAL)</div><div class='add'>+			__set_bit(i, validp);</div><div class='ctx'> 		if (mce_severity(m, tolerant, msg) &gt;= MCE_PANIC_SEVERITY)</div><div class='del'>-			return 1;</div><div class='add'>+			ret = 1;</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -945,9 +955,10 @@ struct mce_info {</div><div class='ctx'> 	atomic_t		inuse;</div><div class='ctx'> 	struct task_struct	*t;</div><div class='ctx'> 	__u64			paddr;</div><div class='add'>+	int			restartable;</div><div class='ctx'> } mce_info[MCE_INFO_MAX];</div><div class='ctx'> </div><div class='del'>-static void mce_save_info(__u64 addr)</div><div class='add'>+static void mce_save_info(__u64 addr, int c)</div><div class='ctx'> {</div><div class='ctx'> 	struct mce_info *mi;</div><div class='ctx'> </div><div class='hunk'>@@ -955,6 +966,7 @@ static void mce_save_info(__u64 addr)</div><div class='ctx'> 		if (atomic_cmpxchg(&amp;mi-&gt;inuse, 0, 1) == 0) {</div><div class='ctx'> 			mi-&gt;t = current;</div><div class='ctx'> 			mi-&gt;paddr = addr;</div><div class='add'>+			mi-&gt;restartable = c;</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1011,11 +1023,12 @@ void do_machine_check(struct pt_regs *regs, long error_code)</div><div class='ctx'> 	 */</div><div class='ctx'> 	int kill_it = 0;</div><div class='ctx'> 	DECLARE_BITMAP(toclear, MAX_NR_BANKS);</div><div class='add'>+	DECLARE_BITMAP(valid_banks, MAX_NR_BANKS);</div><div class='ctx'> 	char *msg = "Unknown";</div><div class='ctx'> </div><div class='ctx'> 	atomic_inc(&amp;mce_entry);</div><div class='ctx'> </div><div class='del'>-	percpu_inc(mce_exception_count);</div><div class='add'>+	this_cpu_inc(mce_exception_count);</div><div class='ctx'> </div><div class='ctx'> 	if (!banks)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -1025,7 +1038,8 @@ void do_machine_check(struct pt_regs *regs, long error_code)</div><div class='ctx'> 	final = &amp;__get_cpu_var(mces_seen);</div><div class='ctx'> 	*final = m;</div><div class='ctx'> </div><div class='del'>-	no_way_out = mce_no_way_out(&amp;m, &amp;msg);</div><div class='add'>+	memset(valid_banks, 0, sizeof(valid_banks));</div><div class='add'>+	no_way_out = mce_no_way_out(&amp;m, &amp;msg, valid_banks);</div><div class='ctx'> </div><div class='ctx'> 	barrier();</div><div class='ctx'> </div><div class='hunk'>@@ -1045,6 +1059,8 @@ void do_machine_check(struct pt_regs *regs, long error_code)</div><div class='ctx'> 	order = mce_start(&amp;no_way_out);</div><div class='ctx'> 	for (i = 0; i &lt; banks; i++) {</div><div class='ctx'> 		__clear_bit(i, toclear);</div><div class='add'>+		if (!test_bit(i, valid_banks))</div><div class='add'>+			continue;</div><div class='ctx'> 		if (!mce_banks[i].ctl)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -1130,7 +1146,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)</div><div class='ctx'> 			mce_panic("Fatal machine check on current CPU", &amp;m, msg);</div><div class='ctx'> 		if (worst == MCE_AR_SEVERITY) {</div><div class='ctx'> 			/* schedule action before return to userland */</div><div class='del'>-			mce_save_info(m.addr);</div><div class='add'>+			mce_save_info(m.addr, m.mcgstatus &amp; MCG_STATUS_RIPV);</div><div class='ctx'> 			set_thread_flag(TIF_MCE_NOTIFY);</div><div class='ctx'> 		} else if (kill_it) {</div><div class='ctx'> 			force_sig(SIGBUS, current);</div><div class='hunk'>@@ -1179,7 +1195,13 @@ void mce_notify_process(void)</div><div class='ctx'> </div><div class='ctx'> 	pr_err("Uncorrected hardware memory error in user-access at %llx",</div><div class='ctx'> 		 mi-&gt;paddr);</div><div class='del'>-	if (memory_failure(pfn, MCE_VECTOR, MF_ACTION_REQUIRED) &lt; 0) {</div><div class='add'>+	/*</div><div class='add'>+	 * We must call memory_failure() here even if the current process is</div><div class='add'>+	 * doomed. We still need to mark the page as poisoned and alert any</div><div class='add'>+	 * other users of the page.</div><div class='add'>+	 */</div><div class='add'>+	if (memory_failure(pfn, MCE_VECTOR, MF_ACTION_REQUIRED) &lt; 0 ||</div><div class='add'>+			   mi-&gt;restartable == 0) {</div><div class='ctx'> 		pr_err("Memory error not recovered");</div><div class='ctx'> 		force_sig(SIGBUS, current);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1229,15 +1251,15 @@ void mce_log_therm_throt_event(__u64 status)</div><div class='ctx'>  * poller finds an MCE, poll 2x faster.  When the poller finds no more</div><div class='ctx'>  * errors, poll 2x slower (up to check_interval seconds).</div><div class='ctx'>  */</div><div class='del'>-static int check_interval = 5 * 60; /* 5 minutes */</div><div class='add'>+static unsigned long check_interval = 5 * 60; /* 5 minutes */</div><div class='ctx'> </div><div class='del'>-static DEFINE_PER_CPU(int, mce_next_interval); /* in jiffies */</div><div class='add'>+static DEFINE_PER_CPU(unsigned long, mce_next_interval); /* in jiffies */</div><div class='ctx'> static DEFINE_PER_CPU(struct timer_list, mce_timer);</div><div class='ctx'> </div><div class='del'>-static void mce_start_timer(unsigned long data)</div><div class='add'>+static void mce_timer_fn(unsigned long data)</div><div class='ctx'> {</div><div class='del'>-	struct timer_list *t = &amp;per_cpu(mce_timer, data);</div><div class='del'>-	int *n;</div><div class='add'>+	struct timer_list *t = &amp;__get_cpu_var(mce_timer);</div><div class='add'>+	unsigned long iv;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(smp_processor_id() != data);</div><div class='ctx'> </div><div class='hunk'>@@ -1250,13 +1272,14 @@ static void mce_start_timer(unsigned long data)</div><div class='ctx'> 	 * Alert userspace if needed.  If we logged an MCE, reduce the</div><div class='ctx'> 	 * polling interval, otherwise increase the polling interval.</div><div class='ctx'> 	 */</div><div class='del'>-	n = &amp;__get_cpu_var(mce_next_interval);</div><div class='add'>+	iv = __this_cpu_read(mce_next_interval);</div><div class='ctx'> 	if (mce_notify_irq())</div><div class='del'>-		*n = max(*n/2, HZ/100);</div><div class='add'>+		iv = max(iv / 2, (unsigned long) HZ/100);</div><div class='ctx'> 	else</div><div class='del'>-		*n = min(*n*2, (int)round_jiffies_relative(check_interval*HZ));</div><div class='add'>+		iv = min(iv * 2, round_jiffies_relative(check_interval * HZ));</div><div class='add'>+	__this_cpu_write(mce_next_interval, iv);</div><div class='ctx'> </div><div class='del'>-	t-&gt;expires = jiffies + *n;</div><div class='add'>+	t-&gt;expires = jiffies + iv;</div><div class='ctx'> 	add_timer_on(t, smp_processor_id());</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1423,6 +1446,43 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)</div><div class='ctx'> 		 */</div><div class='ctx'> 		 if (c-&gt;x86 == 6 &amp;&amp; banks &gt; 0)</div><div class='ctx'> 			mce_banks[0].ctl = 0;</div><div class='add'>+</div><div class='add'>+		 /*</div><div class='add'>+		  * Turn off MC4_MISC thresholding banks on those models since</div><div class='add'>+		  * they're not supported there.</div><div class='add'>+		  */</div><div class='add'>+		 if (c-&gt;x86 == 0x15 &amp;&amp;</div><div class='add'>+		     (c-&gt;x86_model &gt;= 0x10 &amp;&amp; c-&gt;x86_model &lt;= 0x1f)) {</div><div class='add'>+			 int i;</div><div class='add'>+			 u64 val, hwcr;</div><div class='add'>+			 bool need_toggle;</div><div class='add'>+			 u32 msrs[] = {</div><div class='add'>+				0x00000413, /* MC4_MISC0 */</div><div class='add'>+				0xc0000408, /* MC4_MISC1 */</div><div class='add'>+			 };</div><div class='add'>+</div><div class='add'>+			 rdmsrl(MSR_K7_HWCR, hwcr);</div><div class='add'>+</div><div class='add'>+			 /* McStatusWrEn has to be set */</div><div class='add'>+			 need_toggle = !(hwcr &amp; BIT(18));</div><div class='add'>+</div><div class='add'>+			 if (need_toggle)</div><div class='add'>+				 wrmsrl(MSR_K7_HWCR, hwcr | BIT(18));</div><div class='add'>+</div><div class='add'>+			 for (i = 0; i &lt; ARRAY_SIZE(msrs); i++) {</div><div class='add'>+				 rdmsrl(msrs[i], val);</div><div class='add'>+</div><div class='add'>+				 /* CntP bit set? */</div><div class='add'>+				 if (val &amp; BIT_64(62)) {</div><div class='add'>+					val &amp;= ~BIT_64(62);</div><div class='add'>+					wrmsrl(msrs[i], val);</div><div class='add'>+				 }</div><div class='add'>+			 }</div><div class='add'>+</div><div class='add'>+			 /* restore old settings */</div><div class='add'>+			 if (need_toggle)</div><div class='add'>+				 wrmsrl(MSR_K7_HWCR, hwcr);</div><div class='add'>+		 }</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (c-&gt;x86_vendor == X86_VENDOR_INTEL) {</div><div class='hunk'>@@ -1497,17 +1557,17 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)</div><div class='ctx'> static void __mcheck_cpu_init_timer(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct timer_list *t = &amp;__get_cpu_var(mce_timer);</div><div class='del'>-	int *n = &amp;__get_cpu_var(mce_next_interval);</div><div class='add'>+	unsigned long iv = check_interval * HZ;</div><div class='ctx'> </div><div class='del'>-	setup_timer(t, mce_start_timer, smp_processor_id());</div><div class='add'>+	setup_timer(t, mce_timer_fn, smp_processor_id());</div><div class='ctx'> </div><div class='ctx'> 	if (mce_ignore_ce)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	*n = check_interval * HZ;</div><div class='del'>-	if (!*n)</div><div class='add'>+	__this_cpu_write(mce_next_interval, iv);</div><div class='add'>+	if (!iv)</div><div class='ctx'> 		return;</div><div class='del'>-	t-&gt;expires = round_jiffies(jiffies + *n);</div><div class='add'>+	t-&gt;expires = round_jiffies(jiffies + iv);</div><div class='ctx'> 	add_timer_on(t, smp_processor_id());</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2217,7 +2277,7 @@ mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)</div><div class='ctx'> 	case CPU_DOWN_FAILED_FROZEN:</div><div class='ctx'> 		if (!mce_ignore_ce &amp;&amp; check_interval) {</div><div class='ctx'> 			t-&gt;expires = round_jiffies(jiffies +</div><div class='del'>-					   __get_cpu_var(mce_next_interval));</div><div class='add'>+					per_cpu(mce_next_interval, cpu));</div><div class='ctx'> 			add_timer_on(t, cpu);</div><div class='ctx'> 		}</div><div class='ctx'> 		smp_call_function_single(cpu, mce_reenable_cpu, &amp;action, 1);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c<br/>index 99b57179f912..f4873a64f46d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce_amd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/mcheck/mce_amd.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mcheck/mce_amd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/mcheck/mce_amd.c</a></div><div class='hunk'>@@ -51,6 +51,7 @@ struct threshold_block {</div><div class='ctx'> 	unsigned int		cpu;</div><div class='ctx'> 	u32			address;</div><div class='ctx'> 	u16			interrupt_enable;</div><div class='add'>+	bool			interrupt_capable;</div><div class='ctx'> 	u16			threshold_limit;</div><div class='ctx'> 	struct kobject		kobj;</div><div class='ctx'> 	struct list_head	miscj;</div><div class='hunk'>@@ -83,6 +84,21 @@ struct thresh_restart {</div><div class='ctx'> 	u16			old_limit;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static bool lvt_interrupt_supported(unsigned int bank, u32 msr_high_bits)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * bank 4 supports APIC LVT interrupts implicitly since forever.</div><div class='add'>+	 */</div><div class='add'>+	if (bank == 4)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * IntP: interrupt present; if this bit is set, the thresholding</div><div class='add'>+	 * bank can generate APIC LVT interrupts</div><div class='add'>+	 */</div><div class='add'>+	return msr_high_bits &amp; BIT(28);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int lvt_off_valid(struct threshold_block *b, int apic, u32 lo, u32 hi)</div><div class='ctx'> {</div><div class='ctx'> 	int msr = (hi &amp; MASK_LVTOFF_HI) &gt;&gt; 20;</div><div class='hunk'>@@ -104,8 +120,10 @@ static int lvt_off_valid(struct threshold_block *b, int apic, u32 lo, u32 hi)</div><div class='ctx'> 	return 1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* must be called with correct cpu affinity */</div><div class='del'>-/* Called via smp_call_function_single() */</div><div class='add'>+/*</div><div class='add'>+ * Called via smp_call_function_single(), must be called with correct</div><div class='add'>+ * cpu affinity.</div><div class='add'>+ */</div><div class='ctx'> static void threshold_restart_bank(void *_tr)</div><div class='ctx'> {</div><div class='ctx'> 	struct thresh_restart *tr = _tr;</div><div class='hunk'>@@ -128,6 +146,12 @@ static void threshold_restart_bank(void *_tr)</div><div class='ctx'> 		    (new_count &amp; THRESHOLD_MAX);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* clear IntType */</div><div class='add'>+	hi &amp;= ~MASK_INT_TYPE_HI;</div><div class='add'>+</div><div class='add'>+	if (!tr-&gt;b-&gt;interrupt_capable)</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='ctx'> 	if (tr-&gt;set_lvt_off) {</div><div class='ctx'> 		if (lvt_off_valid(tr-&gt;b, tr-&gt;lvt_off, lo, hi)) {</div><div class='ctx'> 			/* set new lvt offset */</div><div class='hunk'>@@ -136,9 +160,10 @@ static void threshold_restart_bank(void *_tr)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tr-&gt;b-&gt;interrupt_enable ?</div><div class='del'>-	    (hi = (hi &amp; ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :</div><div class='del'>-	    (hi &amp;= ~MASK_INT_TYPE_HI);</div><div class='add'>+	if (tr-&gt;b-&gt;interrupt_enable)</div><div class='add'>+		hi |= INT_TYPE_APIC;</div><div class='add'>+</div><div class='add'>+ done:</div><div class='ctx'> </div><div class='ctx'> 	hi |= MASK_COUNT_EN_HI;</div><div class='ctx'> 	wrmsr(tr-&gt;b-&gt;address, lo, hi);</div><div class='hunk'>@@ -202,14 +227,17 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)</div><div class='ctx'> 			if (shared_bank[bank] &amp;&amp; c-&gt;cpu_core_id)</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='del'>-			offset = setup_APIC_mce(offset,</div><div class='del'>-						(high &amp; MASK_LVTOFF_HI) &gt;&gt; 20);</div><div class='del'>-</div><div class='ctx'> 			memset(&amp;b, 0, sizeof(b));</div><div class='del'>-			b.cpu		= cpu;</div><div class='del'>-			b.bank		= bank;</div><div class='del'>-			b.block		= block;</div><div class='del'>-			b.address	= address;</div><div class='add'>+			b.cpu			= cpu;</div><div class='add'>+			b.bank			= bank;</div><div class='add'>+			b.block			= block;</div><div class='add'>+			b.address		= address;</div><div class='add'>+			b.interrupt_capable	= lvt_interrupt_supported(bank, high);</div><div class='add'>+</div><div class='add'>+			if (b.interrupt_capable) {</div><div class='add'>+				int new = (high &amp; MASK_LVTOFF_HI) &gt;&gt; 20;</div><div class='add'>+				offset  = setup_APIC_mce(offset, new);</div><div class='add'>+			}</div><div class='ctx'> </div><div class='ctx'> 			mce_threshold_block_init(&amp;b, offset);</div><div class='ctx'> 			mce_threshold_vector = amd_threshold_interrupt;</div><div class='hunk'>@@ -309,6 +337,9 @@ store_interrupt_enable(struct threshold_block *b, const char *buf, size_t size)</div><div class='ctx'> 	struct thresh_restart tr;</div><div class='ctx'> 	unsigned long new;</div><div class='ctx'> </div><div class='add'>+	if (!b-&gt;interrupt_capable)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	if (strict_strtoul(buf, 0, &amp;new) &lt; 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -390,10 +421,10 @@ RW_ATTR(threshold_limit);</div><div class='ctx'> RW_ATTR(error_count);</div><div class='ctx'> </div><div class='ctx'> static struct attribute *default_attrs[] = {</div><div class='del'>-	&amp;interrupt_enable.attr,</div><div class='ctx'> 	&amp;threshold_limit.attr,</div><div class='ctx'> 	&amp;error_count.attr,</div><div class='del'>-	NULL</div><div class='add'>+	NULL,	/* possibly interrupt_enable if supported, see below */</div><div class='add'>+	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define to_block(k)	container_of(k, struct threshold_block, kobj)</div><div class='hunk'>@@ -467,8 +498,14 @@ static __cpuinit int allocate_threshold_blocks(unsigned int cpu,</div><div class='ctx'> 	b-&gt;cpu			= cpu;</div><div class='ctx'> 	b-&gt;address		= address;</div><div class='ctx'> 	b-&gt;interrupt_enable	= 0;</div><div class='add'>+	b-&gt;interrupt_capable	= lvt_interrupt_supported(bank, high);</div><div class='ctx'> 	b-&gt;threshold_limit	= THRESHOLD_MAX;</div><div class='ctx'> </div><div class='add'>+	if (b-&gt;interrupt_capable)</div><div class='add'>+		threshold_ktype.default_attrs[2] = &amp;interrupt_enable.attr;</div><div class='add'>+	else</div><div class='add'>+		threshold_ktype.default_attrs[2] = NULL;</div><div class='add'>+</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;b-&gt;miscj);</div><div class='ctx'> </div><div class='ctx'> 	if (per_cpu(threshold_banks, cpu)[bank]-&gt;blocks) {</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c<br/>index ac140c7be396..bdda2e6c673b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mtrr/cleanup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/mtrr/cleanup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/mtrr/cleanup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/mtrr/cleanup.c</a></div><div class='hunk'>@@ -266,7 +266,7 @@ range_to_mtrr(unsigned int reg, unsigned long range_startk,</div><div class='ctx'> 		if (align &gt; max_align)</div><div class='ctx'> 			align = max_align;</div><div class='ctx'> </div><div class='del'>-		sizek = 1 &lt;&lt; align;</div><div class='add'>+		sizek = 1UL &lt;&lt; align;</div><div class='ctx'> 		if (debug_print) {</div><div class='ctx'> 			char start_factor = 'K', size_factor = 'K';</div><div class='ctx'> 			unsigned long start_base, size_base;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c<br/>index bb8e03407e18..c4706cf9c011 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/perf_event.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event.c</a></div><div class='hunk'>@@ -484,9 +484,6 @@ static int __x86_pmu_event_init(struct perf_event *event)</div><div class='ctx'> </div><div class='ctx'> 	/* mark unused */</div><div class='ctx'> 	event-&gt;hw.extra_reg.idx = EXTRA_REG_NONE;</div><div class='del'>-</div><div class='del'>-	/* mark not used */</div><div class='del'>-	event-&gt;hw.extra_reg.idx = EXTRA_REG_NONE;</div><div class='ctx'> 	event-&gt;hw.branch_reg.idx = EXTRA_REG_NONE;</div><div class='ctx'> </div><div class='ctx'> 	return x86_pmu.hw_config(event);</div><div class='hunk'>@@ -1186,8 +1183,6 @@ int x86_pmu_handle_irq(struct pt_regs *regs)</div><div class='ctx'> 	int idx, handled = 0;</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0);</div><div class='del'>-</div><div class='ctx'> 	cpuc = &amp;__get_cpu_var(cpu_hw_events);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1222,7 +1217,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs)</div><div class='ctx'> 		 * event overflow</div><div class='ctx'> 		 */</div><div class='ctx'> 		handled++;</div><div class='del'>-		data.period	= event-&gt;hw.last_period;</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, event-&gt;hw.last_period);</div><div class='ctx'> </div><div class='ctx'> 		if (!x86_perf_event_set_period(event))</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -1501,6 +1496,7 @@ static struct cpu_hw_events *allocate_fake_cpuc(void)</div><div class='ctx'> 		if (!cpuc-&gt;shared_regs)</div><div class='ctx'> 			goto error;</div><div class='ctx'> 	}</div><div class='add'>+	cpuc-&gt;is_fake = 1;</div><div class='ctx'> 	return cpuc;</div><div class='ctx'> error:</div><div class='ctx'> 	free_fake_cpuc(cpuc);</div><div class='hunk'>@@ -1761,6 +1757,12 @@ perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs)</div><div class='ctx'> 	dump_trace(NULL, regs, NULL, 0, &amp;backtrace_ops, entry);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int</div><div class='add'>+valid_user_frame(const void __user *fp, unsigned long size)</div><div class='add'>+{</div><div class='add'>+	return (__range_not_ok(fp, size, TASK_SIZE) == 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/compat.h&gt;</div><div class='hunk'>@@ -1785,7 +1787,7 @@ perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)</div><div class='ctx'> 		if (bytes != sizeof(frame))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		if (fp &lt; compat_ptr(regs-&gt;sp))</div><div class='add'>+		if (!valid_user_frame(fp, sizeof(frame)))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		perf_callchain_store(entry, frame.return_address);</div><div class='hunk'>@@ -1831,7 +1833,7 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)</div><div class='ctx'> 		if (bytes != sizeof(frame))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		if ((unsigned long)fp &lt; regs-&gt;sp)</div><div class='add'>+		if (!valid_user_frame(fp, sizeof(frame)))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		perf_callchain_store(entry, frame.return_address);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h<br/>index 6638aaf54493..7241e2fc3c17 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/perf_event.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event.h</a></div><div class='hunk'>@@ -117,6 +117,7 @@ struct cpu_hw_events {</div><div class='ctx'> 	struct perf_event	*event_list[X86_PMC_IDX_MAX]; /* in enabled order */</div><div class='ctx'> </div><div class='ctx'> 	unsigned int		group_flag;</div><div class='add'>+	int			is_fake;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Intel DebugStore bits</div><div class='hunk'>@@ -364,6 +365,7 @@ struct x86_pmu {</div><div class='ctx'> 	int		pebs_record_size;</div><div class='ctx'> 	void		(*drain_pebs)(struct pt_regs *regs);</div><div class='ctx'> 	struct event_constraint *pebs_constraints;</div><div class='add'>+	void		(*pebs_aliases)(struct perf_event *event);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Intel LBR</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c<br/>index 95e7fe1c5f0b..11a4eb9131d5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_amd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/perf_event_amd.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_amd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event_amd.c</a></div><div class='hunk'>@@ -134,8 +134,13 @@ static u64 amd_pmu_event_map(int hw_event)</div><div class='ctx'> </div><div class='ctx'> static int amd_pmu_hw_config(struct perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	int ret = x86_pmu_hw_config(event);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='add'>+	/* pass precise event sampling to ibs: */</div><div class='add'>+	if (event-&gt;attr.precise_ip &amp;&amp; get_ibs_caps())</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	ret = x86_pmu_hw_config(event);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -205,10 +210,8 @@ static void amd_put_event_constraints(struct cpu_hw_events *cpuc,</div><div class='ctx'> 	 * when we come here</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; x86_pmu.num_counters; i++) {</div><div class='del'>-		if (nb-&gt;owners[i] == event) {</div><div class='del'>-			cmpxchg(nb-&gt;owners+i, event, NULL);</div><div class='add'>+		if (cmpxchg(nb-&gt;owners + i, event, NULL) == event)</div><div class='ctx'> 			break;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -493,6 +496,7 @@ static __initconst const struct x86_pmu amd_pmu = {</div><div class='ctx'>  * 0x023	DE	PERF_CTL[2:0]</div><div class='ctx'>  * 0x02D	LS	PERF_CTL[3]</div><div class='ctx'>  * 0x02E	LS	PERF_CTL[3,0]</div><div class='add'>+ * 0x031	LS	PERF_CTL[2:0] (**)</div><div class='ctx'>  * 0x043	CU	PERF_CTL[2:0]</div><div class='ctx'>  * 0x045	CU	PERF_CTL[2:0]</div><div class='ctx'>  * 0x046	CU	PERF_CTL[2:0]</div><div class='hunk'>@@ -506,10 +510,12 @@ static __initconst const struct x86_pmu amd_pmu = {</div><div class='ctx'>  * 0x0DD	LS	PERF_CTL[5:0]</div><div class='ctx'>  * 0x0DE	LS	PERF_CTL[5:0]</div><div class='ctx'>  * 0x0DF	LS	PERF_CTL[5:0]</div><div class='add'>+ * 0x1C0	EX	PERF_CTL[5:3]</div><div class='ctx'>  * 0x1D6	EX	PERF_CTL[5:0]</div><div class='ctx'>  * 0x1D8	EX	PERF_CTL[5:0]</div><div class='ctx'>  *</div><div class='del'>- * (*) depending on the umask all FPU counters may be used</div><div class='add'>+ * (*)  depending on the umask all FPU counters may be used</div><div class='add'>+ * (**) only one unitmask enabled at a time</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static struct event_constraint amd_f15_PMC0  = EVENT_CONSTRAINT(0, 0x01, 0);</div><div class='hunk'>@@ -559,6 +565,12 @@ amd_get_event_constraints_f15h(struct cpu_hw_events *cpuc, struct perf_event *ev</div><div class='ctx'> 			return &amp;amd_f15_PMC3;</div><div class='ctx'> 		case 0x02E:</div><div class='ctx'> 			return &amp;amd_f15_PMC30;</div><div class='add'>+		case 0x031:</div><div class='add'>+			if (hweight_long(hwc-&gt;config &amp; ARCH_PERFMON_EVENTSEL_UMASK) &lt;= 1)</div><div class='add'>+				return &amp;amd_f15_PMC20;</div><div class='add'>+			return &amp;emptyconstraint;</div><div class='add'>+		case 0x1C0:</div><div class='add'>+			return &amp;amd_f15_PMC53;</div><div class='ctx'> 		default:</div><div class='ctx'> 			return &amp;amd_f15_PMC50;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_amd_ibs.c b/arch/x86/kernel/cpu/perf_event_amd_ibs.c<br/>index 3b8a2d30d14e..da9bcdcd9856 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_amd_ibs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/perf_event_amd_ibs.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_amd_ibs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event_amd_ibs.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -16,36 +17,591 @@ static u32 ibs_caps;</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_PERF_EVENTS) &amp;&amp; defined(CONFIG_CPU_SUP_AMD)</div><div class='ctx'> </div><div class='del'>-static struct pmu perf_ibs;</div><div class='add'>+#include &lt;linux/kprobes.h&gt;</div><div class='add'>+#include &lt;linux/hardirq.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/nmi.h&gt;</div><div class='add'>+</div><div class='add'>+#define IBS_FETCH_CONFIG_MASK	(IBS_FETCH_RAND_EN | IBS_FETCH_MAX_CNT)</div><div class='add'>+#define IBS_OP_CONFIG_MASK	IBS_OP_MAX_CNT</div><div class='add'>+</div><div class='add'>+enum ibs_states {</div><div class='add'>+	IBS_ENABLED	= 0,</div><div class='add'>+	IBS_STARTED	= 1,</div><div class='add'>+	IBS_STOPPING	= 2,</div><div class='add'>+</div><div class='add'>+	IBS_MAX_STATES,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cpu_perf_ibs {</div><div class='add'>+	struct perf_event	*event;</div><div class='add'>+	unsigned long		state[BITS_TO_LONGS(IBS_MAX_STATES)];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct perf_ibs {</div><div class='add'>+	struct pmu	pmu;</div><div class='add'>+	unsigned int	msr;</div><div class='add'>+	u64		config_mask;</div><div class='add'>+	u64		cnt_mask;</div><div class='add'>+	u64		enable_mask;</div><div class='add'>+	u64		valid_mask;</div><div class='add'>+	u64		max_period;</div><div class='add'>+	unsigned long	offset_mask[1];</div><div class='add'>+	int		offset_max;</div><div class='add'>+	struct cpu_perf_ibs __percpu *pcpu;</div><div class='add'>+	u64		(*get_count)(u64 config);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct perf_ibs_data {</div><div class='add'>+	u32		size;</div><div class='add'>+	union {</div><div class='add'>+		u32	data[0];	/* data buffer starts here */</div><div class='add'>+		u32	caps;</div><div class='add'>+	};</div><div class='add'>+	u64		regs[MSR_AMD64_IBS_REG_COUNT_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+perf_event_set_period(struct hw_perf_event *hwc, u64 min, u64 max, u64 *hw_period)</div><div class='add'>+{</div><div class='add'>+	s64 left = local64_read(&amp;hwc-&gt;period_left);</div><div class='add'>+	s64 period = hwc-&gt;sample_period;</div><div class='add'>+	int overflow = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we are way outside a reasonable range then just skip forward:</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(left &lt;= -period)) {</div><div class='add'>+		left = period;</div><div class='add'>+		local64_set(&amp;hwc-&gt;period_left, left);</div><div class='add'>+		hwc-&gt;last_period = period;</div><div class='add'>+		overflow = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(left &lt; (s64)min)) {</div><div class='add'>+		left += period;</div><div class='add'>+		local64_set(&amp;hwc-&gt;period_left, left);</div><div class='add'>+		hwc-&gt;last_period = period;</div><div class='add'>+		overflow = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the hw period that triggers the sw overflow is too short</div><div class='add'>+	 * we might hit the irq handler. This biases the results.</div><div class='add'>+	 * Thus we shorten the next-to-last period and set the last</div><div class='add'>+	 * period to the max period.</div><div class='add'>+	 */</div><div class='add'>+	if (left &gt; max) {</div><div class='add'>+		left -= max;</div><div class='add'>+		if (left &gt; max)</div><div class='add'>+			left = max;</div><div class='add'>+		else if (left &lt; min)</div><div class='add'>+			left = min;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*hw_period = (u64)left;</div><div class='add'>+</div><div class='add'>+	return overflow;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static  int</div><div class='add'>+perf_event_try_update(struct perf_event *event, u64 new_raw_count, int width)</div><div class='add'>+{</div><div class='add'>+	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='add'>+	int shift = 64 - width;</div><div class='add'>+	u64 prev_raw_count;</div><div class='add'>+	u64 delta;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Careful: an NMI might modify the previous event value.</div><div class='add'>+	 *</div><div class='add'>+	 * Our tactic to handle this is to first atomically read and</div><div class='add'>+	 * exchange a new raw count - then add that new-prev delta</div><div class='add'>+	 * count to the generic event atomically:</div><div class='add'>+	 */</div><div class='add'>+	prev_raw_count = local64_read(&amp;hwc-&gt;prev_count);</div><div class='add'>+	if (local64_cmpxchg(&amp;hwc-&gt;prev_count, prev_raw_count,</div><div class='add'>+					new_raw_count) != prev_raw_count)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Now we have the new raw value and have updated the prev</div><div class='add'>+	 * timestamp already. We can now calculate the elapsed delta</div><div class='add'>+	 * (event-)time and add that to the generic event.</div><div class='add'>+	 *</div><div class='add'>+	 * Careful, not all hw sign-extends above the physical width</div><div class='add'>+	 * of the count.</div><div class='add'>+	 */</div><div class='add'>+	delta = (new_raw_count &lt;&lt; shift) - (prev_raw_count &lt;&lt; shift);</div><div class='add'>+	delta &gt;&gt;= shift;</div><div class='add'>+</div><div class='add'>+	local64_add(delta, &amp;event-&gt;count);</div><div class='add'>+	local64_sub(delta, &amp;hwc-&gt;period_left);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct perf_ibs perf_ibs_fetch;</div><div class='add'>+static struct perf_ibs perf_ibs_op;</div><div class='add'>+</div><div class='add'>+static struct perf_ibs *get_ibs_pmu(int type)</div><div class='add'>+{</div><div class='add'>+	if (perf_ibs_fetch.pmu.type == type)</div><div class='add'>+		return &amp;perf_ibs_fetch;</div><div class='add'>+	if (perf_ibs_op.pmu.type == type)</div><div class='add'>+		return &amp;perf_ibs_op;</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Use IBS for precise event sampling:</div><div class='add'>+ *</div><div class='add'>+ *  perf record -a -e cpu-cycles:p ...    # use ibs op counting cycle count</div><div class='add'>+ *  perf record -a -e r076:p ...          # same as -e cpu-cycles:p</div><div class='add'>+ *  perf record -a -e r0C1:p ...          # use ibs op counting micro-ops</div><div class='add'>+ *</div><div class='add'>+ * IbsOpCntCtl (bit 19) of IBS Execution Control Register (IbsOpCtl,</div><div class='add'>+ * MSRC001_1033) is used to select either cycle or micro-ops counting</div><div class='add'>+ * mode.</div><div class='add'>+ *</div><div class='add'>+ * The rip of IBS samples has skid 0. Thus, IBS supports precise</div><div class='add'>+ * levels 1 and 2 and the PERF_EFLAGS_EXACT is set. In rare cases the</div><div class='add'>+ * rip is invalid when IBS was not able to record the rip correctly.</div><div class='add'>+ * We clear PERF_EFLAGS_EXACT and take the rip from pt_regs then.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static int perf_ibs_precise_event(struct perf_event *event, u64 *config)</div><div class='add'>+{</div><div class='add'>+	switch (event-&gt;attr.precise_ip) {</div><div class='add'>+	case 0:</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	case 1:</div><div class='add'>+	case 2:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (event-&gt;attr.type) {</div><div class='add'>+	case PERF_TYPE_HARDWARE:</div><div class='add'>+		switch (event-&gt;attr.config) {</div><div class='add'>+		case PERF_COUNT_HW_CPU_CYCLES:</div><div class='add'>+			*config = 0;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case PERF_TYPE_RAW:</div><div class='add'>+		switch (event-&gt;attr.config) {</div><div class='add'>+		case 0x0076:</div><div class='add'>+			*config = 0;</div><div class='add'>+			return 0;</div><div class='add'>+		case 0x00C1:</div><div class='add'>+			*config = IBS_OP_CNT_CTL;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int perf_ibs_init(struct perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	if (perf_ibs.type != event-&gt;attr.type)</div><div class='add'>+	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='add'>+	struct perf_ibs *perf_ibs;</div><div class='add'>+	u64 max_cnt, config;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	perf_ibs = get_ibs_pmu(event-&gt;attr.type);</div><div class='add'>+	if (perf_ibs) {</div><div class='add'>+		config = event-&gt;attr.config;</div><div class='add'>+	} else {</div><div class='add'>+		perf_ibs = &amp;perf_ibs_op;</div><div class='add'>+		ret = perf_ibs_precise_event(event, &amp;config);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (event-&gt;pmu != &amp;perf_ibs-&gt;pmu)</div><div class='ctx'> 		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (config &amp; ~perf_ibs-&gt;config_mask)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (hwc-&gt;sample_period) {</div><div class='add'>+		if (config &amp; perf_ibs-&gt;cnt_mask)</div><div class='add'>+			/* raw max_cnt may not be set */</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		if (!event-&gt;attr.sample_freq &amp;&amp; hwc-&gt;sample_period &amp; 0x0f)</div><div class='add'>+			/*</div><div class='add'>+			 * lower 4 bits can not be set in ibs max cnt,</div><div class='add'>+			 * but allowing it in case we adjust the</div><div class='add'>+			 * sample period to set a frequency.</div><div class='add'>+			 */</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		hwc-&gt;sample_period &amp;= ~0x0FULL;</div><div class='add'>+		if (!hwc-&gt;sample_period)</div><div class='add'>+			hwc-&gt;sample_period = 0x10;</div><div class='add'>+	} else {</div><div class='add'>+		max_cnt = config &amp; perf_ibs-&gt;cnt_mask;</div><div class='add'>+		config &amp;= ~perf_ibs-&gt;cnt_mask;</div><div class='add'>+		event-&gt;attr.sample_period = max_cnt &lt;&lt; 4;</div><div class='add'>+		hwc-&gt;sample_period = event-&gt;attr.sample_period;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!hwc-&gt;sample_period)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we modify hwc-&gt;sample_period, we also need to update</div><div class='add'>+	 * hwc-&gt;last_period and hwc-&gt;period_left.</div><div class='add'>+	 */</div><div class='add'>+	hwc-&gt;last_period = hwc-&gt;sample_period;</div><div class='add'>+	local64_set(&amp;hwc-&gt;period_left, hwc-&gt;sample_period);</div><div class='add'>+</div><div class='add'>+	hwc-&gt;config_base = perf_ibs-&gt;msr;</div><div class='add'>+	hwc-&gt;config = config;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int perf_ibs_set_period(struct perf_ibs *perf_ibs,</div><div class='add'>+			       struct hw_perf_event *hwc, u64 *period)</div><div class='add'>+{</div><div class='add'>+	int overflow;</div><div class='add'>+</div><div class='add'>+	/* ignore lower 4 bits in min count: */</div><div class='add'>+	overflow = perf_event_set_period(hwc, 1&lt;&lt;4, perf_ibs-&gt;max_period, period);</div><div class='add'>+	local64_set(&amp;hwc-&gt;prev_count, 0);</div><div class='add'>+</div><div class='add'>+	return overflow;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 get_ibs_fetch_count(u64 config)</div><div class='add'>+{</div><div class='add'>+	return (config &amp; IBS_FETCH_CNT) &gt;&gt; 12;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 get_ibs_op_count(u64 config)</div><div class='add'>+{</div><div class='add'>+	u64 count = 0;</div><div class='add'>+</div><div class='add'>+	if (config &amp; IBS_OP_VAL)</div><div class='add'>+		count += (config &amp; IBS_OP_MAX_CNT) &lt;&lt; 4; /* cnt rolled over */</div><div class='add'>+</div><div class='add'>+	if (ibs_caps &amp; IBS_CAPS_RDWROPCNT)</div><div class='add'>+		count += (config &amp; IBS_OP_CUR_CNT) &gt;&gt; 32;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+perf_ibs_event_update(struct perf_ibs *perf_ibs, struct perf_event *event,</div><div class='add'>+		      u64 *config)</div><div class='add'>+{</div><div class='add'>+	u64 count = perf_ibs-&gt;get_count(*config);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set width to 64 since we do not overflow on max width but</div><div class='add'>+	 * instead on max count. In perf_ibs_set_period() we clear</div><div class='add'>+	 * prev count manually on overflow.</div><div class='add'>+	 */</div><div class='add'>+	while (!perf_event_try_update(event, count, 64)) {</div><div class='add'>+		rdmsrl(event-&gt;hw.config_base, *config);</div><div class='add'>+		count = perf_ibs-&gt;get_count(*config);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void perf_ibs_enable_event(struct perf_ibs *perf_ibs,</div><div class='add'>+					 struct hw_perf_event *hwc, u64 config)</div><div class='add'>+{</div><div class='add'>+	wrmsrl(hwc-&gt;config_base, hwc-&gt;config | config | perf_ibs-&gt;enable_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Erratum #420 Instruction-Based Sampling Engine May Generate</div><div class='add'>+ * Interrupt that Cannot Be Cleared:</div><div class='add'>+ *</div><div class='add'>+ * Must clear counter mask first, then clear the enable bit. See</div><div class='add'>+ * Revision Guide for AMD Family 10h Processors, Publication #41322.</div><div class='add'>+ */</div><div class='add'>+static inline void perf_ibs_disable_event(struct perf_ibs *perf_ibs,</div><div class='add'>+					  struct hw_perf_event *hwc, u64 config)</div><div class='add'>+{</div><div class='add'>+	config &amp;= ~perf_ibs-&gt;cnt_mask;</div><div class='add'>+	wrmsrl(hwc-&gt;config_base, config);</div><div class='add'>+	config &amp;= ~perf_ibs-&gt;enable_mask;</div><div class='add'>+	wrmsrl(hwc-&gt;config_base, config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * We cannot restore the ibs pmu state, so we always needs to update</div><div class='add'>+ * the event while stopping it and then reset the state when starting</div><div class='add'>+ * again. Thus, ignoring PERF_EF_RELOAD and PERF_EF_UPDATE flags in</div><div class='add'>+ * perf_ibs_start()/perf_ibs_stop() and instead always do it.</div><div class='add'>+ */</div><div class='add'>+static void perf_ibs_start(struct perf_event *event, int flags)</div><div class='add'>+{</div><div class='add'>+	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='add'>+	struct perf_ibs *perf_ibs = container_of(event-&gt;pmu, struct perf_ibs, pmu);</div><div class='add'>+	struct cpu_perf_ibs *pcpu = this_cpu_ptr(perf_ibs-&gt;pcpu);</div><div class='add'>+	u64 period;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(!(hwc-&gt;state &amp; PERF_HES_STOPPED)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(!(hwc-&gt;state &amp; PERF_HES_UPTODATE));</div><div class='add'>+	hwc-&gt;state = 0;</div><div class='add'>+</div><div class='add'>+	perf_ibs_set_period(perf_ibs, hwc, &amp;period);</div><div class='add'>+	set_bit(IBS_STARTED, pcpu-&gt;state);</div><div class='add'>+	perf_ibs_enable_event(perf_ibs, hwc, period &gt;&gt; 4);</div><div class='add'>+</div><div class='add'>+	perf_event_update_userpage(event);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void perf_ibs_stop(struct perf_event *event, int flags)</div><div class='add'>+{</div><div class='add'>+	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='add'>+	struct perf_ibs *perf_ibs = container_of(event-&gt;pmu, struct perf_ibs, pmu);</div><div class='add'>+	struct cpu_perf_ibs *pcpu = this_cpu_ptr(perf_ibs-&gt;pcpu);</div><div class='add'>+	u64 config;</div><div class='add'>+	int stopping;</div><div class='add'>+</div><div class='add'>+	stopping = test_and_clear_bit(IBS_STARTED, pcpu-&gt;state);</div><div class='add'>+</div><div class='add'>+	if (!stopping &amp;&amp; (hwc-&gt;state &amp; PERF_HES_UPTODATE))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rdmsrl(hwc-&gt;config_base, config);</div><div class='add'>+</div><div class='add'>+	if (stopping) {</div><div class='add'>+		set_bit(IBS_STOPPING, pcpu-&gt;state);</div><div class='add'>+		perf_ibs_disable_event(perf_ibs, hwc, config);</div><div class='add'>+		WARN_ON_ONCE(hwc-&gt;state &amp; PERF_HES_STOPPED);</div><div class='add'>+		hwc-&gt;state |= PERF_HES_STOPPED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hwc-&gt;state &amp; PERF_HES_UPTODATE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Clear valid bit to not count rollovers on update, rollovers</div><div class='add'>+	 * are only updated in the irq handler.</div><div class='add'>+	 */</div><div class='add'>+	config &amp;= ~perf_ibs-&gt;valid_mask;</div><div class='add'>+</div><div class='add'>+	perf_ibs_event_update(perf_ibs, event, &amp;config);</div><div class='add'>+	hwc-&gt;state |= PERF_HES_UPTODATE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int perf_ibs_add(struct perf_event *event, int flags)</div><div class='ctx'> {</div><div class='add'>+	struct perf_ibs *perf_ibs = container_of(event-&gt;pmu, struct perf_ibs, pmu);</div><div class='add'>+	struct cpu_perf_ibs *pcpu = this_cpu_ptr(perf_ibs-&gt;pcpu);</div><div class='add'>+</div><div class='add'>+	if (test_and_set_bit(IBS_ENABLED, pcpu-&gt;state))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	event-&gt;hw.state = PERF_HES_UPTODATE | PERF_HES_STOPPED;</div><div class='add'>+</div><div class='add'>+	pcpu-&gt;event = event;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; PERF_EF_START)</div><div class='add'>+		perf_ibs_start(event, PERF_EF_RELOAD);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void perf_ibs_del(struct perf_event *event, int flags)</div><div class='ctx'> {</div><div class='add'>+	struct perf_ibs *perf_ibs = container_of(event-&gt;pmu, struct perf_ibs, pmu);</div><div class='add'>+	struct cpu_perf_ibs *pcpu = this_cpu_ptr(perf_ibs-&gt;pcpu);</div><div class='add'>+</div><div class='add'>+	if (!test_and_clear_bit(IBS_ENABLED, pcpu-&gt;state))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	perf_ibs_stop(event, PERF_EF_UPDATE);</div><div class='add'>+</div><div class='add'>+	pcpu-&gt;event = NULL;</div><div class='add'>+</div><div class='add'>+	perf_event_update_userpage(event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct pmu perf_ibs = {</div><div class='del'>-	.event_init= perf_ibs_init,</div><div class='del'>-	.add= perf_ibs_add,</div><div class='del'>-	.del= perf_ibs_del,</div><div class='add'>+static void perf_ibs_read(struct perf_event *event) { }</div><div class='add'>+</div><div class='add'>+static struct perf_ibs perf_ibs_fetch = {</div><div class='add'>+	.pmu = {</div><div class='add'>+		.task_ctx_nr	= perf_invalid_context,</div><div class='add'>+</div><div class='add'>+		.event_init	= perf_ibs_init,</div><div class='add'>+		.add		= perf_ibs_add,</div><div class='add'>+		.del		= perf_ibs_del,</div><div class='add'>+		.start		= perf_ibs_start,</div><div class='add'>+		.stop		= perf_ibs_stop,</div><div class='add'>+		.read		= perf_ibs_read,</div><div class='add'>+	},</div><div class='add'>+	.msr			= MSR_AMD64_IBSFETCHCTL,</div><div class='add'>+	.config_mask		= IBS_FETCH_CONFIG_MASK,</div><div class='add'>+	.cnt_mask		= IBS_FETCH_MAX_CNT,</div><div class='add'>+	.enable_mask		= IBS_FETCH_ENABLE,</div><div class='add'>+	.valid_mask		= IBS_FETCH_VAL,</div><div class='add'>+	.max_period		= IBS_FETCH_MAX_CNT &lt;&lt; 4,</div><div class='add'>+	.offset_mask		= { MSR_AMD64_IBSFETCH_REG_MASK },</div><div class='add'>+	.offset_max		= MSR_AMD64_IBSFETCH_REG_COUNT,</div><div class='add'>+</div><div class='add'>+	.get_count		= get_ibs_fetch_count,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct perf_ibs perf_ibs_op = {</div><div class='add'>+	.pmu = {</div><div class='add'>+		.task_ctx_nr	= perf_invalid_context,</div><div class='add'>+</div><div class='add'>+		.event_init	= perf_ibs_init,</div><div class='add'>+		.add		= perf_ibs_add,</div><div class='add'>+		.del		= perf_ibs_del,</div><div class='add'>+		.start		= perf_ibs_start,</div><div class='add'>+		.stop		= perf_ibs_stop,</div><div class='add'>+		.read		= perf_ibs_read,</div><div class='add'>+	},</div><div class='add'>+	.msr			= MSR_AMD64_IBSOPCTL,</div><div class='add'>+	.config_mask		= IBS_OP_CONFIG_MASK,</div><div class='add'>+	.cnt_mask		= IBS_OP_MAX_CNT,</div><div class='add'>+	.enable_mask		= IBS_OP_ENABLE,</div><div class='add'>+	.valid_mask		= IBS_OP_VAL,</div><div class='add'>+	.max_period		= IBS_OP_MAX_CNT &lt;&lt; 4,</div><div class='add'>+	.offset_mask		= { MSR_AMD64_IBSOP_REG_MASK },</div><div class='add'>+	.offset_max		= MSR_AMD64_IBSOP_REG_COUNT,</div><div class='add'>+</div><div class='add'>+	.get_count		= get_ibs_op_count,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int perf_ibs_handle_irq(struct perf_ibs *perf_ibs, struct pt_regs *iregs)</div><div class='add'>+{</div><div class='add'>+	struct cpu_perf_ibs *pcpu = this_cpu_ptr(perf_ibs-&gt;pcpu);</div><div class='add'>+	struct perf_event *event = pcpu-&gt;event;</div><div class='add'>+	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='add'>+	struct perf_sample_data data;</div><div class='add'>+	struct perf_raw_record raw;</div><div class='add'>+	struct pt_regs regs;</div><div class='add'>+	struct perf_ibs_data ibs_data;</div><div class='add'>+	int offset, size, check_rip, offset_max, throttle = 0;</div><div class='add'>+	unsigned int msr;</div><div class='add'>+	u64 *buf, *config, period;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(IBS_STARTED, pcpu-&gt;state)) {</div><div class='add'>+		/*</div><div class='add'>+		 * Catch spurious interrupts after stopping IBS: After</div><div class='add'>+		 * disabling IBS there could be still incomming NMIs</div><div class='add'>+		 * with samples that even have the valid bit cleared.</div><div class='add'>+		 * Mark all this NMIs as handled.</div><div class='add'>+		 */</div><div class='add'>+		return test_and_clear_bit(IBS_STOPPING, pcpu-&gt;state) ? 1 : 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msr = hwc-&gt;config_base;</div><div class='add'>+	buf = ibs_data.regs;</div><div class='add'>+	rdmsrl(msr, *buf);</div><div class='add'>+	if (!(*buf++ &amp; perf_ibs-&gt;valid_mask))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	config = &amp;ibs_data.regs[0];</div><div class='add'>+	perf_ibs_event_update(perf_ibs, event, config);</div><div class='add'>+	perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='add'>+	if (!perf_ibs_set_period(perf_ibs, hwc, &amp;period))</div><div class='add'>+		goto out;	/* no sw counter overflow */</div><div class='add'>+</div><div class='add'>+	ibs_data.caps = ibs_caps;</div><div class='add'>+	size = 1;</div><div class='add'>+	offset = 1;</div><div class='add'>+	check_rip = (perf_ibs == &amp;perf_ibs_op &amp;&amp; (ibs_caps &amp; IBS_CAPS_RIPINVALIDCHK));</div><div class='add'>+	if (event-&gt;attr.sample_type &amp; PERF_SAMPLE_RAW)</div><div class='add'>+		offset_max = perf_ibs-&gt;offset_max;</div><div class='add'>+	else if (check_rip)</div><div class='add'>+		offset_max = 2;</div><div class='add'>+	else</div><div class='add'>+		offset_max = 1;</div><div class='add'>+	do {</div><div class='add'>+		rdmsrl(msr + offset, *buf++);</div><div class='add'>+		size++;</div><div class='add'>+		offset = find_next_bit(perf_ibs-&gt;offset_mask,</div><div class='add'>+				       perf_ibs-&gt;offset_max,</div><div class='add'>+				       offset + 1);</div><div class='add'>+	} while (offset &lt; offset_max);</div><div class='add'>+	ibs_data.size = sizeof(u64) * size;</div><div class='add'>+</div><div class='add'>+	regs = *iregs;</div><div class='add'>+	if (check_rip &amp;&amp; (ibs_data.regs[2] &amp; IBS_RIP_INVALID)) {</div><div class='add'>+		regs.flags &amp;= ~PERF_EFLAGS_EXACT;</div><div class='add'>+	} else {</div><div class='add'>+		instruction_pointer_set(&amp;regs, ibs_data.regs[1]);</div><div class='add'>+		regs.flags |= PERF_EFLAGS_EXACT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (event-&gt;attr.sample_type &amp; PERF_SAMPLE_RAW) {</div><div class='add'>+		raw.size = sizeof(u32) + ibs_data.size;</div><div class='add'>+		raw.data = ibs_data.data;</div><div class='add'>+		data.raw = &amp;raw;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	throttle = perf_event_overflow(event, &amp;data, &amp;regs);</div><div class='add'>+out:</div><div class='add'>+	if (throttle)</div><div class='add'>+		perf_ibs_disable_event(perf_ibs, hwc, *config);</div><div class='add'>+	else</div><div class='add'>+		perf_ibs_enable_event(perf_ibs, hwc, period &gt;&gt; 4);</div><div class='add'>+</div><div class='add'>+	perf_event_update_userpage(event);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __kprobes</div><div class='add'>+perf_ibs_nmi_handler(unsigned int cmd, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	int handled = 0;</div><div class='add'>+</div><div class='add'>+	handled += perf_ibs_handle_irq(&amp;perf_ibs_fetch, regs);</div><div class='add'>+	handled += perf_ibs_handle_irq(&amp;perf_ibs_op, regs);</div><div class='add'>+</div><div class='add'>+	if (handled)</div><div class='add'>+		inc_irq_stat(apic_perf_irqs);</div><div class='add'>+</div><div class='add'>+	return handled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init int perf_ibs_pmu_init(struct perf_ibs *perf_ibs, char *name)</div><div class='add'>+{</div><div class='add'>+	struct cpu_perf_ibs __percpu *pcpu;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pcpu = alloc_percpu(struct cpu_perf_ibs);</div><div class='add'>+	if (!pcpu)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	perf_ibs-&gt;pcpu = pcpu;</div><div class='add'>+</div><div class='add'>+	ret = perf_pmu_register(&amp;perf_ibs-&gt;pmu, name, -1);</div><div class='add'>+	if (ret) {</div><div class='add'>+		perf_ibs-&gt;pcpu = NULL;</div><div class='add'>+		free_percpu(pcpu);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static __init int perf_event_ibs_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!ibs_caps)</div><div class='ctx'> 		return -ENODEV;	/* ibs not supported by the cpu */</div><div class='ctx'> </div><div class='del'>-	perf_pmu_register(&amp;perf_ibs, "ibs", -1);</div><div class='add'>+	perf_ibs_pmu_init(&amp;perf_ibs_fetch, "ibs_fetch");</div><div class='add'>+	if (ibs_caps &amp; IBS_CAPS_OPCNT)</div><div class='add'>+		perf_ibs_op.config_mask |= IBS_OP_CNT_CTL;</div><div class='add'>+	perf_ibs_pmu_init(&amp;perf_ibs_op, "ibs_op");</div><div class='add'>+	register_nmi_handler(NMI_LOCAL, perf_ibs_nmi_handler, 0, "perf_ibs");</div><div class='ctx'> 	printk(KERN_INFO "perf: AMD IBS detected (0x%08x)\n", ibs_caps);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c<br/>index 26b3e2fef104..187c294bc658 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/perf_event_intel.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event_intel.c</a></div><div class='hunk'>@@ -1027,8 +1027,6 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)</div><div class='ctx'> 	u64 status;</div><div class='ctx'> 	int handled;</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0);</div><div class='del'>-</div><div class='ctx'> 	cpuc = &amp;__get_cpu_var(cpu_hw_events);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1082,7 +1080,7 @@ again:</div><div class='ctx'> 		if (!intel_pmu_save_and_restart(event))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		data.period = event-&gt;hw.last_period;</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, event-&gt;hw.last_period);</div><div class='ctx'> </div><div class='ctx'> 		if (has_branch_stack(event))</div><div class='ctx'> 			data.br_stack = &amp;cpuc-&gt;lbr_stack;</div><div class='hunk'>@@ -1121,27 +1119,33 @@ intel_bts_constraints(struct perf_event *event)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool intel_try_alt_er(struct perf_event *event, int orig_idx)</div><div class='add'>+static int intel_alt_er(int idx)</div><div class='ctx'> {</div><div class='ctx'> 	if (!(x86_pmu.er_flags &amp; ERF_HAS_RSP_1))</div><div class='del'>-		return false;</div><div class='add'>+		return idx;</div><div class='ctx'> </div><div class='del'>-	if (event-&gt;hw.extra_reg.idx == EXTRA_REG_RSP_0) {</div><div class='del'>-		event-&gt;hw.config &amp;= ~INTEL_ARCH_EVENT_MASK;</div><div class='del'>-		event-&gt;hw.config |= 0x01bb;</div><div class='del'>-		event-&gt;hw.extra_reg.idx = EXTRA_REG_RSP_1;</div><div class='del'>-		event-&gt;hw.extra_reg.reg = MSR_OFFCORE_RSP_1;</div><div class='del'>-	} else if (event-&gt;hw.extra_reg.idx == EXTRA_REG_RSP_1) {</div><div class='add'>+	if (idx == EXTRA_REG_RSP_0)</div><div class='add'>+		return EXTRA_REG_RSP_1;</div><div class='add'>+</div><div class='add'>+	if (idx == EXTRA_REG_RSP_1)</div><div class='add'>+		return EXTRA_REG_RSP_0;</div><div class='add'>+</div><div class='add'>+	return idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void intel_fixup_er(struct perf_event *event, int idx)</div><div class='add'>+{</div><div class='add'>+	event-&gt;hw.extra_reg.idx = idx;</div><div class='add'>+</div><div class='add'>+	if (idx == EXTRA_REG_RSP_0) {</div><div class='ctx'> 		event-&gt;hw.config &amp;= ~INTEL_ARCH_EVENT_MASK;</div><div class='ctx'> 		event-&gt;hw.config |= 0x01b7;</div><div class='del'>-		event-&gt;hw.extra_reg.idx = EXTRA_REG_RSP_0;</div><div class='ctx'> 		event-&gt;hw.extra_reg.reg = MSR_OFFCORE_RSP_0;</div><div class='add'>+	} else if (idx == EXTRA_REG_RSP_1) {</div><div class='add'>+		event-&gt;hw.config &amp;= ~INTEL_ARCH_EVENT_MASK;</div><div class='add'>+		event-&gt;hw.config |= 0x01bb;</div><div class='add'>+		event-&gt;hw.extra_reg.reg = MSR_OFFCORE_RSP_1;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (event-&gt;hw.extra_reg.idx == orig_idx)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1159,14 +1163,18 @@ __intel_shared_reg_get_constraints(struct cpu_hw_events *cpuc,</div><div class='ctx'> 	struct event_constraint *c = &amp;emptyconstraint;</div><div class='ctx'> 	struct er_account *era;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int orig_idx = reg-&gt;idx;</div><div class='add'>+	int idx = reg-&gt;idx;</div><div class='ctx'> </div><div class='del'>-	/* already allocated shared msr */</div><div class='del'>-	if (reg-&gt;alloc)</div><div class='add'>+	/*</div><div class='add'>+	 * reg-&gt;alloc can be set due to existing state, so for fake cpuc we</div><div class='add'>+	 * need to ignore this, otherwise we might fail to allocate proper fake</div><div class='add'>+	 * state for this extra reg constraint. Also see the comment below.</div><div class='add'>+	 */</div><div class='add'>+	if (reg-&gt;alloc &amp;&amp; !cpuc-&gt;is_fake)</div><div class='ctx'> 		return NULL; /* call x86_get_event_constraint() */</div><div class='ctx'> </div><div class='ctx'> again:</div><div class='del'>-	era = &amp;cpuc-&gt;shared_regs-&gt;regs[reg-&gt;idx];</div><div class='add'>+	era = &amp;cpuc-&gt;shared_regs-&gt;regs[idx];</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * we use spin_lock_irqsave() to avoid lockdep issues when</div><div class='ctx'> 	 * passing a fake cpuc</div><div class='hunk'>@@ -1175,6 +1183,29 @@ again:</div><div class='ctx'> </div><div class='ctx'> 	if (!atomic_read(&amp;era-&gt;ref) || era-&gt;config == reg-&gt;config) {</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * If its a fake cpuc -- as per validate_{group,event}() we</div><div class='add'>+		 * shouldn't touch event state and we can avoid doing so</div><div class='add'>+		 * since both will only call get_event_constraints() once</div><div class='add'>+		 * on each event, this avoids the need for reg-&gt;alloc.</div><div class='add'>+		 *</div><div class='add'>+		 * Not doing the ER fixup will only result in era-&gt;reg being</div><div class='add'>+		 * wrong, but since we won't actually try and program hardware</div><div class='add'>+		 * this isn't a problem either.</div><div class='add'>+		 */</div><div class='add'>+		if (!cpuc-&gt;is_fake) {</div><div class='add'>+			if (idx != reg-&gt;idx)</div><div class='add'>+				intel_fixup_er(event, idx);</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * x86_schedule_events() can call get_event_constraints()</div><div class='add'>+			 * multiple times on events in the case of incremental</div><div class='add'>+			 * scheduling(). reg-&gt;alloc ensures we only do the ER</div><div class='add'>+			 * allocation once.</div><div class='add'>+			 */</div><div class='add'>+			reg-&gt;alloc = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* lock in msr value */</div><div class='ctx'> 		era-&gt;config = reg-&gt;config;</div><div class='ctx'> 		era-&gt;reg = reg-&gt;reg;</div><div class='hunk'>@@ -1182,17 +1213,17 @@ again:</div><div class='ctx'> 		/* one more user */</div><div class='ctx'> 		atomic_inc(&amp;era-&gt;ref);</div><div class='ctx'> </div><div class='del'>-		/* no need to reallocate during incremental event scheduling */</div><div class='del'>-		reg-&gt;alloc = 1;</div><div class='del'>-</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * need to call x86_get_event_constraint()</div><div class='ctx'> 		 * to check if associated event has constraints</div><div class='ctx'> 		 */</div><div class='ctx'> 		c = NULL;</div><div class='del'>-	} else if (intel_try_alt_er(event, orig_idx)) {</div><div class='del'>-		raw_spin_unlock_irqrestore(&amp;era-&gt;lock, flags);</div><div class='del'>-		goto again;</div><div class='add'>+	} else {</div><div class='add'>+		idx = intel_alt_er(idx);</div><div class='add'>+		if (idx != reg-&gt;idx) {</div><div class='add'>+			raw_spin_unlock_irqrestore(&amp;era-&gt;lock, flags);</div><div class='add'>+			goto again;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;era-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -1206,11 +1237,14 @@ __intel_shared_reg_put_constraints(struct cpu_hw_events *cpuc,</div><div class='ctx'> 	struct er_account *era;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * only put constraint if extra reg was actually</div><div class='del'>-	 * allocated. Also takes care of event which do</div><div class='del'>-	 * not use an extra shared reg</div><div class='add'>+	 * Only put constraint if extra reg was actually allocated. Also takes</div><div class='add'>+	 * care of event which do not use an extra shared reg.</div><div class='add'>+	 *</div><div class='add'>+	 * Also, if this is a fake cpuc we shouldn't touch any event state</div><div class='add'>+	 * (reg-&gt;alloc) and we don't care about leaving inconsistent cpuc state</div><div class='add'>+	 * either since it'll be thrown out.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!reg-&gt;alloc)</div><div class='add'>+	if (!reg-&gt;alloc || cpuc-&gt;is_fake)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	era = &amp;cpuc-&gt;shared_regs-&gt;regs[reg-&gt;idx];</div><div class='hunk'>@@ -1302,15 +1336,9 @@ static void intel_put_event_constraints(struct cpu_hw_events *cpuc,</div><div class='ctx'> 	intel_put_shared_regs_event_constraints(cpuc, event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int intel_pmu_hw_config(struct perf_event *event)</div><div class='add'>+static void intel_pebs_aliases_core2(struct perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	int ret = x86_pmu_hw_config(event);</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (event-&gt;attr.precise_ip &amp;&amp;</div><div class='del'>-	    (event-&gt;hw.config &amp; X86_RAW_EVENT_MASK) == 0x003c) {</div><div class='add'>+	if ((event-&gt;hw.config &amp; X86_RAW_EVENT_MASK) == 0x003c) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Use an alternative encoding for CPU_CLK_UNHALTED.THREAD_P</div><div class='ctx'> 		 * (0x003c) so that we can use it with PEBS.</div><div class='hunk'>@@ -1331,10 +1359,48 @@ static int intel_pmu_hw_config(struct perf_event *event)</div><div class='ctx'> 		 */</div><div class='ctx'> 		u64 alt_config = X86_CONFIG(.event=0xc0, .inv=1, .cmask=16);</div><div class='ctx'> </div><div class='add'>+		alt_config |= (event-&gt;hw.config &amp; ~X86_RAW_EVENT_MASK);</div><div class='add'>+		event-&gt;hw.config = alt_config;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void intel_pebs_aliases_snb(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	if ((event-&gt;hw.config &amp; X86_RAW_EVENT_MASK) == 0x003c) {</div><div class='add'>+		/*</div><div class='add'>+		 * Use an alternative encoding for CPU_CLK_UNHALTED.THREAD_P</div><div class='add'>+		 * (0x003c) so that we can use it with PEBS.</div><div class='add'>+		 *</div><div class='add'>+		 * The regular CPU_CLK_UNHALTED.THREAD_P event (0x003c) isn't</div><div class='add'>+		 * PEBS capable. However we can use UOPS_RETIRED.ALL</div><div class='add'>+		 * (0x01c2), which is a PEBS capable event, to get the same</div><div class='add'>+		 * count.</div><div class='add'>+		 *</div><div class='add'>+		 * UOPS_RETIRED.ALL counts the number of cycles that retires</div><div class='add'>+		 * CNTMASK micro-ops. By setting CNTMASK to a value (16)</div><div class='add'>+		 * larger than the maximum number of micro-ops that can be</div><div class='add'>+		 * retired per cycle (4) and then inverting the condition, we</div><div class='add'>+		 * count all cycles that retire 16 or less micro-ops, which</div><div class='add'>+		 * is every cycle.</div><div class='add'>+		 *</div><div class='add'>+		 * Thereby we gain a PEBS capable cycle counter.</div><div class='add'>+		 */</div><div class='add'>+		u64 alt_config = X86_CONFIG(.event=0xc2, .umask=0x01, .inv=1, .cmask=16);</div><div class='ctx'> </div><div class='ctx'> 		alt_config |= (event-&gt;hw.config &amp; ~X86_RAW_EVENT_MASK);</div><div class='ctx'> 		event-&gt;hw.config = alt_config;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int intel_pmu_hw_config(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	int ret = x86_pmu_hw_config(event);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (event-&gt;attr.precise_ip &amp;&amp; x86_pmu.pebs_aliases)</div><div class='add'>+		x86_pmu.pebs_aliases(event);</div><div class='ctx'> </div><div class='ctx'> 	if (intel_pmu_needs_lbr_smpl(event)) {</div><div class='ctx'> 		ret = intel_pmu_setup_lbr_filter(event);</div><div class='hunk'>@@ -1609,6 +1675,7 @@ static __initconst const struct x86_pmu intel_pmu = {</div><div class='ctx'> 	.max_period		= (1ULL &lt;&lt; 31) - 1,</div><div class='ctx'> 	.get_event_constraints	= intel_get_event_constraints,</div><div class='ctx'> 	.put_event_constraints	= intel_put_event_constraints,</div><div class='add'>+	.pebs_aliases		= intel_pebs_aliases_core2,</div><div class='ctx'> </div><div class='ctx'> 	.format_attrs		= intel_arch3_formats_attr,</div><div class='ctx'> </div><div class='hunk'>@@ -1842,8 +1909,9 @@ __init int intel_pmu_init(void)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case 42: /* SandyBridge */</div><div class='del'>-		x86_add_quirk(intel_sandybridge_quirk);</div><div class='ctx'> 	case 45: /* SandyBridge, "Romely-EP" */</div><div class='add'>+		x86_add_quirk(intel_sandybridge_quirk);</div><div class='add'>+	case 58: /* IvyBridge */</div><div class='ctx'> 		memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,</div><div class='ctx'> 		       sizeof(hw_cache_event_ids));</div><div class='ctx'> </div><div class='hunk'>@@ -1851,6 +1919,7 @@ __init int intel_pmu_init(void)</div><div class='ctx'> </div><div class='ctx'> 		x86_pmu.event_constraints = intel_snb_event_constraints;</div><div class='ctx'> 		x86_pmu.pebs_constraints = intel_snb_pebs_event_constraints;</div><div class='add'>+		x86_pmu.pebs_aliases = intel_pebs_aliases_snb;</div><div class='ctx'> 		x86_pmu.extra_regs = intel_snb_extra_regs;</div><div class='ctx'> 		/* all extra regs are per-cpu when HT is on */</div><div class='ctx'> 		x86_pmu.er_flags |= ERF_HAS_RSP_1;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c<br/>index 7f64df19e7dd..35e2192df9f4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_ds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/perf_event_intel_ds.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_intel_ds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event_intel_ds.c</a></div><div class='hunk'>@@ -316,8 +316,7 @@ int intel_pmu_drain_bts_buffer(void)</div><div class='ctx'> </div><div class='ctx'> 	ds-&gt;bts_index = ds-&gt;bts_buffer_base;</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0);</div><div class='del'>-	data.period = event-&gt;hw.last_period;</div><div class='add'>+	perf_sample_data_init(&amp;data, 0, event-&gt;hw.last_period);</div><div class='ctx'> 	regs.ip     = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -401,14 +400,7 @@ struct event_constraint intel_snb_pebs_event_constraints[] = {</div><div class='ctx'> 	INTEL_EVENT_CONSTRAINT(0xc4, 0xf),    /* BR_INST_RETIRED.* */</div><div class='ctx'> 	INTEL_EVENT_CONSTRAINT(0xc5, 0xf),    /* BR_MISP_RETIRED.* */</div><div class='ctx'> 	INTEL_EVENT_CONSTRAINT(0xcd, 0x8),    /* MEM_TRANS_RETIRED.* */</div><div class='del'>-	INTEL_UEVENT_CONSTRAINT(0x11d0, 0xf), /* MEM_UOP_RETIRED.STLB_MISS_LOADS */</div><div class='del'>-	INTEL_UEVENT_CONSTRAINT(0x12d0, 0xf), /* MEM_UOP_RETIRED.STLB_MISS_STORES */</div><div class='del'>-	INTEL_UEVENT_CONSTRAINT(0x21d0, 0xf), /* MEM_UOP_RETIRED.LOCK_LOADS */</div><div class='del'>-	INTEL_UEVENT_CONSTRAINT(0x22d0, 0xf), /* MEM_UOP_RETIRED.LOCK_STORES */</div><div class='del'>-	INTEL_UEVENT_CONSTRAINT(0x41d0, 0xf), /* MEM_UOP_RETIRED.SPLIT_LOADS */</div><div class='del'>-	INTEL_UEVENT_CONSTRAINT(0x42d0, 0xf), /* MEM_UOP_RETIRED.SPLIT_STORES */</div><div class='del'>-	INTEL_UEVENT_CONSTRAINT(0x81d0, 0xf), /* MEM_UOP_RETIRED.ANY_LOADS */</div><div class='del'>-	INTEL_UEVENT_CONSTRAINT(0x82d0, 0xf), /* MEM_UOP_RETIRED.ANY_STORES */</div><div class='add'>+	INTEL_EVENT_CONSTRAINT(0xd0, 0xf),    /* MEM_UOP_RETIRED.* */</div><div class='ctx'> 	INTEL_EVENT_CONSTRAINT(0xd1, 0xf),    /* MEM_LOAD_UOPS_RETIRED.* */</div><div class='ctx'> 	INTEL_EVENT_CONSTRAINT(0xd2, 0xf),    /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */</div><div class='ctx'> 	INTEL_UEVENT_CONSTRAINT(0x02d4, 0xf), /* MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS */</div><div class='hunk'>@@ -564,8 +556,7 @@ static void __intel_pmu_pebs_event(struct perf_event *event,</div><div class='ctx'> 	if (!intel_pmu_save_and_restart(event))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0);</div><div class='del'>-	data.period = event-&gt;hw.last_period;</div><div class='add'>+	perf_sample_data_init(&amp;data, 0, event-&gt;hw.last_period);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We use the interrupt regs as a base because the PEBS record</div><div class='head'>diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c<br/>index a2dfacfd7103..47124a73dd73 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_p4.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/cpu/perf_event_p4.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/cpu/perf_event_p4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/cpu/perf_event_p4.c</a></div><div class='hunk'>@@ -1005,8 +1005,6 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)</div><div class='ctx'> 	int idx, handled = 0;</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='del'>-	perf_sample_data_init(&amp;data, 0);</div><div class='del'>-</div><div class='ctx'> 	cpuc = &amp;__get_cpu_var(cpu_hw_events);</div><div class='ctx'> </div><div class='ctx'> 	for (idx = 0; idx &lt; x86_pmu.num_counters; idx++) {</div><div class='hunk'>@@ -1034,10 +1032,12 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)</div><div class='ctx'> 		handled += overflow;</div><div class='ctx'> </div><div class='ctx'> 		/* event overflow for sure */</div><div class='del'>-		data.period = event-&gt;hw.last_period;</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='ctx'> </div><div class='ctx'> 		if (!x86_perf_event_set_period(event))</div><div class='ctx'> 			continue;</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> 		if (perf_event_overflow(event, &amp;data, regs))</div><div class='ctx'> 			x86_pmu_stop(event, 0);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c<br/>index 1b81839b6c88..571246d81edf 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/dumpstack.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/dumpstack.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/dumpstack.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/dumpstack.c</a></div><div class='hunk'>@@ -271,7 +271,7 @@ int __kprobes __die(const char *str, struct pt_regs *regs, long err)</div><div class='ctx'> 			current-&gt;thread.trap_nr, SIGSEGV) == NOTIFY_STOP)</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='del'>-	show_registers(regs);</div><div class='add'>+	show_regs(regs);</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> 	if (user_mode_vm(regs)) {</div><div class='ctx'> 		sp = regs-&gt;sp;</div><div class='hunk'>@@ -311,16 +311,33 @@ void die(const char *str, struct pt_regs *regs, long err)</div><div class='ctx'> </div><div class='ctx'> static int __init kstack_setup(char *s)</div><div class='ctx'> {</div><div class='add'>+	ssize_t ret;</div><div class='add'>+	unsigned long val;</div><div class='add'>+</div><div class='ctx'> 	if (!s)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	kstack_depth_to_print = simple_strtoul(s, NULL, 0);</div><div class='add'>+</div><div class='add'>+	ret = kstrtoul(s, 0, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	kstack_depth_to_print = val;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> early_param("kstack", kstack_setup);</div><div class='ctx'> </div><div class='ctx'> static int __init code_bytes_setup(char *s)</div><div class='ctx'> {</div><div class='del'>-	code_bytes = simple_strtoul(s, NULL, 0);</div><div class='add'>+	ssize_t ret;</div><div class='add'>+	unsigned long val;</div><div class='add'>+</div><div class='add'>+	if (!s)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = kstrtoul(s, 0, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	code_bytes = val;</div><div class='ctx'> 	if (code_bytes &gt; 8192)</div><div class='ctx'> 		code_bytes = 8192;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c<br/>index 88ec9129271d..e0b1d783daab 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/dumpstack_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/dumpstack_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/dumpstack_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/dumpstack_32.c</a></div><div class='hunk'>@@ -82,7 +82,7 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-void show_registers(struct pt_regs *regs)</div><div class='add'>+void show_regs(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c<br/>index 17107bd6e1f0..791b76122aa8 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/dumpstack_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/dumpstack_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/dumpstack_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/dumpstack_64.c</a></div><div class='hunk'>@@ -245,7 +245,7 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,</div><div class='ctx'> 	show_trace_log_lvl(task, regs, sp, bp, log_lvl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void show_registers(struct pt_regs *regs)</div><div class='add'>+void show_regs(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	unsigned long sp;</div><div class='head'>diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c<br/>index 62d61e9976eb..41857970517f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/e820.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/e820.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/e820.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/e820.c</a></div><div class='hunk'>@@ -113,7 +113,9 @@ static void __init __e820_add_region(struct e820map *e820x, u64 start, u64 size,</div><div class='ctx'> 	int x = e820x-&gt;nr_map;</div><div class='ctx'> </div><div class='ctx'> 	if (x &gt;= ARRAY_SIZE(e820x-&gt;map)) {</div><div class='del'>-		printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");</div><div class='add'>+		printk(KERN_ERR "e820: too many entries; ignoring [mem %#010llx-%#010llx]\n",</div><div class='add'>+		       (unsigned long long) start,</div><div class='add'>+		       (unsigned long long) (start + size - 1));</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -133,19 +135,19 @@ static void __init e820_print_type(u32 type)</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case E820_RAM:</div><div class='ctx'> 	case E820_RESERVED_KERN:</div><div class='del'>-		printk(KERN_CONT "(usable)");</div><div class='add'>+		printk(KERN_CONT "usable");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case E820_RESERVED:</div><div class='del'>-		printk(KERN_CONT "(reserved)");</div><div class='add'>+		printk(KERN_CONT "reserved");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case E820_ACPI:</div><div class='del'>-		printk(KERN_CONT "(ACPI data)");</div><div class='add'>+		printk(KERN_CONT "ACPI data");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case E820_NVS:</div><div class='del'>-		printk(KERN_CONT "(ACPI NVS)");</div><div class='add'>+		printk(KERN_CONT "ACPI NVS");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case E820_UNUSABLE:</div><div class='del'>-		printk(KERN_CONT "(unusable)");</div><div class='add'>+		printk(KERN_CONT "unusable");</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		printk(KERN_CONT "type %u", type);</div><div class='hunk'>@@ -158,10 +160,10 @@ void __init e820_print_map(char *who)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; e820.nr_map; i++) {</div><div class='del'>-		printk(KERN_INFO " %s: %016Lx - %016Lx ", who,</div><div class='add'>+		printk(KERN_INFO "%s: [mem %#018Lx-%#018Lx] ", who,</div><div class='ctx'> 		       (unsigned long long) e820.map[i].addr,</div><div class='ctx'> 		       (unsigned long long)</div><div class='del'>-		       (e820.map[i].addr + e820.map[i].size));</div><div class='add'>+		       (e820.map[i].addr + e820.map[i].size - 1));</div><div class='ctx'> 		e820_print_type(e820.map[i].type);</div><div class='ctx'> 		printk(KERN_CONT "\n");</div><div class='ctx'> 	}</div><div class='hunk'>@@ -428,9 +430,8 @@ static u64 __init __e820_update_range(struct e820map *e820x, u64 start,</div><div class='ctx'> 		size = ULLONG_MAX - start;</div><div class='ctx'> </div><div class='ctx'> 	end = start + size;</div><div class='del'>-	printk(KERN_DEBUG "e820 update range: %016Lx - %016Lx ",</div><div class='del'>-		       (unsigned long long) start,</div><div class='del'>-		       (unsigned long long) end);</div><div class='add'>+	printk(KERN_DEBUG "e820: update [mem %#010Lx-%#010Lx] ",</div><div class='add'>+	       (unsigned long long) start, (unsigned long long) (end - 1));</div><div class='ctx'> 	e820_print_type(old_type);</div><div class='ctx'> 	printk(KERN_CONT " ==&gt; ");</div><div class='ctx'> 	e820_print_type(new_type);</div><div class='hunk'>@@ -509,9 +510,8 @@ u64 __init e820_remove_range(u64 start, u64 size, unsigned old_type,</div><div class='ctx'> 		size = ULLONG_MAX - start;</div><div class='ctx'> </div><div class='ctx'> 	end = start + size;</div><div class='del'>-	printk(KERN_DEBUG "e820 remove range: %016Lx - %016Lx ",</div><div class='del'>-		       (unsigned long long) start,</div><div class='del'>-		       (unsigned long long) end);</div><div class='add'>+	printk(KERN_DEBUG "e820: remove [mem %#010Lx-%#010Lx] ",</div><div class='add'>+	       (unsigned long long) start, (unsigned long long) (end - 1));</div><div class='ctx'> 	if (checktype)</div><div class='ctx'> 		e820_print_type(old_type);</div><div class='ctx'> 	printk(KERN_CONT "\n");</div><div class='hunk'>@@ -567,7 +567,7 @@ void __init update_e820(void)</div><div class='ctx'> 	if (sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &amp;nr_map))</div><div class='ctx'> 		return;</div><div class='ctx'> 	e820.nr_map = nr_map;</div><div class='del'>-	printk(KERN_INFO "modified physical RAM map:\n");</div><div class='add'>+	printk(KERN_INFO "e820: modified physical RAM map:\n");</div><div class='ctx'> 	e820_print_map("modified");</div><div class='ctx'> }</div><div class='ctx'> static void __init update_e820_saved(void)</div><div class='hunk'>@@ -637,8 +637,8 @@ __init void e820_setup_gap(void)</div><div class='ctx'> 	if (!found) {</div><div class='ctx'> 		gapstart = (max_pfn &lt;&lt; PAGE_SHIFT) + 1024*1024;</div><div class='ctx'> 		printk(KERN_ERR</div><div class='del'>-	"PCI: Warning: Cannot find a gap in the 32bit address range\n"</div><div class='del'>-	"PCI: Unassigned devices with 32bit resource registers may break!\n");</div><div class='add'>+	"e820: cannot find a gap in the 32bit address range\n"</div><div class='add'>+	"e820: PCI devices with unassigned 32bit BARs may break!\n");</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -648,8 +648,8 @@ __init void e820_setup_gap(void)</div><div class='ctx'> 	pci_mem_start = gapstart;</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO</div><div class='del'>-	       "Allocating PCI resources starting at %lx (gap: %lx:%lx)\n",</div><div class='del'>-	       pci_mem_start, gapstart, gapsize);</div><div class='add'>+	       "e820: [mem %#010lx-%#010lx] available for PCI devices\n",</div><div class='add'>+	       gapstart, gapstart + gapsize - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -667,7 +667,7 @@ void __init parse_e820_ext(struct setup_data *sdata)</div><div class='ctx'> 	extmap = (struct e820entry *)(sdata-&gt;data);</div><div class='ctx'> 	__append_e820_map(extmap, entries);</div><div class='ctx'> 	sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &amp;e820.nr_map);</div><div class='del'>-	printk(KERN_INFO "extended physical RAM map:\n");</div><div class='add'>+	printk(KERN_INFO "e820: extended physical RAM map:\n");</div><div class='ctx'> 	e820_print_map("extended");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -734,7 +734,7 @@ u64 __init early_reserve_e820(u64 size, u64 align)</div><div class='ctx'> 	addr = __memblock_alloc_base(size, align, MEMBLOCK_ALLOC_ACCESSIBLE);</div><div class='ctx'> 	if (addr) {</div><div class='ctx'> 		e820_update_range_saved(addr, size, E820_RAM, E820_RESERVED);</div><div class='del'>-		printk(KERN_INFO "update e820_saved for early_reserve_e820\n");</div><div class='add'>+		printk(KERN_INFO "e820: update e820_saved for early_reserve_e820\n");</div><div class='ctx'> 		update_e820_saved();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -784,7 +784,7 @@ static unsigned long __init e820_end_pfn(unsigned long limit_pfn, unsigned type)</div><div class='ctx'> 	if (last_pfn &gt; max_arch_pfn)</div><div class='ctx'> 		last_pfn = max_arch_pfn;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "last_pfn = %#lx max_arch_pfn = %#lx\n",</div><div class='add'>+	printk(KERN_INFO "e820: last_pfn = %#lx max_arch_pfn = %#lx\n",</div><div class='ctx'> 			 last_pfn, max_arch_pfn);</div><div class='ctx'> 	return last_pfn;</div><div class='ctx'> }</div><div class='hunk'>@@ -888,7 +888,7 @@ void __init finish_e820_parsing(void)</div><div class='ctx'> 			early_panic("Invalid user supplied memory map");</div><div class='ctx'> 		e820.nr_map = nr;</div><div class='ctx'> </div><div class='del'>-		printk(KERN_INFO "user-defined physical RAM map:\n");</div><div class='add'>+		printk(KERN_INFO "e820: user-defined physical RAM map:\n");</div><div class='ctx'> 		e820_print_map("user");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -996,8 +996,9 @@ void __init e820_reserve_resources_late(void)</div><div class='ctx'> 			end = MAX_RESOURCE_SIZE;</div><div class='ctx'> 		if (start &gt;= end)</div><div class='ctx'> 			continue;</div><div class='del'>-		printk(KERN_DEBUG "reserve RAM buffer: %016llx - %016llx ",</div><div class='del'>-			       start, end);</div><div class='add'>+		printk(KERN_DEBUG</div><div class='add'>+		       "e820: reserve RAM buffer [mem %#010llx-%#010llx]\n",</div><div class='add'>+		       start, end);</div><div class='ctx'> 		reserve_region_with_split(&amp;iomem_resource, start, end,</div><div class='ctx'> 					  "RAM buffer");</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1047,7 +1048,7 @@ void __init setup_memory_map(void)</div><div class='ctx'> </div><div class='ctx'> 	who = x86_init.resources.memory_setup();</div><div class='ctx'> 	memcpy(&amp;e820_saved, &amp;e820, sizeof(struct e820map));</div><div class='del'>-	printk(KERN_INFO "BIOS-provided physical RAM map:\n");</div><div class='add'>+	printk(KERN_INFO "e820: BIOS-provided physical RAM map:\n");</div><div class='ctx'> 	e820_print_map(who);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S<br/>index 7b784f4ef1e4..623f28837476 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/entry_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/entry_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/entry_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/entry_32.S</a></div><div class='hunk'>@@ -56,6 +56,7 @@</div><div class='ctx'> #include &lt;asm/irq_vectors.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/alternative-asm.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Avoid __ASSEMBLER__'ifying &lt;linux/audit.h&gt; just for this.  */</div><div class='ctx'> #include &lt;linux/elf-em.h&gt;</div><div class='hunk'>@@ -151,10 +152,8 @@</div><div class='ctx'> .pushsection .fixup, "ax"</div><div class='ctx'> 99:	movl $0, (%esp)</div><div class='ctx'> 	jmp 98b</div><div class='del'>-.section __ex_table, "a"</div><div class='del'>-	.align 4</div><div class='del'>-	.long 98b, 99b</div><div class='ctx'> .popsection</div><div class='add'>+	_ASM_EXTABLE(98b,99b)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> .macro PTGS_TO_GS</div><div class='hunk'>@@ -164,10 +163,8 @@</div><div class='ctx'> .pushsection .fixup, "ax"</div><div class='ctx'> 99:	movl $0, PT_GS(%esp)</div><div class='ctx'> 	jmp 98b</div><div class='del'>-.section __ex_table, "a"</div><div class='del'>-	.align 4</div><div class='del'>-	.long 98b, 99b</div><div class='ctx'> .popsection</div><div class='add'>+	_ASM_EXTABLE(98b,99b)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> .macro GS_TO_REG reg</div><div class='hunk'>@@ -249,12 +246,10 @@</div><div class='ctx'> 	jmp 2b</div><div class='ctx'> 6:	movl $0, (%esp)</div><div class='ctx'> 	jmp 3b</div><div class='del'>-.section __ex_table, "a"</div><div class='del'>-	.align 4</div><div class='del'>-	.long 1b, 4b</div><div class='del'>-	.long 2b, 5b</div><div class='del'>-	.long 3b, 6b</div><div class='ctx'> .popsection</div><div class='add'>+	_ASM_EXTABLE(1b,4b)</div><div class='add'>+	_ASM_EXTABLE(2b,5b)</div><div class='add'>+	_ASM_EXTABLE(3b,6b)</div><div class='ctx'> 	POP_GS_EX</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='hunk'>@@ -321,7 +316,6 @@ ret_from_exception:</div><div class='ctx'> 	preempt_stop(CLBR_ANY)</div><div class='ctx'> ret_from_intr:</div><div class='ctx'> 	GET_THREAD_INFO(%ebp)</div><div class='del'>-resume_userspace_sig:</div><div class='ctx'> #ifdef CONFIG_VM86</div><div class='ctx'> 	movl PT_EFLAGS(%esp), %eax	# mix EFLAGS and CS</div><div class='ctx'> 	movb PT_CS(%esp), %al</div><div class='hunk'>@@ -415,10 +409,7 @@ sysenter_past_esp:</div><div class='ctx'> 	jae syscall_fault</div><div class='ctx'> 1:	movl (%ebp),%ebp</div><div class='ctx'> 	movl %ebp,PT_EBP(%esp)</div><div class='del'>-.section __ex_table,"a"</div><div class='del'>-	.align 4</div><div class='del'>-	.long 1b,syscall_fault</div><div class='del'>-.previous</div><div class='add'>+	_ASM_EXTABLE(1b,syscall_fault)</div><div class='ctx'> </div><div class='ctx'> 	GET_THREAD_INFO(%ebp)</div><div class='ctx'> </div><div class='hunk'>@@ -485,10 +476,8 @@ sysexit_audit:</div><div class='ctx'> .pushsection .fixup,"ax"</div><div class='ctx'> 2:	movl $0,PT_FS(%esp)</div><div class='ctx'> 	jmp 1b</div><div class='del'>-.section __ex_table,"a"</div><div class='del'>-	.align 4</div><div class='del'>-	.long 1b,2b</div><div class='ctx'> .popsection</div><div class='add'>+	_ASM_EXTABLE(1b,2b)</div><div class='ctx'> 	PTGS_TO_GS_EX</div><div class='ctx'> ENDPROC(ia32_sysenter_target)</div><div class='ctx'> </div><div class='hunk'>@@ -543,10 +532,7 @@ ENTRY(iret_exc)</div><div class='ctx'> 	pushl $do_iret_error</div><div class='ctx'> 	jmp error_code</div><div class='ctx'> .previous</div><div class='del'>-.section __ex_table,"a"</div><div class='del'>-	.align 4</div><div class='del'>-	.long irq_return,iret_exc</div><div class='del'>-.previous</div><div class='add'>+	_ASM_EXTABLE(irq_return,iret_exc)</div><div class='ctx'> </div><div class='ctx'> 	CFI_RESTORE_STATE</div><div class='ctx'> ldt_ss:</div><div class='hunk'>@@ -628,9 +614,13 @@ work_notifysig:				# deal with pending signals and</div><div class='ctx'> 					# vm86-space</div><div class='ctx'> 	TRACE_IRQS_ON</div><div class='ctx'> 	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='add'>+	movb PT_CS(%esp), %bl</div><div class='add'>+	andb $SEGMENT_RPL_MASK, %bl</div><div class='add'>+	cmpb $USER_RPL, %bl</div><div class='add'>+	jb resume_kernel</div><div class='ctx'> 	xorl %edx, %edx</div><div class='ctx'> 	call do_notify_resume</div><div class='del'>-	jmp resume_userspace_sig</div><div class='add'>+	jmp resume_userspace</div><div class='ctx'> </div><div class='ctx'> 	ALIGN</div><div class='ctx'> work_notifysig_v86:</div><div class='hunk'>@@ -643,9 +633,13 @@ work_notifysig_v86:</div><div class='ctx'> #endif</div><div class='ctx'> 	TRACE_IRQS_ON</div><div class='ctx'> 	ENABLE_INTERRUPTS(CLBR_NONE)</div><div class='add'>+	movb PT_CS(%esp), %bl</div><div class='add'>+	andb $SEGMENT_RPL_MASK, %bl</div><div class='add'>+	cmpb $USER_RPL, %bl</div><div class='add'>+	jb resume_kernel</div><div class='ctx'> 	xorl %edx, %edx</div><div class='ctx'> 	call do_notify_resume</div><div class='del'>-	jmp resume_userspace_sig</div><div class='add'>+	jmp resume_userspace</div><div class='ctx'> END(work_pending)</div><div class='ctx'> </div><div class='ctx'> 	# perform syscall exit tracing</div><div class='hunk'>@@ -901,10 +895,7 @@ END(device_not_available)</div><div class='ctx'> #ifdef CONFIG_PARAVIRT</div><div class='ctx'> ENTRY(native_iret)</div><div class='ctx'> 	iret</div><div class='del'>-.section __ex_table,"a"</div><div class='del'>-	.align 4</div><div class='del'>-	.long native_iret, iret_exc</div><div class='del'>-.previous</div><div class='add'>+	_ASM_EXTABLE(native_iret, iret_exc)</div><div class='ctx'> END(native_iret)</div><div class='ctx'> </div><div class='ctx'> ENTRY(native_irq_enable_sysexit)</div><div class='hunk'>@@ -1093,13 +1084,10 @@ ENTRY(xen_failsafe_callback)</div><div class='ctx'> 	movl %eax,16(%esp)</div><div class='ctx'> 	jmp 4b</div><div class='ctx'> .previous</div><div class='del'>-.section __ex_table,"a"</div><div class='del'>-	.align 4</div><div class='del'>-	.long 1b,6b</div><div class='del'>-	.long 2b,7b</div><div class='del'>-	.long 3b,8b</div><div class='del'>-	.long 4b,9b</div><div class='del'>-.previous</div><div class='add'>+	_ASM_EXTABLE(1b,6b)</div><div class='add'>+	_ASM_EXTABLE(2b,7b)</div><div class='add'>+	_ASM_EXTABLE(3b,8b)</div><div class='add'>+	_ASM_EXTABLE(4b,9b)</div><div class='ctx'> ENDPROC(xen_failsafe_callback)</div><div class='ctx'> </div><div class='ctx'> BUILD_INTERRUPT3(xen_hvm_callback_vector, XEN_HVM_EVTCHN_CALLBACK,</div><div class='head'>diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S<br/>index cdc79b5cfcd9..7d65133b51be 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/entry_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/entry_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/entry_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/entry_64.S</a></div><div class='hunk'>@@ -55,6 +55,7 @@</div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='ctx'> #include &lt;asm/percpu.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Avoid __ASSEMBLER__'ifying &lt;linux/audit.h&gt; just for this.  */</div><div class='hunk'>@@ -190,6 +191,44 @@ ENDPROC(native_usergs_sysret64)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * When dynamic function tracer is enabled it will add a breakpoint</div><div class='add'>+ * to all locations that it is about to modify, sync CPUs, update</div><div class='add'>+ * all the code, sync CPUs, then remove the breakpoints. In this time</div><div class='add'>+ * if lockdep is enabled, it might jump back into the debug handler</div><div class='add'>+ * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).</div><div class='add'>+ *</div><div class='add'>+ * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to</div><div class='add'>+ * make sure the stack pointer does not get reset back to the top</div><div class='add'>+ * of the debug stack, and instead just reuses the current stack.</div><div class='add'>+ */</div><div class='add'>+#if defined(CONFIG_DYNAMIC_FTRACE) &amp;&amp; defined(CONFIG_TRACE_IRQFLAGS)</div><div class='add'>+</div><div class='add'>+.macro TRACE_IRQS_OFF_DEBUG</div><div class='add'>+	call debug_stack_set_zero</div><div class='add'>+	TRACE_IRQS_OFF</div><div class='add'>+	call debug_stack_reset</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro TRACE_IRQS_ON_DEBUG</div><div class='add'>+	call debug_stack_set_zero</div><div class='add'>+	TRACE_IRQS_ON</div><div class='add'>+	call debug_stack_reset</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro TRACE_IRQS_IRETQ_DEBUG offset=ARGOFFSET</div><div class='add'>+	bt   $9,EFLAGS-\offset(%rsp)	/* interrupts off? */</div><div class='add'>+	jnc  1f</div><div class='add'>+	TRACE_IRQS_ON_DEBUG</div><div class='add'>+1:</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+# define TRACE_IRQS_OFF_DEBUG		TRACE_IRQS_OFF</div><div class='add'>+# define TRACE_IRQS_ON_DEBUG		TRACE_IRQS_ON</div><div class='add'>+# define TRACE_IRQS_IRETQ_DEBUG		TRACE_IRQS_IRETQ</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * C code is not supposed to know about undefined top of stack. Every time</div><div class='ctx'>  * a C function with an pt_regs argument is called from the SYSCALL based</div><div class='ctx'>  * fast path FIXUP_TOP_OF_STACK is needed.</div><div class='hunk'>@@ -900,18 +939,12 @@ restore_args:</div><div class='ctx'> </div><div class='ctx'> irq_return:</div><div class='ctx'> 	INTERRUPT_RETURN</div><div class='del'>-</div><div class='del'>-	.section __ex_table, "a"</div><div class='del'>-	.quad irq_return, bad_iret</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(irq_return, bad_iret)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PARAVIRT</div><div class='ctx'> ENTRY(native_iret)</div><div class='ctx'> 	iretq</div><div class='del'>-</div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.quad native_iret, bad_iret</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(native_iret, bad_iret)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	.section .fixup,"ax"</div><div class='hunk'>@@ -1103,7 +1136,7 @@ ENTRY(\sym)</div><div class='ctx'> 	subq $ORIG_RAX-R15, %rsp</div><div class='ctx'> 	CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15</div><div class='ctx'> 	call save_paranoid</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='add'>+	TRACE_IRQS_OFF_DEBUG</div><div class='ctx'> 	movq %rsp,%rdi		/* pt_regs pointer */</div><div class='ctx'> 	xorl %esi,%esi		/* no error code */</div><div class='ctx'> 	subq $EXCEPTION_STKSZ, INIT_TSS_IST(\ist)</div><div class='hunk'>@@ -1181,10 +1214,7 @@ gs_change:</div><div class='ctx'> 	CFI_ENDPROC</div><div class='ctx'> END(native_load_gs_index)</div><div class='ctx'> </div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.align 8</div><div class='del'>-	.quad gs_change,bad_gs</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(gs_change,bad_gs)</div><div class='ctx'> 	.section .fixup,"ax"</div><div class='ctx'> 	/* running with kernelgs */</div><div class='ctx'> bad_gs:</div><div class='hunk'>@@ -1401,7 +1431,7 @@ paranoidzeroentry machine_check *machine_check_vector(%rip)</div><div class='ctx'> ENTRY(paranoid_exit)</div><div class='ctx'> 	DEFAULT_FRAME</div><div class='ctx'> 	DISABLE_INTERRUPTS(CLBR_NONE)</div><div class='del'>-	TRACE_IRQS_OFF</div><div class='add'>+	TRACE_IRQS_OFF_DEBUG</div><div class='ctx'> 	testl %ebx,%ebx				/* swapgs needed? */</div><div class='ctx'> 	jnz paranoid_restore</div><div class='ctx'> 	testl $3,CS(%rsp)</div><div class='hunk'>@@ -1412,7 +1442,7 @@ paranoid_swapgs:</div><div class='ctx'> 	RESTORE_ALL 8</div><div class='ctx'> 	jmp irq_return</div><div class='ctx'> paranoid_restore:</div><div class='del'>-	TRACE_IRQS_IRETQ 0</div><div class='add'>+	TRACE_IRQS_IRETQ_DEBUG 0</div><div class='ctx'> 	RESTORE_ALL 8</div><div class='ctx'> 	jmp irq_return</div><div class='ctx'> paranoid_userspace:</div><div class='head'>diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c<br/>index c9a281f272fd..c3a7cb4bf6e6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/ftrace.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/ftrace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/ftrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/ftrace.c</a></div><div class='hunk'>@@ -24,40 +24,21 @@</div><div class='ctx'> #include &lt;trace/syscall.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/kprobes.h&gt;</div><div class='ctx'> #include &lt;asm/ftrace.h&gt;</div><div class='ctx'> #include &lt;asm/nops.h&gt;</div><div class='del'>-#include &lt;asm/nmi.h&gt;</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DYNAMIC_FTRACE</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * modifying_code is set to notify NMIs that they need to use</div><div class='del'>- * memory barriers when entering or exiting. But we don't want</div><div class='del'>- * to burden NMIs with unnecessary memory barriers when code</div><div class='del'>- * modification is not being done (which is most of the time).</div><div class='del'>- *</div><div class='del'>- * A mutex is already held when ftrace_arch_code_modify_prepare</div><div class='del'>- * and post_process are called. No locks need to be taken here.</div><div class='del'>- *</div><div class='del'>- * Stop machine will make sure currently running NMIs are done</div><div class='del'>- * and new NMIs will see the updated variable before we need</div><div class='del'>- * to worry about NMIs doing memory barriers.</div><div class='del'>- */</div><div class='del'>-static int modifying_code __read_mostly;</div><div class='del'>-static DEFINE_PER_CPU(int, save_modifying_code);</div><div class='del'>-</div><div class='ctx'> int ftrace_arch_code_modify_prepare(void)</div><div class='ctx'> {</div><div class='ctx'> 	set_kernel_text_rw();</div><div class='ctx'> 	set_all_modules_text_rw();</div><div class='del'>-	modifying_code = 1;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ftrace_arch_code_modify_post_process(void)</div><div class='ctx'> {</div><div class='del'>-	modifying_code = 0;</div><div class='ctx'> 	set_all_modules_text_ro();</div><div class='ctx'> 	set_kernel_text_ro();</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -90,134 +71,6 @@ static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)</div><div class='ctx'> 	return calc.code;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Modifying code must take extra care. On an SMP machine, if</div><div class='del'>- * the code being modified is also being executed on another CPU</div><div class='del'>- * that CPU will have undefined results and possibly take a GPF.</div><div class='del'>- * We use kstop_machine to stop other CPUS from exectuing code.</div><div class='del'>- * But this does not stop NMIs from happening. We still need</div><div class='del'>- * to protect against that. We separate out the modification of</div><div class='del'>- * the code to take care of this.</div><div class='del'>- *</div><div class='del'>- * Two buffers are added: An IP buffer and a "code" buffer.</div><div class='del'>- *</div><div class='del'>- * 1) Put the instruction pointer into the IP buffer</div><div class='del'>- *    and the new code into the "code" buffer.</div><div class='del'>- * 2) Wait for any running NMIs to finish and set a flag that says</div><div class='del'>- *    we are modifying code, it is done in an atomic operation.</div><div class='del'>- * 3) Write the code</div><div class='del'>- * 4) clear the flag.</div><div class='del'>- * 5) Wait for any running NMIs to finish.</div><div class='del'>- *</div><div class='del'>- * If an NMI is executed, the first thing it does is to call</div><div class='del'>- * "ftrace_nmi_enter". This will check if the flag is set to write</div><div class='del'>- * and if it is, it will write what is in the IP and "code" buffers.</div><div class='del'>- *</div><div class='del'>- * The trick is, it does not matter if everyone is writing the same</div><div class='del'>- * content to the code location. Also, if a CPU is executing code</div><div class='del'>- * it is OK to write to that code location if the contents being written</div><div class='del'>- * are the same as what exists.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define MOD_CODE_WRITE_FLAG (1 &lt;&lt; 31)	/* set when NMI should do the write */</div><div class='del'>-static atomic_t nmi_running = ATOMIC_INIT(0);</div><div class='del'>-static int mod_code_status;		/* holds return value of text write */</div><div class='del'>-static void *mod_code_ip;		/* holds the IP to write to */</div><div class='del'>-static const void *mod_code_newcode;	/* holds the text to write to the IP */</div><div class='del'>-</div><div class='del'>-static unsigned nmi_wait_count;</div><div class='del'>-static atomic_t nmi_update_count = ATOMIC_INIT(0);</div><div class='del'>-</div><div class='del'>-int ftrace_arch_read_dyn_info(char *buf, int size)</div><div class='del'>-{</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	r = snprintf(buf, size, "%u %u",</div><div class='del'>-		     nmi_wait_count,</div><div class='del'>-		     atomic_read(&amp;nmi_update_count));</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clear_mod_flag(void)</div><div class='del'>-{</div><div class='del'>-	int old = atomic_read(&amp;nmi_running);</div><div class='del'>-</div><div class='del'>-	for (;;) {</div><div class='del'>-		int new = old &amp; ~MOD_CODE_WRITE_FLAG;</div><div class='del'>-</div><div class='del'>-		if (old == new)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		old = atomic_cmpxchg(&amp;nmi_running, old, new);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ftrace_mod_code(void)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Yes, more than one CPU process can be writing to mod_code_status.</div><div class='del'>-	 *    (and the code itself)</div><div class='del'>-	 * But if one were to fail, then they all should, and if one were</div><div class='del'>-	 * to succeed, then they all should.</div><div class='del'>-	 */</div><div class='del'>-	mod_code_status = probe_kernel_write(mod_code_ip, mod_code_newcode,</div><div class='del'>-					     MCOUNT_INSN_SIZE);</div><div class='del'>-</div><div class='del'>-	/* if we fail, then kill any new writers */</div><div class='del'>-	if (mod_code_status)</div><div class='del'>-		clear_mod_flag();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ftrace_nmi_enter(void)</div><div class='del'>-{</div><div class='del'>-	__this_cpu_write(save_modifying_code, modifying_code);</div><div class='del'>-</div><div class='del'>-	if (!__this_cpu_read(save_modifying_code))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (atomic_inc_return(&amp;nmi_running) &amp; MOD_CODE_WRITE_FLAG) {</div><div class='del'>-		smp_rmb();</div><div class='del'>-		ftrace_mod_code();</div><div class='del'>-		atomic_inc(&amp;nmi_update_count);</div><div class='del'>-	}</div><div class='del'>-	/* Must have previous changes seen before executions */</div><div class='del'>-	smp_mb();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ftrace_nmi_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (!__this_cpu_read(save_modifying_code))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Finish all executions before clearing nmi_running */</div><div class='del'>-	smp_mb();</div><div class='del'>-	atomic_dec(&amp;nmi_running);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void wait_for_nmi_and_set_mod_flag(void)</div><div class='del'>-{</div><div class='del'>-	if (!atomic_cmpxchg(&amp;nmi_running, 0, MOD_CODE_WRITE_FLAG))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		cpu_relax();</div><div class='del'>-	} while (atomic_cmpxchg(&amp;nmi_running, 0, MOD_CODE_WRITE_FLAG));</div><div class='del'>-</div><div class='del'>-	nmi_wait_count++;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void wait_for_nmi(void)</div><div class='del'>-{</div><div class='del'>-	if (!atomic_read(&amp;nmi_running))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		cpu_relax();</div><div class='del'>-	} while (atomic_read(&amp;nmi_running));</div><div class='del'>-</div><div class='del'>-	nmi_wait_count++;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline int</div><div class='ctx'> within(unsigned long addr, unsigned long start, unsigned long end)</div><div class='ctx'> {</div><div class='hunk'>@@ -238,26 +91,7 @@ do_ftrace_mod_code(unsigned long ip, const void *new_code)</div><div class='ctx'> 	if (within(ip, (unsigned long)_text, (unsigned long)_etext))</div><div class='ctx'> 		ip = (unsigned long)__va(__pa(ip));</div><div class='ctx'> </div><div class='del'>-	mod_code_ip = (void *)ip;</div><div class='del'>-	mod_code_newcode = new_code;</div><div class='del'>-</div><div class='del'>-	/* The buffers need to be visible before we let NMIs write them */</div><div class='del'>-	smp_mb();</div><div class='del'>-</div><div class='del'>-	wait_for_nmi_and_set_mod_flag();</div><div class='del'>-</div><div class='del'>-	/* Make sure all running NMIs have finished before we write the code */</div><div class='del'>-	smp_mb();</div><div class='del'>-</div><div class='del'>-	ftrace_mod_code();</div><div class='del'>-</div><div class='del'>-	/* Make sure the write happens before clearing the bit */</div><div class='del'>-	smp_mb();</div><div class='del'>-</div><div class='del'>-	clear_mod_flag();</div><div class='del'>-	wait_for_nmi();</div><div class='del'>-</div><div class='del'>-	return mod_code_status;</div><div class='add'>+	return probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const unsigned char *ftrace_nop_replace(void)</div><div class='hunk'>@@ -266,7 +100,7 @@ static const unsigned char *ftrace_nop_replace(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-ftrace_modify_code(unsigned long ip, unsigned const char *old_code,</div><div class='add'>+ftrace_modify_code_direct(unsigned long ip, unsigned const char *old_code,</div><div class='ctx'> 		   unsigned const char *new_code)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char replaced[MCOUNT_INSN_SIZE];</div><div class='hunk'>@@ -307,7 +141,20 @@ int ftrace_make_nop(struct module *mod,</div><div class='ctx'> 	old = ftrace_call_replace(ip, addr);</div><div class='ctx'> 	new = ftrace_nop_replace();</div><div class='ctx'> </div><div class='del'>-	return ftrace_modify_code(rec-&gt;ip, old, new);</div><div class='add'>+	/*</div><div class='add'>+	 * On boot up, and when modules are loaded, the MCOUNT_ADDR</div><div class='add'>+	 * is converted to a nop, and will never become MCOUNT_ADDR</div><div class='add'>+	 * again. This code is either running before SMP (on boot up)</div><div class='add'>+	 * or before the code will ever be executed (module load).</div><div class='add'>+	 * We do not want to use the breakpoint version in this case,</div><div class='add'>+	 * just modify the code directly.</div><div class='add'>+	 */</div><div class='add'>+	if (addr == MCOUNT_ADDR)</div><div class='add'>+		return ftrace_modify_code_direct(rec-&gt;ip, old, new);</div><div class='add'>+</div><div class='add'>+	/* Normal cases use add_brk_on_nop */</div><div class='add'>+	WARN_ONCE(1, "invalid use of ftrace_make_nop");</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)</div><div class='hunk'>@@ -318,9 +165,47 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)</div><div class='ctx'> 	old = ftrace_nop_replace();</div><div class='ctx'> 	new = ftrace_call_replace(ip, addr);</div><div class='ctx'> </div><div class='del'>-	return ftrace_modify_code(rec-&gt;ip, old, new);</div><div class='add'>+	/* Should only be called when module is loaded */</div><div class='add'>+	return ftrace_modify_code_direct(rec-&gt;ip, old, new);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * The modifying_ftrace_code is used to tell the breakpoint</div><div class='add'>+ * handler to call ftrace_int3_handler(). If it fails to</div><div class='add'>+ * call this handler for a breakpoint added by ftrace, then</div><div class='add'>+ * the kernel may crash.</div><div class='add'>+ *</div><div class='add'>+ * As atomic_writes on x86 do not need a barrier, we do not</div><div class='add'>+ * need to add smp_mb()s for this to work. It is also considered</div><div class='add'>+ * that we can not read the modifying_ftrace_code before</div><div class='add'>+ * executing the breakpoint. That would be quite remarkable if</div><div class='add'>+ * it could do that. Here's the flow that is required:</div><div class='add'>+ *</div><div class='add'>+ *   CPU-0                          CPU-1</div><div class='add'>+ *</div><div class='add'>+ * atomic_inc(mfc);</div><div class='add'>+ * write int3s</div><div class='add'>+ *				&lt;trap-int3&gt; // implicit (r)mb</div><div class='add'>+ *				if (atomic_read(mfc))</div><div class='add'>+ *					call ftrace_int3_handler()</div><div class='add'>+ *</div><div class='add'>+ * Then when we are finished:</div><div class='add'>+ *</div><div class='add'>+ * atomic_dec(mfc);</div><div class='add'>+ *</div><div class='add'>+ * If we hit a breakpoint that was not set by ftrace, it does not</div><div class='add'>+ * matter if ftrace_int3_handler() is called or not. It will</div><div class='add'>+ * simply be ignored. But it is crucial that a ftrace nop/caller</div><div class='add'>+ * breakpoint is handled. No other user should ever place a</div><div class='add'>+ * breakpoint on an ftrace nop/caller location. It must only</div><div class='add'>+ * be done by this code.</div><div class='add'>+ */</div><div class='add'>+atomic_t modifying_ftrace_code __read_mostly;</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ftrace_modify_code(unsigned long ip, unsigned const char *old_code,</div><div class='add'>+		   unsigned const char *new_code);</div><div class='add'>+</div><div class='ctx'> int ftrace_update_ftrace_func(ftrace_func_t func)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ip = (unsigned long)(&amp;ftrace_call);</div><div class='hunk'>@@ -329,9 +214,376 @@ int ftrace_update_ftrace_func(ftrace_func_t func)</div><div class='ctx'> </div><div class='ctx'> 	memcpy(old, &amp;ftrace_call, MCOUNT_INSN_SIZE);</div><div class='ctx'> 	new = ftrace_call_replace(ip, (unsigned long)func);</div><div class='add'>+</div><div class='add'>+	/* See comment above by declaration of modifying_ftrace_code */</div><div class='add'>+	atomic_inc(&amp;modifying_ftrace_code);</div><div class='add'>+</div><div class='ctx'> 	ret = ftrace_modify_code(ip, old, new);</div><div class='ctx'> </div><div class='add'>+	atomic_dec(&amp;modifying_ftrace_code);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * A breakpoint was added to the code address we are about to</div><div class='add'>+ * modify, and this is the handle that will just skip over it.</div><div class='add'>+ * We are either changing a nop into a trace call, or a trace</div><div class='add'>+ * call to a nop. While the change is taking place, we treat</div><div class='add'>+ * it just like it was a nop.</div><div class='add'>+ */</div><div class='add'>+int ftrace_int3_handler(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON_ONCE(!regs))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!ftrace_location(regs-&gt;ip - 1))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	regs-&gt;ip += MCOUNT_INSN_SIZE - 1;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ftrace_write(unsigned long ip, const char *val, int size)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * On x86_64, kernel text mappings are mapped read-only with</div><div class='add'>+	 * CONFIG_DEBUG_RODATA. So we use the kernel identity mapping instead</div><div class='add'>+	 * of the kernel text mapping to modify the kernel text.</div><div class='add'>+	 *</div><div class='add'>+	 * For 32bit kernels, these mappings are same and we can use</div><div class='add'>+	 * kernel identity mapping to modify code.</div><div class='add'>+	 */</div><div class='add'>+	if (within(ip, (unsigned long)_text, (unsigned long)_etext))</div><div class='add'>+		ip = (unsigned long)__va(__pa(ip));</div><div class='add'>+</div><div class='add'>+	return probe_kernel_write((void *)ip, val, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int add_break(unsigned long ip, const char *old)</div><div class='add'>+{</div><div class='add'>+	unsigned char replaced[MCOUNT_INSN_SIZE];</div><div class='add'>+	unsigned char brk = BREAKPOINT_INSTRUCTION;</div><div class='add'>+</div><div class='add'>+	if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/* Make sure it is what we expect it to be */</div><div class='add'>+	if (memcmp(replaced, old, MCOUNT_INSN_SIZE) != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (ftrace_write(ip, &amp;brk, 1))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int add_brk_on_call(struct dyn_ftrace *rec, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	unsigned const char *old;</div><div class='add'>+	unsigned long ip = rec-&gt;ip;</div><div class='add'>+</div><div class='add'>+	old = ftrace_call_replace(ip, addr);</div><div class='add'>+</div><div class='add'>+	return add_break(rec-&gt;ip, old);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int add_brk_on_nop(struct dyn_ftrace *rec)</div><div class='add'>+{</div><div class='add'>+	unsigned const char *old;</div><div class='add'>+</div><div class='add'>+	old = ftrace_nop_replace();</div><div class='add'>+</div><div class='add'>+	return add_break(rec-&gt;ip, old);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int add_breakpoints(struct dyn_ftrace *rec, int enable)</div><div class='add'>+{</div><div class='add'>+	unsigned long ftrace_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ftrace_test_record(rec, enable);</div><div class='add'>+</div><div class='add'>+	ftrace_addr = (unsigned long)FTRACE_ADDR;</div><div class='add'>+</div><div class='add'>+	switch (ret) {</div><div class='add'>+	case FTRACE_UPDATE_IGNORE:</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case FTRACE_UPDATE_MAKE_CALL:</div><div class='add'>+		/* converting nop to call */</div><div class='add'>+		return add_brk_on_nop(rec);</div><div class='add'>+</div><div class='add'>+	case FTRACE_UPDATE_MAKE_NOP:</div><div class='add'>+		/* converting a call to a nop */</div><div class='add'>+		return add_brk_on_call(rec, ftrace_addr);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * On error, we need to remove breakpoints. This needs to</div><div class='add'>+ * be done caefully. If the address does not currently have a</div><div class='add'>+ * breakpoint, we know we are done. Otherwise, we look at the</div><div class='add'>+ * remaining 4 bytes of the instruction. If it matches a nop</div><div class='add'>+ * we replace the breakpoint with the nop. Otherwise we replace</div><div class='add'>+ * it with the call instruction.</div><div class='add'>+ */</div><div class='add'>+static int remove_breakpoint(struct dyn_ftrace *rec)</div><div class='add'>+{</div><div class='add'>+	unsigned char ins[MCOUNT_INSN_SIZE];</div><div class='add'>+	unsigned char brk = BREAKPOINT_INSTRUCTION;</div><div class='add'>+	const unsigned char *nop;</div><div class='add'>+	unsigned long ftrace_addr;</div><div class='add'>+	unsigned long ip = rec-&gt;ip;</div><div class='add'>+</div><div class='add'>+	/* If we fail the read, just give up */</div><div class='add'>+	if (probe_kernel_read(ins, (void *)ip, MCOUNT_INSN_SIZE))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/* If this does not have a breakpoint, we are done */</div><div class='add'>+	if (ins[0] != brk)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	nop = ftrace_nop_replace();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the last 4 bytes of the instruction do not match</div><div class='add'>+	 * a nop, then we assume that this is a call to ftrace_addr.</div><div class='add'>+	 */</div><div class='add'>+	if (memcmp(&amp;ins[1], &amp;nop[1], MCOUNT_INSN_SIZE - 1) != 0) {</div><div class='add'>+		/*</div><div class='add'>+		 * For extra paranoidism, we check if the breakpoint is on</div><div class='add'>+		 * a call that would actually jump to the ftrace_addr.</div><div class='add'>+		 * If not, don't touch the breakpoint, we make just create</div><div class='add'>+		 * a disaster.</div><div class='add'>+		 */</div><div class='add'>+		ftrace_addr = (unsigned long)FTRACE_ADDR;</div><div class='add'>+		nop = ftrace_call_replace(ip, ftrace_addr);</div><div class='add'>+</div><div class='add'>+		if (memcmp(&amp;ins[1], &amp;nop[1], MCOUNT_INSN_SIZE - 1) != 0)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return probe_kernel_write((void *)ip, &amp;nop[0], 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int add_update_code(unsigned long ip, unsigned const char *new)</div><div class='add'>+{</div><div class='add'>+	/* skip breakpoint */</div><div class='add'>+	ip++;</div><div class='add'>+	new++;</div><div class='add'>+	if (ftrace_write(ip, new, MCOUNT_INSN_SIZE - 1))</div><div class='add'>+		return -EPERM;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int add_update_call(struct dyn_ftrace *rec, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long ip = rec-&gt;ip;</div><div class='add'>+	unsigned const char *new;</div><div class='add'>+</div><div class='add'>+	new = ftrace_call_replace(ip, addr);</div><div class='add'>+	return add_update_code(ip, new);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int add_update_nop(struct dyn_ftrace *rec)</div><div class='add'>+{</div><div class='add'>+	unsigned long ip = rec-&gt;ip;</div><div class='add'>+	unsigned const char *new;</div><div class='add'>+</div><div class='add'>+	new = ftrace_nop_replace();</div><div class='add'>+	return add_update_code(ip, new);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int add_update(struct dyn_ftrace *rec, int enable)</div><div class='add'>+{</div><div class='add'>+	unsigned long ftrace_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ftrace_test_record(rec, enable);</div><div class='add'>+</div><div class='add'>+	ftrace_addr = (unsigned long)FTRACE_ADDR;</div><div class='add'>+</div><div class='add'>+	switch (ret) {</div><div class='add'>+	case FTRACE_UPDATE_IGNORE:</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case FTRACE_UPDATE_MAKE_CALL:</div><div class='add'>+		/* converting nop to call */</div><div class='add'>+		return add_update_call(rec, ftrace_addr);</div><div class='add'>+</div><div class='add'>+	case FTRACE_UPDATE_MAKE_NOP:</div><div class='add'>+		/* converting a call to a nop */</div><div class='add'>+		return add_update_nop(rec);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int finish_update_call(struct dyn_ftrace *rec, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long ip = rec-&gt;ip;</div><div class='add'>+	unsigned const char *new;</div><div class='add'>+</div><div class='add'>+	new = ftrace_call_replace(ip, addr);</div><div class='add'>+</div><div class='add'>+	if (ftrace_write(ip, new, 1))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int finish_update_nop(struct dyn_ftrace *rec)</div><div class='add'>+{</div><div class='add'>+	unsigned long ip = rec-&gt;ip;</div><div class='add'>+	unsigned const char *new;</div><div class='add'>+</div><div class='add'>+	new = ftrace_nop_replace();</div><div class='add'>+</div><div class='add'>+	if (ftrace_write(ip, new, 1))</div><div class='add'>+		return -EPERM;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int finish_update(struct dyn_ftrace *rec, int enable)</div><div class='add'>+{</div><div class='add'>+	unsigned long ftrace_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ftrace_update_record(rec, enable);</div><div class='add'>+</div><div class='add'>+	ftrace_addr = (unsigned long)FTRACE_ADDR;</div><div class='add'>+</div><div class='add'>+	switch (ret) {</div><div class='add'>+	case FTRACE_UPDATE_IGNORE:</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case FTRACE_UPDATE_MAKE_CALL:</div><div class='add'>+		/* converting nop to call */</div><div class='add'>+		return finish_update_call(rec, ftrace_addr);</div><div class='add'>+</div><div class='add'>+	case FTRACE_UPDATE_MAKE_NOP:</div><div class='add'>+		/* converting a call to a nop */</div><div class='add'>+		return finish_update_nop(rec);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void do_sync_core(void *data)</div><div class='add'>+{</div><div class='add'>+	sync_core();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void run_sync(void)</div><div class='add'>+{</div><div class='add'>+	int enable_irqs = irqs_disabled();</div><div class='add'>+</div><div class='add'>+	/* We may be called with interrupts disbled (on bootup). */</div><div class='add'>+	if (enable_irqs)</div><div class='add'>+		local_irq_enable();</div><div class='add'>+	on_each_cpu(do_sync_core, NULL, 1);</div><div class='add'>+	if (enable_irqs)</div><div class='add'>+		local_irq_disable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ftrace_replace_code(int enable)</div><div class='add'>+{</div><div class='add'>+	struct ftrace_rec_iter *iter;</div><div class='add'>+	struct dyn_ftrace *rec;</div><div class='add'>+	const char *report = "adding breakpoints";</div><div class='add'>+	int count = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	for_ftrace_rec_iter(iter) {</div><div class='add'>+		rec = ftrace_rec_iter_record(iter);</div><div class='add'>+</div><div class='add'>+		ret = add_breakpoints(rec, enable);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto remove_breakpoints;</div><div class='add'>+		count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	run_sync();</div><div class='add'>+</div><div class='add'>+	report = "updating code";</div><div class='add'>+</div><div class='add'>+	for_ftrace_rec_iter(iter) {</div><div class='add'>+		rec = ftrace_rec_iter_record(iter);</div><div class='add'>+</div><div class='add'>+		ret = add_update(rec, enable);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto remove_breakpoints;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	run_sync();</div><div class='add'>+</div><div class='add'>+	report = "removing breakpoints";</div><div class='add'>+</div><div class='add'>+	for_ftrace_rec_iter(iter) {</div><div class='add'>+		rec = ftrace_rec_iter_record(iter);</div><div class='add'>+</div><div class='add'>+		ret = finish_update(rec, enable);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto remove_breakpoints;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	run_sync();</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+ remove_breakpoints:</div><div class='add'>+	ftrace_bug(ret, rec ? rec-&gt;ip : 0);</div><div class='add'>+	printk(KERN_WARNING "Failed on %s (%d):\n", report, count);</div><div class='add'>+	for_ftrace_rec_iter(iter) {</div><div class='add'>+		rec = ftrace_rec_iter_record(iter);</div><div class='add'>+		remove_breakpoint(rec);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ftrace_modify_code(unsigned long ip, unsigned const char *old_code,</div><div class='add'>+		   unsigned const char *new_code)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = add_break(ip, old_code);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	run_sync();</div><div class='add'>+</div><div class='add'>+	ret = add_update_code(ip, new_code);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto fail_update;</div><div class='add'>+</div><div class='add'>+	run_sync();</div><div class='add'>+</div><div class='add'>+	ret = ftrace_write(ip, new_code, 1);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ret = -EPERM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	run_sync();</div><div class='add'>+ out:</div><div class='ctx'> 	return ret;</div><div class='add'>+</div><div class='add'>+ fail_update:</div><div class='add'>+	probe_kernel_write((void *)ip, &amp;old_code[0], 1);</div><div class='add'>+	goto out;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void arch_ftrace_update_code(int command)</div><div class='add'>+{</div><div class='add'>+	/* See comment above by declaration of modifying_ftrace_code */</div><div class='add'>+	atomic_inc(&amp;modifying_ftrace_code);</div><div class='add'>+</div><div class='add'>+	ftrace_modify_all_code(command);</div><div class='add'>+</div><div class='add'>+	atomic_dec(&amp;modifying_ftrace_code);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __init ftrace_dyn_arch_init(void *data)</div><div class='head'>diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c<br/>index 51ff18616d50..c18f59d10101 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/head32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/head32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/head32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/head32.c</a></div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/e820.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/trampoline.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/io_apic.h&gt;</div><div class='ctx'> #include &lt;asm/bios_ebda.h&gt;</div><div class='head'>diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c<br/>index 3a3b779f41d3..037df57a99ac 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/head64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/head64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/head64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/head64.c</a></div><div class='hunk'>@@ -24,7 +24,6 @@</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='ctx'> #include &lt;asm/kdebug.h&gt;</div><div class='ctx'> #include &lt;asm/e820.h&gt;</div><div class='del'>-#include &lt;asm/trampoline.h&gt;</div><div class='ctx'> #include &lt;asm/bios_ebda.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void __init zap_identity_mappings(void)</div><div class='head'>diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S<br/>index ce0be7cd085e..d42ab17b7397 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/head_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/head_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/head_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/head_32.S</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;asm/msr-index.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/percpu.h&gt;</div><div class='add'>+#include &lt;asm/nops.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Physical address */</div><div class='ctx'> #define pa(X) ((X) - __PAGE_OFFSET)</div><div class='hunk'>@@ -273,10 +274,7 @@ num_subarch_entries = (. - subarch_entries) / 4</div><div class='ctx'>  * If cpu hotplug is not supported then this code can go in init section</div><div class='ctx'>  * which will be freed later</div><div class='ctx'>  */</div><div class='del'>-</div><div class='ctx'> __CPUINIT</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='ctx'> ENTRY(startup_32_smp)</div><div class='ctx'> 	cld</div><div class='ctx'> 	movl $(__BOOT_DS),%eax</div><div class='hunk'>@@ -287,7 +285,7 @@ ENTRY(startup_32_smp)</div><div class='ctx'> 	movl pa(stack_start),%ecx</div><div class='ctx'> 	movl %eax,%ss</div><div class='ctx'> 	leal -__PAGE_OFFSET(%ecx),%esp</div><div class='del'>-#endif /* CONFIG_SMP */</div><div class='add'>+</div><div class='ctx'> default_entry:</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -363,28 +361,23 @@ default_entry:</div><div class='ctx'> 	pushl $0</div><div class='ctx'> 	popfl</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	cmpb $0, ready</div><div class='del'>-	jnz checkCPUtype</div><div class='del'>-#endif /* CONFIG_SMP */</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * start system 32-bit setup. We need to re-do some of the things done</div><div class='ctx'>  * in 16-bit mode for the "real" operations.</div><div class='ctx'>  */</div><div class='del'>-	call setup_idt</div><div class='del'>-</div><div class='del'>-checkCPUtype:</div><div class='del'>-</div><div class='del'>-	movl $-1,X86_CPUID		#  -1 for no CPUID initially</div><div class='del'>-</div><div class='add'>+	movl setup_once_ref,%eax</div><div class='add'>+	andl %eax,%eax</div><div class='add'>+	jz 1f				# Did we do this already?</div><div class='add'>+	call *%eax</div><div class='add'>+1:</div><div class='add'>+	</div><div class='ctx'> /* check if it is 486 or 386. */</div><div class='ctx'> /*</div><div class='ctx'>  * XXX - this does a lot of unnecessary setup.  Alignment checks don't</div><div class='ctx'>  * apply at our cpl of 0 and the stack ought to be aligned already, and</div><div class='ctx'>  * we don't need to preserve eflags.</div><div class='ctx'>  */</div><div class='del'>-</div><div class='add'>+	movl $-1,X86_CPUID	# -1 for no CPUID initially</div><div class='ctx'> 	movb $3,X86		# at least 386</div><div class='ctx'> 	pushfl			# push EFLAGS</div><div class='ctx'> 	popl %eax		# get EFLAGS</div><div class='hunk'>@@ -450,21 +443,6 @@ is386:	movl $2,%ecx		# set MP</div><div class='ctx'> 	movl $(__KERNEL_PERCPU), %eax</div><div class='ctx'> 	movl %eax,%fs			# set this cpu's percpu</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CC_STACKPROTECTOR</div><div class='del'>-	/*</div><div class='del'>-	 * The linker can't handle this by relocation.  Manually set</div><div class='del'>-	 * base address in stack canary segment descriptor.</div><div class='del'>-	 */</div><div class='del'>-	cmpb $0,ready</div><div class='del'>-	jne 1f</div><div class='del'>-	movl $gdt_page,%eax</div><div class='del'>-	movl $stack_canary,%ecx</div><div class='del'>-	movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)</div><div class='del'>-	shrl $16, %ecx</div><div class='del'>-	movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)</div><div class='del'>-	movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)</div><div class='del'>-1:</div><div class='del'>-#endif</div><div class='ctx'> 	movl $(__KERNEL_STACK_CANARY),%eax</div><div class='ctx'> 	movl %eax,%gs</div><div class='ctx'> </div><div class='hunk'>@@ -473,7 +451,6 @@ is386:	movl $2,%ecx		# set MP</div><div class='ctx'> </div><div class='ctx'> 	cld			# gcc2 wants the direction flag cleared at all times</div><div class='ctx'> 	pushl $0		# fake return address for unwinder</div><div class='del'>-	movb $1, ready</div><div class='ctx'> 	jmp *(initial_code)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -495,81 +472,122 @@ check_x87:</div><div class='ctx'> 	.byte 0xDB,0xE4		/* fsetpm for 287, ignored by 387 */</div><div class='ctx'> 	ret</div><div class='ctx'> </div><div class='add'>+	</div><div class='add'>+#include "verify_cpu.S"</div><div class='add'>+</div><div class='ctx'> /*</div><div class='del'>- *  setup_idt</div><div class='add'>+ *  setup_once</div><div class='ctx'>  *</div><div class='del'>- *  sets up a idt with 256 entries pointing to</div><div class='del'>- *  ignore_int, interrupt gates. It doesn't actually load</div><div class='del'>- *  idt - that can be done only after paging has been enabled</div><div class='del'>- *  and the kernel moved to PAGE_OFFSET. Interrupts</div><div class='del'>- *  are enabled elsewhere, when we can be relatively</div><div class='del'>- *  sure everything is ok.</div><div class='add'>+ *  The setup work we only want to run on the BSP.</div><div class='ctx'>  *</div><div class='ctx'>  *  Warning: %esi is live across this function.</div><div class='ctx'>  */</div><div class='del'>-setup_idt:</div><div class='del'>-	lea ignore_int,%edx</div><div class='del'>-	movl $(__KERNEL_CS &lt;&lt; 16),%eax</div><div class='del'>-	movw %dx,%ax		/* selector = 0x0010 = cs */</div><div class='del'>-	movw $0x8E00,%dx	/* interrupt gate - dpl=0, present */</div><div class='add'>+__INIT</div><div class='add'>+setup_once:</div><div class='add'>+	/*</div><div class='add'>+	 * Set up a idt with 256 entries pointing to ignore_int,</div><div class='add'>+	 * interrupt gates. It doesn't actually load idt - that needs</div><div class='add'>+	 * to be done on each CPU. Interrupts are enabled elsewhere,</div><div class='add'>+	 * when we can be relatively sure everything is ok.</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='del'>-	lea idt_table,%edi</div><div class='del'>-	mov $256,%ecx</div><div class='del'>-rp_sidt:</div><div class='add'>+	movl $idt_table,%edi</div><div class='add'>+	movl $early_idt_handlers,%eax</div><div class='add'>+	movl $NUM_EXCEPTION_VECTORS,%ecx</div><div class='add'>+1:</div><div class='ctx'> 	movl %eax,(%edi)</div><div class='del'>-	movl %edx,4(%edi)</div><div class='add'>+	movl %eax,4(%edi)</div><div class='add'>+	/* interrupt gate, dpl=0, present */</div><div class='add'>+	movl $(0x8E000000 + __KERNEL_CS),2(%edi)</div><div class='add'>+	addl $9,%eax</div><div class='ctx'> 	addl $8,%edi</div><div class='del'>-	dec %ecx</div><div class='del'>-	jne rp_sidt</div><div class='add'>+	loop 1b</div><div class='ctx'> </div><div class='del'>-.macro	set_early_handler handler,trapno</div><div class='del'>-	lea \handler,%edx</div><div class='add'>+	movl $256 - NUM_EXCEPTION_VECTORS,%ecx</div><div class='add'>+	movl $ignore_int,%edx</div><div class='ctx'> 	movl $(__KERNEL_CS &lt;&lt; 16),%eax</div><div class='del'>-	movw %dx,%ax</div><div class='add'>+	movw %dx,%ax		/* selector = 0x0010 = cs */</div><div class='ctx'> 	movw $0x8E00,%dx	/* interrupt gate - dpl=0, present */</div><div class='del'>-	lea idt_table,%edi</div><div class='del'>-	movl %eax,8*\trapno(%edi)</div><div class='del'>-	movl %edx,8*\trapno+4(%edi)</div><div class='del'>-.endm</div><div class='add'>+2:</div><div class='add'>+	movl %eax,(%edi)</div><div class='add'>+	movl %edx,4(%edi)</div><div class='add'>+	addl $8,%edi</div><div class='add'>+	loop 2b</div><div class='ctx'> </div><div class='del'>-	set_early_handler handler=early_divide_err,trapno=0</div><div class='del'>-	set_early_handler handler=early_illegal_opcode,trapno=6</div><div class='del'>-	set_early_handler handler=early_protection_fault,trapno=13</div><div class='del'>-	set_early_handler handler=early_page_fault,trapno=14</div><div class='add'>+#ifdef CONFIG_CC_STACKPROTECTOR</div><div class='add'>+	/*</div><div class='add'>+	 * Configure the stack canary. The linker can't handle this by</div><div class='add'>+	 * relocation.  Manually set base address in stack canary</div><div class='add'>+	 * segment descriptor.</div><div class='add'>+	 */</div><div class='add'>+	movl $gdt_page,%eax</div><div class='add'>+	movl $stack_canary,%ecx</div><div class='add'>+	movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)</div><div class='add'>+	shrl $16, %ecx</div><div class='add'>+	movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)</div><div class='add'>+	movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='add'>+	andl $0,setup_once_ref	/* Once is enough, thanks */</div><div class='ctx'> 	ret</div><div class='ctx'> </div><div class='del'>-early_divide_err:</div><div class='del'>-	xor %edx,%edx</div><div class='del'>-	pushl $0	/* fake errcode */</div><div class='del'>-	jmp early_fault</div><div class='add'>+ENTRY(early_idt_handlers)</div><div class='add'>+	# 36(%esp) %eflags</div><div class='add'>+	# 32(%esp) %cs</div><div class='add'>+	# 28(%esp) %eip</div><div class='add'>+	# 24(%rsp) error code</div><div class='add'>+	i = 0</div><div class='add'>+	.rept NUM_EXCEPTION_VECTORS</div><div class='add'>+	.if (EXCEPTION_ERRCODE_MASK &gt;&gt; i) &amp; 1</div><div class='add'>+	ASM_NOP2</div><div class='add'>+	.else</div><div class='add'>+	pushl $0		# Dummy error code, to make stack frame uniform</div><div class='add'>+	.endif</div><div class='add'>+	pushl $i		# 20(%esp) Vector number</div><div class='add'>+	jmp early_idt_handler</div><div class='add'>+	i = i + 1</div><div class='add'>+	.endr</div><div class='add'>+ENDPROC(early_idt_handlers)</div><div class='add'>+	</div><div class='add'>+	/* This is global to keep gas from relaxing the jumps */</div><div class='add'>+ENTRY(early_idt_handler)</div><div class='add'>+	cld</div><div class='add'>+	cmpl $2,%ss:early_recursion_flag</div><div class='add'>+	je hlt_loop</div><div class='add'>+	incl %ss:early_recursion_flag</div><div class='ctx'> </div><div class='del'>-early_illegal_opcode:</div><div class='del'>-	movl $6,%edx</div><div class='del'>-	pushl $0	/* fake errcode */</div><div class='del'>-	jmp early_fault</div><div class='add'>+	push %eax		# 16(%esp)</div><div class='add'>+	push %ecx		# 12(%esp)</div><div class='add'>+	push %edx		#  8(%esp)</div><div class='add'>+	push %ds		#  4(%esp)</div><div class='add'>+	push %es		#  0(%esp)</div><div class='add'>+	movl $(__KERNEL_DS),%eax</div><div class='add'>+	movl %eax,%ds</div><div class='add'>+	movl %eax,%es</div><div class='ctx'> </div><div class='del'>-early_protection_fault:</div><div class='del'>-	movl $13,%edx</div><div class='del'>-	jmp early_fault</div><div class='add'>+	cmpl $(__KERNEL_CS),32(%esp)</div><div class='add'>+	jne 10f</div><div class='ctx'> </div><div class='del'>-early_page_fault:</div><div class='del'>-	movl $14,%edx</div><div class='del'>-	jmp early_fault</div><div class='add'>+	leal 28(%esp),%eax	# Pointer to %eip</div><div class='add'>+	call early_fixup_exception</div><div class='add'>+	andl %eax,%eax</div><div class='add'>+	jnz ex_entry		/* found an exception entry */</div><div class='ctx'> </div><div class='del'>-early_fault:</div><div class='del'>-	cld</div><div class='add'>+10:</div><div class='ctx'> #ifdef CONFIG_PRINTK</div><div class='del'>-	pusha</div><div class='del'>-	movl $(__KERNEL_DS),%eax</div><div class='del'>-	movl %eax,%ds</div><div class='del'>-	movl %eax,%es</div><div class='del'>-	cmpl $2,early_recursion_flag</div><div class='del'>-	je hlt_loop</div><div class='del'>-	incl early_recursion_flag</div><div class='add'>+	xorl %eax,%eax</div><div class='add'>+	movw %ax,2(%esp)	/* clean up the segment values on some cpus */</div><div class='add'>+	movw %ax,6(%esp)</div><div class='add'>+	movw %ax,34(%esp)</div><div class='add'>+	leal  40(%esp),%eax</div><div class='add'>+	pushl %eax		/* %esp before the exception */</div><div class='add'>+	pushl %ebx</div><div class='add'>+	pushl %ebp</div><div class='add'>+	pushl %esi</div><div class='add'>+	pushl %edi</div><div class='ctx'> 	movl %cr2,%eax</div><div class='ctx'> 	pushl %eax</div><div class='del'>-	pushl %edx		/* trapno */</div><div class='add'>+	pushl (20+6*4)(%esp)	/* trapno */</div><div class='ctx'> 	pushl $fault_msg</div><div class='ctx'> 	call printk</div><div class='ctx'> #endif</div><div class='hunk'>@@ -578,6 +596,17 @@ hlt_loop:</div><div class='ctx'> 	hlt</div><div class='ctx'> 	jmp hlt_loop</div><div class='ctx'> </div><div class='add'>+ex_entry:</div><div class='add'>+	pop %es</div><div class='add'>+	pop %ds</div><div class='add'>+	pop %edx</div><div class='add'>+	pop %ecx</div><div class='add'>+	pop %eax</div><div class='add'>+	addl $8,%esp		/* drop vector number and error code */</div><div class='add'>+	decl %ss:early_recursion_flag</div><div class='add'>+	iret</div><div class='add'>+ENDPROC(early_idt_handler)</div><div class='add'>+</div><div class='ctx'> /* This is the default interrupt "handler" :-) */</div><div class='ctx'> 	ALIGN</div><div class='ctx'> ignore_int:</div><div class='hunk'>@@ -611,13 +640,18 @@ ignore_int:</div><div class='ctx'> 	popl %eax</div><div class='ctx'> #endif</div><div class='ctx'> 	iret</div><div class='add'>+ENDPROC(ignore_int)</div><div class='add'>+__INITDATA</div><div class='add'>+	.align 4</div><div class='add'>+early_recursion_flag:</div><div class='add'>+	.long 0</div><div class='ctx'> </div><div class='del'>-#include "verify_cpu.S"</div><div class='del'>-</div><div class='del'>-	__REFDATA</div><div class='del'>-.align 4</div><div class='add'>+__REFDATA</div><div class='add'>+	.align 4</div><div class='ctx'> ENTRY(initial_code)</div><div class='ctx'> 	.long i386_start_kernel</div><div class='add'>+ENTRY(setup_once_ref)</div><div class='add'>+	.long setup_once</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * BSS section</div><div class='hunk'>@@ -670,22 +704,19 @@ ENTRY(initial_page_table)</div><div class='ctx'> ENTRY(stack_start)</div><div class='ctx'> 	.long init_thread_union+THREAD_SIZE</div><div class='ctx'> </div><div class='del'>-early_recursion_flag:</div><div class='del'>-	.long 0</div><div class='del'>-</div><div class='del'>-ready:	.byte 0</div><div class='del'>-</div><div class='add'>+__INITRODATA</div><div class='ctx'> int_msg:</div><div class='ctx'> 	.asciz "Unknown interrupt or fault at: %p %p %p\n"</div><div class='ctx'> </div><div class='ctx'> fault_msg:</div><div class='ctx'> /* fault info: */</div><div class='ctx'> 	.ascii "BUG: Int %d: CR2 %p\n"</div><div class='del'>-/* pusha regs: */</div><div class='del'>-	.ascii "     EDI %p  ESI %p  EBP %p  ESP %p\n"</div><div class='del'>-	.ascii "     EBX %p  EDX %p  ECX %p  EAX %p\n"</div><div class='add'>+/* regs pushed in early_idt_handler: */</div><div class='add'>+	.ascii "     EDI %p  ESI %p  EBP %p  EBX %p\n"</div><div class='add'>+	.ascii "     ESP %p   ES %p   DS %p\n"</div><div class='add'>+	.ascii "     EDX %p  ECX %p  EAX %p\n"</div><div class='ctx'> /* fault frame: */</div><div class='del'>-	.ascii "     err %p  EIP %p   CS %p  flg %p\n"</div><div class='add'>+	.ascii "     vec %p  err %p  EIP %p   CS %p  flg %p\n"</div><div class='ctx'> 	.ascii "Stack: %p %p %p %p %p %p %p %p\n"</div><div class='ctx'> 	.ascii "       %p %p %p %p %p %p %p %p\n"</div><div class='ctx'> 	.asciz "       %p %p %p %p %p %p %p %p\n"</div><div class='hunk'>@@ -699,6 +730,7 @@ fault_msg:</div><div class='ctx'>  * segment size, and 32-bit linear address value:</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+	.data</div><div class='ctx'> .globl boot_gdt_descr</div><div class='ctx'> .globl idt_descr</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S<br/>index 40f4eb3766d1..94bf9cc2c7ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/head_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/head_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/head_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/head_64.S</a></div><div class='hunk'>@@ -19,12 +19,15 @@</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> #include &lt;asm/processor-flags.h&gt;</div><div class='ctx'> #include &lt;asm/percpu.h&gt;</div><div class='add'>+#include &lt;asm/nops.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PARAVIRT</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='add'>+#define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg</div><div class='ctx'> #else</div><div class='del'>-#define GET_CR2_INTO_RCX movq %cr2, %rcx</div><div class='add'>+#define GET_CR2_INTO(reg) movq %cr2, reg</div><div class='add'>+#define INTERRUPT_RETURN iretq</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* we are not able to switch in one step to the final KERNEL ADDRESS SPACE</div><div class='hunk'>@@ -136,10 +139,6 @@ ident_complete:</div><div class='ctx'> 	/* Fixup phys_base */</div><div class='ctx'> 	addq	%rbp, phys_base(%rip)</div><div class='ctx'> </div><div class='del'>-	/* Fixup trampoline */</div><div class='del'>-	addq	%rbp, trampoline_level4_pgt + 0(%rip)</div><div class='del'>-	addq	%rbp, trampoline_level4_pgt + (511*8)(%rip)</div><div class='del'>-</div><div class='ctx'> 	/* Due to ENTRY(), sometimes the empty space gets filled with</div><div class='ctx'> 	 * zeros. Better take a jmp than relying on empty space being</div><div class='ctx'> 	 * filled with 0x90 (nop)</div><div class='hunk'>@@ -270,36 +269,56 @@ bad_address:</div><div class='ctx'> 	jmp bad_address</div><div class='ctx'> </div><div class='ctx'> 	.section ".init.text","ax"</div><div class='del'>-#ifdef CONFIG_EARLY_PRINTK</div><div class='ctx'> 	.globl early_idt_handlers</div><div class='ctx'> early_idt_handlers:</div><div class='add'>+	# 104(%rsp) %rflags</div><div class='add'>+	#  96(%rsp) %cs</div><div class='add'>+	#  88(%rsp) %rip</div><div class='add'>+	#  80(%rsp) error code</div><div class='ctx'> 	i = 0</div><div class='ctx'> 	.rept NUM_EXCEPTION_VECTORS</div><div class='del'>-	movl $i, %esi</div><div class='add'>+	.if (EXCEPTION_ERRCODE_MASK &gt;&gt; i) &amp; 1</div><div class='add'>+	ASM_NOP2</div><div class='add'>+	.else</div><div class='add'>+	pushq $0		# Dummy error code, to make stack frame uniform</div><div class='add'>+	.endif</div><div class='add'>+	pushq $i		# 72(%rsp) Vector number</div><div class='ctx'> 	jmp early_idt_handler</div><div class='ctx'> 	i = i + 1</div><div class='ctx'> 	.endr</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> ENTRY(early_idt_handler)</div><div class='del'>-#ifdef CONFIG_EARLY_PRINTK</div><div class='add'>+	cld</div><div class='add'>+</div><div class='ctx'> 	cmpl $2,early_recursion_flag(%rip)</div><div class='ctx'> 	jz  1f</div><div class='ctx'> 	incl early_recursion_flag(%rip)</div><div class='del'>-	GET_CR2_INTO_RCX</div><div class='del'>-	movq %rcx,%r9</div><div class='del'>-	xorl %r8d,%r8d		# zero for error code</div><div class='del'>-	movl %esi,%ecx		# get vector number</div><div class='del'>-	# Test %ecx against mask of vectors that push error code.</div><div class='del'>-	cmpl $31,%ecx</div><div class='del'>-	ja 0f</div><div class='del'>-	movl $1,%eax</div><div class='del'>-	salq %cl,%rax</div><div class='del'>-	testl $0x27d00,%eax</div><div class='del'>-	je 0f</div><div class='del'>-	popq %r8		# get error code</div><div class='del'>-0:	movq 0(%rsp),%rcx	# get ip</div><div class='del'>-	movq 8(%rsp),%rdx	# get cs</div><div class='add'>+</div><div class='add'>+	pushq %rax		# 64(%rsp)</div><div class='add'>+	pushq %rcx		# 56(%rsp)</div><div class='add'>+	pushq %rdx		# 48(%rsp)</div><div class='add'>+	pushq %rsi		# 40(%rsp)</div><div class='add'>+	pushq %rdi		# 32(%rsp)</div><div class='add'>+	pushq %r8		# 24(%rsp)</div><div class='add'>+	pushq %r9		# 16(%rsp)</div><div class='add'>+	pushq %r10		#  8(%rsp)</div><div class='add'>+	pushq %r11		#  0(%rsp)</div><div class='add'>+</div><div class='add'>+	cmpl $__KERNEL_CS,96(%rsp)</div><div class='add'>+	jne 10f</div><div class='add'>+</div><div class='add'>+	leaq 88(%rsp),%rdi	# Pointer to %rip</div><div class='add'>+	call early_fixup_exception</div><div class='add'>+	andl %eax,%eax</div><div class='add'>+	jnz 20f			# Found an exception entry</div><div class='add'>+</div><div class='add'>+10:</div><div class='add'>+#ifdef CONFIG_EARLY_PRINTK</div><div class='add'>+	GET_CR2_INTO(%r9)	# can clobber any volatile register if pv</div><div class='add'>+	movl 80(%rsp),%r8d	# error code</div><div class='add'>+	movl 72(%rsp),%esi	# vector number</div><div class='add'>+	movl 96(%rsp),%edx	# %cs</div><div class='add'>+	movq 88(%rsp),%rcx	# %rip</div><div class='ctx'> 	xorl %eax,%eax</div><div class='ctx'> 	leaq early_idt_msg(%rip),%rdi</div><div class='ctx'> 	call early_printk</div><div class='hunk'>@@ -308,17 +327,32 @@ ENTRY(early_idt_handler)</div><div class='ctx'> 	call dump_stack</div><div class='ctx'> #ifdef CONFIG_KALLSYMS	</div><div class='ctx'> 	leaq early_idt_ripmsg(%rip),%rdi</div><div class='del'>-	movq 0(%rsp),%rsi	# get rip again</div><div class='add'>+	movq 40(%rsp),%rsi	# %rip again</div><div class='ctx'> 	call __print_symbol</div><div class='ctx'> #endif</div><div class='ctx'> #endif /* EARLY_PRINTK */</div><div class='ctx'> 1:	hlt</div><div class='ctx'> 	jmp 1b</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_EARLY_PRINTK</div><div class='add'>+20:	# Exception table entry found</div><div class='add'>+	popq %r11</div><div class='add'>+	popq %r10</div><div class='add'>+	popq %r9</div><div class='add'>+	popq %r8</div><div class='add'>+	popq %rdi</div><div class='add'>+	popq %rsi</div><div class='add'>+	popq %rdx</div><div class='add'>+	popq %rcx</div><div class='add'>+	popq %rax</div><div class='add'>+	addq $16,%rsp		# drop vector number and error code</div><div class='add'>+	decl early_recursion_flag(%rip)</div><div class='add'>+	INTERRUPT_RETURN</div><div class='add'>+</div><div class='add'>+	.balign 4</div><div class='ctx'> early_recursion_flag:</div><div class='ctx'> 	.long 0</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_EARLY_PRINTK</div><div class='ctx'> early_idt_msg:</div><div class='ctx'> 	.asciz "PANIC: early exception %02lx rip %lx:%lx error %lx cr2 %lx\n"</div><div class='ctx'> early_idt_ripmsg:</div><div class='head'>diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c<br/>index ad0de0c2714e..1460a5df92f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/hpet.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/hpet.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/hpet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/hpet.c</a></div><div class='hunk'>@@ -94,13 +94,18 @@ static int hpet_verbose;</div><div class='ctx'> </div><div class='ctx'> static int __init hpet_setup(char *str)</div><div class='ctx'> {</div><div class='del'>-	if (str) {</div><div class='add'>+	while (str) {</div><div class='add'>+		char *next = strchr(str, ',');</div><div class='add'>+</div><div class='add'>+		if (next)</div><div class='add'>+			*next++ = 0;</div><div class='ctx'> 		if (!strncmp("disable", str, 7))</div><div class='ctx'> 			boot_hpet_disable = 1;</div><div class='ctx'> 		if (!strncmp("force", str, 5))</div><div class='ctx'> 			hpet_force_user = 1;</div><div class='ctx'> 		if (!strncmp("verbose", str, 7))</div><div class='ctx'> 			hpet_verbose = 1;</div><div class='add'>+		str = next;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -319,8 +324,6 @@ static void hpet_set_mode(enum clock_event_mode mode,</div><div class='ctx'> 		now = hpet_readl(HPET_COUNTER);</div><div class='ctx'> 		cmp = now + (unsigned int) delta;</div><div class='ctx'> 		cfg = hpet_readl(HPET_Tn_CFG(timer));</div><div class='del'>-		/* Make sure we use edge triggered interrupts */</div><div class='del'>-		cfg &amp;= ~HPET_TN_LEVEL;</div><div class='ctx'> 		cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |</div><div class='ctx'> 		       HPET_TN_SETVAL | HPET_TN_32BIT;</div><div class='ctx'> 		hpet_writel(cfg, HPET_Tn_CFG(timer));</div><div class='hunk'>@@ -787,15 +790,16 @@ static int hpet_clocksource_register(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 *hpet_boot_cfg;</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * hpet_enable - Try to setup the HPET timer. Returns 1 on success.</div><div class='ctx'>  */</div><div class='ctx'> int __init hpet_enable(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned long hpet_period;</div><div class='del'>-	unsigned int id;</div><div class='add'>+	u32 hpet_period, cfg, id;</div><div class='ctx'> 	u64 freq;</div><div class='del'>-	int i;</div><div class='add'>+	unsigned int i, last;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_hpet_capable())</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -847,15 +851,45 @@ int __init hpet_enable(void)</div><div class='ctx'> 	id = hpet_readl(HPET_ID);</div><div class='ctx'> 	hpet_print_config();</div><div class='ctx'> </div><div class='add'>+	last = (id &amp; HPET_ID_NUMBER) &gt;&gt; HPET_ID_NUMBER_SHIFT;</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_HPET_EMULATE_RTC</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The legacy routing mode needs at least two channels, tick timer</div><div class='ctx'> 	 * and the rtc emulation channel.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!(id &amp; HPET_ID_NUMBER))</div><div class='add'>+	if (!last)</div><div class='ctx'> 		goto out_nohpet;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+	cfg = hpet_readl(HPET_CFG);</div><div class='add'>+	hpet_boot_cfg = kmalloc((last + 2) * sizeof(*hpet_boot_cfg),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (hpet_boot_cfg)</div><div class='add'>+		*hpet_boot_cfg = cfg;</div><div class='add'>+	else</div><div class='add'>+		pr_warn("HPET initial state will not be saved\n");</div><div class='add'>+	cfg &amp;= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);</div><div class='add'>+	hpet_writel(cfg, HPET_CFG);</div><div class='add'>+	if (cfg)</div><div class='add'>+		pr_warn("HPET: Unrecognized bits %#x set in global cfg\n",</div><div class='add'>+			cfg);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt;= last; ++i) {</div><div class='add'>+		cfg = hpet_readl(HPET_Tn_CFG(i));</div><div class='add'>+		if (hpet_boot_cfg)</div><div class='add'>+			hpet_boot_cfg[i + 1] = cfg;</div><div class='add'>+		cfg &amp;= ~(HPET_TN_ENABLE | HPET_TN_LEVEL | HPET_TN_FSB);</div><div class='add'>+		hpet_writel(cfg, HPET_Tn_CFG(i));</div><div class='add'>+		cfg &amp;= ~(HPET_TN_PERIODIC | HPET_TN_PERIODIC_CAP</div><div class='add'>+			 | HPET_TN_64BIT_CAP | HPET_TN_32BIT | HPET_TN_ROUTE</div><div class='add'>+			 | HPET_TN_FSB | HPET_TN_FSB_CAP);</div><div class='add'>+		if (cfg)</div><div class='add'>+			pr_warn("HPET: Unrecognized bits %#x set in cfg#%u\n",</div><div class='add'>+				cfg, i);</div><div class='add'>+	}</div><div class='add'>+	hpet_print_config();</div><div class='add'>+</div><div class='ctx'> 	if (hpet_clocksource_register())</div><div class='ctx'> 		goto out_nohpet;</div><div class='ctx'> </div><div class='hunk'>@@ -923,14 +957,28 @@ fs_initcall(hpet_late_init);</div><div class='ctx'> void hpet_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (is_hpet_capable() &amp;&amp; hpet_virt_address) {</div><div class='del'>-		unsigned int cfg = hpet_readl(HPET_CFG);</div><div class='add'>+		unsigned int cfg = hpet_readl(HPET_CFG), id, last;</div><div class='ctx'> </div><div class='del'>-		if (hpet_legacy_int_enabled) {</div><div class='add'>+		if (hpet_boot_cfg)</div><div class='add'>+			cfg = *hpet_boot_cfg;</div><div class='add'>+		else if (hpet_legacy_int_enabled) {</div><div class='ctx'> 			cfg &amp;= ~HPET_CFG_LEGACY;</div><div class='ctx'> 			hpet_legacy_int_enabled = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		cfg &amp;= ~HPET_CFG_ENABLE;</div><div class='ctx'> 		hpet_writel(cfg, HPET_CFG);</div><div class='add'>+</div><div class='add'>+		if (!hpet_boot_cfg)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		id = hpet_readl(HPET_ID);</div><div class='add'>+		last = ((id &amp; HPET_ID_NUMBER) &gt;&gt; HPET_ID_NUMBER_SHIFT);</div><div class='add'>+</div><div class='add'>+		for (id = 0; id &lt;= last; ++id)</div><div class='add'>+			hpet_writel(hpet_boot_cfg[id + 1], HPET_Tn_CFG(id));</div><div class='add'>+</div><div class='add'>+		if (*hpet_boot_cfg &amp; HPET_CFG_ENABLE)</div><div class='add'>+			hpet_writel(*hpet_boot_cfg, HPET_CFG);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c<br/>index 2d6e6498c176..f250431fb505 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/i387.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/i387.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/i387.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/i387.c</a></div><div class='hunk'>@@ -88,7 +88,7 @@ void kernel_fpu_begin(void)</div><div class='ctx'> 		__thread_clear_has_fpu(me);</div><div class='ctx'> 		/* We do 'stts()' in kernel_fpu_end() */</div><div class='ctx'> 	} else {</div><div class='del'>-		percpu_write(fpu_owner_task, NULL);</div><div class='add'>+		this_cpu_write(fpu_owner_task, NULL);</div><div class='ctx'> 		clts();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/init_task.c b/arch/x86/kernel/init_task.c<br/>deleted file mode 100644<br/>index 43e9ccf44947..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-#include &lt;asm/desc.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial thread structure.</div><div class='del'>- *</div><div class='del'>- * We need to make sure that this is THREAD_SIZE aligned due to the</div><div class='del'>- * way process stacks are handled. This is done by having a special</div><div class='del'>- * "init_task" linker map entry..</div><div class='del'>- */</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial task structure.</div><div class='del'>- *</div><div class='del'>- * All other task structs will be allocated on slabs in fork.c</div><div class='del'>- */</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * per-CPU TSS segments. Threads are completely 'soft' on Linux,</div><div class='del'>- * no more per-task TSS's. The TSS size is kept cacheline-aligned</div><div class='del'>- * so they are allowed to end up in the .data..cacheline_aligned</div><div class='del'>- * section. Since TSS's are completely CPU-local, we want them</div><div class='del'>- * on exact cacheline boundaries, to eliminate cacheline ping-pong.</div><div class='del'>- */</div><div class='del'>-DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, init_tss) = INIT_TSS;</div><div class='del'>-</div><div class='head'>diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c<br/>index 58b7f27cb3e9..344faf8d0d62 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/irq_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/irq_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/irq_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/irq_32.c</a></div><div class='hunk'>@@ -127,8 +127,8 @@ void __cpuinit irq_ctx_init(int cpu)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	irqctx = page_address(alloc_pages_node(cpu_to_node(cpu),</div><div class='del'>-					       THREAD_FLAGS,</div><div class='del'>-					       THREAD_ORDER));</div><div class='add'>+					       THREADINFO_GFP,</div><div class='add'>+					       THREAD_SIZE_ORDER));</div><div class='ctx'> 	memset(&amp;irqctx-&gt;tinfo, 0, sizeof(struct thread_info));</div><div class='ctx'> 	irqctx-&gt;tinfo.cpu		= cpu;</div><div class='ctx'> 	irqctx-&gt;tinfo.preempt_count	= HARDIRQ_OFFSET;</div><div class='hunk'>@@ -137,8 +137,8 @@ void __cpuinit irq_ctx_init(int cpu)</div><div class='ctx'> 	per_cpu(hardirq_ctx, cpu) = irqctx;</div><div class='ctx'> </div><div class='ctx'> 	irqctx = page_address(alloc_pages_node(cpu_to_node(cpu),</div><div class='del'>-					       THREAD_FLAGS,</div><div class='del'>-					       THREAD_ORDER));</div><div class='add'>+					       THREADINFO_GFP,</div><div class='add'>+					       THREAD_SIZE_ORDER));</div><div class='ctx'> 	memset(&amp;irqctx-&gt;tinfo, 0, sizeof(struct thread_info));</div><div class='ctx'> 	irqctx-&gt;tinfo.cpu		= cpu;</div><div class='ctx'> 	irqctx-&gt;tinfo.addr_limit	= MAKE_MM_SEG(0);</div><div class='head'>diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c<br/>index e213fc8408d2..e2f751efb7b1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/kprobes.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/kprobes.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/kprobes.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/kprobes.c</a></div><div class='hunk'>@@ -1037,9 +1037,9 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)</div><div class='ctx'> 			       "current sp %p does not match saved sp %p\n",</div><div class='ctx'> 			       stack_addr(regs), kcb-&gt;jprobe_saved_sp);</div><div class='ctx'> 			printk(KERN_ERR "Saved registers for jprobe %p\n", jp);</div><div class='del'>-			show_registers(saved_regs);</div><div class='add'>+			show_regs(saved_regs);</div><div class='ctx'> 			printk(KERN_ERR "Current registers\n");</div><div class='del'>-			show_registers(regs);</div><div class='add'>+			show_regs(regs);</div><div class='ctx'> 			BUG();</div><div class='ctx'> 		}</div><div class='ctx'> 		*regs = kcb-&gt;jprobe_saved_regs;</div><div class='head'>diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c<br/>index b8ba6e4a27e4..e554e5ad2fe8 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/kvm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/kvm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/kvm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/kvm.c</a></div><div class='hunk'>@@ -79,7 +79,6 @@ struct kvm_task_sleep_node {</div><div class='ctx'> 	u32 token;</div><div class='ctx'> 	int cpu;</div><div class='ctx'> 	bool halted;</div><div class='del'>-	struct mm_struct *mm;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct kvm_task_sleep_head {</div><div class='hunk'>@@ -126,9 +125,7 @@ void kvm_async_pf_task_wait(u32 token)</div><div class='ctx'> </div><div class='ctx'> 	n.token = token;</div><div class='ctx'> 	n.cpu = smp_processor_id();</div><div class='del'>-	n.mm = current-&gt;active_mm;</div><div class='ctx'> 	n.halted = idle || preempt_count() &gt; 1;</div><div class='del'>-	atomic_inc(&amp;n.mm-&gt;mm_count);</div><div class='ctx'> 	init_waitqueue_head(&amp;n.wq);</div><div class='ctx'> 	hlist_add_head(&amp;n.link, &amp;b-&gt;list);</div><div class='ctx'> 	spin_unlock(&amp;b-&gt;lock);</div><div class='hunk'>@@ -161,9 +158,6 @@ EXPORT_SYMBOL_GPL(kvm_async_pf_task_wait);</div><div class='ctx'> static void apf_task_wake_one(struct kvm_task_sleep_node *n)</div><div class='ctx'> {</div><div class='ctx'> 	hlist_del_init(&amp;n-&gt;link);</div><div class='del'>-	if (!n-&gt;mm)</div><div class='del'>-		return;</div><div class='del'>-	mmdrop(n-&gt;mm);</div><div class='ctx'> 	if (n-&gt;halted)</div><div class='ctx'> 		smp_send_reschedule(n-&gt;cpu);</div><div class='ctx'> 	else if (waitqueue_active(&amp;n-&gt;wq))</div><div class='hunk'>@@ -207,7 +201,7 @@ again:</div><div class='ctx'> 		 * async PF was not yet handled.</div><div class='ctx'> 		 * Add dummy entry for the token.</div><div class='ctx'> 		 */</div><div class='del'>-		n = kmalloc(sizeof(*n), GFP_ATOMIC);</div><div class='add'>+		n = kzalloc(sizeof(*n), GFP_ATOMIC);</div><div class='ctx'> 		if (!n) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Allocation failed! Busy wait while other cpu</div><div class='hunk'>@@ -219,7 +213,6 @@ again:</div><div class='ctx'> 		}</div><div class='ctx'> 		n-&gt;token = token;</div><div class='ctx'> 		n-&gt;cpu = smp_processor_id();</div><div class='del'>-		n-&gt;mm = NULL;</div><div class='ctx'> 		init_waitqueue_head(&amp;n-&gt;wq);</div><div class='ctx'> 		hlist_add_head(&amp;n-&gt;link, &amp;b-&gt;list);</div><div class='ctx'> 	} else</div><div class='head'>diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c<br/>index f8492da65bfc..086eb58c6e80 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/kvmclock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/kvmclock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/kvmclock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/kvmclock.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='add'>+#include &lt;linux/hardirq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/x86_init.h&gt;</div><div class='ctx'> #include &lt;asm/reboot.h&gt;</div><div class='hunk'>@@ -114,6 +115,25 @@ static void kvm_get_preset_lpj(void)</div><div class='ctx'> 	preset_lpj = lpj;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool kvm_check_and_clear_guest_paused(void)</div><div class='add'>+{</div><div class='add'>+	bool ret = false;</div><div class='add'>+	struct pvclock_vcpu_time_info *src;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * per_cpu() is safe here because this function is only called from</div><div class='add'>+	 * timer functions where preemption is already disabled.</div><div class='add'>+	 */</div><div class='add'>+	WARN_ON(!in_atomic());</div><div class='add'>+	src = &amp;__get_cpu_var(hv_clock);</div><div class='add'>+	if ((src-&gt;flags &amp; PVCLOCK_GUEST_STOPPED) != 0) {</div><div class='add'>+		__this_cpu_and(hv_clock.flags, ~PVCLOCK_GUEST_STOPPED);</div><div class='add'>+		ret = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct clocksource kvm_clock = {</div><div class='ctx'> 	.name = "kvm-clock",</div><div class='ctx'> 	.read = kvm_clock_get_cycles,</div><div class='head'>diff --git a/arch/x86/kernel/mca_32.c b/arch/x86/kernel/mca_32.c<br/>deleted file mode 100644<br/>index 7eb1e2b97827..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/mca_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/mca_32.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,476 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  Written by Martin Kolinek, February 1996</div><div class='del'>- *</div><div class='del'>- * Changes:</div><div class='del'>- *</div><div class='del'>- *	Chris Beauregard July 28th, 1996</div><div class='del'>- *	- Fixed up integrated SCSI detection</div><div class='del'>- *</div><div class='del'>- *	Chris Beauregard August 3rd, 1996</div><div class='del'>- *	- Made mca_info local</div><div class='del'>- *	- Made integrated registers accessible through standard function calls</div><div class='del'>- *	- Added name field</div><div class='del'>- *	- More sanity checking</div><div class='del'>- *</div><div class='del'>- *	Chris Beauregard August 9th, 1996</div><div class='del'>- *	- Rewrote /proc/mca</div><div class='del'>- *</div><div class='del'>- *	Chris Beauregard January 7th, 1997</div><div class='del'>- *	- Added basic NMI-processing</div><div class='del'>- *	- Added more information to mca_info structure</div><div class='del'>- *</div><div class='del'>- *	David Weinehall October 12th, 1998</div><div class='del'>- *	- Made a lot of cleaning up in the source</div><div class='del'>- *	- Added use of save_flags / restore_flags</div><div class='del'>- *	- Added the 'driver_loaded' flag in MCA_adapter</div><div class='del'>- *	- Added an alternative implemention of ZP Gu's mca_find_unused_adapter</div><div class='del'>- *</div><div class='del'>- *	David Weinehall March 24th, 1999</div><div class='del'>- *	- Fixed the output of 'Driver Installed' in /proc/mca/pos</div><div class='del'>- *	- Made the Integrated Video &amp; SCSI show up even if they have id 0000</div><div class='del'>- *</div><div class='del'>- *	Alexander Viro November 9th, 1999</div><div class='del'>- *	- Switched to regular procfs methods</div><div class='del'>- *</div><div class='del'>- *	Alfred Arnold &amp; David Weinehall August 23rd, 2000</div><div class='del'>- *	- Added support for Planar POS-registers</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-#include &lt;linux/kprobes.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;linux/proc_fs.h&gt;</div><div class='del'>-#include &lt;linux/mman.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/pagemap.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-static unsigned char which_scsi;</div><div class='del'>-</div><div class='del'>-int MCA_bus;</div><div class='del'>-EXPORT_SYMBOL(MCA_bus);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Motherboard register spinlock. Untested on SMP at the moment, but</div><div class='del'>- * are there any MCA SMP boxes?</div><div class='del'>- *</div><div class='del'>- * Yes - Alan</div><div class='del'>- */</div><div class='del'>-static DEFINE_SPINLOCK(mca_lock);</div><div class='del'>-</div><div class='del'>-/* Build the status info for the adapter */</div><div class='del'>-</div><div class='del'>-static void mca_configure_adapter_status(struct mca_device *mca_dev)</div><div class='del'>-{</div><div class='del'>-	mca_dev-&gt;status = MCA_ADAPTER_NONE;</div><div class='del'>-</div><div class='del'>-	mca_dev-&gt;pos_id = mca_dev-&gt;pos[0]</div><div class='del'>-		+ (mca_dev-&gt;pos[1] &lt;&lt; 8);</div><div class='del'>-</div><div class='del'>-	if (!mca_dev-&gt;pos_id &amp;&amp; mca_dev-&gt;slot &lt; MCA_MAX_SLOT_NR) {</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * id = 0x0000 usually indicates hardware failure,</div><div class='del'>-		 * however, ZP Gu (zpg@castle.net&gt; reports that his 9556</div><div class='del'>-		 * has 0x0000 as id and everything still works. There</div><div class='del'>-		 * also seem to be an adapter with id = 0x0000; the</div><div class='del'>-		 * NCR Parallel Bus Memory Card. Until this is confirmed,</div><div class='del'>-		 * however, this code will stay.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		mca_dev-&gt;status = MCA_ADAPTER_ERROR;</div><div class='del'>-</div><div class='del'>-		return;</div><div class='del'>-	} else if (mca_dev-&gt;pos_id != 0xffff) {</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * 0xffff usually indicates that there's no adapter,</div><div class='del'>-		 * however, some integrated adapters may have 0xffff as</div><div class='del'>-		 * their id and still be valid. Examples are on-board</div><div class='del'>-		 * VGA of the 55sx, the integrated SCSI of the 56 &amp; 57,</div><div class='del'>-		 * and possibly also the 95 ULTIMEDIA.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		mca_dev-&gt;status = MCA_ADAPTER_NORMAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((mca_dev-&gt;pos_id == 0xffff ||</div><div class='del'>-	    mca_dev-&gt;pos_id == 0x0000) &amp;&amp; mca_dev-&gt;slot &gt;= MCA_MAX_SLOT_NR) {</div><div class='del'>-		int j;</div><div class='del'>-</div><div class='del'>-		for (j = 2; j &lt; 8; j++) {</div><div class='del'>-			if (mca_dev-&gt;pos[j] != 0xff) {</div><div class='del'>-				mca_dev-&gt;status = MCA_ADAPTER_NORMAL;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!(mca_dev-&gt;pos[2] &amp; MCA_ENABLED)) {</div><div class='del'>-</div><div class='del'>-		/* enabled bit is in POS 2 */</div><div class='del'>-</div><div class='del'>-		mca_dev-&gt;status = MCA_ADAPTER_DISABLED;</div><div class='del'>-	}</div><div class='del'>-} /* mca_configure_adapter_status */</div><div class='del'>-</div><div class='del'>-/*--------------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-static struct resource mca_standard_resources[] = {</div><div class='del'>-	{ .start = 0x60, .end = 0x60, .name = "system control port B (MCA)" },</div><div class='del'>-	{ .start = 0x90, .end = 0x90, .name = "arbitration (MCA)" },</div><div class='del'>-	{ .start = 0x91, .end = 0x91, .name = "card Select Feedback (MCA)" },</div><div class='del'>-	{ .start = 0x92, .end = 0x92, .name = "system Control port A (MCA)" },</div><div class='del'>-	{ .start = 0x94, .end = 0x94, .name = "system board setup (MCA)" },</div><div class='del'>-	{ .start = 0x96, .end = 0x97, .name = "POS (MCA)" },</div><div class='del'>-	{ .start = 0x100, .end = 0x107, .name = "POS (MCA)" }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define MCA_STANDARD_RESOURCES	ARRAY_SIZE(mca_standard_resources)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	mca_read_and_store_pos - read the POS registers into a memory buffer</div><div class='del'>- *      @pos: a char pointer to 8 bytes, contains the POS register value on</div><div class='del'>- *            successful return</div><div class='del'>- *</div><div class='del'>- *	Returns 1 if a card actually exists (i.e. the pos isn't</div><div class='del'>- *	all 0xff) or 0 otherwise</div><div class='del'>- */</div><div class='del'>-static int mca_read_and_store_pos(unsigned char *pos)</div><div class='del'>-{</div><div class='del'>-	int j;</div><div class='del'>-	int found = 0;</div><div class='del'>-</div><div class='del'>-	for (j = 0; j &lt; 8; j++) {</div><div class='del'>-		pos[j] = inb_p(MCA_POS_REG(j));</div><div class='del'>-		if (pos[j] != 0xff) {</div><div class='del'>-			/* 0xff all across means no device. 0x00 means</div><div class='del'>-			 * something's broken, but a device is</div><div class='del'>-			 * probably there.  However, if you get 0x00</div><div class='del'>-			 * from a motherboard register it won't matter</div><div class='del'>-			 * what we find.  For the record, on the</div><div class='del'>-			 * 57SLC, the integrated SCSI adapter has</div><div class='del'>-			 * 0xffff for the adapter ID, but nonzero for</div><div class='del'>-			 * other registers.  */</div><div class='del'>-</div><div class='del'>-			found = 1;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return found;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned char mca_pc_read_pos(struct mca_device *mca_dev, int reg)</div><div class='del'>-{</div><div class='del'>-	unsigned char byte;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (reg &lt; 0 || reg &gt;= 8)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mca_lock, flags);</div><div class='del'>-	if (mca_dev-&gt;pos_register) {</div><div class='del'>-		/* Disable adapter setup, enable motherboard setup */</div><div class='del'>-</div><div class='del'>-		outb_p(0, MCA_ADAPTER_SETUP_REG);</div><div class='del'>-		outb_p(mca_dev-&gt;pos_register, MCA_MOTHERBOARD_SETUP_REG);</div><div class='del'>-</div><div class='del'>-		byte = inb_p(MCA_POS_REG(reg));</div><div class='del'>-		outb_p(0xff, MCA_MOTHERBOARD_SETUP_REG);</div><div class='del'>-	} else {</div><div class='del'>-</div><div class='del'>-		/* Make sure motherboard setup is off */</div><div class='del'>-</div><div class='del'>-		outb_p(0xff, MCA_MOTHERBOARD_SETUP_REG);</div><div class='del'>-</div><div class='del'>-		/* Read the appropriate register */</div><div class='del'>-</div><div class='del'>-		outb_p(0x8|(mca_dev-&gt;slot &amp; 0xf), MCA_ADAPTER_SETUP_REG);</div><div class='del'>-		byte = inb_p(MCA_POS_REG(reg));</div><div class='del'>-		outb_p(0, MCA_ADAPTER_SETUP_REG);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;mca_lock, flags);</div><div class='del'>-</div><div class='del'>-	mca_dev-&gt;pos[reg] = byte;</div><div class='del'>-</div><div class='del'>-	return byte;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mca_pc_write_pos(struct mca_device *mca_dev, int reg,</div><div class='del'>-			     unsigned char byte)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (reg &lt; 0 || reg &gt;= 8)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mca_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* Make sure motherboard setup is off */</div><div class='del'>-</div><div class='del'>-	outb_p(0xff, MCA_MOTHERBOARD_SETUP_REG);</div><div class='del'>-</div><div class='del'>-	/* Read in the appropriate register */</div><div class='del'>-</div><div class='del'>-	outb_p(0x8|(mca_dev-&gt;slot&amp;0xf), MCA_ADAPTER_SETUP_REG);</div><div class='del'>-	outb_p(byte, MCA_POS_REG(reg));</div><div class='del'>-	outb_p(0, MCA_ADAPTER_SETUP_REG);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;mca_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* Update the global register list, while we have the byte */</div><div class='del'>-</div><div class='del'>-	mca_dev-&gt;pos[reg] = byte;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* for the primary MCA bus, we have identity transforms */</div><div class='del'>-static int mca_dummy_transform_irq(struct mca_device *mca_dev, int irq)</div><div class='del'>-{</div><div class='del'>-	return irq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mca_dummy_transform_ioport(struct mca_device *mca_dev, int port)</div><div class='del'>-{</div><div class='del'>-	return port;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void *mca_dummy_transform_memory(struct mca_device *mca_dev, void *mem)</div><div class='del'>-{</div><div class='del'>-	return mem;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __init mca_init(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int i, j;</div><div class='del'>-	struct mca_device *mca_dev;</div><div class='del'>-	unsigned char pos[8];</div><div class='del'>-	short mca_builtin_scsi_ports[] = {0xf7, 0xfd, 0x00};</div><div class='del'>-	struct mca_bus *bus;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * WARNING: Be careful when making changes here. Putting an adapter</div><div class='del'>-	 * and the motherboard simultaneously into setup mode may result in</div><div class='del'>-	 * damage to chips (according to The Indispensable PC Hardware Book</div><div class='del'>-	 * by Hans-Peter Messmer). Also, we disable system interrupts (so</div><div class='del'>-	 * that we are not disturbed in the middle of this).</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/* Make sure the MCA bus is present */</div><div class='del'>-</div><div class='del'>-	if (mca_system_init()) {</div><div class='del'>-		printk(KERN_ERR "MCA bus system initialisation failed\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!MCA_bus)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "Micro Channel bus detected.\n");</div><div class='del'>-</div><div class='del'>-	/* All MCA systems have at least a primary bus */</div><div class='del'>-	bus = mca_attach_bus(MCA_PRIMARY_BUS);</div><div class='del'>-	if (!bus)</div><div class='del'>-		goto out_nomem;</div><div class='del'>-	bus-&gt;default_dma_mask = 0xffffffffLL;</div><div class='del'>-	bus-&gt;f.mca_write_pos = mca_pc_write_pos;</div><div class='del'>-	bus-&gt;f.mca_read_pos = mca_pc_read_pos;</div><div class='del'>-	bus-&gt;f.mca_transform_irq = mca_dummy_transform_irq;</div><div class='del'>-	bus-&gt;f.mca_transform_ioport = mca_dummy_transform_ioport;</div><div class='del'>-	bus-&gt;f.mca_transform_memory = mca_dummy_transform_memory;</div><div class='del'>-</div><div class='del'>-	/* get the motherboard device */</div><div class='del'>-	mca_dev = kzalloc(sizeof(struct mca_device), GFP_KERNEL);</div><div class='del'>-	if (unlikely(!mca_dev))</div><div class='del'>-		goto out_nomem;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We do not expect many MCA interrupts during initialization,</div><div class='del'>-	 * but let us be safe:</div><div class='del'>-	 */</div><div class='del'>-	spin_lock_irq(&amp;mca_lock);</div><div class='del'>-</div><div class='del'>-	/* Make sure adapter setup is off */</div><div class='del'>-</div><div class='del'>-	outb_p(0, MCA_ADAPTER_SETUP_REG);</div><div class='del'>-</div><div class='del'>-	/* Read motherboard POS registers */</div><div class='del'>-</div><div class='del'>-	mca_dev-&gt;pos_register = 0x7f;</div><div class='del'>-	outb_p(mca_dev-&gt;pos_register, MCA_MOTHERBOARD_SETUP_REG);</div><div class='del'>-	mca_dev-&gt;name[0] = 0;</div><div class='del'>-	mca_read_and_store_pos(mca_dev-&gt;pos);</div><div class='del'>-	mca_configure_adapter_status(mca_dev);</div><div class='del'>-	/* fake POS and slot for a motherboard */</div><div class='del'>-	mca_dev-&gt;pos_id = MCA_MOTHERBOARD_POS;</div><div class='del'>-	mca_dev-&gt;slot = MCA_MOTHERBOARD;</div><div class='del'>-	mca_register_device(MCA_PRIMARY_BUS, mca_dev);</div><div class='del'>-</div><div class='del'>-	mca_dev = kzalloc(sizeof(struct mca_device), GFP_ATOMIC);</div><div class='del'>-	if (unlikely(!mca_dev))</div><div class='del'>-		goto out_unlock_nomem;</div><div class='del'>-</div><div class='del'>-	/* Put motherboard into video setup mode, read integrated video</div><div class='del'>-	 * POS registers, and turn motherboard setup off.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	mca_dev-&gt;pos_register = 0xdf;</div><div class='del'>-	outb_p(mca_dev-&gt;pos_register, MCA_MOTHERBOARD_SETUP_REG);</div><div class='del'>-	mca_dev-&gt;name[0] = 0;</div><div class='del'>-	mca_read_and_store_pos(mca_dev-&gt;pos);</div><div class='del'>-	mca_configure_adapter_status(mca_dev);</div><div class='del'>-	/* fake POS and slot for the integrated video */</div><div class='del'>-	mca_dev-&gt;pos_id = MCA_INTEGVIDEO_POS;</div><div class='del'>-	mca_dev-&gt;slot = MCA_INTEGVIDEO;</div><div class='del'>-	mca_register_device(MCA_PRIMARY_BUS, mca_dev);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Put motherboard into scsi setup mode, read integrated scsi</div><div class='del'>-	 * POS registers, and turn motherboard setup off.</div><div class='del'>-	 *</div><div class='del'>-	 * It seems there are two possible SCSI registers. Martin says that</div><div class='del'>-	 * for the 56,57, 0xf7 is the one, but fails on the 76.</div><div class='del'>-	 * Alfredo (apena@vnet.ibm.com) says</div><div class='del'>-	 * 0xfd works on his machine. We'll try both of them. I figure it's</div><div class='del'>-	 * a good bet that only one could be valid at a time. This could</div><div class='del'>-	 * screw up though if one is used for something else on the other</div><div class='del'>-	 * machine.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	for (i = 0; (which_scsi = mca_builtin_scsi_ports[i]) != 0; i++) {</div><div class='del'>-		outb_p(which_scsi, MCA_MOTHERBOARD_SETUP_REG);</div><div class='del'>-		if (mca_read_and_store_pos(pos))</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	if (which_scsi) {</div><div class='del'>-		/* found a scsi card */</div><div class='del'>-		mca_dev = kzalloc(sizeof(struct mca_device), GFP_ATOMIC);</div><div class='del'>-		if (unlikely(!mca_dev))</div><div class='del'>-			goto out_unlock_nomem;</div><div class='del'>-</div><div class='del'>-		for (j = 0; j &lt; 8; j++)</div><div class='del'>-			mca_dev-&gt;pos[j] = pos[j];</div><div class='del'>-</div><div class='del'>-		mca_configure_adapter_status(mca_dev);</div><div class='del'>-		/* fake POS and slot for integrated SCSI controller */</div><div class='del'>-		mca_dev-&gt;pos_id = MCA_INTEGSCSI_POS;</div><div class='del'>-		mca_dev-&gt;slot = MCA_INTEGSCSI;</div><div class='del'>-		mca_dev-&gt;pos_register = which_scsi;</div><div class='del'>-		mca_register_device(MCA_PRIMARY_BUS, mca_dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Turn off motherboard setup */</div><div class='del'>-</div><div class='del'>-	outb_p(0xff, MCA_MOTHERBOARD_SETUP_REG);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Now loop over MCA slots: put each adapter into setup mode, and</div><div class='del'>-	 * read its POS registers. Then put adapter setup off.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MCA_MAX_SLOT_NR; i++) {</div><div class='del'>-		outb_p(0x8|(i&amp;0xf), MCA_ADAPTER_SETUP_REG);</div><div class='del'>-		if (!mca_read_and_store_pos(pos))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		mca_dev = kzalloc(sizeof(struct mca_device), GFP_ATOMIC);</div><div class='del'>-		if (unlikely(!mca_dev))</div><div class='del'>-			goto out_unlock_nomem;</div><div class='del'>-</div><div class='del'>-		for (j = 0; j &lt; 8; j++)</div><div class='del'>-			mca_dev-&gt;pos[j] = pos[j];</div><div class='del'>-</div><div class='del'>-		mca_dev-&gt;driver_loaded = 0;</div><div class='del'>-		mca_dev-&gt;slot = i;</div><div class='del'>-		mca_dev-&gt;pos_register = 0;</div><div class='del'>-		mca_configure_adapter_status(mca_dev);</div><div class='del'>-		mca_register_device(MCA_PRIMARY_BUS, mca_dev);</div><div class='del'>-	}</div><div class='del'>-	outb_p(0, MCA_ADAPTER_SETUP_REG);</div><div class='del'>-</div><div class='del'>-	/* Enable interrupts and return memory start */</div><div class='del'>-	spin_unlock_irq(&amp;mca_lock);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MCA_STANDARD_RESOURCES; i++)</div><div class='del'>-		request_resource(&amp;ioport_resource, mca_standard_resources + i);</div><div class='del'>-</div><div class='del'>-	mca_do_proc_init();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>- out_unlock_nomem:</div><div class='del'>-	spin_unlock_irq(&amp;mca_lock);</div><div class='del'>- out_nomem:</div><div class='del'>-	printk(KERN_EMERG "Failed memory allocation in MCA setup!\n");</div><div class='del'>-	return -ENOMEM;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-subsys_initcall(mca_init);</div><div class='del'>-</div><div class='del'>-/*--------------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-static __kprobes void</div><div class='del'>-mca_handle_nmi_device(struct mca_device *mca_dev, int check_flag)</div><div class='del'>-{</div><div class='del'>-	int slot = mca_dev-&gt;slot;</div><div class='del'>-</div><div class='del'>-	if (slot == MCA_INTEGSCSI) {</div><div class='del'>-		printk(KERN_CRIT "NMI: caused by MCA integrated SCSI adapter (%s)\n",</div><div class='del'>-			mca_dev-&gt;name);</div><div class='del'>-	} else if (slot == MCA_INTEGVIDEO) {</div><div class='del'>-		printk(KERN_CRIT "NMI: caused by MCA integrated video adapter (%s)\n",</div><div class='del'>-			mca_dev-&gt;name);</div><div class='del'>-	} else if (slot == MCA_MOTHERBOARD) {</div><div class='del'>-		printk(KERN_CRIT "NMI: caused by motherboard (%s)\n",</div><div class='del'>-			mca_dev-&gt;name);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* More info available in POS 6 and 7? */</div><div class='del'>-</div><div class='del'>-	if (check_flag) {</div><div class='del'>-		unsigned char pos6, pos7;</div><div class='del'>-</div><div class='del'>-		pos6 = mca_device_read_pos(mca_dev, 6);</div><div class='del'>-		pos7 = mca_device_read_pos(mca_dev, 7);</div><div class='del'>-</div><div class='del'>-		printk(KERN_CRIT "NMI: POS 6 = 0x%x, POS 7 = 0x%x\n", pos6, pos7);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-} /* mca_handle_nmi_slot */</div><div class='del'>-</div><div class='del'>-/*--------------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-static int __kprobes mca_handle_nmi_callback(struct device *dev, void *data)</div><div class='del'>-{</div><div class='del'>-	struct mca_device *mca_dev = to_mca_device(dev);</div><div class='del'>-	unsigned char pos5;</div><div class='del'>-</div><div class='del'>-	pos5 = mca_device_read_pos(mca_dev, 5);</div><div class='del'>-</div><div class='del'>-	if (!(pos5 &amp; 0x80)) {</div><div class='del'>-		/*</div><div class='del'>-		 *  Bit 7 of POS 5 is reset when this adapter has a hardware</div><div class='del'>-		 * error. Bit 7 it reset if there's error information</div><div class='del'>-		 * available in POS 6 and 7.</div><div class='del'>-		 */</div><div class='del'>-		mca_handle_nmi_device(mca_dev, !(pos5 &amp; 0x40));</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __kprobes mca_handle_nmi(void)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 *  First try - scan the various adapters and see if a specific</div><div class='del'>-	 * adapter was responsible for the error.</div><div class='del'>-	 */</div><div class='del'>-	bus_for_each_dev(&amp;mca_bus_type, NULL, NULL, mca_handle_nmi_callback);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c<br/>index c9bda6d6035c..fbdfc6917180 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/microcode_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/microcode_core.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/microcode_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/microcode_core.c</a></div><div class='hunk'>@@ -299,12 +299,11 @@ static ssize_t reload_store(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long val;</div><div class='ctx'> 	int cpu = dev-&gt;id;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	char *end;</div><div class='add'>+	ssize_t ret = 0;</div><div class='ctx'> </div><div class='del'>-	val = simple_strtoul(buf, &amp;end, 0);</div><div class='del'>-	if (end == buf)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	ret = kstrtoul(buf, 0, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (val == 1) {</div><div class='ctx'> 		get_online_cpus();</div><div class='head'>diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c<br/>index 3ca42d0e43a2..0327e2b3c408 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/microcode_intel.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/microcode_intel.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/microcode_intel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/microcode_intel.c</a></div><div class='hunk'>@@ -147,12 +147,6 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)</div><div class='ctx'> </div><div class='ctx'> 	memset(csig, 0, sizeof(*csig));</div><div class='ctx'> </div><div class='del'>-	if (c-&gt;x86_vendor != X86_VENDOR_INTEL || c-&gt;x86 &lt; 6 ||</div><div class='del'>-	    cpu_has(c, X86_FEATURE_IA64)) {</div><div class='del'>-		pr_err("CPU%d not a capable Intel processor\n", cpu_num);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	csig-&gt;sig = cpuid_eax(0x00000001);</div><div class='ctx'> </div><div class='ctx'> 	if ((c-&gt;x86_model &gt;= 5) || (c-&gt;x86 &gt; 6)) {</div><div class='hunk'>@@ -463,6 +457,14 @@ static struct microcode_ops microcode_intel_ops = {</div><div class='ctx'> </div><div class='ctx'> struct microcode_ops * __init init_intel_microcode(void)</div><div class='ctx'> {</div><div class='add'>+	struct cpuinfo_x86 *c = &amp;cpu_data(0);</div><div class='add'>+</div><div class='add'>+	if (c-&gt;x86_vendor != X86_VENDOR_INTEL || c-&gt;x86 &lt; 6 ||</div><div class='add'>+	    cpu_has(c, X86_FEATURE_IA64)) {</div><div class='add'>+		pr_err("Intel CPU family 0x%x not supported\n", c-&gt;x86);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return &amp;microcode_intel_ops;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c<br/>index ca470e4c92dc..d2b56489d70f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/mpparse.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/mpparse.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/mpparse.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/mpparse.c</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> #include &lt;asm/proto.h&gt;</div><div class='ctx'> #include &lt;asm/bios_ebda.h&gt;</div><div class='ctx'> #include &lt;asm/e820.h&gt;</div><div class='del'>-#include &lt;asm/trampoline.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -97,7 +96,7 @@ static void __init MP_bus_info(struct mpc_bus *m)</div><div class='ctx'> </div><div class='ctx'> 	set_bit(m-&gt;busid, mp_bus_not_pci);</div><div class='ctx'> 	if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {</div><div class='del'>-#if defined(CONFIG_EISA) || defined(CONFIG_MCA)</div><div class='add'>+#ifdef CONFIG_EISA</div><div class='ctx'> 		mp_bus_id_to_type[m-&gt;busid] = MP_BUS_ISA;</div><div class='ctx'> #endif</div><div class='ctx'> 	} else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {</div><div class='hunk'>@@ -105,12 +104,10 @@ static void __init MP_bus_info(struct mpc_bus *m)</div><div class='ctx'> 			x86_init.mpparse.mpc_oem_pci_bus(m);</div><div class='ctx'> </div><div class='ctx'> 		clear_bit(m-&gt;busid, mp_bus_not_pci);</div><div class='del'>-#if defined(CONFIG_EISA) || defined(CONFIG_MCA)</div><div class='add'>+#ifdef CONFIG_EISA</div><div class='ctx'> 		mp_bus_id_to_type[m-&gt;busid] = MP_BUS_PCI;</div><div class='ctx'> 	} else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {</div><div class='ctx'> 		mp_bus_id_to_type[m-&gt;busid] = MP_BUS_EISA;</div><div class='del'>-	} else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {</div><div class='del'>-		mp_bus_id_to_type[m-&gt;busid] = MP_BUS_MCA;</div><div class='ctx'> #endif</div><div class='ctx'> 	} else</div><div class='ctx'> 		printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);</div><div class='hunk'>@@ -368,9 +365,6 @@ static void __init construct_ioapic_table(int mpc_default_type)</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		memcpy(bus.bustype, "EISA  ", 6);</div><div class='ctx'> 		break;</div><div class='del'>-	case 4:</div><div class='del'>-	case 7:</div><div class='del'>-		memcpy(bus.bustype, "MCA   ", 6);</div><div class='ctx'> 	}</div><div class='ctx'> 	MP_bus_info(&amp;bus);</div><div class='ctx'> 	if (mpc_default_type &gt; 4) {</div><div class='hunk'>@@ -573,8 +567,8 @@ static int __init smp_scan_config(unsigned long base, unsigned long length)</div><div class='ctx'> 	struct mpf_intel *mpf;</div><div class='ctx'> 	unsigned long mem;</div><div class='ctx'> </div><div class='del'>-	apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",</div><div class='del'>-			bp, length);</div><div class='add'>+	apic_printk(APIC_VERBOSE, "Scan for SMP in [mem %#010lx-%#010lx]\n",</div><div class='add'>+		    base, base + length - 1);</div><div class='ctx'> 	BUILD_BUG_ON(sizeof(*mpf) != 16);</div><div class='ctx'> </div><div class='ctx'> 	while (length &gt; 0) {</div><div class='hunk'>@@ -589,8 +583,10 @@ static int __init smp_scan_config(unsigned long base, unsigned long length)</div><div class='ctx'> #endif</div><div class='ctx'> 			mpf_found = mpf;</div><div class='ctx'> </div><div class='del'>-			printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",</div><div class='del'>-			       mpf, (u64)virt_to_phys(mpf));</div><div class='add'>+			printk(KERN_INFO "found SMP MP-table at [mem %#010llx-%#010llx] mapped at [%p]\n",</div><div class='add'>+			       (unsigned long long) virt_to_phys(mpf),</div><div class='add'>+			       (unsigned long long) virt_to_phys(mpf) +</div><div class='add'>+			       sizeof(*mpf) - 1, mpf);</div><div class='ctx'> </div><div class='ctx'> 			mem = virt_to_phys(mpf);</div><div class='ctx'> 			memblock_reserve(mem, sizeof(*mpf));</div><div class='hunk'>@@ -623,7 +619,7 @@ void __init default_find_smp_config(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If it is an SMP machine we should know now, unless the</div><div class='del'>-	 * configuration is in an EISA/MCA bus machine with an</div><div class='add'>+	 * configuration is in an EISA bus machine with an</div><div class='ctx'> 	 * extended bios data area.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * there is a real-mode segmented pointer pointing to the</div><div class='head'>diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c<br/>index 47acaf319165..a0b2f84457be 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/nmi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/nmi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/nmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/nmi.c</a></div><div class='hunk'>@@ -19,8 +19,6 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_EDAC)</div><div class='ctx'> #include &lt;linux/edac.h&gt;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -31,14 +29,6 @@</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='ctx'> #include &lt;asm/x86_init.h&gt;</div><div class='ctx'> </div><div class='del'>-#define NMI_MAX_NAMELEN	16</div><div class='del'>-struct nmiaction {</div><div class='del'>-	struct list_head list;</div><div class='del'>-	nmi_handler_t handler;</div><div class='del'>-	unsigned int flags;</div><div class='del'>-	char *name;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct nmi_desc {</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> 	struct list_head head;</div><div class='hunk'>@@ -54,6 +44,14 @@ static struct nmi_desc nmi_desc[NMI_MAX] =</div><div class='ctx'> 		.lock = __SPIN_LOCK_UNLOCKED(&amp;nmi_desc[1].lock),</div><div class='ctx'> 		.head = LIST_HEAD_INIT(nmi_desc[1].head),</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.lock = __SPIN_LOCK_UNLOCKED(&amp;nmi_desc[2].lock),</div><div class='add'>+		.head = LIST_HEAD_INIT(nmi_desc[2].head),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.lock = __SPIN_LOCK_UNLOCKED(&amp;nmi_desc[3].lock),</div><div class='add'>+		.head = LIST_HEAD_INIT(nmi_desc[3].head),</div><div class='add'>+	},</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -84,7 +82,7 @@ __setup("unknown_nmi_panic", setup_unknown_nmi_panic);</div><div class='ctx'> </div><div class='ctx'> #define nmi_to_desc(type) (&amp;nmi_desc[type])</div><div class='ctx'> </div><div class='del'>-static int notrace __kprobes nmi_handle(unsigned int type, struct pt_regs *regs, bool b2b)</div><div class='add'>+static int __kprobes nmi_handle(unsigned int type, struct pt_regs *regs, bool b2b)</div><div class='ctx'> {</div><div class='ctx'> 	struct nmi_desc *desc = nmi_to_desc(type);</div><div class='ctx'> 	struct nmiaction *a;</div><div class='hunk'>@@ -107,11 +105,14 @@ static int notrace __kprobes nmi_handle(unsigned int type, struct pt_regs *regs,</div><div class='ctx'> 	return handled;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __setup_nmi(unsigned int type, struct nmiaction *action)</div><div class='add'>+int __register_nmi_handler(unsigned int type, struct nmiaction *action)</div><div class='ctx'> {</div><div class='ctx'> 	struct nmi_desc *desc = nmi_to_desc(type);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	if (!action-&gt;handler)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;desc-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -120,6 +121,8 @@ static int __setup_nmi(unsigned int type, struct nmiaction *action)</div><div class='ctx'> 	 * to manage expectations</div><div class='ctx'> 	 */</div><div class='ctx'> 	WARN_ON_ONCE(type == NMI_UNKNOWN &amp;&amp; !list_empty(&amp;desc-&gt;head));</div><div class='add'>+	WARN_ON_ONCE(type == NMI_SERR &amp;&amp; !list_empty(&amp;desc-&gt;head));</div><div class='add'>+	WARN_ON_ONCE(type == NMI_IO_CHECK &amp;&amp; !list_empty(&amp;desc-&gt;head));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * some handlers need to be executed first otherwise a fake</div><div class='hunk'>@@ -133,8 +136,9 @@ static int __setup_nmi(unsigned int type, struct nmiaction *action)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;desc-&gt;lock, flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(__register_nmi_handler);</div><div class='ctx'> </div><div class='del'>-static struct nmiaction *__free_nmi(unsigned int type, const char *name)</div><div class='add'>+void unregister_nmi_handler(unsigned int type, const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	struct nmi_desc *desc = nmi_to_desc(type);</div><div class='ctx'> 	struct nmiaction *n;</div><div class='hunk'>@@ -157,61 +161,16 @@ static struct nmiaction *__free_nmi(unsigned int type, const char *name)</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;desc-&gt;lock, flags);</div><div class='ctx'> 	synchronize_rcu();</div><div class='del'>-	return (n);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int register_nmi_handler(unsigned int type, nmi_handler_t handler,</div><div class='del'>-			unsigned long nmiflags, const char *devname)</div><div class='del'>-{</div><div class='del'>-	struct nmiaction *action;</div><div class='del'>-	int retval = -ENOMEM;</div><div class='del'>-</div><div class='del'>-	if (!handler)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	action = kzalloc(sizeof(struct nmiaction), GFP_KERNEL);</div><div class='del'>-	if (!action)</div><div class='del'>-		goto fail_action;</div><div class='del'>-</div><div class='del'>-	action-&gt;handler = handler;</div><div class='del'>-	action-&gt;flags = nmiflags;</div><div class='del'>-	action-&gt;name = kstrndup(devname, NMI_MAX_NAMELEN, GFP_KERNEL);</div><div class='del'>-	if (!action-&gt;name)</div><div class='del'>-		goto fail_action_name;</div><div class='del'>-</div><div class='del'>-	retval = __setup_nmi(type, action);</div><div class='del'>-</div><div class='del'>-	if (retval)</div><div class='del'>-		goto fail_setup_nmi;</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='del'>-</div><div class='del'>-fail_setup_nmi:</div><div class='del'>-	kfree(action-&gt;name);</div><div class='del'>-fail_action_name:</div><div class='del'>-	kfree(action);</div><div class='del'>-fail_action:	</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(register_nmi_handler);</div><div class='del'>-</div><div class='del'>-void unregister_nmi_handler(unsigned int type, const char *name)</div><div class='del'>-{</div><div class='del'>-	struct nmiaction *a;</div><div class='del'>-</div><div class='del'>-	a = __free_nmi(type, name);</div><div class='del'>-	if (a) {</div><div class='del'>-		kfree(a-&gt;name);</div><div class='del'>-		kfree(a);</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> EXPORT_SYMBOL_GPL(unregister_nmi_handler);</div><div class='ctx'> </div><div class='del'>-static notrace __kprobes void</div><div class='add'>+static __kprobes void</div><div class='ctx'> pci_serr_error(unsigned char reason, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='add'>+	/* check to see if anyone registered against these types of errors */</div><div class='add'>+	if (nmi_handle(NMI_SERR, regs, false))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	pr_emerg("NMI: PCI system error (SERR) for reason %02x on CPU %d.\n",</div><div class='ctx'> 		 reason, smp_processor_id());</div><div class='ctx'> </div><div class='hunk'>@@ -236,15 +195,19 @@ pci_serr_error(unsigned char reason, struct pt_regs *regs)</div><div class='ctx'> 	outb(reason, NMI_REASON_PORT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static notrace __kprobes void</div><div class='add'>+static __kprobes void</div><div class='ctx'> io_check_error(unsigned char reason, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long i;</div><div class='ctx'> </div><div class='add'>+	/* check to see if anyone registered against these types of errors */</div><div class='add'>+	if (nmi_handle(NMI_IO_CHECK, regs, false))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	pr_emerg(</div><div class='ctx'> 	"NMI: IOCK error (debug interrupt?) for reason %02x on CPU %d.\n",</div><div class='ctx'> 		 reason, smp_processor_id());</div><div class='del'>-	show_registers(regs);</div><div class='add'>+	show_regs(regs);</div><div class='ctx'> </div><div class='ctx'> 	if (panic_on_io_nmi)</div><div class='ctx'> 		panic("NMI IOCK error: Not continuing");</div><div class='hunk'>@@ -263,7 +226,7 @@ io_check_error(unsigned char reason, struct pt_regs *regs)</div><div class='ctx'> 	outb(reason, NMI_REASON_PORT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static notrace __kprobes void</div><div class='add'>+static __kprobes void</div><div class='ctx'> unknown_nmi_error(unsigned char reason, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int handled;</div><div class='hunk'>@@ -282,16 +245,6 @@ unknown_nmi_error(unsigned char reason, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	__this_cpu_add(nmi_stats.unknown, 1);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-	/*</div><div class='del'>-	 * Might actually be able to figure out what the guilty party</div><div class='del'>-	 * is:</div><div class='del'>-	 */</div><div class='del'>-	if (MCA_bus) {</div><div class='del'>-		mca_handle_nmi();</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='ctx'> 	pr_emerg("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",</div><div class='ctx'> 		 reason, smp_processor_id());</div><div class='ctx'> </div><div class='hunk'>@@ -305,7 +258,7 @@ unknown_nmi_error(unsigned char reason, struct pt_regs *regs)</div><div class='ctx'> static DEFINE_PER_CPU(bool, swallow_nmi);</div><div class='ctx'> static DEFINE_PER_CPU(unsigned long, last_nmi_rip);</div><div class='ctx'> </div><div class='del'>-static notrace __kprobes void default_do_nmi(struct pt_regs *regs)</div><div class='add'>+static __kprobes void default_do_nmi(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char reason = 0;</div><div class='ctx'> 	int handled;</div><div class='hunk'>@@ -491,14 +444,16 @@ static inline void nmi_nesting_preprocess(struct pt_regs *regs)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (unlikely(is_debug_stack(regs-&gt;sp))) {</div><div class='ctx'> 		debug_stack_set_zero();</div><div class='del'>-		__get_cpu_var(update_debug_stack) = 1;</div><div class='add'>+		this_cpu_write(update_debug_stack, 1);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void nmi_nesting_postprocess(void)</div><div class='ctx'> {</div><div class='del'>-	if (unlikely(__get_cpu_var(update_debug_stack)))</div><div class='add'>+	if (unlikely(this_cpu_read(update_debug_stack))) {</div><div class='ctx'> 		debug_stack_reset();</div><div class='add'>+		this_cpu_write(update_debug_stack, 0);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/nmi_selftest.c b/arch/x86/kernel/nmi_selftest.c<br/>index 2c39dcd510fa..149b8d9c6ad4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/nmi_selftest.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/nmi_selftest.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/nmi_selftest.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/nmi_selftest.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/cpumask.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/percpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='hunk'>@@ -41,7 +42,7 @@ static int __init nmi_unk_cb(unsigned int val, struct pt_regs *regs)</div><div class='ctx'> static void __init init_nmi_testsuite(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* trap all the unknown NMIs we may generate */</div><div class='del'>-	register_nmi_handler(NMI_UNKNOWN, nmi_unk_cb, 0, "nmi_selftest_unk");</div><div class='add'>+	register_nmi_handler_initonly(NMI_UNKNOWN, nmi_unk_cb, 0, "nmi_selftest_unk");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init cleanup_nmi_testsuite(void)</div><div class='hunk'>@@ -63,7 +64,7 @@ static void __init test_nmi_ipi(struct cpumask *mask)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long timeout;</div><div class='ctx'> </div><div class='del'>-	if (register_nmi_handler(NMI_LOCAL, test_nmi_ipi_callback,</div><div class='add'>+	if (register_nmi_handler_initonly(NMI_LOCAL, test_nmi_ipi_callback,</div><div class='ctx'> 				 NMI_FLAG_FIRST, "nmi_selftest")) {</div><div class='ctx'> 		nmi_fail = FAILURE;</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -117,15 +118,15 @@ static void __init dotest(void (*testcase_fn)(void), int expected)</div><div class='ctx'> 		unexpected_testcase_failures++;</div><div class='ctx'> </div><div class='ctx'> 		if (nmi_fail == FAILURE)</div><div class='del'>-			printk("FAILED |");</div><div class='add'>+			printk(KERN_CONT "FAILED |");</div><div class='ctx'> 		else if (nmi_fail == TIMEOUT)</div><div class='del'>-			printk("TIMEOUT|");</div><div class='add'>+			printk(KERN_CONT "TIMEOUT|");</div><div class='ctx'> 		else</div><div class='del'>-			printk("ERROR  |");</div><div class='add'>+			printk(KERN_CONT "ERROR  |");</div><div class='ctx'> 		dump_stack();</div><div class='ctx'> 	} else {</div><div class='ctx'> 		testcase_successes++;</div><div class='del'>-		printk("  ok  |");</div><div class='add'>+		printk(KERN_CONT "  ok  |");</div><div class='ctx'> 	}</div><div class='ctx'> 	testcase_total++;</div><div class='ctx'> </div><div class='hunk'>@@ -150,10 +151,10 @@ void __init nmi_selftest(void)</div><div class='ctx'> </div><div class='ctx'> 	print_testname("remote IPI");</div><div class='ctx'> 	dotest(remote_ipi, SUCCESS);</div><div class='del'>-	printk("\n");</div><div class='add'>+	printk(KERN_CONT "\n");</div><div class='ctx'> 	print_testname("local IPI");</div><div class='ctx'> 	dotest(local_ipi, SUCCESS);</div><div class='del'>-	printk("\n");</div><div class='add'>+	printk(KERN_CONT "\n");</div><div class='ctx'> </div><div class='ctx'> 	cleanup_nmi_testsuite();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c<br/>index ab137605e694..9ce885996fd7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/paravirt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/paravirt.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/paravirt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/paravirt.c</a></div><div class='hunk'>@@ -241,16 +241,16 @@ static DEFINE_PER_CPU(enum paravirt_lazy_mode, paravirt_lazy_mode) = PARAVIRT_LA</div><div class='ctx'> </div><div class='ctx'> static inline void enter_lazy(enum paravirt_lazy_mode mode)</div><div class='ctx'> {</div><div class='del'>-	BUG_ON(percpu_read(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE);</div><div class='add'>+	BUG_ON(this_cpu_read(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE);</div><div class='ctx'> </div><div class='del'>-	percpu_write(paravirt_lazy_mode, mode);</div><div class='add'>+	this_cpu_write(paravirt_lazy_mode, mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void leave_lazy(enum paravirt_lazy_mode mode)</div><div class='ctx'> {</div><div class='del'>-	BUG_ON(percpu_read(paravirt_lazy_mode) != mode);</div><div class='add'>+	BUG_ON(this_cpu_read(paravirt_lazy_mode) != mode);</div><div class='ctx'> </div><div class='del'>-	percpu_write(paravirt_lazy_mode, PARAVIRT_LAZY_NONE);</div><div class='add'>+	this_cpu_write(paravirt_lazy_mode, PARAVIRT_LAZY_NONE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void paravirt_enter_lazy_mmu(void)</div><div class='hunk'>@@ -267,7 +267,7 @@ void paravirt_start_context_switch(struct task_struct *prev)</div><div class='ctx'> {</div><div class='ctx'> 	BUG_ON(preemptible());</div><div class='ctx'> </div><div class='del'>-	if (percpu_read(paravirt_lazy_mode) == PARAVIRT_LAZY_MMU) {</div><div class='add'>+	if (this_cpu_read(paravirt_lazy_mode) == PARAVIRT_LAZY_MMU) {</div><div class='ctx'> 		arch_leave_lazy_mmu_mode();</div><div class='ctx'> 		set_ti_thread_flag(task_thread_info(prev), TIF_LAZY_MMU_UPDATES);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -289,7 +289,7 @@ enum paravirt_lazy_mode paravirt_get_lazy_mode(void)</div><div class='ctx'> 	if (in_interrupt())</div><div class='ctx'> 		return PARAVIRT_LAZY_NONE;</div><div class='ctx'> </div><div class='del'>-	return percpu_read(paravirt_lazy_mode);</div><div class='add'>+	return this_cpu_read(paravirt_lazy_mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_flush_lazy_mmu_mode(void)</div><div class='head'>diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c<br/>index d0b2fb9ccbb1..b72838bae64a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/pci-calgary_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/pci-calgary_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/pci-calgary_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/pci-calgary_64.c</a></div><div class='hunk'>@@ -1480,8 +1480,9 @@ cleanup:</div><div class='ctx'> static int __init calgary_parse_options(char *p)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int bridge;</div><div class='add'>+	unsigned long val;</div><div class='ctx'> 	size_t len;</div><div class='del'>-	char* endp;</div><div class='add'>+	ssize_t ret;</div><div class='ctx'> </div><div class='ctx'> 	while (*p) {</div><div class='ctx'> 		if (!strncmp(p, "64k", 3))</div><div class='hunk'>@@ -1512,10 +1513,11 @@ static int __init calgary_parse_options(char *p)</div><div class='ctx'> 				++p;</div><div class='ctx'> 			if (*p == '\0')</div><div class='ctx'> 				break;</div><div class='del'>-			bridge = simple_strtoul(p, &amp;endp, 0);</div><div class='del'>-			if (p == endp)</div><div class='add'>+			ret = kstrtoul(p, 0, &amp;val);</div><div class='add'>+			if (ret)</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='add'>+			bridge = val;</div><div class='ctx'> 			if (bridge &lt; MAX_PHB_BUS_NUM) {</div><div class='ctx'> 				printk(KERN_INFO "Calgary: disabling "</div><div class='ctx'> 				       "translation for PHB %#x\n", bridge);</div><div class='head'>diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c<br/>index 3003250ac51d..62c9457ccd2f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/pci-dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/pci-dma.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/pci-dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/pci-dma.c</a></div><div class='hunk'>@@ -100,14 +100,18 @@ void *dma_generic_alloc_coherent(struct device *dev, size_t size,</div><div class='ctx'> 				 struct dma_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long dma_mask;</div><div class='del'>-	struct page *page;</div><div class='add'>+	struct page *page = NULL;</div><div class='add'>+	unsigned int count = PAGE_ALIGN(size) &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	dma_addr_t addr;</div><div class='ctx'> </div><div class='ctx'> 	dma_mask = dma_alloc_coherent_mask(dev, flag);</div><div class='ctx'> </div><div class='ctx'> 	flag |= __GFP_ZERO;</div><div class='ctx'> again:</div><div class='del'>-	page = alloc_pages_node(dev_to_node(dev), flag, get_order(size));</div><div class='add'>+	if (!(flag &amp; GFP_ATOMIC))</div><div class='add'>+		page = dma_alloc_from_contiguous(dev, count, get_order(size));</div><div class='add'>+	if (!page)</div><div class='add'>+		page = alloc_pages_node(dev_to_node(dev), flag, get_order(size));</div><div class='ctx'> 	if (!page)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -127,6 +131,16 @@ again:</div><div class='ctx'> 	return page_address(page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void dma_generic_free_coherent(struct device *dev, size_t size, void *vaddr,</div><div class='add'>+			       dma_addr_t dma_addr, struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	unsigned int count = PAGE_ALIGN(size) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	struct page *page = virt_to_page(vaddr);</div><div class='add'>+</div><div class='add'>+	if (!dma_release_from_contiguous(dev, page, count))</div><div class='add'>+		free_pages((unsigned long)vaddr, get_order(size));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * See &lt;Documentation/x86/x86_64/boot-options.txt&gt; for the iommu kernel</div><div class='ctx'>  * parameter documentation.</div><div class='head'>diff --git a/arch/x86/kernel/pci-nommu.c b/arch/x86/kernel/pci-nommu.c<br/>index f96050685b46..871be4a84c7d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/pci-nommu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/pci-nommu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/pci-nommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/pci-nommu.c</a></div><div class='hunk'>@@ -74,12 +74,6 @@ static int nommu_map_sg(struct device *hwdev, struct scatterlist *sg,</div><div class='ctx'> 	return nents;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void nommu_free_coherent(struct device *dev, size_t size, void *vaddr,</div><div class='del'>-				dma_addr_t dma_addr, struct dma_attrs *attrs)</div><div class='del'>-{</div><div class='del'>-	free_pages((unsigned long)vaddr, get_order(size));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void nommu_sync_single_for_device(struct device *dev,</div><div class='ctx'> 			dma_addr_t addr, size_t size,</div><div class='ctx'> 			enum dma_data_direction dir)</div><div class='hunk'>@@ -97,7 +91,7 @@ static void nommu_sync_sg_for_device(struct device *dev,</div><div class='ctx'> </div><div class='ctx'> struct dma_map_ops nommu_dma_ops = {</div><div class='ctx'> 	.alloc			= dma_generic_alloc_coherent,</div><div class='del'>-	.free			= nommu_free_coherent,</div><div class='add'>+	.free			= dma_generic_free_coherent,</div><div class='ctx'> 	.map_sg			= nommu_map_sg,</div><div class='ctx'> 	.map_page		= nommu_map_page,</div><div class='ctx'> 	.sync_single_for_device = nommu_sync_single_for_device,</div><div class='head'>diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c<br/>index 1d92a5ab6e8b..735279e54e59 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/process.c</a></div><div class='hunk'>@@ -27,6 +27,15 @@</div><div class='ctx'> #include &lt;asm/debugreg.h&gt;</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * per-CPU TSS segments. Threads are completely 'soft' on Linux,</div><div class='add'>+ * no more per-task TSS's. The TSS size is kept cacheline-aligned</div><div class='add'>+ * so they are allowed to end up in the .data..cacheline_aligned</div><div class='add'>+ * section. Since TSS's are completely CPU-local, we want them</div><div class='add'>+ * on exact cacheline boundaries, to eliminate cacheline ping-pong.</div><div class='add'>+ */</div><div class='add'>+DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, init_tss) = INIT_TSS;</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> static DEFINE_PER_CPU(unsigned char, is_idle);</div><div class='ctx'> static ATOMIC_NOTIFIER_HEAD(idle_notifier);</div><div class='hunk'>@@ -47,10 +56,16 @@ EXPORT_SYMBOL_GPL(idle_notifier_unregister);</div><div class='ctx'> struct kmem_cache *task_xstate_cachep;</div><div class='ctx'> EXPORT_SYMBOL_GPL(task_xstate_cachep);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * this gets called so that we can store lazy state into memory and copy the</div><div class='add'>+ * current task into the new thread.</div><div class='add'>+ */</div><div class='ctx'> int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	unlazy_fpu(src);</div><div class='add'>+</div><div class='ctx'> 	*dst = *src;</div><div class='ctx'> 	if (fpu_allocated(&amp;src-&gt;thread.fpu)) {</div><div class='ctx'> 		memset(&amp;dst-&gt;thread.fpu, 0, sizeof(dst-&gt;thread.fpu));</div><div class='hunk'>@@ -67,10 +82,9 @@ void free_thread_xstate(struct task_struct *tsk)</div><div class='ctx'> 	fpu_free(&amp;tsk-&gt;thread.fpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void free_thread_info(struct thread_info *ti)</div><div class='add'>+void arch_release_task_struct(struct task_struct *tsk)</div><div class='ctx'> {</div><div class='del'>-	free_thread_xstate(ti-&gt;task);</div><div class='del'>-	free_pages((unsigned long)ti, THREAD_ORDER);</div><div class='add'>+	free_thread_xstate(tsk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_task_cache_init(void)</div><div class='hunk'>@@ -81,6 +95,16 @@ void arch_task_cache_init(void)</div><div class='ctx'> 				  SLAB_PANIC | SLAB_NOTRACK, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void drop_fpu(struct task_struct *tsk)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Forget coprocessor state..</div><div class='add'>+	 */</div><div class='add'>+	tsk-&gt;fpu_counter = 0;</div><div class='add'>+	clear_fpu(tsk);</div><div class='add'>+	clear_used_math();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Free current thread data structures etc..</div><div class='ctx'>  */</div><div class='hunk'>@@ -103,12 +127,8 @@ void exit_thread(void)</div><div class='ctx'> 		put_cpu();</div><div class='ctx'> 		kfree(bp);</div><div class='ctx'> 	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-void show_regs(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	show_registers(regs);</div><div class='del'>-	show_trace(NULL, regs, (unsigned long *)kernel_stack_pointer(regs), 0);</div><div class='add'>+	drop_fpu(me);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void show_regs_common(void)</div><div class='hunk'>@@ -143,12 +163,7 @@ void flush_thread(void)</div><div class='ctx'> </div><div class='ctx'> 	flush_ptrace_hw_breakpoint(tsk);</div><div class='ctx'> 	memset(tsk-&gt;thread.tls_array, 0, sizeof(tsk-&gt;thread.tls_array));</div><div class='del'>-	/*</div><div class='del'>-	 * Forget coprocessor state..</div><div class='del'>-	 */</div><div class='del'>-	tsk-&gt;fpu_counter = 0;</div><div class='del'>-	clear_fpu(tsk);</div><div class='del'>-	clear_used_math();</div><div class='add'>+	drop_fpu(tsk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hard_disable_TSC(void)</div><div class='hunk'>@@ -377,7 +392,7 @@ static inline void play_dead(void)</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> void enter_idle(void)</div><div class='ctx'> {</div><div class='del'>-	percpu_write(is_idle, 1);</div><div class='add'>+	this_cpu_write(is_idle, 1);</div><div class='ctx'> 	atomic_notifier_call_chain(&amp;idle_notifier, IDLE_START, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -516,26 +531,6 @@ void stop_this_cpu(void *dummy)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void do_nothing(void *unused)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * cpu_idle_wait - Used to ensure that all the CPUs discard old value of</div><div class='del'>- * pm_idle and update to new pm_idle value. Required while changing pm_idle</div><div class='del'>- * handler on SMP systems.</div><div class='del'>- *</div><div class='del'>- * Caller must have changed pm_idle to the new value before the call. Old</div><div class='del'>- * pm_idle value will not be used by any CPU after the return of this function.</div><div class='del'>- */</div><div class='del'>-void cpu_idle_wait(void)</div><div class='del'>-{</div><div class='del'>-	smp_mb();</div><div class='del'>-	/* kick all the CPUs so that they exit out of pm_idle */</div><div class='del'>-	smp_call_function(do_nothing, NULL, 1);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cpu_idle_wait);</div><div class='del'>-</div><div class='ctx'> /* Default MONITOR/MWAIT with no hints, used for default C1 state */</div><div class='ctx'> static void mwait_idle(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -594,9 +589,17 @@ int mwait_usable(const struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='ctx'> 	u32 eax, ebx, ecx, edx;</div><div class='ctx'> </div><div class='add'>+	/* Use mwait if idle=mwait boot option is given */</div><div class='ctx'> 	if (boot_option_idle_override == IDLE_FORCE_MWAIT)</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Any idle= boot option other than idle=mwait means that we must not</div><div class='add'>+	 * use mwait. Eg: idle=halt or idle=poll or idle=nomwait</div><div class='add'>+	 */</div><div class='add'>+	if (boot_option_idle_override != IDLE_NO_OVERRIDE)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (c-&gt;cpuid_level &lt; MWAIT_INFO)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c<br/>index ae6847303e26..516fa186121b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/process_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/process_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/process_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/process_32.c</a></div><div class='hunk'>@@ -126,15 +126,6 @@ void release_thread(struct task_struct *dead_task)</div><div class='ctx'> 	release_vm86_irqs(dead_task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This gets called before we allocate a new thread and copy</div><div class='del'>- * the current task into it.</div><div class='del'>- */</div><div class='del'>-void prepare_to_copy(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	unlazy_fpu(tsk);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int copy_thread(unsigned long clone_flags, unsigned long sp,</div><div class='ctx'> 	unsigned long unused,</div><div class='ctx'> 	struct task_struct *p, struct pt_regs *regs)</div><div class='hunk'>@@ -302,7 +293,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> </div><div class='ctx'> 	switch_fpu_finish(next_p, fpu);</div><div class='ctx'> </div><div class='del'>-	percpu_write(current_task, next_p);</div><div class='add'>+	this_cpu_write(current_task, next_p);</div><div class='ctx'> </div><div class='ctx'> 	return prev_p;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c<br/>index 733ca39f367e..61cdf7fdf099 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/process_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/process_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/process_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/process_64.c</a></div><div class='hunk'>@@ -145,15 +145,6 @@ static inline u32 read_32bit_tls(struct task_struct *t, int tls)</div><div class='ctx'> 	return get_desc_base(&amp;t-&gt;thread.tls_array[tls]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This gets called before we allocate a new thread and copy</div><div class='del'>- * the current task into it.</div><div class='del'>- */</div><div class='del'>-void prepare_to_copy(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	unlazy_fpu(tsk);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int copy_thread(unsigned long clone_flags, unsigned long sp,</div><div class='ctx'> 		unsigned long unused,</div><div class='ctx'> 	struct task_struct *p, struct pt_regs *regs)</div><div class='hunk'>@@ -237,7 +228,7 @@ start_thread_common(struct pt_regs *regs, unsigned long new_ip,</div><div class='ctx'> 	current-&gt;thread.usersp	= new_sp;</div><div class='ctx'> 	regs-&gt;ip		= new_ip;</div><div class='ctx'> 	regs-&gt;sp		= new_sp;</div><div class='del'>-	percpu_write(old_rsp, new_sp);</div><div class='add'>+	this_cpu_write(old_rsp, new_sp);</div><div class='ctx'> 	regs-&gt;cs		= _cs;</div><div class='ctx'> 	regs-&gt;ss		= _ss;</div><div class='ctx'> 	regs-&gt;flags		= X86_EFLAGS_IF;</div><div class='hunk'>@@ -359,11 +350,11 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Switch the PDA and FPU contexts.</div><div class='ctx'> 	 */</div><div class='del'>-	prev-&gt;usersp = percpu_read(old_rsp);</div><div class='del'>-	percpu_write(old_rsp, next-&gt;usersp);</div><div class='del'>-	percpu_write(current_task, next_p);</div><div class='add'>+	prev-&gt;usersp = this_cpu_read(old_rsp);</div><div class='add'>+	this_cpu_write(old_rsp, next-&gt;usersp);</div><div class='add'>+	this_cpu_write(current_task, next_p);</div><div class='ctx'> </div><div class='del'>-	percpu_write(kernel_stack,</div><div class='add'>+	this_cpu_write(kernel_stack,</div><div class='ctx'> 		  (unsigned long)task_stack_page(next_p) +</div><div class='ctx'> 		  THREAD_SIZE - KERNEL_STACK_OFFSET);</div><div class='ctx'> </div><div class='hunk'>@@ -423,6 +414,7 @@ void set_personality_ia32(bool x32)</div><div class='ctx'> 		current_thread_info()-&gt;status |= TS_COMPAT;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(set_personality_ia32);</div><div class='ctx'> </div><div class='ctx'> unsigned long get_wchan(struct task_struct *p)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c<br/>index 13b1990c7c58..c4c6a5c2bf0f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/ptrace.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/ptrace.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/ptrace.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/ptrace.c</a></div><div class='hunk'>@@ -1211,12 +1211,6 @@ static long x32_arch_ptrace(struct task_struct *child,</div><div class='ctx'> 					     0, sizeof(struct user_i387_struct),</div><div class='ctx'> 					     datap);</div><div class='ctx'> </div><div class='del'>-		/* normal 64bit interface to access TLS data.</div><div class='del'>-		   Works just like arch_prctl, except that the arguments</div><div class='del'>-		   are reversed. */</div><div class='del'>-	case PTRACE_ARCH_PRCTL:</div><div class='del'>-		return do_arch_prctl(child, data, addr);</div><div class='del'>-</div><div class='ctx'> 	default:</div><div class='ctx'> 		return compat_ptrace_request(child, request, addr, data);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c<br/>index d840e69a853c..25b48edb847c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/reboot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/reboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/reboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/reboot.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> # include &lt;linux/ctype.h&gt;</div><div class='ctx'> # include &lt;linux/mc146818rtc.h&gt;</div><div class='add'>+# include &lt;asm/realmode.h&gt;</div><div class='ctx'> #else</div><div class='ctx'> # include &lt;asm/x86_init.h&gt;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -39,7 +40,8 @@ static int reboot_mode;</div><div class='ctx'> enum reboot_type reboot_type = BOOT_ACPI;</div><div class='ctx'> int reboot_force;</div><div class='ctx'> </div><div class='del'>-/* This variable is used privately to keep track of whether or not</div><div class='add'>+/*</div><div class='add'>+ * This variable is used privately to keep track of whether or not</div><div class='ctx'>  * reboot_type is still set to its default value (i.e., reboot= hasn't</div><div class='ctx'>  * been set on the command line).  This is needed so that we can</div><div class='ctx'>  * suppress DMI scanning for reboot quirks.  Without it, it's</div><div class='hunk'>@@ -51,7 +53,8 @@ static int reboot_default = 1;</div><div class='ctx'> static int reboot_cpu = -1;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/* This is set if we need to go through the 'emergency' path.</div><div class='add'>+/*</div><div class='add'>+ * This is set if we need to go through the 'emergency' path.</div><div class='ctx'>  * When machine_emergency_restart() is called, we may be on</div><div class='ctx'>  * an inconsistent state and won't be able to do a clean cleanup</div><div class='ctx'>  */</div><div class='hunk'>@@ -60,22 +63,24 @@ static int reboot_emergency;</div><div class='ctx'> /* This is set by the PCI code if either type 1 or type 2 PCI is detected */</div><div class='ctx'> bool port_cf9_safe = false;</div><div class='ctx'> </div><div class='del'>-/* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]</div><div class='del'>-   warm   Don't set the cold reboot flag</div><div class='del'>-   cold   Set the cold reboot flag</div><div class='del'>-   bios   Reboot by jumping through the BIOS (only for X86_32)</div><div class='del'>-   smp    Reboot by executing reset on BSP or other CPU (only for X86_32)</div><div class='del'>-   triple Force a triple fault (init)</div><div class='del'>-   kbd    Use the keyboard controller. cold reset (default)</div><div class='del'>-   acpi   Use the RESET_REG in the FADT</div><div class='del'>-   efi    Use efi reset_system runtime service</div><div class='del'>-   pci    Use the so-called "PCI reset register", CF9</div><div class='del'>-   force  Avoid anything that could hang.</div><div class='add'>+/*</div><div class='add'>+ * reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]</div><div class='add'>+ * warm   Don't set the cold reboot flag</div><div class='add'>+ * cold   Set the cold reboot flag</div><div class='add'>+ * bios   Reboot by jumping through the BIOS (only for X86_32)</div><div class='add'>+ * smp    Reboot by executing reset on BSP or other CPU (only for X86_32)</div><div class='add'>+ * triple Force a triple fault (init)</div><div class='add'>+ * kbd    Use the keyboard controller. cold reset (default)</div><div class='add'>+ * acpi   Use the RESET_REG in the FADT</div><div class='add'>+ * efi    Use efi reset_system runtime service</div><div class='add'>+ * pci    Use the so-called "PCI reset register", CF9</div><div class='add'>+ * force  Avoid anything that could hang.</div><div class='ctx'>  */</div><div class='ctx'> static int __init reboot_setup(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	for (;;) {</div><div class='del'>-		/* Having anything passed on the command line via</div><div class='add'>+		/*</div><div class='add'>+		 * Having anything passed on the command line via</div><div class='ctx'> 		 * reboot= will cause us to disable DMI checking</div><div class='ctx'> 		 * below.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -98,9 +103,11 @@ static int __init reboot_setup(char *str)</div><div class='ctx'> 				if (isdigit(*(str+2)))</div><div class='ctx'> 					reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');</div><div class='ctx'> 			}</div><div class='del'>-				/* we will leave sorting out the final value</div><div class='del'>-				   when we are ready to reboot, since we might not</div><div class='del'>-				   have detected BSP APIC ID or smp_num_cpu */</div><div class='add'>+			/*</div><div class='add'>+			 * We will leave sorting out the final value</div><div class='add'>+			 * when we are ready to reboot, since we might not</div><div class='add'>+			 * have detected BSP APIC ID or smp_num_cpu</div><div class='add'>+			 */</div><div class='ctx'> 			break;</div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='hunk'>@@ -150,6 +157,62 @@ static int __init set_bios_reboot(const struct dmi_system_id *d)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void machine_real_restart(unsigned int type)</div><div class='add'>+{</div><div class='add'>+	void (*restart_lowmem)(unsigned int) = (void (*)(unsigned int))</div><div class='add'>+		real_mode_header-&gt;machine_real_restart_asm;</div><div class='add'>+</div><div class='add'>+	local_irq_disable();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Write zero to CMOS register number 0x0f, which the BIOS POST</div><div class='add'>+	 * routine will recognize as telling it to do a proper reboot.  (Well</div><div class='add'>+	 * that's what this book in front of me says -- it may only apply to</div><div class='add'>+	 * the Phoenix BIOS though, it's not clear).  At the same time,</div><div class='add'>+	 * disable NMIs by setting the top bit in the CMOS address register,</div><div class='add'>+	 * as we're about to do peculiar things to the CPU.  I'm not sure if</div><div class='add'>+	 * `outb_p' is needed instead of just `outb'.  Use it to be on the</div><div class='add'>+	 * safe side.  (Yes, CMOS_WRITE does outb_p's. -  Paul G.)</div><div class='add'>+	 */</div><div class='add'>+	spin_lock(&amp;rtc_lock);</div><div class='add'>+	CMOS_WRITE(0x00, 0x8f);</div><div class='add'>+	spin_unlock(&amp;rtc_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Switch back to the initial page table.</div><div class='add'>+	 */</div><div class='add'>+	load_cr3(initial_page_table);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Write 0x1234 to absolute memory location 0x472.  The BIOS reads</div><div class='add'>+	 * this on booting to tell it to "Bypass memory test (also warm</div><div class='add'>+	 * boot)".  This seems like a fairly standard thing that gets set by</div><div class='add'>+	 * REBOOT.COM programs, and the previous reset routine did this</div><div class='add'>+	 * too. */</div><div class='add'>+	*((unsigned short *)0x472) = reboot_mode;</div><div class='add'>+</div><div class='add'>+	/* Jump to the identity-mapped low memory code */</div><div class='add'>+	restart_lowmem(type);</div><div class='add'>+}</div><div class='add'>+#ifdef CONFIG_APM_MODULE</div><div class='add'>+EXPORT_SYMBOL(machine_real_restart);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_X86_32 */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot</div><div class='add'>+ */</div><div class='add'>+static int __init set_pci_reboot(const struct dmi_system_id *d)</div><div class='add'>+{</div><div class='add'>+	if (reboot_type != BOOT_CF9) {</div><div class='add'>+		reboot_type = BOOT_CF9;</div><div class='add'>+		printk(KERN_INFO "%s series board detected. "</div><div class='add'>+		       "Selecting PCI-method for reboots.\n", d-&gt;ident);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init set_kbd_reboot(const struct dmi_system_id *d)</div><div class='ctx'> {</div><div class='ctx'> 	if (reboot_type != BOOT_KBD) {</div><div class='hunk'>@@ -159,7 +222,12 @@ static int __init set_kbd_reboot(const struct dmi_system_id *d)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * This is a single dmi_table handling all reboot quirks.  Note that</div><div class='add'>+ * REBOOT_BIOS is only available for 32bit</div><div class='add'>+ */</div><div class='ctx'> static struct dmi_system_id __initdata reboot_dmi_table[] = {</div><div class='add'>+#ifdef CONFIG_X86_32</div><div class='ctx'> 	{	/* Handle problems with rebooting on Dell E520's */</div><div class='ctx'> 		.callback = set_bios_reboot,</div><div class='ctx'> 		.ident = "Dell E520",</div><div class='hunk'>@@ -184,7 +252,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	{       /* Handle problems with rebooting on Dell Optiplex 745's SFF*/</div><div class='add'>+	{	/* Handle problems with rebooting on Dell Optiplex 745's SFF */</div><div class='ctx'> 		.callback = set_bios_reboot,</div><div class='ctx'> 		.ident = "Dell OptiPlex 745",</div><div class='ctx'> 		.matches = {</div><div class='hunk'>@@ -192,7 +260,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	{       /* Handle problems with rebooting on Dell Optiplex 745's DFF*/</div><div class='add'>+	{	/* Handle problems with rebooting on Dell Optiplex 745's DFF */</div><div class='ctx'> 		.callback = set_bios_reboot,</div><div class='ctx'> 		.ident = "Dell OptiPlex 745",</div><div class='ctx'> 		.matches = {</div><div class='hunk'>@@ -201,7 +269,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_BOARD_NAME, "0MM599"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	{       /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */</div><div class='add'>+	{	/* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */</div><div class='ctx'> 		.callback = set_bios_reboot,</div><div class='ctx'> 		.ident = "Dell OptiPlex 745",</div><div class='ctx'> 		.matches = {</div><div class='hunk'>@@ -210,7 +278,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_BOARD_NAME, "0KW626"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	{   /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */</div><div class='add'>+	{	/* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */</div><div class='ctx'> 		.callback = set_bios_reboot,</div><div class='ctx'> 		.ident = "Dell OptiPlex 330",</div><div class='ctx'> 		.matches = {</div><div class='hunk'>@@ -219,7 +287,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_BOARD_NAME, "0KP561"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	{   /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */</div><div class='add'>+	{	/* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */</div><div class='ctx'> 		.callback = set_bios_reboot,</div><div class='ctx'> 		.ident = "Dell OptiPlex 360",</div><div class='ctx'> 		.matches = {</div><div class='hunk'>@@ -228,7 +296,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_BOARD_NAME, "0T656F"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	{	/* Handle problems with rebooting on Dell OptiPlex 760 with 0G919G*/</div><div class='add'>+	{	/* Handle problems with rebooting on Dell OptiPlex 760 with 0G919G */</div><div class='ctx'> 		.callback = set_bios_reboot,</div><div class='ctx'> 		.ident = "Dell OptiPlex 760",</div><div class='ctx'> 		.matches = {</div><div class='hunk'>@@ -301,7 +369,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	{       /* Handle problems with rebooting on ASUS P4S800 */</div><div class='add'>+	{	/* Handle problems with rebooting on ASUS P4S800 */</div><div class='ctx'> 		.callback = set_bios_reboot,</div><div class='ctx'> 		.ident = "ASUS P4S800",</div><div class='ctx'> 		.matches = {</div><div class='hunk'>@@ -309,7 +377,9 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_BOARD_NAME, "P4S800"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	{ /* Handle reboot issue on Acer Aspire one */</div><div class='add'>+#endif /* CONFIG_X86_32 */</div><div class='add'>+</div><div class='add'>+	{	/* Handle reboot issue on Acer Aspire one */</div><div class='ctx'> 		.callback = set_kbd_reboot,</div><div class='ctx'> 		.ident = "Acer Aspire One A110",</div><div class='ctx'> 		.matches = {</div><div class='hunk'>@@ -317,96 +387,6 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_PRODUCT_NAME, "AOA110"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init reboot_init(void)</div><div class='del'>-{</div><div class='del'>-	/* Only do the DMI check if reboot_type hasn't been overridden</div><div class='del'>-	 * on the command line</div><div class='del'>-	 */</div><div class='del'>-	if (reboot_default) {</div><div class='del'>-		dmi_check_system(reboot_dmi_table);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-core_initcall(reboot_init);</div><div class='del'>-</div><div class='del'>-extern const unsigned char machine_real_restart_asm[];</div><div class='del'>-extern const u64 machine_real_restart_gdt[3];</div><div class='del'>-</div><div class='del'>-void machine_real_restart(unsigned int type)</div><div class='del'>-{</div><div class='del'>-	void *restart_va;</div><div class='del'>-	unsigned long restart_pa;</div><div class='del'>-	void (*restart_lowmem)(unsigned int);</div><div class='del'>-	u64 *lowmem_gdt;</div><div class='del'>-</div><div class='del'>-	local_irq_disable();</div><div class='del'>-</div><div class='del'>-	/* Write zero to CMOS register number 0x0f, which the BIOS POST</div><div class='del'>-	   routine will recognize as telling it to do a proper reboot.  (Well</div><div class='del'>-	   that's what this book in front of me says -- it may only apply to</div><div class='del'>-	   the Phoenix BIOS though, it's not clear).  At the same time,</div><div class='del'>-	   disable NMIs by setting the top bit in the CMOS address register,</div><div class='del'>-	   as we're about to do peculiar things to the CPU.  I'm not sure if</div><div class='del'>-	   `outb_p' is needed instead of just `outb'.  Use it to be on the</div><div class='del'>-	   safe side.  (Yes, CMOS_WRITE does outb_p's. -  Paul G.)</div><div class='del'>-	 */</div><div class='del'>-	spin_lock(&amp;rtc_lock);</div><div class='del'>-	CMOS_WRITE(0x00, 0x8f);</div><div class='del'>-	spin_unlock(&amp;rtc_lock);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Switch back to the initial page table.</div><div class='del'>-	 */</div><div class='del'>-	load_cr3(initial_page_table);</div><div class='del'>-</div><div class='del'>-	/* Write 0x1234 to absolute memory location 0x472.  The BIOS reads</div><div class='del'>-	   this on booting to tell it to "Bypass memory test (also warm</div><div class='del'>-	   boot)".  This seems like a fairly standard thing that gets set by</div><div class='del'>-	   REBOOT.COM programs, and the previous reset routine did this</div><div class='del'>-	   too. */</div><div class='del'>-	*((unsigned short *)0x472) = reboot_mode;</div><div class='del'>-</div><div class='del'>-	/* Patch the GDT in the low memory trampoline */</div><div class='del'>-	lowmem_gdt = TRAMPOLINE_SYM(machine_real_restart_gdt);</div><div class='del'>-</div><div class='del'>-	restart_va = TRAMPOLINE_SYM(machine_real_restart_asm);</div><div class='del'>-	restart_pa = virt_to_phys(restart_va);</div><div class='del'>-	restart_lowmem = (void (*)(unsigned int))restart_pa;</div><div class='del'>-</div><div class='del'>-	/* GDT[0]: GDT self-pointer */</div><div class='del'>-	lowmem_gdt[0] =</div><div class='del'>-		(u64)(sizeof(machine_real_restart_gdt) - 1) +</div><div class='del'>-		((u64)virt_to_phys(lowmem_gdt) &lt;&lt; 16);</div><div class='del'>-	/* GDT[1]: 64K real mode code segment */</div><div class='del'>-	lowmem_gdt[1] =</div><div class='del'>-		GDT_ENTRY(0x009b, restart_pa, 0xffff);</div><div class='del'>-</div><div class='del'>-	/* Jump to the identity-mapped low memory code */</div><div class='del'>-	restart_lowmem(type);</div><div class='del'>-}</div><div class='del'>-#ifdef CONFIG_APM_MODULE</div><div class='del'>-EXPORT_SYMBOL(machine_real_restart);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_X86_32 */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot</div><div class='del'>- */</div><div class='del'>-static int __init set_pci_reboot(const struct dmi_system_id *d)</div><div class='del'>-{</div><div class='del'>-	if (reboot_type != BOOT_CF9) {</div><div class='del'>-		reboot_type = BOOT_CF9;</div><div class='del'>-		printk(KERN_INFO "%s series board detected. "</div><div class='del'>-		       "Selecting PCI-method for reboots.\n", d-&gt;ident);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct dmi_system_id __initdata pci_reboot_dmi_table[] = {</div><div class='ctx'> 	{	/* Handle problems with rebooting on Apple MacBook5 */</div><div class='ctx'> 		.callback = set_pci_reboot,</div><div class='ctx'> 		.ident = "Apple MacBook5",</div><div class='hunk'>@@ -474,17 +454,17 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init pci_reboot_init(void)</div><div class='add'>+static int __init reboot_init(void)</div><div class='ctx'> {</div><div class='del'>-	/* Only do the DMI check if reboot_type hasn't been overridden</div><div class='add'>+	/*</div><div class='add'>+	 * Only do the DMI check if reboot_type hasn't been overridden</div><div class='ctx'> 	 * on the command line</div><div class='ctx'> 	 */</div><div class='del'>-	if (reboot_default) {</div><div class='del'>-		dmi_check_system(pci_reboot_dmi_table);</div><div class='del'>-	}</div><div class='add'>+	if (reboot_default)</div><div class='add'>+		dmi_check_system(reboot_dmi_table);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-core_initcall(pci_reboot_init);</div><div class='add'>+core_initcall(reboot_init);</div><div class='ctx'> </div><div class='ctx'> static inline void kb_wait(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -502,14 +482,14 @@ static void vmxoff_nmi(int cpu, struct pt_regs *regs)</div><div class='ctx'> 	cpu_emergency_vmxoff();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Use NMIs as IPIs to tell all CPUs to disable virtualization</div><div class='del'>- */</div><div class='add'>+/* Use NMIs as IPIs to tell all CPUs to disable virtualization */</div><div class='ctx'> static void emergency_vmx_disable_all(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Just make sure we won't change CPUs while doing this */</div><div class='ctx'> 	local_irq_disable();</div><div class='ctx'> </div><div class='del'>-	/* We need to disable VMX on all CPUs before rebooting, otherwise</div><div class='add'>+	/*</div><div class='add'>+	 * We need to disable VMX on all CPUs before rebooting, otherwise</div><div class='ctx'> 	 * we risk hanging up the machine, because the CPU ignore INIT</div><div class='ctx'> 	 * signals when VMX is enabled.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -528,8 +508,7 @@ static void emergency_vmx_disable_all(void)</div><div class='ctx'> 	 * is still enabling VMX.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpu_has_vmx() &amp;&amp; cpu_vmx_enabled()) {</div><div class='del'>-		/* Disable VMX on this CPU.</div><div class='del'>-		 */</div><div class='add'>+		/* Disable VMX on this CPU. */</div><div class='ctx'> 		cpu_vmxoff();</div><div class='ctx'> </div><div class='ctx'> 		/* Halt and disable VMX on the other CPUs */</div><div class='hunk'>@@ -574,12 +553,12 @@ static void native_machine_emergency_restart(void)</div><div class='ctx'> 		/* Could also try the reset bit in the Hammer NB */</div><div class='ctx'> 		switch (reboot_type) {</div><div class='ctx'> 		case BOOT_KBD:</div><div class='del'>-			mach_reboot_fixups(); /* for board specific fixups */</div><div class='add'>+			mach_reboot_fixups(); /* For board specific fixups */</div><div class='ctx'> </div><div class='ctx'> 			for (i = 0; i &lt; 10; i++) {</div><div class='ctx'> 				kb_wait();</div><div class='ctx'> 				udelay(50);</div><div class='del'>-				outb(0xfe, 0x64); /* pulse reset low */</div><div class='add'>+				outb(0xfe, 0x64); /* Pulse reset low */</div><div class='ctx'> 				udelay(50);</div><div class='ctx'> 			}</div><div class='ctx'> 			if (attempt == 0 &amp;&amp; orig_reboot_type == BOOT_ACPI) {</div><div class='hunk'>@@ -621,7 +600,7 @@ static void native_machine_emergency_restart(void)</div><div class='ctx'> </div><div class='ctx'> 		case BOOT_CF9:</div><div class='ctx'> 			port_cf9_safe = true;</div><div class='del'>-			/* fall through */</div><div class='add'>+			/* Fall through */</div><div class='ctx'> </div><div class='ctx'> 		case BOOT_CF9_COND:</div><div class='ctx'> 			if (port_cf9_safe) {</div><div class='hunk'>@@ -659,9 +638,12 @@ void native_machine_shutdown(void)</div><div class='ctx'> 	/* Make certain I only run on the appropriate processor */</div><div class='ctx'> 	set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id));</div><div class='ctx'> </div><div class='del'>-	/* O.K Now that I'm on the appropriate processor,</div><div class='del'>-	 * stop all of the others.</div><div class='add'>+	/*</div><div class='add'>+	 * O.K Now that I'm on the appropriate processor, stop all of the</div><div class='add'>+	 * others. Also disable the local irq to not receive the per-cpu</div><div class='add'>+	 * timer interrupt which may trigger scheduler's load balance.</div><div class='ctx'> 	 */</div><div class='add'>+	local_irq_disable();</div><div class='ctx'> 	stop_other_cpus();</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -697,12 +679,11 @@ static void native_machine_restart(char *__unused)</div><div class='ctx'> </div><div class='ctx'> static void native_machine_halt(void)</div><div class='ctx'> {</div><div class='del'>-	/* stop other cpus and apics */</div><div class='add'>+	/* Stop other cpus and apics */</div><div class='ctx'> 	machine_shutdown();</div><div class='ctx'> </div><div class='ctx'> 	tboot_shutdown(TB_SHUTDOWN_HALT);</div><div class='ctx'> </div><div class='del'>-	/* stop this cpu */</div><div class='ctx'> 	stop_this_cpu(NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -713,7 +694,7 @@ static void native_machine_power_off(void)</div><div class='ctx'> 			machine_shutdown();</div><div class='ctx'> 		pm_power_off();</div><div class='ctx'> 	}</div><div class='del'>-	/* a fallback in case there is no PM info available */</div><div class='add'>+	/* A fallback in case there is no PM info available */</div><div class='ctx'> 	tboot_shutdown(TB_SHUTDOWN_HALT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -775,7 +756,8 @@ static int crash_nmi_callback(unsigned int val, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	cpu = raw_smp_processor_id();</div><div class='ctx'> </div><div class='del'>-	/* Don't do anything if this handler is invoked on crashing cpu.</div><div class='add'>+	/*</div><div class='add'>+	 * Don't do anything if this handler is invoked on crashing cpu.</div><div class='ctx'> 	 * Otherwise, system will completely hang. Crashing cpu can get</div><div class='ctx'> 	 * an NMI if system was initially booted with nmi_watchdog parameter.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -799,7 +781,8 @@ static void smp_send_nmi_allbutself(void)</div><div class='ctx'> 	apic-&gt;send_IPI_allbutself(NMI_VECTOR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Halt all other CPUs, calling the specified function on each of them</div><div class='add'>+/*</div><div class='add'>+ * Halt all other CPUs, calling the specified function on each of them</div><div class='ctx'>  *</div><div class='ctx'>  * This function can be used to halt all other CPUs on crash</div><div class='ctx'>  * or emergency reboot time. The function passed as parameter</div><div class='hunk'>@@ -810,7 +793,7 @@ void nmi_shootdown_cpus(nmi_shootdown_cb callback)</div><div class='ctx'> 	unsigned long msecs;</div><div class='ctx'> 	local_irq_disable();</div><div class='ctx'> </div><div class='del'>-	/* Make a note of crashing cpu. Will be used in NMI callback.*/</div><div class='add'>+	/* Make a note of crashing cpu. Will be used in NMI callback. */</div><div class='ctx'> 	crashing_cpu = safe_smp_processor_id();</div><div class='ctx'> </div><div class='ctx'> 	shootdown_callback = callback;</div><div class='hunk'>@@ -819,8 +802,9 @@ void nmi_shootdown_cpus(nmi_shootdown_cb callback)</div><div class='ctx'> 	/* Would it be better to replace the trap vector here? */</div><div class='ctx'> 	if (register_nmi_handler(NMI_LOCAL, crash_nmi_callback,</div><div class='ctx'> 				 NMI_FLAG_FIRST, "crash"))</div><div class='del'>-		return;		/* return what? */</div><div class='del'>-	/* Ensure the new callback function is set before sending</div><div class='add'>+		return;		/* Return what? */</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure the new callback function is set before sending</div><div class='ctx'> 	 * out the NMI</div><div class='ctx'> 	 */</div><div class='ctx'> 	wmb();</div><div class='head'>diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c<br/>index 1a2901562059..16be6dc14db1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/setup.c</a></div><div class='hunk'>@@ -34,7 +34,6 @@</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='ctx'> #include &lt;linux/root_dev.h&gt;</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -50,6 +49,7 @@</div><div class='ctx'> #include &lt;asm/pci-direct.h&gt;</div><div class='ctx'> #include &lt;linux/init_ohci1394_dma.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_para.h&gt;</div><div class='add'>+#include &lt;linux/dma-contiguous.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -73,7 +73,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mtrr.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='del'>-#include &lt;asm/trampoline.h&gt;</div><div class='add'>+#include &lt;asm/realmode.h&gt;</div><div class='ctx'> #include &lt;asm/e820.h&gt;</div><div class='ctx'> #include &lt;asm/mpspec.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='hunk'>@@ -179,12 +179,6 @@ struct cpuinfo_x86 new_cpu_data __cpuinitdata = {0, 0, 0, 0, -1, 1, 0, 0, -1};</div><div class='ctx'> /* common cpu data for all cpus */</div><div class='ctx'> struct cpuinfo_x86 boot_cpu_data __read_mostly = {0, 0, 0, 0, -1, 1, 0, 0, -1};</div><div class='ctx'> EXPORT_SYMBOL(boot_cpu_data);</div><div class='del'>-static void set_mca_bus(int x)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-	MCA_bus = x;</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> unsigned int def_to_bigsmp;</div><div class='ctx'> </div><div class='hunk'>@@ -340,8 +334,8 @@ static void __init relocate_initrd(void)</div><div class='ctx'> 	memblock_reserve(ramdisk_here, area_size);</div><div class='ctx'> 	initrd_start = ramdisk_here + PAGE_OFFSET;</div><div class='ctx'> 	initrd_end   = initrd_start + ramdisk_size;</div><div class='del'>-	printk(KERN_INFO "Allocated new RAMDISK: %08llx - %08llx\n",</div><div class='del'>-			 ramdisk_here, ramdisk_here + ramdisk_size);</div><div class='add'>+	printk(KERN_INFO "Allocated new RAMDISK: [mem %#010llx-%#010llx]\n",</div><div class='add'>+			 ramdisk_here, ramdisk_here + ramdisk_size - 1);</div><div class='ctx'> </div><div class='ctx'> 	q = (char *)initrd_start;</div><div class='ctx'> </div><div class='hunk'>@@ -372,8 +366,8 @@ static void __init relocate_initrd(void)</div><div class='ctx'> 	/* high pages is not converted by early_res_to_bootmem */</div><div class='ctx'> 	ramdisk_image = boot_params.hdr.ramdisk_image;</div><div class='ctx'> 	ramdisk_size  = boot_params.hdr.ramdisk_size;</div><div class='del'>-	printk(KERN_INFO "Move RAMDISK from %016llx - %016llx to"</div><div class='del'>-		" %08llx - %08llx\n",</div><div class='add'>+	printk(KERN_INFO "Move RAMDISK from [mem %#010llx-%#010llx] to"</div><div class='add'>+		" [mem %#010llx-%#010llx]\n",</div><div class='ctx'> 		ramdisk_image, ramdisk_image + ramdisk_size - 1,</div><div class='ctx'> 		ramdisk_here, ramdisk_here + ramdisk_size - 1);</div><div class='ctx'> }</div><div class='hunk'>@@ -393,14 +387,13 @@ static void __init reserve_initrd(void)</div><div class='ctx'> 	initrd_start = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (ramdisk_size &gt;= (end_of_lowmem&gt;&gt;1)) {</div><div class='del'>-		memblock_free(ramdisk_image, ramdisk_end - ramdisk_image);</div><div class='del'>-		printk(KERN_ERR "initrd too large to handle, "</div><div class='del'>-		       "disabling initrd\n");</div><div class='del'>-		return;</div><div class='add'>+		panic("initrd too large to handle, "</div><div class='add'>+		       "disabling initrd (%lld needed, %lld available)\n",</div><div class='add'>+		       ramdisk_size, end_of_lowmem&gt;&gt;1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "RAMDISK: %08llx - %08llx\n", ramdisk_image,</div><div class='del'>-			ramdisk_end);</div><div class='add'>+	printk(KERN_INFO "RAMDISK: [mem %#010llx-%#010llx]\n", ramdisk_image,</div><div class='add'>+			ramdisk_end - 1);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	if (ramdisk_end &lt;= end_of_lowmem) {</div><div class='hunk'>@@ -717,7 +710,6 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	apm_info.bios = boot_params.apm_bios_info;</div><div class='ctx'> 	ist_info = boot_params.ist_info;</div><div class='ctx'> 	if (boot_params.sys_desc_table.length != 0) {</div><div class='del'>-		set_mca_bus(boot_params.sys_desc_table.table[3] &amp; 0x2);</div><div class='ctx'> 		machine_id = boot_params.sys_desc_table.table[0];</div><div class='ctx'> 		machine_submodel_id = boot_params.sys_desc_table.table[1];</div><div class='ctx'> 		BIOS_revision = boot_params.sys_desc_table.table[2];</div><div class='hunk'>@@ -914,10 +906,10 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	setup_bios_corruption_check();</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	printk(KERN_DEBUG "initial memory mapped : 0 - %08lx\n",</div><div class='del'>-			max_pfn_mapped&lt;&lt;PAGE_SHIFT);</div><div class='add'>+	printk(KERN_DEBUG "initial memory mapped: [mem 0x00000000-%#010lx]\n",</div><div class='add'>+			(max_pfn_mapped&lt;&lt;PAGE_SHIFT) - 1);</div><div class='ctx'> </div><div class='del'>-	setup_trampolines();</div><div class='add'>+	setup_real_mode();</div><div class='ctx'> </div><div class='ctx'> 	init_gbpages();</div><div class='ctx'> </div><div class='hunk'>@@ -934,6 +926,7 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> 	memblock.current_limit = get_max_mapped();</div><div class='add'>+	dma_contiguous_reserve(0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * NOTE: On x86-32, only from this point on, fixmaps are ready for use.</div><div class='hunk'>@@ -975,6 +968,8 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	if (boot_cpu_data.cpuid_level &gt;= 0) {</div><div class='ctx'> 		/* A CPU has %cr4 if and only if it has CPUID */</div><div class='ctx'> 		mmu_cr4_features = read_cr4();</div><div class='add'>+		if (trampoline_cr4_features)</div><div class='add'>+			*trampoline_cr4_features = mmu_cr4_features;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='hunk'>@@ -1012,7 +1007,8 @@ void __init setup_arch(char **cmdline_p)</div><div class='ctx'> 	init_cpu_to_node();</div><div class='ctx'> </div><div class='ctx'> 	init_apic_mappings();</div><div class='del'>-	ioapic_and_gsi_init();</div><div class='add'>+	if (x86_io_apic_ops.init)</div><div class='add'>+		x86_io_apic_ops.init();</div><div class='ctx'> </div><div class='ctx'> 	kvm_guest_init();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c<br/>index 71f4727da373..5a98aa272184 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/setup_percpu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/setup_percpu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/setup_percpu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/setup_percpu.c</a></div><div class='hunk'>@@ -185,10 +185,22 @@ void __init setup_per_cpu_areas(void)</div><div class='ctx'> #endif</div><div class='ctx'> 	rc = -EINVAL;</div><div class='ctx'> 	if (pcpu_chosen_fc != PCPU_FC_PAGE) {</div><div class='del'>-		const size_t atom_size = cpu_has_pse ? PMD_SIZE : PAGE_SIZE;</div><div class='ctx'> 		const size_t dyn_size = PERCPU_MODULE_RESERVE +</div><div class='ctx'> 			PERCPU_DYNAMIC_RESERVE - PERCPU_FIRST_CHUNK_RESERVE;</div><div class='add'>+		size_t atom_size;</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * On 64bit, use PMD_SIZE for atom_size so that embedded</div><div class='add'>+		 * percpu areas are aligned to PMD.  This, in the future,</div><div class='add'>+		 * can also allow using PMD mappings in vmalloc area.  Use</div><div class='add'>+		 * PAGE_SIZE on 32bit as vmalloc space is highly contended</div><div class='add'>+		 * and large vmalloc area allocs can easily fail.</div><div class='add'>+		 */</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+		atom_size = PMD_SIZE;</div><div class='add'>+#else</div><div class='add'>+		atom_size = PAGE_SIZE;</div><div class='add'>+#endif</div><div class='ctx'> 		rc = pcpu_embed_first_chunk(PERCPU_FIRST_CHUNK_RESERVE,</div><div class='ctx'> 					    dyn_size, atom_size,</div><div class='ctx'> 					    pcpu_cpu_distance,</div><div class='head'>diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c<br/>index 115eac431483..21af737053aa 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/signal.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/personality.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/user-return-notifier.h&gt;</div><div class='add'>+#include &lt;linux/uprobes.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/ucontext.h&gt;</div><div class='hunk'>@@ -478,18 +479,8 @@ asmlinkage int</div><div class='ctx'> sys_sigsuspend(int history0, int history1, old_sigset_t mask)</div><div class='ctx'> {</div><div class='ctx'> 	sigset_t blocked;</div><div class='del'>-</div><div class='del'>-	current-&gt;saved_sigmask = current-&gt;blocked;</div><div class='del'>-</div><div class='del'>-	mask &amp;= _BLOCKABLE;</div><div class='ctx'> 	siginitset(&amp;blocked, mask);</div><div class='del'>-	set_current_blocked(&amp;blocked);</div><div class='del'>-</div><div class='del'>-	current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-	schedule();</div><div class='del'>-</div><div class='del'>-	set_restore_sigmask();</div><div class='del'>-	return -ERESTARTNOHAND;</div><div class='add'>+	return sigsuspend(&amp;blocked);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> asmlinkage int</div><div class='hunk'>@@ -564,7 +555,6 @@ unsigned long sys_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 				    sizeof(frame-&gt;extramask))))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;sc, &amp;ax))</div><div class='hunk'>@@ -590,7 +580,6 @@ long sys_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext, &amp;ax))</div><div class='hunk'>@@ -656,42 +645,28 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,</div><div class='ctx'> 		struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	int usig = signr_convert(sig);</div><div class='del'>-	sigset_t *set = &amp;current-&gt;blocked;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK)</div><div class='del'>-		set = &amp;current-&gt;saved_sigmask;</div><div class='add'>+	sigset_t *set = sigmask_to_save();</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the stack frame */</div><div class='ctx'> 	if (is_ia32) {</div><div class='ctx'> 		if (ka-&gt;sa.sa_flags &amp; SA_SIGINFO)</div><div class='del'>-			ret = ia32_setup_rt_frame(usig, ka, info, set, regs);</div><div class='add'>+			return ia32_setup_rt_frame(usig, ka, info, set, regs);</div><div class='ctx'> 		else</div><div class='del'>-			ret = ia32_setup_frame(usig, ka, set, regs);</div><div class='add'>+			return ia32_setup_frame(usig, ka, set, regs);</div><div class='ctx'> #ifdef CONFIG_X86_X32_ABI</div><div class='ctx'> 	} else if (is_x32) {</div><div class='del'>-		ret = x32_setup_rt_frame(usig, ka, info,</div><div class='add'>+		return x32_setup_rt_frame(usig, ka, info,</div><div class='ctx'> 					 (compat_sigset_t *)set, regs);</div><div class='ctx'> #endif</div><div class='ctx'> 	} else {</div><div class='del'>-		ret = __setup_rt_frame(sig, ka, info, set, regs);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ret) {</div><div class='del'>-		force_sigsegv(sig, current);</div><div class='del'>-		return -EFAULT;</div><div class='add'>+		return __setup_rt_frame(sig, ka, info, set, regs);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='add'>+static void</div><div class='ctx'> handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='ctx'> 		struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='ctx'> 	/* Are we from a system call? */</div><div class='ctx'> 	if (syscall_get_nr(current, regs) &gt;= 0) {</div><div class='ctx'> 		/* If so, check system call restarting.. */</div><div class='hunk'>@@ -722,10 +697,10 @@ handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='ctx'> 	    likely(test_and_clear_thread_flag(TIF_FORCED_TF)))</div><div class='ctx'> 		regs-&gt;flags &amp;= ~X86_EFLAGS_TF;</div><div class='ctx'> </div><div class='del'>-	ret = setup_rt_frame(sig, ka, info, regs);</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (setup_rt_frame(sig, ka, info, regs) &lt; 0) {</div><div class='add'>+		force_sigsegv(sig, current);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Clear the direction flag as per the ABI for function entry.</div><div class='hunk'>@@ -740,12 +715,8 @@ handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,</div><div class='ctx'> 	 */</div><div class='ctx'> 	regs-&gt;flags &amp;= ~X86_EFLAGS_TF;</div><div class='ctx'> </div><div class='del'>-	block_sigmask(ka, sig);</div><div class='del'>-</div><div class='del'>-	tracehook_signal_handler(sig, info, ka, regs,</div><div class='del'>-				 test_thread_flag(TIF_SINGLESTEP));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	signal_delivered(sig, info, ka, regs,</div><div class='add'>+			 test_thread_flag(TIF_SINGLESTEP));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='hunk'>@@ -766,16 +737,6 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * We want the common case to go fast, which is why we may in certain</div><div class='del'>-	 * cases get here from kernel mode. Just return without doing anything</div><div class='del'>-	 * if so.</div><div class='del'>-	 * X86_32: vm86 regs switched out by assembly code before reaching</div><div class='del'>-	 * here, so testing against kernel CS suffices.</div><div class='del'>-	 */</div><div class='del'>-	if (!user_mode(regs))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='ctx'> 	if (signr &gt; 0) {</div><div class='ctx'> 		/* Whee! Actually deliver the signal.  */</div><div class='hunk'>@@ -805,10 +766,7 @@ static void do_signal(struct pt_regs *regs)</div><div class='ctx'> 	 * If there's no signal to deliver, we just put the saved sigmask</div><div class='ctx'> 	 * back.</div><div class='ctx'> 	 */</div><div class='del'>-	if (current_thread_info()-&gt;status &amp; TS_RESTORE_SIGMASK) {</div><div class='del'>-		current_thread_info()-&gt;status &amp;= ~TS_RESTORE_SIGMASK;</div><div class='del'>-		set_current_blocked(&amp;current-&gt;saved_sigmask);</div><div class='del'>-	}</div><div class='add'>+	restore_saved_sigmask();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -824,6 +782,11 @@ do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)</div><div class='ctx'> 		mce_notify_process();</div><div class='ctx'> #endif /* CONFIG_X86_64 &amp;&amp; CONFIG_X86_MCE */</div><div class='ctx'> </div><div class='add'>+	if (thread_info_flags &amp; _TIF_UPROBE) {</div><div class='add'>+		clear_thread_flag(TIF_UPROBE);</div><div class='add'>+		uprobe_notify_resume(regs);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* deal with pending signal delivery */</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_SIGPENDING)</div><div class='ctx'> 		do_signal(regs);</div><div class='hunk'>@@ -831,8 +794,6 @@ do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_NOTIFY_RESUME) {</div><div class='ctx'> 		clear_thread_flag(TIF_NOTIFY_RESUME);</div><div class='ctx'> 		tracehook_notify_resume(regs);</div><div class='del'>-		if (current-&gt;replacement_session_keyring)</div><div class='del'>-			key_replace_session_keyring();</div><div class='ctx'> 	}</div><div class='ctx'> 	if (thread_info_flags &amp; _TIF_USER_RETURN_NOTIFY)</div><div class='ctx'> 		fire_user_return_notifiers();</div><div class='hunk'>@@ -940,7 +901,6 @@ asmlinkage long sys32_x32_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, &amp;frame-&gt;uc.uc_mcontext, &amp;ax))</div><div class='head'>diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c<br/>index 66c74f481cab..48d2b7ded422 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/smp.c</a></div><div class='hunk'>@@ -109,6 +109,9 @@</div><div class='ctx'>  *	about nothing of note with C stepping upwards.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+static atomic_t stopping_cpu = ATOMIC_INIT(-1);</div><div class='add'>+static bool smp_no_nmi_ipi = false;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * this function sends a 'reschedule' IPI to another CPU.</div><div class='ctx'>  * it goes straight through and wastes no time serializing</div><div class='hunk'>@@ -149,8 +152,6 @@ void native_send_call_func_ipi(const struct cpumask *mask)</div><div class='ctx'> 	free_cpumask_var(allbutself);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static atomic_t stopping_cpu = ATOMIC_INIT(-1);</div><div class='del'>-</div><div class='ctx'> static int smp_stop_nmi_callback(unsigned int val, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	/* We are registered on stopping cpu too, avoid spurious NMI */</div><div class='hunk'>@@ -162,7 +163,19 @@ static int smp_stop_nmi_callback(unsigned int val, struct pt_regs *regs)</div><div class='ctx'> 	return NMI_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void native_nmi_stop_other_cpus(int wait)</div><div class='add'>+/*</div><div class='add'>+ * this function calls the 'stop' function on all other CPUs in the system.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+asmlinkage void smp_reboot_interrupt(void)</div><div class='add'>+{</div><div class='add'>+	ack_APIC_irq();</div><div class='add'>+	irq_enter();</div><div class='add'>+	stop_this_cpu(NULL);</div><div class='add'>+	irq_exit();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void native_stop_other_cpus(int wait)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	unsigned long timeout;</div><div class='hunk'>@@ -174,20 +187,25 @@ static void native_nmi_stop_other_cpus(int wait)</div><div class='ctx'> 	 * Use an own vector here because smp_call_function</div><div class='ctx'> 	 * does lots of things not suitable in a panic situation.</div><div class='ctx'> 	 */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We start by using the REBOOT_VECTOR irq.</div><div class='add'>+	 * The irq is treated as a sync point to allow critical</div><div class='add'>+	 * regions of code on other cpus to release their spin locks</div><div class='add'>+	 * and re-enable irqs.  Jumping straight to an NMI might</div><div class='add'>+	 * accidentally cause deadlocks with further shutdown/panic</div><div class='add'>+	 * code.  By syncing, we give the cpus up to one second to</div><div class='add'>+	 * finish their work before we force them off with the NMI.</div><div class='add'>+	 */</div><div class='ctx'> 	if (num_online_cpus() &gt; 1) {</div><div class='ctx'> 		/* did someone beat us here? */</div><div class='ctx'> 		if (atomic_cmpxchg(&amp;stopping_cpu, -1, safe_smp_processor_id()) != -1)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		if (register_nmi_handler(NMI_LOCAL, smp_stop_nmi_callback,</div><div class='del'>-					 NMI_FLAG_FIRST, "smp_stop"))</div><div class='del'>-			/* Note: we ignore failures here */</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-		/* sync above data before sending NMI */</div><div class='add'>+		/* sync above data before sending IRQ */</div><div class='ctx'> 		wmb();</div><div class='ctx'> </div><div class='del'>-		apic-&gt;send_IPI_allbutself(NMI_VECTOR);</div><div class='add'>+		apic-&gt;send_IPI_allbutself(REBOOT_VECTOR);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Don't wait longer than a second if the caller</div><div class='hunk'>@@ -197,63 +215,37 @@ static void native_nmi_stop_other_cpus(int wait)</div><div class='ctx'> 		while (num_online_cpus() &gt; 1 &amp;&amp; (wait || timeout--))</div><div class='ctx'> 			udelay(1);</div><div class='ctx'> 	}</div><div class='add'>+	</div><div class='add'>+	/* if the REBOOT_VECTOR didn't work, try with the NMI */</div><div class='add'>+	if ((num_online_cpus() &gt; 1) &amp;&amp; (!smp_no_nmi_ipi))  {</div><div class='add'>+		if (register_nmi_handler(NMI_LOCAL, smp_stop_nmi_callback,</div><div class='add'>+					 NMI_FLAG_FIRST, "smp_stop"))</div><div class='add'>+			/* Note: we ignore failures here */</div><div class='add'>+			/* Hope the REBOOT_IRQ is good enough */</div><div class='add'>+			goto finish;</div><div class='ctx'> </div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	disable_local_APIC();</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * this function calls the 'stop' function on all other CPUs in the system.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-asmlinkage void smp_reboot_interrupt(void)</div><div class='del'>-{</div><div class='del'>-	ack_APIC_irq();</div><div class='del'>-	irq_enter();</div><div class='del'>-	stop_this_cpu(NULL);</div><div class='del'>-	irq_exit();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void native_irq_stop_other_cpus(int wait)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned long timeout;</div><div class='add'>+		/* sync above data before sending IRQ */</div><div class='add'>+		wmb();</div><div class='ctx'> </div><div class='del'>-	if (reboot_force)</div><div class='del'>-		return;</div><div class='add'>+		pr_emerg("Shutting down cpus with NMI\n");</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Use an own vector here because smp_call_function</div><div class='del'>-	 * does lots of things not suitable in a panic situation.</div><div class='del'>-	 * On most systems we could also use an NMI here,</div><div class='del'>-	 * but there are a few systems around where NMI</div><div class='del'>-	 * is problematic so stay with an non NMI for now</div><div class='del'>-	 * (this implies we cannot stop CPUs spinning with irq off</div><div class='del'>-	 * currently)</div><div class='del'>-	 */</div><div class='del'>-	if (num_online_cpus() &gt; 1) {</div><div class='del'>-		apic-&gt;send_IPI_allbutself(REBOOT_VECTOR);</div><div class='add'>+		apic-&gt;send_IPI_allbutself(NMI_VECTOR);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * Don't wait longer than a second if the caller</div><div class='add'>+		 * Don't wait longer than a 10 ms if the caller</div><div class='ctx'> 		 * didn't ask us to wait.</div><div class='ctx'> 		 */</div><div class='del'>-		timeout = USEC_PER_SEC;</div><div class='add'>+		timeout = USEC_PER_MSEC * 10;</div><div class='ctx'> 		while (num_online_cpus() &gt; 1 &amp;&amp; (wait || timeout--))</div><div class='ctx'> 			udelay(1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+finish:</div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> 	disable_local_APIC();</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void native_smp_disable_nmi_ipi(void)</div><div class='del'>-{</div><div class='del'>-	smp_ops.stop_other_cpus = native_irq_stop_other_cpus;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Reschedule call back.</div><div class='ctx'>  */</div><div class='hunk'>@@ -287,8 +279,8 @@ void smp_call_function_single_interrupt(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> static int __init nonmi_ipi_setup(char *str)</div><div class='ctx'> {</div><div class='del'>-        native_smp_disable_nmi_ipi();</div><div class='del'>-        return 1;</div><div class='add'>+	smp_no_nmi_ipi = true;</div><div class='add'>+	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> __setup("nonmi_ipi", nonmi_ipi_setup);</div><div class='hunk'>@@ -298,7 +290,7 @@ struct smp_ops smp_ops = {</div><div class='ctx'> 	.smp_prepare_cpus	= native_smp_prepare_cpus,</div><div class='ctx'> 	.smp_cpus_done		= native_smp_cpus_done,</div><div class='ctx'> </div><div class='del'>-	.stop_other_cpus	= native_nmi_stop_other_cpus,</div><div class='add'>+	.stop_other_cpus	= native_stop_other_cpus,</div><div class='ctx'> 	.smp_send_reschedule	= native_smp_send_reschedule,</div><div class='ctx'> </div><div class='ctx'> 	.cpu_up			= native_cpu_up,</div><div class='head'>diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c<br/>index 6e1e406038c2..3fab55bea29b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/smpboot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/smpboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/smpboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/smpboot.c</a></div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/idle.h&gt;</div><div class='del'>-#include &lt;asm/trampoline.h&gt;</div><div class='add'>+#include &lt;asm/realmode.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/numa.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='hunk'>@@ -73,23 +73,13 @@</div><div class='ctx'> #include &lt;asm/smpboot_hooks.h&gt;</div><div class='ctx'> #include &lt;asm/i8259.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/realmode.h&gt;</div><div class='add'>+</div><div class='ctx'> /* State of each CPU */</div><div class='ctx'> DEFINE_PER_CPU(int, cpu_state) = { 0 };</div><div class='ctx'> </div><div class='del'>-/* Store all idle threads, this can be reused instead of creating</div><div class='del'>-* a new thread. Also avoids complicated thread destroy functionality</div><div class='del'>-* for idle threads.</div><div class='del'>-*/</div><div class='ctx'> #ifdef CONFIG_HOTPLUG_CPU</div><div class='ctx'> /*</div><div class='del'>- * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is</div><div class='del'>- * removed after init for !CONFIG_HOTPLUG_CPU.</div><div class='del'>- */</div><div class='del'>-static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);</div><div class='del'>-#define get_idle_for_cpu(x)      (per_cpu(idle_thread_array, x))</div><div class='del'>-#define set_idle_for_cpu(x, p)   (per_cpu(idle_thread_array, x) = (p))</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * We need this for trampoline_base protection from concurrent accesses when</div><div class='ctx'>  * off- and onlining cores wildly.</div><div class='ctx'>  */</div><div class='hunk'>@@ -97,20 +87,16 @@ static DEFINE_MUTEX(x86_cpu_hotplug_driver_mutex);</div><div class='ctx'> </div><div class='ctx'> void cpu_hotplug_driver_lock(void)</div><div class='ctx'> {</div><div class='del'>-        mutex_lock(&amp;x86_cpu_hotplug_driver_mutex);</div><div class='add'>+	mutex_lock(&amp;x86_cpu_hotplug_driver_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void cpu_hotplug_driver_unlock(void)</div><div class='ctx'> {</div><div class='del'>-        mutex_unlock(&amp;x86_cpu_hotplug_driver_mutex);</div><div class='add'>+	mutex_unlock(&amp;x86_cpu_hotplug_driver_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> ssize_t arch_cpu_probe(const char *buf, size_t count) { return -1; }</div><div class='ctx'> ssize_t arch_cpu_release(const char *buf, size_t count) { return -1; }</div><div class='del'>-#else</div><div class='del'>-static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;</div><div class='del'>-#define get_idle_for_cpu(x)      (idle_thread_array[(x)])</div><div class='del'>-#define set_idle_for_cpu(x, p)   (idle_thread_array[(x)] = (p))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* Number of siblings per CPU package */</div><div class='hunk'>@@ -315,59 +301,99 @@ void __cpuinit smp_store_cpu_info(int id)</div><div class='ctx'> 		identify_secondary_cpu(c);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __cpuinit link_thread_siblings(int cpu1, int cpu2)</div><div class='add'>+static bool __cpuinit</div><div class='add'>+topology_sane(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o, const char *name)</div><div class='add'>+{</div><div class='add'>+	int cpu1 = c-&gt;cpu_index, cpu2 = o-&gt;cpu_index;</div><div class='add'>+</div><div class='add'>+	return !WARN_ONCE(cpu_to_node(cpu1) != cpu_to_node(cpu2),</div><div class='add'>+		"sched: CPU #%d's %s-sibling CPU #%d is not on the same node! "</div><div class='add'>+		"[node: %d != %d]. Ignoring dependency.\n",</div><div class='add'>+		cpu1, name, cpu2, cpu_to_node(cpu1), cpu_to_node(cpu2));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define link_mask(_m, c1, c2)						\</div><div class='add'>+do {									\</div><div class='add'>+	cpumask_set_cpu((c1), cpu_##_m##_mask(c2));			\</div><div class='add'>+	cpumask_set_cpu((c2), cpu_##_m##_mask(c1));			\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+static bool __cpuinit match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)</div><div class='ctx'> {</div><div class='del'>-	cpumask_set_cpu(cpu1, cpu_sibling_mask(cpu2));</div><div class='del'>-	cpumask_set_cpu(cpu2, cpu_sibling_mask(cpu1));</div><div class='del'>-	cpumask_set_cpu(cpu1, cpu_core_mask(cpu2));</div><div class='del'>-	cpumask_set_cpu(cpu2, cpu_core_mask(cpu1));</div><div class='del'>-	cpumask_set_cpu(cpu1, cpu_llc_shared_mask(cpu2));</div><div class='del'>-	cpumask_set_cpu(cpu2, cpu_llc_shared_mask(cpu1));</div><div class='add'>+	if (cpu_has(c, X86_FEATURE_TOPOEXT)) {</div><div class='add'>+		int cpu1 = c-&gt;cpu_index, cpu2 = o-&gt;cpu_index;</div><div class='add'>+</div><div class='add'>+		if (c-&gt;phys_proc_id == o-&gt;phys_proc_id &amp;&amp;</div><div class='add'>+		    per_cpu(cpu_llc_id, cpu1) == per_cpu(cpu_llc_id, cpu2) &amp;&amp;</div><div class='add'>+		    c-&gt;compute_unit_id == o-&gt;compute_unit_id)</div><div class='add'>+			return topology_sane(c, o, "smt");</div><div class='add'>+</div><div class='add'>+	} else if (c-&gt;phys_proc_id == o-&gt;phys_proc_id &amp;&amp;</div><div class='add'>+		   c-&gt;cpu_core_id == o-&gt;cpu_core_id) {</div><div class='add'>+		return topology_sane(c, o, "smt");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool __cpuinit match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)</div><div class='add'>+{</div><div class='add'>+	int cpu1 = c-&gt;cpu_index, cpu2 = o-&gt;cpu_index;</div><div class='add'>+</div><div class='add'>+	if (per_cpu(cpu_llc_id, cpu1) != BAD_APICID &amp;&amp;</div><div class='add'>+	    per_cpu(cpu_llc_id, cpu1) == per_cpu(cpu_llc_id, cpu2))</div><div class='add'>+		return topology_sane(c, o, "llc");</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool __cpuinit match_mc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)</div><div class='add'>+{</div><div class='add'>+	if (c-&gt;phys_proc_id == o-&gt;phys_proc_id)</div><div class='add'>+		return topology_sane(c, o, "mc");</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> void __cpuinit set_cpu_sibling_map(int cpu)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	bool has_mc = boot_cpu_data.x86_max_cores &gt; 1;</div><div class='add'>+	bool has_smt = smp_num_siblings &gt; 1;</div><div class='ctx'> 	struct cpuinfo_x86 *c = &amp;cpu_data(cpu);</div><div class='add'>+	struct cpuinfo_x86 *o;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	cpumask_set_cpu(cpu, cpu_sibling_setup_mask);</div><div class='ctx'> </div><div class='del'>-	if (smp_num_siblings &gt; 1) {</div><div class='del'>-		for_each_cpu(i, cpu_sibling_setup_mask) {</div><div class='del'>-			struct cpuinfo_x86 *o = &amp;cpu_data(i);</div><div class='del'>-</div><div class='del'>-			if (cpu_has(c, X86_FEATURE_TOPOEXT)) {</div><div class='del'>-				if (c-&gt;phys_proc_id == o-&gt;phys_proc_id &amp;&amp;</div><div class='del'>-				    per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i) &amp;&amp;</div><div class='del'>-				    c-&gt;compute_unit_id == o-&gt;compute_unit_id)</div><div class='del'>-					link_thread_siblings(cpu, i);</div><div class='del'>-			} else if (c-&gt;phys_proc_id == o-&gt;phys_proc_id &amp;&amp;</div><div class='del'>-				   c-&gt;cpu_core_id == o-&gt;cpu_core_id) {</div><div class='del'>-				link_thread_siblings(cpu, i);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='add'>+	if (!has_smt &amp;&amp; !has_mc) {</div><div class='ctx'> 		cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));</div><div class='add'>+		cpumask_set_cpu(cpu, cpu_llc_shared_mask(cpu));</div><div class='add'>+		cpumask_set_cpu(cpu, cpu_core_mask(cpu));</div><div class='add'>+		c-&gt;booted_cores = 1;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cpumask_set_cpu(cpu, cpu_llc_shared_mask(cpu));</div><div class='add'>+	for_each_cpu(i, cpu_sibling_setup_mask) {</div><div class='add'>+		o = &amp;cpu_data(i);</div><div class='add'>+</div><div class='add'>+		if ((i == cpu) || (has_smt &amp;&amp; match_smt(c, o)))</div><div class='add'>+			link_mask(sibling, cpu, i);</div><div class='add'>+</div><div class='add'>+		if ((i == cpu) || (has_mc &amp;&amp; match_llc(c, o)))</div><div class='add'>+			link_mask(llc_shared, cpu, i);</div><div class='ctx'> </div><div class='del'>-	if (__this_cpu_read(cpu_info.x86_max_cores) == 1) {</div><div class='del'>-		cpumask_copy(cpu_core_mask(cpu), cpu_sibling_mask(cpu));</div><div class='del'>-		c-&gt;booted_cores = 1;</div><div class='del'>-		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * This needs a separate iteration over the cpus because we rely on all</div><div class='add'>+	 * cpu_sibling_mask links to be set-up.</div><div class='add'>+	 */</div><div class='ctx'> 	for_each_cpu(i, cpu_sibling_setup_mask) {</div><div class='del'>-		if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &amp;&amp;</div><div class='del'>-		    per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {</div><div class='del'>-			cpumask_set_cpu(i, cpu_llc_shared_mask(cpu));</div><div class='del'>-			cpumask_set_cpu(cpu, cpu_llc_shared_mask(i));</div><div class='del'>-		}</div><div class='del'>-		if (c-&gt;phys_proc_id == cpu_data(i).phys_proc_id) {</div><div class='del'>-			cpumask_set_cpu(i, cpu_core_mask(cpu));</div><div class='del'>-			cpumask_set_cpu(cpu, cpu_core_mask(i));</div><div class='add'>+		o = &amp;cpu_data(i);</div><div class='add'>+</div><div class='add'>+		if ((i == cpu) || (has_mc &amp;&amp; match_mc(c, o))) {</div><div class='add'>+			link_mask(core, cpu, i);</div><div class='add'>+</div><div class='ctx'> 			/*</div><div class='ctx'> 			 *  Does this new cpu bringup a new core?</div><div class='ctx'> 			 */</div><div class='hunk'>@@ -393,16 +419,7 @@ void __cpuinit set_cpu_sibling_map(int cpu)</div><div class='ctx'> /* maps the cpu to the sched domain representing multi-core */</div><div class='ctx'> const struct cpumask *cpu_coregroup_mask(int cpu)</div><div class='ctx'> {</div><div class='del'>-	struct cpuinfo_x86 *c = &amp;cpu_data(cpu);</div><div class='del'>-	/*</div><div class='del'>-	 * For perf, we return last level cache shared map.</div><div class='del'>-	 * And for power savings, we return cpu_core_map</div><div class='del'>-	 */</div><div class='del'>-	if ((sched_mc_power_savings || sched_smt_power_savings) &amp;&amp;</div><div class='del'>-	    !(cpu_has(c, X86_FEATURE_AMD_DCM)))</div><div class='del'>-		return cpu_core_mask(cpu);</div><div class='del'>-	else</div><div class='del'>-		return cpu_llc_shared_mask(cpu);</div><div class='add'>+	return cpu_llc_shared_mask(cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void impress_friends(void)</div><div class='hunk'>@@ -618,22 +635,6 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)</div><div class='ctx'> 	return (send_status | accept_status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct create_idle {</div><div class='del'>-	struct work_struct work;</div><div class='del'>-	struct task_struct *idle;</div><div class='del'>-	struct completion done;</div><div class='del'>-	int cpu;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __cpuinit do_fork_idle(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct create_idle *c_idle =</div><div class='del'>-		container_of(work, struct create_idle, work);</div><div class='del'>-</div><div class='del'>-	c_idle-&gt;idle = fork_idle(c_idle-&gt;cpu);</div><div class='del'>-	complete(&amp;c_idle-&gt;done);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* reduce the number of lines printed when booting a large cpu count system */</div><div class='ctx'> static void __cpuinit announce_cpu(int cpu, int apicid)</div><div class='ctx'> {</div><div class='hunk'>@@ -660,61 +661,35 @@ static void __cpuinit announce_cpu(int cpu, int apicid)</div><div class='ctx'>  * Returns zero if CPU booted OK, else error code from</div><div class='ctx'>  * -&gt;wakeup_secondary_cpu.</div><div class='ctx'>  */</div><div class='del'>-static int __cpuinit do_boot_cpu(int apicid, int cpu)</div><div class='add'>+static int __cpuinit do_boot_cpu(int apicid, int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='add'>+	volatile u32 *trampoline_status =</div><div class='add'>+		(volatile u32 *) __va(real_mode_header-&gt;trampoline_status);</div><div class='add'>+	/* start_ip had better be page-aligned! */</div><div class='add'>+	unsigned long start_ip = real_mode_header-&gt;trampoline_start;</div><div class='add'>+</div><div class='ctx'> 	unsigned long boot_error = 0;</div><div class='del'>-	unsigned long start_ip;</div><div class='ctx'> 	int timeout;</div><div class='del'>-	struct create_idle c_idle = {</div><div class='del'>-		.cpu	= cpu,</div><div class='del'>-		.done	= COMPLETION_INITIALIZER_ONSTACK(c_idle.done),</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	INIT_WORK_ONSTACK(&amp;c_idle.work, do_fork_idle);</div><div class='ctx'> </div><div class='ctx'> 	alternatives_smp_switch(1);</div><div class='ctx'> </div><div class='del'>-	c_idle.idle = get_idle_for_cpu(cpu);</div><div class='add'>+	idle-&gt;thread.sp = (unsigned long) (((struct pt_regs *)</div><div class='add'>+			  (THREAD_SIZE +  task_stack_page(idle))) - 1);</div><div class='add'>+	per_cpu(current_task, cpu) = idle;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * We can't use kernel_thread since we must avoid to</div><div class='del'>-	 * reschedule the child.</div><div class='del'>-	 */</div><div class='del'>-	if (c_idle.idle) {</div><div class='del'>-		c_idle.idle-&gt;thread.sp = (unsigned long) (((struct pt_regs *)</div><div class='del'>-			(THREAD_SIZE +  task_stack_page(c_idle.idle))) - 1);</div><div class='del'>-		init_idle(c_idle.idle, cpu);</div><div class='del'>-		goto do_rest;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	schedule_work(&amp;c_idle.work);</div><div class='del'>-	wait_for_completion(&amp;c_idle.done);</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(c_idle.idle)) {</div><div class='del'>-		printk("failed fork for CPU %d\n", cpu);</div><div class='del'>-		destroy_work_on_stack(&amp;c_idle.work);</div><div class='del'>-		return PTR_ERR(c_idle.idle);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	set_idle_for_cpu(cpu, c_idle.idle);</div><div class='del'>-do_rest:</div><div class='del'>-	per_cpu(current_task, cpu) = c_idle.idle;</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> 	/* Stack for startup_32 can be just as for start_secondary onwards */</div><div class='ctx'> 	irq_ctx_init(cpu);</div><div class='ctx'> #else</div><div class='del'>-	clear_tsk_thread_flag(c_idle.idle, TIF_FORK);</div><div class='add'>+	clear_tsk_thread_flag(idle, TIF_FORK);</div><div class='ctx'> 	initial_gs = per_cpu_offset(cpu);</div><div class='ctx'> 	per_cpu(kernel_stack, cpu) =</div><div class='del'>-		(unsigned long)task_stack_page(c_idle.idle) -</div><div class='add'>+		(unsigned long)task_stack_page(idle) -</div><div class='ctx'> 		KERNEL_STACK_OFFSET + THREAD_SIZE;</div><div class='ctx'> #endif</div><div class='ctx'> 	early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);</div><div class='ctx'> 	initial_code = (unsigned long)start_secondary;</div><div class='del'>-	stack_start  = c_idle.idle-&gt;thread.sp;</div><div class='del'>-</div><div class='del'>-	/* start_ip had better be page-aligned! */</div><div class='del'>-	start_ip = trampoline_address();</div><div class='add'>+	stack_start  = idle-&gt;thread.sp;</div><div class='ctx'> </div><div class='ctx'> 	/* So we see what's up */</div><div class='ctx'> 	announce_cpu(cpu, apicid);</div><div class='hunk'>@@ -778,8 +753,7 @@ do_rest:</div><div class='ctx'> 			pr_debug("CPU%d: has booted.\n", cpu);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			boot_error = 1;</div><div class='del'>-			if (*(volatile u32 *)TRAMPOLINE_SYM(trampoline_status)</div><div class='del'>-			    == 0xA5A5A5A5)</div><div class='add'>+			if (*trampoline_status == 0xA5A5A5A5)</div><div class='ctx'> 				/* trampoline started but...? */</div><div class='ctx'> 				pr_err("CPU%d: Stuck ??\n", cpu);</div><div class='ctx'> 			else</div><div class='hunk'>@@ -805,7 +779,7 @@ do_rest:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* mark "stuck" area as not stuck */</div><div class='del'>-	*(volatile u32 *)TRAMPOLINE_SYM(trampoline_status) = 0;</div><div class='add'>+	*trampoline_status = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -813,12 +787,10 @@ do_rest:</div><div class='ctx'> 		 */</div><div class='ctx'> 		smpboot_restore_warm_reset_vector();</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	destroy_work_on_stack(&amp;c_idle.work);</div><div class='ctx'> 	return boot_error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __cpuinit native_cpu_up(unsigned int cpu)</div><div class='add'>+int __cpuinit native_cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='ctx'> 	int apicid = apic-&gt;cpu_present_to_apicid(cpu);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -851,7 +823,7 @@ int __cpuinit native_cpu_up(unsigned int cpu)</div><div class='ctx'> </div><div class='ctx'> 	per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;</div><div class='ctx'> </div><div class='del'>-	err = do_boot_cpu(apicid, cpu);</div><div class='add'>+	err = do_boot_cpu(apicid, cpu, tidle);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		pr_debug("do_boot_cpu failed %d\n", err);</div><div class='ctx'> 		return -EIO;</div><div class='head'>diff --git a/arch/x86/kernel/tboot.c b/arch/x86/kernel/tboot.c<br/>index 6410744ac5cb..f84fe00fad48 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/tboot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/tboot.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/tboot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/tboot.c</a></div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/tboot.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/trampoline.h&gt;</div><div class='add'>+#include &lt;asm/realmode.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/bootparam.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='hunk'>@@ -44,7 +44,7 @@</div><div class='ctx'> #include &lt;asm/e820.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "acpi/realmode/wakeup.h"</div><div class='add'>+#include "../realmode/rm/wakeup.h"</div><div class='ctx'> </div><div class='ctx'> /* Global pointer to shared data; NULL means no measured launch. */</div><div class='ctx'> struct tboot *tboot __read_mostly;</div><div class='hunk'>@@ -201,7 +201,8 @@ static int tboot_setup_sleep(void)</div><div class='ctx'> 		add_mac_region(e820.map[i].addr, e820.map[i].size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tboot-&gt;acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;</div><div class='add'>+	tboot-&gt;acpi_sinfo.kernel_s3_resume_vector =</div><div class='add'>+		real_mode_header-&gt;wakeup_start;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/test_rodata.c b/arch/x86/kernel/test_rodata.c<br/>index c29e235792af..b79133abda48 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/test_rodata.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/test_rodata.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/test_rodata.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/test_rodata.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> int rodata_test(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -42,14 +43,7 @@ int rodata_test(void)</div><div class='ctx'> 		".section .fixup,\"ax\"\n"</div><div class='ctx'> 		"2:	jmp 1b\n"</div><div class='ctx'> 		".previous\n"</div><div class='del'>-		".section __ex_table,\"a\"\n"</div><div class='del'>-		"       .align 16\n"</div><div class='del'>-#ifdef CONFIG_X86_32</div><div class='del'>-		"	.long 0b,2b\n"</div><div class='del'>-#else</div><div class='del'>-		"	.quad 0b,2b\n"</div><div class='del'>-#endif</div><div class='del'>-		".previous"</div><div class='add'>+		_ASM_EXTABLE(0b,2b)</div><div class='ctx'> 		: [rslt] "=r" (result)</div><div class='ctx'> 		: [rodata_test] "r" (&amp;rodata_test_data), [zero] "r" (0UL)</div><div class='ctx'> 	);</div><div class='head'>diff --git a/arch/x86/kernel/time.c b/arch/x86/kernel/time.c<br/>index c6eba2b42673..24d3c91e9812 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/time.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/time.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/time.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/time.c</a></div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'> #include &lt;linux/i8253.h&gt;</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/vsyscall.h&gt;</div><div class='ctx'> #include &lt;asm/x86_init.h&gt;</div><div class='hunk'>@@ -58,11 +57,6 @@ EXPORT_SYMBOL(profile_pc);</div><div class='ctx'> static irqreturn_t timer_interrupt(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	global_clock_event-&gt;event_handler(global_clock_event);</div><div class='del'>-</div><div class='del'>-	/* MCA bus quirk: Acknowledge irq0 by setting bit 7 in port 0x61 */</div><div class='del'>-	if (MCA_bus)</div><div class='del'>-		outb_p(inb_p(0x61)| 0x80, 0x61);</div><div class='del'>-</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/trampoline.c b/arch/x86/kernel/trampoline.c<br/>deleted file mode 100644<br/>index a73b61055ad6..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/trampoline.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/trampoline.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/memblock.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/trampoline.h&gt;</div><div class='del'>-#include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='del'>-</div><div class='del'>-unsigned char *x86_trampoline_base;</div><div class='del'>-</div><div class='del'>-void __init setup_trampolines(void)</div><div class='del'>-{</div><div class='del'>-	phys_addr_t mem;</div><div class='del'>-	size_t size = PAGE_ALIGN(x86_trampoline_end - x86_trampoline_start);</div><div class='del'>-</div><div class='del'>-	/* Has to be in very low memory so we can execute real-mode AP code. */</div><div class='del'>-	mem = memblock_find_in_range(0, 1&lt;&lt;20, size, PAGE_SIZE);</div><div class='del'>-	if (!mem)</div><div class='del'>-		panic("Cannot allocate trampoline\n");</div><div class='del'>-</div><div class='del'>-	x86_trampoline_base = __va(mem);</div><div class='del'>-	memblock_reserve(mem, size);</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "Base memory trampoline at [%p] %llx size %zu\n",</div><div class='del'>-	       x86_trampoline_base, (unsigned long long)mem, size);</div><div class='del'>-</div><div class='del'>-	memcpy(x86_trampoline_base, x86_trampoline_start, size);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * setup_trampolines() gets called very early, to guarantee the</div><div class='del'>- * availability of low memory.  This is before the proper kernel page</div><div class='del'>- * tables are set up, so we cannot set page permissions in that</div><div class='del'>- * function.  Thus, we use an arch_initcall instead.</div><div class='del'>- */</div><div class='del'>-static int __init configure_trampolines(void)</div><div class='del'>-{</div><div class='del'>-	size_t size = PAGE_ALIGN(x86_trampoline_end - x86_trampoline_start);</div><div class='del'>-</div><div class='del'>-	set_memory_x((unsigned long)x86_trampoline_base, size &gt;&gt; PAGE_SHIFT);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-arch_initcall(configure_trampolines);</div><div class='head'>diff --git a/arch/x86/kernel/trampoline_32.S b/arch/x86/kernel/trampoline_32.S<br/>deleted file mode 100644<br/>index 451c0a7ef7fd..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/trampoline_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/trampoline_32.S</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,83 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *</div><div class='del'>- *	Trampoline.S	Derived from Setup.S by Linus Torvalds</div><div class='del'>- *</div><div class='del'>- *	4 Jan 1997 Michael Chastain: changed to gnu as.</div><div class='del'>- *</div><div class='del'>- *	This is only used for booting secondary CPUs in SMP machine</div><div class='del'>- *</div><div class='del'>- *	Entry: CS:IP point to the start of our code, we are </div><div class='del'>- *	in real mode with no stack, but the rest of the </div><div class='del'>- *	trampoline page to make our stack and everything else</div><div class='del'>- *	is a mystery.</div><div class='del'>- *</div><div class='del'>- *	We jump into arch/x86/kernel/head_32.S.</div><div class='del'>- *</div><div class='del'>- *	On entry to trampoline_data, the processor is in real mode</div><div class='del'>- *	with 16-bit addressing and 16-bit data.  CS has some value</div><div class='del'>- *	and IP is zero.  Thus, data addresses need to be absolute</div><div class='del'>- *	(no relocation) and are taken with regard to r_base.</div><div class='del'>- *</div><div class='del'>- *	If you work on this file, check the object module with</div><div class='del'>- *	objdump --reloc to make sure there are no relocation</div><div class='del'>- *	entries except for:</div><div class='del'>- *</div><div class='del'>- *	TYPE              VALUE</div><div class='del'>- *	R_386_32          startup_32_smp</div><div class='del'>- *	R_386_32          boot_gdt</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;asm/segment.h&gt;</div><div class='del'>-#include &lt;asm/page_types.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-</div><div class='del'>-	.section ".x86_trampoline","a"</div><div class='del'>-	.balign PAGE_SIZE</div><div class='del'>-	.code16</div><div class='del'>-</div><div class='del'>-ENTRY(trampoline_data)</div><div class='del'>-r_base = .</div><div class='del'>-	wbinvd			# Needed for NUMA-Q should be harmless for others</div><div class='del'>-	mov	%cs, %ax	# Code and data in the same place</div><div class='del'>-	mov	%ax, %ds</div><div class='del'>-</div><div class='del'>-	cli			# We should be safe anyway</div><div class='del'>-</div><div class='del'>-	movl	$0xA5A5A5A5, trampoline_status - r_base</div><div class='del'>-				# write marker for master knows we're running</div><div class='del'>-</div><div class='del'>-	/* GDT tables in non default location kernel can be beyond 16MB and</div><div class='del'>-	 * lgdt will not be able to load the address as in real mode default</div><div class='del'>-	 * operand size is 16bit. Use lgdtl instead to force operand size</div><div class='del'>-	 * to 32 bit.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	lidtl	boot_idt_descr - r_base	# load idt with 0, 0</div><div class='del'>-	lgdtl	boot_gdt_descr - r_base	# load gdt with whatever is appropriate</div><div class='del'>-</div><div class='del'>-	xor	%ax, %ax</div><div class='del'>-	inc	%ax		# protected mode (PE) bit</div><div class='del'>-	lmsw	%ax		# into protected mode</div><div class='del'>-	# flush prefetch and jump to startup_32_smp in arch/i386/kernel/head.S</div><div class='del'>-	ljmpl	$__BOOT_CS, $(startup_32_smp-__PAGE_OFFSET)</div><div class='del'>-</div><div class='del'>-	# These need to be in the same 64K segment as the above;</div><div class='del'>-	# hence we don't use the boot_gdt_descr defined in head.S</div><div class='del'>-boot_gdt_descr:</div><div class='del'>-	.word	__BOOT_DS + 7			# gdt limit</div><div class='del'>-	.long	boot_gdt - __PAGE_OFFSET	# gdt base</div><div class='del'>-</div><div class='del'>-boot_idt_descr:</div><div class='del'>-	.word	0				# idt limit = 0</div><div class='del'>-	.long	0				# idt base = 0L</div><div class='del'>-</div><div class='del'>-ENTRY(trampoline_status)</div><div class='del'>-	.long	0</div><div class='del'>-</div><div class='del'>-.globl trampoline_end</div><div class='del'>-trampoline_end:</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_SMP */</div><div class='head'>diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c<br/>index ff9281f16029..05b31d92f69c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/traps.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/traps.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/traps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/traps.c</a></div><div class='hunk'>@@ -37,10 +37,6 @@</div><div class='ctx'> #include &lt;linux/eisa.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_EDAC)</div><div class='ctx'> #include &lt;linux/edac.h&gt;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -50,6 +46,7 @@</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/debugreg.h&gt;</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='add'>+#include &lt;asm/ftrace.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #include &lt;asm/i387.h&gt;</div><div class='hunk'>@@ -303,8 +300,17 @@ gp_in_kernel:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* May run on IST stack. */</div><div class='del'>-dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)</div><div class='add'>+dotraplinkage void __kprobes notrace do_int3(struct pt_regs *regs, long error_code)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_DYNAMIC_FTRACE</div><div class='add'>+	/*</div><div class='add'>+	 * ftrace must be first, everything else may cause a recursive crash.</div><div class='add'>+	 * See note by declaration of modifying_ftrace_code in ftrace.c</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(atomic_read(&amp;modifying_ftrace_code)) &amp;&amp;</div><div class='add'>+	    ftrace_int3_handler(regs))</div><div class='add'>+		return;</div><div class='add'>+#endif</div><div class='ctx'> #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP</div><div class='ctx'> 	if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,</div><div class='ctx'> 				SIGTRAP) == NOTIFY_STOP)</div><div class='head'>diff --git a/arch/x86/kernel/uprobes.c b/arch/x86/kernel/uprobes.c<br/>new file mode 100644<br/>index 000000000000..dc4e910a7d96<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/uprobes.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/uprobes.c</a></div><div class='hunk'>@@ -0,0 +1,674 @@</div><div class='add'>+/*</div><div class='add'>+ * User-space Probes (UProbes) for x86</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) IBM Corporation, 2008-2011</div><div class='add'>+ * Authors:</div><div class='add'>+ *	Srikar Dronamraju</div><div class='add'>+ *	Jim Keniston</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='add'>+#include &lt;linux/uprobes.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kdebug.h&gt;</div><div class='add'>+#include &lt;asm/processor.h&gt;</div><div class='add'>+#include &lt;asm/insn.h&gt;</div><div class='add'>+</div><div class='add'>+/* Post-execution fixups. */</div><div class='add'>+</div><div class='add'>+/* No fixup needed */</div><div class='add'>+#define UPROBE_FIX_NONE		0x0</div><div class='add'>+</div><div class='add'>+/* Adjust IP back to vicinity of actual insn */</div><div class='add'>+#define UPROBE_FIX_IP		0x1</div><div class='add'>+</div><div class='add'>+/* Adjust the return address of a call insn */</div><div class='add'>+#define UPROBE_FIX_CALL	0x2</div><div class='add'>+</div><div class='add'>+#define UPROBE_FIX_RIP_AX	0x8000</div><div class='add'>+#define UPROBE_FIX_RIP_CX	0x4000</div><div class='add'>+</div><div class='add'>+#define	UPROBE_TRAP_NR		UINT_MAX</div><div class='add'>+</div><div class='add'>+/* Adaptations for mhiramat x86 decoder v14. */</div><div class='add'>+#define OPCODE1(insn)		((insn)-&gt;opcode.bytes[0])</div><div class='add'>+#define OPCODE2(insn)		((insn)-&gt;opcode.bytes[1])</div><div class='add'>+#define OPCODE3(insn)		((insn)-&gt;opcode.bytes[2])</div><div class='add'>+#define MODRM_REG(insn)		X86_MODRM_REG(insn-&gt;modrm.value)</div><div class='add'>+</div><div class='add'>+#define W(row, b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, ba, bb, bc, bd, be, bf)\</div><div class='add'>+	(((b0##UL &lt;&lt; 0x0)|(b1##UL &lt;&lt; 0x1)|(b2##UL &lt;&lt; 0x2)|(b3##UL &lt;&lt; 0x3) |   \</div><div class='add'>+	  (b4##UL &lt;&lt; 0x4)|(b5##UL &lt;&lt; 0x5)|(b6##UL &lt;&lt; 0x6)|(b7##UL &lt;&lt; 0x7) |   \</div><div class='add'>+	  (b8##UL &lt;&lt; 0x8)|(b9##UL &lt;&lt; 0x9)|(ba##UL &lt;&lt; 0xa)|(bb##UL &lt;&lt; 0xb) |   \</div><div class='add'>+	  (bc##UL &lt;&lt; 0xc)|(bd##UL &lt;&lt; 0xd)|(be##UL &lt;&lt; 0xe)|(bf##UL &lt;&lt; 0xf))    \</div><div class='add'>+	 &lt;&lt; (row % 32))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Good-instruction tables for 32-bit apps.  This is non-const and volatile</div><div class='add'>+ * to keep gcc from statically optimizing it out, as variable_test_bit makes</div><div class='add'>+ * some versions of gcc to think only *(unsigned long*) is used.</div><div class='add'>+ */</div><div class='add'>+static volatile u32 good_insns_32[256 / 32] = {</div><div class='add'>+	/*      0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f         */</div><div class='add'>+	/*      ----------------------------------------------         */</div><div class='add'>+	W(0x00, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0) | /* 00 */</div><div class='add'>+	W(0x10, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0) , /* 10 */</div><div class='add'>+	W(0x20, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1) | /* 20 */</div><div class='add'>+	W(0x30, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1) , /* 30 */</div><div class='add'>+	W(0x40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 40 */</div><div class='add'>+	W(0x50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 50 */</div><div class='add'>+	W(0x60, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* 60 */</div><div class='add'>+	W(0x70, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 70 */</div><div class='add'>+	W(0x80, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 80 */</div><div class='add'>+	W(0x90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 90 */</div><div class='add'>+	W(0xa0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* a0 */</div><div class='add'>+	W(0xb0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* b0 */</div><div class='add'>+	W(0xc0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* c0 */</div><div class='add'>+	W(0xd0, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* d0 */</div><div class='add'>+	W(0xe0, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* e0 */</div><div class='add'>+	W(0xf0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1)   /* f0 */</div><div class='add'>+	/*      ----------------------------------------------         */</div><div class='add'>+	/*      0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f         */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Using this for both 64-bit and 32-bit apps */</div><div class='add'>+static volatile u32 good_2byte_insns[256 / 32] = {</div><div class='add'>+	/*      0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f         */</div><div class='add'>+	/*      ----------------------------------------------         */</div><div class='add'>+	W(0x00, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1) | /* 00 */</div><div class='add'>+	W(0x10, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1) , /* 10 */</div><div class='add'>+	W(0x20, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1) | /* 20 */</div><div class='add'>+	W(0x30, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) , /* 30 */</div><div class='add'>+	W(0x40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 40 */</div><div class='add'>+	W(0x50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 50 */</div><div class='add'>+	W(0x60, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 60 */</div><div class='add'>+	W(0x70, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1) , /* 70 */</div><div class='add'>+	W(0x80, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 80 */</div><div class='add'>+	W(0x90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 90 */</div><div class='add'>+	W(0xa0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1) | /* a0 */</div><div class='add'>+	W(0xb0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1) , /* b0 */</div><div class='add'>+	W(0xc0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* c0 */</div><div class='add'>+	W(0xd0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* d0 */</div><div class='add'>+	W(0xe0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* e0 */</div><div class='add'>+	W(0xf0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0)   /* f0 */</div><div class='add'>+	/*      ----------------------------------------------         */</div><div class='add'>+	/*      0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f         */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+/* Good-instruction tables for 64-bit apps */</div><div class='add'>+static volatile u32 good_insns_64[256 / 32] = {</div><div class='add'>+	/*      0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f         */</div><div class='add'>+	/*      ----------------------------------------------         */</div><div class='add'>+	W(0x00, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) | /* 00 */</div><div class='add'>+	W(0x10, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) , /* 10 */</div><div class='add'>+	W(0x20, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) | /* 20 */</div><div class='add'>+	W(0x30, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) , /* 30 */</div><div class='add'>+	W(0x40, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) | /* 40 */</div><div class='add'>+	W(0x50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 50 */</div><div class='add'>+	W(0x60, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* 60 */</div><div class='add'>+	W(0x70, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 70 */</div><div class='add'>+	W(0x80, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 80 */</div><div class='add'>+	W(0x90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 90 */</div><div class='add'>+	W(0xa0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* a0 */</div><div class='add'>+	W(0xb0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* b0 */</div><div class='add'>+	W(0xc0, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* c0 */</div><div class='add'>+	W(0xd0, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* d0 */</div><div class='add'>+	W(0xe0, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* e0 */</div><div class='add'>+	W(0xf0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1)   /* f0 */</div><div class='add'>+	/*      ----------------------------------------------         */</div><div class='add'>+	/*      0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f         */</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+#undef W</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * opcodes we'll probably never support:</div><div class='add'>+ *</div><div class='add'>+ *  6c-6d, e4-e5, ec-ed - in</div><div class='add'>+ *  6e-6f, e6-e7, ee-ef - out</div><div class='add'>+ *  cc, cd - int3, int</div><div class='add'>+ *  cf - iret</div><div class='add'>+ *  d6 - illegal instruction</div><div class='add'>+ *  f1 - int1/icebp</div><div class='add'>+ *  f4 - hlt</div><div class='add'>+ *  fa, fb - cli, sti</div><div class='add'>+ *  0f - lar, lsl, syscall, clts, sysret, sysenter, sysexit, invd, wbinvd, ud2</div><div class='add'>+ *</div><div class='add'>+ * invalid opcodes in 64-bit mode:</div><div class='add'>+ *</div><div class='add'>+ *  06, 0e, 16, 1e, 27, 2f, 37, 3f, 60-62, 82, c4-c5, d4-d5</div><div class='add'>+ *  63 - we support this opcode in x86_64 but not in i386.</div><div class='add'>+ *</div><div class='add'>+ * opcodes we may need to refine support for:</div><div class='add'>+ *</div><div class='add'>+ *  0f - 2-byte instructions: For many of these instructions, the validity</div><div class='add'>+ *  depends on the prefix and/or the reg field.  On such instructions, we</div><div class='add'>+ *  just consider the opcode combination valid if it corresponds to any</div><div class='add'>+ *  valid instruction.</div><div class='add'>+ *</div><div class='add'>+ *  8f - Group 1 - only reg = 0 is OK</div><div class='add'>+ *  c6-c7 - Group 11 - only reg = 0 is OK</div><div class='add'>+ *  d9-df - fpu insns with some illegal encodings</div><div class='add'>+ *  f2, f3 - repnz, repz prefixes.  These are also the first byte for</div><div class='add'>+ *  certain floating-point instructions, such as addsd.</div><div class='add'>+ *</div><div class='add'>+ *  fe - Group 4 - only reg = 0 or 1 is OK</div><div class='add'>+ *  ff - Group 5 - only reg = 0-6 is OK</div><div class='add'>+ *</div><div class='add'>+ * others -- Do we need to support these?</div><div class='add'>+ *</div><div class='add'>+ *  0f - (floating-point?) prefetch instructions</div><div class='add'>+ *  07, 17, 1f - pop es, pop ss, pop ds</div><div class='add'>+ *  26, 2e, 36, 3e - es:, cs:, ss:, ds: segment prefixes --</div><div class='add'>+ *	but 64 and 65 (fs: and gs:) seem to be used, so we support them</div><div class='add'>+ *  67 - addr16 prefix</div><div class='add'>+ *  ce - into</div><div class='add'>+ *  f0 - lock prefix</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TODO:</div><div class='add'>+ * - Where necessary, examine the modrm byte and allow only valid instructions</div><div class='add'>+ * in the different Groups and fpu instructions.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static bool is_prefix_bad(struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; insn-&gt;prefixes.nbytes; i++) {</div><div class='add'>+		switch (insn-&gt;prefixes.bytes[i]) {</div><div class='add'>+		case 0x26:	/* INAT_PFX_ES   */</div><div class='add'>+		case 0x2E:	/* INAT_PFX_CS   */</div><div class='add'>+		case 0x36:	/* INAT_PFX_DS   */</div><div class='add'>+		case 0x3E:	/* INAT_PFX_SS   */</div><div class='add'>+		case 0xF0:	/* INAT_PFX_LOCK */</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int validate_insn_32bits(struct arch_uprobe *auprobe, struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	insn_init(insn, auprobe-&gt;insn, false);</div><div class='add'>+</div><div class='add'>+	/* Skip good instruction prefixes; reject "bad" ones. */</div><div class='add'>+	insn_get_opcode(insn);</div><div class='add'>+	if (is_prefix_bad(insn))</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (test_bit(OPCODE1(insn), (unsigned long *)good_insns_32))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (insn-&gt;opcode.nbytes == 2) {</div><div class='add'>+		if (test_bit(OPCODE2(insn), (unsigned long *)good_2byte_insns))</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Figure out which fixups arch_uprobe_post_xol() will need to perform, and</div><div class='add'>+ * annotate arch_uprobe-&gt;fixups accordingly.  To start with,</div><div class='add'>+ * arch_uprobe-&gt;fixups is either zero or it reflects rip-related fixups.</div><div class='add'>+ */</div><div class='add'>+static void prepare_fixups(struct arch_uprobe *auprobe, struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	bool fix_ip = true, fix_call = false;	/* defaults */</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	insn_get_opcode(insn);	/* should be a nop */</div><div class='add'>+</div><div class='add'>+	switch (OPCODE1(insn)) {</div><div class='add'>+	case 0xc3:		/* ret/lret */</div><div class='add'>+	case 0xcb:</div><div class='add'>+	case 0xc2:</div><div class='add'>+	case 0xca:</div><div class='add'>+		/* ip is correct */</div><div class='add'>+		fix_ip = false;</div><div class='add'>+		break;</div><div class='add'>+	case 0xe8:		/* call relative - Fix return addr */</div><div class='add'>+		fix_call = true;</div><div class='add'>+		break;</div><div class='add'>+	case 0x9a:		/* call absolute - Fix return addr, not ip */</div><div class='add'>+		fix_call = true;</div><div class='add'>+		fix_ip = false;</div><div class='add'>+		break;</div><div class='add'>+	case 0xff:</div><div class='add'>+		insn_get_modrm(insn);</div><div class='add'>+		reg = MODRM_REG(insn);</div><div class='add'>+		if (reg == 2 || reg == 3) {</div><div class='add'>+			/* call or lcall, indirect */</div><div class='add'>+			/* Fix return addr; ip is correct. */</div><div class='add'>+			fix_call = true;</div><div class='add'>+			fix_ip = false;</div><div class='add'>+		} else if (reg == 4 || reg == 5) {</div><div class='add'>+			/* jmp or ljmp, indirect */</div><div class='add'>+			/* ip is correct. */</div><div class='add'>+			fix_ip = false;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case 0xea:		/* jmp absolute -- ip is correct */</div><div class='add'>+		fix_ip = false;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (fix_ip)</div><div class='add'>+		auprobe-&gt;fixups |= UPROBE_FIX_IP;</div><div class='add'>+	if (fix_call)</div><div class='add'>+		auprobe-&gt;fixups |= UPROBE_FIX_CALL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+/*</div><div class='add'>+ * If arch_uprobe-&gt;insn doesn't use rip-relative addressing, return</div><div class='add'>+ * immediately.  Otherwise, rewrite the instruction so that it accesses</div><div class='add'>+ * its memory operand indirectly through a scratch register.  Set</div><div class='add'>+ * arch_uprobe-&gt;fixups and arch_uprobe-&gt;rip_rela_target_address</div><div class='add'>+ * accordingly.  (The contents of the scratch register will be saved</div><div class='add'>+ * before we single-step the modified instruction, and restored</div><div class='add'>+ * afterward.)</div><div class='add'>+ *</div><div class='add'>+ * We do this because a rip-relative instruction can access only a</div><div class='add'>+ * relatively small area (+/- 2 GB from the instruction), and the XOL</div><div class='add'>+ * area typically lies beyond that area.  At least for instructions</div><div class='add'>+ * that store to memory, we can't execute the original instruction</div><div class='add'>+ * and "fix things up" later, because the misdirected store could be</div><div class='add'>+ * disastrous.</div><div class='add'>+ *</div><div class='add'>+ * Some useful facts about rip-relative instructions:</div><div class='add'>+ *</div><div class='add'>+ *  - There's always a modrm byte.</div><div class='add'>+ *  - There's never a SIB byte.</div><div class='add'>+ *  - The displacement is always 4 bytes.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+handle_riprel_insn(struct arch_uprobe *auprobe, struct mm_struct *mm, struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	u8 *cursor;</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	if (mm-&gt;context.ia32_compat)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	auprobe-&gt;rip_rela_target_address = 0x0;</div><div class='add'>+	if (!insn_rip_relative(insn))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * insn_rip_relative() would have decoded rex_prefix, modrm.</div><div class='add'>+	 * Clear REX.b bit (extension of MODRM.rm field):</div><div class='add'>+	 * we want to encode rax/rcx, not r8/r9.</div><div class='add'>+	 */</div><div class='add'>+	if (insn-&gt;rex_prefix.nbytes) {</div><div class='add'>+		cursor = auprobe-&gt;insn + insn_offset_rex_prefix(insn);</div><div class='add'>+		*cursor &amp;= 0xfe;	/* Clearing REX.B bit */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Point cursor at the modrm byte.  The next 4 bytes are the</div><div class='add'>+	 * displacement.  Beyond the displacement, for some instructions,</div><div class='add'>+	 * is the immediate operand.</div><div class='add'>+	 */</div><div class='add'>+	cursor = auprobe-&gt;insn + insn_offset_modrm(insn);</div><div class='add'>+	insn_get_length(insn);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Convert from rip-relative addressing to indirect addressing</div><div class='add'>+	 * via a scratch register.  Change the r/m field from 0x5 (%rip)</div><div class='add'>+	 * to 0x0 (%rax) or 0x1 (%rcx), and squeeze out the offset field.</div><div class='add'>+	 */</div><div class='add'>+	reg = MODRM_REG(insn);</div><div class='add'>+	if (reg == 0) {</div><div class='add'>+		/*</div><div class='add'>+		 * The register operand (if any) is either the A register</div><div class='add'>+		 * (%rax, %eax, etc.) or (if the 0x4 bit is set in the</div><div class='add'>+		 * REX prefix) %r8.  In any case, we know the C register</div><div class='add'>+		 * is NOT the register operand, so we use %rcx (register</div><div class='add'>+		 * #1) for the scratch register.</div><div class='add'>+		 */</div><div class='add'>+		auprobe-&gt;fixups = UPROBE_FIX_RIP_CX;</div><div class='add'>+		/* Change modrm from 00 000 101 to 00 000 001. */</div><div class='add'>+		*cursor = 0x1;</div><div class='add'>+	} else {</div><div class='add'>+		/* Use %rax (register #0) for the scratch register. */</div><div class='add'>+		auprobe-&gt;fixups = UPROBE_FIX_RIP_AX;</div><div class='add'>+		/* Change modrm from 00 xxx 101 to 00 xxx 000 */</div><div class='add'>+		*cursor = (reg &lt;&lt; 3);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Target address = address of next instruction + (signed) offset */</div><div class='add'>+	auprobe-&gt;rip_rela_target_address = (long)insn-&gt;length + insn-&gt;displacement.value;</div><div class='add'>+</div><div class='add'>+	/* Displacement field is gone; slide immediate field (if any) over. */</div><div class='add'>+	if (insn-&gt;immediate.nbytes) {</div><div class='add'>+		cursor++;</div><div class='add'>+		memmove(cursor, cursor + insn-&gt;displacement.nbytes, insn-&gt;immediate.nbytes);</div><div class='add'>+	}</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int validate_insn_64bits(struct arch_uprobe *auprobe, struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	insn_init(insn, auprobe-&gt;insn, true);</div><div class='add'>+</div><div class='add'>+	/* Skip good instruction prefixes; reject "bad" ones. */</div><div class='add'>+	insn_get_opcode(insn);</div><div class='add'>+	if (is_prefix_bad(insn))</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (test_bit(OPCODE1(insn), (unsigned long *)good_insns_64))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (insn-&gt;opcode.nbytes == 2) {</div><div class='add'>+		if (test_bit(OPCODE2(insn), (unsigned long *)good_2byte_insns))</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+	return -ENOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int validate_insn_bits(struct arch_uprobe *auprobe, struct mm_struct *mm, struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	if (mm-&gt;context.ia32_compat)</div><div class='add'>+		return validate_insn_32bits(auprobe, insn);</div><div class='add'>+	return validate_insn_64bits(auprobe, insn);</div><div class='add'>+}</div><div class='add'>+#else /* 32-bit: */</div><div class='add'>+static void handle_riprel_insn(struct arch_uprobe *auprobe, struct mm_struct *mm, struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	/* No RIP-relative addressing on 32-bit */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int validate_insn_bits(struct arch_uprobe *auprobe, struct mm_struct *mm,  struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	return validate_insn_32bits(auprobe, insn);</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_X86_64 */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * arch_uprobe_analyze_insn - instruction analysis including validity and fixups.</div><div class='add'>+ * @mm: the probed address space.</div><div class='add'>+ * @arch_uprobe: the probepoint information.</div><div class='add'>+ * Return 0 on success or a -ve number on error.</div><div class='add'>+ */</div><div class='add'>+int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct insn insn;</div><div class='add'>+</div><div class='add'>+	auprobe-&gt;fixups = 0;</div><div class='add'>+	ret = validate_insn_bits(auprobe, mm, &amp;insn);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	handle_riprel_insn(auprobe, mm, &amp;insn);</div><div class='add'>+	prepare_fixups(auprobe, &amp;insn);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+/*</div><div class='add'>+ * If we're emulating a rip-relative instruction, save the contents</div><div class='add'>+ * of the scratch register and store the target address in that register.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+pre_xol_rip_insn(struct arch_uprobe *auprobe, struct pt_regs *regs,</div><div class='add'>+				struct arch_uprobe_task *autask)</div><div class='add'>+{</div><div class='add'>+	if (auprobe-&gt;fixups &amp; UPROBE_FIX_RIP_AX) {</div><div class='add'>+		autask-&gt;saved_scratch_register = regs-&gt;ax;</div><div class='add'>+		regs-&gt;ax = current-&gt;utask-&gt;vaddr;</div><div class='add'>+		regs-&gt;ax += auprobe-&gt;rip_rela_target_address;</div><div class='add'>+	} else if (auprobe-&gt;fixups &amp; UPROBE_FIX_RIP_CX) {</div><div class='add'>+		autask-&gt;saved_scratch_register = regs-&gt;cx;</div><div class='add'>+		regs-&gt;cx = current-&gt;utask-&gt;vaddr;</div><div class='add'>+		regs-&gt;cx += auprobe-&gt;rip_rela_target_address;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void</div><div class='add'>+pre_xol_rip_insn(struct arch_uprobe *auprobe, struct pt_regs *regs,</div><div class='add'>+				struct arch_uprobe_task *autask)</div><div class='add'>+{</div><div class='add'>+	/* No RIP-relative addressing on 32-bit */</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * arch_uprobe_pre_xol - prepare to execute out of line.</div><div class='add'>+ * @auprobe: the probepoint information.</div><div class='add'>+ * @regs: reflects the saved user state of current task.</div><div class='add'>+ */</div><div class='add'>+int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	struct arch_uprobe_task *autask;</div><div class='add'>+</div><div class='add'>+	autask = &amp;current-&gt;utask-&gt;autask;</div><div class='add'>+	autask-&gt;saved_trap_nr = current-&gt;thread.trap_nr;</div><div class='add'>+	current-&gt;thread.trap_nr = UPROBE_TRAP_NR;</div><div class='add'>+	regs-&gt;ip = current-&gt;utask-&gt;xol_vaddr;</div><div class='add'>+	pre_xol_rip_insn(auprobe, regs, autask);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function is called by arch_uprobe_post_xol() to adjust the return</div><div class='add'>+ * address pushed by a call instruction executed out of line.</div><div class='add'>+ */</div><div class='add'>+static int adjust_ret_addr(unsigned long sp, long correction)</div><div class='add'>+{</div><div class='add'>+	int rasize, ncopied;</div><div class='add'>+	long ra = 0;</div><div class='add'>+</div><div class='add'>+	if (is_ia32_task())</div><div class='add'>+		rasize = 4;</div><div class='add'>+	else</div><div class='add'>+		rasize = 8;</div><div class='add'>+</div><div class='add'>+	ncopied = copy_from_user(&amp;ra, (void __user *)sp, rasize);</div><div class='add'>+	if (unlikely(ncopied))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	ra += correction;</div><div class='add'>+	ncopied = copy_to_user((void __user *)sp, &amp;ra, rasize);</div><div class='add'>+	if (unlikely(ncopied))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+static bool is_riprel_insn(struct arch_uprobe *auprobe)</div><div class='add'>+{</div><div class='add'>+	return ((auprobe-&gt;fixups &amp; (UPROBE_FIX_RIP_AX | UPROBE_FIX_RIP_CX)) != 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+handle_riprel_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs, long *correction)</div><div class='add'>+{</div><div class='add'>+	if (is_riprel_insn(auprobe)) {</div><div class='add'>+		struct arch_uprobe_task *autask;</div><div class='add'>+</div><div class='add'>+		autask = &amp;current-&gt;utask-&gt;autask;</div><div class='add'>+		if (auprobe-&gt;fixups &amp; UPROBE_FIX_RIP_AX)</div><div class='add'>+			regs-&gt;ax = autask-&gt;saved_scratch_register;</div><div class='add'>+		else</div><div class='add'>+			regs-&gt;cx = autask-&gt;saved_scratch_register;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The original instruction includes a displacement, and so</div><div class='add'>+		 * is 4 bytes longer than what we've just single-stepped.</div><div class='add'>+		 * Fall through to handle stuff like "jmpq *...(%rip)" and</div><div class='add'>+		 * "callq *...(%rip)".</div><div class='add'>+		 */</div><div class='add'>+		if (correction)</div><div class='add'>+			*correction += 4;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void</div><div class='add'>+handle_riprel_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs, long *correction)</div><div class='add'>+{</div><div class='add'>+	/* No RIP-relative addressing on 32-bit */</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * If xol insn itself traps and generates a signal(Say,</div><div class='add'>+ * SIGILL/SIGSEGV/etc), then detect the case where a singlestepped</div><div class='add'>+ * instruction jumps back to its own address. It is assumed that anything</div><div class='add'>+ * like do_page_fault/do_trap/etc sets thread.trap_nr != -1.</div><div class='add'>+ *</div><div class='add'>+ * arch_uprobe_pre_xol/arch_uprobe_post_xol save/restore thread.trap_nr,</div><div class='add'>+ * arch_uprobe_xol_was_trapped() simply checks that -&gt;trap_nr is not equal to</div><div class='add'>+ * UPROBE_TRAP_NR == -1 set by arch_uprobe_pre_xol().</div><div class='add'>+ */</div><div class='add'>+bool arch_uprobe_xol_was_trapped(struct task_struct *t)</div><div class='add'>+{</div><div class='add'>+	if (t-&gt;thread.trap_nr != UPROBE_TRAP_NR)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called after single-stepping. To avoid the SMP problems that can</div><div class='add'>+ * occur when we temporarily put back the original opcode to</div><div class='add'>+ * single-step, we single-stepped a copy of the instruction.</div><div class='add'>+ *</div><div class='add'>+ * This function prepares to resume execution after the single-step.</div><div class='add'>+ * We have to fix things up as follows:</div><div class='add'>+ *</div><div class='add'>+ * Typically, the new ip is relative to the copied instruction.  We need</div><div class='add'>+ * to make it relative to the original instruction (FIX_IP).  Exceptions</div><div class='add'>+ * are return instructions and absolute or indirect jump or call instructions.</div><div class='add'>+ *</div><div class='add'>+ * If the single-stepped instruction was a call, the return address that</div><div class='add'>+ * is atop the stack is the address following the copied instruction.  We</div><div class='add'>+ * need to make it the address following the original instruction (FIX_CALL).</div><div class='add'>+ *</div><div class='add'>+ * If the original instruction was a rip-relative instruction such as</div><div class='add'>+ * "movl %edx,0xnnnn(%rip)", we have instead executed an equivalent</div><div class='add'>+ * instruction using a scratch register -- e.g., "movl %edx,(%rax)".</div><div class='add'>+ * We need to restore the contents of the scratch register and adjust</div><div class='add'>+ * the ip, keeping in mind that the instruction we executed is 4 bytes</div><div class='add'>+ * shorter than the original instruction (since we squeezed out the offset</div><div class='add'>+ * field).  (FIX_RIP_AX or FIX_RIP_CX)</div><div class='add'>+ */</div><div class='add'>+int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	struct uprobe_task *utask;</div><div class='add'>+	long correction;</div><div class='add'>+	int result = 0;</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(current-&gt;thread.trap_nr != UPROBE_TRAP_NR);</div><div class='add'>+</div><div class='add'>+	utask = current-&gt;utask;</div><div class='add'>+	current-&gt;thread.trap_nr = utask-&gt;autask.saved_trap_nr;</div><div class='add'>+	correction = (long)(utask-&gt;vaddr - utask-&gt;xol_vaddr);</div><div class='add'>+	handle_riprel_post_xol(auprobe, regs, &amp;correction);</div><div class='add'>+	if (auprobe-&gt;fixups &amp; UPROBE_FIX_IP)</div><div class='add'>+		regs-&gt;ip += correction;</div><div class='add'>+</div><div class='add'>+	if (auprobe-&gt;fixups &amp; UPROBE_FIX_CALL)</div><div class='add'>+		result = adjust_ret_addr(regs-&gt;sp, correction);</div><div class='add'>+</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* callback routine for handling exceptions. */</div><div class='add'>+int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val, void *data)</div><div class='add'>+{</div><div class='add'>+	struct die_args *args = data;</div><div class='add'>+	struct pt_regs *regs = args-&gt;regs;</div><div class='add'>+	int ret = NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+	/* We are only interested in userspace traps */</div><div class='add'>+	if (regs &amp;&amp; !user_mode_vm(regs))</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+	switch (val) {</div><div class='add'>+	case DIE_INT3:</div><div class='add'>+		if (uprobe_pre_sstep_notifier(regs))</div><div class='add'>+			ret = NOTIFY_STOP;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case DIE_DEBUG:</div><div class='add'>+		if (uprobe_post_sstep_notifier(regs))</div><div class='add'>+			ret = NOTIFY_STOP;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function gets called when XOL instruction either gets trapped or</div><div class='add'>+ * the thread has a fatal signal, so reset the instruction pointer to its</div><div class='add'>+ * probed address.</div><div class='add'>+ */</div><div class='add'>+void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	struct uprobe_task *utask = current-&gt;utask;</div><div class='add'>+</div><div class='add'>+	current-&gt;thread.trap_nr = utask-&gt;autask.saved_trap_nr;</div><div class='add'>+	handle_riprel_post_xol(auprobe, regs, NULL);</div><div class='add'>+	instruction_pointer_set(regs, utask-&gt;vaddr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Skip these instructions as per the currently known x86 ISA.</div><div class='add'>+ * 0x66* { 0x90 | 0x0f 0x1f | 0x0f 0x19 | 0x87 0xc0 }</div><div class='add'>+ */</div><div class='add'>+bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX_UINSN_BYTES; i++) {</div><div class='add'>+		if ((auprobe-&gt;insn[i] == 0x66))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (auprobe-&gt;insn[i] == 0x90)</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		if (i == (MAX_UINSN_BYTES - 1))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if ((auprobe-&gt;insn[i] == 0x0f) &amp;&amp; (auprobe-&gt;insn[i+1] == 0x1f))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		if ((auprobe-&gt;insn[i] == 0x0f) &amp;&amp; (auprobe-&gt;insn[i+1] == 0x19))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		if ((auprobe-&gt;insn[i] == 0x87) &amp;&amp; (auprobe-&gt;insn[i+1] == 0xc0))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S<br/>index 0f703f10901a..22a1530146a8 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/vmlinux.lds.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/vmlinux.lds.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -197,18 +197,6 @@ SECTIONS</div><div class='ctx'> </div><div class='ctx'> 	INIT_DATA_SECTION(16)</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Code and data for a variety of lowlevel trampolines, to be</div><div class='del'>-	 * copied into base memory (&lt; 1 MiB) during initialization.</div><div class='del'>-	 * Since it is copied early, the main copy can be discarded</div><div class='del'>-	 * afterwards.</div><div class='del'>-	 */</div><div class='del'>-	 .x86_trampoline : AT(ADDR(.x86_trampoline) - LOAD_OFFSET) {</div><div class='del'>-		x86_trampoline_start = .;</div><div class='del'>-		*(.x86_trampoline)</div><div class='del'>-		x86_trampoline_end = .;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	.x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {</div><div class='ctx'> 		__x86_cpu_dev_start = .;</div><div class='ctx'> 		*(.x86_cpu_dev.init)</div><div class='head'>diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c<br/>index a1d804bcd483..8eeb55a551b4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/vsmp_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/vsmp_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/vsmp_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/vsmp_64.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/pci_ids.h&gt;</div><div class='ctx'> #include &lt;linux/pci_regs.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/pci-direct.h&gt;</div><div class='hunk'>@@ -22,6 +23,8 @@</div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='add'>+#define TOPOLOGY_REGISTER_OFFSET 0x10</div><div class='add'>+</div><div class='ctx'> #if defined CONFIG_PCI &amp;&amp; defined CONFIG_PARAVIRT</div><div class='ctx'> /*</div><div class='ctx'>  * Interrupt control on vSMPowered systems:</div><div class='hunk'>@@ -149,12 +152,49 @@ int is_vsmp_box(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+static void __init vsmp_cap_cpus(void)</div><div class='add'>+{</div><div class='add'>+#if !defined(CONFIG_X86_VSMP) &amp;&amp; defined(CONFIG_SMP)</div><div class='add'>+	void __iomem *address;</div><div class='add'>+	unsigned int cfg, topology, node_shift, maxcpus;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * CONFIG_X86_VSMP is not configured, so limit the number CPUs to the</div><div class='add'>+	 * ones present in the first board, unless explicitly overridden by</div><div class='add'>+	 * setup_max_cpus</div><div class='add'>+	 */</div><div class='add'>+	if (setup_max_cpus != NR_CPUS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Read the vSMP Foundation topology register */</div><div class='add'>+	cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);</div><div class='add'>+	address = early_ioremap(cfg + TOPOLOGY_REGISTER_OFFSET, 4);</div><div class='add'>+	if (WARN_ON(!address))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	topology = readl(address);</div><div class='add'>+	node_shift = (topology &gt;&gt; 16) &amp; 0x7;</div><div class='add'>+	if (!node_shift)</div><div class='add'>+		/* The value 0 should be decoded as 8 */</div><div class='add'>+		node_shift = 8;</div><div class='add'>+	maxcpus = (topology &amp; ((1 &lt;&lt; node_shift) - 1)) + 1;</div><div class='add'>+</div><div class='add'>+	pr_info("vSMP CTL: Capping CPUs to %d (CONFIG_X86_VSMP is unset)\n",</div><div class='add'>+		maxcpus);</div><div class='add'>+	setup_max_cpus = maxcpus;</div><div class='add'>+	early_iounmap(address, 4);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init vsmp_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	detect_vsmp_box();</div><div class='ctx'> 	if (!is_vsmp_box())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	vsmp_cap_cpus();</div><div class='add'>+</div><div class='ctx'> 	set_vsmp_pv_ops();</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c<br/>index 9cf71d0b2d37..35c5e543f550 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/x86_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/x86_init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/x86_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/x86_init.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;asm/e820.h&gt;</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='add'>+#include &lt;asm/io_apic.h&gt;</div><div class='ctx'> #include &lt;asm/pat.h&gt;</div><div class='ctx'> #include &lt;asm/tsc.h&gt;</div><div class='ctx'> #include &lt;asm/iommu.h&gt;</div><div class='hunk'>@@ -119,3 +120,10 @@ struct x86_msi_ops x86_msi = {</div><div class='ctx'> 	.teardown_msi_irqs = default_teardown_msi_irqs,</div><div class='ctx'> 	.restore_msi_irqs = default_restore_msi_irqs,</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+struct x86_io_apic_ops x86_io_apic_ops = {</div><div class='add'>+	.init	= native_io_apic_init_mappings,</div><div class='add'>+	.read	= native_io_apic_read,</div><div class='add'>+	.write	= native_io_apic_write,</div><div class='add'>+	.modify	= native_io_apic_modify,</div><div class='add'>+};</div><div class='head'>diff --git a/arch/x86/kernel/xsave.c b/arch/x86/kernel/xsave.c<br/>index e62728e30b01..bd18149b2b0f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/xsave.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/xsave.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kernel/xsave.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kernel/xsave.c</a></div><div class='hunk'>@@ -48,8 +48,6 @@ void __sanitize_i387_state(struct task_struct *tsk)</div><div class='ctx'> 	if (!fx)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(__thread_has_fpu(tsk));</div><div class='del'>-</div><div class='ctx'> 	xstate_bv = tsk-&gt;thread.fpu.state-&gt;xsave.xsave_hdr.xstate_bv;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig<br/>index 1a7fe868f375..a28f338843ea 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/Kconfig</a></div><div class='hunk'>@@ -36,6 +36,7 @@ config KVM</div><div class='ctx'> 	select TASKSTATS</div><div class='ctx'> 	select TASK_DELAY_ACCT</div><div class='ctx'> 	select PERF_EVENTS</div><div class='add'>+	select HAVE_KVM_MSI</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Support hosting fully virtualized guest machines using hardware</div><div class='ctx'> 	  virtualization extensions.  You will need a fairly recent</div><div class='head'>diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c<br/>index 9fed5bedaad6..7df1c6d839fb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/cpuid.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/cpuid.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/cpuid.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/cpuid.c</a></div><div class='hunk'>@@ -247,7 +247,8 @@ static int do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,</div><div class='ctx'> </div><div class='ctx'> 	/* cpuid 7.0.ebx */</div><div class='ctx'> 	const u32 kvm_supported_word9_x86_features =</div><div class='del'>-		F(FSGSBASE) | F(BMI1) | F(AVX2) | F(SMEP) | F(BMI2) | F(ERMS);</div><div class='add'>+		F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |</div><div class='add'>+		F(BMI2) | F(ERMS) | F(RTM);</div><div class='ctx'> </div><div class='ctx'> 	/* all calls to cpuid_count() should be made on the same cpu */</div><div class='ctx'> 	get_cpu();</div><div class='hunk'>@@ -397,7 +398,7 @@ static int do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,</div><div class='ctx'> 	case KVM_CPUID_SIGNATURE: {</div><div class='ctx'> 		char signature[12] = "KVMKVMKVM\0\0";</div><div class='ctx'> 		u32 *sigptr = (u32 *)signature;</div><div class='del'>-		entry-&gt;eax = 0;</div><div class='add'>+		entry-&gt;eax = KVM_CPUID_FEATURES;</div><div class='ctx'> 		entry-&gt;ebx = sigptr[0];</div><div class='ctx'> 		entry-&gt;ecx = sigptr[1];</div><div class='ctx'> 		entry-&gt;edx = sigptr[2];</div><div class='head'>diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c<br/>index 83756223f8aa..f95d242ee9f7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/emulate.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/emulate.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/emulate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/emulate.c</a></div><div class='hunk'>@@ -142,6 +142,10 @@</div><div class='ctx'> #define Src2FS      (OpFS &lt;&lt; Src2Shift)</div><div class='ctx'> #define Src2GS      (OpGS &lt;&lt; Src2Shift)</div><div class='ctx'> #define Src2Mask    (OpMask &lt;&lt; Src2Shift)</div><div class='add'>+#define Mmx         ((u64)1 &lt;&lt; 40)  /* MMX Vector instruction */</div><div class='add'>+#define Aligned     ((u64)1 &lt;&lt; 41)  /* Explicitly aligned (e.g. MOVDQA) */</div><div class='add'>+#define Unaligned   ((u64)1 &lt;&lt; 42)  /* Explicitly unaligned (e.g. MOVDQU) */</div><div class='add'>+#define Avx         ((u64)1 &lt;&lt; 43)  /* Advanced Vector Extensions */</div><div class='ctx'> </div><div class='ctx'> #define X2(x...) x, x</div><div class='ctx'> #define X3(x...) X2(x), x</div><div class='hunk'>@@ -557,6 +561,29 @@ static void set_segment_selector(struct x86_emulate_ctxt *ctxt, u16 selector,</div><div class='ctx'> 	ctxt-&gt;ops-&gt;set_segment(ctxt, selector, &amp;desc, base3, seg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * x86 defines three classes of vector instructions: explicitly</div><div class='add'>+ * aligned, explicitly unaligned, and the rest, which change behaviour</div><div class='add'>+ * depending on whether they're AVX encoded or not.</div><div class='add'>+ *</div><div class='add'>+ * Also included is CMPXCHG16B which is not a vector instruction, yet it is</div><div class='add'>+ * subject to the same check.</div><div class='add'>+ */</div><div class='add'>+static bool insn_aligned(struct x86_emulate_ctxt *ctxt, unsigned size)</div><div class='add'>+{</div><div class='add'>+	if (likely(size &lt; 16))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (ctxt-&gt;d &amp; Aligned)</div><div class='add'>+		return true;</div><div class='add'>+	else if (ctxt-&gt;d &amp; Unaligned)</div><div class='add'>+		return false;</div><div class='add'>+	else if (ctxt-&gt;d &amp; Avx)</div><div class='add'>+		return false;</div><div class='add'>+	else</div><div class='add'>+		return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __linearize(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 		     struct segmented_address addr,</div><div class='ctx'> 		     unsigned size, bool write, bool fetch,</div><div class='hunk'>@@ -621,6 +648,8 @@ static int __linearize(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (fetch ? ctxt-&gt;mode != X86EMUL_MODE_PROT64 : ctxt-&gt;ad_bytes != 8)</div><div class='ctx'> 		la &amp;= (u32)-1;</div><div class='add'>+	if (insn_aligned(ctxt, size) &amp;&amp; ((la &amp; (size - 1)) != 0))</div><div class='add'>+		return emulate_gp(ctxt, 0);</div><div class='ctx'> 	*linear = la;</div><div class='ctx'> 	return X86EMUL_CONTINUE;</div><div class='ctx'> bad:</div><div class='hunk'>@@ -859,6 +888,40 @@ static void write_sse_reg(struct x86_emulate_ctxt *ctxt, sse128_t *data,</div><div class='ctx'> 	ctxt-&gt;ops-&gt;put_fpu(ctxt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void read_mmx_reg(struct x86_emulate_ctxt *ctxt, u64 *data, int reg)</div><div class='add'>+{</div><div class='add'>+	ctxt-&gt;ops-&gt;get_fpu(ctxt);</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case 0: asm("movq %%mm0, %0" : "=m"(*data)); break;</div><div class='add'>+	case 1: asm("movq %%mm1, %0" : "=m"(*data)); break;</div><div class='add'>+	case 2: asm("movq %%mm2, %0" : "=m"(*data)); break;</div><div class='add'>+	case 3: asm("movq %%mm3, %0" : "=m"(*data)); break;</div><div class='add'>+	case 4: asm("movq %%mm4, %0" : "=m"(*data)); break;</div><div class='add'>+	case 5: asm("movq %%mm5, %0" : "=m"(*data)); break;</div><div class='add'>+	case 6: asm("movq %%mm6, %0" : "=m"(*data)); break;</div><div class='add'>+	case 7: asm("movq %%mm7, %0" : "=m"(*data)); break;</div><div class='add'>+	default: BUG();</div><div class='add'>+	}</div><div class='add'>+	ctxt-&gt;ops-&gt;put_fpu(ctxt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_mmx_reg(struct x86_emulate_ctxt *ctxt, u64 *data, int reg)</div><div class='add'>+{</div><div class='add'>+	ctxt-&gt;ops-&gt;get_fpu(ctxt);</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case 0: asm("movq %0, %%mm0" : : "m"(*data)); break;</div><div class='add'>+	case 1: asm("movq %0, %%mm1" : : "m"(*data)); break;</div><div class='add'>+	case 2: asm("movq %0, %%mm2" : : "m"(*data)); break;</div><div class='add'>+	case 3: asm("movq %0, %%mm3" : : "m"(*data)); break;</div><div class='add'>+	case 4: asm("movq %0, %%mm4" : : "m"(*data)); break;</div><div class='add'>+	case 5: asm("movq %0, %%mm5" : : "m"(*data)); break;</div><div class='add'>+	case 6: asm("movq %0, %%mm6" : : "m"(*data)); break;</div><div class='add'>+	case 7: asm("movq %0, %%mm7" : : "m"(*data)); break;</div><div class='add'>+	default: BUG();</div><div class='add'>+	}</div><div class='add'>+	ctxt-&gt;ops-&gt;put_fpu(ctxt);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void decode_register_operand(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 				    struct operand *op)</div><div class='ctx'> {</div><div class='hunk'>@@ -875,6 +938,13 @@ static void decode_register_operand(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 		read_sse_reg(ctxt, &amp;op-&gt;vec_val, reg);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+	if (ctxt-&gt;d &amp; Mmx) {</div><div class='add'>+		reg &amp;= 7;</div><div class='add'>+		op-&gt;type = OP_MM;</div><div class='add'>+		op-&gt;bytes = 8;</div><div class='add'>+		op-&gt;addr.mm = reg;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	op-&gt;type = OP_REG;</div><div class='ctx'> 	if (ctxt-&gt;d &amp; ByteOp) {</div><div class='hunk'>@@ -902,7 +972,6 @@ static int decode_modrm(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 		ctxt-&gt;modrm_rm = base_reg = (ctxt-&gt;rex_prefix &amp; 1) &lt;&lt; 3; /* REG.B */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ctxt-&gt;modrm = insn_fetch(u8, ctxt);</div><div class='ctx'> 	ctxt-&gt;modrm_mod |= (ctxt-&gt;modrm &amp; 0xc0) &gt;&gt; 6;</div><div class='ctx'> 	ctxt-&gt;modrm_reg |= (ctxt-&gt;modrm &amp; 0x38) &gt;&gt; 3;</div><div class='ctx'> 	ctxt-&gt;modrm_rm |= (ctxt-&gt;modrm &amp; 0x07);</div><div class='hunk'>@@ -920,6 +989,12 @@ static int decode_modrm(struct x86_emulate_ctxt *ctxt,</div><div class='ctx'> 			read_sse_reg(ctxt, &amp;op-&gt;vec_val, ctxt-&gt;modrm_rm);</div><div class='ctx'> 			return rc;</div><div class='ctx'> 		}</div><div class='add'>+		if (ctxt-&gt;d &amp; Mmx) {</div><div class='add'>+			op-&gt;type = OP_MM;</div><div class='add'>+			op-&gt;bytes = 8;</div><div class='add'>+			op-&gt;addr.xmm = ctxt-&gt;modrm_rm &amp; 7;</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='ctx'> 		fetch_register_operand(op);</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1387,6 +1462,9 @@ static int writeback(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> 	case OP_XMM:</div><div class='ctx'> 		write_sse_reg(ctxt, &amp;ctxt-&gt;dst.vec_val, ctxt-&gt;dst.addr.xmm);</div><div class='ctx'> 		break;</div><div class='add'>+	case OP_MM:</div><div class='add'>+		write_mmx_reg(ctxt, &amp;ctxt-&gt;dst.mm_val, ctxt-&gt;dst.addr.mm);</div><div class='add'>+		break;</div><div class='ctx'> 	case OP_NONE:</div><div class='ctx'> 		/* no writeback */</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2790,7 +2868,7 @@ static int em_rdpmc(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> </div><div class='ctx'> static int em_mov(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> {</div><div class='del'>-	ctxt-&gt;dst.val = ctxt-&gt;src.val;</div><div class='add'>+	memcpy(ctxt-&gt;dst.valptr, ctxt-&gt;src.valptr, ctxt-&gt;op_bytes);</div><div class='ctx'> 	return X86EMUL_CONTINUE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2870,12 +2948,6 @@ static int em_mov_sreg_rm(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> 	return load_segment_descriptor(ctxt, sel, ctxt-&gt;modrm_reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int em_movdqu(struct x86_emulate_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	memcpy(&amp;ctxt-&gt;dst.vec_val, &amp;ctxt-&gt;src.vec_val, ctxt-&gt;op_bytes);</div><div class='del'>-	return X86EMUL_CONTINUE;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int em_invlpg(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -3061,35 +3133,13 @@ static int em_btc(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> </div><div class='ctx'> static int em_bsf(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> {</div><div class='del'>-	u8 zf;</div><div class='del'>-</div><div class='del'>-	__asm__ ("bsf %2, %0; setz %1"</div><div class='del'>-		 : "=r"(ctxt-&gt;dst.val), "=q"(zf)</div><div class='del'>-		 : "r"(ctxt-&gt;src.val));</div><div class='del'>-</div><div class='del'>-	ctxt-&gt;eflags &amp;= ~X86_EFLAGS_ZF;</div><div class='del'>-	if (zf) {</div><div class='del'>-		ctxt-&gt;eflags |= X86_EFLAGS_ZF;</div><div class='del'>-		/* Disable writeback. */</div><div class='del'>-		ctxt-&gt;dst.type = OP_NONE;</div><div class='del'>-	}</div><div class='add'>+	emulate_2op_SrcV_nobyte(ctxt, "bsf");</div><div class='ctx'> 	return X86EMUL_CONTINUE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int em_bsr(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> {</div><div class='del'>-	u8 zf;</div><div class='del'>-</div><div class='del'>-	__asm__ ("bsr %2, %0; setz %1"</div><div class='del'>-		 : "=r"(ctxt-&gt;dst.val), "=q"(zf)</div><div class='del'>-		 : "r"(ctxt-&gt;src.val));</div><div class='del'>-</div><div class='del'>-	ctxt-&gt;eflags &amp;= ~X86_EFLAGS_ZF;</div><div class='del'>-	if (zf) {</div><div class='del'>-		ctxt-&gt;eflags |= X86_EFLAGS_ZF;</div><div class='del'>-		/* Disable writeback. */</div><div class='del'>-		ctxt-&gt;dst.type = OP_NONE;</div><div class='del'>-	}</div><div class='add'>+	emulate_2op_SrcV_nobyte(ctxt, "bsr");</div><div class='ctx'> 	return X86EMUL_CONTINUE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3286,8 +3336,8 @@ static int check_perm_out(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> 		      .check_perm = (_p) }</div><div class='ctx'> #define N    D(0)</div><div class='ctx'> #define EXT(_f, _e) { .flags = ((_f) | RMExt), .u.group = (_e) }</div><div class='del'>-#define G(_f, _g) { .flags = ((_f) | Group), .u.group = (_g) }</div><div class='del'>-#define GD(_f, _g) { .flags = ((_f) | GroupDual), .u.gdual = (_g) }</div><div class='add'>+#define G(_f, _g) { .flags = ((_f) | Group | ModRM), .u.group = (_g) }</div><div class='add'>+#define GD(_f, _g) { .flags = ((_f) | GroupDual | ModRM), .u.gdual = (_g) }</div><div class='ctx'> #define I(_f, _e) { .flags = (_f), .u.execute = (_e) }</div><div class='ctx'> #define II(_f, _e, _i) \</div><div class='ctx'> 	{ .flags = (_f), .u.execute = (_e), .intercept = x86_intercept_##_i }</div><div class='hunk'>@@ -3307,25 +3357,25 @@ static int check_perm_out(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> 		I2bv(((_f) &amp; ~Lock) | DstAcc | SrcImm, _e)</div><div class='ctx'> </div><div class='ctx'> static struct opcode group7_rm1[] = {</div><div class='del'>-	DI(SrcNone | ModRM | Priv, monitor),</div><div class='del'>-	DI(SrcNone | ModRM | Priv, mwait),</div><div class='add'>+	DI(SrcNone | Priv, monitor),</div><div class='add'>+	DI(SrcNone | Priv, mwait),</div><div class='ctx'> 	N, N, N, N, N, N,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct opcode group7_rm3[] = {</div><div class='del'>-	DIP(SrcNone | ModRM | Prot | Priv, vmrun,   check_svme_pa),</div><div class='del'>-	II(SrcNone | ModRM | Prot | VendorSpecific, em_vmmcall, vmmcall),</div><div class='del'>-	DIP(SrcNone | ModRM | Prot | Priv, vmload,  check_svme_pa),</div><div class='del'>-	DIP(SrcNone | ModRM | Prot | Priv, vmsave,  check_svme_pa),</div><div class='del'>-	DIP(SrcNone | ModRM | Prot | Priv, stgi,    check_svme),</div><div class='del'>-	DIP(SrcNone | ModRM | Prot | Priv, clgi,    check_svme),</div><div class='del'>-	DIP(SrcNone | ModRM | Prot | Priv, skinit,  check_svme),</div><div class='del'>-	DIP(SrcNone | ModRM | Prot | Priv, invlpga, check_svme),</div><div class='add'>+	DIP(SrcNone | Prot | Priv,		vmrun,		check_svme_pa),</div><div class='add'>+	II(SrcNone  | Prot | VendorSpecific,	em_vmmcall,	vmmcall),</div><div class='add'>+	DIP(SrcNone | Prot | Priv,		vmload,		check_svme_pa),</div><div class='add'>+	DIP(SrcNone | Prot | Priv,		vmsave,		check_svme_pa),</div><div class='add'>+	DIP(SrcNone | Prot | Priv,		stgi,		check_svme),</div><div class='add'>+	DIP(SrcNone | Prot | Priv,		clgi,		check_svme),</div><div class='add'>+	DIP(SrcNone | Prot | Priv,		skinit,		check_svme),</div><div class='add'>+	DIP(SrcNone | Prot | Priv,		invlpga,	check_svme),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct opcode group7_rm7[] = {</div><div class='ctx'> 	N,</div><div class='del'>-	DIP(SrcNone | ModRM, rdtscp, check_rdtsc),</div><div class='add'>+	DIP(SrcNone, rdtscp, check_rdtsc),</div><div class='ctx'> 	N, N, N, N, N, N,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3341,81 +3391,86 @@ static struct opcode group1[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct opcode group1A[] = {</div><div class='del'>-	I(DstMem | SrcNone | ModRM | Mov | Stack, em_pop), N, N, N, N, N, N, N,</div><div class='add'>+	I(DstMem | SrcNone | Mov | Stack, em_pop), N, N, N, N, N, N, N,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct opcode group3[] = {</div><div class='del'>-	I(DstMem | SrcImm | ModRM, em_test),</div><div class='del'>-	I(DstMem | SrcImm | ModRM, em_test),</div><div class='del'>-	I(DstMem | SrcNone | ModRM | Lock, em_not),</div><div class='del'>-	I(DstMem | SrcNone | ModRM | Lock, em_neg),</div><div class='del'>-	I(SrcMem | ModRM, em_mul_ex),</div><div class='del'>-	I(SrcMem | ModRM, em_imul_ex),</div><div class='del'>-	I(SrcMem | ModRM, em_div_ex),</div><div class='del'>-	I(SrcMem | ModRM, em_idiv_ex),</div><div class='add'>+	I(DstMem | SrcImm, em_test),</div><div class='add'>+	I(DstMem | SrcImm, em_test),</div><div class='add'>+	I(DstMem | SrcNone | Lock, em_not),</div><div class='add'>+	I(DstMem | SrcNone | Lock, em_neg),</div><div class='add'>+	I(SrcMem, em_mul_ex),</div><div class='add'>+	I(SrcMem, em_imul_ex),</div><div class='add'>+	I(SrcMem, em_div_ex),</div><div class='add'>+	I(SrcMem, em_idiv_ex),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct opcode group4[] = {</div><div class='del'>-	I(ByteOp | DstMem | SrcNone | ModRM | Lock, em_grp45),</div><div class='del'>-	I(ByteOp | DstMem | SrcNone | ModRM | Lock, em_grp45),</div><div class='add'>+	I(ByteOp | DstMem | SrcNone | Lock, em_grp45),</div><div class='add'>+	I(ByteOp | DstMem | SrcNone | Lock, em_grp45),</div><div class='ctx'> 	N, N, N, N, N, N,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct opcode group5[] = {</div><div class='del'>-	I(DstMem | SrcNone | ModRM | Lock, em_grp45),</div><div class='del'>-	I(DstMem | SrcNone | ModRM | Lock, em_grp45),</div><div class='del'>-	I(SrcMem | ModRM | Stack, em_grp45),</div><div class='del'>-	I(SrcMemFAddr | ModRM | ImplicitOps | Stack, em_call_far),</div><div class='del'>-	I(SrcMem | ModRM | Stack, em_grp45),</div><div class='del'>-	I(SrcMemFAddr | ModRM | ImplicitOps, em_grp45),</div><div class='del'>-	I(SrcMem | ModRM | Stack, em_grp45), N,</div><div class='add'>+	I(DstMem | SrcNone | Lock,		em_grp45),</div><div class='add'>+	I(DstMem | SrcNone | Lock,		em_grp45),</div><div class='add'>+	I(SrcMem | Stack,			em_grp45),</div><div class='add'>+	I(SrcMemFAddr | ImplicitOps | Stack,	em_call_far),</div><div class='add'>+	I(SrcMem | Stack,			em_grp45),</div><div class='add'>+	I(SrcMemFAddr | ImplicitOps,		em_grp45),</div><div class='add'>+	I(SrcMem | Stack,			em_grp45), N,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct opcode group6[] = {</div><div class='del'>-	DI(ModRM | Prot,        sldt),</div><div class='del'>-	DI(ModRM | Prot,        str),</div><div class='del'>-	DI(ModRM | Prot | Priv, lldt),</div><div class='del'>-	DI(ModRM | Prot | Priv, ltr),</div><div class='add'>+	DI(Prot,	sldt),</div><div class='add'>+	DI(Prot,	str),</div><div class='add'>+	DI(Prot | Priv,	lldt),</div><div class='add'>+	DI(Prot | Priv,	ltr),</div><div class='ctx'> 	N, N, N, N,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct group_dual group7 = { {</div><div class='del'>-	DI(ModRM | Mov | DstMem | Priv, sgdt),</div><div class='del'>-	DI(ModRM | Mov | DstMem | Priv, sidt),</div><div class='del'>-	II(ModRM | SrcMem | Priv, em_lgdt, lgdt),</div><div class='del'>-	II(ModRM | SrcMem | Priv, em_lidt, lidt),</div><div class='del'>-	II(SrcNone | ModRM | DstMem | Mov, em_smsw, smsw), N,</div><div class='del'>-	II(SrcMem16 | ModRM | Mov | Priv, em_lmsw, lmsw),</div><div class='del'>-	II(SrcMem | ModRM | ByteOp | Priv | NoAccess, em_invlpg, invlpg),</div><div class='add'>+	DI(Mov | DstMem | Priv,			sgdt),</div><div class='add'>+	DI(Mov | DstMem | Priv,			sidt),</div><div class='add'>+	II(SrcMem | Priv,			em_lgdt, lgdt),</div><div class='add'>+	II(SrcMem | Priv,			em_lidt, lidt),</div><div class='add'>+	II(SrcNone | DstMem | Mov,		em_smsw, smsw), N,</div><div class='add'>+	II(SrcMem16 | Mov | Priv,		em_lmsw, lmsw),</div><div class='add'>+	II(SrcMem | ByteOp | Priv | NoAccess,	em_invlpg, invlpg),</div><div class='ctx'> }, {</div><div class='del'>-	I(SrcNone | ModRM | Priv | VendorSpecific, em_vmcall),</div><div class='add'>+	I(SrcNone | Priv | VendorSpecific,	em_vmcall),</div><div class='ctx'> 	EXT(0, group7_rm1),</div><div class='ctx'> 	N, EXT(0, group7_rm3),</div><div class='del'>-	II(SrcNone | ModRM | DstMem | Mov, em_smsw, smsw), N,</div><div class='del'>-	II(SrcMem16 | ModRM | Mov | Priv, em_lmsw, lmsw), EXT(0, group7_rm7),</div><div class='add'>+	II(SrcNone | DstMem | Mov,		em_smsw, smsw), N,</div><div class='add'>+	II(SrcMem16 | Mov | Priv,		em_lmsw, lmsw),</div><div class='add'>+	EXT(0, group7_rm7),</div><div class='ctx'> } };</div><div class='ctx'> </div><div class='ctx'> static struct opcode group8[] = {</div><div class='ctx'> 	N, N, N, N,</div><div class='del'>-	I(DstMem | SrcImmByte | ModRM, em_bt),</div><div class='del'>-	I(DstMem | SrcImmByte | ModRM | Lock | PageTable, em_bts),</div><div class='del'>-	I(DstMem | SrcImmByte | ModRM | Lock, em_btr),</div><div class='del'>-	I(DstMem | SrcImmByte | ModRM | Lock | PageTable, em_btc),</div><div class='add'>+	I(DstMem | SrcImmByte,				em_bt),</div><div class='add'>+	I(DstMem | SrcImmByte | Lock | PageTable,	em_bts),</div><div class='add'>+	I(DstMem | SrcImmByte | Lock,			em_btr),</div><div class='add'>+	I(DstMem | SrcImmByte | Lock | PageTable,	em_btc),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct group_dual group9 = { {</div><div class='del'>-	N, I(DstMem64 | ModRM | Lock | PageTable, em_cmpxchg8b), N, N, N, N, N, N,</div><div class='add'>+	N, I(DstMem64 | Lock | PageTable, em_cmpxchg8b), N, N, N, N, N, N,</div><div class='ctx'> }, {</div><div class='ctx'> 	N, N, N, N, N, N, N, N,</div><div class='ctx'> } };</div><div class='ctx'> </div><div class='ctx'> static struct opcode group11[] = {</div><div class='del'>-	I(DstMem | SrcImm | ModRM | Mov | PageTable, em_mov),</div><div class='add'>+	I(DstMem | SrcImm | Mov | PageTable, em_mov),</div><div class='ctx'> 	X7(D(Undefined)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct gprefix pfx_0f_6f_0f_7f = {</div><div class='del'>-	N, N, N, I(Sse, em_movdqu),</div><div class='add'>+	I(Mmx, em_mov), I(Sse | Aligned, em_mov), N, I(Sse | Unaligned, em_mov),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gprefix pfx_vmovntpx = {</div><div class='add'>+	I(0, em_mov), N, N, N,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct opcode opcode_table[256] = {</div><div class='hunk'>@@ -3464,10 +3519,10 @@ static struct opcode opcode_table[256] = {</div><div class='ctx'> 	/* 0x70 - 0x7F */</div><div class='ctx'> 	X16(D(SrcImmByte)),</div><div class='ctx'> 	/* 0x80 - 0x87 */</div><div class='del'>-	G(ByteOp | DstMem | SrcImm | ModRM | Group, group1),</div><div class='del'>-	G(DstMem | SrcImm | ModRM | Group, group1),</div><div class='del'>-	G(ByteOp | DstMem | SrcImm | ModRM | No64 | Group, group1),</div><div class='del'>-	G(DstMem | SrcImmByte | ModRM | Group, group1),</div><div class='add'>+	G(ByteOp | DstMem | SrcImm, group1),</div><div class='add'>+	G(DstMem | SrcImm, group1),</div><div class='add'>+	G(ByteOp | DstMem | SrcImm | No64, group1),</div><div class='add'>+	G(DstMem | SrcImmByte, group1),</div><div class='ctx'> 	I2bv(DstMem | SrcReg | ModRM, em_test),</div><div class='ctx'> 	I2bv(DstMem | SrcReg | ModRM | Lock | PageTable, em_xchg),</div><div class='ctx'> 	/* 0x88 - 0x8F */</div><div class='hunk'>@@ -3549,7 +3604,8 @@ static struct opcode twobyte_table[256] = {</div><div class='ctx'> 	IIP(ModRM | SrcMem | Priv | Op3264, em_cr_write, cr_write, check_cr_write),</div><div class='ctx'> 	IIP(ModRM | SrcMem | Priv | Op3264, em_dr_write, dr_write, check_dr_write),</div><div class='ctx'> 	N, N, N, N,</div><div class='del'>-	N, N, N, N, N, N, N, N,</div><div class='add'>+	N, N, N, GP(ModRM | DstMem | SrcReg | Sse | Mov | Aligned, &amp;pfx_vmovntpx),</div><div class='add'>+	N, N, N, N,</div><div class='ctx'> 	/* 0x30 - 0x3F */</div><div class='ctx'> 	II(ImplicitOps | Priv, em_wrmsr, wrmsr),</div><div class='ctx'> 	IIP(ImplicitOps, em_rdtsc, rdtsc, check_rdtsc),</div><div class='hunk'>@@ -3897,17 +3953,16 @@ done_prefixes:</div><div class='ctx'> 	}</div><div class='ctx'> 	ctxt-&gt;d = opcode.flags;</div><div class='ctx'> </div><div class='add'>+	if (ctxt-&gt;d &amp; ModRM)</div><div class='add'>+		ctxt-&gt;modrm = insn_fetch(u8, ctxt);</div><div class='add'>+</div><div class='ctx'> 	while (ctxt-&gt;d &amp; GroupMask) {</div><div class='ctx'> 		switch (ctxt-&gt;d &amp; GroupMask) {</div><div class='ctx'> 		case Group:</div><div class='del'>-			ctxt-&gt;modrm = insn_fetch(u8, ctxt);</div><div class='del'>-			--ctxt-&gt;_eip;</div><div class='ctx'> 			goffset = (ctxt-&gt;modrm &gt;&gt; 3) &amp; 7;</div><div class='ctx'> 			opcode = opcode.u.group[goffset];</div><div class='ctx'> 			break;</div><div class='ctx'> 		case GroupDual:</div><div class='del'>-			ctxt-&gt;modrm = insn_fetch(u8, ctxt);</div><div class='del'>-			--ctxt-&gt;_eip;</div><div class='ctx'> 			goffset = (ctxt-&gt;modrm &gt;&gt; 3) &amp; 7;</div><div class='ctx'> 			if ((ctxt-&gt;modrm &gt;&gt; 6) == 3)</div><div class='ctx'> 				opcode = opcode.u.gdual-&gt;mod3[goffset];</div><div class='hunk'>@@ -3960,6 +4015,8 @@ done_prefixes:</div><div class='ctx'> </div><div class='ctx'> 	if (ctxt-&gt;d &amp; Sse)</div><div class='ctx'> 		ctxt-&gt;op_bytes = 16;</div><div class='add'>+	else if (ctxt-&gt;d &amp; Mmx)</div><div class='add'>+		ctxt-&gt;op_bytes = 8;</div><div class='ctx'> </div><div class='ctx'> 	/* ModRM and SIB bytes. */</div><div class='ctx'> 	if (ctxt-&gt;d &amp; ModRM) {</div><div class='hunk'>@@ -4030,6 +4087,35 @@ static bool string_insn_completed(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int flush_pending_x87_faults(struct x86_emulate_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	bool fault = false;</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;ops-&gt;get_fpu(ctxt);</div><div class='add'>+	asm volatile("1: fwait \n\t"</div><div class='add'>+		     "2: \n\t"</div><div class='add'>+		     ".pushsection .fixup,\"ax\" \n\t"</div><div class='add'>+		     "3: \n\t"</div><div class='add'>+		     "movb $1, %[fault] \n\t"</div><div class='add'>+		     "jmp 2b \n\t"</div><div class='add'>+		     ".popsection \n\t"</div><div class='add'>+		     _ASM_EXTABLE(1b, 3b)</div><div class='add'>+		     : [fault]"+qm"(fault));</div><div class='add'>+	ctxt-&gt;ops-&gt;put_fpu(ctxt);</div><div class='add'>+</div><div class='add'>+	if (unlikely(fault))</div><div class='add'>+		return emulate_exception(ctxt, MF_VECTOR, 0, false);</div><div class='add'>+</div><div class='add'>+	return X86EMUL_CONTINUE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fetch_possible_mmx_operand(struct x86_emulate_ctxt *ctxt,</div><div class='add'>+				       struct operand *op)</div><div class='add'>+{</div><div class='add'>+	if (op-&gt;type == OP_MM)</div><div class='add'>+		read_mmx_reg(ctxt, &amp;op-&gt;mm_val, op-&gt;addr.mm);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	struct x86_emulate_ops *ops = ctxt-&gt;ops;</div><div class='hunk'>@@ -4054,18 +4140,31 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((ctxt-&gt;d &amp; Sse)</div><div class='del'>-	    &amp;&amp; ((ops-&gt;get_cr(ctxt, 0) &amp; X86_CR0_EM)</div><div class='del'>-		|| !(ops-&gt;get_cr(ctxt, 4) &amp; X86_CR4_OSFXSR))) {</div><div class='add'>+	if (((ctxt-&gt;d &amp; (Sse|Mmx)) &amp;&amp; ((ops-&gt;get_cr(ctxt, 0) &amp; X86_CR0_EM)))</div><div class='add'>+	    || ((ctxt-&gt;d &amp; Sse) &amp;&amp; !(ops-&gt;get_cr(ctxt, 4) &amp; X86_CR4_OSFXSR))) {</div><div class='ctx'> 		rc = emulate_ud(ctxt);</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((ctxt-&gt;d &amp; Sse) &amp;&amp; (ops-&gt;get_cr(ctxt, 0) &amp; X86_CR0_TS)) {</div><div class='add'>+	if ((ctxt-&gt;d &amp; (Sse|Mmx)) &amp;&amp; (ops-&gt;get_cr(ctxt, 0) &amp; X86_CR0_TS)) {</div><div class='ctx'> 		rc = emulate_nm(ctxt);</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ctxt-&gt;d &amp; Mmx) {</div><div class='add'>+		rc = flush_pending_x87_faults(ctxt);</div><div class='add'>+		if (rc != X86EMUL_CONTINUE)</div><div class='add'>+			goto done;</div><div class='add'>+		/*</div><div class='add'>+		 * Now that we know the fpu is exception safe, we can fetch</div><div class='add'>+		 * operands from it.</div><div class='add'>+		 */</div><div class='add'>+		fetch_possible_mmx_operand(ctxt, &amp;ctxt-&gt;src);</div><div class='add'>+		fetch_possible_mmx_operand(ctxt, &amp;ctxt-&gt;src2);</div><div class='add'>+		if (!(ctxt-&gt;d &amp; Mov))</div><div class='add'>+			fetch_possible_mmx_operand(ctxt, &amp;ctxt-&gt;dst);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(ctxt-&gt;guest_mode) &amp;&amp; ctxt-&gt;intercept) {</div><div class='ctx'> 		rc = emulator_check_intercept(ctxt, ctxt-&gt;intercept,</div><div class='ctx'> 					      X86_ICPT_PRE_EXCEPT);</div><div class='head'>diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c<br/>index d68f99df690c..adba28f88d1a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/i8254.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/i8254.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/i8254.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/i8254.c</a></div><div class='hunk'>@@ -34,7 +34,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/workqueue.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "irq.h"</div><div class='ctx'> #include "i8254.h"</div><div class='hunk'>@@ -249,7 +248,7 @@ static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)</div><div class='ctx'> 		/* in this case, we had multiple outstanding pit interrupts</div><div class='ctx'> 		 * that we needed to inject.  Reinject</div><div class='ctx'> 		 */</div><div class='del'>-		queue_work(ps-&gt;pit-&gt;wq, &amp;ps-&gt;pit-&gt;expired);</div><div class='add'>+		queue_kthread_work(&amp;ps-&gt;pit-&gt;worker, &amp;ps-&gt;pit-&gt;expired);</div><div class='ctx'> 	ps-&gt;irq_ack = 1;</div><div class='ctx'> 	spin_unlock(&amp;ps-&gt;inject_lock);</div><div class='ctx'> }</div><div class='hunk'>@@ -270,7 +269,7 @@ void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)</div><div class='ctx'> static void destroy_pit_timer(struct kvm_pit *pit)</div><div class='ctx'> {</div><div class='ctx'> 	hrtimer_cancel(&amp;pit-&gt;pit_state.pit_timer.timer);</div><div class='del'>-	cancel_work_sync(&amp;pit-&gt;expired);</div><div class='add'>+	flush_kthread_work(&amp;pit-&gt;expired);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool kpit_is_periodic(struct kvm_timer *ktimer)</div><div class='hunk'>@@ -284,7 +283,7 @@ static struct kvm_timer_ops kpit_ops = {</div><div class='ctx'> 	.is_periodic = kpit_is_periodic,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void pit_do_work(struct work_struct *work)</div><div class='add'>+static void pit_do_work(struct kthread_work *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_pit *pit = container_of(work, struct kvm_pit, expired);</div><div class='ctx'> 	struct kvm *kvm = pit-&gt;kvm;</div><div class='hunk'>@@ -328,7 +327,7 @@ static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)</div><div class='ctx'> </div><div class='ctx'> 	if (ktimer-&gt;reinject || !atomic_read(&amp;ktimer-&gt;pending)) {</div><div class='ctx'> 		atomic_inc(&amp;ktimer-&gt;pending);</div><div class='del'>-		queue_work(pt-&gt;wq, &amp;pt-&gt;expired);</div><div class='add'>+		queue_kthread_work(&amp;pt-&gt;worker, &amp;pt-&gt;expired);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ktimer-&gt;t_ops-&gt;is_periodic(ktimer)) {</div><div class='hunk'>@@ -353,7 +352,7 @@ static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)</div><div class='ctx'> </div><div class='ctx'> 	/* TODO The new value only affected after the retriggered */</div><div class='ctx'> 	hrtimer_cancel(&amp;pt-&gt;timer);</div><div class='del'>-	cancel_work_sync(&amp;ps-&gt;pit-&gt;expired);</div><div class='add'>+	flush_kthread_work(&amp;ps-&gt;pit-&gt;expired);</div><div class='ctx'> 	pt-&gt;period = interval;</div><div class='ctx'> 	ps-&gt;is_periodic = is_period;</div><div class='ctx'> </div><div class='hunk'>@@ -669,6 +668,8 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_pit *pit;</div><div class='ctx'> 	struct kvm_kpit_state *pit_state;</div><div class='add'>+	struct pid *pid;</div><div class='add'>+	pid_t pid_nr;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);</div><div class='hunk'>@@ -685,14 +686,20 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)</div><div class='ctx'> 	mutex_lock(&amp;pit-&gt;pit_state.lock);</div><div class='ctx'> 	spin_lock_init(&amp;pit-&gt;pit_state.inject_lock);</div><div class='ctx'> </div><div class='del'>-	pit-&gt;wq = create_singlethread_workqueue("kvm-pit-wq");</div><div class='del'>-	if (!pit-&gt;wq) {</div><div class='add'>+	pid = get_pid(task_tgid(current));</div><div class='add'>+	pid_nr = pid_vnr(pid);</div><div class='add'>+	put_pid(pid);</div><div class='add'>+</div><div class='add'>+	init_kthread_worker(&amp;pit-&gt;worker);</div><div class='add'>+	pit-&gt;worker_task = kthread_run(kthread_worker_fn, &amp;pit-&gt;worker,</div><div class='add'>+				       "kvm-pit/%d", pid_nr);</div><div class='add'>+	if (IS_ERR(pit-&gt;worker_task)) {</div><div class='ctx'> 		mutex_unlock(&amp;pit-&gt;pit_state.lock);</div><div class='ctx'> 		kvm_free_irq_source_id(kvm, pit-&gt;irq_source_id);</div><div class='ctx'> 		kfree(pit);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='del'>-	INIT_WORK(&amp;pit-&gt;expired, pit_do_work);</div><div class='add'>+	init_kthread_work(&amp;pit-&gt;expired, pit_do_work);</div><div class='ctx'> </div><div class='ctx'> 	kvm-&gt;arch.vpit = pit;</div><div class='ctx'> 	pit-&gt;kvm = kvm;</div><div class='hunk'>@@ -736,7 +743,7 @@ fail:</div><div class='ctx'> 	kvm_unregister_irq_mask_notifier(kvm, 0, &amp;pit-&gt;mask_notifier);</div><div class='ctx'> 	kvm_unregister_irq_ack_notifier(kvm, &amp;pit_state-&gt;irq_ack_notifier);</div><div class='ctx'> 	kvm_free_irq_source_id(kvm, pit-&gt;irq_source_id);</div><div class='del'>-	destroy_workqueue(pit-&gt;wq);</div><div class='add'>+	kthread_stop(pit-&gt;worker_task);</div><div class='ctx'> 	kfree(pit);</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -756,10 +763,10 @@ void kvm_free_pit(struct kvm *kvm)</div><div class='ctx'> 		mutex_lock(&amp;kvm-&gt;arch.vpit-&gt;pit_state.lock);</div><div class='ctx'> 		timer = &amp;kvm-&gt;arch.vpit-&gt;pit_state.pit_timer.timer;</div><div class='ctx'> 		hrtimer_cancel(timer);</div><div class='del'>-		cancel_work_sync(&amp;kvm-&gt;arch.vpit-&gt;expired);</div><div class='add'>+		flush_kthread_work(&amp;kvm-&gt;arch.vpit-&gt;expired);</div><div class='add'>+		kthread_stop(kvm-&gt;arch.vpit-&gt;worker_task);</div><div class='ctx'> 		kvm_free_irq_source_id(kvm, kvm-&gt;arch.vpit-&gt;irq_source_id);</div><div class='ctx'> 		mutex_unlock(&amp;kvm-&gt;arch.vpit-&gt;pit_state.lock);</div><div class='del'>-		destroy_workqueue(kvm-&gt;arch.vpit-&gt;wq);</div><div class='ctx'> 		kfree(kvm-&gt;arch.vpit);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kvm/i8254.h b/arch/x86/kvm/i8254.h<br/>index 51a97426e791..fdf40425ea1d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/i8254.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/i8254.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/i8254.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/i8254.h</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> #ifndef __I8254_H</div><div class='ctx'> #define __I8254_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/kthread.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "iodev.h"</div><div class='ctx'> </div><div class='ctx'> struct kvm_kpit_channel_state {</div><div class='hunk'>@@ -39,8 +41,9 @@ struct kvm_pit {</div><div class='ctx'> 	struct kvm_kpit_state pit_state;</div><div class='ctx'> 	int irq_source_id;</div><div class='ctx'> 	struct kvm_irq_mask_notifier mask_notifier;</div><div class='del'>-	struct workqueue_struct *wq;</div><div class='del'>-	struct work_struct expired;</div><div class='add'>+	struct kthread_worker worker;</div><div class='add'>+	struct task_struct *worker_task;</div><div class='add'>+	struct kthread_work expired;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define KVM_PIT_BASE_ADDRESS	    0x40</div><div class='head'>diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c<br/>index 858432287ab6..93c15743f1ee 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/lapic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/lapic.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/lapic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/lapic.c</a></div><div class='hunk'>@@ -92,6 +92,11 @@ static inline int apic_test_and_clear_vector(int vec, void *bitmap)</div><div class='ctx'> 	return test_and_clear_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int apic_test_vector(int vec, void *bitmap)</div><div class='add'>+{</div><div class='add'>+	return test_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void apic_set_vector(int vec, void *bitmap)</div><div class='ctx'> {</div><div class='ctx'> 	set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));</div><div class='hunk'>@@ -480,7 +485,6 @@ int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2)</div><div class='ctx'> static void apic_set_eoi(struct kvm_lapic *apic)</div><div class='ctx'> {</div><div class='ctx'> 	int vector = apic_find_highest_isr(apic);</div><div class='del'>-	int trigger_mode;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Not every write EOI will has corresponding ISR,</div><div class='ctx'> 	 * one example is when Kernel check timer on setup_IO_APIC</div><div class='hunk'>@@ -491,12 +495,15 @@ static void apic_set_eoi(struct kvm_lapic *apic)</div><div class='ctx'> 	apic_clear_vector(vector, apic-&gt;regs + APIC_ISR);</div><div class='ctx'> 	apic_update_ppr(apic);</div><div class='ctx'> </div><div class='del'>-	if (apic_test_and_clear_vector(vector, apic-&gt;regs + APIC_TMR))</div><div class='del'>-		trigger_mode = IOAPIC_LEVEL_TRIG;</div><div class='del'>-	else</div><div class='del'>-		trigger_mode = IOAPIC_EDGE_TRIG;</div><div class='del'>-	if (!(apic_get_reg(apic, APIC_SPIV) &amp; APIC_SPIV_DIRECTED_EOI))</div><div class='add'>+	if (!(apic_get_reg(apic, APIC_SPIV) &amp; APIC_SPIV_DIRECTED_EOI) &amp;&amp;</div><div class='add'>+	    kvm_ioapic_handles_vector(apic-&gt;vcpu-&gt;kvm, vector)) {</div><div class='add'>+		int trigger_mode;</div><div class='add'>+		if (apic_test_vector(vector, apic-&gt;regs + APIC_TMR))</div><div class='add'>+			trigger_mode = IOAPIC_LEVEL_TRIG;</div><div class='add'>+		else</div><div class='add'>+			trigger_mode = IOAPIC_EDGE_TRIG;</div><div class='ctx'> 		kvm_ioapic_update_eoi(apic-&gt;vcpu-&gt;kvm, vector, trigger_mode);</div><div class='add'>+	}</div><div class='ctx'> 	kvm_make_request(KVM_REQ_EVENT, apic-&gt;vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1081,6 +1088,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	apic_update_ppr(apic);</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.apic_arb_prio = 0;</div><div class='add'>+	vcpu-&gt;arch.apic_attention = 0;</div><div class='ctx'> </div><div class='ctx'> 	apic_debug(KERN_INFO "%s: vcpu=%p, id=%d, base_msr="</div><div class='ctx'> 		   "0x%016" PRIx64 ", base_address=0x%0lx.\n", __func__,</div><div class='hunk'>@@ -1280,7 +1288,7 @@ void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	u32 data;</div><div class='ctx'> 	void *vapic;</div><div class='ctx'> </div><div class='del'>-	if (!irqchip_in_kernel(vcpu-&gt;kvm) || !vcpu-&gt;arch.apic-&gt;vapic_addr)</div><div class='add'>+	if (!test_bit(KVM_APIC_CHECK_VAPIC, &amp;vcpu-&gt;arch.apic_attention))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	vapic = kmap_atomic(vcpu-&gt;arch.apic-&gt;vapic_page);</div><div class='hunk'>@@ -1297,7 +1305,7 @@ void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_lapic *apic;</div><div class='ctx'> 	void *vapic;</div><div class='ctx'> </div><div class='del'>-	if (!irqchip_in_kernel(vcpu-&gt;kvm) || !vcpu-&gt;arch.apic-&gt;vapic_addr)</div><div class='add'>+	if (!test_bit(KVM_APIC_CHECK_VAPIC, &amp;vcpu-&gt;arch.apic_attention))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	apic = vcpu-&gt;arch.apic;</div><div class='hunk'>@@ -1317,10 +1325,11 @@ void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr)</div><div class='ctx'> {</div><div class='del'>-	if (!irqchip_in_kernel(vcpu-&gt;kvm))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	vcpu-&gt;arch.apic-&gt;vapic_addr = vapic_addr;</div><div class='add'>+	if (vapic_addr)</div><div class='add'>+		__set_bit(KVM_APIC_CHECK_VAPIC, &amp;vcpu-&gt;arch.apic_attention);</div><div class='add'>+	else</div><div class='add'>+		__clear_bit(KVM_APIC_CHECK_VAPIC, &amp;vcpu-&gt;arch.apic_attention);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data)</div><div class='head'>diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c<br/>index 4cb164268846..be3cea4407ff 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/mmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/mmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/mmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/mmu.c</a></div><div class='hunk'>@@ -135,8 +135,6 @@ module_param(dbg, bool, 0644);</div><div class='ctx'> #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \</div><div class='ctx'> 			| PT64_NX_MASK)</div><div class='ctx'> </div><div class='del'>-#define PTE_LIST_EXT 4</div><div class='del'>-</div><div class='ctx'> #define ACC_EXEC_MASK    1</div><div class='ctx'> #define ACC_WRITE_MASK   PT_WRITABLE_MASK</div><div class='ctx'> #define ACC_USER_MASK    PT_USER_MASK</div><div class='hunk'>@@ -151,6 +149,9 @@ module_param(dbg, bool, 0644);</div><div class='ctx'> </div><div class='ctx'> #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)</div><div class='ctx'> </div><div class='add'>+/* make pte_list_desc fit well in cache line */</div><div class='add'>+#define PTE_LIST_EXT 3</div><div class='add'>+</div><div class='ctx'> struct pte_list_desc {</div><div class='ctx'> 	u64 *sptes[PTE_LIST_EXT];</div><div class='ctx'> 	struct pte_list_desc *more;</div><div class='hunk'>@@ -550,19 +551,29 @@ static u64 mmu_spte_get_lockless(u64 *sptep)</div><div class='ctx'> </div><div class='ctx'> static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	atomic_inc(&amp;vcpu-&gt;kvm-&gt;arch.reader_counter);</div><div class='del'>-</div><div class='del'>-	/* Increase the counter before walking shadow page table */</div><div class='del'>-	smp_mb__after_atomic_inc();</div><div class='add'>+	/*</div><div class='add'>+	 * Prevent page table teardown by making any free-er wait during</div><div class='add'>+	 * kvm_flush_remote_tlbs() IPI to all active vcpus.</div><div class='add'>+	 */</div><div class='add'>+	local_irq_disable();</div><div class='add'>+	vcpu-&gt;mode = READING_SHADOW_PAGE_TABLES;</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure a following spte read is not reordered ahead of the write</div><div class='add'>+	 * to vcpu-&gt;mode.</div><div class='add'>+	 */</div><div class='add'>+	smp_mb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	/* Decrease the counter after walking shadow page table finished */</div><div class='del'>-	smp_mb__before_atomic_dec();</div><div class='del'>-	atomic_dec(&amp;vcpu-&gt;kvm-&gt;arch.reader_counter);</div><div class='del'>-	rcu_read_unlock();</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure the write to vcpu-&gt;mode is not reordered in front of</div><div class='add'>+	 * reads to sptes.  If it does, kvm_commit_zap_page() can see us</div><div class='add'>+	 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.</div><div class='add'>+	 */</div><div class='add'>+	smp_mb();</div><div class='add'>+	vcpu-&gt;mode = OUTSIDE_GUEST_MODE;</div><div class='add'>+	local_irq_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,</div><div class='hunk'>@@ -841,32 +852,6 @@ static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte,</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 *pte_list_next(unsigned long *pte_list, u64 *spte)</div><div class='del'>-{</div><div class='del'>-	struct pte_list_desc *desc;</div><div class='del'>-	u64 *prev_spte;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!*pte_list)</div><div class='del'>-		return NULL;</div><div class='del'>-	else if (!(*pte_list &amp; 1)) {</div><div class='del'>-		if (!spte)</div><div class='del'>-			return (u64 *)*pte_list;</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-	desc = (struct pte_list_desc *)(*pte_list &amp; ~1ul);</div><div class='del'>-	prev_spte = NULL;</div><div class='del'>-	while (desc) {</div><div class='del'>-		for (i = 0; i &lt; PTE_LIST_EXT &amp;&amp; desc-&gt;sptes[i]; ++i) {</div><div class='del'>-			if (prev_spte == spte)</div><div class='del'>-				return desc-&gt;sptes[i];</div><div class='del'>-			prev_spte = desc-&gt;sptes[i];</div><div class='del'>-		}</div><div class='del'>-		desc = desc-&gt;more;</div><div class='del'>-	}</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void</div><div class='ctx'> pte_list_desc_remove_entry(unsigned long *pte_list, struct pte_list_desc *desc,</div><div class='ctx'> 			   int i, struct pte_list_desc *prev_desc)</div><div class='hunk'>@@ -987,11 +972,6 @@ static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)</div><div class='ctx'> 	return pte_list_add(vcpu, spte, rmapp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 *rmap_next(unsigned long *rmapp, u64 *spte)</div><div class='del'>-{</div><div class='del'>-	return pte_list_next(rmapp, spte);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void rmap_remove(struct kvm *kvm, u64 *spte)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_mmu_page *sp;</div><div class='hunk'>@@ -1004,106 +984,201 @@ static void rmap_remove(struct kvm *kvm, u64 *spte)</div><div class='ctx'> 	pte_list_remove(spte, rmapp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Used by the following functions to iterate through the sptes linked by a</div><div class='add'>+ * rmap.  All fields are private and not assumed to be used outside.</div><div class='add'>+ */</div><div class='add'>+struct rmap_iterator {</div><div class='add'>+	/* private fields */</div><div class='add'>+	struct pte_list_desc *desc;	/* holds the sptep if not NULL */</div><div class='add'>+	int pos;			/* index of the sptep */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Iteration must be started by this function.  This should also be used after</div><div class='add'>+ * removing/dropping sptes from the rmap link because in such cases the</div><div class='add'>+ * information in the itererator may not be valid.</div><div class='add'>+ *</div><div class='add'>+ * Returns sptep if found, NULL otherwise.</div><div class='add'>+ */</div><div class='add'>+static u64 *rmap_get_first(unsigned long rmap, struct rmap_iterator *iter)</div><div class='add'>+{</div><div class='add'>+	if (!rmap)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!(rmap &amp; 1)) {</div><div class='add'>+		iter-&gt;desc = NULL;</div><div class='add'>+		return (u64 *)rmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iter-&gt;desc = (struct pte_list_desc *)(rmap &amp; ~1ul);</div><div class='add'>+	iter-&gt;pos = 0;</div><div class='add'>+	return iter-&gt;desc-&gt;sptes[iter-&gt;pos];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Must be used with a valid iterator: e.g. after rmap_get_first().</div><div class='add'>+ *</div><div class='add'>+ * Returns sptep if found, NULL otherwise.</div><div class='add'>+ */</div><div class='add'>+static u64 *rmap_get_next(struct rmap_iterator *iter)</div><div class='add'>+{</div><div class='add'>+	if (iter-&gt;desc) {</div><div class='add'>+		if (iter-&gt;pos &lt; PTE_LIST_EXT - 1) {</div><div class='add'>+			u64 *sptep;</div><div class='add'>+</div><div class='add'>+			++iter-&gt;pos;</div><div class='add'>+			sptep = iter-&gt;desc-&gt;sptes[iter-&gt;pos];</div><div class='add'>+			if (sptep)</div><div class='add'>+				return sptep;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		iter-&gt;desc = iter-&gt;desc-&gt;more;</div><div class='add'>+</div><div class='add'>+		if (iter-&gt;desc) {</div><div class='add'>+			iter-&gt;pos = 0;</div><div class='add'>+			/* desc-&gt;sptes[0] cannot be NULL */</div><div class='add'>+			return iter-&gt;desc-&gt;sptes[iter-&gt;pos];</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void drop_spte(struct kvm *kvm, u64 *sptep)</div><div class='ctx'> {</div><div class='ctx'> 	if (mmu_spte_clear_track_bits(sptep))</div><div class='ctx'> 		rmap_remove(kvm, sptep);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvm_mmu_rmap_write_protect(struct kvm *kvm, u64 gfn,</div><div class='del'>-			       struct kvm_memory_slot *slot)</div><div class='add'>+static int __rmap_write_protect(struct kvm *kvm, unsigned long *rmapp, int level)</div><div class='ctx'> {</div><div class='del'>-	unsigned long *rmapp;</div><div class='del'>-	u64 *spte;</div><div class='del'>-	int i, write_protected = 0;</div><div class='del'>-</div><div class='del'>-	rmapp = __gfn_to_rmap(gfn, PT_PAGE_TABLE_LEVEL, slot);</div><div class='del'>-	spte = rmap_next(rmapp, NULL);</div><div class='del'>-	while (spte) {</div><div class='del'>-		BUG_ON(!(*spte &amp; PT_PRESENT_MASK));</div><div class='del'>-		rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);</div><div class='del'>-		if (is_writable_pte(*spte)) {</div><div class='del'>-			mmu_spte_update(spte, *spte &amp; ~PT_WRITABLE_MASK);</div><div class='del'>-			write_protected = 1;</div><div class='add'>+	u64 *sptep;</div><div class='add'>+	struct rmap_iterator iter;</div><div class='add'>+	int write_protected = 0;</div><div class='add'>+</div><div class='add'>+	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;) {</div><div class='add'>+		BUG_ON(!(*sptep &amp; PT_PRESENT_MASK));</div><div class='add'>+		rmap_printk("rmap_write_protect: spte %p %llx\n", sptep, *sptep);</div><div class='add'>+</div><div class='add'>+		if (!is_writable_pte(*sptep)) {</div><div class='add'>+			sptep = rmap_get_next(&amp;iter);</div><div class='add'>+			continue;</div><div class='ctx'> 		}</div><div class='del'>-		spte = rmap_next(rmapp, spte);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	/* check for huge page mappings */</div><div class='del'>-	for (i = PT_DIRECTORY_LEVEL;</div><div class='del'>-	     i &lt; PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {</div><div class='del'>-		rmapp = __gfn_to_rmap(gfn, i, slot);</div><div class='del'>-		spte = rmap_next(rmapp, NULL);</div><div class='del'>-		while (spte) {</div><div class='del'>-			BUG_ON(!(*spte &amp; PT_PRESENT_MASK));</div><div class='del'>-			BUG_ON(!is_large_pte(*spte));</div><div class='del'>-			pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);</div><div class='del'>-			if (is_writable_pte(*spte)) {</div><div class='del'>-				drop_spte(kvm, spte);</div><div class='del'>-				--kvm-&gt;stat.lpages;</div><div class='del'>-				spte = NULL;</div><div class='del'>-				write_protected = 1;</div><div class='del'>-			}</div><div class='del'>-			spte = rmap_next(rmapp, spte);</div><div class='add'>+		if (level == PT_PAGE_TABLE_LEVEL) {</div><div class='add'>+			mmu_spte_update(sptep, *sptep &amp; ~PT_WRITABLE_MASK);</div><div class='add'>+			sptep = rmap_get_next(&amp;iter);</div><div class='add'>+		} else {</div><div class='add'>+			BUG_ON(!is_large_pte(*sptep));</div><div class='add'>+			drop_spte(kvm, sptep);</div><div class='add'>+			--kvm-&gt;stat.lpages;</div><div class='add'>+			sptep = rmap_get_first(*rmapp, &amp;iter);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		write_protected = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return write_protected;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages</div><div class='add'>+ * @kvm: kvm instance</div><div class='add'>+ * @slot: slot to protect</div><div class='add'>+ * @gfn_offset: start of the BITS_PER_LONG pages we care about</div><div class='add'>+ * @mask: indicates which pages we should protect</div><div class='add'>+ *</div><div class='add'>+ * Used when we do not need to care about huge page mappings: e.g. during dirty</div><div class='add'>+ * logging we do not have any such mappings.</div><div class='add'>+ */</div><div class='add'>+void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,</div><div class='add'>+				     struct kvm_memory_slot *slot,</div><div class='add'>+				     gfn_t gfn_offset, unsigned long mask)</div><div class='add'>+{</div><div class='add'>+	unsigned long *rmapp;</div><div class='add'>+</div><div class='add'>+	while (mask) {</div><div class='add'>+		rmapp = &amp;slot-&gt;rmap[gfn_offset + __ffs(mask)];</div><div class='add'>+		__rmap_write_protect(kvm, rmapp, PT_PAGE_TABLE_LEVEL);</div><div class='add'>+</div><div class='add'>+		/* clear the first set bit */</div><div class='add'>+		mask &amp;= mask - 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rmap_write_protect(struct kvm *kvm, u64 gfn)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_memory_slot *slot;</div><div class='add'>+	unsigned long *rmapp;</div><div class='add'>+	int i;</div><div class='add'>+	int write_protected = 0;</div><div class='ctx'> </div><div class='ctx'> 	slot = gfn_to_memslot(kvm, gfn);</div><div class='del'>-	return kvm_mmu_rmap_write_protect(kvm, gfn, slot);</div><div class='add'>+</div><div class='add'>+	for (i = PT_PAGE_TABLE_LEVEL;</div><div class='add'>+	     i &lt; PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {</div><div class='add'>+		rmapp = __gfn_to_rmap(gfn, i, slot);</div><div class='add'>+		write_protected |= __rmap_write_protect(kvm, rmapp, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return write_protected;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> 			   unsigned long data)</div><div class='ctx'> {</div><div class='del'>-	u64 *spte;</div><div class='add'>+	u64 *sptep;</div><div class='add'>+	struct rmap_iterator iter;</div><div class='ctx'> 	int need_tlb_flush = 0;</div><div class='ctx'> </div><div class='del'>-	while ((spte = rmap_next(rmapp, NULL))) {</div><div class='del'>-		BUG_ON(!(*spte &amp; PT_PRESENT_MASK));</div><div class='del'>-		rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);</div><div class='del'>-		drop_spte(kvm, spte);</div><div class='add'>+	while ((sptep = rmap_get_first(*rmapp, &amp;iter))) {</div><div class='add'>+		BUG_ON(!(*sptep &amp; PT_PRESENT_MASK));</div><div class='add'>+		rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", sptep, *sptep);</div><div class='add'>+</div><div class='add'>+		drop_spte(kvm, sptep);</div><div class='ctx'> 		need_tlb_flush = 1;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	return need_tlb_flush;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> 			     unsigned long data)</div><div class='ctx'> {</div><div class='add'>+	u64 *sptep;</div><div class='add'>+	struct rmap_iterator iter;</div><div class='ctx'> 	int need_flush = 0;</div><div class='del'>-	u64 *spte, new_spte;</div><div class='add'>+	u64 new_spte;</div><div class='ctx'> 	pte_t *ptep = (pte_t *)data;</div><div class='ctx'> 	pfn_t new_pfn;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(pte_huge(*ptep));</div><div class='ctx'> 	new_pfn = pte_pfn(*ptep);</div><div class='del'>-	spte = rmap_next(rmapp, NULL);</div><div class='del'>-	while (spte) {</div><div class='del'>-		BUG_ON(!is_shadow_present_pte(*spte));</div><div class='del'>-		rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);</div><div class='add'>+</div><div class='add'>+	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;) {</div><div class='add'>+		BUG_ON(!is_shadow_present_pte(*sptep));</div><div class='add'>+		rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", sptep, *sptep);</div><div class='add'>+</div><div class='ctx'> 		need_flush = 1;</div><div class='add'>+</div><div class='ctx'> 		if (pte_write(*ptep)) {</div><div class='del'>-			drop_spte(kvm, spte);</div><div class='del'>-			spte = rmap_next(rmapp, NULL);</div><div class='add'>+			drop_spte(kvm, sptep);</div><div class='add'>+			sptep = rmap_get_first(*rmapp, &amp;iter);</div><div class='ctx'> 		} else {</div><div class='del'>-			new_spte = *spte &amp;~ (PT64_BASE_ADDR_MASK);</div><div class='add'>+			new_spte = *sptep &amp; ~PT64_BASE_ADDR_MASK;</div><div class='ctx'> 			new_spte |= (u64)new_pfn &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 			new_spte &amp;= ~PT_WRITABLE_MASK;</div><div class='ctx'> 			new_spte &amp;= ~SPTE_HOST_WRITEABLE;</div><div class='ctx'> 			new_spte &amp;= ~shadow_accessed_mask;</div><div class='del'>-			mmu_spte_clear_track_bits(spte);</div><div class='del'>-			mmu_spte_set(spte, new_spte);</div><div class='del'>-			spte = rmap_next(rmapp, spte);</div><div class='add'>+</div><div class='add'>+			mmu_spte_clear_track_bits(sptep);</div><div class='add'>+			mmu_spte_set(sptep, new_spte);</div><div class='add'>+			sptep = rmap_get_next(&amp;iter);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	if (need_flush)</div><div class='ctx'> 		kvm_flush_remote_tlbs(kvm);</div><div class='ctx'> </div><div class='hunk'>@@ -1162,7 +1237,8 @@ void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)</div><div class='ctx'> static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> 			 unsigned long data)</div><div class='ctx'> {</div><div class='del'>-	u64 *spte;</div><div class='add'>+	u64 *sptep;</div><div class='add'>+	struct rmap_iterator iter;</div><div class='ctx'> 	int young = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1175,25 +1251,24 @@ static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> 	if (!shadow_accessed_mask)</div><div class='ctx'> 		return kvm_unmap_rmapp(kvm, rmapp, data);</div><div class='ctx'> </div><div class='del'>-	spte = rmap_next(rmapp, NULL);</div><div class='del'>-	while (spte) {</div><div class='del'>-		int _young;</div><div class='del'>-		u64 _spte = *spte;</div><div class='del'>-		BUG_ON(!(_spte &amp; PT_PRESENT_MASK));</div><div class='del'>-		_young = _spte &amp; PT_ACCESSED_MASK;</div><div class='del'>-		if (_young) {</div><div class='add'>+	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;</div><div class='add'>+	     sptep = rmap_get_next(&amp;iter)) {</div><div class='add'>+		BUG_ON(!(*sptep &amp; PT_PRESENT_MASK));</div><div class='add'>+</div><div class='add'>+		if (*sptep &amp; PT_ACCESSED_MASK) {</div><div class='ctx'> 			young = 1;</div><div class='del'>-			clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);</div><div class='add'>+			clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)sptep);</div><div class='ctx'> 		}</div><div class='del'>-		spte = rmap_next(rmapp, spte);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	return young;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> 			      unsigned long data)</div><div class='ctx'> {</div><div class='del'>-	u64 *spte;</div><div class='add'>+	u64 *sptep;</div><div class='add'>+	struct rmap_iterator iter;</div><div class='ctx'> 	int young = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1204,16 +1279,14 @@ static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,</div><div class='ctx'> 	if (!shadow_accessed_mask)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	spte = rmap_next(rmapp, NULL);</div><div class='del'>-	while (spte) {</div><div class='del'>-		u64 _spte = *spte;</div><div class='del'>-		BUG_ON(!(_spte &amp; PT_PRESENT_MASK));</div><div class='del'>-		young = _spte &amp; PT_ACCESSED_MASK;</div><div class='del'>-		if (young) {</div><div class='add'>+	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;</div><div class='add'>+	     sptep = rmap_get_next(&amp;iter)) {</div><div class='add'>+		BUG_ON(!(*sptep &amp; PT_PRESENT_MASK));</div><div class='add'>+</div><div class='add'>+		if (*sptep &amp; PT_ACCESSED_MASK) {</div><div class='ctx'> 			young = 1;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		spte = rmap_next(rmapp, spte);</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	return young;</div><div class='hunk'>@@ -1865,10 +1938,11 @@ static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)</div><div class='ctx'> </div><div class='ctx'> static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)</div><div class='ctx'> {</div><div class='del'>-	u64 *parent_pte;</div><div class='add'>+	u64 *sptep;</div><div class='add'>+	struct rmap_iterator iter;</div><div class='ctx'> </div><div class='del'>-	while ((parent_pte = pte_list_next(&amp;sp-&gt;parent_ptes, NULL)))</div><div class='del'>-		drop_parent_pte(sp, parent_pte);</div><div class='add'>+	while ((sptep = rmap_get_first(sp-&gt;parent_ptes, &amp;iter)))</div><div class='add'>+		drop_parent_pte(sp, sptep);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mmu_zap_unsync_children(struct kvm *kvm,</div><div class='hunk'>@@ -1925,30 +1999,6 @@ static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void kvm_mmu_isolate_pages(struct list_head *invalid_list)</div><div class='del'>-{</div><div class='del'>-	struct kvm_mmu_page *sp;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(sp, invalid_list, link)</div><div class='del'>-		kvm_mmu_isolate_page(sp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void free_pages_rcu(struct rcu_head *head)</div><div class='del'>-{</div><div class='del'>-	struct kvm_mmu_page *next, *sp;</div><div class='del'>-</div><div class='del'>-	sp = container_of(head, struct kvm_mmu_page, rcu);</div><div class='del'>-	while (sp) {</div><div class='del'>-		if (!list_empty(&amp;sp-&gt;link))</div><div class='del'>-			next = list_first_entry(&amp;sp-&gt;link,</div><div class='del'>-				      struct kvm_mmu_page, link);</div><div class='del'>-		else</div><div class='del'>-			next = NULL;</div><div class='del'>-		kvm_mmu_free_page(sp);</div><div class='del'>-		sp = next;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void kvm_mmu_commit_zap_page(struct kvm *kvm,</div><div class='ctx'> 				    struct list_head *invalid_list)</div><div class='ctx'> {</div><div class='hunk'>@@ -1957,17 +2007,17 @@ static void kvm_mmu_commit_zap_page(struct kvm *kvm,</div><div class='ctx'> 	if (list_empty(invalid_list))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	kvm_flush_remote_tlbs(kvm);</div><div class='del'>-</div><div class='del'>-	if (atomic_read(&amp;kvm-&gt;arch.reader_counter)) {</div><div class='del'>-		kvm_mmu_isolate_pages(invalid_list);</div><div class='del'>-		sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);</div><div class='del'>-		list_del_init(invalid_list);</div><div class='add'>+	/*</div><div class='add'>+	 * wmb: make sure everyone sees our modifications to the page tables</div><div class='add'>+	 * rmb: make sure we see changes to vcpu-&gt;mode</div><div class='add'>+	 */</div><div class='add'>+	smp_mb();</div><div class='ctx'> </div><div class='del'>-		trace_kvm_mmu_delay_free_pages(sp);</div><div class='del'>-		call_rcu(&amp;sp-&gt;rcu, free_pages_rcu);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	/*</div><div class='add'>+	 * Wait for all vcpus to exit guest mode and/or lockless shadow</div><div class='add'>+	 * page table walks.</div><div class='add'>+	 */</div><div class='add'>+	kvm_flush_remote_tlbs(kvm);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);</div><div class='hunk'>@@ -1975,7 +2025,6 @@ static void kvm_mmu_commit_zap_page(struct kvm *kvm,</div><div class='ctx'> 		kvm_mmu_isolate_page(sp);</div><div class='ctx'> 		kvm_mmu_free_page(sp);</div><div class='ctx'> 	} while (!list_empty(invalid_list));</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2546,8 +2595,7 @@ static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			*gfnp = gfn;</div><div class='ctx'> 			kvm_release_pfn_clean(pfn);</div><div class='ctx'> 			pfn &amp;= ~mask;</div><div class='del'>-			if (!get_page_unless_zero(pfn_to_page(pfn)))</div><div class='del'>-				BUG();</div><div class='add'>+			kvm_get_pfn(pfn);</div><div class='ctx'> 			*pfnp = pfn;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3554,7 +3602,7 @@ static bool detect_write_flooding(struct kvm_mmu_page *sp)</div><div class='ctx'> 	 * Skip write-flooding detected for the sp whose level is 1, because</div><div class='ctx'> 	 * it can become unsync, then the guest page is not write-protected.</div><div class='ctx'> 	 */</div><div class='del'>-	if (sp-&gt;role.level == 1)</div><div class='add'>+	if (sp-&gt;role.level == PT_PAGE_TABLE_LEVEL)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	return ++sp-&gt;write_flooding_count &gt;= 3;</div><div class='head'>diff --git a/arch/x86/kvm/mmu_audit.c b/arch/x86/kvm/mmu_audit.c<br/>index 715da5a19a5b..7d7d0b9e23eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/mmu_audit.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/mmu_audit.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/mmu_audit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/mmu_audit.c</a></div><div class='hunk'>@@ -192,7 +192,8 @@ static void audit_write_protection(struct kvm *kvm, struct kvm_mmu_page *sp)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_memory_slot *slot;</div><div class='ctx'> 	unsigned long *rmapp;</div><div class='del'>-	u64 *spte;</div><div class='add'>+	u64 *sptep;</div><div class='add'>+	struct rmap_iterator iter;</div><div class='ctx'> </div><div class='ctx'> 	if (sp-&gt;role.direct || sp-&gt;unsync || sp-&gt;role.invalid)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -200,13 +201,12 @@ static void audit_write_protection(struct kvm *kvm, struct kvm_mmu_page *sp)</div><div class='ctx'> 	slot = gfn_to_memslot(kvm, sp-&gt;gfn);</div><div class='ctx'> 	rmapp = &amp;slot-&gt;rmap[sp-&gt;gfn - slot-&gt;base_gfn];</div><div class='ctx'> </div><div class='del'>-	spte = rmap_next(rmapp, NULL);</div><div class='del'>-	while (spte) {</div><div class='del'>-		if (is_writable_pte(*spte))</div><div class='add'>+	for (sptep = rmap_get_first(*rmapp, &amp;iter); sptep;</div><div class='add'>+	     sptep = rmap_get_next(&amp;iter)) {</div><div class='add'>+		if (is_writable_pte(*sptep))</div><div class='ctx'> 			audit_printk(kvm, "shadow page has writable "</div><div class='ctx'> 				     "mappings: gfn %llx role %x\n",</div><div class='ctx'> 				     sp-&gt;gfn, sp-&gt;role.word);</div><div class='del'>-		spte = rmap_next(rmapp, spte);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h<br/>index df5a70311be8..34f970937ef1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/paging_tmpl.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/paging_tmpl.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/paging_tmpl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/paging_tmpl.h</a></div><div class='hunk'>@@ -658,7 +658,7 @@ static gpa_t FNAME(get_level1_sp_gpa)(struct kvm_mmu_page *sp)</div><div class='ctx'> {</div><div class='ctx'> 	int offset = 0;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(sp-&gt;role.level != 1);</div><div class='add'>+	WARN_ON(sp-&gt;role.level != PT_PAGE_TABLE_LEVEL);</div><div class='ctx'> </div><div class='ctx'> 	if (PTTYPE == 32)</div><div class='ctx'> 		offset = sp-&gt;role.quadrant &lt;&lt; PT64_LEVEL_BITS;</div><div class='head'>diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c<br/>index e334389e1c75..f75af406b268 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/svm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/svm.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/svm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/svm.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include "x86.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='hunk'>@@ -42,6 +43,12 @@</div><div class='ctx'> MODULE_AUTHOR("Qumranet");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='add'>+static const struct x86_cpu_id svm_cpu_id[] = {</div><div class='add'>+	X86_FEATURE_MATCH(X86_FEATURE_SVM),</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(x86cpu, svm_cpu_id);</div><div class='add'>+</div><div class='ctx'> #define IOPM_ALLOC_ORDER 2</div><div class='ctx'> #define MSRPM_ALLOC_ORDER 1</div><div class='ctx'> </div><div class='hunk'>@@ -3240,6 +3247,7 @@ static int interrupt_window_interception(struct vcpu_svm *svm)</div><div class='ctx'> 	svm_clear_vintr(svm);</div><div class='ctx'> 	svm-&gt;vmcb-&gt;control.int_ctl &amp;= ~V_IRQ_MASK;</div><div class='ctx'> 	mark_dirty(svm-&gt;vmcb, VMCB_INTR);</div><div class='add'>+	++svm-&gt;vcpu.stat.irq_window_exits;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the user space waits to inject interrupts, exit as soon as</div><div class='ctx'> 	 * possible</div><div class='hunk'>@@ -3247,7 +3255,6 @@ static int interrupt_window_interception(struct vcpu_svm *svm)</div><div class='ctx'> 	if (!irqchip_in_kernel(svm-&gt;vcpu.kvm) &amp;&amp;</div><div class='ctx'> 	    kvm_run-&gt;request_interrupt_window &amp;&amp;</div><div class='ctx'> 	    !kvm_cpu_has_interrupt(&amp;svm-&gt;vcpu)) {</div><div class='del'>-		++svm-&gt;vcpu.stat.irq_window_exits;</div><div class='ctx'> 		kvm_run-&gt;exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c<br/>index 4ff0ab9bc3c8..32eb58866292 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/vmx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/vmx.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/vmx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/vmx.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='ctx'> #include &lt;linux/ftrace_event.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/tboot.h&gt;</div><div class='hunk'>@@ -51,6 +52,12 @@</div><div class='ctx'> MODULE_AUTHOR("Qumranet");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='add'>+static const struct x86_cpu_id vmx_cpu_id[] = {</div><div class='add'>+	X86_FEATURE_MATCH(X86_FEATURE_VMX),</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(x86cpu, vmx_cpu_id);</div><div class='add'>+</div><div class='ctx'> static bool __read_mostly enable_vpid = 1;</div><div class='ctx'> module_param_named(vpid, enable_vpid, bool, 0444);</div><div class='ctx'> </div><div class='hunk'>@@ -386,6 +393,9 @@ struct vcpu_vmx {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		int           loaded;</div><div class='ctx'> 		u16           fs_sel, gs_sel, ldt_sel;</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+		u16           ds_sel, es_sel;</div><div class='add'>+#endif</div><div class='ctx'> 		int           gs_ldt_reload_needed;</div><div class='ctx'> 		int           fs_reload_needed;</div><div class='ctx'> 	} host_state;</div><div class='hunk'>@@ -1411,6 +1421,11 @@ static void vmx_save_host_state(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='add'>+	savesegment(ds, vmx-&gt;host_state.ds_sel);</div><div class='add'>+	savesegment(es, vmx-&gt;host_state.es_sel);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='ctx'> 	vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));</div><div class='ctx'> 	vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));</div><div class='ctx'> #else</div><div class='hunk'>@@ -1450,6 +1465,19 @@ static void __vmx_load_host_state(struct vcpu_vmx *vmx)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (vmx-&gt;host_state.fs_reload_needed)</div><div class='ctx'> 		loadsegment(fs, vmx-&gt;host_state.fs_sel);</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	if (unlikely(vmx-&gt;host_state.ds_sel | vmx-&gt;host_state.es_sel)) {</div><div class='add'>+		loadsegment(ds, vmx-&gt;host_state.ds_sel);</div><div class='add'>+		loadsegment(es, vmx-&gt;host_state.es_sel);</div><div class='add'>+	}</div><div class='add'>+#else</div><div class='add'>+	/*</div><div class='add'>+	 * The sysexit path does not restore ds/es, so we must set them to</div><div class='add'>+	 * a reasonable value ourselves.</div><div class='add'>+	 */</div><div class='add'>+	loadsegment(ds, __USER_DS);</div><div class='add'>+	loadsegment(es, __USER_DS);</div><div class='add'>+#endif</div><div class='ctx'> 	reload_tss();</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> 	wrmsrl(MSR_KERNEL_GS_BASE, vmx-&gt;msr_host_kernel_gs_base);</div><div class='hunk'>@@ -3633,8 +3661,18 @@ static void vmx_set_constant_host_state(void)</div><div class='ctx'> 	vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */</div><div class='ctx'> </div><div class='ctx'> 	vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	/*</div><div class='add'>+	 * Load null selectors, so we can avoid reloading them in</div><div class='add'>+	 * __vmx_load_host_state(), in case userspace uses the null selectors</div><div class='add'>+	 * too (the expected case).</div><div class='add'>+	 */</div><div class='add'>+	vmcs_write16(HOST_DS_SELECTOR, 0);</div><div class='add'>+	vmcs_write16(HOST_ES_SELECTOR, 0);</div><div class='add'>+#else</div><div class='ctx'> 	vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */</div><div class='ctx'> 	vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */</div><div class='add'>+#endif</div><div class='ctx'> 	vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */</div><div class='ctx'> 	vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */</div><div class='ctx'> </div><div class='hunk'>@@ -6256,7 +6294,6 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	asm("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));</div><div class='ctx'> 	vmx-&gt;loaded_vmcs-&gt;launched = 1;</div><div class='ctx'> </div><div class='ctx'> 	vmx-&gt;exit_reason = vmcs_read32(VM_EXIT_REASON);</div><div class='hunk'>@@ -6343,7 +6380,7 @@ static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)</div><div class='ctx'> 	return &amp;vmx-&gt;vcpu;</div><div class='ctx'> </div><div class='ctx'> free_vmcs:</div><div class='del'>-	free_vmcs(vmx-&gt;loaded_vmcs-&gt;vmcs);</div><div class='add'>+	free_loaded_vmcs(vmx-&gt;loaded_vmcs);</div><div class='ctx'> free_msrs:</div><div class='ctx'> 	kfree(vmx-&gt;guest_msrs);</div><div class='ctx'> uninit_vcpu:</div><div class='head'>diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c<br/>index 91a5e989abcf..be6d54929fa7 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/x86.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/x86.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/x86.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/x86.c</a></div><div class='hunk'>@@ -2147,6 +2147,7 @@ int kvm_dev_ioctl_check_extension(long ext)</div><div class='ctx'> 	case KVM_CAP_ASYNC_PF:</div><div class='ctx'> 	case KVM_CAP_GET_TSC_KHZ:</div><div class='ctx'> 	case KVM_CAP_PCI_2_3:</div><div class='add'>+	case KVM_CAP_KVMCLOCK_CTRL:</div><div class='ctx'> 		r = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_CAP_COALESCED_MMIO:</div><div class='hunk'>@@ -2597,6 +2598,23 @@ static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * kvm_set_guest_paused() indicates to the guest kernel that it has been</div><div class='add'>+ * stopped by the hypervisor.  This function will be called from the host only.</div><div class='add'>+ * EINVAL is returned when the host attempts to set the flag for a guest that</div><div class='add'>+ * does not support pv clocks.</div><div class='add'>+ */</div><div class='add'>+static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct pvclock_vcpu_time_info *src = &amp;vcpu-&gt;arch.hv_clock;</div><div class='add'>+	if (!vcpu-&gt;arch.time_page)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	src-&gt;flags |= PVCLOCK_GUEST_STOPPED;</div><div class='add'>+	mark_page_dirty(vcpu-&gt;kvm, vcpu-&gt;arch.time &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> long kvm_arch_vcpu_ioctl(struct file *filp,</div><div class='ctx'> 			 unsigned int ioctl, unsigned long arg)</div><div class='ctx'> {</div><div class='hunk'>@@ -2873,6 +2891,10 @@ long kvm_arch_vcpu_ioctl(struct file *filp,</div><div class='ctx'> 		r = vcpu-&gt;arch.virtual_tsc_khz;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='add'>+	case KVM_KVMCLOCK_CTRL: {</div><div class='add'>+		r = kvm_set_guest_paused(vcpu);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> 	default:</div><div class='ctx'> 		r = -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3045,57 +3067,32 @@ static int kvm_vm_ioctl_reinject(struct kvm *kvm,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * write_protect_slot - write protect a slot for dirty logging</div><div class='del'>- * @kvm: the kvm instance</div><div class='del'>- * @memslot: the slot we protect</div><div class='del'>- * @dirty_bitmap: the bitmap indicating which pages are dirty</div><div class='del'>- * @nr_dirty_pages: the number of dirty pages</div><div class='add'>+ * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot</div><div class='add'>+ * @kvm: kvm instance</div><div class='add'>+ * @log: slot id and address to which we copy the log</div><div class='ctx'>  *</div><div class='del'>- * We have two ways to find all sptes to protect:</div><div class='del'>- * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and</div><div class='del'>- *    checks ones that have a spte mapping a page in the slot.</div><div class='del'>- * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.</div><div class='add'>+ * We need to keep it in mind that VCPU threads can write to the bitmap</div><div class='add'>+ * concurrently.  So, to avoid losing data, we keep the following order for</div><div class='add'>+ * each bit:</div><div class='ctx'>  *</div><div class='del'>- * Generally speaking, if there are not so many dirty pages compared to the</div><div class='del'>- * number of shadow pages, we should use the latter.</div><div class='add'>+ *   1. Take a snapshot of the bit and clear it if needed.</div><div class='add'>+ *   2. Write protect the corresponding page.</div><div class='add'>+ *   3. Flush TLB's if needed.</div><div class='add'>+ *   4. Copy the snapshot to the userspace.</div><div class='ctx'>  *</div><div class='del'>- * Note that letting others write into a page marked dirty in the old bitmap</div><div class='del'>- * by using the remaining tlb entry is not a problem.  That page will become</div><div class='del'>- * write protected again when we flush the tlb and then be reported dirty to</div><div class='del'>- * the user space by copying the old bitmap.</div><div class='del'>- */</div><div class='del'>-static void write_protect_slot(struct kvm *kvm,</div><div class='del'>-			       struct kvm_memory_slot *memslot,</div><div class='del'>-			       unsigned long *dirty_bitmap,</div><div class='del'>-			       unsigned long nr_dirty_pages)</div><div class='del'>-{</div><div class='del'>-	spin_lock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-</div><div class='del'>-	/* Not many dirty pages compared to # of shadow pages. */</div><div class='del'>-	if (nr_dirty_pages &lt; kvm-&gt;arch.n_used_mmu_pages) {</div><div class='del'>-		unsigned long gfn_offset;</div><div class='del'>-</div><div class='del'>-		for_each_set_bit(gfn_offset, dirty_bitmap, memslot-&gt;npages) {</div><div class='del'>-			unsigned long gfn = memslot-&gt;base_gfn + gfn_offset;</div><div class='del'>-</div><div class='del'>-			kvm_mmu_rmap_write_protect(kvm, gfn, memslot);</div><div class='del'>-		}</div><div class='del'>-		kvm_flush_remote_tlbs(kvm);</div><div class='del'>-	} else</div><div class='del'>-		kvm_mmu_slot_remove_write_access(kvm, memslot-&gt;id);</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Get (and clear) the dirty memory log for a memory slot.</div><div class='add'>+ * Between 2 and 3, the guest may write to the page using the remaining TLB</div><div class='add'>+ * entry.  This is not a problem because the page will be reported dirty at</div><div class='add'>+ * step 4 using the snapshot taken before and step 3 ensures that successive</div><div class='add'>+ * writes will be logged for the next call.</div><div class='ctx'>  */</div><div class='del'>-int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,</div><div class='del'>-				      struct kvm_dirty_log *log)</div><div class='add'>+int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> 	struct kvm_memory_slot *memslot;</div><div class='del'>-	unsigned long n, nr_dirty_pages;</div><div class='add'>+	unsigned long n, i;</div><div class='add'>+	unsigned long *dirty_bitmap;</div><div class='add'>+	unsigned long *dirty_bitmap_buffer;</div><div class='add'>+	bool is_dirty = false;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;kvm-&gt;slots_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -3104,49 +3101,42 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	memslot = id_to_memslot(kvm-&gt;memslots, log-&gt;slot);</div><div class='add'>+</div><div class='add'>+	dirty_bitmap = memslot-&gt;dirty_bitmap;</div><div class='ctx'> 	r = -ENOENT;</div><div class='del'>-	if (!memslot-&gt;dirty_bitmap)</div><div class='add'>+	if (!dirty_bitmap)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	n = kvm_dirty_bitmap_bytes(memslot);</div><div class='del'>-	nr_dirty_pages = memslot-&gt;nr_dirty_pages;</div><div class='ctx'> </div><div class='del'>-	/* If nothing is dirty, don't bother messing with page tables. */</div><div class='del'>-	if (nr_dirty_pages) {</div><div class='del'>-		struct kvm_memslots *slots, *old_slots;</div><div class='del'>-		unsigned long *dirty_bitmap, *dirty_bitmap_head;</div><div class='add'>+	dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);</div><div class='add'>+	memset(dirty_bitmap_buffer, 0, n);</div><div class='ctx'> </div><div class='del'>-		dirty_bitmap = memslot-&gt;dirty_bitmap;</div><div class='del'>-		dirty_bitmap_head = memslot-&gt;dirty_bitmap_head;</div><div class='del'>-		if (dirty_bitmap == dirty_bitmap_head)</div><div class='del'>-			dirty_bitmap_head += n / sizeof(long);</div><div class='del'>-		memset(dirty_bitmap_head, 0, n);</div><div class='add'>+	spin_lock(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> </div><div class='del'>-		r = -ENOMEM;</div><div class='del'>-		slots = kmemdup(kvm-&gt;memslots, sizeof(*kvm-&gt;memslots), GFP_KERNEL);</div><div class='del'>-		if (!slots)</div><div class='del'>-			goto out;</div><div class='add'>+	for (i = 0; i &lt; n / sizeof(long); i++) {</div><div class='add'>+		unsigned long mask;</div><div class='add'>+		gfn_t offset;</div><div class='ctx'> </div><div class='del'>-		memslot = id_to_memslot(slots, log-&gt;slot);</div><div class='del'>-		memslot-&gt;nr_dirty_pages = 0;</div><div class='del'>-		memslot-&gt;dirty_bitmap = dirty_bitmap_head;</div><div class='del'>-		update_memslots(slots, NULL);</div><div class='add'>+		if (!dirty_bitmap[i])</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-		old_slots = kvm-&gt;memslots;</div><div class='del'>-		rcu_assign_pointer(kvm-&gt;memslots, slots);</div><div class='del'>-		synchronize_srcu_expedited(&amp;kvm-&gt;srcu);</div><div class='del'>-		kfree(old_slots);</div><div class='add'>+		is_dirty = true;</div><div class='ctx'> </div><div class='del'>-		write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);</div><div class='add'>+		mask = xchg(&amp;dirty_bitmap[i], 0);</div><div class='add'>+		dirty_bitmap_buffer[i] = mask;</div><div class='ctx'> </div><div class='del'>-		r = -EFAULT;</div><div class='del'>-		if (copy_to_user(log-&gt;dirty_bitmap, dirty_bitmap, n))</div><div class='del'>-			goto out;</div><div class='del'>-	} else {</div><div class='del'>-		r = -EFAULT;</div><div class='del'>-		if (clear_user(log-&gt;dirty_bitmap, n))</div><div class='del'>-			goto out;</div><div class='add'>+		offset = i * BITS_PER_LONG;</div><div class='add'>+		kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);</div><div class='ctx'> 	}</div><div class='add'>+	if (is_dirty)</div><div class='add'>+		kvm_flush_remote_tlbs(kvm);</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	r = -EFAULT;</div><div class='add'>+	if (copy_to_user(log-&gt;dirty_bitmap, dirty_bitmap_buffer, n))</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	r = 0;</div><div class='ctx'> out:</div><div class='hunk'>@@ -3728,9 +3718,8 @@ struct read_write_emulator_ops {</div><div class='ctx'> static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)</div><div class='ctx'> {</div><div class='ctx'> 	if (vcpu-&gt;mmio_read_completed) {</div><div class='del'>-		memcpy(val, vcpu-&gt;mmio_data, bytes);</div><div class='ctx'> 		trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,</div><div class='del'>-			       vcpu-&gt;mmio_phys_addr, *(u64 *)val);</div><div class='add'>+			       vcpu-&gt;mmio_fragments[0].gpa, *(u64 *)val);</div><div class='ctx'> 		vcpu-&gt;mmio_read_completed = 0;</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3766,8 +3755,9 @@ static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,</div><div class='ctx'> static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,</div><div class='ctx'> 			   void *val, int bytes)</div><div class='ctx'> {</div><div class='del'>-	memcpy(vcpu-&gt;mmio_data, val, bytes);</div><div class='del'>-	memcpy(vcpu-&gt;run-&gt;mmio.data, vcpu-&gt;mmio_data, 8);</div><div class='add'>+	struct kvm_mmio_fragment *frag = &amp;vcpu-&gt;mmio_fragments[0];</div><div class='add'>+</div><div class='add'>+	memcpy(vcpu-&gt;run-&gt;mmio.data, frag-&gt;data, frag-&gt;len);</div><div class='ctx'> 	return X86EMUL_CONTINUE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3794,10 +3784,7 @@ static int emulator_read_write_onepage(unsigned long addr, void *val,</div><div class='ctx'> 	gpa_t gpa;</div><div class='ctx'> 	int handled, ret;</div><div class='ctx'> 	bool write = ops-&gt;write;</div><div class='del'>-</div><div class='del'>-	if (ops-&gt;read_write_prepare &amp;&amp;</div><div class='del'>-		  ops-&gt;read_write_prepare(vcpu, val, bytes))</div><div class='del'>-		return X86EMUL_CONTINUE;</div><div class='add'>+	struct kvm_mmio_fragment *frag;</div><div class='ctx'> </div><div class='ctx'> 	ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &amp;gpa, exception, write);</div><div class='ctx'> </div><div class='hunk'>@@ -3823,15 +3810,19 @@ mmio:</div><div class='ctx'> 	bytes -= handled;</div><div class='ctx'> 	val += handled;</div><div class='ctx'> </div><div class='del'>-	vcpu-&gt;mmio_needed = 1;</div><div class='del'>-	vcpu-&gt;run-&gt;exit_reason = KVM_EXIT_MMIO;</div><div class='del'>-	vcpu-&gt;run-&gt;mmio.phys_addr = vcpu-&gt;mmio_phys_addr = gpa;</div><div class='del'>-	vcpu-&gt;mmio_size = bytes;</div><div class='del'>-	vcpu-&gt;run-&gt;mmio.len = min(vcpu-&gt;mmio_size, 8);</div><div class='del'>-	vcpu-&gt;run-&gt;mmio.is_write = vcpu-&gt;mmio_is_write = write;</div><div class='del'>-	vcpu-&gt;mmio_index = 0;</div><div class='add'>+	while (bytes) {</div><div class='add'>+		unsigned now = min(bytes, 8U);</div><div class='ctx'> </div><div class='del'>-	return ops-&gt;read_write_exit_mmio(vcpu, gpa, val, bytes);</div><div class='add'>+		frag = &amp;vcpu-&gt;mmio_fragments[vcpu-&gt;mmio_nr_fragments++];</div><div class='add'>+		frag-&gt;gpa = gpa;</div><div class='add'>+		frag-&gt;data = val;</div><div class='add'>+		frag-&gt;len = now;</div><div class='add'>+</div><div class='add'>+		gpa += now;</div><div class='add'>+		val += now;</div><div class='add'>+		bytes -= now;</div><div class='add'>+	}</div><div class='add'>+	return X86EMUL_CONTINUE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,</div><div class='hunk'>@@ -3840,10 +3831,18 @@ int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,</div><div class='ctx'> 			struct read_write_emulator_ops *ops)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);</div><div class='add'>+	gpa_t gpa;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;read_write_prepare &amp;&amp;</div><div class='add'>+		  ops-&gt;read_write_prepare(vcpu, val, bytes))</div><div class='add'>+		return X86EMUL_CONTINUE;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;mmio_nr_fragments = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Crossing a page boundary? */</div><div class='ctx'> 	if (((addr + bytes - 1) ^ addr) &amp; PAGE_MASK) {</div><div class='del'>-		int rc, now;</div><div class='add'>+		int now;</div><div class='ctx'> </div><div class='ctx'> 		now = -addr &amp; ~PAGE_MASK;</div><div class='ctx'> 		rc = emulator_read_write_onepage(addr, val, now, exception,</div><div class='hunk'>@@ -3856,8 +3855,25 @@ int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,</div><div class='ctx'> 		bytes -= now;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return emulator_read_write_onepage(addr, val, bytes, exception,</div><div class='del'>-					   vcpu, ops);</div><div class='add'>+	rc = emulator_read_write_onepage(addr, val, bytes, exception,</div><div class='add'>+					 vcpu, ops);</div><div class='add'>+	if (rc != X86EMUL_CONTINUE)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (!vcpu-&gt;mmio_nr_fragments)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	gpa = vcpu-&gt;mmio_fragments[0].gpa;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;mmio_needed = 1;</div><div class='add'>+	vcpu-&gt;mmio_cur_fragment = 0;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;run-&gt;mmio.len = vcpu-&gt;mmio_fragments[0].len;</div><div class='add'>+	vcpu-&gt;run-&gt;mmio.is_write = vcpu-&gt;mmio_is_write = ops-&gt;write;</div><div class='add'>+	vcpu-&gt;run-&gt;exit_reason = KVM_EXIT_MMIO;</div><div class='add'>+	vcpu-&gt;run-&gt;mmio.phys_addr = gpa;</div><div class='add'>+</div><div class='add'>+	return ops-&gt;read_write_exit_mmio(vcpu, gpa, val, bytes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,</div><div class='hunk'>@@ -5263,10 +5279,6 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			kvm_deliver_pmi(vcpu);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	r = kvm_mmu_reload(vcpu);</div><div class='del'>-	if (unlikely(r))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {</div><div class='ctx'> 		inject_pending_event(vcpu);</div><div class='ctx'> </div><div class='hunk'>@@ -5282,6 +5294,12 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	r = kvm_mmu_reload(vcpu);</div><div class='add'>+	if (unlikely(r)) {</div><div class='add'>+		kvm_x86_ops-&gt;cancel_injection(vcpu);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	preempt_disable();</div><div class='ctx'> </div><div class='ctx'> 	kvm_x86_ops-&gt;prepare_guest_switch(vcpu);</div><div class='hunk'>@@ -5456,33 +5474,55 @@ static int __vcpu_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Implements the following, as a state machine:</div><div class='add'>+ *</div><div class='add'>+ * read:</div><div class='add'>+ *   for each fragment</div><div class='add'>+ *     write gpa, len</div><div class='add'>+ *     exit</div><div class='add'>+ *     copy data</div><div class='add'>+ *   execute insn</div><div class='add'>+ *</div><div class='add'>+ * write:</div><div class='add'>+ *   for each fragment</div><div class='add'>+ *      write gpa, len</div><div class='add'>+ *      copy data</div><div class='add'>+ *      exit</div><div class='add'>+ */</div><div class='ctx'> static int complete_mmio(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_run *run = vcpu-&gt;run;</div><div class='add'>+	struct kvm_mmio_fragment *frag;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='ctx'> 	if (!(vcpu-&gt;arch.pio.count || vcpu-&gt;mmio_needed))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	if (vcpu-&gt;mmio_needed) {</div><div class='del'>-		vcpu-&gt;mmio_needed = 0;</div><div class='add'>+		/* Complete previous fragment */</div><div class='add'>+		frag = &amp;vcpu-&gt;mmio_fragments[vcpu-&gt;mmio_cur_fragment++];</div><div class='ctx'> 		if (!vcpu-&gt;mmio_is_write)</div><div class='del'>-			memcpy(vcpu-&gt;mmio_data + vcpu-&gt;mmio_index,</div><div class='del'>-			       run-&gt;mmio.data, 8);</div><div class='del'>-		vcpu-&gt;mmio_index += 8;</div><div class='del'>-		if (vcpu-&gt;mmio_index &lt; vcpu-&gt;mmio_size) {</div><div class='del'>-			run-&gt;exit_reason = KVM_EXIT_MMIO;</div><div class='del'>-			run-&gt;mmio.phys_addr = vcpu-&gt;mmio_phys_addr + vcpu-&gt;mmio_index;</div><div class='del'>-			memcpy(run-&gt;mmio.data, vcpu-&gt;mmio_data + vcpu-&gt;mmio_index, 8);</div><div class='del'>-			run-&gt;mmio.len = min(vcpu-&gt;mmio_size - vcpu-&gt;mmio_index, 8);</div><div class='del'>-			run-&gt;mmio.is_write = vcpu-&gt;mmio_is_write;</div><div class='del'>-			vcpu-&gt;mmio_needed = 1;</div><div class='del'>-			return 0;</div><div class='add'>+			memcpy(frag-&gt;data, run-&gt;mmio.data, frag-&gt;len);</div><div class='add'>+		if (vcpu-&gt;mmio_cur_fragment == vcpu-&gt;mmio_nr_fragments) {</div><div class='add'>+			vcpu-&gt;mmio_needed = 0;</div><div class='add'>+			if (vcpu-&gt;mmio_is_write)</div><div class='add'>+				return 1;</div><div class='add'>+			vcpu-&gt;mmio_read_completed = 1;</div><div class='add'>+			goto done;</div><div class='ctx'> 		}</div><div class='add'>+		/* Initiate next fragment */</div><div class='add'>+		++frag;</div><div class='add'>+		run-&gt;exit_reason = KVM_EXIT_MMIO;</div><div class='add'>+		run-&gt;mmio.phys_addr = frag-&gt;gpa;</div><div class='ctx'> 		if (vcpu-&gt;mmio_is_write)</div><div class='del'>-			return 1;</div><div class='del'>-		vcpu-&gt;mmio_read_completed = 1;</div><div class='add'>+			memcpy(run-&gt;mmio.data, frag-&gt;data, frag-&gt;len);</div><div class='add'>+		run-&gt;mmio.len = frag-&gt;len;</div><div class='add'>+		run-&gt;mmio.is_write = vcpu-&gt;mmio_is_write;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	}</div><div class='add'>+done:</div><div class='ctx'> 	vcpu-&gt;srcu_idx = srcu_read_lock(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='ctx'> 	r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);</div><div class='ctx'> 	srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, vcpu-&gt;srcu_idx);</div><div class='hunk'>@@ -6399,21 +6439,9 @@ int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		 kvm_cpu_has_interrupt(vcpu));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void kvm_vcpu_kick(struct kvm_vcpu *vcpu)</div><div class='add'>+int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	int me;</div><div class='del'>-	int cpu = vcpu-&gt;cpu;</div><div class='del'>-</div><div class='del'>-	if (waitqueue_active(&amp;vcpu-&gt;wq)) {</div><div class='del'>-		wake_up_interruptible(&amp;vcpu-&gt;wq);</div><div class='del'>-		++vcpu-&gt;stat.halt_wakeup;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	me = get_cpu();</div><div class='del'>-	if (cpu != me &amp;&amp; (unsigned)cpu &lt; nr_cpu_ids &amp;&amp; cpu_online(cpu))</div><div class='del'>-		if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)</div><div class='del'>-			smp_send_reschedule(cpu);</div><div class='del'>-	put_cpu();</div><div class='add'>+	return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -6581,6 +6609,7 @@ void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		kvm_inject_page_fault(vcpu, &amp;fault);</div><div class='ctx'> 	}</div><div class='ctx'> 	vcpu-&gt;arch.apf.halted = false;</div><div class='add'>+	vcpu-&gt;arch.mp_state = KVM_MP_STATE_RUNNABLE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)</div><div class='head'>diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h<br/>index cb80c293cdd8..3d1134ddb885 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kvm/x86.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kvm/x86.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/kvm/x86.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/kvm/x86.h</a></div><div class='hunk'>@@ -64,7 +64,7 @@ static inline int is_pse(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> static inline int is_paging(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return kvm_read_cr0_bits(vcpu, X86_CR0_PG);</div><div class='add'>+	return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u32 bit(int bitno)</div><div class='head'>diff --git a/arch/x86/lib/checksum_32.S b/arch/x86/lib/checksum_32.S<br/>index 78d16a554db0..2af5df3ade7c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/checksum_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/lib/checksum_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/checksum_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/checksum_32.S</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> 				</div><div class='ctx'> /*</div><div class='ctx'>  * computes a partial checksum, e.g. for TCP/UDP fragments</div><div class='hunk'>@@ -282,15 +283,11 @@ unsigned int csum_partial_copy_generic (const char *src, char *dst,</div><div class='ctx'> </div><div class='ctx'> #define SRC(y...)			\</div><div class='ctx'> 	9999: y;			\</div><div class='del'>-	.section __ex_table, "a";	\</div><div class='del'>-	.long 9999b, 6001f	;	\</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(9999b, 6001f)</div><div class='ctx'> </div><div class='ctx'> #define DST(y...)			\</div><div class='ctx'> 	9999: y;			\</div><div class='del'>-	.section __ex_table, "a";	\</div><div class='del'>-	.long 9999b, 6002f	;	\</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(9999b, 6002f)</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_X86_USE_PPRO_CHECKSUM</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/lib/copy_user_64.S b/arch/x86/lib/copy_user_64.S<br/>index 024840266ba0..5b2995f4557a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/copy_user_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/lib/copy_user_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/copy_user_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/copy_user_64.S</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/alternative-asm.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * By placing feature2 after feature1 in altinstructions section, we logically</div><div class='hunk'>@@ -63,11 +64,8 @@</div><div class='ctx'> 	jmp copy_user_handle_tail</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.align 8</div><div class='del'>-	.quad 100b,103b</div><div class='del'>-	.quad 101b,103b</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(100b,103b)</div><div class='add'>+	_ASM_EXTABLE(101b,103b)</div><div class='ctx'> #endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='hunk'>@@ -191,29 +189,26 @@ ENTRY(copy_user_generic_unrolled)</div><div class='ctx'> 60:	jmp copy_user_handle_tail /* ecx is zerorest also */</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.align 8</div><div class='del'>-	.quad 1b,30b</div><div class='del'>-	.quad 2b,30b</div><div class='del'>-	.quad 3b,30b</div><div class='del'>-	.quad 4b,30b</div><div class='del'>-	.quad 5b,30b</div><div class='del'>-	.quad 6b,30b</div><div class='del'>-	.quad 7b,30b</div><div class='del'>-	.quad 8b,30b</div><div class='del'>-	.quad 9b,30b</div><div class='del'>-	.quad 10b,30b</div><div class='del'>-	.quad 11b,30b</div><div class='del'>-	.quad 12b,30b</div><div class='del'>-	.quad 13b,30b</div><div class='del'>-	.quad 14b,30b</div><div class='del'>-	.quad 15b,30b</div><div class='del'>-	.quad 16b,30b</div><div class='del'>-	.quad 18b,40b</div><div class='del'>-	.quad 19b,40b</div><div class='del'>-	.quad 21b,50b</div><div class='del'>-	.quad 22b,50b</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(1b,30b)</div><div class='add'>+	_ASM_EXTABLE(2b,30b)</div><div class='add'>+	_ASM_EXTABLE(3b,30b)</div><div class='add'>+	_ASM_EXTABLE(4b,30b)</div><div class='add'>+	_ASM_EXTABLE(5b,30b)</div><div class='add'>+	_ASM_EXTABLE(6b,30b)</div><div class='add'>+	_ASM_EXTABLE(7b,30b)</div><div class='add'>+	_ASM_EXTABLE(8b,30b)</div><div class='add'>+	_ASM_EXTABLE(9b,30b)</div><div class='add'>+	_ASM_EXTABLE(10b,30b)</div><div class='add'>+	_ASM_EXTABLE(11b,30b)</div><div class='add'>+	_ASM_EXTABLE(12b,30b)</div><div class='add'>+	_ASM_EXTABLE(13b,30b)</div><div class='add'>+	_ASM_EXTABLE(14b,30b)</div><div class='add'>+	_ASM_EXTABLE(15b,30b)</div><div class='add'>+	_ASM_EXTABLE(16b,30b)</div><div class='add'>+	_ASM_EXTABLE(18b,40b)</div><div class='add'>+	_ASM_EXTABLE(19b,40b)</div><div class='add'>+	_ASM_EXTABLE(21b,50b)</div><div class='add'>+	_ASM_EXTABLE(22b,50b)</div><div class='ctx'> 	CFI_ENDPROC</div><div class='ctx'> ENDPROC(copy_user_generic_unrolled)</div><div class='ctx'> </div><div class='hunk'>@@ -259,11 +254,8 @@ ENTRY(copy_user_generic_string)</div><div class='ctx'> 	jmp copy_user_handle_tail</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.align 8</div><div class='del'>-	.quad 1b,11b</div><div class='del'>-	.quad 3b,12b</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(1b,11b)</div><div class='add'>+	_ASM_EXTABLE(3b,12b)</div><div class='ctx'> 	CFI_ENDPROC</div><div class='ctx'> ENDPROC(copy_user_generic_string)</div><div class='ctx'> </div><div class='hunk'>@@ -294,9 +286,6 @@ ENTRY(copy_user_enhanced_fast_string)</div><div class='ctx'> 	jmp copy_user_handle_tail</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.align 8</div><div class='del'>-	.quad 1b,12b</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(1b,12b)</div><div class='ctx'> 	CFI_ENDPROC</div><div class='ctx'> ENDPROC(copy_user_enhanced_fast_string)</div><div class='head'>diff --git a/arch/x86/lib/copy_user_nocache_64.S b/arch/x86/lib/copy_user_nocache_64.S<br/>index cb0c112386fb..cacddc7163eb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/copy_user_nocache_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/lib/copy_user_nocache_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/copy_user_nocache_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/copy_user_nocache_64.S</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;asm/current.h&gt;</div><div class='ctx'> #include &lt;asm/asm-offsets.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> 	.macro ALIGN_DESTINATION</div><div class='ctx'> #ifdef FIX_ALIGNMENT</div><div class='hunk'>@@ -36,11 +37,8 @@</div><div class='ctx'> 	jmp copy_user_handle_tail</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.align 8</div><div class='del'>-	.quad 100b,103b</div><div class='del'>-	.quad 101b,103b</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(100b,103b)</div><div class='add'>+	_ASM_EXTABLE(101b,103b)</div><div class='ctx'> #endif</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='hunk'>@@ -111,27 +109,25 @@ ENTRY(__copy_user_nocache)</div><div class='ctx'> 	jmp copy_user_handle_tail</div><div class='ctx'> 	.previous</div><div class='ctx'> </div><div class='del'>-	.section __ex_table,"a"</div><div class='del'>-	.quad 1b,30b</div><div class='del'>-	.quad 2b,30b</div><div class='del'>-	.quad 3b,30b</div><div class='del'>-	.quad 4b,30b</div><div class='del'>-	.quad 5b,30b</div><div class='del'>-	.quad 6b,30b</div><div class='del'>-	.quad 7b,30b</div><div class='del'>-	.quad 8b,30b</div><div class='del'>-	.quad 9b,30b</div><div class='del'>-	.quad 10b,30b</div><div class='del'>-	.quad 11b,30b</div><div class='del'>-	.quad 12b,30b</div><div class='del'>-	.quad 13b,30b</div><div class='del'>-	.quad 14b,30b</div><div class='del'>-	.quad 15b,30b</div><div class='del'>-	.quad 16b,30b</div><div class='del'>-	.quad 18b,40b</div><div class='del'>-	.quad 19b,40b</div><div class='del'>-	.quad 21b,50b</div><div class='del'>-	.quad 22b,50b</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(1b,30b)</div><div class='add'>+	_ASM_EXTABLE(2b,30b)</div><div class='add'>+	_ASM_EXTABLE(3b,30b)</div><div class='add'>+	_ASM_EXTABLE(4b,30b)</div><div class='add'>+	_ASM_EXTABLE(5b,30b)</div><div class='add'>+	_ASM_EXTABLE(6b,30b)</div><div class='add'>+	_ASM_EXTABLE(7b,30b)</div><div class='add'>+	_ASM_EXTABLE(8b,30b)</div><div class='add'>+	_ASM_EXTABLE(9b,30b)</div><div class='add'>+	_ASM_EXTABLE(10b,30b)</div><div class='add'>+	_ASM_EXTABLE(11b,30b)</div><div class='add'>+	_ASM_EXTABLE(12b,30b)</div><div class='add'>+	_ASM_EXTABLE(13b,30b)</div><div class='add'>+	_ASM_EXTABLE(14b,30b)</div><div class='add'>+	_ASM_EXTABLE(15b,30b)</div><div class='add'>+	_ASM_EXTABLE(16b,30b)</div><div class='add'>+	_ASM_EXTABLE(18b,40b)</div><div class='add'>+	_ASM_EXTABLE(19b,40b)</div><div class='add'>+	_ASM_EXTABLE(21b,50b)</div><div class='add'>+	_ASM_EXTABLE(22b,50b)</div><div class='ctx'> 	CFI_ENDPROC</div><div class='ctx'> ENDPROC(__copy_user_nocache)</div><div class='head'>diff --git a/arch/x86/lib/csum-copy_64.S b/arch/x86/lib/csum-copy_64.S<br/>index fb903b758da8..2419d5fefae3 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/csum-copy_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/lib/csum-copy_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/csum-copy_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/csum-copy_64.S</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/dwarf2.h&gt;</div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Checksum copy with exception handling.</div><div class='hunk'>@@ -31,26 +32,17 @@</div><div class='ctx'> </div><div class='ctx'> 	.macro source</div><div class='ctx'> 10:</div><div class='del'>-	.section __ex_table, "a"</div><div class='del'>-	.align 8</div><div class='del'>-	.quad 10b, .Lbad_source</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(10b, .Lbad_source)</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro dest</div><div class='ctx'> 20:</div><div class='del'>-	.section __ex_table, "a"</div><div class='del'>-	.align 8</div><div class='del'>-	.quad 20b, .Lbad_dest</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(20b, .Lbad_dest)</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.macro ignore L=.Lignore</div><div class='ctx'> 30:</div><div class='del'>-	.section __ex_table, "a"</div><div class='del'>-	.align 8</div><div class='del'>-	.quad 30b, \L</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(30b, \L)</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/lib/getuser.S b/arch/x86/lib/getuser.S<br/>index 51f1504cddd9..b33b1fb1e6d4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/getuser.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/lib/getuser.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/getuser.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/getuser.S</a></div><div class='hunk'>@@ -95,10 +95,9 @@ bad_get_user:</div><div class='ctx'> 	CFI_ENDPROC</div><div class='ctx'> END(bad_get_user)</div><div class='ctx'> </div><div class='del'>-.section __ex_table,"a"</div><div class='del'>-	_ASM_PTR 1b,bad_get_user</div><div class='del'>-	_ASM_PTR 2b,bad_get_user</div><div class='del'>-	_ASM_PTR 3b,bad_get_user</div><div class='add'>+	_ASM_EXTABLE(1b,bad_get_user)</div><div class='add'>+	_ASM_EXTABLE(2b,bad_get_user)</div><div class='add'>+	_ASM_EXTABLE(3b,bad_get_user)</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='del'>-	_ASM_PTR 4b,bad_get_user</div><div class='add'>+	_ASM_EXTABLE(4b,bad_get_user)</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/lib/putuser.S b/arch/x86/lib/putuser.S<br/>index 36b0d15ae6e9..7f951c8f76c4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/putuser.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/lib/putuser.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/putuser.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/putuser.S</a></div><div class='hunk'>@@ -86,12 +86,10 @@ bad_put_user:</div><div class='ctx'> 	EXIT</div><div class='ctx'> END(bad_put_user)</div><div class='ctx'> </div><div class='del'>-.section __ex_table,"a"</div><div class='del'>-	_ASM_PTR 1b,bad_put_user</div><div class='del'>-	_ASM_PTR 2b,bad_put_user</div><div class='del'>-	_ASM_PTR 3b,bad_put_user</div><div class='del'>-	_ASM_PTR 4b,bad_put_user</div><div class='add'>+	_ASM_EXTABLE(1b,bad_put_user)</div><div class='add'>+	_ASM_EXTABLE(2b,bad_put_user)</div><div class='add'>+	_ASM_EXTABLE(3b,bad_put_user)</div><div class='add'>+	_ASM_EXTABLE(4b,bad_put_user)</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='del'>-	_ASM_PTR 5b,bad_put_user</div><div class='add'>+	_ASM_EXTABLE(5b,bad_put_user)</div><div class='ctx'> #endif</div><div class='del'>-.previous</div><div class='head'>diff --git a/arch/x86/lib/usercopy.c b/arch/x86/lib/usercopy.c<br/>index d6ae30bbd7bb..677b1ed184c9 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/usercopy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/lib/usercopy.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/usercopy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/usercopy.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/word-at-a-time.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * best effort, GUP based copy_from_user() that is NMI-safe</div><div class='hunk'>@@ -21,6 +22,9 @@ copy_from_user_nmi(void *to, const void __user *from, unsigned long n)</div><div class='ctx'> 	void *map;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (__range_not_ok(from, n, TASK_SIZE) == 0)</div><div class='add'>+		return len;</div><div class='add'>+</div><div class='ctx'> 	do {</div><div class='ctx'> 		ret = __get_user_pages_fast(addr, 1, 0, &amp;page);</div><div class='ctx'> 		if (!ret)</div><div class='hunk'>@@ -43,104 +47,3 @@ copy_from_user_nmi(void *to, const void __user *from, unsigned long n)</div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(copy_from_user_nmi);</div><div class='del'>-</div><div class='del'>-static inline unsigned long count_bytes(unsigned long mask)</div><div class='del'>-{</div><div class='del'>-	mask = (mask - 1) &amp; ~mask;</div><div class='del'>-	mask &gt;&gt;= 7;</div><div class='del'>-	return count_masked_bytes(mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Do a strncpy, return length of string without final '\0'.</div><div class='del'>- * 'count' is the user-supplied count (return 'count' if we</div><div class='del'>- * hit it), 'max' is the address space maximum (and we return</div><div class='del'>- * -EFAULT if we hit it).</div><div class='del'>- */</div><div class='del'>-static inline long do_strncpy_from_user(char *dst, const char __user *src, long count, unsigned long max)</div><div class='del'>-{</div><div class='del'>-	long res = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Truncate 'max' to the user-specified limit, so that</div><div class='del'>-	 * we only have one limit we need to check in the loop</div><div class='del'>-	 */</div><div class='del'>-	if (max &gt; count)</div><div class='del'>-		max = count;</div><div class='del'>-</div><div class='del'>-	while (max &gt;= sizeof(unsigned long)) {</div><div class='del'>-		unsigned long c;</div><div class='del'>-</div><div class='del'>-		/* Fall back to byte-at-a-time if we get a page fault */</div><div class='del'>-		if (unlikely(__get_user(c,(unsigned long __user *)(src+res))))</div><div class='del'>-			break;</div><div class='del'>-		/* This can write a few bytes past the NUL character, but that's ok */</div><div class='del'>-		*(unsigned long *)(dst+res) = c;</div><div class='del'>-		c = has_zero(c);</div><div class='del'>-		if (c)</div><div class='del'>-			return res + count_bytes(c);</div><div class='del'>-		res += sizeof(unsigned long);</div><div class='del'>-		max -= sizeof(unsigned long);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (max) {</div><div class='del'>-		char c;</div><div class='del'>-</div><div class='del'>-		if (unlikely(__get_user(c,src+res)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		dst[res] = c;</div><div class='del'>-		if (!c)</div><div class='del'>-			return res;</div><div class='del'>-		res++;</div><div class='del'>-		max--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Uhhuh. We hit 'max'. But was that the user-specified maximum</div><div class='del'>-	 * too? If so, that's ok - we got as much as the user asked for.</div><div class='del'>-	 */</div><div class='del'>-	if (res &gt;= count)</div><div class='del'>-		return res;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Nope: we hit the address space limit, and we still had more</div><div class='del'>-	 * characters the caller would have wanted. That's an EFAULT.</div><div class='del'>-	 */</div><div class='del'>-	return -EFAULT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * strncpy_from_user: - Copy a NUL terminated string from userspace.</div><div class='del'>- * @dst:   Destination address, in kernel space.  This buffer must be at</div><div class='del'>- *         least @count bytes long.</div><div class='del'>- * @src:   Source address, in user space.</div><div class='del'>- * @count: Maximum number of bytes to copy, including the trailing NUL.</div><div class='del'>- *</div><div class='del'>- * Copies a NUL-terminated string from userspace to kernel space.</div><div class='del'>- *</div><div class='del'>- * On success, returns the length of the string (not including the trailing</div><div class='del'>- * NUL).</div><div class='del'>- *</div><div class='del'>- * If access to userspace fails, returns -EFAULT (some data may have been</div><div class='del'>- * copied).</div><div class='del'>- *</div><div class='del'>- * If @count is smaller than the length of the string, copies @count bytes</div><div class='del'>- * and returns @count.</div><div class='del'>- */</div><div class='del'>-long</div><div class='del'>-strncpy_from_user(char *dst, const char __user *src, long count)</div><div class='del'>-{</div><div class='del'>-	unsigned long max_addr, src_addr;</div><div class='del'>-</div><div class='del'>-	if (unlikely(count &lt;= 0))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	max_addr = current_thread_info()-&gt;addr_limit.seg;</div><div class='del'>-	src_addr = (unsigned long)src;</div><div class='del'>-	if (likely(src_addr &lt; max_addr)) {</div><div class='del'>-		unsigned long max = max_addr - src_addr;</div><div class='del'>-		return do_strncpy_from_user(dst, src, count, max);</div><div class='del'>-	}</div><div class='del'>-	return -EFAULT;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(strncpy_from_user);</div><div class='head'>diff --git a/arch/x86/lib/usercopy_32.c b/arch/x86/lib/usercopy_32.c<br/>index ef2a6a5d78e3..1781b2f950e2 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/usercopy_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/lib/usercopy_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/usercopy_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/usercopy_32.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/mmx.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_INTEL_USERCOPY</div><div class='ctx'> /*</div><div class='hunk'>@@ -94,50 +95,6 @@ __clear_user(void __user *to, unsigned long n)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__clear_user);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * strnlen_user: - Get the size of a string in user space.</div><div class='del'>- * @s: The string to measure.</div><div class='del'>- * @n: The maximum valid length</div><div class='del'>- *</div><div class='del'>- * Get the size of a NUL-terminated string in user space.</div><div class='del'>- *</div><div class='del'>- * Returns the size of the string INCLUDING the terminating NUL.</div><div class='del'>- * On exception, returns 0.</div><div class='del'>- * If the string is too long, returns a value greater than @n.</div><div class='del'>- */</div><div class='del'>-long strnlen_user(const char __user *s, long n)</div><div class='del'>-{</div><div class='del'>-	unsigned long mask = -__addr_ok(s);</div><div class='del'>-	unsigned long res, tmp;</div><div class='del'>-</div><div class='del'>-	might_fault();</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__(</div><div class='del'>-		"	testl %0, %0\n"</div><div class='del'>-		"	jz 3f\n"</div><div class='del'>-		"	andl %0,%%ecx\n"</div><div class='del'>-		"0:	repne; scasb\n"</div><div class='del'>-		"	setne %%al\n"</div><div class='del'>-		"	subl %%ecx,%0\n"</div><div class='del'>-		"	addl %0,%%eax\n"</div><div class='del'>-		"1:\n"</div><div class='del'>-		".section .fixup,\"ax\"\n"</div><div class='del'>-		"2:	xorl %%eax,%%eax\n"</div><div class='del'>-		"	jmp 1b\n"</div><div class='del'>-		"3:	movb $1,%%al\n"</div><div class='del'>-		"	jmp 1b\n"</div><div class='del'>-		".previous\n"</div><div class='del'>-		".section __ex_table,\"a\"\n"</div><div class='del'>-		"	.align 4\n"</div><div class='del'>-		"	.long 0b,2b\n"</div><div class='del'>-		".previous"</div><div class='del'>-		:"=&amp;r" (n), "=&amp;D" (s), "=&amp;a" (res), "=&amp;c" (tmp)</div><div class='del'>-		:"0" (n), "1" (s), "2" (0), "3" (mask)</div><div class='del'>-		:"cc");</div><div class='del'>-	return res &amp; mask;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(strnlen_user);</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_INTEL_USERCOPY</div><div class='ctx'> static unsigned long</div><div class='ctx'> __copy_user_intel(void __user *to, const void *from, unsigned long size)</div><div class='hunk'>@@ -199,47 +156,44 @@ __copy_user_intel(void __user *to, const void *from, unsigned long size)</div><div class='ctx'> 		       "101:   lea 0(%%eax,%0,4),%0\n"</div><div class='ctx'> 		       "       jmp 100b\n"</div><div class='ctx'> 		       ".previous\n"</div><div class='del'>-		       ".section __ex_table,\"a\"\n"</div><div class='del'>-		       "       .align 4\n"</div><div class='del'>-		       "       .long 1b,100b\n"</div><div class='del'>-		       "       .long 2b,100b\n"</div><div class='del'>-		       "       .long 3b,100b\n"</div><div class='del'>-		       "       .long 4b,100b\n"</div><div class='del'>-		       "       .long 5b,100b\n"</div><div class='del'>-		       "       .long 6b,100b\n"</div><div class='del'>-		       "       .long 7b,100b\n"</div><div class='del'>-		       "       .long 8b,100b\n"</div><div class='del'>-		       "       .long 9b,100b\n"</div><div class='del'>-		       "       .long 10b,100b\n"</div><div class='del'>-		       "       .long 11b,100b\n"</div><div class='del'>-		       "       .long 12b,100b\n"</div><div class='del'>-		       "       .long 13b,100b\n"</div><div class='del'>-		       "       .long 14b,100b\n"</div><div class='del'>-		       "       .long 15b,100b\n"</div><div class='del'>-		       "       .long 16b,100b\n"</div><div class='del'>-		       "       .long 17b,100b\n"</div><div class='del'>-		       "       .long 18b,100b\n"</div><div class='del'>-		       "       .long 19b,100b\n"</div><div class='del'>-		       "       .long 20b,100b\n"</div><div class='del'>-		       "       .long 21b,100b\n"</div><div class='del'>-		       "       .long 22b,100b\n"</div><div class='del'>-		       "       .long 23b,100b\n"</div><div class='del'>-		       "       .long 24b,100b\n"</div><div class='del'>-		       "       .long 25b,100b\n"</div><div class='del'>-		       "       .long 26b,100b\n"</div><div class='del'>-		       "       .long 27b,100b\n"</div><div class='del'>-		       "       .long 28b,100b\n"</div><div class='del'>-		       "       .long 29b,100b\n"</div><div class='del'>-		       "       .long 30b,100b\n"</div><div class='del'>-		       "       .long 31b,100b\n"</div><div class='del'>-		       "       .long 32b,100b\n"</div><div class='del'>-		       "       .long 33b,100b\n"</div><div class='del'>-		       "       .long 34b,100b\n"</div><div class='del'>-		       "       .long 35b,100b\n"</div><div class='del'>-		       "       .long 36b,100b\n"</div><div class='del'>-		       "       .long 37b,100b\n"</div><div class='del'>-		       "       .long 99b,101b\n"</div><div class='del'>-		       ".previous"</div><div class='add'>+		       _ASM_EXTABLE(1b,100b)</div><div class='add'>+		       _ASM_EXTABLE(2b,100b)</div><div class='add'>+		       _ASM_EXTABLE(3b,100b)</div><div class='add'>+		       _ASM_EXTABLE(4b,100b)</div><div class='add'>+		       _ASM_EXTABLE(5b,100b)</div><div class='add'>+		       _ASM_EXTABLE(6b,100b)</div><div class='add'>+		       _ASM_EXTABLE(7b,100b)</div><div class='add'>+		       _ASM_EXTABLE(8b,100b)</div><div class='add'>+		       _ASM_EXTABLE(9b,100b)</div><div class='add'>+		       _ASM_EXTABLE(10b,100b)</div><div class='add'>+		       _ASM_EXTABLE(11b,100b)</div><div class='add'>+		       _ASM_EXTABLE(12b,100b)</div><div class='add'>+		       _ASM_EXTABLE(13b,100b)</div><div class='add'>+		       _ASM_EXTABLE(14b,100b)</div><div class='add'>+		       _ASM_EXTABLE(15b,100b)</div><div class='add'>+		       _ASM_EXTABLE(16b,100b)</div><div class='add'>+		       _ASM_EXTABLE(17b,100b)</div><div class='add'>+		       _ASM_EXTABLE(18b,100b)</div><div class='add'>+		       _ASM_EXTABLE(19b,100b)</div><div class='add'>+		       _ASM_EXTABLE(20b,100b)</div><div class='add'>+		       _ASM_EXTABLE(21b,100b)</div><div class='add'>+		       _ASM_EXTABLE(22b,100b)</div><div class='add'>+		       _ASM_EXTABLE(23b,100b)</div><div class='add'>+		       _ASM_EXTABLE(24b,100b)</div><div class='add'>+		       _ASM_EXTABLE(25b,100b)</div><div class='add'>+		       _ASM_EXTABLE(26b,100b)</div><div class='add'>+		       _ASM_EXTABLE(27b,100b)</div><div class='add'>+		       _ASM_EXTABLE(28b,100b)</div><div class='add'>+		       _ASM_EXTABLE(29b,100b)</div><div class='add'>+		       _ASM_EXTABLE(30b,100b)</div><div class='add'>+		       _ASM_EXTABLE(31b,100b)</div><div class='add'>+		       _ASM_EXTABLE(32b,100b)</div><div class='add'>+		       _ASM_EXTABLE(33b,100b)</div><div class='add'>+		       _ASM_EXTABLE(34b,100b)</div><div class='add'>+		       _ASM_EXTABLE(35b,100b)</div><div class='add'>+		       _ASM_EXTABLE(36b,100b)</div><div class='add'>+		       _ASM_EXTABLE(37b,100b)</div><div class='add'>+		       _ASM_EXTABLE(99b,101b)</div><div class='ctx'> 		       : "=&amp;c"(size), "=&amp;D" (d0), "=&amp;S" (d1)</div><div class='ctx'> 		       :  "1"(to), "2"(from), "0"(size)</div><div class='ctx'> 		       : "eax", "edx", "memory");</div><div class='hunk'>@@ -312,29 +266,26 @@ __copy_user_zeroing_intel(void *to, const void __user *from, unsigned long size)</div><div class='ctx'> 		       "        popl %0\n"</div><div class='ctx'> 		       "        jmp 8b\n"</div><div class='ctx'> 		       ".previous\n"</div><div class='del'>-		       ".section __ex_table,\"a\"\n"</div><div class='del'>-		       "	.align 4\n"</div><div class='del'>-		       "	.long 0b,16b\n"</div><div class='del'>-		       "	.long 1b,16b\n"</div><div class='del'>-		       "	.long 2b,16b\n"</div><div class='del'>-		       "	.long 21b,16b\n"</div><div class='del'>-		       "	.long 3b,16b\n"</div><div class='del'>-		       "	.long 31b,16b\n"</div><div class='del'>-		       "	.long 4b,16b\n"</div><div class='del'>-		       "	.long 41b,16b\n"</div><div class='del'>-		       "	.long 10b,16b\n"</div><div class='del'>-		       "	.long 51b,16b\n"</div><div class='del'>-		       "	.long 11b,16b\n"</div><div class='del'>-		       "	.long 61b,16b\n"</div><div class='del'>-		       "	.long 12b,16b\n"</div><div class='del'>-		       "	.long 71b,16b\n"</div><div class='del'>-		       "	.long 13b,16b\n"</div><div class='del'>-		       "	.long 81b,16b\n"</div><div class='del'>-		       "	.long 14b,16b\n"</div><div class='del'>-		       "	.long 91b,16b\n"</div><div class='del'>-		       "	.long 6b,9b\n"</div><div class='del'>-		       "        .long 7b,16b\n"</div><div class='del'>-		       ".previous"</div><div class='add'>+		       _ASM_EXTABLE(0b,16b)</div><div class='add'>+		       _ASM_EXTABLE(1b,16b)</div><div class='add'>+		       _ASM_EXTABLE(2b,16b)</div><div class='add'>+		       _ASM_EXTABLE(21b,16b)</div><div class='add'>+		       _ASM_EXTABLE(3b,16b)</div><div class='add'>+		       _ASM_EXTABLE(31b,16b)</div><div class='add'>+		       _ASM_EXTABLE(4b,16b)</div><div class='add'>+		       _ASM_EXTABLE(41b,16b)</div><div class='add'>+		       _ASM_EXTABLE(10b,16b)</div><div class='add'>+		       _ASM_EXTABLE(51b,16b)</div><div class='add'>+		       _ASM_EXTABLE(11b,16b)</div><div class='add'>+		       _ASM_EXTABLE(61b,16b)</div><div class='add'>+		       _ASM_EXTABLE(12b,16b)</div><div class='add'>+		       _ASM_EXTABLE(71b,16b)</div><div class='add'>+		       _ASM_EXTABLE(13b,16b)</div><div class='add'>+		       _ASM_EXTABLE(81b,16b)</div><div class='add'>+		       _ASM_EXTABLE(14b,16b)</div><div class='add'>+		       _ASM_EXTABLE(91b,16b)</div><div class='add'>+		       _ASM_EXTABLE(6b,9b)</div><div class='add'>+		       _ASM_EXTABLE(7b,16b)</div><div class='ctx'> 		       : "=&amp;c"(size), "=&amp;D" (d0), "=&amp;S" (d1)</div><div class='ctx'> 		       :  "1"(to), "2"(from), "0"(size)</div><div class='ctx'> 		       : "eax", "edx", "memory");</div><div class='hunk'>@@ -414,29 +365,26 @@ static unsigned long __copy_user_zeroing_intel_nocache(void *to,</div><div class='ctx'> 	       "        popl %0\n"</div><div class='ctx'> 	       "        jmp 8b\n"</div><div class='ctx'> 	       ".previous\n"</div><div class='del'>-	       ".section __ex_table,\"a\"\n"</div><div class='del'>-	       "	.align 4\n"</div><div class='del'>-	       "	.long 0b,16b\n"</div><div class='del'>-	       "	.long 1b,16b\n"</div><div class='del'>-	       "	.long 2b,16b\n"</div><div class='del'>-	       "	.long 21b,16b\n"</div><div class='del'>-	       "	.long 3b,16b\n"</div><div class='del'>-	       "	.long 31b,16b\n"</div><div class='del'>-	       "	.long 4b,16b\n"</div><div class='del'>-	       "	.long 41b,16b\n"</div><div class='del'>-	       "	.long 10b,16b\n"</div><div class='del'>-	       "	.long 51b,16b\n"</div><div class='del'>-	       "	.long 11b,16b\n"</div><div class='del'>-	       "	.long 61b,16b\n"</div><div class='del'>-	       "	.long 12b,16b\n"</div><div class='del'>-	       "	.long 71b,16b\n"</div><div class='del'>-	       "	.long 13b,16b\n"</div><div class='del'>-	       "	.long 81b,16b\n"</div><div class='del'>-	       "	.long 14b,16b\n"</div><div class='del'>-	       "	.long 91b,16b\n"</div><div class='del'>-	       "	.long 6b,9b\n"</div><div class='del'>-	       "        .long 7b,16b\n"</div><div class='del'>-	       ".previous"</div><div class='add'>+	       _ASM_EXTABLE(0b,16b)</div><div class='add'>+	       _ASM_EXTABLE(1b,16b)</div><div class='add'>+	       _ASM_EXTABLE(2b,16b)</div><div class='add'>+	       _ASM_EXTABLE(21b,16b)</div><div class='add'>+	       _ASM_EXTABLE(3b,16b)</div><div class='add'>+	       _ASM_EXTABLE(31b,16b)</div><div class='add'>+	       _ASM_EXTABLE(4b,16b)</div><div class='add'>+	       _ASM_EXTABLE(41b,16b)</div><div class='add'>+	       _ASM_EXTABLE(10b,16b)</div><div class='add'>+	       _ASM_EXTABLE(51b,16b)</div><div class='add'>+	       _ASM_EXTABLE(11b,16b)</div><div class='add'>+	       _ASM_EXTABLE(61b,16b)</div><div class='add'>+	       _ASM_EXTABLE(12b,16b)</div><div class='add'>+	       _ASM_EXTABLE(71b,16b)</div><div class='add'>+	       _ASM_EXTABLE(13b,16b)</div><div class='add'>+	       _ASM_EXTABLE(81b,16b)</div><div class='add'>+	       _ASM_EXTABLE(14b,16b)</div><div class='add'>+	       _ASM_EXTABLE(91b,16b)</div><div class='add'>+	       _ASM_EXTABLE(6b,9b)</div><div class='add'>+	       _ASM_EXTABLE(7b,16b)</div><div class='ctx'> 	       : "=&amp;c"(size), "=&amp;D" (d0), "=&amp;S" (d1)</div><div class='ctx'> 	       :  "1"(to), "2"(from), "0"(size)</div><div class='ctx'> 	       : "eax", "edx", "memory");</div><div class='hunk'>@@ -505,29 +453,26 @@ static unsigned long __copy_user_intel_nocache(void *to,</div><div class='ctx'> 	       "9:      lea 0(%%eax,%0,4),%0\n"</div><div class='ctx'> 	       "16:     jmp 8b\n"</div><div class='ctx'> 	       ".previous\n"</div><div class='del'>-	       ".section __ex_table,\"a\"\n"</div><div class='del'>-	       "	.align 4\n"</div><div class='del'>-	       "	.long 0b,16b\n"</div><div class='del'>-	       "	.long 1b,16b\n"</div><div class='del'>-	       "	.long 2b,16b\n"</div><div class='del'>-	       "	.long 21b,16b\n"</div><div class='del'>-	       "	.long 3b,16b\n"</div><div class='del'>-	       "	.long 31b,16b\n"</div><div class='del'>-	       "	.long 4b,16b\n"</div><div class='del'>-	       "	.long 41b,16b\n"</div><div class='del'>-	       "	.long 10b,16b\n"</div><div class='del'>-	       "	.long 51b,16b\n"</div><div class='del'>-	       "	.long 11b,16b\n"</div><div class='del'>-	       "	.long 61b,16b\n"</div><div class='del'>-	       "	.long 12b,16b\n"</div><div class='del'>-	       "	.long 71b,16b\n"</div><div class='del'>-	       "	.long 13b,16b\n"</div><div class='del'>-	       "	.long 81b,16b\n"</div><div class='del'>-	       "	.long 14b,16b\n"</div><div class='del'>-	       "	.long 91b,16b\n"</div><div class='del'>-	       "	.long 6b,9b\n"</div><div class='del'>-	       "        .long 7b,16b\n"</div><div class='del'>-	       ".previous"</div><div class='add'>+	       _ASM_EXTABLE(0b,16b)</div><div class='add'>+	       _ASM_EXTABLE(1b,16b)</div><div class='add'>+	       _ASM_EXTABLE(2b,16b)</div><div class='add'>+	       _ASM_EXTABLE(21b,16b)</div><div class='add'>+	       _ASM_EXTABLE(3b,16b)</div><div class='add'>+	       _ASM_EXTABLE(31b,16b)</div><div class='add'>+	       _ASM_EXTABLE(4b,16b)</div><div class='add'>+	       _ASM_EXTABLE(41b,16b)</div><div class='add'>+	       _ASM_EXTABLE(10b,16b)</div><div class='add'>+	       _ASM_EXTABLE(51b,16b)</div><div class='add'>+	       _ASM_EXTABLE(11b,16b)</div><div class='add'>+	       _ASM_EXTABLE(61b,16b)</div><div class='add'>+	       _ASM_EXTABLE(12b,16b)</div><div class='add'>+	       _ASM_EXTABLE(71b,16b)</div><div class='add'>+	       _ASM_EXTABLE(13b,16b)</div><div class='add'>+	       _ASM_EXTABLE(81b,16b)</div><div class='add'>+	       _ASM_EXTABLE(14b,16b)</div><div class='add'>+	       _ASM_EXTABLE(91b,16b)</div><div class='add'>+	       _ASM_EXTABLE(6b,9b)</div><div class='add'>+	       _ASM_EXTABLE(7b,16b)</div><div class='ctx'> 	       : "=&amp;c"(size), "=&amp;D" (d0), "=&amp;S" (d1)</div><div class='ctx'> 	       :  "1"(to), "2"(from), "0"(size)</div><div class='ctx'> 	       : "eax", "edx", "memory");</div><div class='hunk'>@@ -574,12 +519,9 @@ do {									\</div><div class='ctx'> 		"3:	lea 0(%3,%0,4),%0\n"				\</div><div class='ctx'> 		"	jmp 2b\n"					\</div><div class='ctx'> 		".previous\n"						\</div><div class='del'>-		".section __ex_table,\"a\"\n"				\</div><div class='del'>-		"	.align 4\n"					\</div><div class='del'>-		"	.long 4b,5b\n"					\</div><div class='del'>-		"	.long 0b,3b\n"					\</div><div class='del'>-		"	.long 1b,2b\n"					\</div><div class='del'>-		".previous"						\</div><div class='add'>+		_ASM_EXTABLE(4b,5b)					\</div><div class='add'>+		_ASM_EXTABLE(0b,3b)					\</div><div class='add'>+		_ASM_EXTABLE(1b,2b)					\</div><div class='ctx'> 		: "=&amp;c"(size), "=&amp;D" (__d0), "=&amp;S" (__d1), "=r"(__d2)	\</div><div class='ctx'> 		: "3"(size), "0"(size), "1"(to), "2"(from)		\</div><div class='ctx'> 		: "memory");						\</div><div class='hunk'>@@ -616,12 +558,9 @@ do {									\</div><div class='ctx'> 		"	popl %0\n"					\</div><div class='ctx'> 		"	jmp 2b\n"					\</div><div class='ctx'> 		".previous\n"						\</div><div class='del'>-		".section __ex_table,\"a\"\n"				\</div><div class='del'>-		"	.align 4\n"					\</div><div class='del'>-		"	.long 4b,5b\n"					\</div><div class='del'>-		"	.long 0b,3b\n"					\</div><div class='del'>-		"	.long 1b,6b\n"					\</div><div class='del'>-		".previous"						\</div><div class='add'>+		_ASM_EXTABLE(4b,5b)					\</div><div class='add'>+		_ASM_EXTABLE(0b,3b)					\</div><div class='add'>+		_ASM_EXTABLE(1b,6b)					\</div><div class='ctx'> 		: "=&amp;c"(size), "=&amp;D" (__d0), "=&amp;S" (__d1), "=r"(__d2)	\</div><div class='ctx'> 		: "3"(size), "0"(size), "1"(to), "2"(from)		\</div><div class='ctx'> 		: "memory");						\</div><div class='head'>diff --git a/arch/x86/lib/usercopy_64.c b/arch/x86/lib/usercopy_64.c<br/>index 0d0326f388c0..e5b130bc2d0e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/usercopy_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/lib/usercopy_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/usercopy_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/usercopy_64.c</a></div><div class='hunk'>@@ -52,54 +52,6 @@ unsigned long clear_user(void __user *to, unsigned long n)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(clear_user);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Return the size of a string (including the ending 0)</div><div class='del'>- *</div><div class='del'>- * Return 0 on exception, a value greater than N if too long</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-long __strnlen_user(const char __user *s, long n)</div><div class='del'>-{</div><div class='del'>-	long res = 0;</div><div class='del'>-	char c;</div><div class='del'>-</div><div class='del'>-	while (1) {</div><div class='del'>-		if (res&gt;n)</div><div class='del'>-			return n+1;</div><div class='del'>-		if (__get_user(c, s))</div><div class='del'>-			return 0;</div><div class='del'>-		if (!c)</div><div class='del'>-			return res+1;</div><div class='del'>-		res++;</div><div class='del'>-		s++;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__strnlen_user);</div><div class='del'>-</div><div class='del'>-long strnlen_user(const char __user *s, long n)</div><div class='del'>-{</div><div class='del'>-	if (!access_ok(VERIFY_READ, s, 1))</div><div class='del'>-		return 0;</div><div class='del'>-	return __strnlen_user(s, n);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(strnlen_user);</div><div class='del'>-</div><div class='del'>-long strlen_user(const char __user *s)</div><div class='del'>-{</div><div class='del'>-	long res = 0;</div><div class='del'>-	char c;</div><div class='del'>-</div><div class='del'>-	for (;;) {</div><div class='del'>-		if (get_user(c, s))</div><div class='del'>-			return 0;</div><div class='del'>-		if (!c)</div><div class='del'>-			return res+1;</div><div class='del'>-		res++;</div><div class='del'>-		s++;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(strlen_user);</div><div class='del'>-</div><div class='ctx'> unsigned long copy_in_user(void __user *to, const void __user *from, unsigned len)</div><div class='ctx'> {</div><div class='ctx'> 	if (access_ok(VERIFY_WRITE, to, len) &amp;&amp; access_ok(VERIFY_READ, from, len)) { </div><div class='head'>diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt<br/>index 819137904428..5d7e51f3fd28 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/lib/x86-opcode-map.txt?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/lib/x86-opcode-map.txt</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/lib/x86-opcode-map.txt?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/lib/x86-opcode-map.txt</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> #  - (66): the last prefix is 0x66</div><div class='ctx'> #  - (F3): the last prefix is 0xF3</div><div class='ctx'> #  - (F2): the last prefix is 0xF2</div><div class='del'>-#</div><div class='add'>+#  - (!F3) : the last prefix is not 0xF3 (including non-last prefix case)</div><div class='ctx'> </div><div class='ctx'> Table: one byte opcode</div><div class='ctx'> Referrer:</div><div class='hunk'>@@ -515,12 +515,12 @@ b4: LFS Gv,Mp</div><div class='ctx'> b5: LGS Gv,Mp</div><div class='ctx'> b6: MOVZX Gv,Eb</div><div class='ctx'> b7: MOVZX Gv,Ew</div><div class='del'>-b8: JMPE | POPCNT Gv,Ev (F3)</div><div class='add'>+b8: JMPE (!F3) | POPCNT Gv,Ev (F3)</div><div class='ctx'> b9: Grp10 (1A)</div><div class='ctx'> ba: Grp8 Ev,Ib (1A)</div><div class='ctx'> bb: BTC Ev,Gv</div><div class='del'>-bc: BSF Gv,Ev | TZCNT Gv,Ev (F3)</div><div class='del'>-bd: BSR Gv,Ev | LZCNT Gv,Ev (F3)</div><div class='add'>+bc: BSF Gv,Ev (!F3) | TZCNT Gv,Ev (F3)</div><div class='add'>+bd: BSR Gv,Ev (!F3) | LZCNT Gv,Ev (F3)</div><div class='ctx'> be: MOVSX Gv,Eb</div><div class='ctx'> bf: MOVSX Gv,Ew</div><div class='ctx'> # 0x0f 0xc0-0xcf</div><div class='head'>diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c<br/>index 1fb85dbe390a..903ec1e9c326 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/extable.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/mm/extable.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/extable.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/extable.c</a></div><div class='hunk'>@@ -1,11 +1,23 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/sort.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> </div><div class='add'>+static inline unsigned long</div><div class='add'>+ex_insn_addr(const struct exception_table_entry *x)</div><div class='add'>+{</div><div class='add'>+	return (unsigned long)&amp;x-&gt;insn + x-&gt;insn;</div><div class='add'>+}</div><div class='add'>+static inline unsigned long</div><div class='add'>+ex_fixup_addr(const struct exception_table_entry *x)</div><div class='add'>+{</div><div class='add'>+	return (unsigned long)&amp;x-&gt;fixup + x-&gt;fixup;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> int fixup_exception(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	const struct exception_table_entry *fixup;</div><div class='add'>+	unsigned long new_ip;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PNPBIOS</div><div class='ctx'> 	if (unlikely(SEGMENT_IS_PNP_CODE(regs-&gt;cs))) {</div><div class='hunk'>@@ -23,15 +35,135 @@ int fixup_exception(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	fixup = search_exception_tables(regs-&gt;ip);</div><div class='ctx'> 	if (fixup) {</div><div class='del'>-		/* If fixup is less than 16, it means uaccess error */</div><div class='del'>-		if (fixup-&gt;fixup &lt; 16) {</div><div class='add'>+		new_ip = ex_fixup_addr(fixup);</div><div class='add'>+</div><div class='add'>+		if (fixup-&gt;fixup - fixup-&gt;insn &gt;= 0x7ffffff0 - 4) {</div><div class='add'>+			/* Special hack for uaccess_err */</div><div class='ctx'> 			current_thread_info()-&gt;uaccess_err = 1;</div><div class='del'>-			regs-&gt;ip += fixup-&gt;fixup;</div><div class='del'>-			return 1;</div><div class='add'>+			new_ip -= 0x7ffffff0;</div><div class='ctx'> 		}</div><div class='del'>-		regs-&gt;ip = fixup-&gt;fixup;</div><div class='add'>+		regs-&gt;ip = new_ip;</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/* Restricted version used during very early boot */</div><div class='add'>+int __init early_fixup_exception(unsigned long *ip)</div><div class='add'>+{</div><div class='add'>+	const struct exception_table_entry *fixup;</div><div class='add'>+	unsigned long new_ip;</div><div class='add'>+</div><div class='add'>+	fixup = search_exception_tables(*ip);</div><div class='add'>+	if (fixup) {</div><div class='add'>+		new_ip = ex_fixup_addr(fixup);</div><div class='add'>+</div><div class='add'>+		if (fixup-&gt;fixup - fixup-&gt;insn &gt;= 0x7ffffff0 - 4) {</div><div class='add'>+			/* uaccess handling not supported during early boot */</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*ip = new_ip;</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Search one exception table for an entry corresponding to the</div><div class='add'>+ * given instruction address, and return the address of the entry,</div><div class='add'>+ * or NULL if none is found.</div><div class='add'>+ * We use a binary search, and thus we assume that the table is</div><div class='add'>+ * already sorted.</div><div class='add'>+ */</div><div class='add'>+const struct exception_table_entry *</div><div class='add'>+search_extable(const struct exception_table_entry *first,</div><div class='add'>+	       const struct exception_table_entry *last,</div><div class='add'>+	       unsigned long value)</div><div class='add'>+{</div><div class='add'>+	while (first &lt;= last) {</div><div class='add'>+		const struct exception_table_entry *mid;</div><div class='add'>+		unsigned long addr;</div><div class='add'>+</div><div class='add'>+		mid = ((last - first) &gt;&gt; 1) + first;</div><div class='add'>+		addr = ex_insn_addr(mid);</div><div class='add'>+		if (addr &lt; value)</div><div class='add'>+			first = mid + 1;</div><div class='add'>+		else if (addr &gt; value)</div><div class='add'>+			last = mid - 1;</div><div class='add'>+		else</div><div class='add'>+			return mid;</div><div class='add'>+        }</div><div class='add'>+        return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The exception table needs to be sorted so that the binary</div><div class='add'>+ * search that we use to find entries in it works properly.</div><div class='add'>+ * This is used both for the kernel exception table and for</div><div class='add'>+ * the exception tables of modules that get loaded.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static int cmp_ex(const void *a, const void *b)</div><div class='add'>+{</div><div class='add'>+	const struct exception_table_entry *x = a, *y = b;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This value will always end up fittin in an int, because on</div><div class='add'>+	 * both i386 and x86-64 the kernel symbol-reachable address</div><div class='add'>+	 * space is &lt; 2 GiB.</div><div class='add'>+	 *</div><div class='add'>+	 * This compare is only valid after normalization.</div><div class='add'>+	 */</div><div class='add'>+	return x-&gt;insn - y-&gt;insn;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sort_extable(struct exception_table_entry *start,</div><div class='add'>+		  struct exception_table_entry *finish)</div><div class='add'>+{</div><div class='add'>+	struct exception_table_entry *p;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Convert all entries to being relative to the start of the section */</div><div class='add'>+	i = 0;</div><div class='add'>+	for (p = start; p &lt; finish; p++) {</div><div class='add'>+		p-&gt;insn += i;</div><div class='add'>+		i += 4;</div><div class='add'>+		p-&gt;fixup += i;</div><div class='add'>+		i += 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sort(start, finish - start, sizeof(struct exception_table_entry),</div><div class='add'>+	     cmp_ex, NULL);</div><div class='add'>+</div><div class='add'>+	/* Denormalize all entries */</div><div class='add'>+	i = 0;</div><div class='add'>+	for (p = start; p &lt; finish; p++) {</div><div class='add'>+		p-&gt;insn -= i;</div><div class='add'>+		i += 4;</div><div class='add'>+		p-&gt;fixup -= i;</div><div class='add'>+		i += 4;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MODULES</div><div class='add'>+/*</div><div class='add'>+ * If the exception table is sorted, any referring to the module init</div><div class='add'>+ * will be at the beginning or the end.</div><div class='add'>+ */</div><div class='add'>+void trim_init_extable(struct module *m)</div><div class='add'>+{</div><div class='add'>+	/*trim the beginning*/</div><div class='add'>+	while (m-&gt;num_exentries &amp;&amp;</div><div class='add'>+	       within_module_init(ex_insn_addr(&amp;m-&gt;extable[0]), m)) {</div><div class='add'>+		m-&gt;extable++;</div><div class='add'>+		m-&gt;num_exentries--;</div><div class='add'>+	}</div><div class='add'>+	/*trim the end*/</div><div class='add'>+	while (m-&gt;num_exentries &amp;&amp;</div><div class='add'>+	       within_module_init(ex_insn_addr(&amp;m-&gt;extable[m-&gt;num_exentries-1]), m))</div><div class='add'>+		m-&gt;num_exentries--;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_MODULES */</div><div class='head'>diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c<br/>index 3ecfd1aaf214..76dcd9d8e0bc 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/fault.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/mm/fault.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/fault.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/fault.c</a></div><div class='hunk'>@@ -582,7 +582,7 @@ show_fault_oops(struct pt_regs *regs, unsigned long error_code,</div><div class='ctx'> 		pte_t *pte = lookup_address(address, &amp;level);</div><div class='ctx'> </div><div class='ctx'> 		if (pte &amp;&amp; pte_present(*pte) &amp;&amp; !pte_exec(*pte))</div><div class='del'>-			printk(nx_warning, current_uid());</div><div class='add'>+			printk(nx_warning, from_kuid(&amp;init_user_ns, current_uid()));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_ALERT "BUG: unable to handle kernel ");</div><div class='head'>diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c<br/>index 4f0cec7e4ffb..bc4e9d84157f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/mm/init.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/init.c</a></div><div class='hunk'>@@ -29,8 +29,14 @@ int direct_gbpages</div><div class='ctx'> #endif</div><div class='ctx'> ;</div><div class='ctx'> </div><div class='del'>-static void __init find_early_table_space(unsigned long end, int use_pse,</div><div class='del'>-					  int use_gbpages)</div><div class='add'>+struct map_range {</div><div class='add'>+	unsigned long start;</div><div class='add'>+	unsigned long end;</div><div class='add'>+	unsigned page_size_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init find_early_table_space(struct map_range *mr, unsigned long end,</div><div class='add'>+					  int use_pse, int use_gbpages)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long puds, pmds, ptes, tables, start = 0, good_end = end;</div><div class='ctx'> 	phys_addr_t base;</div><div class='hunk'>@@ -55,6 +61,10 @@ static void __init find_early_table_space(unsigned long end, int use_pse,</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> 		extra += PMD_SIZE;</div><div class='ctx'> #endif</div><div class='add'>+		/* The first 2/4M doesn't use large pages. */</div><div class='add'>+		if (mr-&gt;start &lt; PMD_SIZE)</div><div class='add'>+			extra += mr-&gt;end - mr-&gt;start;</div><div class='add'>+</div><div class='ctx'> 		ptes = (extra + PAGE_SIZE - 1) &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	} else</div><div class='ctx'> 		ptes = (end + PAGE_SIZE - 1) &gt;&gt; PAGE_SHIFT;</div><div class='hunk'>@@ -75,8 +85,9 @@ static void __init find_early_table_space(unsigned long end, int use_pse,</div><div class='ctx'> 	pgt_buf_end = pgt_buf_start;</div><div class='ctx'> 	pgt_buf_top = pgt_buf_start + (tables &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> </div><div class='del'>-	printk(KERN_DEBUG "kernel direct mapping tables up to %lx @ %lx-%lx\n",</div><div class='del'>-		end, pgt_buf_start &lt;&lt; PAGE_SHIFT, pgt_buf_top &lt;&lt; PAGE_SHIFT);</div><div class='add'>+	printk(KERN_DEBUG "kernel direct mapping tables up to %#lx @ [mem %#010lx-%#010lx]\n",</div><div class='add'>+		end - 1, pgt_buf_start &lt;&lt; PAGE_SHIFT,</div><div class='add'>+		(pgt_buf_top &lt;&lt; PAGE_SHIFT) - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init native_pagetable_reserve(u64 start, u64 end)</div><div class='hunk'>@@ -84,12 +95,6 @@ void __init native_pagetable_reserve(u64 start, u64 end)</div><div class='ctx'> 	memblock_reserve(start, end - start);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct map_range {</div><div class='del'>-	unsigned long start;</div><div class='del'>-	unsigned long end;</div><div class='del'>-	unsigned page_size_mask;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> #define NR_RANGE_MR 3</div><div class='ctx'> #else /* CONFIG_X86_64 */</div><div class='hunk'>@@ -129,7 +134,8 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,</div><div class='ctx'> 	int nr_range, i;</div><div class='ctx'> 	int use_pse, use_gbpages;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "init_memory_mapping: %016lx-%016lx\n", start, end);</div><div class='add'>+	printk(KERN_INFO "init_memory_mapping: [mem %#010lx-%#010lx]\n",</div><div class='add'>+	       start, end - 1);</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KMEMCHECK)</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -248,8 +254,8 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; nr_range; i++)</div><div class='del'>-		printk(KERN_DEBUG " %010lx - %010lx page %s\n",</div><div class='del'>-				mr[i].start, mr[i].end,</div><div class='add'>+		printk(KERN_DEBUG " [mem %#010lx-%#010lx] page %s\n",</div><div class='add'>+				mr[i].start, mr[i].end - 1,</div><div class='ctx'> 			(mr[i].page_size_mask &amp; (1&lt;&lt;PG_LEVEL_1G))?"1G":(</div><div class='ctx'> 			 (mr[i].page_size_mask &amp; (1&lt;&lt;PG_LEVEL_2M))?"2M":"4k"));</div><div class='ctx'> </div><div class='hunk'>@@ -261,7 +267,7 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,</div><div class='ctx'> 	 * nodes are discovered.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!after_bootmem)</div><div class='del'>-		find_early_table_space(end, use_pse, use_gbpages);</div><div class='add'>+		find_early_table_space(&amp;mr[0], end, use_pse, use_gbpages);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; nr_range; i++)</div><div class='ctx'> 		ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,</div><div class='hunk'>@@ -347,8 +353,8 @@ void free_init_pages(char *what, unsigned long begin, unsigned long end)</div><div class='ctx'> 	 * create a kernel page fault:</div><div class='ctx'> 	 */</div><div class='ctx'> #ifdef CONFIG_DEBUG_PAGEALLOC</div><div class='del'>-	printk(KERN_INFO "debug: unmapping init memory %08lx..%08lx\n",</div><div class='del'>-		begin, end);</div><div class='add'>+	printk(KERN_INFO "debug: unmapping init [mem %#010lx-%#010lx]\n",</div><div class='add'>+		begin, end - 1);</div><div class='ctx'> 	set_memory_np(begin, (end - begin) &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> #else</div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c<br/>index fc18be0f6f29..2b6b4a3c8beb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/init_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/mm/init_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/init_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/init_64.c</a></div><div class='hunk'>@@ -407,12 +407,12 @@ static unsigned long __meminit</div><div class='ctx'> phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,</div><div class='ctx'> 	      unsigned long page_size_mask, pgprot_t prot)</div><div class='ctx'> {</div><div class='del'>-	unsigned long pages = 0;</div><div class='add'>+	unsigned long pages = 0, next;</div><div class='ctx'> 	unsigned long last_map_addr = end;</div><div class='ctx'> </div><div class='ctx'> 	int i = pmd_index(address);</div><div class='ctx'> </div><div class='del'>-	for (; i &lt; PTRS_PER_PMD; i++, address += PMD_SIZE) {</div><div class='add'>+	for (; i &lt; PTRS_PER_PMD; i++, address = next) {</div><div class='ctx'> 		unsigned long pte_phys;</div><div class='ctx'> 		pmd_t *pmd = pmd_page + pmd_index(address);</div><div class='ctx'> 		pte_t *pte;</div><div class='hunk'>@@ -426,6 +426,8 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		next = (address &amp; PMD_MASK) + PMD_SIZE;</div><div class='add'>+</div><div class='ctx'> 		if (pmd_val(*pmd)) {</div><div class='ctx'> 			if (!pmd_large(*pmd)) {</div><div class='ctx'> 				spin_lock(&amp;init_mm.page_table_lock);</div><div class='hunk'>@@ -449,7 +451,7 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,</div><div class='ctx'> 			 * attributes.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (page_size_mask &amp; (1 &lt;&lt; PG_LEVEL_2M)) {</div><div class='del'>-				pages++;</div><div class='add'>+				last_map_addr = next;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> 			new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));</div><div class='hunk'>@@ -462,7 +464,7 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,</div><div class='ctx'> 				pfn_pte(address &gt;&gt; PAGE_SHIFT,</div><div class='ctx'> 					__pgprot(pgprot_val(prot) | _PAGE_PSE)));</div><div class='ctx'> 			spin_unlock(&amp;init_mm.page_table_lock);</div><div class='del'>-			last_map_addr = (address &amp; PMD_MASK) + PMD_SIZE;</div><div class='add'>+			last_map_addr = next;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -482,11 +484,11 @@ static unsigned long __meminit</div><div class='ctx'> phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,</div><div class='ctx'> 			 unsigned long page_size_mask)</div><div class='ctx'> {</div><div class='del'>-	unsigned long pages = 0;</div><div class='add'>+	unsigned long pages = 0, next;</div><div class='ctx'> 	unsigned long last_map_addr = end;</div><div class='ctx'> 	int i = pud_index(addr);</div><div class='ctx'> </div><div class='del'>-	for (; i &lt; PTRS_PER_PUD; i++, addr = (addr &amp; PUD_MASK) + PUD_SIZE) {</div><div class='add'>+	for (; i &lt; PTRS_PER_PUD; i++, addr = next) {</div><div class='ctx'> 		unsigned long pmd_phys;</div><div class='ctx'> 		pud_t *pud = pud_page + pud_index(addr);</div><div class='ctx'> 		pmd_t *pmd;</div><div class='hunk'>@@ -495,8 +497,9 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,</div><div class='ctx'> 		if (addr &gt;= end)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		if (!after_bootmem &amp;&amp;</div><div class='del'>-				!e820_any_mapped(addr, addr+PUD_SIZE, 0)) {</div><div class='add'>+		next = (addr &amp; PUD_MASK) + PUD_SIZE;</div><div class='add'>+</div><div class='add'>+		if (!after_bootmem &amp;&amp; !e820_any_mapped(addr, next, 0)) {</div><div class='ctx'> 			set_pud(pud, __pud(0));</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -523,7 +526,7 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,</div><div class='ctx'> 			 * attributes.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (page_size_mask &amp; (1 &lt;&lt; PG_LEVEL_1G)) {</div><div class='del'>-				pages++;</div><div class='add'>+				last_map_addr = next;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> 			prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));</div><div class='hunk'>@@ -535,7 +538,7 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,</div><div class='ctx'> 			set_pte((pte_t *)pud,</div><div class='ctx'> 				pfn_pte(addr &gt;&gt; PAGE_SHIFT, PAGE_KERNEL_LARGE));</div><div class='ctx'> 			spin_unlock(&amp;init_mm.page_table_lock);</div><div class='del'>-			last_map_addr = (addr &amp; PUD_MASK) + PUD_SIZE;</div><div class='add'>+			last_map_addr = next;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/mm/numa.c b/arch/x86/mm/numa.c<br/>index 19d3fa08b119..2d125be1bae9 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/numa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/mm/numa.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/numa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/numa.c</a></div><div class='hunk'>@@ -141,8 +141,8 @@ static int __init numa_add_memblk_to(int nid, u64 start, u64 end,</div><div class='ctx'> </div><div class='ctx'> 	/* whine about and ignore invalid blks */</div><div class='ctx'> 	if (start &gt; end || nid &lt; 0 || nid &gt;= MAX_NUMNODES) {</div><div class='del'>-		pr_warning("NUMA: Warning: invalid memblk node %d (%Lx-%Lx)\n",</div><div class='del'>-			   nid, start, end);</div><div class='add'>+		pr_warning("NUMA: Warning: invalid memblk node %d [mem %#010Lx-%#010Lx]\n",</div><div class='add'>+			   nid, start, end - 1);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -210,8 +210,8 @@ static void __init setup_node_data(int nid, u64 start, u64 end)</div><div class='ctx'> </div><div class='ctx'> 	start = roundup(start, ZONE_ALIGN);</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "Initmem setup node %d %016Lx-%016Lx\n",</div><div class='del'>-	       nid, start, end);</div><div class='add'>+	printk(KERN_INFO "Initmem setup node %d [mem %#010Lx-%#010Lx]\n",</div><div class='add'>+	       nid, start, end - 1);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Allocate node data.  Try remap allocator first, node-local</div><div class='hunk'>@@ -232,7 +232,7 @@ static void __init setup_node_data(int nid, u64 start, u64 end)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* report and initialize */</div><div class='del'>-	printk(KERN_INFO "  NODE_DATA [%016Lx - %016Lx]%s\n",</div><div class='add'>+	printk(KERN_INFO "  NODE_DATA [mem %#010Lx-%#010Lx]%s\n",</div><div class='ctx'> 	       nd_pa, nd_pa + nd_size - 1, remapped ? " (remapped)" : "");</div><div class='ctx'> 	tnid = early_pfn_to_nid(nd_pa &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> 	if (!remapped &amp;&amp; tnid != nid)</div><div class='hunk'>@@ -291,14 +291,14 @@ int __init numa_cleanup_meminfo(struct numa_meminfo *mi)</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (bi-&gt;end &gt; bj-&gt;start &amp;&amp; bi-&gt;start &lt; bj-&gt;end) {</div><div class='ctx'> 				if (bi-&gt;nid != bj-&gt;nid) {</div><div class='del'>-					pr_err("NUMA: node %d (%Lx-%Lx) overlaps with node %d (%Lx-%Lx)\n",</div><div class='del'>-					       bi-&gt;nid, bi-&gt;start, bi-&gt;end,</div><div class='del'>-					       bj-&gt;nid, bj-&gt;start, bj-&gt;end);</div><div class='add'>+					pr_err("NUMA: node %d [mem %#010Lx-%#010Lx] overlaps with node %d [mem %#010Lx-%#010Lx]\n",</div><div class='add'>+					       bi-&gt;nid, bi-&gt;start, bi-&gt;end - 1,</div><div class='add'>+					       bj-&gt;nid, bj-&gt;start, bj-&gt;end - 1);</div><div class='ctx'> 					return -EINVAL;</div><div class='ctx'> 				}</div><div class='del'>-				pr_warning("NUMA: Warning: node %d (%Lx-%Lx) overlaps with itself (%Lx-%Lx)\n",</div><div class='del'>-					   bi-&gt;nid, bi-&gt;start, bi-&gt;end,</div><div class='del'>-					   bj-&gt;start, bj-&gt;end);</div><div class='add'>+				pr_warning("NUMA: Warning: node %d [mem %#010Lx-%#010Lx] overlaps with itself [mem %#010Lx-%#010Lx]\n",</div><div class='add'>+					   bi-&gt;nid, bi-&gt;start, bi-&gt;end - 1,</div><div class='add'>+					   bj-&gt;start, bj-&gt;end - 1);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='hunk'>@@ -320,9 +320,9 @@ int __init numa_cleanup_meminfo(struct numa_meminfo *mi)</div><div class='ctx'> 			}</div><div class='ctx'> 			if (k &lt; mi-&gt;nr_blks)</div><div class='ctx'> 				continue;</div><div class='del'>-			printk(KERN_INFO "NUMA: Node %d [%Lx,%Lx) + [%Lx,%Lx) -&gt; [%Lx,%Lx)\n",</div><div class='del'>-			       bi-&gt;nid, bi-&gt;start, bi-&gt;end, bj-&gt;start, bj-&gt;end,</div><div class='del'>-			       start, end);</div><div class='add'>+			printk(KERN_INFO "NUMA: Node %d [mem %#010Lx-%#010Lx] + [mem %#010Lx-%#010Lx] -&gt; [mem %#010Lx-%#010Lx]\n",</div><div class='add'>+			       bi-&gt;nid, bi-&gt;start, bi-&gt;end - 1, bj-&gt;start,</div><div class='add'>+			       bj-&gt;end - 1, start, end - 1);</div><div class='ctx'> 			bi-&gt;start = start;</div><div class='ctx'> 			bi-&gt;end = end;</div><div class='ctx'> 			numa_remove_memblk_from(j--, mi);</div><div class='hunk'>@@ -616,8 +616,8 @@ static int __init dummy_numa_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	printk(KERN_INFO "%s\n",</div><div class='ctx'> 	       numa_off ? "NUMA turned off" : "No NUMA configuration found");</div><div class='del'>-	printk(KERN_INFO "Faking a node at %016Lx-%016Lx\n",</div><div class='del'>-	       0LLU, PFN_PHYS(max_pfn));</div><div class='add'>+	printk(KERN_INFO "Faking a node at [mem %#018Lx-%#018Lx]\n",</div><div class='add'>+	       0LLU, PFN_PHYS(max_pfn) - 1);</div><div class='ctx'> </div><div class='ctx'> 	node_set(0, numa_nodes_parsed);</div><div class='ctx'> 	numa_add_memblk(0, 0, PFN_PHYS(max_pfn));</div><div class='head'>diff --git a/arch/x86/mm/numa_emulation.c b/arch/x86/mm/numa_emulation.c<br/>index 53489ff6bf82..dbbbb47260cc 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/numa_emulation.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/mm/numa_emulation.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/numa_emulation.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/numa_emulation.c</a></div><div class='hunk'>@@ -68,8 +68,8 @@ static int __init emu_setup_memblk(struct numa_meminfo *ei,</div><div class='ctx'> 		numa_remove_memblk_from(phys_blk, pi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "Faking node %d at %016Lx-%016Lx (%LuMB)\n", nid,</div><div class='del'>-	       eb-&gt;start, eb-&gt;end, (eb-&gt;end - eb-&gt;start) &gt;&gt; 20);</div><div class='add'>+	printk(KERN_INFO "Faking node %d at [mem %#018Lx-%#018Lx] (%LuMB)\n",</div><div class='add'>+	       nid, eb-&gt;start, eb-&gt;end - 1, (eb-&gt;end - eb-&gt;start) &gt;&gt; 20);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -339,9 +339,11 @@ void __init numa_emulation(struct numa_meminfo *numa_meminfo, int numa_dist_cnt)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		unsigned long n;</div><div class='ctx'> </div><div class='del'>-		n = simple_strtoul(emu_cmdline, NULL, 0);</div><div class='add'>+		n = simple_strtoul(emu_cmdline, &amp;emu_cmdline, 0);</div><div class='ctx'> 		ret = split_nodes_interleave(&amp;ei, &amp;pi, 0, max_addr, n);</div><div class='ctx'> 	}</div><div class='add'>+	if (*emu_cmdline == ':')</div><div class='add'>+		emu_cmdline++;</div><div class='ctx'> </div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto no_emu;</div><div class='hunk'>@@ -418,7 +420,9 @@ void __init numa_emulation(struct numa_meminfo *numa_meminfo, int numa_dist_cnt)</div><div class='ctx'> 			int physj = emu_nid_to_phys[j];</div><div class='ctx'> 			int dist;</div><div class='ctx'> </div><div class='del'>-			if (physi &gt;= numa_dist_cnt || physj &gt;= numa_dist_cnt)</div><div class='add'>+			if (get_option(&amp;emu_cmdline, &amp;dist) == 2)</div><div class='add'>+				;</div><div class='add'>+			else if (physi &gt;= numa_dist_cnt || physj &gt;= numa_dist_cnt)</div><div class='ctx'> 				dist = physi == physj ?</div><div class='ctx'> 					LOCAL_DISTANCE : REMOTE_DISTANCE;</div><div class='ctx'> 			else</div><div class='head'>diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c<br/>index f6ff57b7efa5..3d68ef6d2266 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/pat.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/mm/pat.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/pat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/pat.c</a></div><div class='hunk'>@@ -158,31 +158,47 @@ static unsigned long pat_x_mtrr_type(u64 start, u64 end, unsigned long req_type)</div><div class='ctx'> 	return req_type;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct pagerange_state {</div><div class='add'>+	unsigned long		cur_pfn;</div><div class='add'>+	int			ram;</div><div class='add'>+	int			not_ram;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+pagerange_is_ram_callback(unsigned long initial_pfn, unsigned long total_nr_pages, void *arg)</div><div class='add'>+{</div><div class='add'>+	struct pagerange_state *state = arg;</div><div class='add'>+</div><div class='add'>+	state-&gt;not_ram	|= initial_pfn &gt; state-&gt;cur_pfn;</div><div class='add'>+	state-&gt;ram	|= total_nr_pages &gt; 0;</div><div class='add'>+	state-&gt;cur_pfn	 = initial_pfn + total_nr_pages;</div><div class='add'>+</div><div class='add'>+	return state-&gt;ram &amp;&amp; state-&gt;not_ram;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int pat_pagerange_is_ram(resource_size_t start, resource_size_t end)</div><div class='ctx'> {</div><div class='del'>-	int ram_page = 0, not_rampage = 0;</div><div class='del'>-	unsigned long page_nr;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	unsigned long start_pfn = start &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	unsigned long end_pfn = (end + PAGE_SIZE - 1) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	struct pagerange_state state = {start_pfn, 0, 0};</div><div class='ctx'> </div><div class='del'>-	for (page_nr = (start &gt;&gt; PAGE_SHIFT); page_nr &lt; (end &gt;&gt; PAGE_SHIFT);</div><div class='del'>-	     ++page_nr) {</div><div class='del'>-		/*</div><div class='del'>-		 * For legacy reasons, physical address range in the legacy ISA</div><div class='del'>-		 * region is tracked as non-RAM. This will allow users of</div><div class='del'>-		 * /dev/mem to map portions of legacy ISA region, even when</div><div class='del'>-		 * some of those portions are listed(or not even listed) with</div><div class='del'>-		 * different e820 types(RAM/reserved/..)</div><div class='del'>-		 */</div><div class='del'>-		if (page_nr &gt;= (ISA_END_ADDRESS &gt;&gt; PAGE_SHIFT) &amp;&amp;</div><div class='del'>-		    page_is_ram(page_nr))</div><div class='del'>-			ram_page = 1;</div><div class='del'>-		else</div><div class='del'>-			not_rampage = 1;</div><div class='del'>-</div><div class='del'>-		if (ram_page == not_rampage)</div><div class='del'>-			return -1;</div><div class='add'>+	/*</div><div class='add'>+	 * For legacy reasons, physical address range in the legacy ISA</div><div class='add'>+	 * region is tracked as non-RAM. This will allow users of</div><div class='add'>+	 * /dev/mem to map portions of legacy ISA region, even when</div><div class='add'>+	 * some of those portions are listed(or not even listed) with</div><div class='add'>+	 * different e820 types(RAM/reserved/..)</div><div class='add'>+	 */</div><div class='add'>+	if (start_pfn &lt; ISA_END_ADDRESS &gt;&gt; PAGE_SHIFT)</div><div class='add'>+		start_pfn = ISA_END_ADDRESS &gt;&gt; PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (start_pfn &lt; end_pfn) {</div><div class='add'>+		ret = walk_system_ram_range(start_pfn, end_pfn - start_pfn,</div><div class='add'>+				&amp;state, pagerange_is_ram_callback);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ram_page;</div><div class='add'>+	return (ret &gt; 0) ? -1 : (state.ram ? 1 : 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -209,9 +225,8 @@ static int reserve_ram_pages_type(u64 start, u64 end, unsigned long req_type,</div><div class='ctx'> 		page = pfn_to_page(pfn);</div><div class='ctx'> 		type = get_page_memtype(page);</div><div class='ctx'> 		if (type != -1) {</div><div class='del'>-			printk(KERN_INFO "reserve_ram_pages_type failed "</div><div class='del'>-				"0x%Lx-0x%Lx, track 0x%lx, req 0x%lx\n",</div><div class='del'>-				start, end, type, req_type);</div><div class='add'>+			printk(KERN_INFO "reserve_ram_pages_type failed [mem %#010Lx-%#010Lx], track 0x%lx, req 0x%lx\n",</div><div class='add'>+				start, end - 1, type, req_type);</div><div class='ctx'> 			if (new_type)</div><div class='ctx'> 				*new_type = type;</div><div class='ctx'> </div><div class='hunk'>@@ -314,9 +329,9 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,</div><div class='ctx'> </div><div class='ctx'> 	err = rbt_memtype_check_insert(new, new_type);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		printk(KERN_INFO "reserve_memtype failed 0x%Lx-0x%Lx, "</div><div class='del'>-		       "track %s, req %s\n",</div><div class='del'>-		       start, end, cattr_name(new-&gt;type), cattr_name(req_type));</div><div class='add'>+		printk(KERN_INFO "reserve_memtype failed [mem %#010Lx-%#010Lx], track %s, req %s\n",</div><div class='add'>+		       start, end - 1,</div><div class='add'>+		       cattr_name(new-&gt;type), cattr_name(req_type));</div><div class='ctx'> 		kfree(new);</div><div class='ctx'> 		spin_unlock(&amp;memtype_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -325,8 +340,8 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;memtype_lock);</div><div class='ctx'> </div><div class='del'>-	dprintk("reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n",</div><div class='del'>-		start, end, cattr_name(new-&gt;type), cattr_name(req_type),</div><div class='add'>+	dprintk("reserve_memtype added [mem %#010Lx-%#010Lx], track %s, req %s, ret %s\n",</div><div class='add'>+		start, end - 1, cattr_name(new-&gt;type), cattr_name(req_type),</div><div class='ctx'> 		new_type ? cattr_name(*new_type) : "-");</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -360,14 +375,14 @@ int free_memtype(u64 start, u64 end)</div><div class='ctx'> 	spin_unlock(&amp;memtype_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (!entry) {</div><div class='del'>-		printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n",</div><div class='del'>-			current-&gt;comm, current-&gt;pid, start, end);</div><div class='add'>+		printk(KERN_INFO "%s:%d freeing invalid memtype [mem %#010Lx-%#010Lx]\n",</div><div class='add'>+		       current-&gt;comm, current-&gt;pid, start, end - 1);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(entry);</div><div class='ctx'> </div><div class='del'>-	dprintk("free_memtype request 0x%Lx-0x%Lx\n", start, end);</div><div class='add'>+	dprintk("free_memtype request [mem %#010Lx-%#010Lx]\n", start, end - 1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -491,9 +506,8 @@ static inline int range_is_allowed(unsigned long pfn, unsigned long size)</div><div class='ctx'> </div><div class='ctx'> 	while (cursor &lt; to) {</div><div class='ctx'> 		if (!devmem_is_allowed(pfn)) {</div><div class='del'>-			printk(KERN_INFO</div><div class='del'>-		"Program %s tried to access /dev/mem between %Lx-&gt;%Lx.\n",</div><div class='del'>-				current-&gt;comm, from, to);</div><div class='add'>+			printk(KERN_INFO "Program %s tried to access /dev/mem between [mem %#010Lx-%#010Lx]\n",</div><div class='add'>+				current-&gt;comm, from, to - 1);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		cursor += PAGE_SIZE;</div><div class='hunk'>@@ -554,12 +568,11 @@ int kernel_map_sync_memtype(u64 base, unsigned long size, unsigned long flags)</div><div class='ctx'> 				size;</div><div class='ctx'> </div><div class='ctx'> 	if (ioremap_change_attr((unsigned long)__va(base), id_sz, flags) &lt; 0) {</div><div class='del'>-		printk(KERN_INFO</div><div class='del'>-			"%s:%d ioremap_change_attr failed %s "</div><div class='del'>-			"for %Lx-%Lx\n",</div><div class='add'>+		printk(KERN_INFO "%s:%d ioremap_change_attr failed %s "</div><div class='add'>+			"for [mem %#010Lx-%#010Lx]\n",</div><div class='ctx'> 			current-&gt;comm, current-&gt;pid,</div><div class='ctx'> 			cattr_name(flags),</div><div class='del'>-			base, (unsigned long long)(base + size));</div><div class='add'>+			base, (unsigned long long)(base + size-1));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -591,12 +604,11 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,</div><div class='ctx'> </div><div class='ctx'> 		flags = lookup_memtype(paddr);</div><div class='ctx'> 		if (want_flags != flags) {</div><div class='del'>-			printk(KERN_WARNING</div><div class='del'>-			"%s:%d map pfn RAM range req %s for %Lx-%Lx, got %s\n",</div><div class='add'>+			printk(KERN_WARNING "%s:%d map pfn RAM range req %s for [mem %#010Lx-%#010Lx], got %s\n",</div><div class='ctx'> 				current-&gt;comm, current-&gt;pid,</div><div class='ctx'> 				cattr_name(want_flags),</div><div class='ctx'> 				(unsigned long long)paddr,</div><div class='del'>-				(unsigned long long)(paddr + size),</div><div class='add'>+				(unsigned long long)(paddr + size - 1),</div><div class='ctx'> 				cattr_name(flags));</div><div class='ctx'> 			*vma_prot = __pgprot((pgprot_val(*vma_prot) &amp;</div><div class='ctx'> 					      (~_PAGE_CACHE_MASK)) |</div><div class='hunk'>@@ -614,11 +626,11 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,</div><div class='ctx'> 		    !is_new_memtype_allowed(paddr, size, want_flags, flags)) {</div><div class='ctx'> 			free_memtype(paddr, paddr + size);</div><div class='ctx'> 			printk(KERN_ERR "%s:%d map pfn expected mapping type %s"</div><div class='del'>-				" for %Lx-%Lx, got %s\n",</div><div class='add'>+				" for [mem %#010Lx-%#010Lx], got %s\n",</div><div class='ctx'> 				current-&gt;comm, current-&gt;pid,</div><div class='ctx'> 				cattr_name(want_flags),</div><div class='ctx'> 				(unsigned long long)paddr,</div><div class='del'>-				(unsigned long long)(paddr + size),</div><div class='add'>+				(unsigned long long)(paddr + size - 1),</div><div class='ctx'> 				cattr_name(flags));</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/arch/x86/mm/srat.c b/arch/x86/mm/srat.c<br/>index efb5b4b93711..4599c3e8bcb6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/srat.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/mm/srat.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/srat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/srat.c</a></div><div class='hunk'>@@ -176,8 +176,11 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "SRAT: Node %u PXM %u %Lx-%Lx\n", node, pxm,</div><div class='del'>-	       start, end);</div><div class='add'>+	node_set(node, numa_nodes_parsed);</div><div class='add'>+</div><div class='add'>+	printk(KERN_INFO "SRAT: Node %u PXM %u [mem %#010Lx-%#010Lx]\n",</div><div class='add'>+	       node, pxm,</div><div class='add'>+	       (unsigned long long) start, (unsigned long long) end - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init acpi_numa_arch_fixup(void) {}</div><div class='head'>diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c<br/>index d6c0418c3e47..5e57e113b72c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/mm/tlb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/mm/tlb.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/mm/tlb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/mm/tlb.c</a></div><div class='hunk'>@@ -61,11 +61,13 @@ static DEFINE_PER_CPU_READ_MOSTLY(int, tlb_vector_offset);</div><div class='ctx'>  */</div><div class='ctx'> void leave_mm(int cpu)</div><div class='ctx'> {</div><div class='del'>-	if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK)</div><div class='add'>+	struct mm_struct *active_mm = this_cpu_read(cpu_tlbstate.active_mm);</div><div class='add'>+	if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK)</div><div class='ctx'> 		BUG();</div><div class='del'>-	cpumask_clear_cpu(cpu,</div><div class='del'>-			  mm_cpumask(percpu_read(cpu_tlbstate.active_mm)));</div><div class='del'>-	load_cr3(swapper_pg_dir);</div><div class='add'>+	if (cpumask_test_cpu(cpu, mm_cpumask(active_mm))) {</div><div class='add'>+		cpumask_clear_cpu(cpu, mm_cpumask(active_mm));</div><div class='add'>+		load_cr3(swapper_pg_dir);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(leave_mm);</div><div class='ctx'> </div><div class='hunk'>@@ -152,8 +154,8 @@ void smp_invalidate_interrupt(struct pt_regs *regs)</div><div class='ctx'> 		 * BUG();</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='del'>-	if (f-&gt;flush_mm == percpu_read(cpu_tlbstate.active_mm)) {</div><div class='del'>-		if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK) {</div><div class='add'>+	if (f-&gt;flush_mm == this_cpu_read(cpu_tlbstate.active_mm)) {</div><div class='add'>+		if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK) {</div><div class='ctx'> 			if (f-&gt;flush_va == TLB_FLUSH_ALL)</div><div class='ctx'> 				local_flush_tlb();</div><div class='ctx'> 			else</div><div class='hunk'>@@ -322,7 +324,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)</div><div class='ctx'> static void do_flush_tlb_all(void *info)</div><div class='ctx'> {</div><div class='ctx'> 	__flush_tlb_all();</div><div class='del'>-	if (percpu_read(cpu_tlbstate.state) == TLBSTATE_LAZY)</div><div class='add'>+	if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_LAZY)</div><div class='ctx'> 		leave_mm(smp_processor_id());</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/pci/Makefile b/arch/x86/pci/Makefile<br/>index e76e18c94a3c..3af5a1e79c9c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/pci/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/Makefile</a></div><div class='hunk'>@@ -11,6 +11,8 @@ obj-$(CONFIG_X86_INTEL_CE)      += ce4100.o</div><div class='ctx'> obj-$(CONFIG_ACPI)		+= acpi.o</div><div class='ctx'> obj-y				+= legacy.o irq.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_STA2X11)           += sta2x11-fixup.o</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_X86_VISWS)		+= visws.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_X86_NUMAQ)		+= numaq_32.o</div><div class='head'>diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c<br/>index ed2835e148b5..fc09c2754e08 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/acpi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/pci/acpi.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/acpi.c</a></div><div class='hunk'>@@ -9,11 +9,11 @@</div><div class='ctx'> </div><div class='ctx'> struct pci_root_info {</div><div class='ctx'> 	struct acpi_device *bridge;</div><div class='del'>-	char *name;</div><div class='add'>+	char name[16];</div><div class='ctx'> 	unsigned int res_num;</div><div class='ctx'> 	struct resource *res;</div><div class='del'>-	struct list_head *resources;</div><div class='ctx'> 	int busnum;</div><div class='add'>+	struct pci_sysdata sd;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static bool pci_use_crs = true;</div><div class='hunk'>@@ -245,13 +245,6 @@ setup_resource(struct acpi_resource *acpi_res, void *data)</div><div class='ctx'> 	return AE_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool resource_contains(struct resource *res, resource_size_t point)</div><div class='del'>-{</div><div class='del'>-	if (res-&gt;start &lt;= point &amp;&amp; point &lt;= res-&gt;end)</div><div class='del'>-		return true;</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void coalesce_windows(struct pci_root_info *info, unsigned long type)</div><div class='ctx'> {</div><div class='ctx'> 	int i, j;</div><div class='hunk'>@@ -272,10 +265,7 @@ static void coalesce_windows(struct pci_root_info *info, unsigned long type)</div><div class='ctx'> 			 * our resources no longer match the ACPI _CRS, but</div><div class='ctx'> 			 * the kernel resource tree doesn't allow overlaps.</div><div class='ctx'> 			 */</div><div class='del'>-			if (resource_contains(res1, res2-&gt;start) ||</div><div class='del'>-			    resource_contains(res1, res2-&gt;end) ||</div><div class='del'>-			    resource_contains(res2, res1-&gt;start) ||</div><div class='del'>-			    resource_contains(res2, res1-&gt;end)) {</div><div class='add'>+			if (resource_overlaps(res1, res2)) {</div><div class='ctx'> 				res1-&gt;start = min(res1-&gt;start, res2-&gt;start);</div><div class='ctx'> 				res1-&gt;end = max(res1-&gt;end, res2-&gt;end);</div><div class='ctx'> 				dev_info(&amp;info-&gt;bridge-&gt;dev,</div><div class='hunk'>@@ -287,7 +277,8 @@ static void coalesce_windows(struct pci_root_info *info, unsigned long type)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void add_resources(struct pci_root_info *info)</div><div class='add'>+static void add_resources(struct pci_root_info *info,</div><div class='add'>+			  struct list_head *resources)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct resource *res, *root, *conflict;</div><div class='hunk'>@@ -311,53 +302,74 @@ static void add_resources(struct pci_root_info *info)</div><div class='ctx'> 				 "ignoring host bridge window %pR (conflicts with %s %pR)\n",</div><div class='ctx'> 				 res, conflict-&gt;name, conflict);</div><div class='ctx'> 		else</div><div class='del'>-			pci_add_resource(info-&gt;resources, res);</div><div class='add'>+			pci_add_resource(resources, res);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void free_pci_root_info_res(struct pci_root_info *info)</div><div class='add'>+{</div><div class='add'>+	kfree(info-&gt;res);</div><div class='add'>+	info-&gt;res = NULL;</div><div class='add'>+	info-&gt;res_num = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __release_pci_root_info(struct pci_root_info *info)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct resource *res;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; info-&gt;res_num; i++) {</div><div class='add'>+		res = &amp;info-&gt;res[i];</div><div class='add'>+</div><div class='add'>+		if (!res-&gt;parent)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!(res-&gt;flags &amp; (IORESOURCE_MEM | IORESOURCE_IO)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		release_resource(res);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	free_pci_root_info_res(info);</div><div class='add'>+</div><div class='add'>+	kfree(info);</div><div class='add'>+}</div><div class='add'>+static void release_pci_root_info(struct pci_host_bridge *bridge)</div><div class='add'>+{</div><div class='add'>+	struct pci_root_info *info = bridge-&gt;release_data;</div><div class='add'>+</div><div class='add'>+	__release_pci_root_info(info);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='del'>-get_current_resources(struct acpi_device *device, int busnum,</div><div class='del'>-		      int domain, struct list_head *resources)</div><div class='add'>+probe_pci_root_info(struct pci_root_info *info, struct acpi_device *device,</div><div class='add'>+		    int busnum, int domain)</div><div class='ctx'> {</div><div class='del'>-	struct pci_root_info info;</div><div class='ctx'> 	size_t size;</div><div class='ctx'> </div><div class='del'>-	info.bridge = device;</div><div class='del'>-	info.res_num = 0;</div><div class='del'>-	info.resources = resources;</div><div class='add'>+	info-&gt;bridge = device;</div><div class='add'>+	info-&gt;res_num = 0;</div><div class='ctx'> 	acpi_walk_resources(device-&gt;handle, METHOD_NAME__CRS, count_resource,</div><div class='del'>-				&amp;info);</div><div class='del'>-	if (!info.res_num)</div><div class='add'>+				info);</div><div class='add'>+	if (!info-&gt;res_num)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	size = sizeof(*info.res) * info.res_num;</div><div class='del'>-	info.res = kmalloc(size, GFP_KERNEL);</div><div class='del'>-	if (!info.res)</div><div class='add'>+	size = sizeof(*info-&gt;res) * info-&gt;res_num;</div><div class='add'>+	info-&gt;res_num = 0;</div><div class='add'>+	info-&gt;res = kmalloc(size, GFP_KERNEL);</div><div class='add'>+	if (!info-&gt;res)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	info.name = kasprintf(GFP_KERNEL, "PCI Bus %04x:%02x", domain, busnum);</div><div class='del'>-	if (!info.name)</div><div class='del'>-		goto name_alloc_fail;</div><div class='add'>+	sprintf(info-&gt;name, "PCI Bus %04x:%02x", domain, busnum);</div><div class='ctx'> </div><div class='del'>-	info.res_num = 0;</div><div class='ctx'> 	acpi_walk_resources(device-&gt;handle, METHOD_NAME__CRS, setup_resource,</div><div class='del'>-				&amp;info);</div><div class='del'>-</div><div class='del'>-	if (pci_use_crs) {</div><div class='del'>-		add_resources(&amp;info);</div><div class='del'>-</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kfree(info.name);</div><div class='del'>-</div><div class='del'>-name_alloc_fail:</div><div class='del'>-	kfree(info.res);</div><div class='add'>+				info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)</div><div class='ctx'> {</div><div class='ctx'> 	struct acpi_device *device = root-&gt;device;</div><div class='add'>+	struct pci_root_info *info = NULL;</div><div class='ctx'> 	int domain = root-&gt;segment;</div><div class='ctx'> 	int busnum = root-&gt;secondary.start;</div><div class='ctx'> 	LIST_HEAD(resources);</div><div class='hunk'>@@ -389,17 +401,14 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)</div><div class='ctx'> 	if (node != -1 &amp;&amp; !node_online(node))</div><div class='ctx'> 		node = -1;</div><div class='ctx'> </div><div class='del'>-	/* Allocate per-root-bus (not per bus) arch-specific data.</div><div class='del'>-	 * TODO: leak; this memory is never freed.</div><div class='del'>-	 * It's arguable whether it's worth the trouble to care.</div><div class='del'>-	 */</div><div class='del'>-	sd = kzalloc(sizeof(*sd), GFP_KERNEL);</div><div class='del'>-	if (!sd) {</div><div class='add'>+	info = kzalloc(sizeof(*info), GFP_KERNEL);</div><div class='add'>+	if (!info) {</div><div class='ctx'> 		printk(KERN_WARNING "pci_bus %04x:%02x: "</div><div class='ctx'> 		       "ignored (out of memory)\n", domain, busnum);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	sd = &amp;info-&gt;sd;</div><div class='ctx'> 	sd-&gt;domain = domain;</div><div class='ctx'> 	sd-&gt;node = node;</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -413,22 +422,32 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)</div><div class='ctx'> 		 * be replaced by sd.</div><div class='ctx'> 		 */</div><div class='ctx'> 		memcpy(bus-&gt;sysdata, sd, sizeof(*sd));</div><div class='del'>-		kfree(sd);</div><div class='add'>+		kfree(info);</div><div class='ctx'> 	} else {</div><div class='del'>-		get_current_resources(device, busnum, domain, &amp;resources);</div><div class='add'>+		probe_pci_root_info(info, device, busnum, domain);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * _CRS with no apertures is normal, so only fall back to</div><div class='ctx'> 		 * defaults or native bridge info if we're ignoring _CRS.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!pci_use_crs)</div><div class='add'>+		if (pci_use_crs)</div><div class='add'>+			add_resources(info, &amp;resources);</div><div class='add'>+		else {</div><div class='add'>+			free_pci_root_info_res(info);</div><div class='ctx'> 			x86_pci_root_bus_resources(busnum, &amp;resources);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		bus = pci_create_root_bus(NULL, busnum, &amp;pci_root_ops, sd,</div><div class='ctx'> 					  &amp;resources);</div><div class='del'>-		if (bus)</div><div class='add'>+		if (bus) {</div><div class='ctx'> 			bus-&gt;subordinate = pci_scan_child_bus(bus);</div><div class='del'>-		else</div><div class='add'>+			pci_set_host_bridge_release(</div><div class='add'>+				to_pci_host_bridge(bus-&gt;bridge),</div><div class='add'>+				release_pci_root_info, info);</div><div class='add'>+		} else {</div><div class='ctx'> 			pci_free_resource_list(&amp;resources);</div><div class='add'>+			__release_pci_root_info(info);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* After the PCI-E bus has been walked and all devices discovered,</div><div class='hunk'>@@ -445,9 +464,6 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!bus)</div><div class='del'>-		kfree(sd);</div><div class='del'>-</div><div class='ctx'> 	if (bus &amp;&amp; node != -1) {</div><div class='ctx'> #ifdef CONFIG_ACPI_NUMA</div><div class='ctx'> 		if (pxm &gt;= 0)</div><div class='head'>diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c<br/>index 0567df3890e1..5aed49bff058 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/amd_bus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/pci/amd_bus.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/amd_bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/amd_bus.c</a></div><div class='hunk'>@@ -32,6 +32,27 @@ static struct pci_hostbridge_probe pci_probes[] __initdata = {</div><div class='ctx'> </div><div class='ctx'> #define RANGE_NUM 16</div><div class='ctx'> </div><div class='add'>+static struct pci_root_info __init *find_pci_root_info(int node, int link)</div><div class='add'>+{</div><div class='add'>+	struct pci_root_info *info;</div><div class='add'>+</div><div class='add'>+	/* find the position */</div><div class='add'>+	list_for_each_entry(info, &amp;pci_root_infos, list)</div><div class='add'>+		if (info-&gt;node == node &amp;&amp; info-&gt;link == link)</div><div class='add'>+			return info;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init set_mp_bus_range_to_node(int min_bus, int max_bus, int node)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_NUMA</div><div class='add'>+	int j;</div><div class='add'>+</div><div class='add'>+	for (j = min_bus; j &lt;= max_bus; j++)</div><div class='add'>+		set_mp_bus_to_node(j, node);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='ctx'> /**</div><div class='ctx'>  * early_fill_mp_bus_to_node()</div><div class='ctx'>  * called before pcibios_scan_root and pci_scan_bus</div><div class='hunk'>@@ -41,7 +62,6 @@ static struct pci_hostbridge_probe pci_probes[] __initdata = {</div><div class='ctx'> static int __init early_fill_mp_bus_info(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	int j;</div><div class='ctx'> 	unsigned bus;</div><div class='ctx'> 	unsigned slot;</div><div class='ctx'> 	int node;</div><div class='hunk'>@@ -50,7 +70,6 @@ static int __init early_fill_mp_bus_info(void)</div><div class='ctx'> 	int def_link;</div><div class='ctx'> 	struct pci_root_info *info;</div><div class='ctx'> 	u32 reg;</div><div class='del'>-	struct resource *res;</div><div class='ctx'> 	u64 start;</div><div class='ctx'> 	u64 end;</div><div class='ctx'> 	struct range range[RANGE_NUM];</div><div class='hunk'>@@ -86,7 +105,6 @@ static int __init early_fill_mp_bus_info(void)</div><div class='ctx'> 	if (!found)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	pci_root_num = 0;</div><div class='ctx'> 	for (i = 0; i &lt; 4; i++) {</div><div class='ctx'> 		int min_bus;</div><div class='ctx'> 		int max_bus;</div><div class='hunk'>@@ -99,19 +117,11 @@ static int __init early_fill_mp_bus_info(void)</div><div class='ctx'> 		min_bus = (reg &gt;&gt; 16) &amp; 0xff;</div><div class='ctx'> 		max_bus = (reg &gt;&gt; 24) &amp; 0xff;</div><div class='ctx'> 		node = (reg &gt;&gt; 4) &amp; 0x07;</div><div class='del'>-#ifdef CONFIG_NUMA</div><div class='del'>-		for (j = min_bus; j &lt;= max_bus; j++)</div><div class='del'>-			set_mp_bus_to_node(j, node);</div><div class='del'>-#endif</div><div class='add'>+		set_mp_bus_range_to_node(min_bus, max_bus, node);</div><div class='ctx'> 		link = (reg &gt;&gt; 8) &amp; 0x03;</div><div class='ctx'> </div><div class='del'>-		info = &amp;pci_root_info[pci_root_num];</div><div class='del'>-		info-&gt;bus_min = min_bus;</div><div class='del'>-		info-&gt;bus_max = max_bus;</div><div class='del'>-		info-&gt;node = node;</div><div class='del'>-		info-&gt;link = link;</div><div class='add'>+		info = alloc_pci_root_info(min_bus, max_bus, node, link);</div><div class='ctx'> 		sprintf(info-&gt;name, "PCI Bus #%02x", min_bus);</div><div class='del'>-		pci_root_num++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* get the default node and link for left over res */</div><div class='hunk'>@@ -134,16 +144,10 @@ static int __init early_fill_mp_bus_info(void)</div><div class='ctx'> 		link = (reg &gt;&gt; 4) &amp; 0x03;</div><div class='ctx'> 		end = (reg &amp; 0xfff000) | 0xfff;</div><div class='ctx'> </div><div class='del'>-		/* find the position */</div><div class='del'>-		for (j = 0; j &lt; pci_root_num; j++) {</div><div class='del'>-			info = &amp;pci_root_info[j];</div><div class='del'>-			if (info-&gt;node == node &amp;&amp; info-&gt;link == link)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-		if (j == pci_root_num)</div><div class='add'>+		info = find_pci_root_info(node, link);</div><div class='add'>+		if (!info)</div><div class='ctx'> 			continue; /* not found */</div><div class='ctx'> </div><div class='del'>-		info = &amp;pci_root_info[j];</div><div class='ctx'> 		printk(KERN_DEBUG "node %d link %d: io port [%llx, %llx]\n",</div><div class='ctx'> 		       node, link, start, end);</div><div class='ctx'> </div><div class='hunk'>@@ -155,13 +159,8 @@ static int __init early_fill_mp_bus_info(void)</div><div class='ctx'> 	}</div><div class='ctx'> 	/* add left over io port range to def node/link, [0, 0xffff] */</div><div class='ctx'> 	/* find the position */</div><div class='del'>-	for (j = 0; j &lt; pci_root_num; j++) {</div><div class='del'>-		info = &amp;pci_root_info[j];</div><div class='del'>-		if (info-&gt;node == def_node &amp;&amp; info-&gt;link == def_link)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	if (j &lt; pci_root_num) {</div><div class='del'>-		info = &amp;pci_root_info[j];</div><div class='add'>+	info = find_pci_root_info(def_node, def_link);</div><div class='add'>+	if (info) {</div><div class='ctx'> 		for (i = 0; i &lt; RANGE_NUM; i++) {</div><div class='ctx'> 			if (!range[i].end)</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -214,16 +213,10 @@ static int __init early_fill_mp_bus_info(void)</div><div class='ctx'> 		end &lt;&lt;= 8;</div><div class='ctx'> 		end |= 0xffff;</div><div class='ctx'> </div><div class='del'>-		/* find the position */</div><div class='del'>-		for (j = 0; j &lt; pci_root_num; j++) {</div><div class='del'>-			info = &amp;pci_root_info[j];</div><div class='del'>-			if (info-&gt;node == node &amp;&amp; info-&gt;link == link)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-		if (j == pci_root_num)</div><div class='del'>-			continue; /* not found */</div><div class='add'>+		info = find_pci_root_info(node, link);</div><div class='ctx'> </div><div class='del'>-		info = &amp;pci_root_info[j];</div><div class='add'>+		if (!info)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='ctx'> 		printk(KERN_DEBUG "node %d link %d: mmio [%llx, %llx]",</div><div class='ctx'> 		       node, link, start, end);</div><div class='hunk'>@@ -291,14 +284,8 @@ static int __init early_fill_mp_bus_info(void)</div><div class='ctx'> 	 * add left over mmio range to def node/link ?</div><div class='ctx'> 	 * that is tricky, just record range in from start_min to 4G</div><div class='ctx'> 	 */</div><div class='del'>-	for (j = 0; j &lt; pci_root_num; j++) {</div><div class='del'>-		info = &amp;pci_root_info[j];</div><div class='del'>-		if (info-&gt;node == def_node &amp;&amp; info-&gt;link == def_link)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	if (j &lt; pci_root_num) {</div><div class='del'>-		info = &amp;pci_root_info[j];</div><div class='del'>-</div><div class='add'>+	info = find_pci_root_info(def_node, def_link);</div><div class='add'>+	if (info) {</div><div class='ctx'> 		for (i = 0; i &lt; RANGE_NUM; i++) {</div><div class='ctx'> 			if (!range[i].end)</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -309,20 +296,16 @@ static int __init early_fill_mp_bus_info(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; pci_root_num; i++) {</div><div class='del'>-		int res_num;</div><div class='add'>+	list_for_each_entry(info, &amp;pci_root_infos, list) {</div><div class='ctx'> 		int busnum;</div><div class='add'>+		struct pci_root_res *root_res;</div><div class='ctx'> </div><div class='del'>-		info = &amp;pci_root_info[i];</div><div class='del'>-		res_num = info-&gt;res_num;</div><div class='ctx'> 		busnum = info-&gt;bus_min;</div><div class='ctx'> 		printk(KERN_DEBUG "bus: [%02x, %02x] on node %x link %x\n",</div><div class='ctx'> 		       info-&gt;bus_min, info-&gt;bus_max, info-&gt;node, info-&gt;link);</div><div class='del'>-		for (j = 0; j &lt; res_num; j++) {</div><div class='del'>-			res = &amp;info-&gt;res[j];</div><div class='del'>-			printk(KERN_DEBUG "bus: %02x index %x %pR\n",</div><div class='del'>-				       busnum, j, res);</div><div class='del'>-		}</div><div class='add'>+		list_for_each_entry(root_res, &amp;info-&gt;resources, list)</div><div class='add'>+			printk(KERN_DEBUG "bus: %02x %pR\n",</div><div class='add'>+				       busnum, &amp;root_res-&gt;res);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/x86/pci/broadcom_bus.c b/arch/x86/pci/broadcom_bus.c<br/>index f3a7c569a403..614392ced7d6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/broadcom_bus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/pci/broadcom_bus.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/broadcom_bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/broadcom_bus.c</a></div><div class='hunk'>@@ -22,19 +22,15 @@</div><div class='ctx'> static void __init cnb20le_res(u8 bus, u8 slot, u8 func)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_root_info *info;</div><div class='add'>+	struct pci_root_res *root_res;</div><div class='ctx'> 	struct resource res;</div><div class='ctx'> 	u16 word1, word2;</div><div class='ctx'> 	u8 fbus, lbus;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	info = &amp;pci_root_info[pci_root_num];</div><div class='del'>-	pci_root_num++;</div><div class='ctx'> </div><div class='ctx'> 	/* read the PCI bus numbers */</div><div class='ctx'> 	fbus = read_pci_config_byte(bus, slot, func, 0x44);</div><div class='ctx'> 	lbus = read_pci_config_byte(bus, slot, func, 0x45);</div><div class='del'>-	info-&gt;bus_min = fbus;</div><div class='del'>-	info-&gt;bus_max = lbus;</div><div class='add'>+	info = alloc_pci_root_info(fbus, lbus, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Add the legacy IDE ports on bus 0</div><div class='hunk'>@@ -86,8 +82,8 @@ static void __init cnb20le_res(u8 bus, u8 slot, u8 func)</div><div class='ctx'> 	res.flags = IORESOURCE_BUS;</div><div class='ctx'> 	printk(KERN_INFO "CNB20LE PCI Host Bridge (domain 0000 %pR)\n", &amp;res);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; info-&gt;res_num; i++)</div><div class='del'>-		printk(KERN_INFO "host bridge window %pR\n", &amp;info-&gt;res[i]);</div><div class='add'>+	list_for_each_entry(root_res, &amp;info-&gt;resources, list)</div><div class='add'>+		printk(KERN_INFO "host bridge window %pR\n", &amp;root_res-&gt;res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init broadcom_postcore_init(void)</div><div class='head'>diff --git a/arch/x86/pci/bus_numa.c b/arch/x86/pci/bus_numa.c<br/>index fd3f65510e9d..306579f7d0fd 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/bus_numa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/pci/bus_numa.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/bus_numa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/bus_numa.c</a></div><div class='hunk'>@@ -4,35 +4,38 @@</div><div class='ctx'> </div><div class='ctx'> #include "bus_numa.h"</div><div class='ctx'> </div><div class='del'>-int pci_root_num;</div><div class='del'>-struct pci_root_info pci_root_info[PCI_ROOT_NR];</div><div class='add'>+LIST_HEAD(pci_root_infos);</div><div class='ctx'> </div><div class='del'>-void x86_pci_root_bus_resources(int bus, struct list_head *resources)</div><div class='add'>+static struct pci_root_info *x86_find_pci_root_info(int bus)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	int j;</div><div class='ctx'> 	struct pci_root_info *info;</div><div class='ctx'> </div><div class='del'>-	if (!pci_root_num)</div><div class='del'>-		goto default_resources;</div><div class='add'>+	if (list_empty(&amp;pci_root_infos))</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; pci_root_num; i++) {</div><div class='del'>-		if (pci_root_info[i].bus_min == bus)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='add'>+	list_for_each_entry(info, &amp;pci_root_infos, list)</div><div class='add'>+		if (info-&gt;bus_min == bus)</div><div class='add'>+			return info;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (i == pci_root_num)</div><div class='add'>+void x86_pci_root_bus_resources(int bus, struct list_head *resources)</div><div class='add'>+{</div><div class='add'>+	struct pci_root_info *info = x86_find_pci_root_info(bus);</div><div class='add'>+	struct pci_root_res *root_res;</div><div class='add'>+</div><div class='add'>+	if (!info)</div><div class='ctx'> 		goto default_resources;</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_DEBUG "PCI: root bus %02x: hardware-probed resources\n",</div><div class='ctx'> 	       bus);</div><div class='ctx'> </div><div class='del'>-	info = &amp;pci_root_info[i];</div><div class='del'>-	for (j = 0; j &lt; info-&gt;res_num; j++) {</div><div class='add'>+	list_for_each_entry(root_res, &amp;info-&gt;resources, list) {</div><div class='ctx'> 		struct resource *res;</div><div class='ctx'> 		struct resource *root;</div><div class='ctx'> </div><div class='del'>-		res = &amp;info-&gt;res[j];</div><div class='add'>+		res = &amp;root_res-&gt;res;</div><div class='ctx'> 		pci_add_resource(resources, res);</div><div class='ctx'> 		if (res-&gt;flags &amp; IORESOURCE_IO)</div><div class='ctx'> 			root = &amp;ioport_resource;</div><div class='hunk'>@@ -53,11 +56,32 @@ default_resources:</div><div class='ctx'> 	pci_add_resource(resources, &amp;iomem_resource);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct pci_root_info __init *alloc_pci_root_info(int bus_min, int bus_max,</div><div class='add'>+						 int node, int link)</div><div class='add'>+{</div><div class='add'>+	struct pci_root_info *info;</div><div class='add'>+</div><div class='add'>+	info = kzalloc(sizeof(*info), GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!info)</div><div class='add'>+		return info;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;info-&gt;resources);</div><div class='add'>+	info-&gt;bus_min = bus_min;</div><div class='add'>+	info-&gt;bus_max = bus_max;</div><div class='add'>+	info-&gt;node = node;</div><div class='add'>+	info-&gt;link = link;</div><div class='add'>+</div><div class='add'>+	list_add_tail(&amp;info-&gt;list, &amp;pci_root_infos);</div><div class='add'>+</div><div class='add'>+	return info;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __devinit update_res(struct pci_root_info *info, resource_size_t start,</div><div class='ctx'> 			  resource_size_t end, unsigned long flags, int merge)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='ctx'> 	struct resource *res;</div><div class='add'>+	struct pci_root_res *root_res;</div><div class='ctx'> </div><div class='ctx'> 	if (start &gt; end)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -69,11 +93,11 @@ void __devinit update_res(struct pci_root_info *info, resource_size_t start,</div><div class='ctx'> 		goto addit;</div><div class='ctx'> </div><div class='ctx'> 	/* try to merge it with old one */</div><div class='del'>-	for (i = 0; i &lt; info-&gt;res_num; i++) {</div><div class='add'>+	list_for_each_entry(root_res, &amp;info-&gt;resources, list) {</div><div class='ctx'> 		resource_size_t final_start, final_end;</div><div class='ctx'> 		resource_size_t common_start, common_end;</div><div class='ctx'> </div><div class='del'>-		res = &amp;info-&gt;res[i];</div><div class='add'>+		res = &amp;root_res-&gt;res;</div><div class='ctx'> 		if (res-&gt;flags != flags)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -93,14 +117,15 @@ void __devinit update_res(struct pci_root_info *info, resource_size_t start,</div><div class='ctx'> addit:</div><div class='ctx'> </div><div class='ctx'> 	/* need to add that */</div><div class='del'>-	if (info-&gt;res_num &gt;= RES_NUM)</div><div class='add'>+	root_res = kzalloc(sizeof(*root_res), GFP_KERNEL);</div><div class='add'>+	if (!root_res)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	res = &amp;info-&gt;res[info-&gt;res_num];</div><div class='add'>+	res = &amp;root_res-&gt;res;</div><div class='ctx'> 	res-&gt;name = info-&gt;name;</div><div class='ctx'> 	res-&gt;flags = flags;</div><div class='ctx'> 	res-&gt;start = start;</div><div class='ctx'> 	res-&gt;end = end;</div><div class='del'>-	res-&gt;child = NULL;</div><div class='del'>-	info-&gt;res_num++;</div><div class='add'>+</div><div class='add'>+	list_add_tail(&amp;root_res-&gt;list, &amp;info-&gt;resources);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/pci/bus_numa.h b/arch/x86/pci/bus_numa.h<br/>index 804a4b40c31a..226a466b2b2b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/bus_numa.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/pci/bus_numa.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/bus_numa.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/bus_numa.h</a></div><div class='hunk'>@@ -4,22 +4,24 @@</div><div class='ctx'>  * sub bus (transparent) will use entres from 3 to store extra from</div><div class='ctx'>  * root, so need to make sure we have enough slot there.</div><div class='ctx'>  */</div><div class='del'>-#define RES_NUM 16</div><div class='add'>+struct pci_root_res {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	struct resource res;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct pci_root_info {</div><div class='add'>+	struct list_head list;</div><div class='ctx'> 	char name[12];</div><div class='del'>-	unsigned int res_num;</div><div class='del'>-	struct resource res[RES_NUM];</div><div class='add'>+	struct list_head resources;</div><div class='ctx'> 	int bus_min;</div><div class='ctx'> 	int bus_max;</div><div class='ctx'> 	int node;</div><div class='ctx'> 	int link;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* 4 at this time, it may become to 32 */</div><div class='del'>-#define PCI_ROOT_NR 4</div><div class='del'>-extern int pci_root_num;</div><div class='del'>-extern struct pci_root_info pci_root_info[PCI_ROOT_NR];</div><div class='del'>-</div><div class='add'>+extern struct list_head pci_root_infos;</div><div class='add'>+struct pci_root_info *alloc_pci_root_info(int bus_min, int bus_max,</div><div class='add'>+						int node, int link);</div><div class='ctx'> extern void update_res(struct pci_root_info *info, resource_size_t start,</div><div class='ctx'> 		      resource_size_t end, unsigned long flags, int merge);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c<br/>index 323481e06ef8..0ad990a20d4a 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/pci/common.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/common.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/dmi.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm-generic/pci-bridge.h&gt;</div><div class='ctx'> #include &lt;asm/acpi.h&gt;</div><div class='ctx'> #include &lt;asm/segment.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='hunk'>@@ -229,6 +230,14 @@ static int __devinit assign_all_busses(const struct dmi_system_id *d)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static int __devinit set_scan_all(const struct dmi_system_id *d)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n",</div><div class='add'>+	       d-&gt;ident);</div><div class='add'>+	pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = {</div><div class='ctx'> #ifdef __i386__</div><div class='ctx'> /*</div><div class='hunk'>@@ -420,6 +429,13 @@ static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.callback = set_scan_all,</div><div class='add'>+		.ident = "Stratus/NEC ftServer",</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "ftServer"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -430,9 +446,7 @@ void __init dmi_check_pciprobe(void)</div><div class='ctx'> </div><div class='ctx'> struct pci_bus * __devinit pcibios_scan_root(int busnum)</div><div class='ctx'> {</div><div class='del'>-	LIST_HEAD(resources);</div><div class='ctx'> 	struct pci_bus *bus = NULL;</div><div class='del'>-	struct pci_sysdata *sd;</div><div class='ctx'> </div><div class='ctx'> 	while ((bus = pci_find_next_bus(bus)) != NULL) {</div><div class='ctx'> 		if (bus-&gt;number == busnum) {</div><div class='hunk'>@@ -441,28 +455,10 @@ struct pci_bus * __devinit pcibios_scan_root(int busnum)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Allocate per-root-bus (not per bus) arch-specific data.</div><div class='del'>-	 * TODO: leak; this memory is never freed.</div><div class='del'>-	 * It's arguable whether it's worth the trouble to care.</div><div class='del'>-	 */</div><div class='del'>-	sd = kzalloc(sizeof(*sd), GFP_KERNEL);</div><div class='del'>-	if (!sd) {</div><div class='del'>-		printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sd-&gt;node = get_mp_bus_to_node(busnum);</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);</div><div class='del'>-	x86_pci_root_bus_resources(busnum, &amp;resources);</div><div class='del'>-	bus = pci_scan_root_bus(NULL, busnum, &amp;pci_root_ops, sd, &amp;resources);</div><div class='del'>-	if (!bus) {</div><div class='del'>-		pci_free_resource_list(&amp;resources);</div><div class='del'>-		kfree(sd);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return bus;</div><div class='add'>+	return pci_scan_bus_on_node(busnum, &amp;pci_root_ops,</div><div class='add'>+					get_mp_bus_to_node(busnum));</div><div class='ctx'> }</div><div class='add'>+</div><div class='ctx'> void __init pcibios_set_cache_line_size(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpuinfo_x86 *c = &amp;boot_cpu_data;</div><div class='hunk'>@@ -656,6 +652,7 @@ struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops,</div><div class='ctx'> 	}</div><div class='ctx'> 	sd-&gt;node = node;</div><div class='ctx'> 	x86_pci_root_bus_resources(busno, &amp;resources);</div><div class='add'>+	printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busno);</div><div class='ctx'> 	bus = pci_scan_root_bus(NULL, busno, ops, sd, &amp;resources);</div><div class='ctx'> 	if (!bus) {</div><div class='ctx'> 		pci_free_resource_list(&amp;resources);</div><div class='head'>diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c<br/>index d0e6e403b4f6..af8a224db216 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/fixup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/pci/fixup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/fixup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/fixup.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;linux/dmi.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/vgaarb.h&gt;</div><div class='ctx'> #include &lt;asm/pci_x86.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void __devinit pci_fixup_i450nx(struct pci_dev *d)</div><div class='hunk'>@@ -348,6 +349,8 @@ static void __devinit pci_fixup_video(struct pci_dev *pdev)</div><div class='ctx'> 	if (config &amp; (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {</div><div class='ctx'> 		pdev-&gt;resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_SHADOW;</div><div class='ctx'> 		dev_printk(KERN_DEBUG, &amp;pdev-&gt;dev, "Boot video device\n");</div><div class='add'>+		if (!vga_default_device())</div><div class='add'>+			vga_set_default_device(pdev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,</div><div class='hunk'>@@ -519,3 +522,20 @@ static void sb600_disable_hpet_bar(struct pci_dev *dev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATI, 0x4385, sb600_disable_hpet_bar);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Twinhead H12Y needs us to block out a region otherwise we map devices</div><div class='add'>+ * there and any access kills the box.</div><div class='add'>+ *</div><div class='add'>+ *   See: https://bugzilla.kernel.org/show_bug.cgi?id=10231</div><div class='add'>+ *</div><div class='add'>+ * Match off the LPC and svid/sdid (older kernels lose the bridge subvendor)</div><div class='add'>+ */</div><div class='add'>+static void __devinit twinhead_reserve_killing_zone(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+        if (dev-&gt;subsystem_vendor == 0x14FF &amp;&amp; dev-&gt;subsystem_device == 0xA003) {</div><div class='add'>+                pr_info("Reserving memory on Twinhead H12Y\n");</div><div class='add'>+                request_mem_region(0xFFB00000, 0x100000, "twinhead");</div><div class='add'>+        }</div><div class='add'>+}</div><div class='add'>+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x27B9, twinhead_reserve_killing_zone);</div><div class='head'>diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c<br/>index 831971e731f7..dd8ca6f7223b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/i386.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/pci/i386.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/i386.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/i386.c</a></div><div class='hunk'>@@ -57,7 +57,7 @@ static struct pcibios_fwaddrmap *pcibios_fwaddrmap_lookup(struct pci_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcibios_fwaddrmap *map;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(!spin_is_locked(&amp;pcibios_fwaddrmap_lock));</div><div class='add'>+	WARN_ON_SMP(!spin_is_locked(&amp;pcibios_fwaddrmap_lock));</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(map, &amp;pcibios_fwaddrmappings, list)</div><div class='ctx'> 		if (map-&gt;dev == dev)</div><div class='head'>diff --git a/arch/x86/pci/sta2x11-fixup.c b/arch/x86/pci/sta2x11-fixup.c<br/>new file mode 100644<br/>index 000000000000..9d8a509c9730<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/sta2x11-fixup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/sta2x11-fixup.c</a></div><div class='hunk'>@@ -0,0 +1,366 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/x86/pci/sta2x11-fixup.c</div><div class='add'>+ * glue code for lib/swiotlb.c and DMA translation between STA2x11</div><div class='add'>+ * AMBA memory mapping and the X86 memory mapping</div><div class='add'>+ *</div><div class='add'>+ * ST Microelectronics ConneXt (STA2X11/STA2X10)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2010-2011 Wind River Systems, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.</div><div class='add'>+ * See the GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/pci_ids.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+</div><div class='add'>+#define STA2X11_SWIOTLB_SIZE (4*1024*1024)</div><div class='add'>+extern int swiotlb_late_init_with_default_size(size_t default_size);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * We build a list of bus numbers that are under the ConneXt. The</div><div class='add'>+ * main bridge hosts 4 busses, which are the 4 endpoints, in order.</div><div class='add'>+ */</div><div class='add'>+#define STA2X11_NR_EP		4	/* 0..3 included */</div><div class='add'>+#define STA2X11_NR_FUNCS	8	/* 0..7 included */</div><div class='add'>+#define STA2X11_AMBA_SIZE	(512 &lt;&lt; 20)</div><div class='add'>+</div><div class='add'>+struct sta2x11_ahb_regs { /* saved during suspend */</div><div class='add'>+	u32 base, pexlbase, pexhbase, crw;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sta2x11_mapping {</div><div class='add'>+	u32 amba_base;</div><div class='add'>+	int is_suspended;</div><div class='add'>+	struct sta2x11_ahb_regs regs[STA2X11_NR_FUNCS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sta2x11_instance {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	int bus0;</div><div class='add'>+	struct sta2x11_mapping map[STA2X11_NR_EP];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static LIST_HEAD(sta2x11_instance_list);</div><div class='add'>+</div><div class='add'>+/* At probe time, record new instances of this bridge (likely one only) */</div><div class='add'>+static void sta2x11_new_instance(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_instance *instance;</div><div class='add'>+</div><div class='add'>+	instance = kzalloc(sizeof(*instance), GFP_ATOMIC);</div><div class='add'>+	if (!instance)</div><div class='add'>+		return;</div><div class='add'>+	/* This has a subordinate bridge, with 4 more-subordinate ones */</div><div class='add'>+	instance-&gt;bus0 = pdev-&gt;subordinate-&gt;number + 1;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;sta2x11_instance_list)) {</div><div class='add'>+		int size = STA2X11_SWIOTLB_SIZE;</div><div class='add'>+		/* First instance: register your own swiotlb area */</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Using SWIOTLB (size %i)\n", size);</div><div class='add'>+		if (swiotlb_late_init_with_default_size(size))</div><div class='add'>+			dev_emerg(&amp;pdev-&gt;dev, "init swiotlb failed\n");</div><div class='add'>+	}</div><div class='add'>+	list_add(&amp;instance-&gt;list, &amp;sta2x11_instance_list);</div><div class='add'>+}</div><div class='add'>+DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, 0xcc17, sta2x11_new_instance);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Utility functions used in this file from below</div><div class='add'>+ */</div><div class='add'>+static struct sta2x11_instance *sta2x11_pdev_to_instance(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_instance *instance;</div><div class='add'>+	int ep;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(instance, &amp;sta2x11_instance_list, list) {</div><div class='add'>+		ep = pdev-&gt;bus-&gt;number - instance-&gt;bus0;</div><div class='add'>+		if (ep &gt;= 0 &amp;&amp; ep &lt; STA2X11_NR_EP)</div><div class='add'>+			return instance;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sta2x11_pdev_to_ep(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_instance *instance;</div><div class='add'>+</div><div class='add'>+	instance = sta2x11_pdev_to_instance(pdev);</div><div class='add'>+	if (!instance)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return pdev-&gt;bus-&gt;number - instance-&gt;bus0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sta2x11_mapping *sta2x11_pdev_to_mapping(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_instance *instance;</div><div class='add'>+	int ep;</div><div class='add'>+</div><div class='add'>+	instance = sta2x11_pdev_to_instance(pdev);</div><div class='add'>+	if (!instance)</div><div class='add'>+		return NULL;</div><div class='add'>+	ep = sta2x11_pdev_to_ep(pdev);</div><div class='add'>+	return instance-&gt;map + ep;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This is exported, as some devices need to access the MFD registers */</div><div class='add'>+struct sta2x11_instance *sta2x11_get_instance(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	return sta2x11_pdev_to_instance(pdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(sta2x11_get_instance);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * p2a - Translate physical address to STA2x11 AMBA address,</div><div class='add'>+ *       used for DMA transfers to STA2x11</div><div class='add'>+ * @p: Physical address</div><div class='add'>+ * @pdev: PCI device (must be hosted within the connext)</div><div class='add'>+ */</div><div class='add'>+static dma_addr_t p2a(dma_addr_t p, struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_mapping *map;</div><div class='add'>+	dma_addr_t a;</div><div class='add'>+</div><div class='add'>+	map = sta2x11_pdev_to_mapping(pdev);</div><div class='add'>+	a = p + map-&gt;amba_base;</div><div class='add'>+	return a;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * a2p - Translate STA2x11 AMBA address to physical address</div><div class='add'>+ *       used for DMA transfers from STA2x11</div><div class='add'>+ * @a: STA2x11 AMBA address</div><div class='add'>+ * @pdev: PCI device (must be hosted within the connext)</div><div class='add'>+ */</div><div class='add'>+static dma_addr_t a2p(dma_addr_t a, struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_mapping *map;</div><div class='add'>+	dma_addr_t p;</div><div class='add'>+</div><div class='add'>+	map = sta2x11_pdev_to_mapping(pdev);</div><div class='add'>+	p = a - map-&gt;amba_base;</div><div class='add'>+	return p;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * sta2x11_swiotlb_alloc_coherent - Allocate swiotlb bounce buffers</div><div class='add'>+ *     returns virtual address. This is the only "special" function here.</div><div class='add'>+ * @dev: PCI device</div><div class='add'>+ * @size: Size of the buffer</div><div class='add'>+ * @dma_handle: DMA address</div><div class='add'>+ * @flags: memory flags</div><div class='add'>+ */</div><div class='add'>+static void *sta2x11_swiotlb_alloc_coherent(struct device *dev,</div><div class='add'>+					    size_t size,</div><div class='add'>+					    dma_addr_t *dma_handle,</div><div class='add'>+					    gfp_t flags,</div><div class='add'>+					    struct dma_attrs *attrs)</div><div class='add'>+{</div><div class='add'>+	void *vaddr;</div><div class='add'>+</div><div class='add'>+	vaddr = dma_generic_alloc_coherent(dev, size, dma_handle, flags, attrs);</div><div class='add'>+	if (!vaddr)</div><div class='add'>+		vaddr = swiotlb_alloc_coherent(dev, size, dma_handle, flags);</div><div class='add'>+	*dma_handle = p2a(*dma_handle, to_pci_dev(dev));</div><div class='add'>+	return vaddr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* We have our own dma_ops: the same as swiotlb but from alloc (above) */</div><div class='add'>+static struct dma_map_ops sta2x11_dma_ops = {</div><div class='add'>+	.alloc = sta2x11_swiotlb_alloc_coherent,</div><div class='add'>+	.free = swiotlb_free_coherent,</div><div class='add'>+	.map_page = swiotlb_map_page,</div><div class='add'>+	.unmap_page = swiotlb_unmap_page,</div><div class='add'>+	.map_sg = swiotlb_map_sg_attrs,</div><div class='add'>+	.unmap_sg = swiotlb_unmap_sg_attrs,</div><div class='add'>+	.sync_single_for_cpu = swiotlb_sync_single_for_cpu,</div><div class='add'>+	.sync_single_for_device = swiotlb_sync_single_for_device,</div><div class='add'>+	.sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,</div><div class='add'>+	.sync_sg_for_device = swiotlb_sync_sg_for_device,</div><div class='add'>+	.mapping_error = swiotlb_dma_mapping_error,</div><div class='add'>+	.dma_supported = NULL, /* FIXME: we should use this instead! */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* At setup time, we use our own ops if the device is a ConneXt one */</div><div class='add'>+static void sta2x11_setup_pdev(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_instance *instance = sta2x11_pdev_to_instance(pdev);</div><div class='add'>+</div><div class='add'>+	if (!instance) /* either a sta2x11 bridge or another ST device */</div><div class='add'>+		return;</div><div class='add'>+	pci_set_consistent_dma_mask(pdev, STA2X11_AMBA_SIZE - 1);</div><div class='add'>+	pci_set_dma_mask(pdev, STA2X11_AMBA_SIZE - 1);</div><div class='add'>+	pdev-&gt;dev.archdata.dma_ops = &amp;sta2x11_dma_ops;</div><div class='add'>+</div><div class='add'>+	/* We must enable all devices as master, for audio DMA to work */</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+}</div><div class='add'>+DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_setup_pdev);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The following three functions are exported (used in swiotlb: FIXME)</div><div class='add'>+ */</div><div class='add'>+/**</div><div class='add'>+ * dma_capable - Check if device can manage DMA transfers (FIXME: kill it)</div><div class='add'>+ * @dev: device for a PCI device</div><div class='add'>+ * @addr: DMA address</div><div class='add'>+ * @size: DMA size</div><div class='add'>+ */</div><div class='add'>+bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_mapping *map;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;archdata.dma_ops != &amp;sta2x11_dma_ops) {</div><div class='add'>+		if (!dev-&gt;dma_mask)</div><div class='add'>+			return false;</div><div class='add'>+		return addr + size - 1 &lt;= *dev-&gt;dma_mask;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	map = sta2x11_pdev_to_mapping(to_pci_dev(dev));</div><div class='add'>+</div><div class='add'>+	if (!map || (addr &lt; map-&gt;amba_base))</div><div class='add'>+		return false;</div><div class='add'>+	if (addr + size &gt;= map-&gt;amba_base + STA2X11_AMBA_SIZE) {</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phys_to_dma - Return the DMA AMBA address used for this STA2x11 device</div><div class='add'>+ * @dev: device for a PCI device</div><div class='add'>+ * @paddr: Physical address</div><div class='add'>+ */</div><div class='add'>+dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;archdata.dma_ops != &amp;sta2x11_dma_ops)</div><div class='add'>+		return paddr;</div><div class='add'>+	return p2a(paddr, to_pci_dev(dev));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dma_to_phys - Return the physical address used for this STA2x11 DMA address</div><div class='add'>+ * @dev: device for a PCI device</div><div class='add'>+ * @daddr: STA2x11 AMBA DMA address</div><div class='add'>+ */</div><div class='add'>+phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;archdata.dma_ops != &amp;sta2x11_dma_ops)</div><div class='add'>+		return daddr;</div><div class='add'>+	return a2p(daddr, to_pci_dev(dev));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * At boot we must set up the mappings for the pcie-to-amba bridge.</div><div class='add'>+ * It involves device access, and the same happens at suspend/resume time</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define AHB_MAPB		0xCA4</div><div class='add'>+#define AHB_CRW(i)		(AHB_MAPB + 0  + (i) * 0x10)</div><div class='add'>+#define AHB_CRW_SZMASK			0xfffffc00UL</div><div class='add'>+#define AHB_CRW_ENABLE			(1 &lt;&lt; 0)</div><div class='add'>+#define AHB_CRW_WTYPE_MEM		(2 &lt;&lt; 1)</div><div class='add'>+#define AHB_CRW_ROE			(1UL &lt;&lt; 3)	/* Relax Order Ena */</div><div class='add'>+#define AHB_CRW_NSE			(1UL &lt;&lt; 4)	/* No Snoop Enable */</div><div class='add'>+#define AHB_BASE(i)		(AHB_MAPB + 4  + (i) * 0x10)</div><div class='add'>+#define AHB_PEXLBASE(i)		(AHB_MAPB + 8  + (i) * 0x10)</div><div class='add'>+#define AHB_PEXHBASE(i)		(AHB_MAPB + 12 + (i) * 0x10)</div><div class='add'>+</div><div class='add'>+/* At probe time, enable mapping for each endpoint, using the pdev */</div><div class='add'>+static void sta2x11_map_ep(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!map)</div><div class='add'>+		return;</div><div class='add'>+	pci_read_config_dword(pdev, AHB_BASE(0), &amp;map-&gt;amba_base);</div><div class='add'>+</div><div class='add'>+	/* Configure AHB mapping */</div><div class='add'>+	pci_write_config_dword(pdev, AHB_PEXLBASE(0), 0);</div><div class='add'>+	pci_write_config_dword(pdev, AHB_PEXHBASE(0), 0);</div><div class='add'>+	pci_write_config_dword(pdev, AHB_CRW(0), STA2X11_AMBA_SIZE |</div><div class='add'>+			       AHB_CRW_WTYPE_MEM | AHB_CRW_ENABLE);</div><div class='add'>+</div><div class='add'>+	/* Disable all the other windows */</div><div class='add'>+	for (i = 1; i &lt; STA2X11_NR_FUNCS; i++)</div><div class='add'>+		pci_write_config_dword(pdev, AHB_CRW(i), 0);</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev,</div><div class='add'>+		 "sta2x11: Map EP %i: AMBA address %#8x-%#8x\n",</div><div class='add'>+		 sta2x11_pdev_to_ep(pdev),  map-&gt;amba_base,</div><div class='add'>+		 map-&gt;amba_base + STA2X11_AMBA_SIZE - 1);</div><div class='add'>+}</div><div class='add'>+DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_map_ep);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM /* Some register values must be saved and restored */</div><div class='add'>+</div><div class='add'>+static void suspend_mapping(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!map)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (map-&gt;is_suspended)</div><div class='add'>+		return;</div><div class='add'>+	map-&gt;is_suspended = 1;</div><div class='add'>+</div><div class='add'>+	/* Save all window configs */</div><div class='add'>+	for (i = 0; i &lt; STA2X11_NR_FUNCS; i++) {</div><div class='add'>+		struct sta2x11_ahb_regs *regs = map-&gt;regs + i;</div><div class='add'>+</div><div class='add'>+		pci_read_config_dword(pdev, AHB_BASE(i), &amp;regs-&gt;base);</div><div class='add'>+		pci_read_config_dword(pdev, AHB_PEXLBASE(i), &amp;regs-&gt;pexlbase);</div><div class='add'>+		pci_read_config_dword(pdev, AHB_PEXHBASE(i), &amp;regs-&gt;pexhbase);</div><div class='add'>+		pci_read_config_dword(pdev, AHB_CRW(i), &amp;regs-&gt;crw);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+DECLARE_PCI_FIXUP_SUSPEND(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, suspend_mapping);</div><div class='add'>+</div><div class='add'>+static void resume_mapping(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!map)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	if (!map-&gt;is_suspended)</div><div class='add'>+		goto out;</div><div class='add'>+	map-&gt;is_suspended = 0;</div><div class='add'>+</div><div class='add'>+	/* Restore all window configs */</div><div class='add'>+	for (i = 0; i &lt; STA2X11_NR_FUNCS; i++) {</div><div class='add'>+		struct sta2x11_ahb_regs *regs = map-&gt;regs + i;</div><div class='add'>+</div><div class='add'>+		pci_write_config_dword(pdev, AHB_BASE(i), regs-&gt;base);</div><div class='add'>+		pci_write_config_dword(pdev, AHB_PEXLBASE(i), regs-&gt;pexlbase);</div><div class='add'>+		pci_write_config_dword(pdev, AHB_PEXHBASE(i), regs-&gt;pexhbase);</div><div class='add'>+		pci_write_config_dword(pdev, AHB_CRW(i), regs-&gt;crw);</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	pci_set_master(pdev); /* Like at boot, enable master on all devices */</div><div class='add'>+}</div><div class='add'>+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, resume_mapping);</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_PM */</div><div class='head'>diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c<br/>index 7415aa927913..56ab74989cf1 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/pci/xen.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/pci/xen.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/pci/xen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/pci/xen.c</a></div><div class='hunk'>@@ -64,6 +64,10 @@ static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,</div><div class='ctx'> 	int shareable = 0;</div><div class='ctx'> 	char *name;</div><div class='ctx'> </div><div class='add'>+	irq = xen_irq_from_gsi(gsi);</div><div class='add'>+	if (irq &gt; 0)</div><div class='add'>+		return irq;</div><div class='add'>+</div><div class='ctx'> 	if (set_pirq)</div><div class='ctx'> 		pirq = gsi;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/platform/geode/net5501.c b/arch/x86/platform/geode/net5501.c<br/>index 66d377e334f7..646e3b5b4bb6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/geode/net5501.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/platform/geode/net5501.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/geode/net5501.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/platform/geode/net5501.c</a></div><div class='hunk'>@@ -63,7 +63,7 @@ static struct gpio_led net5501_leds[] = {</div><div class='ctx'> 		.name = "net5501:1",</div><div class='ctx'> 		.gpio = 6,</div><div class='ctx'> 		.default_trigger = "default-on",</div><div class='del'>-		.active_low = 1,</div><div class='add'>+		.active_low = 0,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c<br/>index e31bcd8f2eee..fd41a9262d65 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/mrst/mrst.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/platform/mrst/mrst.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/mrst/mrst.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/platform/mrst/mrst.c</a></div><div class='hunk'>@@ -782,7 +782,7 @@ BLOCKING_NOTIFIER_HEAD(intel_scu_notifier);</div><div class='ctx'> EXPORT_SYMBOL_GPL(intel_scu_notifier);</div><div class='ctx'> </div><div class='ctx'> /* Called by IPC driver */</div><div class='del'>-void intel_scu_devices_create(void)</div><div class='add'>+void __devinit intel_scu_devices_create(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/platform/olpc/olpc-xo1-sci.c b/arch/x86/platform/olpc/olpc-xo1-sci.c<br/>index 1d4c783d7325..04b8c73659c5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/olpc/olpc-xo1-sci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/platform/olpc/olpc-xo1-sci.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/olpc/olpc-xo1-sci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/platform/olpc/olpc-xo1-sci.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/pm.h&gt;</div><div class='add'>+#include &lt;linux/pm_wakeup.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/core.h&gt;</div><div class='ctx'> #include &lt;linux/power_supply.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='hunk'>@@ -83,8 +84,12 @@ static void send_ebook_state(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!!test_bit(SW_TABLET_MODE, ebook_switch_idev-&gt;sw) == state)</div><div class='add'>+		return; /* Nothing new to report. */</div><div class='add'>+</div><div class='ctx'> 	input_report_switch(ebook_switch_idev, SW_TABLET_MODE, state);</div><div class='ctx'> 	input_sync(ebook_switch_idev);</div><div class='add'>+	pm_wakeup_event(&amp;ebook_switch_idev-&gt;dev, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void flip_lid_inverter(void)</div><div class='hunk'>@@ -123,8 +128,12 @@ static void detect_lid_state(void)</div><div class='ctx'> /* Report current lid switch state through input layer */</div><div class='ctx'> static void send_lid_state(void)</div><div class='ctx'> {</div><div class='add'>+	if (!!test_bit(SW_LID, lid_switch_idev-&gt;sw) == !lid_open)</div><div class='add'>+		return; /* Nothing new to report. */</div><div class='add'>+</div><div class='ctx'> 	input_report_switch(lid_switch_idev, SW_LID, !lid_open);</div><div class='ctx'> 	input_sync(lid_switch_idev);</div><div class='add'>+	pm_wakeup_event(&amp;lid_switch_idev-&gt;dev, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t lid_wake_mode_show(struct device *dev,</div><div class='hunk'>@@ -213,11 +222,30 @@ static irqreturn_t xo1_sci_intr(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "sts %x gpe %x\n", sts, gpe);</div><div class='ctx'> </div><div class='del'>-	if (sts &amp; CS5536_PWRBTN_FLAG &amp;&amp; !(sts &amp; CS5536_WAK_FLAG)) {</div><div class='del'>-		input_report_key(power_button_idev, KEY_POWER, 1);</div><div class='del'>-		input_sync(power_button_idev);</div><div class='del'>-		input_report_key(power_button_idev, KEY_POWER, 0);</div><div class='del'>-		input_sync(power_button_idev);</div><div class='add'>+	if (sts &amp; CS5536_PWRBTN_FLAG) {</div><div class='add'>+		if (!(sts &amp; CS5536_WAK_FLAG)) {</div><div class='add'>+			/* Only report power button input when it was pressed</div><div class='add'>+			 * during regular operation (as opposed to when it</div><div class='add'>+			 * was used to wake the system). */</div><div class='add'>+			input_report_key(power_button_idev, KEY_POWER, 1);</div><div class='add'>+			input_sync(power_button_idev);</div><div class='add'>+			input_report_key(power_button_idev, KEY_POWER, 0);</div><div class='add'>+			input_sync(power_button_idev);</div><div class='add'>+		}</div><div class='add'>+		/* Report the wakeup event in all cases. */</div><div class='add'>+		pm_wakeup_event(&amp;power_button_idev-&gt;dev, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((sts &amp; (CS5536_RTC_FLAG | CS5536_WAK_FLAG)) ==</div><div class='add'>+			(CS5536_RTC_FLAG | CS5536_WAK_FLAG)) {</div><div class='add'>+		/* When the system is woken by the RTC alarm, report the</div><div class='add'>+		 * event on the rtc device. */</div><div class='add'>+		struct device *rtc = bus_find_device_by_name(</div><div class='add'>+			&amp;platform_bus_type, NULL, "rtc_cmos");</div><div class='add'>+		if (rtc) {</div><div class='add'>+			pm_wakeup_event(rtc, 0);</div><div class='add'>+			put_device(rtc);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (gpe &amp; CS5536_GPIOM7_PME_FLAG) { /* EC GPIO */</div><div class='hunk'>@@ -310,9 +338,10 @@ static int __devinit setup_sci_interrupt(struct platform_device *pdev)</div><div class='ctx'> 		outb(lo, CS5536_PIC_INT_SEL2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Enable SCI from power button, and clear pending interrupts */</div><div class='add'>+	/* Enable interesting SCI events, and clear pending interrupts */</div><div class='ctx'> 	sts = inl(acpi_base + CS5536_PM1_STS);</div><div class='del'>-	outl((CS5536_PM_PWRBTN &lt;&lt; 16) | 0xffff, acpi_base + CS5536_PM1_STS);</div><div class='add'>+	outl(((CS5536_PM_PWRBTN | CS5536_PM_RTC) &lt;&lt; 16) | 0xffff,</div><div class='add'>+	     acpi_base + CS5536_PM1_STS);</div><div class='ctx'> </div><div class='ctx'> 	r = request_irq(sci_irq, xo1_sci_intr, 0, DRV_NAME, pdev);</div><div class='ctx'> 	if (r)</div><div class='head'>diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c<br/>index 3ae0e61abd23..59880afa851f 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/uv/tlb_uv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/platform/uv/tlb_uv.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/uv/tlb_uv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/platform/uv/tlb_uv.c</a></div><div class='hunk'>@@ -1295,7 +1295,6 @@ static void __init enable_timeouts(void)</div><div class='ctx'> 		 */</div><div class='ctx'> 		mmr_image |= (1L &lt;&lt; SOFTACK_MSHIFT);</div><div class='ctx'> 		if (is_uv2_hub()) {</div><div class='del'>-			mmr_image &amp;= ~(1L &lt;&lt; UV2_LEG_SHFT);</div><div class='ctx'> 			mmr_image |= (1L &lt;&lt; UV2_EXT_SHFT);</div><div class='ctx'> 		}</div><div class='ctx'> 		write_mmr_misc_control(pnode, mmr_image);</div><div class='head'>diff --git a/arch/x86/platform/visws/visws_quirks.c b/arch/x86/platform/visws/visws_quirks.c<br/>index c7abf13a213f..94d8a39332ec 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/platform/visws/visws_quirks.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/platform/visws/visws_quirks.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/platform/visws/visws_quirks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/platform/visws/visws_quirks.c</a></div><div class='hunk'>@@ -445,7 +445,7 @@ static void ack_cobalt_irq(struct irq_data *data)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cobalt_lock, flags);</div><div class='ctx'> 	disable_cobalt_irq(data);</div><div class='del'>-	apic_write(APIC_EOI, APIC_EIO_ACK);</div><div class='add'>+	apic_write(APIC_EOI, APIC_EOI_ACK);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cobalt_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/realmode/Makefile b/arch/x86/realmode/Makefile<br/>new file mode 100644<br/>index 000000000000..94f7fbe97b08<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/Makefile</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+#</div><div class='add'>+# arch/x86/realmode/Makefile</div><div class='add'>+#</div><div class='add'>+# This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+# License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+# for more details.</div><div class='add'>+#</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+subdir- := rm</div><div class='add'>+</div><div class='add'>+obj-y += init.o</div><div class='add'>+obj-y += rmpiggy.o</div><div class='add'>+</div><div class='add'>+$(obj)/rmpiggy.o: $(obj)/rm/realmode.bin</div><div class='add'>+</div><div class='add'>+$(obj)/rm/realmode.bin: FORCE</div><div class='add'>+	$(Q)$(MAKE) $(build)=$(obj)/rm $@</div><div class='head'>diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c<br/>new file mode 100644<br/>index 000000000000..cbca565af5bd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/init.c</a></div><div class='hunk'>@@ -0,0 +1,115 @@</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/pgtable.h&gt;</div><div class='add'>+#include &lt;asm/realmode.h&gt;</div><div class='add'>+</div><div class='add'>+struct real_mode_header *real_mode_header;</div><div class='add'>+u32 *trampoline_cr4_features;</div><div class='add'>+</div><div class='add'>+void __init setup_real_mode(void)</div><div class='add'>+{</div><div class='add'>+	phys_addr_t mem;</div><div class='add'>+	u16 real_mode_seg;</div><div class='add'>+	u32 *rel;</div><div class='add'>+	u32 count;</div><div class='add'>+	u32 *ptr;</div><div class='add'>+	u16 *seg;</div><div class='add'>+	int i;</div><div class='add'>+	unsigned char *base;</div><div class='add'>+	struct trampoline_header *trampoline_header;</div><div class='add'>+	size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	u64 *trampoline_pgd;</div><div class='add'>+	u64 efer;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* Has to be in very low memory so we can execute real-mode AP code. */</div><div class='add'>+	mem = memblock_find_in_range(0, 1&lt;&lt;20, size, PAGE_SIZE);</div><div class='add'>+	if (!mem)</div><div class='add'>+		panic("Cannot allocate trampoline\n");</div><div class='add'>+</div><div class='add'>+	base = __va(mem);</div><div class='add'>+	memblock_reserve(mem, size);</div><div class='add'>+	real_mode_header = (struct real_mode_header *) base;</div><div class='add'>+	printk(KERN_DEBUG "Base memory trampoline at [%p] %llx size %zu\n",</div><div class='add'>+	       base, (unsigned long long)mem, size);</div><div class='add'>+</div><div class='add'>+	memcpy(base, real_mode_blob, size);</div><div class='add'>+</div><div class='add'>+	real_mode_seg = __pa(base) &gt;&gt; 4;</div><div class='add'>+	rel = (u32 *) real_mode_relocs;</div><div class='add'>+</div><div class='add'>+	/* 16-bit segment relocations. */</div><div class='add'>+	count = rel[0];</div><div class='add'>+	rel = &amp;rel[1];</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		seg = (u16 *) (base + rel[i]);</div><div class='add'>+		*seg = real_mode_seg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 32-bit linear relocations. */</div><div class='add'>+	count = rel[i];</div><div class='add'>+	rel =  &amp;rel[i + 1];</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		ptr = (u32 *) (base + rel[i]);</div><div class='add'>+		*ptr += __pa(base);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Must be perfomed *after* relocation. */</div><div class='add'>+	trampoline_header = (struct trampoline_header *)</div><div class='add'>+		__va(real_mode_header-&gt;trampoline_header);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_32</div><div class='add'>+	trampoline_header-&gt;start = __pa(startup_32_smp);</div><div class='add'>+	trampoline_header-&gt;gdt_limit = __BOOT_DS + 7;</div><div class='add'>+	trampoline_header-&gt;gdt_base = __pa(boot_gdt);</div><div class='add'>+#else</div><div class='add'>+	/*</div><div class='add'>+	 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR</div><div class='add'>+	 * so we need to mask it out.</div><div class='add'>+	 */</div><div class='add'>+	rdmsrl(MSR_EFER, efer);</div><div class='add'>+	trampoline_header-&gt;efer = efer &amp; ~EFER_LMA;</div><div class='add'>+</div><div class='add'>+	trampoline_header-&gt;start = (u64) secondary_startup_64;</div><div class='add'>+	trampoline_cr4_features = &amp;trampoline_header-&gt;cr4;</div><div class='add'>+	*trampoline_cr4_features = read_cr4();</div><div class='add'>+</div><div class='add'>+	trampoline_pgd = (u64 *) __va(real_mode_header-&gt;trampoline_pgd);</div><div class='add'>+	trampoline_pgd[0] = __pa(level3_ident_pgt) + _KERNPG_TABLE;</div><div class='add'>+	trampoline_pgd[511] = __pa(level3_kernel_pgt) + _KERNPG_TABLE;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * set_real_mode_permissions() gets called very early, to guarantee the</div><div class='add'>+ * availability of low memory.  This is before the proper kernel page</div><div class='add'>+ * tables are set up, so we cannot set page permissions in that</div><div class='add'>+ * function.  Thus, we use an arch_initcall instead.</div><div class='add'>+ */</div><div class='add'>+static int __init set_real_mode_permissions(void)</div><div class='add'>+{</div><div class='add'>+	unsigned char *base = (unsigned char *) real_mode_header;</div><div class='add'>+	size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);</div><div class='add'>+</div><div class='add'>+	size_t ro_size =</div><div class='add'>+		PAGE_ALIGN(real_mode_header-&gt;ro_end) -</div><div class='add'>+		__pa(base);</div><div class='add'>+</div><div class='add'>+	size_t text_size =</div><div class='add'>+		PAGE_ALIGN(real_mode_header-&gt;ro_end) -</div><div class='add'>+		real_mode_header-&gt;text_start;</div><div class='add'>+</div><div class='add'>+	unsigned long text_start =</div><div class='add'>+		(unsigned long) __va(real_mode_header-&gt;text_start);</div><div class='add'>+</div><div class='add'>+	set_memory_nx((unsigned long) base, size &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	set_memory_ro((unsigned long) base, ro_size &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	set_memory_x((unsigned long) text_start, text_size &gt;&gt; PAGE_SHIFT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+arch_initcall(set_real_mode_permissions);</div><div class='head'>diff --git a/arch/x86/realmode/rm/.gitignore b/arch/x86/realmode/rm/.gitignore<br/>new file mode 100644<br/>index 000000000000..b6ed3a2555cb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/.gitignore</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+pasyms.h</div><div class='add'>+realmode.lds</div><div class='add'>+realmode.relocs</div><div class='head'>diff --git a/arch/x86/realmode/rm/Makefile b/arch/x86/realmode/rm/Makefile<br/>new file mode 100644<br/>index 000000000000..5b84a2d30888<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/Makefile</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+#</div><div class='add'>+# arch/x86/realmode/Makefile</div><div class='add'>+#</div><div class='add'>+# This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+# License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+# for more details.</div><div class='add'>+#</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+always := realmode.bin realmode.relocs</div><div class='add'>+</div><div class='add'>+wakeup-objs	:= wakeup_asm.o wakemain.o video-mode.o</div><div class='add'>+wakeup-objs	+= copy.o bioscall.o regs.o</div><div class='add'>+# The link order of the video-*.o modules can matter.  In particular,</div><div class='add'>+# video-vga.o *must* be listed first, followed by video-vesa.o.</div><div class='add'>+# Hardware-specific drivers should follow in the order they should be</div><div class='add'>+# probed, and video-bios.o should typically be last.</div><div class='add'>+wakeup-objs	+= video-vga.o</div><div class='add'>+wakeup-objs	+= video-vesa.o</div><div class='add'>+wakeup-objs	+= video-bios.o</div><div class='add'>+</div><div class='add'>+realmode-y			+= header.o</div><div class='add'>+realmode-y			+= trampoline_$(BITS).o</div><div class='add'>+realmode-y			+= stack.o</div><div class='add'>+realmode-$(CONFIG_X86_32)	+= reboot_32.o</div><div class='add'>+realmode-$(CONFIG_ACPI_SLEEP)	+= $(wakeup-objs)</div><div class='add'>+</div><div class='add'>+targets	+= $(realmode-y)</div><div class='add'>+</div><div class='add'>+REALMODE_OBJS = $(addprefix $(obj)/,$(realmode-y))</div><div class='add'>+</div><div class='add'>+sed-pasyms := -n -r -e 's/^([0-9a-fA-F]+) [ABCDGRSTVW] (.+)$$/pa_\2 = \2;/p'</div><div class='add'>+</div><div class='add'>+quiet_cmd_pasyms = PASYMS  $@</div><div class='add'>+      cmd_pasyms = $(NM) $(filter-out FORCE,$^) | \</div><div class='add'>+		   sed $(sed-pasyms) | sort | uniq &gt; $@</div><div class='add'>+</div><div class='add'>+targets += pasyms.h</div><div class='add'>+$(obj)/pasyms.h: $(REALMODE_OBJS) FORCE</div><div class='add'>+	$(call if_changed,pasyms)</div><div class='add'>+</div><div class='add'>+targets += realmode.lds</div><div class='add'>+$(obj)/realmode.lds: $(obj)/pasyms.h</div><div class='add'>+</div><div class='add'>+LDFLAGS_realmode.elf := --emit-relocs -T</div><div class='add'>+CPPFLAGS_realmode.lds += -P -C -I$(obj)</div><div class='add'>+</div><div class='add'>+targets += realmode.elf</div><div class='add'>+$(obj)/realmode.elf: $(obj)/realmode.lds $(REALMODE_OBJS) FORCE</div><div class='add'>+	$(call if_changed,ld)</div><div class='add'>+</div><div class='add'>+OBJCOPYFLAGS_realmode.bin := -O binary</div><div class='add'>+</div><div class='add'>+targets += realmode.bin</div><div class='add'>+$(obj)/realmode.bin: $(obj)/realmode.elf $(obj)/realmode.relocs</div><div class='add'>+	$(call if_changed,objcopy)</div><div class='add'>+</div><div class='add'>+quiet_cmd_relocs = RELOCS  $@</div><div class='add'>+      cmd_relocs = arch/x86/tools/relocs --realmode $&lt; &gt; $@</div><div class='add'>+</div><div class='add'>+targets += realmode.relocs</div><div class='add'>+$(obj)/realmode.relocs: $(obj)/realmode.elf FORCE</div><div class='add'>+	$(call if_changed,relocs)</div><div class='add'>+</div><div class='add'>+# ---------------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+# How to compile the 16-bit code.  Note we always compile for -march=i386,</div><div class='add'>+# that way we can complain to the user if the CPU is insufficient.</div><div class='add'>+KBUILD_CFLAGS	:= $(LINUXINCLUDE) -m32 -g -Os -D_SETUP -D__KERNEL__ -D_WAKEUP \</div><div class='add'>+		   -I$(srctree)/arch/x86/boot \</div><div class='add'>+		   -DDISABLE_BRANCH_PROFILING \</div><div class='add'>+		   -Wall -Wstrict-prototypes \</div><div class='add'>+		   -march=i386 -mregparm=3 \</div><div class='add'>+		   -include $(srctree)/$(src)/../../boot/code16gcc.h \</div><div class='add'>+		   -fno-strict-aliasing -fomit-frame-pointer \</div><div class='add'>+		   $(call cc-option, -ffreestanding) \</div><div class='add'>+		   $(call cc-option, -fno-toplevel-reorder,\</div><div class='add'>+			$(call cc-option, -fno-unit-at-a-time)) \</div><div class='add'>+		   $(call cc-option, -fno-stack-protector) \</div><div class='add'>+		   $(call cc-option, -mpreferred-stack-boundary=2)</div><div class='add'>+KBUILD_AFLAGS	:= $(KBUILD_CFLAGS) -D__ASSEMBLY__</div><div class='add'>+GCOV_PROFILE := n</div><div class='head'>diff --git a/arch/x86/realmode/rm/bioscall.S b/arch/x86/realmode/rm/bioscall.S<br/>new file mode 100644<br/>index 000000000000..16162d197918<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/bioscall.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/bioscall.S</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include "../../boot/bioscall.S"</div><div class='head'>diff --git a/arch/x86/realmode/rm/copy.S b/arch/x86/realmode/rm/copy.S<br/>new file mode 100644<br/>index 000000000000..b785e6f38fdd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/copy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/copy.S</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include "../../boot/copy.S"</div><div class='head'>diff --git a/arch/x86/realmode/rm/header.S b/arch/x86/realmode/rm/header.S<br/>new file mode 100644<br/>index 000000000000..fadf48378ada<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/header.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/header.S</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+/*</div><div class='add'>+ * Real-mode blob header; this should match realmode.h and be</div><div class='add'>+ * readonly; for mutable data instead add pointers into the .data</div><div class='add'>+ * or .bss sections as appropriate.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/page_types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "realmode.h"</div><div class='add'>+	</div><div class='add'>+	.section ".header", "a"</div><div class='add'>+</div><div class='add'>+	.balign	16</div><div class='add'>+GLOBAL(real_mode_header)</div><div class='add'>+	.long	pa_text_start</div><div class='add'>+	.long	pa_ro_end</div><div class='add'>+	/* SMP trampoline */</div><div class='add'>+	.long	pa_trampoline_start</div><div class='add'>+	.long	pa_trampoline_status</div><div class='add'>+	.long	pa_trampoline_header</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	.long	pa_trampoline_pgd;</div><div class='add'>+#endif</div><div class='add'>+	/* ACPI S3 wakeup */</div><div class='add'>+#ifdef CONFIG_ACPI_SLEEP</div><div class='add'>+	.long	pa_wakeup_start</div><div class='add'>+	.long	pa_wakeup_header</div><div class='add'>+#endif</div><div class='add'>+	/* APM/BIOS reboot */</div><div class='add'>+#ifdef CONFIG_X86_32</div><div class='add'>+	.long	pa_machine_real_restart_asm</div><div class='add'>+#endif</div><div class='add'>+END(real_mode_header)</div><div class='add'>+</div><div class='add'>+	/* End signature, used to verify integrity */</div><div class='add'>+	.section ".signature","a"</div><div class='add'>+	.balign 4</div><div class='add'>+GLOBAL(end_signature)</div><div class='add'>+	.long	REALMODE_END_SIGNATURE</div><div class='add'>+END(end_signature)</div><div class='head'>diff --git a/arch/x86/realmode/rm/realmode.h b/arch/x86/realmode/rm/realmode.h<br/>new file mode 100644<br/>index 000000000000..d74cff6350ed<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/realmode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/realmode.h</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+#ifndef ARCH_X86_REALMODE_RM_REALMODE_H</div><div class='add'>+#define ARCH_X86_REALMODE_RM_REALMODE_H</div><div class='add'>+</div><div class='add'>+#ifdef __ASSEMBLY__</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 16-bit ljmpw to the real_mode_seg</div><div class='add'>+ *</div><div class='add'>+ * This must be open-coded since gas will choke on using a</div><div class='add'>+ * relocatable symbol for the segment portion.</div><div class='add'>+ */</div><div class='add'>+#define LJMPW_RM(to)	.byte 0xea ; .word (to), real_mode_seg</div><div class='add'>+</div><div class='add'>+#endif /* __ASSEMBLY__ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Signature at the end of the realmode region</div><div class='add'>+ */</div><div class='add'>+#define REALMODE_END_SIGNATURE	0x65a22c82</div><div class='add'>+</div><div class='add'>+#endif /* ARCH_X86_REALMODE_RM_REALMODE_H */</div><div class='head'>diff --git a/arch/x86/realmode/rm/realmode.lds.S b/arch/x86/realmode/rm/realmode.lds.S<br/>new file mode 100644<br/>index 000000000000..86b2e8d6b1f1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/realmode.lds.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/realmode.lds.S</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+/*</div><div class='add'>+ * realmode.lds.S</div><div class='add'>+ *</div><div class='add'>+ * Linker script for the real-mode code</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/page_types.h&gt;</div><div class='add'>+</div><div class='add'>+#undef i386</div><div class='add'>+</div><div class='add'>+OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")</div><div class='add'>+OUTPUT_ARCH(i386)</div><div class='add'>+</div><div class='add'>+SECTIONS</div><div class='add'>+{</div><div class='add'>+	real_mode_seg = 0;</div><div class='add'>+</div><div class='add'>+	. = 0;</div><div class='add'>+	.header : {</div><div class='add'>+		pa_real_mode_base = .;</div><div class='add'>+		*(.header)</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	. = ALIGN(4);</div><div class='add'>+	.rodata : {</div><div class='add'>+		*(.rodata)</div><div class='add'>+		*(.rodata.*)</div><div class='add'>+		. = ALIGN(16);</div><div class='add'>+		video_cards = .;</div><div class='add'>+		*(.videocards)</div><div class='add'>+		video_cards_end = .;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	. = ALIGN(PAGE_SIZE);</div><div class='add'>+	pa_text_start = .;</div><div class='add'>+	.text : {</div><div class='add'>+		*(.text)</div><div class='add'>+		*(.text.*)</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	.text32 : {</div><div class='add'>+		*(.text32)</div><div class='add'>+		*(.text32.*)</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	.text64 : {</div><div class='add'>+		*(.text64)</div><div class='add'>+		*(.text64.*)</div><div class='add'>+	}</div><div class='add'>+	pa_ro_end = .;</div><div class='add'>+</div><div class='add'>+	. = ALIGN(PAGE_SIZE);</div><div class='add'>+	.data : {</div><div class='add'>+		*(.data)</div><div class='add'>+		*(.data.*)</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	. = ALIGN(128);</div><div class='add'>+	.bss : {</div><div class='add'>+		*(.bss*)</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* End signature for integrity checking */</div><div class='add'>+	. = ALIGN(4);</div><div class='add'>+	.signature : {</div><div class='add'>+		*(.signature)</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/DISCARD/ : {</div><div class='add'>+		*(.note*)</div><div class='add'>+		*(.debug*)</div><div class='add'>+		*(.eh_frame*)</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#include "pasyms.h"</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/kernel/reboot_32.S b/arch/x86/realmode/rm/reboot_32.S<br/>index 1d5c46df0d78..114044876b3d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/reboot_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/reboot_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/reboot_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/reboot_32.S</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;asm/segment.h&gt;</div><div class='ctx'> #include &lt;asm/page_types.h&gt;</div><div class='add'>+#include "realmode.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The following code and data reboots the machine by switching to real</div><div class='hunk'>@@ -13,34 +14,20 @@</div><div class='ctx'>  *</div><div class='ctx'>  * This code is called with the restart type (0 = BIOS, 1 = APM) in %eax.</div><div class='ctx'>  */</div><div class='del'>-	.section ".x86_trampoline","a"</div><div class='del'>-	.balign 16</div><div class='add'>+	.section ".text32", "ax"</div><div class='ctx'> 	.code32</div><div class='del'>-ENTRY(machine_real_restart_asm)</div><div class='del'>-r_base = .</div><div class='del'>-	/* Get our own relocated address */</div><div class='del'>-	call	1f</div><div class='del'>-1:	popl	%ebx</div><div class='del'>-	subl	$(1b - r_base), %ebx</div><div class='del'>-</div><div class='del'>-	/* Compute the equivalent real-mode segment */</div><div class='del'>-	movl	%ebx, %ecx</div><div class='del'>-	shrl	$4, %ecx</div><div class='del'>-	</div><div class='del'>-	/* Patch post-real-mode segment jump */</div><div class='del'>-	movw	(dispatch_table - r_base)(%ebx,%eax,2),%ax</div><div class='del'>-	movw	%ax, (101f - r_base)(%ebx)</div><div class='del'>-	movw	%cx, (102f - r_base)(%ebx)</div><div class='ctx'> </div><div class='add'>+	.balign	16</div><div class='add'>+ENTRY(machine_real_restart_asm)</div><div class='ctx'> 	/* Set up the IDT for real mode. */</div><div class='del'>-	lidtl	(machine_real_restart_idt - r_base)(%ebx)</div><div class='add'>+	lidtl	pa_machine_real_restart_idt</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Set up a GDT from which we can load segment descriptors for real</div><div class='ctx'> 	 * mode.  The GDT is not used in real mode; it is just needed here to</div><div class='ctx'> 	 * prepare the descriptors.</div><div class='ctx'> 	 */</div><div class='del'>-	lgdtl	(machine_real_restart_gdt - r_base)(%ebx)</div><div class='add'>+	lgdtl	pa_machine_real_restart_gdt</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Load the data segment registers with 16-bit compatible values</div><div class='hunk'>@@ -51,7 +38,7 @@ r_base = .</div><div class='ctx'> 	movl	%ecx, %fs</div><div class='ctx'> 	movl	%ecx, %gs</div><div class='ctx'> 	movl	%ecx, %ss</div><div class='del'>-	ljmpl	$8, $1f - r_base</div><div class='add'>+	ljmpw	$8, $1f</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This is 16-bit protected mode code to disable paging and the cache,</div><div class='hunk'>@@ -76,27 +63,29 @@ r_base = .</div><div class='ctx'>  *</div><div class='ctx'>  * Most of this work is probably excessive, but it is what is tested.</div><div class='ctx'>  */</div><div class='add'>+	.text</div><div class='ctx'> 	.code16</div><div class='add'>+</div><div class='add'>+	.balign	16</div><div class='add'>+machine_real_restart_asm16:</div><div class='ctx'> 1:</div><div class='ctx'> 	xorl	%ecx, %ecx</div><div class='del'>-	movl	%cr0, %eax</div><div class='del'>-	andl	$0x00000011, %eax</div><div class='del'>-	orl	$0x60000000, %eax</div><div class='del'>-	movl	%eax, %cr0</div><div class='add'>+	movl	%cr0, %edx</div><div class='add'>+	andl	$0x00000011, %edx</div><div class='add'>+	orl	$0x60000000, %edx</div><div class='add'>+	movl	%edx, %cr0</div><div class='ctx'> 	movl	%ecx, %cr3</div><div class='ctx'> 	movl	%cr0, %edx</div><div class='del'>-	andl	$0x60000000, %edx	/* If no cache bits -&gt; no wbinvd */</div><div class='add'>+	testl	$0x60000000, %edx	/* If no cache bits -&gt; no wbinvd */</div><div class='ctx'> 	jz	2f</div><div class='ctx'> 	wbinvd</div><div class='ctx'> 2:</div><div class='del'>-	andb	$0x10, %al</div><div class='del'>-	movl	%eax, %cr0</div><div class='del'>-	.byte	0xea			/* ljmpw */</div><div class='del'>-101:	.word	0			/* Offset */</div><div class='del'>-102:	.word	0			/* Segment */</div><div class='del'>-</div><div class='del'>-bios:</div><div class='del'>-	ljmpw	$0xf000, $0xfff0</div><div class='add'>+	andb	$0x10, %dl</div><div class='add'>+	movl	%edx, %cr0</div><div class='add'>+	LJMPW_RM(3f)</div><div class='add'>+3:</div><div class='add'>+	andw	%ax, %ax</div><div class='add'>+	jz	bios</div><div class='ctx'> </div><div class='ctx'> apm:</div><div class='ctx'> 	movw	$0x1000, %ax</div><div class='hunk'>@@ -106,26 +95,34 @@ apm:</div><div class='ctx'> 	movw	$0x0001, %bx</div><div class='ctx'> 	movw	$0x0003, %cx</div><div class='ctx'> 	int	$0x15</div><div class='add'>+	/* This should never return... */</div><div class='ctx'> </div><div class='del'>-END(machine_real_restart_asm)</div><div class='add'>+bios:</div><div class='add'>+	ljmpw	$0xf000, $0xfff0</div><div class='ctx'> </div><div class='del'>-	.balign 16</div><div class='del'>-	/* These must match &lt;asm/reboot.h */</div><div class='del'>-dispatch_table:</div><div class='del'>-	.word	bios - r_base</div><div class='del'>-	.word	apm - r_base</div><div class='del'>-END(dispatch_table)</div><div class='add'>+	.section ".rodata", "a"</div><div class='ctx'> </div><div class='del'>-	.balign 16</div><div class='del'>-machine_real_restart_idt:</div><div class='add'>+	.balign	16</div><div class='add'>+GLOBAL(machine_real_restart_idt)</div><div class='ctx'> 	.word	0xffff		/* Length - real mode default value */</div><div class='ctx'> 	.long	0		/* Base - real mode default value */</div><div class='ctx'> END(machine_real_restart_idt)</div><div class='ctx'> </div><div class='del'>-	.balign 16</div><div class='del'>-ENTRY(machine_real_restart_gdt)</div><div class='del'>-	.quad	0		/* Self-pointer, filled in by PM code */</div><div class='del'>-	.quad	0		/* 16-bit code segment, filled in by PM code */</div><div class='add'>+	.balign	16</div><div class='add'>+GLOBAL(machine_real_restart_gdt)</div><div class='add'>+	/* Self-pointer */</div><div class='add'>+	.word	0xffff		/* Length - real mode default value */</div><div class='add'>+	.long	pa_machine_real_restart_gdt</div><div class='add'>+	.word	0</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 16-bit code segment pointing to real_mode_seg</div><div class='add'>+	 * Selector value 8</div><div class='add'>+	 */</div><div class='add'>+	.word	0xffff		/* Limit */</div><div class='add'>+	.long	0x9b000000 + pa_real_mode_base</div><div class='add'>+	.word	0</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * 16-bit data segment with the selector value 16 = 0x10 and</div><div class='ctx'> 	 * base value 0x100; since this is consistent with real mode</div><div class='head'>diff --git a/arch/x86/realmode/rm/regs.c b/arch/x86/realmode/rm/regs.c<br/>new file mode 100644<br/>index 000000000000..fbb15b9f9ca9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/regs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/regs.c</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include "../../boot/regs.c"</div><div class='head'>diff --git a/arch/x86/realmode/rm/stack.S b/arch/x86/realmode/rm/stack.S<br/>new file mode 100644<br/>index 000000000000..867ae87adfae<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/stack.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/stack.S</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+/*</div><div class='add'>+ * Common heap and stack allocations</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+</div><div class='add'>+	.data</div><div class='add'>+GLOBAL(HEAP)</div><div class='add'>+	.long	rm_heap</div><div class='add'>+GLOBAL(heap_end)</div><div class='add'>+	.long	rm_stack</div><div class='add'>+</div><div class='add'>+	.bss</div><div class='add'>+	.balign	16</div><div class='add'>+GLOBAL(rm_heap)</div><div class='add'>+	.space	2048</div><div class='add'>+GLOBAL(rm_stack)</div><div class='add'>+	.space	2048</div><div class='add'>+GLOBAL(rm_stack_end)</div><div class='head'>diff --git a/arch/x86/realmode/rm/trampoline_32.S b/arch/x86/realmode/rm/trampoline_32.S<br/>new file mode 100644<br/>index 000000000000..c1b2791183e7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/trampoline_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/trampoline_32.S</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+/*</div><div class='add'>+ *</div><div class='add'>+ *	Trampoline.S	Derived from Setup.S by Linus Torvalds</div><div class='add'>+ *</div><div class='add'>+ *	4 Jan 1997 Michael Chastain: changed to gnu as.</div><div class='add'>+ *</div><div class='add'>+ *	This is only used for booting secondary CPUs in SMP machine</div><div class='add'>+ *</div><div class='add'>+ *	Entry: CS:IP point to the start of our code, we are</div><div class='add'>+ *	in real mode with no stack, but the rest of the</div><div class='add'>+ *	trampoline page to make our stack and everything else</div><div class='add'>+ *	is a mystery.</div><div class='add'>+ *</div><div class='add'>+ *	We jump into arch/x86/kernel/head_32.S.</div><div class='add'>+ *</div><div class='add'>+ *	On entry to trampoline_start, the processor is in real mode</div><div class='add'>+ *	with 16-bit addressing and 16-bit data.  CS has some value</div><div class='add'>+ *	and IP is zero.  Thus, we load CS to the physical segment</div><div class='add'>+ *	of the real mode code before doing anything further.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;asm/segment.h&gt;</div><div class='add'>+#include &lt;asm/page_types.h&gt;</div><div class='add'>+#include "realmode.h"</div><div class='add'>+</div><div class='add'>+	.text</div><div class='add'>+	.code16</div><div class='add'>+</div><div class='add'>+	.balign	PAGE_SIZE</div><div class='add'>+ENTRY(trampoline_start)</div><div class='add'>+	wbinvd			# Needed for NUMA-Q should be harmless for others</div><div class='add'>+</div><div class='add'>+	LJMPW_RM(1f)</div><div class='add'>+1:</div><div class='add'>+	mov	%cs, %ax	# Code and data in the same place</div><div class='add'>+	mov	%ax, %ds</div><div class='add'>+</div><div class='add'>+	cli			# We should be safe anyway</div><div class='add'>+</div><div class='add'>+	movl	tr_start, %eax	# where we need to go</div><div class='add'>+</div><div class='add'>+	movl	$0xA5A5A5A5, trampoline_status</div><div class='add'>+				# write marker for master knows we're running</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * GDT tables in non default location kernel can be beyond 16MB and</div><div class='add'>+	 * lgdt will not be able to load the address as in real mode default</div><div class='add'>+	 * operand size is 16bit. Use lgdtl instead to force operand size</div><div class='add'>+	 * to 32 bit.</div><div class='add'>+	 */</div><div class='add'>+	lidtl	tr_idt			# load idt with 0, 0</div><div class='add'>+	lgdtl	tr_gdt			# load gdt with whatever is appropriate</div><div class='add'>+</div><div class='add'>+	movw	$1, %dx			# protected mode (PE) bit</div><div class='add'>+	lmsw	%dx			# into protected mode</div><div class='add'>+</div><div class='add'>+	ljmpl	$__BOOT_CS, $pa_startup_32</div><div class='add'>+</div><div class='add'>+	.section ".text32","ax"</div><div class='add'>+	.code32</div><div class='add'>+ENTRY(startup_32)			# note: also used from wakeup_asm.S</div><div class='add'>+	jmp	*%eax</div><div class='add'>+</div><div class='add'>+	.bss</div><div class='add'>+	.balign 8</div><div class='add'>+GLOBAL(trampoline_header)</div><div class='add'>+	tr_start:		.space	4</div><div class='add'>+	tr_gdt_pad:		.space	2</div><div class='add'>+	tr_gdt:			.space	6</div><div class='add'>+END(trampoline_header)</div><div class='add'>+	</div><div class='add'>+#include "trampoline_common.S"</div><div class='head'>diff --git a/arch/x86/kernel/trampoline_64.S b/arch/x86/realmode/rm/trampoline_64.S<br/>index 09ff51799e96..bb360dc39d21 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/trampoline_64.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/trampoline_64.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/trampoline_64.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/trampoline_64.S</a></div><div class='hunk'>@@ -5,12 +5,12 @@</div><div class='ctx'>  *	4 Jan 1997 Michael Chastain: changed to gnu as.</div><div class='ctx'>  *	15 Sept 2005 Eric Biederman: 64bit PIC support</div><div class='ctx'>  *</div><div class='del'>- *	Entry: CS:IP point to the start of our code, we are </div><div class='del'>- *	in real mode with no stack, but the rest of the </div><div class='add'>+ *	Entry: CS:IP point to the start of our code, we are</div><div class='add'>+ *	in real mode with no stack, but the rest of the</div><div class='ctx'>  *	trampoline page to make our stack and everything else</div><div class='ctx'>  *	is a mystery.</div><div class='ctx'>  *</div><div class='del'>- *	On entry to trampoline_data, the processor is in real mode</div><div class='add'>+ *	On entry to trampoline_start, the processor is in real mode</div><div class='ctx'>  *	with 16-bit addressing and 16-bit data.  CS has some value</div><div class='ctx'>  *	and IP is zero.  Thus, data addresses need to be absolute</div><div class='ctx'>  *	(no relocation) and are taken with regard to r_base.</div><div class='hunk'>@@ -31,43 +31,33 @@</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/segment.h&gt;</div><div class='ctx'> #include &lt;asm/processor-flags.h&gt;</div><div class='add'>+#include "realmode.h"</div><div class='ctx'> </div><div class='del'>-	.section ".x86_trampoline","a"</div><div class='del'>-	.balign PAGE_SIZE</div><div class='add'>+	.text</div><div class='ctx'> 	.code16</div><div class='ctx'> </div><div class='del'>-ENTRY(trampoline_data)</div><div class='del'>-r_base = .</div><div class='add'>+	.balign	PAGE_SIZE</div><div class='add'>+ENTRY(trampoline_start)</div><div class='ctx'> 	cli			# We should be safe anyway</div><div class='ctx'> 	wbinvd</div><div class='add'>+</div><div class='add'>+	LJMPW_RM(1f)</div><div class='add'>+1:</div><div class='ctx'> 	mov	%cs, %ax	# Code and data in the same place</div><div class='ctx'> 	mov	%ax, %ds</div><div class='ctx'> 	mov	%ax, %es</div><div class='ctx'> 	mov	%ax, %ss</div><div class='ctx'> </div><div class='add'>+	movl	$0xA5A5A5A5, trampoline_status</div><div class='add'>+	# write marker for master knows we're running</div><div class='ctx'> </div><div class='del'>-	movl	$0xA5A5A5A5, trampoline_status - r_base</div><div class='del'>-				# write marker for master knows we're running</div><div class='del'>-</div><div class='del'>-					# Setup stack</div><div class='del'>-	movw	$(trampoline_stack_end - r_base), %sp</div><div class='add'>+	# Setup stack</div><div class='add'>+	movl	$rm_stack_end, %esp</div><div class='ctx'> </div><div class='ctx'> 	call	verify_cpu		# Verify the cpu supports long mode</div><div class='ctx'> 	testl   %eax, %eax		# Check for return code</div><div class='ctx'> 	jnz	no_longmode</div><div class='ctx'> </div><div class='del'>-	mov	%cs, %ax</div><div class='del'>-	movzx	%ax, %esi		# Find the 32bit trampoline location</div><div class='del'>-	shll	$4, %esi</div><div class='del'>-</div><div class='del'>-					# Fixup the absolute vectors</div><div class='del'>-	leal	(startup_32 - r_base)(%esi), %eax</div><div class='del'>-	movl	%eax, startup_32_vector - r_base</div><div class='del'>-	leal	(startup_64 - r_base)(%esi), %eax</div><div class='del'>-	movl	%eax, startup_64_vector - r_base</div><div class='del'>-	leal	(tgdt - r_base)(%esi), %eax</div><div class='del'>-	movl	%eax, (tgdt + 2 - r_base)</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * GDT tables in non default location kernel can be beyond 16MB and</div><div class='ctx'> 	 * lgdt will not be able to load the address as in real mode default</div><div class='hunk'>@@ -75,36 +65,49 @@ r_base = .</div><div class='ctx'> 	 * to 32 bit.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	lidtl	tidt - r_base	# load idt with 0, 0</div><div class='del'>-	lgdtl	tgdt - r_base	# load gdt with whatever is appropriate</div><div class='add'>+	lidtl	tr_idt	# load idt with 0, 0</div><div class='add'>+	lgdtl	tr_gdt	# load gdt with whatever is appropriate</div><div class='add'>+</div><div class='add'>+	movw	$__KERNEL_DS, %dx	# Data segment descriptor</div><div class='ctx'> </div><div class='del'>-	mov	$X86_CR0_PE, %ax	# protected mode (PE) bit</div><div class='del'>-	lmsw	%ax			# into protected mode</div><div class='add'>+	# Enable protected mode</div><div class='add'>+	movl	$X86_CR0_PE, %eax	# protected mode (PE) bit</div><div class='add'>+	movl	%eax, %cr0		# into protected mode</div><div class='ctx'> </div><div class='ctx'> 	# flush prefetch and jump to startup_32</div><div class='del'>-	ljmpl	*(startup_32_vector - r_base)</div><div class='add'>+	ljmpl	$__KERNEL32_CS, $pa_startup_32</div><div class='ctx'> </div><div class='add'>+no_longmode:</div><div class='add'>+	hlt</div><div class='add'>+	jmp no_longmode</div><div class='add'>+#include "../kernel/verify_cpu.S"</div><div class='add'>+</div><div class='add'>+	.section ".text32","ax"</div><div class='ctx'> 	.code32</div><div class='ctx'> 	.balign 4</div><div class='del'>-startup_32:</div><div class='del'>-	movl	$__KERNEL_DS, %eax	# Initialize the %ds segment register</div><div class='del'>-	movl	%eax, %ds</div><div class='del'>-</div><div class='del'>-	movl	$X86_CR4_PAE, %eax</div><div class='add'>+ENTRY(startup_32)</div><div class='add'>+	movl	%edx, %ss</div><div class='add'>+	addl	$pa_real_mode_base, %esp</div><div class='add'>+	movl	%edx, %ds</div><div class='add'>+	movl	%edx, %es</div><div class='add'>+	movl	%edx, %fs</div><div class='add'>+	movl	%edx, %gs</div><div class='add'>+</div><div class='add'>+	movl	pa_tr_cr4, %eax</div><div class='ctx'> 	movl	%eax, %cr4		# Enable PAE mode</div><div class='ctx'> </div><div class='del'>-					# Setup trampoline 4 level pagetables</div><div class='del'>-	leal	(trampoline_level4_pgt - r_base)(%esi), %eax</div><div class='add'>+	# Setup trampoline 4 level pagetables</div><div class='add'>+	movl	$pa_trampoline_pgd, %eax</div><div class='ctx'> 	movl	%eax, %cr3</div><div class='ctx'> </div><div class='add'>+	# Set up EFER</div><div class='add'>+	movl	pa_tr_efer, %eax</div><div class='add'>+	movl	pa_tr_efer + 4, %edx</div><div class='ctx'> 	movl	$MSR_EFER, %ecx</div><div class='del'>-	movl	$(1 &lt;&lt; _EFER_LME), %eax	# Enable Long Mode</div><div class='del'>-	xorl	%edx, %edx</div><div class='ctx'> 	wrmsr</div><div class='ctx'> </div><div class='ctx'> 	# Enable paging and in turn activate Long Mode</div><div class='del'>-	# Enable protected mode</div><div class='del'>-	movl	$(X86_CR0_PG | X86_CR0_PE), %eax</div><div class='add'>+	movl	$(X86_CR0_PG | X86_CR0_WP | X86_CR0_PE), %eax</div><div class='ctx'> 	movl	%eax, %cr0</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -113,59 +116,38 @@ startup_32:</div><div class='ctx'> 	 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use</div><div class='ctx'> 	 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.</div><div class='ctx'> 	 */</div><div class='del'>-	ljmp	*(startup_64_vector - r_base)(%esi)</div><div class='add'>+	ljmpl	$__KERNEL_CS, $pa_startup_64</div><div class='ctx'> </div><div class='add'>+	.section ".text64","ax"</div><div class='ctx'> 	.code64</div><div class='ctx'> 	.balign 4</div><div class='del'>-startup_64:</div><div class='add'>+ENTRY(startup_64)</div><div class='ctx'> 	# Now jump into the kernel using virtual addresses</div><div class='del'>-	movq	$secondary_startup_64, %rax</div><div class='del'>-	jmp	*%rax</div><div class='del'>-</div><div class='del'>-	.code16</div><div class='del'>-no_longmode:</div><div class='del'>-	hlt</div><div class='del'>-	jmp no_longmode</div><div class='del'>-#include "verify_cpu.S"</div><div class='del'>-</div><div class='del'>-	.balign 4</div><div class='del'>-	# Careful these need to be in the same 64K segment as the above;</div><div class='del'>-tidt:</div><div class='del'>-	.word	0			# idt limit = 0</div><div class='del'>-	.word	0, 0			# idt base = 0L</div><div class='add'>+	jmpq	*tr_start(%rip)</div><div class='ctx'> </div><div class='add'>+	.section ".rodata","a"</div><div class='ctx'> 	# Duplicate the global descriptor table</div><div class='ctx'> 	# so the kernel can live anywhere</div><div class='del'>-	.balign 4</div><div class='del'>-tgdt:</div><div class='del'>-	.short	tgdt_end - tgdt		# gdt limit</div><div class='del'>-	.long	tgdt - r_base</div><div class='del'>-	.short 0</div><div class='add'>+	.balign	16</div><div class='add'>+	.globl tr_gdt</div><div class='add'>+tr_gdt:</div><div class='add'>+	.short	tr_gdt_end - tr_gdt - 1	# gdt limit</div><div class='add'>+	.long	pa_tr_gdt</div><div class='add'>+	.short	0</div><div class='ctx'> 	.quad	0x00cf9b000000ffff	# __KERNEL32_CS</div><div class='ctx'> 	.quad	0x00af9b000000ffff	# __KERNEL_CS</div><div class='ctx'> 	.quad	0x00cf93000000ffff	# __KERNEL_DS</div><div class='del'>-tgdt_end:</div><div class='add'>+tr_gdt_end:</div><div class='ctx'> </div><div class='del'>-	.balign 4</div><div class='del'>-startup_32_vector:</div><div class='del'>-	.long	startup_32 - r_base</div><div class='del'>-	.word	__KERNEL32_CS, 0</div><div class='add'>+	.bss</div><div class='add'>+	.balign	PAGE_SIZE</div><div class='add'>+GLOBAL(trampoline_pgd)		.space	PAGE_SIZE</div><div class='ctx'> </div><div class='del'>-	.balign 4</div><div class='del'>-startup_64_vector:</div><div class='del'>-	.long	startup_64 - r_base</div><div class='del'>-	.word	__KERNEL_CS, 0</div><div class='add'>+	.balign	8</div><div class='add'>+GLOBAL(trampoline_header)</div><div class='add'>+	tr_start:		.space	8</div><div class='add'>+	GLOBAL(tr_efer)		.space	8</div><div class='add'>+	GLOBAL(tr_cr4)		.space	4</div><div class='add'>+END(trampoline_header)</div><div class='ctx'> </div><div class='del'>-	.balign 4</div><div class='del'>-ENTRY(trampoline_status)</div><div class='del'>-	.long	0</div><div class='del'>-</div><div class='del'>-trampoline_stack:</div><div class='del'>-	.org 0x1000</div><div class='del'>-trampoline_stack_end:</div><div class='del'>-ENTRY(trampoline_level4_pgt)</div><div class='del'>-	.quad	level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE</div><div class='del'>-	.fill	510,8,0</div><div class='del'>-	.quad	level3_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE</div><div class='del'>-</div><div class='del'>-ENTRY(trampoline_end)</div><div class='add'>+#include "trampoline_common.S"</div><div class='head'>diff --git a/arch/x86/realmode/rm/trampoline_common.S b/arch/x86/realmode/rm/trampoline_common.S<br/>new file mode 100644<br/>index 000000000000..b1ecdb9692ad<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/trampoline_common.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/trampoline_common.S</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+	.section ".rodata","a"</div><div class='add'>+	.balign	16</div><div class='add'>+tr_idt: .fill 1, 6, 0</div><div class='add'>+</div><div class='add'>+	.bss</div><div class='add'>+	.balign	4</div><div class='add'>+GLOBAL(trampoline_status)	.space	4</div><div class='head'>diff --git a/arch/x86/realmode/rm/video-bios.c b/arch/x86/realmode/rm/video-bios.c<br/>new file mode 100644<br/>index 000000000000..848b25aaf11b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/video-bios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/video-bios.c</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include "../../boot/video-bios.c"</div><div class='head'>diff --git a/arch/x86/realmode/rm/video-mode.c b/arch/x86/realmode/rm/video-mode.c<br/>new file mode 100644<br/>index 000000000000..2a98b7e2368b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/video-mode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/video-mode.c</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include "../../boot/video-mode.c"</div><div class='head'>diff --git a/arch/x86/realmode/rm/video-vesa.c b/arch/x86/realmode/rm/video-vesa.c<br/>new file mode 100644<br/>index 000000000000..413edddb51e5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/video-vesa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/video-vesa.c</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include "../../boot/video-vesa.c"</div><div class='head'>diff --git a/arch/x86/realmode/rm/video-vga.c b/arch/x86/realmode/rm/video-vga.c<br/>new file mode 100644<br/>index 000000000000..3085f5c9d288<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/video-vga.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/video-vga.c</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include "../../boot/video-vga.c"</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/wakemain.c b/arch/x86/realmode/rm/wakemain.c<br/>index 883962d9eef2..91405d515ec6 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/wakemain.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/wakemain.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/wakemain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/wakemain.c</a></div><div class='hunk'>@@ -65,7 +65,8 @@ void main(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Kill machine if structures are wrong */</div><div class='ctx'> 	if (wakeup_header.real_magic != 0x12345678)</div><div class='del'>-		while (1);</div><div class='add'>+		while (1)</div><div class='add'>+			;</div><div class='ctx'> </div><div class='ctx'> 	if (wakeup_header.realmode_flags &amp; 4)</div><div class='ctx'> 		send_morse("...-");</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/wakeup.h b/arch/x86/realmode/rm/wakeup.h<br/>index 97a29e1430e3..9317e0042f24 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/wakeup.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/wakeup.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/wakeup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/wakeup.h</a></div><div class='hunk'>@@ -12,9 +12,8 @@</div><div class='ctx'> /* This must match data at wakeup.S */</div><div class='ctx'> struct wakeup_header {</div><div class='ctx'> 	u16 video_mode;		/* Video mode number */</div><div class='del'>-	u16 _jmp1;		/* ljmpl opcode, 32-bit only */</div><div class='ctx'> 	u32 pmode_entry;	/* Protected mode resume point, 32-bit only */</div><div class='del'>-	u16 _jmp2;		/* CS value, 32-bit only */</div><div class='add'>+	u16 pmode_cs;</div><div class='ctx'> 	u32 pmode_cr0;		/* Protected mode cr0 */</div><div class='ctx'> 	u32 pmode_cr3;		/* Protected mode cr3 */</div><div class='ctx'> 	u32 pmode_cr4;		/* Protected mode cr4 */</div><div class='hunk'>@@ -26,12 +25,6 @@ struct wakeup_header {</div><div class='ctx'> 	u32 pmode_behavior;	/* Wakeup routine behavior flags */</div><div class='ctx'> 	u32 realmode_flags;</div><div class='ctx'> 	u32 real_magic;</div><div class='del'>-	u16 trampoline_segment;	/* segment with trampoline code, 64-bit only */</div><div class='del'>-	u8  _pad1;</div><div class='del'>-	u8  wakeup_jmp;</div><div class='del'>-	u16 wakeup_jmp_off;</div><div class='del'>-	u16 wakeup_jmp_seg;</div><div class='del'>-	u64 wakeup_gdt[3];</div><div class='ctx'> 	u32 signature;		/* To check we have correct structure */</div><div class='ctx'> } __attribute__((__packed__));</div><div class='ctx'> </div><div class='hunk'>@@ -40,7 +33,6 @@ extern struct wakeup_header wakeup_header;</div><div class='ctx'> </div><div class='ctx'> #define WAKEUP_HEADER_OFFSET	8</div><div class='ctx'> #define WAKEUP_HEADER_SIGNATURE 0x51ee1111</div><div class='del'>-#define WAKEUP_END_SIGNATURE	0x65a22c82</div><div class='ctx'> </div><div class='ctx'> /* Wakeup behavior bits */</div><div class='ctx'> #define WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE     0</div><div class='head'>diff --git a/arch/x86/kernel/acpi/realmode/wakeup.S b/arch/x86/realmode/rm/wakeup_asm.S<br/>index b4fd836e4053..8905166b0bbb 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/kernel/acpi/realmode/wakeup.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/kernel/acpi/realmode/wakeup.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rm/wakeup_asm.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rm/wakeup_asm.S</a></div><div class='hunk'>@@ -1,50 +1,47 @@</div><div class='ctx'> /*</div><div class='ctx'>  * ACPI wakeup real mode startup stub</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='ctx'> #include &lt;asm/segment.h&gt;</div><div class='ctx'> #include &lt;asm/msr-index.h&gt;</div><div class='ctx'> #include &lt;asm/page_types.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable_types.h&gt;</div><div class='ctx'> #include &lt;asm/processor-flags.h&gt;</div><div class='add'>+#include "realmode.h"</div><div class='ctx'> #include "wakeup.h"</div><div class='ctx'> </div><div class='ctx'> 	.code16</div><div class='del'>-	.section ".jump", "ax"</div><div class='del'>-	.globl	_start</div><div class='del'>-_start:</div><div class='del'>-	cli</div><div class='del'>-	jmp	wakeup_code</div><div class='ctx'> </div><div class='ctx'> /* This should match the structure in wakeup.h */</div><div class='del'>-		.section ".header", "a"</div><div class='del'>-		.globl	wakeup_header</div><div class='del'>-wakeup_header:</div><div class='del'>-video_mode:	.short	0	/* Video mode number */</div><div class='del'>-pmode_return:	.byte	0x66, 0xea	/* ljmpl */</div><div class='del'>-		.long	0	/* offset goes here */</div><div class='del'>-		.short	__KERNEL_CS</div><div class='del'>-pmode_cr0:	.long	0	/* Saved %cr0 */</div><div class='del'>-pmode_cr3:	.long	0	/* Saved %cr3 */</div><div class='del'>-pmode_cr4:	.long	0	/* Saved %cr4 */</div><div class='del'>-pmode_efer:	.quad	0	/* Saved EFER */</div><div class='del'>-pmode_gdt:	.quad	0</div><div class='del'>-pmode_misc_en:	.quad	0	/* Saved MISC_ENABLE MSR */</div><div class='del'>-pmode_behavior:	.long	0	/* Wakeup behavior flags */</div><div class='del'>-realmode_flags:	.long	0</div><div class='del'>-real_magic:	.long	0</div><div class='del'>-trampoline_segment:	.word 0</div><div class='del'>-_pad1:		.byte	0</div><div class='del'>-wakeup_jmp:	.byte	0xea	/* ljmpw */</div><div class='del'>-wakeup_jmp_off:	.word	3f</div><div class='del'>-wakeup_jmp_seg:	.word	0</div><div class='del'>-wakeup_gdt:	.quad	0, 0, 0</div><div class='del'>-signature:	.long	WAKEUP_HEADER_SIGNATURE</div><div class='add'>+	.section ".data", "aw"</div><div class='add'>+</div><div class='add'>+	.balign	16</div><div class='add'>+GLOBAL(wakeup_header)</div><div class='add'>+	video_mode:	.short	0	/* Video mode number */</div><div class='add'>+	pmode_entry:	.long	0</div><div class='add'>+	pmode_cs:	.short	__KERNEL_CS</div><div class='add'>+	pmode_cr0:	.long	0	/* Saved %cr0 */</div><div class='add'>+	pmode_cr3:	.long	0	/* Saved %cr3 */</div><div class='add'>+	pmode_cr4:	.long	0	/* Saved %cr4 */</div><div class='add'>+	pmode_efer:	.quad	0	/* Saved EFER */</div><div class='add'>+	pmode_gdt:	.quad	0</div><div class='add'>+	pmode_misc_en:	.quad	0	/* Saved MISC_ENABLE MSR */</div><div class='add'>+	pmode_behavior:	.long	0	/* Wakeup behavior flags */</div><div class='add'>+	realmode_flags:	.long	0</div><div class='add'>+	real_magic:	.long	0</div><div class='add'>+	signature:	.long	WAKEUP_HEADER_SIGNATURE</div><div class='add'>+END(wakeup_header)</div><div class='ctx'> </div><div class='ctx'> 	.text</div><div class='ctx'> 	.code16</div><div class='del'>-wakeup_code:</div><div class='add'>+</div><div class='add'>+	.balign	16</div><div class='add'>+ENTRY(wakeup_start)</div><div class='add'>+	cli</div><div class='ctx'> 	cld</div><div class='ctx'> </div><div class='add'>+	LJMPW_RM(3f)</div><div class='add'>+3:</div><div class='ctx'> 	/* Apparently some dimwit BIOS programmers don't know how to</div><div class='ctx'> 	   program a PM to RM transition, and we might end up here with</div><div class='ctx'> 	   junk in the data segment descriptor registers.  The only way</div><div class='hunk'>@@ -54,8 +51,7 @@ wakeup_code:</div><div class='ctx'> 	movl	%cr0, %eax</div><div class='ctx'> 	orb	$X86_CR0_PE, %al</div><div class='ctx'> 	movl	%eax, %cr0</div><div class='del'>-	jmp	1f</div><div class='del'>-1:	ljmpw	$8, $2f</div><div class='add'>+	ljmpw	$8, $2f</div><div class='ctx'> 2:</div><div class='ctx'> 	movw	%cx, %ds</div><div class='ctx'> 	movw	%cx, %es</div><div class='hunk'>@@ -65,16 +61,18 @@ wakeup_code:</div><div class='ctx'> </div><div class='ctx'> 	andb	$~X86_CR0_PE, %al</div><div class='ctx'> 	movl	%eax, %cr0</div><div class='del'>-	jmp	wakeup_jmp</div><div class='add'>+	LJMPW_RM(3f)</div><div class='ctx'> 3:</div><div class='ctx'> 	/* Set up segments */</div><div class='ctx'> 	movw	%cs, %ax</div><div class='add'>+	movw	%ax, %ss</div><div class='add'>+	movl	$rm_stack_end, %esp</div><div class='ctx'> 	movw	%ax, %ds</div><div class='ctx'> 	movw	%ax, %es</div><div class='del'>-	movw	%ax, %ss</div><div class='del'>-	lidtl	wakeup_idt</div><div class='add'>+	movw	%ax, %fs</div><div class='add'>+	movw	%ax, %gs</div><div class='ctx'> </div><div class='del'>-	movl	$wakeup_stack_end, %esp</div><div class='add'>+	lidtl	wakeup_idt</div><div class='ctx'> </div><div class='ctx'> 	/* Clear the EFLAGS */</div><div class='ctx'> 	pushl	$0</div><div class='hunk'>@@ -87,7 +85,7 @@ wakeup_code:</div><div class='ctx'> </div><div class='ctx'> 	/* Check we really have everything... */</div><div class='ctx'> 	movl	end_signature, %eax</div><div class='del'>-	cmpl	$WAKEUP_END_SIGNATURE, %eax</div><div class='add'>+	cmpl	$REALMODE_END_SIGNATURE, %eax</div><div class='ctx'> 	jne	bogus_real_magic</div><div class='ctx'> </div><div class='ctx'> 	/* Call the C code */</div><div class='hunk'>@@ -128,14 +126,13 @@ wakeup_code:</div><div class='ctx'> 	lgdtl	pmode_gdt</div><div class='ctx'> </div><div class='ctx'> 	/* This really couldn't... */</div><div class='del'>-	movl	pmode_cr0, %eax</div><div class='del'>-	movl	%eax, %cr0</div><div class='del'>-	jmp	pmode_return</div><div class='add'>+	movl	pmode_entry, %eax</div><div class='add'>+	movl	pmode_cr0, %ecx</div><div class='add'>+	movl	%ecx, %cr0</div><div class='add'>+	ljmpl	$__KERNEL_CS, $pa_startup_32</div><div class='add'>+	/* -&gt; jmp *%eax in trampoline_32.S */</div><div class='ctx'> #else</div><div class='del'>-	pushw	$0</div><div class='del'>-	pushw	trampoline_segment</div><div class='del'>-	pushw	$0</div><div class='del'>-	lret</div><div class='add'>+	jmp	trampoline_start</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> bogus_real_magic:</div><div class='hunk'>@@ -143,28 +140,38 @@ bogus_real_magic:</div><div class='ctx'> 	hlt</div><div class='ctx'> 	jmp	1b</div><div class='ctx'> </div><div class='del'>-	.data</div><div class='add'>+	.section ".rodata","a"</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set up the wakeup GDT.  We set these up as Big Real Mode,</div><div class='add'>+	 * that is, with limits set to 4 GB.  At least the Lenovo</div><div class='add'>+	 * Thinkpad X61 is known to need this for the video BIOS</div><div class='add'>+	 * initialization quirk to work; this is likely to also</div><div class='add'>+	 * be the case for other laptops or integrated video devices.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	.balign	16</div><div class='add'>+GLOBAL(wakeup_gdt)</div><div class='add'>+	.word	3*8-1		/* Self-descriptor */</div><div class='add'>+	.long	pa_wakeup_gdt</div><div class='add'>+	.word	0</div><div class='add'>+</div><div class='add'>+	.word	0xffff		/* 16-bit code segment @ real_mode_base */</div><div class='add'>+	.long	0x9b000000 + pa_real_mode_base</div><div class='add'>+	.word	0x008f		/* big real mode */</div><div class='add'>+</div><div class='add'>+	.word	0xffff		/* 16-bit data segment @ real_mode_base */</div><div class='add'>+	.long	0x93000000 + pa_real_mode_base</div><div class='add'>+	.word	0x008f		/* big real mode */</div><div class='add'>+END(wakeup_gdt)</div><div class='add'>+</div><div class='add'>+	.section ".rodata","a"</div><div class='ctx'> 	.balign	8</div><div class='ctx'> </div><div class='ctx'> 	/* This is the standard real-mode IDT */</div><div class='del'>-wakeup_idt:</div><div class='add'>+	.balign	16</div><div class='add'>+GLOBAL(wakeup_idt)</div><div class='ctx'> 	.word	0xffff		/* limit */</div><div class='ctx'> 	.long	0		/* address */</div><div class='ctx'> 	.word	0</div><div class='del'>-</div><div class='del'>-	.globl	HEAP, heap_end</div><div class='del'>-HEAP:</div><div class='del'>-	.long	wakeup_heap</div><div class='del'>-heap_end:</div><div class='del'>-	.long	wakeup_stack</div><div class='del'>-</div><div class='del'>-	.bss</div><div class='del'>-wakeup_heap:</div><div class='del'>-	.space	2048</div><div class='del'>-wakeup_stack:</div><div class='del'>-	.space	2048</div><div class='del'>-wakeup_stack_end:</div><div class='del'>-</div><div class='del'>-	.section ".signature","a"</div><div class='del'>-end_signature:</div><div class='del'>-	.long	WAKEUP_END_SIGNATURE</div><div class='add'>+END(wakeup_idt)</div><div class='head'>diff --git a/arch/x86/realmode/rmpiggy.S b/arch/x86/realmode/rmpiggy.S<br/>new file mode 100644<br/>index 000000000000..204c6ece0e97<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/realmode/rmpiggy.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/realmode/rmpiggy.S</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+/*</div><div class='add'>+ * Wrapper script for the realmode binary as a transport object</div><div class='add'>+ * before copying to low memory.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/page_types.h&gt;</div><div class='add'>+</div><div class='add'>+	.section ".init.data","aw"</div><div class='add'>+</div><div class='add'>+	.balign PAGE_SIZE</div><div class='add'>+</div><div class='add'>+GLOBAL(real_mode_blob)</div><div class='add'>+	.incbin	"arch/x86/realmode/rm/realmode.bin"</div><div class='add'>+END(real_mode_blob)</div><div class='add'>+</div><div class='add'>+GLOBAL(real_mode_blob_end);</div><div class='add'>+</div><div class='add'>+GLOBAL(real_mode_relocs)</div><div class='add'>+	.incbin	"arch/x86/realmode/rm/realmode.relocs"</div><div class='add'>+END(real_mode_relocs)</div><div class='head'>diff --git a/arch/x86/syscalls/syscall_32.tbl b/arch/x86/syscalls/syscall_32.tbl<br/>index 29f9f0554f7d..7a35a6e71d44 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/syscalls/syscall_32.tbl?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/syscalls/syscall_32.tbl</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/syscalls/syscall_32.tbl?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/syscalls/syscall_32.tbl</a></div><div class='hunk'>@@ -355,3 +355,4 @@</div><div class='ctx'> 346	i386	setns			sys_setns</div><div class='ctx'> 347	i386	process_vm_readv	sys_process_vm_readv		compat_sys_process_vm_readv</div><div class='ctx'> 348	i386	process_vm_writev	sys_process_vm_writev		compat_sys_process_vm_writev</div><div class='add'>+349	i386	kcmp			sys_kcmp</div><div class='head'>diff --git a/arch/x86/syscalls/syscall_64.tbl b/arch/x86/syscalls/syscall_64.tbl<br/>index dd29a9ea27c5..51171aeff0dc 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/syscalls/syscall_64.tbl?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/syscalls/syscall_64.tbl</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/syscalls/syscall_64.tbl?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/syscalls/syscall_64.tbl</a></div><div class='hunk'>@@ -318,6 +318,8 @@</div><div class='ctx'> 309	common	getcpu			sys_getcpu</div><div class='ctx'> 310	64	process_vm_readv	sys_process_vm_readv</div><div class='ctx'> 311	64	process_vm_writev	sys_process_vm_writev</div><div class='add'>+312	64	kcmp			sys_kcmp</div><div class='add'>+</div><div class='ctx'> #</div><div class='ctx'> # x32-specific system call numbers start at 512 to avoid cache impact</div><div class='ctx'> # for native 64-bit operation.</div><div class='head'>diff --git a/arch/x86/tools/.gitignore b/arch/x86/tools/.gitignore<br/>new file mode 100644<br/>index 000000000000..be0ed065249b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/tools/.gitignore?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/tools/.gitignore</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+relocs</div><div class='head'>diff --git a/arch/x86/tools/Makefile b/arch/x86/tools/Makefile<br/>index d511aa97533a..733057b435b0 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/tools/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/tools/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/tools/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/tools/Makefile</a></div><div class='hunk'>@@ -36,3 +36,7 @@ HOSTCFLAGS_insn_sanity.o := -Wall -I$(objtree)/arch/x86/lib/ -I$(srctree)/arch/x</div><div class='ctx'> $(obj)/test_get_len.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/inat.c $(srctree)/arch/x86/include/asm/inat_types.h $(srctree)/arch/x86/include/asm/inat.h $(srctree)/arch/x86/include/asm/insn.h $(objtree)/arch/x86/lib/inat-tables.c</div><div class='ctx'> </div><div class='ctx'> $(obj)/insn_sanity.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/inat.c $(srctree)/arch/x86/include/asm/inat_types.h $(srctree)/arch/x86/include/asm/inat.h $(srctree)/arch/x86/include/asm/insn.h $(objtree)/arch/x86/lib/inat-tables.c</div><div class='add'>+</div><div class='add'>+HOST_EXTRACFLAGS += -I$(srctree)/tools/include</div><div class='add'>+hostprogs-y	+= relocs</div><div class='add'>+relocs: $(obj)/relocs</div><div class='head'>diff --git a/arch/x86/tools/gen-insn-attr-x86.awk b/arch/x86/tools/gen-insn-attr-x86.awk<br/>index 5f6a5b6c3a15..ddcf39b1a18d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/tools/gen-insn-attr-x86.awk?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/tools/gen-insn-attr-x86.awk</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/tools/gen-insn-attr-x86.awk?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/tools/gen-insn-attr-x86.awk</a></div><div class='hunk'>@@ -66,9 +66,10 @@ BEGIN {</div><div class='ctx'> 	rex_expr = "^REX(\\.[XRWB]+)*"</div><div class='ctx'> 	fpu_expr = "^ESC" # TODO</div><div class='ctx'> </div><div class='del'>-	lprefix1_expr = "\\(66\\)"</div><div class='add'>+	lprefix1_expr = "\\((66|!F3)\\)"</div><div class='ctx'> 	lprefix2_expr = "\\(F3\\)"</div><div class='del'>-	lprefix3_expr = "\\(F2\\)"</div><div class='add'>+	lprefix3_expr = "\\((F2|!F3)\\)"</div><div class='add'>+	lprefix_expr = "\\((66|F2|F3)\\)"</div><div class='ctx'> 	max_lprefix = 4</div><div class='ctx'> </div><div class='ctx'> 	# All opcodes starting with lower-case 'v' or with (v1) superscript</div><div class='hunk'>@@ -333,13 +334,16 @@ function convert_operands(count,opnd,       i,j,imm,mod)</div><div class='ctx'> 		if (match(ext, lprefix1_expr)) {</div><div class='ctx'> 			lptable1[idx] = add_flags(lptable1[idx],flags)</div><div class='ctx'> 			variant = "INAT_VARIANT"</div><div class='del'>-		} else if (match(ext, lprefix2_expr)) {</div><div class='add'>+		}</div><div class='add'>+		if (match(ext, lprefix2_expr)) {</div><div class='ctx'> 			lptable2[idx] = add_flags(lptable2[idx],flags)</div><div class='ctx'> 			variant = "INAT_VARIANT"</div><div class='del'>-		} else if (match(ext, lprefix3_expr)) {</div><div class='add'>+		}</div><div class='add'>+		if (match(ext, lprefix3_expr)) {</div><div class='ctx'> 			lptable3[idx] = add_flags(lptable3[idx],flags)</div><div class='ctx'> 			variant = "INAT_VARIANT"</div><div class='del'>-		} else {</div><div class='add'>+		}</div><div class='add'>+		if (!match(ext, lprefix_expr)){</div><div class='ctx'> 			table[idx] = add_flags(table[idx],flags)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/boot/compressed/relocs.c b/arch/x86/tools/relocs.c<br/>index d3c0b0277666..5a1847d61930 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/boot/compressed/relocs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/boot/compressed/relocs.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/tools/relocs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/tools/relocs.c</a></div><div class='hunk'>@@ -18,6 +18,8 @@ static void die(char *fmt, ...);</div><div class='ctx'> static Elf32_Ehdr ehdr;</div><div class='ctx'> static unsigned long reloc_count, reloc_idx;</div><div class='ctx'> static unsigned long *relocs;</div><div class='add'>+static unsigned long reloc16_count, reloc16_idx;</div><div class='add'>+static unsigned long *relocs16;</div><div class='ctx'> </div><div class='ctx'> struct section {</div><div class='ctx'> 	Elf32_Shdr     shdr;</div><div class='hunk'>@@ -28,52 +30,105 @@ struct section {</div><div class='ctx'> };</div><div class='ctx'> static struct section *secs;</div><div class='ctx'> </div><div class='add'>+enum symtype {</div><div class='add'>+	S_ABS,</div><div class='add'>+	S_REL,</div><div class='add'>+	S_SEG,</div><div class='add'>+	S_LIN,</div><div class='add'>+	S_NSYMTYPES</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const sym_regex_kernel[S_NSYMTYPES] = {</div><div class='ctx'> /*</div><div class='ctx'>  * Following symbols have been audited. There values are constant and do</div><div class='ctx'>  * not change if bzImage is loaded at a different physical address than</div><div class='ctx'>  * the address for which it has been compiled. Don't warn user about</div><div class='ctx'>  * absolute relocations present w.r.t these symbols.</div><div class='ctx'>  */</div><div class='del'>-static const char abs_sym_regex[] =</div><div class='add'>+	[S_ABS] =</div><div class='ctx'> 	"^(xen_irq_disable_direct_reloc$|"</div><div class='ctx'> 	"xen_save_fl_direct_reloc$|"</div><div class='ctx'> 	"VDSO|"</div><div class='del'>-	"__crc_)";</div><div class='del'>-static regex_t abs_sym_regex_c;</div><div class='del'>-static int is_abs_reloc(const char *sym_name)</div><div class='del'>-{</div><div class='del'>-	return !regexec(&amp;abs_sym_regex_c, sym_name, 0, NULL, 0);</div><div class='del'>-}</div><div class='add'>+	"__crc_)",</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * These symbols are known to be relative, even if the linker marks them</div><div class='ctx'>  * as absolute (typically defined outside any section in the linker script.)</div><div class='ctx'>  */</div><div class='del'>-static const char rel_sym_regex[] =</div><div class='del'>-	"^_end$";</div><div class='del'>-static regex_t rel_sym_regex_c;</div><div class='del'>-static int is_rel_reloc(const char *sym_name)</div><div class='add'>+	[S_REL] =</div><div class='add'>+	"^(__init_(begin|end)|"</div><div class='add'>+	"__x86_cpu_dev_(start|end)|"</div><div class='add'>+	"(__parainstructions|__alt_instructions)(|_end)|"</div><div class='add'>+	"(__iommu_table|__apicdrivers|__smp_locks)(|_end)|"</div><div class='add'>+	"__(start|end)_pci_.*|"</div><div class='add'>+	"__(start|end)_builtin_fw|"</div><div class='add'>+	"__(start|stop)___ksymtab(|_gpl|_unused|_unused_gpl|_gpl_future)|"</div><div class='add'>+	"__(start|stop)___kcrctab(|_gpl|_unused|_unused_gpl|_gpl_future)|"</div><div class='add'>+	"__(start|stop)___param|"</div><div class='add'>+	"__(start|stop)___modver|"</div><div class='add'>+	"__(start|stop)___bug_table|"</div><div class='add'>+	"__tracedata_(start|end)|"</div><div class='add'>+	"__(start|stop)_notes|"</div><div class='add'>+	"__end_rodata|"</div><div class='add'>+	"__initramfs_start|"</div><div class='add'>+	"(jiffies|jiffies_64)|"</div><div class='add'>+	"_end)$"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static const char * const sym_regex_realmode[S_NSYMTYPES] = {</div><div class='add'>+/*</div><div class='add'>+ * These symbols are known to be relative, even if the linker marks them</div><div class='add'>+ * as absolute (typically defined outside any section in the linker script.)</div><div class='add'>+ */</div><div class='add'>+	[S_REL] =</div><div class='add'>+	"^pa_",</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * These are 16-bit segment symbols when compiling 16-bit code.</div><div class='add'>+ */</div><div class='add'>+	[S_SEG] =</div><div class='add'>+	"^real_mode_seg$",</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * These are offsets belonging to segments, as opposed to linear addresses,</div><div class='add'>+ * when compiling 16-bit code.</div><div class='add'>+ */</div><div class='add'>+	[S_LIN] =</div><div class='add'>+	"^pa_",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const *sym_regex;</div><div class='add'>+</div><div class='add'>+static regex_t sym_regex_c[S_NSYMTYPES];</div><div class='add'>+static int is_reloc(enum symtype type, const char *sym_name)</div><div class='ctx'> {</div><div class='del'>-	return !regexec(&amp;rel_sym_regex_c, sym_name, 0, NULL, 0);</div><div class='add'>+	return sym_regex[type] &amp;&amp;</div><div class='add'>+		!regexec(&amp;sym_regex_c[type], sym_name, 0, NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void regex_init(void)</div><div class='add'>+static void regex_init(int use_real_mode)</div><div class='ctx'> {</div><div class='ctx'>         char errbuf[128];</div><div class='ctx'>         int err;</div><div class='del'>-	</div><div class='del'>-        err = regcomp(&amp;abs_sym_regex_c, abs_sym_regex,</div><div class='del'>-                      REG_EXTENDED|REG_NOSUB);</div><div class='del'>-        if (err) {</div><div class='del'>-                regerror(err, &amp;abs_sym_regex_c, errbuf, sizeof errbuf);</div><div class='del'>-                die("%s", errbuf);</div><div class='del'>-        }</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (use_real_mode)</div><div class='add'>+		sym_regex = sym_regex_realmode;</div><div class='add'>+	else</div><div class='add'>+		sym_regex = sym_regex_kernel;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; S_NSYMTYPES; i++) {</div><div class='add'>+		if (!sym_regex[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = regcomp(&amp;sym_regex_c[i], sym_regex[i],</div><div class='add'>+			      REG_EXTENDED|REG_NOSUB);</div><div class='ctx'> </div><div class='del'>-        err = regcomp(&amp;rel_sym_regex_c, rel_sym_regex,</div><div class='del'>-                      REG_EXTENDED|REG_NOSUB);</div><div class='del'>-        if (err) {</div><div class='del'>-                regerror(err, &amp;rel_sym_regex_c, errbuf, sizeof errbuf);</div><div class='del'>-                die("%s", errbuf);</div><div class='add'>+		if (err) {</div><div class='add'>+			regerror(err, &amp;sym_regex_c[i], errbuf, sizeof errbuf);</div><div class='add'>+			die("%s", errbuf);</div><div class='add'>+		}</div><div class='ctx'>         }</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -154,6 +209,10 @@ static const char *rel_type(unsigned type)</div><div class='ctx'> 		REL_TYPE(R_386_RELATIVE),</div><div class='ctx'> 		REL_TYPE(R_386_GOTOFF),</div><div class='ctx'> 		REL_TYPE(R_386_GOTPC),</div><div class='add'>+		REL_TYPE(R_386_8),</div><div class='add'>+		REL_TYPE(R_386_PC8),</div><div class='add'>+		REL_TYPE(R_386_16),</div><div class='add'>+		REL_TYPE(R_386_PC16),</div><div class='ctx'> #undef REL_TYPE</div><div class='ctx'> 	};</div><div class='ctx'> 	const char *name = "unknown type rel type name";</div><div class='hunk'>@@ -189,7 +248,7 @@ static const char *sym_name(const char *sym_strtab, Elf32_Sym *sym)</div><div class='ctx'> 		name = sym_strtab + sym-&gt;st_name;</div><div class='ctx'> 	}</div><div class='ctx'> 	else {</div><div class='del'>-		name = sec_name(secs[sym-&gt;st_shndx].shdr.sh_name);</div><div class='add'>+		name = sec_name(sym-&gt;st_shndx);</div><div class='ctx'> 	}</div><div class='ctx'> 	return name;</div><div class='ctx'> }</div><div class='hunk'>@@ -403,13 +462,11 @@ static void print_absolute_symbols(void)</div><div class='ctx'> 	for (i = 0; i &lt; ehdr.e_shnum; i++) {</div><div class='ctx'> 		struct section *sec = &amp;secs[i];</div><div class='ctx'> 		char *sym_strtab;</div><div class='del'>-		Elf32_Sym *sh_symtab;</div><div class='ctx'> 		int j;</div><div class='ctx'> </div><div class='ctx'> 		if (sec-&gt;shdr.sh_type != SHT_SYMTAB) {</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		sh_symtab = sec-&gt;symtab;</div><div class='ctx'> 		sym_strtab = sec-&gt;link-&gt;strtab;</div><div class='ctx'> 		for (j = 0; j &lt; sec-&gt;shdr.sh_size/sizeof(Elf32_Sym); j++) {</div><div class='ctx'> 			Elf32_Sym *sym;</div><div class='hunk'>@@ -474,7 +531,7 @@ static void print_absolute_relocs(void)</div><div class='ctx'> 			 * Before warning check if this absolute symbol</div><div class='ctx'> 			 * relocation is harmless.</div><div class='ctx'> 			 */</div><div class='del'>-			if (is_abs_reloc(name) || is_rel_reloc(name))</div><div class='add'>+			if (is_reloc(S_ABS, name) || is_reloc(S_REL, name))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			if (!printed) {</div><div class='hunk'>@@ -498,7 +555,8 @@ static void print_absolute_relocs(void)</div><div class='ctx'> 		printf("\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym))</div><div class='add'>+static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym),</div><div class='add'>+			int use_real_mode)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	/* Walk through the relocations */</div><div class='hunk'>@@ -523,30 +581,67 @@ static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym))</div><div class='ctx'> 			Elf32_Rel *rel;</div><div class='ctx'> 			Elf32_Sym *sym;</div><div class='ctx'> 			unsigned r_type;</div><div class='add'>+			const char *symname;</div><div class='add'>+			int shn_abs;</div><div class='add'>+</div><div class='ctx'> 			rel = &amp;sec-&gt;reltab[j];</div><div class='ctx'> 			sym = &amp;sh_symtab[ELF32_R_SYM(rel-&gt;r_info)];</div><div class='ctx'> 			r_type = ELF32_R_TYPE(rel-&gt;r_info);</div><div class='del'>-			/* Don't visit relocations to absolute symbols */</div><div class='del'>-			if (sym-&gt;st_shndx == SHN_ABS &amp;&amp;</div><div class='del'>-			    !is_rel_reloc(sym_name(sym_strtab, sym))) {</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='add'>+</div><div class='add'>+			shn_abs = sym-&gt;st_shndx == SHN_ABS;</div><div class='add'>+</div><div class='ctx'> 			switch (r_type) {</div><div class='ctx'> 			case R_386_NONE:</div><div class='ctx'> 			case R_386_PC32:</div><div class='add'>+			case R_386_PC16:</div><div class='add'>+			case R_386_PC8:</div><div class='ctx'> 				/*</div><div class='ctx'> 				 * NONE can be ignored and and PC relative</div><div class='ctx'> 				 * relocations don't need to be adjusted.</div><div class='ctx'> 				 */</div><div class='ctx'> 				break;</div><div class='add'>+</div><div class='add'>+			case R_386_16:</div><div class='add'>+				symname = sym_name(sym_strtab, sym);</div><div class='add'>+				if (!use_real_mode)</div><div class='add'>+					goto bad;</div><div class='add'>+				if (shn_abs) {</div><div class='add'>+					if (is_reloc(S_ABS, symname))</div><div class='add'>+						break;</div><div class='add'>+					else if (!is_reloc(S_SEG, symname))</div><div class='add'>+						goto bad;</div><div class='add'>+				} else {</div><div class='add'>+					if (is_reloc(S_LIN, symname))</div><div class='add'>+						goto bad;</div><div class='add'>+					else</div><div class='add'>+						break;</div><div class='add'>+				}</div><div class='add'>+				visit(rel, sym);</div><div class='add'>+				break;</div><div class='add'>+</div><div class='ctx'> 			case R_386_32:</div><div class='del'>-				/* Visit relocations that need to be adjusted */</div><div class='add'>+				symname = sym_name(sym_strtab, sym);</div><div class='add'>+				if (shn_abs) {</div><div class='add'>+					if (is_reloc(S_ABS, symname))</div><div class='add'>+						break;</div><div class='add'>+					else if (!is_reloc(S_REL, symname))</div><div class='add'>+						goto bad;</div><div class='add'>+				} else {</div><div class='add'>+					if (use_real_mode &amp;&amp;</div><div class='add'>+					    !is_reloc(S_LIN, symname))</div><div class='add'>+						break;</div><div class='add'>+				}</div><div class='ctx'> 				visit(rel, sym);</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='ctx'> 				die("Unsupported relocation type: %s (%d)\n",</div><div class='ctx'> 				    rel_type(r_type), r_type);</div><div class='ctx'> 				break;</div><div class='add'>+			bad:</div><div class='add'>+				symname = sym_name(sym_strtab, sym);</div><div class='add'>+				die("Invalid %s %s relocation: %s\n",</div><div class='add'>+				    shn_abs ? "absolute" : "relative",</div><div class='add'>+				    rel_type(r_type), symname);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -554,13 +649,19 @@ static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym))</div><div class='ctx'> </div><div class='ctx'> static void count_reloc(Elf32_Rel *rel, Elf32_Sym *sym)</div><div class='ctx'> {</div><div class='del'>-	reloc_count += 1;</div><div class='add'>+	if (ELF32_R_TYPE(rel-&gt;r_info) == R_386_16)</div><div class='add'>+		reloc16_count++;</div><div class='add'>+	else</div><div class='add'>+		reloc_count++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void collect_reloc(Elf32_Rel *rel, Elf32_Sym *sym)</div><div class='ctx'> {</div><div class='ctx'> 	/* Remember the address that needs to be adjusted. */</div><div class='del'>-	relocs[reloc_idx++] = rel-&gt;r_offset;</div><div class='add'>+	if (ELF32_R_TYPE(rel-&gt;r_info) == R_386_16)</div><div class='add'>+		relocs16[reloc16_idx++] = rel-&gt;r_offset;</div><div class='add'>+	else</div><div class='add'>+		relocs[reloc_idx++] = rel-&gt;r_offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cmp_relocs(const void *va, const void *vb)</div><div class='hunk'>@@ -570,23 +671,41 @@ static int cmp_relocs(const void *va, const void *vb)</div><div class='ctx'> 	return (*a == *b)? 0 : (*a &gt; *b)? 1 : -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void emit_relocs(int as_text)</div><div class='add'>+static int write32(unsigned int v, FILE *f)</div><div class='add'>+{</div><div class='add'>+	unsigned char buf[4];</div><div class='add'>+</div><div class='add'>+	put_unaligned_le32(v, buf);</div><div class='add'>+	return fwrite(buf, 1, 4, f) == 4 ? 0 : -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emit_relocs(int as_text, int use_real_mode)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	/* Count how many relocations I have and allocate space for them. */</div><div class='ctx'> 	reloc_count = 0;</div><div class='del'>-	walk_relocs(count_reloc);</div><div class='add'>+	walk_relocs(count_reloc, use_real_mode);</div><div class='ctx'> 	relocs = malloc(reloc_count * sizeof(relocs[0]));</div><div class='ctx'> 	if (!relocs) {</div><div class='ctx'> 		die("malloc of %d entries for relocs failed\n",</div><div class='ctx'> 			reloc_count);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	relocs16 = malloc(reloc16_count * sizeof(relocs[0]));</div><div class='add'>+	if (!relocs16) {</div><div class='add'>+		die("malloc of %d entries for relocs16 failed\n",</div><div class='add'>+			reloc16_count);</div><div class='add'>+	}</div><div class='ctx'> 	/* Collect up the relocations */</div><div class='ctx'> 	reloc_idx = 0;</div><div class='del'>-	walk_relocs(collect_reloc);</div><div class='add'>+	walk_relocs(collect_reloc, use_real_mode);</div><div class='add'>+</div><div class='add'>+	if (reloc16_count &amp;&amp; !use_real_mode)</div><div class='add'>+		die("Segment relocations found but --realmode not specified\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Order the relocations for more efficient processing */</div><div class='ctx'> 	qsort(relocs, reloc_count, sizeof(relocs[0]), cmp_relocs);</div><div class='add'>+	qsort(relocs16, reloc16_count, sizeof(relocs16[0]), cmp_relocs);</div><div class='ctx'> </div><div class='ctx'> 	/* Print the relocations */</div><div class='ctx'> 	if (as_text) {</div><div class='hunk'>@@ -595,58 +714,83 @@ static void emit_relocs(int as_text)</div><div class='ctx'> 		 */</div><div class='ctx'> 		printf(".section \".data.reloc\",\"a\"\n");</div><div class='ctx'> 		printf(".balign 4\n");</div><div class='del'>-		for (i = 0; i &lt; reloc_count; i++) {</div><div class='del'>-			printf("\t .long 0x%08lx\n", relocs[i]);</div><div class='add'>+		if (use_real_mode) {</div><div class='add'>+			printf("\t.long %lu\n", reloc16_count);</div><div class='add'>+			for (i = 0; i &lt; reloc16_count; i++)</div><div class='add'>+				printf("\t.long 0x%08lx\n", relocs16[i]);</div><div class='add'>+			printf("\t.long %lu\n", reloc_count);</div><div class='add'>+			for (i = 0; i &lt; reloc_count; i++) {</div><div class='add'>+				printf("\t.long 0x%08lx\n", relocs[i]);</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			/* Print a stop */</div><div class='add'>+			printf("\t.long 0x%08lx\n", (unsigned long)0);</div><div class='add'>+			for (i = 0; i &lt; reloc_count; i++) {</div><div class='add'>+				printf("\t.long 0x%08lx\n", relocs[i]);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		printf("\n");</div><div class='ctx'> 	}</div><div class='ctx'> 	else {</div><div class='del'>-		unsigned char buf[4];</div><div class='del'>-		/* Print a stop */</div><div class='del'>-		fwrite("\0\0\0\0", 4, 1, stdout);</div><div class='del'>-		/* Now print each relocation */</div><div class='del'>-		for (i = 0; i &lt; reloc_count; i++) {</div><div class='del'>-			put_unaligned_le32(relocs[i], buf);</div><div class='del'>-			fwrite(buf, 4, 1, stdout);</div><div class='add'>+		if (use_real_mode) {</div><div class='add'>+			write32(reloc16_count, stdout);</div><div class='add'>+			for (i = 0; i &lt; reloc16_count; i++)</div><div class='add'>+				write32(relocs16[i], stdout);</div><div class='add'>+			write32(reloc_count, stdout);</div><div class='add'>+</div><div class='add'>+			/* Now print each relocation */</div><div class='add'>+			for (i = 0; i &lt; reloc_count; i++)</div><div class='add'>+				write32(relocs[i], stdout);</div><div class='add'>+		} else {</div><div class='add'>+			/* Print a stop */</div><div class='add'>+			write32(0, stdout);</div><div class='add'>+</div><div class='add'>+			/* Now print each relocation */</div><div class='add'>+			for (i = 0; i &lt; reloc_count; i++) {</div><div class='add'>+				write32(relocs[i], stdout);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void usage(void)</div><div class='ctx'> {</div><div class='del'>-	die("relocs [--abs-syms |--abs-relocs | --text] vmlinux\n");</div><div class='add'>+	die("relocs [--abs-syms|--abs-relocs|--text|--realmode] vmlinux\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int main(int argc, char **argv)</div><div class='ctx'> {</div><div class='ctx'> 	int show_absolute_syms, show_absolute_relocs;</div><div class='del'>-	int as_text;</div><div class='add'>+	int as_text, use_real_mode;</div><div class='ctx'> 	const char *fname;</div><div class='ctx'> 	FILE *fp;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	regex_init();</div><div class='del'>-</div><div class='ctx'> 	show_absolute_syms = 0;</div><div class='ctx'> 	show_absolute_relocs = 0;</div><div class='ctx'> 	as_text = 0;</div><div class='add'>+	use_real_mode = 0;</div><div class='ctx'> 	fname = NULL;</div><div class='ctx'> 	for (i = 1; i &lt; argc; i++) {</div><div class='ctx'> 		char *arg = argv[i];</div><div class='ctx'> 		if (*arg == '-') {</div><div class='del'>-			if (strcmp(argv[1], "--abs-syms") == 0) {</div><div class='add'>+			if (strcmp(arg, "--abs-syms") == 0) {</div><div class='ctx'> 				show_absolute_syms = 1;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='del'>-</div><div class='del'>-			if (strcmp(argv[1], "--abs-relocs") == 0) {</div><div class='add'>+			if (strcmp(arg, "--abs-relocs") == 0) {</div><div class='ctx'> 				show_absolute_relocs = 1;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='del'>-			else if (strcmp(argv[1], "--text") == 0) {</div><div class='add'>+			if (strcmp(arg, "--text") == 0) {</div><div class='ctx'> 				as_text = 1;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='add'>+			if (strcmp(arg, "--realmode") == 0) {</div><div class='add'>+				use_real_mode = 1;</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		else if (!fname) {</div><div class='ctx'> 			fname = arg;</div><div class='hunk'>@@ -657,6 +801,7 @@ int main(int argc, char **argv)</div><div class='ctx'> 	if (!fname) {</div><div class='ctx'> 		usage();</div><div class='ctx'> 	}</div><div class='add'>+	regex_init(use_real_mode);</div><div class='ctx'> 	fp = fopen(fname, "r");</div><div class='ctx'> 	if (!fp) {</div><div class='ctx'> 		die("Cannot open %s: %s\n",</div><div class='hunk'>@@ -675,6 +820,6 @@ int main(int argc, char **argv)</div><div class='ctx'> 		print_absolute_relocs();</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	emit_relocs(as_text);</div><div class='add'>+	emit_relocs(as_text, use_real_mode);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/um/asm/elf.h b/arch/x86/um/asm/elf.h<br/>index f3b0633b69a1..0e07adc8cbe4 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/asm/elf.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/asm/elf.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/asm/elf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/asm/elf.h</a></div><div class='hunk'>@@ -34,25 +34,25 @@</div><div class='ctx'> #define ELF_ARCH        EM_386</div><div class='ctx'> </div><div class='ctx'> #define ELF_PLAT_INIT(regs, load_addr) do { \</div><div class='del'>-	PT_REGS_EBX(regs) = 0; \</div><div class='del'>-	PT_REGS_ECX(regs) = 0; \</div><div class='del'>-	PT_REGS_EDX(regs) = 0; \</div><div class='del'>-	PT_REGS_ESI(regs) = 0; \</div><div class='del'>-	PT_REGS_EDI(regs) = 0; \</div><div class='del'>-	PT_REGS_EBP(regs) = 0; \</div><div class='del'>-	PT_REGS_EAX(regs) = 0; \</div><div class='add'>+	PT_REGS_BX(regs) = 0; \</div><div class='add'>+	PT_REGS_CX(regs) = 0; \</div><div class='add'>+	PT_REGS_DX(regs) = 0; \</div><div class='add'>+	PT_REGS_SI(regs) = 0; \</div><div class='add'>+	PT_REGS_DI(regs) = 0; \</div><div class='add'>+	PT_REGS_BP(regs) = 0; \</div><div class='add'>+	PT_REGS_AX(regs) = 0; \</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='ctx'> /* Shamelessly stolen from include/asm-i386/elf.h */</div><div class='ctx'> </div><div class='ctx'> #define ELF_CORE_COPY_REGS(pr_reg, regs) do {	\</div><div class='del'>-	pr_reg[0] = PT_REGS_EBX(regs);		\</div><div class='del'>-	pr_reg[1] = PT_REGS_ECX(regs);		\</div><div class='del'>-	pr_reg[2] = PT_REGS_EDX(regs);		\</div><div class='del'>-	pr_reg[3] = PT_REGS_ESI(regs);		\</div><div class='del'>-	pr_reg[4] = PT_REGS_EDI(regs);		\</div><div class='del'>-	pr_reg[5] = PT_REGS_EBP(regs);		\</div><div class='del'>-	pr_reg[6] = PT_REGS_EAX(regs);		\</div><div class='add'>+	pr_reg[0] = PT_REGS_BX(regs);		\</div><div class='add'>+	pr_reg[1] = PT_REGS_CX(regs);		\</div><div class='add'>+	pr_reg[2] = PT_REGS_DX(regs);		\</div><div class='add'>+	pr_reg[3] = PT_REGS_SI(regs);		\</div><div class='add'>+	pr_reg[4] = PT_REGS_DI(regs);		\</div><div class='add'>+	pr_reg[5] = PT_REGS_BP(regs);		\</div><div class='add'>+	pr_reg[6] = PT_REGS_AX(regs);		\</div><div class='ctx'> 	pr_reg[7] = PT_REGS_DS(regs);		\</div><div class='ctx'> 	pr_reg[8] = PT_REGS_ES(regs);		\</div><div class='ctx'> 	/* fake once used fs and gs selectors? */	\</div><div class='hunk'>@@ -130,13 +130,13 @@ do {								\</div><div class='ctx'> #define ELF_ARCH        EM_X86_64</div><div class='ctx'> </div><div class='ctx'> #define ELF_PLAT_INIT(regs, load_addr)    do { \</div><div class='del'>-	PT_REGS_RBX(regs) = 0; \</div><div class='del'>-	PT_REGS_RCX(regs) = 0; \</div><div class='del'>-	PT_REGS_RDX(regs) = 0; \</div><div class='del'>-	PT_REGS_RSI(regs) = 0; \</div><div class='del'>-	PT_REGS_RDI(regs) = 0; \</div><div class='del'>-	PT_REGS_RBP(regs) = 0; \</div><div class='del'>-	PT_REGS_RAX(regs) = 0; \</div><div class='add'>+	PT_REGS_BX(regs) = 0; \</div><div class='add'>+	PT_REGS_CX(regs) = 0; \</div><div class='add'>+	PT_REGS_DX(regs) = 0; \</div><div class='add'>+	PT_REGS_SI(regs) = 0; \</div><div class='add'>+	PT_REGS_DI(regs) = 0; \</div><div class='add'>+	PT_REGS_BP(regs) = 0; \</div><div class='add'>+	PT_REGS_AX(regs) = 0; \</div><div class='ctx'> 	PT_REGS_R8(regs) = 0; \</div><div class='ctx'> 	PT_REGS_R9(regs) = 0; \</div><div class='ctx'> 	PT_REGS_R10(regs) = 0; \</div><div class='head'>diff --git a/arch/x86/um/asm/ptrace.h b/arch/x86/um/asm/ptrace.h<br/>index c8aca8c501b0..950dfb7b8417 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/asm/ptrace.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/asm/ptrace.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/asm/ptrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/asm/ptrace.h</a></div><div class='hunk'>@@ -1,5 +1,39 @@</div><div class='add'>+#ifndef __UM_X86_PTRACE_H</div><div class='add'>+#define __UM_X86_PTRACE_H</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='ctx'> # include "ptrace_32.h"</div><div class='ctx'> #else</div><div class='ctx'> # include "ptrace_64.h"</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#define PT_REGS_AX(r) UPT_AX(&amp;(r)-&gt;regs)</div><div class='add'>+#define PT_REGS_BX(r) UPT_BX(&amp;(r)-&gt;regs)</div><div class='add'>+#define PT_REGS_CX(r) UPT_CX(&amp;(r)-&gt;regs)</div><div class='add'>+#define PT_REGS_DX(r) UPT_DX(&amp;(r)-&gt;regs)</div><div class='add'>+</div><div class='add'>+#define PT_REGS_SI(r) UPT_SI(&amp;(r)-&gt;regs)</div><div class='add'>+#define PT_REGS_DI(r) UPT_DI(&amp;(r)-&gt;regs)</div><div class='add'>+#define PT_REGS_BP(r) UPT_BP(&amp;(r)-&gt;regs)</div><div class='add'>+#define PT_REGS_EFLAGS(r) UPT_EFLAGS(&amp;(r)-&gt;regs)</div><div class='add'>+</div><div class='add'>+#define PT_REGS_CS(r) UPT_CS(&amp;(r)-&gt;regs)</div><div class='add'>+#define PT_REGS_SS(r) UPT_SS(&amp;(r)-&gt;regs)</div><div class='add'>+#define PT_REGS_DS(r) UPT_DS(&amp;(r)-&gt;regs)</div><div class='add'>+#define PT_REGS_ES(r) UPT_ES(&amp;(r)-&gt;regs)</div><div class='add'>+</div><div class='add'>+#define PT_REGS_ORIG_SYSCALL(r) PT_REGS_AX(r)</div><div class='add'>+#define PT_REGS_SYSCALL_RET(r) PT_REGS_AX(r)</div><div class='add'>+</div><div class='add'>+#define PT_FIX_EXEC_STACK(sp) do ; while(0)</div><div class='add'>+</div><div class='add'>+#define profile_pc(regs) PT_REGS_IP(regs)</div><div class='add'>+</div><div class='add'>+#define UPT_RESTART_SYSCALL(r) (UPT_IP(r) -= 2)</div><div class='add'>+#define UPT_SET_SYSCALL_RETURN(r, res) (UPT_AX(r) = (res))</div><div class='add'>+</div><div class='add'>+static inline long regs_return_value(struct uml_pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	return UPT_AX(regs);</div><div class='add'>+}</div><div class='add'>+#endif /* __UM_X86_PTRACE_H */</div><div class='head'>diff --git a/arch/x86/um/asm/ptrace_32.h b/arch/x86/um/asm/ptrace_32.h<br/>index 5d2a59112537..2cf225351b65 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/asm/ptrace_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/asm/ptrace_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/asm/ptrace_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/asm/ptrace_32.h</a></div><div class='hunk'>@@ -11,29 +11,6 @@</div><div class='ctx'> #include "linux/compiler.h"</div><div class='ctx'> #include "asm/ptrace-generic.h"</div><div class='ctx'> </div><div class='del'>-#define PT_REGS_EAX(r) UPT_EAX(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_EBX(r) UPT_EBX(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_ECX(r) UPT_ECX(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_EDX(r) UPT_EDX(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_ESI(r) UPT_ESI(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_EDI(r) UPT_EDI(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_EBP(r) UPT_EBP(&amp;(r)-&gt;regs)</div><div class='del'>-</div><div class='del'>-#define PT_REGS_CS(r) UPT_CS(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_SS(r) UPT_SS(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_DS(r) UPT_DS(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_ES(r) UPT_ES(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_FS(r) UPT_FS(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_GS(r) UPT_GS(&amp;(r)-&gt;regs)</div><div class='del'>-</div><div class='del'>-#define PT_REGS_EFLAGS(r) UPT_EFLAGS(&amp;(r)-&gt;regs)</div><div class='del'>-</div><div class='del'>-#define PT_REGS_ORIG_SYSCALL(r) PT_REGS_EAX(r)</div><div class='del'>-#define PT_REGS_SYSCALL_RET(r) PT_REGS_EAX(r)</div><div class='del'>-#define PT_FIX_EXEC_STACK(sp) do ; while(0)</div><div class='del'>-</div><div class='del'>-#define profile_pc(regs) PT_REGS_IP(regs)</div><div class='del'>-</div><div class='ctx'> #define user_mode(r) UPT_IS_USER(&amp;(r)-&gt;regs)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/um/asm/ptrace_64.h b/arch/x86/um/asm/ptrace_64.h<br/>index 706a0d80545c..ea7bff394320 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/asm/ptrace_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/asm/ptrace_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/asm/ptrace_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/asm/ptrace_64.h</a></div><div class='hunk'>@@ -15,13 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> #define HOST_AUDIT_ARCH AUDIT_ARCH_X86_64</div><div class='ctx'> </div><div class='del'>-#define PT_REGS_RBX(r) UPT_RBX(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_RCX(r) UPT_RCX(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_RDX(r) UPT_RDX(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_RSI(r) UPT_RSI(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_RDI(r) UPT_RDI(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_RBP(r) UPT_RBP(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_RAX(r) UPT_RAX(&amp;(r)-&gt;regs)</div><div class='ctx'> #define PT_REGS_R8(r) UPT_R8(&amp;(r)-&gt;regs)</div><div class='ctx'> #define PT_REGS_R9(r) UPT_R9(&amp;(r)-&gt;regs)</div><div class='ctx'> #define PT_REGS_R10(r) UPT_R10(&amp;(r)-&gt;regs)</div><div class='hunk'>@@ -31,27 +24,8 @@</div><div class='ctx'> #define PT_REGS_R14(r) UPT_R14(&amp;(r)-&gt;regs)</div><div class='ctx'> #define PT_REGS_R15(r) UPT_R15(&amp;(r)-&gt;regs)</div><div class='ctx'> </div><div class='del'>-#define PT_REGS_FS(r) UPT_FS(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_GS(r) UPT_GS(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_DS(r) UPT_DS(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_ES(r) UPT_ES(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_SS(r) UPT_SS(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_CS(r) UPT_CS(&amp;(r)-&gt;regs)</div><div class='del'>-</div><div class='del'>-#define PT_REGS_ORIG_RAX(r) UPT_ORIG_RAX(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_RIP(r) UPT_IP(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_SP(r) UPT_SP(&amp;(r)-&gt;regs)</div><div class='del'>-</div><div class='del'>-#define PT_REGS_EFLAGS(r) UPT_EFLAGS(&amp;(r)-&gt;regs)</div><div class='del'>-</div><div class='ctx'> /* XXX */</div><div class='ctx'> #define user_mode(r) UPT_IS_USER(&amp;(r)-&gt;regs)</div><div class='del'>-#define PT_REGS_ORIG_SYSCALL(r) PT_REGS_RAX(r)</div><div class='del'>-#define PT_REGS_SYSCALL_RET(r) PT_REGS_RAX(r)</div><div class='del'>-</div><div class='del'>-#define PT_FIX_EXEC_STACK(sp) do ; while(0)</div><div class='del'>-</div><div class='del'>-#define profile_pc(regs) PT_REGS_IP(regs)</div><div class='ctx'> </div><div class='ctx'> struct user_desc;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/um/checksum_32.S b/arch/x86/um/checksum_32.S<br/>index f058d2f82e18..8d0c420465cc 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/checksum_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/checksum_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/checksum_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/checksum_32.S</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> 				</div><div class='ctx'> /*</div><div class='ctx'>  * computes a partial checksum, e.g. for TCP/UDP fragments</div><div class='hunk'>@@ -232,15 +233,11 @@ unsigned int csum_partial_copy_generic (const char *src, char *dst,</div><div class='ctx'> </div><div class='ctx'> #define SRC(y...)			\</div><div class='ctx'> 	9999: y;			\</div><div class='del'>-	.section __ex_table, "a";	\</div><div class='del'>-	.long 9999b, 6001f	;	\</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(9999b, 6001f)</div><div class='ctx'> </div><div class='ctx'> #define DST(y...)			\</div><div class='ctx'> 	9999: y;			\</div><div class='del'>-	.section __ex_table, "a";	\</div><div class='del'>-	.long 9999b, 6002f	;	\</div><div class='del'>-	.previous</div><div class='add'>+	_ASM_EXTABLE(9999b, 6002f)</div><div class='ctx'> </div><div class='ctx'> .align 4</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/um/shared/sysdep/ptrace.h b/arch/x86/um/shared/sysdep/ptrace.h<br/>index 2bbe1ec2d96a..6ce2d76eb908 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/shared/sysdep/ptrace.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/shared/sysdep/ptrace.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/shared/sysdep/ptrace.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/shared/sysdep/ptrace.h</a></div><div class='hunk'>@@ -1,15 +1,74 @@</div><div class='ctx'> #ifndef __SYSDEP_X86_PTRACE_H</div><div class='ctx'> #define __SYSDEP_X86_PTRACE_H</div><div class='ctx'> </div><div class='add'>+#include &lt;generated/user_constants.h&gt;</div><div class='add'>+#include "sysdep/faultinfo.h"</div><div class='add'>+</div><div class='add'>+#define MAX_REG_OFFSET (UM_FRAME_SIZE)</div><div class='add'>+#define MAX_REG_NR ((MAX_REG_OFFSET) / sizeof(unsigned long))</div><div class='add'>+</div><div class='add'>+#define REGS_IP(r) ((r)[HOST_IP])</div><div class='add'>+#define REGS_SP(r) ((r)[HOST_SP])</div><div class='add'>+#define REGS_EFLAGS(r) ((r)[HOST_EFLAGS])</div><div class='add'>+#define REGS_AX(r) ((r)[HOST_AX])</div><div class='add'>+#define REGS_BX(r) ((r)[HOST_BX])</div><div class='add'>+#define REGS_CX(r) ((r)[HOST_CX])</div><div class='add'>+#define REGS_DX(r) ((r)[HOST_DX])</div><div class='add'>+#define REGS_SI(r) ((r)[HOST_SI])</div><div class='add'>+#define REGS_DI(r) ((r)[HOST_DI])</div><div class='add'>+#define REGS_BP(r) ((r)[HOST_BP])</div><div class='add'>+#define REGS_CS(r) ((r)[HOST_CS])</div><div class='add'>+#define REGS_SS(r) ((r)[HOST_SS])</div><div class='add'>+#define REGS_DS(r) ((r)[HOST_DS])</div><div class='add'>+#define REGS_ES(r) ((r)[HOST_ES])</div><div class='add'>+</div><div class='add'>+#define UPT_IP(r) REGS_IP((r)-&gt;gp)</div><div class='add'>+#define UPT_SP(r) REGS_SP((r)-&gt;gp)</div><div class='add'>+#define UPT_EFLAGS(r) REGS_EFLAGS((r)-&gt;gp)</div><div class='add'>+#define UPT_AX(r) REGS_AX((r)-&gt;gp)</div><div class='add'>+#define UPT_BX(r) REGS_BX((r)-&gt;gp)</div><div class='add'>+#define UPT_CX(r) REGS_CX((r)-&gt;gp)</div><div class='add'>+#define UPT_DX(r) REGS_DX((r)-&gt;gp)</div><div class='add'>+#define UPT_SI(r) REGS_SI((r)-&gt;gp)</div><div class='add'>+#define UPT_DI(r) REGS_DI((r)-&gt;gp)</div><div class='add'>+#define UPT_BP(r) REGS_BP((r)-&gt;gp)</div><div class='add'>+#define UPT_CS(r) REGS_CS((r)-&gt;gp)</div><div class='add'>+#define UPT_SS(r) REGS_SS((r)-&gt;gp)</div><div class='add'>+#define UPT_DS(r) REGS_DS((r)-&gt;gp)</div><div class='add'>+#define UPT_ES(r) REGS_ES((r)-&gt;gp)</div><div class='add'>+</div><div class='ctx'> #ifdef __i386__</div><div class='ctx'> #include "ptrace_32.h"</div><div class='ctx'> #else</div><div class='ctx'> #include "ptrace_64.h"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static inline long regs_return_value(struct uml_pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	return UPT_SYSCALL_RET(regs);</div><div class='del'>-}</div><div class='add'>+struct syscall_args {</div><div class='add'>+	unsigned long args[6];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define SYSCALL_ARGS(r) ((struct syscall_args) \</div><div class='add'>+			 { .args = { UPT_SYSCALL_ARG1(r),	 \</div><div class='add'>+				     UPT_SYSCALL_ARG2(r),	 \</div><div class='add'>+				     UPT_SYSCALL_ARG3(r),	 \</div><div class='add'>+				     UPT_SYSCALL_ARG4(r),	 \</div><div class='add'>+				     UPT_SYSCALL_ARG5(r),	 \</div><div class='add'>+				     UPT_SYSCALL_ARG6(r) } } )</div><div class='add'>+</div><div class='add'>+struct uml_pt_regs {</div><div class='add'>+	unsigned long gp[MAX_REG_NR];</div><div class='add'>+	unsigned long fp[MAX_FP_NR];</div><div class='add'>+	struct faultinfo faultinfo;</div><div class='add'>+	long syscall;</div><div class='add'>+	int is_user;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define EMPTY_UML_PT_REGS { }</div><div class='add'>+</div><div class='add'>+#define UPT_SYSCALL_NR(r) ((r)-&gt;syscall)</div><div class='add'>+#define UPT_FAULTINFO(r) (&amp;(r)-&gt;faultinfo)</div><div class='add'>+#define UPT_IS_USER(r) ((r)-&gt;is_user)</div><div class='add'>+</div><div class='add'>+extern int user_context(unsigned long sp);</div><div class='ctx'> </div><div class='ctx'> #endif /* __SYSDEP_X86_PTRACE_H */</div><div class='head'>diff --git a/arch/x86/um/shared/sysdep/ptrace_32.h b/arch/x86/um/shared/sysdep/ptrace_32.h<br/>index befd1df32ed0..b94a108de1dc 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/shared/sysdep/ptrace_32.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/shared/sysdep/ptrace_32.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/shared/sysdep/ptrace_32.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/shared/sysdep/ptrace_32.h</a></div><div class='hunk'>@@ -6,11 +6,7 @@</div><div class='ctx'> #ifndef __SYSDEP_I386_PTRACE_H</div><div class='ctx'> #define __SYSDEP_I386_PTRACE_H</div><div class='ctx'> </div><div class='del'>-#include &lt;generated/user_constants.h&gt;</div><div class='del'>-#include "sysdep/faultinfo.h"</div><div class='del'>-</div><div class='del'>-#define MAX_REG_NR (UM_FRAME_SIZE / sizeof(unsigned long))</div><div class='del'>-#define MAX_REG_OFFSET (UM_FRAME_SIZE)</div><div class='add'>+#define MAX_FP_NR HOST_FPX_SIZE</div><div class='ctx'> </div><div class='ctx'> static inline void update_debugregs(int seq) {}</div><div class='ctx'> </div><div class='hunk'>@@ -24,90 +20,16 @@ void set_using_sysemu(int value);</div><div class='ctx'> int get_using_sysemu(void);</div><div class='ctx'> extern int sysemu_supported;</div><div class='ctx'> </div><div class='del'>-#define REGS_IP(r) ((r)[HOST_IP])</div><div class='del'>-#define REGS_SP(r) ((r)[HOST_SP])</div><div class='del'>-#define REGS_EFLAGS(r) ((r)[HOST_EFLAGS])</div><div class='del'>-#define REGS_EAX(r) ((r)[HOST_AX])</div><div class='del'>-#define REGS_EBX(r) ((r)[HOST_BX])</div><div class='del'>-#define REGS_ECX(r) ((r)[HOST_CX])</div><div class='del'>-#define REGS_EDX(r) ((r)[HOST_DX])</div><div class='del'>-#define REGS_ESI(r) ((r)[HOST_SI])</div><div class='del'>-#define REGS_EDI(r) ((r)[HOST_DI])</div><div class='del'>-#define REGS_EBP(r) ((r)[HOST_BP])</div><div class='del'>-#define REGS_CS(r) ((r)[HOST_CS])</div><div class='del'>-#define REGS_SS(r) ((r)[HOST_SS])</div><div class='del'>-#define REGS_DS(r) ((r)[HOST_DS])</div><div class='del'>-#define REGS_ES(r) ((r)[HOST_ES])</div><div class='del'>-#define REGS_FS(r) ((r)[HOST_FS])</div><div class='del'>-#define REGS_GS(r) ((r)[HOST_GS])</div><div class='del'>-</div><div class='del'>-#define REGS_SET_SYSCALL_RETURN(r, res) REGS_EAX(r) = (res)</div><div class='del'>-</div><div class='del'>-#define IP_RESTART_SYSCALL(ip) ((ip) -= 2)</div><div class='del'>-#define REGS_RESTART_SYSCALL(r) IP_RESTART_SYSCALL(REGS_IP(r))</div><div class='del'>-</div><div class='ctx'> #ifndef PTRACE_SYSEMU_SINGLESTEP</div><div class='ctx'> #define PTRACE_SYSEMU_SINGLESTEP 32</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-struct uml_pt_regs {</div><div class='del'>-	unsigned long gp[MAX_REG_NR];</div><div class='del'>-	unsigned long fp[HOST_FPX_SIZE];</div><div class='del'>-	struct faultinfo faultinfo;</div><div class='del'>-	long syscall;</div><div class='del'>-	int is_user;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define EMPTY_UML_PT_REGS { }</div><div class='del'>-</div><div class='del'>-#define UPT_IP(r) REGS_IP((r)-&gt;gp)</div><div class='del'>-#define UPT_SP(r) REGS_SP((r)-&gt;gp)</div><div class='del'>-#define UPT_EFLAGS(r) REGS_EFLAGS((r)-&gt;gp)</div><div class='del'>-#define UPT_EAX(r) REGS_EAX((r)-&gt;gp)</div><div class='del'>-#define UPT_EBX(r) REGS_EBX((r)-&gt;gp)</div><div class='del'>-#define UPT_ECX(r) REGS_ECX((r)-&gt;gp)</div><div class='del'>-#define UPT_EDX(r) REGS_EDX((r)-&gt;gp)</div><div class='del'>-#define UPT_ESI(r) REGS_ESI((r)-&gt;gp)</div><div class='del'>-#define UPT_EDI(r) REGS_EDI((r)-&gt;gp)</div><div class='del'>-#define UPT_EBP(r) REGS_EBP((r)-&gt;gp)</div><div class='del'>-#define UPT_ORIG_EAX(r) ((r)-&gt;syscall)</div><div class='del'>-#define UPT_CS(r) REGS_CS((r)-&gt;gp)</div><div class='del'>-#define UPT_SS(r) REGS_SS((r)-&gt;gp)</div><div class='del'>-#define UPT_DS(r) REGS_DS((r)-&gt;gp)</div><div class='del'>-#define UPT_ES(r) REGS_ES((r)-&gt;gp)</div><div class='del'>-#define UPT_FS(r) REGS_FS((r)-&gt;gp)</div><div class='del'>-#define UPT_GS(r) REGS_GS((r)-&gt;gp)</div><div class='del'>-</div><div class='del'>-#define UPT_SYSCALL_ARG1(r) UPT_EBX(r)</div><div class='del'>-#define UPT_SYSCALL_ARG2(r) UPT_ECX(r)</div><div class='del'>-#define UPT_SYSCALL_ARG3(r) UPT_EDX(r)</div><div class='del'>-#define UPT_SYSCALL_ARG4(r) UPT_ESI(r)</div><div class='del'>-#define UPT_SYSCALL_ARG5(r) UPT_EDI(r)</div><div class='del'>-#define UPT_SYSCALL_ARG6(r) UPT_EBP(r)</div><div class='del'>-</div><div class='del'>-extern int user_context(unsigned long sp);</div><div class='del'>-</div><div class='del'>-#define UPT_IS_USER(r) ((r)-&gt;is_user)</div><div class='del'>-</div><div class='del'>-struct syscall_args {</div><div class='del'>-	unsigned long args[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define SYSCALL_ARGS(r) ((struct syscall_args) \</div><div class='del'>-			 { .args = { UPT_SYSCALL_ARG1(r),	\</div><div class='del'>-				     UPT_SYSCALL_ARG2(r),	\</div><div class='del'>-				     UPT_SYSCALL_ARG3(r),	\</div><div class='del'>-				     UPT_SYSCALL_ARG4(r),	\</div><div class='del'>-				     UPT_SYSCALL_ARG5(r),	\</div><div class='del'>-				     UPT_SYSCALL_ARG6(r) } } )</div><div class='del'>-</div><div class='del'>-#define UPT_RESTART_SYSCALL(r) REGS_RESTART_SYSCALL((r)-&gt;gp)</div><div class='del'>-</div><div class='del'>-#define UPT_ORIG_SYSCALL(r) UPT_EAX(r)</div><div class='del'>-#define UPT_SYSCALL_NR(r) UPT_ORIG_EAX(r)</div><div class='del'>-#define UPT_SYSCALL_RET(r) UPT_EAX(r)</div><div class='del'>-</div><div class='del'>-#define UPT_FAULTINFO(r) (&amp;(r)-&gt;faultinfo)</div><div class='add'>+#define UPT_SYSCALL_ARG1(r) UPT_BX(r)</div><div class='add'>+#define UPT_SYSCALL_ARG2(r) UPT_CX(r)</div><div class='add'>+#define UPT_SYSCALL_ARG3(r) UPT_DX(r)</div><div class='add'>+#define UPT_SYSCALL_ARG4(r) UPT_SI(r)</div><div class='add'>+#define UPT_SYSCALL_ARG5(r) UPT_DI(r)</div><div class='add'>+#define UPT_SYSCALL_ARG6(r) UPT_BP(r)</div><div class='ctx'> </div><div class='ctx'> extern void arch_init_registers(int pid);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/um/shared/sysdep/ptrace_64.h b/arch/x86/um/shared/sysdep/ptrace_64.h<br/>index 031edc53ac57..919789f1071e 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/shared/sysdep/ptrace_64.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/shared/sysdep/ptrace_64.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/shared/sysdep/ptrace_64.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/shared/sysdep/ptrace_64.h</a></div><div class='hunk'>@@ -8,22 +8,8 @@</div><div class='ctx'> #ifndef __SYSDEP_X86_64_PTRACE_H</div><div class='ctx'> #define __SYSDEP_X86_64_PTRACE_H</div><div class='ctx'> </div><div class='del'>-#include &lt;generated/user_constants.h&gt;</div><div class='del'>-#include "sysdep/faultinfo.h"</div><div class='add'>+#define MAX_FP_NR HOST_FP_SIZE</div><div class='ctx'> </div><div class='del'>-#define MAX_REG_OFFSET (UM_FRAME_SIZE)</div><div class='del'>-#define MAX_REG_NR ((MAX_REG_OFFSET) / sizeof(unsigned long))</div><div class='del'>-</div><div class='del'>-#define REGS_IP(r) ((r)[HOST_IP])</div><div class='del'>-#define REGS_SP(r) ((r)[HOST_SP])</div><div class='del'>-</div><div class='del'>-#define REGS_RBX(r) ((r)[HOST_BX])</div><div class='del'>-#define REGS_RCX(r) ((r)[HOST_CX])</div><div class='del'>-#define REGS_RDX(r) ((r)[HOST_DX])</div><div class='del'>-#define REGS_RSI(r) ((r)[HOST_SI])</div><div class='del'>-#define REGS_RDI(r) ((r)[HOST_DI])</div><div class='del'>-#define REGS_RBP(r) ((r)[HOST_BP])</div><div class='del'>-#define REGS_RAX(r) ((r)[HOST_AX])</div><div class='ctx'> #define REGS_R8(r) ((r)[HOST_R8])</div><div class='ctx'> #define REGS_R9(r) ((r)[HOST_R9])</div><div class='ctx'> #define REGS_R10(r) ((r)[HOST_R10])</div><div class='hunk'>@@ -32,9 +18,6 @@</div><div class='ctx'> #define REGS_R13(r) ((r)[HOST_R13])</div><div class='ctx'> #define REGS_R14(r) ((r)[HOST_R14])</div><div class='ctx'> #define REGS_R15(r) ((r)[HOST_R15])</div><div class='del'>-#define REGS_CS(r) ((r)[HOST_CS])</div><div class='del'>-#define REGS_EFLAGS(r) ((r)[HOST_EFLAGS])</div><div class='del'>-#define REGS_SS(r) ((r)[HOST_SS])</div><div class='ctx'> </div><div class='ctx'> #define HOST_FS_BASE 21</div><div class='ctx'> #define HOST_GS_BASE 22</div><div class='hunk'>@@ -58,45 +41,6 @@</div><div class='ctx'> #define GS (HOST_GS * sizeof(long))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define REGS_FS_BASE(r) ((r)[HOST_FS_BASE])</div><div class='del'>-#define REGS_GS_BASE(r) ((r)[HOST_GS_BASE])</div><div class='del'>-#define REGS_DS(r) ((r)[HOST_DS])</div><div class='del'>-#define REGS_ES(r) ((r)[HOST_ES])</div><div class='del'>-#define REGS_FS(r) ((r)[HOST_FS])</div><div class='del'>-#define REGS_GS(r) ((r)[HOST_GS])</div><div class='del'>-</div><div class='del'>-#define REGS_ORIG_RAX(r) ((r)[HOST_ORIG_AX])</div><div class='del'>-</div><div class='del'>-#define REGS_SET_SYSCALL_RETURN(r, res) REGS_RAX(r) = (res)</div><div class='del'>-</div><div class='del'>-#define IP_RESTART_SYSCALL(ip) ((ip) -= 2)</div><div class='del'>-#define REGS_RESTART_SYSCALL(r) IP_RESTART_SYSCALL(REGS_IP(r))</div><div class='del'>-</div><div class='del'>-#define REGS_FAULT_ADDR(r) ((r)-&gt;fault_addr)</div><div class='del'>-</div><div class='del'>-#define REGS_FAULT_WRITE(r) FAULT_WRITE((r)-&gt;fault_type)</div><div class='del'>-</div><div class='del'>-#define REGS_TRAP(r) ((r)-&gt;trap_type)</div><div class='del'>-</div><div class='del'>-#define REGS_ERR(r) ((r)-&gt;fault_type)</div><div class='del'>-</div><div class='del'>-struct uml_pt_regs {</div><div class='del'>-	unsigned long gp[MAX_REG_NR];</div><div class='del'>-	unsigned long fp[HOST_FP_SIZE];</div><div class='del'>-	struct faultinfo faultinfo;</div><div class='del'>-	long syscall;</div><div class='del'>-	int is_user;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define EMPTY_UML_PT_REGS { }</div><div class='del'>-</div><div class='del'>-#define UPT_RBX(r) REGS_RBX((r)-&gt;gp)</div><div class='del'>-#define UPT_RCX(r) REGS_RCX((r)-&gt;gp)</div><div class='del'>-#define UPT_RDX(r) REGS_RDX((r)-&gt;gp)</div><div class='del'>-#define UPT_RSI(r) REGS_RSI((r)-&gt;gp)</div><div class='del'>-#define UPT_RDI(r) REGS_RDI((r)-&gt;gp)</div><div class='del'>-#define UPT_RBP(r) REGS_RBP((r)-&gt;gp)</div><div class='del'>-#define UPT_RAX(r) REGS_RAX((r)-&gt;gp)</div><div class='ctx'> #define UPT_R8(r) REGS_R8((r)-&gt;gp)</div><div class='ctx'> #define UPT_R9(r) REGS_R9((r)-&gt;gp)</div><div class='ctx'> #define UPT_R10(r) REGS_R10((r)-&gt;gp)</div><div class='hunk'>@@ -105,51 +49,14 @@ struct uml_pt_regs {</div><div class='ctx'> #define UPT_R13(r) REGS_R13((r)-&gt;gp)</div><div class='ctx'> #define UPT_R14(r) REGS_R14((r)-&gt;gp)</div><div class='ctx'> #define UPT_R15(r) REGS_R15((r)-&gt;gp)</div><div class='del'>-#define UPT_CS(r) REGS_CS((r)-&gt;gp)</div><div class='del'>-#define UPT_FS_BASE(r) REGS_FS_BASE((r)-&gt;gp)</div><div class='del'>-#define UPT_FS(r) REGS_FS((r)-&gt;gp)</div><div class='del'>-#define UPT_GS_BASE(r) REGS_GS_BASE((r)-&gt;gp)</div><div class='del'>-#define UPT_GS(r) REGS_GS((r)-&gt;gp)</div><div class='del'>-#define UPT_DS(r) REGS_DS((r)-&gt;gp)</div><div class='del'>-#define UPT_ES(r) REGS_ES((r)-&gt;gp)</div><div class='del'>-#define UPT_CS(r) REGS_CS((r)-&gt;gp)</div><div class='del'>-#define UPT_SS(r) REGS_SS((r)-&gt;gp)</div><div class='del'>-#define UPT_ORIG_RAX(r) REGS_ORIG_RAX((r)-&gt;gp)</div><div class='del'>-</div><div class='del'>-#define UPT_IP(r) REGS_IP((r)-&gt;gp)</div><div class='del'>-#define UPT_SP(r) REGS_SP((r)-&gt;gp)</div><div class='del'>-</div><div class='del'>-#define UPT_EFLAGS(r) REGS_EFLAGS((r)-&gt;gp)</div><div class='del'>-#define UPT_SYSCALL_NR(r) ((r)-&gt;syscall)</div><div class='del'>-#define UPT_SYSCALL_RET(r) UPT_RAX(r)</div><div class='del'>-</div><div class='del'>-extern int user_context(unsigned long sp);</div><div class='ctx'> </div><div class='del'>-#define UPT_IS_USER(r) ((r)-&gt;is_user)</div><div class='del'>-</div><div class='del'>-#define UPT_SYSCALL_ARG1(r) UPT_RDI(r)</div><div class='del'>-#define UPT_SYSCALL_ARG2(r) UPT_RSI(r)</div><div class='del'>-#define UPT_SYSCALL_ARG3(r) UPT_RDX(r)</div><div class='add'>+#define UPT_SYSCALL_ARG1(r) UPT_DI(r)</div><div class='add'>+#define UPT_SYSCALL_ARG2(r) UPT_SI(r)</div><div class='add'>+#define UPT_SYSCALL_ARG3(r) UPT_DX(r)</div><div class='ctx'> #define UPT_SYSCALL_ARG4(r) UPT_R10(r)</div><div class='ctx'> #define UPT_SYSCALL_ARG5(r) UPT_R8(r)</div><div class='ctx'> #define UPT_SYSCALL_ARG6(r) UPT_R9(r)</div><div class='ctx'> </div><div class='del'>-struct syscall_args {</div><div class='del'>-	unsigned long args[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define SYSCALL_ARGS(r) ((struct syscall_args) \</div><div class='del'>-			 { .args = { UPT_SYSCALL_ARG1(r),	 \</div><div class='del'>-				     UPT_SYSCALL_ARG2(r),	 \</div><div class='del'>-				     UPT_SYSCALL_ARG3(r),	 \</div><div class='del'>-				     UPT_SYSCALL_ARG4(r),	 \</div><div class='del'>-				     UPT_SYSCALL_ARG5(r),	 \</div><div class='del'>-				     UPT_SYSCALL_ARG6(r) } } )</div><div class='del'>-</div><div class='del'>-#define UPT_RESTART_SYSCALL(r) REGS_RESTART_SYSCALL((r)-&gt;gp)</div><div class='del'>-</div><div class='del'>-#define UPT_FAULTINFO(r) (&amp;(r)-&gt;faultinfo)</div><div class='del'>-</div><div class='ctx'> static inline void arch_init_registers(int pid)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/um/signal.c b/arch/x86/um/signal.c<br/>index 4883b9546016..a508cea13503 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/signal.c</a></div><div class='hunk'>@@ -156,6 +156,9 @@ static int copy_sc_from_user(struct pt_regs *regs,</div><div class='ctx'> 	struct sigcontext sc;</div><div class='ctx'> 	int err, pid;</div><div class='ctx'> </div><div class='add'>+	/* Always make any pending restarted system calls return -EINTR */</div><div class='add'>+	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='add'>+</div><div class='ctx'> 	err = copy_from_user(&amp;sc, from, sizeof(sc));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -410,9 +413,9 @@ int setup_signal_stack_sc(unsigned long stack_top, int sig,</div><div class='ctx'> </div><div class='ctx'> 	PT_REGS_SP(regs) = (unsigned long) frame;</div><div class='ctx'> 	PT_REGS_IP(regs) = (unsigned long) ka-&gt;sa.sa_handler;</div><div class='del'>-	PT_REGS_EAX(regs) = (unsigned long) sig;</div><div class='del'>-	PT_REGS_EDX(regs) = (unsigned long) 0;</div><div class='del'>-	PT_REGS_ECX(regs) = (unsigned long) 0;</div><div class='add'>+	PT_REGS_AX(regs) = (unsigned long) sig;</div><div class='add'>+	PT_REGS_DX(regs) = (unsigned long) 0;</div><div class='add'>+	PT_REGS_CX(regs) = (unsigned long) 0;</div><div class='ctx'> </div><div class='ctx'> 	if ((current-&gt;ptrace &amp; PT_DTRACE) &amp;&amp; (current-&gt;ptrace &amp; PT_PTRACED))</div><div class='ctx'> 		ptrace_notify(SIGTRAP);</div><div class='hunk'>@@ -460,9 +463,9 @@ int setup_signal_stack_si(unsigned long stack_top, int sig,</div><div class='ctx'> </div><div class='ctx'> 	PT_REGS_SP(regs) = (unsigned long) frame;</div><div class='ctx'> 	PT_REGS_IP(regs) = (unsigned long) ka-&gt;sa.sa_handler;</div><div class='del'>-	PT_REGS_EAX(regs) = (unsigned long) sig;</div><div class='del'>-	PT_REGS_EDX(regs) = (unsigned long) &amp;frame-&gt;info;</div><div class='del'>-	PT_REGS_ECX(regs) = (unsigned long) &amp;frame-&gt;uc;</div><div class='add'>+	PT_REGS_AX(regs) = (unsigned long) sig;</div><div class='add'>+	PT_REGS_DX(regs) = (unsigned long) &amp;frame-&gt;info;</div><div class='add'>+	PT_REGS_CX(regs) = (unsigned long) &amp;frame-&gt;uc;</div><div class='ctx'> </div><div class='ctx'> 	if ((current-&gt;ptrace &amp; PT_DTRACE) &amp;&amp; (current-&gt;ptrace &amp; PT_PTRACED))</div><div class='ctx'> 		ptrace_notify(SIGTRAP);</div><div class='hunk'>@@ -483,7 +486,6 @@ long sys_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	    copy_from_user(&amp;set.sig[1], extramask, sig_size))</div><div class='ctx'> 		goto segfault;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (copy_sc_from_user(&amp;current-&gt;thread.regs, sc))</div><div class='hunk'>@@ -541,8 +543,8 @@ int setup_signal_stack_si(unsigned long stack_top, int sig,</div><div class='ctx'> 			       set-&gt;sig[0]);</div><div class='ctx'> 	err |= __put_user(&amp;frame-&gt;fpstate, &amp;frame-&gt;uc.uc_mcontext.fpstate);</div><div class='ctx'> 	if (sizeof(*set) == 16) {</div><div class='del'>-		__put_user(set-&gt;sig[0], &amp;frame-&gt;uc.uc_sigmask.sig[0]);</div><div class='del'>-		__put_user(set-&gt;sig[1], &amp;frame-&gt;uc.uc_sigmask.sig[1]);</div><div class='add'>+		err |= __put_user(set-&gt;sig[0], &amp;frame-&gt;uc.uc_sigmask.sig[0]);</div><div class='add'>+		err |= __put_user(set-&gt;sig[1], &amp;frame-&gt;uc.uc_sigmask.sig[1]);</div><div class='ctx'> 	}</div><div class='ctx'> 	else</div><div class='ctx'> 		err |= __copy_to_user(&amp;frame-&gt;uc.uc_sigmask, set,</div><div class='hunk'>@@ -570,17 +572,17 @@ int setup_signal_stack_si(unsigned long stack_top, int sig,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	PT_REGS_SP(regs) = (unsigned long) frame;</div><div class='del'>-	PT_REGS_RDI(regs) = sig;</div><div class='add'>+	PT_REGS_DI(regs) = sig;</div><div class='ctx'> 	/* In case the signal handler was declared without prototypes */</div><div class='del'>-	PT_REGS_RAX(regs) = 0;</div><div class='add'>+	PT_REGS_AX(regs) = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This also works for non SA_SIGINFO handlers because they expect the</div><div class='ctx'> 	 * next argument after the signal number on the stack.</div><div class='ctx'> 	 */</div><div class='del'>-	PT_REGS_RSI(regs) = (unsigned long) &amp;frame-&gt;info;</div><div class='del'>-	PT_REGS_RDX(regs) = (unsigned long) &amp;frame-&gt;uc;</div><div class='del'>-	PT_REGS_RIP(regs) = (unsigned long) ka-&gt;sa.sa_handler;</div><div class='add'>+	PT_REGS_SI(regs) = (unsigned long) &amp;frame-&gt;info;</div><div class='add'>+	PT_REGS_DX(regs) = (unsigned long) &amp;frame-&gt;uc;</div><div class='add'>+	PT_REGS_IP(regs) = (unsigned long) ka-&gt;sa.sa_handler;</div><div class='ctx'>  out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -597,7 +599,6 @@ long sys_rt_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 	if (copy_from_user(&amp;set, &amp;uc-&gt;uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto segfault;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (copy_sc_from_user(&amp;current-&gt;thread.regs, &amp;uc-&gt;uc_mcontext))</div><div class='head'>diff --git a/arch/x86/um/sys_call_table_64.c b/arch/x86/um/sys_call_table_64.c<br/>index 9924776f4265..170bd926a69c 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/sys_call_table_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/sys_call_table_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/sys_call_table_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/sys_call_table_64.c</a></div><div class='hunk'>@@ -31,7 +31,6 @@</div><div class='ctx'> #define stub_fork sys_fork</div><div class='ctx'> #define stub_vfork sys_vfork</div><div class='ctx'> #define stub_execve sys_execve</div><div class='del'>-#define stub_rt_sigsuspend sys_rt_sigsuspend</div><div class='ctx'> #define stub_sigaltstack sys_sigaltstack</div><div class='ctx'> #define stub_rt_sigreturn sys_rt_sigreturn</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/um/syscalls_32.c b/arch/x86/um/syscalls_32.c<br/>index 70ca357393b8..b853e8600b9d 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/syscalls_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/syscalls_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/syscalls_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/syscalls_32.c</a></div><div class='hunk'>@@ -44,10 +44,10 @@ long sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='ctx'> 		old_sigset_t mask;</div><div class='ctx'> 		if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||</div><div class='ctx'> 		    __get_user(new_ka.sa.sa_handler, &amp;act-&gt;sa_handler) ||</div><div class='del'>-		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer))</div><div class='add'>+		    __get_user(new_ka.sa.sa_restorer, &amp;act-&gt;sa_restorer) ||</div><div class='add'>+		    __get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags) ||</div><div class='add'>+		    __get_user(mask, &amp;act-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__get_user(new_ka.sa.sa_flags, &amp;act-&gt;sa_flags);</div><div class='del'>-		__get_user(mask, &amp;act-&gt;sa_mask);</div><div class='ctx'> 		siginitset(&amp;new_ka.sa.sa_mask, mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -56,10 +56,10 @@ long sys_sigaction(int sig, const struct old_sigaction __user *act,</div><div class='ctx'> 	if (!ret &amp;&amp; oact) {</div><div class='ctx'> 		if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||</div><div class='ctx'> 		    __put_user(old_ka.sa.sa_handler, &amp;oact-&gt;sa_handler) ||</div><div class='del'>-		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer))</div><div class='add'>+		    __put_user(old_ka.sa.sa_restorer, &amp;oact-&gt;sa_restorer) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags) ||</div><div class='add'>+		    __put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		__put_user(old_ka.sa.sa_flags, &amp;oact-&gt;sa_flags);</div><div class='del'>-		__put_user(old_ka.sa.sa_mask.sig[0], &amp;oact-&gt;sa_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/arch/x86/um/sysrq_32.c b/arch/x86/um/sysrq_32.c<br/>index 171b3e9dc867..2d5cc51e9bef 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/sysrq_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/sysrq_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/sysrq_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/sysrq_32.c</a></div><div class='hunk'>@@ -23,12 +23,10 @@ void show_regs(struct pt_regs *regs)</div><div class='ctx'>         printk(" EFLAGS: %08lx\n    %s\n", PT_REGS_EFLAGS(regs),</div><div class='ctx'> 	       print_tainted());</div><div class='ctx'>         printk("EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n",</div><div class='del'>-                PT_REGS_EAX(regs), PT_REGS_EBX(regs), </div><div class='del'>-	       PT_REGS_ECX(regs), </div><div class='del'>-	       PT_REGS_EDX(regs));</div><div class='add'>+               PT_REGS_AX(regs), PT_REGS_BX(regs), </div><div class='add'>+	       PT_REGS_CX(regs), PT_REGS_DX(regs));</div><div class='ctx'>         printk("ESI: %08lx EDI: %08lx EBP: %08lx",</div><div class='del'>-	       PT_REGS_ESI(regs), PT_REGS_EDI(regs), </div><div class='del'>-	       PT_REGS_EBP(regs));</div><div class='add'>+	       PT_REGS_SI(regs), PT_REGS_DI(regs), PT_REGS_BP(regs));</div><div class='ctx'>         printk(" DS: %04lx ES: %04lx\n",</div><div class='ctx'> 	       0xffff &amp; PT_REGS_DS(regs), </div><div class='ctx'> 	       0xffff &amp; PT_REGS_ES(regs));</div><div class='head'>diff --git a/arch/x86/um/sysrq_64.c b/arch/x86/um/sysrq_64.c<br/>index e8913436d7dc..08258f179969 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/sysrq_64.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/sysrq_64.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/sysrq_64.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/sysrq_64.c</a></div><div class='hunk'>@@ -19,15 +19,15 @@ void __show_regs(struct pt_regs *regs)</div><div class='ctx'> 	printk(KERN_INFO "Pid: %d, comm: %.20s %s %s\n", task_pid_nr(current),</div><div class='ctx'> 		current-&gt;comm, print_tainted(), init_utsname()-&gt;release);</div><div class='ctx'> 	printk(KERN_INFO "RIP: %04lx:[&lt;%016lx&gt;]\n", PT_REGS_CS(regs) &amp; 0xffff,</div><div class='del'>-	       PT_REGS_RIP(regs));</div><div class='add'>+	       PT_REGS_IP(regs));</div><div class='ctx'> 	printk(KERN_INFO "RSP: %016lx  EFLAGS: %08lx\n", PT_REGS_SP(regs),</div><div class='ctx'> 	       PT_REGS_EFLAGS(regs));</div><div class='ctx'> 	printk(KERN_INFO "RAX: %016lx RBX: %016lx RCX: %016lx\n",</div><div class='del'>-	       PT_REGS_RAX(regs), PT_REGS_RBX(regs), PT_REGS_RCX(regs));</div><div class='add'>+	       PT_REGS_AX(regs), PT_REGS_BX(regs), PT_REGS_CX(regs));</div><div class='ctx'> 	printk(KERN_INFO "RDX: %016lx RSI: %016lx RDI: %016lx\n",</div><div class='del'>-	       PT_REGS_RDX(regs), PT_REGS_RSI(regs), PT_REGS_RDI(regs));</div><div class='add'>+	       PT_REGS_DX(regs), PT_REGS_SI(regs), PT_REGS_DI(regs));</div><div class='ctx'> 	printk(KERN_INFO "RBP: %016lx R08: %016lx R09: %016lx\n",</div><div class='del'>-	       PT_REGS_RBP(regs), PT_REGS_R8(regs), PT_REGS_R9(regs));</div><div class='add'>+	       PT_REGS_BP(regs), PT_REGS_R8(regs), PT_REGS_R9(regs));</div><div class='ctx'> 	printk(KERN_INFO "R10: %016lx R11: %016lx R12: %016lx\n",</div><div class='ctx'> 	       PT_REGS_R10(regs), PT_REGS_R11(regs), PT_REGS_R12(regs));</div><div class='ctx'> 	printk(KERN_INFO "R13: %016lx R14: %016lx R15: %016lx\n",</div><div class='head'>diff --git a/arch/x86/um/tls_32.c b/arch/x86/um/tls_32.c<br/>index c6c7131e563b..baba84f8ecb8 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/um/tls_32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/um/tls_32.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/um/tls_32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/um/tls_32.c</a></div><div class='hunk'>@@ -219,7 +219,7 @@ int arch_copy_tls(struct task_struct *new)</div><div class='ctx'> 	int idx, ret = -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	if (copy_from_user(&amp;info,</div><div class='del'>-			   (void __user *) UPT_ESI(&amp;new-&gt;thread.regs.regs),</div><div class='add'>+			   (void __user *) UPT_SI(&amp;new-&gt;thread.regs.regs),</div><div class='ctx'> 			   sizeof(info)))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/video/fbdev.c b/arch/x86/video/fbdev.c<br/>index c5ffb6ac8707..d5644bbe8cba 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/video/fbdev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/video/fbdev.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/video/fbdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/video/fbdev.c</a></div><div class='hunk'>@@ -9,24 +9,34 @@</div><div class='ctx'> #include &lt;linux/fb.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/vgaarb.h&gt;</div><div class='ctx'> </div><div class='ctx'> int fb_is_primary_device(struct fb_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *device = info-&gt;device;</div><div class='ctx'> 	struct pci_dev *pci_dev = NULL;</div><div class='add'>+	struct pci_dev *default_device = vga_default_device();</div><div class='ctx'> 	struct resource *res = NULL;</div><div class='del'>-	int retval = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (device)</div><div class='ctx'> 		pci_dev = to_pci_dev(device);</div><div class='ctx'> </div><div class='del'>-	if (pci_dev)</div><div class='del'>-		res = &amp;pci_dev-&gt;resource[PCI_ROM_RESOURCE];</div><div class='add'>+	if (!pci_dev)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (default_device) {</div><div class='add'>+		if (pci_dev == default_device)</div><div class='add'>+			return 1;</div><div class='add'>+		else</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = &amp;pci_dev-&gt;resource[PCI_ROM_RESOURCE];</div><div class='ctx'> </div><div class='ctx'> 	if (res &amp;&amp; res-&gt;flags &amp; IORESOURCE_ROM_SHADOW)</div><div class='del'>-		retval = 1;</div><div class='add'>+		return 1;</div><div class='ctx'> </div><div class='del'>-	return retval;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(fb_is_primary_device);</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/arch/x86/xen/Makefile b/arch/x86/xen/Makefile<br/>index add2c2d729ce..96ab2c09cb68 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/xen/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/Makefile</a></div><div class='hunk'>@@ -20,5 +20,5 @@ obj-$(CONFIG_EVENT_TRACING) += trace.o</div><div class='ctx'> obj-$(CONFIG_SMP)		+= smp.o</div><div class='ctx'> obj-$(CONFIG_PARAVIRT_SPINLOCKS)+= spinlock.o</div><div class='ctx'> obj-$(CONFIG_XEN_DEBUG_FS)	+= debugfs.o</div><div class='del'>-obj-$(CONFIG_XEN_DOM0)		+= vga.o</div><div class='add'>+obj-$(CONFIG_XEN_DOM0)		+= apic.o vga.o</div><div class='ctx'> obj-$(CONFIG_SWIOTLB_XEN)	+= pci-swiotlb-xen.o</div><div class='head'>diff --git a/arch/x86/xen/apic.c b/arch/x86/xen/apic.c<br/>new file mode 100644<br/>index 000000000000..ec57bd3818a4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/apic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/apic.c</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/x86_init.h&gt;</div><div class='add'>+#include &lt;asm/apic.h&gt;</div><div class='add'>+#include &lt;asm/xen/hypercall.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;xen/xen.h&gt;</div><div class='add'>+#include &lt;xen/interface/physdev.h&gt;</div><div class='add'>+</div><div class='add'>+unsigned int xen_io_apic_read(unsigned apic, unsigned reg)</div><div class='add'>+{</div><div class='add'>+	struct physdev_apic apic_op;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	apic_op.apic_physbase = mpc_ioapic_addr(apic);</div><div class='add'>+	apic_op.reg = reg;</div><div class='add'>+	ret = HYPERVISOR_physdev_op(PHYSDEVOP_apic_read, &amp;apic_op);</div><div class='add'>+	if (!ret)</div><div class='add'>+		return apic_op.value;</div><div class='add'>+</div><div class='add'>+	/* fallback to return an emulated IO_APIC values */</div><div class='add'>+	if (reg == 0x1)</div><div class='add'>+		return 0x00170020;</div><div class='add'>+	else if (reg == 0x0)</div><div class='add'>+		return apic &lt;&lt; 24;</div><div class='add'>+</div><div class='add'>+	return 0xfd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init xen_init_apic(void)</div><div class='add'>+{</div><div class='add'>+	x86_io_apic_ops.read = xen_io_apic_read;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/xen/debugfs.c b/arch/x86/xen/debugfs.c<br/>index ef1db1900d86..c8377fb26cdf 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/debugfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/xen/debugfs.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/debugfs.c</a></div><div class='hunk'>@@ -19,107 +19,3 @@ struct dentry * __init xen_init_debugfs(void)</div><div class='ctx'> 	return d_xen_debug;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct array_data</div><div class='del'>-{</div><div class='del'>-	void *array;</div><div class='del'>-	unsigned elements;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int u32_array_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	file-&gt;private_data = NULL;</div><div class='del'>-	return nonseekable_open(inode, file);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static size_t format_array(char *buf, size_t bufsize, const char *fmt,</div><div class='del'>-			   u32 *array, unsigned array_size)</div><div class='del'>-{</div><div class='del'>-	size_t ret = 0;</div><div class='del'>-	unsigned i;</div><div class='del'>-</div><div class='del'>-	for(i = 0; i &lt; array_size; i++) {</div><div class='del'>-		size_t len;</div><div class='del'>-</div><div class='del'>-		len = snprintf(buf, bufsize, fmt, array[i]);</div><div class='del'>-		len++;	/* ' ' or '\n' */</div><div class='del'>-		ret += len;</div><div class='del'>-</div><div class='del'>-		if (buf) {</div><div class='del'>-			buf += len;</div><div class='del'>-			bufsize -= len;</div><div class='del'>-			buf[-1] = (i == array_size-1) ? '\n' : ' ';</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret++;		/* \0 */</div><div class='del'>-	if (buf)</div><div class='del'>-		*buf = '\0';</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static char *format_array_alloc(const char *fmt, u32 *array, unsigned array_size)</div><div class='del'>-{</div><div class='del'>-	size_t len = format_array(NULL, 0, fmt, array, array_size);</div><div class='del'>-	char *ret;</div><div class='del'>-</div><div class='del'>-	ret = kmalloc(len, GFP_KERNEL);</div><div class='del'>-	if (ret == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	format_array(ret, len, fmt, array, array_size);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t u32_array_read(struct file *file, char __user *buf, size_t len,</div><div class='del'>-			      loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct inode *inode = file-&gt;f_path.dentry-&gt;d_inode;</div><div class='del'>-	struct array_data *data = inode-&gt;i_private;</div><div class='del'>-	size_t size;</div><div class='del'>-</div><div class='del'>-	if (*ppos == 0) {</div><div class='del'>-		if (file-&gt;private_data) {</div><div class='del'>-			kfree(file-&gt;private_data);</div><div class='del'>-			file-&gt;private_data = NULL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		file-&gt;private_data = format_array_alloc("%u", data-&gt;array, data-&gt;elements);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	size = 0;</div><div class='del'>-	if (file-&gt;private_data)</div><div class='del'>-		size = strlen(file-&gt;private_data);</div><div class='del'>-</div><div class='del'>-	return simple_read_from_buffer(buf, len, ppos, file-&gt;private_data, size);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xen_array_release(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	kfree(file-&gt;private_data);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations u32_array_fops = {</div><div class='del'>-	.owner	= THIS_MODULE,</div><div class='del'>-	.open	= u32_array_open,</div><div class='del'>-	.release= xen_array_release,</div><div class='del'>-	.read	= u32_array_read,</div><div class='del'>-	.llseek = no_llseek,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct dentry *xen_debugfs_create_u32_array(const char *name, umode_t mode,</div><div class='del'>-					    struct dentry *parent,</div><div class='del'>-					    u32 *array, unsigned elements)</div><div class='del'>-{</div><div class='del'>-	struct array_data *data = kmalloc(sizeof(*data), GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-	if (data == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	data-&gt;array = array;</div><div class='del'>-	data-&gt;elements = elements;</div><div class='del'>-</div><div class='del'>-	return debugfs_create_file(name, mode, parent, data, &amp;u32_array_fops);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/x86/xen/debugfs.h b/arch/x86/xen/debugfs.h<br/>index 78d25499be5b..12ebf3325c7b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/debugfs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/xen/debugfs.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/debugfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/debugfs.h</a></div><div class='hunk'>@@ -3,8 +3,4 @@</div><div class='ctx'> </div><div class='ctx'> struct dentry * __init xen_init_debugfs(void);</div><div class='ctx'> </div><div class='del'>-struct dentry *xen_debugfs_create_u32_array(const char *name, umode_t mode,</div><div class='del'>-					    struct dentry *parent,</div><div class='del'>-					    u32 *array, unsigned elements);</div><div class='del'>-</div><div class='ctx'> #endif /* _XEN_DEBUGFS_H */</div><div class='head'>diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c<br/>index a8f8844b8d32..e74df9548a02 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/enlighten.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/xen/enlighten.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/enlighten.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/enlighten.c</a></div><div class='hunk'>@@ -42,6 +42,7 @@</div><div class='ctx'> #include &lt;xen/page.h&gt;</div><div class='ctx'> #include &lt;xen/hvm.h&gt;</div><div class='ctx'> #include &lt;xen/hvc-console.h&gt;</div><div class='add'>+#include &lt;xen/acpi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='hunk'>@@ -63,6 +64,7 @@</div><div class='ctx'> #include &lt;asm/stackprotector.h&gt;</div><div class='ctx'> #include &lt;asm/hypervisor.h&gt;</div><div class='ctx'> #include &lt;asm/mwait.h&gt;</div><div class='add'>+#include &lt;asm/pci_x86.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ACPI</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='hunk'>@@ -74,6 +76,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "xen-ops.h"</div><div class='ctx'> #include "mmu.h"</div><div class='add'>+#include "smp.h"</div><div class='ctx'> #include "multicalls.h"</div><div class='ctx'> </div><div class='ctx'> EXPORT_SYMBOL_GPL(hypercall_page);</div><div class='hunk'>@@ -809,9 +812,40 @@ static void xen_io_delay(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_LOCAL_APIC</div><div class='add'>+static unsigned long xen_set_apic_id(unsigned int x)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(1);</div><div class='add'>+	return x;</div><div class='add'>+}</div><div class='add'>+static unsigned int xen_get_apic_id(unsigned long x)</div><div class='add'>+{</div><div class='add'>+	return ((x)&gt;&gt;24) &amp; 0xFFu;</div><div class='add'>+}</div><div class='ctx'> static u32 xen_apic_read(u32 reg)</div><div class='ctx'> {</div><div class='del'>-	return 0;</div><div class='add'>+	struct xen_platform_op op = {</div><div class='add'>+		.cmd = XENPF_get_cpuinfo,</div><div class='add'>+		.interface_version = XENPF_INTERFACE_VERSION,</div><div class='add'>+		.u.pcpu_info.xen_cpuid = 0,</div><div class='add'>+	};</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Shouldn't need this as APIC is turned off for PV, and we only</div><div class='add'>+	 * get called on the bootup processor. But just in case. */</div><div class='add'>+	if (!xen_initial_domain() || smp_processor_id())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (reg == APIC_LVR)</div><div class='add'>+		return 0x10;</div><div class='add'>+</div><div class='add'>+	if (reg != APIC_ID)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = HYPERVISOR_dom0_op(&amp;op);</div><div class='add'>+	if (ret)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return op.u.pcpu_info.apic_id &lt;&lt; 24;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xen_apic_write(u32 reg, u32 val)</div><div class='hunk'>@@ -849,6 +883,16 @@ static void set_xen_basic_apic_ops(void)</div><div class='ctx'> 	apic-&gt;icr_write = xen_apic_icr_write;</div><div class='ctx'> 	apic-&gt;wait_icr_idle = xen_apic_wait_icr_idle;</div><div class='ctx'> 	apic-&gt;safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;</div><div class='add'>+	apic-&gt;set_apic_id = xen_set_apic_id;</div><div class='add'>+	apic-&gt;get_apic_id = xen_get_apic_id;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	apic-&gt;send_IPI_allbutself = xen_send_IPI_allbutself;</div><div class='add'>+	apic-&gt;send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself;</div><div class='add'>+	apic-&gt;send_IPI_mask = xen_send_IPI_mask;</div><div class='add'>+	apic-&gt;send_IPI_all = xen_send_IPI_all;</div><div class='add'>+	apic-&gt;send_IPI_self = xen_send_IPI_self;</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='hunk'>@@ -1072,7 +1116,10 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = {</div><div class='ctx'> 	.wbinvd = native_wbinvd,</div><div class='ctx'> </div><div class='ctx'> 	.read_msr = native_read_msr_safe,</div><div class='add'>+	.rdmsr_regs = native_rdmsr_safe_regs,</div><div class='ctx'> 	.write_msr = xen_write_msr_safe,</div><div class='add'>+	.wrmsr_regs = native_wrmsr_safe_regs,</div><div class='add'>+</div><div class='ctx'> 	.read_tsc = native_read_tsc,</div><div class='ctx'> 	.read_pmc = native_read_pmc,</div><div class='ctx'> </div><div class='hunk'>@@ -1306,7 +1353,6 @@ asmlinkage void __init xen_start_kernel(void)</div><div class='ctx'> </div><div class='ctx'> 	xen_raw_console_write("mapping kernel into physical memory\n");</div><div class='ctx'> 	pgd = xen_setup_kernel_pagetable(pgd, xen_start_info-&gt;nr_pages);</div><div class='del'>-	xen_ident_map_ISA();</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate and initialize top and mid mfn levels for p2m structure */</div><div class='ctx'> 	xen_build_mfn_list_list();</div><div class='hunk'>@@ -1362,11 +1408,17 @@ asmlinkage void __init xen_start_kernel(void)</div><div class='ctx'> 		xen_start_info-&gt;console.domU.mfn = 0;</div><div class='ctx'> 		xen_start_info-&gt;console.domU.evtchn = 0;</div><div class='ctx'> </div><div class='add'>+		xen_init_apic();</div><div class='add'>+</div><div class='ctx'> 		/* Make sure ACS will be enabled */</div><div class='ctx'> 		pci_request_acs();</div><div class='del'>-	}</div><div class='del'>-		</div><div class='ctx'> </div><div class='add'>+		xen_acpi_sleep_register();</div><div class='add'>+	}</div><div class='add'>+#ifdef CONFIG_PCI</div><div class='add'>+	/* PCI BIOS service won't work from a PV guest. */</div><div class='add'>+	pci_probe &amp;= ~PCI_PROBE_BIOS;</div><div class='add'>+#endif</div><div class='ctx'> 	xen_raw_console_write("about to get started...\n");</div><div class='ctx'> </div><div class='ctx'> 	xen_setup_runstate_info(0);</div><div class='head'>diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c<br/>index b8e279479a6b..3a73785631ce 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/mmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/xen/mmu.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/mmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/mmu.c</a></div><div class='hunk'>@@ -353,8 +353,13 @@ static pteval_t pte_mfn_to_pfn(pteval_t val)</div><div class='ctx'> {</div><div class='ctx'> 	if (val &amp; _PAGE_PRESENT) {</div><div class='ctx'> 		unsigned long mfn = (val &amp; PTE_PFN_MASK) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+		unsigned long pfn = mfn_to_pfn(mfn);</div><div class='add'>+</div><div class='ctx'> 		pteval_t flags = val &amp; PTE_FLAGS_MASK;</div><div class='del'>-		val = ((pteval_t)mfn_to_pfn(mfn) &lt;&lt; PAGE_SHIFT) | flags;</div><div class='add'>+		if (unlikely(pfn == ~0))</div><div class='add'>+			val = flags &amp; ~_PAGE_PRESENT;</div><div class='add'>+		else</div><div class='add'>+			val = ((pteval_t)pfn &lt;&lt; PAGE_SHIFT) | flags;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='hunk'>@@ -1859,7 +1864,6 @@ pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,</div><div class='ctx'> #endif	/* CONFIG_X86_64 */</div><div class='ctx'> </div><div class='ctx'> static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;</div><div class='del'>-static unsigned char fake_ioapic_mapping[PAGE_SIZE] __page_aligned_bss;</div><div class='ctx'> </div><div class='ctx'> static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)</div><div class='ctx'> {</div><div class='hunk'>@@ -1900,7 +1904,7 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)</div><div class='ctx'> 		 * We just don't map the IO APIC - all access is via</div><div class='ctx'> 		 * hypercalls.  Keep the address in the pte for reference.</div><div class='ctx'> 		 */</div><div class='del'>-		pte = pfn_pte(PFN_DOWN(__pa(fake_ioapic_mapping)), PAGE_KERNEL);</div><div class='add'>+		pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);</div><div class='ctx'> 		break;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1929,29 +1933,6 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init xen_ident_map_ISA(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long pa;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If we're dom0, then linear map the ISA machine addresses into</div><div class='del'>-	 * the kernel's address space.</div><div class='del'>-	 */</div><div class='del'>-	if (!xen_initial_domain())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	xen_raw_printk("Xen: setup ISA identity maps\n");</div><div class='del'>-</div><div class='del'>-	for (pa = ISA_START_ADDRESS; pa &lt; ISA_END_ADDRESS; pa += PAGE_SIZE) {</div><div class='del'>-		pte_t pte = mfn_pte(PFN_DOWN(pa), PAGE_KERNEL_IO);</div><div class='del'>-</div><div class='del'>-		if (HYPERVISOR_update_va_mapping(PAGE_OFFSET + pa, pte, 0))</div><div class='del'>-			BUG();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	xen_flush_tlb();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void __init xen_post_allocator_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	pv_mmu_ops.set_pte = xen_set_pte;</div><div class='hunk'>@@ -2065,7 +2046,6 @@ void __init xen_init_mmu_ops(void)</div><div class='ctx'> 	pv_mmu_ops = xen_mmu_ops;</div><div class='ctx'> </div><div class='ctx'> 	memset(dummy_mapping, 0xff, PAGE_SIZE);</div><div class='del'>-	memset(fake_ioapic_mapping, 0xfd, PAGE_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Protected by xen_reservation_lock. */</div><div class='head'>diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c<br/>index 1b267e75158d..ffd08c414e91 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/p2m.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/xen/p2m.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/p2m.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/p2m.c</a></div><div class='hunk'>@@ -499,16 +499,18 @@ static bool alloc_p2m(unsigned long pfn)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool __init __early_alloc_p2m(unsigned long pfn)</div><div class='add'>+static bool __init early_alloc_p2m_middle(unsigned long pfn, bool check_boundary)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned topidx, mididx, idx;</div><div class='add'>+	unsigned long *p2m;</div><div class='add'>+	unsigned long *mid_mfn_p;</div><div class='ctx'> </div><div class='ctx'> 	topidx = p2m_top_index(pfn);</div><div class='ctx'> 	mididx = p2m_mid_index(pfn);</div><div class='ctx'> 	idx = p2m_index(pfn);</div><div class='ctx'> </div><div class='ctx'> 	/* Pfff.. No boundary cross-over, lets get out. */</div><div class='del'>-	if (!idx)</div><div class='add'>+	if (!idx &amp;&amp; check_boundary)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	WARN(p2m_top[topidx][mididx] == p2m_identity,</div><div class='hunk'>@@ -522,24 +524,66 @@ static bool __init __early_alloc_p2m(unsigned long pfn)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* Boundary cross-over for the edges: */</div><div class='del'>-	if (idx) {</div><div class='del'>-		unsigned long *p2m = extend_brk(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-		unsigned long *mid_mfn_p;</div><div class='add'>+	p2m = extend_brk(PAGE_SIZE, PAGE_SIZE);</div><div class='ctx'> </div><div class='del'>-		p2m_init(p2m);</div><div class='add'>+	p2m_init(p2m);</div><div class='ctx'> </div><div class='del'>-		p2m_top[topidx][mididx] = p2m;</div><div class='add'>+	p2m_top[topidx][mididx] = p2m;</div><div class='ctx'> </div><div class='del'>-		/* For save/restore we need to MFN of the P2M saved */</div><div class='del'>-		</div><div class='del'>-		mid_mfn_p = p2m_top_mfn_p[topidx];</div><div class='del'>-		WARN(mid_mfn_p[mididx] != virt_to_mfn(p2m_missing),</div><div class='del'>-			"P2M_TOP_P[%d][%d] != MFN of p2m_missing!\n",</div><div class='del'>-			topidx, mididx);</div><div class='del'>-		mid_mfn_p[mididx] = virt_to_mfn(p2m);</div><div class='add'>+	/* For save/restore we need to MFN of the P2M saved */</div><div class='add'>+</div><div class='add'>+	mid_mfn_p = p2m_top_mfn_p[topidx];</div><div class='add'>+	WARN(mid_mfn_p[mididx] != virt_to_mfn(p2m_missing),</div><div class='add'>+		"P2M_TOP_P[%d][%d] != MFN of p2m_missing!\n",</div><div class='add'>+		topidx, mididx);</div><div class='add'>+	mid_mfn_p[mididx] = virt_to_mfn(p2m);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool __init early_alloc_p2m(unsigned long pfn)</div><div class='add'>+{</div><div class='add'>+	unsigned topidx = p2m_top_index(pfn);</div><div class='add'>+	unsigned long *mid_mfn_p;</div><div class='add'>+	unsigned long **mid;</div><div class='add'>+</div><div class='add'>+	mid = p2m_top[topidx];</div><div class='add'>+	mid_mfn_p = p2m_top_mfn_p[topidx];</div><div class='add'>+	if (mid == p2m_mid_missing) {</div><div class='add'>+		mid = extend_brk(PAGE_SIZE, PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+		p2m_mid_init(mid);</div><div class='add'>+</div><div class='add'>+		p2m_top[topidx] = mid;</div><div class='ctx'> </div><div class='add'>+		BUG_ON(mid_mfn_p != p2m_mid_missing_mfn);</div><div class='ctx'> 	}</div><div class='del'>-	return idx != 0;</div><div class='add'>+	/* And the save/restore P2M tables.. */</div><div class='add'>+	if (mid_mfn_p == p2m_mid_missing_mfn) {</div><div class='add'>+		mid_mfn_p = extend_brk(PAGE_SIZE, PAGE_SIZE);</div><div class='add'>+		p2m_mid_mfn_init(mid_mfn_p);</div><div class='add'>+</div><div class='add'>+		p2m_top_mfn_p[topidx] = mid_mfn_p;</div><div class='add'>+		p2m_top_mfn[topidx] = virt_to_mfn(mid_mfn_p);</div><div class='add'>+		/* Note: we don't set mid_mfn_p[midix] here,</div><div class='add'>+		 * look in early_alloc_p2m_middle */</div><div class='add'>+	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+bool __init early_set_phys_to_machine(unsigned long pfn, unsigned long mfn)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(!__set_phys_to_machine(pfn, mfn)))  {</div><div class='add'>+		if (!early_alloc_p2m(pfn))</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		if (!early_alloc_p2m_middle(pfn, false /* boundary crossover OK!*/))</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		if (!__set_phys_to_machine(pfn, mfn))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> unsigned long __init set_phys_range_identity(unsigned long pfn_s,</div><div class='ctx'> 				      unsigned long pfn_e)</div><div class='hunk'>@@ -559,35 +603,11 @@ unsigned long __init set_phys_range_identity(unsigned long pfn_s,</div><div class='ctx'> 		pfn &lt; ALIGN(pfn_e, (P2M_MID_PER_PAGE * P2M_PER_PAGE));</div><div class='ctx'> 		pfn += P2M_MID_PER_PAGE * P2M_PER_PAGE)</div><div class='ctx'> 	{</div><div class='del'>-		unsigned topidx = p2m_top_index(pfn);</div><div class='del'>-		unsigned long *mid_mfn_p;</div><div class='del'>-		unsigned long **mid;</div><div class='del'>-</div><div class='del'>-		mid = p2m_top[topidx];</div><div class='del'>-		mid_mfn_p = p2m_top_mfn_p[topidx];</div><div class='del'>-		if (mid == p2m_mid_missing) {</div><div class='del'>-			mid = extend_brk(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-</div><div class='del'>-			p2m_mid_init(mid);</div><div class='del'>-</div><div class='del'>-			p2m_top[topidx] = mid;</div><div class='del'>-</div><div class='del'>-			BUG_ON(mid_mfn_p != p2m_mid_missing_mfn);</div><div class='del'>-		}</div><div class='del'>-		/* And the save/restore P2M tables.. */</div><div class='del'>-		if (mid_mfn_p == p2m_mid_missing_mfn) {</div><div class='del'>-			mid_mfn_p = extend_brk(PAGE_SIZE, PAGE_SIZE);</div><div class='del'>-			p2m_mid_mfn_init(mid_mfn_p);</div><div class='del'>-</div><div class='del'>-			p2m_top_mfn_p[topidx] = mid_mfn_p;</div><div class='del'>-			p2m_top_mfn[topidx] = virt_to_mfn(mid_mfn_p);</div><div class='del'>-			/* Note: we don't set mid_mfn_p[midix] here,</div><div class='del'>-		 	 * look in __early_alloc_p2m */</div><div class='del'>-		}</div><div class='add'>+		WARN_ON(!early_alloc_p2m(pfn));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	__early_alloc_p2m(pfn_s);</div><div class='del'>-	__early_alloc_p2m(pfn_e);</div><div class='add'>+	early_alloc_p2m_middle(pfn_s, true);</div><div class='add'>+	early_alloc_p2m_middle(pfn_e, true);</div><div class='ctx'> </div><div class='ctx'> 	for (pfn = pfn_s; pfn &lt; pfn_e; pfn++)</div><div class='ctx'> 		if (!__set_phys_to_machine(pfn, IDENTITY_FRAME(pfn)))</div><div class='head'>diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c<br/>index 1ba8dff26753..3ebba0753d38 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/setup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/xen/setup.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/setup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/setup.c</a></div><div class='hunk'>@@ -26,7 +26,6 @@</div><div class='ctx'> #include &lt;xen/interface/memory.h&gt;</div><div class='ctx'> #include &lt;xen/interface/physdev.h&gt;</div><div class='ctx'> #include &lt;xen/features.h&gt;</div><div class='del'>-</div><div class='ctx'> #include "xen-ops.h"</div><div class='ctx'> #include "vdso.h"</div><div class='ctx'> </div><div class='hunk'>@@ -84,8 +83,8 @@ static void __init xen_add_extra_mem(u64 start, u64 size)</div><div class='ctx'> 		__set_phys_to_machine(pfn, INVALID_P2M_ENTRY);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned long __init xen_release_chunk(unsigned long start,</div><div class='del'>-					      unsigned long end)</div><div class='add'>+static unsigned long __init xen_do_chunk(unsigned long start,</div><div class='add'>+					 unsigned long end, bool release)</div><div class='ctx'> {</div><div class='ctx'> 	struct xen_memory_reservation reservation = {</div><div class='ctx'> 		.address_bits = 0,</div><div class='hunk'>@@ -96,30 +95,138 @@ static unsigned long __init xen_release_chunk(unsigned long start,</div><div class='ctx'> 	unsigned long pfn;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	for(pfn = start; pfn &lt; end; pfn++) {</div><div class='add'>+	for (pfn = start; pfn &lt; end; pfn++) {</div><div class='add'>+		unsigned long frame;</div><div class='ctx'> 		unsigned long mfn = pfn_to_mfn(pfn);</div><div class='ctx'> </div><div class='del'>-		/* Make sure pfn exists to start with */</div><div class='del'>-		if (mfn == INVALID_P2M_ENTRY || mfn_to_pfn(mfn) != pfn)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		set_xen_guest_handle(reservation.extent_start, &amp;mfn);</div><div class='add'>+		if (release) {</div><div class='add'>+			/* Make sure pfn exists to start with */</div><div class='add'>+			if (mfn == INVALID_P2M_ENTRY || mfn_to_pfn(mfn) != pfn)</div><div class='add'>+				continue;</div><div class='add'>+			frame = mfn;</div><div class='add'>+		} else {</div><div class='add'>+			if (mfn != INVALID_P2M_ENTRY)</div><div class='add'>+				continue;</div><div class='add'>+			frame = pfn;</div><div class='add'>+		}</div><div class='add'>+		set_xen_guest_handle(reservation.extent_start, &amp;frame);</div><div class='ctx'> 		reservation.nr_extents = 1;</div><div class='ctx'> </div><div class='del'>-		ret = HYPERVISOR_memory_op(XENMEM_decrease_reservation,</div><div class='add'>+		ret = HYPERVISOR_memory_op(release ? XENMEM_decrease_reservation : XENMEM_populate_physmap,</div><div class='ctx'> 					   &amp;reservation);</div><div class='del'>-		WARN(ret != 1, "Failed to release pfn %lx err=%d\n", pfn, ret);</div><div class='add'>+		WARN(ret != 1, "Failed to %s pfn %lx err=%d\n",</div><div class='add'>+		     release ? "release" : "populate", pfn, ret);</div><div class='add'>+</div><div class='ctx'> 		if (ret == 1) {</div><div class='del'>-			__set_phys_to_machine(pfn, INVALID_P2M_ENTRY);</div><div class='add'>+			if (!early_set_phys_to_machine(pfn, release ? INVALID_P2M_ENTRY : frame)) {</div><div class='add'>+				if (release)</div><div class='add'>+					break;</div><div class='add'>+				set_xen_guest_handle(reservation.extent_start, &amp;frame);</div><div class='add'>+				reservation.nr_extents = 1;</div><div class='add'>+				ret = HYPERVISOR_memory_op(XENMEM_decrease_reservation,</div><div class='add'>+							   &amp;reservation);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> 			len++;</div><div class='del'>-		}</div><div class='add'>+		} else</div><div class='add'>+			break;</div><div class='ctx'> 	}</div><div class='del'>-	printk(KERN_INFO "Freeing  %lx-%lx pfn range: %lu pages freed\n",</div><div class='del'>-	       start, end, len);</div><div class='add'>+	if (len)</div><div class='add'>+		printk(KERN_INFO "%s %lx-%lx pfn range: %lu pages %s\n",</div><div class='add'>+		       release ? "Freeing" : "Populating",</div><div class='add'>+		       start, end, len,</div><div class='add'>+		       release ? "freed" : "added");</div><div class='ctx'> </div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned long __init xen_release_chunk(unsigned long start,</div><div class='add'>+					      unsigned long end)</div><div class='add'>+{</div><div class='add'>+	return xen_do_chunk(start, end, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long __init xen_populate_chunk(</div><div class='add'>+	const struct e820entry *list, size_t map_size,</div><div class='add'>+	unsigned long max_pfn, unsigned long *last_pfn,</div><div class='add'>+	unsigned long credits_left)</div><div class='add'>+{</div><div class='add'>+	const struct e820entry *entry;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	unsigned long done = 0;</div><div class='add'>+	unsigned long dest_pfn;</div><div class='add'>+</div><div class='add'>+	for (i = 0, entry = list; i &lt; map_size; i++, entry++) {</div><div class='add'>+		unsigned long credits = credits_left;</div><div class='add'>+		unsigned long s_pfn;</div><div class='add'>+		unsigned long e_pfn;</div><div class='add'>+		unsigned long pfns;</div><div class='add'>+		long capacity;</div><div class='add'>+</div><div class='add'>+		if (credits &lt;= 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (entry-&gt;type != E820_RAM)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		e_pfn = PFN_UP(entry-&gt;addr + entry-&gt;size);</div><div class='add'>+</div><div class='add'>+		/* We only care about E820 after the xen_start_info-&gt;nr_pages */</div><div class='add'>+		if (e_pfn &lt;= max_pfn)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		s_pfn = PFN_DOWN(entry-&gt;addr);</div><div class='add'>+		/* If the E820 falls within the nr_pages, we want to start</div><div class='add'>+		 * at the nr_pages PFN.</div><div class='add'>+		 * If that would mean going past the E820 entry, skip it</div><div class='add'>+		 */</div><div class='add'>+		if (s_pfn &lt;= max_pfn) {</div><div class='add'>+			capacity = e_pfn - max_pfn;</div><div class='add'>+			dest_pfn = max_pfn;</div><div class='add'>+		} else {</div><div class='add'>+			/* last_pfn MUST be within E820_RAM regions */</div><div class='add'>+			if (*last_pfn &amp;&amp; e_pfn &gt;= *last_pfn)</div><div class='add'>+				s_pfn = *last_pfn;</div><div class='add'>+			capacity = e_pfn - s_pfn;</div><div class='add'>+			dest_pfn = s_pfn;</div><div class='add'>+		}</div><div class='add'>+		/* If we had filled this E820_RAM entry, go to the next one. */</div><div class='add'>+		if (capacity &lt;= 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (credits &gt; capacity)</div><div class='add'>+			credits = capacity;</div><div class='add'>+</div><div class='add'>+		pfns = xen_do_chunk(dest_pfn, dest_pfn + credits, false);</div><div class='add'>+		done += pfns;</div><div class='add'>+		credits_left -= pfns;</div><div class='add'>+		*last_pfn = (dest_pfn + pfns);</div><div class='add'>+	}</div><div class='add'>+	return done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init xen_set_identity_and_release_chunk(</div><div class='add'>+	unsigned long start_pfn, unsigned long end_pfn, unsigned long nr_pages,</div><div class='add'>+	unsigned long *released, unsigned long *identity)</div><div class='add'>+{</div><div class='add'>+	unsigned long pfn;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the PFNs are currently mapped, the VA mapping also needs</div><div class='add'>+	 * to be updated to be 1:1.</div><div class='add'>+	 */</div><div class='add'>+	for (pfn = start_pfn; pfn &lt;= max_pfn_mapped &amp;&amp; pfn &lt; end_pfn; pfn++)</div><div class='add'>+		(void)HYPERVISOR_update_va_mapping(</div><div class='add'>+			(unsigned long)__va(pfn &lt;&lt; PAGE_SHIFT),</div><div class='add'>+			mfn_pte(pfn, PAGE_KERNEL_IO), 0);</div><div class='add'>+</div><div class='add'>+	if (start_pfn &lt; nr_pages)</div><div class='add'>+		*released += xen_release_chunk(</div><div class='add'>+			start_pfn, min(end_pfn, nr_pages));</div><div class='add'>+</div><div class='add'>+	*identity += set_phys_range_identity(start_pfn, end_pfn);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static unsigned long __init xen_set_identity_and_release(</div><div class='ctx'> 	const struct e820entry *list, size_t map_size, unsigned long nr_pages)</div><div class='ctx'> {</div><div class='hunk'>@@ -142,7 +249,6 @@ static unsigned long __init xen_set_identity_and_release(</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0, entry = list; i &lt; map_size; i++, entry++) {</div><div class='ctx'> 		phys_addr_t end = entry-&gt;addr + entry-&gt;size;</div><div class='del'>-</div><div class='ctx'> 		if (entry-&gt;type == E820_RAM || i == map_size - 1) {</div><div class='ctx'> 			unsigned long start_pfn = PFN_DOWN(start);</div><div class='ctx'> 			unsigned long end_pfn = PFN_UP(end);</div><div class='hunk'>@@ -150,20 +256,19 @@ static unsigned long __init xen_set_identity_and_release(</div><div class='ctx'> 			if (entry-&gt;type == E820_RAM)</div><div class='ctx'> 				end_pfn = PFN_UP(entry-&gt;addr);</div><div class='ctx'> </div><div class='del'>-			if (start_pfn &lt; end_pfn) {</div><div class='del'>-				if (start_pfn &lt; nr_pages)</div><div class='del'>-					released += xen_release_chunk(</div><div class='del'>-						start_pfn, min(end_pfn, nr_pages));</div><div class='add'>+			if (start_pfn &lt; end_pfn)</div><div class='add'>+				xen_set_identity_and_release_chunk(</div><div class='add'>+					start_pfn, end_pfn, nr_pages,</div><div class='add'>+					&amp;released, &amp;identity);</div><div class='ctx'> </div><div class='del'>-				identity += set_phys_range_identity(</div><div class='del'>-					start_pfn, end_pfn);</div><div class='del'>-			}</div><div class='ctx'> 			start = end;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "Released %lu pages of unused memory\n", released);</div><div class='del'>-	printk(KERN_INFO "Set %ld page(s) to 1-1 mapping\n", identity);</div><div class='add'>+	if (released)</div><div class='add'>+		printk(KERN_INFO "Released %lu pages of unused memory\n", released);</div><div class='add'>+	if (identity)</div><div class='add'>+		printk(KERN_INFO "Set %ld page(s) to 1-1 mapping\n", identity);</div><div class='ctx'> </div><div class='ctx'> 	return released;</div><div class='ctx'> }</div><div class='hunk'>@@ -217,7 +322,9 @@ char * __init xen_memory_setup(void)</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	struct xen_memory_map memmap;</div><div class='ctx'> 	unsigned long max_pages;</div><div class='add'>+	unsigned long last_pfn = 0;</div><div class='ctx'> 	unsigned long extra_pages = 0;</div><div class='add'>+	unsigned long populated;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int op;</div><div class='ctx'> </div><div class='hunk'>@@ -257,9 +364,20 @@ char * __init xen_memory_setup(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	xen_released_pages = xen_set_identity_and_release(</div><div class='ctx'> 		map, memmap.nr_entries, max_pfn);</div><div class='del'>-	extra_pages += xen_released_pages;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * Populate back the non-RAM pages and E820 gaps that had been</div><div class='add'>+	 * released. */</div><div class='add'>+	populated = xen_populate_chunk(map, memmap.nr_entries,</div><div class='add'>+			max_pfn, &amp;last_pfn, xen_released_pages);</div><div class='add'>+</div><div class='add'>+	extra_pages += (xen_released_pages - populated);</div><div class='add'>+</div><div class='add'>+	if (last_pfn &gt; max_pfn) {</div><div class='add'>+		max_pfn = min(MAX_DOMAIN_PAGES, last_pfn);</div><div class='add'>+		mem_end = PFN_PHYS(max_pfn);</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='ctx'> 	 * Clamp the amount of extra memory to a EXTRA_MEM_RATIO</div><div class='ctx'> 	 * factor the base size.  On non-highmem systems, the base</div><div class='ctx'> 	 * size is the full initial memory allocation; on highmem it</div><div class='hunk'>@@ -272,7 +390,6 @@ char * __init xen_memory_setup(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	extra_pages = min(EXTRA_MEM_RATIO * min(max_pfn, PFN_DOWN(MAXMEM)),</div><div class='ctx'> 			  extra_pages);</div><div class='del'>-</div><div class='ctx'> 	i = 0;</div><div class='ctx'> 	while (i &lt; memmap.nr_entries) {</div><div class='ctx'> 		u64 addr = map[i].addr;</div><div class='head'>diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c<br/>index 0503c0c493a9..afb250d22a6b 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/smp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/xen/smp.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/smp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/smp.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/irq_work.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='hunk'>@@ -41,10 +42,12 @@ cpumask_var_t xen_cpu_initialized_map;</div><div class='ctx'> static DEFINE_PER_CPU(int, xen_resched_irq);</div><div class='ctx'> static DEFINE_PER_CPU(int, xen_callfunc_irq);</div><div class='ctx'> static DEFINE_PER_CPU(int, xen_callfuncsingle_irq);</div><div class='add'>+static DEFINE_PER_CPU(int, xen_irq_work);</div><div class='ctx'> static DEFINE_PER_CPU(int, xen_debug_irq) = -1;</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t xen_call_function_interrupt(int irq, void *dev_id);</div><div class='ctx'> static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id);</div><div class='add'>+static irqreturn_t xen_irq_work_interrupt(int irq, void *dev_id);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Reschedule call back.</div><div class='hunk'>@@ -143,6 +146,17 @@ static int xen_smp_intr_init(unsigned int cpu)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	per_cpu(xen_callfuncsingle_irq, cpu) = rc;</div><div class='ctx'> </div><div class='add'>+	callfunc_name = kasprintf(GFP_KERNEL, "irqwork%d", cpu);</div><div class='add'>+	rc = bind_ipi_to_irqhandler(XEN_IRQ_WORK_VECTOR,</div><div class='add'>+				    cpu,</div><div class='add'>+				    xen_irq_work_interrupt,</div><div class='add'>+				    IRQF_DISABLED|IRQF_PERCPU|IRQF_NOBALANCING,</div><div class='add'>+				    callfunc_name,</div><div class='add'>+				    NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto fail;</div><div class='add'>+	per_cpu(xen_irq_work, cpu) = rc;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'>  fail:</div><div class='hunk'>@@ -155,6 +169,8 @@ static int xen_smp_intr_init(unsigned int cpu)</div><div class='ctx'> 	if (per_cpu(xen_callfuncsingle_irq, cpu) &gt;= 0)</div><div class='ctx'> 		unbind_from_irqhandler(per_cpu(xen_callfuncsingle_irq, cpu),</div><div class='ctx'> 				       NULL);</div><div class='add'>+	if (per_cpu(xen_irq_work, cpu) &gt;= 0)</div><div class='add'>+		unbind_from_irqhandler(per_cpu(xen_irq_work, cpu), NULL);</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='hunk'>@@ -265,18 +281,8 @@ static void __init xen_smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 		set_cpu_possible(cpu, false);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for_each_possible_cpu (cpu) {</div><div class='del'>-		struct task_struct *idle;</div><div class='del'>-</div><div class='del'>-		if (cpu == 0)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		idle = fork_idle(cpu);</div><div class='del'>-		if (IS_ERR(idle))</div><div class='del'>-			panic("failed fork for CPU %d", cpu);</div><div class='del'>-</div><div class='add'>+	for_each_possible_cpu(cpu)</div><div class='ctx'> 		set_cpu_present(cpu, true);</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __cpuinit</div><div class='hunk'>@@ -346,9 +352,8 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __cpuinit xen_cpu_up(unsigned int cpu)</div><div class='add'>+static int __cpuinit xen_cpu_up(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> {</div><div class='del'>-	struct task_struct *idle = idle_task(cpu);</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	per_cpu(current_task, cpu) = idle;</div><div class='hunk'>@@ -418,6 +423,7 @@ static void xen_cpu_die(unsigned int cpu)</div><div class='ctx'> 	unbind_from_irqhandler(per_cpu(xen_callfunc_irq, cpu), NULL);</div><div class='ctx'> 	unbind_from_irqhandler(per_cpu(xen_debug_irq, cpu), NULL);</div><div class='ctx'> 	unbind_from_irqhandler(per_cpu(xen_callfuncsingle_irq, cpu), NULL);</div><div class='add'>+	unbind_from_irqhandler(per_cpu(xen_irq_work, cpu), NULL);</div><div class='ctx'> 	xen_uninit_lock_cpu(cpu);</div><div class='ctx'> 	xen_teardown_timer(cpu);</div><div class='ctx'> </div><div class='hunk'>@@ -480,8 +486,8 @@ static void xen_smp_send_reschedule(int cpu)</div><div class='ctx'> 	xen_send_IPI_one(cpu, XEN_RESCHEDULE_VECTOR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xen_send_IPI_mask(const struct cpumask *mask,</div><div class='del'>-			      enum ipi_vector vector)</div><div class='add'>+static void __xen_send_IPI_mask(const struct cpumask *mask,</div><div class='add'>+			      int vector)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned cpu;</div><div class='ctx'> </div><div class='hunk'>@@ -493,7 +499,7 @@ static void xen_smp_send_call_function_ipi(const struct cpumask *mask)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='del'>-	xen_send_IPI_mask(mask, XEN_CALL_FUNCTION_VECTOR);</div><div class='add'>+	__xen_send_IPI_mask(mask, XEN_CALL_FUNCTION_VECTOR);</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure other vcpus get a chance to run if they need to. */</div><div class='ctx'> 	for_each_cpu(cpu, mask) {</div><div class='hunk'>@@ -506,10 +512,86 @@ static void xen_smp_send_call_function_ipi(const struct cpumask *mask)</div><div class='ctx'> </div><div class='ctx'> static void xen_smp_send_call_function_single_ipi(int cpu)</div><div class='ctx'> {</div><div class='del'>-	xen_send_IPI_mask(cpumask_of(cpu),</div><div class='add'>+	__xen_send_IPI_mask(cpumask_of(cpu),</div><div class='ctx'> 			  XEN_CALL_FUNCTION_SINGLE_VECTOR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int xen_map_vector(int vector)</div><div class='add'>+{</div><div class='add'>+	int xen_vector;</div><div class='add'>+</div><div class='add'>+	switch (vector) {</div><div class='add'>+	case RESCHEDULE_VECTOR:</div><div class='add'>+		xen_vector = XEN_RESCHEDULE_VECTOR;</div><div class='add'>+		break;</div><div class='add'>+	case CALL_FUNCTION_VECTOR:</div><div class='add'>+		xen_vector = XEN_CALL_FUNCTION_VECTOR;</div><div class='add'>+		break;</div><div class='add'>+	case CALL_FUNCTION_SINGLE_VECTOR:</div><div class='add'>+		xen_vector = XEN_CALL_FUNCTION_SINGLE_VECTOR;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_WORK_VECTOR:</div><div class='add'>+		xen_vector = XEN_IRQ_WORK_VECTOR;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		xen_vector = -1;</div><div class='add'>+		printk(KERN_ERR "xen: vector 0x%x is not implemented\n",</div><div class='add'>+			vector);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return xen_vector;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xen_send_IPI_mask(const struct cpumask *mask,</div><div class='add'>+			      int vector)</div><div class='add'>+{</div><div class='add'>+	int xen_vector = xen_map_vector(vector);</div><div class='add'>+</div><div class='add'>+	if (xen_vector &gt;= 0)</div><div class='add'>+		__xen_send_IPI_mask(mask, xen_vector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xen_send_IPI_all(int vector)</div><div class='add'>+{</div><div class='add'>+	int xen_vector = xen_map_vector(vector);</div><div class='add'>+</div><div class='add'>+	if (xen_vector &gt;= 0)</div><div class='add'>+		__xen_send_IPI_mask(cpu_online_mask, xen_vector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xen_send_IPI_self(int vector)</div><div class='add'>+{</div><div class='add'>+	int xen_vector = xen_map_vector(vector);</div><div class='add'>+</div><div class='add'>+	if (xen_vector &gt;= 0)</div><div class='add'>+		xen_send_IPI_one(smp_processor_id(), xen_vector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xen_send_IPI_mask_allbutself(const struct cpumask *mask,</div><div class='add'>+				int vector)</div><div class='add'>+{</div><div class='add'>+	unsigned cpu;</div><div class='add'>+	unsigned int this_cpu = smp_processor_id();</div><div class='add'>+</div><div class='add'>+	if (!(num_online_cpus() &gt; 1))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for_each_cpu_and(cpu, mask, cpu_online_mask) {</div><div class='add'>+		if (this_cpu == cpu)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		xen_smp_send_call_function_single_ipi(cpu);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xen_send_IPI_allbutself(int vector)</div><div class='add'>+{</div><div class='add'>+	int xen_vector = xen_map_vector(vector);</div><div class='add'>+</div><div class='add'>+	if (xen_vector &gt;= 0)</div><div class='add'>+		xen_send_IPI_mask_allbutself(cpu_online_mask, xen_vector);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static irqreturn_t xen_call_function_interrupt(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	irq_enter();</div><div class='hunk'>@@ -530,6 +612,16 @@ static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static irqreturn_t xen_irq_work_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	irq_enter();</div><div class='add'>+	irq_work_run();</div><div class='add'>+	inc_irq_stat(apic_irq_work_irqs);</div><div class='add'>+	irq_exit();</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct smp_ops xen_smp_ops __initconst = {</div><div class='ctx'> 	.smp_prepare_boot_cpu = xen_smp_prepare_boot_cpu,</div><div class='ctx'> 	.smp_prepare_cpus = xen_smp_prepare_cpus,</div><div class='hunk'>@@ -562,10 +654,10 @@ static void __init xen_hvm_smp_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 	xen_init_lock_cpu(0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __cpuinit xen_hvm_cpu_up(unsigned int cpu)</div><div class='add'>+static int __cpuinit xen_hvm_cpu_up(unsigned int cpu, struct task_struct *tidle)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='del'>-	rc = native_cpu_up(cpu);</div><div class='add'>+	rc = native_cpu_up(cpu, tidle);</div><div class='ctx'> 	WARN_ON (xen_smp_intr_init(cpu));</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='hunk'>@@ -576,6 +668,7 @@ static void xen_hvm_cpu_die(unsigned int cpu)</div><div class='ctx'> 	unbind_from_irqhandler(per_cpu(xen_callfunc_irq, cpu), NULL);</div><div class='ctx'> 	unbind_from_irqhandler(per_cpu(xen_debug_irq, cpu), NULL);</div><div class='ctx'> 	unbind_from_irqhandler(per_cpu(xen_callfuncsingle_irq, cpu), NULL);</div><div class='add'>+	unbind_from_irqhandler(per_cpu(xen_irq_work, cpu), NULL);</div><div class='ctx'> 	native_cpu_die(cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/xen/smp.h b/arch/x86/xen/smp.h<br/>new file mode 100644<br/>index 000000000000..8981a76d081a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/smp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/smp.h</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+#ifndef _XEN_SMP_H</div><div class='add'>+</div><div class='add'>+extern void xen_send_IPI_mask(const struct cpumask *mask,</div><div class='add'>+			      int vector);</div><div class='add'>+extern void xen_send_IPI_mask_allbutself(const struct cpumask *mask,</div><div class='add'>+				int vector);</div><div class='add'>+extern void xen_send_IPI_allbutself(int vector);</div><div class='add'>+extern void physflat_send_IPI_allbutself(int vector);</div><div class='add'>+extern void xen_send_IPI_all(int vector);</div><div class='add'>+extern void xen_send_IPI_self(int vector);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c<br/>index d69cc6c3f808..83e866d714ce 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/spinlock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/xen/spinlock.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/spinlock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/spinlock.c</a></div><div class='hunk'>@@ -440,12 +440,12 @@ static int __init xen_spinlock_debugfs(void)</div><div class='ctx'> 	debugfs_create_u64("time_total", 0444, d_spin_debug,</div><div class='ctx'> 			   &amp;spinlock_stats.time_total);</div><div class='ctx'> </div><div class='del'>-	xen_debugfs_create_u32_array("histo_total", 0444, d_spin_debug,</div><div class='del'>-				     spinlock_stats.histo_spin_total, HISTO_BUCKETS + 1);</div><div class='del'>-	xen_debugfs_create_u32_array("histo_spinning", 0444, d_spin_debug,</div><div class='del'>-				     spinlock_stats.histo_spin_spinning, HISTO_BUCKETS + 1);</div><div class='del'>-	xen_debugfs_create_u32_array("histo_blocked", 0444, d_spin_debug,</div><div class='del'>-				     spinlock_stats.histo_spin_blocked, HISTO_BUCKETS + 1);</div><div class='add'>+	debugfs_create_u32_array("histo_total", 0444, d_spin_debug,</div><div class='add'>+				spinlock_stats.histo_spin_total, HISTO_BUCKETS + 1);</div><div class='add'>+	debugfs_create_u32_array("histo_spinning", 0444, d_spin_debug,</div><div class='add'>+				spinlock_stats.histo_spin_spinning, HISTO_BUCKETS + 1);</div><div class='add'>+	debugfs_create_u32_array("histo_blocked", 0444, d_spin_debug,</div><div class='add'>+				spinlock_stats.histo_spin_blocked, HISTO_BUCKETS + 1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/xen/xen-asm_32.S b/arch/x86/xen/xen-asm_32.S<br/>index b040b0e518ca..f9643fc50de5 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/xen-asm_32.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/xen/xen-asm_32.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/xen-asm_32.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/xen-asm_32.S</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='ctx'> #include &lt;asm/processor-flags.h&gt;</div><div class='ctx'> #include &lt;asm/segment.h&gt;</div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;xen/interface/xen.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -137,10 +138,7 @@ iret_restore_end:</div><div class='ctx'> </div><div class='ctx'> 1:	iret</div><div class='ctx'> xen_iret_end_crit:</div><div class='del'>-.section __ex_table, "a"</div><div class='del'>-	.align 4</div><div class='del'>-	.long 1b, iret_exc</div><div class='del'>-.previous</div><div class='add'>+	_ASM_EXTABLE(1b, iret_exc)</div><div class='ctx'> </div><div class='ctx'> hyper_iret:</div><div class='ctx'> 	/* put this out of line since its very rarely used */</div><div class='head'>diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h<br/>index b095739ccd4c..202d4c150154 100644<br/>--- a/<a href='/drm-misc/tree/arch/x86/xen/xen-ops.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/x86/xen/xen-ops.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/x86/xen/xen-ops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/x86/xen/xen-ops.h</a></div><div class='hunk'>@@ -28,7 +28,6 @@ void xen_setup_shared_info(void);</div><div class='ctx'> void xen_build_mfn_list_list(void);</div><div class='ctx'> void xen_setup_machphys_mapping(void);</div><div class='ctx'> pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn);</div><div class='del'>-void xen_ident_map_ISA(void);</div><div class='ctx'> void xen_reserve_top(void);</div><div class='ctx'> extern unsigned long xen_max_p2m_pfn;</div><div class='ctx'> </div><div class='hunk'>@@ -92,11 +91,15 @@ struct dom0_vga_console_info;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_XEN_DOM0</div><div class='ctx'> void __init xen_init_vga(const struct dom0_vga_console_info *, size_t size);</div><div class='add'>+void __init xen_init_apic(void);</div><div class='ctx'> #else</div><div class='ctx'> static inline void __init xen_init_vga(const struct dom0_vga_console_info *info,</div><div class='ctx'> 				       size_t size)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='add'>+static inline void __init xen_init_apic(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* Declare an asm function, along with symbols needed to make it</div><div class='head'>diff --git a/arch/xtensa/configs/common_defconfig b/arch/xtensa/configs/common_defconfig<br/>index b90038e40dd3..a182a4e6d688 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/configs/common_defconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/configs/common_defconfig</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/configs/common_defconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/configs/common_defconfig</a></div><div class='hunk'>@@ -333,11 +333,6 @@ CONFIG_XT2000_SONIC=y</div><div class='ctx'> # CONFIG_S2IO is not set</div><div class='ctx'> </div><div class='ctx'> #</div><div class='del'>-# Token Ring devices</div><div class='del'>-#</div><div class='del'>-# CONFIG_TR is not set</div><div class='del'>-</div><div class='del'>-#</div><div class='ctx'> # Wireless LAN (non-hamradio)</div><div class='ctx'> #</div><div class='ctx'> CONFIG_NET_RADIO=y</div><div class='head'>diff --git a/arch/xtensa/include/asm/gpio.h b/arch/xtensa/include/asm/gpio.h<br/>index a8c9fc46c790..b3799d88ffcf 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/include/asm/gpio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/include/asm/gpio.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/include/asm/gpio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/gpio.h</a></div><div class='hunk'>@@ -1,56 +1,4 @@</div><div class='del'>-/*</div><div class='del'>- * Generic GPIO API implementation for xtensa.</div><div class='del'>- *</div><div class='del'>- * Stolen from x86, which is derived from the generic GPIO API for powerpc:</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2007-2008  MontaVista Software, Inc.</div><div class='del'>- *</div><div class='del'>- * Author: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _ASM_XTENSA_GPIO_H</div><div class='del'>-#define _ASM_XTENSA_GPIO_H</div><div class='del'>-</div><div class='del'>-#include &lt;asm-generic/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_GPIOLIB</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Just call gpiolib.</div><div class='del'>- */</div><div class='del'>-static inline int gpio_get_value(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_get_value(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void gpio_set_value(unsigned int gpio, int value)</div><div class='del'>-{</div><div class='del'>-	__gpio_set_value(gpio, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_cansleep(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_cansleep(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int gpio_to_irq(unsigned int gpio)</div><div class='del'>-{</div><div class='del'>-	return __gpio_to_irq(gpio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Not implemented, yet.</div><div class='del'>- */</div><div class='del'>-static inline int irq_to_gpio(unsigned int irq)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_GPIOLIB */</div><div class='del'>-</div><div class='del'>-#endif /* _ASM_XTENSA_GPIO_H */</div><div class='add'>+#ifndef __LINUX_GPIO_H</div><div class='add'>+#warning Include linux/gpio.h instead of asm/gpio.h</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/xtensa/include/asm/kvm_para.h b/arch/xtensa/include/asm/kvm_para.h<br/>new file mode 100644<br/>index 000000000000..14fab8f0b957<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/include/asm/kvm_para.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/kvm_para.h</a></div><div class='hunk'>@@ -0,0 +1 @@</div><div class='add'>+#include &lt;asm-generic/kvm_para.h&gt;</div><div class='head'>diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h<br/>index 3acb26e8dead..5c371d8d4528 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/include/asm/processor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/include/asm/processor.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/include/asm/processor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/processor.h</a></div><div class='hunk'>@@ -168,9 +168,6 @@ struct mm_struct;</div><div class='ctx'> /* Free all resources held by a thread. */</div><div class='ctx'> #define release_thread(thread) do { } while(0)</div><div class='ctx'> </div><div class='del'>-/* Prepare to copy thread state - unlazy all lazy status */</div><div class='del'>-extern void prepare_to_copy(struct task_struct*);</div><div class='del'>-</div><div class='ctx'> /* Create a kernel thread without removing it from tasklists */</div><div class='ctx'> extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/xtensa/include/asm/signal.h b/arch/xtensa/include/asm/signal.h<br/>index 633ba73bc4d2..7f201b9d4195 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/include/asm/signal.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/include/asm/signal.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/include/asm/signal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/signal.h</a></div><div class='hunk'>@@ -120,13 +120,6 @@ typedef void (*__sighandler_t)(int);</div><div class='ctx'> #define SIG_ERR	((__sighandler_t)-1)	/* error return from signal */</div><div class='ctx'> </div><div class='ctx'> #ifdef __KERNEL__</div><div class='del'>-struct old_sigaction {</div><div class='del'>-	__sighandler_t sa_handler;</div><div class='del'>-	old_sigset_t sa_mask;</div><div class='del'>-	unsigned long sa_flags;</div><div class='del'>-	void (*sa_restorer)(void);</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct sigaction {</div><div class='ctx'> 	__sighandler_t sa_handler;</div><div class='ctx'> 	unsigned long sa_flags;</div><div class='head'>diff --git a/arch/xtensa/include/asm/syscall.h b/arch/xtensa/include/asm/syscall.h<br/>index efcf33b92e4c..c1dacca312f3 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/include/asm/syscall.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/include/asm/syscall.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/include/asm/syscall.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/syscall.h</a></div><div class='hunk'>@@ -15,10 +15,6 @@ asmlinkage long xtensa_clone(unsigned long, unsigned long, struct pt_regs*);</div><div class='ctx'> asmlinkage long xtensa_ptrace(long, long, long, long);</div><div class='ctx'> asmlinkage long xtensa_sigreturn(struct pt_regs*);</div><div class='ctx'> asmlinkage long xtensa_rt_sigreturn(struct pt_regs*);</div><div class='del'>-asmlinkage long xtensa_sigsuspend(struct pt_regs*);</div><div class='del'>-asmlinkage long xtensa_rt_sigsuspend(struct pt_regs*);</div><div class='del'>-asmlinkage long xtensa_sigaction(int, const struct old_sigaction*,</div><div class='del'>-				 struct old_sigaction*);</div><div class='ctx'> asmlinkage long xtensa_sigaltstack(struct pt_regs *regs);</div><div class='ctx'> asmlinkage long sys_rt_sigaction(int,</div><div class='ctx'> 				 const struct sigaction __user *,</div><div class='hunk'>@@ -35,5 +31,5 @@ asmlinkage long sys_pselect6(int n, fd_set __user *inp, fd_set __user *outp,</div><div class='ctx'> asmlinkage long sys_ppoll(struct pollfd __user *ufds, unsigned int nfds,</div><div class='ctx'> 	struct timespec __user *tsp, const sigset_t __user *sigmask,</div><div class='ctx'> 	size_t sigsetsize);</div><div class='del'>-</div><div class='del'>-</div><div class='add'>+asmlinkage long sys_rt_sigsuspend(sigset_t __user *unewset,</div><div class='add'>+		size_t sigsetsize);</div><div class='head'>diff --git a/arch/xtensa/include/asm/thread_info.h b/arch/xtensa/include/asm/thread_info.h<br/>index 6abbedd09d85..81abfd5d01ac 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/include/asm/thread_info.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/include/asm/thread_info.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/include/asm/thread_info.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/thread_info.h</a></div><div class='hunk'>@@ -131,6 +131,7 @@ static inline struct thread_info *current_thread_info(void)</div><div class='ctx'> #define TIF_IRET		4	/* return with iret */</div><div class='ctx'> #define TIF_MEMDIE		5	/* is terminating due to OOM killer */</div><div class='ctx'> #define TIF_RESTORE_SIGMASK	6	/* restore signal mask in do_signal() */</div><div class='add'>+#define TIF_NOTIFY_RESUME	7	/* callback before returning to user */</div><div class='ctx'> #define TIF_POLLING_NRFLAG	16	/* true if poll_idle() is polling TIF_NEED_RESCHED */</div><div class='ctx'> </div><div class='ctx'> #define _TIF_SYSCALL_TRACE	(1&lt;&lt;TIF_SYSCALL_TRACE)</div><div class='head'>diff --git a/arch/xtensa/include/asm/unistd.h b/arch/xtensa/include/asm/unistd.h<br/>index 798ee6d285a1..bc7e005faa60 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/include/asm/unistd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/include/asm/unistd.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/include/asm/unistd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/include/asm/unistd.h</a></div><div class='hunk'>@@ -507,7 +507,7 @@ __SYSCALL(229, sys_rt_sigtimedwait, 4)</div><div class='ctx'> #define __NR_rt_sigqueueinfo 			230</div><div class='ctx'> __SYSCALL(230, sys_rt_sigqueueinfo, 3)</div><div class='ctx'> #define __NR_rt_sigsuspend 			231</div><div class='del'>-__SYSCALL(231, xtensa_rt_sigsuspend, 2)</div><div class='add'>+__SYSCALL(231, sys_rt_sigsuspend, 2)</div><div class='ctx'> </div><div class='ctx'> /* Message */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/xtensa/kernel/Makefile b/arch/xtensa/kernel/Makefile<br/>index 2d2728b3e862..59fc3fe15572 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/kernel/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/kernel/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/kernel/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/kernel/Makefile</a></div><div class='hunk'>@@ -6,7 +6,7 @@ extra-y := head.o vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y := align.o entry.o irq.o coprocessor.o process.o ptrace.o \</div><div class='ctx'> 	 setup.o signal.o syscall.o time.o traps.o vectors.o platform.o  \</div><div class='del'>-	 pci-dma.o init_task.o io.o</div><div class='add'>+	 pci-dma.o io.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_KGDB) += xtensa-stub.o</div><div class='ctx'> obj-$(CONFIG_PCI) += pci.o</div><div class='head'>diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S<br/>index 6223f3346b5c..7e6236073397 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/kernel/entry.S?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/kernel/entry.S</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/kernel/entry.S?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/kernel/entry.S</a></div><div class='hunk'>@@ -409,16 +409,16 @@ common_exception_return:</div><div class='ctx'> 	l32i	a4, a2, TI_FLAGS</div><div class='ctx'> </div><div class='ctx'> 	_bbsi.l	a4, TIF_NEED_RESCHED, 3f</div><div class='add'>+	_bbsi.l	a4, TIF_NOTIFY_RESUME, 2f</div><div class='ctx'> 	_bbci.l	a4, TIF_SIGPENDING, 4f</div><div class='ctx'> </div><div class='del'>-	l32i	a4, a1, PT_DEPC</div><div class='add'>+2:	l32i	a4, a1, PT_DEPC</div><div class='ctx'> 	bgeui	a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f</div><div class='ctx'> </div><div class='ctx'> 	/* Call do_signal() */</div><div class='ctx'> </div><div class='del'>-	movi	a4, do_signal	# int do_signal(struct pt_regs*, sigset_t*)</div><div class='add'>+	movi	a4, do_notify_resume	# int do_notify_resume(struct pt_regs*)</div><div class='ctx'> 	mov	a6, a1</div><div class='del'>-	movi	a7, 0</div><div class='ctx'> 	callx4	a4</div><div class='ctx'> 	j	1b</div><div class='ctx'> </div><div class='head'>diff --git a/arch/xtensa/kernel/init_task.c b/arch/xtensa/kernel/init_task.c<br/>deleted file mode 100644<br/>index cd122fb7e48a..000000000000<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/kernel/init_task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/kernel/init_task.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,31 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * arch/xtensa/kernel/init_task.c</div><div class='del'>- *</div><div class='del'>- * Xtensa Processor version.</div><div class='del'>- *</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License.  See the file "COPYING" in the main directory of this archive</div><div class='del'>- * for more details.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2007 Tensilica Inc.</div><div class='del'>- *</div><div class='del'>- * Chris Zankel &lt;chris@zankel.net&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/init_task.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mqueue.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);</div><div class='del'>-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);</div><div class='del'>-union thread_union init_thread_union __init_task_data =</div><div class='del'>-	{ INIT_THREAD_INFO(init_task) };</div><div class='del'>-</div><div class='del'>-struct task_struct init_task = INIT_TASK(init_task);</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(init_task);</div><div class='head'>diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c<br/>index 6a2d6edf8f72..9b306e550e3f 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/kernel/process.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/kernel/process.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/kernel/process.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/kernel/process.c</a></div><div class='hunk'>@@ -140,13 +140,16 @@ void flush_thread(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * This is called before the thread is copied. </div><div class='add'>+ * this gets called so that we can store coprocessor state into memory and</div><div class='add'>+ * copy the current task into the new thread.</div><div class='ctx'>  */</div><div class='del'>-void prepare_to_copy(struct task_struct *tsk)</div><div class='add'>+int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> {</div><div class='ctx'> #if XTENSA_HAVE_COPROCESSORS</div><div class='del'>-	coprocessor_flush_all(task_thread_info(tsk));</div><div class='add'>+	coprocessor_flush_all(task_thread_info(src));</div><div class='ctx'> #endif</div><div class='add'>+	*dst = *src;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/xtensa/kernel/signal.c b/arch/xtensa/kernel/signal.c<br/>index d78869a00b11..efe4e854b3cd 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/kernel/signal.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/kernel/signal.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/kernel/signal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/kernel/signal.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/personality.h&gt;</div><div class='ctx'> #include &lt;linux/freezer.h&gt;</div><div class='add'>+#include &lt;linux/tracehook.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/ucontext.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='hunk'>@@ -29,10 +30,6 @@</div><div class='ctx'> </div><div class='ctx'> #define DEBUG_SIG  0</div><div class='ctx'> </div><div class='del'>-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))</div><div class='del'>-</div><div class='del'>-asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset);</div><div class='del'>-</div><div class='ctx'> extern struct task_struct *coproc_owners[];</div><div class='ctx'> </div><div class='ctx'> struct rt_sigframe</div><div class='hunk'>@@ -248,6 +245,9 @@ asmlinkage long xtensa_rt_sigreturn(long a0, long a1, long a2, long a3,</div><div class='ctx'> 	sigset_t set;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	/* Always make any pending restarted system calls return -EINTR */</div><div class='add'>+	current_thread_info()-&gt;restart_block.fn = do_no_restart_syscall;</div><div class='add'>+</div><div class='ctx'> 	if (regs-&gt;depc &gt; 64)</div><div class='ctx'> 		panic("rt_sigreturn in double exception!\n");</div><div class='ctx'> </div><div class='hunk'>@@ -259,7 +259,6 @@ asmlinkage long xtensa_rt_sigreturn(long a0, long a1, long a2, long a3,</div><div class='ctx'> 	if (__copy_from_user(&amp;set, &amp;frame-&gt;uc.uc_sigmask, sizeof(set)))</div><div class='ctx'> 		goto badframe;</div><div class='ctx'> </div><div class='del'>-	sigdelsetmask(&amp;set, ~_BLOCKABLE);</div><div class='ctx'> 	set_current_blocked(&amp;set);</div><div class='ctx'> </div><div class='ctx'> 	if (restore_sigcontext(regs, frame))</div><div class='hunk'>@@ -426,37 +425,6 @@ give_sigsegv:</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Atomically swap in the new signal mask, and wait for a signal.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-asmlinkage long xtensa_rt_sigsuspend(sigset_t __user *unewset, </div><div class='del'>-    				     size_t sigsetsize,</div><div class='del'>-    				     long a2, long a3, long a4, long a5, </div><div class='del'>-				     struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	sigset_t saveset, newset;</div><div class='del'>-</div><div class='del'>-	/* XXX: Don't preclude handling different sized sigset_t's.  */</div><div class='del'>-	if (sigsetsize != sizeof(sigset_t))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;newset, unewset, sizeof(newset)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	sigdelsetmask(&amp;newset, ~_BLOCKABLE);</div><div class='del'>-	saveset = current-&gt;blocked;</div><div class='del'>-	set_current_blocked(&amp;newset);</div><div class='del'>-</div><div class='del'>-	regs-&gt;areg[2] = -EINTR;</div><div class='del'>-	while (1) {</div><div class='del'>-		current-&gt;state = TASK_INTERRUPTIBLE;</div><div class='del'>-		schedule();</div><div class='del'>-		if (do_signal(regs, &amp;saveset))</div><div class='del'>-			return -EINTR;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> asmlinkage long xtensa_sigaltstack(const stack_t __user *uss, </div><div class='ctx'> 				   stack_t __user *uoss,</div><div class='ctx'>     				   long a2, long a3, long a4, long a5,</div><div class='hunk'>@@ -476,21 +444,12 @@ asmlinkage long xtensa_sigaltstack(const stack_t __user *uss,</div><div class='ctx'>  * the kernel can handle, and then we build all the user-level signal handling</div><div class='ctx'>  * stack-frames in one go after that.</div><div class='ctx'>  */</div><div class='del'>-int do_signal(struct pt_regs *regs, sigset_t *oldset)</div><div class='add'>+static void do_signal(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	siginfo_t info;</div><div class='ctx'> 	int signr;</div><div class='ctx'> 	struct k_sigaction ka;</div><div class='ctx'> </div><div class='del'>-	if (!user_mode(regs))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (try_to_freeze())</div><div class='del'>-		goto no_signal;</div><div class='del'>-</div><div class='del'>-	if (!oldset)</div><div class='del'>-		oldset = &amp;current-&gt;blocked;</div><div class='del'>-</div><div class='ctx'> 	task_pt_regs(current)-&gt;icountlevel = 0;</div><div class='ctx'> </div><div class='ctx'> 	signr = get_signal_to_deliver(&amp;info, &amp;ka, regs, NULL);</div><div class='hunk'>@@ -530,18 +489,17 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset)</div><div class='ctx'> </div><div class='ctx'> 		/* Whee!  Actually deliver the signal.  */</div><div class='ctx'> 		/* Set up the stack frame */</div><div class='del'>-		ret = setup_frame(signr, &amp;ka, &amp;info, oldset, regs);</div><div class='add'>+		ret = setup_frame(signr, &amp;ka, &amp;info, sigmask_to_save(), regs);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+			return;</div><div class='ctx'> </div><div class='del'>-		block_sigmask(&amp;ka, signr);</div><div class='add'>+		signal_delivered(signr, &amp;info, &amp;ka, regs, 0);</div><div class='ctx'> 		if (current-&gt;ptrace &amp; PT_SINGLESTEP)</div><div class='ctx'> 			task_pt_regs(current)-&gt;icountlevel = 1;</div><div class='ctx'> </div><div class='del'>-		return 1;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-no_signal:</div><div class='ctx'> 	/* Did we come from a system call? */</div><div class='ctx'> 	if ((signed) regs-&gt;syscall &gt;= 0) {</div><div class='ctx'> 		/* Restart the system call - no handlers present */</div><div class='hunk'>@@ -558,8 +516,23 @@ no_signal:</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* If there's no signal to deliver, we just restore the saved mask.  */</div><div class='add'>+	restore_saved_sigmask();</div><div class='add'>+</div><div class='ctx'> 	if (current-&gt;ptrace &amp; PT_SINGLESTEP)</div><div class='ctx'> 		task_pt_regs(current)-&gt;icountlevel = 1;</div><div class='del'>-	return 0;</div><div class='add'>+	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void do_notify_resume(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	if (!user_mode(regs))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (test_thread_flag(TIF_SIGPENDING))</div><div class='add'>+		do_signal(regs);</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_thread_flag(TIF_NOTIFY_RESUME))</div><div class='add'>+		tracehook_notify_resume(regs);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/xtensa/variants/s6000/dmac.c b/arch/xtensa/variants/s6000/dmac.c<br/>index dc7f7c573518..340f5bb0b5ef 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/variants/s6000/dmac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/variants/s6000/dmac.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/variants/s6000/dmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/variants/s6000/dmac.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Authors:	Oskar Schirmer &lt;os@emlix.com&gt;</div><div class='add'>+ * Authors:	Oskar Schirmer &lt;oskar@scara.com&gt;</div><div class='ctx'>  *		Daniel Gloeckner &lt;dg@emlix.com&gt;</div><div class='ctx'>  * (c) 2008 emlix GmbH http://www.emlix.com</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/xtensa/variants/s6000/gpio.c b/arch/xtensa/variants/s6000/gpio.c<br/>index 7af0757e001b..b89541ba39ab 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/variants/s6000/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/variants/s6000/gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/variants/s6000/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/variants/s6000/gpio.c</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'>  * s6000 gpio driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2009 emlix GmbH</div><div class='del'>- * Authors:	Oskar Schirmer &lt;os@emlix.com&gt;</div><div class='del'>- *		Johannes Weiner &lt;jw@emlix.com&gt;</div><div class='add'>+ * Authors:	Oskar Schirmer &lt;oskar@scara.com&gt;</div><div class='add'>+ *		Johannes Weiner &lt;hannes@cmpxchg.org&gt;</div><div class='ctx'>  *		Daniel Gloeckner &lt;dg@emlix.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='head'>diff --git a/arch/xtensa/variants/s6000/include/variant/dmac.h b/arch/xtensa/variants/s6000/include/variant/dmac.h<br/>index e81735b2a206..3f88d9fc6897 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/variants/s6000/include/variant/dmac.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/variants/s6000/include/variant/dmac.h</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/variants/s6000/include/variant/dmac.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/variants/s6000/include/variant/dmac.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'>  * Copyright (C) 2006 Tensilica Inc.</div><div class='ctx'>  * Copyright (C) 2008 Emlix GmbH &lt;info@emlix.com&gt;</div><div class='ctx'>  * Authors:	Fabian Godehardt &lt;fg@emlix.com&gt;</div><div class='del'>- *		Oskar Schirmer &lt;os@emlix.com&gt;</div><div class='add'>+ *		Oskar Schirmer &lt;oskar@scara.com&gt;</div><div class='ctx'>  *		Daniel Gloeckner &lt;dg@emlix.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/xtensa/variants/s6000/irq.c b/arch/xtensa/variants/s6000/irq.c<br/>index 6651e3285fcf..81a241e79075 100644<br/>--- a/<a href='/drm-misc/tree/arch/xtensa/variants/s6000/irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>arch/xtensa/variants/s6000/irq.c</a><br/>+++ b/<a href='/drm-misc/tree/arch/xtensa/variants/s6000/irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>arch/xtensa/variants/s6000/irq.c</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'>  * s6000 irq crossbar</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2009 emlix GmbH</div><div class='del'>- * Authors:	Johannes Weiner &lt;jw@emlix.com&gt;</div><div class='del'>- *		Oskar Schirmer &lt;os@emlix.com&gt;</div><div class='add'>+ * Authors:	Johannes Weiner &lt;hannes@cmpxchg.org&gt;</div><div class='add'>+ *		Oskar Schirmer &lt;oskar@scara.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='head'>diff --git a/block/Kconfig.iosched b/block/Kconfig.iosched<br/>index 3199b76f795d..421bef9c4c48 100644<br/>--- a/<a href='/drm-misc/tree/block/Kconfig.iosched?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/Kconfig.iosched</a><br/>+++ b/<a href='/drm-misc/tree/block/Kconfig.iosched?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/Kconfig.iosched</a></div><div class='hunk'>@@ -23,8 +23,6 @@ config IOSCHED_DEADLINE</div><div class='ctx'> </div><div class='ctx'> config IOSCHED_CFQ</div><div class='ctx'> 	tristate "CFQ I/O scheduler"</div><div class='del'>-	# If BLK_CGROUP is a module, CFQ has to be built as module.</div><div class='del'>-	depends on (BLK_CGROUP=m &amp;&amp; m) || !BLK_CGROUP || BLK_CGROUP=y</div><div class='ctx'> 	default y</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  The CFQ I/O scheduler tries to distribute bandwidth equally</div><div class='hunk'>@@ -34,8 +32,6 @@ config IOSCHED_CFQ</div><div class='ctx'> </div><div class='ctx'> 	  This is the default I/O scheduler.</div><div class='ctx'> </div><div class='del'>-	  Note: If BLK_CGROUP=m, then CFQ can be built only as module.</div><div class='del'>-</div><div class='ctx'> config CFQ_GROUP_IOSCHED</div><div class='ctx'> 	bool "CFQ Group Scheduling support"</div><div class='ctx'> 	depends on IOSCHED_CFQ &amp;&amp; BLK_CGROUP</div><div class='head'>diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c<br/>index ea84a23d5e68..02cf6335e9bd 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-cgroup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/blk-cgroup.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-cgroup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk-cgroup.c</a></div><div class='hunk'>@@ -11,1679 +11,906 @@</div><div class='ctx'>  * 	              Nauman Rafique &lt;nauman@google.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/ioprio.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/kdev_t.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/blkdev.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include "blk-cgroup.h"</div><div class='ctx'> #include &lt;linux/genhd.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/atomic.h&gt;</div><div class='add'>+#include "blk-cgroup.h"</div><div class='add'>+#include "blk.h"</div><div class='ctx'> </div><div class='ctx'> #define MAX_KEY_LEN 100</div><div class='ctx'> </div><div class='del'>-static DEFINE_SPINLOCK(blkio_list_lock);</div><div class='del'>-static LIST_HEAD(blkio_list);</div><div class='add'>+static DEFINE_MUTEX(blkcg_pol_mutex);</div><div class='ctx'> </div><div class='del'>-struct blkio_cgroup blkio_root_cgroup = { .weight = 2*BLKIO_WEIGHT_DEFAULT };</div><div class='del'>-EXPORT_SYMBOL_GPL(blkio_root_cgroup);</div><div class='add'>+struct blkcg blkcg_root = { .cfq_weight = 2 * CFQ_WEIGHT_DEFAULT };</div><div class='add'>+EXPORT_SYMBOL_GPL(blkcg_root);</div><div class='ctx'> </div><div class='del'>-static struct cgroup_subsys_state *blkiocg_create(struct cgroup *);</div><div class='del'>-static int blkiocg_can_attach(struct cgroup *, struct cgroup_taskset *);</div><div class='del'>-static void blkiocg_attach(struct cgroup *, struct cgroup_taskset *);</div><div class='del'>-static void blkiocg_destroy(struct cgroup *);</div><div class='del'>-static int blkiocg_populate(struct cgroup_subsys *, struct cgroup *);</div><div class='add'>+static struct blkcg_policy *blkcg_policy[BLKCG_MAX_POLS];</div><div class='ctx'> </div><div class='del'>-/* for encoding cft-&gt;private value on file */</div><div class='del'>-#define BLKIOFILE_PRIVATE(x, val)	(((x) &lt;&lt; 16) | (val))</div><div class='del'>-/* What policy owns the file, proportional or throttle */</div><div class='del'>-#define BLKIOFILE_POLICY(val)		(((val) &gt;&gt; 16) &amp; 0xffff)</div><div class='del'>-#define BLKIOFILE_ATTR(val)		((val) &amp; 0xffff)</div><div class='del'>-</div><div class='del'>-struct cgroup_subsys blkio_subsys = {</div><div class='del'>-	.name = "blkio",</div><div class='del'>-	.create = blkiocg_create,</div><div class='del'>-	.can_attach = blkiocg_can_attach,</div><div class='del'>-	.attach = blkiocg_attach,</div><div class='del'>-	.destroy = blkiocg_destroy,</div><div class='del'>-	.populate = blkiocg_populate,</div><div class='del'>-#ifdef CONFIG_BLK_CGROUP</div><div class='del'>-	/* note: blkio_subsys_id is otherwise defined in blk-cgroup.h */</div><div class='del'>-	.subsys_id = blkio_subsys_id,</div><div class='del'>-#endif</div><div class='del'>-	.use_id = 1,</div><div class='del'>-	.module = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-EXPORT_SYMBOL_GPL(blkio_subsys);</div><div class='del'>-</div><div class='del'>-static inline void blkio_policy_insert_node(struct blkio_cgroup *blkcg,</div><div class='del'>-					    struct blkio_policy_node *pn)</div><div class='add'>+struct blkcg *cgroup_to_blkcg(struct cgroup *cgroup)</div><div class='ctx'> {</div><div class='del'>-	list_add(&amp;pn-&gt;node, &amp;blkcg-&gt;policy_list);</div><div class='add'>+	return container_of(cgroup_subsys_state(cgroup, blkio_subsys_id),</div><div class='add'>+			    struct blkcg, css);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(cgroup_to_blkcg);</div><div class='ctx'> </div><div class='del'>-static inline bool cftype_blkg_same_policy(struct cftype *cft,</div><div class='del'>-			struct blkio_group *blkg)</div><div class='add'>+static struct blkcg *task_blkcg(struct task_struct *tsk)</div><div class='ctx'> {</div><div class='del'>-	enum blkio_policy_id plid = BLKIOFILE_POLICY(cft-&gt;private);</div><div class='del'>-</div><div class='del'>-	if (blkg-&gt;plid == plid)</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return container_of(task_subsys_state(tsk, blkio_subsys_id),</div><div class='add'>+			    struct blkcg, css);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Determines if policy node matches cgroup file being accessed */</div><div class='del'>-static inline bool pn_matches_cftype(struct cftype *cft,</div><div class='del'>-			struct blkio_policy_node *pn)</div><div class='add'>+struct blkcg *bio_blkcg(struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	enum blkio_policy_id plid = BLKIOFILE_POLICY(cft-&gt;private);</div><div class='del'>-	int fileid = BLKIOFILE_ATTR(cft-&gt;private);</div><div class='del'>-</div><div class='del'>-	return (plid == pn-&gt;plid &amp;&amp; fileid == pn-&gt;fileid);</div><div class='add'>+	if (bio &amp;&amp; bio-&gt;bi_css)</div><div class='add'>+		return container_of(bio-&gt;bi_css, struct blkcg, css);</div><div class='add'>+	return task_blkcg(current);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(bio_blkcg);</div><div class='ctx'> </div><div class='del'>-/* Must be called with blkcg-&gt;lock held */</div><div class='del'>-static inline void blkio_policy_delete_node(struct blkio_policy_node *pn)</div><div class='add'>+static bool blkcg_policy_enabled(struct request_queue *q,</div><div class='add'>+				 const struct blkcg_policy *pol)</div><div class='ctx'> {</div><div class='del'>-	list_del(&amp;pn-&gt;node);</div><div class='add'>+	return pol &amp;&amp; test_bit(pol-&gt;plid, q-&gt;blkcg_pols);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Must be called with blkcg-&gt;lock held */</div><div class='del'>-static struct blkio_policy_node *</div><div class='del'>-blkio_policy_search_node(const struct blkio_cgroup *blkcg, dev_t dev,</div><div class='del'>-		enum blkio_policy_id plid, int fileid)</div><div class='add'>+/**</div><div class='add'>+ * blkg_free - free a blkg</div><div class='add'>+ * @blkg: blkg to free</div><div class='add'>+ *</div><div class='add'>+ * Free @blkg which may be partially allocated.</div><div class='add'>+ */</div><div class='add'>+static void blkg_free(struct blkcg_gq *blkg)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_policy_node *pn;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(pn, &amp;blkcg-&gt;policy_list, node) {</div><div class='del'>-		if (pn-&gt;dev == dev &amp;&amp; pn-&gt;plid == plid &amp;&amp; pn-&gt;fileid == fileid)</div><div class='del'>-			return pn;</div><div class='del'>-	}</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='add'>+	if (!blkg)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-struct blkio_cgroup *cgroup_to_blkio_cgroup(struct cgroup *cgroup)</div><div class='del'>-{</div><div class='del'>-	return container_of(cgroup_subsys_state(cgroup, blkio_subsys_id),</div><div class='del'>-			    struct blkio_cgroup, css);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(cgroup_to_blkio_cgroup);</div><div class='add'>+	for (i = 0; i &lt; BLKCG_MAX_POLS; i++) {</div><div class='add'>+		struct blkcg_policy *pol = blkcg_policy[i];</div><div class='add'>+		struct blkg_policy_data *pd = blkg-&gt;pd[i];</div><div class='ctx'> </div><div class='del'>-struct blkio_cgroup *task_blkio_cgroup(struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	return container_of(task_subsys_state(tsk, blkio_subsys_id),</div><div class='del'>-			    struct blkio_cgroup, css);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(task_blkio_cgroup);</div><div class='add'>+		if (!pd)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-static inline void</div><div class='del'>-blkio_update_group_weight(struct blkio_group *blkg, unsigned int weight)</div><div class='del'>-{</div><div class='del'>-	struct blkio_policy_type *blkiop;</div><div class='add'>+		if (pol &amp;&amp; pol-&gt;pd_exit_fn)</div><div class='add'>+			pol-&gt;pd_exit_fn(blkg);</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(blkiop, &amp;blkio_list, list) {</div><div class='del'>-		/* If this policy does not own the blkg, do not send updates */</div><div class='del'>-		if (blkiop-&gt;plid != blkg-&gt;plid)</div><div class='del'>-			continue;</div><div class='del'>-		if (blkiop-&gt;ops.blkio_update_group_weight_fn)</div><div class='del'>-			blkiop-&gt;ops.blkio_update_group_weight_fn(blkg-&gt;key,</div><div class='del'>-							blkg, weight);</div><div class='add'>+		kfree(pd);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	kfree(blkg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void blkio_update_group_bps(struct blkio_group *blkg, u64 bps,</div><div class='del'>-				int fileid)</div><div class='add'>+/**</div><div class='add'>+ * blkg_alloc - allocate a blkg</div><div class='add'>+ * @blkcg: block cgroup the new blkg is associated with</div><div class='add'>+ * @q: request_queue the new blkg is associated with</div><div class='add'>+ *</div><div class='add'>+ * Allocate a new blkg assocating @blkcg and @q.</div><div class='add'>+ */</div><div class='add'>+static struct blkcg_gq *blkg_alloc(struct blkcg *blkcg, struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_policy_type *blkiop;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(blkiop, &amp;blkio_list, list) {</div><div class='del'>-</div><div class='del'>-		/* If this policy does not own the blkg, do not send updates */</div><div class='del'>-		if (blkiop-&gt;plid != blkg-&gt;plid)</div><div class='del'>-			continue;</div><div class='add'>+	struct blkcg_gq *blkg;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-		if (fileid == BLKIO_THROTL_read_bps_device</div><div class='del'>-		    &amp;&amp; blkiop-&gt;ops.blkio_update_group_read_bps_fn)</div><div class='del'>-			blkiop-&gt;ops.blkio_update_group_read_bps_fn(blkg-&gt;key,</div><div class='del'>-								blkg, bps);</div><div class='add'>+	/* alloc and init base part */</div><div class='add'>+	blkg = kzalloc_node(sizeof(*blkg), GFP_ATOMIC, q-&gt;node);</div><div class='add'>+	if (!blkg)</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='del'>-		if (fileid == BLKIO_THROTL_write_bps_device</div><div class='del'>-		    &amp;&amp; blkiop-&gt;ops.blkio_update_group_write_bps_fn)</div><div class='del'>-			blkiop-&gt;ops.blkio_update_group_write_bps_fn(blkg-&gt;key,</div><div class='del'>-								blkg, bps);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void blkio_update_group_iops(struct blkio_group *blkg,</div><div class='del'>-			unsigned int iops, int fileid)</div><div class='del'>-{</div><div class='del'>-	struct blkio_policy_type *blkiop;</div><div class='add'>+	blkg-&gt;q = q;</div><div class='add'>+	INIT_LIST_HEAD(&amp;blkg-&gt;q_node);</div><div class='add'>+	blkg-&gt;blkcg = blkcg;</div><div class='add'>+	blkg-&gt;refcnt = 1;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(blkiop, &amp;blkio_list, list) {</div><div class='add'>+	for (i = 0; i &lt; BLKCG_MAX_POLS; i++) {</div><div class='add'>+		struct blkcg_policy *pol = blkcg_policy[i];</div><div class='add'>+		struct blkg_policy_data *pd;</div><div class='ctx'> </div><div class='del'>-		/* If this policy does not own the blkg, do not send updates */</div><div class='del'>-		if (blkiop-&gt;plid != blkg-&gt;plid)</div><div class='add'>+		if (!blkcg_policy_enabled(q, pol))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (fileid == BLKIO_THROTL_read_iops_device</div><div class='del'>-		    &amp;&amp; blkiop-&gt;ops.blkio_update_group_read_iops_fn)</div><div class='del'>-			blkiop-&gt;ops.blkio_update_group_read_iops_fn(blkg-&gt;key,</div><div class='del'>-								blkg, iops);</div><div class='add'>+		/* alloc per-policy data and attach it to blkg */</div><div class='add'>+		pd = kzalloc_node(pol-&gt;pd_size, GFP_ATOMIC, q-&gt;node);</div><div class='add'>+		if (!pd) {</div><div class='add'>+			blkg_free(blkg);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		if (fileid == BLKIO_THROTL_write_iops_device</div><div class='del'>-		    &amp;&amp; blkiop-&gt;ops.blkio_update_group_write_iops_fn)</div><div class='del'>-			blkiop-&gt;ops.blkio_update_group_write_iops_fn(blkg-&gt;key,</div><div class='del'>-								blkg,iops);</div><div class='add'>+		blkg-&gt;pd[i] = pd;</div><div class='add'>+		pd-&gt;blkg = blkg;</div><div class='ctx'> 	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Add to the appropriate stat variable depending on the request type.</div><div class='del'>- * This should be called with the blkg-&gt;stats_lock held.</div><div class='del'>- */</div><div class='del'>-static void blkio_add_stat(uint64_t *stat, uint64_t add, bool direction,</div><div class='del'>-				bool sync)</div><div class='del'>-{</div><div class='del'>-	if (direction)</div><div class='del'>-		stat[BLKIO_STAT_WRITE] += add;</div><div class='del'>-	else</div><div class='del'>-		stat[BLKIO_STAT_READ] += add;</div><div class='del'>-	if (sync)</div><div class='del'>-		stat[BLKIO_STAT_SYNC] += add;</div><div class='del'>-	else</div><div class='del'>-		stat[BLKIO_STAT_ASYNC] += add;</div><div class='del'>-}</div><div class='add'>+	/* invoke per-policy init */</div><div class='add'>+	for (i = 0; i &lt; BLKCG_MAX_POLS; i++) {</div><div class='add'>+		struct blkcg_policy *pol = blkcg_policy[i];</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Decrements the appropriate stat variable if non-zero depending on the</div><div class='del'>- * request type. Panics on value being zero.</div><div class='del'>- * This should be called with the blkg-&gt;stats_lock held.</div><div class='del'>- */</div><div class='del'>-static void blkio_check_and_dec_stat(uint64_t *stat, bool direction, bool sync)</div><div class='del'>-{</div><div class='del'>-	if (direction) {</div><div class='del'>-		BUG_ON(stat[BLKIO_STAT_WRITE] == 0);</div><div class='del'>-		stat[BLKIO_STAT_WRITE]--;</div><div class='del'>-	} else {</div><div class='del'>-		BUG_ON(stat[BLKIO_STAT_READ] == 0);</div><div class='del'>-		stat[BLKIO_STAT_READ]--;</div><div class='add'>+		if (blkcg_policy_enabled(blkg-&gt;q, pol))</div><div class='add'>+			pol-&gt;pd_init_fn(blkg);</div><div class='ctx'> 	}</div><div class='del'>-	if (sync) {</div><div class='del'>-		BUG_ON(stat[BLKIO_STAT_SYNC] == 0);</div><div class='del'>-		stat[BLKIO_STAT_SYNC]--;</div><div class='del'>-	} else {</div><div class='del'>-		BUG_ON(stat[BLKIO_STAT_ASYNC] == 0);</div><div class='del'>-		stat[BLKIO_STAT_ASYNC]--;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='del'>-/* This should be called with the blkg-&gt;stats_lock held. */</div><div class='del'>-static void blkio_set_start_group_wait_time(struct blkio_group *blkg,</div><div class='del'>-						struct blkio_group *curr_blkg)</div><div class='del'>-{</div><div class='del'>-	if (blkio_blkg_waiting(&amp;blkg-&gt;stats))</div><div class='del'>-		return;</div><div class='del'>-	if (blkg == curr_blkg)</div><div class='del'>-		return;</div><div class='del'>-	blkg-&gt;stats.start_group_wait_time = sched_clock();</div><div class='del'>-	blkio_mark_blkg_waiting(&amp;blkg-&gt;stats);</div><div class='add'>+	return blkg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* This should be called with the blkg-&gt;stats_lock held. */</div><div class='del'>-static void blkio_update_group_wait_time(struct blkio_group_stats *stats)</div><div class='add'>+static struct blkcg_gq *__blkg_lookup(struct blkcg *blkcg,</div><div class='add'>+				      struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	unsigned long long now;</div><div class='add'>+	struct blkcg_gq *blkg;</div><div class='ctx'> </div><div class='del'>-	if (!blkio_blkg_waiting(stats))</div><div class='del'>-		return;</div><div class='add'>+	blkg = rcu_dereference(blkcg-&gt;blkg_hint);</div><div class='add'>+	if (blkg &amp;&amp; blkg-&gt;q == q)</div><div class='add'>+		return blkg;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Hint didn't match.  Look up from the radix tree.  Note that we</div><div class='add'>+	 * may not be holding queue_lock and thus are not sure whether</div><div class='add'>+	 * @blkg from blkg_tree has already been removed or not, so we</div><div class='add'>+	 * can't update hint to the lookup result.  Leave it to the caller.</div><div class='add'>+	 */</div><div class='add'>+	blkg = radix_tree_lookup(&amp;blkcg-&gt;blkg_tree, q-&gt;id);</div><div class='add'>+	if (blkg &amp;&amp; blkg-&gt;q == q)</div><div class='add'>+		return blkg;</div><div class='ctx'> </div><div class='del'>-	now = sched_clock();</div><div class='del'>-	if (time_after64(now, stats-&gt;start_group_wait_time))</div><div class='del'>-		stats-&gt;group_wait_time += now - stats-&gt;start_group_wait_time;</div><div class='del'>-	blkio_clear_blkg_waiting(stats);</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* This should be called with the blkg-&gt;stats_lock held. */</div><div class='del'>-static void blkio_end_empty_time(struct blkio_group_stats *stats)</div><div class='add'>+/**</div><div class='add'>+ * blkg_lookup - lookup blkg for the specified blkcg - q pair</div><div class='add'>+ * @blkcg: blkcg of interest</div><div class='add'>+ * @q: request_queue of interest</div><div class='add'>+ *</div><div class='add'>+ * Lookup blkg for the @blkcg - @q pair.  This function should be called</div><div class='add'>+ * under RCU read lock and is guaranteed to return %NULL if @q is bypassing</div><div class='add'>+ * - see blk_queue_bypass_start() for details.</div><div class='add'>+ */</div><div class='add'>+struct blkcg_gq *blkg_lookup(struct blkcg *blkcg, struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	unsigned long long now;</div><div class='del'>-</div><div class='del'>-	if (!blkio_blkg_empty(stats))</div><div class='del'>-		return;</div><div class='add'>+	WARN_ON_ONCE(!rcu_read_lock_held());</div><div class='ctx'> </div><div class='del'>-	now = sched_clock();</div><div class='del'>-	if (time_after64(now, stats-&gt;start_empty_time))</div><div class='del'>-		stats-&gt;empty_time += now - stats-&gt;start_empty_time;</div><div class='del'>-	blkio_clear_blkg_empty(stats);</div><div class='add'>+	if (unlikely(blk_queue_bypass(q)))</div><div class='add'>+		return NULL;</div><div class='add'>+	return __blkg_lookup(blkcg, q);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(blkg_lookup);</div><div class='ctx'> </div><div class='del'>-void blkiocg_update_set_idle_time_stats(struct blkio_group *blkg)</div><div class='add'>+static struct blkcg_gq *__blkg_lookup_create(struct blkcg *blkcg,</div><div class='add'>+					     struct request_queue *q)</div><div class='add'>+	__releases(q-&gt;queue_lock) __acquires(q-&gt;queue_lock)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct blkcg_gq *blkg;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-	BUG_ON(blkio_blkg_idling(&amp;blkg-&gt;stats));</div><div class='del'>-	blkg-&gt;stats.start_idle_time = sched_clock();</div><div class='del'>-	blkio_mark_blkg_idling(&amp;blkg-&gt;stats);</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_update_set_idle_time_stats);</div><div class='add'>+	WARN_ON_ONCE(!rcu_read_lock_held());</div><div class='add'>+	lockdep_assert_held(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-void blkiocg_update_idle_time_stats(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned long long now;</div><div class='del'>-	struct blkio_group_stats *stats;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-	stats = &amp;blkg-&gt;stats;</div><div class='del'>-	if (blkio_blkg_idling(stats)) {</div><div class='del'>-		now = sched_clock();</div><div class='del'>-		if (time_after64(now, stats-&gt;start_idle_time))</div><div class='del'>-			stats-&gt;idle_time += now - stats-&gt;start_idle_time;</div><div class='del'>-		blkio_clear_blkg_idling(stats);</div><div class='add'>+	/* lookup and update hint on success, see __blkg_lookup() for details */</div><div class='add'>+	blkg = __blkg_lookup(blkcg, q);</div><div class='add'>+	if (blkg) {</div><div class='add'>+		rcu_assign_pointer(blkcg-&gt;blkg_hint, blkg);</div><div class='add'>+		return blkg;</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_update_idle_time_stats);</div><div class='ctx'> </div><div class='del'>-void blkiocg_update_avg_queue_size_stats(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct blkio_group_stats *stats;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-	stats = &amp;blkg-&gt;stats;</div><div class='del'>-	stats-&gt;avg_queue_size_sum +=</div><div class='del'>-			stats-&gt;stat_arr[BLKIO_STAT_QUEUED][BLKIO_STAT_READ] +</div><div class='del'>-			stats-&gt;stat_arr[BLKIO_STAT_QUEUED][BLKIO_STAT_WRITE];</div><div class='del'>-	stats-&gt;avg_queue_size_samples++;</div><div class='del'>-	blkio_update_group_wait_time(stats);</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_update_avg_queue_size_stats);</div><div class='add'>+	/* blkg holds a reference to blkcg */</div><div class='add'>+	if (!css_tryget(&amp;blkcg-&gt;css))</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='del'>-void blkiocg_set_start_empty_time(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct blkio_group_stats *stats;</div><div class='add'>+	/* allocate */</div><div class='add'>+	ret = -ENOMEM;</div><div class='add'>+	blkg = blkg_alloc(blkcg, q);</div><div class='add'>+	if (unlikely(!blkg))</div><div class='add'>+		goto err_put;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-	stats = &amp;blkg-&gt;stats;</div><div class='add'>+	/* insert */</div><div class='add'>+	ret = radix_tree_preload(GFP_ATOMIC);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free;</div><div class='ctx'> </div><div class='del'>-	if (stats-&gt;stat_arr[BLKIO_STAT_QUEUED][BLKIO_STAT_READ] ||</div><div class='del'>-			stats-&gt;stat_arr[BLKIO_STAT_QUEUED][BLKIO_STAT_WRITE]) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-		return;</div><div class='add'>+	spin_lock(&amp;blkcg-&gt;lock);</div><div class='add'>+	ret = radix_tree_insert(&amp;blkcg-&gt;blkg_tree, q-&gt;id, blkg);</div><div class='add'>+	if (likely(!ret)) {</div><div class='add'>+		hlist_add_head_rcu(&amp;blkg-&gt;blkcg_node, &amp;blkcg-&gt;blkg_list);</div><div class='add'>+		list_add(&amp;blkg-&gt;q_node, &amp;q-&gt;blkg_list);</div><div class='ctx'> 	}</div><div class='add'>+	spin_unlock(&amp;blkcg-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * group is already marked empty. This can happen if cfqq got new</div><div class='del'>-	 * request in parent group and moved to this group while being added</div><div class='del'>-	 * to service tree. Just ignore the event and move on.</div><div class='del'>-	 */</div><div class='del'>-	if(blkio_blkg_empty(stats)) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	radix_tree_preload_end();</div><div class='ctx'> </div><div class='del'>-	stats-&gt;start_empty_time = sched_clock();</div><div class='del'>-	blkio_mark_blkg_empty(stats);</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkg-&gt;stats_lock, flags);</div><div class='add'>+	if (!ret)</div><div class='add'>+		return blkg;</div><div class='add'>+err_free:</div><div class='add'>+	blkg_free(blkg);</div><div class='add'>+err_put:</div><div class='add'>+	css_put(&amp;blkcg-&gt;css);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_set_start_empty_time);</div><div class='ctx'> </div><div class='del'>-void blkiocg_update_dequeue_stats(struct blkio_group *blkg,</div><div class='del'>-			unsigned long dequeue)</div><div class='del'>-{</div><div class='del'>-	blkg-&gt;stats.dequeue += dequeue;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_update_dequeue_stats);</div><div class='del'>-#else</div><div class='del'>-static inline void blkio_set_start_group_wait_time(struct blkio_group *blkg,</div><div class='del'>-					struct blkio_group *curr_blkg) {}</div><div class='del'>-static inline void blkio_end_empty_time(struct blkio_group_stats *stats) {}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-void blkiocg_update_io_add_stats(struct blkio_group *blkg,</div><div class='del'>-			struct blkio_group *curr_blkg, bool direction,</div><div class='del'>-			bool sync)</div><div class='add'>+struct blkcg_gq *blkg_lookup_create(struct blkcg *blkcg,</div><div class='add'>+				    struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-	blkio_add_stat(blkg-&gt;stats.stat_arr[BLKIO_STAT_QUEUED], 1, direction,</div><div class='del'>-			sync);</div><div class='del'>-	blkio_end_empty_time(&amp;blkg-&gt;stats);</div><div class='del'>-	blkio_set_start_group_wait_time(blkg, curr_blkg);</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkg-&gt;stats_lock, flags);</div><div class='add'>+	/*</div><div class='add'>+	 * This could be the first entry point of blkcg implementation and</div><div class='add'>+	 * we shouldn't allow anything to go through for a bypassing queue.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(blk_queue_bypass(q)))</div><div class='add'>+		return ERR_PTR(blk_queue_dead(q) ? -EINVAL : -EBUSY);</div><div class='add'>+	return __blkg_lookup_create(blkcg, q);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_update_io_add_stats);</div><div class='add'>+EXPORT_SYMBOL_GPL(blkg_lookup_create);</div><div class='ctx'> </div><div class='del'>-void blkiocg_update_io_remove_stats(struct blkio_group *blkg,</div><div class='del'>-						bool direction, bool sync)</div><div class='add'>+static void blkg_destroy(struct blkcg_gq *blkg)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct request_queue *q = blkg-&gt;q;</div><div class='add'>+	struct blkcg *blkcg = blkg-&gt;blkcg;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-	blkio_check_and_dec_stat(blkg-&gt;stats.stat_arr[BLKIO_STAT_QUEUED],</div><div class='del'>-					direction, sync);</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_update_io_remove_stats);</div><div class='add'>+	lockdep_assert_held(q-&gt;queue_lock);</div><div class='add'>+	lockdep_assert_held(&amp;blkcg-&gt;lock);</div><div class='ctx'> </div><div class='del'>-void blkiocg_update_timeslice_used(struct blkio_group *blkg, unsigned long time,</div><div class='del'>-				unsigned long unaccounted_time)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-	blkg-&gt;stats.time += time;</div><div class='del'>-#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='del'>-	blkg-&gt;stats.unaccounted_time += unaccounted_time;</div><div class='del'>-#endif</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_update_timeslice_used);</div><div class='add'>+	/* Something wrong if we are trying to remove same group twice */</div><div class='add'>+	WARN_ON_ONCE(list_empty(&amp;blkg-&gt;q_node));</div><div class='add'>+	WARN_ON_ONCE(hlist_unhashed(&amp;blkg-&gt;blkcg_node));</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * should be called under rcu read lock or queue lock to make sure blkg pointer</div><div class='del'>- * is valid.</div><div class='del'>- */</div><div class='del'>-void blkiocg_update_dispatch_stats(struct blkio_group *blkg,</div><div class='del'>-				uint64_t bytes, bool direction, bool sync)</div><div class='del'>-{</div><div class='del'>-	struct blkio_group_stats_cpu *stats_cpu;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	radix_tree_delete(&amp;blkcg-&gt;blkg_tree, blkg-&gt;q-&gt;id);</div><div class='add'>+	list_del_init(&amp;blkg-&gt;q_node);</div><div class='add'>+	hlist_del_init_rcu(&amp;blkg-&gt;blkcg_node);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Disabling interrupts to provide mutual exclusion between two</div><div class='del'>-	 * writes on same cpu. It probably is not needed for 64bit. Not</div><div class='del'>-	 * optimizing that case yet.</div><div class='add'>+	 * Both setting lookup hint to and clearing it from @blkg are done</div><div class='add'>+	 * under queue_lock.  If it's not pointing to @blkg now, it never</div><div class='add'>+	 * will.  Hint assignment itself can race safely.</div><div class='ctx'> 	 */</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-</div><div class='del'>-	stats_cpu = this_cpu_ptr(blkg-&gt;stats_cpu);</div><div class='del'>-</div><div class='del'>-	u64_stats_update_begin(&amp;stats_cpu-&gt;syncp);</div><div class='del'>-	stats_cpu-&gt;sectors += bytes &gt;&gt; 9;</div><div class='del'>-	blkio_add_stat(stats_cpu-&gt;stat_arr_cpu[BLKIO_STAT_CPU_SERVICED],</div><div class='del'>-			1, direction, sync);</div><div class='del'>-	blkio_add_stat(stats_cpu-&gt;stat_arr_cpu[BLKIO_STAT_CPU_SERVICE_BYTES],</div><div class='del'>-			bytes, direction, sync);</div><div class='del'>-	u64_stats_update_end(&amp;stats_cpu-&gt;syncp);</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_update_dispatch_stats);</div><div class='del'>-</div><div class='del'>-void blkiocg_update_completion_stats(struct blkio_group *blkg,</div><div class='del'>-	uint64_t start_time, uint64_t io_start_time, bool direction, bool sync)</div><div class='del'>-{</div><div class='del'>-	struct blkio_group_stats *stats;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned long long now = sched_clock();</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-	stats = &amp;blkg-&gt;stats;</div><div class='del'>-	if (time_after64(now, io_start_time))</div><div class='del'>-		blkio_add_stat(stats-&gt;stat_arr[BLKIO_STAT_SERVICE_TIME],</div><div class='del'>-				now - io_start_time, direction, sync);</div><div class='del'>-	if (time_after64(io_start_time, start_time))</div><div class='del'>-		blkio_add_stat(stats-&gt;stat_arr[BLKIO_STAT_WAIT_TIME],</div><div class='del'>-				io_start_time - start_time, direction, sync);</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkg-&gt;stats_lock, flags);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_update_completion_stats);</div><div class='del'>-</div><div class='del'>-/*  Merged stats are per cpu.  */</div><div class='del'>-void blkiocg_update_io_merged_stats(struct blkio_group *blkg, bool direction,</div><div class='del'>-					bool sync)</div><div class='del'>-{</div><div class='del'>-	struct blkio_group_stats_cpu *stats_cpu;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	if (rcu_dereference_raw(blkcg-&gt;blkg_hint) == blkg)</div><div class='add'>+		rcu_assign_pointer(blkcg-&gt;blkg_hint, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Disabling interrupts to provide mutual exclusion between two</div><div class='del'>-	 * writes on same cpu. It probably is not needed for 64bit. Not</div><div class='del'>-	 * optimizing that case yet.</div><div class='add'>+	 * Put the reference taken at the time of creation so that when all</div><div class='add'>+	 * queues are gone, group can be destroyed.</div><div class='ctx'> 	 */</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-</div><div class='del'>-	stats_cpu = this_cpu_ptr(blkg-&gt;stats_cpu);</div><div class='del'>-</div><div class='del'>-	u64_stats_update_begin(&amp;stats_cpu-&gt;syncp);</div><div class='del'>-	blkio_add_stat(stats_cpu-&gt;stat_arr_cpu[BLKIO_STAT_CPU_MERGED], 1,</div><div class='del'>-				direction, sync);</div><div class='del'>-	u64_stats_update_end(&amp;stats_cpu-&gt;syncp);</div><div class='del'>-	local_irq_restore(flags);</div><div class='add'>+	blkg_put(blkg);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_update_io_merged_stats);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This function allocates the per cpu stats for blkio_group. Should be called</div><div class='del'>- * from sleepable context as alloc_per_cpu() requires that.</div><div class='add'>+/**</div><div class='add'>+ * blkg_destroy_all - destroy all blkgs associated with a request_queue</div><div class='add'>+ * @q: request_queue of interest</div><div class='add'>+ *</div><div class='add'>+ * Destroy all blkgs associated with @q.</div><div class='ctx'>  */</div><div class='del'>-int blkio_alloc_blkg_stats(struct blkio_group *blkg)</div><div class='add'>+static void blkg_destroy_all(struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	/* Allocate memory for per cpu stats */</div><div class='del'>-	blkg-&gt;stats_cpu = alloc_percpu(struct blkio_group_stats_cpu);</div><div class='del'>-	if (!blkg-&gt;stats_cpu)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blkio_alloc_blkg_stats);</div><div class='add'>+	struct blkcg_gq *blkg, *n;</div><div class='ctx'> </div><div class='del'>-void blkiocg_add_blkio_group(struct blkio_cgroup *blkcg,</div><div class='del'>-		struct blkio_group *blkg, void *key, dev_t dev,</div><div class='del'>-		enum blkio_policy_id plid)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-	spin_lock_init(&amp;blkg-&gt;stats_lock);</div><div class='del'>-	rcu_assign_pointer(blkg-&gt;key, key);</div><div class='del'>-	blkg-&gt;blkcg_id = css_id(&amp;blkcg-&gt;css);</div><div class='del'>-	hlist_add_head_rcu(&amp;blkg-&gt;blkcg_node, &amp;blkcg-&gt;blkg_list);</div><div class='del'>-	blkg-&gt;plid = plid;</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-	/* Need to take css reference ? */</div><div class='del'>-	cgroup_path(blkcg-&gt;css.cgroup, blkg-&gt;path, sizeof(blkg-&gt;path));</div><div class='del'>-	blkg-&gt;dev = dev;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_add_blkio_group);</div><div class='del'>-</div><div class='del'>-static void __blkiocg_del_blkio_group(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	hlist_del_init_rcu(&amp;blkg-&gt;blkcg_node);</div><div class='del'>-	blkg-&gt;blkcg_id = 0;</div><div class='del'>-}</div><div class='add'>+	lockdep_assert_held(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * returns 0 if blkio_group was still on cgroup list. Otherwise returns 1</div><div class='del'>- * indicating that blk_group was unhashed by the time we got to it.</div><div class='del'>- */</div><div class='del'>-int blkiocg_del_blkio_group(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	struct blkio_cgroup *blkcg;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct cgroup_subsys_state *css;</div><div class='del'>-	int ret = 1;</div><div class='add'>+	list_for_each_entry_safe(blkg, n, &amp;q-&gt;blkg_list, q_node) {</div><div class='add'>+		struct blkcg *blkcg = blkg-&gt;blkcg;</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	css = css_lookup(&amp;blkio_subsys, blkg-&gt;blkcg_id);</div><div class='del'>-	if (css) {</div><div class='del'>-		blkcg = container_of(css, struct blkio_cgroup, css);</div><div class='del'>-		spin_lock_irqsave(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-		if (!hlist_unhashed(&amp;blkg-&gt;blkcg_node)) {</div><div class='del'>-			__blkiocg_del_blkio_group(blkg);</div><div class='del'>-			ret = 0;</div><div class='del'>-		}</div><div class='del'>-		spin_unlock_irqrestore(&amp;blkcg-&gt;lock, flags);</div><div class='add'>+		spin_lock(&amp;blkcg-&gt;lock);</div><div class='add'>+		blkg_destroy(blkg);</div><div class='add'>+		spin_unlock(&amp;blkcg-&gt;lock);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_del_blkio_group);</div><div class='ctx'> </div><div class='del'>-/* called under rcu_read_lock(). */</div><div class='del'>-struct blkio_group *blkiocg_lookup_group(struct blkio_cgroup *blkcg, void *key)</div><div class='add'>+static void blkg_rcu_free(struct rcu_head *rcu_head)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_group *blkg;</div><div class='del'>-	struct hlist_node *n;</div><div class='del'>-	void *__key;</div><div class='del'>-</div><div class='del'>-	hlist_for_each_entry_rcu(blkg, n, &amp;blkcg-&gt;blkg_list, blkcg_node) {</div><div class='del'>-		__key = blkg-&gt;key;</div><div class='del'>-		if (__key == key)</div><div class='del'>-			return blkg;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='add'>+	blkg_free(container_of(rcu_head, struct blkcg_gq, rcu_head));</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(blkiocg_lookup_group);</div><div class='ctx'> </div><div class='del'>-static void blkio_reset_stats_cpu(struct blkio_group *blkg)</div><div class='add'>+void __blkg_release(struct blkcg_gq *blkg)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_group_stats_cpu *stats_cpu;</div><div class='del'>-	int i, j, k;</div><div class='add'>+	/* release the extra blkcg reference this blkg has been holding */</div><div class='add'>+	css_put(&amp;blkg-&gt;blkcg-&gt;css);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='del'>-	 * Note: On 64 bit arch this should not be an issue. This has the</div><div class='del'>-	 * possibility of returning some inconsistent value on 32bit arch</div><div class='del'>-	 * as 64bit update on 32bit is non atomic. Taking care of this</div><div class='del'>-	 * corner case makes code very complicated, like sending IPIs to</div><div class='del'>-	 * cpus, taking care of stats of offline cpus etc.</div><div class='add'>+	 * A group is freed in rcu manner. But having an rcu lock does not</div><div class='add'>+	 * mean that one can access all the fields of blkg and assume these</div><div class='add'>+	 * are valid. For example, don't try to follow throtl_data and</div><div class='add'>+	 * request queue links.</div><div class='ctx'> 	 *</div><div class='del'>-	 * reset stats is anyway more of a debug feature and this sounds a</div><div class='del'>-	 * corner case. So I am not complicating the code yet until and</div><div class='del'>-	 * unless this becomes a real issue.</div><div class='add'>+	 * Having a reference to blkg under an rcu allows acess to only</div><div class='add'>+	 * values local to groups like group stats and group rate limits</div><div class='ctx'> 	 */</div><div class='del'>-	for_each_possible_cpu(i) {</div><div class='del'>-		stats_cpu = per_cpu_ptr(blkg-&gt;stats_cpu, i);</div><div class='del'>-		stats_cpu-&gt;sectors = 0;</div><div class='del'>-		for(j = 0; j &lt; BLKIO_STAT_CPU_NR; j++)</div><div class='del'>-			for (k = 0; k &lt; BLKIO_STAT_TOTAL; k++)</div><div class='del'>-				stats_cpu-&gt;stat_arr_cpu[j][k] = 0;</div><div class='del'>-	}</div><div class='add'>+	call_rcu(&amp;blkg-&gt;rcu_head, blkg_rcu_free);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(__blkg_release);</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-blkiocg_reset_stats(struct cgroup *cgroup, struct cftype *cftype, u64 val)</div><div class='add'>+static int blkcg_reset_stats(struct cgroup *cgroup, struct cftype *cftype,</div><div class='add'>+			     u64 val)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_cgroup *blkcg;</div><div class='del'>-	struct blkio_group *blkg;</div><div class='del'>-	struct blkio_group_stats *stats;</div><div class='add'>+	struct blkcg *blkcg = cgroup_to_blkcg(cgroup);</div><div class='add'>+	struct blkcg_gq *blkg;</div><div class='ctx'> 	struct hlist_node *n;</div><div class='del'>-	uint64_t queued[BLKIO_STAT_TOTAL];</div><div class='ctx'> 	int i;</div><div class='del'>-#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='del'>-	bool idling, waiting, empty;</div><div class='del'>-	unsigned long long now = sched_clock();</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-	blkcg = cgroup_to_blkio_cgroup(cgroup);</div><div class='add'>+	mutex_lock(&amp;blkcg_pol_mutex);</div><div class='ctx'> 	spin_lock_irq(&amp;blkcg-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Note that stat reset is racy - it doesn't synchronize against</div><div class='add'>+	 * stat updates.  This is a debug feature which shouldn't exist</div><div class='add'>+	 * anyway.  If you get hit by a race, retry.</div><div class='add'>+	 */</div><div class='ctx'> 	hlist_for_each_entry(blkg, n, &amp;blkcg-&gt;blkg_list, blkcg_node) {</div><div class='del'>-		spin_lock(&amp;blkg-&gt;stats_lock);</div><div class='del'>-		stats = &amp;blkg-&gt;stats;</div><div class='del'>-#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='del'>-		idling = blkio_blkg_idling(stats);</div><div class='del'>-		waiting = blkio_blkg_waiting(stats);</div><div class='del'>-		empty = blkio_blkg_empty(stats);</div><div class='del'>-#endif</div><div class='del'>-		for (i = 0; i &lt; BLKIO_STAT_TOTAL; i++)</div><div class='del'>-			queued[i] = stats-&gt;stat_arr[BLKIO_STAT_QUEUED][i];</div><div class='del'>-		memset(stats, 0, sizeof(struct blkio_group_stats));</div><div class='del'>-		for (i = 0; i &lt; BLKIO_STAT_TOTAL; i++)</div><div class='del'>-			stats-&gt;stat_arr[BLKIO_STAT_QUEUED][i] = queued[i];</div><div class='del'>-#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='del'>-		if (idling) {</div><div class='del'>-			blkio_mark_blkg_idling(stats);</div><div class='del'>-			stats-&gt;start_idle_time = now;</div><div class='del'>-		}</div><div class='del'>-		if (waiting) {</div><div class='del'>-			blkio_mark_blkg_waiting(stats);</div><div class='del'>-			stats-&gt;start_group_wait_time = now;</div><div class='del'>-		}</div><div class='del'>-		if (empty) {</div><div class='del'>-			blkio_mark_blkg_empty(stats);</div><div class='del'>-			stats-&gt;start_empty_time = now;</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-		spin_unlock(&amp;blkg-&gt;stats_lock);</div><div class='add'>+		for (i = 0; i &lt; BLKCG_MAX_POLS; i++) {</div><div class='add'>+			struct blkcg_policy *pol = blkcg_policy[i];</div><div class='ctx'> </div><div class='del'>-		/* Reset Per cpu stats which don't take blkg-&gt;stats_lock */</div><div class='del'>-		blkio_reset_stats_cpu(blkg);</div><div class='add'>+			if (blkcg_policy_enabled(blkg-&gt;q, pol) &amp;&amp;</div><div class='add'>+			    pol-&gt;pd_reset_stats_fn)</div><div class='add'>+				pol-&gt;pd_reset_stats_fn(blkg);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(&amp;blkcg-&gt;lock);</div><div class='add'>+	mutex_unlock(&amp;blkcg_pol_mutex);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void blkio_get_key_name(enum stat_sub_type type, dev_t dev, char *str,</div><div class='del'>-				int chars_left, bool diskname_only)</div><div class='add'>+static const char *blkg_dev_name(struct blkcg_gq *blkg)</div><div class='ctx'> {</div><div class='del'>-	snprintf(str, chars_left, "%d:%d", MAJOR(dev), MINOR(dev));</div><div class='del'>-	chars_left -= strlen(str);</div><div class='del'>-	if (chars_left &lt;= 0) {</div><div class='del'>-		printk(KERN_WARNING</div><div class='del'>-			"Possibly incorrect cgroup stat display format");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	if (diskname_only)</div><div class='del'>-		return;</div><div class='del'>-	switch (type) {</div><div class='del'>-	case BLKIO_STAT_READ:</div><div class='del'>-		strlcat(str, " Read", chars_left);</div><div class='del'>-		break;</div><div class='del'>-	case BLKIO_STAT_WRITE:</div><div class='del'>-		strlcat(str, " Write", chars_left);</div><div class='del'>-		break;</div><div class='del'>-	case BLKIO_STAT_SYNC:</div><div class='del'>-		strlcat(str, " Sync", chars_left);</div><div class='del'>-		break;</div><div class='del'>-	case BLKIO_STAT_ASYNC:</div><div class='del'>-		strlcat(str, " Async", chars_left);</div><div class='del'>-		break;</div><div class='del'>-	case BLKIO_STAT_TOTAL:</div><div class='del'>-		strlcat(str, " Total", chars_left);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		strlcat(str, " Invalid", chars_left);</div><div class='del'>-	}</div><div class='add'>+	/* some drivers (floppy) instantiate a queue w/o disk registered */</div><div class='add'>+	if (blkg-&gt;q-&gt;backing_dev_info.dev)</div><div class='add'>+		return dev_name(blkg-&gt;q-&gt;backing_dev_info.dev);</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static uint64_t blkio_fill_stat(char *str, int chars_left, uint64_t val,</div><div class='del'>-				struct cgroup_map_cb *cb, dev_t dev)</div><div class='add'>+/**</div><div class='add'>+ * blkcg_print_blkgs - helper for printing per-blkg data</div><div class='add'>+ * @sf: seq_file to print to</div><div class='add'>+ * @blkcg: blkcg of interest</div><div class='add'>+ * @prfill: fill function to print out a blkg</div><div class='add'>+ * @pol: policy in question</div><div class='add'>+ * @data: data to be passed to @prfill</div><div class='add'>+ * @show_total: to print out sum of prfill return values or not</div><div class='add'>+ *</div><div class='add'>+ * This function invokes @prfill on each blkg of @blkcg if pd for the</div><div class='add'>+ * policy specified by @pol exists.  @prfill is invoked with @sf, the</div><div class='add'>+ * policy data and @data.  If @show_total is %true, the sum of the return</div><div class='add'>+ * values from @prfill is printed with "Total" label at the end.</div><div class='add'>+ *</div><div class='add'>+ * This is to be used to construct print functions for</div><div class='add'>+ * cftype-&gt;read_seq_string method.</div><div class='add'>+ */</div><div class='add'>+void blkcg_print_blkgs(struct seq_file *sf, struct blkcg *blkcg,</div><div class='add'>+		       u64 (*prfill)(struct seq_file *,</div><div class='add'>+				     struct blkg_policy_data *, int),</div><div class='add'>+		       const struct blkcg_policy *pol, int data,</div><div class='add'>+		       bool show_total)</div><div class='ctx'> {</div><div class='del'>-	blkio_get_key_name(0, dev, str, chars_left, true);</div><div class='del'>-	cb-&gt;fill(cb, str, val);</div><div class='del'>-	return val;</div><div class='del'>-}</div><div class='del'>-</div><div class='add'>+	struct blkcg_gq *blkg;</div><div class='add'>+	struct hlist_node *n;</div><div class='add'>+	u64 total = 0;</div><div class='ctx'> </div><div class='del'>-static uint64_t blkio_read_stat_cpu(struct blkio_group *blkg,</div><div class='del'>-			enum stat_type_cpu type, enum stat_sub_type sub_type)</div><div class='del'>-{</div><div class='del'>-	int cpu;</div><div class='del'>-	struct blkio_group_stats_cpu *stats_cpu;</div><div class='del'>-	u64 val = 0, tval;</div><div class='del'>-</div><div class='del'>-	for_each_possible_cpu(cpu) {</div><div class='del'>-		unsigned int start;</div><div class='del'>-		stats_cpu  = per_cpu_ptr(blkg-&gt;stats_cpu, cpu);</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			start = u64_stats_fetch_begin(&amp;stats_cpu-&gt;syncp);</div><div class='del'>-			if (type == BLKIO_STAT_CPU_SECTORS)</div><div class='del'>-				tval = stats_cpu-&gt;sectors;</div><div class='del'>-			else</div><div class='del'>-				tval = stats_cpu-&gt;stat_arr_cpu[type][sub_type];</div><div class='del'>-		} while(u64_stats_fetch_retry(&amp;stats_cpu-&gt;syncp, start));</div><div class='del'>-</div><div class='del'>-		val += tval;</div><div class='del'>-	}</div><div class='add'>+	spin_lock_irq(&amp;blkcg-&gt;lock);</div><div class='add'>+	hlist_for_each_entry(blkg, n, &amp;blkcg-&gt;blkg_list, blkcg_node)</div><div class='add'>+		if (blkcg_policy_enabled(blkg-&gt;q, pol))</div><div class='add'>+			total += prfill(sf, blkg-&gt;pd[pol-&gt;plid], data);</div><div class='add'>+	spin_unlock_irq(&amp;blkcg-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	return val;</div><div class='add'>+	if (show_total)</div><div class='add'>+		seq_printf(sf, "Total %llu\n", (unsigned long long)total);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(blkcg_print_blkgs);</div><div class='ctx'> </div><div class='del'>-static uint64_t blkio_get_stat_cpu(struct blkio_group *blkg,</div><div class='del'>-		struct cgroup_map_cb *cb, dev_t dev, enum stat_type_cpu type)</div><div class='add'>+/**</div><div class='add'>+ * __blkg_prfill_u64 - prfill helper for a single u64 value</div><div class='add'>+ * @sf: seq_file to print to</div><div class='add'>+ * @pd: policy private data of interest</div><div class='add'>+ * @v: value to print</div><div class='add'>+ *</div><div class='add'>+ * Print @v to @sf for the device assocaited with @pd.</div><div class='add'>+ */</div><div class='add'>+u64 __blkg_prfill_u64(struct seq_file *sf, struct blkg_policy_data *pd, u64 v)</div><div class='ctx'> {</div><div class='del'>-	uint64_t disk_total, val;</div><div class='del'>-	char key_str[MAX_KEY_LEN];</div><div class='del'>-	enum stat_sub_type sub_type;</div><div class='del'>-</div><div class='del'>-	if (type == BLKIO_STAT_CPU_SECTORS) {</div><div class='del'>-		val = blkio_read_stat_cpu(blkg, type, 0);</div><div class='del'>-		return blkio_fill_stat(key_str, MAX_KEY_LEN - 1, val, cb, dev);</div><div class='del'>-	}</div><div class='add'>+	const char *dname = blkg_dev_name(pd-&gt;blkg);</div><div class='ctx'> </div><div class='del'>-	for (sub_type = BLKIO_STAT_READ; sub_type &lt; BLKIO_STAT_TOTAL;</div><div class='del'>-			sub_type++) {</div><div class='del'>-		blkio_get_key_name(sub_type, dev, key_str, MAX_KEY_LEN, false);</div><div class='del'>-		val = blkio_read_stat_cpu(blkg, type, sub_type);</div><div class='del'>-		cb-&gt;fill(cb, key_str, val);</div><div class='del'>-	}</div><div class='add'>+	if (!dname)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	disk_total = blkio_read_stat_cpu(blkg, type, BLKIO_STAT_READ) +</div><div class='del'>-			blkio_read_stat_cpu(blkg, type, BLKIO_STAT_WRITE);</div><div class='del'>-</div><div class='del'>-	blkio_get_key_name(BLKIO_STAT_TOTAL, dev, key_str, MAX_KEY_LEN, false);</div><div class='del'>-	cb-&gt;fill(cb, key_str, disk_total);</div><div class='del'>-	return disk_total;</div><div class='add'>+	seq_printf(sf, "%s %llu\n", dname, (unsigned long long)v);</div><div class='add'>+	return v;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(__blkg_prfill_u64);</div><div class='ctx'> </div><div class='del'>-/* This should be called with blkg-&gt;stats_lock held */</div><div class='del'>-static uint64_t blkio_get_stat(struct blkio_group *blkg,</div><div class='del'>-		struct cgroup_map_cb *cb, dev_t dev, enum stat_type type)</div><div class='del'>-{</div><div class='del'>-	uint64_t disk_total;</div><div class='del'>-	char key_str[MAX_KEY_LEN];</div><div class='del'>-	enum stat_sub_type sub_type;</div><div class='del'>-</div><div class='del'>-	if (type == BLKIO_STAT_TIME)</div><div class='del'>-		return blkio_fill_stat(key_str, MAX_KEY_LEN - 1,</div><div class='del'>-					blkg-&gt;stats.time, cb, dev);</div><div class='del'>-#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='del'>-	if (type == BLKIO_STAT_UNACCOUNTED_TIME)</div><div class='del'>-		return blkio_fill_stat(key_str, MAX_KEY_LEN - 1,</div><div class='del'>-					blkg-&gt;stats.unaccounted_time, cb, dev);</div><div class='del'>-	if (type == BLKIO_STAT_AVG_QUEUE_SIZE) {</div><div class='del'>-		uint64_t sum = blkg-&gt;stats.avg_queue_size_sum;</div><div class='del'>-		uint64_t samples = blkg-&gt;stats.avg_queue_size_samples;</div><div class='del'>-		if (samples)</div><div class='del'>-			do_div(sum, samples);</div><div class='del'>-		else</div><div class='del'>-			sum = 0;</div><div class='del'>-		return blkio_fill_stat(key_str, MAX_KEY_LEN - 1, sum, cb, dev);</div><div class='del'>-	}</div><div class='del'>-	if (type == BLKIO_STAT_GROUP_WAIT_TIME)</div><div class='del'>-		return blkio_fill_stat(key_str, MAX_KEY_LEN - 1,</div><div class='del'>-					blkg-&gt;stats.group_wait_time, cb, dev);</div><div class='del'>-	if (type == BLKIO_STAT_IDLE_TIME)</div><div class='del'>-		return blkio_fill_stat(key_str, MAX_KEY_LEN - 1,</div><div class='del'>-					blkg-&gt;stats.idle_time, cb, dev);</div><div class='del'>-	if (type == BLKIO_STAT_EMPTY_TIME)</div><div class='del'>-		return blkio_fill_stat(key_str, MAX_KEY_LEN - 1,</div><div class='del'>-					blkg-&gt;stats.empty_time, cb, dev);</div><div class='del'>-	if (type == BLKIO_STAT_DEQUEUE)</div><div class='del'>-		return blkio_fill_stat(key_str, MAX_KEY_LEN - 1,</div><div class='del'>-					blkg-&gt;stats.dequeue, cb, dev);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	for (sub_type = BLKIO_STAT_READ; sub_type &lt; BLKIO_STAT_TOTAL;</div><div class='del'>-			sub_type++) {</div><div class='del'>-		blkio_get_key_name(sub_type, dev, key_str, MAX_KEY_LEN, false);</div><div class='del'>-		cb-&gt;fill(cb, key_str, blkg-&gt;stats.stat_arr[type][sub_type]);</div><div class='del'>-	}</div><div class='del'>-	disk_total = blkg-&gt;stats.stat_arr[type][BLKIO_STAT_READ] +</div><div class='del'>-			blkg-&gt;stats.stat_arr[type][BLKIO_STAT_WRITE];</div><div class='del'>-	blkio_get_key_name(BLKIO_STAT_TOTAL, dev, key_str, MAX_KEY_LEN, false);</div><div class='del'>-	cb-&gt;fill(cb, key_str, disk_total);</div><div class='del'>-	return disk_total;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int blkio_policy_parse_and_set(char *buf,</div><div class='del'>-	struct blkio_policy_node *newpn, enum blkio_policy_id plid, int fileid)</div><div class='del'>-{</div><div class='del'>-	struct gendisk *disk = NULL;</div><div class='del'>-	char *s[4], *p, *major_s = NULL, *minor_s = NULL;</div><div class='del'>-	unsigned long major, minor;</div><div class='del'>-	int i = 0, ret = -EINVAL;</div><div class='del'>-	int part;</div><div class='del'>-	dev_t dev;</div><div class='del'>-	u64 temp;</div><div class='del'>-</div><div class='del'>-	memset(s, 0, sizeof(s));</div><div class='del'>-</div><div class='del'>-	while ((p = strsep(&amp;buf, " ")) != NULL) {</div><div class='del'>-		if (!*p)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		s[i++] = p;</div><div class='del'>-</div><div class='del'>-		/* Prevent from inputing too many things */</div><div class='del'>-		if (i == 3)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i != 2)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	p = strsep(&amp;s[0], ":");</div><div class='del'>-	if (p != NULL)</div><div class='del'>-		major_s = p;</div><div class='del'>-	else</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	minor_s = s[0];</div><div class='del'>-	if (!minor_s)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (strict_strtoul(major_s, 10, &amp;major))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (strict_strtoul(minor_s, 10, &amp;minor))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	dev = MKDEV(major, minor);</div><div class='add'>+/**</div><div class='add'>+ * __blkg_prfill_rwstat - prfill helper for a blkg_rwstat</div><div class='add'>+ * @sf: seq_file to print to</div><div class='add'>+ * @pd: policy private data of interest</div><div class='add'>+ * @rwstat: rwstat to print</div><div class='add'>+ *</div><div class='add'>+ * Print @rwstat to @sf for the device assocaited with @pd.</div><div class='add'>+ */</div><div class='add'>+u64 __blkg_prfill_rwstat(struct seq_file *sf, struct blkg_policy_data *pd,</div><div class='add'>+			 const struct blkg_rwstat *rwstat)</div><div class='add'>+{</div><div class='add'>+	static const char *rwstr[] = {</div><div class='add'>+		[BLKG_RWSTAT_READ]	= "Read",</div><div class='add'>+		[BLKG_RWSTAT_WRITE]	= "Write",</div><div class='add'>+		[BLKG_RWSTAT_SYNC]	= "Sync",</div><div class='add'>+		[BLKG_RWSTAT_ASYNC]	= "Async",</div><div class='add'>+	};</div><div class='add'>+	const char *dname = blkg_dev_name(pd-&gt;blkg);</div><div class='add'>+	u64 v;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	if (strict_strtoull(s[1], 10, &amp;temp))</div><div class='del'>-		goto out;</div><div class='add'>+	if (!dname)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	/* For rule removal, do not check for device presence. */</div><div class='del'>-	if (temp) {</div><div class='del'>-		disk = get_gendisk(dev, &amp;part);</div><div class='del'>-		if (!disk || part) {</div><div class='del'>-			ret = -ENODEV;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; i &lt; BLKG_RWSTAT_NR; i++)</div><div class='add'>+		seq_printf(sf, "%s %s %llu\n", dname, rwstr[i],</div><div class='add'>+			   (unsigned long long)rwstat-&gt;cnt[i]);</div><div class='ctx'> </div><div class='del'>-	newpn-&gt;dev = dev;</div><div class='del'>-</div><div class='del'>-	switch (plid) {</div><div class='del'>-	case BLKIO_POLICY_PROP:</div><div class='del'>-		if ((temp &lt; BLKIO_WEIGHT_MIN &amp;&amp; temp &gt; 0) ||</div><div class='del'>-		     temp &gt; BLKIO_WEIGHT_MAX)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		newpn-&gt;plid = plid;</div><div class='del'>-		newpn-&gt;fileid = fileid;</div><div class='del'>-		newpn-&gt;val.weight = temp;</div><div class='del'>-		break;</div><div class='del'>-	case BLKIO_POLICY_THROTL:</div><div class='del'>-		switch(fileid) {</div><div class='del'>-		case BLKIO_THROTL_read_bps_device:</div><div class='del'>-		case BLKIO_THROTL_write_bps_device:</div><div class='del'>-			newpn-&gt;plid = plid;</div><div class='del'>-			newpn-&gt;fileid = fileid;</div><div class='del'>-			newpn-&gt;val.bps = temp;</div><div class='del'>-			break;</div><div class='del'>-		case BLKIO_THROTL_read_iops_device:</div><div class='del'>-		case BLKIO_THROTL_write_iops_device:</div><div class='del'>-			if (temp &gt; THROTL_IOPS_MAX)</div><div class='del'>-				goto out;</div><div class='del'>-</div><div class='del'>-			newpn-&gt;plid = plid;</div><div class='del'>-			newpn-&gt;fileid = fileid;</div><div class='del'>-			newpn-&gt;val.iops = (unsigned int)temp;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-	ret = 0;</div><div class='del'>-out:</div><div class='del'>-	put_disk(disk);</div><div class='del'>-	return ret;</div><div class='add'>+	v = rwstat-&gt;cnt[BLKG_RWSTAT_READ] + rwstat-&gt;cnt[BLKG_RWSTAT_WRITE];</div><div class='add'>+	seq_printf(sf, "%s Total %llu\n", dname, (unsigned long long)v);</div><div class='add'>+	return v;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned int blkcg_get_weight(struct blkio_cgroup *blkcg,</div><div class='del'>-			      dev_t dev)</div><div class='add'>+/**</div><div class='add'>+ * blkg_prfill_stat - prfill callback for blkg_stat</div><div class='add'>+ * @sf: seq_file to print to</div><div class='add'>+ * @pd: policy private data of interest</div><div class='add'>+ * @off: offset to the blkg_stat in @pd</div><div class='add'>+ *</div><div class='add'>+ * prfill callback for printing a blkg_stat.</div><div class='add'>+ */</div><div class='add'>+u64 blkg_prfill_stat(struct seq_file *sf, struct blkg_policy_data *pd, int off)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_policy_node *pn;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned int weight;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	pn = blkio_policy_search_node(blkcg, dev, BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_weight_device);</div><div class='del'>-	if (pn)</div><div class='del'>-		weight = pn-&gt;val.weight;</div><div class='del'>-	else</div><div class='del'>-		weight = blkcg-&gt;weight;</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	return weight;</div><div class='add'>+	return __blkg_prfill_u64(sf, pd, blkg_stat_read((void *)pd + off));</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(blkcg_get_weight);</div><div class='add'>+EXPORT_SYMBOL_GPL(blkg_prfill_stat);</div><div class='ctx'> </div><div class='del'>-uint64_t blkcg_get_read_bps(struct blkio_cgroup *blkcg, dev_t dev)</div><div class='add'>+/**</div><div class='add'>+ * blkg_prfill_rwstat - prfill callback for blkg_rwstat</div><div class='add'>+ * @sf: seq_file to print to</div><div class='add'>+ * @pd: policy private data of interest</div><div class='add'>+ * @off: offset to the blkg_rwstat in @pd</div><div class='add'>+ *</div><div class='add'>+ * prfill callback for printing a blkg_rwstat.</div><div class='add'>+ */</div><div class='add'>+u64 blkg_prfill_rwstat(struct seq_file *sf, struct blkg_policy_data *pd,</div><div class='add'>+		       int off)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_policy_node *pn;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	uint64_t bps = -1;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-	pn = blkio_policy_search_node(blkcg, dev, BLKIO_POLICY_THROTL,</div><div class='del'>-				BLKIO_THROTL_read_bps_device);</div><div class='del'>-	if (pn)</div><div class='del'>-		bps = pn-&gt;val.bps;</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	return bps;</div><div class='del'>-}</div><div class='add'>+	struct blkg_rwstat rwstat = blkg_rwstat_read((void *)pd + off);</div><div class='ctx'> </div><div class='del'>-uint64_t blkcg_get_write_bps(struct blkio_cgroup *blkcg, dev_t dev)</div><div class='del'>-{</div><div class='del'>-	struct blkio_policy_node *pn;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	uint64_t bps = -1;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-	pn = blkio_policy_search_node(blkcg, dev, BLKIO_POLICY_THROTL,</div><div class='del'>-				BLKIO_THROTL_write_bps_device);</div><div class='del'>-	if (pn)</div><div class='del'>-		bps = pn-&gt;val.bps;</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	return bps;</div><div class='add'>+	return __blkg_prfill_rwstat(sf, pd, &amp;rwstat);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(blkg_prfill_rwstat);</div><div class='ctx'> </div><div class='del'>-unsigned int blkcg_get_read_iops(struct blkio_cgroup *blkcg, dev_t dev)</div><div class='add'>+/**</div><div class='add'>+ * blkg_conf_prep - parse and prepare for per-blkg config update</div><div class='add'>+ * @blkcg: target block cgroup</div><div class='add'>+ * @pol: target policy</div><div class='add'>+ * @input: input string</div><div class='add'>+ * @ctx: blkg_conf_ctx to be filled</div><div class='add'>+ *</div><div class='add'>+ * Parse per-blkg config update from @input and initialize @ctx with the</div><div class='add'>+ * result.  @ctx-&gt;blkg points to the blkg to be updated and @ctx-&gt;v the new</div><div class='add'>+ * value.  This function returns with RCU read lock and queue lock held and</div><div class='add'>+ * must be paired with blkg_conf_finish().</div><div class='add'>+ */</div><div class='add'>+int blkg_conf_prep(struct blkcg *blkcg, const struct blkcg_policy *pol,</div><div class='add'>+		   const char *input, struct blkg_conf_ctx *ctx)</div><div class='add'>+	__acquires(rcu) __acquires(disk-&gt;queue-&gt;queue_lock)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_policy_node *pn;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned int iops = -1;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-	pn = blkio_policy_search_node(blkcg, dev, BLKIO_POLICY_THROTL,</div><div class='del'>-				BLKIO_THROTL_read_iops_device);</div><div class='del'>-	if (pn)</div><div class='del'>-		iops = pn-&gt;val.iops;</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	return iops;</div><div class='del'>-}</div><div class='add'>+	struct gendisk *disk;</div><div class='add'>+	struct blkcg_gq *blkg;</div><div class='add'>+	unsigned int major, minor;</div><div class='add'>+	unsigned long long v;</div><div class='add'>+	int part, ret;</div><div class='ctx'> </div><div class='del'>-unsigned int blkcg_get_write_iops(struct blkio_cgroup *blkcg, dev_t dev)</div><div class='del'>-{</div><div class='del'>-	struct blkio_policy_node *pn;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned int iops = -1;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-	pn = blkio_policy_search_node(blkcg, dev, BLKIO_POLICY_THROTL,</div><div class='del'>-				BLKIO_THROTL_write_iops_device);</div><div class='del'>-	if (pn)</div><div class='del'>-		iops = pn-&gt;val.iops;</div><div class='del'>-	spin_unlock_irqrestore(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	return iops;</div><div class='del'>-}</div><div class='add'>+	if (sscanf(input, "%u:%u %llu", &amp;major, &amp;minor, &amp;v) != 3)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-/* Checks whether user asked for deleting a policy rule */</div><div class='del'>-static bool blkio_delete_rule_command(struct blkio_policy_node *pn)</div><div class='del'>-{</div><div class='del'>-	switch(pn-&gt;plid) {</div><div class='del'>-	case BLKIO_POLICY_PROP:</div><div class='del'>-		if (pn-&gt;val.weight == 0)</div><div class='del'>-			return 1;</div><div class='del'>-		break;</div><div class='del'>-	case BLKIO_POLICY_THROTL:</div><div class='del'>-		switch(pn-&gt;fileid) {</div><div class='del'>-		case BLKIO_THROTL_read_bps_device:</div><div class='del'>-		case BLKIO_THROTL_write_bps_device:</div><div class='del'>-			if (pn-&gt;val.bps == 0)</div><div class='del'>-				return 1;</div><div class='del'>-			break;</div><div class='del'>-		case BLKIO_THROTL_read_iops_device:</div><div class='del'>-		case BLKIO_THROTL_write_iops_device:</div><div class='del'>-			if (pn-&gt;val.iops == 0)</div><div class='del'>-				return 1;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='add'>+	disk = get_gendisk(MKDEV(major, minor), &amp;part);</div><div class='add'>+	if (!disk || part)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	spin_lock_irq(disk-&gt;queue-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-static void blkio_update_policy_rule(struct blkio_policy_node *oldpn,</div><div class='del'>-					struct blkio_policy_node *newpn)</div><div class='del'>-{</div><div class='del'>-	switch(oldpn-&gt;plid) {</div><div class='del'>-	case BLKIO_POLICY_PROP:</div><div class='del'>-		oldpn-&gt;val.weight = newpn-&gt;val.weight;</div><div class='del'>-		break;</div><div class='del'>-	case BLKIO_POLICY_THROTL:</div><div class='del'>-		switch(newpn-&gt;fileid) {</div><div class='del'>-		case BLKIO_THROTL_read_bps_device:</div><div class='del'>-		case BLKIO_THROTL_write_bps_device:</div><div class='del'>-			oldpn-&gt;val.bps = newpn-&gt;val.bps;</div><div class='del'>-			break;</div><div class='del'>-		case BLKIO_THROTL_read_iops_device:</div><div class='del'>-		case BLKIO_THROTL_write_iops_device:</div><div class='del'>-			oldpn-&gt;val.iops = newpn-&gt;val.iops;</div><div class='add'>+	if (blkcg_policy_enabled(disk-&gt;queue, pol))</div><div class='add'>+		blkg = blkg_lookup_create(blkcg, disk-&gt;queue);</div><div class='add'>+	else</div><div class='add'>+		blkg = ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(blkg)) {</div><div class='add'>+		ret = PTR_ERR(blkg);</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		spin_unlock_irq(disk-&gt;queue-&gt;queue_lock);</div><div class='add'>+		put_disk(disk);</div><div class='add'>+		/*</div><div class='add'>+		 * If queue was bypassing, we should retry.  Do so after a</div><div class='add'>+		 * short msleep().  It isn't strictly necessary but queue</div><div class='add'>+		 * can be bypassing for some time and it's always nice to</div><div class='add'>+		 * avoid busy looping.</div><div class='add'>+		 */</div><div class='add'>+		if (ret == -EBUSY) {</div><div class='add'>+			msleep(10);</div><div class='add'>+			ret = restart_syscall();</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;disk = disk;</div><div class='add'>+	ctx-&gt;blkg = blkg;</div><div class='add'>+	ctx-&gt;v = v;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(blkg_conf_prep);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Some rules/values in blkg have changed. Propagate those to respective</div><div class='del'>- * policies.</div><div class='add'>+/**</div><div class='add'>+ * blkg_conf_finish - finish up per-blkg config update</div><div class='add'>+ * @ctx: blkg_conf_ctx intiailized by blkg_conf_prep()</div><div class='add'>+ *</div><div class='add'>+ * Finish up after per-blkg config update.  This function must be paired</div><div class='add'>+ * with blkg_conf_prep().</div><div class='ctx'>  */</div><div class='del'>-static void blkio_update_blkg_policy(struct blkio_cgroup *blkcg,</div><div class='del'>-		struct blkio_group *blkg, struct blkio_policy_node *pn)</div><div class='add'>+void blkg_conf_finish(struct blkg_conf_ctx *ctx)</div><div class='add'>+	__releases(ctx-&gt;disk-&gt;queue-&gt;queue_lock) __releases(rcu)</div><div class='ctx'> {</div><div class='del'>-	unsigned int weight, iops;</div><div class='del'>-	u64 bps;</div><div class='del'>-</div><div class='del'>-	switch(pn-&gt;plid) {</div><div class='del'>-	case BLKIO_POLICY_PROP:</div><div class='del'>-		weight = pn-&gt;val.weight ? pn-&gt;val.weight :</div><div class='del'>-				blkcg-&gt;weight;</div><div class='del'>-		blkio_update_group_weight(blkg, weight);</div><div class='del'>-		break;</div><div class='del'>-	case BLKIO_POLICY_THROTL:</div><div class='del'>-		switch(pn-&gt;fileid) {</div><div class='del'>-		case BLKIO_THROTL_read_bps_device:</div><div class='del'>-		case BLKIO_THROTL_write_bps_device:</div><div class='del'>-			bps = pn-&gt;val.bps ? pn-&gt;val.bps : (-1);</div><div class='del'>-			blkio_update_group_bps(blkg, bps, pn-&gt;fileid);</div><div class='del'>-			break;</div><div class='del'>-		case BLKIO_THROTL_read_iops_device:</div><div class='del'>-		case BLKIO_THROTL_write_iops_device:</div><div class='del'>-			iops = pn-&gt;val.iops ? pn-&gt;val.iops : (-1);</div><div class='del'>-			blkio_update_group_iops(blkg, iops, pn-&gt;fileid);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='add'>+	spin_unlock_irq(ctx-&gt;disk-&gt;queue-&gt;queue_lock);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	put_disk(ctx-&gt;disk);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(blkg_conf_finish);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * A policy node rule has been updated. Propagate this update to all the</div><div class='del'>- * block groups which might be affected by this update.</div><div class='add'>+struct cftype blkcg_files[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "reset_stats",</div><div class='add'>+		.write_u64 = blkcg_reset_stats,</div><div class='add'>+	},</div><div class='add'>+	{ }	/* terminate */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * blkcg_pre_destroy - cgroup pre_destroy callback</div><div class='add'>+ * @cgroup: cgroup of interest</div><div class='add'>+ *</div><div class='add'>+ * This function is called when @cgroup is about to go away and responsible</div><div class='add'>+ * for shooting down all blkgs associated with @cgroup.  blkgs should be</div><div class='add'>+ * removed while holding both q and blkcg locks.  As blkcg lock is nested</div><div class='add'>+ * inside q lock, this function performs reverse double lock dancing.</div><div class='add'>+ *</div><div class='add'>+ * This is the blkcg counterpart of ioc_release_fn().</div><div class='ctx'>  */</div><div class='del'>-static void blkio_update_policy_node_blkg(struct blkio_cgroup *blkcg,</div><div class='del'>-				struct blkio_policy_node *pn)</div><div class='add'>+static int blkcg_pre_destroy(struct cgroup *cgroup)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_group *blkg;</div><div class='del'>-	struct hlist_node *n;</div><div class='add'>+	struct blkcg *blkcg = cgroup_to_blkcg(cgroup);</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;blkio_list_lock);</div><div class='ctx'> 	spin_lock_irq(&amp;blkcg-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	hlist_for_each_entry(blkg, n, &amp;blkcg-&gt;blkg_list, blkcg_node) {</div><div class='del'>-		if (pn-&gt;dev != blkg-&gt;dev || pn-&gt;plid != blkg-&gt;plid)</div><div class='del'>-			continue;</div><div class='del'>-		blkio_update_blkg_policy(blkcg, blkg, pn);</div><div class='add'>+	while (!hlist_empty(&amp;blkcg-&gt;blkg_list)) {</div><div class='add'>+		struct blkcg_gq *blkg = hlist_entry(blkcg-&gt;blkg_list.first,</div><div class='add'>+						struct blkcg_gq, blkcg_node);</div><div class='add'>+		struct request_queue *q = blkg-&gt;q;</div><div class='add'>+</div><div class='add'>+		if (spin_trylock(q-&gt;queue_lock)) {</div><div class='add'>+			blkg_destroy(blkg);</div><div class='add'>+			spin_unlock(q-&gt;queue_lock);</div><div class='add'>+		} else {</div><div class='add'>+			spin_unlock_irq(&amp;blkcg-&gt;lock);</div><div class='add'>+			cpu_relax();</div><div class='add'>+			spin_lock_irq(&amp;blkcg-&gt;lock);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(&amp;blkcg-&gt;lock);</div><div class='del'>-	spin_unlock(&amp;blkio_list_lock);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int blkiocg_file_write(struct cgroup *cgrp, struct cftype *cft,</div><div class='del'>- 				       const char *buffer)</div><div class='add'>+static void blkcg_destroy(struct cgroup *cgroup)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='del'>-	char *buf;</div><div class='del'>-	struct blkio_policy_node *newpn, *pn;</div><div class='del'>-	struct blkio_cgroup *blkcg;</div><div class='del'>-	int keep_newpn = 0;</div><div class='del'>-	enum blkio_policy_id plid = BLKIOFILE_POLICY(cft-&gt;private);</div><div class='del'>-	int fileid = BLKIOFILE_ATTR(cft-&gt;private);</div><div class='del'>-</div><div class='del'>-	buf = kstrdup(buffer, GFP_KERNEL);</div><div class='del'>-	if (!buf)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	newpn = kzalloc(sizeof(*newpn), GFP_KERNEL);</div><div class='del'>-	if (!newpn) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto free_buf;</div><div class='del'>-	}</div><div class='add'>+	struct blkcg *blkcg = cgroup_to_blkcg(cgroup);</div><div class='ctx'> </div><div class='del'>-	ret = blkio_policy_parse_and_set(buf, newpn, plid, fileid);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto free_newpn;</div><div class='del'>-</div><div class='del'>-	blkcg = cgroup_to_blkio_cgroup(cgrp);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;blkcg-&gt;lock);</div><div class='add'>+	if (blkcg != &amp;blkcg_root)</div><div class='add'>+		kfree(blkcg);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	pn = blkio_policy_search_node(blkcg, newpn-&gt;dev, plid, fileid);</div><div class='del'>-	if (!pn) {</div><div class='del'>-		if (!blkio_delete_rule_command(newpn)) {</div><div class='del'>-			blkio_policy_insert_node(blkcg, newpn);</div><div class='del'>-			keep_newpn = 1;</div><div class='del'>-		}</div><div class='del'>-		spin_unlock_irq(&amp;blkcg-&gt;lock);</div><div class='del'>-		goto update_io_group;</div><div class='del'>-	}</div><div class='add'>+static struct cgroup_subsys_state *blkcg_create(struct cgroup *cgroup)</div><div class='add'>+{</div><div class='add'>+	static atomic64_t id_seq = ATOMIC64_INIT(0);</div><div class='add'>+	struct blkcg *blkcg;</div><div class='add'>+	struct cgroup *parent = cgroup-&gt;parent;</div><div class='ctx'> </div><div class='del'>-	if (blkio_delete_rule_command(newpn)) {</div><div class='del'>-		blkio_policy_delete_node(pn);</div><div class='del'>-		kfree(pn);</div><div class='del'>-		spin_unlock_irq(&amp;blkcg-&gt;lock);</div><div class='del'>-		goto update_io_group;</div><div class='add'>+	if (!parent) {</div><div class='add'>+		blkcg = &amp;blkcg_root;</div><div class='add'>+		goto done;</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irq(&amp;blkcg-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	blkio_update_policy_rule(pn, newpn);</div><div class='add'>+	blkcg = kzalloc(sizeof(*blkcg), GFP_KERNEL);</div><div class='add'>+	if (!blkcg)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-update_io_group:</div><div class='del'>-	blkio_update_policy_node_blkg(blkcg, newpn);</div><div class='add'>+	blkcg-&gt;cfq_weight = CFQ_WEIGHT_DEFAULT;</div><div class='add'>+	blkcg-&gt;id = atomic64_inc_return(&amp;id_seq); /* root is 0, start from 1 */</div><div class='add'>+done:</div><div class='add'>+	spin_lock_init(&amp;blkcg-&gt;lock);</div><div class='add'>+	INIT_RADIX_TREE(&amp;blkcg-&gt;blkg_tree, GFP_ATOMIC);</div><div class='add'>+	INIT_HLIST_HEAD(&amp;blkcg-&gt;blkg_list);</div><div class='ctx'> </div><div class='del'>-free_newpn:</div><div class='del'>-	if (!keep_newpn)</div><div class='del'>-		kfree(newpn);</div><div class='del'>-free_buf:</div><div class='del'>-	kfree(buf);</div><div class='del'>-	return ret;</div><div class='add'>+	return &amp;blkcg-&gt;css;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-blkio_print_policy_node(struct seq_file *m, struct blkio_policy_node *pn)</div><div class='add'>+/**</div><div class='add'>+ * blkcg_init_queue - initialize blkcg part of request queue</div><div class='add'>+ * @q: request_queue to initialize</div><div class='add'>+ *</div><div class='add'>+ * Called from blk_alloc_queue_node(). Responsible for initializing blkcg</div><div class='add'>+ * part of new request_queue @q.</div><div class='add'>+ *</div><div class='add'>+ * RETURNS:</div><div class='add'>+ * 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+int blkcg_init_queue(struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	switch(pn-&gt;plid) {</div><div class='del'>-		case BLKIO_POLICY_PROP:</div><div class='del'>-			if (pn-&gt;fileid == BLKIO_PROP_weight_device)</div><div class='del'>-				seq_printf(m, "%u:%u\t%u\n", MAJOR(pn-&gt;dev),</div><div class='del'>-					MINOR(pn-&gt;dev), pn-&gt;val.weight);</div><div class='del'>-			break;</div><div class='del'>-		case BLKIO_POLICY_THROTL:</div><div class='del'>-			switch(pn-&gt;fileid) {</div><div class='del'>-			case BLKIO_THROTL_read_bps_device:</div><div class='del'>-			case BLKIO_THROTL_write_bps_device:</div><div class='del'>-				seq_printf(m, "%u:%u\t%llu\n", MAJOR(pn-&gt;dev),</div><div class='del'>-					MINOR(pn-&gt;dev), pn-&gt;val.bps);</div><div class='del'>-				break;</div><div class='del'>-			case BLKIO_THROTL_read_iops_device:</div><div class='del'>-			case BLKIO_THROTL_write_iops_device:</div><div class='del'>-				seq_printf(m, "%u:%u\t%u\n", MAJOR(pn-&gt;dev),</div><div class='del'>-					MINOR(pn-&gt;dev), pn-&gt;val.iops);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			BUG();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+	might_sleep();</div><div class='ctx'> </div><div class='del'>-/* cgroup files which read their data from policy nodes end up here */</div><div class='del'>-static void blkio_read_policy_node_files(struct cftype *cft,</div><div class='del'>-			struct blkio_cgroup *blkcg, struct seq_file *m)</div><div class='del'>-{</div><div class='del'>-	struct blkio_policy_node *pn;</div><div class='del'>-</div><div class='del'>-	if (!list_empty(&amp;blkcg-&gt;policy_list)) {</div><div class='del'>-		spin_lock_irq(&amp;blkcg-&gt;lock);</div><div class='del'>-		list_for_each_entry(pn, &amp;blkcg-&gt;policy_list, node) {</div><div class='del'>-			if (!pn_matches_cftype(cft, pn))</div><div class='del'>-				continue;</div><div class='del'>-			blkio_print_policy_node(m, pn);</div><div class='del'>-		}</div><div class='del'>-		spin_unlock_irq(&amp;blkcg-&gt;lock);</div><div class='del'>-	}</div><div class='add'>+	return blk_throtl_init(q);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int blkiocg_file_read(struct cgroup *cgrp, struct cftype *cft,</div><div class='del'>-				struct seq_file *m)</div><div class='add'>+/**</div><div class='add'>+ * blkcg_drain_queue - drain blkcg part of request_queue</div><div class='add'>+ * @q: request_queue to drain</div><div class='add'>+ *</div><div class='add'>+ * Called from blk_drain_queue().  Responsible for draining blkcg part.</div><div class='add'>+ */</div><div class='add'>+void blkcg_drain_queue(struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_cgroup *blkcg;</div><div class='del'>-	enum blkio_policy_id plid = BLKIOFILE_POLICY(cft-&gt;private);</div><div class='del'>-	int name = BLKIOFILE_ATTR(cft-&gt;private);</div><div class='del'>-</div><div class='del'>-	blkcg = cgroup_to_blkio_cgroup(cgrp);</div><div class='del'>-</div><div class='del'>-	switch(plid) {</div><div class='del'>-	case BLKIO_POLICY_PROP:</div><div class='del'>-		switch(name) {</div><div class='del'>-		case BLKIO_PROP_weight_device:</div><div class='del'>-			blkio_read_policy_node_files(cft, blkcg, m);</div><div class='del'>-			return 0;</div><div class='del'>-		default:</div><div class='del'>-			BUG();</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case BLKIO_POLICY_THROTL:</div><div class='del'>-		switch(name){</div><div class='del'>-		case BLKIO_THROTL_read_bps_device:</div><div class='del'>-		case BLKIO_THROTL_write_bps_device:</div><div class='del'>-		case BLKIO_THROTL_read_iops_device:</div><div class='del'>-		case BLKIO_THROTL_write_iops_device:</div><div class='del'>-			blkio_read_policy_node_files(cft, blkcg, m);</div><div class='del'>-			return 0;</div><div class='del'>-		default:</div><div class='del'>-			BUG();</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='add'>+	lockdep_assert_held(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	blk_throtl_drain(q);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int blkio_read_blkg_stats(struct blkio_cgroup *blkcg,</div><div class='del'>-		struct cftype *cft, struct cgroup_map_cb *cb,</div><div class='del'>-		enum stat_type type, bool show_total, bool pcpu)</div><div class='add'>+/**</div><div class='add'>+ * blkcg_exit_queue - exit and release blkcg part of request_queue</div><div class='add'>+ * @q: request_queue being released</div><div class='add'>+ *</div><div class='add'>+ * Called from blk_release_queue().  Responsible for exiting blkcg part.</div><div class='add'>+ */</div><div class='add'>+void blkcg_exit_queue(struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_group *blkg;</div><div class='del'>-	struct hlist_node *n;</div><div class='del'>-	uint64_t cgroup_total = 0;</div><div class='add'>+	spin_lock_irq(q-&gt;queue_lock);</div><div class='add'>+	blkg_destroy_all(q);</div><div class='add'>+	spin_unlock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	hlist_for_each_entry_rcu(blkg, n, &amp;blkcg-&gt;blkg_list, blkcg_node) {</div><div class='del'>-		if (blkg-&gt;dev) {</div><div class='del'>-			if (!cftype_blkg_same_policy(cft, blkg))</div><div class='del'>-				continue;</div><div class='del'>-			if (pcpu)</div><div class='del'>-				cgroup_total += blkio_get_stat_cpu(blkg, cb,</div><div class='del'>-						blkg-&gt;dev, type);</div><div class='del'>-			else {</div><div class='del'>-				spin_lock_irq(&amp;blkg-&gt;stats_lock);</div><div class='del'>-				cgroup_total += blkio_get_stat(blkg, cb,</div><div class='del'>-						blkg-&gt;dev, type);</div><div class='del'>-				spin_unlock_irq(&amp;blkg-&gt;stats_lock);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (show_total)</div><div class='del'>-		cb-&gt;fill(cb, "Total", cgroup_total);</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-	return 0;</div><div class='add'>+	blk_throtl_exit(q);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* All map kind of cgroup file get serviced by this function */</div><div class='del'>-static int blkiocg_file_read_map(struct cgroup *cgrp, struct cftype *cft,</div><div class='del'>-				struct cgroup_map_cb *cb)</div><div class='add'>+/*</div><div class='add'>+ * We cannot support shared io contexts, as we have no mean to support</div><div class='add'>+ * two tasks with the same ioc in two different groups without major rework</div><div class='add'>+ * of the main cic data structures.  For now we allow a task to change</div><div class='add'>+ * its cgroup only if it's the only owner of its ioc.</div><div class='add'>+ */</div><div class='add'>+static int blkcg_can_attach(struct cgroup *cgrp, struct cgroup_taskset *tset)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_cgroup *blkcg;</div><div class='del'>-	enum blkio_policy_id plid = BLKIOFILE_POLICY(cft-&gt;private);</div><div class='del'>-	int name = BLKIOFILE_ATTR(cft-&gt;private);</div><div class='del'>-</div><div class='del'>-	blkcg = cgroup_to_blkio_cgroup(cgrp);</div><div class='del'>-</div><div class='del'>-	switch(plid) {</div><div class='del'>-	case BLKIO_POLICY_PROP:</div><div class='del'>-		switch(name) {</div><div class='del'>-		case BLKIO_PROP_time:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-						BLKIO_STAT_TIME, 0, 0);</div><div class='del'>-		case BLKIO_PROP_sectors:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-						BLKIO_STAT_CPU_SECTORS, 0, 1);</div><div class='del'>-		case BLKIO_PROP_io_service_bytes:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-					BLKIO_STAT_CPU_SERVICE_BYTES, 1, 1);</div><div class='del'>-		case BLKIO_PROP_io_serviced:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-						BLKIO_STAT_CPU_SERVICED, 1, 1);</div><div class='del'>-		case BLKIO_PROP_io_service_time:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-						BLKIO_STAT_SERVICE_TIME, 1, 0);</div><div class='del'>-		case BLKIO_PROP_io_wait_time:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-						BLKIO_STAT_WAIT_TIME, 1, 0);</div><div class='del'>-		case BLKIO_PROP_io_merged:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-						BLKIO_STAT_CPU_MERGED, 1, 1);</div><div class='del'>-		case BLKIO_PROP_io_queued:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-						BLKIO_STAT_QUEUED, 1, 0);</div><div class='del'>-#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='del'>-		case BLKIO_PROP_unaccounted_time:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-					BLKIO_STAT_UNACCOUNTED_TIME, 0, 0);</div><div class='del'>-		case BLKIO_PROP_dequeue:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-						BLKIO_STAT_DEQUEUE, 0, 0);</div><div class='del'>-		case BLKIO_PROP_avg_queue_size:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-					BLKIO_STAT_AVG_QUEUE_SIZE, 0, 0);</div><div class='del'>-		case BLKIO_PROP_group_wait_time:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-					BLKIO_STAT_GROUP_WAIT_TIME, 0, 0);</div><div class='del'>-		case BLKIO_PROP_idle_time:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-						BLKIO_STAT_IDLE_TIME, 0, 0);</div><div class='del'>-		case BLKIO_PROP_empty_time:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-						BLKIO_STAT_EMPTY_TIME, 0, 0);</div><div class='del'>-#endif</div><div class='del'>-		default:</div><div class='del'>-			BUG();</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case BLKIO_POLICY_THROTL:</div><div class='del'>-		switch(name){</div><div class='del'>-		case BLKIO_THROTL_io_service_bytes:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-						BLKIO_STAT_CPU_SERVICE_BYTES, 1, 1);</div><div class='del'>-		case BLKIO_THROTL_io_serviced:</div><div class='del'>-			return blkio_read_blkg_stats(blkcg, cft, cb,</div><div class='del'>-						BLKIO_STAT_CPU_SERVICED, 1, 1);</div><div class='del'>-		default:</div><div class='del'>-			BUG();</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='add'>+	struct task_struct *task;</div><div class='add'>+	struct io_context *ioc;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* task_lock() is needed to avoid races with exit_io_context() */</div><div class='add'>+	cgroup_taskset_for_each(task, cgrp, tset) {</div><div class='add'>+		task_lock(task);</div><div class='add'>+		ioc = task-&gt;io_context;</div><div class='add'>+		if (ioc &amp;&amp; atomic_read(&amp;ioc-&gt;nr_tasks) &gt; 1)</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+		task_unlock(task);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int blkio_weight_write(struct blkio_cgroup *blkcg, u64 val)</div><div class='del'>-{</div><div class='del'>-	struct blkio_group *blkg;</div><div class='del'>-	struct hlist_node *n;</div><div class='del'>-	struct blkio_policy_node *pn;</div><div class='del'>-</div><div class='del'>-	if (val &lt; BLKIO_WEIGHT_MIN || val &gt; BLKIO_WEIGHT_MAX)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+struct cgroup_subsys blkio_subsys = {</div><div class='add'>+	.name = "blkio",</div><div class='add'>+	.create = blkcg_create,</div><div class='add'>+	.can_attach = blkcg_can_attach,</div><div class='add'>+	.pre_destroy = blkcg_pre_destroy,</div><div class='add'>+	.destroy = blkcg_destroy,</div><div class='add'>+	.subsys_id = blkio_subsys_id,</div><div class='add'>+	.base_cftypes = blkcg_files,</div><div class='add'>+	.module = THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL_GPL(blkio_subsys);</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;blkio_list_lock);</div><div class='del'>-	spin_lock_irq(&amp;blkcg-&gt;lock);</div><div class='del'>-	blkcg-&gt;weight = (unsigned int)val;</div><div class='add'>+/**</div><div class='add'>+ * blkcg_activate_policy - activate a blkcg policy on a request_queue</div><div class='add'>+ * @q: request_queue of interest</div><div class='add'>+ * @pol: blkcg policy to activate</div><div class='add'>+ *</div><div class='add'>+ * Activate @pol on @q.  Requires %GFP_KERNEL context.  @q goes through</div><div class='add'>+ * bypass mode to populate its blkgs with policy_data for @pol.</div><div class='add'>+ *</div><div class='add'>+ * Activation happens with @q bypassed, so nobody would be accessing blkgs</div><div class='add'>+ * from IO path.  Update of each blkg is protected by both queue and blkcg</div><div class='add'>+ * locks so that holding either lock and testing blkcg_policy_enabled() is</div><div class='add'>+ * always enough for dereferencing policy data.</div><div class='add'>+ *</div><div class='add'>+ * The caller is responsible for synchronizing [de]activations and policy</div><div class='add'>+ * [un]registerations.  Returns 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+int blkcg_activate_policy(struct request_queue *q,</div><div class='add'>+			  const struct blkcg_policy *pol)</div><div class='add'>+{</div><div class='add'>+	LIST_HEAD(pds);</div><div class='add'>+	struct blkcg_gq *blkg;</div><div class='add'>+	struct blkg_policy_data *pd, *n;</div><div class='add'>+	int cnt = 0, ret;</div><div class='ctx'> </div><div class='del'>-	hlist_for_each_entry(blkg, n, &amp;blkcg-&gt;blkg_list, blkcg_node) {</div><div class='del'>-		pn = blkio_policy_search_node(blkcg, blkg-&gt;dev,</div><div class='del'>-				BLKIO_POLICY_PROP, BLKIO_PROP_weight_device);</div><div class='del'>-		if (pn)</div><div class='del'>-			continue;</div><div class='add'>+	if (blkcg_policy_enabled(q, pol))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-		blkio_update_group_weight(blkg, blkcg-&gt;weight);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irq(&amp;blkcg-&gt;lock);</div><div class='del'>-	spin_unlock(&amp;blkio_list_lock);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	blk_queue_bypass_start(q);</div><div class='ctx'> </div><div class='del'>-static u64 blkiocg_file_read_u64 (struct cgroup *cgrp, struct cftype *cft) {</div><div class='del'>-	struct blkio_cgroup *blkcg;</div><div class='del'>-	enum blkio_policy_id plid = BLKIOFILE_POLICY(cft-&gt;private);</div><div class='del'>-	int name = BLKIOFILE_ATTR(cft-&gt;private);</div><div class='add'>+	/* make sure the root blkg exists and count the existing blkgs */</div><div class='add'>+	spin_lock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-	blkcg = cgroup_to_blkio_cgroup(cgrp);</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	blkg = __blkg_lookup_create(&amp;blkcg_root, q);</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> </div><div class='del'>-	switch(plid) {</div><div class='del'>-	case BLKIO_POLICY_PROP:</div><div class='del'>-		switch(name) {</div><div class='del'>-		case BLKIO_PROP_weight:</div><div class='del'>-			return (u64)blkcg-&gt;weight;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='add'>+	if (IS_ERR(blkg)) {</div><div class='add'>+		ret = PTR_ERR(blkg);</div><div class='add'>+		goto out_unlock;</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	q-&gt;root_blkg = blkg;</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-blkiocg_file_write_u64(struct cgroup *cgrp, struct cftype *cft, u64 val)</div><div class='del'>-{</div><div class='del'>-	struct blkio_cgroup *blkcg;</div><div class='del'>-	enum blkio_policy_id plid = BLKIOFILE_POLICY(cft-&gt;private);</div><div class='del'>-	int name = BLKIOFILE_ATTR(cft-&gt;private);</div><div class='add'>+	list_for_each_entry(blkg, &amp;q-&gt;blkg_list, q_node)</div><div class='add'>+		cnt++;</div><div class='ctx'> </div><div class='del'>-	blkcg = cgroup_to_blkio_cgroup(cgrp);</div><div class='add'>+	spin_unlock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-	switch(plid) {</div><div class='del'>-	case BLKIO_POLICY_PROP:</div><div class='del'>-		switch(name) {</div><div class='del'>-		case BLKIO_PROP_weight:</div><div class='del'>-			return blkio_weight_write(blkcg, val);</div><div class='add'>+	/* allocate policy_data for all existing blkgs */</div><div class='add'>+	while (cnt--) {</div><div class='add'>+		pd = kzalloc_node(pol-&gt;pd_size, GFP_KERNEL, q-&gt;node);</div><div class='add'>+		if (!pd) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto out_free;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='add'>+		list_add_tail(&amp;pd-&gt;alloc_node, &amp;pds);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct cftype blkio_files[] = {</div><div class='del'>-	{</div><div class='del'>-		.name = "weight_device",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_weight_device),</div><div class='del'>-		.read_seq_string = blkiocg_file_read,</div><div class='del'>-		.write_string = blkiocg_file_write,</div><div class='del'>-		.max_write_len = 256,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "weight",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_weight),</div><div class='del'>-		.read_u64 = blkiocg_file_read_u64,</div><div class='del'>-		.write_u64 = blkiocg_file_write_u64,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "time",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_time),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "sectors",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_sectors),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "io_service_bytes",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_io_service_bytes),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "io_serviced",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_io_serviced),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "io_service_time",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_io_service_time),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "io_wait_time",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_io_wait_time),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "io_merged",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_io_merged),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "io_queued",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_io_queued),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "reset_stats",</div><div class='del'>-		.write_u64 = blkiocg_reset_stats,</div><div class='del'>-	},</div><div class='del'>-#ifdef CONFIG_BLK_DEV_THROTTLING</div><div class='del'>-	{</div><div class='del'>-		.name = "throttle.read_bps_device",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_THROTL,</div><div class='del'>-				BLKIO_THROTL_read_bps_device),</div><div class='del'>-		.read_seq_string = blkiocg_file_read,</div><div class='del'>-		.write_string = blkiocg_file_write,</div><div class='del'>-		.max_write_len = 256,</div><div class='del'>-	},</div><div class='add'>+	/*</div><div class='add'>+	 * Install the allocated pds.  With @q bypassing, no new blkg</div><div class='add'>+	 * should have been created while the queue lock was dropped.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-	{</div><div class='del'>-		.name = "throttle.write_bps_device",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_THROTL,</div><div class='del'>-				BLKIO_THROTL_write_bps_device),</div><div class='del'>-		.read_seq_string = blkiocg_file_read,</div><div class='del'>-		.write_string = blkiocg_file_write,</div><div class='del'>-		.max_write_len = 256,</div><div class='del'>-	},</div><div class='add'>+	list_for_each_entry(blkg, &amp;q-&gt;blkg_list, q_node) {</div><div class='add'>+		if (WARN_ON(list_empty(&amp;pds))) {</div><div class='add'>+			/* umm... this shouldn't happen, just abort */</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto out_unlock;</div><div class='add'>+		}</div><div class='add'>+		pd = list_first_entry(&amp;pds, struct blkg_policy_data, alloc_node);</div><div class='add'>+		list_del_init(&amp;pd-&gt;alloc_node);</div><div class='ctx'> </div><div class='del'>-	{</div><div class='del'>-		.name = "throttle.read_iops_device",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_THROTL,</div><div class='del'>-				BLKIO_THROTL_read_iops_device),</div><div class='del'>-		.read_seq_string = blkiocg_file_read,</div><div class='del'>-		.write_string = blkiocg_file_write,</div><div class='del'>-		.max_write_len = 256,</div><div class='del'>-	},</div><div class='add'>+		/* grab blkcg lock too while installing @pd on @blkg */</div><div class='add'>+		spin_lock(&amp;blkg-&gt;blkcg-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	{</div><div class='del'>-		.name = "throttle.write_iops_device",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_THROTL,</div><div class='del'>-				BLKIO_THROTL_write_iops_device),</div><div class='del'>-		.read_seq_string = blkiocg_file_read,</div><div class='del'>-		.write_string = blkiocg_file_write,</div><div class='del'>-		.max_write_len = 256,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "throttle.io_service_bytes",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_THROTL,</div><div class='del'>-				BLKIO_THROTL_io_service_bytes),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "throttle.io_serviced",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_THROTL,</div><div class='del'>-				BLKIO_THROTL_io_serviced),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-#endif /* CONFIG_BLK_DEV_THROTTLING */</div><div class='add'>+		blkg-&gt;pd[pol-&gt;plid] = pd;</div><div class='add'>+		pd-&gt;blkg = blkg;</div><div class='add'>+		pol-&gt;pd_init_fn(blkg);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='del'>-	{</div><div class='del'>-		.name = "avg_queue_size",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_avg_queue_size),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "group_wait_time",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_group_wait_time),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "idle_time",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_idle_time),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "empty_time",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_empty_time),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "dequeue",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_dequeue),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "unaccounted_time",</div><div class='del'>-		.private = BLKIOFILE_PRIVATE(BLKIO_POLICY_PROP,</div><div class='del'>-				BLKIO_PROP_unaccounted_time),</div><div class='del'>-		.read_map = blkiocg_file_read_map,</div><div class='del'>-	},</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='add'>+		spin_unlock(&amp;blkg-&gt;blkcg-&gt;lock);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-static int blkiocg_populate(struct cgroup_subsys *subsys, struct cgroup *cgroup)</div><div class='del'>-{</div><div class='del'>-	return cgroup_add_files(cgroup, subsys, blkio_files,</div><div class='del'>-				ARRAY_SIZE(blkio_files));</div><div class='add'>+	__set_bit(pol-&gt;plid, q-&gt;blkcg_pols);</div><div class='add'>+	ret = 0;</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock_irq(q-&gt;queue_lock);</div><div class='add'>+out_free:</div><div class='add'>+	blk_queue_bypass_end(q);</div><div class='add'>+	list_for_each_entry_safe(pd, n, &amp;pds, alloc_node)</div><div class='add'>+		kfree(pd);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(blkcg_activate_policy);</div><div class='ctx'> </div><div class='del'>-static void blkiocg_destroy(struct cgroup *cgroup)</div><div class='add'>+/**</div><div class='add'>+ * blkcg_deactivate_policy - deactivate a blkcg policy on a request_queue</div><div class='add'>+ * @q: request_queue of interest</div><div class='add'>+ * @pol: blkcg policy to deactivate</div><div class='add'>+ *</div><div class='add'>+ * Deactivate @pol on @q.  Follows the same synchronization rules as</div><div class='add'>+ * blkcg_activate_policy().</div><div class='add'>+ */</div><div class='add'>+void blkcg_deactivate_policy(struct request_queue *q,</div><div class='add'>+			     const struct blkcg_policy *pol)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_cgroup *blkcg = cgroup_to_blkio_cgroup(cgroup);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct blkio_group *blkg;</div><div class='del'>-	void *key;</div><div class='del'>-	struct blkio_policy_type *blkiop;</div><div class='del'>-	struct blkio_policy_node *pn, *pntmp;</div><div class='add'>+	struct blkcg_gq *blkg;</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	do {</div><div class='del'>-		spin_lock_irqsave(&amp;blkcg-&gt;lock, flags);</div><div class='add'>+	if (!blkcg_policy_enabled(q, pol))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-		if (hlist_empty(&amp;blkcg-&gt;blkg_list)) {</div><div class='del'>-			spin_unlock_irqrestore(&amp;blkcg-&gt;lock, flags);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+	blk_queue_bypass_start(q);</div><div class='add'>+	spin_lock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-		blkg = hlist_entry(blkcg-&gt;blkg_list.first, struct blkio_group,</div><div class='del'>-					blkcg_node);</div><div class='del'>-		key = rcu_dereference(blkg-&gt;key);</div><div class='del'>-		__blkiocg_del_blkio_group(blkg);</div><div class='add'>+	__clear_bit(pol-&gt;plid, q-&gt;blkcg_pols);</div><div class='ctx'> </div><div class='del'>-		spin_unlock_irqrestore(&amp;blkcg-&gt;lock, flags);</div><div class='add'>+	/* if no policy is left, no need for blkgs - shoot them down */</div><div class='add'>+	if (bitmap_empty(q-&gt;blkcg_pols, BLKCG_MAX_POLS))</div><div class='add'>+		blkg_destroy_all(q);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * This blkio_group is being unlinked as associated cgroup is</div><div class='del'>-		 * going away. Let all the IO controlling policies know about</div><div class='del'>-		 * this event.</div><div class='del'>-		 */</div><div class='del'>-		spin_lock(&amp;blkio_list_lock);</div><div class='del'>-		list_for_each_entry(blkiop, &amp;blkio_list, list) {</div><div class='del'>-			if (blkiop-&gt;plid != blkg-&gt;plid)</div><div class='del'>-				continue;</div><div class='del'>-			blkiop-&gt;ops.blkio_unlink_group_fn(key, blkg);</div><div class='del'>-		}</div><div class='del'>-		spin_unlock(&amp;blkio_list_lock);</div><div class='del'>-	} while (1);</div><div class='add'>+	list_for_each_entry(blkg, &amp;q-&gt;blkg_list, q_node) {</div><div class='add'>+		/* grab blkcg lock too while removing @pd from @blkg */</div><div class='add'>+		spin_lock(&amp;blkg-&gt;blkcg-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry_safe(pn, pntmp, &amp;blkcg-&gt;policy_list, node) {</div><div class='del'>-		blkio_policy_delete_node(pn);</div><div class='del'>-		kfree(pn);</div><div class='del'>-	}</div><div class='add'>+		if (pol-&gt;pd_exit_fn)</div><div class='add'>+			pol-&gt;pd_exit_fn(blkg);</div><div class='ctx'> </div><div class='del'>-	free_css_id(&amp;blkio_subsys, &amp;blkcg-&gt;css);</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-	if (blkcg != &amp;blkio_root_cgroup)</div><div class='del'>-		kfree(blkcg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct cgroup_subsys_state *blkiocg_create(struct cgroup *cgroup)</div><div class='del'>-{</div><div class='del'>-	struct blkio_cgroup *blkcg;</div><div class='del'>-	struct cgroup *parent = cgroup-&gt;parent;</div><div class='add'>+		kfree(blkg-&gt;pd[pol-&gt;plid]);</div><div class='add'>+		blkg-&gt;pd[pol-&gt;plid] = NULL;</div><div class='ctx'> </div><div class='del'>-	if (!parent) {</div><div class='del'>-		blkcg = &amp;blkio_root_cgroup;</div><div class='del'>-		goto done;</div><div class='add'>+		spin_unlock(&amp;blkg-&gt;blkcg-&gt;lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	blkcg = kzalloc(sizeof(*blkcg), GFP_KERNEL);</div><div class='del'>-	if (!blkcg)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	blkcg-&gt;weight = BLKIO_WEIGHT_DEFAULT;</div><div class='del'>-done:</div><div class='del'>-	spin_lock_init(&amp;blkcg-&gt;lock);</div><div class='del'>-	INIT_HLIST_HEAD(&amp;blkcg-&gt;blkg_list);</div><div class='del'>-</div><div class='del'>-	INIT_LIST_HEAD(&amp;blkcg-&gt;policy_list);</div><div class='del'>-	return &amp;blkcg-&gt;css;</div><div class='add'>+	spin_unlock_irq(q-&gt;queue_lock);</div><div class='add'>+	blk_queue_bypass_end(q);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(blkcg_deactivate_policy);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * We cannot support shared io contexts, as we have no mean to support</div><div class='del'>- * two tasks with the same ioc in two different groups without major rework</div><div class='del'>- * of the main cic data structures.  For now we allow a task to change</div><div class='del'>- * its cgroup only if it's the only owner of its ioc.</div><div class='add'>+/**</div><div class='add'>+ * blkcg_policy_register - register a blkcg policy</div><div class='add'>+ * @pol: blkcg policy to register</div><div class='add'>+ *</div><div class='add'>+ * Register @pol with blkcg core.  Might sleep and @pol may be modified on</div><div class='add'>+ * successful registration.  Returns 0 on success and -errno on failure.</div><div class='ctx'>  */</div><div class='del'>-static int blkiocg_can_attach(struct cgroup *cgrp, struct cgroup_taskset *tset)</div><div class='add'>+int blkcg_policy_register(struct blkcg_policy *pol)</div><div class='ctx'> {</div><div class='del'>-	struct task_struct *task;</div><div class='del'>-	struct io_context *ioc;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int i, ret;</div><div class='ctx'> </div><div class='del'>-	/* task_lock() is needed to avoid races with exit_io_context() */</div><div class='del'>-	cgroup_taskset_for_each(task, cgrp, tset) {</div><div class='del'>-		task_lock(task);</div><div class='del'>-		ioc = task-&gt;io_context;</div><div class='del'>-		if (ioc &amp;&amp; atomic_read(&amp;ioc-&gt;nr_tasks) &gt; 1)</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-		task_unlock(task);</div><div class='del'>-		if (ret)</div><div class='add'>+	if (WARN_ON(pol-&gt;pd_size &lt; sizeof(struct blkg_policy_data)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;blkcg_pol_mutex);</div><div class='add'>+</div><div class='add'>+	/* find an empty slot */</div><div class='add'>+	ret = -ENOSPC;</div><div class='add'>+	for (i = 0; i &lt; BLKCG_MAX_POLS; i++)</div><div class='add'>+		if (!blkcg_policy[i])</div><div class='ctx'> 			break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='add'>+	if (i &gt;= BLKCG_MAX_POLS)</div><div class='add'>+		goto out_unlock;</div><div class='ctx'> </div><div class='del'>-static void blkiocg_attach(struct cgroup *cgrp, struct cgroup_taskset *tset)</div><div class='del'>-{</div><div class='del'>-	struct task_struct *task;</div><div class='del'>-	struct io_context *ioc;</div><div class='add'>+	/* register and update blkgs */</div><div class='add'>+	pol-&gt;plid = i;</div><div class='add'>+	blkcg_policy[i] = pol;</div><div class='ctx'> </div><div class='del'>-	cgroup_taskset_for_each(task, cgrp, tset) {</div><div class='del'>-		/* we don't lose anything even if ioc allocation fails */</div><div class='del'>-		ioc = get_task_io_context(task, GFP_ATOMIC, NUMA_NO_NODE);</div><div class='del'>-		if (ioc) {</div><div class='del'>-			ioc_cgroup_changed(ioc);</div><div class='del'>-			put_io_context(ioc);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	/* everything is in place, add intf files for the new policy */</div><div class='add'>+	if (pol-&gt;cftypes)</div><div class='add'>+		WARN_ON(cgroup_add_cftypes(&amp;blkio_subsys, pol-&gt;cftypes));</div><div class='add'>+	ret = 0;</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;blkcg_pol_mutex);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(blkcg_policy_register);</div><div class='ctx'> </div><div class='del'>-void blkio_policy_register(struct blkio_policy_type *blkiop)</div><div class='add'>+/**</div><div class='add'>+ * blkcg_policy_unregister - unregister a blkcg policy</div><div class='add'>+ * @pol: blkcg policy to unregister</div><div class='add'>+ *</div><div class='add'>+ * Undo blkcg_policy_register(@pol).  Might sleep.</div><div class='add'>+ */</div><div class='add'>+void blkcg_policy_unregister(struct blkcg_policy *pol)</div><div class='ctx'> {</div><div class='del'>-	spin_lock(&amp;blkio_list_lock);</div><div class='del'>-	list_add_tail(&amp;blkiop-&gt;list, &amp;blkio_list);</div><div class='del'>-	spin_unlock(&amp;blkio_list_lock);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blkio_policy_register);</div><div class='add'>+	mutex_lock(&amp;blkcg_pol_mutex);</div><div class='ctx'> </div><div class='del'>-void blkio_policy_unregister(struct blkio_policy_type *blkiop)</div><div class='del'>-{</div><div class='del'>-	spin_lock(&amp;blkio_list_lock);</div><div class='del'>-	list_del_init(&amp;blkiop-&gt;list);</div><div class='del'>-	spin_unlock(&amp;blkio_list_lock);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(blkio_policy_unregister);</div><div class='add'>+	if (WARN_ON(blkcg_policy[pol-&gt;plid] != pol))</div><div class='add'>+		goto out_unlock;</div><div class='ctx'> </div><div class='del'>-static int __init init_cgroup_blkio(void)</div><div class='del'>-{</div><div class='del'>-	return cgroup_load_subsys(&amp;blkio_subsys);</div><div class='del'>-}</div><div class='add'>+	/* kill the intf files first */</div><div class='add'>+	if (pol-&gt;cftypes)</div><div class='add'>+		cgroup_rm_cftypes(&amp;blkio_subsys, pol-&gt;cftypes);</div><div class='ctx'> </div><div class='del'>-static void __exit exit_cgroup_blkio(void)</div><div class='del'>-{</div><div class='del'>-	cgroup_unload_subsys(&amp;blkio_subsys);</div><div class='add'>+	/* unregister and update blkgs */</div><div class='add'>+	blkcg_policy[pol-&gt;plid] = NULL;</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;blkcg_pol_mutex);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(init_cgroup_blkio);</div><div class='del'>-module_exit(exit_cgroup_blkio);</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='add'>+EXPORT_SYMBOL_GPL(blkcg_policy_unregister);</div><div class='head'>diff --git a/block/blk-cgroup.h b/block/blk-cgroup.h<br/>index 6f3ace7e792f..8ac457ce7783 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-cgroup.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/blk-cgroup.h</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-cgroup.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk-cgroup.h</a></div><div class='hunk'>@@ -15,350 +15,371 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/cgroup.h&gt;</div><div class='ctx'> #include &lt;linux/u64_stats_sync.h&gt;</div><div class='del'>-</div><div class='del'>-enum blkio_policy_id {</div><div class='del'>-	BLKIO_POLICY_PROP = 0,		/* Proportional Bandwidth division */</div><div class='del'>-	BLKIO_POLICY_THROTL,		/* Throttling */</div><div class='del'>-};</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/radix-tree.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Max limits for throttle policy */</div><div class='ctx'> #define THROTL_IOPS_MAX		UINT_MAX</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_BLK_CGROUP) || defined(CONFIG_BLK_CGROUP_MODULE)</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_BLK_CGROUP</div><div class='del'>-/* When blk-cgroup is a module, its subsys_id isn't a compile-time constant */</div><div class='del'>-extern struct cgroup_subsys blkio_subsys;</div><div class='del'>-#define blkio_subsys_id blkio_subsys.subsys_id</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-enum stat_type {</div><div class='del'>-	/* Total time spent (in ns) between request dispatch to the driver and</div><div class='del'>-	 * request completion for IOs doen by this cgroup. This may not be</div><div class='del'>-	 * accurate when NCQ is turned on. */</div><div class='del'>-	BLKIO_STAT_SERVICE_TIME = 0,</div><div class='del'>-	/* Total time spent waiting in scheduler queue in ns */</div><div class='del'>-	BLKIO_STAT_WAIT_TIME,</div><div class='del'>-	/* Number of IOs queued up */</div><div class='del'>-	BLKIO_STAT_QUEUED,</div><div class='del'>-	/* All the single valued stats go below this */</div><div class='del'>-	BLKIO_STAT_TIME,</div><div class='del'>-#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='del'>-	/* Time not charged to this cgroup */</div><div class='del'>-	BLKIO_STAT_UNACCOUNTED_TIME,</div><div class='del'>-	BLKIO_STAT_AVG_QUEUE_SIZE,</div><div class='del'>-	BLKIO_STAT_IDLE_TIME,</div><div class='del'>-	BLKIO_STAT_EMPTY_TIME,</div><div class='del'>-	BLKIO_STAT_GROUP_WAIT_TIME,</div><div class='del'>-	BLKIO_STAT_DEQUEUE</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='add'>+/* CFQ specific, out here for blkcg-&gt;cfq_weight */</div><div class='add'>+#define CFQ_WEIGHT_MIN		10</div><div class='add'>+#define CFQ_WEIGHT_MAX		1000</div><div class='add'>+#define CFQ_WEIGHT_DEFAULT	500</div><div class='ctx'> </div><div class='del'>-/* Per cpu stats */</div><div class='del'>-enum stat_type_cpu {</div><div class='del'>-	BLKIO_STAT_CPU_SECTORS,</div><div class='del'>-	/* Total bytes transferred */</div><div class='del'>-	BLKIO_STAT_CPU_SERVICE_BYTES,</div><div class='del'>-	/* Total IOs serviced, post merge */</div><div class='del'>-	BLKIO_STAT_CPU_SERVICED,</div><div class='del'>-	/* Number of IOs merged */</div><div class='del'>-	BLKIO_STAT_CPU_MERGED,</div><div class='del'>-	BLKIO_STAT_CPU_NR</div><div class='del'>-};</div><div class='add'>+#ifdef CONFIG_BLK_CGROUP</div><div class='ctx'> </div><div class='del'>-enum stat_sub_type {</div><div class='del'>-	BLKIO_STAT_READ = 0,</div><div class='del'>-	BLKIO_STAT_WRITE,</div><div class='del'>-	BLKIO_STAT_SYNC,</div><div class='del'>-	BLKIO_STAT_ASYNC,</div><div class='del'>-	BLKIO_STAT_TOTAL</div><div class='del'>-};</div><div class='add'>+enum blkg_rwstat_type {</div><div class='add'>+	BLKG_RWSTAT_READ,</div><div class='add'>+	BLKG_RWSTAT_WRITE,</div><div class='add'>+	BLKG_RWSTAT_SYNC,</div><div class='add'>+	BLKG_RWSTAT_ASYNC,</div><div class='ctx'> </div><div class='del'>-/* blkg state flags */</div><div class='del'>-enum blkg_state_flags {</div><div class='del'>-	BLKG_waiting = 0,</div><div class='del'>-	BLKG_idling,</div><div class='del'>-	BLKG_empty,</div><div class='add'>+	BLKG_RWSTAT_NR,</div><div class='add'>+	BLKG_RWSTAT_TOTAL = BLKG_RWSTAT_NR,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* cgroup files owned by proportional weight policy */</div><div class='del'>-enum blkcg_file_name_prop {</div><div class='del'>-	BLKIO_PROP_weight = 1,</div><div class='del'>-	BLKIO_PROP_weight_device,</div><div class='del'>-	BLKIO_PROP_io_service_bytes,</div><div class='del'>-	BLKIO_PROP_io_serviced,</div><div class='del'>-	BLKIO_PROP_time,</div><div class='del'>-	BLKIO_PROP_sectors,</div><div class='del'>-	BLKIO_PROP_unaccounted_time,</div><div class='del'>-	BLKIO_PROP_io_service_time,</div><div class='del'>-	BLKIO_PROP_io_wait_time,</div><div class='del'>-	BLKIO_PROP_io_merged,</div><div class='del'>-	BLKIO_PROP_io_queued,</div><div class='del'>-	BLKIO_PROP_avg_queue_size,</div><div class='del'>-	BLKIO_PROP_group_wait_time,</div><div class='del'>-	BLKIO_PROP_idle_time,</div><div class='del'>-	BLKIO_PROP_empty_time,</div><div class='del'>-	BLKIO_PROP_dequeue,</div><div class='del'>-};</div><div class='add'>+struct blkcg_gq;</div><div class='ctx'> </div><div class='del'>-/* cgroup files owned by throttle policy */</div><div class='del'>-enum blkcg_file_name_throtl {</div><div class='del'>-	BLKIO_THROTL_read_bps_device,</div><div class='del'>-	BLKIO_THROTL_write_bps_device,</div><div class='del'>-	BLKIO_THROTL_read_iops_device,</div><div class='del'>-	BLKIO_THROTL_write_iops_device,</div><div class='del'>-	BLKIO_THROTL_io_service_bytes,</div><div class='del'>-	BLKIO_THROTL_io_serviced,</div><div class='del'>-};</div><div class='add'>+struct blkcg {</div><div class='add'>+	struct cgroup_subsys_state	css;</div><div class='add'>+	spinlock_t			lock;</div><div class='ctx'> </div><div class='del'>-struct blkio_cgroup {</div><div class='del'>-	struct cgroup_subsys_state css;</div><div class='del'>-	unsigned int weight;</div><div class='del'>-	spinlock_t lock;</div><div class='del'>-	struct hlist_head blkg_list;</div><div class='del'>-	struct list_head policy_list; /* list of blkio_policy_node */</div><div class='del'>-};</div><div class='add'>+	struct radix_tree_root		blkg_tree;</div><div class='add'>+	struct blkcg_gq			*blkg_hint;</div><div class='add'>+	struct hlist_head		blkg_list;</div><div class='add'>+</div><div class='add'>+	/* for policies to test whether associated blkcg has changed */</div><div class='add'>+	uint64_t			id;</div><div class='ctx'> </div><div class='del'>-struct blkio_group_stats {</div><div class='del'>-	/* total disk time and nr sectors dispatched by this group */</div><div class='del'>-	uint64_t time;</div><div class='del'>-	uint64_t stat_arr[BLKIO_STAT_QUEUED + 1][BLKIO_STAT_TOTAL];</div><div class='del'>-#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='del'>-	/* Time not charged to this cgroup */</div><div class='del'>-	uint64_t unaccounted_time;</div><div class='del'>-</div><div class='del'>-	/* Sum of number of IOs queued across all samples */</div><div class='del'>-	uint64_t avg_queue_size_sum;</div><div class='del'>-	/* Count of samples taken for average */</div><div class='del'>-	uint64_t avg_queue_size_samples;</div><div class='del'>-	/* How many times this group has been removed from service tree */</div><div class='del'>-	unsigned long dequeue;</div><div class='del'>-</div><div class='del'>-	/* Total time spent waiting for it to be assigned a timeslice. */</div><div class='del'>-	uint64_t group_wait_time;</div><div class='del'>-	uint64_t start_group_wait_time;</div><div class='del'>-</div><div class='del'>-	/* Time spent idling for this blkio_group */</div><div class='del'>-	uint64_t idle_time;</div><div class='del'>-	uint64_t start_idle_time;</div><div class='del'>-	/*</div><div class='del'>-	 * Total time when we have requests queued and do not contain the</div><div class='del'>-	 * current active queue.</div><div class='del'>-	 */</div><div class='del'>-	uint64_t empty_time;</div><div class='del'>-	uint64_t start_empty_time;</div><div class='del'>-	uint16_t flags;</div><div class='del'>-#endif</div><div class='add'>+	/* TODO: per-policy storage in blkcg */</div><div class='add'>+	unsigned int			cfq_weight;	/* belongs to cfq */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Per cpu blkio group stats */</div><div class='del'>-struct blkio_group_stats_cpu {</div><div class='del'>-	uint64_t sectors;</div><div class='del'>-	uint64_t stat_arr_cpu[BLKIO_STAT_CPU_NR][BLKIO_STAT_TOTAL];</div><div class='del'>-	struct u64_stats_sync syncp;</div><div class='add'>+struct blkg_stat {</div><div class='add'>+	struct u64_stats_sync		syncp;</div><div class='add'>+	uint64_t			cnt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct blkio_group {</div><div class='del'>-	/* An rcu protected unique identifier for the group */</div><div class='del'>-	void *key;</div><div class='del'>-	struct hlist_node blkcg_node;</div><div class='del'>-	unsigned short blkcg_id;</div><div class='del'>-	/* Store cgroup path */</div><div class='del'>-	char path[128];</div><div class='del'>-	/* The device MKDEV(major, minor), this group has been created for */</div><div class='del'>-	dev_t dev;</div><div class='del'>-	/* policy which owns this blk group */</div><div class='del'>-	enum blkio_policy_id plid;</div><div class='del'>-</div><div class='del'>-	/* Need to serialize the stats in the case of reset/update */</div><div class='del'>-	spinlock_t stats_lock;</div><div class='del'>-	struct blkio_group_stats stats;</div><div class='del'>-	/* Per cpu stats pointer */</div><div class='del'>-	struct blkio_group_stats_cpu __percpu *stats_cpu;</div><div class='add'>+struct blkg_rwstat {</div><div class='add'>+	struct u64_stats_sync		syncp;</div><div class='add'>+	uint64_t			cnt[BLKG_RWSTAT_NR];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct blkio_policy_node {</div><div class='del'>-	struct list_head node;</div><div class='del'>-	dev_t dev;</div><div class='del'>-	/* This node belongs to max bw policy or porportional weight policy */</div><div class='del'>-	enum blkio_policy_id plid;</div><div class='del'>-	/* cgroup file to which this rule belongs to */</div><div class='del'>-	int fileid;</div><div class='del'>-</div><div class='del'>-	union {</div><div class='del'>-		unsigned int weight;</div><div class='del'>-		/*</div><div class='del'>-		 * Rate read/write in terms of bytes per second</div><div class='del'>-		 * Whether this rate represents read or write is determined</div><div class='del'>-		 * by file type "fileid".</div><div class='del'>-		 */</div><div class='del'>-		u64 bps;</div><div class='del'>-		unsigned int iops;</div><div class='del'>-	} val;</div><div class='add'>+/*</div><div class='add'>+ * A blkcg_gq (blkg) is association between a block cgroup (blkcg) and a</div><div class='add'>+ * request_queue (q).  This is used by blkcg policies which need to track</div><div class='add'>+ * information per blkcg - q pair.</div><div class='add'>+ *</div><div class='add'>+ * There can be multiple active blkcg policies and each has its private</div><div class='add'>+ * data on each blkg, the size of which is determined by</div><div class='add'>+ * blkcg_policy-&gt;pd_size.  blkcg core allocates and frees such areas</div><div class='add'>+ * together with blkg and invokes pd_init/exit_fn() methods.</div><div class='add'>+ *</div><div class='add'>+ * Such private data must embed struct blkg_policy_data (pd) at the</div><div class='add'>+ * beginning and pd_size can't be smaller than pd.</div><div class='add'>+ */</div><div class='add'>+struct blkg_policy_data {</div><div class='add'>+	/* the blkg this per-policy data belongs to */</div><div class='add'>+	struct blkcg_gq			*blkg;</div><div class='add'>+</div><div class='add'>+	/* used during policy activation */</div><div class='add'>+	struct list_head		alloc_node;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-extern unsigned int blkcg_get_weight(struct blkio_cgroup *blkcg,</div><div class='del'>-				     dev_t dev);</div><div class='del'>-extern uint64_t blkcg_get_read_bps(struct blkio_cgroup *blkcg,</div><div class='del'>-				     dev_t dev);</div><div class='del'>-extern uint64_t blkcg_get_write_bps(struct blkio_cgroup *blkcg,</div><div class='del'>-				     dev_t dev);</div><div class='del'>-extern unsigned int blkcg_get_read_iops(struct blkio_cgroup *blkcg,</div><div class='del'>-				     dev_t dev);</div><div class='del'>-extern unsigned int blkcg_get_write_iops(struct blkio_cgroup *blkcg,</div><div class='del'>-				     dev_t dev);</div><div class='del'>-</div><div class='del'>-typedef void (blkio_unlink_group_fn) (void *key, struct blkio_group *blkg);</div><div class='del'>-</div><div class='del'>-typedef void (blkio_update_group_weight_fn) (void *key,</div><div class='del'>-			struct blkio_group *blkg, unsigned int weight);</div><div class='del'>-typedef void (blkio_update_group_read_bps_fn) (void * key,</div><div class='del'>-			struct blkio_group *blkg, u64 read_bps);</div><div class='del'>-typedef void (blkio_update_group_write_bps_fn) (void *key,</div><div class='del'>-			struct blkio_group *blkg, u64 write_bps);</div><div class='del'>-typedef void (blkio_update_group_read_iops_fn) (void *key,</div><div class='del'>-			struct blkio_group *blkg, unsigned int read_iops);</div><div class='del'>-typedef void (blkio_update_group_write_iops_fn) (void *key,</div><div class='del'>-			struct blkio_group *blkg, unsigned int write_iops);</div><div class='del'>-</div><div class='del'>-struct blkio_policy_ops {</div><div class='del'>-	blkio_unlink_group_fn *blkio_unlink_group_fn;</div><div class='del'>-	blkio_update_group_weight_fn *blkio_update_group_weight_fn;</div><div class='del'>-	blkio_update_group_read_bps_fn *blkio_update_group_read_bps_fn;</div><div class='del'>-	blkio_update_group_write_bps_fn *blkio_update_group_write_bps_fn;</div><div class='del'>-	blkio_update_group_read_iops_fn *blkio_update_group_read_iops_fn;</div><div class='del'>-	blkio_update_group_write_iops_fn *blkio_update_group_write_iops_fn;</div><div class='add'>+/* association between a blk cgroup and a request queue */</div><div class='add'>+struct blkcg_gq {</div><div class='add'>+	/* Pointer to the associated request_queue */</div><div class='add'>+	struct request_queue		*q;</div><div class='add'>+	struct list_head		q_node;</div><div class='add'>+	struct hlist_node		blkcg_node;</div><div class='add'>+	struct blkcg			*blkcg;</div><div class='add'>+	/* reference count */</div><div class='add'>+	int				refcnt;</div><div class='add'>+</div><div class='add'>+	struct blkg_policy_data		*pd[BLKCG_MAX_POLS];</div><div class='add'>+</div><div class='add'>+	struct rcu_head			rcu_head;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct blkio_policy_type {</div><div class='del'>-	struct list_head list;</div><div class='del'>-	struct blkio_policy_ops ops;</div><div class='del'>-	enum blkio_policy_id plid;</div><div class='add'>+typedef void (blkcg_pol_init_pd_fn)(struct blkcg_gq *blkg);</div><div class='add'>+typedef void (blkcg_pol_exit_pd_fn)(struct blkcg_gq *blkg);</div><div class='add'>+typedef void (blkcg_pol_reset_pd_stats_fn)(struct blkcg_gq *blkg);</div><div class='add'>+</div><div class='add'>+struct blkcg_policy {</div><div class='add'>+	int				plid;</div><div class='add'>+	/* policy specific private data size */</div><div class='add'>+	size_t				pd_size;</div><div class='add'>+	/* cgroup files for the policy */</div><div class='add'>+	struct cftype			*cftypes;</div><div class='add'>+</div><div class='add'>+	/* operations */</div><div class='add'>+	blkcg_pol_init_pd_fn		*pd_init_fn;</div><div class='add'>+	blkcg_pol_exit_pd_fn		*pd_exit_fn;</div><div class='add'>+	blkcg_pol_reset_pd_stats_fn	*pd_reset_stats_fn;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+extern struct blkcg blkcg_root;</div><div class='add'>+</div><div class='add'>+struct blkcg *cgroup_to_blkcg(struct cgroup *cgroup);</div><div class='add'>+struct blkcg *bio_blkcg(struct bio *bio);</div><div class='add'>+struct blkcg_gq *blkg_lookup(struct blkcg *blkcg, struct request_queue *q);</div><div class='add'>+struct blkcg_gq *blkg_lookup_create(struct blkcg *blkcg,</div><div class='add'>+				    struct request_queue *q);</div><div class='add'>+int blkcg_init_queue(struct request_queue *q);</div><div class='add'>+void blkcg_drain_queue(struct request_queue *q);</div><div class='add'>+void blkcg_exit_queue(struct request_queue *q);</div><div class='add'>+</div><div class='ctx'> /* Blkio controller policy registration */</div><div class='del'>-extern void blkio_policy_register(struct blkio_policy_type *);</div><div class='del'>-extern void blkio_policy_unregister(struct blkio_policy_type *);</div><div class='add'>+int blkcg_policy_register(struct blkcg_policy *pol);</div><div class='add'>+void blkcg_policy_unregister(struct blkcg_policy *pol);</div><div class='add'>+int blkcg_activate_policy(struct request_queue *q,</div><div class='add'>+			  const struct blkcg_policy *pol);</div><div class='add'>+void blkcg_deactivate_policy(struct request_queue *q,</div><div class='add'>+			     const struct blkcg_policy *pol);</div><div class='add'>+</div><div class='add'>+void blkcg_print_blkgs(struct seq_file *sf, struct blkcg *blkcg,</div><div class='add'>+		       u64 (*prfill)(struct seq_file *,</div><div class='add'>+				     struct blkg_policy_data *, int),</div><div class='add'>+		       const struct blkcg_policy *pol, int data,</div><div class='add'>+		       bool show_total);</div><div class='add'>+u64 __blkg_prfill_u64(struct seq_file *sf, struct blkg_policy_data *pd, u64 v);</div><div class='add'>+u64 __blkg_prfill_rwstat(struct seq_file *sf, struct blkg_policy_data *pd,</div><div class='add'>+			 const struct blkg_rwstat *rwstat);</div><div class='add'>+u64 blkg_prfill_stat(struct seq_file *sf, struct blkg_policy_data *pd, int off);</div><div class='add'>+u64 blkg_prfill_rwstat(struct seq_file *sf, struct blkg_policy_data *pd,</div><div class='add'>+		       int off);</div><div class='add'>+</div><div class='add'>+struct blkg_conf_ctx {</div><div class='add'>+	struct gendisk			*disk;</div><div class='add'>+	struct blkcg_gq			*blkg;</div><div class='add'>+	u64				v;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int blkg_conf_prep(struct blkcg *blkcg, const struct blkcg_policy *pol,</div><div class='add'>+		   const char *input, struct blkg_conf_ctx *ctx);</div><div class='add'>+void blkg_conf_finish(struct blkg_conf_ctx *ctx);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * blkg_to_pdata - get policy private data</div><div class='add'>+ * @blkg: blkg of interest</div><div class='add'>+ * @pol: policy of interest</div><div class='add'>+ *</div><div class='add'>+ * Return pointer to private data associated with the @blkg-@pol pair.</div><div class='add'>+ */</div><div class='add'>+static inline struct blkg_policy_data *blkg_to_pd(struct blkcg_gq *blkg,</div><div class='add'>+						  struct blkcg_policy *pol)</div><div class='add'>+{</div><div class='add'>+	return blkg ? blkg-&gt;pd[pol-&gt;plid] : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pdata_to_blkg - get blkg associated with policy private data</div><div class='add'>+ * @pd: policy private data of interest</div><div class='add'>+ *</div><div class='add'>+ * @pd is policy private data.  Determine the blkg it's associated with.</div><div class='add'>+ */</div><div class='add'>+static inline struct blkcg_gq *pd_to_blkg(struct blkg_policy_data *pd)</div><div class='add'>+{</div><div class='add'>+	return pd ? pd-&gt;blkg : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * blkg_path - format cgroup path of blkg</div><div class='add'>+ * @blkg: blkg of interest</div><div class='add'>+ * @buf: target buffer</div><div class='add'>+ * @buflen: target buffer length</div><div class='add'>+ *</div><div class='add'>+ * Format the path of the cgroup of @blkg into @buf.</div><div class='add'>+ */</div><div class='add'>+static inline int blkg_path(struct blkcg_gq *blkg, char *buf, int buflen)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	ret = cgroup_path(blkg-&gt;blkcg-&gt;css.cgroup, buf, buflen);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	if (ret)</div><div class='add'>+		strncpy(buf, "&lt;unavailable&gt;", buflen);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static inline char *blkg_path(struct blkio_group *blkg)</div><div class='add'>+/**</div><div class='add'>+ * blkg_get - get a blkg reference</div><div class='add'>+ * @blkg: blkg to get</div><div class='add'>+ *</div><div class='add'>+ * The caller should be holding queue_lock and an existing reference.</div><div class='add'>+ */</div><div class='add'>+static inline void blkg_get(struct blkcg_gq *blkg)</div><div class='ctx'> {</div><div class='del'>-	return blkg-&gt;path;</div><div class='add'>+	lockdep_assert_held(blkg-&gt;q-&gt;queue_lock);</div><div class='add'>+	WARN_ON_ONCE(!blkg-&gt;refcnt);</div><div class='add'>+	blkg-&gt;refcnt++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#else</div><div class='add'>+void __blkg_release(struct blkcg_gq *blkg);</div><div class='ctx'> </div><div class='del'>-struct blkio_group {</div><div class='add'>+/**</div><div class='add'>+ * blkg_put - put a blkg reference</div><div class='add'>+ * @blkg: blkg to put</div><div class='add'>+ *</div><div class='add'>+ * The caller should be holding queue_lock.</div><div class='add'>+ */</div><div class='add'>+static inline void blkg_put(struct blkcg_gq *blkg)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(blkg-&gt;q-&gt;queue_lock);</div><div class='add'>+	WARN_ON_ONCE(blkg-&gt;refcnt &lt;= 0);</div><div class='add'>+	if (!--blkg-&gt;refcnt)</div><div class='add'>+		__blkg_release(blkg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * blkg_stat_add - add a value to a blkg_stat</div><div class='add'>+ * @stat: target blkg_stat</div><div class='add'>+ * @val: value to add</div><div class='add'>+ *</div><div class='add'>+ * Add @val to @stat.  The caller is responsible for synchronizing calls to</div><div class='add'>+ * this function.</div><div class='add'>+ */</div><div class='add'>+static inline void blkg_stat_add(struct blkg_stat *stat, uint64_t val)</div><div class='add'>+{</div><div class='add'>+	u64_stats_update_begin(&amp;stat-&gt;syncp);</div><div class='add'>+	stat-&gt;cnt += val;</div><div class='add'>+	u64_stats_update_end(&amp;stat-&gt;syncp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * blkg_stat_read - read the current value of a blkg_stat</div><div class='add'>+ * @stat: blkg_stat to read</div><div class='add'>+ *</div><div class='add'>+ * Read the current value of @stat.  This function can be called without</div><div class='add'>+ * synchroniztion and takes care of u64 atomicity.</div><div class='add'>+ */</div><div class='add'>+static inline uint64_t blkg_stat_read(struct blkg_stat *stat)</div><div class='add'>+{</div><div class='add'>+	unsigned int start;</div><div class='add'>+	uint64_t v;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;stat-&gt;syncp);</div><div class='add'>+		v = stat-&gt;cnt;</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;stat-&gt;syncp, start));</div><div class='add'>+</div><div class='add'>+	return v;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * blkg_stat_reset - reset a blkg_stat</div><div class='add'>+ * @stat: blkg_stat to reset</div><div class='add'>+ */</div><div class='add'>+static inline void blkg_stat_reset(struct blkg_stat *stat)</div><div class='add'>+{</div><div class='add'>+	stat-&gt;cnt = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * blkg_rwstat_add - add a value to a blkg_rwstat</div><div class='add'>+ * @rwstat: target blkg_rwstat</div><div class='add'>+ * @rw: mask of REQ_{WRITE|SYNC}</div><div class='add'>+ * @val: value to add</div><div class='add'>+ *</div><div class='add'>+ * Add @val to @rwstat.  The counters are chosen according to @rw.  The</div><div class='add'>+ * caller is responsible for synchronizing calls to this function.</div><div class='add'>+ */</div><div class='add'>+static inline void blkg_rwstat_add(struct blkg_rwstat *rwstat,</div><div class='add'>+				   int rw, uint64_t val)</div><div class='add'>+{</div><div class='add'>+	u64_stats_update_begin(&amp;rwstat-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	if (rw &amp; REQ_WRITE)</div><div class='add'>+		rwstat-&gt;cnt[BLKG_RWSTAT_WRITE] += val;</div><div class='add'>+	else</div><div class='add'>+		rwstat-&gt;cnt[BLKG_RWSTAT_READ] += val;</div><div class='add'>+	if (rw &amp; REQ_SYNC)</div><div class='add'>+		rwstat-&gt;cnt[BLKG_RWSTAT_SYNC] += val;</div><div class='add'>+	else</div><div class='add'>+		rwstat-&gt;cnt[BLKG_RWSTAT_ASYNC] += val;</div><div class='add'>+</div><div class='add'>+	u64_stats_update_end(&amp;rwstat-&gt;syncp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * blkg_rwstat_read - read the current values of a blkg_rwstat</div><div class='add'>+ * @rwstat: blkg_rwstat to read</div><div class='add'>+ *</div><div class='add'>+ * Read the current snapshot of @rwstat and return it as the return value.</div><div class='add'>+ * This function can be called without synchronization and takes care of</div><div class='add'>+ * u64 atomicity.</div><div class='add'>+ */</div><div class='add'>+static inline struct blkg_rwstat blkg_rwstat_read(struct blkg_rwstat *rwstat)</div><div class='add'>+{</div><div class='add'>+	unsigned int start;</div><div class='add'>+	struct blkg_rwstat tmp;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;rwstat-&gt;syncp);</div><div class='add'>+		tmp = *rwstat;</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;rwstat-&gt;syncp, start));</div><div class='add'>+</div><div class='add'>+	return tmp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * blkg_rwstat_sum - read the total count of a blkg_rwstat</div><div class='add'>+ * @rwstat: blkg_rwstat to read</div><div class='add'>+ *</div><div class='add'>+ * Return the total count of @rwstat regardless of the IO direction.  This</div><div class='add'>+ * function can be called without synchronization and takes care of u64</div><div class='add'>+ * atomicity.</div><div class='add'>+ */</div><div class='add'>+static inline uint64_t blkg_rwstat_sum(struct blkg_rwstat *rwstat)</div><div class='add'>+{</div><div class='add'>+	struct blkg_rwstat tmp = blkg_rwstat_read(rwstat);</div><div class='add'>+</div><div class='add'>+	return tmp.cnt[BLKG_RWSTAT_READ] + tmp.cnt[BLKG_RWSTAT_WRITE];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * blkg_rwstat_reset - reset a blkg_rwstat</div><div class='add'>+ * @rwstat: blkg_rwstat to reset</div><div class='add'>+ */</div><div class='add'>+static inline void blkg_rwstat_reset(struct blkg_rwstat *rwstat)</div><div class='add'>+{</div><div class='add'>+	memset(rwstat-&gt;cnt, 0, sizeof(rwstat-&gt;cnt));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else	/* CONFIG_BLK_CGROUP */</div><div class='add'>+</div><div class='add'>+struct cgroup;</div><div class='add'>+</div><div class='add'>+struct blkg_policy_data {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct blkio_policy_type {</div><div class='add'>+struct blkcg_gq {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline void blkio_policy_register(struct blkio_policy_type *blkiop) { }</div><div class='del'>-static inline void blkio_policy_unregister(struct blkio_policy_type *blkiop) { }</div><div class='del'>-</div><div class='del'>-static inline char *blkg_path(struct blkio_group *blkg) { return NULL; }</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define BLKIO_WEIGHT_MIN	10</div><div class='del'>-#define BLKIO_WEIGHT_MAX	1000</div><div class='del'>-#define BLKIO_WEIGHT_DEFAULT	500</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='del'>-void blkiocg_update_avg_queue_size_stats(struct blkio_group *blkg);</div><div class='del'>-void blkiocg_update_dequeue_stats(struct blkio_group *blkg,</div><div class='del'>-				unsigned long dequeue);</div><div class='del'>-void blkiocg_update_set_idle_time_stats(struct blkio_group *blkg);</div><div class='del'>-void blkiocg_update_idle_time_stats(struct blkio_group *blkg);</div><div class='del'>-void blkiocg_set_start_empty_time(struct blkio_group *blkg);</div><div class='del'>-</div><div class='del'>-#define BLKG_FLAG_FNS(name)						\</div><div class='del'>-static inline void blkio_mark_blkg_##name(				\</div><div class='del'>-		struct blkio_group_stats *stats)			\</div><div class='del'>-{									\</div><div class='del'>-	stats-&gt;flags |= (1 &lt;&lt; BLKG_##name);				\</div><div class='del'>-}									\</div><div class='del'>-static inline void blkio_clear_blkg_##name(				\</div><div class='del'>-		struct blkio_group_stats *stats)			\</div><div class='del'>-{									\</div><div class='del'>-	stats-&gt;flags &amp;= ~(1 &lt;&lt; BLKG_##name);				\</div><div class='del'>-}									\</div><div class='del'>-static inline int blkio_blkg_##name(struct blkio_group_stats *stats)	\</div><div class='del'>-{									\</div><div class='del'>-	return (stats-&gt;flags &amp; (1 &lt;&lt; BLKG_##name)) != 0;		\</div><div class='del'>-}									\</div><div class='del'>-</div><div class='del'>-BLKG_FLAG_FNS(waiting)</div><div class='del'>-BLKG_FLAG_FNS(idling)</div><div class='del'>-BLKG_FLAG_FNS(empty)</div><div class='del'>-#undef BLKG_FLAG_FNS</div><div class='del'>-#else</div><div class='del'>-static inline void blkiocg_update_avg_queue_size_stats(</div><div class='del'>-						struct blkio_group *blkg) {}</div><div class='del'>-static inline void blkiocg_update_dequeue_stats(struct blkio_group *blkg,</div><div class='del'>-						unsigned long dequeue) {}</div><div class='del'>-static inline void blkiocg_update_set_idle_time_stats(struct blkio_group *blkg)</div><div class='del'>-{}</div><div class='del'>-static inline void blkiocg_update_idle_time_stats(struct blkio_group *blkg) {}</div><div class='del'>-static inline void blkiocg_set_start_empty_time(struct blkio_group *blkg) {}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_BLK_CGROUP) || defined(CONFIG_BLK_CGROUP_MODULE)</div><div class='del'>-extern struct blkio_cgroup blkio_root_cgroup;</div><div class='del'>-extern struct blkio_cgroup *cgroup_to_blkio_cgroup(struct cgroup *cgroup);</div><div class='del'>-extern struct blkio_cgroup *task_blkio_cgroup(struct task_struct *tsk);</div><div class='del'>-extern void blkiocg_add_blkio_group(struct blkio_cgroup *blkcg,</div><div class='del'>-	struct blkio_group *blkg, void *key, dev_t dev,</div><div class='del'>-	enum blkio_policy_id plid);</div><div class='del'>-extern int blkio_alloc_blkg_stats(struct blkio_group *blkg);</div><div class='del'>-extern int blkiocg_del_blkio_group(struct blkio_group *blkg);</div><div class='del'>-extern struct blkio_group *blkiocg_lookup_group(struct blkio_cgroup *blkcg,</div><div class='del'>-						void *key);</div><div class='del'>-void blkiocg_update_timeslice_used(struct blkio_group *blkg,</div><div class='del'>-					unsigned long time,</div><div class='del'>-					unsigned long unaccounted_time);</div><div class='del'>-void blkiocg_update_dispatch_stats(struct blkio_group *blkg, uint64_t bytes,</div><div class='del'>-						bool direction, bool sync);</div><div class='del'>-void blkiocg_update_completion_stats(struct blkio_group *blkg,</div><div class='del'>-	uint64_t start_time, uint64_t io_start_time, bool direction, bool sync);</div><div class='del'>-void blkiocg_update_io_merged_stats(struct blkio_group *blkg, bool direction,</div><div class='del'>-					bool sync);</div><div class='del'>-void blkiocg_update_io_add_stats(struct blkio_group *blkg,</div><div class='del'>-		struct blkio_group *curr_blkg, bool direction, bool sync);</div><div class='del'>-void blkiocg_update_io_remove_stats(struct blkio_group *blkg,</div><div class='del'>-					bool direction, bool sync);</div><div class='del'>-#else</div><div class='del'>-struct cgroup;</div><div class='del'>-static inline struct blkio_cgroup *</div><div class='del'>-cgroup_to_blkio_cgroup(struct cgroup *cgroup) { return NULL; }</div><div class='del'>-static inline struct blkio_cgroup *</div><div class='del'>-task_blkio_cgroup(struct task_struct *tsk) { return NULL; }</div><div class='del'>-</div><div class='del'>-static inline void blkiocg_add_blkio_group(struct blkio_cgroup *blkcg,</div><div class='del'>-		struct blkio_group *blkg, void *key, dev_t dev,</div><div class='del'>-		enum blkio_policy_id plid) {}</div><div class='del'>-</div><div class='del'>-static inline int blkio_alloc_blkg_stats(struct blkio_group *blkg) { return 0; }</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-blkiocg_del_blkio_group(struct blkio_group *blkg) { return 0; }</div><div class='del'>-</div><div class='del'>-static inline struct blkio_group *</div><div class='del'>-blkiocg_lookup_group(struct blkio_cgroup *blkcg, void *key) { return NULL; }</div><div class='del'>-static inline void blkiocg_update_timeslice_used(struct blkio_group *blkg,</div><div class='del'>-						unsigned long time,</div><div class='del'>-						unsigned long unaccounted_time)</div><div class='del'>-{}</div><div class='del'>-static inline void blkiocg_update_dispatch_stats(struct blkio_group *blkg,</div><div class='del'>-				uint64_t bytes, bool direction, bool sync) {}</div><div class='del'>-static inline void blkiocg_update_completion_stats(struct blkio_group *blkg,</div><div class='del'>-		uint64_t start_time, uint64_t io_start_time, bool direction,</div><div class='del'>-		bool sync) {}</div><div class='del'>-static inline void blkiocg_update_io_merged_stats(struct blkio_group *blkg,</div><div class='del'>-						bool direction, bool sync) {}</div><div class='del'>-static inline void blkiocg_update_io_add_stats(struct blkio_group *blkg,</div><div class='del'>-		struct blkio_group *curr_blkg, bool direction, bool sync) {}</div><div class='del'>-static inline void blkiocg_update_io_remove_stats(struct blkio_group *blkg,</div><div class='del'>-						bool direction, bool sync) {}</div><div class='del'>-#endif</div><div class='del'>-#endif /* _BLK_CGROUP_H */</div><div class='add'>+struct blkcg_policy {</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct blkcg *cgroup_to_blkcg(struct cgroup *cgroup) { return NULL; }</div><div class='add'>+static inline struct blkcg *bio_blkcg(struct bio *bio) { return NULL; }</div><div class='add'>+static inline struct blkcg_gq *blkg_lookup(struct blkcg *blkcg, void *key) { return NULL; }</div><div class='add'>+static inline int blkcg_init_queue(struct request_queue *q) { return 0; }</div><div class='add'>+static inline void blkcg_drain_queue(struct request_queue *q) { }</div><div class='add'>+static inline void blkcg_exit_queue(struct request_queue *q) { }</div><div class='add'>+static inline int blkcg_policy_register(struct blkcg_policy *pol) { return 0; }</div><div class='add'>+static inline void blkcg_policy_unregister(struct blkcg_policy *pol) { }</div><div class='add'>+static inline int blkcg_activate_policy(struct request_queue *q,</div><div class='add'>+					const struct blkcg_policy *pol) { return 0; }</div><div class='add'>+static inline void blkcg_deactivate_policy(struct request_queue *q,</div><div class='add'>+					   const struct blkcg_policy *pol) { }</div><div class='add'>+</div><div class='add'>+static inline struct blkg_policy_data *blkg_to_pd(struct blkcg_gq *blkg,</div><div class='add'>+						  struct blkcg_policy *pol) { return NULL; }</div><div class='add'>+static inline struct blkcg_gq *pd_to_blkg(struct blkg_policy_data *pd) { return NULL; }</div><div class='add'>+static inline char *blkg_path(struct blkcg_gq *blkg) { return NULL; }</div><div class='add'>+static inline void blkg_get(struct blkcg_gq *blkg) { }</div><div class='add'>+static inline void blkg_put(struct blkcg_gq *blkg) { }</div><div class='add'>+</div><div class='add'>+#endif	/* CONFIG_BLK_CGROUP */</div><div class='add'>+#endif	/* _BLK_CGROUP_H */</div><div class='head'>diff --git a/block/blk-core.c b/block/blk-core.c<br/>index 1f61b74867e4..3c923a7aeb56 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/blk-core.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk-core.c</a></div><div class='hunk'>@@ -29,11 +29,13 @@</div><div class='ctx'> #include &lt;linux/fault-inject.h&gt;</div><div class='ctx'> #include &lt;linux/list_sort.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/ratelimit.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='ctx'> #include &lt;trace/events/block.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "blk.h"</div><div class='add'>+#include "blk-cgroup.h"</div><div class='ctx'> </div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL_GPL(block_bio_remap);</div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL_GPL(block_rq_remap);</div><div class='hunk'>@@ -280,7 +282,7 @@ EXPORT_SYMBOL(blk_stop_queue);</div><div class='ctx'>  *</div><div class='ctx'>  *     This function does not cancel any asynchronous activity arising</div><div class='ctx'>  *     out of elevator or throttling code. That would require elevaotor_exit()</div><div class='del'>- *     and blk_throtl_exit() to be called with queue lock initialized.</div><div class='add'>+ *     and blkcg_exit_queue() to be called with queue lock initialized.</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> void blk_sync_queue(struct request_queue *q)</div><div class='hunk'>@@ -365,17 +367,23 @@ void blk_drain_queue(struct request_queue *q, bool drain_all)</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-		elv_drain_elevator(q);</div><div class='del'>-		if (drain_all)</div><div class='del'>-			blk_throtl_drain(q);</div><div class='add'>+		/*</div><div class='add'>+		 * The caller might be trying to drain @q before its</div><div class='add'>+		 * elevator is initialized.</div><div class='add'>+		 */</div><div class='add'>+		if (q-&gt;elevator)</div><div class='add'>+			elv_drain_elevator(q);</div><div class='add'>+</div><div class='add'>+		blkcg_drain_queue(q);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * This function might be called on a queue which failed</div><div class='del'>-		 * driver init after queue creation.  Some drivers</div><div class='del'>-		 * (e.g. fd) get unhappy in such cases.  Kick queue iff</div><div class='del'>-		 * dispatch queue has something on it.</div><div class='add'>+		 * driver init after queue creation or is not yet fully</div><div class='add'>+		 * active yet.  Some drivers (e.g. fd and loop) get unhappy</div><div class='add'>+		 * in such cases.  Kick queue iff dispatch queue has</div><div class='add'>+		 * something on it and @q has request_fn set.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!list_empty(&amp;q-&gt;queue_head))</div><div class='add'>+		if (!list_empty(&amp;q-&gt;queue_head) &amp;&amp; q-&gt;request_fn)</div><div class='ctx'> 			__blk_run_queue(q);</div><div class='ctx'> </div><div class='ctx'> 		drain |= q-&gt;rq.elvpriv;</div><div class='hunk'>@@ -403,6 +411,49 @@ void blk_drain_queue(struct request_queue *q, bool drain_all)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * blk_queue_bypass_start - enter queue bypass mode</div><div class='add'>+ * @q: queue of interest</div><div class='add'>+ *</div><div class='add'>+ * In bypass mode, only the dispatch FIFO queue of @q is used.  This</div><div class='add'>+ * function makes @q enter bypass mode and drains all requests which were</div><div class='add'>+ * throttled or issued before.  On return, it's guaranteed that no request</div><div class='add'>+ * is being throttled or has ELVPRIV set and blk_queue_bypass() %true</div><div class='add'>+ * inside queue or RCU read lock.</div><div class='add'>+ */</div><div class='add'>+void blk_queue_bypass_start(struct request_queue *q)</div><div class='add'>+{</div><div class='add'>+	bool drain;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(q-&gt;queue_lock);</div><div class='add'>+	drain = !q-&gt;bypass_depth++;</div><div class='add'>+	queue_flag_set(QUEUE_FLAG_BYPASS, q);</div><div class='add'>+	spin_unlock_irq(q-&gt;queue_lock);</div><div class='add'>+</div><div class='add'>+	if (drain) {</div><div class='add'>+		blk_drain_queue(q, false);</div><div class='add'>+		/* ensure blk_queue_bypass() is %true inside RCU read lock */</div><div class='add'>+		synchronize_rcu();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(blk_queue_bypass_start);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * blk_queue_bypass_end - leave queue bypass mode</div><div class='add'>+ * @q: queue of interest</div><div class='add'>+ *</div><div class='add'>+ * Leave bypass mode and restore the normal queueing behavior.</div><div class='add'>+ */</div><div class='add'>+void blk_queue_bypass_end(struct request_queue *q)</div><div class='add'>+{</div><div class='add'>+	spin_lock_irq(q-&gt;queue_lock);</div><div class='add'>+	if (!--q-&gt;bypass_depth)</div><div class='add'>+		queue_flag_clear(QUEUE_FLAG_BYPASS, q);</div><div class='add'>+	WARN_ON_ONCE(q-&gt;bypass_depth &lt; 0);</div><div class='add'>+	spin_unlock_irq(q-&gt;queue_lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(blk_queue_bypass_end);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * blk_cleanup_queue - shutdown a request queue</div><div class='ctx'>  * @q: request queue to shutdown</div><div class='ctx'>  *</div><div class='hunk'>@@ -418,6 +469,19 @@ void blk_cleanup_queue(struct request_queue *q)</div><div class='ctx'> 	queue_flag_set_unlocked(QUEUE_FLAG_DEAD, q);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Dead queue is permanently in bypass mode till released.  Note</div><div class='add'>+	 * that, unlike blk_queue_bypass_start(), we aren't performing</div><div class='add'>+	 * synchronize_rcu() after entering bypass mode to avoid the delay</div><div class='add'>+	 * as some drivers create and destroy a lot of queues while</div><div class='add'>+	 * probing.  This is still safe because blk_release_queue() will be</div><div class='add'>+	 * called only after the queue refcnt drops to zero and nothing,</div><div class='add'>+	 * RCU or not, would be traversing the queue by then.</div><div class='add'>+	 */</div><div class='add'>+	q-&gt;bypass_depth++;</div><div class='add'>+	queue_flag_set(QUEUE_FLAG_BYPASS, q);</div><div class='add'>+</div><div class='ctx'> 	queue_flag_set(QUEUE_FLAG_NOMERGES, q);</div><div class='ctx'> 	queue_flag_set(QUEUE_FLAG_NOXMERGES, q);</div><div class='ctx'> 	queue_flag_set(QUEUE_FLAG_DEAD, q);</div><div class='hunk'>@@ -428,13 +492,8 @@ void blk_cleanup_queue(struct request_queue *q)</div><div class='ctx'> 	spin_unlock_irq(lock);</div><div class='ctx'> 	mutex_unlock(&amp;q-&gt;sysfs_lock);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Drain all requests queued before DEAD marking.  The caller might</div><div class='del'>-	 * be trying to tear down @q before its elevator is initialized, in</div><div class='del'>-	 * which case we don't want to call into draining.</div><div class='del'>-	 */</div><div class='del'>-	if (q-&gt;elevator)</div><div class='del'>-		blk_drain_queue(q, true);</div><div class='add'>+	/* drain all requests queued before DEAD marking */</div><div class='add'>+	blk_drain_queue(q, true);</div><div class='ctx'> </div><div class='ctx'> 	/* @q won't process any more request, flush async actions */</div><div class='ctx'> 	del_timer_sync(&amp;q-&gt;backing_dev_info.laptop_mode_wb_timer);</div><div class='hunk'>@@ -498,14 +557,15 @@ struct request_queue *blk_alloc_queue_node(gfp_t gfp_mask, int node_id)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto fail_id;</div><div class='ctx'> </div><div class='del'>-	if (blk_throtl_init(q))</div><div class='del'>-		goto fail_id;</div><div class='del'>-</div><div class='ctx'> 	setup_timer(&amp;q-&gt;backing_dev_info.laptop_mode_wb_timer,</div><div class='ctx'> 		    laptop_mode_timer_fn, (unsigned long) q);</div><div class='ctx'> 	setup_timer(&amp;q-&gt;timeout, blk_rq_timed_out_timer, (unsigned long) q);</div><div class='add'>+	INIT_LIST_HEAD(&amp;q-&gt;queue_head);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;q-&gt;timeout_list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;q-&gt;icq_list);</div><div class='add'>+#ifdef CONFIG_BLK_CGROUP</div><div class='add'>+	INIT_LIST_HEAD(&amp;q-&gt;blkg_list);</div><div class='add'>+#endif</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;q-&gt;flush_queue[0]);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;q-&gt;flush_queue[1]);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;q-&gt;flush_data_in_flight);</div><div class='hunk'>@@ -522,6 +582,18 @@ struct request_queue *blk_alloc_queue_node(gfp_t gfp_mask, int node_id)</div><div class='ctx'> 	 */</div><div class='ctx'> 	q-&gt;queue_lock = &amp;q-&gt;__queue_lock;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * A queue starts its life with bypass turned on to avoid</div><div class='add'>+	 * unnecessary bypass on/off overhead and nasty surprises during</div><div class='add'>+	 * init.  The initial bypass will be finished at the end of</div><div class='add'>+	 * blk_init_allocated_queue().</div><div class='add'>+	 */</div><div class='add'>+	q-&gt;bypass_depth = 1;</div><div class='add'>+	__set_bit(QUEUE_FLAG_BYPASS, &amp;q-&gt;queue_flags);</div><div class='add'>+</div><div class='add'>+	if (blkcg_init_queue(q))</div><div class='add'>+		goto fail_id;</div><div class='add'>+</div><div class='ctx'> 	return q;</div><div class='ctx'> </div><div class='ctx'> fail_id:</div><div class='hunk'>@@ -614,15 +686,15 @@ blk_init_allocated_queue(struct request_queue *q, request_fn_proc *rfn,</div><div class='ctx'> </div><div class='ctx'> 	q-&gt;sg_reserved_size = INT_MAX;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * all done</div><div class='del'>-	 */</div><div class='del'>-	if (!elevator_init(q, NULL)) {</div><div class='del'>-		blk_queue_congestion_threshold(q);</div><div class='del'>-		return q;</div><div class='del'>-	}</div><div class='add'>+	/* init elevator */</div><div class='add'>+	if (elevator_init(q, NULL))</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='del'>-	return NULL;</div><div class='add'>+	blk_queue_congestion_threshold(q);</div><div class='add'>+</div><div class='add'>+	/* all done, end the initial bypass */</div><div class='add'>+	blk_queue_bypass_end(q);</div><div class='add'>+	return q;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(blk_init_allocated_queue);</div><div class='ctx'> </div><div class='hunk'>@@ -648,33 +720,6 @@ static inline void blk_free_request(struct request_queue *q, struct request *rq)</div><div class='ctx'> 	mempool_free(rq, q-&gt;rq.rq_pool);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct request *</div><div class='del'>-blk_alloc_request(struct request_queue *q, struct io_cq *icq,</div><div class='del'>-		  unsigned int flags, gfp_t gfp_mask)</div><div class='del'>-{</div><div class='del'>-	struct request *rq = mempool_alloc(q-&gt;rq.rq_pool, gfp_mask);</div><div class='del'>-</div><div class='del'>-	if (!rq)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	blk_rq_init(q, rq);</div><div class='del'>-</div><div class='del'>-	rq-&gt;cmd_flags = flags | REQ_ALLOCED;</div><div class='del'>-</div><div class='del'>-	if (flags &amp; REQ_ELVPRIV) {</div><div class='del'>-		rq-&gt;elv.icq = icq;</div><div class='del'>-		if (unlikely(elv_set_request(q, rq, gfp_mask))) {</div><div class='del'>-			mempool_free(rq, q-&gt;rq.rq_pool);</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-		/* @rq-&gt;elv.icq holds on to io_context until @rq is freed */</div><div class='del'>-		if (icq)</div><div class='del'>-			get_io_context(icq-&gt;ioc);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return rq;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * ioc_batching returns true if the ioc is a valid batching request and</div><div class='ctx'>  * should be given priority access to a request.</div><div class='hunk'>@@ -763,6 +808,22 @@ static bool blk_rq_should_init_elevator(struct bio *bio)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * rq_ioc - determine io_context for request allocation</div><div class='add'>+ * @bio: request being allocated is for this bio (can be %NULL)</div><div class='add'>+ *</div><div class='add'>+ * Determine io_context to use for request allocation for @bio.  May return</div><div class='add'>+ * %NULL if %current-&gt;io_context doesn't exist.</div><div class='add'>+ */</div><div class='add'>+static struct io_context *rq_ioc(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_BLK_CGROUP</div><div class='add'>+	if (bio &amp;&amp; bio-&gt;bi_ioc)</div><div class='add'>+		return bio-&gt;bi_ioc;</div><div class='add'>+#endif</div><div class='add'>+	return current-&gt;io_context;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * get_request - get a free request</div><div class='ctx'>  * @q: request_queue to allocate request from</div><div class='ctx'>  * @rw_flags: RW and SYNC flags</div><div class='hunk'>@@ -779,7 +840,7 @@ static bool blk_rq_should_init_elevator(struct bio *bio)</div><div class='ctx'> static struct request *get_request(struct request_queue *q, int rw_flags,</div><div class='ctx'> 				   struct bio *bio, gfp_t gfp_mask)</div><div class='ctx'> {</div><div class='del'>-	struct request *rq = NULL;</div><div class='add'>+	struct request *rq;</div><div class='ctx'> 	struct request_list *rl = &amp;q-&gt;rq;</div><div class='ctx'> 	struct elevator_type *et;</div><div class='ctx'> 	struct io_context *ioc;</div><div class='hunk'>@@ -789,7 +850,7 @@ static struct request *get_request(struct request_queue *q, int rw_flags,</div><div class='ctx'> 	int may_queue;</div><div class='ctx'> retry:</div><div class='ctx'> 	et = q-&gt;elevator-&gt;type;</div><div class='del'>-	ioc = current-&gt;io_context;</div><div class='add'>+	ioc = rq_ioc(bio);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(blk_queue_dead(q)))</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -808,7 +869,7 @@ retry:</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (!ioc &amp;&amp; !retried) {</div><div class='ctx'> 				spin_unlock_irq(q-&gt;queue_lock);</div><div class='del'>-				create_io_context(current, gfp_mask, q-&gt;node);</div><div class='add'>+				create_io_context(gfp_mask, q-&gt;node);</div><div class='ctx'> 				spin_lock_irq(q-&gt;queue_lock);</div><div class='ctx'> 				retried = true;</div><div class='ctx'> 				goto retry;</div><div class='hunk'>@@ -831,7 +892,7 @@ retry:</div><div class='ctx'> 					 * process is not a "batcher", and not</div><div class='ctx'> 					 * exempted by the IO scheduler</div><div class='ctx'> 					 */</div><div class='del'>-					goto out;</div><div class='add'>+					return NULL;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -844,7 +905,7 @@ retry:</div><div class='ctx'> 	 * allocated with any setting of -&gt;nr_requests</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (rl-&gt;count[is_sync] &gt;= (3 * q-&gt;nr_requests / 2))</div><div class='del'>-		goto out;</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	rl-&gt;count[is_sync]++;</div><div class='ctx'> 	rl-&gt;starved[is_sync] = 0;</div><div class='hunk'>@@ -859,8 +920,7 @@ retry:</div><div class='ctx'> 	 * Also, lookup icq while holding queue_lock.  If it doesn't exist,</div><div class='ctx'> 	 * it will be created after releasing queue_lock.</div><div class='ctx'> 	 */</div><div class='del'>-	if (blk_rq_should_init_elevator(bio) &amp;&amp;</div><div class='del'>-	    !test_bit(QUEUE_FLAG_ELVSWITCH, &amp;q-&gt;queue_flags)) {</div><div class='add'>+	if (blk_rq_should_init_elevator(bio) &amp;&amp; !blk_queue_bypass(q)) {</div><div class='ctx'> 		rw_flags |= REQ_ELVPRIV;</div><div class='ctx'> 		rl-&gt;elvpriv++;</div><div class='ctx'> 		if (et-&gt;icq_cache &amp;&amp; ioc)</div><div class='hunk'>@@ -871,41 +931,36 @@ retry:</div><div class='ctx'> 		rw_flags |= REQ_IO_STAT;</div><div class='ctx'> 	spin_unlock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-	/* create icq if missing */</div><div class='del'>-	if ((rw_flags &amp; REQ_ELVPRIV) &amp;&amp; unlikely(et-&gt;icq_cache &amp;&amp; !icq)) {</div><div class='del'>-		icq = ioc_create_icq(q, gfp_mask);</div><div class='del'>-		if (!icq)</div><div class='del'>-			goto fail_icq;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rq = blk_alloc_request(q, icq, rw_flags, gfp_mask);</div><div class='add'>+	/* allocate and init request */</div><div class='add'>+	rq = mempool_alloc(q-&gt;rq.rq_pool, gfp_mask);</div><div class='add'>+	if (!rq)</div><div class='add'>+		goto fail_alloc;</div><div class='ctx'> </div><div class='del'>-fail_icq:</div><div class='del'>-	if (unlikely(!rq)) {</div><div class='del'>-		/*</div><div class='del'>-		 * Allocation failed presumably due to memory. Undo anything</div><div class='del'>-		 * we might have messed up.</div><div class='del'>-		 *</div><div class='del'>-		 * Allocating task should really be put onto the front of the</div><div class='del'>-		 * wait queue, but this is pretty rare.</div><div class='del'>-		 */</div><div class='del'>-		spin_lock_irq(q-&gt;queue_lock);</div><div class='del'>-		freed_request(q, rw_flags);</div><div class='add'>+	blk_rq_init(q, rq);</div><div class='add'>+	rq-&gt;cmd_flags = rw_flags | REQ_ALLOCED;</div><div class='add'>+</div><div class='add'>+	/* init elvpriv */</div><div class='add'>+	if (rw_flags &amp; REQ_ELVPRIV) {</div><div class='add'>+		if (unlikely(et-&gt;icq_cache &amp;&amp; !icq)) {</div><div class='add'>+			create_io_context(gfp_mask, q-&gt;node);</div><div class='add'>+			ioc = rq_ioc(bio);</div><div class='add'>+			if (!ioc)</div><div class='add'>+				goto fail_elvpriv;</div><div class='add'>+</div><div class='add'>+			icq = ioc_create_icq(ioc, q, gfp_mask);</div><div class='add'>+			if (!icq)</div><div class='add'>+				goto fail_elvpriv;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * in the very unlikely event that allocation failed and no</div><div class='del'>-		 * requests for this direction was pending, mark us starved</div><div class='del'>-		 * so that freeing of a request in the other direction will</div><div class='del'>-		 * notice us. another possible fix would be to split the</div><div class='del'>-		 * rq mempool into READ and WRITE</div><div class='del'>-		 */</div><div class='del'>-rq_starved:</div><div class='del'>-		if (unlikely(rl-&gt;count[is_sync] == 0))</div><div class='del'>-			rl-&gt;starved[is_sync] = 1;</div><div class='add'>+		rq-&gt;elv.icq = icq;</div><div class='add'>+		if (unlikely(elv_set_request(q, rq, bio, gfp_mask)))</div><div class='add'>+			goto fail_elvpriv;</div><div class='ctx'> </div><div class='del'>-		goto out;</div><div class='add'>+		/* @rq-&gt;elv.icq holds io_context until @rq is freed */</div><div class='add'>+		if (icq)</div><div class='add'>+			get_io_context(icq-&gt;ioc);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+out:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * ioc may be NULL here, and ioc_batching will be false. That's</div><div class='ctx'> 	 * OK, if the queue is under the request limit then requests need</div><div class='hunk'>@@ -916,8 +971,48 @@ rq_starved:</div><div class='ctx'> 		ioc-&gt;nr_batch_requests--;</div><div class='ctx'> </div><div class='ctx'> 	trace_block_getrq(q, bio, rw_flags &amp; 1);</div><div class='del'>-out:</div><div class='ctx'> 	return rq;</div><div class='add'>+</div><div class='add'>+fail_elvpriv:</div><div class='add'>+	/*</div><div class='add'>+	 * elvpriv init failed.  ioc, icq and elvpriv aren't mempool backed</div><div class='add'>+	 * and may fail indefinitely under memory pressure and thus</div><div class='add'>+	 * shouldn't stall IO.  Treat this request as !elvpriv.  This will</div><div class='add'>+	 * disturb iosched and blkcg but weird is bettern than dead.</div><div class='add'>+	 */</div><div class='add'>+	printk_ratelimited(KERN_WARNING "%s: request aux data allocation failed, iosched may be disturbed\n",</div><div class='add'>+			   dev_name(q-&gt;backing_dev_info.dev));</div><div class='add'>+</div><div class='add'>+	rq-&gt;cmd_flags &amp;= ~REQ_ELVPRIV;</div><div class='add'>+	rq-&gt;elv.icq = NULL;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(q-&gt;queue_lock);</div><div class='add'>+	rl-&gt;elvpriv--;</div><div class='add'>+	spin_unlock_irq(q-&gt;queue_lock);</div><div class='add'>+	goto out;</div><div class='add'>+</div><div class='add'>+fail_alloc:</div><div class='add'>+	/*</div><div class='add'>+	 * Allocation failed presumably due to memory. Undo anything we</div><div class='add'>+	 * might have messed up.</div><div class='add'>+	 *</div><div class='add'>+	 * Allocating task should really be put onto the front of the wait</div><div class='add'>+	 * queue, but this is pretty rare.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irq(q-&gt;queue_lock);</div><div class='add'>+	freed_request(q, rw_flags);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * in the very unlikely event that allocation failed and no</div><div class='add'>+	 * requests for this direction was pending, mark us starved so that</div><div class='add'>+	 * freeing of a request in the other direction will notice</div><div class='add'>+	 * us. another possible fix would be to split the rq mempool into</div><div class='add'>+	 * READ and WRITE</div><div class='add'>+	 */</div><div class='add'>+rq_starved:</div><div class='add'>+	if (unlikely(rl-&gt;count[is_sync] == 0))</div><div class='add'>+		rl-&gt;starved[is_sync] = 1;</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -961,7 +1056,7 @@ static struct request *get_request_wait(struct request_queue *q, int rw_flags,</div><div class='ctx'> 		 * up to a big batch of them for a small period time.</div><div class='ctx'> 		 * See ioc_batching, ioc_set_batching</div><div class='ctx'> 		 */</div><div class='del'>-		create_io_context(current, GFP_NOIO, q-&gt;node);</div><div class='add'>+		create_io_context(GFP_NOIO, q-&gt;node);</div><div class='ctx'> 		ioc_set_batching(q, current-&gt;io_context);</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_irq(q-&gt;queue_lock);</div><div class='head'>diff --git a/block/blk-ioc.c b/block/blk-ioc.c<br/>index fb95dd2f889a..893b8007c657 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-ioc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/blk-ioc.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-ioc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk-ioc.c</a></div><div class='hunk'>@@ -155,20 +155,20 @@ void put_io_context(struct io_context *ioc)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(put_io_context);</div><div class='ctx'> </div><div class='del'>-/* Called by the exiting task */</div><div class='del'>-void exit_io_context(struct task_struct *task)</div><div class='add'>+/**</div><div class='add'>+ * put_io_context_active - put active reference on ioc</div><div class='add'>+ * @ioc: ioc of interest</div><div class='add'>+ *</div><div class='add'>+ * Undo get_io_context_active().  If active reference reaches zero after</div><div class='add'>+ * put, @ioc can never issue further IOs and ioscheds are notified.</div><div class='add'>+ */</div><div class='add'>+void put_io_context_active(struct io_context *ioc)</div><div class='ctx'> {</div><div class='del'>-	struct io_context *ioc;</div><div class='del'>-	struct io_cq *icq;</div><div class='ctx'> 	struct hlist_node *n;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	struct io_cq *icq;</div><div class='ctx'> </div><div class='del'>-	task_lock(task);</div><div class='del'>-	ioc = task-&gt;io_context;</div><div class='del'>-	task-&gt;io_context = NULL;</div><div class='del'>-	task_unlock(task);</div><div class='del'>-</div><div class='del'>-	if (!atomic_dec_and_test(&amp;ioc-&gt;nr_tasks)) {</div><div class='add'>+	if (!atomic_dec_and_test(&amp;ioc-&gt;active_ref)) {</div><div class='ctx'> 		put_io_context(ioc);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -197,6 +197,20 @@ retry:</div><div class='ctx'> 	put_io_context(ioc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Called by the exiting task */</div><div class='add'>+void exit_io_context(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	struct io_context *ioc;</div><div class='add'>+</div><div class='add'>+	task_lock(task);</div><div class='add'>+	ioc = task-&gt;io_context;</div><div class='add'>+	task-&gt;io_context = NULL;</div><div class='add'>+	task_unlock(task);</div><div class='add'>+</div><div class='add'>+	atomic_dec(&amp;ioc-&gt;nr_tasks);</div><div class='add'>+	put_io_context_active(ioc);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ioc_clear_queue - break any ioc association with the specified queue</div><div class='ctx'>  * @q: request_queue being cleared</div><div class='hunk'>@@ -218,19 +232,19 @@ void ioc_clear_queue(struct request_queue *q)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void create_io_context_slowpath(struct task_struct *task, gfp_t gfp_flags,</div><div class='del'>-				int node)</div><div class='add'>+int create_task_io_context(struct task_struct *task, gfp_t gfp_flags, int node)</div><div class='ctx'> {</div><div class='ctx'> 	struct io_context *ioc;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ioc = kmem_cache_alloc_node(iocontext_cachep, gfp_flags | __GFP_ZERO,</div><div class='ctx'> 				    node);</div><div class='ctx'> 	if (unlikely(!ioc))</div><div class='del'>-		return;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/* initialize */</div><div class='ctx'> 	atomic_long_set(&amp;ioc-&gt;refcount, 1);</div><div class='del'>-	atomic_set(&amp;ioc-&gt;nr_tasks, 1);</div><div class='add'>+	atomic_set(&amp;ioc-&gt;active_ref, 1);</div><div class='ctx'> 	spin_lock_init(&amp;ioc-&gt;lock);</div><div class='ctx'> 	INIT_RADIX_TREE(&amp;ioc-&gt;icq_tree, GFP_ATOMIC | __GFP_HIGH);</div><div class='ctx'> 	INIT_HLIST_HEAD(&amp;ioc-&gt;icq_list);</div><div class='hunk'>@@ -249,7 +263,12 @@ void create_io_context_slowpath(struct task_struct *task, gfp_t gfp_flags,</div><div class='ctx'> 		task-&gt;io_context = ioc;</div><div class='ctx'> 	else</div><div class='ctx'> 		kmem_cache_free(iocontext_cachep, ioc);</div><div class='add'>+</div><div class='add'>+	ret = task-&gt;io_context ? 0 : -EBUSY;</div><div class='add'>+</div><div class='ctx'> 	task_unlock(task);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -281,7 +300,7 @@ struct io_context *get_task_io_context(struct task_struct *task,</div><div class='ctx'> 			return ioc;</div><div class='ctx'> 		}</div><div class='ctx'> 		task_unlock(task);</div><div class='del'>-	} while (create_io_context(task, gfp_flags, node));</div><div class='add'>+	} while (!create_task_io_context(task, gfp_flags, node));</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -325,26 +344,23 @@ EXPORT_SYMBOL(ioc_lookup_icq);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ioc_create_icq - create and link io_cq</div><div class='add'>+ * @ioc: io_context of interest</div><div class='ctx'>  * @q: request_queue of interest</div><div class='ctx'>  * @gfp_mask: allocation mask</div><div class='ctx'>  *</div><div class='del'>- * Make sure io_cq linking %current-&gt;io_context and @q exists.  If either</div><div class='del'>- * io_context and/or icq don't exist, they will be created using @gfp_mask.</div><div class='add'>+ * Make sure io_cq linking @ioc and @q exists.  If icq doesn't exist, they</div><div class='add'>+ * will be created using @gfp_mask.</div><div class='ctx'>  *</div><div class='ctx'>  * The caller is responsible for ensuring @ioc won't go away and @q is</div><div class='ctx'>  * alive and will stay alive until this function returns.</div><div class='ctx'>  */</div><div class='del'>-struct io_cq *ioc_create_icq(struct request_queue *q, gfp_t gfp_mask)</div><div class='add'>+struct io_cq *ioc_create_icq(struct io_context *ioc, struct request_queue *q,</div><div class='add'>+			     gfp_t gfp_mask)</div><div class='ctx'> {</div><div class='ctx'> 	struct elevator_type *et = q-&gt;elevator-&gt;type;</div><div class='del'>-	struct io_context *ioc;</div><div class='ctx'> 	struct io_cq *icq;</div><div class='ctx'> </div><div class='ctx'> 	/* allocate stuff */</div><div class='del'>-	ioc = create_io_context(current, gfp_mask, q-&gt;node);</div><div class='del'>-	if (!ioc)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='ctx'> 	icq = kmem_cache_alloc_node(et-&gt;icq_cache, gfp_mask | __GFP_ZERO,</div><div class='ctx'> 				    q-&gt;node);</div><div class='ctx'> 	if (!icq)</div><div class='hunk'>@@ -382,74 +398,6 @@ struct io_cq *ioc_create_icq(struct request_queue *q, gfp_t gfp_mask)</div><div class='ctx'> 	return icq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ioc_set_icq_flags(struct io_context *ioc, unsigned int flags)</div><div class='del'>-{</div><div class='del'>-	struct io_cq *icq;</div><div class='del'>-	struct hlist_node *n;</div><div class='del'>-</div><div class='del'>-	hlist_for_each_entry(icq, n, &amp;ioc-&gt;icq_list, ioc_node)</div><div class='del'>-		icq-&gt;flags |= flags;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ioc_ioprio_changed - notify ioprio change</div><div class='del'>- * @ioc: io_context of interest</div><div class='del'>- * @ioprio: new ioprio</div><div class='del'>- *</div><div class='del'>- * @ioc's ioprio has changed to @ioprio.  Set %ICQ_IOPRIO_CHANGED for all</div><div class='del'>- * icq's.  iosched is responsible for checking the bit and applying it on</div><div class='del'>- * request issue path.</div><div class='del'>- */</div><div class='del'>-void ioc_ioprio_changed(struct io_context *ioc, int ioprio)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;ioc-&gt;lock, flags);</div><div class='del'>-	ioc-&gt;ioprio = ioprio;</div><div class='del'>-	ioc_set_icq_flags(ioc, ICQ_IOPRIO_CHANGED);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ioc-&gt;lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ioc_cgroup_changed - notify cgroup change</div><div class='del'>- * @ioc: io_context of interest</div><div class='del'>- *</div><div class='del'>- * @ioc's cgroup has changed.  Set %ICQ_CGROUP_CHANGED for all icq's.</div><div class='del'>- * iosched is responsible for checking the bit and applying it on request</div><div class='del'>- * issue path.</div><div class='del'>- */</div><div class='del'>-void ioc_cgroup_changed(struct io_context *ioc)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;ioc-&gt;lock, flags);</div><div class='del'>-	ioc_set_icq_flags(ioc, ICQ_CGROUP_CHANGED);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ioc-&gt;lock, flags);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(ioc_cgroup_changed);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * icq_get_changed - fetch and clear icq changed mask</div><div class='del'>- * @icq: icq of interest</div><div class='del'>- *</div><div class='del'>- * Fetch and clear ICQ_*_CHANGED bits from @icq.  Grabs and releases</div><div class='del'>- * @icq-&gt;ioc-&gt;lock.</div><div class='del'>- */</div><div class='del'>-unsigned icq_get_changed(struct io_cq *icq)</div><div class='del'>-{</div><div class='del'>-	unsigned int changed = 0;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (unlikely(icq-&gt;flags &amp; ICQ_CHANGED_MASK)) {</div><div class='del'>-		spin_lock_irqsave(&amp;icq-&gt;ioc-&gt;lock, flags);</div><div class='del'>-		changed = icq-&gt;flags &amp; ICQ_CHANGED_MASK;</div><div class='del'>-		icq-&gt;flags &amp;= ~ICQ_CHANGED_MASK;</div><div class='del'>-		spin_unlock_irqrestore(&amp;icq-&gt;ioc-&gt;lock, flags);</div><div class='del'>-	}</div><div class='del'>-	return changed;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(icq_get_changed);</div><div class='del'>-</div><div class='ctx'> static int __init blk_ioc_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	iocontext_cachep = kmem_cache_create("blkdev_ioc",</div><div class='head'>diff --git a/block/blk-sysfs.c b/block/blk-sysfs.c<br/>index cf150011d808..aa41b47c22d2 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-sysfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/blk-sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk-sysfs.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/blktrace_api.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "blk.h"</div><div class='add'>+#include "blk-cgroup.h"</div><div class='ctx'> </div><div class='ctx'> struct queue_sysfs_entry {</div><div class='ctx'> 	struct attribute attr;</div><div class='hunk'>@@ -479,6 +480,8 @@ static void blk_release_queue(struct kobject *kobj)</div><div class='ctx'> </div><div class='ctx'> 	blk_sync_queue(q);</div><div class='ctx'> </div><div class='add'>+	blkcg_exit_queue(q);</div><div class='add'>+</div><div class='ctx'> 	if (q-&gt;elevator) {</div><div class='ctx'> 		spin_lock_irq(q-&gt;queue_lock);</div><div class='ctx'> 		ioc_clear_queue(q);</div><div class='hunk'>@@ -486,15 +489,12 @@ static void blk_release_queue(struct kobject *kobj)</div><div class='ctx'> 		elevator_exit(q-&gt;elevator);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	blk_throtl_exit(q);</div><div class='del'>-</div><div class='ctx'> 	if (rl-&gt;rq_pool)</div><div class='ctx'> 		mempool_destroy(rl-&gt;rq_pool);</div><div class='ctx'> </div><div class='ctx'> 	if (q-&gt;queue_tags)</div><div class='ctx'> 		__blk_queue_free_tags(q);</div><div class='ctx'> </div><div class='del'>-	blk_throtl_release(q);</div><div class='ctx'> 	blk_trace_shutdown(q);</div><div class='ctx'> </div><div class='ctx'> 	bdi_destroy(&amp;q-&gt;backing_dev_info);</div><div class='head'>diff --git a/block/blk-throttle.c b/block/blk-throttle.c<br/>index f2ddb94626bd..5b0659512047 100644<br/>--- a/<a href='/drm-misc/tree/block/blk-throttle.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/blk-throttle.c</a><br/>+++ b/<a href='/drm-misc/tree/block/blk-throttle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk-throttle.c</a></div><div class='hunk'>@@ -21,6 +21,8 @@ static int throtl_quantum = 32;</div><div class='ctx'> /* Throttling is performed over 100ms slice and after that slice is renewed */</div><div class='ctx'> static unsigned long throtl_slice = HZ/10;	/* 100 ms */</div><div class='ctx'> </div><div class='add'>+static struct blkcg_policy blkcg_policy_throtl;</div><div class='add'>+</div><div class='ctx'> /* A workqueue to queue throttle related work */</div><div class='ctx'> static struct workqueue_struct *kthrotld_workqueue;</div><div class='ctx'> static void throtl_schedule_delayed_work(struct throtl_data *td,</div><div class='hunk'>@@ -38,9 +40,17 @@ struct throtl_rb_root {</div><div class='ctx'> </div><div class='ctx'> #define rb_entry_tg(node)	rb_entry((node), struct throtl_grp, rb_node)</div><div class='ctx'> </div><div class='add'>+/* Per-cpu group stats */</div><div class='add'>+struct tg_stats_cpu {</div><div class='add'>+	/* total bytes transferred */</div><div class='add'>+	struct blkg_rwstat		service_bytes;</div><div class='add'>+	/* total IOs serviced, post merge */</div><div class='add'>+	struct blkg_rwstat		serviced;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct throtl_grp {</div><div class='del'>-	/* List of throtl groups on the request queue*/</div><div class='del'>-	struct hlist_node tg_node;</div><div class='add'>+	/* must be the first member */</div><div class='add'>+	struct blkg_policy_data pd;</div><div class='ctx'> </div><div class='ctx'> 	/* active throtl group service_tree member */</div><div class='ctx'> 	struct rb_node rb_node;</div><div class='hunk'>@@ -52,8 +62,6 @@ struct throtl_grp {</div><div class='ctx'> 	 */</div><div class='ctx'> 	unsigned long disptime;</div><div class='ctx'> </div><div class='del'>-	struct blkio_group blkg;</div><div class='del'>-	atomic_t ref;</div><div class='ctx'> 	unsigned int flags;</div><div class='ctx'> </div><div class='ctx'> 	/* Two lists for READ and WRITE */</div><div class='hunk'>@@ -80,18 +88,18 @@ struct throtl_grp {</div><div class='ctx'> 	/* Some throttle limits got updated for the group */</div><div class='ctx'> 	int limits_changed;</div><div class='ctx'> </div><div class='del'>-	struct rcu_head rcu_head;</div><div class='add'>+	/* Per cpu stats pointer */</div><div class='add'>+	struct tg_stats_cpu __percpu *stats_cpu;</div><div class='add'>+</div><div class='add'>+	/* List of tgs waiting for per cpu stats memory to be allocated */</div><div class='add'>+	struct list_head stats_alloc_node;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct throtl_data</div><div class='ctx'> {</div><div class='del'>-	/* List of throtl groups */</div><div class='del'>-	struct hlist_head tg_list;</div><div class='del'>-</div><div class='ctx'> 	/* service tree for active throtl groups */</div><div class='ctx'> 	struct throtl_rb_root tg_service_tree;</div><div class='ctx'> </div><div class='del'>-	struct throtl_grp *root_tg;</div><div class='ctx'> 	struct request_queue *queue;</div><div class='ctx'> </div><div class='ctx'> 	/* Total Number of queued bios on READ and WRITE lists */</div><div class='hunk'>@@ -108,6 +116,33 @@ struct throtl_data</div><div class='ctx'> 	int limits_changed;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* list and work item to allocate percpu group stats */</div><div class='add'>+static DEFINE_SPINLOCK(tg_stats_alloc_lock);</div><div class='add'>+static LIST_HEAD(tg_stats_alloc_list);</div><div class='add'>+</div><div class='add'>+static void tg_stats_alloc_fn(struct work_struct *);</div><div class='add'>+static DECLARE_DELAYED_WORK(tg_stats_alloc_work, tg_stats_alloc_fn);</div><div class='add'>+</div><div class='add'>+static inline struct throtl_grp *pd_to_tg(struct blkg_policy_data *pd)</div><div class='add'>+{</div><div class='add'>+	return pd ? container_of(pd, struct throtl_grp, pd) : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct throtl_grp *blkg_to_tg(struct blkcg_gq *blkg)</div><div class='add'>+{</div><div class='add'>+	return pd_to_tg(blkg_to_pd(blkg, &amp;blkcg_policy_throtl));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct blkcg_gq *tg_to_blkg(struct throtl_grp *tg)</div><div class='add'>+{</div><div class='add'>+	return pd_to_blkg(&amp;tg-&gt;pd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct throtl_grp *td_root_tg(struct throtl_data *td)</div><div class='add'>+{</div><div class='add'>+	return blkg_to_tg(td-&gt;queue-&gt;root_blkg);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> enum tg_state_flags {</div><div class='ctx'> 	THROTL_TG_FLAG_on_rr = 0,	/* on round-robin busy list */</div><div class='ctx'> };</div><div class='hunk'>@@ -128,244 +163,150 @@ static inline int throtl_tg_##name(const struct throtl_grp *tg)		\</div><div class='ctx'> </div><div class='ctx'> THROTL_TG_FNS(on_rr);</div><div class='ctx'> </div><div class='del'>-#define throtl_log_tg(td, tg, fmt, args...)				\</div><div class='del'>-	blk_add_trace_msg((td)-&gt;queue, "throtl %s " fmt,		\</div><div class='del'>-				blkg_path(&amp;(tg)-&gt;blkg), ##args);      	\</div><div class='add'>+#define throtl_log_tg(td, tg, fmt, args...)	do {			\</div><div class='add'>+	char __pbuf[128];						\</div><div class='add'>+									\</div><div class='add'>+	blkg_path(tg_to_blkg(tg), __pbuf, sizeof(__pbuf));		\</div><div class='add'>+	blk_add_trace_msg((td)-&gt;queue, "throtl %s " fmt, __pbuf, ##args); \</div><div class='add'>+} while (0)</div><div class='ctx'> </div><div class='ctx'> #define throtl_log(td, fmt, args...)	\</div><div class='ctx'> 	blk_add_trace_msg((td)-&gt;queue, "throtl " fmt, ##args)</div><div class='ctx'> </div><div class='del'>-static inline struct throtl_grp *tg_of_blkg(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	if (blkg)</div><div class='del'>-		return container_of(blkg, struct throtl_grp, blkg);</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline unsigned int total_nr_queued(struct throtl_data *td)</div><div class='ctx'> {</div><div class='ctx'> 	return td-&gt;nr_queued[0] + td-&gt;nr_queued[1];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct throtl_grp *throtl_ref_get_tg(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	atomic_inc(&amp;tg-&gt;ref);</div><div class='del'>-	return tg;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void throtl_free_tg(struct rcu_head *head)</div><div class='add'>+/*</div><div class='add'>+ * Worker for allocating per cpu stat for tgs. This is scheduled on the</div><div class='add'>+ * system_nrt_wq once there are some groups on the alloc_list waiting for</div><div class='add'>+ * allocation.</div><div class='add'>+ */</div><div class='add'>+static void tg_stats_alloc_fn(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct throtl_grp *tg;</div><div class='add'>+	static struct tg_stats_cpu *stats_cpu;	/* this fn is non-reentrant */</div><div class='add'>+	struct delayed_work *dwork = to_delayed_work(work);</div><div class='add'>+	bool empty = false;</div><div class='add'>+</div><div class='add'>+alloc_stats:</div><div class='add'>+	if (!stats_cpu) {</div><div class='add'>+		stats_cpu = alloc_percpu(struct tg_stats_cpu);</div><div class='add'>+		if (!stats_cpu) {</div><div class='add'>+			/* allocation failed, try again after some time */</div><div class='add'>+			queue_delayed_work(system_nrt_wq, dwork,</div><div class='add'>+					   msecs_to_jiffies(10));</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	tg = container_of(head, struct throtl_grp, rcu_head);</div><div class='del'>-	free_percpu(tg-&gt;blkg.stats_cpu);</div><div class='del'>-	kfree(tg);</div><div class='del'>-}</div><div class='add'>+	spin_lock_irq(&amp;tg_stats_alloc_lock);</div><div class='ctx'> </div><div class='del'>-static void throtl_put_tg(struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	BUG_ON(atomic_read(&amp;tg-&gt;ref) &lt;= 0);</div><div class='del'>-	if (!atomic_dec_and_test(&amp;tg-&gt;ref))</div><div class='del'>-		return;</div><div class='add'>+	if (!list_empty(&amp;tg_stats_alloc_list)) {</div><div class='add'>+		struct throtl_grp *tg = list_first_entry(&amp;tg_stats_alloc_list,</div><div class='add'>+							 struct throtl_grp,</div><div class='add'>+							 stats_alloc_node);</div><div class='add'>+		swap(tg-&gt;stats_cpu, stats_cpu);</div><div class='add'>+		list_del_init(&amp;tg-&gt;stats_alloc_node);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * A group is freed in rcu manner. But having an rcu lock does not</div><div class='del'>-	 * mean that one can access all the fields of blkg and assume these</div><div class='del'>-	 * are valid. For example, don't try to follow throtl_data and</div><div class='del'>-	 * request queue links.</div><div class='del'>-	 *</div><div class='del'>-	 * Having a reference to blkg under an rcu allows acess to only</div><div class='del'>-	 * values local to groups like group stats and group rate limits</div><div class='del'>-	 */</div><div class='del'>-	call_rcu(&amp;tg-&gt;rcu_head, throtl_free_tg);</div><div class='add'>+	empty = list_empty(&amp;tg_stats_alloc_list);</div><div class='add'>+	spin_unlock_irq(&amp;tg_stats_alloc_lock);</div><div class='add'>+	if (!empty)</div><div class='add'>+		goto alloc_stats;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void throtl_init_group(struct throtl_grp *tg)</div><div class='add'>+static void throtl_pd_init(struct blkcg_gq *blkg)</div><div class='ctx'> {</div><div class='del'>-	INIT_HLIST_NODE(&amp;tg-&gt;tg_node);</div><div class='add'>+	struct throtl_grp *tg = blkg_to_tg(blkg);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='ctx'> 	RB_CLEAR_NODE(&amp;tg-&gt;rb_node);</div><div class='ctx'> 	bio_list_init(&amp;tg-&gt;bio_lists[0]);</div><div class='ctx'> 	bio_list_init(&amp;tg-&gt;bio_lists[1]);</div><div class='ctx'> 	tg-&gt;limits_changed = false;</div><div class='ctx'> </div><div class='del'>-	/* Practically unlimited BW */</div><div class='del'>-	tg-&gt;bps[0] = tg-&gt;bps[1] = -1;</div><div class='del'>-	tg-&gt;iops[0] = tg-&gt;iops[1] = -1;</div><div class='add'>+	tg-&gt;bps[READ] = -1;</div><div class='add'>+	tg-&gt;bps[WRITE] = -1;</div><div class='add'>+	tg-&gt;iops[READ] = -1;</div><div class='add'>+	tg-&gt;iops[WRITE] = -1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Take the initial reference that will be released on destroy</div><div class='del'>-	 * This can be thought of a joint reference by cgroup and</div><div class='del'>-	 * request queue which will be dropped by either request queue</div><div class='del'>-	 * exit or cgroup deletion path depending on who is exiting first.</div><div class='add'>+	 * Ugh... We need to perform per-cpu allocation for tg-&gt;stats_cpu</div><div class='add'>+	 * but percpu allocator can't be called from IO path.  Queue tg on</div><div class='add'>+	 * tg_stats_alloc_list and allocate from work item.</div><div class='ctx'> 	 */</div><div class='del'>-	atomic_set(&amp;tg-&gt;ref, 1);</div><div class='add'>+	spin_lock_irqsave(&amp;tg_stats_alloc_lock, flags);</div><div class='add'>+	list_add(&amp;tg-&gt;stats_alloc_node, &amp;tg_stats_alloc_list);</div><div class='add'>+	queue_delayed_work(system_nrt_wq, &amp;tg_stats_alloc_work, 0);</div><div class='add'>+	spin_unlock_irqrestore(&amp;tg_stats_alloc_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Should be called with rcu read lock held (needed for blkcg) */</div><div class='del'>-static void</div><div class='del'>-throtl_add_group_to_td_list(struct throtl_data *td, struct throtl_grp *tg)</div><div class='add'>+static void throtl_pd_exit(struct blkcg_gq *blkg)</div><div class='ctx'> {</div><div class='del'>-	hlist_add_head(&amp;tg-&gt;tg_node, &amp;td-&gt;tg_list);</div><div class='del'>-	td-&gt;nr_undestroyed_grps++;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-__throtl_tg_fill_dev_details(struct throtl_data *td, struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	struct backing_dev_info *bdi = &amp;td-&gt;queue-&gt;backing_dev_info;</div><div class='del'>-	unsigned int major, minor;</div><div class='del'>-</div><div class='del'>-	if (!tg || tg-&gt;blkg.dev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Fill in device details for a group which might not have been</div><div class='del'>-	 * filled at group creation time as queue was being instantiated</div><div class='del'>-	 * and driver had not attached a device yet</div><div class='del'>-	 */</div><div class='del'>-	if (bdi-&gt;dev &amp;&amp; dev_name(bdi-&gt;dev)) {</div><div class='del'>-		sscanf(dev_name(bdi-&gt;dev), "%u:%u", &amp;major, &amp;minor);</div><div class='del'>-		tg-&gt;blkg.dev = MKDEV(major, minor);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Should be called with without queue lock held. Here queue lock will be</div><div class='del'>- * taken rarely. It will be taken only once during life time of a group</div><div class='del'>- * if need be</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-throtl_tg_fill_dev_details(struct throtl_data *td, struct throtl_grp *tg)</div><div class='del'>-{</div><div class='del'>-	if (!tg || tg-&gt;blkg.dev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(td-&gt;queue-&gt;queue_lock);</div><div class='del'>-	__throtl_tg_fill_dev_details(td, tg);</div><div class='del'>-	spin_unlock_irq(td-&gt;queue-&gt;queue_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void throtl_init_add_tg_lists(struct throtl_data *td,</div><div class='del'>-			struct throtl_grp *tg, struct blkio_cgroup *blkcg)</div><div class='del'>-{</div><div class='del'>-	__throtl_tg_fill_dev_details(td, tg);</div><div class='del'>-</div><div class='del'>-	/* Add group onto cgroup list */</div><div class='del'>-	blkiocg_add_blkio_group(blkcg, &amp;tg-&gt;blkg, (void *)td,</div><div class='del'>-				tg-&gt;blkg.dev, BLKIO_POLICY_THROTL);</div><div class='add'>+	struct throtl_grp *tg = blkg_to_tg(blkg);</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	tg-&gt;bps[READ] = blkcg_get_read_bps(blkcg, tg-&gt;blkg.dev);</div><div class='del'>-	tg-&gt;bps[WRITE] = blkcg_get_write_bps(blkcg, tg-&gt;blkg.dev);</div><div class='del'>-	tg-&gt;iops[READ] = blkcg_get_read_iops(blkcg, tg-&gt;blkg.dev);</div><div class='del'>-	tg-&gt;iops[WRITE] = blkcg_get_write_iops(blkcg, tg-&gt;blkg.dev);</div><div class='add'>+	spin_lock_irqsave(&amp;tg_stats_alloc_lock, flags);</div><div class='add'>+	list_del_init(&amp;tg-&gt;stats_alloc_node);</div><div class='add'>+	spin_unlock_irqrestore(&amp;tg_stats_alloc_lock, flags);</div><div class='ctx'> </div><div class='del'>-	throtl_add_group_to_td_list(td, tg);</div><div class='add'>+	free_percpu(tg-&gt;stats_cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Should be called without queue lock and outside of rcu period */</div><div class='del'>-static struct throtl_grp *throtl_alloc_tg(struct throtl_data *td)</div><div class='add'>+static void throtl_pd_reset_stats(struct blkcg_gq *blkg)</div><div class='ctx'> {</div><div class='del'>-	struct throtl_grp *tg = NULL;</div><div class='del'>-	int ret;</div><div class='add'>+	struct throtl_grp *tg = blkg_to_tg(blkg);</div><div class='add'>+	int cpu;</div><div class='ctx'> </div><div class='del'>-	tg = kzalloc_node(sizeof(*tg), GFP_ATOMIC, td-&gt;queue-&gt;node);</div><div class='del'>-	if (!tg)</div><div class='del'>-		return NULL;</div><div class='add'>+	if (tg-&gt;stats_cpu == NULL)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	ret = blkio_alloc_blkg_stats(&amp;tg-&gt;blkg);</div><div class='add'>+	for_each_possible_cpu(cpu) {</div><div class='add'>+		struct tg_stats_cpu *sc = per_cpu_ptr(tg-&gt;stats_cpu, cpu);</div><div class='ctx'> </div><div class='del'>-	if (ret) {</div><div class='del'>-		kfree(tg);</div><div class='del'>-		return NULL;</div><div class='add'>+		blkg_rwstat_reset(&amp;sc-&gt;service_bytes);</div><div class='add'>+		blkg_rwstat_reset(&amp;sc-&gt;serviced);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	throtl_init_group(tg);</div><div class='del'>-	return tg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct</div><div class='del'>-throtl_grp *throtl_find_tg(struct throtl_data *td, struct blkio_cgroup *blkcg)</div><div class='add'>+static struct throtl_grp *throtl_lookup_tg(struct throtl_data *td,</div><div class='add'>+					   struct blkcg *blkcg)</div><div class='ctx'> {</div><div class='del'>-	struct throtl_grp *tg = NULL;</div><div class='del'>-	void *key = td;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * This is the common case when there are no blkio cgroups.</div><div class='del'>- 	 * Avoid lookup in this case</div><div class='del'>- 	 */</div><div class='del'>-	if (blkcg == &amp;blkio_root_cgroup)</div><div class='del'>-		tg = td-&gt;root_tg;</div><div class='del'>-	else</div><div class='del'>-		tg = tg_of_blkg(blkiocg_lookup_group(blkcg, key));</div><div class='add'>+	 * This is the common case when there are no blkcgs.  Avoid lookup</div><div class='add'>+	 * in this case</div><div class='add'>+	 */</div><div class='add'>+	if (blkcg == &amp;blkcg_root)</div><div class='add'>+		return td_root_tg(td);</div><div class='ctx'> </div><div class='del'>-	__throtl_tg_fill_dev_details(td, tg);</div><div class='del'>-	return tg;</div><div class='add'>+	return blkg_to_tg(blkg_lookup(blkcg, td-&gt;queue));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct throtl_grp * throtl_get_tg(struct throtl_data *td)</div><div class='add'>+static struct throtl_grp *throtl_lookup_create_tg(struct throtl_data *td,</div><div class='add'>+						  struct blkcg *blkcg)</div><div class='ctx'> {</div><div class='del'>-	struct throtl_grp *tg = NULL, *__tg = NULL;</div><div class='del'>-	struct blkio_cgroup *blkcg;</div><div class='ctx'> 	struct request_queue *q = td-&gt;queue;</div><div class='del'>-</div><div class='del'>-	/* no throttling for dead queue */</div><div class='del'>-	if (unlikely(blk_queue_dead(q)))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	blkcg = task_blkio_cgroup(current);</div><div class='del'>-	tg = throtl_find_tg(td, blkcg);</div><div class='del'>-	if (tg) {</div><div class='del'>-		rcu_read_unlock();</div><div class='del'>-		return tg;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Need to allocate a group. Allocation of group also needs allocation</div><div class='del'>-	 * of per cpu stats which in-turn takes a mutex() and can block. Hence</div><div class='del'>-	 * we need to drop rcu lock and queue_lock before we call alloc.</div><div class='del'>-	 */</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-	spin_unlock_irq(q-&gt;queue_lock);</div><div class='del'>-</div><div class='del'>-	tg = throtl_alloc_tg(td);</div><div class='del'>-</div><div class='del'>-	/* Group allocated and queue is still alive. take the lock */</div><div class='del'>-	spin_lock_irq(q-&gt;queue_lock);</div><div class='del'>-</div><div class='del'>-	/* Make sure @q is still alive */</div><div class='del'>-	if (unlikely(blk_queue_dead(q))) {</div><div class='del'>-		kfree(tg);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialize the new group. After sleeping, read the blkcg again.</div><div class='del'>-	 */</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	blkcg = task_blkio_cgroup(current);</div><div class='add'>+	struct throtl_grp *tg = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If some other thread already allocated the group while we were</div><div class='del'>-	 * not holding queue lock, free up the group</div><div class='add'>+	 * This is the common case when there are no blkcgs.  Avoid lookup</div><div class='add'>+	 * in this case</div><div class='ctx'> 	 */</div><div class='del'>-	__tg = throtl_find_tg(td, blkcg);</div><div class='del'>-</div><div class='del'>-	if (__tg) {</div><div class='del'>-		kfree(tg);</div><div class='del'>-		rcu_read_unlock();</div><div class='del'>-		return __tg;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Group allocation failed. Account the IO to root group */</div><div class='del'>-	if (!tg) {</div><div class='del'>-		tg = td-&gt;root_tg;</div><div class='del'>-		return tg;</div><div class='add'>+	if (blkcg == &amp;blkcg_root) {</div><div class='add'>+		tg = td_root_tg(td);</div><div class='add'>+	} else {</div><div class='add'>+		struct blkcg_gq *blkg;</div><div class='add'>+</div><div class='add'>+		blkg = blkg_lookup_create(blkcg, q);</div><div class='add'>+</div><div class='add'>+		/* if %NULL and @q is alive, fall back to root_tg */</div><div class='add'>+		if (!IS_ERR(blkg))</div><div class='add'>+			tg = blkg_to_tg(blkg);</div><div class='add'>+		else if (!blk_queue_dead(q))</div><div class='add'>+			tg = td_root_tg(td);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	throtl_init_add_tg_lists(td, tg, blkcg);</div><div class='del'>-	rcu_read_unlock();</div><div class='ctx'> 	return tg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -734,16 +675,41 @@ static bool tg_may_dispatch(struct throtl_data *td, struct throtl_grp *tg,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void throtl_update_dispatch_stats(struct blkcg_gq *blkg, u64 bytes,</div><div class='add'>+					 int rw)</div><div class='add'>+{</div><div class='add'>+	struct throtl_grp *tg = blkg_to_tg(blkg);</div><div class='add'>+	struct tg_stats_cpu *stats_cpu;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* If per cpu stats are not allocated yet, don't do any accounting. */</div><div class='add'>+	if (tg-&gt;stats_cpu == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disabling interrupts to provide mutual exclusion between two</div><div class='add'>+	 * writes on same cpu. It probably is not needed for 64bit. Not</div><div class='add'>+	 * optimizing that case yet.</div><div class='add'>+	 */</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+</div><div class='add'>+	stats_cpu = this_cpu_ptr(tg-&gt;stats_cpu);</div><div class='add'>+</div><div class='add'>+	blkg_rwstat_add(&amp;stats_cpu-&gt;serviced, rw, 1);</div><div class='add'>+	blkg_rwstat_add(&amp;stats_cpu-&gt;service_bytes, rw, bytes);</div><div class='add'>+</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void throtl_charge_bio(struct throtl_grp *tg, struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	bool rw = bio_data_dir(bio);</div><div class='del'>-	bool sync = rw_is_sync(bio-&gt;bi_rw);</div><div class='ctx'> </div><div class='ctx'> 	/* Charge the bio to the group */</div><div class='ctx'> 	tg-&gt;bytes_disp[rw] += bio-&gt;bi_size;</div><div class='ctx'> 	tg-&gt;io_disp[rw]++;</div><div class='ctx'> </div><div class='del'>-	blkiocg_update_dispatch_stats(&amp;tg-&gt;blkg, bio-&gt;bi_size, rw, sync);</div><div class='add'>+	throtl_update_dispatch_stats(tg_to_blkg(tg), bio-&gt;bi_size, bio-&gt;bi_rw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void throtl_add_bio_tg(struct throtl_data *td, struct throtl_grp *tg,</div><div class='hunk'>@@ -753,7 +719,7 @@ static void throtl_add_bio_tg(struct throtl_data *td, struct throtl_grp *tg,</div><div class='ctx'> </div><div class='ctx'> 	bio_list_add(&amp;tg-&gt;bio_lists[rw], bio);</div><div class='ctx'> 	/* Take a bio reference on tg */</div><div class='del'>-	throtl_ref_get_tg(tg);</div><div class='add'>+	blkg_get(tg_to_blkg(tg));</div><div class='ctx'> 	tg-&gt;nr_queued[rw]++;</div><div class='ctx'> 	td-&gt;nr_queued[rw]++;</div><div class='ctx'> 	throtl_enqueue_tg(td, tg);</div><div class='hunk'>@@ -786,8 +752,8 @@ static void tg_dispatch_one_bio(struct throtl_data *td, struct throtl_grp *tg,</div><div class='ctx'> </div><div class='ctx'> 	bio = bio_list_pop(&amp;tg-&gt;bio_lists[rw]);</div><div class='ctx'> 	tg-&gt;nr_queued[rw]--;</div><div class='del'>-	/* Drop bio reference on tg */</div><div class='del'>-	throtl_put_tg(tg);</div><div class='add'>+	/* Drop bio reference on blkg */</div><div class='add'>+	blkg_put(tg_to_blkg(tg));</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(td-&gt;nr_queued[rw] &lt;= 0);</div><div class='ctx'> 	td-&gt;nr_queued[rw]--;</div><div class='hunk'>@@ -865,8 +831,8 @@ static int throtl_select_dispatch(struct throtl_data *td, struct bio_list *bl)</div><div class='ctx'> </div><div class='ctx'> static void throtl_process_limit_change(struct throtl_data *td)</div><div class='ctx'> {</div><div class='del'>-	struct throtl_grp *tg;</div><div class='del'>-	struct hlist_node *pos, *n;</div><div class='add'>+	struct request_queue *q = td-&gt;queue;</div><div class='add'>+	struct blkcg_gq *blkg, *n;</div><div class='ctx'> </div><div class='ctx'> 	if (!td-&gt;limits_changed)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -875,7 +841,9 @@ static void throtl_process_limit_change(struct throtl_data *td)</div><div class='ctx'> </div><div class='ctx'> 	throtl_log(td, "limits changed");</div><div class='ctx'> </div><div class='del'>-	hlist_for_each_entry_safe(tg, pos, n, &amp;td-&gt;tg_list, tg_node) {</div><div class='add'>+	list_for_each_entry_safe(blkg, n, &amp;q-&gt;blkg_list, q_node) {</div><div class='add'>+		struct throtl_grp *tg = blkg_to_tg(blkg);</div><div class='add'>+</div><div class='ctx'> 		if (!tg-&gt;limits_changed)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -973,120 +941,159 @@ throtl_schedule_delayed_work(struct throtl_data *td, unsigned long delay)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-throtl_destroy_tg(struct throtl_data *td, struct throtl_grp *tg)</div><div class='add'>+static u64 tg_prfill_cpu_rwstat(struct seq_file *sf,</div><div class='add'>+				struct blkg_policy_data *pd, int off)</div><div class='ctx'> {</div><div class='del'>-	/* Something wrong if we are trying to remove same group twice */</div><div class='del'>-	BUG_ON(hlist_unhashed(&amp;tg-&gt;tg_node));</div><div class='add'>+	struct throtl_grp *tg = pd_to_tg(pd);</div><div class='add'>+	struct blkg_rwstat rwstat = { }, tmp;</div><div class='add'>+	int i, cpu;</div><div class='ctx'> </div><div class='del'>-	hlist_del_init(&amp;tg-&gt;tg_node);</div><div class='add'>+	for_each_possible_cpu(cpu) {</div><div class='add'>+		struct tg_stats_cpu *sc = per_cpu_ptr(tg-&gt;stats_cpu, cpu);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Put the reference taken at the time of creation so that when all</div><div class='del'>-	 * queues are gone, group can be destroyed.</div><div class='del'>-	 */</div><div class='del'>-	throtl_put_tg(tg);</div><div class='del'>-	td-&gt;nr_undestroyed_grps--;</div><div class='add'>+		tmp = blkg_rwstat_read((void *)sc + off);</div><div class='add'>+		for (i = 0; i &lt; BLKG_RWSTAT_NR; i++)</div><div class='add'>+			rwstat.cnt[i] += tmp.cnt[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return __blkg_prfill_rwstat(sf, pd, &amp;rwstat);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void throtl_release_tgs(struct throtl_data *td)</div><div class='add'>+static int tg_print_cpu_rwstat(struct cgroup *cgrp, struct cftype *cft,</div><div class='add'>+			       struct seq_file *sf)</div><div class='ctx'> {</div><div class='del'>-	struct hlist_node *pos, *n;</div><div class='del'>-	struct throtl_grp *tg;</div><div class='add'>+	struct blkcg *blkcg = cgroup_to_blkcg(cgrp);</div><div class='ctx'> </div><div class='del'>-	hlist_for_each_entry_safe(tg, pos, n, &amp;td-&gt;tg_list, tg_node) {</div><div class='del'>-		/*</div><div class='del'>-		 * If cgroup removal path got to blk_group first and removed</div><div class='del'>-		 * it from cgroup list, then it will take care of destroying</div><div class='del'>-		 * cfqg also.</div><div class='del'>-		 */</div><div class='del'>-		if (!blkiocg_del_blkio_group(&amp;tg-&gt;blkg))</div><div class='del'>-			throtl_destroy_tg(td, tg);</div><div class='del'>-	}</div><div class='add'>+	blkcg_print_blkgs(sf, blkcg, tg_prfill_cpu_rwstat, &amp;blkcg_policy_throtl,</div><div class='add'>+			  cft-&gt;private, true);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Blk cgroup controller notification saying that blkio_group object is being</div><div class='del'>- * delinked as associated cgroup object is going away. That also means that</div><div class='del'>- * no new IO will come in this group. So get rid of this group as soon as</div><div class='del'>- * any pending IO in the group is finished.</div><div class='del'>- *</div><div class='del'>- * This function is called under rcu_read_lock(). key is the rcu protected</div><div class='del'>- * pointer. That means "key" is a valid throtl_data pointer as long as we are</div><div class='del'>- * rcu read lock.</div><div class='del'>- *</div><div class='del'>- * "key" was fetched from blkio_group under blkio_cgroup-&gt;lock. That means</div><div class='del'>- * it should not be NULL as even if queue was going away, cgroup deltion</div><div class='del'>- * path got to it first.</div><div class='del'>- */</div><div class='del'>-void throtl_unlink_blkio_group(void *key, struct blkio_group *blkg)</div><div class='add'>+static u64 tg_prfill_conf_u64(struct seq_file *sf, struct blkg_policy_data *pd,</div><div class='add'>+			      int off)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct throtl_data *td = key;</div><div class='add'>+	struct throtl_grp *tg = pd_to_tg(pd);</div><div class='add'>+	u64 v = *(u64 *)((void *)tg + off);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(td-&gt;queue-&gt;queue_lock, flags);</div><div class='del'>-	throtl_destroy_tg(td, tg_of_blkg(blkg));</div><div class='del'>-	spin_unlock_irqrestore(td-&gt;queue-&gt;queue_lock, flags);</div><div class='add'>+	if (v == -1)</div><div class='add'>+		return 0;</div><div class='add'>+	return __blkg_prfill_u64(sf, pd, v);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void throtl_update_blkio_group_common(struct throtl_data *td,</div><div class='del'>-				struct throtl_grp *tg)</div><div class='add'>+static u64 tg_prfill_conf_uint(struct seq_file *sf, struct blkg_policy_data *pd,</div><div class='add'>+			       int off)</div><div class='ctx'> {</div><div class='del'>-	xchg(&amp;tg-&gt;limits_changed, true);</div><div class='del'>-	xchg(&amp;td-&gt;limits_changed, true);</div><div class='del'>-	/* Schedule a work now to process the limit change */</div><div class='del'>-	throtl_schedule_delayed_work(td, 0);</div><div class='add'>+	struct throtl_grp *tg = pd_to_tg(pd);</div><div class='add'>+	unsigned int v = *(unsigned int *)((void *)tg + off);</div><div class='add'>+</div><div class='add'>+	if (v == -1)</div><div class='add'>+		return 0;</div><div class='add'>+	return __blkg_prfill_u64(sf, pd, v);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * For all update functions, key should be a valid pointer because these</div><div class='del'>- * update functions are called under blkcg_lock, that means, blkg is</div><div class='del'>- * valid and in turn key is valid. queue exit path can not race because</div><div class='del'>- * of blkcg_lock</div><div class='del'>- *</div><div class='del'>- * Can not take queue lock in update functions as queue lock under blkcg_lock</div><div class='del'>- * is not allowed. Under other paths we take blkcg_lock under queue_lock.</div><div class='del'>- */</div><div class='del'>-static void throtl_update_blkio_group_read_bps(void *key,</div><div class='del'>-				struct blkio_group *blkg, u64 read_bps)</div><div class='add'>+static int tg_print_conf_u64(struct cgroup *cgrp, struct cftype *cft,</div><div class='add'>+			     struct seq_file *sf)</div><div class='ctx'> {</div><div class='del'>-	struct throtl_data *td = key;</div><div class='del'>-	struct throtl_grp *tg = tg_of_blkg(blkg);</div><div class='del'>-</div><div class='del'>-	tg-&gt;bps[READ] = read_bps;</div><div class='del'>-	throtl_update_blkio_group_common(td, tg);</div><div class='add'>+	blkcg_print_blkgs(sf, cgroup_to_blkcg(cgrp), tg_prfill_conf_u64,</div><div class='add'>+			  &amp;blkcg_policy_throtl, cft-&gt;private, false);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void throtl_update_blkio_group_write_bps(void *key,</div><div class='del'>-				struct blkio_group *blkg, u64 write_bps)</div><div class='add'>+static int tg_print_conf_uint(struct cgroup *cgrp, struct cftype *cft,</div><div class='add'>+			      struct seq_file *sf)</div><div class='ctx'> {</div><div class='del'>-	struct throtl_data *td = key;</div><div class='del'>-	struct throtl_grp *tg = tg_of_blkg(blkg);</div><div class='del'>-</div><div class='del'>-	tg-&gt;bps[WRITE] = write_bps;</div><div class='del'>-	throtl_update_blkio_group_common(td, tg);</div><div class='add'>+	blkcg_print_blkgs(sf, cgroup_to_blkcg(cgrp), tg_prfill_conf_uint,</div><div class='add'>+			  &amp;blkcg_policy_throtl, cft-&gt;private, false);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void throtl_update_blkio_group_read_iops(void *key,</div><div class='del'>-			struct blkio_group *blkg, unsigned int read_iops)</div><div class='add'>+static int tg_set_conf(struct cgroup *cgrp, struct cftype *cft, const char *buf,</div><div class='add'>+		       bool is_u64)</div><div class='ctx'> {</div><div class='del'>-	struct throtl_data *td = key;</div><div class='del'>-	struct throtl_grp *tg = tg_of_blkg(blkg);</div><div class='add'>+	struct blkcg *blkcg = cgroup_to_blkcg(cgrp);</div><div class='add'>+	struct blkg_conf_ctx ctx;</div><div class='add'>+	struct throtl_grp *tg;</div><div class='add'>+	struct throtl_data *td;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = blkg_conf_prep(blkcg, &amp;blkcg_policy_throtl, buf, &amp;ctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	tg = blkg_to_tg(ctx.blkg);</div><div class='add'>+	td = ctx.blkg-&gt;q-&gt;td;</div><div class='add'>+</div><div class='add'>+	if (!ctx.v)</div><div class='add'>+		ctx.v = -1;</div><div class='add'>+</div><div class='add'>+	if (is_u64)</div><div class='add'>+		*(u64 *)((void *)tg + cft-&gt;private) = ctx.v;</div><div class='add'>+	else</div><div class='add'>+		*(unsigned int *)((void *)tg + cft-&gt;private) = ctx.v;</div><div class='add'>+</div><div class='add'>+	/* XXX: we don't need the following deferred processing */</div><div class='add'>+	xchg(&amp;tg-&gt;limits_changed, true);</div><div class='add'>+	xchg(&amp;td-&gt;limits_changed, true);</div><div class='add'>+	throtl_schedule_delayed_work(td, 0);</div><div class='ctx'> </div><div class='del'>-	tg-&gt;iops[READ] = read_iops;</div><div class='del'>-	throtl_update_blkio_group_common(td, tg);</div><div class='add'>+	blkg_conf_finish(&amp;ctx);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void throtl_update_blkio_group_write_iops(void *key,</div><div class='del'>-			struct blkio_group *blkg, unsigned int write_iops)</div><div class='add'>+static int tg_set_conf_u64(struct cgroup *cgrp, struct cftype *cft,</div><div class='add'>+			   const char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct throtl_data *td = key;</div><div class='del'>-	struct throtl_grp *tg = tg_of_blkg(blkg);</div><div class='add'>+	return tg_set_conf(cgrp, cft, buf, true);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	tg-&gt;iops[WRITE] = write_iops;</div><div class='del'>-	throtl_update_blkio_group_common(td, tg);</div><div class='add'>+static int tg_set_conf_uint(struct cgroup *cgrp, struct cftype *cft,</div><div class='add'>+			    const char *buf)</div><div class='add'>+{</div><div class='add'>+	return tg_set_conf(cgrp, cft, buf, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct cftype throtl_files[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "throttle.read_bps_device",</div><div class='add'>+		.private = offsetof(struct throtl_grp, bps[READ]),</div><div class='add'>+		.read_seq_string = tg_print_conf_u64,</div><div class='add'>+		.write_string = tg_set_conf_u64,</div><div class='add'>+		.max_write_len = 256,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "throttle.write_bps_device",</div><div class='add'>+		.private = offsetof(struct throtl_grp, bps[WRITE]),</div><div class='add'>+		.read_seq_string = tg_print_conf_u64,</div><div class='add'>+		.write_string = tg_set_conf_u64,</div><div class='add'>+		.max_write_len = 256,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "throttle.read_iops_device",</div><div class='add'>+		.private = offsetof(struct throtl_grp, iops[READ]),</div><div class='add'>+		.read_seq_string = tg_print_conf_uint,</div><div class='add'>+		.write_string = tg_set_conf_uint,</div><div class='add'>+		.max_write_len = 256,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "throttle.write_iops_device",</div><div class='add'>+		.private = offsetof(struct throtl_grp, iops[WRITE]),</div><div class='add'>+		.read_seq_string = tg_print_conf_uint,</div><div class='add'>+		.write_string = tg_set_conf_uint,</div><div class='add'>+		.max_write_len = 256,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "throttle.io_service_bytes",</div><div class='add'>+		.private = offsetof(struct tg_stats_cpu, service_bytes),</div><div class='add'>+		.read_seq_string = tg_print_cpu_rwstat,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "throttle.io_serviced",</div><div class='add'>+		.private = offsetof(struct tg_stats_cpu, serviced),</div><div class='add'>+		.read_seq_string = tg_print_cpu_rwstat,</div><div class='add'>+	},</div><div class='add'>+	{ }	/* terminate */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void throtl_shutdown_wq(struct request_queue *q)</div><div class='ctx'> {</div><div class='ctx'> 	struct throtl_data *td = q-&gt;td;</div><div class='hunk'>@@ -1094,19 +1101,13 @@ static void throtl_shutdown_wq(struct request_queue *q)</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;td-&gt;throtl_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct blkio_policy_type blkio_policy_throtl = {</div><div class='del'>-	.ops = {</div><div class='del'>-		.blkio_unlink_group_fn = throtl_unlink_blkio_group,</div><div class='del'>-		.blkio_update_group_read_bps_fn =</div><div class='del'>-					throtl_update_blkio_group_read_bps,</div><div class='del'>-		.blkio_update_group_write_bps_fn =</div><div class='del'>-					throtl_update_blkio_group_write_bps,</div><div class='del'>-		.blkio_update_group_read_iops_fn =</div><div class='del'>-					throtl_update_blkio_group_read_iops,</div><div class='del'>-		.blkio_update_group_write_iops_fn =</div><div class='del'>-					throtl_update_blkio_group_write_iops,</div><div class='del'>-	},</div><div class='del'>-	.plid = BLKIO_POLICY_THROTL,</div><div class='add'>+static struct blkcg_policy blkcg_policy_throtl = {</div><div class='add'>+	.pd_size		= sizeof(struct throtl_grp),</div><div class='add'>+	.cftypes		= throtl_files,</div><div class='add'>+</div><div class='add'>+	.pd_init_fn		= throtl_pd_init,</div><div class='add'>+	.pd_exit_fn		= throtl_pd_exit,</div><div class='add'>+	.pd_reset_stats_fn	= throtl_pd_reset_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> bool blk_throtl_bio(struct request_queue *q, struct bio *bio)</div><div class='hunk'>@@ -1114,7 +1115,7 @@ bool blk_throtl_bio(struct request_queue *q, struct bio *bio)</div><div class='ctx'> 	struct throtl_data *td = q-&gt;td;</div><div class='ctx'> 	struct throtl_grp *tg;</div><div class='ctx'> 	bool rw = bio_data_dir(bio), update_disptime = true;</div><div class='del'>-	struct blkio_cgroup *blkcg;</div><div class='add'>+	struct blkcg *blkcg;</div><div class='ctx'> 	bool throttled = false;</div><div class='ctx'> </div><div class='ctx'> 	if (bio-&gt;bi_rw &amp; REQ_THROTTLED) {</div><div class='hunk'>@@ -1122,33 +1123,31 @@ bool blk_throtl_bio(struct request_queue *q, struct bio *bio)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* bio_associate_current() needs ioc, try creating */</div><div class='add'>+	create_io_context(GFP_ATOMIC, q-&gt;node);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * A throtl_grp pointer retrieved under rcu can be used to access</div><div class='ctx'> 	 * basic fields like stats and io rates. If a group has no rules,</div><div class='ctx'> 	 * just update the dispatch stats in lockless manner and return.</div><div class='ctx'> 	 */</div><div class='del'>-</div><div class='ctx'> 	rcu_read_lock();</div><div class='del'>-	blkcg = task_blkio_cgroup(current);</div><div class='del'>-	tg = throtl_find_tg(td, blkcg);</div><div class='add'>+	blkcg = bio_blkcg(bio);</div><div class='add'>+	tg = throtl_lookup_tg(td, blkcg);</div><div class='ctx'> 	if (tg) {</div><div class='del'>-		throtl_tg_fill_dev_details(td, tg);</div><div class='del'>-</div><div class='ctx'> 		if (tg_no_rule_group(tg, rw)) {</div><div class='del'>-			blkiocg_update_dispatch_stats(&amp;tg-&gt;blkg, bio-&gt;bi_size,</div><div class='del'>-					rw, rw_is_sync(bio-&gt;bi_rw));</div><div class='del'>-			rcu_read_unlock();</div><div class='del'>-			goto out;</div><div class='add'>+			throtl_update_dispatch_stats(tg_to_blkg(tg),</div><div class='add'>+						     bio-&gt;bi_size, bio-&gt;bi_rw);</div><div class='add'>+			goto out_unlock_rcu;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Either group has not been allocated yet or it is not an unlimited</div><div class='ctx'> 	 * IO group</div><div class='ctx'> 	 */</div><div class='ctx'> 	spin_lock_irq(q-&gt;queue_lock);</div><div class='del'>-	tg = throtl_get_tg(td);</div><div class='add'>+	tg = throtl_lookup_create_tg(td, blkcg);</div><div class='ctx'> 	if (unlikely(!tg))</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> </div><div class='hunk'>@@ -1189,6 +1188,7 @@ queue_bio:</div><div class='ctx'> 			tg-&gt;io_disp[rw], tg-&gt;iops[rw],</div><div class='ctx'> 			tg-&gt;nr_queued[READ], tg-&gt;nr_queued[WRITE]);</div><div class='ctx'> </div><div class='add'>+	bio_associate_current(bio);</div><div class='ctx'> 	throtl_add_bio_tg(q-&gt;td, tg, bio);</div><div class='ctx'> 	throttled = true;</div><div class='ctx'> </div><div class='hunk'>@@ -1199,6 +1199,8 @@ queue_bio:</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='ctx'> 	spin_unlock_irq(q-&gt;queue_lock);</div><div class='add'>+out_unlock_rcu:</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> out:</div><div class='ctx'> 	return throttled;</div><div class='ctx'> }</div><div class='hunk'>@@ -1241,79 +1243,31 @@ void blk_throtl_drain(struct request_queue *q)</div><div class='ctx'> int blk_throtl_init(struct request_queue *q)</div><div class='ctx'> {</div><div class='ctx'> 	struct throtl_data *td;</div><div class='del'>-	struct throtl_grp *tg;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	td = kzalloc_node(sizeof(*td), GFP_KERNEL, q-&gt;node);</div><div class='ctx'> 	if (!td)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	INIT_HLIST_HEAD(&amp;td-&gt;tg_list);</div><div class='ctx'> 	td-&gt;tg_service_tree = THROTL_RB_ROOT;</div><div class='ctx'> 	td-&gt;limits_changed = false;</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;td-&gt;throtl_work, blk_throtl_work);</div><div class='ctx'> </div><div class='del'>-	/* alloc and Init root group. */</div><div class='add'>+	q-&gt;td = td;</div><div class='ctx'> 	td-&gt;queue = q;</div><div class='del'>-	tg = throtl_alloc_tg(td);</div><div class='ctx'> </div><div class='del'>-	if (!tg) {</div><div class='add'>+	/* activate policy */</div><div class='add'>+	ret = blkcg_activate_policy(q, &amp;blkcg_policy_throtl);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		kfree(td);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	td-&gt;root_tg = tg;</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	throtl_init_add_tg_lists(td, tg, &amp;blkio_root_cgroup);</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-</div><div class='del'>-	/* Attach throtl data to request queue */</div><div class='del'>-	q-&gt;td = td;</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void blk_throtl_exit(struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	struct throtl_data *td = q-&gt;td;</div><div class='del'>-	bool wait = false;</div><div class='del'>-</div><div class='del'>-	BUG_ON(!td);</div><div class='del'>-</div><div class='del'>-	throtl_shutdown_wq(q);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(q-&gt;queue_lock);</div><div class='del'>-	throtl_release_tgs(td);</div><div class='del'>-</div><div class='del'>-	/* If there are other groups */</div><div class='del'>-	if (td-&gt;nr_undestroyed_grps &gt; 0)</div><div class='del'>-		wait = true;</div><div class='del'>-</div><div class='del'>-	spin_unlock_irq(q-&gt;queue_lock);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Wait for tg-&gt;blkg-&gt;key accessors to exit their grace periods.</div><div class='del'>-	 * Do this wait only if there are other undestroyed groups out</div><div class='del'>-	 * there (other than root group). This can happen if cgroup deletion</div><div class='del'>-	 * path claimed the responsibility of cleaning up a group before</div><div class='del'>-	 * queue cleanup code get to the group.</div><div class='del'>-	 *</div><div class='del'>-	 * Do not call synchronize_rcu() unconditionally as there are drivers</div><div class='del'>-	 * which create/delete request queue hundreds of times during scan/boot</div><div class='del'>-	 * and synchronize_rcu() can take significant time and slow down boot.</div><div class='del'>-	 */</div><div class='del'>-	if (wait)</div><div class='del'>-		synchronize_rcu();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Just being safe to make sure after previous flush if some body did</div><div class='del'>-	 * update limits through cgroup and another work got queued, cancel</div><div class='del'>-	 * it.</div><div class='del'>-	 */</div><div class='add'>+	BUG_ON(!q-&gt;td);</div><div class='ctx'> 	throtl_shutdown_wq(q);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void blk_throtl_release(struct request_queue *q)</div><div class='del'>-{</div><div class='add'>+	blkcg_deactivate_policy(q, &amp;blkcg_policy_throtl);</div><div class='ctx'> 	kfree(q-&gt;td);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1323,8 +1277,7 @@ static int __init throtl_init(void)</div><div class='ctx'> 	if (!kthrotld_workqueue)</div><div class='ctx'> 		panic("Failed to create kthrotld\n");</div><div class='ctx'> </div><div class='del'>-	blkio_policy_register(&amp;blkio_policy_throtl);</div><div class='del'>-	return 0;</div><div class='add'>+	return blkcg_policy_register(&amp;blkcg_policy_throtl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(throtl_init);</div><div class='head'>diff --git a/block/blk.h b/block/blk.h<br/>index d45be871329e..85f6ae42f7d3 100644<br/>--- a/<a href='/drm-misc/tree/block/blk.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/blk.h</a><br/>+++ b/<a href='/drm-misc/tree/block/blk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/blk.h</a></div><div class='hunk'>@@ -23,7 +23,8 @@ void blk_rq_bio_prep(struct request_queue *q, struct request *rq,</div><div class='ctx'> 			struct bio *bio);</div><div class='ctx'> int blk_rq_append_bio(struct request_queue *q, struct request *rq,</div><div class='ctx'> 		      struct bio *bio);</div><div class='del'>-void blk_drain_queue(struct request_queue *q, bool drain_all);</div><div class='add'>+void blk_queue_bypass_start(struct request_queue *q);</div><div class='add'>+void blk_queue_bypass_end(struct request_queue *q);</div><div class='ctx'> void blk_dequeue_request(struct request *rq);</div><div class='ctx'> void __blk_queue_free_tags(struct request_queue *q);</div><div class='ctx'> bool __blk_end_bidi_request(struct request *rq, int error,</div><div class='hunk'>@@ -144,9 +145,6 @@ void blk_queue_congestion_threshold(struct request_queue *q);</div><div class='ctx'> </div><div class='ctx'> int blk_dev_init(void);</div><div class='ctx'> </div><div class='del'>-void elv_quiesce_start(struct request_queue *q);</div><div class='del'>-void elv_quiesce_end(struct request_queue *q);</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Return the threshold (number of used requests) at which the queue is</div><div class='hunk'>@@ -186,32 +184,30 @@ static inline int blk_do_io_stat(struct request *rq)</div><div class='ctx'>  */</div><div class='ctx'> void get_io_context(struct io_context *ioc);</div><div class='ctx'> struct io_cq *ioc_lookup_icq(struct io_context *ioc, struct request_queue *q);</div><div class='del'>-struct io_cq *ioc_create_icq(struct request_queue *q, gfp_t gfp_mask);</div><div class='add'>+struct io_cq *ioc_create_icq(struct io_context *ioc, struct request_queue *q,</div><div class='add'>+			     gfp_t gfp_mask);</div><div class='ctx'> void ioc_clear_queue(struct request_queue *q);</div><div class='ctx'> </div><div class='del'>-void create_io_context_slowpath(struct task_struct *task, gfp_t gfp_mask,</div><div class='del'>-				int node);</div><div class='add'>+int create_task_io_context(struct task_struct *task, gfp_t gfp_mask, int node);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * create_io_context - try to create task-&gt;io_context</div><div class='del'>- * @task: target task</div><div class='ctx'>  * @gfp_mask: allocation mask</div><div class='ctx'>  * @node: allocation node</div><div class='ctx'>  *</div><div class='del'>- * If @task-&gt;io_context is %NULL, allocate a new io_context and install it.</div><div class='del'>- * Returns the current @task-&gt;io_context which may be %NULL if allocation</div><div class='del'>- * failed.</div><div class='add'>+ * If %current-&gt;io_context is %NULL, allocate a new io_context and install</div><div class='add'>+ * it.  Returns the current %current-&gt;io_context which may be %NULL if</div><div class='add'>+ * allocation failed.</div><div class='ctx'>  *</div><div class='ctx'>  * Note that this function can't be called with IRQ disabled because</div><div class='del'>- * task_lock which protects @task-&gt;io_context is IRQ-unsafe.</div><div class='add'>+ * task_lock which protects %current-&gt;io_context is IRQ-unsafe.</div><div class='ctx'>  */</div><div class='del'>-static inline struct io_context *create_io_context(struct task_struct *task,</div><div class='del'>-						   gfp_t gfp_mask, int node)</div><div class='add'>+static inline struct io_context *create_io_context(gfp_t gfp_mask, int node)</div><div class='ctx'> {</div><div class='ctx'> 	WARN_ON_ONCE(irqs_disabled());</div><div class='del'>-	if (unlikely(!task-&gt;io_context))</div><div class='del'>-		create_io_context_slowpath(task, gfp_mask, node);</div><div class='del'>-	return task-&gt;io_context;</div><div class='add'>+	if (unlikely(!current-&gt;io_context))</div><div class='add'>+		create_task_io_context(current, gfp_mask, node);</div><div class='add'>+	return current-&gt;io_context;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -222,7 +218,6 @@ extern bool blk_throtl_bio(struct request_queue *q, struct bio *bio);</div><div class='ctx'> extern void blk_throtl_drain(struct request_queue *q);</div><div class='ctx'> extern int blk_throtl_init(struct request_queue *q);</div><div class='ctx'> extern void blk_throtl_exit(struct request_queue *q);</div><div class='del'>-extern void blk_throtl_release(struct request_queue *q);</div><div class='ctx'> #else /* CONFIG_BLK_DEV_THROTTLING */</div><div class='ctx'> static inline bool blk_throtl_bio(struct request_queue *q, struct bio *bio)</div><div class='ctx'> {</div><div class='hunk'>@@ -231,7 +226,6 @@ static inline bool blk_throtl_bio(struct request_queue *q, struct bio *bio)</div><div class='ctx'> static inline void blk_throtl_drain(struct request_queue *q) { }</div><div class='ctx'> static inline int blk_throtl_init(struct request_queue *q) { return 0; }</div><div class='ctx'> static inline void blk_throtl_exit(struct request_queue *q) { }</div><div class='del'>-static inline void blk_throtl_release(struct request_queue *q) { }</div><div class='ctx'> #endif /* CONFIG_BLK_DEV_THROTTLING */</div><div class='ctx'> </div><div class='ctx'> #endif /* BLK_INTERNAL_H */</div><div class='head'>diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c<br/>index 3c38536bd52c..673c977cc2bf 100644<br/>--- a/<a href='/drm-misc/tree/block/cfq-iosched.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/cfq-iosched.c</a><br/>+++ b/<a href='/drm-misc/tree/block/cfq-iosched.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/cfq-iosched.c</a></div><div class='hunk'>@@ -15,7 +15,9 @@</div><div class='ctx'> #include &lt;linux/ioprio.h&gt;</div><div class='ctx'> #include &lt;linux/blktrace_api.h&gt;</div><div class='ctx'> #include "blk.h"</div><div class='del'>-#include "cfq.h"</div><div class='add'>+#include "blk-cgroup.h"</div><div class='add'>+</div><div class='add'>+static struct blkcg_policy blkcg_policy_cfq __maybe_unused;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * tunables</div><div class='hunk'>@@ -171,8 +173,53 @@ enum wl_type_t {</div><div class='ctx'> 	SYNC_WORKLOAD = 2</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct cfqg_stats {</div><div class='add'>+#ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='add'>+	/* total bytes transferred */</div><div class='add'>+	struct blkg_rwstat		service_bytes;</div><div class='add'>+	/* total IOs serviced, post merge */</div><div class='add'>+	struct blkg_rwstat		serviced;</div><div class='add'>+	/* number of ios merged */</div><div class='add'>+	struct blkg_rwstat		merged;</div><div class='add'>+	/* total time spent on device in ns, may not be accurate w/ queueing */</div><div class='add'>+	struct blkg_rwstat		service_time;</div><div class='add'>+	/* total time spent waiting in scheduler queue in ns */</div><div class='add'>+	struct blkg_rwstat		wait_time;</div><div class='add'>+	/* number of IOs queued up */</div><div class='add'>+	struct blkg_rwstat		queued;</div><div class='add'>+	/* total sectors transferred */</div><div class='add'>+	struct blkg_stat		sectors;</div><div class='add'>+	/* total disk time and nr sectors dispatched by this group */</div><div class='add'>+	struct blkg_stat		time;</div><div class='add'>+#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='add'>+	/* time not charged to this cgroup */</div><div class='add'>+	struct blkg_stat		unaccounted_time;</div><div class='add'>+	/* sum of number of ios queued across all samples */</div><div class='add'>+	struct blkg_stat		avg_queue_size_sum;</div><div class='add'>+	/* count of samples taken for average */</div><div class='add'>+	struct blkg_stat		avg_queue_size_samples;</div><div class='add'>+	/* how many times this group has been removed from service tree */</div><div class='add'>+	struct blkg_stat		dequeue;</div><div class='add'>+	/* total time spent waiting for it to be assigned a timeslice. */</div><div class='add'>+	struct blkg_stat		group_wait_time;</div><div class='add'>+	/* time spent idling for this blkcg_gq */</div><div class='add'>+	struct blkg_stat		idle_time;</div><div class='add'>+	/* total time with empty current active q with other requests queued */</div><div class='add'>+	struct blkg_stat		empty_time;</div><div class='add'>+	/* fields after this shouldn't be cleared on stat reset */</div><div class='add'>+	uint64_t			start_group_wait_time;</div><div class='add'>+	uint64_t			start_idle_time;</div><div class='add'>+	uint64_t			start_empty_time;</div><div class='add'>+	uint16_t			flags;</div><div class='add'>+#endif	/* CONFIG_DEBUG_BLK_CGROUP */</div><div class='add'>+#endif	/* CONFIG_CFQ_GROUP_IOSCHED */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* This is per cgroup per device grouping structure */</div><div class='ctx'> struct cfq_group {</div><div class='add'>+	/* must be the first member */</div><div class='add'>+	struct blkg_policy_data pd;</div><div class='add'>+</div><div class='ctx'> 	/* group service_tree member */</div><div class='ctx'> 	struct rb_node rb_node;</div><div class='ctx'> </div><div class='hunk'>@@ -180,7 +227,7 @@ struct cfq_group {</div><div class='ctx'> 	u64 vdisktime;</div><div class='ctx'> 	unsigned int weight;</div><div class='ctx'> 	unsigned int new_weight;</div><div class='del'>-	bool needs_update;</div><div class='add'>+	unsigned int dev_weight;</div><div class='ctx'> </div><div class='ctx'> 	/* number of cfqq currently on this group */</div><div class='ctx'> 	int nr_cfqq;</div><div class='hunk'>@@ -206,20 +253,21 @@ struct cfq_group {</div><div class='ctx'> 	unsigned long saved_workload_slice;</div><div class='ctx'> 	enum wl_type_t saved_workload;</div><div class='ctx'> 	enum wl_prio_t saved_serving_prio;</div><div class='del'>-	struct blkio_group blkg;</div><div class='del'>-#ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='del'>-	struct hlist_node cfqd_node;</div><div class='del'>-	int ref;</div><div class='del'>-#endif</div><div class='add'>+</div><div class='ctx'> 	/* number of requests that are on the dispatch list or inside driver */</div><div class='ctx'> 	int dispatched;</div><div class='ctx'> 	struct cfq_ttime ttime;</div><div class='add'>+	struct cfqg_stats stats;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct cfq_io_cq {</div><div class='ctx'> 	struct io_cq		icq;		/* must be the first member */</div><div class='ctx'> 	struct cfq_queue	*cfqq[2];</div><div class='ctx'> 	struct cfq_ttime	ttime;</div><div class='add'>+	int			ioprio;		/* the current ioprio */</div><div class='add'>+#ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='add'>+	uint64_t		blkcg_id;	/* the current blkcg ID */</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -229,7 +277,7 @@ struct cfq_data {</div><div class='ctx'> 	struct request_queue *queue;</div><div class='ctx'> 	/* Root service tree for cfq_groups */</div><div class='ctx'> 	struct cfq_rb_root grp_service_tree;</div><div class='del'>-	struct cfq_group root_group;</div><div class='add'>+	struct cfq_group *root_group;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The priority currently being served</div><div class='hunk'>@@ -303,12 +351,6 @@ struct cfq_data {</div><div class='ctx'> 	struct cfq_queue oom_cfqq;</div><div class='ctx'> </div><div class='ctx'> 	unsigned long last_delayed_sync;</div><div class='del'>-</div><div class='del'>-	/* List of cfq groups being managed on this device*/</div><div class='del'>-	struct hlist_head cfqg_list;</div><div class='del'>-</div><div class='del'>-	/* Number of groups which are on blkcg-&gt;blkg_list */</div><div class='del'>-	unsigned int nr_blkcg_linked_grps;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct cfq_group *cfq_get_next_cfqg(struct cfq_data *cfqd);</div><div class='hunk'>@@ -371,21 +413,284 @@ CFQ_CFQQ_FNS(deep);</div><div class='ctx'> CFQ_CFQQ_FNS(wait_busy);</div><div class='ctx'> #undef CFQ_CFQQ_FNS</div><div class='ctx'> </div><div class='add'>+static inline struct cfq_group *pd_to_cfqg(struct blkg_policy_data *pd)</div><div class='add'>+{</div><div class='add'>+	return pd ? container_of(pd, struct cfq_group, pd) : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct cfq_group *blkg_to_cfqg(struct blkcg_gq *blkg)</div><div class='add'>+{</div><div class='add'>+	return pd_to_cfqg(blkg_to_pd(blkg, &amp;blkcg_policy_cfq));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct blkcg_gq *cfqg_to_blkg(struct cfq_group *cfqg)</div><div class='add'>+{</div><div class='add'>+	return pd_to_blkg(&amp;cfqg-&gt;pd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CFQ_GROUP_IOSCHED) &amp;&amp; defined(CONFIG_DEBUG_BLK_CGROUP)</div><div class='add'>+</div><div class='add'>+/* cfqg stats flags */</div><div class='add'>+enum cfqg_stats_flags {</div><div class='add'>+	CFQG_stats_waiting = 0,</div><div class='add'>+	CFQG_stats_idling,</div><div class='add'>+	CFQG_stats_empty,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define CFQG_FLAG_FNS(name)						\</div><div class='add'>+static inline void cfqg_stats_mark_##name(struct cfqg_stats *stats)	\</div><div class='add'>+{									\</div><div class='add'>+	stats-&gt;flags |= (1 &lt;&lt; CFQG_stats_##name);			\</div><div class='add'>+}									\</div><div class='add'>+static inline void cfqg_stats_clear_##name(struct cfqg_stats *stats)	\</div><div class='add'>+{									\</div><div class='add'>+	stats-&gt;flags &amp;= ~(1 &lt;&lt; CFQG_stats_##name);			\</div><div class='add'>+}									\</div><div class='add'>+static inline int cfqg_stats_##name(struct cfqg_stats *stats)		\</div><div class='add'>+{									\</div><div class='add'>+	return (stats-&gt;flags &amp; (1 &lt;&lt; CFQG_stats_##name)) != 0;		\</div><div class='add'>+}									\</div><div class='add'>+</div><div class='add'>+CFQG_FLAG_FNS(waiting)</div><div class='add'>+CFQG_FLAG_FNS(idling)</div><div class='add'>+CFQG_FLAG_FNS(empty)</div><div class='add'>+#undef CFQG_FLAG_FNS</div><div class='add'>+</div><div class='add'>+/* This should be called with the queue_lock held. */</div><div class='add'>+static void cfqg_stats_update_group_wait_time(struct cfqg_stats *stats)</div><div class='add'>+{</div><div class='add'>+	unsigned long long now;</div><div class='add'>+</div><div class='add'>+	if (!cfqg_stats_waiting(stats))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	now = sched_clock();</div><div class='add'>+	if (time_after64(now, stats-&gt;start_group_wait_time))</div><div class='add'>+		blkg_stat_add(&amp;stats-&gt;group_wait_time,</div><div class='add'>+			      now - stats-&gt;start_group_wait_time);</div><div class='add'>+	cfqg_stats_clear_waiting(stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This should be called with the queue_lock held. */</div><div class='add'>+static void cfqg_stats_set_start_group_wait_time(struct cfq_group *cfqg,</div><div class='add'>+						 struct cfq_group *curr_cfqg)</div><div class='add'>+{</div><div class='add'>+	struct cfqg_stats *stats = &amp;cfqg-&gt;stats;</div><div class='add'>+</div><div class='add'>+	if (cfqg_stats_waiting(stats))</div><div class='add'>+		return;</div><div class='add'>+	if (cfqg == curr_cfqg)</div><div class='add'>+		return;</div><div class='add'>+	stats-&gt;start_group_wait_time = sched_clock();</div><div class='add'>+	cfqg_stats_mark_waiting(stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This should be called with the queue_lock held. */</div><div class='add'>+static void cfqg_stats_end_empty_time(struct cfqg_stats *stats)</div><div class='add'>+{</div><div class='add'>+	unsigned long long now;</div><div class='add'>+</div><div class='add'>+	if (!cfqg_stats_empty(stats))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	now = sched_clock();</div><div class='add'>+	if (time_after64(now, stats-&gt;start_empty_time))</div><div class='add'>+		blkg_stat_add(&amp;stats-&gt;empty_time,</div><div class='add'>+			      now - stats-&gt;start_empty_time);</div><div class='add'>+	cfqg_stats_clear_empty(stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cfqg_stats_update_dequeue(struct cfq_group *cfqg)</div><div class='add'>+{</div><div class='add'>+	blkg_stat_add(&amp;cfqg-&gt;stats.dequeue, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cfqg_stats_set_start_empty_time(struct cfq_group *cfqg)</div><div class='add'>+{</div><div class='add'>+	struct cfqg_stats *stats = &amp;cfqg-&gt;stats;</div><div class='add'>+</div><div class='add'>+	if (blkg_rwstat_sum(&amp;stats-&gt;queued))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * group is already marked empty. This can happen if cfqq got new</div><div class='add'>+	 * request in parent group and moved to this group while being added</div><div class='add'>+	 * to service tree. Just ignore the event and move on.</div><div class='add'>+	 */</div><div class='add'>+	if (cfqg_stats_empty(stats))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	stats-&gt;start_empty_time = sched_clock();</div><div class='add'>+	cfqg_stats_mark_empty(stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cfqg_stats_update_idle_time(struct cfq_group *cfqg)</div><div class='add'>+{</div><div class='add'>+	struct cfqg_stats *stats = &amp;cfqg-&gt;stats;</div><div class='add'>+</div><div class='add'>+	if (cfqg_stats_idling(stats)) {</div><div class='add'>+		unsigned long long now = sched_clock();</div><div class='add'>+</div><div class='add'>+		if (time_after64(now, stats-&gt;start_idle_time))</div><div class='add'>+			blkg_stat_add(&amp;stats-&gt;idle_time,</div><div class='add'>+				      now - stats-&gt;start_idle_time);</div><div class='add'>+		cfqg_stats_clear_idling(stats);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cfqg_stats_set_start_idle_time(struct cfq_group *cfqg)</div><div class='add'>+{</div><div class='add'>+	struct cfqg_stats *stats = &amp;cfqg-&gt;stats;</div><div class='add'>+</div><div class='add'>+	BUG_ON(cfqg_stats_idling(stats));</div><div class='add'>+</div><div class='add'>+	stats-&gt;start_idle_time = sched_clock();</div><div class='add'>+	cfqg_stats_mark_idling(stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cfqg_stats_update_avg_queue_size(struct cfq_group *cfqg)</div><div class='add'>+{</div><div class='add'>+	struct cfqg_stats *stats = &amp;cfqg-&gt;stats;</div><div class='add'>+</div><div class='add'>+	blkg_stat_add(&amp;stats-&gt;avg_queue_size_sum,</div><div class='add'>+		      blkg_rwstat_sum(&amp;stats-&gt;queued));</div><div class='add'>+	blkg_stat_add(&amp;stats-&gt;avg_queue_size_samples, 1);</div><div class='add'>+	cfqg_stats_update_group_wait_time(stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else	/* CONFIG_CFQ_GROUP_IOSCHED &amp;&amp; CONFIG_DEBUG_BLK_CGROUP */</div><div class='add'>+</div><div class='add'>+static inline void cfqg_stats_set_start_group_wait_time(struct cfq_group *cfqg, struct cfq_group *curr_cfqg) { }</div><div class='add'>+static inline void cfqg_stats_end_empty_time(struct cfqg_stats *stats) { }</div><div class='add'>+static inline void cfqg_stats_update_dequeue(struct cfq_group *cfqg) { }</div><div class='add'>+static inline void cfqg_stats_set_start_empty_time(struct cfq_group *cfqg) { }</div><div class='add'>+static inline void cfqg_stats_update_idle_time(struct cfq_group *cfqg) { }</div><div class='add'>+static inline void cfqg_stats_set_start_idle_time(struct cfq_group *cfqg) { }</div><div class='add'>+static inline void cfqg_stats_update_avg_queue_size(struct cfq_group *cfqg) { }</div><div class='add'>+</div><div class='add'>+#endif	/* CONFIG_CFQ_GROUP_IOSCHED &amp;&amp; CONFIG_DEBUG_BLK_CGROUP */</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='del'>-#define cfq_log_cfqq(cfqd, cfqq, fmt, args...)	\</div><div class='add'>+</div><div class='add'>+static inline void cfqg_get(struct cfq_group *cfqg)</div><div class='add'>+{</div><div class='add'>+	return blkg_get(cfqg_to_blkg(cfqg));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void cfqg_put(struct cfq_group *cfqg)</div><div class='add'>+{</div><div class='add'>+	return blkg_put(cfqg_to_blkg(cfqg));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define cfq_log_cfqq(cfqd, cfqq, fmt, args...)	do {			\</div><div class='add'>+	char __pbuf[128];						\</div><div class='add'>+									\</div><div class='add'>+	blkg_path(cfqg_to_blkg((cfqq)-&gt;cfqg), __pbuf, sizeof(__pbuf));	\</div><div class='ctx'> 	blk_add_trace_msg((cfqd)-&gt;queue, "cfq%d%c %s " fmt, (cfqq)-&gt;pid, \</div><div class='del'>-			cfq_cfqq_sync((cfqq)) ? 'S' : 'A', \</div><div class='del'>-			blkg_path(&amp;(cfqq)-&gt;cfqg-&gt;blkg), ##args)</div><div class='add'>+			  cfq_cfqq_sync((cfqq)) ? 'S' : 'A',		\</div><div class='add'>+			  __pbuf, ##args);				\</div><div class='add'>+} while (0)</div><div class='ctx'> </div><div class='del'>-#define cfq_log_cfqg(cfqd, cfqg, fmt, args...)				\</div><div class='del'>-	blk_add_trace_msg((cfqd)-&gt;queue, "%s " fmt,			\</div><div class='del'>-				blkg_path(&amp;(cfqg)-&gt;blkg), ##args)       \</div><div class='add'>+#define cfq_log_cfqg(cfqd, cfqg, fmt, args...)	do {			\</div><div class='add'>+	char __pbuf[128];						\</div><div class='add'>+									\</div><div class='add'>+	blkg_path(cfqg_to_blkg(cfqg), __pbuf, sizeof(__pbuf));		\</div><div class='add'>+	blk_add_trace_msg((cfqd)-&gt;queue, "%s " fmt, __pbuf, ##args);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+static inline void cfqg_stats_update_io_add(struct cfq_group *cfqg,</div><div class='add'>+					    struct cfq_group *curr_cfqg, int rw)</div><div class='add'>+{</div><div class='add'>+	blkg_rwstat_add(&amp;cfqg-&gt;stats.queued, rw, 1);</div><div class='add'>+	cfqg_stats_end_empty_time(&amp;cfqg-&gt;stats);</div><div class='add'>+	cfqg_stats_set_start_group_wait_time(cfqg, curr_cfqg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void cfqg_stats_update_timeslice_used(struct cfq_group *cfqg,</div><div class='add'>+			unsigned long time, unsigned long unaccounted_time)</div><div class='add'>+{</div><div class='add'>+	blkg_stat_add(&amp;cfqg-&gt;stats.time, time);</div><div class='add'>+#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='add'>+	blkg_stat_add(&amp;cfqg-&gt;stats.unaccounted_time, unaccounted_time);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void cfqg_stats_update_io_remove(struct cfq_group *cfqg, int rw)</div><div class='add'>+{</div><div class='add'>+	blkg_rwstat_add(&amp;cfqg-&gt;stats.queued, rw, -1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void cfqg_stats_update_io_merged(struct cfq_group *cfqg, int rw)</div><div class='add'>+{</div><div class='add'>+	blkg_rwstat_add(&amp;cfqg-&gt;stats.merged, rw, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void cfqg_stats_update_dispatch(struct cfq_group *cfqg,</div><div class='add'>+					      uint64_t bytes, int rw)</div><div class='add'>+{</div><div class='add'>+	blkg_stat_add(&amp;cfqg-&gt;stats.sectors, bytes &gt;&gt; 9);</div><div class='add'>+	blkg_rwstat_add(&amp;cfqg-&gt;stats.serviced, rw, 1);</div><div class='add'>+	blkg_rwstat_add(&amp;cfqg-&gt;stats.service_bytes, rw, bytes);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void cfqg_stats_update_completion(struct cfq_group *cfqg,</div><div class='add'>+			uint64_t start_time, uint64_t io_start_time, int rw)</div><div class='add'>+{</div><div class='add'>+	struct cfqg_stats *stats = &amp;cfqg-&gt;stats;</div><div class='add'>+	unsigned long long now = sched_clock();</div><div class='add'>+</div><div class='add'>+	if (time_after64(now, io_start_time))</div><div class='add'>+		blkg_rwstat_add(&amp;stats-&gt;service_time, rw, now - io_start_time);</div><div class='add'>+	if (time_after64(io_start_time, start_time))</div><div class='add'>+		blkg_rwstat_add(&amp;stats-&gt;wait_time, rw,</div><div class='add'>+				io_start_time - start_time);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cfq_pd_reset_stats(struct blkcg_gq *blkg)</div><div class='add'>+{</div><div class='add'>+	struct cfq_group *cfqg = blkg_to_cfqg(blkg);</div><div class='add'>+	struct cfqg_stats *stats = &amp;cfqg-&gt;stats;</div><div class='add'>+</div><div class='add'>+	/* queued stats shouldn't be cleared */</div><div class='add'>+	blkg_rwstat_reset(&amp;stats-&gt;service_bytes);</div><div class='add'>+	blkg_rwstat_reset(&amp;stats-&gt;serviced);</div><div class='add'>+	blkg_rwstat_reset(&amp;stats-&gt;merged);</div><div class='add'>+	blkg_rwstat_reset(&amp;stats-&gt;service_time);</div><div class='add'>+	blkg_rwstat_reset(&amp;stats-&gt;wait_time);</div><div class='add'>+	blkg_stat_reset(&amp;stats-&gt;time);</div><div class='add'>+#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='add'>+	blkg_stat_reset(&amp;stats-&gt;unaccounted_time);</div><div class='add'>+	blkg_stat_reset(&amp;stats-&gt;avg_queue_size_sum);</div><div class='add'>+	blkg_stat_reset(&amp;stats-&gt;avg_queue_size_samples);</div><div class='add'>+	blkg_stat_reset(&amp;stats-&gt;dequeue);</div><div class='add'>+	blkg_stat_reset(&amp;stats-&gt;group_wait_time);</div><div class='add'>+	blkg_stat_reset(&amp;stats-&gt;idle_time);</div><div class='add'>+	blkg_stat_reset(&amp;stats-&gt;empty_time);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else	/* CONFIG_CFQ_GROUP_IOSCHED */</div><div class='add'>+</div><div class='add'>+static inline void cfqg_get(struct cfq_group *cfqg) { }</div><div class='add'>+static inline void cfqg_put(struct cfq_group *cfqg) { }</div><div class='ctx'> </div><div class='del'>-#else</div><div class='ctx'> #define cfq_log_cfqq(cfqd, cfqq, fmt, args...)	\</div><div class='ctx'> 	blk_add_trace_msg((cfqd)-&gt;queue, "cfq%d " fmt, (cfqq)-&gt;pid, ##args)</div><div class='ctx'> #define cfq_log_cfqg(cfqd, cfqg, fmt, args...)		do {} while (0)</div><div class='del'>-#endif</div><div class='add'>+</div><div class='add'>+static inline void cfqg_stats_update_io_add(struct cfq_group *cfqg,</div><div class='add'>+			struct cfq_group *curr_cfqg, int rw) { }</div><div class='add'>+static inline void cfqg_stats_update_timeslice_used(struct cfq_group *cfqg,</div><div class='add'>+			unsigned long time, unsigned long unaccounted_time) { }</div><div class='add'>+static inline void cfqg_stats_update_io_remove(struct cfq_group *cfqg, int rw) { }</div><div class='add'>+static inline void cfqg_stats_update_io_merged(struct cfq_group *cfqg, int rw) { }</div><div class='add'>+static inline void cfqg_stats_update_dispatch(struct cfq_group *cfqg,</div><div class='add'>+					      uint64_t bytes, int rw) { }</div><div class='add'>+static inline void cfqg_stats_update_completion(struct cfq_group *cfqg,</div><div class='add'>+			uint64_t start_time, uint64_t io_start_time, int rw) { }</div><div class='add'>+</div><div class='add'>+#endif	/* CONFIG_CFQ_GROUP_IOSCHED */</div><div class='add'>+</div><div class='ctx'> #define cfq_log(cfqd, fmt, args...)	\</div><div class='ctx'> 	blk_add_trace_msg((cfqd)-&gt;queue, "cfq " fmt, ##args)</div><div class='ctx'> </div><div class='hunk'>@@ -466,8 +771,9 @@ static inline int cfqg_busy_async_queues(struct cfq_data *cfqd,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cfq_dispatch_insert(struct request_queue *, struct request *);</div><div class='del'>-static struct cfq_queue *cfq_get_queue(struct cfq_data *, bool,</div><div class='del'>-				       struct io_context *, gfp_t);</div><div class='add'>+static struct cfq_queue *cfq_get_queue(struct cfq_data *cfqd, bool is_sync,</div><div class='add'>+				       struct cfq_io_cq *cic, struct bio *bio,</div><div class='add'>+				       gfp_t gfp_mask);</div><div class='ctx'> </div><div class='ctx'> static inline struct cfq_io_cq *icq_to_cic(struct io_cq *icq)</div><div class='ctx'> {</div><div class='hunk'>@@ -545,7 +851,7 @@ static inline u64 cfq_scale_slice(unsigned long delta, struct cfq_group *cfqg)</div><div class='ctx'> {</div><div class='ctx'> 	u64 d = delta &lt;&lt; CFQ_SERVICE_SHIFT;</div><div class='ctx'> </div><div class='del'>-	d = d * BLKIO_WEIGHT_DEFAULT;</div><div class='add'>+	d = d * CFQ_WEIGHT_DEFAULT;</div><div class='ctx'> 	do_div(d, cfqg-&gt;weight);</div><div class='ctx'> 	return d;</div><div class='ctx'> }</div><div class='hunk'>@@ -872,9 +1178,9 @@ static void</div><div class='ctx'> cfq_update_group_weight(struct cfq_group *cfqg)</div><div class='ctx'> {</div><div class='ctx'> 	BUG_ON(!RB_EMPTY_NODE(&amp;cfqg-&gt;rb_node));</div><div class='del'>-	if (cfqg-&gt;needs_update) {</div><div class='add'>+	if (cfqg-&gt;new_weight) {</div><div class='ctx'> 		cfqg-&gt;weight = cfqg-&gt;new_weight;</div><div class='del'>-		cfqg-&gt;needs_update = false;</div><div class='add'>+		cfqg-&gt;new_weight = 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -936,7 +1242,7 @@ cfq_group_notify_queue_del(struct cfq_data *cfqd, struct cfq_group *cfqg)</div><div class='ctx'> 	cfq_log_cfqg(cfqd, cfqg, "del_from_rr group");</div><div class='ctx'> 	cfq_group_service_tree_del(st, cfqg);</div><div class='ctx'> 	cfqg-&gt;saved_workload_slice = 0;</div><div class='del'>-	cfq_blkiocg_update_dequeue_stats(&amp;cfqg-&gt;blkg, 1);</div><div class='add'>+	cfqg_stats_update_dequeue(cfqg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int cfq_cfqq_slice_usage(struct cfq_queue *cfqq,</div><div class='hunk'>@@ -1008,178 +1314,59 @@ static void cfq_group_served(struct cfq_data *cfqd, struct cfq_group *cfqg,</div><div class='ctx'> 		     "sl_used=%u disp=%u charge=%u iops=%u sect=%lu",</div><div class='ctx'> 		     used_sl, cfqq-&gt;slice_dispatch, charge,</div><div class='ctx'> 		     iops_mode(cfqd), cfqq-&gt;nr_sectors);</div><div class='del'>-	cfq_blkiocg_update_timeslice_used(&amp;cfqg-&gt;blkg, used_sl,</div><div class='del'>-					  unaccounted_sl);</div><div class='del'>-	cfq_blkiocg_set_start_empty_time(&amp;cfqg-&gt;blkg);</div><div class='add'>+	cfqg_stats_update_timeslice_used(cfqg, used_sl, unaccounted_sl);</div><div class='add'>+	cfqg_stats_set_start_empty_time(cfqg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='del'>-static inline struct cfq_group *cfqg_of_blkg(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	if (blkg)</div><div class='del'>-		return container_of(blkg, struct cfq_group, blkg);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfq_update_blkio_group_weight(void *key, struct blkio_group *blkg,</div><div class='del'>-					  unsigned int weight)</div><div class='del'>-{</div><div class='del'>-	struct cfq_group *cfqg = cfqg_of_blkg(blkg);</div><div class='del'>-	cfqg-&gt;new_weight = weight;</div><div class='del'>-	cfqg-&gt;needs_update = true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfq_init_add_cfqg_lists(struct cfq_data *cfqd,</div><div class='del'>-			struct cfq_group *cfqg, struct blkio_cgroup *blkcg)</div><div class='del'>-{</div><div class='del'>-	struct backing_dev_info *bdi = &amp;cfqd-&gt;queue-&gt;backing_dev_info;</div><div class='del'>-	unsigned int major, minor;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Add group onto cgroup list. It might happen that bdi-&gt;dev is</div><div class='del'>-	 * not initialized yet. Initialize this new group without major</div><div class='del'>-	 * and minor info and this info will be filled in once a new thread</div><div class='del'>-	 * comes for IO.</div><div class='del'>-	 */</div><div class='del'>-	if (bdi-&gt;dev) {</div><div class='del'>-		sscanf(dev_name(bdi-&gt;dev), "%u:%u", &amp;major, &amp;minor);</div><div class='del'>-		cfq_blkiocg_add_blkio_group(blkcg, &amp;cfqg-&gt;blkg,</div><div class='del'>-					(void *)cfqd, MKDEV(major, minor));</div><div class='del'>-	} else</div><div class='del'>-		cfq_blkiocg_add_blkio_group(blkcg, &amp;cfqg-&gt;blkg,</div><div class='del'>-					(void *)cfqd, 0);</div><div class='del'>-</div><div class='del'>-	cfqd-&gt;nr_blkcg_linked_grps++;</div><div class='del'>-	cfqg-&gt;weight = blkcg_get_weight(blkcg, cfqg-&gt;blkg.dev);</div><div class='del'>-</div><div class='del'>-	/* Add group on cfqd list */</div><div class='del'>-	hlist_add_head(&amp;cfqg-&gt;cfqd_node, &amp;cfqd-&gt;cfqg_list);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Should be called from sleepable context. No request queue lock as per</div><div class='del'>- * cpu stats are allocated dynamically and alloc_percpu needs to be called</div><div class='del'>- * from sleepable context.</div><div class='add'>+/**</div><div class='add'>+ * cfq_init_cfqg_base - initialize base part of a cfq_group</div><div class='add'>+ * @cfqg: cfq_group to initialize</div><div class='add'>+ *</div><div class='add'>+ * Initialize the base part which is used whether %CONFIG_CFQ_GROUP_IOSCHED</div><div class='add'>+ * is enabled or not.</div><div class='ctx'>  */</div><div class='del'>-static struct cfq_group * cfq_alloc_cfqg(struct cfq_data *cfqd)</div><div class='add'>+static void cfq_init_cfqg_base(struct cfq_group *cfqg)</div><div class='ctx'> {</div><div class='del'>-	struct cfq_group *cfqg = NULL;</div><div class='del'>-	int i, j, ret;</div><div class='ctx'> 	struct cfq_rb_root *st;</div><div class='del'>-</div><div class='del'>-	cfqg = kzalloc_node(sizeof(*cfqg), GFP_ATOMIC, cfqd-&gt;queue-&gt;node);</div><div class='del'>-	if (!cfqg)</div><div class='del'>-		return NULL;</div><div class='add'>+	int i, j;</div><div class='ctx'> </div><div class='ctx'> 	for_each_cfqg_st(cfqg, i, j, st)</div><div class='ctx'> 		*st = CFQ_RB_ROOT;</div><div class='ctx'> 	RB_CLEAR_NODE(&amp;cfqg-&gt;rb_node);</div><div class='ctx'> </div><div class='ctx'> 	cfqg-&gt;ttime.last_end_request = jiffies;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Take the initial reference that will be released on destroy</div><div class='del'>-	 * This can be thought of a joint reference by cgroup and</div><div class='del'>-	 * elevator which will be dropped by either elevator exit</div><div class='del'>-	 * or cgroup deletion path depending on who is exiting first.</div><div class='del'>-	 */</div><div class='del'>-	cfqg-&gt;ref = 1;</div><div class='del'>-</div><div class='del'>-	ret = blkio_alloc_blkg_stats(&amp;cfqg-&gt;blkg);</div><div class='del'>-	if (ret) {</div><div class='del'>-		kfree(cfqg);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return cfqg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct cfq_group *</div><div class='del'>-cfq_find_cfqg(struct cfq_data *cfqd, struct blkio_cgroup *blkcg)</div><div class='add'>+#ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='add'>+static void cfq_pd_init(struct blkcg_gq *blkg)</div><div class='ctx'> {</div><div class='del'>-	struct cfq_group *cfqg = NULL;</div><div class='del'>-	void *key = cfqd;</div><div class='del'>-	struct backing_dev_info *bdi = &amp;cfqd-&gt;queue-&gt;backing_dev_info;</div><div class='del'>-	unsigned int major, minor;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * This is the common case when there are no blkio cgroups.</div><div class='del'>-	 * Avoid lookup in this case</div><div class='del'>-	 */</div><div class='del'>-	if (blkcg == &amp;blkio_root_cgroup)</div><div class='del'>-		cfqg = &amp;cfqd-&gt;root_group;</div><div class='del'>-	else</div><div class='del'>-		cfqg = cfqg_of_blkg(blkiocg_lookup_group(blkcg, key));</div><div class='del'>-</div><div class='del'>-	if (cfqg &amp;&amp; !cfqg-&gt;blkg.dev &amp;&amp; bdi-&gt;dev &amp;&amp; dev_name(bdi-&gt;dev)) {</div><div class='del'>-		sscanf(dev_name(bdi-&gt;dev), "%u:%u", &amp;major, &amp;minor);</div><div class='del'>-		cfqg-&gt;blkg.dev = MKDEV(major, minor);</div><div class='del'>-	}</div><div class='add'>+	struct cfq_group *cfqg = blkg_to_cfqg(blkg);</div><div class='ctx'> </div><div class='del'>-	return cfqg;</div><div class='add'>+	cfq_init_cfqg_base(cfqg);</div><div class='add'>+	cfqg-&gt;weight = blkg-&gt;blkcg-&gt;cfq_weight;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Search for the cfq group current task belongs to. request_queue lock must</div><div class='ctx'>  * be held.</div><div class='ctx'>  */</div><div class='del'>-static struct cfq_group *cfq_get_cfqg(struct cfq_data *cfqd)</div><div class='add'>+static struct cfq_group *cfq_lookup_create_cfqg(struct cfq_data *cfqd,</div><div class='add'>+						struct blkcg *blkcg)</div><div class='ctx'> {</div><div class='del'>-	struct blkio_cgroup *blkcg;</div><div class='del'>-	struct cfq_group *cfqg = NULL, *__cfqg = NULL;</div><div class='ctx'> 	struct request_queue *q = cfqd-&gt;queue;</div><div class='add'>+	struct cfq_group *cfqg = NULL;</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	blkcg = task_blkio_cgroup(current);</div><div class='del'>-	cfqg = cfq_find_cfqg(cfqd, blkcg);</div><div class='del'>-	if (cfqg) {</div><div class='del'>-		rcu_read_unlock();</div><div class='del'>-		return cfqg;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Need to allocate a group. Allocation of group also needs allocation</div><div class='del'>-	 * of per cpu stats which in-turn takes a mutex() and can block. Hence</div><div class='del'>-	 * we need to drop rcu lock and queue_lock before we call alloc.</div><div class='del'>-	 *</div><div class='del'>-	 * Not taking any queue reference here and assuming that queue is</div><div class='del'>-	 * around by the time we return. CFQ queue allocation code does</div><div class='del'>-	 * the same. It might be racy though.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-	spin_unlock_irq(q-&gt;queue_lock);</div><div class='del'>-</div><div class='del'>-	cfqg = cfq_alloc_cfqg(cfqd);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(q-&gt;queue_lock);</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	blkcg = task_blkio_cgroup(current);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If some other thread already allocated the group while we were</div><div class='del'>-	 * not holding queue lock, free up the group</div><div class='del'>-	 */</div><div class='del'>-	__cfqg = cfq_find_cfqg(cfqd, blkcg);</div><div class='add'>+	/* avoid lookup for the common case where there's no blkcg */</div><div class='add'>+	if (blkcg == &amp;blkcg_root) {</div><div class='add'>+		cfqg = cfqd-&gt;root_group;</div><div class='add'>+	} else {</div><div class='add'>+		struct blkcg_gq *blkg;</div><div class='ctx'> </div><div class='del'>-	if (__cfqg) {</div><div class='del'>-		kfree(cfqg);</div><div class='del'>-		rcu_read_unlock();</div><div class='del'>-		return __cfqg;</div><div class='add'>+		blkg = blkg_lookup_create(blkcg, q);</div><div class='add'>+		if (!IS_ERR(blkg))</div><div class='add'>+			cfqg = blkg_to_cfqg(blkg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!cfqg)</div><div class='del'>-		cfqg = &amp;cfqd-&gt;root_group;</div><div class='del'>-</div><div class='del'>-	cfq_init_add_cfqg_lists(cfqd, cfqg, blkcg);</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-	return cfqg;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline struct cfq_group *cfq_ref_get_cfqg(struct cfq_group *cfqg)</div><div class='del'>-{</div><div class='del'>-	cfqg-&gt;ref++;</div><div class='ctx'> 	return cfqg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1187,94 +1374,224 @@ static void cfq_link_cfqq_cfqg(struct cfq_queue *cfqq, struct cfq_group *cfqg)</div><div class='ctx'> {</div><div class='ctx'> 	/* Currently, all async queues are mapped to root group */</div><div class='ctx'> 	if (!cfq_cfqq_sync(cfqq))</div><div class='del'>-		cfqg = &amp;cfqq-&gt;cfqd-&gt;root_group;</div><div class='add'>+		cfqg = cfqq-&gt;cfqd-&gt;root_group;</div><div class='ctx'> </div><div class='ctx'> 	cfqq-&gt;cfqg = cfqg;</div><div class='ctx'> 	/* cfqq reference on cfqg */</div><div class='del'>-	cfqq-&gt;cfqg-&gt;ref++;</div><div class='add'>+	cfqg_get(cfqg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cfq_put_cfqg(struct cfq_group *cfqg)</div><div class='add'>+static u64 cfqg_prfill_weight_device(struct seq_file *sf,</div><div class='add'>+				     struct blkg_policy_data *pd, int off)</div><div class='ctx'> {</div><div class='del'>-	struct cfq_rb_root *st;</div><div class='del'>-	int i, j;</div><div class='add'>+	struct cfq_group *cfqg = pd_to_cfqg(pd);</div><div class='ctx'> </div><div class='del'>-	BUG_ON(cfqg-&gt;ref &lt;= 0);</div><div class='del'>-	cfqg-&gt;ref--;</div><div class='del'>-	if (cfqg-&gt;ref)</div><div class='del'>-		return;</div><div class='del'>-	for_each_cfqg_st(cfqg, i, j, st)</div><div class='del'>-		BUG_ON(!RB_EMPTY_ROOT(&amp;st-&gt;rb));</div><div class='del'>-	free_percpu(cfqg-&gt;blkg.stats_cpu);</div><div class='del'>-	kfree(cfqg);</div><div class='add'>+	if (!cfqg-&gt;dev_weight)</div><div class='add'>+		return 0;</div><div class='add'>+	return __blkg_prfill_u64(sf, pd, cfqg-&gt;dev_weight);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cfq_destroy_cfqg(struct cfq_data *cfqd, struct cfq_group *cfqg)</div><div class='add'>+static int cfqg_print_weight_device(struct cgroup *cgrp, struct cftype *cft,</div><div class='add'>+				    struct seq_file *sf)</div><div class='ctx'> {</div><div class='del'>-	/* Something wrong if we are trying to remove same group twice */</div><div class='del'>-	BUG_ON(hlist_unhashed(&amp;cfqg-&gt;cfqd_node));</div><div class='add'>+	blkcg_print_blkgs(sf, cgroup_to_blkcg(cgrp),</div><div class='add'>+			  cfqg_prfill_weight_device, &amp;blkcg_policy_cfq, 0,</div><div class='add'>+			  false);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	hlist_del_init(&amp;cfqg-&gt;cfqd_node);</div><div class='add'>+static int cfq_print_weight(struct cgroup *cgrp, struct cftype *cft,</div><div class='add'>+			    struct seq_file *sf)</div><div class='add'>+{</div><div class='add'>+	seq_printf(sf, "%u\n", cgroup_to_blkcg(cgrp)-&gt;cfq_weight);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	BUG_ON(cfqd-&gt;nr_blkcg_linked_grps &lt;= 0);</div><div class='del'>-	cfqd-&gt;nr_blkcg_linked_grps--;</div><div class='add'>+static int cfqg_set_weight_device(struct cgroup *cgrp, struct cftype *cft,</div><div class='add'>+				  const char *buf)</div><div class='add'>+{</div><div class='add'>+	struct blkcg *blkcg = cgroup_to_blkcg(cgrp);</div><div class='add'>+	struct blkg_conf_ctx ctx;</div><div class='add'>+	struct cfq_group *cfqg;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Put the reference taken at the time of creation so that when all</div><div class='del'>-	 * queues are gone, group can be destroyed.</div><div class='del'>-	 */</div><div class='del'>-	cfq_put_cfqg(cfqg);</div><div class='add'>+	ret = blkg_conf_prep(blkcg, &amp;blkcg_policy_cfq, buf, &amp;ctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = -EINVAL;</div><div class='add'>+	cfqg = blkg_to_cfqg(ctx.blkg);</div><div class='add'>+	if (!ctx.v || (ctx.v &gt;= CFQ_WEIGHT_MIN &amp;&amp; ctx.v &lt;= CFQ_WEIGHT_MAX)) {</div><div class='add'>+		cfqg-&gt;dev_weight = ctx.v;</div><div class='add'>+		cfqg-&gt;new_weight = cfqg-&gt;dev_weight ?: blkcg-&gt;cfq_weight;</div><div class='add'>+		ret = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	blkg_conf_finish(&amp;ctx);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cfq_release_cfq_groups(struct cfq_data *cfqd)</div><div class='add'>+static int cfq_set_weight(struct cgroup *cgrp, struct cftype *cft, u64 val)</div><div class='ctx'> {</div><div class='del'>-	struct hlist_node *pos, *n;</div><div class='del'>-	struct cfq_group *cfqg;</div><div class='add'>+	struct blkcg *blkcg = cgroup_to_blkcg(cgrp);</div><div class='add'>+	struct blkcg_gq *blkg;</div><div class='add'>+	struct hlist_node *n;</div><div class='ctx'> </div><div class='del'>-	hlist_for_each_entry_safe(cfqg, pos, n, &amp;cfqd-&gt;cfqg_list, cfqd_node) {</div><div class='del'>-		/*</div><div class='del'>-		 * If cgroup removal path got to blk_group first and removed</div><div class='del'>-		 * it from cgroup list, then it will take care of destroying</div><div class='del'>-		 * cfqg also.</div><div class='del'>-		 */</div><div class='del'>-		if (!cfq_blkiocg_del_blkio_group(&amp;cfqg-&gt;blkg))</div><div class='del'>-			cfq_destroy_cfqg(cfqd, cfqg);</div><div class='add'>+	if (val &lt; CFQ_WEIGHT_MIN || val &gt; CFQ_WEIGHT_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;blkcg-&gt;lock);</div><div class='add'>+	blkcg-&gt;cfq_weight = (unsigned int)val;</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry(blkg, n, &amp;blkcg-&gt;blkg_list, blkcg_node) {</div><div class='add'>+		struct cfq_group *cfqg = blkg_to_cfqg(blkg);</div><div class='add'>+</div><div class='add'>+		if (cfqg &amp;&amp; !cfqg-&gt;dev_weight)</div><div class='add'>+			cfqg-&gt;new_weight = blkcg-&gt;cfq_weight;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;blkcg-&gt;lock);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Blk cgroup controller notification saying that blkio_group object is being</div><div class='del'>- * delinked as associated cgroup object is going away. That also means that</div><div class='del'>- * no new IO will come in this group. So get rid of this group as soon as</div><div class='del'>- * any pending IO in the group is finished.</div><div class='del'>- *</div><div class='del'>- * This function is called under rcu_read_lock(). key is the rcu protected</div><div class='del'>- * pointer. That means "key" is a valid cfq_data pointer as long as we are rcu</div><div class='del'>- * read lock.</div><div class='del'>- *</div><div class='del'>- * "key" was fetched from blkio_group under blkio_cgroup-&gt;lock. That means</div><div class='del'>- * it should not be NULL as even if elevator was exiting, cgroup deltion</div><div class='del'>- * path got to it first.</div><div class='del'>- */</div><div class='del'>-static void cfq_unlink_blkio_group(void *key, struct blkio_group *blkg)</div><div class='add'>+static int cfqg_print_stat(struct cgroup *cgrp, struct cftype *cft,</div><div class='add'>+			   struct seq_file *sf)</div><div class='ctx'> {</div><div class='del'>-	unsigned long  flags;</div><div class='del'>-	struct cfq_data *cfqd = key;</div><div class='add'>+	struct blkcg *blkcg = cgroup_to_blkcg(cgrp);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(cfqd-&gt;queue-&gt;queue_lock, flags);</div><div class='del'>-	cfq_destroy_cfqg(cfqd, cfqg_of_blkg(blkg));</div><div class='del'>-	spin_unlock_irqrestore(cfqd-&gt;queue-&gt;queue_lock, flags);</div><div class='add'>+	blkcg_print_blkgs(sf, blkcg, blkg_prfill_stat, &amp;blkcg_policy_cfq,</div><div class='add'>+			  cft-&gt;private, false);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#else /* GROUP_IOSCHED */</div><div class='del'>-static struct cfq_group *cfq_get_cfqg(struct cfq_data *cfqd)</div><div class='add'>+static int cfqg_print_rwstat(struct cgroup *cgrp, struct cftype *cft,</div><div class='add'>+			     struct seq_file *sf)</div><div class='ctx'> {</div><div class='del'>-	return &amp;cfqd-&gt;root_group;</div><div class='add'>+	struct blkcg *blkcg = cgroup_to_blkcg(cgrp);</div><div class='add'>+</div><div class='add'>+	blkcg_print_blkgs(sf, blkcg, blkg_prfill_rwstat, &amp;blkcg_policy_cfq,</div><div class='add'>+			  cft-&gt;private, true);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct cfq_group *cfq_ref_get_cfqg(struct cfq_group *cfqg)</div><div class='add'>+#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='add'>+static u64 cfqg_prfill_avg_queue_size(struct seq_file *sf,</div><div class='add'>+				      struct blkg_policy_data *pd, int off)</div><div class='ctx'> {</div><div class='del'>-	return cfqg;</div><div class='add'>+	struct cfq_group *cfqg = pd_to_cfqg(pd);</div><div class='add'>+	u64 samples = blkg_stat_read(&amp;cfqg-&gt;stats.avg_queue_size_samples);</div><div class='add'>+	u64 v = 0;</div><div class='add'>+</div><div class='add'>+	if (samples) {</div><div class='add'>+		v = blkg_stat_read(&amp;cfqg-&gt;stats.avg_queue_size_sum);</div><div class='add'>+		do_div(v, samples);</div><div class='add'>+	}</div><div class='add'>+	__blkg_prfill_u64(sf, pd, v);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* print avg_queue_size */</div><div class='add'>+static int cfqg_print_avg_queue_size(struct cgroup *cgrp, struct cftype *cft,</div><div class='add'>+				     struct seq_file *sf)</div><div class='add'>+{</div><div class='add'>+	struct blkcg *blkcg = cgroup_to_blkcg(cgrp);</div><div class='add'>+</div><div class='add'>+	blkcg_print_blkgs(sf, blkcg, cfqg_prfill_avg_queue_size,</div><div class='add'>+			  &amp;blkcg_policy_cfq, 0, false);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif	/* CONFIG_DEBUG_BLK_CGROUP */</div><div class='add'>+</div><div class='add'>+static struct cftype cfq_blkcg_files[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "weight_device",</div><div class='add'>+		.read_seq_string = cfqg_print_weight_device,</div><div class='add'>+		.write_string = cfqg_set_weight_device,</div><div class='add'>+		.max_write_len = 256,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "weight",</div><div class='add'>+		.read_seq_string = cfq_print_weight,</div><div class='add'>+		.write_u64 = cfq_set_weight,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "time",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.time),</div><div class='add'>+		.read_seq_string = cfqg_print_stat,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "sectors",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.sectors),</div><div class='add'>+		.read_seq_string = cfqg_print_stat,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "io_service_bytes",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.service_bytes),</div><div class='add'>+		.read_seq_string = cfqg_print_rwstat,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "io_serviced",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.serviced),</div><div class='add'>+		.read_seq_string = cfqg_print_rwstat,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "io_service_time",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.service_time),</div><div class='add'>+		.read_seq_string = cfqg_print_rwstat,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "io_wait_time",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.wait_time),</div><div class='add'>+		.read_seq_string = cfqg_print_rwstat,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "io_merged",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.merged),</div><div class='add'>+		.read_seq_string = cfqg_print_rwstat,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "io_queued",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.queued),</div><div class='add'>+		.read_seq_string = cfqg_print_rwstat,</div><div class='add'>+	},</div><div class='add'>+#ifdef CONFIG_DEBUG_BLK_CGROUP</div><div class='add'>+	{</div><div class='add'>+		.name = "avg_queue_size",</div><div class='add'>+		.read_seq_string = cfqg_print_avg_queue_size,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "group_wait_time",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.group_wait_time),</div><div class='add'>+		.read_seq_string = cfqg_print_stat,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "idle_time",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.idle_time),</div><div class='add'>+		.read_seq_string = cfqg_print_stat,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "empty_time",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.empty_time),</div><div class='add'>+		.read_seq_string = cfqg_print_stat,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "dequeue",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.dequeue),</div><div class='add'>+		.read_seq_string = cfqg_print_stat,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "unaccounted_time",</div><div class='add'>+		.private = offsetof(struct cfq_group, stats.unaccounted_time),</div><div class='add'>+		.read_seq_string = cfqg_print_stat,</div><div class='add'>+	},</div><div class='add'>+#endif	/* CONFIG_DEBUG_BLK_CGROUP */</div><div class='add'>+	{ }	/* terminate */</div><div class='add'>+};</div><div class='add'>+#else /* GROUP_IOSCHED */</div><div class='add'>+static struct cfq_group *cfq_lookup_create_cfqg(struct cfq_data *cfqd,</div><div class='add'>+						struct blkcg *blkcg)</div><div class='add'>+{</div><div class='add'>+	return cfqd-&gt;root_group;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='hunk'>@@ -1282,9 +1599,6 @@ cfq_link_cfqq_cfqg(struct cfq_queue *cfqq, struct cfq_group *cfqg) {</div><div class='ctx'> 	cfqq-&gt;cfqg = cfqg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cfq_release_cfq_groups(struct cfq_data *cfqd) {}</div><div class='del'>-static inline void cfq_put_cfqg(struct cfq_group *cfqg) {}</div><div class='del'>-</div><div class='ctx'> #endif /* GROUP_IOSCHED */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1551,12 +1865,10 @@ static void cfq_reposition_rq_rb(struct cfq_queue *cfqq, struct request *rq)</div><div class='ctx'> {</div><div class='ctx'> 	elv_rb_del(&amp;cfqq-&gt;sort_list, rq);</div><div class='ctx'> 	cfqq-&gt;queued[rq_is_sync(rq)]--;</div><div class='del'>-	cfq_blkiocg_update_io_remove_stats(&amp;(RQ_CFQG(rq))-&gt;blkg,</div><div class='del'>-					rq_data_dir(rq), rq_is_sync(rq));</div><div class='add'>+	cfqg_stats_update_io_remove(RQ_CFQG(rq), rq-&gt;cmd_flags);</div><div class='ctx'> 	cfq_add_rq_rb(rq);</div><div class='del'>-	cfq_blkiocg_update_io_add_stats(&amp;(RQ_CFQG(rq))-&gt;blkg,</div><div class='del'>-			&amp;cfqq-&gt;cfqd-&gt;serving_group-&gt;blkg, rq_data_dir(rq),</div><div class='del'>-			rq_is_sync(rq));</div><div class='add'>+	cfqg_stats_update_io_add(RQ_CFQG(rq), cfqq-&gt;cfqd-&gt;serving_group,</div><div class='add'>+				 rq-&gt;cmd_flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct request *</div><div class='hunk'>@@ -1612,8 +1924,7 @@ static void cfq_remove_request(struct request *rq)</div><div class='ctx'> 	cfq_del_rq_rb(rq);</div><div class='ctx'> </div><div class='ctx'> 	cfqq-&gt;cfqd-&gt;rq_queued--;</div><div class='del'>-	cfq_blkiocg_update_io_remove_stats(&amp;(RQ_CFQG(rq))-&gt;blkg,</div><div class='del'>-					rq_data_dir(rq), rq_is_sync(rq));</div><div class='add'>+	cfqg_stats_update_io_remove(RQ_CFQG(rq), rq-&gt;cmd_flags);</div><div class='ctx'> 	if (rq-&gt;cmd_flags &amp; REQ_PRIO) {</div><div class='ctx'> 		WARN_ON(!cfqq-&gt;prio_pending);</div><div class='ctx'> 		cfqq-&gt;prio_pending--;</div><div class='hunk'>@@ -1648,8 +1959,7 @@ static void cfq_merged_request(struct request_queue *q, struct request *req,</div><div class='ctx'> static void cfq_bio_merged(struct request_queue *q, struct request *req,</div><div class='ctx'> 				struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	cfq_blkiocg_update_io_merged_stats(&amp;(RQ_CFQG(req))-&gt;blkg,</div><div class='del'>-					bio_data_dir(bio), cfq_bio_sync(bio));</div><div class='add'>+	cfqg_stats_update_io_merged(RQ_CFQG(req), bio-&gt;bi_rw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1671,8 +1981,7 @@ cfq_merged_requests(struct request_queue *q, struct request *rq,</div><div class='ctx'> 	if (cfqq-&gt;next_rq == next)</div><div class='ctx'> 		cfqq-&gt;next_rq = rq;</div><div class='ctx'> 	cfq_remove_request(next);</div><div class='del'>-	cfq_blkiocg_update_io_merged_stats(&amp;(RQ_CFQG(rq))-&gt;blkg,</div><div class='del'>-					rq_data_dir(next), rq_is_sync(next));</div><div class='add'>+	cfqg_stats_update_io_merged(RQ_CFQG(rq), next-&gt;cmd_flags);</div><div class='ctx'> </div><div class='ctx'> 	cfqq = RQ_CFQQ(next);</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1713,7 +2022,7 @@ static int cfq_allow_merge(struct request_queue *q, struct request *rq,</div><div class='ctx'> static inline void cfq_del_timer(struct cfq_data *cfqd, struct cfq_queue *cfqq)</div><div class='ctx'> {</div><div class='ctx'> 	del_timer(&amp;cfqd-&gt;idle_slice_timer);</div><div class='del'>-	cfq_blkiocg_update_idle_time_stats(&amp;cfqq-&gt;cfqg-&gt;blkg);</div><div class='add'>+	cfqg_stats_update_idle_time(cfqq-&gt;cfqg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __cfq_set_active_queue(struct cfq_data *cfqd,</div><div class='hunk'>@@ -1722,7 +2031,7 @@ static void __cfq_set_active_queue(struct cfq_data *cfqd,</div><div class='ctx'> 	if (cfqq) {</div><div class='ctx'> 		cfq_log_cfqq(cfqd, cfqq, "set_active wl_prio:%d wl_type:%d",</div><div class='ctx'> 				cfqd-&gt;serving_prio, cfqd-&gt;serving_type);</div><div class='del'>-		cfq_blkiocg_update_avg_queue_size_stats(&amp;cfqq-&gt;cfqg-&gt;blkg);</div><div class='add'>+		cfqg_stats_update_avg_queue_size(cfqq-&gt;cfqg);</div><div class='ctx'> 		cfqq-&gt;slice_start = 0;</div><div class='ctx'> 		cfqq-&gt;dispatch_start = jiffies;</div><div class='ctx'> 		cfqq-&gt;allocated_slice = 0;</div><div class='hunk'>@@ -2043,7 +2352,7 @@ static void cfq_arm_slice_timer(struct cfq_data *cfqd)</div><div class='ctx'> 	 * task has exited, don't wait</div><div class='ctx'> 	 */</div><div class='ctx'> 	cic = cfqd-&gt;active_cic;</div><div class='del'>-	if (!cic || !atomic_read(&amp;cic-&gt;icq.ioc-&gt;nr_tasks))</div><div class='add'>+	if (!cic || !atomic_read(&amp;cic-&gt;icq.ioc-&gt;active_ref))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2070,7 +2379,7 @@ static void cfq_arm_slice_timer(struct cfq_data *cfqd)</div><div class='ctx'> 		sl = cfqd-&gt;cfq_slice_idle;</div><div class='ctx'> </div><div class='ctx'> 	mod_timer(&amp;cfqd-&gt;idle_slice_timer, jiffies + sl);</div><div class='del'>-	cfq_blkiocg_update_set_idle_time_stats(&amp;cfqq-&gt;cfqg-&gt;blkg);</div><div class='add'>+	cfqg_stats_set_start_idle_time(cfqq-&gt;cfqg);</div><div class='ctx'> 	cfq_log_cfqq(cfqd, cfqq, "arm_idle: %lu group_idle: %d", sl,</div><div class='ctx'> 			group_idle ? 1 : 0);</div><div class='ctx'> }</div><div class='hunk'>@@ -2093,8 +2402,7 @@ static void cfq_dispatch_insert(struct request_queue *q, struct request *rq)</div><div class='ctx'> </div><div class='ctx'> 	cfqd-&gt;rq_in_flight[cfq_cfqq_sync(cfqq)]++;</div><div class='ctx'> 	cfqq-&gt;nr_sectors += blk_rq_sectors(rq);</div><div class='del'>-	cfq_blkiocg_update_dispatch_stats(&amp;cfqq-&gt;cfqg-&gt;blkg, blk_rq_bytes(rq),</div><div class='del'>-					rq_data_dir(rq), rq_is_sync(rq));</div><div class='add'>+	cfqg_stats_update_dispatch(cfqq-&gt;cfqg, blk_rq_bytes(rq), rq-&gt;cmd_flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2677,7 +2985,7 @@ static void cfq_put_queue(struct cfq_queue *cfqq)</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(cfq_cfqq_on_rr(cfqq));</div><div class='ctx'> 	kmem_cache_free(cfq_pool, cfqq);</div><div class='del'>-	cfq_put_cfqg(cfqg);</div><div class='add'>+	cfqg_put(cfqg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cfq_put_cooperator(struct cfq_queue *cfqq)</div><div class='hunk'>@@ -2736,7 +3044,7 @@ static void cfq_exit_icq(struct io_cq *icq)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cfq_init_prio_data(struct cfq_queue *cfqq, struct io_context *ioc)</div><div class='add'>+static void cfq_init_prio_data(struct cfq_queue *cfqq, struct cfq_io_cq *cic)</div><div class='ctx'> {</div><div class='ctx'> 	struct task_struct *tsk = current;</div><div class='ctx'> 	int ioprio_class;</div><div class='hunk'>@@ -2744,7 +3052,7 @@ static void cfq_init_prio_data(struct cfq_queue *cfqq, struct io_context *ioc)</div><div class='ctx'> 	if (!cfq_cfqq_prio_changed(cfqq))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ioprio_class = IOPRIO_PRIO_CLASS(ioc-&gt;ioprio);</div><div class='add'>+	ioprio_class = IOPRIO_PRIO_CLASS(cic-&gt;ioprio);</div><div class='ctx'> 	switch (ioprio_class) {</div><div class='ctx'> 	default:</div><div class='ctx'> 		printk(KERN_ERR "cfq: bad prio %x\n", ioprio_class);</div><div class='hunk'>@@ -2756,11 +3064,11 @@ static void cfq_init_prio_data(struct cfq_queue *cfqq, struct io_context *ioc)</div><div class='ctx'> 		cfqq-&gt;ioprio_class = task_nice_ioclass(tsk);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IOPRIO_CLASS_RT:</div><div class='del'>-		cfqq-&gt;ioprio = task_ioprio(ioc);</div><div class='add'>+		cfqq-&gt;ioprio = IOPRIO_PRIO_DATA(cic-&gt;ioprio);</div><div class='ctx'> 		cfqq-&gt;ioprio_class = IOPRIO_CLASS_RT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IOPRIO_CLASS_BE:</div><div class='del'>-		cfqq-&gt;ioprio = task_ioprio(ioc);</div><div class='add'>+		cfqq-&gt;ioprio = IOPRIO_PRIO_DATA(cic-&gt;ioprio);</div><div class='ctx'> 		cfqq-&gt;ioprio_class = IOPRIO_CLASS_BE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IOPRIO_CLASS_IDLE:</div><div class='hunk'>@@ -2778,19 +3086,24 @@ static void cfq_init_prio_data(struct cfq_queue *cfqq, struct io_context *ioc)</div><div class='ctx'> 	cfq_clear_cfqq_prio_changed(cfqq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void changed_ioprio(struct cfq_io_cq *cic)</div><div class='add'>+static void check_ioprio_changed(struct cfq_io_cq *cic, struct bio *bio)</div><div class='ctx'> {</div><div class='add'>+	int ioprio = cic-&gt;icq.ioc-&gt;ioprio;</div><div class='ctx'> 	struct cfq_data *cfqd = cic_to_cfqd(cic);</div><div class='ctx'> 	struct cfq_queue *cfqq;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(!cfqd))</div><div class='add'>+	/*</div><div class='add'>+	 * Check whether ioprio has changed.  The condition may trigger</div><div class='add'>+	 * spuriously on a newly created cic but there's no harm.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!cfqd) || likely(cic-&gt;ioprio == ioprio))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	cfqq = cic-&gt;cfqq[BLK_RW_ASYNC];</div><div class='ctx'> 	if (cfqq) {</div><div class='ctx'> 		struct cfq_queue *new_cfqq;</div><div class='del'>-		new_cfqq = cfq_get_queue(cfqd, BLK_RW_ASYNC, cic-&gt;icq.ioc,</div><div class='del'>-						GFP_ATOMIC);</div><div class='add'>+		new_cfqq = cfq_get_queue(cfqd, BLK_RW_ASYNC, cic, bio,</div><div class='add'>+					 GFP_ATOMIC);</div><div class='ctx'> 		if (new_cfqq) {</div><div class='ctx'> 			cic-&gt;cfqq[BLK_RW_ASYNC] = new_cfqq;</div><div class='ctx'> 			cfq_put_queue(cfqq);</div><div class='hunk'>@@ -2800,6 +3113,8 @@ static void changed_ioprio(struct cfq_io_cq *cic)</div><div class='ctx'> 	cfqq = cic-&gt;cfqq[BLK_RW_SYNC];</div><div class='ctx'> 	if (cfqq)</div><div class='ctx'> 		cfq_mark_cfqq_prio_changed(cfqq);</div><div class='add'>+</div><div class='add'>+	cic-&gt;ioprio = ioprio;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cfq_init_cfqq(struct cfq_data *cfqd, struct cfq_queue *cfqq,</div><div class='hunk'>@@ -2823,17 +3138,24 @@ static void cfq_init_cfqq(struct cfq_data *cfqd, struct cfq_queue *cfqq,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='del'>-static void changed_cgroup(struct cfq_io_cq *cic)</div><div class='add'>+static void check_blkcg_changed(struct cfq_io_cq *cic, struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	struct cfq_queue *sync_cfqq = cic_to_cfqq(cic, 1);</div><div class='ctx'> 	struct cfq_data *cfqd = cic_to_cfqd(cic);</div><div class='del'>-	struct request_queue *q;</div><div class='add'>+	struct cfq_queue *sync_cfqq;</div><div class='add'>+	uint64_t id;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(!cfqd))</div><div class='del'>-		return;</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	id = bio_blkcg(bio)-&gt;id;</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> </div><div class='del'>-	q = cfqd-&gt;queue;</div><div class='add'>+	/*</div><div class='add'>+	 * Check whether blkcg has changed.  The condition may trigger</div><div class='add'>+	 * spuriously on a newly created cic but there's no harm.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!cfqd) || likely(cic-&gt;blkcg_id == id))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='add'>+	sync_cfqq = cic_to_cfqq(cic, 1);</div><div class='ctx'> 	if (sync_cfqq) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Drop reference to sync queue. A new sync queue will be</div><div class='hunk'>@@ -2843,21 +3165,26 @@ static void changed_cgroup(struct cfq_io_cq *cic)</div><div class='ctx'> 		cic_set_cfqq(cic, NULL, 1);</div><div class='ctx'> 		cfq_put_queue(sync_cfqq);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	cic-&gt;blkcg_id = id;</div><div class='ctx'> }</div><div class='add'>+#else</div><div class='add'>+static inline void check_blkcg_changed(struct cfq_io_cq *cic, struct bio *bio) { }</div><div class='ctx'> #endif  /* CONFIG_CFQ_GROUP_IOSCHED */</div><div class='ctx'> </div><div class='ctx'> static struct cfq_queue *</div><div class='del'>-cfq_find_alloc_queue(struct cfq_data *cfqd, bool is_sync,</div><div class='del'>-		     struct io_context *ioc, gfp_t gfp_mask)</div><div class='add'>+cfq_find_alloc_queue(struct cfq_data *cfqd, bool is_sync, struct cfq_io_cq *cic,</div><div class='add'>+		     struct bio *bio, gfp_t gfp_mask)</div><div class='ctx'> {</div><div class='add'>+	struct blkcg *blkcg;</div><div class='ctx'> 	struct cfq_queue *cfqq, *new_cfqq = NULL;</div><div class='del'>-	struct cfq_io_cq *cic;</div><div class='ctx'> 	struct cfq_group *cfqg;</div><div class='ctx'> </div><div class='ctx'> retry:</div><div class='del'>-	cfqg = cfq_get_cfqg(cfqd);</div><div class='del'>-	cic = cfq_cic_lookup(cfqd, ioc);</div><div class='del'>-	/* cic always exists here */</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+</div><div class='add'>+	blkcg = bio_blkcg(bio);</div><div class='add'>+	cfqg = cfq_lookup_create_cfqg(cfqd, blkcg);</div><div class='ctx'> 	cfqq = cic_to_cfqq(cic, is_sync);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2870,6 +3197,7 @@ retry:</div><div class='ctx'> 			cfqq = new_cfqq;</div><div class='ctx'> 			new_cfqq = NULL;</div><div class='ctx'> 		} else if (gfp_mask &amp; __GFP_WAIT) {</div><div class='add'>+			rcu_read_unlock();</div><div class='ctx'> 			spin_unlock_irq(cfqd-&gt;queue-&gt;queue_lock);</div><div class='ctx'> 			new_cfqq = kmem_cache_alloc_node(cfq_pool,</div><div class='ctx'> 					gfp_mask | __GFP_ZERO,</div><div class='hunk'>@@ -2885,7 +3213,7 @@ retry:</div><div class='ctx'> </div><div class='ctx'> 		if (cfqq) {</div><div class='ctx'> 			cfq_init_cfqq(cfqd, cfqq, current-&gt;pid, is_sync);</div><div class='del'>-			cfq_init_prio_data(cfqq, ioc);</div><div class='add'>+			cfq_init_prio_data(cfqq, cic);</div><div class='ctx'> 			cfq_link_cfqq_cfqg(cfqq, cfqg);</div><div class='ctx'> 			cfq_log_cfqq(cfqd, cfqq, "alloced");</div><div class='ctx'> 		} else</div><div class='hunk'>@@ -2895,6 +3223,7 @@ retry:</div><div class='ctx'> 	if (new_cfqq)</div><div class='ctx'> 		kmem_cache_free(cfq_pool, new_cfqq);</div><div class='ctx'> </div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> 	return cfqq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2904,6 +3233,9 @@ cfq_async_queue_prio(struct cfq_data *cfqd, int ioprio_class, int ioprio)</div><div class='ctx'> 	switch (ioprio_class) {</div><div class='ctx'> 	case IOPRIO_CLASS_RT:</div><div class='ctx'> 		return &amp;cfqd-&gt;async_cfqq[0][ioprio];</div><div class='add'>+	case IOPRIO_CLASS_NONE:</div><div class='add'>+		ioprio = IOPRIO_NORM;</div><div class='add'>+		/* fall through */</div><div class='ctx'> 	case IOPRIO_CLASS_BE:</div><div class='ctx'> 		return &amp;cfqd-&gt;async_cfqq[1][ioprio];</div><div class='ctx'> 	case IOPRIO_CLASS_IDLE:</div><div class='hunk'>@@ -2914,11 +3246,11 @@ cfq_async_queue_prio(struct cfq_data *cfqd, int ioprio_class, int ioprio)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct cfq_queue *</div><div class='del'>-cfq_get_queue(struct cfq_data *cfqd, bool is_sync, struct io_context *ioc,</div><div class='del'>-	      gfp_t gfp_mask)</div><div class='add'>+cfq_get_queue(struct cfq_data *cfqd, bool is_sync, struct cfq_io_cq *cic,</div><div class='add'>+	      struct bio *bio, gfp_t gfp_mask)</div><div class='ctx'> {</div><div class='del'>-	const int ioprio = task_ioprio(ioc);</div><div class='del'>-	const int ioprio_class = task_ioprio_class(ioc);</div><div class='add'>+	const int ioprio_class = IOPRIO_PRIO_CLASS(cic-&gt;ioprio);</div><div class='add'>+	const int ioprio = IOPRIO_PRIO_DATA(cic-&gt;ioprio);</div><div class='ctx'> 	struct cfq_queue **async_cfqq = NULL;</div><div class='ctx'> 	struct cfq_queue *cfqq = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -2928,7 +3260,7 @@ cfq_get_queue(struct cfq_data *cfqd, bool is_sync, struct io_context *ioc,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!cfqq)</div><div class='del'>-		cfqq = cfq_find_alloc_queue(cfqd, is_sync, ioc, gfp_mask);</div><div class='add'>+		cfqq = cfq_find_alloc_queue(cfqd, is_sync, cic, bio, gfp_mask);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * pin the queue now that it's allocated, scheduler exit will prune it</div><div class='hunk'>@@ -3010,7 +3342,7 @@ cfq_update_idle_window(struct cfq_data *cfqd, struct cfq_queue *cfqq,</div><div class='ctx'> </div><div class='ctx'> 	if (cfqq-&gt;next_rq &amp;&amp; (cfqq-&gt;next_rq-&gt;cmd_flags &amp; REQ_NOIDLE))</div><div class='ctx'> 		enable_idle = 0;</div><div class='del'>-	else if (!atomic_read(&amp;cic-&gt;icq.ioc-&gt;nr_tasks) ||</div><div class='add'>+	else if (!atomic_read(&amp;cic-&gt;icq.ioc-&gt;active_ref) ||</div><div class='ctx'> 		 !cfqd-&gt;cfq_slice_idle ||</div><div class='ctx'> 		 (!cfq_cfqq_deep(cfqq) &amp;&amp; CFQQ_SEEKY(cfqq)))</div><div class='ctx'> 		enable_idle = 0;</div><div class='hunk'>@@ -3174,8 +3506,7 @@ cfq_rq_enqueued(struct cfq_data *cfqd, struct cfq_queue *cfqq,</div><div class='ctx'> 				cfq_clear_cfqq_wait_request(cfqq);</div><div class='ctx'> 				__blk_run_queue(cfqd-&gt;queue);</div><div class='ctx'> 			} else {</div><div class='del'>-				cfq_blkiocg_update_idle_time_stats(</div><div class='del'>-						&amp;cfqq-&gt;cfqg-&gt;blkg);</div><div class='add'>+				cfqg_stats_update_idle_time(cfqq-&gt;cfqg);</div><div class='ctx'> 				cfq_mark_cfqq_must_dispatch(cfqq);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3197,14 +3528,13 @@ static void cfq_insert_request(struct request_queue *q, struct request *rq)</div><div class='ctx'> 	struct cfq_queue *cfqq = RQ_CFQQ(rq);</div><div class='ctx'> </div><div class='ctx'> 	cfq_log_cfqq(cfqd, cfqq, "insert_request");</div><div class='del'>-	cfq_init_prio_data(cfqq, RQ_CIC(rq)-&gt;icq.ioc);</div><div class='add'>+	cfq_init_prio_data(cfqq, RQ_CIC(rq));</div><div class='ctx'> </div><div class='ctx'> 	rq_set_fifo_time(rq, jiffies + cfqd-&gt;cfq_fifo_expire[rq_is_sync(rq)]);</div><div class='ctx'> 	list_add_tail(&amp;rq-&gt;queuelist, &amp;cfqq-&gt;fifo);</div><div class='ctx'> 	cfq_add_rq_rb(rq);</div><div class='del'>-	cfq_blkiocg_update_io_add_stats(&amp;(RQ_CFQG(rq))-&gt;blkg,</div><div class='del'>-			&amp;cfqd-&gt;serving_group-&gt;blkg, rq_data_dir(rq),</div><div class='del'>-			rq_is_sync(rq));</div><div class='add'>+	cfqg_stats_update_io_add(RQ_CFQG(rq), cfqd-&gt;serving_group,</div><div class='add'>+				 rq-&gt;cmd_flags);</div><div class='ctx'> 	cfq_rq_enqueued(cfqd, cfqq, rq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3300,9 +3630,8 @@ static void cfq_completed_request(struct request_queue *q, struct request *rq)</div><div class='ctx'> 	cfqd-&gt;rq_in_driver--;</div><div class='ctx'> 	cfqq-&gt;dispatched--;</div><div class='ctx'> 	(RQ_CFQG(rq))-&gt;dispatched--;</div><div class='del'>-	cfq_blkiocg_update_completion_stats(&amp;cfqq-&gt;cfqg-&gt;blkg,</div><div class='del'>-			rq_start_time_ns(rq), rq_io_start_time_ns(rq),</div><div class='del'>-			rq_data_dir(rq), rq_is_sync(rq));</div><div class='add'>+	cfqg_stats_update_completion(cfqq-&gt;cfqg, rq_start_time_ns(rq),</div><div class='add'>+				     rq_io_start_time_ns(rq), rq-&gt;cmd_flags);</div><div class='ctx'> </div><div class='ctx'> 	cfqd-&gt;rq_in_flight[cfq_cfqq_sync(cfqq)]--;</div><div class='ctx'> </div><div class='hunk'>@@ -3399,7 +3728,7 @@ static int cfq_may_queue(struct request_queue *q, int rw)</div><div class='ctx'> </div><div class='ctx'> 	cfqq = cic_to_cfqq(cic, rw_is_sync(rw));</div><div class='ctx'> 	if (cfqq) {</div><div class='del'>-		cfq_init_prio_data(cfqq, cic-&gt;icq.ioc);</div><div class='add'>+		cfq_init_prio_data(cfqq, cic);</div><div class='ctx'> </div><div class='ctx'> 		return __cfq_may_queue(cfqq);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3421,7 +3750,7 @@ static void cfq_put_request(struct request *rq)</div><div class='ctx'> 		cfqq-&gt;allocated[rw]--;</div><div class='ctx'> </div><div class='ctx'> 		/* Put down rq reference on cfqg */</div><div class='del'>-		cfq_put_cfqg(RQ_CFQG(rq));</div><div class='add'>+		cfqg_put(RQ_CFQG(rq));</div><div class='ctx'> 		rq-&gt;elv.priv[0] = NULL;</div><div class='ctx'> 		rq-&gt;elv.priv[1] = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -3465,32 +3794,25 @@ split_cfqq(struct cfq_io_cq *cic, struct cfq_queue *cfqq)</div><div class='ctx'>  * Allocate cfq data structures associated with this request.</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='del'>-cfq_set_request(struct request_queue *q, struct request *rq, gfp_t gfp_mask)</div><div class='add'>+cfq_set_request(struct request_queue *q, struct request *rq, struct bio *bio,</div><div class='add'>+		gfp_t gfp_mask)</div><div class='ctx'> {</div><div class='ctx'> 	struct cfq_data *cfqd = q-&gt;elevator-&gt;elevator_data;</div><div class='ctx'> 	struct cfq_io_cq *cic = icq_to_cic(rq-&gt;elv.icq);</div><div class='ctx'> 	const int rw = rq_data_dir(rq);</div><div class='ctx'> 	const bool is_sync = rq_is_sync(rq);</div><div class='ctx'> 	struct cfq_queue *cfqq;</div><div class='del'>-	unsigned int changed;</div><div class='ctx'> </div><div class='ctx'> 	might_sleep_if(gfp_mask &amp; __GFP_WAIT);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-	/* handle changed notifications */</div><div class='del'>-	changed = icq_get_changed(&amp;cic-&gt;icq);</div><div class='del'>-	if (unlikely(changed &amp; ICQ_IOPRIO_CHANGED))</div><div class='del'>-		changed_ioprio(cic);</div><div class='del'>-#ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='del'>-	if (unlikely(changed &amp; ICQ_CGROUP_CHANGED))</div><div class='del'>-		changed_cgroup(cic);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='add'>+	check_ioprio_changed(cic, bio);</div><div class='add'>+	check_blkcg_changed(cic, bio);</div><div class='ctx'> new_queue:</div><div class='ctx'> 	cfqq = cic_to_cfqq(cic, is_sync);</div><div class='ctx'> 	if (!cfqq || cfqq == &amp;cfqd-&gt;oom_cfqq) {</div><div class='del'>-		cfqq = cfq_get_queue(cfqd, is_sync, cic-&gt;icq.ioc, gfp_mask);</div><div class='add'>+		cfqq = cfq_get_queue(cfqd, is_sync, cic, bio, gfp_mask);</div><div class='ctx'> 		cic_set_cfqq(cic, cfqq, is_sync);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -3516,8 +3838,9 @@ new_queue:</div><div class='ctx'> 	cfqq-&gt;allocated[rw]++;</div><div class='ctx'> </div><div class='ctx'> 	cfqq-&gt;ref++;</div><div class='add'>+	cfqg_get(cfqq-&gt;cfqg);</div><div class='ctx'> 	rq-&gt;elv.priv[0] = cfqq;</div><div class='del'>-	rq-&gt;elv.priv[1] = cfq_ref_get_cfqg(cfqq-&gt;cfqg);</div><div class='add'>+	rq-&gt;elv.priv[1] = cfqq-&gt;cfqg;</div><div class='ctx'> 	spin_unlock_irq(q-&gt;queue_lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3614,7 +3937,6 @@ static void cfq_exit_queue(struct elevator_queue *e)</div><div class='ctx'> {</div><div class='ctx'> 	struct cfq_data *cfqd = e-&gt;elevator_data;</div><div class='ctx'> 	struct request_queue *q = cfqd-&gt;queue;</div><div class='del'>-	bool wait = false;</div><div class='ctx'> </div><div class='ctx'> 	cfq_shutdown_timer_wq(cfqd);</div><div class='ctx'> </div><div class='hunk'>@@ -3624,89 +3946,52 @@ static void cfq_exit_queue(struct elevator_queue *e)</div><div class='ctx'> 		__cfq_slice_expired(cfqd, cfqd-&gt;active_queue, 0);</div><div class='ctx'> </div><div class='ctx'> 	cfq_put_async_queues(cfqd);</div><div class='del'>-	cfq_release_cfq_groups(cfqd);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If there are groups which we could not unlink from blkcg list,</div><div class='del'>-	 * wait for a rcu period for them to be freed.</div><div class='del'>-	 */</div><div class='del'>-	if (cfqd-&gt;nr_blkcg_linked_grps)</div><div class='del'>-		wait = true;</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='ctx'> 	cfq_shutdown_timer_wq(cfqd);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Wait for cfqg-&gt;blkg-&gt;key accessors to exit their grace periods.</div><div class='del'>-	 * Do this wait only if there are other unlinked groups out</div><div class='del'>-	 * there. This can happen if cgroup deletion path claimed the</div><div class='del'>-	 * responsibility of cleaning up a group before queue cleanup code</div><div class='del'>-	 * get to the group.</div><div class='del'>-	 *</div><div class='del'>-	 * Do not call synchronize_rcu() unconditionally as there are drivers</div><div class='del'>-	 * which create/delete request queue hundreds of times during scan/boot</div><div class='del'>-	 * and synchronize_rcu() can take significant time and slow down boot.</div><div class='del'>-	 */</div><div class='del'>-	if (wait)</div><div class='del'>-		synchronize_rcu();</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='del'>-	/* Free up per cpu stats for root group */</div><div class='del'>-	free_percpu(cfqd-&gt;root_group.blkg.stats_cpu);</div><div class='add'>+#ifndef CONFIG_CFQ_GROUP_IOSCHED</div><div class='add'>+	kfree(cfqd-&gt;root_group);</div><div class='ctx'> #endif</div><div class='add'>+	blkcg_deactivate_policy(q, &amp;blkcg_policy_cfq);</div><div class='ctx'> 	kfree(cfqd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void *cfq_init_queue(struct request_queue *q)</div><div class='add'>+static int cfq_init_queue(struct request_queue *q)</div><div class='ctx'> {</div><div class='ctx'> 	struct cfq_data *cfqd;</div><div class='del'>-	int i, j;</div><div class='del'>-	struct cfq_group *cfqg;</div><div class='del'>-	struct cfq_rb_root *st;</div><div class='add'>+	struct blkcg_gq *blkg __maybe_unused;</div><div class='add'>+	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	cfqd = kmalloc_node(sizeof(*cfqd), GFP_KERNEL | __GFP_ZERO, q-&gt;node);</div><div class='ctx'> 	if (!cfqd)</div><div class='del'>-		return NULL;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cfqd-&gt;queue = q;</div><div class='add'>+	q-&gt;elevator-&gt;elevator_data = cfqd;</div><div class='ctx'> </div><div class='ctx'> 	/* Init root service tree */</div><div class='ctx'> 	cfqd-&gt;grp_service_tree = CFQ_RB_ROOT;</div><div class='ctx'> </div><div class='del'>-	/* Init root group */</div><div class='del'>-	cfqg = &amp;cfqd-&gt;root_group;</div><div class='del'>-	for_each_cfqg_st(cfqg, i, j, st)</div><div class='del'>-		*st = CFQ_RB_ROOT;</div><div class='del'>-	RB_CLEAR_NODE(&amp;cfqg-&gt;rb_node);</div><div class='del'>-</div><div class='del'>-	/* Give preference to root group over other groups */</div><div class='del'>-	cfqg-&gt;weight = 2*BLKIO_WEIGHT_DEFAULT;</div><div class='del'>-</div><div class='add'>+	/* Init root group and prefer root group over other groups by default */</div><div class='ctx'> #ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='del'>-	/*</div><div class='del'>-	 * Set root group reference to 2. One reference will be dropped when</div><div class='del'>-	 * all groups on cfqd-&gt;cfqg_list are being deleted during queue exit.</div><div class='del'>-	 * Other reference will remain there as we don't want to delete this</div><div class='del'>-	 * group as it is statically allocated and gets destroyed when</div><div class='del'>-	 * throtl_data goes away.</div><div class='del'>-	 */</div><div class='del'>-	cfqg-&gt;ref = 2;</div><div class='del'>-</div><div class='del'>-	if (blkio_alloc_blkg_stats(&amp;cfqg-&gt;blkg)) {</div><div class='del'>-		kfree(cfqg);</div><div class='del'>-		kfree(cfqd);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='add'>+	ret = blkcg_activate_policy(q, &amp;blkcg_policy_cfq);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free;</div><div class='ctx'> </div><div class='del'>-	cfq_blkiocg_add_blkio_group(&amp;blkio_root_cgroup, &amp;cfqg-&gt;blkg,</div><div class='del'>-					(void *)cfqd, 0);</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-	cfqd-&gt;nr_blkcg_linked_grps++;</div><div class='add'>+	cfqd-&gt;root_group = blkg_to_cfqg(q-&gt;root_blkg);</div><div class='add'>+#else</div><div class='add'>+	ret = -ENOMEM;</div><div class='add'>+	cfqd-&gt;root_group = kzalloc_node(sizeof(*cfqd-&gt;root_group),</div><div class='add'>+					GFP_KERNEL, cfqd-&gt;queue-&gt;node);</div><div class='add'>+	if (!cfqd-&gt;root_group)</div><div class='add'>+		goto out_free;</div><div class='ctx'> </div><div class='del'>-	/* Add group on cfqd-&gt;cfqg_list */</div><div class='del'>-	hlist_add_head(&amp;cfqg-&gt;cfqd_node, &amp;cfqd-&gt;cfqg_list);</div><div class='add'>+	cfq_init_cfqg_base(cfqd-&gt;root_group);</div><div class='ctx'> #endif</div><div class='add'>+	cfqd-&gt;root_group-&gt;weight = 2 * CFQ_WEIGHT_DEFAULT;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Not strictly needed (since RB_ROOT just clears the node and we</div><div class='ctx'> 	 * zeroed cfqd on alloc), but better be safe in case someone decides</div><div class='hunk'>@@ -3718,13 +4003,17 @@ static void *cfq_init_queue(struct request_queue *q)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Our fallback cfqq if cfq_find_alloc_queue() runs into OOM issues.</div><div class='ctx'> 	 * Grab a permanent reference to it, so that the normal code flow</div><div class='del'>-	 * will not attempt to free it.</div><div class='add'>+	 * will not attempt to free it.  oom_cfqq is linked to root_group</div><div class='add'>+	 * but shouldn't hold a reference as it'll never be unlinked.  Lose</div><div class='add'>+	 * the reference from linking right away.</div><div class='ctx'> 	 */</div><div class='ctx'> 	cfq_init_cfqq(cfqd, &amp;cfqd-&gt;oom_cfqq, 1, 0);</div><div class='ctx'> 	cfqd-&gt;oom_cfqq.ref++;</div><div class='del'>-	cfq_link_cfqq_cfqg(&amp;cfqd-&gt;oom_cfqq, &amp;cfqd-&gt;root_group);</div><div class='ctx'> </div><div class='del'>-	cfqd-&gt;queue = q;</div><div class='add'>+	spin_lock_irq(q-&gt;queue_lock);</div><div class='add'>+	cfq_link_cfqq_cfqg(&amp;cfqd-&gt;oom_cfqq, cfqd-&gt;root_group);</div><div class='add'>+	cfqg_put(cfqd-&gt;root_group);</div><div class='add'>+	spin_unlock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='ctx'> 	init_timer(&amp;cfqd-&gt;idle_slice_timer);</div><div class='ctx'> 	cfqd-&gt;idle_slice_timer.function = cfq_idle_slice_timer;</div><div class='hunk'>@@ -3750,7 +4039,11 @@ static void *cfq_init_queue(struct request_queue *q)</div><div class='ctx'> 	 * second, in order to have larger depth for async operations.</div><div class='ctx'> 	 */</div><div class='ctx'> 	cfqd-&gt;last_delayed_sync = jiffies - HZ;</div><div class='del'>-	return cfqd;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_free:</div><div class='add'>+	kfree(cfqd);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -3877,15 +4170,13 @@ static struct elevator_type iosched_cfq = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='del'>-static struct blkio_policy_type blkio_policy_cfq = {</div><div class='del'>-	.ops = {</div><div class='del'>-		.blkio_unlink_group_fn =	cfq_unlink_blkio_group,</div><div class='del'>-		.blkio_update_group_weight_fn =	cfq_update_blkio_group_weight,</div><div class='del'>-	},</div><div class='del'>-	.plid = BLKIO_POLICY_PROP,</div><div class='add'>+static struct blkcg_policy blkcg_policy_cfq = {</div><div class='add'>+	.pd_size		= sizeof(struct cfq_group),</div><div class='add'>+	.cftypes		= cfq_blkcg_files,</div><div class='add'>+</div><div class='add'>+	.pd_init_fn		= cfq_pd_init,</div><div class='add'>+	.pd_reset_stats_fn	= cfq_pd_reset_stats,</div><div class='ctx'> };</div><div class='del'>-#else</div><div class='del'>-static struct blkio_policy_type blkio_policy_cfq;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static int __init cfq_init(void)</div><div class='hunk'>@@ -3906,24 +4197,31 @@ static int __init cfq_init(void)</div><div class='ctx'> #else</div><div class='ctx'> 		cfq_group_idle = 0;</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+	ret = blkcg_policy_register(&amp;blkcg_policy_cfq);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	cfq_pool = KMEM_CACHE(cfq_queue, 0);</div><div class='ctx'> 	if (!cfq_pool)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		goto err_pol_unreg;</div><div class='ctx'> </div><div class='ctx'> 	ret = elv_register(&amp;iosched_cfq);</div><div class='del'>-	if (ret) {</div><div class='del'>-		kmem_cache_destroy(cfq_pool);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	blkio_policy_register(&amp;blkio_policy_cfq);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_pool;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_free_pool:</div><div class='add'>+	kmem_cache_destroy(cfq_pool);</div><div class='add'>+err_pol_unreg:</div><div class='add'>+	blkcg_policy_unregister(&amp;blkcg_policy_cfq);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit cfq_exit(void)</div><div class='ctx'> {</div><div class='del'>-	blkio_policy_unregister(&amp;blkio_policy_cfq);</div><div class='add'>+	blkcg_policy_unregister(&amp;blkcg_policy_cfq);</div><div class='ctx'> 	elv_unregister(&amp;iosched_cfq);</div><div class='ctx'> 	kmem_cache_destroy(cfq_pool);</div><div class='ctx'> }</div><div class='head'>diff --git a/block/cfq.h b/block/cfq.h<br/>deleted file mode 100644<br/>index 2a155927e37c..000000000000<br/>--- a/<a href='/drm-misc/tree/block/cfq.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/cfq.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,115 +0,0 @@</div><div class='del'>-#ifndef _CFQ_H</div><div class='del'>-#define _CFQ_H</div><div class='del'>-#include "blk-cgroup.h"</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CFQ_GROUP_IOSCHED</div><div class='del'>-static inline void cfq_blkiocg_update_io_add_stats(struct blkio_group *blkg,</div><div class='del'>-	struct blkio_group *curr_blkg, bool direction, bool sync)</div><div class='del'>-{</div><div class='del'>-	blkiocg_update_io_add_stats(blkg, curr_blkg, direction, sync);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_update_dequeue_stats(struct blkio_group *blkg,</div><div class='del'>-			unsigned long dequeue)</div><div class='del'>-{</div><div class='del'>-	blkiocg_update_dequeue_stats(blkg, dequeue);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_update_timeslice_used(struct blkio_group *blkg,</div><div class='del'>-			unsigned long time, unsigned long unaccounted_time)</div><div class='del'>-{</div><div class='del'>-	blkiocg_update_timeslice_used(blkg, time, unaccounted_time);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_set_start_empty_time(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	blkiocg_set_start_empty_time(blkg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_update_io_remove_stats(struct blkio_group *blkg,</div><div class='del'>-				bool direction, bool sync)</div><div class='del'>-{</div><div class='del'>-	blkiocg_update_io_remove_stats(blkg, direction, sync);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_update_io_merged_stats(struct blkio_group *blkg,</div><div class='del'>-		bool direction, bool sync)</div><div class='del'>-{</div><div class='del'>-	blkiocg_update_io_merged_stats(blkg, direction, sync);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_update_idle_time_stats(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	blkiocg_update_idle_time_stats(blkg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-cfq_blkiocg_update_avg_queue_size_stats(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	blkiocg_update_avg_queue_size_stats(blkg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-cfq_blkiocg_update_set_idle_time_stats(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	blkiocg_update_set_idle_time_stats(blkg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_update_dispatch_stats(struct blkio_group *blkg,</div><div class='del'>-				uint64_t bytes, bool direction, bool sync)</div><div class='del'>-{</div><div class='del'>-	blkiocg_update_dispatch_stats(blkg, bytes, direction, sync);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_update_completion_stats(struct blkio_group *blkg, uint64_t start_time, uint64_t io_start_time, bool direction, bool sync)</div><div class='del'>-{</div><div class='del'>-	blkiocg_update_completion_stats(blkg, start_time, io_start_time,</div><div class='del'>-				direction, sync);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_add_blkio_group(struct blkio_cgroup *blkcg,</div><div class='del'>-			struct blkio_group *blkg, void *key, dev_t dev) {</div><div class='del'>-	blkiocg_add_blkio_group(blkcg, blkg, key, dev, BLKIO_POLICY_PROP);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int cfq_blkiocg_del_blkio_group(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	return blkiocg_del_blkio_group(blkg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else /* CFQ_GROUP_IOSCHED */</div><div class='del'>-static inline void cfq_blkiocg_update_io_add_stats(struct blkio_group *blkg,</div><div class='del'>-	struct blkio_group *curr_blkg, bool direction, bool sync) {}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_update_dequeue_stats(struct blkio_group *blkg,</div><div class='del'>-			unsigned long dequeue) {}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_update_timeslice_used(struct blkio_group *blkg,</div><div class='del'>-			unsigned long time, unsigned long unaccounted_time) {}</div><div class='del'>-static inline void cfq_blkiocg_set_start_empty_time(struct blkio_group *blkg) {}</div><div class='del'>-static inline void cfq_blkiocg_update_io_remove_stats(struct blkio_group *blkg,</div><div class='del'>-				bool direction, bool sync) {}</div><div class='del'>-static inline void cfq_blkiocg_update_io_merged_stats(struct blkio_group *blkg,</div><div class='del'>-		bool direction, bool sync) {}</div><div class='del'>-static inline void cfq_blkiocg_update_idle_time_stats(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-static inline void</div><div class='del'>-cfq_blkiocg_update_avg_queue_size_stats(struct blkio_group *blkg) {}</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-cfq_blkiocg_update_set_idle_time_stats(struct blkio_group *blkg) {}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_update_dispatch_stats(struct blkio_group *blkg,</div><div class='del'>-				uint64_t bytes, bool direction, bool sync) {}</div><div class='del'>-static inline void cfq_blkiocg_update_completion_stats(struct blkio_group *blkg, uint64_t start_time, uint64_t io_start_time, bool direction, bool sync) {}</div><div class='del'>-</div><div class='del'>-static inline void cfq_blkiocg_add_blkio_group(struct blkio_cgroup *blkcg,</div><div class='del'>-			struct blkio_group *blkg, void *key, dev_t dev) {}</div><div class='del'>-static inline int cfq_blkiocg_del_blkio_group(struct blkio_group *blkg)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* CFQ_GROUP_IOSCHED */</div><div class='del'>-#endif</div><div class='head'>diff --git a/block/deadline-iosched.c b/block/deadline-iosched.c<br/>index 7bf12d793fcd..599b12e5380f 100644<br/>--- a/<a href='/drm-misc/tree/block/deadline-iosched.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/deadline-iosched.c</a><br/>+++ b/<a href='/drm-misc/tree/block/deadline-iosched.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/deadline-iosched.c</a></div><div class='hunk'>@@ -337,13 +337,13 @@ static void deadline_exit_queue(struct elevator_queue *e)</div><div class='ctx'> /*</div><div class='ctx'>  * initialize elevator private data (deadline_data).</div><div class='ctx'>  */</div><div class='del'>-static void *deadline_init_queue(struct request_queue *q)</div><div class='add'>+static int deadline_init_queue(struct request_queue *q)</div><div class='ctx'> {</div><div class='ctx'> 	struct deadline_data *dd;</div><div class='ctx'> </div><div class='ctx'> 	dd = kmalloc_node(sizeof(*dd), GFP_KERNEL | __GFP_ZERO, q-&gt;node);</div><div class='ctx'> 	if (!dd)</div><div class='del'>-		return NULL;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;dd-&gt;fifo_list[READ]);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;dd-&gt;fifo_list[WRITE]);</div><div class='hunk'>@@ -354,7 +354,9 @@ static void *deadline_init_queue(struct request_queue *q)</div><div class='ctx'> 	dd-&gt;writes_starved = writes_starved;</div><div class='ctx'> 	dd-&gt;front_merges = 1;</div><div class='ctx'> 	dd-&gt;fifo_batch = fifo_batch;</div><div class='del'>-	return dd;</div><div class='add'>+</div><div class='add'>+	q-&gt;elevator-&gt;elevator_data = dd;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/block/elevator.c b/block/elevator.c<br/>index f016855a46b0..6a55d418896f 100644<br/>--- a/<a href='/drm-misc/tree/block/elevator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/elevator.c</a><br/>+++ b/<a href='/drm-misc/tree/block/elevator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/elevator.c</a></div><div class='hunk'>@@ -38,6 +38,7 @@</div><div class='ctx'> #include &lt;trace/events/block.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "blk.h"</div><div class='add'>+#include "blk-cgroup.h"</div><div class='ctx'> </div><div class='ctx'> static DEFINE_SPINLOCK(elv_list_lock);</div><div class='ctx'> static LIST_HEAD(elv_list);</div><div class='hunk'>@@ -121,15 +122,6 @@ static struct elevator_type *elevator_get(const char *name)</div><div class='ctx'> 	return e;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int elevator_init_queue(struct request_queue *q,</div><div class='del'>-			       struct elevator_queue *eq)</div><div class='del'>-{</div><div class='del'>-	eq-&gt;elevator_data = eq-&gt;type-&gt;ops.elevator_init_fn(q);</div><div class='del'>-	if (eq-&gt;elevator_data)</div><div class='del'>-		return 0;</div><div class='del'>-	return -ENOMEM;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static char chosen_elevator[ELV_NAME_MAX];</div><div class='ctx'> </div><div class='ctx'> static int __init elevator_setup(char *str)</div><div class='hunk'>@@ -188,7 +180,6 @@ static void elevator_release(struct kobject *kobj)</div><div class='ctx'> int elevator_init(struct request_queue *q, char *name)</div><div class='ctx'> {</div><div class='ctx'> 	struct elevator_type *e = NULL;</div><div class='del'>-	struct elevator_queue *eq;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(q-&gt;elevator))</div><div class='hunk'>@@ -222,17 +213,16 @@ int elevator_init(struct request_queue *q, char *name)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	eq = elevator_alloc(q, e);</div><div class='del'>-	if (!eq)</div><div class='add'>+	q-&gt;elevator = elevator_alloc(q, e);</div><div class='add'>+	if (!q-&gt;elevator)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	err = elevator_init_queue(q, eq);</div><div class='add'>+	err = e-&gt;ops.elevator_init_fn(q);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		kobject_put(&amp;eq-&gt;kobj);</div><div class='add'>+		kobject_put(&amp;q-&gt;elevator-&gt;kobj);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	q-&gt;elevator = eq;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(elevator_init);</div><div class='hunk'>@@ -564,25 +554,6 @@ void elv_drain_elevator(struct request_queue *q)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void elv_quiesce_start(struct request_queue *q)</div><div class='del'>-{</div><div class='del'>-	if (!q-&gt;elevator)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(q-&gt;queue_lock);</div><div class='del'>-	queue_flag_set(QUEUE_FLAG_ELVSWITCH, q);</div><div class='del'>-	spin_unlock_irq(q-&gt;queue_lock);</div><div class='del'>-</div><div class='del'>-	blk_drain_queue(q, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void elv_quiesce_end(struct request_queue *q)</div><div class='del'>-{</div><div class='del'>-	spin_lock_irq(q-&gt;queue_lock);</div><div class='del'>-	queue_flag_clear(QUEUE_FLAG_ELVSWITCH, q);</div><div class='del'>-	spin_unlock_irq(q-&gt;queue_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __elv_add_request(struct request_queue *q, struct request *rq, int where)</div><div class='ctx'> {</div><div class='ctx'> 	trace_block_rq_insert(q, rq);</div><div class='hunk'>@@ -692,12 +663,13 @@ struct request *elv_former_request(struct request_queue *q, struct request *rq)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int elv_set_request(struct request_queue *q, struct request *rq, gfp_t gfp_mask)</div><div class='add'>+int elv_set_request(struct request_queue *q, struct request *rq,</div><div class='add'>+		    struct bio *bio, gfp_t gfp_mask)</div><div class='ctx'> {</div><div class='ctx'> 	struct elevator_queue *e = q-&gt;elevator;</div><div class='ctx'> </div><div class='ctx'> 	if (e-&gt;type-&gt;ops.elevator_set_req_fn)</div><div class='del'>-		return e-&gt;type-&gt;ops.elevator_set_req_fn(q, rq, gfp_mask);</div><div class='add'>+		return e-&gt;type-&gt;ops.elevator_set_req_fn(q, rq, bio, gfp_mask);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -801,8 +773,9 @@ static struct kobj_type elv_ktype = {</div><div class='ctx'> 	.release	= elevator_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int __elv_register_queue(struct request_queue *q, struct elevator_queue *e)</div><div class='add'>+int elv_register_queue(struct request_queue *q)</div><div class='ctx'> {</div><div class='add'>+	struct elevator_queue *e = q-&gt;elevator;</div><div class='ctx'> 	int error;</div><div class='ctx'> </div><div class='ctx'> 	error = kobject_add(&amp;e-&gt;kobj, &amp;q-&gt;kobj, "%s", "iosched");</div><div class='hunk'>@@ -820,11 +793,6 @@ int __elv_register_queue(struct request_queue *q, struct elevator_queue *e)</div><div class='ctx'> 	}</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-int elv_register_queue(struct request_queue *q)</div><div class='del'>-{</div><div class='del'>-	return __elv_register_queue(q, q-&gt;elevator);</div><div class='del'>-}</div><div class='ctx'> EXPORT_SYMBOL(elv_register_queue);</div><div class='ctx'> </div><div class='ctx'> void elv_unregister_queue(struct request_queue *q)</div><div class='hunk'>@@ -907,53 +875,60 @@ EXPORT_SYMBOL_GPL(elv_unregister);</div><div class='ctx'>  */</div><div class='ctx'> static int elevator_switch(struct request_queue *q, struct elevator_type *new_e)</div><div class='ctx'> {</div><div class='del'>-	struct elevator_queue *old_elevator, *e;</div><div class='add'>+	struct elevator_queue *old = q-&gt;elevator;</div><div class='add'>+	bool registered = old-&gt;registered;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* allocate new elevator */</div><div class='del'>-	e = elevator_alloc(q, new_e);</div><div class='del'>-	if (!e)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	/*</div><div class='add'>+	 * Turn on BYPASS and drain all requests w/ elevator private data.</div><div class='add'>+	 * Block layer doesn't call into a quiesced elevator - all requests</div><div class='add'>+	 * are directly put on the dispatch list without elevator data</div><div class='add'>+	 * using INSERT_BACK.  All requests have SOFTBARRIER set and no</div><div class='add'>+	 * merge happens either.</div><div class='add'>+	 */</div><div class='add'>+	blk_queue_bypass_start(q);</div><div class='add'>+</div><div class='add'>+	/* unregister and clear all auxiliary data of the old elevator */</div><div class='add'>+	if (registered)</div><div class='add'>+		elv_unregister_queue(q);</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(q-&gt;queue_lock);</div><div class='add'>+	ioc_clear_queue(q);</div><div class='add'>+	spin_unlock_irq(q-&gt;queue_lock);</div><div class='ctx'> </div><div class='del'>-	err = elevator_init_queue(q, e);</div><div class='add'>+	/* allocate, init and register new elevator */</div><div class='add'>+	err = -ENOMEM;</div><div class='add'>+	q-&gt;elevator = elevator_alloc(q, new_e);</div><div class='add'>+	if (!q-&gt;elevator)</div><div class='add'>+		goto fail_init;</div><div class='add'>+</div><div class='add'>+	err = new_e-&gt;ops.elevator_init_fn(q);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		kobject_put(&amp;e-&gt;kobj);</div><div class='del'>-		return err;</div><div class='add'>+		kobject_put(&amp;q-&gt;elevator-&gt;kobj);</div><div class='add'>+		goto fail_init;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* turn on BYPASS and drain all requests w/ elevator private data */</div><div class='del'>-	elv_quiesce_start(q);</div><div class='del'>-</div><div class='del'>-	/* unregister old queue, register new one and kill old elevator */</div><div class='del'>-	if (q-&gt;elevator-&gt;registered) {</div><div class='del'>-		elv_unregister_queue(q);</div><div class='del'>-		err = __elv_register_queue(q, e);</div><div class='add'>+	if (registered) {</div><div class='add'>+		err = elv_register_queue(q);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto fail_register;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* done, clear io_cq's, switch elevators and turn off BYPASS */</div><div class='del'>-	spin_lock_irq(q-&gt;queue_lock);</div><div class='del'>-	ioc_clear_queue(q);</div><div class='del'>-	old_elevator = q-&gt;elevator;</div><div class='del'>-	q-&gt;elevator = e;</div><div class='del'>-	spin_unlock_irq(q-&gt;queue_lock);</div><div class='del'>-</div><div class='del'>-	elevator_exit(old_elevator);</div><div class='del'>-	elv_quiesce_end(q);</div><div class='add'>+	/* done, kill the old one and finish */</div><div class='add'>+	elevator_exit(old);</div><div class='add'>+	blk_queue_bypass_end(q);</div><div class='ctx'> </div><div class='del'>-	blk_add_trace_msg(q, "elv switch: %s", e-&gt;type-&gt;elevator_name);</div><div class='add'>+	blk_add_trace_msg(q, "elv switch: %s", new_e-&gt;elevator_name);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> fail_register:</div><div class='del'>-	/*</div><div class='del'>-	 * switch failed, exit the new io scheduler and reattach the old</div><div class='del'>-	 * one again (along with re-adding the sysfs dir)</div><div class='del'>-	 */</div><div class='del'>-	elevator_exit(e);</div><div class='add'>+	elevator_exit(q-&gt;elevator);</div><div class='add'>+fail_init:</div><div class='add'>+	/* switch failed, restore and re-register old elevator */</div><div class='add'>+	q-&gt;elevator = old;</div><div class='ctx'> 	elv_register_queue(q);</div><div class='del'>-	elv_quiesce_end(q);</div><div class='add'>+	blk_queue_bypass_end(q);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='head'>diff --git a/block/genhd.c b/block/genhd.c<br/>index df9816ede75b..9cf5583c90ff 100644<br/>--- a/<a href='/drm-misc/tree/block/genhd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/genhd.c</a><br/>+++ b/<a href='/drm-misc/tree/block/genhd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/genhd.c</a></div><div class='hunk'>@@ -743,7 +743,7 @@ void __init printk_all_partitions(void)</div><div class='ctx'> 		struct hd_struct *part;</div><div class='ctx'> 		char name_buf[BDEVNAME_SIZE];</div><div class='ctx'> 		char devt_buf[BDEVT_SIZE];</div><div class='del'>-		u8 uuid[PARTITION_META_INFO_UUIDLTH * 2 + 1];</div><div class='add'>+		char uuid_buf[PARTITION_META_INFO_UUIDLTH * 2 + 5];</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Don't show empty devices or things that have been</div><div class='hunk'>@@ -762,14 +762,16 @@ void __init printk_all_partitions(void)</div><div class='ctx'> 		while ((part = disk_part_iter_next(&amp;piter))) {</div><div class='ctx'> 			bool is_part0 = part == &amp;disk-&gt;part0;</div><div class='ctx'> </div><div class='del'>-			uuid[0] = 0;</div><div class='add'>+			uuid_buf[0] = '\0';</div><div class='ctx'> 			if (part-&gt;info)</div><div class='del'>-				part_unpack_uuid(part-&gt;info-&gt;uuid, uuid);</div><div class='add'>+				snprintf(uuid_buf, sizeof(uuid_buf), "%pU",</div><div class='add'>+					 part-&gt;info-&gt;uuid);</div><div class='ctx'> </div><div class='ctx'> 			printk("%s%s %10llu %s %s", is_part0 ? "" : "  ",</div><div class='ctx'> 			       bdevt_str(part_devt(part), devt_buf),</div><div class='ctx'> 			       (unsigned long long)part-&gt;nr_sects &gt;&gt; 1,</div><div class='del'>-			       disk_name(disk, part-&gt;partno, name_buf), uuid);</div><div class='add'>+			       disk_name(disk, part-&gt;partno, name_buf),</div><div class='add'>+			       uuid_buf);</div><div class='ctx'> 			if (is_part0) {</div><div class='ctx'> 				if (disk-&gt;driverfs_dev != NULL &amp;&amp;</div><div class='ctx'> 				    disk-&gt;driverfs_dev-&gt;driver != NULL)</div><div class='head'>diff --git a/block/noop-iosched.c b/block/noop-iosched.c<br/>index 413a0b1d788c..5d1bf70e33d5 100644<br/>--- a/<a href='/drm-misc/tree/block/noop-iosched.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/noop-iosched.c</a><br/>+++ b/<a href='/drm-misc/tree/block/noop-iosched.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/noop-iosched.c</a></div><div class='hunk'>@@ -59,15 +59,17 @@ noop_latter_request(struct request_queue *q, struct request *rq)</div><div class='ctx'> 	return list_entry(rq-&gt;queuelist.next, struct request, queuelist);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void *noop_init_queue(struct request_queue *q)</div><div class='add'>+static int noop_init_queue(struct request_queue *q)</div><div class='ctx'> {</div><div class='ctx'> 	struct noop_data *nd;</div><div class='ctx'> </div><div class='ctx'> 	nd = kmalloc_node(sizeof(*nd), GFP_KERNEL, q-&gt;node);</div><div class='ctx'> 	if (!nd)</div><div class='del'>-		return NULL;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;nd-&gt;queue);</div><div class='del'>-	return nd;</div><div class='add'>+	q-&gt;elevator-&gt;elevator_data = nd;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noop_exit_queue(struct elevator_queue *e)</div><div class='head'>diff --git a/block/partitions/ibm.c b/block/partitions/ibm.c<br/>index d513a07f44bb..1104acac780b 100644<br/>--- a/<a href='/drm-misc/tree/block/partitions/ibm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>block/partitions/ibm.c</a><br/>+++ b/<a href='/drm-misc/tree/block/partitions/ibm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>block/partitions/ibm.c</a></div><div class='hunk'>@@ -253,7 +253,7 @@ int ibm_partition(struct parsed_partitions *state)</div><div class='ctx'> 				/* Are we not supposed to report this ? */</div><div class='ctx'> 				goto out_readerr;</div><div class='ctx'> 		} else</div><div class='del'>-			printk(KERN_WARNING "Warning, expected Label VOL1 not "</div><div class='add'>+			printk(KERN_INFO "Expected Label VOL1 not "</div><div class='ctx'> 			       "found, treating as CDL formated Disk");</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='head'>diff --git a/crypto/ablkcipher.c b/crypto/ablkcipher.c<br/>index 8d3a056ebeea..533de9550a82 100644<br/>--- a/<a href='/drm-misc/tree/crypto/ablkcipher.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>crypto/ablkcipher.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/ablkcipher.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/ablkcipher.c</a></div><div class='hunk'>@@ -397,9 +397,9 @@ static int crypto_ablkcipher_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> 	rblkcipher.max_keysize = alg-&gt;cra_ablkcipher.max_keysize;</div><div class='ctx'> 	rblkcipher.ivsize = alg-&gt;cra_ablkcipher.ivsize;</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, CRYPTOCFGA_REPORT_BLKCIPHER,</div><div class='del'>-		sizeof(struct crypto_report_blkcipher), &amp;rblkcipher);</div><div class='del'>-</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_BLKCIPHER,</div><div class='add'>+		    sizeof(struct crypto_report_blkcipher), &amp;rblkcipher))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='hunk'>@@ -478,9 +478,9 @@ static int crypto_givcipher_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> 	rblkcipher.max_keysize = alg-&gt;cra_ablkcipher.max_keysize;</div><div class='ctx'> 	rblkcipher.ivsize = alg-&gt;cra_ablkcipher.ivsize;</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, CRYPTOCFGA_REPORT_BLKCIPHER,</div><div class='del'>-		sizeof(struct crypto_report_blkcipher), &amp;rblkcipher);</div><div class='del'>-</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_BLKCIPHER,</div><div class='add'>+		    sizeof(struct crypto_report_blkcipher), &amp;rblkcipher))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='head'>diff --git a/crypto/aead.c b/crypto/aead.c<br/>index e4cb35159be4..0b8121ebec07 100644<br/>--- a/<a href='/drm-misc/tree/crypto/aead.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>crypto/aead.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/aead.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/aead.c</a></div><div class='hunk'>@@ -125,9 +125,9 @@ static int crypto_aead_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> 	raead.maxauthsize = aead-&gt;maxauthsize;</div><div class='ctx'> 	raead.ivsize = aead-&gt;ivsize;</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, CRYPTOCFGA_REPORT_AEAD,</div><div class='del'>-		sizeof(struct crypto_report_aead), &amp;raead);</div><div class='del'>-</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_AEAD,</div><div class='add'>+		    sizeof(struct crypto_report_aead), &amp;raead))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='hunk'>@@ -210,9 +210,9 @@ static int crypto_nivaead_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> 	raead.maxauthsize = aead-&gt;maxauthsize;</div><div class='ctx'> 	raead.ivsize = aead-&gt;ivsize;</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, CRYPTOCFGA_REPORT_AEAD,</div><div class='del'>-		sizeof(struct crypto_report_aead), &amp;raead);</div><div class='del'>-</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_AEAD,</div><div class='add'>+		    sizeof(struct crypto_report_aead), &amp;raead))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='head'>diff --git a/crypto/ahash.c b/crypto/ahash.c<br/>index 33bc9b62e9ae..3887856c2dd6 100644<br/>--- a/<a href='/drm-misc/tree/crypto/ahash.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>crypto/ahash.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/ahash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/ahash.c</a></div><div class='hunk'>@@ -409,9 +409,9 @@ static int crypto_ahash_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> 	rhash.blocksize = alg-&gt;cra_blocksize;</div><div class='ctx'> 	rhash.digestsize = __crypto_hash_alg_common(alg)-&gt;digestsize;</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, CRYPTOCFGA_REPORT_HASH,</div><div class='del'>-		sizeof(struct crypto_report_hash), &amp;rhash);</div><div class='del'>-</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_HASH,</div><div class='add'>+		    sizeof(struct crypto_report_hash), &amp;rhash))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='head'>diff --git a/crypto/blkcipher.c b/crypto/blkcipher.c<br/>index 4dd80c725498..a8d85a1d670e 100644<br/>--- a/<a href='/drm-misc/tree/crypto/blkcipher.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>crypto/blkcipher.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/blkcipher.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/blkcipher.c</a></div><div class='hunk'>@@ -508,9 +508,9 @@ static int crypto_blkcipher_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> 	rblkcipher.max_keysize = alg-&gt;cra_blkcipher.max_keysize;</div><div class='ctx'> 	rblkcipher.ivsize = alg-&gt;cra_blkcipher.ivsize;</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, CRYPTOCFGA_REPORT_BLKCIPHER,</div><div class='del'>-		sizeof(struct crypto_report_blkcipher), &amp;rblkcipher);</div><div class='del'>-</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_BLKCIPHER,</div><div class='add'>+		    sizeof(struct crypto_report_blkcipher), &amp;rblkcipher))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='head'>diff --git a/crypto/crypto_user.c b/crypto/crypto_user.c<br/>index f1ea0a064135..5a37eadb4e56 100644<br/>--- a/<a href='/drm-misc/tree/crypto/crypto_user.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>crypto/crypto_user.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/crypto_user.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/crypto_user.c</a></div><div class='hunk'>@@ -81,9 +81,9 @@ static int crypto_report_cipher(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> 	rcipher.min_keysize = alg-&gt;cra_cipher.cia_min_keysize;</div><div class='ctx'> 	rcipher.max_keysize = alg-&gt;cra_cipher.cia_max_keysize;</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, CRYPTOCFGA_REPORT_CIPHER,</div><div class='del'>-		sizeof(struct crypto_report_cipher), &amp;rcipher);</div><div class='del'>-</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_CIPHER,</div><div class='add'>+		    sizeof(struct crypto_report_cipher), &amp;rcipher))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='hunk'>@@ -96,9 +96,9 @@ static int crypto_report_comp(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> </div><div class='ctx'> 	snprintf(rcomp.type, CRYPTO_MAX_ALG_NAME, "%s", "compression");</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, CRYPTOCFGA_REPORT_COMPRESS,</div><div class='del'>-		sizeof(struct crypto_report_comp), &amp;rcomp);</div><div class='del'>-</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_COMPRESS,</div><div class='add'>+		    sizeof(struct crypto_report_comp), &amp;rcomp))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='hunk'>@@ -117,16 +117,16 @@ static int crypto_report_one(struct crypto_alg *alg,</div><div class='ctx'> 	ualg-&gt;cru_flags = alg-&gt;cra_flags;</div><div class='ctx'> 	ualg-&gt;cru_refcnt = atomic_read(&amp;alg-&gt;cra_refcnt);</div><div class='ctx'> </div><div class='del'>-	NLA_PUT_U32(skb, CRYPTOCFGA_PRIORITY_VAL, alg-&gt;cra_priority);</div><div class='del'>-</div><div class='add'>+	if (nla_put_u32(skb, CRYPTOCFGA_PRIORITY_VAL, alg-&gt;cra_priority))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	if (alg-&gt;cra_flags &amp; CRYPTO_ALG_LARVAL) {</div><div class='ctx'> 		struct crypto_report_larval rl;</div><div class='ctx'> </div><div class='ctx'> 		snprintf(rl.type, CRYPTO_MAX_ALG_NAME, "%s", "larval");</div><div class='ctx'> </div><div class='del'>-		NLA_PUT(skb, CRYPTOCFGA_REPORT_LARVAL,</div><div class='del'>-			sizeof(struct crypto_report_larval), &amp;rl);</div><div class='del'>-</div><div class='add'>+		if (nla_put(skb, CRYPTOCFGA_REPORT_LARVAL,</div><div class='add'>+			    sizeof(struct crypto_report_larval), &amp;rl))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/pcompress.c b/crypto/pcompress.c<br/>index 2e458e5482d0..04e083ff5373 100644<br/>--- a/<a href='/drm-misc/tree/crypto/pcompress.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>crypto/pcompress.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/pcompress.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/pcompress.c</a></div><div class='hunk'>@@ -55,9 +55,9 @@ static int crypto_pcomp_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> </div><div class='ctx'> 	snprintf(rpcomp.type, CRYPTO_MAX_ALG_NAME, "%s", "pcomp");</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, CRYPTOCFGA_REPORT_COMPRESS,</div><div class='del'>-		sizeof(struct crypto_report_comp), &amp;rpcomp);</div><div class='del'>-</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_COMPRESS,</div><div class='add'>+		    sizeof(struct crypto_report_comp), &amp;rpcomp))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='head'>diff --git a/crypto/rng.c b/crypto/rng.c<br/>index 64f864fa8043..f3b7894dec00 100644<br/>--- a/<a href='/drm-misc/tree/crypto/rng.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>crypto/rng.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/rng.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/rng.c</a></div><div class='hunk'>@@ -69,9 +69,9 @@ static int crypto_rng_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> </div><div class='ctx'> 	rrng.seedsize = alg-&gt;cra_rng.seedsize;</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, CRYPTOCFGA_REPORT_RNG,</div><div class='del'>-		sizeof(struct crypto_report_rng), &amp;rrng);</div><div class='del'>-</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_RNG,</div><div class='add'>+		    sizeof(struct crypto_report_rng), &amp;rrng))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='head'>diff --git a/crypto/shash.c b/crypto/shash.c<br/>index 21fc12e2378f..32067f47e6c7 100644<br/>--- a/<a href='/drm-misc/tree/crypto/shash.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>crypto/shash.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/shash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/shash.c</a></div><div class='hunk'>@@ -534,9 +534,9 @@ static int crypto_shash_report(struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> 	rhash.blocksize = alg-&gt;cra_blocksize;</div><div class='ctx'> 	rhash.digestsize = salg-&gt;digestsize;</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, CRYPTOCFGA_REPORT_HASH,</div><div class='del'>-		sizeof(struct crypto_report_hash), &amp;rhash);</div><div class='del'>-</div><div class='add'>+	if (nla_put(skb, CRYPTOCFGA_REPORT_HASH,</div><div class='add'>+		    sizeof(struct crypto_report_hash), &amp;rhash))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='head'>diff --git a/crypto/xor.c b/crypto/xor.c<br/>index b75182d8ab14..65c7b416b4a3 100644<br/>--- a/<a href='/drm-misc/tree/crypto/xor.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>crypto/xor.c</a><br/>+++ b/<a href='/drm-misc/tree/crypto/xor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>crypto/xor.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/raid/xor.h&gt;</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/preempt.h&gt;</div><div class='ctx'> #include &lt;asm/xor.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* The xor routines to use.  */</div><div class='hunk'>@@ -63,12 +64,14 @@ static void</div><div class='ctx'> do_xor_speed(struct xor_block_template *tmpl, void *b1, void *b2)</div><div class='ctx'> {</div><div class='ctx'> 	int speed;</div><div class='del'>-	unsigned long now;</div><div class='add'>+	unsigned long now, j;</div><div class='ctx'> 	int i, count, max;</div><div class='ctx'> </div><div class='ctx'> 	tmpl-&gt;next = template_list;</div><div class='ctx'> 	template_list = tmpl;</div><div class='ctx'> </div><div class='add'>+	preempt_disable();</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Count the number of XORs done during a whole jiffy, and use</div><div class='ctx'> 	 * this to calculate the speed of checksumming.  We use a 2-page</div><div class='hunk'>@@ -76,9 +79,11 @@ do_xor_speed(struct xor_block_template *tmpl, void *b1, void *b2)</div><div class='ctx'> 	 */</div><div class='ctx'> 	max = 0;</div><div class='ctx'> 	for (i = 0; i &lt; 5; i++) {</div><div class='del'>-		now = jiffies;</div><div class='add'>+		j = jiffies;</div><div class='ctx'> 		count = 0;</div><div class='del'>-		while (jiffies == now) {</div><div class='add'>+		while ((now = jiffies) == j)</div><div class='add'>+			cpu_relax();</div><div class='add'>+		while (time_before(jiffies, now + 1)) {</div><div class='ctx'> 			mb(); /* prevent loop optimzation */</div><div class='ctx'> 			tmpl-&gt;do_2(BENCH_SIZE, b1, b2);</div><div class='ctx'> 			mb();</div><div class='hunk'>@@ -89,6 +94,8 @@ do_xor_speed(struct xor_block_template *tmpl, void *b1, void *b2)</div><div class='ctx'> 			max = count;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	preempt_enable();</div><div class='add'>+</div><div class='ctx'> 	speed = max * (HZ * BENCH_SIZE / 1024);</div><div class='ctx'> 	tmpl-&gt;speed = speed;</div><div class='ctx'> </div><div class='hunk'>@@ -129,9 +136,9 @@ calibrate_xor_blocks(void)</div><div class='ctx'> </div><div class='ctx'> 	if (fastest) {</div><div class='ctx'> 		printk(KERN_INFO "xor: automatically using best "</div><div class='del'>-			"checksumming function: %s\n",</div><div class='del'>-			fastest-&gt;name);</div><div class='add'>+				 "checksumming function:\n");</div><div class='ctx'> 		xor_speed(fastest);</div><div class='add'>+		goto out;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		printk(KERN_INFO "xor: measuring software checksum speed\n");</div><div class='ctx'> 		XOR_TRY_TEMPLATES;</div><div class='hunk'>@@ -146,6 +153,7 @@ calibrate_xor_blocks(void)</div><div class='ctx'> </div><div class='ctx'> #undef xor_speed</div><div class='ctx'> </div><div class='add'>+ out:</div><div class='ctx'> 	free_pages((unsigned long)b1, 2);</div><div class='ctx'> </div><div class='ctx'> 	active_template = fastest;</div><div class='head'>diff --git a/drivers/Kconfig b/drivers/Kconfig<br/>index d236aef7e59f..bfc918633fd9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/Kconfig</a></div><div class='hunk'>@@ -140,4 +140,12 @@ source "drivers/virt/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/devfreq/Kconfig"</div><div class='ctx'> </div><div class='add'>+source "drivers/extcon/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/memory/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/iio/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/vme/Kconfig"</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/drivers/Makefile b/drivers/Makefile<br/>index 95952c82bf16..2ba29ffef2cb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/Makefile</a></div><div class='hunk'>@@ -18,7 +18,7 @@ obj-$(CONFIG_SFI)		+= sfi/</div><div class='ctx'> # PnP must come after ACPI since it will eventually need to check if acpi</div><div class='ctx'> # was used and do nothing if so</div><div class='ctx'> obj-$(CONFIG_PNP)		+= pnp/</div><div class='del'>-obj-$(CONFIG_ARM_AMBA)		+= amba/</div><div class='add'>+obj-y				+= amba/</div><div class='ctx'> # Many drivers will want to use DMA so this has to be made available</div><div class='ctx'> # really early.</div><div class='ctx'> obj-$(CONFIG_DMA_ENGINE)	+= dma/</div><div class='hunk'>@@ -92,7 +92,6 @@ obj-$(CONFIG_BT)		+= bluetooth/</div><div class='ctx'> obj-$(CONFIG_ACCESSIBILITY)	+= accessibility/</div><div class='ctx'> obj-$(CONFIG_ISDN)		+= isdn/</div><div class='ctx'> obj-$(CONFIG_EDAC)		+= edac/</div><div class='del'>-obj-$(CONFIG_MCA)		+= mca/</div><div class='ctx'> obj-$(CONFIG_EISA)		+= eisa/</div><div class='ctx'> obj-y				+= lguest/</div><div class='ctx'> obj-$(CONFIG_CPU_FREQ)		+= cpufreq/</div><div class='hunk'>@@ -134,3 +133,7 @@ obj-$(CONFIG_VIRT_DRIVERS)	+= virt/</div><div class='ctx'> obj-$(CONFIG_HYPERV)		+= hv/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PM_DEVFREQ)	+= devfreq/</div><div class='add'>+obj-$(CONFIG_EXTCON)		+= extcon/</div><div class='add'>+obj-$(CONFIG_MEMORY)		+= memory/</div><div class='add'>+obj-$(CONFIG_IIO)		+= iio/</div><div class='add'>+obj-$(CONFIG_VME_BUS)		+= vme/</div><div class='head'>diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig<br/>index 47768ff87343..80998958cf45 100644<br/>--- a/<a href='/drm-misc/tree/drivers/acpi/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/acpi/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/acpi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/Kconfig</a></div><div class='hunk'>@@ -208,7 +208,7 @@ config ACPI_IPMI</div><div class='ctx'> </div><div class='ctx'> config ACPI_HOTPLUG_CPU</div><div class='ctx'> 	bool</div><div class='del'>-	depends on ACPI_PROCESSOR &amp;&amp; HOTPLUG_CPU</div><div class='add'>+	depends on EXPERIMENTAL &amp;&amp; ACPI_PROCESSOR &amp;&amp; HOTPLUG_CPU</div><div class='ctx'> 	select ACPI_CONTAINER</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c<br/>index 86933ca8b472..7dd3f9fb9f3f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/acpi/battery.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/acpi/battery.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/acpi/battery.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/battery.c</a></div><div class='hunk'>@@ -643,11 +643,19 @@ static int acpi_battery_update(struct acpi_battery *battery)</div><div class='ctx'> </div><div class='ctx'> static void acpi_battery_refresh(struct acpi_battery *battery)</div><div class='ctx'> {</div><div class='add'>+	int power_unit;</div><div class='add'>+</div><div class='ctx'> 	if (!battery-&gt;bat.dev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	power_unit = battery-&gt;power_unit;</div><div class='add'>+</div><div class='ctx'> 	acpi_battery_get_info(battery);</div><div class='del'>-	/* The battery may have changed its reporting units. */</div><div class='add'>+</div><div class='add'>+	if (power_unit == battery-&gt;power_unit)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* The battery has changed its reporting units. */</div><div class='ctx'> 	sysfs_remove_battery(battery);</div><div class='ctx'> 	sysfs_add_battery(battery);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/acpi/bgrt.c b/drivers/acpi/bgrt.c<br/>index 8cf6c46e99fb..6680df36b963 100644<br/>--- a/<a href='/drm-misc/tree/drivers/acpi/bgrt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/acpi/bgrt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/acpi/bgrt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/bgrt.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/sysfs.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;acpi/acpi.h&gt;</div><div class='ctx'> #include &lt;acpi/acpi_bus.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c<br/>index 3263b68cdfa3..adceafda9c17 100644<br/>--- a/<a href='/drm-misc/tree/drivers/acpi/bus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/acpi/bus.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/acpi/bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/bus.c</a></div><div class='hunk'>@@ -182,41 +182,66 @@ EXPORT_SYMBOL(acpi_bus_get_private_data);</div><div class='ctx'>                                  Power Management</div><div class='ctx'>    -------------------------------------------------------------------------- */</div><div class='ctx'> </div><div class='add'>+static const char *state_string(int state)</div><div class='add'>+{</div><div class='add'>+	switch (state) {</div><div class='add'>+	case ACPI_STATE_D0:</div><div class='add'>+		return "D0";</div><div class='add'>+	case ACPI_STATE_D1:</div><div class='add'>+		return "D1";</div><div class='add'>+	case ACPI_STATE_D2:</div><div class='add'>+		return "D2";</div><div class='add'>+	case ACPI_STATE_D3_HOT:</div><div class='add'>+		return "D3hot";</div><div class='add'>+	case ACPI_STATE_D3_COLD:</div><div class='add'>+		return "D3";</div><div class='add'>+	default:</div><div class='add'>+		return "(unknown)";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __acpi_bus_get_power(struct acpi_device *device, int *state)</div><div class='ctx'> {</div><div class='del'>-	int result = 0;</div><div class='del'>-	acpi_status status = 0;</div><div class='del'>-	unsigned long long psc = 0;</div><div class='add'>+	int result = ACPI_STATE_UNKNOWN;</div><div class='ctx'> </div><div class='ctx'> 	if (!device || !state)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	*state = ACPI_STATE_UNKNOWN;</div><div class='del'>-</div><div class='del'>-	if (device-&gt;flags.power_manageable) {</div><div class='del'>-		/*</div><div class='del'>-		 * Get the device's power state either directly (via _PSC) or</div><div class='del'>-		 * indirectly (via power resources).</div><div class='del'>-		 */</div><div class='del'>-		if (device-&gt;power.flags.power_resources) {</div><div class='del'>-			result = acpi_power_get_inferred_state(device, state);</div><div class='del'>-			if (result)</div><div class='del'>-				return result;</div><div class='del'>-		} else if (device-&gt;power.flags.explicit_get) {</div><div class='del'>-			status = acpi_evaluate_integer(device-&gt;handle, "_PSC",</div><div class='del'>-						       NULL, &amp;psc);</div><div class='del'>-			if (ACPI_FAILURE(status))</div><div class='del'>-				return -ENODEV;</div><div class='del'>-			*state = (int)psc;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='add'>+	if (!device-&gt;flags.power_manageable) {</div><div class='ctx'> 		/* TBD: Non-recursive algorithm for walking up hierarchy. */</div><div class='ctx'> 		*state = device-&gt;parent ?</div><div class='ctx'> 			device-&gt;parent-&gt;power.state : ACPI_STATE_D0;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Get the device's power state either directly (via _PSC) or</div><div class='add'>+	 * indirectly (via power resources).</div><div class='add'>+	 */</div><div class='add'>+	if (device-&gt;power.flags.explicit_get) {</div><div class='add'>+		unsigned long long psc;</div><div class='add'>+		acpi_status status = acpi_evaluate_integer(device-&gt;handle,</div><div class='add'>+							   "_PSC", NULL, &amp;psc);</div><div class='add'>+		if (ACPI_FAILURE(status))</div><div class='add'>+			return -ENODEV;</div><div class='add'>+</div><div class='add'>+		result = psc;</div><div class='ctx'> 	}</div><div class='add'>+	/* The test below covers ACPI_STATE_UNKNOWN too. */</div><div class='add'>+	if (result &lt;= ACPI_STATE_D2) {</div><div class='add'>+	  ; /* Do nothing. */</div><div class='add'>+	} else if (device-&gt;power.flags.power_resources) {</div><div class='add'>+		int error = acpi_power_get_inferred_state(device, &amp;result);</div><div class='add'>+		if (error)</div><div class='add'>+			return error;</div><div class='add'>+	} else if (result == ACPI_STATE_D3_HOT) {</div><div class='add'>+		result = ACPI_STATE_D3;</div><div class='add'>+	}</div><div class='add'>+	*state = result;</div><div class='ctx'> </div><div class='del'>-	ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Device [%s] power state is D%d\n",</div><div class='del'>-			  device-&gt;pnp.bus_id, *state));</div><div class='add'>+ out:</div><div class='add'>+	ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Device [%s] power state is %s\n",</div><div class='add'>+			  device-&gt;pnp.bus_id, state_string(*state)));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -234,13 +259,14 @@ static int __acpi_bus_set_power(struct acpi_device *device, int state)</div><div class='ctx'> 	/* Make sure this is a valid target state */</div><div class='ctx'> </div><div class='ctx'> 	if (state == device-&gt;power.state) {</div><div class='del'>-		ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Device is already at D%d\n",</div><div class='del'>-				  state));</div><div class='add'>+		ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Device is already at %s\n",</div><div class='add'>+				  state_string(state)));</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!device-&gt;power.states[state].flags.valid) {</div><div class='del'>-		printk(KERN_WARNING PREFIX "Device does not support D%d\n", state);</div><div class='add'>+		printk(KERN_WARNING PREFIX "Device does not support %s\n",</div><div class='add'>+		       state_string(state));</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (device-&gt;parent &amp;&amp; (state &lt; device-&gt;parent-&gt;power.state)) {</div><div class='hunk'>@@ -250,6 +276,10 @@ static int __acpi_bus_set_power(struct acpi_device *device, int state)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* For D3cold we should execute _PS3, not _PS4. */</div><div class='add'>+	if (state == ACPI_STATE_D3_COLD)</div><div class='add'>+		object_name[3] = '3';</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Transition Power</div><div class='ctx'> 	 * ----------------</div><div class='hunk'>@@ -290,13 +320,13 @@ static int __acpi_bus_set_power(struct acpi_device *device, int state)</div><div class='ctx'>       end:</div><div class='ctx'> 	if (result)</div><div class='ctx'> 		printk(KERN_WARNING PREFIX</div><div class='del'>-			      "Device [%s] failed to transition to D%d\n",</div><div class='del'>-			      device-&gt;pnp.bus_id, state);</div><div class='add'>+			      "Device [%s] failed to transition to %s\n",</div><div class='add'>+			      device-&gt;pnp.bus_id, state_string(state));</div><div class='ctx'> 	else {</div><div class='ctx'> 		device-&gt;power.state = state;</div><div class='ctx'> 		ACPI_DEBUG_PRINT((ACPI_DB_INFO,</div><div class='del'>-				  "Device [%s] transitioned to D%d\n",</div><div class='del'>-				  device-&gt;pnp.bus_id, state));</div><div class='add'>+				  "Device [%s] transitioned to %s\n",</div><div class='add'>+				  device-&gt;pnp.bus_id, state_string(state)));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return result;</div><div class='head'>diff --git a/drivers/acpi/glue.c b/drivers/acpi/glue.c<br/>index 29a4a5c8ee00..1564e0927c21 100644<br/>--- a/<a href='/drm-misc/tree/drivers/acpi/glue.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/acpi/glue.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/acpi/glue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/glue.c</a></div><div class='hunk'>@@ -69,6 +69,7 @@ static struct acpi_bus_type *acpi_get_bus_type(struct bus_type *type)</div><div class='ctx'> 	up_read(&amp;bus_type_sem);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(register_acpi_bus_type);</div><div class='ctx'> </div><div class='ctx'> static int acpi_find_bridge_device(struct device *dev, acpi_handle * handle)</div><div class='ctx'> {</div><div class='hunk'>@@ -85,6 +86,7 @@ static int acpi_find_bridge_device(struct device *dev, acpi_handle * handle)</div><div class='ctx'> 	up_read(&amp;bus_type_sem);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(unregister_acpi_bus_type);</div><div class='ctx'> </div><div class='ctx'> /* Get device's handler per its address under its parent */</div><div class='ctx'> struct acpi_find_child {</div><div class='head'>diff --git a/drivers/acpi/pci_link.c b/drivers/acpi/pci_link.c<br/>index 4a29763b8eb4..a12808259dfb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/acpi/pci_link.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/acpi/pci_link.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/acpi/pci_link.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/pci_link.c</a></div><div class='hunk'>@@ -720,21 +720,21 @@ static int acpi_pci_link_add(struct acpi_device *device)</div><div class='ctx'> 	       acpi_device_bid(device));</div><div class='ctx'> 	for (i = 0; i &lt; link-&gt;irq.possible_count; i++) {</div><div class='ctx'> 		if (link-&gt;irq.active == link-&gt;irq.possible[i]) {</div><div class='del'>-			printk(" *%d", link-&gt;irq.possible[i]);</div><div class='add'>+			printk(KERN_CONT " *%d", link-&gt;irq.possible[i]);</div><div class='ctx'> 			found = 1;</div><div class='ctx'> 		} else</div><div class='del'>-			printk(" %d", link-&gt;irq.possible[i]);</div><div class='add'>+			printk(KERN_CONT " %d", link-&gt;irq.possible[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	printk(")");</div><div class='add'>+	printk(KERN_CONT ")");</div><div class='ctx'> </div><div class='ctx'> 	if (!found)</div><div class='del'>-		printk(" *%d", link-&gt;irq.active);</div><div class='add'>+		printk(KERN_CONT " *%d", link-&gt;irq.active);</div><div class='ctx'> </div><div class='ctx'> 	if (!link-&gt;device-&gt;status.enabled)</div><div class='del'>-		printk(", disabled.");</div><div class='add'>+		printk(KERN_CONT ", disabled.");</div><div class='ctx'> </div><div class='del'>-	printk("\n");</div><div class='add'>+	printk(KERN_CONT "\n");</div><div class='ctx'> </div><div class='ctx'> 	list_add_tail(&amp;link-&gt;list, &amp;acpi_link_list);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/power.c b/drivers/acpi/power.c<br/>index 7049a7d27c4f..dd6d6a3c6780 100644<br/>--- a/<a href='/drm-misc/tree/drivers/acpi/power.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/acpi/power.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/acpi/power.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/power.c</a></div><div class='hunk'>@@ -631,7 +631,7 @@ int acpi_power_get_inferred_state(struct acpi_device *device, int *state)</div><div class='ctx'> 	 * We know a device's inferred power state when all the resources</div><div class='ctx'> 	 * required for a given D-state are 'on'.</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = ACPI_STATE_D0; i &lt; ACPI_STATE_D3; i++) {</div><div class='add'>+	for (i = ACPI_STATE_D0; i &lt;= ACPI_STATE_D3_HOT; i++) {</div><div class='ctx'> 		list = &amp;device-&gt;power.states[i].resources;</div><div class='ctx'> 		if (list-&gt;count &lt; 1)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -660,7 +660,7 @@ int acpi_power_on_resources(struct acpi_device *device, int state)</div><div class='ctx'> </div><div class='ctx'> int acpi_power_transition(struct acpi_device *device, int state)</div><div class='ctx'> {</div><div class='del'>-	int result;</div><div class='add'>+	int result = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!device || (state &lt; ACPI_STATE_D0) || (state &gt; ACPI_STATE_D3_COLD))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -679,8 +679,11 @@ int acpi_power_transition(struct acpi_device *device, int state)</div><div class='ctx'> 	 * (e.g. so the device doesn't lose power while transitioning).  Then,</div><div class='ctx'> 	 * we dereference all power resources used in the current list.</div><div class='ctx'> 	 */</div><div class='del'>-	result = acpi_power_on_list(&amp;device-&gt;power.states[state].resources);</div><div class='del'>-	if (!result)</div><div class='add'>+	if (state &lt; ACPI_STATE_D3_COLD)</div><div class='add'>+		result = acpi_power_on_list(</div><div class='add'>+			&amp;device-&gt;power.states[state].resources);</div><div class='add'>+</div><div class='add'>+	if (!result &amp;&amp; device-&gt;power.state &lt; ACPI_STATE_D3_COLD)</div><div class='ctx'> 		acpi_power_off_list(</div><div class='ctx'> 			&amp;device-&gt;power.states[device-&gt;power.state].resources);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c<br/>index 0af48a8554cd..a093dc163a42 100644<br/>--- a/<a href='/drm-misc/tree/drivers/acpi/processor_perflib.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/acpi/processor_perflib.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/acpi/processor_perflib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/processor_perflib.c</a></div><div class='hunk'>@@ -333,6 +333,7 @@ static int acpi_processor_get_performance_states(struct acpi_processor *pr)</div><div class='ctx'> 	struct acpi_buffer state = { 0, NULL };</div><div class='ctx'> 	union acpi_object *pss = NULL;</div><div class='ctx'> 	int i;</div><div class='add'>+	int last_invalid = -1;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	status = acpi_evaluate_object(pr-&gt;handle, "_PSS", NULL, &amp;buffer);</div><div class='hunk'>@@ -394,14 +395,33 @@ static int acpi_processor_get_performance_states(struct acpi_processor *pr)</div><div class='ctx'> 		    ((u32)(px-&gt;core_frequency * 1000) !=</div><div class='ctx'> 		     (px-&gt;core_frequency * 1000))) {</div><div class='ctx'> 			printk(KERN_ERR FW_BUG PREFIX</div><div class='del'>-			       "Invalid BIOS _PSS frequency: 0x%llx MHz\n",</div><div class='del'>-			       px-&gt;core_frequency);</div><div class='del'>-			result = -EFAULT;</div><div class='del'>-			kfree(pr-&gt;performance-&gt;states);</div><div class='del'>-			goto end;</div><div class='add'>+			       "Invalid BIOS _PSS frequency found for processor %d: 0x%llx MHz\n",</div><div class='add'>+			       pr-&gt;id, px-&gt;core_frequency);</div><div class='add'>+			if (last_invalid == -1)</div><div class='add'>+				last_invalid = i;</div><div class='add'>+		} else {</div><div class='add'>+			if (last_invalid != -1) {</div><div class='add'>+				/*</div><div class='add'>+				 * Copy this valid entry over last_invalid entry</div><div class='add'>+				 */</div><div class='add'>+				memcpy(&amp;(pr-&gt;performance-&gt;states[last_invalid]),</div><div class='add'>+				       px, sizeof(struct acpi_processor_px));</div><div class='add'>+				++last_invalid;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (last_invalid == 0) {</div><div class='add'>+		printk(KERN_ERR FW_BUG PREFIX</div><div class='add'>+		       "No valid BIOS _PSS frequency found for processor %d\n", pr-&gt;id);</div><div class='add'>+		result = -EFAULT;</div><div class='add'>+		kfree(pr-&gt;performance-&gt;states);</div><div class='add'>+		pr-&gt;performance-&gt;states = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (last_invalid &gt; 0)</div><div class='add'>+		pr-&gt;performance-&gt;state_count = last_invalid;</div><div class='add'>+</div><div class='ctx'>       end:</div><div class='ctx'> 	kfree(buffer.pointer);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c<br/>index 767e2dcb9616..c8a1f3b68110 100644<br/>--- a/<a href='/drm-misc/tree/drivers/acpi/scan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/acpi/scan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/acpi/scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/scan.c</a></div><div class='hunk'>@@ -869,7 +869,7 @@ static int acpi_bus_get_power_flags(struct acpi_device *device)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Enumerate supported power management states</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = ACPI_STATE_D0; i &lt;= ACPI_STATE_D3; i++) {</div><div class='add'>+	for (i = ACPI_STATE_D0; i &lt;= ACPI_STATE_D3_HOT; i++) {</div><div class='ctx'> 		struct acpi_device_power_state *ps = &amp;device-&gt;power.states[i];</div><div class='ctx'> 		char object_name[5] = { '_', 'P', 'R', '0' + i, '\0' };</div><div class='ctx'> </div><div class='hunk'>@@ -884,21 +884,18 @@ static int acpi_bus_get_power_flags(struct acpi_device *device)</div><div class='ctx'> 				acpi_bus_add_power_resource(ps-&gt;resources.handles[j]);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* The exist of _PR3 indicates D3Cold support */</div><div class='del'>-		if (i == ACPI_STATE_D3) {</div><div class='del'>-			status = acpi_get_handle(device-&gt;handle, object_name, &amp;handle);</div><div class='del'>-			if (ACPI_SUCCESS(status))</div><div class='del'>-				device-&gt;power.states[ACPI_STATE_D3_COLD].flags.valid = 1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		/* Evaluate "_PSx" to see if we can do explicit sets */</div><div class='ctx'> 		object_name[2] = 'S';</div><div class='ctx'> 		status = acpi_get_handle(device-&gt;handle, object_name, &amp;handle);</div><div class='ctx'> 		if (ACPI_SUCCESS(status))</div><div class='ctx'> 			ps-&gt;flags.explicit_set = 1;</div><div class='ctx'> </div><div class='del'>-		/* State is valid if we have some power control */</div><div class='del'>-		if (ps-&gt;resources.count || ps-&gt;flags.explicit_set)</div><div class='add'>+		/*</div><div class='add'>+		 * State is valid if there are means to put the device into it.</div><div class='add'>+		 * D3hot is only valid if _PR3 present.</div><div class='add'>+		 */</div><div class='add'>+		if (ps-&gt;resources.count ||</div><div class='add'>+		    (ps-&gt;flags.explicit_set &amp;&amp; i &lt; ACPI_STATE_D3_HOT))</div><div class='ctx'> 			ps-&gt;flags.valid = 1;</div><div class='ctx'> </div><div class='ctx'> 		ps-&gt;power = -1;	/* Unknown - driver assigned */</div><div class='hunk'>@@ -911,6 +908,10 @@ static int acpi_bus_get_power_flags(struct acpi_device *device)</div><div class='ctx'> 	device-&gt;power.states[ACPI_STATE_D3].flags.valid = 1;</div><div class='ctx'> 	device-&gt;power.states[ACPI_STATE_D3].power = 0;</div><div class='ctx'> </div><div class='add'>+	/* Set D3cold's explicit_set flag if _PS3 exists. */</div><div class='add'>+	if (device-&gt;power.states[ACPI_STATE_D3_HOT].flags.explicit_set)</div><div class='add'>+		device-&gt;power.states[ACPI_STATE_D3_COLD].flags.explicit_set = 1;</div><div class='add'>+</div><div class='ctx'> 	acpi_bus_init_power(device);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1566,6 +1567,7 @@ static int acpi_bus_scan_fixed(void)</div><div class='ctx'> 						ACPI_BUS_TYPE_POWER_BUTTON,</div><div class='ctx'> 						ACPI_STA_DEFAULT,</div><div class='ctx'> 						&amp;ops);</div><div class='add'>+		device_init_wakeup(&amp;device-&gt;dev, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((acpi_gbl_FADT.flags &amp; ACPI_FADT_SLEEP_BUTTON) == 0) {</div><div class='head'>diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c<br/>index eb6fd233764b..88561029cca8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/acpi/sleep.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/acpi/sleep.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/acpi/sleep.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/sleep.c</a></div><div class='hunk'>@@ -57,6 +57,7 @@ MODULE_PARM_DESC(gts, "Enable evaluation of _GTS on suspend.");</div><div class='ctx'> MODULE_PARM_DESC(bfs, "Enable evaluation of _BFS on resume".);</div><div class='ctx'> </div><div class='ctx'> static u8 sleep_states[ACPI_S_STATE_COUNT];</div><div class='add'>+static bool pwr_btn_event_pending;</div><div class='ctx'> </div><div class='ctx'> static void acpi_sleep_tts_switch(u32 acpi_state)</div><div class='ctx'> {</div><div class='hunk'>@@ -93,11 +94,9 @@ static int acpi_sleep_prepare(u32 acpi_state)</div><div class='ctx'> #ifdef CONFIG_ACPI_SLEEP</div><div class='ctx'> 	/* do we have a wakeup address for S2 and S3? */</div><div class='ctx'> 	if (acpi_state == ACPI_STATE_S3) {</div><div class='del'>-		if (!acpi_wakeup_address) {</div><div class='add'>+		if (!acpi_wakeup_address)</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-		}</div><div class='del'>-		acpi_set_firmware_waking_vector(</div><div class='del'>-				(acpi_physical_address)acpi_wakeup_address);</div><div class='add'>+		acpi_set_firmware_waking_vector(acpi_wakeup_address);</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='ctx'> 	ACPI_FLUSH_CPU_CACHE();</div><div class='hunk'>@@ -186,6 +185,14 @@ static int acpi_pm_prepare(void)</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int find_powerf_dev(struct device *dev, void *data)</div><div class='add'>+{</div><div class='add'>+	struct acpi_device *device = to_acpi_device(dev);</div><div class='add'>+	const char *hid = acpi_device_hid(device);</div><div class='add'>+</div><div class='add'>+	return !strcmp(hid, ACPI_BUTTON_HID_POWERF);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *	acpi_pm_finish - Instruct the platform to leave a sleep state.</div><div class='ctx'>  *</div><div class='hunk'>@@ -194,6 +201,7 @@ static int acpi_pm_prepare(void)</div><div class='ctx'>  */</div><div class='ctx'> static void acpi_pm_finish(void)</div><div class='ctx'> {</div><div class='add'>+	struct device *pwr_btn_dev;</div><div class='ctx'> 	u32 acpi_state = acpi_target_sleep_state;</div><div class='ctx'> </div><div class='ctx'> 	acpi_ec_unblock_transactions();</div><div class='hunk'>@@ -211,6 +219,23 @@ static void acpi_pm_finish(void)</div><div class='ctx'> 	acpi_set_firmware_waking_vector((acpi_physical_address) 0);</div><div class='ctx'> </div><div class='ctx'> 	acpi_target_sleep_state = ACPI_STATE_S0;</div><div class='add'>+</div><div class='add'>+	/* If we were woken with the fixed power button, provide a small</div><div class='add'>+	 * hint to userspace in the form of a wakeup event on the fixed power</div><div class='add'>+	 * button device (if it can be found).</div><div class='add'>+	 *</div><div class='add'>+	 * We delay the event generation til now, as the PM layer requires</div><div class='add'>+	 * timekeeping to be running before we generate events. */</div><div class='add'>+	if (!pwr_btn_event_pending)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pwr_btn_event_pending = false;</div><div class='add'>+	pwr_btn_dev = bus_find_device(&amp;acpi_bus_type, NULL, NULL,</div><div class='add'>+				      find_powerf_dev);</div><div class='add'>+	if (pwr_btn_dev) {</div><div class='add'>+		pm_wakeup_event(pwr_btn_dev, 0);</div><div class='add'>+		put_device(pwr_btn_dev);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -300,9 +325,23 @@ static int acpi_suspend_enter(suspend_state_t pm_state)</div><div class='ctx'> 	/* ACPI 3.0 specs (P62) says that it's the responsibility</div><div class='ctx'> 	 * of the OSPM to clear the status bit [ implying that the</div><div class='ctx'> 	 * POWER_BUTTON event should not reach userspace ]</div><div class='add'>+	 *</div><div class='add'>+	 * However, we do generate a small hint for userspace in the form of</div><div class='add'>+	 * a wakeup event. We flag this condition for now and generate the</div><div class='add'>+	 * event later, as we're currently too early in resume to be able to</div><div class='add'>+	 * generate wakeup events.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ACPI_SUCCESS(status) &amp;&amp; (acpi_state == ACPI_STATE_S3))</div><div class='del'>-		acpi_clear_event(ACPI_EVENT_POWER_BUTTON);</div><div class='add'>+	if (ACPI_SUCCESS(status) &amp;&amp; (acpi_state == ACPI_STATE_S3)) {</div><div class='add'>+		acpi_event_status pwr_btn_status;</div><div class='add'>+</div><div class='add'>+		acpi_get_event_status(ACPI_EVENT_POWER_BUTTON, &amp;pwr_btn_status);</div><div class='add'>+</div><div class='add'>+		if (pwr_btn_status &amp; ACPI_EVENT_FLAG_SET) {</div><div class='add'>+			acpi_clear_event(ACPI_EVENT_POWER_BUTTON);</div><div class='add'>+			/* Flag for later */</div><div class='add'>+			pwr_btn_event_pending = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Disable and clear GPE status before interrupt is enabled. Some GPEs</div><div class='hunk'>@@ -732,8 +771,8 @@ int acpi_pm_device_sleep_state(struct device *dev, int *d_min_p)</div><div class='ctx'> 	 * can wake the system.  _S0W may be valid, too.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (acpi_target_sleep_state == ACPI_STATE_S0 ||</div><div class='del'>-	    (device_may_wakeup(dev) &amp;&amp;</div><div class='del'>-	     adev-&gt;wakeup.sleep_state &lt;= acpi_target_sleep_state)) {</div><div class='add'>+	    (device_may_wakeup(dev) &amp;&amp; adev-&gt;wakeup.flags.valid &amp;&amp;</div><div class='add'>+	     adev-&gt;wakeup.sleep_state &gt;= acpi_target_sleep_state)) {</div><div class='ctx'> 		acpi_status status;</div><div class='ctx'> </div><div class='ctx'> 		acpi_method[3] = 'W';</div><div class='hunk'>@@ -887,7 +926,7 @@ int __init acpi_sleep_init(void)</div><div class='ctx'> 		status = acpi_get_sleep_type_data(i, &amp;type_a, &amp;type_b);</div><div class='ctx'> 		if (ACPI_SUCCESS(status)) {</div><div class='ctx'> 			sleep_states[i] = 1;</div><div class='del'>-			printk(" S%d", i);</div><div class='add'>+			printk(KERN_CONT " S%d", i);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -901,7 +940,7 @@ int __init acpi_sleep_init(void)</div><div class='ctx'> 		hibernation_set_ops(old_suspend_ordering ?</div><div class='ctx'> 			&amp;acpi_hibernation_ops_old : &amp;acpi_hibernation_ops);</div><div class='ctx'> 		sleep_states[ACPI_STATE_S4] = 1;</div><div class='del'>-		printk(" S4");</div><div class='add'>+		printk(KERN_CONT " S4");</div><div class='ctx'> 		if (!nosigcheck) {</div><div class='ctx'> 			acpi_get_table(ACPI_SIG_FACS, 1,</div><div class='ctx'> 				(struct acpi_table_header **)&amp;facs);</div><div class='hunk'>@@ -914,11 +953,11 @@ int __init acpi_sleep_init(void)</div><div class='ctx'> 	status = acpi_get_sleep_type_data(ACPI_STATE_S5, &amp;type_a, &amp;type_b);</div><div class='ctx'> 	if (ACPI_SUCCESS(status)) {</div><div class='ctx'> 		sleep_states[ACPI_STATE_S5] = 1;</div><div class='del'>-		printk(" S5");</div><div class='add'>+		printk(KERN_CONT " S5");</div><div class='ctx'> 		pm_power_off_prepare = acpi_power_off_prepare;</div><div class='ctx'> 		pm_power_off = acpi_power_off;</div><div class='ctx'> 	}</div><div class='del'>-	printk(")\n");</div><div class='add'>+	printk(KERN_CONT ")\n");</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Register the tts_notifier to reboot notifier list so that the _TTS</div><div class='ctx'> 	 * object can also be evaluated when the system enters S5.</div><div class='head'>diff --git a/drivers/acpi/utils.c b/drivers/acpi/utils.c<br/>index b002a471c5d4..adbbc1c80a26 100644<br/>--- a/<a href='/drm-misc/tree/drivers/acpi/utils.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/acpi/utils.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/acpi/utils.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/utils.c</a></div><div class='hunk'>@@ -382,3 +382,33 @@ acpi_evaluate_reference(acpi_handle handle,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> EXPORT_SYMBOL(acpi_evaluate_reference);</div><div class='add'>+</div><div class='add'>+acpi_status</div><div class='add'>+acpi_get_physical_device_location(acpi_handle handle, struct acpi_pld *pld)</div><div class='add'>+{</div><div class='add'>+	acpi_status status;</div><div class='add'>+	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };</div><div class='add'>+	union acpi_object *output;</div><div class='add'>+</div><div class='add'>+	status = acpi_evaluate_object(handle, "_PLD", NULL, &amp;buffer);</div><div class='add'>+</div><div class='add'>+	if (ACPI_FAILURE(status))</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='add'>+	output = buffer.pointer;</div><div class='add'>+</div><div class='add'>+	if (!output || output-&gt;type != ACPI_TYPE_PACKAGE</div><div class='add'>+	    || !output-&gt;package.count</div><div class='add'>+	    || output-&gt;package.elements[0].type != ACPI_TYPE_BUFFER</div><div class='add'>+	    || output-&gt;package.elements[0].buffer.length &gt; sizeof(*pld)) {</div><div class='add'>+		status = AE_TYPE;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(pld, output-&gt;package.elements[0].buffer.pointer,</div><div class='add'>+	       output-&gt;package.elements[0].buffer.length);</div><div class='add'>+out:</div><div class='add'>+	kfree(buffer.pointer);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(acpi_get_physical_device_location);</div><div class='head'>diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c<br/>index 9577b6fa2650..a576575617d7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/acpi/video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/acpi/video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/acpi/video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/acpi/video.c</a></div><div class='hunk'>@@ -1687,10 +1687,6 @@ static int acpi_video_bus_add(struct acpi_device *device)</div><div class='ctx'> 	set_bit(KEY_BRIGHTNESS_ZERO, input-&gt;keybit);</div><div class='ctx'> 	set_bit(KEY_DISPLAY_OFF, input-&gt;keybit);</div><div class='ctx'> </div><div class='del'>-	error = input_register_device(input);</div><div class='del'>-	if (error)</div><div class='del'>-		goto err_stop_video;</div><div class='del'>-</div><div class='ctx'> 	printk(KERN_INFO PREFIX "%s [%s] (multi-head: %s  rom: %s  post: %s)\n",</div><div class='ctx'> 	       ACPI_VIDEO_DEVICE_NAME, acpi_device_bid(device),</div><div class='ctx'> 	       video-&gt;flags.multihead ? "yes" : "no",</div><div class='hunk'>@@ -1701,12 +1697,16 @@ static int acpi_video_bus_add(struct acpi_device *device)</div><div class='ctx'> 	video-&gt;pm_nb.priority = 0;</div><div class='ctx'> 	error = register_pm_notifier(&amp;video-&gt;pm_nb);</div><div class='ctx'> 	if (error)</div><div class='del'>-		goto err_unregister_input_dev;</div><div class='add'>+		goto err_stop_video;</div><div class='add'>+</div><div class='add'>+	error = input_register_device(input);</div><div class='add'>+	if (error)</div><div class='add'>+		goto err_unregister_pm_notifier;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>- err_unregister_input_dev:</div><div class='del'>-	input_unregister_device(input);</div><div class='add'>+ err_unregister_pm_notifier:</div><div class='add'>+	unregister_pm_notifier(&amp;video-&gt;pm_nb);</div><div class='ctx'>  err_stop_video:</div><div class='ctx'> 	acpi_video_bus_stop_devices(video);</div><div class='ctx'>  err_free_input_dev:</div><div class='hunk'>@@ -1743,9 +1743,18 @@ static int acpi_video_bus_remove(struct acpi_device *device, int type)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int __init is_i740(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;device == 0x00D1)</div><div class='add'>+		return 1;</div><div class='add'>+	if (dev-&gt;device == 0x7000)</div><div class='add'>+		return 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init intel_opregion_present(void)</div><div class='ctx'> {</div><div class='del'>-#if defined(CONFIG_DRM_I915) || defined(CONFIG_DRM_I915_MODULE)</div><div class='add'>+	int opregion = 0;</div><div class='ctx'> 	struct pci_dev *dev = NULL;</div><div class='ctx'> 	u32 address;</div><div class='ctx'> </div><div class='hunk'>@@ -1754,13 +1763,15 @@ static int __init intel_opregion_present(void)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (dev-&gt;vendor != PCI_VENDOR_ID_INTEL)</div><div class='ctx'> 			continue;</div><div class='add'>+		/* We don't want to poke around undefined i740 registers */</div><div class='add'>+		if (is_i740(dev))</div><div class='add'>+			continue;</div><div class='ctx'> 		pci_read_config_dword(dev, 0xfc, &amp;address);</div><div class='ctx'> 		if (!address)</div><div class='ctx'> 			continue;</div><div class='del'>-		return 1;</div><div class='add'>+		opregion = 1;</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='del'>-	return 0;</div><div class='add'>+	return opregion;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int acpi_video_register(void)</div><div class='head'>diff --git a/drivers/amba/Makefile b/drivers/amba/Makefile<br/>index 40fe74097be2..66e81c2f1e3c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/amba/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/amba/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/amba/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/amba/Makefile</a></div><div class='hunk'>@@ -1,2 +1,2 @@</div><div class='del'>-obj-y		+= bus.o</div><div class='del'>-</div><div class='add'>+obj-$(CONFIG_ARM_AMBA)		+= bus.o</div><div class='add'>+obj-$(CONFIG_TEGRA_AHB)		+= tegra-ahb.o</div><div class='head'>diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c<br/>index cc273226dbd0..b7e728517284 100644<br/>--- a/<a href='/drm-misc/tree/drivers/amba/bus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/amba/bus.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/amba/bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/amba/bus.c</a></div><div class='hunk'>@@ -527,9 +527,9 @@ int amba_device_add(struct amba_device *dev, struct resource *parent)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_release;</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;irq[0] &amp;&amp; dev-&gt;irq[0] != NO_IRQ)</div><div class='add'>+	if (dev-&gt;irq[0])</div><div class='ctx'> 		ret = device_create_file(&amp;dev-&gt;dev, &amp;dev_attr_irq0);</div><div class='del'>-	if (ret == 0 &amp;&amp; dev-&gt;irq[1] &amp;&amp; dev-&gt;irq[1] != NO_IRQ)</div><div class='add'>+	if (ret == 0 &amp;&amp; dev-&gt;irq[1])</div><div class='ctx'> 		ret = device_create_file(&amp;dev-&gt;dev, &amp;dev_attr_irq1);</div><div class='ctx'> 	if (ret == 0)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -543,6 +543,55 @@ int amba_device_add(struct amba_device *dev, struct resource *parent)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(amba_device_add);</div><div class='ctx'> </div><div class='add'>+static struct amba_device *</div><div class='add'>+amba_aphb_device_add(struct device *parent, const char *name,</div><div class='add'>+		     resource_size_t base, size_t size, int irq1, int irq2,</div><div class='add'>+		     void *pdata, unsigned int periphid, u64 dma_mask)</div><div class='add'>+{</div><div class='add'>+	struct amba_device *dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev = amba_device_alloc(name, base, size);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	dev-&gt;dma_mask = dma_mask;</div><div class='add'>+	dev-&gt;dev.coherent_dma_mask = dma_mask;</div><div class='add'>+	dev-&gt;irq[0] = irq1;</div><div class='add'>+	dev-&gt;irq[1] = irq2;</div><div class='add'>+	dev-&gt;periphid = periphid;</div><div class='add'>+	dev-&gt;dev.platform_data = pdata;</div><div class='add'>+	dev-&gt;dev.parent = parent;</div><div class='add'>+</div><div class='add'>+	ret = amba_device_add(dev, &amp;iomem_resource);</div><div class='add'>+	if (ret) {</div><div class='add'>+		amba_device_put(dev);</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct amba_device *</div><div class='add'>+amba_apb_device_add(struct device *parent, const char *name,</div><div class='add'>+		    resource_size_t base, size_t size, int irq1, int irq2,</div><div class='add'>+		    void *pdata, unsigned int periphid)</div><div class='add'>+{</div><div class='add'>+	return amba_aphb_device_add(parent, name, base, size, irq1, irq2, pdata,</div><div class='add'>+				    periphid, 0);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(amba_apb_device_add);</div><div class='add'>+</div><div class='add'>+struct amba_device *</div><div class='add'>+amba_ahb_device_add(struct device *parent, const char *name,</div><div class='add'>+		    resource_size_t base, size_t size, int irq1, int irq2,</div><div class='add'>+		    void *pdata, unsigned int periphid)</div><div class='add'>+{</div><div class='add'>+	return amba_aphb_device_add(parent, name, base, size, irq1, irq2, pdata,</div><div class='add'>+				    periphid, ~0ULL);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(amba_ahb_device_add);</div><div class='add'>+</div><div class='ctx'> static void amba_device_initialize(struct amba_device *dev, const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	device_initialize(&amp;dev-&gt;dev);</div><div class='head'>diff --git a/drivers/amba/tegra-ahb.c b/drivers/amba/tegra-ahb.c<br/>new file mode 100644<br/>index 000000000000..aa0b1f160528<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/amba/tegra-ahb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/amba/tegra-ahb.c</a></div><div class='hunk'>@@ -0,0 +1,293 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ * Copyright (C) 2011 Google, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Author:</div><div class='add'>+ *	Jay Cheng &lt;jacheng@nvidia.com&gt;</div><div class='add'>+ *	James Wylder &lt;james.wylder@motorola.com&gt;</div><div class='add'>+ *	Benoit Goby &lt;benoit@android.com&gt;</div><div class='add'>+ *	Colin Cross &lt;ccross@android.com&gt;</div><div class='add'>+ *	Hiroshi DOYU &lt;hdoyu@nvidia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This software is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2, as published by the Free Software Foundation, and</div><div class='add'>+ * may be copied, distributed, and modified under those terms.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_NAME "tegra-ahb"</div><div class='add'>+</div><div class='add'>+#define AHB_ARBITRATION_DISABLE		0x00</div><div class='add'>+#define AHB_ARBITRATION_PRIORITY_CTRL	0x04</div><div class='add'>+#define   AHB_PRIORITY_WEIGHT(x)	(((x) &amp; 0x7) &lt;&lt; 29)</div><div class='add'>+#define   PRIORITY_SELECT_USB BIT(6)</div><div class='add'>+#define   PRIORITY_SELECT_USB2 BIT(18)</div><div class='add'>+#define   PRIORITY_SELECT_USB3 BIT(17)</div><div class='add'>+</div><div class='add'>+#define AHB_GIZMO_AHB_MEM		0x0c</div><div class='add'>+#define   ENB_FAST_REARBITRATE BIT(2)</div><div class='add'>+#define   DONT_SPLIT_AHB_WR     BIT(7)</div><div class='add'>+</div><div class='add'>+#define AHB_GIZMO_APB_DMA		0x10</div><div class='add'>+#define AHB_GIZMO_IDE			0x18</div><div class='add'>+#define AHB_GIZMO_USB			0x1c</div><div class='add'>+#define AHB_GIZMO_AHB_XBAR_BRIDGE	0x20</div><div class='add'>+#define AHB_GIZMO_CPU_AHB_BRIDGE	0x24</div><div class='add'>+#define AHB_GIZMO_COP_AHB_BRIDGE	0x28</div><div class='add'>+#define AHB_GIZMO_XBAR_APB_CTLR		0x2c</div><div class='add'>+#define AHB_GIZMO_VCP_AHB_BRIDGE	0x30</div><div class='add'>+#define AHB_GIZMO_NAND			0x3c</div><div class='add'>+#define AHB_GIZMO_SDMMC4		0x44</div><div class='add'>+#define AHB_GIZMO_XIO			0x48</div><div class='add'>+#define AHB_GIZMO_BSEV			0x60</div><div class='add'>+#define AHB_GIZMO_BSEA			0x70</div><div class='add'>+#define AHB_GIZMO_NOR			0x74</div><div class='add'>+#define AHB_GIZMO_USB2			0x78</div><div class='add'>+#define AHB_GIZMO_USB3			0x7c</div><div class='add'>+#define   IMMEDIATE	BIT(18)</div><div class='add'>+</div><div class='add'>+#define AHB_GIZMO_SDMMC1		0x80</div><div class='add'>+#define AHB_GIZMO_SDMMC2		0x84</div><div class='add'>+#define AHB_GIZMO_SDMMC3		0x88</div><div class='add'>+#define AHB_MEM_PREFETCH_CFG_X		0xd8</div><div class='add'>+#define AHB_ARBITRATION_XBAR_CTRL	0xdc</div><div class='add'>+#define AHB_MEM_PREFETCH_CFG3		0xe0</div><div class='add'>+#define AHB_MEM_PREFETCH_CFG4		0xe4</div><div class='add'>+#define AHB_MEM_PREFETCH_CFG1		0xec</div><div class='add'>+#define AHB_MEM_PREFETCH_CFG2		0xf0</div><div class='add'>+#define   PREFETCH_ENB	BIT(31)</div><div class='add'>+#define   MST_ID(x)	(((x) &amp; 0x1f) &lt;&lt; 26)</div><div class='add'>+#define   AHBDMA_MST_ID	MST_ID(5)</div><div class='add'>+#define   USB_MST_ID	MST_ID(6)</div><div class='add'>+#define   USB2_MST_ID	MST_ID(18)</div><div class='add'>+#define   USB3_MST_ID	MST_ID(17)</div><div class='add'>+#define   ADDR_BNDRY(x)	(((x) &amp; 0xf) &lt;&lt; 21)</div><div class='add'>+#define   INACTIVITY_TIMEOUT(x)	(((x) &amp; 0xffff) &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+#define AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID	0xf8</div><div class='add'>+</div><div class='add'>+#define AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE BIT(17)</div><div class='add'>+</div><div class='add'>+static struct platform_driver tegra_ahb_driver;</div><div class='add'>+</div><div class='add'>+static const u32 tegra_ahb_gizmo[] = {</div><div class='add'>+	AHB_ARBITRATION_DISABLE,</div><div class='add'>+	AHB_ARBITRATION_PRIORITY_CTRL,</div><div class='add'>+	AHB_GIZMO_AHB_MEM,</div><div class='add'>+	AHB_GIZMO_APB_DMA,</div><div class='add'>+	AHB_GIZMO_IDE,</div><div class='add'>+	AHB_GIZMO_USB,</div><div class='add'>+	AHB_GIZMO_AHB_XBAR_BRIDGE,</div><div class='add'>+	AHB_GIZMO_CPU_AHB_BRIDGE,</div><div class='add'>+	AHB_GIZMO_COP_AHB_BRIDGE,</div><div class='add'>+	AHB_GIZMO_XBAR_APB_CTLR,</div><div class='add'>+	AHB_GIZMO_VCP_AHB_BRIDGE,</div><div class='add'>+	AHB_GIZMO_NAND,</div><div class='add'>+	AHB_GIZMO_SDMMC4,</div><div class='add'>+	AHB_GIZMO_XIO,</div><div class='add'>+	AHB_GIZMO_BSEV,</div><div class='add'>+	AHB_GIZMO_BSEA,</div><div class='add'>+	AHB_GIZMO_NOR,</div><div class='add'>+	AHB_GIZMO_USB2,</div><div class='add'>+	AHB_GIZMO_USB3,</div><div class='add'>+	AHB_GIZMO_SDMMC1,</div><div class='add'>+	AHB_GIZMO_SDMMC2,</div><div class='add'>+	AHB_GIZMO_SDMMC3,</div><div class='add'>+	AHB_MEM_PREFETCH_CFG_X,</div><div class='add'>+	AHB_ARBITRATION_XBAR_CTRL,</div><div class='add'>+	AHB_MEM_PREFETCH_CFG3,</div><div class='add'>+	AHB_MEM_PREFETCH_CFG4,</div><div class='add'>+	AHB_MEM_PREFETCH_CFG1,</div><div class='add'>+	AHB_MEM_PREFETCH_CFG2,</div><div class='add'>+	AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tegra_ahb {</div><div class='add'>+	void __iomem	*regs;</div><div class='add'>+	struct device	*dev;</div><div class='add'>+	u32		ctx[0];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32 gizmo_readl(struct tegra_ahb *ahb, u32 offset)</div><div class='add'>+{</div><div class='add'>+	return readl(ahb-&gt;regs + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void gizmo_writel(struct tegra_ahb *ahb, u32 value, u32 offset)</div><div class='add'>+{</div><div class='add'>+	writel(value, ahb-&gt;regs + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARCH_TEGRA_3x_SOC</div><div class='add'>+static int tegra_ahb_match_by_smmu(struct device *dev, void *data)</div><div class='add'>+{</div><div class='add'>+	struct tegra_ahb *ahb = dev_get_drvdata(dev);</div><div class='add'>+	struct device_node *dn = data;</div><div class='add'>+</div><div class='add'>+	return (ahb-&gt;dev-&gt;of_node == dn) ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tegra_ahb_enable_smmu(struct device_node *dn)</div><div class='add'>+{</div><div class='add'>+	struct device *dev;</div><div class='add'>+	u32 val;</div><div class='add'>+	struct tegra_ahb *ahb;</div><div class='add'>+</div><div class='add'>+	dev = driver_find_device(&amp;tegra_ahb_driver.driver, NULL, dn,</div><div class='add'>+				 tegra_ahb_match_by_smmu);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -EPROBE_DEFER;</div><div class='add'>+	ahb = dev_get_drvdata(dev);</div><div class='add'>+	val = gizmo_readl(ahb, AHB_ARBITRATION_XBAR_CTRL);</div><div class='add'>+	val |= AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE;</div><div class='add'>+	gizmo_writel(ahb, val, AHB_ARBITRATION_XBAR_CTRL);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(tegra_ahb_enable_smmu);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int tegra_ahb_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct tegra_ahb *ahb = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tegra_ahb_gizmo); i++)</div><div class='add'>+		ahb-&gt;ctx[i] = gizmo_readl(ahb, tegra_ahb_gizmo[i]);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra_ahb_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct tegra_ahb *ahb = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tegra_ahb_gizmo); i++)</div><div class='add'>+		gizmo_writel(ahb, ahb-&gt;ctx[i], tegra_ahb_gizmo[i]);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static UNIVERSAL_DEV_PM_OPS(tegra_ahb_pm,</div><div class='add'>+			    tegra_ahb_suspend,</div><div class='add'>+			    tegra_ahb_resume, NULL);</div><div class='add'>+</div><div class='add'>+static void tegra_ahb_gizmo_init(struct tegra_ahb *ahb)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = gizmo_readl(ahb, AHB_GIZMO_AHB_MEM);</div><div class='add'>+	val |= ENB_FAST_REARBITRATE | IMMEDIATE | DONT_SPLIT_AHB_WR;</div><div class='add'>+	gizmo_writel(ahb, val, AHB_GIZMO_AHB_MEM);</div><div class='add'>+</div><div class='add'>+	val = gizmo_readl(ahb, AHB_GIZMO_USB);</div><div class='add'>+	val |= IMMEDIATE;</div><div class='add'>+	gizmo_writel(ahb, val, AHB_GIZMO_USB);</div><div class='add'>+</div><div class='add'>+	val = gizmo_readl(ahb, AHB_GIZMO_USB2);</div><div class='add'>+	val |= IMMEDIATE;</div><div class='add'>+	gizmo_writel(ahb, val, AHB_GIZMO_USB2);</div><div class='add'>+</div><div class='add'>+	val = gizmo_readl(ahb, AHB_GIZMO_USB3);</div><div class='add'>+	val |= IMMEDIATE;</div><div class='add'>+	gizmo_writel(ahb, val, AHB_GIZMO_USB3);</div><div class='add'>+</div><div class='add'>+	val = gizmo_readl(ahb, AHB_ARBITRATION_PRIORITY_CTRL);</div><div class='add'>+	val |= PRIORITY_SELECT_USB |</div><div class='add'>+		PRIORITY_SELECT_USB2 |</div><div class='add'>+		PRIORITY_SELECT_USB3 |</div><div class='add'>+		AHB_PRIORITY_WEIGHT(7);</div><div class='add'>+	gizmo_writel(ahb, val, AHB_ARBITRATION_PRIORITY_CTRL);</div><div class='add'>+</div><div class='add'>+	val = gizmo_readl(ahb, AHB_MEM_PREFETCH_CFG1);</div><div class='add'>+	val &amp;= ~MST_ID(~0);</div><div class='add'>+	val |= PREFETCH_ENB |</div><div class='add'>+		AHBDMA_MST_ID |</div><div class='add'>+		ADDR_BNDRY(0xc) |</div><div class='add'>+		INACTIVITY_TIMEOUT(0x1000);</div><div class='add'>+	gizmo_writel(ahb, val, AHB_MEM_PREFETCH_CFG1);</div><div class='add'>+</div><div class='add'>+	val = gizmo_readl(ahb, AHB_MEM_PREFETCH_CFG2);</div><div class='add'>+	val &amp;= ~MST_ID(~0);</div><div class='add'>+	val |= PREFETCH_ENB |</div><div class='add'>+		USB_MST_ID |</div><div class='add'>+		ADDR_BNDRY(0xc) |</div><div class='add'>+		INACTIVITY_TIMEOUT(0x1000);</div><div class='add'>+	gizmo_writel(ahb, val, AHB_MEM_PREFETCH_CFG2);</div><div class='add'>+</div><div class='add'>+	val = gizmo_readl(ahb, AHB_MEM_PREFETCH_CFG3);</div><div class='add'>+	val &amp;= ~MST_ID(~0);</div><div class='add'>+	val |= PREFETCH_ENB |</div><div class='add'>+		USB3_MST_ID |</div><div class='add'>+		ADDR_BNDRY(0xc) |</div><div class='add'>+		INACTIVITY_TIMEOUT(0x1000);</div><div class='add'>+	gizmo_writel(ahb, val, AHB_MEM_PREFETCH_CFG3);</div><div class='add'>+</div><div class='add'>+	val = gizmo_readl(ahb, AHB_MEM_PREFETCH_CFG4);</div><div class='add'>+	val &amp;= ~MST_ID(~0);</div><div class='add'>+	val |= PREFETCH_ENB |</div><div class='add'>+		USB2_MST_ID |</div><div class='add'>+		ADDR_BNDRY(0xc) |</div><div class='add'>+		INACTIVITY_TIMEOUT(0x1000);</div><div class='add'>+	gizmo_writel(ahb, val, AHB_MEM_PREFETCH_CFG4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit tegra_ahb_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct resource *res;</div><div class='add'>+	struct tegra_ahb *ahb;</div><div class='add'>+	size_t bytes;</div><div class='add'>+</div><div class='add'>+	bytes = sizeof(*ahb) + sizeof(u32) * ARRAY_SIZE(tegra_ahb_gizmo);</div><div class='add'>+	ahb = devm_kzalloc(&amp;pdev-&gt;dev, bytes, GFP_KERNEL);</div><div class='add'>+	if (!ahb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	ahb-&gt;regs = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='add'>+	if (!ahb-&gt;regs)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	ahb-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	platform_set_drvdata(pdev, ahb);</div><div class='add'>+	tegra_ahb_gizmo_init(ahb);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit tegra_ahb_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id tegra_ahb_of_match[] __devinitconst = {</div><div class='add'>+	{ .compatible = "nvidia,tegra30-ahb", },</div><div class='add'>+	{ .compatible = "nvidia,tegra20-ahb", },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_driver tegra_ahb_driver = {</div><div class='add'>+	.probe = tegra_ahb_probe,</div><div class='add'>+	.remove = __devexit_p(tegra_ahb_remove),</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DRV_NAME,</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = tegra_ahb_of_match,</div><div class='add'>+		.pm = &amp;tegra_ahb_pm,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(tegra_ahb_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Hiroshi DOYU &lt;hdoyu@nvidia.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Tegra AHB driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_ALIAS("platform:" DRV_NAME);</div><div class='head'>diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig<br/>index 6bdedd7cca2c..2be8ef1d3093 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ata/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ata/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ata/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/Kconfig</a></div><div class='hunk'>@@ -416,6 +416,15 @@ config PATA_EFAR</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='add'>+config PATA_EP93XX</div><div class='add'>+	tristate "Cirrus Logic EP93xx PATA support"</div><div class='add'>+	depends on ARCH_EP93XX</div><div class='add'>+	help</div><div class='add'>+	  This option enables support for the PATA controller in</div><div class='add'>+	  the Cirrus Logic EP9312 and EP9315 ARM CPU.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='ctx'> config PATA_HPT366</div><div class='ctx'> 	tristate "HPT 366/368 PATA support"</div><div class='ctx'> 	depends on PCI</div><div class='head'>diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile<br/>index 6ece5b7231a3..a454a139b1d2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ata/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ata/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ata/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/Makefile</a></div><div class='hunk'>@@ -43,6 +43,7 @@ obj-$(CONFIG_PATA_CS5535)	+= pata_cs5535.o</div><div class='ctx'> obj-$(CONFIG_PATA_CS5536)	+= pata_cs5536.o</div><div class='ctx'> obj-$(CONFIG_PATA_CYPRESS)	+= pata_cypress.o</div><div class='ctx'> obj-$(CONFIG_PATA_EFAR)		+= pata_efar.o</div><div class='add'>+obj-$(CONFIG_PATA_EP93XX)	+= pata_ep93xx.o</div><div class='ctx'> obj-$(CONFIG_PATA_HPT366)	+= pata_hpt366.o</div><div class='ctx'> obj-$(CONFIG_PATA_HPT37X)	+= pata_hpt37x.o</div><div class='ctx'> obj-$(CONFIG_PATA_HPT3X2N)	+= pata_hpt3x2n.o</div><div class='head'>diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c<br/>index 79a1e9dd56d9..ebaf67e4b2bc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ata/ahci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ata/ahci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ata/ahci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/ahci.c</a></div><div class='hunk'>@@ -394,6 +394,8 @@ static const struct pci_device_id ahci_pci_tbl[] = {</div><div class='ctx'> 	  .driver_data = board_ahci_yes_fbs },			/* 88se9128 */</div><div class='ctx'> 	{ PCI_DEVICE(0x1b4b, 0x9125),</div><div class='ctx'> 	  .driver_data = board_ahci_yes_fbs },			/* 88se9125 */</div><div class='add'>+	{ PCI_DEVICE(0x1b4b, 0x917a),</div><div class='add'>+	  .driver_data = board_ahci_yes_fbs },			/* 88se9172 */</div><div class='ctx'> 	{ PCI_DEVICE(0x1b4b, 0x91a3),</div><div class='ctx'> 	  .driver_data = board_ahci_yes_fbs },</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c<br/>index 0c86c77764bc..9e419e1c2006 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ata/ahci_platform.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ata/ahci_platform.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ata/ahci_platform.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/ahci_platform.c</a></div><div class='hunk'>@@ -280,6 +280,7 @@ static struct dev_pm_ops ahci_pm_ops = {</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id ahci_of_match[] = {</div><div class='ctx'> 	{ .compatible = "calxeda,hb-ahci", },</div><div class='add'>+	{ .compatible = "snps,spear-ahci", },</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, ahci_of_match);</div><div class='head'>diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c<br/>index 7df56ec31819..aae115600b74 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ata/ata_generic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ata/ata_generic.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ata/ata_generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/ata_generic.c</a></div><div class='hunk'>@@ -177,7 +177,7 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id</div><div class='ctx'> 	if ((id-&gt;driver_data &amp; ATA_GEN_CLASS_MATCH) &amp;&amp; all_generic_ide == 0)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (id-&gt;driver_data &amp; ATA_GEN_INTEL_IDER)</div><div class='add'>+	if ((id-&gt;driver_data &amp; ATA_GEN_INTEL_IDER) &amp;&amp; !all_generic_ide)</div><div class='ctx'> 		if (!is_intel_ider(dev))</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c<br/>index 7857e8fd0a3e..3c809bfbccf5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ata/ata_piix.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ata/ata_piix.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ata/ata_piix.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/ata_piix.c</a></div><div class='hunk'>@@ -1554,6 +1554,39 @@ static bool piix_broken_system_poweroff(struct pci_dev *pdev)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int prefer_ms_hyperv = 1;</div><div class='add'>+module_param(prefer_ms_hyperv, int, 0);</div><div class='add'>+</div><div class='add'>+static void piix_ignore_devices_quirk(struct ata_host *host)</div><div class='add'>+{</div><div class='add'>+#if IS_ENABLED(CONFIG_HYPERV_STORAGE)</div><div class='add'>+	static const struct dmi_system_id ignore_hyperv[] = {</div><div class='add'>+		{</div><div class='add'>+			/* On Hyper-V hypervisors the disks are exposed on</div><div class='add'>+			 * both the emulated SATA controller and on the</div><div class='add'>+			 * paravirtualised drivers.  The CD/DVD devices</div><div class='add'>+			 * are only exposed on the emulated controller.</div><div class='add'>+			 * Request we ignore ATA devices on this host.</div><div class='add'>+			 */</div><div class='add'>+			.ident = "Hyper-V Virtual Machine",</div><div class='add'>+			.matches = {</div><div class='add'>+				DMI_MATCH(DMI_SYS_VENDOR,</div><div class='add'>+						"Microsoft Corporation"),</div><div class='add'>+				DMI_MATCH(DMI_PRODUCT_NAME, "Virtual Machine"),</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+		{ }	/* terminate list */</div><div class='add'>+	};</div><div class='add'>+	const struct dmi_system_id *dmi = dmi_first_match(ignore_hyperv);</div><div class='add'>+</div><div class='add'>+	if (dmi &amp;&amp; prefer_ms_hyperv) {</div><div class='add'>+		host-&gt;flags |= ATA_HOST_IGNORE_ATA;</div><div class='add'>+		dev_info(host-&gt;dev, "%s detected, ATA device ignore set\n",</div><div class='add'>+			dmi-&gt;ident);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *	piix_init_one - Register PIIX ATA PCI device with kernel services</div><div class='ctx'>  *	@pdev: PCI device to register</div><div class='hunk'>@@ -1669,6 +1702,9 @@ static int __devinit piix_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> 	host-&gt;flags |= ATA_HOST_PARALLEL_SCAN;</div><div class='ctx'> </div><div class='add'>+	/* Allow hosts to specify device types to ignore when scanning. */</div><div class='add'>+	piix_ignore_devices_quirk(host);</div><div class='add'>+</div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> 	return ata_pci_sff_activate_host(host, ata_bmdma_interrupt, sht);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c<br/>index 28db50b57b91..cece3a4d11ea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ata/libata-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ata/libata-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ata/libata-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/libata-core.c</a></div><div class='hunk'>@@ -95,7 +95,7 @@ static unsigned int ata_dev_set_xfermode(struct ata_device *dev);</div><div class='ctx'> static void ata_dev_xfermask(struct ata_device *dev);</div><div class='ctx'> static unsigned long ata_dev_blacklisted(const struct ata_device *dev);</div><div class='ctx'> </div><div class='del'>-atomic_t ata_print_id = ATOMIC_INIT(1);</div><div class='add'>+atomic_t ata_print_id = ATOMIC_INIT(0);</div><div class='ctx'> </div><div class='ctx'> struct ata_force_param {</div><div class='ctx'> 	const char	*name;</div><div class='hunk'>@@ -1973,6 +1973,12 @@ retry:</div><div class='ctx'> 	if (class == ATA_DEV_ATA) {</div><div class='ctx'> 		if (!ata_id_is_ata(id) &amp;&amp; !ata_id_is_cfa(id))</div><div class='ctx'> 			goto err_out;</div><div class='add'>+		if (ap-&gt;host-&gt;flags &amp; ATA_HOST_IGNORE_ATA &amp;&amp;</div><div class='add'>+							ata_id_is_ata(id)) {</div><div class='add'>+			ata_dev_dbg(dev,</div><div class='add'>+				"host indicates ignore ATA devices, ignored\n");</div><div class='add'>+			return -ENOENT;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (ata_id_is_ata(id))</div><div class='ctx'> 			goto err_out;</div><div class='hunk'>@@ -4051,6 +4057,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {</div><div class='ctx'> 	{ "_NEC DV5800A", 	NULL,		ATA_HORKAGE_NODMA },</div><div class='ctx'> 	{ "SAMSUNG CD-ROM SN-124", "N001",	ATA_HORKAGE_NODMA },</div><div class='ctx'> 	{ "Seagate STT20000A", NULL,		ATA_HORKAGE_NODMA },</div><div class='add'>+	{ "2GB ATA Flash Disk", "ADMA428M",	ATA_HORKAGE_NODMA },</div><div class='ctx'> 	/* Odd clown on sil3726/4726 PMPs */</div><div class='ctx'> 	{ "Config  Disk",	NULL,		ATA_HORKAGE_DISABLE },</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c<br/>index c61316e9d2f7..6d53cf9b3b6e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ata/libata-eh.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ata/libata-eh.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ata/libata-eh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/libata-eh.c</a></div><div class='hunk'>@@ -2047,6 +2047,26 @@ static unsigned int ata_eh_speed_down(struct ata_device *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ *	ata_eh_worth_retry - analyze error and decide whether to retry</div><div class='add'>+ *	@qc: qc to possibly retry</div><div class='add'>+ *</div><div class='add'>+ *	Look at the cause of the error and decide if a retry</div><div class='add'>+ * 	might be useful or not.  We don't want to retry media errors</div><div class='add'>+ *	because the drive itself has probably already taken 10-30 seconds</div><div class='add'>+ *	doing its own internal retries before reporting the failure.</div><div class='add'>+ */</div><div class='add'>+static inline int ata_eh_worth_retry(struct ata_queued_cmd *qc)</div><div class='add'>+{</div><div class='add'>+	if (qc-&gt;flags &amp; AC_ERR_MEDIA)</div><div class='add'>+		return 0;	/* don't retry media errors */</div><div class='add'>+	if (qc-&gt;flags &amp; ATA_QCFLAG_IO)</div><div class='add'>+		return 1;	/* otherwise retry anything from fs stack */</div><div class='add'>+	if (qc-&gt;err_mask &amp; AC_ERR_INVALID)</div><div class='add'>+		return 0;	/* don't retry these */</div><div class='add'>+	return qc-&gt;err_mask != AC_ERR_DEV;  /* retry if not dev error */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  *	ata_eh_link_autopsy - analyze error and determine recovery action</div><div class='ctx'>  *	@link: host link to perform autopsy on</div><div class='ctx'>  *</div><div class='hunk'>@@ -2120,9 +2140,7 @@ static void ata_eh_link_autopsy(struct ata_link *link)</div><div class='ctx'> 			qc-&gt;err_mask &amp;= ~(AC_ERR_DEV | AC_ERR_OTHER);</div><div class='ctx'> </div><div class='ctx'> 		/* determine whether the command is worth retrying */</div><div class='del'>-		if (qc-&gt;flags &amp; ATA_QCFLAG_IO ||</div><div class='del'>-		    (!(qc-&gt;err_mask &amp; AC_ERR_INVALID) &amp;&amp;</div><div class='del'>-		     qc-&gt;err_mask != AC_ERR_DEV))</div><div class='add'>+		if (ata_eh_worth_retry(qc))</div><div class='ctx'> 			qc-&gt;flags |= ATA_QCFLAG_RETRY;</div><div class='ctx'> </div><div class='ctx'> 		/* accumulate error info */</div><div class='hunk'>@@ -3501,7 +3519,8 @@ static int ata_count_probe_trials_cb(struct ata_ering_entry *ent, void *void_arg</div><div class='ctx'> 	u64 now = get_jiffies_64();</div><div class='ctx'> 	int *trials = void_arg;</div><div class='ctx'> </div><div class='del'>-	if (ent-&gt;timestamp &lt; now - min(now, interval))</div><div class='add'>+	if ((ent-&gt;eflags &amp; ATA_EFLAG_OLD_ER) ||</div><div class='add'>+	    (ent-&gt;timestamp &lt; now - min(now, interval)))</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	(*trials)++;</div><div class='head'>diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c<br/>index 93dabdcd2cbe..22226350cd0c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ata/libata-scsi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ata/libata-scsi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ata/libata-scsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/libata-scsi.c</a></div><div class='hunk'>@@ -3399,7 +3399,8 @@ int ata_scsi_add_hosts(struct ata_host *host, struct scsi_host_template *sht)</div><div class='ctx'> 		 */</div><div class='ctx'> 		shost-&gt;max_host_blocked = 1;</div><div class='ctx'> </div><div class='del'>-		rc = scsi_add_host(ap-&gt;scsi_host, &amp;ap-&gt;tdev);</div><div class='add'>+		rc = scsi_add_host_with_dma(ap-&gt;scsi_host,</div><div class='add'>+						&amp;ap-&gt;tdev, ap-&gt;host-&gt;dev);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			goto err_add;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3838,18 +3839,25 @@ void ata_sas_port_stop(struct ata_port *ap)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ata_sas_port_stop);</div><div class='ctx'> </div><div class='del'>-int ata_sas_async_port_init(struct ata_port *ap)</div><div class='add'>+/**</div><div class='add'>+ * ata_sas_async_probe - simply schedule probing and return</div><div class='add'>+ * @ap: Port to probe</div><div class='add'>+ *</div><div class='add'>+ * For batch scheduling of probe for sas attached ata devices, assumes</div><div class='add'>+ * the port has already been through ata_sas_port_init()</div><div class='add'>+ */</div><div class='add'>+void ata_sas_async_probe(struct ata_port *ap)</div><div class='ctx'> {</div><div class='del'>-	int rc = ap-&gt;ops-&gt;port_start(ap);</div><div class='del'>-</div><div class='del'>-	if (!rc) {</div><div class='del'>-		ap-&gt;print_id = atomic_inc_return(&amp;ata_print_id);</div><div class='del'>-		__ata_port_probe(ap);</div><div class='del'>-	}</div><div class='add'>+	__ata_port_probe(ap);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ata_sas_async_probe);</div><div class='ctx'> </div><div class='del'>-	return rc;</div><div class='add'>+int ata_sas_sync_probe(struct ata_port *ap)</div><div class='add'>+{</div><div class='add'>+	return ata_port_probe(ap);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(ata_sas_async_port_init);</div><div class='add'>+EXPORT_SYMBOL_GPL(ata_sas_sync_probe);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  *	ata_sas_port_init - Initialize a SATA device</div><div class='hunk'>@@ -3866,12 +3874,10 @@ int ata_sas_port_init(struct ata_port *ap)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = ap-&gt;ops-&gt;port_start(ap);</div><div class='ctx'> </div><div class='del'>-	if (!rc) {</div><div class='del'>-		ap-&gt;print_id = atomic_inc_return(&amp;ata_print_id);</div><div class='del'>-		rc = ata_port_probe(ap);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	ap-&gt;print_id = atomic_inc_return(&amp;ata_print_id);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ata_sas_port_init);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/ata/pata_arasan_cf.c b/drivers/ata/pata_arasan_cf.c<br/>index fc2db2a89a6b..3239517f4d90 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ata/pata_arasan_cf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ata/pata_arasan_cf.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ata/pata_arasan_cf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/pata_arasan_cf.c</a></div><div class='hunk'>@@ -943,9 +943,9 @@ static int arasan_cf_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static SIMPLE_DEV_PM_OPS(arasan_cf_pm_ops, arasan_cf_suspend, arasan_cf_resume);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver arasan_cf_driver = {</div><div class='ctx'> 	.probe		= arasan_cf_probe,</div><div class='hunk'>@@ -953,9 +953,7 @@ static struct platform_driver arasan_cf_driver = {</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= DRIVER_NAME,</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='del'>-#ifdef CONFIG_PM</div><div class='ctx'> 		.pm	= &amp;arasan_cf_pm_ops,</div><div class='del'>-#endif</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/ata/pata_ep93xx.c b/drivers/ata/pata_ep93xx.c<br/>new file mode 100644<br/>index 000000000000..6ef2e3741f76<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/ata/pata_ep93xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/pata_ep93xx.c</a></div><div class='hunk'>@@ -0,0 +1,1044 @@</div><div class='add'>+/*</div><div class='add'>+ * EP93XX PATA controller driver.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012, Metasoft s.c.</div><div class='add'>+ *	Rafal Prylowski &lt;prylowski@metasoft.pl&gt;</div><div class='add'>+ *</div><div class='add'>+ * Based on pata_scc.c, pata_icside.c and on earlier version of EP93XX</div><div class='add'>+ * PATA driver by Lennert Buytenhek and Alessandro Zummo.</div><div class='add'>+ * Read/Write timings, resource management and other improvements</div><div class='add'>+ * from driver by Joao Ramos and Bartlomiej Zolnierkiewicz.</div><div class='add'>+ * DMA engine support based on spi-ep93xx.c by Mika Westerberg.</div><div class='add'>+ *</div><div class='add'>+ * Original copyrights:</div><div class='add'>+ *</div><div class='add'>+ * Support for Cirrus Logic's EP93xx (EP9312, EP9315) CPUs</div><div class='add'>+ * PATA host controller driver.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2009, Bartlomiej Zolnierkiewicz</div><div class='add'>+ *</div><div class='add'>+ * Heavily based on the ep93xx-ide.c driver:</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2009, Joao Ramos &lt;joao.ramos@inov.pt&gt;</div><div class='add'>+ *		      INESC Inovacao (INOV)</div><div class='add'>+ *</div><div class='add'>+ * EP93XX PATA controller driver.</div><div class='add'>+ * Copyright (C) 2007 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * An ATA driver for the Cirrus Logic EP93xx PATA controller.</div><div class='add'>+ *</div><div class='add'>+ * Based on an earlier version by Alessandro Zummo, which is:</div><div class='add'>+ *   Copyright (C) 2006 Tower Technologies</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/blkdev.h&gt;</div><div class='add'>+#include &lt;scsi/scsi_host.h&gt;</div><div class='add'>+#include &lt;linux/ata.h&gt;</div><div class='add'>+#include &lt;linux/libata.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/dmaengine.h&gt;</div><div class='add'>+#include &lt;linux/ktime.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/dma.h&gt;</div><div class='add'>+#include &lt;mach/platform.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_NAME	"ep93xx-ide"</div><div class='add'>+#define DRV_VERSION	"1.0"</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	/* IDE Control Register */</div><div class='add'>+	IDECTRL				= 0x00,</div><div class='add'>+	IDECTRL_CS0N			= (1 &lt;&lt; 0),</div><div class='add'>+	IDECTRL_CS1N			= (1 &lt;&lt; 1),</div><div class='add'>+	IDECTRL_DIORN			= (1 &lt;&lt; 5),</div><div class='add'>+	IDECTRL_DIOWN			= (1 &lt;&lt; 6),</div><div class='add'>+	IDECTRL_INTRQ			= (1 &lt;&lt; 9),</div><div class='add'>+	IDECTRL_IORDY			= (1 &lt;&lt; 10),</div><div class='add'>+	/*</div><div class='add'>+	 * the device IDE register to be accessed is selected through</div><div class='add'>+	 * IDECTRL register's specific bitfields 'DA', 'CS1N' and 'CS0N':</div><div class='add'>+	 *   b4   b3   b2    b1     b0</div><div class='add'>+	 *   A2   A1   A0   CS1N   CS0N</div><div class='add'>+	 * the values filled in this structure allows the value to be directly</div><div class='add'>+	 * ORed to the IDECTRL register, hence giving directly the A[2:0] and</div><div class='add'>+	 * CS1N/CS0N values for each IDE register.</div><div class='add'>+	 * The values correspond to the transformation:</div><div class='add'>+	 *   ((real IDE address) &lt;&lt; 2) | CS1N value &lt;&lt; 1 | CS0N value</div><div class='add'>+	 */</div><div class='add'>+	IDECTRL_ADDR_CMD		= 0 + 2, /* CS1 */</div><div class='add'>+	IDECTRL_ADDR_DATA		= (ATA_REG_DATA &lt;&lt; 2) + 2,</div><div class='add'>+	IDECTRL_ADDR_ERROR		= (ATA_REG_ERR &lt;&lt; 2) + 2,</div><div class='add'>+	IDECTRL_ADDR_FEATURE		= (ATA_REG_FEATURE &lt;&lt; 2) + 2,</div><div class='add'>+	IDECTRL_ADDR_NSECT		= (ATA_REG_NSECT &lt;&lt; 2) + 2,</div><div class='add'>+	IDECTRL_ADDR_LBAL		= (ATA_REG_LBAL &lt;&lt; 2) + 2,</div><div class='add'>+	IDECTRL_ADDR_LBAM		= (ATA_REG_LBAM &lt;&lt; 2) + 2,</div><div class='add'>+	IDECTRL_ADDR_LBAH		= (ATA_REG_LBAH &lt;&lt; 2) + 2,</div><div class='add'>+	IDECTRL_ADDR_DEVICE		= (ATA_REG_DEVICE &lt;&lt; 2) + 2,</div><div class='add'>+	IDECTRL_ADDR_STATUS		= (ATA_REG_STATUS &lt;&lt; 2) + 2,</div><div class='add'>+	IDECTRL_ADDR_COMMAND		= (ATA_REG_CMD &lt;&lt; 2) + 2,</div><div class='add'>+	IDECTRL_ADDR_ALTSTATUS		= (0x06 &lt;&lt; 2) + 1, /* CS0 */</div><div class='add'>+	IDECTRL_ADDR_CTL		= (0x06 &lt;&lt; 2) + 1, /* CS0 */</div><div class='add'>+</div><div class='add'>+	/* IDE Configuration Register */</div><div class='add'>+	IDECFG				= 0x04,</div><div class='add'>+	IDECFG_IDEEN			= (1 &lt;&lt; 0),</div><div class='add'>+	IDECFG_PIO			= (1 &lt;&lt; 1),</div><div class='add'>+	IDECFG_MDMA			= (1 &lt;&lt; 2),</div><div class='add'>+	IDECFG_UDMA			= (1 &lt;&lt; 3),</div><div class='add'>+	IDECFG_MODE_SHIFT		= 4,</div><div class='add'>+	IDECFG_MODE_MASK		= (0xf &lt;&lt; 4),</div><div class='add'>+	IDECFG_WST_SHIFT		= 8,</div><div class='add'>+	IDECFG_WST_MASK			= (0x3 &lt;&lt; 8),</div><div class='add'>+</div><div class='add'>+	/* MDMA Operation Register */</div><div class='add'>+	IDEMDMAOP			= 0x08,</div><div class='add'>+</div><div class='add'>+	/* UDMA Operation Register */</div><div class='add'>+	IDEUDMAOP			= 0x0c,</div><div class='add'>+	IDEUDMAOP_UEN			= (1 &lt;&lt; 0),</div><div class='add'>+	IDEUDMAOP_RWOP			= (1 &lt;&lt; 1),</div><div class='add'>+</div><div class='add'>+	/* PIO/MDMA/UDMA Data Registers */</div><div class='add'>+	IDEDATAOUT			= 0x10,</div><div class='add'>+	IDEDATAIN			= 0x14,</div><div class='add'>+	IDEMDMADATAOUT			= 0x18,</div><div class='add'>+	IDEMDMADATAIN			= 0x1c,</div><div class='add'>+	IDEUDMADATAOUT			= 0x20,</div><div class='add'>+	IDEUDMADATAIN			= 0x24,</div><div class='add'>+</div><div class='add'>+	/* UDMA Status Register */</div><div class='add'>+	IDEUDMASTS			= 0x28,</div><div class='add'>+	IDEUDMASTS_DMAIDE		= (1 &lt;&lt; 16),</div><div class='add'>+	IDEUDMASTS_INTIDE		= (1 &lt;&lt; 17),</div><div class='add'>+	IDEUDMASTS_SBUSY		= (1 &lt;&lt; 18),</div><div class='add'>+	IDEUDMASTS_NDO			= (1 &lt;&lt; 24),</div><div class='add'>+	IDEUDMASTS_NDI			= (1 &lt;&lt; 25),</div><div class='add'>+	IDEUDMASTS_N4X			= (1 &lt;&lt; 26),</div><div class='add'>+</div><div class='add'>+	/* UDMA Debug Status Register */</div><div class='add'>+	IDEUDMADEBUG			= 0x2c,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ep93xx_pata_data {</div><div class='add'>+	const struct platform_device *pdev;</div><div class='add'>+	void __iomem *ide_base;</div><div class='add'>+	struct ata_timing t;</div><div class='add'>+	bool iordy;</div><div class='add'>+</div><div class='add'>+	unsigned long udma_in_phys;</div><div class='add'>+	unsigned long udma_out_phys;</div><div class='add'>+</div><div class='add'>+	struct dma_chan *dma_rx_channel;</div><div class='add'>+	struct ep93xx_dma_data dma_rx_data;</div><div class='add'>+	struct dma_chan *dma_tx_channel;</div><div class='add'>+	struct ep93xx_dma_data dma_tx_data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ep93xx_pata_clear_regs(void __iomem *base)</div><div class='add'>+{</div><div class='add'>+	writel(IDECTRL_CS0N | IDECTRL_CS1N | IDECTRL_DIORN |</div><div class='add'>+		IDECTRL_DIOWN, base + IDECTRL);</div><div class='add'>+</div><div class='add'>+	writel(0, base + IDECFG);</div><div class='add'>+	writel(0, base + IDEMDMAOP);</div><div class='add'>+	writel(0, base + IDEUDMAOP);</div><div class='add'>+	writel(0, base + IDEDATAOUT);</div><div class='add'>+	writel(0, base + IDEDATAIN);</div><div class='add'>+	writel(0, base + IDEMDMADATAOUT);</div><div class='add'>+	writel(0, base + IDEMDMADATAIN);</div><div class='add'>+	writel(0, base + IDEUDMADATAOUT);</div><div class='add'>+	writel(0, base + IDEUDMADATAIN);</div><div class='add'>+	writel(0, base + IDEUDMADEBUG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ep93xx_pata_check_iordy(void __iomem *base)</div><div class='add'>+{</div><div class='add'>+	return !!(readl(base + IDECTRL) &amp; IDECTRL_IORDY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * According to EP93xx User's Guide, WST field of IDECFG specifies number</div><div class='add'>+ * of HCLK cycles to hold the data bus after a PIO write operation.</div><div class='add'>+ * It should be programmed to guarantee following delays:</div><div class='add'>+ *</div><div class='add'>+ * PIO Mode   [ns]</div><div class='add'>+ * 0          30</div><div class='add'>+ * 1          20</div><div class='add'>+ * 2          15</div><div class='add'>+ * 3          10</div><div class='add'>+ * 4          5</div><div class='add'>+ *</div><div class='add'>+ * Maximum possible value for HCLK is 100MHz.</div><div class='add'>+ */</div><div class='add'>+static int ep93xx_pata_get_wst(int pio_mode)</div><div class='add'>+{</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	if (pio_mode == 0)</div><div class='add'>+		val = 3;</div><div class='add'>+	else if (pio_mode &lt; 3)</div><div class='add'>+		val = 2;</div><div class='add'>+	else</div><div class='add'>+		val = 1;</div><div class='add'>+</div><div class='add'>+	return val &lt;&lt; IDECFG_WST_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ep93xx_pata_enable_pio(void __iomem *base, int pio_mode)</div><div class='add'>+{</div><div class='add'>+	writel(IDECFG_IDEEN | IDECFG_PIO |</div><div class='add'>+		ep93xx_pata_get_wst(pio_mode) |</div><div class='add'>+		(pio_mode &lt;&lt; IDECFG_MODE_SHIFT), base + IDECFG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Based on delay loop found in mach-pxa/mp900.c.</div><div class='add'>+ *</div><div class='add'>+ * Single iteration should take 5 cpu cycles. This is 25ns assuming the</div><div class='add'>+ * fastest ep93xx cpu speed (200MHz) and is better optimized for PIO4 timings</div><div class='add'>+ * than eg. 20ns.</div><div class='add'>+ */</div><div class='add'>+static void ep93xx_pata_delay(unsigned long count)</div><div class='add'>+{</div><div class='add'>+	__asm__ volatile (</div><div class='add'>+		"0:\n"</div><div class='add'>+		"mov r0, r0\n"</div><div class='add'>+		"subs %0, %1, #1\n"</div><div class='add'>+		"bge 0b\n"</div><div class='add'>+		: "=r" (count)</div><div class='add'>+		: "0" (count)</div><div class='add'>+	);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long ep93xx_pata_wait_for_iordy(void __iomem *base,</div><div class='add'>+						unsigned long t2)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * According to ATA specification, IORDY pin can be first sampled</div><div class='add'>+	 * tA = 35ns after activation of DIOR-/DIOW-. Maximum IORDY pulse</div><div class='add'>+	 * width is tB = 1250ns.</div><div class='add'>+	 *</div><div class='add'>+	 * We are already t2 delay loop iterations after activation of</div><div class='add'>+	 * DIOR-/DIOW-, so we set timeout to (1250 + 35) / 25 - t2 additional</div><div class='add'>+	 * delay loop iterations.</div><div class='add'>+	 */</div><div class='add'>+	unsigned long start = (1250 + 35) / 25 - t2;</div><div class='add'>+	unsigned long counter = start;</div><div class='add'>+</div><div class='add'>+	while (!ep93xx_pata_check_iordy(base) &amp;&amp; counter--)</div><div class='add'>+		ep93xx_pata_delay(1);</div><div class='add'>+	return start - counter;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* common part at start of ep93xx_pata_read/write() */</div><div class='add'>+static void ep93xx_pata_rw_begin(void __iomem *base, unsigned long addr,</div><div class='add'>+				 unsigned long t1)</div><div class='add'>+{</div><div class='add'>+	writel(IDECTRL_DIOWN | IDECTRL_DIORN | addr, base + IDECTRL);</div><div class='add'>+	ep93xx_pata_delay(t1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* common part at end of ep93xx_pata_read/write() */</div><div class='add'>+static void ep93xx_pata_rw_end(void __iomem *base, unsigned long addr,</div><div class='add'>+			       bool iordy, unsigned long t0, unsigned long t2,</div><div class='add'>+			       unsigned long t2i)</div><div class='add'>+{</div><div class='add'>+	ep93xx_pata_delay(t2);</div><div class='add'>+	/* lengthen t2 if needed */</div><div class='add'>+	if (iordy)</div><div class='add'>+		t2 += ep93xx_pata_wait_for_iordy(base, t2);</div><div class='add'>+	writel(IDECTRL_DIOWN | IDECTRL_DIORN | addr, base + IDECTRL);</div><div class='add'>+	if (t0 &gt; t2 &amp;&amp; t0 - t2 &gt; t2i)</div><div class='add'>+		ep93xx_pata_delay(t0 - t2);</div><div class='add'>+	else</div><div class='add'>+		ep93xx_pata_delay(t2i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 ep93xx_pata_read(struct ep93xx_pata_data *drv_data,</div><div class='add'>+			    unsigned long addr,</div><div class='add'>+			    bool reg)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = drv_data-&gt;ide_base;</div><div class='add'>+	const struct ata_timing *t = &amp;drv_data-&gt;t;</div><div class='add'>+	unsigned long t0 = reg ? t-&gt;cyc8b : t-&gt;cycle;</div><div class='add'>+	unsigned long t2 = reg ? t-&gt;act8b : t-&gt;active;</div><div class='add'>+	unsigned long t2i = reg ? t-&gt;rec8b : t-&gt;recover;</div><div class='add'>+</div><div class='add'>+	ep93xx_pata_rw_begin(base, addr, t-&gt;setup);</div><div class='add'>+	writel(IDECTRL_DIOWN | addr, base + IDECTRL);</div><div class='add'>+	/*</div><div class='add'>+	 * The IDEDATAIN register is loaded from the DD pins at the positive</div><div class='add'>+	 * edge of the DIORN signal. (EP93xx UG p27-14)</div><div class='add'>+	 */</div><div class='add'>+	ep93xx_pata_rw_end(base, addr, drv_data-&gt;iordy, t0, t2, t2i);</div><div class='add'>+	return readl(base + IDEDATAIN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* IDE register read */</div><div class='add'>+static u16 ep93xx_pata_read_reg(struct ep93xx_pata_data *drv_data,</div><div class='add'>+				unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	return ep93xx_pata_read(drv_data, addr, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* PIO data read */</div><div class='add'>+static u16 ep93xx_pata_read_data(struct ep93xx_pata_data *drv_data,</div><div class='add'>+				 unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	return ep93xx_pata_read(drv_data, addr, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ep93xx_pata_write(struct ep93xx_pata_data *drv_data,</div><div class='add'>+			      u16 value, unsigned long addr,</div><div class='add'>+			      bool reg)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = drv_data-&gt;ide_base;</div><div class='add'>+	const struct ata_timing *t = &amp;drv_data-&gt;t;</div><div class='add'>+	unsigned long t0 = reg ? t-&gt;cyc8b : t-&gt;cycle;</div><div class='add'>+	unsigned long t2 = reg ? t-&gt;act8b : t-&gt;active;</div><div class='add'>+	unsigned long t2i = reg ? t-&gt;rec8b : t-&gt;recover;</div><div class='add'>+</div><div class='add'>+	ep93xx_pata_rw_begin(base, addr, t-&gt;setup);</div><div class='add'>+	/*</div><div class='add'>+	 * Value from IDEDATAOUT register is driven onto the DD pins when</div><div class='add'>+	 * DIOWN is low. (EP93xx UG p27-13)</div><div class='add'>+	 */</div><div class='add'>+	writel(value, base + IDEDATAOUT);</div><div class='add'>+	writel(IDECTRL_DIORN | addr, base + IDECTRL);</div><div class='add'>+	ep93xx_pata_rw_end(base, addr, drv_data-&gt;iordy, t0, t2, t2i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* IDE register write */</div><div class='add'>+static void ep93xx_pata_write_reg(struct ep93xx_pata_data *drv_data,</div><div class='add'>+				  u16 value, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	ep93xx_pata_write(drv_data, value, addr, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* PIO data write */</div><div class='add'>+static void ep93xx_pata_write_data(struct ep93xx_pata_data *drv_data,</div><div class='add'>+				   u16 value, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	ep93xx_pata_write(drv_data, value, addr, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ep93xx_pata_set_piomode(struct ata_port *ap,</div><div class='add'>+				    struct ata_device *adev)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+	struct ata_device *pair = ata_dev_pair(adev);</div><div class='add'>+	/*</div><div class='add'>+	 * Calculate timings for the delay loop, assuming ep93xx cpu speed</div><div class='add'>+	 * is 200MHz (maximum possible for ep93xx). If actual cpu speed is</div><div class='add'>+	 * slower, we will wait a bit longer in each delay.</div><div class='add'>+	 * Additional division of cpu speed by 5, because single iteration</div><div class='add'>+	 * of our delay loop takes 5 cpu cycles (25ns).</div><div class='add'>+	 */</div><div class='add'>+	unsigned long T = 1000000 / (200 / 5);</div><div class='add'>+</div><div class='add'>+	ata_timing_compute(adev, adev-&gt;pio_mode, &amp;drv_data-&gt;t, T, 0);</div><div class='add'>+	if (pair &amp;&amp; pair-&gt;pio_mode) {</div><div class='add'>+		struct ata_timing t;</div><div class='add'>+		ata_timing_compute(pair, pair-&gt;pio_mode, &amp;t, T, 0);</div><div class='add'>+		ata_timing_merge(&amp;t, &amp;drv_data-&gt;t, &amp;drv_data-&gt;t,</div><div class='add'>+			ATA_TIMING_SETUP | ATA_TIMING_8BIT);</div><div class='add'>+	}</div><div class='add'>+	drv_data-&gt;iordy = ata_pio_need_iordy(adev);</div><div class='add'>+</div><div class='add'>+	ep93xx_pata_enable_pio(drv_data-&gt;ide_base,</div><div class='add'>+			       adev-&gt;pio_mode - XFER_PIO_0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: original code is ata_sff_check_status */</div><div class='add'>+static u8 ep93xx_pata_check_status(struct ata_port *ap)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	return ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_STATUS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 ep93xx_pata_check_altstatus(struct ata_port *ap)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	return ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_ALTSTATUS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: original code is ata_sff_tf_load */</div><div class='add'>+static void ep93xx_pata_tf_load(struct ata_port *ap,</div><div class='add'>+				const struct ata_taskfile *tf)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+	unsigned int is_addr = tf-&gt;flags &amp; ATA_TFLAG_ISADDR;</div><div class='add'>+</div><div class='add'>+	if (tf-&gt;ctl != ap-&gt;last_ctl) {</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;ctl, IDECTRL_ADDR_CTL);</div><div class='add'>+		ap-&gt;last_ctl = tf-&gt;ctl;</div><div class='add'>+		ata_wait_idle(ap);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_addr &amp;&amp; (tf-&gt;flags &amp; ATA_TFLAG_LBA48)) {</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;hob_feature,</div><div class='add'>+			IDECTRL_ADDR_FEATURE);</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;hob_nsect,</div><div class='add'>+			IDECTRL_ADDR_NSECT);</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;hob_lbal,</div><div class='add'>+			IDECTRL_ADDR_LBAL);</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;hob_lbam,</div><div class='add'>+			IDECTRL_ADDR_LBAM);</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;hob_lbah,</div><div class='add'>+			IDECTRL_ADDR_LBAH);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_addr) {</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;feature,</div><div class='add'>+			IDECTRL_ADDR_FEATURE);</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;nsect, IDECTRL_ADDR_NSECT);</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;lbal, IDECTRL_ADDR_LBAL);</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;lbam, IDECTRL_ADDR_LBAM);</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;lbah, IDECTRL_ADDR_LBAH);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tf-&gt;flags &amp; ATA_TFLAG_DEVICE)</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;device,</div><div class='add'>+			IDECTRL_ADDR_DEVICE);</div><div class='add'>+</div><div class='add'>+	ata_wait_idle(ap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: original code is ata_sff_tf_read */</div><div class='add'>+static void ep93xx_pata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	tf-&gt;command = ep93xx_pata_check_status(ap);</div><div class='add'>+	tf-&gt;feature = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_FEATURE);</div><div class='add'>+	tf-&gt;nsect = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_NSECT);</div><div class='add'>+	tf-&gt;lbal = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_LBAL);</div><div class='add'>+	tf-&gt;lbam = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_LBAM);</div><div class='add'>+	tf-&gt;lbah = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_LBAH);</div><div class='add'>+	tf-&gt;device = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_DEVICE);</div><div class='add'>+</div><div class='add'>+	if (tf-&gt;flags &amp; ATA_TFLAG_LBA48) {</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;ctl | ATA_HOB,</div><div class='add'>+			IDECTRL_ADDR_CTL);</div><div class='add'>+		tf-&gt;hob_feature = ep93xx_pata_read_reg(drv_data,</div><div class='add'>+			IDECTRL_ADDR_FEATURE);</div><div class='add'>+		tf-&gt;hob_nsect = ep93xx_pata_read_reg(drv_data,</div><div class='add'>+			IDECTRL_ADDR_NSECT);</div><div class='add'>+		tf-&gt;hob_lbal = ep93xx_pata_read_reg(drv_data,</div><div class='add'>+			IDECTRL_ADDR_LBAL);</div><div class='add'>+		tf-&gt;hob_lbam = ep93xx_pata_read_reg(drv_data,</div><div class='add'>+			IDECTRL_ADDR_LBAM);</div><div class='add'>+		tf-&gt;hob_lbah = ep93xx_pata_read_reg(drv_data,</div><div class='add'>+			IDECTRL_ADDR_LBAH);</div><div class='add'>+		ep93xx_pata_write_reg(drv_data, tf-&gt;ctl, IDECTRL_ADDR_CTL);</div><div class='add'>+		ap-&gt;last_ctl = tf-&gt;ctl;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: original code is ata_sff_exec_command */</div><div class='add'>+static void ep93xx_pata_exec_command(struct ata_port *ap,</div><div class='add'>+				     const struct ata_taskfile *tf)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	ep93xx_pata_write_reg(drv_data, tf-&gt;command,</div><div class='add'>+			  IDECTRL_ADDR_COMMAND);</div><div class='add'>+	ata_sff_pause(ap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: original code is ata_sff_dev_select */</div><div class='add'>+static void ep93xx_pata_dev_select(struct ata_port *ap, unsigned int device)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+	u8 tmp = ATA_DEVICE_OBS;</div><div class='add'>+</div><div class='add'>+	if (device != 0)</div><div class='add'>+		tmp |= ATA_DEV1;</div><div class='add'>+</div><div class='add'>+	ep93xx_pata_write_reg(drv_data, tmp, IDECTRL_ADDR_DEVICE);</div><div class='add'>+	ata_sff_pause(ap);	/* needed; also flushes, for mmio */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: original code is ata_sff_set_devctl */</div><div class='add'>+static void ep93xx_pata_set_devctl(struct ata_port *ap, u8 ctl)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	ep93xx_pata_write_reg(drv_data, ctl, IDECTRL_ADDR_CTL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: original code is ata_sff_data_xfer */</div><div class='add'>+static unsigned int ep93xx_pata_data_xfer(struct ata_device *adev,</div><div class='add'>+					  unsigned char *buf,</div><div class='add'>+					  unsigned int buflen, int rw)</div><div class='add'>+{</div><div class='add'>+	struct ata_port *ap = adev-&gt;link-&gt;ap;</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+	u16 *data = (u16 *)buf;</div><div class='add'>+	unsigned int words = buflen &gt;&gt; 1;</div><div class='add'>+</div><div class='add'>+	/* Transfer multiple of 2 bytes */</div><div class='add'>+	while (words--)</div><div class='add'>+		if (rw == READ)</div><div class='add'>+			*data++ = cpu_to_le16(</div><div class='add'>+				ep93xx_pata_read_data(</div><div class='add'>+					drv_data, IDECTRL_ADDR_DATA));</div><div class='add'>+		else</div><div class='add'>+			ep93xx_pata_write_data(drv_data, le16_to_cpu(*data++),</div><div class='add'>+				IDECTRL_ADDR_DATA);</div><div class='add'>+</div><div class='add'>+	/* Transfer trailing 1 byte, if any. */</div><div class='add'>+	if (unlikely(buflen &amp; 0x01)) {</div><div class='add'>+		unsigned char pad[2] = { };</div><div class='add'>+</div><div class='add'>+		buf += buflen - 1;</div><div class='add'>+</div><div class='add'>+		if (rw == READ) {</div><div class='add'>+			*pad = cpu_to_le16(</div><div class='add'>+				ep93xx_pata_read_data(</div><div class='add'>+					drv_data, IDECTRL_ADDR_DATA));</div><div class='add'>+			*buf = pad[0];</div><div class='add'>+		} else {</div><div class='add'>+			pad[0] = *buf;</div><div class='add'>+			ep93xx_pata_write_data(drv_data, le16_to_cpu(*pad),</div><div class='add'>+					  IDECTRL_ADDR_DATA);</div><div class='add'>+		}</div><div class='add'>+		words++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return words &lt;&lt; 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: original code is ata_devchk */</div><div class='add'>+static bool ep93xx_pata_device_is_present(struct ata_port *ap,</div><div class='add'>+					  unsigned int device)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+	u8 nsect, lbal;</div><div class='add'>+</div><div class='add'>+	ap-&gt;ops-&gt;sff_dev_select(ap, device);</div><div class='add'>+</div><div class='add'>+	ep93xx_pata_write_reg(drv_data, 0x55, IDECTRL_ADDR_NSECT);</div><div class='add'>+	ep93xx_pata_write_reg(drv_data, 0xaa, IDECTRL_ADDR_LBAL);</div><div class='add'>+</div><div class='add'>+	ep93xx_pata_write_reg(drv_data, 0xaa, IDECTRL_ADDR_NSECT);</div><div class='add'>+	ep93xx_pata_write_reg(drv_data, 0x55, IDECTRL_ADDR_LBAL);</div><div class='add'>+</div><div class='add'>+	ep93xx_pata_write_reg(drv_data, 0x55, IDECTRL_ADDR_NSECT);</div><div class='add'>+	ep93xx_pata_write_reg(drv_data, 0xaa, IDECTRL_ADDR_LBAL);</div><div class='add'>+</div><div class='add'>+	nsect = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_NSECT);</div><div class='add'>+	lbal = ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_LBAL);</div><div class='add'>+</div><div class='add'>+	if ((nsect == 0x55) &amp;&amp; (lbal == 0xaa))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: original code is ata_sff_wait_after_reset */</div><div class='add'>+static int ep93xx_pata_wait_after_reset(struct ata_link *link,</div><div class='add'>+					unsigned int devmask,</div><div class='add'>+					unsigned long deadline)</div><div class='add'>+{</div><div class='add'>+	struct ata_port *ap = link-&gt;ap;</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+	unsigned int dev0 = devmask &amp; (1 &lt;&lt; 0);</div><div class='add'>+	unsigned int dev1 = devmask &amp; (1 &lt;&lt; 1);</div><div class='add'>+	int rc, ret = 0;</div><div class='add'>+</div><div class='add'>+	ata_msleep(ap, ATA_WAIT_AFTER_RESET);</div><div class='add'>+</div><div class='add'>+	/* always check readiness of the master device */</div><div class='add'>+	rc = ata_sff_wait_ready(link, deadline);</div><div class='add'>+	/*</div><div class='add'>+	 * -ENODEV means the odd clown forgot the D7 pulldown resistor</div><div class='add'>+	 * and TF status is 0xff, bail out on it too.</div><div class='add'>+	 */</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * if device 1 was found in ata_devchk, wait for register</div><div class='add'>+	 * access briefly, then wait for BSY to clear.</div><div class='add'>+	 */</div><div class='add'>+	if (dev1) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		ap-&gt;ops-&gt;sff_dev_select(ap, 1);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Wait for register access.  Some ATAPI devices fail</div><div class='add'>+		 * to set nsect/lbal after reset, so don't waste too</div><div class='add'>+		 * much time on it.  We're gonna wait for !BSY anyway.</div><div class='add'>+		 */</div><div class='add'>+		for (i = 0; i &lt; 2; i++) {</div><div class='add'>+			u8 nsect, lbal;</div><div class='add'>+</div><div class='add'>+			nsect = ep93xx_pata_read_reg(drv_data,</div><div class='add'>+				IDECTRL_ADDR_NSECT);</div><div class='add'>+			lbal = ep93xx_pata_read_reg(drv_data,</div><div class='add'>+				IDECTRL_ADDR_LBAL);</div><div class='add'>+			if (nsect == 1 &amp;&amp; lbal == 1)</div><div class='add'>+				break;</div><div class='add'>+			msleep(50);	/* give drive a breather */</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rc = ata_sff_wait_ready(link, deadline);</div><div class='add'>+		if (rc) {</div><div class='add'>+			if (rc != -ENODEV)</div><div class='add'>+				return rc;</div><div class='add'>+			ret = rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/* is all this really necessary? */</div><div class='add'>+	ap-&gt;ops-&gt;sff_dev_select(ap, 0);</div><div class='add'>+	if (dev1)</div><div class='add'>+		ap-&gt;ops-&gt;sff_dev_select(ap, 1);</div><div class='add'>+	if (dev0)</div><div class='add'>+		ap-&gt;ops-&gt;sff_dev_select(ap, 0);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: original code is ata_bus_softreset */</div><div class='add'>+static int ep93xx_pata_bus_softreset(struct ata_port *ap, unsigned int devmask,</div><div class='add'>+				     unsigned long deadline)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	ep93xx_pata_write_reg(drv_data, ap-&gt;ctl, IDECTRL_ADDR_CTL);</div><div class='add'>+	udelay(20);		/* FIXME: flush */</div><div class='add'>+	ep93xx_pata_write_reg(drv_data, ap-&gt;ctl | ATA_SRST, IDECTRL_ADDR_CTL);</div><div class='add'>+	udelay(20);		/* FIXME: flush */</div><div class='add'>+	ep93xx_pata_write_reg(drv_data, ap-&gt;ctl, IDECTRL_ADDR_CTL);</div><div class='add'>+	ap-&gt;last_ctl = ap-&gt;ctl;</div><div class='add'>+</div><div class='add'>+	return ep93xx_pata_wait_after_reset(&amp;ap-&gt;link, devmask, deadline);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ep93xx_pata_release_dma(struct ep93xx_pata_data *drv_data)</div><div class='add'>+{</div><div class='add'>+	if (drv_data-&gt;dma_rx_channel) {</div><div class='add'>+		dma_release_channel(drv_data-&gt;dma_rx_channel);</div><div class='add'>+		drv_data-&gt;dma_rx_channel = NULL;</div><div class='add'>+	}</div><div class='add'>+	if (drv_data-&gt;dma_tx_channel) {</div><div class='add'>+		dma_release_channel(drv_data-&gt;dma_tx_channel);</div><div class='add'>+		drv_data-&gt;dma_tx_channel = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ep93xx_pata_dma_filter(struct dma_chan *chan, void *filter_param)</div><div class='add'>+{</div><div class='add'>+	if (ep93xx_dma_chan_is_m2p(chan))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	chan-&gt;private = filter_param;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ep93xx_pata_dma_init(struct ep93xx_pata_data *drv_data)</div><div class='add'>+{</div><div class='add'>+	const struct platform_device *pdev = drv_data-&gt;pdev;</div><div class='add'>+	dma_cap_mask_t mask;</div><div class='add'>+	struct dma_slave_config conf;</div><div class='add'>+</div><div class='add'>+	dma_cap_zero(mask);</div><div class='add'>+	dma_cap_set(DMA_SLAVE, mask);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Request two channels for IDE. Another possibility would be</div><div class='add'>+	 * to request only one channel, and reprogram it's direction at</div><div class='add'>+	 * start of new transfer.</div><div class='add'>+	 */</div><div class='add'>+	drv_data-&gt;dma_rx_data.port = EP93XX_DMA_IDE;</div><div class='add'>+	drv_data-&gt;dma_rx_data.direction = DMA_FROM_DEVICE;</div><div class='add'>+	drv_data-&gt;dma_rx_data.name = "ep93xx-pata-rx";</div><div class='add'>+	drv_data-&gt;dma_rx_channel = dma_request_channel(mask,</div><div class='add'>+		ep93xx_pata_dma_filter, &amp;drv_data-&gt;dma_rx_data);</div><div class='add'>+	if (!drv_data-&gt;dma_rx_channel)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	drv_data-&gt;dma_tx_data.port = EP93XX_DMA_IDE;</div><div class='add'>+	drv_data-&gt;dma_tx_data.direction = DMA_TO_DEVICE;</div><div class='add'>+	drv_data-&gt;dma_tx_data.name = "ep93xx-pata-tx";</div><div class='add'>+	drv_data-&gt;dma_tx_channel = dma_request_channel(mask,</div><div class='add'>+		ep93xx_pata_dma_filter, &amp;drv_data-&gt;dma_tx_data);</div><div class='add'>+	if (!drv_data-&gt;dma_tx_channel) {</div><div class='add'>+		dma_release_channel(drv_data-&gt;dma_rx_channel);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure receive channel direction and source address */</div><div class='add'>+	memset(&amp;conf, 0, sizeof(conf));</div><div class='add'>+	conf.direction = DMA_FROM_DEVICE;</div><div class='add'>+	conf.src_addr = drv_data-&gt;udma_in_phys;</div><div class='add'>+	conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;</div><div class='add'>+	if (dmaengine_slave_config(drv_data-&gt;dma_rx_channel, &amp;conf)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to configure rx dma channel\n");</div><div class='add'>+		ep93xx_pata_release_dma(drv_data);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure transmit channel direction and destination address */</div><div class='add'>+	memset(&amp;conf, 0, sizeof(conf));</div><div class='add'>+	conf.direction = DMA_TO_DEVICE;</div><div class='add'>+	conf.dst_addr = drv_data-&gt;udma_out_phys;</div><div class='add'>+	conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;</div><div class='add'>+	if (dmaengine_slave_config(drv_data-&gt;dma_tx_channel, &amp;conf)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to configure tx dma channel\n");</div><div class='add'>+		ep93xx_pata_release_dma(drv_data);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ep93xx_pata_dma_start(struct ata_queued_cmd *qc)</div><div class='add'>+{</div><div class='add'>+	struct dma_async_tx_descriptor *txd;</div><div class='add'>+	struct ep93xx_pata_data *drv_data = qc-&gt;ap-&gt;host-&gt;private_data;</div><div class='add'>+	void __iomem *base = drv_data-&gt;ide_base;</div><div class='add'>+	struct ata_device *adev = qc-&gt;dev;</div><div class='add'>+	u32 v = qc-&gt;dma_dir == DMA_TO_DEVICE ? IDEUDMAOP_RWOP : 0;</div><div class='add'>+	struct dma_chan *channel = qc-&gt;dma_dir == DMA_TO_DEVICE</div><div class='add'>+		? drv_data-&gt;dma_tx_channel : drv_data-&gt;dma_rx_channel;</div><div class='add'>+</div><div class='add'>+	txd = channel-&gt;device-&gt;device_prep_slave_sg(channel, qc-&gt;sg,</div><div class='add'>+		 qc-&gt;n_elem, qc-&gt;dma_dir, DMA_CTRL_ACK, NULL);</div><div class='add'>+	if (!txd) {</div><div class='add'>+		dev_err(qc-&gt;ap-&gt;dev, "failed to prepare slave for sg dma\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	txd-&gt;callback = NULL;</div><div class='add'>+	txd-&gt;callback_param = NULL;</div><div class='add'>+</div><div class='add'>+	if (dmaengine_submit(txd) &lt; 0) {</div><div class='add'>+		dev_err(qc-&gt;ap-&gt;dev, "failed to submit dma transfer\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	dma_async_issue_pending(channel);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * When enabling UDMA operation, IDEUDMAOP register needs to be</div><div class='add'>+	 * programmed in three step sequence:</div><div class='add'>+	 * 1) set or clear the RWOP bit,</div><div class='add'>+	 * 2) perform dummy read of the register,</div><div class='add'>+	 * 3) set the UEN bit.</div><div class='add'>+	 */</div><div class='add'>+	writel(v, base + IDEUDMAOP);</div><div class='add'>+	readl(base + IDEUDMAOP);</div><div class='add'>+	writel(v | IDEUDMAOP_UEN, base + IDEUDMAOP);</div><div class='add'>+</div><div class='add'>+	writel(IDECFG_IDEEN | IDECFG_UDMA |</div><div class='add'>+		((adev-&gt;xfer_mode - XFER_UDMA_0) &lt;&lt; IDECFG_MODE_SHIFT),</div><div class='add'>+		base + IDECFG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ep93xx_pata_dma_stop(struct ata_queued_cmd *qc)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = qc-&gt;ap-&gt;host-&gt;private_data;</div><div class='add'>+	void __iomem *base = drv_data-&gt;ide_base;</div><div class='add'>+</div><div class='add'>+	/* terminate all dma transfers, if not yet finished */</div><div class='add'>+	dmaengine_terminate_all(drv_data-&gt;dma_rx_channel);</div><div class='add'>+	dmaengine_terminate_all(drv_data-&gt;dma_tx_channel);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * To properly stop IDE-DMA, IDEUDMAOP register must to be cleared</div><div class='add'>+	 * and IDECTRL register must be set to default value.</div><div class='add'>+	 */</div><div class='add'>+	writel(0, base + IDEUDMAOP);</div><div class='add'>+	writel(readl(base + IDECTRL) | IDECTRL_DIOWN | IDECTRL_DIORN |</div><div class='add'>+		IDECTRL_CS0N | IDECTRL_CS1N, base + IDECTRL);</div><div class='add'>+</div><div class='add'>+	ep93xx_pata_enable_pio(drv_data-&gt;ide_base,</div><div class='add'>+		qc-&gt;dev-&gt;pio_mode - XFER_PIO_0);</div><div class='add'>+</div><div class='add'>+	ata_sff_dma_pause(qc-&gt;ap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ep93xx_pata_dma_setup(struct ata_queued_cmd *qc)</div><div class='add'>+{</div><div class='add'>+	qc-&gt;ap-&gt;ops-&gt;sff_exec_command(qc-&gt;ap, &amp;qc-&gt;tf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 ep93xx_pata_dma_status(struct ata_port *ap)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+	u32 val = readl(drv_data-&gt;ide_base + IDEUDMASTS);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * UDMA Status Register bits:</div><div class='add'>+	 *</div><div class='add'>+	 * DMAIDE - DMA request signal from UDMA state machine,</div><div class='add'>+	 * INTIDE - INT line generated by UDMA because of errors in the</div><div class='add'>+	 *          state machine,</div><div class='add'>+	 * SBUSY - UDMA state machine busy, not in idle state,</div><div class='add'>+	 * NDO   - error for data-out not completed,</div><div class='add'>+	 * NDI   - error for data-in not completed,</div><div class='add'>+	 * N4X   - error for data transferred not multiplies of four</div><div class='add'>+	 *         32-bit words.</div><div class='add'>+	 * (EP93xx UG p27-17)</div><div class='add'>+	 */</div><div class='add'>+	if (val &amp; IDEUDMASTS_NDO || val &amp; IDEUDMASTS_NDI ||</div><div class='add'>+	    val &amp; IDEUDMASTS_N4X || val &amp; IDEUDMASTS_INTIDE)</div><div class='add'>+		return ATA_DMA_ERR;</div><div class='add'>+</div><div class='add'>+	/* read INTRQ (INT[3]) pin input state */</div><div class='add'>+	if (readl(drv_data-&gt;ide_base + IDECTRL) &amp; IDECTRL_INTRQ)</div><div class='add'>+		return ATA_DMA_INTR;</div><div class='add'>+</div><div class='add'>+	if (val &amp; IDEUDMASTS_SBUSY || val &amp; IDEUDMASTS_DMAIDE)</div><div class='add'>+		return ATA_DMA_ACTIVE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: original code is ata_sff_softreset */</div><div class='add'>+static int ep93xx_pata_softreset(struct ata_link *al, unsigned int *classes,</div><div class='add'>+				 unsigned long deadline)</div><div class='add'>+{</div><div class='add'>+	struct ata_port *ap = al-&gt;ap;</div><div class='add'>+	unsigned int slave_possible = ap-&gt;flags &amp; ATA_FLAG_SLAVE_POSS;</div><div class='add'>+	unsigned int devmask = 0;</div><div class='add'>+	int rc;</div><div class='add'>+	u8 err;</div><div class='add'>+</div><div class='add'>+	/* determine if device 0/1 are present */</div><div class='add'>+	if (ep93xx_pata_device_is_present(ap, 0))</div><div class='add'>+		devmask |= (1 &lt;&lt; 0);</div><div class='add'>+	if (slave_possible &amp;&amp; ep93xx_pata_device_is_present(ap, 1))</div><div class='add'>+		devmask |= (1 &lt;&lt; 1);</div><div class='add'>+</div><div class='add'>+	/* select device 0 again */</div><div class='add'>+	ap-&gt;ops-&gt;sff_dev_select(al-&gt;ap, 0);</div><div class='add'>+</div><div class='add'>+	/* issue bus reset */</div><div class='add'>+	rc = ep93xx_pata_bus_softreset(ap, devmask, deadline);</div><div class='add'>+	/* if link is ocuppied, -ENODEV too is an error */</div><div class='add'>+	if (rc &amp;&amp; (rc != -ENODEV || sata_scr_valid(al))) {</div><div class='add'>+		ata_link_printk(al, KERN_ERR, "SRST failed (errno=%d)\n",</div><div class='add'>+				rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* determine by signature whether we have ATA or ATAPI devices */</div><div class='add'>+	classes[0] = ata_sff_dev_classify(&amp;al-&gt;device[0], devmask &amp; (1 &lt;&lt; 0),</div><div class='add'>+					  &amp;err);</div><div class='add'>+	if (slave_possible &amp;&amp; err != 0x81)</div><div class='add'>+		classes[1] = ata_sff_dev_classify(&amp;al-&gt;device[1],</div><div class='add'>+						  devmask &amp; (1 &lt;&lt; 1), &amp;err);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: original code is ata_sff_drain_fifo */</div><div class='add'>+static void ep93xx_pata_drain_fifo(struct ata_queued_cmd *qc)</div><div class='add'>+{</div><div class='add'>+	int count;</div><div class='add'>+	struct ata_port *ap;</div><div class='add'>+	struct ep93xx_pata_data *drv_data;</div><div class='add'>+</div><div class='add'>+	/* We only need to flush incoming data when a command was running */</div><div class='add'>+	if (qc == NULL || qc-&gt;dma_dir == DMA_TO_DEVICE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ap = qc-&gt;ap;</div><div class='add'>+	drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+	/* Drain up to 64K of data before we give up this recovery method */</div><div class='add'>+	for (count = 0; (ap-&gt;ops-&gt;sff_check_status(ap) &amp; ATA_DRQ)</div><div class='add'>+		     &amp;&amp; count &lt; 65536; count += 2)</div><div class='add'>+		ep93xx_pata_read_reg(drv_data, IDECTRL_ADDR_DATA);</div><div class='add'>+</div><div class='add'>+	/* Can become DEBUG later */</div><div class='add'>+	if (count)</div><div class='add'>+		ata_port_printk(ap, KERN_DEBUG,</div><div class='add'>+				"drained %d bytes to clear DRQ.\n", count);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ep93xx_pata_port_start(struct ata_port *ap)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data = ap-&gt;host-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set timings to safe values at startup (= number of ns from ATA</div><div class='add'>+	 * specification), we'll switch to properly calculated values later.</div><div class='add'>+	 */</div><div class='add'>+	drv_data-&gt;t = *ata_timing_find_mode(XFER_PIO_0);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct scsi_host_template ep93xx_pata_sht = {</div><div class='add'>+	ATA_BASE_SHT(DRV_NAME),</div><div class='add'>+	/* ep93xx dma implementation limit */</div><div class='add'>+	.sg_tablesize		= 32,</div><div class='add'>+	/* ep93xx dma can't transfer 65536 bytes at once */</div><div class='add'>+	.dma_boundary		= 0x7fff,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ata_port_operations ep93xx_pata_port_ops = {</div><div class='add'>+	.inherits		= &amp;ata_bmdma_port_ops,</div><div class='add'>+</div><div class='add'>+	.qc_prep		= ata_noop_qc_prep,</div><div class='add'>+</div><div class='add'>+	.softreset		= ep93xx_pata_softreset,</div><div class='add'>+	.hardreset		= ATA_OP_NULL,</div><div class='add'>+</div><div class='add'>+	.sff_dev_select		= ep93xx_pata_dev_select,</div><div class='add'>+	.sff_set_devctl		= ep93xx_pata_set_devctl,</div><div class='add'>+	.sff_check_status	= ep93xx_pata_check_status,</div><div class='add'>+	.sff_check_altstatus	= ep93xx_pata_check_altstatus,</div><div class='add'>+	.sff_tf_load		= ep93xx_pata_tf_load,</div><div class='add'>+	.sff_tf_read		= ep93xx_pata_tf_read,</div><div class='add'>+	.sff_exec_command	= ep93xx_pata_exec_command,</div><div class='add'>+	.sff_data_xfer		= ep93xx_pata_data_xfer,</div><div class='add'>+	.sff_drain_fifo		= ep93xx_pata_drain_fifo,</div><div class='add'>+	.sff_irq_clear		= ATA_OP_NULL,</div><div class='add'>+</div><div class='add'>+	.set_piomode		= ep93xx_pata_set_piomode,</div><div class='add'>+</div><div class='add'>+	.bmdma_setup		= ep93xx_pata_dma_setup,</div><div class='add'>+	.bmdma_start		= ep93xx_pata_dma_start,</div><div class='add'>+	.bmdma_stop		= ep93xx_pata_dma_stop,</div><div class='add'>+	.bmdma_status		= ep93xx_pata_dma_status,</div><div class='add'>+</div><div class='add'>+	.cable_detect		= ata_cable_unknown,</div><div class='add'>+	.port_start		= ep93xx_pata_port_start,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit ep93xx_pata_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct ep93xx_pata_data *drv_data;</div><div class='add'>+	struct ata_host *host;</div><div class='add'>+	struct ata_port *ap;</div><div class='add'>+	unsigned int irq;</div><div class='add'>+	struct resource *mem_res;</div><div class='add'>+	void __iomem *ide_base;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ep93xx_ide_acquire_gpio(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* INT[3] (IRQ_EP93XX_EXT3) line connected as pull down */</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0) {</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto err_rel_gpio;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!mem_res) {</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto err_rel_gpio;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ide_base = devm_request_and_ioremap(&amp;pdev-&gt;dev, mem_res);</div><div class='add'>+	if (!ide_base) {</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto err_rel_gpio;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drv_data = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*drv_data), GFP_KERNEL);</div><div class='add'>+	if (!drv_data) {</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto err_rel_gpio;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, drv_data);</div><div class='add'>+	drv_data-&gt;pdev = pdev;</div><div class='add'>+	drv_data-&gt;ide_base = ide_base;</div><div class='add'>+	drv_data-&gt;udma_in_phys = mem_res-&gt;start + IDEUDMADATAIN;</div><div class='add'>+	drv_data-&gt;udma_out_phys = mem_res-&gt;start + IDEUDMADATAOUT;</div><div class='add'>+	ep93xx_pata_dma_init(drv_data);</div><div class='add'>+</div><div class='add'>+	/* allocate host */</div><div class='add'>+	host = ata_host_alloc(&amp;pdev-&gt;dev, 1);</div><div class='add'>+	if (!host) {</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto err_rel_dma;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ep93xx_pata_clear_regs(ide_base);</div><div class='add'>+</div><div class='add'>+	host-&gt;private_data = drv_data;</div><div class='add'>+</div><div class='add'>+	ap = host-&gt;ports[0];</div><div class='add'>+	ap-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	ap-&gt;ops = &amp;ep93xx_pata_port_ops;</div><div class='add'>+	ap-&gt;flags |= ATA_FLAG_SLAVE_POSS;</div><div class='add'>+	ap-&gt;pio_mask = ATA_PIO4;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Maximum UDMA modes:</div><div class='add'>+	 * EP931x rev.E0 - UDMA2</div><div class='add'>+	 * EP931x rev.E1 - UDMA3</div><div class='add'>+	 * EP931x rev.E2 - UDMA4</div><div class='add'>+	 *</div><div class='add'>+	 * MWDMA support was removed from EP931x rev.E2,</div><div class='add'>+	 * so this driver supports only UDMA modes.</div><div class='add'>+	 */</div><div class='add'>+	if (drv_data-&gt;dma_rx_channel &amp;&amp; drv_data-&gt;dma_tx_channel) {</div><div class='add'>+		int chip_rev = ep93xx_chip_revision();</div><div class='add'>+</div><div class='add'>+		if (chip_rev == EP93XX_CHIP_REV_E1)</div><div class='add'>+			ap-&gt;udma_mask = ATA_UDMA3;</div><div class='add'>+		else if (chip_rev == EP93XX_CHIP_REV_E2)</div><div class='add'>+			ap-&gt;udma_mask = ATA_UDMA4;</div><div class='add'>+		else</div><div class='add'>+			ap-&gt;udma_mask = ATA_UDMA2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* defaults, pio 0 */</div><div class='add'>+	ep93xx_pata_enable_pio(ide_base, 0);</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev, "version " DRV_VERSION "\n");</div><div class='add'>+</div><div class='add'>+	/* activate host */</div><div class='add'>+	err = ata_host_activate(host, irq, ata_bmdma_interrupt, 0,</div><div class='add'>+		&amp;ep93xx_pata_sht);</div><div class='add'>+	if (err == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+err_rel_dma:</div><div class='add'>+	ep93xx_pata_release_dma(drv_data);</div><div class='add'>+err_rel_gpio:</div><div class='add'>+	ep93xx_ide_release_gpio(pdev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit ep93xx_pata_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct ata_host *host = platform_get_drvdata(pdev);</div><div class='add'>+	struct ep93xx_pata_data *drv_data = host-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	ata_host_detach(host);</div><div class='add'>+	ep93xx_pata_release_dma(drv_data);</div><div class='add'>+	ep93xx_pata_clear_regs(drv_data-&gt;ide_base);</div><div class='add'>+	ep93xx_ide_release_gpio(pdev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver ep93xx_pata_platform_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DRV_NAME,</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe = ep93xx_pata_probe,</div><div class='add'>+	.remove = __devexit_p(ep93xx_pata_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(ep93xx_pata_platform_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Alessandro Zummo, Lennert Buytenhek, Joao Ramos, "</div><div class='add'>+		"Bartlomiej Zolnierkiewicz, Rafal Prylowski");</div><div class='add'>+MODULE_DESCRIPTION("low-level driver for cirrus ep93xx IDE controller");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_VERSION(DRV_VERSION);</div><div class='add'>+MODULE_ALIAS("platform:pata_ep93xx");</div><div class='head'>diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c<br/>index 7336d4a7ab31..24712adf69df 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ata/sata_mv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ata/sata_mv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ata/sata_mv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ata/sata_mv.c</a></div><div class='hunk'>@@ -553,6 +553,7 @@ struct mv_host_priv {</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_HAVE_CLK)</div><div class='ctx'> 	struct clk		*clk;</div><div class='add'>+	struct clk              **port_clks;</div><div class='ctx'> #endif</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * These consistent DMA memory pools give us guaranteed</div><div class='hunk'>@@ -4027,6 +4028,9 @@ static int mv_platform_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	int n_ports = 0;</div><div class='ctx'> 	int rc;</div><div class='add'>+#if defined(CONFIG_HAVE_CLK)</div><div class='add'>+	int port;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	ata_print_version_once(&amp;pdev-&gt;dev, DRV_VERSION);</div><div class='ctx'> </div><div class='hunk'>@@ -4054,6 +4058,13 @@ static int mv_platform_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	if (!host || !hpriv)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+#if defined(CONFIG_HAVE_CLK)</div><div class='add'>+	hpriv-&gt;port_clks = devm_kzalloc(&amp;pdev-&gt;dev,</div><div class='add'>+					sizeof(struct clk *) * n_ports,</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!hpriv-&gt;port_clks)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+#endif</div><div class='ctx'> 	host-&gt;private_data = hpriv;</div><div class='ctx'> 	hpriv-&gt;n_ports = n_ports;</div><div class='ctx'> 	hpriv-&gt;board_idx = chip_soc;</div><div class='hunk'>@@ -4066,9 +4077,17 @@ static int mv_platform_probe(struct platform_device *pdev)</div><div class='ctx'> #if defined(CONFIG_HAVE_CLK)</div><div class='ctx'> 	hpriv-&gt;clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='ctx'> 	if (IS_ERR(hpriv-&gt;clk))</div><div class='del'>-		dev_notice(&amp;pdev-&gt;dev, "cannot get clkdev\n");</div><div class='add'>+		dev_notice(&amp;pdev-&gt;dev, "cannot get optional clkdev\n");</div><div class='ctx'> 	else</div><div class='del'>-		clk_enable(hpriv-&gt;clk);</div><div class='add'>+		clk_prepare_enable(hpriv-&gt;clk);</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; n_ports; port++) {</div><div class='add'>+		char port_number[16];</div><div class='add'>+		sprintf(port_number, "%d", port);</div><div class='add'>+		hpriv-&gt;port_clks[port] = clk_get(&amp;pdev-&gt;dev, port_number);</div><div class='add'>+		if (!IS_ERR(hpriv-&gt;port_clks[port]))</div><div class='add'>+			clk_prepare_enable(hpriv-&gt;port_clks[port]);</div><div class='add'>+	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -4098,9 +4117,15 @@ static int mv_platform_probe(struct platform_device *pdev)</div><div class='ctx'> err:</div><div class='ctx'> #if defined(CONFIG_HAVE_CLK)</div><div class='ctx'> 	if (!IS_ERR(hpriv-&gt;clk)) {</div><div class='del'>-		clk_disable(hpriv-&gt;clk);</div><div class='add'>+		clk_disable_unprepare(hpriv-&gt;clk);</div><div class='ctx'> 		clk_put(hpriv-&gt;clk);</div><div class='ctx'> 	}</div><div class='add'>+	for (port = 0; port &lt; n_ports; port++) {</div><div class='add'>+		if (!IS_ERR(hpriv-&gt;port_clks[port])) {</div><div class='add'>+			clk_disable_unprepare(hpriv-&gt;port_clks[port]);</div><div class='add'>+			clk_put(hpriv-&gt;port_clks[port]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='hunk'>@@ -4119,14 +4144,21 @@ static int __devexit mv_platform_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct ata_host *host = platform_get_drvdata(pdev);</div><div class='ctx'> #if defined(CONFIG_HAVE_CLK)</div><div class='ctx'> 	struct mv_host_priv *hpriv = host-&gt;private_data;</div><div class='add'>+	int port;</div><div class='ctx'> #endif</div><div class='ctx'> 	ata_host_detach(host);</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_HAVE_CLK)</div><div class='ctx'> 	if (!IS_ERR(hpriv-&gt;clk)) {</div><div class='del'>-		clk_disable(hpriv-&gt;clk);</div><div class='add'>+		clk_disable_unprepare(hpriv-&gt;clk);</div><div class='ctx'> 		clk_put(hpriv-&gt;clk);</div><div class='ctx'> 	}</div><div class='add'>+	for (port = 0; port &lt; host-&gt;n_ports; port++) {</div><div class='add'>+		if (!IS_ERR(hpriv-&gt;port_clks[port])) {</div><div class='add'>+			clk_disable_unprepare(hpriv-&gt;port_clks[port]);</div><div class='add'>+			clk_put(hpriv-&gt;port_clks[port]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> #endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/atm/ambassador.c b/drivers/atm/ambassador.c<br/>index f8f41e0e8a8c..89b30f32ba68 100644<br/>--- a/<a href='/drm-misc/tree/drivers/atm/ambassador.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/atm/ambassador.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/atm/ambassador.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/atm/ambassador.c</a></div><div class='hunk'>@@ -802,7 +802,7 @@ static void fill_rx_pool (amb_dev * dev, unsigned char pool,</div><div class='ctx'>     }</div><div class='ctx'>     // cast needed as there is no %? for pointer differences</div><div class='ctx'>     PRINTD (DBG_SKB, "allocated skb at %p, head %p, area %li",</div><div class='del'>-	    skb, skb-&gt;head, (long) (skb_end_pointer(skb) - skb-&gt;head));</div><div class='add'>+	    skb, skb-&gt;head, (long) skb_end_offset(skb));</div><div class='ctx'>     rx.handle = virt_to_bus (skb);</div><div class='ctx'>     rx.host_address = cpu_to_be32 (virt_to_bus (skb-&gt;data));</div><div class='ctx'>     if (rx_give (dev, &amp;rx, pool))</div><div class='head'>diff --git a/drivers/atm/horizon.c b/drivers/atm/horizon.c<br/>index 75fd691cd43e..7d01c2a75256 100644<br/>--- a/<a href='/drm-misc/tree/drivers/atm/horizon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/atm/horizon.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/atm/horizon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/atm/horizon.c</a></div><div class='hunk'>@@ -2182,7 +2182,6 @@ static int hrz_open (struct atm_vcc *atm_vcc)</div><div class='ctx'>     default:</div><div class='ctx'>       PRINTD (DBG_QOS|DBG_VCC, "Bad AAL!");</div><div class='ctx'>       return -EINVAL;</div><div class='del'>-      break;</div><div class='ctx'>   }</div><div class='ctx'>   </div><div class='ctx'>   // TX traffic parameters</div><div class='hunk'>@@ -2357,7 +2356,6 @@ static int hrz_open (struct atm_vcc *atm_vcc)</div><div class='ctx'>       default: {</div><div class='ctx'> 	PRINTD (DBG_QOS, "unsupported TX traffic class");</div><div class='ctx'> 	return -EINVAL;</div><div class='del'>-	break;</div><div class='ctx'>       }</div><div class='ctx'>     }</div><div class='ctx'>   }</div><div class='hunk'>@@ -2433,7 +2431,6 @@ static int hrz_open (struct atm_vcc *atm_vcc)</div><div class='ctx'>       default: {</div><div class='ctx'> 	PRINTD (DBG_QOS, "unsupported RX traffic class");</div><div class='ctx'> 	return -EINVAL;</div><div class='del'>-	break;</div><div class='ctx'>       }</div><div class='ctx'>     }</div><div class='ctx'>   }</div><div class='hunk'>@@ -2581,7 +2578,6 @@ static int hrz_getsockopt (struct atm_vcc * atm_vcc, int level, int optname,</div><div class='ctx'> //	  break;</div><div class='ctx'> 	default:</div><div class='ctx'> 	  return -ENOPROTOOPT;</div><div class='del'>-	  break;</div><div class='ctx'>       };</div><div class='ctx'>       break;</div><div class='ctx'>   }</div><div class='hunk'>@@ -2601,7 +2597,6 @@ static int hrz_setsockopt (struct atm_vcc * atm_vcc, int level, int optname,</div><div class='ctx'> //	  break;</div><div class='ctx'> 	default:</div><div class='ctx'> 	  return -ENOPROTOOPT;</div><div class='del'>-	  break;</div><div class='ctx'>       };</div><div class='ctx'>       break;</div><div class='ctx'>   }</div><div class='head'>diff --git a/drivers/atm/idt77252.c b/drivers/atm/idt77252.c<br/>index 1c052127548c..8974bd2b961e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/atm/idt77252.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/atm/idt77252.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/atm/idt77252.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/atm/idt77252.c</a></div><div class='hunk'>@@ -1258,7 +1258,7 @@ idt77252_rx_raw(struct idt77252_dev *card)</div><div class='ctx'> 	tail = readl(SAR_REG_RAWCT);</div><div class='ctx'> </div><div class='ctx'> 	pci_dma_sync_single_for_cpu(card-&gt;pcidev, IDT77252_PRV_PADDR(queue),</div><div class='del'>-				    skb_end_pointer(queue) - queue-&gt;head - 16,</div><div class='add'>+				    skb_end_offset(queue) - 16,</div><div class='ctx'> 				    PCI_DMA_FROMDEVICE);</div><div class='ctx'> </div><div class='ctx'> 	while (head != tail) {</div><div class='head'>diff --git a/drivers/atm/solos-pci.c b/drivers/atm/solos-pci.c<br/>index e8cd652d2017..98510931c815 100644<br/>--- a/<a href='/drm-misc/tree/drivers/atm/solos-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/atm/solos-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/atm/solos-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/atm/solos-pci.c</a></div><div class='hunk'>@@ -984,6 +984,7 @@ static uint32_t fpga_tx(struct solos_card *card)</div><div class='ctx'> 			} else if (skb &amp;&amp; card-&gt;using_dma) {</div><div class='ctx'> 				SKB_CB(skb)-&gt;dma_addr = pci_map_single(card-&gt;dev, skb-&gt;data,</div><div class='ctx'> 								       skb-&gt;len, PCI_DMA_TODEVICE);</div><div class='add'>+				card-&gt;tx_skb[port] = skb;</div><div class='ctx'> 				iowrite32(SKB_CB(skb)-&gt;dma_addr,</div><div class='ctx'> 					  card-&gt;config_regs + TX_DMA_ADDR(port));</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1152,7 +1153,8 @@ static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)</div><div class='ctx'> 		db_fpga_upgrade = db_firmware_upgrade = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (card-&gt;fpga_version &gt;= DMA_SUPPORTED){</div><div class='add'>+	if (card-&gt;fpga_version &gt;= DMA_SUPPORTED) {</div><div class='add'>+		pci_set_master(dev);</div><div class='ctx'> 		card-&gt;using_dma = 1;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		card-&gt;using_dma = 0;</div><div class='head'>diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig<br/>index 9aa618acfe97..9b21469482ae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/Kconfig</a></div><div class='hunk'>@@ -192,4 +192,93 @@ config DMA_SHARED_BUFFER</div><div class='ctx'> 	  APIs extension; the file's descriptor can then be passed on to other</div><div class='ctx'> 	  driver.</div><div class='ctx'> </div><div class='add'>+config CMA</div><div class='add'>+	bool "Contiguous Memory Allocator (EXPERIMENTAL)"</div><div class='add'>+	depends on HAVE_DMA_CONTIGUOUS &amp;&amp; HAVE_MEMBLOCK &amp;&amp; EXPERIMENTAL</div><div class='add'>+	select MIGRATION</div><div class='add'>+	help</div><div class='add'>+	  This enables the Contiguous Memory Allocator which allows drivers</div><div class='add'>+	  to allocate big physically-contiguous blocks of memory for use with</div><div class='add'>+	  hardware components that do not support I/O map nor scatter-gather.</div><div class='add'>+</div><div class='add'>+	  For more information see &lt;include/linux/dma-contiguous.h&gt;.</div><div class='add'>+	  If unsure, say "n".</div><div class='add'>+</div><div class='add'>+if CMA</div><div class='add'>+</div><div class='add'>+config CMA_DEBUG</div><div class='add'>+	bool "CMA debug messages (DEVELOPMENT)"</div><div class='add'>+	depends on DEBUG_KERNEL</div><div class='add'>+	help</div><div class='add'>+	  Turns on debug messages in CMA.  This produces KERN_DEBUG</div><div class='add'>+	  messages for every CMA call as well as various messages while</div><div class='add'>+	  processing calls such as dma_alloc_from_contiguous().</div><div class='add'>+	  This option does not affect warning and error messages.</div><div class='add'>+</div><div class='add'>+comment "Default contiguous memory area size:"</div><div class='add'>+</div><div class='add'>+config CMA_SIZE_MBYTES</div><div class='add'>+	int "Size in Mega Bytes"</div><div class='add'>+	depends on !CMA_SIZE_SEL_PERCENTAGE</div><div class='add'>+	default 16</div><div class='add'>+	help</div><div class='add'>+	  Defines the size (in MiB) of the default memory area for Contiguous</div><div class='add'>+	  Memory Allocator.</div><div class='add'>+</div><div class='add'>+config CMA_SIZE_PERCENTAGE</div><div class='add'>+	int "Percentage of total memory"</div><div class='add'>+	depends on !CMA_SIZE_SEL_MBYTES</div><div class='add'>+	default 10</div><div class='add'>+	help</div><div class='add'>+	  Defines the size of the default memory area for Contiguous Memory</div><div class='add'>+	  Allocator as a percentage of the total memory in the system.</div><div class='add'>+</div><div class='add'>+choice</div><div class='add'>+	prompt "Selected region size"</div><div class='add'>+	default CMA_SIZE_SEL_ABSOLUTE</div><div class='add'>+</div><div class='add'>+config CMA_SIZE_SEL_MBYTES</div><div class='add'>+	bool "Use mega bytes value only"</div><div class='add'>+</div><div class='add'>+config CMA_SIZE_SEL_PERCENTAGE</div><div class='add'>+	bool "Use percentage value only"</div><div class='add'>+</div><div class='add'>+config CMA_SIZE_SEL_MIN</div><div class='add'>+	bool "Use lower value (minimum)"</div><div class='add'>+</div><div class='add'>+config CMA_SIZE_SEL_MAX</div><div class='add'>+	bool "Use higher value (maximum)"</div><div class='add'>+</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='add'>+config CMA_ALIGNMENT</div><div class='add'>+	int "Maximum PAGE_SIZE order of alignment for contiguous buffers"</div><div class='add'>+	range 4 9</div><div class='add'>+	default 8</div><div class='add'>+	help</div><div class='add'>+	  DMA mapping framework by default aligns all buffers to the smallest</div><div class='add'>+	  PAGE_SIZE order which is greater than or equal to the requested buffer</div><div class='add'>+	  size. This works well for buffers up to a few hundreds kilobytes, but</div><div class='add'>+	  for larger buffers it just a memory waste. With this parameter you can</div><div class='add'>+	  specify the maximum PAGE_SIZE order for contiguous buffers. Larger</div><div class='add'>+	  buffers will be aligned only to this specified order. The order is</div><div class='add'>+	  expressed as a power of two multiplied by the PAGE_SIZE.</div><div class='add'>+</div><div class='add'>+	  For example, if your system defaults to 4KiB pages, the order value</div><div class='add'>+	  of 8 means that the buffers will be aligned up to 1MiB only.</div><div class='add'>+</div><div class='add'>+	  If unsure, leave the default value "8".</div><div class='add'>+</div><div class='add'>+config CMA_AREAS</div><div class='add'>+	int "Maximum count of the CMA device-private areas"</div><div class='add'>+	default 7</div><div class='add'>+	help</div><div class='add'>+	  CMA allows to create CMA areas for particular devices. This parameter</div><div class='add'>+	  sets the maximum number of such device private CMA areas in the</div><div class='add'>+	  system.</div><div class='add'>+</div><div class='add'>+	  If unsure, leave the default value "7".</div><div class='add'>+</div><div class='add'>+endif</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/drivers/base/Makefile b/drivers/base/Makefile<br/>index b6d1b9c4200c..5aa2d703d19f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/Makefile</a></div><div class='hunk'>@@ -6,6 +6,7 @@ obj-y			:= core.o bus.o dd.o syscore.o \</div><div class='ctx'> 			   attribute_container.o transport_class.o \</div><div class='ctx'> 			   topology.o</div><div class='ctx'> obj-$(CONFIG_DEVTMPFS)	+= devtmpfs.o</div><div class='add'>+obj-$(CONFIG_CMA) += dma-contiguous.o</div><div class='ctx'> obj-y			+= power/</div><div class='ctx'> obj-$(CONFIG_HAS_DMA)	+= dma-mapping.o</div><div class='ctx'> obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += dma-coherent.o</div><div class='head'>diff --git a/drivers/base/bus.c b/drivers/base/bus.c<br/>index 26a06b801b5b..2bcef657a60c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/bus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/bus.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/bus.c</a></div><div class='hunk'>@@ -21,8 +21,7 @@</div><div class='ctx'> #include "power/power.h"</div><div class='ctx'> </div><div class='ctx'> /* /sys/devices/system */</div><div class='del'>-/* FIXME: make static after drivers/base/sys.c is deleted */</div><div class='del'>-struct kset *system_kset;</div><div class='add'>+static struct kset *system_kset;</div><div class='ctx'> </div><div class='ctx'> #define to_bus_attr(_attr) container_of(_attr, struct bus_attribute, attr)</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/core.c b/drivers/base/core.c<br/>index e28ce9898af4..346be8b78b24 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/core.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/async.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "base.h"</div><div class='ctx'> #include "power/power.h"</div><div class='hunk'>@@ -65,7 +66,7 @@ static inline int device_is_not_partition(struct device *dev)</div><div class='ctx'>  * @dev: struct device to get the name of</div><div class='ctx'>  *</div><div class='ctx'>  * Will return the device's driver's name if it is bound to a device.  If</div><div class='del'>- * the device is not bound to a device, it will return the name of the bus</div><div class='add'>+ * the device is not bound to a driver, it will return the name of the bus</div><div class='ctx'>  * it is attached to.  If it is not attached to a bus either, an empty</div><div class='ctx'>  * string will be returned.</div><div class='ctx'>  */</div><div class='hunk'>@@ -878,8 +879,8 @@ EXPORT_SYMBOL_GPL(dev_set_name);</div><div class='ctx'>  * to NULL prevents an entry from being created.  class-&gt;dev_kobj must</div><div class='ctx'>  * be set (or cleared) before any devices are registered to the class</div><div class='ctx'>  * otherwise device_create_sys_dev_entry() and</div><div class='del'>- * device_remove_sys_dev_entry() will disagree about the the presence</div><div class='del'>- * of the link.</div><div class='add'>+ * device_remove_sys_dev_entry() will disagree about the presence of</div><div class='add'>+ * the link.</div><div class='ctx'>  */</div><div class='ctx'> static struct kobject *device_to_dev_kobj(struct device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -1843,15 +1844,60 @@ void device_shutdown(void)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PRINTK</div><div class='del'>-</div><div class='ctx'> int __dev_printk(const char *level, const struct device *dev,</div><div class='ctx'> 		 struct va_format *vaf)</div><div class='ctx'> {</div><div class='add'>+	char dict[128];</div><div class='add'>+	size_t dictlen = 0;</div><div class='add'>+	const char *subsys;</div><div class='add'>+</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return printk("%s(NULL device *): %pV", level, vaf);</div><div class='ctx'> </div><div class='del'>-	return printk("%s%s %s: %pV",</div><div class='del'>-		      level, dev_driver_string(dev), dev_name(dev), vaf);</div><div class='add'>+	if (dev-&gt;class)</div><div class='add'>+		subsys = dev-&gt;class-&gt;name;</div><div class='add'>+	else if (dev-&gt;bus)</div><div class='add'>+		subsys = dev-&gt;bus-&gt;name;</div><div class='add'>+	else</div><div class='add'>+		goto skip;</div><div class='add'>+</div><div class='add'>+	dictlen += snprintf(dict + dictlen, sizeof(dict) - dictlen,</div><div class='add'>+			    "SUBSYSTEM=%s", subsys);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Add device identifier DEVICE=:</div><div class='add'>+	 *   b12:8         block dev_t</div><div class='add'>+	 *   c127:3        char dev_t</div><div class='add'>+	 *   n8            netdev ifindex</div><div class='add'>+	 *   +sound:card0  subsystem:devname</div><div class='add'>+	 */</div><div class='add'>+	if (MAJOR(dev-&gt;devt)) {</div><div class='add'>+		char c;</div><div class='add'>+</div><div class='add'>+		if (strcmp(subsys, "block") == 0)</div><div class='add'>+			c = 'b';</div><div class='add'>+		else</div><div class='add'>+			c = 'c';</div><div class='add'>+		dictlen++;</div><div class='add'>+		dictlen += snprintf(dict + dictlen, sizeof(dict) - dictlen,</div><div class='add'>+				   "DEVICE=%c%u:%u",</div><div class='add'>+				   c, MAJOR(dev-&gt;devt), MINOR(dev-&gt;devt));</div><div class='add'>+	} else if (strcmp(subsys, "net") == 0) {</div><div class='add'>+		struct net_device *net = to_net_dev(dev);</div><div class='add'>+</div><div class='add'>+		dictlen++;</div><div class='add'>+		dictlen += snprintf(dict + dictlen, sizeof(dict) - dictlen,</div><div class='add'>+				    "DEVICE=n%u", net-&gt;ifindex);</div><div class='add'>+	} else {</div><div class='add'>+		dictlen++;</div><div class='add'>+		dictlen += snprintf(dict + dictlen, sizeof(dict) - dictlen,</div><div class='add'>+				    "DEVICE=+%s:%s", subsys, dev_name(dev));</div><div class='add'>+	}</div><div class='add'>+skip:</div><div class='add'>+	return printk_emit(0, level[1] - '0',</div><div class='add'>+			   dictlen ? dict : NULL, dictlen,</div><div class='add'>+			   "%s %s: %pV",</div><div class='add'>+			   dev_driver_string(dev), dev_name(dev), vaf);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__dev_printk);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c<br/>index adf937bf4091..63452943abd1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/cpu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/cpu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/cpu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/cpu.c</a></div><div class='hunk'>@@ -330,8 +330,4 @@ void __init cpu_dev_init(void)</div><div class='ctx'> 		panic("Failed to register CPU subsystem");</div><div class='ctx'> </div><div class='ctx'> 	cpu_dev_register_generic();</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_SCHED_MC) || defined(CONFIG_SCHED_SMT)</div><div class='del'>-	sched_create_sysfs_power_savings_entries(cpu_subsys.dev_root);</div><div class='del'>-#endif</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/base/devres.c b/drivers/base/devres.c<br/>index 524bf96c289f..2360adb7a58f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/devres.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/devres.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/devres.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/devres.c</a></div><div class='hunk'>@@ -309,6 +309,10 @@ EXPORT_SYMBOL_GPL(devres_remove);</div><div class='ctx'>  * which @match returns 1.  If @match is NULL, it's considered to</div><div class='ctx'>  * match all.  If found, the resource is removed atomically and freed.</div><div class='ctx'>  *</div><div class='add'>+ * Note that the release function for the resource will not be called,</div><div class='add'>+ * only the devres-allocated data will be freed.  The caller becomes</div><div class='add'>+ * responsible for freeing any other data.</div><div class='add'>+ *</div><div class='ctx'>  * RETURNS:</div><div class='ctx'>  * 0 if devres is found and freed, -ENOENT if not found.</div><div class='ctx'>  */</div><div class='hunk'>@@ -326,6 +330,37 @@ int devres_destroy(struct device *dev, dr_release_t release,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(devres_destroy);</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * devres_release - Find a device resource and destroy it, calling release</div><div class='add'>+ * @dev: Device to find resource from</div><div class='add'>+ * @release: Look for resources associated with this release function</div><div class='add'>+ * @match: Match function (optional)</div><div class='add'>+ * @match_data: Data for the match function</div><div class='add'>+ *</div><div class='add'>+ * Find the latest devres of @dev associated with @release and for</div><div class='add'>+ * which @match returns 1.  If @match is NULL, it's considered to</div><div class='add'>+ * match all.  If found, the resource is removed atomically, the</div><div class='add'>+ * release function called and the resource freed.</div><div class='add'>+ *</div><div class='add'>+ * RETURNS:</div><div class='add'>+ * 0 if devres is found and freed, -ENOENT if not found.</div><div class='add'>+ */</div><div class='add'>+int devres_release(struct device *dev, dr_release_t release,</div><div class='add'>+		   dr_match_t match, void *match_data)</div><div class='add'>+{</div><div class='add'>+	void *res;</div><div class='add'>+</div><div class='add'>+	res = devres_remove(dev, release, match, match_data);</div><div class='add'>+	if (unlikely(!res))</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	(*release)(dev, res);</div><div class='add'>+	devres_free(res);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(devres_release);</div><div class='add'>+</div><div class='ctx'> static int remove_nodes(struct device *dev,</div><div class='ctx'> 			struct list_head *first, struct list_head *end,</div><div class='ctx'> 			struct list_head *todo)</div><div class='head'>diff --git a/drivers/base/devtmpfs.c b/drivers/base/devtmpfs.c<br/>index 8493536ea55b..765c3a28077a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/devtmpfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/devtmpfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/devtmpfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/devtmpfs.c</a></div><div class='hunk'>@@ -7,9 +7,9 @@</div><div class='ctx'>  * devtmpfs, a tmpfs-based filesystem is created. Every driver-core</div><div class='ctx'>  * device which requests a device node, will add a node in this</div><div class='ctx'>  * filesystem.</div><div class='del'>- * By default, all devices are named after the the name of the</div><div class='del'>- * device, owned by root and have a default mode of 0600. Subsystems</div><div class='del'>- * can overwrite the default setting if needed.</div><div class='add'>+ * By default, all devices are named after the name of the device,</div><div class='add'>+ * owned by root and have a default mode of 0600. Subsystems can</div><div class='add'>+ * overwrite the default setting if needed.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='head'>diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c<br/>index 07cbbc6fddb4..24e88fe29ec1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/dma-buf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/dma-buf.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/dma-buf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/dma-buf.c</a></div><div class='hunk'>@@ -44,8 +44,26 @@ static int dma_buf_release(struct inode *inode, struct file *file)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int dma_buf_mmap_internal(struct file *file, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	struct dma_buf *dmabuf;</div><div class='add'>+</div><div class='add'>+	if (!is_dma_buf_file(file))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dmabuf = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	/* check for overflowing the buffer's size */</div><div class='add'>+	if (vma-&gt;vm_pgoff + ((vma-&gt;vm_end - vma-&gt;vm_start) &gt;&gt; PAGE_SHIFT) &gt;</div><div class='add'>+	    dmabuf-&gt;size &gt;&gt; PAGE_SHIFT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return dmabuf-&gt;ops-&gt;mmap(dmabuf, vma);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct file_operations dma_buf_fops = {</div><div class='ctx'> 	.release	= dma_buf_release,</div><div class='add'>+	.mmap		= dma_buf_mmap_internal,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -82,7 +100,8 @@ struct dma_buf *dma_buf_export(void *priv, const struct dma_buf_ops *ops,</div><div class='ctx'> 			  || !ops-&gt;unmap_dma_buf</div><div class='ctx'> 			  || !ops-&gt;release</div><div class='ctx'> 			  || !ops-&gt;kmap_atomic</div><div class='del'>-			  || !ops-&gt;kmap)) {</div><div class='add'>+			  || !ops-&gt;kmap</div><div class='add'>+			  || !ops-&gt;mmap)) {</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -293,7 +312,7 @@ EXPORT_SYMBOL_GPL(dma_buf_unmap_attachment);</div><div class='ctx'>  * cpu in the kernel context. Calls begin_cpu_access to allow exporter-specific</div><div class='ctx'>  * preparations. Coherency is only guaranteed in the specified range for the</div><div class='ctx'>  * specified access direction.</div><div class='del'>- * @dma_buf:	[in]	buffer to prepare cpu access for.</div><div class='add'>+ * @dmabuf:	[in]	buffer to prepare cpu access for.</div><div class='ctx'>  * @start:	[in]	start of range for cpu access.</div><div class='ctx'>  * @len:	[in]	length of range for cpu access.</div><div class='ctx'>  * @direction:	[in]	length of range for cpu access.</div><div class='hunk'>@@ -320,7 +339,7 @@ EXPORT_SYMBOL_GPL(dma_buf_begin_cpu_access);</div><div class='ctx'>  * cpu in the kernel context. Calls end_cpu_access to allow exporter-specific</div><div class='ctx'>  * actions. Coherency is only guaranteed in the specified range for the</div><div class='ctx'>  * specified access direction.</div><div class='del'>- * @dma_buf:	[in]	buffer to complete cpu access for.</div><div class='add'>+ * @dmabuf:	[in]	buffer to complete cpu access for.</div><div class='ctx'>  * @start:	[in]	start of range for cpu access.</div><div class='ctx'>  * @len:	[in]	length of range for cpu access.</div><div class='ctx'>  * @direction:	[in]	length of range for cpu access.</div><div class='hunk'>@@ -340,7 +359,7 @@ EXPORT_SYMBOL_GPL(dma_buf_end_cpu_access);</div><div class='ctx'> /**</div><div class='ctx'>  * dma_buf_kmap_atomic - Map a page of the buffer object into kernel address</div><div class='ctx'>  * space. The same restrictions as for kmap_atomic and friends apply.</div><div class='del'>- * @dma_buf:	[in]	buffer to map page from.</div><div class='add'>+ * @dmabuf:	[in]	buffer to map page from.</div><div class='ctx'>  * @page_num:	[in]	page in PAGE_SIZE units to map.</div><div class='ctx'>  *</div><div class='ctx'>  * This call must always succeed, any necessary preparations that might fail</div><div class='hunk'>@@ -356,7 +375,7 @@ EXPORT_SYMBOL_GPL(dma_buf_kmap_atomic);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * dma_buf_kunmap_atomic - Unmap a page obtained by dma_buf_kmap_atomic.</div><div class='del'>- * @dma_buf:	[in]	buffer to unmap page from.</div><div class='add'>+ * @dmabuf:	[in]	buffer to unmap page from.</div><div class='ctx'>  * @page_num:	[in]	page in PAGE_SIZE units to unmap.</div><div class='ctx'>  * @vaddr:	[in]	kernel space pointer obtained from dma_buf_kmap_atomic.</div><div class='ctx'>  *</div><div class='hunk'>@@ -375,7 +394,7 @@ EXPORT_SYMBOL_GPL(dma_buf_kunmap_atomic);</div><div class='ctx'> /**</div><div class='ctx'>  * dma_buf_kmap - Map a page of the buffer object into kernel address space. The</div><div class='ctx'>  * same restrictions as for kmap and friends apply.</div><div class='del'>- * @dma_buf:	[in]	buffer to map page from.</div><div class='add'>+ * @dmabuf:	[in]	buffer to map page from.</div><div class='ctx'>  * @page_num:	[in]	page in PAGE_SIZE units to map.</div><div class='ctx'>  *</div><div class='ctx'>  * This call must always succeed, any necessary preparations that might fail</div><div class='hunk'>@@ -391,7 +410,7 @@ EXPORT_SYMBOL_GPL(dma_buf_kmap);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * dma_buf_kunmap - Unmap a page obtained by dma_buf_kmap.</div><div class='del'>- * @dma_buf:	[in]	buffer to unmap page from.</div><div class='add'>+ * @dmabuf:	[in]	buffer to unmap page from.</div><div class='ctx'>  * @page_num:	[in]	page in PAGE_SIZE units to unmap.</div><div class='ctx'>  * @vaddr:	[in]	kernel space pointer obtained from dma_buf_kmap.</div><div class='ctx'>  *</div><div class='hunk'>@@ -406,3 +425,81 @@ void dma_buf_kunmap(struct dma_buf *dmabuf, unsigned long page_num,</div><div class='ctx'> 		dmabuf-&gt;ops-&gt;kunmap(dmabuf, page_num, vaddr);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(dma_buf_kunmap);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dma_buf_mmap - Setup up a userspace mmap with the given vma</div><div class='add'>+ * @dmabuf:	[in]	buffer that should back the vma</div><div class='add'>+ * @vma:	[in]	vma for the mmap</div><div class='add'>+ * @pgoff:	[in]	offset in pages where this mmap should start within the</div><div class='add'>+ * 			dma-buf buffer.</div><div class='add'>+ *</div><div class='add'>+ * This function adjusts the passed in vma so that it points at the file of the</div><div class='add'>+ * dma_buf operation. It alsog adjusts the starting pgoff and does bounds</div><div class='add'>+ * checking on the size of the vma. Then it calls the exporters mmap function to</div><div class='add'>+ * set up the mapping.</div><div class='add'>+ *</div><div class='add'>+ * Can return negative error values, returns 0 on success.</div><div class='add'>+ */</div><div class='add'>+int dma_buf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma,</div><div class='add'>+		 unsigned long pgoff)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON(!dmabuf || !vma))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* check for offset overflow */</div><div class='add'>+	if (pgoff + ((vma-&gt;vm_end - vma-&gt;vm_start) &gt;&gt; PAGE_SHIFT) &lt; pgoff)</div><div class='add'>+		return -EOVERFLOW;</div><div class='add'>+</div><div class='add'>+	/* check for overflowing the buffer's size */</div><div class='add'>+	if (pgoff + ((vma-&gt;vm_end - vma-&gt;vm_start) &gt;&gt; PAGE_SHIFT) &gt;</div><div class='add'>+	    dmabuf-&gt;size &gt;&gt; PAGE_SHIFT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* readjust the vma */</div><div class='add'>+	if (vma-&gt;vm_file)</div><div class='add'>+		fput(vma-&gt;vm_file);</div><div class='add'>+</div><div class='add'>+	vma-&gt;vm_file = dmabuf-&gt;file;</div><div class='add'>+	get_file(vma-&gt;vm_file);</div><div class='add'>+</div><div class='add'>+	vma-&gt;vm_pgoff = pgoff;</div><div class='add'>+</div><div class='add'>+	return dmabuf-&gt;ops-&gt;mmap(dmabuf, vma);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(dma_buf_mmap);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dma_buf_vmap - Create virtual mapping for the buffer object into kernel</div><div class='add'>+ * address space. Same restrictions as for vmap and friends apply.</div><div class='add'>+ * @dmabuf:	[in]	buffer to vmap</div><div class='add'>+ *</div><div class='add'>+ * This call may fail due to lack of virtual mapping address space.</div><div class='add'>+ * These calls are optional in drivers. The intended use for them</div><div class='add'>+ * is for mapping objects linear in kernel space for high use objects.</div><div class='add'>+ * Please attempt to use kmap/kunmap before thinking about these interfaces.</div><div class='add'>+ */</div><div class='add'>+void *dma_buf_vmap(struct dma_buf *dmabuf)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON(!dmabuf))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (dmabuf-&gt;ops-&gt;vmap)</div><div class='add'>+		return dmabuf-&gt;ops-&gt;vmap(dmabuf);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(dma_buf_vmap);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dma_buf_vunmap - Unmap a vmap obtained by dma_buf_vmap.</div><div class='add'>+ * @dmabuf:	[in]	buffer to vunmap</div><div class='add'>+ */</div><div class='add'>+void dma_buf_vunmap(struct dma_buf *dmabuf, void *vaddr)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON(!dmabuf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (dmabuf-&gt;ops-&gt;vunmap)</div><div class='add'>+		dmabuf-&gt;ops-&gt;vunmap(dmabuf, vaddr);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(dma_buf_vunmap);</div><div class='head'>diff --git a/drivers/base/dma-coherent.c b/drivers/base/dma-coherent.c<br/>index bb0025c510b3..1b85949e3d2f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/dma-coherent.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/dma-coherent.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/dma-coherent.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/dma-coherent.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> struct dma_coherent_mem {</div><div class='ctx'> 	void		*virt_base;</div><div class='ctx'> 	dma_addr_t	device_base;</div><div class='add'>+	phys_addr_t	pfn_base;</div><div class='ctx'> 	int		size;</div><div class='ctx'> 	int		flags;</div><div class='ctx'> 	unsigned long	*bitmap;</div><div class='hunk'>@@ -44,6 +45,7 @@ int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;dma_mem-&gt;virt_base = mem_base;</div><div class='ctx'> 	dev-&gt;dma_mem-&gt;device_base = device_addr;</div><div class='add'>+	dev-&gt;dma_mem-&gt;pfn_base = PFN_DOWN(bus_addr);</div><div class='ctx'> 	dev-&gt;dma_mem-&gt;size = pages;</div><div class='ctx'> 	dev-&gt;dma_mem-&gt;flags = flags;</div><div class='ctx'> </div><div class='hunk'>@@ -176,3 +178,43 @@ int dma_release_from_coherent(struct device *dev, int order, void *vaddr)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_release_from_coherent);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dma_mmap_from_coherent() - try to mmap the memory allocated from</div><div class='add'>+ * per-device coherent memory pool to userspace</div><div class='add'>+ * @dev:	device from which the memory was allocated</div><div class='add'>+ * @vma:	vm_area for the userspace memory</div><div class='add'>+ * @vaddr:	cpu address returned by dma_alloc_from_coherent</div><div class='add'>+ * @size:	size of the memory buffer allocated by dma_alloc_from_coherent</div><div class='add'>+ *</div><div class='add'>+ * This checks whether the memory was allocated from the per-device</div><div class='add'>+ * coherent memory pool and if so, maps that memory to the provided vma.</div><div class='add'>+ *</div><div class='add'>+ * Returns 1 if we correctly mapped the memory, or 0 if</div><div class='add'>+ * dma_release_coherent() should proceed with mapping memory from</div><div class='add'>+ * generic pools.</div><div class='add'>+ */</div><div class='add'>+int dma_mmap_from_coherent(struct device *dev, struct vm_area_struct *vma,</div><div class='add'>+			   void *vaddr, size_t size, int *ret)</div><div class='add'>+{</div><div class='add'>+	struct dma_coherent_mem *mem = dev ? dev-&gt;dma_mem : NULL;</div><div class='add'>+</div><div class='add'>+	if (mem &amp;&amp; vaddr &gt;= mem-&gt;virt_base &amp;&amp; vaddr + size &lt;=</div><div class='add'>+		   (mem-&gt;virt_base + (mem-&gt;size &lt;&lt; PAGE_SHIFT))) {</div><div class='add'>+		unsigned long off = vma-&gt;vm_pgoff;</div><div class='add'>+		int start = (vaddr - mem-&gt;virt_base) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+		int user_count = (vma-&gt;vm_end - vma-&gt;vm_start) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+		int count = size &gt;&gt; PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+		*ret = -ENXIO;</div><div class='add'>+		if (off &lt; count &amp;&amp; user_count &lt;= count - off) {</div><div class='add'>+			unsigned pfn = mem-&gt;pfn_base + start + off;</div><div class='add'>+			*ret = remap_pfn_range(vma, vma-&gt;vm_start, pfn,</div><div class='add'>+					       user_count &lt;&lt; PAGE_SHIFT,</div><div class='add'>+					       vma-&gt;vm_page_prot);</div><div class='add'>+		}</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(dma_mmap_from_coherent);</div><div class='head'>diff --git a/drivers/base/dma-contiguous.c b/drivers/base/dma-contiguous.c<br/>new file mode 100644<br/>index 000000000000..78efb0306a44<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/base/dma-contiguous.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/dma-contiguous.c</a></div><div class='hunk'>@@ -0,0 +1,401 @@</div><div class='add'>+/*</div><div class='add'>+ * Contiguous Memory Allocator for DMA mapping framework</div><div class='add'>+ * Copyright (c) 2010-2011 by Samsung Electronics.</div><div class='add'>+ * Written by:</div><div class='add'>+ *	Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;</div><div class='add'>+ *	Michal Nazarewicz &lt;mina86@mina86.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License as</div><div class='add'>+ * published by the Free Software Foundation; either version 2 of the</div><div class='add'>+ * License or (at your optional) any later version of the license.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "cma: " fmt</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CMA_DEBUG</div><div class='add'>+#ifndef DEBUG</div><div class='add'>+#  define DEBUG</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#include &lt;asm/page.h&gt;</div><div class='add'>+#include &lt;asm/dma-contiguous.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/page-isolation.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/swap.h&gt;</div><div class='add'>+#include &lt;linux/mm_types.h&gt;</div><div class='add'>+#include &lt;linux/dma-contiguous.h&gt;</div><div class='add'>+</div><div class='add'>+#ifndef SZ_1M</div><div class='add'>+#define SZ_1M (1 &lt;&lt; 20)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+struct cma {</div><div class='add'>+	unsigned long	base_pfn;</div><div class='add'>+	unsigned long	count;</div><div class='add'>+	unsigned long	*bitmap;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cma *dma_contiguous_default_area;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CMA_SIZE_MBYTES</div><div class='add'>+#define CMA_SIZE_MBYTES CONFIG_CMA_SIZE_MBYTES</div><div class='add'>+#else</div><div class='add'>+#define CMA_SIZE_MBYTES 0</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Default global CMA area size can be defined in kernel's .config.</div><div class='add'>+ * This is usefull mainly for distro maintainers to create a kernel</div><div class='add'>+ * that works correctly for most supported systems.</div><div class='add'>+ * The size can be set in bytes or as a percentage of the total memory</div><div class='add'>+ * in the system.</div><div class='add'>+ *</div><div class='add'>+ * Users, who want to set the size of global CMA area for their system</div><div class='add'>+ * should use cma= kernel parameter.</div><div class='add'>+ */</div><div class='add'>+static const unsigned long size_bytes = CMA_SIZE_MBYTES * SZ_1M;</div><div class='add'>+static long size_cmdline = -1;</div><div class='add'>+</div><div class='add'>+static int __init early_cma(char *p)</div><div class='add'>+{</div><div class='add'>+	pr_debug("%s(%s)\n", __func__, p);</div><div class='add'>+	size_cmdline = memparse(p, &amp;p);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+early_param("cma", early_cma);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_CMA_SIZE_PERCENTAGE</div><div class='add'>+</div><div class='add'>+static unsigned long __init __maybe_unused cma_early_percent_memory(void)</div><div class='add'>+{</div><div class='add'>+	struct memblock_region *reg;</div><div class='add'>+	unsigned long total_pages = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We cannot use memblock_phys_mem_size() here, because</div><div class='add'>+	 * memblock_analyze() has not been called yet.</div><div class='add'>+	 */</div><div class='add'>+	for_each_memblock(memory, reg)</div><div class='add'>+		total_pages += memblock_region_memory_end_pfn(reg) -</div><div class='add'>+			       memblock_region_memory_base_pfn(reg);</div><div class='add'>+</div><div class='add'>+	return (total_pages * CONFIG_CMA_SIZE_PERCENTAGE / 100) &lt;&lt; PAGE_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline __maybe_unused unsigned long cma_early_percent_memory(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dma_contiguous_reserve() - reserve area for contiguous memory handling</div><div class='add'>+ * @limit: End address of the reserved memory (optional, 0 for any).</div><div class='add'>+ *</div><div class='add'>+ * This function reserves memory from early allocator. It should be</div><div class='add'>+ * called by arch specific code once the early allocator (memblock or bootmem)</div><div class='add'>+ * has been activated and all other subsystems have already allocated/reserved</div><div class='add'>+ * memory.</div><div class='add'>+ */</div><div class='add'>+void __init dma_contiguous_reserve(phys_addr_t limit)</div><div class='add'>+{</div><div class='add'>+	unsigned long selected_size = 0;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s(limit %08lx)\n", __func__, (unsigned long)limit);</div><div class='add'>+</div><div class='add'>+	if (size_cmdline != -1) {</div><div class='add'>+		selected_size = size_cmdline;</div><div class='add'>+	} else {</div><div class='add'>+#ifdef CONFIG_CMA_SIZE_SEL_MBYTES</div><div class='add'>+		selected_size = size_bytes;</div><div class='add'>+#elif defined(CONFIG_CMA_SIZE_SEL_PERCENTAGE)</div><div class='add'>+		selected_size = cma_early_percent_memory();</div><div class='add'>+#elif defined(CONFIG_CMA_SIZE_SEL_MIN)</div><div class='add'>+		selected_size = min(size_bytes, cma_early_percent_memory());</div><div class='add'>+#elif defined(CONFIG_CMA_SIZE_SEL_MAX)</div><div class='add'>+		selected_size = max(size_bytes, cma_early_percent_memory());</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (selected_size) {</div><div class='add'>+		pr_debug("%s: reserving %ld MiB for global area\n", __func__,</div><div class='add'>+			 selected_size / SZ_1M);</div><div class='add'>+</div><div class='add'>+		dma_declare_contiguous(NULL, selected_size, 0, limit);</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DEFINE_MUTEX(cma_mutex);</div><div class='add'>+</div><div class='add'>+static __init int cma_activate_area(unsigned long base_pfn, unsigned long count)</div><div class='add'>+{</div><div class='add'>+	unsigned long pfn = base_pfn;</div><div class='add'>+	unsigned i = count &gt;&gt; pageblock_order;</div><div class='add'>+	struct zone *zone;</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(!pfn_valid(pfn));</div><div class='add'>+	zone = page_zone(pfn_to_page(pfn));</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		unsigned j;</div><div class='add'>+		base_pfn = pfn;</div><div class='add'>+		for (j = pageblock_nr_pages; j; --j, pfn++) {</div><div class='add'>+			WARN_ON_ONCE(!pfn_valid(pfn));</div><div class='add'>+			if (page_zone(pfn_to_page(pfn)) != zone)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		init_cma_reserved_pageblock(pfn_to_page(base_pfn));</div><div class='add'>+	} while (--i);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init struct cma *cma_create_area(unsigned long base_pfn,</div><div class='add'>+				     unsigned long count)</div><div class='add'>+{</div><div class='add'>+	int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);</div><div class='add'>+	struct cma *cma;</div><div class='add'>+	int ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s(base %08lx, count %lx)\n", __func__, base_pfn, count);</div><div class='add'>+</div><div class='add'>+	cma = kmalloc(sizeof *cma, GFP_KERNEL);</div><div class='add'>+	if (!cma)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	cma-&gt;base_pfn = base_pfn;</div><div class='add'>+	cma-&gt;count = count;</div><div class='add'>+	cma-&gt;bitmap = kzalloc(bitmap_size, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!cma-&gt;bitmap)</div><div class='add'>+		goto no_mem;</div><div class='add'>+</div><div class='add'>+	ret = cma_activate_area(base_pfn, count);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: returned %p\n", __func__, (void *)cma);</div><div class='add'>+	return cma;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	kfree(cma-&gt;bitmap);</div><div class='add'>+no_mem:</div><div class='add'>+	kfree(cma);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct cma_reserved {</div><div class='add'>+	phys_addr_t start;</div><div class='add'>+	unsigned long size;</div><div class='add'>+	struct device *dev;</div><div class='add'>+} cma_reserved[MAX_CMA_AREAS] __initdata;</div><div class='add'>+static unsigned cma_reserved_count __initdata;</div><div class='add'>+</div><div class='add'>+static int __init cma_init_reserved_areas(void)</div><div class='add'>+{</div><div class='add'>+	struct cma_reserved *r = cma_reserved;</div><div class='add'>+	unsigned i = cma_reserved_count;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s()\n", __func__);</div><div class='add'>+</div><div class='add'>+	for (; i; --i, ++r) {</div><div class='add'>+		struct cma *cma;</div><div class='add'>+		cma = cma_create_area(PFN_DOWN(r-&gt;start),</div><div class='add'>+				      r-&gt;size &gt;&gt; PAGE_SHIFT);</div><div class='add'>+		if (!IS_ERR(cma))</div><div class='add'>+			dev_set_cma_area(r-&gt;dev, cma);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+core_initcall(cma_init_reserved_areas);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dma_declare_contiguous() - reserve area for contiguous memory handling</div><div class='add'>+ *			      for particular device</div><div class='add'>+ * @dev:   Pointer to device structure.</div><div class='add'>+ * @size:  Size of the reserved memory.</div><div class='add'>+ * @base:  Start address of the reserved memory (optional, 0 for any).</div><div class='add'>+ * @limit: End address of the reserved memory (optional, 0 for any).</div><div class='add'>+ *</div><div class='add'>+ * This function reserves memory for specified device. It should be</div><div class='add'>+ * called by board specific code when early allocator (memblock or bootmem)</div><div class='add'>+ * is still activate.</div><div class='add'>+ */</div><div class='add'>+int __init dma_declare_contiguous(struct device *dev, unsigned long size,</div><div class='add'>+				  phys_addr_t base, phys_addr_t limit)</div><div class='add'>+{</div><div class='add'>+	struct cma_reserved *r = &amp;cma_reserved[cma_reserved_count];</div><div class='add'>+	unsigned long alignment;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s(size %lx, base %08lx, limit %08lx)\n", __func__,</div><div class='add'>+		 (unsigned long)size, (unsigned long)base,</div><div class='add'>+		 (unsigned long)limit);</div><div class='add'>+</div><div class='add'>+	/* Sanity checks */</div><div class='add'>+	if (cma_reserved_count == ARRAY_SIZE(cma_reserved)) {</div><div class='add'>+		pr_err("Not enough slots for CMA reserved regions!\n");</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!size)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Sanitise input arguments */</div><div class='add'>+	alignment = PAGE_SIZE &lt;&lt; max(MAX_ORDER, pageblock_order);</div><div class='add'>+	base = ALIGN(base, alignment);</div><div class='add'>+	size = ALIGN(size, alignment);</div><div class='add'>+	limit &amp;= ~(alignment - 1);</div><div class='add'>+</div><div class='add'>+	/* Reserve memory */</div><div class='add'>+	if (base) {</div><div class='add'>+		if (memblock_is_region_reserved(base, size) ||</div><div class='add'>+		    memblock_reserve(base, size) &lt; 0) {</div><div class='add'>+			base = -EBUSY;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * Use __memblock_alloc_base() since</div><div class='add'>+		 * memblock_alloc_base() panic()s.</div><div class='add'>+		 */</div><div class='add'>+		phys_addr_t addr = __memblock_alloc_base(size, alignment, limit);</div><div class='add'>+		if (!addr) {</div><div class='add'>+			base = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		} else if (addr + size &gt; ~(unsigned long)0) {</div><div class='add'>+			memblock_free(addr, size);</div><div class='add'>+			base = -EINVAL;</div><div class='add'>+			goto err;</div><div class='add'>+		} else {</div><div class='add'>+			base = addr;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Each reserved area must be initialised later, when more kernel</div><div class='add'>+	 * subsystems (like slab allocator) are available.</div><div class='add'>+	 */</div><div class='add'>+	r-&gt;start = base;</div><div class='add'>+	r-&gt;size = size;</div><div class='add'>+	r-&gt;dev = dev;</div><div class='add'>+	cma_reserved_count++;</div><div class='add'>+	pr_info("CMA: reserved %ld MiB at %08lx\n", size / SZ_1M,</div><div class='add'>+		(unsigned long)base);</div><div class='add'>+</div><div class='add'>+	/* Architecture specific contiguous memory fixup. */</div><div class='add'>+	dma_contiguous_early_fixup(base, size);</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	pr_err("CMA: failed to reserve %ld MiB\n", size / SZ_1M);</div><div class='add'>+	return base;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dma_alloc_from_contiguous() - allocate pages from contiguous area</div><div class='add'>+ * @dev:   Pointer to device for which the allocation is performed.</div><div class='add'>+ * @count: Requested number of pages.</div><div class='add'>+ * @align: Requested alignment of pages (in PAGE_SIZE order).</div><div class='add'>+ *</div><div class='add'>+ * This function allocates memory buffer for specified device. It uses</div><div class='add'>+ * device specific contiguous memory area if available or the default</div><div class='add'>+ * global one. Requires architecture specific get_dev_cma_area() helper</div><div class='add'>+ * function.</div><div class='add'>+ */</div><div class='add'>+struct page *dma_alloc_from_contiguous(struct device *dev, int count,</div><div class='add'>+				       unsigned int align)</div><div class='add'>+{</div><div class='add'>+	unsigned long mask, pfn, pageno, start = 0;</div><div class='add'>+	struct cma *cma = dev_get_cma_area(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!cma || !cma-&gt;count)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (align &gt; CONFIG_CMA_ALIGNMENT)</div><div class='add'>+		align = CONFIG_CMA_ALIGNMENT;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s(cma %p, count %d, align %d)\n", __func__, (void *)cma,</div><div class='add'>+		 count, align);</div><div class='add'>+</div><div class='add'>+	if (!count)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	mask = (1 &lt;&lt; align) - 1;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;cma_mutex);</div><div class='add'>+</div><div class='add'>+	for (;;) {</div><div class='add'>+		pageno = bitmap_find_next_zero_area(cma-&gt;bitmap, cma-&gt;count,</div><div class='add'>+						    start, count, mask);</div><div class='add'>+		if (pageno &gt;= cma-&gt;count) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto error;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pfn = cma-&gt;base_pfn + pageno;</div><div class='add'>+		ret = alloc_contig_range(pfn, pfn + count, MIGRATE_CMA);</div><div class='add'>+		if (ret == 0) {</div><div class='add'>+			bitmap_set(cma-&gt;bitmap, pageno, count);</div><div class='add'>+			break;</div><div class='add'>+		} else if (ret != -EBUSY) {</div><div class='add'>+			goto error;</div><div class='add'>+		}</div><div class='add'>+		pr_debug("%s(): memory range at %p is busy, retrying\n",</div><div class='add'>+			 __func__, pfn_to_page(pfn));</div><div class='add'>+		/* try again with a bit different memory target */</div><div class='add'>+		start = pageno + mask + 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;cma_mutex);</div><div class='add'>+</div><div class='add'>+	pr_debug("%s(): returned %p\n", __func__, pfn_to_page(pfn));</div><div class='add'>+	return pfn_to_page(pfn);</div><div class='add'>+error:</div><div class='add'>+	mutex_unlock(&amp;cma_mutex);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dma_release_from_contiguous() - release allocated pages</div><div class='add'>+ * @dev:   Pointer to device for which the pages were allocated.</div><div class='add'>+ * @pages: Allocated pages.</div><div class='add'>+ * @count: Number of allocated pages.</div><div class='add'>+ *</div><div class='add'>+ * This function releases memory allocated by dma_alloc_from_contiguous().</div><div class='add'>+ * It returns false when provided pages do not belong to contiguous area and</div><div class='add'>+ * true otherwise.</div><div class='add'>+ */</div><div class='add'>+bool dma_release_from_contiguous(struct device *dev, struct page *pages,</div><div class='add'>+				 int count)</div><div class='add'>+{</div><div class='add'>+	struct cma *cma = dev_get_cma_area(dev);</div><div class='add'>+	unsigned long pfn;</div><div class='add'>+</div><div class='add'>+	if (!cma || !pages)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s(page %p)\n", __func__, (void *)pages);</div><div class='add'>+</div><div class='add'>+	pfn = page_to_pfn(pages);</div><div class='add'>+</div><div class='add'>+	if (pfn &lt; cma-&gt;base_pfn || pfn &gt;= cma-&gt;base_pfn + cma-&gt;count)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	VM_BUG_ON(pfn + count &gt; cma-&gt;base_pfn + cma-&gt;count);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;cma_mutex);</div><div class='add'>+	bitmap_clear(cma-&gt;bitmap, pfn - cma-&gt;base_pfn, count);</div><div class='add'>+	free_contig_range(pfn, count);</div><div class='add'>+	mutex_unlock(&amp;cma_mutex);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/base/driver.c b/drivers/base/driver.c<br/>index 3ec3896c83a6..207c27ddf828 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/driver.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/driver.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/driver.c</a></div><div class='hunk'>@@ -80,7 +80,7 @@ struct device *driver_find_device(struct device_driver *drv,</div><div class='ctx'> 	struct klist_iter i;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> </div><div class='del'>-	if (!drv)</div><div class='add'>+	if (!drv || !drv-&gt;p)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	klist_iter_init_node(&amp;drv-&gt;p-&gt;klist_devices, &amp;i,</div><div class='head'>diff --git a/drivers/base/node.c b/drivers/base/node.c<br/>index 90aa2a11a933..af1a177216f1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/node.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/node.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/node.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/node.c</a></div><div class='hunk'>@@ -592,11 +592,9 @@ static ssize_t print_nodes_state(enum node_states state, char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	int n;</div><div class='ctx'> </div><div class='del'>-	n = nodelist_scnprintf(buf, PAGE_SIZE, node_states[state]);</div><div class='del'>-	if (n &gt; 0 &amp;&amp; PAGE_SIZE &gt; n + 1) {</div><div class='del'>-		*(buf + n++) = '\n';</div><div class='del'>-		*(buf + n++) = '\0';</div><div class='del'>-	}</div><div class='add'>+	n = nodelist_scnprintf(buf, PAGE_SIZE-2, node_states[state]);</div><div class='add'>+	buf[n++] = '\n';</div><div class='add'>+	buf[n] = '\0';</div><div class='ctx'> 	return n;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c<br/>index 73ce9fbe9839..83aa694a8efe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/power/domain.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/power/domain.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/power/domain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/domain.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> #include &lt;linux/pm_domain.h&gt;</div><div class='add'>+#include &lt;linux/pm_qos.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='hunk'>@@ -38,11 +39,13 @@</div><div class='ctx'> 	ktime_t __start = ktime_get();						\</div><div class='ctx'> 	type __retval = GENPD_DEV_CALLBACK(genpd, type, callback, dev);		\</div><div class='ctx'> 	s64 __elapsed = ktime_to_ns(ktime_sub(ktime_get(), __start));		\</div><div class='del'>-	struct generic_pm_domain_data *__gpd_data = dev_gpd_data(dev);		\</div><div class='del'>-	if (__elapsed &gt; __gpd_data-&gt;td.field) {					\</div><div class='del'>-		__gpd_data-&gt;td.field = __elapsed;				\</div><div class='add'>+	struct gpd_timing_data *__td = &amp;dev_gpd_data(dev)-&gt;td;			\</div><div class='add'>+	if (!__retval &amp;&amp; __elapsed &gt; __td-&gt;field) {				\</div><div class='add'>+		__td-&gt;field = __elapsed;					\</div><div class='ctx'> 		dev_warn(dev, name " latency exceeded, new value %lld ns\n",	\</div><div class='ctx'> 			__elapsed);						\</div><div class='add'>+		genpd-&gt;max_off_time_changed = true;				\</div><div class='add'>+		__td-&gt;constraint_changed = true;				\</div><div class='ctx'> 	}									\</div><div class='ctx'> 	__retval;								\</div><div class='ctx'> })</div><div class='hunk'>@@ -211,6 +214,7 @@ int __pm_genpd_poweron(struct generic_pm_domain *genpd)</div><div class='ctx'> 		elapsed_ns = ktime_to_ns(ktime_sub(ktime_get(), time_start));</div><div class='ctx'> 		if (elapsed_ns &gt; genpd-&gt;power_on_latency_ns) {</div><div class='ctx'> 			genpd-&gt;power_on_latency_ns = elapsed_ns;</div><div class='add'>+			genpd-&gt;max_off_time_changed = true;</div><div class='ctx'> 			if (genpd-&gt;name)</div><div class='ctx'> 				pr_warning("%s: Power-on latency exceeded, "</div><div class='ctx'> 					"new value %lld ns\n", genpd-&gt;name,</div><div class='hunk'>@@ -247,6 +251,53 @@ int pm_genpd_poweron(struct generic_pm_domain *genpd)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_RUNTIME</div><div class='ctx'> </div><div class='add'>+static int genpd_dev_pm_qos_notifier(struct notifier_block *nb,</div><div class='add'>+				     unsigned long val, void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct generic_pm_domain_data *gpd_data;</div><div class='add'>+	struct device *dev;</div><div class='add'>+</div><div class='add'>+	gpd_data = container_of(nb, struct generic_pm_domain_data, nb);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;gpd_data-&gt;lock);</div><div class='add'>+	dev = gpd_data-&gt;base.dev;</div><div class='add'>+	if (!dev) {</div><div class='add'>+		mutex_unlock(&amp;gpd_data-&gt;lock);</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;gpd_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	for (;;) {</div><div class='add'>+		struct generic_pm_domain *genpd;</div><div class='add'>+		struct pm_domain_data *pdd;</div><div class='add'>+</div><div class='add'>+		spin_lock_irq(&amp;dev-&gt;power.lock);</div><div class='add'>+</div><div class='add'>+		pdd = dev-&gt;power.subsys_data ?</div><div class='add'>+				dev-&gt;power.subsys_data-&gt;domain_data : NULL;</div><div class='add'>+		if (pdd) {</div><div class='add'>+			to_gpd_data(pdd)-&gt;td.constraint_changed = true;</div><div class='add'>+			genpd = dev_to_genpd(dev);</div><div class='add'>+		} else {</div><div class='add'>+			genpd = ERR_PTR(-ENODATA);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		spin_unlock_irq(&amp;dev-&gt;power.lock);</div><div class='add'>+</div><div class='add'>+		if (!IS_ERR(genpd)) {</div><div class='add'>+			mutex_lock(&amp;genpd-&gt;lock);</div><div class='add'>+			genpd-&gt;max_off_time_changed = true;</div><div class='add'>+			mutex_unlock(&amp;genpd-&gt;lock);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev = dev-&gt;parent;</div><div class='add'>+		if (!dev || dev-&gt;power.ignore_children)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NOTIFY_DONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * __pm_genpd_save_device - Save the pre-suspend state of a device.</div><div class='ctx'>  * @pdd: Domain data of the device to save the state of.</div><div class='hunk'>@@ -435,6 +486,7 @@ static int pm_genpd_poweroff(struct generic_pm_domain *genpd)</div><div class='ctx'> 		elapsed_ns = ktime_to_ns(ktime_sub(ktime_get(), time_start));</div><div class='ctx'> 		if (elapsed_ns &gt; genpd-&gt;power_off_latency_ns) {</div><div class='ctx'> 			genpd-&gt;power_off_latency_ns = elapsed_ns;</div><div class='add'>+			genpd-&gt;max_off_time_changed = true;</div><div class='ctx'> 			if (genpd-&gt;name)</div><div class='ctx'> 				pr_warning("%s: Power-off latency exceeded, "</div><div class='ctx'> 					"new value %lld ns\n", genpd-&gt;name,</div><div class='hunk'>@@ -443,17 +495,6 @@ static int pm_genpd_poweroff(struct generic_pm_domain *genpd)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	genpd-&gt;status = GPD_STATE_POWER_OFF;</div><div class='del'>-	genpd-&gt;power_off_time = ktime_get();</div><div class='del'>-</div><div class='del'>-	/* Update PM QoS information for devices in the domain. */</div><div class='del'>-	list_for_each_entry_reverse(pdd, &amp;genpd-&gt;dev_list, list_node) {</div><div class='del'>-		struct gpd_timing_data *td = &amp;to_gpd_data(pdd)-&gt;td;</div><div class='del'>-</div><div class='del'>-		pm_runtime_update_max_time_suspended(pdd-&gt;dev,</div><div class='del'>-					td-&gt;start_latency_ns +</div><div class='del'>-					td-&gt;restore_state_latency_ns +</div><div class='del'>-					genpd-&gt;power_on_latency_ns);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(link, &amp;genpd-&gt;slave_links, slave_node) {</div><div class='ctx'> 		genpd_sd_counter_dec(link-&gt;master);</div><div class='hunk'>@@ -514,9 +555,6 @@ static int pm_genpd_runtime_suspend(struct device *dev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	pm_runtime_update_max_time_suspended(dev,</div><div class='del'>-				dev_gpd_data(dev)-&gt;td.start_latency_ns);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If power.irq_safe is set, this routine will be run with interrupts</div><div class='ctx'> 	 * off, so it can't use mutexes.</div><div class='hunk'>@@ -613,6 +651,12 @@ void pm_genpd_poweroff_unused(void)</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='add'>+static inline int genpd_dev_pm_qos_notifier(struct notifier_block *nb,</div><div class='add'>+					    unsigned long val, void *ptr)</div><div class='add'>+{</div><div class='add'>+	return NOTIFY_DONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void genpd_power_off_work_fn(struct work_struct *work) {}</div><div class='ctx'> </div><div class='ctx'> #define pm_genpd_runtime_suspend	NULL</div><div class='hunk'>@@ -1209,12 +1253,15 @@ int __pm_genpd_add_device(struct generic_pm_domain *genpd, struct device *dev,</div><div class='ctx'> 	if (IS_ERR_OR_NULL(genpd) || IS_ERR_OR_NULL(dev))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	genpd_acquire_lock(genpd);</div><div class='add'>+	gpd_data = kzalloc(sizeof(*gpd_data), GFP_KERNEL);</div><div class='add'>+	if (!gpd_data)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (genpd-&gt;status == GPD_STATE_POWER_OFF) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	mutex_init(&amp;gpd_data-&gt;lock);</div><div class='add'>+	gpd_data-&gt;nb.notifier_call = genpd_dev_pm_qos_notifier;</div><div class='add'>+	dev_pm_qos_add_notifier(dev, &amp;gpd_data-&gt;nb);</div><div class='add'>+</div><div class='add'>+	genpd_acquire_lock(genpd);</div><div class='ctx'> </div><div class='ctx'> 	if (genpd-&gt;prepared_count &gt; 0) {</div><div class='ctx'> 		ret = -EAGAIN;</div><div class='hunk'>@@ -1227,26 +1274,35 @@ int __pm_genpd_add_device(struct generic_pm_domain *genpd, struct device *dev,</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-	gpd_data = kzalloc(sizeof(*gpd_data), GFP_KERNEL);</div><div class='del'>-	if (!gpd_data) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	genpd-&gt;device_count++;</div><div class='add'>+	genpd-&gt;max_off_time_changed = true;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;pm_domain = &amp;genpd-&gt;domain;</div><div class='ctx'> 	dev_pm_get_subsys_data(dev);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;gpd_data-&gt;lock);</div><div class='add'>+	spin_lock_irq(&amp;dev-&gt;power.lock);</div><div class='add'>+	dev-&gt;pm_domain = &amp;genpd-&gt;domain;</div><div class='ctx'> 	dev-&gt;power.subsys_data-&gt;domain_data = &amp;gpd_data-&gt;base;</div><div class='ctx'> 	gpd_data-&gt;base.dev = dev;</div><div class='del'>-	gpd_data-&gt;need_restore = false;</div><div class='ctx'> 	list_add_tail(&amp;gpd_data-&gt;base.list_node, &amp;genpd-&gt;dev_list);</div><div class='add'>+	gpd_data-&gt;need_restore = genpd-&gt;status == GPD_STATE_POWER_OFF;</div><div class='ctx'> 	if (td)</div><div class='ctx'> 		gpd_data-&gt;td = *td;</div><div class='ctx'> </div><div class='add'>+	gpd_data-&gt;td.constraint_changed = true;</div><div class='add'>+	gpd_data-&gt;td.effective_constraint_ns = -1;</div><div class='add'>+	spin_unlock_irq(&amp;dev-&gt;power.lock);</div><div class='add'>+	mutex_unlock(&amp;gpd_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	genpd_release_lock(genpd);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='ctx'>  out:</div><div class='ctx'> 	genpd_release_lock(genpd);</div><div class='ctx'> </div><div class='add'>+	dev_pm_qos_remove_notifier(dev, &amp;gpd_data-&gt;nb);</div><div class='add'>+	kfree(gpd_data);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1290,12 +1346,15 @@ int __pm_genpd_of_add_device(struct device_node *genpd_node, struct device *dev,</div><div class='ctx'> int pm_genpd_remove_device(struct generic_pm_domain *genpd,</div><div class='ctx'> 			   struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct generic_pm_domain_data *gpd_data;</div><div class='ctx'> 	struct pm_domain_data *pdd;</div><div class='del'>-	int ret = -EINVAL;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "%s()\n", __func__);</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR_OR_NULL(genpd) || IS_ERR_OR_NULL(dev))</div><div class='add'>+	if (IS_ERR_OR_NULL(genpd) || IS_ERR_OR_NULL(dev)</div><div class='add'>+	    ||  IS_ERR_OR_NULL(dev-&gt;pm_domain)</div><div class='add'>+	    ||  pd_to_genpd(dev-&gt;pm_domain) != genpd)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	genpd_acquire_lock(genpd);</div><div class='hunk'>@@ -1305,21 +1364,27 @@ int pm_genpd_remove_device(struct generic_pm_domain *genpd,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(pdd, &amp;genpd-&gt;dev_list, list_node) {</div><div class='del'>-		if (pdd-&gt;dev != dev)</div><div class='del'>-			continue;</div><div class='add'>+	genpd-&gt;device_count--;</div><div class='add'>+	genpd-&gt;max_off_time_changed = true;</div><div class='ctx'> </div><div class='del'>-		list_del_init(&amp;pdd-&gt;list_node);</div><div class='del'>-		pdd-&gt;dev = NULL;</div><div class='del'>-		dev_pm_put_subsys_data(dev);</div><div class='del'>-		dev-&gt;pm_domain = NULL;</div><div class='del'>-		kfree(to_gpd_data(pdd));</div><div class='add'>+	spin_lock_irq(&amp;dev-&gt;power.lock);</div><div class='add'>+	dev-&gt;pm_domain = NULL;</div><div class='add'>+	pdd = dev-&gt;power.subsys_data-&gt;domain_data;</div><div class='add'>+	list_del_init(&amp;pdd-&gt;list_node);</div><div class='add'>+	dev-&gt;power.subsys_data-&gt;domain_data = NULL;</div><div class='add'>+	spin_unlock_irq(&amp;dev-&gt;power.lock);</div><div class='ctx'> </div><div class='del'>-		genpd-&gt;device_count--;</div><div class='add'>+	gpd_data = to_gpd_data(pdd);</div><div class='add'>+	mutex_lock(&amp;gpd_data-&gt;lock);</div><div class='add'>+	pdd-&gt;dev = NULL;</div><div class='add'>+	mutex_unlock(&amp;gpd_data-&gt;lock);</div><div class='ctx'> </div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	genpd_release_lock(genpd);</div><div class='add'>+</div><div class='add'>+	dev_pm_qos_remove_notifier(dev, &amp;gpd_data-&gt;nb);</div><div class='add'>+	kfree(gpd_data);</div><div class='add'>+	dev_pm_put_subsys_data(dev);</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='ctx'> 	genpd_release_lock(genpd);</div><div class='hunk'>@@ -1348,6 +1413,26 @@ void pm_genpd_dev_always_on(struct device *dev, bool val)</div><div class='ctx'> EXPORT_SYMBOL_GPL(pm_genpd_dev_always_on);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * pm_genpd_dev_need_restore - Set/unset the device's "need restore" flag.</div><div class='add'>+ * @dev: Device to set/unset the flag for.</div><div class='add'>+ * @val: The new value of the device's "need restore" flag.</div><div class='add'>+ */</div><div class='add'>+void pm_genpd_dev_need_restore(struct device *dev, bool val)</div><div class='add'>+{</div><div class='add'>+	struct pm_subsys_data *psd;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev-&gt;power.lock, flags);</div><div class='add'>+</div><div class='add'>+	psd = dev_to_psd(dev);</div><div class='add'>+	if (psd &amp;&amp; psd-&gt;domain_data)</div><div class='add'>+		to_gpd_data(psd-&gt;domain_data)-&gt;need_restore = val;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev-&gt;power.lock, flags);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(pm_genpd_dev_need_restore);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * pm_genpd_add_subdomain - Add a subdomain to an I/O PM domain.</div><div class='ctx'>  * @genpd: Master PM domain to add the subdomain to.</div><div class='ctx'>  * @subdomain: Subdomain to be added.</div><div class='hunk'>@@ -1378,7 +1463,7 @@ int pm_genpd_add_subdomain(struct generic_pm_domain *genpd,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(link, &amp;genpd-&gt;slave_links, slave_node) {</div><div class='add'>+	list_for_each_entry(link, &amp;genpd-&gt;master_links, master_node) {</div><div class='ctx'> 		if (link-&gt;slave == subdomain &amp;&amp; link-&gt;master == genpd) {</div><div class='ctx'> 			ret = -EINVAL;</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -1690,6 +1775,7 @@ void pm_genpd_init(struct generic_pm_domain *genpd,</div><div class='ctx'> 	genpd-&gt;resume_count = 0;</div><div class='ctx'> 	genpd-&gt;device_count = 0;</div><div class='ctx'> 	genpd-&gt;max_off_time_ns = -1;</div><div class='add'>+	genpd-&gt;max_off_time_changed = true;</div><div class='ctx'> 	genpd-&gt;domain.ops.runtime_suspend = pm_genpd_runtime_suspend;</div><div class='ctx'> 	genpd-&gt;domain.ops.runtime_resume = pm_genpd_runtime_resume;</div><div class='ctx'> 	genpd-&gt;domain.ops.runtime_idle = pm_generic_runtime_idle;</div><div class='head'>diff --git a/drivers/base/power/domain_governor.c b/drivers/base/power/domain_governor.c<br/>index 66a265bf5867..28dee3053f1f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/power/domain_governor.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/power/domain_governor.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/power/domain_governor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/domain_governor.c</a></div><div class='hunk'>@@ -14,6 +14,31 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_RUNTIME</div><div class='ctx'> </div><div class='add'>+static int dev_update_qos_constraint(struct device *dev, void *data)</div><div class='add'>+{</div><div class='add'>+	s64 *constraint_ns_p = data;</div><div class='add'>+	s32 constraint_ns = -1;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;power.subsys_data &amp;&amp; dev-&gt;power.subsys_data-&gt;domain_data)</div><div class='add'>+		constraint_ns = dev_gpd_data(dev)-&gt;td.effective_constraint_ns;</div><div class='add'>+</div><div class='add'>+	if (constraint_ns &lt; 0) {</div><div class='add'>+		constraint_ns = dev_pm_qos_read_value(dev);</div><div class='add'>+		constraint_ns *= NSEC_PER_USEC;</div><div class='add'>+	}</div><div class='add'>+	if (constraint_ns == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * constraint_ns cannot be negative here, because the device has been</div><div class='add'>+	 * suspended.</div><div class='add'>+	 */</div><div class='add'>+	if (constraint_ns &lt; *constraint_ns_p || *constraint_ns_p == 0)</div><div class='add'>+		*constraint_ns_p = constraint_ns;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * default_stop_ok - Default PM domain governor routine for stopping devices.</div><div class='ctx'>  * @dev: Device to check.</div><div class='hunk'>@@ -21,14 +46,52 @@</div><div class='ctx'> bool default_stop_ok(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpd_timing_data *td = &amp;dev_gpd_data(dev)-&gt;td;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	s64 constraint_ns;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "%s()\n", __func__);</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;power.max_time_suspended_ns &lt; 0 || td-&gt;break_even_ns == 0)</div><div class='del'>-		return true;</div><div class='add'>+	spin_lock_irqsave(&amp;dev-&gt;power.lock, flags);</div><div class='add'>+</div><div class='add'>+	if (!td-&gt;constraint_changed) {</div><div class='add'>+		bool ret = td-&gt;cached_stop_ok;</div><div class='ctx'> </div><div class='del'>-	return td-&gt;stop_latency_ns + td-&gt;start_latency_ns &lt; td-&gt;break_even_ns</div><div class='del'>-		&amp;&amp; td-&gt;break_even_ns &lt; dev-&gt;power.max_time_suspended_ns;</div><div class='add'>+		spin_unlock_irqrestore(&amp;dev-&gt;power.lock, flags);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	td-&gt;constraint_changed = false;</div><div class='add'>+	td-&gt;cached_stop_ok = false;</div><div class='add'>+	td-&gt;effective_constraint_ns = -1;</div><div class='add'>+	constraint_ns = __dev_pm_qos_read_value(dev);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev-&gt;power.lock, flags);</div><div class='add'>+</div><div class='add'>+	if (constraint_ns &lt; 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	constraint_ns *= NSEC_PER_USEC;</div><div class='add'>+	/*</div><div class='add'>+	 * We can walk the children without any additional locking, because</div><div class='add'>+	 * they all have been suspended at this point and their</div><div class='add'>+	 * effective_constraint_ns fields won't be modified in parallel with us.</div><div class='add'>+	 */</div><div class='add'>+	if (!dev-&gt;power.ignore_children)</div><div class='add'>+		device_for_each_child(dev, &amp;constraint_ns,</div><div class='add'>+				      dev_update_qos_constraint);</div><div class='add'>+</div><div class='add'>+	if (constraint_ns &gt; 0) {</div><div class='add'>+		constraint_ns -= td-&gt;start_latency_ns;</div><div class='add'>+		if (constraint_ns == 0)</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+	td-&gt;effective_constraint_ns = constraint_ns;</div><div class='add'>+	td-&gt;cached_stop_ok = constraint_ns &gt; td-&gt;stop_latency_ns ||</div><div class='add'>+				constraint_ns == 0;</div><div class='add'>+	/*</div><div class='add'>+	 * The children have been suspended already, so we don't need to take</div><div class='add'>+	 * their stop latencies into account here.</div><div class='add'>+	 */</div><div class='add'>+	return td-&gt;cached_stop_ok;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -42,9 +105,27 @@ static bool default_power_down_ok(struct dev_pm_domain *pd)</div><div class='ctx'> 	struct generic_pm_domain *genpd = pd_to_genpd(pd);</div><div class='ctx'> 	struct gpd_link *link;</div><div class='ctx'> 	struct pm_domain_data *pdd;</div><div class='del'>-	s64 min_dev_off_time_ns;</div><div class='add'>+	s64 min_off_time_ns;</div><div class='ctx'> 	s64 off_on_time_ns;</div><div class='del'>-	ktime_t time_now = ktime_get();</div><div class='add'>+</div><div class='add'>+	if (genpd-&gt;max_off_time_changed) {</div><div class='add'>+		struct gpd_link *link;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We have to invalidate the cached results for the masters, so</div><div class='add'>+		 * use the observation that default_power_down_ok() is not</div><div class='add'>+		 * going to be called for any master until this instance</div><div class='add'>+		 * returns.</div><div class='add'>+		 */</div><div class='add'>+		list_for_each_entry(link, &amp;genpd-&gt;slave_links, slave_node)</div><div class='add'>+			link-&gt;master-&gt;max_off_time_changed = true;</div><div class='add'>+</div><div class='add'>+		genpd-&gt;max_off_time_changed = false;</div><div class='add'>+		genpd-&gt;cached_power_down_ok = false;</div><div class='add'>+		genpd-&gt;max_off_time_ns = -1;</div><div class='add'>+	} else {</div><div class='add'>+		return genpd-&gt;cached_power_down_ok;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	off_on_time_ns = genpd-&gt;power_off_latency_ns +</div><div class='ctx'> 				genpd-&gt;power_on_latency_ns;</div><div class='hunk'>@@ -61,6 +142,7 @@ static bool default_power_down_ok(struct dev_pm_domain *pd)</div><div class='ctx'> 				to_gpd_data(pdd)-&gt;td.save_state_latency_ns;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	min_off_time_ns = -1;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check if subdomains can be off for enough time.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -73,8 +155,6 @@ static bool default_power_down_ok(struct dev_pm_domain *pd)</div><div class='ctx'> 		if (sd_max_off_ns &lt; 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		sd_max_off_ns -= ktime_to_ns(ktime_sub(time_now,</div><div class='del'>-						       sd-&gt;power_off_time));</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Check if the subdomain is allowed to be off long enough for</div><div class='ctx'> 		 * the current domain to turn off and on (that's how much time</div><div class='hunk'>@@ -82,60 +162,64 @@ static bool default_power_down_ok(struct dev_pm_domain *pd)</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (sd_max_off_ns &lt;= off_on_time_ns)</div><div class='ctx'> 			return false;</div><div class='add'>+</div><div class='add'>+		if (min_off_time_ns &gt; sd_max_off_ns || min_off_time_ns &lt; 0)</div><div class='add'>+			min_off_time_ns = sd_max_off_ns;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check if the devices in the domain can be off enough time.</div><div class='ctx'> 	 */</div><div class='del'>-	min_dev_off_time_ns = -1;</div><div class='ctx'> 	list_for_each_entry(pdd, &amp;genpd-&gt;dev_list, list_node) {</div><div class='ctx'> 		struct gpd_timing_data *td;</div><div class='del'>-		struct device *dev = pdd-&gt;dev;</div><div class='del'>-		s64 dev_off_time_ns;</div><div class='add'>+		s64 constraint_ns;</div><div class='ctx'> </div><div class='del'>-		if (!dev-&gt;driver || dev-&gt;power.max_time_suspended_ns &lt; 0)</div><div class='add'>+		if (!pdd-&gt;dev-&gt;driver)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * Check if the device is allowed to be off long enough for the</div><div class='add'>+		 * domain to turn off and on (that's how much time it will</div><div class='add'>+		 * have to wait worst case).</div><div class='add'>+		 */</div><div class='ctx'> 		td = &amp;to_gpd_data(pdd)-&gt;td;</div><div class='del'>-		dev_off_time_ns = dev-&gt;power.max_time_suspended_ns -</div><div class='del'>-			(td-&gt;start_latency_ns + td-&gt;restore_state_latency_ns +</div><div class='del'>-				ktime_to_ns(ktime_sub(time_now,</div><div class='del'>-						dev-&gt;power.suspend_time)));</div><div class='del'>-		if (dev_off_time_ns &lt;= off_on_time_ns)</div><div class='del'>-			return false;</div><div class='del'>-</div><div class='del'>-		if (min_dev_off_time_ns &gt; dev_off_time_ns</div><div class='del'>-		    || min_dev_off_time_ns &lt; 0)</div><div class='del'>-			min_dev_off_time_ns = dev_off_time_ns;</div><div class='del'>-	}</div><div class='add'>+		constraint_ns = td-&gt;effective_constraint_ns;</div><div class='add'>+		/* default_stop_ok() need not be called before us. */</div><div class='add'>+		if (constraint_ns &lt; 0) {</div><div class='add'>+			constraint_ns = dev_pm_qos_read_value(pdd-&gt;dev);</div><div class='add'>+			constraint_ns *= NSEC_PER_USEC;</div><div class='add'>+		}</div><div class='add'>+		if (constraint_ns == 0)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-	if (min_dev_off_time_ns &lt; 0) {</div><div class='ctx'> 		/*</div><div class='del'>-		 * There are no latency constraints, so the domain can spend</div><div class='del'>-		 * arbitrary time in the "off" state.</div><div class='add'>+		 * constraint_ns cannot be negative here, because the device has</div><div class='add'>+		 * been suspended.</div><div class='ctx'> 		 */</div><div class='del'>-		genpd-&gt;max_off_time_ns = -1;</div><div class='del'>-		return true;</div><div class='add'>+		constraint_ns -= td-&gt;restore_state_latency_ns;</div><div class='add'>+		if (constraint_ns &lt;= off_on_time_ns)</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		if (min_off_time_ns &gt; constraint_ns || min_off_time_ns &lt; 0)</div><div class='add'>+			min_off_time_ns = constraint_ns;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	genpd-&gt;cached_power_down_ok = true;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='del'>-	 * The difference between the computed minimum delta and the time needed</div><div class='del'>-	 * to turn the domain on is the maximum theoretical time this domain can</div><div class='del'>-	 * spend in the "off" state.</div><div class='add'>+	 * If the computed minimum device off time is negative, there are no</div><div class='add'>+	 * latency constraints, so the domain can spend arbitrary time in the</div><div class='add'>+	 * "off" state.</div><div class='ctx'> 	 */</div><div class='del'>-	min_dev_off_time_ns -= genpd-&gt;power_on_latency_ns;</div><div class='add'>+	if (min_off_time_ns &lt; 0)</div><div class='add'>+		return true;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If the difference between the computed minimum delta and the time</div><div class='del'>-	 * needed to turn the domain off and back on on is smaller than the</div><div class='del'>-	 * domain's power break even time, removing power from the domain is not</div><div class='del'>-	 * worth it.</div><div class='add'>+	 * The difference between the computed minimum subdomain or device off</div><div class='add'>+	 * time and the time needed to turn the domain on is the maximum</div><div class='add'>+	 * theoretical time this domain can spend in the "off" state.</div><div class='ctx'> 	 */</div><div class='del'>-	if (genpd-&gt;break_even_ns &gt;</div><div class='del'>-	    min_dev_off_time_ns - genpd-&gt;power_off_latency_ns)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	genpd-&gt;max_off_time_ns = min_dev_off_time_ns;</div><div class='add'>+	genpd-&gt;max_off_time_ns = min_off_time_ns - genpd-&gt;power_on_latency_ns;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c<br/>index b462c0e341cb..e0fb5b0435a3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/power/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/power/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/power/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/main.c</a></div><div class='hunk'>@@ -889,6 +889,11 @@ static int dpm_suspend_noirq(pm_message_t state)</div><div class='ctx'> 		if (!list_empty(&amp;dev-&gt;power.entry))</div><div class='ctx'> 			list_move(&amp;dev-&gt;power.entry, &amp;dpm_noirq_list);</div><div class='ctx'> 		put_device(dev);</div><div class='add'>+</div><div class='add'>+		if (pm_wakeup_pending()) {</div><div class='add'>+			error = -EBUSY;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;dpm_list_mtx);</div><div class='ctx'> 	if (error)</div><div class='hunk'>@@ -962,6 +967,11 @@ static int dpm_suspend_late(pm_message_t state)</div><div class='ctx'> 		if (!list_empty(&amp;dev-&gt;power.entry))</div><div class='ctx'> 			list_move(&amp;dev-&gt;power.entry, &amp;dpm_late_early_list);</div><div class='ctx'> 		put_device(dev);</div><div class='add'>+</div><div class='add'>+		if (pm_wakeup_pending()) {</div><div class='add'>+			error = -EBUSY;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;dpm_list_mtx);</div><div class='ctx'> 	if (error)</div><div class='head'>diff --git a/drivers/base/power/qos.c b/drivers/base/power/qos.c<br/>index 71855570922d..fd849a2c4fa8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/power/qos.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/power/qos.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/power/qos.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/qos.c</a></div><div class='hunk'>@@ -352,21 +352,26 @@ EXPORT_SYMBOL_GPL(dev_pm_qos_remove_request);</div><div class='ctx'>  *</div><div class='ctx'>  * Will register the notifier into a notification chain that gets called</div><div class='ctx'>  * upon changes to the target value for the device.</div><div class='add'>+ *</div><div class='add'>+ * If the device's constraints object doesn't exist when this routine is called,</div><div class='add'>+ * it will be created (or error code will be returned if that fails).</div><div class='ctx'>  */</div><div class='ctx'> int dev_pm_qos_add_notifier(struct device *dev, struct notifier_block *notifier)</div><div class='ctx'> {</div><div class='del'>-	int retval = 0;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev_pm_qos_mtx);</div><div class='ctx'> </div><div class='del'>-	/* Silently return if the constraints object is not present. */</div><div class='del'>-	if (dev-&gt;power.constraints)</div><div class='del'>-		retval = blocking_notifier_chain_register(</div><div class='del'>-				dev-&gt;power.constraints-&gt;notifiers,</div><div class='del'>-				notifier);</div><div class='add'>+	if (!dev-&gt;power.constraints)</div><div class='add'>+		ret = dev-&gt;power.power_state.event != PM_EVENT_INVALID ?</div><div class='add'>+			dev_pm_qos_constraints_allocate(dev) : -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = blocking_notifier_chain_register(</div><div class='add'>+				dev-&gt;power.constraints-&gt;notifiers, notifier);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;dev_pm_qos_mtx);</div><div class='del'>-	return retval;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(dev_pm_qos_add_notifier);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c<br/>index bd0f3949bcf9..59894873a3b3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/power/runtime.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/power/runtime.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/power/runtime.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/runtime.c</a></div><div class='hunk'>@@ -282,47 +282,6 @@ static int rpm_callback(int (*cb)(struct device *), struct device *dev)</div><div class='ctx'> 	return retval != -EACCES ? retval : -EIO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct rpm_qos_data {</div><div class='del'>-	ktime_t time_now;</div><div class='del'>-	s64 constraint_ns;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rpm_update_qos_constraint - Update a given PM QoS constraint data.</div><div class='del'>- * @dev: Device whose timing data to use.</div><div class='del'>- * @data: PM QoS constraint data to update.</div><div class='del'>- *</div><div class='del'>- * Use the suspend timing data of @dev to update PM QoS constraint data pointed</div><div class='del'>- * to by @data.</div><div class='del'>- */</div><div class='del'>-static int rpm_update_qos_constraint(struct device *dev, void *data)</div><div class='del'>-{</div><div class='del'>-	struct rpm_qos_data *qos = data;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	s64 delta_ns;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;dev-&gt;power.lock, flags);</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;power.max_time_suspended_ns &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	delta_ns = dev-&gt;power.max_time_suspended_ns -</div><div class='del'>-		ktime_to_ns(ktime_sub(qos-&gt;time_now, dev-&gt;power.suspend_time));</div><div class='del'>-	if (delta_ns &lt;= 0) {</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (qos-&gt;constraint_ns &gt; delta_ns || qos-&gt;constraint_ns == 0)</div><div class='del'>-		qos-&gt;constraint_ns = delta_ns;</div><div class='del'>-</div><div class='del'>- out:</div><div class='del'>-	spin_unlock_irqrestore(&amp;dev-&gt;power.lock, flags);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * rpm_suspend - Carry out runtime suspend of given device.</div><div class='ctx'>  * @dev: Device to suspend.</div><div class='hunk'>@@ -349,7 +308,6 @@ static int rpm_suspend(struct device *dev, int rpmflags)</div><div class='ctx'> {</div><div class='ctx'> 	int (*callback)(struct device *);</div><div class='ctx'> 	struct device *parent = NULL;</div><div class='del'>-	struct rpm_qos_data qos;</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='ctx'> 	trace_rpm_suspend(dev, rpmflags);</div><div class='hunk'>@@ -445,38 +403,14 @@ static int rpm_suspend(struct device *dev, int rpmflags)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	qos.constraint_ns = __dev_pm_qos_read_value(dev);</div><div class='del'>-	if (qos.constraint_ns &lt; 0) {</div><div class='del'>-		/* Negative constraint means "never suspend". */</div><div class='add'>+	if (__dev_pm_qos_read_value(dev) &lt; 0) {</div><div class='add'>+		/* Negative PM QoS constraint means "never suspend". */</div><div class='ctx'> 		retval = -EPERM;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='del'>-	qos.constraint_ns *= NSEC_PER_USEC;</div><div class='del'>-	qos.time_now = ktime_get();</div><div class='ctx'> </div><div class='ctx'> 	__update_runtime_status(dev, RPM_SUSPENDING);</div><div class='ctx'> </div><div class='del'>-	if (!dev-&gt;power.ignore_children) {</div><div class='del'>-		if (dev-&gt;power.irq_safe)</div><div class='del'>-			spin_unlock(&amp;dev-&gt;power.lock);</div><div class='del'>-		else</div><div class='del'>-			spin_unlock_irq(&amp;dev-&gt;power.lock);</div><div class='del'>-</div><div class='del'>-		retval = device_for_each_child(dev, &amp;qos,</div><div class='del'>-					       rpm_update_qos_constraint);</div><div class='del'>-</div><div class='del'>-		if (dev-&gt;power.irq_safe)</div><div class='del'>-			spin_lock(&amp;dev-&gt;power.lock);</div><div class='del'>-		else</div><div class='del'>-			spin_lock_irq(&amp;dev-&gt;power.lock);</div><div class='del'>-</div><div class='del'>-		if (retval)</div><div class='del'>-			goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;power.suspend_time = qos.time_now;</div><div class='del'>-	dev-&gt;power.max_time_suspended_ns = qos.constraint_ns ? : -1;</div><div class='del'>-</div><div class='ctx'> 	if (dev-&gt;pm_domain)</div><div class='ctx'> 		callback = dev-&gt;pm_domain-&gt;ops.runtime_suspend;</div><div class='ctx'> 	else if (dev-&gt;type &amp;&amp; dev-&gt;type-&gt;pm)</div><div class='hunk'>@@ -529,8 +463,6 @@ static int rpm_suspend(struct device *dev, int rpmflags)</div><div class='ctx'> </div><div class='ctx'>  fail:</div><div class='ctx'> 	__update_runtime_status(dev, RPM_ACTIVE);</div><div class='del'>-	dev-&gt;power.suspend_time = ktime_set(0, 0);</div><div class='del'>-	dev-&gt;power.max_time_suspended_ns = -1;</div><div class='ctx'> 	dev-&gt;power.deferred_resume = false;</div><div class='ctx'> 	wake_up_all(&amp;dev-&gt;power.wait_queue);</div><div class='ctx'> </div><div class='hunk'>@@ -704,9 +636,6 @@ static int rpm_resume(struct device *dev, int rpmflags)</div><div class='ctx'> 	if (dev-&gt;power.no_callbacks)</div><div class='ctx'> 		goto no_callback;	/* Assume success. */</div><div class='ctx'> </div><div class='del'>-	dev-&gt;power.suspend_time = ktime_set(0, 0);</div><div class='del'>-	dev-&gt;power.max_time_suspended_ns = -1;</div><div class='del'>-</div><div class='ctx'> 	__update_runtime_status(dev, RPM_RESUMING);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;pm_domain)</div><div class='hunk'>@@ -1369,9 +1298,6 @@ void pm_runtime_init(struct device *dev)</div><div class='ctx'> 	setup_timer(&amp;dev-&gt;power.suspend_timer, pm_suspend_timer_fn,</div><div class='ctx'> 			(unsigned long)dev);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;power.suspend_time = ktime_set(0, 0);</div><div class='del'>-	dev-&gt;power.max_time_suspended_ns = -1;</div><div class='del'>-</div><div class='ctx'> 	init_waitqueue_head(&amp;dev-&gt;power.wait_queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1389,28 +1315,3 @@ void pm_runtime_remove(struct device *dev)</div><div class='ctx'> 	if (dev-&gt;power.irq_safe &amp;&amp; dev-&gt;parent)</div><div class='ctx'> 		pm_runtime_put_sync(dev-&gt;parent);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * pm_runtime_update_max_time_suspended - Update device's suspend time data.</div><div class='del'>- * @dev: Device to handle.</div><div class='del'>- * @delta_ns: Value to subtract from the device's max_time_suspended_ns field.</div><div class='del'>- *</div><div class='del'>- * Update the device's power.max_time_suspended_ns field by subtracting</div><div class='del'>- * @delta_ns from it.  The resulting value of power.max_time_suspended_ns is</div><div class='del'>- * never negative.</div><div class='del'>- */</div><div class='del'>-void pm_runtime_update_max_time_suspended(struct device *dev, s64 delta_ns)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;dev-&gt;power.lock, flags);</div><div class='del'>-</div><div class='del'>-	if (delta_ns &gt; 0 &amp;&amp; dev-&gt;power.max_time_suspended_ns &gt; 0) {</div><div class='del'>-		if (dev-&gt;power.max_time_suspended_ns &gt; delta_ns)</div><div class='del'>-			dev-&gt;power.max_time_suspended_ns -= delta_ns;</div><div class='del'>-		else</div><div class='del'>-			dev-&gt;power.max_time_suspended_ns = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;dev-&gt;power.lock, flags);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c<br/>index 95c12f6cb5b9..48be2ad4dd2c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/power/sysfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/power/sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/power/sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/sysfs.c</a></div><div class='hunk'>@@ -314,22 +314,41 @@ static ssize_t wakeup_active_count_show(struct device *dev,</div><div class='ctx'> </div><div class='ctx'> static DEVICE_ATTR(wakeup_active_count, 0444, wakeup_active_count_show, NULL);</div><div class='ctx'> </div><div class='del'>-static ssize_t wakeup_hit_count_show(struct device *dev,</div><div class='del'>-				struct device_attribute *attr, char *buf)</div><div class='add'>+static ssize_t wakeup_abort_count_show(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					char *buf)</div><div class='add'>+{</div><div class='add'>+	unsigned long count = 0;</div><div class='add'>+	bool enabled = false;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;dev-&gt;power.lock);</div><div class='add'>+	if (dev-&gt;power.wakeup) {</div><div class='add'>+		count = dev-&gt;power.wakeup-&gt;wakeup_count;</div><div class='add'>+		enabled = true;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(&amp;dev-&gt;power.lock);</div><div class='add'>+	return enabled ? sprintf(buf, "%lu\n", count) : sprintf(buf, "\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEVICE_ATTR(wakeup_abort_count, 0444, wakeup_abort_count_show, NULL);</div><div class='add'>+</div><div class='add'>+static ssize_t wakeup_expire_count_show(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long count = 0;</div><div class='ctx'> 	bool enabled = false;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;dev-&gt;power.lock);</div><div class='ctx'> 	if (dev-&gt;power.wakeup) {</div><div class='del'>-		count = dev-&gt;power.wakeup-&gt;hit_count;</div><div class='add'>+		count = dev-&gt;power.wakeup-&gt;expire_count;</div><div class='ctx'> 		enabled = true;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irq(&amp;dev-&gt;power.lock);</div><div class='ctx'> 	return enabled ? sprintf(buf, "%lu\n", count) : sprintf(buf, "\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static DEVICE_ATTR(wakeup_hit_count, 0444, wakeup_hit_count_show, NULL);</div><div class='add'>+static DEVICE_ATTR(wakeup_expire_count, 0444, wakeup_expire_count_show, NULL);</div><div class='ctx'> </div><div class='ctx'> static ssize_t wakeup_active_show(struct device *dev,</div><div class='ctx'> 				struct device_attribute *attr, char *buf)</div><div class='hunk'>@@ -398,6 +417,27 @@ static ssize_t wakeup_last_time_show(struct device *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static DEVICE_ATTR(wakeup_last_time_ms, 0444, wakeup_last_time_show, NULL);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_AUTOSLEEP</div><div class='add'>+static ssize_t wakeup_prevent_sleep_time_show(struct device *dev,</div><div class='add'>+					      struct device_attribute *attr,</div><div class='add'>+					      char *buf)</div><div class='add'>+{</div><div class='add'>+	s64 msec = 0;</div><div class='add'>+	bool enabled = false;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;dev-&gt;power.lock);</div><div class='add'>+	if (dev-&gt;power.wakeup) {</div><div class='add'>+		msec = ktime_to_ms(dev-&gt;power.wakeup-&gt;prevent_sleep_time);</div><div class='add'>+		enabled = true;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(&amp;dev-&gt;power.lock);</div><div class='add'>+	return enabled ? sprintf(buf, "%lld\n", msec) : sprintf(buf, "\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEVICE_ATTR(wakeup_prevent_sleep_time_ms, 0444,</div><div class='add'>+		   wakeup_prevent_sleep_time_show, NULL);</div><div class='add'>+#endif /* CONFIG_PM_AUTOSLEEP */</div><div class='ctx'> #endif /* CONFIG_PM_SLEEP */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_ADVANCED_DEBUG</div><div class='hunk'>@@ -486,11 +526,15 @@ static struct attribute *wakeup_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_wakeup.attr,</div><div class='ctx'> 	&amp;dev_attr_wakeup_count.attr,</div><div class='ctx'> 	&amp;dev_attr_wakeup_active_count.attr,</div><div class='del'>-	&amp;dev_attr_wakeup_hit_count.attr,</div><div class='add'>+	&amp;dev_attr_wakeup_abort_count.attr,</div><div class='add'>+	&amp;dev_attr_wakeup_expire_count.attr,</div><div class='ctx'> 	&amp;dev_attr_wakeup_active.attr,</div><div class='ctx'> 	&amp;dev_attr_wakeup_total_time_ms.attr,</div><div class='ctx'> 	&amp;dev_attr_wakeup_max_time_ms.attr,</div><div class='ctx'> 	&amp;dev_attr_wakeup_last_time_ms.attr,</div><div class='add'>+#ifdef CONFIG_PM_AUTOSLEEP</div><div class='add'>+	&amp;dev_attr_wakeup_prevent_sleep_time_ms.attr,</div><div class='add'>+#endif</div><div class='ctx'> #endif</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/base/power/wakeup.c b/drivers/base/power/wakeup.c<br/>index 2a3e581b8dcd..cbb463b3a750 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/power/wakeup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/power/wakeup.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/power/wakeup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/power/wakeup.c</a></div><div class='hunk'>@@ -14,16 +14,15 @@</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;trace/events/power.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "power.h"</div><div class='ctx'> </div><div class='del'>-#define TIMEOUT		100</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * If set, the suspend/hibernate code will abort transitions to a sleep state</div><div class='ctx'>  * if wakeup events are registered during or immediately before the transition.</div><div class='ctx'>  */</div><div class='del'>-bool events_check_enabled;</div><div class='add'>+bool events_check_enabled __read_mostly;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Combined counters of registered wakeup events and wakeup events in progress.</div><div class='hunk'>@@ -52,6 +51,8 @@ static void pm_wakeup_timer_fn(unsigned long data);</div><div class='ctx'> </div><div class='ctx'> static LIST_HEAD(wakeup_sources);</div><div class='ctx'> </div><div class='add'>+static DECLARE_WAIT_QUEUE_HEAD(wakeup_count_wait_queue);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * wakeup_source_prepare - Prepare a new wakeup source for initialization.</div><div class='ctx'>  * @ws: Wakeup source to prepare.</div><div class='hunk'>@@ -132,6 +133,7 @@ void wakeup_source_add(struct wakeup_source *ws)</div><div class='ctx'> 	spin_lock_init(&amp;ws-&gt;lock);</div><div class='ctx'> 	setup_timer(&amp;ws-&gt;timer, pm_wakeup_timer_fn, (unsigned long)ws);</div><div class='ctx'> 	ws-&gt;active = false;</div><div class='add'>+	ws-&gt;last_time = ktime_get();</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;events_lock);</div><div class='ctx'> 	list_add_rcu(&amp;ws-&gt;entry, &amp;wakeup_sources);</div><div class='hunk'>@@ -374,12 +376,33 @@ EXPORT_SYMBOL_GPL(device_set_wakeup_enable);</div><div class='ctx'>  */</div><div class='ctx'> static void wakeup_source_activate(struct wakeup_source *ws)</div><div class='ctx'> {</div><div class='add'>+	unsigned int cec;</div><div class='add'>+</div><div class='ctx'> 	ws-&gt;active = true;</div><div class='ctx'> 	ws-&gt;active_count++;</div><div class='ctx'> 	ws-&gt;last_time = ktime_get();</div><div class='add'>+	if (ws-&gt;autosleep_enabled)</div><div class='add'>+		ws-&gt;start_prevent_time = ws-&gt;last_time;</div><div class='ctx'> </div><div class='ctx'> 	/* Increment the counter of events in progress. */</div><div class='del'>-	atomic_inc(&amp;combined_event_count);</div><div class='add'>+	cec = atomic_inc_return(&amp;combined_event_count);</div><div class='add'>+</div><div class='add'>+	trace_wakeup_source_activate(ws-&gt;name, cec);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wakeup_source_report_event - Report wakeup event using the given source.</div><div class='add'>+ * @ws: Wakeup source to report the event for.</div><div class='add'>+ */</div><div class='add'>+static void wakeup_source_report_event(struct wakeup_source *ws)</div><div class='add'>+{</div><div class='add'>+	ws-&gt;event_count++;</div><div class='add'>+	/* This is racy, but the counter is approximate anyway. */</div><div class='add'>+	if (events_check_enabled)</div><div class='add'>+		ws-&gt;wakeup_count++;</div><div class='add'>+</div><div class='add'>+	if (!ws-&gt;active)</div><div class='add'>+		wakeup_source_activate(ws);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -397,10 +420,7 @@ void __pm_stay_awake(struct wakeup_source *ws)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ws-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	ws-&gt;event_count++;</div><div class='del'>-	if (!ws-&gt;active)</div><div class='del'>-		wakeup_source_activate(ws);</div><div class='del'>-</div><div class='add'>+	wakeup_source_report_event(ws);</div><div class='ctx'> 	del_timer(&amp;ws-&gt;timer);</div><div class='ctx'> 	ws-&gt;timer_expires = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -432,6 +452,17 @@ void pm_stay_awake(struct device *dev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(pm_stay_awake);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM_AUTOSLEEP</div><div class='add'>+static void update_prevent_sleep_time(struct wakeup_source *ws, ktime_t now)</div><div class='add'>+{</div><div class='add'>+	ktime_t delta = ktime_sub(now, ws-&gt;start_prevent_time);</div><div class='add'>+	ws-&gt;prevent_sleep_time = ktime_add(ws-&gt;prevent_sleep_time, delta);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline void update_prevent_sleep_time(struct wakeup_source *ws,</div><div class='add'>+					     ktime_t now) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * wakup_source_deactivate - Mark given wakeup source as inactive.</div><div class='ctx'>  * @ws: Wakeup source to handle.</div><div class='hunk'>@@ -442,6 +473,7 @@ EXPORT_SYMBOL_GPL(pm_stay_awake);</div><div class='ctx'>  */</div><div class='ctx'> static void wakeup_source_deactivate(struct wakeup_source *ws)</div><div class='ctx'> {</div><div class='add'>+	unsigned int cnt, inpr, cec;</div><div class='ctx'> 	ktime_t duration;</div><div class='ctx'> 	ktime_t now;</div><div class='ctx'> </div><div class='hunk'>@@ -468,14 +500,23 @@ static void wakeup_source_deactivate(struct wakeup_source *ws)</div><div class='ctx'> 	if (ktime_to_ns(duration) &gt; ktime_to_ns(ws-&gt;max_time))</div><div class='ctx'> 		ws-&gt;max_time = duration;</div><div class='ctx'> </div><div class='add'>+	ws-&gt;last_time = now;</div><div class='ctx'> 	del_timer(&amp;ws-&gt;timer);</div><div class='ctx'> 	ws-&gt;timer_expires = 0;</div><div class='ctx'> </div><div class='add'>+	if (ws-&gt;autosleep_enabled)</div><div class='add'>+		update_prevent_sleep_time(ws, now);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Increment the counter of registered wakeup events and decrement the</div><div class='ctx'> 	 * couter of wakeup events in progress simultaneously.</div><div class='ctx'> 	 */</div><div class='del'>-	atomic_add(MAX_IN_PROGRESS, &amp;combined_event_count);</div><div class='add'>+	cec = atomic_add_return(MAX_IN_PROGRESS, &amp;combined_event_count);</div><div class='add'>+	trace_wakeup_source_deactivate(ws-&gt;name, cec);</div><div class='add'>+</div><div class='add'>+	split_counters(&amp;cnt, &amp;inpr);</div><div class='add'>+	if (!inpr &amp;&amp; waitqueue_active(&amp;wakeup_count_wait_queue))</div><div class='add'>+		wake_up(&amp;wakeup_count_wait_queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -536,8 +577,10 @@ static void pm_wakeup_timer_fn(unsigned long data)</div><div class='ctx'> 	spin_lock_irqsave(&amp;ws-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (ws-&gt;active &amp;&amp; ws-&gt;timer_expires</div><div class='del'>-	    &amp;&amp; time_after_eq(jiffies, ws-&gt;timer_expires))</div><div class='add'>+	    &amp;&amp; time_after_eq(jiffies, ws-&gt;timer_expires)) {</div><div class='ctx'> 		wakeup_source_deactivate(ws);</div><div class='add'>+		ws-&gt;expire_count++;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ws-&gt;lock, flags);</div><div class='ctx'> }</div><div class='hunk'>@@ -564,9 +607,7 @@ void __pm_wakeup_event(struct wakeup_source *ws, unsigned int msec)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ws-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	ws-&gt;event_count++;</div><div class='del'>-	if (!ws-&gt;active)</div><div class='del'>-		wakeup_source_activate(ws);</div><div class='add'>+	wakeup_source_report_event(ws);</div><div class='ctx'> </div><div class='ctx'> 	if (!msec) {</div><div class='ctx'> 		wakeup_source_deactivate(ws);</div><div class='hunk'>@@ -609,24 +650,6 @@ void pm_wakeup_event(struct device *dev, unsigned int msec)</div><div class='ctx'> EXPORT_SYMBOL_GPL(pm_wakeup_event);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * pm_wakeup_update_hit_counts - Update hit counts of all active wakeup sources.</div><div class='del'>- */</div><div class='del'>-static void pm_wakeup_update_hit_counts(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct wakeup_source *ws;</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	list_for_each_entry_rcu(ws, &amp;wakeup_sources, entry) {</div><div class='del'>-		spin_lock_irqsave(&amp;ws-&gt;lock, flags);</div><div class='del'>-		if (ws-&gt;active)</div><div class='del'>-			ws-&gt;hit_count++;</div><div class='del'>-		spin_unlock_irqrestore(&amp;ws-&gt;lock, flags);</div><div class='del'>-	}</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * pm_wakeup_pending - Check if power transition in progress should be aborted.</div><div class='ctx'>  *</div><div class='ctx'>  * Compare the current number of registered wakeup events with its preserved</div><div class='hunk'>@@ -648,32 +671,38 @@ bool pm_wakeup_pending(void)</div><div class='ctx'> 		events_check_enabled = !ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;events_lock, flags);</div><div class='del'>-	if (ret)</div><div class='del'>-		pm_wakeup_update_hit_counts();</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * pm_get_wakeup_count - Read the number of registered wakeup events.</div><div class='ctx'>  * @count: Address to store the value at.</div><div class='add'>+ * @block: Whether or not to block.</div><div class='ctx'>  *</div><div class='del'>- * Store the number of registered wakeup events at the address in @count.  Block</div><div class='del'>- * if the current number of wakeup events being processed is nonzero.</div><div class='add'>+ * Store the number of registered wakeup events at the address in @count.  If</div><div class='add'>+ * @block is set, block until the current number of wakeup events being</div><div class='add'>+ * processed is zero.</div><div class='ctx'>  *</div><div class='del'>- * Return 'false' if the wait for the number of wakeup events being processed to</div><div class='del'>- * drop down to zero has been interrupted by a signal (and the current number</div><div class='del'>- * of wakeup events being processed is still nonzero).  Otherwise return 'true'.</div><div class='add'>+ * Return 'false' if the current number of wakeup events being processed is</div><div class='add'>+ * nonzero.  Otherwise return 'true'.</div><div class='ctx'>  */</div><div class='del'>-bool pm_get_wakeup_count(unsigned int *count)</div><div class='add'>+bool pm_get_wakeup_count(unsigned int *count, bool block)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cnt, inpr;</div><div class='ctx'> </div><div class='del'>-	for (;;) {</div><div class='del'>-		split_counters(&amp;cnt, &amp;inpr);</div><div class='del'>-		if (inpr == 0 || signal_pending(current))</div><div class='del'>-			break;</div><div class='del'>-		pm_wakeup_update_hit_counts();</div><div class='del'>-		schedule_timeout_interruptible(msecs_to_jiffies(TIMEOUT));</div><div class='add'>+	if (block) {</div><div class='add'>+		DEFINE_WAIT(wait);</div><div class='add'>+</div><div class='add'>+		for (;;) {</div><div class='add'>+			prepare_to_wait(&amp;wakeup_count_wait_queue, &amp;wait,</div><div class='add'>+					TASK_INTERRUPTIBLE);</div><div class='add'>+			split_counters(&amp;cnt, &amp;inpr);</div><div class='add'>+			if (inpr == 0 || signal_pending(current))</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			schedule();</div><div class='add'>+		}</div><div class='add'>+		finish_wait(&amp;wakeup_count_wait_queue, &amp;wait);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	split_counters(&amp;cnt, &amp;inpr);</div><div class='hunk'>@@ -703,11 +732,37 @@ bool pm_save_wakeup_count(unsigned int count)</div><div class='ctx'> 		events_check_enabled = true;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irq(&amp;events_lock);</div><div class='del'>-	if (!events_check_enabled)</div><div class='del'>-		pm_wakeup_update_hit_counts();</div><div class='ctx'> 	return events_check_enabled;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM_AUTOSLEEP</div><div class='add'>+/**</div><div class='add'>+ * pm_wakep_autosleep_enabled - Modify autosleep_enabled for all wakeup sources.</div><div class='add'>+ * @enabled: Whether to set or to clear the autosleep_enabled flags.</div><div class='add'>+ */</div><div class='add'>+void pm_wakep_autosleep_enabled(bool set)</div><div class='add'>+{</div><div class='add'>+	struct wakeup_source *ws;</div><div class='add'>+	ktime_t now = ktime_get();</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	list_for_each_entry_rcu(ws, &amp;wakeup_sources, entry) {</div><div class='add'>+		spin_lock_irq(&amp;ws-&gt;lock);</div><div class='add'>+		if (ws-&gt;autosleep_enabled != set) {</div><div class='add'>+			ws-&gt;autosleep_enabled = set;</div><div class='add'>+			if (ws-&gt;active) {</div><div class='add'>+				if (set)</div><div class='add'>+					ws-&gt;start_prevent_time = now;</div><div class='add'>+				else</div><div class='add'>+					update_prevent_sleep_time(ws, now);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irq(&amp;ws-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_PM_AUTOSLEEP */</div><div class='add'>+</div><div class='ctx'> static struct dentry *wakeup_sources_stats_dentry;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -723,27 +778,37 @@ static int print_wakeup_source_stats(struct seq_file *m,</div><div class='ctx'> 	ktime_t max_time;</div><div class='ctx'> 	unsigned long active_count;</div><div class='ctx'> 	ktime_t active_time;</div><div class='add'>+	ktime_t prevent_sleep_time;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ws-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	total_time = ws-&gt;total_time;</div><div class='ctx'> 	max_time = ws-&gt;max_time;</div><div class='add'>+	prevent_sleep_time = ws-&gt;prevent_sleep_time;</div><div class='ctx'> 	active_count = ws-&gt;active_count;</div><div class='ctx'> 	if (ws-&gt;active) {</div><div class='del'>-		active_time = ktime_sub(ktime_get(), ws-&gt;last_time);</div><div class='add'>+		ktime_t now = ktime_get();</div><div class='add'>+</div><div class='add'>+		active_time = ktime_sub(now, ws-&gt;last_time);</div><div class='ctx'> 		total_time = ktime_add(total_time, active_time);</div><div class='ctx'> 		if (active_time.tv64 &gt; max_time.tv64)</div><div class='ctx'> 			max_time = active_time;</div><div class='add'>+</div><div class='add'>+		if (ws-&gt;autosleep_enabled)</div><div class='add'>+			prevent_sleep_time = ktime_add(prevent_sleep_time,</div><div class='add'>+				ktime_sub(now, ws-&gt;start_prevent_time));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		active_time = ktime_set(0, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = seq_printf(m, "%-12s\t%lu\t\t%lu\t\t%lu\t\t"</div><div class='del'>-			"%lld\t\t%lld\t\t%lld\t\t%lld\n",</div><div class='del'>-			ws-&gt;name, active_count, ws-&gt;event_count, ws-&gt;hit_count,</div><div class='add'>+	ret = seq_printf(m, "%-12s\t%lu\t\t%lu\t\t%lu\t\t%lu\t\t"</div><div class='add'>+			"%lld\t\t%lld\t\t%lld\t\t%lld\t\t%lld\n",</div><div class='add'>+			ws-&gt;name, active_count, ws-&gt;event_count,</div><div class='add'>+			ws-&gt;wakeup_count, ws-&gt;expire_count,</div><div class='ctx'> 			ktime_to_ms(active_time), ktime_to_ms(total_time),</div><div class='del'>-			ktime_to_ms(max_time), ktime_to_ms(ws-&gt;last_time));</div><div class='add'>+			ktime_to_ms(max_time), ktime_to_ms(ws-&gt;last_time),</div><div class='add'>+			ktime_to_ms(prevent_sleep_time));</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ws-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -758,8 +823,9 @@ static int wakeup_sources_stats_show(struct seq_file *m, void *unused)</div><div class='ctx'> {</div><div class='ctx'> 	struct wakeup_source *ws;</div><div class='ctx'> </div><div class='del'>-	seq_puts(m, "name\t\tactive_count\tevent_count\thit_count\t"</div><div class='del'>-		"active_since\ttotal_time\tmax_time\tlast_change\n");</div><div class='add'>+	seq_puts(m, "name\t\tactive_count\tevent_count\twakeup_count\t"</div><div class='add'>+		"expire_count\tactive_since\ttotal_time\tmax_time\t"</div><div class='add'>+		"last_change\tprevent_suspend_time\n");</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	list_for_each_entry_rcu(ws, &amp;wakeup_sources, entry)</div><div class='head'>diff --git a/drivers/base/regmap/Kconfig b/drivers/base/regmap/Kconfig<br/>index 0f6c7fb418e8..6be390bd8bd1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/regmap/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/regmap/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/regmap/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/Kconfig</a></div><div class='hunk'>@@ -6,6 +6,7 @@ config REGMAP</div><div class='ctx'> 	default y if (REGMAP_I2C || REGMAP_SPI)</div><div class='ctx'> 	select LZO_COMPRESS</div><div class='ctx'> 	select LZO_DECOMPRESS</div><div class='add'>+	select IRQ_DOMAIN if REGMAP_IRQ</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='ctx'> config REGMAP_I2C</div><div class='hunk'>@@ -14,5 +15,8 @@ config REGMAP_I2C</div><div class='ctx'> config REGMAP_SPI</div><div class='ctx'> 	tristate</div><div class='ctx'> </div><div class='add'>+config REGMAP_MMIO</div><div class='add'>+	tristate</div><div class='add'>+</div><div class='ctx'> config REGMAP_IRQ</div><div class='ctx'> 	bool</div><div class='head'>diff --git a/drivers/base/regmap/Makefile b/drivers/base/regmap/Makefile<br/>index defd57963c84..5e75d1b683e2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/regmap/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/regmap/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/regmap/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/Makefile</a></div><div class='hunk'>@@ -3,4 +3,5 @@ obj-$(CONFIG_REGMAP) += regcache-rbtree.o regcache-lzo.o</div><div class='ctx'> obj-$(CONFIG_DEBUG_FS) += regmap-debugfs.o</div><div class='ctx'> obj-$(CONFIG_REGMAP_I2C) += regmap-i2c.o</div><div class='ctx'> obj-$(CONFIG_REGMAP_SPI) += regmap-spi.o</div><div class='add'>+obj-$(CONFIG_REGMAP_MMIO) += regmap-mmio.o</div><div class='ctx'> obj-$(CONFIG_REGMAP_IRQ) += regmap-irq.o</div><div class='head'>diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h<br/>index fcafc5b2e651..b986b8660b0c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/regmap/internal.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/regmap/internal.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/regmap/internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/internal.h</a></div><div class='hunk'>@@ -26,21 +26,30 @@ struct regmap_format {</div><div class='ctx'> 	size_t val_bytes;</div><div class='ctx'> 	void (*format_write)(struct regmap *map,</div><div class='ctx'> 			     unsigned int reg, unsigned int val);</div><div class='del'>-	void (*format_reg)(void *buf, unsigned int reg);</div><div class='del'>-	void (*format_val)(void *buf, unsigned int val);</div><div class='add'>+	void (*format_reg)(void *buf, unsigned int reg, unsigned int shift);</div><div class='add'>+	void (*format_val)(void *buf, unsigned int val, unsigned int shift);</div><div class='ctx'> 	unsigned int (*parse_val)(void *buf);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+typedef void (*regmap_lock)(struct regmap *map);</div><div class='add'>+typedef void (*regmap_unlock)(struct regmap *map);</div><div class='add'>+</div><div class='ctx'> struct regmap {</div><div class='del'>-	struct mutex lock;</div><div class='add'>+	struct mutex mutex;</div><div class='add'>+	spinlock_t spinlock;</div><div class='add'>+	regmap_lock lock;</div><div class='add'>+	regmap_unlock unlock;</div><div class='ctx'> </div><div class='ctx'> 	struct device *dev; /* Device we do I/O on */</div><div class='ctx'> 	void *work_buf;     /* Scratch buffer used to format I/O */</div><div class='ctx'> 	struct regmap_format format;  /* Buffer format */</div><div class='ctx'> 	const struct regmap_bus *bus;</div><div class='add'>+	void *bus_context;</div><div class='add'>+	const char *name;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> 	struct dentry *debugfs;</div><div class='add'>+	const char *debugfs_name;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	unsigned int max_register;</div><div class='hunk'>@@ -52,6 +61,10 @@ struct regmap {</div><div class='ctx'> 	u8 read_flag_mask;</div><div class='ctx'> 	u8 write_flag_mask;</div><div class='ctx'> </div><div class='add'>+	/* number of bits to (left) shift the reg value when formatting*/</div><div class='add'>+	int reg_shift;</div><div class='add'>+	int reg_stride;</div><div class='add'>+</div><div class='ctx'> 	/* regcache specific members */</div><div class='ctx'> 	const struct regcache_ops *cache_ops;</div><div class='ctx'> 	enum regcache_type cache_type;</div><div class='hunk'>@@ -79,6 +92,9 @@ struct regmap {</div><div class='ctx'> </div><div class='ctx'> 	struct reg_default *patch;</div><div class='ctx'> 	int patch_regs;</div><div class='add'>+</div><div class='add'>+	/* if set, converts bulk rw to single rw */</div><div class='add'>+	bool use_single_rw;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct regcache_ops {</div><div class='hunk'>@@ -101,11 +117,11 @@ int _regmap_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> extern void regmap_debugfs_initcall(void);</div><div class='del'>-extern void regmap_debugfs_init(struct regmap *map);</div><div class='add'>+extern void regmap_debugfs_init(struct regmap *map, const char *name);</div><div class='ctx'> extern void regmap_debugfs_exit(struct regmap *map);</div><div class='ctx'> #else</div><div class='ctx'> static inline void regmap_debugfs_initcall(void) { }</div><div class='del'>-static inline void regmap_debugfs_init(struct regmap *map) { }</div><div class='add'>+static inline void regmap_debugfs_init(struct regmap *map, const char *name) { }</div><div class='ctx'> static inline void regmap_debugfs_exit(struct regmap *map) { }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/regmap/regcache-lzo.c b/drivers/base/regmap/regcache-lzo.c<br/>index 483b06d4a380..afd6aa91a0df 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/regmap/regcache-lzo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/regmap/regcache-lzo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/regmap/regcache-lzo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regcache-lzo.c</a></div><div class='hunk'>@@ -108,7 +108,7 @@ static int regcache_lzo_decompress_cache_block(struct regmap *map,</div><div class='ctx'> static inline int regcache_lzo_get_blkindex(struct regmap *map,</div><div class='ctx'> 					    unsigned int reg)</div><div class='ctx'> {</div><div class='del'>-	return (reg * map-&gt;cache_word_size) /</div><div class='add'>+	return ((reg / map-&gt;reg_stride) * map-&gt;cache_word_size) /</div><div class='ctx'> 		DIV_ROUND_UP(map-&gt;cache_size_raw,</div><div class='ctx'> 			     regcache_lzo_block_count(map));</div><div class='ctx'> }</div><div class='hunk'>@@ -116,9 +116,10 @@ static inline int regcache_lzo_get_blkindex(struct regmap *map,</div><div class='ctx'> static inline int regcache_lzo_get_blkpos(struct regmap *map,</div><div class='ctx'> 					  unsigned int reg)</div><div class='ctx'> {</div><div class='del'>-	return reg % (DIV_ROUND_UP(map-&gt;cache_size_raw,</div><div class='del'>-				   regcache_lzo_block_count(map)) /</div><div class='del'>-		      map-&gt;cache_word_size);</div><div class='add'>+	return (reg / map-&gt;reg_stride) %</div><div class='add'>+		    (DIV_ROUND_UP(map-&gt;cache_size_raw,</div><div class='add'>+				  regcache_lzo_block_count(map)) /</div><div class='add'>+		     map-&gt;cache_word_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int regcache_lzo_get_blksize(struct regmap *map)</div><div class='hunk'>@@ -322,7 +323,7 @@ static int regcache_lzo_write(struct regmap *map,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* set the bit so we know we have to sync this register */</div><div class='del'>-	set_bit(reg, lzo_block-&gt;sync_bmp);</div><div class='add'>+	set_bit(reg / map-&gt;reg_stride, lzo_block-&gt;sync_bmp);</div><div class='ctx'> 	kfree(tmp_dst);</div><div class='ctx'> 	kfree(lzo_block-&gt;src);</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/base/regmap/regcache-rbtree.c b/drivers/base/regmap/regcache-rbtree.c<br/>index 92b779ee002b..e6732cf7c06e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/regmap/regcache-rbtree.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/regmap/regcache-rbtree.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/regmap/regcache-rbtree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regcache-rbtree.c</a></div><div class='hunk'>@@ -39,11 +39,12 @@ struct regcache_rbtree_ctx {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline void regcache_rbtree_get_base_top_reg(</div><div class='add'>+	struct regmap *map,</div><div class='ctx'> 	struct regcache_rbtree_node *rbnode,</div><div class='ctx'> 	unsigned int *base, unsigned int *top)</div><div class='ctx'> {</div><div class='ctx'> 	*base = rbnode-&gt;base_reg;</div><div class='del'>-	*top = rbnode-&gt;base_reg + rbnode-&gt;blklen - 1;</div><div class='add'>+	*top = rbnode-&gt;base_reg + ((rbnode-&gt;blklen - 1) * map-&gt;reg_stride);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int regcache_rbtree_get_register(</div><div class='hunk'>@@ -70,7 +71,8 @@ static struct regcache_rbtree_node *regcache_rbtree_lookup(struct regmap *map,</div><div class='ctx'> </div><div class='ctx'> 	rbnode = rbtree_ctx-&gt;cached_rbnode;</div><div class='ctx'> 	if (rbnode) {</div><div class='del'>-		regcache_rbtree_get_base_top_reg(rbnode, &amp;base_reg, &amp;top_reg);</div><div class='add'>+		regcache_rbtree_get_base_top_reg(map, rbnode, &amp;base_reg,</div><div class='add'>+						 &amp;top_reg);</div><div class='ctx'> 		if (reg &gt;= base_reg &amp;&amp; reg &lt;= top_reg)</div><div class='ctx'> 			return rbnode;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -78,7 +80,8 @@ static struct regcache_rbtree_node *regcache_rbtree_lookup(struct regmap *map,</div><div class='ctx'> 	node = rbtree_ctx-&gt;root.rb_node;</div><div class='ctx'> 	while (node) {</div><div class='ctx'> 		rbnode = container_of(node, struct regcache_rbtree_node, node);</div><div class='del'>-		regcache_rbtree_get_base_top_reg(rbnode, &amp;base_reg, &amp;top_reg);</div><div class='add'>+		regcache_rbtree_get_base_top_reg(map, rbnode, &amp;base_reg,</div><div class='add'>+						 &amp;top_reg);</div><div class='ctx'> 		if (reg &gt;= base_reg &amp;&amp; reg &lt;= top_reg) {</div><div class='ctx'> 			rbtree_ctx-&gt;cached_rbnode = rbnode;</div><div class='ctx'> 			return rbnode;</div><div class='hunk'>@@ -92,7 +95,7 @@ static struct regcache_rbtree_node *regcache_rbtree_lookup(struct regmap *map,</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int regcache_rbtree_insert(struct rb_root *root,</div><div class='add'>+static int regcache_rbtree_insert(struct regmap *map, struct rb_root *root,</div><div class='ctx'> 				  struct regcache_rbtree_node *rbnode)</div><div class='ctx'> {</div><div class='ctx'> 	struct rb_node **new, *parent;</div><div class='hunk'>@@ -106,7 +109,7 @@ static int regcache_rbtree_insert(struct rb_root *root,</div><div class='ctx'> 		rbnode_tmp = container_of(*new, struct regcache_rbtree_node,</div><div class='ctx'> 					  node);</div><div class='ctx'> 		/* base and top registers of the current rbnode */</div><div class='del'>-		regcache_rbtree_get_base_top_reg(rbnode_tmp, &amp;base_reg_tmp,</div><div class='add'>+		regcache_rbtree_get_base_top_reg(map, rbnode_tmp, &amp;base_reg_tmp,</div><div class='ctx'> 						 &amp;top_reg_tmp);</div><div class='ctx'> 		/* base register of the rbnode to be added */</div><div class='ctx'> 		base_reg = rbnode-&gt;base_reg;</div><div class='hunk'>@@ -138,19 +141,20 @@ static int rbtree_show(struct seq_file *s, void *ignored)</div><div class='ctx'> 	unsigned int base, top;</div><div class='ctx'> 	int nodes = 0;</div><div class='ctx'> 	int registers = 0;</div><div class='del'>-	int average;</div><div class='add'>+	int this_registers, average;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> </div><div class='ctx'> 	for (node = rb_first(&amp;rbtree_ctx-&gt;root); node != NULL;</div><div class='ctx'> 	     node = rb_next(node)) {</div><div class='ctx'> 		n = container_of(node, struct regcache_rbtree_node, node);</div><div class='ctx'> </div><div class='del'>-		regcache_rbtree_get_base_top_reg(n, &amp;base, &amp;top);</div><div class='del'>-		seq_printf(s, "%x-%x (%d)\n", base, top, top - base + 1);</div><div class='add'>+		regcache_rbtree_get_base_top_reg(map, n, &amp;base, &amp;top);</div><div class='add'>+		this_registers = ((top - base) / map-&gt;reg_stride) + 1;</div><div class='add'>+		seq_printf(s, "%x-%x (%d)\n", base, top, this_registers);</div><div class='ctx'> </div><div class='ctx'> 		nodes++;</div><div class='del'>-		registers += top - base + 1;</div><div class='add'>+		registers += this_registers;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (nodes)</div><div class='hunk'>@@ -161,7 +165,7 @@ static int rbtree_show(struct seq_file *s, void *ignored)</div><div class='ctx'> 	seq_printf(s, "%d nodes, %d registers, average %d registers\n",</div><div class='ctx'> 		   nodes, registers, average);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -255,7 +259,7 @@ static int regcache_rbtree_read(struct regmap *map,</div><div class='ctx'> </div><div class='ctx'> 	rbnode = regcache_rbtree_lookup(map, reg);</div><div class='ctx'> 	if (rbnode) {</div><div class='del'>-		reg_tmp = reg - rbnode-&gt;base_reg;</div><div class='add'>+		reg_tmp = (reg - rbnode-&gt;base_reg) / map-&gt;reg_stride;</div><div class='ctx'> 		*value = regcache_rbtree_get_register(rbnode, reg_tmp,</div><div class='ctx'> 						      map-&gt;cache_word_size);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -310,7 +314,7 @@ static int regcache_rbtree_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> 	 */</div><div class='ctx'> 	rbnode = regcache_rbtree_lookup(map, reg);</div><div class='ctx'> 	if (rbnode) {</div><div class='del'>-		reg_tmp = reg - rbnode-&gt;base_reg;</div><div class='add'>+		reg_tmp = (reg - rbnode-&gt;base_reg) / map-&gt;reg_stride;</div><div class='ctx'> 		val = regcache_rbtree_get_register(rbnode, reg_tmp,</div><div class='ctx'> 						   map-&gt;cache_word_size);</div><div class='ctx'> 		if (val == value)</div><div class='hunk'>@@ -321,13 +325,15 @@ static int regcache_rbtree_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> 		/* look for an adjacent register to the one we are about to add */</div><div class='ctx'> 		for (node = rb_first(&amp;rbtree_ctx-&gt;root); node;</div><div class='ctx'> 		     node = rb_next(node)) {</div><div class='del'>-			rbnode_tmp = rb_entry(node, struct regcache_rbtree_node, node);</div><div class='add'>+			rbnode_tmp = rb_entry(node, struct regcache_rbtree_node,</div><div class='add'>+					      node);</div><div class='ctx'> 			for (i = 0; i &lt; rbnode_tmp-&gt;blklen; i++) {</div><div class='del'>-				reg_tmp = rbnode_tmp-&gt;base_reg + i;</div><div class='del'>-				if (abs(reg_tmp - reg) != 1)</div><div class='add'>+				reg_tmp = rbnode_tmp-&gt;base_reg +</div><div class='add'>+						(i * map-&gt;reg_stride);</div><div class='add'>+				if (abs(reg_tmp - reg) != map-&gt;reg_stride)</div><div class='ctx'> 					continue;</div><div class='ctx'> 				/* decide where in the block to place our register */</div><div class='del'>-				if (reg_tmp + 1 == reg)</div><div class='add'>+				if (reg_tmp + map-&gt;reg_stride == reg)</div><div class='ctx'> 					pos = i + 1;</div><div class='ctx'> 				else</div><div class='ctx'> 					pos = i;</div><div class='hunk'>@@ -357,7 +363,7 @@ static int regcache_rbtree_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='ctx'> 		regcache_rbtree_set_register(rbnode, 0, value, map-&gt;cache_word_size);</div><div class='del'>-		regcache_rbtree_insert(&amp;rbtree_ctx-&gt;root, rbnode);</div><div class='add'>+		regcache_rbtree_insert(map, &amp;rbtree_ctx-&gt;root, rbnode);</div><div class='ctx'> 		rbtree_ctx-&gt;cached_rbnode = rbnode;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -397,7 +403,7 @@ static int regcache_rbtree_sync(struct regmap *map, unsigned int min,</div><div class='ctx'> 			end = rbnode-&gt;blklen;</div><div class='ctx'> </div><div class='ctx'> 		for (i = base; i &lt; end; i++) {</div><div class='del'>-			regtmp = rbnode-&gt;base_reg + i;</div><div class='add'>+			regtmp = rbnode-&gt;base_reg + (i * map-&gt;reg_stride);</div><div class='ctx'> 			val = regcache_rbtree_get_register(rbnode, i,</div><div class='ctx'> 							   map-&gt;cache_word_size);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c<br/>index 74b69095def6..835883bda977 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/regmap/regcache.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/regmap/regcache.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/regmap/regcache.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regcache.c</a></div><div class='hunk'>@@ -59,7 +59,7 @@ static int regcache_hw_init(struct regmap *map)</div><div class='ctx'> 	for (count = 0, i = 0; i &lt; map-&gt;num_reg_defaults_raw; i++) {</div><div class='ctx'> 		val = regcache_get_val(map-&gt;reg_defaults_raw,</div><div class='ctx'> 				       i, map-&gt;cache_word_size);</div><div class='del'>-		if (regmap_volatile(map, i))</div><div class='add'>+		if (regmap_volatile(map, i * map-&gt;reg_stride))</div><div class='ctx'> 			continue;</div><div class='ctx'> 		count++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -76,9 +76,9 @@ static int regcache_hw_init(struct regmap *map)</div><div class='ctx'> 	for (i = 0, j = 0; i &lt; map-&gt;num_reg_defaults_raw; i++) {</div><div class='ctx'> 		val = regcache_get_val(map-&gt;reg_defaults_raw,</div><div class='ctx'> 				       i, map-&gt;cache_word_size);</div><div class='del'>-		if (regmap_volatile(map, i))</div><div class='add'>+		if (regmap_volatile(map, i * map-&gt;reg_stride))</div><div class='ctx'> 			continue;</div><div class='del'>-		map-&gt;reg_defaults[j].reg = i;</div><div class='add'>+		map-&gt;reg_defaults[j].reg = i * map-&gt;reg_stride;</div><div class='ctx'> 		map-&gt;reg_defaults[j].def = val;</div><div class='ctx'> 		j++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -98,6 +98,10 @@ int regcache_init(struct regmap *map, const struct regmap_config *config)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	void *tmp_buf;</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; config-&gt;num_reg_defaults; i++)</div><div class='add'>+		if (config-&gt;reg_defaults[i].reg % map-&gt;reg_stride)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	if (map-&gt;cache_type == REGCACHE_NONE) {</div><div class='ctx'> 		map-&gt;cache_bypass = true;</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -264,7 +268,7 @@ int regcache_sync(struct regmap *map)</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!map-&gt;cache_ops || !map-&gt;cache_ops-&gt;sync);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> 	/* Remember the initial bypass state */</div><div class='ctx'> 	bypass = map-&gt;cache_bypass;</div><div class='ctx'> 	dev_dbg(map-&gt;dev, "Syncing %s cache\n",</div><div class='hunk'>@@ -278,6 +282,10 @@ int regcache_sync(struct regmap *map)</div><div class='ctx'> 	/* Apply any patch first */</div><div class='ctx'> 	map-&gt;cache_bypass = 1;</div><div class='ctx'> 	for (i = 0; i &lt; map-&gt;patch_regs; i++) {</div><div class='add'>+		if (map-&gt;patch[i].reg % map-&gt;reg_stride) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='ctx'> 		ret = _regmap_write(map, map-&gt;patch[i].reg, map-&gt;patch[i].def);</div><div class='ctx'> 		if (ret != 0) {</div><div class='ctx'> 			dev_err(map-&gt;dev, "Failed to write %x = %x: %d\n",</div><div class='hunk'>@@ -296,7 +304,7 @@ out:</div><div class='ctx'> 	trace_regcache_sync(map-&gt;dev, name, "stop");</div><div class='ctx'> 	/* Restore the bypass state */</div><div class='ctx'> 	map-&gt;cache_bypass = bypass;</div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -323,7 +331,7 @@ int regcache_sync_region(struct regmap *map, unsigned int min,</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!map-&gt;cache_ops || !map-&gt;cache_ops-&gt;sync);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> </div><div class='ctx'> 	/* Remember the initial bypass state */</div><div class='ctx'> 	bypass = map-&gt;cache_bypass;</div><div class='hunk'>@@ -342,7 +350,7 @@ out:</div><div class='ctx'> 	trace_regcache_sync(map-&gt;dev, name, "stop region");</div><div class='ctx'> 	/* Restore the bypass state */</div><div class='ctx'> 	map-&gt;cache_bypass = bypass;</div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -362,11 +370,11 @@ EXPORT_SYMBOL_GPL(regcache_sync_region);</div><div class='ctx'>  */</div><div class='ctx'> void regcache_cache_only(struct regmap *map, bool enable)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> 	WARN_ON(map-&gt;cache_bypass &amp;&amp; enable);</div><div class='ctx'> 	map-&gt;cache_only = enable;</div><div class='ctx'> 	trace_regmap_cache_only(map-&gt;dev, enable);</div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(regcache_cache_only);</div><div class='ctx'> </div><div class='hunk'>@@ -381,9 +389,9 @@ EXPORT_SYMBOL_GPL(regcache_cache_only);</div><div class='ctx'>  */</div><div class='ctx'> void regcache_mark_dirty(struct regmap *map)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> 	map-&gt;cache_dirty = true;</div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(regcache_mark_dirty);</div><div class='ctx'> </div><div class='hunk'>@@ -400,11 +408,11 @@ EXPORT_SYMBOL_GPL(regcache_mark_dirty);</div><div class='ctx'>  */</div><div class='ctx'> void regcache_cache_bypass(struct regmap *map, bool enable)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> 	WARN_ON(map-&gt;cache_only &amp;&amp; enable);</div><div class='ctx'> 	map-&gt;cache_bypass = enable;</div><div class='ctx'> 	trace_regmap_cache_bypass(map-&gt;dev, enable);</div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(regcache_cache_bypass);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/regmap/regmap-debugfs.c b/drivers/base/regmap/regmap-debugfs.c<br/>index 251eb70f83e7..bb1ff175b962 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/regmap/regmap-debugfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/regmap/regmap-debugfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/regmap/regmap-debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regmap-debugfs.c</a></div><div class='hunk'>@@ -80,7 +80,7 @@ static ssize_t regmap_map_read_file(struct file *file, char __user *user_buf,</div><div class='ctx'> 	val_len = 2 * map-&gt;format.val_bytes;</div><div class='ctx'> 	tot_len = reg_len + val_len + 3;      /* : \n */</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; map-&gt;max_register + 1; i++) {</div><div class='add'>+	for (i = 0; i &lt;= map-&gt;max_register; i += map-&gt;reg_stride) {</div><div class='ctx'> 		if (!regmap_readable(map, i))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -197,7 +197,7 @@ static ssize_t regmap_access_read_file(struct file *file,</div><div class='ctx'> 	reg_len = regmap_calc_reg_len(map-&gt;max_register, buf, count);</div><div class='ctx'> 	tot_len = reg_len + 10; /* ': R W V P\n' */</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; map-&gt;max_register + 1; i++) {</div><div class='add'>+	for (i = 0; i &lt;= map-&gt;max_register; i += map-&gt;reg_stride) {</div><div class='ctx'> 		/* Ignore registers which are neither readable nor writable */</div><div class='ctx'> 		if (!regmap_readable(map, i) &amp;&amp; !regmap_writeable(map, i))</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -242,10 +242,17 @@ static const struct file_operations regmap_access_fops = {</div><div class='ctx'> 	.llseek = default_llseek,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void regmap_debugfs_init(struct regmap *map)</div><div class='add'>+void regmap_debugfs_init(struct regmap *map, const char *name)</div><div class='ctx'> {</div><div class='del'>-	map-&gt;debugfs = debugfs_create_dir(dev_name(map-&gt;dev),</div><div class='del'>-					  regmap_debugfs_root);</div><div class='add'>+	if (name) {</div><div class='add'>+		map-&gt;debugfs_name = kasprintf(GFP_KERNEL, "%s-%s",</div><div class='add'>+					      dev_name(map-&gt;dev), name);</div><div class='add'>+		name = map-&gt;debugfs_name;</div><div class='add'>+	} else {</div><div class='add'>+		name = dev_name(map-&gt;dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	map-&gt;debugfs = debugfs_create_dir(name, regmap_debugfs_root);</div><div class='ctx'> 	if (!map-&gt;debugfs) {</div><div class='ctx'> 		dev_warn(map-&gt;dev, "Failed to create debugfs directory\n");</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -274,6 +281,7 @@ void regmap_debugfs_init(struct regmap *map)</div><div class='ctx'> void regmap_debugfs_exit(struct regmap *map)</div><div class='ctx'> {</div><div class='ctx'> 	debugfs_remove_recursive(map-&gt;debugfs);</div><div class='add'>+	kfree(map-&gt;debugfs_name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void regmap_debugfs_initcall(void)</div><div class='head'>diff --git a/drivers/base/regmap/regmap-i2c.c b/drivers/base/regmap/regmap-i2c.c<br/>index 9a3a8c564389..fa6bf5279d28 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/regmap/regmap-i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/regmap/regmap-i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/regmap/regmap-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regmap-i2c.c</a></div><div class='hunk'>@@ -15,8 +15,9 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> </div><div class='del'>-static int regmap_i2c_write(struct device *dev, const void *data, size_t count)</div><div class='add'>+static int regmap_i2c_write(void *context, const void *data, size_t count)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = context;</div><div class='ctx'> 	struct i2c_client *i2c = to_i2c_client(dev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -29,10 +30,11 @@ static int regmap_i2c_write(struct device *dev, const void *data, size_t count)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int regmap_i2c_gather_write(struct device *dev,</div><div class='add'>+static int regmap_i2c_gather_write(void *context,</div><div class='ctx'> 				   const void *reg, size_t reg_size,</div><div class='ctx'> 				   const void *val, size_t val_size)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = context;</div><div class='ctx'> 	struct i2c_client *i2c = to_i2c_client(dev);</div><div class='ctx'> 	struct i2c_msg xfer[2];</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -40,7 +42,7 @@ static int regmap_i2c_gather_write(struct device *dev,</div><div class='ctx'> 	/* If the I2C controller can't do a gather tell the core, it</div><div class='ctx'> 	 * will substitute in a linear write for us.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!i2c_check_functionality(i2c-&gt;adapter, I2C_FUNC_PROTOCOL_MANGLING))</div><div class='add'>+	if (!i2c_check_functionality(i2c-&gt;adapter, I2C_FUNC_NOSTART))</div><div class='ctx'> 		return -ENOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	xfer[0].addr = i2c-&gt;addr;</div><div class='hunk'>@@ -62,10 +64,11 @@ static int regmap_i2c_gather_write(struct device *dev,</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int regmap_i2c_read(struct device *dev,</div><div class='add'>+static int regmap_i2c_read(void *context,</div><div class='ctx'> 			   const void *reg, size_t reg_size,</div><div class='ctx'> 			   void *val, size_t val_size)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = context;</div><div class='ctx'> 	struct i2c_client *i2c = to_i2c_client(dev);</div><div class='ctx'> 	struct i2c_msg xfer[2];</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -107,7 +110,7 @@ static struct regmap_bus regmap_i2c = {</div><div class='ctx'> struct regmap *regmap_init_i2c(struct i2c_client *i2c,</div><div class='ctx'> 			       const struct regmap_config *config)</div><div class='ctx'> {</div><div class='del'>-	return regmap_init(&amp;i2c-&gt;dev, &amp;regmap_i2c, config);</div><div class='add'>+	return regmap_init(&amp;i2c-&gt;dev, &amp;regmap_i2c, &amp;i2c-&gt;dev, config);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(regmap_init_i2c);</div><div class='ctx'> </div><div class='hunk'>@@ -124,7 +127,7 @@ EXPORT_SYMBOL_GPL(regmap_init_i2c);</div><div class='ctx'> struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c,</div><div class='ctx'> 				    const struct regmap_config *config)</div><div class='ctx'> {</div><div class='del'>-	return devm_regmap_init(&amp;i2c-&gt;dev, &amp;regmap_i2c, config);</div><div class='add'>+	return devm_regmap_init(&amp;i2c-&gt;dev, &amp;regmap_i2c, &amp;i2c-&gt;dev, config);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(devm_regmap_init_i2c);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c<br/>index 1befaa7a31cb..4fac4b9be88f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/regmap/regmap-irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/regmap/regmap-irq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/regmap/regmap-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regmap-irq.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "internal.h"</div><div class='hunk'>@@ -26,18 +27,20 @@ struct regmap_irq_chip_data {</div><div class='ctx'> 	struct regmap_irq_chip *chip;</div><div class='ctx'> </div><div class='ctx'> 	int irq_base;</div><div class='add'>+	struct irq_domain *domain;</div><div class='ctx'> </div><div class='del'>-	void *status_reg_buf;</div><div class='ctx'> 	unsigned int *status_buf;</div><div class='ctx'> 	unsigned int *mask_buf;</div><div class='ctx'> 	unsigned int *mask_buf_def;</div><div class='add'>+</div><div class='add'>+	unsigned int irq_reg_stride;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline const</div><div class='ctx'> struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data,</div><div class='ctx'> 				     int irq)</div><div class='ctx'> {</div><div class='del'>-	return &amp;data-&gt;chip-&gt;irqs[irq - data-&gt;irq_base];</div><div class='add'>+	return &amp;data-&gt;chip-&gt;irqs[irq];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void regmap_irq_lock(struct irq_data *data)</div><div class='hunk'>@@ -50,6 +53,7 @@ static void regmap_irq_lock(struct irq_data *data)</div><div class='ctx'> static void regmap_irq_sync_unlock(struct irq_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);</div><div class='add'>+	struct regmap *map = d-&gt;map;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -58,11 +62,13 @@ static void regmap_irq_sync_unlock(struct irq_data *data)</div><div class='ctx'> 	 * suppress pointless writes.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; d-&gt;chip-&gt;num_regs; i++) {</div><div class='del'>-		ret = regmap_update_bits(d-&gt;map, d-&gt;chip-&gt;mask_base + i,</div><div class='add'>+		ret = regmap_update_bits(d-&gt;map, d-&gt;chip-&gt;mask_base +</div><div class='add'>+						(i * map-&gt;reg_stride *</div><div class='add'>+						d-&gt;irq_reg_stride),</div><div class='ctx'> 					 d-&gt;mask_buf_def[i], d-&gt;mask_buf[i]);</div><div class='ctx'> 		if (ret != 0)</div><div class='ctx'> 			dev_err(d-&gt;map-&gt;dev, "Failed to sync masks in %x\n",</div><div class='del'>-				d-&gt;chip-&gt;mask_base + i);</div><div class='add'>+				d-&gt;chip-&gt;mask_base + (i * map-&gt;reg_stride));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;d-&gt;lock);</div><div class='hunk'>@@ -71,17 +77,19 @@ static void regmap_irq_sync_unlock(struct irq_data *data)</div><div class='ctx'> static void regmap_irq_enable(struct irq_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);</div><div class='del'>-	const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data-&gt;irq);</div><div class='add'>+	struct regmap *map = d-&gt;map;</div><div class='add'>+	const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data-&gt;hwirq);</div><div class='ctx'> </div><div class='del'>-	d-&gt;mask_buf[irq_data-&gt;reg_offset] &amp;= ~irq_data-&gt;mask;</div><div class='add'>+	d-&gt;mask_buf[irq_data-&gt;reg_offset / map-&gt;reg_stride] &amp;= ~irq_data-&gt;mask;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void regmap_irq_disable(struct irq_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);</div><div class='del'>-	const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data-&gt;irq);</div><div class='add'>+	struct regmap *map = d-&gt;map;</div><div class='add'>+	const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data-&gt;hwirq);</div><div class='ctx'> </div><div class='del'>-	d-&gt;mask_buf[irq_data-&gt;reg_offset] |= irq_data-&gt;mask;</div><div class='add'>+	d-&gt;mask_buf[irq_data-&gt;reg_offset / map-&gt;reg_stride] |= irq_data-&gt;mask;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct irq_chip regmap_irq_chip = {</div><div class='hunk'>@@ -98,18 +106,8 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)</div><div class='ctx'> 	struct regmap_irq_chip *chip = data-&gt;chip;</div><div class='ctx'> 	struct regmap *map = data-&gt;map;</div><div class='ctx'> 	int ret, i;</div><div class='del'>-	u8 *buf8 = data-&gt;status_reg_buf;</div><div class='del'>-	u16 *buf16 = data-&gt;status_reg_buf;</div><div class='del'>-	u32 *buf32 = data-&gt;status_reg_buf;</div><div class='ctx'> 	bool handled = false;</div><div class='ctx'> </div><div class='del'>-	ret = regmap_bulk_read(map, chip-&gt;status_base, data-&gt;status_reg_buf,</div><div class='del'>-			       chip-&gt;num_regs);</div><div class='del'>-	if (ret != 0) {</div><div class='del'>-		dev_err(map-&gt;dev, "Failed to read IRQ status: %d\n", ret);</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ignore masked IRQs and ack if we need to; we ack early so</div><div class='ctx'> 	 * there is no race between handling and acknowleding the</div><div class='hunk'>@@ -118,36 +116,34 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)</div><div class='ctx'> 	 * doing a write per register.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; data-&gt;chip-&gt;num_regs; i++) {</div><div class='del'>-		switch (map-&gt;format.val_bytes) {</div><div class='del'>-		case 1:</div><div class='del'>-			data-&gt;status_buf[i] = buf8[i];</div><div class='del'>-			break;</div><div class='del'>-		case 2:</div><div class='del'>-			data-&gt;status_buf[i] = buf16[i];</div><div class='del'>-			break;</div><div class='del'>-		case 4:</div><div class='del'>-			data-&gt;status_buf[i] = buf32[i];</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			BUG();</div><div class='add'>+		ret = regmap_read(map, chip-&gt;status_base + (i * map-&gt;reg_stride</div><div class='add'>+				   * data-&gt;irq_reg_stride),</div><div class='add'>+				   &amp;data-&gt;status_buf[i]);</div><div class='add'>+</div><div class='add'>+		if (ret != 0) {</div><div class='add'>+			dev_err(map-&gt;dev, "Failed to read IRQ status: %d\n",</div><div class='add'>+					ret);</div><div class='ctx'> 			return IRQ_NONE;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		data-&gt;status_buf[i] &amp;= ~data-&gt;mask_buf[i];</div><div class='ctx'> </div><div class='ctx'> 		if (data-&gt;status_buf[i] &amp;&amp; chip-&gt;ack_base) {</div><div class='del'>-			ret = regmap_write(map, chip-&gt;ack_base + i,</div><div class='add'>+			ret = regmap_write(map, chip-&gt;ack_base +</div><div class='add'>+						(i * map-&gt;reg_stride *</div><div class='add'>+						data-&gt;irq_reg_stride),</div><div class='ctx'> 					   data-&gt;status_buf[i]);</div><div class='ctx'> 			if (ret != 0)</div><div class='ctx'> 				dev_err(map-&gt;dev, "Failed to ack 0x%x: %d\n",</div><div class='del'>-					chip-&gt;ack_base + i, ret);</div><div class='add'>+					chip-&gt;ack_base + (i * map-&gt;reg_stride),</div><div class='add'>+					ret);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; chip-&gt;num_irqs; i++) {</div><div class='del'>-		if (data-&gt;status_buf[chip-&gt;irqs[i].reg_offset] &amp;</div><div class='del'>-		    chip-&gt;irqs[i].mask) {</div><div class='del'>-			handle_nested_irq(data-&gt;irq_base + i);</div><div class='add'>+		if (data-&gt;status_buf[chip-&gt;irqs[i].reg_offset /</div><div class='add'>+				     map-&gt;reg_stride] &amp; chip-&gt;irqs[i].mask) {</div><div class='add'>+			handle_nested_irq(irq_find_mapping(data-&gt;domain, i));</div><div class='ctx'> 			handled = true;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -158,6 +154,31 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int regmap_irq_map(struct irq_domain *h, unsigned int virq,</div><div class='add'>+			  irq_hw_number_t hw)</div><div class='add'>+{</div><div class='add'>+	struct regmap_irq_chip_data *data = h-&gt;host_data;</div><div class='add'>+</div><div class='add'>+	irq_set_chip_data(virq, data);</div><div class='add'>+	irq_set_chip_and_handler(virq, &amp;regmap_irq_chip, handle_edge_irq);</div><div class='add'>+	irq_set_nested_thread(virq, 1);</div><div class='add'>+</div><div class='add'>+	/* ARM needs us to explicitly flag the IRQ as valid</div><div class='add'>+	 * and will set them noprobe when we do so. */</div><div class='add'>+#ifdef CONFIG_ARM</div><div class='add'>+	set_irq_flags(virq, IRQF_VALID);</div><div class='add'>+#else</div><div class='add'>+	irq_set_noprobe(virq);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_domain_ops regmap_domain_ops = {</div><div class='add'>+	.map	= regmap_irq_map,</div><div class='add'>+	.xlate	= irq_domain_xlate_twocell,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * regmap_add_irq_chip(): Use standard regmap IRQ controller handling</div><div class='ctx'>  *</div><div class='hunk'>@@ -178,30 +199,37 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,</div><div class='ctx'> 			struct regmap_irq_chip_data **data)</div><div class='ctx'> {</div><div class='ctx'> 	struct regmap_irq_chip_data *d;</div><div class='del'>-	int cur_irq, i;</div><div class='add'>+	int i;</div><div class='ctx'> 	int ret = -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	irq_base = irq_alloc_descs(irq_base, 0, chip-&gt;num_irqs, 0);</div><div class='del'>-	if (irq_base &lt; 0) {</div><div class='del'>-		dev_warn(map-&gt;dev, "Failed to allocate IRQs: %d\n",</div><div class='del'>-			 irq_base);</div><div class='del'>-		return irq_base;</div><div class='add'>+	for (i = 0; i &lt; chip-&gt;num_irqs; i++) {</div><div class='add'>+		if (chip-&gt;irqs[i].reg_offset % map-&gt;reg_stride)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		if (chip-&gt;irqs[i].reg_offset / map-&gt;reg_stride &gt;=</div><div class='add'>+		    chip-&gt;num_regs)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (irq_base) {</div><div class='add'>+		irq_base = irq_alloc_descs(irq_base, 0, chip-&gt;num_irqs, 0);</div><div class='add'>+		if (irq_base &lt; 0) {</div><div class='add'>+			dev_warn(map-&gt;dev, "Failed to allocate IRQs: %d\n",</div><div class='add'>+				 irq_base);</div><div class='add'>+			return irq_base;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	d = kzalloc(sizeof(*d), GFP_KERNEL);</div><div class='ctx'> 	if (!d)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	*data = d;</div><div class='add'>+</div><div class='ctx'> 	d-&gt;status_buf = kzalloc(sizeof(unsigned int) * chip-&gt;num_regs,</div><div class='ctx'> 				GFP_KERNEL);</div><div class='ctx'> 	if (!d-&gt;status_buf)</div><div class='ctx'> 		goto err_alloc;</div><div class='ctx'> </div><div class='del'>-	d-&gt;status_reg_buf = kzalloc(map-&gt;format.val_bytes * chip-&gt;num_regs,</div><div class='del'>-				    GFP_KERNEL);</div><div class='del'>-	if (!d-&gt;status_reg_buf)</div><div class='del'>-		goto err_alloc;</div><div class='del'>-</div><div class='ctx'> 	d-&gt;mask_buf = kzalloc(sizeof(unsigned int) * chip-&gt;num_regs,</div><div class='ctx'> 			      GFP_KERNEL);</div><div class='ctx'> 	if (!d-&gt;mask_buf)</div><div class='hunk'>@@ -215,54 +243,59 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,</div><div class='ctx'> 	d-&gt;map = map;</div><div class='ctx'> 	d-&gt;chip = chip;</div><div class='ctx'> 	d-&gt;irq_base = irq_base;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;irq_reg_stride)</div><div class='add'>+		d-&gt;irq_reg_stride = chip-&gt;irq_reg_stride;</div><div class='add'>+	else</div><div class='add'>+		d-&gt;irq_reg_stride = 1;</div><div class='add'>+</div><div class='ctx'> 	mutex_init(&amp;d-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; chip-&gt;num_irqs; i++)</div><div class='del'>-		d-&gt;mask_buf_def[chip-&gt;irqs[i].reg_offset]</div><div class='add'>+		d-&gt;mask_buf_def[chip-&gt;irqs[i].reg_offset / map-&gt;reg_stride]</div><div class='ctx'> 			|= chip-&gt;irqs[i].mask;</div><div class='ctx'> </div><div class='ctx'> 	/* Mask all the interrupts by default */</div><div class='ctx'> 	for (i = 0; i &lt; chip-&gt;num_regs; i++) {</div><div class='ctx'> 		d-&gt;mask_buf[i] = d-&gt;mask_buf_def[i];</div><div class='del'>-		ret = regmap_write(map, chip-&gt;mask_base + i, d-&gt;mask_buf[i]);</div><div class='add'>+		ret = regmap_write(map, chip-&gt;mask_base + (i * map-&gt;reg_stride</div><div class='add'>+				   * d-&gt;irq_reg_stride),</div><div class='add'>+				   d-&gt;mask_buf[i]);</div><div class='ctx'> 		if (ret != 0) {</div><div class='ctx'> 			dev_err(map-&gt;dev, "Failed to set masks in 0x%x: %d\n",</div><div class='del'>-				chip-&gt;mask_base + i, ret);</div><div class='add'>+				chip-&gt;mask_base + (i * map-&gt;reg_stride), ret);</div><div class='ctx'> 			goto err_alloc;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Register them with genirq */</div><div class='del'>-	for (cur_irq = irq_base;</div><div class='del'>-	     cur_irq &lt; chip-&gt;num_irqs + irq_base;</div><div class='del'>-	     cur_irq++) {</div><div class='del'>-		irq_set_chip_data(cur_irq, d);</div><div class='del'>-		irq_set_chip_and_handler(cur_irq, &amp;regmap_irq_chip,</div><div class='del'>-					 handle_edge_irq);</div><div class='del'>-		irq_set_nested_thread(cur_irq, 1);</div><div class='del'>-</div><div class='del'>-		/* ARM needs us to explicitly flag the IRQ as valid</div><div class='del'>-		 * and will set them noprobe when we do so. */</div><div class='del'>-#ifdef CONFIG_ARM</div><div class='del'>-		set_irq_flags(cur_irq, IRQF_VALID);</div><div class='del'>-#else</div><div class='del'>-		irq_set_noprobe(cur_irq);</div><div class='del'>-#endif</div><div class='add'>+	if (irq_base)</div><div class='add'>+		d-&gt;domain = irq_domain_add_legacy(map-&gt;dev-&gt;of_node,</div><div class='add'>+						  chip-&gt;num_irqs, irq_base, 0,</div><div class='add'>+						  &amp;regmap_domain_ops, d);</div><div class='add'>+	else</div><div class='add'>+		d-&gt;domain = irq_domain_add_linear(map-&gt;dev-&gt;of_node,</div><div class='add'>+						  chip-&gt;num_irqs,</div><div class='add'>+						  &amp;regmap_domain_ops, d);</div><div class='add'>+	if (!d-&gt;domain) {</div><div class='add'>+		dev_err(map-&gt;dev, "Failed to create IRQ domain\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_alloc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = request_threaded_irq(irq, NULL, regmap_irq_thread, irq_flags,</div><div class='ctx'> 				   chip-&gt;name, d);</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		dev_err(map-&gt;dev, "Failed to request IRQ %d: %d\n", irq, ret);</div><div class='del'>-		goto err_alloc;</div><div class='add'>+		goto err_domain;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_domain:</div><div class='add'>+	/* Should really dispose of the domain but... */</div><div class='ctx'> err_alloc:</div><div class='ctx'> 	kfree(d-&gt;mask_buf_def);</div><div class='ctx'> 	kfree(d-&gt;mask_buf);</div><div class='del'>-	kfree(d-&gt;status_reg_buf);</div><div class='ctx'> 	kfree(d-&gt;status_buf);</div><div class='ctx'> 	kfree(d);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -281,9 +314,9 @@ void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	free_irq(irq, d);</div><div class='add'>+	/* We should unmap the domain but... */</div><div class='ctx'> 	kfree(d-&gt;mask_buf_def);</div><div class='ctx'> 	kfree(d-&gt;mask_buf);</div><div class='del'>-	kfree(d-&gt;status_reg_buf);</div><div class='ctx'> 	kfree(d-&gt;status_buf);</div><div class='ctx'> 	kfree(d);</div><div class='ctx'> }</div><div class='hunk'>@@ -298,6 +331,21 @@ EXPORT_SYMBOL_GPL(regmap_del_irq_chip);</div><div class='ctx'>  */</div><div class='ctx'> int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data)</div><div class='ctx'> {</div><div class='add'>+	WARN_ON(!data-&gt;irq_base);</div><div class='ctx'> 	return data-&gt;irq_base;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(regmap_irq_chip_get_base);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * regmap_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ</div><div class='add'>+ *</div><div class='add'>+ * Useful for drivers to request their own IRQs.</div><div class='add'>+ *</div><div class='add'>+ * @data: regmap_irq controller to operate on.</div><div class='add'>+ * @irq: index of the interrupt requested in the chip IRQs</div><div class='add'>+ */</div><div class='add'>+int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq)</div><div class='add'>+{</div><div class='add'>+	return irq_create_mapping(data-&gt;domain, irq);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(regmap_irq_get_virq);</div><div class='head'>diff --git a/drivers/base/regmap/regmap-mmio.c b/drivers/base/regmap/regmap-mmio.c<br/>new file mode 100644<br/>index 000000000000..febd6de6c8ac<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/base/regmap/regmap-mmio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regmap-mmio.c</a></div><div class='hunk'>@@ -0,0 +1,224 @@</div><div class='add'>+/*</div><div class='add'>+ * Register map access API - MMIO support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+struct regmap_mmio_context {</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+	unsigned val_bytes;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int regmap_mmio_gather_write(void *context,</div><div class='add'>+				    const void *reg, size_t reg_size,</div><div class='add'>+				    const void *val, size_t val_size)</div><div class='add'>+{</div><div class='add'>+	struct regmap_mmio_context *ctx = context;</div><div class='add'>+	u32 offset;</div><div class='add'>+</div><div class='add'>+	BUG_ON(reg_size != 4);</div><div class='add'>+</div><div class='add'>+	offset = be32_to_cpup(reg);</div><div class='add'>+</div><div class='add'>+	while (val_size) {</div><div class='add'>+		switch (ctx-&gt;val_bytes) {</div><div class='add'>+		case 1:</div><div class='add'>+			writeb(*(u8 *)val, ctx-&gt;regs + offset);</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			writew(be16_to_cpup(val), ctx-&gt;regs + offset);</div><div class='add'>+			break;</div><div class='add'>+		case 4:</div><div class='add'>+			writel(be32_to_cpup(val), ctx-&gt;regs + offset);</div><div class='add'>+			break;</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='add'>+		case 8:</div><div class='add'>+			writeq(be64_to_cpup(val), ctx-&gt;regs + offset);</div><div class='add'>+			break;</div><div class='add'>+#endif</div><div class='add'>+		default:</div><div class='add'>+			/* Should be caught by regmap_mmio_check_config */</div><div class='add'>+			BUG();</div><div class='add'>+		}</div><div class='add'>+		val_size -= ctx-&gt;val_bytes;</div><div class='add'>+		val += ctx-&gt;val_bytes;</div><div class='add'>+		offset += ctx-&gt;val_bytes;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int regmap_mmio_write(void *context, const void *data, size_t count)</div><div class='add'>+{</div><div class='add'>+	BUG_ON(count &lt; 4);</div><div class='add'>+</div><div class='add'>+	return regmap_mmio_gather_write(context, data, 4, data + 4, count - 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int regmap_mmio_read(void *context,</div><div class='add'>+			    const void *reg, size_t reg_size,</div><div class='add'>+			    void *val, size_t val_size)</div><div class='add'>+{</div><div class='add'>+	struct regmap_mmio_context *ctx = context;</div><div class='add'>+	u32 offset;</div><div class='add'>+</div><div class='add'>+	BUG_ON(reg_size != 4);</div><div class='add'>+</div><div class='add'>+	offset = be32_to_cpup(reg);</div><div class='add'>+</div><div class='add'>+	while (val_size) {</div><div class='add'>+		switch (ctx-&gt;val_bytes) {</div><div class='add'>+		case 1:</div><div class='add'>+			*(u8 *)val = readb(ctx-&gt;regs + offset);</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			*(u16 *)val = cpu_to_be16(readw(ctx-&gt;regs + offset));</div><div class='add'>+			break;</div><div class='add'>+		case 4:</div><div class='add'>+			*(u32 *)val = cpu_to_be32(readl(ctx-&gt;regs + offset));</div><div class='add'>+			break;</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='add'>+		case 8:</div><div class='add'>+			*(u64 *)val = cpu_to_be32(readq(ctx-&gt;regs + offset));</div><div class='add'>+			break;</div><div class='add'>+#endif</div><div class='add'>+		default:</div><div class='add'>+			/* Should be caught by regmap_mmio_check_config */</div><div class='add'>+			BUG();</div><div class='add'>+		}</div><div class='add'>+		val_size -= ctx-&gt;val_bytes;</div><div class='add'>+		val += ctx-&gt;val_bytes;</div><div class='add'>+		offset += ctx-&gt;val_bytes;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void regmap_mmio_free_context(void *context)</div><div class='add'>+{</div><div class='add'>+	kfree(context);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct regmap_bus regmap_mmio = {</div><div class='add'>+	.fast_io = true,</div><div class='add'>+	.write = regmap_mmio_write,</div><div class='add'>+	.gather_write = regmap_mmio_gather_write,</div><div class='add'>+	.read = regmap_mmio_read,</div><div class='add'>+	.free_context = regmap_mmio_free_context,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct regmap_mmio_context *regmap_mmio_gen_context(void __iomem *regs,</div><div class='add'>+					const struct regmap_config *config)</div><div class='add'>+{</div><div class='add'>+	struct regmap_mmio_context *ctx;</div><div class='add'>+	int min_stride;</div><div class='add'>+</div><div class='add'>+	if (config-&gt;reg_bits != 32)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	if (config-&gt;pad_bits)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;val_bits) {</div><div class='add'>+	case 8:</div><div class='add'>+		/* The core treats 0 as 1 */</div><div class='add'>+		min_stride = 0;</div><div class='add'>+		break;</div><div class='add'>+	case 16:</div><div class='add'>+		min_stride = 2;</div><div class='add'>+		break;</div><div class='add'>+	case 32:</div><div class='add'>+		min_stride = 4;</div><div class='add'>+		break;</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='add'>+	case 64:</div><div class='add'>+		min_stride = 8;</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (config-&gt;reg_stride &lt; min_stride)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	ctx = kzalloc(GFP_KERNEL, sizeof(*ctx));</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;regs = regs;</div><div class='add'>+	ctx-&gt;val_bytes = config-&gt;val_bits / 8;</div><div class='add'>+</div><div class='add'>+	return ctx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * regmap_init_mmio(): Initialise register map</div><div class='add'>+ *</div><div class='add'>+ * @dev: Device that will be interacted with</div><div class='add'>+ * @regs: Pointer to memory-mapped IO region</div><div class='add'>+ * @config: Configuration for register map</div><div class='add'>+ *</div><div class='add'>+ * The return value will be an ERR_PTR() on error or a valid pointer to</div><div class='add'>+ * a struct regmap.</div><div class='add'>+ */</div><div class='add'>+struct regmap *regmap_init_mmio(struct device *dev,</div><div class='add'>+				void __iomem *regs,</div><div class='add'>+				const struct regmap_config *config)</div><div class='add'>+{</div><div class='add'>+	struct regmap_mmio_context *ctx;</div><div class='add'>+</div><div class='add'>+	ctx = regmap_mmio_gen_context(regs, config);</div><div class='add'>+	if (IS_ERR(ctx))</div><div class='add'>+		return ERR_CAST(ctx);</div><div class='add'>+</div><div class='add'>+	return regmap_init(dev, &amp;regmap_mmio, ctx, config);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(regmap_init_mmio);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * devm_regmap_init_mmio(): Initialise managed register map</div><div class='add'>+ *</div><div class='add'>+ * @dev: Device that will be interacted with</div><div class='add'>+ * @regs: Pointer to memory-mapped IO region</div><div class='add'>+ * @config: Configuration for register map</div><div class='add'>+ *</div><div class='add'>+ * The return value will be an ERR_PTR() on error or a valid pointer</div><div class='add'>+ * to a struct regmap.  The regmap will be automatically freed by the</div><div class='add'>+ * device management code.</div><div class='add'>+ */</div><div class='add'>+struct regmap *devm_regmap_init_mmio(struct device *dev,</div><div class='add'>+				     void __iomem *regs,</div><div class='add'>+				     const struct regmap_config *config)</div><div class='add'>+{</div><div class='add'>+	struct regmap_mmio_context *ctx;</div><div class='add'>+</div><div class='add'>+	ctx = regmap_mmio_gen_context(regs, config);</div><div class='add'>+	if (IS_ERR(ctx))</div><div class='add'>+		return ERR_CAST(ctx);</div><div class='add'>+</div><div class='add'>+	return devm_regmap_init(dev, &amp;regmap_mmio, ctx, config);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(devm_regmap_init_mmio);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/base/regmap/regmap-spi.c b/drivers/base/regmap/regmap-spi.c<br/>index 7c0c35a39c33..ffa46a92ad33 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/regmap/regmap-spi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/regmap/regmap-spi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/regmap/regmap-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regmap-spi.c</a></div><div class='hunk'>@@ -15,17 +15,19 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='del'>-static int regmap_spi_write(struct device *dev, const void *data, size_t count)</div><div class='add'>+static int regmap_spi_write(void *context, const void *data, size_t count)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = context;</div><div class='ctx'> 	struct spi_device *spi = to_spi_device(dev);</div><div class='ctx'> </div><div class='ctx'> 	return spi_write(spi, data, count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int regmap_spi_gather_write(struct device *dev,</div><div class='add'>+static int regmap_spi_gather_write(void *context,</div><div class='ctx'> 				   const void *reg, size_t reg_len,</div><div class='ctx'> 				   const void *val, size_t val_len)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = context;</div><div class='ctx'> 	struct spi_device *spi = to_spi_device(dev);</div><div class='ctx'> 	struct spi_message m;</div><div class='ctx'> 	struct spi_transfer t[2] = { { .tx_buf = reg, .len = reg_len, },</div><div class='hunk'>@@ -38,10 +40,11 @@ static int regmap_spi_gather_write(struct device *dev,</div><div class='ctx'> 	return spi_sync(spi, &amp;m);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int regmap_spi_read(struct device *dev,</div><div class='add'>+static int regmap_spi_read(void *context,</div><div class='ctx'> 			   const void *reg, size_t reg_size,</div><div class='ctx'> 			   void *val, size_t val_size)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = context;</div><div class='ctx'> 	struct spi_device *spi = to_spi_device(dev);</div><div class='ctx'> </div><div class='ctx'> 	return spi_write_then_read(spi, reg, reg_size, val, val_size);</div><div class='hunk'>@@ -66,7 +69,7 @@ static struct regmap_bus regmap_spi = {</div><div class='ctx'> struct regmap *regmap_init_spi(struct spi_device *spi,</div><div class='ctx'> 			       const struct regmap_config *config)</div><div class='ctx'> {</div><div class='del'>-	return regmap_init(&amp;spi-&gt;dev, &amp;regmap_spi, config);</div><div class='add'>+	return regmap_init(&amp;spi-&gt;dev, &amp;regmap_spi, &amp;spi-&gt;dev, config);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(regmap_init_spi);</div><div class='ctx'> </div><div class='hunk'>@@ -83,7 +86,7 @@ EXPORT_SYMBOL_GPL(regmap_init_spi);</div><div class='ctx'> struct regmap *devm_regmap_init_spi(struct spi_device *spi,</div><div class='ctx'> 				    const struct regmap_config *config)</div><div class='ctx'> {</div><div class='del'>-	return devm_regmap_init(&amp;spi-&gt;dev, &amp;regmap_spi, config);</div><div class='add'>+	return devm_regmap_init(&amp;spi-&gt;dev, &amp;regmap_spi, &amp;spi-&gt;dev, config);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(devm_regmap_init_spi);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c<br/>index 7a3f535e481c..0bcda488f11c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/regmap/regmap.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/regmap/regmap.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/regmap/regmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/regmap/regmap.c</a></div><div class='hunk'>@@ -112,25 +112,36 @@ static void regmap_format_10_14_write(struct regmap *map,</div><div class='ctx'> 	out[0] = reg &gt;&gt; 2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void regmap_format_8(void *buf, unsigned int val)</div><div class='add'>+static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *b = buf;</div><div class='ctx'> </div><div class='del'>-	b[0] = val;</div><div class='add'>+	b[0] = val &lt;&lt; shift;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void regmap_format_16(void *buf, unsigned int val)</div><div class='add'>+static void regmap_format_16(void *buf, unsigned int val, unsigned int shift)</div><div class='ctx'> {</div><div class='ctx'> 	__be16 *b = buf;</div><div class='ctx'> </div><div class='del'>-	b[0] = cpu_to_be16(val);</div><div class='add'>+	b[0] = cpu_to_be16(val &lt;&lt; shift);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void regmap_format_32(void *buf, unsigned int val)</div><div class='add'>+static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)</div><div class='add'>+{</div><div class='add'>+	u8 *b = buf;</div><div class='add'>+</div><div class='add'>+	val &lt;&lt;= shift;</div><div class='add'>+</div><div class='add'>+	b[0] = val &gt;&gt; 16;</div><div class='add'>+	b[1] = val &gt;&gt; 8;</div><div class='add'>+	b[2] = val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void regmap_format_32(void *buf, unsigned int val, unsigned int shift)</div><div class='ctx'> {</div><div class='ctx'> 	__be32 *b = buf;</div><div class='ctx'> </div><div class='del'>-	b[0] = cpu_to_be32(val);</div><div class='add'>+	b[0] = cpu_to_be32(val &lt;&lt; shift);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int regmap_parse_8(void *buf)</div><div class='hunk'>@@ -149,6 +160,16 @@ static unsigned int regmap_parse_16(void *buf)</div><div class='ctx'> 	return b[0];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int regmap_parse_24(void *buf)</div><div class='add'>+{</div><div class='add'>+	u8 *b = buf;</div><div class='add'>+	unsigned int ret = b[2];</div><div class='add'>+	ret |= ((unsigned int)b[1]) &lt;&lt; 8;</div><div class='add'>+	ret |= ((unsigned int)b[0]) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static unsigned int regmap_parse_32(void *buf)</div><div class='ctx'> {</div><div class='ctx'> 	__be32 *b = buf;</div><div class='hunk'>@@ -158,11 +179,41 @@ static unsigned int regmap_parse_32(void *buf)</div><div class='ctx'> 	return b[0];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void regmap_lock_mutex(struct regmap *map)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;map-&gt;mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void regmap_unlock_mutex(struct regmap *map)</div><div class='add'>+{</div><div class='add'>+	mutex_unlock(&amp;map-&gt;mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void regmap_lock_spinlock(struct regmap *map)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;map-&gt;spinlock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void regmap_unlock_spinlock(struct regmap *map)</div><div class='add'>+{</div><div class='add'>+	spin_unlock(&amp;map-&gt;spinlock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dev_get_regmap_release(struct device *dev, void *res)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * We don't actually have anything to do here; the goal here</div><div class='add'>+	 * is not to manage the regmap but to provide a simple way to</div><div class='add'>+	 * get the regmap back given a struct device.</div><div class='add'>+	 */</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * regmap_init(): Initialise register map</div><div class='ctx'>  *</div><div class='ctx'>  * @dev: Device that will be interacted with</div><div class='ctx'>  * @bus: Bus-specific callbacks to use with device</div><div class='add'>+ * @bus_context: Data passed to bus-specific callbacks</div><div class='ctx'>  * @config: Configuration for register map</div><div class='ctx'>  *</div><div class='ctx'>  * The return value will be an ERR_PTR() on error or a valid pointer to</div><div class='hunk'>@@ -171,9 +222,10 @@ static unsigned int regmap_parse_32(void *buf)</div><div class='ctx'>  */</div><div class='ctx'> struct regmap *regmap_init(struct device *dev,</div><div class='ctx'> 			   const struct regmap_bus *bus,</div><div class='add'>+			   void *bus_context,</div><div class='ctx'> 			   const struct regmap_config *config)</div><div class='ctx'> {</div><div class='del'>-	struct regmap *map;</div><div class='add'>+	struct regmap *map, **m;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (!bus || !config)</div><div class='hunk'>@@ -185,20 +237,36 @@ struct regmap *regmap_init(struct device *dev,</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_init(&amp;map-&gt;lock);</div><div class='add'>+	if (bus-&gt;fast_io) {</div><div class='add'>+		spin_lock_init(&amp;map-&gt;spinlock);</div><div class='add'>+		map-&gt;lock = regmap_lock_spinlock;</div><div class='add'>+		map-&gt;unlock = regmap_unlock_spinlock;</div><div class='add'>+	} else {</div><div class='add'>+		mutex_init(&amp;map-&gt;mutex);</div><div class='add'>+		map-&gt;lock = regmap_lock_mutex;</div><div class='add'>+		map-&gt;unlock = regmap_unlock_mutex;</div><div class='add'>+	}</div><div class='ctx'> 	map-&gt;format.buf_size = (config-&gt;reg_bits + config-&gt;val_bits) / 8;</div><div class='ctx'> 	map-&gt;format.reg_bytes = DIV_ROUND_UP(config-&gt;reg_bits, 8);</div><div class='ctx'> 	map-&gt;format.pad_bytes = config-&gt;pad_bits / 8;</div><div class='ctx'> 	map-&gt;format.val_bytes = DIV_ROUND_UP(config-&gt;val_bits, 8);</div><div class='ctx'> 	map-&gt;format.buf_size += map-&gt;format.pad_bytes;</div><div class='add'>+	map-&gt;reg_shift = config-&gt;pad_bits % 8;</div><div class='add'>+	if (config-&gt;reg_stride)</div><div class='add'>+		map-&gt;reg_stride = config-&gt;reg_stride;</div><div class='add'>+	else</div><div class='add'>+		map-&gt;reg_stride = 1;</div><div class='add'>+	map-&gt;use_single_rw = config-&gt;use_single_rw;</div><div class='ctx'> 	map-&gt;dev = dev;</div><div class='ctx'> 	map-&gt;bus = bus;</div><div class='add'>+	map-&gt;bus_context = bus_context;</div><div class='ctx'> 	map-&gt;max_register = config-&gt;max_register;</div><div class='ctx'> 	map-&gt;writeable_reg = config-&gt;writeable_reg;</div><div class='ctx'> 	map-&gt;readable_reg = config-&gt;readable_reg;</div><div class='ctx'> 	map-&gt;volatile_reg = config-&gt;volatile_reg;</div><div class='ctx'> 	map-&gt;precious_reg = config-&gt;precious_reg;</div><div class='ctx'> 	map-&gt;cache_type = config-&gt;cache_type;</div><div class='add'>+	map-&gt;name = config-&gt;name;</div><div class='ctx'> </div><div class='ctx'> 	if (config-&gt;read_flag_mask || config-&gt;write_flag_mask) {</div><div class='ctx'> 		map-&gt;read_flag_mask = config-&gt;read_flag_mask;</div><div class='hunk'>@@ -207,7 +275,7 @@ struct regmap *regmap_init(struct device *dev,</div><div class='ctx'> 		map-&gt;read_flag_mask = bus-&gt;read_flag_mask;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (config-&gt;reg_bits) {</div><div class='add'>+	switch (config-&gt;reg_bits + map-&gt;reg_shift) {</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		switch (config-&gt;val_bits) {</div><div class='ctx'> 		case 6:</div><div class='hunk'>@@ -273,12 +341,19 @@ struct regmap *regmap_init(struct device *dev,</div><div class='ctx'> 		map-&gt;format.format_val = regmap_format_16;</div><div class='ctx'> 		map-&gt;format.parse_val = regmap_parse_16;</div><div class='ctx'> 		break;</div><div class='add'>+	case 24:</div><div class='add'>+		map-&gt;format.format_val = regmap_format_24;</div><div class='add'>+		map-&gt;format.parse_val = regmap_parse_24;</div><div class='add'>+		break;</div><div class='ctx'> 	case 32:</div><div class='ctx'> 		map-&gt;format.format_val = regmap_format_32;</div><div class='ctx'> 		map-&gt;format.parse_val = regmap_parse_32;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (map-&gt;format.format_write)</div><div class='add'>+		map-&gt;use_single_rw = true;</div><div class='add'>+</div><div class='ctx'> 	if (!map-&gt;format.format_write &amp;&amp;</div><div class='ctx'> 	    !(map-&gt;format.format_reg &amp;&amp; map-&gt;format.format_val))</div><div class='ctx'> 		goto err_map;</div><div class='hunk'>@@ -289,14 +364,25 @@ struct regmap *regmap_init(struct device *dev,</div><div class='ctx'> 		goto err_map;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	regmap_debugfs_init(map);</div><div class='add'>+	regmap_debugfs_init(map, config-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	ret = regcache_init(map, config);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto err_free_workbuf;</div><div class='ctx'> </div><div class='add'>+	/* Add a devres resource for dev_get_regmap() */</div><div class='add'>+	m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);</div><div class='add'>+	if (!m) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_cache;</div><div class='add'>+	}</div><div class='add'>+	*m = map;</div><div class='add'>+	devres_add(dev, m);</div><div class='add'>+</div><div class='ctx'> 	return map;</div><div class='ctx'> </div><div class='add'>+err_cache:</div><div class='add'>+	regcache_exit(map);</div><div class='ctx'> err_free_workbuf:</div><div class='ctx'> 	kfree(map-&gt;work_buf);</div><div class='ctx'> err_map:</div><div class='hunk'>@@ -316,6 +402,7 @@ static void devm_regmap_release(struct device *dev, void *res)</div><div class='ctx'>  *</div><div class='ctx'>  * @dev: Device that will be interacted with</div><div class='ctx'>  * @bus: Bus-specific callbacks to use with device</div><div class='add'>+ * @bus_context: Data passed to bus-specific callbacks</div><div class='ctx'>  * @config: Configuration for register map</div><div class='ctx'>  *</div><div class='ctx'>  * The return value will be an ERR_PTR() on error or a valid pointer</div><div class='hunk'>@@ -325,6 +412,7 @@ static void devm_regmap_release(struct device *dev, void *res)</div><div class='ctx'>  */</div><div class='ctx'> struct regmap *devm_regmap_init(struct device *dev,</div><div class='ctx'> 				const struct regmap_bus *bus,</div><div class='add'>+				void *bus_context,</div><div class='ctx'> 				const struct regmap_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct regmap **ptr, *regmap;</div><div class='hunk'>@@ -333,7 +421,7 @@ struct regmap *devm_regmap_init(struct device *dev,</div><div class='ctx'> 	if (!ptr)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	regmap = regmap_init(dev, bus, config);</div><div class='add'>+	regmap = regmap_init(dev, bus, bus_context, config);</div><div class='ctx'> 	if (!IS_ERR(regmap)) {</div><div class='ctx'> 		*ptr = regmap;</div><div class='ctx'> 		devres_add(dev, ptr);</div><div class='hunk'>@@ -360,7 +448,7 @@ int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> </div><div class='ctx'> 	regcache_exit(map);</div><div class='ctx'> 	regmap_debugfs_exit(map);</div><div class='hunk'>@@ -372,14 +460,14 @@ int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)</div><div class='ctx'> 	map-&gt;precious_reg = config-&gt;precious_reg;</div><div class='ctx'> 	map-&gt;cache_type = config-&gt;cache_type;</div><div class='ctx'> </div><div class='del'>-	regmap_debugfs_init(map);</div><div class='add'>+	regmap_debugfs_init(map, config-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	map-&gt;cache_bypass = false;</div><div class='ctx'> 	map-&gt;cache_only = false;</div><div class='ctx'> </div><div class='ctx'> 	ret = regcache_init(map, config);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -391,11 +479,51 @@ void regmap_exit(struct regmap *map)</div><div class='ctx'> {</div><div class='ctx'> 	regcache_exit(map);</div><div class='ctx'> 	regmap_debugfs_exit(map);</div><div class='add'>+	if (map-&gt;bus-&gt;free_context)</div><div class='add'>+		map-&gt;bus-&gt;free_context(map-&gt;bus_context);</div><div class='ctx'> 	kfree(map-&gt;work_buf);</div><div class='ctx'> 	kfree(map);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(regmap_exit);</div><div class='ctx'> </div><div class='add'>+static int dev_get_regmap_match(struct device *dev, void *res, void *data)</div><div class='add'>+{</div><div class='add'>+	struct regmap **r = res;</div><div class='add'>+	if (!r || !*r) {</div><div class='add'>+		WARN_ON(!r || !*r);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If the user didn't specify a name match any */</div><div class='add'>+	if (data)</div><div class='add'>+		return (*r)-&gt;name == data;</div><div class='add'>+	else</div><div class='add'>+		return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dev_get_regmap(): Obtain the regmap (if any) for a device</div><div class='add'>+ *</div><div class='add'>+ * @dev: Device to retrieve the map for</div><div class='add'>+ * @name: Optional name for the register map, usually NULL.</div><div class='add'>+ *</div><div class='add'>+ * Returns the regmap for the device if one is present, or NULL.  If</div><div class='add'>+ * name is specified then it must match the name specified when</div><div class='add'>+ * registering the device, if it is NULL then the first regmap found</div><div class='add'>+ * will be used.  Devices with multiple register maps are very rare,</div><div class='add'>+ * generic code should normally not need to specify a name.</div><div class='add'>+ */</div><div class='add'>+struct regmap *dev_get_regmap(struct device *dev, const char *name)</div><div class='add'>+{</div><div class='add'>+	struct regmap **r = devres_find(dev, dev_get_regmap_release,</div><div class='add'>+					dev_get_regmap_match, (void *)name);</div><div class='add'>+</div><div class='add'>+	if (!r)</div><div class='add'>+		return NULL;</div><div class='add'>+	return *r;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(dev_get_regmap);</div><div class='add'>+</div><div class='ctx'> static int _regmap_raw_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> 			     const void *val, size_t val_len)</div><div class='ctx'> {</div><div class='hunk'>@@ -408,7 +536,8 @@ static int _regmap_raw_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> 	/* Check for unwritable registers before we start */</div><div class='ctx'> 	if (map-&gt;writeable_reg)</div><div class='ctx'> 		for (i = 0; i &lt; val_len / map-&gt;format.val_bytes; i++)</div><div class='del'>-			if (!map-&gt;writeable_reg(map-&gt;dev, reg + i))</div><div class='add'>+			if (!map-&gt;writeable_reg(map-&gt;dev,</div><div class='add'>+						reg + (i * map-&gt;reg_stride)))</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (!map-&gt;cache_bypass &amp;&amp; map-&gt;format.parse_val) {</div><div class='hunk'>@@ -417,7 +546,8 @@ static int _regmap_raw_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> 		for (i = 0; i &lt; val_len / val_bytes; i++) {</div><div class='ctx'> 			memcpy(map-&gt;work_buf, val + (i * val_bytes), val_bytes);</div><div class='ctx'> 			ival = map-&gt;format.parse_val(map-&gt;work_buf);</div><div class='del'>-			ret = regcache_write(map, reg + i, ival);</div><div class='add'>+			ret = regcache_write(map, reg + (i * map-&gt;reg_stride),</div><div class='add'>+					     ival);</div><div class='ctx'> 			if (ret) {</div><div class='ctx'> 				dev_err(map-&gt;dev,</div><div class='ctx'> 				   "Error in caching of register: %u ret: %d\n",</div><div class='hunk'>@@ -431,7 +561,7 @@ static int _regmap_raw_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	map-&gt;format.format_reg(map-&gt;work_buf, reg);</div><div class='add'>+	map-&gt;format.format_reg(map-&gt;work_buf, reg, map-&gt;reg_shift);</div><div class='ctx'> </div><div class='ctx'> 	u8[0] |= map-&gt;write_flag_mask;</div><div class='ctx'> </div><div class='hunk'>@@ -444,12 +574,12 @@ static int _regmap_raw_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (val == (map-&gt;work_buf + map-&gt;format.pad_bytes +</div><div class='ctx'> 		    map-&gt;format.reg_bytes))</div><div class='del'>-		ret = map-&gt;bus-&gt;write(map-&gt;dev, map-&gt;work_buf,</div><div class='add'>+		ret = map-&gt;bus-&gt;write(map-&gt;bus_context, map-&gt;work_buf,</div><div class='ctx'> 				      map-&gt;format.reg_bytes +</div><div class='ctx'> 				      map-&gt;format.pad_bytes +</div><div class='ctx'> 				      val_len);</div><div class='ctx'> 	else if (map-&gt;bus-&gt;gather_write)</div><div class='del'>-		ret = map-&gt;bus-&gt;gather_write(map-&gt;dev, map-&gt;work_buf,</div><div class='add'>+		ret = map-&gt;bus-&gt;gather_write(map-&gt;bus_context, map-&gt;work_buf,</div><div class='ctx'> 					     map-&gt;format.reg_bytes +</div><div class='ctx'> 					     map-&gt;format.pad_bytes,</div><div class='ctx'> 					     val, val_len);</div><div class='hunk'>@@ -464,7 +594,7 @@ static int _regmap_raw_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> 		memcpy(buf, map-&gt;work_buf, map-&gt;format.reg_bytes);</div><div class='ctx'> 		memcpy(buf + map-&gt;format.reg_bytes + map-&gt;format.pad_bytes,</div><div class='ctx'> 		       val, val_len);</div><div class='del'>-		ret = map-&gt;bus-&gt;write(map-&gt;dev, buf, len);</div><div class='add'>+		ret = map-&gt;bus-&gt;write(map-&gt;bus_context, buf, len);</div><div class='ctx'> </div><div class='ctx'> 		kfree(buf);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -498,7 +628,7 @@ int _regmap_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> </div><div class='ctx'> 		trace_regmap_hw_write_start(map-&gt;dev, reg, 1);</div><div class='ctx'> </div><div class='del'>-		ret = map-&gt;bus-&gt;write(map-&gt;dev, map-&gt;work_buf,</div><div class='add'>+		ret = map-&gt;bus-&gt;write(map-&gt;bus_context, map-&gt;work_buf,</div><div class='ctx'> 				      map-&gt;format.buf_size);</div><div class='ctx'> </div><div class='ctx'> 		trace_regmap_hw_write_done(map-&gt;dev, reg, 1);</div><div class='hunk'>@@ -506,7 +636,7 @@ int _regmap_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		map-&gt;format.format_val(map-&gt;work_buf + map-&gt;format.reg_bytes</div><div class='del'>-				       + map-&gt;format.pad_bytes, val);</div><div class='add'>+				       + map-&gt;format.pad_bytes, val, 0);</div><div class='ctx'> 		return _regmap_raw_write(map, reg,</div><div class='ctx'> 					 map-&gt;work_buf +</div><div class='ctx'> 					 map-&gt;format.reg_bytes +</div><div class='hunk'>@@ -529,11 +659,14 @@ int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	if (reg % map-&gt;reg_stride)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> </div><div class='ctx'> 	ret = _regmap_write(map, reg, val);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -560,11 +693,16 @@ int regmap_raw_write(struct regmap *map, unsigned int reg,</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	if (val_len % map-&gt;format.val_bytes)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (reg % map-&gt;reg_stride)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> </div><div class='ctx'> 	ret = _regmap_raw_write(map, reg, val, val_len);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -593,8 +731,10 @@ int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,</div><div class='ctx'> </div><div class='ctx'> 	if (!map-&gt;format.parse_val)</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	if (reg % map-&gt;reg_stride)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> </div><div class='ctx'> 	/* No formatting is require if val_byte is 1 */</div><div class='ctx'> 	if (val_bytes == 1) {</div><div class='hunk'>@@ -609,13 +749,28 @@ int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,</div><div class='ctx'> 		for (i = 0; i &lt; val_count * val_bytes; i += val_bytes)</div><div class='ctx'> 			map-&gt;format.parse_val(wval + i);</div><div class='ctx'> 	}</div><div class='del'>-	ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);</div><div class='add'>+	/*</div><div class='add'>+	 * Some devices does not support bulk write, for</div><div class='add'>+	 * them we have a series of single write operations.</div><div class='add'>+	 */</div><div class='add'>+	if (map-&gt;use_single_rw) {</div><div class='add'>+		for (i = 0; i &lt; val_count; i++) {</div><div class='add'>+			ret = regmap_raw_write(map,</div><div class='add'>+						reg + (i * map-&gt;reg_stride),</div><div class='add'>+						val + (i * val_bytes),</div><div class='add'>+						val_bytes);</div><div class='add'>+			if (ret != 0)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (val_bytes != 1)</div><div class='ctx'> 		kfree(wval);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(regmap_bulk_write);</div><div class='hunk'>@@ -626,7 +781,7 @@ static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,</div><div class='ctx'> 	u8 *u8 = map-&gt;work_buf;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	map-&gt;format.format_reg(map-&gt;work_buf, reg);</div><div class='add'>+	map-&gt;format.format_reg(map-&gt;work_buf, reg, map-&gt;reg_shift);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Some buses or devices flag reads by setting the high bits in the</div><div class='hunk'>@@ -639,7 +794,7 @@ static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,</div><div class='ctx'> 	trace_regmap_hw_read_start(map-&gt;dev, reg,</div><div class='ctx'> 				   val_len / map-&gt;format.val_bytes);</div><div class='ctx'> </div><div class='del'>-	ret = map-&gt;bus-&gt;read(map-&gt;dev, map-&gt;work_buf,</div><div class='add'>+	ret = map-&gt;bus-&gt;read(map-&gt;bus_context, map-&gt;work_buf,</div><div class='ctx'> 			     map-&gt;format.reg_bytes + map-&gt;format.pad_bytes,</div><div class='ctx'> 			     val, val_len);</div><div class='ctx'> </div><div class='hunk'>@@ -672,6 +827,9 @@ static int _regmap_read(struct regmap *map, unsigned int reg,</div><div class='ctx'> 		trace_regmap_reg_read(map-&gt;dev, reg, *val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ret == 0 &amp;&amp; !map-&gt;cache_bypass)</div><div class='add'>+		regcache_write(map, reg, *val);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -689,11 +847,14 @@ int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	if (reg % map-&gt;reg_stride)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> </div><div class='ctx'> 	ret = _regmap_read(map, reg, val);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -718,7 +879,12 @@ int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,</div><div class='ctx'> 	unsigned int v;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	if (val_len % map-&gt;format.val_bytes)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (reg % map-&gt;reg_stride)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> </div><div class='ctx'> 	if (regmap_volatile_range(map, reg, val_count) || map-&gt;cache_bypass ||</div><div class='ctx'> 	    map-&gt;cache_type == REGCACHE_NONE) {</div><div class='hunk'>@@ -730,16 +896,17 @@ int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,</div><div class='ctx'> 		 * cost as we expect to hit the cache.</div><div class='ctx'> 		 */</div><div class='ctx'> 		for (i = 0; i &lt; val_count; i++) {</div><div class='del'>-			ret = _regmap_read(map, reg + i, &amp;v);</div><div class='add'>+			ret = _regmap_read(map, reg + (i * map-&gt;reg_stride),</div><div class='add'>+					   &amp;v);</div><div class='ctx'> 			if (ret != 0)</div><div class='ctx'> 				goto out;</div><div class='ctx'> </div><div class='del'>-			map-&gt;format.format_val(val + (i * val_bytes), v);</div><div class='add'>+			map-&gt;format.format_val(val + (i * val_bytes), v, 0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -765,19 +932,40 @@ int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,</div><div class='ctx'> </div><div class='ctx'> 	if (!map-&gt;format.parse_val)</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	if (reg % map-&gt;reg_stride)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (vol || map-&gt;cache_type == REGCACHE_NONE) {</div><div class='del'>-		ret = regmap_raw_read(map, reg, val, val_bytes * val_count);</div><div class='del'>-		if (ret != 0)</div><div class='del'>-			return ret;</div><div class='add'>+		/*</div><div class='add'>+		 * Some devices does not support bulk read, for</div><div class='add'>+		 * them we have a series of single read operations.</div><div class='add'>+		 */</div><div class='add'>+		if (map-&gt;use_single_rw) {</div><div class='add'>+			for (i = 0; i &lt; val_count; i++) {</div><div class='add'>+				ret = regmap_raw_read(map,</div><div class='add'>+						reg + (i * map-&gt;reg_stride),</div><div class='add'>+						val + (i * val_bytes),</div><div class='add'>+						val_bytes);</div><div class='add'>+				if (ret != 0)</div><div class='add'>+					return ret;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			ret = regmap_raw_read(map, reg, val,</div><div class='add'>+					      val_bytes * val_count);</div><div class='add'>+			if (ret != 0)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; val_count * val_bytes; i += val_bytes)</div><div class='ctx'> 			map-&gt;format.parse_val(val + i);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		for (i = 0; i &lt; val_count; i++) {</div><div class='del'>-			ret = regmap_read(map, reg + i, val + (i * val_bytes));</div><div class='add'>+			unsigned int ival;</div><div class='add'>+			ret = regmap_read(map, reg + (i * map-&gt;reg_stride),</div><div class='add'>+					  &amp;ival);</div><div class='ctx'> 			if (ret != 0)</div><div class='ctx'> 				return ret;</div><div class='add'>+			memcpy(val + (i * val_bytes), &amp;ival, val_bytes);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -792,7 +980,7 @@ static int _regmap_update_bits(struct regmap *map, unsigned int reg,</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	unsigned int tmp, orig;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> </div><div class='ctx'> 	ret = _regmap_read(map, reg, &amp;orig);</div><div class='ctx'> 	if (ret != 0)</div><div class='hunk'>@@ -809,7 +997,7 @@ static int _regmap_update_bits(struct regmap *map, unsigned int reg,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -876,7 +1064,7 @@ int regmap_register_patch(struct regmap *map, const struct reg_default *regs,</div><div class='ctx'> 	if (map-&gt;patch)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;lock(map);</div><div class='ctx'> </div><div class='ctx'> 	bypass = map-&gt;cache_bypass;</div><div class='ctx'> </div><div class='hunk'>@@ -904,7 +1092,7 @@ int regmap_register_patch(struct regmap *map, const struct reg_default *regs,</div><div class='ctx'> out:</div><div class='ctx'> 	map-&gt;cache_bypass = bypass;</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;map-&gt;lock);</div><div class='add'>+	map-&gt;unlock(map);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/base/soc.c b/drivers/base/soc.c<br/>index ba29b2e73d48..72b5e7280d14 100644<br/>--- a/<a href='/drm-misc/tree/drivers/base/soc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/base/soc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/base/soc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/base/soc.c</a></div><div class='hunk'>@@ -42,7 +42,7 @@ struct device *soc_device_to_device(struct soc_device *soc_dev)</div><div class='ctx'> 	return &amp;soc_dev-&gt;dev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static mode_t soc_attribute_mode(struct kobject *kobj,</div><div class='add'>+static umode_t soc_attribute_mode(struct kobject *kobj,</div><div class='ctx'>                                  struct attribute *attr,</div><div class='ctx'>                                  int index)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/bcma/core.c b/drivers/bcma/core.c<br/>index 893f6e0c759f..bc6e89212ad3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bcma/core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bcma/core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bcma/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bcma/core.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@ void bcma_core_disable(struct bcma_device *core, u32 flags)</div><div class='ctx'> 	udelay(10);</div><div class='ctx'> </div><div class='ctx'> 	bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);</div><div class='add'>+	bcma_aread32(core, BCMA_RESET_CTL);</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(bcma_core_disable);</div><div class='hunk'>@@ -77,7 +78,7 @@ void bcma_core_set_clockmode(struct bcma_device *core,</div><div class='ctx'> 			pr_err("HT force timeout\n");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BCMA_CLKMODE_DYNAMIC:</div><div class='del'>-		pr_warn("Dynamic clockmode not supported yet!\n");</div><div class='add'>+		bcma_set32(core, BCMA_CLKCTLST, ~BCMA_CLKCTLST_FORCEHT);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/bcma/driver_pci.c b/drivers/bcma/driver_pci.c<br/>index 4d38ae179b48..9a96f14c8f47 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bcma/driver_pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bcma/driver_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bcma/driver_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bcma/driver_pci.c</a></div><div class='hunk'>@@ -24,14 +24,12 @@ u32 bcma_pcie_read(struct bcma_drv_pci *pc, u32 address)</div><div class='ctx'> 	return pcicore_read32(pc, BCMA_CORE_PCI_PCIEIND_DATA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if 0</div><div class='ctx'> static void bcma_pcie_write(struct bcma_drv_pci *pc, u32 address, u32 data)</div><div class='ctx'> {</div><div class='ctx'> 	pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_ADDR, address);</div><div class='ctx'> 	pcicore_read32(pc, BCMA_CORE_PCI_PCIEIND_ADDR);</div><div class='ctx'> 	pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)</div><div class='ctx'> {</div><div class='hunk'>@@ -170,13 +168,50 @@ static void bcma_pcicore_serdes_workaround(struct bcma_drv_pci *pc)</div><div class='ctx'> 		                     tmp &amp; ~BCMA_CORE_PCI_PLL_CTRL_FREQDET_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bcma_core_pci_fixcfg(struct bcma_drv_pci *pc)</div><div class='add'>+{</div><div class='add'>+	struct bcma_device *core = pc-&gt;core;</div><div class='add'>+	u16 val16, core_index;</div><div class='add'>+	uint regoff;</div><div class='add'>+</div><div class='add'>+	regoff = BCMA_CORE_PCI_SPROM(BCMA_CORE_PCI_SPROM_PI_OFFSET);</div><div class='add'>+	core_index = (u16)core-&gt;core_index;</div><div class='add'>+</div><div class='add'>+	val16 = pcicore_read16(pc, regoff);</div><div class='add'>+	if (((val16 &amp; BCMA_CORE_PCI_SPROM_PI_MASK) &gt;&gt; BCMA_CORE_PCI_SPROM_PI_SHIFT)</div><div class='add'>+	     != core_index) {</div><div class='add'>+		val16 = (core_index &lt;&lt; BCMA_CORE_PCI_SPROM_PI_SHIFT) |</div><div class='add'>+			(val16 &amp; ~BCMA_CORE_PCI_SPROM_PI_MASK);</div><div class='add'>+		pcicore_write16(pc, regoff, val16);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Fix MISC config to allow coming out of L2/L3-Ready state w/o PRST */</div><div class='add'>+/* Needs to happen when coming out of 'standby'/'hibernate' */</div><div class='add'>+static void bcma_core_pci_config_fixup(struct bcma_drv_pci *pc)</div><div class='add'>+{</div><div class='add'>+	u16 val16;</div><div class='add'>+	uint regoff;</div><div class='add'>+</div><div class='add'>+	regoff = BCMA_CORE_PCI_SPROM(BCMA_CORE_PCI_SPROM_MISC_CONFIG);</div><div class='add'>+</div><div class='add'>+	val16 = pcicore_read16(pc, regoff);</div><div class='add'>+</div><div class='add'>+	if (!(val16 &amp; BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST)) {</div><div class='add'>+		val16 |= BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST;</div><div class='add'>+		pcicore_write16(pc, regoff, val16);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**************************************************</div><div class='ctx'>  * Init.</div><div class='ctx'>  **************************************************/</div><div class='ctx'> </div><div class='ctx'> static void __devinit bcma_core_pci_clientmode_init(struct bcma_drv_pci *pc)</div><div class='ctx'> {</div><div class='add'>+	bcma_core_pci_fixcfg(pc);</div><div class='ctx'> 	bcma_pcicore_serdes_workaround(pc);</div><div class='add'>+	bcma_core_pci_config_fixup(pc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc)</div><div class='hunk'>@@ -224,3 +259,17 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);</div><div class='add'>+</div><div class='add'>+void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)</div><div class='add'>+{</div><div class='add'>+	u32 w;</div><div class='add'>+</div><div class='add'>+	w = bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);</div><div class='add'>+	if (extend)</div><div class='add'>+		w |= BCMA_CORE_PCI_ASPMTIMER_EXTEND;</div><div class='add'>+	else</div><div class='add'>+		w &amp;= ~BCMA_CORE_PCI_ASPMTIMER_EXTEND;</div><div class='add'>+	bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);</div><div class='add'>+	bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);</div><div class='head'>diff --git a/drivers/bcma/driver_pci_host.c b/drivers/bcma/driver_pci_host.c<br/>index d2097a11c3c7..b9a86edfec39 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bcma/driver_pci_host.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bcma/driver_pci_host.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bcma/driver_pci_host.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bcma/driver_pci_host.c</a></div><div class='hunk'>@@ -119,7 +119,7 @@ static int bcma_extpci_read_config(struct bcma_drv_pci *pc, unsigned int dev,</div><div class='ctx'> 		if (unlikely(!addr))</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		err = -ENOMEM;</div><div class='del'>-		mmio = ioremap_nocache(addr, len);</div><div class='add'>+		mmio = ioremap_nocache(addr, sizeof(val));</div><div class='ctx'> 		if (!mmio)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -171,7 +171,7 @@ static int bcma_extpci_write_config(struct bcma_drv_pci *pc, unsigned int dev,</div><div class='ctx'> 			addr = pc-&gt;core-&gt;addr + BCMA_CORE_PCI_PCICFG0;</div><div class='ctx'> 			addr |= (func &lt;&lt; 8);</div><div class='ctx'> 			addr |= (off &amp; 0xfc);</div><div class='del'>-			mmio = ioremap_nocache(addr, len);</div><div class='add'>+			mmio = ioremap_nocache(addr, sizeof(val));</div><div class='ctx'> 			if (!mmio)</div><div class='ctx'> 				goto out;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -180,7 +180,7 @@ static int bcma_extpci_write_config(struct bcma_drv_pci *pc, unsigned int dev,</div><div class='ctx'> 		if (unlikely(!addr))</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		err = -ENOMEM;</div><div class='del'>-		mmio = ioremap_nocache(addr, len);</div><div class='add'>+		mmio = ioremap_nocache(addr, sizeof(val));</div><div class='ctx'> 		if (!mmio)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -491,8 +491,8 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc)</div><div class='ctx'> 	/* Ok, ready to run, register it to the system.</div><div class='ctx'> 	 * The following needs change, if we want to port hostmode</div><div class='ctx'> 	 * to non-MIPS platform. */</div><div class='del'>-	io_map_base = (unsigned long)ioremap_nocache(BCMA_SOC_PCI_MEM,</div><div class='del'>-						     0x04000000);</div><div class='add'>+	io_map_base = (unsigned long)ioremap_nocache(pc_host-&gt;mem_resource.start,</div><div class='add'>+						     resource_size(&amp;pc_host-&gt;mem_resource));</div><div class='ctx'> 	pc_host-&gt;pci_controller.io_map_base = io_map_base;</div><div class='ctx'> 	set_io_port_base(pc_host-&gt;pci_controller.io_map_base);</div><div class='ctx'> 	/* Give some time to the PCI controller to configure itself with the new</div><div class='head'>diff --git a/drivers/bcma/host_pci.c b/drivers/bcma/host_pci.c<br/>index e3928d68802b..6c05cf470f96 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bcma/host_pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bcma/host_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bcma/host_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bcma/host_pci.c</a></div><div class='hunk'>@@ -201,6 +201,9 @@ static int __devinit bcma_host_pci_probe(struct pci_dev *dev,</div><div class='ctx'> 	bus-&gt;hosttype = BCMA_HOSTTYPE_PCI;</div><div class='ctx'> 	bus-&gt;ops = &amp;bcma_host_pci_ops;</div><div class='ctx'> </div><div class='add'>+	bus-&gt;boardinfo.vendor = bus-&gt;host_pci-&gt;subsystem_vendor;</div><div class='add'>+	bus-&gt;boardinfo.type = bus-&gt;host_pci-&gt;subsystem_device;</div><div class='add'>+</div><div class='ctx'> 	/* Register */</div><div class='ctx'> 	err = bcma_bus_register(bus);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -222,7 +225,7 @@ err_kfree_bus:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bcma_host_pci_remove(struct pci_dev *dev)</div><div class='add'>+static void __devexit bcma_host_pci_remove(struct pci_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcma_bus *bus = pci_get_drvdata(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -277,7 +280,7 @@ static struct pci_driver bcma_pci_bridge_driver = {</div><div class='ctx'> 	.name = "bcma-pci-bridge",</div><div class='ctx'> 	.id_table = bcma_pci_bridge_tbl,</div><div class='ctx'> 	.probe = bcma_host_pci_probe,</div><div class='del'>-	.remove = bcma_host_pci_remove,</div><div class='add'>+	.remove = __devexit_p(bcma_host_pci_remove),</div><div class='ctx'> 	.driver.pm = BCMA_PM_OPS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/bcma/scan.c b/drivers/bcma/scan.c<br/>index f94cccccfa56..5ed0718fc660 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bcma/scan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bcma/scan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bcma/scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bcma/scan.c</a></div><div class='hunk'>@@ -19,7 +19,14 @@ struct bcma_device_id_name {</div><div class='ctx'> 	u16 id;</div><div class='ctx'> 	const char *name;</div><div class='ctx'> };</div><div class='del'>-struct bcma_device_id_name bcma_device_names[] = {</div><div class='add'>+</div><div class='add'>+static const struct bcma_device_id_name bcma_arm_device_names[] = {</div><div class='add'>+	{ BCMA_CORE_ARM_1176, "ARM 1176" },</div><div class='add'>+	{ BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },</div><div class='add'>+	{ BCMA_CORE_ARM_CM3, "ARM CM3" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct bcma_device_id_name bcma_bcm_device_names[] = {</div><div class='ctx'> 	{ BCMA_CORE_OOB_ROUTER, "OOB Router" },</div><div class='ctx'> 	{ BCMA_CORE_INVALID, "Invalid" },</div><div class='ctx'> 	{ BCMA_CORE_CHIPCOMMON, "ChipCommon" },</div><div class='hunk'>@@ -27,7 +34,6 @@ struct bcma_device_id_name bcma_device_names[] = {</div><div class='ctx'> 	{ BCMA_CORE_SRAM, "SRAM" },</div><div class='ctx'> 	{ BCMA_CORE_SDRAM, "SDRAM" },</div><div class='ctx'> 	{ BCMA_CORE_PCI, "PCI" },</div><div class='del'>-	{ BCMA_CORE_MIPS, "MIPS" },</div><div class='ctx'> 	{ BCMA_CORE_ETHERNET, "Fast Ethernet" },</div><div class='ctx'> 	{ BCMA_CORE_V90, "V90" },</div><div class='ctx'> 	{ BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },</div><div class='hunk'>@@ -44,7 +50,6 @@ struct bcma_device_id_name bcma_device_names[] = {</div><div class='ctx'> 	{ BCMA_CORE_PHY_A, "PHY A" },</div><div class='ctx'> 	{ BCMA_CORE_PHY_B, "PHY B" },</div><div class='ctx'> 	{ BCMA_CORE_PHY_G, "PHY G" },</div><div class='del'>-	{ BCMA_CORE_MIPS_3302, "MIPS 3302" },</div><div class='ctx'> 	{ BCMA_CORE_USB11_HOST, "USB 1.1 Host" },</div><div class='ctx'> 	{ BCMA_CORE_USB11_DEV, "USB 1.1 Device" },</div><div class='ctx'> 	{ BCMA_CORE_USB20_HOST, "USB 2.0 Host" },</div><div class='hunk'>@@ -58,15 +63,11 @@ struct bcma_device_id_name bcma_device_names[] = {</div><div class='ctx'> 	{ BCMA_CORE_PHY_N, "PHY N" },</div><div class='ctx'> 	{ BCMA_CORE_SRAM_CTL, "SRAM Controller" },</div><div class='ctx'> 	{ BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },</div><div class='del'>-	{ BCMA_CORE_ARM_1176, "ARM 1176" },</div><div class='del'>-	{ BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },</div><div class='ctx'> 	{ BCMA_CORE_PHY_LP, "PHY LP" },</div><div class='ctx'> 	{ BCMA_CORE_PMU, "PMU" },</div><div class='ctx'> 	{ BCMA_CORE_PHY_SSN, "PHY SSN" },</div><div class='ctx'> 	{ BCMA_CORE_SDIO_DEV, "SDIO Device" },</div><div class='del'>-	{ BCMA_CORE_ARM_CM3, "ARM CM3" },</div><div class='ctx'> 	{ BCMA_CORE_PHY_HT, "PHY HT" },</div><div class='del'>-	{ BCMA_CORE_MIPS_74K, "MIPS 74K" },</div><div class='ctx'> 	{ BCMA_CORE_MAC_GBIT, "GBit MAC" },</div><div class='ctx'> 	{ BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },</div><div class='ctx'> 	{ BCMA_CORE_PCIE_RC, "PCIe Root Complex" },</div><div class='hunk'>@@ -79,16 +80,41 @@ struct bcma_device_id_name bcma_device_names[] = {</div><div class='ctx'> 	{ BCMA_CORE_SHIM, "SHIM" },</div><div class='ctx'> 	{ BCMA_CORE_DEFAULT, "Default" },</div><div class='ctx'> };</div><div class='del'>-const char *bcma_device_name(struct bcma_device_id *id)</div><div class='add'>+</div><div class='add'>+static const struct bcma_device_id_name bcma_mips_device_names[] = {</div><div class='add'>+	{ BCMA_CORE_MIPS, "MIPS" },</div><div class='add'>+	{ BCMA_CORE_MIPS_3302, "MIPS 3302" },</div><div class='add'>+	{ BCMA_CORE_MIPS_74K, "MIPS 74K" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *bcma_device_name(const struct bcma_device_id *id)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	const struct bcma_device_id_name *names;</div><div class='add'>+	int size, i;</div><div class='add'>+</div><div class='add'>+	/* search manufacturer specific names */</div><div class='add'>+	switch (id-&gt;manuf) {</div><div class='add'>+	case BCMA_MANUF_ARM:</div><div class='add'>+		names = bcma_arm_device_names;</div><div class='add'>+		size = ARRAY_SIZE(bcma_arm_device_names);</div><div class='add'>+		break;</div><div class='add'>+	case BCMA_MANUF_BCM:</div><div class='add'>+		names = bcma_bcm_device_names;</div><div class='add'>+		size = ARRAY_SIZE(bcma_bcm_device_names);</div><div class='add'>+		break;</div><div class='add'>+	case BCMA_MANUF_MIPS:</div><div class='add'>+		names = bcma_mips_device_names;</div><div class='add'>+		size = ARRAY_SIZE(bcma_mips_device_names);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return "UNKNOWN";</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (id-&gt;manuf == BCMA_MANUF_BCM) {</div><div class='del'>-		for (i = 0; i &lt; ARRAY_SIZE(bcma_device_names); i++) {</div><div class='del'>-			if (bcma_device_names[i].id == id-&gt;id)</div><div class='del'>-				return bcma_device_names[i].name;</div><div class='del'>-		}</div><div class='add'>+	for (i = 0; i &lt; size; i++) {</div><div class='add'>+		if (names[i].id == id-&gt;id)</div><div class='add'>+			return names[i].name;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	return "UNKNOWN";</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -297,6 +323,23 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,</div><div class='ctx'> 			return -EILSEQ;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* First Slave Address Descriptor should be port 0:</div><div class='add'>+	 * the main register space for the core</div><div class='add'>+	 */</div><div class='add'>+	tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);</div><div class='add'>+	if (tmp &lt;= 0) {</div><div class='add'>+		/* Try again to see if it is a bridge */</div><div class='add'>+		tmp = bcma_erom_get_addr_desc(bus, eromptr,</div><div class='add'>+					      SCAN_ADDR_TYPE_BRIDGE, 0);</div><div class='add'>+		if (tmp &lt;= 0) {</div><div class='add'>+			return -EILSEQ;</div><div class='add'>+		} else {</div><div class='add'>+			pr_info("Bridge found\n");</div><div class='add'>+			return -ENXIO;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	core-&gt;addr = tmp;</div><div class='add'>+</div><div class='ctx'> 	/* get &amp; parse slave ports */</div><div class='ctx'> 	for (i = 0; i &lt; ports[1]; i++) {</div><div class='ctx'> 		for (j = 0; ; j++) {</div><div class='hunk'>@@ -309,7 +352,7 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,</div><div class='ctx'> 				break;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				if (i == 0 &amp;&amp; j == 0)</div><div class='del'>-					core-&gt;addr = tmp;</div><div class='add'>+					core-&gt;addr1 = tmp;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/bcma/sprom.c b/drivers/bcma/sprom.c<br/>index 3e2a6002aae6..c7f93359acb0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bcma/sprom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bcma/sprom.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bcma/sprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bcma/sprom.c</a></div><div class='hunk'>@@ -181,6 +181,22 @@ static int bcma_sprom_valid(const u16 *sprom)</div><div class='ctx'> #define SPEX(_field, _offset, _mask, _shift)	\</div><div class='ctx'> 	bus-&gt;sprom._field = ((sprom[SPOFF(_offset)] &amp; (_mask)) &gt;&gt; (_shift))</div><div class='ctx'> </div><div class='add'>+#define SPEX32(_field, _offset, _mask, _shift)	\</div><div class='add'>+	bus-&gt;sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] &lt;&lt; 16 | \</div><div class='add'>+				sprom[SPOFF(_offset)]) &amp; (_mask)) &gt;&gt; (_shift))</div><div class='add'>+</div><div class='add'>+#define SPEX_ARRAY8(_field, _offset, _mask, _shift)	\</div><div class='add'>+	do {	\</div><div class='add'>+		SPEX(_field[0], _offset +  0, _mask, _shift);	\</div><div class='add'>+		SPEX(_field[1], _offset +  2, _mask, _shift);	\</div><div class='add'>+		SPEX(_field[2], _offset +  4, _mask, _shift);	\</div><div class='add'>+		SPEX(_field[3], _offset +  6, _mask, _shift);	\</div><div class='add'>+		SPEX(_field[4], _offset +  8, _mask, _shift);	\</div><div class='add'>+		SPEX(_field[5], _offset + 10, _mask, _shift);	\</div><div class='add'>+		SPEX(_field[6], _offset + 12, _mask, _shift);	\</div><div class='add'>+		SPEX(_field[7], _offset + 14, _mask, _shift);	\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='ctx'> static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom)</div><div class='ctx'> {</div><div class='ctx'> 	u16 v, o;</div><div class='hunk'>@@ -243,7 +259,8 @@ static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom)</div><div class='ctx'> 	SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, ~0, 0);</div><div class='ctx'> 	SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, ~0, 0);</div><div class='ctx'> </div><div class='del'>-	SPEX(country_code, SSB_SPROM8_CCODE, ~0, 0);</div><div class='add'>+	SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);</div><div class='add'>+	SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Extract cores power info info */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(pwr_info_offset); i++) {</div><div class='hunk'>@@ -298,6 +315,136 @@ static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom)</div><div class='ctx'> 	     SSB_SROM8_FEM_TR_ISO_SHIFT);</div><div class='ctx'> 	SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_ANTSWLUT,</div><div class='ctx'> 	     SSB_SROM8_FEM_ANTSWLUT_SHIFT);</div><div class='add'>+</div><div class='add'>+	SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,</div><div class='add'>+	     SSB_SPROM8_ANTAVAIL_A_SHIFT);</div><div class='add'>+	SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,</div><div class='add'>+	     SSB_SPROM8_ANTAVAIL_BG_SHIFT);</div><div class='add'>+	SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);</div><div class='add'>+	SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,</div><div class='add'>+	     SSB_SPROM8_ITSSI_BG_SHIFT);</div><div class='add'>+	SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);</div><div class='add'>+	SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,</div><div class='add'>+	     SSB_SPROM8_ITSSI_A_SHIFT);</div><div class='add'>+	SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);</div><div class='add'>+	SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,</div><div class='add'>+	     SSB_SPROM8_MAXP_AL_SHIFT);</div><div class='add'>+	SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);</div><div class='add'>+	SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,</div><div class='add'>+	     SSB_SPROM8_GPIOA_P1_SHIFT);</div><div class='add'>+	SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);</div><div class='add'>+	SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,</div><div class='add'>+	     SSB_SPROM8_GPIOB_P3_SHIFT);</div><div class='add'>+	SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);</div><div class='add'>+	SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,</div><div class='add'>+	     SSB_SPROM8_TRI5G_SHIFT);</div><div class='add'>+	SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);</div><div class='add'>+	SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,</div><div class='add'>+	     SSB_SPROM8_TRI5GH_SHIFT);</div><div class='add'>+	SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G,</div><div class='add'>+	     SSB_SPROM8_RXPO2G_SHIFT);</div><div class='add'>+	SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,</div><div class='add'>+	     SSB_SPROM8_RXPO5G_SHIFT);</div><div class='add'>+	SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);</div><div class='add'>+	SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,</div><div class='add'>+	     SSB_SPROM8_RSSISMC2G_SHIFT);</div><div class='add'>+	SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,</div><div class='add'>+	     SSB_SPROM8_RSSISAV2G_SHIFT);</div><div class='add'>+	SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,</div><div class='add'>+	     SSB_SPROM8_BXA2G_SHIFT);</div><div class='add'>+	SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);</div><div class='add'>+	SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,</div><div class='add'>+	     SSB_SPROM8_RSSISMC5G_SHIFT);</div><div class='add'>+	SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,</div><div class='add'>+	     SSB_SPROM8_RSSISAV5G_SHIFT);</div><div class='add'>+	SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,</div><div class='add'>+	     SSB_SPROM8_BXA5G_SHIFT);</div><div class='add'>+</div><div class='add'>+	SPEX(pa0b0, SSB_SPROM8_PA0B0, ~0, 0);</div><div class='add'>+	SPEX(pa0b1, SSB_SPROM8_PA0B1, ~0, 0);</div><div class='add'>+	SPEX(pa0b2, SSB_SPROM8_PA0B2, ~0, 0);</div><div class='add'>+	SPEX(pa1b0, SSB_SPROM8_PA1B0, ~0, 0);</div><div class='add'>+	SPEX(pa1b1, SSB_SPROM8_PA1B1, ~0, 0);</div><div class='add'>+	SPEX(pa1b2, SSB_SPROM8_PA1B2, ~0, 0);</div><div class='add'>+	SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, ~0, 0);</div><div class='add'>+	SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, ~0, 0);</div><div class='add'>+	SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, ~0, 0);</div><div class='add'>+	SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, ~0, 0);</div><div class='add'>+	SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, ~0, 0);</div><div class='add'>+	SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, ~0, 0);</div><div class='add'>+	SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, ~0, 0);</div><div class='add'>+	SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, ~0, 0);</div><div class='add'>+	SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, ~0, 0);</div><div class='add'>+	SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, ~0, 0);</div><div class='add'>+	SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, ~0, 0);</div><div class='add'>+</div><div class='add'>+	/* Extract the antenna gain values. */</div><div class='add'>+	SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,</div><div class='add'>+	     SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);</div><div class='add'>+	SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,</div><div class='add'>+	     SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);</div><div class='add'>+	SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,</div><div class='add'>+	     SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);</div><div class='add'>+	SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,</div><div class='add'>+	     SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);</div><div class='add'>+</div><div class='add'>+	SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,</div><div class='add'>+	     SSB_SPROM8_LEDDC_ON_SHIFT);</div><div class='add'>+	SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,</div><div class='add'>+	     SSB_SPROM8_LEDDC_OFF_SHIFT);</div><div class='add'>+</div><div class='add'>+	SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,</div><div class='add'>+	     SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);</div><div class='add'>+	SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,</div><div class='add'>+	     SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);</div><div class='add'>+	SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,</div><div class='add'>+	     SSB_SPROM8_TXRXC_SWITCH_SHIFT);</div><div class='add'>+</div><div class='add'>+	SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);</div><div class='add'>+</div><div class='add'>+	SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);</div><div class='add'>+	SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);</div><div class='add'>+	SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);</div><div class='add'>+	SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);</div><div class='add'>+</div><div class='add'>+	SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,</div><div class='add'>+	     SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);</div><div class='add'>+	SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,</div><div class='add'>+	     SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);</div><div class='add'>+	SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,</div><div class='add'>+	     SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,</div><div class='add'>+	     SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);</div><div class='add'>+	SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,</div><div class='add'>+	     SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);</div><div class='add'>+	SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,</div><div class='add'>+	     SSB_SPROM8_OPT_CORRX_TEMP_OPTION,</div><div class='add'>+	     SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);</div><div class='add'>+	SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,</div><div class='add'>+	     SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,</div><div class='add'>+	     SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);</div><div class='add'>+	SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,</div><div class='add'>+	     SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,</div><div class='add'>+	     SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);</div><div class='add'>+	SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,</div><div class='add'>+	     SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);</div><div class='add'>+</div><div class='add'>+	SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);</div><div class='add'>+	SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);</div><div class='add'>+	SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);</div><div class='add'>+	SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);</div><div class='add'>+</div><div class='add'>+	SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,</div><div class='add'>+	     SSB_SPROM8_THERMAL_TRESH_SHIFT);</div><div class='add'>+	SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,</div><div class='add'>+	     SSB_SPROM8_THERMAL_OFFSET_SHIFT);</div><div class='add'>+	SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,</div><div class='add'>+	     SSB_SPROM8_TEMPDELTA_PHYCAL,</div><div class='add'>+	     SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);</div><div class='add'>+	SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,</div><div class='add'>+	     SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);</div><div class='add'>+	SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,</div><div class='add'>+	     SSB_SPROM8_TEMPDELTA_HYSTERESIS,</div><div class='add'>+	     SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/block/DAC960.c b/drivers/block/DAC960.c<br/>index 8db9089127c5..9a13e889837e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/DAC960.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/DAC960.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/DAC960.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/DAC960.c</a></div><div class='hunk'>@@ -6580,24 +6580,21 @@ static const struct file_operations dac960_user_command_proc_fops = {</div><div class='ctx'> </div><div class='ctx'> static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)</div><div class='ctx'> {</div><div class='del'>-	struct proc_dir_entry *StatusProcEntry;</div><div class='ctx'> 	struct proc_dir_entry *ControllerProcEntry;</div><div class='del'>-	struct proc_dir_entry *UserCommandProcEntry;</div><div class='ctx'> </div><div class='ctx'> 	if (DAC960_ProcDirectoryEntry == NULL) {</div><div class='del'>-  		DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);</div><div class='del'>-  		StatusProcEntry = proc_create("status", 0,</div><div class='del'>-					   DAC960_ProcDirectoryEntry,</div><div class='del'>-					   &amp;dac960_proc_fops);</div><div class='add'>+		DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);</div><div class='add'>+		proc_create("status", 0, DAC960_ProcDirectoryEntry,</div><div class='add'>+			    &amp;dac960_proc_fops);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-      sprintf(Controller-&gt;ControllerName, "c%d", Controller-&gt;ControllerNumber);</div><div class='del'>-      ControllerProcEntry = proc_mkdir(Controller-&gt;ControllerName,</div><div class='del'>-				       DAC960_ProcDirectoryEntry);</div><div class='del'>-      proc_create_data("initial_status", 0, ControllerProcEntry, &amp;dac960_initial_status_proc_fops, Controller);</div><div class='del'>-      proc_create_data("current_status", 0, ControllerProcEntry, &amp;dac960_current_status_proc_fops, Controller);</div><div class='del'>-      UserCommandProcEntry = proc_create_data("user_command", S_IWUSR | S_IRUSR, ControllerProcEntry, &amp;dac960_user_command_proc_fops, Controller);</div><div class='del'>-      Controller-&gt;ControllerProcEntry = ControllerProcEntry;</div><div class='add'>+	sprintf(Controller-&gt;ControllerName, "c%d", Controller-&gt;ControllerNumber);</div><div class='add'>+	ControllerProcEntry = proc_mkdir(Controller-&gt;ControllerName,</div><div class='add'>+					 DAC960_ProcDirectoryEntry);</div><div class='add'>+	proc_create_data("initial_status", 0, ControllerProcEntry, &amp;dac960_initial_status_proc_fops, Controller);</div><div class='add'>+	proc_create_data("current_status", 0, ControllerProcEntry, &amp;dac960_current_status_proc_fops, Controller);</div><div class='add'>+	proc_create_data("user_command", S_IWUSR | S_IRUSR, ControllerProcEntry, &amp;dac960_user_command_proc_fops, Controller);</div><div class='add'>+	Controller-&gt;ControllerProcEntry = ControllerProcEntry;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/block/drbd/drbd_actlog.c b/drivers/block/drbd/drbd_actlog.c<br/>index cf0e63dd97da..e54e31b02b88 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/drbd/drbd_actlog.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/drbd/drbd_actlog.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/drbd/drbd_actlog.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_actlog.c</a></div><div class='hunk'>@@ -65,39 +65,80 @@ struct drbd_atodb_wait {</div><div class='ctx'> </div><div class='ctx'> int w_al_write_transaction(struct drbd_conf *, struct drbd_work *, int);</div><div class='ctx'> </div><div class='add'>+void *drbd_md_get_buffer(struct drbd_conf *mdev)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	wait_event(mdev-&gt;misc_wait,</div><div class='add'>+		   (r = atomic_cmpxchg(&amp;mdev-&gt;md_io_in_use, 0, 1)) == 0 ||</div><div class='add'>+		   mdev-&gt;state.disk &lt;= D_FAILED);</div><div class='add'>+</div><div class='add'>+	return r ? NULL : page_address(mdev-&gt;md_io_page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void drbd_md_put_buffer(struct drbd_conf *mdev)</div><div class='add'>+{</div><div class='add'>+	if (atomic_dec_and_test(&amp;mdev-&gt;md_io_in_use))</div><div class='add'>+		wake_up(&amp;mdev-&gt;misc_wait);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool md_io_allowed(struct drbd_conf *mdev)</div><div class='add'>+{</div><div class='add'>+	enum drbd_disk_state ds = mdev-&gt;state.disk;</div><div class='add'>+	return ds &gt;= D_NEGOTIATING || ds == D_ATTACHING;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wait_until_done_or_disk_failure(struct drbd_conf *mdev, struct drbd_backing_dev *bdev,</div><div class='add'>+				     unsigned int *done)</div><div class='add'>+{</div><div class='add'>+	long dt = bdev-&gt;dc.disk_timeout * HZ / 10;</div><div class='add'>+	if (dt == 0)</div><div class='add'>+		dt = MAX_SCHEDULE_TIMEOUT;</div><div class='add'>+</div><div class='add'>+	dt = wait_event_timeout(mdev-&gt;misc_wait, *done || !md_io_allowed(mdev), dt);</div><div class='add'>+	if (dt == 0)</div><div class='add'>+		dev_err(DEV, "meta-data IO operation timed out\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int _drbd_md_sync_page_io(struct drbd_conf *mdev,</div><div class='ctx'> 				 struct drbd_backing_dev *bdev,</div><div class='ctx'> 				 struct page *page, sector_t sector,</div><div class='ctx'> 				 int rw, int size)</div><div class='ctx'> {</div><div class='ctx'> 	struct bio *bio;</div><div class='del'>-	struct drbd_md_io md_io;</div><div class='ctx'> 	int ok;</div><div class='ctx'> </div><div class='del'>-	md_io.mdev = mdev;</div><div class='del'>-	init_completion(&amp;md_io.event);</div><div class='del'>-	md_io.error = 0;</div><div class='add'>+	mdev-&gt;md_io.done = 0;</div><div class='add'>+	mdev-&gt;md_io.error = -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if ((rw &amp; WRITE) &amp;&amp; !test_bit(MD_NO_FUA, &amp;mdev-&gt;flags))</div><div class='ctx'> 		rw |= REQ_FUA | REQ_FLUSH;</div><div class='ctx'> 	rw |= REQ_SYNC;</div><div class='ctx'> </div><div class='del'>-	bio = bio_alloc(GFP_NOIO, 1);</div><div class='add'>+	bio = bio_alloc_drbd(GFP_NOIO);</div><div class='ctx'> 	bio-&gt;bi_bdev = bdev-&gt;md_bdev;</div><div class='ctx'> 	bio-&gt;bi_sector = sector;</div><div class='ctx'> 	ok = (bio_add_page(bio, page, size, 0) == size);</div><div class='ctx'> 	if (!ok)</div><div class='ctx'> 		goto out;</div><div class='del'>-	bio-&gt;bi_private = &amp;md_io;</div><div class='add'>+	bio-&gt;bi_private = &amp;mdev-&gt;md_io;</div><div class='ctx'> 	bio-&gt;bi_end_io = drbd_md_io_complete;</div><div class='ctx'> 	bio-&gt;bi_rw = rw;</div><div class='ctx'> </div><div class='add'>+	if (!get_ldev_if_state(mdev, D_ATTACHING)) {  /* Corresponding put_ldev in drbd_md_io_complete() */</div><div class='add'>+		dev_err(DEV, "ASSERT FAILED: get_ldev_if_state() == 1 in _drbd_md_sync_page_io()\n");</div><div class='add'>+		ok = 0;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bio_get(bio); /* one bio_put() is in the completion handler */</div><div class='add'>+	atomic_inc(&amp;mdev-&gt;md_io_in_use); /* drbd_md_put_buffer() is in the completion handler */</div><div class='ctx'> 	if (drbd_insert_fault(mdev, (rw &amp; WRITE) ? DRBD_FAULT_MD_WR : DRBD_FAULT_MD_RD))</div><div class='ctx'> 		bio_endio(bio, -EIO);</div><div class='ctx'> 	else</div><div class='ctx'> 		submit_bio(rw, bio);</div><div class='del'>-	wait_for_completion(&amp;md_io.event);</div><div class='del'>-	ok = bio_flagged(bio, BIO_UPTODATE) &amp;&amp; md_io.error == 0;</div><div class='add'>+	wait_until_done_or_disk_failure(mdev, bdev, &amp;mdev-&gt;md_io.done);</div><div class='add'>+	ok = bio_flagged(bio, BIO_UPTODATE) &amp;&amp; mdev-&gt;md_io.error == 0;</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='ctx'> 	bio_put(bio);</div><div class='hunk'>@@ -111,7 +152,7 @@ int drbd_md_sync_page_io(struct drbd_conf *mdev, struct drbd_backing_dev *bdev,</div><div class='ctx'> 	int offset = 0;</div><div class='ctx'> 	struct page *iop = mdev-&gt;md_io_page;</div><div class='ctx'> </div><div class='del'>-	D_ASSERT(mutex_is_locked(&amp;mdev-&gt;md_io_mutex));</div><div class='add'>+	D_ASSERT(atomic_read(&amp;mdev-&gt;md_io_in_use) == 1);</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!bdev-&gt;md_bdev);</div><div class='ctx'> </div><div class='hunk'>@@ -328,8 +369,13 @@ w_al_write_transaction(struct drbd_conf *mdev, struct drbd_work *w, int unused)</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;mdev-&gt;md_io_mutex); /* protects md_io_buffer, al_tr_cycle, ... */</div><div class='del'>-	buffer = (struct al_transaction *)page_address(mdev-&gt;md_io_page);</div><div class='add'>+	buffer = drbd_md_get_buffer(mdev); /* protects md_io_buffer, al_tr_cycle, ... */</div><div class='add'>+	if (!buffer) {</div><div class='add'>+		dev_err(DEV, "disk failed while waiting for md_io buffer\n");</div><div class='add'>+		complete(&amp;((struct update_al_work *)w)-&gt;event);</div><div class='add'>+		put_ldev(mdev);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	buffer-&gt;magic = __constant_cpu_to_be32(DRBD_MAGIC);</div><div class='ctx'> 	buffer-&gt;tr_number = cpu_to_be32(mdev-&gt;al_tr_number);</div><div class='hunk'>@@ -374,7 +420,7 @@ w_al_write_transaction(struct drbd_conf *mdev, struct drbd_work *w, int unused)</div><div class='ctx'> 	D_ASSERT(mdev-&gt;al_tr_pos &lt; MD_AL_MAX_SIZE);</div><div class='ctx'> 	mdev-&gt;al_tr_number++;</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;mdev-&gt;md_io_mutex);</div><div class='add'>+	drbd_md_put_buffer(mdev);</div><div class='ctx'> </div><div class='ctx'> 	complete(&amp;((struct update_al_work *)w)-&gt;event);</div><div class='ctx'> 	put_ldev(mdev);</div><div class='hunk'>@@ -443,8 +489,9 @@ int drbd_al_read_log(struct drbd_conf *mdev, struct drbd_backing_dev *bdev)</div><div class='ctx'> 	/* lock out all other meta data io for now,</div><div class='ctx'> 	 * and make sure the page is mapped.</div><div class='ctx'> 	 */</div><div class='del'>-	mutex_lock(&amp;mdev-&gt;md_io_mutex);</div><div class='del'>-	buffer = page_address(mdev-&gt;md_io_page);</div><div class='add'>+	buffer = drbd_md_get_buffer(mdev);</div><div class='add'>+	if (!buffer)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Find the valid transaction in the log */</div><div class='ctx'> 	for (i = 0; i &lt;= mx; i++) {</div><div class='hunk'>@@ -452,7 +499,7 @@ int drbd_al_read_log(struct drbd_conf *mdev, struct drbd_backing_dev *bdev)</div><div class='ctx'> 		if (rv == 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (rv == -1) {</div><div class='del'>-			mutex_unlock(&amp;mdev-&gt;md_io_mutex);</div><div class='add'>+			drbd_md_put_buffer(mdev);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		cnr = be32_to_cpu(buffer-&gt;tr_number);</div><div class='hunk'>@@ -478,7 +525,7 @@ int drbd_al_read_log(struct drbd_conf *mdev, struct drbd_backing_dev *bdev)</div><div class='ctx'> </div><div class='ctx'> 	if (!found_valid) {</div><div class='ctx'> 		dev_warn(DEV, "No usable activity log found.\n");</div><div class='del'>-		mutex_unlock(&amp;mdev-&gt;md_io_mutex);</div><div class='add'>+		drbd_md_put_buffer(mdev);</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -493,7 +540,7 @@ int drbd_al_read_log(struct drbd_conf *mdev, struct drbd_backing_dev *bdev)</div><div class='ctx'> 		rv = drbd_al_read_tr(mdev, bdev, buffer, i);</div><div class='ctx'> 		ERR_IF(rv == 0) goto cancel;</div><div class='ctx'> 		if (rv == -1) {</div><div class='del'>-			mutex_unlock(&amp;mdev-&gt;md_io_mutex);</div><div class='add'>+			drbd_md_put_buffer(mdev);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -534,7 +581,7 @@ cancel:</div><div class='ctx'> 		mdev-&gt;al_tr_pos = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* ok, we are done with it */</div><div class='del'>-	mutex_unlock(&amp;mdev-&gt;md_io_mutex);</div><div class='add'>+	drbd_md_put_buffer(mdev);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(DEV, "Found %d transactions (%d active extents) in activity log.\n",</div><div class='ctx'> 	     transactions, active_extents);</div><div class='hunk'>@@ -671,16 +718,20 @@ static void drbd_try_clear_on_disk_bm(struct drbd_conf *mdev, sector_t sector,</div><div class='ctx'> 			else</div><div class='ctx'> 				ext-&gt;rs_failed += count;</div><div class='ctx'> 			if (ext-&gt;rs_left &lt; ext-&gt;rs_failed) {</div><div class='del'>-				dev_err(DEV, "BAD! sector=%llus enr=%u rs_left=%d "</div><div class='del'>-				    "rs_failed=%d count=%d\n",</div><div class='add'>+				dev_warn(DEV, "BAD! sector=%llus enr=%u rs_left=%d "</div><div class='add'>+				    "rs_failed=%d count=%d cstate=%s\n",</div><div class='ctx'> 				     (unsigned long long)sector,</div><div class='ctx'> 				     ext-&gt;lce.lc_number, ext-&gt;rs_left,</div><div class='del'>-				     ext-&gt;rs_failed, count);</div><div class='del'>-				dump_stack();</div><div class='del'>-</div><div class='del'>-				lc_put(mdev-&gt;resync, &amp;ext-&gt;lce);</div><div class='del'>-				drbd_force_state(mdev, NS(conn, C_DISCONNECTING));</div><div class='del'>-				return;</div><div class='add'>+				     ext-&gt;rs_failed, count,</div><div class='add'>+				     drbd_conn_str(mdev-&gt;state.conn));</div><div class='add'>+</div><div class='add'>+				/* We don't expect to be able to clear more bits</div><div class='add'>+				 * than have been set when we originally counted</div><div class='add'>+				 * the set bits to cache that value in ext-&gt;rs_left.</div><div class='add'>+				 * Whatever the reason (disconnect during resync,</div><div class='add'>+				 * delayed local completion of an application write),</div><div class='add'>+				 * try to fix it up by recounting here. */</div><div class='add'>+				ext-&gt;rs_left = drbd_bm_e_weight(mdev, enr);</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Normally this element should be in the cache,</div><div class='hunk'>@@ -1192,6 +1243,7 @@ int drbd_rs_del_all(struct drbd_conf *mdev)</div><div class='ctx'> 		put_ldev(mdev);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irq(&amp;mdev-&gt;al_lock);</div><div class='add'>+	wake_up(&amp;mdev-&gt;al_wait);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/block/drbd/drbd_bitmap.c b/drivers/block/drbd/drbd_bitmap.c<br/>index 3030201c69d8..b5c5ff53cb57 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/drbd/drbd_bitmap.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/drbd/drbd_bitmap.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/drbd/drbd_bitmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_bitmap.c</a></div><div class='hunk'>@@ -205,7 +205,7 @@ void drbd_bm_unlock(struct drbd_conf *mdev)</div><div class='ctx'> static void bm_store_page_idx(struct page *page, unsigned long idx)</div><div class='ctx'> {</div><div class='ctx'> 	BUG_ON(0 != (idx &amp; ~BM_PAGE_IDX_MASK));</div><div class='del'>-	page_private(page) |= idx;</div><div class='add'>+	set_page_private(page, idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned long bm_page_to_idx(struct page *page)</div><div class='hunk'>@@ -886,12 +886,21 @@ void drbd_bm_clear_all(struct drbd_conf *mdev)</div><div class='ctx'> struct bm_aio_ctx {</div><div class='ctx'> 	struct drbd_conf *mdev;</div><div class='ctx'> 	atomic_t in_flight;</div><div class='del'>-	struct completion done;</div><div class='add'>+	unsigned int done;</div><div class='ctx'> 	unsigned flags;</div><div class='ctx'> #define BM_AIO_COPY_PAGES	1</div><div class='ctx'> 	int error;</div><div class='add'>+	struct kref kref;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void bm_aio_ctx_destroy(struct kref *kref)</div><div class='add'>+{</div><div class='add'>+	struct bm_aio_ctx *ctx = container_of(kref, struct bm_aio_ctx, kref);</div><div class='add'>+</div><div class='add'>+	put_ldev(ctx-&gt;mdev);</div><div class='add'>+	kfree(ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* bv_page may be a copy, or may be the original */</div><div class='ctx'> static void bm_async_io_complete(struct bio *bio, int error)</div><div class='ctx'> {</div><div class='hunk'>@@ -930,20 +939,21 @@ static void bm_async_io_complete(struct bio *bio, int error)</div><div class='ctx'> </div><div class='ctx'> 	bm_page_unlock_io(mdev, idx);</div><div class='ctx'> </div><div class='del'>-	/* FIXME give back to page pool */</div><div class='ctx'> 	if (ctx-&gt;flags &amp; BM_AIO_COPY_PAGES)</div><div class='del'>-		put_page(bio-&gt;bi_io_vec[0].bv_page);</div><div class='add'>+		mempool_free(bio-&gt;bi_io_vec[0].bv_page, drbd_md_io_page_pool);</div><div class='ctx'> </div><div class='ctx'> 	bio_put(bio);</div><div class='ctx'> </div><div class='del'>-	if (atomic_dec_and_test(&amp;ctx-&gt;in_flight))</div><div class='del'>-		complete(&amp;ctx-&gt;done);</div><div class='add'>+	if (atomic_dec_and_test(&amp;ctx-&gt;in_flight)) {</div><div class='add'>+		ctx-&gt;done = 1;</div><div class='add'>+		wake_up(&amp;mdev-&gt;misc_wait);</div><div class='add'>+		kref_put(&amp;ctx-&gt;kref, &amp;bm_aio_ctx_destroy);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bm_page_io_async(struct bm_aio_ctx *ctx, int page_nr, int rw) __must_hold(local)</div><div class='ctx'> {</div><div class='del'>-	/* we are process context. we always get a bio */</div><div class='del'>-	struct bio *bio = bio_alloc(GFP_KERNEL, 1);</div><div class='add'>+	struct bio *bio = bio_alloc_drbd(GFP_NOIO);</div><div class='ctx'> 	struct drbd_conf *mdev = ctx-&gt;mdev;</div><div class='ctx'> 	struct drbd_bitmap *b = mdev-&gt;bitmap;</div><div class='ctx'> 	struct page *page;</div><div class='hunk'>@@ -966,10 +976,8 @@ static void bm_page_io_async(struct bm_aio_ctx *ctx, int page_nr, int rw) __must</div><div class='ctx'> 	bm_set_page_unchanged(b-&gt;bm_pages[page_nr]);</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;flags &amp; BM_AIO_COPY_PAGES) {</div><div class='del'>-		/* FIXME alloc_page is good enough for now, but actually needs</div><div class='del'>-		 * to use pre-allocated page pool */</div><div class='ctx'> 		void *src, *dest;</div><div class='del'>-		page = alloc_page(__GFP_HIGHMEM|__GFP_WAIT);</div><div class='add'>+		page = mempool_alloc(drbd_md_io_page_pool, __GFP_HIGHMEM|__GFP_WAIT);</div><div class='ctx'> 		dest = kmap_atomic(page);</div><div class='ctx'> 		src = kmap_atomic(b-&gt;bm_pages[page_nr]);</div><div class='ctx'> 		memcpy(dest, src, PAGE_SIZE);</div><div class='hunk'>@@ -981,6 +989,8 @@ static void bm_page_io_async(struct bm_aio_ctx *ctx, int page_nr, int rw) __must</div><div class='ctx'> </div><div class='ctx'> 	bio-&gt;bi_bdev = mdev-&gt;ldev-&gt;md_bdev;</div><div class='ctx'> 	bio-&gt;bi_sector = on_disk_sector;</div><div class='add'>+	/* bio_add_page of a single page to an empty bio will always succeed,</div><div class='add'>+	 * according to api.  Do we want to assert that? */</div><div class='ctx'> 	bio_add_page(bio, page, len, 0);</div><div class='ctx'> 	bio-&gt;bi_private = ctx;</div><div class='ctx'> 	bio-&gt;bi_end_io = bm_async_io_complete;</div><div class='hunk'>@@ -999,14 +1009,9 @@ static void bm_page_io_async(struct bm_aio_ctx *ctx, int page_nr, int rw) __must</div><div class='ctx'> /*</div><div class='ctx'>  * bm_rw: read/write the whole bitmap from/to its on disk location.</div><div class='ctx'>  */</div><div class='del'>-static int bm_rw(struct drbd_conf *mdev, int rw, unsigned lazy_writeout_upper_idx) __must_hold(local)</div><div class='add'>+static int bm_rw(struct drbd_conf *mdev, int rw, unsigned flags, unsigned lazy_writeout_upper_idx) __must_hold(local)</div><div class='ctx'> {</div><div class='del'>-	struct bm_aio_ctx ctx = {</div><div class='del'>-		.mdev = mdev,</div><div class='del'>-		.in_flight = ATOMIC_INIT(1),</div><div class='del'>-		.done = COMPLETION_INITIALIZER_ONSTACK(ctx.done),</div><div class='del'>-		.flags = lazy_writeout_upper_idx ? BM_AIO_COPY_PAGES : 0,</div><div class='del'>-	};</div><div class='add'>+	struct bm_aio_ctx *ctx;</div><div class='ctx'> 	struct drbd_bitmap *b = mdev-&gt;bitmap;</div><div class='ctx'> 	int num_pages, i, count = 0;</div><div class='ctx'> 	unsigned long now;</div><div class='hunk'>@@ -1021,7 +1026,27 @@ static int bm_rw(struct drbd_conf *mdev, int rw, unsigned lazy_writeout_upper_id</div><div class='ctx'> 	 * For lazy writeout, we don't care for ongoing changes to the bitmap,</div><div class='ctx'> 	 * as we submit copies of pages anyways.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!ctx.flags)</div><div class='add'>+</div><div class='add'>+	ctx = kmalloc(sizeof(struct bm_aio_ctx), GFP_NOIO);</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	*ctx = (struct bm_aio_ctx) {</div><div class='add'>+		.mdev = mdev,</div><div class='add'>+		.in_flight = ATOMIC_INIT(1),</div><div class='add'>+		.done = 0,</div><div class='add'>+		.flags = flags,</div><div class='add'>+		.error = 0,</div><div class='add'>+		.kref = { ATOMIC_INIT(2) },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (!get_ldev_if_state(mdev, D_ATTACHING)) {  /* put is in bm_aio_ctx_destroy() */</div><div class='add'>+		dev_err(DEV, "ASSERT FAILED: get_ldev_if_state() == 1 in bm_rw()\n");</div><div class='add'>+		kfree(ctx);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ctx-&gt;flags)</div><div class='ctx'> 		WARN_ON(!(BM_LOCKED_MASK &amp; b-&gt;bm_flags));</div><div class='ctx'> </div><div class='ctx'> 	num_pages = b-&gt;bm_number_of_pages;</div><div class='hunk'>@@ -1046,29 +1071,38 @@ static int bm_rw(struct drbd_conf *mdev, int rw, unsigned lazy_writeout_upper_id</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		atomic_inc(&amp;ctx.in_flight);</div><div class='del'>-		bm_page_io_async(&amp;ctx, i, rw);</div><div class='add'>+		atomic_inc(&amp;ctx-&gt;in_flight);</div><div class='add'>+		bm_page_io_async(ctx, i, rw);</div><div class='ctx'> 		++count;</div><div class='ctx'> 		cond_resched();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * We initialize ctx.in_flight to one to make sure bm_async_io_complete</div><div class='del'>-	 * will not complete() early, and decrement / test it here.  If there</div><div class='add'>+	 * We initialize ctx-&gt;in_flight to one to make sure bm_async_io_complete</div><div class='add'>+	 * will not set ctx-&gt;done early, and decrement / test it here.  If there</div><div class='ctx'> 	 * are still some bios in flight, we need to wait for them here.</div><div class='add'>+	 * If all IO is done already (or nothing had been submitted), there is</div><div class='add'>+	 * no need to wait.  Still, we need to put the kref associated with the</div><div class='add'>+	 * "in_flight reached zero, all done" event.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!atomic_dec_and_test(&amp;ctx.in_flight))</div><div class='del'>-		wait_for_completion(&amp;ctx.done);</div><div class='add'>+	if (!atomic_dec_and_test(&amp;ctx-&gt;in_flight))</div><div class='add'>+		wait_until_done_or_disk_failure(mdev, mdev-&gt;ldev, &amp;ctx-&gt;done);</div><div class='add'>+	else</div><div class='add'>+		kref_put(&amp;ctx-&gt;kref, &amp;bm_aio_ctx_destroy);</div><div class='add'>+</div><div class='ctx'> 	dev_info(DEV, "bitmap %s of %u pages took %lu jiffies\n",</div><div class='ctx'> 			rw == WRITE ? "WRITE" : "READ",</div><div class='ctx'> 			count, jiffies - now);</div><div class='ctx'> </div><div class='del'>-	if (ctx.error) {</div><div class='add'>+	if (ctx-&gt;error) {</div><div class='ctx'> 		dev_alert(DEV, "we had at least one MD IO ERROR during bitmap IO\n");</div><div class='ctx'> 		drbd_chk_io_error(mdev, 1, true);</div><div class='del'>-		err = -EIO; /* ctx.error ? */</div><div class='add'>+		err = -EIO; /* ctx-&gt;error ? */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (atomic_read(&amp;ctx-&gt;in_flight))</div><div class='add'>+		err = -EIO; /* Disk failed during IO... */</div><div class='add'>+</div><div class='ctx'> 	now = jiffies;</div><div class='ctx'> 	if (rw == WRITE) {</div><div class='ctx'> 		drbd_md_flush(mdev);</div><div class='hunk'>@@ -1082,6 +1116,7 @@ static int bm_rw(struct drbd_conf *mdev, int rw, unsigned lazy_writeout_upper_id</div><div class='ctx'> 	dev_info(DEV, "%s (%lu bits) marked out-of-sync by on disk bit-map.\n",</div><div class='ctx'> 	     ppsize(ppb, now &lt;&lt; (BM_BLOCK_SHIFT-10)), now);</div><div class='ctx'> </div><div class='add'>+	kref_put(&amp;ctx-&gt;kref, &amp;bm_aio_ctx_destroy);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1091,7 +1126,7 @@ static int bm_rw(struct drbd_conf *mdev, int rw, unsigned lazy_writeout_upper_id</div><div class='ctx'>  */</div><div class='ctx'> int drbd_bm_read(struct drbd_conf *mdev) __must_hold(local)</div><div class='ctx'> {</div><div class='del'>-	return bm_rw(mdev, READ, 0);</div><div class='add'>+	return bm_rw(mdev, READ, 0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1102,7 +1137,7 @@ int drbd_bm_read(struct drbd_conf *mdev) __must_hold(local)</div><div class='ctx'>  */</div><div class='ctx'> int drbd_bm_write(struct drbd_conf *mdev) __must_hold(local)</div><div class='ctx'> {</div><div class='del'>-	return bm_rw(mdev, WRITE, 0);</div><div class='add'>+	return bm_rw(mdev, WRITE, 0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1112,7 +1147,23 @@ int drbd_bm_write(struct drbd_conf *mdev) __must_hold(local)</div><div class='ctx'>  */</div><div class='ctx'> int drbd_bm_write_lazy(struct drbd_conf *mdev, unsigned upper_idx) __must_hold(local)</div><div class='ctx'> {</div><div class='del'>-	return bm_rw(mdev, WRITE, upper_idx);</div><div class='add'>+	return bm_rw(mdev, WRITE, BM_AIO_COPY_PAGES, upper_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drbd_bm_write_copy_pages() - Write the whole bitmap to its on disk location.</div><div class='add'>+ * @mdev:	DRBD device.</div><div class='add'>+ *</div><div class='add'>+ * Will only write pages that have changed since last IO.</div><div class='add'>+ * In contrast to drbd_bm_write(), this will copy the bitmap pages</div><div class='add'>+ * to temporary writeout pages. It is intended to trigger a full write-out</div><div class='add'>+ * while still allowing the bitmap to change, for example if a resync or online</div><div class='add'>+ * verify is aborted due to a failed peer disk, while local IO continues, or</div><div class='add'>+ * pending resync acks are still being processed.</div><div class='add'>+ */</div><div class='add'>+int drbd_bm_write_copy_pages(struct drbd_conf *mdev) __must_hold(local)</div><div class='add'>+{</div><div class='add'>+	return bm_rw(mdev, WRITE, BM_AIO_COPY_PAGES, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1130,28 +1181,45 @@ int drbd_bm_write_lazy(struct drbd_conf *mdev, unsigned upper_idx) __must_hold(l</div><div class='ctx'>  */</div><div class='ctx'> int drbd_bm_write_page(struct drbd_conf *mdev, unsigned int idx) __must_hold(local)</div><div class='ctx'> {</div><div class='del'>-	struct bm_aio_ctx ctx = {</div><div class='add'>+	struct bm_aio_ctx *ctx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (bm_test_page_unchanged(mdev-&gt;bitmap-&gt;bm_pages[idx])) {</div><div class='add'>+		dynamic_dev_dbg(DEV, "skipped bm page write for idx %u\n", idx);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx = kmalloc(sizeof(struct bm_aio_ctx), GFP_NOIO);</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	*ctx = (struct bm_aio_ctx) {</div><div class='ctx'> 		.mdev = mdev,</div><div class='ctx'> 		.in_flight = ATOMIC_INIT(1),</div><div class='del'>-		.done = COMPLETION_INITIALIZER_ONSTACK(ctx.done),</div><div class='add'>+		.done = 0,</div><div class='ctx'> 		.flags = BM_AIO_COPY_PAGES,</div><div class='add'>+		.error = 0,</div><div class='add'>+		.kref = { ATOMIC_INIT(2) },</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	if (bm_test_page_unchanged(mdev-&gt;bitmap-&gt;bm_pages[idx])) {</div><div class='del'>-		dynamic_dev_dbg(DEV, "skipped bm page write for idx %u\n", idx);</div><div class='del'>-		return 0;</div><div class='add'>+	if (!get_ldev_if_state(mdev, D_ATTACHING)) {  /* put is in bm_aio_ctx_destroy() */</div><div class='add'>+		dev_err(DEV, "ASSERT FAILED: get_ldev_if_state() == 1 in drbd_bm_write_page()\n");</div><div class='add'>+		kfree(ctx);</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bm_page_io_async(&amp;ctx, idx, WRITE_SYNC);</div><div class='del'>-	wait_for_completion(&amp;ctx.done);</div><div class='add'>+	bm_page_io_async(ctx, idx, WRITE_SYNC);</div><div class='add'>+	wait_until_done_or_disk_failure(mdev, mdev-&gt;ldev, &amp;ctx-&gt;done);</div><div class='ctx'> </div><div class='del'>-	if (ctx.error)</div><div class='add'>+	if (ctx-&gt;error)</div><div class='ctx'> 		drbd_chk_io_error(mdev, 1, true);</div><div class='ctx'> 		/* that should force detach, so the in memory bitmap will be</div><div class='ctx'> 		 * gone in a moment as well. */</div><div class='ctx'> </div><div class='ctx'> 	mdev-&gt;bm_writ_cnt++;</div><div class='del'>-	return ctx.error;</div><div class='add'>+	err = atomic_read(&amp;ctx-&gt;in_flight) ? -EIO : ctx-&gt;error;</div><div class='add'>+	kref_put(&amp;ctx-&gt;kref, &amp;bm_aio_ctx_destroy);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* NOTE</div><div class='head'>diff --git a/drivers/block/drbd/drbd_int.h b/drivers/block/drbd/drbd_int.h<br/>index 8d680562ba73..02f013a073a7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/drbd/drbd_int.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/drbd/drbd_int.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/drbd/drbd_int.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_int.h</a></div><div class='hunk'>@@ -712,7 +712,6 @@ struct drbd_request {</div><div class='ctx'> 	struct list_head tl_requests; /* ring list in the transfer log */</div><div class='ctx'> 	struct bio *master_bio;       /* master bio pointer */</div><div class='ctx'> 	unsigned long rq_state; /* see comments above _req_mod() */</div><div class='del'>-	int seq_num;</div><div class='ctx'> 	unsigned long start_time;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -851,6 +850,7 @@ enum {</div><div class='ctx'> 	NEW_CUR_UUID,		/* Create new current UUID when thawing IO */</div><div class='ctx'> 	AL_SUSPENDED,		/* Activity logging is currently suspended. */</div><div class='ctx'> 	AHEAD_TO_SYNC_SOURCE,   /* Ahead -&gt; SyncSource queued */</div><div class='add'>+	STATE_SENT,		/* Do not change state/UUIDs while this is set */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct drbd_bitmap; /* opaque for drbd_conf */</div><div class='hunk'>@@ -862,31 +862,30 @@ enum bm_flag {</div><div class='ctx'> 	BM_P_VMALLOCED = 0x10000, /* internal use only, will be masked out */</div><div class='ctx'> </div><div class='ctx'> 	/* currently locked for bulk operation */</div><div class='del'>-	BM_LOCKED_MASK = 0x7,</div><div class='add'>+	BM_LOCKED_MASK = 0xf,</div><div class='ctx'> </div><div class='ctx'> 	/* in detail, that is: */</div><div class='ctx'> 	BM_DONT_CLEAR = 0x1,</div><div class='ctx'> 	BM_DONT_SET   = 0x2,</div><div class='ctx'> 	BM_DONT_TEST  = 0x4,</div><div class='ctx'> </div><div class='add'>+	/* so we can mark it locked for bulk operation,</div><div class='add'>+	 * and still allow all non-bulk operations */</div><div class='add'>+	BM_IS_LOCKED  = 0x8,</div><div class='add'>+</div><div class='ctx'> 	/* (test bit, count bit) allowed (common case) */</div><div class='del'>-	BM_LOCKED_TEST_ALLOWED = 0x3,</div><div class='add'>+	BM_LOCKED_TEST_ALLOWED = BM_DONT_CLEAR | BM_DONT_SET | BM_IS_LOCKED,</div><div class='ctx'> </div><div class='ctx'> 	/* testing bits, as well as setting new bits allowed, but clearing bits</div><div class='ctx'> 	 * would be unexpected.  Used during bitmap receive.  Setting new bits</div><div class='ctx'> 	 * requires sending of "out-of-sync" information, though. */</div><div class='del'>-	BM_LOCKED_SET_ALLOWED = 0x1,</div><div class='add'>+	BM_LOCKED_SET_ALLOWED = BM_DONT_CLEAR | BM_IS_LOCKED,</div><div class='ctx'> </div><div class='del'>-	/* clear is not expected while bitmap is locked for bulk operation */</div><div class='add'>+	/* for drbd_bm_write_copy_pages, everything is allowed,</div><div class='add'>+	 * only concurrent bulk operations are locked out. */</div><div class='add'>+	BM_LOCKED_CHANGE_ALLOWED = BM_IS_LOCKED,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* TODO sort members for performance</div><div class='del'>- * MAYBE group them further */</div><div class='del'>-</div><div class='del'>-/* THINK maybe we actually want to use the default "event/%s" worker threads</div><div class='del'>- * or similar in linux 2.6, which uses per cpu data and threads.</div><div class='del'>- */</div><div class='ctx'> struct drbd_work_queue {</div><div class='ctx'> 	struct list_head q;</div><div class='ctx'> 	struct semaphore s; /* producers up it, worker down()s it */</div><div class='hunk'>@@ -938,8 +937,7 @@ struct drbd_backing_dev {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct drbd_md_io {</div><div class='del'>-	struct drbd_conf *mdev;</div><div class='del'>-	struct completion event;</div><div class='add'>+	unsigned int done;</div><div class='ctx'> 	int error;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1022,6 +1020,7 @@ struct drbd_conf {</div><div class='ctx'> 	struct drbd_tl_epoch *newest_tle;</div><div class='ctx'> 	struct drbd_tl_epoch *oldest_tle;</div><div class='ctx'> 	struct list_head out_of_sequence_requests;</div><div class='add'>+	struct list_head barrier_acked_requests;</div><div class='ctx'> 	struct hlist_head *tl_hash;</div><div class='ctx'> 	unsigned int tl_hash_s;</div><div class='ctx'> </div><div class='hunk'>@@ -1056,6 +1055,8 @@ struct drbd_conf {</div><div class='ctx'> 	struct crypto_hash *csums_tfm;</div><div class='ctx'> 	struct crypto_hash *verify_tfm;</div><div class='ctx'> </div><div class='add'>+	unsigned long last_reattach_jif;</div><div class='add'>+	unsigned long last_reconnect_jif;</div><div class='ctx'> 	struct drbd_thread receiver;</div><div class='ctx'> 	struct drbd_thread worker;</div><div class='ctx'> 	struct drbd_thread asender;</div><div class='hunk'>@@ -1094,7 +1095,8 @@ struct drbd_conf {</div><div class='ctx'> 	wait_queue_head_t ee_wait;</div><div class='ctx'> 	struct page *md_io_page;	/* one page buffer for md_io */</div><div class='ctx'> 	struct page *md_io_tmpp;	/* for logical_block_size != 512 */</div><div class='del'>-	struct mutex md_io_mutex;	/* protects the md_io_buffer */</div><div class='add'>+	struct drbd_md_io md_io;</div><div class='add'>+	atomic_t md_io_in_use;		/* protects the md_io, md_io_page and md_io_tmpp */</div><div class='ctx'> 	spinlock_t al_lock;</div><div class='ctx'> 	wait_queue_head_t al_wait;</div><div class='ctx'> 	struct lru_cache *act_log;	/* activity log */</div><div class='hunk'>@@ -1228,8 +1230,8 @@ extern int drbd_send_uuids(struct drbd_conf *mdev);</div><div class='ctx'> extern int drbd_send_uuids_skip_initial_sync(struct drbd_conf *mdev);</div><div class='ctx'> extern int drbd_gen_and_send_sync_uuid(struct drbd_conf *mdev);</div><div class='ctx'> extern int drbd_send_sizes(struct drbd_conf *mdev, int trigger_reply, enum dds_flags flags);</div><div class='del'>-extern int _drbd_send_state(struct drbd_conf *mdev);</div><div class='del'>-extern int drbd_send_state(struct drbd_conf *mdev);</div><div class='add'>+extern int drbd_send_state(struct drbd_conf *mdev, union drbd_state s);</div><div class='add'>+extern int drbd_send_current_state(struct drbd_conf *mdev);</div><div class='ctx'> extern int _drbd_send_cmd(struct drbd_conf *mdev, struct socket *sock,</div><div class='ctx'> 			enum drbd_packets cmd, struct p_header80 *h,</div><div class='ctx'> 			size_t size, unsigned msg_flags);</div><div class='hunk'>@@ -1461,6 +1463,7 @@ extern int  drbd_bm_e_weight(struct drbd_conf *mdev, unsigned long enr);</div><div class='ctx'> extern int  drbd_bm_write_page(struct drbd_conf *mdev, unsigned int idx) __must_hold(local);</div><div class='ctx'> extern int  drbd_bm_read(struct drbd_conf *mdev) __must_hold(local);</div><div class='ctx'> extern int  drbd_bm_write(struct drbd_conf *mdev) __must_hold(local);</div><div class='add'>+extern int  drbd_bm_write_copy_pages(struct drbd_conf *mdev) __must_hold(local);</div><div class='ctx'> extern unsigned long drbd_bm_ALe_set_all(struct drbd_conf *mdev,</div><div class='ctx'> 		unsigned long al_enr);</div><div class='ctx'> extern size_t	     drbd_bm_words(struct drbd_conf *mdev);</div><div class='hunk'>@@ -1493,11 +1496,38 @@ extern struct kmem_cache *drbd_al_ext_cache;	/* activity log extents */</div><div class='ctx'> extern mempool_t *drbd_request_mempool;</div><div class='ctx'> extern mempool_t *drbd_ee_mempool;</div><div class='ctx'> </div><div class='del'>-extern struct page *drbd_pp_pool; /* drbd's page pool */</div><div class='add'>+/* drbd's page pool, used to buffer data received from the peer,</div><div class='add'>+ * or data requested by the peer.</div><div class='add'>+ *</div><div class='add'>+ * This does not have an emergency reserve.</div><div class='add'>+ *</div><div class='add'>+ * When allocating from this pool, it first takes pages from the pool.</div><div class='add'>+ * Only if the pool is depleted will try to allocate from the system.</div><div class='add'>+ *</div><div class='add'>+ * The assumption is that pages taken from this pool will be processed,</div><div class='add'>+ * and given back, "quickly", and then can be recycled, so we can avoid</div><div class='add'>+ * frequent calls to alloc_page(), and still will be able to make progress even</div><div class='add'>+ * under memory pressure.</div><div class='add'>+ */</div><div class='add'>+extern struct page *drbd_pp_pool;</div><div class='ctx'> extern spinlock_t   drbd_pp_lock;</div><div class='ctx'> extern int	    drbd_pp_vacant;</div><div class='ctx'> extern wait_queue_head_t drbd_pp_wait;</div><div class='ctx'> </div><div class='add'>+/* We also need a standard (emergency-reserve backed) page pool</div><div class='add'>+ * for meta data IO (activity log, bitmap).</div><div class='add'>+ * We can keep it global, as long as it is used as "N pages at a time".</div><div class='add'>+ * 128 should be plenty, currently we probably can get away with as few as 1.</div><div class='add'>+ */</div><div class='add'>+#define DRBD_MIN_POOL_PAGES	128</div><div class='add'>+extern mempool_t *drbd_md_io_page_pool;</div><div class='add'>+</div><div class='add'>+/* We also need to make sure we get a bio</div><div class='add'>+ * when we need it for housekeeping purposes */</div><div class='add'>+extern struct bio_set *drbd_md_io_bio_set;</div><div class='add'>+/* to allocate from that set */</div><div class='add'>+extern struct bio *bio_alloc_drbd(gfp_t gfp_mask);</div><div class='add'>+</div><div class='ctx'> extern rwlock_t global_state_lock;</div><div class='ctx'> </div><div class='ctx'> extern struct drbd_conf *drbd_new_device(unsigned int minor);</div><div class='hunk'>@@ -1536,8 +1566,12 @@ extern void resume_next_sg(struct drbd_conf *mdev);</div><div class='ctx'> extern void suspend_other_sg(struct drbd_conf *mdev);</div><div class='ctx'> extern int drbd_resync_finished(struct drbd_conf *mdev);</div><div class='ctx'> /* maybe rather drbd_main.c ? */</div><div class='add'>+extern void *drbd_md_get_buffer(struct drbd_conf *mdev);</div><div class='add'>+extern void drbd_md_put_buffer(struct drbd_conf *mdev);</div><div class='ctx'> extern int drbd_md_sync_page_io(struct drbd_conf *mdev,</div><div class='del'>-		struct drbd_backing_dev *bdev, sector_t sector, int rw);</div><div class='add'>+				struct drbd_backing_dev *bdev, sector_t sector, int rw);</div><div class='add'>+extern void wait_until_done_or_disk_failure(struct drbd_conf *mdev, struct drbd_backing_dev *bdev,</div><div class='add'>+					    unsigned int *done);</div><div class='ctx'> extern void drbd_ov_oos_found(struct drbd_conf*, sector_t, int);</div><div class='ctx'> extern void drbd_rs_controller_reset(struct drbd_conf *mdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1754,19 +1788,6 @@ static inline struct page *page_chain_next(struct page *page)</div><div class='ctx'> #define page_chain_for_each_safe(page, n) \</div><div class='ctx'> 	for (; page &amp;&amp; ({ n = page_chain_next(page); 1; }); page = n)</div><div class='ctx'> </div><div class='del'>-static inline int drbd_bio_has_active_page(struct bio *bio)</div><div class='del'>-{</div><div class='del'>-	struct bio_vec *bvec;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	__bio_for_each_segment(bvec, bio, i, 0) {</div><div class='del'>-		if (page_count(bvec-&gt;bv_page) &gt; 1)</div><div class='del'>-			return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline int drbd_ee_has_active_page(struct drbd_epoch_entry *e)</div><div class='ctx'> {</div><div class='ctx'> 	struct page *page = e-&gt;pages;</div><div class='hunk'>@@ -1777,7 +1798,6 @@ static inline int drbd_ee_has_active_page(struct drbd_epoch_entry *e)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static inline void drbd_state_lock(struct drbd_conf *mdev)</div><div class='ctx'> {</div><div class='ctx'> 	wait_event(mdev-&gt;misc_wait,</div><div class='hunk'>@@ -2230,7 +2250,7 @@ static inline void drbd_get_syncer_progress(struct drbd_conf *mdev,</div><div class='ctx'> 		 * Note: currently we don't support such large bitmaps on 32bit</div><div class='ctx'> 		 * arch anyways, but no harm done to be prepared for it here.</div><div class='ctx'> 		 */</div><div class='del'>-		unsigned int shift = mdev-&gt;rs_total &gt;= (1ULL &lt;&lt; 32) ? 16 : 10;</div><div class='add'>+		unsigned int shift = mdev-&gt;rs_total &gt; UINT_MAX ? 16 : 10;</div><div class='ctx'> 		unsigned long left = *bits_left &gt;&gt; shift;</div><div class='ctx'> 		unsigned long total = 1UL + (mdev-&gt;rs_total &gt;&gt; shift);</div><div class='ctx'> 		unsigned long tmp = 1000UL - left * 1000UL/total;</div><div class='hunk'>@@ -2306,12 +2326,12 @@ static inline int drbd_state_is_stable(struct drbd_conf *mdev)</div><div class='ctx'> 	case D_OUTDATED:</div><div class='ctx'> 	case D_CONSISTENT:</div><div class='ctx'> 	case D_UP_TO_DATE:</div><div class='add'>+	case D_FAILED:</div><div class='ctx'> 		/* disk state is stable as well. */</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	/* no new io accepted during tansitional states */</div><div class='ctx'> 	case D_ATTACHING:</div><div class='del'>-	case D_FAILED:</div><div class='ctx'> 	case D_NEGOTIATING:</div><div class='ctx'> 	case D_UNKNOWN:</div><div class='ctx'> 	case D_MASK:</div><div class='head'>diff --git a/drivers/block/drbd/drbd_main.c b/drivers/block/drbd/drbd_main.c<br/>index 211fc44f84be..920ede2829d6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/drbd/drbd_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/drbd/drbd_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/drbd/drbd_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_main.c</a></div><div class='hunk'>@@ -139,6 +139,8 @@ struct kmem_cache *drbd_bm_ext_cache;	/* bitmap extents */</div><div class='ctx'> struct kmem_cache *drbd_al_ext_cache;	/* activity log extents */</div><div class='ctx'> mempool_t *drbd_request_mempool;</div><div class='ctx'> mempool_t *drbd_ee_mempool;</div><div class='add'>+mempool_t *drbd_md_io_page_pool;</div><div class='add'>+struct bio_set *drbd_md_io_bio_set;</div><div class='ctx'> </div><div class='ctx'> /* I do not use a standard mempool, because:</div><div class='ctx'>    1) I want to hand out the pre-allocated objects first.</div><div class='hunk'>@@ -159,7 +161,24 @@ static const struct block_device_operations drbd_ops = {</div><div class='ctx'> 	.release = drbd_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define ARRY_SIZE(A) (sizeof(A)/sizeof(A[0]))</div><div class='add'>+static void bio_destructor_drbd(struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	bio_free(bio, drbd_md_io_bio_set);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct bio *bio_alloc_drbd(gfp_t gfp_mask)</div><div class='add'>+{</div><div class='add'>+	struct bio *bio;</div><div class='add'>+</div><div class='add'>+	if (!drbd_md_io_bio_set)</div><div class='add'>+		return bio_alloc(gfp_mask, 1);</div><div class='add'>+</div><div class='add'>+	bio = bio_alloc_bioset(gfp_mask, 1, drbd_md_io_bio_set);</div><div class='add'>+	if (!bio)</div><div class='add'>+		return NULL;</div><div class='add'>+	bio-&gt;bi_destructor = bio_destructor_drbd;</div><div class='add'>+	return bio;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #ifdef __CHECKER__</div><div class='ctx'> /* When checking with sparse, and this is an inline function, sparse will</div><div class='hunk'>@@ -208,6 +227,7 @@ static int tl_init(struct drbd_conf *mdev)</div><div class='ctx'> 	mdev-&gt;oldest_tle = b;</div><div class='ctx'> 	mdev-&gt;newest_tle = b;</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;mdev-&gt;out_of_sequence_requests);</div><div class='add'>+	INIT_LIST_HEAD(&amp;mdev-&gt;barrier_acked_requests);</div><div class='ctx'> </div><div class='ctx'> 	mdev-&gt;tl_hash = NULL;</div><div class='ctx'> 	mdev-&gt;tl_hash_s = 0;</div><div class='hunk'>@@ -246,9 +266,7 @@ void _tl_add_barrier(struct drbd_conf *mdev, struct drbd_tl_epoch *new)</div><div class='ctx'> 	new-&gt;n_writes = 0;</div><div class='ctx'> </div><div class='ctx'> 	newest_before = mdev-&gt;newest_tle;</div><div class='del'>-	/* never send a barrier number == 0, because that is special-cased</div><div class='del'>-	 * when using TCQ for our write ordering code */</div><div class='del'>-	new-&gt;br_number = (newest_before-&gt;br_number+1) ?: 1;</div><div class='add'>+	new-&gt;br_number = newest_before-&gt;br_number+1;</div><div class='ctx'> 	if (mdev-&gt;newest_tle != new) {</div><div class='ctx'> 		mdev-&gt;newest_tle-&gt;next = new;</div><div class='ctx'> 		mdev-&gt;newest_tle = new;</div><div class='hunk'>@@ -311,7 +329,7 @@ void tl_release(struct drbd_conf *mdev, unsigned int barrier_nr,</div><div class='ctx'> 	   These have been list_move'd to the out_of_sequence_requests list in</div><div class='ctx'> 	   _req_mod(, barrier_acked) above.</div><div class='ctx'> 	   */</div><div class='del'>-	list_del_init(&amp;b-&gt;requests);</div><div class='add'>+	list_splice_init(&amp;b-&gt;requests, &amp;mdev-&gt;barrier_acked_requests);</div><div class='ctx'> </div><div class='ctx'> 	nob = b-&gt;next;</div><div class='ctx'> 	if (test_and_clear_bit(CREATE_BARRIER, &amp;mdev-&gt;flags)) {</div><div class='hunk'>@@ -411,6 +429,23 @@ static void _tl_restart(struct drbd_conf *mdev, enum drbd_req_event what)</div><div class='ctx'> 		b = tmp;</div><div class='ctx'> 		list_splice(&amp;carry_reads, &amp;b-&gt;requests);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* Actions operating on the disk state, also want to work on</div><div class='add'>+	   requests that got barrier acked. */</div><div class='add'>+	switch (what) {</div><div class='add'>+	case fail_frozen_disk_io:</div><div class='add'>+	case restart_frozen_disk_io:</div><div class='add'>+		list_for_each_safe(le, tle, &amp;mdev-&gt;barrier_acked_requests) {</div><div class='add'>+			req = list_entry(le, struct drbd_request, tl_requests);</div><div class='add'>+			_req_mod(req, what);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	case connection_lost_while_pending:</div><div class='add'>+	case resend:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(DEV, "what = %d in _tl_restart()\n", what);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -458,6 +493,38 @@ void tl_restart(struct drbd_conf *mdev, enum drbd_req_event what)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * tl_abort_disk_io() - Abort disk I/O for all requests for a certain mdev in the TL</div><div class='add'>+ * @mdev:	DRBD device.</div><div class='add'>+ */</div><div class='add'>+void tl_abort_disk_io(struct drbd_conf *mdev)</div><div class='add'>+{</div><div class='add'>+	struct drbd_tl_epoch *b;</div><div class='add'>+	struct list_head *le, *tle;</div><div class='add'>+	struct drbd_request *req;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;mdev-&gt;req_lock);</div><div class='add'>+	b = mdev-&gt;oldest_tle;</div><div class='add'>+	while (b) {</div><div class='add'>+		list_for_each_safe(le, tle, &amp;b-&gt;requests) {</div><div class='add'>+			req = list_entry(le, struct drbd_request, tl_requests);</div><div class='add'>+			if (!(req-&gt;rq_state &amp; RQ_LOCAL_PENDING))</div><div class='add'>+				continue;</div><div class='add'>+			_req_mod(req, abort_disk_io);</div><div class='add'>+		}</div><div class='add'>+		b = b-&gt;next;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	list_for_each_safe(le, tle, &amp;mdev-&gt;barrier_acked_requests) {</div><div class='add'>+		req = list_entry(le, struct drbd_request, tl_requests);</div><div class='add'>+		if (!(req-&gt;rq_state &amp; RQ_LOCAL_PENDING))</div><div class='add'>+			continue;</div><div class='add'>+		_req_mod(req, abort_disk_io);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;mdev-&gt;req_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * cl_wide_st_chg() - true if the state change is a cluster wide one</div><div class='ctx'>  * @mdev:	DRBD device.</div><div class='ctx'>  * @os:		old (current) state.</div><div class='hunk'>@@ -470,7 +537,7 @@ static int cl_wide_st_chg(struct drbd_conf *mdev,</div><div class='ctx'> 		 ((os.role != R_PRIMARY &amp;&amp; ns.role == R_PRIMARY) ||</div><div class='ctx'> 		  (os.conn != C_STARTING_SYNC_T &amp;&amp; ns.conn == C_STARTING_SYNC_T) ||</div><div class='ctx'> 		  (os.conn != C_STARTING_SYNC_S &amp;&amp; ns.conn == C_STARTING_SYNC_S) ||</div><div class='del'>-		  (os.disk != D_DISKLESS &amp;&amp; ns.disk == D_DISKLESS))) ||</div><div class='add'>+		  (os.disk != D_FAILED &amp;&amp; ns.disk == D_FAILED))) ||</div><div class='ctx'> 		(os.conn &gt;= C_CONNECTED &amp;&amp; ns.conn == C_DISCONNECTING) ||</div><div class='ctx'> 		(os.conn == C_CONNECTED &amp;&amp; ns.conn == C_VERIFY_S);</div><div class='ctx'> }</div><div class='hunk'>@@ -509,8 +576,16 @@ static enum drbd_state_rv is_valid_state(struct drbd_conf *, union drbd_state);</div><div class='ctx'> static enum drbd_state_rv is_valid_state_transition(struct drbd_conf *,</div><div class='ctx'> 						    union drbd_state,</div><div class='ctx'> 						    union drbd_state);</div><div class='add'>+enum sanitize_state_warnings {</div><div class='add'>+	NO_WARNING,</div><div class='add'>+	ABORTED_ONLINE_VERIFY,</div><div class='add'>+	ABORTED_RESYNC,</div><div class='add'>+	CONNECTION_LOST_NEGOTIATING,</div><div class='add'>+	IMPLICITLY_UPGRADED_DISK,</div><div class='add'>+	IMPLICITLY_UPGRADED_PDSK,</div><div class='add'>+};</div><div class='ctx'> static union drbd_state sanitize_state(struct drbd_conf *mdev, union drbd_state os,</div><div class='del'>-				       union drbd_state ns, const char **warn_sync_abort);</div><div class='add'>+				       union drbd_state ns, enum sanitize_state_warnings *warn);</div><div class='ctx'> int drbd_send_state_req(struct drbd_conf *,</div><div class='ctx'> 			union drbd_state, union drbd_state);</div><div class='ctx'> </div><div class='hunk'>@@ -785,6 +860,13 @@ is_valid_state_transition(struct drbd_conf *mdev, union drbd_state ns,</div><div class='ctx'> 	if (ns.conn == os.conn &amp;&amp; ns.conn == C_WF_REPORT_PARAMS)</div><div class='ctx'> 		rv = SS_IN_TRANSIENT_STATE;</div><div class='ctx'> </div><div class='add'>+	/* While establishing a connection only allow cstate to change.</div><div class='add'>+	   Delay/refuse role changes, detach attach etc... */</div><div class='add'>+	if (test_bit(STATE_SENT, &amp;mdev-&gt;flags) &amp;&amp;</div><div class='add'>+	    !(os.conn == C_WF_REPORT_PARAMS ||</div><div class='add'>+	      (ns.conn == C_WF_REPORT_PARAMS &amp;&amp; os.conn == C_WF_CONNECTION)))</div><div class='add'>+		rv = SS_IN_TRANSIENT_STATE;</div><div class='add'>+</div><div class='ctx'> 	if ((ns.conn == C_VERIFY_S || ns.conn == C_VERIFY_T) &amp;&amp; os.conn &lt; C_CONNECTED)</div><div class='ctx'> 		rv = SS_NEED_CONNECTION;</div><div class='ctx'> </div><div class='hunk'>@@ -803,6 +885,21 @@ is_valid_state_transition(struct drbd_conf *mdev, union drbd_state ns,</div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void print_sanitize_warnings(struct drbd_conf *mdev, enum sanitize_state_warnings warn)</div><div class='add'>+{</div><div class='add'>+	static const char *msg_table[] = {</div><div class='add'>+		[NO_WARNING] = "",</div><div class='add'>+		[ABORTED_ONLINE_VERIFY] = "Online-verify aborted.",</div><div class='add'>+		[ABORTED_RESYNC] = "Resync aborted.",</div><div class='add'>+		[CONNECTION_LOST_NEGOTIATING] = "Connection lost while negotiating, no data!",</div><div class='add'>+		[IMPLICITLY_UPGRADED_DISK] = "Implicitly upgraded disk",</div><div class='add'>+		[IMPLICITLY_UPGRADED_PDSK] = "Implicitly upgraded pdsk",</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (warn != NO_WARNING)</div><div class='add'>+		dev_warn(DEV, "%s\n", msg_table[warn]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * sanitize_state() - Resolves implicitly necessary additional changes to a state transition</div><div class='ctx'>  * @mdev:	DRBD device.</div><div class='hunk'>@@ -814,11 +911,14 @@ is_valid_state_transition(struct drbd_conf *mdev, union drbd_state ns,</div><div class='ctx'>  * to D_UNKNOWN. This rule and many more along those lines are in this function.</div><div class='ctx'>  */</div><div class='ctx'> static union drbd_state sanitize_state(struct drbd_conf *mdev, union drbd_state os,</div><div class='del'>-				       union drbd_state ns, const char **warn_sync_abort)</div><div class='add'>+				       union drbd_state ns, enum sanitize_state_warnings *warn)</div><div class='ctx'> {</div><div class='ctx'> 	enum drbd_fencing_p fp;</div><div class='ctx'> 	enum drbd_disk_state disk_min, disk_max, pdsk_min, pdsk_max;</div><div class='ctx'> </div><div class='add'>+	if (warn)</div><div class='add'>+		*warn = NO_WARNING;</div><div class='add'>+</div><div class='ctx'> 	fp = FP_DONT_CARE;</div><div class='ctx'> 	if (get_ldev(mdev)) {</div><div class='ctx'> 		fp = mdev-&gt;ldev-&gt;dc.fencing;</div><div class='hunk'>@@ -833,18 +933,13 @@ static union drbd_state sanitize_state(struct drbd_conf *mdev, union drbd_state</div><div class='ctx'> 	/* After a network error (+C_TEAR_DOWN) only C_UNCONNECTED or C_DISCONNECTING can follow.</div><div class='ctx'> 	 * If you try to go into some Sync* state, that shall fail (elsewhere). */</div><div class='ctx'> 	if (os.conn &gt;= C_TIMEOUT &amp;&amp; os.conn &lt;= C_TEAR_DOWN &amp;&amp;</div><div class='del'>-	    ns.conn != C_UNCONNECTED &amp;&amp; ns.conn != C_DISCONNECTING &amp;&amp; ns.conn &lt;= C_TEAR_DOWN)</div><div class='add'>+	    ns.conn != C_UNCONNECTED &amp;&amp; ns.conn != C_DISCONNECTING &amp;&amp; ns.conn &lt;= C_CONNECTED)</div><div class='ctx'> 		ns.conn = os.conn;</div><div class='ctx'> </div><div class='ctx'> 	/* we cannot fail (again) if we already detached */</div><div class='ctx'> 	if (ns.disk == D_FAILED &amp;&amp; os.disk == D_DISKLESS)</div><div class='ctx'> 		ns.disk = D_DISKLESS;</div><div class='ctx'> </div><div class='del'>-	/* if we are only D_ATTACHING yet,</div><div class='del'>-	 * we can (and should) go directly to D_DISKLESS. */</div><div class='del'>-	if (ns.disk == D_FAILED &amp;&amp; os.disk == D_ATTACHING)</div><div class='del'>-		ns.disk = D_DISKLESS;</div><div class='del'>-</div><div class='ctx'> 	/* After C_DISCONNECTING only C_STANDALONE may follow */</div><div class='ctx'> 	if (os.conn == C_DISCONNECTING &amp;&amp; ns.conn != C_STANDALONE)</div><div class='ctx'> 		ns.conn = os.conn;</div><div class='hunk'>@@ -863,10 +958,9 @@ static union drbd_state sanitize_state(struct drbd_conf *mdev, union drbd_state</div><div class='ctx'> 	/* Abort resync if a disk fails/detaches */</div><div class='ctx'> 	if (os.conn &gt; C_CONNECTED &amp;&amp; ns.conn &gt; C_CONNECTED &amp;&amp;</div><div class='ctx'> 	    (ns.disk &lt;= D_FAILED || ns.pdsk &lt;= D_FAILED)) {</div><div class='del'>-		if (warn_sync_abort)</div><div class='del'>-			*warn_sync_abort =</div><div class='del'>-				os.conn == C_VERIFY_S || os.conn == C_VERIFY_T ?</div><div class='del'>-				"Online-verify" : "Resync";</div><div class='add'>+		if (warn)</div><div class='add'>+			*warn =	os.conn == C_VERIFY_S || os.conn == C_VERIFY_T ?</div><div class='add'>+				ABORTED_ONLINE_VERIFY : ABORTED_RESYNC;</div><div class='ctx'> 		ns.conn = C_CONNECTED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -877,7 +971,8 @@ static union drbd_state sanitize_state(struct drbd_conf *mdev, union drbd_state</div><div class='ctx'> 			ns.disk = mdev-&gt;new_state_tmp.disk;</div><div class='ctx'> 			ns.pdsk = mdev-&gt;new_state_tmp.pdsk;</div><div class='ctx'> 		} else {</div><div class='del'>-			dev_alert(DEV, "Connection lost while negotiating, no data!\n");</div><div class='add'>+			if (warn)</div><div class='add'>+				*warn = CONNECTION_LOST_NEGOTIATING;</div><div class='ctx'> 			ns.disk = D_DISKLESS;</div><div class='ctx'> 			ns.pdsk = D_UNKNOWN;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -959,16 +1054,16 @@ static union drbd_state sanitize_state(struct drbd_conf *mdev, union drbd_state</div><div class='ctx'> 		ns.disk = disk_max;</div><div class='ctx'> </div><div class='ctx'> 	if (ns.disk &lt; disk_min) {</div><div class='del'>-		dev_warn(DEV, "Implicitly set disk from %s to %s\n",</div><div class='del'>-			 drbd_disk_str(ns.disk), drbd_disk_str(disk_min));</div><div class='add'>+		if (warn)</div><div class='add'>+			*warn = IMPLICITLY_UPGRADED_DISK;</div><div class='ctx'> 		ns.disk = disk_min;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ns.pdsk &gt; pdsk_max)</div><div class='ctx'> 		ns.pdsk = pdsk_max;</div><div class='ctx'> </div><div class='ctx'> 	if (ns.pdsk &lt; pdsk_min) {</div><div class='del'>-		dev_warn(DEV, "Implicitly set pdsk from %s to %s\n",</div><div class='del'>-			 drbd_disk_str(ns.pdsk), drbd_disk_str(pdsk_min));</div><div class='add'>+		if (warn)</div><div class='add'>+			*warn = IMPLICITLY_UPGRADED_PDSK;</div><div class='ctx'> 		ns.pdsk = pdsk_min;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1045,12 +1140,12 @@ __drbd_set_state(struct drbd_conf *mdev, union drbd_state ns,</div><div class='ctx'> {</div><div class='ctx'> 	union drbd_state os;</div><div class='ctx'> 	enum drbd_state_rv rv = SS_SUCCESS;</div><div class='del'>-	const char *warn_sync_abort = NULL;</div><div class='add'>+	enum sanitize_state_warnings ssw;</div><div class='ctx'> 	struct after_state_chg_work *ascw;</div><div class='ctx'> </div><div class='ctx'> 	os = mdev-&gt;state;</div><div class='ctx'> </div><div class='del'>-	ns = sanitize_state(mdev, os, ns, &amp;warn_sync_abort);</div><div class='add'>+	ns = sanitize_state(mdev, os, ns, &amp;ssw);</div><div class='ctx'> </div><div class='ctx'> 	if (ns.i == os.i)</div><div class='ctx'> 		return SS_NOTHING_TO_DO;</div><div class='hunk'>@@ -1076,8 +1171,7 @@ __drbd_set_state(struct drbd_conf *mdev, union drbd_state ns,</div><div class='ctx'> 		return rv;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (warn_sync_abort)</div><div class='del'>-		dev_warn(DEV, "%s aborted.\n", warn_sync_abort);</div><div class='add'>+	print_sanitize_warnings(mdev, ssw);</div><div class='ctx'> </div><div class='ctx'> 	{</div><div class='ctx'> 	char *pbp, pb[300];</div><div class='hunk'>@@ -1243,7 +1337,7 @@ __drbd_set_state(struct drbd_conf *mdev, union drbd_state ns,</div><div class='ctx'> 		drbd_thread_stop_nowait(&amp;mdev-&gt;receiver);</div><div class='ctx'> </div><div class='ctx'> 	/* Upon network failure, we need to restart the receiver. */</div><div class='del'>-	if (os.conn &gt; C_TEAR_DOWN &amp;&amp;</div><div class='add'>+	if (os.conn &gt; C_WF_CONNECTION &amp;&amp;</div><div class='ctx'> 	    ns.conn &lt;= C_TEAR_DOWN &amp;&amp; ns.conn &gt;= C_TIMEOUT)</div><div class='ctx'> 		drbd_thread_restart_nowait(&amp;mdev-&gt;receiver);</div><div class='ctx'> </div><div class='hunk'>@@ -1251,6 +1345,15 @@ __drbd_set_state(struct drbd_conf *mdev, union drbd_state ns,</div><div class='ctx'> 	if (os.conn &lt; C_CONNECTED &amp;&amp; ns.conn &gt;= C_CONNECTED)</div><div class='ctx'> 		drbd_resume_al(mdev);</div><div class='ctx'> </div><div class='add'>+	/* remember last connect and attach times so request_timer_fn() won't</div><div class='add'>+	 * kill newly established sessions while we are still trying to thaw</div><div class='add'>+	 * previously frozen IO */</div><div class='add'>+	if (os.conn != C_WF_REPORT_PARAMS &amp;&amp; ns.conn == C_WF_REPORT_PARAMS)</div><div class='add'>+		mdev-&gt;last_reconnect_jif = jiffies;</div><div class='add'>+	if ((os.disk == D_ATTACHING || os.disk == D_NEGOTIATING) &amp;&amp;</div><div class='add'>+	    ns.disk &gt; D_NEGOTIATING)</div><div class='add'>+		mdev-&gt;last_reattach_jif = jiffies;</div><div class='add'>+</div><div class='ctx'> 	ascw = kmalloc(sizeof(*ascw), GFP_ATOMIC);</div><div class='ctx'> 	if (ascw) {</div><div class='ctx'> 		ascw-&gt;os = os;</div><div class='hunk'>@@ -1354,12 +1457,16 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,</div><div class='ctx'> 	/* Here we have the actions that are performed after a</div><div class='ctx'> 	   state change. This function might sleep */</div><div class='ctx'> </div><div class='add'>+	if (os.disk &lt;= D_NEGOTIATING &amp;&amp; ns.disk &gt; D_NEGOTIATING)</div><div class='add'>+		mod_timer(&amp;mdev-&gt;request_timer, jiffies + HZ);</div><div class='add'>+</div><div class='ctx'> 	nsm.i = -1;</div><div class='ctx'> 	if (ns.susp_nod) {</div><div class='ctx'> 		if (os.conn &lt; C_CONNECTED &amp;&amp; ns.conn &gt;= C_CONNECTED)</div><div class='ctx'> 			what = resend;</div><div class='ctx'> </div><div class='del'>-		if (os.disk == D_ATTACHING &amp;&amp; ns.disk &gt; D_ATTACHING)</div><div class='add'>+		if ((os.disk == D_ATTACHING || os.disk == D_NEGOTIATING) &amp;&amp;</div><div class='add'>+		    ns.disk &gt; D_NEGOTIATING)</div><div class='ctx'> 			what = restart_frozen_disk_io;</div><div class='ctx'> </div><div class='ctx'> 		if (what != nothing)</div><div class='hunk'>@@ -1408,7 +1515,7 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,</div><div class='ctx'> 	/* Do not change the order of the if above and the two below... */</div><div class='ctx'> 	if (os.pdsk == D_DISKLESS &amp;&amp; ns.pdsk &gt; D_DISKLESS) {      /* attach on the peer */</div><div class='ctx'> 		drbd_send_uuids(mdev);</div><div class='del'>-		drbd_send_state(mdev);</div><div class='add'>+		drbd_send_state(mdev, ns);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* No point in queuing send_bitmap if we don't have a connection</div><div class='ctx'> 	 * anymore, so check also the _current_ state, not only the new state</div><div class='hunk'>@@ -1441,11 +1548,11 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ns.pdsk &lt; D_INCONSISTENT &amp;&amp; get_ldev(mdev)) {</div><div class='del'>-		if (ns.peer == R_PRIMARY &amp;&amp; mdev-&gt;ldev-&gt;md.uuid[UI_BITMAP] == 0) {</div><div class='add'>+		if (os.peer == R_SECONDARY &amp;&amp; ns.peer == R_PRIMARY &amp;&amp;</div><div class='add'>+		    mdev-&gt;ldev-&gt;md.uuid[UI_BITMAP] == 0 &amp;&amp; ns.disk &gt;= D_UP_TO_DATE) {</div><div class='ctx'> 			drbd_uuid_new_current(mdev);</div><div class='ctx'> 			drbd_send_uuids(mdev);</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='ctx'> 		/* D_DISKLESS Peer becomes secondary */</div><div class='ctx'> 		if (os.peer == R_PRIMARY &amp;&amp; ns.peer == R_SECONDARY)</div><div class='ctx'> 			/* We may still be Primary ourselves.</div><div class='hunk'>@@ -1473,14 +1580,14 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,</div><div class='ctx'> 	    os.disk == D_ATTACHING &amp;&amp; ns.disk == D_NEGOTIATING) {</div><div class='ctx'> 		drbd_send_sizes(mdev, 0, 0);  /* to start sync... */</div><div class='ctx'> 		drbd_send_uuids(mdev);</div><div class='del'>-		drbd_send_state(mdev);</div><div class='add'>+		drbd_send_state(mdev, ns);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* We want to pause/continue resync, tell peer. */</div><div class='ctx'> 	if (ns.conn &gt;= C_CONNECTED &amp;&amp;</div><div class='ctx'> 	     ((os.aftr_isp != ns.aftr_isp) ||</div><div class='ctx'> 	      (os.user_isp != ns.user_isp)))</div><div class='del'>-		drbd_send_state(mdev);</div><div class='add'>+		drbd_send_state(mdev, ns);</div><div class='ctx'> </div><div class='ctx'> 	/* In case one of the isp bits got set, suspend other devices. */</div><div class='ctx'> 	if ((!os.aftr_isp &amp;&amp; !os.peer_isp &amp;&amp; !os.user_isp) &amp;&amp;</div><div class='hunk'>@@ -1490,10 +1597,10 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,</div><div class='ctx'> 	/* Make sure the peer gets informed about eventual state</div><div class='ctx'> 	   changes (ISP bits) while we were in WFReportParams. */</div><div class='ctx'> 	if (os.conn == C_WF_REPORT_PARAMS &amp;&amp; ns.conn &gt;= C_CONNECTED)</div><div class='del'>-		drbd_send_state(mdev);</div><div class='add'>+		drbd_send_state(mdev, ns);</div><div class='ctx'> </div><div class='ctx'> 	if (os.conn != C_AHEAD &amp;&amp; ns.conn == C_AHEAD)</div><div class='del'>-		drbd_send_state(mdev);</div><div class='add'>+		drbd_send_state(mdev, ns);</div><div class='ctx'> </div><div class='ctx'> 	/* We are in the progress to start a full sync... */</div><div class='ctx'> 	if ((os.conn != C_STARTING_SYNC_T &amp;&amp; ns.conn == C_STARTING_SYNC_T) ||</div><div class='hunk'>@@ -1513,33 +1620,38 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,</div><div class='ctx'> 	/* first half of local IO error, failure to attach,</div><div class='ctx'> 	 * or administrative detach */</div><div class='ctx'> 	if (os.disk != D_FAILED &amp;&amp; ns.disk == D_FAILED) {</div><div class='del'>-		enum drbd_io_error_p eh;</div><div class='del'>-		int was_io_error;</div><div class='add'>+		enum drbd_io_error_p eh = EP_PASS_ON;</div><div class='add'>+		int was_io_error = 0;</div><div class='ctx'> 		/* corresponding get_ldev was in __drbd_set_state, to serialize</div><div class='del'>-		 * our cleanup here with the transition to D_DISKLESS,</div><div class='del'>-		 * so it is safe to dreference ldev here. */</div><div class='del'>-		eh = mdev-&gt;ldev-&gt;dc.on_io_error;</div><div class='del'>-		was_io_error = test_and_clear_bit(WAS_IO_ERROR, &amp;mdev-&gt;flags);</div><div class='del'>-</div><div class='del'>-		/* current state still has to be D_FAILED,</div><div class='del'>-		 * there is only one way out: to D_DISKLESS,</div><div class='del'>-		 * and that may only happen after our put_ldev below. */</div><div class='del'>-		if (mdev-&gt;state.disk != D_FAILED)</div><div class='del'>-			dev_err(DEV,</div><div class='del'>-				"ASSERT FAILED: disk is %s during detach\n",</div><div class='del'>-				drbd_disk_str(mdev-&gt;state.disk));</div><div class='del'>-</div><div class='del'>-		if (drbd_send_state(mdev))</div><div class='del'>-			dev_warn(DEV, "Notified peer that I am detaching my disk\n");</div><div class='del'>-		else</div><div class='del'>-			dev_err(DEV, "Sending state for detaching disk failed\n");</div><div class='del'>-</div><div class='del'>-		drbd_rs_cancel_all(mdev);</div><div class='del'>-</div><div class='del'>-		/* In case we want to get something to stable storage still,</div><div class='del'>-		 * this may be the last chance.</div><div class='del'>-		 * Following put_ldev may transition to D_DISKLESS. */</div><div class='del'>-		drbd_md_sync(mdev);</div><div class='add'>+		 * our cleanup here with the transition to D_DISKLESS.</div><div class='add'>+		 * But is is still not save to dreference ldev here, since</div><div class='add'>+		 * we might come from an failed Attach before ldev was set. */</div><div class='add'>+		if (mdev-&gt;ldev) {</div><div class='add'>+			eh = mdev-&gt;ldev-&gt;dc.on_io_error;</div><div class='add'>+			was_io_error = test_and_clear_bit(WAS_IO_ERROR, &amp;mdev-&gt;flags);</div><div class='add'>+</div><div class='add'>+			/* Immediately allow completion of all application IO, that waits</div><div class='add'>+			   for completion from the local disk. */</div><div class='add'>+			tl_abort_disk_io(mdev);</div><div class='add'>+</div><div class='add'>+			/* current state still has to be D_FAILED,</div><div class='add'>+			 * there is only one way out: to D_DISKLESS,</div><div class='add'>+			 * and that may only happen after our put_ldev below. */</div><div class='add'>+			if (mdev-&gt;state.disk != D_FAILED)</div><div class='add'>+				dev_err(DEV,</div><div class='add'>+					"ASSERT FAILED: disk is %s during detach\n",</div><div class='add'>+					drbd_disk_str(mdev-&gt;state.disk));</div><div class='add'>+</div><div class='add'>+			if (ns.conn &gt;= C_CONNECTED)</div><div class='add'>+				drbd_send_state(mdev, ns);</div><div class='add'>+</div><div class='add'>+			drbd_rs_cancel_all(mdev);</div><div class='add'>+</div><div class='add'>+			/* In case we want to get something to stable storage still,</div><div class='add'>+			 * this may be the last chance.</div><div class='add'>+			 * Following put_ldev may transition to D_DISKLESS. */</div><div class='add'>+			drbd_md_sync(mdev);</div><div class='add'>+		}</div><div class='ctx'> 		put_ldev(mdev);</div><div class='ctx'> </div><div class='ctx'> 		if (was_io_error &amp;&amp; eh == EP_CALL_HELPER)</div><div class='hunk'>@@ -1561,16 +1673,17 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,</div><div class='ctx'>                 mdev-&gt;rs_failed = 0;</div><div class='ctx'>                 atomic_set(&amp;mdev-&gt;rs_pending_cnt, 0);</div><div class='ctx'> </div><div class='del'>-		if (drbd_send_state(mdev))</div><div class='del'>-			dev_warn(DEV, "Notified peer that I'm now diskless.\n");</div><div class='add'>+		if (ns.conn &gt;= C_CONNECTED)</div><div class='add'>+			drbd_send_state(mdev, ns);</div><div class='add'>+</div><div class='ctx'> 		/* corresponding get_ldev in __drbd_set_state</div><div class='ctx'> 		 * this may finally trigger drbd_ldev_destroy. */</div><div class='ctx'> 		put_ldev(mdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Notify peer that I had a local IO error, and did not detached.. */</div><div class='del'>-	if (os.disk == D_UP_TO_DATE &amp;&amp; ns.disk == D_INCONSISTENT)</div><div class='del'>-		drbd_send_state(mdev);</div><div class='add'>+	if (os.disk == D_UP_TO_DATE &amp;&amp; ns.disk == D_INCONSISTENT &amp;&amp; ns.conn &gt;= C_CONNECTED)</div><div class='add'>+		drbd_send_state(mdev, ns);</div><div class='ctx'> </div><div class='ctx'> 	/* Disks got bigger while they were detached */</div><div class='ctx'> 	if (ns.disk &gt; D_NEGOTIATING &amp;&amp; ns.pdsk &gt; D_NEGOTIATING &amp;&amp;</div><div class='hunk'>@@ -1588,7 +1701,13 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,</div><div class='ctx'> 	/* sync target done with resync.  Explicitly notify peer, even though</div><div class='ctx'> 	 * it should (at least for non-empty resyncs) already know itself. */</div><div class='ctx'> 	if (os.disk &lt; D_UP_TO_DATE &amp;&amp; os.conn &gt;= C_SYNC_SOURCE &amp;&amp; ns.conn == C_CONNECTED)</div><div class='del'>-		drbd_send_state(mdev);</div><div class='add'>+		drbd_send_state(mdev, ns);</div><div class='add'>+</div><div class='add'>+	/* Wake up role changes, that were delayed because of connection establishing */</div><div class='add'>+	if (os.conn == C_WF_REPORT_PARAMS &amp;&amp; ns.conn != C_WF_REPORT_PARAMS) {</div><div class='add'>+		clear_bit(STATE_SENT, &amp;mdev-&gt;flags);</div><div class='add'>+		wake_up(&amp;mdev-&gt;state_wait);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* This triggers bitmap writeout of potentially still unwritten pages</div><div class='ctx'> 	 * if the resync finished cleanly, or aborted because of peer disk</div><div class='hunk'>@@ -1598,8 +1717,8 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,</div><div class='ctx'> 	 * No harm done if some bits change during this phase.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (os.conn &gt; C_CONNECTED &amp;&amp; ns.conn &lt;= C_CONNECTED &amp;&amp; get_ldev(mdev)) {</div><div class='del'>-		drbd_queue_bitmap_io(mdev, &amp;drbd_bm_write, NULL,</div><div class='del'>-			"write from resync_finished", BM_LOCKED_SET_ALLOWED);</div><div class='add'>+		drbd_queue_bitmap_io(mdev, &amp;drbd_bm_write_copy_pages, NULL,</div><div class='add'>+			"write from resync_finished", BM_LOCKED_CHANGE_ALLOWED);</div><div class='ctx'> 		put_ldev(mdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2057,7 +2176,11 @@ int drbd_gen_and_send_sync_uuid(struct drbd_conf *mdev)</div><div class='ctx'> </div><div class='ctx'> 	D_ASSERT(mdev-&gt;state.disk == D_UP_TO_DATE);</div><div class='ctx'> </div><div class='del'>-	uuid = mdev-&gt;ldev-&gt;md.uuid[UI_BITMAP] + UUID_NEW_BM_OFFSET;</div><div class='add'>+	uuid = mdev-&gt;ldev-&gt;md.uuid[UI_BITMAP];</div><div class='add'>+	if (uuid &amp;&amp; uuid != UUID_JUST_CREATED)</div><div class='add'>+		uuid = uuid + UUID_NEW_BM_OFFSET;</div><div class='add'>+	else</div><div class='add'>+		get_random_bytes(&amp;uuid, sizeof(u64));</div><div class='ctx'> 	drbd_uuid_set(mdev, UI_BITMAP, uuid);</div><div class='ctx'> 	drbd_print_uuids(mdev, "updated sync UUID");</div><div class='ctx'> 	drbd_md_sync(mdev);</div><div class='hunk'>@@ -2089,6 +2212,10 @@ int drbd_send_sizes(struct drbd_conf *mdev, int trigger_reply, enum dds_flags fl</div><div class='ctx'> 		max_bio_size = DRBD_MAX_BIO_SIZE; /* ... multiple BIOs per peer_request */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Never allow old drbd (up to 8.3.7) to see more than 32KiB */</div><div class='add'>+	if (mdev-&gt;agreed_pro_version &lt;= 94)</div><div class='add'>+		max_bio_size = min_t(int, max_bio_size, DRBD_MAX_SIZE_H80_PACKET);</div><div class='add'>+</div><div class='ctx'> 	p.d_size = cpu_to_be64(d_size);</div><div class='ctx'> 	p.u_size = cpu_to_be64(u_size);</div><div class='ctx'> 	p.c_size = cpu_to_be64(trigger_reply ? 0 : drbd_get_capacity(mdev-&gt;this_bdev));</div><div class='hunk'>@@ -2102,10 +2229,10 @@ int drbd_send_sizes(struct drbd_conf *mdev, int trigger_reply, enum dds_flags fl</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * drbd_send_state() - Sends the drbd state to the peer</div><div class='add'>+ * drbd_send_current_state() - Sends the drbd state to the peer</div><div class='ctx'>  * @mdev:	DRBD device.</div><div class='ctx'>  */</div><div class='del'>-int drbd_send_state(struct drbd_conf *mdev)</div><div class='add'>+int drbd_send_current_state(struct drbd_conf *mdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct socket *sock;</div><div class='ctx'> 	struct p_state p;</div><div class='hunk'>@@ -2131,6 +2258,37 @@ int drbd_send_state(struct drbd_conf *mdev)</div><div class='ctx'> 	return ok;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * drbd_send_state() - After a state change, sends the new state to the peer</div><div class='add'>+ * @mdev:	DRBD device.</div><div class='add'>+ * @state:	the state to send, not necessarily the current state.</div><div class='add'>+ *</div><div class='add'>+ * Each state change queues an "after_state_ch" work, which will eventually</div><div class='add'>+ * send the resulting new state to the peer. If more state changes happen</div><div class='add'>+ * between queuing and processing of the after_state_ch work, we still</div><div class='add'>+ * want to send each intermediary state in the order it occurred.</div><div class='add'>+ */</div><div class='add'>+int drbd_send_state(struct drbd_conf *mdev, union drbd_state state)</div><div class='add'>+{</div><div class='add'>+	struct socket *sock;</div><div class='add'>+	struct p_state p;</div><div class='add'>+	int ok = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mdev-&gt;data.mutex);</div><div class='add'>+</div><div class='add'>+	p.state = cpu_to_be32(state.i);</div><div class='add'>+	sock = mdev-&gt;data.socket;</div><div class='add'>+</div><div class='add'>+	if (likely(sock != NULL)) {</div><div class='add'>+		ok = _drbd_send_cmd(mdev, sock, P_STATE,</div><div class='add'>+				    (struct p_header80 *)&amp;p, sizeof(p), 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;mdev-&gt;data.mutex);</div><div class='add'>+</div><div class='add'>+	return ok;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int drbd_send_state_req(struct drbd_conf *mdev,</div><div class='ctx'> 	union drbd_state mask, union drbd_state val)</div><div class='ctx'> {</div><div class='hunk'>@@ -2615,7 +2773,7 @@ static int _drbd_send_bio(struct drbd_conf *mdev, struct bio *bio)</div><div class='ctx'> 	struct bio_vec *bvec;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	/* hint all but last page with MSG_MORE */</div><div class='del'>-	__bio_for_each_segment(bvec, bio, i, 0) {</div><div class='add'>+	bio_for_each_segment(bvec, bio, i) {</div><div class='ctx'> 		if (!_drbd_no_send_page(mdev, bvec-&gt;bv_page,</div><div class='ctx'> 				     bvec-&gt;bv_offset, bvec-&gt;bv_len,</div><div class='ctx'> 				     i == bio-&gt;bi_vcnt -1 ? 0 : MSG_MORE))</div><div class='hunk'>@@ -2629,7 +2787,7 @@ static int _drbd_send_zc_bio(struct drbd_conf *mdev, struct bio *bio)</div><div class='ctx'> 	struct bio_vec *bvec;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	/* hint all but last page with MSG_MORE */</div><div class='del'>-	__bio_for_each_segment(bvec, bio, i, 0) {</div><div class='add'>+	bio_for_each_segment(bvec, bio, i) {</div><div class='ctx'> 		if (!_drbd_send_page(mdev, bvec-&gt;bv_page,</div><div class='ctx'> 				     bvec-&gt;bv_offset, bvec-&gt;bv_len,</div><div class='ctx'> 				     i == bio-&gt;bi_vcnt -1 ? 0 : MSG_MORE))</div><div class='hunk'>@@ -2695,8 +2853,7 @@ int drbd_send_dblock(struct drbd_conf *mdev, struct drbd_request *req)</div><div class='ctx'> </div><div class='ctx'> 	p.sector   = cpu_to_be64(req-&gt;sector);</div><div class='ctx'> 	p.block_id = (unsigned long)req;</div><div class='del'>-	p.seq_num  = cpu_to_be32(req-&gt;seq_num =</div><div class='del'>-				 atomic_add_return(1, &amp;mdev-&gt;packet_seq));</div><div class='add'>+	p.seq_num  = cpu_to_be32(atomic_add_return(1, &amp;mdev-&gt;packet_seq));</div><div class='ctx'> </div><div class='ctx'> 	dp_flags = bio_flags_to_wire(mdev, req-&gt;master_bio-&gt;bi_rw);</div><div class='ctx'> </div><div class='hunk'>@@ -2987,8 +3144,8 @@ void drbd_init_set_defaults(struct drbd_conf *mdev)</div><div class='ctx'> 	atomic_set(&amp;mdev-&gt;rs_sect_in, 0);</div><div class='ctx'> 	atomic_set(&amp;mdev-&gt;rs_sect_ev, 0);</div><div class='ctx'> 	atomic_set(&amp;mdev-&gt;ap_in_flight, 0);</div><div class='add'>+	atomic_set(&amp;mdev-&gt;md_io_in_use, 0);</div><div class='ctx'> </div><div class='del'>-	mutex_init(&amp;mdev-&gt;md_io_mutex);</div><div class='ctx'> 	mutex_init(&amp;mdev-&gt;data.mutex);</div><div class='ctx'> 	mutex_init(&amp;mdev-&gt;meta.mutex);</div><div class='ctx'> 	sema_init(&amp;mdev-&gt;data.work.s, 0);</div><div class='hunk'>@@ -3126,6 +3283,10 @@ static void drbd_destroy_mempools(void)</div><div class='ctx'> </div><div class='ctx'> 	/* D_ASSERT(atomic_read(&amp;drbd_pp_vacant)==0); */</div><div class='ctx'> </div><div class='add'>+	if (drbd_md_io_bio_set)</div><div class='add'>+		bioset_free(drbd_md_io_bio_set);</div><div class='add'>+	if (drbd_md_io_page_pool)</div><div class='add'>+		mempool_destroy(drbd_md_io_page_pool);</div><div class='ctx'> 	if (drbd_ee_mempool)</div><div class='ctx'> 		mempool_destroy(drbd_ee_mempool);</div><div class='ctx'> 	if (drbd_request_mempool)</div><div class='hunk'>@@ -3139,6 +3300,8 @@ static void drbd_destroy_mempools(void)</div><div class='ctx'> 	if (drbd_al_ext_cache)</div><div class='ctx'> 		kmem_cache_destroy(drbd_al_ext_cache);</div><div class='ctx'> </div><div class='add'>+	drbd_md_io_bio_set   = NULL;</div><div class='add'>+	drbd_md_io_page_pool = NULL;</div><div class='ctx'> 	drbd_ee_mempool      = NULL;</div><div class='ctx'> 	drbd_request_mempool = NULL;</div><div class='ctx'> 	drbd_ee_cache        = NULL;</div><div class='hunk'>@@ -3162,6 +3325,8 @@ static int drbd_create_mempools(void)</div><div class='ctx'> 	drbd_bm_ext_cache    = NULL;</div><div class='ctx'> 	drbd_al_ext_cache    = NULL;</div><div class='ctx'> 	drbd_pp_pool         = NULL;</div><div class='add'>+	drbd_md_io_page_pool = NULL;</div><div class='add'>+	drbd_md_io_bio_set   = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* caches */</div><div class='ctx'> 	drbd_request_cache = kmem_cache_create(</div><div class='hunk'>@@ -3185,6 +3350,16 @@ static int drbd_create_mempools(void)</div><div class='ctx'> 		goto Enomem;</div><div class='ctx'> </div><div class='ctx'> 	/* mempools */</div><div class='add'>+#ifdef COMPAT_HAVE_BIOSET_CREATE</div><div class='add'>+	drbd_md_io_bio_set = bioset_create(DRBD_MIN_POOL_PAGES, 0);</div><div class='add'>+	if (drbd_md_io_bio_set == NULL)</div><div class='add'>+		goto Enomem;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	drbd_md_io_page_pool = mempool_create_page_pool(DRBD_MIN_POOL_PAGES, 0);</div><div class='add'>+	if (drbd_md_io_page_pool == NULL)</div><div class='add'>+		goto Enomem;</div><div class='add'>+</div><div class='ctx'> 	drbd_request_mempool = mempool_create(number,</div><div class='ctx'> 		mempool_alloc_slab, mempool_free_slab, drbd_request_cache);</div><div class='ctx'> 	if (drbd_request_mempool == NULL)</div><div class='hunk'>@@ -3262,6 +3437,8 @@ static void drbd_delete_device(unsigned int minor)</div><div class='ctx'> 	if (!mdev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	del_timer_sync(&amp;mdev-&gt;request_timer);</div><div class='add'>+</div><div class='ctx'> 	/* paranoia asserts */</div><div class='ctx'> 	if (mdev-&gt;open_cnt != 0)</div><div class='ctx'> 		dev_err(DEV, "open_cnt = %d in %s:%u", mdev-&gt;open_cnt,</div><div class='hunk'>@@ -3666,8 +3843,10 @@ void drbd_md_sync(struct drbd_conf *mdev)</div><div class='ctx'> 	if (!get_ldev_if_state(mdev, D_FAILED))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;mdev-&gt;md_io_mutex);</div><div class='del'>-	buffer = (struct meta_data_on_disk *)page_address(mdev-&gt;md_io_page);</div><div class='add'>+	buffer = drbd_md_get_buffer(mdev);</div><div class='add'>+	if (!buffer)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	memset(buffer, 0, 512);</div><div class='ctx'> </div><div class='ctx'> 	buffer-&gt;la_size = cpu_to_be64(drbd_get_capacity(mdev-&gt;this_bdev));</div><div class='hunk'>@@ -3698,7 +3877,8 @@ void drbd_md_sync(struct drbd_conf *mdev)</div><div class='ctx'> 	 * since we updated it on metadata. */</div><div class='ctx'> 	mdev-&gt;ldev-&gt;md.la_size_sect = drbd_get_capacity(mdev-&gt;this_bdev);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;mdev-&gt;md_io_mutex);</div><div class='add'>+	drbd_md_put_buffer(mdev);</div><div class='add'>+out:</div><div class='ctx'> 	put_ldev(mdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3718,8 +3898,9 @@ int drbd_md_read(struct drbd_conf *mdev, struct drbd_backing_dev *bdev)</div><div class='ctx'> 	if (!get_ldev_if_state(mdev, D_ATTACHING))</div><div class='ctx'> 		return ERR_IO_MD_DISK;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;mdev-&gt;md_io_mutex);</div><div class='del'>-	buffer = (struct meta_data_on_disk *)page_address(mdev-&gt;md_io_page);</div><div class='add'>+	buffer = drbd_md_get_buffer(mdev);</div><div class='add'>+	if (!buffer)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (!drbd_md_sync_page_io(mdev, bdev, bdev-&gt;md.md_offset, READ)) {</div><div class='ctx'> 		/* NOTE: can't do normal error processing here as this is</div><div class='hunk'>@@ -3780,7 +3961,8 @@ int drbd_md_read(struct drbd_conf *mdev, struct drbd_backing_dev *bdev)</div><div class='ctx'> 		mdev-&gt;sync_conf.al_extents = 127;</div><div class='ctx'> </div><div class='ctx'>  err:</div><div class='del'>-	mutex_unlock(&amp;mdev-&gt;md_io_mutex);</div><div class='add'>+	drbd_md_put_buffer(mdev);</div><div class='add'>+ out:</div><div class='ctx'> 	put_ldev(mdev);</div><div class='ctx'> </div><div class='ctx'> 	return rv;</div><div class='hunk'>@@ -4183,12 +4365,11 @@ const char *drbd_buildtag(void)</div><div class='ctx'> 	static char buildtag[38] = "\0uilt-in";</div><div class='ctx'> </div><div class='ctx'> 	if (buildtag[0] == 0) {</div><div class='del'>-#ifdef CONFIG_MODULES</div><div class='del'>-		if (THIS_MODULE != NULL)</div><div class='del'>-			sprintf(buildtag, "srcversion: %-24s", THIS_MODULE-&gt;srcversion);</div><div class='del'>-		else</div><div class='add'>+#ifdef MODULE</div><div class='add'>+		sprintf(buildtag, "srcversion: %-24s", THIS_MODULE-&gt;srcversion);</div><div class='add'>+#else</div><div class='add'>+		buildtag[0] = 'b';</div><div class='ctx'> #endif</div><div class='del'>-			buildtag[0] = 'b';</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return buildtag;</div><div class='head'>diff --git a/drivers/block/drbd/drbd_nl.c b/drivers/block/drbd/drbd_nl.c<br/>index abfaacaaf346..6d4de6a72e80 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/drbd/drbd_nl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/drbd/drbd_nl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/drbd/drbd_nl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_nl.c</a></div><div class='hunk'>@@ -289,7 +289,7 @@ static int _try_outdate_peer_async(void *data)</div><div class='ctx'> 	*/</div><div class='ctx'> 	spin_lock_irq(&amp;mdev-&gt;req_lock);</div><div class='ctx'> 	ns = mdev-&gt;state;</div><div class='del'>-	if (ns.conn &lt; C_WF_REPORT_PARAMS) {</div><div class='add'>+	if (ns.conn &lt; C_WF_REPORT_PARAMS &amp;&amp; !test_bit(STATE_SENT, &amp;mdev-&gt;flags)) {</div><div class='ctx'> 		ns.pdsk = nps;</div><div class='ctx'> 		_drbd_set_state(mdev, ns, CS_VERBOSE, NULL);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -432,7 +432,7 @@ drbd_set_role(struct drbd_conf *mdev, enum drbd_role new_role, int force)</div><div class='ctx'> 		/* if this was forced, we should consider sync */</div><div class='ctx'> 		if (forced)</div><div class='ctx'> 			drbd_send_uuids(mdev);</div><div class='del'>-		drbd_send_state(mdev);</div><div class='add'>+		drbd_send_current_state(mdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	drbd_md_sync(mdev);</div><div class='hunk'>@@ -845,9 +845,10 @@ void drbd_reconsider_max_bio_size(struct drbd_conf *mdev)</div><div class='ctx'> 	   Because new from 8.3.8 onwards the peer can use multiple</div><div class='ctx'> 	   BIOs for a single peer_request */</div><div class='ctx'> 	if (mdev-&gt;state.conn &gt;= C_CONNECTED) {</div><div class='del'>-		if (mdev-&gt;agreed_pro_version &lt; 94)</div><div class='del'>-			peer = mdev-&gt;peer_max_bio_size;</div><div class='del'>-		else if (mdev-&gt;agreed_pro_version == 94)</div><div class='add'>+		if (mdev-&gt;agreed_pro_version &lt; 94) {</div><div class='add'>+			peer = min_t(int, mdev-&gt;peer_max_bio_size, DRBD_MAX_SIZE_H80_PACKET);</div><div class='add'>+			/* Correct old drbd (up to 8.3.7) if it believes it can do more than 32KiB */</div><div class='add'>+		} else if (mdev-&gt;agreed_pro_version == 94)</div><div class='ctx'> 			peer = DRBD_MAX_SIZE_H80_PACKET;</div><div class='ctx'> 		else /* drbd 8.3.8 onwards */</div><div class='ctx'> 			peer = DRBD_MAX_BIO_SIZE;</div><div class='hunk'>@@ -1032,7 +1033,7 @@ static int drbd_nl_disk_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp</div><div class='ctx'> 		dev_err(DEV, "max capacity %llu smaller than disk size %llu\n",</div><div class='ctx'> 			(unsigned long long) drbd_get_max_capacity(nbc),</div><div class='ctx'> 			(unsigned long long) nbc-&gt;dc.disk_size);</div><div class='del'>-		retcode = ERR_DISK_TO_SMALL;</div><div class='add'>+		retcode = ERR_DISK_TOO_SMALL;</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1046,7 +1047,7 @@ static int drbd_nl_disk_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (drbd_get_capacity(nbc-&gt;md_bdev) &lt; min_md_device_sectors) {</div><div class='del'>-		retcode = ERR_MD_DISK_TO_SMALL;</div><div class='add'>+		retcode = ERR_MD_DISK_TOO_SMALL;</div><div class='ctx'> 		dev_warn(DEV, "refusing attach: md-device too small, "</div><div class='ctx'> 		     "at least %llu sectors needed for this meta-disk type\n",</div><div class='ctx'> 		     (unsigned long long) min_md_device_sectors);</div><div class='hunk'>@@ -1057,7 +1058,7 @@ static int drbd_nl_disk_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp</div><div class='ctx'> 	 * (we may currently be R_PRIMARY with no local disk...) */</div><div class='ctx'> 	if (drbd_get_max_capacity(nbc) &lt;</div><div class='ctx'> 	    drbd_get_capacity(mdev-&gt;this_bdev)) {</div><div class='del'>-		retcode = ERR_DISK_TO_SMALL;</div><div class='add'>+		retcode = ERR_DISK_TOO_SMALL;</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1138,7 +1139,7 @@ static int drbd_nl_disk_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp</div><div class='ctx'> 	if (drbd_md_test_flag(nbc, MDF_CONSISTENT) &amp;&amp;</div><div class='ctx'> 	    drbd_new_dev_size(mdev, nbc, 0) &lt; nbc-&gt;md.la_size_sect) {</div><div class='ctx'> 		dev_warn(DEV, "refusing to truncate a consistent device\n");</div><div class='del'>-		retcode = ERR_DISK_TO_SMALL;</div><div class='add'>+		retcode = ERR_DISK_TOO_SMALL;</div><div class='ctx'> 		goto force_diskless_dec;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1336,17 +1337,34 @@ static int drbd_nl_detach(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp,</div><div class='ctx'> {</div><div class='ctx'> 	enum drbd_ret_code retcode;</div><div class='ctx'> 	int ret;</div><div class='add'>+	struct detach dt = {};</div><div class='add'>+</div><div class='add'>+	if (!detach_from_tags(mdev, nlp-&gt;tag_list, &amp;dt)) {</div><div class='add'>+		reply-&gt;ret_code = ERR_MANDATORY_TAG;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dt.detach_force) {</div><div class='add'>+		drbd_force_state(mdev, NS(disk, D_FAILED));</div><div class='add'>+		reply-&gt;ret_code = SS_SUCCESS;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	drbd_suspend_io(mdev); /* so no-one is stuck in drbd_al_begin_io */</div><div class='add'>+	drbd_md_get_buffer(mdev); /* make sure there is no in-flight meta-data IO */</div><div class='ctx'> 	retcode = drbd_request_state(mdev, NS(disk, D_FAILED));</div><div class='add'>+	drbd_md_put_buffer(mdev);</div><div class='ctx'> 	/* D_FAILED will transition to DISKLESS. */</div><div class='ctx'> 	ret = wait_event_interruptible(mdev-&gt;misc_wait,</div><div class='ctx'> 			mdev-&gt;state.disk != D_FAILED);</div><div class='ctx'> 	drbd_resume_io(mdev);</div><div class='add'>+</div><div class='ctx'> 	if ((int)retcode == (int)SS_IS_DISKLESS)</div><div class='ctx'> 		retcode = SS_NOTHING_TO_DO;</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		retcode = ERR_INTR;</div><div class='ctx'> 	reply-&gt;ret_code = retcode;</div><div class='add'>+out:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1711,7 +1729,7 @@ static int drbd_nl_resize(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp,</div><div class='ctx'> </div><div class='ctx'> 	if (rs.no_resync &amp;&amp; mdev-&gt;agreed_pro_version &lt; 93) {</div><div class='ctx'> 		retcode = ERR_NEED_APV_93;</div><div class='del'>-		goto fail;</div><div class='add'>+		goto fail_ldev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (mdev-&gt;ldev-&gt;known_size != drbd_get_capacity(mdev-&gt;ldev-&gt;backing_bdev))</div><div class='hunk'>@@ -1738,6 +1756,10 @@ static int drbd_nl_resize(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp,</div><div class='ctx'>  fail:</div><div class='ctx'> 	reply-&gt;ret_code = retcode;</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+ fail_ldev:</div><div class='add'>+	put_ldev(mdev);</div><div class='add'>+	goto fail;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int drbd_nl_syncer_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp,</div><div class='hunk'>@@ -1941,6 +1963,7 @@ static int drbd_nl_invalidate(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nl</div><div class='ctx'> </div><div class='ctx'> 	/* If there is still bitmap IO pending, probably because of a previous</div><div class='ctx'> 	 * resync just being finished, wait for it before requesting a new resync. */</div><div class='add'>+	drbd_suspend_io(mdev);</div><div class='ctx'> 	wait_event(mdev-&gt;misc_wait, !test_bit(BITMAP_IO, &amp;mdev-&gt;flags));</div><div class='ctx'> </div><div class='ctx'> 	retcode = _drbd_request_state(mdev, NS(conn, C_STARTING_SYNC_T), CS_ORDERED);</div><div class='hunk'>@@ -1959,6 +1982,7 @@ static int drbd_nl_invalidate(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nl</div><div class='ctx'> </div><div class='ctx'> 		retcode = drbd_request_state(mdev, NS(conn, C_STARTING_SYNC_T));</div><div class='ctx'> 	}</div><div class='add'>+	drbd_resume_io(mdev);</div><div class='ctx'> </div><div class='ctx'> 	reply-&gt;ret_code = retcode;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1980,6 +2004,7 @@ static int drbd_nl_invalidate_peer(struct drbd_conf *mdev, struct drbd_nl_cfg_re</div><div class='ctx'> </div><div class='ctx'> 	/* If there is still bitmap IO pending, probably because of a previous</div><div class='ctx'> 	 * resync just being finished, wait for it before requesting a new resync. */</div><div class='add'>+	drbd_suspend_io(mdev);</div><div class='ctx'> 	wait_event(mdev-&gt;misc_wait, !test_bit(BITMAP_IO, &amp;mdev-&gt;flags));</div><div class='ctx'> </div><div class='ctx'> 	retcode = _drbd_request_state(mdev, NS(conn, C_STARTING_SYNC_S), CS_ORDERED);</div><div class='hunk'>@@ -1998,6 +2023,7 @@ static int drbd_nl_invalidate_peer(struct drbd_conf *mdev, struct drbd_nl_cfg_re</div><div class='ctx'> 		} else</div><div class='ctx'> 			retcode = drbd_request_state(mdev, NS(conn, C_STARTING_SYNC_S));</div><div class='ctx'> 	}</div><div class='add'>+	drbd_resume_io(mdev);</div><div class='ctx'> </div><div class='ctx'> 	reply-&gt;ret_code = retcode;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2170,11 +2196,13 @@ static int drbd_nl_start_ov(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp,</div><div class='ctx'> </div><div class='ctx'> 	/* If there is still bitmap IO pending, e.g. previous resync or verify</div><div class='ctx'> 	 * just being finished, wait for it before requesting a new resync. */</div><div class='add'>+	drbd_suspend_io(mdev);</div><div class='ctx'> 	wait_event(mdev-&gt;misc_wait, !test_bit(BITMAP_IO, &amp;mdev-&gt;flags));</div><div class='ctx'> </div><div class='ctx'> 	/* w_make_ov_request expects position to be aligned */</div><div class='ctx'> 	mdev-&gt;ov_start_sector = args.start_sector &amp; ~BM_SECT_PER_BIT;</div><div class='ctx'> 	reply-&gt;ret_code = drbd_request_state(mdev,NS(conn,C_VERIFY_S));</div><div class='add'>+	drbd_resume_io(mdev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2297,7 +2325,7 @@ static void drbd_connector_callback(struct cn_msg *req, struct netlink_skb_parms</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!cap_raised(current_cap(), CAP_SYS_ADMIN)) {</div><div class='add'>+	if (!capable(CAP_SYS_ADMIN)) {</div><div class='ctx'> 		retcode = ERR_PERM;</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/block/drbd/drbd_proc.c b/drivers/block/drbd/drbd_proc.c<br/>index 2959cdfb77f5..869bada2ed06 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/drbd/drbd_proc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/drbd/drbd_proc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/drbd/drbd_proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_proc.c</a></div><div class='hunk'>@@ -52,7 +52,7 @@ void seq_printf_with_thousands_grouping(struct seq_file *seq, long v)</div><div class='ctx'> 	if (unlikely(v &gt;= 1000000)) {</div><div class='ctx'> 		/* cool: &gt; GiByte/s */</div><div class='ctx'> 		seq_printf(seq, "%ld,", v / 1000000);</div><div class='del'>-		v /= 1000000;</div><div class='add'>+		v %= 1000000;</div><div class='ctx'> 		seq_printf(seq, "%03ld,%03ld", v/1000, v % 1000);</div><div class='ctx'> 	} else if (likely(v &gt;= 1000))</div><div class='ctx'> 		seq_printf(seq, "%ld,%03ld", v/1000, v % 1000);</div><div class='head'>diff --git a/drivers/block/drbd/drbd_receiver.c b/drivers/block/drbd/drbd_receiver.c<br/>index 43beaca53179..ea4836e0ae98 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/drbd/drbd_receiver.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/drbd/drbd_receiver.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/drbd/drbd_receiver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_receiver.c</a></div><div class='hunk'>@@ -466,6 +466,7 @@ static int drbd_accept(struct drbd_conf *mdev, const char **what,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	(*newsock)-&gt;ops  = sock-&gt;ops;</div><div class='add'>+	__module_get((*newsock)-&gt;ops-&gt;owner);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -664,7 +665,7 @@ static struct socket *drbd_wait_for_connect(struct drbd_conf *mdev)</div><div class='ctx'> 	timeo = mdev-&gt;net_conf-&gt;try_connect_int * HZ;</div><div class='ctx'> 	timeo += (random32() &amp; 1) ? timeo / 7 : -timeo / 7; /* 28.5% random jitter */</div><div class='ctx'> </div><div class='del'>-	s_listen-&gt;sk-&gt;sk_reuse    = 1; /* SO_REUSEADDR */</div><div class='add'>+	s_listen-&gt;sk-&gt;sk_reuse    = SK_CAN_REUSE; /* SO_REUSEADDR */</div><div class='ctx'> 	s_listen-&gt;sk-&gt;sk_rcvtimeo = timeo;</div><div class='ctx'> 	s_listen-&gt;sk-&gt;sk_sndtimeo = timeo;</div><div class='ctx'> 	drbd_setbufsize(s_listen, mdev-&gt;net_conf-&gt;sndbuf_size,</div><div class='hunk'>@@ -750,6 +751,7 @@ static int drbd_connect(struct drbd_conf *mdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct socket *s, *sock, *msock;</div><div class='ctx'> 	int try, h, ok;</div><div class='add'>+	enum drbd_state_rv rv;</div><div class='ctx'> </div><div class='ctx'> 	D_ASSERT(!mdev-&gt;data.socket);</div><div class='ctx'> </div><div class='hunk'>@@ -841,8 +843,8 @@ retry:</div><div class='ctx'> 		}</div><div class='ctx'> 	} while (1);</div><div class='ctx'> </div><div class='del'>-	msock-&gt;sk-&gt;sk_reuse = 1; /* SO_REUSEADDR */</div><div class='del'>-	sock-&gt;sk-&gt;sk_reuse = 1; /* SO_REUSEADDR */</div><div class='add'>+	msock-&gt;sk-&gt;sk_reuse = SK_CAN_REUSE; /* SO_REUSEADDR */</div><div class='add'>+	sock-&gt;sk-&gt;sk_reuse = SK_CAN_REUSE; /* SO_REUSEADDR */</div><div class='ctx'> </div><div class='ctx'> 	sock-&gt;sk-&gt;sk_allocation = GFP_NOIO;</div><div class='ctx'> 	msock-&gt;sk-&gt;sk_allocation = GFP_NOIO;</div><div class='hunk'>@@ -888,25 +890,32 @@ retry:</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (drbd_request_state(mdev, NS(conn, C_WF_REPORT_PARAMS)) &lt; SS_SUCCESS)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	sock-&gt;sk-&gt;sk_sndtimeo = mdev-&gt;net_conf-&gt;timeout*HZ/10;</div><div class='ctx'> 	sock-&gt;sk-&gt;sk_rcvtimeo = MAX_SCHEDULE_TIMEOUT;</div><div class='ctx'> </div><div class='ctx'> 	atomic_set(&amp;mdev-&gt;packet_seq, 0);</div><div class='ctx'> 	mdev-&gt;peer_seq = 0;</div><div class='ctx'> </div><div class='del'>-	drbd_thread_start(&amp;mdev-&gt;asender);</div><div class='del'>-</div><div class='ctx'> 	if (drbd_send_protocol(mdev) == -1)</div><div class='ctx'> 		return -1;</div><div class='add'>+	set_bit(STATE_SENT, &amp;mdev-&gt;flags);</div><div class='ctx'> 	drbd_send_sync_param(mdev, &amp;mdev-&gt;sync_conf);</div><div class='ctx'> 	drbd_send_sizes(mdev, 0, 0);</div><div class='ctx'> 	drbd_send_uuids(mdev);</div><div class='del'>-	drbd_send_state(mdev);</div><div class='add'>+	drbd_send_current_state(mdev);</div><div class='ctx'> 	clear_bit(USE_DEGR_WFC_T, &amp;mdev-&gt;flags);</div><div class='ctx'> 	clear_bit(RESIZE_PENDING, &amp;mdev-&gt;flags);</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;mdev-&gt;req_lock);</div><div class='add'>+	rv = _drbd_set_state(_NS(mdev, conn, C_WF_REPORT_PARAMS), CS_VERBOSE, NULL);</div><div class='add'>+	if (mdev-&gt;state.conn != C_WF_REPORT_PARAMS)</div><div class='add'>+		clear_bit(STATE_SENT, &amp;mdev-&gt;flags);</div><div class='add'>+	spin_unlock_irq(&amp;mdev-&gt;req_lock);</div><div class='add'>+</div><div class='add'>+	if (rv &lt; SS_SUCCESS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	drbd_thread_start(&amp;mdev-&gt;asender);</div><div class='ctx'> 	mod_timer(&amp;mdev-&gt;request_timer, jiffies + HZ); /* just start it here. */</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -957,7 +966,7 @@ static void drbd_flush(struct drbd_conf *mdev)</div><div class='ctx'> 		rv = blkdev_issue_flush(mdev-&gt;ldev-&gt;backing_bdev, GFP_KERNEL,</div><div class='ctx'> 					NULL);</div><div class='ctx'> 		if (rv) {</div><div class='del'>-			dev_err(DEV, "local disk flush failed with status %d\n", rv);</div><div class='add'>+			dev_info(DEV, "local disk flush failed with status %d\n", rv);</div><div class='ctx'> 			/* would rather check on EOPNOTSUPP, but that is not reliable.</div><div class='ctx'> 			 * don't try again for ANY return value != 0</div><div class='ctx'> 			 * if (rv == -EOPNOTSUPP) */</div><div class='hunk'>@@ -1001,13 +1010,14 @@ static enum finish_epoch drbd_may_finish_epoch(struct drbd_conf *mdev,</div><div class='ctx'> </div><div class='ctx'> 		if (epoch_size != 0 &amp;&amp;</div><div class='ctx'> 		    atomic_read(&amp;epoch-&gt;active) == 0 &amp;&amp;</div><div class='del'>-		    test_bit(DE_HAVE_BARRIER_NUMBER, &amp;epoch-&gt;flags)) {</div><div class='add'>+		    (test_bit(DE_HAVE_BARRIER_NUMBER, &amp;epoch-&gt;flags) || ev &amp; EV_CLEANUP)) {</div><div class='ctx'> 			if (!(ev &amp; EV_CLEANUP)) {</div><div class='ctx'> 				spin_unlock(&amp;mdev-&gt;epoch_lock);</div><div class='ctx'> 				drbd_send_b_ack(mdev, epoch-&gt;barrier_nr, epoch_size);</div><div class='ctx'> 				spin_lock(&amp;mdev-&gt;epoch_lock);</div><div class='ctx'> 			}</div><div class='del'>-			dec_unacked(mdev);</div><div class='add'>+			if (test_bit(DE_HAVE_BARRIER_NUMBER, &amp;epoch-&gt;flags))</div><div class='add'>+				dec_unacked(mdev);</div><div class='ctx'> </div><div class='ctx'> 			if (mdev-&gt;current_epoch != epoch) {</div><div class='ctx'> 				next_epoch = list_entry(epoch-&gt;list.next, struct drbd_epoch, list);</div><div class='hunk'>@@ -1096,7 +1106,11 @@ int drbd_submit_ee(struct drbd_conf *mdev, struct drbd_epoch_entry *e,</div><div class='ctx'> 	/* In most cases, we will only need one bio.  But in case the lower</div><div class='ctx'> 	 * level restrictions happen to be different at this offset on this</div><div class='ctx'> 	 * side than those of the sending peer, we may need to submit the</div><div class='del'>-	 * request in more than one bio. */</div><div class='add'>+	 * request in more than one bio.</div><div class='add'>+	 *</div><div class='add'>+	 * Plain bio_alloc is good enough here, this is no DRBD internally</div><div class='add'>+	 * generated bio, but a bio allocated on behalf of the peer.</div><div class='add'>+	 */</div><div class='ctx'> next_bio:</div><div class='ctx'> 	bio = bio_alloc(GFP_NOIO, nr_pages);</div><div class='ctx'> 	if (!bio) {</div><div class='hunk'>@@ -1583,6 +1597,24 @@ static int e_send_discard_ack(struct drbd_conf *mdev, struct drbd_work *w, int u</div><div class='ctx'> 	return ok;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool overlapping_resync_write(struct drbd_conf *mdev, struct drbd_epoch_entry *data_e)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	struct drbd_epoch_entry *rs_e;</div><div class='add'>+	bool rv = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;mdev-&gt;req_lock);</div><div class='add'>+	list_for_each_entry(rs_e, &amp;mdev-&gt;sync_ee, w.list) {</div><div class='add'>+		if (overlaps(data_e-&gt;sector, data_e-&gt;size, rs_e-&gt;sector, rs_e-&gt;size)) {</div><div class='add'>+			rv = 1;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(&amp;mdev-&gt;req_lock);</div><div class='add'>+</div><div class='add'>+	return rv;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Called from receive_Data.</div><div class='ctx'>  * Synchronize packets on sock with packets on msock.</div><div class='ctx'>  *</div><div class='hunk'>@@ -1826,6 +1858,9 @@ static int receive_Data(struct drbd_conf *mdev, enum drbd_packets cmd, unsigned</div><div class='ctx'> 	list_add(&amp;e-&gt;w.list, &amp;mdev-&gt;active_ee);</div><div class='ctx'> 	spin_unlock_irq(&amp;mdev-&gt;req_lock);</div><div class='ctx'> </div><div class='add'>+	if (mdev-&gt;state.conn == C_SYNC_TARGET)</div><div class='add'>+		wait_event(mdev-&gt;ee_wait, !overlapping_resync_write(mdev, e));</div><div class='add'>+</div><div class='ctx'> 	switch (mdev-&gt;net_conf-&gt;wire_protocol) {</div><div class='ctx'> 	case DRBD_PROT_C:</div><div class='ctx'> 		inc_unacked(mdev);</div><div class='hunk'>@@ -2420,7 +2455,7 @@ static int drbd_uuid_compare(struct drbd_conf *mdev, int *rule_nr) __must_hold(l</div><div class='ctx'> 			mdev-&gt;p_uuid[UI_BITMAP] = mdev-&gt;p_uuid[UI_HISTORY_START];</div><div class='ctx'> 			mdev-&gt;p_uuid[UI_HISTORY_START] = mdev-&gt;p_uuid[UI_HISTORY_START + 1];</div><div class='ctx'> </div><div class='del'>-			dev_info(DEV, "Did not got last syncUUID packet, corrected:\n");</div><div class='add'>+			dev_info(DEV, "Lost last syncUUID packet, corrected:\n");</div><div class='ctx'> 			drbd_uuid_dump(mdev, "peer", mdev-&gt;p_uuid, mdev-&gt;p_uuid[UI_SIZE], mdev-&gt;p_uuid[UI_FLAGS]);</div><div class='ctx'> </div><div class='ctx'> 			return -1;</div><div class='hunk'>@@ -2806,10 +2841,10 @@ static int receive_SyncParam(struct drbd_conf *mdev, enum drbd_packets cmd, unsi</div><div class='ctx'> </div><div class='ctx'> 	if (apv &gt;= 88) {</div><div class='ctx'> 		if (apv == 88) {</div><div class='del'>-			if (data_size &gt; SHARED_SECRET_MAX) {</div><div class='del'>-				dev_err(DEV, "verify-alg too long, "</div><div class='del'>-				    "peer wants %u, accepting only %u byte\n",</div><div class='del'>-						data_size, SHARED_SECRET_MAX);</div><div class='add'>+			if (data_size &gt; SHARED_SECRET_MAX || data_size == 0) {</div><div class='add'>+				dev_err(DEV, "verify-alg of wrong size, "</div><div class='add'>+					"peer wants %u, accepting only up to %u byte\n",</div><div class='add'>+					data_size, SHARED_SECRET_MAX);</div><div class='ctx'> 				return false;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -3168,9 +3203,20 @@ static int receive_state(struct drbd_conf *mdev, enum drbd_packets cmd, unsigned</div><div class='ctx'> 	os = ns = mdev-&gt;state;</div><div class='ctx'> 	spin_unlock_irq(&amp;mdev-&gt;req_lock);</div><div class='ctx'> </div><div class='del'>-	/* peer says his disk is uptodate, while we think it is inconsistent,</div><div class='del'>-	 * and this happens while we think we have a sync going on. */</div><div class='del'>-	if (os.pdsk == D_INCONSISTENT &amp;&amp; real_peer_disk == D_UP_TO_DATE &amp;&amp;</div><div class='add'>+	/* If some other part of the code (asender thread, timeout)</div><div class='add'>+	 * already decided to close the connection again,</div><div class='add'>+	 * we must not "re-establish" it here. */</div><div class='add'>+	if (os.conn &lt;= C_TEAR_DOWN)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* If this is the "end of sync" confirmation, usually the peer disk</div><div class='add'>+	 * transitions from D_INCONSISTENT to D_UP_TO_DATE. For empty (0 bits</div><div class='add'>+	 * set) resync started in PausedSyncT, or if the timing of pause-/</div><div class='add'>+	 * unpause-sync events has been "just right", the peer disk may</div><div class='add'>+	 * transition from D_CONSISTENT to D_UP_TO_DATE as well.</div><div class='add'>+	 */</div><div class='add'>+	if ((os.pdsk == D_INCONSISTENT || os.pdsk == D_CONSISTENT) &amp;&amp;</div><div class='add'>+	    real_peer_disk == D_UP_TO_DATE &amp;&amp;</div><div class='ctx'> 	    os.conn &gt; C_CONNECTED &amp;&amp; os.disk == D_UP_TO_DATE) {</div><div class='ctx'> 		/* If we are (becoming) SyncSource, but peer is still in sync</div><div class='ctx'> 		 * preparation, ignore its uptodate-ness to avoid flapping, it</div><div class='hunk'>@@ -3288,7 +3334,7 @@ static int receive_state(struct drbd_conf *mdev, enum drbd_packets cmd, unsigned</div><div class='ctx'> 			/* Nowadays only used when forcing a node into primary role and</div><div class='ctx'> 			   setting its disk to UpToDate with that */</div><div class='ctx'> 			drbd_send_uuids(mdev);</div><div class='del'>-			drbd_send_state(mdev);</div><div class='add'>+			drbd_send_current_state(mdev);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3776,6 +3822,13 @@ static void drbd_disconnect(struct drbd_conf *mdev)</div><div class='ctx'> 	if (mdev-&gt;state.conn == C_STANDALONE)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* We are about to start the cleanup after connection loss.</div><div class='add'>+	 * Make sure drbd_make_request knows about that.</div><div class='add'>+	 * Usually we should be in some network failure state already,</div><div class='add'>+	 * but just in case we are not, we fix it up here.</div><div class='add'>+	 */</div><div class='add'>+	drbd_force_state(mdev, NS(conn, C_NETWORK_FAILURE));</div><div class='add'>+</div><div class='ctx'> 	/* asender does not clean up anything. it must not interfere, either */</div><div class='ctx'> 	drbd_thread_stop(&amp;mdev-&gt;asender);</div><div class='ctx'> 	drbd_free_sock(mdev);</div><div class='hunk'>@@ -3803,8 +3856,6 @@ static void drbd_disconnect(struct drbd_conf *mdev)</div><div class='ctx'> 	atomic_set(&amp;mdev-&gt;rs_pending_cnt, 0);</div><div class='ctx'> 	wake_up(&amp;mdev-&gt;misc_wait);</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;mdev-&gt;request_timer);</div><div class='del'>-</div><div class='ctx'> 	/* make sure syncer is stopped and w_resume_next_sg queued */</div><div class='ctx'> 	del_timer_sync(&amp;mdev-&gt;resync_timer);</div><div class='ctx'> 	resync_timer_fn((unsigned long)mdev);</div><div class='hunk'>@@ -4433,7 +4484,7 @@ static int got_BarrierAck(struct drbd_conf *mdev, struct p_header80 *h)</div><div class='ctx'> </div><div class='ctx'> 	if (mdev-&gt;state.conn == C_AHEAD &amp;&amp;</div><div class='ctx'> 	    atomic_read(&amp;mdev-&gt;ap_in_flight) == 0 &amp;&amp;</div><div class='del'>-	    !test_and_set_bit(AHEAD_TO_SYNC_SOURCE, &amp;mdev-&gt;current_epoch-&gt;flags)) {</div><div class='add'>+	    !test_and_set_bit(AHEAD_TO_SYNC_SOURCE, &amp;mdev-&gt;flags)) {</div><div class='ctx'> 		mdev-&gt;start_resync_timer.expires = jiffies + HZ;</div><div class='ctx'> 		add_timer(&amp;mdev-&gt;start_resync_timer);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/block/drbd/drbd_req.c b/drivers/block/drbd/drbd_req.c<br/>index 4a0f314086e5..9c5c84946b05 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/drbd/drbd_req.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/drbd/drbd_req.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/drbd/drbd_req.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_req.c</a></div><div class='hunk'>@@ -37,6 +37,7 @@ static void _drbd_start_io_acct(struct drbd_conf *mdev, struct drbd_request *req</div><div class='ctx'> 	const int rw = bio_data_dir(bio);</div><div class='ctx'> 	int cpu;</div><div class='ctx'> 	cpu = part_stat_lock();</div><div class='add'>+	part_round_stats(cpu, &amp;mdev-&gt;vdisk-&gt;part0);</div><div class='ctx'> 	part_stat_inc(cpu, &amp;mdev-&gt;vdisk-&gt;part0, ios[rw]);</div><div class='ctx'> 	part_stat_add(cpu, &amp;mdev-&gt;vdisk-&gt;part0, sectors[rw], bio_sectors(bio));</div><div class='ctx'> 	part_inc_in_flight(&amp;mdev-&gt;vdisk-&gt;part0, rw);</div><div class='hunk'>@@ -214,8 +215,7 @@ void _req_may_be_done(struct drbd_request *req, struct bio_and_error *m)</div><div class='ctx'> {</div><div class='ctx'> 	const unsigned long s = req-&gt;rq_state;</div><div class='ctx'> 	struct drbd_conf *mdev = req-&gt;mdev;</div><div class='del'>-	/* only WRITES may end up here without a master bio (on barrier ack) */</div><div class='del'>-	int rw = req-&gt;master_bio ? bio_data_dir(req-&gt;master_bio) : WRITE;</div><div class='add'>+	int rw = req-&gt;rq_state &amp; RQ_WRITE ? WRITE : READ;</div><div class='ctx'> </div><div class='ctx'> 	/* we must not complete the master bio, while it is</div><div class='ctx'> 	 *	still being processed by _drbd_send_zc_bio (drbd_send_dblock)</div><div class='hunk'>@@ -230,7 +230,7 @@ void _req_may_be_done(struct drbd_request *req, struct bio_and_error *m)</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (s &amp; RQ_NET_PENDING)</div><div class='ctx'> 		return;</div><div class='del'>-	if (s &amp; RQ_LOCAL_PENDING)</div><div class='add'>+	if (s &amp; RQ_LOCAL_PENDING &amp;&amp; !(s &amp; RQ_LOCAL_ABORTED))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (req-&gt;master_bio) {</div><div class='hunk'>@@ -277,6 +277,9 @@ void _req_may_be_done(struct drbd_request *req, struct bio_and_error *m)</div><div class='ctx'> 		req-&gt;master_bio = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (s &amp; RQ_LOCAL_PENDING)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if ((s &amp; RQ_NET_MASK) == 0 || (s &amp; RQ_NET_DONE)) {</div><div class='ctx'> 		/* this is disconnected (local only) operation,</div><div class='ctx'> 		 * or protocol C P_WRITE_ACK,</div><div class='hunk'>@@ -429,7 +432,7 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case completed_ok:</div><div class='del'>-		if (bio_data_dir(req-&gt;master_bio) == WRITE)</div><div class='add'>+		if (req-&gt;rq_state &amp; RQ_WRITE)</div><div class='ctx'> 			mdev-&gt;writ_cnt += req-&gt;size&gt;&gt;9;</div><div class='ctx'> 		else</div><div class='ctx'> 			mdev-&gt;read_cnt += req-&gt;size&gt;&gt;9;</div><div class='hunk'>@@ -438,7 +441,14 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what,</div><div class='ctx'> 		req-&gt;rq_state &amp;= ~RQ_LOCAL_PENDING;</div><div class='ctx'> </div><div class='ctx'> 		_req_may_be_done_not_susp(req, m);</div><div class='del'>-		put_ldev(mdev);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case abort_disk_io:</div><div class='add'>+		req-&gt;rq_state |= RQ_LOCAL_ABORTED;</div><div class='add'>+		if (req-&gt;rq_state &amp; RQ_WRITE)</div><div class='add'>+			_req_may_be_done_not_susp(req, m);</div><div class='add'>+		else</div><div class='add'>+			goto goto_queue_for_net_read;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case write_completed_with_error:</div><div class='hunk'>@@ -447,7 +457,6 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what,</div><div class='ctx'> </div><div class='ctx'> 		__drbd_chk_io_error(mdev, false);</div><div class='ctx'> 		_req_may_be_done_not_susp(req, m);</div><div class='del'>-		put_ldev(mdev);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case read_ahead_completed_with_error:</div><div class='hunk'>@@ -455,7 +464,6 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what,</div><div class='ctx'> 		req-&gt;rq_state |= RQ_LOCAL_COMPLETED;</div><div class='ctx'> 		req-&gt;rq_state &amp;= ~RQ_LOCAL_PENDING;</div><div class='ctx'> 		_req_may_be_done_not_susp(req, m);</div><div class='del'>-		put_ldev(mdev);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case read_completed_with_error:</div><div class='hunk'>@@ -467,7 +475,8 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what,</div><div class='ctx'> 		D_ASSERT(!(req-&gt;rq_state &amp; RQ_NET_MASK));</div><div class='ctx'> </div><div class='ctx'> 		__drbd_chk_io_error(mdev, false);</div><div class='del'>-		put_ldev(mdev);</div><div class='add'>+</div><div class='add'>+	goto_queue_for_net_read:</div><div class='ctx'> </div><div class='ctx'> 		/* no point in retrying if there is no good remote data,</div><div class='ctx'> 		 * or we have no connection. */</div><div class='hunk'>@@ -556,10 +565,8 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what,</div><div class='ctx'> 		drbd_queue_work(&amp;mdev-&gt;data.work, &amp;req-&gt;w);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case oos_handed_to_network:</div><div class='del'>-		/* actually the same */</div><div class='add'>+	case read_retry_remote_canceled:</div><div class='ctx'> 	case send_canceled:</div><div class='del'>-		/* treat it the same */</div><div class='ctx'> 	case send_failed:</div><div class='ctx'> 		/* real cleanup will be done from tl_clear.  just update flags</div><div class='ctx'> 		 * so it is no longer marked as on the worker queue */</div><div class='hunk'>@@ -589,17 +596,17 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what,</div><div class='ctx'> 		}</div><div class='ctx'> 		req-&gt;rq_state &amp;= ~RQ_NET_QUEUED;</div><div class='ctx'> 		req-&gt;rq_state |= RQ_NET_SENT;</div><div class='del'>-		/* because _drbd_send_zc_bio could sleep, and may want to</div><div class='del'>-		 * dereference the bio even after the "write_acked_by_peer" and</div><div class='del'>-		 * "completed_ok" events came in, once we return from</div><div class='del'>-		 * _drbd_send_zc_bio (drbd_send_dblock), we have to check</div><div class='del'>-		 * whether it is done already, and end it.  */</div><div class='ctx'> 		_req_may_be_done_not_susp(req, m);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case read_retry_remote_canceled:</div><div class='add'>+	case oos_handed_to_network:</div><div class='add'>+		/* Was not set PENDING, no longer QUEUED, so is now DONE</div><div class='add'>+		 * as far as this connection is concerned. */</div><div class='ctx'> 		req-&gt;rq_state &amp;= ~RQ_NET_QUEUED;</div><div class='del'>-		/* fall through, in case we raced with drbd_disconnect */</div><div class='add'>+		req-&gt;rq_state |= RQ_NET_DONE;</div><div class='add'>+		_req_may_be_done_not_susp(req, m);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case connection_lost_while_pending:</div><div class='ctx'> 		/* transfer log cleanup after connection loss */</div><div class='ctx'> 		/* assert something? */</div><div class='hunk'>@@ -616,8 +623,6 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what,</div><div class='ctx'> 			_req_may_be_done(req, m); /* Allowed while state.susp */</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case write_acked_by_peer_and_sis:</div><div class='del'>-		req-&gt;rq_state |= RQ_NET_SIS;</div><div class='ctx'> 	case conflict_discarded_by_peer:</div><div class='ctx'> 		/* for discarded conflicting writes of multiple primaries,</div><div class='ctx'> 		 * there is no need to keep anything in the tl, potential</div><div class='hunk'>@@ -628,18 +633,15 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what,</div><div class='ctx'> 			      (unsigned long long)req-&gt;sector, req-&gt;size);</div><div class='ctx'> 		req-&gt;rq_state |= RQ_NET_DONE;</div><div class='ctx'> 		/* fall through */</div><div class='add'>+	case write_acked_by_peer_and_sis:</div><div class='ctx'> 	case write_acked_by_peer:</div><div class='add'>+		if (what == write_acked_by_peer_and_sis)</div><div class='add'>+			req-&gt;rq_state |= RQ_NET_SIS;</div><div class='ctx'> 		/* protocol C; successfully written on peer.</div><div class='del'>-		 * Nothing to do here.</div><div class='add'>+		 * Nothing more to do here.</div><div class='ctx'> 		 * We want to keep the tl in place for all protocols, to cater</div><div class='del'>-		 * for volatile write-back caches on lower level devices.</div><div class='del'>-		 *</div><div class='del'>-		 * A barrier request is expected to have forced all prior</div><div class='del'>-		 * requests onto stable storage, so completion of a barrier</div><div class='del'>-		 * request could set NET_DONE right here, and not wait for the</div><div class='del'>-		 * P_BARRIER_ACK, but that is an unnecessary optimization. */</div><div class='add'>+		 * for volatile write-back caches on lower level devices. */</div><div class='ctx'> </div><div class='del'>-		/* this makes it effectively the same as for: */</div><div class='ctx'> 	case recv_acked_by_peer:</div><div class='ctx'> 		/* protocol B; pretends to be successfully written on peer.</div><div class='ctx'> 		 * see also notes above in handed_over_to_network about</div><div class='hunk'>@@ -773,6 +775,7 @@ static int drbd_make_request_common(struct drbd_conf *mdev, struct bio *bio, uns</div><div class='ctx'> 	int local, remote, send_oos = 0;</div><div class='ctx'> 	int err = -EIO;</div><div class='ctx'> 	int ret = 0;</div><div class='add'>+	union drbd_state s;</div><div class='ctx'> </div><div class='ctx'> 	/* allocate outside of all locks; */</div><div class='ctx'> 	req = drbd_req_new(mdev, bio);</div><div class='hunk'>@@ -834,8 +837,9 @@ static int drbd_make_request_common(struct drbd_conf *mdev, struct bio *bio, uns</div><div class='ctx'> 		drbd_al_begin_io(mdev, sector);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	remote = remote &amp;&amp; drbd_should_do_remote(mdev-&gt;state);</div><div class='del'>-	send_oos = rw == WRITE &amp;&amp; drbd_should_send_oos(mdev-&gt;state);</div><div class='add'>+	s = mdev-&gt;state;</div><div class='add'>+	remote = remote &amp;&amp; drbd_should_do_remote(s);</div><div class='add'>+	send_oos = rw == WRITE &amp;&amp; drbd_should_send_oos(s);</div><div class='ctx'> 	D_ASSERT(!(remote &amp;&amp; send_oos));</div><div class='ctx'> </div><div class='ctx'> 	if (!(local || remote) &amp;&amp; !is_susp(mdev-&gt;state)) {</div><div class='hunk'>@@ -867,7 +871,7 @@ allocate_barrier:</div><div class='ctx'> </div><div class='ctx'> 	if (is_susp(mdev-&gt;state)) {</div><div class='ctx'> 		/* If we got suspended, use the retry mechanism of</div><div class='del'>-		   generic_make_request() to restart processing of this</div><div class='add'>+		   drbd_make_request() to restart processing of this</div><div class='ctx'> 		   bio. In the next call to drbd_make_request</div><div class='ctx'> 		   we sleep in inc_ap_bio() */</div><div class='ctx'> 		ret = 1;</div><div class='hunk'>@@ -1091,7 +1095,6 @@ void drbd_make_request(struct request_queue *q, struct bio *bio)</div><div class='ctx'> 	 */</div><div class='ctx'> 	D_ASSERT(bio-&gt;bi_size &gt; 0);</div><div class='ctx'> 	D_ASSERT((bio-&gt;bi_size &amp; 0x1ff) == 0);</div><div class='del'>-	D_ASSERT(bio-&gt;bi_idx == 0);</div><div class='ctx'> </div><div class='ctx'> 	/* to make some things easier, force alignment of requests within the</div><div class='ctx'> 	 * granularity of our hash tables */</div><div class='hunk'>@@ -1099,8 +1102,9 @@ void drbd_make_request(struct request_queue *q, struct bio *bio)</div><div class='ctx'> 	e_enr = (bio-&gt;bi_sector+(bio-&gt;bi_size&gt;&gt;9)-1) &gt;&gt; HT_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	if (likely(s_enr == e_enr)) {</div><div class='del'>-		inc_ap_bio(mdev, 1);</div><div class='del'>-		drbd_make_request_common(mdev, bio, start_time);</div><div class='add'>+		do {</div><div class='add'>+			inc_ap_bio(mdev, 1);</div><div class='add'>+		} while (drbd_make_request_common(mdev, bio, start_time));</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1196,36 +1200,66 @@ void request_timer_fn(unsigned long data)</div><div class='ctx'> 	struct drbd_conf *mdev = (struct drbd_conf *) data;</div><div class='ctx'> 	struct drbd_request *req; /* oldest request */</div><div class='ctx'> 	struct list_head *le;</div><div class='del'>-	unsigned long et = 0; /* effective timeout = ko_count * timeout */</div><div class='add'>+	unsigned long ent = 0, dt = 0, et, nt; /* effective timeout = ko_count * timeout */</div><div class='add'>+	unsigned long now;</div><div class='ctx'> </div><div class='ctx'> 	if (get_net_conf(mdev)) {</div><div class='del'>-		et = mdev-&gt;net_conf-&gt;timeout*HZ/10 * mdev-&gt;net_conf-&gt;ko_count;</div><div class='add'>+		if (mdev-&gt;state.conn &gt;= C_WF_REPORT_PARAMS)</div><div class='add'>+			ent = mdev-&gt;net_conf-&gt;timeout*HZ/10</div><div class='add'>+				* mdev-&gt;net_conf-&gt;ko_count;</div><div class='ctx'> 		put_net_conf(mdev);</div><div class='ctx'> 	}</div><div class='del'>-	if (!et || mdev-&gt;state.conn &lt; C_WF_REPORT_PARAMS)</div><div class='add'>+	if (get_ldev(mdev)) { /* implicit state.disk &gt;= D_INCONSISTENT */</div><div class='add'>+		dt = mdev-&gt;ldev-&gt;dc.disk_timeout * HZ / 10;</div><div class='add'>+		put_ldev(mdev);</div><div class='add'>+	}</div><div class='add'>+	et = min_not_zero(dt, ent);</div><div class='add'>+</div><div class='add'>+	if (!et)</div><div class='ctx'> 		return; /* Recurring timer stopped */</div><div class='ctx'> </div><div class='add'>+	now = jiffies;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irq(&amp;mdev-&gt;req_lock);</div><div class='ctx'> 	le = &amp;mdev-&gt;oldest_tle-&gt;requests;</div><div class='ctx'> 	if (list_empty(le)) {</div><div class='ctx'> 		spin_unlock_irq(&amp;mdev-&gt;req_lock);</div><div class='del'>-		mod_timer(&amp;mdev-&gt;request_timer, jiffies + et);</div><div class='add'>+		mod_timer(&amp;mdev-&gt;request_timer, now + et);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	le = le-&gt;prev;</div><div class='ctx'> 	req = list_entry(le, struct drbd_request, tl_requests);</div><div class='del'>-	if (time_is_before_eq_jiffies(req-&gt;start_time + et)) {</div><div class='del'>-		if (req-&gt;rq_state &amp; RQ_NET_PENDING) {</div><div class='del'>-			dev_warn(DEV, "Remote failed to finish a request within ko-count * timeout\n");</div><div class='del'>-			_drbd_set_state(_NS(mdev, conn, C_TIMEOUT), CS_VERBOSE, NULL);</div><div class='del'>-		} else {</div><div class='del'>-			dev_warn(DEV, "Local backing block device frozen?\n");</div><div class='del'>-			mod_timer(&amp;mdev-&gt;request_timer, jiffies + et);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		mod_timer(&amp;mdev-&gt;request_timer, req-&gt;start_time + et);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='add'>+	/* The request is considered timed out, if</div><div class='add'>+	 * - we have some effective timeout from the configuration,</div><div class='add'>+	 *   with above state restrictions applied,</div><div class='add'>+	 * - the oldest request is waiting for a response from the network</div><div class='add'>+	 *   resp. the local disk,</div><div class='add'>+	 * - the oldest request is in fact older than the effective timeout,</div><div class='add'>+	 * - the connection was established (resp. disk was attached)</div><div class='add'>+	 *   for longer than the timeout already.</div><div class='add'>+	 * Note that for 32bit jiffies and very stable connections/disks,</div><div class='add'>+	 * we may have a wrap around, which is catched by</div><div class='add'>+	 *   !time_in_range(now, last_..._jif, last_..._jif + timeout).</div><div class='add'>+	 *</div><div class='add'>+	 * Side effect: once per 32bit wrap-around interval, which means every</div><div class='add'>+	 * ~198 days with 250 HZ, we have a window where the timeout would need</div><div class='add'>+	 * to expire twice (worst case) to become effective. Good enough.</div><div class='add'>+	 */</div><div class='add'>+	if (ent &amp;&amp; req-&gt;rq_state &amp; RQ_NET_PENDING &amp;&amp;</div><div class='add'>+		 time_after(now, req-&gt;start_time + ent) &amp;&amp;</div><div class='add'>+		!time_in_range(now, mdev-&gt;last_reconnect_jif, mdev-&gt;last_reconnect_jif + ent)) {</div><div class='add'>+		dev_warn(DEV, "Remote failed to finish a request within ko-count * timeout\n");</div><div class='add'>+		_drbd_set_state(_NS(mdev, conn, C_TIMEOUT), CS_VERBOSE | CS_HARD, NULL);</div><div class='add'>+	}</div><div class='add'>+	if (dt &amp;&amp; req-&gt;rq_state &amp; RQ_LOCAL_PENDING &amp;&amp;</div><div class='add'>+		 time_after(now, req-&gt;start_time + dt) &amp;&amp;</div><div class='add'>+		!time_in_range(now, mdev-&gt;last_reattach_jif, mdev-&gt;last_reattach_jif + dt)) {</div><div class='add'>+		dev_warn(DEV, "Local backing device failed to meet the disk-timeout\n");</div><div class='add'>+		__drbd_chk_io_error(mdev, 1);</div><div class='add'>+	}</div><div class='add'>+	nt = (time_after(now, req-&gt;start_time + et) ? now : req-&gt;start_time) + et;</div><div class='ctx'> 	spin_unlock_irq(&amp;mdev-&gt;req_lock);</div><div class='add'>+	mod_timer(&amp;mdev-&gt;request_timer, nt);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/block/drbd/drbd_req.h b/drivers/block/drbd/drbd_req.h<br/>index 68a234a5fdc5..3d2111919486 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/drbd/drbd_req.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/drbd/drbd_req.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/drbd/drbd_req.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_req.h</a></div><div class='hunk'>@@ -105,6 +105,7 @@ enum drbd_req_event {</div><div class='ctx'> 	read_completed_with_error,</div><div class='ctx'> 	read_ahead_completed_with_error,</div><div class='ctx'> 	write_completed_with_error,</div><div class='add'>+	abort_disk_io,</div><div class='ctx'> 	completed_ok,</div><div class='ctx'> 	resend,</div><div class='ctx'> 	fail_frozen_disk_io,</div><div class='hunk'>@@ -118,18 +119,21 @@ enum drbd_req_event {</div><div class='ctx'>  * same time, so we should hold the request lock anyways.</div><div class='ctx'>  */</div><div class='ctx'> enum drbd_req_state_bits {</div><div class='del'>-	/* 210</div><div class='del'>-	 * 000: no local possible</div><div class='del'>-	 * 001: to be submitted</div><div class='add'>+	/* 3210</div><div class='add'>+	 * 0000: no local possible</div><div class='add'>+	 * 0001: to be submitted</div><div class='ctx'> 	 *    UNUSED, we could map: 011: submitted, completion still pending</div><div class='del'>-	 * 110: completed ok</div><div class='del'>-	 * 010: completed with error</div><div class='add'>+	 * 0110: completed ok</div><div class='add'>+	 * 0010: completed with error</div><div class='add'>+	 * 1001: Aborted (before completion)</div><div class='add'>+	 * 1x10: Aborted and completed -&gt; free</div><div class='ctx'> 	 */</div><div class='ctx'> 	__RQ_LOCAL_PENDING,</div><div class='ctx'> 	__RQ_LOCAL_COMPLETED,</div><div class='ctx'> 	__RQ_LOCAL_OK,</div><div class='add'>+	__RQ_LOCAL_ABORTED,</div><div class='ctx'> </div><div class='del'>-	/* 76543</div><div class='add'>+	/* 87654</div><div class='ctx'> 	 * 00000: no network possible</div><div class='ctx'> 	 * 00001: to be send</div><div class='ctx'> 	 * 00011: to be send, on worker queue</div><div class='hunk'>@@ -199,8 +203,9 @@ enum drbd_req_state_bits {</div><div class='ctx'> #define RQ_LOCAL_PENDING   (1UL &lt;&lt; __RQ_LOCAL_PENDING)</div><div class='ctx'> #define RQ_LOCAL_COMPLETED (1UL &lt;&lt; __RQ_LOCAL_COMPLETED)</div><div class='ctx'> #define RQ_LOCAL_OK        (1UL &lt;&lt; __RQ_LOCAL_OK)</div><div class='add'>+#define RQ_LOCAL_ABORTED   (1UL &lt;&lt; __RQ_LOCAL_ABORTED)</div><div class='ctx'> </div><div class='del'>-#define RQ_LOCAL_MASK      ((RQ_LOCAL_OK &lt;&lt; 1)-1) /* 0x07 */</div><div class='add'>+#define RQ_LOCAL_MASK      ((RQ_LOCAL_ABORTED &lt;&lt; 1)-1)</div><div class='ctx'> </div><div class='ctx'> #define RQ_NET_PENDING     (1UL &lt;&lt; __RQ_NET_PENDING)</div><div class='ctx'> #define RQ_NET_QUEUED      (1UL &lt;&lt; __RQ_NET_QUEUED)</div><div class='head'>diff --git a/drivers/block/drbd/drbd_worker.c b/drivers/block/drbd/drbd_worker.c<br/>index 4d3e6f6213ba..620c70ff2231 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/drbd/drbd_worker.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/drbd/drbd_worker.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/drbd/drbd_worker.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/drbd/drbd_worker.c</a></div><div class='hunk'>@@ -70,11 +70,29 @@ rwlock_t global_state_lock;</div><div class='ctx'> void drbd_md_io_complete(struct bio *bio, int error)</div><div class='ctx'> {</div><div class='ctx'> 	struct drbd_md_io *md_io;</div><div class='add'>+	struct drbd_conf *mdev;</div><div class='ctx'> </div><div class='ctx'> 	md_io = (struct drbd_md_io *)bio-&gt;bi_private;</div><div class='add'>+	mdev = container_of(md_io, struct drbd_conf, md_io);</div><div class='add'>+</div><div class='ctx'> 	md_io-&gt;error = error;</div><div class='ctx'> </div><div class='del'>-	complete(&amp;md_io-&gt;event);</div><div class='add'>+	/* We grabbed an extra reference in _drbd_md_sync_page_io() to be able</div><div class='add'>+	 * to timeout on the lower level device, and eventually detach from it.</div><div class='add'>+	 * If this io completion runs after that timeout expired, this</div><div class='add'>+	 * drbd_md_put_buffer() may allow us to finally try and re-attach.</div><div class='add'>+	 * During normal operation, this only puts that extra reference</div><div class='add'>+	 * down to 1 again.</div><div class='add'>+	 * Make sure we first drop the reference, and only then signal</div><div class='add'>+	 * completion, or we may (in drbd_al_read_log()) cycle so fast into the</div><div class='add'>+	 * next drbd_md_sync_page_io(), that we trigger the</div><div class='add'>+	 * ASSERT(atomic_read(&amp;mdev-&gt;md_io_in_use) == 1) there.</div><div class='add'>+	 */</div><div class='add'>+	drbd_md_put_buffer(mdev);</div><div class='add'>+	md_io-&gt;done = 1;</div><div class='add'>+	wake_up(&amp;mdev-&gt;misc_wait);</div><div class='add'>+	bio_put(bio);</div><div class='add'>+	put_ldev(mdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* reads on behalf of the partner,</div><div class='hunk'>@@ -226,6 +244,7 @@ void drbd_endio_pri(struct bio *bio, int error)</div><div class='ctx'> 	spin_lock_irqsave(&amp;mdev-&gt;req_lock, flags);</div><div class='ctx'> 	__req_mod(req, what, &amp;m);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;mdev-&gt;req_lock, flags);</div><div class='add'>+	put_ldev(mdev);</div><div class='ctx'> </div><div class='ctx'> 	if (m.bio)</div><div class='ctx'> 		complete_master_bio(mdev, &amp;m);</div><div class='hunk'>@@ -290,7 +309,7 @@ void drbd_csum_bio(struct drbd_conf *mdev, struct crypto_hash *tfm, struct bio *</div><div class='ctx'> 	sg_init_table(&amp;sg, 1);</div><div class='ctx'> 	crypto_hash_init(&amp;desc);</div><div class='ctx'> </div><div class='del'>-	__bio_for_each_segment(bvec, bio, i, 0) {</div><div class='add'>+	bio_for_each_segment(bvec, bio, i) {</div><div class='ctx'> 		sg_set_page(&amp;sg, bvec-&gt;bv_page, bvec-&gt;bv_len, bvec-&gt;bv_offset);</div><div class='ctx'> 		crypto_hash_update(&amp;desc, &amp;sg, sg.length);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -728,7 +747,7 @@ int w_start_resync(struct drbd_conf *mdev, struct drbd_work *w, int cancel)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	drbd_start_resync(mdev, C_SYNC_SOURCE);</div><div class='del'>-	clear_bit(AHEAD_TO_SYNC_SOURCE, &amp;mdev-&gt;current_epoch-&gt;flags);</div><div class='add'>+	clear_bit(AHEAD_TO_SYNC_SOURCE, &amp;mdev-&gt;flags);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1519,14 +1538,14 @@ void drbd_start_resync(struct drbd_conf *mdev, enum drbd_conns side)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	drbd_state_lock(mdev);</div><div class='del'>-</div><div class='add'>+	write_lock_irq(&amp;global_state_lock);</div><div class='ctx'> 	if (!get_ldev_if_state(mdev, D_NEGOTIATING)) {</div><div class='add'>+		write_unlock_irq(&amp;global_state_lock);</div><div class='ctx'> 		drbd_state_unlock(mdev);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	write_lock_irq(&amp;global_state_lock);</div><div class='del'>-	ns = mdev-&gt;state;</div><div class='add'>+	ns.i = mdev-&gt;state.i;</div><div class='ctx'> </div><div class='ctx'> 	ns.aftr_isp = !_drbd_may_sync_now(mdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c<br/>index b0b00d70c166..cce7df367b79 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/floppy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/floppy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/floppy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/floppy.c</a></div><div class='hunk'>@@ -551,7 +551,7 @@ static void floppy_ready(void);</div><div class='ctx'> static void floppy_start(void);</div><div class='ctx'> static void process_fd_request(void);</div><div class='ctx'> static void recalibrate_floppy(void);</div><div class='del'>-static void floppy_shutdown(unsigned long);</div><div class='add'>+static void floppy_shutdown(struct work_struct *);</div><div class='ctx'> </div><div class='ctx'> static int floppy_request_regions(int);</div><div class='ctx'> static void floppy_release_regions(int);</div><div class='hunk'>@@ -588,6 +588,8 @@ static int buffer_max = -1;</div><div class='ctx'> static struct floppy_fdc_state fdc_state[N_FDC];</div><div class='ctx'> static int fdc;			/* current fdc */</div><div class='ctx'> </div><div class='add'>+static struct workqueue_struct *floppy_wq;</div><div class='add'>+</div><div class='ctx'> static struct floppy_struct *_floppy = floppy_type;</div><div class='ctx'> static unsigned char current_drive;</div><div class='ctx'> static long current_count_sectors;</div><div class='hunk'>@@ -629,16 +631,15 @@ static inline void set_debugt(void) { }</div><div class='ctx'> static inline void debugt(const char *func, const char *msg) { }</div><div class='ctx'> #endif /* DEBUGT */</div><div class='ctx'> </div><div class='del'>-typedef void (*timeout_fn)(unsigned long);</div><div class='del'>-static DEFINE_TIMER(fd_timeout, floppy_shutdown, 0, 0);</div><div class='ctx'> </div><div class='add'>+static DECLARE_DELAYED_WORK(fd_timeout, floppy_shutdown);</div><div class='ctx'> static const char *timeout_message;</div><div class='ctx'> </div><div class='ctx'> static void is_alive(const char *func, const char *message)</div><div class='ctx'> {</div><div class='ctx'> 	/* this routine checks whether the floppy driver is "alive" */</div><div class='ctx'> 	if (test_bit(0, &amp;fdc_busy) &amp;&amp; command_status &lt; 2 &amp;&amp;</div><div class='del'>-	    !timer_pending(&amp;fd_timeout)) {</div><div class='add'>+	    !delayed_work_pending(&amp;fd_timeout)) {</div><div class='ctx'> 		DPRINT("%s: timeout handler died.  %s\n", func, message);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -666,15 +667,18 @@ static int output_log_pos;</div><div class='ctx'> </div><div class='ctx'> static void __reschedule_timeout(int drive, const char *message)</div><div class='ctx'> {</div><div class='add'>+	unsigned long delay;</div><div class='add'>+</div><div class='ctx'> 	if (drive == current_reqD)</div><div class='ctx'> 		drive = current_drive;</div><div class='del'>-	del_timer(&amp;fd_timeout);</div><div class='add'>+</div><div class='ctx'> 	if (drive &lt; 0 || drive &gt;= N_DRIVE) {</div><div class='del'>-		fd_timeout.expires = jiffies + 20UL * HZ;</div><div class='add'>+		delay = 20UL * HZ;</div><div class='ctx'> 		drive = 0;</div><div class='ctx'> 	} else</div><div class='del'>-		fd_timeout.expires = jiffies + UDP-&gt;timeout;</div><div class='del'>-	add_timer(&amp;fd_timeout);</div><div class='add'>+		delay = UDP-&gt;timeout;</div><div class='add'>+</div><div class='add'>+	queue_delayed_work(floppy_wq, &amp;fd_timeout, delay);</div><div class='ctx'> 	if (UDP-&gt;flags &amp; FD_DEBUG)</div><div class='ctx'> 		DPRINT("reschedule timeout %s\n", message);</div><div class='ctx'> 	timeout_message = message;</div><div class='hunk'>@@ -872,7 +876,7 @@ static int lock_fdc(int drive, bool interruptible)</div><div class='ctx'> </div><div class='ctx'> 	command_status = FD_COMMAND_NONE;</div><div class='ctx'> </div><div class='del'>-	__reschedule_timeout(drive, "lock fdc");</div><div class='add'>+	reschedule_timeout(drive, "lock fdc");</div><div class='ctx'> 	set_fdc(drive);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -880,23 +884,15 @@ static int lock_fdc(int drive, bool interruptible)</div><div class='ctx'> /* unlocks the driver */</div><div class='ctx'> static void unlock_fdc(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	raw_cmd = NULL;</div><div class='ctx'> 	if (!test_bit(0, &amp;fdc_busy))</div><div class='ctx'> 		DPRINT("FDC access conflict!\n");</div><div class='ctx'> </div><div class='del'>-	if (do_floppy)</div><div class='del'>-		DPRINT("device interrupt still active at FDC release: %pf!\n",</div><div class='del'>-		       do_floppy);</div><div class='add'>+	raw_cmd = NULL;</div><div class='ctx'> 	command_status = FD_COMMAND_NONE;</div><div class='del'>-	spin_lock_irqsave(&amp;floppy_lock, flags);</div><div class='del'>-	del_timer(&amp;fd_timeout);</div><div class='add'>+	__cancel_delayed_work(&amp;fd_timeout);</div><div class='add'>+	do_floppy = NULL;</div><div class='ctx'> 	cont = NULL;</div><div class='ctx'> 	clear_bit(0, &amp;fdc_busy);</div><div class='del'>-	if (current_req || set_next_request())</div><div class='del'>-		do_fd_request(current_req-&gt;q);</div><div class='del'>-	spin_unlock_irqrestore(&amp;floppy_lock, flags);</div><div class='ctx'> 	wake_up(&amp;fdc_wait);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -968,26 +964,24 @@ static DECLARE_WORK(floppy_work, NULL);</div><div class='ctx'> </div><div class='ctx'> static void schedule_bh(void (*handler)(void))</div><div class='ctx'> {</div><div class='add'>+	WARN_ON(work_pending(&amp;floppy_work));</div><div class='add'>+</div><div class='ctx'> 	PREPARE_WORK(&amp;floppy_work, (work_func_t)handler);</div><div class='del'>-	schedule_work(&amp;floppy_work);</div><div class='add'>+	queue_work(floppy_wq, &amp;floppy_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static DEFINE_TIMER(fd_timer, NULL, 0, 0);</div><div class='add'>+static DECLARE_DELAYED_WORK(fd_timer, NULL);</div><div class='ctx'> </div><div class='ctx'> static void cancel_activity(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;floppy_lock, flags);</div><div class='ctx'> 	do_floppy = NULL;</div><div class='del'>-	PREPARE_WORK(&amp;floppy_work, (work_func_t)empty);</div><div class='del'>-	del_timer(&amp;fd_timer);</div><div class='del'>-	spin_unlock_irqrestore(&amp;floppy_lock, flags);</div><div class='add'>+	cancel_delayed_work_sync(&amp;fd_timer);</div><div class='add'>+	cancel_work_sync(&amp;floppy_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* this function makes sure that the disk stays in the drive during the</div><div class='ctx'>  * transfer */</div><div class='del'>-static void fd_watchdog(void)</div><div class='add'>+static void fd_watchdog(struct work_struct *arg)</div><div class='ctx'> {</div><div class='ctx'> 	debug_dcl(DP-&gt;flags, "calling disk change from watchdog\n");</div><div class='ctx'> </div><div class='hunk'>@@ -997,21 +991,20 @@ static void fd_watchdog(void)</div><div class='ctx'> 		cont-&gt;done(0);</div><div class='ctx'> 		reset_fdc();</div><div class='ctx'> 	} else {</div><div class='del'>-		del_timer(&amp;fd_timer);</div><div class='del'>-		fd_timer.function = (timeout_fn)fd_watchdog;</div><div class='del'>-		fd_timer.expires = jiffies + HZ / 10;</div><div class='del'>-		add_timer(&amp;fd_timer);</div><div class='add'>+		cancel_delayed_work(&amp;fd_timer);</div><div class='add'>+		PREPARE_DELAYED_WORK(&amp;fd_timer, fd_watchdog);</div><div class='add'>+		queue_delayed_work(floppy_wq, &amp;fd_timer, HZ / 10);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void main_command_interrupt(void)</div><div class='ctx'> {</div><div class='del'>-	del_timer(&amp;fd_timer);</div><div class='add'>+	cancel_delayed_work(&amp;fd_timer);</div><div class='ctx'> 	cont-&gt;interrupt();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* waits for a delay (spinup or select) to pass */</div><div class='del'>-static int fd_wait_for_completion(unsigned long delay, timeout_fn function)</div><div class='add'>+static int fd_wait_for_completion(unsigned long expires, work_func_t function)</div><div class='ctx'> {</div><div class='ctx'> 	if (FDCS-&gt;reset) {</div><div class='ctx'> 		reset_fdc();	/* do the reset during sleep to win time</div><div class='hunk'>@@ -1020,11 +1013,10 @@ static int fd_wait_for_completion(unsigned long delay, timeout_fn function)</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (time_before(jiffies, delay)) {</div><div class='del'>-		del_timer(&amp;fd_timer);</div><div class='del'>-		fd_timer.function = function;</div><div class='del'>-		fd_timer.expires = delay;</div><div class='del'>-		add_timer(&amp;fd_timer);</div><div class='add'>+	if (time_before(jiffies, expires)) {</div><div class='add'>+		cancel_delayed_work(&amp;fd_timer);</div><div class='add'>+		PREPARE_DELAYED_WORK(&amp;fd_timer, function);</div><div class='add'>+		queue_delayed_work(floppy_wq, &amp;fd_timer, expires - jiffies);</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1342,7 +1334,7 @@ static int fdc_dtr(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	FDCS-&gt;dtr = raw_cmd-&gt;rate &amp; 3;</div><div class='ctx'> 	return fd_wait_for_completion(jiffies + 2UL * HZ / 100,</div><div class='del'>-				      (timeout_fn)floppy_ready);</div><div class='add'>+				      (work_func_t)floppy_ready);</div><div class='ctx'> }				/* fdc_dtr */</div><div class='ctx'> </div><div class='ctx'> static void tell_sector(void)</div><div class='hunk'>@@ -1447,7 +1439,7 @@ static void setup_rw_floppy(void)</div><div class='ctx'> 	int flags;</div><div class='ctx'> 	int dflags;</div><div class='ctx'> 	unsigned long ready_date;</div><div class='del'>-	timeout_fn function;</div><div class='add'>+	work_func_t function;</div><div class='ctx'> </div><div class='ctx'> 	flags = raw_cmd-&gt;flags;</div><div class='ctx'> 	if (flags &amp; (FD_RAW_READ | FD_RAW_WRITE))</div><div class='hunk'>@@ -1461,9 +1453,9 @@ static void setup_rw_floppy(void)</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (time_after(ready_date, jiffies + DP-&gt;select_delay)) {</div><div class='ctx'> 			ready_date -= DP-&gt;select_delay;</div><div class='del'>-			function = (timeout_fn)floppy_start;</div><div class='add'>+			function = (work_func_t)floppy_start;</div><div class='ctx'> 		} else</div><div class='del'>-			function = (timeout_fn)setup_rw_floppy;</div><div class='add'>+			function = (work_func_t)setup_rw_floppy;</div><div class='ctx'> </div><div class='ctx'> 		/* wait until the floppy is spinning fast enough */</div><div class='ctx'> 		if (fd_wait_for_completion(ready_date, function))</div><div class='hunk'>@@ -1493,7 +1485,7 @@ static void setup_rw_floppy(void)</div><div class='ctx'> 		inr = result();</div><div class='ctx'> 		cont-&gt;interrupt();</div><div class='ctx'> 	} else if (flags &amp; FD_RAW_NEED_DISK)</div><div class='del'>-		fd_watchdog();</div><div class='add'>+		fd_watchdog(NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int blind_seek;</div><div class='hunk'>@@ -1802,20 +1794,22 @@ static void show_floppy(void)</div><div class='ctx'> 		pr_info("do_floppy=%pf\n", do_floppy);</div><div class='ctx'> 	if (work_pending(&amp;floppy_work))</div><div class='ctx'> 		pr_info("floppy_work.func=%pf\n", floppy_work.func);</div><div class='del'>-	if (timer_pending(&amp;fd_timer))</div><div class='del'>-		pr_info("fd_timer.function=%pf\n", fd_timer.function);</div><div class='del'>-	if (timer_pending(&amp;fd_timeout)) {</div><div class='del'>-		pr_info("timer_function=%pf\n", fd_timeout.function);</div><div class='del'>-		pr_info("expires=%lu\n", fd_timeout.expires - jiffies);</div><div class='del'>-		pr_info("now=%lu\n", jiffies);</div><div class='del'>-	}</div><div class='add'>+	if (delayed_work_pending(&amp;fd_timer))</div><div class='add'>+		pr_info("delayed work.function=%p expires=%ld\n",</div><div class='add'>+		       fd_timer.work.func,</div><div class='add'>+		       fd_timer.timer.expires - jiffies);</div><div class='add'>+	if (delayed_work_pending(&amp;fd_timeout))</div><div class='add'>+		pr_info("timer_function=%p expires=%ld\n",</div><div class='add'>+		       fd_timeout.work.func,</div><div class='add'>+		       fd_timeout.timer.expires - jiffies);</div><div class='add'>+</div><div class='ctx'> 	pr_info("cont=%p\n", cont);</div><div class='ctx'> 	pr_info("current_req=%p\n", current_req);</div><div class='ctx'> 	pr_info("command_status=%d\n", command_status);</div><div class='ctx'> 	pr_info("\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void floppy_shutdown(unsigned long data)</div><div class='add'>+static void floppy_shutdown(struct work_struct *arg)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -1868,7 +1862,7 @@ static int start_motor(void (*function)(void))</div><div class='ctx'> </div><div class='ctx'> 	/* wait_for_completion also schedules reset if needed. */</div><div class='ctx'> 	return fd_wait_for_completion(DRS-&gt;select_date + DP-&gt;select_delay,</div><div class='del'>-				      (timeout_fn)function);</div><div class='add'>+				      (work_func_t)function);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void floppy_ready(void)</div><div class='hunk'>@@ -2821,7 +2815,6 @@ do_request:</div><div class='ctx'> 		spin_lock_irq(&amp;floppy_lock);</div><div class='ctx'> 		pending = set_next_request();</div><div class='ctx'> 		spin_unlock_irq(&amp;floppy_lock);</div><div class='del'>-</div><div class='ctx'> 		if (!pending) {</div><div class='ctx'> 			do_floppy = NULL;</div><div class='ctx'> 			unlock_fdc();</div><div class='hunk'>@@ -2898,13 +2891,15 @@ static void do_fd_request(struct request_queue *q)</div><div class='ctx'> 		 current_req-&gt;cmd_flags))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (test_bit(0, &amp;fdc_busy)) {</div><div class='add'>+	if (test_and_set_bit(0, &amp;fdc_busy)) {</div><div class='ctx'> 		/* fdc busy, this new request will be treated when the</div><div class='ctx'> 		   current one is done */</div><div class='ctx'> 		is_alive(__func__, "old request running");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	lock_fdc(MAXTIMEOUT, false);</div><div class='add'>+	command_status = FD_COMMAND_NONE;</div><div class='add'>+	__reschedule_timeout(MAXTIMEOUT, "fd_request");</div><div class='add'>+	set_fdc(0);</div><div class='ctx'> 	process_fd_request();</div><div class='ctx'> 	is_alive(__func__, "");</div><div class='ctx'> }</div><div class='hunk'>@@ -3612,9 +3607,7 @@ static int floppy_release(struct gendisk *disk, fmode_t mode)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;floppy_mutex);</div><div class='ctx'> 	mutex_lock(&amp;open_lock);</div><div class='del'>-	if (UDRS-&gt;fd_ref &lt; 0)</div><div class='del'>-		UDRS-&gt;fd_ref = 0;</div><div class='del'>-	else if (!UDRS-&gt;fd_ref--) {</div><div class='add'>+	if (!UDRS-&gt;fd_ref--) {</div><div class='ctx'> 		DPRINT("floppy_release with fd_ref == 0");</div><div class='ctx'> 		UDRS-&gt;fd_ref = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3650,13 +3643,7 @@ static int floppy_open(struct block_device *bdev, fmode_t mode)</div><div class='ctx'> 		set_bit(FD_VERIFY_BIT, &amp;UDRS-&gt;flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (UDRS-&gt;fd_ref == -1 || (UDRS-&gt;fd_ref &amp;&amp; (mode &amp; FMODE_EXCL)))</div><div class='del'>-		goto out2;</div><div class='del'>-</div><div class='del'>-	if (mode &amp; FMODE_EXCL)</div><div class='del'>-		UDRS-&gt;fd_ref = -1;</div><div class='del'>-	else</div><div class='del'>-		UDRS-&gt;fd_ref++;</div><div class='add'>+	UDRS-&gt;fd_ref++;</div><div class='ctx'> </div><div class='ctx'> 	opened_bdev[drive] = bdev;</div><div class='ctx'> </div><div class='hunk'>@@ -3719,10 +3706,8 @@ static int floppy_open(struct block_device *bdev, fmode_t mode)</div><div class='ctx'> 	mutex_unlock(&amp;floppy_mutex);</div><div class='ctx'> 	return 0;</div><div class='ctx'> out:</div><div class='del'>-	if (UDRS-&gt;fd_ref &lt; 0)</div><div class='del'>-		UDRS-&gt;fd_ref = 0;</div><div class='del'>-	else</div><div class='del'>-		UDRS-&gt;fd_ref--;</div><div class='add'>+	UDRS-&gt;fd_ref--;</div><div class='add'>+</div><div class='ctx'> 	if (!UDRS-&gt;fd_ref)</div><div class='ctx'> 		opened_bdev[drive] = NULL;</div><div class='ctx'> out2:</div><div class='hunk'>@@ -4159,10 +4144,16 @@ static int __init floppy_init(void)</div><div class='ctx'> 			goto out_put_disk;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		floppy_wq = alloc_ordered_workqueue("floppy", 0);</div><div class='add'>+		if (!floppy_wq) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto out_put_disk;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		disks[dr]-&gt;queue = blk_init_queue(do_fd_request, &amp;floppy_lock);</div><div class='ctx'> 		if (!disks[dr]-&gt;queue) {</div><div class='ctx'> 			err = -ENOMEM;</div><div class='del'>-			goto out_put_disk;</div><div class='add'>+			goto out_destroy_workq;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		blk_queue_max_hw_sectors(disks[dr]-&gt;queue, 64);</div><div class='hunk'>@@ -4213,7 +4204,7 @@ static int __init floppy_init(void)</div><div class='ctx'> 	use_virtual_dma = can_use_virtual_dma &amp; 1;</div><div class='ctx'> 	fdc_state[0].address = FDC1;</div><div class='ctx'> 	if (fdc_state[0].address == -1) {</div><div class='del'>-		del_timer_sync(&amp;fd_timeout);</div><div class='add'>+		cancel_delayed_work(&amp;fd_timeout);</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto out_unreg_region;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4224,7 +4215,7 @@ static int __init floppy_init(void)</div><div class='ctx'> 	fdc = 0;		/* reset fdc in case of unexpected interrupt */</div><div class='ctx'> 	err = floppy_grab_irq_and_dma();</div><div class='ctx'> 	if (err) {</div><div class='del'>-		del_timer_sync(&amp;fd_timeout);</div><div class='add'>+		cancel_delayed_work(&amp;fd_timeout);</div><div class='ctx'> 		err = -EBUSY;</div><div class='ctx'> 		goto out_unreg_region;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4281,13 +4272,13 @@ static int __init floppy_init(void)</div><div class='ctx'> 		user_reset_fdc(-1, FD_RESET_ALWAYS, false);</div><div class='ctx'> 	}</div><div class='ctx'> 	fdc = 0;</div><div class='del'>-	del_timer_sync(&amp;fd_timeout);</div><div class='add'>+	cancel_delayed_work(&amp;fd_timeout);</div><div class='ctx'> 	current_drive = 0;</div><div class='ctx'> 	initialized = true;</div><div class='ctx'> 	if (have_no_fdc) {</div><div class='ctx'> 		DPRINT("no floppy controllers found\n");</div><div class='ctx'> 		err = have_no_fdc;</div><div class='del'>-		goto out_flush_work;</div><div class='add'>+		goto out_release_dma;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (drive = 0; drive &lt; N_DRIVE; drive++) {</div><div class='hunk'>@@ -4302,7 +4293,7 @@ static int __init floppy_init(void)</div><div class='ctx'> </div><div class='ctx'> 		err = platform_device_register(&amp;floppy_device[drive]);</div><div class='ctx'> 		if (err)</div><div class='del'>-			goto out_flush_work;</div><div class='add'>+			goto out_release_dma;</div><div class='ctx'> </div><div class='ctx'> 		err = device_create_file(&amp;floppy_device[drive].dev,</div><div class='ctx'> 					 &amp;dev_attr_cmos);</div><div class='hunk'>@@ -4320,13 +4311,14 @@ static int __init floppy_init(void)</div><div class='ctx'> </div><div class='ctx'> out_unreg_platform_dev:</div><div class='ctx'> 	platform_device_unregister(&amp;floppy_device[drive]);</div><div class='del'>-out_flush_work:</div><div class='del'>-	flush_work_sync(&amp;floppy_work);</div><div class='add'>+out_release_dma:</div><div class='ctx'> 	if (atomic_read(&amp;usage_count))</div><div class='ctx'> 		floppy_release_irq_and_dma();</div><div class='ctx'> out_unreg_region:</div><div class='ctx'> 	blk_unregister_region(MKDEV(FLOPPY_MAJOR, 0), 256);</div><div class='ctx'> 	platform_driver_unregister(&amp;floppy_driver);</div><div class='add'>+out_destroy_workq:</div><div class='add'>+	destroy_workqueue(floppy_wq);</div><div class='ctx'> out_unreg_blkdev:</div><div class='ctx'> 	unregister_blkdev(FLOPPY_MAJOR, "fd");</div><div class='ctx'> out_put_disk:</div><div class='hunk'>@@ -4397,7 +4389,7 @@ static int floppy_grab_irq_and_dma(void)</div><div class='ctx'> 	 * We might have scheduled a free_irq(), wait it to</div><div class='ctx'> 	 * drain first:</div><div class='ctx'> 	 */</div><div class='del'>-	flush_work_sync(&amp;floppy_work);</div><div class='add'>+	flush_workqueue(floppy_wq);</div><div class='ctx'> </div><div class='ctx'> 	if (fd_request_irq()) {</div><div class='ctx'> 		DPRINT("Unable to grab IRQ%d for the floppy driver\n",</div><div class='hunk'>@@ -4488,9 +4480,9 @@ static void floppy_release_irq_and_dma(void)</div><div class='ctx'> 			pr_info("motor off timer %d still active\n", drive);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	if (timer_pending(&amp;fd_timeout))</div><div class='add'>+	if (delayed_work_pending(&amp;fd_timeout))</div><div class='ctx'> 		pr_info("floppy timer still active:%s\n", timeout_message);</div><div class='del'>-	if (timer_pending(&amp;fd_timer))</div><div class='add'>+	if (delayed_work_pending(&amp;fd_timer))</div><div class='ctx'> 		pr_info("auxiliary floppy timer still active\n");</div><div class='ctx'> 	if (work_pending(&amp;floppy_work))</div><div class='ctx'> 		pr_info("work still pending\n");</div><div class='hunk'>@@ -4560,8 +4552,9 @@ static void __exit floppy_module_exit(void)</div><div class='ctx'> 		put_disk(disks[drive]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;fd_timeout);</div><div class='del'>-	del_timer_sync(&amp;fd_timer);</div><div class='add'>+	cancel_delayed_work_sync(&amp;fd_timeout);</div><div class='add'>+	cancel_delayed_work_sync(&amp;fd_timer);</div><div class='add'>+	destroy_workqueue(floppy_wq);</div><div class='ctx'> </div><div class='ctx'> 	if (atomic_read(&amp;usage_count))</div><div class='ctx'> 		floppy_release_irq_and_dma();</div><div class='head'>diff --git a/drivers/block/mtip32xx/mtip32xx.c b/drivers/block/mtip32xx/mtip32xx.c<br/>index 00f9fc992090..264bc77dcb91 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/mtip32xx/mtip32xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/mtip32xx/mtip32xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/mtip32xx/mtip32xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/mtip32xx/mtip32xx.c</a></div><div class='hunk'>@@ -294,18 +294,16 @@ static int hba_reset_nosleep(struct driver_data *dd)</div><div class='ctx'>  */</div><div class='ctx'> static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags = 0;</div><div class='del'>-</div><div class='ctx'> 	atomic_set(&amp;port-&gt;commands[tag].active, 1);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;port-&gt;cmd_issue_lock, flags);</div><div class='add'>+	spin_lock(&amp;port-&gt;cmd_issue_lock);</div><div class='ctx'> </div><div class='ctx'> 	writel((1 &lt;&lt; MTIP_TAG_BIT(tag)),</div><div class='ctx'> 			port-&gt;s_active[MTIP_TAG_INDEX(tag)]);</div><div class='ctx'> 	writel((1 &lt;&lt; MTIP_TAG_BIT(tag)),</div><div class='ctx'> 			port-&gt;cmd_issue[MTIP_TAG_INDEX(tag)]);</div><div class='ctx'> </div><div class='del'>-	spin_unlock_irqrestore(&amp;port-&gt;cmd_issue_lock, flags);</div><div class='add'>+	spin_unlock(&amp;port-&gt;cmd_issue_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Set the command's timeout value.*/</div><div class='ctx'> 	port-&gt;commands[tag].comp_time = jiffies + msecs_to_jiffies(</div><div class='hunk'>@@ -436,8 +434,7 @@ static void mtip_init_port(struct mtip_port *port)</div><div class='ctx'> 		writel(0xFFFFFFFF, port-&gt;completed[i]);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear any pending interrupts for this port */</div><div class='del'>-	writel(readl(port-&gt;dd-&gt;mmio + PORT_IRQ_STAT),</div><div class='del'>-					port-&gt;dd-&gt;mmio + PORT_IRQ_STAT);</div><div class='add'>+	writel(readl(port-&gt;mmio + PORT_IRQ_STAT), port-&gt;mmio + PORT_IRQ_STAT);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear any pending interrupts on the HBA. */</div><div class='ctx'> 	writel(readl(port-&gt;dd-&gt;mmio + HOST_IRQ_STAT),</div><div class='hunk'>@@ -782,13 +779,24 @@ static void mtip_handle_tfe(struct driver_data *dd)</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the timer to prevent command timeouts. */</div><div class='ctx'> 	del_timer(&amp;port-&gt;cmd_timer);</div><div class='add'>+	set_bit(MTIP_PF_EH_ACTIVE_BIT, &amp;port-&gt;flags);</div><div class='add'>+</div><div class='add'>+	if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &amp;port-&gt;flags) &amp;&amp;</div><div class='add'>+			test_bit(MTIP_TAG_INTERNAL, port-&gt;allocated)) {</div><div class='add'>+		cmd = &amp;port-&gt;commands[MTIP_TAG_INTERNAL];</div><div class='add'>+		dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");</div><div class='add'>+</div><div class='add'>+		atomic_inc(&amp;cmd-&gt;active); /* active &gt; 1 indicates error */</div><div class='add'>+		if (cmd-&gt;comp_data &amp;&amp; cmd-&gt;comp_func) {</div><div class='add'>+			cmd-&gt;comp_func(port, MTIP_TAG_INTERNAL,</div><div class='add'>+					cmd-&gt;comp_data, PORT_IRQ_TF_ERR);</div><div class='add'>+		}</div><div class='add'>+		goto handle_tfe_exit;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* clear the tag accumulator */</div><div class='ctx'> 	memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));</div><div class='ctx'> </div><div class='del'>-	/* Set eh_active */</div><div class='del'>-	set_bit(MTIP_PF_EH_ACTIVE_BIT, &amp;port-&gt;flags);</div><div class='del'>-</div><div class='ctx'> 	/* Loop through all the groups */</div><div class='ctx'> 	for (group = 0; group &lt; dd-&gt;slot_groups; group++) {</div><div class='ctx'> 		completed = readl(port-&gt;completed[group]);</div><div class='hunk'>@@ -940,6 +948,7 @@ static void mtip_handle_tfe(struct driver_data *dd)</div><div class='ctx'> 	}</div><div class='ctx'> 	print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);</div><div class='ctx'> </div><div class='add'>+handle_tfe_exit:</div><div class='ctx'> 	/* clear eh_active */</div><div class='ctx'> 	clear_bit(MTIP_PF_EH_ACTIVE_BIT, &amp;port-&gt;flags);</div><div class='ctx'> 	wake_up_interruptible(&amp;port-&gt;svc_wait);</div><div class='hunk'>@@ -961,6 +970,8 @@ static inline void mtip_process_sdbf(struct driver_data *dd)</div><div class='ctx'> 	/* walk all bits in all slot groups */</div><div class='ctx'> 	for (group = 0; group &lt; dd-&gt;slot_groups; group++) {</div><div class='ctx'> 		completed = readl(port-&gt;completed[group]);</div><div class='add'>+		if (!completed)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='ctx'> 		/* clear completed status register in the hardware.*/</div><div class='ctx'> 		writel(completed, port-&gt;completed[group]);</div><div class='hunk'>@@ -1329,22 +1340,6 @@ static int mtip_exec_internal_command(struct mtip_port *port,</div><div class='ctx'> 			}</div><div class='ctx'> 			rv = -EAGAIN;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		if (readl(port-&gt;cmd_issue[MTIP_TAG_INTERNAL])</div><div class='del'>-			&amp; (1 &lt;&lt; MTIP_TAG_INTERNAL)) {</div><div class='del'>-			dev_warn(&amp;port-&gt;dd-&gt;pdev-&gt;dev,</div><div class='del'>-				"Retiring internal command but CI is 1.\n");</div><div class='del'>-			if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,</div><div class='del'>-						&amp;port-&gt;dd-&gt;dd_flag)) {</div><div class='del'>-				hba_reset_nosleep(port-&gt;dd);</div><div class='del'>-				rv = -ENXIO;</div><div class='del'>-			} else {</div><div class='del'>-				mtip_restart_port(port);</div><div class='del'>-				rv = -EAGAIN;</div><div class='del'>-			}</div><div class='del'>-			goto exec_ic_exit;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Spin for &lt;timeout&gt; checking if command still outstanding */</div><div class='ctx'> 		timeout = jiffies + msecs_to_jiffies(timeout);</div><div class='hunk'>@@ -1361,21 +1356,25 @@ static int mtip_exec_internal_command(struct mtip_port *port,</div><div class='ctx'> 				rv = -ENXIO;</div><div class='ctx'> 				goto exec_ic_exit;</div><div class='ctx'> 			}</div><div class='add'>+			if (readl(port-&gt;mmio + PORT_IRQ_STAT) &amp; PORT_IRQ_ERR) {</div><div class='add'>+				atomic_inc(&amp;int_cmd-&gt;active); /* error */</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (readl(port-&gt;cmd_issue[MTIP_TAG_INTERNAL])</div><div class='add'>+	if (atomic_read(&amp;int_cmd-&gt;active) &gt; 1) {</div><div class='add'>+		dev_err(&amp;port-&gt;dd-&gt;pdev-&gt;dev,</div><div class='add'>+			"Internal command [%02X] failed\n", fis-&gt;command);</div><div class='add'>+		rv = -EIO;</div><div class='add'>+	}</div><div class='add'>+	if (readl(port-&gt;cmd_issue[MTIP_TAG_INTERNAL])</div><div class='ctx'> 			&amp; (1 &lt;&lt; MTIP_TAG_INTERNAL)) {</div><div class='del'>-			dev_err(&amp;port-&gt;dd-&gt;pdev-&gt;dev,</div><div class='del'>-				"Internal command did not complete [atomic]\n");</div><div class='add'>+		rv = -ENXIO;</div><div class='add'>+		if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT,</div><div class='add'>+					&amp;port-&gt;dd-&gt;dd_flag)) {</div><div class='add'>+			mtip_restart_port(port);</div><div class='ctx'> 			rv = -EAGAIN;</div><div class='del'>-			if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,</div><div class='del'>-						&amp;port-&gt;dd-&gt;dd_flag)) {</div><div class='del'>-				hba_reset_nosleep(port-&gt;dd);</div><div class='del'>-				rv = -ENXIO;</div><div class='del'>-			} else {</div><div class='del'>-				mtip_restart_port(port);</div><div class='del'>-				rv = -EAGAIN;</div><div class='del'>-			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> exec_ic_exit:</div><div class='hunk'>@@ -1893,13 +1892,33 @@ static int exec_drive_command(struct mtip_port *port, u8 *command,</div><div class='ctx'> 				void __user *user_buffer)</div><div class='ctx'> {</div><div class='ctx'> 	struct host_to_dev_fis	fis;</div><div class='del'>-	struct host_to_dev_fis *reply = (port-&gt;rxfis + RX_FIS_D2H_REG);</div><div class='add'>+	struct host_to_dev_fis *reply;</div><div class='add'>+	u8 *buf = NULL;</div><div class='add'>+	dma_addr_t dma_addr = 0;</div><div class='add'>+	int rv = 0, xfer_sz = command[3];</div><div class='add'>+</div><div class='add'>+	if (xfer_sz) {</div><div class='add'>+		if (user_buffer)</div><div class='add'>+			return -EFAULT;</div><div class='add'>+</div><div class='add'>+		buf = dmam_alloc_coherent(&amp;port-&gt;dd-&gt;pdev-&gt;dev,</div><div class='add'>+				ATA_SECT_SIZE * xfer_sz,</div><div class='add'>+				&amp;dma_addr,</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+		if (!buf) {</div><div class='add'>+			dev_err(&amp;port-&gt;dd-&gt;pdev-&gt;dev,</div><div class='add'>+				"Memory allocation failed (%d bytes)\n",</div><div class='add'>+				ATA_SECT_SIZE * xfer_sz);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+		memset(buf, 0, ATA_SECT_SIZE * xfer_sz);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Build the FIS. */</div><div class='ctx'> 	memset(&amp;fis, 0, sizeof(struct host_to_dev_fis));</div><div class='del'>-	fis.type		= 0x27;</div><div class='del'>-	fis.opts		= 1 &lt;&lt; 7;</div><div class='del'>-	fis.command		= command[0];</div><div class='add'>+	fis.type	= 0x27;</div><div class='add'>+	fis.opts	= 1 &lt;&lt; 7;</div><div class='add'>+	fis.command	= command[0];</div><div class='ctx'> 	fis.features	= command[2];</div><div class='ctx'> 	fis.sect_count	= command[3];</div><div class='ctx'> 	if (fis.command == ATA_CMD_SMART) {</div><div class='hunk'>@@ -1908,6 +1927,11 @@ static int exec_drive_command(struct mtip_port *port, u8 *command,</div><div class='ctx'> 		fis.cyl_hi	= 0xC2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (xfer_sz)</div><div class='add'>+		reply = (port-&gt;rxfis + RX_FIS_PIO_SETUP);</div><div class='add'>+	else</div><div class='add'>+		reply = (port-&gt;rxfis + RX_FIS_D2H_REG);</div><div class='add'>+</div><div class='ctx'> 	dbg_printk(MTIP_DRV_NAME</div><div class='ctx'> 		" %s: User Command: cmd %x, sect %x, "</div><div class='ctx'> 		"feat %x, sectcnt %x\n",</div><div class='hunk'>@@ -1917,43 +1941,46 @@ static int exec_drive_command(struct mtip_port *port, u8 *command,</div><div class='ctx'> 		command[2],</div><div class='ctx'> 		command[3]);</div><div class='ctx'> </div><div class='del'>-	memset(port-&gt;sector_buffer, 0x00, ATA_SECT_SIZE);</div><div class='del'>-</div><div class='ctx'> 	/* Execute the command. */</div><div class='ctx'> 	if (mtip_exec_internal_command(port,</div><div class='ctx'> 				&amp;fis,</div><div class='ctx'> 				 5,</div><div class='del'>-				 port-&gt;sector_buffer_dma,</div><div class='del'>-				 (command[3] != 0) ? ATA_SECT_SIZE : 0,</div><div class='add'>+				 (xfer_sz ? dma_addr : 0),</div><div class='add'>+				 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),</div><div class='ctx'> 				 0,</div><div class='ctx'> 				 GFP_KERNEL,</div><div class='ctx'> 				 MTIP_IOCTL_COMMAND_TIMEOUT_MS)</div><div class='ctx'> 				 &lt; 0) {</div><div class='del'>-		return -1;</div><div class='add'>+		rv = -EFAULT;</div><div class='add'>+		goto exit_drive_command;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Collect the completion status. */</div><div class='ctx'> 	command[0] = reply-&gt;command; /* Status*/</div><div class='ctx'> 	command[1] = reply-&gt;features; /* Error*/</div><div class='del'>-	command[2] = command[3];</div><div class='add'>+	command[2] = reply-&gt;sect_count;</div><div class='ctx'> </div><div class='ctx'> 	dbg_printk(MTIP_DRV_NAME</div><div class='ctx'> 		" %s: Completion Status: stat %x, "</div><div class='del'>-		"err %x, cmd %x\n",</div><div class='add'>+		"err %x, nsect %x\n",</div><div class='ctx'> 		__func__,</div><div class='ctx'> 		command[0],</div><div class='ctx'> 		command[1],</div><div class='ctx'> 		command[2]);</div><div class='ctx'> </div><div class='del'>-	if (user_buffer &amp;&amp; command[3]) {</div><div class='add'>+	if (xfer_sz) {</div><div class='ctx'> 		if (copy_to_user(user_buffer,</div><div class='del'>-				 port-&gt;sector_buffer,</div><div class='add'>+				 buf,</div><div class='ctx'> 				 ATA_SECT_SIZE * command[3])) {</div><div class='del'>-			return -EFAULT;</div><div class='add'>+			rv = -EFAULT;</div><div class='add'>+			goto exit_drive_command;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+exit_drive_command:</div><div class='add'>+	if (buf)</div><div class='add'>+		dmam_free_coherent(&amp;port-&gt;dd-&gt;pdev-&gt;dev,</div><div class='add'>+				ATA_SECT_SIZE * xfer_sz, buf, dma_addr);</div><div class='add'>+	return rv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2003,6 +2030,32 @@ static unsigned int implicit_sector(unsigned char command,</div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mtip_set_timeout(struct host_to_dev_fis *fis, unsigned int *timeout)</div><div class='add'>+{</div><div class='add'>+	switch (fis-&gt;command) {</div><div class='add'>+	case ATA_CMD_DOWNLOAD_MICRO:</div><div class='add'>+		*timeout = 120000; /* 2 minutes */</div><div class='add'>+		break;</div><div class='add'>+	case ATA_CMD_SEC_ERASE_UNIT:</div><div class='add'>+	case 0xFC:</div><div class='add'>+		*timeout = 240000; /* 4 minutes */</div><div class='add'>+		break;</div><div class='add'>+	case ATA_CMD_STANDBYNOW1:</div><div class='add'>+		*timeout = 10000;  /* 10 seconds */</div><div class='add'>+		break;</div><div class='add'>+	case 0xF7:</div><div class='add'>+	case 0xFA:</div><div class='add'>+		*timeout = 60000;  /* 60 seconds */</div><div class='add'>+		break;</div><div class='add'>+	case ATA_CMD_SMART:</div><div class='add'>+		*timeout = 15000;  /* 15 seconds */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Executes a taskfile</div><div class='ctx'>  * See ide_taskfile_ioctl() for derivation</div><div class='hunk'>@@ -2023,7 +2076,7 @@ static int exec_drive_taskfile(struct driver_data *dd,</div><div class='ctx'> 	unsigned int taskin = 0;</div><div class='ctx'> 	unsigned int taskout = 0;</div><div class='ctx'> 	u8 nsect = 0;</div><div class='del'>-	unsigned int timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS;</div><div class='add'>+	unsigned int timeout;</div><div class='ctx'> 	unsigned int force_single_sector;</div><div class='ctx'> 	unsigned int transfer_size;</div><div class='ctx'> 	unsigned long task_file_data;</div><div class='hunk'>@@ -2153,32 +2206,7 @@ static int exec_drive_taskfile(struct driver_data *dd,</div><div class='ctx'> 		fis.lba_hi,</div><div class='ctx'> 		fis.device);</div><div class='ctx'> </div><div class='del'>-	switch (fis.command) {</div><div class='del'>-	case ATA_CMD_DOWNLOAD_MICRO:</div><div class='del'>-		/* Change timeout for Download Microcode to 2 minutes */</div><div class='del'>-		timeout = 120000;</div><div class='del'>-		break;</div><div class='del'>-	case ATA_CMD_SEC_ERASE_UNIT:</div><div class='del'>-		/* Change timeout for Security Erase Unit to 4 minutes.*/</div><div class='del'>-		timeout = 240000;</div><div class='del'>-		break;</div><div class='del'>-	case ATA_CMD_STANDBYNOW1:</div><div class='del'>-		/* Change timeout for standby immediate to 10 seconds.*/</div><div class='del'>-		timeout = 10000;</div><div class='del'>-		break;</div><div class='del'>-	case 0xF7:</div><div class='del'>-	case 0xFA:</div><div class='del'>-		/* Change timeout for vendor unique command to 10 secs */</div><div class='del'>-		timeout = 10000;</div><div class='del'>-		break;</div><div class='del'>-	case ATA_CMD_SMART:</div><div class='del'>-		/* Change timeout for vendor unique command to 15 secs */</div><div class='del'>-		timeout = 15000;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	mtip_set_timeout(&amp;fis, &amp;timeout);</div><div class='ctx'> </div><div class='ctx'> 	/* Determine the correct transfer size.*/</div><div class='ctx'> 	if (force_single_sector)</div><div class='hunk'>@@ -2295,13 +2323,12 @@ static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,</div><div class='ctx'> {</div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case HDIO_GET_IDENTITY:</div><div class='del'>-		if (mtip_get_identify(dd-&gt;port, (void __user *) arg) &lt; 0) {</div><div class='del'>-			dev_warn(&amp;dd-&gt;pdev-&gt;dev,</div><div class='del'>-				"Unable to read identity\n");</div><div class='del'>-			return -EIO;</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+	{</div><div class='add'>+		if (copy_to_user((void __user *)arg, dd-&gt;port-&gt;identify,</div><div class='add'>+						sizeof(u16) * ATA_ID_WORDS))</div><div class='add'>+			return -EFAULT;</div><div class='ctx'> 		break;</div><div class='add'>+	}</div><div class='ctx'> 	case HDIO_DRIVE_CMD:</div><div class='ctx'> 	{</div><div class='ctx'> 		u8 drive_command[4];</div><div class='hunk'>@@ -2510,8 +2537,10 @@ static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd,</div><div class='ctx'> 		up(&amp;dd-&gt;port-&gt;cmd_slot);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='del'>-	if (unlikely(*tag &lt; 0))</div><div class='add'>+	if (unlikely(*tag &lt; 0)) {</div><div class='add'>+		up(&amp;dd-&gt;port-&gt;cmd_slot);</div><div class='ctx'> 		return NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return dd-&gt;port-&gt;commands[*tag].sg;</div><div class='ctx'> }</div><div class='hunk'>@@ -2535,40 +2564,58 @@ static ssize_t mtip_hw_show_registers(struct device *dev,</div><div class='ctx'> 	int size = 0;</div><div class='ctx'> 	int n;</div><div class='ctx'> </div><div class='del'>-	size += sprintf(&amp;buf[size], "S ACTive:\n");</div><div class='add'>+	size += sprintf(&amp;buf[size], "Hardware\n--------\n");</div><div class='add'>+	size += sprintf(&amp;buf[size], "S ACTive      : [ 0x");</div><div class='ctx'> </div><div class='del'>-	for (n = 0; n &lt; dd-&gt;slot_groups; n++)</div><div class='del'>-		size += sprintf(&amp;buf[size], "0x%08x\n",</div><div class='add'>+	for (n = dd-&gt;slot_groups-1; n &gt;= 0; n--)</div><div class='add'>+		size += sprintf(&amp;buf[size], "%08X ",</div><div class='ctx'> 					 readl(dd-&gt;port-&gt;s_active[n]));</div><div class='ctx'> </div><div class='del'>-	size += sprintf(&amp;buf[size], "Command Issue:\n");</div><div class='add'>+	size += sprintf(&amp;buf[size], "]\n");</div><div class='add'>+	size += sprintf(&amp;buf[size], "Command Issue : [ 0x");</div><div class='ctx'> </div><div class='del'>-	for (n = 0; n &lt; dd-&gt;slot_groups; n++)</div><div class='del'>-		size += sprintf(&amp;buf[size], "0x%08x\n",</div><div class='add'>+	for (n = dd-&gt;slot_groups-1; n &gt;= 0; n--)</div><div class='add'>+		size += sprintf(&amp;buf[size], "%08X ",</div><div class='ctx'> 					readl(dd-&gt;port-&gt;cmd_issue[n]));</div><div class='ctx'> </div><div class='del'>-	size += sprintf(&amp;buf[size], "Allocated:\n");</div><div class='add'>+	size += sprintf(&amp;buf[size], "]\n");</div><div class='add'>+	size += sprintf(&amp;buf[size], "Completed     : [ 0x");</div><div class='add'>+</div><div class='add'>+	for (n = dd-&gt;slot_groups-1; n &gt;= 0; n--)</div><div class='add'>+		size += sprintf(&amp;buf[size], "%08X ",</div><div class='add'>+				readl(dd-&gt;port-&gt;completed[n]));</div><div class='add'>+</div><div class='add'>+	size += sprintf(&amp;buf[size], "]\n");</div><div class='add'>+	size += sprintf(&amp;buf[size], "PORT IRQ STAT : [ 0x%08X ]\n",</div><div class='add'>+				readl(dd-&gt;port-&gt;mmio + PORT_IRQ_STAT));</div><div class='add'>+	size += sprintf(&amp;buf[size], "HOST IRQ STAT : [ 0x%08X ]\n",</div><div class='add'>+				readl(dd-&gt;mmio + HOST_IRQ_STAT));</div><div class='add'>+	size += sprintf(&amp;buf[size], "\n");</div><div class='ctx'> </div><div class='del'>-	for (n = 0; n &lt; dd-&gt;slot_groups; n++) {</div><div class='add'>+	size += sprintf(&amp;buf[size], "Local\n-----\n");</div><div class='add'>+	size += sprintf(&amp;buf[size], "Allocated    : [ 0x");</div><div class='add'>+</div><div class='add'>+	for (n = dd-&gt;slot_groups-1; n &gt;= 0; n--) {</div><div class='ctx'> 		if (sizeof(long) &gt; sizeof(u32))</div><div class='ctx'> 			group_allocated =</div><div class='ctx'> 				dd-&gt;port-&gt;allocated[n/2] &gt;&gt; (32*(n&amp;1));</div><div class='ctx'> 		else</div><div class='ctx'> 			group_allocated = dd-&gt;port-&gt;allocated[n];</div><div class='del'>-		size += sprintf(&amp;buf[size], "0x%08x\n",</div><div class='del'>-				 group_allocated);</div><div class='add'>+		size += sprintf(&amp;buf[size], "%08X ", group_allocated);</div><div class='ctx'> 	}</div><div class='add'>+	size += sprintf(&amp;buf[size], "]\n");</div><div class='ctx'> </div><div class='del'>-	size += sprintf(&amp;buf[size], "Completed:\n");</div><div class='del'>-</div><div class='del'>-	for (n = 0; n &lt; dd-&gt;slot_groups; n++)</div><div class='del'>-		size += sprintf(&amp;buf[size], "0x%08x\n",</div><div class='del'>-				readl(dd-&gt;port-&gt;completed[n]));</div><div class='add'>+	size += sprintf(&amp;buf[size], "Commands in Q: [ 0x");</div><div class='ctx'> </div><div class='del'>-	size += sprintf(&amp;buf[size], "PORT IRQ STAT : 0x%08x\n",</div><div class='del'>-				readl(dd-&gt;port-&gt;mmio + PORT_IRQ_STAT));</div><div class='del'>-	size += sprintf(&amp;buf[size], "HOST IRQ STAT : 0x%08x\n",</div><div class='del'>-				readl(dd-&gt;mmio + HOST_IRQ_STAT));</div><div class='add'>+	for (n = dd-&gt;slot_groups-1; n &gt;= 0; n--) {</div><div class='add'>+		if (sizeof(long) &gt; sizeof(u32))</div><div class='add'>+			group_allocated =</div><div class='add'>+				dd-&gt;port-&gt;cmds_to_issue[n/2] &gt;&gt; (32*(n&amp;1));</div><div class='add'>+		else</div><div class='add'>+			group_allocated = dd-&gt;port-&gt;cmds_to_issue[n];</div><div class='add'>+		size += sprintf(&amp;buf[size], "%08X ", group_allocated);</div><div class='add'>+	}</div><div class='add'>+	size += sprintf(&amp;buf[size], "]\n");</div><div class='ctx'> </div><div class='ctx'> 	return size;</div><div class='ctx'> }</div><div class='hunk'>@@ -2590,8 +2637,24 @@ static ssize_t mtip_hw_show_status(struct device *dev,</div><div class='ctx'> 	return size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static ssize_t mtip_hw_show_flags(struct device *dev,</div><div class='add'>+				struct device_attribute *attr,</div><div class='add'>+				char *buf)</div><div class='add'>+{</div><div class='add'>+	struct driver_data *dd = dev_to_disk(dev)-&gt;private_data;</div><div class='add'>+	int size = 0;</div><div class='add'>+</div><div class='add'>+	size += sprintf(&amp;buf[size], "Flag in port struct : [ %08lX ]\n",</div><div class='add'>+							dd-&gt;port-&gt;flags);</div><div class='add'>+	size += sprintf(&amp;buf[size], "Flag in dd struct   : [ %08lX ]\n",</div><div class='add'>+							dd-&gt;dd_flag);</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static DEVICE_ATTR(registers, S_IRUGO, mtip_hw_show_registers, NULL);</div><div class='ctx'> static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);</div><div class='add'>+static DEVICE_ATTR(flags, S_IRUGO, mtip_hw_show_flags, NULL);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Create the sysfs related attributes.</div><div class='hunk'>@@ -2614,6 +2677,9 @@ static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)</div><div class='ctx'> 	if (sysfs_create_file(kobj, &amp;dev_attr_status.attr))</div><div class='ctx'> 		dev_warn(&amp;dd-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"Error creating 'status' sysfs entry\n");</div><div class='add'>+	if (sysfs_create_file(kobj, &amp;dev_attr_flags.attr))</div><div class='add'>+		dev_warn(&amp;dd-&gt;pdev-&gt;dev,</div><div class='add'>+			"Error creating 'flags' sysfs entry\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2634,6 +2700,7 @@ static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)</div><div class='ctx'> </div><div class='ctx'> 	sysfs_remove_file(kobj, &amp;dev_attr_registers.attr);</div><div class='ctx'> 	sysfs_remove_file(kobj, &amp;dev_attr_status.attr);</div><div class='add'>+	sysfs_remove_file(kobj, &amp;dev_attr_flags.attr);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3632,7 +3699,10 @@ skip_create_disk:</div><div class='ctx'> 	set_bit(QUEUE_FLAG_NONROT, &amp;dd-&gt;queue-&gt;queue_flags);</div><div class='ctx'> 	blk_queue_max_segments(dd-&gt;queue, MTIP_MAX_SG);</div><div class='ctx'> 	blk_queue_physical_block_size(dd-&gt;queue, 4096);</div><div class='add'>+	blk_queue_max_hw_sectors(dd-&gt;queue, 0xffff);</div><div class='add'>+	blk_queue_max_segment_size(dd-&gt;queue, 0x400000);</div><div class='ctx'> 	blk_queue_io_min(dd-&gt;queue, 4096);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * write back cache is not supported in the device. FUA depends on</div><div class='ctx'> 	 * write back cache support, hence setting flush support to zero.</div><div class='head'>diff --git a/drivers/block/mtip32xx/mtip32xx.h b/drivers/block/mtip32xx/mtip32xx.h<br/>index 4ef58336310a..b2c88da26b2a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/mtip32xx/mtip32xx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/mtip32xx/mtip32xx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/mtip32xx/mtip32xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/mtip32xx/mtip32xx.h</a></div><div class='hunk'>@@ -113,33 +113,35 @@</div><div class='ctx'> </div><div class='ctx'> #define __force_bit2int (unsigned int __force)</div><div class='ctx'> </div><div class='del'>-/* below are bit numbers in 'flags' defined in mtip_port */</div><div class='del'>-#define MTIP_PF_IC_ACTIVE_BIT		0 /* pio/ioctl */</div><div class='del'>-#define MTIP_PF_EH_ACTIVE_BIT		1 /* error handling */</div><div class='del'>-#define MTIP_PF_SE_ACTIVE_BIT		2 /* secure erase */</div><div class='del'>-#define MTIP_PF_DM_ACTIVE_BIT		3 /* download microcde */</div><div class='del'>-#define MTIP_PF_PAUSE_IO	((1 &lt;&lt; MTIP_PF_IC_ACTIVE_BIT) | \</div><div class='add'>+enum {</div><div class='add'>+	/* below are bit numbers in 'flags' defined in mtip_port */</div><div class='add'>+	MTIP_PF_IC_ACTIVE_BIT       = 0, /* pio/ioctl */</div><div class='add'>+	MTIP_PF_EH_ACTIVE_BIT       = 1, /* error handling */</div><div class='add'>+	MTIP_PF_SE_ACTIVE_BIT       = 2, /* secure erase */</div><div class='add'>+	MTIP_PF_DM_ACTIVE_BIT       = 3, /* download microcde */</div><div class='add'>+	MTIP_PF_PAUSE_IO      =	((1 &lt;&lt; MTIP_PF_IC_ACTIVE_BIT) | \</div><div class='ctx'> 				(1 &lt;&lt; MTIP_PF_EH_ACTIVE_BIT) | \</div><div class='ctx'> 				(1 &lt;&lt; MTIP_PF_SE_ACTIVE_BIT) | \</div><div class='del'>-				(1 &lt;&lt; MTIP_PF_DM_ACTIVE_BIT))</div><div class='del'>-</div><div class='del'>-#define MTIP_PF_SVC_THD_ACTIVE_BIT	4</div><div class='del'>-#define MTIP_PF_ISSUE_CMDS_BIT		5</div><div class='del'>-#define MTIP_PF_REBUILD_BIT		6</div><div class='del'>-#define MTIP_PF_SVC_THD_STOP_BIT	8</div><div class='del'>-</div><div class='del'>-/* below are bit numbers in 'dd_flag' defined in driver_data */</div><div class='del'>-#define MTIP_DDF_REMOVE_PENDING_BIT	1</div><div class='del'>-#define MTIP_DDF_OVER_TEMP_BIT		2</div><div class='del'>-#define MTIP_DDF_WRITE_PROTECT_BIT	3</div><div class='del'>-#define MTIP_DDF_STOP_IO	((1 &lt;&lt; MTIP_DDF_REMOVE_PENDING_BIT) | \</div><div class='add'>+				(1 &lt;&lt; MTIP_PF_DM_ACTIVE_BIT)),</div><div class='add'>+</div><div class='add'>+	MTIP_PF_SVC_THD_ACTIVE_BIT  = 4,</div><div class='add'>+	MTIP_PF_ISSUE_CMDS_BIT      = 5,</div><div class='add'>+	MTIP_PF_REBUILD_BIT         = 6,</div><div class='add'>+	MTIP_PF_SVC_THD_STOP_BIT    = 8,</div><div class='add'>+</div><div class='add'>+	/* below are bit numbers in 'dd_flag' defined in driver_data */</div><div class='add'>+	MTIP_DDF_REMOVE_PENDING_BIT = 1,</div><div class='add'>+	MTIP_DDF_OVER_TEMP_BIT      = 2,</div><div class='add'>+	MTIP_DDF_WRITE_PROTECT_BIT  = 3,</div><div class='add'>+	MTIP_DDF_STOP_IO      = ((1 &lt;&lt; MTIP_DDF_REMOVE_PENDING_BIT) | \</div><div class='ctx'> 				(1 &lt;&lt; MTIP_DDF_OVER_TEMP_BIT) | \</div><div class='del'>-				(1 &lt;&lt; MTIP_DDF_WRITE_PROTECT_BIT))</div><div class='add'>+				(1 &lt;&lt; MTIP_DDF_WRITE_PROTECT_BIT)),</div><div class='ctx'> </div><div class='del'>-#define MTIP_DDF_CLEANUP_BIT		5</div><div class='del'>-#define MTIP_DDF_RESUME_BIT		6</div><div class='del'>-#define MTIP_DDF_INIT_DONE_BIT		7</div><div class='del'>-#define MTIP_DDF_REBUILD_FAILED_BIT	8</div><div class='add'>+	MTIP_DDF_CLEANUP_BIT        = 5,</div><div class='add'>+	MTIP_DDF_RESUME_BIT         = 6,</div><div class='add'>+	MTIP_DDF_INIT_DONE_BIT      = 7,</div><div class='add'>+	MTIP_DDF_REBUILD_FAILED_BIT = 8,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> __packed struct smart_attr{</div><div class='ctx'> 	u8 attr_id;</div><div class='head'>diff --git a/drivers/block/rbd.c b/drivers/block/rbd.c<br/>index 013c7a549fb6..65665c9c42c6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/rbd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/rbd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/rbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/rbd.c</a></div><div class='hunk'>@@ -141,7 +141,7 @@ struct rbd_request {</div><div class='ctx'> struct rbd_snap {</div><div class='ctx'> 	struct	device		dev;</div><div class='ctx'> 	const char		*name;</div><div class='del'>-	size_t			size;</div><div class='add'>+	u64			size;</div><div class='ctx'> 	struct list_head	node;</div><div class='ctx'> 	u64			id;</div><div class='ctx'> };</div><div class='hunk'>@@ -175,8 +175,7 @@ struct rbd_device {</div><div class='ctx'> 	/* protects updating the header */</div><div class='ctx'> 	struct rw_semaphore     header_rwsem;</div><div class='ctx'> 	char                    snap_name[RBD_MAX_SNAP_NAME_LEN];</div><div class='del'>-	u32 cur_snap;	/* index+1 of current snapshot within snap context</div><div class='del'>-			   0 - for the head */</div><div class='add'>+	u64                     snap_id;	/* current snapshot id */</div><div class='ctx'> 	int read_only;</div><div class='ctx'> </div><div class='ctx'> 	struct list_head	node;</div><div class='hunk'>@@ -241,7 +240,7 @@ static void rbd_put_dev(struct rbd_device *rbd_dev)</div><div class='ctx'> 	put_device(&amp;rbd_dev-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __rbd_update_snaps(struct rbd_device *rbd_dev);</div><div class='add'>+static int __rbd_refresh_header(struct rbd_device *rbd_dev);</div><div class='ctx'> </div><div class='ctx'> static int rbd_open(struct block_device *bdev, fmode_t mode)</div><div class='ctx'> {</div><div class='hunk'>@@ -450,7 +449,9 @@ static void rbd_client_release(struct kref *kref)</div><div class='ctx'> 	struct rbd_client *rbdc = container_of(kref, struct rbd_client, kref);</div><div class='ctx'> </div><div class='ctx'> 	dout("rbd_release_client %p\n", rbdc);</div><div class='add'>+	spin_lock(&amp;rbd_client_list_lock);</div><div class='ctx'> 	list_del(&amp;rbdc-&gt;node);</div><div class='add'>+	spin_unlock(&amp;rbd_client_list_lock);</div><div class='ctx'> </div><div class='ctx'> 	ceph_destroy_client(rbdc-&gt;client);</div><div class='ctx'> 	kfree(rbdc-&gt;rbd_opts);</div><div class='hunk'>@@ -463,9 +464,7 @@ static void rbd_client_release(struct kref *kref)</div><div class='ctx'>  */</div><div class='ctx'> static void rbd_put_client(struct rbd_device *rbd_dev)</div><div class='ctx'> {</div><div class='del'>-	spin_lock(&amp;rbd_client_list_lock);</div><div class='ctx'> 	kref_put(&amp;rbd_dev-&gt;rbd_client-&gt;kref, rbd_client_release);</div><div class='del'>-	spin_unlock(&amp;rbd_client_list_lock);</div><div class='ctx'> 	rbd_dev-&gt;rbd_client = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -487,16 +486,18 @@ static void rbd_coll_release(struct kref *kref)</div><div class='ctx'>  */</div><div class='ctx'> static int rbd_header_from_disk(struct rbd_image_header *header,</div><div class='ctx'> 				 struct rbd_image_header_ondisk *ondisk,</div><div class='del'>-				 int allocated_snaps,</div><div class='add'>+				 u32 allocated_snaps,</div><div class='ctx'> 				 gfp_t gfp_flags)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	u32 snap_count;</div><div class='add'>+	u32 i, snap_count;</div><div class='ctx'> </div><div class='ctx'> 	if (memcmp(ondisk, RBD_HEADER_TEXT, sizeof(RBD_HEADER_TEXT)))</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> </div><div class='ctx'> 	snap_count = le32_to_cpu(ondisk-&gt;snap_count);</div><div class='add'>+	if (snap_count &gt; (UINT_MAX - sizeof(struct ceph_snap_context))</div><div class='add'>+			 / sizeof (*ondisk))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	header-&gt;snapc = kmalloc(sizeof(struct ceph_snap_context) +</div><div class='ctx'> 				snap_count * sizeof (*ondisk),</div><div class='ctx'> 				gfp_flags);</div><div class='hunk'>@@ -506,11 +507,11 @@ static int rbd_header_from_disk(struct rbd_image_header *header,</div><div class='ctx'> 	header-&gt;snap_names_len = le64_to_cpu(ondisk-&gt;snap_names_len);</div><div class='ctx'> 	if (snap_count) {</div><div class='ctx'> 		header-&gt;snap_names = kmalloc(header-&gt;snap_names_len,</div><div class='del'>-					     GFP_KERNEL);</div><div class='add'>+					     gfp_flags);</div><div class='ctx'> 		if (!header-&gt;snap_names)</div><div class='ctx'> 			goto err_snapc;</div><div class='ctx'> 		header-&gt;snap_sizes = kmalloc(snap_count * sizeof(u64),</div><div class='del'>-					     GFP_KERNEL);</div><div class='add'>+					     gfp_flags);</div><div class='ctx'> 		if (!header-&gt;snap_sizes)</div><div class='ctx'> 			goto err_names;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -552,21 +553,6 @@ err_snapc:</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int snap_index(struct rbd_image_header *header, int snap_num)</div><div class='del'>-{</div><div class='del'>-	return header-&gt;total_snaps - snap_num;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 cur_snap_id(struct rbd_device *rbd_dev)</div><div class='del'>-{</div><div class='del'>-	struct rbd_image_header *header = &amp;rbd_dev-&gt;header;</div><div class='del'>-</div><div class='del'>-	if (!rbd_dev-&gt;cur_snap)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return header-&gt;snapc-&gt;snaps[snap_index(header, rbd_dev-&gt;cur_snap)];</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int snap_by_name(struct rbd_image_header *header, const char *snap_name,</div><div class='ctx'> 			u64 *seq, u64 *size)</div><div class='ctx'> {</div><div class='hunk'>@@ -605,7 +591,7 @@ static int rbd_header_set_snap(struct rbd_device *dev, u64 *size)</div><div class='ctx'> 			snapc-&gt;seq = header-&gt;snap_seq;</div><div class='ctx'> 		else</div><div class='ctx'> 			snapc-&gt;seq = 0;</div><div class='del'>-		dev-&gt;cur_snap = 0;</div><div class='add'>+		dev-&gt;snap_id = CEPH_NOSNAP;</div><div class='ctx'> 		dev-&gt;read_only = 0;</div><div class='ctx'> 		if (size)</div><div class='ctx'> 			*size = header-&gt;image_size;</div><div class='hunk'>@@ -613,8 +599,7 @@ static int rbd_header_set_snap(struct rbd_device *dev, u64 *size)</div><div class='ctx'> 		ret = snap_by_name(header, dev-&gt;snap_name, &amp;snapc-&gt;seq, size);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto done;</div><div class='del'>-</div><div class='del'>-		dev-&gt;cur_snap = header-&gt;total_snaps - ret;</div><div class='add'>+		dev-&gt;snap_id = snapc-&gt;seq;</div><div class='ctx'> 		dev-&gt;read_only = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -935,7 +920,6 @@ static int rbd_do_request(struct request *rq,</div><div class='ctx'> 	layout-&gt;fl_stripe_unit = cpu_to_le32(1 &lt;&lt; RBD_MAX_OBJ_ORDER);</div><div class='ctx'> 	layout-&gt;fl_stripe_count = cpu_to_le32(1);</div><div class='ctx'> 	layout-&gt;fl_object_size = cpu_to_le32(1 &lt;&lt; RBD_MAX_OBJ_ORDER);</div><div class='del'>-	layout-&gt;fl_pg_preferred = cpu_to_le32(-1);</div><div class='ctx'> 	layout-&gt;fl_pg_pool = cpu_to_le32(dev-&gt;poolid);</div><div class='ctx'> 	ceph_calc_raw_layout(osdc, layout, snapid, ofs, &amp;len, &amp;bno,</div><div class='ctx'> 				req, ops);</div><div class='hunk'>@@ -1168,7 +1152,7 @@ static int rbd_req_read(struct request *rq,</div><div class='ctx'> 			 int coll_index)</div><div class='ctx'> {</div><div class='ctx'> 	return rbd_do_op(rq, rbd_dev, NULL,</div><div class='del'>-			 (snapid ? snapid : CEPH_NOSNAP),</div><div class='add'>+			 snapid,</div><div class='ctx'> 			 CEPH_OSD_OP_READ,</div><div class='ctx'> 			 CEPH_OSD_FLAG_READ,</div><div class='ctx'> 			 2,</div><div class='hunk'>@@ -1187,7 +1171,7 @@ static int rbd_req_sync_read(struct rbd_device *dev,</div><div class='ctx'> 			  u64 *ver)</div><div class='ctx'> {</div><div class='ctx'> 	return rbd_req_sync_op(dev, NULL,</div><div class='del'>-			       (snapid ? snapid : CEPH_NOSNAP),</div><div class='add'>+			       snapid,</div><div class='ctx'> 			       CEPH_OSD_OP_READ,</div><div class='ctx'> 			       CEPH_OSD_FLAG_READ,</div><div class='ctx'> 			       NULL,</div><div class='hunk'>@@ -1238,7 +1222,7 @@ static void rbd_watch_cb(u64 ver, u64 notify_id, u8 opcode, void *data)</div><div class='ctx'> 	dout("rbd_watch_cb %s notify_id=%lld opcode=%d\n", dev-&gt;obj_md_name,</div><div class='ctx'> 		notify_id, (int)opcode);</div><div class='ctx'> 	mutex_lock_nested(&amp;ctl_mutex, SINGLE_DEPTH_NESTING);</div><div class='del'>-	rc = __rbd_update_snaps(dev);</div><div class='add'>+	rc = __rbd_refresh_header(dev);</div><div class='ctx'> 	mutex_unlock(&amp;ctl_mutex);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		pr_warning(RBD_DRV_NAME "%d got notification but failed to "</div><div class='hunk'>@@ -1521,7 +1505,7 @@ static void rbd_rq_fn(struct request_queue *q)</div><div class='ctx'> 					      coll, cur_seg);</div><div class='ctx'> 			else</div><div class='ctx'> 				rbd_req_read(rq, rbd_dev,</div><div class='del'>-					     cur_snap_id(rbd_dev),</div><div class='add'>+					     rbd_dev-&gt;snap_id,</div><div class='ctx'> 					     ofs,</div><div class='ctx'> 					     op_size, bio,</div><div class='ctx'> 					     coll, cur_seg);</div><div class='hunk'>@@ -1592,7 +1576,7 @@ static int rbd_read_header(struct rbd_device *rbd_dev,</div><div class='ctx'> {</div><div class='ctx'> 	ssize_t rc;</div><div class='ctx'> 	struct rbd_image_header_ondisk *dh;</div><div class='del'>-	int snap_count = 0;</div><div class='add'>+	u32 snap_count = 0;</div><div class='ctx'> 	u64 ver;</div><div class='ctx'> 	size_t len;</div><div class='ctx'> </div><div class='hunk'>@@ -1656,7 +1640,7 @@ static int rbd_header_add_snap(struct rbd_device *dev,</div><div class='ctx'> 	struct ceph_mon_client *monc;</div><div class='ctx'> </div><div class='ctx'> 	/* we should create a snapshot only if we're pointing at the head */</div><div class='del'>-	if (dev-&gt;cur_snap)</div><div class='add'>+	if (dev-&gt;snap_id != CEPH_NOSNAP)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	monc = &amp;dev-&gt;rbd_client-&gt;client-&gt;monc;</div><div class='hunk'>@@ -1683,7 +1667,9 @@ static int rbd_header_add_snap(struct rbd_device *dev,</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;header.snapc-&gt;seq =  new_snapid;</div><div class='add'>+	down_write(&amp;dev-&gt;header_rwsem);</div><div class='add'>+	dev-&gt;header.snapc-&gt;seq = new_snapid;</div><div class='add'>+	up_write(&amp;dev-&gt;header_rwsem);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> bad:</div><div class='hunk'>@@ -1703,7 +1689,7 @@ static void __rbd_remove_all_snaps(struct rbd_device *rbd_dev)</div><div class='ctx'> /*</div><div class='ctx'>  * only read the first part of the ondisk header, without the snaps info</div><div class='ctx'>  */</div><div class='del'>-static int __rbd_update_snaps(struct rbd_device *rbd_dev)</div><div class='add'>+static int __rbd_refresh_header(struct rbd_device *rbd_dev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct rbd_image_header h;</div><div class='hunk'>@@ -1890,7 +1876,7 @@ static ssize_t rbd_image_refresh(struct device *dev,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock_nested(&amp;ctl_mutex, SINGLE_DEPTH_NESTING);</div><div class='ctx'> </div><div class='del'>-	rc = __rbd_update_snaps(rbd_dev);</div><div class='add'>+	rc = __rbd_refresh_header(rbd_dev);</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='ctx'> 		ret = rc;</div><div class='ctx'> </div><div class='hunk'>@@ -1949,7 +1935,7 @@ static ssize_t rbd_snap_size_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct rbd_snap *snap = container_of(dev, struct rbd_snap, dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%zd\n", snap-&gt;size);</div><div class='add'>+	return sprintf(buf, "%llu\n", (unsigned long long)snap-&gt;size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t rbd_snap_id_show(struct device *dev,</div><div class='hunk'>@@ -1958,7 +1944,7 @@ static ssize_t rbd_snap_id_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct rbd_snap *snap = container_of(dev, struct rbd_snap, dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%llu\n", (unsigned long long) snap-&gt;id);</div><div class='add'>+	return sprintf(buf, "%llu\n", (unsigned long long)snap-&gt;id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static DEVICE_ATTR(snap_size, S_IRUGO, rbd_snap_size_show, NULL);</div><div class='hunk'>@@ -2173,7 +2159,7 @@ static int rbd_init_watch_dev(struct rbd_device *rbd_dev)</div><div class='ctx'> 					 rbd_dev-&gt;header.obj_version);</div><div class='ctx'> 		if (ret == -ERANGE) {</div><div class='ctx'> 			mutex_lock_nested(&amp;ctl_mutex, SINGLE_DEPTH_NESTING);</div><div class='del'>-			rc = __rbd_update_snaps(rbd_dev);</div><div class='add'>+			rc = __rbd_refresh_header(rbd_dev);</div><div class='ctx'> 			mutex_unlock(&amp;ctl_mutex);</div><div class='ctx'> 			if (rc &lt; 0)</div><div class='ctx'> 				return rc;</div><div class='hunk'>@@ -2558,7 +2544,7 @@ static ssize_t rbd_snap_add(struct device *dev,</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto err_unlock;</div><div class='ctx'> </div><div class='del'>-	ret = __rbd_update_snaps(rbd_dev);</div><div class='add'>+	ret = __rbd_refresh_header(rbd_dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto err_unlock;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c<br/>index 0d39f2f4294a..693187df7601 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/virtio_blk.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/virtio_blk.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/virtio_blk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/virtio_blk.c</a></div><div class='hunk'>@@ -29,9 +29,6 @@ struct virtio_blk</div><div class='ctx'> 	/* The disk structure for the kernel. */</div><div class='ctx'> 	struct gendisk *disk;</div><div class='ctx'> </div><div class='del'>-	/* Request tracking. */</div><div class='del'>-	struct list_head reqs;</div><div class='del'>-</div><div class='ctx'> 	mempool_t *pool;</div><div class='ctx'> </div><div class='ctx'> 	/* Process context for config space updates */</div><div class='hunk'>@@ -55,7 +52,6 @@ struct virtio_blk</div><div class='ctx'> </div><div class='ctx'> struct virtblk_req</div><div class='ctx'> {</div><div class='del'>-	struct list_head list;</div><div class='ctx'> 	struct request *req;</div><div class='ctx'> 	struct virtio_blk_outhdr out_hdr;</div><div class='ctx'> 	struct virtio_scsi_inhdr in_hdr;</div><div class='hunk'>@@ -99,7 +95,6 @@ static void blk_done(struct virtqueue *vq)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		__blk_end_request_all(vbr-&gt;req, error);</div><div class='del'>-		list_del(&amp;vbr-&gt;list);</div><div class='ctx'> 		mempool_free(vbr, vblk-&gt;pool);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* In case queue is stopped waiting for more buffers. */</div><div class='hunk'>@@ -184,7 +179,6 @@ static bool do_req(struct request_queue *q, struct virtio_blk *vblk,</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	list_add_tail(&amp;vbr-&gt;list, &amp;vblk-&gt;reqs);</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -437,7 +431,6 @@ static int __devinit virtblk_probe(struct virtio_device *vdev)</div><div class='ctx'> 		goto out_free_index;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	INIT_LIST_HEAD(&amp;vblk-&gt;reqs);</div><div class='ctx'> 	spin_lock_init(&amp;vblk-&gt;lock);</div><div class='ctx'> 	vblk-&gt;vdev = vdev;</div><div class='ctx'> 	vblk-&gt;sg_elems = sg_elems;</div><div class='hunk'>@@ -583,21 +576,29 @@ static void __devexit virtblk_remove(struct virtio_device *vdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct virtio_blk *vblk = vdev-&gt;priv;</div><div class='ctx'> 	int index = vblk-&gt;index;</div><div class='add'>+	struct virtblk_req *vbr;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	/* Prevent config work handler from accessing the device. */</div><div class='ctx'> 	mutex_lock(&amp;vblk-&gt;config_lock);</div><div class='ctx'> 	vblk-&gt;config_enable = false;</div><div class='ctx'> 	mutex_unlock(&amp;vblk-&gt;config_lock);</div><div class='ctx'> </div><div class='del'>-	/* Nothing should be pending. */</div><div class='del'>-	BUG_ON(!list_empty(&amp;vblk-&gt;reqs));</div><div class='del'>-</div><div class='ctx'> 	/* Stop all the virtqueues. */</div><div class='ctx'> 	vdev-&gt;config-&gt;reset(vdev);</div><div class='ctx'> </div><div class='ctx'> 	flush_work(&amp;vblk-&gt;config_work);</div><div class='ctx'> </div><div class='ctx'> 	del_gendisk(vblk-&gt;disk);</div><div class='add'>+</div><div class='add'>+	/* Abort requests dispatched to driver. */</div><div class='add'>+	spin_lock_irqsave(&amp;vblk-&gt;lock, flags);</div><div class='add'>+	while ((vbr = virtqueue_detach_unused_buf(vblk-&gt;vq))) {</div><div class='add'>+		__blk_end_request_all(vbr-&gt;req, -EIO);</div><div class='add'>+		mempool_free(vbr, vblk-&gt;pool);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;vblk-&gt;lock, flags);</div><div class='add'>+</div><div class='ctx'> 	blk_cleanup_queue(vblk-&gt;disk-&gt;queue);</div><div class='ctx'> 	put_disk(vblk-&gt;disk);</div><div class='ctx'> 	mempool_destroy(vblk-&gt;pool);</div><div class='head'>diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c<br/>index 4e86393a09cf..60eed4bdd2e4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/block/xen-blkfront.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/block/xen-blkfront.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/block/xen-blkfront.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/block/xen-blkfront.c</a></div><div class='hunk'>@@ -526,6 +526,14 @@ static int xen_translate_vdev(int vdevice, int *minor, unsigned int *offset)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static char *encode_disk_name(char *ptr, unsigned int n)</div><div class='add'>+{</div><div class='add'>+	if (n &gt;= 26)</div><div class='add'>+		ptr = encode_disk_name(ptr, n / 26 - 1);</div><div class='add'>+	*ptr = 'a' + n % 26;</div><div class='add'>+	return ptr + 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int xlvbd_alloc_gendisk(blkif_sector_t capacity,</div><div class='ctx'> 			       struct blkfront_info *info,</div><div class='ctx'> 			       u16 vdisk_info, u16 sector_size)</div><div class='hunk'>@@ -536,6 +544,7 @@ static int xlvbd_alloc_gendisk(blkif_sector_t capacity,</div><div class='ctx'> 	unsigned int offset;</div><div class='ctx'> 	int minor;</div><div class='ctx'> 	int nr_parts;</div><div class='add'>+	char *ptr;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(info-&gt;gd != NULL);</div><div class='ctx'> 	BUG_ON(info-&gt;rq != NULL);</div><div class='hunk'>@@ -560,7 +569,11 @@ static int xlvbd_alloc_gendisk(blkif_sector_t capacity,</div><div class='ctx'> 					"emulated IDE disks,\n\t choose an xvd device name"</div><div class='ctx'> 					"from xvde on\n", info-&gt;vdevice);</div><div class='ctx'> 	}</div><div class='del'>-	err = -ENODEV;</div><div class='add'>+	if (minor &gt;&gt; MINORBITS) {</div><div class='add'>+		pr_warn("blkfront: %#x's minor (%#x) out of range; ignoring\n",</div><div class='add'>+			info-&gt;vdevice, minor);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if ((minor % nr_parts) == 0)</div><div class='ctx'> 		nr_minors = nr_parts;</div><div class='hunk'>@@ -574,23 +587,14 @@ static int xlvbd_alloc_gendisk(blkif_sector_t capacity,</div><div class='ctx'> 	if (gd == NULL)</div><div class='ctx'> 		goto release;</div><div class='ctx'> </div><div class='del'>-	if (nr_minors &gt; 1) {</div><div class='del'>-		if (offset &lt; 26)</div><div class='del'>-			sprintf(gd-&gt;disk_name, "%s%c", DEV_NAME, 'a' + offset);</div><div class='del'>-		else</div><div class='del'>-			sprintf(gd-&gt;disk_name, "%s%c%c", DEV_NAME,</div><div class='del'>-				'a' + ((offset / 26)-1), 'a' + (offset % 26));</div><div class='del'>-	} else {</div><div class='del'>-		if (offset &lt; 26)</div><div class='del'>-			sprintf(gd-&gt;disk_name, "%s%c%d", DEV_NAME,</div><div class='del'>-				'a' + offset,</div><div class='del'>-				minor &amp; (nr_parts - 1));</div><div class='del'>-		else</div><div class='del'>-			sprintf(gd-&gt;disk_name, "%s%c%c%d", DEV_NAME,</div><div class='del'>-				'a' + ((offset / 26) - 1),</div><div class='del'>-				'a' + (offset % 26),</div><div class='del'>-				minor &amp; (nr_parts - 1));</div><div class='del'>-	}</div><div class='add'>+	strcpy(gd-&gt;disk_name, DEV_NAME);</div><div class='add'>+	ptr = encode_disk_name(gd-&gt;disk_name + sizeof(DEV_NAME) - 1, offset);</div><div class='add'>+	BUG_ON(ptr &gt;= gd-&gt;disk_name + DISK_NAME_LEN);</div><div class='add'>+	if (nr_minors &gt; 1)</div><div class='add'>+		*ptr = 0;</div><div class='add'>+	else</div><div class='add'>+		snprintf(ptr, gd-&gt;disk_name + DISK_NAME_LEN - ptr,</div><div class='add'>+			 "%d", minor &amp; (nr_parts - 1));</div><div class='ctx'> </div><div class='ctx'> 	gd-&gt;major = XENVBD_MAJOR;</div><div class='ctx'> 	gd-&gt;first_minor = minor;</div><div class='hunk'>@@ -1496,7 +1500,9 @@ module_init(xlblk_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit xlblk_exit(void)</div><div class='ctx'> {</div><div class='del'>-	return xenbus_unregister_driver(&amp;blkfront_driver);</div><div class='add'>+	xenbus_unregister_driver(&amp;blkfront_driver);</div><div class='add'>+	unregister_blkdev(XENVBD_MAJOR, DEV_NAME);</div><div class='add'>+	kfree(minors);</div><div class='ctx'> }</div><div class='ctx'> module_exit(xlblk_exit);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/bluetooth/ath3k.c b/drivers/bluetooth/ath3k.c<br/>index ae9edca7b56d..ad591bd240ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bluetooth/ath3k.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bluetooth/ath3k.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bluetooth/ath3k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/ath3k.c</a></div><div class='hunk'>@@ -75,10 +75,15 @@ static struct usb_device_id ath3k_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x0CF3, 0x311D) },</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3375) },</div><div class='ctx'> 	{ USB_DEVICE(0x04CA, 0x3005) },</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3362) },</div><div class='add'>+	{ USB_DEVICE(0x0CF3, 0xE004) },</div><div class='ctx'> </div><div class='ctx'> 	/* Atheros AR5BBU12 with sflash firmware */</div><div class='ctx'> 	{ USB_DEVICE(0x0489, 0xE02C) },</div><div class='ctx'> </div><div class='add'>+	/* Atheros AR5BBU22 with sflash firmware */</div><div class='add'>+	{ USB_DEVICE(0x0489, 0xE03C) },</div><div class='add'>+</div><div class='ctx'> 	{ }	/* Terminating entry */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -94,6 +99,11 @@ static struct usb_device_id ath3k_blist_tbl[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x0cf3, 0x311D), .driver_info = BTUSB_ATH3012 },</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3375), .driver_info = BTUSB_ATH3012 },</div><div class='ctx'> 	{ USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 },</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3362), .driver_info = BTUSB_ATH3012 },</div><div class='add'>+	{ USB_DEVICE(0x0cf3, 0xe004), .driver_info = BTUSB_ATH3012 },</div><div class='add'>+</div><div class='add'>+	/* Atheros AR5BBU22 with sflash firmware */</div><div class='add'>+	{ USB_DEVICE(0x0489, 0xE03C), .driver_info = BTUSB_ATH3012 },</div><div class='ctx'> </div><div class='ctx'> 	{ }	/* Terminating entry */</div><div class='ctx'> };</div><div class='hunk'>@@ -435,6 +445,7 @@ static struct usb_driver ath3k_driver = {</div><div class='ctx'> 	.probe		= ath3k_probe,</div><div class='ctx'> 	.disconnect	= ath3k_disconnect,</div><div class='ctx'> 	.id_table	= ath3k_table,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(ath3k_driver);</div><div class='head'>diff --git a/drivers/bluetooth/bcm203x.c b/drivers/bluetooth/bcm203x.c<br/>index 1e742a50e2cd..37ae175162f3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bluetooth/bcm203x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bluetooth/bcm203x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bluetooth/bcm203x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/bcm203x.c</a></div><div class='hunk'>@@ -279,6 +279,7 @@ static struct usb_driver bcm203x_driver = {</div><div class='ctx'> 	.probe		= bcm203x_probe,</div><div class='ctx'> 	.disconnect	= bcm203x_disconnect,</div><div class='ctx'> 	.id_table	= bcm203x_table,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(bcm203x_driver);</div><div class='head'>diff --git a/drivers/bluetooth/bfusb.c b/drivers/bluetooth/bfusb.c<br/>index b8ac1c549a1c..32e825144fe9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bluetooth/bfusb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bluetooth/bfusb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bluetooth/bfusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/bfusb.c</a></div><div class='hunk'>@@ -749,6 +749,7 @@ static struct usb_driver bfusb_driver = {</div><div class='ctx'> 	.probe		= bfusb_probe,</div><div class='ctx'> 	.disconnect	= bfusb_disconnect,</div><div class='ctx'> 	.id_table	= bfusb_table,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(bfusb_driver);</div><div class='head'>diff --git a/drivers/bluetooth/bpa10x.c b/drivers/bluetooth/bpa10x.c<br/>index d894340a7601..609861a53c28 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bluetooth/bpa10x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bluetooth/bpa10x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bluetooth/bpa10x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/bpa10x.c</a></div><div class='hunk'>@@ -508,6 +508,7 @@ static struct usb_driver bpa10x_driver = {</div><div class='ctx'> 	.probe		= bpa10x_probe,</div><div class='ctx'> 	.disconnect	= bpa10x_disconnect,</div><div class='ctx'> 	.id_table	= bpa10x_table,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(bpa10x_driver);</div><div class='head'>diff --git a/drivers/bluetooth/btmrvl_drv.h b/drivers/bluetooth/btmrvl_drv.h<br/>index 90bda50dc446..94f2d65131c4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bluetooth/btmrvl_drv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bluetooth/btmrvl_drv.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bluetooth/btmrvl_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/btmrvl_drv.h</a></div><div class='hunk'>@@ -67,6 +67,7 @@ struct btmrvl_adapter {</div><div class='ctx'> 	u8 wakeup_tries;</div><div class='ctx'> 	wait_queue_head_t cmd_wait_q;</div><div class='ctx'> 	u8 cmd_complete;</div><div class='add'>+	bool is_suspended;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct btmrvl_private {</div><div class='hunk'>@@ -139,8 +140,10 @@ void btmrvl_check_evtpkt(struct btmrvl_private *priv, struct sk_buff *skb);</div><div class='ctx'> int btmrvl_process_event(struct btmrvl_private *priv, struct sk_buff *skb);</div><div class='ctx'> </div><div class='ctx'> int btmrvl_send_module_cfg_cmd(struct btmrvl_private *priv, int subcmd);</div><div class='add'>+int btmrvl_send_hscfg_cmd(struct btmrvl_private *priv);</div><div class='ctx'> int btmrvl_enable_ps(struct btmrvl_private *priv);</div><div class='ctx'> int btmrvl_prepare_command(struct btmrvl_private *priv);</div><div class='add'>+int btmrvl_enable_hs(struct btmrvl_private *priv);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> void btmrvl_debugfs_init(struct hci_dev *hdev);</div><div class='head'>diff --git a/drivers/bluetooth/btmrvl_main.c b/drivers/bluetooth/btmrvl_main.c<br/>index d1209adc882d..681ca9d18e12 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bluetooth/btmrvl_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bluetooth/btmrvl_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bluetooth/btmrvl_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/btmrvl_main.c</a></div><div class='hunk'>@@ -200,6 +200,36 @@ int btmrvl_send_module_cfg_cmd(struct btmrvl_private *priv, int subcmd)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(btmrvl_send_module_cfg_cmd);</div><div class='ctx'> </div><div class='add'>+int btmrvl_send_hscfg_cmd(struct btmrvl_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct btmrvl_cmd *cmd;</div><div class='add'>+</div><div class='add'>+	skb = bt_skb_alloc(sizeof(*cmd), GFP_ATOMIC);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		BT_ERR("No free skb");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd = (struct btmrvl_cmd *) skb_put(skb, sizeof(*cmd));</div><div class='add'>+	cmd-&gt;ocf_ogf = cpu_to_le16(hci_opcode_pack(OGF,</div><div class='add'>+						   BT_CMD_HOST_SLEEP_CONFIG));</div><div class='add'>+	cmd-&gt;length = 2;</div><div class='add'>+	cmd-&gt;data[0] = (priv-&gt;btmrvl_dev.gpio_gap &amp; 0xff00) &gt;&gt; 8;</div><div class='add'>+	cmd-&gt;data[1] = (u8) (priv-&gt;btmrvl_dev.gpio_gap &amp; 0x00ff);</div><div class='add'>+</div><div class='add'>+	bt_cb(skb)-&gt;pkt_type = MRVL_VENDOR_PKT;</div><div class='add'>+</div><div class='add'>+	skb-&gt;dev = (void *) priv-&gt;btmrvl_dev.hcidev;</div><div class='add'>+	skb_queue_head(&amp;priv-&gt;adapter-&gt;tx_queue, skb);</div><div class='add'>+</div><div class='add'>+	BT_DBG("Queue HSCFG Command, gpio=0x%x, gap=0x%x", cmd-&gt;data[0],</div><div class='add'>+	       cmd-&gt;data[1]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(btmrvl_send_hscfg_cmd);</div><div class='add'>+</div><div class='ctx'> int btmrvl_enable_ps(struct btmrvl_private *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='hunk'>@@ -232,7 +262,7 @@ int btmrvl_enable_ps(struct btmrvl_private *priv)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(btmrvl_enable_ps);</div><div class='ctx'> </div><div class='del'>-static int btmrvl_enable_hs(struct btmrvl_private *priv)</div><div class='add'>+int btmrvl_enable_hs(struct btmrvl_private *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct btmrvl_cmd *cmd;</div><div class='hunk'>@@ -268,35 +298,15 @@ static int btmrvl_enable_hs(struct btmrvl_private *priv)</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(btmrvl_enable_hs);</div><div class='ctx'> </div><div class='ctx'> int btmrvl_prepare_command(struct btmrvl_private *priv)</div><div class='ctx'> {</div><div class='del'>-	struct sk_buff *skb = NULL;</div><div class='del'>-	struct btmrvl_cmd *cmd;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;btmrvl_dev.hscfgcmd) {</div><div class='ctx'> 		priv-&gt;btmrvl_dev.hscfgcmd = 0;</div><div class='del'>-</div><div class='del'>-		skb = bt_skb_alloc(sizeof(*cmd), GFP_ATOMIC);</div><div class='del'>-		if (skb == NULL) {</div><div class='del'>-			BT_ERR("No free skb");</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		cmd = (struct btmrvl_cmd *) skb_put(skb, sizeof(*cmd));</div><div class='del'>-		cmd-&gt;ocf_ogf = cpu_to_le16(hci_opcode_pack(OGF, BT_CMD_HOST_SLEEP_CONFIG));</div><div class='del'>-		cmd-&gt;length = 2;</div><div class='del'>-		cmd-&gt;data[0] = (priv-&gt;btmrvl_dev.gpio_gap &amp; 0xff00) &gt;&gt; 8;</div><div class='del'>-		cmd-&gt;data[1] = (u8) (priv-&gt;btmrvl_dev.gpio_gap &amp; 0x00ff);</div><div class='del'>-</div><div class='del'>-		bt_cb(skb)-&gt;pkt_type = MRVL_VENDOR_PKT;</div><div class='del'>-</div><div class='del'>-		skb-&gt;dev = (void *) priv-&gt;btmrvl_dev.hcidev;</div><div class='del'>-		skb_queue_head(&amp;priv-&gt;adapter-&gt;tx_queue, skb);</div><div class='del'>-</div><div class='del'>-		BT_DBG("Queue HSCFG Command, gpio=0x%x, gap=0x%x",</div><div class='del'>-						cmd-&gt;data[0], cmd-&gt;data[1]);</div><div class='add'>+		btmrvl_send_hscfg_cmd(priv);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;btmrvl_dev.pscmd) {</div><div class='head'>diff --git a/drivers/bluetooth/btmrvl_sdio.c b/drivers/bluetooth/btmrvl_sdio.c<br/>index 27b74b0d547b..a853244e7fd7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bluetooth/btmrvl_sdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bluetooth/btmrvl_sdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bluetooth/btmrvl_sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/btmrvl_sdio.c</a></div><div class='hunk'>@@ -339,9 +339,7 @@ static int btmrvl_sdio_download_helper(struct btmrvl_sdio_card *card)</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='ctx'> 	kfree(tmphlprbuf);</div><div class='del'>-	if (fw_helper)</div><div class='del'>-		release_firmware(fw_helper);</div><div class='del'>-</div><div class='add'>+	release_firmware(fw_helper);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -484,10 +482,7 @@ static int btmrvl_sdio_download_fw_w_helper(struct btmrvl_sdio_card *card)</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='ctx'> 	kfree(tmpfwbuf);</div><div class='del'>-</div><div class='del'>-	if (fw_firmware)</div><div class='del'>-		release_firmware(fw_firmware);</div><div class='del'>-</div><div class='add'>+	release_firmware(fw_firmware);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1013,6 +1008,9 @@ static int btmrvl_sdio_probe(struct sdio_func *func,</div><div class='ctx'> 	priv-&gt;btmrvl_dev.psmode = 1;</div><div class='ctx'> 	btmrvl_enable_ps(priv);</div><div class='ctx'> </div><div class='add'>+	priv-&gt;btmrvl_dev.gpio_gap = 0xffff;</div><div class='add'>+	btmrvl_send_hscfg_cmd(priv);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> disable_host_int:</div><div class='hunk'>@@ -1048,11 +1046,111 @@ static void btmrvl_sdio_remove(struct sdio_func *func)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int btmrvl_sdio_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sdio_func *func = dev_to_sdio_func(dev);</div><div class='add'>+	struct btmrvl_sdio_card *card;</div><div class='add'>+	struct btmrvl_private *priv;</div><div class='add'>+	mmc_pm_flag_t pm_flags;</div><div class='add'>+	struct hci_dev *hcidev;</div><div class='add'>+</div><div class='add'>+	if (func) {</div><div class='add'>+		pm_flags = sdio_get_host_pm_caps(func);</div><div class='add'>+		BT_DBG("%s: suspend: PM flags = 0x%x", sdio_func_id(func),</div><div class='add'>+		       pm_flags);</div><div class='add'>+		if (!(pm_flags &amp; MMC_PM_KEEP_POWER)) {</div><div class='add'>+			BT_ERR("%s: cannot remain alive while suspended",</div><div class='add'>+			       sdio_func_id(func));</div><div class='add'>+			return -ENOSYS;</div><div class='add'>+		}</div><div class='add'>+		card = sdio_get_drvdata(func);</div><div class='add'>+		if (!card || !card-&gt;priv) {</div><div class='add'>+			BT_ERR("card or priv structure is not valid");</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		BT_ERR("sdio_func is not specified");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = card-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;adapter-&gt;hs_state != HS_ACTIVATED) {</div><div class='add'>+		if (btmrvl_enable_hs(priv)) {</div><div class='add'>+			BT_ERR("HS not actived, suspend failed!");</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	hcidev = priv-&gt;btmrvl_dev.hcidev;</div><div class='add'>+	BT_DBG("%s: SDIO suspend", hcidev-&gt;name);</div><div class='add'>+	hci_suspend_dev(hcidev);</div><div class='add'>+	skb_queue_purge(&amp;priv-&gt;adapter-&gt;tx_queue);</div><div class='add'>+</div><div class='add'>+	priv-&gt;adapter-&gt;is_suspended = true;</div><div class='add'>+</div><div class='add'>+	/* We will keep the power when hs enabled successfully */</div><div class='add'>+	if (priv-&gt;adapter-&gt;hs_state == HS_ACTIVATED) {</div><div class='add'>+		BT_DBG("suspend with MMC_PM_KEEP_POWER");</div><div class='add'>+		return sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER);</div><div class='add'>+	} else {</div><div class='add'>+		BT_DBG("suspend without MMC_PM_KEEP_POWER");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btmrvl_sdio_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sdio_func *func = dev_to_sdio_func(dev);</div><div class='add'>+	struct btmrvl_sdio_card *card;</div><div class='add'>+	struct btmrvl_private *priv;</div><div class='add'>+	mmc_pm_flag_t pm_flags;</div><div class='add'>+	struct hci_dev *hcidev;</div><div class='add'>+</div><div class='add'>+	if (func) {</div><div class='add'>+		pm_flags = sdio_get_host_pm_caps(func);</div><div class='add'>+		BT_DBG("%s: resume: PM flags = 0x%x", sdio_func_id(func),</div><div class='add'>+		       pm_flags);</div><div class='add'>+		card = sdio_get_drvdata(func);</div><div class='add'>+		if (!card || !card-&gt;priv) {</div><div class='add'>+			BT_ERR("card or priv structure is not valid");</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		BT_ERR("sdio_func is not specified");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	priv = card-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;adapter-&gt;is_suspended) {</div><div class='add'>+		BT_DBG("device already resumed");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;adapter-&gt;is_suspended = false;</div><div class='add'>+	hcidev = priv-&gt;btmrvl_dev.hcidev;</div><div class='add'>+	BT_DBG("%s: SDIO resume", hcidev-&gt;name);</div><div class='add'>+	hci_resume_dev(hcidev);</div><div class='add'>+	priv-&gt;hw_wakeup_firmware(priv);</div><div class='add'>+	priv-&gt;adapter-&gt;hs_state = HS_DEACTIVATED;</div><div class='add'>+	BT_DBG("%s: HS DEACTIVATED in resume!", hcidev-&gt;name);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops btmrvl_sdio_pm_ops = {</div><div class='add'>+	.suspend	= btmrvl_sdio_suspend,</div><div class='add'>+	.resume		= btmrvl_sdio_resume,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct sdio_driver bt_mrvl_sdio = {</div><div class='ctx'> 	.name		= "btmrvl_sdio",</div><div class='ctx'> 	.id_table	= btmrvl_sdio_ids,</div><div class='ctx'> 	.probe		= btmrvl_sdio_probe,</div><div class='ctx'> 	.remove		= btmrvl_sdio_remove,</div><div class='add'>+	.drv = {</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.pm = &amp;btmrvl_sdio_pm_ops,</div><div class='add'>+	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init btmrvl_sdio_init_module(void)</div><div class='head'>diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c<br/>index 3311b812a0c6..c9463af8e564 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bluetooth/btusb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bluetooth/btusb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bluetooth/btusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/btusb.c</a></div><div class='hunk'>@@ -101,12 +101,16 @@ static struct usb_device_id btusb_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x0c10, 0x0000) },</div><div class='ctx'> </div><div class='ctx'> 	/* Broadcom BCM20702A0 */</div><div class='add'>+	{ USB_DEVICE(0x0489, 0xe042) },</div><div class='ctx'> 	{ USB_DEVICE(0x0a5c, 0x21e3) },</div><div class='ctx'> 	{ USB_DEVICE(0x0a5c, 0x21e6) },</div><div class='ctx'> 	{ USB_DEVICE(0x0a5c, 0x21e8) },</div><div class='ctx'> 	{ USB_DEVICE(0x0a5c, 0x21f3) },</div><div class='ctx'> 	{ USB_DEVICE(0x413c, 0x8197) },</div><div class='ctx'> </div><div class='add'>+	/* Foxconn - Hon Hai */</div><div class='add'>+	{ USB_DEVICE(0x0489, 0xe033) },</div><div class='add'>+</div><div class='ctx'> 	{ }	/* Terminating entry */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -133,10 +137,15 @@ static struct usb_device_id blacklist_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x0cf3, 0x311d), .driver_info = BTUSB_ATH3012 },</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3375), .driver_info = BTUSB_ATH3012 },</div><div class='ctx'> 	{ USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 },</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3362), .driver_info = BTUSB_ATH3012 },</div><div class='add'>+	{ USB_DEVICE(0x0cf3, 0xe004), .driver_info = BTUSB_ATH3012 },</div><div class='ctx'> </div><div class='ctx'> 	/* Atheros AR5BBU12 with sflash firmware */</div><div class='ctx'> 	{ USB_DEVICE(0x0489, 0xe02c), .driver_info = BTUSB_IGNORE },</div><div class='ctx'> </div><div class='add'>+	/* Atheros AR5BBU12 with sflash firmware */</div><div class='add'>+	{ USB_DEVICE(0x0489, 0xe03c), .driver_info = BTUSB_ATH3012 },</div><div class='add'>+</div><div class='ctx'> 	/* Broadcom BCM2035 */</div><div class='ctx'> 	{ USB_DEVICE(0x0a5c, 0x2035), .driver_info = BTUSB_WRONG_SCO_MTU },</div><div class='ctx'> 	{ USB_DEVICE(0x0a5c, 0x200a), .driver_info = BTUSB_WRONG_SCO_MTU },</div><div class='hunk'>@@ -849,6 +858,7 @@ static void btusb_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct btusb_data *data = container_of(work, struct btusb_data, work);</div><div class='ctx'> 	struct hci_dev *hdev = data-&gt;hdev;</div><div class='add'>+	int new_alts;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (hdev-&gt;conn_hash.sco_num &gt; 0) {</div><div class='hunk'>@@ -862,11 +872,19 @@ static void btusb_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 			set_bit(BTUSB_DID_ISO_RESUME, &amp;data-&gt;flags);</div><div class='ctx'> 		}</div><div class='del'>-		if (data-&gt;isoc_altsetting != 2) {</div><div class='add'>+</div><div class='add'>+		if (hdev-&gt;voice_setting &amp; 0x0020) {</div><div class='add'>+			static const int alts[3] = { 2, 4, 5 };</div><div class='add'>+			new_alts = alts[hdev-&gt;conn_hash.sco_num - 1];</div><div class='add'>+		} else {</div><div class='add'>+			new_alts = hdev-&gt;conn_hash.sco_num;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (data-&gt;isoc_altsetting != new_alts) {</div><div class='ctx'> 			clear_bit(BTUSB_ISOC_RUNNING, &amp;data-&gt;flags);</div><div class='ctx'> 			usb_kill_anchored_urbs(&amp;data-&gt;isoc_anchor);</div><div class='ctx'> </div><div class='del'>-			if (__set_isoc_interface(hdev, 2) &lt; 0)</div><div class='add'>+			if (__set_isoc_interface(hdev, new_alts) &lt; 0)</div><div class='ctx'> 				return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1212,6 +1230,7 @@ static struct usb_driver btusb_driver = {</div><div class='ctx'> #endif</div><div class='ctx'> 	.id_table	= btusb_table,</div><div class='ctx'> 	.supports_autosuspend = 1,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(btusb_driver);</div><div class='head'>diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c<br/>index 98a8c05d4f23..e564579a6115 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bluetooth/hci_ldisc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bluetooth/hci_ldisc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bluetooth/hci_ldisc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/hci_ldisc.c</a></div><div class='hunk'>@@ -388,7 +388,7 @@ static int hci_uart_register_dev(struct hci_uart *hu)</div><div class='ctx'> 	hdev-&gt;close = hci_uart_close;</div><div class='ctx'> 	hdev-&gt;flush = hci_uart_flush;</div><div class='ctx'> 	hdev-&gt;send  = hci_uart_send_frame;</div><div class='del'>-	hdev-&gt;parent = hu-&gt;tty-&gt;dev;</div><div class='add'>+	SET_HCIDEV_DEV(hdev, hu-&gt;tty-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(HCI_UART_RAW_DEVICE, &amp;hu-&gt;hdev_flags))</div><div class='ctx'> 		set_bit(HCI_QUIRK_RAW_DEVICE, &amp;hdev-&gt;quirks);</div><div class='head'>diff --git a/drivers/bluetooth/hci_vhci.c b/drivers/bluetooth/hci_vhci.c<br/>index 158bfe507da7..3f72595a6017 100644<br/>--- a/<a href='/drm-misc/tree/drivers/bluetooth/hci_vhci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/bluetooth/hci_vhci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/bluetooth/hci_vhci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/bluetooth/hci_vhci.c</a></div><div class='hunk'>@@ -252,8 +252,9 @@ static int vhci_open(struct inode *inode, struct file *file)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	file-&gt;private_data = data;</div><div class='add'>+	nonseekable_open(inode, file);</div><div class='ctx'> </div><div class='del'>-	return nonseekable_open(inode, file);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vhci_release(struct inode *inode, struct file *file)</div><div class='head'>diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig<br/>index ee946865d6cb..ea6f6325f9ba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/Kconfig</a></div><div class='hunk'>@@ -585,14 +585,6 @@ config DEVPORT</div><div class='ctx'> </div><div class='ctx'> source "drivers/s390/char/Kconfig"</div><div class='ctx'> </div><div class='del'>-config RAMOOPS</div><div class='del'>-	tristate "Log panic/oops to a RAM buffer"</div><div class='del'>-	depends on HAS_IOMEM</div><div class='del'>-	default n</div><div class='del'>-	help</div><div class='del'>-	  This enables panic and oops messages to be logged to a circular</div><div class='del'>-	  buffer in RAM where it can be read back at some later point.</div><div class='del'>-</div><div class='ctx'> config MSM_SMD_PKT</div><div class='ctx'> 	bool "Enable device interface for some SMD packet ports"</div><div class='ctx'> 	default n</div><div class='head'>diff --git a/drivers/char/Makefile b/drivers/char/Makefile<br/>index 0dc5d7ce4864..d0b27a39f1d4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/Makefile</a></div><div class='hunk'>@@ -58,7 +58,6 @@ obj-$(CONFIG_HANGCHECK_TIMER)	+= hangcheck-timer.o</div><div class='ctx'> obj-$(CONFIG_TCG_TPM)		+= tpm/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PS3_FLASH)		+= ps3flash.o</div><div class='del'>-obj-$(CONFIG_RAMOOPS)		+= ramoops.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_JS_RTC)		+= js-rtc.o</div><div class='ctx'> js-rtc-y = rtc.o</div><div class='head'>diff --git a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c<br/>index 17e05d1076b3..a0df182f6f7d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/agp/generic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/agp/generic.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/agp/generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/agp/generic.c</a></div><div class='hunk'>@@ -958,7 +958,7 @@ int agp_generic_create_gatt_table(struct agp_bridge_data *bridge)</div><div class='ctx'> 	if (set_memory_uc((unsigned long)table, 1 &lt;&lt; page_order))</div><div class='ctx'> 		printk(KERN_WARNING "Could not set GATT table memory to UC!\n");</div><div class='ctx'> </div><div class='del'>-	bridge-&gt;gatt_table = (void *)table;</div><div class='add'>+	bridge-&gt;gatt_table = (u32 __iomem *)table;</div><div class='ctx'> #else</div><div class='ctx'> 	bridge-&gt;gatt_table = ioremap_nocache(virt_to_phys(table),</div><div class='ctx'> 					(PAGE_SIZE * (1 &lt;&lt; page_order)));</div><div class='hunk'>@@ -1010,7 +1010,6 @@ int agp_generic_free_gatt_table(struct agp_bridge_data *bridge)</div><div class='ctx'> 	case LVL2_APER_SIZE:</div><div class='ctx'> 		/* The generic routines can't deal with 2 level gatt's */</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		page_order = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1077,7 +1076,6 @@ int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)</div><div class='ctx'> 	case LVL2_APER_SIZE:</div><div class='ctx'> 		/* The generic routines can't deal with 2 level gatt's */</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		num_entries = 0;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c<br/>index 962e75dc4781..0a4185279417 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/agp/intel-agp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/agp/intel-agp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/agp/intel-agp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/agp/intel-agp.c</a></div><div class='hunk'>@@ -898,6 +898,7 @@ static struct pci_device_id agp_intel_pci_table[] = {</div><div class='ctx'> 	ID(PCI_DEVICE_ID_INTEL_B43_HB),</div><div class='ctx'> 	ID(PCI_DEVICE_ID_INTEL_B43_1_HB),</div><div class='ctx'> 	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB),</div><div class='add'>+	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB),</div><div class='ctx'> 	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),</div><div class='ctx'> 	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),</div><div class='ctx'> 	ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),</div><div class='hunk'>@@ -907,6 +908,11 @@ static struct pci_device_id agp_intel_pci_table[] = {</div><div class='ctx'> 	ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_HB),</div><div class='ctx'> 	ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_HB),</div><div class='ctx'> 	ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_HB),</div><div class='add'>+	ID(PCI_DEVICE_ID_INTEL_VALLEYVIEW_HB),</div><div class='add'>+	ID(PCI_DEVICE_ID_INTEL_HASWELL_HB),</div><div class='add'>+	ID(PCI_DEVICE_ID_INTEL_HASWELL_M_HB),</div><div class='add'>+	ID(PCI_DEVICE_ID_INTEL_HASWELL_S_HB),</div><div class='add'>+	ID(PCI_DEVICE_ID_INTEL_HASWELL_E_HB),</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h<br/>index 7ea18a5fe71c..8e2d9140f300 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/agp/intel-agp.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/agp/intel-agp.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/agp/intel-agp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/agp/intel-agp.h</a></div><div class='hunk'>@@ -96,6 +96,7 @@</div><div class='ctx'> #define G4x_GMCH_SIZE_VT_2M	(G4x_GMCH_SIZE_2M | G4x_GMCH_SIZE_VT_EN)</div><div class='ctx'> </div><div class='ctx'> #define GFX_FLSH_CNTL		0x2170 /* 915+ */</div><div class='add'>+#define GFX_FLSH_CNTL_VLV	0x101008</div><div class='ctx'> </div><div class='ctx'> #define I810_DRAM_CTL		0x3000</div><div class='ctx'> #define I810_DRAM_ROW_0		0x00000001</div><div class='hunk'>@@ -211,6 +212,7 @@</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_G41_HB          0x2E30</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_G41_IG          0x2E32</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB	    0x0040</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB	    0x0069</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG	    0x0042</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB	    0x0044</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB	    0x0062</div><div class='hunk'>@@ -235,6 +237,19 @@</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_HB		0x0158  /* Server */</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT1_IG		0x015A</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT2_IG		0x016A</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_HB		0x0F00 /* VLV1 */</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG		0x0F30</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_HASWELL_HB				0x0400 /* Desktop */</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG		0x0402</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG		0x0412</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB			0x0404 /* Mobile */</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG		0x0406</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG		0x0416</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB			0x0408 /* Server */</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG		0x040a</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG		0x041a</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_HASWELL_SDV		0x0c16 /* SDV */</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB			0x0c04</div><div class='ctx'> </div><div class='ctx'> int intel_gmch_probe(struct pci_dev *pdev,</div><div class='ctx'> 			       struct agp_bridge_data *bridge);</div><div class='head'>diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c<br/>index 7f025fb620de..1237e7575c3f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/agp/intel-gtt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/agp/intel-gtt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/agp/intel-gtt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/agp/intel-gtt.c</a></div><div class='hunk'>@@ -1179,6 +1179,20 @@ static void gen6_write_entry(dma_addr_t addr, unsigned int entry,</div><div class='ctx'> 	writel(addr | pte_flags, intel_private.gtt + entry);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void valleyview_write_entry(dma_addr_t addr, unsigned int entry,</div><div class='add'>+				   unsigned int flags)</div><div class='add'>+{</div><div class='add'>+	u32 pte_flags;</div><div class='add'>+</div><div class='add'>+	pte_flags = GEN6_PTE_UNCACHED | I810_PTE_VALID;</div><div class='add'>+</div><div class='add'>+	/* gen6 has bit11-4 for physical addr bit39-32 */</div><div class='add'>+	addr |= (addr &gt;&gt; 28) &amp; 0xff0;</div><div class='add'>+	writel(addr | pte_flags, intel_private.gtt + entry);</div><div class='add'>+</div><div class='add'>+	writel(1, intel_private.registers + GFX_FLSH_CNTL_VLV);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void gen6_cleanup(void)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='hunk'>@@ -1205,12 +1219,16 @@ static inline int needs_idle_maps(void)</div><div class='ctx'> static int i9xx_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 reg_addr;</div><div class='add'>+	int size = KB(512);</div><div class='ctx'> </div><div class='ctx'> 	pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &amp;reg_addr);</div><div class='ctx'> </div><div class='ctx'> 	reg_addr &amp;= 0xfff80000;</div><div class='ctx'> </div><div class='del'>-	intel_private.registers = ioremap(reg_addr, 128 * 4096);</div><div class='add'>+	if (INTEL_GTT_GEN &gt;= 7)</div><div class='add'>+		size = MB(2);</div><div class='add'>+</div><div class='add'>+	intel_private.registers = ioremap(reg_addr, size);</div><div class='ctx'> 	if (!intel_private.registers)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -1354,6 +1372,15 @@ static const struct intel_gtt_driver sandybridge_gtt_driver = {</div><div class='ctx'> 	.check_flags = gen6_check_flags,</div><div class='ctx'> 	.chipset_flush = i9xx_chipset_flush,</div><div class='ctx'> };</div><div class='add'>+static const struct intel_gtt_driver valleyview_gtt_driver = {</div><div class='add'>+	.gen = 7,</div><div class='add'>+	.setup = i9xx_setup,</div><div class='add'>+	.cleanup = gen6_cleanup,</div><div class='add'>+	.write_entry = valleyview_write_entry,</div><div class='add'>+	.dma_mask_size = 40,</div><div class='add'>+	.check_flags = gen6_check_flags,</div><div class='add'>+	.chipset_flush = i9xx_chipset_flush,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* Table to describe Intel GMCH and AGP/PCIE GART drivers.  At least one of</div><div class='ctx'>  * driver and gmch_driver must be non-null, and find_gmch will determine</div><div class='hunk'>@@ -1460,6 +1487,22 @@ static const struct intel_gtt_driver_description {</div><div class='ctx'> 	    "Ivybridge", &amp;sandybridge_gtt_driver },</div><div class='ctx'> 	{ PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT2_IG,</div><div class='ctx'> 	    "Ivybridge", &amp;sandybridge_gtt_driver },</div><div class='add'>+	{ PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG,</div><div class='add'>+	    "ValleyView", &amp;valleyview_gtt_driver },</div><div class='add'>+	{ PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG,</div><div class='add'>+	    "Haswell", &amp;sandybridge_gtt_driver },</div><div class='add'>+	{ PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG,</div><div class='add'>+	    "Haswell", &amp;sandybridge_gtt_driver },</div><div class='add'>+	{ PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG,</div><div class='add'>+	    "Haswell", &amp;sandybridge_gtt_driver },</div><div class='add'>+	{ PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG,</div><div class='add'>+	    "Haswell", &amp;sandybridge_gtt_driver },</div><div class='add'>+	{ PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG,</div><div class='add'>+	    "Haswell", &amp;sandybridge_gtt_driver },</div><div class='add'>+	{ PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG,</div><div class='add'>+	    "Haswell", &amp;sandybridge_gtt_driver },</div><div class='add'>+	{ PCI_DEVICE_ID_INTEL_HASWELL_SDV,</div><div class='add'>+	    "Haswell", &amp;sandybridge_gtt_driver },</div><div class='ctx'> 	{ 0, NULL, NULL }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/char/agp/sgi-agp.c b/drivers/char/agp/sgi-agp.c<br/>index ffa888cd1c88..192000377737 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/agp/sgi-agp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/agp/sgi-agp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/agp/sgi-agp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/agp/sgi-agp.c</a></div><div class='hunk'>@@ -158,7 +158,6 @@ static int sgi_tioca_insert_memory(struct agp_memory *mem, off_t pg_start,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LVL2_APER_SIZE:</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		num_entries = 0;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig<br/>index 0689bf6b0183..f45dad39a18b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/hw_random/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/hw_random/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/hw_random/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/hw_random/Kconfig</a></div><div class='hunk'>@@ -62,8 +62,8 @@ config HW_RANDOM_AMD</div><div class='ctx'> </div><div class='ctx'> config HW_RANDOM_ATMEL</div><div class='ctx'> 	tristate "Atmel Random Number Generator support"</div><div class='del'>-	depends on HW_RANDOM &amp;&amp; ARCH_AT91SAM9G45</div><div class='del'>-	default HW_RANDOM</div><div class='add'>+	depends on HW_RANDOM &amp;&amp; HAVE_CLK</div><div class='add'>+	default (HW_RANDOM &amp;&amp; ARCH_AT91)</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  This driver provides kernel-side support for the Random Number</div><div class='ctx'> 	  Generator hardware found on Atmel AT91 devices.</div><div class='hunk'>@@ -250,3 +250,16 @@ config UML_RANDOM</div><div class='ctx'> 	  (check your distro, or download from</div><div class='ctx'> 	  http://sourceforge.net/projects/gkernel/).  rngd periodically reads</div><div class='ctx'> 	  /dev/hwrng and injects the entropy into /dev/random.</div><div class='add'>+</div><div class='add'>+config HW_RANDOM_PSERIES</div><div class='add'>+	tristate "pSeries HW Random Number Generator support"</div><div class='add'>+	depends on HW_RANDOM &amp;&amp; PPC64 &amp;&amp; IBMVIO</div><div class='add'>+	default HW_RANDOM</div><div class='add'>+	---help---</div><div class='add'>+	  This driver provides kernel-side support for the Random Number</div><div class='add'>+	  Generator hardware found on POWER7+ machines and above</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called pseries-rng.</div><div class='add'>+</div><div class='add'>+	  If unsure, say Y.</div><div class='head'>diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile<br/>index b2ff5265a996..d901dfa30321 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/hw_random/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/hw_random/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/hw_random/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/hw_random/Makefile</a></div><div class='hunk'>@@ -22,3 +22,4 @@ obj-$(CONFIG_HW_RANDOM_OCTEON) += octeon-rng.o</div><div class='ctx'> obj-$(CONFIG_HW_RANDOM_NOMADIK) += nomadik-rng.o</div><div class='ctx'> obj-$(CONFIG_HW_RANDOM_PICOXCELL) += picoxcell-rng.o</div><div class='ctx'> obj-$(CONFIG_HW_RANDOM_PPC4XX) += ppc4xx-rng.o</div><div class='add'>+obj-$(CONFIG_HW_RANDOM_PSERIES) += pseries-rng.o</div><div class='head'>diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c<br/>index a07a5caa599c..1412565c01af 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/hw_random/omap-rng.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/hw_random/omap-rng.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/hw_random/omap-rng.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/hw_random/omap-rng.c</a></div><div class='hunk'>@@ -115,22 +115,12 @@ static int __devinit omap_rng_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> </div><div class='del'>-	if (!res) {</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-		goto err_region;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!request_mem_region(res-&gt;start, resource_size(res), pdev-&gt;name)) {</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto err_region;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_set_drvdata(&amp;pdev-&gt;dev, res);</div><div class='del'>-	rng_base = ioremap(res-&gt;start, resource_size(res));</div><div class='add'>+	rng_base = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='ctx'> 	if (!rng_base) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto err_ioremap;</div><div class='ctx'> 	}</div><div class='add'>+	dev_set_drvdata(&amp;pdev-&gt;dev, res);</div><div class='ctx'> </div><div class='ctx'> 	ret = hwrng_register(&amp;omap_rng_ops);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -145,11 +135,8 @@ static int __devinit omap_rng_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_register:</div><div class='del'>-	iounmap(rng_base);</div><div class='ctx'> 	rng_base = NULL;</div><div class='ctx'> err_ioremap:</div><div class='del'>-	release_mem_region(res-&gt;start, resource_size(res));</div><div class='del'>-err_region:</div><div class='ctx'> 	if (cpu_is_omap24xx()) {</div><div class='ctx'> 		clk_disable(rng_ick);</div><div class='ctx'> 		clk_put(rng_ick);</div><div class='hunk'>@@ -159,20 +146,15 @@ err_region:</div><div class='ctx'> </div><div class='ctx'> static int __exit omap_rng_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct resource *res = dev_get_drvdata(&amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='ctx'> 	hwrng_unregister(&amp;omap_rng_ops);</div><div class='ctx'> </div><div class='ctx'> 	omap_rng_write_reg(RNG_MASK_REG, 0x0);</div><div class='ctx'> </div><div class='del'>-	iounmap(rng_base);</div><div class='del'>-</div><div class='ctx'> 	if (cpu_is_omap24xx()) {</div><div class='ctx'> 		clk_disable(rng_ick);</div><div class='ctx'> 		clk_put(rng_ick);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	release_mem_region(res-&gt;start, resource_size(res));</div><div class='ctx'> 	rng_base = NULL;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/char/hw_random/pseries-rng.c b/drivers/char/hw_random/pseries-rng.c<br/>new file mode 100644<br/>index 000000000000..5f1197929f0c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/char/hw_random/pseries-rng.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/hw_random/pseries-rng.c</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2010 Michael Neuling IBM Corporation</div><div class='add'>+ *</div><div class='add'>+ * Driver for the pseries hardware RNG for POWER7+ and above</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/hw_random.h&gt;</div><div class='add'>+#include &lt;asm/vio.h&gt;</div><div class='add'>+</div><div class='add'>+#define MODULE_NAME "pseries-rng"</div><div class='add'>+</div><div class='add'>+static int pseries_rng_data_read(struct hwrng *rng, u32 *data)</div><div class='add'>+{</div><div class='add'>+	if (plpar_hcall(H_RANDOM, (unsigned long *)data) != H_SUCCESS) {</div><div class='add'>+		printk(KERN_ERR "pseries rng hcall error\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	return 8;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pseries_rng_get_desired_dma - Return desired DMA allocate for CMO operations</div><div class='add'>+ *</div><div class='add'>+ * This is a required function for a driver to operate in a CMO environment</div><div class='add'>+ * but this device does not make use of DMA allocations, return 0.</div><div class='add'>+ *</div><div class='add'>+ * Return value:</div><div class='add'>+ *	Number of bytes of IO data the driver will need to perform well -&gt; 0</div><div class='add'>+ */</div><div class='add'>+static unsigned long pseries_rng_get_desired_dma(struct vio_dev *vdev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct hwrng pseries_rng = {</div><div class='add'>+	.name		= MODULE_NAME,</div><div class='add'>+	.data_read	= pseries_rng_data_read,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init pseries_rng_probe(struct vio_dev *dev,</div><div class='add'>+		const struct vio_device_id *id)</div><div class='add'>+{</div><div class='add'>+	return hwrng_register(&amp;pseries_rng);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __exit pseries_rng_remove(struct vio_dev *dev)</div><div class='add'>+{</div><div class='add'>+	hwrng_unregister(&amp;pseries_rng);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct vio_device_id pseries_rng_driver_ids[] = {</div><div class='add'>+	{ "ibm,random-v1", "ibm,random"},</div><div class='add'>+	{ "", "" }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(vio, pseries_rng_driver_ids);</div><div class='add'>+</div><div class='add'>+static struct vio_driver pseries_rng_driver = {</div><div class='add'>+	.name = MODULE_NAME,</div><div class='add'>+	.probe = pseries_rng_probe,</div><div class='add'>+	.remove = pseries_rng_remove,</div><div class='add'>+	.get_desired_dma = pseries_rng_get_desired_dma,</div><div class='add'>+	.id_table = pseries_rng_driver_ids</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init rng_init(void)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_INFO "Registering IBM pSeries RNG driver\n");</div><div class='add'>+	return vio_register_driver(&amp;pseries_rng_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(rng_init);</div><div class='add'>+</div><div class='add'>+static void __exit rng_exit(void)</div><div class='add'>+{</div><div class='add'>+	vio_unregister_driver(&amp;pseries_rng_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(rng_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Michael Neuling &lt;mikey@neuling.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("H/W RNG driver for IBM pSeries processors");</div><div class='head'>diff --git a/drivers/char/mem.c b/drivers/char/mem.c<br/>index d6e9d081c8b1..67c3371723cc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/mem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/mem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/mem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/mem.c</a></div><div class='hunk'>@@ -807,44 +807,6 @@ static const struct file_operations oldmem_fops = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static ssize_t kmsg_writev(struct kiocb *iocb, const struct iovec *iv,</div><div class='del'>-			   unsigned long count, loff_t pos)</div><div class='del'>-{</div><div class='del'>-	char *line, *p;</div><div class='del'>-	int i;</div><div class='del'>-	ssize_t ret = -EFAULT;</div><div class='del'>-	size_t len = iov_length(iv, count);</div><div class='del'>-</div><div class='del'>-	line = kmalloc(len + 1, GFP_KERNEL);</div><div class='del'>-	if (line == NULL)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * copy all vectors into a single string, to ensure we do</div><div class='del'>-	 * not interleave our log line with other printk calls</div><div class='del'>-	 */</div><div class='del'>-	p = line;</div><div class='del'>-	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		if (copy_from_user(p, iv[i].iov_base, iv[i].iov_len))</div><div class='del'>-			goto out;</div><div class='del'>-		p += iv[i].iov_len;</div><div class='del'>-	}</div><div class='del'>-	p[0] = '\0';</div><div class='del'>-</div><div class='del'>-	ret = printk("%s", line);</div><div class='del'>-	/* printk can add a prefix */</div><div class='del'>-	if (ret &gt; len)</div><div class='del'>-		ret = len;</div><div class='del'>-out:</div><div class='del'>-	kfree(line);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations kmsg_fops = {</div><div class='del'>-	.aio_write = kmsg_writev,</div><div class='del'>-	.llseek = noop_llseek,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct memdev {</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	umode_t mode;</div><div class='hunk'>@@ -863,7 +825,9 @@ static const struct memdev {</div><div class='ctx'> 	 [7] = { "full", 0666, &amp;full_fops, NULL },</div><div class='ctx'> 	 [8] = { "random", 0666, &amp;random_fops, NULL },</div><div class='ctx'> 	 [9] = { "urandom", 0666, &amp;urandom_fops, NULL },</div><div class='del'>-	[11] = { "kmsg", 0, &amp;kmsg_fops, NULL },</div><div class='add'>+#ifdef CONFIG_PRINTK</div><div class='add'>+	[11] = { "kmsg", 0644, &amp;kmsg_fops, NULL },</div><div class='add'>+#endif</div><div class='ctx'> #ifdef CONFIG_CRASH_DUMP</div><div class='ctx'> 	[12] = { "oldmem", 0, &amp;oldmem_fops, NULL },</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/char/ramoops.c b/drivers/char/ramoops.c<br/>deleted file mode 100644<br/>index 2a5e45d2a9f8..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/char/ramoops.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/ramoops.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,250 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * RAM Oops/Panic logger</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 Marco Stornelli &lt;marco.stornelli@gmail.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='del'>- * 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kmsg_dump.h&gt;</div><div class='del'>-#include &lt;linux/time.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/ramoops.h&gt;</div><div class='del'>-</div><div class='del'>-#define RAMOOPS_KERNMSG_HDR "===="</div><div class='del'>-#define MIN_MEM_SIZE 4096UL</div><div class='del'>-</div><div class='del'>-static ulong record_size = MIN_MEM_SIZE;</div><div class='del'>-module_param(record_size, ulong, 0400);</div><div class='del'>-MODULE_PARM_DESC(record_size,</div><div class='del'>-		"size of each dump done on oops/panic");</div><div class='del'>-</div><div class='del'>-static ulong mem_address;</div><div class='del'>-module_param(mem_address, ulong, 0400);</div><div class='del'>-MODULE_PARM_DESC(mem_address,</div><div class='del'>-		"start of reserved RAM used to store oops/panic logs");</div><div class='del'>-</div><div class='del'>-static ulong mem_size;</div><div class='del'>-module_param(mem_size, ulong, 0400);</div><div class='del'>-MODULE_PARM_DESC(mem_size,</div><div class='del'>-		"size of reserved RAM used to store oops/panic logs");</div><div class='del'>-</div><div class='del'>-static int dump_oops = 1;</div><div class='del'>-module_param(dump_oops, int, 0600);</div><div class='del'>-MODULE_PARM_DESC(dump_oops,</div><div class='del'>-		"set to 1 to dump oopses, 0 to only dump panics (default 1)");</div><div class='del'>-</div><div class='del'>-static struct ramoops_context {</div><div class='del'>-	struct kmsg_dumper dump;</div><div class='del'>-	void *virt_addr;</div><div class='del'>-	phys_addr_t phys_addr;</div><div class='del'>-	unsigned long size;</div><div class='del'>-	unsigned long record_size;</div><div class='del'>-	int dump_oops;</div><div class='del'>-	int count;</div><div class='del'>-	int max_count;</div><div class='del'>-} oops_cxt;</div><div class='del'>-</div><div class='del'>-static struct platform_device *dummy;</div><div class='del'>-static struct ramoops_platform_data *dummy_data;</div><div class='del'>-</div><div class='del'>-static void ramoops_do_dump(struct kmsg_dumper *dumper,</div><div class='del'>-		enum kmsg_dump_reason reason, const char *s1, unsigned long l1,</div><div class='del'>-		const char *s2, unsigned long l2)</div><div class='del'>-{</div><div class='del'>-	struct ramoops_context *cxt = container_of(dumper,</div><div class='del'>-			struct ramoops_context, dump);</div><div class='del'>-	unsigned long s1_start, s2_start;</div><div class='del'>-	unsigned long l1_cpy, l2_cpy;</div><div class='del'>-	int res, hdr_size;</div><div class='del'>-	char *buf, *buf_orig;</div><div class='del'>-	struct timeval timestamp;</div><div class='del'>-</div><div class='del'>-	if (reason != KMSG_DUMP_OOPS &amp;&amp;</div><div class='del'>-	    reason != KMSG_DUMP_PANIC)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Only dump oopses if dump_oops is set */</div><div class='del'>-	if (reason == KMSG_DUMP_OOPS &amp;&amp; !cxt-&gt;dump_oops)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	buf = cxt-&gt;virt_addr + (cxt-&gt;count * cxt-&gt;record_size);</div><div class='del'>-	buf_orig = buf;</div><div class='del'>-</div><div class='del'>-	memset(buf, '\0', cxt-&gt;record_size);</div><div class='del'>-	res = sprintf(buf, "%s", RAMOOPS_KERNMSG_HDR);</div><div class='del'>-	buf += res;</div><div class='del'>-	do_gettimeofday(&amp;timestamp);</div><div class='del'>-	res = sprintf(buf, "%lu.%lu\n", (long)timestamp.tv_sec, (long)timestamp.tv_usec);</div><div class='del'>-	buf += res;</div><div class='del'>-</div><div class='del'>-	hdr_size = buf - buf_orig;</div><div class='del'>-	l2_cpy = min(l2, cxt-&gt;record_size - hdr_size);</div><div class='del'>-	l1_cpy = min(l1, cxt-&gt;record_size - hdr_size - l2_cpy);</div><div class='del'>-</div><div class='del'>-	s2_start = l2 - l2_cpy;</div><div class='del'>-	s1_start = l1 - l1_cpy;</div><div class='del'>-</div><div class='del'>-	memcpy(buf, s1 + s1_start, l1_cpy);</div><div class='del'>-	memcpy(buf + l1_cpy, s2 + s2_start, l2_cpy);</div><div class='del'>-</div><div class='del'>-	cxt-&gt;count = (cxt-&gt;count + 1) % cxt-&gt;max_count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init ramoops_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct ramoops_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='del'>-	struct ramoops_context *cxt = &amp;oops_cxt;</div><div class='del'>-	int err = -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!pdata-&gt;mem_size || !pdata-&gt;record_size) {</div><div class='del'>-		pr_err("The memory size and the record size must be "</div><div class='del'>-			"non-zero\n");</div><div class='del'>-		goto fail3;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pdata-&gt;mem_size = rounddown_pow_of_two(pdata-&gt;mem_size);</div><div class='del'>-	pdata-&gt;record_size = rounddown_pow_of_two(pdata-&gt;record_size);</div><div class='del'>-</div><div class='del'>-	/* Check for the minimum memory size */</div><div class='del'>-	if (pdata-&gt;mem_size &lt; MIN_MEM_SIZE &amp;&amp;</div><div class='del'>-			pdata-&gt;record_size &lt; MIN_MEM_SIZE) {</div><div class='del'>-		pr_err("memory size too small, minium is %lu\n", MIN_MEM_SIZE);</div><div class='del'>-		goto fail3;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (pdata-&gt;mem_size &lt; pdata-&gt;record_size) {</div><div class='del'>-		pr_err("The memory size must be larger than the "</div><div class='del'>-			"records size\n");</div><div class='del'>-		goto fail3;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cxt-&gt;max_count = pdata-&gt;mem_size / pdata-&gt;record_size;</div><div class='del'>-	cxt-&gt;count = 0;</div><div class='del'>-	cxt-&gt;size = pdata-&gt;mem_size;</div><div class='del'>-	cxt-&gt;phys_addr = pdata-&gt;mem_address;</div><div class='del'>-	cxt-&gt;record_size = pdata-&gt;record_size;</div><div class='del'>-	cxt-&gt;dump_oops = pdata-&gt;dump_oops;</div><div class='del'>-</div><div class='del'>-	if (!request_mem_region(cxt-&gt;phys_addr, cxt-&gt;size, "ramoops")) {</div><div class='del'>-		pr_err("request mem region failed\n");</div><div class='del'>-		err = -EINVAL;</div><div class='del'>-		goto fail3;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cxt-&gt;virt_addr = ioremap(cxt-&gt;phys_addr,  cxt-&gt;size);</div><div class='del'>-	if (!cxt-&gt;virt_addr) {</div><div class='del'>-		pr_err("ioremap failed\n");</div><div class='del'>-		goto fail2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cxt-&gt;dump.dump = ramoops_do_dump;</div><div class='del'>-	err = kmsg_dump_register(&amp;cxt-&gt;dump);</div><div class='del'>-	if (err) {</div><div class='del'>-		pr_err("registering kmsg dumper failed\n");</div><div class='del'>-		goto fail1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Update the module parameter variables as well so they are visible</div><div class='del'>-	 * through /sys/module/ramoops/parameters/</div><div class='del'>-	 */</div><div class='del'>-	mem_size = pdata-&gt;mem_size;</div><div class='del'>-	mem_address = pdata-&gt;mem_address;</div><div class='del'>-	record_size = pdata-&gt;record_size;</div><div class='del'>-	dump_oops = pdata-&gt;dump_oops;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-fail1:</div><div class='del'>-	iounmap(cxt-&gt;virt_addr);</div><div class='del'>-fail2:</div><div class='del'>-	release_mem_region(cxt-&gt;phys_addr, cxt-&gt;size);</div><div class='del'>-fail3:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __exit ramoops_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct ramoops_context *cxt = &amp;oops_cxt;</div><div class='del'>-</div><div class='del'>-	if (kmsg_dump_unregister(&amp;cxt-&gt;dump) &lt; 0)</div><div class='del'>-		pr_warn("could not unregister kmsg_dumper\n");</div><div class='del'>-</div><div class='del'>-	iounmap(cxt-&gt;virt_addr);</div><div class='del'>-	release_mem_region(cxt-&gt;phys_addr, cxt-&gt;size);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_driver ramoops_driver = {</div><div class='del'>-	.remove		= __exit_p(ramoops_remove),</div><div class='del'>-	.driver		= {</div><div class='del'>-		.name	= "ramoops",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init ramoops_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	ret = platform_driver_probe(&amp;ramoops_driver, ramoops_probe);</div><div class='del'>-	if (ret == -ENODEV) {</div><div class='del'>-		/*</div><div class='del'>-		 * If we didn't find a platform device, we use module parameters</div><div class='del'>-		 * building platform data on the fly.</div><div class='del'>-		 */</div><div class='del'>-		pr_info("platform device not found, using module parameters\n");</div><div class='del'>-		dummy_data = kzalloc(sizeof(struct ramoops_platform_data),</div><div class='del'>-				     GFP_KERNEL);</div><div class='del'>-		if (!dummy_data)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		dummy_data-&gt;mem_size = mem_size;</div><div class='del'>-		dummy_data-&gt;mem_address = mem_address;</div><div class='del'>-		dummy_data-&gt;record_size = record_size;</div><div class='del'>-		dummy_data-&gt;dump_oops = dump_oops;</div><div class='del'>-		dummy = platform_create_bundle(&amp;ramoops_driver, ramoops_probe,</div><div class='del'>-			NULL, 0, dummy_data,</div><div class='del'>-			sizeof(struct ramoops_platform_data));</div><div class='del'>-</div><div class='del'>-		if (IS_ERR(dummy))</div><div class='del'>-			ret = PTR_ERR(dummy);</div><div class='del'>-		else</div><div class='del'>-			ret = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ramoops_exit(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;ramoops_driver);</div><div class='del'>-	kfree(dummy_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(ramoops_init);</div><div class='del'>-module_exit(ramoops_exit);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Marco Stornelli &lt;marco.stornelli@gmail.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("RAM Oops/Panic logger/driver");</div><div class='head'>diff --git a/drivers/char/virtio_console.c b/drivers/char/virtio_console.c<br/>index ddf86b6500b7..cdf2f5451c76 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/virtio_console.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/virtio_console.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/virtio_console.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/virtio_console.c</a></div><div class='hunk'>@@ -1895,6 +1895,13 @@ static int virtcons_restore(struct virtio_device *vdev)</div><div class='ctx'> </div><div class='ctx'> 		/* Get port open/close status on the host */</div><div class='ctx'> 		send_control_msg(port, VIRTIO_CONSOLE_PORT_READY, 1);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If a port was open at the time of suspending, we</div><div class='add'>+		 * have to let the host know that it's still open.</div><div class='add'>+		 */</div><div class='add'>+		if (port-&gt;guest_connected)</div><div class='add'>+			send_control_msg(port, VIRTIO_CONSOLE_PORT_OPEN, 1);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.c b/drivers/char/xilinx_hwicap/xilinx_hwicap.c<br/>index 31ba11ca75e1..2c5d15beea35 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/xilinx_hwicap/xilinx_hwicap.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/xilinx_hwicap/xilinx_hwicap.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/xilinx_hwicap/xilinx_hwicap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/xilinx_hwicap/xilinx_hwicap.c</a></div><div class='hunk'>@@ -167,6 +167,7 @@ static const struct config_registers v4_config_registers = {</div><div class='ctx'> 	.BOOTSTS = UNIMPLEMENTED,</div><div class='ctx'> 	.CTL_1 = UNIMPLEMENTED,</div><div class='ctx'> };</div><div class='add'>+</div><div class='ctx'> static const struct config_registers v5_config_registers = {</div><div class='ctx'> 	.CRC = 0,</div><div class='ctx'> 	.FAR = 1,</div><div class='hunk'>@@ -192,6 +193,31 @@ static const struct config_registers v5_config_registers = {</div><div class='ctx'> 	.CTL_1 = 19,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct config_registers v6_config_registers = {</div><div class='add'>+	.CRC = 0,</div><div class='add'>+	.FAR = 1,</div><div class='add'>+	.FDRI = 2,</div><div class='add'>+	.FDRO = 3,</div><div class='add'>+	.CMD = 4,</div><div class='add'>+	.CTL = 5,</div><div class='add'>+	.MASK = 6,</div><div class='add'>+	.STAT = 7,</div><div class='add'>+	.LOUT = 8,</div><div class='add'>+	.COR = 9,</div><div class='add'>+	.MFWR = 10,</div><div class='add'>+	.FLR = UNIMPLEMENTED,</div><div class='add'>+	.KEY = UNIMPLEMENTED,</div><div class='add'>+	.CBC = 11,</div><div class='add'>+	.IDCODE = 12,</div><div class='add'>+	.AXSS = 13,</div><div class='add'>+	.C0R_1 = 14,</div><div class='add'>+	.CSOB = 15,</div><div class='add'>+	.WBSTAR = 16,</div><div class='add'>+	.TIMER = 17,</div><div class='add'>+	.BOOTSTS = 22,</div><div class='add'>+	.CTL_1 = 24,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * hwicap_command_desync - Send a DESYNC command to the ICAP port.</div><div class='ctx'>  * @drvdata: a pointer to the drvdata.</div><div class='hunk'>@@ -744,6 +770,8 @@ static int __devinit hwicap_of_probe(struct platform_device *op,</div><div class='ctx'> 			regs = &amp;v4_config_registers;</div><div class='ctx'> 		} else if (!strcmp(family, "virtex5")) {</div><div class='ctx'> 			regs = &amp;v5_config_registers;</div><div class='add'>+		} else if (!strcmp(family, "virtex6")) {</div><div class='add'>+			regs = &amp;v6_config_registers;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return hwicap_setup(&amp;op-&gt;dev, id ? *id : -1, &amp;res, config,</div><div class='hunk'>@@ -785,6 +813,8 @@ static int __devinit hwicap_drv_probe(struct platform_device *pdev)</div><div class='ctx'> 			regs = &amp;v4_config_registers;</div><div class='ctx'> 		} else if (!strcmp(family, "virtex5")) {</div><div class='ctx'> 			regs = &amp;v5_config_registers;</div><div class='add'>+		} else if (!strcmp(family, "virtex6")) {</div><div class='add'>+			regs = &amp;v6_config_registers;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.h b/drivers/char/xilinx_hwicap/xilinx_hwicap.h<br/>index 8cca11981c5f..d31ee23c9f13 100644<br/>--- a/<a href='/drm-misc/tree/drivers/char/xilinx_hwicap/xilinx_hwicap.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/char/xilinx_hwicap/xilinx_hwicap.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/char/xilinx_hwicap/xilinx_hwicap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/char/xilinx_hwicap/xilinx_hwicap.h</a></div><div class='hunk'>@@ -86,7 +86,7 @@ struct hwicap_driver_config {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Number of times to poll the done regsiter */</div><div class='del'>-#define XHI_MAX_RETRIES     10</div><div class='add'>+#define XHI_MAX_RETRIES     5000</div><div class='ctx'> </div><div class='ctx'> /************ Constant Definitions *************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig<br/>index 165e1febae53..4864407e3fc4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/clk/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/clk/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/clk/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/Kconfig</a></div><div class='hunk'>@@ -12,6 +12,7 @@ config HAVE_MACH_CLKDEV</div><div class='ctx'> config COMMON_CLK</div><div class='ctx'> 	bool</div><div class='ctx'> 	select HAVE_CLK_PREPARE</div><div class='add'>+	select CLKDEV_LOOKUP</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  The common clock framework is a single definition of struct</div><div class='ctx'> 	  clk, useful across many platforms, as well as an</div><div class='hunk'>@@ -22,17 +23,6 @@ config COMMON_CLK</div><div class='ctx'> menu "Common Clock Framework"</div><div class='ctx'> 	depends on COMMON_CLK</div><div class='ctx'> </div><div class='del'>-config COMMON_CLK_DISABLE_UNUSED</div><div class='del'>-	bool "Disabled unused clocks at boot"</div><div class='del'>-	depends on COMMON_CLK</div><div class='del'>-	---help---</div><div class='del'>-	  Traverses the entire clock tree and disables any clocks that are</div><div class='del'>-	  enabled in hardware but have not been enabled by any device drivers.</div><div class='del'>-	  This saves power and keeps the software model of the clock in line</div><div class='del'>-	  with reality.</div><div class='del'>-</div><div class='del'>-	  If in doubt, say "N".</div><div class='del'>-</div><div class='ctx'> config COMMON_CLK_DEBUG</div><div class='ctx'> 	bool "DebugFS representation of clock tree"</div><div class='ctx'> 	depends on COMMON_CLK</div><div class='head'>diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile<br/>index 1f736bc11c4b..b9a5158a30b1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/clk/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/clk/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/clk/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/Makefile</a></div><div class='hunk'>@@ -1,4 +1,7 @@</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CLKDEV_LOOKUP)	+= clkdev.o</div><div class='ctx'> obj-$(CONFIG_COMMON_CLK)	+= clk.o clk-fixed-rate.o clk-gate.o \</div><div class='del'>-				   clk-mux.o clk-divider.o</div><div class='add'>+				   clk-mux.o clk-divider.o clk-fixed-factor.o</div><div class='add'>+# SoCs specific</div><div class='add'>+obj-$(CONFIG_ARCH_MXS)		+= mxs/</div><div class='add'>+obj-$(CONFIG_PLAT_SPEAR)	+= spear/</div><div class='head'>diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c<br/>index d5ac6a75ea57..8ea11b444528 100644<br/>--- a/<a href='/drm-misc/tree/drivers/clk/clk-divider.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/clk/clk-divider.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/clk/clk-divider.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clk-divider.c</a></div><div class='hunk'>@@ -45,7 +45,6 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	return parent_rate / div;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_divider_recalc_rate);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The reverse of DIV_ROUND_UP: The maximum number which</div><div class='hunk'>@@ -68,8 +67,8 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,</div><div class='ctx'> 	if (divider-&gt;flags &amp; CLK_DIVIDER_ONE_BASED)</div><div class='ctx'> 		maxdiv--;</div><div class='ctx'> </div><div class='del'>-	if (!best_parent_rate) {</div><div class='del'>-		parent_rate = __clk_get_rate(__clk_get_parent(hw-&gt;clk));</div><div class='add'>+	if (!(__clk_get_flags(hw-&gt;clk) &amp; CLK_SET_RATE_PARENT)) {</div><div class='add'>+		parent_rate = *best_parent_rate;</div><div class='ctx'> 		bestdiv = DIV_ROUND_UP(parent_rate, rate);</div><div class='ctx'> 		bestdiv = bestdiv == 0 ? 1 : bestdiv;</div><div class='ctx'> 		bestdiv = bestdiv &gt; maxdiv ? maxdiv : bestdiv;</div><div class='hunk'>@@ -109,24 +108,18 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='ctx'> 	int div;</div><div class='ctx'> 	div = clk_divider_bestdiv(hw, rate, prate);</div><div class='ctx'> </div><div class='del'>-	if (prate)</div><div class='del'>-		return *prate / div;</div><div class='del'>-	else {</div><div class='del'>-		unsigned long r;</div><div class='del'>-		r = __clk_get_rate(__clk_get_parent(hw-&gt;clk));</div><div class='del'>-		return r / div;</div><div class='del'>-	}</div><div class='add'>+	return *prate / div;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_divider_round_rate);</div><div class='ctx'> </div><div class='del'>-static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate)</div><div class='add'>+static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+				unsigned long parent_rate)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk_divider *divider = to_clk_divider(hw);</div><div class='ctx'> 	unsigned int div;</div><div class='ctx'> 	unsigned long flags = 0;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='del'>-	div = __clk_get_rate(__clk_get_parent(hw-&gt;clk)) / rate;</div><div class='add'>+	div = parent_rate / rate;</div><div class='ctx'> </div><div class='ctx'> 	if (!(divider-&gt;flags &amp; CLK_DIVIDER_ONE_BASED))</div><div class='ctx'> 		div--;</div><div class='hunk'>@@ -147,15 +140,26 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_divider_set_rate);</div><div class='ctx'> </div><div class='del'>-struct clk_ops clk_divider_ops = {</div><div class='add'>+const struct clk_ops clk_divider_ops = {</div><div class='ctx'> 	.recalc_rate = clk_divider_recalc_rate,</div><div class='ctx'> 	.round_rate = clk_divider_round_rate,</div><div class='ctx'> 	.set_rate = clk_divider_set_rate,</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL_GPL(clk_divider_ops);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * clk_register_divider - register a divider clock with the clock framework</div><div class='add'>+ * @dev: device registering this clock</div><div class='add'>+ * @name: name of this clock</div><div class='add'>+ * @parent_name: name of clock's parent</div><div class='add'>+ * @flags: framework-specific flags</div><div class='add'>+ * @reg: register address to adjust divider</div><div class='add'>+ * @shift: number of bits to shift the bitfield</div><div class='add'>+ * @width: width of the bitfield</div><div class='add'>+ * @clk_divider_flags: divider-specific flags for this clock</div><div class='add'>+ * @lock: shared register lock for this clock</div><div class='add'>+ */</div><div class='ctx'> struct clk *clk_register_divider(struct device *dev, const char *name,</div><div class='ctx'> 		const char *parent_name, unsigned long flags,</div><div class='ctx'> 		void __iomem *reg, u8 shift, u8 width,</div><div class='hunk'>@@ -163,38 +167,34 @@ struct clk *clk_register_divider(struct device *dev, const char *name,</div><div class='ctx'> {</div><div class='ctx'> 	struct clk_divider *div;</div><div class='ctx'> 	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='ctx'> </div><div class='add'>+	/* allocate the divider */</div><div class='ctx'> 	div = kzalloc(sizeof(struct clk_divider), GFP_KERNEL);</div><div class='del'>-</div><div class='ctx'> 	if (!div) {</div><div class='ctx'> 		pr_err("%s: could not allocate divider clk\n", __func__);</div><div class='del'>-		return NULL;</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_divider_ops;</div><div class='add'>+	init.flags = flags;</div><div class='add'>+	init.parent_names = (parent_name ? &amp;parent_name: NULL);</div><div class='add'>+	init.num_parents = (parent_name ? 1 : 0);</div><div class='add'>+</div><div class='ctx'> 	/* struct clk_divider assignments */</div><div class='ctx'> 	div-&gt;reg = reg;</div><div class='ctx'> 	div-&gt;shift = shift;</div><div class='ctx'> 	div-&gt;width = width;</div><div class='ctx'> 	div-&gt;flags = clk_divider_flags;</div><div class='ctx'> 	div-&gt;lock = lock;</div><div class='add'>+	div-&gt;hw.init = &amp;init;</div><div class='ctx'> </div><div class='del'>-	if (parent_name) {</div><div class='del'>-		div-&gt;parent[0] = kstrdup(parent_name, GFP_KERNEL);</div><div class='del'>-		if (!div-&gt;parent[0])</div><div class='del'>-			goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	clk = clk_register(dev, name,</div><div class='del'>-			&amp;clk_divider_ops, &amp;div-&gt;hw,</div><div class='del'>-			div-&gt;parent,</div><div class='del'>-			(parent_name ? 1 : 0),</div><div class='del'>-			flags);</div><div class='del'>-	if (clk)</div><div class='del'>-		return clk;</div><div class='add'>+	/* register the clock */</div><div class='add'>+	clk = clk_register(dev, &amp;div-&gt;hw);</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	kfree(div-&gt;parent[0]);</div><div class='del'>-	kfree(div);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(div);</div><div class='ctx'> </div><div class='del'>-	return NULL;</div><div class='add'>+	return clk;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c<br/>new file mode 100644<br/>index 000000000000..c8c003e217ad<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/clk-fixed-factor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clk-fixed-factor.c</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2011 Sascha Hauer, Pengutronix &lt;s.hauer@pengutronix.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * Standard functionality for the common clock API.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DOC: basic fixed multiplier and divider clock that cannot gate</div><div class='add'>+ *</div><div class='add'>+ * Traits of this clock:</div><div class='add'>+ * prepare - clk_prepare only ensures that parents are prepared</div><div class='add'>+ * enable - clk_enable only ensures that parents are enabled</div><div class='add'>+ * rate - rate is fixed.  clk-&gt;rate = parent-&gt;rate / div * mult</div><div class='add'>+ * parent - fixed parent.  No clk_set_parent support</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define to_clk_fixed_factor(_hw) container_of(_hw, struct clk_fixed_factor, hw)</div><div class='add'>+</div><div class='add'>+static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);</div><div class='add'>+</div><div class='add'>+	return parent_rate * fix-&gt;mult / fix-&gt;div;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+				unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);</div><div class='add'>+</div><div class='add'>+	if (__clk_get_flags(hw-&gt;clk) &amp; CLK_SET_RATE_PARENT) {</div><div class='add'>+		unsigned long best_parent;</div><div class='add'>+</div><div class='add'>+		best_parent = (rate / fix-&gt;mult) * fix-&gt;div;</div><div class='add'>+		*prate = __clk_round_rate(__clk_get_parent(hw-&gt;clk),</div><div class='add'>+				best_parent);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return (*prate / fix-&gt;div) * fix-&gt;mult;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+				unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct clk_ops clk_fixed_factor_ops = {</div><div class='add'>+	.round_rate = clk_factor_round_rate,</div><div class='add'>+	.set_rate = clk_factor_set_rate,</div><div class='add'>+	.recalc_rate = clk_factor_recalc_rate,</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);</div><div class='add'>+</div><div class='add'>+struct clk *clk_register_fixed_factor(struct device *dev, const char *name,</div><div class='add'>+		const char *parent_name, unsigned long flags,</div><div class='add'>+		unsigned int mult, unsigned int div)</div><div class='add'>+{</div><div class='add'>+	struct clk_fixed_factor *fix;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+</div><div class='add'>+	fix = kmalloc(sizeof(*fix), GFP_KERNEL);</div><div class='add'>+	if (!fix) {</div><div class='add'>+		pr_err("%s: could not allocate fixed factor clk\n", __func__);</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* struct clk_fixed_factor assignments */</div><div class='add'>+	fix-&gt;mult = mult;</div><div class='add'>+	fix-&gt;div = div;</div><div class='add'>+	fix-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_fixed_factor_ops;</div><div class='add'>+	init.flags = flags;</div><div class='add'>+	init.parent_names = &amp;parent_name;</div><div class='add'>+	init.num_parents = 1;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(dev, &amp;fix-&gt;hw);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(fix);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/clk-fixed-rate.c b/drivers/clk/clk-fixed-rate.c<br/>index 90c79fb5d1bd..cbd246229786 100644<br/>--- a/<a href='/drm-misc/tree/drivers/clk/clk-fixed-rate.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/clk/clk-fixed-rate.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/clk/clk-fixed-rate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clk-fixed-rate.c</a></div><div class='hunk'>@@ -32,51 +32,50 @@ static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw,</div><div class='ctx'> {</div><div class='ctx'> 	return to_clk_fixed_rate(hw)-&gt;fixed_rate;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_fixed_rate_recalc_rate);</div><div class='ctx'> </div><div class='del'>-struct clk_ops clk_fixed_rate_ops = {</div><div class='add'>+const struct clk_ops clk_fixed_rate_ops = {</div><div class='ctx'> 	.recalc_rate = clk_fixed_rate_recalc_rate,</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * clk_register_fixed_rate - register fixed-rate clock with the clock framework</div><div class='add'>+ * @dev: device that is registering this clock</div><div class='add'>+ * @name: name of this clock</div><div class='add'>+ * @parent_name: name of clock's parent</div><div class='add'>+ * @flags: framework-specific flags</div><div class='add'>+ * @fixed_rate: non-adjustable clock rate</div><div class='add'>+ */</div><div class='ctx'> struct clk *clk_register_fixed_rate(struct device *dev, const char *name,</div><div class='ctx'> 		const char *parent_name, unsigned long flags,</div><div class='ctx'> 		unsigned long fixed_rate)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk_fixed_rate *fixed;</div><div class='del'>-	char **parent_names = NULL;</div><div class='del'>-	u8 len;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='ctx'> </div><div class='add'>+	/* allocate fixed-rate clock */</div><div class='ctx'> 	fixed = kzalloc(sizeof(struct clk_fixed_rate), GFP_KERNEL);</div><div class='del'>-</div><div class='ctx'> 	if (!fixed) {</div><div class='ctx'> 		pr_err("%s: could not allocate fixed clk\n", __func__);</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_fixed_rate_ops;</div><div class='add'>+	init.flags = flags;</div><div class='add'>+	init.parent_names = (parent_name ? &amp;parent_name: NULL);</div><div class='add'>+	init.num_parents = (parent_name ? 1 : 0);</div><div class='add'>+</div><div class='ctx'> 	/* struct clk_fixed_rate assignments */</div><div class='ctx'> 	fixed-&gt;fixed_rate = fixed_rate;</div><div class='add'>+	fixed-&gt;hw.init = &amp;init;</div><div class='ctx'> </div><div class='del'>-	if (parent_name) {</div><div class='del'>-		parent_names = kmalloc(sizeof(char *), GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-		if (! parent_names)</div><div class='del'>-			goto out;</div><div class='add'>+	/* register the clock */</div><div class='add'>+	clk = clk_register(dev, &amp;fixed-&gt;hw);</div><div class='ctx'> </div><div class='del'>-		len = sizeof(char) * strlen(parent_name);</div><div class='del'>-</div><div class='del'>-		parent_names[0] = kmalloc(len, GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-		if (!parent_names[0])</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		strncpy(parent_names[0], parent_name, len);</div><div class='del'>-	}</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(fixed);</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	return clk_register(dev, name,</div><div class='del'>-			&amp;clk_fixed_rate_ops, &amp;fixed-&gt;hw,</div><div class='del'>-			parent_names,</div><div class='del'>-			(parent_name ? 1 : 0),</div><div class='del'>-			flags);</div><div class='add'>+	return clk;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c<br/>index b5902e2ef2fd..578465e04be6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/clk/clk-gate.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/clk/clk-gate.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/clk/clk-gate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clk-gate.c</a></div><div class='hunk'>@@ -28,32 +28,38 @@</div><div class='ctx'> </div><div class='ctx'> #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)</div><div class='ctx'> </div><div class='del'>-static void clk_gate_set_bit(struct clk_gate *gate)</div><div class='add'>+/*</div><div class='add'>+ * It works on following logic:</div><div class='add'>+ *</div><div class='add'>+ * For enabling clock, enable = 1</div><div class='add'>+ *	set2dis = 1	-&gt; clear bit	-&gt; set = 0</div><div class='add'>+ *	set2dis = 0	-&gt; set bit	-&gt; set = 1</div><div class='add'>+ *</div><div class='add'>+ * For disabling clock, enable = 0</div><div class='add'>+ *	set2dis = 1	-&gt; set bit	-&gt; set = 1</div><div class='add'>+ *	set2dis = 0	-&gt; clear bit	-&gt; set = 0</div><div class='add'>+ *</div><div class='add'>+ * So, result is always: enable xor set2dis.</div><div class='add'>+ */</div><div class='add'>+static void clk_gate_endisable(struct clk_hw *hw, int enable)</div><div class='ctx'> {</div><div class='del'>-	u32 reg;</div><div class='add'>+	struct clk_gate *gate = to_clk_gate(hw);</div><div class='add'>+	int set = gate-&gt;flags &amp; CLK_GATE_SET_TO_DISABLE ? 1 : 0;</div><div class='ctx'> 	unsigned long flags = 0;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	set ^= enable;</div><div class='ctx'> </div><div class='ctx'> 	if (gate-&gt;lock)</div><div class='ctx'> 		spin_lock_irqsave(gate-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	reg = readl(gate-&gt;reg);</div><div class='del'>-	reg |= BIT(gate-&gt;bit_idx);</div><div class='del'>-	writel(reg, gate-&gt;reg);</div><div class='del'>-</div><div class='del'>-	if (gate-&gt;lock)</div><div class='del'>-		spin_unlock_irqrestore(gate-&gt;lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clk_gate_clear_bit(struct clk_gate *gate)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	unsigned long flags = 0;</div><div class='ctx'> </div><div class='del'>-	if (gate-&gt;lock)</div><div class='del'>-		spin_lock_irqsave(gate-&gt;lock, flags);</div><div class='add'>+	if (set)</div><div class='add'>+		reg |= BIT(gate-&gt;bit_idx);</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~BIT(gate-&gt;bit_idx);</div><div class='ctx'> </div><div class='del'>-	reg = readl(gate-&gt;reg);</div><div class='del'>-	reg &amp;= ~BIT(gate-&gt;bit_idx);</div><div class='ctx'> 	writel(reg, gate-&gt;reg);</div><div class='ctx'> </div><div class='ctx'> 	if (gate-&gt;lock)</div><div class='hunk'>@@ -62,27 +68,15 @@ static void clk_gate_clear_bit(struct clk_gate *gate)</div><div class='ctx'> </div><div class='ctx'> static int clk_gate_enable(struct clk_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	struct clk_gate *gate = to_clk_gate(hw);</div><div class='del'>-</div><div class='del'>-	if (gate-&gt;flags &amp; CLK_GATE_SET_TO_DISABLE)</div><div class='del'>-		clk_gate_clear_bit(gate);</div><div class='del'>-	else</div><div class='del'>-		clk_gate_set_bit(gate);</div><div class='add'>+	clk_gate_endisable(hw, 1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_gate_enable);</div><div class='ctx'> </div><div class='ctx'> static void clk_gate_disable(struct clk_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	struct clk_gate *gate = to_clk_gate(hw);</div><div class='del'>-</div><div class='del'>-	if (gate-&gt;flags &amp; CLK_GATE_SET_TO_DISABLE)</div><div class='del'>-		clk_gate_set_bit(gate);</div><div class='del'>-	else</div><div class='del'>-		clk_gate_clear_bit(gate);</div><div class='add'>+	clk_gate_endisable(hw, 0);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_gate_disable);</div><div class='ctx'> </div><div class='ctx'> static int clk_gate_is_enabled(struct clk_hw *hw)</div><div class='ctx'> {</div><div class='hunk'>@@ -99,15 +93,25 @@ static int clk_gate_is_enabled(struct clk_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	return reg ? 1 : 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_gate_is_enabled);</div><div class='ctx'> </div><div class='del'>-struct clk_ops clk_gate_ops = {</div><div class='add'>+const struct clk_ops clk_gate_ops = {</div><div class='ctx'> 	.enable = clk_gate_enable,</div><div class='ctx'> 	.disable = clk_gate_disable,</div><div class='ctx'> 	.is_enabled = clk_gate_is_enabled,</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL_GPL(clk_gate_ops);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * clk_register_gate - register a gate clock with the clock framework</div><div class='add'>+ * @dev: device that is registering this clock</div><div class='add'>+ * @name: name of this clock</div><div class='add'>+ * @parent_name: name of this clock's parent</div><div class='add'>+ * @flags: framework-specific flags for this clock</div><div class='add'>+ * @reg: register address to control gating of this clock</div><div class='add'>+ * @bit_idx: which bit in the register controls gating of this clock</div><div class='add'>+ * @clk_gate_flags: gate-specific flags for this clock</div><div class='add'>+ * @lock: shared register lock for this clock</div><div class='add'>+ */</div><div class='ctx'> struct clk *clk_register_gate(struct device *dev, const char *name,</div><div class='ctx'> 		const char *parent_name, unsigned long flags,</div><div class='ctx'> 		void __iomem *reg, u8 bit_idx,</div><div class='hunk'>@@ -115,36 +119,32 @@ struct clk *clk_register_gate(struct device *dev, const char *name,</div><div class='ctx'> {</div><div class='ctx'> 	struct clk_gate *gate;</div><div class='ctx'> 	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='ctx'> </div><div class='add'>+	/* allocate the gate */</div><div class='ctx'> 	gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);</div><div class='del'>-</div><div class='ctx'> 	if (!gate) {</div><div class='ctx'> 		pr_err("%s: could not allocate gated clk\n", __func__);</div><div class='del'>-		return NULL;</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_gate_ops;</div><div class='add'>+	init.flags = flags;</div><div class='add'>+	init.parent_names = (parent_name ? &amp;parent_name: NULL);</div><div class='add'>+	init.num_parents = (parent_name ? 1 : 0);</div><div class='add'>+</div><div class='ctx'> 	/* struct clk_gate assignments */</div><div class='ctx'> 	gate-&gt;reg = reg;</div><div class='ctx'> 	gate-&gt;bit_idx = bit_idx;</div><div class='ctx'> 	gate-&gt;flags = clk_gate_flags;</div><div class='ctx'> 	gate-&gt;lock = lock;</div><div class='add'>+	gate-&gt;hw.init = &amp;init;</div><div class='ctx'> </div><div class='del'>-	if (parent_name) {</div><div class='del'>-		gate-&gt;parent[0] = kstrdup(parent_name, GFP_KERNEL);</div><div class='del'>-		if (!gate-&gt;parent[0])</div><div class='del'>-			goto out;</div><div class='del'>-	}</div><div class='add'>+	clk = clk_register(dev, &amp;gate-&gt;hw);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(gate);</div><div class='ctx'> </div><div class='del'>-	clk = clk_register(dev, name,</div><div class='del'>-			&amp;clk_gate_ops, &amp;gate-&gt;hw,</div><div class='del'>-			gate-&gt;parent,</div><div class='del'>-			(parent_name ? 1 : 0),</div><div class='del'>-			flags);</div><div class='del'>-	if (clk)</div><div class='del'>-		return clk;</div><div class='del'>-out:</div><div class='del'>-	kfree(gate-&gt;parent[0]);</div><div class='del'>-	kfree(gate);</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='add'>+	return clk;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c<br/>index c71ad1f41a97..fd36a8ea73d9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/clk/clk-mux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/clk/clk-mux.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/clk/clk-mux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clk-mux.c</a></div><div class='hunk'>@@ -55,7 +55,6 @@ static u8 clk_mux_get_parent(struct clk_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_mux_get_parent);</div><div class='ctx'> </div><div class='ctx'> static int clk_mux_set_parent(struct clk_hw *hw, u8 index)</div><div class='ctx'> {</div><div class='hunk'>@@ -82,35 +81,47 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(clk_mux_set_parent);</div><div class='ctx'> </div><div class='del'>-struct clk_ops clk_mux_ops = {</div><div class='add'>+const struct clk_ops clk_mux_ops = {</div><div class='ctx'> 	.get_parent = clk_mux_get_parent,</div><div class='ctx'> 	.set_parent = clk_mux_set_parent,</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL_GPL(clk_mux_ops);</div><div class='ctx'> </div><div class='ctx'> struct clk *clk_register_mux(struct device *dev, const char *name,</div><div class='del'>-		char **parent_names, u8 num_parents, unsigned long flags,</div><div class='add'>+		const char **parent_names, u8 num_parents, unsigned long flags,</div><div class='ctx'> 		void __iomem *reg, u8 shift, u8 width,</div><div class='ctx'> 		u8 clk_mux_flags, spinlock_t *lock)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk_mux *mux;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='ctx'> </div><div class='del'>-	mux = kmalloc(sizeof(struct clk_mux), GFP_KERNEL);</div><div class='del'>-</div><div class='add'>+	/* allocate the mux */</div><div class='add'>+	mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL);</div><div class='ctx'> 	if (!mux) {</div><div class='ctx'> 		pr_err("%s: could not allocate mux clk\n", __func__);</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_mux_ops;</div><div class='add'>+	init.flags = flags;</div><div class='add'>+	init.parent_names = parent_names;</div><div class='add'>+	init.num_parents = num_parents;</div><div class='add'>+</div><div class='ctx'> 	/* struct clk_mux assignments */</div><div class='ctx'> 	mux-&gt;reg = reg;</div><div class='ctx'> 	mux-&gt;shift = shift;</div><div class='ctx'> 	mux-&gt;width = width;</div><div class='ctx'> 	mux-&gt;flags = clk_mux_flags;</div><div class='ctx'> 	mux-&gt;lock = lock;</div><div class='add'>+	mux-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(dev, &amp;mux-&gt;hw);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(mux);</div><div class='ctx'> </div><div class='del'>-	return clk_register(dev, name, &amp;clk_mux_ops, &amp;mux-&gt;hw,</div><div class='del'>-			parent_names, num_parents, flags);</div><div class='add'>+	return clk;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c<br/>index 9cf6f59e3e19..687b00d67c8a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/clk/clk.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/clk/clk.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/clk/clk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clk.c</a></div><div class='hunk'>@@ -194,9 +194,8 @@ static int __init clk_debug_init(void)</div><div class='ctx'> late_initcall(clk_debug_init);</div><div class='ctx'> #else</div><div class='ctx'> static inline int clk_debug_register(struct clk *clk) { return 0; }</div><div class='del'>-#endif /* CONFIG_COMMON_CLK_DEBUG */</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_COMMON_CLK_DISABLE_UNUSED</div><div class='ctx'> /* caller must hold prepare_lock */</div><div class='ctx'> static void clk_disable_unused_subtree(struct clk *clk)</div><div class='ctx'> {</div><div class='hunk'>@@ -246,9 +245,6 @@ static int clk_disable_unused(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> late_initcall(clk_disable_unused);</div><div class='del'>-#else</div><div class='del'>-static inline int clk_disable_unused(struct clk *clk) { return 0; }</div><div class='del'>-#endif /* CONFIG_COMMON_CLK_DISABLE_UNUSED */</div><div class='ctx'> </div><div class='ctx'> /***    helper functions   ***/</div><div class='ctx'> </div><div class='hunk'>@@ -287,7 +283,7 @@ unsigned long __clk_get_rate(struct clk *clk)</div><div class='ctx'> 	unsigned long ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!clk) {</div><div class='del'>-		ret = -EINVAL;</div><div class='add'>+		ret = 0;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -297,7 +293,7 @@ unsigned long __clk_get_rate(struct clk *clk)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (!clk-&gt;parent)</div><div class='del'>-		ret = -ENODEV;</div><div class='add'>+		ret = 0;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -562,7 +558,7 @@ EXPORT_SYMBOL_GPL(clk_enable);</div><div class='ctx'>  * @clk: the clk whose rate is being returned</div><div class='ctx'>  *</div><div class='ctx'>  * Simply returns the cached rate of the clk.  Does not query the hardware.  If</div><div class='del'>- * clk is NULL then returns -EINVAL.</div><div class='add'>+ * clk is NULL then returns 0.</div><div class='ctx'>  */</div><div class='ctx'> unsigned long clk_get_rate(struct clk *clk)</div><div class='ctx'> {</div><div class='hunk'>@@ -584,18 +580,22 @@ EXPORT_SYMBOL_GPL(clk_get_rate);</div><div class='ctx'>  */</div><div class='ctx'> unsigned long __clk_round_rate(struct clk *clk, unsigned long rate)</div><div class='ctx'> {</div><div class='del'>-	unsigned long unused;</div><div class='add'>+	unsigned long parent_rate = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!clk)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!clk-&gt;ops-&gt;round_rate)</div><div class='del'>-		return clk-&gt;rate;</div><div class='add'>+	if (!clk-&gt;ops-&gt;round_rate) {</div><div class='add'>+		if (clk-&gt;flags &amp; CLK_SET_RATE_PARENT)</div><div class='add'>+			return __clk_round_rate(clk-&gt;parent, rate);</div><div class='add'>+		else</div><div class='add'>+			return clk-&gt;rate;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (clk-&gt;flags &amp; CLK_SET_RATE_PARENT)</div><div class='del'>-		return clk-&gt;ops-&gt;round_rate(clk-&gt;hw, rate, &amp;unused);</div><div class='del'>-	else</div><div class='del'>-		return clk-&gt;ops-&gt;round_rate(clk-&gt;hw, rate, NULL);</div><div class='add'>+	if (clk-&gt;parent)</div><div class='add'>+		parent_rate = clk-&gt;parent-&gt;rate;</div><div class='add'>+</div><div class='add'>+	return clk-&gt;ops-&gt;round_rate(clk-&gt;hw, rate, &amp;parent_rate);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -765,25 +765,41 @@ static void clk_calc_subtree(struct clk *clk, unsigned long new_rate)</div><div class='ctx'> static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk *top = clk;</div><div class='del'>-	unsigned long best_parent_rate = clk-&gt;parent-&gt;rate;</div><div class='add'>+	unsigned long best_parent_rate = 0;</div><div class='ctx'> 	unsigned long new_rate;</div><div class='ctx'> </div><div class='del'>-	if (!clk-&gt;ops-&gt;round_rate &amp;&amp; !(clk-&gt;flags &amp; CLK_SET_RATE_PARENT)) {</div><div class='del'>-		clk-&gt;new_rate = clk-&gt;rate;</div><div class='add'>+	/* sanity */</div><div class='add'>+	if (IS_ERR_OR_NULL(clk))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/* save parent rate, if it exists */</div><div class='add'>+	if (clk-&gt;parent)</div><div class='add'>+		best_parent_rate = clk-&gt;parent-&gt;rate;</div><div class='add'>+</div><div class='add'>+	/* never propagate up to the parent */</div><div class='add'>+	if (!(clk-&gt;flags &amp; CLK_SET_RATE_PARENT)) {</div><div class='add'>+		if (!clk-&gt;ops-&gt;round_rate) {</div><div class='add'>+			clk-&gt;new_rate = clk-&gt;rate;</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+		new_rate = clk-&gt;ops-&gt;round_rate(clk-&gt;hw, rate, &amp;best_parent_rate);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* need clk-&gt;parent from here on out */</div><div class='add'>+	if (!clk-&gt;parent) {</div><div class='add'>+		pr_debug("%s: %s has NULL parent\n", __func__, clk-&gt;name);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!clk-&gt;ops-&gt;round_rate &amp;&amp; (clk-&gt;flags &amp; CLK_SET_RATE_PARENT)) {</div><div class='add'>+	if (!clk-&gt;ops-&gt;round_rate) {</div><div class='ctx'> 		top = clk_calc_new_rates(clk-&gt;parent, rate);</div><div class='del'>-		new_rate = clk-&gt;new_rate = clk-&gt;parent-&gt;new_rate;</div><div class='add'>+		new_rate = clk-&gt;parent-&gt;new_rate;</div><div class='ctx'> </div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (clk-&gt;flags &amp; CLK_SET_RATE_PARENT)</div><div class='del'>-		new_rate = clk-&gt;ops-&gt;round_rate(clk-&gt;hw, rate, &amp;best_parent_rate);</div><div class='del'>-	else</div><div class='del'>-		new_rate = clk-&gt;ops-&gt;round_rate(clk-&gt;hw, rate, NULL);</div><div class='add'>+	new_rate = clk-&gt;ops-&gt;round_rate(clk-&gt;hw, rate, &amp;best_parent_rate);</div><div class='ctx'> </div><div class='ctx'> 	if (best_parent_rate != clk-&gt;parent-&gt;rate) {</div><div class='ctx'> 		top = clk_calc_new_rates(clk-&gt;parent, best_parent_rate);</div><div class='hunk'>@@ -839,7 +855,7 @@ static void clk_change_rate(struct clk *clk)</div><div class='ctx'> 	old_rate = clk-&gt;rate;</div><div class='ctx'> </div><div class='ctx'> 	if (clk-&gt;ops-&gt;set_rate)</div><div class='del'>-		clk-&gt;ops-&gt;set_rate(clk-&gt;hw, clk-&gt;new_rate);</div><div class='add'>+		clk-&gt;ops-&gt;set_rate(clk-&gt;hw, clk-&gt;new_rate, clk-&gt;parent-&gt;rate);</div><div class='ctx'> </div><div class='ctx'> 	if (clk-&gt;ops-&gt;recalc_rate)</div><div class='ctx'> 		clk-&gt;rate = clk-&gt;ops-&gt;recalc_rate(clk-&gt;hw,</div><div class='hunk'>@@ -859,38 +875,19 @@ static void clk_change_rate(struct clk *clk)</div><div class='ctx'>  * @clk: the clk whose rate is being changed</div><div class='ctx'>  * @rate: the new rate for clk</div><div class='ctx'>  *</div><div class='del'>- * In the simplest case clk_set_rate will only change the rate of clk.</div><div class='del'>- *</div><div class='del'>- * If clk has the CLK_SET_RATE_GATE flag set and it is enabled this call</div><div class='del'>- * will fail; only when the clk is disabled will it be able to change</div><div class='del'>- * its rate.</div><div class='add'>+ * In the simplest case clk_set_rate will only adjust the rate of clk.</div><div class='ctx'>  *</div><div class='del'>- * Setting the CLK_SET_RATE_PARENT flag allows clk_set_rate to</div><div class='del'>- * recursively propagate up to clk's parent; whether or not this happens</div><div class='del'>- * depends on the outcome of clk's .round_rate implementation.  If</div><div class='del'>- * *parent_rate is 0 after calling .round_rate then upstream parent</div><div class='del'>- * propagation is ignored.  If *parent_rate comes back with a new rate</div><div class='del'>- * for clk's parent then we propagate up to clk's parent and set it's</div><div class='del'>- * rate.  Upward propagation will continue until either a clk does not</div><div class='del'>- * support the CLK_SET_RATE_PARENT flag or .round_rate stops requesting</div><div class='del'>- * changes to clk's parent_rate.  If there is a failure during upstream</div><div class='del'>- * propagation then clk_set_rate will unwind and restore each clk's rate</div><div class='del'>- * that had been successfully changed.  Afterwards a rate change abort</div><div class='del'>- * notification will be propagated downstream, starting from the clk</div><div class='del'>- * that failed.</div><div class='add'>+ * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to</div><div class='add'>+ * propagate up to clk's parent; whether or not this happens depends on the</div><div class='add'>+ * outcome of clk's .round_rate implementation.  If *parent_rate is unchanged</div><div class='add'>+ * after calling .round_rate then upstream parent propagation is ignored.  If</div><div class='add'>+ * *parent_rate comes back with a new rate for clk's parent then we propagate</div><div class='add'>+ * up to clk's parent and set it's rate.  Upward propagation will continue</div><div class='add'>+ * until either a clk does not support the CLK_SET_RATE_PARENT flag or</div><div class='add'>+ * .round_rate stops requesting changes to clk's parent_rate.</div><div class='ctx'>  *</div><div class='del'>- * At the end of all of the rate setting, clk_set_rate internally calls</div><div class='del'>- * __clk_recalc_rates and propagates the rate changes downstream,</div><div class='del'>- * starting from the highest clk whose rate was changed.  This has the</div><div class='del'>- * added benefit of propagating post-rate change notifiers.</div><div class='del'>- *</div><div class='del'>- * Note that while post-rate change and rate change abort notifications</div><div class='del'>- * are guaranteed to be sent to a clk only once per call to</div><div class='del'>- * clk_set_rate, pre-change notifications will be sent for every clk</div><div class='del'>- * whose rate is changed.  Stacking pre-change notifications is noisy</div><div class='del'>- * for the drivers subscribed to them, but this allows drivers to react</div><div class='del'>- * to intermediate clk rate changes up until the point where the final</div><div class='del'>- * rate is achieved at the end of upstream propagation.</div><div class='add'>+ * Rate changes are accomplished via tree traversal that also recalculates the</div><div class='add'>+ * rates for the clocks and fires off POST_RATE_CHANGE notifiers.</div><div class='ctx'>  *</div><div class='ctx'>  * Returns 0 on success, -EERROR otherwise.</div><div class='ctx'>  */</div><div class='hunk'>@@ -906,6 +903,11 @@ int clk_set_rate(struct clk *clk, unsigned long rate)</div><div class='ctx'> 	if (rate == clk-&gt;rate)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='add'>+	if ((clk-&gt;flags &amp; CLK_SET_RATE_GATE) &amp;&amp; clk-&gt;prepare_count) {</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* calculate new rates and get the topmost changed clock */</div><div class='ctx'> 	top = clk_calc_new_rates(clk, rate);</div><div class='ctx'> 	if (!top) {</div><div class='hunk'>@@ -1175,40 +1177,41 @@ EXPORT_SYMBOL_GPL(clk_set_parent);</div><div class='ctx'>  *</div><div class='ctx'>  * Initializes the lists in struct clk, queries the hardware for the</div><div class='ctx'>  * parent and rate and sets them both.</div><div class='del'>- *</div><div class='del'>- * Any struct clk passed into __clk_init must have the following members</div><div class='del'>- * populated:</div><div class='del'>- * 	.name</div><div class='del'>- * 	.ops</div><div class='del'>- * 	.hw</div><div class='del'>- * 	.parent_names</div><div class='del'>- * 	.num_parents</div><div class='del'>- * 	.flags</div><div class='del'>- *</div><div class='del'>- * Essentially, everything that would normally be passed into clk_register is</div><div class='del'>- * assumed to be initialized already in __clk_init.  The other members may be</div><div class='del'>- * populated, but are optional.</div><div class='del'>- *</div><div class='del'>- * __clk_init is only exposed via clk-private.h and is intended for use with</div><div class='del'>- * very large numbers of clocks that need to be statically initialized.  It is</div><div class='del'>- * a layering violation to include clk-private.h from any code which implements</div><div class='del'>- * a clock's .ops; as such any statically initialized clock data MUST be in a</div><div class='del'>- * separate C file from the logic that implements it's operations.</div><div class='ctx'>  */</div><div class='del'>-void __clk_init(struct device *dev, struct clk *clk)</div><div class='add'>+int __clk_init(struct device *dev, struct clk *clk)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	int i, ret = 0;</div><div class='ctx'> 	struct clk *orphan;</div><div class='ctx'> 	struct hlist_node *tmp, *tmp2;</div><div class='ctx'> </div><div class='ctx'> 	if (!clk)</div><div class='del'>-		return;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;prepare_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* check to see if a clock with this name is already registered */</div><div class='del'>-	if (__clk_lookup(clk-&gt;name))</div><div class='add'>+	if (__clk_lookup(clk-&gt;name)) {</div><div class='add'>+		pr_debug("%s: clk %s already initialized\n",</div><div class='add'>+				__func__, clk-&gt;name);</div><div class='add'>+		ret = -EEXIST;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check that clk_ops are sane.  See Documentation/clk.txt */</div><div class='add'>+	if (clk-&gt;ops-&gt;set_rate &amp;&amp;</div><div class='add'>+			!(clk-&gt;ops-&gt;round_rate &amp;&amp; clk-&gt;ops-&gt;recalc_rate)) {</div><div class='add'>+		pr_warning("%s: %s must implement .round_rate &amp; .recalc_rate\n",</div><div class='add'>+				__func__, clk-&gt;name);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (clk-&gt;ops-&gt;set_parent &amp;&amp; !clk-&gt;ops-&gt;get_parent) {</div><div class='add'>+		pr_warning("%s: %s must implement .get_parent &amp; .set_parent\n",</div><div class='add'>+				__func__, clk-&gt;name);</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* throw a WARN if any entries in parent_names are NULL */</div><div class='ctx'> 	for (i = 0; i &lt; clk-&gt;num_parents; i++)</div><div class='hunk'>@@ -1302,48 +1305,130 @@ void __clk_init(struct device *dev, struct clk *clk)</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;prepare_lock);</div><div class='ctx'> </div><div class='del'>-	return;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * __clk_register - register a clock and return a cookie.</div><div class='add'>+ *</div><div class='add'>+ * Same as clk_register, except that the .clk field inside hw shall point to a</div><div class='add'>+ * preallocated (generally statically allocated) struct clk. None of the fields</div><div class='add'>+ * of the struct clk need to be initialized.</div><div class='add'>+ *</div><div class='add'>+ * The data pointed to by .init and .clk field shall NOT be marked as init</div><div class='add'>+ * data.</div><div class='add'>+ *</div><div class='add'>+ * __clk_register is only exposed via clk-private.h and is intended for use with</div><div class='add'>+ * very large numbers of clocks that need to be statically initialized.  It is</div><div class='add'>+ * a layering violation to include clk-private.h from any code which implements</div><div class='add'>+ * a clock's .ops; as such any statically initialized clock data MUST be in a</div><div class='add'>+ * separate C file from the logic that implements it's operations.  Returns 0</div><div class='add'>+ * on success, otherwise an error code.</div><div class='add'>+ */</div><div class='add'>+struct clk *__clk_register(struct device *dev, struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+</div><div class='add'>+	clk = hw-&gt;clk;</div><div class='add'>+	clk-&gt;name = hw-&gt;init-&gt;name;</div><div class='add'>+	clk-&gt;ops = hw-&gt;init-&gt;ops;</div><div class='add'>+	clk-&gt;hw = hw;</div><div class='add'>+	clk-&gt;flags = hw-&gt;init-&gt;flags;</div><div class='add'>+	clk-&gt;parent_names = hw-&gt;init-&gt;parent_names;</div><div class='add'>+	clk-&gt;num_parents = hw-&gt;init-&gt;num_parents;</div><div class='add'>+</div><div class='add'>+	ret = __clk_init(dev, clk);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__clk_register);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * clk_register - allocate a new clock, register it and return an opaque cookie</div><div class='ctx'>  * @dev: device that is registering this clock</div><div class='del'>- * @name: clock name</div><div class='del'>- * @ops: operations this clock supports</div><div class='ctx'>  * @hw: link to hardware-specific clock data</div><div class='del'>- * @parent_names: array of string names for all possible parents</div><div class='del'>- * @num_parents: number of possible parents</div><div class='del'>- * @flags: framework-level hints and quirks</div><div class='ctx'>  *</div><div class='ctx'>  * clk_register is the primary interface for populating the clock tree with new</div><div class='ctx'>  * clock nodes.  It returns a pointer to the newly allocated struct clk which</div><div class='ctx'>  * cannot be dereferenced by driver code but may be used in conjuction with the</div><div class='del'>- * rest of the clock API.</div><div class='add'>+ * rest of the clock API.  In the event of an error clk_register will return an</div><div class='add'>+ * error code; drivers must test for an error code after calling clk_register.</div><div class='ctx'>  */</div><div class='del'>-struct clk *clk_register(struct device *dev, const char *name,</div><div class='del'>-		const struct clk_ops *ops, struct clk_hw *hw,</div><div class='del'>-		char **parent_names, u8 num_parents, unsigned long flags)</div><div class='add'>+struct clk *clk_register(struct device *dev, struct clk_hw *hw)</div><div class='ctx'> {</div><div class='add'>+	int i, ret;</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> </div><div class='ctx'> 	clk = kzalloc(sizeof(*clk), GFP_KERNEL);</div><div class='del'>-	if (!clk)</div><div class='del'>-		return NULL;</div><div class='add'>+	if (!clk) {</div><div class='add'>+		pr_err("%s: could not allocate clk\n", __func__);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto fail_out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	clk-&gt;name = name;</div><div class='del'>-	clk-&gt;ops = ops;</div><div class='add'>+	clk-&gt;name = kstrdup(hw-&gt;init-&gt;name, GFP_KERNEL);</div><div class='add'>+	if (!clk-&gt;name) {</div><div class='add'>+		pr_err("%s: could not allocate clk-&gt;name\n", __func__);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto fail_name;</div><div class='add'>+	}</div><div class='add'>+	clk-&gt;ops = hw-&gt;init-&gt;ops;</div><div class='ctx'> 	clk-&gt;hw = hw;</div><div class='del'>-	clk-&gt;flags = flags;</div><div class='del'>-	clk-&gt;parent_names = parent_names;</div><div class='del'>-	clk-&gt;num_parents = num_parents;</div><div class='add'>+	clk-&gt;flags = hw-&gt;init-&gt;flags;</div><div class='add'>+	clk-&gt;num_parents = hw-&gt;init-&gt;num_parents;</div><div class='ctx'> 	hw-&gt;clk = clk;</div><div class='ctx'> </div><div class='del'>-	__clk_init(dev, clk);</div><div class='add'>+	/* allocate local copy in case parent_names is __initdata */</div><div class='add'>+	clk-&gt;parent_names = kzalloc((sizeof(char*) * clk-&gt;num_parents),</div><div class='add'>+			GFP_KERNEL);</div><div class='ctx'> </div><div class='del'>-	return clk;</div><div class='add'>+	if (!clk-&gt;parent_names) {</div><div class='add'>+		pr_err("%s: could not allocate clk-&gt;parent_names\n", __func__);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto fail_parent_names;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	/* copy each string name in case parent_names is __initdata */</div><div class='add'>+	for (i = 0; i &lt; clk-&gt;num_parents; i++) {</div><div class='add'>+		clk-&gt;parent_names[i] = kstrdup(hw-&gt;init-&gt;parent_names[i],</div><div class='add'>+						GFP_KERNEL);</div><div class='add'>+		if (!clk-&gt;parent_names[i]) {</div><div class='add'>+			pr_err("%s: could not copy parent_names\n", __func__);</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto fail_parent_names_copy;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = __clk_init(dev, clk);</div><div class='add'>+	if (!ret)</div><div class='add'>+		return clk;</div><div class='add'>+</div><div class='add'>+fail_parent_names_copy:</div><div class='add'>+	while (--i &gt;= 0)</div><div class='add'>+		kfree(clk-&gt;parent_names[i]);</div><div class='add'>+	kfree(clk-&gt;parent_names);</div><div class='add'>+fail_parent_names:</div><div class='add'>+	kfree(clk-&gt;name);</div><div class='add'>+fail_name:</div><div class='add'>+	kfree(clk);</div><div class='add'>+fail_out:</div><div class='add'>+	return ERR_PTR(ret);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(clk_register);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * clk_unregister - unregister a currently registered clock</div><div class='add'>+ * @clk: clock to unregister</div><div class='add'>+ *</div><div class='add'>+ * Currently unimplemented.</div><div class='add'>+ */</div><div class='add'>+void clk_unregister(struct clk *clk) {}</div><div class='add'>+EXPORT_SYMBOL_GPL(clk_unregister);</div><div class='add'>+</div><div class='ctx'> /***        clk rate change notifiers        ***/</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/clk/clkdev.c b/drivers/clk/clkdev.c<br/>index 6db161f64ae0..c535cf8c5770 100644<br/>--- a/<a href='/drm-misc/tree/drivers/clk/clkdev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/clk/clkdev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/clk/clkdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/clkdev.c</a></div><div class='hunk'>@@ -35,7 +35,12 @@ static DEFINE_MUTEX(clocks_mutex);</div><div class='ctx'> static struct clk_lookup *clk_find(const char *dev_id, const char *con_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk_lookup *p, *cl = NULL;</div><div class='del'>-	int match, best = 0;</div><div class='add'>+	int match, best_found = 0, best_possible = 0;</div><div class='add'>+</div><div class='add'>+	if (dev_id)</div><div class='add'>+		best_possible += 2;</div><div class='add'>+	if (con_id)</div><div class='add'>+		best_possible += 1;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(p, &amp;clocks, node) {</div><div class='ctx'> 		match = 0;</div><div class='hunk'>@@ -50,10 +55,10 @@ static struct clk_lookup *clk_find(const char *dev_id, const char *con_id)</div><div class='ctx'> 			match += 1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (match &gt; best) {</div><div class='add'>+		if (match &gt; best_found) {</div><div class='ctx'> 			cl = p;</div><div class='del'>-			if (match != 3)</div><div class='del'>-				best = match;</div><div class='add'>+			if (match != best_possible)</div><div class='add'>+				best_found = match;</div><div class='ctx'> 			else</div><div class='ctx'> 				break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -89,6 +94,51 @@ void clk_put(struct clk *clk)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(clk_put);</div><div class='ctx'> </div><div class='add'>+static void devm_clk_release(struct device *dev, void *res)</div><div class='add'>+{</div><div class='add'>+	clk_put(*(struct clk **)res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct clk *devm_clk_get(struct device *dev, const char *id)</div><div class='add'>+{</div><div class='add'>+	struct clk **ptr, *clk;</div><div class='add'>+</div><div class='add'>+	ptr = devres_alloc(devm_clk_release, sizeof(*ptr), GFP_KERNEL);</div><div class='add'>+	if (!ptr)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	clk = clk_get(dev, id);</div><div class='add'>+	if (!IS_ERR(clk)) {</div><div class='add'>+		*ptr = clk;</div><div class='add'>+		devres_add(dev, ptr);</div><div class='add'>+	} else {</div><div class='add'>+		devres_free(ptr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(devm_clk_get);</div><div class='add'>+</div><div class='add'>+static int devm_clk_match(struct device *dev, void *res, void *data)</div><div class='add'>+{</div><div class='add'>+	struct clk **c = res;</div><div class='add'>+	if (!c || !*c) {</div><div class='add'>+		WARN_ON(!c || !*c);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	return *c == data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void devm_clk_put(struct device *dev, struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = devres_destroy(dev, devm_clk_release, devm_clk_match, clk);</div><div class='add'>+</div><div class='add'>+	WARN_ON(ret);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(devm_clk_put);</div><div class='add'>+</div><div class='ctx'> void clkdev_add(struct clk_lookup *cl)</div><div class='ctx'> {</div><div class='ctx'> 	mutex_lock(&amp;clocks_mutex);</div><div class='hunk'>@@ -116,8 +166,9 @@ struct clk_lookup_alloc {</div><div class='ctx'> 	char	con_id[MAX_CON_ID];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct clk_lookup * __init_refok</div><div class='del'>-clkdev_alloc(struct clk *clk, const char *con_id, const char *dev_fmt, ...)</div><div class='add'>+static struct clk_lookup * __init_refok</div><div class='add'>+vclkdev_alloc(struct clk *clk, const char *con_id, const char *dev_fmt,</div><div class='add'>+	va_list ap)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk_lookup_alloc *cla;</div><div class='ctx'> </div><div class='hunk'>@@ -132,16 +183,25 @@ clkdev_alloc(struct clk *clk, const char *con_id, const char *dev_fmt, ...)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (dev_fmt) {</div><div class='del'>-		va_list ap;</div><div class='del'>-</div><div class='del'>-		va_start(ap, dev_fmt);</div><div class='ctx'> 		vscnprintf(cla-&gt;dev_id, sizeof(cla-&gt;dev_id), dev_fmt, ap);</div><div class='ctx'> 		cla-&gt;cl.dev_id = cla-&gt;dev_id;</div><div class='del'>-		va_end(ap);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return &amp;cla-&gt;cl;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+struct clk_lookup * __init_refok</div><div class='add'>+clkdev_alloc(struct clk *clk, const char *con_id, const char *dev_fmt, ...)</div><div class='add'>+{</div><div class='add'>+	struct clk_lookup *cl;</div><div class='add'>+	va_list ap;</div><div class='add'>+</div><div class='add'>+	va_start(ap, dev_fmt);</div><div class='add'>+	cl = vclkdev_alloc(clk, con_id, dev_fmt, ap);</div><div class='add'>+	va_end(ap);</div><div class='add'>+</div><div class='add'>+	return cl;</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL(clkdev_alloc);</div><div class='ctx'> </div><div class='ctx'> int clk_add_alias(const char *alias, const char *alias_dev_name, char *id,</div><div class='hunk'>@@ -173,3 +233,65 @@ void clkdev_drop(struct clk_lookup *cl)</div><div class='ctx'> 	kfree(cl);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(clkdev_drop);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * clk_register_clkdev - register one clock lookup for a struct clk</div><div class='add'>+ * @clk: struct clk to associate with all clk_lookups</div><div class='add'>+ * @con_id: connection ID string on device</div><div class='add'>+ * @dev_id: format string describing device name</div><div class='add'>+ *</div><div class='add'>+ * con_id or dev_id may be NULL as a wildcard, just as in the rest of</div><div class='add'>+ * clkdev.</div><div class='add'>+ *</div><div class='add'>+ * To make things easier for mass registration, we detect error clks</div><div class='add'>+ * from a previous clk_register() call, and return the error code for</div><div class='add'>+ * those.  This is to permit this function to be called immediately</div><div class='add'>+ * after clk_register().</div><div class='add'>+ */</div><div class='add'>+int clk_register_clkdev(struct clk *clk, const char *con_id,</div><div class='add'>+	const char *dev_fmt, ...)</div><div class='add'>+{</div><div class='add'>+	struct clk_lookup *cl;</div><div class='add'>+	va_list ap;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return PTR_ERR(clk);</div><div class='add'>+</div><div class='add'>+	va_start(ap, dev_fmt);</div><div class='add'>+	cl = vclkdev_alloc(clk, con_id, dev_fmt, ap);</div><div class='add'>+	va_end(ap);</div><div class='add'>+</div><div class='add'>+	if (!cl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	clkdev_add(cl);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * clk_register_clkdevs - register a set of clk_lookup for a struct clk</div><div class='add'>+ * @clk: struct clk to associate with all clk_lookups</div><div class='add'>+ * @cl: array of clk_lookup structures with con_id and dev_id pre-initialized</div><div class='add'>+ * @num: number of clk_lookup structures to register</div><div class='add'>+ *</div><div class='add'>+ * To make things easier for mass registration, we detect error clks</div><div class='add'>+ * from a previous clk_register() call, and return the error code for</div><div class='add'>+ * those.  This is to permit this function to be called immediately</div><div class='add'>+ * after clk_register().</div><div class='add'>+ */</div><div class='add'>+int clk_register_clkdevs(struct clk *clk, struct clk_lookup *cl, size_t num)</div><div class='add'>+{</div><div class='add'>+	unsigned i;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return PTR_ERR(clk);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num; i++, cl++) {</div><div class='add'>+		cl-&gt;clk = clk;</div><div class='add'>+		clkdev_add(cl);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(clk_register_clkdevs);</div><div class='head'>diff --git a/drivers/clk/mxs/Makefile b/drivers/clk/mxs/Makefile<br/>new file mode 100644<br/>index 000000000000..7bedeec08524<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/mxs/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/Makefile</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+#</div><div class='add'>+# Makefile for mxs specific clk</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-y += clk.o clk-pll.o clk-ref.o clk-div.o clk-frac.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_SOC_IMX23) += clk-imx23.o</div><div class='add'>+obj-$(CONFIG_SOC_IMX28) += clk-imx28.o</div><div class='head'>diff --git a/drivers/clk/mxs/clk-div.c b/drivers/clk/mxs/clk-div.c<br/>new file mode 100644<br/>index 000000000000..90e1da93877e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/mxs/clk-div.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk-div.c</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct clk_div - mxs integer divider clock</div><div class='add'>+ * @divider: the parent class</div><div class='add'>+ * @ops: pointer to clk_ops of parent class</div><div class='add'>+ * @reg: register address</div><div class='add'>+ * @busy: busy bit shift</div><div class='add'>+ *</div><div class='add'>+ * The mxs divider clock is a subclass of basic clk_divider with an</div><div class='add'>+ * addtional busy bit.</div><div class='add'>+ */</div><div class='add'>+struct clk_div {</div><div class='add'>+	struct clk_divider divider;</div><div class='add'>+	const struct clk_ops *ops;</div><div class='add'>+	void __iomem *reg;</div><div class='add'>+	u8 busy;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct clk_div *to_clk_div(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_divider *divider = container_of(hw, struct clk_divider, hw);</div><div class='add'>+</div><div class='add'>+	return container_of(divider, struct clk_div, divider);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long clk_div_recalc_rate(struct clk_hw *hw,</div><div class='add'>+					 unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_div *div = to_clk_div(hw);</div><div class='add'>+</div><div class='add'>+	return div-&gt;ops-&gt;recalc_rate(&amp;div-&gt;divider.hw, parent_rate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_div_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+			       unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_div *div = to_clk_div(hw);</div><div class='add'>+</div><div class='add'>+	return div-&gt;ops-&gt;round_rate(&amp;div-&gt;divider.hw, rate, prate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_div_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+			    unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_div *div = to_clk_div(hw);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = div-&gt;ops-&gt;set_rate(&amp;div-&gt;divider.hw, rate, parent_rate);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = mxs_clk_wait(div-&gt;reg, div-&gt;busy);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_ops clk_div_ops = {</div><div class='add'>+	.recalc_rate = clk_div_recalc_rate,</div><div class='add'>+	.round_rate = clk_div_round_rate,</div><div class='add'>+	.set_rate = clk_div_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *mxs_clk_div(const char *name, const char *parent_name,</div><div class='add'>+			void __iomem *reg, u8 shift, u8 width, u8 busy)</div><div class='add'>+{</div><div class='add'>+	struct clk_div *div;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+</div><div class='add'>+	div = kzalloc(sizeof(*div), GFP_KERNEL);</div><div class='add'>+	if (!div)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_div_ops;</div><div class='add'>+	init.flags = CLK_SET_RATE_PARENT;</div><div class='add'>+	init.parent_names = (parent_name ? &amp;parent_name: NULL);</div><div class='add'>+	init.num_parents = (parent_name ? 1 : 0);</div><div class='add'>+</div><div class='add'>+	div-&gt;reg = reg;</div><div class='add'>+	div-&gt;busy = busy;</div><div class='add'>+</div><div class='add'>+	div-&gt;divider.reg = reg;</div><div class='add'>+	div-&gt;divider.shift = shift;</div><div class='add'>+	div-&gt;divider.width = width;</div><div class='add'>+	div-&gt;divider.flags = CLK_DIVIDER_ONE_BASED;</div><div class='add'>+	div-&gt;divider.lock = &amp;mxs_lock;</div><div class='add'>+	div-&gt;divider.hw.init = &amp;init;</div><div class='add'>+	div-&gt;ops = &amp;clk_divider_ops;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;div-&gt;divider.hw);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(div);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/mxs/clk-frac.c b/drivers/clk/mxs/clk-frac.c<br/>new file mode 100644<br/>index 000000000000..e6aa6b567d68<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/mxs/clk-frac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk-frac.c</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct clk_frac - mxs fractional divider clock</div><div class='add'>+ * @hw: clk_hw for the fractional divider clock</div><div class='add'>+ * @reg: register address</div><div class='add'>+ * @shift: the divider bit shift</div><div class='add'>+ * @width: the divider bit width</div><div class='add'>+ * @busy: busy bit shift</div><div class='add'>+ *</div><div class='add'>+ * The clock is an adjustable fractional divider with a busy bit to wait</div><div class='add'>+ * when the divider is adjusted.</div><div class='add'>+ */</div><div class='add'>+struct clk_frac {</div><div class='add'>+	struct clk_hw hw;</div><div class='add'>+	void __iomem *reg;</div><div class='add'>+	u8 shift;</div><div class='add'>+	u8 width;</div><div class='add'>+	u8 busy;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define to_clk_frac(_hw) container_of(_hw, struct clk_frac, hw)</div><div class='add'>+</div><div class='add'>+static unsigned long clk_frac_recalc_rate(struct clk_hw *hw,</div><div class='add'>+					  unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_frac *frac = to_clk_frac(hw);</div><div class='add'>+	u32 div;</div><div class='add'>+</div><div class='add'>+	div = readl_relaxed(frac-&gt;reg) &gt;&gt; frac-&gt;shift;</div><div class='add'>+	div &amp;= (1 &lt;&lt; frac-&gt;width) - 1;</div><div class='add'>+</div><div class='add'>+	return (parent_rate &gt;&gt; frac-&gt;width) * div;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_frac_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+				unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_frac *frac = to_clk_frac(hw);</div><div class='add'>+	unsigned long parent_rate = *prate;</div><div class='add'>+	u32 div;</div><div class='add'>+	u64 tmp;</div><div class='add'>+</div><div class='add'>+	if (rate &gt; parent_rate)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	tmp = rate;</div><div class='add'>+	tmp &lt;&lt;= frac-&gt;width;</div><div class='add'>+	do_div(tmp, parent_rate);</div><div class='add'>+	div = tmp;</div><div class='add'>+</div><div class='add'>+	if (!div)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return (parent_rate &gt;&gt; frac-&gt;width) * div;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_frac_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+			     unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_frac *frac = to_clk_frac(hw);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 div, val;</div><div class='add'>+	u64 tmp;</div><div class='add'>+</div><div class='add'>+	if (rate &gt; parent_rate)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	tmp = rate;</div><div class='add'>+	tmp &lt;&lt;= frac-&gt;width;</div><div class='add'>+	do_div(tmp, parent_rate);</div><div class='add'>+	div = tmp;</div><div class='add'>+</div><div class='add'>+	if (!div)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;mxs_lock, flags);</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(frac-&gt;reg);</div><div class='add'>+	val &amp;= ~(((1 &lt;&lt; frac-&gt;width) - 1) &lt;&lt; frac-&gt;shift);</div><div class='add'>+	val |= div &lt;&lt; frac-&gt;shift;</div><div class='add'>+	writel_relaxed(val, frac-&gt;reg);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;mxs_lock, flags);</div><div class='add'>+</div><div class='add'>+	return mxs_clk_wait(frac-&gt;reg, frac-&gt;busy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_ops clk_frac_ops = {</div><div class='add'>+	.recalc_rate = clk_frac_recalc_rate,</div><div class='add'>+	.round_rate = clk_frac_round_rate,</div><div class='add'>+	.set_rate = clk_frac_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *mxs_clk_frac(const char *name, const char *parent_name,</div><div class='add'>+			 void __iomem *reg, u8 shift, u8 width, u8 busy)</div><div class='add'>+{</div><div class='add'>+	struct clk_frac *frac;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+</div><div class='add'>+	frac = kzalloc(sizeof(*frac), GFP_KERNEL);</div><div class='add'>+	if (!frac)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_frac_ops;</div><div class='add'>+	init.flags = CLK_SET_RATE_PARENT;</div><div class='add'>+	init.parent_names = (parent_name ? &amp;parent_name: NULL);</div><div class='add'>+	init.num_parents = (parent_name ? 1 : 0);</div><div class='add'>+</div><div class='add'>+	frac-&gt;reg = reg;</div><div class='add'>+	frac-&gt;shift = shift;</div><div class='add'>+	frac-&gt;width = width;</div><div class='add'>+	frac-&gt;busy = busy;</div><div class='add'>+	frac-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;frac-&gt;hw);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(frac);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c<br/>new file mode 100644<br/>index 000000000000..f7be225f544c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/mxs/clk-imx23.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk-imx23.c</a></div><div class='hunk'>@@ -0,0 +1,205 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include &lt;mach/mx23.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+#define DIGCTRL			MX23_IO_ADDRESS(MX23_DIGCTL_BASE_ADDR)</div><div class='add'>+#define CLKCTRL			MX23_IO_ADDRESS(MX23_CLKCTRL_BASE_ADDR)</div><div class='add'>+#define PLLCTRL0		(CLKCTRL + 0x0000)</div><div class='add'>+#define CPU			(CLKCTRL + 0x0020)</div><div class='add'>+#define HBUS			(CLKCTRL + 0x0030)</div><div class='add'>+#define XBUS			(CLKCTRL + 0x0040)</div><div class='add'>+#define XTAL			(CLKCTRL + 0x0050)</div><div class='add'>+#define PIX			(CLKCTRL + 0x0060)</div><div class='add'>+#define SSP			(CLKCTRL + 0x0070)</div><div class='add'>+#define GPMI			(CLKCTRL + 0x0080)</div><div class='add'>+#define SPDIF			(CLKCTRL + 0x0090)</div><div class='add'>+#define EMI			(CLKCTRL + 0x00a0)</div><div class='add'>+#define SAIF			(CLKCTRL + 0x00c0)</div><div class='add'>+#define TV			(CLKCTRL + 0x00d0)</div><div class='add'>+#define ETM			(CLKCTRL + 0x00e0)</div><div class='add'>+#define FRAC			(CLKCTRL + 0x00f0)</div><div class='add'>+#define CLKSEQ			(CLKCTRL + 0x0110)</div><div class='add'>+</div><div class='add'>+#define BP_CPU_INTERRUPT_WAIT	12</div><div class='add'>+#define BP_CLKSEQ_BYPASS_SAIF	0</div><div class='add'>+#define BP_CLKSEQ_BYPASS_SSP	5</div><div class='add'>+#define BP_SAIF_DIV_FRAC_EN	16</div><div class='add'>+#define BP_FRAC_IOFRAC		24</div><div class='add'>+</div><div class='add'>+static void __init clk_misc_init(void)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Gate off cpu clock in WFI for power saving */</div><div class='add'>+	__mxs_setl(1 &lt;&lt; BP_CPU_INTERRUPT_WAIT, CPU);</div><div class='add'>+</div><div class='add'>+	/* Clear BYPASS for SAIF */</div><div class='add'>+	__mxs_clrl(1 &lt;&lt; BP_CLKSEQ_BYPASS_SAIF, CLKSEQ);</div><div class='add'>+</div><div class='add'>+	/* SAIF has to use frac div for functional operation */</div><div class='add'>+	val = readl_relaxed(SAIF);</div><div class='add'>+	val |= 1 &lt;&lt; BP_SAIF_DIV_FRAC_EN;</div><div class='add'>+	writel_relaxed(val, SAIF);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Source ssp clock from ref_io than ref_xtal,</div><div class='add'>+	 * as ref_xtal only provides 24 MHz as maximum.</div><div class='add'>+	 */</div><div class='add'>+	__mxs_clrl(1 &lt;&lt; BP_CLKSEQ_BYPASS_SSP, CLKSEQ);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 480 MHz seems too high to be ssp clock source directly,</div><div class='add'>+	 * so set frac to get a 288 MHz ref_io.</div><div class='add'>+	 */</div><div class='add'>+	__mxs_clrl(0x3f &lt;&lt; BP_FRAC_IOFRAC, FRAC);</div><div class='add'>+	__mxs_setl(30 &lt;&lt; BP_FRAC_IOFRAC, FRAC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_lookup uart_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "duart", },</div><div class='add'>+	{ .dev_id = "mxs-auart.0", },</div><div class='add'>+	{ .dev_id = "mxs-auart.1", },</div><div class='add'>+	{ .dev_id = "8006c000.serial", },</div><div class='add'>+	{ .dev_id = "8006e000.serial", },</div><div class='add'>+	{ .dev_id = "80070000.serial", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup hbus_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "imx23-dma-apbh", },</div><div class='add'>+	{ .dev_id = "80004000.dma-apbh", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup xbus_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "duart", .con_id = "apb_pclk"},</div><div class='add'>+	{ .dev_id = "80070000.serial", .con_id = "apb_pclk"},</div><div class='add'>+	{ .dev_id = "imx23-dma-apbx", },</div><div class='add'>+	{ .dev_id = "80024000.dma-apbx", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup ssp_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "imx23-mmc.0", },</div><div class='add'>+	{ .dev_id = "imx23-mmc.1", },</div><div class='add'>+	{ .dev_id = "80010000.ssp", },</div><div class='add'>+	{ .dev_id = "80034000.ssp", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup lcdif_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "imx23-fb", },</div><div class='add'>+	{ .dev_id = "80030000.lcdif", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup gpmi_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "imx23-gpmi-nand", },</div><div class='add'>+	{ .dev_id = "8000c000.gpmi", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *sel_pll[]  __initconst = { "pll", "ref_xtal", };</div><div class='add'>+static const char *sel_cpu[]  __initconst = { "ref_cpu", "ref_xtal", };</div><div class='add'>+static const char *sel_pix[]  __initconst = { "ref_pix", "ref_xtal", };</div><div class='add'>+static const char *sel_io[]   __initconst = { "ref_io", "ref_xtal", };</div><div class='add'>+static const char *cpu_sels[] __initconst = { "cpu_pll", "cpu_xtal", };</div><div class='add'>+static const char *emi_sels[] __initconst = { "emi_pll", "emi_xtal", };</div><div class='add'>+</div><div class='add'>+enum imx23_clk {</div><div class='add'>+	ref_xtal, pll, ref_cpu, ref_emi, ref_pix, ref_io, saif_sel,</div><div class='add'>+	lcdif_sel, gpmi_sel, ssp_sel, emi_sel, cpu, etm_sel, cpu_pll,</div><div class='add'>+	cpu_xtal, hbus, xbus, lcdif_div, ssp_div, gpmi_div, emi_pll,</div><div class='add'>+	emi_xtal, etm_div, saif_div, clk32k_div, rtc, adc, spdif_div,</div><div class='add'>+	clk32k, dri, pwm, filt, uart, ssp, gpmi, spdif, emi, saif,</div><div class='add'>+	lcdif, etm, usb, usb_pwr,</div><div class='add'>+	clk_max</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *clks[clk_max];</div><div class='add'>+</div><div class='add'>+static enum imx23_clk clks_init_on[] __initdata = {</div><div class='add'>+	cpu, hbus, xbus, emi, uart,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __init mx23_clocks_init(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk_misc_init();</div><div class='add'>+</div><div class='add'>+	clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000);</div><div class='add'>+	clks[pll] = mxs_clk_pll("pll", "ref_xtal", PLLCTRL0, 16, 480000000);</div><div class='add'>+	clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll", FRAC, 0);</div><div class='add'>+	clks[ref_emi] = mxs_clk_ref("ref_emi", "pll", FRAC, 1);</div><div class='add'>+	clks[ref_pix] = mxs_clk_ref("ref_pix", "pll", FRAC, 2);</div><div class='add'>+	clks[ref_io] = mxs_clk_ref("ref_io", "pll", FRAC, 3);</div><div class='add'>+	clks[saif_sel] = mxs_clk_mux("saif_sel", CLKSEQ, 0, 1, sel_pll, ARRAY_SIZE(sel_pll));</div><div class='add'>+	clks[lcdif_sel] = mxs_clk_mux("lcdif_sel", CLKSEQ, 1, 1, sel_pix, ARRAY_SIZE(sel_pix));</div><div class='add'>+	clks[gpmi_sel] = mxs_clk_mux("gpmi_sel", CLKSEQ, 4, 1, sel_io, ARRAY_SIZE(sel_io));</div><div class='add'>+	clks[ssp_sel] = mxs_clk_mux("ssp_sel", CLKSEQ, 5, 1, sel_io, ARRAY_SIZE(sel_io));</div><div class='add'>+	clks[emi_sel] = mxs_clk_mux("emi_sel", CLKSEQ, 6, 1, emi_sels, ARRAY_SIZE(emi_sels));</div><div class='add'>+	clks[cpu] = mxs_clk_mux("cpu", CLKSEQ, 7, 1, cpu_sels, ARRAY_SIZE(cpu_sels));</div><div class='add'>+	clks[etm_sel] = mxs_clk_mux("etm_sel", CLKSEQ, 8, 1, sel_cpu, ARRAY_SIZE(sel_cpu));</div><div class='add'>+	clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28);</div><div class='add'>+	clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29);</div><div class='add'>+	clks[hbus] = mxs_clk_div("hbus", "cpu", HBUS, 0, 5, 29);</div><div class='add'>+	clks[xbus] = mxs_clk_div("xbus", "ref_xtal", XBUS, 0, 10, 31);</div><div class='add'>+	clks[lcdif_div] = mxs_clk_div("lcdif_div", "lcdif_sel", PIX, 0, 12, 29);</div><div class='add'>+	clks[ssp_div] = mxs_clk_div("ssp_div", "ssp_sel", SSP, 0, 9, 29);</div><div class='add'>+	clks[gpmi_div] = mxs_clk_div("gpmi_div", "gpmi_sel", GPMI, 0, 10, 29);</div><div class='add'>+	clks[emi_pll] = mxs_clk_div("emi_pll", "ref_emi", EMI, 0, 6, 28);</div><div class='add'>+	clks[emi_xtal] = mxs_clk_div("emi_xtal", "ref_xtal", EMI, 8, 4, 29);</div><div class='add'>+	clks[etm_div] = mxs_clk_div("etm_div", "etm_sel", ETM, 0, 6, 29);</div><div class='add'>+	clks[saif_div] = mxs_clk_frac("saif_div", "saif_sel", SAIF, 0, 16, 29);</div><div class='add'>+	clks[clk32k_div] = mxs_clk_fixed_factor("clk32k_div", "ref_xtal", 1, 750);</div><div class='add'>+	clks[rtc] = mxs_clk_fixed_factor("rtc", "ref_xtal", 1, 768);</div><div class='add'>+	clks[adc] = mxs_clk_fixed_factor("adc", "clk32k", 1, 16);</div><div class='add'>+	clks[spdif_div] = mxs_clk_fixed_factor("spdif_div", "pll", 1, 4);</div><div class='add'>+	clks[clk32k] = mxs_clk_gate("clk32k", "clk32k_div", XTAL, 26);</div><div class='add'>+	clks[dri] = mxs_clk_gate("dri", "ref_xtal", XTAL, 28);</div><div class='add'>+	clks[pwm] = mxs_clk_gate("pwm", "ref_xtal", XTAL, 29);</div><div class='add'>+	clks[filt] = mxs_clk_gate("filt", "ref_xtal", XTAL, 30);</div><div class='add'>+	clks[uart] = mxs_clk_gate("uart", "ref_xtal", XTAL, 31);</div><div class='add'>+	clks[ssp] = mxs_clk_gate("ssp", "ssp_div", SSP, 31);</div><div class='add'>+	clks[gpmi] = mxs_clk_gate("gpmi", "gpmi_div", GPMI, 31);</div><div class='add'>+	clks[spdif] = mxs_clk_gate("spdif", "spdif_div", SPDIF, 31);</div><div class='add'>+	clks[emi] = mxs_clk_gate("emi", "emi_sel", EMI, 31);</div><div class='add'>+	clks[saif] = mxs_clk_gate("saif", "saif_div", SAIF, 31);</div><div class='add'>+	clks[lcdif] = mxs_clk_gate("lcdif", "lcdif_div", PIX, 31);</div><div class='add'>+	clks[etm] = mxs_clk_gate("etm", "etm_div", ETM, 31);</div><div class='add'>+	clks[usb] = mxs_clk_gate("usb", "usb_pwr", DIGCTRL, 2);</div><div class='add'>+	clks[usb_pwr] = clk_register_gate(NULL, "usb_pwr", "pll", 0, PLLCTRL0, 18, 0, &amp;mxs_lock);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clks); i++)</div><div class='add'>+		if (IS_ERR(clks[i])) {</div><div class='add'>+			pr_err("i.MX23 clk %d: register failed with %ld\n",</div><div class='add'>+				i, PTR_ERR(clks[i]));</div><div class='add'>+			return PTR_ERR(clks[i]);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	clk_register_clkdev(clks[clk32k], NULL, "timrot");</div><div class='add'>+	clk_register_clkdevs(clks[hbus], hbus_lookups, ARRAY_SIZE(hbus_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[xbus], xbus_lookups, ARRAY_SIZE(xbus_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[uart], uart_lookups, ARRAY_SIZE(uart_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[ssp], ssp_lookups, ARRAY_SIZE(ssp_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[gpmi], gpmi_lookups, ARRAY_SIZE(gpmi_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[lcdif], lcdif_lookups, ARRAY_SIZE(lcdif_lookups));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clks_init_on); i++)</div><div class='add'>+		clk_prepare_enable(clks[clks_init_on[i]]);</div><div class='add'>+</div><div class='add'>+	mxs_timer_init(MX23_INT_TIMER0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c<br/>new file mode 100644<br/>index 000000000000..2826a2606a29<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/mxs/clk-imx28.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk-imx28.c</a></div><div class='hunk'>@@ -0,0 +1,338 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;mach/common.h&gt;</div><div class='add'>+#include &lt;mach/mx28.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+#define CLKCTRL			MX28_IO_ADDRESS(MX28_CLKCTRL_BASE_ADDR)</div><div class='add'>+#define PLL0CTRL0		(CLKCTRL + 0x0000)</div><div class='add'>+#define PLL1CTRL0		(CLKCTRL + 0x0020)</div><div class='add'>+#define PLL2CTRL0		(CLKCTRL + 0x0040)</div><div class='add'>+#define CPU			(CLKCTRL + 0x0050)</div><div class='add'>+#define HBUS			(CLKCTRL + 0x0060)</div><div class='add'>+#define XBUS			(CLKCTRL + 0x0070)</div><div class='add'>+#define XTAL			(CLKCTRL + 0x0080)</div><div class='add'>+#define SSP0			(CLKCTRL + 0x0090)</div><div class='add'>+#define SSP1			(CLKCTRL + 0x00a0)</div><div class='add'>+#define SSP2			(CLKCTRL + 0x00b0)</div><div class='add'>+#define SSP3			(CLKCTRL + 0x00c0)</div><div class='add'>+#define GPMI			(CLKCTRL + 0x00d0)</div><div class='add'>+#define SPDIF			(CLKCTRL + 0x00e0)</div><div class='add'>+#define EMI			(CLKCTRL + 0x00f0)</div><div class='add'>+#define SAIF0			(CLKCTRL + 0x0100)</div><div class='add'>+#define SAIF1			(CLKCTRL + 0x0110)</div><div class='add'>+#define LCDIF			(CLKCTRL + 0x0120)</div><div class='add'>+#define ETM			(CLKCTRL + 0x0130)</div><div class='add'>+#define ENET			(CLKCTRL + 0x0140)</div><div class='add'>+#define FLEXCAN			(CLKCTRL + 0x0160)</div><div class='add'>+#define FRAC0			(CLKCTRL + 0x01b0)</div><div class='add'>+#define FRAC1			(CLKCTRL + 0x01c0)</div><div class='add'>+#define CLKSEQ			(CLKCTRL + 0x01d0)</div><div class='add'>+</div><div class='add'>+#define BP_CPU_INTERRUPT_WAIT	12</div><div class='add'>+#define BP_SAIF_DIV_FRAC_EN	16</div><div class='add'>+#define BP_ENET_DIV_TIME	21</div><div class='add'>+#define BP_ENET_SLEEP		31</div><div class='add'>+#define BP_CLKSEQ_BYPASS_SAIF0	0</div><div class='add'>+#define BP_CLKSEQ_BYPASS_SSP0	3</div><div class='add'>+#define BP_FRAC0_IO1FRAC	16</div><div class='add'>+#define BP_FRAC0_IO0FRAC	24</div><div class='add'>+</div><div class='add'>+#define DIGCTRL			MX28_IO_ADDRESS(MX28_DIGCTL_BASE_ADDR)</div><div class='add'>+#define BP_SAIF_CLKMUX		10</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * HW_SAIF_CLKMUX_SEL:</div><div class='add'>+ *  DIRECT(0x0): SAIF0 clock pins selected for SAIF0 input clocks, and SAIF1</div><div class='add'>+ *		clock pins selected for SAIF1 input clocks.</div><div class='add'>+ *  CROSSINPUT(0x1): SAIF1 clock inputs selected for SAIF0 input clocks, and</div><div class='add'>+ *		SAIF0 clock inputs selected for SAIF1 input clocks.</div><div class='add'>+ *  EXTMSTR0(0x2): SAIF0 clock pin selected for both SAIF0 and SAIF1 input</div><div class='add'>+ *		clocks.</div><div class='add'>+ *  EXTMSTR1(0x3): SAIF1 clock pin selected for both SAIF0 and SAIF1 input</div><div class='add'>+ *		clocks.</div><div class='add'>+ */</div><div class='add'>+int mxs_saif_clkmux_select(unsigned int clkmux)</div><div class='add'>+{</div><div class='add'>+	if (clkmux &gt; 0x3)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	__mxs_clrl(0x3 &lt;&lt; BP_SAIF_CLKMUX, DIGCTRL);</div><div class='add'>+	__mxs_setl(clkmux &lt;&lt; BP_SAIF_CLKMUX, DIGCTRL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init clk_misc_init(void)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Gate off cpu clock in WFI for power saving */</div><div class='add'>+	__mxs_setl(1 &lt;&lt; BP_CPU_INTERRUPT_WAIT, CPU);</div><div class='add'>+</div><div class='add'>+	/* 0 is a bad default value for a divider */</div><div class='add'>+	__mxs_setl(1 &lt;&lt; BP_ENET_DIV_TIME, ENET);</div><div class='add'>+</div><div class='add'>+	/* Clear BYPASS for SAIF */</div><div class='add'>+	__mxs_clrl(0x3 &lt;&lt; BP_CLKSEQ_BYPASS_SAIF0, CLKSEQ);</div><div class='add'>+</div><div class='add'>+	/* SAIF has to use frac div for functional operation */</div><div class='add'>+	val = readl_relaxed(SAIF0);</div><div class='add'>+	val |= 1 &lt;&lt; BP_SAIF_DIV_FRAC_EN;</div><div class='add'>+	writel_relaxed(val, SAIF0);</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(SAIF1);</div><div class='add'>+	val |= 1 &lt;&lt; BP_SAIF_DIV_FRAC_EN;</div><div class='add'>+	writel_relaxed(val, SAIF1);</div><div class='add'>+</div><div class='add'>+	/* Extra fec clock setting */</div><div class='add'>+	val = readl_relaxed(ENET);</div><div class='add'>+	val &amp;= ~(1 &lt;&lt; BP_ENET_SLEEP);</div><div class='add'>+	writel_relaxed(val, ENET);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Source ssp clock from ref_io than ref_xtal,</div><div class='add'>+	 * as ref_xtal only provides 24 MHz as maximum.</div><div class='add'>+	 */</div><div class='add'>+	__mxs_clrl(0xf &lt;&lt; BP_CLKSEQ_BYPASS_SSP0, CLKSEQ);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 480 MHz seems too high to be ssp clock source directly,</div><div class='add'>+	 * so set frac0 to get a 288 MHz ref_io0.</div><div class='add'>+	 */</div><div class='add'>+	val = readl_relaxed(FRAC0);</div><div class='add'>+	val &amp;= ~(0x3f &lt;&lt; BP_FRAC0_IO0FRAC);</div><div class='add'>+	val |= 30 &lt;&lt; BP_FRAC0_IO0FRAC;</div><div class='add'>+	writel_relaxed(val, FRAC0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_lookup uart_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "duart", },</div><div class='add'>+	{ .dev_id = "mxs-auart.0", },</div><div class='add'>+	{ .dev_id = "mxs-auart.1", },</div><div class='add'>+	{ .dev_id = "mxs-auart.2", },</div><div class='add'>+	{ .dev_id = "mxs-auart.3", },</div><div class='add'>+	{ .dev_id = "mxs-auart.4", },</div><div class='add'>+	{ .dev_id = "8006a000.serial", },</div><div class='add'>+	{ .dev_id = "8006c000.serial", },</div><div class='add'>+	{ .dev_id = "8006e000.serial", },</div><div class='add'>+	{ .dev_id = "80070000.serial", },</div><div class='add'>+	{ .dev_id = "80072000.serial", },</div><div class='add'>+	{ .dev_id = "80074000.serial", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup hbus_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "imx28-dma-apbh", },</div><div class='add'>+	{ .dev_id = "80004000.dma-apbh", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup xbus_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "duart", .con_id = "apb_pclk"},</div><div class='add'>+	{ .dev_id = "80074000.serial", .con_id = "apb_pclk"},</div><div class='add'>+	{ .dev_id = "imx28-dma-apbx", },</div><div class='add'>+	{ .dev_id = "80024000.dma-apbx", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup ssp0_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "imx28-mmc.0", },</div><div class='add'>+	{ .dev_id = "80010000.ssp", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup ssp1_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "imx28-mmc.1", },</div><div class='add'>+	{ .dev_id = "80012000.ssp", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup ssp2_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "imx28-mmc.2", },</div><div class='add'>+	{ .dev_id = "80014000.ssp", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup ssp3_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "imx28-mmc.3", },</div><div class='add'>+	{ .dev_id = "80016000.ssp", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup lcdif_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "imx28-fb", },</div><div class='add'>+	{ .dev_id = "80030000.lcdif", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup gpmi_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "imx28-gpmi-nand", },</div><div class='add'>+	{ .dev_id = "8000c000.gpmi", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup fec_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "imx28-fec.0", },</div><div class='add'>+	{ .dev_id = "imx28-fec.1", },</div><div class='add'>+	{ .dev_id = "800f0000.ethernet", },</div><div class='add'>+	{ .dev_id = "800f4000.ethernet", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup can0_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "flexcan.0", },</div><div class='add'>+	{ .dev_id = "80032000.can", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup can1_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "flexcan.1", },</div><div class='add'>+	{ .dev_id = "80034000.can", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup saif0_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "mxs-saif.0", },</div><div class='add'>+	{ .dev_id = "80042000.saif", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk_lookup saif1_lookups[] __initdata = {</div><div class='add'>+	{ .dev_id = "mxs-saif.1", },</div><div class='add'>+	{ .dev_id = "80046000.saif", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *sel_cpu[]  __initconst = { "ref_cpu", "ref_xtal", };</div><div class='add'>+static const char *sel_io0[]  __initconst = { "ref_io0", "ref_xtal", };</div><div class='add'>+static const char *sel_io1[]  __initconst = { "ref_io1", "ref_xtal", };</div><div class='add'>+static const char *sel_pix[]  __initconst = { "ref_pix", "ref_xtal", };</div><div class='add'>+static const char *sel_gpmi[] __initconst = { "ref_gpmi", "ref_xtal", };</div><div class='add'>+static const char *sel_pll0[] __initconst = { "pll0", "ref_xtal", };</div><div class='add'>+static const char *cpu_sels[] __initconst = { "cpu_pll", "cpu_xtal", };</div><div class='add'>+static const char *emi_sels[] __initconst = { "emi_pll", "emi_xtal", };</div><div class='add'>+static const char *ptp_sels[] __initconst = { "ref_xtal", "pll0", };</div><div class='add'>+</div><div class='add'>+enum imx28_clk {</div><div class='add'>+	ref_xtal, pll0, pll1, pll2, ref_cpu, ref_emi, ref_io0, ref_io1,</div><div class='add'>+	ref_pix, ref_hsadc, ref_gpmi, saif0_sel, saif1_sel, gpmi_sel,</div><div class='add'>+	ssp0_sel, ssp1_sel, ssp2_sel, ssp3_sel, emi_sel, etm_sel,</div><div class='add'>+	lcdif_sel, cpu, ptp_sel, cpu_pll, cpu_xtal, hbus, xbus,</div><div class='add'>+	ssp0_div, ssp1_div, ssp2_div, ssp3_div, gpmi_div, emi_pll,</div><div class='add'>+	emi_xtal, lcdif_div, etm_div, ptp, saif0_div, saif1_div,</div><div class='add'>+	clk32k_div, rtc, lradc, spdif_div, clk32k, pwm, uart, ssp0,</div><div class='add'>+	ssp1, ssp2, ssp3, gpmi, spdif, emi, saif0, saif1, lcdif, etm,</div><div class='add'>+	fec, can0, can1, usb0, usb1, usb0_pwr, usb1_pwr, enet_out,</div><div class='add'>+	clk_max</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct clk *clks[clk_max];</div><div class='add'>+</div><div class='add'>+static enum imx28_clk clks_init_on[] __initdata = {</div><div class='add'>+	cpu, hbus, xbus, emi, uart,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __init mx28_clocks_init(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk_misc_init();</div><div class='add'>+</div><div class='add'>+	clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000);</div><div class='add'>+	clks[pll0] = mxs_clk_pll("pll0", "ref_xtal", PLL0CTRL0, 17, 480000000);</div><div class='add'>+	clks[pll1] = mxs_clk_pll("pll1", "ref_xtal", PLL1CTRL0, 17, 480000000);</div><div class='add'>+	clks[pll2] = mxs_clk_pll("pll2", "ref_xtal", PLL2CTRL0, 23, 50000000);</div><div class='add'>+	clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll0", FRAC0, 0);</div><div class='add'>+	clks[ref_emi] = mxs_clk_ref("ref_emi", "pll0", FRAC0, 1);</div><div class='add'>+	clks[ref_io0] = mxs_clk_ref("ref_io0", "pll0", FRAC0, 2);</div><div class='add'>+	clks[ref_io1] = mxs_clk_ref("ref_io1", "pll0", FRAC0, 3);</div><div class='add'>+	clks[ref_pix] = mxs_clk_ref("ref_pix", "pll0", FRAC1, 0);</div><div class='add'>+	clks[ref_hsadc] = mxs_clk_ref("ref_hsadc", "pll0", FRAC1, 1);</div><div class='add'>+	clks[ref_gpmi] = mxs_clk_ref("ref_gpmi", "pll0", FRAC1, 2);</div><div class='add'>+	clks[saif0_sel] = mxs_clk_mux("saif0_sel", CLKSEQ, 0, 1, sel_pll0, ARRAY_SIZE(sel_pll0));</div><div class='add'>+	clks[saif1_sel] = mxs_clk_mux("saif1_sel", CLKSEQ, 1, 1, sel_pll0, ARRAY_SIZE(sel_pll0));</div><div class='add'>+	clks[gpmi_sel] = mxs_clk_mux("gpmi_sel", CLKSEQ, 2, 1, sel_gpmi, ARRAY_SIZE(sel_gpmi));</div><div class='add'>+	clks[ssp0_sel] = mxs_clk_mux("ssp0_sel", CLKSEQ, 3, 1, sel_io0, ARRAY_SIZE(sel_io0));</div><div class='add'>+	clks[ssp1_sel] = mxs_clk_mux("ssp1_sel", CLKSEQ, 4, 1, sel_io0, ARRAY_SIZE(sel_io0));</div><div class='add'>+	clks[ssp2_sel] = mxs_clk_mux("ssp2_sel", CLKSEQ, 5, 1, sel_io1, ARRAY_SIZE(sel_io1));</div><div class='add'>+	clks[ssp3_sel] = mxs_clk_mux("ssp3_sel", CLKSEQ, 6, 1, sel_io1, ARRAY_SIZE(sel_io1));</div><div class='add'>+	clks[emi_sel] = mxs_clk_mux("emi_sel", CLKSEQ, 7, 1, emi_sels, ARRAY_SIZE(emi_sels));</div><div class='add'>+	clks[etm_sel] = mxs_clk_mux("etm_sel", CLKSEQ, 8, 1, sel_cpu, ARRAY_SIZE(sel_cpu));</div><div class='add'>+	clks[lcdif_sel] = mxs_clk_mux("lcdif_sel", CLKSEQ, 14, 1, sel_pix, ARRAY_SIZE(sel_pix));</div><div class='add'>+	clks[cpu] = mxs_clk_mux("cpu", CLKSEQ, 18, 1, cpu_sels, ARRAY_SIZE(cpu_sels));</div><div class='add'>+	clks[ptp_sel] = mxs_clk_mux("ptp_sel", ENET, 19, 1, ptp_sels, ARRAY_SIZE(ptp_sels));</div><div class='add'>+	clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28);</div><div class='add'>+	clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29);</div><div class='add'>+	clks[hbus] = mxs_clk_div("hbus", "cpu", HBUS, 0, 5, 31);</div><div class='add'>+	clks[xbus] = mxs_clk_div("xbus", "ref_xtal", XBUS, 0, 10, 31);</div><div class='add'>+	clks[ssp0_div] = mxs_clk_div("ssp0_div", "ssp0_sel", SSP0, 0, 9, 29);</div><div class='add'>+	clks[ssp1_div] = mxs_clk_div("ssp1_div", "ssp1_sel", SSP1, 0, 9, 29);</div><div class='add'>+	clks[ssp2_div] = mxs_clk_div("ssp2_div", "ssp2_sel", SSP2, 0, 9, 29);</div><div class='add'>+	clks[ssp3_div] = mxs_clk_div("ssp3_div", "ssp3_sel", SSP3, 0, 9, 29);</div><div class='add'>+	clks[gpmi_div] = mxs_clk_div("gpmi_div", "gpmi_sel", GPMI, 0, 10, 29);</div><div class='add'>+	clks[emi_pll] = mxs_clk_div("emi_pll", "ref_emi", EMI, 0, 6, 28);</div><div class='add'>+	clks[emi_xtal] = mxs_clk_div("emi_xtal", "ref_xtal", EMI, 8, 4, 29);</div><div class='add'>+	clks[lcdif_div] = mxs_clk_div("lcdif_div", "lcdif_sel", LCDIF, 0, 13, 29);</div><div class='add'>+	clks[etm_div] = mxs_clk_div("etm_div", "etm_sel", ETM, 0, 7, 29);</div><div class='add'>+	clks[ptp] = mxs_clk_div("ptp", "ptp_sel", ENET, 21, 6, 27);</div><div class='add'>+	clks[saif0_div] = mxs_clk_frac("saif0_div", "saif0_sel", SAIF0, 0, 16, 29);</div><div class='add'>+	clks[saif1_div] = mxs_clk_frac("saif1_div", "saif1_sel", SAIF1, 0, 16, 29);</div><div class='add'>+	clks[clk32k_div] = mxs_clk_fixed_factor("clk32k_div", "ref_xtal", 1, 750);</div><div class='add'>+	clks[rtc] = mxs_clk_fixed_factor("rtc", "ref_xtal", 1, 768);</div><div class='add'>+	clks[lradc] = mxs_clk_fixed_factor("lradc", "clk32k", 1, 16);</div><div class='add'>+	clks[spdif_div] = mxs_clk_fixed_factor("spdif_div", "pll0", 1, 4);</div><div class='add'>+	clks[clk32k] = mxs_clk_gate("clk32k", "clk32k_div", XTAL, 26);</div><div class='add'>+	clks[pwm] = mxs_clk_gate("pwm", "ref_xtal", XTAL, 29);</div><div class='add'>+	clks[uart] = mxs_clk_gate("uart", "ref_xtal", XTAL, 31);</div><div class='add'>+	clks[ssp0] = mxs_clk_gate("ssp0", "ssp0_div", SSP0, 31);</div><div class='add'>+	clks[ssp1] = mxs_clk_gate("ssp1", "ssp1_div", SSP1, 31);</div><div class='add'>+	clks[ssp2] = mxs_clk_gate("ssp2", "ssp2_div", SSP2, 31);</div><div class='add'>+	clks[ssp3] = mxs_clk_gate("ssp3", "ssp3_div", SSP3, 31);</div><div class='add'>+	clks[gpmi] = mxs_clk_gate("gpmi", "gpmi_div", GPMI, 31);</div><div class='add'>+	clks[spdif] = mxs_clk_gate("spdif", "spdif_div", SPDIF, 31);</div><div class='add'>+	clks[emi] = mxs_clk_gate("emi", "emi_sel", EMI, 31);</div><div class='add'>+	clks[saif0] = mxs_clk_gate("saif0", "saif0_div", SAIF0, 31);</div><div class='add'>+	clks[saif1] = mxs_clk_gate("saif1", "saif1_div", SAIF1, 31);</div><div class='add'>+	clks[lcdif] = mxs_clk_gate("lcdif", "lcdif_div", LCDIF, 31);</div><div class='add'>+	clks[etm] = mxs_clk_gate("etm", "etm_div", ETM, 31);</div><div class='add'>+	clks[fec] = mxs_clk_gate("fec", "hbus", ENET, 30);</div><div class='add'>+	clks[can0] = mxs_clk_gate("can0", "ref_xtal", FLEXCAN, 30);</div><div class='add'>+	clks[can1] = mxs_clk_gate("can1", "ref_xtal", FLEXCAN, 28);</div><div class='add'>+	clks[usb0] = mxs_clk_gate("usb0", "usb0_pwr", DIGCTRL, 2);</div><div class='add'>+	clks[usb1] = mxs_clk_gate("usb1", "usb1_pwr", DIGCTRL, 16);</div><div class='add'>+	clks[usb0_pwr] = clk_register_gate(NULL, "usb0_pwr", "pll0", 0, PLL0CTRL0, 18, 0, &amp;mxs_lock);</div><div class='add'>+	clks[usb1_pwr] = clk_register_gate(NULL, "usb1_pwr", "pll1", 0, PLL1CTRL0, 18, 0, &amp;mxs_lock);</div><div class='add'>+	clks[enet_out] = clk_register_gate(NULL, "enet_out", "pll2", 0, ENET, 18, 0, &amp;mxs_lock);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clks); i++)</div><div class='add'>+		if (IS_ERR(clks[i])) {</div><div class='add'>+			pr_err("i.MX28 clk %d: register failed with %ld\n",</div><div class='add'>+				i, PTR_ERR(clks[i]));</div><div class='add'>+			return PTR_ERR(clks[i]);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	clk_register_clkdev(clks[clk32k], NULL, "timrot");</div><div class='add'>+	clk_register_clkdev(clks[enet_out], NULL, "enet_out");</div><div class='add'>+	clk_register_clkdevs(clks[hbus], hbus_lookups, ARRAY_SIZE(hbus_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[xbus], xbus_lookups, ARRAY_SIZE(xbus_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[uart], uart_lookups, ARRAY_SIZE(uart_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[ssp0], ssp0_lookups, ARRAY_SIZE(ssp0_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[ssp1], ssp1_lookups, ARRAY_SIZE(ssp1_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[ssp2], ssp2_lookups, ARRAY_SIZE(ssp2_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[ssp3], ssp3_lookups, ARRAY_SIZE(ssp3_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[gpmi], gpmi_lookups, ARRAY_SIZE(gpmi_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[saif0], saif0_lookups, ARRAY_SIZE(saif0_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[saif1], saif1_lookups, ARRAY_SIZE(saif1_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[lcdif], lcdif_lookups, ARRAY_SIZE(lcdif_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[fec], fec_lookups, ARRAY_SIZE(fec_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[can0], can0_lookups, ARRAY_SIZE(can0_lookups));</div><div class='add'>+	clk_register_clkdevs(clks[can1], can1_lookups, ARRAY_SIZE(can1_lookups));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clks_init_on); i++)</div><div class='add'>+		clk_prepare_enable(clks[clks_init_on[i]]);</div><div class='add'>+</div><div class='add'>+	mxs_timer_init(MX28_INT_TIMER0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/mxs/clk-pll.c b/drivers/clk/mxs/clk-pll.c<br/>new file mode 100644<br/>index 000000000000..fadae41833ec<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/mxs/clk-pll.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk-pll.c</a></div><div class='hunk'>@@ -0,0 +1,116 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct clk_pll - mxs pll clock</div><div class='add'>+ * @hw: clk_hw for the pll</div><div class='add'>+ * @base: base address of the pll</div><div class='add'>+ * @power: the shift of power bit</div><div class='add'>+ * @rate: the clock rate of the pll</div><div class='add'>+ *</div><div class='add'>+ * The mxs pll is a fixed rate clock with power and gate control,</div><div class='add'>+ * and the shift of gate bit is always 31.</div><div class='add'>+ */</div><div class='add'>+struct clk_pll {</div><div class='add'>+	struct clk_hw hw;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	u8 power;</div><div class='add'>+	unsigned long rate;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw)</div><div class='add'>+</div><div class='add'>+static int clk_pll_prepare(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_pll *pll = to_clk_pll(hw);</div><div class='add'>+</div><div class='add'>+	writel_relaxed(1 &lt;&lt; pll-&gt;power, pll-&gt;base + SET);</div><div class='add'>+</div><div class='add'>+	udelay(10);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clk_pll_unprepare(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_pll *pll = to_clk_pll(hw);</div><div class='add'>+</div><div class='add'>+	writel_relaxed(1 &lt;&lt; pll-&gt;power, pll-&gt;base + CLR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_pll_enable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_pll *pll = to_clk_pll(hw);</div><div class='add'>+</div><div class='add'>+	writel_relaxed(1 &lt;&lt; 31, pll-&gt;base + CLR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clk_pll_disable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_pll *pll = to_clk_pll(hw);</div><div class='add'>+</div><div class='add'>+	writel_relaxed(1 &lt;&lt; 31, pll-&gt;base + SET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,</div><div class='add'>+					 unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pll *pll = to_clk_pll(hw);</div><div class='add'>+</div><div class='add'>+	return pll-&gt;rate;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct clk_ops clk_pll_ops = {</div><div class='add'>+	.prepare = clk_pll_prepare,</div><div class='add'>+	.unprepare = clk_pll_unprepare,</div><div class='add'>+	.enable = clk_pll_enable,</div><div class='add'>+	.disable = clk_pll_disable,</div><div class='add'>+	.recalc_rate = clk_pll_recalc_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *mxs_clk_pll(const char *name, const char *parent_name,</div><div class='add'>+			void __iomem *base, u8 power, unsigned long rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pll *pll;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+</div><div class='add'>+	pll = kzalloc(sizeof(*pll), GFP_KERNEL);</div><div class='add'>+	if (!pll)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_pll_ops;</div><div class='add'>+	init.flags = 0;</div><div class='add'>+	init.parent_names = (parent_name ? &amp;parent_name: NULL);</div><div class='add'>+	init.num_parents = (parent_name ? 1 : 0);</div><div class='add'>+</div><div class='add'>+	pll-&gt;base = base;</div><div class='add'>+	pll-&gt;rate = rate;</div><div class='add'>+	pll-&gt;power = power;</div><div class='add'>+	pll-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;pll-&gt;hw);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(pll);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/mxs/clk-ref.c b/drivers/clk/mxs/clk-ref.c<br/>new file mode 100644<br/>index 000000000000..4adeed6c2f94<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/mxs/clk-ref.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk-ref.c</a></div><div class='hunk'>@@ -0,0 +1,154 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct clk_ref - mxs reference clock</div><div class='add'>+ * @hw: clk_hw for the reference clock</div><div class='add'>+ * @reg: register address</div><div class='add'>+ * @idx: the index of the reference clock within the same register</div><div class='add'>+ *</div><div class='add'>+ * The mxs reference clock sources from pll.  Every 4 reference clocks share</div><div class='add'>+ * one register space, and @idx is used to identify them.  Each reference</div><div class='add'>+ * clock has a gate control and a fractional * divider.  The rate is calculated</div><div class='add'>+ * as pll rate  * (18 / FRAC), where FRAC = 18 ~ 35.</div><div class='add'>+ */</div><div class='add'>+struct clk_ref {</div><div class='add'>+	struct clk_hw hw;</div><div class='add'>+	void __iomem *reg;</div><div class='add'>+	u8 idx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define to_clk_ref(_hw) container_of(_hw, struct clk_ref, hw)</div><div class='add'>+</div><div class='add'>+static int clk_ref_enable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_ref *ref = to_clk_ref(hw);</div><div class='add'>+</div><div class='add'>+	writel_relaxed(1 &lt;&lt; ((ref-&gt;idx + 1) * 8 - 1), ref-&gt;reg + CLR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clk_ref_disable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_ref *ref = to_clk_ref(hw);</div><div class='add'>+</div><div class='add'>+	writel_relaxed(1 &lt;&lt; ((ref-&gt;idx + 1) * 8 - 1), ref-&gt;reg + SET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long clk_ref_recalc_rate(struct clk_hw *hw,</div><div class='add'>+					 unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_ref *ref = to_clk_ref(hw);</div><div class='add'>+	u64 tmp = parent_rate;</div><div class='add'>+	u8 frac = (readl_relaxed(ref-&gt;reg) &gt;&gt; (ref-&gt;idx * 8)) &amp; 0x3f;</div><div class='add'>+</div><div class='add'>+	tmp *= 18;</div><div class='add'>+	do_div(tmp, frac);</div><div class='add'>+</div><div class='add'>+	return tmp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_ref_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+			       unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	unsigned long parent_rate = *prate;</div><div class='add'>+	u64 tmp = parent_rate;</div><div class='add'>+	u8 frac;</div><div class='add'>+</div><div class='add'>+	tmp = tmp * 18 + rate / 2;</div><div class='add'>+	do_div(tmp, rate);</div><div class='add'>+	frac = tmp;</div><div class='add'>+</div><div class='add'>+	if (frac &lt; 18)</div><div class='add'>+		frac = 18;</div><div class='add'>+	else if (frac &gt; 35)</div><div class='add'>+		frac = 35;</div><div class='add'>+</div><div class='add'>+	tmp = parent_rate;</div><div class='add'>+	tmp *= 18;</div><div class='add'>+	do_div(tmp, frac);</div><div class='add'>+</div><div class='add'>+	return tmp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_ref_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='add'>+			    unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_ref *ref = to_clk_ref(hw);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u64 tmp = parent_rate;</div><div class='add'>+	u32 val;</div><div class='add'>+	u8 frac, shift = ref-&gt;idx * 8;</div><div class='add'>+</div><div class='add'>+	tmp = tmp * 18 + rate / 2;</div><div class='add'>+	do_div(tmp, rate);</div><div class='add'>+	frac = tmp;</div><div class='add'>+</div><div class='add'>+	if (frac &lt; 18)</div><div class='add'>+		frac = 18;</div><div class='add'>+	else if (frac &gt; 35)</div><div class='add'>+		frac = 35;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;mxs_lock, flags);</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(ref-&gt;reg);</div><div class='add'>+	val &amp;= ~(0x3f &lt;&lt; shift);</div><div class='add'>+	val |= frac &lt;&lt; shift;</div><div class='add'>+	writel_relaxed(val, ref-&gt;reg);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;mxs_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct clk_ops clk_ref_ops = {</div><div class='add'>+	.enable		= clk_ref_enable,</div><div class='add'>+	.disable	= clk_ref_disable,</div><div class='add'>+	.recalc_rate	= clk_ref_recalc_rate,</div><div class='add'>+	.round_rate	= clk_ref_round_rate,</div><div class='add'>+	.set_rate	= clk_ref_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *mxs_clk_ref(const char *name, const char *parent_name,</div><div class='add'>+			void __iomem *reg, u8 idx)</div><div class='add'>+{</div><div class='add'>+	struct clk_ref *ref;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+</div><div class='add'>+	ref = kzalloc(sizeof(*ref), GFP_KERNEL);</div><div class='add'>+	if (!ref)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_ref_ops;</div><div class='add'>+	init.flags = 0;</div><div class='add'>+	init.parent_names = (parent_name ? &amp;parent_name: NULL);</div><div class='add'>+	init.num_parents = (parent_name ? 1 : 0);</div><div class='add'>+</div><div class='add'>+	ref-&gt;reg = reg;</div><div class='add'>+	ref-&gt;idx = idx;</div><div class='add'>+	ref-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;ref-&gt;hw);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		kfree(ref);</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/mxs/clk.c b/drivers/clk/mxs/clk.c<br/>new file mode 100644<br/>index 000000000000..b24d56067c80<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/mxs/clk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk.c</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+</div><div class='add'>+DEFINE_SPINLOCK(mxs_lock);</div><div class='add'>+</div><div class='add'>+int mxs_clk_wait(void __iomem *reg, u8 shift)</div><div class='add'>+{</div><div class='add'>+	unsigned long timeout = jiffies + msecs_to_jiffies(10);</div><div class='add'>+</div><div class='add'>+	while (readl_relaxed(reg) &amp; (1 &lt;&lt; shift))</div><div class='add'>+		if (time_after(jiffies, timeout))</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/mxs/clk.h b/drivers/clk/mxs/clk.h<br/>new file mode 100644<br/>index 000000000000..81421e28e69c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/mxs/clk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/mxs/clk.h</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MXS_CLK_H</div><div class='add'>+#define __MXS_CLK_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+</div><div class='add'>+#define SET	0x4</div><div class='add'>+#define CLR	0x8</div><div class='add'>+</div><div class='add'>+extern spinlock_t mxs_lock;</div><div class='add'>+</div><div class='add'>+int mxs_clk_wait(void __iomem *reg, u8 shift);</div><div class='add'>+</div><div class='add'>+struct clk *mxs_clk_pll(const char *name, const char *parent_name,</div><div class='add'>+			void __iomem *base, u8 power, unsigned long rate);</div><div class='add'>+</div><div class='add'>+struct clk *mxs_clk_ref(const char *name, const char *parent_name,</div><div class='add'>+			void __iomem *reg, u8 idx);</div><div class='add'>+</div><div class='add'>+struct clk *mxs_clk_div(const char *name, const char *parent_name,</div><div class='add'>+			void __iomem *reg, u8 shift, u8 width, u8 busy);</div><div class='add'>+</div><div class='add'>+struct clk *mxs_clk_frac(const char *name, const char *parent_name,</div><div class='add'>+			 void __iomem *reg, u8 shift, u8 width, u8 busy);</div><div class='add'>+</div><div class='add'>+static inline struct clk *mxs_clk_fixed(const char *name, int rate)</div><div class='add'>+{</div><div class='add'>+	return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct clk *mxs_clk_gate(const char *name,</div><div class='add'>+			const char *parent_name, void __iomem *reg, u8 shift)</div><div class='add'>+{</div><div class='add'>+	return clk_register_gate(NULL, name, parent_name, CLK_SET_RATE_PARENT,</div><div class='add'>+				 reg, shift, CLK_GATE_SET_TO_DISABLE,</div><div class='add'>+				 &amp;mxs_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg,</div><div class='add'>+		u8 shift, u8 width, const char **parent_names, int num_parents)</div><div class='add'>+{</div><div class='add'>+	return clk_register_mux(NULL, name, parent_names, num_parents,</div><div class='add'>+				CLK_SET_RATE_PARENT, reg, shift, width,</div><div class='add'>+				0, &amp;mxs_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct clk *mxs_clk_fixed_factor(const char *name,</div><div class='add'>+		const char *parent_name, unsigned int mult, unsigned int div)</div><div class='add'>+{</div><div class='add'>+	return clk_register_fixed_factor(NULL, name, parent_name,</div><div class='add'>+					 CLK_SET_RATE_PARENT, mult, div);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* __MXS_CLK_H */</div><div class='head'>diff --git a/drivers/clk/spear/Makefile b/drivers/clk/spear/Makefile<br/>new file mode 100644<br/>index 000000000000..cdb425d3b8ee<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/spear/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/Makefile</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+#</div><div class='add'>+# SPEAr Clock specific Makefile</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-y	+= clk.o clk-aux-synth.o clk-frac-synth.o clk-gpt-synth.o clk-vco-pll.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_ARCH_SPEAR3XX)	+= spear3xx_clock.o</div><div class='add'>+obj-$(CONFIG_ARCH_SPEAR6XX)	+= spear6xx_clock.o</div><div class='add'>+obj-$(CONFIG_MACH_SPEAR1310)	+= spear1310_clock.o</div><div class='add'>+obj-$(CONFIG_MACH_SPEAR1340)	+= spear1340_clock.o</div><div class='head'>diff --git a/drivers/clk/spear/clk-aux-synth.c b/drivers/clk/spear/clk-aux-synth.c<br/>new file mode 100644<br/>index 000000000000..af34074e702b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/spear/clk-aux-synth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/clk-aux-synth.c</a></div><div class='hunk'>@@ -0,0 +1,198 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * Auxiliary Synthesizer clock implementation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "clk-aux-synth: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DOC: Auxiliary Synthesizer clock</div><div class='add'>+ *</div><div class='add'>+ * Aux synth gives rate for different values of eq, x and y</div><div class='add'>+ *</div><div class='add'>+ * Fout from synthesizer can be given from two equations:</div><div class='add'>+ * Fout1 = (Fin * X/Y)/2		EQ1</div><div class='add'>+ * Fout2 = Fin * X/Y			EQ2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define to_clk_aux(_hw) container_of(_hw, struct clk_aux, hw)</div><div class='add'>+</div><div class='add'>+static struct aux_clk_masks default_aux_masks = {</div><div class='add'>+	.eq_sel_mask = AUX_EQ_SEL_MASK,</div><div class='add'>+	.eq_sel_shift = AUX_EQ_SEL_SHIFT,</div><div class='add'>+	.eq1_mask = AUX_EQ1_SEL,</div><div class='add'>+	.eq2_mask = AUX_EQ2_SEL,</div><div class='add'>+	.xscale_sel_mask = AUX_XSCALE_MASK,</div><div class='add'>+	.xscale_sel_shift = AUX_XSCALE_SHIFT,</div><div class='add'>+	.yscale_sel_mask = AUX_YSCALE_MASK,</div><div class='add'>+	.yscale_sel_shift = AUX_YSCALE_SHIFT,</div><div class='add'>+	.enable_bit = AUX_SYNT_ENB,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned long aux_calc_rate(struct clk_hw *hw, unsigned long prate,</div><div class='add'>+		int index)</div><div class='add'>+{</div><div class='add'>+	struct clk_aux *aux = to_clk_aux(hw);</div><div class='add'>+	struct aux_rate_tbl *rtbl = aux-&gt;rtbl;</div><div class='add'>+	u8 eq = rtbl[index].eq ? 1 : 2;</div><div class='add'>+</div><div class='add'>+	return (((prate / 10000) * rtbl[index].xscale) /</div><div class='add'>+			(rtbl[index].yscale * eq)) * 10000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_aux_round_rate(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+		unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_aux *aux = to_clk_aux(hw);</div><div class='add'>+	int unused;</div><div class='add'>+</div><div class='add'>+	return clk_round_rate_index(hw, drate, *prate, aux_calc_rate,</div><div class='add'>+			aux-&gt;rtbl_cnt, &amp;unused);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long clk_aux_recalc_rate(struct clk_hw *hw,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_aux *aux = to_clk_aux(hw);</div><div class='add'>+	unsigned int num = 1, den = 1, val, eqn;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+</div><div class='add'>+	if (aux-&gt;lock)</div><div class='add'>+		spin_lock_irqsave(aux-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(aux-&gt;reg);</div><div class='add'>+</div><div class='add'>+	if (aux-&gt;lock)</div><div class='add'>+		spin_unlock_irqrestore(aux-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	eqn = (val &gt;&gt; aux-&gt;masks-&gt;eq_sel_shift) &amp; aux-&gt;masks-&gt;eq_sel_mask;</div><div class='add'>+	if (eqn == aux-&gt;masks-&gt;eq1_mask)</div><div class='add'>+		den = 2;</div><div class='add'>+</div><div class='add'>+	/* calculate numerator */</div><div class='add'>+	num = (val &gt;&gt; aux-&gt;masks-&gt;xscale_sel_shift) &amp;</div><div class='add'>+		aux-&gt;masks-&gt;xscale_sel_mask;</div><div class='add'>+</div><div class='add'>+	/* calculate denominator */</div><div class='add'>+	den *= (val &gt;&gt; aux-&gt;masks-&gt;yscale_sel_shift) &amp;</div><div class='add'>+		aux-&gt;masks-&gt;yscale_sel_mask;</div><div class='add'>+</div><div class='add'>+	if (!den)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return (((parent_rate / 10000) * num) / den) * 10000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configures new clock rate of aux */</div><div class='add'>+static int clk_aux_set_rate(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+				unsigned long prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_aux *aux = to_clk_aux(hw);</div><div class='add'>+	struct aux_rate_tbl *rtbl = aux-&gt;rtbl;</div><div class='add'>+	unsigned long val, flags = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk_round_rate_index(hw, drate, prate, aux_calc_rate, aux-&gt;rtbl_cnt,</div><div class='add'>+			&amp;i);</div><div class='add'>+</div><div class='add'>+	if (aux-&gt;lock)</div><div class='add'>+		spin_lock_irqsave(aux-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(aux-&gt;reg) &amp;</div><div class='add'>+		~(aux-&gt;masks-&gt;eq_sel_mask &lt;&lt; aux-&gt;masks-&gt;eq_sel_shift);</div><div class='add'>+	val |= (rtbl[i].eq &amp; aux-&gt;masks-&gt;eq_sel_mask) &lt;&lt;</div><div class='add'>+		aux-&gt;masks-&gt;eq_sel_shift;</div><div class='add'>+	val &amp;= ~(aux-&gt;masks-&gt;xscale_sel_mask &lt;&lt; aux-&gt;masks-&gt;xscale_sel_shift);</div><div class='add'>+	val |= (rtbl[i].xscale &amp; aux-&gt;masks-&gt;xscale_sel_mask) &lt;&lt;</div><div class='add'>+		aux-&gt;masks-&gt;xscale_sel_shift;</div><div class='add'>+	val &amp;= ~(aux-&gt;masks-&gt;yscale_sel_mask &lt;&lt; aux-&gt;masks-&gt;yscale_sel_shift);</div><div class='add'>+	val |= (rtbl[i].yscale &amp; aux-&gt;masks-&gt;yscale_sel_mask) &lt;&lt;</div><div class='add'>+		aux-&gt;masks-&gt;yscale_sel_shift;</div><div class='add'>+	writel_relaxed(val, aux-&gt;reg);</div><div class='add'>+</div><div class='add'>+	if (aux-&gt;lock)</div><div class='add'>+		spin_unlock_irqrestore(aux-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_ops clk_aux_ops = {</div><div class='add'>+	.recalc_rate = clk_aux_recalc_rate,</div><div class='add'>+	.round_rate = clk_aux_round_rate,</div><div class='add'>+	.set_rate = clk_aux_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *clk_register_aux(const char *aux_name, const char *gate_name,</div><div class='add'>+		const char *parent_name, unsigned long flags, void __iomem *reg,</div><div class='add'>+		struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl,</div><div class='add'>+		u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk)</div><div class='add'>+{</div><div class='add'>+	struct clk_aux *aux;</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+</div><div class='add'>+	if (!aux_name || !parent_name || !reg || !rtbl || !rtbl_cnt) {</div><div class='add'>+		pr_err("Invalid arguments passed");</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aux = kzalloc(sizeof(*aux), GFP_KERNEL);</div><div class='add'>+	if (!aux) {</div><div class='add'>+		pr_err("could not allocate aux clk\n");</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* struct clk_aux assignments */</div><div class='add'>+	if (!masks)</div><div class='add'>+		aux-&gt;masks = &amp;default_aux_masks;</div><div class='add'>+	else</div><div class='add'>+		aux-&gt;masks = masks;</div><div class='add'>+</div><div class='add'>+	aux-&gt;reg = reg;</div><div class='add'>+	aux-&gt;rtbl = rtbl;</div><div class='add'>+	aux-&gt;rtbl_cnt = rtbl_cnt;</div><div class='add'>+	aux-&gt;lock = lock;</div><div class='add'>+	aux-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	init.name = aux_name;</div><div class='add'>+	init.ops = &amp;clk_aux_ops;</div><div class='add'>+	init.flags = flags;</div><div class='add'>+	init.parent_names = &amp;parent_name;</div><div class='add'>+	init.num_parents = 1;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;aux-&gt;hw);</div><div class='add'>+	if (IS_ERR_OR_NULL(clk))</div><div class='add'>+		goto free_aux;</div><div class='add'>+</div><div class='add'>+	if (gate_name) {</div><div class='add'>+		struct clk *tgate_clk;</div><div class='add'>+</div><div class='add'>+		tgate_clk = clk_register_gate(NULL, gate_name, aux_name, 0, reg,</div><div class='add'>+				aux-&gt;masks-&gt;enable_bit, 0, lock);</div><div class='add'>+		if (IS_ERR_OR_NULL(tgate_clk))</div><div class='add'>+			goto free_aux;</div><div class='add'>+</div><div class='add'>+		if (gate_clk)</div><div class='add'>+			*gate_clk = tgate_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return clk;</div><div class='add'>+</div><div class='add'>+free_aux:</div><div class='add'>+	kfree(aux);</div><div class='add'>+	pr_err("clk register failed\n");</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/spear/clk-frac-synth.c b/drivers/clk/spear/clk-frac-synth.c<br/>new file mode 100644<br/>index 000000000000..4dbdb3fe18e0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/spear/clk-frac-synth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/clk-frac-synth.c</a></div><div class='hunk'>@@ -0,0 +1,165 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * Fractional Synthesizer clock implementation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "clk-frac-synth: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+#define DIV_FACTOR_MASK		0x1FFFF</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DOC: Fractional Synthesizer clock</div><div class='add'>+ *</div><div class='add'>+ * Fout from synthesizer can be given from below equation:</div><div class='add'>+ *</div><div class='add'>+ * Fout= Fin/2*div (division factor)</div><div class='add'>+ * div is 17 bits:-</div><div class='add'>+ *	0-13 (fractional part)</div><div class='add'>+ *	14-16 (integer part)</div><div class='add'>+ *	div is (16-14 bits).(13-0 bits) (in binary)</div><div class='add'>+ *</div><div class='add'>+ *	Fout = Fin/(2 * div)</div><div class='add'>+ *	Fout = ((Fin / 10000)/(2 * div)) * 10000</div><div class='add'>+ *	Fout = (2^14 * (Fin / 10000)/(2^14 * (2 * div))) * 10000</div><div class='add'>+ *	Fout = (((Fin / 10000) &lt;&lt; 14)/(2 * (div &lt;&lt; 14))) * 10000</div><div class='add'>+ *</div><div class='add'>+ * div &lt;&lt; 14 simply 17 bit value written at register.</div><div class='add'>+ * Max error due to scaling down by 10000 is 10 KHz</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define to_clk_frac(_hw) container_of(_hw, struct clk_frac, hw)</div><div class='add'>+</div><div class='add'>+static unsigned long frac_calc_rate(struct clk_hw *hw, unsigned long prate,</div><div class='add'>+		int index)</div><div class='add'>+{</div><div class='add'>+	struct clk_frac *frac = to_clk_frac(hw);</div><div class='add'>+	struct frac_rate_tbl *rtbl = frac-&gt;rtbl;</div><div class='add'>+</div><div class='add'>+	prate /= 10000;</div><div class='add'>+	prate &lt;&lt;= 14;</div><div class='add'>+	prate /= (2 * rtbl[index].div);</div><div class='add'>+	prate *= 10000;</div><div class='add'>+</div><div class='add'>+	return prate;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_frac_round_rate(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+		unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_frac *frac = to_clk_frac(hw);</div><div class='add'>+	int unused;</div><div class='add'>+</div><div class='add'>+	return clk_round_rate_index(hw, drate, *prate, frac_calc_rate,</div><div class='add'>+			frac-&gt;rtbl_cnt, &amp;unused);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long clk_frac_recalc_rate(struct clk_hw *hw,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_frac *frac = to_clk_frac(hw);</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	unsigned int div = 1, val;</div><div class='add'>+</div><div class='add'>+	if (frac-&gt;lock)</div><div class='add'>+		spin_lock_irqsave(frac-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(frac-&gt;reg);</div><div class='add'>+</div><div class='add'>+	if (frac-&gt;lock)</div><div class='add'>+		spin_unlock_irqrestore(frac-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	div = val &amp; DIV_FACTOR_MASK;</div><div class='add'>+</div><div class='add'>+	if (!div)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	parent_rate = parent_rate / 10000;</div><div class='add'>+</div><div class='add'>+	parent_rate = (parent_rate &lt;&lt; 14) / (2 * div);</div><div class='add'>+	return parent_rate * 10000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configures new clock rate of frac */</div><div class='add'>+static int clk_frac_set_rate(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+				unsigned long prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_frac *frac = to_clk_frac(hw);</div><div class='add'>+	struct frac_rate_tbl *rtbl = frac-&gt;rtbl;</div><div class='add'>+	unsigned long flags = 0, val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk_round_rate_index(hw, drate, prate, frac_calc_rate, frac-&gt;rtbl_cnt,</div><div class='add'>+			&amp;i);</div><div class='add'>+</div><div class='add'>+	if (frac-&gt;lock)</div><div class='add'>+		spin_lock_irqsave(frac-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(frac-&gt;reg) &amp; ~DIV_FACTOR_MASK;</div><div class='add'>+	val |= rtbl[i].div &amp; DIV_FACTOR_MASK;</div><div class='add'>+	writel_relaxed(val, frac-&gt;reg);</div><div class='add'>+</div><div class='add'>+	if (frac-&gt;lock)</div><div class='add'>+		spin_unlock_irqrestore(frac-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct clk_ops clk_frac_ops = {</div><div class='add'>+	.recalc_rate = clk_frac_recalc_rate,</div><div class='add'>+	.round_rate = clk_frac_round_rate,</div><div class='add'>+	.set_rate = clk_frac_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *clk_register_frac(const char *name, const char *parent_name,</div><div class='add'>+		unsigned long flags, void __iomem *reg,</div><div class='add'>+		struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock)</div><div class='add'>+{</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+	struct clk_frac *frac;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+</div><div class='add'>+	if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) {</div><div class='add'>+		pr_err("Invalid arguments passed");</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	frac = kzalloc(sizeof(*frac), GFP_KERNEL);</div><div class='add'>+	if (!frac) {</div><div class='add'>+		pr_err("could not allocate frac clk\n");</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* struct clk_frac assignments */</div><div class='add'>+	frac-&gt;reg = reg;</div><div class='add'>+	frac-&gt;rtbl = rtbl;</div><div class='add'>+	frac-&gt;rtbl_cnt = rtbl_cnt;</div><div class='add'>+	frac-&gt;lock = lock;</div><div class='add'>+	frac-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_frac_ops;</div><div class='add'>+	init.flags = flags;</div><div class='add'>+	init.parent_names = &amp;parent_name;</div><div class='add'>+	init.num_parents = 1;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;frac-&gt;hw);</div><div class='add'>+	if (!IS_ERR_OR_NULL(clk))</div><div class='add'>+		return clk;</div><div class='add'>+</div><div class='add'>+	pr_err("clk register failed\n");</div><div class='add'>+	kfree(frac);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/spear/clk-gpt-synth.c b/drivers/clk/spear/clk-gpt-synth.c<br/>new file mode 100644<br/>index 000000000000..b471c9762a97<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/spear/clk-gpt-synth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/clk-gpt-synth.c</a></div><div class='hunk'>@@ -0,0 +1,154 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * General Purpose Timer Synthesizer clock implementation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "clk-gpt-synth: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+#define GPT_MSCALE_MASK		0xFFF</div><div class='add'>+#define GPT_NSCALE_SHIFT	12</div><div class='add'>+#define GPT_NSCALE_MASK		0xF</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DOC: General Purpose Timer Synthesizer clock</div><div class='add'>+ *</div><div class='add'>+ * Calculates gpt synth clk rate for different values of mscale and nscale</div><div class='add'>+ *</div><div class='add'>+ * Fout= Fin/((2 ^ (N+1)) * (M+1))</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define to_clk_gpt(_hw) container_of(_hw, struct clk_gpt, hw)</div><div class='add'>+</div><div class='add'>+static unsigned long gpt_calc_rate(struct clk_hw *hw, unsigned long prate,</div><div class='add'>+		int index)</div><div class='add'>+{</div><div class='add'>+	struct clk_gpt *gpt = to_clk_gpt(hw);</div><div class='add'>+	struct gpt_rate_tbl *rtbl = gpt-&gt;rtbl;</div><div class='add'>+</div><div class='add'>+	prate /= ((1 &lt;&lt; (rtbl[index].nscale + 1)) * (rtbl[index].mscale + 1));</div><div class='add'>+</div><div class='add'>+	return prate;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_gpt_round_rate(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+		unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_gpt *gpt = to_clk_gpt(hw);</div><div class='add'>+	int unused;</div><div class='add'>+</div><div class='add'>+	return clk_round_rate_index(hw, drate, *prate, gpt_calc_rate,</div><div class='add'>+			gpt-&gt;rtbl_cnt, &amp;unused);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long clk_gpt_recalc_rate(struct clk_hw *hw,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_gpt *gpt = to_clk_gpt(hw);</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	unsigned int div = 1, val;</div><div class='add'>+</div><div class='add'>+	if (gpt-&gt;lock)</div><div class='add'>+		spin_lock_irqsave(gpt-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(gpt-&gt;reg);</div><div class='add'>+</div><div class='add'>+	if (gpt-&gt;lock)</div><div class='add'>+		spin_unlock_irqrestore(gpt-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	div += val &amp; GPT_MSCALE_MASK;</div><div class='add'>+	div *= 1 &lt;&lt; (((val &gt;&gt; GPT_NSCALE_SHIFT) &amp; GPT_NSCALE_MASK) + 1);</div><div class='add'>+</div><div class='add'>+	if (!div)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return parent_rate / div;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configures new clock rate of gpt */</div><div class='add'>+static int clk_gpt_set_rate(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+				unsigned long prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_gpt *gpt = to_clk_gpt(hw);</div><div class='add'>+	struct gpt_rate_tbl *rtbl = gpt-&gt;rtbl;</div><div class='add'>+	unsigned long flags = 0, val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk_round_rate_index(hw, drate, prate, gpt_calc_rate, gpt-&gt;rtbl_cnt,</div><div class='add'>+			&amp;i);</div><div class='add'>+</div><div class='add'>+	if (gpt-&gt;lock)</div><div class='add'>+		spin_lock_irqsave(gpt-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	val = readl(gpt-&gt;reg) &amp; ~GPT_MSCALE_MASK;</div><div class='add'>+	val &amp;= ~(GPT_NSCALE_MASK &lt;&lt; GPT_NSCALE_SHIFT);</div><div class='add'>+</div><div class='add'>+	val |= rtbl[i].mscale &amp; GPT_MSCALE_MASK;</div><div class='add'>+	val |= (rtbl[i].nscale &amp; GPT_NSCALE_MASK) &lt;&lt; GPT_NSCALE_SHIFT;</div><div class='add'>+</div><div class='add'>+	writel_relaxed(val, gpt-&gt;reg);</div><div class='add'>+</div><div class='add'>+	if (gpt-&gt;lock)</div><div class='add'>+		spin_unlock_irqrestore(gpt-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_ops clk_gpt_ops = {</div><div class='add'>+	.recalc_rate = clk_gpt_recalc_rate,</div><div class='add'>+	.round_rate = clk_gpt_round_rate,</div><div class='add'>+	.set_rate = clk_gpt_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned</div><div class='add'>+		long flags, void __iomem *reg, struct gpt_rate_tbl *rtbl, u8</div><div class='add'>+		rtbl_cnt, spinlock_t *lock)</div><div class='add'>+{</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+	struct clk_gpt *gpt;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+</div><div class='add'>+	if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) {</div><div class='add'>+		pr_err("Invalid arguments passed");</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gpt = kzalloc(sizeof(*gpt), GFP_KERNEL);</div><div class='add'>+	if (!gpt) {</div><div class='add'>+		pr_err("could not allocate gpt clk\n");</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* struct clk_gpt assignments */</div><div class='add'>+	gpt-&gt;reg = reg;</div><div class='add'>+	gpt-&gt;rtbl = rtbl;</div><div class='add'>+	gpt-&gt;rtbl_cnt = rtbl_cnt;</div><div class='add'>+	gpt-&gt;lock = lock;</div><div class='add'>+	gpt-&gt;hw.init = &amp;init;</div><div class='add'>+</div><div class='add'>+	init.name = name;</div><div class='add'>+	init.ops = &amp;clk_gpt_ops;</div><div class='add'>+	init.flags = flags;</div><div class='add'>+	init.parent_names = &amp;parent_name;</div><div class='add'>+	init.num_parents = 1;</div><div class='add'>+</div><div class='add'>+	clk = clk_register(NULL, &amp;gpt-&gt;hw);</div><div class='add'>+	if (!IS_ERR_OR_NULL(clk))</div><div class='add'>+		return clk;</div><div class='add'>+</div><div class='add'>+	pr_err("clk register failed\n");</div><div class='add'>+	kfree(gpt);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/spear/clk-vco-pll.c b/drivers/clk/spear/clk-vco-pll.c<br/>new file mode 100644<br/>index 000000000000..dcd4bdf4b0d9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/spear/clk-vco-pll.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/clk-vco-pll.c</a></div><div class='hunk'>@@ -0,0 +1,363 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * VCO-PLL clock implementation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "clk-vco-pll: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DOC: VCO-PLL clock</div><div class='add'>+ *</div><div class='add'>+ * VCO and PLL rate are derived from following equations:</div><div class='add'>+ *</div><div class='add'>+ * In normal mode</div><div class='add'>+ * vco = (2 * M[15:8] * Fin)/N</div><div class='add'>+ *</div><div class='add'>+ * In Dithered mode</div><div class='add'>+ * vco = (2 * M[15:0] * Fin)/(256 * N)</div><div class='add'>+ *</div><div class='add'>+ * pll_rate = pll/2^p</div><div class='add'>+ *</div><div class='add'>+ * vco and pll are very closely bound to each other, "vco needs to program:</div><div class='add'>+ * mode, m &amp; n" and "pll needs to program p", both share common enable/disable</div><div class='add'>+ * logic.</div><div class='add'>+ *</div><div class='add'>+ * clk_register_vco_pll() registers instances of both vco &amp; pll.</div><div class='add'>+ * CLK_SET_RATE_PARENT flag is forced for pll, as it will always pass its</div><div class='add'>+ * set_rate to vco. A single rate table exists for both the clocks, which</div><div class='add'>+ * configures m, n and p.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* PLL_CTR register masks */</div><div class='add'>+#define PLL_MODE_NORMAL		0</div><div class='add'>+#define PLL_MODE_FRACTION	1</div><div class='add'>+#define PLL_MODE_DITH_DSM	2</div><div class='add'>+#define PLL_MODE_DITH_SSM	3</div><div class='add'>+#define PLL_MODE_MASK		3</div><div class='add'>+#define PLL_MODE_SHIFT		3</div><div class='add'>+#define PLL_ENABLE		2</div><div class='add'>+</div><div class='add'>+#define PLL_LOCK_SHIFT		0</div><div class='add'>+#define PLL_LOCK_MASK		1</div><div class='add'>+</div><div class='add'>+/* PLL FRQ register masks */</div><div class='add'>+#define PLL_NORM_FDBK_M_MASK	0xFF</div><div class='add'>+#define PLL_NORM_FDBK_M_SHIFT	24</div><div class='add'>+#define PLL_DITH_FDBK_M_MASK	0xFFFF</div><div class='add'>+#define PLL_DITH_FDBK_M_SHIFT	16</div><div class='add'>+#define PLL_DIV_P_MASK		0x7</div><div class='add'>+#define PLL_DIV_P_SHIFT		8</div><div class='add'>+#define PLL_DIV_N_MASK		0xFF</div><div class='add'>+#define PLL_DIV_N_SHIFT		0</div><div class='add'>+</div><div class='add'>+#define to_clk_vco(_hw) container_of(_hw, struct clk_vco, hw)</div><div class='add'>+#define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw)</div><div class='add'>+</div><div class='add'>+/* Calculates pll clk rate for specific value of mode, m, n and p */</div><div class='add'>+static unsigned long pll_calc_rate(struct pll_rate_tbl *rtbl,</div><div class='add'>+		unsigned long prate, int index, unsigned long *pll_rate)</div><div class='add'>+{</div><div class='add'>+	unsigned long rate = prate;</div><div class='add'>+	unsigned int mode;</div><div class='add'>+</div><div class='add'>+	mode = rtbl[index].mode ? 256 : 1;</div><div class='add'>+	rate = (((2 * rate / 10000) * rtbl[index].m) / (mode * rtbl[index].n));</div><div class='add'>+</div><div class='add'>+	if (pll_rate)</div><div class='add'>+		*pll_rate = (rate / (1 &lt;&lt; rtbl[index].p)) * 10000;</div><div class='add'>+</div><div class='add'>+	return rate * 10000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_pll_round_rate_index(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+				unsigned long *prate, int *index)</div><div class='add'>+{</div><div class='add'>+	struct clk_pll *pll = to_clk_pll(hw);</div><div class='add'>+	unsigned long prev_rate, vco_prev_rate, rate = 0;</div><div class='add'>+	unsigned long vco_parent_rate =</div><div class='add'>+		__clk_get_rate(__clk_get_parent(__clk_get_parent(hw-&gt;clk)));</div><div class='add'>+</div><div class='add'>+	if (!prate) {</div><div class='add'>+		pr_err("%s: prate is must for pll clk\n", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (*index = 0; *index &lt; pll-&gt;vco-&gt;rtbl_cnt; (*index)++) {</div><div class='add'>+		prev_rate = rate;</div><div class='add'>+		vco_prev_rate = *prate;</div><div class='add'>+		*prate = pll_calc_rate(pll-&gt;vco-&gt;rtbl, vco_parent_rate, *index,</div><div class='add'>+				&amp;rate);</div><div class='add'>+		if (drate &lt; rate) {</div><div class='add'>+			/* previous clock was best */</div><div class='add'>+			if (*index) {</div><div class='add'>+				rate = prev_rate;</div><div class='add'>+				*prate = vco_prev_rate;</div><div class='add'>+				(*index)--;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rate;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_pll_round_rate(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+				unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	int unused;</div><div class='add'>+</div><div class='add'>+	return clk_pll_round_rate_index(hw, drate, prate, &amp;unused);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long clk_pll_recalc_rate(struct clk_hw *hw, unsigned long</div><div class='add'>+		parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pll *pll = to_clk_pll(hw);</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	unsigned int p;</div><div class='add'>+</div><div class='add'>+	if (pll-&gt;vco-&gt;lock)</div><div class='add'>+		spin_lock_irqsave(pll-&gt;vco-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	p = readl_relaxed(pll-&gt;vco-&gt;cfg_reg);</div><div class='add'>+</div><div class='add'>+	if (pll-&gt;vco-&gt;lock)</div><div class='add'>+		spin_unlock_irqrestore(pll-&gt;vco-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	p = (p &gt;&gt; PLL_DIV_P_SHIFT) &amp; PLL_DIV_P_MASK;</div><div class='add'>+</div><div class='add'>+	return parent_rate / (1 &lt;&lt; p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clk_pll_set_rate(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+				unsigned long prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_pll *pll = to_clk_pll(hw);</div><div class='add'>+	struct pll_rate_tbl *rtbl = pll-&gt;vco-&gt;rtbl;</div><div class='add'>+	unsigned long flags = 0, val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk_pll_round_rate_index(hw, drate, NULL, &amp;i);</div><div class='add'>+</div><div class='add'>+	if (pll-&gt;vco-&gt;lock)</div><div class='add'>+		spin_lock_irqsave(pll-&gt;vco-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(pll-&gt;vco-&gt;cfg_reg);</div><div class='add'>+	val &amp;= ~(PLL_DIV_P_MASK &lt;&lt; PLL_DIV_P_SHIFT);</div><div class='add'>+	val |= (rtbl[i].p &amp; PLL_DIV_P_MASK) &lt;&lt; PLL_DIV_P_SHIFT;</div><div class='add'>+	writel_relaxed(val, pll-&gt;vco-&gt;cfg_reg);</div><div class='add'>+</div><div class='add'>+	if (pll-&gt;vco-&gt;lock)</div><div class='add'>+		spin_unlock_irqrestore(pll-&gt;vco-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_ops clk_pll_ops = {</div><div class='add'>+	.recalc_rate = clk_pll_recalc_rate,</div><div class='add'>+	.round_rate = clk_pll_round_rate,</div><div class='add'>+	.set_rate = clk_pll_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline unsigned long vco_calc_rate(struct clk_hw *hw,</div><div class='add'>+		unsigned long prate, int index)</div><div class='add'>+{</div><div class='add'>+	struct clk_vco *vco = to_clk_vco(hw);</div><div class='add'>+</div><div class='add'>+	return pll_calc_rate(vco-&gt;rtbl, prate, index, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long clk_vco_round_rate(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+		unsigned long *prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_vco *vco = to_clk_vco(hw);</div><div class='add'>+	int unused;</div><div class='add'>+</div><div class='add'>+	return clk_round_rate_index(hw, drate, *prate, vco_calc_rate,</div><div class='add'>+			vco-&gt;rtbl_cnt, &amp;unused);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long clk_vco_recalc_rate(struct clk_hw *hw,</div><div class='add'>+		unsigned long parent_rate)</div><div class='add'>+{</div><div class='add'>+	struct clk_vco *vco = to_clk_vco(hw);</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	unsigned int num = 2, den = 0, val, mode = 0;</div><div class='add'>+</div><div class='add'>+	if (vco-&gt;lock)</div><div class='add'>+		spin_lock_irqsave(vco-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	mode = (readl_relaxed(vco-&gt;mode_reg) &gt;&gt; PLL_MODE_SHIFT) &amp; PLL_MODE_MASK;</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(vco-&gt;cfg_reg);</div><div class='add'>+</div><div class='add'>+	if (vco-&gt;lock)</div><div class='add'>+		spin_unlock_irqrestore(vco-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	den = (val &gt;&gt; PLL_DIV_N_SHIFT) &amp; PLL_DIV_N_MASK;</div><div class='add'>+</div><div class='add'>+	/* calculate numerator &amp; denominator */</div><div class='add'>+	if (!mode) {</div><div class='add'>+		/* Normal mode */</div><div class='add'>+		num *= (val &gt;&gt; PLL_NORM_FDBK_M_SHIFT) &amp; PLL_NORM_FDBK_M_MASK;</div><div class='add'>+	} else {</div><div class='add'>+		/* Dithered mode */</div><div class='add'>+		num *= (val &gt;&gt; PLL_DITH_FDBK_M_SHIFT) &amp; PLL_DITH_FDBK_M_MASK;</div><div class='add'>+		den *= 256;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!den) {</div><div class='add'>+		WARN(1, "%s: denominator can't be zero\n", __func__);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return (((parent_rate / 10000) * num) / den) * 10000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configures new clock rate of vco */</div><div class='add'>+static int clk_vco_set_rate(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+				unsigned long prate)</div><div class='add'>+{</div><div class='add'>+	struct clk_vco *vco = to_clk_vco(hw);</div><div class='add'>+	struct pll_rate_tbl *rtbl = vco-&gt;rtbl;</div><div class='add'>+	unsigned long flags = 0, val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	clk_round_rate_index(hw, drate, prate, vco_calc_rate, vco-&gt;rtbl_cnt,</div><div class='add'>+			&amp;i);</div><div class='add'>+</div><div class='add'>+	if (vco-&gt;lock)</div><div class='add'>+		spin_lock_irqsave(vco-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(vco-&gt;mode_reg);</div><div class='add'>+	val &amp;= ~(PLL_MODE_MASK &lt;&lt; PLL_MODE_SHIFT);</div><div class='add'>+	val |= (rtbl[i].mode &amp; PLL_MODE_MASK) &lt;&lt; PLL_MODE_SHIFT;</div><div class='add'>+	writel_relaxed(val, vco-&gt;mode_reg);</div><div class='add'>+</div><div class='add'>+	val = readl_relaxed(vco-&gt;cfg_reg);</div><div class='add'>+	val &amp;= ~(PLL_DIV_N_MASK &lt;&lt; PLL_DIV_N_SHIFT);</div><div class='add'>+	val |= (rtbl[i].n &amp; PLL_DIV_N_MASK) &lt;&lt; PLL_DIV_N_SHIFT;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~(PLL_DITH_FDBK_M_MASK &lt;&lt; PLL_DITH_FDBK_M_SHIFT);</div><div class='add'>+	if (rtbl[i].mode)</div><div class='add'>+		val |= (rtbl[i].m &amp; PLL_DITH_FDBK_M_MASK) &lt;&lt;</div><div class='add'>+			PLL_DITH_FDBK_M_SHIFT;</div><div class='add'>+	else</div><div class='add'>+		val |= (rtbl[i].m &amp; PLL_NORM_FDBK_M_MASK) &lt;&lt;</div><div class='add'>+			PLL_NORM_FDBK_M_SHIFT;</div><div class='add'>+</div><div class='add'>+	writel_relaxed(val, vco-&gt;cfg_reg);</div><div class='add'>+</div><div class='add'>+	if (vco-&gt;lock)</div><div class='add'>+		spin_unlock_irqrestore(vco-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct clk_ops clk_vco_ops = {</div><div class='add'>+	.recalc_rate = clk_vco_recalc_rate,</div><div class='add'>+	.round_rate = clk_vco_round_rate,</div><div class='add'>+	.set_rate = clk_vco_set_rate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name,</div><div class='add'>+		const char *vco_gate_name, const char *parent_name,</div><div class='add'>+		unsigned long flags, void __iomem *mode_reg, void __iomem</div><div class='add'>+		*cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt,</div><div class='add'>+		spinlock_t *lock, struct clk **pll_clk,</div><div class='add'>+		struct clk **vco_gate_clk)</div><div class='add'>+{</div><div class='add'>+	struct clk_vco *vco;</div><div class='add'>+	struct clk_pll *pll;</div><div class='add'>+	struct clk *vco_clk, *tpll_clk, *tvco_gate_clk;</div><div class='add'>+	struct clk_init_data vco_init, pll_init;</div><div class='add'>+	const char **vco_parent_name;</div><div class='add'>+</div><div class='add'>+	if (!vco_name || !pll_name || !parent_name || !mode_reg || !cfg_reg ||</div><div class='add'>+			!rtbl || !rtbl_cnt) {</div><div class='add'>+		pr_err("Invalid arguments passed");</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vco = kzalloc(sizeof(*vco), GFP_KERNEL);</div><div class='add'>+	if (!vco) {</div><div class='add'>+		pr_err("could not allocate vco clk\n");</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pll = kzalloc(sizeof(*pll), GFP_KERNEL);</div><div class='add'>+	if (!pll) {</div><div class='add'>+		pr_err("could not allocate pll clk\n");</div><div class='add'>+		goto free_vco;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* struct clk_vco assignments */</div><div class='add'>+	vco-&gt;mode_reg = mode_reg;</div><div class='add'>+	vco-&gt;cfg_reg = cfg_reg;</div><div class='add'>+	vco-&gt;rtbl = rtbl;</div><div class='add'>+	vco-&gt;rtbl_cnt = rtbl_cnt;</div><div class='add'>+	vco-&gt;lock = lock;</div><div class='add'>+	vco-&gt;hw.init = &amp;vco_init;</div><div class='add'>+</div><div class='add'>+	pll-&gt;vco = vco;</div><div class='add'>+	pll-&gt;hw.init = &amp;pll_init;</div><div class='add'>+</div><div class='add'>+	if (vco_gate_name) {</div><div class='add'>+		tvco_gate_clk = clk_register_gate(NULL, vco_gate_name,</div><div class='add'>+				parent_name, 0, mode_reg, PLL_ENABLE, 0, lock);</div><div class='add'>+		if (IS_ERR_OR_NULL(tvco_gate_clk))</div><div class='add'>+			goto free_pll;</div><div class='add'>+</div><div class='add'>+		if (vco_gate_clk)</div><div class='add'>+			*vco_gate_clk = tvco_gate_clk;</div><div class='add'>+		vco_parent_name = &amp;vco_gate_name;</div><div class='add'>+	} else {</div><div class='add'>+		vco_parent_name = &amp;parent_name;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vco_init.name = vco_name;</div><div class='add'>+	vco_init.ops = &amp;clk_vco_ops;</div><div class='add'>+	vco_init.flags = flags;</div><div class='add'>+	vco_init.parent_names = vco_parent_name;</div><div class='add'>+	vco_init.num_parents = 1;</div><div class='add'>+</div><div class='add'>+	pll_init.name = pll_name;</div><div class='add'>+	pll_init.ops = &amp;clk_pll_ops;</div><div class='add'>+	pll_init.flags = CLK_SET_RATE_PARENT;</div><div class='add'>+	pll_init.parent_names = &amp;vco_name;</div><div class='add'>+	pll_init.num_parents = 1;</div><div class='add'>+</div><div class='add'>+	vco_clk = clk_register(NULL, &amp;vco-&gt;hw);</div><div class='add'>+	if (IS_ERR_OR_NULL(vco_clk))</div><div class='add'>+		goto free_pll;</div><div class='add'>+</div><div class='add'>+	tpll_clk = clk_register(NULL, &amp;pll-&gt;hw);</div><div class='add'>+	if (IS_ERR_OR_NULL(tpll_clk))</div><div class='add'>+		goto free_pll;</div><div class='add'>+</div><div class='add'>+	if (pll_clk)</div><div class='add'>+		*pll_clk = tpll_clk;</div><div class='add'>+</div><div class='add'>+	return vco_clk;</div><div class='add'>+</div><div class='add'>+free_pll:</div><div class='add'>+	kfree(pll);</div><div class='add'>+free_vco:</div><div class='add'>+	kfree(vco);</div><div class='add'>+</div><div class='add'>+	pr_err("Failed to register vco pll clock\n");</div><div class='add'>+</div><div class='add'>+	return ERR_PTR(-ENOMEM);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/spear/clk.c b/drivers/clk/spear/clk.c<br/>new file mode 100644<br/>index 000000000000..376d4e5ff326<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/spear/clk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/clk.c</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ *</div><div class='add'>+ * SPEAr clk - Common routines</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+long clk_round_rate_index(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+		unsigned long parent_rate, clk_calc_rate calc_rate, u8 rtbl_cnt,</div><div class='add'>+		int *index)</div><div class='add'>+{</div><div class='add'>+	unsigned long prev_rate, rate = 0;</div><div class='add'>+</div><div class='add'>+	for (*index = 0; *index &lt; rtbl_cnt; (*index)++) {</div><div class='add'>+		prev_rate = rate;</div><div class='add'>+		rate = calc_rate(hw, parent_rate, *index);</div><div class='add'>+		if (drate &lt; rate) {</div><div class='add'>+			/* previous clock was best */</div><div class='add'>+			if (*index) {</div><div class='add'>+				rate = prev_rate;</div><div class='add'>+				(*index)--;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rate;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/spear/clk.h b/drivers/clk/spear/clk.h<br/>new file mode 100644<br/>index 000000000000..3321c46a071c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/spear/clk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/clk.h</a></div><div class='hunk'>@@ -0,0 +1,134 @@</div><div class='add'>+/*</div><div class='add'>+ * Clock framework definitions for SPEAr platform</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __SPEAR_CLK_H</div><div class='add'>+#define __SPEAR_CLK_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/spinlock_types.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/* Auxiliary Synth clk */</div><div class='add'>+/* Default masks */</div><div class='add'>+#define AUX_EQ_SEL_SHIFT	30</div><div class='add'>+#define AUX_EQ_SEL_MASK		1</div><div class='add'>+#define AUX_EQ1_SEL		0</div><div class='add'>+#define AUX_EQ2_SEL		1</div><div class='add'>+#define AUX_XSCALE_SHIFT	16</div><div class='add'>+#define AUX_XSCALE_MASK		0xFFF</div><div class='add'>+#define AUX_YSCALE_SHIFT	0</div><div class='add'>+#define AUX_YSCALE_MASK		0xFFF</div><div class='add'>+#define AUX_SYNT_ENB		31</div><div class='add'>+</div><div class='add'>+struct aux_clk_masks {</div><div class='add'>+	u32 eq_sel_mask;</div><div class='add'>+	u32 eq_sel_shift;</div><div class='add'>+	u32 eq1_mask;</div><div class='add'>+	u32 eq2_mask;</div><div class='add'>+	u32 xscale_sel_mask;</div><div class='add'>+	u32 xscale_sel_shift;</div><div class='add'>+	u32 yscale_sel_mask;</div><div class='add'>+	u32 yscale_sel_shift;</div><div class='add'>+	u32 enable_bit;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aux_rate_tbl {</div><div class='add'>+	u16 xscale;</div><div class='add'>+	u16 yscale;</div><div class='add'>+	u8 eq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk_aux {</div><div class='add'>+	struct			clk_hw hw;</div><div class='add'>+	void __iomem		*reg;</div><div class='add'>+	struct aux_clk_masks	*masks;</div><div class='add'>+	struct aux_rate_tbl	*rtbl;</div><div class='add'>+	u8			rtbl_cnt;</div><div class='add'>+	spinlock_t		*lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Fractional Synth clk */</div><div class='add'>+struct frac_rate_tbl {</div><div class='add'>+	u32 div;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk_frac {</div><div class='add'>+	struct			clk_hw hw;</div><div class='add'>+	void __iomem		*reg;</div><div class='add'>+	struct frac_rate_tbl	*rtbl;</div><div class='add'>+	u8			rtbl_cnt;</div><div class='add'>+	spinlock_t		*lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* GPT clk */</div><div class='add'>+struct gpt_rate_tbl {</div><div class='add'>+	u16 mscale;</div><div class='add'>+	u16 nscale;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk_gpt {</div><div class='add'>+	struct			clk_hw hw;</div><div class='add'>+	void __iomem		*reg;</div><div class='add'>+	struct gpt_rate_tbl	*rtbl;</div><div class='add'>+	u8			rtbl_cnt;</div><div class='add'>+	spinlock_t		*lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* VCO-PLL clk */</div><div class='add'>+struct pll_rate_tbl {</div><div class='add'>+	u8 mode;</div><div class='add'>+	u16 m;</div><div class='add'>+	u8 n;</div><div class='add'>+	u8 p;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk_vco {</div><div class='add'>+	struct			clk_hw hw;</div><div class='add'>+	void __iomem		*mode_reg;</div><div class='add'>+	void __iomem		*cfg_reg;</div><div class='add'>+	struct pll_rate_tbl	*rtbl;</div><div class='add'>+	u8			rtbl_cnt;</div><div class='add'>+	spinlock_t		*lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clk_pll {</div><div class='add'>+	struct			clk_hw hw;</div><div class='add'>+	struct clk_vco		*vco;</div><div class='add'>+	const char		*parent[1];</div><div class='add'>+	spinlock_t		*lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+typedef unsigned long (*clk_calc_rate)(struct clk_hw *hw, unsigned long prate,</div><div class='add'>+		int index);</div><div class='add'>+</div><div class='add'>+/* clk register routines */</div><div class='add'>+struct clk *clk_register_aux(const char *aux_name, const char *gate_name,</div><div class='add'>+		const char *parent_name, unsigned long flags, void __iomem *reg,</div><div class='add'>+		struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl,</div><div class='add'>+		u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk);</div><div class='add'>+struct clk *clk_register_frac(const char *name, const char *parent_name,</div><div class='add'>+		unsigned long flags, void __iomem *reg,</div><div class='add'>+		struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock);</div><div class='add'>+struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned</div><div class='add'>+		long flags, void __iomem *reg, struct gpt_rate_tbl *rtbl, u8</div><div class='add'>+		rtbl_cnt, spinlock_t *lock);</div><div class='add'>+struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name,</div><div class='add'>+		const char *vco_gate_name, const char *parent_name,</div><div class='add'>+		unsigned long flags, void __iomem *mode_reg, void __iomem</div><div class='add'>+		*cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt,</div><div class='add'>+		spinlock_t *lock, struct clk **pll_clk,</div><div class='add'>+		struct clk **vco_gate_clk);</div><div class='add'>+</div><div class='add'>+long clk_round_rate_index(struct clk_hw *hw, unsigned long drate,</div><div class='add'>+		unsigned long parent_rate, clk_calc_rate calc_rate, u8 rtbl_cnt,</div><div class='add'>+		int *index);</div><div class='add'>+</div><div class='add'>+#endif /* __SPEAR_CLK_H */</div><div class='head'>diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c<br/>new file mode 100644<br/>index 000000000000..42b68df9aeef<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/spear/spear1310_clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/spear1310_clock.c</a></div><div class='hunk'>@@ -0,0 +1,1106 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/spear1310_clock.c</div><div class='add'>+ *</div><div class='add'>+ * SPEAr1310 machine clock framework source file</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/spinlock_types.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+/* PLL related registers and bit values */</div><div class='add'>+#define SPEAR1310_PLL_CFG			(VA_MISC_BASE + 0x210)</div><div class='add'>+	/* PLL_CFG bit values */</div><div class='add'>+	#define SPEAR1310_CLCD_SYNT_CLK_MASK		1</div><div class='add'>+	#define SPEAR1310_CLCD_SYNT_CLK_SHIFT		31</div><div class='add'>+	#define SPEAR1310_RAS_SYNT2_3_CLK_MASK		2</div><div class='add'>+	#define SPEAR1310_RAS_SYNT2_3_CLK_SHIFT		29</div><div class='add'>+	#define SPEAR1310_RAS_SYNT_CLK_MASK		2</div><div class='add'>+	#define SPEAR1310_RAS_SYNT0_1_CLK_SHIFT		27</div><div class='add'>+	#define SPEAR1310_PLL_CLK_MASK			2</div><div class='add'>+	#define SPEAR1310_PLL3_CLK_SHIFT		24</div><div class='add'>+	#define SPEAR1310_PLL2_CLK_SHIFT		22</div><div class='add'>+	#define SPEAR1310_PLL1_CLK_SHIFT		20</div><div class='add'>+</div><div class='add'>+#define SPEAR1310_PLL1_CTR			(VA_MISC_BASE + 0x214)</div><div class='add'>+#define SPEAR1310_PLL1_FRQ			(VA_MISC_BASE + 0x218)</div><div class='add'>+#define SPEAR1310_PLL2_CTR			(VA_MISC_BASE + 0x220)</div><div class='add'>+#define SPEAR1310_PLL2_FRQ			(VA_MISC_BASE + 0x224)</div><div class='add'>+#define SPEAR1310_PLL3_CTR			(VA_MISC_BASE + 0x22C)</div><div class='add'>+#define SPEAR1310_PLL3_FRQ			(VA_MISC_BASE + 0x230)</div><div class='add'>+#define SPEAR1310_PLL4_CTR			(VA_MISC_BASE + 0x238)</div><div class='add'>+#define SPEAR1310_PLL4_FRQ			(VA_MISC_BASE + 0x23C)</div><div class='add'>+#define SPEAR1310_PERIP_CLK_CFG			(VA_MISC_BASE + 0x244)</div><div class='add'>+	/* PERIP_CLK_CFG bit values */</div><div class='add'>+	#define SPEAR1310_GPT_OSC24_VAL			0</div><div class='add'>+	#define SPEAR1310_GPT_APB_VAL			1</div><div class='add'>+	#define SPEAR1310_GPT_CLK_MASK			1</div><div class='add'>+	#define SPEAR1310_GPT3_CLK_SHIFT		11</div><div class='add'>+	#define SPEAR1310_GPT2_CLK_SHIFT		10</div><div class='add'>+	#define SPEAR1310_GPT1_CLK_SHIFT		9</div><div class='add'>+	#define SPEAR1310_GPT0_CLK_SHIFT		8</div><div class='add'>+	#define SPEAR1310_UART_CLK_PLL5_VAL		0</div><div class='add'>+	#define SPEAR1310_UART_CLK_OSC24_VAL		1</div><div class='add'>+	#define SPEAR1310_UART_CLK_SYNT_VAL		2</div><div class='add'>+	#define SPEAR1310_UART_CLK_MASK			2</div><div class='add'>+	#define SPEAR1310_UART_CLK_SHIFT		4</div><div class='add'>+</div><div class='add'>+	#define SPEAR1310_AUX_CLK_PLL5_VAL		0</div><div class='add'>+	#define SPEAR1310_AUX_CLK_SYNT_VAL		1</div><div class='add'>+	#define SPEAR1310_CLCD_CLK_MASK			2</div><div class='add'>+	#define SPEAR1310_CLCD_CLK_SHIFT		2</div><div class='add'>+	#define SPEAR1310_C3_CLK_MASK			1</div><div class='add'>+	#define SPEAR1310_C3_CLK_SHIFT			1</div><div class='add'>+</div><div class='add'>+#define SPEAR1310_GMAC_CLK_CFG			(VA_MISC_BASE + 0x248)</div><div class='add'>+	#define SPEAR1310_GMAC_PHY_IF_SEL_MASK		3</div><div class='add'>+	#define SPEAR1310_GMAC_PHY_IF_SEL_SHIFT		4</div><div class='add'>+	#define SPEAR1310_GMAC_PHY_CLK_MASK		1</div><div class='add'>+	#define SPEAR1310_GMAC_PHY_CLK_SHIFT		3</div><div class='add'>+	#define SPEAR1310_GMAC_PHY_INPUT_CLK_MASK	2</div><div class='add'>+	#define SPEAR1310_GMAC_PHY_INPUT_CLK_SHIFT	1</div><div class='add'>+</div><div class='add'>+#define SPEAR1310_I2S_CLK_CFG			(VA_MISC_BASE + 0x24C)</div><div class='add'>+	/* I2S_CLK_CFG register mask */</div><div class='add'>+	#define SPEAR1310_I2S_SCLK_X_MASK		0x1F</div><div class='add'>+	#define SPEAR1310_I2S_SCLK_X_SHIFT		27</div><div class='add'>+	#define SPEAR1310_I2S_SCLK_Y_MASK		0x1F</div><div class='add'>+	#define SPEAR1310_I2S_SCLK_Y_SHIFT		22</div><div class='add'>+	#define SPEAR1310_I2S_SCLK_EQ_SEL_SHIFT		21</div><div class='add'>+	#define SPEAR1310_I2S_SCLK_SYNTH_ENB		20</div><div class='add'>+	#define SPEAR1310_I2S_PRS1_CLK_X_MASK		0xFF</div><div class='add'>+	#define SPEAR1310_I2S_PRS1_CLK_X_SHIFT		12</div><div class='add'>+	#define SPEAR1310_I2S_PRS1_CLK_Y_MASK		0xFF</div><div class='add'>+	#define SPEAR1310_I2S_PRS1_CLK_Y_SHIFT		4</div><div class='add'>+	#define SPEAR1310_I2S_PRS1_EQ_SEL_SHIFT		3</div><div class='add'>+	#define SPEAR1310_I2S_REF_SEL_MASK		1</div><div class='add'>+	#define SPEAR1310_I2S_REF_SHIFT			2</div><div class='add'>+	#define SPEAR1310_I2S_SRC_CLK_MASK		2</div><div class='add'>+	#define SPEAR1310_I2S_SRC_CLK_SHIFT		0</div><div class='add'>+</div><div class='add'>+#define SPEAR1310_C3_CLK_SYNT			(VA_MISC_BASE + 0x250)</div><div class='add'>+#define SPEAR1310_UART_CLK_SYNT			(VA_MISC_BASE + 0x254)</div><div class='add'>+#define SPEAR1310_GMAC_CLK_SYNT			(VA_MISC_BASE + 0x258)</div><div class='add'>+#define SPEAR1310_SDHCI_CLK_SYNT		(VA_MISC_BASE + 0x25C)</div><div class='add'>+#define SPEAR1310_CFXD_CLK_SYNT			(VA_MISC_BASE + 0x260)</div><div class='add'>+#define SPEAR1310_ADC_CLK_SYNT			(VA_MISC_BASE + 0x264)</div><div class='add'>+#define SPEAR1310_AMBA_CLK_SYNT			(VA_MISC_BASE + 0x268)</div><div class='add'>+#define SPEAR1310_CLCD_CLK_SYNT			(VA_MISC_BASE + 0x270)</div><div class='add'>+#define SPEAR1310_RAS_CLK_SYNT0			(VA_MISC_BASE + 0x280)</div><div class='add'>+#define SPEAR1310_RAS_CLK_SYNT1			(VA_MISC_BASE + 0x288)</div><div class='add'>+#define SPEAR1310_RAS_CLK_SYNT2			(VA_MISC_BASE + 0x290)</div><div class='add'>+#define SPEAR1310_RAS_CLK_SYNT3			(VA_MISC_BASE + 0x298)</div><div class='add'>+	/* Check Fractional synthesizer reg masks */</div><div class='add'>+</div><div class='add'>+#define SPEAR1310_PERIP1_CLK_ENB		(VA_MISC_BASE + 0x300)</div><div class='add'>+	/* PERIP1_CLK_ENB register masks */</div><div class='add'>+	#define SPEAR1310_RTC_CLK_ENB			31</div><div class='add'>+	#define SPEAR1310_ADC_CLK_ENB			30</div><div class='add'>+	#define SPEAR1310_C3_CLK_ENB			29</div><div class='add'>+	#define SPEAR1310_JPEG_CLK_ENB			28</div><div class='add'>+	#define SPEAR1310_CLCD_CLK_ENB			27</div><div class='add'>+	#define SPEAR1310_DMA_CLK_ENB			25</div><div class='add'>+	#define SPEAR1310_GPIO1_CLK_ENB			24</div><div class='add'>+	#define SPEAR1310_GPIO0_CLK_ENB			23</div><div class='add'>+	#define SPEAR1310_GPT1_CLK_ENB			22</div><div class='add'>+	#define SPEAR1310_GPT0_CLK_ENB			21</div><div class='add'>+	#define SPEAR1310_I2S0_CLK_ENB			20</div><div class='add'>+	#define SPEAR1310_I2S1_CLK_ENB			19</div><div class='add'>+	#define SPEAR1310_I2C0_CLK_ENB			18</div><div class='add'>+	#define SPEAR1310_SSP_CLK_ENB			17</div><div class='add'>+	#define SPEAR1310_UART_CLK_ENB			15</div><div class='add'>+	#define SPEAR1310_PCIE_SATA_2_CLK_ENB		14</div><div class='add'>+	#define SPEAR1310_PCIE_SATA_1_CLK_ENB		13</div><div class='add'>+	#define SPEAR1310_PCIE_SATA_0_CLK_ENB		12</div><div class='add'>+	#define SPEAR1310_UOC_CLK_ENB			11</div><div class='add'>+	#define SPEAR1310_UHC1_CLK_ENB			10</div><div class='add'>+	#define SPEAR1310_UHC0_CLK_ENB			9</div><div class='add'>+	#define SPEAR1310_GMAC_CLK_ENB			8</div><div class='add'>+	#define SPEAR1310_CFXD_CLK_ENB			7</div><div class='add'>+	#define SPEAR1310_SDHCI_CLK_ENB			6</div><div class='add'>+	#define SPEAR1310_SMI_CLK_ENB			5</div><div class='add'>+	#define SPEAR1310_FSMC_CLK_ENB			4</div><div class='add'>+	#define SPEAR1310_SYSRAM0_CLK_ENB		3</div><div class='add'>+	#define SPEAR1310_SYSRAM1_CLK_ENB		2</div><div class='add'>+	#define SPEAR1310_SYSROM_CLK_ENB		1</div><div class='add'>+	#define SPEAR1310_BUS_CLK_ENB			0</div><div class='add'>+</div><div class='add'>+#define SPEAR1310_PERIP2_CLK_ENB		(VA_MISC_BASE + 0x304)</div><div class='add'>+	/* PERIP2_CLK_ENB register masks */</div><div class='add'>+	#define SPEAR1310_THSENS_CLK_ENB		8</div><div class='add'>+	#define SPEAR1310_I2S_REF_PAD_CLK_ENB		7</div><div class='add'>+	#define SPEAR1310_ACP_CLK_ENB			6</div><div class='add'>+	#define SPEAR1310_GPT3_CLK_ENB			5</div><div class='add'>+	#define SPEAR1310_GPT2_CLK_ENB			4</div><div class='add'>+	#define SPEAR1310_KBD_CLK_ENB			3</div><div class='add'>+	#define SPEAR1310_CPU_DBG_CLK_ENB		2</div><div class='add'>+	#define SPEAR1310_DDR_CORE_CLK_ENB		1</div><div class='add'>+	#define SPEAR1310_DDR_CTRL_CLK_ENB		0</div><div class='add'>+</div><div class='add'>+#define SPEAR1310_RAS_CLK_ENB			(VA_MISC_BASE + 0x310)</div><div class='add'>+	/* RAS_CLK_ENB register masks */</div><div class='add'>+	#define SPEAR1310_SYNT3_CLK_ENB			17</div><div class='add'>+	#define SPEAR1310_SYNT2_CLK_ENB			16</div><div class='add'>+	#define SPEAR1310_SYNT1_CLK_ENB			15</div><div class='add'>+	#define SPEAR1310_SYNT0_CLK_ENB			14</div><div class='add'>+	#define SPEAR1310_PCLK3_CLK_ENB			13</div><div class='add'>+	#define SPEAR1310_PCLK2_CLK_ENB			12</div><div class='add'>+	#define SPEAR1310_PCLK1_CLK_ENB			11</div><div class='add'>+	#define SPEAR1310_PCLK0_CLK_ENB			10</div><div class='add'>+	#define SPEAR1310_PLL3_CLK_ENB			9</div><div class='add'>+	#define SPEAR1310_PLL2_CLK_ENB			8</div><div class='add'>+	#define SPEAR1310_C125M_PAD_CLK_ENB		7</div><div class='add'>+	#define SPEAR1310_C30M_CLK_ENB			6</div><div class='add'>+	#define SPEAR1310_C48M_CLK_ENB			5</div><div class='add'>+	#define SPEAR1310_OSC_25M_CLK_ENB		4</div><div class='add'>+	#define SPEAR1310_OSC_32K_CLK_ENB		3</div><div class='add'>+	#define SPEAR1310_OSC_24M_CLK_ENB		2</div><div class='add'>+	#define SPEAR1310_PCLK_CLK_ENB			1</div><div class='add'>+	#define SPEAR1310_ACLK_CLK_ENB			0</div><div class='add'>+</div><div class='add'>+/* RAS Area Control Register */</div><div class='add'>+#define SPEAR1310_RAS_CTRL_REG0			(VA_SPEAR1310_RAS_BASE + 0x000)</div><div class='add'>+	#define SPEAR1310_SSP1_CLK_MASK			3</div><div class='add'>+	#define SPEAR1310_SSP1_CLK_SHIFT		26</div><div class='add'>+	#define SPEAR1310_TDM_CLK_MASK			1</div><div class='add'>+	#define SPEAR1310_TDM2_CLK_SHIFT		24</div><div class='add'>+	#define SPEAR1310_TDM1_CLK_SHIFT		23</div><div class='add'>+	#define SPEAR1310_I2C_CLK_MASK			1</div><div class='add'>+	#define SPEAR1310_I2C7_CLK_SHIFT		22</div><div class='add'>+	#define SPEAR1310_I2C6_CLK_SHIFT		21</div><div class='add'>+	#define SPEAR1310_I2C5_CLK_SHIFT		20</div><div class='add'>+	#define SPEAR1310_I2C4_CLK_SHIFT		19</div><div class='add'>+	#define SPEAR1310_I2C3_CLK_SHIFT		18</div><div class='add'>+	#define SPEAR1310_I2C2_CLK_SHIFT		17</div><div class='add'>+	#define SPEAR1310_I2C1_CLK_SHIFT		16</div><div class='add'>+	#define SPEAR1310_GPT64_CLK_MASK		1</div><div class='add'>+	#define SPEAR1310_GPT64_CLK_SHIFT		15</div><div class='add'>+	#define SPEAR1310_RAS_UART_CLK_MASK		1</div><div class='add'>+	#define SPEAR1310_UART5_CLK_SHIFT		14</div><div class='add'>+	#define SPEAR1310_UART4_CLK_SHIFT		13</div><div class='add'>+	#define SPEAR1310_UART3_CLK_SHIFT		12</div><div class='add'>+	#define SPEAR1310_UART2_CLK_SHIFT		11</div><div class='add'>+	#define SPEAR1310_UART1_CLK_SHIFT		10</div><div class='add'>+	#define SPEAR1310_PCI_CLK_MASK			1</div><div class='add'>+	#define SPEAR1310_PCI_CLK_SHIFT			0</div><div class='add'>+</div><div class='add'>+#define SPEAR1310_RAS_CTRL_REG1			(VA_SPEAR1310_RAS_BASE + 0x004)</div><div class='add'>+	#define SPEAR1310_PHY_CLK_MASK			0x3</div><div class='add'>+	#define SPEAR1310_RMII_PHY_CLK_SHIFT		0</div><div class='add'>+	#define SPEAR1310_SMII_RGMII_PHY_CLK_SHIFT	2</div><div class='add'>+</div><div class='add'>+#define SPEAR1310_RAS_SW_CLK_CTRL		(VA_SPEAR1310_RAS_BASE + 0x0148)</div><div class='add'>+	#define SPEAR1310_CAN1_CLK_ENB			25</div><div class='add'>+	#define SPEAR1310_CAN0_CLK_ENB			24</div><div class='add'>+	#define SPEAR1310_GPT64_CLK_ENB			23</div><div class='add'>+	#define SPEAR1310_SSP1_CLK_ENB			22</div><div class='add'>+	#define SPEAR1310_I2C7_CLK_ENB			21</div><div class='add'>+	#define SPEAR1310_I2C6_CLK_ENB			20</div><div class='add'>+	#define SPEAR1310_I2C5_CLK_ENB			19</div><div class='add'>+	#define SPEAR1310_I2C4_CLK_ENB			18</div><div class='add'>+	#define SPEAR1310_I2C3_CLK_ENB			17</div><div class='add'>+	#define SPEAR1310_I2C2_CLK_ENB			16</div><div class='add'>+	#define SPEAR1310_I2C1_CLK_ENB			15</div><div class='add'>+	#define SPEAR1310_UART5_CLK_ENB			14</div><div class='add'>+	#define SPEAR1310_UART4_CLK_ENB			13</div><div class='add'>+	#define SPEAR1310_UART3_CLK_ENB			12</div><div class='add'>+	#define SPEAR1310_UART2_CLK_ENB			11</div><div class='add'>+	#define SPEAR1310_UART1_CLK_ENB			10</div><div class='add'>+	#define SPEAR1310_RS485_1_CLK_ENB		9</div><div class='add'>+	#define SPEAR1310_RS485_0_CLK_ENB		8</div><div class='add'>+	#define SPEAR1310_TDM2_CLK_ENB			7</div><div class='add'>+	#define SPEAR1310_TDM1_CLK_ENB			6</div><div class='add'>+	#define SPEAR1310_PCI_CLK_ENB			5</div><div class='add'>+	#define SPEAR1310_GMII_CLK_ENB			4</div><div class='add'>+	#define SPEAR1310_MII2_CLK_ENB			3</div><div class='add'>+	#define SPEAR1310_MII1_CLK_ENB			2</div><div class='add'>+	#define SPEAR1310_MII0_CLK_ENB			1</div><div class='add'>+	#define SPEAR1310_ESRAM_CLK_ENB			0</div><div class='add'>+</div><div class='add'>+static DEFINE_SPINLOCK(_lock);</div><div class='add'>+</div><div class='add'>+/* pll rate configuration table, in ascending order of rates */</div><div class='add'>+static struct pll_rate_tbl pll_rtbl[] = {</div><div class='add'>+	/* PCLK 24MHz */</div><div class='add'>+	{.mode = 0, .m = 0x83, .n = 0x04, .p = 0x5}, /* vco 1572, pll 49.125 MHz */</div><div class='add'>+	{.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x3}, /* vco 1000, pll 125 MHz */</div><div class='add'>+	{.mode = 0, .m = 0x64, .n = 0x06, .p = 0x1}, /* vco 800, pll 400 MHz */</div><div class='add'>+	{.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x1}, /* vco 1000, pll 500 MHz */</div><div class='add'>+	{.mode = 0, .m = 0xA6, .n = 0x06, .p = 0x1}, /* vco 1328, pll 664 MHz */</div><div class='add'>+	{.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x1}, /* vco 1600, pll 800 MHz */</div><div class='add'>+	{.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x0}, /* vco 1, pll 1 GHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* vco-pll4 rate configuration table, in ascending order of rates */</div><div class='add'>+static struct pll_rate_tbl pll4_rtbl[] = {</div><div class='add'>+	{.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x2}, /* vco 1000, pll 250 MHz */</div><div class='add'>+	{.mode = 0, .m = 0xA6, .n = 0x06, .p = 0x2}, /* vco 1328, pll 332 MHz */</div><div class='add'>+	{.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x2}, /* vco 1600, pll 400 MHz */</div><div class='add'>+	{.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x0}, /* vco 1, pll 1 GHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* aux rate configuration table, in ascending order of rates */</div><div class='add'>+static struct aux_rate_tbl aux_rtbl[] = {</div><div class='add'>+	/* For VCO1div2 = 500 MHz */</div><div class='add'>+	{.xscale = 10, .yscale = 204, .eq = 0}, /* 12.29 MHz */</div><div class='add'>+	{.xscale = 4, .yscale = 21, .eq = 0}, /* 48 MHz */</div><div class='add'>+	{.xscale = 2, .yscale = 6, .eq = 0}, /* 83 MHz */</div><div class='add'>+	{.xscale = 2, .yscale = 4, .eq = 0}, /* 125 MHz */</div><div class='add'>+	{.xscale = 1, .yscale = 3, .eq = 1}, /* 166 MHz */</div><div class='add'>+	{.xscale = 1, .yscale = 2, .eq = 1}, /* 250 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gmac rate configuration table, in ascending order of rates */</div><div class='add'>+static struct aux_rate_tbl gmac_rtbl[] = {</div><div class='add'>+	/* For gmac phy input clk */</div><div class='add'>+	{.xscale = 2, .yscale = 6, .eq = 0}, /* divided by 6 */</div><div class='add'>+	{.xscale = 2, .yscale = 4, .eq = 0}, /* divided by 4 */</div><div class='add'>+	{.xscale = 1, .yscale = 3, .eq = 1}, /* divided by 3 */</div><div class='add'>+	{.xscale = 1, .yscale = 2, .eq = 1}, /* divided by 2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* clcd rate configuration table, in ascending order of rates */</div><div class='add'>+static struct frac_rate_tbl clcd_rtbl[] = {</div><div class='add'>+	{.div = 0x14000}, /* 25 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x1284B}, /* 27 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x0D8D3}, /* 58 Mhz , for vco1div4 = 393 MHz */</div><div class='add'>+	{.div = 0x0B72C}, /* 58 Mhz , for vco1div4 = 332 MHz */</div><div class='add'>+	{.div = 0x089EE}, /* 58 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x06f1C}, /* 72 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x06E58}, /* 58 Mhz , for vco1div4 = 200 MHz */</div><div class='add'>+	{.div = 0x06c1B}, /* 74 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x04A12}, /* 108 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x0378E}, /* 144 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* i2s prescaler1 masks */</div><div class='add'>+static struct aux_clk_masks i2s_prs1_masks = {</div><div class='add'>+	.eq_sel_mask = AUX_EQ_SEL_MASK,</div><div class='add'>+	.eq_sel_shift = SPEAR1310_I2S_PRS1_EQ_SEL_SHIFT,</div><div class='add'>+	.eq1_mask = AUX_EQ1_SEL,</div><div class='add'>+	.eq2_mask = AUX_EQ2_SEL,</div><div class='add'>+	.xscale_sel_mask = SPEAR1310_I2S_PRS1_CLK_X_MASK,</div><div class='add'>+	.xscale_sel_shift = SPEAR1310_I2S_PRS1_CLK_X_SHIFT,</div><div class='add'>+	.yscale_sel_mask = SPEAR1310_I2S_PRS1_CLK_Y_MASK,</div><div class='add'>+	.yscale_sel_shift = SPEAR1310_I2S_PRS1_CLK_Y_SHIFT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* i2s sclk (bit clock) syynthesizers masks */</div><div class='add'>+static struct aux_clk_masks i2s_sclk_masks = {</div><div class='add'>+	.eq_sel_mask = AUX_EQ_SEL_MASK,</div><div class='add'>+	.eq_sel_shift = SPEAR1310_I2S_SCLK_EQ_SEL_SHIFT,</div><div class='add'>+	.eq1_mask = AUX_EQ1_SEL,</div><div class='add'>+	.eq2_mask = AUX_EQ2_SEL,</div><div class='add'>+	.xscale_sel_mask = SPEAR1310_I2S_SCLK_X_MASK,</div><div class='add'>+	.xscale_sel_shift = SPEAR1310_I2S_SCLK_X_SHIFT,</div><div class='add'>+	.yscale_sel_mask = SPEAR1310_I2S_SCLK_Y_MASK,</div><div class='add'>+	.yscale_sel_shift = SPEAR1310_I2S_SCLK_Y_SHIFT,</div><div class='add'>+	.enable_bit = SPEAR1310_I2S_SCLK_SYNTH_ENB,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* i2s prs1 aux rate configuration table, in ascending order of rates */</div><div class='add'>+static struct aux_rate_tbl i2s_prs1_rtbl[] = {</div><div class='add'>+	/* For parent clk = 49.152 MHz */</div><div class='add'>+	{.xscale = 1, .yscale = 2, .eq = 0}, /* 12.288 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* i2s sclk aux rate configuration table, in ascending order of rates */</div><div class='add'>+static struct aux_rate_tbl i2s_sclk_rtbl[] = {</div><div class='add'>+	/* For i2s_ref_clk = 12.288MHz */</div><div class='add'>+	{.xscale = 1, .yscale = 4, .eq = 0}, /* 1.53 MHz */</div><div class='add'>+	{.xscale = 1, .yscale = 2, .eq = 0}, /* 3.07 Mhz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* adc rate configuration table, in ascending order of rates */</div><div class='add'>+/* possible adc range is 2.5 MHz to 20 MHz. */</div><div class='add'>+static struct aux_rate_tbl adc_rtbl[] = {</div><div class='add'>+	/* For ahb = 166.67 MHz */</div><div class='add'>+	{.xscale = 1, .yscale = 31, .eq = 0}, /* 2.68 MHz */</div><div class='add'>+	{.xscale = 2, .yscale = 21, .eq = 0}, /* 7.94 MHz */</div><div class='add'>+	{.xscale = 4, .yscale = 21, .eq = 0}, /* 15.87 MHz */</div><div class='add'>+	{.xscale = 10, .yscale = 42, .eq = 0}, /* 19.84 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* General synth rate configuration table, in ascending order of rates */</div><div class='add'>+static struct frac_rate_tbl gen_rtbl[] = {</div><div class='add'>+	/* For vco1div4 = 250 MHz */</div><div class='add'>+	{.div = 0x14000}, /* 25 MHz */</div><div class='add'>+	{.div = 0x0A000}, /* 50 MHz */</div><div class='add'>+	{.div = 0x05000}, /* 100 MHz */</div><div class='add'>+	{.div = 0x02000}, /* 250 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* clock parents */</div><div class='add'>+static const char *vco_parents[] = { "osc_24m_clk", "osc_25m_clk", };</div><div class='add'>+static const char *gpt_parents[] = { "osc_24m_clk", "apb_clk", };</div><div class='add'>+static const char *uart0_parents[] = { "pll5_clk", "uart_synth_gate_clk", };</div><div class='add'>+static const char *c3_parents[] = { "pll5_clk", "c3_synth_gate_clk", };</div><div class='add'>+static const char *gmac_phy_input_parents[] = { "gmii_125m_pad_clk", "pll2_clk",</div><div class='add'>+	"osc_25m_clk", };</div><div class='add'>+static const char *gmac_phy_parents[] = { "gmac_phy_input_mux_clk",</div><div class='add'>+	"gmac_phy_synth_gate_clk", };</div><div class='add'>+static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", };</div><div class='add'>+static const char *clcd_pixel_parents[] = { "pll5_clk", "clcd_synth_clk", };</div><div class='add'>+static const char *i2s_src_parents[] = { "vco1div2_clk", "none", "pll3_clk",</div><div class='add'>+	"i2s_src_pad_clk", };</div><div class='add'>+static const char *i2s_ref_parents[] = { "i2s_src_mux_clk", "i2s_prs1_clk", };</div><div class='add'>+static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk",</div><div class='add'>+	"pll3_clk", };</div><div class='add'>+static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco3div2_clk",</div><div class='add'>+	"pll2_clk", };</div><div class='add'>+static const char *rmii_phy_parents[] = { "ras_tx50_clk", "none",</div><div class='add'>+	"ras_pll2_clk", "ras_synth0_clk", };</div><div class='add'>+static const char *smii_rgmii_phy_parents[] = { "none", "ras_tx125_clk",</div><div class='add'>+	"ras_pll2_clk", "ras_synth0_clk", };</div><div class='add'>+static const char *uart_parents[] = { "ras_apb_clk", "gen_synth3_clk", };</div><div class='add'>+static const char *i2c_parents[] = { "ras_apb_clk", "gen_synth1_clk", };</div><div class='add'>+static const char *ssp1_parents[] = { "ras_apb_clk", "gen_synth1_clk",</div><div class='add'>+	"ras_plclk0_clk", };</div><div class='add'>+static const char *pci_parents[] = { "ras_pll3_clk", "gen_synth2_clk", };</div><div class='add'>+static const char *tdm_parents[] = { "ras_pll3_clk", "gen_synth1_clk", };</div><div class='add'>+</div><div class='add'>+void __init spear1310_clk_init(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk, *clk1;</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);</div><div class='add'>+	clk_register_clkdev(clk, "apb_pclk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,</div><div class='add'>+			32000);</div><div class='add'>+	clk_register_clkdev(clk, "osc_32k_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT,</div><div class='add'>+			24000000);</div><div class='add'>+	clk_register_clkdev(clk, "osc_24m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, CLK_IS_ROOT,</div><div class='add'>+			25000000);</div><div class='add'>+	clk_register_clkdev(clk, "osc_25m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "gmii_125m_pad_clk", NULL,</div><div class='add'>+			CLK_IS_ROOT, 125000000);</div><div class='add'>+	clk_register_clkdev(clk, "gmii_125m_pad_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL,</div><div class='add'>+			CLK_IS_ROOT, 12288000);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_src_pad_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* clock derived from 32 KHz osc clk */</div><div class='add'>+	clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_RTC_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "fc900000.rtc");</div><div class='add'>+</div><div class='add'>+	/* clock derived from 24 or 25 MHz osc clk */</div><div class='add'>+	/* vco-pll */</div><div class='add'>+	clk = clk_register_mux(NULL, "vco1_mux_clk", vco_parents,</div><div class='add'>+			ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG,</div><div class='add'>+			SPEAR1310_PLL1_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "vco1_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mux_clk",</div><div class='add'>+			0, SPEAR1310_PLL1_CTR, SPEAR1310_PLL1_FRQ, pll_rtbl,</div><div class='add'>+			ARRAY_SIZE(pll_rtbl), &amp;_lock, &amp;clk1, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "vco1_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "pll1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "vco2_mux_clk", vco_parents,</div><div class='add'>+			ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG,</div><div class='add'>+			SPEAR1310_PLL2_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "vco2_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mux_clk",</div><div class='add'>+			0, SPEAR1310_PLL2_CTR, SPEAR1310_PLL2_FRQ, pll_rtbl,</div><div class='add'>+			ARRAY_SIZE(pll_rtbl), &amp;_lock, &amp;clk1, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "vco2_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "pll2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "vco3_mux_clk", vco_parents,</div><div class='add'>+			ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG,</div><div class='add'>+			SPEAR1310_PLL3_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "vco3_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mux_clk",</div><div class='add'>+			0, SPEAR1310_PLL3_CTR, SPEAR1310_PLL3_FRQ, pll_rtbl,</div><div class='add'>+			ARRAY_SIZE(pll_rtbl), &amp;_lock, &amp;clk1, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "vco3_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "pll3_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_vco_pll("vco4_clk", "pll4_clk", NULL, "osc_24m_clk",</div><div class='add'>+			0, SPEAR1310_PLL4_CTR, SPEAR1310_PLL4_FRQ, pll4_rtbl,</div><div class='add'>+			ARRAY_SIZE(pll4_rtbl), &amp;_lock, &amp;clk1, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "vco4_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "pll4_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "pll5_clk", "osc_24m_clk", 0,</div><div class='add'>+			48000000);</div><div class='add'>+	clk_register_clkdev(clk, "pll5_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "pll6_clk", "osc_25m_clk", 0,</div><div class='add'>+			25000000);</div><div class='add'>+	clk_register_clkdev(clk, "pll6_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* vco div n clocks */</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "vco1div2_clk", "vco1_clk", 0, 1,</div><div class='add'>+			2);</div><div class='add'>+	clk_register_clkdev(clk, "vco1div2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "vco1div4_clk", "vco1_clk", 0, 1,</div><div class='add'>+			4);</div><div class='add'>+	clk_register_clkdev(clk, "vco1div4_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "vco2div2_clk", "vco2_clk", 0, 1,</div><div class='add'>+			2);</div><div class='add'>+	clk_register_clkdev(clk, "vco2div2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "vco3div2_clk", "vco3_clk", 0, 1,</div><div class='add'>+			2);</div><div class='add'>+	clk_register_clkdev(clk, "vco3div2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* peripherals */</div><div class='add'>+	clk_register_fixed_factor(NULL, "thermal_clk", "osc_24m_clk", 0, 1,</div><div class='add'>+			128);</div><div class='add'>+	clk = clk_register_gate(NULL, "thermal_gate_clk", "thermal_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_THSENS_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "spear_thermal");</div><div class='add'>+</div><div class='add'>+	/* clock derived from pll4 clk */</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "ddr_clk", "pll4_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, "ddr_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* clock derived from pll1 clk */</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk", 0, 1, 2);</div><div class='add'>+	clk_register_clkdev(clk, "cpu_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "wdt_clk", "cpu_clk", 0, 1,</div><div class='add'>+			2);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ec800620.wdt");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "ahb_clk", "pll1_clk", 0, 1,</div><div class='add'>+			6);</div><div class='add'>+	clk_register_clkdev(clk, "ahb_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "apb_clk", "pll1_clk", 0, 1,</div><div class='add'>+			12);</div><div class='add'>+	clk_register_clkdev(clk, "apb_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* gpt clocks */</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt0_mux_clk", gpt_parents,</div><div class='add'>+			ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1310_GPT0_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt0_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mux_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPT0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt0");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt_parents,</div><div class='add'>+			ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1310_GPT1_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt1_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPT1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt1");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt_parents,</div><div class='add'>+			ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1310_GPT2_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt2_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_GPT2_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt2");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt3_mux_clk", gpt_parents,</div><div class='add'>+			ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1310_GPT3_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt3_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mux_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_GPT3_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt3");</div><div class='add'>+</div><div class='add'>+	/* others */</div><div class='add'>+	clk = clk_register_aux("uart_synth_clk", "uart_synth_gate_clk",</div><div class='add'>+			"vco1div2_clk", 0, SPEAR1310_UART_CLK_SYNT, NULL,</div><div class='add'>+			aux_rtbl, ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "uart_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "uart_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart0_mux_clk", uart0_parents,</div><div class='add'>+			ARRAY_SIZE(uart0_parents), 0, SPEAR1310_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1310_UART_CLK_SHIFT, SPEAR1310_UART_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "uart0_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uart0_clk", "uart0_mux_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UART_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0000000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("sdhci_synth_clk", "sdhci_synth_gate_clk",</div><div class='add'>+			"vco1div2_clk", 0, SPEAR1310_SDHCI_CLK_SYNT, NULL,</div><div class='add'>+			aux_rtbl, ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "sdhci_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "sdhci_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_synth_gate_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SDHCI_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b3000000.sdhci");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("cfxd_synth_clk", "cfxd_synth_gate_clk",</div><div class='add'>+			"vco1div2_clk", 0, SPEAR1310_CFXD_CLK_SYNT, NULL,</div><div class='add'>+			aux_rtbl, ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "cfxd_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "cfxd_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_synth_gate_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CFXD_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b2800000.cf");</div><div class='add'>+	clk_register_clkdev(clk, NULL, "arasan_xd");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("c3_synth_clk", "c3_synth_gate_clk",</div><div class='add'>+			"vco1div2_clk", 0, SPEAR1310_C3_CLK_SYNT, NULL,</div><div class='add'>+			aux_rtbl, ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "c3_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "c3_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "c3_mux_clk", c3_parents,</div><div class='add'>+			ARRAY_SIZE(c3_parents), 0, SPEAR1310_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1310_C3_CLK_SHIFT, SPEAR1310_C3_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "c3_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "c3_clk", "c3_mux_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_C3_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "c3");</div><div class='add'>+</div><div class='add'>+	/* gmac */</div><div class='add'>+	clk = clk_register_mux(NULL, "gmac_phy_input_mux_clk",</div><div class='add'>+			gmac_phy_input_parents,</div><div class='add'>+			ARRAY_SIZE(gmac_phy_input_parents), 0,</div><div class='add'>+			SPEAR1310_GMAC_CLK_CFG,</div><div class='add'>+			SPEAR1310_GMAC_PHY_INPUT_CLK_SHIFT,</div><div class='add'>+			SPEAR1310_GMAC_PHY_INPUT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gmac_phy_input_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("gmac_phy_synth_clk", "gmac_phy_synth_gate_clk",</div><div class='add'>+			"gmac_phy_input_mux_clk", 0, SPEAR1310_GMAC_CLK_SYNT,</div><div class='add'>+			NULL, gmac_rtbl, ARRAY_SIZE(gmac_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "gmac_phy_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "gmac_phy_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gmac_phy_mux_clk", gmac_phy_parents,</div><div class='add'>+			ARRAY_SIZE(gmac_phy_parents), 0,</div><div class='add'>+			SPEAR1310_PERIP_CLK_CFG, SPEAR1310_GMAC_PHY_CLK_SHIFT,</div><div class='add'>+			SPEAR1310_GMAC_PHY_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "stmmacphy.0");</div><div class='add'>+</div><div class='add'>+	/* clcd */</div><div class='add'>+	clk = clk_register_mux(NULL, "clcd_synth_mux_clk", clcd_synth_parents,</div><div class='add'>+			ARRAY_SIZE(clcd_synth_parents), 0,</div><div class='add'>+			SPEAR1310_CLCD_CLK_SYNT, SPEAR1310_CLCD_SYNT_CLK_SHIFT,</div><div class='add'>+			SPEAR1310_CLCD_SYNT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "clcd_synth_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_frac("clcd_synth_clk", "clcd_synth_mux_clk", 0,</div><div class='add'>+			SPEAR1310_CLCD_CLK_SYNT, clcd_rtbl,</div><div class='add'>+			ARRAY_SIZE(clcd_rtbl), &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "clcd_synth_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "clcd_pixel_mux_clk", clcd_pixel_parents,</div><div class='add'>+			ARRAY_SIZE(clcd_pixel_parents), 0,</div><div class='add'>+			SPEAR1310_PERIP_CLK_CFG, SPEAR1310_CLCD_CLK_SHIFT,</div><div class='add'>+			SPEAR1310_CLCD_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "clcd_pixel_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mux_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CLCD_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "clcd_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* i2s */</div><div class='add'>+	clk = clk_register_mux(NULL, "i2s_src_mux_clk", i2s_src_parents,</div><div class='add'>+			ARRAY_SIZE(i2s_src_parents), 0, SPEAR1310_I2S_CLK_CFG,</div><div class='add'>+			SPEAR1310_I2S_SRC_CLK_SHIFT, SPEAR1310_I2S_SRC_CLK_MASK,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_src_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mux_clk", 0,</div><div class='add'>+			SPEAR1310_I2S_CLK_CFG, &amp;i2s_prs1_masks, i2s_prs1_rtbl,</div><div class='add'>+			ARRAY_SIZE(i2s_prs1_rtbl), &amp;_lock, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_prs1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "i2s_ref_mux_clk", i2s_ref_parents,</div><div class='add'>+			ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1310_I2S_CLK_CFG,</div><div class='add'>+			SPEAR1310_I2S_REF_SHIFT, SPEAR1310_I2S_REF_SEL_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_ref_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mux_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_I2S_REF_PAD_CLK_ENB,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gate_clk",</div><div class='add'>+			"i2s_ref_pad_clk", 0, SPEAR1310_I2S_CLK_CFG,</div><div class='add'>+			&amp;i2s_sclk_masks, i2s_sclk_rtbl,</div><div class='add'>+			ARRAY_SIZE(i2s_sclk_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_sclk_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "i2s_sclk_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* clock derived from ahb clk */</div><div class='add'>+	clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_I2C0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0280000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_DMA_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ea800000.dma");</div><div class='add'>+	clk_register_clkdev(clk, NULL, "eb000000.dma");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_JPEG_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b2000000.jpeg");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GMAC_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e2000000.eth");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "fsmc_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_FSMC_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b0000000.flash");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SMI_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ea000000.flash");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "usbh0_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UHC0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "usbh.0_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "usbh1_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UHC1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "usbh.1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uoc_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UOC_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "uoc");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "pcie_sata_0_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_PCIE_SATA_0_CLK_ENB,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "dw_pcie.0");</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ahci.0");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "pcie_sata_1_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_PCIE_SATA_1_CLK_ENB,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "dw_pcie.1");</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ahci.1");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "pcie_sata_2_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_PCIE_SATA_2_CLK_ENB,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "dw_pcie.2");</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ahci.2");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "sysram0_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SYSRAM0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "sysram0_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "sysram1_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SYSRAM1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "sysram1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("adc_synth_clk", "adc_synth_gate_clk", "ahb_clk",</div><div class='add'>+			0, SPEAR1310_ADC_CLK_SYNT, NULL, adc_rtbl,</div><div class='add'>+			ARRAY_SIZE(adc_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "adc_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "adc_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "adc_clk", "adc_synth_gate_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_ADC_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "adc_clk");</div><div class='add'>+</div><div class='add'>+	/* clock derived from apb clk */</div><div class='add'>+	clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SSP_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0100000.spi");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPIO0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0600000.gpio");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gpio1_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPIO1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0680000.gpio");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2s0_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_I2S0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0180000.i2s");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2s1_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_I2S1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0200000.i2s");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "kbd_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_KBD_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0300000.kbd");</div><div class='add'>+</div><div class='add'>+	/* RAS clks */</div><div class='add'>+	clk = clk_register_mux(NULL, "gen_synth0_1_mux_clk",</div><div class='add'>+			gen_synth0_1_parents, ARRAY_SIZE(gen_synth0_1_parents),</div><div class='add'>+			0, SPEAR1310_PLL_CFG, SPEAR1310_RAS_SYNT0_1_CLK_SHIFT,</div><div class='add'>+			SPEAR1310_RAS_SYNT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen_synth0_1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gen_synth2_3_mux_clk",</div><div class='add'>+			gen_synth2_3_parents, ARRAY_SIZE(gen_synth2_3_parents),</div><div class='add'>+			0, SPEAR1310_PLL_CFG, SPEAR1310_RAS_SYNT2_3_CLK_SHIFT,</div><div class='add'>+			SPEAR1310_RAS_SYNT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen_synth2_3_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_frac("gen_synth0_clk", "gen_synth0_1_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl),</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen_synth0_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_frac("gen_synth1_clk", "gen_synth0_1_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl),</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen_synth1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_frac("gen_synth2_clk", "gen_synth2_3_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl),</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen_synth2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_frac("gen_synth3_clk", "gen_synth2_3_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl),</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen_synth3_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_osc_24m_clk", "osc_24m_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_ENB, SPEAR1310_OSC_24M_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_osc_24m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_osc_25m_clk", "osc_25m_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_ENB, SPEAR1310_OSC_25M_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_osc_25m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_osc_32k_clk", "osc_32k_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_ENB, SPEAR1310_OSC_32K_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_osc_32k_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_pll2_clk", "pll2_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_ENB, SPEAR1310_PLL2_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_pll2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_pll3_clk", "pll3_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_ENB, SPEAR1310_PLL3_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_pll3_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_tx125_clk", "gmii_125m_pad_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_ENB, SPEAR1310_C125M_PAD_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_tx125_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "ras_30m_fixed_clk", "pll5_clk", 0,</div><div class='add'>+			30000000);</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_30m_clk", "ras_30m_fixed_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_ENB, SPEAR1310_C30M_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_30m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "ras_48m_fixed_clk", "pll5_clk", 0,</div><div class='add'>+			48000000);</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_48m_clk", "ras_48m_fixed_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_ENB, SPEAR1310_C48M_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_48m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_ahb_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_ENB, SPEAR1310_ACLK_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_ahb_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_apb_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_CLK_ENB, SPEAR1310_PCLK_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_apb_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "ras_plclk0_clk", NULL, CLK_IS_ROOT,</div><div class='add'>+			50000000);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "ras_tx50_clk", NULL, CLK_IS_ROOT,</div><div class='add'>+			50000000);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "can0_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_CAN0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "c_can_platform.0");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "can1_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_CAN1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "c_can_platform.1");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_smii0_clk", "ras_ahb_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_MII0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5c400000.eth");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_smii1_clk", "ras_ahb_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_MII1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5c500000.eth");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_smii2_clk", "ras_ahb_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_MII2_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5c600000.eth");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_rgmii_clk", "ras_ahb_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_GMII_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5c700000.eth");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "smii_rgmii_phy_mux_clk",</div><div class='add'>+			smii_rgmii_phy_parents,</div><div class='add'>+			ARRAY_SIZE(smii_rgmii_phy_parents), 0,</div><div class='add'>+			SPEAR1310_RAS_CTRL_REG1,</div><div class='add'>+			SPEAR1310_SMII_RGMII_PHY_CLK_SHIFT,</div><div class='add'>+			SPEAR1310_PHY_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "stmmacphy.1");</div><div class='add'>+	clk_register_clkdev(clk, NULL, "stmmacphy.2");</div><div class='add'>+	clk_register_clkdev(clk, NULL, "stmmacphy.4");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "rmii_phy_mux_clk", rmii_phy_parents,</div><div class='add'>+			ARRAY_SIZE(rmii_phy_parents), 0,</div><div class='add'>+			SPEAR1310_RAS_CTRL_REG1, SPEAR1310_RMII_PHY_CLK_SHIFT,</div><div class='add'>+			SPEAR1310_PHY_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "stmmacphy.3");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart1_mux_clk", uart_parents,</div><div class='add'>+			ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_UART1_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "uart1_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uart1_clk", "uart1_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5c800000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart2_mux_clk", uart_parents,</div><div class='add'>+			ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_UART2_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "uart2_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uart2_clk", "uart2_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART2_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5c900000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart3_mux_clk", uart_parents,</div><div class='add'>+			ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_UART3_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "uart3_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uart3_clk", "uart3_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART3_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5ca00000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart4_mux_clk", uart_parents,</div><div class='add'>+			ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_UART4_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "uart4_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uart4_clk", "uart4_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART4_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5cb00000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart5_mux_clk", uart_parents,</div><div class='add'>+			ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_UART5_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "uart5_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uart5_clk", "uart5_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART5_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5cc00000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "i2c1_mux_clk", i2c_parents,</div><div class='add'>+			ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_I2C1_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2c1_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2c1_clk", "i2c1_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5cd00000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "i2c2_mux_clk", i2c_parents,</div><div class='add'>+			ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_I2C2_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2c2_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2c2_clk", "i2c2_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C2_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5ce00000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "i2c3_mux_clk", i2c_parents,</div><div class='add'>+			ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_I2C3_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2c3_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2c3_clk", "i2c3_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C3_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5cf00000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "i2c4_mux_clk", i2c_parents,</div><div class='add'>+			ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_I2C4_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2c4_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2c4_clk", "i2c4_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C4_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5d000000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "i2c5_mux_clk", i2c_parents,</div><div class='add'>+			ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_I2C5_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2c5_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2c5_clk", "i2c5_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C5_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5d100000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "i2c6_mux_clk", i2c_parents,</div><div class='add'>+			ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_I2C6_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2c6_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2c6_clk", "i2c6_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C6_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5d200000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "i2c7_mux_clk", i2c_parents,</div><div class='add'>+			ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_I2C7_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2c7_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2c7_clk", "i2c7_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C7_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5d300000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "ssp1_mux_clk", ssp1_parents,</div><div class='add'>+			ARRAY_SIZE(ssp1_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_SSP1_CLK_SHIFT, SPEAR1310_SSP1_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ssp1_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ssp1_clk", "ssp1_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_SSP1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "5d400000.spi");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "pci_mux_clk", pci_parents,</div><div class='add'>+			ARRAY_SIZE(pci_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_PCI_CLK_SHIFT, SPEAR1310_PCI_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "pci_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "pci_clk", "pci_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_PCI_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "pci");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "tdm1_mux_clk", tdm_parents,</div><div class='add'>+			ARRAY_SIZE(tdm_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_TDM1_CLK_SHIFT, SPEAR1310_TDM_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "tdm1_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "tdm1_clk", "tdm1_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_TDM1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "tdm_hdlc.0");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "tdm2_mux_clk", tdm_parents,</div><div class='add'>+			ARRAY_SIZE(tdm_parents), 0, SPEAR1310_RAS_CTRL_REG0,</div><div class='add'>+			SPEAR1310_TDM2_CLK_SHIFT, SPEAR1310_TDM_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "tdm2_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "tdm2_clk", "tdm2_mux_clk", 0,</div><div class='add'>+			SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_TDM2_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "tdm_hdlc.1");</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c<br/>new file mode 100644<br/>index 000000000000..f130919d5bf8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/spear/spear1340_clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/spear1340_clock.c</a></div><div class='hunk'>@@ -0,0 +1,964 @@</div><div class='add'>+/*</div><div class='add'>+ * arch/arm/mach-spear13xx/spear1340_clock.c</div><div class='add'>+ *</div><div class='add'>+ * SPEAr1340 machine clock framework source file</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/spinlock_types.h&gt;</div><div class='add'>+#include &lt;mach/spear.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+/* Clock Configuration Registers */</div><div class='add'>+#define SPEAR1340_SYS_CLK_CTRL			(VA_MISC_BASE + 0x200)</div><div class='add'>+	#define SPEAR1340_HCLK_SRC_SEL_SHIFT	27</div><div class='add'>+	#define SPEAR1340_HCLK_SRC_SEL_MASK	1</div><div class='add'>+	#define SPEAR1340_SCLK_SRC_SEL_SHIFT	23</div><div class='add'>+	#define SPEAR1340_SCLK_SRC_SEL_MASK	3</div><div class='add'>+</div><div class='add'>+/* PLL related registers and bit values */</div><div class='add'>+#define SPEAR1340_PLL_CFG			(VA_MISC_BASE + 0x210)</div><div class='add'>+	/* PLL_CFG bit values */</div><div class='add'>+	#define SPEAR1340_CLCD_SYNT_CLK_MASK		1</div><div class='add'>+	#define SPEAR1340_CLCD_SYNT_CLK_SHIFT		31</div><div class='add'>+	#define SPEAR1340_GEN_SYNT2_3_CLK_SHIFT		29</div><div class='add'>+	#define SPEAR1340_GEN_SYNT_CLK_MASK		2</div><div class='add'>+	#define SPEAR1340_GEN_SYNT0_1_CLK_SHIFT		27</div><div class='add'>+	#define SPEAR1340_PLL_CLK_MASK			2</div><div class='add'>+	#define SPEAR1340_PLL3_CLK_SHIFT		24</div><div class='add'>+	#define SPEAR1340_PLL2_CLK_SHIFT		22</div><div class='add'>+	#define SPEAR1340_PLL1_CLK_SHIFT		20</div><div class='add'>+</div><div class='add'>+#define SPEAR1340_PLL1_CTR			(VA_MISC_BASE + 0x214)</div><div class='add'>+#define SPEAR1340_PLL1_FRQ			(VA_MISC_BASE + 0x218)</div><div class='add'>+#define SPEAR1340_PLL2_CTR			(VA_MISC_BASE + 0x220)</div><div class='add'>+#define SPEAR1340_PLL2_FRQ			(VA_MISC_BASE + 0x224)</div><div class='add'>+#define SPEAR1340_PLL3_CTR			(VA_MISC_BASE + 0x22C)</div><div class='add'>+#define SPEAR1340_PLL3_FRQ			(VA_MISC_BASE + 0x230)</div><div class='add'>+#define SPEAR1340_PLL4_CTR			(VA_MISC_BASE + 0x238)</div><div class='add'>+#define SPEAR1340_PLL4_FRQ			(VA_MISC_BASE + 0x23C)</div><div class='add'>+#define SPEAR1340_PERIP_CLK_CFG			(VA_MISC_BASE + 0x244)</div><div class='add'>+	/* PERIP_CLK_CFG bit values */</div><div class='add'>+	#define SPEAR1340_SPDIF_CLK_MASK		1</div><div class='add'>+	#define SPEAR1340_SPDIF_OUT_CLK_SHIFT		15</div><div class='add'>+	#define SPEAR1340_SPDIF_IN_CLK_SHIFT		14</div><div class='add'>+	#define SPEAR1340_GPT3_CLK_SHIFT		13</div><div class='add'>+	#define SPEAR1340_GPT2_CLK_SHIFT		12</div><div class='add'>+	#define SPEAR1340_GPT_CLK_MASK			1</div><div class='add'>+	#define SPEAR1340_GPT1_CLK_SHIFT		9</div><div class='add'>+	#define SPEAR1340_GPT0_CLK_SHIFT		8</div><div class='add'>+	#define SPEAR1340_UART_CLK_MASK			2</div><div class='add'>+	#define SPEAR1340_UART1_CLK_SHIFT		6</div><div class='add'>+	#define SPEAR1340_UART0_CLK_SHIFT		4</div><div class='add'>+	#define SPEAR1340_CLCD_CLK_MASK			2</div><div class='add'>+	#define SPEAR1340_CLCD_CLK_SHIFT		2</div><div class='add'>+	#define SPEAR1340_C3_CLK_MASK			1</div><div class='add'>+	#define SPEAR1340_C3_CLK_SHIFT			1</div><div class='add'>+</div><div class='add'>+#define SPEAR1340_GMAC_CLK_CFG			(VA_MISC_BASE + 0x248)</div><div class='add'>+	#define SPEAR1340_GMAC_PHY_CLK_MASK		1</div><div class='add'>+	#define SPEAR1340_GMAC_PHY_CLK_SHIFT		2</div><div class='add'>+	#define SPEAR1340_GMAC_PHY_INPUT_CLK_MASK	2</div><div class='add'>+	#define SPEAR1340_GMAC_PHY_INPUT_CLK_SHIFT	0</div><div class='add'>+</div><div class='add'>+#define SPEAR1340_I2S_CLK_CFG			(VA_MISC_BASE + 0x24C)</div><div class='add'>+	/* I2S_CLK_CFG register mask */</div><div class='add'>+	#define SPEAR1340_I2S_SCLK_X_MASK		0x1F</div><div class='add'>+	#define SPEAR1340_I2S_SCLK_X_SHIFT		27</div><div class='add'>+	#define SPEAR1340_I2S_SCLK_Y_MASK		0x1F</div><div class='add'>+	#define SPEAR1340_I2S_SCLK_Y_SHIFT		22</div><div class='add'>+	#define SPEAR1340_I2S_SCLK_EQ_SEL_SHIFT		21</div><div class='add'>+	#define SPEAR1340_I2S_SCLK_SYNTH_ENB		20</div><div class='add'>+	#define SPEAR1340_I2S_PRS1_CLK_X_MASK		0xFF</div><div class='add'>+	#define SPEAR1340_I2S_PRS1_CLK_X_SHIFT		12</div><div class='add'>+	#define SPEAR1340_I2S_PRS1_CLK_Y_MASK		0xFF</div><div class='add'>+	#define SPEAR1340_I2S_PRS1_CLK_Y_SHIFT		4</div><div class='add'>+	#define SPEAR1340_I2S_PRS1_EQ_SEL_SHIFT		3</div><div class='add'>+	#define SPEAR1340_I2S_REF_SEL_MASK		1</div><div class='add'>+	#define SPEAR1340_I2S_REF_SHIFT			2</div><div class='add'>+	#define SPEAR1340_I2S_SRC_CLK_MASK		2</div><div class='add'>+	#define SPEAR1340_I2S_SRC_CLK_SHIFT		0</div><div class='add'>+</div><div class='add'>+#define SPEAR1340_C3_CLK_SYNT			(VA_MISC_BASE + 0x250)</div><div class='add'>+#define SPEAR1340_UART0_CLK_SYNT		(VA_MISC_BASE + 0x254)</div><div class='add'>+#define SPEAR1340_UART1_CLK_SYNT		(VA_MISC_BASE + 0x258)</div><div class='add'>+#define SPEAR1340_GMAC_CLK_SYNT			(VA_MISC_BASE + 0x25C)</div><div class='add'>+#define SPEAR1340_SDHCI_CLK_SYNT		(VA_MISC_BASE + 0x260)</div><div class='add'>+#define SPEAR1340_CFXD_CLK_SYNT			(VA_MISC_BASE + 0x264)</div><div class='add'>+#define SPEAR1340_ADC_CLK_SYNT			(VA_MISC_BASE + 0x270)</div><div class='add'>+#define SPEAR1340_AMBA_CLK_SYNT			(VA_MISC_BASE + 0x274)</div><div class='add'>+#define SPEAR1340_CLCD_CLK_SYNT			(VA_MISC_BASE + 0x27C)</div><div class='add'>+#define SPEAR1340_SYS_CLK_SYNT			(VA_MISC_BASE + 0x284)</div><div class='add'>+#define SPEAR1340_GEN_CLK_SYNT0			(VA_MISC_BASE + 0x28C)</div><div class='add'>+#define SPEAR1340_GEN_CLK_SYNT1			(VA_MISC_BASE + 0x294)</div><div class='add'>+#define SPEAR1340_GEN_CLK_SYNT2			(VA_MISC_BASE + 0x29C)</div><div class='add'>+#define SPEAR1340_GEN_CLK_SYNT3			(VA_MISC_BASE + 0x304)</div><div class='add'>+#define SPEAR1340_PERIP1_CLK_ENB		(VA_MISC_BASE + 0x30C)</div><div class='add'>+	#define SPEAR1340_RTC_CLK_ENB			31</div><div class='add'>+	#define SPEAR1340_ADC_CLK_ENB			30</div><div class='add'>+	#define SPEAR1340_C3_CLK_ENB			29</div><div class='add'>+	#define SPEAR1340_CLCD_CLK_ENB			27</div><div class='add'>+	#define SPEAR1340_DMA_CLK_ENB			25</div><div class='add'>+	#define SPEAR1340_GPIO1_CLK_ENB			24</div><div class='add'>+	#define SPEAR1340_GPIO0_CLK_ENB			23</div><div class='add'>+	#define SPEAR1340_GPT1_CLK_ENB			22</div><div class='add'>+	#define SPEAR1340_GPT0_CLK_ENB			21</div><div class='add'>+	#define SPEAR1340_I2S_PLAY_CLK_ENB		20</div><div class='add'>+	#define SPEAR1340_I2S_REC_CLK_ENB		19</div><div class='add'>+	#define SPEAR1340_I2C0_CLK_ENB			18</div><div class='add'>+	#define SPEAR1340_SSP_CLK_ENB			17</div><div class='add'>+	#define SPEAR1340_UART0_CLK_ENB			15</div><div class='add'>+	#define SPEAR1340_PCIE_SATA_CLK_ENB		12</div><div class='add'>+	#define SPEAR1340_UOC_CLK_ENB			11</div><div class='add'>+	#define SPEAR1340_UHC1_CLK_ENB			10</div><div class='add'>+	#define SPEAR1340_UHC0_CLK_ENB			9</div><div class='add'>+	#define SPEAR1340_GMAC_CLK_ENB			8</div><div class='add'>+	#define SPEAR1340_CFXD_CLK_ENB			7</div><div class='add'>+	#define SPEAR1340_SDHCI_CLK_ENB			6</div><div class='add'>+	#define SPEAR1340_SMI_CLK_ENB			5</div><div class='add'>+	#define SPEAR1340_FSMC_CLK_ENB			4</div><div class='add'>+	#define SPEAR1340_SYSRAM0_CLK_ENB		3</div><div class='add'>+	#define SPEAR1340_SYSRAM1_CLK_ENB		2</div><div class='add'>+	#define SPEAR1340_SYSROM_CLK_ENB		1</div><div class='add'>+	#define SPEAR1340_BUS_CLK_ENB			0</div><div class='add'>+</div><div class='add'>+#define SPEAR1340_PERIP2_CLK_ENB		(VA_MISC_BASE + 0x310)</div><div class='add'>+	#define SPEAR1340_THSENS_CLK_ENB		8</div><div class='add'>+	#define SPEAR1340_I2S_REF_PAD_CLK_ENB		7</div><div class='add'>+	#define SPEAR1340_ACP_CLK_ENB			6</div><div class='add'>+	#define SPEAR1340_GPT3_CLK_ENB			5</div><div class='add'>+	#define SPEAR1340_GPT2_CLK_ENB			4</div><div class='add'>+	#define SPEAR1340_KBD_CLK_ENB			3</div><div class='add'>+	#define SPEAR1340_CPU_DBG_CLK_ENB		2</div><div class='add'>+	#define SPEAR1340_DDR_CORE_CLK_ENB		1</div><div class='add'>+	#define SPEAR1340_DDR_CTRL_CLK_ENB		0</div><div class='add'>+</div><div class='add'>+#define SPEAR1340_PERIP3_CLK_ENB		(VA_MISC_BASE + 0x314)</div><div class='add'>+	#define SPEAR1340_PLGPIO_CLK_ENB		18</div><div class='add'>+	#define SPEAR1340_VIDEO_DEC_CLK_ENB		16</div><div class='add'>+	#define SPEAR1340_VIDEO_ENC_CLK_ENB		15</div><div class='add'>+	#define SPEAR1340_SPDIF_OUT_CLK_ENB		13</div><div class='add'>+	#define SPEAR1340_SPDIF_IN_CLK_ENB		12</div><div class='add'>+	#define SPEAR1340_VIDEO_IN_CLK_ENB		11</div><div class='add'>+	#define SPEAR1340_CAM0_CLK_ENB			10</div><div class='add'>+	#define SPEAR1340_CAM1_CLK_ENB			9</div><div class='add'>+	#define SPEAR1340_CAM2_CLK_ENB			8</div><div class='add'>+	#define SPEAR1340_CAM3_CLK_ENB			7</div><div class='add'>+	#define SPEAR1340_MALI_CLK_ENB			6</div><div class='add'>+	#define SPEAR1340_CEC0_CLK_ENB			5</div><div class='add'>+	#define SPEAR1340_CEC1_CLK_ENB			4</div><div class='add'>+	#define SPEAR1340_PWM_CLK_ENB			3</div><div class='add'>+	#define SPEAR1340_I2C1_CLK_ENB			2</div><div class='add'>+	#define SPEAR1340_UART1_CLK_ENB			1</div><div class='add'>+</div><div class='add'>+static DEFINE_SPINLOCK(_lock);</div><div class='add'>+</div><div class='add'>+/* pll rate configuration table, in ascending order of rates */</div><div class='add'>+static struct pll_rate_tbl pll_rtbl[] = {</div><div class='add'>+	/* PCLK 24MHz */</div><div class='add'>+	{.mode = 0, .m = 0x83, .n = 0x04, .p = 0x5}, /* vco 1572, pll 49.125 MHz */</div><div class='add'>+	{.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x3}, /* vco 1000, pll 125 MHz */</div><div class='add'>+	{.mode = 0, .m = 0x64, .n = 0x06, .p = 0x1}, /* vco 800, pll 400 MHz */</div><div class='add'>+	{.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x1}, /* vco 1000, pll 500 MHz */</div><div class='add'>+	{.mode = 0, .m = 0xA6, .n = 0x06, .p = 0x1}, /* vco 1328, pll 664 MHz */</div><div class='add'>+	{.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x1}, /* vco 1600, pll 800 MHz */</div><div class='add'>+	{.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x0}, /* vco 1, pll 1 GHz */</div><div class='add'>+	{.mode = 0, .m = 0x96, .n = 0x06, .p = 0x0}, /* vco 1200, pll 1200 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* vco-pll4 rate configuration table, in ascending order of rates */</div><div class='add'>+static struct pll_rate_tbl pll4_rtbl[] = {</div><div class='add'>+	{.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x2}, /* vco 1000, pll 250 MHz */</div><div class='add'>+	{.mode = 0, .m = 0xA6, .n = 0x06, .p = 0x2}, /* vco 1328, pll 332 MHz */</div><div class='add'>+	{.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x2}, /* vco 1600, pll 400 MHz */</div><div class='add'>+	{.mode = 0, .m = 0x7D, .n = 0x06, .p = 0x0}, /* vco 1, pll 1 GHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * All below entries generate 166 MHz for</div><div class='add'>+ * different values of vco1div2</div><div class='add'>+ */</div><div class='add'>+static struct frac_rate_tbl amba_synth_rtbl[] = {</div><div class='add'>+	{.div = 0x06062}, /* for vco1div2 = 500 MHz */</div><div class='add'>+	{.div = 0x04D1B}, /* for vco1div2 = 400 MHz */</div><div class='add'>+	{.div = 0x04000}, /* for vco1div2 = 332 MHz */</div><div class='add'>+	{.div = 0x03031}, /* for vco1div2 = 250 MHz */</div><div class='add'>+	{.div = 0x0268D}, /* for vco1div2 = 200 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Synthesizer Clock derived from vcodiv2. This clock is one of the</div><div class='add'>+ * possible clocks to feed cpu directly.</div><div class='add'>+ * We can program this synthesizer to make cpu run on different clock</div><div class='add'>+ * frequencies.</div><div class='add'>+ * Following table provides configuration values to let cpu run on 200,</div><div class='add'>+ * 250, 332, 400 or 500 MHz considering different possibilites of input</div><div class='add'>+ * (vco1div2) clock.</div><div class='add'>+ *</div><div class='add'>+ * --------------------------------------------------------------------</div><div class='add'>+ * vco1div2(Mhz)	fout(Mhz)	cpuclk = fout/2		div</div><div class='add'>+ * --------------------------------------------------------------------</div><div class='add'>+ * 400			200		100			0x04000</div><div class='add'>+ * 400			250		125			0x03333</div><div class='add'>+ * 400			332		166			0x0268D</div><div class='add'>+ * 400			400		200			0x02000</div><div class='add'>+ * --------------------------------------------------------------------</div><div class='add'>+ * 500			200		100			0x05000</div><div class='add'>+ * 500			250		125			0x04000</div><div class='add'>+ * 500			332		166			0x03031</div><div class='add'>+ * 500			400		200			0x02800</div><div class='add'>+ * 500			500		250			0x02000</div><div class='add'>+ * --------------------------------------------------------------------</div><div class='add'>+ * 664			200		100			0x06a38</div><div class='add'>+ * 664			250		125			0x054FD</div><div class='add'>+ * 664			332		166			0x04000</div><div class='add'>+ * 664			400		200			0x0351E</div><div class='add'>+ * 664			500		250			0x02A7E</div><div class='add'>+ * --------------------------------------------------------------------</div><div class='add'>+ * 800			200		100			0x08000</div><div class='add'>+ * 800			250		125			0x06666</div><div class='add'>+ * 800			332		166			0x04D18</div><div class='add'>+ * 800			400		200			0x04000</div><div class='add'>+ * 800			500		250			0x03333</div><div class='add'>+ * --------------------------------------------------------------------</div><div class='add'>+ * sys rate configuration table is in descending order of divisor.</div><div class='add'>+ */</div><div class='add'>+static struct frac_rate_tbl sys_synth_rtbl[] = {</div><div class='add'>+	{.div = 0x08000},</div><div class='add'>+	{.div = 0x06a38},</div><div class='add'>+	{.div = 0x06666},</div><div class='add'>+	{.div = 0x054FD},</div><div class='add'>+	{.div = 0x05000},</div><div class='add'>+	{.div = 0x04D18},</div><div class='add'>+	{.div = 0x04000},</div><div class='add'>+	{.div = 0x0351E},</div><div class='add'>+	{.div = 0x03333},</div><div class='add'>+	{.div = 0x03031},</div><div class='add'>+	{.div = 0x02A7E},</div><div class='add'>+	{.div = 0x02800},</div><div class='add'>+	{.div = 0x0268D},</div><div class='add'>+	{.div = 0x02000},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* aux rate configuration table, in ascending order of rates */</div><div class='add'>+static struct aux_rate_tbl aux_rtbl[] = {</div><div class='add'>+	/* For VCO1div2 = 500 MHz */</div><div class='add'>+	{.xscale = 10, .yscale = 204, .eq = 0}, /* 12.29 MHz */</div><div class='add'>+	{.xscale = 4, .yscale = 21, .eq = 0}, /* 48 MHz */</div><div class='add'>+	{.xscale = 2, .yscale = 6, .eq = 0}, /* 83 MHz */</div><div class='add'>+	{.xscale = 2, .yscale = 4, .eq = 0}, /* 125 MHz */</div><div class='add'>+	{.xscale = 1, .yscale = 3, .eq = 1}, /* 166 MHz */</div><div class='add'>+	{.xscale = 1, .yscale = 2, .eq = 1}, /* 250 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gmac rate configuration table, in ascending order of rates */</div><div class='add'>+static struct aux_rate_tbl gmac_rtbl[] = {</div><div class='add'>+	/* For gmac phy input clk */</div><div class='add'>+	{.xscale = 2, .yscale = 6, .eq = 0}, /* divided by 6 */</div><div class='add'>+	{.xscale = 2, .yscale = 4, .eq = 0}, /* divided by 4 */</div><div class='add'>+	{.xscale = 1, .yscale = 3, .eq = 1}, /* divided by 3 */</div><div class='add'>+	{.xscale = 1, .yscale = 2, .eq = 1}, /* divided by 2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* clcd rate configuration table, in ascending order of rates */</div><div class='add'>+static struct frac_rate_tbl clcd_rtbl[] = {</div><div class='add'>+	{.div = 0x14000}, /* 25 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x1284B}, /* 27 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x0D8D3}, /* 58 Mhz , for vco1div4 = 393 MHz */</div><div class='add'>+	{.div = 0x0B72C}, /* 58 Mhz , for vco1div4 = 332 MHz */</div><div class='add'>+	{.div = 0x089EE}, /* 58 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x07BA0}, /* 65 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x06f1C}, /* 72 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x06E58}, /* 58 Mhz , for vco1div4 = 200 MHz */</div><div class='add'>+	{.div = 0x06c1B}, /* 74 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x04A12}, /* 108 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x0378E}, /* 144 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x0360D}, /* 148 Mhz , for vc01div4 = 250 MHz*/</div><div class='add'>+	{.div = 0x035E0}, /* 148.5 MHz, for vc01div4 = 250 MHz*/</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* i2s prescaler1 masks */</div><div class='add'>+static struct aux_clk_masks i2s_prs1_masks = {</div><div class='add'>+	.eq_sel_mask = AUX_EQ_SEL_MASK,</div><div class='add'>+	.eq_sel_shift = SPEAR1340_I2S_PRS1_EQ_SEL_SHIFT,</div><div class='add'>+	.eq1_mask = AUX_EQ1_SEL,</div><div class='add'>+	.eq2_mask = AUX_EQ2_SEL,</div><div class='add'>+	.xscale_sel_mask = SPEAR1340_I2S_PRS1_CLK_X_MASK,</div><div class='add'>+	.xscale_sel_shift = SPEAR1340_I2S_PRS1_CLK_X_SHIFT,</div><div class='add'>+	.yscale_sel_mask = SPEAR1340_I2S_PRS1_CLK_Y_MASK,</div><div class='add'>+	.yscale_sel_shift = SPEAR1340_I2S_PRS1_CLK_Y_SHIFT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* i2s sclk (bit clock) syynthesizers masks */</div><div class='add'>+static struct aux_clk_masks i2s_sclk_masks = {</div><div class='add'>+	.eq_sel_mask = AUX_EQ_SEL_MASK,</div><div class='add'>+	.eq_sel_shift = SPEAR1340_I2S_SCLK_EQ_SEL_SHIFT,</div><div class='add'>+	.eq1_mask = AUX_EQ1_SEL,</div><div class='add'>+	.eq2_mask = AUX_EQ2_SEL,</div><div class='add'>+	.xscale_sel_mask = SPEAR1340_I2S_SCLK_X_MASK,</div><div class='add'>+	.xscale_sel_shift = SPEAR1340_I2S_SCLK_X_SHIFT,</div><div class='add'>+	.yscale_sel_mask = SPEAR1340_I2S_SCLK_Y_MASK,</div><div class='add'>+	.yscale_sel_shift = SPEAR1340_I2S_SCLK_Y_SHIFT,</div><div class='add'>+	.enable_bit = SPEAR1340_I2S_SCLK_SYNTH_ENB,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* i2s prs1 aux rate configuration table, in ascending order of rates */</div><div class='add'>+static struct aux_rate_tbl i2s_prs1_rtbl[] = {</div><div class='add'>+	/* For parent clk = 49.152 MHz */</div><div class='add'>+	{.xscale = 1, .yscale = 12, .eq = 0}, /* 2.048 MHz, smp freq = 8Khz */</div><div class='add'>+	{.xscale = 11, .yscale = 96, .eq = 0}, /* 2.816 MHz, smp freq = 11Khz */</div><div class='add'>+	{.xscale = 1, .yscale = 6, .eq = 0}, /* 4.096 MHz, smp freq = 16Khz */</div><div class='add'>+	{.xscale = 11, .yscale = 48, .eq = 0}, /* 5.632 MHz, smp freq = 22Khz */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * with parent clk = 49.152, freq gen is 8.192 MHz, smp freq = 32Khz</div><div class='add'>+	 * with parent clk = 12.288, freq gen is 2.048 MHz, smp freq = 8Khz</div><div class='add'>+	 */</div><div class='add'>+	{.xscale = 1, .yscale = 3, .eq = 0},</div><div class='add'>+</div><div class='add'>+	/* For parent clk = 49.152 MHz */</div><div class='add'>+	{.xscale = 17, .yscale = 37, .eq = 0}, /* 11.289 MHz, smp freq = 44Khz*/</div><div class='add'>+	{.xscale = 1, .yscale = 2, .eq = 0}, /* 12.288 MHz, smp freq = 48Khz*/</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* i2s sclk aux rate configuration table, in ascending order of rates */</div><div class='add'>+static struct aux_rate_tbl i2s_sclk_rtbl[] = {</div><div class='add'>+	/* For sclk = ref_clk * x/2/y */</div><div class='add'>+	{.xscale = 1, .yscale = 4, .eq = 0},</div><div class='add'>+	{.xscale = 1, .yscale = 2, .eq = 0},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* adc rate configuration table, in ascending order of rates */</div><div class='add'>+/* possible adc range is 2.5 MHz to 20 MHz. */</div><div class='add'>+static struct aux_rate_tbl adc_rtbl[] = {</div><div class='add'>+	/* For ahb = 166.67 MHz */</div><div class='add'>+	{.xscale = 1, .yscale = 31, .eq = 0}, /* 2.68 MHz */</div><div class='add'>+	{.xscale = 2, .yscale = 21, .eq = 0}, /* 7.94 MHz */</div><div class='add'>+	{.xscale = 4, .yscale = 21, .eq = 0}, /* 15.87 MHz */</div><div class='add'>+	{.xscale = 10, .yscale = 42, .eq = 0}, /* 19.84 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* General synth rate configuration table, in ascending order of rates */</div><div class='add'>+static struct frac_rate_tbl gen_rtbl[] = {</div><div class='add'>+	/* For vco1div4 = 250 MHz */</div><div class='add'>+	{.div = 0x1624E}, /* 22.5792 MHz */</div><div class='add'>+	{.div = 0x14585}, /* 24.576 MHz */</div><div class='add'>+	{.div = 0x14000}, /* 25 MHz */</div><div class='add'>+	{.div = 0x0B127}, /* 45.1584 MHz */</div><div class='add'>+	{.div = 0x0A000}, /* 50 MHz */</div><div class='add'>+	{.div = 0x061A8}, /* 81.92 MHz */</div><div class='add'>+	{.div = 0x05000}, /* 100 MHz */</div><div class='add'>+	{.div = 0x02800}, /* 200 MHz */</div><div class='add'>+	{.div = 0x02620}, /* 210 MHz */</div><div class='add'>+	{.div = 0x02460}, /* 220 MHz */</div><div class='add'>+	{.div = 0x022C0}, /* 230 MHz */</div><div class='add'>+	{.div = 0x02160}, /* 240 MHz */</div><div class='add'>+	{.div = 0x02000}, /* 250 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* clock parents */</div><div class='add'>+static const char *vco_parents[] = { "osc_24m_clk", "osc_25m_clk", };</div><div class='add'>+static const char *sys_parents[] = { "none", "pll1_clk", "none", "none",</div><div class='add'>+	"sys_synth_clk", "none", "pll2_clk", "pll3_clk", };</div><div class='add'>+static const char *ahb_parents[] = { "cpu_div3_clk", "amba_synth_clk", };</div><div class='add'>+static const char *gpt_parents[] = { "osc_24m_clk", "apb_clk", };</div><div class='add'>+static const char *uart0_parents[] = { "pll5_clk", "osc_24m_clk",</div><div class='add'>+	"uart0_synth_gate_clk", };</div><div class='add'>+static const char *uart1_parents[] = { "pll5_clk", "osc_24m_clk",</div><div class='add'>+	"uart1_synth_gate_clk", };</div><div class='add'>+static const char *c3_parents[] = { "pll5_clk", "c3_synth_gate_clk", };</div><div class='add'>+static const char *gmac_phy_input_parents[] = { "gmii_125m_pad_clk", "pll2_clk",</div><div class='add'>+	"osc_25m_clk", };</div><div class='add'>+static const char *gmac_phy_parents[] = { "gmac_phy_input_mux_clk",</div><div class='add'>+	"gmac_phy_synth_gate_clk", };</div><div class='add'>+static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", };</div><div class='add'>+static const char *clcd_pixel_parents[] = { "pll5_clk", "clcd_synth_clk", };</div><div class='add'>+static const char *i2s_src_parents[] = { "vco1div2_clk", "pll2_clk", "pll3_clk",</div><div class='add'>+	"i2s_src_pad_clk", };</div><div class='add'>+static const char *i2s_ref_parents[] = { "i2s_src_mux_clk", "i2s_prs1_clk", };</div><div class='add'>+static const char *spdif_out_parents[] = { "i2s_src_pad_clk", "gen_synth2_clk",</div><div class='add'>+};</div><div class='add'>+static const char *spdif_in_parents[] = { "pll2_clk", "gen_synth3_clk", };</div><div class='add'>+</div><div class='add'>+static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk",</div><div class='add'>+	"pll3_clk", };</div><div class='add'>+static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco3div2_clk",</div><div class='add'>+	"pll2_clk", };</div><div class='add'>+</div><div class='add'>+void __init spear1340_clk_init(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk, *clk1;</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);</div><div class='add'>+	clk_register_clkdev(clk, "apb_pclk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,</div><div class='add'>+			32000);</div><div class='add'>+	clk_register_clkdev(clk, "osc_32k_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT,</div><div class='add'>+			24000000);</div><div class='add'>+	clk_register_clkdev(clk, "osc_24m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, CLK_IS_ROOT,</div><div class='add'>+			25000000);</div><div class='add'>+	clk_register_clkdev(clk, "osc_25m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "gmii_125m_pad_clk", NULL,</div><div class='add'>+			CLK_IS_ROOT, 125000000);</div><div class='add'>+	clk_register_clkdev(clk, "gmii_125m_pad_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL,</div><div class='add'>+			CLK_IS_ROOT, 12288000);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_src_pad_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* clock derived from 32 KHz osc clk */</div><div class='add'>+	clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_RTC_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "fc900000.rtc");</div><div class='add'>+</div><div class='add'>+	/* clock derived from 24 or 25 MHz osc clk */</div><div class='add'>+	/* vco-pll */</div><div class='add'>+	clk = clk_register_mux(NULL, "vco1_mux_clk", vco_parents,</div><div class='add'>+			ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG,</div><div class='add'>+			SPEAR1340_PLL1_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "vco1_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mux_clk",</div><div class='add'>+			0, SPEAR1340_PLL1_CTR, SPEAR1340_PLL1_FRQ, pll_rtbl,</div><div class='add'>+			ARRAY_SIZE(pll_rtbl), &amp;_lock, &amp;clk1, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "vco1_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "pll1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "vco2_mux_clk", vco_parents,</div><div class='add'>+			ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG,</div><div class='add'>+			SPEAR1340_PLL2_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "vco2_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mux_clk",</div><div class='add'>+			0, SPEAR1340_PLL2_CTR, SPEAR1340_PLL2_FRQ, pll_rtbl,</div><div class='add'>+			ARRAY_SIZE(pll_rtbl), &amp;_lock, &amp;clk1, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "vco2_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "pll2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "vco3_mux_clk", vco_parents,</div><div class='add'>+			ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG,</div><div class='add'>+			SPEAR1340_PLL3_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "vco3_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mux_clk",</div><div class='add'>+			0, SPEAR1340_PLL3_CTR, SPEAR1340_PLL3_FRQ, pll_rtbl,</div><div class='add'>+			ARRAY_SIZE(pll_rtbl), &amp;_lock, &amp;clk1, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "vco3_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "pll3_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_vco_pll("vco4_clk", "pll4_clk", NULL, "osc_24m_clk",</div><div class='add'>+			0, SPEAR1340_PLL4_CTR, SPEAR1340_PLL4_FRQ, pll4_rtbl,</div><div class='add'>+			ARRAY_SIZE(pll4_rtbl), &amp;_lock, &amp;clk1, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "vco4_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "pll4_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "pll5_clk", "osc_24m_clk", 0,</div><div class='add'>+			48000000);</div><div class='add'>+	clk_register_clkdev(clk, "pll5_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "pll6_clk", "osc_25m_clk", 0,</div><div class='add'>+			25000000);</div><div class='add'>+	clk_register_clkdev(clk, "pll6_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* vco div n clocks */</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "vco1div2_clk", "vco1_clk", 0, 1,</div><div class='add'>+			2);</div><div class='add'>+	clk_register_clkdev(clk, "vco1div2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "vco1div4_clk", "vco1_clk", 0, 1,</div><div class='add'>+			4);</div><div class='add'>+	clk_register_clkdev(clk, "vco1div4_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "vco2div2_clk", "vco2_clk", 0, 1,</div><div class='add'>+			2);</div><div class='add'>+	clk_register_clkdev(clk, "vco2div2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "vco3div2_clk", "vco3_clk", 0, 1,</div><div class='add'>+			2);</div><div class='add'>+	clk_register_clkdev(clk, "vco3div2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* peripherals */</div><div class='add'>+	clk_register_fixed_factor(NULL, "thermal_clk", "osc_24m_clk", 0, 1,</div><div class='add'>+			128);</div><div class='add'>+	clk = clk_register_gate(NULL, "thermal_gate_clk", "thermal_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_THSENS_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "spear_thermal");</div><div class='add'>+</div><div class='add'>+	/* clock derived from pll4 clk */</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "ddr_clk", "pll4_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, "ddr_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* clock derived from pll1 clk */</div><div class='add'>+	clk = clk_register_frac("sys_synth_clk", "vco1div2_clk", 0,</div><div class='add'>+			SPEAR1340_SYS_CLK_SYNT, sys_synth_rtbl,</div><div class='add'>+			ARRAY_SIZE(sys_synth_rtbl), &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "sys_synth_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_frac("amba_synth_clk", "vco1div2_clk", 0,</div><div class='add'>+			SPEAR1340_AMBA_CLK_SYNT, amba_synth_rtbl,</div><div class='add'>+			ARRAY_SIZE(amba_synth_rtbl), &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "amba_synth_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "sys_mux_clk", sys_parents,</div><div class='add'>+			ARRAY_SIZE(sys_parents), 0, SPEAR1340_SYS_CLK_CTRL,</div><div class='add'>+			SPEAR1340_SCLK_SRC_SEL_SHIFT,</div><div class='add'>+			SPEAR1340_SCLK_SRC_SEL_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "sys_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "cpu_clk", "sys_mux_clk", 0, 1,</div><div class='add'>+			2);</div><div class='add'>+	clk_register_clkdev(clk, "cpu_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "cpu_div3_clk", "cpu_clk", 0, 1,</div><div class='add'>+			3);</div><div class='add'>+	clk_register_clkdev(clk, "cpu_div3_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "wdt_clk", "cpu_clk", 0, 1,</div><div class='add'>+			2);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ec800620.wdt");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "ahb_clk", ahb_parents,</div><div class='add'>+			ARRAY_SIZE(ahb_parents), 0, SPEAR1340_SYS_CLK_CTRL,</div><div class='add'>+			SPEAR1340_HCLK_SRC_SEL_SHIFT,</div><div class='add'>+			SPEAR1340_HCLK_SRC_SEL_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ahb_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1,</div><div class='add'>+			2);</div><div class='add'>+	clk_register_clkdev(clk, "apb_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* gpt clocks */</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt0_mux_clk", gpt_parents,</div><div class='add'>+			ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1340_GPT0_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt0_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPT0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt0");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt_parents,</div><div class='add'>+			ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1340_GPT1_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt1_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPT1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt1");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt_parents,</div><div class='add'>+			ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1340_GPT2_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt2_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_GPT2_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt2");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt3_mux_clk", gpt_parents,</div><div class='add'>+			ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1340_GPT3_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt3_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_GPT3_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt3");</div><div class='add'>+</div><div class='add'>+	/* others */</div><div class='add'>+	clk = clk_register_aux("uart0_synth_clk", "uart0_synth_gate_clk",</div><div class='add'>+			"vco1div2_clk", 0, SPEAR1340_UART0_CLK_SYNT, NULL,</div><div class='add'>+			aux_rtbl, ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "uart0_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "uart0_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart0_mux_clk", uart0_parents,</div><div class='add'>+			ARRAY_SIZE(uart0_parents), 0, SPEAR1340_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1340_UART0_CLK_SHIFT, SPEAR1340_UART_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "uart0_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uart0_clk", "uart0_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UART0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0000000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("uart1_synth_clk", "uart1_synth_gate_clk",</div><div class='add'>+			"vco1div2_clk", 0, SPEAR1340_UART1_CLK_SYNT, NULL,</div><div class='add'>+			aux_rtbl, ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "uart1_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "uart1_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart1_mux_clk", uart1_parents,</div><div class='add'>+			ARRAY_SIZE(uart1_parents), 0, SPEAR1340_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1340_UART1_CLK_SHIFT, SPEAR1340_UART_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "uart1_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uart1_clk", "uart1_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UART1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b4100000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("sdhci_synth_clk", "sdhci_synth_gate_clk",</div><div class='add'>+			"vco1div2_clk", 0, SPEAR1340_SDHCI_CLK_SYNT, NULL,</div><div class='add'>+			aux_rtbl, ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "sdhci_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "sdhci_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_synth_gate_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SDHCI_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b3000000.sdhci");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("cfxd_synth_clk", "cfxd_synth_gate_clk",</div><div class='add'>+			"vco1div2_clk", 0, SPEAR1340_CFXD_CLK_SYNT, NULL,</div><div class='add'>+			aux_rtbl, ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "cfxd_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "cfxd_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_synth_gate_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CFXD_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b2800000.cf");</div><div class='add'>+	clk_register_clkdev(clk, NULL, "arasan_xd");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("c3_synth_clk", "c3_synth_gate_clk",</div><div class='add'>+			"vco1div2_clk", 0, SPEAR1340_C3_CLK_SYNT, NULL,</div><div class='add'>+			aux_rtbl, ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "c3_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "c3_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "c3_mux_clk", c3_parents,</div><div class='add'>+			ARRAY_SIZE(c3_parents), 0, SPEAR1340_PERIP_CLK_CFG,</div><div class='add'>+			SPEAR1340_C3_CLK_SHIFT, SPEAR1340_C3_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "c3_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "c3_clk", "c3_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_C3_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "c3");</div><div class='add'>+</div><div class='add'>+	/* gmac */</div><div class='add'>+	clk = clk_register_mux(NULL, "gmac_phy_input_mux_clk",</div><div class='add'>+			gmac_phy_input_parents,</div><div class='add'>+			ARRAY_SIZE(gmac_phy_input_parents), 0,</div><div class='add'>+			SPEAR1340_GMAC_CLK_CFG,</div><div class='add'>+			SPEAR1340_GMAC_PHY_INPUT_CLK_SHIFT,</div><div class='add'>+			SPEAR1340_GMAC_PHY_INPUT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gmac_phy_input_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("gmac_phy_synth_clk", "gmac_phy_synth_gate_clk",</div><div class='add'>+			"gmac_phy_input_mux_clk", 0, SPEAR1340_GMAC_CLK_SYNT,</div><div class='add'>+			NULL, gmac_rtbl, ARRAY_SIZE(gmac_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "gmac_phy_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "gmac_phy_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gmac_phy_mux_clk", gmac_phy_parents,</div><div class='add'>+			ARRAY_SIZE(gmac_phy_parents), 0,</div><div class='add'>+			SPEAR1340_PERIP_CLK_CFG, SPEAR1340_GMAC_PHY_CLK_SHIFT,</div><div class='add'>+			SPEAR1340_GMAC_PHY_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "stmmacphy.0");</div><div class='add'>+</div><div class='add'>+	/* clcd */</div><div class='add'>+	clk = clk_register_mux(NULL, "clcd_synth_mux_clk", clcd_synth_parents,</div><div class='add'>+			ARRAY_SIZE(clcd_synth_parents), 0,</div><div class='add'>+			SPEAR1340_CLCD_CLK_SYNT, SPEAR1340_CLCD_SYNT_CLK_SHIFT,</div><div class='add'>+			SPEAR1340_CLCD_SYNT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "clcd_synth_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_frac("clcd_synth_clk", "clcd_synth_mux_clk", 0,</div><div class='add'>+			SPEAR1340_CLCD_CLK_SYNT, clcd_rtbl,</div><div class='add'>+			ARRAY_SIZE(clcd_rtbl), &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "clcd_synth_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "clcd_pixel_mux_clk", clcd_pixel_parents,</div><div class='add'>+			ARRAY_SIZE(clcd_pixel_parents), 0,</div><div class='add'>+			SPEAR1340_PERIP_CLK_CFG, SPEAR1340_CLCD_CLK_SHIFT,</div><div class='add'>+			SPEAR1340_CLCD_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "clcd_pixel_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CLCD_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "clcd_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* i2s */</div><div class='add'>+	clk = clk_register_mux(NULL, "i2s_src_mux_clk", i2s_src_parents,</div><div class='add'>+			ARRAY_SIZE(i2s_src_parents), 0, SPEAR1340_I2S_CLK_CFG,</div><div class='add'>+			SPEAR1340_I2S_SRC_CLK_SHIFT, SPEAR1340_I2S_SRC_CLK_MASK,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_src_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mux_clk", 0,</div><div class='add'>+			SPEAR1340_I2S_CLK_CFG, &amp;i2s_prs1_masks, i2s_prs1_rtbl,</div><div class='add'>+			ARRAY_SIZE(i2s_prs1_rtbl), &amp;_lock, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_prs1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "i2s_ref_mux_clk", i2s_ref_parents,</div><div class='add'>+			ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1340_I2S_CLK_CFG,</div><div class='add'>+			SPEAR1340_I2S_REF_SHIFT, SPEAR1340_I2S_REF_SEL_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_ref_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_I2S_REF_PAD_CLK_ENB,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gate_clk",</div><div class='add'>+			"i2s_ref_mux_clk", 0, SPEAR1340_I2S_CLK_CFG,</div><div class='add'>+			&amp;i2s_sclk_masks, i2s_sclk_rtbl,</div><div class='add'>+			ARRAY_SIZE(i2s_sclk_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_sclk_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "i2s_sclk_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* clock derived from ahb clk */</div><div class='add'>+	clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_I2C0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0280000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2c1_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_I2C1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b4000000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_DMA_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ea800000.dma");</div><div class='add'>+	clk_register_clkdev(clk, NULL, "eb000000.dma");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GMAC_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e2000000.eth");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "fsmc_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_FSMC_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b0000000.flash");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SMI_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ea000000.flash");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "usbh0_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UHC0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "usbh.0_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "usbh1_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UHC1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "usbh.1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uoc_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UOC_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "uoc");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "pcie_sata_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_PCIE_SATA_CLK_ENB,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "dw_pcie");</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ahci");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "sysram0_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SYSRAM0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "sysram0_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "sysram1_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SYSRAM1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "sysram1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("adc_synth_clk", "adc_synth_gate_clk", "ahb_clk",</div><div class='add'>+			0, SPEAR1340_ADC_CLK_SYNT, NULL, adc_rtbl,</div><div class='add'>+			ARRAY_SIZE(adc_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "adc_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "adc_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "adc_clk", "adc_synth_gate_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_ADC_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "adc_clk");</div><div class='add'>+</div><div class='add'>+	/* clock derived from apb clk */</div><div class='add'>+	clk = clk_register_gate(NULL, "ssp_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SSP_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0100000.spi");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPIO0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0600000.gpio");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gpio1_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPIO1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0680000.gpio");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2s_play_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_I2S_PLAY_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b2400000.i2s");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2s_rec_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_I2S_REC_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b2000000.i2s");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "kbd_clk", "apb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_KBD_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0300000.kbd");</div><div class='add'>+</div><div class='add'>+	/* RAS clks */</div><div class='add'>+	clk = clk_register_mux(NULL, "gen_synth0_1_mux_clk",</div><div class='add'>+			gen_synth0_1_parents, ARRAY_SIZE(gen_synth0_1_parents),</div><div class='add'>+			0, SPEAR1340_PLL_CFG, SPEAR1340_GEN_SYNT0_1_CLK_SHIFT,</div><div class='add'>+			SPEAR1340_GEN_SYNT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen_synth0_1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gen_synth2_3_mux_clk",</div><div class='add'>+			gen_synth2_3_parents, ARRAY_SIZE(gen_synth2_3_parents),</div><div class='add'>+			0, SPEAR1340_PLL_CFG, SPEAR1340_GEN_SYNT2_3_CLK_SHIFT,</div><div class='add'>+			SPEAR1340_GEN_SYNT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen_synth2_3_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_frac("gen_synth0_clk", "gen_synth0_1_clk", 0,</div><div class='add'>+			SPEAR1340_GEN_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl),</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen_synth0_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_frac("gen_synth1_clk", "gen_synth0_1_clk", 0,</div><div class='add'>+			SPEAR1340_GEN_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl),</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen_synth1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_frac("gen_synth2_clk", "gen_synth2_3_clk", 0,</div><div class='add'>+			SPEAR1340_GEN_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl),</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen_synth2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_frac("gen_synth3_clk", "gen_synth2_3_clk", 0,</div><div class='add'>+			SPEAR1340_GEN_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl),</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen_synth3_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "mali_clk", "gen_synth3_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_MALI_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "mali");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "cec0_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CEC0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "spear_cec.0");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "cec1_clk", "ahb_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CEC1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "spear_cec.1");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "spdif_out_mux_clk", spdif_out_parents,</div><div class='add'>+			ARRAY_SIZE(spdif_out_parents), 0,</div><div class='add'>+			SPEAR1340_PERIP_CLK_CFG, SPEAR1340_SPDIF_OUT_CLK_SHIFT,</div><div class='add'>+			SPEAR1340_SPDIF_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "spdif_out_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "spdif_out_clk", "spdif_out_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_OUT_CLK_ENB,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "spdif-out");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "spdif_in_mux_clk", spdif_in_parents,</div><div class='add'>+			ARRAY_SIZE(spdif_in_parents), 0,</div><div class='add'>+			SPEAR1340_PERIP_CLK_CFG, SPEAR1340_SPDIF_IN_CLK_SHIFT,</div><div class='add'>+			SPEAR1340_SPDIF_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "spdif_in_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "spdif_in_clk", "spdif_in_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_IN_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "spdif-in");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "acp_clk", "acp_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_ACP_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "acp_clk");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "plgpio_clk", "plgpio_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PLGPIO_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "plgpio");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "video_dec_clk", "video_dec_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_DEC_CLK_ENB,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "video_dec");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "video_enc_clk", "video_enc_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_ENC_CLK_ENB,</div><div class='add'>+			0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "video_enc");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "video_in_clk", "video_in_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_IN_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "spear_vip");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "cam0_clk", "cam0_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM0_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "spear_camif.0");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "cam1_clk", "cam1_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM1_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "spear_camif.1");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "cam2_clk", "cam2_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM2_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "spear_camif.2");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "cam3_clk", "cam3_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM3_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "spear_camif.3");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "pwm_clk", "pwm_mux_clk", 0,</div><div class='add'>+			SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PWM_CLK_ENB, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "pwm");</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c<br/>new file mode 100644<br/>index 000000000000..440bb3e4c971<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/spear/spear3xx_clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/spear3xx_clock.c</a></div><div class='hunk'>@@ -0,0 +1,612 @@</div><div class='add'>+/*</div><div class='add'>+ * SPEAr3xx machines clock framework source file</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/spinlock_types.h&gt;</div><div class='add'>+#include &lt;mach/misc_regs.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+static DEFINE_SPINLOCK(_lock);</div><div class='add'>+</div><div class='add'>+#define PLL1_CTR			(MISC_BASE + 0x008)</div><div class='add'>+#define PLL1_FRQ			(MISC_BASE + 0x00C)</div><div class='add'>+#define PLL2_CTR			(MISC_BASE + 0x014)</div><div class='add'>+#define PLL2_FRQ			(MISC_BASE + 0x018)</div><div class='add'>+#define PLL_CLK_CFG			(MISC_BASE + 0x020)</div><div class='add'>+	/* PLL_CLK_CFG register masks */</div><div class='add'>+	#define MCTR_CLK_SHIFT		28</div><div class='add'>+	#define MCTR_CLK_MASK		3</div><div class='add'>+</div><div class='add'>+#define CORE_CLK_CFG			(MISC_BASE + 0x024)</div><div class='add'>+	/* CORE CLK CFG register masks */</div><div class='add'>+	#define GEN_SYNTH2_3_CLK_SHIFT	18</div><div class='add'>+	#define GEN_SYNTH2_3_CLK_MASK	1</div><div class='add'>+</div><div class='add'>+	#define HCLK_RATIO_SHIFT	10</div><div class='add'>+	#define HCLK_RATIO_MASK		2</div><div class='add'>+	#define PCLK_RATIO_SHIFT	8</div><div class='add'>+	#define PCLK_RATIO_MASK		2</div><div class='add'>+</div><div class='add'>+#define PERIP_CLK_CFG			(MISC_BASE + 0x028)</div><div class='add'>+	/* PERIP_CLK_CFG register masks */</div><div class='add'>+	#define UART_CLK_SHIFT		4</div><div class='add'>+	#define UART_CLK_MASK		1</div><div class='add'>+	#define FIRDA_CLK_SHIFT		5</div><div class='add'>+	#define FIRDA_CLK_MASK		2</div><div class='add'>+	#define GPT0_CLK_SHIFT		8</div><div class='add'>+	#define GPT1_CLK_SHIFT		11</div><div class='add'>+	#define GPT2_CLK_SHIFT		12</div><div class='add'>+	#define GPT_CLK_MASK		1</div><div class='add'>+</div><div class='add'>+#define PERIP1_CLK_ENB			(MISC_BASE + 0x02C)</div><div class='add'>+	/* PERIP1_CLK_ENB register masks */</div><div class='add'>+	#define UART_CLK_ENB		3</div><div class='add'>+	#define SSP_CLK_ENB		5</div><div class='add'>+	#define I2C_CLK_ENB		7</div><div class='add'>+	#define JPEG_CLK_ENB		8</div><div class='add'>+	#define FIRDA_CLK_ENB		10</div><div class='add'>+	#define GPT1_CLK_ENB		11</div><div class='add'>+	#define GPT2_CLK_ENB		12</div><div class='add'>+	#define ADC_CLK_ENB		15</div><div class='add'>+	#define RTC_CLK_ENB		17</div><div class='add'>+	#define GPIO_CLK_ENB		18</div><div class='add'>+	#define DMA_CLK_ENB		19</div><div class='add'>+	#define SMI_CLK_ENB		21</div><div class='add'>+	#define GMAC_CLK_ENB		23</div><div class='add'>+	#define USBD_CLK_ENB		24</div><div class='add'>+	#define USBH_CLK_ENB		25</div><div class='add'>+	#define C3_CLK_ENB		31</div><div class='add'>+</div><div class='add'>+#define RAS_CLK_ENB			(MISC_BASE + 0x034)</div><div class='add'>+	#define RAS_AHB_CLK_ENB		0</div><div class='add'>+	#define RAS_PLL1_CLK_ENB	1</div><div class='add'>+	#define RAS_APB_CLK_ENB		2</div><div class='add'>+	#define RAS_32K_CLK_ENB		3</div><div class='add'>+	#define RAS_24M_CLK_ENB		4</div><div class='add'>+	#define RAS_48M_CLK_ENB		5</div><div class='add'>+	#define RAS_PLL2_CLK_ENB	7</div><div class='add'>+	#define RAS_SYNT0_CLK_ENB	8</div><div class='add'>+	#define RAS_SYNT1_CLK_ENB	9</div><div class='add'>+	#define RAS_SYNT2_CLK_ENB	10</div><div class='add'>+	#define RAS_SYNT3_CLK_ENB	11</div><div class='add'>+</div><div class='add'>+#define PRSC0_CLK_CFG			(MISC_BASE + 0x044)</div><div class='add'>+#define PRSC1_CLK_CFG			(MISC_BASE + 0x048)</div><div class='add'>+#define PRSC2_CLK_CFG			(MISC_BASE + 0x04C)</div><div class='add'>+#define AMEM_CLK_CFG			(MISC_BASE + 0x050)</div><div class='add'>+	#define AMEM_CLK_ENB		0</div><div class='add'>+</div><div class='add'>+#define CLCD_CLK_SYNT			(MISC_BASE + 0x05C)</div><div class='add'>+#define FIRDA_CLK_SYNT			(MISC_BASE + 0x060)</div><div class='add'>+#define UART_CLK_SYNT			(MISC_BASE + 0x064)</div><div class='add'>+#define GMAC_CLK_SYNT			(MISC_BASE + 0x068)</div><div class='add'>+#define GEN0_CLK_SYNT			(MISC_BASE + 0x06C)</div><div class='add'>+#define GEN1_CLK_SYNT			(MISC_BASE + 0x070)</div><div class='add'>+#define GEN2_CLK_SYNT			(MISC_BASE + 0x074)</div><div class='add'>+#define GEN3_CLK_SYNT			(MISC_BASE + 0x078)</div><div class='add'>+</div><div class='add'>+/* pll rate configuration table, in ascending order of rates */</div><div class='add'>+static struct pll_rate_tbl pll_rtbl[] = {</div><div class='add'>+	{.mode = 0, .m = 0x53, .n = 0x0C, .p = 0x1}, /* vco 332 &amp; pll 166 MHz */</div><div class='add'>+	{.mode = 0, .m = 0x85, .n = 0x0C, .p = 0x1}, /* vco 532 &amp; pll 266 MHz */</div><div class='add'>+	{.mode = 0, .m = 0xA6, .n = 0x0C, .p = 0x1}, /* vco 664 &amp; pll 332 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* aux rate configuration table, in ascending order of rates */</div><div class='add'>+static struct aux_rate_tbl aux_rtbl[] = {</div><div class='add'>+	/* For PLL1 = 332 MHz */</div><div class='add'>+	{.xscale = 2, .yscale = 27, .eq = 0}, /* 12.296 MHz */</div><div class='add'>+	{.xscale = 2, .yscale = 8, .eq = 0}, /* 41.5 MHz */</div><div class='add'>+	{.xscale = 2, .yscale = 4, .eq = 0}, /* 83 MHz */</div><div class='add'>+	{.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpt rate configuration table, in ascending order of rates */</div><div class='add'>+static struct gpt_rate_tbl gpt_rtbl[] = {</div><div class='add'>+	/* For pll1 = 332 MHz */</div><div class='add'>+	{.mscale = 4, .nscale = 0}, /* 41.5 MHz */</div><div class='add'>+	{.mscale = 2, .nscale = 0}, /* 55.3 MHz */</div><div class='add'>+	{.mscale = 1, .nscale = 0}, /* 83 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* clock parents */</div><div class='add'>+static const char *uart0_parents[] = { "pll3_48m_clk", "uart_synth_gate_clk", };</div><div class='add'>+static const char *firda_parents[] = { "pll3_48m_clk", "firda_synth_gate_clk",</div><div class='add'>+};</div><div class='add'>+static const char *gpt0_parents[] = { "pll3_48m_clk", "gpt0_synth_clk", };</div><div class='add'>+static const char *gpt1_parents[] = { "pll3_48m_clk", "gpt1_synth_clk", };</div><div class='add'>+static const char *gpt2_parents[] = { "pll3_48m_clk", "gpt2_synth_clk", };</div><div class='add'>+static const char *gen2_3_parents[] = { "pll1_clk", "pll2_clk", };</div><div class='add'>+static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none",</div><div class='add'>+	"pll2_clk", };</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MACH_SPEAR300</div><div class='add'>+static void __init spear300_clk_init(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk;</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_48m_clk", 0,</div><div class='add'>+			1, 1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "60000000.clcd");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "fsmc_clk", "ras_ahb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "94000000.flash");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "sdhci_clk", "ras_ahb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "70000000.sdhci");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "gpio1_clk", "ras_apb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "a9000000.gpio");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "kbd_clk", "ras_apb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "a0000000.kbd");</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* array of all spear 310 clock lookups */</div><div class='add'>+#ifdef CONFIG_MACH_SPEAR310</div><div class='add'>+static void __init spear310_clk_init(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk;</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "emi_clk", "ras_ahb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, "emi", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "fsmc_clk", "ras_ahb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "44000000.flash");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "tdm_clk", "ras_ahb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "tdm");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "uart1_clk", "ras_apb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b2000000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "uart2_clk", "ras_apb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b2080000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "uart3_clk", "ras_apb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b2100000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "uart4_clk", "ras_apb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b2180000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "uart5_clk", "ras_apb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "b2200000.serial");</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* array of all spear 320 clock lookups */</div><div class='add'>+#ifdef CONFIG_MACH_SPEAR320</div><div class='add'>+	#define SMII_PCLK_SHIFT				18</div><div class='add'>+	#define SMII_PCLK_MASK				2</div><div class='add'>+	#define SMII_PCLK_VAL_PAD			0x0</div><div class='add'>+	#define SMII_PCLK_VAL_PLL2			0x1</div><div class='add'>+	#define SMII_PCLK_VAL_SYNTH0			0x2</div><div class='add'>+	#define SDHCI_PCLK_SHIFT			15</div><div class='add'>+	#define SDHCI_PCLK_MASK				1</div><div class='add'>+	#define SDHCI_PCLK_VAL_48M			0x0</div><div class='add'>+	#define SDHCI_PCLK_VAL_SYNTH3			0x1</div><div class='add'>+	#define I2S_REF_PCLK_SHIFT			8</div><div class='add'>+	#define I2S_REF_PCLK_MASK			1</div><div class='add'>+	#define I2S_REF_PCLK_SYNTH_VAL			0x1</div><div class='add'>+	#define I2S_REF_PCLK_PLL2_VAL			0x0</div><div class='add'>+	#define UART1_PCLK_SHIFT			6</div><div class='add'>+	#define UART1_PCLK_MASK				1</div><div class='add'>+	#define SPEAR320_UARTX_PCLK_VAL_SYNTH1		0x0</div><div class='add'>+	#define SPEAR320_UARTX_PCLK_VAL_APB		0x1</div><div class='add'>+</div><div class='add'>+static const char *i2s_ref_parents[] = { "ras_pll2_clk",</div><div class='add'>+	"ras_gen2_synth_gate_clk", };</div><div class='add'>+static const char *sdhci_parents[] = { "ras_pll3_48m_clk",</div><div class='add'>+	"ras_gen3_synth_gate_clk",</div><div class='add'>+};</div><div class='add'>+static const char *smii0_parents[] = { "smii_125m_pad", "ras_pll2_clk",</div><div class='add'>+	"ras_gen0_synth_gate_clk", };</div><div class='add'>+static const char *uartx_parents[] = { "ras_gen1_synth_gate_clk", "ras_apb_clk",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init spear320_clk_init(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk;</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "smii_125m_pad_clk", NULL,</div><div class='add'>+			CLK_IS_ROOT, 125000000);</div><div class='add'>+	clk_register_clkdev(clk, "smii_125m_pad", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_48m_clk", 0,</div><div class='add'>+			1, 1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "90000000.clcd");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "emi_clk", "ras_ahb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, "emi", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "fsmc_clk", "ras_ahb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "4c000000.flash");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "i2c1_clk", "ras_ahb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "a7000000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "pwm_clk", "ras_ahb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, "pwm", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "ssp1_clk", "ras_ahb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "a5000000.spi");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "ssp2_clk", "ras_ahb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "a6000000.spi");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "can0_clk", "ras_apb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "c_can_platform.0");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "can1_clk", "ras_apb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "c_can_platform.1");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "i2s_clk", "ras_apb_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "i2s");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "i2s_ref_clk", i2s_ref_parents,</div><div class='add'>+			ARRAY_SIZE(i2s_ref_parents), 0, SPEAR320_CONTROL_REG,</div><div class='add'>+			I2S_REF_PCLK_SHIFT, I2S_REF_PCLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_ref_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "i2s_sclk", "i2s_ref_clk", 0, 1,</div><div class='add'>+			4);</div><div class='add'>+	clk_register_clkdev(clk, "i2s_sclk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "rs485_clk", uartx_parents,</div><div class='add'>+			ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG,</div><div class='add'>+			SPEAR320_RS485_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "a9300000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "sdhci_clk", sdhci_parents,</div><div class='add'>+			ARRAY_SIZE(sdhci_parents), 0, SPEAR320_CONTROL_REG,</div><div class='add'>+			SDHCI_PCLK_SHIFT, SDHCI_PCLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "70000000.sdhci");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "smii_pclk", smii0_parents,</div><div class='add'>+			ARRAY_SIZE(smii0_parents), 0, SPEAR320_CONTROL_REG,</div><div class='add'>+			SMII_PCLK_SHIFT, SMII_PCLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "smii_pclk");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "smii_clk", "smii_pclk", 0, 1, 1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "smii");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart1_clk", uartx_parents,</div><div class='add'>+			ARRAY_SIZE(uartx_parents), 0, SPEAR320_CONTROL_REG,</div><div class='add'>+			UART1_PCLK_SHIFT, UART1_PCLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "a3000000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart2_clk", uartx_parents,</div><div class='add'>+			ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG,</div><div class='add'>+			SPEAR320_UART2_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "a4000000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart3_clk", uartx_parents,</div><div class='add'>+			ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG,</div><div class='add'>+			SPEAR320_UART3_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "a9100000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart4_clk", uartx_parents,</div><div class='add'>+			ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG,</div><div class='add'>+			SPEAR320_UART4_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "a9200000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart5_clk", uartx_parents,</div><div class='add'>+			ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG,</div><div class='add'>+			SPEAR320_UART5_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "60000000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart6_clk", uartx_parents,</div><div class='add'>+			ARRAY_SIZE(uartx_parents), 0, SPEAR320_EXT_CTRL_REG,</div><div class='add'>+			SPEAR320_UART6_PCLK_SHIFT, SPEAR320_UARTX_PCLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "60100000.serial");</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void __init spear3xx_clk_init(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk, *clk1;</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);</div><div class='add'>+	clk_register_clkdev(clk, "apb_pclk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,</div><div class='add'>+			32000);</div><div class='add'>+	clk_register_clkdev(clk, "osc_32k_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT,</div><div class='add'>+			24000000);</div><div class='add'>+	clk_register_clkdev(clk, "osc_24m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* clock derived from 32 KHz osc clk */</div><div class='add'>+	clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, RTC_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "fc900000.rtc");</div><div class='add'>+</div><div class='add'>+	/* clock derived from 24 MHz osc clk */</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "pll3_48m_clk", "osc_24m_clk", 0,</div><div class='add'>+			48000000);</div><div class='add'>+	clk_register_clkdev(clk, "pll3_48m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "wdt_clk", "osc_24m_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "fc880000.wdt");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL,</div><div class='add'>+			"osc_24m_clk", 0, PLL1_CTR, PLL1_FRQ, pll_rtbl,</div><div class='add'>+			ARRAY_SIZE(pll_rtbl), &amp;_lock, &amp;clk1, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "vco1_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "pll1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL,</div><div class='add'>+			"osc_24m_clk", 0, PLL2_CTR, PLL2_FRQ, pll_rtbl,</div><div class='add'>+			ARRAY_SIZE(pll_rtbl), &amp;_lock, &amp;clk1, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "vco2_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "pll2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* clock derived from pll1 clk */</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk", 0, 1, 1);</div><div class='add'>+	clk_register_clkdev(clk, "cpu_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_divider(NULL, "ahb_clk", "pll1_clk",</div><div class='add'>+			CLK_SET_RATE_PARENT, CORE_CLK_CFG, HCLK_RATIO_SHIFT,</div><div class='add'>+			HCLK_RATIO_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ahb_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("uart_synth_clk", "uart_synth_gate_clk",</div><div class='add'>+			"pll1_clk", 0, UART_CLK_SYNT, NULL, aux_rtbl,</div><div class='add'>+			ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "uart_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "uart_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart0_mux_clk", uart0_parents,</div><div class='add'>+			ARRAY_SIZE(uart0_parents), 0, PERIP_CLK_CFG,</div><div class='add'>+			UART_CLK_SHIFT, UART_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "uart0_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uart0", "uart0_mux_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, UART_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "d0000000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("firda_synth_clk", "firda_synth_gate_clk",</div><div class='add'>+			"pll1_clk", 0, FIRDA_CLK_SYNT, NULL, aux_rtbl,</div><div class='add'>+			ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "firda_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "firda_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "firda_mux_clk", firda_parents,</div><div class='add'>+			ARRAY_SIZE(firda_parents), 0, PERIP_CLK_CFG,</div><div class='add'>+			FIRDA_CLK_SHIFT, FIRDA_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "firda_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "firda_clk", "firda_mux_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "firda");</div><div class='add'>+</div><div class='add'>+	/* gpt clocks */</div><div class='add'>+	clk_register_gpt("gpt0_synth_clk", "pll1_clk", 0, PRSC0_CLK_CFG,</div><div class='add'>+			gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &amp;_lock);</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt0_clk", gpt0_parents,</div><div class='add'>+			ARRAY_SIZE(gpt0_parents), 0, PERIP_CLK_CFG,</div><div class='add'>+			GPT0_CLK_SHIFT, GPT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt0");</div><div class='add'>+</div><div class='add'>+	clk_register_gpt("gpt1_synth_clk", "pll1_clk", 0, PRSC1_CLK_CFG,</div><div class='add'>+			gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &amp;_lock);</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt1_parents,</div><div class='add'>+			ARRAY_SIZE(gpt1_parents), 0, PERIP_CLK_CFG,</div><div class='add'>+			GPT1_CLK_SHIFT, GPT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt1_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, GPT1_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt1");</div><div class='add'>+</div><div class='add'>+	clk_register_gpt("gpt2_synth_clk", "pll1_clk", 0, PRSC2_CLK_CFG,</div><div class='add'>+			gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &amp;_lock);</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt2_parents,</div><div class='add'>+			ARRAY_SIZE(gpt2_parents), 0, PERIP_CLK_CFG,</div><div class='add'>+			GPT2_CLK_SHIFT, GPT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt2_mux_clk", NULL);</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, GPT2_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt2");</div><div class='add'>+</div><div class='add'>+	/* general synths clocks */</div><div class='add'>+	clk = clk_register_aux("gen0_synth_clk", "gen0_synth_gate_clk",</div><div class='add'>+			"pll1_clk", 0, GEN0_CLK_SYNT, NULL, aux_rtbl,</div><div class='add'>+			ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "gen0_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "gen0_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("gen1_synth_clk", "gen1_synth_gate_clk",</div><div class='add'>+			"pll1_clk", 0, GEN1_CLK_SYNT, NULL, aux_rtbl,</div><div class='add'>+			ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "gen1_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "gen1_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gen2_3_parent_clk", gen2_3_parents,</div><div class='add'>+			ARRAY_SIZE(gen2_3_parents), 0, CORE_CLK_CFG,</div><div class='add'>+			GEN_SYNTH2_3_CLK_SHIFT, GEN_SYNTH2_3_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gen2_3_parent_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("gen2_synth_clk", "gen2_synth_gate_clk",</div><div class='add'>+			"gen2_3_parent_clk", 0, GEN2_CLK_SYNT, NULL, aux_rtbl,</div><div class='add'>+			ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "gen2_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "gen2_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("gen3_synth_clk", "gen3_synth_gate_clk",</div><div class='add'>+			"gen2_3_parent_clk", 0, GEN3_CLK_SYNT, NULL, aux_rtbl,</div><div class='add'>+			ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "gen3_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "gen3_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* clock derived from pll3 clk */</div><div class='add'>+	clk = clk_register_gate(NULL, "usbh_clk", "pll3_48m_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, USBH_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "usbh_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "usbh.0_clk", "usbh_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, "usbh.0_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "usbh.1_clk", "usbh_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, "usbh.1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "usbd_clk", "pll3_48m_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, USBD_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "designware_udc");</div><div class='add'>+</div><div class='add'>+	/* clock derived from ahb clk */</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "ahbmult2_clk", "ahb_clk", 0, 2,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, "ahbmult2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "ddr_clk", ddr_parents,</div><div class='add'>+			ARRAY_SIZE(ddr_parents), 0, PLL_CLK_CFG, MCTR_CLK_SHIFT,</div><div class='add'>+			MCTR_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ddr_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_divider(NULL, "apb_clk", "ahb_clk",</div><div class='add'>+			CLK_SET_RATE_PARENT, CORE_CLK_CFG, PCLK_RATIO_SHIFT,</div><div class='add'>+			PCLK_RATIO_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "apb_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "amem_clk", "ahb_clk", 0, AMEM_CLK_CFG,</div><div class='add'>+			AMEM_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "amem_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "c3_clk", "ahb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			C3_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "c3_clk");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			DMA_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "fc400000.dma");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			GMAC_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "e0800000.eth");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			I2C_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "d0180000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			JPEG_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "jpeg");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			SMI_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "fc000000.flash");</div><div class='add'>+</div><div class='add'>+	/* clock derived from apb clk */</div><div class='add'>+	clk = clk_register_gate(NULL, "adc_clk", "apb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			ADC_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "adc");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			GPIO_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "fc980000.gpio");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			SSP_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "d0100000.spi");</div><div class='add'>+</div><div class='add'>+	/* RAS clk enable */</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_ahb_clk", "ahb_clk", 0, RAS_CLK_ENB,</div><div class='add'>+			RAS_AHB_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_ahb_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_apb_clk", "apb_clk", 0, RAS_CLK_ENB,</div><div class='add'>+			RAS_APB_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_apb_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_32k_clk", "osc_32k_clk", 0,</div><div class='add'>+			RAS_CLK_ENB, RAS_32K_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_32k_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_24m_clk", "osc_24m_clk", 0,</div><div class='add'>+			RAS_CLK_ENB, RAS_24M_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_24m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_pll1_clk", "pll1_clk", 0,</div><div class='add'>+			RAS_CLK_ENB, RAS_PLL1_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_pll1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_pll2_clk", "pll2_clk", 0,</div><div class='add'>+			RAS_CLK_ENB, RAS_PLL2_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_pll2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_pll3_48m_clk", "pll3_48m_clk", 0,</div><div class='add'>+			RAS_CLK_ENB, RAS_48M_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_pll3_48m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_gen0_synth_gate_clk",</div><div class='add'>+			"gen0_synth_gate_clk", 0, RAS_CLK_ENB,</div><div class='add'>+			RAS_SYNT0_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_gen0_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_gen1_synth_gate_clk",</div><div class='add'>+			"gen1_synth_gate_clk", 0, RAS_CLK_ENB,</div><div class='add'>+			RAS_SYNT1_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_gen1_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_gen2_synth_gate_clk",</div><div class='add'>+			"gen2_synth_gate_clk", 0, RAS_CLK_ENB,</div><div class='add'>+			RAS_SYNT2_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_gen2_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ras_gen3_synth_gate_clk",</div><div class='add'>+			"gen3_synth_gate_clk", 0, RAS_CLK_ENB,</div><div class='add'>+			RAS_SYNT3_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ras_gen3_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	if (of_machine_is_compatible("st,spear300"))</div><div class='add'>+		spear300_clk_init();</div><div class='add'>+	else if (of_machine_is_compatible("st,spear310"))</div><div class='add'>+		spear310_clk_init();</div><div class='add'>+	else if (of_machine_is_compatible("st,spear320"))</div><div class='add'>+		spear320_clk_init();</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c<br/>new file mode 100644<br/>index 000000000000..f9a20b382304<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clk/spear/spear6xx_clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clk/spear/spear6xx_clock.c</a></div><div class='hunk'>@@ -0,0 +1,342 @@</div><div class='add'>+/*</div><div class='add'>+ * SPEAr6xx machines clock framework source file</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clkdev.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/spinlock_types.h&gt;</div><div class='add'>+#include &lt;mach/misc_regs.h&gt;</div><div class='add'>+#include "clk.h"</div><div class='add'>+</div><div class='add'>+static DEFINE_SPINLOCK(_lock);</div><div class='add'>+</div><div class='add'>+#define PLL1_CTR			(MISC_BASE + 0x008)</div><div class='add'>+#define PLL1_FRQ			(MISC_BASE + 0x00C)</div><div class='add'>+#define PLL2_CTR			(MISC_BASE + 0x014)</div><div class='add'>+#define PLL2_FRQ			(MISC_BASE + 0x018)</div><div class='add'>+#define PLL_CLK_CFG			(MISC_BASE + 0x020)</div><div class='add'>+	/* PLL_CLK_CFG register masks */</div><div class='add'>+	#define MCTR_CLK_SHIFT		28</div><div class='add'>+	#define MCTR_CLK_MASK		3</div><div class='add'>+</div><div class='add'>+#define CORE_CLK_CFG			(MISC_BASE + 0x024)</div><div class='add'>+	/* CORE CLK CFG register masks */</div><div class='add'>+	#define HCLK_RATIO_SHIFT	10</div><div class='add'>+	#define HCLK_RATIO_MASK		2</div><div class='add'>+	#define PCLK_RATIO_SHIFT	8</div><div class='add'>+	#define PCLK_RATIO_MASK		2</div><div class='add'>+</div><div class='add'>+#define PERIP_CLK_CFG			(MISC_BASE + 0x028)</div><div class='add'>+	/* PERIP_CLK_CFG register masks */</div><div class='add'>+	#define CLCD_CLK_SHIFT		2</div><div class='add'>+	#define CLCD_CLK_MASK		2</div><div class='add'>+	#define UART_CLK_SHIFT		4</div><div class='add'>+	#define UART_CLK_MASK		1</div><div class='add'>+	#define FIRDA_CLK_SHIFT		5</div><div class='add'>+	#define FIRDA_CLK_MASK		2</div><div class='add'>+	#define GPT0_CLK_SHIFT		8</div><div class='add'>+	#define GPT1_CLK_SHIFT		10</div><div class='add'>+	#define GPT2_CLK_SHIFT		11</div><div class='add'>+	#define GPT3_CLK_SHIFT		12</div><div class='add'>+	#define GPT_CLK_MASK		1</div><div class='add'>+</div><div class='add'>+#define PERIP1_CLK_ENB			(MISC_BASE + 0x02C)</div><div class='add'>+	/* PERIP1_CLK_ENB register masks */</div><div class='add'>+	#define UART0_CLK_ENB		3</div><div class='add'>+	#define UART1_CLK_ENB		4</div><div class='add'>+	#define SSP0_CLK_ENB		5</div><div class='add'>+	#define SSP1_CLK_ENB		6</div><div class='add'>+	#define I2C_CLK_ENB		7</div><div class='add'>+	#define JPEG_CLK_ENB		8</div><div class='add'>+	#define FSMC_CLK_ENB		9</div><div class='add'>+	#define FIRDA_CLK_ENB		10</div><div class='add'>+	#define GPT2_CLK_ENB		11</div><div class='add'>+	#define GPT3_CLK_ENB		12</div><div class='add'>+	#define GPIO2_CLK_ENB		13</div><div class='add'>+	#define SSP2_CLK_ENB		14</div><div class='add'>+	#define ADC_CLK_ENB		15</div><div class='add'>+	#define GPT1_CLK_ENB		11</div><div class='add'>+	#define RTC_CLK_ENB		17</div><div class='add'>+	#define GPIO1_CLK_ENB		18</div><div class='add'>+	#define DMA_CLK_ENB		19</div><div class='add'>+	#define SMI_CLK_ENB		21</div><div class='add'>+	#define CLCD_CLK_ENB		22</div><div class='add'>+	#define GMAC_CLK_ENB		23</div><div class='add'>+	#define USBD_CLK_ENB		24</div><div class='add'>+	#define USBH0_CLK_ENB		25</div><div class='add'>+	#define USBH1_CLK_ENB		26</div><div class='add'>+</div><div class='add'>+#define PRSC0_CLK_CFG			(MISC_BASE + 0x044)</div><div class='add'>+#define PRSC1_CLK_CFG			(MISC_BASE + 0x048)</div><div class='add'>+#define PRSC2_CLK_CFG			(MISC_BASE + 0x04C)</div><div class='add'>+</div><div class='add'>+#define CLCD_CLK_SYNT			(MISC_BASE + 0x05C)</div><div class='add'>+#define FIRDA_CLK_SYNT			(MISC_BASE + 0x060)</div><div class='add'>+#define UART_CLK_SYNT			(MISC_BASE + 0x064)</div><div class='add'>+</div><div class='add'>+/* vco rate configuration table, in ascending order of rates */</div><div class='add'>+static struct pll_rate_tbl pll_rtbl[] = {</div><div class='add'>+	{.mode = 0, .m = 0x53, .n = 0x0F, .p = 0x1}, /* vco 332 &amp; pll 166 MHz */</div><div class='add'>+	{.mode = 0, .m = 0x85, .n = 0x0F, .p = 0x1}, /* vco 532 &amp; pll 266 MHz */</div><div class='add'>+	{.mode = 0, .m = 0xA6, .n = 0x0F, .p = 0x1}, /* vco 664 &amp; pll 332 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* aux rate configuration table, in ascending order of rates */</div><div class='add'>+static struct aux_rate_tbl aux_rtbl[] = {</div><div class='add'>+	/* For PLL1 = 332 MHz */</div><div class='add'>+	{.xscale = 2, .yscale = 8, .eq = 0}, /* 41.5 MHz */</div><div class='add'>+	{.xscale = 2, .yscale = 4, .eq = 0}, /* 83 MHz */</div><div class='add'>+	{.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *clcd_parents[] = { "pll3_48m_clk", "clcd_synth_gate_clk", };</div><div class='add'>+static const char *firda_parents[] = { "pll3_48m_clk", "firda_synth_gate_clk",</div><div class='add'>+};</div><div class='add'>+static const char *uart_parents[] = { "pll3_48m_clk", "uart_synth_gate_clk", };</div><div class='add'>+static const char *gpt0_1_parents[] = { "pll3_48m_clk", "gpt0_1_synth_clk", };</div><div class='add'>+static const char *gpt2_parents[] = { "pll3_48m_clk", "gpt2_synth_clk", };</div><div class='add'>+static const char *gpt3_parents[] = { "pll3_48m_clk", "gpt3_synth_clk", };</div><div class='add'>+static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none",</div><div class='add'>+	"pll2_clk", };</div><div class='add'>+</div><div class='add'>+/* gpt rate configuration table, in ascending order of rates */</div><div class='add'>+static struct gpt_rate_tbl gpt_rtbl[] = {</div><div class='add'>+	/* For pll1 = 332 MHz */</div><div class='add'>+	{.mscale = 4, .nscale = 0}, /* 41.5 MHz */</div><div class='add'>+	{.mscale = 2, .nscale = 0}, /* 55.3 MHz */</div><div class='add'>+	{.mscale = 1, .nscale = 0}, /* 83 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __init spear6xx_clk_init(void)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk, *clk1;</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);</div><div class='add'>+	clk_register_clkdev(clk, "apb_pclk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT,</div><div class='add'>+			32000);</div><div class='add'>+	clk_register_clkdev(clk, "osc_32k_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "osc_30m_clk", NULL, CLK_IS_ROOT,</div><div class='add'>+			30000000);</div><div class='add'>+	clk_register_clkdev(clk, "osc_30m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	/* clock derived from 32 KHz osc clk */</div><div class='add'>+	clk = clk_register_gate(NULL, "rtc_spear", "osc_32k_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, RTC_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "rtc-spear");</div><div class='add'>+</div><div class='add'>+	/* clock derived from 30 MHz osc clk */</div><div class='add'>+	clk = clk_register_fixed_rate(NULL, "pll3_48m_clk", "osc_24m_clk", 0,</div><div class='add'>+			48000000);</div><div class='add'>+	clk_register_clkdev(clk, "pll3_48m_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "osc_30m_clk",</div><div class='add'>+			0, PLL1_CTR, PLL1_FRQ, pll_rtbl, ARRAY_SIZE(pll_rtbl),</div><div class='add'>+			&amp;_lock, &amp;clk1, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "vco1_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "pll1_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL,</div><div class='add'>+			"osc_30m_clk", 0, PLL2_CTR, PLL2_FRQ, pll_rtbl,</div><div class='add'>+			ARRAY_SIZE(pll_rtbl), &amp;_lock, &amp;clk1, NULL);</div><div class='add'>+	clk_register_clkdev(clk, "vco2_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "pll2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "wdt_clk", "osc_30m_clk", 0, 1,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "wdt");</div><div class='add'>+</div><div class='add'>+	/* clock derived from pll1 clk */</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk", 0, 1, 1);</div><div class='add'>+	clk_register_clkdev(clk, "cpu_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_divider(NULL, "ahb_clk", "pll1_clk",</div><div class='add'>+			CLK_SET_RATE_PARENT, CORE_CLK_CFG, HCLK_RATIO_SHIFT,</div><div class='add'>+			HCLK_RATIO_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ahb_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("uart_synth_clk", "uart_synth_gate_clk",</div><div class='add'>+			"pll1_clk", 0, UART_CLK_SYNT, NULL, aux_rtbl,</div><div class='add'>+			ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "uart_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "uart_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "uart_mux_clk", uart_parents,</div><div class='add'>+			ARRAY_SIZE(uart_parents), 0, PERIP_CLK_CFG,</div><div class='add'>+			UART_CLK_SHIFT, UART_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "uart_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uart0", "uart_mux_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, UART0_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "d0000000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "uart1", "uart_mux_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, UART1_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "d0080000.serial");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("firda_synth_clk", "firda_synth_gate_clk",</div><div class='add'>+			"pll1_clk", 0, FIRDA_CLK_SYNT, NULL, aux_rtbl,</div><div class='add'>+			ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "firda_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "firda_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "firda_mux_clk", firda_parents,</div><div class='add'>+			ARRAY_SIZE(firda_parents), 0, PERIP_CLK_CFG,</div><div class='add'>+			FIRDA_CLK_SHIFT, FIRDA_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "firda_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "firda_clk", "firda_mux_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "firda");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_aux("clcd_synth_clk", "clcd_synth_gate_clk",</div><div class='add'>+			"pll1_clk", 0, CLCD_CLK_SYNT, NULL, aux_rtbl,</div><div class='add'>+			ARRAY_SIZE(aux_rtbl), &amp;_lock, &amp;clk1);</div><div class='add'>+	clk_register_clkdev(clk, "clcd_synth_clk", NULL);</div><div class='add'>+	clk_register_clkdev(clk1, "clcd_synth_gate_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "clcd_mux_clk", clcd_parents,</div><div class='add'>+			ARRAY_SIZE(clcd_parents), 0, PERIP_CLK_CFG,</div><div class='add'>+			CLCD_CLK_SHIFT, CLCD_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "clcd_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "clcd_clk", "clcd_mux_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, CLCD_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "clcd");</div><div class='add'>+</div><div class='add'>+	/* gpt clocks */</div><div class='add'>+	clk = clk_register_gpt("gpt0_1_synth_clk", "pll1_clk", 0, PRSC0_CLK_CFG,</div><div class='add'>+			gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt0_1_synth_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt0_mux_clk", gpt0_1_parents,</div><div class='add'>+			ARRAY_SIZE(gpt0_1_parents), 0, PERIP_CLK_CFG,</div><div class='add'>+			GPT0_CLK_SHIFT, GPT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt0");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt0_1_parents,</div><div class='add'>+			ARRAY_SIZE(gpt0_1_parents), 0, PERIP_CLK_CFG,</div><div class='add'>+			GPT1_CLK_SHIFT, GPT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt1_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, GPT1_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt1");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gpt("gpt2_synth_clk", "pll1_clk", 0, PRSC1_CLK_CFG,</div><div class='add'>+			gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt2_synth_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt2_parents,</div><div class='add'>+			ARRAY_SIZE(gpt2_parents), 0, PERIP_CLK_CFG,</div><div class='add'>+			GPT2_CLK_SHIFT, GPT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt2_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, GPT2_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt2");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gpt("gpt3_synth_clk", "pll1_clk", 0, PRSC2_CLK_CFG,</div><div class='add'>+			gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt3_synth_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "gpt3_mux_clk", gpt3_parents,</div><div class='add'>+			ARRAY_SIZE(gpt3_parents), 0, PERIP_CLK_CFG,</div><div class='add'>+			GPT3_CLK_SHIFT, GPT_CLK_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "gpt3_mux_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mux_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, GPT3_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gpt3");</div><div class='add'>+</div><div class='add'>+	/* clock derived from pll3 clk */</div><div class='add'>+	clk = clk_register_gate(NULL, "usbh0_clk", "pll3_48m_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, USBH0_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "usbh.0_clk");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "usbh1_clk", "pll3_48m_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, USBH1_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "usbh.1_clk");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "usbd_clk", "pll3_48m_clk", 0,</div><div class='add'>+			PERIP1_CLK_ENB, USBD_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "designware_udc");</div><div class='add'>+</div><div class='add'>+	/* clock derived from ahb clk */</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "ahbmult2_clk", "ahb_clk", 0, 2,</div><div class='add'>+			1);</div><div class='add'>+	clk_register_clkdev(clk, "ahbmult2_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_mux(NULL, "ddr_clk", ddr_parents,</div><div class='add'>+			ARRAY_SIZE(ddr_parents),</div><div class='add'>+			0, PLL_CLK_CFG, MCTR_CLK_SHIFT, MCTR_CLK_MASK, 0,</div><div class='add'>+			&amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "ddr_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_divider(NULL, "apb_clk", "ahb_clk",</div><div class='add'>+			CLK_SET_RATE_PARENT, CORE_CLK_CFG, PCLK_RATIO_SHIFT,</div><div class='add'>+			PCLK_RATIO_MASK, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, "apb_clk", NULL);</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			DMA_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "fc400000.dma");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "fsmc_clk", "ahb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			FSMC_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "d1800000.flash");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			GMAC_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "gmac");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "i2c_clk", "ahb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			I2C_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "d0200000.i2c");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			JPEG_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "jpeg");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			SMI_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "fc000000.flash");</div><div class='add'>+</div><div class='add'>+	/* clock derived from apb clk */</div><div class='add'>+	clk = clk_register_gate(NULL, "adc_clk", "apb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			ADC_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "adc");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_fixed_factor(NULL, "gpio0_clk", "apb_clk", 0, 1, 1);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "f0100000.gpio");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gpio1_clk", "apb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			GPIO1_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "fc980000.gpio");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "gpio2_clk", "apb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			GPIO2_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "d8100000.gpio");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			SSP0_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ssp-pl022.0");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ssp1_clk", "apb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			SSP1_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ssp-pl022.1");</div><div class='add'>+</div><div class='add'>+	clk = clk_register_gate(NULL, "ssp2_clk", "apb_clk", 0, PERIP1_CLK_ENB,</div><div class='add'>+			SSP2_CLK_ENB, 0, &amp;_lock);</div><div class='add'>+	clk_register_clkdev(clk, NULL, "ssp-pl022.2");</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig<br/>index 5138927a416c..99c6b203e6cd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/clocksource/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/clocksource/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/clocksource/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clocksource/Kconfig</a></div><div class='hunk'>@@ -18,7 +18,7 @@ config DW_APB_TIMER</div><div class='ctx'> </div><div class='ctx'> config CLKSRC_DBX500_PRCMU</div><div class='ctx'> 	bool "Clocksource PRCMU Timer"</div><div class='del'>-	depends on UX500_SOC_DB5500 || UX500_SOC_DB8500</div><div class='add'>+	depends on UX500_SOC_DB8500</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  Use the always on PRCMU Timer as clocksource</div><div class='head'>diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile<br/>index 8d81a1d32653..dd3e661a124d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/clocksource/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/clocksource/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/clocksource/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clocksource/Makefile</a></div><div class='hunk'>@@ -6,6 +6,7 @@ obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC)	+= cs5535-clockevt.o</div><div class='ctx'> obj-$(CONFIG_SH_TIMER_CMT)	+= sh_cmt.o</div><div class='ctx'> obj-$(CONFIG_SH_TIMER_MTU2)	+= sh_mtu2.o</div><div class='ctx'> obj-$(CONFIG_SH_TIMER_TMU)	+= sh_tmu.o</div><div class='add'>+obj-$(CONFIG_EM_TIMER_STI)	+= em_sti.o</div><div class='ctx'> obj-$(CONFIG_CLKBLD_I8253)	+= i8253.o</div><div class='ctx'> obj-$(CONFIG_CLKSRC_MMIO)	+= mmio.o</div><div class='ctx'> obj-$(CONFIG_DW_APB_TIMER)	+= dw_apb_timer.o</div><div class='head'>diff --git a/drivers/clocksource/em_sti.c b/drivers/clocksource/em_sti.c<br/>new file mode 100644<br/>index 000000000000..372051d1bba8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/clocksource/em_sti.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/clocksource/em_sti.c</a></div><div class='hunk'>@@ -0,0 +1,406 @@</div><div class='add'>+/*</div><div class='add'>+ * Emma Mobile Timer Support - STI</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012 Magnus Damm</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/clocksource.h&gt;</div><div class='add'>+#include &lt;linux/clockchips.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+enum { USER_CLOCKSOURCE, USER_CLOCKEVENT, USER_NR };</div><div class='add'>+</div><div class='add'>+struct em_sti_priv {</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	unsigned int active[USER_NR];</div><div class='add'>+	unsigned long rate;</div><div class='add'>+	raw_spinlock_t lock;</div><div class='add'>+	struct clock_event_device ced;</div><div class='add'>+	struct clocksource cs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define STI_CONTROL 0x00</div><div class='add'>+#define STI_COMPA_H 0x10</div><div class='add'>+#define STI_COMPA_L 0x14</div><div class='add'>+#define STI_COMPB_H 0x18</div><div class='add'>+#define STI_COMPB_L 0x1c</div><div class='add'>+#define STI_COUNT_H 0x20</div><div class='add'>+#define STI_COUNT_L 0x24</div><div class='add'>+#define STI_COUNT_RAW_H 0x28</div><div class='add'>+#define STI_COUNT_RAW_L 0x2c</div><div class='add'>+#define STI_SET_H 0x30</div><div class='add'>+#define STI_SET_L 0x34</div><div class='add'>+#define STI_INTSTATUS 0x40</div><div class='add'>+#define STI_INTRAWSTATUS 0x44</div><div class='add'>+#define STI_INTENSET 0x48</div><div class='add'>+#define STI_INTENCLR 0x4c</div><div class='add'>+#define STI_INTFFCLR 0x50</div><div class='add'>+</div><div class='add'>+static inline unsigned long em_sti_read(struct em_sti_priv *p, int offs)</div><div class='add'>+{</div><div class='add'>+	return ioread32(p-&gt;base + offs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void em_sti_write(struct em_sti_priv *p, int offs,</div><div class='add'>+				unsigned long value)</div><div class='add'>+{</div><div class='add'>+	iowrite32(value, p-&gt;base + offs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int em_sti_enable(struct em_sti_priv *p)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* enable clock */</div><div class='add'>+	ret = clk_enable(p-&gt;clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;p-&gt;pdev-&gt;dev, "cannot enable clock\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* configure channel, periodic mode and maximum timeout */</div><div class='add'>+	p-&gt;rate = clk_get_rate(p-&gt;clk);</div><div class='add'>+</div><div class='add'>+	/* reset the counter */</div><div class='add'>+	em_sti_write(p, STI_SET_H, 0x40000000);</div><div class='add'>+	em_sti_write(p, STI_SET_L, 0x00000000);</div><div class='add'>+</div><div class='add'>+	/* mask and clear pending interrupts */</div><div class='add'>+	em_sti_write(p, STI_INTENCLR, 3);</div><div class='add'>+	em_sti_write(p, STI_INTFFCLR, 3);</div><div class='add'>+</div><div class='add'>+	/* enable updates of counter registers */</div><div class='add'>+	em_sti_write(p, STI_CONTROL, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void em_sti_disable(struct em_sti_priv *p)</div><div class='add'>+{</div><div class='add'>+	/* mask interrupts */</div><div class='add'>+	em_sti_write(p, STI_INTENCLR, 3);</div><div class='add'>+</div><div class='add'>+	/* stop clock */</div><div class='add'>+	clk_disable(p-&gt;clk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static cycle_t em_sti_count(struct em_sti_priv *p)</div><div class='add'>+{</div><div class='add'>+	cycle_t ticks;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* the STI hardware buffers the 48-bit count, but to</div><div class='add'>+	 * break it out into two 32-bit access the registers</div><div class='add'>+	 * must be accessed in a certain order.</div><div class='add'>+	 * Always read STI_COUNT_H before STI_COUNT_L.</div><div class='add'>+	 */</div><div class='add'>+	raw_spin_lock_irqsave(&amp;p-&gt;lock, flags);</div><div class='add'>+	ticks = (cycle_t)(em_sti_read(p, STI_COUNT_H) &amp; 0xffff) &lt;&lt; 32;</div><div class='add'>+	ticks |= em_sti_read(p, STI_COUNT_L);</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;p-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ticks;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static cycle_t em_sti_set_next(struct em_sti_priv *p, cycle_t next)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	raw_spin_lock_irqsave(&amp;p-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	/* mask compare A interrupt */</div><div class='add'>+	em_sti_write(p, STI_INTENCLR, 1);</div><div class='add'>+</div><div class='add'>+	/* update compare A value */</div><div class='add'>+	em_sti_write(p, STI_COMPA_H, next &gt;&gt; 32);</div><div class='add'>+	em_sti_write(p, STI_COMPA_L, next &amp; 0xffffffff);</div><div class='add'>+</div><div class='add'>+	/* clear compare A interrupt source */</div><div class='add'>+	em_sti_write(p, STI_INTFFCLR, 1);</div><div class='add'>+</div><div class='add'>+	/* unmask compare A interrupt */</div><div class='add'>+	em_sti_write(p, STI_INTENSET, 1);</div><div class='add'>+</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;p-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return next;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t em_sti_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct em_sti_priv *p = dev_id;</div><div class='add'>+</div><div class='add'>+	p-&gt;ced.event_handler(&amp;p-&gt;ced);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int em_sti_start(struct em_sti_priv *p, unsigned int user)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int used_before;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	raw_spin_lock_irqsave(&amp;p-&gt;lock, flags);</div><div class='add'>+	used_before = p-&gt;active[USER_CLOCKSOURCE] | p-&gt;active[USER_CLOCKEVENT];</div><div class='add'>+	if (!used_before)</div><div class='add'>+		ret = em_sti_enable(p);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		p-&gt;active[user] = 1;</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;p-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void em_sti_stop(struct em_sti_priv *p, unsigned int user)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int used_before, used_after;</div><div class='add'>+</div><div class='add'>+	raw_spin_lock_irqsave(&amp;p-&gt;lock, flags);</div><div class='add'>+	used_before = p-&gt;active[USER_CLOCKSOURCE] | p-&gt;active[USER_CLOCKEVENT];</div><div class='add'>+	p-&gt;active[user] = 0;</div><div class='add'>+	used_after = p-&gt;active[USER_CLOCKSOURCE] | p-&gt;active[USER_CLOCKEVENT];</div><div class='add'>+</div><div class='add'>+	if (used_before &amp;&amp; !used_after)</div><div class='add'>+		em_sti_disable(p);</div><div class='add'>+	raw_spin_unlock_irqrestore(&amp;p-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct em_sti_priv *cs_to_em_sti(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	return container_of(cs, struct em_sti_priv, cs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static cycle_t em_sti_clocksource_read(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	return em_sti_count(cs_to_em_sti(cs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int em_sti_clocksource_enable(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct em_sti_priv *p = cs_to_em_sti(cs);</div><div class='add'>+</div><div class='add'>+	ret = em_sti_start(p, USER_CLOCKSOURCE);</div><div class='add'>+	if (!ret)</div><div class='add'>+		__clocksource_updatefreq_hz(cs, p-&gt;rate);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void em_sti_clocksource_disable(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	em_sti_stop(cs_to_em_sti(cs), USER_CLOCKSOURCE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void em_sti_clocksource_resume(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	em_sti_clocksource_enable(cs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int em_sti_register_clocksource(struct em_sti_priv *p)</div><div class='add'>+{</div><div class='add'>+	struct clocksource *cs = &amp;p-&gt;cs;</div><div class='add'>+</div><div class='add'>+	memset(cs, 0, sizeof(*cs));</div><div class='add'>+	cs-&gt;name = dev_name(&amp;p-&gt;pdev-&gt;dev);</div><div class='add'>+	cs-&gt;rating = 200;</div><div class='add'>+	cs-&gt;read = em_sti_clocksource_read;</div><div class='add'>+	cs-&gt;enable = em_sti_clocksource_enable;</div><div class='add'>+	cs-&gt;disable = em_sti_clocksource_disable;</div><div class='add'>+	cs-&gt;suspend = em_sti_clocksource_disable;</div><div class='add'>+	cs-&gt;resume = em_sti_clocksource_resume;</div><div class='add'>+	cs-&gt;mask = CLOCKSOURCE_MASK(48);</div><div class='add'>+	cs-&gt;flags = CLOCK_SOURCE_IS_CONTINUOUS;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;p-&gt;pdev-&gt;dev, "used as clock source\n");</div><div class='add'>+</div><div class='add'>+	/* Register with dummy 1 Hz value, gets updated in -&gt;enable() */</div><div class='add'>+	clocksource_register_hz(cs, 1);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct em_sti_priv *ced_to_em_sti(struct clock_event_device *ced)</div><div class='add'>+{</div><div class='add'>+	return container_of(ced, struct em_sti_priv, ced);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void em_sti_clock_event_mode(enum clock_event_mode mode,</div><div class='add'>+				    struct clock_event_device *ced)</div><div class='add'>+{</div><div class='add'>+	struct em_sti_priv *p = ced_to_em_sti(ced);</div><div class='add'>+</div><div class='add'>+	/* deal with old setting first */</div><div class='add'>+	switch (ced-&gt;mode) {</div><div class='add'>+	case CLOCK_EVT_MODE_ONESHOT:</div><div class='add'>+		em_sti_stop(p, USER_CLOCKEVENT);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CLOCK_EVT_MODE_ONESHOT:</div><div class='add'>+		dev_info(&amp;p-&gt;pdev-&gt;dev, "used for oneshot clock events\n");</div><div class='add'>+		em_sti_start(p, USER_CLOCKEVENT);</div><div class='add'>+		clockevents_config(&amp;p-&gt;ced, p-&gt;rate);</div><div class='add'>+		break;</div><div class='add'>+	case CLOCK_EVT_MODE_SHUTDOWN:</div><div class='add'>+	case CLOCK_EVT_MODE_UNUSED:</div><div class='add'>+		em_sti_stop(p, USER_CLOCKEVENT);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int em_sti_clock_event_next(unsigned long delta,</div><div class='add'>+				   struct clock_event_device *ced)</div><div class='add'>+{</div><div class='add'>+	struct em_sti_priv *p = ced_to_em_sti(ced);</div><div class='add'>+	cycle_t next;</div><div class='add'>+	int safe;</div><div class='add'>+</div><div class='add'>+	next = em_sti_set_next(p, em_sti_count(p) + delta);</div><div class='add'>+	safe = em_sti_count(p) &lt; (next - 1);</div><div class='add'>+</div><div class='add'>+	return !safe;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void em_sti_register_clockevent(struct em_sti_priv *p)</div><div class='add'>+{</div><div class='add'>+	struct clock_event_device *ced = &amp;p-&gt;ced;</div><div class='add'>+</div><div class='add'>+	memset(ced, 0, sizeof(*ced));</div><div class='add'>+	ced-&gt;name = dev_name(&amp;p-&gt;pdev-&gt;dev);</div><div class='add'>+	ced-&gt;features = CLOCK_EVT_FEAT_ONESHOT;</div><div class='add'>+	ced-&gt;rating = 200;</div><div class='add'>+	ced-&gt;cpumask = cpumask_of(0);</div><div class='add'>+	ced-&gt;set_next_event = em_sti_clock_event_next;</div><div class='add'>+	ced-&gt;set_mode = em_sti_clock_event_mode;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;p-&gt;pdev-&gt;dev, "used for clock events\n");</div><div class='add'>+</div><div class='add'>+	/* Register with dummy 1 Hz value, gets updated in -&gt;set_mode() */</div><div class='add'>+	clockevents_config_and_register(ced, 1, 2, 0xffffffff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit em_sti_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct em_sti_priv *p;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	int irq, ret;</div><div class='add'>+</div><div class='add'>+	p = kzalloc(sizeof(*p), GFP_KERNEL);</div><div class='add'>+	if (p == NULL) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to allocate driver data\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	p-&gt;pdev = pdev;</div><div class='add'>+	platform_set_drvdata(pdev, p);</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to get I/O memory\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to get irq\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* map memory, let base point to the STI instance */</div><div class='add'>+	p-&gt;base = ioremap_nocache(res-&gt;start, resource_size(res));</div><div class='add'>+	if (p-&gt;base == NULL) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to remap I/O memory\n");</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+		goto err0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* get hold of clock */</div><div class='add'>+	p-&gt;clk = clk_get(&amp;pdev-&gt;dev, "sclk");</div><div class='add'>+	if (IS_ERR(p-&gt;clk)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "cannot get clock\n");</div><div class='add'>+		ret = PTR_ERR(p-&gt;clk);</div><div class='add'>+		goto err1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (request_irq(irq, em_sti_interrupt,</div><div class='add'>+			IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,</div><div class='add'>+			dev_name(&amp;pdev-&gt;dev), p)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to request low IRQ\n");</div><div class='add'>+		ret = -ENOENT;</div><div class='add'>+		goto err2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	raw_spin_lock_init(&amp;p-&gt;lock);</div><div class='add'>+	em_sti_register_clockevent(p);</div><div class='add'>+	em_sti_register_clocksource(p);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err2:</div><div class='add'>+	clk_put(p-&gt;clk);</div><div class='add'>+err1:</div><div class='add'>+	iounmap(p-&gt;base);</div><div class='add'>+err0:</div><div class='add'>+	kfree(p);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit em_sti_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return -EBUSY; /* cannot unregister clockevent and clocksource */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id em_sti_dt_ids[] __devinitconst = {</div><div class='add'>+	{ .compatible = "renesas,em-sti", },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, em_sti_dt_ids);</div><div class='add'>+</div><div class='add'>+static struct platform_driver em_sti_device_driver = {</div><div class='add'>+	.probe		= em_sti_probe,</div><div class='add'>+	.remove		= __devexit_p(em_sti_remove),</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "em_sti",</div><div class='add'>+		.of_match_table = em_sti_dt_ids,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(em_sti_device_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Magnus Damm");</div><div class='add'>+MODULE_DESCRIPTION("Renesas Emma Mobile STI Timer Driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/cpufreq/db8500-cpufreq.c b/drivers/cpufreq/db8500-cpufreq.c<br/>index 0bf1b8910eeb..74b830b635a6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/cpufreq/db8500-cpufreq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/cpufreq/db8500-cpufreq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/cpufreq/db8500-cpufreq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/cpufreq/db8500-cpufreq.c</a></div><div class='hunk'>@@ -161,7 +161,7 @@ static struct cpufreq_driver db8500_cpufreq_driver = {</div><div class='ctx'> </div><div class='ctx'> static int __init db8500_cpufreq_register(void)</div><div class='ctx'> {</div><div class='del'>-	if (!cpu_is_u8500v20_or_later())</div><div class='add'>+	if (!cpu_is_u8500_family())</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	pr_info("cpufreq for DB8500 started\n");</div><div class='head'>diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c<br/>index 2f0083a51a9a..d90519cec880 100644<br/>--- a/<a href='/drm-misc/tree/drivers/cpuidle/cpuidle.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/cpuidle/cpuidle.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/cpuidle/cpuidle.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/cpuidle/cpuidle.c</a></div><div class='hunk'>@@ -40,17 +40,6 @@ void disable_cpuidle(void)</div><div class='ctx'> 	off = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ARCH_HAS_CPU_IDLE_WAIT)</div><div class='del'>-static void cpuidle_kick_cpus(void)</div><div class='del'>-{</div><div class='del'>-	cpu_idle_wait();</div><div class='del'>-}</div><div class='del'>-#elif defined(CONFIG_SMP)</div><div class='del'>-# error "Arch needs cpu_idle_wait() equivalent here"</div><div class='del'>-#else /* !CONFIG_ARCH_HAS_CPU_IDLE_WAIT &amp;&amp; !CONFIG_SMP */</div><div class='del'>-static void cpuidle_kick_cpus(void) {}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static int __cpuidle_register_device(struct cpuidle_device *dev);</div><div class='ctx'> </div><div class='ctx'> static inline int cpuidle_enter(struct cpuidle_device *dev,</div><div class='hunk'>@@ -186,7 +175,7 @@ void cpuidle_uninstall_idle_handler(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (enabled_devices) {</div><div class='ctx'> 		initialized = 0;</div><div class='del'>-		cpuidle_kick_cpus();</div><div class='add'>+		kick_all_cpus_sync();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig<br/>index ab9abb46d01a..1092a770482e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/crypto/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/crypto/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/Kconfig</a></div><div class='hunk'>@@ -111,6 +111,7 @@ config CRYPTO_DES_S390</div><div class='ctx'> 	depends on S390</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_BLKCIPHER</div><div class='add'>+	select CRYPTO_DES</div><div class='ctx'> 	help</div><div class='ctx'> 	  This is the s390 hardware accelerated implementation of the</div><div class='ctx'> 	  DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).</div><div class='hunk'>@@ -164,6 +165,7 @@ config CRYPTO_DEV_MV_CESA</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_AES</div><div class='ctx'> 	select CRYPTO_BLKCIPHER2</div><div class='add'>+	select CRYPTO_HASH</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver allows you to utilize the Cryptographic Engines and</div><div class='ctx'> 	  Security Accelerator (CESA) which can be found on the Marvell Orion</div><div class='hunk'>@@ -295,4 +297,32 @@ config CRYPTO_DEV_TEGRA_AES</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module</div><div class='ctx'> 	  will be called tegra-aes.</div><div class='ctx'> </div><div class='add'>+config CRYPTO_DEV_NX</div><div class='add'>+	tristate "Support for Power7+ in-Nest cryptographic accleration"</div><div class='add'>+	depends on PPC64 &amp;&amp; IBMVIO</div><div class='add'>+	select CRYPTO_AES</div><div class='add'>+	select CRYPTO_CBC</div><div class='add'>+	select CRYPTO_ECB</div><div class='add'>+	select CRYPTO_CCM</div><div class='add'>+	select CRYPTO_GCM</div><div class='add'>+	select CRYPTO_AUTHENC</div><div class='add'>+	select CRYPTO_XCBC</div><div class='add'>+	select CRYPTO_SHA256</div><div class='add'>+	select CRYPTO_SHA512</div><div class='add'>+	help</div><div class='add'>+	  Support for Power7+ in-Nest cryptographic acceleration. This</div><div class='add'>+	  module supports acceleration for AES and SHA2 algorithms. If you</div><div class='add'>+	  choose 'M' here, this module will be called nx_crypto.</div><div class='add'>+</div><div class='add'>+config CRYPTO_DEV_UX500</div><div class='add'>+	tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"</div><div class='add'>+	depends on ARCH_U8500</div><div class='add'>+	select CRYPTO_ALGAPI</div><div class='add'>+	help</div><div class='add'>+	  Driver for ST-Ericsson UX500 crypto engine.</div><div class='add'>+</div><div class='add'>+if CRYPTO_DEV_UX500</div><div class='add'>+	source "drivers/crypto/ux500/Kconfig"</div><div class='add'>+endif # if CRYPTO_DEV_UX500</div><div class='add'>+</div><div class='ctx'> endif # CRYPTO_HW</div><div class='head'>diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile<br/>index f3e64eadd7af..01390325d72d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/crypto/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/crypto/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/Makefile</a></div><div class='hunk'>@@ -14,3 +14,4 @@ obj-$(CONFIG_CRYPTO_DEV_OMAP_AES) += omap-aes.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_PICOXCELL) += picoxcell_crypto.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_S5P) += s5p-sss.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_TEGRA_AES) += tegra-aes.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_DEV_UX500) += ux500/
\ No newline at end of file</div><div class='head'>diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c<br/>index 13f8e1a14988..802e85102c32 100644<br/>--- a/<a href='/drm-misc/tree/drivers/crypto/amcc/crypto4xx_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/crypto/amcc/crypto4xx_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/amcc/crypto4xx_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/amcc/crypto4xx_core.c</a></div><div class='hunk'>@@ -1244,9 +1244,9 @@ err_start_dev:</div><div class='ctx'> 	iounmap(core_dev-&gt;dev-&gt;ce_base);</div><div class='ctx'> err_iomap:</div><div class='ctx'> 	free_irq(core_dev-&gt;irq, dev);</div><div class='add'>+err_request_irq:</div><div class='ctx'> 	irq_dispose_mapping(core_dev-&gt;irq);</div><div class='ctx'> 	tasklet_kill(&amp;core_dev-&gt;tasklet);</div><div class='del'>-err_request_irq:</div><div class='ctx'> 	crypto4xx_destroy_sdr(core_dev-&gt;dev);</div><div class='ctx'> err_build_sdr:</div><div class='ctx'> 	crypto4xx_destroy_gdr(core_dev-&gt;dev);</div><div class='head'>diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c<br/>index 534a36469d57..4eec389184d3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/crypto/caam/caamalg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/crypto/caam/caamalg.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/caam/caamalg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/caam/caamalg.c</a></div><div class='hunk'>@@ -2267,8 +2267,11 @@ static void __exit caam_algapi_exit(void)</div><div class='ctx'> 	int i, err;</div><div class='ctx'> </div><div class='ctx'> 	dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");</div><div class='del'>-	if (!dev_node)</div><div class='del'>-		return;</div><div class='add'>+	if (!dev_node) {</div><div class='add'>+		dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec4.0");</div><div class='add'>+		if (!dev_node)</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	pdev = of_find_device_by_node(dev_node);</div><div class='ctx'> 	if (!pdev)</div><div class='hunk'>@@ -2350,8 +2353,11 @@ static int __init caam_algapi_init(void)</div><div class='ctx'> 	int i = 0, err = 0;</div><div class='ctx'> </div><div class='ctx'> 	dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");</div><div class='del'>-	if (!dev_node)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	if (!dev_node) {</div><div class='add'>+		dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec4.0");</div><div class='add'>+		if (!dev_node)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	pdev = of_find_device_by_node(dev_node);</div><div class='ctx'> 	if (!pdev)</div><div class='head'>diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c<br/>index c5f61c55d923..77557ebcd337 100644<br/>--- a/<a href='/drm-misc/tree/drivers/crypto/caam/ctrl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/crypto/caam/ctrl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/caam/ctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/caam/ctrl.c</a></div><div class='hunk'>@@ -98,6 +98,12 @@ static int caam_probe(struct platform_device *pdev)</div><div class='ctx'> 	rspec = 0;</div><div class='ctx'> 	for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring")</div><div class='ctx'> 		rspec++;</div><div class='add'>+	if (!rspec) {</div><div class='add'>+		/* for backward compatible with device trees */</div><div class='add'>+		for_each_compatible_node(np, NULL, "fsl,sec4.0-job-ring")</div><div class='add'>+			rspec++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ctrlpriv-&gt;jrdev = kzalloc(sizeof(struct device *) * rspec, GFP_KERNEL);</div><div class='ctx'> 	if (ctrlpriv-&gt;jrdev == NULL) {</div><div class='ctx'> 		iounmap(&amp;topregs-&gt;ctrl);</div><div class='hunk'>@@ -111,6 +117,13 @@ static int caam_probe(struct platform_device *pdev)</div><div class='ctx'> 		ctrlpriv-&gt;total_jobrs++;</div><div class='ctx'> 		ring++;</div><div class='ctx'> 	}</div><div class='add'>+	if (!ring) {</div><div class='add'>+		for_each_compatible_node(np, NULL, "fsl,sec4.0-job-ring") {</div><div class='add'>+			caam_jr_probe(pdev, np, ring);</div><div class='add'>+			ctrlpriv-&gt;total_jobrs++;</div><div class='add'>+			ring++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check to see if QI present. If so, enable */</div><div class='ctx'> 	ctrlpriv-&gt;qi_present = !!(rd_reg64(&amp;topregs-&gt;ctrl.perfmon.comp_parms) &amp;</div><div class='hunk'>@@ -226,6 +239,9 @@ static struct of_device_id caam_match[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.compatible = "fsl,sec-v4.0",</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "fsl,sec4.0",</div><div class='add'>+	},</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, caam_match);</div><div class='head'>diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c<br/>index e6ecc5f23943..1cc6b3f3e262 100644<br/>--- a/<a href='/drm-misc/tree/drivers/crypto/mv_cesa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/crypto/mv_cesa.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/mv_cesa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/mv_cesa.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/sha.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -79,6 +80,7 @@ struct crypto_priv {</div><div class='ctx'> 	void __iomem *reg;</div><div class='ctx'> 	void __iomem *sram;</div><div class='ctx'> 	int irq;</div><div class='add'>+	struct clk *clk;</div><div class='ctx'> 	struct task_struct *queue_th;</div><div class='ctx'> </div><div class='ctx'> 	/* the lock protects queue and eng_st */</div><div class='hunk'>@@ -1053,6 +1055,12 @@ static int mv_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_thread;</div><div class='ctx'> </div><div class='add'>+	/* Not all platforms can gate the clock, so it is not</div><div class='add'>+	   an error if the clock does not exists. */</div><div class='add'>+	cp-&gt;clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (!IS_ERR(cp-&gt;clk))</div><div class='add'>+		clk_prepare_enable(cp-&gt;clk);</div><div class='add'>+</div><div class='ctx'> 	writel(SEC_INT_ACCEL0_DONE, cpg-&gt;reg + SEC_ACCEL_INT_MASK);</div><div class='ctx'> 	writel(SEC_CFG_STOP_DIG_ERR, cpg-&gt;reg + SEC_ACCEL_CFG);</div><div class='ctx'> 	writel(SRAM_CONFIG, cpg-&gt;reg + SEC_ACCEL_DESC_P0);</div><div class='hunk'>@@ -1118,6 +1126,12 @@ static int mv_remove(struct platform_device *pdev)</div><div class='ctx'> 	memset(cp-&gt;sram, 0, cp-&gt;sram_size);</div><div class='ctx'> 	iounmap(cp-&gt;sram);</div><div class='ctx'> 	iounmap(cp-&gt;reg);</div><div class='add'>+</div><div class='add'>+	if (!IS_ERR(cp-&gt;clk)) {</div><div class='add'>+		clk_disable_unprepare(cp-&gt;clk);</div><div class='add'>+		clk_put(cp-&gt;clk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	kfree(cp);</div><div class='ctx'> 	cpg = NULL;</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/crypto/nx/Makefile b/drivers/crypto/nx/Makefile<br/>new file mode 100644<br/>index 000000000000..411ce59c80d1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/Makefile</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+obj-$(CONFIG_CRYPTO_DEV_NX) += nx-crypto.o</div><div class='add'>+nx-crypto-objs := nx.o \</div><div class='add'>+		  nx_debugfs.o \</div><div class='add'>+		  nx-aes-cbc.o \</div><div class='add'>+		  nx-aes-ecb.o \</div><div class='add'>+		  nx-aes-gcm.o \</div><div class='add'>+		  nx-aes-ccm.o \</div><div class='add'>+		  nx-aes-ctr.o \</div><div class='add'>+		  nx-aes-xcbc.o \</div><div class='add'>+		  nx-sha256.o \</div><div class='add'>+		  nx-sha512.o</div><div class='head'>diff --git a/drivers/crypto/nx/nx-aes-cbc.c b/drivers/crypto/nx/nx-aes-cbc.c<br/>new file mode 100644<br/>index 000000000000..69ed796ee327<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/nx-aes-cbc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-aes-cbc.c</a></div><div class='hunk'>@@ -0,0 +1,141 @@</div><div class='add'>+/**</div><div class='add'>+ * AES CBC routines supporting the Power 7+ Nest Accelerators driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2012 International Business Machines Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 only.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ * Author: Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;asm/vio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "nx_csbcpb.h"</div><div class='add'>+#include "nx.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int cbc_aes_nx_set_key(struct crypto_tfm *tfm,</div><div class='add'>+			      const u8          *in_key,</div><div class='add'>+			      unsigned int       key_len)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+</div><div class='add'>+	nx_ctx_init(nx_ctx, HCOP_FC_AES);</div><div class='add'>+</div><div class='add'>+	switch (key_len) {</div><div class='add'>+	case AES_KEYSIZE_128:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_128];</div><div class='add'>+		break;</div><div class='add'>+	case AES_KEYSIZE_192:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_192);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_192];</div><div class='add'>+		break;</div><div class='add'>+	case AES_KEYSIZE_256:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_256);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_256];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	csbcpb-&gt;cpb.hdr.mode = NX_MODE_AES_CBC;</div><div class='add'>+	memcpy(csbcpb-&gt;cpb.aes_cbc.key, in_key, key_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cbc_aes_nx_crypt(struct blkcipher_desc *desc,</div><div class='add'>+			    struct scatterlist    *dst,</div><div class='add'>+			    struct scatterlist    *src,</div><div class='add'>+			    unsigned int           nbytes,</div><div class='add'>+			    int                    enc)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_blkcipher_ctx(desc-&gt;tfm);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (nbytes &gt; nx_ctx-&gt;ap-&gt;databytelen)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (enc)</div><div class='add'>+		NX_CPB_FDM(csbcpb) |= NX_FDM_ENDE_ENCRYPT;</div><div class='add'>+	else</div><div class='add'>+		NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_ENDE_ENCRYPT;</div><div class='add'>+</div><div class='add'>+	rc = nx_build_sg_lists(nx_ctx, desc, dst, src, nbytes,</div><div class='add'>+			       csbcpb-&gt;cpb.aes_cbc.iv);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!nx_ctx-&gt;op.inlen || !nx_ctx-&gt;op.outlen) {</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op,</div><div class='add'>+			   desc-&gt;flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;aes_ops));</div><div class='add'>+	atomic64_add(csbcpb-&gt;csb.processed_byte_count,</div><div class='add'>+		     &amp;(nx_ctx-&gt;stats-&gt;aes_bytes));</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cbc_aes_nx_encrypt(struct blkcipher_desc *desc,</div><div class='add'>+			      struct scatterlist    *dst,</div><div class='add'>+			      struct scatterlist    *src,</div><div class='add'>+			      unsigned int           nbytes)</div><div class='add'>+{</div><div class='add'>+	return cbc_aes_nx_crypt(desc, dst, src, nbytes, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cbc_aes_nx_decrypt(struct blkcipher_desc *desc,</div><div class='add'>+			      struct scatterlist    *dst,</div><div class='add'>+			      struct scatterlist    *src,</div><div class='add'>+			      unsigned int           nbytes)</div><div class='add'>+{</div><div class='add'>+	return cbc_aes_nx_crypt(desc, dst, src, nbytes, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct crypto_alg nx_cbc_aes_alg = {</div><div class='add'>+	.cra_name        = "cbc(aes)",</div><div class='add'>+	.cra_driver_name = "cbc-aes-nx",</div><div class='add'>+	.cra_priority    = 300,</div><div class='add'>+	.cra_flags       = CRYPTO_ALG_TYPE_BLKCIPHER,</div><div class='add'>+	.cra_blocksize   = AES_BLOCK_SIZE,</div><div class='add'>+	.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='add'>+	.cra_type        = &amp;crypto_blkcipher_type,</div><div class='add'>+	.cra_module      = THIS_MODULE,</div><div class='add'>+	.cra_list        = LIST_HEAD_INIT(nx_cbc_aes_alg.cra_list),</div><div class='add'>+	.cra_init        = nx_crypto_ctx_aes_cbc_init,</div><div class='add'>+	.cra_exit        = nx_crypto_ctx_exit,</div><div class='add'>+	.cra_blkcipher = {</div><div class='add'>+		.min_keysize = AES_MIN_KEY_SIZE,</div><div class='add'>+		.max_keysize = AES_MAX_KEY_SIZE,</div><div class='add'>+		.ivsize      = AES_BLOCK_SIZE,</div><div class='add'>+		.setkey      = cbc_aes_nx_set_key,</div><div class='add'>+		.encrypt     = cbc_aes_nx_encrypt,</div><div class='add'>+		.decrypt     = cbc_aes_nx_decrypt,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/crypto/nx/nx-aes-ccm.c b/drivers/crypto/nx/nx-aes-ccm.c<br/>new file mode 100644<br/>index 000000000000..7aeac678b9c0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/nx-aes-ccm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-aes-ccm.c</a></div><div class='hunk'>@@ -0,0 +1,468 @@</div><div class='add'>+/**</div><div class='add'>+ * AES CCM routines supporting the Power 7+ Nest Accelerators driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 International Business Machines Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 only.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ * Author: Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/internal/aead.h&gt;</div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;asm/vio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "nx_csbcpb.h"</div><div class='add'>+#include "nx.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int ccm_aes_nx_set_key(struct crypto_aead *tfm,</div><div class='add'>+			      const u8           *in_key,</div><div class='add'>+			      unsigned int        key_len)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+	struct nx_csbcpb *csbcpb_aead = nx_ctx-&gt;csbcpb_aead;</div><div class='add'>+</div><div class='add'>+	nx_ctx_init(nx_ctx, HCOP_FC_AES);</div><div class='add'>+</div><div class='add'>+	switch (key_len) {</div><div class='add'>+	case AES_KEYSIZE_128:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_128);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_128];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	csbcpb-&gt;cpb.hdr.mode = NX_MODE_AES_CCM;</div><div class='add'>+	memcpy(csbcpb-&gt;cpb.aes_ccm.key, in_key, key_len);</div><div class='add'>+</div><div class='add'>+	csbcpb_aead-&gt;cpb.hdr.mode = NX_MODE_AES_CCA;</div><div class='add'>+	memcpy(csbcpb_aead-&gt;cpb.aes_cca.key, in_key, key_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ccm4309_aes_nx_set_key(struct crypto_aead *tfm,</div><div class='add'>+				  const u8           *in_key,</div><div class='add'>+				  unsigned int        key_len)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;tfm-&gt;base);</div><div class='add'>+</div><div class='add'>+	if (key_len &lt; 3)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	key_len -= 3;</div><div class='add'>+</div><div class='add'>+	memcpy(nx_ctx-&gt;priv.ccm.nonce, in_key + key_len, 3);</div><div class='add'>+</div><div class='add'>+	return ccm_aes_nx_set_key(tfm, in_key, key_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ccm_aes_nx_setauthsize(struct crypto_aead *tfm,</div><div class='add'>+				  unsigned int authsize)</div><div class='add'>+{</div><div class='add'>+	switch (authsize) {</div><div class='add'>+	case 4:</div><div class='add'>+	case 6:</div><div class='add'>+	case 8:</div><div class='add'>+	case 10:</div><div class='add'>+	case 12:</div><div class='add'>+	case 14:</div><div class='add'>+	case 16:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	crypto_aead_crt(tfm)-&gt;authsize = authsize;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ccm4309_aes_nx_setauthsize(struct crypto_aead *tfm,</div><div class='add'>+				      unsigned int authsize)</div><div class='add'>+{</div><div class='add'>+	switch (authsize) {</div><div class='add'>+	case 8:</div><div class='add'>+	case 12:</div><div class='add'>+	case 16:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	crypto_aead_crt(tfm)-&gt;authsize = authsize;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* taken from crypto/ccm.c */</div><div class='add'>+static int set_msg_len(u8 *block, unsigned int msglen, int csize)</div><div class='add'>+{</div><div class='add'>+	__be32 data;</div><div class='add'>+</div><div class='add'>+	memset(block, 0, csize);</div><div class='add'>+	block += csize;</div><div class='add'>+</div><div class='add'>+	if (csize &gt;= 4)</div><div class='add'>+		csize = 4;</div><div class='add'>+	else if (msglen &gt; (unsigned int)(1 &lt;&lt; (8 * csize)))</div><div class='add'>+		return -EOVERFLOW;</div><div class='add'>+</div><div class='add'>+	data = cpu_to_be32(msglen);</div><div class='add'>+	memcpy(block - csize, (u8 *)&amp;data + 4 - csize, csize);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* taken from crypto/ccm.c */</div><div class='add'>+static inline int crypto_ccm_check_iv(const u8 *iv)</div><div class='add'>+{</div><div class='add'>+	/* 2 &lt;= L &lt;= 8, so 1 &lt;= L' &lt;= 7. */</div><div class='add'>+	if (1 &gt; iv[0] || iv[0] &gt; 7)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* based on code from crypto/ccm.c */</div><div class='add'>+static int generate_b0(u8 *iv, unsigned int assoclen, unsigned int authsize,</div><div class='add'>+		       unsigned int cryptlen, u8 *b0)</div><div class='add'>+{</div><div class='add'>+	unsigned int l, lp, m = authsize;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	memcpy(b0, iv, 16);</div><div class='add'>+</div><div class='add'>+	lp = b0[0];</div><div class='add'>+	l = lp + 1;</div><div class='add'>+</div><div class='add'>+	/* set m, bits 3-5 */</div><div class='add'>+	*b0 |= (8 * ((m - 2) / 2));</div><div class='add'>+</div><div class='add'>+	/* set adata, bit 6, if associated data is used */</div><div class='add'>+	if (assoclen)</div><div class='add'>+		*b0 |= 64;</div><div class='add'>+</div><div class='add'>+	rc = set_msg_len(b0 + 16 - l, cryptlen, l);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int generate_pat(u8                   *iv,</div><div class='add'>+			struct aead_request  *req,</div><div class='add'>+			struct nx_crypto_ctx *nx_ctx,</div><div class='add'>+			unsigned int          authsize,</div><div class='add'>+			unsigned int          nbytes,</div><div class='add'>+			u8                   *out)</div><div class='add'>+{</div><div class='add'>+	struct nx_sg *nx_insg = nx_ctx-&gt;in_sg;</div><div class='add'>+	struct nx_sg *nx_outsg = nx_ctx-&gt;out_sg;</div><div class='add'>+	unsigned int iauth_len = 0;</div><div class='add'>+	struct vio_pfo_op *op = NULL;</div><div class='add'>+	u8 tmp[16], *b1 = NULL, *b0 = NULL, *result = NULL;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* zero the ctr value */</div><div class='add'>+	memset(iv + 15 - iv[0], 0, iv[0] + 1);</div><div class='add'>+</div><div class='add'>+	if (!req-&gt;assoclen) {</div><div class='add'>+		b0 = nx_ctx-&gt;csbcpb-&gt;cpb.aes_ccm.in_pat_or_b0;</div><div class='add'>+	} else if (req-&gt;assoclen &lt;= 14) {</div><div class='add'>+		/* if associated data is 14 bytes or less, we do 1 GCM</div><div class='add'>+		 * operation on 2 AES blocks, B0 (stored in the csbcpb) and B1,</div><div class='add'>+		 * which is fed in through the source buffers here */</div><div class='add'>+		b0 = nx_ctx-&gt;csbcpb-&gt;cpb.aes_ccm.in_pat_or_b0;</div><div class='add'>+		b1 = nx_ctx-&gt;priv.ccm.iauth_tag;</div><div class='add'>+		iauth_len = req-&gt;assoclen;</div><div class='add'>+</div><div class='add'>+		nx_insg = nx_build_sg_list(nx_insg, b1, 16, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+		nx_outsg = nx_build_sg_list(nx_outsg, tmp, 16,</div><div class='add'>+					    nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+</div><div class='add'>+		/* inlen should be negative, indicating to phyp that its a</div><div class='add'>+		 * pointer to an sg list */</div><div class='add'>+		nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - nx_insg) *</div><div class='add'>+					sizeof(struct nx_sg);</div><div class='add'>+		nx_ctx-&gt;op.outlen = (nx_ctx-&gt;out_sg - nx_outsg) *</div><div class='add'>+					sizeof(struct nx_sg);</div><div class='add'>+</div><div class='add'>+		NX_CPB_FDM(nx_ctx-&gt;csbcpb) |= NX_FDM_ENDE_ENCRYPT;</div><div class='add'>+		NX_CPB_FDM(nx_ctx-&gt;csbcpb) |= NX_FDM_INTERMEDIATE;</div><div class='add'>+</div><div class='add'>+		op = &amp;nx_ctx-&gt;op;</div><div class='add'>+		result = nx_ctx-&gt;csbcpb-&gt;cpb.aes_ccm.out_pat_or_mac;</div><div class='add'>+	} else if (req-&gt;assoclen &lt;= 65280) {</div><div class='add'>+		/* if associated data is less than (2^16 - 2^8), we construct</div><div class='add'>+		 * B1 differently and feed in the associated data to a CCA</div><div class='add'>+		 * operation */</div><div class='add'>+		b0 = nx_ctx-&gt;csbcpb_aead-&gt;cpb.aes_cca.b0;</div><div class='add'>+		b1 = nx_ctx-&gt;csbcpb_aead-&gt;cpb.aes_cca.b1;</div><div class='add'>+		iauth_len = 14;</div><div class='add'>+</div><div class='add'>+		/* remaining assoc data must have scatterlist built for it */</div><div class='add'>+		nx_insg = nx_walk_and_build(nx_insg, nx_ctx-&gt;ap-&gt;sglen,</div><div class='add'>+					    req-&gt;assoc, iauth_len,</div><div class='add'>+					    req-&gt;assoclen - iauth_len);</div><div class='add'>+		nx_ctx-&gt;op_aead.inlen = (nx_ctx-&gt;in_sg - nx_insg) *</div><div class='add'>+						sizeof(struct nx_sg);</div><div class='add'>+</div><div class='add'>+		op = &amp;nx_ctx-&gt;op_aead;</div><div class='add'>+		result = nx_ctx-&gt;csbcpb_aead-&gt;cpb.aes_cca.out_pat_or_b0;</div><div class='add'>+	} else {</div><div class='add'>+		/* if associated data is less than (2^32), we construct B1</div><div class='add'>+		 * differently yet again and feed in the associated data to a</div><div class='add'>+		 * CCA operation */</div><div class='add'>+		pr_err("associated data len is %u bytes (returning -EINVAL)\n",</div><div class='add'>+		       req-&gt;assoclen);</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = generate_b0(iv, req-&gt;assoclen, authsize, nbytes, b0);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='add'>+	if (b1) {</div><div class='add'>+		memset(b1, 0, 16);</div><div class='add'>+		*(u16 *)b1 = (u16)req-&gt;assoclen;</div><div class='add'>+</div><div class='add'>+		scatterwalk_map_and_copy(b1 + 2, req-&gt;assoc, 0,</div><div class='add'>+					 iauth_len, SCATTERWALK_FROM_SG);</div><div class='add'>+</div><div class='add'>+		rc = nx_hcall_sync(nx_ctx, op,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto done;</div><div class='add'>+</div><div class='add'>+		atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;aes_ops));</div><div class='add'>+		atomic64_add(req-&gt;assoclen, &amp;(nx_ctx-&gt;stats-&gt;aes_bytes));</div><div class='add'>+</div><div class='add'>+		memcpy(out, result, AES_BLOCK_SIZE);</div><div class='add'>+	}</div><div class='add'>+done:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ccm_nx_decrypt(struct aead_request   *req,</div><div class='add'>+			  struct blkcipher_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+	unsigned int nbytes = req-&gt;cryptlen;</div><div class='add'>+	unsigned int authsize = crypto_aead_authsize(crypto_aead_reqtfm(req));</div><div class='add'>+	struct nx_ccm_priv *priv = &amp;nx_ctx-&gt;priv.ccm;</div><div class='add'>+	int rc = -1;</div><div class='add'>+</div><div class='add'>+	if (nbytes &gt; nx_ctx-&gt;ap-&gt;databytelen)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	nbytes -= authsize;</div><div class='add'>+</div><div class='add'>+	/* copy out the auth tag to compare with later */</div><div class='add'>+	scatterwalk_map_and_copy(priv-&gt;oauth_tag,</div><div class='add'>+				 req-&gt;src, nbytes, authsize,</div><div class='add'>+				 SCATTERWALK_FROM_SG);</div><div class='add'>+</div><div class='add'>+	rc = generate_pat(desc-&gt;info, req, nx_ctx, authsize, nbytes,</div><div class='add'>+			  csbcpb-&gt;cpb.aes_ccm.in_pat_or_b0);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rc = nx_build_sg_lists(nx_ctx, desc, req-&gt;dst, req-&gt;src, nbytes,</div><div class='add'>+			       csbcpb-&gt;cpb.aes_ccm.iv_or_ctr);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	NX_CPB_FDM(nx_ctx-&gt;csbcpb) &amp;= ~NX_FDM_ENDE_ENCRYPT;</div><div class='add'>+	NX_CPB_FDM(nx_ctx-&gt;csbcpb) &amp;= ~NX_FDM_INTERMEDIATE;</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op,</div><div class='add'>+			   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;aes_ops));</div><div class='add'>+	atomic64_add(csbcpb-&gt;csb.processed_byte_count,</div><div class='add'>+		     &amp;(nx_ctx-&gt;stats-&gt;aes_bytes));</div><div class='add'>+</div><div class='add'>+	rc = memcmp(csbcpb-&gt;cpb.aes_ccm.out_pat_or_mac, priv-&gt;oauth_tag,</div><div class='add'>+		    authsize) ? -EBADMSG : 0;</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ccm_nx_encrypt(struct aead_request   *req,</div><div class='add'>+			  struct blkcipher_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+	unsigned int nbytes = req-&gt;cryptlen;</div><div class='add'>+	unsigned int authsize = crypto_aead_authsize(crypto_aead_reqtfm(req));</div><div class='add'>+	int rc = -1;</div><div class='add'>+</div><div class='add'>+	if (nbytes &gt; nx_ctx-&gt;ap-&gt;databytelen)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rc = generate_pat(desc-&gt;info, req, nx_ctx, authsize, nbytes,</div><div class='add'>+			  csbcpb-&gt;cpb.aes_ccm.in_pat_or_b0);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rc = nx_build_sg_lists(nx_ctx, desc, req-&gt;dst, req-&gt;src, nbytes,</div><div class='add'>+			       csbcpb-&gt;cpb.aes_ccm.iv_or_ctr);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	NX_CPB_FDM(csbcpb) |= NX_FDM_ENDE_ENCRYPT;</div><div class='add'>+	NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_INTERMEDIATE;</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op,</div><div class='add'>+			   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;aes_ops));</div><div class='add'>+	atomic64_add(csbcpb-&gt;csb.processed_byte_count,</div><div class='add'>+		     &amp;(nx_ctx-&gt;stats-&gt;aes_bytes));</div><div class='add'>+</div><div class='add'>+	/* copy out the auth tag */</div><div class='add'>+	scatterwalk_map_and_copy(csbcpb-&gt;cpb.aes_ccm.out_pat_or_mac,</div><div class='add'>+				 req-&gt;dst, nbytes, authsize,</div><div class='add'>+				 SCATTERWALK_TO_SG);</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ccm4309_aes_nx_encrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='add'>+	struct blkcipher_desc desc;</div><div class='add'>+	u8 *iv = nx_ctx-&gt;priv.ccm.iv;</div><div class='add'>+</div><div class='add'>+	iv[0] = 3;</div><div class='add'>+	memcpy(iv + 1, nx_ctx-&gt;priv.ccm.nonce, 3);</div><div class='add'>+	memcpy(iv + 4, req-&gt;iv, 8);</div><div class='add'>+</div><div class='add'>+	desc.info = iv;</div><div class='add'>+	desc.tfm = (struct crypto_blkcipher *)req-&gt;base.tfm;</div><div class='add'>+</div><div class='add'>+	return ccm_nx_encrypt(req, &amp;desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ccm_aes_nx_encrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct blkcipher_desc desc;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	desc.info = req-&gt;iv;</div><div class='add'>+	desc.tfm = (struct crypto_blkcipher *)req-&gt;base.tfm;</div><div class='add'>+</div><div class='add'>+	rc = crypto_ccm_check_iv(desc.info);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return ccm_nx_encrypt(req, &amp;desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ccm4309_aes_nx_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='add'>+	struct blkcipher_desc desc;</div><div class='add'>+	u8 *iv = nx_ctx-&gt;priv.ccm.iv;</div><div class='add'>+</div><div class='add'>+	iv[0] = 3;</div><div class='add'>+	memcpy(iv + 1, nx_ctx-&gt;priv.ccm.nonce, 3);</div><div class='add'>+	memcpy(iv + 4, req-&gt;iv, 8);</div><div class='add'>+</div><div class='add'>+	desc.info = iv;</div><div class='add'>+	desc.tfm = (struct crypto_blkcipher *)req-&gt;base.tfm;</div><div class='add'>+</div><div class='add'>+	return ccm_nx_decrypt(req, &amp;desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ccm_aes_nx_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct blkcipher_desc desc;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	desc.info = req-&gt;iv;</div><div class='add'>+	desc.tfm = (struct crypto_blkcipher *)req-&gt;base.tfm;</div><div class='add'>+</div><div class='add'>+	rc = crypto_ccm_check_iv(desc.info);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return ccm_nx_decrypt(req, &amp;desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* tell the block cipher walk routines that this is a stream cipher by</div><div class='add'>+ * setting cra_blocksize to 1. Even using blkcipher_walk_virt_block</div><div class='add'>+ * during encrypt/decrypt doesn't solve this problem, because it calls</div><div class='add'>+ * blkcipher_walk_done under the covers, which doesn't use walk-&gt;blocksize,</div><div class='add'>+ * but instead uses this tfm-&gt;blocksize. */</div><div class='add'>+struct crypto_alg nx_ccm_aes_alg = {</div><div class='add'>+	.cra_name        = "ccm(aes)",</div><div class='add'>+	.cra_driver_name = "ccm-aes-nx",</div><div class='add'>+	.cra_priority    = 300,</div><div class='add'>+	.cra_flags       = CRYPTO_ALG_TYPE_AEAD |</div><div class='add'>+			   CRYPTO_ALG_NEED_FALLBACK,</div><div class='add'>+	.cra_blocksize   = 1,</div><div class='add'>+	.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='add'>+	.cra_type        = &amp;crypto_aead_type,</div><div class='add'>+	.cra_module      = THIS_MODULE,</div><div class='add'>+	.cra_list        = LIST_HEAD_INIT(nx_ccm_aes_alg.cra_list),</div><div class='add'>+	.cra_init        = nx_crypto_ctx_aes_ccm_init,</div><div class='add'>+	.cra_exit        = nx_crypto_ctx_exit,</div><div class='add'>+	.cra_aead = {</div><div class='add'>+		.ivsize      = AES_BLOCK_SIZE,</div><div class='add'>+		.maxauthsize = AES_BLOCK_SIZE,</div><div class='add'>+		.setkey      = ccm_aes_nx_set_key,</div><div class='add'>+		.setauthsize = ccm_aes_nx_setauthsize,</div><div class='add'>+		.encrypt     = ccm_aes_nx_encrypt,</div><div class='add'>+		.decrypt     = ccm_aes_nx_decrypt,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct crypto_alg nx_ccm4309_aes_alg = {</div><div class='add'>+	.cra_name        = "rfc4309(ccm(aes))",</div><div class='add'>+	.cra_driver_name = "rfc4309-ccm-aes-nx",</div><div class='add'>+	.cra_priority    = 300,</div><div class='add'>+	.cra_flags       = CRYPTO_ALG_TYPE_AEAD |</div><div class='add'>+			   CRYPTO_ALG_NEED_FALLBACK,</div><div class='add'>+	.cra_blocksize   = 1,</div><div class='add'>+	.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='add'>+	.cra_type        = &amp;crypto_nivaead_type,</div><div class='add'>+	.cra_module      = THIS_MODULE,</div><div class='add'>+	.cra_list        = LIST_HEAD_INIT(nx_ccm4309_aes_alg.cra_list),</div><div class='add'>+	.cra_init        = nx_crypto_ctx_aes_ccm_init,</div><div class='add'>+	.cra_exit        = nx_crypto_ctx_exit,</div><div class='add'>+	.cra_aead = {</div><div class='add'>+		.ivsize      = 8,</div><div class='add'>+		.maxauthsize = AES_BLOCK_SIZE,</div><div class='add'>+		.setkey      = ccm4309_aes_nx_set_key,</div><div class='add'>+		.setauthsize = ccm4309_aes_nx_setauthsize,</div><div class='add'>+		.encrypt     = ccm4309_aes_nx_encrypt,</div><div class='add'>+		.decrypt     = ccm4309_aes_nx_decrypt,</div><div class='add'>+		.geniv       = "seqiv",</div><div class='add'>+	}</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/crypto/nx/nx-aes-ctr.c b/drivers/crypto/nx/nx-aes-ctr.c<br/>new file mode 100644<br/>index 000000000000..52d4eb05e8f7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/nx-aes-ctr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-aes-ctr.c</a></div><div class='hunk'>@@ -0,0 +1,178 @@</div><div class='add'>+/**</div><div class='add'>+ * AES CTR routines supporting the Power 7+ Nest Accelerators driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2012 International Business Machines Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 only.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ * Author: Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/ctr.h&gt;</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;asm/vio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "nx_csbcpb.h"</div><div class='add'>+#include "nx.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int ctr_aes_nx_set_key(struct crypto_tfm *tfm,</div><div class='add'>+			      const u8          *in_key,</div><div class='add'>+			      unsigned int       key_len)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+</div><div class='add'>+	nx_ctx_init(nx_ctx, HCOP_FC_AES);</div><div class='add'>+</div><div class='add'>+	switch (key_len) {</div><div class='add'>+	case AES_KEYSIZE_128:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_128];</div><div class='add'>+		break;</div><div class='add'>+	case AES_KEYSIZE_192:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_192);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_192];</div><div class='add'>+		break;</div><div class='add'>+	case AES_KEYSIZE_256:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_256);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_256];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	csbcpb-&gt;cpb.hdr.mode = NX_MODE_AES_CTR;</div><div class='add'>+	memcpy(csbcpb-&gt;cpb.aes_ctr.key, in_key, key_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ctr3686_aes_nx_set_key(struct crypto_tfm *tfm,</div><div class='add'>+				  const u8          *in_key,</div><div class='add'>+				  unsigned int       key_len)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	if (key_len &lt; CTR_RFC3686_NONCE_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	memcpy(nx_ctx-&gt;priv.ctr.iv,</div><div class='add'>+	       in_key + key_len - CTR_RFC3686_NONCE_SIZE,</div><div class='add'>+	       CTR_RFC3686_NONCE_SIZE);</div><div class='add'>+</div><div class='add'>+	key_len -= CTR_RFC3686_NONCE_SIZE;</div><div class='add'>+</div><div class='add'>+	return ctr_aes_nx_set_key(tfm, in_key, key_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ctr_aes_nx_crypt(struct blkcipher_desc *desc,</div><div class='add'>+			    struct scatterlist    *dst,</div><div class='add'>+			    struct scatterlist    *src,</div><div class='add'>+			    unsigned int           nbytes)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_blkcipher_ctx(desc-&gt;tfm);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (nbytes &gt; nx_ctx-&gt;ap-&gt;databytelen)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rc = nx_build_sg_lists(nx_ctx, desc, dst, src, nbytes,</div><div class='add'>+			       csbcpb-&gt;cpb.aes_ctr.iv);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!nx_ctx-&gt;op.inlen || !nx_ctx-&gt;op.outlen) {</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op,</div><div class='add'>+			   desc-&gt;flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;aes_ops));</div><div class='add'>+	atomic64_add(csbcpb-&gt;csb.processed_byte_count,</div><div class='add'>+		     &amp;(nx_ctx-&gt;stats-&gt;aes_bytes));</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ctr3686_aes_nx_crypt(struct blkcipher_desc *desc,</div><div class='add'>+				struct scatterlist    *dst,</div><div class='add'>+				struct scatterlist    *src,</div><div class='add'>+				unsigned int           nbytes)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_blkcipher_ctx(desc-&gt;tfm);</div><div class='add'>+	u8 *iv = nx_ctx-&gt;priv.ctr.iv;</div><div class='add'>+</div><div class='add'>+	memcpy(iv + CTR_RFC3686_NONCE_SIZE,</div><div class='add'>+	       desc-&gt;info, CTR_RFC3686_IV_SIZE);</div><div class='add'>+	iv[15] = 1;</div><div class='add'>+</div><div class='add'>+	desc-&gt;info = nx_ctx-&gt;priv.ctr.iv;</div><div class='add'>+</div><div class='add'>+	return ctr_aes_nx_crypt(desc, dst, src, nbytes);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct crypto_alg nx_ctr_aes_alg = {</div><div class='add'>+	.cra_name        = "ctr(aes)",</div><div class='add'>+	.cra_driver_name = "ctr-aes-nx",</div><div class='add'>+	.cra_priority    = 300,</div><div class='add'>+	.cra_flags       = CRYPTO_ALG_TYPE_BLKCIPHER,</div><div class='add'>+	.cra_blocksize   = 1,</div><div class='add'>+	.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='add'>+	.cra_type        = &amp;crypto_blkcipher_type,</div><div class='add'>+	.cra_module      = THIS_MODULE,</div><div class='add'>+	.cra_list        = LIST_HEAD_INIT(nx_ctr_aes_alg.cra_list),</div><div class='add'>+	.cra_init        = nx_crypto_ctx_aes_ctr_init,</div><div class='add'>+	.cra_exit        = nx_crypto_ctx_exit,</div><div class='add'>+	.cra_blkcipher = {</div><div class='add'>+		.min_keysize = AES_MIN_KEY_SIZE,</div><div class='add'>+		.max_keysize = AES_MAX_KEY_SIZE,</div><div class='add'>+		.ivsize      = AES_BLOCK_SIZE,</div><div class='add'>+		.setkey      = ctr_aes_nx_set_key,</div><div class='add'>+		.encrypt     = ctr_aes_nx_crypt,</div><div class='add'>+		.decrypt     = ctr_aes_nx_crypt,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct crypto_alg nx_ctr3686_aes_alg = {</div><div class='add'>+	.cra_name        = "rfc3686(ctr(aes))",</div><div class='add'>+	.cra_driver_name = "rfc3686-ctr-aes-nx",</div><div class='add'>+	.cra_priority    = 300,</div><div class='add'>+	.cra_flags       = CRYPTO_ALG_TYPE_BLKCIPHER,</div><div class='add'>+	.cra_blocksize   = 1,</div><div class='add'>+	.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='add'>+	.cra_type        = &amp;crypto_blkcipher_type,</div><div class='add'>+	.cra_module      = THIS_MODULE,</div><div class='add'>+	.cra_list        = LIST_HEAD_INIT(nx_ctr3686_aes_alg.cra_list),</div><div class='add'>+	.cra_init        = nx_crypto_ctx_aes_ctr_init,</div><div class='add'>+	.cra_exit        = nx_crypto_ctx_exit,</div><div class='add'>+	.cra_blkcipher = {</div><div class='add'>+		.min_keysize = AES_MIN_KEY_SIZE + CTR_RFC3686_NONCE_SIZE,</div><div class='add'>+		.max_keysize = AES_MAX_KEY_SIZE + CTR_RFC3686_NONCE_SIZE,</div><div class='add'>+		.ivsize      = CTR_RFC3686_IV_SIZE,</div><div class='add'>+		.geniv       = "seqiv",</div><div class='add'>+		.setkey      = ctr3686_aes_nx_set_key,</div><div class='add'>+		.encrypt     = ctr3686_aes_nx_crypt,</div><div class='add'>+		.decrypt     = ctr3686_aes_nx_crypt,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/crypto/nx/nx-aes-ecb.c b/drivers/crypto/nx/nx-aes-ecb.c<br/>new file mode 100644<br/>index 000000000000..7b77bc2d1df4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/nx-aes-ecb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-aes-ecb.c</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+/**</div><div class='add'>+ * AES ECB routines supporting the Power 7+ Nest Accelerators driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2012 International Business Machines Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 only.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ * Author: Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;asm/vio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "nx_csbcpb.h"</div><div class='add'>+#include "nx.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int ecb_aes_nx_set_key(struct crypto_tfm *tfm,</div><div class='add'>+			      const u8          *in_key,</div><div class='add'>+			      unsigned int       key_len)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='add'>+</div><div class='add'>+	nx_ctx_init(nx_ctx, HCOP_FC_AES);</div><div class='add'>+</div><div class='add'>+	switch (key_len) {</div><div class='add'>+	case AES_KEYSIZE_128:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_128];</div><div class='add'>+		break;</div><div class='add'>+	case AES_KEYSIZE_192:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_192);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_192];</div><div class='add'>+		break;</div><div class='add'>+	case AES_KEYSIZE_256:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_256);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_256];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	csbcpb-&gt;cpb.hdr.mode = NX_MODE_AES_ECB;</div><div class='add'>+	memcpy(csbcpb-&gt;cpb.aes_ecb.key, in_key, key_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ecb_aes_nx_crypt(struct blkcipher_desc *desc,</div><div class='add'>+			    struct scatterlist    *dst,</div><div class='add'>+			    struct scatterlist    *src,</div><div class='add'>+			    unsigned int           nbytes,</div><div class='add'>+			    int                    enc)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_blkcipher_ctx(desc-&gt;tfm);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (nbytes &gt; nx_ctx-&gt;ap-&gt;databytelen)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (enc)</div><div class='add'>+		NX_CPB_FDM(csbcpb) |= NX_FDM_ENDE_ENCRYPT;</div><div class='add'>+	else</div><div class='add'>+		NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_ENDE_ENCRYPT;</div><div class='add'>+</div><div class='add'>+	rc = nx_build_sg_lists(nx_ctx, desc, dst, src, nbytes, NULL);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!nx_ctx-&gt;op.inlen || !nx_ctx-&gt;op.outlen) {</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op,</div><div class='add'>+			   desc-&gt;flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;aes_ops));</div><div class='add'>+	atomic64_add(csbcpb-&gt;csb.processed_byte_count,</div><div class='add'>+		     &amp;(nx_ctx-&gt;stats-&gt;aes_bytes));</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ecb_aes_nx_encrypt(struct blkcipher_desc *desc,</div><div class='add'>+			      struct scatterlist    *dst,</div><div class='add'>+			      struct scatterlist    *src,</div><div class='add'>+			      unsigned int           nbytes)</div><div class='add'>+{</div><div class='add'>+	return ecb_aes_nx_crypt(desc, dst, src, nbytes, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ecb_aes_nx_decrypt(struct blkcipher_desc *desc,</div><div class='add'>+			      struct scatterlist    *dst,</div><div class='add'>+			      struct scatterlist    *src,</div><div class='add'>+			      unsigned int           nbytes)</div><div class='add'>+{</div><div class='add'>+	return ecb_aes_nx_crypt(desc, dst, src, nbytes, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct crypto_alg nx_ecb_aes_alg = {</div><div class='add'>+	.cra_name        = "ecb(aes)",</div><div class='add'>+	.cra_driver_name = "ecb-aes-nx",</div><div class='add'>+	.cra_priority    = 300,</div><div class='add'>+	.cra_flags       = CRYPTO_ALG_TYPE_BLKCIPHER,</div><div class='add'>+	.cra_blocksize   = AES_BLOCK_SIZE,</div><div class='add'>+	.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='add'>+	.cra_type        = &amp;crypto_blkcipher_type,</div><div class='add'>+	.cra_module      = THIS_MODULE,</div><div class='add'>+	.cra_list        = LIST_HEAD_INIT(nx_ecb_aes_alg.cra_list),</div><div class='add'>+	.cra_init        = nx_crypto_ctx_aes_ecb_init,</div><div class='add'>+	.cra_exit        = nx_crypto_ctx_exit,</div><div class='add'>+	.cra_blkcipher = {</div><div class='add'>+		.min_keysize = AES_MIN_KEY_SIZE,</div><div class='add'>+		.max_keysize = AES_MAX_KEY_SIZE,</div><div class='add'>+		.setkey      = ecb_aes_nx_set_key,</div><div class='add'>+		.encrypt     = ecb_aes_nx_encrypt,</div><div class='add'>+		.decrypt     = ecb_aes_nx_decrypt,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/crypto/nx/nx-aes-gcm.c b/drivers/crypto/nx/nx-aes-gcm.c<br/>new file mode 100644<br/>index 000000000000..9ab1c7341dac<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/nx-aes-gcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-aes-gcm.c</a></div><div class='hunk'>@@ -0,0 +1,353 @@</div><div class='add'>+/**</div><div class='add'>+ * AES GCM routines supporting the Power 7+ Nest Accelerators driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 International Business Machines Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 only.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ * Author: Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/internal/aead.h&gt;</div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;asm/vio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "nx_csbcpb.h"</div><div class='add'>+#include "nx.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int gcm_aes_nx_set_key(struct crypto_aead *tfm,</div><div class='add'>+			      const u8           *in_key,</div><div class='add'>+			      unsigned int        key_len)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+	struct nx_csbcpb *csbcpb_aead = nx_ctx-&gt;csbcpb_aead;</div><div class='add'>+</div><div class='add'>+	nx_ctx_init(nx_ctx, HCOP_FC_AES);</div><div class='add'>+</div><div class='add'>+	switch (key_len) {</div><div class='add'>+	case AES_KEYSIZE_128:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_128);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_128];</div><div class='add'>+		break;</div><div class='add'>+	case AES_KEYSIZE_192:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_192);</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_192);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_192];</div><div class='add'>+		break;</div><div class='add'>+	case AES_KEYSIZE_256:</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_256);</div><div class='add'>+		NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_256);</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_256];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	csbcpb-&gt;cpb.hdr.mode = NX_MODE_AES_GCM;</div><div class='add'>+	memcpy(csbcpb-&gt;cpb.aes_gcm.key, in_key, key_len);</div><div class='add'>+</div><div class='add'>+	csbcpb_aead-&gt;cpb.hdr.mode = NX_MODE_AES_GCA;</div><div class='add'>+	memcpy(csbcpb_aead-&gt;cpb.aes_gca.key, in_key, key_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gcm4106_aes_nx_set_key(struct crypto_aead *tfm,</div><div class='add'>+				  const u8           *in_key,</div><div class='add'>+				  unsigned int        key_len)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;tfm-&gt;base);</div><div class='add'>+	char *nonce = nx_ctx-&gt;priv.gcm.nonce;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (key_len &lt; 4)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	key_len -= 4;</div><div class='add'>+</div><div class='add'>+	rc = gcm_aes_nx_set_key(tfm, in_key, key_len);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	memcpy(nonce, in_key + key_len, 4);</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gcm_aes_nx_setauthsize(struct crypto_aead *tfm,</div><div class='add'>+				  unsigned int authsize)</div><div class='add'>+{</div><div class='add'>+	if (authsize &gt; crypto_aead_alg(tfm)-&gt;maxauthsize)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	crypto_aead_crt(tfm)-&gt;authsize = authsize;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gcm4106_aes_nx_setauthsize(struct crypto_aead *tfm,</div><div class='add'>+				      unsigned int authsize)</div><div class='add'>+{</div><div class='add'>+	switch (authsize) {</div><div class='add'>+	case 8:</div><div class='add'>+	case 12:</div><div class='add'>+	case 16:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	crypto_aead_crt(tfm)-&gt;authsize = authsize;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nx_gca(struct nx_crypto_ctx  *nx_ctx,</div><div class='add'>+		  struct aead_request   *req,</div><div class='add'>+		  u8                    *out)</div><div class='add'>+{</div><div class='add'>+	struct nx_csbcpb *csbcpb_aead = nx_ctx-&gt;csbcpb_aead;</div><div class='add'>+	int rc = -EINVAL;</div><div class='add'>+	struct scatter_walk walk;</div><div class='add'>+	struct nx_sg *nx_sg = nx_ctx-&gt;in_sg;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;assoclen &gt; nx_ctx-&gt;ap-&gt;databytelen)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;assoclen &lt;= AES_BLOCK_SIZE) {</div><div class='add'>+		scatterwalk_start(&amp;walk, req-&gt;assoc);</div><div class='add'>+		scatterwalk_copychunks(out, &amp;walk, req-&gt;assoclen,</div><div class='add'>+				       SCATTERWALK_FROM_SG);</div><div class='add'>+		scatterwalk_done(&amp;walk, SCATTERWALK_FROM_SG, 0);</div><div class='add'>+</div><div class='add'>+		rc = 0;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nx_sg = nx_walk_and_build(nx_sg, nx_ctx-&gt;ap-&gt;sglen, req-&gt;assoc, 0,</div><div class='add'>+				  req-&gt;assoclen);</div><div class='add'>+	nx_ctx-&gt;op_aead.inlen = (nx_ctx-&gt;in_sg - nx_sg) * sizeof(struct nx_sg);</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op_aead,</div><div class='add'>+			   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;aes_ops));</div><div class='add'>+	atomic64_add(req-&gt;assoclen, &amp;(nx_ctx-&gt;stats-&gt;aes_bytes));</div><div class='add'>+</div><div class='add'>+	memcpy(out, csbcpb_aead-&gt;cpb.aes_gca.out_pat, AES_BLOCK_SIZE);</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gcm_aes_nx_crypt(struct aead_request *req, int enc)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+	struct blkcipher_desc desc;</div><div class='add'>+	unsigned int nbytes = req-&gt;cryptlen;</div><div class='add'>+	int rc = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (nbytes &gt; nx_ctx-&gt;ap-&gt;databytelen)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	desc.info = nx_ctx-&gt;priv.gcm.iv;</div><div class='add'>+	/* initialize the counter */</div><div class='add'>+	*(u32 *)(desc.info + NX_GCM_CTR_OFFSET) = 1;</div><div class='add'>+</div><div class='add'>+	/* For scenarios where the input message is zero length, AES CTR mode</div><div class='add'>+	 * may be used. Set the source data to be a single block (16B) of all</div><div class='add'>+	 * zeros, and set the input IV value to be the same as the GMAC IV</div><div class='add'>+	 * value. - nx_wb 4.8.1.3 */</div><div class='add'>+	if (nbytes == 0) {</div><div class='add'>+		char src[AES_BLOCK_SIZE] = {};</div><div class='add'>+		struct scatterlist sg;</div><div class='add'>+</div><div class='add'>+		desc.tfm = crypto_alloc_blkcipher("ctr(aes)", 0, 0);</div><div class='add'>+		if (IS_ERR(desc.tfm)) {</div><div class='add'>+			rc = -ENOMEM;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		crypto_blkcipher_setkey(desc.tfm, csbcpb-&gt;cpb.aes_gcm.key,</div><div class='add'>+			NX_CPB_KEY_SIZE(csbcpb) == NX_KS_AES_128 ? 16 :</div><div class='add'>+			NX_CPB_KEY_SIZE(csbcpb) == NX_KS_AES_192 ? 24 : 32);</div><div class='add'>+</div><div class='add'>+		sg_init_one(&amp;sg, src, AES_BLOCK_SIZE);</div><div class='add'>+		if (enc)</div><div class='add'>+			crypto_blkcipher_encrypt_iv(&amp;desc, req-&gt;dst, &amp;sg,</div><div class='add'>+						    AES_BLOCK_SIZE);</div><div class='add'>+		else</div><div class='add'>+			crypto_blkcipher_decrypt_iv(&amp;desc, req-&gt;dst, &amp;sg,</div><div class='add'>+						    AES_BLOCK_SIZE);</div><div class='add'>+		crypto_free_blkcipher(desc.tfm);</div><div class='add'>+</div><div class='add'>+		rc = 0;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	desc.tfm = (struct crypto_blkcipher *)req-&gt;base.tfm;</div><div class='add'>+</div><div class='add'>+	csbcpb-&gt;cpb.aes_gcm.bit_length_aad = req-&gt;assoclen * 8;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;assoclen) {</div><div class='add'>+		rc = nx_gca(nx_ctx, req, csbcpb-&gt;cpb.aes_gcm.in_pat_or_aad);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (enc)</div><div class='add'>+		NX_CPB_FDM(csbcpb) |= NX_FDM_ENDE_ENCRYPT;</div><div class='add'>+	else</div><div class='add'>+		nbytes -= AES_BLOCK_SIZE;</div><div class='add'>+</div><div class='add'>+	csbcpb-&gt;cpb.aes_gcm.bit_length_data = nbytes * 8;</div><div class='add'>+</div><div class='add'>+	rc = nx_build_sg_lists(nx_ctx, &amp;desc, req-&gt;dst, req-&gt;src, nbytes,</div><div class='add'>+			       csbcpb-&gt;cpb.aes_gcm.iv_or_cnt);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op,</div><div class='add'>+			   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;aes_ops));</div><div class='add'>+	atomic64_add(csbcpb-&gt;csb.processed_byte_count,</div><div class='add'>+		     &amp;(nx_ctx-&gt;stats-&gt;aes_bytes));</div><div class='add'>+</div><div class='add'>+	if (enc) {</div><div class='add'>+		/* copy out the auth tag */</div><div class='add'>+		scatterwalk_map_and_copy(csbcpb-&gt;cpb.aes_gcm.out_pat_or_mac,</div><div class='add'>+				 req-&gt;dst, nbytes,</div><div class='add'>+				 crypto_aead_authsize(crypto_aead_reqtfm(req)),</div><div class='add'>+				 SCATTERWALK_TO_SG);</div><div class='add'>+	} else if (req-&gt;assoclen) {</div><div class='add'>+		u8 *itag = nx_ctx-&gt;priv.gcm.iauth_tag;</div><div class='add'>+		u8 *otag = csbcpb-&gt;cpb.aes_gcm.out_pat_or_mac;</div><div class='add'>+</div><div class='add'>+		scatterwalk_map_and_copy(itag, req-&gt;dst, nbytes,</div><div class='add'>+				 crypto_aead_authsize(crypto_aead_reqtfm(req)),</div><div class='add'>+				 SCATTERWALK_FROM_SG);</div><div class='add'>+		rc = memcmp(itag, otag,</div><div class='add'>+			    crypto_aead_authsize(crypto_aead_reqtfm(req))) ?</div><div class='add'>+		     -EBADMSG : 0;</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gcm_aes_nx_encrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='add'>+	char *iv = nx_ctx-&gt;priv.gcm.iv;</div><div class='add'>+</div><div class='add'>+	memcpy(iv, req-&gt;iv, 12);</div><div class='add'>+</div><div class='add'>+	return gcm_aes_nx_crypt(req, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gcm_aes_nx_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='add'>+	char *iv = nx_ctx-&gt;priv.gcm.iv;</div><div class='add'>+</div><div class='add'>+	memcpy(iv, req-&gt;iv, 12);</div><div class='add'>+</div><div class='add'>+	return gcm_aes_nx_crypt(req, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gcm4106_aes_nx_encrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='add'>+	char *iv = nx_ctx-&gt;priv.gcm.iv;</div><div class='add'>+	char *nonce = nx_ctx-&gt;priv.gcm.nonce;</div><div class='add'>+</div><div class='add'>+	memcpy(iv, nonce, NX_GCM4106_NONCE_LEN);</div><div class='add'>+	memcpy(iv + NX_GCM4106_NONCE_LEN, req-&gt;iv, 8);</div><div class='add'>+</div><div class='add'>+	return gcm_aes_nx_crypt(req, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gcm4106_aes_nx_decrypt(struct aead_request *req)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='add'>+	char *iv = nx_ctx-&gt;priv.gcm.iv;</div><div class='add'>+	char *nonce = nx_ctx-&gt;priv.gcm.nonce;</div><div class='add'>+</div><div class='add'>+	memcpy(iv, nonce, NX_GCM4106_NONCE_LEN);</div><div class='add'>+	memcpy(iv + NX_GCM4106_NONCE_LEN, req-&gt;iv, 8);</div><div class='add'>+</div><div class='add'>+	return gcm_aes_nx_crypt(req, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* tell the block cipher walk routines that this is a stream cipher by</div><div class='add'>+ * setting cra_blocksize to 1. Even using blkcipher_walk_virt_block</div><div class='add'>+ * during encrypt/decrypt doesn't solve this problem, because it calls</div><div class='add'>+ * blkcipher_walk_done under the covers, which doesn't use walk-&gt;blocksize,</div><div class='add'>+ * but instead uses this tfm-&gt;blocksize. */</div><div class='add'>+struct crypto_alg nx_gcm_aes_alg = {</div><div class='add'>+	.cra_name        = "gcm(aes)",</div><div class='add'>+	.cra_driver_name = "gcm-aes-nx",</div><div class='add'>+	.cra_priority    = 300,</div><div class='add'>+	.cra_flags       = CRYPTO_ALG_TYPE_AEAD,</div><div class='add'>+	.cra_blocksize   = 1,</div><div class='add'>+	.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='add'>+	.cra_type        = &amp;crypto_aead_type,</div><div class='add'>+	.cra_module      = THIS_MODULE,</div><div class='add'>+	.cra_list        = LIST_HEAD_INIT(nx_gcm_aes_alg.cra_list),</div><div class='add'>+	.cra_init        = nx_crypto_ctx_aes_gcm_init,</div><div class='add'>+	.cra_exit        = nx_crypto_ctx_exit,</div><div class='add'>+	.cra_aead = {</div><div class='add'>+		.ivsize      = AES_BLOCK_SIZE,</div><div class='add'>+		.maxauthsize = AES_BLOCK_SIZE,</div><div class='add'>+		.setkey      = gcm_aes_nx_set_key,</div><div class='add'>+		.setauthsize = gcm_aes_nx_setauthsize,</div><div class='add'>+		.encrypt     = gcm_aes_nx_encrypt,</div><div class='add'>+		.decrypt     = gcm_aes_nx_decrypt,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct crypto_alg nx_gcm4106_aes_alg = {</div><div class='add'>+	.cra_name        = "rfc4106(gcm(aes))",</div><div class='add'>+	.cra_driver_name = "rfc4106-gcm-aes-nx",</div><div class='add'>+	.cra_priority    = 300,</div><div class='add'>+	.cra_flags       = CRYPTO_ALG_TYPE_AEAD,</div><div class='add'>+	.cra_blocksize   = 1,</div><div class='add'>+	.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='add'>+	.cra_type        = &amp;crypto_nivaead_type,</div><div class='add'>+	.cra_module      = THIS_MODULE,</div><div class='add'>+	.cra_list        = LIST_HEAD_INIT(nx_gcm4106_aes_alg.cra_list),</div><div class='add'>+	.cra_init        = nx_crypto_ctx_aes_gcm_init,</div><div class='add'>+	.cra_exit        = nx_crypto_ctx_exit,</div><div class='add'>+	.cra_aead = {</div><div class='add'>+		.ivsize      = 8,</div><div class='add'>+		.maxauthsize = AES_BLOCK_SIZE,</div><div class='add'>+		.geniv       = "seqiv",</div><div class='add'>+		.setkey      = gcm4106_aes_nx_set_key,</div><div class='add'>+		.setauthsize = gcm4106_aes_nx_setauthsize,</div><div class='add'>+		.encrypt     = gcm4106_aes_nx_encrypt,</div><div class='add'>+		.decrypt     = gcm4106_aes_nx_decrypt,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/crypto/nx/nx-aes-xcbc.c b/drivers/crypto/nx/nx-aes-xcbc.c<br/>new file mode 100644<br/>index 000000000000..93923e4628c0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/nx-aes-xcbc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-aes-xcbc.c</a></div><div class='hunk'>@@ -0,0 +1,236 @@</div><div class='add'>+/**</div><div class='add'>+ * AES XCBC routines supporting the Power 7+ Nest Accelerators driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2012 International Business Machines Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 only.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ * Author: Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;asm/vio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "nx_csbcpb.h"</div><div class='add'>+#include "nx.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct xcbc_state {</div><div class='add'>+	u8 state[AES_BLOCK_SIZE];</div><div class='add'>+	unsigned int count;</div><div class='add'>+	u8 buffer[AES_BLOCK_SIZE];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int nx_xcbc_set_key(struct crypto_shash *desc,</div><div class='add'>+			   const u8            *in_key,</div><div class='add'>+			   unsigned int         key_len)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_shash_ctx(desc);</div><div class='add'>+</div><div class='add'>+	switch (key_len) {</div><div class='add'>+	case AES_KEYSIZE_128:</div><div class='add'>+		nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_AES_128];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(nx_ctx-&gt;priv.xcbc.key, in_key, key_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nx_xcbc_init(struct shash_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct xcbc_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+	struct nx_sg *out_sg;</div><div class='add'>+</div><div class='add'>+	nx_ctx_init(nx_ctx, HCOP_FC_AES);</div><div class='add'>+</div><div class='add'>+	memset(sctx, 0, sizeof *sctx);</div><div class='add'>+</div><div class='add'>+	NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);</div><div class='add'>+	csbcpb-&gt;cpb.hdr.mode = NX_MODE_AES_XCBC_MAC;</div><div class='add'>+</div><div class='add'>+	memcpy(csbcpb-&gt;cpb.aes_xcbc.key, nx_ctx-&gt;priv.xcbc.key, AES_BLOCK_SIZE);</div><div class='add'>+	memset(nx_ctx-&gt;priv.xcbc.key, 0, sizeof *nx_ctx-&gt;priv.xcbc.key);</div><div class='add'>+</div><div class='add'>+	out_sg = nx_build_sg_list(nx_ctx-&gt;out_sg, (u8 *)sctx-&gt;state,</div><div class='add'>+				  AES_BLOCK_SIZE, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+	nx_ctx-&gt;op.outlen = (nx_ctx-&gt;out_sg - out_sg) * sizeof(struct nx_sg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nx_xcbc_update(struct shash_desc *desc,</div><div class='add'>+			  const u8          *data,</div><div class='add'>+			  unsigned int       len)</div><div class='add'>+{</div><div class='add'>+	struct xcbc_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+	struct nx_sg *in_sg;</div><div class='add'>+	u32 to_process, leftover;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	if (NX_CPB_FDM(csbcpb) &amp; NX_FDM_CONTINUATION) {</div><div class='add'>+		/* we've hit the nx chip previously and we're updating again,</div><div class='add'>+		 * so copy over the partial digest */</div><div class='add'>+		memcpy(csbcpb-&gt;cpb.aes_xcbc.cv,</div><div class='add'>+		       csbcpb-&gt;cpb.aes_xcbc.out_cv_mac, AES_BLOCK_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 2 cases for total data len:</div><div class='add'>+	 *  1: &lt;= AES_BLOCK_SIZE: copy into state, return 0</div><div class='add'>+	 *  2: &gt; AES_BLOCK_SIZE: process X blocks, copy in leftover</div><div class='add'>+	 */</div><div class='add'>+	if (len + sctx-&gt;count &lt;= AES_BLOCK_SIZE) {</div><div class='add'>+		memcpy(sctx-&gt;buffer + sctx-&gt;count, data, len);</div><div class='add'>+		sctx-&gt;count += len;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* to_process: the AES_BLOCK_SIZE data chunk to process in this</div><div class='add'>+	 * update */</div><div class='add'>+	to_process = (sctx-&gt;count + len) &amp; ~(AES_BLOCK_SIZE - 1);</div><div class='add'>+	leftover = (sctx-&gt;count + len) &amp; (AES_BLOCK_SIZE - 1);</div><div class='add'>+</div><div class='add'>+	/* the hardware will not accept a 0 byte operation for this algorithm</div><div class='add'>+	 * and the operation MUST be finalized to be correct. So if we happen</div><div class='add'>+	 * to get an update that falls on a block sized boundary, we must</div><div class='add'>+	 * save off the last block to finalize with later. */</div><div class='add'>+	if (!leftover) {</div><div class='add'>+		to_process -= AES_BLOCK_SIZE;</div><div class='add'>+		leftover = AES_BLOCK_SIZE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sctx-&gt;count) {</div><div class='add'>+		in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, sctx-&gt;buffer,</div><div class='add'>+					 sctx-&gt;count, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+		in_sg = nx_build_sg_list(in_sg, (u8 *)data,</div><div class='add'>+					 to_process - sctx-&gt;count,</div><div class='add'>+					 nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+		nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - in_sg) *</div><div class='add'>+					sizeof(struct nx_sg);</div><div class='add'>+	} else {</div><div class='add'>+		in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, (u8 *)data, to_process,</div><div class='add'>+					 nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+		nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - in_sg) *</div><div class='add'>+					sizeof(struct nx_sg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;</div><div class='add'>+</div><div class='add'>+	if (!nx_ctx-&gt;op.inlen || !nx_ctx-&gt;op.outlen) {</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op,</div><div class='add'>+			   desc-&gt;flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;aes_ops));</div><div class='add'>+</div><div class='add'>+	/* copy the leftover back into the state struct */</div><div class='add'>+	memcpy(sctx-&gt;buffer, data + len - leftover, leftover);</div><div class='add'>+	sctx-&gt;count = leftover;</div><div class='add'>+</div><div class='add'>+	/* everything after the first update is continuation */</div><div class='add'>+	NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nx_xcbc_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+{</div><div class='add'>+	struct xcbc_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='add'>+	struct nx_sg *in_sg, *out_sg;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	if (NX_CPB_FDM(csbcpb) &amp; NX_FDM_CONTINUATION) {</div><div class='add'>+		/* we've hit the nx chip previously, now we're finalizing,</div><div class='add'>+		 * so copy over the partial digest */</div><div class='add'>+		memcpy(csbcpb-&gt;cpb.aes_xcbc.cv,</div><div class='add'>+		       csbcpb-&gt;cpb.aes_xcbc.out_cv_mac, AES_BLOCK_SIZE);</div><div class='add'>+	} else if (sctx-&gt;count == 0) {</div><div class='add'>+		/* we've never seen an update, so this is a 0 byte op. The</div><div class='add'>+		 * hardware cannot handle a 0 byte op, so just copy out the</div><div class='add'>+		 * known 0 byte result. This is cheaper than allocating a</div><div class='add'>+		 * software context to do a 0 byte op */</div><div class='add'>+		u8 data[] = { 0x75, 0xf0, 0x25, 0x1d, 0x52, 0x8a, 0xc0, 0x1c,</div><div class='add'>+			      0x45, 0x73, 0xdf, 0xd5, 0x84, 0xd7, 0x9f, 0x29 };</div><div class='add'>+		memcpy(out, data, sizeof(data));</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* final is represented by continuing the operation and indicating that</div><div class='add'>+	 * this is not an intermediate operation */</div><div class='add'>+	NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_INTERMEDIATE;</div><div class='add'>+</div><div class='add'>+	in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, (u8 *)sctx-&gt;buffer,</div><div class='add'>+				 sctx-&gt;count, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+	out_sg = nx_build_sg_list(nx_ctx-&gt;out_sg, out, AES_BLOCK_SIZE,</div><div class='add'>+				  nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+</div><div class='add'>+	nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - in_sg) * sizeof(struct nx_sg);</div><div class='add'>+	nx_ctx-&gt;op.outlen = (nx_ctx-&gt;out_sg - out_sg) * sizeof(struct nx_sg);</div><div class='add'>+</div><div class='add'>+	if (!nx_ctx-&gt;op.outlen) {</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op,</div><div class='add'>+			   desc-&gt;flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;aes_ops));</div><div class='add'>+</div><div class='add'>+	memcpy(out, csbcpb-&gt;cpb.aes_xcbc.out_cv_mac, AES_BLOCK_SIZE);</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct shash_alg nx_shash_aes_xcbc_alg = {</div><div class='add'>+	.digestsize = AES_BLOCK_SIZE,</div><div class='add'>+	.init       = nx_xcbc_init,</div><div class='add'>+	.update     = nx_xcbc_update,</div><div class='add'>+	.final      = nx_xcbc_final,</div><div class='add'>+	.setkey     = nx_xcbc_set_key,</div><div class='add'>+	.descsize   = sizeof(struct xcbc_state),</div><div class='add'>+	.statesize  = sizeof(struct xcbc_state),</div><div class='add'>+	.base       = {</div><div class='add'>+		.cra_name        = "xcbc(aes)",</div><div class='add'>+		.cra_driver_name = "xcbc-aes-nx",</div><div class='add'>+		.cra_priority    = 300,</div><div class='add'>+		.cra_flags       = CRYPTO_ALG_TYPE_SHASH,</div><div class='add'>+		.cra_blocksize   = AES_BLOCK_SIZE,</div><div class='add'>+		.cra_module      = THIS_MODULE,</div><div class='add'>+		.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='add'>+		.cra_init        = nx_crypto_ctx_aes_xcbc_init,</div><div class='add'>+		.cra_exit        = nx_crypto_ctx_exit,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/crypto/nx/nx-sha256.c b/drivers/crypto/nx/nx-sha256.c<br/>new file mode 100644<br/>index 000000000000..9767315f8c0b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/nx-sha256.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-sha256.c</a></div><div class='hunk'>@@ -0,0 +1,246 @@</div><div class='add'>+/**</div><div class='add'>+ * SHA-256 routines supporting the Power 7+ Nest Accelerators driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2012 International Business Machines Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 only.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ * Author: Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/sha.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;asm/vio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "nx_csbcpb.h"</div><div class='add'>+#include "nx.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int nx_sha256_init(struct shash_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_sg *out_sg;</div><div class='add'>+</div><div class='add'>+	nx_ctx_init(nx_ctx, HCOP_FC_SHA);</div><div class='add'>+</div><div class='add'>+	memset(sctx, 0, sizeof *sctx);</div><div class='add'>+</div><div class='add'>+	nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_SHA256];</div><div class='add'>+</div><div class='add'>+	NX_CPB_SET_DIGEST_SIZE(nx_ctx-&gt;csbcpb, NX_DS_SHA256);</div><div class='add'>+	out_sg = nx_build_sg_list(nx_ctx-&gt;out_sg, (u8 *)sctx-&gt;state,</div><div class='add'>+				  SHA256_DIGEST_SIZE, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+	nx_ctx-&gt;op.outlen = (nx_ctx-&gt;out_sg - out_sg) * sizeof(struct nx_sg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nx_sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			    unsigned int len)</div><div class='add'>+{</div><div class='add'>+	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='add'>+	struct nx_sg *in_sg;</div><div class='add'>+	u64 to_process, leftover;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	if (NX_CPB_FDM(csbcpb) &amp; NX_FDM_CONTINUATION) {</div><div class='add'>+		/* we've hit the nx chip previously and we're updating again,</div><div class='add'>+		 * so copy over the partial digest */</div><div class='add'>+		memcpy(csbcpb-&gt;cpb.sha256.input_partial_digest,</div><div class='add'>+		       csbcpb-&gt;cpb.sha256.message_digest, SHA256_DIGEST_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 2 cases for total data len:</div><div class='add'>+	 *  1: &lt;= SHA256_BLOCK_SIZE: copy into state, return 0</div><div class='add'>+	 *  2: &gt; SHA256_BLOCK_SIZE: process X blocks, copy in leftover</div><div class='add'>+	 */</div><div class='add'>+	if (len + sctx-&gt;count &lt;= SHA256_BLOCK_SIZE) {</div><div class='add'>+		memcpy(sctx-&gt;buf + sctx-&gt;count, data, len);</div><div class='add'>+		sctx-&gt;count += len;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* to_process: the SHA256_BLOCK_SIZE data chunk to process in this</div><div class='add'>+	 * update */</div><div class='add'>+	to_process = (sctx-&gt;count + len) &amp; ~(SHA256_BLOCK_SIZE - 1);</div><div class='add'>+	leftover = (sctx-&gt;count + len) &amp; (SHA256_BLOCK_SIZE - 1);</div><div class='add'>+</div><div class='add'>+	if (sctx-&gt;count) {</div><div class='add'>+		in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, (u8 *)sctx-&gt;buf,</div><div class='add'>+					 sctx-&gt;count, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+		in_sg = nx_build_sg_list(in_sg, (u8 *)data,</div><div class='add'>+					 to_process - sctx-&gt;count,</div><div class='add'>+					 nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+		nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - in_sg) *</div><div class='add'>+					sizeof(struct nx_sg);</div><div class='add'>+	} else {</div><div class='add'>+		in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, (u8 *)data,</div><div class='add'>+					 to_process, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+		nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - in_sg) *</div><div class='add'>+					sizeof(struct nx_sg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;</div><div class='add'>+</div><div class='add'>+	if (!nx_ctx-&gt;op.inlen || !nx_ctx-&gt;op.outlen) {</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op,</div><div class='add'>+			   desc-&gt;flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;sha256_ops));</div><div class='add'>+</div><div class='add'>+	/* copy the leftover back into the state struct */</div><div class='add'>+	memcpy(sctx-&gt;buf, data + len - leftover, leftover);</div><div class='add'>+	sctx-&gt;count = leftover;</div><div class='add'>+</div><div class='add'>+	csbcpb-&gt;cpb.sha256.message_bit_length += (u64)</div><div class='add'>+		(csbcpb-&gt;cpb.sha256.spbc * 8);</div><div class='add'>+</div><div class='add'>+	/* everything after the first update is continuation */</div><div class='add'>+	NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nx_sha256_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+{</div><div class='add'>+	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='add'>+	struct nx_sg *in_sg, *out_sg;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (NX_CPB_FDM(csbcpb) &amp; NX_FDM_CONTINUATION) {</div><div class='add'>+		/* we've hit the nx chip previously, now we're finalizing,</div><div class='add'>+		 * so copy over the partial digest */</div><div class='add'>+		memcpy(csbcpb-&gt;cpb.sha256.input_partial_digest,</div><div class='add'>+		       csbcpb-&gt;cpb.sha256.message_digest, SHA256_DIGEST_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* final is represented by continuing the operation and indicating that</div><div class='add'>+	 * this is not an intermediate operation */</div><div class='add'>+	NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_INTERMEDIATE;</div><div class='add'>+</div><div class='add'>+	csbcpb-&gt;cpb.sha256.message_bit_length += (u64)(sctx-&gt;count * 8);</div><div class='add'>+</div><div class='add'>+	in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, (u8 *)sctx-&gt;buf,</div><div class='add'>+				 sctx-&gt;count, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+	out_sg = nx_build_sg_list(nx_ctx-&gt;out_sg, out, SHA256_DIGEST_SIZE,</div><div class='add'>+				  nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+	nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - in_sg) * sizeof(struct nx_sg);</div><div class='add'>+	nx_ctx-&gt;op.outlen = (nx_ctx-&gt;out_sg - out_sg) * sizeof(struct nx_sg);</div><div class='add'>+</div><div class='add'>+	if (!nx_ctx-&gt;op.outlen) {</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op,</div><div class='add'>+			   desc-&gt;flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;sha256_ops));</div><div class='add'>+</div><div class='add'>+	atomic64_add(csbcpb-&gt;cpb.sha256.message_bit_length,</div><div class='add'>+		     &amp;(nx_ctx-&gt;stats-&gt;sha256_bytes));</div><div class='add'>+	memcpy(out, csbcpb-&gt;cpb.sha256.message_digest, SHA256_DIGEST_SIZE);</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nx_sha256_export(struct shash_desc *desc, void *out)</div><div class='add'>+{</div><div class='add'>+	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='add'>+	struct sha256_state *octx = out;</div><div class='add'>+</div><div class='add'>+	octx-&gt;count = sctx-&gt;count +</div><div class='add'>+		      (csbcpb-&gt;cpb.sha256.message_bit_length / 8);</div><div class='add'>+	memcpy(octx-&gt;buf, sctx-&gt;buf, sizeof(octx-&gt;buf));</div><div class='add'>+</div><div class='add'>+	/* if no data has been processed yet, we need to export SHA256's</div><div class='add'>+	 * initial data, in case this context gets imported into a software</div><div class='add'>+	 * context */</div><div class='add'>+	if (csbcpb-&gt;cpb.sha256.message_bit_length)</div><div class='add'>+		memcpy(octx-&gt;state, csbcpb-&gt;cpb.sha256.message_digest,</div><div class='add'>+		       SHA256_DIGEST_SIZE);</div><div class='add'>+	else {</div><div class='add'>+		octx-&gt;state[0] = SHA256_H0;</div><div class='add'>+		octx-&gt;state[1] = SHA256_H1;</div><div class='add'>+		octx-&gt;state[2] = SHA256_H2;</div><div class='add'>+		octx-&gt;state[3] = SHA256_H3;</div><div class='add'>+		octx-&gt;state[4] = SHA256_H4;</div><div class='add'>+		octx-&gt;state[5] = SHA256_H5;</div><div class='add'>+		octx-&gt;state[6] = SHA256_H6;</div><div class='add'>+		octx-&gt;state[7] = SHA256_H7;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nx_sha256_import(struct shash_desc *desc, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='add'>+	const struct sha256_state *ictx = in;</div><div class='add'>+</div><div class='add'>+	memcpy(sctx-&gt;buf, ictx-&gt;buf, sizeof(ictx-&gt;buf));</div><div class='add'>+</div><div class='add'>+	sctx-&gt;count = ictx-&gt;count &amp; 0x3f;</div><div class='add'>+	csbcpb-&gt;cpb.sha256.message_bit_length = (ictx-&gt;count &amp; ~0x3f) * 8;</div><div class='add'>+</div><div class='add'>+	if (csbcpb-&gt;cpb.sha256.message_bit_length) {</div><div class='add'>+		memcpy(csbcpb-&gt;cpb.sha256.message_digest, ictx-&gt;state,</div><div class='add'>+		       SHA256_DIGEST_SIZE);</div><div class='add'>+</div><div class='add'>+		NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='add'>+		NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct shash_alg nx_shash_sha256_alg = {</div><div class='add'>+	.digestsize = SHA256_DIGEST_SIZE,</div><div class='add'>+	.init       = nx_sha256_init,</div><div class='add'>+	.update     = nx_sha256_update,</div><div class='add'>+	.final      = nx_sha256_final,</div><div class='add'>+	.export     = nx_sha256_export,</div><div class='add'>+	.import     = nx_sha256_import,</div><div class='add'>+	.descsize   = sizeof(struct sha256_state),</div><div class='add'>+	.statesize  = sizeof(struct sha256_state),</div><div class='add'>+	.base       = {</div><div class='add'>+		.cra_name        = "sha256",</div><div class='add'>+		.cra_driver_name = "sha256-nx",</div><div class='add'>+		.cra_priority    = 300,</div><div class='add'>+		.cra_flags       = CRYPTO_ALG_TYPE_SHASH,</div><div class='add'>+		.cra_blocksize   = SHA256_BLOCK_SIZE,</div><div class='add'>+		.cra_module      = THIS_MODULE,</div><div class='add'>+		.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='add'>+		.cra_init        = nx_crypto_ctx_sha_init,</div><div class='add'>+		.cra_exit        = nx_crypto_ctx_exit,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/crypto/nx/nx-sha512.c b/drivers/crypto/nx/nx-sha512.c<br/>new file mode 100644<br/>index 000000000000..3177b8c3d5f1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/nx-sha512.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx-sha512.c</a></div><div class='hunk'>@@ -0,0 +1,265 @@</div><div class='add'>+/**</div><div class='add'>+ * SHA-512 routines supporting the Power 7+ Nest Accelerators driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2012 International Business Machines Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 only.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ * Author: Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/sha.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;asm/vio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "nx_csbcpb.h"</div><div class='add'>+#include "nx.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int nx_sha512_init(struct shash_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_sg *out_sg;</div><div class='add'>+</div><div class='add'>+	nx_ctx_init(nx_ctx, HCOP_FC_SHA);</div><div class='add'>+</div><div class='add'>+	memset(sctx, 0, sizeof *sctx);</div><div class='add'>+</div><div class='add'>+	nx_ctx-&gt;ap = &amp;nx_ctx-&gt;props[NX_PROPS_SHA512];</div><div class='add'>+</div><div class='add'>+	NX_CPB_SET_DIGEST_SIZE(nx_ctx-&gt;csbcpb, NX_DS_SHA512);</div><div class='add'>+	out_sg = nx_build_sg_list(nx_ctx-&gt;out_sg, (u8 *)sctx-&gt;state,</div><div class='add'>+				  SHA512_DIGEST_SIZE, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+	nx_ctx-&gt;op.outlen = (nx_ctx-&gt;out_sg - out_sg) * sizeof(struct nx_sg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nx_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			    unsigned int len)</div><div class='add'>+{</div><div class='add'>+	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='add'>+	struct nx_sg *in_sg;</div><div class='add'>+	u64 to_process, leftover, spbc_bits;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	if (NX_CPB_FDM(csbcpb) &amp; NX_FDM_CONTINUATION) {</div><div class='add'>+		/* we've hit the nx chip previously and we're updating again,</div><div class='add'>+		 * so copy over the partial digest */</div><div class='add'>+		memcpy(csbcpb-&gt;cpb.sha512.input_partial_digest,</div><div class='add'>+		       csbcpb-&gt;cpb.sha512.message_digest, SHA512_DIGEST_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 2 cases for total data len:</div><div class='add'>+	 *  1: &lt;= SHA512_BLOCK_SIZE: copy into state, return 0</div><div class='add'>+	 *  2: &gt; SHA512_BLOCK_SIZE: process X blocks, copy in leftover</div><div class='add'>+	 */</div><div class='add'>+	if ((u64)len + sctx-&gt;count[0] &lt;= SHA512_BLOCK_SIZE) {</div><div class='add'>+		memcpy(sctx-&gt;buf + sctx-&gt;count[0], data, len);</div><div class='add'>+		sctx-&gt;count[0] += len;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* to_process: the SHA512_BLOCK_SIZE data chunk to process in this</div><div class='add'>+	 * update */</div><div class='add'>+	to_process = (sctx-&gt;count[0] + len) &amp; ~(SHA512_BLOCK_SIZE - 1);</div><div class='add'>+	leftover = (sctx-&gt;count[0] + len) &amp; (SHA512_BLOCK_SIZE - 1);</div><div class='add'>+</div><div class='add'>+	if (sctx-&gt;count[0]) {</div><div class='add'>+		in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, (u8 *)sctx-&gt;buf,</div><div class='add'>+					 sctx-&gt;count[0], nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+		in_sg = nx_build_sg_list(in_sg, (u8 *)data,</div><div class='add'>+					 to_process - sctx-&gt;count[0],</div><div class='add'>+					 nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+		nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - in_sg) *</div><div class='add'>+					sizeof(struct nx_sg);</div><div class='add'>+	} else {</div><div class='add'>+		in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, (u8 *)data,</div><div class='add'>+					 to_process, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+		nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - in_sg) *</div><div class='add'>+					sizeof(struct nx_sg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;</div><div class='add'>+</div><div class='add'>+	if (!nx_ctx-&gt;op.inlen || !nx_ctx-&gt;op.outlen) {</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op,</div><div class='add'>+			   desc-&gt;flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;sha512_ops));</div><div class='add'>+</div><div class='add'>+	/* copy the leftover back into the state struct */</div><div class='add'>+	memcpy(sctx-&gt;buf, data + len - leftover, leftover);</div><div class='add'>+	sctx-&gt;count[0] = leftover;</div><div class='add'>+</div><div class='add'>+	spbc_bits = csbcpb-&gt;cpb.sha512.spbc * 8;</div><div class='add'>+	csbcpb-&gt;cpb.sha512.message_bit_length_lo += spbc_bits;</div><div class='add'>+	if (csbcpb-&gt;cpb.sha512.message_bit_length_lo &lt; spbc_bits)</div><div class='add'>+		csbcpb-&gt;cpb.sha512.message_bit_length_hi++;</div><div class='add'>+</div><div class='add'>+	/* everything after the first update is continuation */</div><div class='add'>+	NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nx_sha512_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+{</div><div class='add'>+	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='add'>+	struct nx_sg *in_sg, *out_sg;</div><div class='add'>+	u64 count0;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (NX_CPB_FDM(csbcpb) &amp; NX_FDM_CONTINUATION) {</div><div class='add'>+		/* we've hit the nx chip previously, now we're finalizing,</div><div class='add'>+		 * so copy over the partial digest */</div><div class='add'>+		memcpy(csbcpb-&gt;cpb.sha512.input_partial_digest,</div><div class='add'>+		       csbcpb-&gt;cpb.sha512.message_digest, SHA512_DIGEST_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* final is represented by continuing the operation and indicating that</div><div class='add'>+	 * this is not an intermediate operation */</div><div class='add'>+	NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_INTERMEDIATE;</div><div class='add'>+</div><div class='add'>+	count0 = sctx-&gt;count[0] * 8;</div><div class='add'>+</div><div class='add'>+	csbcpb-&gt;cpb.sha512.message_bit_length_lo += count0;</div><div class='add'>+	if (csbcpb-&gt;cpb.sha512.message_bit_length_lo &lt; count0)</div><div class='add'>+		csbcpb-&gt;cpb.sha512.message_bit_length_hi++;</div><div class='add'>+</div><div class='add'>+	in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, sctx-&gt;buf, sctx-&gt;count[0],</div><div class='add'>+				 nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+	out_sg = nx_build_sg_list(nx_ctx-&gt;out_sg, out, SHA512_DIGEST_SIZE,</div><div class='add'>+				  nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+	nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - in_sg) * sizeof(struct nx_sg);</div><div class='add'>+	nx_ctx-&gt;op.outlen = (nx_ctx-&gt;out_sg - out_sg) * sizeof(struct nx_sg);</div><div class='add'>+</div><div class='add'>+	if (!nx_ctx-&gt;op.outlen) {</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = nx_hcall_sync(nx_ctx, &amp;nx_ctx-&gt;op,</div><div class='add'>+			   desc-&gt;flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;sha512_ops));</div><div class='add'>+	atomic64_add(csbcpb-&gt;cpb.sha512.message_bit_length_lo,</div><div class='add'>+		     &amp;(nx_ctx-&gt;stats-&gt;sha512_bytes));</div><div class='add'>+</div><div class='add'>+	memcpy(out, csbcpb-&gt;cpb.sha512.message_digest, SHA512_DIGEST_SIZE);</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nx_sha512_export(struct shash_desc *desc, void *out)</div><div class='add'>+{</div><div class='add'>+	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='add'>+	struct sha512_state *octx = out;</div><div class='add'>+</div><div class='add'>+	/* move message_bit_length (128 bits) into count and convert its value</div><div class='add'>+	 * to bytes */</div><div class='add'>+	octx-&gt;count[0] = csbcpb-&gt;cpb.sha512.message_bit_length_lo &gt;&gt; 3 |</div><div class='add'>+			 ((csbcpb-&gt;cpb.sha512.message_bit_length_hi &amp; 7) &lt;&lt; 61);</div><div class='add'>+	octx-&gt;count[1] = csbcpb-&gt;cpb.sha512.message_bit_length_hi &gt;&gt; 3;</div><div class='add'>+</div><div class='add'>+	octx-&gt;count[0] += sctx-&gt;count[0];</div><div class='add'>+	if (octx-&gt;count[0] &lt; sctx-&gt;count[0])</div><div class='add'>+		octx-&gt;count[1]++;</div><div class='add'>+</div><div class='add'>+	memcpy(octx-&gt;buf, sctx-&gt;buf, sizeof(octx-&gt;buf));</div><div class='add'>+</div><div class='add'>+	/* if no data has been processed yet, we need to export SHA512's</div><div class='add'>+	 * initial data, in case this context gets imported into a software</div><div class='add'>+	 * context */</div><div class='add'>+	if (csbcpb-&gt;cpb.sha512.message_bit_length_hi ||</div><div class='add'>+	    csbcpb-&gt;cpb.sha512.message_bit_length_lo)</div><div class='add'>+		memcpy(octx-&gt;state, csbcpb-&gt;cpb.sha512.message_digest,</div><div class='add'>+		       SHA512_DIGEST_SIZE);</div><div class='add'>+	else {</div><div class='add'>+		octx-&gt;state[0] = SHA512_H0;</div><div class='add'>+		octx-&gt;state[1] = SHA512_H1;</div><div class='add'>+		octx-&gt;state[2] = SHA512_H2;</div><div class='add'>+		octx-&gt;state[3] = SHA512_H3;</div><div class='add'>+		octx-&gt;state[4] = SHA512_H4;</div><div class='add'>+		octx-&gt;state[5] = SHA512_H5;</div><div class='add'>+		octx-&gt;state[6] = SHA512_H6;</div><div class='add'>+		octx-&gt;state[7] = SHA512_H7;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nx_sha512_import(struct shash_desc *desc, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='add'>+	const struct sha512_state *ictx = in;</div><div class='add'>+</div><div class='add'>+	memcpy(sctx-&gt;buf, ictx-&gt;buf, sizeof(ictx-&gt;buf));</div><div class='add'>+	sctx-&gt;count[0] = ictx-&gt;count[0] &amp; 0x3f;</div><div class='add'>+	csbcpb-&gt;cpb.sha512.message_bit_length_lo = (ictx-&gt;count[0] &amp; ~0x3f)</div><div class='add'>+							&lt;&lt; 3;</div><div class='add'>+	csbcpb-&gt;cpb.sha512.message_bit_length_hi = ictx-&gt;count[1] &lt;&lt; 3 |</div><div class='add'>+						   ictx-&gt;count[0] &gt;&gt; 61;</div><div class='add'>+</div><div class='add'>+	if (csbcpb-&gt;cpb.sha512.message_bit_length_hi ||</div><div class='add'>+	    csbcpb-&gt;cpb.sha512.message_bit_length_lo) {</div><div class='add'>+		memcpy(csbcpb-&gt;cpb.sha512.message_digest, ictx-&gt;state,</div><div class='add'>+		       SHA512_DIGEST_SIZE);</div><div class='add'>+</div><div class='add'>+		NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='add'>+		NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct shash_alg nx_shash_sha512_alg = {</div><div class='add'>+	.digestsize = SHA512_DIGEST_SIZE,</div><div class='add'>+	.init       = nx_sha512_init,</div><div class='add'>+	.update     = nx_sha512_update,</div><div class='add'>+	.final      = nx_sha512_final,</div><div class='add'>+	.export     = nx_sha512_export,</div><div class='add'>+	.import     = nx_sha512_import,</div><div class='add'>+	.descsize   = sizeof(struct sha512_state),</div><div class='add'>+	.statesize  = sizeof(struct sha512_state),</div><div class='add'>+	.base       = {</div><div class='add'>+		.cra_name        = "sha512",</div><div class='add'>+		.cra_driver_name = "sha512-nx",</div><div class='add'>+		.cra_priority    = 300,</div><div class='add'>+		.cra_flags       = CRYPTO_ALG_TYPE_SHASH,</div><div class='add'>+		.cra_blocksize   = SHA512_BLOCK_SIZE,</div><div class='add'>+		.cra_module      = THIS_MODULE,</div><div class='add'>+		.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='add'>+		.cra_init        = nx_crypto_ctx_sha_init,</div><div class='add'>+		.cra_exit        = nx_crypto_ctx_exit,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/crypto/nx/nx.c b/drivers/crypto/nx/nx.c<br/>new file mode 100644<br/>index 000000000000..d7f179cc2e98<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/nx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx.c</a></div><div class='hunk'>@@ -0,0 +1,716 @@</div><div class='add'>+/**</div><div class='add'>+ * Routines supporting the Power 7+ Nest Accelerators driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2012 International Business Machines Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 only.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ * Author: Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/hash.h&gt;</div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/sha.h&gt;</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/moduleparam.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;asm/pSeries_reconfig.h&gt;</div><div class='add'>+#include &lt;asm/abs_addr.h&gt;</div><div class='add'>+#include &lt;asm/hvcall.h&gt;</div><div class='add'>+#include &lt;asm/vio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "nx_csbcpb.h"</div><div class='add'>+#include "nx.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * nx_hcall_sync - make an H_COP_OP hcall for the passed in op structure</div><div class='add'>+ *</div><div class='add'>+ * @nx_ctx: the crypto context handle</div><div class='add'>+ * @op: PFO operation struct to pass in</div><div class='add'>+ * @may_sleep: flag indicating the request can sleep</div><div class='add'>+ *</div><div class='add'>+ * Make the hcall, retrying while the hardware is busy. If we cannot yield</div><div class='add'>+ * the thread, limit the number of retries to 10 here.</div><div class='add'>+ */</div><div class='add'>+int nx_hcall_sync(struct nx_crypto_ctx *nx_ctx,</div><div class='add'>+		  struct vio_pfo_op    *op,</div><div class='add'>+		  u32                   may_sleep)</div><div class='add'>+{</div><div class='add'>+	int rc, retries = 10;</div><div class='add'>+	struct vio_dev *viodev = nx_driver.viodev;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;sync_ops));</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		rc = vio_h_cop_sync(viodev, op);</div><div class='add'>+	} while ((rc == -EBUSY &amp;&amp; !may_sleep &amp;&amp; retries--) ||</div><div class='add'>+	         (rc == -EBUSY &amp;&amp; may_sleep &amp;&amp; cond_resched()));</div><div class='add'>+</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_dbg(&amp;viodev-&gt;dev, "vio_h_cop_sync failed: rc: %d "</div><div class='add'>+			"hcall rc: %ld\n", rc, op-&gt;hcall_err);</div><div class='add'>+		atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;errors));</div><div class='add'>+		atomic_set(&amp;(nx_ctx-&gt;stats-&gt;last_error), op-&gt;hcall_err);</div><div class='add'>+		atomic_set(&amp;(nx_ctx-&gt;stats-&gt;last_error_pid), current-&gt;pid);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * nx_build_sg_list - build an NX scatter list describing a single  buffer</div><div class='add'>+ *</div><div class='add'>+ * @sg_head: pointer to the first scatter list element to build</div><div class='add'>+ * @start_addr: pointer to the linear buffer</div><div class='add'>+ * @len: length of the data at @start_addr</div><div class='add'>+ * @sgmax: the largest number of scatter list elements we're allowed to create</div><div class='add'>+ *</div><div class='add'>+ * This function will start writing nx_sg elements at @sg_head and keep</div><div class='add'>+ * writing them until all of the data from @start_addr is described or</div><div class='add'>+ * until sgmax elements have been written. Scatter list elements will be</div><div class='add'>+ * created such that none of the elements describes a buffer that crosses a 4K</div><div class='add'>+ * boundary.</div><div class='add'>+ */</div><div class='add'>+struct nx_sg *nx_build_sg_list(struct nx_sg *sg_head,</div><div class='add'>+			       u8           *start_addr,</div><div class='add'>+			       unsigned int  len,</div><div class='add'>+			       u32           sgmax)</div><div class='add'>+{</div><div class='add'>+	unsigned int sg_len = 0;</div><div class='add'>+	struct nx_sg *sg;</div><div class='add'>+	u64 sg_addr = (u64)start_addr;</div><div class='add'>+	u64 end_addr;</div><div class='add'>+</div><div class='add'>+	/* determine the start and end for this address range - slightly</div><div class='add'>+	 * different if this is in VMALLOC_REGION */</div><div class='add'>+	if (is_vmalloc_addr(start_addr))</div><div class='add'>+		sg_addr = phys_to_abs(page_to_phys(vmalloc_to_page(start_addr)))</div><div class='add'>+			  + offset_in_page(sg_addr);</div><div class='add'>+	else</div><div class='add'>+		sg_addr = virt_to_abs(sg_addr);</div><div class='add'>+</div><div class='add'>+	end_addr = sg_addr + len;</div><div class='add'>+</div><div class='add'>+	/* each iteration will write one struct nx_sg element and add the</div><div class='add'>+	 * length of data described by that element to sg_len. Once @len bytes</div><div class='add'>+	 * have been described (or @sgmax elements have been written), the</div><div class='add'>+	 * loop ends. min_t is used to ensure @end_addr falls on the same page</div><div class='add'>+	 * as sg_addr, if not, we need to create another nx_sg element for the</div><div class='add'>+	 * data on the next page */</div><div class='add'>+	for (sg = sg_head; sg_len &lt; len; sg++) {</div><div class='add'>+		sg-&gt;addr = sg_addr;</div><div class='add'>+		sg_addr = min_t(u64, NX_PAGE_NUM(sg_addr + NX_PAGE_SIZE), end_addr);</div><div class='add'>+		sg-&gt;len = sg_addr - sg-&gt;addr;</div><div class='add'>+		sg_len += sg-&gt;len;</div><div class='add'>+</div><div class='add'>+		if ((sg - sg_head) == sgmax) {</div><div class='add'>+			pr_err("nx: scatter/gather list overflow, pid: %d\n",</div><div class='add'>+			       current-&gt;pid);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* return the moved sg_head pointer */</div><div class='add'>+	return sg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * nx_walk_and_build - walk a linux scatterlist and build an nx scatterlist</div><div class='add'>+ *</div><div class='add'>+ * @nx_dst: pointer to the first nx_sg element to write</div><div class='add'>+ * @sglen: max number of nx_sg entries we're allowed to write</div><div class='add'>+ * @sg_src: pointer to the source linux scatterlist to walk</div><div class='add'>+ * @start: number of bytes to fast-forward past at the beginning of @sg_src</div><div class='add'>+ * @src_len: number of bytes to walk in @sg_src</div><div class='add'>+ */</div><div class='add'>+struct nx_sg *nx_walk_and_build(struct nx_sg       *nx_dst,</div><div class='add'>+				unsigned int        sglen,</div><div class='add'>+				struct scatterlist *sg_src,</div><div class='add'>+				unsigned int        start,</div><div class='add'>+				unsigned int        src_len)</div><div class='add'>+{</div><div class='add'>+	struct scatter_walk walk;</div><div class='add'>+	struct nx_sg *nx_sg = nx_dst;</div><div class='add'>+	unsigned int n, offset = 0, len = src_len;</div><div class='add'>+	char *dst;</div><div class='add'>+</div><div class='add'>+	/* we need to fast forward through @start bytes first */</div><div class='add'>+	for (;;) {</div><div class='add'>+		scatterwalk_start(&amp;walk, sg_src);</div><div class='add'>+</div><div class='add'>+		if (start &lt; offset + sg_src-&gt;length)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		offset += sg_src-&gt;length;</div><div class='add'>+		sg_src = scatterwalk_sg_next(sg_src);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* start - offset is the number of bytes to advance in the scatterlist</div><div class='add'>+	 * element we're currently looking at */</div><div class='add'>+	scatterwalk_advance(&amp;walk, start - offset);</div><div class='add'>+</div><div class='add'>+	while (len &amp;&amp; nx_sg) {</div><div class='add'>+		n = scatterwalk_clamp(&amp;walk, len);</div><div class='add'>+		if (!n) {</div><div class='add'>+			scatterwalk_start(&amp;walk, sg_next(walk.sg));</div><div class='add'>+			n = scatterwalk_clamp(&amp;walk, len);</div><div class='add'>+		}</div><div class='add'>+		dst = scatterwalk_map(&amp;walk);</div><div class='add'>+</div><div class='add'>+		nx_sg = nx_build_sg_list(nx_sg, dst, n, sglen);</div><div class='add'>+		len -= n;</div><div class='add'>+</div><div class='add'>+		scatterwalk_unmap(dst);</div><div class='add'>+		scatterwalk_advance(&amp;walk, n);</div><div class='add'>+		scatterwalk_done(&amp;walk, SCATTERWALK_FROM_SG, len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* return the moved destination pointer */</div><div class='add'>+	return nx_sg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * nx_build_sg_lists - walk the input scatterlists and build arrays of NX</div><div class='add'>+ *                     scatterlists based on them.</div><div class='add'>+ *</div><div class='add'>+ * @nx_ctx: NX crypto context for the lists we're building</div><div class='add'>+ * @desc: the block cipher descriptor for the operation</div><div class='add'>+ * @dst: destination scatterlist</div><div class='add'>+ * @src: source scatterlist</div><div class='add'>+ * @nbytes: length of data described in the scatterlists</div><div class='add'>+ * @iv: destination for the iv data, if the algorithm requires it</div><div class='add'>+ *</div><div class='add'>+ * This is common code shared by all the AES algorithms. It uses the block</div><div class='add'>+ * cipher walk routines to traverse input and output scatterlists, building</div><div class='add'>+ * corresponding NX scatterlists</div><div class='add'>+ */</div><div class='add'>+int nx_build_sg_lists(struct nx_crypto_ctx  *nx_ctx,</div><div class='add'>+		      struct blkcipher_desc *desc,</div><div class='add'>+		      struct scatterlist    *dst,</div><div class='add'>+		      struct scatterlist    *src,</div><div class='add'>+		      unsigned int           nbytes,</div><div class='add'>+		      u8                    *iv)</div><div class='add'>+{</div><div class='add'>+	struct nx_sg *nx_insg = nx_ctx-&gt;in_sg;</div><div class='add'>+	struct nx_sg *nx_outsg = nx_ctx-&gt;out_sg;</div><div class='add'>+	struct blkcipher_walk walk;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	blkcipher_walk_init(&amp;walk, dst, src, nbytes);</div><div class='add'>+	rc = blkcipher_walk_virt_block(desc, &amp;walk, AES_BLOCK_SIZE);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (iv)</div><div class='add'>+		memcpy(iv, walk.iv, AES_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	while (walk.nbytes) {</div><div class='add'>+		nx_insg = nx_build_sg_list(nx_insg, walk.src.virt.addr,</div><div class='add'>+					   walk.nbytes, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+		nx_outsg = nx_build_sg_list(nx_outsg, walk.dst.virt.addr,</div><div class='add'>+					    walk.nbytes, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+</div><div class='add'>+		rc = blkcipher_walk_done(desc, &amp;walk, 0);</div><div class='add'>+		if (rc)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (walk.nbytes) {</div><div class='add'>+		nx_insg = nx_build_sg_list(nx_insg, walk.src.virt.addr,</div><div class='add'>+					   walk.nbytes, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+		nx_outsg = nx_build_sg_list(nx_outsg, walk.dst.virt.addr,</div><div class='add'>+					    walk.nbytes, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+</div><div class='add'>+		rc = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* these lengths should be negative, which will indicate to phyp that</div><div class='add'>+	 * the input and output parameters are scatterlists, not linear</div><div class='add'>+	 * buffers */</div><div class='add'>+	nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - nx_insg) * sizeof(struct nx_sg);</div><div class='add'>+	nx_ctx-&gt;op.outlen = (nx_ctx-&gt;out_sg - nx_outsg) * sizeof(struct nx_sg);</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * nx_ctx_init - initialize an nx_ctx's vio_pfo_op struct</div><div class='add'>+ *</div><div class='add'>+ * @nx_ctx: the nx context to initialize</div><div class='add'>+ * @function: the function code for the op</div><div class='add'>+ */</div><div class='add'>+void nx_ctx_init(struct nx_crypto_ctx *nx_ctx, unsigned int function)</div><div class='add'>+{</div><div class='add'>+	memset(nx_ctx-&gt;kmem, 0, nx_ctx-&gt;kmem_len);</div><div class='add'>+	nx_ctx-&gt;csbcpb-&gt;csb.valid |= NX_CSB_VALID_BIT;</div><div class='add'>+</div><div class='add'>+	nx_ctx-&gt;op.flags = function;</div><div class='add'>+	nx_ctx-&gt;op.csbcpb = virt_to_abs(nx_ctx-&gt;csbcpb);</div><div class='add'>+	nx_ctx-&gt;op.in = virt_to_abs(nx_ctx-&gt;in_sg);</div><div class='add'>+	nx_ctx-&gt;op.out = virt_to_abs(nx_ctx-&gt;out_sg);</div><div class='add'>+</div><div class='add'>+	if (nx_ctx-&gt;csbcpb_aead) {</div><div class='add'>+		nx_ctx-&gt;csbcpb_aead-&gt;csb.valid |= NX_CSB_VALID_BIT;</div><div class='add'>+</div><div class='add'>+		nx_ctx-&gt;op_aead.flags = function;</div><div class='add'>+		nx_ctx-&gt;op_aead.csbcpb = virt_to_abs(nx_ctx-&gt;csbcpb_aead);</div><div class='add'>+		nx_ctx-&gt;op_aead.in = virt_to_abs(nx_ctx-&gt;in_sg);</div><div class='add'>+		nx_ctx-&gt;op_aead.out = virt_to_abs(nx_ctx-&gt;out_sg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nx_of_update_status(struct device   *dev,</div><div class='add'>+			       struct property *p,</div><div class='add'>+			       struct nx_of    *props)</div><div class='add'>+{</div><div class='add'>+	if (!strncmp(p-&gt;value, "okay", p-&gt;length)) {</div><div class='add'>+		props-&gt;status = NX_WAITING;</div><div class='add'>+		props-&gt;flags |= NX_OF_FLAG_STATUS_SET;</div><div class='add'>+	} else {</div><div class='add'>+		dev_info(dev, "%s: status '%s' is not 'okay'\n", __func__,</div><div class='add'>+			 (char *)p-&gt;value);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nx_of_update_sglen(struct device   *dev,</div><div class='add'>+			       struct property *p,</div><div class='add'>+			       struct nx_of    *props)</div><div class='add'>+{</div><div class='add'>+	if (p-&gt;length != sizeof(props-&gt;max_sg_len)) {</div><div class='add'>+		dev_err(dev, "%s: unexpected format for "</div><div class='add'>+			"ibm,max-sg-len property\n", __func__);</div><div class='add'>+		dev_dbg(dev, "%s: ibm,max-sg-len is %d bytes "</div><div class='add'>+			"long, expected %zd bytes\n", __func__,</div><div class='add'>+			p-&gt;length, sizeof(props-&gt;max_sg_len));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	props-&gt;max_sg_len = *(u32 *)p-&gt;value;</div><div class='add'>+	props-&gt;flags |= NX_OF_FLAG_MAXSGLEN_SET;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nx_of_update_msc(struct device   *dev,</div><div class='add'>+			     struct property *p,</div><div class='add'>+			     struct nx_of    *props)</div><div class='add'>+{</div><div class='add'>+	struct msc_triplet *trip;</div><div class='add'>+	struct max_sync_cop *msc;</div><div class='add'>+	unsigned int bytes_so_far, i, lenp;</div><div class='add'>+</div><div class='add'>+	msc = (struct max_sync_cop *)p-&gt;value;</div><div class='add'>+	lenp = p-&gt;length;</div><div class='add'>+</div><div class='add'>+	/* You can't tell if the data read in for this property is sane by its</div><div class='add'>+	 * size alone. This is because there are sizes embedded in the data</div><div class='add'>+	 * structure. The best we can do is check lengths as we parse and bail</div><div class='add'>+	 * as soon as a length error is detected. */</div><div class='add'>+	bytes_so_far = 0;</div><div class='add'>+</div><div class='add'>+	while ((bytes_so_far + sizeof(struct max_sync_cop)) &lt;= lenp) {</div><div class='add'>+		bytes_so_far += sizeof(struct max_sync_cop);</div><div class='add'>+</div><div class='add'>+		trip = msc-&gt;trip;</div><div class='add'>+</div><div class='add'>+		for (i = 0;</div><div class='add'>+		     ((bytes_so_far + sizeof(struct msc_triplet)) &lt;= lenp) &amp;&amp;</div><div class='add'>+		     i &lt; msc-&gt;triplets;</div><div class='add'>+		     i++) {</div><div class='add'>+			if (msc-&gt;fc &gt; NX_MAX_FC || msc-&gt;mode &gt; NX_MAX_MODE) {</div><div class='add'>+				dev_err(dev, "unknown function code/mode "</div><div class='add'>+					"combo: %d/%d (ignored)\n", msc-&gt;fc,</div><div class='add'>+					msc-&gt;mode);</div><div class='add'>+				goto next_loop;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			switch (trip-&gt;keybitlen) {</div><div class='add'>+			case 128:</div><div class='add'>+			case 160:</div><div class='add'>+				props-&gt;ap[msc-&gt;fc][msc-&gt;mode][0].databytelen =</div><div class='add'>+					trip-&gt;databytelen;</div><div class='add'>+				props-&gt;ap[msc-&gt;fc][msc-&gt;mode][0].sglen =</div><div class='add'>+					trip-&gt;sglen;</div><div class='add'>+				break;</div><div class='add'>+			case 192:</div><div class='add'>+				props-&gt;ap[msc-&gt;fc][msc-&gt;mode][1].databytelen =</div><div class='add'>+					trip-&gt;databytelen;</div><div class='add'>+				props-&gt;ap[msc-&gt;fc][msc-&gt;mode][1].sglen =</div><div class='add'>+					trip-&gt;sglen;</div><div class='add'>+				break;</div><div class='add'>+			case 256:</div><div class='add'>+				if (msc-&gt;fc == NX_FC_AES) {</div><div class='add'>+					props-&gt;ap[msc-&gt;fc][msc-&gt;mode][2].</div><div class='add'>+						databytelen = trip-&gt;databytelen;</div><div class='add'>+					props-&gt;ap[msc-&gt;fc][msc-&gt;mode][2].sglen =</div><div class='add'>+						trip-&gt;sglen;</div><div class='add'>+				} else if (msc-&gt;fc == NX_FC_AES_HMAC ||</div><div class='add'>+					   msc-&gt;fc == NX_FC_SHA) {</div><div class='add'>+					props-&gt;ap[msc-&gt;fc][msc-&gt;mode][1].</div><div class='add'>+						databytelen = trip-&gt;databytelen;</div><div class='add'>+					props-&gt;ap[msc-&gt;fc][msc-&gt;mode][1].sglen =</div><div class='add'>+						trip-&gt;sglen;</div><div class='add'>+				} else {</div><div class='add'>+					dev_warn(dev, "unknown function "</div><div class='add'>+						"code/key bit len combo"</div><div class='add'>+						": (%u/256)\n", msc-&gt;fc);</div><div class='add'>+				}</div><div class='add'>+				break;</div><div class='add'>+			case 512:</div><div class='add'>+				props-&gt;ap[msc-&gt;fc][msc-&gt;mode][2].databytelen =</div><div class='add'>+					trip-&gt;databytelen;</div><div class='add'>+				props-&gt;ap[msc-&gt;fc][msc-&gt;mode][2].sglen =</div><div class='add'>+					trip-&gt;sglen;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				dev_warn(dev, "unknown function code/key bit "</div><div class='add'>+					 "len combo: (%u/%u)\n", msc-&gt;fc,</div><div class='add'>+					 trip-&gt;keybitlen);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+next_loop:</div><div class='add'>+			bytes_so_far += sizeof(struct msc_triplet);</div><div class='add'>+			trip++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		msc = (struct max_sync_cop *)trip;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	props-&gt;flags |= NX_OF_FLAG_MAXSYNCCOP_SET;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * nx_of_init - read openFirmware values from the device tree</div><div class='add'>+ *</div><div class='add'>+ * @dev: device handle</div><div class='add'>+ * @props: pointer to struct to hold the properties values</div><div class='add'>+ *</div><div class='add'>+ * Called once at driver probe time, this function will read out the</div><div class='add'>+ * openFirmware properties we use at runtime. If all the OF properties are</div><div class='add'>+ * acceptable, when we exit this function props-&gt;flags will indicate that</div><div class='add'>+ * we're ready to register our crypto algorithms.</div><div class='add'>+ */</div><div class='add'>+static void nx_of_init(struct device *dev, struct nx_of *props)</div><div class='add'>+{</div><div class='add'>+	struct device_node *base_node = dev-&gt;of_node;</div><div class='add'>+	struct property *p;</div><div class='add'>+</div><div class='add'>+	p = of_find_property(base_node, "status", NULL);</div><div class='add'>+	if (!p)</div><div class='add'>+		dev_info(dev, "%s: property 'status' not found\n", __func__);</div><div class='add'>+	else</div><div class='add'>+		nx_of_update_status(dev, p, props);</div><div class='add'>+</div><div class='add'>+	p = of_find_property(base_node, "ibm,max-sg-len", NULL);</div><div class='add'>+	if (!p)</div><div class='add'>+		dev_info(dev, "%s: property 'ibm,max-sg-len' not found\n",</div><div class='add'>+			 __func__);</div><div class='add'>+	else</div><div class='add'>+		nx_of_update_sglen(dev, p, props);</div><div class='add'>+</div><div class='add'>+	p = of_find_property(base_node, "ibm,max-sync-cop", NULL);</div><div class='add'>+	if (!p)</div><div class='add'>+		dev_info(dev, "%s: property 'ibm,max-sync-cop' not found\n",</div><div class='add'>+			 __func__);</div><div class='add'>+	else</div><div class='add'>+		nx_of_update_msc(dev, p, props);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * nx_register_algs - register algorithms with the crypto API</div><div class='add'>+ *</div><div class='add'>+ * Called from nx_probe()</div><div class='add'>+ *</div><div class='add'>+ * If all OF properties are in an acceptable state, the driver flags will</div><div class='add'>+ * indicate that we're ready and we'll create our debugfs files and register</div><div class='add'>+ * out crypto algorithms.</div><div class='add'>+ */</div><div class='add'>+static int nx_register_algs(void)</div><div class='add'>+{</div><div class='add'>+	int rc = -1;</div><div class='add'>+</div><div class='add'>+	if (nx_driver.of.flags != NX_OF_FLAG_MASK_READY)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	memset(&amp;nx_driver.stats, 0, sizeof(struct nx_stats));</div><div class='add'>+</div><div class='add'>+	rc = NX_DEBUGFS_INIT(&amp;nx_driver);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rc = crypto_register_alg(&amp;nx_ecb_aes_alg);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rc = crypto_register_alg(&amp;nx_cbc_aes_alg);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_unreg_ecb;</div><div class='add'>+</div><div class='add'>+	rc = crypto_register_alg(&amp;nx_ctr_aes_alg);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_unreg_cbc;</div><div class='add'>+</div><div class='add'>+	rc = crypto_register_alg(&amp;nx_ctr3686_aes_alg);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_unreg_ctr;</div><div class='add'>+</div><div class='add'>+	rc = crypto_register_alg(&amp;nx_gcm_aes_alg);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_unreg_ctr3686;</div><div class='add'>+</div><div class='add'>+	rc = crypto_register_alg(&amp;nx_gcm4106_aes_alg);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_unreg_gcm;</div><div class='add'>+</div><div class='add'>+	rc = crypto_register_alg(&amp;nx_ccm_aes_alg);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_unreg_gcm4106;</div><div class='add'>+</div><div class='add'>+	rc = crypto_register_alg(&amp;nx_ccm4309_aes_alg);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_unreg_ccm;</div><div class='add'>+</div><div class='add'>+	rc = crypto_register_shash(&amp;nx_shash_sha256_alg);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_unreg_ccm4309;</div><div class='add'>+</div><div class='add'>+	rc = crypto_register_shash(&amp;nx_shash_sha512_alg);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_unreg_s256;</div><div class='add'>+</div><div class='add'>+	rc = crypto_register_shash(&amp;nx_shash_aes_xcbc_alg);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_unreg_s512;</div><div class='add'>+</div><div class='add'>+	nx_driver.of.status = NX_OKAY;</div><div class='add'>+</div><div class='add'>+	goto out;</div><div class='add'>+</div><div class='add'>+out_unreg_s512:</div><div class='add'>+	crypto_unregister_shash(&amp;nx_shash_sha512_alg);</div><div class='add'>+out_unreg_s256:</div><div class='add'>+	crypto_unregister_shash(&amp;nx_shash_sha256_alg);</div><div class='add'>+out_unreg_ccm4309:</div><div class='add'>+	crypto_unregister_alg(&amp;nx_ccm4309_aes_alg);</div><div class='add'>+out_unreg_ccm:</div><div class='add'>+	crypto_unregister_alg(&amp;nx_ccm_aes_alg);</div><div class='add'>+out_unreg_gcm4106:</div><div class='add'>+	crypto_unregister_alg(&amp;nx_gcm4106_aes_alg);</div><div class='add'>+out_unreg_gcm:</div><div class='add'>+	crypto_unregister_alg(&amp;nx_gcm_aes_alg);</div><div class='add'>+out_unreg_ctr3686:</div><div class='add'>+	crypto_unregister_alg(&amp;nx_ctr3686_aes_alg);</div><div class='add'>+out_unreg_ctr:</div><div class='add'>+	crypto_unregister_alg(&amp;nx_ctr_aes_alg);</div><div class='add'>+out_unreg_cbc:</div><div class='add'>+	crypto_unregister_alg(&amp;nx_cbc_aes_alg);</div><div class='add'>+out_unreg_ecb:</div><div class='add'>+	crypto_unregister_alg(&amp;nx_ecb_aes_alg);</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * nx_crypto_ctx_init - create and initialize a crypto api context</div><div class='add'>+ *</div><div class='add'>+ * @nx_ctx: the crypto api context</div><div class='add'>+ * @fc: function code for the context</div><div class='add'>+ * @mode: the function code specific mode for this context</div><div class='add'>+ */</div><div class='add'>+static int nx_crypto_ctx_init(struct nx_crypto_ctx *nx_ctx, u32 fc, u32 mode)</div><div class='add'>+{</div><div class='add'>+	if (nx_driver.of.status != NX_OKAY) {</div><div class='add'>+		pr_err("Attempt to initialize NX crypto context while device "</div><div class='add'>+		       "is not available!\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* we need an extra page for csbcpb_aead for these modes */</div><div class='add'>+	if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM)</div><div class='add'>+		nx_ctx-&gt;kmem_len = (4 * NX_PAGE_SIZE) +</div><div class='add'>+				   sizeof(struct nx_csbcpb);</div><div class='add'>+	else</div><div class='add'>+		nx_ctx-&gt;kmem_len = (3 * NX_PAGE_SIZE) +</div><div class='add'>+				   sizeof(struct nx_csbcpb);</div><div class='add'>+</div><div class='add'>+	nx_ctx-&gt;kmem = kmalloc(nx_ctx-&gt;kmem_len, GFP_KERNEL);</div><div class='add'>+	if (!nx_ctx-&gt;kmem)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* the csbcpb and scatterlists must be 4K aligned pages */</div><div class='add'>+	nx_ctx-&gt;csbcpb = (struct nx_csbcpb *)(round_up((u64)nx_ctx-&gt;kmem,</div><div class='add'>+						       (u64)NX_PAGE_SIZE));</div><div class='add'>+	nx_ctx-&gt;in_sg = (struct nx_sg *)((u8 *)nx_ctx-&gt;csbcpb + NX_PAGE_SIZE);</div><div class='add'>+	nx_ctx-&gt;out_sg = (struct nx_sg *)((u8 *)nx_ctx-&gt;in_sg + NX_PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM)</div><div class='add'>+		nx_ctx-&gt;csbcpb_aead =</div><div class='add'>+			(struct nx_csbcpb *)((u8 *)nx_ctx-&gt;out_sg +</div><div class='add'>+					     NX_PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	/* give each context a pointer to global stats and their OF</div><div class='add'>+	 * properties */</div><div class='add'>+	nx_ctx-&gt;stats = &amp;nx_driver.stats;</div><div class='add'>+	memcpy(nx_ctx-&gt;props, nx_driver.of.ap[fc][mode],</div><div class='add'>+	       sizeof(struct alg_props) * 3);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* entry points from the crypto tfm initializers */</div><div class='add'>+int nx_crypto_ctx_aes_ccm_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,</div><div class='add'>+				  NX_MODE_AES_CCM);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int nx_crypto_ctx_aes_gcm_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,</div><div class='add'>+				  NX_MODE_AES_GCM);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int nx_crypto_ctx_aes_ctr_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,</div><div class='add'>+				  NX_MODE_AES_CTR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int nx_crypto_ctx_aes_cbc_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,</div><div class='add'>+				  NX_MODE_AES_CBC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int nx_crypto_ctx_aes_ecb_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,</div><div class='add'>+				  NX_MODE_AES_ECB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int nx_crypto_ctx_sha_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_SHA, NX_MODE_SHA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int nx_crypto_ctx_aes_xcbc_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,</div><div class='add'>+				  NX_MODE_AES_XCBC_MAC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * nx_crypto_ctx_exit - destroy a crypto api context</div><div class='add'>+ *</div><div class='add'>+ * @tfm: the crypto transform pointer for the context</div><div class='add'>+ *</div><div class='add'>+ * As crypto API contexts are destroyed, this exit hook is called to free the</div><div class='add'>+ * memory associated with it.</div><div class='add'>+ */</div><div class='add'>+void nx_crypto_ctx_exit(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	kzfree(nx_ctx-&gt;kmem);</div><div class='add'>+	nx_ctx-&gt;csbcpb = NULL;</div><div class='add'>+	nx_ctx-&gt;csbcpb_aead = NULL;</div><div class='add'>+	nx_ctx-&gt;in_sg = NULL;</div><div class='add'>+	nx_ctx-&gt;out_sg = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit nx_probe(struct vio_dev *viodev,</div><div class='add'>+			      const struct vio_device_id *id)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(&amp;viodev-&gt;dev, "driver probed: %s resource id: 0x%x\n",</div><div class='add'>+		viodev-&gt;name, viodev-&gt;resource_id);</div><div class='add'>+</div><div class='add'>+	if (nx_driver.viodev) {</div><div class='add'>+		dev_err(&amp;viodev-&gt;dev, "%s: Attempt to register more than one "</div><div class='add'>+			"instance of the hardware\n", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nx_driver.viodev = viodev;</div><div class='add'>+</div><div class='add'>+	nx_of_init(&amp;viodev-&gt;dev, &amp;nx_driver.of);</div><div class='add'>+</div><div class='add'>+	return nx_register_algs();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit nx_remove(struct vio_dev *viodev)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(&amp;viodev-&gt;dev, "entering nx_remove for UA 0x%x\n",</div><div class='add'>+		viodev-&gt;unit_address);</div><div class='add'>+</div><div class='add'>+	if (nx_driver.of.status == NX_OKAY) {</div><div class='add'>+		NX_DEBUGFS_FINI(&amp;nx_driver);</div><div class='add'>+</div><div class='add'>+		crypto_unregister_alg(&amp;nx_ccm_aes_alg);</div><div class='add'>+		crypto_unregister_alg(&amp;nx_ccm4309_aes_alg);</div><div class='add'>+		crypto_unregister_alg(&amp;nx_gcm_aes_alg);</div><div class='add'>+		crypto_unregister_alg(&amp;nx_gcm4106_aes_alg);</div><div class='add'>+		crypto_unregister_alg(&amp;nx_ctr_aes_alg);</div><div class='add'>+		crypto_unregister_alg(&amp;nx_ctr3686_aes_alg);</div><div class='add'>+		crypto_unregister_alg(&amp;nx_cbc_aes_alg);</div><div class='add'>+		crypto_unregister_alg(&amp;nx_ecb_aes_alg);</div><div class='add'>+		crypto_unregister_shash(&amp;nx_shash_sha256_alg);</div><div class='add'>+		crypto_unregister_shash(&amp;nx_shash_sha512_alg);</div><div class='add'>+		crypto_unregister_shash(&amp;nx_shash_aes_xcbc_alg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* module wide initialization/cleanup */</div><div class='add'>+static int __init nx_init(void)</div><div class='add'>+{</div><div class='add'>+	return vio_register_driver(&amp;nx_driver.viodriver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit nx_fini(void)</div><div class='add'>+{</div><div class='add'>+	vio_unregister_driver(&amp;nx_driver.viodriver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct vio_device_id nx_crypto_driver_ids[] __devinitdata = {</div><div class='add'>+	{ "ibm,sym-encryption-v1", "ibm,sym-encryption" },</div><div class='add'>+	{ "", "" }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(vio, nx_crypto_driver_ids);</div><div class='add'>+</div><div class='add'>+/* driver state structure */</div><div class='add'>+struct nx_crypto_driver nx_driver = {</div><div class='add'>+	.viodriver = {</div><div class='add'>+		.id_table = nx_crypto_driver_ids,</div><div class='add'>+		.probe = nx_probe,</div><div class='add'>+		.remove = nx_remove,</div><div class='add'>+		.name  = NX_NAME,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_init(nx_init);</div><div class='add'>+module_exit(nx_fini);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Kent Yoder &lt;yoder1@us.ibm.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION(NX_STRING);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_VERSION(NX_VERSION);</div><div class='head'>diff --git a/drivers/crypto/nx/nx.h b/drivers/crypto/nx/nx.h<br/>new file mode 100644<br/>index 000000000000..3232b182dd28<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/nx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx.h</a></div><div class='hunk'>@@ -0,0 +1,193 @@</div><div class='add'>+</div><div class='add'>+#ifndef __NX_H__</div><div class='add'>+#define __NX_H__</div><div class='add'>+</div><div class='add'>+#define NX_NAME		"nx-crypto"</div><div class='add'>+#define NX_STRING	"IBM Power7+ Nest Accelerator Crypto Driver"</div><div class='add'>+#define NX_VERSION	"1.0"</div><div class='add'>+</div><div class='add'>+static const char nx_driver_string[] = NX_STRING;</div><div class='add'>+static const char nx_driver_version[] = NX_VERSION;</div><div class='add'>+</div><div class='add'>+/* a scatterlist in the format PHYP is expecting */</div><div class='add'>+struct nx_sg {</div><div class='add'>+	u64 addr;</div><div class='add'>+	u32 rsvd;</div><div class='add'>+	u32 len;</div><div class='add'>+} __attribute((packed));</div><div class='add'>+</div><div class='add'>+#define NX_PAGE_SIZE		(4096)</div><div class='add'>+#define NX_MAX_SG_ENTRIES	(NX_PAGE_SIZE/(sizeof(struct nx_sg)))</div><div class='add'>+</div><div class='add'>+enum nx_status {</div><div class='add'>+	NX_DISABLED,</div><div class='add'>+	NX_WAITING,</div><div class='add'>+	NX_OKAY</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* msc_triplet and max_sync_cop are used only to assist in parsing the</div><div class='add'>+ * openFirmware property */</div><div class='add'>+struct msc_triplet {</div><div class='add'>+	u32 keybitlen;</div><div class='add'>+	u32 databytelen;</div><div class='add'>+	u32 sglen;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct max_sync_cop {</div><div class='add'>+	u32 fc;</div><div class='add'>+	u32 mode;</div><div class='add'>+	u32 triplets;</div><div class='add'>+	struct msc_triplet trip[0];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct alg_props {</div><div class='add'>+	u32 databytelen;</div><div class='add'>+	u32 sglen;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define NX_OF_FLAG_MAXSGLEN_SET		(1)</div><div class='add'>+#define NX_OF_FLAG_STATUS_SET		(2)</div><div class='add'>+#define NX_OF_FLAG_MAXSYNCCOP_SET	(4)</div><div class='add'>+#define NX_OF_FLAG_MASK_READY		(NX_OF_FLAG_MAXSGLEN_SET | \</div><div class='add'>+					 NX_OF_FLAG_STATUS_SET |   \</div><div class='add'>+					 NX_OF_FLAG_MAXSYNCCOP_SET)</div><div class='add'>+struct nx_of {</div><div class='add'>+	u32 flags;</div><div class='add'>+	u32 max_sg_len;</div><div class='add'>+	enum nx_status status;</div><div class='add'>+	struct alg_props ap[NX_MAX_FC][NX_MAX_MODE][3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nx_stats {</div><div class='add'>+	atomic_t aes_ops;</div><div class='add'>+	atomic64_t aes_bytes;</div><div class='add'>+	atomic_t sha256_ops;</div><div class='add'>+	atomic64_t sha256_bytes;</div><div class='add'>+	atomic_t sha512_ops;</div><div class='add'>+	atomic64_t sha512_bytes;</div><div class='add'>+</div><div class='add'>+	atomic_t sync_ops;</div><div class='add'>+</div><div class='add'>+	atomic_t errors;</div><div class='add'>+	atomic_t last_error;</div><div class='add'>+	atomic_t last_error_pid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nx_debugfs {</div><div class='add'>+	struct dentry *dfs_root;</div><div class='add'>+	struct dentry *dfs_aes_ops, *dfs_aes_bytes;</div><div class='add'>+	struct dentry *dfs_sha256_ops, *dfs_sha256_bytes;</div><div class='add'>+	struct dentry *dfs_sha512_ops, *dfs_sha512_bytes;</div><div class='add'>+	struct dentry *dfs_errors, *dfs_last_error, *dfs_last_error_pid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nx_crypto_driver {</div><div class='add'>+	struct nx_stats    stats;</div><div class='add'>+	struct nx_of       of;</div><div class='add'>+	struct vio_dev    *viodev;</div><div class='add'>+	struct vio_driver  viodriver;</div><div class='add'>+	struct nx_debugfs  dfs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define NX_GCM4106_NONCE_LEN		(4)</div><div class='add'>+#define NX_GCM_CTR_OFFSET		(12)</div><div class='add'>+struct nx_gcm_priv {</div><div class='add'>+	u8 iv[16];</div><div class='add'>+	u8 iauth_tag[16];</div><div class='add'>+	u8 nonce[NX_GCM4106_NONCE_LEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define NX_CCM_AES_KEY_LEN		(16)</div><div class='add'>+#define NX_CCM4309_AES_KEY_LEN		(19)</div><div class='add'>+#define NX_CCM4309_NONCE_LEN		(3)</div><div class='add'>+struct nx_ccm_priv {</div><div class='add'>+	u8 iv[16];</div><div class='add'>+	u8 b0[16];</div><div class='add'>+	u8 iauth_tag[16];</div><div class='add'>+	u8 oauth_tag[16];</div><div class='add'>+	u8 nonce[NX_CCM4309_NONCE_LEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nx_xcbc_priv {</div><div class='add'>+	u8 key[16];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nx_ctr_priv {</div><div class='add'>+	u8 iv[16];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nx_crypto_ctx {</div><div class='add'>+	void *kmem;		  /* unaligned, kmalloc'd buffer */</div><div class='add'>+	size_t kmem_len;	  /* length of kmem */</div><div class='add'>+	struct nx_csbcpb *csbcpb; /* aligned page given to phyp @ hcall time */</div><div class='add'>+	struct vio_pfo_op op;     /* operation struct with hcall parameters */</div><div class='add'>+	struct nx_csbcpb *csbcpb_aead; /* secondary csbcpb used by AEAD algs */</div><div class='add'>+	struct vio_pfo_op op_aead;/* operation struct for csbcpb_aead */</div><div class='add'>+</div><div class='add'>+	struct nx_sg *in_sg;      /* aligned pointer into kmem to an sg list */</div><div class='add'>+	struct nx_sg *out_sg;     /* aligned pointer into kmem to an sg list */</div><div class='add'>+</div><div class='add'>+	struct alg_props *ap;	  /* pointer into props based on our key size */</div><div class='add'>+	struct alg_props props[3];/* openFirmware properties for requests */</div><div class='add'>+	struct nx_stats *stats;   /* pointer into an nx_crypto_driver for stats</div><div class='add'>+				     reporting */</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct nx_gcm_priv gcm;</div><div class='add'>+		struct nx_ccm_priv ccm;</div><div class='add'>+		struct nx_xcbc_priv xcbc;</div><div class='add'>+		struct nx_ctr_priv ctr;</div><div class='add'>+	} priv;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* prototypes */</div><div class='add'>+int nx_crypto_ctx_aes_ccm_init(struct crypto_tfm *tfm);</div><div class='add'>+int nx_crypto_ctx_aes_gcm_init(struct crypto_tfm *tfm);</div><div class='add'>+int nx_crypto_ctx_aes_xcbc_init(struct crypto_tfm *tfm);</div><div class='add'>+int nx_crypto_ctx_aes_ctr_init(struct crypto_tfm *tfm);</div><div class='add'>+int nx_crypto_ctx_aes_cbc_init(struct crypto_tfm *tfm);</div><div class='add'>+int nx_crypto_ctx_aes_ecb_init(struct crypto_tfm *tfm);</div><div class='add'>+int nx_crypto_ctx_sha_init(struct crypto_tfm *tfm);</div><div class='add'>+void nx_crypto_ctx_exit(struct crypto_tfm *tfm);</div><div class='add'>+void nx_ctx_init(struct nx_crypto_ctx *nx_ctx, unsigned int function);</div><div class='add'>+int nx_hcall_sync(struct nx_crypto_ctx *ctx, struct vio_pfo_op *op,</div><div class='add'>+		  u32 may_sleep);</div><div class='add'>+struct nx_sg *nx_build_sg_list(struct nx_sg *, u8 *, unsigned int, u32);</div><div class='add'>+int nx_build_sg_lists(struct nx_crypto_ctx *, struct blkcipher_desc *,</div><div class='add'>+		      struct scatterlist *, struct scatterlist *, unsigned int,</div><div class='add'>+		      u8 *);</div><div class='add'>+struct nx_sg *nx_walk_and_build(struct nx_sg *, unsigned int,</div><div class='add'>+				struct scatterlist *, unsigned int,</div><div class='add'>+				unsigned int);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+#define NX_DEBUGFS_INIT(drv)	nx_debugfs_init(drv)</div><div class='add'>+#define NX_DEBUGFS_FINI(drv)	nx_debugfs_fini(drv)</div><div class='add'>+</div><div class='add'>+int nx_debugfs_init(struct nx_crypto_driver *);</div><div class='add'>+void nx_debugfs_fini(struct nx_crypto_driver *);</div><div class='add'>+#else</div><div class='add'>+#define NX_DEBUGFS_INIT(drv)	(0)</div><div class='add'>+#define NX_DEBUGFS_FINI(drv)	(0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define NX_PAGE_NUM(x)		((u64)(x) &amp; 0xfffffffffffff000ULL)</div><div class='add'>+</div><div class='add'>+extern struct crypto_alg nx_cbc_aes_alg;</div><div class='add'>+extern struct crypto_alg nx_ecb_aes_alg;</div><div class='add'>+extern struct crypto_alg nx_gcm_aes_alg;</div><div class='add'>+extern struct crypto_alg nx_gcm4106_aes_alg;</div><div class='add'>+extern struct crypto_alg nx_ctr_aes_alg;</div><div class='add'>+extern struct crypto_alg nx_ctr3686_aes_alg;</div><div class='add'>+extern struct crypto_alg nx_ccm_aes_alg;</div><div class='add'>+extern struct crypto_alg nx_ccm4309_aes_alg;</div><div class='add'>+extern struct shash_alg nx_shash_aes_xcbc_alg;</div><div class='add'>+extern struct shash_alg nx_shash_sha512_alg;</div><div class='add'>+extern struct shash_alg nx_shash_sha256_alg;</div><div class='add'>+</div><div class='add'>+extern struct nx_crypto_driver nx_driver;</div><div class='add'>+</div><div class='add'>+#define SCATTERWALK_TO_SG	1</div><div class='add'>+#define SCATTERWALK_FROM_SG	0</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/crypto/nx/nx_csbcpb.h b/drivers/crypto/nx/nx_csbcpb.h<br/>new file mode 100644<br/>index 000000000000..a304f956d6f8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/nx_csbcpb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx_csbcpb.h</a></div><div class='hunk'>@@ -0,0 +1,205 @@</div><div class='add'>+</div><div class='add'>+#ifndef __NX_CSBCPB_H__</div><div class='add'>+#define __NX_CSBCPB_H__</div><div class='add'>+</div><div class='add'>+struct cop_symcpb_aes_ecb {</div><div class='add'>+	u8 key[32];</div><div class='add'>+	u8 __rsvd[80];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct cop_symcpb_aes_cbc {</div><div class='add'>+	u8 iv[16];</div><div class='add'>+	u8 key[32];</div><div class='add'>+	u8 cv[16];</div><div class='add'>+	u32 spbc;</div><div class='add'>+	u8 __rsvd[44];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct cop_symcpb_aes_gca {</div><div class='add'>+	u8 in_pat[16];</div><div class='add'>+	u8 key[32];</div><div class='add'>+	u8 out_pat[16];</div><div class='add'>+	u32 spbc;</div><div class='add'>+	u8 __rsvd[44];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct cop_symcpb_aes_gcm {</div><div class='add'>+	u8 in_pat_or_aad[16];</div><div class='add'>+	u8 iv_or_cnt[16];</div><div class='add'>+	u64 bit_length_aad;</div><div class='add'>+	u64 bit_length_data;</div><div class='add'>+	u8 in_s0[16];</div><div class='add'>+	u8 key[32];</div><div class='add'>+	u8 __rsvd1[16];</div><div class='add'>+	u8 out_pat_or_mac[16];</div><div class='add'>+	u8 out_s0[16];</div><div class='add'>+	u8 out_cnt[16];</div><div class='add'>+	u32 spbc;</div><div class='add'>+	u8 __rsvd2[12];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct cop_symcpb_aes_ctr {</div><div class='add'>+	u8 iv[16];</div><div class='add'>+	u8 key[32];</div><div class='add'>+	u8 cv[16];</div><div class='add'>+	u32 spbc;</div><div class='add'>+	u8 __rsvd2[44];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct cop_symcpb_aes_cca {</div><div class='add'>+	u8 b0[16];</div><div class='add'>+	u8 b1[16];</div><div class='add'>+	u8 key[16];</div><div class='add'>+	u8 out_pat_or_b0[16];</div><div class='add'>+	u32 spbc;</div><div class='add'>+	u8 __rsvd[44];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct cop_symcpb_aes_ccm {</div><div class='add'>+	u8 in_pat_or_b0[16];</div><div class='add'>+	u8 iv_or_ctr[16];</div><div class='add'>+	u8 in_s0[16];</div><div class='add'>+	u8 key[16];</div><div class='add'>+	u8 __rsvd1[48];</div><div class='add'>+	u8 out_pat_or_mac[16];</div><div class='add'>+	u8 out_s0[16];</div><div class='add'>+	u8 out_ctr[16];</div><div class='add'>+	u32 spbc;</div><div class='add'>+	u8 __rsvd2[12];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct cop_symcpb_aes_xcbc {</div><div class='add'>+	u8 cv[16];</div><div class='add'>+	u8 key[16];</div><div class='add'>+	u8 __rsvd1[16];</div><div class='add'>+	u8 out_cv_mac[16];</div><div class='add'>+	u32 spbc;</div><div class='add'>+	u8 __rsvd2[44];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct cop_symcpb_sha256 {</div><div class='add'>+	u64 message_bit_length;</div><div class='add'>+	u64 __rsvd1;</div><div class='add'>+	u8 input_partial_digest[32];</div><div class='add'>+	u8 message_digest[32];</div><div class='add'>+	u32 spbc;</div><div class='add'>+	u8 __rsvd2[44];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct cop_symcpb_sha512 {</div><div class='add'>+	u64 message_bit_length_hi;</div><div class='add'>+	u64 message_bit_length_lo;</div><div class='add'>+	u8 input_partial_digest[64];</div><div class='add'>+	u8 __rsvd1[32];</div><div class='add'>+	u8 message_digest[64];</div><div class='add'>+	u32 spbc;</div><div class='add'>+	u8 __rsvd2[76];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define NX_FDM_INTERMEDIATE		0x01</div><div class='add'>+#define NX_FDM_CONTINUATION		0x02</div><div class='add'>+#define NX_FDM_ENDE_ENCRYPT		0x80</div><div class='add'>+</div><div class='add'>+#define NX_CPB_FDM(c)			((c)-&gt;cpb.hdr.fdm)</div><div class='add'>+#define NX_CPB_KS_DS(c)			((c)-&gt;cpb.hdr.ks_ds)</div><div class='add'>+</div><div class='add'>+#define NX_CPB_KEY_SIZE(c)		(NX_CPB_KS_DS(c) &gt;&gt; 4)</div><div class='add'>+#define NX_CPB_SET_KEY_SIZE(c, x)	NX_CPB_KS_DS(c) |= ((x) &lt;&lt; 4)</div><div class='add'>+#define NX_CPB_SET_DIGEST_SIZE(c, x)	NX_CPB_KS_DS(c) |= (x)</div><div class='add'>+</div><div class='add'>+struct cop_symcpb_header {</div><div class='add'>+	u8 mode;</div><div class='add'>+	u8 fdm;</div><div class='add'>+	u8 ks_ds;</div><div class='add'>+	u8 pad_byte;</div><div class='add'>+	u8 __rsvd[12];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct cop_parameter_block {</div><div class='add'>+	struct cop_symcpb_header hdr;</div><div class='add'>+	union {</div><div class='add'>+		struct cop_symcpb_aes_ecb  aes_ecb;</div><div class='add'>+		struct cop_symcpb_aes_cbc  aes_cbc;</div><div class='add'>+		struct cop_symcpb_aes_gca  aes_gca;</div><div class='add'>+		struct cop_symcpb_aes_gcm  aes_gcm;</div><div class='add'>+		struct cop_symcpb_aes_cca  aes_cca;</div><div class='add'>+		struct cop_symcpb_aes_ccm  aes_ccm;</div><div class='add'>+		struct cop_symcpb_aes_ctr  aes_ctr;</div><div class='add'>+		struct cop_symcpb_aes_xcbc aes_xcbc;</div><div class='add'>+		struct cop_symcpb_sha256   sha256;</div><div class='add'>+		struct cop_symcpb_sha512   sha512;</div><div class='add'>+	};</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define NX_CSB_VALID_BIT	0x80</div><div class='add'>+</div><div class='add'>+/* co-processor status block */</div><div class='add'>+struct cop_status_block {</div><div class='add'>+	u8 valid;</div><div class='add'>+	u8 crb_seq_number;</div><div class='add'>+	u8 completion_code;</div><div class='add'>+	u8 completion_extension;</div><div class='add'>+	u32 processed_byte_count;</div><div class='add'>+	u64 address;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Nest accelerator workbook section 4.4 */</div><div class='add'>+struct nx_csbcpb {</div><div class='add'>+	unsigned char __rsvd[112];</div><div class='add'>+	struct cop_status_block csb;</div><div class='add'>+	struct cop_parameter_block cpb;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* nx_csbcpb related definitions */</div><div class='add'>+#define NX_MODE_AES_ECB			0</div><div class='add'>+#define NX_MODE_AES_CBC			1</div><div class='add'>+#define NX_MODE_AES_GMAC		2</div><div class='add'>+#define NX_MODE_AES_GCA			3</div><div class='add'>+#define NX_MODE_AES_GCM			4</div><div class='add'>+#define NX_MODE_AES_CCA			5</div><div class='add'>+#define NX_MODE_AES_CCM			6</div><div class='add'>+#define NX_MODE_AES_CTR			7</div><div class='add'>+#define NX_MODE_AES_XCBC_MAC		20</div><div class='add'>+#define NX_MODE_SHA			0</div><div class='add'>+#define NX_MODE_SHA_HMAC		1</div><div class='add'>+#define NX_MODE_AES_CBC_HMAC_ETA	8</div><div class='add'>+#define NX_MODE_AES_CBC_HMAC_ATE	9</div><div class='add'>+#define NX_MODE_AES_CBC_HMAC_EAA	10</div><div class='add'>+#define NX_MODE_AES_CTR_HMAC_ETA	12</div><div class='add'>+#define NX_MODE_AES_CTR_HMAC_ATE	13</div><div class='add'>+#define NX_MODE_AES_CTR_HMAC_EAA	14</div><div class='add'>+</div><div class='add'>+#define NX_FDM_CI_FULL		0</div><div class='add'>+#define NX_FDM_CI_FIRST		1</div><div class='add'>+#define NX_FDM_CI_LAST		2</div><div class='add'>+#define NX_FDM_CI_MIDDLE	3</div><div class='add'>+</div><div class='add'>+#define NX_FDM_PR_NONE		0</div><div class='add'>+#define NX_FDM_PR_PAD		1</div><div class='add'>+</div><div class='add'>+#define NX_KS_AES_128		1</div><div class='add'>+#define NX_KS_AES_192		2</div><div class='add'>+#define NX_KS_AES_256		3</div><div class='add'>+</div><div class='add'>+#define NX_DS_SHA256		2</div><div class='add'>+#define NX_DS_SHA512		3</div><div class='add'>+</div><div class='add'>+#define NX_FC_AES		0</div><div class='add'>+#define NX_FC_SHA		2</div><div class='add'>+#define NX_FC_AES_HMAC		6</div><div class='add'>+</div><div class='add'>+#define NX_MAX_FC		(NX_FC_AES_HMAC + 1)</div><div class='add'>+#define NX_MAX_MODE		(NX_MODE_AES_XCBC_MAC + 1)</div><div class='add'>+</div><div class='add'>+#define HCOP_FC_AES          NX_FC_AES</div><div class='add'>+#define HCOP_FC_SHA          NX_FC_SHA</div><div class='add'>+#define HCOP_FC_AES_HMAC     NX_FC_AES_HMAC</div><div class='add'>+</div><div class='add'>+/* indices into the array of algorithm properties */</div><div class='add'>+#define NX_PROPS_AES_128		0</div><div class='add'>+#define NX_PROPS_AES_192		1</div><div class='add'>+#define NX_PROPS_AES_256		2</div><div class='add'>+#define NX_PROPS_SHA256			1</div><div class='add'>+#define NX_PROPS_SHA512			2</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/crypto/nx/nx_debugfs.c b/drivers/crypto/nx/nx_debugfs.c<br/>new file mode 100644<br/>index 000000000000..7ab2e8dcd9b4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/nx/nx_debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/nx/nx_debugfs.c</a></div><div class='hunk'>@@ -0,0 +1,103 @@</div><div class='add'>+/**</div><div class='add'>+ * debugfs routines supporting the Power 7+ Nest Accelerators driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2012 International Business Machines Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 only.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ * Author: Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/kobject.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;crypto/hash.h&gt;</div><div class='add'>+#include &lt;asm/vio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "nx_csbcpb.h"</div><div class='add'>+#include "nx.h"</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * debugfs</div><div class='add'>+ *</div><div class='add'>+ * For documentation on these attributes, please see:</div><div class='add'>+ *</div><div class='add'>+ * Documentation/ABI/testing/debugfs-pfo-nx-crypto</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int nx_debugfs_init(struct nx_crypto_driver *drv)</div><div class='add'>+{</div><div class='add'>+	struct nx_debugfs *dfs = &amp;drv-&gt;dfs;</div><div class='add'>+</div><div class='add'>+	dfs-&gt;dfs_root = debugfs_create_dir(NX_NAME, NULL);</div><div class='add'>+</div><div class='add'>+	dfs-&gt;dfs_aes_ops =</div><div class='add'>+		debugfs_create_u32("aes_ops",</div><div class='add'>+				   S_IRUSR | S_IRGRP | S_IROTH,</div><div class='add'>+				   dfs-&gt;dfs_root, (u32 *)&amp;drv-&gt;stats.aes_ops);</div><div class='add'>+	dfs-&gt;dfs_sha256_ops =</div><div class='add'>+		debugfs_create_u32("sha256_ops",</div><div class='add'>+				   S_IRUSR | S_IRGRP | S_IROTH,</div><div class='add'>+				   dfs-&gt;dfs_root,</div><div class='add'>+				   (u32 *)&amp;drv-&gt;stats.sha256_ops);</div><div class='add'>+	dfs-&gt;dfs_sha512_ops =</div><div class='add'>+		debugfs_create_u32("sha512_ops",</div><div class='add'>+				   S_IRUSR | S_IRGRP | S_IROTH,</div><div class='add'>+				   dfs-&gt;dfs_root,</div><div class='add'>+				   (u32 *)&amp;drv-&gt;stats.sha512_ops);</div><div class='add'>+	dfs-&gt;dfs_aes_bytes =</div><div class='add'>+		debugfs_create_u64("aes_bytes",</div><div class='add'>+				   S_IRUSR | S_IRGRP | S_IROTH,</div><div class='add'>+				   dfs-&gt;dfs_root,</div><div class='add'>+				   (u64 *)&amp;drv-&gt;stats.aes_bytes);</div><div class='add'>+	dfs-&gt;dfs_sha256_bytes =</div><div class='add'>+		debugfs_create_u64("sha256_bytes",</div><div class='add'>+				   S_IRUSR | S_IRGRP | S_IROTH,</div><div class='add'>+				   dfs-&gt;dfs_root,</div><div class='add'>+				   (u64 *)&amp;drv-&gt;stats.sha256_bytes);</div><div class='add'>+	dfs-&gt;dfs_sha512_bytes =</div><div class='add'>+		debugfs_create_u64("sha512_bytes",</div><div class='add'>+				   S_IRUSR | S_IRGRP | S_IROTH,</div><div class='add'>+				   dfs-&gt;dfs_root,</div><div class='add'>+				   (u64 *)&amp;drv-&gt;stats.sha512_bytes);</div><div class='add'>+	dfs-&gt;dfs_errors =</div><div class='add'>+		debugfs_create_u32("errors",</div><div class='add'>+				   S_IRUSR | S_IRGRP | S_IROTH,</div><div class='add'>+				   dfs-&gt;dfs_root, (u32 *)&amp;drv-&gt;stats.errors);</div><div class='add'>+	dfs-&gt;dfs_last_error =</div><div class='add'>+		debugfs_create_u32("last_error",</div><div class='add'>+				   S_IRUSR | S_IRGRP | S_IROTH,</div><div class='add'>+				   dfs-&gt;dfs_root,</div><div class='add'>+				   (u32 *)&amp;drv-&gt;stats.last_error);</div><div class='add'>+	dfs-&gt;dfs_last_error_pid =</div><div class='add'>+		debugfs_create_u32("last_error_pid",</div><div class='add'>+				   S_IRUSR | S_IRGRP | S_IROTH,</div><div class='add'>+				   dfs-&gt;dfs_root,</div><div class='add'>+				   (u32 *)&amp;drv-&gt;stats.last_error_pid);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+nx_debugfs_fini(struct nx_crypto_driver *drv)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive(drv-&gt;dfs.dfs_root);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/crypto/ux500/Kconfig b/drivers/crypto/ux500/Kconfig<br/>new file mode 100644<br/>index 000000000000..b35e5c4b025a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+#</div><div class='add'>+# Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+# Author: Shujuan Chen (shujuan.chen@stericsson.com)</div><div class='add'>+# License terms: GNU General Public License (GPL) version 2</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+config CRYPTO_DEV_UX500_CRYP</div><div class='add'>+	tristate "UX500 crypto driver for CRYP block"</div><div class='add'>+	depends on CRYPTO_DEV_UX500</div><div class='add'>+	select CRYPTO_DES</div><div class='add'>+	help</div><div class='add'>+        This selects the crypto driver for the UX500_CRYP hardware. It supports</div><div class='add'>+        AES-ECB, CBC and CTR with keys sizes of 128, 192 and 256 bit sizes.</div><div class='add'>+</div><div class='add'>+config CRYPTO_DEV_UX500_HASH</div><div class='add'>+        tristate "UX500 crypto driver for HASH block"</div><div class='add'>+        depends on CRYPTO_DEV_UX500</div><div class='add'>+        select CRYPTO_HASH</div><div class='add'>+        select CRYPTO_HMAC</div><div class='add'>+        help</div><div class='add'>+          This selects the hash driver for the UX500_HASH hardware.</div><div class='add'>+          Depends on UX500/STM DMA if running in DMA mode.</div><div class='add'>+</div><div class='add'>+config CRYPTO_DEV_UX500_DEBUG</div><div class='add'>+	bool "Activate ux500 platform debug-mode for crypto and hash block"</div><div class='add'>+	depends on CRYPTO_DEV_UX500_CRYP || CRYPTO_DEV_UX500_HASH</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Say Y if you want to add debug prints to ux500_hash and</div><div class='add'>+	  ux500_cryp devices.</div><div class='head'>diff --git a/drivers/crypto/ux500/Makefile b/drivers/crypto/ux500/Makefile<br/>new file mode 100644<br/>index 000000000000..b9a365bade86<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/Makefile</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+#</div><div class='add'>+# Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+# Author: Shujuan Chen (shujuan.chen@stericsson.com)</div><div class='add'>+# License terms: GNU General Public License (GPL) version 2</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_DEV_UX500_HASH) += hash/</div><div class='add'>+obj-$(CONFIG_CRYPTO_DEV_UX500_CRYP) += cryp/</div><div class='head'>diff --git a/drivers/crypto/ux500/cryp/Makefile b/drivers/crypto/ux500/cryp/Makefile<br/>new file mode 100644<br/>index 000000000000..e5d362a6f680<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/cryp/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/Makefile</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+#/*</div><div class='add'>+# * Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+# * Author: shujuan.chen@stericsson.com for ST-Ericsson.</div><div class='add'>+# * License terms: GNU General Public License (GPL) version 2  */</div><div class='add'>+</div><div class='add'>+ifdef CONFIG_CRYPTO_DEV_UX500_DEBUG</div><div class='add'>+CFLAGS_cryp_core.o := -DDEBUG -O0</div><div class='add'>+CFLAGS_cryp.o := -DDEBUG -O0</div><div class='add'>+CFLAGS_cryp_irq.o := -DDEBUG -O0</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_DEV_UX500_CRYP) += ux500_cryp.o</div><div class='add'>+ux500_cryp-objs :=  cryp.o cryp_irq.o cryp_core.o</div><div class='head'>diff --git a/drivers/crypto/ux500/cryp/cryp.c b/drivers/crypto/ux500/cryp/cryp.c<br/>new file mode 100644<br/>index 000000000000..e208ceaf81c9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/cryp/cryp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp.c</a></div><div class='hunk'>@@ -0,0 +1,389 @@</div><div class='add'>+/**</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+ * Author: Shujuan Chen &lt;shujuan.chen@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Jonas Linde &lt;jonas.linde@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Niklas Hernaeus &lt;niklas.hernaeus@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Joakim Bech &lt;joakim.xx.bech@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Berne Hebark &lt;berne.herbark@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * License terms: GNU General Public License (GPL) version 2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+</div><div class='add'>+#include "cryp_p.h"</div><div class='add'>+#include "cryp.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_wait_until_done - wait until the device logic is not busy</div><div class='add'>+ */</div><div class='add'>+void cryp_wait_until_done(struct cryp_device_data *device_data)</div><div class='add'>+{</div><div class='add'>+	while (cryp_is_logic_busy(device_data))</div><div class='add'>+		cpu_relax();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_check - This routine checks Peripheral and PCell Id</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ */</div><div class='add'>+int cryp_check(struct cryp_device_data *device_data)</div><div class='add'>+{</div><div class='add'>+	int peripheralid2 = 0;</div><div class='add'>+</div><div class='add'>+	if (NULL == device_data)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	peripheralid2 = readl_relaxed(&amp;device_data-&gt;base-&gt;periphId2);</div><div class='add'>+</div><div class='add'>+	if (peripheralid2 != CRYP_PERIPHERAL_ID2_DB8500)</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	/* Check Peripheral and Pcell Id Register for CRYP */</div><div class='add'>+	if ((CRYP_PERIPHERAL_ID0 ==</div><div class='add'>+		readl_relaxed(&amp;device_data-&gt;base-&gt;periphId0))</div><div class='add'>+	    &amp;&amp; (CRYP_PERIPHERAL_ID1 ==</div><div class='add'>+		    readl_relaxed(&amp;device_data-&gt;base-&gt;periphId1))</div><div class='add'>+	    &amp;&amp; (CRYP_PERIPHERAL_ID3 ==</div><div class='add'>+		    readl_relaxed(&amp;device_data-&gt;base-&gt;periphId3))</div><div class='add'>+	    &amp;&amp; (CRYP_PCELL_ID0 ==</div><div class='add'>+		    readl_relaxed(&amp;device_data-&gt;base-&gt;pcellId0))</div><div class='add'>+	    &amp;&amp; (CRYP_PCELL_ID1 ==</div><div class='add'>+		    readl_relaxed(&amp;device_data-&gt;base-&gt;pcellId1))</div><div class='add'>+	    &amp;&amp; (CRYP_PCELL_ID2 ==</div><div class='add'>+		    readl_relaxed(&amp;device_data-&gt;base-&gt;pcellId2))</div><div class='add'>+	    &amp;&amp; (CRYP_PCELL_ID3 ==</div><div class='add'>+		    readl_relaxed(&amp;device_data-&gt;base-&gt;pcellId3))) {</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EPERM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_activity - This routine enables/disable the cryptography function.</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ * @cryp_crypen: Enable/Disable functionality</div><div class='add'>+ */</div><div class='add'>+void cryp_activity(struct cryp_device_data *device_data,</div><div class='add'>+		   enum cryp_crypen cryp_crypen)</div><div class='add'>+{</div><div class='add'>+	CRYP_PUT_BITS(&amp;device_data-&gt;base-&gt;cr,</div><div class='add'>+		      cryp_crypen,</div><div class='add'>+		      CRYP_CR_CRYPEN_POS,</div><div class='add'>+		      CRYP_CR_CRYPEN_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_flush_inoutfifo - Resets both the input and the output FIFOs</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ */</div><div class='add'>+void cryp_flush_inoutfifo(struct cryp_device_data *device_data)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * We always need to disble the hardware before trying to flush the</div><div class='add'>+	 * FIFO. This is something that isn't written in the design</div><div class='add'>+	 * specification, but we have been informed by the hardware designers</div><div class='add'>+	 * that this must be done.</div><div class='add'>+	 */</div><div class='add'>+	cryp_activity(device_data, CRYP_CRYPEN_DISABLE);</div><div class='add'>+	cryp_wait_until_done(device_data);</div><div class='add'>+</div><div class='add'>+	CRYP_SET_BITS(&amp;device_data-&gt;base-&gt;cr, CRYP_CR_FFLUSH_MASK);</div><div class='add'>+	/*</div><div class='add'>+	 * CRYP_SR_INFIFO_READY_MASK is the expected value on the status</div><div class='add'>+	 * register when starting a new calculation, which means Input FIFO is</div><div class='add'>+	 * not full and input FIFO is empty.</div><div class='add'>+	 */</div><div class='add'>+	while (readl_relaxed(&amp;device_data-&gt;base-&gt;sr) !=</div><div class='add'>+	       CRYP_SR_INFIFO_READY_MASK)</div><div class='add'>+		cpu_relax();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_set_configuration - This routine set the cr CRYP IP</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ * @cryp_config: Pointer to the configuration parameter</div><div class='add'>+ * @control_register: The control register to be written later on.</div><div class='add'>+ */</div><div class='add'>+int cryp_set_configuration(struct cryp_device_data *device_data,</div><div class='add'>+			   struct cryp_config *cryp_config,</div><div class='add'>+			   u32 *control_register)</div><div class='add'>+{</div><div class='add'>+	u32 cr_for_kse;</div><div class='add'>+</div><div class='add'>+	if (NULL == device_data || NULL == cryp_config)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*control_register |= (cryp_config-&gt;keysize &lt;&lt; CRYP_CR_KEYSIZE_POS);</div><div class='add'>+</div><div class='add'>+	/* Prepare key for decryption in AES_ECB and AES_CBC mode. */</div><div class='add'>+	if ((CRYP_ALGORITHM_DECRYPT == cryp_config-&gt;algodir) &amp;&amp;</div><div class='add'>+	    ((CRYP_ALGO_AES_ECB == cryp_config-&gt;algomode) ||</div><div class='add'>+	     (CRYP_ALGO_AES_CBC == cryp_config-&gt;algomode))) {</div><div class='add'>+		cr_for_kse = *control_register;</div><div class='add'>+		/*</div><div class='add'>+		 * This seems a bit odd, but it is indeed needed to set this to</div><div class='add'>+		 * encrypt even though it is a decryption that we are doing. It</div><div class='add'>+		 * also mentioned in the design spec that you need to do this.</div><div class='add'>+		 * After the keyprepartion for decrypting is done you should set</div><div class='add'>+		 * algodir back to decryption, which is done outside this if</div><div class='add'>+		 * statement.</div><div class='add'>+		 *</div><div class='add'>+		 * According to design specification we should set mode ECB</div><div class='add'>+		 * during key preparation even though we might be running CBC</div><div class='add'>+		 * when enter this function.</div><div class='add'>+		 *</div><div class='add'>+		 * Writing to KSE_ENABLED will drop CRYPEN when key preparation</div><div class='add'>+		 * is done. Therefore we need to set CRYPEN again outside this</div><div class='add'>+		 * if statement when running decryption.</div><div class='add'>+		 */</div><div class='add'>+		cr_for_kse |= ((CRYP_ALGORITHM_ENCRYPT &lt;&lt; CRYP_CR_ALGODIR_POS) |</div><div class='add'>+			       (CRYP_ALGO_AES_ECB &lt;&lt; CRYP_CR_ALGOMODE_POS) |</div><div class='add'>+			       (CRYP_CRYPEN_ENABLE &lt;&lt; CRYP_CR_CRYPEN_POS) |</div><div class='add'>+			       (KSE_ENABLED &lt;&lt; CRYP_CR_KSE_POS));</div><div class='add'>+</div><div class='add'>+		writel_relaxed(cr_for_kse, &amp;device_data-&gt;base-&gt;cr);</div><div class='add'>+		cryp_wait_until_done(device_data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*control_register |=</div><div class='add'>+		((cryp_config-&gt;algomode &lt;&lt; CRYP_CR_ALGOMODE_POS) |</div><div class='add'>+		 (cryp_config-&gt;algodir &lt;&lt; CRYP_CR_ALGODIR_POS));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_configure_protection - set the protection bits in the CRYP logic.</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ * @p_protect_config:	Pointer to the protection mode and</div><div class='add'>+ *			secure mode configuration</div><div class='add'>+ */</div><div class='add'>+int cryp_configure_protection(struct cryp_device_data *device_data,</div><div class='add'>+			      struct cryp_protection_config *p_protect_config)</div><div class='add'>+{</div><div class='add'>+	if (NULL == p_protect_config)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	CRYP_WRITE_BIT(&amp;device_data-&gt;base-&gt;cr,</div><div class='add'>+		       (u32) p_protect_config-&gt;secure_access,</div><div class='add'>+		       CRYP_CR_SECURE_MASK);</div><div class='add'>+	CRYP_PUT_BITS(&amp;device_data-&gt;base-&gt;cr,</div><div class='add'>+		      p_protect_config-&gt;privilege_access,</div><div class='add'>+		      CRYP_CR_PRLG_POS,</div><div class='add'>+		      CRYP_CR_PRLG_MASK);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_is_logic_busy - returns the busy status of the CRYP logic</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ */</div><div class='add'>+int cryp_is_logic_busy(struct cryp_device_data *device_data)</div><div class='add'>+{</div><div class='add'>+	return CRYP_TEST_BITS(&amp;device_data-&gt;base-&gt;sr,</div><div class='add'>+			      CRYP_SR_BUSY_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_configure_for_dma - configures the CRYP IP for DMA operation</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ * @dma_req: Specifies the DMA request type value.</div><div class='add'>+ */</div><div class='add'>+void cryp_configure_for_dma(struct cryp_device_data *device_data,</div><div class='add'>+			    enum cryp_dma_req_type dma_req)</div><div class='add'>+{</div><div class='add'>+	CRYP_SET_BITS(&amp;device_data-&gt;base-&gt;dmacr,</div><div class='add'>+		      (u32) dma_req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_configure_key_values - configures the key values for CRYP operations</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ * @key_reg_index: Key value index register</div><div class='add'>+ * @key_value: The key value struct</div><div class='add'>+ */</div><div class='add'>+int cryp_configure_key_values(struct cryp_device_data *device_data,</div><div class='add'>+			      enum cryp_key_reg_index key_reg_index,</div><div class='add'>+			      struct cryp_key_value key_value)</div><div class='add'>+{</div><div class='add'>+	while (cryp_is_logic_busy(device_data))</div><div class='add'>+		cpu_relax();</div><div class='add'>+</div><div class='add'>+	switch (key_reg_index) {</div><div class='add'>+	case CRYP_KEY_REG_1:</div><div class='add'>+		writel_relaxed(key_value.key_value_left,</div><div class='add'>+				&amp;device_data-&gt;base-&gt;key_1_l);</div><div class='add'>+		writel_relaxed(key_value.key_value_right,</div><div class='add'>+				&amp;device_data-&gt;base-&gt;key_1_r);</div><div class='add'>+		break;</div><div class='add'>+	case CRYP_KEY_REG_2:</div><div class='add'>+		writel_relaxed(key_value.key_value_left,</div><div class='add'>+				&amp;device_data-&gt;base-&gt;key_2_l);</div><div class='add'>+		writel_relaxed(key_value.key_value_right,</div><div class='add'>+				&amp;device_data-&gt;base-&gt;key_2_r);</div><div class='add'>+		break;</div><div class='add'>+	case CRYP_KEY_REG_3:</div><div class='add'>+		writel_relaxed(key_value.key_value_left,</div><div class='add'>+				&amp;device_data-&gt;base-&gt;key_3_l);</div><div class='add'>+		writel_relaxed(key_value.key_value_right,</div><div class='add'>+				&amp;device_data-&gt;base-&gt;key_3_r);</div><div class='add'>+		break;</div><div class='add'>+	case CRYP_KEY_REG_4:</div><div class='add'>+		writel_relaxed(key_value.key_value_left,</div><div class='add'>+				&amp;device_data-&gt;base-&gt;key_4_l);</div><div class='add'>+		writel_relaxed(key_value.key_value_right,</div><div class='add'>+				&amp;device_data-&gt;base-&gt;key_4_r);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_configure_init_vector - configures the initialization vector register</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ * @init_vector_index: Specifies the index of the init vector.</div><div class='add'>+ * @init_vector_value: Specifies the value for the init vector.</div><div class='add'>+ */</div><div class='add'>+int cryp_configure_init_vector(struct cryp_device_data *device_data,</div><div class='add'>+			       enum cryp_init_vector_index</div><div class='add'>+			       init_vector_index,</div><div class='add'>+			       struct cryp_init_vector_value</div><div class='add'>+			       init_vector_value)</div><div class='add'>+{</div><div class='add'>+	while (cryp_is_logic_busy(device_data))</div><div class='add'>+		cpu_relax();</div><div class='add'>+</div><div class='add'>+	switch (init_vector_index) {</div><div class='add'>+	case CRYP_INIT_VECTOR_INDEX_0:</div><div class='add'>+		writel_relaxed(init_vector_value.init_value_left,</div><div class='add'>+		       &amp;device_data-&gt;base-&gt;init_vect_0_l);</div><div class='add'>+		writel_relaxed(init_vector_value.init_value_right,</div><div class='add'>+		       &amp;device_data-&gt;base-&gt;init_vect_0_r);</div><div class='add'>+		break;</div><div class='add'>+	case CRYP_INIT_VECTOR_INDEX_1:</div><div class='add'>+		writel_relaxed(init_vector_value.init_value_left,</div><div class='add'>+		       &amp;device_data-&gt;base-&gt;init_vect_1_l);</div><div class='add'>+		writel_relaxed(init_vector_value.init_value_right,</div><div class='add'>+		       &amp;device_data-&gt;base-&gt;init_vect_1_r);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_save_device_context -	Store hardware registers and</div><div class='add'>+ *				other device context parameter</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ * @ctx: Crypto device context</div><div class='add'>+ */</div><div class='add'>+void cryp_save_device_context(struct cryp_device_data *device_data,</div><div class='add'>+			      struct cryp_device_context *ctx,</div><div class='add'>+			      int cryp_mode)</div><div class='add'>+{</div><div class='add'>+	enum cryp_algo_mode algomode;</div><div class='add'>+	struct cryp_register *src_reg = device_data-&gt;base;</div><div class='add'>+	struct cryp_config *config =</div><div class='add'>+		(struct cryp_config *)device_data-&gt;current_ctx;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Always start by disable the hardware and wait for it to finish the</div><div class='add'>+	 * ongoing calculations before trying to reprogram it.</div><div class='add'>+	 */</div><div class='add'>+	cryp_activity(device_data, CRYP_CRYPEN_DISABLE);</div><div class='add'>+	cryp_wait_until_done(device_data);</div><div class='add'>+</div><div class='add'>+	if (cryp_mode == CRYP_MODE_DMA)</div><div class='add'>+		cryp_configure_for_dma(device_data, CRYP_DMA_DISABLE_BOTH);</div><div class='add'>+</div><div class='add'>+	if (CRYP_TEST_BITS(&amp;src_reg-&gt;sr, CRYP_SR_IFEM_MASK) == 0)</div><div class='add'>+		ctx-&gt;din = readl_relaxed(&amp;src_reg-&gt;din);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;cr = readl_relaxed(&amp;src_reg-&gt;cr) &amp; CRYP_CR_CONTEXT_SAVE_MASK;</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;keysize) {</div><div class='add'>+	case CRYP_KEY_SIZE_256:</div><div class='add'>+		ctx-&gt;key_4_l = readl_relaxed(&amp;src_reg-&gt;key_4_l);</div><div class='add'>+		ctx-&gt;key_4_r = readl_relaxed(&amp;src_reg-&gt;key_4_r);</div><div class='add'>+</div><div class='add'>+	case CRYP_KEY_SIZE_192:</div><div class='add'>+		ctx-&gt;key_3_l = readl_relaxed(&amp;src_reg-&gt;key_3_l);</div><div class='add'>+		ctx-&gt;key_3_r = readl_relaxed(&amp;src_reg-&gt;key_3_r);</div><div class='add'>+</div><div class='add'>+	case CRYP_KEY_SIZE_128:</div><div class='add'>+		ctx-&gt;key_2_l = readl_relaxed(&amp;src_reg-&gt;key_2_l);</div><div class='add'>+		ctx-&gt;key_2_r = readl_relaxed(&amp;src_reg-&gt;key_2_r);</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		ctx-&gt;key_1_l = readl_relaxed(&amp;src_reg-&gt;key_1_l);</div><div class='add'>+		ctx-&gt;key_1_r = readl_relaxed(&amp;src_reg-&gt;key_1_r);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Save IV for CBC mode for both AES and DES. */</div><div class='add'>+	algomode = ((ctx-&gt;cr &amp; CRYP_CR_ALGOMODE_MASK) &gt;&gt; CRYP_CR_ALGOMODE_POS);</div><div class='add'>+	if (algomode == CRYP_ALGO_TDES_CBC ||</div><div class='add'>+	    algomode == CRYP_ALGO_DES_CBC ||</div><div class='add'>+	    algomode == CRYP_ALGO_AES_CBC) {</div><div class='add'>+		ctx-&gt;init_vect_0_l = readl_relaxed(&amp;src_reg-&gt;init_vect_0_l);</div><div class='add'>+		ctx-&gt;init_vect_0_r = readl_relaxed(&amp;src_reg-&gt;init_vect_0_r);</div><div class='add'>+		ctx-&gt;init_vect_1_l = readl_relaxed(&amp;src_reg-&gt;init_vect_1_l);</div><div class='add'>+		ctx-&gt;init_vect_1_r = readl_relaxed(&amp;src_reg-&gt;init_vect_1_r);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_restore_device_context -	Restore hardware registers and</div><div class='add'>+ *					other device context parameter</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ * @ctx: Crypto device context</div><div class='add'>+ */</div><div class='add'>+void cryp_restore_device_context(struct cryp_device_data *device_data,</div><div class='add'>+				 struct cryp_device_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct cryp_register *reg = device_data-&gt;base;</div><div class='add'>+	struct cryp_config *config =</div><div class='add'>+		(struct cryp_config *)device_data-&gt;current_ctx;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Fall through for all items in switch statement. DES is captured in</div><div class='add'>+	 * the default.</div><div class='add'>+	 */</div><div class='add'>+	switch (config-&gt;keysize) {</div><div class='add'>+	case CRYP_KEY_SIZE_256:</div><div class='add'>+		writel_relaxed(ctx-&gt;key_4_l, &amp;reg-&gt;key_4_l);</div><div class='add'>+		writel_relaxed(ctx-&gt;key_4_r, &amp;reg-&gt;key_4_r);</div><div class='add'>+</div><div class='add'>+	case CRYP_KEY_SIZE_192:</div><div class='add'>+		writel_relaxed(ctx-&gt;key_3_l, &amp;reg-&gt;key_3_l);</div><div class='add'>+		writel_relaxed(ctx-&gt;key_3_r, &amp;reg-&gt;key_3_r);</div><div class='add'>+</div><div class='add'>+	case CRYP_KEY_SIZE_128:</div><div class='add'>+		writel_relaxed(ctx-&gt;key_2_l, &amp;reg-&gt;key_2_l);</div><div class='add'>+		writel_relaxed(ctx-&gt;key_2_r, &amp;reg-&gt;key_2_r);</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		writel_relaxed(ctx-&gt;key_1_l, &amp;reg-&gt;key_1_l);</div><div class='add'>+		writel_relaxed(ctx-&gt;key_1_r, &amp;reg-&gt;key_1_r);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Restore IV for CBC mode for AES and DES. */</div><div class='add'>+	if (config-&gt;algomode == CRYP_ALGO_TDES_CBC ||</div><div class='add'>+	    config-&gt;algomode == CRYP_ALGO_DES_CBC ||</div><div class='add'>+	    config-&gt;algomode == CRYP_ALGO_AES_CBC) {</div><div class='add'>+		writel_relaxed(ctx-&gt;init_vect_0_l, &amp;reg-&gt;init_vect_0_l);</div><div class='add'>+		writel_relaxed(ctx-&gt;init_vect_0_r, &amp;reg-&gt;init_vect_0_r);</div><div class='add'>+		writel_relaxed(ctx-&gt;init_vect_1_l, &amp;reg-&gt;init_vect_1_l);</div><div class='add'>+		writel_relaxed(ctx-&gt;init_vect_1_r, &amp;reg-&gt;init_vect_1_r);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/crypto/ux500/cryp/cryp.h b/drivers/crypto/ux500/cryp/cryp.h<br/>new file mode 100644<br/>index 000000000000..14cfd05b777a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/cryp/cryp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp.h</a></div><div class='hunk'>@@ -0,0 +1,308 @@</div><div class='add'>+/**</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+ * Author: Shujuan Chen &lt;shujuan.chen@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Jonas Linde &lt;jonas.linde@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Joakim Bech &lt;joakim.xx.bech@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Berne Hebark &lt;berne.herbark@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Niklas Hernaeus &lt;niklas.hernaeus@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * License terms: GNU General Public License (GPL) version 2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _CRYP_H_</div><div class='add'>+#define _CRYP_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/dmaengine.h&gt;</div><div class='add'>+#include &lt;linux/klist.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+</div><div class='add'>+#define DEV_DBG_NAME "crypX crypX:"</div><div class='add'>+</div><div class='add'>+/* CRYP enable/disable */</div><div class='add'>+enum cryp_crypen {</div><div class='add'>+	CRYP_CRYPEN_DISABLE = 0,</div><div class='add'>+	CRYP_CRYPEN_ENABLE = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CRYP Start Computation enable/disable */</div><div class='add'>+enum cryp_start {</div><div class='add'>+	CRYP_START_DISABLE = 0,</div><div class='add'>+	CRYP_START_ENABLE = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CRYP Init Signal enable/disable */</div><div class='add'>+enum cryp_init {</div><div class='add'>+	CRYP_INIT_DISABLE = 0,</div><div class='add'>+	CRYP_INIT_ENABLE = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Cryp State enable/disable */</div><div class='add'>+enum cryp_state {</div><div class='add'>+	CRYP_STATE_DISABLE = 0,</div><div class='add'>+	CRYP_STATE_ENABLE = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Key preparation bit enable */</div><div class='add'>+enum cryp_key_prep {</div><div class='add'>+	KSE_DISABLED = 0,</div><div class='add'>+	KSE_ENABLED = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Key size for AES */</div><div class='add'>+#define	CRYP_KEY_SIZE_128 (0)</div><div class='add'>+#define	CRYP_KEY_SIZE_192 (1)</div><div class='add'>+#define	CRYP_KEY_SIZE_256 (2)</div><div class='add'>+</div><div class='add'>+/* AES modes */</div><div class='add'>+enum cryp_algo_mode {</div><div class='add'>+	CRYP_ALGO_TDES_ECB,</div><div class='add'>+	CRYP_ALGO_TDES_CBC,</div><div class='add'>+	CRYP_ALGO_DES_ECB,</div><div class='add'>+	CRYP_ALGO_DES_CBC,</div><div class='add'>+	CRYP_ALGO_AES_ECB,</div><div class='add'>+	CRYP_ALGO_AES_CBC,</div><div class='add'>+	CRYP_ALGO_AES_CTR,</div><div class='add'>+	CRYP_ALGO_AES_XTS</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Cryp Encryption or Decryption */</div><div class='add'>+enum cryp_algorithm_dir {</div><div class='add'>+	CRYP_ALGORITHM_ENCRYPT,</div><div class='add'>+	CRYP_ALGORITHM_DECRYPT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Hardware access method */</div><div class='add'>+enum cryp_mode {</div><div class='add'>+	CRYP_MODE_POLLING,</div><div class='add'>+	CRYP_MODE_INTERRUPT,</div><div class='add'>+	CRYP_MODE_DMA</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct cryp_config -</div><div class='add'>+ * @keysize: Key size for AES</div><div class='add'>+ * @algomode: AES modes</div><div class='add'>+ * @algodir: Cryp Encryption or Decryption</div><div class='add'>+ *</div><div class='add'>+ * CRYP configuration structure to be passed to set configuration</div><div class='add'>+ */</div><div class='add'>+struct cryp_config {</div><div class='add'>+	int keysize;</div><div class='add'>+	enum cryp_algo_mode algomode;</div><div class='add'>+	enum cryp_algorithm_dir algodir;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct cryp_protection_config -</div><div class='add'>+ * @privilege_access: Privileged cryp state enable/disable</div><div class='add'>+ * @secure_access: Secure cryp state enable/disable</div><div class='add'>+ *</div><div class='add'>+ * Protection configuration structure for setting privilage access</div><div class='add'>+ */</div><div class='add'>+struct cryp_protection_config {</div><div class='add'>+	enum cryp_state privilege_access;</div><div class='add'>+	enum cryp_state secure_access;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Cryp status */</div><div class='add'>+enum cryp_status_id {</div><div class='add'>+	CRYP_STATUS_BUSY = 0x10,</div><div class='add'>+	CRYP_STATUS_OUTPUT_FIFO_FULL = 0x08,</div><div class='add'>+	CRYP_STATUS_OUTPUT_FIFO_NOT_EMPTY = 0x04,</div><div class='add'>+	CRYP_STATUS_INPUT_FIFO_NOT_FULL = 0x02,</div><div class='add'>+	CRYP_STATUS_INPUT_FIFO_EMPTY = 0x01</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Cryp DMA interface */</div><div class='add'>+enum cryp_dma_req_type {</div><div class='add'>+	CRYP_DMA_DISABLE_BOTH,</div><div class='add'>+	CRYP_DMA_ENABLE_IN_DATA,</div><div class='add'>+	CRYP_DMA_ENABLE_OUT_DATA,</div><div class='add'>+	CRYP_DMA_ENABLE_BOTH_DIRECTIONS</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum cryp_dma_channel {</div><div class='add'>+	CRYP_DMA_RX = 0,</div><div class='add'>+	CRYP_DMA_TX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Key registers */</div><div class='add'>+enum cryp_key_reg_index {</div><div class='add'>+	CRYP_KEY_REG_1,</div><div class='add'>+	CRYP_KEY_REG_2,</div><div class='add'>+	CRYP_KEY_REG_3,</div><div class='add'>+	CRYP_KEY_REG_4</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Key register left and right */</div><div class='add'>+struct cryp_key_value {</div><div class='add'>+	u32 key_value_left;</div><div class='add'>+	u32 key_value_right;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Cryp Initialization structure */</div><div class='add'>+enum cryp_init_vector_index {</div><div class='add'>+	CRYP_INIT_VECTOR_INDEX_0,</div><div class='add'>+	CRYP_INIT_VECTOR_INDEX_1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* struct cryp_init_vector_value -</div><div class='add'>+ * @init_value_left</div><div class='add'>+ * @init_value_right</div><div class='add'>+ * */</div><div class='add'>+struct cryp_init_vector_value {</div><div class='add'>+	u32 init_value_left;</div><div class='add'>+	u32 init_value_right;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct cryp_device_context - structure for a cryp context.</div><div class='add'>+ * @cr: control register</div><div class='add'>+ * @dmacr: DMA control register</div><div class='add'>+ * @imsc: Interrupt mask set/clear register</div><div class='add'>+ * @key_1_l: Key 1l register</div><div class='add'>+ * @key_1_r: Key 1r register</div><div class='add'>+ * @key_2_l: Key 2l register</div><div class='add'>+ * @key_2_r: Key 2r register</div><div class='add'>+ * @key_3_l: Key 3l register</div><div class='add'>+ * @key_3_r: Key 3r register</div><div class='add'>+ * @key_4_l: Key 4l register</div><div class='add'>+ * @key_4_r: Key 4r register</div><div class='add'>+ * @init_vect_0_l: Initialization vector 0l register</div><div class='add'>+ * @init_vect_0_r: Initialization vector 0r register</div><div class='add'>+ * @init_vect_1_l: Initialization vector 1l register</div><div class='add'>+ * @init_vect_1_r: Initialization vector 0r register</div><div class='add'>+ * @din: Data in register</div><div class='add'>+ * @dout: Data out register</div><div class='add'>+ *</div><div class='add'>+ * CRYP power management specifc structure.</div><div class='add'>+ */</div><div class='add'>+struct cryp_device_context {</div><div class='add'>+	u32 cr;</div><div class='add'>+	u32 dmacr;</div><div class='add'>+	u32 imsc;</div><div class='add'>+</div><div class='add'>+	u32 key_1_l;</div><div class='add'>+	u32 key_1_r;</div><div class='add'>+	u32 key_2_l;</div><div class='add'>+	u32 key_2_r;</div><div class='add'>+	u32 key_3_l;</div><div class='add'>+	u32 key_3_r;</div><div class='add'>+	u32 key_4_l;</div><div class='add'>+	u32 key_4_r;</div><div class='add'>+</div><div class='add'>+	u32 init_vect_0_l;</div><div class='add'>+	u32 init_vect_0_r;</div><div class='add'>+	u32 init_vect_1_l;</div><div class='add'>+	u32 init_vect_1_r;</div><div class='add'>+</div><div class='add'>+	u32 din;</div><div class='add'>+	u32 dout;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cryp_dma {</div><div class='add'>+	dma_cap_mask_t mask;</div><div class='add'>+	struct completion cryp_dma_complete;</div><div class='add'>+	struct dma_chan *chan_cryp2mem;</div><div class='add'>+	struct dma_chan *chan_mem2cryp;</div><div class='add'>+	struct stedma40_chan_cfg *cfg_cryp2mem;</div><div class='add'>+	struct stedma40_chan_cfg *cfg_mem2cryp;</div><div class='add'>+	int sg_src_len;</div><div class='add'>+	int sg_dst_len;</div><div class='add'>+	struct scatterlist *sg_src;</div><div class='add'>+	struct scatterlist *sg_dst;</div><div class='add'>+	int nents_src;</div><div class='add'>+	int nents_dst;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct cryp_device_data - structure for a cryp device.</div><div class='add'>+ * @base: Pointer to the hardware base address.</div><div class='add'>+ * @dev: Pointer to the devices dev structure.</div><div class='add'>+ * @clk: Pointer to the device's clock control.</div><div class='add'>+ * @pwr_regulator: Pointer to the device's power control.</div><div class='add'>+ * @power_status: Current status of the power.</div><div class='add'>+ * @ctx_lock: Lock for current_ctx.</div><div class='add'>+ * @current_ctx: Pointer to the currently allocated context.</div><div class='add'>+ * @list_node: For inclusion into a klist.</div><div class='add'>+ * @dma: The dma structure holding channel configuration.</div><div class='add'>+ * @power_state: TRUE = power state on, FALSE = power state off.</div><div class='add'>+ * @power_state_spinlock: Spinlock for power_state.</div><div class='add'>+ * @restore_dev_ctx: TRUE = saved ctx, FALSE = no saved ctx.</div><div class='add'>+ */</div><div class='add'>+struct cryp_device_data {</div><div class='add'>+	struct cryp_register __iomem *base;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct regulator *pwr_regulator;</div><div class='add'>+	int power_status;</div><div class='add'>+	struct spinlock ctx_lock;</div><div class='add'>+	struct cryp_ctx *current_ctx;</div><div class='add'>+	struct klist_node list_node;</div><div class='add'>+	struct cryp_dma dma;</div><div class='add'>+	bool power_state;</div><div class='add'>+	struct spinlock power_state_spinlock;</div><div class='add'>+	bool restore_dev_ctx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void cryp_wait_until_done(struct cryp_device_data *device_data);</div><div class='add'>+</div><div class='add'>+/* Initialization functions */</div><div class='add'>+</div><div class='add'>+int cryp_check(struct cryp_device_data *device_data);</div><div class='add'>+</div><div class='add'>+void cryp_activity(struct cryp_device_data *device_data,</div><div class='add'>+		   enum cryp_crypen cryp_crypen);</div><div class='add'>+</div><div class='add'>+void cryp_flush_inoutfifo(struct cryp_device_data *device_data);</div><div class='add'>+</div><div class='add'>+int cryp_set_configuration(struct cryp_device_data *device_data,</div><div class='add'>+			   struct cryp_config *cryp_config,</div><div class='add'>+			   u32 *control_register);</div><div class='add'>+</div><div class='add'>+void cryp_configure_for_dma(struct cryp_device_data *device_data,</div><div class='add'>+			    enum cryp_dma_req_type dma_req);</div><div class='add'>+</div><div class='add'>+int cryp_configure_key_values(struct cryp_device_data *device_data,</div><div class='add'>+			      enum cryp_key_reg_index key_reg_index,</div><div class='add'>+			      struct cryp_key_value key_value);</div><div class='add'>+</div><div class='add'>+int cryp_configure_init_vector(struct cryp_device_data *device_data,</div><div class='add'>+			       enum cryp_init_vector_index</div><div class='add'>+			       init_vector_index,</div><div class='add'>+			       struct cryp_init_vector_value</div><div class='add'>+			       init_vector_value);</div><div class='add'>+</div><div class='add'>+int cryp_configure_protection(struct cryp_device_data *device_data,</div><div class='add'>+			      struct cryp_protection_config *p_protect_config);</div><div class='add'>+</div><div class='add'>+/* Power management funtions */</div><div class='add'>+void cryp_save_device_context(struct cryp_device_data *device_data,</div><div class='add'>+			      struct cryp_device_context *ctx,</div><div class='add'>+			      int cryp_mode);</div><div class='add'>+</div><div class='add'>+void cryp_restore_device_context(struct cryp_device_data *device_data,</div><div class='add'>+				 struct cryp_device_context *ctx);</div><div class='add'>+</div><div class='add'>+/* Data transfer and status bits. */</div><div class='add'>+int cryp_is_logic_busy(struct cryp_device_data *device_data);</div><div class='add'>+</div><div class='add'>+int cryp_get_status(struct cryp_device_data *device_data);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_write_indata - This routine writes 32 bit data into the data input</div><div class='add'>+ *		       register of the cryptography IP.</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ * @write_data: Data to write.</div><div class='add'>+ */</div><div class='add'>+int cryp_write_indata(struct cryp_device_data *device_data, u32 write_data);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_read_outdata - This routine reads the data from the data output</div><div class='add'>+ *		       register of the CRYP logic</div><div class='add'>+ * @device_data: Pointer to the device data struct for base address.</div><div class='add'>+ * @read_data: Read the data from the output FIFO.</div><div class='add'>+ */</div><div class='add'>+int cryp_read_outdata(struct cryp_device_data *device_data, u32 *read_data);</div><div class='add'>+</div><div class='add'>+#endif /* _CRYP_H_ */</div><div class='head'>diff --git a/drivers/crypto/ux500/cryp/cryp_core.c b/drivers/crypto/ux500/cryp/cryp_core.c<br/>new file mode 100644<br/>index 000000000000..7cac12793a4b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/cryp/cryp_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp_core.c</a></div><div class='hunk'>@@ -0,0 +1,1784 @@</div><div class='add'>+/**</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+ * Author: Shujuan Chen &lt;shujuan.chen@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Joakim Bech &lt;joakim.xx.bech@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Berne Hebark &lt;berne.herbark@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Niklas Hernaeus &lt;niklas.hernaeus@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Jonas Linde &lt;jonas.linde@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Andreas Westin &lt;andreas.westin@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * License terms: GNU General Public License (GPL) version 2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/dmaengine.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/irqreturn.h&gt;</div><div class='add'>+#include &lt;linux/klist.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;linux/semaphore.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;crypto/ctr.h&gt;</div><div class='add'>+#include &lt;crypto/des.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;plat/ste_dma40.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/crypto-ux500.h&gt;</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+</div><div class='add'>+#include "cryp_p.h"</div><div class='add'>+#include "cryp.h"</div><div class='add'>+</div><div class='add'>+#define CRYP_MAX_KEY_SIZE	32</div><div class='add'>+#define BYTES_PER_WORD		4</div><div class='add'>+</div><div class='add'>+static int cryp_mode;</div><div class='add'>+static atomic_t session_id;</div><div class='add'>+</div><div class='add'>+static struct stedma40_chan_cfg *mem_to_engine;</div><div class='add'>+static struct stedma40_chan_cfg *engine_to_mem;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct cryp_driver_data - data specific to the driver.</div><div class='add'>+ *</div><div class='add'>+ * @device_list: A list of registered devices to choose from.</div><div class='add'>+ * @device_allocation: A semaphore initialized with number of devices.</div><div class='add'>+ */</div><div class='add'>+struct cryp_driver_data {</div><div class='add'>+	struct klist device_list;</div><div class='add'>+	struct semaphore device_allocation;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct cryp_ctx - Crypto context</div><div class='add'>+ * @config: Crypto mode.</div><div class='add'>+ * @key[CRYP_MAX_KEY_SIZE]: Key.</div><div class='add'>+ * @keylen: Length of key.</div><div class='add'>+ * @iv: Pointer to initialization vector.</div><div class='add'>+ * @indata: Pointer to indata.</div><div class='add'>+ * @outdata: Pointer to outdata.</div><div class='add'>+ * @datalen: Length of indata.</div><div class='add'>+ * @outlen: Length of outdata.</div><div class='add'>+ * @blocksize: Size of blocks.</div><div class='add'>+ * @updated: Updated flag.</div><div class='add'>+ * @dev_ctx: Device dependent context.</div><div class='add'>+ * @device: Pointer to the device.</div><div class='add'>+ */</div><div class='add'>+struct cryp_ctx {</div><div class='add'>+	struct cryp_config config;</div><div class='add'>+	u8 key[CRYP_MAX_KEY_SIZE];</div><div class='add'>+	u32 keylen;</div><div class='add'>+	u8 *iv;</div><div class='add'>+	const u8 *indata;</div><div class='add'>+	u8 *outdata;</div><div class='add'>+	u32 datalen;</div><div class='add'>+	u32 outlen;</div><div class='add'>+	u32 blocksize;</div><div class='add'>+	u8 updated;</div><div class='add'>+	struct cryp_device_context dev_ctx;</div><div class='add'>+	struct cryp_device_data *device;</div><div class='add'>+	u32 session_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct cryp_driver_data driver_data;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * uint8p_to_uint32_be - 4*uint8 to uint32 big endian</div><div class='add'>+ * @in: Data to convert.</div><div class='add'>+ */</div><div class='add'>+static inline u32 uint8p_to_uint32_be(u8 *in)</div><div class='add'>+{</div><div class='add'>+	u32 *data = (u32 *)in;</div><div class='add'>+</div><div class='add'>+	return cpu_to_be32p(data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * swap_bits_in_byte - mirror the bits in a byte</div><div class='add'>+ * @b: the byte to be mirrored</div><div class='add'>+ *</div><div class='add'>+ * The bits are swapped the following way:</div><div class='add'>+ *  Byte b include bits 0-7, nibble 1 (n1) include bits 0-3 and</div><div class='add'>+ *  nibble 2 (n2) bits 4-7.</div><div class='add'>+ *</div><div class='add'>+ *  Nibble 1 (n1):</div><div class='add'>+ *  (The "old" (moved) bit is replaced with a zero)</div><div class='add'>+ *  1. Move bit 6 and 7, 4 positions to the left.</div><div class='add'>+ *  2. Move bit 3 and 5, 2 positions to the left.</div><div class='add'>+ *  3. Move bit 1-4, 1 position to the left.</div><div class='add'>+ *</div><div class='add'>+ *  Nibble 2 (n2):</div><div class='add'>+ *  1. Move bit 0 and 1, 4 positions to the right.</div><div class='add'>+ *  2. Move bit 2 and 4, 2 positions to the right.</div><div class='add'>+ *  3. Move bit 3-6, 1 position to the right.</div><div class='add'>+ *</div><div class='add'>+ *  Combine the two nibbles to a complete and swapped byte.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static inline u8 swap_bits_in_byte(u8 b)</div><div class='add'>+{</div><div class='add'>+#define R_SHIFT_4_MASK  0xc0 /* Bits 6 and 7, right shift 4 */</div><div class='add'>+#define R_SHIFT_2_MASK  0x28 /* (After right shift 4) Bits 3 and 5,</div><div class='add'>+				  right shift 2 */</div><div class='add'>+#define R_SHIFT_1_MASK  0x1e /* (After right shift 2) Bits 1-4,</div><div class='add'>+				  right shift 1 */</div><div class='add'>+#define L_SHIFT_4_MASK  0x03 /* Bits 0 and 1, left shift 4 */</div><div class='add'>+#define L_SHIFT_2_MASK  0x14 /* (After left shift 4) Bits 2 and 4,</div><div class='add'>+				  left shift 2 */</div><div class='add'>+#define L_SHIFT_1_MASK  0x78 /* (After left shift 1) Bits 3-6,</div><div class='add'>+				  left shift 1 */</div><div class='add'>+</div><div class='add'>+	u8 n1;</div><div class='add'>+	u8 n2;</div><div class='add'>+</div><div class='add'>+	/* Swap most significant nibble */</div><div class='add'>+	/* Right shift 4, bits 6 and 7 */</div><div class='add'>+	n1 = ((b  &amp; R_SHIFT_4_MASK) &gt;&gt; 4) | (b  &amp; ~(R_SHIFT_4_MASK &gt;&gt; 4));</div><div class='add'>+	/* Right shift 2, bits 3 and 5 */</div><div class='add'>+	n1 = ((n1 &amp; R_SHIFT_2_MASK) &gt;&gt; 2) | (n1 &amp; ~(R_SHIFT_2_MASK &gt;&gt; 2));</div><div class='add'>+	/* Right shift 1, bits 1-4 */</div><div class='add'>+	n1 = (n1  &amp; R_SHIFT_1_MASK) &gt;&gt; 1;</div><div class='add'>+</div><div class='add'>+	/* Swap least significant nibble */</div><div class='add'>+	/* Left shift 4, bits 0 and 1 */</div><div class='add'>+	n2 = ((b  &amp; L_SHIFT_4_MASK) &lt;&lt; 4) | (b  &amp; ~(L_SHIFT_4_MASK &lt;&lt; 4));</div><div class='add'>+	/* Left shift 2, bits 2 and 4 */</div><div class='add'>+	n2 = ((n2 &amp; L_SHIFT_2_MASK) &lt;&lt; 2) | (n2 &amp; ~(L_SHIFT_2_MASK &lt;&lt; 2));</div><div class='add'>+	/* Left shift 1, bits 3-6 */</div><div class='add'>+	n2 = (n2  &amp; L_SHIFT_1_MASK) &lt;&lt; 1;</div><div class='add'>+</div><div class='add'>+	return n1 | n2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void swap_words_in_key_and_bits_in_byte(const u8 *in,</div><div class='add'>+						      u8 *out, u32 len)</div><div class='add'>+{</div><div class='add'>+	unsigned int i = 0;</div><div class='add'>+	int j;</div><div class='add'>+	int index = 0;</div><div class='add'>+</div><div class='add'>+	j = len - BYTES_PER_WORD;</div><div class='add'>+	while (j &gt;= 0) {</div><div class='add'>+		for (i = 0; i &lt; BYTES_PER_WORD; i++) {</div><div class='add'>+			index = len - j - BYTES_PER_WORD + i;</div><div class='add'>+			out[j + i] =</div><div class='add'>+				swap_bits_in_byte(in[index]);</div><div class='add'>+		}</div><div class='add'>+		j -= BYTES_PER_WORD;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void add_session_id(struct cryp_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * We never want 0 to be a valid value, since this is the default value</div><div class='add'>+	 * for the software context.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(atomic_inc_and_test(&amp;session_id)))</div><div class='add'>+		atomic_inc(&amp;session_id);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;session_id = atomic_read(&amp;session_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t cryp_interrupt_handler(int irq, void *param)</div><div class='add'>+{</div><div class='add'>+	struct cryp_ctx *ctx;</div><div class='add'>+	int i;</div><div class='add'>+	struct cryp_device_data *device_data;</div><div class='add'>+</div><div class='add'>+	if (param == NULL) {</div><div class='add'>+		BUG_ON(!param);</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The device is coming from the one found in hw_crypt_noxts. */</div><div class='add'>+	device_data = (struct cryp_device_data *)param;</div><div class='add'>+</div><div class='add'>+	ctx = device_data-&gt;current_ctx;</div><div class='add'>+</div><div class='add'>+	if (ctx == NULL) {</div><div class='add'>+		BUG_ON(!ctx);</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(ctx-&gt;device-&gt;dev, "[%s] (len: %d) %s, ", __func__, ctx-&gt;outlen,</div><div class='add'>+		cryp_pending_irq_src(device_data, CRYP_IRQ_SRC_OUTPUT_FIFO) ?</div><div class='add'>+		"out" : "in");</div><div class='add'>+</div><div class='add'>+	if (cryp_pending_irq_src(device_data,</div><div class='add'>+				 CRYP_IRQ_SRC_OUTPUT_FIFO)) {</div><div class='add'>+		if (ctx-&gt;outlen / ctx-&gt;blocksize &gt; 0) {</div><div class='add'>+			for (i = 0; i &lt; ctx-&gt;blocksize / 4; i++) {</div><div class='add'>+				*(ctx-&gt;outdata) = readl_relaxed(</div><div class='add'>+						&amp;device_data-&gt;base-&gt;dout);</div><div class='add'>+				ctx-&gt;outdata += 4;</div><div class='add'>+				ctx-&gt;outlen -= 4;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (ctx-&gt;outlen == 0) {</div><div class='add'>+				cryp_disable_irq_src(device_data,</div><div class='add'>+						     CRYP_IRQ_SRC_OUTPUT_FIFO);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else if (cryp_pending_irq_src(device_data,</div><div class='add'>+					CRYP_IRQ_SRC_INPUT_FIFO)) {</div><div class='add'>+		if (ctx-&gt;datalen / ctx-&gt;blocksize &gt; 0) {</div><div class='add'>+			for (i = 0 ; i &lt; ctx-&gt;blocksize / 4; i++) {</div><div class='add'>+				writel_relaxed(ctx-&gt;indata,</div><div class='add'>+						&amp;device_data-&gt;base-&gt;din);</div><div class='add'>+				ctx-&gt;indata += 4;</div><div class='add'>+				ctx-&gt;datalen -= 4;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (ctx-&gt;datalen == 0)</div><div class='add'>+				cryp_disable_irq_src(device_data,</div><div class='add'>+						   CRYP_IRQ_SRC_INPUT_FIFO);</div><div class='add'>+</div><div class='add'>+			if (ctx-&gt;config.algomode == CRYP_ALGO_AES_XTS) {</div><div class='add'>+				CRYP_PUT_BITS(&amp;device_data-&gt;base-&gt;cr,</div><div class='add'>+					      CRYP_START_ENABLE,</div><div class='add'>+					      CRYP_CR_START_POS,</div><div class='add'>+					      CRYP_CR_START_MASK);</div><div class='add'>+</div><div class='add'>+				cryp_wait_until_done(device_data);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mode_is_aes(enum cryp_algo_mode mode)</div><div class='add'>+{</div><div class='add'>+	return	CRYP_ALGO_AES_ECB == mode ||</div><div class='add'>+		CRYP_ALGO_AES_CBC == mode ||</div><div class='add'>+		CRYP_ALGO_AES_CTR == mode ||</div><div class='add'>+		CRYP_ALGO_AES_XTS == mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cfg_iv(struct cryp_device_data *device_data, u32 left, u32 right,</div><div class='add'>+		  enum cryp_init_vector_index index)</div><div class='add'>+{</div><div class='add'>+	struct cryp_init_vector_value vector_value;</div><div class='add'>+</div><div class='add'>+	dev_dbg(device_data-&gt;dev, "[%s]", __func__);</div><div class='add'>+</div><div class='add'>+	vector_value.init_value_left = left;</div><div class='add'>+	vector_value.init_value_right = right;</div><div class='add'>+</div><div class='add'>+	return cryp_configure_init_vector(device_data,</div><div class='add'>+					  index,</div><div class='add'>+					  vector_value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cfg_ivs(struct cryp_device_data *device_data, struct cryp_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int status = 0;</div><div class='add'>+	int num_of_regs = ctx-&gt;blocksize / 8;</div><div class='add'>+	u32 iv[AES_BLOCK_SIZE / 4];</div><div class='add'>+</div><div class='add'>+	dev_dbg(device_data-&gt;dev, "[%s]", __func__);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Since we loop on num_of_regs we need to have a check in case</div><div class='add'>+	 * someone provides an incorrect blocksize which would force calling</div><div class='add'>+	 * cfg_iv with i greater than 2 which is an error.</div><div class='add'>+	 */</div><div class='add'>+	if (num_of_regs &gt; 2) {</div><div class='add'>+		dev_err(device_data-&gt;dev, "[%s] Incorrect blocksize %d",</div><div class='add'>+			__func__, ctx-&gt;blocksize);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ctx-&gt;blocksize / 4; i++)</div><div class='add'>+		iv[i] = uint8p_to_uint32_be(ctx-&gt;iv + i*4);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_of_regs; i++) {</div><div class='add'>+		status = cfg_iv(device_data, iv[i*2], iv[i*2+1],</div><div class='add'>+				(enum cryp_init_vector_index) i);</div><div class='add'>+		if (status != 0)</div><div class='add'>+			return status;</div><div class='add'>+	}</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_key(struct cryp_device_data *device_data,</div><div class='add'>+		   u32 left_key,</div><div class='add'>+		   u32 right_key,</div><div class='add'>+		   enum cryp_key_reg_index index)</div><div class='add'>+{</div><div class='add'>+	struct cryp_key_value key_value;</div><div class='add'>+	int cryp_error;</div><div class='add'>+</div><div class='add'>+	dev_dbg(device_data-&gt;dev, "[%s]", __func__);</div><div class='add'>+</div><div class='add'>+	key_value.key_value_left = left_key;</div><div class='add'>+	key_value.key_value_right = right_key;</div><div class='add'>+</div><div class='add'>+	cryp_error = cryp_configure_key_values(device_data,</div><div class='add'>+					       index,</div><div class='add'>+					       key_value);</div><div class='add'>+	if (cryp_error != 0)</div><div class='add'>+		dev_err(device_data-&gt;dev, "[%s]: "</div><div class='add'>+			"cryp_configure_key_values() failed!", __func__);</div><div class='add'>+</div><div class='add'>+	return cryp_error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cfg_keys(struct cryp_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int num_of_regs = ctx-&gt;keylen / 8;</div><div class='add'>+	u32 swapped_key[CRYP_MAX_KEY_SIZE / 4];</div><div class='add'>+	int cryp_error = 0;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ctx-&gt;device-&gt;dev, "[%s]", __func__);</div><div class='add'>+</div><div class='add'>+	if (mode_is_aes(ctx-&gt;config.algomode)) {</div><div class='add'>+		swap_words_in_key_and_bits_in_byte((u8 *)ctx-&gt;key,</div><div class='add'>+						   (u8 *)swapped_key,</div><div class='add'>+						   ctx-&gt;keylen);</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; ctx-&gt;keylen / 4; i++)</div><div class='add'>+			swapped_key[i] = uint8p_to_uint32_be(ctx-&gt;key + i*4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_of_regs; i++) {</div><div class='add'>+		cryp_error = set_key(ctx-&gt;device,</div><div class='add'>+				     *(((u32 *)swapped_key)+i*2),</div><div class='add'>+				     *(((u32 *)swapped_key)+i*2+1),</div><div class='add'>+				     (enum cryp_key_reg_index) i);</div><div class='add'>+</div><div class='add'>+		if (cryp_error != 0) {</div><div class='add'>+			dev_err(ctx-&gt;device-&gt;dev, "[%s]: set_key() failed!",</div><div class='add'>+					__func__);</div><div class='add'>+			return cryp_error;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return cryp_error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cryp_setup_context(struct cryp_ctx *ctx,</div><div class='add'>+			      struct cryp_device_data *device_data)</div><div class='add'>+{</div><div class='add'>+	u32 control_register = CRYP_CR_DEFAULT;</div><div class='add'>+</div><div class='add'>+	switch (cryp_mode) {</div><div class='add'>+	case CRYP_MODE_INTERRUPT:</div><div class='add'>+		writel_relaxed(CRYP_IMSC_DEFAULT, &amp;device_data-&gt;base-&gt;imsc);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CRYP_MODE_DMA:</div><div class='add'>+		writel_relaxed(CRYP_DMACR_DEFAULT, &amp;device_data-&gt;base-&gt;dmacr);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;updated == 0) {</div><div class='add'>+		cryp_flush_inoutfifo(device_data);</div><div class='add'>+		if (cfg_keys(ctx) != 0) {</div><div class='add'>+			dev_err(ctx-&gt;device-&gt;dev, "[%s]: cfg_keys failed!",</div><div class='add'>+				__func__);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ctx-&gt;iv &amp;&amp;</div><div class='add'>+		    CRYP_ALGO_AES_ECB != ctx-&gt;config.algomode &amp;&amp;</div><div class='add'>+		    CRYP_ALGO_DES_ECB != ctx-&gt;config.algomode &amp;&amp;</div><div class='add'>+		    CRYP_ALGO_TDES_ECB != ctx-&gt;config.algomode) {</div><div class='add'>+			if (cfg_ivs(device_data, ctx) != 0)</div><div class='add'>+				return -EPERM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cryp_set_configuration(device_data, &amp;ctx-&gt;config,</div><div class='add'>+				       &amp;control_register);</div><div class='add'>+		add_session_id(ctx);</div><div class='add'>+	} else if (ctx-&gt;updated == 1 &amp;&amp;</div><div class='add'>+		   ctx-&gt;session_id != atomic_read(&amp;session_id)) {</div><div class='add'>+		cryp_flush_inoutfifo(device_data);</div><div class='add'>+		cryp_restore_device_context(device_data, &amp;ctx-&gt;dev_ctx);</div><div class='add'>+</div><div class='add'>+		add_session_id(ctx);</div><div class='add'>+		control_register = ctx-&gt;dev_ctx.cr;</div><div class='add'>+	} else</div><div class='add'>+		control_register = ctx-&gt;dev_ctx.cr;</div><div class='add'>+</div><div class='add'>+	writel(control_register |</div><div class='add'>+	       (CRYP_CRYPEN_ENABLE &lt;&lt; CRYP_CR_CRYPEN_POS),</div><div class='add'>+	       &amp;device_data-&gt;base-&gt;cr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cryp_get_device_data(struct cryp_ctx *ctx,</div><div class='add'>+				struct cryp_device_data **device_data)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct klist_iter device_iterator;</div><div class='add'>+	struct klist_node *device_node;</div><div class='add'>+	struct cryp_device_data *local_device_data = NULL;</div><div class='add'>+	pr_debug(DEV_DBG_NAME " [%s]", __func__);</div><div class='add'>+</div><div class='add'>+	/* Wait until a device is available */</div><div class='add'>+	ret = down_interruptible(&amp;driver_data.device_allocation);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;  /* Interrupted */</div><div class='add'>+</div><div class='add'>+	/* Select a device */</div><div class='add'>+	klist_iter_init(&amp;driver_data.device_list, &amp;device_iterator);</div><div class='add'>+</div><div class='add'>+	device_node = klist_next(&amp;device_iterator);</div><div class='add'>+	while (device_node) {</div><div class='add'>+		local_device_data = container_of(device_node,</div><div class='add'>+					   struct cryp_device_data, list_node);</div><div class='add'>+		spin_lock(&amp;local_device_data-&gt;ctx_lock);</div><div class='add'>+		/* current_ctx allocates a device, NULL = unallocated */</div><div class='add'>+		if (local_device_data-&gt;current_ctx) {</div><div class='add'>+			device_node = klist_next(&amp;device_iterator);</div><div class='add'>+		} else {</div><div class='add'>+			local_device_data-&gt;current_ctx = ctx;</div><div class='add'>+			ctx-&gt;device = local_device_data;</div><div class='add'>+			spin_unlock(&amp;local_device_data-&gt;ctx_lock);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		spin_unlock(&amp;local_device_data-&gt;ctx_lock);</div><div class='add'>+	}</div><div class='add'>+	klist_iter_exit(&amp;device_iterator);</div><div class='add'>+</div><div class='add'>+	if (!device_node) {</div><div class='add'>+		/**</div><div class='add'>+		 * No free device found.</div><div class='add'>+		 * Since we allocated a device with down_interruptible, this</div><div class='add'>+		 * should not be able to happen.</div><div class='add'>+		 * Number of available devices, which are contained in</div><div class='add'>+		 * device_allocation, is therefore decremented by not doing</div><div class='add'>+		 * an up(device_allocation).</div><div class='add'>+		 */</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*device_data = local_device_data;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cryp_dma_setup_channel(struct cryp_device_data *device_data,</div><div class='add'>+				   struct device *dev)</div><div class='add'>+{</div><div class='add'>+	dma_cap_zero(device_data-&gt;dma.mask);</div><div class='add'>+	dma_cap_set(DMA_SLAVE, device_data-&gt;dma.mask);</div><div class='add'>+</div><div class='add'>+	device_data-&gt;dma.cfg_mem2cryp = mem_to_engine;</div><div class='add'>+	device_data-&gt;dma.chan_mem2cryp =</div><div class='add'>+		dma_request_channel(device_data-&gt;dma.mask,</div><div class='add'>+				    stedma40_filter,</div><div class='add'>+				    device_data-&gt;dma.cfg_mem2cryp);</div><div class='add'>+</div><div class='add'>+	device_data-&gt;dma.cfg_cryp2mem = engine_to_mem;</div><div class='add'>+	device_data-&gt;dma.chan_cryp2mem =</div><div class='add'>+		dma_request_channel(device_data-&gt;dma.mask,</div><div class='add'>+				    stedma40_filter,</div><div class='add'>+				    device_data-&gt;dma.cfg_cryp2mem);</div><div class='add'>+</div><div class='add'>+	init_completion(&amp;device_data-&gt;dma.cryp_dma_complete);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cryp_dma_out_callback(void *data)</div><div class='add'>+{</div><div class='add'>+	struct cryp_ctx *ctx = (struct cryp_ctx *) data;</div><div class='add'>+	dev_dbg(ctx-&gt;device-&gt;dev, "[%s]: ", __func__);</div><div class='add'>+</div><div class='add'>+	complete(&amp;ctx-&gt;device-&gt;dma.cryp_dma_complete);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cryp_set_dma_transfer(struct cryp_ctx *ctx,</div><div class='add'>+				 struct scatterlist *sg,</div><div class='add'>+				 int len,</div><div class='add'>+				 enum dma_data_direction direction)</div><div class='add'>+{</div><div class='add'>+	struct dma_async_tx_descriptor *desc;</div><div class='add'>+	struct dma_chan *channel = NULL;</div><div class='add'>+	dma_cookie_t cookie;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ctx-&gt;device-&gt;dev, "[%s]: ", __func__);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!IS_ALIGNED((u32)sg, 4))) {</div><div class='add'>+		dev_err(ctx-&gt;device-&gt;dev, "[%s]: Data in sg list isn't "</div><div class='add'>+			"aligned! Addr: 0x%08x", __func__, (u32)sg);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (direction) {</div><div class='add'>+	case DMA_TO_DEVICE:</div><div class='add'>+		channel = ctx-&gt;device-&gt;dma.chan_mem2cryp;</div><div class='add'>+		ctx-&gt;device-&gt;dma.sg_src = sg;</div><div class='add'>+		ctx-&gt;device-&gt;dma.sg_src_len = dma_map_sg(channel-&gt;device-&gt;dev,</div><div class='add'>+						 ctx-&gt;device-&gt;dma.sg_src,</div><div class='add'>+						 ctx-&gt;device-&gt;dma.nents_src,</div><div class='add'>+						 direction);</div><div class='add'>+</div><div class='add'>+		if (!ctx-&gt;device-&gt;dma.sg_src_len) {</div><div class='add'>+			dev_dbg(ctx-&gt;device-&gt;dev,</div><div class='add'>+				"[%s]: Could not map the sg list (TO_DEVICE)",</div><div class='add'>+				__func__);</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev_dbg(ctx-&gt;device-&gt;dev, "[%s]: Setting up DMA for buffer "</div><div class='add'>+			"(TO_DEVICE)", __func__);</div><div class='add'>+</div><div class='add'>+		desc = channel-&gt;device-&gt;device_prep_slave_sg(channel,</div><div class='add'>+					     ctx-&gt;device-&gt;dma.sg_src,</div><div class='add'>+					     ctx-&gt;device-&gt;dma.sg_src_len,</div><div class='add'>+					     direction, DMA_CTRL_ACK, NULL);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case DMA_FROM_DEVICE:</div><div class='add'>+		channel = ctx-&gt;device-&gt;dma.chan_cryp2mem;</div><div class='add'>+		ctx-&gt;device-&gt;dma.sg_dst = sg;</div><div class='add'>+		ctx-&gt;device-&gt;dma.sg_dst_len = dma_map_sg(channel-&gt;device-&gt;dev,</div><div class='add'>+						 ctx-&gt;device-&gt;dma.sg_dst,</div><div class='add'>+						 ctx-&gt;device-&gt;dma.nents_dst,</div><div class='add'>+						 direction);</div><div class='add'>+</div><div class='add'>+		if (!ctx-&gt;device-&gt;dma.sg_dst_len) {</div><div class='add'>+			dev_dbg(ctx-&gt;device-&gt;dev,</div><div class='add'>+				"[%s]: Could not map the sg list (FROM_DEVICE)",</div><div class='add'>+				__func__);</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev_dbg(ctx-&gt;device-&gt;dev, "[%s]: Setting up DMA for buffer "</div><div class='add'>+			"(FROM_DEVICE)", __func__);</div><div class='add'>+</div><div class='add'>+		desc = channel-&gt;device-&gt;device_prep_slave_sg(channel,</div><div class='add'>+					     ctx-&gt;device-&gt;dma.sg_dst,</div><div class='add'>+					     ctx-&gt;device-&gt;dma.sg_dst_len,</div><div class='add'>+					     direction,</div><div class='add'>+					     DMA_CTRL_ACK |</div><div class='add'>+					     DMA_PREP_INTERRUPT, NULL);</div><div class='add'>+</div><div class='add'>+		desc-&gt;callback = cryp_dma_out_callback;</div><div class='add'>+		desc-&gt;callback_param = ctx;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_dbg(ctx-&gt;device-&gt;dev, "[%s]: Invalid DMA direction",</div><div class='add'>+			__func__);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cookie = desc-&gt;tx_submit(desc);</div><div class='add'>+	dma_async_issue_pending(channel);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cryp_dma_done(struct cryp_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	struct dma_chan *chan;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ctx-&gt;device-&gt;dev, "[%s]: ", __func__);</div><div class='add'>+</div><div class='add'>+	chan = ctx-&gt;device-&gt;dma.chan_mem2cryp;</div><div class='add'>+	chan-&gt;device-&gt;device_control(chan, DMA_TERMINATE_ALL, 0);</div><div class='add'>+	dma_unmap_sg(chan-&gt;device-&gt;dev, ctx-&gt;device-&gt;dma.sg_src,</div><div class='add'>+		     ctx-&gt;device-&gt;dma.sg_src_len, DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+	chan = ctx-&gt;device-&gt;dma.chan_cryp2mem;</div><div class='add'>+	chan-&gt;device-&gt;device_control(chan, DMA_TERMINATE_ALL, 0);</div><div class='add'>+	dma_unmap_sg(chan-&gt;device-&gt;dev, ctx-&gt;device-&gt;dma.sg_dst,</div><div class='add'>+		     ctx-&gt;device-&gt;dma.sg_dst_len, DMA_FROM_DEVICE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cryp_dma_write(struct cryp_ctx *ctx, struct scatterlist *sg,</div><div class='add'>+			  int len)</div><div class='add'>+{</div><div class='add'>+	int error = cryp_set_dma_transfer(ctx, sg, len, DMA_TO_DEVICE);</div><div class='add'>+	dev_dbg(ctx-&gt;device-&gt;dev, "[%s]: ", __func__);</div><div class='add'>+</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_dbg(ctx-&gt;device-&gt;dev, "[%s]: cryp_set_dma_transfer() "</div><div class='add'>+			"failed", __func__);</div><div class='add'>+		return error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cryp_dma_read(struct cryp_ctx *ctx, struct scatterlist *sg, int len)</div><div class='add'>+{</div><div class='add'>+	int error = cryp_set_dma_transfer(ctx, sg, len, DMA_FROM_DEVICE);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_dbg(ctx-&gt;device-&gt;dev, "[%s]: cryp_set_dma_transfer() "</div><div class='add'>+			"failed", __func__);</div><div class='add'>+		return error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cryp_polling_mode(struct cryp_ctx *ctx,</div><div class='add'>+			      struct cryp_device_data *device_data)</div><div class='add'>+{</div><div class='add'>+	int len = ctx-&gt;blocksize / BYTES_PER_WORD;</div><div class='add'>+	int remaining_length = ctx-&gt;datalen;</div><div class='add'>+	u32 *indata = (u32 *)ctx-&gt;indata;</div><div class='add'>+	u32 *outdata = (u32 *)ctx-&gt;outdata;</div><div class='add'>+</div><div class='add'>+	while (remaining_length &gt; 0) {</div><div class='add'>+		writesl(&amp;device_data-&gt;base-&gt;din, indata, len);</div><div class='add'>+		indata += len;</div><div class='add'>+		remaining_length -= (len * BYTES_PER_WORD);</div><div class='add'>+		cryp_wait_until_done(device_data);</div><div class='add'>+</div><div class='add'>+		readsl(&amp;device_data-&gt;base-&gt;dout, outdata, len);</div><div class='add'>+		outdata += len;</div><div class='add'>+		cryp_wait_until_done(device_data);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cryp_disable_power(struct device *dev,</div><div class='add'>+			      struct cryp_device_data *device_data,</div><div class='add'>+			      bool save_device_context)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "[%s]", __func__);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;device_data-&gt;power_state_spinlock);</div><div class='add'>+	if (!device_data-&gt;power_state)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	if (save_device_context &amp;&amp; device_data-&gt;current_ctx) {</div><div class='add'>+		cryp_save_device_context(device_data,</div><div class='add'>+				&amp;device_data-&gt;current_ctx-&gt;dev_ctx,</div><div class='add'>+				cryp_mode);</div><div class='add'>+		device_data-&gt;restore_dev_ctx = true;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+</div><div class='add'>+	clk_disable(device_data-&gt;clk);</div><div class='add'>+	ret = regulator_disable(device_data-&gt;pwr_regulator);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev, "[%s]: "</div><div class='add'>+				"regulator_disable() failed!",</div><div class='add'>+				__func__);</div><div class='add'>+</div><div class='add'>+	device_data-&gt;power_state = false;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;power_state_spinlock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cryp_enable_power(</div><div class='add'>+		struct device *dev,</div><div class='add'>+		struct cryp_device_data *device_data,</div><div class='add'>+		bool restore_device_context)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "[%s]", __func__);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;device_data-&gt;power_state_spinlock);</div><div class='add'>+	if (!device_data-&gt;power_state) {</div><div class='add'>+		ret = regulator_enable(device_data-&gt;pwr_regulator);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "[%s]: regulator_enable() failed!",</div><div class='add'>+					__func__);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = clk_enable(device_data-&gt;clk);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "[%s]: clk_enable() failed!",</div><div class='add'>+					__func__);</div><div class='add'>+			regulator_disable(device_data-&gt;pwr_regulator);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		device_data-&gt;power_state = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (device_data-&gt;restore_dev_ctx) {</div><div class='add'>+		spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+		if (restore_device_context &amp;&amp; device_data-&gt;current_ctx) {</div><div class='add'>+			device_data-&gt;restore_dev_ctx = false;</div><div class='add'>+			cryp_restore_device_context(device_data,</div><div class='add'>+					&amp;device_data-&gt;current_ctx-&gt;dev_ctx);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;power_state_spinlock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_crypt_noxts(struct cryp_ctx *ctx,</div><div class='add'>+			  struct cryp_device_data *device_data)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	const u8 *indata = ctx-&gt;indata;</div><div class='add'>+	u8 *outdata = ctx-&gt;outdata;</div><div class='add'>+	u32 datalen = ctx-&gt;datalen;</div><div class='add'>+	u32 outlen = datalen;</div><div class='add'>+</div><div class='add'>+	pr_debug(DEV_DBG_NAME " [%s]", __func__);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;outlen = ctx-&gt;datalen;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!IS_ALIGNED((u32)indata, 4))) {</div><div class='add'>+		pr_debug(DEV_DBG_NAME " [%s]: Data isn't aligned! Addr: "</div><div class='add'>+			 "0x%08x", __func__, (u32)indata);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = cryp_setup_context(ctx, device_data);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (cryp_mode == CRYP_MODE_INTERRUPT) {</div><div class='add'>+		cryp_enable_irq_src(device_data, CRYP_IRQ_SRC_INPUT_FIFO |</div><div class='add'>+				    CRYP_IRQ_SRC_OUTPUT_FIFO);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * ctx-&gt;outlen is decremented in the cryp_interrupt_handler</div><div class='add'>+		 * function. We had to add cpu_relax() (barrier) to make sure</div><div class='add'>+		 * that gcc didn't optimze away this variable.</div><div class='add'>+		 */</div><div class='add'>+		while (ctx-&gt;outlen &gt; 0)</div><div class='add'>+			cpu_relax();</div><div class='add'>+	} else if (cryp_mode == CRYP_MODE_POLLING ||</div><div class='add'>+		   cryp_mode == CRYP_MODE_DMA) {</div><div class='add'>+		/*</div><div class='add'>+		 * The reason for having DMA in this if case is that if we are</div><div class='add'>+		 * running cryp_mode = 2, then we separate DMA routines for</div><div class='add'>+		 * handling cipher/plaintext &gt; blocksize, except when</div><div class='add'>+		 * running the normal CRYPTO_ALG_TYPE_CIPHER, then we still use</div><div class='add'>+		 * the polling mode. Overhead of doing DMA setup eats up the</div><div class='add'>+		 * benefits using it.</div><div class='add'>+		 */</div><div class='add'>+		cryp_polling_mode(ctx, device_data);</div><div class='add'>+	} else {</div><div class='add'>+		dev_err(ctx-&gt;device-&gt;dev, "[%s]: Invalid operation mode!",</div><div class='add'>+			__func__);</div><div class='add'>+		ret = -EPERM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cryp_save_device_context(device_data, &amp;ctx-&gt;dev_ctx, cryp_mode);</div><div class='add'>+	ctx-&gt;updated = 1;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	ctx-&gt;indata = indata;</div><div class='add'>+	ctx-&gt;outdata = outdata;</div><div class='add'>+	ctx-&gt;datalen = datalen;</div><div class='add'>+	ctx-&gt;outlen = outlen;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_nents(struct scatterlist *sg, int nbytes)</div><div class='add'>+{</div><div class='add'>+	int nents = 0;</div><div class='add'>+</div><div class='add'>+	while (nbytes &gt; 0) {</div><div class='add'>+		nbytes -= sg-&gt;length;</div><div class='add'>+		sg = scatterwalk_sg_next(sg);</div><div class='add'>+		nents++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return nents;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ablk_dma_crypt(struct ablkcipher_request *areq)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);</div><div class='add'>+	struct cryp_ctx *ctx = crypto_ablkcipher_ctx(cipher);</div><div class='add'>+	struct cryp_device_data *device_data;</div><div class='add'>+</div><div class='add'>+	int bytes_written = 0;</div><div class='add'>+	int bytes_read = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pr_debug(DEV_DBG_NAME " [%s]", __func__);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;datalen = areq-&gt;nbytes;</div><div class='add'>+	ctx-&gt;outlen = areq-&gt;nbytes;</div><div class='add'>+</div><div class='add'>+	ret = cryp_get_device_data(ctx, &amp;device_data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = cryp_setup_context(ctx, device_data);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* We have the device now, so store the nents in the dma struct. */</div><div class='add'>+	ctx-&gt;device-&gt;dma.nents_src = get_nents(areq-&gt;src, ctx-&gt;datalen);</div><div class='add'>+	ctx-&gt;device-&gt;dma.nents_dst = get_nents(areq-&gt;dst, ctx-&gt;outlen);</div><div class='add'>+</div><div class='add'>+	/* Enable DMA in- and output. */</div><div class='add'>+	cryp_configure_for_dma(device_data, CRYP_DMA_ENABLE_BOTH_DIRECTIONS);</div><div class='add'>+</div><div class='add'>+	bytes_written = cryp_dma_write(ctx, areq-&gt;src, ctx-&gt;datalen);</div><div class='add'>+	bytes_read = cryp_dma_read(ctx, areq-&gt;dst, bytes_written);</div><div class='add'>+</div><div class='add'>+	wait_for_completion(&amp;ctx-&gt;device-&gt;dma.cryp_dma_complete);</div><div class='add'>+	cryp_dma_done(ctx);</div><div class='add'>+</div><div class='add'>+	cryp_save_device_context(device_data, &amp;ctx-&gt;dev_ctx, cryp_mode);</div><div class='add'>+	ctx-&gt;updated = 1;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	device_data-&gt;current_ctx = NULL;</div><div class='add'>+	ctx-&gt;device = NULL;</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The down_interruptible part for this semaphore is called in</div><div class='add'>+	 * cryp_get_device_data.</div><div class='add'>+	 */</div><div class='add'>+	up(&amp;driver_data.device_allocation);</div><div class='add'>+</div><div class='add'>+	if (unlikely(bytes_written != bytes_read))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ablk_crypt(struct ablkcipher_request *areq)</div><div class='add'>+{</div><div class='add'>+	struct ablkcipher_walk walk;</div><div class='add'>+	struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);</div><div class='add'>+	struct cryp_ctx *ctx = crypto_ablkcipher_ctx(cipher);</div><div class='add'>+	struct cryp_device_data *device_data;</div><div class='add'>+	unsigned long src_paddr;</div><div class='add'>+	unsigned long dst_paddr;</div><div class='add'>+	int ret;</div><div class='add'>+	int nbytes;</div><div class='add'>+</div><div class='add'>+	pr_debug(DEV_DBG_NAME " [%s]", __func__);</div><div class='add'>+</div><div class='add'>+	ret = cryp_get_device_data(ctx, &amp;device_data);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ablkcipher_walk_init(&amp;walk, areq-&gt;dst, areq-&gt;src, areq-&gt;nbytes);</div><div class='add'>+	ret = ablkcipher_walk_phys(areq, &amp;walk);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err(DEV_DBG_NAME "[%s]: ablkcipher_walk_phys() failed!",</div><div class='add'>+			__func__);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while ((nbytes = walk.nbytes) &gt; 0) {</div><div class='add'>+		ctx-&gt;iv = walk.iv;</div><div class='add'>+		src_paddr = (page_to_phys(walk.src.page) + walk.src.offset);</div><div class='add'>+		ctx-&gt;indata = phys_to_virt(src_paddr);</div><div class='add'>+</div><div class='add'>+		dst_paddr = (page_to_phys(walk.dst.page) + walk.dst.offset);</div><div class='add'>+		ctx-&gt;outdata = phys_to_virt(dst_paddr);</div><div class='add'>+</div><div class='add'>+		ctx-&gt;datalen = nbytes - (nbytes % ctx-&gt;blocksize);</div><div class='add'>+</div><div class='add'>+		ret = hw_crypt_noxts(ctx, device_data);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		nbytes -= ctx-&gt;datalen;</div><div class='add'>+		ret = ablkcipher_walk_done(areq, &amp;walk, nbytes);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+	ablkcipher_walk_complete(&amp;walk);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	/* Release the device */</div><div class='add'>+	spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	device_data-&gt;current_ctx = NULL;</div><div class='add'>+	ctx-&gt;device = NULL;</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The down_interruptible part for this semaphore is called in</div><div class='add'>+	 * cryp_get_device_data.</div><div class='add'>+	 */</div><div class='add'>+	up(&amp;driver_data.device_allocation);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aes_ablkcipher_setkey(struct crypto_ablkcipher *cipher,</div><div class='add'>+				 const u8 *key, unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	struct cryp_ctx *ctx = crypto_ablkcipher_ctx(cipher);</div><div class='add'>+	u32 *flags = &amp;cipher-&gt;base.crt_flags;</div><div class='add'>+</div><div class='add'>+	pr_debug(DEV_DBG_NAME " [%s]", __func__);</div><div class='add'>+</div><div class='add'>+	switch (keylen) {</div><div class='add'>+	case AES_KEYSIZE_128:</div><div class='add'>+		ctx-&gt;config.keysize = CRYP_KEY_SIZE_128;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case AES_KEYSIZE_192:</div><div class='add'>+		ctx-&gt;config.keysize = CRYP_KEY_SIZE_192;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case AES_KEYSIZE_256:</div><div class='add'>+		ctx-&gt;config.keysize = CRYP_KEY_SIZE_256;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		pr_err(DEV_DBG_NAME "[%s]: Unknown keylen!", __func__);</div><div class='add'>+		*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(ctx-&gt;key, key, keylen);</div><div class='add'>+	ctx-&gt;keylen = keylen;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;updated = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int des_ablkcipher_setkey(struct crypto_ablkcipher *cipher,</div><div class='add'>+				 const u8 *key, unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	struct cryp_ctx *ctx = crypto_ablkcipher_ctx(cipher);</div><div class='add'>+	u32 *flags = &amp;cipher-&gt;base.crt_flags;</div><div class='add'>+	u32 tmp[DES_EXPKEY_WORDS];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pr_debug(DEV_DBG_NAME " [%s]", __func__);</div><div class='add'>+	if (keylen != DES_KEY_SIZE) {</div><div class='add'>+		*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;</div><div class='add'>+		pr_debug(DEV_DBG_NAME " [%s]: CRYPTO_TFM_RES_BAD_KEY_LEN",</div><div class='add'>+				__func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = des_ekey(tmp, key);</div><div class='add'>+	if (unlikely(ret == 0) &amp;&amp; (*flags &amp; CRYPTO_TFM_REQ_WEAK_KEY)) {</div><div class='add'>+		*flags |= CRYPTO_TFM_RES_WEAK_KEY;</div><div class='add'>+		pr_debug(DEV_DBG_NAME " [%s]: CRYPTO_TFM_REQ_WEAK_KEY",</div><div class='add'>+				__func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(ctx-&gt;key, key, keylen);</div><div class='add'>+	ctx-&gt;keylen = keylen;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;updated = 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int des3_ablkcipher_setkey(struct crypto_ablkcipher *cipher,</div><div class='add'>+				  const u8 *key, unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	struct cryp_ctx *ctx = crypto_ablkcipher_ctx(cipher);</div><div class='add'>+	u32 *flags = &amp;cipher-&gt;base.crt_flags;</div><div class='add'>+	const u32 *K = (const u32 *)key;</div><div class='add'>+	u32 tmp[DES3_EDE_EXPKEY_WORDS];</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	pr_debug(DEV_DBG_NAME " [%s]", __func__);</div><div class='add'>+	if (keylen != DES3_EDE_KEY_SIZE) {</div><div class='add'>+		*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;</div><div class='add'>+		pr_debug(DEV_DBG_NAME " [%s]: CRYPTO_TFM_RES_BAD_KEY_LEN",</div><div class='add'>+				__func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Checking key interdependency for weak key detection. */</div><div class='add'>+	if (unlikely(!((K[0] ^ K[2]) | (K[1] ^ K[3])) ||</div><div class='add'>+				!((K[2] ^ K[4]) | (K[3] ^ K[5]))) &amp;&amp;</div><div class='add'>+			(*flags &amp; CRYPTO_TFM_REQ_WEAK_KEY)) {</div><div class='add'>+		*flags |= CRYPTO_TFM_RES_WEAK_KEY;</div><div class='add'>+		pr_debug(DEV_DBG_NAME " [%s]: CRYPTO_TFM_REQ_WEAK_KEY",</div><div class='add'>+				__func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		ret = des_ekey(tmp, key + i*DES_KEY_SIZE);</div><div class='add'>+		if (unlikely(ret == 0) &amp;&amp; (*flags &amp; CRYPTO_TFM_REQ_WEAK_KEY)) {</div><div class='add'>+			*flags |= CRYPTO_TFM_RES_WEAK_KEY;</div><div class='add'>+			pr_debug(DEV_DBG_NAME " [%s]: "</div><div class='add'>+					"CRYPTO_TFM_REQ_WEAK_KEY", __func__);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(ctx-&gt;key, key, keylen);</div><div class='add'>+	ctx-&gt;keylen = keylen;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;updated = 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cryp_blk_encrypt(struct ablkcipher_request *areq)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);</div><div class='add'>+	struct cryp_ctx *ctx = crypto_ablkcipher_ctx(cipher);</div><div class='add'>+</div><div class='add'>+	pr_debug(DEV_DBG_NAME " [%s]", __func__);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;config.algodir = CRYP_ALGORITHM_ENCRYPT;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * DMA does not work for DES due to a hw bug */</div><div class='add'>+	if (cryp_mode == CRYP_MODE_DMA &amp;&amp; mode_is_aes(ctx-&gt;config.algomode))</div><div class='add'>+		return ablk_dma_crypt(areq);</div><div class='add'>+</div><div class='add'>+	/* For everything except DMA, we run the non DMA version. */</div><div class='add'>+	return ablk_crypt(areq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cryp_blk_decrypt(struct ablkcipher_request *areq)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(areq);</div><div class='add'>+	struct cryp_ctx *ctx = crypto_ablkcipher_ctx(cipher);</div><div class='add'>+</div><div class='add'>+	pr_debug(DEV_DBG_NAME " [%s]", __func__);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;config.algodir = CRYP_ALGORITHM_DECRYPT;</div><div class='add'>+</div><div class='add'>+	/* DMA does not work for DES due to a hw bug */</div><div class='add'>+	if (cryp_mode == CRYP_MODE_DMA &amp;&amp; mode_is_aes(ctx-&gt;config.algomode))</div><div class='add'>+		return ablk_dma_crypt(areq);</div><div class='add'>+</div><div class='add'>+	/* For everything except DMA, we run the non DMA version. */</div><div class='add'>+	return ablk_crypt(areq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct cryp_algo_template {</div><div class='add'>+	enum cryp_algo_mode algomode;</div><div class='add'>+	struct crypto_alg crypto;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int cryp_cra_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct cryp_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct crypto_alg *alg = tfm-&gt;__crt_alg;</div><div class='add'>+	struct cryp_algo_template *cryp_alg = container_of(alg,</div><div class='add'>+			struct cryp_algo_template,</div><div class='add'>+			crypto);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;config.algomode = cryp_alg-&gt;algomode;</div><div class='add'>+	ctx-&gt;blocksize = crypto_tfm_alg_blocksize(tfm);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct cryp_algo_template cryp_algs[] = {</div><div class='add'>+	{</div><div class='add'>+		.algomode = CRYP_ALGO_AES_ECB,</div><div class='add'>+		.crypto = {</div><div class='add'>+			.cra_name = "aes",</div><div class='add'>+			.cra_driver_name = "aes-ux500",</div><div class='add'>+			.cra_priority =	300,</div><div class='add'>+			.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |</div><div class='add'>+					CRYPTO_ALG_ASYNC,</div><div class='add'>+			.cra_blocksize = AES_BLOCK_SIZE,</div><div class='add'>+			.cra_ctxsize = sizeof(struct cryp_ctx),</div><div class='add'>+			.cra_alignmask = 3,</div><div class='add'>+			.cra_type = &amp;crypto_ablkcipher_type,</div><div class='add'>+			.cra_init = cryp_cra_init,</div><div class='add'>+			.cra_module = THIS_MODULE,</div><div class='add'>+			.cra_u = {</div><div class='add'>+				.ablkcipher = {</div><div class='add'>+					.min_keysize = AES_MIN_KEY_SIZE,</div><div class='add'>+					.max_keysize = AES_MAX_KEY_SIZE,</div><div class='add'>+					.setkey = aes_ablkcipher_setkey,</div><div class='add'>+					.encrypt = cryp_blk_encrypt,</div><div class='add'>+					.decrypt = cryp_blk_decrypt</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.algomode = CRYP_ALGO_AES_ECB,</div><div class='add'>+		.crypto = {</div><div class='add'>+			.cra_name = "ecb(aes)",</div><div class='add'>+			.cra_driver_name = "ecb-aes-ux500",</div><div class='add'>+			.cra_priority = 300,</div><div class='add'>+			.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |</div><div class='add'>+					CRYPTO_ALG_ASYNC,</div><div class='add'>+			.cra_blocksize = AES_BLOCK_SIZE,</div><div class='add'>+			.cra_ctxsize = sizeof(struct cryp_ctx),</div><div class='add'>+			.cra_alignmask = 3,</div><div class='add'>+			.cra_type = &amp;crypto_ablkcipher_type,</div><div class='add'>+			.cra_init = cryp_cra_init,</div><div class='add'>+			.cra_module = THIS_MODULE,</div><div class='add'>+			.cra_u = {</div><div class='add'>+				.ablkcipher = {</div><div class='add'>+					.min_keysize = AES_MIN_KEY_SIZE,</div><div class='add'>+					.max_keysize = AES_MAX_KEY_SIZE,</div><div class='add'>+					.setkey = aes_ablkcipher_setkey,</div><div class='add'>+					.encrypt = cryp_blk_encrypt,</div><div class='add'>+					.decrypt = cryp_blk_decrypt,</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.algomode = CRYP_ALGO_AES_CBC,</div><div class='add'>+		.crypto = {</div><div class='add'>+			.cra_name = "cbc(aes)",</div><div class='add'>+			.cra_driver_name = "cbc-aes-ux500",</div><div class='add'>+			.cra_priority = 300,</div><div class='add'>+			.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |</div><div class='add'>+					CRYPTO_ALG_ASYNC,</div><div class='add'>+			.cra_blocksize = AES_BLOCK_SIZE,</div><div class='add'>+			.cra_ctxsize = sizeof(struct cryp_ctx),</div><div class='add'>+			.cra_alignmask = 3,</div><div class='add'>+			.cra_type = &amp;crypto_ablkcipher_type,</div><div class='add'>+			.cra_init = cryp_cra_init,</div><div class='add'>+			.cra_module = THIS_MODULE,</div><div class='add'>+			.cra_u = {</div><div class='add'>+				.ablkcipher = {</div><div class='add'>+					.min_keysize = AES_MIN_KEY_SIZE,</div><div class='add'>+					.max_keysize = AES_MAX_KEY_SIZE,</div><div class='add'>+					.setkey = aes_ablkcipher_setkey,</div><div class='add'>+					.encrypt = cryp_blk_encrypt,</div><div class='add'>+					.decrypt = cryp_blk_decrypt,</div><div class='add'>+					.ivsize = AES_BLOCK_SIZE,</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.algomode = CRYP_ALGO_AES_CTR,</div><div class='add'>+		.crypto = {</div><div class='add'>+			.cra_name = "ctr(aes)",</div><div class='add'>+			.cra_driver_name = "ctr-aes-ux500",</div><div class='add'>+			.cra_priority = 300,</div><div class='add'>+			.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |</div><div class='add'>+						CRYPTO_ALG_ASYNC,</div><div class='add'>+			.cra_blocksize = AES_BLOCK_SIZE,</div><div class='add'>+			.cra_ctxsize = sizeof(struct cryp_ctx),</div><div class='add'>+			.cra_alignmask = 3,</div><div class='add'>+			.cra_type = &amp;crypto_ablkcipher_type,</div><div class='add'>+			.cra_init = cryp_cra_init,</div><div class='add'>+			.cra_module = THIS_MODULE,</div><div class='add'>+			.cra_u = {</div><div class='add'>+				.ablkcipher = {</div><div class='add'>+					.min_keysize = AES_MIN_KEY_SIZE,</div><div class='add'>+					.max_keysize = AES_MAX_KEY_SIZE,</div><div class='add'>+					.setkey = aes_ablkcipher_setkey,</div><div class='add'>+					.encrypt = cryp_blk_encrypt,</div><div class='add'>+					.decrypt = cryp_blk_decrypt,</div><div class='add'>+					.ivsize = AES_BLOCK_SIZE,</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.algomode = CRYP_ALGO_DES_ECB,</div><div class='add'>+		.crypto = {</div><div class='add'>+			.cra_name = "des",</div><div class='add'>+			.cra_driver_name = "des-ux500",</div><div class='add'>+			.cra_priority = 300,</div><div class='add'>+			.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |</div><div class='add'>+						CRYPTO_ALG_ASYNC,</div><div class='add'>+			.cra_blocksize = DES_BLOCK_SIZE,</div><div class='add'>+			.cra_ctxsize = sizeof(struct cryp_ctx),</div><div class='add'>+			.cra_alignmask = 3,</div><div class='add'>+			.cra_type = &amp;crypto_ablkcipher_type,</div><div class='add'>+			.cra_init = cryp_cra_init,</div><div class='add'>+			.cra_module = THIS_MODULE,</div><div class='add'>+			.cra_u = {</div><div class='add'>+				.ablkcipher = {</div><div class='add'>+					.min_keysize = DES_KEY_SIZE,</div><div class='add'>+					.max_keysize = DES_KEY_SIZE,</div><div class='add'>+					.setkey = des_ablkcipher_setkey,</div><div class='add'>+					.encrypt = cryp_blk_encrypt,</div><div class='add'>+					.decrypt = cryp_blk_decrypt</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.algomode = CRYP_ALGO_TDES_ECB,</div><div class='add'>+		.crypto = {</div><div class='add'>+			.cra_name = "des3_ede",</div><div class='add'>+			.cra_driver_name = "des3_ede-ux500",</div><div class='add'>+			.cra_priority = 300,</div><div class='add'>+			.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |</div><div class='add'>+						CRYPTO_ALG_ASYNC,</div><div class='add'>+			.cra_blocksize = DES3_EDE_BLOCK_SIZE,</div><div class='add'>+			.cra_ctxsize = sizeof(struct cryp_ctx),</div><div class='add'>+			.cra_alignmask = 3,</div><div class='add'>+			.cra_type = &amp;crypto_ablkcipher_type,</div><div class='add'>+			.cra_init = cryp_cra_init,</div><div class='add'>+			.cra_module = THIS_MODULE,</div><div class='add'>+			.cra_u = {</div><div class='add'>+				.ablkcipher = {</div><div class='add'>+					.min_keysize = DES3_EDE_KEY_SIZE,</div><div class='add'>+					.max_keysize = DES3_EDE_KEY_SIZE,</div><div class='add'>+					.setkey = des_ablkcipher_setkey,</div><div class='add'>+					.encrypt = cryp_blk_encrypt,</div><div class='add'>+					.decrypt = cryp_blk_decrypt</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.algomode = CRYP_ALGO_DES_ECB,</div><div class='add'>+		.crypto = {</div><div class='add'>+			.cra_name = "ecb(des)",</div><div class='add'>+			.cra_driver_name = "ecb-des-ux500",</div><div class='add'>+			.cra_priority = 300,</div><div class='add'>+			.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |</div><div class='add'>+					CRYPTO_ALG_ASYNC,</div><div class='add'>+			.cra_blocksize = DES_BLOCK_SIZE,</div><div class='add'>+			.cra_ctxsize = sizeof(struct cryp_ctx),</div><div class='add'>+			.cra_alignmask = 3,</div><div class='add'>+			.cra_type = &amp;crypto_ablkcipher_type,</div><div class='add'>+			.cra_init = cryp_cra_init,</div><div class='add'>+			.cra_module = THIS_MODULE,</div><div class='add'>+			.cra_u = {</div><div class='add'>+				.ablkcipher = {</div><div class='add'>+					.min_keysize = DES_KEY_SIZE,</div><div class='add'>+					.max_keysize = DES_KEY_SIZE,</div><div class='add'>+					.setkey = des_ablkcipher_setkey,</div><div class='add'>+					.encrypt = cryp_blk_encrypt,</div><div class='add'>+					.decrypt = cryp_blk_decrypt,</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.algomode = CRYP_ALGO_TDES_ECB,</div><div class='add'>+		.crypto = {</div><div class='add'>+			.cra_name = "ecb(des3_ede)",</div><div class='add'>+			.cra_driver_name = "ecb-des3_ede-ux500",</div><div class='add'>+			.cra_priority = 300,</div><div class='add'>+			.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |</div><div class='add'>+					CRYPTO_ALG_ASYNC,</div><div class='add'>+			.cra_blocksize = DES3_EDE_BLOCK_SIZE,</div><div class='add'>+			.cra_ctxsize = sizeof(struct cryp_ctx),</div><div class='add'>+			.cra_alignmask = 3,</div><div class='add'>+			.cra_type = &amp;crypto_ablkcipher_type,</div><div class='add'>+			.cra_init = cryp_cra_init,</div><div class='add'>+			.cra_module = THIS_MODULE,</div><div class='add'>+			.cra_u = {</div><div class='add'>+				.ablkcipher = {</div><div class='add'>+					.min_keysize = DES3_EDE_KEY_SIZE,</div><div class='add'>+					.max_keysize = DES3_EDE_KEY_SIZE,</div><div class='add'>+					.setkey = des3_ablkcipher_setkey,</div><div class='add'>+					.encrypt = cryp_blk_encrypt,</div><div class='add'>+					.decrypt = cryp_blk_decrypt,</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.algomode = CRYP_ALGO_DES_CBC,</div><div class='add'>+		.crypto = {</div><div class='add'>+			.cra_name = "cbc(des)",</div><div class='add'>+			.cra_driver_name = "cbc-des-ux500",</div><div class='add'>+			.cra_priority = 300,</div><div class='add'>+			.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |</div><div class='add'>+					CRYPTO_ALG_ASYNC,</div><div class='add'>+			.cra_blocksize = DES_BLOCK_SIZE,</div><div class='add'>+			.cra_ctxsize = sizeof(struct cryp_ctx),</div><div class='add'>+			.cra_alignmask = 3,</div><div class='add'>+			.cra_type = &amp;crypto_ablkcipher_type,</div><div class='add'>+			.cra_init = cryp_cra_init,</div><div class='add'>+			.cra_module = THIS_MODULE,</div><div class='add'>+			.cra_u = {</div><div class='add'>+				.ablkcipher = {</div><div class='add'>+					.min_keysize = DES_KEY_SIZE,</div><div class='add'>+					.max_keysize = DES_KEY_SIZE,</div><div class='add'>+					.setkey = des_ablkcipher_setkey,</div><div class='add'>+					.encrypt = cryp_blk_encrypt,</div><div class='add'>+					.decrypt = cryp_blk_decrypt,</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.algomode = CRYP_ALGO_TDES_CBC,</div><div class='add'>+		.crypto = {</div><div class='add'>+			.cra_name = "cbc(des3_ede)",</div><div class='add'>+			.cra_driver_name = "cbc-des3_ede-ux500",</div><div class='add'>+			.cra_priority = 300,</div><div class='add'>+			.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |</div><div class='add'>+					CRYPTO_ALG_ASYNC,</div><div class='add'>+			.cra_blocksize = DES3_EDE_BLOCK_SIZE,</div><div class='add'>+			.cra_ctxsize = sizeof(struct cryp_ctx),</div><div class='add'>+			.cra_alignmask = 3,</div><div class='add'>+			.cra_type = &amp;crypto_ablkcipher_type,</div><div class='add'>+			.cra_init = cryp_cra_init,</div><div class='add'>+			.cra_module = THIS_MODULE,</div><div class='add'>+			.cra_u = {</div><div class='add'>+				.ablkcipher = {</div><div class='add'>+					.min_keysize = DES3_EDE_KEY_SIZE,</div><div class='add'>+					.max_keysize = DES3_EDE_KEY_SIZE,</div><div class='add'>+					.setkey = des3_ablkcipher_setkey,</div><div class='add'>+					.encrypt = cryp_blk_encrypt,</div><div class='add'>+					.decrypt = cryp_blk_decrypt,</div><div class='add'>+					.ivsize = DES3_EDE_BLOCK_SIZE,</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_algs_register_all -</div><div class='add'>+ */</div><div class='add'>+static int cryp_algs_register_all(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+	int count;</div><div class='add'>+</div><div class='add'>+	pr_debug("[%s]", __func__);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(cryp_algs); i++) {</div><div class='add'>+		ret = crypto_register_alg(&amp;cryp_algs[i].crypto);</div><div class='add'>+		if (ret) {</div><div class='add'>+			count = i;</div><div class='add'>+			pr_err("[%s] alg registration failed",</div><div class='add'>+					cryp_algs[i].crypto.cra_driver_name);</div><div class='add'>+			goto unreg;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+unreg:</div><div class='add'>+	for (i = 0; i &lt; count; i++)</div><div class='add'>+		crypto_unregister_alg(&amp;cryp_algs[i].crypto);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cryp_algs_unregister_all -</div><div class='add'>+ */</div><div class='add'>+static void cryp_algs_unregister_all(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	pr_debug(DEV_DBG_NAME " [%s]", __func__);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(cryp_algs); i++)</div><div class='add'>+		crypto_unregister_alg(&amp;cryp_algs[i].crypto);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ux500_cryp_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	int cryp_error = 0;</div><div class='add'>+	struct resource *res = NULL;</div><div class='add'>+	struct resource *res_irq = NULL;</div><div class='add'>+	struct cryp_device_data *device_data;</div><div class='add'>+	struct cryp_protection_config prot = {</div><div class='add'>+		.privilege_access = CRYP_STATE_ENABLE</div><div class='add'>+	};</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "[%s]", __func__);</div><div class='add'>+	device_data = kzalloc(sizeof(struct cryp_device_data), GFP_ATOMIC);</div><div class='add'>+	if (!device_data) {</div><div class='add'>+		dev_err(dev, "[%s]: kzalloc() failed!", __func__);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	device_data-&gt;dev = dev;</div><div class='add'>+	device_data-&gt;current_ctx = NULL;</div><div class='add'>+</div><div class='add'>+	/* Grab the DMA configuration from platform data. */</div><div class='add'>+	mem_to_engine = &amp;((struct cryp_platform_data *)</div><div class='add'>+			 dev-&gt;platform_data)-&gt;mem_to_engine;</div><div class='add'>+	engine_to_mem = &amp;((struct cryp_platform_data *)</div><div class='add'>+			 dev-&gt;platform_data)-&gt;engine_to_mem;</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_err(dev, "[%s]: platform_get_resource() failed",</div><div class='add'>+				__func__);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto out_kfree;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = request_mem_region(res-&gt;start, resource_size(res), pdev-&gt;name);</div><div class='add'>+	if (res == NULL) {</div><div class='add'>+		dev_err(dev, "[%s]: request_mem_region() failed",</div><div class='add'>+				__func__);</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto out_kfree;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	device_data-&gt;base = ioremap(res-&gt;start, resource_size(res));</div><div class='add'>+	if (!device_data-&gt;base) {</div><div class='add'>+		dev_err(dev, "[%s]: ioremap failed!", __func__);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_free_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	spin_lock_init(&amp;device_data-&gt;power_state_spinlock);</div><div class='add'>+</div><div class='add'>+	/* Enable power for CRYP hardware block */</div><div class='add'>+	device_data-&gt;pwr_regulator = regulator_get(&amp;pdev-&gt;dev, "v-ape");</div><div class='add'>+	if (IS_ERR(device_data-&gt;pwr_regulator)) {</div><div class='add'>+		dev_err(dev, "[%s]: could not get cryp regulator", __func__);</div><div class='add'>+		ret = PTR_ERR(device_data-&gt;pwr_regulator);</div><div class='add'>+		device_data-&gt;pwr_regulator = NULL;</div><div class='add'>+		goto out_unmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable the clk for CRYP hardware block */</div><div class='add'>+	device_data-&gt;clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(device_data-&gt;clk)) {</div><div class='add'>+		dev_err(dev, "[%s]: clk_get() failed!", __func__);</div><div class='add'>+		ret = PTR_ERR(device_data-&gt;clk);</div><div class='add'>+		goto out_regulator;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable device power (and clock) */</div><div class='add'>+	ret = cryp_enable_power(device_data-&gt;dev, device_data, false);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "[%s]: cryp_enable_power() failed!", __func__);</div><div class='add'>+		goto out_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cryp_error = cryp_check(device_data);</div><div class='add'>+	if (cryp_error != 0) {</div><div class='add'>+		dev_err(dev, "[%s]: cryp_init() failed!", __func__);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cryp_error = cryp_configure_protection(device_data, &amp;prot);</div><div class='add'>+	if (cryp_error != 0) {</div><div class='add'>+		dev_err(dev, "[%s]: cryp_configure_protection() failed!",</div><div class='add'>+			__func__);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='add'>+	if (!res_irq) {</div><div class='add'>+		dev_err(dev, "[%s]: IORESOURCE_IRQ unavailable",</div><div class='add'>+			__func__);</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = request_irq(res_irq-&gt;start,</div><div class='add'>+			  cryp_interrupt_handler,</div><div class='add'>+			  0,</div><div class='add'>+			  "cryp1",</div><div class='add'>+			  device_data);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "[%s]: Unable to request IRQ", __func__);</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cryp_mode == CRYP_MODE_DMA)</div><div class='add'>+		cryp_dma_setup_channel(device_data, dev);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, device_data);</div><div class='add'>+</div><div class='add'>+	/* Put the new device into the device list... */</div><div class='add'>+	klist_add_tail(&amp;device_data-&gt;list_node, &amp;driver_data.device_list);</div><div class='add'>+</div><div class='add'>+	/* ... and signal that a new device is available. */</div><div class='add'>+	up(&amp;driver_data.device_allocation);</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;session_id, 1);</div><div class='add'>+</div><div class='add'>+	ret = cryp_algs_register_all();</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "[%s]: cryp_algs_register_all() failed!",</div><div class='add'>+			__func__);</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_power:</div><div class='add'>+	cryp_disable_power(device_data-&gt;dev, device_data, false);</div><div class='add'>+</div><div class='add'>+out_clk:</div><div class='add'>+	clk_put(device_data-&gt;clk);</div><div class='add'>+</div><div class='add'>+out_regulator:</div><div class='add'>+	regulator_put(device_data-&gt;pwr_regulator);</div><div class='add'>+</div><div class='add'>+out_unmap:</div><div class='add'>+	iounmap(device_data-&gt;base);</div><div class='add'>+</div><div class='add'>+out_free_mem:</div><div class='add'>+	release_mem_region(res-&gt;start, resource_size(res));</div><div class='add'>+</div><div class='add'>+out_kfree:</div><div class='add'>+	kfree(device_data);</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ux500_cryp_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct resource *res = NULL;</div><div class='add'>+	struct resource *res_irq = NULL;</div><div class='add'>+	struct cryp_device_data *device_data;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "[%s]", __func__);</div><div class='add'>+	device_data = platform_get_drvdata(pdev);</div><div class='add'>+	if (!device_data) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: platform_get_drvdata() failed!",</div><div class='add'>+			__func__);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Try to decrease the number of available devices. */</div><div class='add'>+	if (down_trylock(&amp;driver_data.device_allocation))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	/* Check that the device is free */</div><div class='add'>+	spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	/* current_ctx allocates a device, NULL = unallocated */</div><div class='add'>+	if (device_data-&gt;current_ctx) {</div><div class='add'>+		/* The device is busy */</div><div class='add'>+		spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+		/* Return the device to the pool. */</div><div class='add'>+		up(&amp;driver_data.device_allocation);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+</div><div class='add'>+	/* Remove the device from the list */</div><div class='add'>+	if (klist_node_attached(&amp;device_data-&gt;list_node))</div><div class='add'>+		klist_remove(&amp;device_data-&gt;list_node);</div><div class='add'>+</div><div class='add'>+	/* If this was the last device, remove the services */</div><div class='add'>+	if (list_empty(&amp;driver_data.device_list.k_list))</div><div class='add'>+		cryp_algs_unregister_all();</div><div class='add'>+</div><div class='add'>+	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='add'>+	if (!res_irq)</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: IORESOURCE_IRQ, unavailable",</div><div class='add'>+			__func__);</div><div class='add'>+	else {</div><div class='add'>+		disable_irq(res_irq-&gt;start);</div><div class='add'>+		free_irq(res_irq-&gt;start, device_data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cryp_disable_power(&amp;pdev-&gt;dev, device_data, false))</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: cryp_disable_power() failed",</div><div class='add'>+			__func__);</div><div class='add'>+</div><div class='add'>+	clk_put(device_data-&gt;clk);</div><div class='add'>+	regulator_put(device_data-&gt;pwr_regulator);</div><div class='add'>+</div><div class='add'>+	iounmap(device_data-&gt;base);</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (res)</div><div class='add'>+		release_mem_region(res-&gt;start, res-&gt;end - res-&gt;start + 1);</div><div class='add'>+</div><div class='add'>+	kfree(device_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ux500_cryp_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct resource *res_irq = NULL;</div><div class='add'>+	struct cryp_device_data *device_data;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "[%s]", __func__);</div><div class='add'>+</div><div class='add'>+	device_data = platform_get_drvdata(pdev);</div><div class='add'>+	if (!device_data) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: platform_get_drvdata() failed!",</div><div class='add'>+			__func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check that the device is free */</div><div class='add'>+	spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	/* current_ctx allocates a device, NULL = unallocated */</div><div class='add'>+	if (!device_data-&gt;current_ctx) {</div><div class='add'>+		if (down_trylock(&amp;driver_data.device_allocation))</div><div class='add'>+			dev_dbg(&amp;pdev-&gt;dev, "[%s]: Cryp still in use!"</div><div class='add'>+				"Shutting down anyway...", __func__);</div><div class='add'>+		/**</div><div class='add'>+		 * (Allocate the device)</div><div class='add'>+		 * Need to set this to non-null (dummy) value,</div><div class='add'>+		 * to avoid usage if context switching.</div><div class='add'>+		 */</div><div class='add'>+		device_data-&gt;current_ctx++;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+</div><div class='add'>+	/* Remove the device from the list */</div><div class='add'>+	if (klist_node_attached(&amp;device_data-&gt;list_node))</div><div class='add'>+		klist_remove(&amp;device_data-&gt;list_node);</div><div class='add'>+</div><div class='add'>+	/* If this was the last device, remove the services */</div><div class='add'>+	if (list_empty(&amp;driver_data.device_list.k_list))</div><div class='add'>+		cryp_algs_unregister_all();</div><div class='add'>+</div><div class='add'>+	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='add'>+	if (!res_irq)</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: IORESOURCE_IRQ, unavailable",</div><div class='add'>+			__func__);</div><div class='add'>+	else {</div><div class='add'>+		disable_irq(res_irq-&gt;start);</div><div class='add'>+		free_irq(res_irq-&gt;start, device_data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cryp_disable_power(&amp;pdev-&gt;dev, device_data, false))</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: cryp_disable_power() failed",</div><div class='add'>+			__func__);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ux500_cryp_suspend(struct platform_device *pdev, pm_message_t state)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct cryp_device_data *device_data;</div><div class='add'>+	struct resource *res_irq;</div><div class='add'>+	struct cryp_ctx *temp_ctx = NULL;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "[%s]", __func__);</div><div class='add'>+</div><div class='add'>+	/* Handle state? */</div><div class='add'>+	device_data = platform_get_drvdata(pdev);</div><div class='add'>+	if (!device_data) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: platform_get_drvdata() failed!",</div><div class='add'>+			__func__);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='add'>+	if (!res_irq)</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: IORESOURCE_IRQ, unavailable",</div><div class='add'>+			__func__);</div><div class='add'>+	else</div><div class='add'>+		disable_irq(res_irq-&gt;start);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	if (!device_data-&gt;current_ctx)</div><div class='add'>+		device_data-&gt;current_ctx++;</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+</div><div class='add'>+	if (device_data-&gt;current_ctx == ++temp_ctx) {</div><div class='add'>+		if (down_interruptible(&amp;driver_data.device_allocation))</div><div class='add'>+			dev_dbg(&amp;pdev-&gt;dev, "[%s]: down_interruptible() "</div><div class='add'>+					"failed", __func__);</div><div class='add'>+		ret = cryp_disable_power(&amp;pdev-&gt;dev, device_data, false);</div><div class='add'>+</div><div class='add'>+	} else</div><div class='add'>+		ret = cryp_disable_power(&amp;pdev-&gt;dev, device_data, true);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: cryp_disable_power()", __func__);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ux500_cryp_resume(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct cryp_device_data *device_data;</div><div class='add'>+	struct resource *res_irq;</div><div class='add'>+	struct cryp_ctx *temp_ctx = NULL;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "[%s]", __func__);</div><div class='add'>+</div><div class='add'>+	device_data = platform_get_drvdata(pdev);</div><div class='add'>+	if (!device_data) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: platform_get_drvdata() failed!",</div><div class='add'>+			__func__);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	if (device_data-&gt;current_ctx == ++temp_ctx)</div><div class='add'>+		device_data-&gt;current_ctx = NULL;</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	if (!device_data-&gt;current_ctx)</div><div class='add'>+		up(&amp;driver_data.device_allocation);</div><div class='add'>+	else</div><div class='add'>+		ret = cryp_enable_power(&amp;pdev-&gt;dev, device_data, true);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: cryp_enable_power() failed!",</div><div class='add'>+			__func__);</div><div class='add'>+	else {</div><div class='add'>+		res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='add'>+		if (res_irq)</div><div class='add'>+			enable_irq(res_irq-&gt;start);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver cryp_driver = {</div><div class='add'>+	.probe  = ux500_cryp_probe,</div><div class='add'>+	.remove = ux500_cryp_remove,</div><div class='add'>+	.shutdown = ux500_cryp_shutdown,</div><div class='add'>+	.suspend  = ux500_cryp_suspend,</div><div class='add'>+	.resume   = ux500_cryp_resume,</div><div class='add'>+	.driver = {</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.name  = "cryp1"</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init ux500_cryp_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	pr_debug("[%s] is called!", __func__);</div><div class='add'>+	klist_init(&amp;driver_data.device_list, NULL, NULL);</div><div class='add'>+	/* Initialize the semaphore to 0 devices (locked state) */</div><div class='add'>+	sema_init(&amp;driver_data.device_allocation, 0);</div><div class='add'>+	return platform_driver_register(&amp;cryp_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit ux500_cryp_mod_fini(void)</div><div class='add'>+{</div><div class='add'>+	pr_debug("[%s] is called!", __func__);</div><div class='add'>+	platform_driver_unregister(&amp;cryp_driver);</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(ux500_cryp_mod_init);</div><div class='add'>+module_exit(ux500_cryp_mod_fini);</div><div class='add'>+</div><div class='add'>+module_param(cryp_mode, int, 0);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Driver for ST-Ericsson UX500 CRYP crypto engine.");</div><div class='add'>+MODULE_ALIAS("aes-all");</div><div class='add'>+MODULE_ALIAS("des-all");</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/crypto/ux500/cryp/cryp_irq.c b/drivers/crypto/ux500/cryp/cryp_irq.c<br/>new file mode 100644<br/>index 000000000000..08d291cdbe6d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/cryp/cryp_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp_irq.c</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+/**</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+ * Author: Shujuan Chen &lt;shujuan.chen@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Jonas Linde &lt;jonas.linde@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Joakim Bech &lt;joakim.xx.bech@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Berne Hebark &lt;berne.herbark@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Niklas Hernaeus &lt;niklas.hernaeus@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * License terms: GNU General Public License (GPL) version 2.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/bitmap.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+</div><div class='add'>+#include "cryp.h"</div><div class='add'>+#include "cryp_p.h"</div><div class='add'>+#include "cryp_irq.h"</div><div class='add'>+#include "cryp_irqp.h"</div><div class='add'>+</div><div class='add'>+void cryp_enable_irq_src(struct cryp_device_data *device_data, u32 irq_src)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	dev_dbg(device_data-&gt;dev, "[%s]", __func__);</div><div class='add'>+</div><div class='add'>+	i = readl_relaxed(&amp;device_data-&gt;base-&gt;imsc);</div><div class='add'>+	i = i | irq_src;</div><div class='add'>+	writel_relaxed(i, &amp;device_data-&gt;base-&gt;imsc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cryp_disable_irq_src(struct cryp_device_data *device_data, u32 irq_src)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	dev_dbg(device_data-&gt;dev, "[%s]", __func__);</div><div class='add'>+</div><div class='add'>+	i = readl_relaxed(&amp;device_data-&gt;base-&gt;imsc);</div><div class='add'>+	i = i &amp; ~irq_src;</div><div class='add'>+	writel_relaxed(i, &amp;device_data-&gt;base-&gt;imsc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool cryp_pending_irq_src(struct cryp_device_data *device_data, u32 irq_src)</div><div class='add'>+{</div><div class='add'>+	return (readl_relaxed(&amp;device_data-&gt;base-&gt;mis) &amp; irq_src) &gt; 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/crypto/ux500/cryp/cryp_irq.h b/drivers/crypto/ux500/cryp/cryp_irq.h<br/>new file mode 100644<br/>index 000000000000..5a7837f1b8f9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/cryp/cryp_irq.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp_irq.h</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+/**</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+ * Author: Shujuan Chen &lt;shujuan.chen@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Jonas Linde &lt;jonas.linde@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Joakim Bech &lt;joakim.xx.bech@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Berne Hebark &lt;berne.herbark@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Niklas Hernaeus &lt;niklas.hernaeus@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * License terms: GNU General Public License (GPL) version 2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _CRYP_IRQ_H_</div><div class='add'>+#define _CRYP_IRQ_H_</div><div class='add'>+</div><div class='add'>+#include "cryp.h"</div><div class='add'>+</div><div class='add'>+enum cryp_irq_src_id {</div><div class='add'>+	CRYP_IRQ_SRC_INPUT_FIFO = 0x1,</div><div class='add'>+	CRYP_IRQ_SRC_OUTPUT_FIFO = 0x2,</div><div class='add'>+	CRYP_IRQ_SRC_ALL = 0x3</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * M0 Funtions</div><div class='add'>+ */</div><div class='add'>+void cryp_enable_irq_src(struct cryp_device_data *device_data, u32 irq_src);</div><div class='add'>+</div><div class='add'>+void cryp_disable_irq_src(struct cryp_device_data *device_data, u32 irq_src);</div><div class='add'>+</div><div class='add'>+bool cryp_pending_irq_src(struct cryp_device_data *device_data, u32 irq_src);</div><div class='add'>+</div><div class='add'>+#endif				/* _CRYP_IRQ_H_ */</div><div class='head'>diff --git a/drivers/crypto/ux500/cryp/cryp_irqp.h b/drivers/crypto/ux500/cryp/cryp_irqp.h<br/>new file mode 100644<br/>index 000000000000..8b339cc34bf8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/cryp/cryp_irqp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp_irqp.h</a></div><div class='hunk'>@@ -0,0 +1,125 @@</div><div class='add'>+/**</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+ * Author: Shujuan Chen &lt;shujuan.chen@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Jonas Linde &lt;jonas.linde@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Joakim Bech &lt;joakim.xx.bech@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Berne Hebark &lt;berne.herbark@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Niklas Hernaeus &lt;niklas.hernaeus@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * License terms: GNU General Public License (GPL) version 2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __CRYP_IRQP_H_</div><div class='add'>+#define __CRYP_IRQP_H_</div><div class='add'>+</div><div class='add'>+#include "cryp_irq.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *</div><div class='add'>+ * CRYP Registers - Offset mapping</div><div class='add'>+ *     +-----------------+</div><div class='add'>+ * 00h | CRYP_CR         |  Configuration register</div><div class='add'>+ *     +-----------------+</div><div class='add'>+ * 04h | CRYP_SR         |  Status register</div><div class='add'>+ *     +-----------------+</div><div class='add'>+ * 08h | CRYP_DIN        |  Data In register</div><div class='add'>+ *     +-----------------+</div><div class='add'>+ * 0ch | CRYP_DOUT       |  Data out register</div><div class='add'>+ *     +-----------------+</div><div class='add'>+ * 10h | CRYP_DMACR      |  DMA control register</div><div class='add'>+ *     +-----------------+</div><div class='add'>+ * 14h | CRYP_IMSC       |  IMSC</div><div class='add'>+ *     +-----------------+</div><div class='add'>+ * 18h | CRYP_RIS        |  Raw interrupt status</div><div class='add'>+ *     +-----------------+</div><div class='add'>+ * 1ch | CRYP_MIS        |  Masked interrupt status.</div><div class='add'>+ *     +-----------------+</div><div class='add'>+ *       Key registers</div><div class='add'>+ *       IVR registers</div><div class='add'>+ *       Peripheral</div><div class='add'>+ *       Cell IDs</div><div class='add'>+ *</div><div class='add'>+ *       Refer data structure for other register map</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct cryp_register</div><div class='add'>+ * @cr			- Configuration register</div><div class='add'>+ * @status		- Status register</div><div class='add'>+ * @din			- Data input register</div><div class='add'>+ * @din_size		- Data input size register</div><div class='add'>+ * @dout		- Data output register</div><div class='add'>+ * @dout_size		- Data output size register</div><div class='add'>+ * @dmacr		- Dma control register</div><div class='add'>+ * @imsc		- Interrupt mask set/clear register</div><div class='add'>+ * @ris			- Raw interrupt status</div><div class='add'>+ * @mis			- Masked interrupt statu register</div><div class='add'>+ * @key_1_l		- Key register 1 L</div><div class='add'>+ * @key_1_r		- Key register 1 R</div><div class='add'>+ * @key_2_l		- Key register 2 L</div><div class='add'>+ * @key_2_r		- Key register 2 R</div><div class='add'>+ * @key_3_l		- Key register 3 L</div><div class='add'>+ * @key_3_r		- Key register 3 R</div><div class='add'>+ * @key_4_l		- Key register 4 L</div><div class='add'>+ * @key_4_r		- Key register 4 R</div><div class='add'>+ * @init_vect_0_l	- init vector 0 L</div><div class='add'>+ * @init_vect_0_r	- init vector 0 R</div><div class='add'>+ * @init_vect_1_l	- init vector 1 L</div><div class='add'>+ * @init_vect_1_r	- init vector 1 R</div><div class='add'>+ * @cryp_unused1	- unused registers</div><div class='add'>+ * @itcr		- Integration test control register</div><div class='add'>+ * @itip		- Integration test input register</div><div class='add'>+ * @itop		- Integration test output register</div><div class='add'>+ * @cryp_unused2	- unused registers</div><div class='add'>+ * @periphId0		- FE0 CRYP Peripheral Identication Register</div><div class='add'>+ * @periphId1		- FE4</div><div class='add'>+ * @periphId2		- FE8</div><div class='add'>+ * @periphId3		- FEC</div><div class='add'>+ * @pcellId0		- FF0  CRYP PCell Identication Register</div><div class='add'>+ * @pcellId1		- FF4</div><div class='add'>+ * @pcellId2		- FF8</div><div class='add'>+ * @pcellId3		- FFC</div><div class='add'>+ */</div><div class='add'>+struct cryp_register {</div><div class='add'>+	u32 cr;			/* Configuration register   */</div><div class='add'>+	u32 sr;			/* Status register          */</div><div class='add'>+	u32 din;		/* Data input register      */</div><div class='add'>+	u32 din_size;		/* Data input size register */</div><div class='add'>+	u32 dout;		/* Data output register     */</div><div class='add'>+	u32 dout_size;		/* Data output size register */</div><div class='add'>+	u32 dmacr;		/* Dma control register     */</div><div class='add'>+	u32 imsc;		/* Interrupt mask set/clear register */</div><div class='add'>+	u32 ris;		/* Raw interrupt status             */</div><div class='add'>+	u32 mis;		/* Masked interrupt statu register  */</div><div class='add'>+</div><div class='add'>+	u32 key_1_l;		/*Key register 1 L */</div><div class='add'>+	u32 key_1_r;		/*Key register 1 R */</div><div class='add'>+	u32 key_2_l;		/*Key register 2 L */</div><div class='add'>+	u32 key_2_r;		/*Key register 2 R */</div><div class='add'>+	u32 key_3_l;		/*Key register 3 L */</div><div class='add'>+	u32 key_3_r;		/*Key register 3 R */</div><div class='add'>+	u32 key_4_l;		/*Key register 4 L */</div><div class='add'>+	u32 key_4_r;		/*Key register 4 R */</div><div class='add'>+</div><div class='add'>+	u32 init_vect_0_l;	/*init vector 0 L */</div><div class='add'>+	u32 init_vect_0_r;	/*init vector 0 R */</div><div class='add'>+	u32 init_vect_1_l;	/*init vector 1 L */</div><div class='add'>+	u32 init_vect_1_r;	/*init vector 1 R */</div><div class='add'>+</div><div class='add'>+	u32 cryp_unused1[(0x80 - 0x58) / sizeof(u32)];	/* unused registers */</div><div class='add'>+	u32 itcr;		/*Integration test control register */</div><div class='add'>+	u32 itip;		/*Integration test input register */</div><div class='add'>+	u32 itop;		/*Integration test output register */</div><div class='add'>+	u32 cryp_unused2[(0xFE0 - 0x8C) / sizeof(u32)];	/* unused registers */</div><div class='add'>+</div><div class='add'>+	u32 periphId0;		/* FE0  CRYP Peripheral Identication Register */</div><div class='add'>+	u32 periphId1;		/* FE4 */</div><div class='add'>+	u32 periphId2;		/* FE8 */</div><div class='add'>+	u32 periphId3;		/* FEC */</div><div class='add'>+</div><div class='add'>+	u32 pcellId0;		/* FF0  CRYP PCell Identication Register */</div><div class='add'>+	u32 pcellId1;		/* FF4 */</div><div class='add'>+	u32 pcellId2;		/* FF8 */</div><div class='add'>+	u32 pcellId3;		/* FFC */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/crypto/ux500/cryp/cryp_p.h b/drivers/crypto/ux500/cryp/cryp_p.h<br/>new file mode 100644<br/>index 000000000000..6dcffe15c2bc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/cryp/cryp_p.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/cryp/cryp_p.h</a></div><div class='hunk'>@@ -0,0 +1,123 @@</div><div class='add'>+/**</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+ * Author: Shujuan Chen &lt;shujuan.chen@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Jonas Linde &lt;jonas.linde@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Joakim Bech &lt;joakim.xx.bech@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Berne Hebark &lt;berne.herbark@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Niklas Hernaeus &lt;niklas.hernaeus@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * License terms: GNU General Public License (GPL) version 2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _CRYP_P_H_</div><div class='add'>+#define _CRYP_P_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+</div><div class='add'>+#include "cryp.h"</div><div class='add'>+#include "cryp_irqp.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Generic Macros</div><div class='add'>+ */</div><div class='add'>+#define CRYP_SET_BITS(reg_name, mask) \</div><div class='add'>+	writel_relaxed((readl_relaxed(reg_name) | mask), reg_name)</div><div class='add'>+</div><div class='add'>+#define CRYP_WRITE_BIT(reg_name, val, mask) \</div><div class='add'>+	writel_relaxed(((readl_relaxed(reg_name) &amp; ~(mask)) |\</div><div class='add'>+			((val) &amp; (mask))), reg_name)</div><div class='add'>+</div><div class='add'>+#define CRYP_TEST_BITS(reg_name, val) \</div><div class='add'>+	(readl_relaxed(reg_name) &amp; (val))</div><div class='add'>+</div><div class='add'>+#define CRYP_PUT_BITS(reg, val, shift, mask) \</div><div class='add'>+	writel_relaxed(((readl_relaxed(reg) &amp; ~(mask)) | \</div><div class='add'>+		(((u32)val &lt;&lt; shift) &amp; (mask))), reg)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * CRYP specific Macros</div><div class='add'>+ */</div><div class='add'>+#define CRYP_PERIPHERAL_ID0		0xE3</div><div class='add'>+#define CRYP_PERIPHERAL_ID1		0x05</div><div class='add'>+</div><div class='add'>+#define CRYP_PERIPHERAL_ID2_DB8500	0x28</div><div class='add'>+#define CRYP_PERIPHERAL_ID3		0x00</div><div class='add'>+</div><div class='add'>+#define CRYP_PCELL_ID0			0x0D</div><div class='add'>+#define CRYP_PCELL_ID1			0xF0</div><div class='add'>+#define CRYP_PCELL_ID2			0x05</div><div class='add'>+#define CRYP_PCELL_ID3			0xB1</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * CRYP register default values</div><div class='add'>+ */</div><div class='add'>+#define MAX_DEVICE_SUPPORT		2</div><div class='add'>+</div><div class='add'>+/* Priv set, keyrden set and datatype 8bits swapped set as default. */</div><div class='add'>+#define CRYP_CR_DEFAULT			0x0482</div><div class='add'>+#define CRYP_DMACR_DEFAULT		0x0</div><div class='add'>+#define CRYP_IMSC_DEFAULT		0x0</div><div class='add'>+#define CRYP_DIN_DEFAULT		0x0</div><div class='add'>+#define CRYP_DOUT_DEFAULT		0x0</div><div class='add'>+#define CRYP_KEY_DEFAULT		0x0</div><div class='add'>+#define CRYP_INIT_VECT_DEFAULT		0x0</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * CRYP Control register specific mask</div><div class='add'>+ */</div><div class='add'>+#define CRYP_CR_SECURE_MASK		BIT(0)</div><div class='add'>+#define CRYP_CR_PRLG_MASK		BIT(1)</div><div class='add'>+#define CRYP_CR_ALGODIR_MASK		BIT(2)</div><div class='add'>+#define CRYP_CR_ALGOMODE_MASK		(BIT(5) | BIT(4) | BIT(3))</div><div class='add'>+#define CRYP_CR_DATATYPE_MASK		(BIT(7) | BIT(6))</div><div class='add'>+#define CRYP_CR_KEYSIZE_MASK		(BIT(9) | BIT(8))</div><div class='add'>+#define CRYP_CR_KEYRDEN_MASK		BIT(10)</div><div class='add'>+#define CRYP_CR_KSE_MASK		BIT(11)</div><div class='add'>+#define CRYP_CR_START_MASK		BIT(12)</div><div class='add'>+#define CRYP_CR_INIT_MASK		BIT(13)</div><div class='add'>+#define CRYP_CR_FFLUSH_MASK		BIT(14)</div><div class='add'>+#define CRYP_CR_CRYPEN_MASK		BIT(15)</div><div class='add'>+#define CRYP_CR_CONTEXT_SAVE_MASK	(CRYP_CR_SECURE_MASK |\</div><div class='add'>+					 CRYP_CR_PRLG_MASK |\</div><div class='add'>+					 CRYP_CR_ALGODIR_MASK |\</div><div class='add'>+					 CRYP_CR_ALGOMODE_MASK |\</div><div class='add'>+					 CRYP_CR_DATATYPE_MASK |\</div><div class='add'>+					 CRYP_CR_KEYSIZE_MASK |\</div><div class='add'>+					 CRYP_CR_KEYRDEN_MASK |\</div><div class='add'>+					 CRYP_CR_DATATYPE_MASK)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define CRYP_SR_INFIFO_READY_MASK	(BIT(0) | BIT(1))</div><div class='add'>+#define CRYP_SR_IFEM_MASK		BIT(0)</div><div class='add'>+#define CRYP_SR_BUSY_MASK		BIT(4)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Bit position used while setting bits in register</div><div class='add'>+ */</div><div class='add'>+#define CRYP_CR_PRLG_POS		1</div><div class='add'>+#define CRYP_CR_ALGODIR_POS		2</div><div class='add'>+#define CRYP_CR_ALGOMODE_POS		3</div><div class='add'>+#define CRYP_CR_DATATYPE_POS		6</div><div class='add'>+#define CRYP_CR_KEYSIZE_POS		8</div><div class='add'>+#define CRYP_CR_KEYRDEN_POS		10</div><div class='add'>+#define CRYP_CR_KSE_POS			11</div><div class='add'>+#define CRYP_CR_START_POS		12</div><div class='add'>+#define CRYP_CR_INIT_POS		13</div><div class='add'>+#define CRYP_CR_CRYPEN_POS		15</div><div class='add'>+</div><div class='add'>+#define CRYP_SR_BUSY_POS		4</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * CRYP PCRs------PC_NAND control register</div><div class='add'>+ * BIT_MASK</div><div class='add'>+ */</div><div class='add'>+#define CRYP_DMA_REQ_MASK		(BIT(1) | BIT(0))</div><div class='add'>+#define CRYP_DMA_REQ_MASK_POS		0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct cryp_system_context {</div><div class='add'>+	/* CRYP Register structure */</div><div class='add'>+	struct cryp_register *p_cryp_reg[MAX_DEVICE_SUPPORT];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/crypto/ux500/hash/Makefile b/drivers/crypto/ux500/hash/Makefile<br/>new file mode 100644<br/>index 000000000000..b2f90d9bac72<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/hash/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/hash/Makefile</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+#</div><div class='add'>+# Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+# Author: Shujuan Chen (shujuan.chen@stericsson.com)</div><div class='add'>+# License terms: GNU General Public License (GPL) version 2</div><div class='add'>+#</div><div class='add'>+ifdef CONFIG_CRYPTO_DEV_UX500_DEBUG</div><div class='add'>+CFLAGS_hash_core.o := -DDEBUG -O0</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_DEV_UX500_HASH) += ux500_hash.o</div><div class='add'>+ux500_hash-objs :=  hash_core.o</div><div class='head'>diff --git a/drivers/crypto/ux500/hash/hash_alg.h b/drivers/crypto/ux500/hash/hash_alg.h<br/>new file mode 100644<br/>index 000000000000..cd9351cb24df<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/hash/hash_alg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/hash/hash_alg.h</a></div><div class='hunk'>@@ -0,0 +1,395 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+ * Author: Shujuan Chen (shujuan.chen@stericsson.com)</div><div class='add'>+ * Author: Joakim Bech (joakim.xx.bech@stericsson.com)</div><div class='add'>+ * Author: Berne Hebark (berne.hebark@stericsson.com))</div><div class='add'>+ * License terms: GNU General Public License (GPL) version 2</div><div class='add'>+ */</div><div class='add'>+#ifndef _HASH_ALG_H</div><div class='add'>+#define _HASH_ALG_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+</div><div class='add'>+#define HASH_BLOCK_SIZE			64</div><div class='add'>+#define HASH_DMA_ALIGN_SIZE		4</div><div class='add'>+#define HASH_DMA_PERFORMANCE_MIN_SIZE	1024</div><div class='add'>+#define HASH_BYTES_PER_WORD		4</div><div class='add'>+</div><div class='add'>+/* Maximum value of the length's high word */</div><div class='add'>+#define HASH_HIGH_WORD_MAX_VAL		0xFFFFFFFFUL</div><div class='add'>+</div><div class='add'>+/* Power on Reset values HASH registers */</div><div class='add'>+#define HASH_RESET_CR_VALUE		0x0</div><div class='add'>+#define HASH_RESET_STR_VALUE		0x0</div><div class='add'>+</div><div class='add'>+/* Number of context swap registers */</div><div class='add'>+#define HASH_CSR_COUNT			52</div><div class='add'>+</div><div class='add'>+#define HASH_RESET_CSRX_REG_VALUE	0x0</div><div class='add'>+#define HASH_RESET_CSFULL_REG_VALUE	0x0</div><div class='add'>+#define HASH_RESET_CSDATAIN_REG_VALUE	0x0</div><div class='add'>+</div><div class='add'>+#define HASH_RESET_INDEX_VAL		0x0</div><div class='add'>+#define HASH_RESET_BIT_INDEX_VAL	0x0</div><div class='add'>+#define HASH_RESET_BUFFER_VAL		0x0</div><div class='add'>+#define HASH_RESET_LEN_HIGH_VAL		0x0</div><div class='add'>+#define HASH_RESET_LEN_LOW_VAL		0x0</div><div class='add'>+</div><div class='add'>+/* Control register bitfields */</div><div class='add'>+#define HASH_CR_RESUME_MASK	0x11FCF</div><div class='add'>+</div><div class='add'>+#define HASH_CR_SWITCHON_POS	31</div><div class='add'>+#define HASH_CR_SWITCHON_MASK	BIT(31)</div><div class='add'>+</div><div class='add'>+#define HASH_CR_EMPTYMSG_POS	20</div><div class='add'>+#define HASH_CR_EMPTYMSG_MASK	BIT(20)</div><div class='add'>+</div><div class='add'>+#define HASH_CR_DINF_POS	12</div><div class='add'>+#define HASH_CR_DINF_MASK	BIT(12)</div><div class='add'>+</div><div class='add'>+#define HASH_CR_NBW_POS		8</div><div class='add'>+#define HASH_CR_NBW_MASK	0x00000F00UL</div><div class='add'>+</div><div class='add'>+#define HASH_CR_LKEY_POS	16</div><div class='add'>+#define HASH_CR_LKEY_MASK	BIT(16)</div><div class='add'>+</div><div class='add'>+#define HASH_CR_ALGO_POS	7</div><div class='add'>+#define HASH_CR_ALGO_MASK	BIT(7)</div><div class='add'>+</div><div class='add'>+#define HASH_CR_MODE_POS	6</div><div class='add'>+#define HASH_CR_MODE_MASK	BIT(6)</div><div class='add'>+</div><div class='add'>+#define HASH_CR_DATAFORM_POS	4</div><div class='add'>+#define HASH_CR_DATAFORM_MASK	(BIT(4) | BIT(5))</div><div class='add'>+</div><div class='add'>+#define HASH_CR_DMAE_POS	3</div><div class='add'>+#define HASH_CR_DMAE_MASK	BIT(3)</div><div class='add'>+</div><div class='add'>+#define HASH_CR_INIT_POS	2</div><div class='add'>+#define HASH_CR_INIT_MASK	BIT(2)</div><div class='add'>+</div><div class='add'>+#define HASH_CR_PRIVN_POS	1</div><div class='add'>+#define HASH_CR_PRIVN_MASK	BIT(1)</div><div class='add'>+</div><div class='add'>+#define HASH_CR_SECN_POS	0</div><div class='add'>+#define HASH_CR_SECN_MASK	BIT(0)</div><div class='add'>+</div><div class='add'>+/* Start register bitfields */</div><div class='add'>+#define HASH_STR_DCAL_POS	8</div><div class='add'>+#define HASH_STR_DCAL_MASK	BIT(8)</div><div class='add'>+#define HASH_STR_DEFAULT	0x0</div><div class='add'>+</div><div class='add'>+#define HASH_STR_NBLW_POS	0</div><div class='add'>+#define HASH_STR_NBLW_MASK	0x0000001FUL</div><div class='add'>+</div><div class='add'>+#define HASH_NBLW_MAX_VAL	0x1F</div><div class='add'>+</div><div class='add'>+/* PrimeCell IDs */</div><div class='add'>+#define HASH_P_ID0		0xE0</div><div class='add'>+#define HASH_P_ID1		0x05</div><div class='add'>+#define HASH_P_ID2		0x38</div><div class='add'>+#define HASH_P_ID3		0x00</div><div class='add'>+#define HASH_CELL_ID0		0x0D</div><div class='add'>+#define HASH_CELL_ID1		0xF0</div><div class='add'>+#define HASH_CELL_ID2		0x05</div><div class='add'>+#define HASH_CELL_ID3		0xB1</div><div class='add'>+</div><div class='add'>+#define HASH_SET_BITS(reg_name, mask)	\</div><div class='add'>+	writel_relaxed((readl_relaxed(reg_name) | mask), reg_name)</div><div class='add'>+</div><div class='add'>+#define HASH_CLEAR_BITS(reg_name, mask)	\</div><div class='add'>+	writel_relaxed((readl_relaxed(reg_name) &amp; ~mask), reg_name)</div><div class='add'>+</div><div class='add'>+#define HASH_PUT_BITS(reg, val, shift, mask)	\</div><div class='add'>+	writel_relaxed(((readl(reg) &amp; ~(mask)) |	\</div><div class='add'>+		(((u32)val &lt;&lt; shift) &amp; (mask))), reg)</div><div class='add'>+</div><div class='add'>+#define HASH_SET_DIN(val, len)	writesl(&amp;device_data-&gt;base-&gt;din, (val), (len))</div><div class='add'>+</div><div class='add'>+#define HASH_INITIALIZE			\</div><div class='add'>+	HASH_PUT_BITS(			\</div><div class='add'>+		&amp;device_data-&gt;base-&gt;cr,	\</div><div class='add'>+		0x01, HASH_CR_INIT_POS,	\</div><div class='add'>+		HASH_CR_INIT_MASK)</div><div class='add'>+</div><div class='add'>+#define HASH_SET_DATA_FORMAT(data_format)				\</div><div class='add'>+		HASH_PUT_BITS(						\</div><div class='add'>+			&amp;device_data-&gt;base-&gt;cr,				\</div><div class='add'>+			(u32) (data_format), HASH_CR_DATAFORM_POS,	\</div><div class='add'>+			HASH_CR_DATAFORM_MASK)</div><div class='add'>+#define HASH_SET_NBLW(val)					\</div><div class='add'>+		HASH_PUT_BITS(					\</div><div class='add'>+			&amp;device_data-&gt;base-&gt;str,		\</div><div class='add'>+			(u32) (val), HASH_STR_NBLW_POS,		\</div><div class='add'>+			HASH_STR_NBLW_MASK)</div><div class='add'>+#define HASH_SET_DCAL					\</div><div class='add'>+		HASH_PUT_BITS(				\</div><div class='add'>+			&amp;device_data-&gt;base-&gt;str,	\</div><div class='add'>+			0x01, HASH_STR_DCAL_POS,	\</div><div class='add'>+			HASH_STR_DCAL_MASK)</div><div class='add'>+</div><div class='add'>+/* Hardware access method */</div><div class='add'>+enum hash_mode {</div><div class='add'>+	HASH_MODE_CPU,</div><div class='add'>+	HASH_MODE_DMA</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct uint64 - Structure to handle 64 bits integers.</div><div class='add'>+ * @high_word:	Most significant bits.</div><div class='add'>+ * @low_word:	Least significant bits.</div><div class='add'>+ *</div><div class='add'>+ * Used to handle 64 bits integers.</div><div class='add'>+ */</div><div class='add'>+struct uint64 {</div><div class='add'>+	u32 high_word;</div><div class='add'>+	u32 low_word;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct hash_register - Contains all registers in ux500 hash hardware.</div><div class='add'>+ * @cr:		HASH control register (0x000).</div><div class='add'>+ * @din:	HASH data input register (0x004).</div><div class='add'>+ * @str:	HASH start register (0x008).</div><div class='add'>+ * @hx:		HASH digest register 0..7 (0x00c-0x01C).</div><div class='add'>+ * @padding0:	Reserved (0x02C).</div><div class='add'>+ * @itcr:	Integration test control register (0x080).</div><div class='add'>+ * @itip:	Integration test input register (0x084).</div><div class='add'>+ * @itop:	Integration test output register (0x088).</div><div class='add'>+ * @padding1:	Reserved (0x08C).</div><div class='add'>+ * @csfull:	HASH context full register (0x0F8).</div><div class='add'>+ * @csdatain:	HASH context swap data input register (0x0FC).</div><div class='add'>+ * @csrx:	HASH context swap register 0..51 (0x100-0x1CC).</div><div class='add'>+ * @padding2:	Reserved (0x1D0).</div><div class='add'>+ * @periphid0:	HASH peripheral identification register 0 (0xFE0).</div><div class='add'>+ * @periphid1:	HASH peripheral identification register 1 (0xFE4).</div><div class='add'>+ * @periphid2:	HASH peripheral identification register 2 (0xFE8).</div><div class='add'>+ * @periphid3:	HASH peripheral identification register 3 (0xFEC).</div><div class='add'>+ * @cellid0:	HASH PCell identification register 0 (0xFF0).</div><div class='add'>+ * @cellid1:	HASH PCell identification register 1 (0xFF4).</div><div class='add'>+ * @cellid2:	HASH PCell identification register 2 (0xFF8).</div><div class='add'>+ * @cellid3:	HASH PCell identification register 3 (0xFFC).</div><div class='add'>+ *</div><div class='add'>+ * The device communicates to the HASH via 32-bit-wide control registers</div><div class='add'>+ * accessible via the 32-bit width AMBA rev. 2.0 AHB Bus. Below is a structure</div><div class='add'>+ * with the registers used.</div><div class='add'>+ */</div><div class='add'>+struct hash_register {</div><div class='add'>+	u32 cr;</div><div class='add'>+	u32 din;</div><div class='add'>+	u32 str;</div><div class='add'>+	u32 hx[8];</div><div class='add'>+</div><div class='add'>+	u32 padding0[(0x080 - 0x02C) / sizeof(u32)];</div><div class='add'>+</div><div class='add'>+	u32 itcr;</div><div class='add'>+	u32 itip;</div><div class='add'>+	u32 itop;</div><div class='add'>+</div><div class='add'>+	u32 padding1[(0x0F8 - 0x08C) / sizeof(u32)];</div><div class='add'>+</div><div class='add'>+	u32 csfull;</div><div class='add'>+	u32 csdatain;</div><div class='add'>+	u32 csrx[HASH_CSR_COUNT];</div><div class='add'>+</div><div class='add'>+	u32 padding2[(0xFE0 - 0x1D0) / sizeof(u32)];</div><div class='add'>+</div><div class='add'>+	u32 periphid0;</div><div class='add'>+	u32 periphid1;</div><div class='add'>+	u32 periphid2;</div><div class='add'>+	u32 periphid3;</div><div class='add'>+</div><div class='add'>+	u32 cellid0;</div><div class='add'>+	u32 cellid1;</div><div class='add'>+	u32 cellid2;</div><div class='add'>+	u32 cellid3;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct hash_state - Hash context state.</div><div class='add'>+ * @temp_cr:	Temporary HASH Control Register.</div><div class='add'>+ * @str_reg:	HASH Start Register.</div><div class='add'>+ * @din_reg:	HASH Data Input Register.</div><div class='add'>+ * @csr[52]:	HASH Context Swap Registers 0-39.</div><div class='add'>+ * @csfull:	HASH Context Swap Registers 40 ie Status flags.</div><div class='add'>+ * @csdatain:	HASH Context Swap Registers 41 ie Input data.</div><div class='add'>+ * @buffer:	Working buffer for messages going to the hardware.</div><div class='add'>+ * @length:	Length of the part of message hashed so far (floor(N/64) * 64).</div><div class='add'>+ * @index:	Valid number of bytes in buffer (N % 64).</div><div class='add'>+ * @bit_index:	Valid number of bits in buffer (N % 8).</div><div class='add'>+ *</div><div class='add'>+ * This structure is used between context switches, i.e. when ongoing jobs are</div><div class='add'>+ * interupted with new jobs. When this happens we need to store intermediate</div><div class='add'>+ * results in software.</div><div class='add'>+ *</div><div class='add'>+ * WARNING: "index" is the  member of the structure, to be sure  that "buffer"</div><div class='add'>+ * is aligned on a 4-bytes boundary. This is highly implementation dependent</div><div class='add'>+ * and MUST be checked whenever this code is ported on new platforms.</div><div class='add'>+ */</div><div class='add'>+struct hash_state {</div><div class='add'>+	u32		temp_cr;</div><div class='add'>+	u32		str_reg;</div><div class='add'>+	u32		din_reg;</div><div class='add'>+	u32		csr[52];</div><div class='add'>+	u32		csfull;</div><div class='add'>+	u32		csdatain;</div><div class='add'>+	u32		buffer[HASH_BLOCK_SIZE / sizeof(u32)];</div><div class='add'>+	struct uint64	length;</div><div class='add'>+	u8		index;</div><div class='add'>+	u8		bit_index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum hash_device_id - HASH device ID.</div><div class='add'>+ * @HASH_DEVICE_ID_0: Hash hardware with ID 0</div><div class='add'>+ * @HASH_DEVICE_ID_1: Hash hardware with ID 1</div><div class='add'>+ */</div><div class='add'>+enum hash_device_id {</div><div class='add'>+	HASH_DEVICE_ID_0 = 0,</div><div class='add'>+	HASH_DEVICE_ID_1 = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum hash_data_format - HASH data format.</div><div class='add'>+ * @HASH_DATA_32_BITS:	32 bits data format</div><div class='add'>+ * @HASH_DATA_16_BITS:	16 bits data format</div><div class='add'>+ * @HASH_DATA_8_BITS:	8 bits data format.</div><div class='add'>+ * @HASH_DATA_1_BITS:	1 bit data format.</div><div class='add'>+ */</div><div class='add'>+enum hash_data_format {</div><div class='add'>+	HASH_DATA_32_BITS	= 0x0,</div><div class='add'>+	HASH_DATA_16_BITS	= 0x1,</div><div class='add'>+	HASH_DATA_8_BITS	= 0x2,</div><div class='add'>+	HASH_DATA_1_BIT		= 0x3</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum hash_algo - Enumeration for selecting between SHA1 or SHA2 algorithm.</div><div class='add'>+ * @HASH_ALGO_SHA1: Indicates that SHA1 is used.</div><div class='add'>+ * @HASH_ALGO_SHA2: Indicates that SHA2 (SHA256) is used.</div><div class='add'>+ */</div><div class='add'>+enum hash_algo {</div><div class='add'>+	HASH_ALGO_SHA1		= 0x0,</div><div class='add'>+	HASH_ALGO_SHA256	= 0x1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum hash_op - Enumeration for selecting between HASH or HMAC mode.</div><div class='add'>+ * @HASH_OPER_MODE_HASH: Indicates usage of normal HASH mode.</div><div class='add'>+ * @HASH_OPER_MODE_HMAC: Indicates usage of HMAC.</div><div class='add'>+ */</div><div class='add'>+enum hash_op {</div><div class='add'>+	HASH_OPER_MODE_HASH = 0x0,</div><div class='add'>+	HASH_OPER_MODE_HMAC = 0x1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct hash_config - Configuration data for the hardware.</div><div class='add'>+ * @data_format:	Format of data entered into the hash data in register.</div><div class='add'>+ * @algorithm:		Algorithm selection bit.</div><div class='add'>+ * @oper_mode:		Operating mode selection bit.</div><div class='add'>+ */</div><div class='add'>+struct hash_config {</div><div class='add'>+	int data_format;</div><div class='add'>+	int algorithm;</div><div class='add'>+	int oper_mode;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct hash_dma - Structure used for dma.</div><div class='add'>+ * @mask:		DMA capabilities bitmap mask.</div><div class='add'>+ * @complete:		Used to maintain state for a "completion".</div><div class='add'>+ * @chan_mem2hash:	DMA channel.</div><div class='add'>+ * @cfg_mem2hash:	DMA channel configuration.</div><div class='add'>+ * @sg_len:		Scatterlist length.</div><div class='add'>+ * @sg:			Scatterlist.</div><div class='add'>+ * @nents:		Number of sg entries.</div><div class='add'>+ */</div><div class='add'>+struct hash_dma {</div><div class='add'>+	dma_cap_mask_t		mask;</div><div class='add'>+	struct completion	complete;</div><div class='add'>+	struct dma_chan		*chan_mem2hash;</div><div class='add'>+	void			*cfg_mem2hash;</div><div class='add'>+	int			sg_len;</div><div class='add'>+	struct scatterlist	*sg;</div><div class='add'>+	int			nents;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct hash_ctx - The context used for hash calculations.</div><div class='add'>+ * @key:	The key used in the operation.</div><div class='add'>+ * @keylen:	The length of the key.</div><div class='add'>+ * @state:	The state of the current calculations.</div><div class='add'>+ * @config:	The current configuration.</div><div class='add'>+ * @digestsize:	The size of current digest.</div><div class='add'>+ * @device:	Pointer to the device structure.</div><div class='add'>+ */</div><div class='add'>+struct hash_ctx {</div><div class='add'>+	u8			*key;</div><div class='add'>+	u32			keylen;</div><div class='add'>+	struct hash_config	config;</div><div class='add'>+	int			digestsize;</div><div class='add'>+	struct hash_device_data	*device;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct hash_ctx - The request context used for hash calculations.</div><div class='add'>+ * @state:	The state of the current calculations.</div><div class='add'>+ * @dma_mode:	Used in special cases (workaround), e.g. need to change to</div><div class='add'>+ *		cpu mode, if not supported/working in dma mode.</div><div class='add'>+ * @updated:	Indicates if hardware is initialized for new operations.</div><div class='add'>+ */</div><div class='add'>+struct hash_req_ctx {</div><div class='add'>+	struct hash_state	state;</div><div class='add'>+	bool			dma_mode;</div><div class='add'>+	u8			updated;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct hash_device_data - structure for a hash device.</div><div class='add'>+ * @base:		Pointer to the hardware base address.</div><div class='add'>+ * @list_node:		For inclusion in klist.</div><div class='add'>+ * @dev:		Pointer to the device dev structure.</div><div class='add'>+ * @ctx_lock:		Spinlock for current_ctx.</div><div class='add'>+ * @current_ctx:	Pointer to the currently allocated context.</div><div class='add'>+ * @power_state:	TRUE = power state on, FALSE = power state off.</div><div class='add'>+ * @power_state_lock:	Spinlock for power_state.</div><div class='add'>+ * @regulator:		Pointer to the device's power control.</div><div class='add'>+ * @clk:		Pointer to the device's clock control.</div><div class='add'>+ * @restore_dev_state:	TRUE = saved state, FALSE = no saved state.</div><div class='add'>+ * @dma:		Structure used for dma.</div><div class='add'>+ */</div><div class='add'>+struct hash_device_data {</div><div class='add'>+	struct hash_register __iomem	*base;</div><div class='add'>+	struct klist_node	list_node;</div><div class='add'>+	struct device		*dev;</div><div class='add'>+	struct spinlock		ctx_lock;</div><div class='add'>+	struct hash_ctx		*current_ctx;</div><div class='add'>+	bool			power_state;</div><div class='add'>+	struct spinlock		power_state_lock;</div><div class='add'>+	struct regulator	*regulator;</div><div class='add'>+	struct clk		*clk;</div><div class='add'>+	bool			restore_dev_state;</div><div class='add'>+	struct hash_state	state; /* Used for saving and resuming state */</div><div class='add'>+	struct hash_dma		dma;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int hash_check_hw(struct hash_device_data *device_data);</div><div class='add'>+</div><div class='add'>+int hash_setconfiguration(struct hash_device_data *device_data,</div><div class='add'>+		struct hash_config *config);</div><div class='add'>+</div><div class='add'>+void hash_begin(struct hash_device_data *device_data, struct hash_ctx *ctx);</div><div class='add'>+</div><div class='add'>+void hash_get_digest(struct hash_device_data *device_data,</div><div class='add'>+		u8 *digest, int algorithm);</div><div class='add'>+</div><div class='add'>+int hash_hw_update(struct ahash_request *req);</div><div class='add'>+</div><div class='add'>+int hash_save_state(struct hash_device_data *device_data,</div><div class='add'>+		struct hash_state *state);</div><div class='add'>+</div><div class='add'>+int hash_resume_state(struct hash_device_data *device_data,</div><div class='add'>+		const struct hash_state *state);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/crypto/ux500/hash/hash_core.c b/drivers/crypto/ux500/hash/hash_core.c<br/>new file mode 100644<br/>index 000000000000..6dbb9ec709a3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/crypto/ux500/hash/hash_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/crypto/ux500/hash/hash_core.c</a></div><div class='hunk'>@@ -0,0 +1,2009 @@</div><div class='add'>+/*</div><div class='add'>+ * Cryptographic API.</div><div class='add'>+ * Support for Nomadik hardware crypto engine.</div><div class='add'>+</div><div class='add'>+ * Copyright (C) ST-Ericsson SA 2010</div><div class='add'>+ * Author: Shujuan Chen &lt;shujuan.chen@stericsson.com&gt; for ST-Ericsson</div><div class='add'>+ * Author: Joakim Bech &lt;joakim.xx.bech@stericsson.com&gt; for ST-Ericsson</div><div class='add'>+ * Author: Berne Hebark &lt;berne.herbark@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Niklas Hernaeus &lt;niklas.hernaeus@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * Author: Andreas Westin &lt;andreas.westin@stericsson.com&gt; for ST-Ericsson.</div><div class='add'>+ * License terms: GNU General Public License (GPL) version 2</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/klist.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;linux/dmaengine.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/sha.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/crypto-ux500.h&gt;</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hash_alg.h"</div><div class='add'>+</div><div class='add'>+#define DEV_DBG_NAME "hashX hashX:"</div><div class='add'>+</div><div class='add'>+static int hash_mode;</div><div class='add'>+module_param(hash_mode, int, 0);</div><div class='add'>+MODULE_PARM_DESC(hash_mode, "CPU or DMA mode. CPU = 0 (default), DMA = 1");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Pre-calculated empty message digests.</div><div class='add'>+ */</div><div class='add'>+static u8 zero_message_hash_sha1[SHA1_DIGEST_SIZE] = {</div><div class='add'>+	0xda, 0x39, 0xa3, 0xee, 0x5e, 0x6b, 0x4b, 0x0d,</div><div class='add'>+	0x32, 0x55, 0xbf, 0xef, 0x95, 0x60, 0x18, 0x90,</div><div class='add'>+	0xaf, 0xd8, 0x07, 0x09</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u8 zero_message_hash_sha256[SHA256_DIGEST_SIZE] = {</div><div class='add'>+	0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14,</div><div class='add'>+	0x9a, 0xfb, 0xf4, 0xc8, 0x99, 0x6f, 0xb9, 0x24,</div><div class='add'>+	0x27, 0xae, 0x41, 0xe4, 0x64, 0x9b, 0x93, 0x4c,</div><div class='add'>+	0xa4, 0x95, 0x99, 0x1b, 0x78, 0x52, 0xb8, 0x55</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* HMAC-SHA1, no key */</div><div class='add'>+static u8 zero_message_hmac_sha1[SHA1_DIGEST_SIZE] = {</div><div class='add'>+	0xfb, 0xdb, 0x1d, 0x1b, 0x18, 0xaa, 0x6c, 0x08,</div><div class='add'>+	0x32, 0x4b, 0x7d, 0x64, 0xb7, 0x1f, 0xb7, 0x63,</div><div class='add'>+	0x70, 0x69, 0x0e, 0x1d</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* HMAC-SHA256, no key */</div><div class='add'>+static u8 zero_message_hmac_sha256[SHA256_DIGEST_SIZE] = {</div><div class='add'>+	0xb6, 0x13, 0x67, 0x9a, 0x08, 0x14, 0xd9, 0xec,</div><div class='add'>+	0x77, 0x2f, 0x95, 0xd7, 0x78, 0xc3, 0x5f, 0xc5,</div><div class='add'>+	0xff, 0x16, 0x97, 0xc4, 0x93, 0x71, 0x56, 0x53,</div><div class='add'>+	0xc6, 0xc7, 0x12, 0x14, 0x42, 0x92, 0xc5, 0xad</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct hash_driver_data - data specific to the driver.</div><div class='add'>+ *</div><div class='add'>+ * @device_list:	A list of registered devices to choose from.</div><div class='add'>+ * @device_allocation:	A semaphore initialized with number of devices.</div><div class='add'>+ */</div><div class='add'>+struct hash_driver_data {</div><div class='add'>+	struct klist		device_list;</div><div class='add'>+	struct semaphore	device_allocation;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct hash_driver_data	driver_data;</div><div class='add'>+</div><div class='add'>+/* Declaration of functions */</div><div class='add'>+/**</div><div class='add'>+ * hash_messagepad - Pads a message and write the nblw bits.</div><div class='add'>+ * @device_data:	Structure for the hash device.</div><div class='add'>+ * @message:		Last word of a message</div><div class='add'>+ * @index_bytes:	The number of bytes in the last message</div><div class='add'>+ *</div><div class='add'>+ * This function manages the final part of the digest calculation, when less</div><div class='add'>+ * than 512 bits (64 bytes) remain in message. This means index_bytes &lt; 64.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static void hash_messagepad(struct hash_device_data *device_data,</div><div class='add'>+		const u32 *message, u8 index_bytes);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * release_hash_device - Releases a previously allocated hash device.</div><div class='add'>+ * @device_data:	Structure for the hash device.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static void release_hash_device(struct hash_device_data *device_data)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	device_data-&gt;current_ctx-&gt;device = NULL;</div><div class='add'>+	device_data-&gt;current_ctx = NULL;</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The down_interruptible part for this semaphore is called in</div><div class='add'>+	 * cryp_get_device_data.</div><div class='add'>+	 */</div><div class='add'>+	up(&amp;driver_data.device_allocation);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hash_dma_setup_channel(struct hash_device_data *device_data,</div><div class='add'>+				struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct hash_platform_data *platform_data = dev-&gt;platform_data;</div><div class='add'>+	dma_cap_zero(device_data-&gt;dma.mask);</div><div class='add'>+	dma_cap_set(DMA_SLAVE, device_data-&gt;dma.mask);</div><div class='add'>+</div><div class='add'>+	device_data-&gt;dma.cfg_mem2hash = platform_data-&gt;mem_to_engine;</div><div class='add'>+	device_data-&gt;dma.chan_mem2hash =</div><div class='add'>+		dma_request_channel(device_data-&gt;dma.mask,</div><div class='add'>+				platform_data-&gt;dma_filter,</div><div class='add'>+				device_data-&gt;dma.cfg_mem2hash);</div><div class='add'>+</div><div class='add'>+	init_completion(&amp;device_data-&gt;dma.complete);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hash_dma_callback(void *data)</div><div class='add'>+{</div><div class='add'>+	struct hash_ctx *ctx = (struct hash_ctx *) data;</div><div class='add'>+</div><div class='add'>+	complete(&amp;ctx-&gt;device-&gt;dma.complete);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hash_set_dma_transfer(struct hash_ctx *ctx, struct scatterlist *sg,</div><div class='add'>+		int len, enum dma_data_direction direction)</div><div class='add'>+{</div><div class='add'>+	struct dma_async_tx_descriptor *desc = NULL;</div><div class='add'>+	struct dma_chan *channel = NULL;</div><div class='add'>+	dma_cookie_t cookie;</div><div class='add'>+</div><div class='add'>+	if (direction != DMA_TO_DEVICE) {</div><div class='add'>+		dev_err(ctx-&gt;device-&gt;dev, "[%s] Invalid DMA direction",</div><div class='add'>+				__func__);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sg-&gt;length = ALIGN(sg-&gt;length, HASH_DMA_ALIGN_SIZE);</div><div class='add'>+</div><div class='add'>+	channel = ctx-&gt;device-&gt;dma.chan_mem2hash;</div><div class='add'>+	ctx-&gt;device-&gt;dma.sg = sg;</div><div class='add'>+	ctx-&gt;device-&gt;dma.sg_len = dma_map_sg(channel-&gt;device-&gt;dev,</div><div class='add'>+			ctx-&gt;device-&gt;dma.sg, ctx-&gt;device-&gt;dma.nents,</div><div class='add'>+			direction);</div><div class='add'>+</div><div class='add'>+	if (!ctx-&gt;device-&gt;dma.sg_len) {</div><div class='add'>+		dev_err(ctx-&gt;device-&gt;dev,</div><div class='add'>+				"[%s]: Could not map the sg list (TO_DEVICE)",</div><div class='add'>+				__func__);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(ctx-&gt;device-&gt;dev, "[%s]: Setting up DMA for buffer "</div><div class='add'>+			"(TO_DEVICE)", __func__);</div><div class='add'>+	desc = channel-&gt;device-&gt;device_prep_slave_sg(channel,</div><div class='add'>+			ctx-&gt;device-&gt;dma.sg, ctx-&gt;device-&gt;dma.sg_len,</div><div class='add'>+			direction, DMA_CTRL_ACK | DMA_PREP_INTERRUPT, NULL);</div><div class='add'>+	if (!desc) {</div><div class='add'>+		dev_err(ctx-&gt;device-&gt;dev,</div><div class='add'>+			"[%s]: device_prep_slave_sg() failed!", __func__);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	desc-&gt;callback = hash_dma_callback;</div><div class='add'>+	desc-&gt;callback_param = ctx;</div><div class='add'>+</div><div class='add'>+	cookie = desc-&gt;tx_submit(desc);</div><div class='add'>+	dma_async_issue_pending(channel);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hash_dma_done(struct hash_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	struct dma_chan *chan;</div><div class='add'>+</div><div class='add'>+	chan = ctx-&gt;device-&gt;dma.chan_mem2hash;</div><div class='add'>+	chan-&gt;device-&gt;device_control(chan, DMA_TERMINATE_ALL, 0);</div><div class='add'>+	dma_unmap_sg(chan-&gt;device-&gt;dev, ctx-&gt;device-&gt;dma.sg,</div><div class='add'>+			ctx-&gt;device-&gt;dma.sg_len, DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hash_dma_write(struct hash_ctx *ctx,</div><div class='add'>+		struct scatterlist *sg, int len)</div><div class='add'>+{</div><div class='add'>+	int error = hash_set_dma_transfer(ctx, sg, len, DMA_TO_DEVICE);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_dbg(ctx-&gt;device-&gt;dev, "[%s]: hash_set_dma_transfer() "</div><div class='add'>+			"failed", __func__);</div><div class='add'>+		return error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * get_empty_message_digest - Returns a pre-calculated digest for</div><div class='add'>+ * the empty message.</div><div class='add'>+ * @device_data:	Structure for the hash device.</div><div class='add'>+ * @zero_hash:		Buffer to return the empty message digest.</div><div class='add'>+ * @zero_hash_size:	Hash size of the empty message digest.</div><div class='add'>+ * @zero_digest:	True if zero_digest returned.</div><div class='add'>+ */</div><div class='add'>+static int get_empty_message_digest(</div><div class='add'>+		struct hash_device_data *device_data,</div><div class='add'>+		u8 *zero_hash, u32 *zero_hash_size, bool *zero_digest)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct hash_ctx *ctx = device_data-&gt;current_ctx;</div><div class='add'>+	*zero_digest = false;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Caller responsible for ctx != NULL.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (HASH_OPER_MODE_HASH == ctx-&gt;config.oper_mode) {</div><div class='add'>+		if (HASH_ALGO_SHA1 == ctx-&gt;config.algorithm) {</div><div class='add'>+			memcpy(zero_hash, &amp;zero_message_hash_sha1[0],</div><div class='add'>+					SHA1_DIGEST_SIZE);</div><div class='add'>+			*zero_hash_size = SHA1_DIGEST_SIZE;</div><div class='add'>+			*zero_digest = true;</div><div class='add'>+		} else if (HASH_ALGO_SHA256 ==</div><div class='add'>+				ctx-&gt;config.algorithm) {</div><div class='add'>+			memcpy(zero_hash, &amp;zero_message_hash_sha256[0],</div><div class='add'>+					SHA256_DIGEST_SIZE);</div><div class='add'>+			*zero_hash_size = SHA256_DIGEST_SIZE;</div><div class='add'>+			*zero_digest = true;</div><div class='add'>+		} else {</div><div class='add'>+			dev_err(device_data-&gt;dev, "[%s] "</div><div class='add'>+					"Incorrect algorithm!"</div><div class='add'>+					, __func__);</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	} else if (HASH_OPER_MODE_HMAC == ctx-&gt;config.oper_mode) {</div><div class='add'>+		if (!ctx-&gt;keylen) {</div><div class='add'>+			if (HASH_ALGO_SHA1 == ctx-&gt;config.algorithm) {</div><div class='add'>+				memcpy(zero_hash, &amp;zero_message_hmac_sha1[0],</div><div class='add'>+						SHA1_DIGEST_SIZE);</div><div class='add'>+				*zero_hash_size = SHA1_DIGEST_SIZE;</div><div class='add'>+				*zero_digest = true;</div><div class='add'>+			} else if (HASH_ALGO_SHA256 == ctx-&gt;config.algorithm) {</div><div class='add'>+				memcpy(zero_hash, &amp;zero_message_hmac_sha256[0],</div><div class='add'>+						SHA256_DIGEST_SIZE);</div><div class='add'>+				*zero_hash_size = SHA256_DIGEST_SIZE;</div><div class='add'>+				*zero_digest = true;</div><div class='add'>+			} else {</div><div class='add'>+				dev_err(device_data-&gt;dev, "[%s] "</div><div class='add'>+						"Incorrect algorithm!"</div><div class='add'>+						, __func__);</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			dev_dbg(device_data-&gt;dev, "[%s] Continue hash "</div><div class='add'>+					"calculation, since hmac key avalable",</div><div class='add'>+					__func__);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_disable_power - Request to disable power and clock.</div><div class='add'>+ * @device_data:	Structure for the hash device.</div><div class='add'>+ * @save_device_state:	If true, saves the current hw state.</div><div class='add'>+ *</div><div class='add'>+ * This function request for disabling power (regulator) and clock,</div><div class='add'>+ * and could also save current hw state.</div><div class='add'>+ */</div><div class='add'>+static int hash_disable_power(</div><div class='add'>+		struct hash_device_data *device_data,</div><div class='add'>+		bool			save_device_state)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct device *dev = device_data-&gt;dev;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;device_data-&gt;power_state_lock);</div><div class='add'>+	if (!device_data-&gt;power_state)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (save_device_state) {</div><div class='add'>+		hash_save_state(device_data,</div><div class='add'>+				&amp;device_data-&gt;state);</div><div class='add'>+		device_data-&gt;restore_dev_state = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk_disable(device_data-&gt;clk);</div><div class='add'>+	ret = regulator_disable(device_data-&gt;regulator);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev, "[%s] regulator_disable() failed!", __func__);</div><div class='add'>+</div><div class='add'>+	device_data-&gt;power_state = false;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;power_state_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_enable_power - Request to enable power and clock.</div><div class='add'>+ * @device_data:		Structure for the hash device.</div><div class='add'>+ * @restore_device_state:	If true, restores a previous saved hw state.</div><div class='add'>+ *</div><div class='add'>+ * This function request for enabling power (regulator) and clock,</div><div class='add'>+ * and could also restore a previously saved hw state.</div><div class='add'>+ */</div><div class='add'>+static int hash_enable_power(</div><div class='add'>+		struct hash_device_data *device_data,</div><div class='add'>+		bool			restore_device_state)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct device *dev = device_data-&gt;dev;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;device_data-&gt;power_state_lock);</div><div class='add'>+	if (!device_data-&gt;power_state) {</div><div class='add'>+		ret = regulator_enable(device_data-&gt;regulator);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "[%s]: regulator_enable() failed!",</div><div class='add'>+					__func__);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		ret = clk_enable(device_data-&gt;clk);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "[%s]: clk_enable() failed!",</div><div class='add'>+					__func__);</div><div class='add'>+			ret = regulator_disable(</div><div class='add'>+					device_data-&gt;regulator);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		device_data-&gt;power_state = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (device_data-&gt;restore_dev_state) {</div><div class='add'>+		if (restore_device_state) {</div><div class='add'>+			device_data-&gt;restore_dev_state = false;</div><div class='add'>+			hash_resume_state(device_data,</div><div class='add'>+				&amp;device_data-&gt;state);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;power_state_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_get_device_data - Checks for an available hash device and return it.</div><div class='add'>+ * @hash_ctx:		Structure for the hash context.</div><div class='add'>+ * @device_data:	Structure for the hash device.</div><div class='add'>+ *</div><div class='add'>+ * This function check for an available hash device and return it to</div><div class='add'>+ * the caller.</div><div class='add'>+ * Note! Caller need to release the device, calling up().</div><div class='add'>+ */</div><div class='add'>+static int hash_get_device_data(struct hash_ctx *ctx,</div><div class='add'>+				struct hash_device_data **device_data)</div><div class='add'>+{</div><div class='add'>+	int			ret;</div><div class='add'>+	struct klist_iter	device_iterator;</div><div class='add'>+	struct klist_node	*device_node;</div><div class='add'>+	struct hash_device_data *local_device_data = NULL;</div><div class='add'>+</div><div class='add'>+	/* Wait until a device is available */</div><div class='add'>+	ret = down_interruptible(&amp;driver_data.device_allocation);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;  /* Interrupted */</div><div class='add'>+</div><div class='add'>+	/* Select a device */</div><div class='add'>+	klist_iter_init(&amp;driver_data.device_list, &amp;device_iterator);</div><div class='add'>+	device_node = klist_next(&amp;device_iterator);</div><div class='add'>+	while (device_node) {</div><div class='add'>+		local_device_data = container_of(device_node,</div><div class='add'>+					   struct hash_device_data, list_node);</div><div class='add'>+		spin_lock(&amp;local_device_data-&gt;ctx_lock);</div><div class='add'>+		/* current_ctx allocates a device, NULL = unallocated */</div><div class='add'>+		if (local_device_data-&gt;current_ctx) {</div><div class='add'>+			device_node = klist_next(&amp;device_iterator);</div><div class='add'>+		} else {</div><div class='add'>+			local_device_data-&gt;current_ctx = ctx;</div><div class='add'>+			ctx-&gt;device = local_device_data;</div><div class='add'>+			spin_unlock(&amp;local_device_data-&gt;ctx_lock);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		spin_unlock(&amp;local_device_data-&gt;ctx_lock);</div><div class='add'>+	}</div><div class='add'>+	klist_iter_exit(&amp;device_iterator);</div><div class='add'>+</div><div class='add'>+	if (!device_node) {</div><div class='add'>+		/**</div><div class='add'>+		 * No free device found.</div><div class='add'>+		 * Since we allocated a device with down_interruptible, this</div><div class='add'>+		 * should not be able to happen.</div><div class='add'>+		 * Number of available devices, which are contained in</div><div class='add'>+		 * device_allocation, is therefore decremented by not doing</div><div class='add'>+		 * an up(device_allocation).</div><div class='add'>+		 */</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*device_data = local_device_data;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_hw_write_key - Writes the key to the hardware registries.</div><div class='add'>+ *</div><div class='add'>+ * @device_data:	Structure for the hash device.</div><div class='add'>+ * @key:		Key to be written.</div><div class='add'>+ * @keylen:		The lengt of the key.</div><div class='add'>+ *</div><div class='add'>+ * Note! This function DOES NOT write to the NBLW registry, even though</div><div class='add'>+ * specified in the the hw design spec. Either due to incorrect info in the</div><div class='add'>+ * spec or due to a bug in the hw.</div><div class='add'>+ */</div><div class='add'>+static void hash_hw_write_key(struct hash_device_data *device_data,</div><div class='add'>+		const u8 *key, unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	u32 word = 0;</div><div class='add'>+	int nwords = 1;</div><div class='add'>+</div><div class='add'>+	HASH_CLEAR_BITS(&amp;device_data-&gt;base-&gt;str, HASH_STR_NBLW_MASK);</div><div class='add'>+</div><div class='add'>+	while (keylen &gt;= 4) {</div><div class='add'>+		u32 *key_word = (u32 *)key;</div><div class='add'>+</div><div class='add'>+		HASH_SET_DIN(key_word, nwords);</div><div class='add'>+		keylen -= 4;</div><div class='add'>+		key += 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Take care of the remaining bytes in the last word */</div><div class='add'>+	if (keylen) {</div><div class='add'>+		word = 0;</div><div class='add'>+		while (keylen) {</div><div class='add'>+			word |= (key[keylen - 1] &lt;&lt; (8 * (keylen - 1)));</div><div class='add'>+			keylen--;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		HASH_SET_DIN(&amp;word, nwords);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (device_data-&gt;base-&gt;str &amp; HASH_STR_DCAL_MASK)</div><div class='add'>+		cpu_relax();</div><div class='add'>+</div><div class='add'>+	HASH_SET_DCAL;</div><div class='add'>+</div><div class='add'>+	while (device_data-&gt;base-&gt;str &amp; HASH_STR_DCAL_MASK)</div><div class='add'>+		cpu_relax();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * init_hash_hw - Initialise the hash hardware for a new calculation.</div><div class='add'>+ * @device_data:	Structure for the hash device.</div><div class='add'>+ * @ctx:		The hash context.</div><div class='add'>+ *</div><div class='add'>+ * This function will enable the bits needed to clear and start a new</div><div class='add'>+ * calculation.</div><div class='add'>+ */</div><div class='add'>+static int init_hash_hw(struct hash_device_data *device_data,</div><div class='add'>+		struct hash_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = hash_setconfiguration(device_data, &amp;ctx-&gt;config);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(device_data-&gt;dev, "[%s] hash_setconfiguration() "</div><div class='add'>+				"failed!", __func__);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hash_begin(device_data, ctx);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;config.oper_mode == HASH_OPER_MODE_HMAC)</div><div class='add'>+		hash_hw_write_key(device_data, ctx-&gt;key, ctx-&gt;keylen);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_get_nents - Return number of entries (nents) in scatterlist (sg).</div><div class='add'>+ *</div><div class='add'>+ * @sg:		Scatterlist.</div><div class='add'>+ * @size:	Size in bytes.</div><div class='add'>+ * @aligned:	True if sg data aligned to work in DMA mode.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static int hash_get_nents(struct scatterlist *sg, int size, bool *aligned)</div><div class='add'>+{</div><div class='add'>+	int nents = 0;</div><div class='add'>+	bool aligned_data = true;</div><div class='add'>+</div><div class='add'>+	while (size &gt; 0 &amp;&amp; sg) {</div><div class='add'>+		nents++;</div><div class='add'>+		size -= sg-&gt;length;</div><div class='add'>+</div><div class='add'>+		/* hash_set_dma_transfer will align last nent */</div><div class='add'>+		if ((aligned &amp;&amp; !IS_ALIGNED(sg-&gt;offset, HASH_DMA_ALIGN_SIZE))</div><div class='add'>+			|| (!IS_ALIGNED(sg-&gt;length, HASH_DMA_ALIGN_SIZE) &amp;&amp;</div><div class='add'>+				size &gt; 0))</div><div class='add'>+			aligned_data = false;</div><div class='add'>+</div><div class='add'>+		sg = sg_next(sg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (aligned)</div><div class='add'>+		*aligned = aligned_data;</div><div class='add'>+</div><div class='add'>+	if (size != 0)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	return nents;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_dma_valid_data - checks for dma valid sg data.</div><div class='add'>+ * @sg:		Scatterlist.</div><div class='add'>+ * @datasize:	Datasize in bytes.</div><div class='add'>+ *</div><div class='add'>+ * NOTE! This function checks for dma valid sg data, since dma</div><div class='add'>+ * only accept datasizes of even wordsize.</div><div class='add'>+ */</div><div class='add'>+static bool hash_dma_valid_data(struct scatterlist *sg, int datasize)</div><div class='add'>+{</div><div class='add'>+	bool aligned;</div><div class='add'>+</div><div class='add'>+	/* Need to include at least one nent, else error */</div><div class='add'>+	if (hash_get_nents(sg, datasize, &amp;aligned) &lt; 1)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return aligned;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_init - Common hash init function for SHA1/SHA2 (SHA256).</div><div class='add'>+ * @req: The hash request for the job.</div><div class='add'>+ *</div><div class='add'>+ * Initialize structures.</div><div class='add'>+ */</div><div class='add'>+static int hash_init(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	if (!ctx-&gt;key)</div><div class='add'>+		ctx-&gt;keylen = 0;</div><div class='add'>+</div><div class='add'>+	memset(&amp;req_ctx-&gt;state, 0, sizeof(struct hash_state));</div><div class='add'>+	req_ctx-&gt;updated = 0;</div><div class='add'>+	if (hash_mode == HASH_MODE_DMA) {</div><div class='add'>+		if (req-&gt;nbytes &lt; HASH_DMA_ALIGN_SIZE) {</div><div class='add'>+			req_ctx-&gt;dma_mode = false; /* Don't use DMA */</div><div class='add'>+</div><div class='add'>+			pr_debug(DEV_DBG_NAME " [%s] DMA mode, but direct "</div><div class='add'>+					"to CPU mode for data size &lt; %d",</div><div class='add'>+					__func__, HASH_DMA_ALIGN_SIZE);</div><div class='add'>+		} else {</div><div class='add'>+			if (req-&gt;nbytes &gt;= HASH_DMA_PERFORMANCE_MIN_SIZE &amp;&amp;</div><div class='add'>+					hash_dma_valid_data(req-&gt;src,</div><div class='add'>+						req-&gt;nbytes)) {</div><div class='add'>+				req_ctx-&gt;dma_mode = true;</div><div class='add'>+			} else {</div><div class='add'>+				req_ctx-&gt;dma_mode = false;</div><div class='add'>+				pr_debug(DEV_DBG_NAME " [%s] DMA mode, but use"</div><div class='add'>+						" CPU mode for datalength &lt; %d"</div><div class='add'>+						" or non-aligned data, except "</div><div class='add'>+						"in last nent", __func__,</div><div class='add'>+						HASH_DMA_PERFORMANCE_MIN_SIZE);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_processblock - This function processes a single block of 512 bits (64</div><div class='add'>+ *                     bytes), word aligned, starting at message.</div><div class='add'>+ * @device_data:	Structure for the hash device.</div><div class='add'>+ * @message:		Block (512 bits) of message to be written to</div><div class='add'>+ *			the HASH hardware.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static void hash_processblock(</div><div class='add'>+		struct hash_device_data *device_data,</div><div class='add'>+		const u32 *message, int length)</div><div class='add'>+{</div><div class='add'>+	int len = length / HASH_BYTES_PER_WORD;</div><div class='add'>+	/*</div><div class='add'>+	 * NBLW bits. Reset the number of bits in last word (NBLW).</div><div class='add'>+	 */</div><div class='add'>+	HASH_CLEAR_BITS(&amp;device_data-&gt;base-&gt;str, HASH_STR_NBLW_MASK);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Write message data to the HASH_DIN register.</div><div class='add'>+	 */</div><div class='add'>+	HASH_SET_DIN(message, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_messagepad - Pads a message and write the nblw bits.</div><div class='add'>+ * @device_data:	Structure for the hash device.</div><div class='add'>+ * @message:		Last word of a message.</div><div class='add'>+ * @index_bytes:	The number of bytes in the last message.</div><div class='add'>+ *</div><div class='add'>+ * This function manages the final part of the digest calculation, when less</div><div class='add'>+ * than 512 bits (64 bytes) remain in message. This means index_bytes &lt; 64.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static void hash_messagepad(struct hash_device_data *device_data,</div><div class='add'>+		const u32 *message, u8 index_bytes)</div><div class='add'>+{</div><div class='add'>+	int nwords = 1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Clear hash str register, only clear NBLW</div><div class='add'>+	 * since DCAL will be reset by hardware.</div><div class='add'>+	 */</div><div class='add'>+	HASH_CLEAR_BITS(&amp;device_data-&gt;base-&gt;str, HASH_STR_NBLW_MASK);</div><div class='add'>+</div><div class='add'>+	/* Main loop */</div><div class='add'>+	while (index_bytes &gt;= 4) {</div><div class='add'>+		HASH_SET_DIN(message, nwords);</div><div class='add'>+		index_bytes -= 4;</div><div class='add'>+		message++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (index_bytes)</div><div class='add'>+		HASH_SET_DIN(message, nwords);</div><div class='add'>+</div><div class='add'>+	while (device_data-&gt;base-&gt;str &amp; HASH_STR_DCAL_MASK)</div><div class='add'>+		cpu_relax();</div><div class='add'>+</div><div class='add'>+	/* num_of_bytes == 0 =&gt; NBLW &lt;- 0 (32 bits valid in DATAIN) */</div><div class='add'>+	HASH_SET_NBLW(index_bytes * 8);</div><div class='add'>+	dev_dbg(device_data-&gt;dev, "[%s] DIN=0x%08x NBLW=%d", __func__,</div><div class='add'>+			readl_relaxed(&amp;device_data-&gt;base-&gt;din),</div><div class='add'>+			(int)(readl_relaxed(&amp;device_data-&gt;base-&gt;str) &amp;</div><div class='add'>+				HASH_STR_NBLW_MASK));</div><div class='add'>+	HASH_SET_DCAL;</div><div class='add'>+	dev_dbg(device_data-&gt;dev, "[%s] after dcal -&gt; DIN=0x%08x NBLW=%d",</div><div class='add'>+			__func__, readl_relaxed(&amp;device_data-&gt;base-&gt;din),</div><div class='add'>+			(int)(readl_relaxed(&amp;device_data-&gt;base-&gt;str) &amp;</div><div class='add'>+				HASH_STR_NBLW_MASK));</div><div class='add'>+</div><div class='add'>+	while (device_data-&gt;base-&gt;str &amp; HASH_STR_DCAL_MASK)</div><div class='add'>+		cpu_relax();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_incrementlength - Increments the length of the current message.</div><div class='add'>+ * @ctx: Hash context</div><div class='add'>+ * @incr: Length of message processed already</div><div class='add'>+ *</div><div class='add'>+ * Overflow cannot occur, because conditions for overflow are checked in</div><div class='add'>+ * hash_hw_update.</div><div class='add'>+ */</div><div class='add'>+static void hash_incrementlength(struct hash_req_ctx *ctx, u32 incr)</div><div class='add'>+{</div><div class='add'>+	ctx-&gt;state.length.low_word += incr;</div><div class='add'>+</div><div class='add'>+	/* Check for wrap-around */</div><div class='add'>+	if (ctx-&gt;state.length.low_word &lt; incr)</div><div class='add'>+		ctx-&gt;state.length.high_word++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_setconfiguration - Sets the required configuration for the hash</div><div class='add'>+ *                         hardware.</div><div class='add'>+ * @device_data:	Structure for the hash device.</div><div class='add'>+ * @config:		Pointer to a configuration structure.</div><div class='add'>+ */</div><div class='add'>+int hash_setconfiguration(struct hash_device_data *device_data,</div><div class='add'>+		struct hash_config *config)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (config-&gt;algorithm != HASH_ALGO_SHA1 &amp;&amp;</div><div class='add'>+	    config-&gt;algorithm != HASH_ALGO_SHA256)</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * DATAFORM bits. Set the DATAFORM bits to 0b11, which means the data</div><div class='add'>+	 * to be written to HASH_DIN is considered as 32 bits.</div><div class='add'>+	 */</div><div class='add'>+	HASH_SET_DATA_FORMAT(config-&gt;data_format);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * ALGO bit. Set to 0b1 for SHA-1 and 0b0 for SHA-256</div><div class='add'>+	 */</div><div class='add'>+	switch (config-&gt;algorithm) {</div><div class='add'>+	case HASH_ALGO_SHA1:</div><div class='add'>+		HASH_SET_BITS(&amp;device_data-&gt;base-&gt;cr, HASH_CR_ALGO_MASK);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case HASH_ALGO_SHA256:</div><div class='add'>+		HASH_CLEAR_BITS(&amp;device_data-&gt;base-&gt;cr, HASH_CR_ALGO_MASK);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_err(device_data-&gt;dev, "[%s] Incorrect algorithm.",</div><div class='add'>+				__func__);</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * MODE bit. This bit selects between HASH or HMAC mode for the</div><div class='add'>+	 * selected algorithm. 0b0 = HASH and 0b1 = HMAC.</div><div class='add'>+	 */</div><div class='add'>+	if (HASH_OPER_MODE_HASH == config-&gt;oper_mode)</div><div class='add'>+		HASH_CLEAR_BITS(&amp;device_data-&gt;base-&gt;cr,</div><div class='add'>+				HASH_CR_MODE_MASK);</div><div class='add'>+	else if (HASH_OPER_MODE_HMAC == config-&gt;oper_mode) {</div><div class='add'>+		HASH_SET_BITS(&amp;device_data-&gt;base-&gt;cr,</div><div class='add'>+				HASH_CR_MODE_MASK);</div><div class='add'>+		if (device_data-&gt;current_ctx-&gt;keylen &gt; HASH_BLOCK_SIZE) {</div><div class='add'>+			/* Truncate key to blocksize */</div><div class='add'>+			dev_dbg(device_data-&gt;dev, "[%s] LKEY set", __func__);</div><div class='add'>+			HASH_SET_BITS(&amp;device_data-&gt;base-&gt;cr,</div><div class='add'>+					HASH_CR_LKEY_MASK);</div><div class='add'>+		} else {</div><div class='add'>+			dev_dbg(device_data-&gt;dev, "[%s] LKEY cleared",</div><div class='add'>+					__func__);</div><div class='add'>+			HASH_CLEAR_BITS(&amp;device_data-&gt;base-&gt;cr,</div><div class='add'>+					HASH_CR_LKEY_MASK);</div><div class='add'>+		}</div><div class='add'>+	} else {	/* Wrong hash mode */</div><div class='add'>+		ret = -EPERM;</div><div class='add'>+		dev_err(device_data-&gt;dev, "[%s] HASH_INVALID_PARAMETER!",</div><div class='add'>+				__func__);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_begin - This routine resets some globals and initializes the hash</div><div class='add'>+ *              hardware.</div><div class='add'>+ * @device_data:	Structure for the hash device.</div><div class='add'>+ * @ctx:		Hash context.</div><div class='add'>+ */</div><div class='add'>+void hash_begin(struct hash_device_data *device_data, struct hash_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	/* HW and SW initializations */</div><div class='add'>+	/* Note: there is no need to initialize buffer and digest members */</div><div class='add'>+</div><div class='add'>+	while (device_data-&gt;base-&gt;str &amp; HASH_STR_DCAL_MASK)</div><div class='add'>+		cpu_relax();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * INIT bit. Set this bit to 0b1 to reset the HASH processor core and</div><div class='add'>+	 * prepare the initialize the HASH accelerator to compute the message</div><div class='add'>+	 * digest of a new message.</div><div class='add'>+	 */</div><div class='add'>+	HASH_INITIALIZE;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * NBLW bits. Reset the number of bits in last word (NBLW).</div><div class='add'>+	 */</div><div class='add'>+	HASH_CLEAR_BITS(&amp;device_data-&gt;base-&gt;str, HASH_STR_NBLW_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hash_process_data(</div><div class='add'>+		struct hash_device_data *device_data,</div><div class='add'>+		struct hash_ctx *ctx, struct hash_req_ctx *req_ctx,</div><div class='add'>+		int msg_length, u8 *data_buffer, u8 *buffer, u8 *index)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 count;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		if ((*index + msg_length) &lt; HASH_BLOCK_SIZE) {</div><div class='add'>+			for (count = 0; count &lt; msg_length; count++) {</div><div class='add'>+				buffer[*index + count] =</div><div class='add'>+					*(data_buffer + count);</div><div class='add'>+			}</div><div class='add'>+			*index += msg_length;</div><div class='add'>+			msg_length = 0;</div><div class='add'>+		} else {</div><div class='add'>+			if (req_ctx-&gt;updated) {</div><div class='add'>+</div><div class='add'>+				ret = hash_resume_state(device_data,</div><div class='add'>+						&amp;device_data-&gt;state);</div><div class='add'>+				memmove(req_ctx-&gt;state.buffer,</div><div class='add'>+						device_data-&gt;state.buffer,</div><div class='add'>+						HASH_BLOCK_SIZE / sizeof(u32));</div><div class='add'>+				if (ret) {</div><div class='add'>+					dev_err(device_data-&gt;dev, "[%s] "</div><div class='add'>+							"hash_resume_state()"</div><div class='add'>+							" failed!", __func__);</div><div class='add'>+					goto out;</div><div class='add'>+				}</div><div class='add'>+			} else {</div><div class='add'>+				ret = init_hash_hw(device_data, ctx);</div><div class='add'>+				if (ret) {</div><div class='add'>+					dev_err(device_data-&gt;dev, "[%s] "</div><div class='add'>+							"init_hash_hw()"</div><div class='add'>+							" failed!", __func__);</div><div class='add'>+					goto out;</div><div class='add'>+				}</div><div class='add'>+				req_ctx-&gt;updated = 1;</div><div class='add'>+			}</div><div class='add'>+			/*</div><div class='add'>+			 * If 'data_buffer' is four byte aligned and</div><div class='add'>+			 * local buffer does not have any data, we can</div><div class='add'>+			 * write data directly from 'data_buffer' to</div><div class='add'>+			 * HW peripheral, otherwise we first copy data</div><div class='add'>+			 * to a local buffer</div><div class='add'>+			 */</div><div class='add'>+			if ((0 == (((u32)data_buffer) % 4))</div><div class='add'>+					&amp;&amp; (0 == *index))</div><div class='add'>+				hash_processblock(device_data,</div><div class='add'>+						(const u32 *)</div><div class='add'>+						data_buffer, HASH_BLOCK_SIZE);</div><div class='add'>+			else {</div><div class='add'>+				for (count = 0; count &lt;</div><div class='add'>+						(u32)(HASH_BLOCK_SIZE -</div><div class='add'>+							*index);</div><div class='add'>+						count++) {</div><div class='add'>+					buffer[*index + count] =</div><div class='add'>+						*(data_buffer + count);</div><div class='add'>+				}</div><div class='add'>+				hash_processblock(device_data,</div><div class='add'>+						(const u32 *)buffer,</div><div class='add'>+						HASH_BLOCK_SIZE);</div><div class='add'>+			}</div><div class='add'>+			hash_incrementlength(req_ctx, HASH_BLOCK_SIZE);</div><div class='add'>+			data_buffer += (HASH_BLOCK_SIZE - *index);</div><div class='add'>+</div><div class='add'>+			msg_length -= (HASH_BLOCK_SIZE - *index);</div><div class='add'>+			*index = 0;</div><div class='add'>+</div><div class='add'>+			ret = hash_save_state(device_data,</div><div class='add'>+					&amp;device_data-&gt;state);</div><div class='add'>+</div><div class='add'>+			memmove(device_data-&gt;state.buffer,</div><div class='add'>+					req_ctx-&gt;state.buffer,</div><div class='add'>+					HASH_BLOCK_SIZE / sizeof(u32));</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(device_data-&gt;dev, "[%s] "</div><div class='add'>+						"hash_save_state()"</div><div class='add'>+						" failed!", __func__);</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} while (msg_length != 0);</div><div class='add'>+out:</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_dma_final - The hash dma final function for SHA1/SHA256.</div><div class='add'>+ * @req:	The hash request for the job.</div><div class='add'>+ */</div><div class='add'>+static int hash_dma_final(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);</div><div class='add'>+	struct hash_device_data *device_data;</div><div class='add'>+	u8 digest[SHA256_DIGEST_SIZE];</div><div class='add'>+	int bytes_written = 0;</div><div class='add'>+</div><div class='add'>+	ret = hash_get_device_data(ctx, &amp;device_data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(device_data-&gt;dev, "[%s] (ctx=0x%x)!", __func__, (u32) ctx);</div><div class='add'>+</div><div class='add'>+	if (req_ctx-&gt;updated) {</div><div class='add'>+		ret = hash_resume_state(device_data, &amp;device_data-&gt;state);</div><div class='add'>+</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(device_data-&gt;dev, "[%s] hash_resume_state() "</div><div class='add'>+					"failed!", __func__);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!req_ctx-&gt;updated) {</div><div class='add'>+		ret = hash_setconfiguration(device_data, &amp;ctx-&gt;config);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(device_data-&gt;dev, "[%s] "</div><div class='add'>+					"hash_setconfiguration() failed!",</div><div class='add'>+					__func__);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Enable DMA input */</div><div class='add'>+		if (hash_mode != HASH_MODE_DMA || !req_ctx-&gt;dma_mode) {</div><div class='add'>+			HASH_CLEAR_BITS(&amp;device_data-&gt;base-&gt;cr,</div><div class='add'>+					HASH_CR_DMAE_MASK);</div><div class='add'>+		} else {</div><div class='add'>+			HASH_SET_BITS(&amp;device_data-&gt;base-&gt;cr,</div><div class='add'>+					HASH_CR_DMAE_MASK);</div><div class='add'>+			HASH_SET_BITS(&amp;device_data-&gt;base-&gt;cr,</div><div class='add'>+					HASH_CR_PRIVN_MASK);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		HASH_INITIALIZE;</div><div class='add'>+</div><div class='add'>+		if (ctx-&gt;config.oper_mode == HASH_OPER_MODE_HMAC)</div><div class='add'>+			hash_hw_write_key(device_data, ctx-&gt;key, ctx-&gt;keylen);</div><div class='add'>+</div><div class='add'>+		/* Number of bits in last word = (nbytes * 8) % 32 */</div><div class='add'>+		HASH_SET_NBLW((req-&gt;nbytes * 8) % 32);</div><div class='add'>+		req_ctx-&gt;updated = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Store the nents in the dma struct. */</div><div class='add'>+	ctx-&gt;device-&gt;dma.nents = hash_get_nents(req-&gt;src, req-&gt;nbytes, NULL);</div><div class='add'>+	if (!ctx-&gt;device-&gt;dma.nents) {</div><div class='add'>+		dev_err(device_data-&gt;dev, "[%s] "</div><div class='add'>+				"ctx-&gt;device-&gt;dma.nents = 0", __func__);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bytes_written = hash_dma_write(ctx, req-&gt;src, req-&gt;nbytes);</div><div class='add'>+	if (bytes_written != req-&gt;nbytes) {</div><div class='add'>+		dev_err(device_data-&gt;dev, "[%s] "</div><div class='add'>+				"hash_dma_write() failed!", __func__);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wait_for_completion(&amp;ctx-&gt;device-&gt;dma.complete);</div><div class='add'>+	hash_dma_done(ctx);</div><div class='add'>+</div><div class='add'>+	while (device_data-&gt;base-&gt;str &amp; HASH_STR_DCAL_MASK)</div><div class='add'>+		cpu_relax();</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;config.oper_mode == HASH_OPER_MODE_HMAC &amp;&amp; ctx-&gt;key) {</div><div class='add'>+		unsigned int keylen = ctx-&gt;keylen;</div><div class='add'>+		u8 *key = ctx-&gt;key;</div><div class='add'>+</div><div class='add'>+		dev_dbg(device_data-&gt;dev, "[%s] keylen: %d", __func__,</div><div class='add'>+				ctx-&gt;keylen);</div><div class='add'>+		hash_hw_write_key(device_data, key, keylen);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hash_get_digest(device_data, digest, ctx-&gt;config.algorithm);</div><div class='add'>+	memcpy(req-&gt;result, digest, ctx-&gt;digestsize);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	release_hash_device(device_data);</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Allocated in setkey, and only used in HMAC.</div><div class='add'>+	 */</div><div class='add'>+	kfree(ctx-&gt;key);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_hw_final - The final hash calculation function</div><div class='add'>+ * @req:	The hash request for the job.</div><div class='add'>+ */</div><div class='add'>+int hash_hw_final(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);</div><div class='add'>+	struct hash_device_data *device_data;</div><div class='add'>+	u8 digest[SHA256_DIGEST_SIZE];</div><div class='add'>+</div><div class='add'>+	ret = hash_get_device_data(ctx, &amp;device_data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(device_data-&gt;dev, "[%s] (ctx=0x%x)!", __func__, (u32) ctx);</div><div class='add'>+</div><div class='add'>+	if (req_ctx-&gt;updated) {</div><div class='add'>+		ret = hash_resume_state(device_data, &amp;device_data-&gt;state);</div><div class='add'>+</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(device_data-&gt;dev, "[%s] hash_resume_state() "</div><div class='add'>+					"failed!", __func__);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	} else if (req-&gt;nbytes == 0 &amp;&amp; ctx-&gt;keylen == 0) {</div><div class='add'>+		u8 zero_hash[SHA256_DIGEST_SIZE];</div><div class='add'>+		u32 zero_hash_size = 0;</div><div class='add'>+		bool zero_digest = false;</div><div class='add'>+		/**</div><div class='add'>+		 * Use a pre-calculated empty message digest</div><div class='add'>+		 * (workaround since hw return zeroes, hw bug!?)</div><div class='add'>+		 */</div><div class='add'>+		ret = get_empty_message_digest(device_data, &amp;zero_hash[0],</div><div class='add'>+				&amp;zero_hash_size, &amp;zero_digest);</div><div class='add'>+		if (!ret &amp;&amp; likely(zero_hash_size == ctx-&gt;digestsize) &amp;&amp;</div><div class='add'>+				zero_digest) {</div><div class='add'>+			memcpy(req-&gt;result, &amp;zero_hash[0], ctx-&gt;digestsize);</div><div class='add'>+			goto out;</div><div class='add'>+		} else if (!ret &amp;&amp; !zero_digest) {</div><div class='add'>+			dev_dbg(device_data-&gt;dev, "[%s] HMAC zero msg with "</div><div class='add'>+					"key, continue...", __func__);</div><div class='add'>+		} else {</div><div class='add'>+			dev_err(device_data-&gt;dev, "[%s] ret=%d, or wrong "</div><div class='add'>+					"digest size? %s", __func__, ret,</div><div class='add'>+					(zero_hash_size == ctx-&gt;digestsize) ?</div><div class='add'>+					"true" : "false");</div><div class='add'>+			/* Return error */</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	} else if (req-&gt;nbytes == 0 &amp;&amp; ctx-&gt;keylen &gt; 0) {</div><div class='add'>+		dev_err(device_data-&gt;dev, "[%s] Empty message with "</div><div class='add'>+				"keylength &gt; 0, NOT supported.", __func__);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!req_ctx-&gt;updated) {</div><div class='add'>+		ret = init_hash_hw(device_data, ctx);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(device_data-&gt;dev, "[%s] init_hash_hw() "</div><div class='add'>+					"failed!", __func__);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (req_ctx-&gt;state.index) {</div><div class='add'>+		hash_messagepad(device_data, req_ctx-&gt;state.buffer,</div><div class='add'>+				req_ctx-&gt;state.index);</div><div class='add'>+	} else {</div><div class='add'>+		HASH_SET_DCAL;</div><div class='add'>+		while (device_data-&gt;base-&gt;str &amp; HASH_STR_DCAL_MASK)</div><div class='add'>+			cpu_relax();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;config.oper_mode == HASH_OPER_MODE_HMAC &amp;&amp; ctx-&gt;key) {</div><div class='add'>+		unsigned int keylen = ctx-&gt;keylen;</div><div class='add'>+		u8 *key = ctx-&gt;key;</div><div class='add'>+</div><div class='add'>+		dev_dbg(device_data-&gt;dev, "[%s] keylen: %d", __func__,</div><div class='add'>+				ctx-&gt;keylen);</div><div class='add'>+		hash_hw_write_key(device_data, key, keylen);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hash_get_digest(device_data, digest, ctx-&gt;config.algorithm);</div><div class='add'>+	memcpy(req-&gt;result, digest, ctx-&gt;digestsize);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	release_hash_device(device_data);</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Allocated in setkey, and only used in HMAC.</div><div class='add'>+	 */</div><div class='add'>+	kfree(ctx-&gt;key);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_hw_update - Updates current HASH computation hashing another part of</div><div class='add'>+ *                  the message.</div><div class='add'>+ * @req:	Byte array containing the message to be hashed (caller</div><div class='add'>+ *		allocated).</div><div class='add'>+ */</div><div class='add'>+int hash_hw_update(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u8 index = 0;</div><div class='add'>+	u8 *buffer;</div><div class='add'>+	struct hash_device_data *device_data;</div><div class='add'>+	u8 *data_buffer;</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);</div><div class='add'>+	struct crypto_hash_walk walk;</div><div class='add'>+	int msg_length = crypto_hash_walk_first(req, &amp;walk);</div><div class='add'>+</div><div class='add'>+	/* Empty message ("") is correct indata */</div><div class='add'>+	if (msg_length == 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	index = req_ctx-&gt;state.index;</div><div class='add'>+	buffer = (u8 *)req_ctx-&gt;state.buffer;</div><div class='add'>+</div><div class='add'>+	/* Check if ctx-&gt;state.length + msg_length</div><div class='add'>+	   overflows */</div><div class='add'>+	if (msg_length &gt; (req_ctx-&gt;state.length.low_word + msg_length) &amp;&amp;</div><div class='add'>+			HASH_HIGH_WORD_MAX_VAL ==</div><div class='add'>+			req_ctx-&gt;state.length.high_word) {</div><div class='add'>+		pr_err(DEV_DBG_NAME " [%s] HASH_MSG_LENGTH_OVERFLOW!",</div><div class='add'>+				__func__);</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hash_get_device_data(ctx, &amp;device_data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Main loop */</div><div class='add'>+	while (0 != msg_length) {</div><div class='add'>+		data_buffer = walk.data;</div><div class='add'>+		ret = hash_process_data(device_data, ctx, req_ctx, msg_length,</div><div class='add'>+				data_buffer, buffer, &amp;index);</div><div class='add'>+</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(device_data-&gt;dev, "[%s] hash_internal_hw_"</div><div class='add'>+					"update() failed!", __func__);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		msg_length = crypto_hash_walk_done(&amp;walk, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	req_ctx-&gt;state.index = index;</div><div class='add'>+	dev_dbg(device_data-&gt;dev, "[%s] indata length=%d, bin=%d))",</div><div class='add'>+			__func__, req_ctx-&gt;state.index,</div><div class='add'>+			req_ctx-&gt;state.bit_index);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	release_hash_device(device_data);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_resume_state - Function that resumes the state of an calculation.</div><div class='add'>+ * @device_data:	Pointer to the device structure.</div><div class='add'>+ * @device_state:	The state to be restored in the hash hardware</div><div class='add'>+ */</div><div class='add'>+int hash_resume_state(struct hash_device_data *device_data,</div><div class='add'>+		const struct hash_state *device_state)</div><div class='add'>+{</div><div class='add'>+	u32 temp_cr;</div><div class='add'>+	s32 count;</div><div class='add'>+	int hash_mode = HASH_OPER_MODE_HASH;</div><div class='add'>+</div><div class='add'>+	if (NULL == device_state) {</div><div class='add'>+		dev_err(device_data-&gt;dev, "[%s] HASH_INVALID_PARAMETER!",</div><div class='add'>+				__func__);</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check correctness of index and length members */</div><div class='add'>+	if (device_state-&gt;index &gt; HASH_BLOCK_SIZE</div><div class='add'>+	    || (device_state-&gt;length.low_word % HASH_BLOCK_SIZE) != 0) {</div><div class='add'>+		dev_err(device_data-&gt;dev, "[%s] HASH_INVALID_PARAMETER!",</div><div class='add'>+				__func__);</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * INIT bit. Set this bit to 0b1 to reset the HASH processor core and</div><div class='add'>+	 * prepare the initialize the HASH accelerator to compute the message</div><div class='add'>+	 * digest of a new message.</div><div class='add'>+	 */</div><div class='add'>+	HASH_INITIALIZE;</div><div class='add'>+</div><div class='add'>+	temp_cr = device_state-&gt;temp_cr;</div><div class='add'>+	writel_relaxed(temp_cr &amp; HASH_CR_RESUME_MASK, &amp;device_data-&gt;base-&gt;cr);</div><div class='add'>+</div><div class='add'>+	if (device_data-&gt;base-&gt;cr &amp; HASH_CR_MODE_MASK)</div><div class='add'>+		hash_mode = HASH_OPER_MODE_HMAC;</div><div class='add'>+	else</div><div class='add'>+		hash_mode = HASH_OPER_MODE_HASH;</div><div class='add'>+</div><div class='add'>+	for (count = 0; count &lt; HASH_CSR_COUNT; count++) {</div><div class='add'>+		if ((count &gt;= 36) &amp;&amp; (hash_mode == HASH_OPER_MODE_HASH))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		writel_relaxed(device_state-&gt;csr[count],</div><div class='add'>+				&amp;device_data-&gt;base-&gt;csrx[count]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel_relaxed(device_state-&gt;csfull, &amp;device_data-&gt;base-&gt;csfull);</div><div class='add'>+	writel_relaxed(device_state-&gt;csdatain, &amp;device_data-&gt;base-&gt;csdatain);</div><div class='add'>+</div><div class='add'>+	writel_relaxed(device_state-&gt;str_reg, &amp;device_data-&gt;base-&gt;str);</div><div class='add'>+	writel_relaxed(temp_cr, &amp;device_data-&gt;base-&gt;cr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_save_state - Function that saves the state of hardware.</div><div class='add'>+ * @device_data:	Pointer to the device structure.</div><div class='add'>+ * @device_state:	The strucure where the hardware state should be saved.</div><div class='add'>+ */</div><div class='add'>+int hash_save_state(struct hash_device_data *device_data,</div><div class='add'>+		struct hash_state *device_state)</div><div class='add'>+{</div><div class='add'>+	u32 temp_cr;</div><div class='add'>+	u32 count;</div><div class='add'>+	int hash_mode = HASH_OPER_MODE_HASH;</div><div class='add'>+</div><div class='add'>+	if (NULL == device_state) {</div><div class='add'>+		dev_err(device_data-&gt;dev, "[%s] HASH_INVALID_PARAMETER!",</div><div class='add'>+				__func__);</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write dummy value to force digest intermediate calculation. This</div><div class='add'>+	 * actually makes sure that there isn't any ongoing calculation in the</div><div class='add'>+	 * hardware.</div><div class='add'>+	 */</div><div class='add'>+	while (device_data-&gt;base-&gt;str &amp; HASH_STR_DCAL_MASK)</div><div class='add'>+		cpu_relax();</div><div class='add'>+</div><div class='add'>+	temp_cr = readl_relaxed(&amp;device_data-&gt;base-&gt;cr);</div><div class='add'>+</div><div class='add'>+	device_state-&gt;str_reg = readl_relaxed(&amp;device_data-&gt;base-&gt;str);</div><div class='add'>+</div><div class='add'>+	device_state-&gt;din_reg = readl_relaxed(&amp;device_data-&gt;base-&gt;din);</div><div class='add'>+</div><div class='add'>+	if (device_data-&gt;base-&gt;cr &amp; HASH_CR_MODE_MASK)</div><div class='add'>+		hash_mode = HASH_OPER_MODE_HMAC;</div><div class='add'>+	else</div><div class='add'>+		hash_mode = HASH_OPER_MODE_HASH;</div><div class='add'>+</div><div class='add'>+	for (count = 0; count &lt; HASH_CSR_COUNT; count++) {</div><div class='add'>+		if ((count &gt;= 36) &amp;&amp; (hash_mode == HASH_OPER_MODE_HASH))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		device_state-&gt;csr[count] =</div><div class='add'>+			readl_relaxed(&amp;device_data-&gt;base-&gt;csrx[count]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	device_state-&gt;csfull = readl_relaxed(&amp;device_data-&gt;base-&gt;csfull);</div><div class='add'>+	device_state-&gt;csdatain = readl_relaxed(&amp;device_data-&gt;base-&gt;csdatain);</div><div class='add'>+</div><div class='add'>+	device_state-&gt;temp_cr = temp_cr;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_check_hw - This routine checks for peripheral Ids and PCell Ids.</div><div class='add'>+ * @device_data:</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+int hash_check_hw(struct hash_device_data *device_data)</div><div class='add'>+{</div><div class='add'>+	/* Checking Peripheral Ids  */</div><div class='add'>+	if (HASH_P_ID0 == readl_relaxed(&amp;device_data-&gt;base-&gt;periphid0)</div><div class='add'>+		&amp;&amp; HASH_P_ID1 == readl_relaxed(&amp;device_data-&gt;base-&gt;periphid1)</div><div class='add'>+		&amp;&amp; HASH_P_ID2 == readl_relaxed(&amp;device_data-&gt;base-&gt;periphid2)</div><div class='add'>+		&amp;&amp; HASH_P_ID3 == readl_relaxed(&amp;device_data-&gt;base-&gt;periphid3)</div><div class='add'>+		&amp;&amp; HASH_CELL_ID0 == readl_relaxed(&amp;device_data-&gt;base-&gt;cellid0)</div><div class='add'>+		&amp;&amp; HASH_CELL_ID1 == readl_relaxed(&amp;device_data-&gt;base-&gt;cellid1)</div><div class='add'>+		&amp;&amp; HASH_CELL_ID2 == readl_relaxed(&amp;device_data-&gt;base-&gt;cellid2)</div><div class='add'>+		&amp;&amp; HASH_CELL_ID3 == readl_relaxed(&amp;device_data-&gt;base-&gt;cellid3)</div><div class='add'>+	   ) {</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_err(device_data-&gt;dev, "[%s] HASH_UNSUPPORTED_HW!",</div><div class='add'>+			__func__);</div><div class='add'>+	return -ENOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_get_digest - Gets the digest.</div><div class='add'>+ * @device_data:	Pointer to the device structure.</div><div class='add'>+ * @digest:		User allocated byte array for the calculated digest.</div><div class='add'>+ * @algorithm:		The algorithm in use.</div><div class='add'>+ */</div><div class='add'>+void hash_get_digest(struct hash_device_data *device_data,</div><div class='add'>+		u8 *digest, int algorithm)</div><div class='add'>+{</div><div class='add'>+	u32 temp_hx_val, count;</div><div class='add'>+	int loop_ctr;</div><div class='add'>+</div><div class='add'>+	if (algorithm != HASH_ALGO_SHA1 &amp;&amp; algorithm != HASH_ALGO_SHA256) {</div><div class='add'>+		dev_err(device_data-&gt;dev, "[%s] Incorrect algorithm %d",</div><div class='add'>+				__func__, algorithm);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (algorithm == HASH_ALGO_SHA1)</div><div class='add'>+		loop_ctr = SHA1_DIGEST_SIZE / sizeof(u32);</div><div class='add'>+	else</div><div class='add'>+		loop_ctr = SHA256_DIGEST_SIZE / sizeof(u32);</div><div class='add'>+</div><div class='add'>+	dev_dbg(device_data-&gt;dev, "[%s] digest array:(0x%x)",</div><div class='add'>+			__func__, (u32) digest);</div><div class='add'>+</div><div class='add'>+	/* Copy result into digest array */</div><div class='add'>+	for (count = 0; count &lt; loop_ctr; count++) {</div><div class='add'>+		temp_hx_val = readl_relaxed(&amp;device_data-&gt;base-&gt;hx[count]);</div><div class='add'>+		digest[count * 4] = (u8) ((temp_hx_val &gt;&gt; 24) &amp; 0xFF);</div><div class='add'>+		digest[count * 4 + 1] = (u8) ((temp_hx_val &gt;&gt; 16) &amp; 0xFF);</div><div class='add'>+		digest[count * 4 + 2] = (u8) ((temp_hx_val &gt;&gt; 8) &amp; 0xFF);</div><div class='add'>+		digest[count * 4 + 3] = (u8) ((temp_hx_val &gt;&gt; 0) &amp; 0xFF);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_update - The hash update function for SHA1/SHA2 (SHA256).</div><div class='add'>+ * @req: The hash request for the job.</div><div class='add'>+ */</div><div class='add'>+static int ahash_update(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	if (hash_mode != HASH_MODE_DMA || !req_ctx-&gt;dma_mode)</div><div class='add'>+		ret = hash_hw_update(req);</div><div class='add'>+	/* Skip update for DMA, all data will be passed to DMA in final */</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err(DEV_DBG_NAME " [%s] hash_hw_update() failed!",</div><div class='add'>+				__func__);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_final - The hash final function for SHA1/SHA2 (SHA256).</div><div class='add'>+ * @req:	The hash request for the job.</div><div class='add'>+ */</div><div class='add'>+static int ahash_final(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct hash_req_ctx *req_ctx = ahash_request_ctx(req);</div><div class='add'>+</div><div class='add'>+	pr_debug(DEV_DBG_NAME " [%s] data size: %d", __func__, req-&gt;nbytes);</div><div class='add'>+</div><div class='add'>+	if ((hash_mode == HASH_MODE_DMA) &amp;&amp; req_ctx-&gt;dma_mode)</div><div class='add'>+		ret = hash_dma_final(req);</div><div class='add'>+	else</div><div class='add'>+		ret = hash_hw_final(req);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err(DEV_DBG_NAME " [%s] hash_hw/dma_final() failed",</div><div class='add'>+				__func__);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hash_setkey(struct crypto_ahash *tfm,</div><div class='add'>+		const u8 *key, unsigned int keylen, int alg)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Freed in final.</div><div class='add'>+	 */</div><div class='add'>+	ctx-&gt;key = kmalloc(keylen, GFP_KERNEL);</div><div class='add'>+	if (!ctx-&gt;key) {</div><div class='add'>+		pr_err(DEV_DBG_NAME " [%s] Failed to allocate ctx-&gt;key "</div><div class='add'>+		       "for %d\n", __func__, alg);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(ctx-&gt;key, key, keylen);</div><div class='add'>+	ctx-&gt;keylen = keylen;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ahash_sha1_init(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;config.data_format = HASH_DATA_8_BITS;</div><div class='add'>+	ctx-&gt;config.algorithm = HASH_ALGO_SHA1;</div><div class='add'>+	ctx-&gt;config.oper_mode = HASH_OPER_MODE_HASH;</div><div class='add'>+	ctx-&gt;digestsize = SHA1_DIGEST_SIZE;</div><div class='add'>+</div><div class='add'>+	return hash_init(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ahash_sha256_init(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;config.data_format = HASH_DATA_8_BITS;</div><div class='add'>+	ctx-&gt;config.algorithm = HASH_ALGO_SHA256;</div><div class='add'>+	ctx-&gt;config.oper_mode = HASH_OPER_MODE_HASH;</div><div class='add'>+	ctx-&gt;digestsize = SHA256_DIGEST_SIZE;</div><div class='add'>+</div><div class='add'>+	return hash_init(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ahash_sha1_digest(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	int ret2, ret1;</div><div class='add'>+</div><div class='add'>+	ret1 = ahash_sha1_init(req);</div><div class='add'>+	if (ret1)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret1 = ahash_update(req);</div><div class='add'>+	ret2 = ahash_final(req);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret1 ? ret1 : ret2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ahash_sha256_digest(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	int ret2, ret1;</div><div class='add'>+</div><div class='add'>+	ret1 = ahash_sha256_init(req);</div><div class='add'>+	if (ret1)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret1 = ahash_update(req);</div><div class='add'>+	ret2 = ahash_final(req);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret1 ? ret1 : ret2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_sha1_init(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;config.data_format	= HASH_DATA_8_BITS;</div><div class='add'>+	ctx-&gt;config.algorithm	= HASH_ALGO_SHA1;</div><div class='add'>+	ctx-&gt;config.oper_mode	= HASH_OPER_MODE_HMAC;</div><div class='add'>+	ctx-&gt;digestsize		= SHA1_DIGEST_SIZE;</div><div class='add'>+</div><div class='add'>+	return hash_init(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_sha256_init(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	struct hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;config.data_format	= HASH_DATA_8_BITS;</div><div class='add'>+	ctx-&gt;config.algorithm	= HASH_ALGO_SHA256;</div><div class='add'>+	ctx-&gt;config.oper_mode	= HASH_OPER_MODE_HMAC;</div><div class='add'>+	ctx-&gt;digestsize		= SHA256_DIGEST_SIZE;</div><div class='add'>+</div><div class='add'>+	return hash_init(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_sha1_digest(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	int ret2, ret1;</div><div class='add'>+</div><div class='add'>+	ret1 = hmac_sha1_init(req);</div><div class='add'>+	if (ret1)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret1 = ahash_update(req);</div><div class='add'>+	ret2 = ahash_final(req);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret1 ? ret1 : ret2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_sha256_digest(struct ahash_request *req)</div><div class='add'>+{</div><div class='add'>+	int ret2, ret1;</div><div class='add'>+</div><div class='add'>+	ret1 = hmac_sha256_init(req);</div><div class='add'>+	if (ret1)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret1 = ahash_update(req);</div><div class='add'>+	ret2 = ahash_final(req);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret1 ? ret1 : ret2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_sha1_setkey(struct crypto_ahash *tfm,</div><div class='add'>+		const u8 *key, unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	return hash_setkey(tfm, key, keylen, HASH_ALGO_SHA1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_sha256_setkey(struct crypto_ahash *tfm,</div><div class='add'>+		const u8 *key, unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	return hash_setkey(tfm, key, keylen, HASH_ALGO_SHA256);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct hash_algo_template {</div><div class='add'>+	struct hash_config conf;</div><div class='add'>+	struct ahash_alg hash;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int hash_cra_init(struct crypto_tfm *tfm)</div><div class='add'>+{</div><div class='add'>+	struct hash_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct crypto_alg *alg = tfm-&gt;__crt_alg;</div><div class='add'>+	struct hash_algo_template *hash_alg;</div><div class='add'>+</div><div class='add'>+	hash_alg = container_of(__crypto_ahash_alg(alg),</div><div class='add'>+			struct hash_algo_template,</div><div class='add'>+			hash);</div><div class='add'>+</div><div class='add'>+	crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),</div><div class='add'>+			sizeof(struct hash_req_ctx));</div><div class='add'>+</div><div class='add'>+	ctx-&gt;config.data_format = HASH_DATA_8_BITS;</div><div class='add'>+	ctx-&gt;config.algorithm = hash_alg-&gt;conf.algorithm;</div><div class='add'>+	ctx-&gt;config.oper_mode = hash_alg-&gt;conf.oper_mode;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;digestsize = hash_alg-&gt;hash.halg.digestsize;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct hash_algo_template hash_algs[] = {</div><div class='add'>+	{</div><div class='add'>+			.conf.algorithm	= HASH_ALGO_SHA1,</div><div class='add'>+			.conf.oper_mode	= HASH_OPER_MODE_HASH,</div><div class='add'>+			.hash = {</div><div class='add'>+				.init = hash_init,</div><div class='add'>+				.update = ahash_update,</div><div class='add'>+				.final = ahash_final,</div><div class='add'>+				.digest = ahash_sha1_digest,</div><div class='add'>+				.halg.digestsize = SHA1_DIGEST_SIZE,</div><div class='add'>+				.halg.statesize = sizeof(struct hash_ctx),</div><div class='add'>+				.halg.base = {</div><div class='add'>+					.cra_name = "sha1",</div><div class='add'>+					.cra_driver_name = "sha1-ux500",</div><div class='add'>+					.cra_flags = CRYPTO_ALG_TYPE_AHASH |</div><div class='add'>+							CRYPTO_ALG_ASYNC,</div><div class='add'>+					.cra_blocksize = SHA1_BLOCK_SIZE,</div><div class='add'>+					.cra_ctxsize = sizeof(struct hash_ctx),</div><div class='add'>+					.cra_init = hash_cra_init,</div><div class='add'>+					.cra_module = THIS_MODULE,</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+			.conf.algorithm		= HASH_ALGO_SHA256,</div><div class='add'>+			.conf.oper_mode		= HASH_OPER_MODE_HASH,</div><div class='add'>+			.hash = {</div><div class='add'>+				.init = hash_init,</div><div class='add'>+				.update	= ahash_update,</div><div class='add'>+				.final = ahash_final,</div><div class='add'>+				.digest = ahash_sha256_digest,</div><div class='add'>+				.halg.digestsize = SHA256_DIGEST_SIZE,</div><div class='add'>+				.halg.statesize = sizeof(struct hash_ctx),</div><div class='add'>+				.halg.base = {</div><div class='add'>+					.cra_name = "sha256",</div><div class='add'>+					.cra_driver_name = "sha256-ux500",</div><div class='add'>+					.cra_flags = CRYPTO_ALG_TYPE_AHASH |</div><div class='add'>+							CRYPTO_ALG_ASYNC,</div><div class='add'>+					.cra_blocksize = SHA256_BLOCK_SIZE,</div><div class='add'>+					.cra_ctxsize = sizeof(struct hash_ctx),</div><div class='add'>+					.cra_type = &amp;crypto_ahash_type,</div><div class='add'>+					.cra_init = hash_cra_init,</div><div class='add'>+					.cra_module = THIS_MODULE,</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+			.conf.algorithm		= HASH_ALGO_SHA1,</div><div class='add'>+			.conf.oper_mode		= HASH_OPER_MODE_HMAC,</div><div class='add'>+			.hash = {</div><div class='add'>+				.init = hash_init,</div><div class='add'>+				.update = ahash_update,</div><div class='add'>+				.final = ahash_final,</div><div class='add'>+				.digest = hmac_sha1_digest,</div><div class='add'>+				.setkey = hmac_sha1_setkey,</div><div class='add'>+				.halg.digestsize = SHA1_DIGEST_SIZE,</div><div class='add'>+				.halg.statesize = sizeof(struct hash_ctx),</div><div class='add'>+				.halg.base = {</div><div class='add'>+					.cra_name = "hmac(sha1)",</div><div class='add'>+					.cra_driver_name = "hmac-sha1-ux500",</div><div class='add'>+					.cra_flags = CRYPTO_ALG_TYPE_AHASH |</div><div class='add'>+							CRYPTO_ALG_ASYNC,</div><div class='add'>+					.cra_blocksize = SHA1_BLOCK_SIZE,</div><div class='add'>+					.cra_ctxsize = sizeof(struct hash_ctx),</div><div class='add'>+					.cra_type = &amp;crypto_ahash_type,</div><div class='add'>+					.cra_init = hash_cra_init,</div><div class='add'>+					.cra_module = THIS_MODULE,</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+			.conf.algorithm		= HASH_ALGO_SHA256,</div><div class='add'>+			.conf.oper_mode		= HASH_OPER_MODE_HMAC,</div><div class='add'>+			.hash = {</div><div class='add'>+				.init = hash_init,</div><div class='add'>+				.update = ahash_update,</div><div class='add'>+				.final = ahash_final,</div><div class='add'>+				.digest = hmac_sha256_digest,</div><div class='add'>+				.setkey = hmac_sha256_setkey,</div><div class='add'>+				.halg.digestsize = SHA256_DIGEST_SIZE,</div><div class='add'>+				.halg.statesize = sizeof(struct hash_ctx),</div><div class='add'>+				.halg.base = {</div><div class='add'>+					.cra_name = "hmac(sha256)",</div><div class='add'>+					.cra_driver_name = "hmac-sha256-ux500",</div><div class='add'>+					.cra_flags = CRYPTO_ALG_TYPE_AHASH |</div><div class='add'>+							CRYPTO_ALG_ASYNC,</div><div class='add'>+					.cra_blocksize = SHA256_BLOCK_SIZE,</div><div class='add'>+					.cra_ctxsize = sizeof(struct hash_ctx),</div><div class='add'>+					.cra_type = &amp;crypto_ahash_type,</div><div class='add'>+					.cra_init = hash_cra_init,</div><div class='add'>+					.cra_module = THIS_MODULE,</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_algs_register_all -</div><div class='add'>+ */</div><div class='add'>+static int ahash_algs_register_all(struct hash_device_data *device_data)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+	int count;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hash_algs); i++) {</div><div class='add'>+		ret = crypto_register_ahash(&amp;hash_algs[i].hash);</div><div class='add'>+		if (ret) {</div><div class='add'>+			count = i;</div><div class='add'>+			dev_err(device_data-&gt;dev, "[%s] alg registration failed",</div><div class='add'>+				hash_algs[i].hash.halg.base.cra_driver_name);</div><div class='add'>+			goto unreg;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+unreg:</div><div class='add'>+	for (i = 0; i &lt; count; i++)</div><div class='add'>+		crypto_unregister_ahash(&amp;hash_algs[i].hash);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hash_algs_unregister_all -</div><div class='add'>+ */</div><div class='add'>+static void ahash_algs_unregister_all(struct hash_device_data *device_data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hash_algs); i++)</div><div class='add'>+		crypto_unregister_ahash(&amp;hash_algs[i].hash);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ux500_hash_probe - Function that probes the hash hardware.</div><div class='add'>+ * @pdev: The platform device.</div><div class='add'>+ */</div><div class='add'>+static int ux500_hash_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	int			ret = 0;</div><div class='add'>+	struct resource		*res = NULL;</div><div class='add'>+	struct hash_device_data *device_data;</div><div class='add'>+	struct device		*dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	device_data = kzalloc(sizeof(struct hash_device_data), GFP_ATOMIC);</div><div class='add'>+	if (!device_data) {</div><div class='add'>+		dev_dbg(dev, "[%s] kzalloc() failed!", __func__);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	device_data-&gt;dev = dev;</div><div class='add'>+	device_data-&gt;current_ctx = NULL;</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_dbg(dev, "[%s] platform_get_resource() failed!", __func__);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto out_kfree;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = request_mem_region(res-&gt;start, resource_size(res), pdev-&gt;name);</div><div class='add'>+	if (res == NULL) {</div><div class='add'>+		dev_dbg(dev, "[%s] request_mem_region() failed!", __func__);</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto out_kfree;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	device_data-&gt;base = ioremap(res-&gt;start, resource_size(res));</div><div class='add'>+	if (!device_data-&gt;base) {</div><div class='add'>+		dev_err(dev, "[%s] ioremap() failed!",</div><div class='add'>+				__func__);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_free_mem;</div><div class='add'>+	}</div><div class='add'>+	spin_lock_init(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	spin_lock_init(&amp;device_data-&gt;power_state_lock);</div><div class='add'>+</div><div class='add'>+	/* Enable power for HASH1 hardware block */</div><div class='add'>+	device_data-&gt;regulator = regulator_get(dev, "v-ape");</div><div class='add'>+	if (IS_ERR(device_data-&gt;regulator)) {</div><div class='add'>+		dev_err(dev, "[%s] regulator_get() failed!", __func__);</div><div class='add'>+		ret = PTR_ERR(device_data-&gt;regulator);</div><div class='add'>+		device_data-&gt;regulator = NULL;</div><div class='add'>+		goto out_unmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable the clock for HASH1 hardware block */</div><div class='add'>+	device_data-&gt;clk = clk_get(dev, NULL);</div><div class='add'>+	if (IS_ERR(device_data-&gt;clk)) {</div><div class='add'>+		dev_err(dev, "[%s] clk_get() failed!", __func__);</div><div class='add'>+		ret = PTR_ERR(device_data-&gt;clk);</div><div class='add'>+		goto out_regulator;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable device power (and clock) */</div><div class='add'>+	ret = hash_enable_power(device_data, false);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "[%s]: hash_enable_power() failed!", __func__);</div><div class='add'>+		goto out_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hash_check_hw(device_data);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "[%s] hash_check_hw() failed!", __func__);</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hash_mode == HASH_MODE_DMA)</div><div class='add'>+		hash_dma_setup_channel(device_data, dev);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, device_data);</div><div class='add'>+</div><div class='add'>+	/* Put the new device into the device list... */</div><div class='add'>+	klist_add_tail(&amp;device_data-&gt;list_node, &amp;driver_data.device_list);</div><div class='add'>+	/* ... and signal that a new device is available. */</div><div class='add'>+	up(&amp;driver_data.device_allocation);</div><div class='add'>+</div><div class='add'>+	ret = ahash_algs_register_all(device_data);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "[%s] ahash_algs_register_all() "</div><div class='add'>+				"failed!", __func__);</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "[%s] successfully probed\n", __func__);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_power:</div><div class='add'>+	hash_disable_power(device_data, false);</div><div class='add'>+</div><div class='add'>+out_clk:</div><div class='add'>+	clk_put(device_data-&gt;clk);</div><div class='add'>+</div><div class='add'>+out_regulator:</div><div class='add'>+	regulator_put(device_data-&gt;regulator);</div><div class='add'>+</div><div class='add'>+out_unmap:</div><div class='add'>+	iounmap(device_data-&gt;base);</div><div class='add'>+</div><div class='add'>+out_free_mem:</div><div class='add'>+	release_mem_region(res-&gt;start, resource_size(res));</div><div class='add'>+</div><div class='add'>+out_kfree:</div><div class='add'>+	kfree(device_data);</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ux500_hash_remove - Function that removes the hash device from the platform.</div><div class='add'>+ * @pdev: The platform device.</div><div class='add'>+ */</div><div class='add'>+static int ux500_hash_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct resource		*res;</div><div class='add'>+	struct hash_device_data *device_data;</div><div class='add'>+	struct device		*dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	device_data = platform_get_drvdata(pdev);</div><div class='add'>+	if (!device_data) {</div><div class='add'>+		dev_err(dev, "[%s]: platform_get_drvdata() failed!",</div><div class='add'>+			__func__);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Try to decrease the number of available devices. */</div><div class='add'>+	if (down_trylock(&amp;driver_data.device_allocation))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	/* Check that the device is free */</div><div class='add'>+	spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	/* current_ctx allocates a device, NULL = unallocated */</div><div class='add'>+	if (device_data-&gt;current_ctx) {</div><div class='add'>+		/* The device is busy */</div><div class='add'>+		spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+		/* Return the device to the pool. */</div><div class='add'>+		up(&amp;driver_data.device_allocation);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+</div><div class='add'>+	/* Remove the device from the list */</div><div class='add'>+	if (klist_node_attached(&amp;device_data-&gt;list_node))</div><div class='add'>+		klist_remove(&amp;device_data-&gt;list_node);</div><div class='add'>+</div><div class='add'>+	/* If this was the last device, remove the services */</div><div class='add'>+	if (list_empty(&amp;driver_data.device_list.k_list))</div><div class='add'>+		ahash_algs_unregister_all(device_data);</div><div class='add'>+</div><div class='add'>+	if (hash_disable_power(device_data, false))</div><div class='add'>+		dev_err(dev, "[%s]: hash_disable_power() failed",</div><div class='add'>+			__func__);</div><div class='add'>+</div><div class='add'>+	clk_put(device_data-&gt;clk);</div><div class='add'>+	regulator_put(device_data-&gt;regulator);</div><div class='add'>+</div><div class='add'>+	iounmap(device_data-&gt;base);</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (res)</div><div class='add'>+		release_mem_region(res-&gt;start, resource_size(res));</div><div class='add'>+</div><div class='add'>+	kfree(device_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ux500_hash_shutdown - Function that shutdown the hash device.</div><div class='add'>+ * @pdev: The platform device</div><div class='add'>+ */</div><div class='add'>+static void ux500_hash_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct resource *res = NULL;</div><div class='add'>+	struct hash_device_data *device_data;</div><div class='add'>+</div><div class='add'>+	device_data = platform_get_drvdata(pdev);</div><div class='add'>+	if (!device_data) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s] platform_get_drvdata() failed!",</div><div class='add'>+				__func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check that the device is free */</div><div class='add'>+	spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	/* current_ctx allocates a device, NULL = unallocated */</div><div class='add'>+	if (!device_data-&gt;current_ctx) {</div><div class='add'>+		if (down_trylock(&amp;driver_data.device_allocation))</div><div class='add'>+			dev_dbg(&amp;pdev-&gt;dev, "[%s]: Cryp still in use!"</div><div class='add'>+				"Shutting down anyway...", __func__);</div><div class='add'>+		/**</div><div class='add'>+		 * (Allocate the device)</div><div class='add'>+		 * Need to set this to non-null (dummy) value,</div><div class='add'>+		 * to avoid usage if context switching.</div><div class='add'>+		 */</div><div class='add'>+		device_data-&gt;current_ctx++;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+</div><div class='add'>+	/* Remove the device from the list */</div><div class='add'>+	if (klist_node_attached(&amp;device_data-&gt;list_node))</div><div class='add'>+		klist_remove(&amp;device_data-&gt;list_node);</div><div class='add'>+</div><div class='add'>+	/* If this was the last device, remove the services */</div><div class='add'>+	if (list_empty(&amp;driver_data.device_list.k_list))</div><div class='add'>+		ahash_algs_unregister_all(device_data);</div><div class='add'>+</div><div class='add'>+	iounmap(device_data-&gt;base);</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (res)</div><div class='add'>+		release_mem_region(res-&gt;start, resource_size(res));</div><div class='add'>+</div><div class='add'>+	if (hash_disable_power(device_data, false))</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s] hash_disable_power() failed",</div><div class='add'>+				__func__);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ux500_hash_suspend - Function that suspends the hash device.</div><div class='add'>+ * @pdev:	The platform device.</div><div class='add'>+ * @state:	-</div><div class='add'>+ */</div><div class='add'>+static int ux500_hash_suspend(struct platform_device *pdev, pm_message_t state)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct hash_device_data *device_data;</div><div class='add'>+	struct hash_ctx *temp_ctx = NULL;</div><div class='add'>+</div><div class='add'>+	device_data = platform_get_drvdata(pdev);</div><div class='add'>+	if (!device_data) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s] platform_get_drvdata() failed!",</div><div class='add'>+				__func__);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	if (!device_data-&gt;current_ctx)</div><div class='add'>+		device_data-&gt;current_ctx++;</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+</div><div class='add'>+	if (device_data-&gt;current_ctx == ++temp_ctx) {</div><div class='add'>+		if (down_interruptible(&amp;driver_data.device_allocation))</div><div class='add'>+			dev_dbg(&amp;pdev-&gt;dev, "[%s]: down_interruptible() "</div><div class='add'>+					"failed", __func__);</div><div class='add'>+		ret = hash_disable_power(device_data, false);</div><div class='add'>+</div><div class='add'>+	} else</div><div class='add'>+		ret = hash_disable_power(device_data, true);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: hash_disable_power()", __func__);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ux500_hash_resume - Function that resume the hash device.</div><div class='add'>+ * @pdev:	The platform device.</div><div class='add'>+ */</div><div class='add'>+static int ux500_hash_resume(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct hash_device_data *device_data;</div><div class='add'>+	struct hash_ctx *temp_ctx = NULL;</div><div class='add'>+</div><div class='add'>+	device_data = platform_get_drvdata(pdev);</div><div class='add'>+	if (!device_data) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s] platform_get_drvdata() failed!",</div><div class='add'>+				__func__);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+	if (device_data-&gt;current_ctx == ++temp_ctx)</div><div class='add'>+		device_data-&gt;current_ctx = NULL;</div><div class='add'>+	spin_unlock(&amp;device_data-&gt;ctx_lock);</div><div class='add'>+</div><div class='add'>+	if (!device_data-&gt;current_ctx)</div><div class='add'>+		up(&amp;driver_data.device_allocation);</div><div class='add'>+	else</div><div class='add'>+		ret = hash_enable_power(device_data, true);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "[%s]: hash_enable_power() failed!",</div><div class='add'>+			__func__);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver hash_driver = {</div><div class='add'>+	.probe  = ux500_hash_probe,</div><div class='add'>+	.remove = ux500_hash_remove,</div><div class='add'>+	.shutdown = ux500_hash_shutdown,</div><div class='add'>+	.suspend  = ux500_hash_suspend,</div><div class='add'>+	.resume   = ux500_hash_resume,</div><div class='add'>+	.driver = {</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.name  = "hash1",</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ux500_hash_mod_init - The kernel module init function.</div><div class='add'>+ */</div><div class='add'>+static int __init ux500_hash_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	klist_init(&amp;driver_data.device_list, NULL, NULL);</div><div class='add'>+	/* Initialize the semaphore to 0 devices (locked state) */</div><div class='add'>+	sema_init(&amp;driver_data.device_allocation, 0);</div><div class='add'>+</div><div class='add'>+	return platform_driver_register(&amp;hash_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ux500_hash_mod_fini - The kernel module exit function.</div><div class='add'>+ */</div><div class='add'>+static void __exit ux500_hash_mod_fini(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;hash_driver);</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(ux500_hash_mod_init);</div><div class='add'>+module_exit(ux500_hash_mod_fini);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Driver for ST-Ericsson UX500 HASH engine.");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+MODULE_ALIAS("sha1-all");</div><div class='add'>+MODULE_ALIAS("sha256-all");</div><div class='add'>+MODULE_ALIAS("hmac-sha1-all");</div><div class='add'>+MODULE_ALIAS("hmac-sha256-all");</div><div class='head'>diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig<br/>index 464fa2147dfb..f6b0a6e2ea50 100644<br/>--- a/<a href='/drm-misc/tree/drivers/devfreq/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/devfreq/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/devfreq/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/devfreq/Kconfig</a></div><div class='hunk'>@@ -16,7 +16,7 @@ menuconfig PM_DEVFREQ</div><div class='ctx'> 	  is attached to a single device and returns a "representative"</div><div class='ctx'> 	  clock frequency of the device, which is also attached</div><div class='ctx'> 	  to a device by 1-to-1. The device registering devfreq takes the</div><div class='del'>-	  responsiblity to "interpret" the representative frequency and</div><div class='add'>+	  responsibility to "interpret" the representative frequency and</div><div class='ctx'> 	  to set its every clock accordingly with the "target" callback</div><div class='ctx'> 	  given to devfreq.</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/devfreq/governor_performance.c b/drivers/devfreq/governor_performance.c<br/>index 574a06b1b1de..af75ddd4f158 100644<br/>--- a/<a href='/drm-misc/tree/drivers/devfreq/governor_performance.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/devfreq/governor_performance.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/devfreq/governor_performance.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/devfreq/governor_performance.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/devfreq.h&gt;</div><div class='add'>+#include "governor.h"</div><div class='ctx'> </div><div class='ctx'> static int devfreq_performance_func(struct devfreq *df,</div><div class='ctx'> 				    unsigned long *freq)</div><div class='hunk'>@@ -25,8 +26,14 @@ static int devfreq_performance_func(struct devfreq *df,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int performance_init(struct devfreq *devfreq)</div><div class='add'>+{</div><div class='add'>+	return update_devfreq(devfreq);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct devfreq_governor devfreq_performance = {</div><div class='ctx'> 	.name = "performance",</div><div class='add'>+	.init = performance_init,</div><div class='ctx'> 	.get_target_freq = devfreq_performance_func,</div><div class='ctx'> 	.no_central_polling = true,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/devfreq/governor_powersave.c b/drivers/devfreq/governor_powersave.c<br/>index d742d4a82d6a..fec0cdbd2477 100644<br/>--- a/<a href='/drm-misc/tree/drivers/devfreq/governor_powersave.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/devfreq/governor_powersave.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/devfreq/governor_powersave.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/devfreq/governor_powersave.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/devfreq.h&gt;</div><div class='add'>+#include "governor.h"</div><div class='ctx'> </div><div class='ctx'> static int devfreq_powersave_func(struct devfreq *df,</div><div class='ctx'> 				  unsigned long *freq)</div><div class='hunk'>@@ -22,8 +23,14 @@ static int devfreq_powersave_func(struct devfreq *df,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int powersave_init(struct devfreq *devfreq)</div><div class='add'>+{</div><div class='add'>+	return update_devfreq(devfreq);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct devfreq_governor devfreq_powersave = {</div><div class='ctx'> 	.name = "powersave",</div><div class='add'>+	.init = powersave_init,</div><div class='ctx'> 	.get_target_freq = devfreq_powersave_func,</div><div class='ctx'> 	.no_central_polling = true,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig<br/>index ef378b5b17e4..aadeb5be9dba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/Kconfig</a></div><div class='hunk'>@@ -238,6 +238,7 @@ config IMX_DMA</div><div class='ctx'> config MXS_DMA</div><div class='ctx'> 	bool "MXS DMA support"</div><div class='ctx'> 	depends on SOC_IMX23 || SOC_IMX28</div><div class='add'>+	select STMP_DEVICE</div><div class='ctx'> 	select DMA_ENGINE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support the MXS DMA engine. This engine including APBH-DMA</div><div class='head'>diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c<br/>index 3d704abd7912..49ecbbb8932d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/amba-pl08x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/amba-pl08x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/amba-pl08x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/amba-pl08x.c</a></div><div class='hunk'>@@ -95,10 +95,14 @@ static struct amba_driver pl08x_amba_driver;</div><div class='ctx'>  * struct vendor_data - vendor-specific config parameters for PL08x derivatives</div><div class='ctx'>  * @channels: the number of channels available in this variant</div><div class='ctx'>  * @dualmaster: whether this version supports dual AHB masters or not.</div><div class='add'>+ * @nomadik: whether the channels have Nomadik security extension bits</div><div class='add'>+ *	that need to be checked for permission before use and some registers are</div><div class='add'>+ *	missing</div><div class='ctx'>  */</div><div class='ctx'> struct vendor_data {</div><div class='ctx'> 	u8 channels;</div><div class='ctx'> 	bool dualmaster;</div><div class='add'>+	bool nomadik;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -385,7 +389,7 @@ pl08x_get_phy_channel(struct pl08x_driver_data *pl08x,</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_irqsave(&amp;ch-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-		if (!ch-&gt;serving) {</div><div class='add'>+		if (!ch-&gt;locked &amp;&amp; !ch-&gt;serving) {</div><div class='ctx'> 			ch-&gt;serving = virt_chan;</div><div class='ctx'> 			ch-&gt;signal = -1;</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;ch-&gt;lock, flags);</div><div class='hunk'>@@ -1324,7 +1328,7 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(</div><div class='ctx'> 	int ret, tmp;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pl08x-&gt;adev-&gt;dev, "%s prepare transaction of %d bytes from %s\n",</div><div class='del'>-			__func__, sgl-&gt;length, plchan-&gt;name);</div><div class='add'>+			__func__, sg_dma_len(sgl), plchan-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	txd = pl08x_get_txd(plchan, flags);</div><div class='ctx'> 	if (!txd) {</div><div class='hunk'>@@ -1378,11 +1382,11 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(</div><div class='ctx'> </div><div class='ctx'> 		dsg-&gt;len = sg_dma_len(sg);</div><div class='ctx'> 		if (direction == DMA_MEM_TO_DEV) {</div><div class='del'>-			dsg-&gt;src_addr = sg_phys(sg);</div><div class='add'>+			dsg-&gt;src_addr = sg_dma_address(sg);</div><div class='ctx'> 			dsg-&gt;dst_addr = slave_addr;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dsg-&gt;src_addr = slave_addr;</div><div class='del'>-			dsg-&gt;dst_addr = sg_phys(sg);</div><div class='add'>+			dsg-&gt;dst_addr = sg_dma_address(sg);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1484,6 +1488,9 @@ bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)</div><div class='ctx'>  */</div><div class='ctx'> static void pl08x_ensure_on(struct pl08x_driver_data *pl08x)</div><div class='ctx'> {</div><div class='add'>+	/* The Nomadik variant does not have the config register */</div><div class='add'>+	if (pl08x-&gt;vd-&gt;nomadik)</div><div class='add'>+		return;</div><div class='ctx'> 	writel(PL080_CONFIG_ENABLE, pl08x-&gt;base + PL080_CONFIG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1616,7 +1623,7 @@ static irqreturn_t pl08x_irq(int irq, void *dev)</div><div class='ctx'> 			__func__, err);</div><div class='ctx'> 		writel(err, pl08x-&gt;base + PL080_ERR_CLEAR);</div><div class='ctx'> 	}</div><div class='del'>-	tc = readl(pl08x-&gt;base + PL080_INT_STATUS);</div><div class='add'>+	tc = readl(pl08x-&gt;base + PL080_TC_STATUS);</div><div class='ctx'> 	if (tc)</div><div class='ctx'> 		writel(tc, pl08x-&gt;base + PL080_TC_CLEAR);</div><div class='ctx'> </div><div class='hunk'>@@ -1773,8 +1780,10 @@ static int pl08x_debugfs_show(struct seq_file *s, void *data)</div><div class='ctx'> 		spin_lock_irqsave(&amp;ch-&gt;lock, flags);</div><div class='ctx'> 		virt_chan = ch-&gt;serving;</div><div class='ctx'> </div><div class='del'>-		seq_printf(s, "%d\t\t%s\n",</div><div class='del'>-			   ch-&gt;id, virt_chan ? virt_chan-&gt;name : "(none)");</div><div class='add'>+		seq_printf(s, "%d\t\t%s%s\n",</div><div class='add'>+			   ch-&gt;id,</div><div class='add'>+			   virt_chan ? virt_chan-&gt;name : "(none)",</div><div class='add'>+			   ch-&gt;locked ? " LOCKED" : "");</div><div class='ctx'> </div><div class='ctx'> 		spin_unlock_irqrestore(&amp;ch-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1918,7 +1927,7 @@ static int pl08x_probe(struct amba_device *adev, const struct amba_id *id)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize physical channels */</div><div class='del'>-	pl08x-&gt;phy_chans = kmalloc((vd-&gt;channels * sizeof(*pl08x-&gt;phy_chans)),</div><div class='add'>+	pl08x-&gt;phy_chans = kzalloc((vd-&gt;channels * sizeof(*pl08x-&gt;phy_chans)),</div><div class='ctx'> 			GFP_KERNEL);</div><div class='ctx'> 	if (!pl08x-&gt;phy_chans) {</div><div class='ctx'> 		dev_err(&amp;adev-&gt;dev, "%s failed to allocate "</div><div class='hunk'>@@ -1933,8 +1942,23 @@ static int pl08x_probe(struct amba_device *adev, const struct amba_id *id)</div><div class='ctx'> 		ch-&gt;id = i;</div><div class='ctx'> 		ch-&gt;base = pl08x-&gt;base + PL080_Cx_BASE(i);</div><div class='ctx'> 		spin_lock_init(&amp;ch-&gt;lock);</div><div class='del'>-		ch-&gt;serving = NULL;</div><div class='ctx'> 		ch-&gt;signal = -1;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Nomadik variants can have channels that are locked</div><div class='add'>+		 * down for the secure world only. Lock up these channels</div><div class='add'>+		 * by perpetually serving a dummy virtual channel.</div><div class='add'>+		 */</div><div class='add'>+		if (vd-&gt;nomadik) {</div><div class='add'>+			u32 val;</div><div class='add'>+</div><div class='add'>+			val = readl(ch-&gt;base + PL080_CH_CONFIG);</div><div class='add'>+			if (val &amp; (PL080N_CONFIG_ITPROT | PL080N_CONFIG_SECPROT)) {</div><div class='add'>+				dev_info(&amp;adev-&gt;dev, "physical channel %d reserved for secure access only\n", i);</div><div class='add'>+				ch-&gt;locked = true;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		dev_dbg(&amp;adev-&gt;dev, "physical channel %d is %s\n",</div><div class='ctx'> 			i, pl08x_phy_channel_busy(ch) ? "BUSY" : "FREE");</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2017,6 +2041,12 @@ static struct vendor_data vendor_pl080 = {</div><div class='ctx'> 	.dualmaster = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct vendor_data vendor_nomadik = {</div><div class='add'>+	.channels = 8,</div><div class='add'>+	.dualmaster = true,</div><div class='add'>+	.nomadik = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct vendor_data vendor_pl081 = {</div><div class='ctx'> 	.channels = 2,</div><div class='ctx'> 	.dualmaster = false,</div><div class='hunk'>@@ -2037,9 +2067,9 @@ static struct amba_id pl08x_ids[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	/* Nomadik 8815 PL080 variant */</div><div class='ctx'> 	{</div><div class='del'>-		.id	= 0x00280880,</div><div class='add'>+		.id	= 0x00280080,</div><div class='ctx'> 		.mask	= 0x00ffffff,</div><div class='del'>-		.data	= &amp;vendor_pl080,</div><div class='add'>+		.data	= &amp;vendor_nomadik,</div><div class='ctx'> 	},</div><div class='ctx'> 	{ 0, 0 },</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c<br/>index 445fdf811695..7292aa87b2dd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/at_hdmac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/at_hdmac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/at_hdmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/at_hdmac.c</a></div><div class='hunk'>@@ -39,7 +39,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define	ATC_DEFAULT_CFG		(ATC_FIFOCFG_HALFFIFO)</div><div class='del'>-#define	ATC_DEFAULT_CTRLA	(0)</div><div class='ctx'> #define	ATC_DEFAULT_CTRLB	(ATC_SIF(AT_DMA_MEM_IF) \</div><div class='ctx'> 				|ATC_DIF(AT_DMA_MEM_IF))</div><div class='ctx'> </div><div class='hunk'>@@ -245,7 +244,9 @@ atc_chain_complete(struct at_dma_chan *atchan, struct at_desc *desc)</div><div class='ctx'> 	dev_vdbg(chan2dev(&amp;atchan-&gt;chan_common),</div><div class='ctx'> 		"descriptor %u complete\n", txd-&gt;cookie);</div><div class='ctx'> </div><div class='del'>-	dma_cookie_complete(txd);</div><div class='add'>+	/* mark the descriptor as complete for non cyclic cases only */</div><div class='add'>+	if (!atc_chan_is_cyclic(atchan))</div><div class='add'>+		dma_cookie_complete(txd);</div><div class='ctx'> </div><div class='ctx'> 	/* move children to free_list */</div><div class='ctx'> 	list_splice_init(&amp;desc-&gt;tx_list, &amp;atchan-&gt;free_list);</div><div class='hunk'>@@ -572,7 +573,6 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ctrla =   ATC_DEFAULT_CTRLA;</div><div class='ctx'> 	ctrlb =   ATC_DEFAULT_CTRLB | ATC_IEN</div><div class='ctx'> 		| ATC_SRC_ADDR_MODE_INCR</div><div class='ctx'> 		| ATC_DST_ADDR_MODE_INCR</div><div class='hunk'>@@ -583,13 +583,13 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,</div><div class='ctx'> 	 * of the most common optimization.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!((src | dest  | len) &amp; 3)) {</div><div class='del'>-		ctrla |= ATC_SRC_WIDTH_WORD | ATC_DST_WIDTH_WORD;</div><div class='add'>+		ctrla = ATC_SRC_WIDTH_WORD | ATC_DST_WIDTH_WORD;</div><div class='ctx'> 		src_width = dst_width = 2;</div><div class='ctx'> 	} else if (!((src | dest | len) &amp; 1)) {</div><div class='del'>-		ctrla |= ATC_SRC_WIDTH_HALFWORD | ATC_DST_WIDTH_HALFWORD;</div><div class='add'>+		ctrla = ATC_SRC_WIDTH_HALFWORD | ATC_DST_WIDTH_HALFWORD;</div><div class='ctx'> 		src_width = dst_width = 1;</div><div class='ctx'> 	} else {</div><div class='del'>-		ctrla |= ATC_SRC_WIDTH_BYTE | ATC_DST_WIDTH_BYTE;</div><div class='add'>+		ctrla = ATC_SRC_WIDTH_BYTE | ATC_DST_WIDTH_BYTE;</div><div class='ctx'> 		src_width = dst_width = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -666,7 +666,8 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ctrla = ATC_DEFAULT_CTRLA | atslave-&gt;ctrla;</div><div class='add'>+	ctrla =   ATC_SCSIZE(sconfig-&gt;src_maxburst)</div><div class='add'>+		| ATC_DCSIZE(sconfig-&gt;dst_maxburst);</div><div class='ctx'> 	ctrlb = ATC_IEN;</div><div class='ctx'> </div><div class='ctx'> 	switch (direction) {</div><div class='hunk'>@@ -794,12 +795,12 @@ atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct at_desc *desc,</div><div class='ctx'> 		enum dma_transfer_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	struct at_dma_chan	*atchan = to_at_dma_chan(chan);</div><div class='del'>-	struct at_dma_slave	*atslave = chan-&gt;private;</div><div class='ctx'> 	struct dma_slave_config	*sconfig = &amp;atchan-&gt;dma_sconfig;</div><div class='ctx'> 	u32			ctrla;</div><div class='ctx'> </div><div class='ctx'> 	/* prepare common CRTLA value */</div><div class='del'>-	ctrla =   ATC_DEFAULT_CTRLA | atslave-&gt;ctrla</div><div class='add'>+	ctrla =   ATC_SCSIZE(sconfig-&gt;src_maxburst)</div><div class='add'>+		| ATC_DCSIZE(sconfig-&gt;dst_maxburst)</div><div class='ctx'> 		| ATC_DST_WIDTH(reg_width)</div><div class='ctx'> 		| ATC_SRC_WIDTH(reg_width)</div><div class='ctx'> 		| period_len &gt;&gt; reg_width;</div><div class='head'>diff --git a/drivers/dma/at_hdmac_regs.h b/drivers/dma/at_hdmac_regs.h<br/>index 897a8bcaec90..8a6c8e8b2940 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/at_hdmac_regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/at_hdmac_regs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/at_hdmac_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/at_hdmac_regs.h</a></div><div class='hunk'>@@ -87,7 +87,26 @@</div><div class='ctx'> /* Bitfields in CTRLA */</div><div class='ctx'> #define	ATC_BTSIZE_MAX		0xFFFFUL	/* Maximum Buffer Transfer Size */</div><div class='ctx'> #define	ATC_BTSIZE(x)		(ATC_BTSIZE_MAX &amp; (x)) /* Buffer Transfer Size */</div><div class='del'>-/* Chunck Tranfer size definitions are in at_hdmac.h */</div><div class='add'>+#define	ATC_SCSIZE_MASK		(0x7 &lt;&lt; 16)	/* Source Chunk Transfer Size */</div><div class='add'>+#define		ATC_SCSIZE(x)		(ATC_SCSIZE_MASK &amp; ((x) &lt;&lt; 16))</div><div class='add'>+#define		ATC_SCSIZE_1		(0x0 &lt;&lt; 16)</div><div class='add'>+#define		ATC_SCSIZE_4		(0x1 &lt;&lt; 16)</div><div class='add'>+#define		ATC_SCSIZE_8		(0x2 &lt;&lt; 16)</div><div class='add'>+#define		ATC_SCSIZE_16		(0x3 &lt;&lt; 16)</div><div class='add'>+#define		ATC_SCSIZE_32		(0x4 &lt;&lt; 16)</div><div class='add'>+#define		ATC_SCSIZE_64		(0x5 &lt;&lt; 16)</div><div class='add'>+#define		ATC_SCSIZE_128		(0x6 &lt;&lt; 16)</div><div class='add'>+#define		ATC_SCSIZE_256		(0x7 &lt;&lt; 16)</div><div class='add'>+#define	ATC_DCSIZE_MASK		(0x7 &lt;&lt; 20)	/* Destination Chunk Transfer Size */</div><div class='add'>+#define		ATC_DCSIZE(x)		(ATC_DCSIZE_MASK &amp; ((x) &lt;&lt; 20))</div><div class='add'>+#define		ATC_DCSIZE_1		(0x0 &lt;&lt; 20)</div><div class='add'>+#define		ATC_DCSIZE_4		(0x1 &lt;&lt; 20)</div><div class='add'>+#define		ATC_DCSIZE_8		(0x2 &lt;&lt; 20)</div><div class='add'>+#define		ATC_DCSIZE_16		(0x3 &lt;&lt; 20)</div><div class='add'>+#define		ATC_DCSIZE_32		(0x4 &lt;&lt; 20)</div><div class='add'>+#define		ATC_DCSIZE_64		(0x5 &lt;&lt; 20)</div><div class='add'>+#define		ATC_DCSIZE_128		(0x6 &lt;&lt; 20)</div><div class='add'>+#define		ATC_DCSIZE_256		(0x7 &lt;&lt; 20)</div><div class='ctx'> #define	ATC_SRC_WIDTH_MASK	(0x3 &lt;&lt; 24)	/* Source Single Transfer Size */</div><div class='ctx'> #define		ATC_SRC_WIDTH(x)	((x) &lt;&lt; 24)</div><div class='ctx'> #define		ATC_SRC_WIDTH_BYTE	(0x0 &lt;&lt; 24)</div><div class='head'>diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c<br/>index 750925f9638b..e67b4e06a918 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/coh901318.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/coh901318.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/coh901318.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/coh901318.c</a></div><div class='hunk'>@@ -1033,7 +1033,7 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,</div><div class='ctx'> </div><div class='ctx'> 	if (!sgl)</div><div class='ctx'> 		goto out;</div><div class='del'>-	if (sgl-&gt;length == 0)</div><div class='add'>+	if (sg_dma_len(sgl) == 0)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cohc-&gt;lock, flg);</div><div class='head'>diff --git a/drivers/dma/coh901318_lli.c b/drivers/dma/coh901318_lli.c<br/>index 6c0e2d4c6682..780e0429b38c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/coh901318_lli.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/coh901318_lli.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/coh901318_lli.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/coh901318_lli.c</a></div><div class='hunk'>@@ -270,10 +270,10 @@ coh901318_lli_fill_sg(struct coh901318_pool *pool,</div><div class='ctx'> </div><div class='ctx'> 		if (dir == DMA_MEM_TO_DEV)</div><div class='ctx'> 			/* increment source address */</div><div class='del'>-			src = sg_phys(sg);</div><div class='add'>+			src = sg_dma_address(sg);</div><div class='ctx'> 		else</div><div class='ctx'> 			/* increment destination address */</div><div class='del'>-			dst =  sg_phys(sg);</div><div class='add'>+			dst = sg_dma_address(sg);</div><div class='ctx'> </div><div class='ctx'> 		bytes_to_transfer = sg_dma_len(sg);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c<br/>index 7439079f5eed..e23dc82d43ac 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/dw_dmac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/dw_dmac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/dw_dmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/dw_dmac.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='hunk'>@@ -742,7 +743,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,</div><div class='ctx'> 			struct dw_desc	*desc;</div><div class='ctx'> 			u32		len, dlen, mem;</div><div class='ctx'> </div><div class='del'>-			mem = sg_phys(sg);</div><div class='add'>+			mem = sg_dma_address(sg);</div><div class='ctx'> 			len = sg_dma_len(sg);</div><div class='ctx'> </div><div class='ctx'> 			if (!((mem | len) &amp; 7))</div><div class='hunk'>@@ -809,7 +810,7 @@ slave_sg_todev_fill_desc:</div><div class='ctx'> 			struct dw_desc	*desc;</div><div class='ctx'> 			u32		len, dlen, mem;</div><div class='ctx'> </div><div class='del'>-			mem = sg_phys(sg);</div><div class='add'>+			mem = sg_dma_address(sg);</div><div class='ctx'> 			len = sg_dma_len(sg);</div><div class='ctx'> </div><div class='ctx'> 			if (!((mem | len) &amp; 7))</div><div class='hunk'>@@ -1429,7 +1430,7 @@ static int __init dw_probe(struct platform_device *pdev)</div><div class='ctx'> 		err = PTR_ERR(dw-&gt;clk);</div><div class='ctx'> 		goto err_clk;</div><div class='ctx'> 	}</div><div class='del'>-	clk_enable(dw-&gt;clk);</div><div class='add'>+	clk_prepare_enable(dw-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	/* force dma off, just in case */</div><div class='ctx'> 	dw_dma_off(dw);</div><div class='hunk'>@@ -1510,7 +1511,7 @@ static int __init dw_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_irq:</div><div class='del'>-	clk_disable(dw-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(dw-&gt;clk);</div><div class='ctx'> 	clk_put(dw-&gt;clk);</div><div class='ctx'> err_clk:</div><div class='ctx'> 	iounmap(dw-&gt;regs);</div><div class='hunk'>@@ -1540,7 +1541,7 @@ static int __exit dw_remove(struct platform_device *pdev)</div><div class='ctx'> 		channel_clear_bit(dw, CH_EN, dwc-&gt;mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	clk_disable(dw-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(dw-&gt;clk);</div><div class='ctx'> 	clk_put(dw-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	iounmap(dw-&gt;regs);</div><div class='hunk'>@@ -1559,7 +1560,7 @@ static void dw_shutdown(struct platform_device *pdev)</div><div class='ctx'> 	struct dw_dma	*dw = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	dw_dma_off(platform_get_drvdata(pdev));</div><div class='del'>-	clk_disable(dw-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(dw-&gt;clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dw_suspend_noirq(struct device *dev)</div><div class='hunk'>@@ -1568,7 +1569,7 @@ static int dw_suspend_noirq(struct device *dev)</div><div class='ctx'> 	struct dw_dma	*dw = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	dw_dma_off(platform_get_drvdata(pdev));</div><div class='del'>-	clk_disable(dw-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(dw-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1578,7 +1579,7 @@ static int dw_resume_noirq(struct device *dev)</div><div class='ctx'> 	struct platform_device *pdev = to_platform_device(dev);</div><div class='ctx'> 	struct dw_dma	*dw = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='del'>-	clk_enable(dw-&gt;clk);</div><div class='add'>+	clk_prepare_enable(dw-&gt;clk);</div><div class='ctx'> 	dma_writel(dw, CFG, DW_CFG_DMA_EN);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1592,12 +1593,21 @@ static const struct dev_pm_ops dw_dev_pm_ops = {</div><div class='ctx'> 	.poweroff_noirq = dw_suspend_noirq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static const struct of_device_id dw_dma_id_table[] = {</div><div class='add'>+	{ .compatible = "snps,dma-spear1340" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, dw_dma_id_table);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct platform_driver dw_driver = {</div><div class='ctx'> 	.remove		= __exit_p(dw_remove),</div><div class='ctx'> 	.shutdown	= dw_shutdown,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	= "dw_dmac",</div><div class='ctx'> 		.pm	= &amp;dw_dev_pm_ops,</div><div class='add'>+		.of_match_table = of_match_ptr(dw_dma_id_table),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/ep93xx_dma.c b/drivers/dma/ep93xx_dma.c<br/>index e6f133b78dc2..c64917ec313d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/ep93xx_dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/ep93xx_dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/ep93xx_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/ep93xx_dma.c</a></div><div class='hunk'>@@ -71,6 +71,7 @@</div><div class='ctx'> #define M2M_CONTROL_TM_SHIFT		13</div><div class='ctx'> #define M2M_CONTROL_TM_TX		(1 &lt;&lt; M2M_CONTROL_TM_SHIFT)</div><div class='ctx'> #define M2M_CONTROL_TM_RX		(2 &lt;&lt; M2M_CONTROL_TM_SHIFT)</div><div class='add'>+#define M2M_CONTROL_NFBINT		BIT(21)</div><div class='ctx'> #define M2M_CONTROL_RSS_SHIFT		22</div><div class='ctx'> #define M2M_CONTROL_RSS_SSPRX		(1 &lt;&lt; M2M_CONTROL_RSS_SHIFT)</div><div class='ctx'> #define M2M_CONTROL_RSS_SSPTX		(2 &lt;&lt; M2M_CONTROL_RSS_SHIFT)</div><div class='hunk'>@@ -79,7 +80,22 @@</div><div class='ctx'> #define M2M_CONTROL_PWSC_SHIFT		25</div><div class='ctx'> </div><div class='ctx'> #define M2M_INTERRUPT			0x0004</div><div class='del'>-#define M2M_INTERRUPT_DONEINT		BIT(1)</div><div class='add'>+#define M2M_INTERRUPT_MASK		6</div><div class='add'>+</div><div class='add'>+#define M2M_STATUS			0x000c</div><div class='add'>+#define M2M_STATUS_CTL_SHIFT		1</div><div class='add'>+#define M2M_STATUS_CTL_IDLE		(0 &lt;&lt; M2M_STATUS_CTL_SHIFT)</div><div class='add'>+#define M2M_STATUS_CTL_STALL		(1 &lt;&lt; M2M_STATUS_CTL_SHIFT)</div><div class='add'>+#define M2M_STATUS_CTL_MEMRD		(2 &lt;&lt; M2M_STATUS_CTL_SHIFT)</div><div class='add'>+#define M2M_STATUS_CTL_MEMWR		(3 &lt;&lt; M2M_STATUS_CTL_SHIFT)</div><div class='add'>+#define M2M_STATUS_CTL_BWCWAIT		(4 &lt;&lt; M2M_STATUS_CTL_SHIFT)</div><div class='add'>+#define M2M_STATUS_CTL_MASK		(7 &lt;&lt; M2M_STATUS_CTL_SHIFT)</div><div class='add'>+#define M2M_STATUS_BUF_SHIFT		4</div><div class='add'>+#define M2M_STATUS_BUF_NO		(0 &lt;&lt; M2M_STATUS_BUF_SHIFT)</div><div class='add'>+#define M2M_STATUS_BUF_ON		(1 &lt;&lt; M2M_STATUS_BUF_SHIFT)</div><div class='add'>+#define M2M_STATUS_BUF_NEXT		(2 &lt;&lt; M2M_STATUS_BUF_SHIFT)</div><div class='add'>+#define M2M_STATUS_BUF_MASK		(3 &lt;&lt; M2M_STATUS_BUF_SHIFT)</div><div class='add'>+#define M2M_STATUS_DONE			BIT(6)</div><div class='ctx'> </div><div class='ctx'> #define M2M_BCR0			0x0010</div><div class='ctx'> #define M2M_BCR1			0x0014</div><div class='hunk'>@@ -426,15 +442,6 @@ static int m2p_hw_interrupt(struct ep93xx_dma_chan *edmac)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * M2M DMA implementation</div><div class='del'>- *</div><div class='del'>- * For the M2M transfers we don't use NFB at all. This is because it simply</div><div class='del'>- * doesn't work well with memcpy transfers. When you submit both buffers it is</div><div class='del'>- * extremely unlikely that you get an NFB interrupt, but it instead reports</div><div class='del'>- * DONE interrupt and both buffers are already transferred which means that we</div><div class='del'>- * weren't able to update the next buffer.</div><div class='del'>- *</div><div class='del'>- * So for now we "simulate" NFB by just submitting buffer after buffer</div><div class='del'>- * without double buffering.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static int m2m_hw_setup(struct ep93xx_dma_chan *edmac)</div><div class='hunk'>@@ -543,6 +550,11 @@ static void m2m_hw_submit(struct ep93xx_dma_chan *edmac)</div><div class='ctx'> 	m2m_fill_desc(edmac);</div><div class='ctx'> 	control |= M2M_CONTROL_DONEINT;</div><div class='ctx'> </div><div class='add'>+	if (ep93xx_dma_advance_active(edmac)) {</div><div class='add'>+		m2m_fill_desc(edmac);</div><div class='add'>+		control |= M2M_CONTROL_NFBINT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Now we can finally enable the channel. For M2M channel this must be</div><div class='ctx'> 	 * done _after_ the BCRx registers are programmed.</div><div class='hunk'>@@ -560,32 +572,89 @@ static void m2m_hw_submit(struct ep93xx_dma_chan *edmac)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * According to EP93xx User's Guide, we should receive DONE interrupt when all</div><div class='add'>+ * M2M DMA controller transactions complete normally. This is not always the</div><div class='add'>+ * case - sometimes EP93xx M2M DMA asserts DONE interrupt when the DMA channel</div><div class='add'>+ * is still running (channel Buffer FSM in DMA_BUF_ON state, and channel</div><div class='add'>+ * Control FSM in DMA_MEM_RD state, observed at least in IDE-DMA operation).</div><div class='add'>+ * In effect, disabling the channel when only DONE bit is set could stop</div><div class='add'>+ * currently running DMA transfer. To avoid this, we use Buffer FSM and</div><div class='add'>+ * Control FSM to check current state of DMA channel.</div><div class='add'>+ */</div><div class='ctx'> static int m2m_hw_interrupt(struct ep93xx_dma_chan *edmac)</div><div class='ctx'> {</div><div class='add'>+	u32 status = readl(edmac-&gt;regs + M2M_STATUS);</div><div class='add'>+	u32 ctl_fsm = status &amp; M2M_STATUS_CTL_MASK;</div><div class='add'>+	u32 buf_fsm = status &amp; M2M_STATUS_BUF_MASK;</div><div class='add'>+	bool done = status &amp; M2M_STATUS_DONE;</div><div class='add'>+	bool last_done;</div><div class='ctx'> 	u32 control;</div><div class='add'>+	struct ep93xx_dma_desc *desc;</div><div class='ctx'> </div><div class='del'>-	if (!(readl(edmac-&gt;regs + M2M_INTERRUPT) &amp; M2M_INTERRUPT_DONEINT))</div><div class='add'>+	/* Accept only DONE and NFB interrupts */</div><div class='add'>+	if (!(readl(edmac-&gt;regs + M2M_INTERRUPT) &amp; M2M_INTERRUPT_MASK))</div><div class='ctx'> 		return INTERRUPT_UNKNOWN;</div><div class='ctx'> </div><div class='del'>-	/* Clear the DONE bit */</div><div class='del'>-	writel(0, edmac-&gt;regs + M2M_INTERRUPT);</div><div class='add'>+	if (done) {</div><div class='add'>+		/* Clear the DONE bit */</div><div class='add'>+		writel(0, edmac-&gt;regs + M2M_INTERRUPT);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* Disable interrupts and the channel */</div><div class='del'>-	control = readl(edmac-&gt;regs + M2M_CONTROL);</div><div class='del'>-	control &amp;= ~(M2M_CONTROL_DONEINT | M2M_CONTROL_ENABLE);</div><div class='del'>-	writel(control, edmac-&gt;regs + M2M_CONTROL);</div><div class='add'>+	/*</div><div class='add'>+	 * Check whether we are done with descriptors or not. This, together</div><div class='add'>+	 * with DMA channel state, determines action to take in interrupt.</div><div class='add'>+	 */</div><div class='add'>+	desc = ep93xx_dma_get_active(edmac);</div><div class='add'>+	last_done = !desc || desc-&gt;txd.cookie;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Since we only get DONE interrupt we have to find out ourselves</div><div class='del'>-	 * whether there still is something to process. So we try to advance</div><div class='del'>-	 * the chain an see whether it succeeds.</div><div class='add'>+	 * Use M2M DMA Buffer FSM and Control FSM to check current state of</div><div class='add'>+	 * DMA channel. Using DONE and NFB bits from channel status register</div><div class='add'>+	 * or bits from channel interrupt register is not reliable.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ep93xx_dma_advance_active(edmac)) {</div><div class='del'>-		edmac-&gt;edma-&gt;hw_submit(edmac);</div><div class='del'>-		return INTERRUPT_NEXT_BUFFER;</div><div class='add'>+	if (!last_done &amp;&amp;</div><div class='add'>+	    (buf_fsm == M2M_STATUS_BUF_NO ||</div><div class='add'>+	     buf_fsm == M2M_STATUS_BUF_ON)) {</div><div class='add'>+		/*</div><div class='add'>+		 * Two buffers are ready for update when Buffer FSM is in</div><div class='add'>+		 * DMA_NO_BUF state. Only one buffer can be prepared without</div><div class='add'>+		 * disabling the channel or polling the DONE bit.</div><div class='add'>+		 * To simplify things, always prepare only one buffer.</div><div class='add'>+		 */</div><div class='add'>+		if (ep93xx_dma_advance_active(edmac)) {</div><div class='add'>+			m2m_fill_desc(edmac);</div><div class='add'>+			if (done &amp;&amp; !edmac-&gt;chan.private) {</div><div class='add'>+				/* Software trigger for memcpy channel */</div><div class='add'>+				control = readl(edmac-&gt;regs + M2M_CONTROL);</div><div class='add'>+				control |= M2M_CONTROL_START;</div><div class='add'>+				writel(control, edmac-&gt;regs + M2M_CONTROL);</div><div class='add'>+			}</div><div class='add'>+			return INTERRUPT_NEXT_BUFFER;</div><div class='add'>+		} else {</div><div class='add'>+			last_done = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable the channel only when Buffer FSM is in DMA_NO_BUF state</div><div class='add'>+	 * and Control FSM is in DMA_STALL state.</div><div class='add'>+	 */</div><div class='add'>+	if (last_done &amp;&amp;</div><div class='add'>+	    buf_fsm == M2M_STATUS_BUF_NO &amp;&amp;</div><div class='add'>+	    ctl_fsm == M2M_STATUS_CTL_STALL) {</div><div class='add'>+		/* Disable interrupts and the channel */</div><div class='add'>+		control = readl(edmac-&gt;regs + M2M_CONTROL);</div><div class='add'>+		control &amp;= ~(M2M_CONTROL_DONEINT | M2M_CONTROL_NFBINT</div><div class='add'>+			    | M2M_CONTROL_ENABLE);</div><div class='add'>+		writel(control, edmac-&gt;regs + M2M_CONTROL);</div><div class='add'>+		return INTERRUPT_DONE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return INTERRUPT_DONE;</div><div class='add'>+	/*</div><div class='add'>+	 * Nothing to do this time.</div><div class='add'>+	 */</div><div class='add'>+	return INTERRUPT_NEXT_BUFFER;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -703,7 +772,9 @@ static void ep93xx_dma_tasklet(unsigned long data)</div><div class='ctx'> 	desc = ep93xx_dma_get_active(edmac);</div><div class='ctx'> 	if (desc) {</div><div class='ctx'> 		if (desc-&gt;complete) {</div><div class='del'>-			dma_cookie_complete(&amp;desc-&gt;txd);</div><div class='add'>+			/* mark descriptor complete for non cyclic case only */</div><div class='add'>+			if (!test_bit(EP93XX_DMA_IS_CYCLIC, &amp;edmac-&gt;flags))</div><div class='add'>+				dma_cookie_complete(&amp;desc-&gt;txd);</div><div class='ctx'> 			list_splice_init(&amp;edmac-&gt;active, &amp;list);</div><div class='ctx'> 		}</div><div class='ctx'> 		callback = desc-&gt;txd.callback;</div><div class='head'>diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c<br/>index bb787d8e1529..fcfeb3cd8d31 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/imx-dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/imx-dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/imx-dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/imx-dma.c</a></div><div class='hunk'>@@ -227,7 +227,7 @@ static inline int imxdma_sg_next(struct imxdma_desc *d)</div><div class='ctx'> 	struct scatterlist *sg = d-&gt;sg;</div><div class='ctx'> 	unsigned long now;</div><div class='ctx'> </div><div class='del'>-	now = min(d-&gt;len, sg-&gt;length);</div><div class='add'>+	now = min(d-&gt;len, sg_dma_len(sg));</div><div class='ctx'> 	if (d-&gt;len != IMX_DMA_LENGTH_LOOP)</div><div class='ctx'> 		d-&gt;len -= now;</div><div class='ctx'> </div><div class='hunk'>@@ -763,16 +763,16 @@ static struct dma_async_tx_descriptor *imxdma_prep_slave_sg(</div><div class='ctx'> 	desc = list_first_entry(&amp;imxdmac-&gt;ld_free, struct imxdma_desc, node);</div><div class='ctx'> </div><div class='ctx'> 	for_each_sg(sgl, sg, sg_len, i) {</div><div class='del'>-		dma_length += sg-&gt;length;</div><div class='add'>+		dma_length += sg_dma_len(sg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (imxdmac-&gt;word_size) {</div><div class='ctx'> 	case DMA_SLAVE_BUSWIDTH_4_BYTES:</div><div class='del'>-		if (sgl-&gt;length &amp; 3 || sgl-&gt;dma_address &amp; 3)</div><div class='add'>+		if (sg_dma_len(sgl) &amp; 3 || sgl-&gt;dma_address &amp; 3)</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DMA_SLAVE_BUSWIDTH_2_BYTES:</div><div class='del'>-		if (sgl-&gt;length &amp; 1 || sgl-&gt;dma_address &amp; 1)</div><div class='add'>+		if (sg_dma_len(sgl) &amp; 1 || sgl-&gt;dma_address &amp; 1)</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DMA_SLAVE_BUSWIDTH_1_BYTE:</div><div class='hunk'>@@ -831,13 +831,13 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_cyclic(</div><div class='ctx'> 		imxdmac-&gt;sg_list[i].page_link = 0;</div><div class='ctx'> 		imxdmac-&gt;sg_list[i].offset = 0;</div><div class='ctx'> 		imxdmac-&gt;sg_list[i].dma_address = dma_addr;</div><div class='del'>-		imxdmac-&gt;sg_list[i].length = period_len;</div><div class='add'>+		sg_dma_len(&amp;imxdmac-&gt;sg_list[i]) = period_len;</div><div class='ctx'> 		dma_addr += period_len;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* close the loop */</div><div class='ctx'> 	imxdmac-&gt;sg_list[periods].offset = 0;</div><div class='del'>-	imxdmac-&gt;sg_list[periods].length = 0;</div><div class='add'>+	sg_dma_len(&amp;imxdmac-&gt;sg_list[periods]) = 0;</div><div class='ctx'> 	imxdmac-&gt;sg_list[periods].page_link =</div><div class='ctx'> 		((unsigned long)imxdmac-&gt;sg_list | 0x01) &amp; ~0x02;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c<br/>index d3e38e28bb6b..fb4f4990f5eb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/imx-sdma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/imx-sdma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/imx-sdma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/imx-sdma.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/wait.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/semaphore.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='hunk'>@@ -271,6 +271,7 @@ struct sdma_channel {</div><div class='ctx'> 	enum dma_status			status;</div><div class='ctx'> 	unsigned int			chn_count;</div><div class='ctx'> 	unsigned int			chn_real_count;</div><div class='add'>+	struct tasklet_struct		tasklet;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define IMX_DMA_SG_LOOP		BIT(0)</div><div class='hunk'>@@ -322,8 +323,9 @@ struct sdma_engine {</div><div class='ctx'> 	struct sdma_context_data	*context;</div><div class='ctx'> 	dma_addr_t			context_phys;</div><div class='ctx'> 	struct dma_device		dma_device;</div><div class='del'>-	struct clk			*clk;</div><div class='del'>-	struct mutex			channel_0_lock;</div><div class='add'>+	struct clk			*clk_ipg;</div><div class='add'>+	struct clk			*clk_ahb;</div><div class='add'>+	spinlock_t			channel_0_lock;</div><div class='ctx'> 	struct sdma_script_start_addrs	*script_addrs;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -401,19 +403,27 @@ static void sdma_enable_channel(struct sdma_engine *sdma, int channel)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * sdma_run_channel - run a channel and wait till it's done</div><div class='add'>+ * sdma_run_channel0 - run a channel and wait till it's done</div><div class='ctx'>  */</div><div class='del'>-static int sdma_run_channel(struct sdma_channel *sdmac)</div><div class='add'>+static int sdma_run_channel0(struct sdma_engine *sdma)</div><div class='ctx'> {</div><div class='del'>-	struct sdma_engine *sdma = sdmac-&gt;sdma;</div><div class='del'>-	int channel = sdmac-&gt;channel;</div><div class='ctx'> 	int ret;</div><div class='add'>+	unsigned long timeout = 500;</div><div class='ctx'> </div><div class='del'>-	init_completion(&amp;sdmac-&gt;done);</div><div class='add'>+	sdma_enable_channel(sdma, 0);</div><div class='ctx'> </div><div class='del'>-	sdma_enable_channel(sdma, channel);</div><div class='add'>+	while (!(ret = readl_relaxed(sdma-&gt;regs + SDMA_H_INTR) &amp; 1)) {</div><div class='add'>+		if (timeout-- &lt;= 0)</div><div class='add'>+			break;</div><div class='add'>+		udelay(1);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	ret = wait_for_completion_timeout(&amp;sdmac-&gt;done, HZ);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/* Clear the interrupt status */</div><div class='add'>+		writel_relaxed(ret, sdma-&gt;regs + SDMA_H_INTR);</div><div class='add'>+	} else {</div><div class='add'>+		dev_err(sdma-&gt;dev, "Timeout waiting for CH0 ready\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret ? 0 : -ETIMEDOUT;</div><div class='ctx'> }</div><div class='hunk'>@@ -425,17 +435,17 @@ static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size,</div><div class='ctx'> 	void *buf_virt;</div><div class='ctx'> 	dma_addr_t buf_phys;</div><div class='ctx'> 	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;sdma-&gt;channel_0_lock);</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	buf_virt = dma_alloc_coherent(NULL,</div><div class='ctx'> 			size,</div><div class='ctx'> 			&amp;buf_phys, GFP_KERNEL);</div><div class='ctx'> 	if (!buf_virt) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto err_out;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;sdma-&gt;channel_0_lock, flags);</div><div class='add'>+</div><div class='ctx'> 	bd0-&gt;mode.command = C0_SETPM;</div><div class='ctx'> 	bd0-&gt;mode.status = BD_DONE | BD_INTR | BD_WRAP | BD_EXTD;</div><div class='ctx'> 	bd0-&gt;mode.count = size / 2;</div><div class='hunk'>@@ -444,12 +454,11 @@ static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size,</div><div class='ctx'> </div><div class='ctx'> 	memcpy(buf_virt, buf, size);</div><div class='ctx'> </div><div class='del'>-	ret = sdma_run_channel(&amp;sdma-&gt;channel[0]);</div><div class='add'>+	ret = sdma_run_channel0(sdma);</div><div class='ctx'> </div><div class='del'>-	dma_free_coherent(NULL, size, buf_virt, buf_phys);</div><div class='add'>+	spin_unlock_irqrestore(&amp;sdma-&gt;channel_0_lock, flags);</div><div class='ctx'> </div><div class='del'>-err_out:</div><div class='del'>-	mutex_unlock(&amp;sdma-&gt;channel_0_lock);</div><div class='add'>+	dma_free_coherent(NULL, size, buf_virt, buf_phys);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -534,13 +543,11 @@ static void mxc_sdma_handle_channel_normal(struct sdma_channel *sdmac)</div><div class='ctx'> 		sdmac-&gt;desc.callback(sdmac-&gt;desc.callback_param);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mxc_sdma_handle_channel(struct sdma_channel *sdmac)</div><div class='add'>+static void sdma_tasklet(unsigned long data)</div><div class='ctx'> {</div><div class='del'>-	complete(&amp;sdmac-&gt;done);</div><div class='add'>+	struct sdma_channel *sdmac = (struct sdma_channel *) data;</div><div class='ctx'> </div><div class='del'>-	/* not interested in channel 0 interrupts */</div><div class='del'>-	if (sdmac-&gt;channel == 0)</div><div class='del'>-		return;</div><div class='add'>+	complete(&amp;sdmac-&gt;done);</div><div class='ctx'> </div><div class='ctx'> 	if (sdmac-&gt;flags &amp; IMX_DMA_SG_LOOP)</div><div class='ctx'> 		sdma_handle_channel_loop(sdmac);</div><div class='hunk'>@@ -554,13 +561,15 @@ static irqreturn_t sdma_int_handler(int irq, void *dev_id)</div><div class='ctx'> 	unsigned long stat;</div><div class='ctx'> </div><div class='ctx'> 	stat = readl_relaxed(sdma-&gt;regs + SDMA_H_INTR);</div><div class='add'>+	/* not interested in channel 0 interrupts */</div><div class='add'>+	stat &amp;= ~1;</div><div class='ctx'> 	writel_relaxed(stat, sdma-&gt;regs + SDMA_H_INTR);</div><div class='ctx'> </div><div class='ctx'> 	while (stat) {</div><div class='ctx'> 		int channel = fls(stat) - 1;</div><div class='ctx'> 		struct sdma_channel *sdmac = &amp;sdma-&gt;channel[channel];</div><div class='ctx'> </div><div class='del'>-		mxc_sdma_handle_channel(sdmac);</div><div class='add'>+		tasklet_schedule(&amp;sdmac-&gt;tasklet);</div><div class='ctx'> </div><div class='ctx'> 		__clear_bit(channel, &amp;stat);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -659,6 +668,7 @@ static int sdma_load_context(struct sdma_channel *sdmac)</div><div class='ctx'> 	struct sdma_context_data *context = sdma-&gt;context;</div><div class='ctx'> 	struct sdma_buffer_descriptor *bd0 = sdma-&gt;channel[0].bd;</div><div class='ctx'> 	int ret;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (sdmac-&gt;direction == DMA_DEV_TO_MEM) {</div><div class='ctx'> 		load_address = sdmac-&gt;pc_from_device;</div><div class='hunk'>@@ -676,7 +686,7 @@ static int sdma_load_context(struct sdma_channel *sdmac)</div><div class='ctx'> 	dev_dbg(sdma-&gt;dev, "event_mask0 = 0x%08x\n", (u32)sdmac-&gt;event_mask[0]);</div><div class='ctx'> 	dev_dbg(sdma-&gt;dev, "event_mask1 = 0x%08x\n", (u32)sdmac-&gt;event_mask[1]);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;sdma-&gt;channel_0_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;sdma-&gt;channel_0_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	memset(context, 0, sizeof(*context));</div><div class='ctx'> 	context-&gt;channel_state.pc = load_address;</div><div class='hunk'>@@ -695,10 +705,9 @@ static int sdma_load_context(struct sdma_channel *sdmac)</div><div class='ctx'> 	bd0-&gt;mode.count = sizeof(*context) / 4;</div><div class='ctx'> 	bd0-&gt;buffer_addr = sdma-&gt;context_phys;</div><div class='ctx'> 	bd0-&gt;ext_buffer_addr = 2048 + (sizeof(*context) / 4) * channel;</div><div class='add'>+	ret = sdma_run_channel0(sdma);</div><div class='ctx'> </div><div class='del'>-	ret = sdma_run_channel(&amp;sdma-&gt;channel[0]);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;sdma-&gt;channel_0_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;sdma-&gt;channel_0_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -859,7 +868,8 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)</div><div class='ctx'> 	sdmac-&gt;peripheral_type = data-&gt;peripheral_type;</div><div class='ctx'> 	sdmac-&gt;event_id0 = data-&gt;dma_request;</div><div class='ctx'> </div><div class='del'>-	clk_enable(sdmac-&gt;sdma-&gt;clk);</div><div class='add'>+	clk_enable(sdmac-&gt;sdma-&gt;clk_ipg);</div><div class='add'>+	clk_enable(sdmac-&gt;sdma-&gt;clk_ahb);</div><div class='ctx'> </div><div class='ctx'> 	ret = sdma_request_channel(sdmac);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -896,7 +906,8 @@ static void sdma_free_chan_resources(struct dma_chan *chan)</div><div class='ctx'> </div><div class='ctx'> 	dma_free_coherent(NULL, PAGE_SIZE, sdmac-&gt;bd, sdmac-&gt;bd_phys);</div><div class='ctx'> </div><div class='del'>-	clk_disable(sdma-&gt;clk);</div><div class='add'>+	clk_disable(sdma-&gt;clk_ipg);</div><div class='add'>+	clk_disable(sdma-&gt;clk_ahb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct dma_async_tx_descriptor *sdma_prep_slave_sg(</div><div class='hunk'>@@ -938,7 +949,7 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg(</div><div class='ctx'> </div><div class='ctx'> 		bd-&gt;buffer_addr = sg-&gt;dma_address;</div><div class='ctx'> </div><div class='del'>-		count = sg-&gt;length;</div><div class='add'>+		count = sg_dma_len(sg);</div><div class='ctx'> </div><div class='ctx'> 		if (count &gt; 0xffff) {</div><div class='ctx'> 			dev_err(sdma-&gt;dev, "SDMA channel %d: maximum bytes for sg entry exceeded: %d &gt; %d\n",</div><div class='hunk'>@@ -1169,12 +1180,14 @@ static void sdma_load_firmware(const struct firmware *fw, void *context)</div><div class='ctx'> 	addr = (void *)header + header-&gt;script_addrs_start;</div><div class='ctx'> 	ram_code = (void *)header + header-&gt;ram_code_start;</div><div class='ctx'> </div><div class='del'>-	clk_enable(sdma-&gt;clk);</div><div class='add'>+	clk_enable(sdma-&gt;clk_ipg);</div><div class='add'>+	clk_enable(sdma-&gt;clk_ahb);</div><div class='ctx'> 	/* download the RAM image for SDMA */</div><div class='ctx'> 	sdma_load_script(sdma, ram_code,</div><div class='ctx'> 			header-&gt;ram_code_size,</div><div class='ctx'> 			addr-&gt;ram_code_start_addr);</div><div class='del'>-	clk_disable(sdma-&gt;clk);</div><div class='add'>+	clk_disable(sdma-&gt;clk_ipg);</div><div class='add'>+	clk_disable(sdma-&gt;clk_ahb);</div><div class='ctx'> </div><div class='ctx'> 	sdma_add_scripts(sdma, addr);</div><div class='ctx'> </div><div class='hunk'>@@ -1216,7 +1229,8 @@ static int __init sdma_init(struct sdma_engine *sdma)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	clk_enable(sdma-&gt;clk);</div><div class='add'>+	clk_enable(sdma-&gt;clk_ipg);</div><div class='add'>+	clk_enable(sdma-&gt;clk_ahb);</div><div class='ctx'> </div><div class='ctx'> 	/* Be sure SDMA has not started yet */</div><div class='ctx'> 	writel_relaxed(0, sdma-&gt;regs + SDMA_H_C0PTR);</div><div class='hunk'>@@ -1269,12 +1283,14 @@ static int __init sdma_init(struct sdma_engine *sdma)</div><div class='ctx'> 	/* Initializes channel's priorities */</div><div class='ctx'> 	sdma_set_channel_priority(&amp;sdma-&gt;channel[0], 7);</div><div class='ctx'> </div><div class='del'>-	clk_disable(sdma-&gt;clk);</div><div class='add'>+	clk_disable(sdma-&gt;clk_ipg);</div><div class='add'>+	clk_disable(sdma-&gt;clk_ahb);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_dma_alloc:</div><div class='del'>-	clk_disable(sdma-&gt;clk);</div><div class='add'>+	clk_disable(sdma-&gt;clk_ipg);</div><div class='add'>+	clk_disable(sdma-&gt;clk_ahb);</div><div class='ctx'> 	dev_err(sdma-&gt;dev, "initialisation failed with %d\n", ret);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1297,7 +1313,7 @@ static int __init sdma_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!sdma)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	mutex_init(&amp;sdma-&gt;channel_0_lock);</div><div class='add'>+	spin_lock_init(&amp;sdma-&gt;channel_0_lock);</div><div class='ctx'> </div><div class='ctx'> 	sdma-&gt;dev = &amp;pdev-&gt;dev;</div><div class='ctx'> </div><div class='hunk'>@@ -1313,12 +1329,21 @@ static int __init sdma_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_request_region;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sdma-&gt;clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='del'>-	if (IS_ERR(sdma-&gt;clk)) {</div><div class='del'>-		ret = PTR_ERR(sdma-&gt;clk);</div><div class='add'>+	sdma-&gt;clk_ipg = devm_clk_get(&amp;pdev-&gt;dev, "ipg");</div><div class='add'>+	if (IS_ERR(sdma-&gt;clk_ipg)) {</div><div class='add'>+		ret = PTR_ERR(sdma-&gt;clk_ipg);</div><div class='ctx'> 		goto err_clk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	sdma-&gt;clk_ahb = devm_clk_get(&amp;pdev-&gt;dev, "ahb");</div><div class='add'>+	if (IS_ERR(sdma-&gt;clk_ahb)) {</div><div class='add'>+		ret = PTR_ERR(sdma-&gt;clk_ahb);</div><div class='add'>+		goto err_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk_prepare(sdma-&gt;clk_ipg);</div><div class='add'>+	clk_prepare(sdma-&gt;clk_ahb);</div><div class='add'>+</div><div class='ctx'> 	sdma-&gt;regs = ioremap(iores-&gt;start, resource_size(iores));</div><div class='ctx'> 	if (!sdma-&gt;regs) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -1359,6 +1384,8 @@ static int __init sdma_probe(struct platform_device *pdev)</div><div class='ctx'> 		dma_cookie_init(&amp;sdmac-&gt;chan);</div><div class='ctx'> 		sdmac-&gt;channel = i;</div><div class='ctx'> </div><div class='add'>+		tasklet_init(&amp;sdmac-&gt;tasklet, sdma_tasklet,</div><div class='add'>+			     (unsigned long) sdmac);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Add the channel to the DMAC list. Do not add channel 0 though</div><div class='ctx'> 		 * because we need it internally in the SDMA driver. This also means</div><div class='hunk'>@@ -1426,7 +1453,6 @@ err_alloc:</div><div class='ctx'> err_request_irq:</div><div class='ctx'> 	iounmap(sdma-&gt;regs);</div><div class='ctx'> err_ioremap:</div><div class='del'>-	clk_put(sdma-&gt;clk);</div><div class='ctx'> err_clk:</div><div class='ctx'> 	release_mem_region(iores-&gt;start, resource_size(iores));</div><div class='ctx'> err_request_region:</div><div class='head'>diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c<br/>index c900ca7aaec4..222e907bfaaa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/intel_mid_dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/intel_mid_dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/intel_mid_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/intel_mid_dma.c</a></div><div class='hunk'>@@ -394,11 +394,11 @@ static int midc_lli_fill_sg(struct intel_mid_dma_chan *midc,</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		/*Populate CTL_HI values*/</div><div class='del'>-		ctl_hi.ctlx.block_ts = get_block_ts(sg-&gt;length,</div><div class='add'>+		ctl_hi.ctlx.block_ts = get_block_ts(sg_dma_len(sg),</div><div class='ctx'> 							desc-&gt;width,</div><div class='ctx'> 							midc-&gt;dma-&gt;block_size);</div><div class='ctx'> 		/*Populate SAR and DAR values*/</div><div class='del'>-		sg_phy_addr = sg_phys(sg);</div><div class='add'>+		sg_phy_addr = sg_dma_address(sg);</div><div class='ctx'> 		if (desc-&gt;dirn ==  DMA_MEM_TO_DEV) {</div><div class='ctx'> 			lli_bloc_desc-&gt;sar  = sg_phy_addr;</div><div class='ctx'> 			lli_bloc_desc-&gt;dar  = mids-&gt;dma_slave.dst_addr;</div><div class='hunk'>@@ -747,7 +747,7 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_slave_sg(</div><div class='ctx'> 			txd = intel_mid_dma_prep_memcpy(chan,</div><div class='ctx'> 						mids-&gt;dma_slave.dst_addr,</div><div class='ctx'> 						mids-&gt;dma_slave.src_addr,</div><div class='del'>-						sgl-&gt;length,</div><div class='add'>+						sg_dma_len(sgl),</div><div class='ctx'> 						flags);</div><div class='ctx'> 			return txd;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -759,7 +759,7 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_slave_sg(</div><div class='ctx'> 	pr_debug("MDMA: SG Length = %d, direction = %d, Flags = %#lx\n",</div><div class='ctx'> 			sg_len, direction, flags);</div><div class='ctx'> </div><div class='del'>-	txd = intel_mid_dma_prep_memcpy(chan, 0, 0, sgl-&gt;length, flags);</div><div class='add'>+	txd = intel_mid_dma_prep_memcpy(chan, 0, 0, sg_dma_len(sgl), flags);</div><div class='ctx'> 	if (NULL == txd) {</div><div class='ctx'> 		pr_err("MDMA: Prep memcpy failed\n");</div><div class='ctx'> 		return NULL;</div><div class='head'>diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c<br/>index 62e3f8ec2461..5ec72044ea4c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/ipu/ipu_idmac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/ipu/ipu_idmac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/ipu/ipu_idmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/ipu/ipu_idmac.c</a></div><div class='hunk'>@@ -1715,7 +1715,7 @@ static int __init ipu_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure IPU HSP clock is running */</div><div class='del'>-	clk_enable(ipu_data.ipu_clk);</div><div class='add'>+	clk_prepare_enable(ipu_data.ipu_clk);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable all interrupts */</div><div class='ctx'> 	idmac_write_ipureg(&amp;ipu_data, 0, IPU_INT_CTRL_1);</div><div class='hunk'>@@ -1747,7 +1747,7 @@ static int __init ipu_probe(struct platform_device *pdev)</div><div class='ctx'> err_idmac_init:</div><div class='ctx'> err_attach_irq:</div><div class='ctx'> 	ipu_irq_detach_irq(&amp;ipu_data, pdev);</div><div class='del'>-	clk_disable(ipu_data.ipu_clk);</div><div class='add'>+	clk_disable_unprepare(ipu_data.ipu_clk);</div><div class='ctx'> 	clk_put(ipu_data.ipu_clk);</div><div class='ctx'> err_clk_get:</div><div class='ctx'> 	iounmap(ipu_data.reg_ic);</div><div class='hunk'>@@ -1765,7 +1765,7 @@ static int __exit ipu_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	ipu_idmac_exit(ipu);</div><div class='ctx'> 	ipu_irq_detach_irq(ipu, pdev);</div><div class='del'>-	clk_disable(ipu-&gt;ipu_clk);</div><div class='add'>+	clk_disable_unprepare(ipu-&gt;ipu_clk);</div><div class='ctx'> 	clk_put(ipu-&gt;ipu_clk);</div><div class='ctx'> 	iounmap(ipu-&gt;reg_ic);</div><div class='ctx'> 	iounmap(ipu-&gt;reg_ipu);</div><div class='head'>diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c<br/>index fa5d55fea46c..0b12e68bf79c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/mv_xor.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/mv_xor.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/mv_xor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/mv_xor.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/memory.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;plat/mv_xor.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "dmaengine.h"</div><div class='hunk'>@@ -1307,11 +1308,25 @@ static int mv_xor_shared_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (dram)</div><div class='ctx'> 		mv_xor_conf_mbus_windows(msp, dram);</div><div class='ctx'> </div><div class='add'>+	/* Not all platforms can gate the clock, so it is not</div><div class='add'>+	 * an error if the clock does not exists.</div><div class='add'>+	 */</div><div class='add'>+	msp-&gt;clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (!IS_ERR(msp-&gt;clk))</div><div class='add'>+		clk_prepare_enable(msp-&gt;clk);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mv_xor_shared_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct mv_xor_shared_private *msp = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!IS_ERR(msp-&gt;clk)) {</div><div class='add'>+		clk_disable_unprepare(msp-&gt;clk);</div><div class='add'>+		clk_put(msp-&gt;clk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/mv_xor.h b/drivers/dma/mv_xor.h<br/>index 654876b7ba1d..a5b422f5a8ab 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/mv_xor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/mv_xor.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/mv_xor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/mv_xor.h</a></div><div class='hunk'>@@ -55,6 +55,7 @@</div><div class='ctx'> struct mv_xor_shared_private {</div><div class='ctx'> 	void __iomem	*xor_base;</div><div class='ctx'> 	void __iomem	*xor_high_base;</div><div class='add'>+	struct clk	*clk;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c<br/>index 655d4ce6ed0d..c96ab15319f2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/mxs-dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/mxs-dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/mxs-dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/mxs-dma.c</a></div><div class='hunk'>@@ -22,11 +22,14 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/dmaengine.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/fsl/mxs-dma.h&gt;</div><div class='add'>+#include &lt;linux/stmp_device.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;mach/mxs.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "dmaengine.h"</div><div class='ctx'> </div><div class='hunk'>@@ -36,12 +39,8 @@</div><div class='ctx'>  * dma can program the controller registers of peripheral devices.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define MXS_DMA_APBH		0</div><div class='del'>-#define MXS_DMA_APBX		1</div><div class='del'>-#define dma_is_apbh()		(mxs_dma-&gt;dev_id == MXS_DMA_APBH)</div><div class='del'>-</div><div class='del'>-#define APBH_VERSION_LATEST	3</div><div class='del'>-#define apbh_is_old()		(mxs_dma-&gt;version &lt; APBH_VERSION_LATEST)</div><div class='add'>+#define dma_is_apbh(mxs_dma)	((mxs_dma)-&gt;type == MXS_DMA_APBH)</div><div class='add'>+#define apbh_is_old(mxs_dma)	((mxs_dma)-&gt;dev_id == IMX23_DMA)</div><div class='ctx'> </div><div class='ctx'> #define HW_APBHX_CTRL0				0x000</div><div class='ctx'> #define BM_APBH_CTRL0_APB_BURST8_EN		(1 &lt;&lt; 29)</div><div class='hunk'>@@ -51,13 +50,14 @@</div><div class='ctx'> #define HW_APBHX_CTRL2				0x020</div><div class='ctx'> #define HW_APBHX_CHANNEL_CTRL			0x030</div><div class='ctx'> #define BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL	16</div><div class='del'>-#define HW_APBH_VERSION				(cpu_is_mx23() ? 0x3f0 : 0x800)</div><div class='del'>-#define HW_APBX_VERSION				0x800</div><div class='del'>-#define BP_APBHX_VERSION_MAJOR			24</div><div class='del'>-#define HW_APBHX_CHn_NXTCMDAR(n) \</div><div class='del'>-	(((dma_is_apbh() &amp;&amp; apbh_is_old()) ? 0x050 : 0x110) + (n) * 0x70)</div><div class='del'>-#define HW_APBHX_CHn_SEMA(n) \</div><div class='del'>-	(((dma_is_apbh() &amp;&amp; apbh_is_old()) ? 0x080 : 0x140) + (n) * 0x70)</div><div class='add'>+/*</div><div class='add'>+ * The offset of NXTCMDAR register is different per both dma type and version,</div><div class='add'>+ * while stride for each channel is all the same 0x70.</div><div class='add'>+ */</div><div class='add'>+#define HW_APBHX_CHn_NXTCMDAR(d, n) \</div><div class='add'>+	(((dma_is_apbh(d) &amp;&amp; apbh_is_old(d)) ? 0x050 : 0x110) + (n) * 0x70)</div><div class='add'>+#define HW_APBHX_CHn_SEMA(d, n) \</div><div class='add'>+	(((dma_is_apbh(d) &amp;&amp; apbh_is_old(d)) ? 0x080 : 0x140) + (n) * 0x70)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * ccw bits definitions</div><div class='hunk'>@@ -121,9 +121,19 @@ struct mxs_dma_chan {</div><div class='ctx'> #define MXS_DMA_CHANNELS		16</div><div class='ctx'> #define MXS_DMA_CHANNELS_MASK		0xffff</div><div class='ctx'> </div><div class='add'>+enum mxs_dma_devtype {</div><div class='add'>+	MXS_DMA_APBH,</div><div class='add'>+	MXS_DMA_APBX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mxs_dma_id {</div><div class='add'>+	IMX23_DMA,</div><div class='add'>+	IMX28_DMA,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mxs_dma_engine {</div><div class='del'>-	int				dev_id;</div><div class='del'>-	unsigned int			version;</div><div class='add'>+	enum mxs_dma_id			dev_id;</div><div class='add'>+	enum mxs_dma_devtype		type;</div><div class='ctx'> 	void __iomem			*base;</div><div class='ctx'> 	struct clk			*clk;</div><div class='ctx'> 	struct dma_device		dma_device;</div><div class='hunk'>@@ -131,17 +141,86 @@ struct mxs_dma_engine {</div><div class='ctx'> 	struct mxs_dma_chan		mxs_chans[MXS_DMA_CHANNELS];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mxs_dma_type {</div><div class='add'>+	enum mxs_dma_id id;</div><div class='add'>+	enum mxs_dma_devtype type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mxs_dma_type mxs_dma_types[] = {</div><div class='add'>+	{</div><div class='add'>+		.id = IMX23_DMA,</div><div class='add'>+		.type = MXS_DMA_APBH,</div><div class='add'>+	}, {</div><div class='add'>+		.id = IMX23_DMA,</div><div class='add'>+		.type = MXS_DMA_APBX,</div><div class='add'>+	}, {</div><div class='add'>+		.id = IMX28_DMA,</div><div class='add'>+		.type = MXS_DMA_APBH,</div><div class='add'>+	}, {</div><div class='add'>+		.id = IMX28_DMA,</div><div class='add'>+		.type = MXS_DMA_APBX,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device_id mxs_dma_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "imx23-dma-apbh",</div><div class='add'>+		.driver_data = (kernel_ulong_t) &amp;mxs_dma_types[0],</div><div class='add'>+	}, {</div><div class='add'>+		.name = "imx23-dma-apbx",</div><div class='add'>+		.driver_data = (kernel_ulong_t) &amp;mxs_dma_types[1],</div><div class='add'>+	}, {</div><div class='add'>+		.name = "imx28-dma-apbh",</div><div class='add'>+		.driver_data = (kernel_ulong_t) &amp;mxs_dma_types[2],</div><div class='add'>+	}, {</div><div class='add'>+		.name = "imx28-dma-apbx",</div><div class='add'>+		.driver_data = (kernel_ulong_t) &amp;mxs_dma_types[3],</div><div class='add'>+	}, {</div><div class='add'>+		/* end of list */</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mxs_dma_dt_ids[] = {</div><div class='add'>+	{ .compatible = "fsl,imx23-dma-apbh", .data = &amp;mxs_dma_ids[0], },</div><div class='add'>+	{ .compatible = "fsl,imx23-dma-apbx", .data = &amp;mxs_dma_ids[1], },</div><div class='add'>+	{ .compatible = "fsl,imx28-dma-apbh", .data = &amp;mxs_dma_ids[2], },</div><div class='add'>+	{ .compatible = "fsl,imx28-dma-apbx", .data = &amp;mxs_dma_ids[3], },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, mxs_dma_dt_ids);</div><div class='add'>+</div><div class='add'>+static struct mxs_dma_chan *to_mxs_dma_chan(struct dma_chan *chan)</div><div class='add'>+{</div><div class='add'>+	return container_of(chan, struct mxs_dma_chan, chan);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mxs_dma_is_apbh(struct dma_chan *chan)</div><div class='add'>+{</div><div class='add'>+	struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);</div><div class='add'>+	struct mxs_dma_engine *mxs_dma = mxs_chan-&gt;mxs_dma;</div><div class='add'>+</div><div class='add'>+	return dma_is_apbh(mxs_dma);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mxs_dma_is_apbx(struct dma_chan *chan)</div><div class='add'>+{</div><div class='add'>+	struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);</div><div class='add'>+	struct mxs_dma_engine *mxs_dma = mxs_chan-&gt;mxs_dma;</div><div class='add'>+</div><div class='add'>+	return !dma_is_apbh(mxs_dma);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mxs_dma_reset_chan(struct mxs_dma_chan *mxs_chan)</div><div class='ctx'> {</div><div class='ctx'> 	struct mxs_dma_engine *mxs_dma = mxs_chan-&gt;mxs_dma;</div><div class='ctx'> 	int chan_id = mxs_chan-&gt;chan.chan_id;</div><div class='ctx'> </div><div class='del'>-	if (dma_is_apbh() &amp;&amp; apbh_is_old())</div><div class='add'>+	if (dma_is_apbh(mxs_dma) &amp;&amp; apbh_is_old(mxs_dma))</div><div class='ctx'> 		writel(1 &lt;&lt; (chan_id + BP_APBH_CTRL0_RESET_CHANNEL),</div><div class='del'>-			mxs_dma-&gt;base + HW_APBHX_CTRL0 + MXS_SET_ADDR);</div><div class='add'>+			mxs_dma-&gt;base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);</div><div class='ctx'> 	else</div><div class='ctx'> 		writel(1 &lt;&lt; (chan_id + BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL),</div><div class='del'>-			mxs_dma-&gt;base + HW_APBHX_CHANNEL_CTRL + MXS_SET_ADDR);</div><div class='add'>+			mxs_dma-&gt;base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_SET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan)</div><div class='hunk'>@@ -151,10 +230,10 @@ static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan)</div><div class='ctx'> </div><div class='ctx'> 	/* set cmd_addr up */</div><div class='ctx'> 	writel(mxs_chan-&gt;ccw_phys,</div><div class='del'>-		mxs_dma-&gt;base + HW_APBHX_CHn_NXTCMDAR(chan_id));</div><div class='add'>+		mxs_dma-&gt;base + HW_APBHX_CHn_NXTCMDAR(mxs_dma, chan_id));</div><div class='ctx'> </div><div class='ctx'> 	/* write 1 to SEMA to kick off the channel */</div><div class='del'>-	writel(1, mxs_dma-&gt;base + HW_APBHX_CHn_SEMA(chan_id));</div><div class='add'>+	writel(1, mxs_dma-&gt;base + HW_APBHX_CHn_SEMA(mxs_dma, chan_id));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mxs_dma_disable_chan(struct mxs_dma_chan *mxs_chan)</div><div class='hunk'>@@ -168,12 +247,12 @@ static void mxs_dma_pause_chan(struct mxs_dma_chan *mxs_chan)</div><div class='ctx'> 	int chan_id = mxs_chan-&gt;chan.chan_id;</div><div class='ctx'> </div><div class='ctx'> 	/* freeze the channel */</div><div class='del'>-	if (dma_is_apbh() &amp;&amp; apbh_is_old())</div><div class='add'>+	if (dma_is_apbh(mxs_dma) &amp;&amp; apbh_is_old(mxs_dma))</div><div class='ctx'> 		writel(1 &lt;&lt; chan_id,</div><div class='del'>-			mxs_dma-&gt;base + HW_APBHX_CTRL0 + MXS_SET_ADDR);</div><div class='add'>+			mxs_dma-&gt;base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);</div><div class='ctx'> 	else</div><div class='ctx'> 		writel(1 &lt;&lt; chan_id,</div><div class='del'>-			mxs_dma-&gt;base + HW_APBHX_CHANNEL_CTRL + MXS_SET_ADDR);</div><div class='add'>+			mxs_dma-&gt;base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_SET);</div><div class='ctx'> </div><div class='ctx'> 	mxs_chan-&gt;status = DMA_PAUSED;</div><div class='ctx'> }</div><div class='hunk'>@@ -184,21 +263,16 @@ static void mxs_dma_resume_chan(struct mxs_dma_chan *mxs_chan)</div><div class='ctx'> 	int chan_id = mxs_chan-&gt;chan.chan_id;</div><div class='ctx'> </div><div class='ctx'> 	/* unfreeze the channel */</div><div class='del'>-	if (dma_is_apbh() &amp;&amp; apbh_is_old())</div><div class='add'>+	if (dma_is_apbh(mxs_dma) &amp;&amp; apbh_is_old(mxs_dma))</div><div class='ctx'> 		writel(1 &lt;&lt; chan_id,</div><div class='del'>-			mxs_dma-&gt;base + HW_APBHX_CTRL0 + MXS_CLR_ADDR);</div><div class='add'>+			mxs_dma-&gt;base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_CLR);</div><div class='ctx'> 	else</div><div class='ctx'> 		writel(1 &lt;&lt; chan_id,</div><div class='del'>-			mxs_dma-&gt;base + HW_APBHX_CHANNEL_CTRL + MXS_CLR_ADDR);</div><div class='add'>+			mxs_dma-&gt;base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_CLR);</div><div class='ctx'> </div><div class='ctx'> 	mxs_chan-&gt;status = DMA_IN_PROGRESS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct mxs_dma_chan *to_mxs_dma_chan(struct dma_chan *chan)</div><div class='del'>-{</div><div class='del'>-	return container_of(chan, struct mxs_dma_chan, chan);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static dma_cookie_t mxs_dma_tx_submit(struct dma_async_tx_descriptor *tx)</div><div class='ctx'> {</div><div class='ctx'> 	return dma_cookie_assign(tx);</div><div class='hunk'>@@ -220,11 +294,11 @@ static irqreturn_t mxs_dma_int_handler(int irq, void *dev_id)</div><div class='ctx'> 	/* completion status */</div><div class='ctx'> 	stat1 = readl(mxs_dma-&gt;base + HW_APBHX_CTRL1);</div><div class='ctx'> 	stat1 &amp;= MXS_DMA_CHANNELS_MASK;</div><div class='del'>-	writel(stat1, mxs_dma-&gt;base + HW_APBHX_CTRL1 + MXS_CLR_ADDR);</div><div class='add'>+	writel(stat1, mxs_dma-&gt;base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_CLR);</div><div class='ctx'> </div><div class='ctx'> 	/* error status */</div><div class='ctx'> 	stat2 = readl(mxs_dma-&gt;base + HW_APBHX_CTRL2);</div><div class='del'>-	writel(stat2, mxs_dma-&gt;base + HW_APBHX_CTRL2 + MXS_CLR_ADDR);</div><div class='add'>+	writel(stat2, mxs_dma-&gt;base + HW_APBHX_CTRL2 + STMP_OFFSET_REG_CLR);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * When both completion and error of termination bits set at the</div><div class='hunk'>@@ -415,9 +489,9 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg(</div><div class='ctx'> 		ccw-&gt;bits |= BF_CCW(MXS_DMA_CMD_NO_XFER, COMMAND);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		for_each_sg(sgl, sg, sg_len, i) {</div><div class='del'>-			if (sg-&gt;length &gt; MAX_XFER_BYTES) {</div><div class='add'>+			if (sg_dma_len(sg) &gt; MAX_XFER_BYTES) {</div><div class='ctx'> 				dev_err(mxs_dma-&gt;dma_device.dev, "maximum bytes for sg entry exceeded: %d &gt; %d\n",</div><div class='del'>-						sg-&gt;length, MAX_XFER_BYTES);</div><div class='add'>+						sg_dma_len(sg), MAX_XFER_BYTES);</div><div class='ctx'> 				goto err_out;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -425,7 +499,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg(</div><div class='ctx'> </div><div class='ctx'> 			ccw-&gt;next = mxs_chan-&gt;ccw_phys + sizeof(*ccw) * idx;</div><div class='ctx'> 			ccw-&gt;bufaddr = sg-&gt;dma_address;</div><div class='del'>-			ccw-&gt;xfer_bytes = sg-&gt;length;</div><div class='add'>+			ccw-&gt;xfer_bytes = sg_dma_len(sg);</div><div class='ctx'> </div><div class='ctx'> 			ccw-&gt;bits = 0;</div><div class='ctx'> 			ccw-&gt;bits |= CCW_CHAIN;</div><div class='hunk'>@@ -567,27 +641,21 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = mxs_reset_block(mxs_dma-&gt;base);</div><div class='add'>+	ret = stmp_reset_block(mxs_dma-&gt;base);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> </div><div class='del'>-	/* only major version matters */</div><div class='del'>-	mxs_dma-&gt;version = readl(mxs_dma-&gt;base +</div><div class='del'>-				((mxs_dma-&gt;dev_id == MXS_DMA_APBX) ?</div><div class='del'>-				HW_APBX_VERSION : HW_APBH_VERSION)) &gt;&gt;</div><div class='del'>-				BP_APBHX_VERSION_MAJOR;</div><div class='del'>-</div><div class='ctx'> 	/* enable apbh burst */</div><div class='del'>-	if (dma_is_apbh()) {</div><div class='add'>+	if (dma_is_apbh(mxs_dma)) {</div><div class='ctx'> 		writel(BM_APBH_CTRL0_APB_BURST_EN,</div><div class='del'>-			mxs_dma-&gt;base + HW_APBHX_CTRL0 + MXS_SET_ADDR);</div><div class='add'>+			mxs_dma-&gt;base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);</div><div class='ctx'> 		writel(BM_APBH_CTRL0_APB_BURST8_EN,</div><div class='del'>-			mxs_dma-&gt;base + HW_APBHX_CTRL0 + MXS_SET_ADDR);</div><div class='add'>+			mxs_dma-&gt;base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* enable irq for all the channels */</div><div class='ctx'> 	writel(MXS_DMA_CHANNELS_MASK &lt;&lt; MXS_DMA_CHANNELS,</div><div class='del'>-		mxs_dma-&gt;base + HW_APBHX_CTRL1 + MXS_SET_ADDR);</div><div class='add'>+		mxs_dma-&gt;base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_SET);</div><div class='ctx'> </div><div class='ctx'> err_out:</div><div class='ctx'> 	clk_disable_unprepare(mxs_dma-&gt;clk);</div><div class='hunk'>@@ -596,8 +664,9 @@ err_out:</div><div class='ctx'> </div><div class='ctx'> static int __init mxs_dma_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	const struct platform_device_id *id_entry =</div><div class='del'>-				platform_get_device_id(pdev);</div><div class='add'>+	const struct platform_device_id *id_entry;</div><div class='add'>+	const struct of_device_id *of_id;</div><div class='add'>+	const struct mxs_dma_type *dma_type;</div><div class='ctx'> 	struct mxs_dma_engine *mxs_dma;</div><div class='ctx'> 	struct resource *iores;</div><div class='ctx'> 	int ret, i;</div><div class='hunk'>@@ -606,7 +675,15 @@ static int __init mxs_dma_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!mxs_dma)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	mxs_dma-&gt;dev_id = id_entry-&gt;driver_data;</div><div class='add'>+	of_id = of_match_device(mxs_dma_dt_ids, &amp;pdev-&gt;dev);</div><div class='add'>+	if (of_id)</div><div class='add'>+		id_entry = of_id-&gt;data;</div><div class='add'>+	else</div><div class='add'>+		id_entry = platform_get_device_id(pdev);</div><div class='add'>+</div><div class='add'>+	dma_type = (struct mxs_dma_type *)id_entry-&gt;driver_data;</div><div class='add'>+	mxs_dma-&gt;type = dma_type-&gt;type;</div><div class='add'>+	mxs_dma-&gt;dev_id = dma_type-&gt;id;</div><div class='ctx'> </div><div class='ctx'> 	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -689,23 +766,12 @@ err_request_region:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct platform_device_id mxs_dma_type[] = {</div><div class='del'>-	{</div><div class='del'>-		.name = "mxs-dma-apbh",</div><div class='del'>-		.driver_data = MXS_DMA_APBH,</div><div class='del'>-	}, {</div><div class='del'>-		.name = "mxs-dma-apbx",</div><div class='del'>-		.driver_data = MXS_DMA_APBX,</div><div class='del'>-	}, {</div><div class='del'>-		/* end of list */</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct platform_driver mxs_dma_driver = {</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "mxs-dma",</div><div class='add'>+		.of_match_table = mxs_dma_dt_ids,</div><div class='ctx'> 	},</div><div class='del'>-	.id_table	= mxs_dma_type,</div><div class='add'>+	.id_table	= mxs_dma_ids,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init mxs_dma_module_init(void)</div><div class='head'>diff --git a/drivers/dma/pch_dma.c b/drivers/dma/pch_dma.c<br/>index 65c0495a6d40..987ab5cd2617 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/pch_dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/pch_dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/pch_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/pch_dma.c</a></div><div class='hunk'>@@ -621,7 +621,7 @@ static struct dma_async_tx_descriptor *pd_prep_slave_sg(struct dma_chan *chan,</div><div class='ctx'> 			goto err_desc_get;</div><div class='ctx'> </div><div class='ctx'> 		desc-&gt;regs.dev_addr = reg;</div><div class='del'>-		desc-&gt;regs.mem_addr = sg_phys(sg);</div><div class='add'>+		desc-&gt;regs.mem_addr = sg_dma_address(sg);</div><div class='ctx'> 		desc-&gt;regs.size = sg_dma_len(sg);</div><div class='ctx'> 		desc-&gt;regs.next = DMA_DESC_FOLLOW_WITHOUT_IRQ;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c<br/>index 2ee6e23930ad..cbcc28e79be6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/pl330.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/pl330.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/pl330.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/pl330.c</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/dmaengine.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/amba/bus.h&gt;</div><div class='ctx'> #include &lt;linux/amba/pl330.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='hunk'>@@ -2322,7 +2321,8 @@ static void pl330_tasklet(unsigned long data)</div><div class='ctx'> 	/* Pick up ripe tomatoes */</div><div class='ctx'> 	list_for_each_entry_safe(desc, _dt, &amp;pch-&gt;work_list, node)</div><div class='ctx'> 		if (desc-&gt;status == DONE) {</div><div class='del'>-			dma_cookie_complete(&amp;desc-&gt;txd);</div><div class='add'>+			if (pch-&gt;cyclic)</div><div class='add'>+				dma_cookie_complete(&amp;desc-&gt;txd);</div><div class='ctx'> 			list_move_tail(&amp;desc-&gt;node, &amp;list);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c<br/>index 2ed1ac3513f3..000d309602b2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/dma/ste_dma40.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/dma/ste_dma40.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/dma/ste_dma40.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/dma/ste_dma40.c</a></div><div class='hunk'>@@ -2362,7 +2362,7 @@ dma40_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t dma_addr,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	sg[periods].offset = 0;</div><div class='del'>-	sg[periods].length = 0;</div><div class='add'>+	sg_dma_len(&amp;sg[periods]) = 0;</div><div class='ctx'> 	sg[periods].page_link =</div><div class='ctx'> 		((unsigned long)sg | 0x01) &amp; ~0x02;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c<br/>index 7ef73c919c5d..7be9b7288e90 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/amd64_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/amd64_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/amd64_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/amd64_edac.c</a></div><div class='hunk'>@@ -715,25 +715,6 @@ static inline u64 input_addr_to_sys_addr(struct mem_ctl_info *mci,</div><div class='ctx'> 				     input_addr_to_dram_addr(mci, input_addr));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Find the minimum and maximum InputAddr values that map to the given @csrow.</div><div class='del'>- * Pass back these values in *input_addr_min and *input_addr_max.</div><div class='del'>- */</div><div class='del'>-static void find_csrow_limits(struct mem_ctl_info *mci, int csrow,</div><div class='del'>-			      u64 *input_addr_min, u64 *input_addr_max)</div><div class='del'>-{</div><div class='del'>-	struct amd64_pvt *pvt;</div><div class='del'>-	u64 base, mask;</div><div class='del'>-</div><div class='del'>-	pvt = mci-&gt;pvt_info;</div><div class='del'>-	BUG_ON((csrow &lt; 0) || (csrow &gt;= pvt-&gt;csels[0].b_cnt));</div><div class='del'>-</div><div class='del'>-	get_cs_base_and_mask(pvt, csrow, 0, &amp;base, &amp;mask);</div><div class='del'>-</div><div class='del'>-	*input_addr_min = base &amp; ~mask;</div><div class='del'>-	*input_addr_max = base | mask;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Map the Error address to a PAGE and PAGE OFFSET. */</div><div class='ctx'> static inline void error_address_to_page_and_offset(u64 error_address,</div><div class='ctx'> 						    u32 *page, u32 *offset)</div><div class='hunk'>@@ -1058,6 +1039,37 @@ static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,</div><div class='ctx'> 	int channel, csrow;</div><div class='ctx'> 	u32 page, offset;</div><div class='ctx'> </div><div class='add'>+	error_address_to_page_and_offset(sys_addr, &amp;page, &amp;offset);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Find out which node the error address belongs to. This may be</div><div class='add'>+	 * different from the node that detected the error.</div><div class='add'>+	 */</div><div class='add'>+	src_mci = find_mc_by_sys_addr(mci, sys_addr);</div><div class='add'>+	if (!src_mci) {</div><div class='add'>+		amd64_mc_err(mci, "failed to map error addr 0x%lx to a node\n",</div><div class='add'>+			     (unsigned long)sys_addr);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     page, offset, syndrome,</div><div class='add'>+				     -1, -1, -1,</div><div class='add'>+				     EDAC_MOD_STR,</div><div class='add'>+				     "failed to map error addr to a node",</div><div class='add'>+				     NULL);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Now map the sys_addr to a CSROW */</div><div class='add'>+	csrow = sys_addr_to_csrow(src_mci, sys_addr);</div><div class='add'>+	if (csrow &lt; 0) {</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     page, offset, syndrome,</div><div class='add'>+				     -1, -1, -1,</div><div class='add'>+				     EDAC_MOD_STR,</div><div class='add'>+				     "failed to map error addr to a csrow",</div><div class='add'>+				     NULL);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* CHIPKILL enabled */</div><div class='ctx'> 	if (pvt-&gt;nbcfg &amp; NBCFG_CHIPKILL) {</div><div class='ctx'> 		channel = get_channel_from_ecc_syndrome(mci, syndrome);</div><div class='hunk'>@@ -1067,9 +1079,15 @@ static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,</div><div class='ctx'> 			 * 2 DIMMs is in error. So we need to ID 'both' of them</div><div class='ctx'> 			 * as suspect.</div><div class='ctx'> 			 */</div><div class='del'>-			amd64_mc_warn(mci, "unknown syndrome 0x%04x - possible "</div><div class='del'>-					   "error reporting race\n", syndrome);</div><div class='del'>-			edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR);</div><div class='add'>+			amd64_mc_warn(src_mci, "unknown syndrome 0x%04x - "</div><div class='add'>+				      "possible error reporting race\n",</div><div class='add'>+				      syndrome);</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+					     page, offset, syndrome,</div><div class='add'>+					     csrow, -1, -1,</div><div class='add'>+					     EDAC_MOD_STR,</div><div class='add'>+					     "unknown syndrome - possible error reporting race",</div><div class='add'>+					     NULL);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1084,28 +1102,10 @@ static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,</div><div class='ctx'> 		channel = ((sys_addr &amp; BIT(3)) != 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Find out which node the error address belongs to. This may be</div><div class='del'>-	 * different from the node that detected the error.</div><div class='del'>-	 */</div><div class='del'>-	src_mci = find_mc_by_sys_addr(mci, sys_addr);</div><div class='del'>-	if (!src_mci) {</div><div class='del'>-		amd64_mc_err(mci, "failed to map error addr 0x%lx to a node\n",</div><div class='del'>-			     (unsigned long)sys_addr);</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Now map the sys_addr to a CSROW */</div><div class='del'>-	csrow = sys_addr_to_csrow(src_mci, sys_addr);</div><div class='del'>-	if (csrow &lt; 0) {</div><div class='del'>-		edac_mc_handle_ce_no_info(src_mci, EDAC_MOD_STR);</div><div class='del'>-	} else {</div><div class='del'>-		error_address_to_page_and_offset(sys_addr, &amp;page, &amp;offset);</div><div class='del'>-</div><div class='del'>-		edac_mc_handle_ce(src_mci, page, offset, syndrome, csrow,</div><div class='del'>-				  channel, EDAC_MOD_STR);</div><div class='del'>-	}</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, src_mci,</div><div class='add'>+			     page, offset, syndrome,</div><div class='add'>+			     csrow, channel, -1,</div><div class='add'>+			     EDAC_MOD_STR, "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ddr2_cs_size(unsigned i, bool dct_width)</div><div class='hunk'>@@ -1611,15 +1611,20 @@ static void f1x_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,</div><div class='ctx'> 	u32 page, offset;</div><div class='ctx'> 	int nid, csrow, chan = 0;</div><div class='ctx'> </div><div class='add'>+	error_address_to_page_and_offset(sys_addr, &amp;page, &amp;offset);</div><div class='add'>+</div><div class='ctx'> 	csrow = f1x_translate_sysaddr_to_cs(pvt, sys_addr, &amp;nid, &amp;chan);</div><div class='ctx'> </div><div class='ctx'> 	if (csrow &lt; 0) {</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     page, offset, syndrome,</div><div class='add'>+				     -1, -1, -1,</div><div class='add'>+				     EDAC_MOD_STR,</div><div class='add'>+				     "failed to map error addr to a csrow",</div><div class='add'>+				     NULL);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	error_address_to_page_and_offset(sys_addr, &amp;page, &amp;offset);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We need the syndromes for channel detection only when we're</div><div class='ctx'> 	 * ganged. Otherwise @chan should already contain the channel at</div><div class='hunk'>@@ -1628,16 +1633,10 @@ static void f1x_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,</div><div class='ctx'> 	if (dct_ganging_enabled(pvt))</div><div class='ctx'> 		chan = get_channel_from_ecc_syndrome(mci, syndrome);</div><div class='ctx'> </div><div class='del'>-	if (chan &gt;= 0)</div><div class='del'>-		edac_mc_handle_ce(mci, page, offset, syndrome, csrow, chan,</div><div class='del'>-				  EDAC_MOD_STR);</div><div class='del'>-	else</div><div class='del'>-		/*</div><div class='del'>-		 * Channel unknown, report all channels on this CSROW as failed.</div><div class='del'>-		 */</div><div class='del'>-		for (chan = 0; chan &lt; mci-&gt;csrows[csrow].nr_channels; chan++)</div><div class='del'>-			edac_mc_handle_ce(mci, page, offset, syndrome,</div><div class='del'>-					  csrow, chan, EDAC_MOD_STR);</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+			     page, offset, syndrome,</div><div class='add'>+			     csrow, chan, -1,</div><div class='add'>+			     EDAC_MOD_STR, "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1918,7 +1917,12 @@ static void amd64_handle_ce(struct mem_ctl_info *mci, struct mce *m)</div><div class='ctx'> 	/* Ensure that the Error Address is VALID */</div><div class='ctx'> 	if (!(m-&gt;status &amp; MCI_STATUS_ADDRV)) {</div><div class='ctx'> 		amd64_mc_err(mci, "HW has no ERROR_ADDRESS available\n");</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     0, 0, 0,</div><div class='add'>+				     -1, -1, -1,</div><div class='add'>+				     EDAC_MOD_STR,</div><div class='add'>+				     "HW has no ERROR_ADDRESS available",</div><div class='add'>+				     NULL);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1942,11 +1946,17 @@ static void amd64_handle_ue(struct mem_ctl_info *mci, struct mce *m)</div><div class='ctx'> </div><div class='ctx'> 	if (!(m-&gt;status &amp; MCI_STATUS_ADDRV)) {</div><div class='ctx'> 		amd64_mc_err(mci, "HW has no ERROR_ADDRESS available\n");</div><div class='del'>-		edac_mc_handle_ue_no_info(log_mci, EDAC_MOD_STR);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+				     0, 0, 0,</div><div class='add'>+				     -1, -1, -1,</div><div class='add'>+				     EDAC_MOD_STR,</div><div class='add'>+				     "HW has no ERROR_ADDRESS available",</div><div class='add'>+				     NULL);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	sys_addr = get_error_address(m);</div><div class='add'>+	error_address_to_page_and_offset(sys_addr, &amp;page, &amp;offset);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Find out which node the error address belongs to. This may be</div><div class='hunk'>@@ -1956,7 +1966,11 @@ static void amd64_handle_ue(struct mem_ctl_info *mci, struct mce *m)</div><div class='ctx'> 	if (!src_mci) {</div><div class='ctx'> 		amd64_mc_err(mci, "ERROR ADDRESS (0x%lx) NOT mapped to a MC\n",</div><div class='ctx'> 				  (unsigned long)sys_addr);</div><div class='del'>-		edac_mc_handle_ue_no_info(log_mci, EDAC_MOD_STR);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+				     page, offset, 0,</div><div class='add'>+				     -1, -1, -1,</div><div class='add'>+				     EDAC_MOD_STR,</div><div class='add'>+				     "ERROR ADDRESS NOT mapped to a MC", NULL);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1966,10 +1980,17 @@ static void amd64_handle_ue(struct mem_ctl_info *mci, struct mce *m)</div><div class='ctx'> 	if (csrow &lt; 0) {</div><div class='ctx'> 		amd64_mc_err(mci, "ERROR_ADDRESS (0x%lx) NOT mapped to CS\n",</div><div class='ctx'> 				  (unsigned long)sys_addr);</div><div class='del'>-		edac_mc_handle_ue_no_info(log_mci, EDAC_MOD_STR);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+				     page, offset, 0,</div><div class='add'>+				     -1, -1, -1,</div><div class='add'>+				     EDAC_MOD_STR,</div><div class='add'>+				     "ERROR ADDRESS NOT mapped to CS",</div><div class='add'>+				     NULL);</div><div class='ctx'> 	} else {</div><div class='del'>-		error_address_to_page_and_offset(sys_addr, &amp;page, &amp;offset);</div><div class='del'>-		edac_mc_handle_ue(log_mci, page, offset, csrow, EDAC_MOD_STR);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+				     page, offset, 0,</div><div class='add'>+				     csrow, -1, -1,</div><div class='add'>+				     EDAC_MOD_STR, "", NULL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2171,7 +2192,7 @@ static u32 amd64_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr)</div><div class='ctx'> 	nr_pages = pvt-&gt;ops-&gt;dbam_to_cs(pvt, dct, cs_mode) &lt;&lt; (20 - PAGE_SHIFT);</div><div class='ctx'> </div><div class='ctx'> 	debugf0("  (csrow=%d) DBAM map index= %d\n", csrow_nr, cs_mode);</div><div class='del'>-	debugf0("    nr_pages= %u  channel-count = %d\n",</div><div class='add'>+	debugf0("    nr_pages/channel= %u  channel-count = %d\n",</div><div class='ctx'> 		nr_pages, pvt-&gt;channel_count);</div><div class='ctx'> </div><div class='ctx'> 	return nr_pages;</div><div class='hunk'>@@ -2185,9 +2206,12 @@ static int init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='ctx'> 	struct amd64_pvt *pvt = mci-&gt;pvt_info;</div><div class='del'>-	u64 input_addr_min, input_addr_max, sys_addr, base, mask;</div><div class='add'>+	u64 base, mask;</div><div class='ctx'> 	u32 val;</div><div class='del'>-	int i, empty = 1;</div><div class='add'>+	int i, j, empty = 1;</div><div class='add'>+	enum mem_type mtype;</div><div class='add'>+	enum edac_type edac_mode;</div><div class='add'>+	int nr_pages = 0;</div><div class='ctx'> </div><div class='ctx'> 	amd64_read_pci_cfg(pvt-&gt;F3, NBCFG, &amp;val);</div><div class='ctx'> </div><div class='hunk'>@@ -2211,41 +2235,32 @@ static int init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> </div><div class='ctx'> 		empty = 0;</div><div class='ctx'> 		if (csrow_enabled(i, 0, pvt))</div><div class='del'>-			csrow-&gt;nr_pages = amd64_csrow_nr_pages(pvt, 0, i);</div><div class='add'>+			nr_pages = amd64_csrow_nr_pages(pvt, 0, i);</div><div class='ctx'> 		if (csrow_enabled(i, 1, pvt))</div><div class='del'>-			csrow-&gt;nr_pages += amd64_csrow_nr_pages(pvt, 1, i);</div><div class='del'>-		find_csrow_limits(mci, i, &amp;input_addr_min, &amp;input_addr_max);</div><div class='del'>-		sys_addr = input_addr_to_sys_addr(mci, input_addr_min);</div><div class='del'>-		csrow-&gt;first_page = (u32) (sys_addr &gt;&gt; PAGE_SHIFT);</div><div class='del'>-		sys_addr = input_addr_to_sys_addr(mci, input_addr_max);</div><div class='del'>-		csrow-&gt;last_page = (u32) (sys_addr &gt;&gt; PAGE_SHIFT);</div><div class='add'>+			nr_pages += amd64_csrow_nr_pages(pvt, 1, i);</div><div class='ctx'> </div><div class='ctx'> 		get_cs_base_and_mask(pvt, i, 0, &amp;base, &amp;mask);</div><div class='del'>-		csrow-&gt;page_mask = ~mask;</div><div class='ctx'> 		/* 8 bytes of resolution */</div><div class='ctx'> </div><div class='del'>-		csrow-&gt;mtype = amd64_determine_memory_type(pvt, i);</div><div class='add'>+		mtype = amd64_determine_memory_type(pvt, i);</div><div class='ctx'> </div><div class='ctx'> 		debugf1("  for MC node %d csrow %d:\n", pvt-&gt;mc_node_id, i);</div><div class='del'>-		debugf1("    input_addr_min: 0x%lx input_addr_max: 0x%lx\n",</div><div class='del'>-			(unsigned long)input_addr_min,</div><div class='del'>-			(unsigned long)input_addr_max);</div><div class='del'>-		debugf1("    sys_addr: 0x%lx  page_mask: 0x%lx\n",</div><div class='del'>-			(unsigned long)sys_addr, csrow-&gt;page_mask);</div><div class='del'>-		debugf1("    nr_pages: %u  first_page: 0x%lx "</div><div class='del'>-			"last_page: 0x%lx\n",</div><div class='del'>-			(unsigned)csrow-&gt;nr_pages,</div><div class='del'>-			csrow-&gt;first_page, csrow-&gt;last_page);</div><div class='add'>+		debugf1("    nr_pages: %u\n", nr_pages * pvt-&gt;channel_count);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * determine whether CHIPKILL or JUST ECC or NO ECC is operating</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (pvt-&gt;nbcfg &amp; NBCFG_ECC_ENABLE)</div><div class='del'>-			csrow-&gt;edac_mode =</div><div class='del'>-			    (pvt-&gt;nbcfg &amp; NBCFG_CHIPKILL) ?</div><div class='del'>-			    EDAC_S4ECD4ED : EDAC_SECDED;</div><div class='add'>+			edac_mode = (pvt-&gt;nbcfg &amp; NBCFG_CHIPKILL) ?</div><div class='add'>+				    EDAC_S4ECD4ED : EDAC_SECDED;</div><div class='ctx'> 		else</div><div class='del'>-			csrow-&gt;edac_mode = EDAC_NONE;</div><div class='add'>+			edac_mode = EDAC_NONE;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; pvt-&gt;channel_count; j++) {</div><div class='add'>+			csrow-&gt;channels[j].dimm-&gt;mtype = mtype;</div><div class='add'>+			csrow-&gt;channels[j].dimm-&gt;edac_mode = edac_mode;</div><div class='add'>+			csrow-&gt;channels[j].dimm-&gt;nr_pages = nr_pages;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return empty;</div><div class='hunk'>@@ -2540,6 +2555,7 @@ static int amd64_init_one_instance(struct pci_dev *F2)</div><div class='ctx'> 	struct amd64_pvt *pvt = NULL;</div><div class='ctx'> 	struct amd64_family_type *fam_type = NULL;</div><div class='ctx'> 	struct mem_ctl_info *mci = NULL;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	int err = 0, ret;</div><div class='ctx'> 	u8 nid = get_node_id(F2);</div><div class='ctx'> </div><div class='hunk'>@@ -2574,7 +2590,13 @@ static int amd64_init_one_instance(struct pci_dev *F2)</div><div class='ctx'> 		goto err_siblings;</div><div class='ctx'> </div><div class='ctx'> 	ret = -ENOMEM;</div><div class='del'>-	mci = edac_mc_alloc(0, pvt-&gt;csels[0].b_cnt, pvt-&gt;channel_count, nid);</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = pvt-&gt;csels[0].b_cnt;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = pvt-&gt;channel_count;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(nid, ARRAY_SIZE(layers), layers, 0);</div><div class='ctx'> 	if (!mci)</div><div class='ctx'> 		goto err_siblings;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c<br/>index f8fd3c807bde..9774d443fa57 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/amd76x_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/amd76x_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/amd76x_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/amd76x_edac.c</a></div><div class='hunk'>@@ -29,7 +29,6 @@</div><div class='ctx'> 	edac_mc_chipset_printk(mci, level, "amd76x", fmt, ##arg)</div><div class='ctx'> </div><div class='ctx'> #define AMD76X_NR_CSROWS 8</div><div class='del'>-#define AMD76X_NR_CHANS  1</div><div class='ctx'> #define AMD76X_NR_DIMMS  4</div><div class='ctx'> </div><div class='ctx'> /* AMD 76x register addresses - device 0 function 0 - PCI bridge */</div><div class='hunk'>@@ -146,8 +145,10 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 		if (handle_errors) {</div><div class='ctx'> 			row = (info-&gt;ecc_mode_status &gt;&gt; 4) &amp; 0xf;</div><div class='del'>-			edac_mc_handle_ue(mci, mci-&gt;csrows[row].first_page, 0,</div><div class='del'>-					row, mci-&gt;ctl_name);</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+					     mci-&gt;csrows[row].first_page, 0, 0,</div><div class='add'>+					     row, 0, -1,</div><div class='add'>+					     mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -159,8 +160,10 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 		if (handle_errors) {</div><div class='ctx'> 			row = info-&gt;ecc_mode_status &amp; 0xf;</div><div class='del'>-			edac_mc_handle_ce(mci, mci-&gt;csrows[row].first_page, 0,</div><div class='del'>-					0, row, 0, mci-&gt;ctl_name);</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+					     mci-&gt;csrows[row].first_page, 0, 0,</div><div class='add'>+					     row, 0, -1,</div><div class='add'>+					     mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -186,11 +189,13 @@ static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,</div><div class='ctx'> 			enum edac_type edac_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='ctx'> 	u32 mba, mba_base, mba_mask, dms;</div><div class='ctx'> 	int index;</div><div class='ctx'> </div><div class='ctx'> 	for (index = 0; index &lt; mci-&gt;nr_csrows; index++) {</div><div class='ctx'> 		csrow = &amp;mci-&gt;csrows[index];</div><div class='add'>+		dimm = csrow-&gt;channels[0].dimm;</div><div class='ctx'> </div><div class='ctx'> 		/* find the DRAM Chip Select Base address and mask */</div><div class='ctx'> 		pci_read_config_dword(pdev,</div><div class='hunk'>@@ -203,13 +208,13 @@ static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,</div><div class='ctx'> 		mba_mask = ((mba &amp; 0xff80) &lt;&lt; 16) | 0x7fffffUL;</div><div class='ctx'> 		pci_read_config_dword(pdev, AMD76X_DRAM_MODE_STATUS, &amp;dms);</div><div class='ctx'> 		csrow-&gt;first_page = mba_base &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		csrow-&gt;nr_pages = (mba_mask + 1) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		csrow-&gt;last_page = csrow-&gt;first_page + csrow-&gt;nr_pages - 1;</div><div class='add'>+		dimm-&gt;nr_pages = (mba_mask + 1) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+		csrow-&gt;last_page = csrow-&gt;first_page + dimm-&gt;nr_pages - 1;</div><div class='ctx'> 		csrow-&gt;page_mask = mba_mask &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		csrow-&gt;grain = csrow-&gt;nr_pages &lt;&lt; PAGE_SHIFT;</div><div class='del'>-		csrow-&gt;mtype = MEM_RDDR;</div><div class='del'>-		csrow-&gt;dtype = ((dms &gt;&gt; index) &amp; 0x1) ? DEV_X4 : DEV_UNKNOWN;</div><div class='del'>-		csrow-&gt;edac_mode = edac_mode;</div><div class='add'>+		dimm-&gt;grain = dimm-&gt;nr_pages &lt;&lt; PAGE_SHIFT;</div><div class='add'>+		dimm-&gt;mtype = MEM_RDDR;</div><div class='add'>+		dimm-&gt;dtype = ((dms &gt;&gt; index) &amp; 0x1) ? DEV_X4 : DEV_UNKNOWN;</div><div class='add'>+		dimm-&gt;edac_mode = edac_mode;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -230,7 +235,8 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 		EDAC_SECDED,</div><div class='ctx'> 		EDAC_SECDED</div><div class='ctx'> 	};</div><div class='del'>-	struct mem_ctl_info *mci = NULL;</div><div class='add'>+	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	u32 ems;</div><div class='ctx'> 	u32 ems_mode;</div><div class='ctx'> 	struct amd76x_error_info discard;</div><div class='hunk'>@@ -238,11 +244,17 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	debugf0("%s()\n", __func__);</div><div class='ctx'> 	pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, &amp;ems);</div><div class='ctx'> 	ems_mode = (ems &gt;&gt; 10) &amp; 0x3;</div><div class='del'>-	mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS, 0);</div><div class='ctx'> </div><div class='del'>-	if (mci == NULL) {</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = AMD76X_NR_CSROWS;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = 1;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0);</div><div class='add'>+</div><div class='add'>+	if (mci == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	debugf0("%s(): mci = %p\n", __func__, mci);</div><div class='ctx'> 	mci-&gt;dev = &amp;pdev-&gt;dev;</div><div class='head'>diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c<br/>index 9a6a274e6925..69ee6aab5c71 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/cell_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/cell_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/cell_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/cell_edac.c</a></div><div class='hunk'>@@ -48,8 +48,9 @@ static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar)</div><div class='ctx'> 	syndrome = (ar &amp; 0x000000001fe00000ul) &gt;&gt; 21;</div><div class='ctx'> </div><div class='ctx'> 	/* TODO: Decoding of the error address */</div><div class='del'>-	edac_mc_handle_ce(mci, csrow-&gt;first_page + pfn, offset,</div><div class='del'>-			  syndrome, 0, chan, "");</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+			     csrow-&gt;first_page + pfn, offset, syndrome,</div><div class='add'>+			     0, chan, -1, "", "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar)</div><div class='hunk'>@@ -69,7 +70,9 @@ static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar)</div><div class='ctx'> 	offset = address &amp; ~PAGE_MASK;</div><div class='ctx'> </div><div class='ctx'> 	/* TODO: Decoding of the error address */</div><div class='del'>-	edac_mc_handle_ue(mci, csrow-&gt;first_page + pfn, offset, 0, "");</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+			     csrow-&gt;first_page + pfn, offset, 0,</div><div class='add'>+			     0, chan, -1, "", "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cell_edac_check(struct mem_ctl_info *mci)</div><div class='hunk'>@@ -124,8 +127,11 @@ static void cell_edac_check(struct mem_ctl_info *mci)</div><div class='ctx'> static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info		*csrow = &amp;mci-&gt;csrows[0];</div><div class='add'>+	struct dimm_info		*dimm;</div><div class='ctx'> 	struct cell_edac_priv		*priv = mci-&gt;pvt_info;</div><div class='ctx'> 	struct device_node		*np;</div><div class='add'>+	int				j;</div><div class='add'>+	u32				nr_pages;</div><div class='ctx'> </div><div class='ctx'> 	for (np = NULL;</div><div class='ctx'> 	     (np = of_find_node_by_name(np, "memory")) != NULL;) {</div><div class='hunk'>@@ -140,15 +146,20 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> 		if (of_node_to_nid(np) != priv-&gt;node)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		csrow-&gt;first_page = r.start &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		csrow-&gt;nr_pages = resource_size(&amp;r) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		csrow-&gt;last_page = csrow-&gt;first_page + csrow-&gt;nr_pages - 1;</div><div class='del'>-		csrow-&gt;mtype = MEM_XDR;</div><div class='del'>-		csrow-&gt;edac_mode = EDAC_SECDED;</div><div class='add'>+		nr_pages = resource_size(&amp;r) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+		csrow-&gt;last_page = csrow-&gt;first_page + nr_pages - 1;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; csrow-&gt;nr_channels; j++) {</div><div class='add'>+			dimm = csrow-&gt;channels[j].dimm;</div><div class='add'>+			dimm-&gt;mtype = MEM_XDR;</div><div class='add'>+			dimm-&gt;edac_mode = EDAC_SECDED;</div><div class='add'>+			dimm-&gt;nr_pages = nr_pages / csrow-&gt;nr_channels;</div><div class='add'>+		}</div><div class='ctx'> 		dev_dbg(mci-&gt;dev,</div><div class='ctx'> 			"Initialized on node %d, chanmask=0x%x,"</div><div class='ctx'> 			" first_page=0x%lx, nr_pages=0x%x\n",</div><div class='ctx'> 			priv-&gt;node, priv-&gt;chanmask,</div><div class='del'>-			csrow-&gt;first_page, csrow-&gt;nr_pages);</div><div class='add'>+			csrow-&gt;first_page, nr_pages);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -157,9 +168,10 @@ static int __devinit cell_edac_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct cbe_mic_tm_regs __iomem	*regs;</div><div class='ctx'> 	struct mem_ctl_info		*mci;</div><div class='add'>+	struct edac_mc_layer		layers[2];</div><div class='ctx'> 	struct cell_edac_priv		*priv;</div><div class='ctx'> 	u64				reg;</div><div class='del'>-	int				rc, chanmask;</div><div class='add'>+	int				rc, chanmask, num_chans;</div><div class='ctx'> </div><div class='ctx'> 	regs = cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(pdev-&gt;id));</div><div class='ctx'> 	if (regs == NULL)</div><div class='hunk'>@@ -184,8 +196,16 @@ static int __devinit cell_edac_probe(struct platform_device *pdev)</div><div class='ctx'> 		in_be64(&amp;regs-&gt;mic_fir));</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate &amp; init EDAC MC data structure */</div><div class='del'>-	mci = edac_mc_alloc(sizeof(struct cell_edac_priv), 1,</div><div class='del'>-			    chanmask == 3 ? 2 : 1, pdev-&gt;id);</div><div class='add'>+	num_chans = chanmask == 3 ? 2 : 1;</div><div class='add'>+</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = 1;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = num_chans;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(pdev-&gt;id, ARRAY_SIZE(layers), layers,</div><div class='add'>+			    sizeof(struct cell_edac_priv));</div><div class='ctx'> 	if (mci == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	priv = mci-&gt;pvt_info;</div><div class='head'>diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c<br/>index a774c0ddaf5b..e22030a9de66 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/cpc925_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/cpc925_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/cpc925_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/cpc925_edac.c</a></div><div class='hunk'>@@ -329,9 +329,10 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpc925_mc_pdata *pdata = mci-&gt;pvt_info;</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='del'>-	int index;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='add'>+	int index, j;</div><div class='ctx'> 	u32 mbmr, mbbar, bba;</div><div class='del'>-	unsigned long row_size, last_nr_pages = 0;</div><div class='add'>+	unsigned long row_size, nr_pages, last_nr_pages = 0;</div><div class='ctx'> </div><div class='ctx'> 	get_total_mem(pdata);</div><div class='ctx'> </div><div class='hunk'>@@ -350,36 +351,41 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> </div><div class='ctx'> 		row_size = bba * (1UL &lt;&lt; 28);	/* 256M */</div><div class='ctx'> 		csrow-&gt;first_page = last_nr_pages;</div><div class='del'>-		csrow-&gt;nr_pages = row_size &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		csrow-&gt;last_page = csrow-&gt;first_page + csrow-&gt;nr_pages - 1;</div><div class='add'>+		nr_pages = row_size &gt;&gt; PAGE_SHIFT;</div><div class='add'>+		csrow-&gt;last_page = csrow-&gt;first_page + nr_pages - 1;</div><div class='ctx'> 		last_nr_pages = csrow-&gt;last_page + 1;</div><div class='ctx'> </div><div class='del'>-		csrow-&gt;mtype = MEM_RDDR;</div><div class='del'>-		csrow-&gt;edac_mode = EDAC_SECDED;</div><div class='del'>-</div><div class='del'>-		switch (csrow-&gt;nr_channels) {</div><div class='del'>-		case 1: /* Single channel */</div><div class='del'>-			csrow-&gt;grain = 32; /* four-beat burst of 32 bytes */</div><div class='del'>-			break;</div><div class='del'>-		case 2: /* Dual channel */</div><div class='del'>-		default:</div><div class='del'>-			csrow-&gt;grain = 64; /* four-beat burst of 64 bytes */</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		switch ((mbmr &amp; MBMR_MODE_MASK) &gt;&gt; MBMR_MODE_SHIFT) {</div><div class='del'>-		case 6: /* 0110, no way to differentiate X8 VS X16 */</div><div class='del'>-		case 5:	/* 0101 */</div><div class='del'>-		case 8: /* 1000 */</div><div class='del'>-			csrow-&gt;dtype = DEV_X16;</div><div class='del'>-			break;</div><div class='del'>-		case 7: /* 0111 */</div><div class='del'>-		case 9: /* 1001 */</div><div class='del'>-			csrow-&gt;dtype = DEV_X8;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			csrow-&gt;dtype = DEV_UNKNOWN;</div><div class='del'>-			break;</div><div class='add'>+		for (j = 0; j &lt; csrow-&gt;nr_channels; j++) {</div><div class='add'>+			dimm = csrow-&gt;channels[j].dimm;</div><div class='add'>+</div><div class='add'>+			dimm-&gt;nr_pages = nr_pages / csrow-&gt;nr_channels;</div><div class='add'>+			dimm-&gt;mtype = MEM_RDDR;</div><div class='add'>+			dimm-&gt;edac_mode = EDAC_SECDED;</div><div class='add'>+</div><div class='add'>+			switch (csrow-&gt;nr_channels) {</div><div class='add'>+			case 1: /* Single channel */</div><div class='add'>+				dimm-&gt;grain = 32; /* four-beat burst of 32 bytes */</div><div class='add'>+				break;</div><div class='add'>+			case 2: /* Dual channel */</div><div class='add'>+			default:</div><div class='add'>+				dimm-&gt;grain = 64; /* four-beat burst of 64 bytes */</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			switch ((mbmr &amp; MBMR_MODE_MASK) &gt;&gt; MBMR_MODE_SHIFT) {</div><div class='add'>+			case 6: /* 0110, no way to differentiate X8 VS X16 */</div><div class='add'>+			case 5:	/* 0101 */</div><div class='add'>+			case 8: /* 1000 */</div><div class='add'>+				dimm-&gt;dtype = DEV_X16;</div><div class='add'>+				break;</div><div class='add'>+			case 7: /* 0111 */</div><div class='add'>+			case 9: /* 1001 */</div><div class='add'>+				dimm-&gt;dtype = DEV_X8;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -549,13 +555,18 @@ static void cpc925_mc_check(struct mem_ctl_info *mci)</div><div class='ctx'> 	if (apiexcp &amp; CECC_EXCP_DETECTED) {</div><div class='ctx'> 		cpc925_mc_printk(mci, KERN_INFO, "DRAM CECC Fault\n");</div><div class='ctx'> 		channel = cpc925_mc_find_channel(mci, syndrome);</div><div class='del'>-		edac_mc_handle_ce(mci, pfn, offset, syndrome,</div><div class='del'>-				  csrow, channel, mci-&gt;ctl_name);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     pfn, offset, syndrome,</div><div class='add'>+				     csrow, channel, -1,</div><div class='add'>+				     mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (apiexcp &amp; UECC_EXCP_DETECTED) {</div><div class='ctx'> 		cpc925_mc_printk(mci, KERN_INFO, "DRAM UECC Fault\n");</div><div class='del'>-		edac_mc_handle_ue(mci, pfn, offset, csrow, mci-&gt;ctl_name);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     pfn, offset, 0,</div><div class='add'>+				     csrow, -1, -1,</div><div class='add'>+				     mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cpc925_mc_printk(mci, KERN_INFO, "Dump registers:\n");</div><div class='hunk'>@@ -927,6 +938,7 @@ static int __devinit cpc925_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	static int edac_mc_idx;</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	void __iomem *vbase;</div><div class='ctx'> 	struct cpc925_mc_pdata *pdata;</div><div class='ctx'> 	struct resource *r;</div><div class='hunk'>@@ -962,9 +974,16 @@ static int __devinit cpc925_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	nr_channels = cpc925_mc_get_channels(vbase);</div><div class='del'>-	mci = edac_mc_alloc(sizeof(struct cpc925_mc_pdata),</div><div class='del'>-			CPC925_NR_CSROWS, nr_channels + 1, edac_mc_idx);</div><div class='add'>+	nr_channels = cpc925_mc_get_channels(vbase) + 1;</div><div class='add'>+</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = CPC925_NR_CSROWS;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = nr_channels;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers,</div><div class='add'>+			    sizeof(struct cpc925_mc_pdata));</div><div class='ctx'> 	if (!mci) {</div><div class='ctx'> 		cpc925_printk(KERN_ERR, "No memory for mem_ctl_info\n");</div><div class='ctx'> 		res = -ENOMEM;</div><div class='head'>diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c<br/>index 41223261ede9..3186512c9739 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/e752x_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/e752x_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/e752x_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/e752x_edac.c</a></div><div class='hunk'>@@ -4,7 +4,11 @@</div><div class='ctx'>  * This file may be distributed under the terms of the</div><div class='ctx'>  * GNU General Public License.</div><div class='ctx'>  *</div><div class='del'>- * See "enum e752x_chips" below for supported chipsets</div><div class='add'>+ * Implement support for the e7520, E7525, e7320 and i3100 memory controllers.</div><div class='add'>+ *</div><div class='add'>+ * Datasheets:</div><div class='add'>+ *	http://www.intel.in/content/www/in/en/chipsets/e7525-memory-controller-hub-datasheet.html</div><div class='add'>+ *	ftp://download.intel.com/design/intarch/datashts/31345803.pdf</div><div class='ctx'>  *</div><div class='ctx'>  * Written by Tom Zimmerman</div><div class='ctx'>  *</div><div class='hunk'>@@ -13,8 +17,6 @@</div><div class='ctx'>  * 	Wang Zhenyu at intel.com</div><div class='ctx'>  * 	Dave Jiang at mvista.com</div><div class='ctx'>  *</div><div class='del'>- * $Id: edac_e752x.c,v 1.5.2.11 2005/10/05 00:43:44 dsp_llnl Exp $</div><div class='del'>- *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -187,6 +189,25 @@ enum e752x_chips {</div><div class='ctx'> 	I3100 = 3</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Those chips Support single-rank and dual-rank memories only.</div><div class='add'>+ *</div><div class='add'>+ * On e752x chips, the odd rows are present only on dual-rank memories.</div><div class='add'>+ * Dividing the rank by two will provide the dimm#</div><div class='add'>+ *</div><div class='add'>+ * i3100 MC has a different mapping: it supports only 4 ranks.</div><div class='add'>+ *</div><div class='add'>+ * The mapping is (from 1 to n):</div><div class='add'>+ *	slot	   single-ranked	double-ranked</div><div class='add'>+ *	dimm #1 -&gt; rank #4		NA</div><div class='add'>+ *	dimm #2 -&gt; rank #3		NA</div><div class='add'>+ *	dimm #3 -&gt; rank #2		Ranks 2 and 3</div><div class='add'>+ *	dimm #4 -&gt; rank $1		Ranks 1 and 4</div><div class='add'>+ *</div><div class='add'>+ * FIXME: The current mapping for i3100 considers that it supports up to 8</div><div class='add'>+ *	  ranks/chanel, but datasheet says that the MC supports only 4 ranks.</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> struct e752x_pvt {</div><div class='ctx'> 	struct pci_dev *bridge_ck;</div><div class='ctx'> 	struct pci_dev *dev_d0f0;</div><div class='hunk'>@@ -350,8 +371,10 @@ static void do_process_ce(struct mem_ctl_info *mci, u16 error_one,</div><div class='ctx'> 	channel = !(error_one &amp; 1);</div><div class='ctx'> </div><div class='ctx'> 	/* e752x mc reads 34:6 of the DRAM linear address */</div><div class='del'>-	edac_mc_handle_ce(mci, page, offset_in_page(sec1_add &lt;&lt; 4),</div><div class='del'>-			sec1_syndrome, row, channel, "e752x CE");</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+			     page, offset_in_page(sec1_add &lt;&lt; 4), sec1_syndrome,</div><div class='add'>+			     row, channel, -1,</div><div class='add'>+			     "e752x CE", "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void process_ce(struct mem_ctl_info *mci, u16 error_one,</div><div class='hunk'>@@ -385,9 +408,12 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one,</div><div class='ctx'> 			edac_mc_find_csrow_by_page(mci, block_page);</div><div class='ctx'> </div><div class='ctx'> 		/* e752x mc reads 34:6 of the DRAM linear address */</div><div class='del'>-		edac_mc_handle_ue(mci, block_page,</div><div class='del'>-				offset_in_page(error_2b &lt;&lt; 4),</div><div class='del'>-				row, "e752x UE from Read");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+					block_page,</div><div class='add'>+					offset_in_page(error_2b &lt;&lt; 4), 0,</div><div class='add'>+					 row, -1, -1,</div><div class='add'>+					"e752x UE from Read", "", NULL);</div><div class='add'>+</div><div class='ctx'> 	}</div><div class='ctx'> 	if (error_one &amp; 0x0404) {</div><div class='ctx'> 		error_2b = scrb_add;</div><div class='hunk'>@@ -401,9 +427,11 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one,</div><div class='ctx'> 			edac_mc_find_csrow_by_page(mci, block_page);</div><div class='ctx'> </div><div class='ctx'> 		/* e752x mc reads 34:6 of the DRAM linear address */</div><div class='del'>-		edac_mc_handle_ue(mci, block_page,</div><div class='del'>-				offset_in_page(error_2b &lt;&lt; 4),</div><div class='del'>-				row, "e752x UE from Scruber");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+					block_page,</div><div class='add'>+					offset_in_page(error_2b &lt;&lt; 4), 0,</div><div class='add'>+					row, -1, -1,</div><div class='add'>+					"e752x UE from Scruber", "", NULL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -426,7 +454,9 @@ static inline void process_ue_no_info_wr(struct mem_ctl_info *mci,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	debugf3("%s()\n", __func__);</div><div class='del'>-	edac_mc_handle_ue_no_info(mci, "e752x UE log memory write");</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,</div><div class='add'>+			     -1, -1, -1,</div><div class='add'>+			     "e752x UE log memory write", "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void do_process_ded_retry(struct mem_ctl_info *mci, u16 error,</div><div class='hunk'>@@ -1044,7 +1074,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,</div><div class='ctx'> 	int drc_drbg;		/* DRB granularity 0=64mb, 1=128mb */</div><div class='ctx'> 	int drc_ddim;		/* DRAM Data Integrity Mode 0=none, 2=edac */</div><div class='ctx'> 	u8 value;</div><div class='del'>-	u32 dra, drc, cumul_size;</div><div class='add'>+	u32 dra, drc, cumul_size, i, nr_pages;</div><div class='ctx'> </div><div class='ctx'> 	dra = 0;</div><div class='ctx'> 	for (index = 0; index &lt; 4; index++) {</div><div class='hunk'>@@ -1053,7 +1083,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,</div><div class='ctx'> 		dra |= dra_reg &lt;&lt; (index * 8);</div><div class='ctx'> 	}</div><div class='ctx'> 	pci_read_config_dword(pdev, E752X_DRC, &amp;drc);</div><div class='del'>-	drc_chan = dual_channel_active(ddrcsr);</div><div class='add'>+	drc_chan = dual_channel_active(ddrcsr) ? 1 : 0;</div><div class='ctx'> 	drc_drbg = drc_chan + 1;	/* 128 in dual mode, 64 in single */</div><div class='ctx'> 	drc_ddim = (drc &gt;&gt; 20) &amp; 0x3;</div><div class='ctx'> </div><div class='hunk'>@@ -1078,26 +1108,33 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 		csrow-&gt;first_page = last_cumul_size;</div><div class='ctx'> 		csrow-&gt;last_page = cumul_size - 1;</div><div class='del'>-		csrow-&gt;nr_pages = cumul_size - last_cumul_size;</div><div class='add'>+		nr_pages = cumul_size - last_cumul_size;</div><div class='ctx'> 		last_cumul_size = cumul_size;</div><div class='del'>-		csrow-&gt;grain = 1 &lt;&lt; 12;	/* 4KiB - resolution of CELOG */</div><div class='del'>-		csrow-&gt;mtype = MEM_RDDR;	/* only one type supported */</div><div class='del'>-		csrow-&gt;dtype = mem_dev ? DEV_X4 : DEV_X8;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * if single channel or x8 devices then SECDED</div><div class='del'>-		 * if dual channel and x4 then S4ECD4ED</div><div class='del'>-		 */</div><div class='del'>-		if (drc_ddim) {</div><div class='del'>-			if (drc_chan &amp;&amp; mem_dev) {</div><div class='del'>-				csrow-&gt;edac_mode = EDAC_S4ECD4ED;</div><div class='del'>-				mci-&gt;edac_cap |= EDAC_FLAG_S4ECD4ED;</div><div class='del'>-			} else {</div><div class='del'>-				csrow-&gt;edac_mode = EDAC_SECDED;</div><div class='del'>-				mci-&gt;edac_cap |= EDAC_FLAG_SECDED;</div><div class='del'>-			}</div><div class='del'>-		} else</div><div class='del'>-			csrow-&gt;edac_mode = EDAC_NONE;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; csrow-&gt;nr_channels; i++) {</div><div class='add'>+			struct dimm_info *dimm = csrow-&gt;channels[i].dimm;</div><div class='add'>+</div><div class='add'>+			debugf3("Initializing rank at (%i,%i)\n", index, i);</div><div class='add'>+			dimm-&gt;nr_pages = nr_pages / csrow-&gt;nr_channels;</div><div class='add'>+			dimm-&gt;grain = 1 &lt;&lt; 12;	/* 4KiB - resolution of CELOG */</div><div class='add'>+			dimm-&gt;mtype = MEM_RDDR;	/* only one type supported */</div><div class='add'>+			dimm-&gt;dtype = mem_dev ? DEV_X4 : DEV_X8;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			* if single channel or x8 devices then SECDED</div><div class='add'>+			* if dual channel and x4 then S4ECD4ED</div><div class='add'>+			*/</div><div class='add'>+			if (drc_ddim) {</div><div class='add'>+				if (drc_chan &amp;&amp; mem_dev) {</div><div class='add'>+					dimm-&gt;edac_mode = EDAC_S4ECD4ED;</div><div class='add'>+					mci-&gt;edac_cap |= EDAC_FLAG_S4ECD4ED;</div><div class='add'>+				} else {</div><div class='add'>+					dimm-&gt;edac_mode = EDAC_SECDED;</div><div class='add'>+					mci-&gt;edac_cap |= EDAC_FLAG_SECDED;</div><div class='add'>+				}</div><div class='add'>+			} else</div><div class='add'>+				dimm-&gt;edac_mode = EDAC_NONE;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1226,6 +1263,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	u16 pci_data;</div><div class='ctx'> 	u8 stat8;</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	struct e752x_pvt *pvt;</div><div class='ctx'> 	u16 ddrcsr;</div><div class='ctx'> 	int drc_chan;		/* Number of channels 0=1chan,1=2chan */</div><div class='hunk'>@@ -1252,11 +1290,15 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	/* Dual channel = 1, Single channel = 0 */</div><div class='ctx'> 	drc_chan = dual_channel_active(ddrcsr);</div><div class='ctx'> </div><div class='del'>-	mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1, 0);</div><div class='del'>-</div><div class='del'>-	if (mci == NULL) {</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = E752X_NR_CSROWS;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = drc_chan + 1;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));</div><div class='add'>+	if (mci == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	debugf3("%s(): init mci\n", __func__);</div><div class='ctx'> 	mci-&gt;mtype_cap = MEM_FLAG_RDDR;</div><div class='head'>diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c<br/>index 68dea87b72e6..9a9c1a546797 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/e7xxx_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/e7xxx_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/e7xxx_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/e7xxx_edac.c</a></div><div class='hunk'>@@ -10,6 +10,9 @@</div><div class='ctx'>  * Based on work by Dan Hollis &lt;goemon at anime dot net&gt; and others.</div><div class='ctx'>  *	http://www.anime.net/~goemon/linux-ecc/</div><div class='ctx'>  *</div><div class='add'>+ * Datasheet:</div><div class='add'>+ *	http://www.intel.com/content/www/us/en/chipsets/e7501-chipset-memory-controller-hub-datasheet.html</div><div class='add'>+ *</div><div class='ctx'>  * Contributors:</div><div class='ctx'>  *	Eric Biederman (Linux Networx)</div><div class='ctx'>  *	Tom Zimmerman (Linux Networx)</div><div class='hunk'>@@ -71,7 +74,7 @@</div><div class='ctx'> #endif				/* PCI_DEVICE_ID_INTEL_7505_1_ERR */</div><div class='ctx'> </div><div class='ctx'> #define E7XXX_NR_CSROWS		8	/* number of csrows */</div><div class='del'>-#define E7XXX_NR_DIMMS		8	/* FIXME - is this correct? */</div><div class='add'>+#define E7XXX_NR_DIMMS		8	/* 2 channels, 4 dimms/channel */</div><div class='ctx'> </div><div class='ctx'> /* E7XXX register addresses - device 0 function 0 */</div><div class='ctx'> #define E7XXX_DRB		0x60	/* DRAM row boundary register (8b) */</div><div class='hunk'>@@ -216,13 +219,15 @@ static void process_ce(struct mem_ctl_info *mci, struct e7xxx_error_info *info)</div><div class='ctx'> 	row = edac_mc_find_csrow_by_page(mci, page);</div><div class='ctx'> 	/* convert syndrome to channel */</div><div class='ctx'> 	channel = e7xxx_find_channel(syndrome);</div><div class='del'>-	edac_mc_handle_ce(mci, page, 0, syndrome, row, channel, "e7xxx CE");</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, page, 0, syndrome,</div><div class='add'>+			     row, channel, -1, "e7xxx CE", "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void process_ce_no_info(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='ctx'> 	debugf3("%s()\n", __func__);</div><div class='del'>-	edac_mc_handle_ce_no_info(mci, "e7xxx CE log register overflow");</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, -1, -1, -1,</div><div class='add'>+			     "e7xxx CE log register overflow", "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void process_ue(struct mem_ctl_info *mci, struct e7xxx_error_info *info)</div><div class='hunk'>@@ -236,13 +241,17 @@ static void process_ue(struct mem_ctl_info *mci, struct e7xxx_error_info *info)</div><div class='ctx'> 	/* FIXME - should use PAGE_SHIFT */</div><div class='ctx'> 	block_page = error_2b &gt;&gt; 6;	/* convert to 4k address */</div><div class='ctx'> 	row = edac_mc_find_csrow_by_page(mci, block_page);</div><div class='del'>-	edac_mc_handle_ue(mci, block_page, 0, row, "e7xxx UE");</div><div class='add'>+</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, block_page, 0, 0,</div><div class='add'>+			     row, -1, -1, "e7xxx UE", "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void process_ue_no_info(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='ctx'> 	debugf3("%s()\n", __func__);</div><div class='del'>-	edac_mc_handle_ue_no_info(mci, "e7xxx UE log register overflow");</div><div class='add'>+</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, -1, -1, -1,</div><div class='add'>+			     "e7xxx UE log register overflow", "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void e7xxx_get_error_info(struct mem_ctl_info *mci,</div><div class='hunk'>@@ -347,11 +356,12 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,</div><div class='ctx'> 			int dev_idx, u32 drc)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long last_cumul_size;</div><div class='del'>-	int index;</div><div class='add'>+	int index, j;</div><div class='ctx'> 	u8 value;</div><div class='del'>-	u32 dra, cumul_size;</div><div class='add'>+	u32 dra, cumul_size, nr_pages;</div><div class='ctx'> 	int drc_chan, drc_drbg, drc_ddim, mem_dev;</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='ctx'> </div><div class='ctx'> 	pci_read_config_dword(pdev, E7XXX_DRA, &amp;dra);</div><div class='ctx'> 	drc_chan = dual_channel_active(drc, dev_idx);</div><div class='hunk'>@@ -379,26 +389,32 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 		csrow-&gt;first_page = last_cumul_size;</div><div class='ctx'> 		csrow-&gt;last_page = cumul_size - 1;</div><div class='del'>-		csrow-&gt;nr_pages = cumul_size - last_cumul_size;</div><div class='add'>+		nr_pages = cumul_size - last_cumul_size;</div><div class='ctx'> 		last_cumul_size = cumul_size;</div><div class='del'>-		csrow-&gt;grain = 1 &lt;&lt; 12;	/* 4KiB - resolution of CELOG */</div><div class='del'>-		csrow-&gt;mtype = MEM_RDDR;	/* only one type supported */</div><div class='del'>-		csrow-&gt;dtype = mem_dev ? DEV_X4 : DEV_X8;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * if single channel or x8 devices then SECDED</div><div class='del'>-		 * if dual channel and x4 then S4ECD4ED</div><div class='del'>-		 */</div><div class='del'>-		if (drc_ddim) {</div><div class='del'>-			if (drc_chan &amp;&amp; mem_dev) {</div><div class='del'>-				csrow-&gt;edac_mode = EDAC_S4ECD4ED;</div><div class='del'>-				mci-&gt;edac_cap |= EDAC_FLAG_S4ECD4ED;</div><div class='del'>-			} else {</div><div class='del'>-				csrow-&gt;edac_mode = EDAC_SECDED;</div><div class='del'>-				mci-&gt;edac_cap |= EDAC_FLAG_SECDED;</div><div class='del'>-			}</div><div class='del'>-		} else</div><div class='del'>-			csrow-&gt;edac_mode = EDAC_NONE;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; drc_chan + 1; j++) {</div><div class='add'>+			dimm = csrow-&gt;channels[j].dimm;</div><div class='add'>+</div><div class='add'>+			dimm-&gt;nr_pages = nr_pages / (drc_chan + 1);</div><div class='add'>+			dimm-&gt;grain = 1 &lt;&lt; 12;	/* 4KiB - resolution of CELOG */</div><div class='add'>+			dimm-&gt;mtype = MEM_RDDR;	/* only one type supported */</div><div class='add'>+			dimm-&gt;dtype = mem_dev ? DEV_X4 : DEV_X8;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			* if single channel or x8 devices then SECDED</div><div class='add'>+			* if dual channel and x4 then S4ECD4ED</div><div class='add'>+			*/</div><div class='add'>+			if (drc_ddim) {</div><div class='add'>+				if (drc_chan &amp;&amp; mem_dev) {</div><div class='add'>+					dimm-&gt;edac_mode = EDAC_S4ECD4ED;</div><div class='add'>+					mci-&gt;edac_cap |= EDAC_FLAG_S4ECD4ED;</div><div class='add'>+				} else {</div><div class='add'>+					dimm-&gt;edac_mode = EDAC_SECDED;</div><div class='add'>+					mci-&gt;edac_cap |= EDAC_FLAG_SECDED;</div><div class='add'>+				}</div><div class='add'>+			} else</div><div class='add'>+				dimm-&gt;edac_mode = EDAC_NONE;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -406,6 +422,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> {</div><div class='ctx'> 	u16 pci_data;</div><div class='ctx'> 	struct mem_ctl_info *mci = NULL;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	struct e7xxx_pvt *pvt = NULL;</div><div class='ctx'> 	u32 drc;</div><div class='ctx'> 	int drc_chan;</div><div class='hunk'>@@ -416,8 +433,21 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	pci_read_config_dword(pdev, E7XXX_DRC, &amp;drc);</div><div class='ctx'> </div><div class='ctx'> 	drc_chan = dual_channel_active(drc, dev_idx);</div><div class='del'>-	mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1, 0);</div><div class='del'>-</div><div class='add'>+	/*</div><div class='add'>+	 * According with the datasheet, this device has a maximum of</div><div class='add'>+	 * 4 DIMMS per channel, either single-rank or dual-rank. So, the</div><div class='add'>+	 * total amount of dimms is 8 (E7XXX_NR_DIMMS).</div><div class='add'>+	 * That means that the DIMM is mapped as CSROWs, and the channel</div><div class='add'>+	 * will map the rank. So, an error to either channel should be</div><div class='add'>+	 * attributed to the same dimm.</div><div class='add'>+	 */</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = E7XXX_NR_CSROWS;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = drc_chan + 1;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));</div><div class='ctx'> 	if (mci == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/edac_core.h b/drivers/edac/edac_core.h<br/>index e48ab3108ad8..117490d4f835 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/edac_core.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/edac_core.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/edac_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/edac_core.h</a></div><div class='hunk'>@@ -107,13 +107,13 @@ extern int edac_debug_level;</div><div class='ctx'>  *</div><div class='ctx'>  * CPU caches (L1 and L2)</div><div class='ctx'>  * DMA engines</div><div class='del'>- * Core CPU swithces</div><div class='add'>+ * Core CPU switches</div><div class='ctx'>  * Fabric switch units</div><div class='ctx'>  * PCIe interface controllers</div><div class='ctx'>  * other EDAC/ECC type devices that can be monitored for</div><div class='ctx'>  * errors, etc.</div><div class='ctx'>  *</div><div class='del'>- * It allows for a 2 level set of hiearchry. For example:</div><div class='add'>+ * It allows for a 2 level set of hierarchy. For example:</div><div class='ctx'>  *</div><div class='ctx'>  * cache could be composed of L1, L2 and L3 levels of cache.</div><div class='ctx'>  * Each CPU core would have its own L1 cache, while sharing</div><div class='hunk'>@@ -447,8 +447,10 @@ static inline void pci_write_bits32(struct pci_dev *pdev, int offset,</div><div class='ctx'> </div><div class='ctx'> #endif				/* CONFIG_PCI */</div><div class='ctx'> </div><div class='del'>-extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,</div><div class='del'>-					  unsigned nr_chans, int edac_index);</div><div class='add'>+struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,</div><div class='add'>+				   unsigned n_layers,</div><div class='add'>+				   struct edac_mc_layer *layers,</div><div class='add'>+				   unsigned sz_pvt);</div><div class='ctx'> extern int edac_mc_add_mc(struct mem_ctl_info *mci);</div><div class='ctx'> extern void edac_mc_free(struct mem_ctl_info *mci);</div><div class='ctx'> extern struct mem_ctl_info *edac_mc_find(int idx);</div><div class='hunk'>@@ -456,35 +458,17 @@ extern struct mem_ctl_info *find_mci_by_dev(struct device *dev);</div><div class='ctx'> extern struct mem_ctl_info *edac_mc_del_mc(struct device *dev);</div><div class='ctx'> extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,</div><div class='ctx'> 				      unsigned long page);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The no info errors are used when error overflows are reported.</div><div class='del'>- * There are a limited number of error logging registers that can</div><div class='del'>- * be exausted.  When all registers are exhausted and an additional</div><div class='del'>- * error occurs then an error overflow register records that an</div><div class='del'>- * error occurred and the type of error, but doesn't have any</div><div class='del'>- * further information.  The ce/ue versions make for cleaner</div><div class='del'>- * reporting logic and function interface - reduces conditional</div><div class='del'>- * statement clutter and extra function arguments.</div><div class='del'>- */</div><div class='del'>-extern void edac_mc_handle_ce(struct mem_ctl_info *mci,</div><div class='del'>-			      unsigned long page_frame_number,</div><div class='del'>-			      unsigned long offset_in_page,</div><div class='del'>-			      unsigned long syndrome, int row, int channel,</div><div class='del'>-			      const char *msg);</div><div class='del'>-extern void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci,</div><div class='del'>-				      const char *msg);</div><div class='del'>-extern void edac_mc_handle_ue(struct mem_ctl_info *mci,</div><div class='del'>-			      unsigned long page_frame_number,</div><div class='del'>-			      unsigned long offset_in_page, int row,</div><div class='del'>-			      const char *msg);</div><div class='del'>-extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci,</div><div class='del'>-				      const char *msg);</div><div class='del'>-extern void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, unsigned int csrow,</div><div class='del'>-				  unsigned int channel0, unsigned int channel1,</div><div class='del'>-				  char *msg);</div><div class='del'>-extern void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, unsigned int csrow,</div><div class='del'>-				  unsigned int channel, char *msg);</div><div class='add'>+void edac_mc_handle_error(const enum hw_event_mc_err_type type,</div><div class='add'>+			  struct mem_ctl_info *mci,</div><div class='add'>+			  const unsigned long page_frame_number,</div><div class='add'>+			  const unsigned long offset_in_page,</div><div class='add'>+			  const unsigned long syndrome,</div><div class='add'>+			  const int layer0,</div><div class='add'>+			  const int layer1,</div><div class='add'>+			  const int layer2,</div><div class='add'>+			  const char *msg,</div><div class='add'>+			  const char *other_detail,</div><div class='add'>+			  const void *mcelog);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * edac_device APIs</div><div class='hunk'>@@ -496,6 +480,7 @@ extern void edac_device_handle_ue(struct edac_device_ctl_info *edac_dev,</div><div class='ctx'> extern void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,</div><div class='ctx'> 				int inst_nr, int block_nr, const char *msg);</div><div class='ctx'> extern int edac_device_alloc_index(void);</div><div class='add'>+extern const char *edac_layer_name[];</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * edac_pci APIs</div><div class='head'>diff --git a/drivers/edac/edac_device.c b/drivers/edac/edac_device.c<br/>index 4b154593343a..ee3f1f810c1e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/edac_device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/edac_device.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/edac_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/edac_device.c</a></div><div class='hunk'>@@ -56,7 +56,7 @@ static void edac_device_dump_device(struct edac_device_ctl_info *edac_dev)</div><div class='ctx'>  *</div><div class='ctx'>  *	The control structure is allocated in complete chunk</div><div class='ctx'>  *	from the OS. It is in turn sub allocated to the</div><div class='del'>- *	various objects that compose the struture</div><div class='add'>+ *	various objects that compose the structure</div><div class='ctx'>  *</div><div class='ctx'>  *	The structure has a 'nr_instance' array within itself.</div><div class='ctx'>  *	Each instance represents a major component</div><div class='hunk'>@@ -79,7 +79,7 @@ struct edac_device_ctl_info *edac_device_alloc_ctl_info(</div><div class='ctx'> 	unsigned total_size;</div><div class='ctx'> 	unsigned count;</div><div class='ctx'> 	unsigned instance, block, attr;</div><div class='del'>-	void *pvt;</div><div class='add'>+	void *pvt, *p;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	debugf4("%s() instances=%d blocks=%d\n",</div><div class='hunk'>@@ -92,35 +92,30 @@ struct edac_device_ctl_info *edac_device_alloc_ctl_info(</div><div class='ctx'> 	 * to be at least as stringent as what the compiler would</div><div class='ctx'> 	 * provide if we could simply hardcode everything into a single struct.</div><div class='ctx'> 	 */</div><div class='del'>-	dev_ctl = (struct edac_device_ctl_info *)NULL;</div><div class='add'>+	p = NULL;</div><div class='add'>+	dev_ctl = edac_align_ptr(&amp;p, sizeof(*dev_ctl), 1);</div><div class='ctx'> </div><div class='ctx'> 	/* Calc the 'end' offset past end of ONE ctl_info structure</div><div class='ctx'> 	 * which will become the start of the 'instance' array</div><div class='ctx'> 	 */</div><div class='del'>-	dev_inst = edac_align_ptr(&amp;dev_ctl[1], sizeof(*dev_inst));</div><div class='add'>+	dev_inst = edac_align_ptr(&amp;p, sizeof(*dev_inst), nr_instances);</div><div class='ctx'> </div><div class='ctx'> 	/* Calc the 'end' offset past the instance array within the ctl_info</div><div class='ctx'> 	 * which will become the start of the block array</div><div class='ctx'> 	 */</div><div class='del'>-	dev_blk = edac_align_ptr(&amp;dev_inst[nr_instances], sizeof(*dev_blk));</div><div class='add'>+	count = nr_instances * nr_blocks;</div><div class='add'>+	dev_blk = edac_align_ptr(&amp;p, sizeof(*dev_blk), count);</div><div class='ctx'> </div><div class='ctx'> 	/* Calc the 'end' offset past the dev_blk array</div><div class='ctx'> 	 * which will become the start of the attrib array, if any.</div><div class='ctx'> 	 */</div><div class='del'>-	count = nr_instances * nr_blocks;</div><div class='del'>-	dev_attrib = edac_align_ptr(&amp;dev_blk[count], sizeof(*dev_attrib));</div><div class='del'>-</div><div class='del'>-	/* Check for case of when an attribute array is specified */</div><div class='del'>-	if (nr_attrib &gt; 0) {</div><div class='del'>-		/* calc how many nr_attrib we need */</div><div class='add'>+	/* calc how many nr_attrib we need */</div><div class='add'>+	if (nr_attrib &gt; 0)</div><div class='ctx'> 		count *= nr_attrib;</div><div class='add'>+	dev_attrib = edac_align_ptr(&amp;p, sizeof(*dev_attrib), count);</div><div class='ctx'> </div><div class='del'>-		/* Calc the 'end' offset past the attributes array */</div><div class='del'>-		pvt = edac_align_ptr(&amp;dev_attrib[count], sz_private);</div><div class='del'>-	} else {</div><div class='del'>-		/* no attribute array specificed */</div><div class='del'>-		pvt = edac_align_ptr(dev_attrib, sz_private);</div><div class='del'>-	}</div><div class='add'>+	/* Calc the 'end' offset past the attributes array */</div><div class='add'>+	pvt = edac_align_ptr(&amp;p, sz_private, 1);</div><div class='ctx'> </div><div class='ctx'> 	/* 'pvt' now points to where the private data area is.</div><div class='ctx'> 	 * At this point 'pvt' (like dev_inst,dev_blk and dev_attrib)</div><div class='hunk'>@@ -394,7 +389,7 @@ static void edac_device_workq_function(struct work_struct *work_req)</div><div class='ctx'> </div><div class='ctx'> 	/* Reschedule the workq for the next time period to start again</div><div class='ctx'> 	 * if the number of msec is for 1 sec, then adjust to the next</div><div class='del'>-	 * whole one second to save timers fireing all over the period</div><div class='add'>+	 * whole one second to save timers firing all over the period</div><div class='ctx'> 	 * between integral seconds</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (edac_dev-&gt;poll_msec == 1000)</div><div class='hunk'>@@ -563,7 +558,7 @@ EXPORT_SYMBOL_GPL(edac_device_add_device);</div><div class='ctx'>  *	Remove sysfs entries for specified edac_device structure and</div><div class='ctx'>  *	then remove edac_device structure from global list</div><div class='ctx'>  *</div><div class='del'>- * @pdev:</div><div class='add'>+ * @dev:</div><div class='ctx'>  *	Pointer to 'struct device' representing edac_device</div><div class='ctx'>  *	structure to remove.</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c<br/>index feef7733fae7..10f375032e96 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/edac_mc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/edac_mc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/edac_mc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/edac_mc.c</a></div><div class='hunk'>@@ -43,9 +43,26 @@ static void edac_mc_dump_channel(struct rank_info *chan)</div><div class='ctx'> {</div><div class='ctx'> 	debugf4("\tchannel = %p\n", chan);</div><div class='ctx'> 	debugf4("\tchannel-&gt;chan_idx = %d\n", chan-&gt;chan_idx);</div><div class='del'>-	debugf4("\tchannel-&gt;ce_count = %d\n", chan-&gt;ce_count);</div><div class='del'>-	debugf4("\tchannel-&gt;label = '%s'\n", chan-&gt;label);</div><div class='ctx'> 	debugf4("\tchannel-&gt;csrow = %p\n\n", chan-&gt;csrow);</div><div class='add'>+	debugf4("\tchannel-&gt;dimm = %p\n", chan-&gt;dimm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void edac_mc_dump_dimm(struct dimm_info *dimm)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	debugf4("\tdimm = %p\n", dimm);</div><div class='add'>+	debugf4("\tdimm-&gt;label = '%s'\n", dimm-&gt;label);</div><div class='add'>+	debugf4("\tdimm-&gt;nr_pages = 0x%x\n", dimm-&gt;nr_pages);</div><div class='add'>+	debugf4("\tdimm location ");</div><div class='add'>+	for (i = 0; i &lt; dimm-&gt;mci-&gt;n_layers; i++) {</div><div class='add'>+		printk(KERN_CONT "%d", dimm-&gt;location[i]);</div><div class='add'>+		if (i &lt; dimm-&gt;mci-&gt;n_layers - 1)</div><div class='add'>+			printk(KERN_CONT ".");</div><div class='add'>+	}</div><div class='add'>+	printk(KERN_CONT "\n");</div><div class='add'>+	debugf4("\tdimm-&gt;grain = %d\n", dimm-&gt;grain);</div><div class='add'>+	debugf4("\tdimm-&gt;nr_pages = 0x%x\n", dimm-&gt;nr_pages);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void edac_mc_dump_csrow(struct csrow_info *csrow)</div><div class='hunk'>@@ -55,7 +72,6 @@ static void edac_mc_dump_csrow(struct csrow_info *csrow)</div><div class='ctx'> 	debugf4("\tcsrow-&gt;first_page = 0x%lx\n", csrow-&gt;first_page);</div><div class='ctx'> 	debugf4("\tcsrow-&gt;last_page = 0x%lx\n", csrow-&gt;last_page);</div><div class='ctx'> 	debugf4("\tcsrow-&gt;page_mask = 0x%lx\n", csrow-&gt;page_mask);</div><div class='del'>-	debugf4("\tcsrow-&gt;nr_pages = 0x%x\n", csrow-&gt;nr_pages);</div><div class='ctx'> 	debugf4("\tcsrow-&gt;nr_channels = %d\n", csrow-&gt;nr_channels);</div><div class='ctx'> 	debugf4("\tcsrow-&gt;channels = %p\n", csrow-&gt;channels);</div><div class='ctx'> 	debugf4("\tcsrow-&gt;mci = %p\n\n", csrow-&gt;mci);</div><div class='hunk'>@@ -70,6 +86,8 @@ static void edac_mc_dump_mci(struct mem_ctl_info *mci)</div><div class='ctx'> 	debugf4("\tmci-&gt;edac_check = %p\n", mci-&gt;edac_check);</div><div class='ctx'> 	debugf3("\tmci-&gt;nr_csrows = %d, csrows = %p\n",</div><div class='ctx'> 		mci-&gt;nr_csrows, mci-&gt;csrows);</div><div class='add'>+	debugf3("\tmci-&gt;nr_dimms = %d, dimms = %p\n",</div><div class='add'>+		mci-&gt;tot_dimms, mci-&gt;dimms);</div><div class='ctx'> 	debugf3("\tdev = %p\n", mci-&gt;dev);</div><div class='ctx'> 	debugf3("\tmod_name:ctl_name = %s:%s\n", mci-&gt;mod_name, mci-&gt;ctl_name);</div><div class='ctx'> 	debugf3("\tpvt_info = %p\n\n", mci-&gt;pvt_info);</div><div class='hunk'>@@ -101,18 +119,37 @@ const char *edac_mem_types[] = {</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL_GPL(edac_mem_types);</div><div class='ctx'> </div><div class='del'>-/* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'.</div><div class='del'>- * Adjust 'ptr' so that its alignment is at least as stringent as what the</div><div class='del'>- * compiler would provide for X and return the aligned result.</div><div class='add'>+/**</div><div class='add'>+ * edac_align_ptr - Prepares the pointer offsets for a single-shot allocation</div><div class='add'>+ * @p:		pointer to a pointer with the memory offset to be used. At</div><div class='add'>+ *		return, this will be incremented to point to the next offset</div><div class='add'>+ * @size:	Size of the data structure to be reserved</div><div class='add'>+ * @n_elems:	Number of elements that should be reserved</div><div class='ctx'>  *</div><div class='ctx'>  * If 'size' is a constant, the compiler will optimize this whole function</div><div class='del'>- * down to either a no-op or the addition of a constant to the value of 'ptr'.</div><div class='add'>+ * down to either a no-op or the addition of a constant to the value of '*p'.</div><div class='add'>+ *</div><div class='add'>+ * The 'p' pointer is absolutely needed to keep the proper advancing</div><div class='add'>+ * further in memory to the proper offsets when allocating the struct along</div><div class='add'>+ * with its embedded structs, as edac_device_alloc_ctl_info() does it</div><div class='add'>+ * above, for example.</div><div class='add'>+ *</div><div class='add'>+ * At return, the pointer 'p' will be incremented to be used on a next call</div><div class='add'>+ * to this function.</div><div class='ctx'>  */</div><div class='del'>-void *edac_align_ptr(void *ptr, unsigned size)</div><div class='add'>+void *edac_align_ptr(void **p, unsigned size, int n_elems)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned align, r;</div><div class='add'>+	void *ptr = *p;</div><div class='add'>+</div><div class='add'>+	*p += size * n_elems;</div><div class='ctx'> </div><div class='del'>-	/* Here we assume that the alignment of a "long long" is the most</div><div class='add'>+	/*</div><div class='add'>+	 * 'p' can possibly be an unaligned item X such that sizeof(X) is</div><div class='add'>+	 * 'size'.  Adjust 'p' so that its alignment is at least as</div><div class='add'>+	 * stringent as what the compiler would provide for X and return</div><div class='add'>+	 * the aligned result.</div><div class='add'>+	 * Here we assume that the alignment of a "long long" is the most</div><div class='ctx'> 	 * stringent alignment that the compiler will ever provide by default.</div><div class='ctx'> 	 * As far as I know, this is a reasonable assumption.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -132,14 +169,18 @@ void *edac_align_ptr(void *ptr, unsigned size)</div><div class='ctx'> 	if (r == 0)</div><div class='ctx'> 		return (char *)ptr;</div><div class='ctx'> </div><div class='add'>+	*p += align - r;</div><div class='add'>+</div><div class='ctx'> 	return (void *)(((unsigned long)ptr) + align - r);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * edac_mc_alloc: Allocate a struct mem_ctl_info structure</div><div class='del'>- * @size_pvt:	size of private storage needed</div><div class='del'>- * @nr_csrows:	Number of CWROWS needed for this MC</div><div class='del'>- * @nr_chans:	Number of channels for the MC</div><div class='add'>+ * edac_mc_alloc: Allocate and partially fill a struct mem_ctl_info structure</div><div class='add'>+ * @mc_num:		Memory controller number</div><div class='add'>+ * @n_layers:		Number of MC hierarchy layers</div><div class='add'>+ * layers:		Describes each layer as seen by the Memory Controller</div><div class='add'>+ * @size_pvt:		size of private storage needed</div><div class='add'>+ *</div><div class='ctx'>  *</div><div class='ctx'>  * Everything is kmalloc'ed as one big chunk - more efficient.</div><div class='ctx'>  * Only can be used if all structures have the same lifetime - otherwise</div><div class='hunk'>@@ -147,32 +188,77 @@ void *edac_align_ptr(void *ptr, unsigned size)</div><div class='ctx'>  *</div><div class='ctx'>  * Use edac_mc_free() to free mc structures allocated by this function.</div><div class='ctx'>  *</div><div class='add'>+ * NOTE: drivers handle multi-rank memories in different ways: in some</div><div class='add'>+ * drivers, one multi-rank memory stick is mapped as one entry, while, in</div><div class='add'>+ * others, a single multi-rank memory stick would be mapped into several</div><div class='add'>+ * entries. Currently, this function will allocate multiple struct dimm_info</div><div class='add'>+ * on such scenarios, as grouping the multiple ranks require drivers change.</div><div class='add'>+ *</div><div class='ctx'>  * Returns:</div><div class='del'>- *	NULL allocation failed</div><div class='del'>- *	struct mem_ctl_info pointer</div><div class='add'>+ *	On failure: NULL</div><div class='add'>+ *	On success: struct mem_ctl_info pointer</div><div class='ctx'>  */</div><div class='del'>-struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,</div><div class='del'>-				unsigned nr_chans, int edac_index)</div><div class='add'>+struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,</div><div class='add'>+				   unsigned n_layers,</div><div class='add'>+				   struct edac_mc_layer *layers,</div><div class='add'>+				   unsigned sz_pvt)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='del'>-	struct csrow_info *csi, *csrow;</div><div class='add'>+	struct edac_mc_layer *layer;</div><div class='add'>+	struct csrow_info *csi, *csr;</div><div class='ctx'> 	struct rank_info *chi, *chp, *chan;</div><div class='del'>-	void *pvt;</div><div class='del'>-	unsigned size;</div><div class='del'>-	int row, chn;</div><div class='del'>-	int err;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='add'>+	u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS];</div><div class='add'>+	unsigned pos[EDAC_MAX_LAYERS];</div><div class='add'>+	unsigned size, tot_dimms = 1, count = 1;</div><div class='add'>+	unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0;</div><div class='add'>+	void *pvt, *p, *ptr = NULL;</div><div class='add'>+	int i, j, err, row, chn, n, len;</div><div class='add'>+	bool per_rank = false;</div><div class='add'>+</div><div class='add'>+	BUG_ON(n_layers &gt; EDAC_MAX_LAYERS || n_layers == 0);</div><div class='add'>+	/*</div><div class='add'>+	 * Calculate the total amount of dimms and csrows/cschannels while</div><div class='add'>+	 * in the old API emulation mode</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; n_layers; i++) {</div><div class='add'>+		tot_dimms *= layers[i].size;</div><div class='add'>+		if (layers[i].is_virt_csrow)</div><div class='add'>+			tot_csrows *= layers[i].size;</div><div class='add'>+		else</div><div class='add'>+			tot_channels *= layers[i].size;</div><div class='add'>+</div><div class='add'>+		if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT)</div><div class='add'>+			per_rank = true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Figure out the offsets of the various items from the start of an mc</div><div class='ctx'> 	 * structure.  We want the alignment of each item to be at least as</div><div class='ctx'> 	 * stringent as what the compiler would provide if we could simply</div><div class='ctx'> 	 * hardcode everything into a single struct.</div><div class='ctx'> 	 */</div><div class='del'>-	mci = (struct mem_ctl_info *)0;</div><div class='del'>-	csi = edac_align_ptr(&amp;mci[1], sizeof(*csi));</div><div class='del'>-	chi = edac_align_ptr(&amp;csi[nr_csrows], sizeof(*chi));</div><div class='del'>-	pvt = edac_align_ptr(&amp;chi[nr_chans * nr_csrows], sz_pvt);</div><div class='add'>+	mci = edac_align_ptr(&amp;ptr, sizeof(*mci), 1);</div><div class='add'>+	layer = edac_align_ptr(&amp;ptr, sizeof(*layer), n_layers);</div><div class='add'>+	csi = edac_align_ptr(&amp;ptr, sizeof(*csi), tot_csrows);</div><div class='add'>+	chi = edac_align_ptr(&amp;ptr, sizeof(*chi), tot_csrows * tot_channels);</div><div class='add'>+	dimm = edac_align_ptr(&amp;ptr, sizeof(*dimm), tot_dimms);</div><div class='add'>+	for (i = 0; i &lt; n_layers; i++) {</div><div class='add'>+		count *= layers[i].size;</div><div class='add'>+		debugf4("%s: errcount layer %d size %d\n", __func__, i, count);</div><div class='add'>+		ce_per_layer[i] = edac_align_ptr(&amp;ptr, sizeof(u32), count);</div><div class='add'>+		ue_per_layer[i] = edac_align_ptr(&amp;ptr, sizeof(u32), count);</div><div class='add'>+		tot_errcount += 2 * count;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	debugf4("%s: allocating %d error counters\n", __func__, tot_errcount);</div><div class='add'>+	pvt = edac_align_ptr(&amp;ptr, sz_pvt, 1);</div><div class='ctx'> 	size = ((unsigned long)pvt) + sz_pvt;</div><div class='ctx'> </div><div class='add'>+	debugf1("%s(): allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",</div><div class='add'>+		__func__, size,</div><div class='add'>+		tot_dimms,</div><div class='add'>+		per_rank ? "ranks" : "dimms",</div><div class='add'>+		tot_csrows * tot_channels);</div><div class='ctx'> 	mci = kzalloc(size, GFP_KERNEL);</div><div class='ctx'> 	if (mci == NULL)</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -180,28 +266,103 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,</div><div class='ctx'> 	/* Adjust pointers so they point within the memory we just allocated</div><div class='ctx'> 	 * rather than an imaginary chunk of memory located at address 0.</div><div class='ctx'> 	 */</div><div class='add'>+	layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer));</div><div class='ctx'> 	csi = (struct csrow_info *)(((char *)mci) + ((unsigned long)csi));</div><div class='ctx'> 	chi = (struct rank_info *)(((char *)mci) + ((unsigned long)chi));</div><div class='add'>+	dimm = (struct dimm_info *)(((char *)mci) + ((unsigned long)dimm));</div><div class='add'>+	for (i = 0; i &lt; n_layers; i++) {</div><div class='add'>+		mci-&gt;ce_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ce_per_layer[i]));</div><div class='add'>+		mci-&gt;ue_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ue_per_layer[i]));</div><div class='add'>+	}</div><div class='ctx'> 	pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* setup index and various internal pointers */</div><div class='del'>-	mci-&gt;mc_idx = edac_index;</div><div class='add'>+	mci-&gt;mc_idx = mc_num;</div><div class='ctx'> 	mci-&gt;csrows = csi;</div><div class='add'>+	mci-&gt;dimms  = dimm;</div><div class='add'>+	mci-&gt;tot_dimms = tot_dimms;</div><div class='ctx'> 	mci-&gt;pvt_info = pvt;</div><div class='del'>-	mci-&gt;nr_csrows = nr_csrows;</div><div class='del'>-</div><div class='del'>-	for (row = 0; row &lt; nr_csrows; row++) {</div><div class='del'>-		csrow = &amp;csi[row];</div><div class='del'>-		csrow-&gt;csrow_idx = row;</div><div class='del'>-		csrow-&gt;mci = mci;</div><div class='del'>-		csrow-&gt;nr_channels = nr_chans;</div><div class='del'>-		chp = &amp;chi[row * nr_chans];</div><div class='del'>-		csrow-&gt;channels = chp;</div><div class='add'>+	mci-&gt;n_layers = n_layers;</div><div class='add'>+	mci-&gt;layers = layer;</div><div class='add'>+	memcpy(mci-&gt;layers, layers, sizeof(*layer) * n_layers);</div><div class='add'>+	mci-&gt;nr_csrows = tot_csrows;</div><div class='add'>+	mci-&gt;num_cschannel = tot_channels;</div><div class='add'>+	mci-&gt;mem_is_per_rank = per_rank;</div><div class='ctx'> </div><div class='del'>-		for (chn = 0; chn &lt; nr_chans; chn++) {</div><div class='add'>+	/*</div><div class='add'>+	 * Fill the csrow struct</div><div class='add'>+	 */</div><div class='add'>+	for (row = 0; row &lt; tot_csrows; row++) {</div><div class='add'>+		csr = &amp;csi[row];</div><div class='add'>+		csr-&gt;csrow_idx = row;</div><div class='add'>+		csr-&gt;mci = mci;</div><div class='add'>+		csr-&gt;nr_channels = tot_channels;</div><div class='add'>+		chp = &amp;chi[row * tot_channels];</div><div class='add'>+		csr-&gt;channels = chp;</div><div class='add'>+</div><div class='add'>+		for (chn = 0; chn &lt; tot_channels; chn++) {</div><div class='ctx'> 			chan = &amp;chp[chn];</div><div class='ctx'> 			chan-&gt;chan_idx = chn;</div><div class='del'>-			chan-&gt;csrow = csrow;</div><div class='add'>+			chan-&gt;csrow = csr;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Fill the dimm struct</div><div class='add'>+	 */</div><div class='add'>+	memset(&amp;pos, 0, sizeof(pos));</div><div class='add'>+	row = 0;</div><div class='add'>+	chn = 0;</div><div class='add'>+	debugf4("%s: initializing %d %s\n", __func__, tot_dimms,</div><div class='add'>+		per_rank ? "ranks" : "dimms");</div><div class='add'>+	for (i = 0; i &lt; tot_dimms; i++) {</div><div class='add'>+		chan = &amp;csi[row].channels[chn];</div><div class='add'>+		dimm = EDAC_DIMM_PTR(layer, mci-&gt;dimms, n_layers,</div><div class='add'>+			       pos[0], pos[1], pos[2]);</div><div class='add'>+		dimm-&gt;mci = mci;</div><div class='add'>+</div><div class='add'>+		debugf2("%s: %d: %s%zd (%d:%d:%d): row %d, chan %d\n", __func__,</div><div class='add'>+			i, per_rank ? "rank" : "dimm", (dimm - mci-&gt;dimms),</div><div class='add'>+			pos[0], pos[1], pos[2], row, chn);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Copy DIMM location and initialize it.</div><div class='add'>+		 */</div><div class='add'>+		len = sizeof(dimm-&gt;label);</div><div class='add'>+		p = dimm-&gt;label;</div><div class='add'>+		n = snprintf(p, len, "mc#%u", mc_num);</div><div class='add'>+		p += n;</div><div class='add'>+		len -= n;</div><div class='add'>+		for (j = 0; j &lt; n_layers; j++) {</div><div class='add'>+			n = snprintf(p, len, "%s#%u",</div><div class='add'>+				     edac_layer_name[layers[j].type],</div><div class='add'>+				     pos[j]);</div><div class='add'>+			p += n;</div><div class='add'>+			len -= n;</div><div class='add'>+			dimm-&gt;location[j] = pos[j];</div><div class='add'>+</div><div class='add'>+			if (len &lt;= 0)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Link it to the csrows old API data */</div><div class='add'>+		chan-&gt;dimm = dimm;</div><div class='add'>+		dimm-&gt;csrow = row;</div><div class='add'>+		dimm-&gt;cschannel = chn;</div><div class='add'>+</div><div class='add'>+		/* Increment csrow location */</div><div class='add'>+		row++;</div><div class='add'>+		if (row == tot_csrows) {</div><div class='add'>+			row = 0;</div><div class='add'>+			chn++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Increment dimm location */</div><div class='add'>+		for (j = n_layers - 1; j &gt;= 0; j--) {</div><div class='add'>+			pos[j]++;</div><div class='add'>+			if (pos[j] &lt; layers[j].size)</div><div class='add'>+				break;</div><div class='add'>+			pos[j] = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -490,7 +651,6 @@ EXPORT_SYMBOL(edac_mc_find);</div><div class='ctx'>  * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and</div><div class='ctx'>  *                 create sysfs entries associated with mci structure</div><div class='ctx'>  * @mci: pointer to the mci structure to be added to the list</div><div class='del'>- * @mc_idx: A unique numeric identifier to be assigned to the 'mci' structure.</div><div class='ctx'>  *</div><div class='ctx'>  * Return:</div><div class='ctx'>  *	0	Success</div><div class='hunk'>@@ -517,6 +677,8 @@ int edac_mc_add_mc(struct mem_ctl_info *mci)</div><div class='ctx'> 				edac_mc_dump_channel(&amp;mci-&gt;csrows[i].</div><div class='ctx'> 						channels[j]);</div><div class='ctx'> 		}</div><div class='add'>+		for (i = 0; i &lt; mci-&gt;tot_dimms; i++)</div><div class='add'>+			edac_mc_dump_dimm(&amp;mci-&gt;dimms[i]);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> 	mutex_lock(&amp;mem_ctls_mutex);</div><div class='hunk'>@@ -636,15 +798,19 @@ static void edac_mc_scrub_block(unsigned long page, unsigned long offset,</div><div class='ctx'> int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrows = mci-&gt;csrows;</div><div class='del'>-	int row, i;</div><div class='add'>+	int row, i, j, n;</div><div class='ctx'> </div><div class='ctx'> 	debugf1("MC%d: %s(): 0x%lx\n", mci-&gt;mc_idx, __func__, page);</div><div class='ctx'> 	row = -1;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; mci-&gt;nr_csrows; i++) {</div><div class='ctx'> 		struct csrow_info *csrow = &amp;csrows[i];</div><div class='del'>-</div><div class='del'>-		if (csrow-&gt;nr_pages == 0)</div><div class='add'>+		n = 0;</div><div class='add'>+		for (j = 0; j &lt; csrow-&gt;nr_channels; j++) {</div><div class='add'>+			struct dimm_info *dimm = csrow-&gt;channels[j].dimm;</div><div class='add'>+			n += dimm-&gt;nr_pages;</div><div class='add'>+		}</div><div class='add'>+		if (n == 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) "</div><div class='hunk'>@@ -670,249 +836,307 @@ int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);</div><div class='ctx'> </div><div class='del'>-/* FIXME - setable log (warning/emerg) levels */</div><div class='del'>-/* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */</div><div class='del'>-void edac_mc_handle_ce(struct mem_ctl_info *mci,</div><div class='del'>-		unsigned long page_frame_number,</div><div class='del'>-		unsigned long offset_in_page, unsigned long syndrome,</div><div class='del'>-		int row, int channel, const char *msg)</div><div class='del'>-{</div><div class='del'>-	unsigned long remapped_page;</div><div class='add'>+const char *edac_layer_name[] = {</div><div class='add'>+	[EDAC_MC_LAYER_BRANCH] = "branch",</div><div class='add'>+	[EDAC_MC_LAYER_CHANNEL] = "channel",</div><div class='add'>+	[EDAC_MC_LAYER_SLOT] = "slot",</div><div class='add'>+	[EDAC_MC_LAYER_CHIP_SELECT] = "csrow",</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL_GPL(edac_layer_name);</div><div class='ctx'> </div><div class='del'>-	debugf3("MC%d: %s()\n", mci-&gt;mc_idx, __func__);</div><div class='add'>+static void edac_inc_ce_error(struct mem_ctl_info *mci,</div><div class='add'>+				    bool enable_per_layer_report,</div><div class='add'>+				    const int pos[EDAC_MAX_LAYERS])</div><div class='add'>+{</div><div class='add'>+	int i, index = 0;</div><div class='ctx'> </div><div class='del'>-	/* FIXME - maybe make panic on INTERNAL ERROR an option */</div><div class='del'>-	if (row &gt;= mci-&gt;nr_csrows || row &lt; 0) {</div><div class='del'>-		/* something is wrong */</div><div class='del'>-		edac_mc_printk(mci, KERN_ERR,</div><div class='del'>-			"INTERNAL ERROR: row out of range "</div><div class='del'>-			"(%d &gt;= %d)\n", row, mci-&gt;nr_csrows);</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	mci-&gt;ce_mc++;</div><div class='ctx'> </div><div class='del'>-	if (channel &gt;= mci-&gt;csrows[row].nr_channels || channel &lt; 0) {</div><div class='del'>-		/* something is wrong */</div><div class='del'>-		edac_mc_printk(mci, KERN_ERR,</div><div class='del'>-			"INTERNAL ERROR: channel out of range "</div><div class='del'>-			"(%d &gt;= %d)\n", channel,</div><div class='del'>-			mci-&gt;csrows[row].nr_channels);</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");</div><div class='add'>+	if (!enable_per_layer_report) {</div><div class='add'>+		mci-&gt;ce_noinfo_count++;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (edac_mc_get_log_ce())</div><div class='del'>-		/* FIXME - put in DIMM location */</div><div class='del'>-		edac_mc_printk(mci, KERN_WARNING,</div><div class='del'>-			"CE page 0x%lx, offset 0x%lx, grain %d, syndrome "</div><div class='del'>-			"0x%lx, row %d, channel %d, label \"%s\": %s\n",</div><div class='del'>-			page_frame_number, offset_in_page,</div><div class='del'>-			mci-&gt;csrows[row].grain, syndrome, row, channel,</div><div class='del'>-			mci-&gt;csrows[row].channels[channel].label, msg);</div><div class='del'>-</div><div class='del'>-	mci-&gt;ce_count++;</div><div class='del'>-	mci-&gt;csrows[row].ce_count++;</div><div class='del'>-	mci-&gt;csrows[row].channels[channel].ce_count++;</div><div class='del'>-</div><div class='del'>-	if (mci-&gt;scrub_mode &amp; SCRUB_SW_SRC) {</div><div class='del'>-		/*</div><div class='del'>-		 * Some MC's can remap memory so that it is still available</div><div class='del'>-		 * at a different address when PCI devices map into memory.</div><div class='del'>-		 * MC's that can't do this lose the memory where PCI devices</div><div class='del'>-		 * are mapped.  This mapping is MC dependent and so we call</div><div class='del'>-		 * back into the MC driver for it to map the MC page to</div><div class='del'>-		 * a physical (CPU) page which can then be mapped to a virtual</div><div class='del'>-		 * page - which can then be scrubbed.</div><div class='del'>-		 */</div><div class='del'>-		remapped_page = mci-&gt;ctl_page_to_phys ?</div><div class='del'>-			mci-&gt;ctl_page_to_phys(mci, page_frame_number) :</div><div class='del'>-			page_frame_number;</div><div class='add'>+	for (i = 0; i &lt; mci-&gt;n_layers; i++) {</div><div class='add'>+		if (pos[i] &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+		index += pos[i];</div><div class='add'>+		mci-&gt;ce_per_layer[i][index]++;</div><div class='ctx'> </div><div class='del'>-		edac_mc_scrub_block(remapped_page, offset_in_page,</div><div class='del'>-				mci-&gt;csrows[row].grain);</div><div class='add'>+		if (i &lt; mci-&gt;n_layers - 1)</div><div class='add'>+			index *= mci-&gt;layers[i + 1].size;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(edac_mc_handle_ce);</div><div class='ctx'> </div><div class='del'>-void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, const char *msg)</div><div class='add'>+static void edac_inc_ue_error(struct mem_ctl_info *mci,</div><div class='add'>+				    bool enable_per_layer_report,</div><div class='add'>+				    const int pos[EDAC_MAX_LAYERS])</div><div class='ctx'> {</div><div class='del'>-	if (edac_mc_get_log_ce())</div><div class='del'>-		edac_mc_printk(mci, KERN_WARNING,</div><div class='del'>-			"CE - no information available: %s\n", msg);</div><div class='add'>+	int i, index = 0;</div><div class='ctx'> </div><div class='del'>-	mci-&gt;ce_noinfo_count++;</div><div class='del'>-	mci-&gt;ce_count++;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(edac_mc_handle_ce_no_info);</div><div class='add'>+	mci-&gt;ue_mc++;</div><div class='ctx'> </div><div class='del'>-void edac_mc_handle_ue(struct mem_ctl_info *mci,</div><div class='del'>-		unsigned long page_frame_number,</div><div class='del'>-		unsigned long offset_in_page, int row, const char *msg)</div><div class='del'>-{</div><div class='del'>-	int len = EDAC_MC_LABEL_LEN * 4;</div><div class='del'>-	char labels[len + 1];</div><div class='del'>-	char *pos = labels;</div><div class='del'>-	int chan;</div><div class='del'>-	int chars;</div><div class='del'>-</div><div class='del'>-	debugf3("MC%d: %s()\n", mci-&gt;mc_idx, __func__);</div><div class='del'>-</div><div class='del'>-	/* FIXME - maybe make panic on INTERNAL ERROR an option */</div><div class='del'>-	if (row &gt;= mci-&gt;nr_csrows || row &lt; 0) {</div><div class='del'>-		/* something is wrong */</div><div class='del'>-		edac_mc_printk(mci, KERN_ERR,</div><div class='del'>-			"INTERNAL ERROR: row out of range "</div><div class='del'>-			"(%d &gt;= %d)\n", row, mci-&gt;nr_csrows);</div><div class='del'>-		edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");</div><div class='add'>+	if (!enable_per_layer_report) {</div><div class='add'>+		mci-&gt;ce_noinfo_count++;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	chars = snprintf(pos, len + 1, "%s",</div><div class='del'>-			 mci-&gt;csrows[row].channels[0].label);</div><div class='del'>-	len -= chars;</div><div class='del'>-	pos += chars;</div><div class='add'>+	for (i = 0; i &lt; mci-&gt;n_layers; i++) {</div><div class='add'>+		if (pos[i] &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+		index += pos[i];</div><div class='add'>+		mci-&gt;ue_per_layer[i][index]++;</div><div class='ctx'> </div><div class='del'>-	for (chan = 1; (chan &lt; mci-&gt;csrows[row].nr_channels) &amp;&amp; (len &gt; 0);</div><div class='del'>-		chan++) {</div><div class='del'>-		chars = snprintf(pos, len + 1, ":%s",</div><div class='del'>-				 mci-&gt;csrows[row].channels[chan].label);</div><div class='del'>-		len -= chars;</div><div class='del'>-		pos += chars;</div><div class='add'>+		if (i &lt; mci-&gt;n_layers - 1)</div><div class='add'>+			index *= mci-&gt;layers[i + 1].size;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (edac_mc_get_log_ue())</div><div class='del'>-		edac_mc_printk(mci, KERN_EMERG,</div><div class='del'>-			"UE page 0x%lx, offset 0x%lx, grain %d, row %d, "</div><div class='del'>-			"labels \"%s\": %s\n", page_frame_number,</div><div class='del'>-			offset_in_page, mci-&gt;csrows[row].grain, row,</div><div class='del'>-			labels, msg);</div><div class='add'>+static void edac_ce_error(struct mem_ctl_info *mci,</div><div class='add'>+			  const int pos[EDAC_MAX_LAYERS],</div><div class='add'>+			  const char *msg,</div><div class='add'>+			  const char *location,</div><div class='add'>+			  const char *label,</div><div class='add'>+			  const char *detail,</div><div class='add'>+			  const char *other_detail,</div><div class='add'>+			  const bool enable_per_layer_report,</div><div class='add'>+			  const unsigned long page_frame_number,</div><div class='add'>+			  const unsigned long offset_in_page,</div><div class='add'>+			  u32 grain)</div><div class='add'>+{</div><div class='add'>+	unsigned long remapped_page;</div><div class='ctx'> </div><div class='del'>-	if (edac_mc_get_panic_on_ue())</div><div class='del'>-		panic("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, "</div><div class='del'>-			"row %d, labels \"%s\": %s\n", mci-&gt;mc_idx,</div><div class='del'>-			page_frame_number, offset_in_page,</div><div class='del'>-			mci-&gt;csrows[row].grain, row, labels, msg);</div><div class='add'>+	if (edac_mc_get_log_ce()) {</div><div class='add'>+		if (other_detail &amp;&amp; *other_detail)</div><div class='add'>+			edac_mc_printk(mci, KERN_WARNING,</div><div class='add'>+				       "CE %s on %s (%s%s - %s)\n",</div><div class='add'>+				       msg, label, location,</div><div class='add'>+				       detail, other_detail);</div><div class='add'>+		else</div><div class='add'>+			edac_mc_printk(mci, KERN_WARNING,</div><div class='add'>+				       "CE %s on %s (%s%s)\n",</div><div class='add'>+				       msg, label, location,</div><div class='add'>+				       detail);</div><div class='add'>+	}</div><div class='add'>+	edac_inc_ce_error(mci, enable_per_layer_report, pos);</div><div class='ctx'> </div><div class='del'>-	mci-&gt;ue_count++;</div><div class='del'>-	mci-&gt;csrows[row].ue_count++;</div><div class='add'>+	if (mci-&gt;scrub_mode &amp; SCRUB_SW_SRC) {</div><div class='add'>+		/*</div><div class='add'>+			* Some memory controllers (called MCs below) can remap</div><div class='add'>+			* memory so that it is still available at a different</div><div class='add'>+			* address when PCI devices map into memory.</div><div class='add'>+			* MC's that can't do this, lose the memory where PCI</div><div class='add'>+			* devices are mapped. This mapping is MC-dependent</div><div class='add'>+			* and so we call back into the MC driver for it to</div><div class='add'>+			* map the MC page to a physical (CPU) page which can</div><div class='add'>+			* then be mapped to a virtual page - which can then</div><div class='add'>+			* be scrubbed.</div><div class='add'>+			*/</div><div class='add'>+		remapped_page = mci-&gt;ctl_page_to_phys ?</div><div class='add'>+			mci-&gt;ctl_page_to_phys(mci, page_frame_number) :</div><div class='add'>+			page_frame_number;</div><div class='add'>+</div><div class='add'>+		edac_mc_scrub_block(remapped_page,</div><div class='add'>+					offset_in_page, grain);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(edac_mc_handle_ue);</div><div class='ctx'> </div><div class='del'>-void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg)</div><div class='add'>+static void edac_ue_error(struct mem_ctl_info *mci,</div><div class='add'>+			  const int pos[EDAC_MAX_LAYERS],</div><div class='add'>+			  const char *msg,</div><div class='add'>+			  const char *location,</div><div class='add'>+			  const char *label,</div><div class='add'>+			  const char *detail,</div><div class='add'>+			  const char *other_detail,</div><div class='add'>+			  const bool enable_per_layer_report)</div><div class='ctx'> {</div><div class='del'>-	if (edac_mc_get_panic_on_ue())</div><div class='del'>-		panic("EDAC MC%d: Uncorrected Error", mci-&gt;mc_idx);</div><div class='add'>+	if (edac_mc_get_log_ue()) {</div><div class='add'>+		if (other_detail &amp;&amp; *other_detail)</div><div class='add'>+			edac_mc_printk(mci, KERN_WARNING,</div><div class='add'>+				       "UE %s on %s (%s%s - %s)\n",</div><div class='add'>+			               msg, label, location, detail,</div><div class='add'>+				       other_detail);</div><div class='add'>+		else</div><div class='add'>+			edac_mc_printk(mci, KERN_WARNING,</div><div class='add'>+				       "UE %s on %s (%s%s)\n",</div><div class='add'>+			               msg, label, location, detail);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (edac_mc_get_log_ue())</div><div class='del'>-		edac_mc_printk(mci, KERN_WARNING,</div><div class='del'>-			"UE - no information available: %s\n", msg);</div><div class='del'>-	mci-&gt;ue_noinfo_count++;</div><div class='del'>-	mci-&gt;ue_count++;</div><div class='add'>+	if (edac_mc_get_panic_on_ue()) {</div><div class='add'>+		if (other_detail &amp;&amp; *other_detail)</div><div class='add'>+			panic("UE %s on %s (%s%s - %s)\n",</div><div class='add'>+			      msg, label, location, detail, other_detail);</div><div class='add'>+		else</div><div class='add'>+			panic("UE %s on %s (%s%s)\n",</div><div class='add'>+			      msg, label, location, detail);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	edac_inc_ue_error(mci, enable_per_layer_report, pos);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info);</div><div class='ctx'> </div><div class='del'>-/*************************************************************</div><div class='del'>- * On Fully Buffered DIMM modules, this help function is</div><div class='del'>- * called to process UE events</div><div class='del'>- */</div><div class='del'>-void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci,</div><div class='del'>-			unsigned int csrow,</div><div class='del'>-			unsigned int channela,</div><div class='del'>-			unsigned int channelb, char *msg)</div><div class='add'>+#define OTHER_LABEL " or "</div><div class='add'>+void edac_mc_handle_error(const enum hw_event_mc_err_type type,</div><div class='add'>+			  struct mem_ctl_info *mci,</div><div class='add'>+			  const unsigned long page_frame_number,</div><div class='add'>+			  const unsigned long offset_in_page,</div><div class='add'>+			  const unsigned long syndrome,</div><div class='add'>+			  const int layer0,</div><div class='add'>+			  const int layer1,</div><div class='add'>+			  const int layer2,</div><div class='add'>+			  const char *msg,</div><div class='add'>+			  const char *other_detail,</div><div class='add'>+			  const void *mcelog)</div><div class='ctx'> {</div><div class='del'>-	int len = EDAC_MC_LABEL_LEN * 4;</div><div class='del'>-	char labels[len + 1];</div><div class='del'>-	char *pos = labels;</div><div class='del'>-	int chars;</div><div class='add'>+	/* FIXME: too much for stack: move it to some pre-alocated area */</div><div class='add'>+	char detail[80], location[80];</div><div class='add'>+	char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * mci-&gt;tot_dimms];</div><div class='add'>+	char *p;</div><div class='add'>+	int row = -1, chan = -1;</div><div class='add'>+	int pos[EDAC_MAX_LAYERS] = { layer0, layer1, layer2 };</div><div class='add'>+	int i;</div><div class='add'>+	u32 grain;</div><div class='add'>+	bool enable_per_layer_report = false;</div><div class='ctx'> </div><div class='del'>-	if (csrow &gt;= mci-&gt;nr_csrows) {</div><div class='del'>-		/* something is wrong */</div><div class='del'>-		edac_mc_printk(mci, KERN_ERR,</div><div class='del'>-			"INTERNAL ERROR: row out of range (%d &gt;= %d)\n",</div><div class='del'>-			csrow, mci-&gt;nr_csrows);</div><div class='del'>-		edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	debugf3("MC%d: %s()\n", mci-&gt;mc_idx, __func__);</div><div class='ctx'> </div><div class='del'>-	if (channela &gt;= mci-&gt;csrows[csrow].nr_channels) {</div><div class='del'>-		/* something is wrong */</div><div class='del'>-		edac_mc_printk(mci, KERN_ERR,</div><div class='del'>-			"INTERNAL ERROR: channel-a out of range "</div><div class='del'>-			"(%d &gt;= %d)\n",</div><div class='del'>-			channela, mci-&gt;csrows[csrow].nr_channels);</div><div class='del'>-		edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");</div><div class='del'>-		return;</div><div class='add'>+	/*</div><div class='add'>+	 * Check if the event report is consistent and if the memory</div><div class='add'>+	 * location is known. If it is known, enable_per_layer_report will be</div><div class='add'>+	 * true, the DIMM(s) label info will be filled and the per-layer</div><div class='add'>+	 * error counters will be incremented.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; mci-&gt;n_layers; i++) {</div><div class='add'>+		if (pos[i] &gt;= (int)mci-&gt;layers[i].size) {</div><div class='add'>+			if (type == HW_EVENT_ERR_CORRECTED)</div><div class='add'>+				p = "CE";</div><div class='add'>+			else</div><div class='add'>+				p = "UE";</div><div class='add'>+</div><div class='add'>+			edac_mc_printk(mci, KERN_ERR,</div><div class='add'>+				       "INTERNAL ERROR: %s value is out of range (%d &gt;= %d)\n",</div><div class='add'>+				       edac_layer_name[mci-&gt;layers[i].type],</div><div class='add'>+				       pos[i], mci-&gt;layers[i].size);</div><div class='add'>+			/*</div><div class='add'>+			 * Instead of just returning it, let's use what's</div><div class='add'>+			 * known about the error. The increment routines and</div><div class='add'>+			 * the DIMM filter logic will do the right thing by</div><div class='add'>+			 * pointing the likely damaged DIMMs.</div><div class='add'>+			 */</div><div class='add'>+			pos[i] = -1;</div><div class='add'>+		}</div><div class='add'>+		if (pos[i] &gt;= 0)</div><div class='add'>+			enable_per_layer_report = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (channelb &gt;= mci-&gt;csrows[csrow].nr_channels) {</div><div class='del'>-		/* something is wrong */</div><div class='del'>-		edac_mc_printk(mci, KERN_ERR,</div><div class='del'>-			"INTERNAL ERROR: channel-b out of range "</div><div class='del'>-			"(%d &gt;= %d)\n",</div><div class='del'>-			channelb, mci-&gt;csrows[csrow].nr_channels);</div><div class='del'>-		edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	/*</div><div class='add'>+	 * Get the dimm label/grain that applies to the match criteria.</div><div class='add'>+	 * As the error algorithm may not be able to point to just one memory</div><div class='add'>+	 * stick, the logic here will get all possible labels that could</div><div class='add'>+	 * pottentially be affected by the error.</div><div class='add'>+	 * On FB-DIMM memory controllers, for uncorrected errors, it is common</div><div class='add'>+	 * to have only the MC channel and the MC dimm (also called "branch")</div><div class='add'>+	 * but the channel is not known, as the memory is arranged in pairs,</div><div class='add'>+	 * where each memory belongs to a separate channel within the same</div><div class='add'>+	 * branch.</div><div class='add'>+	 */</div><div class='add'>+	grain = 0;</div><div class='add'>+	p = label;</div><div class='add'>+	*p = '\0';</div><div class='add'>+	for (i = 0; i &lt; mci-&gt;tot_dimms; i++) {</div><div class='add'>+		struct dimm_info *dimm = &amp;mci-&gt;dimms[i];</div><div class='ctx'> </div><div class='del'>-	mci-&gt;ue_count++;</div><div class='del'>-	mci-&gt;csrows[csrow].ue_count++;</div><div class='add'>+		if (layer0 &gt;= 0 &amp;&amp; layer0 != dimm-&gt;location[0])</div><div class='add'>+			continue;</div><div class='add'>+		if (layer1 &gt;= 0 &amp;&amp; layer1 != dimm-&gt;location[1])</div><div class='add'>+			continue;</div><div class='add'>+		if (layer2 &gt;= 0 &amp;&amp; layer2 != dimm-&gt;location[2])</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-	/* Generate the DIMM labels from the specified channels */</div><div class='del'>-	chars = snprintf(pos, len + 1, "%s",</div><div class='del'>-			 mci-&gt;csrows[csrow].channels[channela].label);</div><div class='del'>-	len -= chars;</div><div class='del'>-	pos += chars;</div><div class='del'>-	chars = snprintf(pos, len + 1, "-%s",</div><div class='del'>-			 mci-&gt;csrows[csrow].channels[channelb].label);</div><div class='add'>+		/* get the max grain, over the error match range */</div><div class='add'>+		if (dimm-&gt;grain &gt; grain)</div><div class='add'>+			grain = dimm-&gt;grain;</div><div class='ctx'> </div><div class='del'>-	if (edac_mc_get_log_ue())</div><div class='del'>-		edac_mc_printk(mci, KERN_EMERG,</div><div class='del'>-			"UE row %d, channel-a= %d channel-b= %d "</div><div class='del'>-			"labels \"%s\": %s\n", csrow, channela, channelb,</div><div class='del'>-			labels, msg);</div><div class='add'>+		/*</div><div class='add'>+		 * If the error is memory-controller wide, there's no need to</div><div class='add'>+		 * seek for the affected DIMMs because the whole</div><div class='add'>+		 * channel/memory controller/...  may be affected.</div><div class='add'>+		 * Also, don't show errors for empty DIMM slots.</div><div class='add'>+		 */</div><div class='add'>+		if (enable_per_layer_report &amp;&amp; dimm-&gt;nr_pages) {</div><div class='add'>+			if (p != label) {</div><div class='add'>+				strcpy(p, OTHER_LABEL);</div><div class='add'>+				p += strlen(OTHER_LABEL);</div><div class='add'>+			}</div><div class='add'>+			strcpy(p, dimm-&gt;label);</div><div class='add'>+			p += strlen(p);</div><div class='add'>+			*p = '\0';</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * get csrow/channel of the DIMM, in order to allow</div><div class='add'>+			 * incrementing the compat API counters</div><div class='add'>+			 */</div><div class='add'>+			debugf4("%s: %s csrows map: (%d,%d)\n",</div><div class='add'>+				__func__,</div><div class='add'>+				mci-&gt;mem_is_per_rank ? "rank" : "dimm",</div><div class='add'>+				dimm-&gt;csrow, dimm-&gt;cschannel);</div><div class='add'>+</div><div class='add'>+			if (row == -1)</div><div class='add'>+				row = dimm-&gt;csrow;</div><div class='add'>+			else if (row &gt;= 0 &amp;&amp; row != dimm-&gt;csrow)</div><div class='add'>+				row = -2;</div><div class='add'>+</div><div class='add'>+			if (chan == -1)</div><div class='add'>+				chan = dimm-&gt;cschannel;</div><div class='add'>+			else if (chan &gt;= 0 &amp;&amp; chan != dimm-&gt;cschannel)</div><div class='add'>+				chan = -2;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (edac_mc_get_panic_on_ue())</div><div class='del'>-		panic("UE row %d, channel-a= %d channel-b= %d "</div><div class='del'>-			"labels \"%s\": %s\n", csrow, channela,</div><div class='del'>-			channelb, labels, msg);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(edac_mc_handle_fbd_ue);</div><div class='add'>+	if (!enable_per_layer_report) {</div><div class='add'>+		strcpy(label, "any memory");</div><div class='add'>+	} else {</div><div class='add'>+		debugf4("%s: csrow/channel to increment: (%d,%d)\n",</div><div class='add'>+			__func__, row, chan);</div><div class='add'>+		if (p == label)</div><div class='add'>+			strcpy(label, "unknown memory");</div><div class='add'>+		if (type == HW_EVENT_ERR_CORRECTED) {</div><div class='add'>+			if (row &gt;= 0) {</div><div class='add'>+				mci-&gt;csrows[row].ce_count++;</div><div class='add'>+				if (chan &gt;= 0)</div><div class='add'>+					mci-&gt;csrows[row].channels[chan].ce_count++;</div><div class='add'>+			}</div><div class='add'>+		} else</div><div class='add'>+			if (row &gt;= 0)</div><div class='add'>+				mci-&gt;csrows[row].ue_count++;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-/*************************************************************</div><div class='del'>- * On Fully Buffered DIMM modules, this help function is</div><div class='del'>- * called to process CE events</div><div class='del'>- */</div><div class='del'>-void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci,</div><div class='del'>-			unsigned int csrow, unsigned int channel, char *msg)</div><div class='del'>-{</div><div class='add'>+	/* Fill the RAM location data */</div><div class='add'>+	p = location;</div><div class='add'>+	for (i = 0; i &lt; mci-&gt;n_layers; i++) {</div><div class='add'>+		if (pos[i] &lt; 0)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-	/* Ensure boundary values */</div><div class='del'>-	if (csrow &gt;= mci-&gt;nr_csrows) {</div><div class='del'>-		/* something is wrong */</div><div class='del'>-		edac_mc_printk(mci, KERN_ERR,</div><div class='del'>-			"INTERNAL ERROR: row out of range (%d &gt;= %d)\n",</div><div class='del'>-			csrow, mci-&gt;nr_csrows);</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	if (channel &gt;= mci-&gt;csrows[csrow].nr_channels) {</div><div class='del'>-		/* something is wrong */</div><div class='del'>-		edac_mc_printk(mci, KERN_ERR,</div><div class='del'>-			"INTERNAL ERROR: channel out of range (%d &gt;= %d)\n",</div><div class='del'>-			channel, mci-&gt;csrows[csrow].nr_channels);</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");</div><div class='del'>-		return;</div><div class='add'>+		p += sprintf(p, "%s:%d ",</div><div class='add'>+			     edac_layer_name[mci-&gt;layers[i].type],</div><div class='add'>+			     pos[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (edac_mc_get_log_ce())</div><div class='del'>-		/* FIXME - put in DIMM location */</div><div class='del'>-		edac_mc_printk(mci, KERN_WARNING,</div><div class='del'>-			"CE row %d, channel %d, label \"%s\": %s\n",</div><div class='del'>-			csrow, channel,</div><div class='del'>-			mci-&gt;csrows[csrow].channels[channel].label, msg);</div><div class='add'>+	/* Memory type dependent details about the error */</div><div class='add'>+	if (type == HW_EVENT_ERR_CORRECTED) {</div><div class='add'>+		snprintf(detail, sizeof(detail),</div><div class='add'>+			"page:0x%lx offset:0x%lx grain:%d syndrome:0x%lx",</div><div class='add'>+			page_frame_number, offset_in_page,</div><div class='add'>+			grain, syndrome);</div><div class='add'>+		edac_ce_error(mci, pos, msg, location, label, detail,</div><div class='add'>+			      other_detail, enable_per_layer_report,</div><div class='add'>+			      page_frame_number, offset_in_page, grain);</div><div class='add'>+	} else {</div><div class='add'>+		snprintf(detail, sizeof(detail),</div><div class='add'>+			"page:0x%lx offset:0x%lx grain:%d",</div><div class='add'>+			page_frame_number, offset_in_page, grain);</div><div class='ctx'> </div><div class='del'>-	mci-&gt;ce_count++;</div><div class='del'>-	mci-&gt;csrows[csrow].ce_count++;</div><div class='del'>-	mci-&gt;csrows[csrow].channels[channel].ce_count++;</div><div class='add'>+		edac_ue_error(mci, pos, msg, location, label, detail,</div><div class='add'>+			      other_detail, enable_per_layer_report);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(edac_mc_handle_fbd_ce);</div><div class='add'>+EXPORT_SYMBOL_GPL(edac_mc_handle_error);</div><div class='head'>diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c<br/>index e9a28f576d14..f6a29b0eedc8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/edac_mc_sysfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/edac_mc_sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/edac_mc_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/edac_mc_sysfs.c</a></div><div class='hunk'>@@ -144,25 +144,31 @@ static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data,</div><div class='ctx'> static ssize_t csrow_size_show(struct csrow_info *csrow, char *data,</div><div class='ctx'> 				int private)</div><div class='ctx'> {</div><div class='del'>-	return sprintf(data, "%u\n", PAGES_TO_MiB(csrow-&gt;nr_pages));</div><div class='add'>+	int i;</div><div class='add'>+	u32 nr_pages = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; csrow-&gt;nr_channels; i++)</div><div class='add'>+		nr_pages += csrow-&gt;channels[i].dimm-&gt;nr_pages;</div><div class='add'>+</div><div class='add'>+	return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data,</div><div class='ctx'> 				int private)</div><div class='ctx'> {</div><div class='del'>-	return sprintf(data, "%s\n", mem_types[csrow-&gt;mtype]);</div><div class='add'>+	return sprintf(data, "%s\n", mem_types[csrow-&gt;channels[0].dimm-&gt;mtype]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data,</div><div class='ctx'> 				int private)</div><div class='ctx'> {</div><div class='del'>-	return sprintf(data, "%s\n", dev_types[csrow-&gt;dtype]);</div><div class='add'>+	return sprintf(data, "%s\n", dev_types[csrow-&gt;channels[0].dimm-&gt;dtype]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data,</div><div class='ctx'> 				int private)</div><div class='ctx'> {</div><div class='del'>-	return sprintf(data, "%s\n", edac_caps[csrow-&gt;edac_mode]);</div><div class='add'>+	return sprintf(data, "%s\n", edac_caps[csrow-&gt;channels[0].dimm-&gt;edac_mode]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* show/store functions for DIMM Label attributes */</div><div class='hunk'>@@ -170,11 +176,11 @@ static ssize_t channel_dimm_label_show(struct csrow_info *csrow,</div><div class='ctx'> 				char *data, int channel)</div><div class='ctx'> {</div><div class='ctx'> 	/* if field has not been initialized, there is nothing to send */</div><div class='del'>-	if (!csrow-&gt;channels[channel].label[0])</div><div class='add'>+	if (!csrow-&gt;channels[channel].dimm-&gt;label[0])</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",</div><div class='del'>-			csrow-&gt;channels[channel].label);</div><div class='add'>+			csrow-&gt;channels[channel].dimm-&gt;label);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t channel_dimm_label_store(struct csrow_info *csrow,</div><div class='hunk'>@@ -184,8 +190,8 @@ static ssize_t channel_dimm_label_store(struct csrow_info *csrow,</div><div class='ctx'> 	ssize_t max_size = 0;</div><div class='ctx'> </div><div class='ctx'> 	max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);</div><div class='del'>-	strncpy(csrow-&gt;channels[channel].label, data, max_size);</div><div class='del'>-	csrow-&gt;channels[channel].label[max_size] = '\0';</div><div class='add'>+	strncpy(csrow-&gt;channels[channel].dimm-&gt;label, data, max_size);</div><div class='add'>+	csrow-&gt;channels[channel].dimm-&gt;label[max_size] = '\0';</div><div class='ctx'> </div><div class='ctx'> 	return max_size;</div><div class='ctx'> }</div><div class='hunk'>@@ -419,8 +425,8 @@ static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 	mci-&gt;ue_noinfo_count = 0;</div><div class='ctx'> 	mci-&gt;ce_noinfo_count = 0;</div><div class='del'>-	mci-&gt;ue_count = 0;</div><div class='del'>-	mci-&gt;ce_count = 0;</div><div class='add'>+	mci-&gt;ue_mc = 0;</div><div class='add'>+	mci-&gt;ce_mc = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (row = 0; row &lt; mci-&gt;nr_csrows; row++) {</div><div class='ctx'> 		struct csrow_info *ri = &amp;mci-&gt;csrows[row];</div><div class='hunk'>@@ -489,12 +495,12 @@ static ssize_t mci_sdram_scrub_rate_show(struct mem_ctl_info *mci, char *data)</div><div class='ctx'> /* default attribute files for the MCI object */</div><div class='ctx'> static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data)</div><div class='ctx'> {</div><div class='del'>-	return sprintf(data, "%d\n", mci-&gt;ue_count);</div><div class='add'>+	return sprintf(data, "%d\n", mci-&gt;ue_mc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data)</div><div class='ctx'> {</div><div class='del'>-	return sprintf(data, "%d\n", mci-&gt;ce_count);</div><div class='add'>+	return sprintf(data, "%d\n", mci-&gt;ce_mc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data)</div><div class='hunk'>@@ -519,16 +525,16 @@ static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data)</div><div class='ctx'> </div><div class='ctx'> static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)</div><div class='ctx'> {</div><div class='del'>-	int total_pages, csrow_idx;</div><div class='add'>+	int total_pages = 0, csrow_idx, j;</div><div class='ctx'> </div><div class='del'>-	for (total_pages = csrow_idx = 0; csrow_idx &lt; mci-&gt;nr_csrows;</div><div class='del'>-		csrow_idx++) {</div><div class='add'>+	for (csrow_idx = 0; csrow_idx &lt; mci-&gt;nr_csrows; csrow_idx++) {</div><div class='ctx'> 		struct csrow_info *csrow = &amp;mci-&gt;csrows[csrow_idx];</div><div class='ctx'> </div><div class='del'>-		if (!csrow-&gt;nr_pages)</div><div class='del'>-			continue;</div><div class='add'>+		for (j = 0; j &lt; csrow-&gt;nr_channels; j++) {</div><div class='add'>+			struct dimm_info *dimm = csrow-&gt;channels[j].dimm;</div><div class='ctx'> </div><div class='del'>-		total_pages += csrow-&gt;nr_pages;</div><div class='add'>+			total_pages += dimm-&gt;nr_pages;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));</div><div class='hunk'>@@ -900,7 +906,7 @@ static void edac_remove_mci_instance_attributes(struct mem_ctl_info *mci,</div><div class='ctx'>  */</div><div class='ctx'> int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	int i, j;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='ctx'> 	struct kobject *kobj_mci = &amp;mci-&gt;edac_mci_kobj;</div><div class='hunk'>@@ -934,10 +940,13 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)</div><div class='ctx'> 	/* Make directories for each CSROW object under the mc&lt;id&gt; kobject</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; mci-&gt;nr_csrows; i++) {</div><div class='add'>+		int nr_pages = 0;</div><div class='add'>+</div><div class='ctx'> 		csrow = &amp;mci-&gt;csrows[i];</div><div class='add'>+		for (j = 0; j &lt; csrow-&gt;nr_channels; j++)</div><div class='add'>+			nr_pages += csrow-&gt;channels[j].dimm-&gt;nr_pages;</div><div class='ctx'> </div><div class='del'>-		/* Only expose populated CSROWs */</div><div class='del'>-		if (csrow-&gt;nr_pages &gt; 0) {</div><div class='add'>+		if (nr_pages &gt; 0) {</div><div class='ctx'> 			err = edac_create_csrow_object(mci, csrow, i);</div><div class='ctx'> 			if (err) {</div><div class='ctx'> 				debugf1("%s() failure: create csrow %d obj\n",</div><div class='hunk'>@@ -949,12 +958,15 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-	/* CSROW error: backout what has already been registered,  */</div><div class='ctx'> fail1:</div><div class='ctx'> 	for (i--; i &gt;= 0; i--) {</div><div class='del'>-		if (csrow-&gt;nr_pages &gt; 0) {</div><div class='add'>+		int nr_pages = 0;</div><div class='add'>+</div><div class='add'>+		csrow = &amp;mci-&gt;csrows[i];</div><div class='add'>+		for (j = 0; j &lt; csrow-&gt;nr_channels; j++)</div><div class='add'>+			nr_pages += csrow-&gt;channels[j].dimm-&gt;nr_pages;</div><div class='add'>+		if (nr_pages &gt; 0)</div><div class='ctx'> 			kobject_put(&amp;mci-&gt;csrows[i].kobj);</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* remove the mci instance's attributes, if any */</div><div class='hunk'>@@ -973,14 +985,20 @@ fail0:</div><div class='ctx'>  */</div><div class='ctx'> void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	struct csrow_info *csrow;</div><div class='add'>+	int i, j;</div><div class='ctx'> </div><div class='ctx'> 	debugf0("%s()\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	/* remove all csrow kobjects */</div><div class='ctx'> 	debugf4("%s()  unregister this mci kobj\n", __func__);</div><div class='ctx'> 	for (i = 0; i &lt; mci-&gt;nr_csrows; i++) {</div><div class='del'>-		if (mci-&gt;csrows[i].nr_pages &gt; 0) {</div><div class='add'>+		int nr_pages = 0;</div><div class='add'>+</div><div class='add'>+		csrow = &amp;mci-&gt;csrows[i];</div><div class='add'>+		for (j = 0; j &lt; csrow-&gt;nr_channels; j++)</div><div class='add'>+			nr_pages += csrow-&gt;channels[j].dimm-&gt;nr_pages;</div><div class='add'>+		if (nr_pages &gt; 0) {</div><div class='ctx'> 			debugf0("%s()  unreg csrow-%d\n", __func__, i);</div><div class='ctx'> 			kobject_put(&amp;mci-&gt;csrows[i].kobj);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/edac/edac_module.h b/drivers/edac/edac_module.h<br/>index 00f81b47a51f..0ea7d14cb930 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/edac_module.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/edac_module.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/edac_module.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/edac_module.h</a></div><div class='hunk'>@@ -50,7 +50,7 @@ extern void edac_device_reset_delay_period(struct edac_device_ctl_info</div><div class='ctx'> 					   *edac_dev, unsigned long value);</div><div class='ctx'> extern void edac_mc_reset_delay_period(int value);</div><div class='ctx'> </div><div class='del'>-extern void *edac_align_ptr(void *ptr, unsigned size);</div><div class='add'>+extern void *edac_align_ptr(void **p, unsigned size, int n_elems);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * EDAC PCI functions</div><div class='head'>diff --git a/drivers/edac/edac_pci.c b/drivers/edac/edac_pci.c<br/>index 63af1c5673d1..f1ac86649886 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/edac_pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/edac_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/edac_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/edac_pci.c</a></div><div class='hunk'>@@ -42,13 +42,13 @@ struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,</div><div class='ctx'> 						const char *edac_pci_name)</div><div class='ctx'> {</div><div class='ctx'> 	struct edac_pci_ctl_info *pci;</div><div class='del'>-	void *pvt;</div><div class='add'>+	void *p = NULL, *pvt;</div><div class='ctx'> 	unsigned int size;</div><div class='ctx'> </div><div class='ctx'> 	debugf1("%s()\n", __func__);</div><div class='ctx'> </div><div class='del'>-	pci = (struct edac_pci_ctl_info *)0;</div><div class='del'>-	pvt = edac_align_ptr(&amp;pci[1], sz_pvt);</div><div class='add'>+	pci = edac_align_ptr(&amp;p, sizeof(*pci), 1);</div><div class='add'>+	pvt = edac_align_ptr(&amp;p, 1, sz_pvt);</div><div class='ctx'> 	size = ((unsigned long)pvt) + sz_pvt;</div><div class='ctx'> </div><div class='ctx'> 	/* Alloc the needed control struct memory */</div><div class='head'>diff --git a/drivers/edac/i3000_edac.c b/drivers/edac/i3000_edac.c<br/>index 277689a68841..8ad1744faacd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/i3000_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/i3000_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/i3000_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i3000_edac.c</a></div><div class='hunk'>@@ -245,7 +245,9 @@ static int i3000_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	if ((info-&gt;errsts ^ info-&gt;errsts2) &amp; I3000_ERRSTS_BITS) {</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, "UE overwrote CE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,</div><div class='add'>+				     -1, -1, -1,</div><div class='add'>+				     "UE overwrote CE", "", NULL);</div><div class='ctx'> 		info-&gt;errsts = info-&gt;errsts2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -256,10 +258,15 @@ static int i3000_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 	row = edac_mc_find_csrow_by_page(mci, pfn);</div><div class='ctx'> </div><div class='ctx'> 	if (info-&gt;errsts &amp; I3000_ERRSTS_UE)</div><div class='del'>-		edac_mc_handle_ue(mci, pfn, offset, row, "i3000 UE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+				     pfn, offset, 0,</div><div class='add'>+				     row, -1, -1,</div><div class='add'>+				     "i3000 UE", "", NULL);</div><div class='ctx'> 	else</div><div class='del'>-		edac_mc_handle_ce(mci, pfn, offset, info-&gt;derrsyn, row,</div><div class='del'>-				multi_chan ? channel : 0, "i3000 CE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     pfn, offset, info-&gt;derrsyn,</div><div class='add'>+				     row, multi_chan ? channel : 0, -1,</div><div class='add'>+				     "i3000 CE", "", NULL);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -304,9 +311,10 @@ static int i3000_is_interleaved(const unsigned char *c0dra,</div><div class='ctx'> static int i3000_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='del'>-	int i;</div><div class='add'>+	int i, j;</div><div class='ctx'> 	struct mem_ctl_info *mci = NULL;</div><div class='del'>-	unsigned long last_cumul_size;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='add'>+	unsigned long last_cumul_size, nr_pages;</div><div class='ctx'> 	int interleaved, nr_channels;</div><div class='ctx'> 	unsigned char dra[I3000_RANKS / 2], drb[I3000_RANKS];</div><div class='ctx'> 	unsigned char *c0dra = dra, *c1dra = &amp;dra[I3000_RANKS_PER_CHANNEL / 2];</div><div class='hunk'>@@ -347,7 +355,14 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	 */</div><div class='ctx'> 	interleaved = i3000_is_interleaved(c0dra, c1dra, c0drb, c1drb);</div><div class='ctx'> 	nr_channels = interleaved ? 2 : 1;</div><div class='del'>-	mci = edac_mc_alloc(0, I3000_RANKS / nr_channels, nr_channels, 0);</div><div class='add'>+</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = I3000_RANKS / nr_channels;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = nr_channels;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0);</div><div class='ctx'> 	if (!mci)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -386,19 +401,23 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 			cumul_size &lt;&lt;= 1;</div><div class='ctx'> 		debugf3("MC: %s(): (%d) cumul_size 0x%x\n",</div><div class='ctx'> 			__func__, i, cumul_size);</div><div class='del'>-		if (cumul_size == last_cumul_size) {</div><div class='del'>-			csrow-&gt;mtype = MEM_EMPTY;</div><div class='add'>+		if (cumul_size == last_cumul_size)</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		csrow-&gt;first_page = last_cumul_size;</div><div class='ctx'> 		csrow-&gt;last_page = cumul_size - 1;</div><div class='del'>-		csrow-&gt;nr_pages = cumul_size - last_cumul_size;</div><div class='add'>+		nr_pages = cumul_size - last_cumul_size;</div><div class='ctx'> 		last_cumul_size = cumul_size;</div><div class='del'>-		csrow-&gt;grain = I3000_DEAP_GRAIN;</div><div class='del'>-		csrow-&gt;mtype = MEM_DDR2;</div><div class='del'>-		csrow-&gt;dtype = DEV_UNKNOWN;</div><div class='del'>-		csrow-&gt;edac_mode = EDAC_UNKNOWN;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; nr_channels; j++) {</div><div class='add'>+			struct dimm_info *dimm = csrow-&gt;channels[j].dimm;</div><div class='add'>+</div><div class='add'>+			dimm-&gt;nr_pages = nr_pages / nr_channels;</div><div class='add'>+			dimm-&gt;grain = I3000_DEAP_GRAIN;</div><div class='add'>+			dimm-&gt;mtype = MEM_DDR2;</div><div class='add'>+			dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+			dimm-&gt;edac_mode = EDAC_UNKNOWN;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c<br/>index 046808c6357d..bbe43ef71823 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/i3200_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/i3200_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/i3200_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i3200_edac.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> </div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_3200_HB    0x29f0</div><div class='ctx'> </div><div class='add'>+#define I3200_DIMMS		4</div><div class='ctx'> #define I3200_RANKS		8</div><div class='ctx'> #define I3200_RANKS_PER_CHANNEL	4</div><div class='ctx'> #define I3200_CHANNELS		2</div><div class='hunk'>@@ -217,21 +218,25 @@ static void i3200_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if ((info-&gt;errsts ^ info-&gt;errsts2) &amp; I3200_ERRSTS_BITS) {</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, "UE overwrote CE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,</div><div class='add'>+				     -1, -1, -1, "UE overwrote CE", "", NULL);</div><div class='ctx'> 		info-&gt;errsts = info-&gt;errsts2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (channel = 0; channel &lt; nr_channels; channel++) {</div><div class='ctx'> 		log = info-&gt;eccerrlog[channel];</div><div class='ctx'> 		if (log &amp; I3200_ECCERRLOG_UE) {</div><div class='del'>-			edac_mc_handle_ue(mci, 0, 0,</div><div class='del'>-				eccerrlog_row(channel, log),</div><div class='del'>-				"i3200 UE");</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+					     0, 0, 0,</div><div class='add'>+					     eccerrlog_row(channel, log),</div><div class='add'>+					     -1, -1,</div><div class='add'>+					     "i3000 UE", "", NULL);</div><div class='ctx'> 		} else if (log &amp; I3200_ECCERRLOG_CE) {</div><div class='del'>-			edac_mc_handle_ce(mci, 0, 0,</div><div class='del'>-				eccerrlog_syndrome(log),</div><div class='del'>-				eccerrlog_row(channel, log), 0,</div><div class='del'>-				"i3200 CE");</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+					     0, 0, eccerrlog_syndrome(log),</div><div class='add'>+					     eccerrlog_row(channel, log),</div><div class='add'>+					     -1, -1,</div><div class='add'>+					     "i3000 UE", "", NULL);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -319,9 +324,9 @@ static unsigned long drb_to_nr_pages(</div><div class='ctx'> static int i3200_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='del'>-	int i;</div><div class='add'>+	int i, j;</div><div class='ctx'> 	struct mem_ctl_info *mci = NULL;</div><div class='del'>-	unsigned long last_page;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	u16 drbs[I3200_CHANNELS][I3200_RANKS_PER_CHANNEL];</div><div class='ctx'> 	bool stacked;</div><div class='ctx'> 	void __iomem *window;</div><div class='hunk'>@@ -336,8 +341,14 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	i3200_get_drbs(window, drbs);</div><div class='ctx'> 	nr_channels = how_many_channels(pdev);</div><div class='ctx'> </div><div class='del'>-	mci = edac_mc_alloc(sizeof(struct i3200_priv), I3200_RANKS,</div><div class='del'>-		nr_channels, 0);</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = I3200_DIMMS;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = nr_channels;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers,</div><div class='add'>+			    sizeof(struct i3200_priv));</div><div class='ctx'> 	if (!mci)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -366,7 +377,6 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	 * cumulative; the last one will contain the total memory</div><div class='ctx'> 	 * contained in all ranks.</div><div class='ctx'> 	 */</div><div class='del'>-	last_page = -1UL;</div><div class='ctx'> 	for (i = 0; i &lt; mci-&gt;nr_csrows; i++) {</div><div class='ctx'> 		unsigned long nr_pages;</div><div class='ctx'> 		struct csrow_info *csrow = &amp;mci-&gt;csrows[i];</div><div class='hunk'>@@ -375,20 +385,18 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 			i / I3200_RANKS_PER_CHANNEL,</div><div class='ctx'> 			i % I3200_RANKS_PER_CHANNEL);</div><div class='ctx'> </div><div class='del'>-		if (nr_pages == 0) {</div><div class='del'>-			csrow-&gt;mtype = MEM_EMPTY;</div><div class='add'>+		if (nr_pages == 0)</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='del'>-		csrow-&gt;first_page = last_page + 1;</div><div class='del'>-		last_page += nr_pages;</div><div class='del'>-		csrow-&gt;last_page = last_page;</div><div class='del'>-		csrow-&gt;nr_pages = nr_pages;</div><div class='add'>+		for (j = 0; j &lt; nr_channels; j++) {</div><div class='add'>+			struct dimm_info *dimm = csrow-&gt;channels[j].dimm;</div><div class='ctx'> </div><div class='del'>-		csrow-&gt;grain = nr_pages &lt;&lt; PAGE_SHIFT;</div><div class='del'>-		csrow-&gt;mtype = MEM_DDR2;</div><div class='del'>-		csrow-&gt;dtype = DEV_UNKNOWN;</div><div class='del'>-		csrow-&gt;edac_mode = EDAC_UNKNOWN;</div><div class='add'>+			dimm-&gt;nr_pages = nr_pages / nr_channels;</div><div class='add'>+			dimm-&gt;grain = nr_pages &lt;&lt; PAGE_SHIFT;</div><div class='add'>+			dimm-&gt;mtype = MEM_DDR2;</div><div class='add'>+			dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+			dimm-&gt;edac_mode = EDAC_UNKNOWN;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	i3200_clear_error_info(mci);</div><div class='head'>diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c<br/>index a2680d8e744b..11ea835f155a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/i5000_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/i5000_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/i5000_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i5000_edac.c</a></div><div class='hunk'>@@ -270,7 +270,8 @@</div><div class='ctx'> #define MTR3		0x8C</div><div class='ctx'> </div><div class='ctx'> #define NUM_MTRS		4</div><div class='del'>-#define CHANNELS_PER_BRANCH	(2)</div><div class='add'>+#define CHANNELS_PER_BRANCH	2</div><div class='add'>+#define MAX_BRANCHES		2</div><div class='ctx'> </div><div class='ctx'> /* Defines to extract the vaious fields from the</div><div class='ctx'>  *	MTRx - Memory Technology Registers</div><div class='hunk'>@@ -473,7 +474,6 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 	char msg[EDAC_MC_LABEL_LEN + 1 + 160];</div><div class='ctx'> 	char *specific = NULL;</div><div class='ctx'> 	u32 allErrors;</div><div class='del'>-	int branch;</div><div class='ctx'> 	int channel;</div><div class='ctx'> 	int bank;</div><div class='ctx'> 	int rank;</div><div class='hunk'>@@ -485,8 +485,7 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 	if (!allErrors)</div><div class='ctx'> 		return;		/* if no error, return now */</div><div class='ctx'> </div><div class='del'>-	branch = EXTRACT_FBDCHAN_INDX(info-&gt;ferr_fat_fbd);</div><div class='del'>-	channel = branch;</div><div class='add'>+	channel = EXTRACT_FBDCHAN_INDX(info-&gt;ferr_fat_fbd);</div><div class='ctx'> </div><div class='ctx'> 	/* Use the NON-Recoverable macros to extract data */</div><div class='ctx'> 	bank = NREC_BANK(info-&gt;nrecmema);</div><div class='hunk'>@@ -495,9 +494,9 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 	ras = NREC_RAS(info-&gt;nrecmemb);</div><div class='ctx'> 	cas = NREC_CAS(info-&gt;nrecmemb);</div><div class='ctx'> </div><div class='del'>-	debugf0("\t\tCSROW= %d  Channels= %d,%d  (Branch= %d "</div><div class='del'>-		"DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",</div><div class='del'>-		rank, channel, channel + 1, branch &gt;&gt; 1, bank,</div><div class='add'>+	debugf0("\t\tCSROW= %d  Channel= %d "</div><div class='add'>+		"(DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",</div><div class='add'>+		rank, channel, bank,</div><div class='ctx'> 		rdwr ? "Write" : "Read", ras, cas);</div><div class='ctx'> </div><div class='ctx'> 	/* Only 1 bit will be on */</div><div class='hunk'>@@ -533,13 +532,14 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 	/* Form out message */</div><div class='ctx'> 	snprintf(msg, sizeof(msg),</div><div class='del'>-		 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d CAS=%d "</div><div class='del'>-		 "FATAL Err=0x%x (%s))",</div><div class='del'>-		 branch &gt;&gt; 1, bank, rdwr ? "Write" : "Read", ras, cas,</div><div class='del'>-		 allErrors, specific);</div><div class='add'>+		 "Bank=%d RAS=%d CAS=%d FATAL Err=0x%x (%s)",</div><div class='add'>+		 bank, ras, cas, allErrors, specific);</div><div class='ctx'> </div><div class='ctx'> 	/* Call the helper to output message */</div><div class='del'>-	edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg);</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 0, 0, 0,</div><div class='add'>+			     channel &gt;&gt; 1, channel &amp; 1, rank,</div><div class='add'>+			     rdwr ? "Write error" : "Read error",</div><div class='add'>+			     msg, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -633,13 +633,14 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 		/* Form out message */</div><div class='ctx'> 		snprintf(msg, sizeof(msg),</div><div class='del'>-			 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d "</div><div class='del'>-			 "CAS=%d, UE Err=0x%x (%s))",</div><div class='del'>-			 branch &gt;&gt; 1, bank, rdwr ? "Write" : "Read", ras, cas,</div><div class='del'>-			 ue_errors, specific);</div><div class='add'>+			 "Rank=%d Bank=%d RAS=%d CAS=%d, UE Err=0x%x (%s)",</div><div class='add'>+			 rank, bank, ras, cas, ue_errors, specific);</div><div class='ctx'> </div><div class='ctx'> 		/* Call the helper to output message */</div><div class='del'>-		edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,</div><div class='add'>+				channel &gt;&gt; 1, -1, rank,</div><div class='add'>+				rdwr ? "Write error" : "Read error",</div><div class='add'>+				msg, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check correctable errors */</div><div class='hunk'>@@ -685,13 +686,16 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 		/* Form out message */</div><div class='ctx'> 		snprintf(msg, sizeof(msg),</div><div class='del'>-			 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d "</div><div class='add'>+			 "Rank=%d Bank=%d RDWR=%s RAS=%d "</div><div class='ctx'> 			 "CAS=%d, CE Err=0x%x (%s))", branch &gt;&gt; 1, bank,</div><div class='ctx'> 			 rdwr ? "Write" : "Read", ras, cas, ce_errors,</div><div class='ctx'> 			 specific);</div><div class='ctx'> </div><div class='ctx'> 		/* Call the helper to output message */</div><div class='del'>-		edac_mc_handle_fbd_ce(mci, rank, channel, msg);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,</div><div class='add'>+				channel &gt;&gt; 1, channel % 2, rank,</div><div class='add'>+				rdwr ? "Write error" : "Read error",</div><div class='add'>+				msg, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!misc_messages)</div><div class='hunk'>@@ -731,11 +735,12 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 		/* Form out message */</div><div class='ctx'> 		snprintf(msg, sizeof(msg),</div><div class='del'>-			 "(Branch=%d Err=%#x (%s))", branch &gt;&gt; 1,</div><div class='del'>-			 misc_errors, specific);</div><div class='add'>+			 "Err=%#x (%s)", misc_errors, specific);</div><div class='ctx'> </div><div class='ctx'> 		/* Call the helper to output message */</div><div class='del'>-		edac_mc_handle_fbd_ce(mci, 0, 0, msg);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,</div><div class='add'>+				branch &gt;&gt; 1, -1, -1,</div><div class='add'>+				"Misc error", msg, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -956,14 +961,14 @@ static int determine_amb_present_reg(struct i5000_pvt *pvt, int channel)</div><div class='ctx'>  *</div><div class='ctx'>  *	return the proper MTR register as determine by the csrow and channel desired</div><div class='ctx'>  */</div><div class='del'>-static int determine_mtr(struct i5000_pvt *pvt, int csrow, int channel)</div><div class='add'>+static int determine_mtr(struct i5000_pvt *pvt, int slot, int channel)</div><div class='ctx'> {</div><div class='ctx'> 	int mtr;</div><div class='ctx'> </div><div class='ctx'> 	if (channel &lt; CHANNELS_PER_BRANCH)</div><div class='del'>-		mtr = pvt-&gt;b0_mtr[csrow &gt;&gt; 1];</div><div class='add'>+		mtr = pvt-&gt;b0_mtr[slot];</div><div class='ctx'> 	else</div><div class='del'>-		mtr = pvt-&gt;b1_mtr[csrow &gt;&gt; 1];</div><div class='add'>+		mtr = pvt-&gt;b1_mtr[slot];</div><div class='ctx'> </div><div class='ctx'> 	return mtr;</div><div class='ctx'> }</div><div class='hunk'>@@ -988,37 +993,34 @@ static void decode_mtr(int slot_row, u16 mtr)</div><div class='ctx'> 	debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void handle_channel(struct i5000_pvt *pvt, int csrow, int channel,</div><div class='add'>+static void handle_channel(struct i5000_pvt *pvt, int slot, int channel,</div><div class='ctx'> 			struct i5000_dimm_info *dinfo)</div><div class='ctx'> {</div><div class='ctx'> 	int mtr;</div><div class='ctx'> 	int amb_present_reg;</div><div class='ctx'> 	int addrBits;</div><div class='ctx'> </div><div class='del'>-	mtr = determine_mtr(pvt, csrow, channel);</div><div class='add'>+	mtr = determine_mtr(pvt, slot, channel);</div><div class='ctx'> 	if (MTR_DIMMS_PRESENT(mtr)) {</div><div class='ctx'> 		amb_present_reg = determine_amb_present_reg(pvt, channel);</div><div class='ctx'> </div><div class='del'>-		/* Determine if there is  a  DIMM present in this DIMM slot */</div><div class='del'>-		if (amb_present_reg &amp; (1 &lt;&lt; (csrow &gt;&gt; 1))) {</div><div class='add'>+		/* Determine if there is a DIMM present in this DIMM slot */</div><div class='add'>+		if (amb_present_reg) {</div><div class='ctx'> 			dinfo-&gt;dual_rank = MTR_DIMM_RANK(mtr);</div><div class='ctx'> </div><div class='del'>-			if (!((dinfo-&gt;dual_rank == 0) &amp;&amp;</div><div class='del'>-				((csrow &amp; 0x1) == 0x1))) {</div><div class='del'>-				/* Start with the number of bits for a Bank</div><div class='del'>-				 * on the DRAM */</div><div class='del'>-				addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr);</div><div class='del'>-				/* Add thenumber of ROW bits */</div><div class='del'>-				addrBits += MTR_DIMM_ROWS_ADDR_BITS(mtr);</div><div class='del'>-				/* add the number of COLUMN bits */</div><div class='del'>-				addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr);</div><div class='del'>-</div><div class='del'>-				addrBits += 6;	/* add 64 bits per DIMM */</div><div class='del'>-				addrBits -= 20;	/* divide by 2^^20 */</div><div class='del'>-				addrBits -= 3;	/* 8 bits per bytes */</div><div class='del'>-</div><div class='del'>-				dinfo-&gt;megabytes = 1 &lt;&lt; addrBits;</div><div class='del'>-			}</div><div class='add'>+			/* Start with the number of bits for a Bank</div><div class='add'>+				* on the DRAM */</div><div class='add'>+			addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr);</div><div class='add'>+			/* Add the number of ROW bits */</div><div class='add'>+			addrBits += MTR_DIMM_ROWS_ADDR_BITS(mtr);</div><div class='add'>+			/* add the number of COLUMN bits */</div><div class='add'>+			addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr);</div><div class='add'>+</div><div class='add'>+			addrBits += 6;	/* add 64 bits per DIMM */</div><div class='add'>+			addrBits -= 20;	/* divide by 2^^20 */</div><div class='add'>+			addrBits -= 3;	/* 8 bits per bytes */</div><div class='add'>+</div><div class='add'>+			dinfo-&gt;megabytes = 1 &lt;&lt; addrBits;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1032,10 +1034,9 @@ static void handle_channel(struct i5000_pvt *pvt, int csrow, int channel,</div><div class='ctx'> static void calculate_dimm_size(struct i5000_pvt *pvt)</div><div class='ctx'> {</div><div class='ctx'> 	struct i5000_dimm_info *dinfo;</div><div class='del'>-	int csrow, max_csrows;</div><div class='add'>+	int slot, channel, branch;</div><div class='ctx'> 	char *p, *mem_buffer;</div><div class='ctx'> 	int space, n;</div><div class='del'>-	int channel;</div><div class='ctx'> </div><div class='ctx'> 	/* ================= Generate some debug output ================= */</div><div class='ctx'> 	space = PAGE_SIZE;</div><div class='hunk'>@@ -1046,22 +1047,17 @@ static void calculate_dimm_size(struct i5000_pvt *pvt)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	n = snprintf(p, space, "\n");</div><div class='del'>-	p += n;</div><div class='del'>-	space -= n;</div><div class='del'>-</div><div class='del'>-	/* Scan all the actual CSROWS (which is # of DIMMS * 2)</div><div class='add'>+	/* Scan all the actual slots</div><div class='ctx'> 	 * and calculate the information for each DIMM</div><div class='del'>-	 * Start with the highest csrow first, to display it first</div><div class='del'>-	 * and work toward the 0th csrow</div><div class='add'>+	 * Start with the highest slot first, to display it first</div><div class='add'>+	 * and work toward the 0th slot</div><div class='ctx'> 	 */</div><div class='del'>-	max_csrows = pvt-&gt;maxdimmperch * 2;</div><div class='del'>-	for (csrow = max_csrows - 1; csrow &gt;= 0; csrow--) {</div><div class='add'>+	for (slot = pvt-&gt;maxdimmperch - 1; slot &gt;= 0; slot--) {</div><div class='ctx'> </div><div class='del'>-		/* on an odd csrow, first output a 'boundary' marker,</div><div class='add'>+		/* on an odd slot, first output a 'boundary' marker,</div><div class='ctx'> 		 * then reset the message buffer  */</div><div class='del'>-		if (csrow &amp; 0x1) {</div><div class='del'>-			n = snprintf(p, space, "---------------------------"</div><div class='add'>+		if (slot &amp; 0x1) {</div><div class='add'>+			n = snprintf(p, space, "--------------------------"</div><div class='ctx'> 				"--------------------------------");</div><div class='ctx'> 			p += n;</div><div class='ctx'> 			space -= n;</div><div class='hunk'>@@ -1069,30 +1065,39 @@ static void calculate_dimm_size(struct i5000_pvt *pvt)</div><div class='ctx'> 			p = mem_buffer;</div><div class='ctx'> 			space = PAGE_SIZE;</div><div class='ctx'> 		}</div><div class='del'>-		n = snprintf(p, space, "csrow %2d    ", csrow);</div><div class='add'>+		n = snprintf(p, space, "slot %2d    ", slot);</div><div class='ctx'> 		p += n;</div><div class='ctx'> 		space -= n;</div><div class='ctx'> </div><div class='ctx'> 		for (channel = 0; channel &lt; pvt-&gt;maxch; channel++) {</div><div class='del'>-			dinfo = &amp;pvt-&gt;dimm_info[csrow][channel];</div><div class='del'>-			handle_channel(pvt, csrow, channel, dinfo);</div><div class='del'>-			n = snprintf(p, space, "%4d MB   | ", dinfo-&gt;megabytes);</div><div class='add'>+			dinfo = &amp;pvt-&gt;dimm_info[slot][channel];</div><div class='add'>+			handle_channel(pvt, slot, channel, dinfo);</div><div class='add'>+			if (dinfo-&gt;megabytes)</div><div class='add'>+				n = snprintf(p, space, "%4d MB %dR| ",</div><div class='add'>+					     dinfo-&gt;megabytes, dinfo-&gt;dual_rank + 1);</div><div class='add'>+			else</div><div class='add'>+				n = snprintf(p, space, "%4d MB   | ", 0);</div><div class='ctx'> 			p += n;</div><div class='ctx'> 			space -= n;</div><div class='ctx'> 		}</div><div class='del'>-		n = snprintf(p, space, "\n");</div><div class='ctx'> 		p += n;</div><div class='ctx'> 		space -= n;</div><div class='add'>+		debugf2("%s\n", mem_buffer);</div><div class='add'>+		p = mem_buffer;</div><div class='add'>+		space = PAGE_SIZE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Output the last bottom 'boundary' marker */</div><div class='del'>-	n = snprintf(p, space, "---------------------------"</div><div class='del'>-		"--------------------------------\n");</div><div class='add'>+	n = snprintf(p, space, "--------------------------"</div><div class='add'>+		"--------------------------------");</div><div class='ctx'> 	p += n;</div><div class='ctx'> 	space -= n;</div><div class='add'>+	debugf2("%s\n", mem_buffer);</div><div class='add'>+	p = mem_buffer;</div><div class='add'>+	space = PAGE_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	/* now output the 'channel' labels */</div><div class='del'>-	n = snprintf(p, space, "            ");</div><div class='add'>+	n = snprintf(p, space, "           ");</div><div class='ctx'> 	p += n;</div><div class='ctx'> 	space -= n;</div><div class='ctx'> 	for (channel = 0; channel &lt; pvt-&gt;maxch; channel++) {</div><div class='hunk'>@@ -1100,9 +1105,17 @@ static void calculate_dimm_size(struct i5000_pvt *pvt)</div><div class='ctx'> 		p += n;</div><div class='ctx'> 		space -= n;</div><div class='ctx'> 	}</div><div class='del'>-	n = snprintf(p, space, "\n");</div><div class='add'>+	debugf2("%s\n", mem_buffer);</div><div class='add'>+	p = mem_buffer;</div><div class='add'>+	space = PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	n = snprintf(p, space, "           ");</div><div class='ctx'> 	p += n;</div><div class='del'>-	space -= n;</div><div class='add'>+	for (branch = 0; branch &lt; MAX_BRANCHES; branch++) {</div><div class='add'>+		n = snprintf(p, space, "       branch %d       | ", branch);</div><div class='add'>+		p += n;</div><div class='add'>+		space -= n;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* output the last message and free buffer */</div><div class='ctx'> 	debugf2("%s\n", mem_buffer);</div><div class='hunk'>@@ -1235,13 +1248,13 @@ static void i5000_get_mc_regs(struct mem_ctl_info *mci)</div><div class='ctx'> static int i5000_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='ctx'> 	struct i5000_pvt *pvt;</div><div class='del'>-	struct csrow_info *p_csrow;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='ctx'> 	int empty, channel_count;</div><div class='ctx'> 	int max_csrows;</div><div class='del'>-	int mtr, mtr1;</div><div class='add'>+	int mtr;</div><div class='ctx'> 	int csrow_megs;</div><div class='ctx'> 	int channel;</div><div class='del'>-	int csrow;</div><div class='add'>+	int slot;</div><div class='ctx'> </div><div class='ctx'> 	pvt = mci-&gt;pvt_info;</div><div class='ctx'> </div><div class='hunk'>@@ -1250,43 +1263,40 @@ static int i5000_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> </div><div class='ctx'> 	empty = 1;		/* Assume NO memory */</div><div class='ctx'> </div><div class='del'>-	for (csrow = 0; csrow &lt; max_csrows; csrow++) {</div><div class='del'>-		p_csrow = &amp;mci-&gt;csrows[csrow];</div><div class='del'>-</div><div class='del'>-		p_csrow-&gt;csrow_idx = csrow;</div><div class='del'>-</div><div class='del'>-		/* use branch 0 for the basis */</div><div class='del'>-		mtr = pvt-&gt;b0_mtr[csrow &gt;&gt; 1];</div><div class='del'>-		mtr1 = pvt-&gt;b1_mtr[csrow &gt;&gt; 1];</div><div class='del'>-</div><div class='del'>-		/* if no DIMMS on this row, continue */</div><div class='del'>-		if (!MTR_DIMMS_PRESENT(mtr) &amp;&amp; !MTR_DIMMS_PRESENT(mtr1))</div><div class='del'>-			continue;</div><div class='add'>+	/*</div><div class='add'>+	 * FIXME: The memory layout used to map slot/channel into the</div><div class='add'>+	 * real memory architecture is weird: branch+slot are "csrows"</div><div class='add'>+	 * and channel is channel. That required an extra array (dimm_info)</div><div class='add'>+	 * to map the dimms. A good cleanup would be to remove this array,</div><div class='add'>+	 * and do a loop here with branch, channel, slot</div><div class='add'>+	 */</div><div class='add'>+	for (slot = 0; slot &lt; max_csrows; slot++) {</div><div class='add'>+		for (channel = 0; channel &lt; pvt-&gt;maxch; channel++) {</div><div class='ctx'> </div><div class='del'>-		/* FAKE OUT VALUES, FIXME */</div><div class='del'>-		p_csrow-&gt;first_page = 0 + csrow * 20;</div><div class='del'>-		p_csrow-&gt;last_page = 9 + csrow * 20;</div><div class='del'>-		p_csrow-&gt;page_mask = 0xFFF;</div><div class='add'>+			mtr = determine_mtr(pvt, slot, channel);</div><div class='ctx'> </div><div class='del'>-		p_csrow-&gt;grain = 8;</div><div class='add'>+			if (!MTR_DIMMS_PRESENT(mtr))</div><div class='add'>+				continue;</div><div class='ctx'> </div><div class='del'>-		csrow_megs = 0;</div><div class='del'>-		for (channel = 0; channel &lt; pvt-&gt;maxch; channel++) {</div><div class='del'>-			csrow_megs += pvt-&gt;dimm_info[csrow][channel].megabytes;</div><div class='del'>-		}</div><div class='add'>+			dimm = EDAC_DIMM_PTR(mci-&gt;layers, mci-&gt;dimms, mci-&gt;n_layers,</div><div class='add'>+				       channel / MAX_BRANCHES,</div><div class='add'>+				       channel % MAX_BRANCHES, slot);</div><div class='ctx'> </div><div class='del'>-		p_csrow-&gt;nr_pages = csrow_megs &lt;&lt; 8;</div><div class='add'>+			csrow_megs = pvt-&gt;dimm_info[slot][channel].megabytes;</div><div class='add'>+			dimm-&gt;grain = 8;</div><div class='ctx'> </div><div class='del'>-		/* Assume DDR2 for now */</div><div class='del'>-		p_csrow-&gt;mtype = MEM_FB_DDR2;</div><div class='add'>+			/* Assume DDR2 for now */</div><div class='add'>+			dimm-&gt;mtype = MEM_FB_DDR2;</div><div class='ctx'> </div><div class='del'>-		/* ask what device type on this row */</div><div class='del'>-		if (MTR_DRAM_WIDTH(mtr))</div><div class='del'>-			p_csrow-&gt;dtype = DEV_X8;</div><div class='del'>-		else</div><div class='del'>-			p_csrow-&gt;dtype = DEV_X4;</div><div class='add'>+			/* ask what device type on this row */</div><div class='add'>+			if (MTR_DRAM_WIDTH(mtr))</div><div class='add'>+				dimm-&gt;dtype = DEV_X8;</div><div class='add'>+			else</div><div class='add'>+				dimm-&gt;dtype = DEV_X4;</div><div class='ctx'> </div><div class='del'>-		p_csrow-&gt;edac_mode = EDAC_S8ECD8ED;</div><div class='add'>+			dimm-&gt;edac_mode = EDAC_S8ECD8ED;</div><div class='add'>+			dimm-&gt;nr_pages = csrow_megs &lt;&lt; 8;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		empty = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1317,7 +1327,7 @@ static void i5000_enable_error_reporting(struct mem_ctl_info *mci)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * i5000_get_dimm_and_channel_counts(pdev, &amp;num_csrows, &amp;num_channels)</div><div class='add'>+ * i5000_get_dimm_and_channel_counts(pdev, &amp;nr_csrows, &amp;num_channels)</div><div class='ctx'>  *</div><div class='ctx'>  *	ask the device how many channels are present and how many CSROWS</div><div class='ctx'>  *	 as well</div><div class='hunk'>@@ -1332,7 +1342,7 @@ static void i5000_get_dimm_and_channel_counts(struct pci_dev *pdev,</div><div class='ctx'> 	 * supported on this memory controller</div><div class='ctx'> 	 */</div><div class='ctx'> 	pci_read_config_byte(pdev, MAXDIMMPERCH, &amp;value);</div><div class='del'>-	*num_dimms_per_channel = (int)value *2;</div><div class='add'>+	*num_dimms_per_channel = (int)value;</div><div class='ctx'> </div><div class='ctx'> 	pci_read_config_byte(pdev, MAXCH, &amp;value);</div><div class='ctx'> 	*num_channels = (int)value;</div><div class='hunk'>@@ -1348,10 +1358,10 @@ static void i5000_get_dimm_and_channel_counts(struct pci_dev *pdev,</div><div class='ctx'> static int i5000_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[3];</div><div class='ctx'> 	struct i5000_pvt *pvt;</div><div class='ctx'> 	int num_channels;</div><div class='ctx'> 	int num_dimms_per_channel;</div><div class='del'>-	int num_csrows;</div><div class='ctx'> </div><div class='ctx'> 	debugf0("MC: %s: %s(), pdev bus %u dev=0x%x fn=0x%x\n",</div><div class='ctx'> 		__FILE__, __func__,</div><div class='hunk'>@@ -1377,14 +1387,22 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	 */</div><div class='ctx'> 	i5000_get_dimm_and_channel_counts(pdev, &amp;num_dimms_per_channel,</div><div class='ctx'> 					&amp;num_channels);</div><div class='del'>-	num_csrows = num_dimms_per_channel * 2;</div><div class='ctx'> </div><div class='del'>-	debugf0("MC: %s(): Number of - Channels= %d  DIMMS= %d  CSROWS= %d\n",</div><div class='del'>-		__func__, num_channels, num_dimms_per_channel, num_csrows);</div><div class='add'>+	debugf0("MC: %s(): Number of Branches=2 Channels= %d  DIMMS= %d\n",</div><div class='add'>+		__func__, num_channels, num_dimms_per_channel);</div><div class='ctx'> </div><div class='ctx'> 	/* allocate a new MC control structure */</div><div class='del'>-	mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0);</div><div class='ctx'> </div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_BRANCH;</div><div class='add'>+	layers[0].size = MAX_BRANCHES;</div><div class='add'>+	layers[0].is_virt_csrow = false;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = num_channels / MAX_BRANCHES;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	layers[2].type = EDAC_MC_LAYER_SLOT;</div><div class='add'>+	layers[2].size = num_dimms_per_channel;</div><div class='add'>+	layers[2].is_virt_csrow = true;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));</div><div class='ctx'> 	if (mci == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c<br/>index d500749464ea..e9e7c2a29dc3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/i5100_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/i5100_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/i5100_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i5100_edac.c</a></div><div class='hunk'>@@ -14,6 +14,11 @@</div><div class='ctx'>  * rows for each respective channel are laid out one after another,</div><div class='ctx'>  * the first half belonging to channel 0, the second half belonging</div><div class='ctx'>  * to channel 1.</div><div class='add'>+ *</div><div class='add'>+ * This driver is for DDR2 DIMMs, and it uses chip select to select among the</div><div class='add'>+ * several ranks. However, instead of showing memories as ranks, it outputs</div><div class='add'>+ * them as DIMM's. An internal table creates the association between ranks</div><div class='add'>+ * and DIMM's.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -410,14 +415,6 @@ static int i5100_csrow_to_chan(const struct mem_ctl_info *mci, int csrow)</div><div class='ctx'> 	return csrow / priv-&gt;ranksperchan;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned i5100_rank_to_csrow(const struct mem_ctl_info *mci,</div><div class='del'>-				    int chan, int rank)</div><div class='del'>-{</div><div class='del'>-	const struct i5100_priv *priv = mci-&gt;pvt_info;</div><div class='del'>-</div><div class='del'>-	return chan * priv-&gt;ranksperchan + rank;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void i5100_handle_ce(struct mem_ctl_info *mci,</div><div class='ctx'> 			    int chan,</div><div class='ctx'> 			    unsigned bank,</div><div class='hunk'>@@ -427,17 +424,17 @@ static void i5100_handle_ce(struct mem_ctl_info *mci,</div><div class='ctx'> 			    unsigned ras,</div><div class='ctx'> 			    const char *msg)</div><div class='ctx'> {</div><div class='del'>-	const int csrow = i5100_rank_to_csrow(mci, chan, rank);</div><div class='add'>+	char detail[80];</div><div class='ctx'> </div><div class='del'>-	printk(KERN_ERR</div><div class='del'>-		"CE chan %d, bank %u, rank %u, syndrome 0x%lx, "</div><div class='del'>-		"cas %u, ras %u, csrow %u, label \"%s\": %s\n",</div><div class='del'>-		chan, bank, rank, syndrome, cas, ras,</div><div class='del'>-		csrow, mci-&gt;csrows[csrow].channels[0].label, msg);</div><div class='add'>+	/* Form out message */</div><div class='add'>+	snprintf(detail, sizeof(detail),</div><div class='add'>+		 "bank %u, cas %u, ras %u\n",</div><div class='add'>+		 bank, cas, ras);</div><div class='ctx'> </div><div class='del'>-	mci-&gt;ce_count++;</div><div class='del'>-	mci-&gt;csrows[csrow].ce_count++;</div><div class='del'>-	mci-&gt;csrows[csrow].channels[0].ce_count++;</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+			     0, 0, syndrome,</div><div class='add'>+			     chan, rank, -1,</div><div class='add'>+			     msg, detail, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void i5100_handle_ue(struct mem_ctl_info *mci,</div><div class='hunk'>@@ -449,16 +446,17 @@ static void i5100_handle_ue(struct mem_ctl_info *mci,</div><div class='ctx'> 			    unsigned ras,</div><div class='ctx'> 			    const char *msg)</div><div class='ctx'> {</div><div class='del'>-	const int csrow = i5100_rank_to_csrow(mci, chan, rank);</div><div class='add'>+	char detail[80];</div><div class='ctx'> </div><div class='del'>-	printk(KERN_ERR</div><div class='del'>-		"UE chan %d, bank %u, rank %u, syndrome 0x%lx, "</div><div class='del'>-		"cas %u, ras %u, csrow %u, label \"%s\": %s\n",</div><div class='del'>-		chan, bank, rank, syndrome, cas, ras,</div><div class='del'>-		csrow, mci-&gt;csrows[csrow].channels[0].label, msg);</div><div class='add'>+	/* Form out message */</div><div class='add'>+	snprintf(detail, sizeof(detail),</div><div class='add'>+		 "bank %u, cas %u, ras %u\n",</div><div class='add'>+		 bank, cas, ras);</div><div class='ctx'> </div><div class='del'>-	mci-&gt;ue_count++;</div><div class='del'>-	mci-&gt;csrows[csrow].ue_count++;</div><div class='add'>+	edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+			     0, 0, syndrome,</div><div class='add'>+			     chan, rank, -1,</div><div class='add'>+			     msg, detail, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void i5100_read_log(struct mem_ctl_info *mci, int chan,</div><div class='hunk'>@@ -835,10 +833,10 @@ static void __devinit i5100_init_interleaving(struct pci_dev *pdev,</div><div class='ctx'> static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	unsigned long total_pages = 0UL;</div><div class='ctx'> 	struct i5100_priv *priv = mci-&gt;pvt_info;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; mci-&gt;nr_csrows; i++) {</div><div class='add'>+	for (i = 0; i &lt; mci-&gt;tot_dimms; i++) {</div><div class='add'>+		struct dimm_info *dimm;</div><div class='ctx'> 		const unsigned long npages = i5100_npages(mci, i);</div><div class='ctx'> 		const unsigned chan = i5100_csrow_to_chan(mci, i);</div><div class='ctx'> 		const unsigned rank = i5100_csrow_to_rank(mci, i);</div><div class='hunk'>@@ -846,33 +844,23 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> 		if (!npages)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * FIXME: these two are totally bogus -- I don't see how to</div><div class='del'>-		 * map them correctly to this structure...</div><div class='del'>-		 */</div><div class='del'>-		mci-&gt;csrows[i].first_page = total_pages;</div><div class='del'>-		mci-&gt;csrows[i].last_page = total_pages + npages - 1;</div><div class='del'>-		mci-&gt;csrows[i].page_mask = 0UL;</div><div class='del'>-</div><div class='del'>-		mci-&gt;csrows[i].nr_pages = npages;</div><div class='del'>-		mci-&gt;csrows[i].grain = 32;</div><div class='del'>-		mci-&gt;csrows[i].csrow_idx = i;</div><div class='del'>-		mci-&gt;csrows[i].dtype =</div><div class='del'>-			(priv-&gt;mtr[chan][rank].width == 4) ? DEV_X4 : DEV_X8;</div><div class='del'>-		mci-&gt;csrows[i].ue_count = 0;</div><div class='del'>-		mci-&gt;csrows[i].ce_count = 0;</div><div class='del'>-		mci-&gt;csrows[i].mtype = MEM_RDDR2;</div><div class='del'>-		mci-&gt;csrows[i].edac_mode = EDAC_SECDED;</div><div class='del'>-		mci-&gt;csrows[i].mci = mci;</div><div class='del'>-		mci-&gt;csrows[i].nr_channels = 1;</div><div class='del'>-		mci-&gt;csrows[i].channels[0].chan_idx = 0;</div><div class='del'>-		mci-&gt;csrows[i].channels[0].ce_count = 0;</div><div class='del'>-		mci-&gt;csrows[i].channels[0].csrow = mci-&gt;csrows + i;</div><div class='del'>-		snprintf(mci-&gt;csrows[i].channels[0].label,</div><div class='del'>-			 sizeof(mci-&gt;csrows[i].channels[0].label),</div><div class='del'>-			 "DIMM%u", i5100_rank_to_slot(mci, chan, rank));</div><div class='del'>-</div><div class='del'>-		total_pages += npages;</div><div class='add'>+		dimm = EDAC_DIMM_PTR(mci-&gt;layers, mci-&gt;dimms, mci-&gt;n_layers,</div><div class='add'>+			       chan, rank, 0);</div><div class='add'>+</div><div class='add'>+		dimm-&gt;nr_pages = npages;</div><div class='add'>+		if (npages) {</div><div class='add'>+			dimm-&gt;grain = 32;</div><div class='add'>+			dimm-&gt;dtype = (priv-&gt;mtr[chan][rank].width == 4) ?</div><div class='add'>+					DEV_X4 : DEV_X8;</div><div class='add'>+			dimm-&gt;mtype = MEM_RDDR2;</div><div class='add'>+			dimm-&gt;edac_mode = EDAC_SECDED;</div><div class='add'>+			snprintf(dimm-&gt;label, sizeof(dimm-&gt;label),</div><div class='add'>+				"DIMM%u",</div><div class='add'>+				i5100_rank_to_slot(mci, chan, rank));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		debugf2("dimm channel %d, rank %d, size %ld\n",</div><div class='add'>+			chan, rank, (long)PAGES_TO_MiB(npages));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -881,6 +869,7 @@ static int __devinit i5100_init_one(struct pci_dev *pdev,</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	struct i5100_priv *priv;</div><div class='ctx'> 	struct pci_dev *ch0mm, *ch1mm;</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -941,7 +930,14 @@ static int __devinit i5100_init_one(struct pci_dev *pdev,</div><div class='ctx'> 		goto bail_ch1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mci = edac_mc_alloc(sizeof(*priv), ranksperch * 2, 1, 0);</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[0].size = 2;</div><div class='add'>+	layers[0].is_virt_csrow = false;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_SLOT;</div><div class='add'>+	layers[1].size = ranksperch;</div><div class='add'>+	layers[1].is_virt_csrow = true;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers,</div><div class='add'>+			    sizeof(*priv));</div><div class='ctx'> 	if (!mci) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto bail_disable_ch1;</div><div class='head'>diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c<br/>index 1869a1018fb5..6640c29e1885 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/i5400_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/i5400_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/i5400_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i5400_edac.c</a></div><div class='hunk'>@@ -18,6 +18,10 @@</div><div class='ctx'>  * Intel 5400 Chipset Memory Controller Hub (MCH) - Datasheet</div><div class='ctx'>  * 	http://developer.intel.com/design/chipsets/datashts/313070.htm</div><div class='ctx'>  *</div><div class='add'>+ * This Memory Controller manages DDR2 FB-DIMMs. It has 2 branches, each with</div><div class='add'>+ * 2 channels operating in lockstep no-mirror mode. Each channel can have up to</div><div class='add'>+ * 4 dimm's, each with up to 8GB.</div><div class='add'>+ *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -44,12 +48,10 @@</div><div class='ctx'> 	edac_mc_chipset_printk(mci, level, "i5400", fmt, ##arg)</div><div class='ctx'> </div><div class='ctx'> /* Limits for i5400 */</div><div class='del'>-#define NUM_MTRS_PER_BRANCH	4</div><div class='add'>+#define MAX_BRANCHES		2</div><div class='ctx'> #define CHANNELS_PER_BRANCH	2</div><div class='del'>-#define MAX_DIMMS_PER_CHANNEL	NUM_MTRS_PER_BRANCH</div><div class='del'>-#define	MAX_CHANNELS		4</div><div class='del'>-/* max possible csrows per channel */</div><div class='del'>-#define MAX_CSROWS		(MAX_DIMMS_PER_CHANNEL)</div><div class='add'>+#define DIMMS_PER_CHANNEL	4</div><div class='add'>+#define	MAX_CHANNELS		(MAX_BRANCHES * CHANNELS_PER_BRANCH)</div><div class='ctx'> </div><div class='ctx'> /* Device 16,</div><div class='ctx'>  * Function 0: System Address</div><div class='hunk'>@@ -347,16 +349,16 @@ struct i5400_pvt {</div><div class='ctx'> </div><div class='ctx'> 	u16 mir0, mir1;</div><div class='ctx'> </div><div class='del'>-	u16 b0_mtr[NUM_MTRS_PER_BRANCH];	/* Memory Technlogy Reg */</div><div class='add'>+	u16 b0_mtr[DIMMS_PER_CHANNEL];	/* Memory Technlogy Reg */</div><div class='ctx'> 	u16 b0_ambpresent0;			/* Branch 0, Channel 0 */</div><div class='ctx'> 	u16 b0_ambpresent1;			/* Brnach 0, Channel 1 */</div><div class='ctx'> </div><div class='del'>-	u16 b1_mtr[NUM_MTRS_PER_BRANCH];	/* Memory Technlogy Reg */</div><div class='add'>+	u16 b1_mtr[DIMMS_PER_CHANNEL];	/* Memory Technlogy Reg */</div><div class='ctx'> 	u16 b1_ambpresent0;			/* Branch 1, Channel 8 */</div><div class='ctx'> 	u16 b1_ambpresent1;			/* Branch 1, Channel 1 */</div><div class='ctx'> </div><div class='ctx'> 	/* DIMM information matrix, allocating architecture maximums */</div><div class='del'>-	struct i5400_dimm_info dimm_info[MAX_CSROWS][MAX_CHANNELS];</div><div class='add'>+	struct i5400_dimm_info dimm_info[DIMMS_PER_CHANNEL][MAX_CHANNELS];</div><div class='ctx'> </div><div class='ctx'> 	/* Actual values for this controller */</div><div class='ctx'> 	int maxch;				/* Max channels */</div><div class='hunk'>@@ -532,13 +534,15 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci,</div><div class='ctx'> 	int ras, cas;</div><div class='ctx'> 	int errnum;</div><div class='ctx'> 	char *type = NULL;</div><div class='add'>+	enum hw_event_mc_err_type tp_event = HW_EVENT_ERR_UNCORRECTED;</div><div class='ctx'> </div><div class='ctx'> 	if (!allErrors)</div><div class='ctx'> 		return;		/* if no error, return now */</div><div class='ctx'> </div><div class='del'>-	if (allErrors &amp;  ERROR_FAT_MASK)</div><div class='add'>+	if (allErrors &amp;  ERROR_FAT_MASK) {</div><div class='ctx'> 		type = "FATAL";</div><div class='del'>-	else if (allErrors &amp; FERR_NF_UNCORRECTABLE)</div><div class='add'>+		tp_event = HW_EVENT_ERR_FATAL;</div><div class='add'>+	} else if (allErrors &amp; FERR_NF_UNCORRECTABLE)</div><div class='ctx'> 		type = "NON-FATAL uncorrected";</div><div class='ctx'> 	else</div><div class='ctx'> 		type = "NON-FATAL recoverable";</div><div class='hunk'>@@ -556,7 +560,7 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci,</div><div class='ctx'> 	ras = nrec_ras(info);</div><div class='ctx'> 	cas = nrec_cas(info);</div><div class='ctx'> </div><div class='del'>-	debugf0("\t\tCSROW= %d  Channels= %d,%d  (Branch= %d "</div><div class='add'>+	debugf0("\t\tDIMM= %d  Channels= %d,%d  (Branch= %d "</div><div class='ctx'> 		"DRAM Bank= %d Buffer ID = %d rdwr= %s ras= %d cas= %d)\n",</div><div class='ctx'> 		rank, channel, channel + 1, branch &gt;&gt; 1, bank,</div><div class='ctx'> 		buf_id, rdwr_str(rdwr), ras, cas);</div><div class='hunk'>@@ -566,13 +570,13 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 	/* Form out message */</div><div class='ctx'> 	snprintf(msg, sizeof(msg),</div><div class='del'>-		 "%s (Branch=%d DRAM-Bank=%d Buffer ID = %d RDWR=%s "</div><div class='del'>-		 "RAS=%d CAS=%d %s Err=0x%lx (%s))",</div><div class='del'>-		 type, branch &gt;&gt; 1, bank, buf_id, rdwr_str(rdwr), ras, cas,</div><div class='del'>-		 type, allErrors, error_name[errnum]);</div><div class='add'>+		 "Bank=%d Buffer ID = %d RAS=%d CAS=%d Err=0x%lx (%s)",</div><div class='add'>+		 bank, buf_id, ras, cas, allErrors, error_name[errnum]);</div><div class='ctx'> </div><div class='del'>-	/* Call the helper to output message */</div><div class='del'>-	edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg);</div><div class='add'>+	edac_mc_handle_error(tp_event, mci, 0, 0, 0,</div><div class='add'>+			     branch &gt;&gt; 1, -1, rank,</div><div class='add'>+			     rdwr ? "Write error" : "Read error",</div><div class='add'>+			     msg, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -630,7 +634,7 @@ static void i5400_process_nonfatal_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 		/* Only 1 bit will be on */</div><div class='ctx'> 		errnum = find_first_bit(&amp;allErrors, ARRAY_SIZE(error_name));</div><div class='ctx'> </div><div class='del'>-		debugf0("\t\tCSROW= %d Channel= %d  (Branch %d "</div><div class='add'>+		debugf0("\t\tDIMM= %d Channel= %d  (Branch %d "</div><div class='ctx'> 			"DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",</div><div class='ctx'> 			rank, channel, branch &gt;&gt; 1, bank,</div><div class='ctx'> 			rdwr_str(rdwr), ras, cas);</div><div class='hunk'>@@ -642,8 +646,10 @@ static void i5400_process_nonfatal_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 			 branch &gt;&gt; 1, bank, rdwr_str(rdwr), ras, cas,</div><div class='ctx'> 			 allErrors, error_name[errnum]);</div><div class='ctx'> </div><div class='del'>-		/* Call the helper to output message */</div><div class='del'>-		edac_mc_handle_fbd_ce(mci, rank, channel, msg);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,</div><div class='add'>+				     branch &gt;&gt; 1, channel % 2, rank,</div><div class='add'>+				     rdwr ? "Write error" : "Read error",</div><div class='add'>+				     msg, NULL);</div><div class='ctx'> </div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -831,8 +837,8 @@ static int i5400_get_devices(struct mem_ctl_info *mci, int dev_idx)</div><div class='ctx'> /*</div><div class='ctx'>  *	determine_amb_present</div><div class='ctx'>  *</div><div class='del'>- *		the information is contained in NUM_MTRS_PER_BRANCH different</div><div class='del'>- *		registers determining which of the NUM_MTRS_PER_BRANCH requires</div><div class='add'>+ *		the information is contained in DIMMS_PER_CHANNEL different</div><div class='add'>+ *		registers determining which of the DIMMS_PER_CHANNEL requires</div><div class='ctx'>  *              knowing which channel is in question</div><div class='ctx'>  *</div><div class='ctx'>  *	2 branches, each with 2 channels</div><div class='hunk'>@@ -861,11 +867,11 @@ static int determine_amb_present_reg(struct i5400_pvt *pvt, int channel)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * determine_mtr(pvt, csrow, channel)</div><div class='add'>+ * determine_mtr(pvt, dimm, channel)</div><div class='ctx'>  *</div><div class='del'>- * return the proper MTR register as determine by the csrow and desired channel</div><div class='add'>+ * return the proper MTR register as determine by the dimm and desired channel</div><div class='ctx'>  */</div><div class='del'>-static int determine_mtr(struct i5400_pvt *pvt, int csrow, int channel)</div><div class='add'>+static int determine_mtr(struct i5400_pvt *pvt, int dimm, int channel)</div><div class='ctx'> {</div><div class='ctx'> 	int mtr;</div><div class='ctx'> 	int n;</div><div class='hunk'>@@ -873,11 +879,11 @@ static int determine_mtr(struct i5400_pvt *pvt, int csrow, int channel)</div><div class='ctx'> 	/* There is one MTR for each slot pair of FB-DIMMs,</div><div class='ctx'> 	   Each slot pair may be at branch 0 or branch 1.</div><div class='ctx'> 	 */</div><div class='del'>-	n = csrow;</div><div class='add'>+	n = dimm;</div><div class='ctx'> </div><div class='del'>-	if (n &gt;= NUM_MTRS_PER_BRANCH) {</div><div class='del'>-		debugf0("ERROR: trying to access an invalid csrow: %d\n",</div><div class='del'>-			csrow);</div><div class='add'>+	if (n &gt;= DIMMS_PER_CHANNEL) {</div><div class='add'>+		debugf0("ERROR: trying to access an invalid dimm: %d\n",</div><div class='add'>+			dimm);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -913,19 +919,19 @@ static void decode_mtr(int slot_row, u16 mtr)</div><div class='ctx'> 	debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void handle_channel(struct i5400_pvt *pvt, int csrow, int channel,</div><div class='add'>+static void handle_channel(struct i5400_pvt *pvt, int dimm, int channel,</div><div class='ctx'> 			struct i5400_dimm_info *dinfo)</div><div class='ctx'> {</div><div class='ctx'> 	int mtr;</div><div class='ctx'> 	int amb_present_reg;</div><div class='ctx'> 	int addrBits;</div><div class='ctx'> </div><div class='del'>-	mtr = determine_mtr(pvt, csrow, channel);</div><div class='add'>+	mtr = determine_mtr(pvt, dimm, channel);</div><div class='ctx'> 	if (MTR_DIMMS_PRESENT(mtr)) {</div><div class='ctx'> 		amb_present_reg = determine_amb_present_reg(pvt, channel);</div><div class='ctx'> </div><div class='ctx'> 		/* Determine if there is a DIMM present in this DIMM slot */</div><div class='del'>-		if (amb_present_reg &amp; (1 &lt;&lt; csrow)) {</div><div class='add'>+		if (amb_present_reg &amp; (1 &lt;&lt; dimm)) {</div><div class='ctx'> 			/* Start with the number of bits for a Bank</div><div class='ctx'> 			 * on the DRAM */</div><div class='ctx'> 			addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr);</div><div class='hunk'>@@ -954,10 +960,10 @@ static void handle_channel(struct i5400_pvt *pvt, int csrow, int channel,</div><div class='ctx'> static void calculate_dimm_size(struct i5400_pvt *pvt)</div><div class='ctx'> {</div><div class='ctx'> 	struct i5400_dimm_info *dinfo;</div><div class='del'>-	int csrow, max_csrows;</div><div class='add'>+	int dimm, max_dimms;</div><div class='ctx'> 	char *p, *mem_buffer;</div><div class='ctx'> 	int space, n;</div><div class='del'>-	int channel;</div><div class='add'>+	int channel, branch;</div><div class='ctx'> </div><div class='ctx'> 	/* ================= Generate some debug output ================= */</div><div class='ctx'> 	space = PAGE_SIZE;</div><div class='hunk'>@@ -968,32 +974,32 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Scan all the actual CSROWS</div><div class='add'>+	/* Scan all the actual DIMMS</div><div class='ctx'> 	 * and calculate the information for each DIMM</div><div class='del'>-	 * Start with the highest csrow first, to display it first</div><div class='del'>-	 * and work toward the 0th csrow</div><div class='add'>+	 * Start with the highest dimm first, to display it first</div><div class='add'>+	 * and work toward the 0th dimm</div><div class='ctx'> 	 */</div><div class='del'>-	max_csrows = pvt-&gt;maxdimmperch;</div><div class='del'>-	for (csrow = max_csrows - 1; csrow &gt;= 0; csrow--) {</div><div class='add'>+	max_dimms = pvt-&gt;maxdimmperch;</div><div class='add'>+	for (dimm = max_dimms - 1; dimm &gt;= 0; dimm--) {</div><div class='ctx'> </div><div class='del'>-		/* on an odd csrow, first output a 'boundary' marker,</div><div class='add'>+		/* on an odd dimm, first output a 'boundary' marker,</div><div class='ctx'> 		 * then reset the message buffer  */</div><div class='del'>-		if (csrow &amp; 0x1) {</div><div class='add'>+		if (dimm &amp; 0x1) {</div><div class='ctx'> 			n = snprintf(p, space, "---------------------------"</div><div class='del'>-					"--------------------------------");</div><div class='add'>+					"-------------------------------");</div><div class='ctx'> 			p += n;</div><div class='ctx'> 			space -= n;</div><div class='ctx'> 			debugf2("%s\n", mem_buffer);</div><div class='ctx'> 			p = mem_buffer;</div><div class='ctx'> 			space = PAGE_SIZE;</div><div class='ctx'> 		}</div><div class='del'>-		n = snprintf(p, space, "csrow %2d    ", csrow);</div><div class='add'>+		n = snprintf(p, space, "dimm %2d    ", dimm);</div><div class='ctx'> 		p += n;</div><div class='ctx'> 		space -= n;</div><div class='ctx'> </div><div class='ctx'> 		for (channel = 0; channel &lt; pvt-&gt;maxch; channel++) {</div><div class='del'>-			dinfo = &amp;pvt-&gt;dimm_info[csrow][channel];</div><div class='del'>-			handle_channel(pvt, csrow, channel, dinfo);</div><div class='add'>+			dinfo = &amp;pvt-&gt;dimm_info[dimm][channel];</div><div class='add'>+			handle_channel(pvt, dimm, channel, dinfo);</div><div class='ctx'> 			n = snprintf(p, space, "%4d MB   | ", dinfo-&gt;megabytes);</div><div class='ctx'> 			p += n;</div><div class='ctx'> 			space -= n;</div><div class='hunk'>@@ -1005,7 +1011,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)</div><div class='ctx'> </div><div class='ctx'> 	/* Output the last bottom 'boundary' marker */</div><div class='ctx'> 	n = snprintf(p, space, "---------------------------"</div><div class='del'>-			"--------------------------------");</div><div class='add'>+			"-------------------------------");</div><div class='ctx'> 	p += n;</div><div class='ctx'> 	space -= n;</div><div class='ctx'> 	debugf2("%s\n", mem_buffer);</div><div class='hunk'>@@ -1013,7 +1019,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)</div><div class='ctx'> 	space = PAGE_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	/* now output the 'channel' labels */</div><div class='del'>-	n = snprintf(p, space, "            ");</div><div class='add'>+	n = snprintf(p, space, "           ");</div><div class='ctx'> 	p += n;</div><div class='ctx'> 	space -= n;</div><div class='ctx'> 	for (channel = 0; channel &lt; pvt-&gt;maxch; channel++) {</div><div class='hunk'>@@ -1022,6 +1028,19 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)</div><div class='ctx'> 		space -= n;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	space -= n;</div><div class='add'>+	debugf2("%s\n", mem_buffer);</div><div class='add'>+	p = mem_buffer;</div><div class='add'>+	space = PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	n = snprintf(p, space, "           ");</div><div class='add'>+	p += n;</div><div class='add'>+	for (branch = 0; branch &lt; MAX_BRANCHES; branch++) {</div><div class='add'>+		n = snprintf(p, space, "       branch %d       | ", branch);</div><div class='add'>+		p += n;</div><div class='add'>+		space -= n;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* output the last message and free buffer */</div><div class='ctx'> 	debugf2("%s\n", mem_buffer);</div><div class='ctx'> 	kfree(mem_buffer);</div><div class='hunk'>@@ -1080,7 +1099,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)</div><div class='ctx'> 	debugf2("MIR1: limit= 0x%x  WAY1= %u  WAY0= %x\n", limit, way1, way0);</div><div class='ctx'> </div><div class='ctx'> 	/* Get the set of MTR[0-3] regs by each branch */</div><div class='del'>-	for (slot_row = 0; slot_row &lt; NUM_MTRS_PER_BRANCH; slot_row++) {</div><div class='add'>+	for (slot_row = 0; slot_row &lt; DIMMS_PER_CHANNEL; slot_row++) {</div><div class='ctx'> 		int where = MTR0 + (slot_row * sizeof(u16));</div><div class='ctx'> </div><div class='ctx'> 		/* Branch 0 set of MTR registers */</div><div class='hunk'>@@ -1105,7 +1124,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)</div><div class='ctx'> 	/* Read and dump branch 0's MTRs */</div><div class='ctx'> 	debugf2("\nMemory Technology Registers:\n");</div><div class='ctx'> 	debugf2("   Branch 0:\n");</div><div class='del'>-	for (slot_row = 0; slot_row &lt; NUM_MTRS_PER_BRANCH; slot_row++)</div><div class='add'>+	for (slot_row = 0; slot_row &lt; DIMMS_PER_CHANNEL; slot_row++)</div><div class='ctx'> 		decode_mtr(slot_row, pvt-&gt;b0_mtr[slot_row]);</div><div class='ctx'> </div><div class='ctx'> 	pci_read_config_word(pvt-&gt;branch_0, AMBPRESENT_0,</div><div class='hunk'>@@ -1122,7 +1141,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Read and dump  branch 1's MTRs */</div><div class='ctx'> 		debugf2("   Branch 1:\n");</div><div class='del'>-		for (slot_row = 0; slot_row &lt; NUM_MTRS_PER_BRANCH; slot_row++)</div><div class='add'>+		for (slot_row = 0; slot_row &lt; DIMMS_PER_CHANNEL; slot_row++)</div><div class='ctx'> 			decode_mtr(slot_row, pvt-&gt;b1_mtr[slot_row]);</div><div class='ctx'> </div><div class='ctx'> 		pci_read_config_word(pvt-&gt;branch_1, AMBPRESENT_0,</div><div class='hunk'>@@ -1141,7 +1160,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- *	i5400_init_csrows	Initialize the 'csrows' table within</div><div class='add'>+ *	i5400_init_dimms	Initialize the 'dimms' table within</div><div class='ctx'>  *				the mci control	structure with the</div><div class='ctx'>  *				addressing of memory.</div><div class='ctx'>  *</div><div class='hunk'>@@ -1149,64 +1168,68 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)</div><div class='ctx'>  *		0	success</div><div class='ctx'>  *		1	no actual memory found on this MC</div><div class='ctx'>  */</div><div class='del'>-static int i5400_init_csrows(struct mem_ctl_info *mci)</div><div class='add'>+static int i5400_init_dimms(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='ctx'> 	struct i5400_pvt *pvt;</div><div class='del'>-	struct csrow_info *p_csrow;</div><div class='del'>-	int empty, channel_count;</div><div class='del'>-	int max_csrows;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='add'>+	int ndimms, channel_count;</div><div class='add'>+	int max_dimms;</div><div class='ctx'> 	int mtr;</div><div class='del'>-	int csrow_megs;</div><div class='del'>-	int channel;</div><div class='del'>-	int csrow;</div><div class='add'>+	int size_mb;</div><div class='add'>+	int  channel, slot;</div><div class='ctx'> </div><div class='ctx'> 	pvt = mci-&gt;pvt_info;</div><div class='ctx'> </div><div class='ctx'> 	channel_count = pvt-&gt;maxch;</div><div class='del'>-	max_csrows = pvt-&gt;maxdimmperch;</div><div class='add'>+	max_dimms = pvt-&gt;maxdimmperch;</div><div class='ctx'> </div><div class='del'>-	empty = 1;		/* Assume NO memory */</div><div class='add'>+	ndimms = 0;</div><div class='ctx'> </div><div class='del'>-	for (csrow = 0; csrow &lt; max_csrows; csrow++) {</div><div class='del'>-		p_csrow = &amp;mci-&gt;csrows[csrow];</div><div class='del'>-</div><div class='del'>-		p_csrow-&gt;csrow_idx = csrow;</div><div class='del'>-</div><div class='del'>-		/* use branch 0 for the basis */</div><div class='del'>-		mtr = determine_mtr(pvt, csrow, 0);</div><div class='del'>-</div><div class='del'>-		/* if no DIMMS on this row, continue */</div><div class='del'>-		if (!MTR_DIMMS_PRESENT(mtr))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* FAKE OUT VALUES, FIXME */</div><div class='del'>-		p_csrow-&gt;first_page = 0 + csrow * 20;</div><div class='del'>-		p_csrow-&gt;last_page = 9 + csrow * 20;</div><div class='del'>-		p_csrow-&gt;page_mask = 0xFFF;</div><div class='del'>-</div><div class='del'>-		p_csrow-&gt;grain = 8;</div><div class='del'>-</div><div class='del'>-		csrow_megs = 0;</div><div class='del'>-		for (channel = 0; channel &lt; pvt-&gt;maxch; channel++)</div><div class='del'>-			csrow_megs += pvt-&gt;dimm_info[csrow][channel].megabytes;</div><div class='del'>-</div><div class='del'>-		p_csrow-&gt;nr_pages = csrow_megs &lt;&lt; 8;</div><div class='del'>-</div><div class='del'>-		/* Assume DDR2 for now */</div><div class='del'>-		p_csrow-&gt;mtype = MEM_FB_DDR2;</div><div class='del'>-</div><div class='del'>-		/* ask what device type on this row */</div><div class='del'>-		if (MTR_DRAM_WIDTH(mtr))</div><div class='del'>-			p_csrow-&gt;dtype = DEV_X8;</div><div class='del'>-		else</div><div class='del'>-			p_csrow-&gt;dtype = DEV_X4;</div><div class='del'>-</div><div class='del'>-		p_csrow-&gt;edac_mode = EDAC_S8ECD8ED;</div><div class='del'>-</div><div class='del'>-		empty = 0;</div><div class='add'>+	/*</div><div class='add'>+	 * FIXME: remove  pvt-&gt;dimm_info[slot][channel] and use the 3</div><div class='add'>+	 * layers here.</div><div class='add'>+	 */</div><div class='add'>+	for (channel = 0; channel &lt; mci-&gt;layers[0].size * mci-&gt;layers[1].size;</div><div class='add'>+	     channel++) {</div><div class='add'>+		for (slot = 0; slot &lt; mci-&gt;layers[2].size; slot++) {</div><div class='add'>+			mtr = determine_mtr(pvt, slot, channel);</div><div class='add'>+</div><div class='add'>+			/* if no DIMMS on this slot, continue */</div><div class='add'>+			if (!MTR_DIMMS_PRESENT(mtr))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			dimm = EDAC_DIMM_PTR(mci-&gt;layers, mci-&gt;dimms, mci-&gt;n_layers,</div><div class='add'>+				       channel / 2, channel % 2, slot);</div><div class='add'>+</div><div class='add'>+			size_mb =  pvt-&gt;dimm_info[slot][channel].megabytes;</div><div class='add'>+</div><div class='add'>+			debugf2("%s: dimm%zd (branch %d channel %d slot %d): %d.%03d GB\n",</div><div class='add'>+				__func__, dimm - mci-&gt;dimms,</div><div class='add'>+				channel / 2, channel % 2, slot,</div><div class='add'>+				size_mb / 1000, size_mb % 1000);</div><div class='add'>+</div><div class='add'>+			dimm-&gt;nr_pages = size_mb &lt;&lt; 8;</div><div class='add'>+			dimm-&gt;grain = 8;</div><div class='add'>+			dimm-&gt;dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4;</div><div class='add'>+			dimm-&gt;mtype = MEM_FB_DDR2;</div><div class='add'>+			/*</div><div class='add'>+			 * The eccc mechanism is SDDC (aka SECC), with</div><div class='add'>+			 * is similar to Chipkill.</div><div class='add'>+			 */</div><div class='add'>+			dimm-&gt;edac_mode = MTR_DRAM_WIDTH(mtr) ?</div><div class='add'>+					  EDAC_S8ECD8ED : EDAC_S4ECD4ED;</div><div class='add'>+			ndimms++;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return empty;</div><div class='add'>+	/*</div><div class='add'>+	 * When just one memory is provided, it should be at location (0,0,0).</div><div class='add'>+	 * With such single-DIMM mode, the SDCC algorithm degrades to SECDEC+.</div><div class='add'>+	 */</div><div class='add'>+	if (ndimms == 1)</div><div class='add'>+		mci-&gt;dimms[0].edac_mode = EDAC_SECDED;</div><div class='add'>+</div><div class='add'>+	return (ndimms == 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1242,9 +1265,7 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='ctx'> 	struct i5400_pvt *pvt;</div><div class='del'>-	int num_channels;</div><div class='del'>-	int num_dimms_per_channel;</div><div class='del'>-	int num_csrows;</div><div class='add'>+	struct edac_mc_layer layers[3];</div><div class='ctx'> </div><div class='ctx'> 	if (dev_idx &gt;= ARRAY_SIZE(i5400_devs))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1258,23 +1279,21 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	if (PCI_FUNC(pdev-&gt;devfn) != 0)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	/* As we don't have a motherboard identification routine to determine</div><div class='del'>-	 * actual number of slots/dimms per channel, we thus utilize the</div><div class='del'>-	 * resource as specified by the chipset. Thus, we might have</div><div class='del'>-	 * have more DIMMs per channel than actually on the mobo, but this</div><div class='del'>-	 * allows the driver to support up to the chipset max, without</div><div class='del'>-	 * some fancy mobo determination.</div><div class='add'>+	/*</div><div class='add'>+	 * allocate a new MC control structure</div><div class='add'>+	 *</div><div class='add'>+	 * This drivers uses the DIMM slot as "csrow" and the rest as "channel".</div><div class='ctx'> 	 */</div><div class='del'>-	num_dimms_per_channel = MAX_DIMMS_PER_CHANNEL;</div><div class='del'>-	num_channels = MAX_CHANNELS;</div><div class='del'>-	num_csrows = num_dimms_per_channel;</div><div class='del'>-</div><div class='del'>-	debugf0("MC: %s(): Number of - Channels= %d  DIMMS= %d  CSROWS= %d\n",</div><div class='del'>-		__func__, num_channels, num_dimms_per_channel, num_csrows);</div><div class='del'>-</div><div class='del'>-	/* allocate a new MC control structure */</div><div class='del'>-	mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0);</div><div class='del'>-</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_BRANCH;</div><div class='add'>+	layers[0].size = MAX_BRANCHES;</div><div class='add'>+	layers[0].is_virt_csrow = false;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = CHANNELS_PER_BRANCH;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	layers[2].type = EDAC_MC_LAYER_SLOT;</div><div class='add'>+	layers[2].size = DIMMS_PER_CHANNEL;</div><div class='add'>+	layers[2].is_virt_csrow = true;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));</div><div class='ctx'> 	if (mci == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -1284,8 +1303,8 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> </div><div class='ctx'> 	pvt = mci-&gt;pvt_info;</div><div class='ctx'> 	pvt-&gt;system_address = pdev;	/* Record this device in our private */</div><div class='del'>-	pvt-&gt;maxch = num_channels;</div><div class='del'>-	pvt-&gt;maxdimmperch = num_dimms_per_channel;</div><div class='add'>+	pvt-&gt;maxch = MAX_CHANNELS;</div><div class='add'>+	pvt-&gt;maxdimmperch = DIMMS_PER_CHANNEL;</div><div class='ctx'> </div><div class='ctx'> 	/* 'get' the pci devices we want to reserve for our use */</div><div class='ctx'> 	if (i5400_get_devices(mci, dev_idx))</div><div class='hunk'>@@ -1307,13 +1326,13 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	/* Set the function pointer to an actual operation function */</div><div class='ctx'> 	mci-&gt;edac_check = i5400_check_error;</div><div class='ctx'> </div><div class='del'>-	/* initialize the MC control structure 'csrows' table</div><div class='add'>+	/* initialize the MC control structure 'dimms' table</div><div class='ctx'> 	 * with the mapping and control information */</div><div class='del'>-	if (i5400_init_csrows(mci)) {</div><div class='add'>+	if (i5400_init_dimms(mci)) {</div><div class='ctx'> 		debugf0("MC: Setting mci-&gt;edac_cap to EDAC_FLAG_NONE\n"</div><div class='del'>-			"    because i5400_init_csrows() returned nonzero "</div><div class='add'>+			"    because i5400_init_dimms() returned nonzero "</div><div class='ctx'> 			"value\n");</div><div class='del'>-		mci-&gt;edac_cap = EDAC_FLAG_NONE;	/* no csrows found */</div><div class='add'>+		mci-&gt;edac_cap = EDAC_FLAG_NONE;	/* no dimms found */</div><div class='ctx'> 	} else {</div><div class='ctx'> 		debugf1("MC: Enable error reporting now\n");</div><div class='ctx'> 		i5400_enable_error_reporting(mci);</div><div class='head'>diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c<br/>index 3bafa3bca148..97c22fd650ee 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/i7300_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/i7300_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/i7300_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i7300_edac.c</a></div><div class='hunk'>@@ -464,17 +464,14 @@ static void i7300_process_fbd_error(struct mem_ctl_info *mci)</div><div class='ctx'> 				FERR_FAT_FBD, error_reg);</div><div class='ctx'> </div><div class='ctx'> 		snprintf(pvt-&gt;tmp_prt_buffer, PAGE_SIZE,</div><div class='del'>-			"FATAL (Branch=%d DRAM-Bank=%d %s "</div><div class='del'>-			"RAS=%d CAS=%d Err=0x%lx (%s))",</div><div class='del'>-			branch, bank,</div><div class='del'>-			is_wr ? "RDWR" : "RD",</div><div class='del'>-			ras, cas,</div><div class='del'>-			errors, specific);</div><div class='del'>-</div><div class='del'>-		/* Call the helper to output message */</div><div class='del'>-		edac_mc_handle_fbd_ue(mci, rank, branch &lt;&lt; 1,</div><div class='del'>-				      (branch &lt;&lt; 1) + 1,</div><div class='del'>-				      pvt-&gt;tmp_prt_buffer);</div><div class='add'>+			 "Bank=%d RAS=%d CAS=%d Err=0x%lx (%s))",</div><div class='add'>+			 bank, ras, cas, errors, specific);</div><div class='add'>+</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 0, 0, 0,</div><div class='add'>+				     branch, -1, rank,</div><div class='add'>+				     is_wr ? "Write error" : "Read error",</div><div class='add'>+				     pvt-&gt;tmp_prt_buffer, NULL);</div><div class='add'>+</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* read in the 1st NON-FATAL error register */</div><div class='hunk'>@@ -513,23 +510,14 @@ static void i7300_process_fbd_error(struct mem_ctl_info *mci)</div><div class='ctx'> </div><div class='ctx'> 		/* Form out message */</div><div class='ctx'> 		snprintf(pvt-&gt;tmp_prt_buffer, PAGE_SIZE,</div><div class='del'>-			"Corrected error (Branch=%d, Channel %d), "</div><div class='del'>-			" DRAM-Bank=%d %s "</div><div class='del'>-			"RAS=%d CAS=%d, CE Err=0x%lx, Syndrome=0x%08x(%s))",</div><div class='del'>-			branch, channel,</div><div class='del'>-			bank,</div><div class='del'>-			is_wr ? "RDWR" : "RD",</div><div class='del'>-			ras, cas,</div><div class='del'>-			errors, syndrome, specific);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Call the helper to output message</div><div class='del'>-		 * NOTE: Errors are reported per-branch, and not per-channel</div><div class='del'>-		 *	 Currently, we don't know how to identify the right</div><div class='del'>-		 *	 channel.</div><div class='del'>-		 */</div><div class='del'>-		edac_mc_handle_fbd_ce(mci, rank, channel,</div><div class='del'>-				      pvt-&gt;tmp_prt_buffer);</div><div class='add'>+			 "DRAM-Bank=%d RAS=%d CAS=%d, Err=0x%lx (%s))",</div><div class='add'>+			 bank, ras, cas, errors, specific);</div><div class='add'>+</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0,</div><div class='add'>+				     syndrome,</div><div class='add'>+				     branch &gt;&gt; 1, channel % 2, rank,</div><div class='add'>+				     is_wr ? "Write error" : "Read error",</div><div class='add'>+				     pvt-&gt;tmp_prt_buffer, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='hunk'>@@ -617,8 +605,7 @@ static void i7300_enable_error_reporting(struct mem_ctl_info *mci)</div><div class='ctx'> static int decode_mtr(struct i7300_pvt *pvt,</div><div class='ctx'> 		      int slot, int ch, int branch,</div><div class='ctx'> 		      struct i7300_dimm_info *dinfo,</div><div class='del'>-		      struct csrow_info *p_csrow,</div><div class='del'>-		      u32 *nr_pages)</div><div class='add'>+		      struct dimm_info *dimm)</div><div class='ctx'> {</div><div class='ctx'> 	int mtr, ans, addrBits, channel;</div><div class='ctx'> </div><div class='hunk'>@@ -650,7 +637,6 @@ static int decode_mtr(struct i7300_pvt *pvt,</div><div class='ctx'> 	addrBits -= 3;	/* 8 bits per bytes */</div><div class='ctx'> </div><div class='ctx'> 	dinfo-&gt;megabytes = 1 &lt;&lt; addrBits;</div><div class='del'>-	*nr_pages = dinfo-&gt;megabytes &lt;&lt; 8;</div><div class='ctx'> </div><div class='ctx'> 	debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));</div><div class='ctx'> </div><div class='hunk'>@@ -663,11 +649,6 @@ static int decode_mtr(struct i7300_pvt *pvt,</div><div class='ctx'> 	debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]);</div><div class='ctx'> 	debugf2("\t\tSIZE: %d MB\n", dinfo-&gt;megabytes);</div><div class='ctx'> </div><div class='del'>-	p_csrow-&gt;grain = 8;</div><div class='del'>-	p_csrow-&gt;mtype = MEM_FB_DDR2;</div><div class='del'>-	p_csrow-&gt;csrow_idx = slot;</div><div class='del'>-	p_csrow-&gt;page_mask = 0;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The type of error detection actually depends of the</div><div class='ctx'> 	 * mode of operation. When it is just one single memory chip, at</div><div class='hunk'>@@ -677,15 +658,18 @@ static int decode_mtr(struct i7300_pvt *pvt,</div><div class='ctx'> 	 * See datasheet Sections 7.3.6 to 7.3.8</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='add'>+	dimm-&gt;nr_pages = MiB_TO_PAGES(dinfo-&gt;megabytes);</div><div class='add'>+	dimm-&gt;grain = 8;</div><div class='add'>+	dimm-&gt;mtype = MEM_FB_DDR2;</div><div class='ctx'> 	if (IS_SINGLE_MODE(pvt-&gt;mc_settings_a)) {</div><div class='del'>-		p_csrow-&gt;edac_mode = EDAC_SECDED;</div><div class='add'>+		dimm-&gt;edac_mode = EDAC_SECDED;</div><div class='ctx'> 		debugf2("\t\tECC code is 8-byte-over-32-byte SECDED+ code\n");</div><div class='ctx'> 	} else {</div><div class='ctx'> 		debugf2("\t\tECC code is on Lockstep mode\n");</div><div class='ctx'> 		if (MTR_DRAM_WIDTH(mtr) == 8)</div><div class='del'>-			p_csrow-&gt;edac_mode = EDAC_S8ECD8ED;</div><div class='add'>+			dimm-&gt;edac_mode = EDAC_S8ECD8ED;</div><div class='ctx'> 		else</div><div class='del'>-			p_csrow-&gt;edac_mode = EDAC_S4ECD4ED;</div><div class='add'>+			dimm-&gt;edac_mode = EDAC_S4ECD4ED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* ask what device type on this row */</div><div class='hunk'>@@ -694,9 +678,9 @@ static int decode_mtr(struct i7300_pvt *pvt,</div><div class='ctx'> 			IS_SCRBALGO_ENHANCED(pvt-&gt;mc_settings) ?</div><div class='ctx'> 					    "enhanced" : "normal");</div><div class='ctx'> </div><div class='del'>-		p_csrow-&gt;dtype = DEV_X8;</div><div class='add'>+		dimm-&gt;dtype = DEV_X8;</div><div class='ctx'> 	} else</div><div class='del'>-		p_csrow-&gt;dtype = DEV_X4;</div><div class='add'>+		dimm-&gt;dtype = DEV_X4;</div><div class='ctx'> </div><div class='ctx'> 	return mtr;</div><div class='ctx'> }</div><div class='hunk'>@@ -774,11 +758,10 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='ctx'> 	struct i7300_pvt *pvt;</div><div class='ctx'> 	struct i7300_dimm_info *dinfo;</div><div class='del'>-	struct csrow_info *p_csrow;</div><div class='ctx'> 	int rc = -ENODEV;</div><div class='ctx'> 	int mtr;</div><div class='ctx'> 	int ch, branch, slot, channel;</div><div class='del'>-	u32 last_page = 0, nr_pages;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='ctx'> </div><div class='ctx'> 	pvt = mci-&gt;pvt_info;</div><div class='ctx'> </div><div class='hunk'>@@ -809,25 +792,23 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> 			pci_read_config_word(pvt-&gt;pci_dev_2x_0_fbd_branch[branch],</div><div class='ctx'> 					where,</div><div class='ctx'> 					&amp;pvt-&gt;mtr[slot][branch]);</div><div class='del'>-			for (ch = 0; ch &lt; MAX_BRANCHES; ch++) {</div><div class='add'>+			for (ch = 0; ch &lt; MAX_CH_PER_BRANCH; ch++) {</div><div class='ctx'> 				int channel = to_channel(ch, branch);</div><div class='ctx'> </div><div class='add'>+				dimm = EDAC_DIMM_PTR(mci-&gt;layers, mci-&gt;dimms,</div><div class='add'>+					       mci-&gt;n_layers, branch, ch, slot);</div><div class='add'>+</div><div class='ctx'> 				dinfo = &amp;pvt-&gt;dimm_info[slot][channel];</div><div class='del'>-				p_csrow = &amp;mci-&gt;csrows[slot];</div><div class='ctx'> </div><div class='ctx'> 				mtr = decode_mtr(pvt, slot, ch, branch,</div><div class='del'>-						 dinfo, p_csrow, &amp;nr_pages);</div><div class='add'>+						 dinfo, dimm);</div><div class='add'>+</div><div class='ctx'> 				/* if no DIMMS on this row, continue */</div><div class='ctx'> 				if (!MTR_DIMMS_PRESENT(mtr))</div><div class='ctx'> 					continue;</div><div class='ctx'> </div><div class='del'>-				/* Update per_csrow memory count */</div><div class='del'>-				p_csrow-&gt;nr_pages += nr_pages;</div><div class='del'>-				p_csrow-&gt;first_page = last_page;</div><div class='del'>-				last_page += nr_pages;</div><div class='del'>-				p_csrow-&gt;last_page = last_page;</div><div class='del'>-</div><div class='ctx'> 				rc = 0;</div><div class='add'>+</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1042,10 +1023,8 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,</div><div class='ctx'> 				    const struct pci_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[3];</div><div class='ctx'> 	struct i7300_pvt *pvt;</div><div class='del'>-	int num_channels;</div><div class='del'>-	int num_dimms_per_channel;</div><div class='del'>-	int num_csrows;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	/* wake up device */</div><div class='hunk'>@@ -1062,23 +1041,17 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	if (PCI_FUNC(pdev-&gt;devfn) != 0)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	/* As we don't have a motherboard identification routine to determine</div><div class='del'>-	 * actual number of slots/dimms per channel, we thus utilize the</div><div class='del'>-	 * resource as specified by the chipset. Thus, we might have</div><div class='del'>-	 * have more DIMMs per channel than actually on the mobo, but this</div><div class='del'>-	 * allows the driver to support up to the chipset max, without</div><div class='del'>-	 * some fancy mobo determination.</div><div class='del'>-	 */</div><div class='del'>-	num_dimms_per_channel = MAX_SLOTS;</div><div class='del'>-	num_channels = MAX_CHANNELS;</div><div class='del'>-	num_csrows = MAX_SLOTS * MAX_CHANNELS;</div><div class='del'>-</div><div class='del'>-	debugf0("MC: %s(): Number of - Channels= %d  DIMMS= %d  CSROWS= %d\n",</div><div class='del'>-		__func__, num_channels, num_dimms_per_channel, num_csrows);</div><div class='del'>-</div><div class='ctx'> 	/* allocate a new MC control structure */</div><div class='del'>-	mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0);</div><div class='del'>-</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_BRANCH;</div><div class='add'>+	layers[0].size = MAX_BRANCHES;</div><div class='add'>+	layers[0].is_virt_csrow = false;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = MAX_CH_PER_BRANCH;</div><div class='add'>+	layers[1].is_virt_csrow = true;</div><div class='add'>+	layers[2].type = EDAC_MC_LAYER_SLOT;</div><div class='add'>+	layers[2].size = MAX_SLOTS;</div><div class='add'>+	layers[2].is_virt_csrow = true;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));</div><div class='ctx'> 	if (mci == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c<br/>index 85226ccf5290..d27778f65a5d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/i7core_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/i7core_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/i7core_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i7core_edac.c</a></div><div class='hunk'>@@ -90,7 +90,7 @@ MODULE_PARM_DESC(use_pci_fixup, "Enable PCI fixup to seek for hidden devices");</div><div class='ctx'> #define MC_MAX_DOD	0x64</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * OFFSETS for Device 3 Function 4, as inicated on Xeon 5500 datasheet:</div><div class='add'>+ * OFFSETS for Device 3 Function 4, as indicated on Xeon 5500 datasheet:</div><div class='ctx'>  * http://www.arrownac.com/manufacturers/intel/s/nehalem/5500-datasheet-v2.pdf</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -101,7 +101,7 @@ MODULE_PARM_DESC(use_pci_fixup, "Enable PCI fixup to seek for hidden devices");</div><div class='ctx'>   #define DIMM1_COR_ERR(r)			(((r) &gt;&gt; 16) &amp; 0x7fff)</div><div class='ctx'>   #define DIMM0_COR_ERR(r)			((r) &amp; 0x7fff)</div><div class='ctx'> </div><div class='del'>-/* OFFSETS for Device 3 Function 2, as inicated on Xeon 5500 datasheet */</div><div class='add'>+/* OFFSETS for Device 3 Function 2, as indicated on Xeon 5500 datasheet */</div><div class='ctx'> #define MC_SSRCONTROL		0x48</div><div class='ctx'>   #define SSR_MODE_DISABLE	0x00</div><div class='ctx'>   #define SSR_MODE_ENABLE	0x01</div><div class='hunk'>@@ -221,7 +221,9 @@ struct i7core_inject {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct i7core_channel {</div><div class='del'>-	u32		ranks;</div><div class='add'>+	bool		is_3dimms_present;</div><div class='add'>+	bool		is_single_4rank;</div><div class='add'>+	bool		has_4rank;</div><div class='ctx'> 	u32		dimms;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -257,7 +259,6 @@ struct i7core_pvt {</div><div class='ctx'> 	struct i7core_channel	channel[NUM_CHANS];</div><div class='ctx'> </div><div class='ctx'> 	int		ce_count_available;</div><div class='del'>-	int 		csrow_map[NUM_CHANS][MAX_DIMMS];</div><div class='ctx'> </div><div class='ctx'> 			/* ECC corrected errors counts per udimm */</div><div class='ctx'> 	unsigned long	udimm_ce_count[MAX_DIMMS];</div><div class='hunk'>@@ -398,7 +399,7 @@ static DEFINE_PCI_DEVICE_TABLE(i7core_pci_tbl) = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /****************************************************************************</div><div class='del'>-			Anciliary status routines</div><div class='add'>+			Ancillary status routines</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> </div><div class='ctx'> 	/* MC_CONTROL bits */</div><div class='hunk'>@@ -492,116 +493,15 @@ static void free_i7core_dev(struct i7core_dev *i7core_dev)</div><div class='ctx'> /****************************************************************************</div><div class='ctx'> 			Memory check routines</div><div class='ctx'>  ****************************************************************************/</div><div class='del'>-static struct pci_dev *get_pdev_slot_func(u8 socket, unsigned slot,</div><div class='del'>-					  unsigned func)</div><div class='del'>-{</div><div class='del'>-	struct i7core_dev *i7core_dev = get_i7core_dev(socket);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!i7core_dev)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; i7core_dev-&gt;n_devs; i++) {</div><div class='del'>-		if (!i7core_dev-&gt;pdev[i])</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (PCI_SLOT(i7core_dev-&gt;pdev[i]-&gt;devfn) == slot &amp;&amp;</div><div class='del'>-		    PCI_FUNC(i7core_dev-&gt;pdev[i]-&gt;devfn) == func) {</div><div class='del'>-			return i7core_dev-&gt;pdev[i];</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i7core_get_active_channels() - gets the number of channels and csrows</div><div class='del'>- * @socket:	Quick Path Interconnect socket</div><div class='del'>- * @channels:	Number of channels that will be returned</div><div class='del'>- * @csrows:	Number of csrows found</div><div class='del'>- *</div><div class='del'>- * Since EDAC core needs to know in advance the number of available channels</div><div class='del'>- * and csrows, in order to allocate memory for csrows/channels, it is needed</div><div class='del'>- * to run two similar steps. At the first step, implemented on this function,</div><div class='del'>- * it checks the number of csrows/channels present at one socket.</div><div class='del'>- * this is used in order to properly allocate the size of mci components.</div><div class='del'>- *</div><div class='del'>- * It should be noticed that none of the current available datasheets explain</div><div class='del'>- * or even mention how csrows are seen by the memory controller. So, we need</div><div class='del'>- * to add a fake description for csrows.</div><div class='del'>- * So, this driver is attributing one DIMM memory for one csrow.</div><div class='del'>- */</div><div class='del'>-static int i7core_get_active_channels(const u8 socket, unsigned *channels,</div><div class='del'>-				      unsigned *csrows)</div><div class='del'>-{</div><div class='del'>-	struct pci_dev *pdev = NULL;</div><div class='del'>-	int i, j;</div><div class='del'>-	u32 status, control;</div><div class='del'>-</div><div class='del'>-	*channels = 0;</div><div class='del'>-	*csrows = 0;</div><div class='del'>-</div><div class='del'>-	pdev = get_pdev_slot_func(socket, 3, 0);</div><div class='del'>-	if (!pdev) {</div><div class='del'>-		i7core_printk(KERN_ERR, "Couldn't find socket %d fn 3.0!!!\n",</div><div class='del'>-			      socket);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Device 3 function 0 reads */</div><div class='del'>-	pci_read_config_dword(pdev, MC_STATUS, &amp;status);</div><div class='del'>-	pci_read_config_dword(pdev, MC_CONTROL, &amp;control);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; NUM_CHANS; i++) {</div><div class='del'>-		u32 dimm_dod[3];</div><div class='del'>-		/* Check if the channel is active */</div><div class='del'>-		if (!(control &amp; (1 &lt;&lt; (8 + i))))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* Check if the channel is disabled */</div><div class='del'>-		if (status &amp; (1 &lt;&lt; i))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		pdev = get_pdev_slot_func(socket, i + 4, 1);</div><div class='del'>-		if (!pdev) {</div><div class='del'>-			i7core_printk(KERN_ERR, "Couldn't find socket %d "</div><div class='del'>-						"fn %d.%d!!!\n",</div><div class='del'>-						socket, i + 4, 1);</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		/* Devices 4-6 function 1 */</div><div class='del'>-		pci_read_config_dword(pdev,</div><div class='del'>-				MC_DOD_CH_DIMM0, &amp;dimm_dod[0]);</div><div class='del'>-		pci_read_config_dword(pdev,</div><div class='del'>-				MC_DOD_CH_DIMM1, &amp;dimm_dod[1]);</div><div class='del'>-		pci_read_config_dword(pdev,</div><div class='del'>-				MC_DOD_CH_DIMM2, &amp;dimm_dod[2]);</div><div class='ctx'> </div><div class='del'>-		(*channels)++;</div><div class='del'>-</div><div class='del'>-		for (j = 0; j &lt; 3; j++) {</div><div class='del'>-			if (!DIMM_PRESENT(dimm_dod[j]))</div><div class='del'>-				continue;</div><div class='del'>-			(*csrows)++;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	debugf0("Number of active channels on socket %d: %d\n",</div><div class='del'>-		socket, *channels);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int get_dimm_config(const struct mem_ctl_info *mci)</div><div class='add'>+static int get_dimm_config(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='ctx'> 	struct i7core_pvt *pvt = mci-&gt;pvt_info;</div><div class='del'>-	struct csrow_info *csr;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> 	int i, j;</div><div class='del'>-	int csrow = 0;</div><div class='del'>-	unsigned long last_page = 0;</div><div class='ctx'> 	enum edac_type mode;</div><div class='ctx'> 	enum mem_type mtype;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='ctx'> </div><div class='ctx'> 	/* Get data from the MC register, function 0 */</div><div class='ctx'> 	pdev = pvt-&gt;pci_mcr[0];</div><div class='hunk'>@@ -657,21 +557,20 @@ static int get_dimm_config(const struct mem_ctl_info *mci)</div><div class='ctx'> 		pci_read_config_dword(pvt-&gt;pci_ch[i][0],</div><div class='ctx'> 				MC_CHANNEL_DIMM_INIT_PARAMS, &amp;data);</div><div class='ctx'> </div><div class='del'>-		pvt-&gt;channel[i].ranks = (data &amp; QUAD_RANK_PRESENT) ?</div><div class='del'>-						4 : 2;</div><div class='add'>+</div><div class='add'>+		if (data &amp; THREE_DIMMS_PRESENT)</div><div class='add'>+			pvt-&gt;channel[i].is_3dimms_present = true;</div><div class='add'>+</div><div class='add'>+		if (data &amp; SINGLE_QUAD_RANK_PRESENT)</div><div class='add'>+			pvt-&gt;channel[i].is_single_4rank = true;</div><div class='add'>+</div><div class='add'>+		if (data &amp; QUAD_RANK_PRESENT)</div><div class='add'>+			pvt-&gt;channel[i].has_4rank = true;</div><div class='ctx'> </div><div class='ctx'> 		if (data &amp; REGISTERED_DIMM)</div><div class='ctx'> 			mtype = MEM_RDDR3;</div><div class='ctx'> 		else</div><div class='ctx'> 			mtype = MEM_DDR3;</div><div class='del'>-#if 0</div><div class='del'>-		if (data &amp; THREE_DIMMS_PRESENT)</div><div class='del'>-			pvt-&gt;channel[i].dimms = 3;</div><div class='del'>-		else if (data &amp; SINGLE_QUAD_RANK_PRESENT)</div><div class='del'>-			pvt-&gt;channel[i].dimms = 1;</div><div class='del'>-		else</div><div class='del'>-			pvt-&gt;channel[i].dimms = 2;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 		/* Devices 4-6 function 1 */</div><div class='ctx'> 		pci_read_config_dword(pvt-&gt;pci_ch[i][1],</div><div class='hunk'>@@ -682,11 +581,13 @@ static int get_dimm_config(const struct mem_ctl_info *mci)</div><div class='ctx'> 				MC_DOD_CH_DIMM2, &amp;dimm_dod[2]);</div><div class='ctx'> </div><div class='ctx'> 		debugf0("Ch%d phy rd%d, wr%d (0x%08x): "</div><div class='del'>-			"%d ranks, %cDIMMs\n",</div><div class='add'>+			"%s%s%s%cDIMMs\n",</div><div class='ctx'> 			i,</div><div class='ctx'> 			RDLCH(pvt-&gt;info.ch_map, i), WRLCH(pvt-&gt;info.ch_map, i),</div><div class='ctx'> 			data,</div><div class='del'>-			pvt-&gt;channel[i].ranks,</div><div class='add'>+			pvt-&gt;channel[i].is_3dimms_present ? "3DIMMS " : "",</div><div class='add'>+			pvt-&gt;channel[i].is_3dimms_present ? "SINGLE_4R " : "",</div><div class='add'>+			pvt-&gt;channel[i].has_4rank ? "HAS_4R " : "",</div><div class='ctx'> 			(data &amp; REGISTERED_DIMM) ? 'R' : 'U');</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; 3; j++) {</div><div class='hunk'>@@ -696,6 +597,8 @@ static int get_dimm_config(const struct mem_ctl_info *mci)</div><div class='ctx'> 			if (!DIMM_PRESENT(dimm_dod[j]))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='add'>+			dimm = EDAC_DIMM_PTR(mci-&gt;layers, mci-&gt;dimms, mci-&gt;n_layers,</div><div class='add'>+				       i, j, 0);</div><div class='ctx'> 			banks = numbank(MC_DOD_NUMBANK(dimm_dod[j]));</div><div class='ctx'> 			ranks = numrank(MC_DOD_NUMRANK(dimm_dod[j]));</div><div class='ctx'> 			rows = numrow(MC_DOD_NUMROW(dimm_dod[j]));</div><div class='hunk'>@@ -704,8 +607,6 @@ static int get_dimm_config(const struct mem_ctl_info *mci)</div><div class='ctx'> 			/* DDR3 has 8 I/O banks */</div><div class='ctx'> 			size = (rows * cols * banks * ranks) &gt;&gt; (20 - 3);</div><div class='ctx'> </div><div class='del'>-			pvt-&gt;channel[i].dimms++;</div><div class='del'>-</div><div class='ctx'> 			debugf0("\tdimm %d %d Mb offset: %x, "</div><div class='ctx'> 				"bank: %d, rank: %d, row: %#x, col: %#x\n",</div><div class='ctx'> 				j, size,</div><div class='hunk'>@@ -714,44 +615,28 @@ static int get_dimm_config(const struct mem_ctl_info *mci)</div><div class='ctx'> </div><div class='ctx'> 			npages = MiB_TO_PAGES(size);</div><div class='ctx'> </div><div class='del'>-			csr = &amp;mci-&gt;csrows[csrow];</div><div class='del'>-			csr-&gt;first_page = last_page + 1;</div><div class='del'>-			last_page += npages;</div><div class='del'>-			csr-&gt;last_page = last_page;</div><div class='del'>-			csr-&gt;nr_pages = npages;</div><div class='del'>-</div><div class='del'>-			csr-&gt;page_mask = 0;</div><div class='del'>-			csr-&gt;grain = 8;</div><div class='del'>-			csr-&gt;csrow_idx = csrow;</div><div class='del'>-			csr-&gt;nr_channels = 1;</div><div class='del'>-</div><div class='del'>-			csr-&gt;channels[0].chan_idx = i;</div><div class='del'>-			csr-&gt;channels[0].ce_count = 0;</div><div class='del'>-</div><div class='del'>-			pvt-&gt;csrow_map[i][j] = csrow;</div><div class='add'>+			dimm-&gt;nr_pages = npages;</div><div class='ctx'> </div><div class='ctx'> 			switch (banks) {</div><div class='ctx'> 			case 4:</div><div class='del'>-				csr-&gt;dtype = DEV_X4;</div><div class='add'>+				dimm-&gt;dtype = DEV_X4;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case 8:</div><div class='del'>-				csr-&gt;dtype = DEV_X8;</div><div class='add'>+				dimm-&gt;dtype = DEV_X8;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case 16:</div><div class='del'>-				csr-&gt;dtype = DEV_X16;</div><div class='add'>+				dimm-&gt;dtype = DEV_X16;</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='del'>-				csr-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+				dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			csr-&gt;edac_mode = mode;</div><div class='del'>-			csr-&gt;mtype = mtype;</div><div class='del'>-			snprintf(csr-&gt;channels[0].label,</div><div class='del'>-					sizeof(csr-&gt;channels[0].label),</div><div class='del'>-					"CPU#%uChannel#%u_DIMM#%u",</div><div class='del'>-					pvt-&gt;i7core_dev-&gt;socket, i, j);</div><div class='del'>-</div><div class='del'>-			csrow++;</div><div class='add'>+			snprintf(dimm-&gt;label, sizeof(dimm-&gt;label),</div><div class='add'>+				 "CPU#%uChannel#%u_DIMM#%u",</div><div class='add'>+				 pvt-&gt;i7core_dev-&gt;socket, i, j);</div><div class='add'>+			dimm-&gt;grain = 8;</div><div class='add'>+			dimm-&gt;edac_mode = mode;</div><div class='add'>+			dimm-&gt;mtype = mtype;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		pci_read_config_dword(pdev, MC_SAG_CH_0, &amp;value[0]);</div><div class='hunk'>@@ -1361,7 +1246,7 @@ static int i7core_get_onedevice(struct pci_dev **prev,</div><div class='ctx'> 			      dev_descr-&gt;dev_id, *prev);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * On Xeon 55xx, the Intel Quckpath Arch Generic Non-core regs</div><div class='add'>+	 * On Xeon 55xx, the Intel QuickPath Arch Generic Non-core regs</div><div class='ctx'> 	 * is at addr 8086:2c40, instead of 8086:2c41. So, we need</div><div class='ctx'> 	 * to probe for the alternate address in case of failure</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1567,22 +1452,16 @@ error:</div><div class='ctx'> /****************************************************************************</div><div class='ctx'> 			Error check routines</div><div class='ctx'>  ****************************************************************************/</div><div class='del'>-static void i7core_rdimm_update_csrow(struct mem_ctl_info *mci,</div><div class='add'>+static void i7core_rdimm_update_errcount(struct mem_ctl_info *mci,</div><div class='ctx'> 				      const int chan,</div><div class='ctx'> 				      const int dimm,</div><div class='ctx'> 				      const int add)</div><div class='ctx'> {</div><div class='del'>-	char *msg;</div><div class='del'>-	struct i7core_pvt *pvt = mci-&gt;pvt_info;</div><div class='del'>-	int row = pvt-&gt;csrow_map[chan][dimm], i;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; add; i++) {</div><div class='del'>-		msg = kasprintf(GFP_KERNEL, "Corrected error "</div><div class='del'>-				"(Socket=%d channel=%d dimm=%d)",</div><div class='del'>-				pvt-&gt;i7core_dev-&gt;socket, chan, dimm);</div><div class='del'>-</div><div class='del'>-		edac_mc_handle_fbd_ce(mci, row, 0, msg);</div><div class='del'>-		kfree (msg);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,</div><div class='add'>+				     chan, dimm, -1, "error", "", NULL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1623,11 +1502,11 @@ static void i7core_rdimm_update_ce_count(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 	/*updated the edac core */</div><div class='ctx'> 	if (add0 != 0)</div><div class='del'>-		i7core_rdimm_update_csrow(mci, chan, 0, add0);</div><div class='add'>+		i7core_rdimm_update_errcount(mci, chan, 0, add0);</div><div class='ctx'> 	if (add1 != 0)</div><div class='del'>-		i7core_rdimm_update_csrow(mci, chan, 1, add1);</div><div class='add'>+		i7core_rdimm_update_errcount(mci, chan, 1, add1);</div><div class='ctx'> 	if (add2 != 0)</div><div class='del'>-		i7core_rdimm_update_csrow(mci, chan, 2, add2);</div><div class='add'>+		i7core_rdimm_update_errcount(mci, chan, 2, add2);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1747,20 +1626,30 @@ static void i7core_mce_output_error(struct mem_ctl_info *mci,</div><div class='ctx'> 				    const struct mce *m)</div><div class='ctx'> {</div><div class='ctx'> 	struct i7core_pvt *pvt = mci-&gt;pvt_info;</div><div class='del'>-	char *type, *optype, *err, *msg;</div><div class='add'>+	char *type, *optype, *err, msg[80];</div><div class='add'>+	enum hw_event_mc_err_type tp_event;</div><div class='ctx'> 	unsigned long error = m-&gt;status &amp; 0x1ff0000l;</div><div class='add'>+	bool uncorrected_error = m-&gt;mcgstatus &amp; 1ll &lt;&lt; 61;</div><div class='add'>+	bool ripv = m-&gt;mcgstatus &amp; 1;</div><div class='ctx'> 	u32 optypenum = (m-&gt;status &gt;&gt; 4) &amp; 0x07;</div><div class='ctx'> 	u32 core_err_cnt = (m-&gt;status &gt;&gt; 38) &amp; 0x7fff;</div><div class='ctx'> 	u32 dimm = (m-&gt;misc &gt;&gt; 16) &amp; 0x3;</div><div class='ctx'> 	u32 channel = (m-&gt;misc &gt;&gt; 18) &amp; 0x3;</div><div class='ctx'> 	u32 syndrome = m-&gt;misc &gt;&gt; 32;</div><div class='ctx'> 	u32 errnum = find_first_bit(&amp;error, 32);</div><div class='del'>-	int csrow;</div><div class='ctx'> </div><div class='del'>-	if (m-&gt;mcgstatus &amp; 1)</div><div class='del'>-		type = "FATAL";</div><div class='del'>-	else</div><div class='del'>-		type = "NON_FATAL";</div><div class='add'>+	if (uncorrected_error) {</div><div class='add'>+		if (ripv) {</div><div class='add'>+			type = "FATAL";</div><div class='add'>+			tp_event = HW_EVENT_ERR_FATAL;</div><div class='add'>+		} else {</div><div class='add'>+			type = "NON_FATAL";</div><div class='add'>+			tp_event = HW_EVENT_ERR_UNCORRECTED;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		type = "CORRECTED";</div><div class='add'>+		tp_event = HW_EVENT_ERR_CORRECTED;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	switch (optypenum) {</div><div class='ctx'> 	case 0:</div><div class='hunk'>@@ -1815,27 +1704,20 @@ static void i7core_mce_output_error(struct mem_ctl_info *mci,</div><div class='ctx'> 		err = "unknown";</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* FIXME: should convert addr into bank and rank information */</div><div class='del'>-	msg = kasprintf(GFP_ATOMIC,</div><div class='del'>-		"%s (addr = 0x%08llx, cpu=%d, Dimm=%d, Channel=%d, "</div><div class='del'>-		"syndrome=0x%08x, count=%d, Err=%08llx:%08llx (%s: %s))\n",</div><div class='del'>-		type, (long long) m-&gt;addr, m-&gt;cpu, dimm, channel,</div><div class='del'>-		syndrome, core_err_cnt, (long long)m-&gt;status,</div><div class='del'>-		(long long)m-&gt;misc, optype, err);</div><div class='del'>-</div><div class='del'>-	debugf0("%s", msg);</div><div class='del'>-</div><div class='del'>-	csrow = pvt-&gt;csrow_map[channel][dimm];</div><div class='add'>+	snprintf(msg, sizeof(msg), "count=%d %s", core_err_cnt, optype);</div><div class='ctx'> </div><div class='del'>-	/* Call the helper to output message */</div><div class='del'>-	if (m-&gt;mcgstatus &amp; 1)</div><div class='del'>-		edac_mc_handle_fbd_ue(mci, csrow, 0,</div><div class='del'>-				0 /* FIXME: should be channel here */, msg);</div><div class='del'>-	else if (!pvt-&gt;is_registered)</div><div class='del'>-		edac_mc_handle_fbd_ce(mci, csrow,</div><div class='del'>-				0 /* FIXME: should be channel here */, msg);</div><div class='del'>-</div><div class='del'>-	kfree(msg);</div><div class='add'>+	/*</div><div class='add'>+	 * Call the helper to output message</div><div class='add'>+	 * FIXME: what to do if core_err_cnt &gt; 1? Currently, it generates</div><div class='add'>+	 * only one event</div><div class='add'>+	 */</div><div class='add'>+	if (uncorrected_error || !pvt-&gt;is_registered)</div><div class='add'>+		edac_mc_handle_error(tp_event, mci,</div><div class='add'>+				     m-&gt;addr &gt;&gt; PAGE_SHIFT,</div><div class='add'>+				     m-&gt;addr &amp; ~PAGE_MASK,</div><div class='add'>+				     syndrome,</div><div class='add'>+				     channel, dimm, -1,</div><div class='add'>+				     err, msg, m);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2132,7 +2014,7 @@ static int set_sdram_scrub_rate(struct mem_ctl_info *mci, u32 new_bw)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * get_sdram_scrub_rate		This routine convert current scrub rate value</div><div class='del'>- *				into byte/sec bandwidth accourding to</div><div class='add'>+ *				into byte/sec bandwidth according to</div><div class='ctx'>  *				SCRUBINTERVAL formula found in datasheet.</div><div class='ctx'>  */</div><div class='ctx'> static int get_sdram_scrub_rate(struct mem_ctl_info *mci)</div><div class='hunk'>@@ -2252,15 +2134,19 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='ctx'> 	struct i7core_pvt *pvt;</div><div class='del'>-	int rc, channels, csrows;</div><div class='del'>-</div><div class='del'>-	/* Check the number of active and not disabled channels */</div><div class='del'>-	rc = i7core_get_active_channels(i7core_dev-&gt;socket, &amp;channels, &amp;csrows);</div><div class='del'>-	if (unlikely(rc &lt; 0))</div><div class='del'>-		return rc;</div><div class='add'>+	int rc;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> </div><div class='ctx'> 	/* allocate a new MC control structure */</div><div class='del'>-	mci = edac_mc_alloc(sizeof(*pvt), csrows, channels, i7core_dev-&gt;socket);</div><div class='add'>+</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[0].size = NUM_CHANS;</div><div class='add'>+	layers[0].is_virt_csrow = false;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_SLOT;</div><div class='add'>+	layers[1].size = MAX_DIMMS;</div><div class='add'>+	layers[1].is_virt_csrow = true;</div><div class='add'>+	mci = edac_mc_alloc(i7core_dev-&gt;socket, ARRAY_SIZE(layers), layers,</div><div class='add'>+			    sizeof(*pvt));</div><div class='ctx'> 	if (unlikely(!mci))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c<br/>index 3bf2b2f490e7..52072c28a8a6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/i82443bxgx_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/i82443bxgx_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/i82443bxgx_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i82443bxgx_edac.c</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'>  * 440GX fix by Jason Uhlenkott &lt;juhlenko@akamai.com&gt;.</div><div class='ctx'>  *</div><div class='ctx'>  * Written with reference to 82443BX Host Bridge Datasheet:</div><div class='del'>- * http://download.intel.com/design/chipsets/datashts/29063301.pdf </div><div class='add'>+ * http://download.intel.com/design/chipsets/datashts/29063301.pdf</div><div class='ctx'>  * references to this document given in [].</div><div class='ctx'>  *</div><div class='ctx'>  * This module doesn't support the 440LX, but it may be possible to</div><div class='hunk'>@@ -156,19 +156,19 @@ static int i82443bxgx_edacmc_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 	if (info-&gt;eap &amp; I82443BXGX_EAP_OFFSET_SBE) {</div><div class='ctx'> 		error_found = 1;</div><div class='ctx'> 		if (handle_errors)</div><div class='del'>-			edac_mc_handle_ce(mci, page, pageoffset,</div><div class='del'>-				/* 440BX/GX don't make syndrome information</div><div class='del'>-				 * available */</div><div class='del'>-				0, edac_mc_find_csrow_by_page(mci, page), 0,</div><div class='del'>-				mci-&gt;ctl_name);</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+					     page, pageoffset, 0,</div><div class='add'>+					     edac_mc_find_csrow_by_page(mci, page),</div><div class='add'>+					     0, -1, mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (info-&gt;eap &amp; I82443BXGX_EAP_OFFSET_MBE) {</div><div class='ctx'> 		error_found = 1;</div><div class='ctx'> 		if (handle_errors)</div><div class='del'>-			edac_mc_handle_ue(mci, page, pageoffset,</div><div class='del'>-					edac_mc_find_csrow_by_page(mci, page),</div><div class='del'>-					mci-&gt;ctl_name);</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+					     page, pageoffset, 0,</div><div class='add'>+					     edac_mc_find_csrow_by_page(mci, page),</div><div class='add'>+					     0, -1, mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return error_found;</div><div class='hunk'>@@ -189,6 +189,7 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> 				enum mem_type mtype)</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='ctx'> 	int index;</div><div class='ctx'> 	u8 drbar, dramc;</div><div class='ctx'> 	u32 row_base, row_high_limit, row_high_limit_last;</div><div class='hunk'>@@ -197,6 +198,8 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> 	row_high_limit_last = 0;</div><div class='ctx'> 	for (index = 0; index &lt; mci-&gt;nr_csrows; index++) {</div><div class='ctx'> 		csrow = &amp;mci-&gt;csrows[index];</div><div class='add'>+		dimm = csrow-&gt;channels[0].dimm;</div><div class='add'>+</div><div class='ctx'> 		pci_read_config_byte(pdev, I82443BXGX_DRB + index, &amp;drbar);</div><div class='ctx'> 		debugf1("MC%d: %s: %s() Row=%d DRB = %#0x\n",</div><div class='ctx'> 			mci-&gt;mc_idx, __FILE__, __func__, index, drbar);</div><div class='hunk'>@@ -217,14 +220,14 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> 		row_base = row_high_limit_last;</div><div class='ctx'> 		csrow-&gt;first_page = row_base &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 		csrow-&gt;last_page = (row_high_limit &gt;&gt; PAGE_SHIFT) - 1;</div><div class='del'>-		csrow-&gt;nr_pages = csrow-&gt;last_page - csrow-&gt;first_page + 1;</div><div class='add'>+		dimm-&gt;nr_pages = csrow-&gt;last_page - csrow-&gt;first_page + 1;</div><div class='ctx'> 		/* EAP reports in 4kilobyte granularity [61] */</div><div class='del'>-		csrow-&gt;grain = 1 &lt;&lt; 12;</div><div class='del'>-		csrow-&gt;mtype = mtype;</div><div class='add'>+		dimm-&gt;grain = 1 &lt;&lt; 12;</div><div class='add'>+		dimm-&gt;mtype = mtype;</div><div class='ctx'> 		/* I don't think 440BX can tell you device type? FIXME? */</div><div class='del'>-		csrow-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+		dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='ctx'> 		/* Mode is global to all rows on 440BX */</div><div class='del'>-		csrow-&gt;edac_mode = edac_mode;</div><div class='add'>+		dimm-&gt;edac_mode = edac_mode;</div><div class='ctx'> 		row_high_limit_last = row_high_limit;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -232,6 +235,7 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	u8 dramc;</div><div class='ctx'> 	u32 nbxcfg, ecc_mode;</div><div class='ctx'> 	enum mem_type mtype;</div><div class='hunk'>@@ -245,8 +249,13 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	if (pci_read_config_dword(pdev, I82443BXGX_NBXCFG, &amp;nbxcfg))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	mci = edac_mc_alloc(0, I82443BXGX_NR_CSROWS, I82443BXGX_NR_CHANS, 0);</div><div class='del'>-</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = I82443BXGX_NR_CSROWS;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = I82443BXGX_NR_CHANS;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0);</div><div class='ctx'> 	if (mci == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c<br/>index c779092d18d1..08045059d10b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/i82860_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/i82860_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/i82860_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i82860_edac.c</a></div><div class='hunk'>@@ -99,6 +99,7 @@ static int i82860_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 				struct i82860_error_info *info,</div><div class='ctx'> 				int handle_errors)</div><div class='ctx'> {</div><div class='add'>+	struct dimm_info *dimm;</div><div class='ctx'> 	int row;</div><div class='ctx'> </div><div class='ctx'> 	if (!(info-&gt;errsts2 &amp; 0x0003))</div><div class='hunk'>@@ -108,18 +109,25 @@ static int i82860_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	if ((info-&gt;errsts ^ info-&gt;errsts2) &amp; 0x0003) {</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, "UE overwrote CE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,</div><div class='add'>+				     -1, -1, -1, "UE overwrote CE", "", NULL);</div><div class='ctx'> 		info-&gt;errsts = info-&gt;errsts2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;eap &gt;&gt;= PAGE_SHIFT;</div><div class='ctx'> 	row = edac_mc_find_csrow_by_page(mci, info-&gt;eap);</div><div class='add'>+	dimm = mci-&gt;csrows[row].channels[0].dimm;</div><div class='ctx'> </div><div class='ctx'> 	if (info-&gt;errsts &amp; 0x0002)</div><div class='del'>-		edac_mc_handle_ue(mci, info-&gt;eap, 0, row, "i82860 UE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+				     info-&gt;eap, 0, 0,</div><div class='add'>+				     dimm-&gt;location[0], dimm-&gt;location[1], -1,</div><div class='add'>+				     "i82860 UE", "", NULL);</div><div class='ctx'> 	else</div><div class='del'>-		edac_mc_handle_ce(mci, info-&gt;eap, 0, info-&gt;derrsyn, row, 0,</div><div class='del'>-				"i82860 UE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+				     info-&gt;eap, 0, info-&gt;derrsyn,</div><div class='add'>+				     dimm-&gt;location[0], dimm-&gt;location[1], -1,</div><div class='add'>+				     "i82860 CE", "", NULL);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -140,6 +148,7 @@ static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev)</div><div class='ctx'> 	u16 value;</div><div class='ctx'> 	u32 cumul_size;</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='ctx'> 	int index;</div><div class='ctx'> </div><div class='ctx'> 	pci_read_config_word(pdev, I82860_MCHCFG, &amp;mchcfg_ddim);</div><div class='hunk'>@@ -153,6 +162,8 @@ static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (index = 0; index &lt; mci-&gt;nr_csrows; index++) {</div><div class='ctx'> 		csrow = &amp;mci-&gt;csrows[index];</div><div class='add'>+		dimm = csrow-&gt;channels[0].dimm;</div><div class='add'>+</div><div class='ctx'> 		pci_read_config_word(pdev, I82860_GBA + index * 2, &amp;value);</div><div class='ctx'> 		cumul_size = (value &amp; I82860_GBA_MASK) &lt;&lt;</div><div class='ctx'> 			(I82860_GBA_SHIFT - PAGE_SHIFT);</div><div class='hunk'>@@ -164,30 +175,38 @@ static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 		csrow-&gt;first_page = last_cumul_size;</div><div class='ctx'> 		csrow-&gt;last_page = cumul_size - 1;</div><div class='del'>-		csrow-&gt;nr_pages = cumul_size - last_cumul_size;</div><div class='add'>+		dimm-&gt;nr_pages = cumul_size - last_cumul_size;</div><div class='ctx'> 		last_cumul_size = cumul_size;</div><div class='del'>-		csrow-&gt;grain = 1 &lt;&lt; 12;	/* I82860_EAP has 4KiB reolution */</div><div class='del'>-		csrow-&gt;mtype = MEM_RMBS;</div><div class='del'>-		csrow-&gt;dtype = DEV_UNKNOWN;</div><div class='del'>-		csrow-&gt;edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;</div><div class='add'>+		dimm-&gt;grain = 1 &lt;&lt; 12;	/* I82860_EAP has 4KiB reolution */</div><div class='add'>+		dimm-&gt;mtype = MEM_RMBS;</div><div class='add'>+		dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+		dimm-&gt;edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int i82860_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	struct i82860_error_info discard;</div><div class='ctx'> </div><div class='del'>-	/* RDRAM has channels but these don't map onto the abstractions that</div><div class='del'>-	   edac uses.</div><div class='del'>-	   The device groups from the GRA registers seem to map reasonably</div><div class='del'>-	   well onto the notion of a chip select row.</div><div class='del'>-	   There are 16 GRA registers and since the name is associated with</div><div class='del'>-	   the channel and the GRA registers map to physical devices so we are</div><div class='del'>-	   going to make 1 channel for group.</div><div class='add'>+	/*</div><div class='add'>+	 * RDRAM has channels but these don't map onto the csrow abstraction.</div><div class='add'>+	 * According with the datasheet, there are 2 Rambus channels, supporting</div><div class='add'>+	 * up to 16 direct RDRAM devices.</div><div class='add'>+	 * The device groups from the GRA registers seem to map reasonably</div><div class='add'>+	 * well onto the notion of a chip select row.</div><div class='add'>+	 * There are 16 GRA registers and since the name is associated with</div><div class='add'>+	 * the channel and the GRA registers map to physical devices so we are</div><div class='add'>+	 * going to make 1 channel for group.</div><div class='ctx'> 	 */</div><div class='del'>-	mci = edac_mc_alloc(0, 16, 1, 0);</div><div class='del'>-</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[0].size = 2;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_SLOT;</div><div class='add'>+	layers[1].size = 8;</div><div class='add'>+	layers[1].is_virt_csrow = true;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0);</div><div class='ctx'> 	if (!mci)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c<br/>index 10f15d85fb5e..b613e31c16e5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/i82875p_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/i82875p_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/i82875p_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i82875p_edac.c</a></div><div class='hunk'>@@ -38,7 +38,8 @@</div><div class='ctx'> #endif				/* PCI_DEVICE_ID_INTEL_82875_6 */</div><div class='ctx'> </div><div class='ctx'> /* four csrows in dual channel, eight in single channel */</div><div class='del'>-#define I82875P_NR_CSROWS(nr_chans) (8/(nr_chans))</div><div class='add'>+#define I82875P_NR_DIMMS		8</div><div class='add'>+#define I82875P_NR_CSROWS(nr_chans)	(I82875P_NR_DIMMS / (nr_chans))</div><div class='ctx'> </div><div class='ctx'> /* Intel 82875p register addresses - device 0 function 0 - DRAM Controller */</div><div class='ctx'> #define I82875P_EAP		0x58	/* Error Address Pointer (32b)</div><div class='hunk'>@@ -235,7 +236,9 @@ static int i82875p_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	if ((info-&gt;errsts ^ info-&gt;errsts2) &amp; 0x0081) {</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, "UE overwrote CE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,</div><div class='add'>+				     -1, -1, -1,</div><div class='add'>+				     "UE overwrote CE", "", NULL);</div><div class='ctx'> 		info-&gt;errsts = info-&gt;errsts2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -243,11 +246,15 @@ static int i82875p_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 	row = edac_mc_find_csrow_by_page(mci, info-&gt;eap);</div><div class='ctx'> </div><div class='ctx'> 	if (info-&gt;errsts &amp; 0x0080)</div><div class='del'>-		edac_mc_handle_ue(mci, info-&gt;eap, 0, row, "i82875p UE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+				     info-&gt;eap, 0, 0,</div><div class='add'>+				     row, -1, -1,</div><div class='add'>+				     "i82875p UE", "", NULL);</div><div class='ctx'> 	else</div><div class='del'>-		edac_mc_handle_ce(mci, info-&gt;eap, 0, info-&gt;derrsyn, row,</div><div class='del'>-				multi_chan ? (info-&gt;des &amp; 0x1) : 0,</div><div class='del'>-				"i82875p CE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     info-&gt;eap, 0, info-&gt;derrsyn,</div><div class='add'>+				     row, multi_chan ? (info-&gt;des &amp; 0x1) : 0,</div><div class='add'>+				     -1, "i82875p CE", "", NULL);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -342,11 +349,13 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> 				void __iomem * ovrfl_window, u32 drc)</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='add'>+	unsigned nr_chans = dual_channel_active(drc) + 1;</div><div class='ctx'> 	unsigned long last_cumul_size;</div><div class='ctx'> 	u8 value;</div><div class='ctx'> 	u32 drc_ddim;		/* DRAM Data Integrity Mode 0=none,2=edac */</div><div class='del'>-	u32 cumul_size;</div><div class='del'>-	int index;</div><div class='add'>+	u32 cumul_size, nr_pages;</div><div class='add'>+	int index, j;</div><div class='ctx'> </div><div class='ctx'> 	drc_ddim = (drc &gt;&gt; 18) &amp; 0x1;</div><div class='ctx'> 	last_cumul_size = 0;</div><div class='hunk'>@@ -369,12 +378,18 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 		csrow-&gt;first_page = last_cumul_size;</div><div class='ctx'> 		csrow-&gt;last_page = cumul_size - 1;</div><div class='del'>-		csrow-&gt;nr_pages = cumul_size - last_cumul_size;</div><div class='add'>+		nr_pages = cumul_size - last_cumul_size;</div><div class='ctx'> 		last_cumul_size = cumul_size;</div><div class='del'>-		csrow-&gt;grain = 1 &lt;&lt; 12;	/* I82875P_EAP has 4KiB reolution */</div><div class='del'>-		csrow-&gt;mtype = MEM_DDR;</div><div class='del'>-		csrow-&gt;dtype = DEV_UNKNOWN;</div><div class='del'>-		csrow-&gt;edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; nr_chans; j++) {</div><div class='add'>+			dimm = csrow-&gt;channels[j].dimm;</div><div class='add'>+</div><div class='add'>+			dimm-&gt;nr_pages = nr_pages / nr_chans;</div><div class='add'>+			dimm-&gt;grain = 1 &lt;&lt; 12;	/* I82875P_EAP has 4KiB reolution */</div><div class='add'>+			dimm-&gt;mtype = MEM_DDR;</div><div class='add'>+			dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+			dimm-&gt;edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -382,6 +397,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = -ENODEV;</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	struct i82875p_pvt *pvt;</div><div class='ctx'> 	struct pci_dev *ovrfl_pdev;</div><div class='ctx'> 	void __iomem *ovrfl_window;</div><div class='hunk'>@@ -397,9 +413,14 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	drc = readl(ovrfl_window + I82875P_DRC);</div><div class='ctx'> 	nr_chans = dual_channel_active(drc) + 1;</div><div class='del'>-	mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),</div><div class='del'>-			nr_chans, 0);</div><div class='ctx'> </div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = I82875P_NR_CSROWS(nr_chans);</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = nr_chans;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));</div><div class='ctx'> 	if (!mci) {</div><div class='ctx'> 		rc = -ENOMEM;</div><div class='ctx'> 		goto fail0;</div><div class='head'>diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c<br/>index 0cd8368f88f8..433332c7cdba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/i82975x_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/i82975x_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/i82975x_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/i82975x_edac.c</a></div><div class='hunk'>@@ -29,7 +29,8 @@</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_82975_0	0x277c</div><div class='ctx'> #endif				/* PCI_DEVICE_ID_INTEL_82975_0 */</div><div class='ctx'> </div><div class='del'>-#define I82975X_NR_CSROWS(nr_chans)		(8/(nr_chans))</div><div class='add'>+#define I82975X_NR_DIMMS		8</div><div class='add'>+#define I82975X_NR_CSROWS(nr_chans)	(I82975X_NR_DIMMS / (nr_chans))</div><div class='ctx'> </div><div class='ctx'> /* Intel 82975X register addresses - device 0 function 0 - DRAM Controller */</div><div class='ctx'> #define I82975X_EAP		0x58	/* Dram Error Address Pointer (32b)</div><div class='hunk'>@@ -287,7 +288,8 @@ static int i82975x_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	if ((info-&gt;errsts ^ info-&gt;errsts2) &amp; 0x0003) {</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, "UE overwrote CE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,</div><div class='add'>+				     -1, -1, -1, "UE overwrote CE", "", NULL);</div><div class='ctx'> 		info-&gt;errsts = info-&gt;errsts2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -309,13 +311,18 @@ static int i82975x_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 	chan = (mci-&gt;csrows[row].nr_channels == 1) ? 0 : info-&gt;eap &amp; 1;</div><div class='ctx'> 	offst = info-&gt;eap</div><div class='ctx'> 			&amp; ((1 &lt;&lt; PAGE_SHIFT) -</div><div class='del'>-				(1 &lt;&lt; mci-&gt;csrows[row].grain));</div><div class='add'>+			   (1 &lt;&lt; mci-&gt;csrows[row].channels[chan].dimm-&gt;grain));</div><div class='ctx'> </div><div class='ctx'> 	if (info-&gt;errsts &amp; 0x0002)</div><div class='del'>-		edac_mc_handle_ue(mci, page, offst , row, "i82975x UE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+				     page, offst, 0,</div><div class='add'>+				     row, -1, -1,</div><div class='add'>+				     "i82975x UE", "", NULL);</div><div class='ctx'> 	else</div><div class='del'>-		edac_mc_handle_ce(mci, page, offst, info-&gt;derrsyn, row,</div><div class='del'>-				chan, "i82975x CE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     page, offst, info-&gt;derrsyn,</div><div class='add'>+				     row, chan ? chan : 0, -1,</div><div class='add'>+				     "i82975x CE", "", NULL);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -370,8 +377,10 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='ctx'> 	unsigned long last_cumul_size;</div><div class='ctx'> 	u8 value;</div><div class='del'>-	u32 cumul_size;</div><div class='add'>+	u32 cumul_size, nr_pages;</div><div class='ctx'> 	int index, chan;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='add'>+	enum dev_type dtype;</div><div class='ctx'> </div><div class='ctx'> 	last_cumul_size = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -400,28 +409,33 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> 		debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,</div><div class='ctx'> 			cumul_size);</div><div class='ctx'> </div><div class='add'>+		nr_pages = cumul_size - last_cumul_size;</div><div class='add'>+		if (!nr_pages)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Initialise dram labels</div><div class='ctx'> 		 * index values:</div><div class='ctx'> 		 *   [0-7] for single-channel; i.e. csrow-&gt;nr_channels = 1</div><div class='ctx'> 		 *   [0-3] for dual-channel; i.e. csrow-&gt;nr_channels = 2</div><div class='ctx'> 		 */</div><div class='del'>-		for (chan = 0; chan &lt; csrow-&gt;nr_channels; chan++)</div><div class='del'>-			strncpy(csrow-&gt;channels[chan].label,</div><div class='add'>+		dtype = i82975x_dram_type(mch_window, index);</div><div class='add'>+		for (chan = 0; chan &lt; csrow-&gt;nr_channels; chan++) {</div><div class='add'>+			dimm = mci-&gt;csrows[index].channels[chan].dimm;</div><div class='add'>+</div><div class='add'>+			dimm-&gt;nr_pages = nr_pages / csrow-&gt;nr_channels;</div><div class='add'>+			strncpy(csrow-&gt;channels[chan].dimm-&gt;label,</div><div class='ctx'> 					labels[(index &gt;&gt; 1) + (chan * 2)],</div><div class='ctx'> 					EDAC_MC_LABEL_LEN);</div><div class='del'>-</div><div class='del'>-		if (cumul_size == last_cumul_size)</div><div class='del'>-			continue;	/* not populated */</div><div class='add'>+			dimm-&gt;grain = 1 &lt;&lt; 7;	/* 128Byte cache-line resolution */</div><div class='add'>+			dimm-&gt;dtype = i82975x_dram_type(mch_window, index);</div><div class='add'>+			dimm-&gt;mtype = MEM_DDR2; /* I82975x supports only DDR2 */</div><div class='add'>+			dimm-&gt;edac_mode = EDAC_SECDED; /* only supported */</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		csrow-&gt;first_page = last_cumul_size;</div><div class='ctx'> 		csrow-&gt;last_page = cumul_size - 1;</div><div class='del'>-		csrow-&gt;nr_pages = cumul_size - last_cumul_size;</div><div class='ctx'> 		last_cumul_size = cumul_size;</div><div class='del'>-		csrow-&gt;grain = 1 &lt;&lt; 7;	/* 128Byte cache-line resolution */</div><div class='del'>-		csrow-&gt;mtype = MEM_DDR2; /* I82975x supports only DDR2 */</div><div class='del'>-		csrow-&gt;dtype = i82975x_dram_type(mch_window, index);</div><div class='del'>-		csrow-&gt;edac_mode = EDAC_SECDED; /* only supported */</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -463,6 +477,7 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = -ENODEV;</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	struct i82975x_pvt *pvt;</div><div class='ctx'> 	void __iomem *mch_window;</div><div class='ctx'> 	u32 mchbar;</div><div class='hunk'>@@ -531,8 +546,13 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	chans = dual_channel_active(mch_window) + 1;</div><div class='ctx'> </div><div class='ctx'> 	/* assuming only one controller, index thus is 0 */</div><div class='del'>-	mci = edac_mc_alloc(sizeof(*pvt), I82975X_NR_CSROWS(chans),</div><div class='del'>-					chans, 0);</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = I82975X_NR_DIMMS;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = I82975X_NR_CSROWS(chans);</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));</div><div class='ctx'> 	if (!mci) {</div><div class='ctx'> 		rc = -ENOMEM;</div><div class='ctx'> 		goto fail1;</div><div class='head'>diff --git a/drivers/edac/mce_amd.h b/drivers/edac/mce_amd.h<br/>index c6074c5cd1ef..8c87a5e87057 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/mce_amd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/mce_amd.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/mce_amd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/mce_amd.h</a></div><div class='hunk'>@@ -5,8 +5,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='ctx'> </div><div class='del'>-#define BIT_64(n)			(U64_C(1) &lt;&lt; (n))</div><div class='del'>-</div><div class='ctx'> #define EC(x)				((x) &amp; 0xffff)</div><div class='ctx'> #define XEC(x, mask)			(((x) &gt;&gt; 16) &amp; mask)</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c<br/>index 73464a62adf7..4c402353ba98 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/mpc85xx_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/mpc85xx_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/mpc85xx_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/mpc85xx_edac.c</a></div><div class='hunk'>@@ -854,12 +854,16 @@ static void mpc85xx_mc_check(struct mem_ctl_info *mci)</div><div class='ctx'> 		mpc85xx_mc_printk(mci, KERN_ERR, "PFN out of range!\n");</div><div class='ctx'> </div><div class='ctx'> 	if (err_detect &amp; DDR_EDE_SBE)</div><div class='del'>-		edac_mc_handle_ce(mci, pfn, err_addr &amp; ~PAGE_MASK,</div><div class='del'>-				  syndrome, row_index, 0, mci-&gt;ctl_name);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     pfn, err_addr &amp; ~PAGE_MASK, syndrome,</div><div class='add'>+				     row_index, 0, -1,</div><div class='add'>+				     mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (err_detect &amp; DDR_EDE_MBE)</div><div class='del'>-		edac_mc_handle_ue(mci, pfn, err_addr &amp; ~PAGE_MASK,</div><div class='del'>-				  row_index, mci-&gt;ctl_name);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+				     pfn, err_addr &amp; ~PAGE_MASK, syndrome,</div><div class='add'>+				     row_index, 0, -1,</div><div class='add'>+				     mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> </div><div class='ctx'> 	out_be32(pdata-&gt;mc_vbase + MPC85XX_MC_ERR_DETECT, err_detect);</div><div class='ctx'> }</div><div class='hunk'>@@ -883,6 +887,7 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpc85xx_mc_pdata *pdata = mci-&gt;pvt_info;</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='ctx'> 	u32 sdram_ctl;</div><div class='ctx'> 	u32 sdtype;</div><div class='ctx'> 	enum mem_type mtype;</div><div class='hunk'>@@ -929,6 +934,8 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> 		u32 end;</div><div class='ctx'> </div><div class='ctx'> 		csrow = &amp;mci-&gt;csrows[index];</div><div class='add'>+		dimm = csrow-&gt;channels[0].dimm;</div><div class='add'>+</div><div class='ctx'> 		cs_bnds = in_be32(pdata-&gt;mc_vbase + MPC85XX_MC_CS_BNDS_0 +</div><div class='ctx'> 				  (index * MPC85XX_MC_CS_BNDS_OFS));</div><div class='ctx'> </div><div class='hunk'>@@ -944,19 +951,21 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> </div><div class='ctx'> 		csrow-&gt;first_page = start;</div><div class='ctx'> 		csrow-&gt;last_page = end;</div><div class='del'>-		csrow-&gt;nr_pages = end + 1 - start;</div><div class='del'>-		csrow-&gt;grain = 8;</div><div class='del'>-		csrow-&gt;mtype = mtype;</div><div class='del'>-		csrow-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+</div><div class='add'>+		dimm-&gt;nr_pages = end + 1 - start;</div><div class='add'>+		dimm-&gt;grain = 8;</div><div class='add'>+		dimm-&gt;mtype = mtype;</div><div class='add'>+		dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='ctx'> 		if (sdram_ctl &amp; DSC_X32_EN)</div><div class='del'>-			csrow-&gt;dtype = DEV_X32;</div><div class='del'>-		csrow-&gt;edac_mode = EDAC_SECDED;</div><div class='add'>+			dimm-&gt;dtype = DEV_X32;</div><div class='add'>+		dimm-&gt;edac_mode = EDAC_SECDED;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devinit mpc85xx_mc_err_probe(struct platform_device *op)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	struct mpc85xx_mc_pdata *pdata;</div><div class='ctx'> 	struct resource r;</div><div class='ctx'> 	u32 sdram_ctl;</div><div class='hunk'>@@ -965,7 +974,13 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op)</div><div class='ctx'> 	if (!devres_open_group(&amp;op-&gt;dev, mpc85xx_mc_err_probe, GFP_KERNEL))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	mci = edac_mc_alloc(sizeof(*pdata), 4, 1, edac_mc_idx);</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = 4;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = 1;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), sizeof(*pdata));</div><div class='ctx'> 	if (!mci) {</div><div class='ctx'> 		devres_release_group(&amp;op-&gt;dev, mpc85xx_mc_err_probe);</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c<br/>index 7e5ff367705c..b0bb5a3d2527 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/mv64x60_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/mv64x60_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/mv64x60_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/mv64x60_edac.c</a></div><div class='hunk'>@@ -611,12 +611,17 @@ static void mv64x60_mc_check(struct mem_ctl_info *mci)</div><div class='ctx'> </div><div class='ctx'> 	/* first bit clear in ECC Err Reg, 1 bit error, correctable by HW */</div><div class='ctx'> 	if (!(reg &amp; 0x1))</div><div class='del'>-		edac_mc_handle_ce(mci, err_addr &gt;&gt; PAGE_SHIFT,</div><div class='del'>-				  err_addr &amp; PAGE_MASK, syndrome, 0, 0,</div><div class='del'>-				  mci-&gt;ctl_name);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     err_addr &gt;&gt; PAGE_SHIFT,</div><div class='add'>+				     err_addr &amp; PAGE_MASK, syndrome,</div><div class='add'>+				     0, 0, -1,</div><div class='add'>+				     mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> 	else	/* 2 bit error, UE */</div><div class='del'>-		edac_mc_handle_ue(mci, err_addr &gt;&gt; PAGE_SHIFT,</div><div class='del'>-				  err_addr &amp; PAGE_MASK, 0, mci-&gt;ctl_name);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+				     err_addr &gt;&gt; PAGE_SHIFT,</div><div class='add'>+				     err_addr &amp; PAGE_MASK, 0,</div><div class='add'>+				     0, 0, -1,</div><div class='add'>+				     mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* clear the error */</div><div class='ctx'> 	out_le32(pdata-&gt;mc_vbase + MV64X60_SDRAM_ERR_ADDR, 0);</div><div class='hunk'>@@ -656,6 +661,8 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> 				struct mv64x60_mc_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='add'>+</div><div class='ctx'> 	u32 devtype;</div><div class='ctx'> 	u32 ctl;</div><div class='ctx'> </div><div class='hunk'>@@ -664,35 +671,36 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> 	ctl = in_le32(pdata-&gt;mc_vbase + MV64X60_SDRAM_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	csrow = &amp;mci-&gt;csrows[0];</div><div class='del'>-	csrow-&gt;first_page = 0;</div><div class='del'>-	csrow-&gt;nr_pages = pdata-&gt;total_mem &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	csrow-&gt;last_page = csrow-&gt;first_page + csrow-&gt;nr_pages - 1;</div><div class='del'>-	csrow-&gt;grain = 8;</div><div class='add'>+	dimm = csrow-&gt;channels[0].dimm;</div><div class='add'>+</div><div class='add'>+	dimm-&gt;nr_pages = pdata-&gt;total_mem &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	dimm-&gt;grain = 8;</div><div class='ctx'> </div><div class='del'>-	csrow-&gt;mtype = (ctl &amp; MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR;</div><div class='add'>+	dimm-&gt;mtype = (ctl &amp; MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR;</div><div class='ctx'> </div><div class='ctx'> 	devtype = (ctl &gt;&gt; 20) &amp; 0x3;</div><div class='ctx'> 	switch (devtype) {</div><div class='ctx'> 	case 0x0:</div><div class='del'>-		csrow-&gt;dtype = DEV_X32;</div><div class='add'>+		dimm-&gt;dtype = DEV_X32;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x2:		/* could be X8 too, but no way to tell */</div><div class='del'>-		csrow-&gt;dtype = DEV_X16;</div><div class='add'>+		dimm-&gt;dtype = DEV_X16;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x3:</div><div class='del'>-		csrow-&gt;dtype = DEV_X4;</div><div class='add'>+		dimm-&gt;dtype = DEV_X4;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		csrow-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+		dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	csrow-&gt;edac_mode = EDAC_SECDED;</div><div class='add'>+	dimm-&gt;edac_mode = EDAC_SECDED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	struct mv64x60_mc_pdata *pdata;</div><div class='ctx'> 	struct resource *r;</div><div class='ctx'> 	u32 ctl;</div><div class='hunk'>@@ -701,7 +709,14 @@ static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!devres_open_group(&amp;pdev-&gt;dev, mv64x60_mc_err_probe, GFP_KERNEL))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	mci = edac_mc_alloc(sizeof(struct mv64x60_mc_pdata), 1, 1, edac_mc_idx);</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = 1;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = 1;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers,</div><div class='add'>+			    sizeof(struct mv64x60_mc_pdata));</div><div class='ctx'> 	if (!mci) {</div><div class='ctx'> 		printk(KERN_ERR "%s: No memory for CPU err\n", __func__);</div><div class='ctx'> 		devres_release_group(&amp;pdev-&gt;dev, mv64x60_mc_err_probe);</div><div class='head'>diff --git a/drivers/edac/pasemi_edac.c b/drivers/edac/pasemi_edac.c<br/>index 7f71ee436744..b095a906a994 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/pasemi_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/pasemi_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/pasemi_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/pasemi_edac.c</a></div><div class='hunk'>@@ -110,15 +110,16 @@ static void pasemi_edac_process_error_info(struct mem_ctl_info *mci, u32 errsta)</div><div class='ctx'> 	/* uncorrectable/multi-bit errors */</div><div class='ctx'> 	if (errsta &amp; (MCDEBUG_ERRSTA_MBE_STATUS |</div><div class='ctx'> 		      MCDEBUG_ERRSTA_RFL_STATUS)) {</div><div class='del'>-		edac_mc_handle_ue(mci, mci-&gt;csrows[cs].first_page, 0,</div><div class='del'>-				  cs, mci-&gt;ctl_name);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+				     mci-&gt;csrows[cs].first_page, 0, 0,</div><div class='add'>+				     cs, 0, -1, mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* correctable/single-bit errors */</div><div class='del'>-	if (errsta &amp; MCDEBUG_ERRSTA_SBE_STATUS) {</div><div class='del'>-		edac_mc_handle_ce(mci, mci-&gt;csrows[cs].first_page, 0,</div><div class='del'>-				  0, cs, 0, mci-&gt;ctl_name);</div><div class='del'>-	}</div><div class='add'>+	if (errsta &amp; MCDEBUG_ERRSTA_SBE_STATUS)</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     mci-&gt;csrows[cs].first_page, 0, 0,</div><div class='add'>+				     cs, 0, -1, mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pasemi_edac_check(struct mem_ctl_info *mci)</div><div class='hunk'>@@ -135,11 +136,13 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> 				   enum edac_type edac_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='ctx'> 	u32 rankcfg;</div><div class='ctx'> 	int index;</div><div class='ctx'> </div><div class='ctx'> 	for (index = 0; index &lt; mci-&gt;nr_csrows; index++) {</div><div class='ctx'> 		csrow = &amp;mci-&gt;csrows[index];</div><div class='add'>+		dimm = csrow-&gt;channels[0].dimm;</div><div class='ctx'> </div><div class='ctx'> 		pci_read_config_dword(pdev,</div><div class='ctx'> 				      MCDRAM_RANKCFG + (index * 12),</div><div class='hunk'>@@ -151,20 +154,20 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> 		switch ((rankcfg &amp; MCDRAM_RANKCFG_TYPE_SIZE_M) &gt;&gt;</div><div class='ctx'> 			MCDRAM_RANKCFG_TYPE_SIZE_S) {</div><div class='ctx'> 		case 0:</div><div class='del'>-			csrow-&gt;nr_pages = 128 &lt;&lt; (20 - PAGE_SHIFT);</div><div class='add'>+			dimm-&gt;nr_pages = 128 &lt;&lt; (20 - PAGE_SHIFT);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 1:</div><div class='del'>-			csrow-&gt;nr_pages = 256 &lt;&lt; (20 - PAGE_SHIFT);</div><div class='add'>+			dimm-&gt;nr_pages = 256 &lt;&lt; (20 - PAGE_SHIFT);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 2:</div><div class='ctx'> 		case 3:</div><div class='del'>-			csrow-&gt;nr_pages = 512 &lt;&lt; (20 - PAGE_SHIFT);</div><div class='add'>+			dimm-&gt;nr_pages = 512 &lt;&lt; (20 - PAGE_SHIFT);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 4:</div><div class='del'>-			csrow-&gt;nr_pages = 1024 &lt;&lt; (20 - PAGE_SHIFT);</div><div class='add'>+			dimm-&gt;nr_pages = 1024 &lt;&lt; (20 - PAGE_SHIFT);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 5:</div><div class='del'>-			csrow-&gt;nr_pages = 2048 &lt;&lt; (20 - PAGE_SHIFT);</div><div class='add'>+			dimm-&gt;nr_pages = 2048 &lt;&lt; (20 - PAGE_SHIFT);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			edac_mc_printk(mci, KERN_ERR,</div><div class='hunk'>@@ -174,13 +177,13 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		csrow-&gt;first_page = last_page_in_mmc;</div><div class='del'>-		csrow-&gt;last_page = csrow-&gt;first_page + csrow-&gt;nr_pages - 1;</div><div class='del'>-		last_page_in_mmc += csrow-&gt;nr_pages;</div><div class='add'>+		csrow-&gt;last_page = csrow-&gt;first_page + dimm-&gt;nr_pages - 1;</div><div class='add'>+		last_page_in_mmc += dimm-&gt;nr_pages;</div><div class='ctx'> 		csrow-&gt;page_mask = 0;</div><div class='del'>-		csrow-&gt;grain = PASEMI_EDAC_ERROR_GRAIN;</div><div class='del'>-		csrow-&gt;mtype = MEM_DDR;</div><div class='del'>-		csrow-&gt;dtype = DEV_UNKNOWN;</div><div class='del'>-		csrow-&gt;edac_mode = edac_mode;</div><div class='add'>+		dimm-&gt;grain = PASEMI_EDAC_ERROR_GRAIN;</div><div class='add'>+		dimm-&gt;mtype = MEM_DDR;</div><div class='add'>+		dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+		dimm-&gt;edac_mode = edac_mode;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -189,6 +192,7 @@ static int __devinit pasemi_edac_probe(struct pci_dev *pdev,</div><div class='ctx'> 		const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci = NULL;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	u32 errctl1, errcor, scrub, mcen;</div><div class='ctx'> </div><div class='ctx'> 	pci_read_config_dword(pdev, MCCFG_MCEN, &amp;mcen);</div><div class='hunk'>@@ -205,9 +209,14 @@ static int __devinit pasemi_edac_probe(struct pci_dev *pdev,</div><div class='ctx'> 		MCDEBUG_ERRCTL1_RFL_LOG_EN;</div><div class='ctx'> 	pci_write_config_dword(pdev, MCDEBUG_ERRCTL1, errctl1);</div><div class='ctx'> </div><div class='del'>-	mci = edac_mc_alloc(0, PASEMI_EDAC_NR_CSROWS, PASEMI_EDAC_NR_CHANS,</div><div class='del'>-				system_mmc_id++);</div><div class='del'>-</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = PASEMI_EDAC_NR_CSROWS;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = PASEMI_EDAC_NR_CHANS;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(system_mmc_id++, ARRAY_SIZE(layers), layers,</div><div class='add'>+			    0);</div><div class='ctx'> 	if (mci == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c<br/>index d427c69bb8b1..f3f9fed06ad7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/ppc4xx_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/ppc4xx_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/ppc4xx_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/ppc4xx_edac.c</a></div><div class='hunk'>@@ -727,7 +727,10 @@ ppc4xx_edac_handle_ce(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 	for (row = 0; row &lt; mci-&gt;nr_csrows; row++)</div><div class='ctx'> 		if (ppc4xx_edac_check_bank_error(status, row))</div><div class='del'>-			edac_mc_handle_ce_no_info(mci, message);</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+					     0, 0, 0,</div><div class='add'>+					     row, 0, -1,</div><div class='add'>+					     message, "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -755,7 +758,10 @@ ppc4xx_edac_handle_ue(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 	for (row = 0; row &lt; mci-&gt;nr_csrows; row++)</div><div class='ctx'> 		if (ppc4xx_edac_check_bank_error(status, row))</div><div class='del'>-			edac_mc_handle_ue(mci, page, offset, row, message);</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+					     page, offset, 0,</div><div class='add'>+					     row, 0, -1,</div><div class='add'>+					     message, "", NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -895,9 +901,8 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1)</div><div class='ctx'> 	enum mem_type mtype;</div><div class='ctx'> 	enum dev_type dtype;</div><div class='ctx'> 	enum edac_type edac_mode;</div><div class='del'>-	int row;</div><div class='del'>-	u32 mbxcf, size;</div><div class='del'>-	static u32 ppc4xx_last_page;</div><div class='add'>+	int row, j;</div><div class='add'>+	u32 mbxcf, size, nr_pages;</div><div class='ctx'> </div><div class='ctx'> 	/* Establish the memory type and width */</div><div class='ctx'> </div><div class='hunk'>@@ -948,7 +953,7 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1)</div><div class='ctx'> 		case SDRAM_MBCF_SZ_2GB:</div><div class='ctx'> 		case SDRAM_MBCF_SZ_4GB:</div><div class='ctx'> 		case SDRAM_MBCF_SZ_8GB:</div><div class='del'>-			csi-&gt;nr_pages = SDRAM_MBCF_SZ_TO_PAGES(size);</div><div class='add'>+			nr_pages = SDRAM_MBCF_SZ_TO_PAGES(size);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			ppc4xx_edac_mc_printk(KERN_ERR, mci,</div><div class='hunk'>@@ -959,10 +964,6 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1)</div><div class='ctx'> 			goto done;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		csi-&gt;first_page = ppc4xx_last_page;</div><div class='del'>-		csi-&gt;last_page	= csi-&gt;first_page + csi-&gt;nr_pages - 1;</div><div class='del'>-		csi-&gt;page_mask	= 0;</div><div class='del'>-</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * It's unclear exactly what grain should be set to</div><div class='ctx'> 		 * here. The SDRAM_ECCES register allows resolution of</div><div class='hunk'>@@ -975,15 +976,17 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1)</div><div class='ctx'> 		 * possible values would be the PLB width (16), the</div><div class='ctx'> 		 * page size (PAGE_SIZE) or the memory width (2 or 4).</div><div class='ctx'> 		 */</div><div class='add'>+		for (j = 0; j &lt; csi-&gt;nr_channels; j++) {</div><div class='add'>+			struct dimm_info *dimm = csi-&gt;channels[j].dimm;</div><div class='ctx'> </div><div class='del'>-		csi-&gt;grain	= 1;</div><div class='del'>-</div><div class='del'>-		csi-&gt;mtype	= mtype;</div><div class='del'>-		csi-&gt;dtype	= dtype;</div><div class='add'>+			dimm-&gt;nr_pages  = nr_pages / csi-&gt;nr_channels;</div><div class='add'>+			dimm-&gt;grain	= 1;</div><div class='ctx'> </div><div class='del'>-		csi-&gt;edac_mode	= edac_mode;</div><div class='add'>+			dimm-&gt;mtype	= mtype;</div><div class='add'>+			dimm-&gt;dtype	= dtype;</div><div class='ctx'> </div><div class='del'>-		ppc4xx_last_page += csi-&gt;nr_pages;</div><div class='add'>+			dimm-&gt;edac_mode	= edac_mode;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'>  done:</div><div class='hunk'>@@ -1236,6 +1239,7 @@ static int __devinit ppc4xx_edac_probe(struct platform_device *op)</div><div class='ctx'> 	dcr_host_t dcr_host;</div><div class='ctx'> 	const struct device_node *np = op-&gt;dev.of_node;</div><div class='ctx'> 	struct mem_ctl_info *mci = NULL;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	static int ppc4xx_edac_instance;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1281,12 +1285,14 @@ static int __devinit ppc4xx_edac_probe(struct platform_device *op)</div><div class='ctx'> 	 * controller instance and perform the appropriate</div><div class='ctx'> 	 * initialization.</div><div class='ctx'> 	 */</div><div class='del'>-</div><div class='del'>-	mci = edac_mc_alloc(sizeof(struct ppc4xx_edac_pdata),</div><div class='del'>-			    ppc4xx_edac_nr_csrows,</div><div class='del'>-			    ppc4xx_edac_nr_chans,</div><div class='del'>-			    ppc4xx_edac_instance);</div><div class='del'>-</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = ppc4xx_edac_nr_csrows;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = ppc4xx_edac_nr_chans;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(ppc4xx_edac_instance, ARRAY_SIZE(layers), layers,</div><div class='add'>+			    sizeof(struct ppc4xx_edac_pdata));</div><div class='ctx'> 	if (mci == NULL) {</div><div class='ctx'> 		ppc4xx_edac_printk(KERN_ERR, "%s: "</div><div class='ctx'> 				   "Failed to allocate EDAC MC instance!\n",</div><div class='head'>diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c<br/>index 6d908ad72d64..e1cacd164f31 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/r82600_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/r82600_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/r82600_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/r82600_edac.c</a></div><div class='hunk'>@@ -179,10 +179,11 @@ static int r82600_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 		error_found = 1;</div><div class='ctx'> </div><div class='ctx'> 		if (handle_errors)</div><div class='del'>-			edac_mc_handle_ce(mci, page, 0,	/* not avail */</div><div class='del'>-					syndrome,</div><div class='del'>-					edac_mc_find_csrow_by_page(mci, page),</div><div class='del'>-					0, mci-&gt;ctl_name);</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+					     page, 0, syndrome,</div><div class='add'>+					     edac_mc_find_csrow_by_page(mci, page),</div><div class='add'>+					     0, -1,</div><div class='add'>+					     mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (info-&gt;eapr &amp; BIT(1)) {	/* UE? */</div><div class='hunk'>@@ -190,9 +191,11 @@ static int r82600_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> </div><div class='ctx'> 		if (handle_errors)</div><div class='ctx'> 			/* 82600 doesn't give enough info */</div><div class='del'>-			edac_mc_handle_ue(mci, page, 0,</div><div class='del'>-					edac_mc_find_csrow_by_page(mci, page),</div><div class='del'>-					mci-&gt;ctl_name);</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+					     page, 0, 0,</div><div class='add'>+					     edac_mc_find_csrow_by_page(mci, page),</div><div class='add'>+					     0, -1,</div><div class='add'>+					     mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return error_found;</div><div class='hunk'>@@ -216,6 +219,7 @@ static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,</div><div class='ctx'> 			u8 dramcr)</div><div class='ctx'> {</div><div class='ctx'> 	struct csrow_info *csrow;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='ctx'> 	int index;</div><div class='ctx'> 	u8 drbar;		/* SDRAM Row Boundary Address Register */</div><div class='ctx'> 	u32 row_high_limit, row_high_limit_last;</div><div class='hunk'>@@ -227,6 +231,7 @@ static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	for (index = 0; index &lt; mci-&gt;nr_csrows; index++) {</div><div class='ctx'> 		csrow = &amp;mci-&gt;csrows[index];</div><div class='add'>+		dimm = csrow-&gt;channels[0].dimm;</div><div class='ctx'> </div><div class='ctx'> 		/* find the DRAM Chip Select Base address and mask */</div><div class='ctx'> 		pci_read_config_byte(pdev, R82600_DRBA + index, &amp;drbar);</div><div class='hunk'>@@ -247,16 +252,17 @@ static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 		csrow-&gt;first_page = row_base &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 		csrow-&gt;last_page = (row_high_limit &gt;&gt; PAGE_SHIFT) - 1;</div><div class='del'>-		csrow-&gt;nr_pages = csrow-&gt;last_page - csrow-&gt;first_page + 1;</div><div class='add'>+</div><div class='add'>+		dimm-&gt;nr_pages = csrow-&gt;last_page - csrow-&gt;first_page + 1;</div><div class='ctx'> 		/* Error address is top 19 bits - so granularity is      *</div><div class='ctx'> 		 * 14 bits                                               */</div><div class='del'>-		csrow-&gt;grain = 1 &lt;&lt; 14;</div><div class='del'>-		csrow-&gt;mtype = reg_sdram ? MEM_RDDR : MEM_DDR;</div><div class='add'>+		dimm-&gt;grain = 1 &lt;&lt; 14;</div><div class='add'>+		dimm-&gt;mtype = reg_sdram ? MEM_RDDR : MEM_DDR;</div><div class='ctx'> 		/* FIXME - check that this is unknowable with this chipset */</div><div class='del'>-		csrow-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+		dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='ctx'> </div><div class='ctx'> 		/* Mode is global on 82600 */</div><div class='del'>-		csrow-&gt;edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE;</div><div class='add'>+		dimm-&gt;edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE;</div><div class='ctx'> 		row_high_limit_last = row_high_limit;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -264,6 +270,7 @@ static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,</div><div class='ctx'> static int r82600_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	u8 dramcr;</div><div class='ctx'> 	u32 eapr;</div><div class='ctx'> 	u32 scrub_disabled;</div><div class='hunk'>@@ -278,8 +285,13 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	debugf2("%s(): sdram refresh rate = %#0x\n", __func__,</div><div class='ctx'> 		sdram_refresh_rate);</div><div class='ctx'> 	debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr);</div><div class='del'>-	mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS, 0);</div><div class='del'>-</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = R82600_NR_CSROWS;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = R82600_NR_CHANS;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0);</div><div class='ctx'> 	if (mci == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c<br/>index a203536d90dd..4adaf4b7da99 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/sb_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/sb_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/sb_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/sb_edac.c</a></div><div class='hunk'>@@ -58,7 +58,7 @@ static int probed;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * FIXME: For now, let's order by device function, as it makes</div><div class='del'>- * easier for driver's development proccess. This table should be</div><div class='add'>+ * easier for driver's development process. This table should be</div><div class='ctx'>  * moved to pci_id.h when submitted upstream</div><div class='ctx'>  */</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_SBRIDGE_SAD0	0x3cf4	/* 12.6 */</div><div class='hunk'>@@ -314,8 +314,6 @@ struct sbridge_pvt {</div><div class='ctx'> 	struct sbridge_info	info;</div><div class='ctx'> 	struct sbridge_channel	channel[NUM_CHANNELS];</div><div class='ctx'> </div><div class='del'>-	int 			csrow_map[NUM_CHANNELS][MAX_DIMMS];</div><div class='del'>-</div><div class='ctx'> 	/* Memory type detection */</div><div class='ctx'> 	bool			is_mirrored, is_lockstep, is_close_pg;</div><div class='ctx'> </div><div class='hunk'>@@ -375,7 +373,7 @@ static DEFINE_PCI_DEVICE_TABLE(sbridge_pci_tbl) = {</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /****************************************************************************</div><div class='del'>-			Anciliary status routines</div><div class='add'>+			Ancillary status routines</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> </div><div class='ctx'> static inline int numrank(u32 mtr)</div><div class='hunk'>@@ -487,29 +485,14 @@ static struct pci_dev *get_pdev_slot_func(u8 bus, unsigned slot,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * sbridge_get_active_channels() - gets the number of channels and csrows</div><div class='add'>+ * check_if_ecc_is_active() - Checks if ECC is active</div><div class='ctx'>  * bus:		Device bus</div><div class='del'>- * @channels:	Number of channels that will be returned</div><div class='del'>- * @csrows:	Number of csrows found</div><div class='del'>- *</div><div class='del'>- * Since EDAC core needs to know in advance the number of available channels</div><div class='del'>- * and csrows, in order to allocate memory for csrows/channels, it is needed</div><div class='del'>- * to run two similar steps. At the first step, implemented on this function,</div><div class='del'>- * it checks the number of csrows/channels present at one socket, identified</div><div class='del'>- * by the associated PCI bus.</div><div class='del'>- * this is used in order to properly allocate the size of mci components.</div><div class='del'>- * Note: one csrow is one dimm.</div><div class='ctx'>  */</div><div class='del'>-static int sbridge_get_active_channels(const u8 bus, unsigned *channels,</div><div class='del'>-				      unsigned *csrows)</div><div class='add'>+static int check_if_ecc_is_active(const u8 bus)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = NULL;</div><div class='del'>-	int i, j;</div><div class='ctx'> 	u32 mcmtr;</div><div class='ctx'> </div><div class='del'>-	*channels = 0;</div><div class='del'>-	*csrows = 0;</div><div class='del'>-</div><div class='ctx'> 	pdev = get_pdev_slot_func(bus, 15, 0);</div><div class='ctx'> 	if (!pdev) {</div><div class='ctx'> 		sbridge_printk(KERN_ERR, "Couldn't find PCI device "</div><div class='hunk'>@@ -523,41 +506,14 @@ static int sbridge_get_active_channels(const u8 bus, unsigned *channels,</div><div class='ctx'> 		sbridge_printk(KERN_ERR, "ECC is disabled. Aborting\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; NUM_CHANNELS; i++) {</div><div class='del'>-		u32 mtr;</div><div class='del'>-</div><div class='del'>-		/* Device 15 functions 2 - 5  */</div><div class='del'>-		pdev = get_pdev_slot_func(bus, 15, 2 + i);</div><div class='del'>-		if (!pdev) {</div><div class='del'>-			sbridge_printk(KERN_ERR, "Couldn't find PCI device "</div><div class='del'>-						 "%2x.%02d.%d!!!\n",</div><div class='del'>-						 bus, 15, 2 + i);</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		(*channels)++;</div><div class='del'>-</div><div class='del'>-		for (j = 0; j &lt; ARRAY_SIZE(mtr_regs); j++) {</div><div class='del'>-			pci_read_config_dword(pdev, mtr_regs[j], &amp;mtr);</div><div class='del'>-			debugf1("Bus#%02x channel #%d  MTR%d = %x\n", bus, i, j, mtr);</div><div class='del'>-			if (IS_DIMM_PRESENT(mtr))</div><div class='del'>-				(*csrows)++;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	debugf0("Number of active channels: %d, number of active dimms: %d\n",</div><div class='del'>-		*channels, *csrows);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int get_dimm_config(const struct mem_ctl_info *mci)</div><div class='add'>+static int get_dimm_config(struct mem_ctl_info *mci)</div><div class='ctx'> {</div><div class='ctx'> 	struct sbridge_pvt *pvt = mci-&gt;pvt_info;</div><div class='del'>-	struct csrow_info *csr;</div><div class='add'>+	struct dimm_info *dimm;</div><div class='ctx'> 	int i, j, banks, ranks, rows, cols, size, npages;</div><div class='del'>-	int csrow = 0;</div><div class='del'>-	unsigned long last_page = 0;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> 	enum edac_type mode;</div><div class='ctx'> 	enum mem_type mtype;</div><div class='hunk'>@@ -616,6 +572,8 @@ static int get_dimm_config(const struct mem_ctl_info *mci)</div><div class='ctx'> 		u32 mtr;</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; ARRAY_SIZE(mtr_regs); j++) {</div><div class='add'>+			dimm = EDAC_DIMM_PTR(mci-&gt;layers, mci-&gt;dimms, mci-&gt;n_layers,</div><div class='add'>+				       i, j, 0);</div><div class='ctx'> 			pci_read_config_dword(pvt-&gt;pci_tad[i],</div><div class='ctx'> 					      mtr_regs[j], &amp;mtr);</div><div class='ctx'> 			debugf4("Channel #%d  MTR%d = %x\n", i, j, mtr);</div><div class='hunk'>@@ -634,29 +592,15 @@ static int get_dimm_config(const struct mem_ctl_info *mci)</div><div class='ctx'> 					pvt-&gt;sbridge_dev-&gt;mc, i, j,</div><div class='ctx'> 					size, npages,</div><div class='ctx'> 					banks, ranks, rows, cols);</div><div class='del'>-				csr = &amp;mci-&gt;csrows[csrow];</div><div class='del'>-</div><div class='del'>-				csr-&gt;first_page = last_page;</div><div class='del'>-				csr-&gt;last_page = last_page + npages - 1;</div><div class='del'>-				csr-&gt;page_mask = 0UL;	/* Unused */</div><div class='del'>-				csr-&gt;nr_pages = npages;</div><div class='del'>-				csr-&gt;grain = 32;</div><div class='del'>-				csr-&gt;csrow_idx = csrow;</div><div class='del'>-				csr-&gt;dtype = (banks == 8) ? DEV_X8 : DEV_X4;</div><div class='del'>-				csr-&gt;ce_count = 0;</div><div class='del'>-				csr-&gt;ue_count = 0;</div><div class='del'>-				csr-&gt;mtype = mtype;</div><div class='del'>-				csr-&gt;edac_mode = mode;</div><div class='del'>-				csr-&gt;nr_channels = 1;</div><div class='del'>-				csr-&gt;channels[0].chan_idx = i;</div><div class='del'>-				csr-&gt;channels[0].ce_count = 0;</div><div class='del'>-				pvt-&gt;csrow_map[i][j] = csrow;</div><div class='del'>-				snprintf(csr-&gt;channels[0].label,</div><div class='del'>-					 sizeof(csr-&gt;channels[0].label),</div><div class='add'>+</div><div class='add'>+				dimm-&gt;nr_pages = npages;</div><div class='add'>+				dimm-&gt;grain = 32;</div><div class='add'>+				dimm-&gt;dtype = (banks == 8) ? DEV_X8 : DEV_X4;</div><div class='add'>+				dimm-&gt;mtype = mtype;</div><div class='add'>+				dimm-&gt;edac_mode = mode;</div><div class='add'>+				snprintf(dimm-&gt;label, sizeof(dimm-&gt;label),</div><div class='ctx'> 					 "CPU_SrcID#%u_Channel#%u_DIMM#%u",</div><div class='ctx'> 					 pvt-&gt;sbridge_dev-&gt;source_id, i, j);</div><div class='del'>-				last_page += npages;</div><div class='del'>-				csrow++;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -844,11 +788,10 @@ static int get_memory_error_data(struct mem_ctl_info *mci,</div><div class='ctx'> 				 u8 *socket,</div><div class='ctx'> 				 long *channel_mask,</div><div class='ctx'> 				 u8 *rank,</div><div class='del'>-				 char *area_type)</div><div class='add'>+				 char **area_type, char *msg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info	*new_mci;</div><div class='ctx'> 	struct sbridge_pvt *pvt = mci-&gt;pvt_info;</div><div class='del'>-	char			msg[256];</div><div class='ctx'> 	int 			n_rir, n_sads, n_tads, sad_way, sck_xch;</div><div class='ctx'> 	int			sad_interl, idx, base_ch;</div><div class='ctx'> 	int			interleave_mode;</div><div class='hunk'>@@ -870,12 +813,10 @@ static int get_memory_error_data(struct mem_ctl_info *mci,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((addr &gt; (u64) pvt-&gt;tolm) &amp;&amp; (addr &lt; (1LL &lt;&lt; 32))) {</div><div class='ctx'> 		sprintf(msg, "Error at TOLM area, on addr 0x%08Lx", addr);</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, msg);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (addr &gt;= (u64)pvt-&gt;tohm) {</div><div class='ctx'> 		sprintf(msg, "Error at MMIOH area, on addr 0x%016Lx", addr);</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, msg);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -892,7 +833,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,</div><div class='ctx'> 		limit = SAD_LIMIT(reg);</div><div class='ctx'> 		if (limit &lt;= prv) {</div><div class='ctx'> 			sprintf(msg, "Can't discover the memory socket");</div><div class='del'>-			edac_mc_handle_ce_no_info(mci, msg);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 		if  (addr &lt;= limit)</div><div class='hunk'>@@ -901,10 +841,9 @@ static int get_memory_error_data(struct mem_ctl_info *mci,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (n_sads == MAX_SAD) {</div><div class='ctx'> 		sprintf(msg, "Can't discover the memory socket");</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, msg);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	area_type = get_dram_attr(reg);</div><div class='add'>+	*area_type = get_dram_attr(reg);</div><div class='ctx'> 	interleave_mode = INTERLEAVE_MODE(reg);</div><div class='ctx'> </div><div class='ctx'> 	pci_read_config_dword(pvt-&gt;pci_sad0, interleave_list[n_sads],</div><div class='hunk'>@@ -942,7 +881,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		sprintf(msg, "Can't discover socket interleave");</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, msg);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	*socket = sad_interleave[idx];</div><div class='hunk'>@@ -957,7 +895,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,</div><div class='ctx'> 	if (!new_mci) {</div><div class='ctx'> 		sprintf(msg, "Struct for socket #%u wasn't initialized",</div><div class='ctx'> 			*socket);</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, msg);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	mci = new_mci;</div><div class='hunk'>@@ -973,7 +910,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,</div><div class='ctx'> 		limit = TAD_LIMIT(reg);</div><div class='ctx'> 		if (limit &lt;= prv) {</div><div class='ctx'> 			sprintf(msg, "Can't discover the memory channel");</div><div class='del'>-			edac_mc_handle_ce_no_info(mci, msg);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 		if  (addr &lt;= limit)</div><div class='hunk'>@@ -1013,7 +949,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		sprintf(msg, "Can't discover the TAD target");</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, msg);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	*channel_mask = 1 &lt;&lt; base_ch;</div><div class='hunk'>@@ -1027,7 +962,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			sprintf(msg, "Invalid mirror set. Can't decode addr");</div><div class='del'>-			edac_mc_handle_ce_no_info(mci, msg);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else</div><div class='hunk'>@@ -1055,7 +989,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,</div><div class='ctx'> 	if (offset &gt; addr) {</div><div class='ctx'> 		sprintf(msg, "Can't calculate ch addr: TAD offset 0x%08Lx is too high for addr 0x%08Lx!",</div><div class='ctx'> 			offset, addr);</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, msg);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	addr -= offset;</div><div class='hunk'>@@ -1095,7 +1028,6 @@ static int get_memory_error_data(struct mem_ctl_info *mci,</div><div class='ctx'> 	if (n_rir == MAX_RIR_RANGES) {</div><div class='ctx'> 		sprintf(msg, "Can't discover the memory rank for ch addr 0x%08Lx",</div><div class='ctx'> 			ch_addr);</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, msg);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	rir_way = RIR_WAY(reg);</div><div class='hunk'>@@ -1409,7 +1341,8 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *new_mci;</div><div class='ctx'> 	struct sbridge_pvt *pvt = mci-&gt;pvt_info;</div><div class='del'>-	char *type, *optype, *msg, *recoverable_msg;</div><div class='add'>+	enum hw_event_mc_err_type tp_event;</div><div class='add'>+	char *type, *optype, msg[256];</div><div class='ctx'> 	bool ripv = GET_BITFIELD(m-&gt;mcgstatus, 0, 0);</div><div class='ctx'> 	bool overflow = GET_BITFIELD(m-&gt;status, 62, 62);</div><div class='ctx'> 	bool uncorrected_error = GET_BITFIELD(m-&gt;status, 61, 61);</div><div class='hunk'>@@ -1421,16 +1354,24 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,</div><div class='ctx'> 	u32 optypenum = GET_BITFIELD(m-&gt;status, 4, 6);</div><div class='ctx'> 	long channel_mask, first_channel;</div><div class='ctx'> 	u8  rank, socket;</div><div class='del'>-	int csrow, rc, dimm;</div><div class='del'>-	char *area_type = "Unknown";</div><div class='del'>-</div><div class='del'>-	if (ripv)</div><div class='del'>-		type = "NON_FATAL";</div><div class='del'>-	else</div><div class='del'>-		type = "FATAL";</div><div class='add'>+	int rc, dimm;</div><div class='add'>+	char *area_type = NULL;</div><div class='add'>+</div><div class='add'>+	if (uncorrected_error) {</div><div class='add'>+		if (ripv) {</div><div class='add'>+			type = "FATAL";</div><div class='add'>+			tp_event = HW_EVENT_ERR_FATAL;</div><div class='add'>+		} else {</div><div class='add'>+			type = "NON_FATAL";</div><div class='add'>+			tp_event = HW_EVENT_ERR_UNCORRECTED;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		type = "CORRECTED";</div><div class='add'>+		tp_event = HW_EVENT_ERR_CORRECTED;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * According with Table 15-9 of the Intel Archictecture spec vol 3A,</div><div class='add'>+	 * According with Table 15-9 of the Intel Architecture spec vol 3A,</div><div class='ctx'> 	 * memory errors should fit in this mask:</div><div class='ctx'> 	 *	000f 0000 1mmm cccc (binary)</div><div class='ctx'> 	 * where:</div><div class='hunk'>@@ -1445,19 +1386,19 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,</div><div class='ctx'> 	} else {</div><div class='ctx'> 		switch (optypenum) {</div><div class='ctx'> 		case 0:</div><div class='del'>-			optype = "generic undef request";</div><div class='add'>+			optype = "generic undef request error";</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 1:</div><div class='del'>-			optype = "memory read";</div><div class='add'>+			optype = "memory read error";</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 2:</div><div class='del'>-			optype = "memory write";</div><div class='add'>+			optype = "memory write error";</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 3:</div><div class='del'>-			optype = "addr/cmd";</div><div class='add'>+			optype = "addr/cmd error";</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 4:</div><div class='del'>-			optype = "memory scrubbing";</div><div class='add'>+			optype = "memory scrubbing error";</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			optype = "reserved";</div><div class='hunk'>@@ -1466,13 +1407,13 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rc = get_memory_error_data(mci, m-&gt;addr, &amp;socket,</div><div class='del'>-				   &amp;channel_mask, &amp;rank, area_type);</div><div class='add'>+				   &amp;channel_mask, &amp;rank, &amp;area_type, msg);</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='del'>-		return;</div><div class='add'>+		goto err_parsing;</div><div class='ctx'> 	new_mci = get_mci_for_node_id(socket);</div><div class='ctx'> 	if (!new_mci) {</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, "Error: socket got corrupted!");</div><div class='del'>-		return;</div><div class='add'>+		strcpy(msg, "Error: socket got corrupted!");</div><div class='add'>+		goto err_parsing;</div><div class='ctx'> 	}</div><div class='ctx'> 	mci = new_mci;</div><div class='ctx'> 	pvt = mci-&gt;pvt_info;</div><div class='hunk'>@@ -1486,45 +1427,39 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,</div><div class='ctx'> 	else</div><div class='ctx'> 		dimm = 2;</div><div class='ctx'> </div><div class='del'>-	csrow = pvt-&gt;csrow_map[first_channel][dimm];</div><div class='del'>-</div><div class='del'>-	if (uncorrected_error &amp;&amp; recoverable)</div><div class='del'>-		recoverable_msg = " recoverable";</div><div class='del'>-	else</div><div class='del'>-		recoverable_msg = "";</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * FIXME: What should we do with "channel" information on mcelog?</div><div class='del'>-	 * Probably, we can just discard it, as the channel information</div><div class='del'>-	 * comes from the get_memory_error_data() address decoding</div><div class='add'>+	 * FIXME: On some memory configurations (mirror, lockstep), the</div><div class='add'>+	 * Memory Controller can't point the error to a single DIMM. The</div><div class='add'>+	 * EDAC core should be handling the channel mask, in order to point</div><div class='add'>+	 * to the group of dimm's where the error may be happening.</div><div class='ctx'> 	 */</div><div class='del'>-	msg = kasprintf(GFP_ATOMIC,</div><div class='del'>-			"%d %s error(s): %s on %s area %s%s: cpu=%d Err=%04x:%04x (ch=%d), "</div><div class='del'>-			"addr = 0x%08llx =&gt; socket=%d, Channel=%ld(mask=%ld), rank=%d\n",</div><div class='del'>-			core_err_cnt,</div><div class='del'>-			area_type,</div><div class='del'>-			optype,</div><div class='del'>-			type,</div><div class='del'>-			recoverable_msg,</div><div class='del'>-			overflow ? "OVERFLOW" : "",</div><div class='del'>-			m-&gt;cpu,</div><div class='del'>-			mscod, errcode,</div><div class='del'>-			channel,		/* 1111b means not specified */</div><div class='del'>-			(long long) m-&gt;addr,</div><div class='del'>-			socket,</div><div class='del'>-			first_channel,		/* This is the real channel on SB */</div><div class='del'>-			channel_mask,</div><div class='del'>-			rank);</div><div class='add'>+	snprintf(msg, sizeof(msg),</div><div class='add'>+		 "count:%d%s%s area:%s err_code:%04x:%04x socket:%d channel_mask:%ld rank:%d",</div><div class='add'>+		 core_err_cnt,</div><div class='add'>+		 overflow ? " OVERFLOW" : "",</div><div class='add'>+		 (uncorrected_error &amp;&amp; recoverable) ? " recoverable" : "",</div><div class='add'>+		 area_type,</div><div class='add'>+		 mscod, errcode,</div><div class='add'>+		 socket,</div><div class='add'>+		 channel_mask,</div><div class='add'>+		 rank);</div><div class='ctx'> </div><div class='ctx'> 	debugf0("%s", msg);</div><div class='ctx'> </div><div class='add'>+	/* FIXME: need support for channel mask */</div><div class='add'>+</div><div class='ctx'> 	/* Call the helper to output message */</div><div class='del'>-	if (uncorrected_error)</div><div class='del'>-		edac_mc_handle_fbd_ue(mci, csrow, 0, 0, msg);</div><div class='del'>-	else</div><div class='del'>-		edac_mc_handle_fbd_ce(mci, csrow, 0, msg);</div><div class='add'>+	edac_mc_handle_error(tp_event, mci,</div><div class='add'>+			     m-&gt;addr &gt;&gt; PAGE_SHIFT, m-&gt;addr &amp; ~PAGE_MASK, 0,</div><div class='add'>+			     channel, dimm, -1,</div><div class='add'>+			     optype, msg, m);</div><div class='add'>+	return;</div><div class='add'>+err_parsing:</div><div class='add'>+	edac_mc_handle_error(tp_event, mci, 0, 0, 0,</div><div class='add'>+			     -1, -1, -1,</div><div class='add'>+			     msg, "", m);</div><div class='ctx'> </div><div class='del'>-	kfree(msg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1683,16 +1618,25 @@ static void sbridge_unregister_mci(struct sbridge_dev *sbridge_dev)</div><div class='ctx'> static int sbridge_register_mci(struct sbridge_dev *sbridge_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	struct sbridge_pvt *pvt;</div><div class='del'>-	int rc, channels, csrows;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	/* Check the number of active and not disabled channels */</div><div class='del'>-	rc = sbridge_get_active_channels(sbridge_dev-&gt;bus, &amp;channels, &amp;csrows);</div><div class='add'>+	rc = check_if_ecc_is_active(sbridge_dev-&gt;bus);</div><div class='ctx'> 	if (unlikely(rc &lt; 0))</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='ctx'> 	/* allocate a new MC control structure */</div><div class='del'>-	mci = edac_mc_alloc(sizeof(*pvt), csrows, channels, sbridge_dev-&gt;mc);</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[0].size = NUM_CHANNELS;</div><div class='add'>+	layers[0].is_virt_csrow = false;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_SLOT;</div><div class='add'>+	layers[1].size = MAX_DIMMS;</div><div class='add'>+	layers[1].is_virt_csrow = true;</div><div class='add'>+	mci = edac_mc_alloc(sbridge_dev-&gt;mc, ARRAY_SIZE(layers), layers,</div><div class='add'>+			    sizeof(*pvt));</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(!mci))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c<br/>index e99d00976189..7bb4614730db 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/tile_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/tile_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/tile_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/tile_edac.c</a></div><div class='hunk'>@@ -71,7 +71,10 @@ static void tile_edac_check(struct mem_ctl_info *mci)</div><div class='ctx'> 	if (mem_error.sbe_count != priv-&gt;ce_count) {</div><div class='ctx'> 		dev_dbg(mci-&gt;dev, "ECC CE err on node %d\n", priv-&gt;node);</div><div class='ctx'> 		priv-&gt;ce_count = mem_error.sbe_count;</div><div class='del'>-		edac_mc_handle_ce(mci, 0, 0, 0, 0, 0, mci-&gt;ctl_name);</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+				     0, 0, 0,</div><div class='add'>+				     0, 0, -1,</div><div class='add'>+				     mci-&gt;ctl_name, "", NULL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -84,6 +87,7 @@ static int __devinit tile_edac_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> 	struct csrow_info	*csrow = &amp;mci-&gt;csrows[0];</div><div class='ctx'> 	struct tile_edac_priv	*priv = mci-&gt;pvt_info;</div><div class='ctx'> 	struct mshim_mem_info	mem_info;</div><div class='add'>+	struct dimm_info *dimm = csrow-&gt;channels[0].dimm;</div><div class='ctx'> </div><div class='ctx'> 	if (hv_dev_pread(priv-&gt;hv_devhdl, 0, (HV_VirtAddr)&amp;mem_info,</div><div class='ctx'> 		sizeof(struct mshim_mem_info), MSHIM_MEM_INFO_OFF) !=</div><div class='hunk'>@@ -93,27 +97,25 @@ static int __devinit tile_edac_init_csrows(struct mem_ctl_info *mci)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (mem_info.mem_ecc)</div><div class='del'>-		csrow-&gt;edac_mode = EDAC_SECDED;</div><div class='add'>+		dimm-&gt;edac_mode = EDAC_SECDED;</div><div class='ctx'> 	else</div><div class='del'>-		csrow-&gt;edac_mode = EDAC_NONE;</div><div class='add'>+		dimm-&gt;edac_mode = EDAC_NONE;</div><div class='ctx'> 	switch (mem_info.mem_type) {</div><div class='ctx'> 	case DDR2:</div><div class='del'>-		csrow-&gt;mtype = MEM_DDR2;</div><div class='add'>+		dimm-&gt;mtype = MEM_DDR2;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case DDR3:</div><div class='del'>-		csrow-&gt;mtype = MEM_DDR3;</div><div class='add'>+		dimm-&gt;mtype = MEM_DDR3;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	csrow-&gt;first_page = 0;</div><div class='del'>-	csrow-&gt;nr_pages = mem_info.mem_size &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	csrow-&gt;last_page = csrow-&gt;first_page + csrow-&gt;nr_pages - 1;</div><div class='del'>-	csrow-&gt;grain = TILE_EDAC_ERROR_GRAIN;</div><div class='del'>-	csrow-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+	dimm-&gt;nr_pages = mem_info.mem_size &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	dimm-&gt;grain = TILE_EDAC_ERROR_GRAIN;</div><div class='add'>+	dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -123,6 +125,7 @@ static int __devinit tile_edac_mc_probe(struct platform_device *pdev)</div><div class='ctx'> 	char			hv_file[32];</div><div class='ctx'> 	int			hv_devhdl;</div><div class='ctx'> 	struct mem_ctl_info	*mci;</div><div class='add'>+	struct edac_mc_layer	layers[2];</div><div class='ctx'> 	struct tile_edac_priv	*priv;</div><div class='ctx'> 	int			rc;</div><div class='ctx'> </div><div class='hunk'>@@ -132,8 +135,14 @@ static int __devinit tile_edac_mc_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* A TILE MC has a single channel and one chip-select row. */</div><div class='del'>-	mci = edac_mc_alloc(sizeof(struct tile_edac_priv),</div><div class='del'>-		TILE_EDAC_NR_CSROWS, TILE_EDAC_NR_CHANS, pdev-&gt;id);</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = TILE_EDAC_NR_CSROWS;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = TILE_EDAC_NR_CHANS;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(pdev-&gt;id, ARRAY_SIZE(layers), layers,</div><div class='add'>+			    sizeof(struct tile_edac_priv));</div><div class='ctx'> 	if (mci == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	priv = mci-&gt;pvt_info;</div><div class='head'>diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c<br/>index a438297389e5..1ac7962d63ea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/edac/x38_edac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/edac/x38_edac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/edac/x38_edac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/edac/x38_edac.c</a></div><div class='hunk'>@@ -215,19 +215,26 @@ static void x38_process_error_info(struct mem_ctl_info *mci,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if ((info-&gt;errsts ^ info-&gt;errsts2) &amp; X38_ERRSTS_BITS) {</div><div class='del'>-		edac_mc_handle_ce_no_info(mci, "UE overwrote CE");</div><div class='add'>+		edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,</div><div class='add'>+				     -1, -1, -1,</div><div class='add'>+				     "UE overwrote CE", "", NULL);</div><div class='ctx'> 		info-&gt;errsts = info-&gt;errsts2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (channel = 0; channel &lt; x38_channel_num; channel++) {</div><div class='ctx'> 		log = info-&gt;eccerrlog[channel];</div><div class='ctx'> 		if (log &amp; X38_ECCERRLOG_UE) {</div><div class='del'>-			edac_mc_handle_ue(mci, 0, 0,</div><div class='del'>-				eccerrlog_row(channel, log), "x38 UE");</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,</div><div class='add'>+					     0, 0, 0,</div><div class='add'>+					     eccerrlog_row(channel, log),</div><div class='add'>+					     -1, -1,</div><div class='add'>+					     "x38 UE", "", NULL);</div><div class='ctx'> 		} else if (log &amp; X38_ECCERRLOG_CE) {</div><div class='del'>-			edac_mc_handle_ce(mci, 0, 0,</div><div class='del'>-				eccerrlog_syndrome(log),</div><div class='del'>-				eccerrlog_row(channel, log), 0, "x38 CE");</div><div class='add'>+			edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,</div><div class='add'>+					     0, 0, eccerrlog_syndrome(log),</div><div class='add'>+					     eccerrlog_row(channel, log),</div><div class='add'>+					     -1, -1,</div><div class='add'>+					     "x38 CE", "", NULL);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -317,9 +324,9 @@ static unsigned long drb_to_nr_pages(</div><div class='ctx'> static int x38_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='del'>-	int i;</div><div class='add'>+	int i, j;</div><div class='ctx'> 	struct mem_ctl_info *mci = NULL;</div><div class='del'>-	unsigned long last_page;</div><div class='add'>+	struct edac_mc_layer layers[2];</div><div class='ctx'> 	u16 drbs[X38_CHANNELS][X38_RANKS_PER_CHANNEL];</div><div class='ctx'> 	bool stacked;</div><div class='ctx'> 	void __iomem *window;</div><div class='hunk'>@@ -335,7 +342,13 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	how_many_channel(pdev);</div><div class='ctx'> </div><div class='ctx'> 	/* FIXME: unconventional pvt_info usage */</div><div class='del'>-	mci = edac_mc_alloc(0, X38_RANKS, x38_channel_num, 0);</div><div class='add'>+	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;</div><div class='add'>+	layers[0].size = X38_RANKS;</div><div class='add'>+	layers[0].is_virt_csrow = true;</div><div class='add'>+	layers[1].type = EDAC_MC_LAYER_CHANNEL;</div><div class='add'>+	layers[1].size = x38_channel_num;</div><div class='add'>+	layers[1].is_virt_csrow = false;</div><div class='add'>+	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, 0);</div><div class='ctx'> 	if (!mci)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -363,7 +376,6 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 	 * cumulative; the last one will contain the total memory</div><div class='ctx'> 	 * contained in all ranks.</div><div class='ctx'> 	 */</div><div class='del'>-	last_page = -1UL;</div><div class='ctx'> 	for (i = 0; i &lt; mci-&gt;nr_csrows; i++) {</div><div class='ctx'> 		unsigned long nr_pages;</div><div class='ctx'> 		struct csrow_info *csrow = &amp;mci-&gt;csrows[i];</div><div class='hunk'>@@ -372,20 +384,18 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx)</div><div class='ctx'> 			i / X38_RANKS_PER_CHANNEL,</div><div class='ctx'> 			i % X38_RANKS_PER_CHANNEL);</div><div class='ctx'> </div><div class='del'>-		if (nr_pages == 0) {</div><div class='del'>-			csrow-&gt;mtype = MEM_EMPTY;</div><div class='add'>+		if (nr_pages == 0)</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='del'>-		csrow-&gt;first_page = last_page + 1;</div><div class='del'>-		last_page += nr_pages;</div><div class='del'>-		csrow-&gt;last_page = last_page;</div><div class='del'>-		csrow-&gt;nr_pages = nr_pages;</div><div class='add'>+		for (j = 0; j &lt; x38_channel_num; j++) {</div><div class='add'>+			struct dimm_info *dimm = csrow-&gt;channels[j].dimm;</div><div class='ctx'> </div><div class='del'>-		csrow-&gt;grain = nr_pages &lt;&lt; PAGE_SHIFT;</div><div class='del'>-		csrow-&gt;mtype = MEM_DDR2;</div><div class='del'>-		csrow-&gt;dtype = DEV_UNKNOWN;</div><div class='del'>-		csrow-&gt;edac_mode = EDAC_UNKNOWN;</div><div class='add'>+			dimm-&gt;nr_pages = nr_pages / x38_channel_num;</div><div class='add'>+			dimm-&gt;grain = nr_pages &lt;&lt; PAGE_SHIFT;</div><div class='add'>+			dimm-&gt;mtype = MEM_DDR2;</div><div class='add'>+			dimm-&gt;dtype = DEV_UNKNOWN;</div><div class='add'>+			dimm-&gt;edac_mode = EDAC_UNKNOWN;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	x38_clear_error_info(mci);</div><div class='head'>diff --git a/drivers/extcon/Kconfig b/drivers/extcon/Kconfig<br/>new file mode 100644<br/>index 000000000000..29c5cf852efc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/extcon/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/extcon/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+menuconfig EXTCON</div><div class='add'>+	tristate "External Connector Class (extcon) support"</div><div class='add'>+	help</div><div class='add'>+	  Say Y here to enable external connector class (extcon) support.</div><div class='add'>+	  This allows monitoring external connectors by userspace</div><div class='add'>+	  via sysfs and uevent and supports external connectors with</div><div class='add'>+	  multiple states; i.e., an extcon that may have multiple</div><div class='add'>+	  cables attached. For example, an external connector of a device</div><div class='add'>+	  may be used to connect an HDMI cable and a AC adaptor, and to</div><div class='add'>+	  host USB ports. Many of 30-pin connectors including PDMI are</div><div class='add'>+	  also good examples.</div><div class='add'>+</div><div class='add'>+if EXTCON</div><div class='add'>+</div><div class='add'>+comment "Extcon Device Drivers"</div><div class='add'>+</div><div class='add'>+config EXTCON_GPIO</div><div class='add'>+	tristate "GPIO extcon support"</div><div class='add'>+	depends on GENERIC_GPIO</div><div class='add'>+	help</div><div class='add'>+	  Say Y here to enable GPIO based extcon support. Note that GPIO</div><div class='add'>+	  extcon supports single state per extcon instance.</div><div class='add'>+</div><div class='add'>+config EXTCON_MAX8997</div><div class='add'>+	tristate "MAX8997 EXTCON Support"</div><div class='add'>+	depends on MFD_MAX8997</div><div class='add'>+	help</div><div class='add'>+	  If you say yes here you get support for the MUIC device of</div><div class='add'>+	  Maxim MAX8997 PMIC. The MAX8997 MUIC is a USB port accessory</div><div class='add'>+	  detector and switch.</div><div class='add'>+</div><div class='add'>+endif # MULTISTATE_SWITCH</div><div class='head'>diff --git a/drivers/extcon/Makefile b/drivers/extcon/Makefile<br/>new file mode 100644<br/>index 000000000000..86020bdb6da0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/extcon/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/extcon/Makefile</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+#</div><div class='add'>+# Makefile for external connector class (extcon) devices</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_EXTCON)		+= extcon_class.o</div><div class='add'>+obj-$(CONFIG_EXTCON_GPIO)	+= extcon_gpio.o</div><div class='add'>+obj-$(CONFIG_EXTCON_MAX8997)	+= extcon-max8997.o</div><div class='head'>diff --git a/drivers/misc/max8997-muic.c b/drivers/extcon/extcon-max8997.c<br/>index 19591eaa492a..23416e443765 100644<br/>--- a/<a href='/drm-misc/tree/drivers/misc/max8997-muic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/misc/max8997-muic.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/extcon/extcon-max8997.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/extcon/extcon-max8997.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='del'>- * max8997-muic.c - MAX8997 muic driver for the Maxim 8997</div><div class='add'>+ * extcon-max8997.c - MAX8997 extcon driver to support MAX8997 MUIC</div><div class='ctx'>  *</div><div class='del'>- *  Copyright (C) 2011 Samsung Electrnoics</div><div class='add'>+ *  Copyright (C) 2012 Samsung Electrnoics</div><div class='ctx'>  *  Donggeun Kim &lt;dg77.kim@samsung.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='hunk'>@@ -13,11 +13,6 @@</div><div class='ctx'>  * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='ctx'>  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='ctx'>  * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='del'>- *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -30,6 +25,9 @@</div><div class='ctx'> #include &lt;linux/kobject.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/max8997.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/max8997-private.h&gt;</div><div class='add'>+#include &lt;linux/extcon.h&gt;</div><div class='add'>+</div><div class='add'>+#define	DEV_NAME			"max8997-muic"</div><div class='ctx'> </div><div class='ctx'> /* MAX8997-MUIC STATUS1 register */</div><div class='ctx'> #define STATUS1_ADC_SHIFT		0</div><div class='hunk'>@@ -95,7 +93,6 @@ static struct max8997_muic_irq muic_irqs[] = {</div><div class='ctx'> </div><div class='ctx'> struct max8997_muic_info {</div><div class='ctx'> 	struct device *dev;</div><div class='del'>-	struct max8997_dev *iodev;</div><div class='ctx'> 	struct i2c_client *muic;</div><div class='ctx'> 	struct max8997_muic_platform_data *muic_pdata;</div><div class='ctx'> </div><div class='hunk'>@@ -106,12 +103,28 @@ struct max8997_muic_info {</div><div class='ctx'> 	int pre_adc;</div><div class='ctx'> </div><div class='ctx'> 	struct mutex mutex;</div><div class='add'>+</div><div class='add'>+	struct extcon_dev	*edev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const char *max8997_extcon_cable[] = {</div><div class='add'>+	[0] = "USB",</div><div class='add'>+	[1] = "USB-Host",</div><div class='add'>+	[2] = "TA",</div><div class='add'>+	[3] = "Fast-charger",</div><div class='add'>+	[4] = "Slow-charger",</div><div class='add'>+	[5] = "Charge-downstream",</div><div class='add'>+	[6] = "MHL",</div><div class='add'>+	[7] = "Dock-desk",</div><div class='add'>+	[7] = "Dock-card",</div><div class='add'>+	[8] = "JIG",</div><div class='add'>+</div><div class='add'>+	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int max8997_muic_handle_usb(struct max8997_muic_info *info,</div><div class='ctx'> 			enum max8997_muic_usb_type usb_type, bool attached)</div><div class='ctx'> {</div><div class='del'>-	struct max8997_muic_platform_data *mdata = info-&gt;muic_pdata;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (usb_type == MAX8997_USB_HOST) {</div><div class='hunk'>@@ -125,25 +138,25 @@ static int max8997_muic_handle_usb(struct max8997_muic_info *info,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mdata-&gt;usb_callback)</div><div class='del'>-		mdata-&gt;usb_callback(usb_type, attached);</div><div class='add'>+	switch (usb_type) {</div><div class='add'>+	case MAX8997_USB_HOST:</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "USB-Host", attached);</div><div class='add'>+		break;</div><div class='add'>+	case MAX8997_USB_DEVICE:</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "USB", attached);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void max8997_muic_handle_mhl(struct max8997_muic_info *info,</div><div class='del'>-			bool attached)</div><div class='del'>-{</div><div class='del'>-	struct max8997_muic_platform_data *mdata = info-&gt;muic_pdata;</div><div class='del'>-</div><div class='del'>-	if (mdata-&gt;mhl_callback)</div><div class='del'>-		mdata-&gt;mhl_callback(attached);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int max8997_muic_handle_dock(struct max8997_muic_info *info,</div><div class='ctx'> 			int adc, bool attached)</div><div class='ctx'> {</div><div class='del'>-	struct max8997_muic_platform_data *mdata = info-&gt;muic_pdata;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* switch to AUDIO */</div><div class='hunk'>@@ -157,14 +170,13 @@ static int max8997_muic_handle_dock(struct max8997_muic_info *info,</div><div class='ctx'> </div><div class='ctx'> 	switch (adc) {</div><div class='ctx'> 	case MAX8997_ADC_DESKDOCK:</div><div class='del'>-		if (mdata-&gt;deskdock_callback)</div><div class='del'>-			mdata-&gt;deskdock_callback(attached);</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "Dock-desk", attached);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MAX8997_ADC_CARDOCK:</div><div class='del'>-		if (mdata-&gt;cardock_callback)</div><div class='del'>-			mdata-&gt;cardock_callback(attached);</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "Dock-card", attached);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='hunk'>@@ -174,7 +186,6 @@ out:</div><div class='ctx'> static int max8997_muic_handle_jig_uart(struct max8997_muic_info *info,</div><div class='ctx'> 			bool attached)</div><div class='ctx'> {</div><div class='del'>-	struct max8997_muic_platform_data *mdata = info-&gt;muic_pdata;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* switch to UART */</div><div class='hunk'>@@ -186,8 +197,7 @@ static int max8997_muic_handle_jig_uart(struct max8997_muic_info *info,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mdata-&gt;uart_callback)</div><div class='del'>-		mdata-&gt;uart_callback(attached);</div><div class='add'>+	extcon_set_cable_state(info-&gt;edev, "JIG", attached);</div><div class='ctx'> out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -201,7 +211,7 @@ static int max8997_muic_handle_adc_detach(struct max8997_muic_info *info)</div><div class='ctx'> 		ret = max8997_muic_handle_usb(info, MAX8997_USB_HOST, false);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MAX8997_ADC_MHL:</div><div class='del'>-		max8997_muic_handle_mhl(info, false);</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "MHL", false);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MAX8997_ADC_JIG_USB_1:</div><div class='ctx'> 	case MAX8997_ADC_JIG_USB_2:</div><div class='hunk'>@@ -230,7 +240,7 @@ static int max8997_muic_handle_adc(struct max8997_muic_info *info, int adc)</div><div class='ctx'> 		ret = max8997_muic_handle_usb(info, MAX8997_USB_HOST, true);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MAX8997_ADC_MHL:</div><div class='del'>-		max8997_muic_handle_mhl(info, true);</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "MHL", true);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MAX8997_ADC_JIG_USB_1:</div><div class='ctx'> 	case MAX8997_ADC_JIG_USB_2:</div><div class='hunk'>@@ -247,10 +257,40 @@ static int max8997_muic_handle_adc(struct max8997_muic_info *info, int adc)</div><div class='ctx'> 		ret = max8997_muic_handle_adc_detach(info);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		break;</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;pre_adc = adc;</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max8997_muic_handle_charger_type_detach(</div><div class='add'>+				struct max8997_muic_info *info)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (info-&gt;pre_charger_type) {</div><div class='add'>+	case MAX8997_CHARGER_TYPE_USB:</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "USB", false);</div><div class='add'>+		break;</div><div class='add'>+	case MAX8997_CHARGER_TYPE_DOWNSTREAM_PORT:</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "Charge-downstream", false);</div><div class='add'>+		break;</div><div class='add'>+	case MAX8997_CHARGER_TYPE_DEDICATED_CHG:</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "TA", false);</div><div class='add'>+		break;</div><div class='add'>+	case MAX8997_CHARGER_TYPE_500MA:</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "Slow-charger", false);</div><div class='add'>+		break;</div><div class='add'>+	case MAX8997_CHARGER_TYPE_1A:</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "Fast-charger", false);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -258,7 +298,6 @@ static int max8997_muic_handle_adc(struct max8997_muic_info *info, int adc)</div><div class='ctx'> static int max8997_muic_handle_charger_type(struct max8997_muic_info *info,</div><div class='ctx'> 				enum max8997_muic_charger_type charger_type)</div><div class='ctx'> {</div><div class='del'>-	struct max8997_muic_platform_data *mdata = info-&gt;muic_pdata;</div><div class='ctx'> 	u8 adc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -270,30 +309,29 @@ static int max8997_muic_handle_charger_type(struct max8997_muic_info *info,</div><div class='ctx'> </div><div class='ctx'> 	switch (charger_type) {</div><div class='ctx'> 	case MAX8997_CHARGER_TYPE_NONE:</div><div class='del'>-		if (mdata-&gt;charger_callback)</div><div class='del'>-			mdata-&gt;charger_callback(false, charger_type);</div><div class='del'>-		if (info-&gt;pre_charger_type == MAX8997_CHARGER_TYPE_USB) {</div><div class='del'>-			max8997_muic_handle_usb(info,</div><div class='del'>-					MAX8997_USB_DEVICE, false);</div><div class='del'>-		}</div><div class='add'>+		ret = max8997_muic_handle_charger_type_detach(info);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MAX8997_CHARGER_TYPE_USB:</div><div class='ctx'> 		if ((adc &amp; STATUS1_ADC_MASK) == MAX8997_ADC_OPEN) {</div><div class='ctx'> 			max8997_muic_handle_usb(info,</div><div class='ctx'> 					MAX8997_USB_DEVICE, true);</div><div class='ctx'> 		}</div><div class='del'>-		if (mdata-&gt;charger_callback)</div><div class='del'>-			mdata-&gt;charger_callback(true, charger_type);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MAX8997_CHARGER_TYPE_DOWNSTREAM_PORT:</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "Charge-downstream", true);</div><div class='add'>+		break;</div><div class='ctx'> 	case MAX8997_CHARGER_TYPE_DEDICATED_CHG:</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "TA", true);</div><div class='add'>+		break;</div><div class='ctx'> 	case MAX8997_CHARGER_TYPE_500MA:</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "Slow-charger", true);</div><div class='add'>+		break;</div><div class='ctx'> 	case MAX8997_CHARGER_TYPE_1A:</div><div class='del'>-		if (mdata-&gt;charger_callback)</div><div class='del'>-			mdata-&gt;charger_callback(true, charger_type);</div><div class='add'>+		extcon_set_cable_state(info-&gt;edev, "Fast-charger", true);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		break;</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;pre_charger_type = charger_type;</div><div class='hunk'>@@ -305,18 +343,17 @@ static void max8997_muic_irq_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8997_muic_info *info = container_of(work,</div><div class='ctx'> 			struct max8997_muic_info, irq_work);</div><div class='del'>-	struct max8997_platform_data *pdata =</div><div class='del'>-				dev_get_platdata(info-&gt;iodev-&gt;dev);</div><div class='del'>-	u8 status[3];</div><div class='add'>+	struct max8997_dev *max8997 = i2c_get_clientdata(info-&gt;muic);</div><div class='add'>+	u8 status[2];</div><div class='ctx'> 	u8 adc, chg_type;</div><div class='ctx'> </div><div class='del'>-	int irq_type = info-&gt;irq - pdata-&gt;irq_base;</div><div class='add'>+	int irq_type = info-&gt;irq - max8997-&gt;irq_base;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;info-&gt;mutex);</div><div class='ctx'> </div><div class='ctx'> 	ret = max8997_bulk_read(info-&gt;muic, MAX8997_MUIC_REG_STATUS1,</div><div class='del'>-				3, status);</div><div class='add'>+				2, status);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(info-&gt;dev, "failed to read muic register\n");</div><div class='ctx'> 		mutex_unlock(&amp;info-&gt;mutex);</div><div class='hunk'>@@ -340,8 +377,8 @@ static void max8997_muic_irq_work(struct work_struct *work)</div><div class='ctx'> 		max8997_muic_handle_charger_type(info, chg_type);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		dev_info(info-&gt;dev, "misc interrupt: %s occurred\n",</div><div class='del'>-			 muic_irqs[irq_type].name);</div><div class='add'>+		dev_info(info-&gt;dev, "misc interrupt: irq %d occurred\n",</div><div class='add'>+				irq_type);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -387,21 +424,10 @@ static void max8997_muic_detect_dev(struct max8997_muic_info *info)</div><div class='ctx'> 	max8997_muic_handle_charger_type(info, chg_type);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void max8997_initialize_device(struct max8997_muic_info *info)</div><div class='del'>-{</div><div class='del'>-	struct max8997_muic_platform_data *mdata = info-&gt;muic_pdata;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; mdata-&gt;num_init_data; i++) {</div><div class='del'>-		max8997_write_reg(info-&gt;muic, mdata-&gt;init_data[i].addr,</div><div class='del'>-				mdata-&gt;init_data[i].data);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __devinit max8997_muic_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct max8997_dev *iodev = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='del'>-	struct max8997_platform_data *pdata = dev_get_platdata(iodev-&gt;dev);</div><div class='add'>+	struct max8997_dev *max8997 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct max8997_platform_data *pdata = dev_get_platdata(max8997-&gt;dev);</div><div class='ctx'> 	struct max8997_muic_info *info;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='hunk'>@@ -412,16 +438,8 @@ static int __devinit max8997_muic_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_kfree;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!pdata-&gt;muic_pdata) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to get platform_data\n");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto err_pdata;</div><div class='del'>-	}</div><div class='del'>-	info-&gt;muic_pdata = pdata-&gt;muic_pdata;</div><div class='del'>-</div><div class='ctx'> 	info-&gt;dev = &amp;pdev-&gt;dev;</div><div class='del'>-	info-&gt;iodev = iodev;</div><div class='del'>-	info-&gt;muic = iodev-&gt;muic;</div><div class='add'>+	info-&gt;muic = max8997-&gt;muic;</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, info);</div><div class='ctx'> 	mutex_init(&amp;info-&gt;mutex);</div><div class='hunk'>@@ -440,24 +458,45 @@ static int __devinit max8997_muic_probe(struct platform_device *pdev)</div><div class='ctx'> 				"failed: irq request (IRQ: %d,"</div><div class='ctx'> 				" error :%d)\n",</div><div class='ctx'> 				muic_irq-&gt;irq, ret);</div><div class='del'>-</div><div class='del'>-			for (i = i - 1; i &gt;= 0; i--)</div><div class='del'>-				free_irq(muic_irq-&gt;irq, info);</div><div class='del'>-</div><div class='ctx'> 			goto err_irq;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* External connector */</div><div class='add'>+	info-&gt;edev = kzalloc(sizeof(struct extcon_dev), GFP_KERNEL);</div><div class='add'>+	if (!info-&gt;edev) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to allocate memory for extcon\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_irq;</div><div class='add'>+	}</div><div class='add'>+	info-&gt;edev-&gt;name = DEV_NAME;</div><div class='add'>+	info-&gt;edev-&gt;supported_cable = max8997_extcon_cable;</div><div class='add'>+	ret = extcon_dev_register(info-&gt;edev, NULL);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to register extcon device\n");</div><div class='add'>+		goto err_extcon;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Initialize registers according to platform data */</div><div class='del'>-	max8997_initialize_device(info);</div><div class='add'>+	if (pdata-&gt;muic_pdata) {</div><div class='add'>+		struct max8997_muic_platform_data *mdata = info-&gt;muic_pdata;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; mdata-&gt;num_init_data; i++) {</div><div class='add'>+			max8997_write_reg(info-&gt;muic, mdata-&gt;init_data[i].addr,</div><div class='add'>+					mdata-&gt;init_data[i].data);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Initial device detection */</div><div class='ctx'> 	max8997_muic_detect_dev(info);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='add'>+err_extcon:</div><div class='add'>+	kfree(info-&gt;edev);</div><div class='ctx'> err_irq:</div><div class='del'>-err_pdata:</div><div class='add'>+	while (--i &gt;= 0)</div><div class='add'>+		free_irq(pdata-&gt;irq_base + muic_irqs[i].irq, info);</div><div class='ctx'> 	kfree(info);</div><div class='ctx'> err_kfree:</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -466,14 +505,15 @@ err_kfree:</div><div class='ctx'> static int __devexit max8997_muic_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8997_muic_info *info = platform_get_drvdata(pdev);</div><div class='del'>-	struct max8997_platform_data *pdata =</div><div class='del'>-				dev_get_platdata(info-&gt;iodev-&gt;dev);</div><div class='add'>+	struct max8997_dev *max8997 = i2c_get_clientdata(info-&gt;muic);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(muic_irqs); i++)</div><div class='del'>-		free_irq(pdata-&gt;irq_base + muic_irqs[i].irq, info);</div><div class='add'>+		free_irq(max8997-&gt;irq_base + muic_irqs[i].irq, info);</div><div class='ctx'> 	cancel_work_sync(&amp;info-&gt;irq_work);</div><div class='ctx'> </div><div class='add'>+	extcon_dev_unregister(info-&gt;edev);</div><div class='add'>+</div><div class='ctx'> 	kfree(info);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -481,7 +521,7 @@ static int __devexit max8997_muic_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver max8997_muic_driver = {</div><div class='ctx'> 	.driver		= {</div><div class='del'>-		.name	= "max8997-muic",</div><div class='add'>+		.name	= DEV_NAME,</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= max8997_muic_probe,</div><div class='hunk'>@@ -490,6 +530,6 @@ static struct platform_driver max8997_muic_driver = {</div><div class='ctx'> </div><div class='ctx'> module_platform_driver(max8997_muic_driver);</div><div class='ctx'> </div><div class='del'>-MODULE_DESCRIPTION("Maxim MAX8997 MUIC driver");</div><div class='add'>+MODULE_DESCRIPTION("Maxim MAX8997 Extcon driver");</div><div class='ctx'> MODULE_AUTHOR("Donggeun Kim &lt;dg77.kim@samsung.com&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/extcon/extcon_class.c b/drivers/extcon/extcon_class.c<br/>new file mode 100644<br/>index 000000000000..f598a700ec15<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/extcon/extcon_class.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/extcon/extcon_class.c</a></div><div class='hunk'>@@ -0,0 +1,832 @@</div><div class='add'>+/*</div><div class='add'>+ *  drivers/extcon/extcon_class.c</div><div class='add'>+ *</div><div class='add'>+ *  External connector (extcon) class driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Samsung Electronics</div><div class='add'>+ * Author: Donggeun Kim &lt;dg77.kim@samsung.com&gt;</div><div class='add'>+ * Author: MyungJoo Ham &lt;myungjoo.ham@samsung.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * based on android/drivers/switch/switch_class.c</div><div class='add'>+ * Copyright (C) 2008 Google, Inc.</div><div class='add'>+ * Author: Mike Lockwood &lt;lockwood@android.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This software is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2, as published by the Free Software Foundation, and</div><div class='add'>+ * may be copied, distributed, and modified under those terms.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/extcon.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * extcon_cable_name suggests the standard cable names for commonly used</div><div class='add'>+ * cable types.</div><div class='add'>+ *</div><div class='add'>+ * However, please do not use extcon_cable_name directly for extcon_dev</div><div class='add'>+ * struct's supported_cable pointer unless your device really supports</div><div class='add'>+ * every single port-type of the following cable names. Please choose cable</div><div class='add'>+ * names that are actually used in your extcon device.</div><div class='add'>+ */</div><div class='add'>+const char *extcon_cable_name[] = {</div><div class='add'>+	[EXTCON_USB]		= "USB",</div><div class='add'>+	[EXTCON_USB_HOST]	= "USB-Host",</div><div class='add'>+	[EXTCON_TA]		= "TA",</div><div class='add'>+	[EXTCON_FAST_CHARGER]	= "Fast-charger",</div><div class='add'>+	[EXTCON_SLOW_CHARGER]	= "Slow-charger",</div><div class='add'>+	[EXTCON_CHARGE_DOWNSTREAM]	= "Charge-downstream",</div><div class='add'>+	[EXTCON_HDMI]		= "HDMI",</div><div class='add'>+	[EXTCON_MHL]		= "MHL",</div><div class='add'>+	[EXTCON_DVI]		= "DVI",</div><div class='add'>+	[EXTCON_VGA]		= "VGA",</div><div class='add'>+	[EXTCON_DOCK]		= "Dock",</div><div class='add'>+	[EXTCON_LINE_IN]	= "Line-in",</div><div class='add'>+	[EXTCON_LINE_OUT]	= "Line-out",</div><div class='add'>+	[EXTCON_MIC_IN]		= "Microphone",</div><div class='add'>+	[EXTCON_HEADPHONE_OUT]	= "Headphone",</div><div class='add'>+	[EXTCON_SPDIF_IN]	= "SPDIF-in",</div><div class='add'>+	[EXTCON_SPDIF_OUT]	= "SPDIF-out",</div><div class='add'>+	[EXTCON_VIDEO_IN]	= "Video-in",</div><div class='add'>+	[EXTCON_VIDEO_OUT]	= "Video-out",</div><div class='add'>+	[EXTCON_MECHANICAL]	= "Mechanical",</div><div class='add'>+</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct class *extcon_class;</div><div class='add'>+#if defined(CONFIG_ANDROID)</div><div class='add'>+static struct class_compat *switch_class;</div><div class='add'>+#endif /* CONFIG_ANDROID */</div><div class='add'>+</div><div class='add'>+static LIST_HEAD(extcon_dev_list);</div><div class='add'>+static DEFINE_MUTEX(extcon_dev_list_lock);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * check_mutually_exclusive - Check if new_state violates mutually_exclusive</div><div class='add'>+ *			    condition.</div><div class='add'>+ * @edev:	the extcon device</div><div class='add'>+ * @new_state:	new cable attach status for @edev</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 if nothing violates. Returns the index + 1 for the first</div><div class='add'>+ * violated condition.</div><div class='add'>+ */</div><div class='add'>+static int check_mutually_exclusive(struct extcon_dev *edev, u32 new_state)</div><div class='add'>+{</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	if (!edev-&gt;mutually_exclusive)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; edev-&gt;mutually_exclusive[i]; i++) {</div><div class='add'>+		int count = 0, j;</div><div class='add'>+		u32 correspondants = new_state &amp; edev-&gt;mutually_exclusive[i];</div><div class='add'>+		u32 exp = 1;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; 32; j++) {</div><div class='add'>+			if (exp &amp; correspondants)</div><div class='add'>+				count++;</div><div class='add'>+			if (count &gt; 1)</div><div class='add'>+				return i + 1;</div><div class='add'>+			exp &lt;&lt;= 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t state_show(struct device *dev, struct device_attribute *attr,</div><div class='add'>+			  char *buf)</div><div class='add'>+{</div><div class='add'>+	int i, count = 0;</div><div class='add'>+	struct extcon_dev *edev = (struct extcon_dev *) dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	if (edev-&gt;print_state) {</div><div class='add'>+		int ret = edev-&gt;print_state(edev, buf);</div><div class='add'>+</div><div class='add'>+		if (ret &gt;= 0)</div><div class='add'>+			return ret;</div><div class='add'>+		/* Use default if failed */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (edev-&gt;max_supported == 0)</div><div class='add'>+		return sprintf(buf, "%u\n", edev-&gt;state);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SUPPORTED_CABLE_MAX; i++) {</div><div class='add'>+		if (!edev-&gt;supported_cable[i])</div><div class='add'>+			break;</div><div class='add'>+		count += sprintf(buf + count, "%s=%d\n",</div><div class='add'>+				 edev-&gt;supported_cable[i],</div><div class='add'>+				 !!(edev-&gt;state &amp; (1 &lt;&lt; i)));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int extcon_set_state(struct extcon_dev *edev, u32 state);</div><div class='add'>+static ssize_t state_store(struct device *dev, struct device_attribute *attr,</div><div class='add'>+			   const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	u32 state;</div><div class='add'>+	ssize_t ret = 0;</div><div class='add'>+	struct extcon_dev *edev = (struct extcon_dev *) dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	ret = sscanf(buf, "0x%x", &amp;state);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	else</div><div class='add'>+		ret = extcon_set_state(edev, state);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t name_show(struct device *dev, struct device_attribute *attr,</div><div class='add'>+		char *buf)</div><div class='add'>+{</div><div class='add'>+	struct extcon_dev *edev = (struct extcon_dev *) dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	/* Optional callback given by the user */</div><div class='add'>+	if (edev-&gt;print_name) {</div><div class='add'>+		int ret = edev-&gt;print_name(edev, buf);</div><div class='add'>+		if (ret &gt;= 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%s\n", dev_name(edev-&gt;dev));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t cable_name_show(struct device *dev,</div><div class='add'>+			       struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct extcon_cable *cable = container_of(attr, struct extcon_cable,</div><div class='add'>+						  attr_name);</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%s\n",</div><div class='add'>+		       cable-&gt;edev-&gt;supported_cable[cable-&gt;cable_index]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t cable_state_show(struct device *dev,</div><div class='add'>+				struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct extcon_cable *cable = container_of(attr, struct extcon_cable,</div><div class='add'>+						  attr_state);</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%d\n",</div><div class='add'>+		       extcon_get_cable_state_(cable-&gt;edev,</div><div class='add'>+					       cable-&gt;cable_index));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t cable_state_store(struct device *dev,</div><div class='add'>+				 struct device_attribute *attr, const char *buf,</div><div class='add'>+				 size_t count)</div><div class='add'>+{</div><div class='add'>+	struct extcon_cable *cable = container_of(attr, struct extcon_cable,</div><div class='add'>+						  attr_state);</div><div class='add'>+	int ret, state;</div><div class='add'>+</div><div class='add'>+	ret = sscanf(buf, "%d", &amp;state);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	else</div><div class='add'>+		ret = extcon_set_cable_state_(cable-&gt;edev, cable-&gt;cable_index,</div><div class='add'>+					      state);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_update_state() - Update the cable attach states of the extcon device</div><div class='add'>+ *			only for the masked bits.</div><div class='add'>+ * @edev:	the extcon device</div><div class='add'>+ * @mask:	the bit mask to designate updated bits.</div><div class='add'>+ * @state:	new cable attach status for @edev</div><div class='add'>+ *</div><div class='add'>+ * Changing the state sends uevent with environment variable containing</div><div class='add'>+ * the name of extcon device (envp[0]) and the state output (envp[1]).</div><div class='add'>+ * Tizen uses this format for extcon device to get events from ports.</div><div class='add'>+ * Android uses this format as well.</div><div class='add'>+ *</div><div class='add'>+ * Note that the notifier provides which bits are changed in the state</div><div class='add'>+ * variable with the val parameter (second) to the callback.</div><div class='add'>+ */</div><div class='add'>+int extcon_update_state(struct extcon_dev *edev, u32 mask, u32 state)</div><div class='add'>+{</div><div class='add'>+	char name_buf[120];</div><div class='add'>+	char state_buf[120];</div><div class='add'>+	char *prop_buf;</div><div class='add'>+	char *envp[3];</div><div class='add'>+	int env_offset = 0;</div><div class='add'>+	int length;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;edev-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (edev-&gt;state != ((edev-&gt;state &amp; ~mask) | (state &amp; mask))) {</div><div class='add'>+		u32 old_state = edev-&gt;state;</div><div class='add'>+</div><div class='add'>+		if (check_mutually_exclusive(edev, (edev-&gt;state &amp; ~mask) |</div><div class='add'>+						   (state &amp; mask))) {</div><div class='add'>+			spin_unlock_irqrestore(&amp;edev-&gt;lock, flags);</div><div class='add'>+			return -EPERM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		edev-&gt;state &amp;= ~mask;</div><div class='add'>+		edev-&gt;state |= state &amp; mask;</div><div class='add'>+</div><div class='add'>+		raw_notifier_call_chain(&amp;edev-&gt;nh, old_state, edev);</div><div class='add'>+</div><div class='add'>+		/* This could be in interrupt handler */</div><div class='add'>+		prop_buf = (char *)get_zeroed_page(GFP_ATOMIC);</div><div class='add'>+		if (prop_buf) {</div><div class='add'>+			length = name_show(edev-&gt;dev, NULL, prop_buf);</div><div class='add'>+			if (length &gt; 0) {</div><div class='add'>+				if (prop_buf[length - 1] == '\n')</div><div class='add'>+					prop_buf[length - 1] = 0;</div><div class='add'>+				snprintf(name_buf, sizeof(name_buf),</div><div class='add'>+					"NAME=%s", prop_buf);</div><div class='add'>+				envp[env_offset++] = name_buf;</div><div class='add'>+			}</div><div class='add'>+			length = state_show(edev-&gt;dev, NULL, prop_buf);</div><div class='add'>+			if (length &gt; 0) {</div><div class='add'>+				if (prop_buf[length - 1] == '\n')</div><div class='add'>+					prop_buf[length - 1] = 0;</div><div class='add'>+				snprintf(state_buf, sizeof(state_buf),</div><div class='add'>+					"STATE=%s", prop_buf);</div><div class='add'>+				envp[env_offset++] = state_buf;</div><div class='add'>+			}</div><div class='add'>+			envp[env_offset] = NULL;</div><div class='add'>+			/* Unlock early before uevent */</div><div class='add'>+			spin_unlock_irqrestore(&amp;edev-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+			kobject_uevent_env(&amp;edev-&gt;dev-&gt;kobj, KOBJ_CHANGE, envp);</div><div class='add'>+			free_page((unsigned long)prop_buf);</div><div class='add'>+		} else {</div><div class='add'>+			/* Unlock early before uevent */</div><div class='add'>+			spin_unlock_irqrestore(&amp;edev-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+			dev_err(edev-&gt;dev, "out of memory in extcon_set_state\n");</div><div class='add'>+			kobject_uevent(&amp;edev-&gt;dev-&gt;kobj, KOBJ_CHANGE);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* No changes */</div><div class='add'>+		spin_unlock_irqrestore(&amp;edev-&gt;lock, flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(extcon_update_state);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_set_state() - Set the cable attach states of the extcon device.</div><div class='add'>+ * @edev:	the extcon device</div><div class='add'>+ * @state:	new cable attach status for @edev</div><div class='add'>+ *</div><div class='add'>+ * Note that notifier provides which bits are changed in the state</div><div class='add'>+ * variable with the val parameter (second) to the callback.</div><div class='add'>+ */</div><div class='add'>+int extcon_set_state(struct extcon_dev *edev, u32 state)</div><div class='add'>+{</div><div class='add'>+	return extcon_update_state(edev, 0xffffffff, state);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(extcon_set_state);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_find_cable_index() - Get the cable index based on the cable name.</div><div class='add'>+ * @edev:	the extcon device that has the cable.</div><div class='add'>+ * @cable_name:	cable name to be searched.</div><div class='add'>+ *</div><div class='add'>+ * Note that accessing a cable state based on cable_index is faster than</div><div class='add'>+ * cable_name because using cable_name induces a loop with strncmp().</div><div class='add'>+ * Thus, when get/set_cable_state is repeatedly used, using cable_index</div><div class='add'>+ * is recommended.</div><div class='add'>+ */</div><div class='add'>+int extcon_find_cable_index(struct extcon_dev *edev, const char *cable_name)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (edev-&gt;supported_cable) {</div><div class='add'>+		for (i = 0; edev-&gt;supported_cable[i]; i++) {</div><div class='add'>+			if (!strncmp(edev-&gt;supported_cable[i],</div><div class='add'>+				cable_name, CABLE_NAME_MAX))</div><div class='add'>+				return i;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(extcon_find_cable_index);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_get_cable_state_() - Get the status of a specific cable.</div><div class='add'>+ * @edev:	the extcon device that has the cable.</div><div class='add'>+ * @index:	cable index that can be retrieved by extcon_find_cable_index().</div><div class='add'>+ */</div><div class='add'>+int extcon_get_cable_state_(struct extcon_dev *edev, int index)</div><div class='add'>+{</div><div class='add'>+	if (index &lt; 0 || (edev-&gt;max_supported &amp;&amp; edev-&gt;max_supported &lt;= index))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return !!(edev-&gt;state &amp; (1 &lt;&lt; index));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(extcon_get_cable_state_);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_get_cable_state() - Get the status of a specific cable.</div><div class='add'>+ * @edev:	the extcon device that has the cable.</div><div class='add'>+ * @cable_name:	cable name.</div><div class='add'>+ *</div><div class='add'>+ * Note that this is slower than extcon_get_cable_state_.</div><div class='add'>+ */</div><div class='add'>+int extcon_get_cable_state(struct extcon_dev *edev, const char *cable_name)</div><div class='add'>+{</div><div class='add'>+	return extcon_get_cable_state_(edev, extcon_find_cable_index</div><div class='add'>+						(edev, cable_name));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(extcon_get_cable_state);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_get_cable_state_() - Set the status of a specific cable.</div><div class='add'>+ * @edev:	the extcon device that has the cable.</div><div class='add'>+ * @index:	cable index that can be retrieved by extcon_find_cable_index().</div><div class='add'>+ * @cable_state:	the new cable status. The default semantics is</div><div class='add'>+ *			true: attached / false: detached.</div><div class='add'>+ */</div><div class='add'>+int extcon_set_cable_state_(struct extcon_dev *edev,</div><div class='add'>+			int index, bool cable_state)</div><div class='add'>+{</div><div class='add'>+	u32 state;</div><div class='add'>+</div><div class='add'>+	if (index &lt; 0 || (edev-&gt;max_supported &amp;&amp; edev-&gt;max_supported &lt;= index))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	state = cable_state ? (1 &lt;&lt; index) : 0;</div><div class='add'>+	return extcon_update_state(edev, 1 &lt;&lt; index, state);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(extcon_set_cable_state_);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_get_cable_state() - Set the status of a specific cable.</div><div class='add'>+ * @edev:	the extcon device that has the cable.</div><div class='add'>+ * @cable_name:	cable name.</div><div class='add'>+ * @cable_state:	the new cable status. The default semantics is</div><div class='add'>+ *			true: attached / false: detached.</div><div class='add'>+ *</div><div class='add'>+ * Note that this is slower than extcon_set_cable_state_.</div><div class='add'>+ */</div><div class='add'>+int extcon_set_cable_state(struct extcon_dev *edev,</div><div class='add'>+			const char *cable_name, bool cable_state)</div><div class='add'>+{</div><div class='add'>+	return extcon_set_cable_state_(edev, extcon_find_cable_index</div><div class='add'>+					(edev, cable_name), cable_state);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(extcon_set_cable_state);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_get_extcon_dev() - Get the extcon device instance from the name</div><div class='add'>+ * @extcon_name:	The extcon name provided with extcon_dev_register()</div><div class='add'>+ */</div><div class='add'>+struct extcon_dev *extcon_get_extcon_dev(const char *extcon_name)</div><div class='add'>+{</div><div class='add'>+	struct extcon_dev *sd;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;extcon_dev_list_lock);</div><div class='add'>+	list_for_each_entry(sd, &amp;extcon_dev_list, entry) {</div><div class='add'>+		if (!strcmp(sd-&gt;name, extcon_name))</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+	sd = NULL;</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;extcon_dev_list_lock);</div><div class='add'>+	return sd;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(extcon_get_extcon_dev);</div><div class='add'>+</div><div class='add'>+static int _call_per_cable(struct notifier_block *nb, unsigned long val,</div><div class='add'>+			   void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct extcon_specific_cable_nb *obj = container_of(nb,</div><div class='add'>+			struct extcon_specific_cable_nb, internal_nb);</div><div class='add'>+	struct extcon_dev *edev = ptr;</div><div class='add'>+</div><div class='add'>+	if ((val &amp; (1 &lt;&lt; obj-&gt;cable_index)) !=</div><div class='add'>+	    (edev-&gt;state &amp; (1 &lt;&lt; obj-&gt;cable_index))) {</div><div class='add'>+		bool cable_state = true;</div><div class='add'>+</div><div class='add'>+		obj-&gt;previous_value = val;</div><div class='add'>+</div><div class='add'>+		if (val &amp; (1 &lt;&lt; obj-&gt;cable_index))</div><div class='add'>+			cable_state = false;</div><div class='add'>+</div><div class='add'>+		return obj-&gt;user_nb-&gt;notifier_call(obj-&gt;user_nb,</div><div class='add'>+				cable_state, ptr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NOTIFY_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_register_interest() - Register a notifier for a state change of a</div><div class='add'>+ *			      specific cable, not a entier set of cables of a</div><div class='add'>+ *			      extcon device.</div><div class='add'>+ * @obj:	an empty extcon_specific_cable_nb object to be returned.</div><div class='add'>+ * @extcon_name:	the name of extcon device.</div><div class='add'>+ * @cable_name:		the target cable name.</div><div class='add'>+ * @nb:		the notifier block to get notified.</div><div class='add'>+ *</div><div class='add'>+ * Provide an empty extcon_specific_cable_nb. extcon_register_interest() sets</div><div class='add'>+ * the struct for you.</div><div class='add'>+ *</div><div class='add'>+ * extcon_register_interest is a helper function for those who want to get</div><div class='add'>+ * notification for a single specific cable's status change. If a user wants</div><div class='add'>+ * to get notification for any changes of all cables of a extcon device,</div><div class='add'>+ * he/she should use the general extcon_register_notifier().</div><div class='add'>+ *</div><div class='add'>+ * Note that the second parameter given to the callback of nb (val) is</div><div class='add'>+ * "old_state", not the current state. The current state can be retrieved</div><div class='add'>+ * by looking at the third pameter (edev pointer)'s state value.</div><div class='add'>+ */</div><div class='add'>+int extcon_register_interest(struct extcon_specific_cable_nb *obj,</div><div class='add'>+			     const char *extcon_name, const char *cable_name,</div><div class='add'>+			     struct notifier_block *nb)</div><div class='add'>+{</div><div class='add'>+	if (!obj || !extcon_name || !cable_name || !nb)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	obj-&gt;edev = extcon_get_extcon_dev(extcon_name);</div><div class='add'>+	if (!obj-&gt;edev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	obj-&gt;cable_index = extcon_find_cable_index(obj-&gt;edev, cable_name);</div><div class='add'>+	if (obj-&gt;cable_index &lt; 0)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	obj-&gt;user_nb = nb;</div><div class='add'>+</div><div class='add'>+	obj-&gt;internal_nb.notifier_call = _call_per_cable;</div><div class='add'>+</div><div class='add'>+	return raw_notifier_chain_register(&amp;obj-&gt;edev-&gt;nh, &amp;obj-&gt;internal_nb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_unregister_interest() - Unregister the notifier registered by</div><div class='add'>+ *				extcon_register_interest().</div><div class='add'>+ * @obj:	the extcon_specific_cable_nb object returned by</div><div class='add'>+ *		extcon_register_interest().</div><div class='add'>+ */</div><div class='add'>+int extcon_unregister_interest(struct extcon_specific_cable_nb *obj)</div><div class='add'>+{</div><div class='add'>+	if (!obj)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return raw_notifier_chain_unregister(&amp;obj-&gt;edev-&gt;nh, &amp;obj-&gt;internal_nb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_register_notifier() - Register a notifee to get notified by</div><div class='add'>+ *			      any attach status changes from the extcon.</div><div class='add'>+ * @edev:	the extcon device.</div><div class='add'>+ * @nb:		a notifier block to be registered.</div><div class='add'>+ *</div><div class='add'>+ * Note that the second parameter given to the callback of nb (val) is</div><div class='add'>+ * "old_state", not the current state. The current state can be retrieved</div><div class='add'>+ * by looking at the third pameter (edev pointer)'s state value.</div><div class='add'>+ */</div><div class='add'>+int extcon_register_notifier(struct extcon_dev *edev,</div><div class='add'>+			struct notifier_block *nb)</div><div class='add'>+{</div><div class='add'>+	return raw_notifier_chain_register(&amp;edev-&gt;nh, nb);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(extcon_register_notifier);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_unregister_notifier() - Unregister a notifee from the extcon device.</div><div class='add'>+ * @edev:	the extcon device.</div><div class='add'>+ * @nb:		a registered notifier block to be unregistered.</div><div class='add'>+ */</div><div class='add'>+int extcon_unregister_notifier(struct extcon_dev *edev,</div><div class='add'>+			struct notifier_block *nb)</div><div class='add'>+{</div><div class='add'>+	return raw_notifier_chain_unregister(&amp;edev-&gt;nh, nb);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(extcon_unregister_notifier);</div><div class='add'>+</div><div class='add'>+static struct device_attribute extcon_attrs[] = {</div><div class='add'>+	__ATTR(state, S_IRUGO | S_IWUSR, state_show, state_store),</div><div class='add'>+	__ATTR_RO(name),</div><div class='add'>+	__ATTR_NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int create_extcon_class(void)</div><div class='add'>+{</div><div class='add'>+	if (!extcon_class) {</div><div class='add'>+		extcon_class = class_create(THIS_MODULE, "extcon");</div><div class='add'>+		if (IS_ERR(extcon_class))</div><div class='add'>+			return PTR_ERR(extcon_class);</div><div class='add'>+		extcon_class-&gt;dev_attrs = extcon_attrs;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_ANDROID)</div><div class='add'>+		switch_class = class_compat_register("switch");</div><div class='add'>+		if (WARN(!switch_class, "cannot allocate"))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+#endif /* CONFIG_ANDROID */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void extcon_cleanup(struct extcon_dev *edev, bool skip)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;extcon_dev_list_lock);</div><div class='add'>+	list_del(&amp;edev-&gt;entry);</div><div class='add'>+	mutex_unlock(&amp;extcon_dev_list_lock);</div><div class='add'>+</div><div class='add'>+	if (!skip &amp;&amp; get_device(edev-&gt;dev)) {</div><div class='add'>+		int index;</div><div class='add'>+</div><div class='add'>+		if (edev-&gt;mutually_exclusive &amp;&amp; edev-&gt;max_supported) {</div><div class='add'>+			for (index = 0; edev-&gt;mutually_exclusive[index];</div><div class='add'>+			     index++)</div><div class='add'>+				kfree(edev-&gt;d_attrs_muex[index].attr.name);</div><div class='add'>+			kfree(edev-&gt;d_attrs_muex);</div><div class='add'>+			kfree(edev-&gt;attrs_muex);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (index = 0; index &lt; edev-&gt;max_supported; index++)</div><div class='add'>+			kfree(edev-&gt;cables[index].attr_g.name);</div><div class='add'>+</div><div class='add'>+		if (edev-&gt;max_supported) {</div><div class='add'>+			kfree(edev-&gt;extcon_dev_type.groups);</div><div class='add'>+			kfree(edev-&gt;cables);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		device_unregister(edev-&gt;dev);</div><div class='add'>+		put_device(edev-&gt;dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(edev-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void extcon_dev_release(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct extcon_dev *edev = (struct extcon_dev *) dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	extcon_cleanup(edev, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *muex_name = "mutually_exclusive";</div><div class='add'>+static void dummy_sysfs_dev_release(struct device *dev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_dev_register() - Register a new extcon device</div><div class='add'>+ * @edev	: the new extcon device (should be allocated before calling)</div><div class='add'>+ * @dev		: the parent device for this extcon device.</div><div class='add'>+ *</div><div class='add'>+ * Among the members of edev struct, please set the "user initializing data"</div><div class='add'>+ * in any case and set the "optional callbacks" if required. However, please</div><div class='add'>+ * do not set the values of "internal data", which are initialized by</div><div class='add'>+ * this function.</div><div class='add'>+ */</div><div class='add'>+int extcon_dev_register(struct extcon_dev *edev, struct device *dev)</div><div class='add'>+{</div><div class='add'>+	int ret, index = 0;</div><div class='add'>+</div><div class='add'>+	if (!extcon_class) {</div><div class='add'>+		ret = create_extcon_class();</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (edev-&gt;supported_cable) {</div><div class='add'>+		/* Get size of array */</div><div class='add'>+		for (index = 0; edev-&gt;supported_cable[index]; index++)</div><div class='add'>+			;</div><div class='add'>+		edev-&gt;max_supported = index;</div><div class='add'>+	} else {</div><div class='add'>+		edev-&gt;max_supported = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (index &gt; SUPPORTED_CABLE_MAX) {</div><div class='add'>+		dev_err(edev-&gt;dev, "extcon: maximum number of supported cables exceeded.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	edev-&gt;dev = kzalloc(sizeof(struct device), GFP_KERNEL);</div><div class='add'>+	if (!edev-&gt;dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	edev-&gt;dev-&gt;parent = dev;</div><div class='add'>+	edev-&gt;dev-&gt;class = extcon_class;</div><div class='add'>+	edev-&gt;dev-&gt;release = extcon_dev_release;</div><div class='add'>+</div><div class='add'>+	dev_set_name(edev-&gt;dev, edev-&gt;name ? edev-&gt;name : dev_name(dev));</div><div class='add'>+</div><div class='add'>+	if (edev-&gt;max_supported) {</div><div class='add'>+		char buf[10];</div><div class='add'>+		char *str;</div><div class='add'>+		struct extcon_cable *cable;</div><div class='add'>+</div><div class='add'>+		edev-&gt;cables = kzalloc(sizeof(struct extcon_cable) *</div><div class='add'>+				       edev-&gt;max_supported, GFP_KERNEL);</div><div class='add'>+		if (!edev-&gt;cables) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err_sysfs_alloc;</div><div class='add'>+		}</div><div class='add'>+		for (index = 0; index &lt; edev-&gt;max_supported; index++) {</div><div class='add'>+			cable = &amp;edev-&gt;cables[index];</div><div class='add'>+</div><div class='add'>+			snprintf(buf, 10, "cable.%d", index);</div><div class='add'>+			str = kzalloc(sizeof(char) * (strlen(buf) + 1),</div><div class='add'>+				      GFP_KERNEL);</div><div class='add'>+			if (!str) {</div><div class='add'>+				for (index--; index &gt;= 0; index--) {</div><div class='add'>+					cable = &amp;edev-&gt;cables[index];</div><div class='add'>+					kfree(cable-&gt;attr_g.name);</div><div class='add'>+				}</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+				goto err_alloc_cables;</div><div class='add'>+			}</div><div class='add'>+			strcpy(str, buf);</div><div class='add'>+</div><div class='add'>+			cable-&gt;edev = edev;</div><div class='add'>+			cable-&gt;cable_index = index;</div><div class='add'>+			cable-&gt;attrs[0] = &amp;cable-&gt;attr_name.attr;</div><div class='add'>+			cable-&gt;attrs[1] = &amp;cable-&gt;attr_state.attr;</div><div class='add'>+			cable-&gt;attrs[2] = NULL;</div><div class='add'>+			cable-&gt;attr_g.name = str;</div><div class='add'>+			cable-&gt;attr_g.attrs = cable-&gt;attrs;</div><div class='add'>+</div><div class='add'>+			cable-&gt;attr_name.attr.name = "name";</div><div class='add'>+			cable-&gt;attr_name.attr.mode = 0444;</div><div class='add'>+			cable-&gt;attr_name.show = cable_name_show;</div><div class='add'>+</div><div class='add'>+			cable-&gt;attr_state.attr.name = "state";</div><div class='add'>+			cable-&gt;attr_state.attr.mode = 0644;</div><div class='add'>+			cable-&gt;attr_state.show = cable_state_show;</div><div class='add'>+			cable-&gt;attr_state.store = cable_state_store;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (edev-&gt;max_supported &amp;&amp; edev-&gt;mutually_exclusive) {</div><div class='add'>+		char buf[80];</div><div class='add'>+		char *name;</div><div class='add'>+</div><div class='add'>+		/* Count the size of mutually_exclusive array */</div><div class='add'>+		for (index = 0; edev-&gt;mutually_exclusive[index]; index++)</div><div class='add'>+			;</div><div class='add'>+</div><div class='add'>+		edev-&gt;attrs_muex = kzalloc(sizeof(struct attribute *) *</div><div class='add'>+					   (index + 1), GFP_KERNEL);</div><div class='add'>+		if (!edev-&gt;attrs_muex) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err_muex;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		edev-&gt;d_attrs_muex = kzalloc(sizeof(struct device_attribute) *</div><div class='add'>+					     index, GFP_KERNEL);</div><div class='add'>+		if (!edev-&gt;d_attrs_muex) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			kfree(edev-&gt;attrs_muex);</div><div class='add'>+			goto err_muex;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (index = 0; edev-&gt;mutually_exclusive[index]; index++) {</div><div class='add'>+			sprintf(buf, "0x%x", edev-&gt;mutually_exclusive[index]);</div><div class='add'>+			name = kzalloc(sizeof(char) * (strlen(buf) + 1),</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+			if (!name) {</div><div class='add'>+				for (index--; index &gt;= 0; index--) {</div><div class='add'>+					kfree(edev-&gt;d_attrs_muex[index].attr.</div><div class='add'>+					      name);</div><div class='add'>+				}</div><div class='add'>+				kfree(edev-&gt;d_attrs_muex);</div><div class='add'>+				kfree(edev-&gt;attrs_muex);</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto err_muex;</div><div class='add'>+			}</div><div class='add'>+			strcpy(name, buf);</div><div class='add'>+			edev-&gt;d_attrs_muex[index].attr.name = name;</div><div class='add'>+			edev-&gt;d_attrs_muex[index].attr.mode = 0000;</div><div class='add'>+			edev-&gt;attrs_muex[index] = &amp;edev-&gt;d_attrs_muex[index]</div><div class='add'>+							.attr;</div><div class='add'>+		}</div><div class='add'>+		edev-&gt;attr_g_muex.name = muex_name;</div><div class='add'>+		edev-&gt;attr_g_muex.attrs = edev-&gt;attrs_muex;</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (edev-&gt;max_supported) {</div><div class='add'>+		edev-&gt;extcon_dev_type.groups =</div><div class='add'>+			kzalloc(sizeof(struct attribute_group *) *</div><div class='add'>+				(edev-&gt;max_supported + 2), GFP_KERNEL);</div><div class='add'>+		if (!edev-&gt;extcon_dev_type.groups) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err_alloc_groups;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		edev-&gt;extcon_dev_type.name = dev_name(edev-&gt;dev);</div><div class='add'>+		edev-&gt;extcon_dev_type.release = dummy_sysfs_dev_release;</div><div class='add'>+</div><div class='add'>+		for (index = 0; index &lt; edev-&gt;max_supported; index++)</div><div class='add'>+			edev-&gt;extcon_dev_type.groups[index] =</div><div class='add'>+				&amp;edev-&gt;cables[index].attr_g;</div><div class='add'>+		if (edev-&gt;mutually_exclusive)</div><div class='add'>+			edev-&gt;extcon_dev_type.groups[index] =</div><div class='add'>+				&amp;edev-&gt;attr_g_muex;</div><div class='add'>+</div><div class='add'>+		edev-&gt;dev-&gt;type = &amp;edev-&gt;extcon_dev_type;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = device_register(edev-&gt;dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		put_device(edev-&gt;dev);</div><div class='add'>+		goto err_dev;</div><div class='add'>+	}</div><div class='add'>+#if defined(CONFIG_ANDROID)</div><div class='add'>+	if (switch_class)</div><div class='add'>+		ret = class_compat_create_link(switch_class, edev-&gt;dev,</div><div class='add'>+					       dev);</div><div class='add'>+#endif /* CONFIG_ANDROID */</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;edev-&gt;lock);</div><div class='add'>+</div><div class='add'>+	RAW_INIT_NOTIFIER_HEAD(&amp;edev-&gt;nh);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(edev-&gt;dev, edev);</div><div class='add'>+	edev-&gt;state = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;extcon_dev_list_lock);</div><div class='add'>+	list_add(&amp;edev-&gt;entry, &amp;extcon_dev_list);</div><div class='add'>+	mutex_unlock(&amp;extcon_dev_list_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_dev:</div><div class='add'>+	if (edev-&gt;max_supported)</div><div class='add'>+		kfree(edev-&gt;extcon_dev_type.groups);</div><div class='add'>+err_alloc_groups:</div><div class='add'>+	if (edev-&gt;max_supported &amp;&amp; edev-&gt;mutually_exclusive) {</div><div class='add'>+		for (index = 0; edev-&gt;mutually_exclusive[index]; index++)</div><div class='add'>+			kfree(edev-&gt;d_attrs_muex[index].attr.name);</div><div class='add'>+		kfree(edev-&gt;d_attrs_muex);</div><div class='add'>+		kfree(edev-&gt;attrs_muex);</div><div class='add'>+	}</div><div class='add'>+err_muex:</div><div class='add'>+	for (index = 0; index &lt; edev-&gt;max_supported; index++)</div><div class='add'>+		kfree(edev-&gt;cables[index].attr_g.name);</div><div class='add'>+err_alloc_cables:</div><div class='add'>+	if (edev-&gt;max_supported)</div><div class='add'>+		kfree(edev-&gt;cables);</div><div class='add'>+err_sysfs_alloc:</div><div class='add'>+	kfree(edev-&gt;dev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(extcon_dev_register);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * extcon_dev_unregister() - Unregister the extcon device.</div><div class='add'>+ * @edev:	the extcon device instance to be unregitered.</div><div class='add'>+ *</div><div class='add'>+ * Note that this does not call kfree(edev) because edev was not allocated</div><div class='add'>+ * by this class.</div><div class='add'>+ */</div><div class='add'>+void extcon_dev_unregister(struct extcon_dev *edev)</div><div class='add'>+{</div><div class='add'>+	extcon_cleanup(edev, false);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(extcon_dev_unregister);</div><div class='add'>+</div><div class='add'>+static int __init extcon_class_init(void)</div><div class='add'>+{</div><div class='add'>+	return create_extcon_class();</div><div class='add'>+}</div><div class='add'>+module_init(extcon_class_init);</div><div class='add'>+</div><div class='add'>+static void __exit extcon_class_exit(void)</div><div class='add'>+{</div><div class='add'>+	class_destroy(extcon_class);</div><div class='add'>+}</div><div class='add'>+module_exit(extcon_class_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Mike Lockwood &lt;lockwood@android.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Donggeun Kim &lt;dg77.kim@samsung.com&gt;");</div><div class='add'>+MODULE_AUTHOR("MyungJoo Ham &lt;myungjoo.ham@samsung.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("External connector (extcon) class driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/extcon/extcon_gpio.c b/drivers/extcon/extcon_gpio.c<br/>new file mode 100644<br/>index 000000000000..fe7a07b47336<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/extcon/extcon_gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/extcon/extcon_gpio.c</a></div><div class='hunk'>@@ -0,0 +1,169 @@</div><div class='add'>+/*</div><div class='add'>+ *  drivers/extcon/extcon_gpio.c</div><div class='add'>+ *</div><div class='add'>+ *  Single-state GPIO extcon driver based on extcon class</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2008 Google, Inc.</div><div class='add'>+ * Author: Mike Lockwood &lt;lockwood@android.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Modified by MyungJoo Ham &lt;myungjoo.ham@samsung.com&gt; to support extcon</div><div class='add'>+ * (originally switch class is supported)</div><div class='add'>+ *</div><div class='add'>+ * This software is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2, as published by the Free Software Foundation, and</div><div class='add'>+ * may be copied, distributed, and modified under those terms.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/extcon.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/extcon.h&gt;</div><div class='add'>+#include &lt;linux/extcon/extcon_gpio.h&gt;</div><div class='add'>+</div><div class='add'>+struct gpio_extcon_data {</div><div class='add'>+	struct extcon_dev edev;</div><div class='add'>+	unsigned gpio;</div><div class='add'>+	const char *state_on;</div><div class='add'>+	const char *state_off;</div><div class='add'>+	int irq;</div><div class='add'>+	struct delayed_work work;</div><div class='add'>+	unsigned long debounce_jiffies;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void gpio_extcon_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	int state;</div><div class='add'>+	struct gpio_extcon_data	*data =</div><div class='add'>+		container_of(to_delayed_work(work), struct gpio_extcon_data,</div><div class='add'>+			     work);</div><div class='add'>+</div><div class='add'>+	state = gpio_get_value(data-&gt;gpio);</div><div class='add'>+	extcon_set_state(&amp;data-&gt;edev, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t gpio_irq_handler(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct gpio_extcon_data *extcon_data = dev_id;</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;extcon_data-&gt;work,</div><div class='add'>+			      extcon_data-&gt;debounce_jiffies);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t extcon_gpio_print_state(struct extcon_dev *edev, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct gpio_extcon_data	*extcon_data =</div><div class='add'>+		container_of(edev, struct gpio_extcon_data, edev);</div><div class='add'>+	const char *state;</div><div class='add'>+	if (extcon_get_state(edev))</div><div class='add'>+		state = extcon_data-&gt;state_on;</div><div class='add'>+	else</div><div class='add'>+		state = extcon_data-&gt;state_off;</div><div class='add'>+</div><div class='add'>+	if (state)</div><div class='add'>+		return sprintf(buf, "%s\n", state);</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit gpio_extcon_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct gpio_extcon_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct gpio_extcon_data *extcon_data;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	if (!pdata-&gt;irq_flags) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "IRQ flag is not specified.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	extcon_data = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct gpio_extcon_data),</div><div class='add'>+				   GFP_KERNEL);</div><div class='add'>+	if (!extcon_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	extcon_data-&gt;edev.name = pdata-&gt;name;</div><div class='add'>+	extcon_data-&gt;gpio = pdata-&gt;gpio;</div><div class='add'>+	extcon_data-&gt;state_on = pdata-&gt;state_on;</div><div class='add'>+	extcon_data-&gt;state_off = pdata-&gt;state_off;</div><div class='add'>+	if (pdata-&gt;state_on &amp;&amp; pdata-&gt;state_off)</div><div class='add'>+		extcon_data-&gt;edev.print_state = extcon_gpio_print_state;</div><div class='add'>+	extcon_data-&gt;debounce_jiffies = msecs_to_jiffies(pdata-&gt;debounce);</div><div class='add'>+</div><div class='add'>+	ret = extcon_dev_register(&amp;extcon_data-&gt;edev, &amp;pdev-&gt;dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_extcon_dev_register;</div><div class='add'>+</div><div class='add'>+	ret = gpio_request_one(extcon_data-&gt;gpio, GPIOF_DIR_IN, pdev-&gt;name);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_request_gpio;</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;extcon_data-&gt;work, gpio_extcon_work);</div><div class='add'>+</div><div class='add'>+	extcon_data-&gt;irq = gpio_to_irq(extcon_data-&gt;gpio);</div><div class='add'>+	if (extcon_data-&gt;irq &lt; 0) {</div><div class='add'>+		ret = extcon_data-&gt;irq;</div><div class='add'>+		goto err_detect_irq_num_failed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = request_any_context_irq(extcon_data-&gt;irq, gpio_irq_handler,</div><div class='add'>+				      pdata-&gt;irq_flags, pdev-&gt;name,</div><div class='add'>+				      extcon_data);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_request_irq;</div><div class='add'>+</div><div class='add'>+	/* Perform initial detection */</div><div class='add'>+	gpio_extcon_work(&amp;extcon_data-&gt;work.work);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_request_irq:</div><div class='add'>+err_detect_irq_num_failed:</div><div class='add'>+	gpio_free(extcon_data-&gt;gpio);</div><div class='add'>+err_request_gpio:</div><div class='add'>+	extcon_dev_unregister(&amp;extcon_data-&gt;edev);</div><div class='add'>+err_extcon_dev_register:</div><div class='add'>+	devm_kfree(&amp;pdev-&gt;dev, extcon_data);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit gpio_extcon_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct gpio_extcon_data *extcon_data = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;extcon_data-&gt;work);</div><div class='add'>+	gpio_free(extcon_data-&gt;gpio);</div><div class='add'>+	extcon_dev_unregister(&amp;extcon_data-&gt;edev);</div><div class='add'>+	devm_kfree(&amp;pdev-&gt;dev, extcon_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver gpio_extcon_driver = {</div><div class='add'>+	.probe		= gpio_extcon_probe,</div><div class='add'>+	.remove		= __devexit_p(gpio_extcon_remove),</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "extcon-gpio",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(gpio_extcon_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Mike Lockwood &lt;lockwood@android.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("GPIO extcon driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/firewire/core-card.c b/drivers/firewire/core-card.c<br/>index cc595eba7ba9..57ea7f464178 100644<br/>--- a/<a href='/drm-misc/tree/drivers/firewire/core-card.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/firewire/core-card.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/firewire/core-card.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/core-card.c</a></div><div class='hunk'>@@ -421,8 +421,8 @@ static void bm_work(struct work_struct *work)</div><div class='ctx'> 			 * root, and thus, IRM.</div><div class='ctx'> 			 */</div><div class='ctx'> 			new_root_id = local_id;</div><div class='del'>-			fw_notice(card, "%s, making local node (%02x) root\n",</div><div class='del'>-				  "BM lock failed", new_root_id);</div><div class='add'>+			fw_notice(card, "BM lock failed (%s), making local node (%02x) root\n",</div><div class='add'>+				  fw_rcode_string(rcode), new_root_id);</div><div class='ctx'> 			goto pick_me;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (card-&gt;bm_generation != generation) {</div><div class='hunk'>@@ -676,6 +676,7 @@ void fw_card_release(struct kref *kref)</div><div class='ctx'> </div><div class='ctx'> 	complete(&amp;card-&gt;done);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(fw_card_release);</div><div class='ctx'> </div><div class='ctx'> void fw_core_remove_card(struct fw_card *card)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/firewire/core-cdev.c b/drivers/firewire/core-cdev.c<br/>index 2e6b24547e2a..2783f69dada6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/firewire/core-cdev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/firewire/core-cdev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/firewire/core-cdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/core-cdev.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/compat.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/firewire.h&gt;</div><div class='ctx'> #include &lt;linux/firewire-cdev.h&gt;</div><div class='hunk'>@@ -70,6 +71,7 @@ struct client {</div><div class='ctx'> 	u64 iso_closure;</div><div class='ctx'> 	struct fw_iso_buffer buffer;</div><div class='ctx'> 	unsigned long vm_start;</div><div class='add'>+	bool buffer_is_mapped;</div><div class='ctx'> </div><div class='ctx'> 	struct list_head phy_receiver_link;</div><div class='ctx'> 	u64 phy_receiver_closure;</div><div class='hunk'>@@ -959,11 +961,20 @@ static void iso_mc_callback(struct fw_iso_context *context,</div><div class='ctx'> 		    sizeof(e-&gt;interrupt), NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static enum dma_data_direction iso_dma_direction(struct fw_iso_context *context)</div><div class='add'>+{</div><div class='add'>+		if (context-&gt;type == FW_ISO_CONTEXT_TRANSMIT)</div><div class='add'>+			return DMA_TO_DEVICE;</div><div class='add'>+		else</div><div class='add'>+			return DMA_FROM_DEVICE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ioctl_create_iso_context(struct client *client, union ioctl_arg *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct fw_cdev_create_iso_context *a = &amp;arg-&gt;create_iso_context;</div><div class='ctx'> 	struct fw_iso_context *context;</div><div class='ctx'> 	fw_iso_callback_t cb;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON(FW_CDEV_ISO_CONTEXT_TRANSMIT != FW_ISO_CONTEXT_TRANSMIT ||</div><div class='ctx'> 		     FW_CDEV_ISO_CONTEXT_RECEIVE  != FW_ISO_CONTEXT_RECEIVE  ||</div><div class='hunk'>@@ -1004,8 +1015,21 @@ static int ioctl_create_iso_context(struct client *client, union ioctl_arg *arg)</div><div class='ctx'> 	if (client-&gt;iso_context != NULL) {</div><div class='ctx'> 		spin_unlock_irq(&amp;client-&gt;lock);</div><div class='ctx'> 		fw_iso_context_destroy(context);</div><div class='add'>+</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='add'>+	if (!client-&gt;buffer_is_mapped) {</div><div class='add'>+		ret = fw_iso_buffer_map_dma(&amp;client-&gt;buffer,</div><div class='add'>+					    client-&gt;device-&gt;card,</div><div class='add'>+					    iso_dma_direction(context));</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			spin_unlock_irq(&amp;client-&gt;lock);</div><div class='add'>+			fw_iso_context_destroy(context);</div><div class='add'>+</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		client-&gt;buffer_is_mapped = true;</div><div class='add'>+	}</div><div class='ctx'> 	client-&gt;iso_closure = a-&gt;closure;</div><div class='ctx'> 	client-&gt;iso_context = context;</div><div class='ctx'> 	spin_unlock_irq(&amp;client-&gt;lock);</div><div class='hunk'>@@ -1651,7 +1675,6 @@ static long fw_device_op_compat_ioctl(struct file *file,</div><div class='ctx'> static int fw_device_op_mmap(struct file *file, struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='ctx'> 	struct client *client = file-&gt;private_data;</div><div class='del'>-	enum dma_data_direction direction;</div><div class='ctx'> 	unsigned long size;</div><div class='ctx'> 	int page_count, ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1674,20 +1697,28 @@ static int fw_device_op_mmap(struct file *file, struct vm_area_struct *vma)</div><div class='ctx'> 	if (size &amp; ~PAGE_MASK)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (vma-&gt;vm_flags &amp; VM_WRITE)</div><div class='del'>-		direction = DMA_TO_DEVICE;</div><div class='del'>-	else</div><div class='del'>-		direction = DMA_FROM_DEVICE;</div><div class='del'>-</div><div class='del'>-	ret = fw_iso_buffer_init(&amp;client-&gt;buffer, client-&gt;device-&gt;card,</div><div class='del'>-				 page_count, direction);</div><div class='add'>+	ret = fw_iso_buffer_alloc(&amp;client-&gt;buffer, page_count);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = fw_iso_buffer_map(&amp;client-&gt;buffer, vma);</div><div class='add'>+	spin_lock_irq(&amp;client-&gt;lock);</div><div class='add'>+	if (client-&gt;iso_context) {</div><div class='add'>+		ret = fw_iso_buffer_map_dma(&amp;client-&gt;buffer,</div><div class='add'>+				client-&gt;device-&gt;card,</div><div class='add'>+				iso_dma_direction(client-&gt;iso_context));</div><div class='add'>+		client-&gt;buffer_is_mapped = (ret == 0);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(&amp;client-&gt;lock);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		fw_iso_buffer_destroy(&amp;client-&gt;buffer, client-&gt;device-&gt;card);</div><div class='add'>+		goto fail;</div><div class='ctx'> </div><div class='add'>+	ret = fw_iso_buffer_map_vma(&amp;client-&gt;buffer, vma);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+ fail:</div><div class='add'>+	fw_iso_buffer_destroy(&amp;client-&gt;buffer, client-&gt;device-&gt;card);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firewire/core-device.c b/drivers/firewire/core-device.c<br/>index 68109e9bb04e..4d460ef87161 100644<br/>--- a/<a href='/drm-misc/tree/drivers/firewire/core-device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/firewire/core-device.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/firewire/core-device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/core-device.c</a></div><div class='hunk'>@@ -481,6 +481,7 @@ static int read_rom(struct fw_device *device,</div><div class='ctx'>  * generation changes under us, read_config_rom will fail and get retried.</div><div class='ctx'>  * It's better to start all over in this case because the node from which we</div><div class='ctx'>  * are reading the ROM may have changed the ROM during the reset.</div><div class='add'>+ * Returns either a result code or a negative error code.</div><div class='ctx'>  */</div><div class='ctx'> static int read_config_rom(struct fw_device *device, int generation)</div><div class='ctx'> {</div><div class='hunk'>@@ -488,7 +489,7 @@ static int read_config_rom(struct fw_device *device, int generation)</div><div class='ctx'> 	const u32 *old_rom, *new_rom;</div><div class='ctx'> 	u32 *rom, *stack;</div><div class='ctx'> 	u32 sp, key;</div><div class='del'>-	int i, end, length, ret = -1;</div><div class='add'>+	int i, end, length, ret;</div><div class='ctx'> </div><div class='ctx'> 	rom = kmalloc(sizeof(*rom) * MAX_CONFIG_ROM_SIZE +</div><div class='ctx'> 		      sizeof(*stack) * MAX_CONFIG_ROM_SIZE, GFP_KERNEL);</div><div class='hunk'>@@ -502,18 +503,21 @@ static int read_config_rom(struct fw_device *device, int generation)</div><div class='ctx'> </div><div class='ctx'> 	/* First read the bus info block. */</div><div class='ctx'> 	for (i = 0; i &lt; 5; i++) {</div><div class='del'>-		if (read_rom(device, generation, i, &amp;rom[i]) != RCODE_COMPLETE)</div><div class='add'>+		ret = read_rom(device, generation, i, &amp;rom[i]);</div><div class='add'>+		if (ret != RCODE_COMPLETE)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		/*</div><div class='del'>-		 * As per IEEE1212 7.2, during power-up, devices can</div><div class='add'>+		 * As per IEEE1212 7.2, during initialization, devices can</div><div class='ctx'> 		 * reply with a 0 for the first quadlet of the config</div><div class='ctx'> 		 * rom to indicate that they are booting (for example,</div><div class='ctx'> 		 * if the firmware is on the disk of a external</div><div class='ctx'> 		 * harddisk).  In that case we just fail, and the</div><div class='ctx'> 		 * retry mechanism will try again later.</div><div class='ctx'> 		 */</div><div class='del'>-		if (i == 0 &amp;&amp; rom[i] == 0)</div><div class='add'>+		if (i == 0 &amp;&amp; rom[i] == 0) {</div><div class='add'>+			ret = RCODE_BUSY;</div><div class='ctx'> 			goto out;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	device-&gt;max_speed = device-&gt;node-&gt;max_speed;</div><div class='hunk'>@@ -563,11 +567,14 @@ static int read_config_rom(struct fw_device *device, int generation)</div><div class='ctx'> 		 */</div><div class='ctx'> 		key = stack[--sp];</div><div class='ctx'> 		i = key &amp; 0xffffff;</div><div class='del'>-		if (WARN_ON(i &gt;= MAX_CONFIG_ROM_SIZE))</div><div class='add'>+		if (WARN_ON(i &gt;= MAX_CONFIG_ROM_SIZE)) {</div><div class='add'>+			ret = -ENXIO;</div><div class='ctx'> 			goto out;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* Read header quadlet for the block to get the length. */</div><div class='del'>-		if (read_rom(device, generation, i, &amp;rom[i]) != RCODE_COMPLETE)</div><div class='add'>+		ret = read_rom(device, generation, i, &amp;rom[i]);</div><div class='add'>+		if (ret != RCODE_COMPLETE)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		end = i + (rom[i] &gt;&gt; 16) + 1;</div><div class='ctx'> 		if (end &gt; MAX_CONFIG_ROM_SIZE) {</div><div class='hunk'>@@ -590,8 +597,8 @@ static int read_config_rom(struct fw_device *device, int generation)</div><div class='ctx'> 		 * it references another block, and push it in that case.</div><div class='ctx'> 		 */</div><div class='ctx'> 		for (; i &lt; end; i++) {</div><div class='del'>-			if (read_rom(device, generation, i, &amp;rom[i]) !=</div><div class='del'>-			    RCODE_COMPLETE)</div><div class='add'>+			ret = read_rom(device, generation, i, &amp;rom[i]);</div><div class='add'>+			if (ret != RCODE_COMPLETE)</div><div class='ctx'> 				goto out;</div><div class='ctx'> </div><div class='ctx'> 			if ((key &gt;&gt; 30) != 3 || (rom[i] &gt;&gt; 30) &lt; 2)</div><div class='hunk'>@@ -619,8 +626,10 @@ static int read_config_rom(struct fw_device *device, int generation)</div><div class='ctx'> </div><div class='ctx'> 	old_rom = device-&gt;config_rom;</div><div class='ctx'> 	new_rom = kmemdup(rom, length * 4, GFP_KERNEL);</div><div class='del'>-	if (new_rom == NULL)</div><div class='add'>+	if (new_rom == NULL) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	down_write(&amp;fw_device_rwsem);</div><div class='ctx'> 	device-&gt;config_rom = new_rom;</div><div class='hunk'>@@ -628,7 +637,7 @@ static int read_config_rom(struct fw_device *device, int generation)</div><div class='ctx'> 	up_write(&amp;fw_device_rwsem);</div><div class='ctx'> </div><div class='ctx'> 	kfree(old_rom);</div><div class='del'>-	ret = 0;</div><div class='add'>+	ret = RCODE_COMPLETE;</div><div class='ctx'> 	device-&gt;max_rec	= rom[2] &gt;&gt; 12 &amp; 0xf;</div><div class='ctx'> 	device-&gt;cmc	= rom[2] &gt;&gt; 30 &amp; 1;</div><div class='ctx'> 	device-&gt;irmc	= rom[2] &gt;&gt; 31 &amp; 1;</div><div class='hunk'>@@ -967,15 +976,17 @@ static void fw_device_init(struct work_struct *work)</div><div class='ctx'> 	 * device.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	if (read_config_rom(device, device-&gt;generation) &lt; 0) {</div><div class='add'>+	ret = read_config_rom(device, device-&gt;generation);</div><div class='add'>+	if (ret != RCODE_COMPLETE) {</div><div class='ctx'> 		if (device-&gt;config_rom_retries &lt; MAX_RETRIES &amp;&amp;</div><div class='ctx'> 		    atomic_read(&amp;device-&gt;state) == FW_DEVICE_INITIALIZING) {</div><div class='ctx'> 			device-&gt;config_rom_retries++;</div><div class='ctx'> 			fw_schedule_device_work(device, RETRY_DELAY);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (device-&gt;node-&gt;link_on)</div><div class='del'>-				fw_notice(card, "giving up on Config ROM for node id %x\n",</div><div class='del'>-					  device-&gt;node_id);</div><div class='add'>+				fw_notice(card, "giving up on node %x: reading config rom failed: %s\n",</div><div class='add'>+					  device-&gt;node_id,</div><div class='add'>+					  fw_rcode_string(ret));</div><div class='ctx'> 			if (device-&gt;node == card-&gt;root_node)</div><div class='ctx'> 				fw_schedule_bm_work(card, 0);</div><div class='ctx'> 			fw_device_release(&amp;device-&gt;device);</div><div class='hunk'>@@ -1069,31 +1080,30 @@ static void fw_device_init(struct work_struct *work)</div><div class='ctx'> 	put_device(&amp;device-&gt;device);	/* our reference */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum {</div><div class='del'>-	REREAD_BIB_ERROR,</div><div class='del'>-	REREAD_BIB_GONE,</div><div class='del'>-	REREAD_BIB_UNCHANGED,</div><div class='del'>-	REREAD_BIB_CHANGED,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Reread and compare bus info block and header of root directory */</div><div class='del'>-static int reread_config_rom(struct fw_device *device, int generation)</div><div class='add'>+static int reread_config_rom(struct fw_device *device, int generation,</div><div class='add'>+			     bool *changed)</div><div class='ctx'> {</div><div class='ctx'> 	u32 q;</div><div class='del'>-	int i;</div><div class='add'>+	int i, rcode;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 6; i++) {</div><div class='del'>-		if (read_rom(device, generation, i, &amp;q) != RCODE_COMPLETE)</div><div class='del'>-			return REREAD_BIB_ERROR;</div><div class='add'>+		rcode = read_rom(device, generation, i, &amp;q);</div><div class='add'>+		if (rcode != RCODE_COMPLETE)</div><div class='add'>+			return rcode;</div><div class='ctx'> </div><div class='ctx'> 		if (i == 0 &amp;&amp; q == 0)</div><div class='del'>-			return REREAD_BIB_GONE;</div><div class='add'>+			/* inaccessible (see read_config_rom); retry later */</div><div class='add'>+			return RCODE_BUSY;</div><div class='ctx'> </div><div class='del'>-		if (q != device-&gt;config_rom[i])</div><div class='del'>-			return REREAD_BIB_CHANGED;</div><div class='add'>+		if (q != device-&gt;config_rom[i]) {</div><div class='add'>+			*changed = true;</div><div class='add'>+			return RCODE_COMPLETE;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return REREAD_BIB_UNCHANGED;</div><div class='add'>+	*changed = false;</div><div class='add'>+	return RCODE_COMPLETE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fw_device_refresh(struct work_struct *work)</div><div class='hunk'>@@ -1101,23 +1111,14 @@ static void fw_device_refresh(struct work_struct *work)</div><div class='ctx'> 	struct fw_device *device =</div><div class='ctx'> 		container_of(work, struct fw_device, work.work);</div><div class='ctx'> 	struct fw_card *card = device-&gt;card;</div><div class='del'>-	int node_id = device-&gt;node_id;</div><div class='del'>-</div><div class='del'>-	switch (reread_config_rom(device, device-&gt;generation)) {</div><div class='del'>-	case REREAD_BIB_ERROR:</div><div class='del'>-		if (device-&gt;config_rom_retries &lt; MAX_RETRIES / 2 &amp;&amp;</div><div class='del'>-		    atomic_read(&amp;device-&gt;state) == FW_DEVICE_INITIALIZING) {</div><div class='del'>-			device-&gt;config_rom_retries++;</div><div class='del'>-			fw_schedule_device_work(device, RETRY_DELAY / 2);</div><div class='del'>-</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		goto give_up;</div><div class='add'>+	int ret, node_id = device-&gt;node_id;</div><div class='add'>+	bool changed;</div><div class='ctx'> </div><div class='del'>-	case REREAD_BIB_GONE:</div><div class='del'>-		goto gone;</div><div class='add'>+	ret = reread_config_rom(device, device-&gt;generation, &amp;changed);</div><div class='add'>+	if (ret != RCODE_COMPLETE)</div><div class='add'>+		goto failed_config_rom;</div><div class='ctx'> </div><div class='del'>-	case REREAD_BIB_UNCHANGED:</div><div class='add'>+	if (!changed) {</div><div class='ctx'> 		if (atomic_cmpxchg(&amp;device-&gt;state,</div><div class='ctx'> 				   FW_DEVICE_INITIALIZING,</div><div class='ctx'> 				   FW_DEVICE_RUNNING) == FW_DEVICE_GONE)</div><div class='hunk'>@@ -1126,9 +1127,6 @@ static void fw_device_refresh(struct work_struct *work)</div><div class='ctx'> 		fw_device_update(work);</div><div class='ctx'> 		device-&gt;config_rom_retries = 0;</div><div class='ctx'> 		goto out;</div><div class='del'>-</div><div class='del'>-	case REREAD_BIB_CHANGED:</div><div class='del'>-		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1137,16 +1135,9 @@ static void fw_device_refresh(struct work_struct *work)</div><div class='ctx'> 	 */</div><div class='ctx'> 	device_for_each_child(&amp;device-&gt;device, NULL, shutdown_unit);</div><div class='ctx'> </div><div class='del'>-	if (read_config_rom(device, device-&gt;generation) &lt; 0) {</div><div class='del'>-		if (device-&gt;config_rom_retries &lt; MAX_RETRIES &amp;&amp;</div><div class='del'>-		    atomic_read(&amp;device-&gt;state) == FW_DEVICE_INITIALIZING) {</div><div class='del'>-			device-&gt;config_rom_retries++;</div><div class='del'>-			fw_schedule_device_work(device, RETRY_DELAY);</div><div class='del'>-</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		goto give_up;</div><div class='del'>-	}</div><div class='add'>+	ret = read_config_rom(device, device-&gt;generation);</div><div class='add'>+	if (ret != RCODE_COMPLETE)</div><div class='add'>+		goto failed_config_rom;</div><div class='ctx'> </div><div class='ctx'> 	fw_device_cdev_update(device);</div><div class='ctx'> 	create_units(device);</div><div class='hunk'>@@ -1163,9 +1154,16 @@ static void fw_device_refresh(struct work_struct *work)</div><div class='ctx'> 	device-&gt;config_rom_retries = 0;</div><div class='ctx'> 	goto out;</div><div class='ctx'> </div><div class='del'>- give_up:</div><div class='del'>-	fw_notice(card, "giving up on refresh of device %s\n",</div><div class='del'>-		  dev_name(&amp;device-&gt;device));</div><div class='add'>+ failed_config_rom:</div><div class='add'>+	if (device-&gt;config_rom_retries &lt; MAX_RETRIES &amp;&amp;</div><div class='add'>+	    atomic_read(&amp;device-&gt;state) == FW_DEVICE_INITIALIZING) {</div><div class='add'>+		device-&gt;config_rom_retries++;</div><div class='add'>+		fw_schedule_device_work(device, RETRY_DELAY);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fw_notice(card, "giving up on refresh of device %s: %s\n",</div><div class='add'>+		  dev_name(&amp;device-&gt;device), fw_rcode_string(ret));</div><div class='ctx'>  gone:</div><div class='ctx'> 	atomic_set(&amp;device-&gt;state, FW_DEVICE_GONE);</div><div class='ctx'> 	PREPARE_DELAYED_WORK(&amp;device-&gt;work, fw_device_shutdown);</div><div class='head'>diff --git a/drivers/firewire/core-iso.c b/drivers/firewire/core-iso.c<br/>index d1565828ae2c..8382e27e9a27 100644<br/>--- a/<a href='/drm-misc/tree/drivers/firewire/core-iso.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/firewire/core-iso.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/firewire/core-iso.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/core-iso.c</a></div><div class='hunk'>@@ -39,52 +39,73 @@</div><div class='ctx'>  * Isochronous DMA context management</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-int fw_iso_buffer_init(struct fw_iso_buffer *buffer, struct fw_card *card,</div><div class='del'>-		       int page_count, enum dma_data_direction direction)</div><div class='add'>+int fw_iso_buffer_alloc(struct fw_iso_buffer *buffer, int page_count)</div><div class='ctx'> {</div><div class='del'>-	int i, j;</div><div class='del'>-	dma_addr_t address;</div><div class='del'>-</div><div class='del'>-	buffer-&gt;page_count = page_count;</div><div class='del'>-	buffer-&gt;direction = direction;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='add'>+	buffer-&gt;page_count = 0;</div><div class='add'>+	buffer-&gt;page_count_mapped = 0;</div><div class='ctx'> 	buffer-&gt;pages = kmalloc(page_count * sizeof(buffer-&gt;pages[0]),</div><div class='ctx'> 				GFP_KERNEL);</div><div class='ctx'> 	if (buffer-&gt;pages == NULL)</div><div class='del'>-		goto out;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; buffer-&gt;page_count; i++) {</div><div class='add'>+	for (i = 0; i &lt; page_count; i++) {</div><div class='ctx'> 		buffer-&gt;pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);</div><div class='ctx'> 		if (buffer-&gt;pages[i] == NULL)</div><div class='del'>-			goto out_pages;</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	buffer-&gt;page_count = i;</div><div class='add'>+	if (i &lt; page_count) {</div><div class='add'>+		fw_iso_buffer_destroy(buffer, NULL);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fw_iso_buffer_map_dma(struct fw_iso_buffer *buffer, struct fw_card *card,</div><div class='add'>+			  enum dma_data_direction direction)</div><div class='add'>+{</div><div class='add'>+	dma_addr_t address;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	buffer-&gt;direction = direction;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; buffer-&gt;page_count; i++) {</div><div class='ctx'> 		address = dma_map_page(card-&gt;device, buffer-&gt;pages[i],</div><div class='ctx'> 				       0, PAGE_SIZE, direction);</div><div class='del'>-		if (dma_mapping_error(card-&gt;device, address)) {</div><div class='del'>-			__free_page(buffer-&gt;pages[i]);</div><div class='del'>-			goto out_pages;</div><div class='del'>-		}</div><div class='add'>+		if (dma_mapping_error(card-&gt;device, address))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		set_page_private(buffer-&gt;pages[i], address);</div><div class='ctx'> 	}</div><div class='add'>+	buffer-&gt;page_count_mapped = i;</div><div class='add'>+	if (i &lt; buffer-&gt;page_count)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>- out_pages:</div><div class='del'>-	for (j = 0; j &lt; i; j++) {</div><div class='del'>-		address = page_private(buffer-&gt;pages[j]);</div><div class='del'>-		dma_unmap_page(card-&gt;device, address,</div><div class='del'>-			       PAGE_SIZE, direction);</div><div class='del'>-		__free_page(buffer-&gt;pages[j]);</div><div class='del'>-	}</div><div class='del'>-	kfree(buffer-&gt;pages);</div><div class='del'>- out:</div><div class='del'>-	buffer-&gt;pages = NULL;</div><div class='add'>+int fw_iso_buffer_init(struct fw_iso_buffer *buffer, struct fw_card *card,</div><div class='add'>+		       int page_count, enum dma_data_direction direction)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = fw_iso_buffer_alloc(buffer, page_count);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = fw_iso_buffer_map_dma(buffer, card, direction);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		fw_iso_buffer_destroy(buffer, card);</div><div class='ctx'> </div><div class='del'>-	return -ENOMEM;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(fw_iso_buffer_init);</div><div class='ctx'> </div><div class='del'>-int fw_iso_buffer_map(struct fw_iso_buffer *buffer, struct vm_area_struct *vma)</div><div class='add'>+int fw_iso_buffer_map_vma(struct fw_iso_buffer *buffer,</div><div class='add'>+			  struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long uaddr;</div><div class='ctx'> 	int i, err;</div><div class='hunk'>@@ -107,15 +128,18 @@ void fw_iso_buffer_destroy(struct fw_iso_buffer *buffer,</div><div class='ctx'> 	int i;</div><div class='ctx'> 	dma_addr_t address;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; buffer-&gt;page_count; i++) {</div><div class='add'>+	for (i = 0; i &lt; buffer-&gt;page_count_mapped; i++) {</div><div class='ctx'> 		address = page_private(buffer-&gt;pages[i]);</div><div class='ctx'> 		dma_unmap_page(card-&gt;device, address,</div><div class='ctx'> 			       PAGE_SIZE, buffer-&gt;direction);</div><div class='del'>-		__free_page(buffer-&gt;pages[i]);</div><div class='ctx'> 	}</div><div class='add'>+	for (i = 0; i &lt; buffer-&gt;page_count; i++)</div><div class='add'>+		__free_page(buffer-&gt;pages[i]);</div><div class='ctx'> </div><div class='ctx'> 	kfree(buffer-&gt;pages);</div><div class='ctx'> 	buffer-&gt;pages = NULL;</div><div class='add'>+	buffer-&gt;page_count = 0;</div><div class='add'>+	buffer-&gt;page_count_mapped = 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(fw_iso_buffer_destroy);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firewire/core-transaction.c b/drivers/firewire/core-transaction.c<br/>index dea2dcc9310d..780708dc6e25 100644<br/>--- a/<a href='/drm-misc/tree/drivers/firewire/core-transaction.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/firewire/core-transaction.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/firewire/core-transaction.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/core-transaction.c</a></div><div class='hunk'>@@ -820,6 +820,15 @@ void fw_send_response(struct fw_card *card,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(fw_send_response);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * fw_get_request_speed() - returns speed at which the @request was received</div><div class='add'>+ */</div><div class='add'>+int fw_get_request_speed(struct fw_request *request)</div><div class='add'>+{</div><div class='add'>+	return request-&gt;response.speed;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(fw_get_request_speed);</div><div class='add'>+</div><div class='ctx'> static void handle_exclusive_region_request(struct fw_card *card,</div><div class='ctx'> 					    struct fw_packet *p,</div><div class='ctx'> 					    struct fw_request *request,</div><div class='hunk'>@@ -994,6 +1003,32 @@ void fw_core_handle_response(struct fw_card *card, struct fw_packet *p)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(fw_core_handle_response);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * fw_rcode_string - convert a firewire result code to an error description</div><div class='add'>+ * @rcode: the result code</div><div class='add'>+ */</div><div class='add'>+const char *fw_rcode_string(int rcode)</div><div class='add'>+{</div><div class='add'>+	static const char *const names[] = {</div><div class='add'>+		[RCODE_COMPLETE]       = "no error",</div><div class='add'>+		[RCODE_CONFLICT_ERROR] = "conflict error",</div><div class='add'>+		[RCODE_DATA_ERROR]     = "data error",</div><div class='add'>+		[RCODE_TYPE_ERROR]     = "type error",</div><div class='add'>+		[RCODE_ADDRESS_ERROR]  = "address error",</div><div class='add'>+		[RCODE_SEND_ERROR]     = "send error",</div><div class='add'>+		[RCODE_CANCELLED]      = "timeout",</div><div class='add'>+		[RCODE_BUSY]           = "busy",</div><div class='add'>+		[RCODE_GENERATION]     = "bus reset",</div><div class='add'>+		[RCODE_NO_ACK]         = "no ack",</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if ((unsigned int)rcode &lt; ARRAY_SIZE(names) &amp;&amp; names[rcode])</div><div class='add'>+		return names[rcode];</div><div class='add'>+	else</div><div class='add'>+		return "unknown";</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(fw_rcode_string);</div><div class='add'>+</div><div class='ctx'> static const struct fw_address_region topology_map_region =</div><div class='ctx'> 	{ .start = CSR_REGISTER_BASE | CSR_TOPOLOGY_MAP,</div><div class='ctx'> 	  .end   = CSR_REGISTER_BASE | CSR_TOPOLOGY_MAP_END, };</div><div class='head'>diff --git a/drivers/firewire/core.h b/drivers/firewire/core.h<br/>index 9047f5547d98..515a42c786d0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/firewire/core.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/firewire/core.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/firewire/core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/core.h</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/compiler.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/fs.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/idr.h&gt;</div><div class='hunk'>@@ -120,21 +121,6 @@ int fw_compute_block_crc(__be32 *block);</div><div class='ctx'> void fw_schedule_bus_reset(struct fw_card *card, bool delayed, bool short_reset);</div><div class='ctx'> void fw_schedule_bm_work(struct fw_card *card, unsigned long delay);</div><div class='ctx'> </div><div class='del'>-static inline struct fw_card *fw_card_get(struct fw_card *card)</div><div class='del'>-{</div><div class='del'>-	kref_get(&amp;card-&gt;kref);</div><div class='del'>-</div><div class='del'>-	return card;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void fw_card_release(struct kref *kref);</div><div class='del'>-</div><div class='del'>-static inline void fw_card_put(struct fw_card *card)</div><div class='del'>-{</div><div class='del'>-	kref_put(&amp;card-&gt;kref, fw_card_release);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /* -cdev */</div><div class='ctx'> </div><div class='ctx'> extern const struct file_operations fw_device_ops;</div><div class='hunk'>@@ -169,7 +155,11 @@ void fw_node_event(struct fw_card *card, struct fw_node *node, int event);</div><div class='ctx'> </div><div class='ctx'> /* -iso */</div><div class='ctx'> </div><div class='del'>-int fw_iso_buffer_map(struct fw_iso_buffer *buffer, struct vm_area_struct *vma);</div><div class='add'>+int fw_iso_buffer_alloc(struct fw_iso_buffer *buffer, int page_count);</div><div class='add'>+int fw_iso_buffer_map_dma(struct fw_iso_buffer *buffer, struct fw_card *card,</div><div class='add'>+			  enum dma_data_direction direction);</div><div class='add'>+int fw_iso_buffer_map_vma(struct fw_iso_buffer *buffer,</div><div class='add'>+			  struct vm_area_struct *vma);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* -topology */</div><div class='head'>diff --git a/drivers/firewire/nosy.c b/drivers/firewire/nosy.c<br/>index a7c4422a688e..4ebfb2273672 100644<br/>--- a/<a href='/drm-misc/tree/drivers/firewire/nosy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/firewire/nosy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/firewire/nosy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/nosy.c</a></div><div class='hunk'>@@ -693,6 +693,8 @@ static struct pci_device_id pci_table[] __devinitdata = {</div><div class='ctx'> 	{ }	/* Terminating entry */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+MODULE_DEVICE_TABLE(pci, pci_table);</div><div class='add'>+</div><div class='ctx'> static struct pci_driver lynx_pci_driver = {</div><div class='ctx'> 	.name =		driver_name,</div><div class='ctx'> 	.id_table =	pci_table,</div><div class='hunk'>@@ -700,22 +702,8 @@ static struct pci_driver lynx_pci_driver = {</div><div class='ctx'> 	.remove =	remove_card,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+module_pci_driver(lynx_pci_driver);</div><div class='add'>+</div><div class='ctx'> MODULE_AUTHOR("Kristian Hoegsberg");</div><div class='ctx'> MODULE_DESCRIPTION("Snoop mode driver for TI pcilynx 1394 controllers");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DEVICE_TABLE(pci, pci_table);</div><div class='del'>-</div><div class='del'>-static int __init nosy_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;lynx_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit nosy_cleanup(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;lynx_pci_driver);</div><div class='del'>-</div><div class='del'>-	pr_info("Unloaded %s\n", driver_name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(nosy_init);</div><div class='del'>-module_exit(nosy_cleanup);</div><div class='head'>diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c<br/>index 2b5460075a9f..c1af05e834b6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/firewire/ohci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/firewire/ohci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/firewire/ohci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/ohci.c</a></div><div class='hunk'>@@ -1821,9 +1821,8 @@ static void bus_reset_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct fw_ohci *ohci =</div><div class='ctx'> 		container_of(work, struct fw_ohci, bus_reset_work);</div><div class='del'>-	int self_id_count, i, j, reg;</div><div class='del'>-	int generation, new_generation;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	int self_id_count, generation, new_generation, i, j;</div><div class='add'>+	u32 reg;</div><div class='ctx'> 	void *free_rom = NULL;</div><div class='ctx'> 	dma_addr_t free_rom_bus = 0;</div><div class='ctx'> 	bool is_new_root;</div><div class='hunk'>@@ -1930,13 +1929,13 @@ static void bus_reset_work(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* FIXME: Document how the locking works. */</div><div class='del'>-	spin_lock_irqsave(&amp;ohci-&gt;lock, flags);</div><div class='add'>+	spin_lock_irq(&amp;ohci-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	ohci-&gt;generation = -1; /* prevent AT packet queueing */</div><div class='ctx'> 	context_stop(&amp;ohci-&gt;at_request_ctx);</div><div class='ctx'> 	context_stop(&amp;ohci-&gt;at_response_ctx);</div><div class='ctx'> </div><div class='del'>-	spin_unlock_irqrestore(&amp;ohci-&gt;lock, flags);</div><div class='add'>+	spin_unlock_irq(&amp;ohci-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Per OHCI 1.2 draft, clause 7.2.3.3, hardware may leave unsent</div><div class='hunk'>@@ -1946,7 +1945,7 @@ static void bus_reset_work(struct work_struct *work)</div><div class='ctx'> 	at_context_flush(&amp;ohci-&gt;at_request_ctx);</div><div class='ctx'> 	at_context_flush(&amp;ohci-&gt;at_response_ctx);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ohci-&gt;lock, flags);</div><div class='add'>+	spin_lock_irq(&amp;ohci-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	ohci-&gt;generation = generation;</div><div class='ctx'> 	reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset);</div><div class='hunk'>@@ -1990,7 +1989,7 @@ static void bus_reset_work(struct work_struct *work)</div><div class='ctx'> 	reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	spin_unlock_irqrestore(&amp;ohci-&gt;lock, flags);</div><div class='add'>+	spin_unlock_irq(&amp;ohci-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (free_rom)</div><div class='ctx'> 		dma_free_coherent(ohci-&gt;card.device, CONFIG_ROM_SIZE,</div><div class='hunk'>@@ -2402,7 +2401,6 @@ static int ohci_set_config_rom(struct fw_card *card,</div><div class='ctx'> 			       const __be32 *config_rom, size_t length)</div><div class='ctx'> {</div><div class='ctx'> 	struct fw_ohci *ohci;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	__be32 *next_config_rom;</div><div class='ctx'> 	dma_addr_t uninitialized_var(next_config_rom_bus);</div><div class='ctx'> </div><div class='hunk'>@@ -2441,7 +2439,7 @@ static int ohci_set_config_rom(struct fw_card *card,</div><div class='ctx'> 	if (next_config_rom == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ohci-&gt;lock, flags);</div><div class='add'>+	spin_lock_irq(&amp;ohci-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If there is not an already pending config_rom update,</div><div class='hunk'>@@ -2467,7 +2465,7 @@ static int ohci_set_config_rom(struct fw_card *card,</div><div class='ctx'> </div><div class='ctx'> 	reg_write(ohci, OHCI1394_ConfigROMmap, ohci-&gt;next_config_rom_bus);</div><div class='ctx'> </div><div class='del'>-	spin_unlock_irqrestore(&amp;ohci-&gt;lock, flags);</div><div class='add'>+	spin_unlock_irq(&amp;ohci-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/* If we didn't use the DMA allocation, delete it. */</div><div class='ctx'> 	if (next_config_rom != NULL)</div><div class='hunk'>@@ -2891,10 +2889,9 @@ static struct fw_iso_context *ohci_allocate_iso_context(struct fw_card *card,</div><div class='ctx'> 	descriptor_callback_t uninitialized_var(callback);</div><div class='ctx'> 	u64 *uninitialized_var(channels);</div><div class='ctx'> 	u32 *uninitialized_var(mask), uninitialized_var(regs);</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	int index, ret = -EBUSY;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ohci-&gt;lock, flags);</div><div class='add'>+	spin_lock_irq(&amp;ohci-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case FW_ISO_CONTEXT_TRANSMIT:</div><div class='hunk'>@@ -2938,7 +2935,7 @@ static struct fw_iso_context *ohci_allocate_iso_context(struct fw_card *card,</div><div class='ctx'> 		ret = -ENOSYS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	spin_unlock_irqrestore(&amp;ohci-&gt;lock, flags);</div><div class='add'>+	spin_unlock_irq(&amp;ohci-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (index &lt; 0)</div><div class='ctx'> 		return ERR_PTR(ret);</div><div class='hunk'>@@ -2964,7 +2961,7 @@ static struct fw_iso_context *ohci_allocate_iso_context(struct fw_card *card,</div><div class='ctx'>  out_with_header:</div><div class='ctx'> 	free_page((unsigned long)ctx-&gt;header);</div><div class='ctx'>  out:</div><div class='del'>-	spin_lock_irqsave(&amp;ohci-&gt;lock, flags);</div><div class='add'>+	spin_lock_irq(&amp;ohci-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case FW_ISO_CONTEXT_RECEIVE:</div><div class='hunk'>@@ -2977,7 +2974,7 @@ static struct fw_iso_context *ohci_allocate_iso_context(struct fw_card *card,</div><div class='ctx'> 	}</div><div class='ctx'> 	*mask |= 1 &lt;&lt; index;</div><div class='ctx'> </div><div class='del'>-	spin_unlock_irqrestore(&amp;ohci-&gt;lock, flags);</div><div class='add'>+	spin_unlock_irq(&amp;ohci-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return ERR_PTR(ret);</div><div class='ctx'> }</div><div class='hunk'>@@ -3789,6 +3786,8 @@ static struct pci_driver fw_ohci_pci_driver = {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+module_pci_driver(fw_ohci_pci_driver);</div><div class='add'>+</div><div class='ctx'> MODULE_AUTHOR("Kristian Hoegsberg &lt;krh@bitplanet.net&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Driver for PCI OHCI IEEE1394 controllers");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='hunk'>@@ -3797,16 +3796,3 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> #ifndef CONFIG_IEEE1394_OHCI1394_MODULE</div><div class='ctx'> MODULE_ALIAS("ohci1394");</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='del'>-static int __init fw_ohci_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;fw_ohci_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit fw_ohci_cleanup(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;fw_ohci_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(fw_ohci_init);</div><div class='del'>-module_exit(fw_ohci_cleanup);</div><div class='head'>diff --git a/drivers/firewire/sbp2.c b/drivers/firewire/sbp2.c<br/>index b7e65d7eab64..1162d6b3bf85 100644<br/>--- a/<a href='/drm-misc/tree/drivers/firewire/sbp2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/firewire/sbp2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/firewire/sbp2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firewire/sbp2.c</a></div><div class='hunk'>@@ -207,9 +207,8 @@ static const struct device *lu_dev(const struct sbp2_logical_unit *lu)</div><div class='ctx'> #define SBP2_MAX_CDB_SIZE		16</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * The default maximum s/g segment size of a FireWire controller is</div><div class='del'>- * usually 0x10000, but SBP-2 only allows 0xffff. Since buffers have to</div><div class='del'>- * be quadlet-aligned, we set the length limit to 0xffff &amp; ~3.</div><div class='add'>+ * The maximum SBP-2 data buffer size is 0xffff.  We quadlet-align this</div><div class='add'>+ * for compatibility with earlier versions of this driver.</div><div class='ctx'>  */</div><div class='ctx'> #define SBP2_MAX_SEG_SIZE		0xfffc</div><div class='ctx'> </div><div class='hunk'>@@ -1163,7 +1162,8 @@ static int sbp2_probe(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	shost-&gt;max_cmd_len = SBP2_MAX_CDB_SIZE;</div><div class='ctx'> </div><div class='del'>-	if (scsi_add_host(shost, &amp;unit-&gt;device) &lt; 0)</div><div class='add'>+	if (scsi_add_host_with_dma(shost, &amp;unit-&gt;device,</div><div class='add'>+				   device-&gt;card-&gt;device) &lt; 0)</div><div class='ctx'> 		goto fail_shost_put;</div><div class='ctx'> </div><div class='ctx'> 	/* implicit directory ID */</div><div class='hunk'>@@ -1295,10 +1295,7 @@ static struct fw_driver sbp2_driver = {</div><div class='ctx'> static void sbp2_unmap_scatterlist(struct device *card_device,</div><div class='ctx'> 				   struct sbp2_command_orb *orb)</div><div class='ctx'> {</div><div class='del'>-	if (scsi_sg_count(orb-&gt;cmd))</div><div class='del'>-		dma_unmap_sg(card_device, scsi_sglist(orb-&gt;cmd),</div><div class='del'>-			     scsi_sg_count(orb-&gt;cmd),</div><div class='del'>-			     orb-&gt;cmd-&gt;sc_data_direction);</div><div class='add'>+	scsi_dma_unmap(orb-&gt;cmd);</div><div class='ctx'> </div><div class='ctx'> 	if (orb-&gt;request.misc &amp; cpu_to_be32(COMMAND_ORB_PAGE_TABLE_PRESENT))</div><div class='ctx'> 		dma_unmap_single(card_device, orb-&gt;page_table_bus,</div><div class='hunk'>@@ -1404,9 +1401,8 @@ static int sbp2_map_scatterlist(struct sbp2_command_orb *orb,</div><div class='ctx'> 	struct scatterlist *sg = scsi_sglist(orb-&gt;cmd);</div><div class='ctx'> 	int i, n;</div><div class='ctx'> </div><div class='del'>-	n = dma_map_sg(device-&gt;card-&gt;device, sg, scsi_sg_count(orb-&gt;cmd),</div><div class='del'>-		       orb-&gt;cmd-&gt;sc_data_direction);</div><div class='del'>-	if (n == 0)</div><div class='add'>+	n = scsi_dma_map(orb-&gt;cmd);</div><div class='add'>+	if (n &lt;= 0)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1452,8 +1448,7 @@ static int sbp2_map_scatterlist(struct sbp2_command_orb *orb,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'>  fail_page_table:</div><div class='del'>-	dma_unmap_sg(device-&gt;card-&gt;device, scsi_sglist(orb-&gt;cmd),</div><div class='del'>-		     scsi_sg_count(orb-&gt;cmd), orb-&gt;cmd-&gt;sc_data_direction);</div><div class='add'>+	scsi_dma_unmap(orb-&gt;cmd);</div><div class='ctx'>  fail:</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='hunk'>@@ -1534,7 +1529,10 @@ static int sbp2_scsi_slave_alloc(struct scsi_device *sdev)</div><div class='ctx'> </div><div class='ctx'> 	sdev-&gt;allow_restart = 1;</div><div class='ctx'> </div><div class='del'>-	/* SBP-2 requires quadlet alignment of the data buffers. */</div><div class='add'>+	/*</div><div class='add'>+	 * SBP-2 does not require any alignment, but we set it anyway</div><div class='add'>+	 * for compatibility with earlier versions of this driver.</div><div class='add'>+	 */</div><div class='ctx'> 	blk_queue_update_dma_alignment(sdev-&gt;request_queue, 4 - 1);</div><div class='ctx'> </div><div class='ctx'> 	if (lu-&gt;tgt-&gt;workarounds &amp; SBP2_WORKAROUND_INQUIRY_36)</div><div class='hunk'>@@ -1568,8 +1566,6 @@ static int sbp2_scsi_slave_configure(struct scsi_device *sdev)</div><div class='ctx'> 	if (lu-&gt;tgt-&gt;workarounds &amp; SBP2_WORKAROUND_128K_MAX_TRANS)</div><div class='ctx'> 		blk_queue_max_hw_sectors(sdev-&gt;request_queue, 128 * 1024 / 512);</div><div class='ctx'> </div><div class='del'>-	blk_queue_max_segment_size(sdev-&gt;request_queue, SBP2_MAX_SEG_SIZE);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firmware/efivars.c b/drivers/firmware/efivars.c<br/>index d25599f2a3f8..47408e802ab6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/firmware/efivars.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/firmware/efivars.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/firmware/efivars.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/firmware/efivars.c</a></div><div class='hunk'>@@ -191,6 +191,190 @@ utf16_strncmp(const efi_char16_t *a, const efi_char16_t *b, size_t len)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool</div><div class='add'>+validate_device_path(struct efi_variable *var, int match, u8 *buffer,</div><div class='add'>+		     unsigned long len)</div><div class='add'>+{</div><div class='add'>+	struct efi_generic_dev_path *node;</div><div class='add'>+	int offset = 0;</div><div class='add'>+</div><div class='add'>+	node = (struct efi_generic_dev_path *)buffer;</div><div class='add'>+</div><div class='add'>+	if (len &lt; sizeof(*node))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	while (offset &lt;= len - sizeof(*node) &amp;&amp;</div><div class='add'>+	       node-&gt;length &gt;= sizeof(*node) &amp;&amp;</div><div class='add'>+		node-&gt;length &lt;= len - offset) {</div><div class='add'>+		offset += node-&gt;length;</div><div class='add'>+</div><div class='add'>+		if ((node-&gt;type == EFI_DEV_END_PATH ||</div><div class='add'>+		     node-&gt;type == EFI_DEV_END_PATH2) &amp;&amp;</div><div class='add'>+		    node-&gt;sub_type == EFI_DEV_END_ENTIRE)</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		node = (struct efi_generic_dev_path *)(buffer + offset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we're here then either node-&gt;length pointed past the end</div><div class='add'>+	 * of the buffer or we reached the end of the buffer without</div><div class='add'>+	 * finding a device path end node.</div><div class='add'>+	 */</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+validate_boot_order(struct efi_variable *var, int match, u8 *buffer,</div><div class='add'>+		    unsigned long len)</div><div class='add'>+{</div><div class='add'>+	/* An array of 16-bit integers */</div><div class='add'>+	if ((len % 2) != 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+validate_load_option(struct efi_variable *var, int match, u8 *buffer,</div><div class='add'>+		     unsigned long len)</div><div class='add'>+{</div><div class='add'>+	u16 filepathlength;</div><div class='add'>+	int i, desclength = 0, namelen;</div><div class='add'>+</div><div class='add'>+	namelen = utf16_strnlen(var-&gt;VariableName, sizeof(var-&gt;VariableName));</div><div class='add'>+</div><div class='add'>+	/* Either "Boot" or "Driver" followed by four digits of hex */</div><div class='add'>+	for (i = match; i &lt; match+4; i++) {</div><div class='add'>+		if (var-&gt;VariableName[i] &gt; 127 ||</div><div class='add'>+		    hex_to_bin(var-&gt;VariableName[i] &amp; 0xff) &lt; 0)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reject it if there's 4 digits of hex and then further content */</div><div class='add'>+	if (namelen &gt; match + 4)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* A valid entry must be at least 8 bytes */</div><div class='add'>+	if (len &lt; 8)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	filepathlength = buffer[4] | buffer[5] &lt;&lt; 8;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * There's no stored length for the description, so it has to be</div><div class='add'>+	 * found by hand</div><div class='add'>+	 */</div><div class='add'>+	desclength = utf16_strsize((efi_char16_t *)(buffer + 6), len - 6) + 2;</div><div class='add'>+</div><div class='add'>+	/* Each boot entry must have a descriptor */</div><div class='add'>+	if (!desclength)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the sum of the length of the description, the claimed filepath</div><div class='add'>+	 * length and the original header are greater than the length of the</div><div class='add'>+	 * variable, it's malformed</div><div class='add'>+	 */</div><div class='add'>+	if ((desclength + filepathlength + 6) &gt; len)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * And, finally, check the filepath</div><div class='add'>+	 */</div><div class='add'>+	return validate_device_path(var, match, buffer + desclength + 6,</div><div class='add'>+				    filepathlength);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+validate_uint16(struct efi_variable *var, int match, u8 *buffer,</div><div class='add'>+		unsigned long len)</div><div class='add'>+{</div><div class='add'>+	/* A single 16-bit integer */</div><div class='add'>+	if (len != 2)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+validate_ascii_string(struct efi_variable *var, int match, u8 *buffer,</div><div class='add'>+		      unsigned long len)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++) {</div><div class='add'>+		if (buffer[i] &gt; 127)</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		if (buffer[i] == 0)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct variable_validate {</div><div class='add'>+	char *name;</div><div class='add'>+	bool (*validate)(struct efi_variable *var, int match, u8 *data,</div><div class='add'>+			 unsigned long len);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct variable_validate variable_validate[] = {</div><div class='add'>+	{ "BootNext", validate_uint16 },</div><div class='add'>+	{ "BootOrder", validate_boot_order },</div><div class='add'>+	{ "DriverOrder", validate_boot_order },</div><div class='add'>+	{ "Boot*", validate_load_option },</div><div class='add'>+	{ "Driver*", validate_load_option },</div><div class='add'>+	{ "ConIn", validate_device_path },</div><div class='add'>+	{ "ConInDev", validate_device_path },</div><div class='add'>+	{ "ConOut", validate_device_path },</div><div class='add'>+	{ "ConOutDev", validate_device_path },</div><div class='add'>+	{ "ErrOut", validate_device_path },</div><div class='add'>+	{ "ErrOutDev", validate_device_path },</div><div class='add'>+	{ "Timeout", validate_uint16 },</div><div class='add'>+	{ "Lang", validate_ascii_string },</div><div class='add'>+	{ "PlatformLang", validate_ascii_string },</div><div class='add'>+	{ "", NULL },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+validate_var(struct efi_variable *var, u8 *data, unsigned long len)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	u16 *unicode_name = var-&gt;VariableName;</div><div class='add'>+</div><div class='add'>+	for (i = 0; variable_validate[i].validate != NULL; i++) {</div><div class='add'>+		const char *name = variable_validate[i].name;</div><div class='add'>+		int match;</div><div class='add'>+</div><div class='add'>+		for (match = 0; ; match++) {</div><div class='add'>+			char c = name[match];</div><div class='add'>+			u16 u = unicode_name[match];</div><div class='add'>+</div><div class='add'>+			/* All special variables are plain ascii */</div><div class='add'>+			if (u &gt; 127)</div><div class='add'>+				return true;</div><div class='add'>+</div><div class='add'>+			/* Wildcard in the matching name means we've matched */</div><div class='add'>+			if (c == '*')</div><div class='add'>+				return variable_validate[i].validate(var,</div><div class='add'>+							     match, data, len);</div><div class='add'>+</div><div class='add'>+			/* Case sensitive match */</div><div class='add'>+			if (c != u)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			/* Reached the end of the string while matching */</div><div class='add'>+			if (!c)</div><div class='add'>+				return variable_validate[i].validate(var,</div><div class='add'>+							     match, data, len);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static efi_status_t</div><div class='ctx'> get_var_data_locked(struct efivars *efivars, struct efi_variable *var)</div><div class='ctx'> {</div><div class='hunk'>@@ -324,6 +508,12 @@ efivar_store_raw(struct efivar_entry *entry, const char *buf, size_t count)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if ((new_var-&gt;Attributes &amp; ~EFI_VARIABLE_MASK) != 0 ||</div><div class='add'>+	    validate_var(new_var, new_var-&gt;Data, new_var-&gt;DataSize) == false) {</div><div class='add'>+		printk(KERN_ERR "efivars: Malformed variable content\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	spin_lock(&amp;efivars-&gt;lock);</div><div class='ctx'> 	status = efivars-&gt;ops-&gt;set_variable(new_var-&gt;VariableName,</div><div class='ctx'> 					    &amp;new_var-&gt;VendorGuid,</div><div class='hunk'>@@ -626,6 +816,12 @@ static ssize_t efivar_create(struct file *filp, struct kobject *kobj,</div><div class='ctx'> 	if (!capable(CAP_SYS_ADMIN))</div><div class='ctx'> 		return -EACCES;</div><div class='ctx'> </div><div class='add'>+	if ((new_var-&gt;Attributes &amp; ~EFI_VARIABLE_MASK) != 0 ||</div><div class='add'>+	    validate_var(new_var, new_var-&gt;Data, new_var-&gt;DataSize) == false) {</div><div class='add'>+		printk(KERN_ERR "efivars: Malformed variable content\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	spin_lock(&amp;efivars-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig<br/>index e03653d69357..c4067d0141f7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/Kconfig</a></div><div class='hunk'>@@ -2,6 +2,14 @@</div><div class='ctx'> # GPIO infrastructure and drivers</div><div class='ctx'> #</div><div class='ctx'> </div><div class='add'>+config ARCH_HAVE_CUSTOM_GPIO_H</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  Selecting this config option from the architecture Kconfig allows</div><div class='add'>+	  the architecture to provide a custom asm/gpio.h implementation</div><div class='add'>+	  overriding the default implementations.  New uses of this are</div><div class='add'>+	  strongly discouraged.</div><div class='add'>+</div><div class='ctx'> config ARCH_WANT_OPTIONAL_GPIOLIB</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='hunk'>@@ -37,6 +45,10 @@ menuconfig GPIOLIB</div><div class='ctx'> </div><div class='ctx'> if GPIOLIB</div><div class='ctx'> </div><div class='add'>+config OF_GPIO</div><div class='add'>+	def_bool y</div><div class='add'>+	depends on OF &amp;&amp; !SPARC</div><div class='add'>+</div><div class='ctx'> config DEBUG_GPIO</div><div class='ctx'> 	bool "Debug GPIO calls"</div><div class='ctx'> 	depends on DEBUG_KERNEL</div><div class='hunk'>@@ -91,11 +103,25 @@ config GPIO_IT8761E</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to support GPIO functionality of IT8761E super I/O chip.</div><div class='ctx'> </div><div class='add'>+config GPIO_EM</div><div class='add'>+	tristate "Emma Mobile GPIO"</div><div class='add'>+	depends on ARM</div><div class='add'>+	help</div><div class='add'>+	  Say yes here to support GPIO on Renesas Emma Mobile SoCs.</div><div class='add'>+</div><div class='ctx'> config GPIO_EP93XX</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on ARCH_EP93XX</div><div class='ctx'> 	select GPIO_GENERIC</div><div class='ctx'> </div><div class='add'>+config GPIO_MM_LANTIQ</div><div class='add'>+	bool "Lantiq Memory mapped GPIOs"</div><div class='add'>+	depends on LANTIQ &amp;&amp; SOC_XWAY</div><div class='add'>+	help</div><div class='add'>+	  This enables support for memory mapped GPIOs on the External Bus Unit</div><div class='add'>+	  (EBU) found on Lantiq SoCs. The gpios are output only as they are</div><div class='add'>+	  created by attaching a 16bit latch to the bus.</div><div class='add'>+</div><div class='ctx'> config GPIO_MPC5200</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on PPC_MPC52xx</div><div class='hunk'>@@ -149,6 +175,14 @@ config GPIO_PXA</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to support the PXA GPIO device</div><div class='ctx'> </div><div class='add'>+config GPIO_STA2X11</div><div class='add'>+	bool "STA2x11/ConneXt GPIO support"</div><div class='add'>+	depends on MFD_STA2X11</div><div class='add'>+	select GENERIC_IRQ_CHIP</div><div class='add'>+	help</div><div class='add'>+	  Say yes here to support the STA2x11/ConneXt GPIO device.</div><div class='add'>+	  The GPIO module has 128 GPIO pins with alternate functions.</div><div class='add'>+</div><div class='ctx'> config GPIO_XILINX</div><div class='ctx'> 	bool "Xilinx GPIO support"</div><div class='ctx'> 	depends on PPC_OF || MICROBLAZE</div><div class='hunk'>@@ -162,13 +196,13 @@ config GPIO_VR41XX</div><div class='ctx'> 	  Say yes here to support the NEC VR4100 series General-purpose I/O Uint</div><div class='ctx'> </div><div class='ctx'> config GPIO_SCH</div><div class='del'>-	tristate "Intel SCH/TunnelCreek GPIO"</div><div class='add'>+	tristate "Intel SCH/TunnelCreek/Centerton GPIO"</div><div class='ctx'> 	depends on PCI &amp;&amp; X86</div><div class='ctx'> 	select MFD_CORE</div><div class='ctx'> 	select LPC_SCH</div><div class='ctx'> 	help</div><div class='del'>-	  Say yes here to support GPIO interface on Intel Poulsbo SCH</div><div class='del'>-	  or Intel Tunnel Creek processor.</div><div class='add'>+	  Say yes here to support GPIO interface on Intel Poulsbo SCH,</div><div class='add'>+	  Intel Tunnel Creek processor or Intel Centerton processor.</div><div class='ctx'> 	  The Intel SCH contains a total of 14 GPIO pins. Ten GPIOs are</div><div class='ctx'> 	  powered by the core power rail and are turned off during sleep</div><div class='ctx'> 	  modes (S3 and higher). The remaining four GPIOs are powered by</div><div class='hunk'>@@ -177,6 +211,22 @@ config GPIO_SCH</div><div class='ctx'> 	  system from the Suspend-to-RAM state.</div><div class='ctx'> 	  The Intel Tunnel Creek processor has 5 GPIOs powered by the</div><div class='ctx'> 	  core power rail and 9 from suspend power supply.</div><div class='add'>+	  The Intel Centerton processor has a total of 30 GPIO pins.</div><div class='add'>+	  Twenty-one are powered by the core power rail and 9 from the</div><div class='add'>+	  suspend power supply.</div><div class='add'>+</div><div class='add'>+config GPIO_ICH</div><div class='add'>+	tristate "Intel ICH GPIO"</div><div class='add'>+	depends on PCI &amp;&amp; X86</div><div class='add'>+	select MFD_CORE</div><div class='add'>+	select LPC_ICH</div><div class='add'>+	help</div><div class='add'>+	  Say yes here to support the GPIO functionality of a number of Intel</div><div class='add'>+	  ICH-based chipsets.  Currently supported devices: ICH6, ICH7, ICH8</div><div class='add'>+	  ICH9, ICH10, Series 5/3400 (eg Ibex Peak), Series 6/C200 (eg</div><div class='add'>+	  Cougar Point), NM10 (Tiger Point), and 3100 (Whitmore Lake).</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='ctx'> </div><div class='ctx'> config GPIO_VX855</div><div class='ctx'> 	tristate "VIA VX855/VX875 GPIO"</div><div class='hunk'>@@ -243,7 +293,7 @@ config GPIO_MC9S08DZ60</div><div class='ctx'> 	  Select this to enable the MC9S08DZ60 GPIO driver</div><div class='ctx'> </div><div class='ctx'> config GPIO_PCA953X</div><div class='del'>-	tristate "PCA953x, PCA955x, TCA64xx, and MAX7310 I/O ports"</div><div class='add'>+	tristate "PCA953x, PCA955x, PCA957x, TCA64xx, and MAX7310 I/O ports"</div><div class='ctx'> 	depends on I2C</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to provide access to several register-oriented</div><div class='hunk'>@@ -252,10 +302,11 @@ config GPIO_PCA953X</div><div class='ctx'> </div><div class='ctx'> 	  4 bits:	pca9536, pca9537</div><div class='ctx'> </div><div class='del'>-	  8 bits:	max7310, pca9534, pca9538, pca9554, pca9557,</div><div class='del'>-	  		tca6408</div><div class='add'>+	  8 bits:	max7310, max7315, pca6107, pca9534, pca9538, pca9554,</div><div class='add'>+			pca9556, pca9557, pca9574, tca6408</div><div class='ctx'> </div><div class='del'>-	  16 bits:	pca9535, pca9539, pca9555, tca6416</div><div class='add'>+	  16 bits:	max7312, max7313, pca9535, pca9539, pca9555, pca9575,</div><div class='add'>+			tca6416</div><div class='ctx'> </div><div class='ctx'> config GPIO_PCA953X_IRQ</div><div class='ctx'> 	bool "Interrupt controller support for PCA953x"</div><div class='hunk'>@@ -288,6 +339,15 @@ config GPIO_PCF857X</div><div class='ctx'> 	  This driver provides an in-kernel interface to those GPIOs using</div><div class='ctx'> 	  platform-neutral GPIO calls.</div><div class='ctx'> </div><div class='add'>+config GPIO_RC5T583</div><div class='add'>+	bool "RICOH RC5T583 GPIO"</div><div class='add'>+	depends on MFD_RC5T583</div><div class='add'>+	help</div><div class='add'>+	  Select this option to enable GPIO driver for the Ricoh RC5T583</div><div class='add'>+	  chip family.</div><div class='add'>+	  This driver provides the support for driving/reading the gpio pins</div><div class='add'>+	  of RC5T583 device through standard gpio library.</div><div class='add'>+</div><div class='ctx'> config GPIO_SX150X</div><div class='ctx'> 	bool "Semtech SX150x I2C GPIO expander"</div><div class='ctx'> 	depends on I2C=y</div><div class='hunk'>@@ -306,6 +366,16 @@ config GPIO_STMPE</div><div class='ctx'> 	  This enables support for the GPIOs found on the STMPE I/O</div><div class='ctx'> 	  Expanders.</div><div class='ctx'> </div><div class='add'>+config GPIO_STP_XWAY</div><div class='add'>+	bool "XWAY STP GPIOs"</div><div class='add'>+	depends on SOC_XWAY</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Serial To Parallel (STP) unit found on</div><div class='add'>+	  XWAY SoC. The STP allows the SoC to drive a shift registers cascade,</div><div class='add'>+	  that can be up to 24 bit. This peripheral is aimed at driving leds.</div><div class='add'>+	  Some of the gpios/leds can be auto updated by the soc with dsl and</div><div class='add'>+	  phy status.</div><div class='add'>+</div><div class='ctx'> config GPIO_TC3589X</div><div class='ctx'> 	bool "TC3589X GPIOs"</div><div class='ctx'> 	depends on MFD_TC3589X</div><div class='hunk'>@@ -399,6 +469,7 @@ config GPIO_BT8XX</div><div class='ctx'> config GPIO_LANGWELL</div><div class='ctx'> 	bool "Intel Langwell/Penwell GPIO support"</div><div class='ctx'> 	depends on PCI &amp;&amp; X86</div><div class='add'>+	select IRQ_DOMAIN</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here to support Intel Langwell/Penwell GPIO.</div><div class='ctx'> </div><div class='hunk'>@@ -514,4 +585,12 @@ config GPIO_TPS65910</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this option to enable GPIO driver for the TPS65910</div><div class='ctx'> 	  chip family.</div><div class='add'>+</div><div class='add'>+config GPIO_MSIC</div><div class='add'>+	bool "Intel MSIC mixed signal gpio support"</div><div class='add'>+	depends on MFD_INTEL_MSIC</div><div class='add'>+	help</div><div class='add'>+	  Enable support for GPIO on intel MSIC controllers found in</div><div class='add'>+	  intel MID devices</div><div class='add'>+</div><div class='ctx'> endif</div><div class='head'>diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile<br/>index 007f54bd0081..0f55662002c3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/Makefile</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> ccflags-$(CONFIG_DEBUG_GPIO)	+= -DDEBUG</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_GPIOLIB)		+= gpiolib.o devres.o</div><div class='add'>+obj-$(CONFIG_OF_GPIO)		+= gpiolib-of.o</div><div class='ctx'> </div><div class='ctx'> # Device drivers. Generally keep list sorted alphabetically</div><div class='ctx'> obj-$(CONFIG_GPIO_GENERIC)	+= gpio-generic.o</div><div class='hunk'>@@ -15,8 +16,10 @@ obj-$(CONFIG_GPIO_BT8XX)	+= gpio-bt8xx.o</div><div class='ctx'> obj-$(CONFIG_GPIO_CS5535)	+= gpio-cs5535.o</div><div class='ctx'> obj-$(CONFIG_GPIO_DA9052)	+= gpio-da9052.o</div><div class='ctx'> obj-$(CONFIG_ARCH_DAVINCI)	+= gpio-davinci.o</div><div class='add'>+obj-$(CONFIG_GPIO_EM)		+= gpio-em.o</div><div class='ctx'> obj-$(CONFIG_GPIO_EP93XX)	+= gpio-ep93xx.o</div><div class='ctx'> obj-$(CONFIG_GPIO_GE_FPGA)	+= gpio-ge.o</div><div class='add'>+obj-$(CONFIG_GPIO_ICH)		+= gpio-ich.o</div><div class='ctx'> obj-$(CONFIG_GPIO_IT8761E)	+= gpio-it8761e.o</div><div class='ctx'> obj-$(CONFIG_GPIO_JANZ_TTL)	+= gpio-janz-ttl.o</div><div class='ctx'> obj-$(CONFIG_ARCH_KS8695)	+= gpio-ks8695.o</div><div class='hunk'>@@ -30,25 +33,29 @@ obj-$(CONFIG_GPIO_MC33880)	+= gpio-mc33880.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MC9S08DZ60)	+= gpio-mc9s08dz60.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MCP23S08)	+= gpio-mcp23s08.o</div><div class='ctx'> obj-$(CONFIG_GPIO_ML_IOH)	+= gpio-ml-ioh.o</div><div class='add'>+obj-$(CONFIG_GPIO_MM_LANTIQ)	+= gpio-mm-lantiq.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MPC5200)	+= gpio-mpc5200.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MPC8XXX)	+= gpio-mpc8xxx.o</div><div class='add'>+obj-$(CONFIG_GPIO_MSIC)		+= gpio-msic.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MSM_V1)	+= gpio-msm-v1.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MSM_V2)	+= gpio-msm-v2.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MXC)		+= gpio-mxc.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MXS)		+= gpio-mxs.o</div><div class='del'>-obj-$(CONFIG_PLAT_NOMADIK)	+= gpio-nomadik.o</div><div class='ctx'> obj-$(CONFIG_ARCH_OMAP)		+= gpio-omap.o</div><div class='ctx'> obj-$(CONFIG_GPIO_PCA953X)	+= gpio-pca953x.o</div><div class='ctx'> obj-$(CONFIG_GPIO_PCF857X)	+= gpio-pcf857x.o</div><div class='ctx'> obj-$(CONFIG_GPIO_PCH)		+= gpio-pch.o</div><div class='ctx'> obj-$(CONFIG_GPIO_PL061)	+= gpio-pl061.o</div><div class='ctx'> obj-$(CONFIG_GPIO_PXA)		+= gpio-pxa.o</div><div class='add'>+obj-$(CONFIG_GPIO_RC5T583)	+= gpio-rc5t583.o</div><div class='ctx'> obj-$(CONFIG_GPIO_RDC321X)	+= gpio-rdc321x.o</div><div class='ctx'> obj-$(CONFIG_PLAT_SAMSUNG)	+= gpio-samsung.o</div><div class='ctx'> obj-$(CONFIG_ARCH_SA1100)	+= gpio-sa1100.o</div><div class='ctx'> obj-$(CONFIG_GPIO_SCH)		+= gpio-sch.o</div><div class='ctx'> obj-$(CONFIG_GPIO_SODAVILLE)	+= gpio-sodaville.o</div><div class='add'>+obj-$(CONFIG_GPIO_STA2X11)	+= gpio-sta2x11.o</div><div class='ctx'> obj-$(CONFIG_GPIO_STMPE)	+= gpio-stmpe.o</div><div class='add'>+obj-$(CONFIG_GPIO_STP_XWAY)	+= gpio-stp-xway.o</div><div class='ctx'> obj-$(CONFIG_GPIO_SX150X)	+= gpio-sx150x.o</div><div class='ctx'> obj-$(CONFIG_GPIO_TC3589X)	+= gpio-tc3589x.o</div><div class='ctx'> obj-$(CONFIG_ARCH_TEGRA)	+= gpio-tegra.o</div><div class='head'>diff --git a/drivers/gpio/devres.c b/drivers/gpio/devres.c<br/>index 3dd29399cef5..9e9947cb86a3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/devres.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/devres.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/devres.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/devres.c</a></div><div class='hunk'>@@ -71,6 +71,35 @@ int devm_gpio_request(struct device *dev, unsigned gpio, const char *label)</div><div class='ctx'> EXPORT_SYMBOL(devm_gpio_request);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ *	devm_gpio_request_one - request a single GPIO with initial setup</div><div class='add'>+ *	@dev:   device to request for</div><div class='add'>+ *	@gpio:	the GPIO number</div><div class='add'>+ *	@flags:	GPIO configuration as specified by GPIOF_*</div><div class='add'>+ *	@label:	a literal description string of this GPIO</div><div class='add'>+ */</div><div class='add'>+int devm_gpio_request_one(struct device *dev, unsigned gpio,</div><div class='add'>+			  unsigned long flags, const char *label)</div><div class='add'>+{</div><div class='add'>+	unsigned *dr;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	dr = devres_alloc(devm_gpio_release, sizeof(unsigned), GFP_KERNEL);</div><div class='add'>+	if (!dr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rc = gpio_request_one(gpio, flags, label);</div><div class='add'>+	if (rc) {</div><div class='add'>+		devres_free(dr);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*dr = gpio;</div><div class='add'>+	devres_add(dev, dr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  *      devm_gpio_free - free an interrupt</div><div class='ctx'>  *      @dev: device to free gpio for</div><div class='ctx'>  *      @gpio: gpio to free</div><div class='hunk'>@@ -83,8 +112,7 @@ EXPORT_SYMBOL(devm_gpio_request);</div><div class='ctx'> void devm_gpio_free(struct device *dev, unsigned int gpio)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='del'>-	WARN_ON(devres_destroy(dev, devm_gpio_release, devm_gpio_match,</div><div class='add'>+	WARN_ON(devres_release(dev, devm_gpio_release, devm_gpio_match,</div><div class='ctx'> 		&amp;gpio));</div><div class='del'>-	gpio_free(gpio);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(devm_gpio_free);</div><div class='head'>diff --git a/drivers/gpio/gpio-bt8xx.c b/drivers/gpio/gpio-bt8xx.c<br/>index 5ca4098ba092..e4cc7eb69bb2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-bt8xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-bt8xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-bt8xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-bt8xx.c</a></div><div class='hunk'>@@ -328,17 +328,7 @@ static struct pci_driver bt8xxgpio_pci_driver = {</div><div class='ctx'> 	.resume		= bt8xxgpio_resume,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init bt8xxgpio_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;bt8xxgpio_pci_driver);</div><div class='del'>-}</div><div class='del'>-module_init(bt8xxgpio_init)</div><div class='del'>-</div><div class='del'>-static void __exit bt8xxgpio_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;bt8xxgpio_pci_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(bt8xxgpio_exit)</div><div class='add'>+module_pci_driver(bt8xxgpio_pci_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Michael Buesch");</div><div class='head'>diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c<br/>new file mode 100644<br/>index 000000000000..150d9768811d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-em.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-em.c</a></div><div class='hunk'>@@ -0,0 +1,418 @@</div><div class='add'>+/*</div><div class='add'>+ * Emma Mobile GPIO Support - GIO</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012 Magnus Damm</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/gpio-em.h&gt;</div><div class='add'>+</div><div class='add'>+struct em_gio_priv {</div><div class='add'>+	void __iomem *base0;</div><div class='add'>+	void __iomem *base1;</div><div class='add'>+	unsigned int irq_base;</div><div class='add'>+	spinlock_t sense_lock;</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct gpio_chip gpio_chip;</div><div class='add'>+	struct irq_chip irq_chip;</div><div class='add'>+	struct irq_domain *irq_domain;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define GIO_E1 0x00</div><div class='add'>+#define GIO_E0 0x04</div><div class='add'>+#define GIO_EM 0x04</div><div class='add'>+#define GIO_OL 0x08</div><div class='add'>+#define GIO_OH 0x0c</div><div class='add'>+#define GIO_I 0x10</div><div class='add'>+#define GIO_IIA 0x14</div><div class='add'>+#define GIO_IEN 0x18</div><div class='add'>+#define GIO_IDS 0x1c</div><div class='add'>+#define GIO_IIM 0x1c</div><div class='add'>+#define GIO_RAW 0x20</div><div class='add'>+#define GIO_MST 0x24</div><div class='add'>+#define GIO_IIR 0x28</div><div class='add'>+</div><div class='add'>+#define GIO_IDT0 0x40</div><div class='add'>+#define GIO_IDT1 0x44</div><div class='add'>+#define GIO_IDT2 0x48</div><div class='add'>+#define GIO_IDT3 0x4c</div><div class='add'>+#define GIO_RAWBL 0x50</div><div class='add'>+#define GIO_RAWBH 0x54</div><div class='add'>+#define GIO_IRBL 0x58</div><div class='add'>+#define GIO_IRBH 0x5c</div><div class='add'>+</div><div class='add'>+#define GIO_IDT(n) (GIO_IDT0 + ((n) * 4))</div><div class='add'>+</div><div class='add'>+static inline unsigned long em_gio_read(struct em_gio_priv *p, int offs)</div><div class='add'>+{</div><div class='add'>+	if (offs &lt; GIO_IDT0)</div><div class='add'>+		return ioread32(p-&gt;base0 + offs);</div><div class='add'>+	else</div><div class='add'>+		return ioread32(p-&gt;base1 + (offs - GIO_IDT0));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void em_gio_write(struct em_gio_priv *p, int offs,</div><div class='add'>+				unsigned long value)</div><div class='add'>+{</div><div class='add'>+	if (offs &lt; GIO_IDT0)</div><div class='add'>+		iowrite32(value, p-&gt;base0 + offs);</div><div class='add'>+	else</div><div class='add'>+		iowrite32(value, p-&gt;base1 + (offs - GIO_IDT0));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct em_gio_priv *irq_to_priv(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct irq_chip *chip = irq_data_get_irq_chip(d);</div><div class='add'>+	return container_of(chip, struct em_gio_priv, irq_chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void em_gio_irq_disable(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct em_gio_priv *p = irq_to_priv(d);</div><div class='add'>+</div><div class='add'>+	em_gio_write(p, GIO_IDS, BIT(irqd_to_hwirq(d)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void em_gio_irq_enable(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct em_gio_priv *p = irq_to_priv(d);</div><div class='add'>+</div><div class='add'>+	em_gio_write(p, GIO_IEN, BIT(irqd_to_hwirq(d)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define GIO_ASYNC(x) (x + 8)</div><div class='add'>+</div><div class='add'>+static unsigned char em_gio_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {</div><div class='add'>+	[IRQ_TYPE_EDGE_RISING] = GIO_ASYNC(0x00),</div><div class='add'>+	[IRQ_TYPE_EDGE_FALLING] = GIO_ASYNC(0x01),</div><div class='add'>+	[IRQ_TYPE_LEVEL_HIGH] = GIO_ASYNC(0x02),</div><div class='add'>+	[IRQ_TYPE_LEVEL_LOW] = GIO_ASYNC(0x03),</div><div class='add'>+	[IRQ_TYPE_EDGE_BOTH] = GIO_ASYNC(0x04),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int em_gio_irq_set_type(struct irq_data *d, unsigned int type)</div><div class='add'>+{</div><div class='add'>+	unsigned char value = em_gio_sense_table[type &amp; IRQ_TYPE_SENSE_MASK];</div><div class='add'>+	struct em_gio_priv *p = irq_to_priv(d);</div><div class='add'>+	unsigned int reg, offset, shift;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned long tmp;</div><div class='add'>+</div><div class='add'>+	if (!value)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	offset = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+	pr_debug("gio: sense irq = %d, mode = %d\n", offset, value);</div><div class='add'>+</div><div class='add'>+	/* 8 x 4 bit fields in 4 IDT registers */</div><div class='add'>+	reg = GIO_IDT(offset &gt;&gt; 3);</div><div class='add'>+	shift = (offset &amp; 0x07) &lt;&lt; 4;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;p-&gt;sense_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* disable the interrupt in IIA */</div><div class='add'>+	tmp = em_gio_read(p, GIO_IIA);</div><div class='add'>+	tmp &amp;= ~BIT(offset);</div><div class='add'>+	em_gio_write(p, GIO_IIA, tmp);</div><div class='add'>+</div><div class='add'>+	/* change the sense setting in IDT */</div><div class='add'>+	tmp = em_gio_read(p, reg);</div><div class='add'>+	tmp &amp;= ~(0xf &lt;&lt; shift);</div><div class='add'>+	tmp |= value &lt;&lt; shift;</div><div class='add'>+	em_gio_write(p, reg, tmp);</div><div class='add'>+</div><div class='add'>+	/* clear pending interrupts */</div><div class='add'>+	em_gio_write(p, GIO_IIR, BIT(offset));</div><div class='add'>+</div><div class='add'>+	/* enable the interrupt in IIA */</div><div class='add'>+	tmp = em_gio_read(p, GIO_IIA);</div><div class='add'>+	tmp |= BIT(offset);</div><div class='add'>+	em_gio_write(p, GIO_IIA, tmp);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;p-&gt;sense_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t em_gio_irq_handler(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct em_gio_priv *p = dev_id;</div><div class='add'>+	unsigned long pending;</div><div class='add'>+	unsigned int offset, irqs_handled = 0;</div><div class='add'>+</div><div class='add'>+	while ((pending = em_gio_read(p, GIO_MST))) {</div><div class='add'>+		offset = __ffs(pending);</div><div class='add'>+		em_gio_write(p, GIO_IIR, BIT(offset));</div><div class='add'>+		generic_handle_irq(irq_find_mapping(p-&gt;irq_domain, offset));</div><div class='add'>+		irqs_handled++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return irqs_handled ? IRQ_HANDLED : IRQ_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct em_gio_priv *gpio_to_priv(struct gpio_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return container_of(chip, struct em_gio_priv, gpio_chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int em_gio_direction_input(struct gpio_chip *chip, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	em_gio_write(gpio_to_priv(chip), GIO_E0, BIT(offset));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int em_gio_get(struct gpio_chip *chip, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	return (int)(em_gio_read(gpio_to_priv(chip), GIO_I) &amp; BIT(offset));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __em_gio_set(struct gpio_chip *chip, unsigned int reg,</div><div class='add'>+			 unsigned shift, int value)</div><div class='add'>+{</div><div class='add'>+	/* upper 16 bits contains mask and lower 16 actual value */</div><div class='add'>+	em_gio_write(gpio_to_priv(chip), reg,</div><div class='add'>+		     (1 &lt;&lt; (shift + 16)) | (value &lt;&lt; shift));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void em_gio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+{</div><div class='add'>+	/* output is split into two registers */</div><div class='add'>+	if (offset &lt; 16)</div><div class='add'>+		__em_gio_set(chip, GIO_OL, offset, value);</div><div class='add'>+	else</div><div class='add'>+		__em_gio_set(chip, GIO_OH, offset - 16, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int em_gio_direction_output(struct gpio_chip *chip, unsigned offset,</div><div class='add'>+				   int value)</div><div class='add'>+{</div><div class='add'>+	/* write GPIO value to output before selecting output mode of pin */</div><div class='add'>+	em_gio_set(chip, offset, value);</div><div class='add'>+	em_gio_write(gpio_to_priv(chip), GIO_E1, BIT(offset));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int em_gio_to_irq(struct gpio_chip *chip, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	return irq_find_mapping(gpio_to_priv(chip)-&gt;irq_domain, offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int em_gio_irq_domain_map(struct irq_domain *h, unsigned int virq,</div><div class='add'>+				 irq_hw_number_t hw)</div><div class='add'>+{</div><div class='add'>+	struct em_gio_priv *p = h-&gt;host_data;</div><div class='add'>+</div><div class='add'>+	pr_debug("gio: map hw irq = %d, virq = %d\n", (int)hw, virq);</div><div class='add'>+</div><div class='add'>+	irq_set_chip_data(virq, h-&gt;host_data);</div><div class='add'>+	irq_set_chip_and_handler(virq, &amp;p-&gt;irq_chip, handle_level_irq);</div><div class='add'>+	set_irq_flags(virq, IRQF_VALID); /* kill me now */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_domain_ops em_gio_irq_domain_ops = {</div><div class='add'>+	.map	= em_gio_irq_domain_map,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit em_gio_irq_domain_init(struct em_gio_priv *p)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = p-&gt;pdev;</div><div class='add'>+	struct gpio_em_config *pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+</div><div class='add'>+	p-&gt;irq_base = irq_alloc_descs(pdata-&gt;irq_base, 0,</div><div class='add'>+				      pdata-&gt;number_of_pins, numa_node_id());</div><div class='add'>+	if (IS_ERR_VALUE(p-&gt;irq_base)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "cannot get irq_desc\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+	pr_debug("gio: hw base = %d, nr = %d, sw base = %d\n",</div><div class='add'>+		 pdata-&gt;gpio_base, pdata-&gt;number_of_pins, p-&gt;irq_base);</div><div class='add'>+</div><div class='add'>+	p-&gt;irq_domain = irq_domain_add_legacy(pdev-&gt;dev.of_node,</div><div class='add'>+					      pdata-&gt;number_of_pins,</div><div class='add'>+					      p-&gt;irq_base, 0,</div><div class='add'>+					      &amp;em_gio_irq_domain_ops, p);</div><div class='add'>+	if (!p-&gt;irq_domain) {</div><div class='add'>+		irq_free_descs(p-&gt;irq_base, pdata-&gt;number_of_pins);</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devexit em_gio_irq_domain_cleanup(struct em_gio_priv *p)</div><div class='add'>+{</div><div class='add'>+	struct gpio_em_config *pdata = p-&gt;pdev-&gt;dev.platform_data;</div><div class='add'>+</div><div class='add'>+	irq_free_descs(p-&gt;irq_base, pdata-&gt;number_of_pins);</div><div class='add'>+	/* FIXME: irq domain wants to be freed! */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit em_gio_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct gpio_em_config *pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct em_gio_priv *p;</div><div class='add'>+	struct resource *io[2], *irq[2];</div><div class='add'>+	struct gpio_chip *gpio_chip;</div><div class='add'>+	struct irq_chip *irq_chip;</div><div class='add'>+	const char *name = dev_name(&amp;pdev-&gt;dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	p = kzalloc(sizeof(*p), GFP_KERNEL);</div><div class='add'>+	if (!p) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to allocate driver data\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	p-&gt;pdev = pdev;</div><div class='add'>+	platform_set_drvdata(pdev, p);</div><div class='add'>+	spin_lock_init(&amp;p-&gt;sense_lock);</div><div class='add'>+</div><div class='add'>+	io[0] = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	io[1] = platform_get_resource(pdev, IORESOURCE_MEM, 1);</div><div class='add'>+	irq[0] = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='add'>+	irq[1] = platform_get_resource(pdev, IORESOURCE_IRQ, 1);</div><div class='add'>+</div><div class='add'>+	if (!io[0] || !io[1] || !irq[0] || !irq[1] || !pdata) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "missing IRQ, IOMEM or configuration\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	p-&gt;base0 = ioremap_nocache(io[0]-&gt;start, resource_size(io[0]));</div><div class='add'>+	if (!p-&gt;base0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to remap low I/O memory\n");</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+		goto err1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	p-&gt;base1 = ioremap_nocache(io[1]-&gt;start, resource_size(io[1]));</div><div class='add'>+	if (!p-&gt;base1) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to remap high I/O memory\n");</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+		goto err2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gpio_chip = &amp;p-&gt;gpio_chip;</div><div class='add'>+	gpio_chip-&gt;direction_input = em_gio_direction_input;</div><div class='add'>+	gpio_chip-&gt;get = em_gio_get;</div><div class='add'>+	gpio_chip-&gt;direction_output = em_gio_direction_output;</div><div class='add'>+	gpio_chip-&gt;set = em_gio_set;</div><div class='add'>+	gpio_chip-&gt;to_irq = em_gio_to_irq;</div><div class='add'>+	gpio_chip-&gt;label = name;</div><div class='add'>+	gpio_chip-&gt;owner = THIS_MODULE;</div><div class='add'>+	gpio_chip-&gt;base = pdata-&gt;gpio_base;</div><div class='add'>+	gpio_chip-&gt;ngpio = pdata-&gt;number_of_pins;</div><div class='add'>+</div><div class='add'>+	irq_chip = &amp;p-&gt;irq_chip;</div><div class='add'>+	irq_chip-&gt;name = name;</div><div class='add'>+	irq_chip-&gt;irq_mask = em_gio_irq_disable;</div><div class='add'>+	irq_chip-&gt;irq_unmask = em_gio_irq_enable;</div><div class='add'>+	irq_chip-&gt;irq_enable = em_gio_irq_enable;</div><div class='add'>+	irq_chip-&gt;irq_disable = em_gio_irq_disable;</div><div class='add'>+	irq_chip-&gt;irq_set_type = em_gio_irq_set_type;</div><div class='add'>+	irq_chip-&gt;flags	= IRQCHIP_SKIP_SET_WAKE;</div><div class='add'>+</div><div class='add'>+	ret = em_gio_irq_domain_init(p);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "cannot initialize irq domain\n");</div><div class='add'>+		goto err3;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (request_irq(irq[0]-&gt;start, em_gio_irq_handler, 0, name, p)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to request low IRQ\n");</div><div class='add'>+		ret = -ENOENT;</div><div class='add'>+		goto err4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (request_irq(irq[1]-&gt;start, em_gio_irq_handler, 0, name, p)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to request high IRQ\n");</div><div class='add'>+		ret = -ENOENT;</div><div class='add'>+		goto err5;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = gpiochip_add(gpio_chip);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to add GPIO controller\n");</div><div class='add'>+		goto err6;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err6:</div><div class='add'>+	free_irq(irq[1]-&gt;start, pdev);</div><div class='add'>+err5:</div><div class='add'>+	free_irq(irq[0]-&gt;start, pdev);</div><div class='add'>+err4:</div><div class='add'>+	em_gio_irq_domain_cleanup(p);</div><div class='add'>+err3:</div><div class='add'>+	iounmap(p-&gt;base1);</div><div class='add'>+err2:</div><div class='add'>+	iounmap(p-&gt;base0);</div><div class='add'>+err1:</div><div class='add'>+	kfree(p);</div><div class='add'>+err0:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit em_gio_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct em_gio_priv *p = platform_get_drvdata(pdev);</div><div class='add'>+	struct resource *irq[2];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = gpiochip_remove(&amp;p-&gt;gpio_chip);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	irq[0] = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='add'>+	irq[1] = platform_get_resource(pdev, IORESOURCE_IRQ, 1);</div><div class='add'>+</div><div class='add'>+	free_irq(irq[1]-&gt;start, pdev);</div><div class='add'>+	free_irq(irq[0]-&gt;start, pdev);</div><div class='add'>+	em_gio_irq_domain_cleanup(p);</div><div class='add'>+	iounmap(p-&gt;base1);</div><div class='add'>+	iounmap(p-&gt;base0);</div><div class='add'>+	kfree(p);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver em_gio_device_driver = {</div><div class='add'>+	.probe		= em_gio_probe,</div><div class='add'>+	.remove		= __devexit_p(em_gio_remove),</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "em_gio",</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(em_gio_device_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Magnus Damm");</div><div class='add'>+MODULE_DESCRIPTION("Renesas Emma Mobile GIO Driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c<br/>index 776b772523e5..9fe5b8fe9be8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-ep93xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-ep93xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-ep93xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-ep93xx.c</a></div><div class='hunk'>@@ -325,7 +325,7 @@ static int ep93xx_gpio_add_bank(struct bgpio_chip *bgc, struct device *dev,</div><div class='ctx'> 	void __iomem *dir =  mmio_base + bank-&gt;dir;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = bgpio_init(bgc, dev, 1, data, NULL, NULL, dir, NULL, false);</div><div class='add'>+	err = bgpio_init(bgc, dev, 1, data, NULL, NULL, dir, NULL, 0);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-generic.c b/drivers/gpio/gpio-generic.c<br/>index e38dd0c31973..82e2e4fe599e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-generic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-generic.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-generic.c</a></div><div class='hunk'>@@ -364,7 +364,7 @@ EXPORT_SYMBOL_GPL(bgpio_remove);</div><div class='ctx'> int bgpio_init(struct bgpio_chip *bgc, struct device *dev,</div><div class='ctx'> 	       unsigned long sz, void __iomem *dat, void __iomem *set,</div><div class='ctx'> 	       void __iomem *clr, void __iomem *dirout, void __iomem *dirin,</div><div class='del'>-	       bool big_endian)</div><div class='add'>+	       unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -385,7 +385,7 @@ int bgpio_init(struct bgpio_chip *bgc, struct device *dev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = bgpio_setup_accessors(dev, bgc, big_endian);</div><div class='add'>+	ret = bgpio_setup_accessors(dev, bgc, flags &amp; BGPIOF_BIG_ENDIAN);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -394,6 +394,11 @@ int bgpio_init(struct bgpio_chip *bgc, struct device *dev,</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	bgc-&gt;data = bgc-&gt;read_reg(bgc-&gt;reg_dat);</div><div class='add'>+	if (bgc-&gt;gc.set == bgpio_set_set &amp;&amp;</div><div class='add'>+			!(flags &amp; BGPIOF_UNREADABLE_REG_SET))</div><div class='add'>+		bgc-&gt;data = bgc-&gt;read_reg(bgc-&gt;reg_set);</div><div class='add'>+	if (bgc-&gt;reg_dir &amp;&amp; !(flags &amp; BGPIOF_UNREADABLE_REG_DIR))</div><div class='add'>+		bgc-&gt;dir = bgc-&gt;read_reg(bgc-&gt;reg_dir);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -449,7 +454,7 @@ static int __devinit bgpio_pdev_probe(struct platform_device *pdev)</div><div class='ctx'> 	void __iomem *dirout;</div><div class='ctx'> 	void __iomem *dirin;</div><div class='ctx'> 	unsigned long sz;</div><div class='del'>-	bool be;</div><div class='add'>+	unsigned long flags = 0;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct bgpio_chip *bgc;</div><div class='ctx'> 	struct bgpio_pdata *pdata = dev_get_platdata(dev);</div><div class='hunk'>@@ -480,13 +485,14 @@ static int __devinit bgpio_pdev_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	be = !strcmp(platform_get_device_id(pdev)-&gt;name, "basic-mmio-gpio-be");</div><div class='add'>+	if (!strcmp(platform_get_device_id(pdev)-&gt;name, "basic-mmio-gpio-be"))</div><div class='add'>+		flags |= BGPIOF_BIG_ENDIAN;</div><div class='ctx'> </div><div class='ctx'> 	bgc = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*bgc), GFP_KERNEL);</div><div class='ctx'> 	if (!bgc)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	err = bgpio_init(bgc, dev, sz, dat, set, clr, dirout, dirin, be);</div><div class='add'>+	err = bgpio_init(bgc, dev, sz, dat, set, clr, dirout, dirin, flags);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c<br/>new file mode 100644<br/>index 000000000000..b7c06517403d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-ich.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-ich.c</a></div><div class='hunk'>@@ -0,0 +1,419 @@</div><div class='add'>+/*</div><div class='add'>+ * Intel ICH6-10, Series 5 and 6 GPIO driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2010 Extreme Engineering Solutions.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mfd/lpc_ich.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_NAME "gpio_ich"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * GPIO register offsets in GPIO I/O space.</div><div class='add'>+ * Each chunk of 32 GPIOs is manipulated via its own USE_SELx, IO_SELx, and</div><div class='add'>+ * LVLx registers.  Logic in the read/write functions takes a register and</div><div class='add'>+ * an absolute bit number and determines the proper register offset and bit</div><div class='add'>+ * number in that register.  For example, to read the value of GPIO bit 50</div><div class='add'>+ * the code would access offset ichx_regs[2(=GPIO_LVL)][1(=50/32)],</div><div class='add'>+ * bit 18 (50%32).</div><div class='add'>+ */</div><div class='add'>+enum GPIO_REG {</div><div class='add'>+	GPIO_USE_SEL = 0,</div><div class='add'>+	GPIO_IO_SEL,</div><div class='add'>+	GPIO_LVL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 ichx_regs[3][3] = {</div><div class='add'>+	{0x00, 0x30, 0x40},	/* USE_SEL[1-3] offsets */</div><div class='add'>+	{0x04, 0x34, 0x44},	/* IO_SEL[1-3] offsets */</div><div class='add'>+	{0x0c, 0x38, 0x48},	/* LVL[1-3] offsets */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICHX_WRITE(val, reg, base_res)	outl(val, (reg) + (base_res)-&gt;start)</div><div class='add'>+#define ICHX_READ(reg, base_res)	inl((reg) + (base_res)-&gt;start)</div><div class='add'>+</div><div class='add'>+struct ichx_desc {</div><div class='add'>+	/* Max GPIO pins the chipset can have */</div><div class='add'>+	uint ngpio;</div><div class='add'>+</div><div class='add'>+	/* Whether the chipset has GPIO in GPE0_STS in the PM IO region */</div><div class='add'>+	bool uses_gpe0;</div><div class='add'>+</div><div class='add'>+	/* USE_SEL is bogus on some chipsets, eg 3100 */</div><div class='add'>+	u32 use_sel_ignore[3];</div><div class='add'>+</div><div class='add'>+	/* Some chipsets have quirks, let these use their own request/get */</div><div class='add'>+	int (*request)(struct gpio_chip *chip, unsigned offset);</div><div class='add'>+	int (*get)(struct gpio_chip *chip, unsigned offset);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct {</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	struct platform_device *dev;</div><div class='add'>+	struct gpio_chip chip;</div><div class='add'>+	struct resource *gpio_base;	/* GPIO IO base */</div><div class='add'>+	struct resource *pm_base;	/* Power Mangagment IO base */</div><div class='add'>+	struct ichx_desc *desc;	/* Pointer to chipset-specific description */</div><div class='add'>+	u32 orig_gpio_ctrl;	/* Orig CTRL value, used to restore on exit */</div><div class='add'>+} ichx_priv;</div><div class='add'>+</div><div class='add'>+static int modparam_gpiobase = -1;	/* dynamic */</div><div class='add'>+module_param_named(gpiobase, modparam_gpiobase, int, 0444);</div><div class='add'>+MODULE_PARM_DESC(gpiobase, "The GPIO number base. -1 means dynamic, "</div><div class='add'>+			   "which is the default.");</div><div class='add'>+</div><div class='add'>+static int ichx_write_bit(int reg, unsigned nr, int val, int verify)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 data, tmp;</div><div class='add'>+	int reg_nr = nr / 32;</div><div class='add'>+	int bit = nr &amp; 0x1f;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ichx_priv.lock, flags);</div><div class='add'>+</div><div class='add'>+	data = ICHX_READ(ichx_regs[reg][reg_nr], ichx_priv.gpio_base);</div><div class='add'>+	if (val)</div><div class='add'>+		data |= 1 &lt;&lt; bit;</div><div class='add'>+	else</div><div class='add'>+		data &amp;= ~(1 &lt;&lt; bit);</div><div class='add'>+	ICHX_WRITE(data, ichx_regs[reg][reg_nr], ichx_priv.gpio_base);</div><div class='add'>+	tmp = ICHX_READ(ichx_regs[reg][reg_nr], ichx_priv.gpio_base);</div><div class='add'>+	if (verify &amp;&amp; data != tmp)</div><div class='add'>+		ret = -EPERM;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;ichx_priv.lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ichx_read_bit(int reg, unsigned nr)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 data;</div><div class='add'>+	int reg_nr = nr / 32;</div><div class='add'>+	int bit = nr &amp; 0x1f;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ichx_priv.lock, flags);</div><div class='add'>+</div><div class='add'>+	data = ICHX_READ(ichx_regs[reg][reg_nr], ichx_priv.gpio_base);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;ichx_priv.lock, flags);</div><div class='add'>+</div><div class='add'>+	return data &amp; (1 &lt;&lt; bit) ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Try setting pin as an input and verify it worked since many pins</div><div class='add'>+	 * are output-only.</div><div class='add'>+	 */</div><div class='add'>+	if (ichx_write_bit(GPIO_IO_SEL, nr, 1, 1))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,</div><div class='add'>+					int val)</div><div class='add'>+{</div><div class='add'>+	/* Set GPIO output value. */</div><div class='add'>+	ichx_write_bit(GPIO_LVL, nr, val, 0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Try setting pin as an output and verify it worked since many pins</div><div class='add'>+	 * are input-only.</div><div class='add'>+	 */</div><div class='add'>+	if (ichx_write_bit(GPIO_IO_SEL, nr, 0, 1))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ichx_gpio_get(struct gpio_chip *chip, unsigned nr)</div><div class='add'>+{</div><div class='add'>+	return ichx_read_bit(GPIO_LVL, nr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ich6_gpio_get(struct gpio_chip *chip, unsigned nr)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * GPI 0 - 15 need to be read from the power management registers on</div><div class='add'>+	 * a ICH6/3100 bridge.</div><div class='add'>+	 */</div><div class='add'>+	if (nr &lt; 16) {</div><div class='add'>+		if (!ichx_priv.pm_base)</div><div class='add'>+			return -ENXIO;</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;ichx_priv.lock, flags);</div><div class='add'>+</div><div class='add'>+		/* GPI 0 - 15 are latched, write 1 to clear*/</div><div class='add'>+		ICHX_WRITE(1 &lt;&lt; (16 + nr), 0, ichx_priv.pm_base);</div><div class='add'>+		data = ICHX_READ(0, ichx_priv.pm_base);</div><div class='add'>+</div><div class='add'>+		spin_unlock_irqrestore(&amp;ichx_priv.lock, flags);</div><div class='add'>+</div><div class='add'>+		return (data &gt;&gt; 16) &amp; (1 &lt;&lt; nr) ? 1 : 0;</div><div class='add'>+	} else {</div><div class='add'>+		return ichx_gpio_get(chip, nr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ichx_gpio_request(struct gpio_chip *chip, unsigned nr)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Note we assume the BIOS properly set a bridge's USE value.  Some</div><div class='add'>+	 * chips (eg Intel 3100) have bogus USE values though, so first see if</div><div class='add'>+	 * the chipset's USE value can be trusted for this specific bit.</div><div class='add'>+	 * If it can't be trusted, assume that the pin can be used as a GPIO.</div><div class='add'>+	 */</div><div class='add'>+	if (ichx_priv.desc-&gt;use_sel_ignore[nr / 32] &amp; (1 &lt;&lt; (nr &amp; 0x1f)))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	return ichx_read_bit(GPIO_USE_SEL, nr) ? 0 : -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ich6_gpio_request(struct gpio_chip *chip, unsigned nr)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Fixups for bits 16 and 17 are necessary on the Intel ICH6/3100</div><div class='add'>+	 * bridge as they are controlled by USE register bits 0 and 1.  See</div><div class='add'>+	 * "Table 704 GPIO_USE_SEL1 register" in the i3100 datasheet for</div><div class='add'>+	 * additional info.</div><div class='add'>+	 */</div><div class='add'>+	if (nr == 16 || nr == 17)</div><div class='add'>+		nr -= 16;</div><div class='add'>+</div><div class='add'>+	return ichx_gpio_request(chip, nr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ichx_gpio_set(struct gpio_chip *chip, unsigned nr, int val)</div><div class='add'>+{</div><div class='add'>+	ichx_write_bit(GPIO_LVL, nr, val, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devinit ichx_gpiolib_setup(struct gpio_chip *chip)</div><div class='add'>+{</div><div class='add'>+	chip-&gt;owner = THIS_MODULE;</div><div class='add'>+	chip-&gt;label = DRV_NAME;</div><div class='add'>+	chip-&gt;dev = &amp;ichx_priv.dev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	/* Allow chip-specific overrides of request()/get() */</div><div class='add'>+	chip-&gt;request = ichx_priv.desc-&gt;request ?</div><div class='add'>+		ichx_priv.desc-&gt;request : ichx_gpio_request;</div><div class='add'>+	chip-&gt;get = ichx_priv.desc-&gt;get ?</div><div class='add'>+		ichx_priv.desc-&gt;get : ichx_gpio_get;</div><div class='add'>+</div><div class='add'>+	chip-&gt;set = ichx_gpio_set;</div><div class='add'>+	chip-&gt;direction_input = ichx_gpio_direction_input;</div><div class='add'>+	chip-&gt;direction_output = ichx_gpio_direction_output;</div><div class='add'>+	chip-&gt;base = modparam_gpiobase;</div><div class='add'>+	chip-&gt;ngpio = ichx_priv.desc-&gt;ngpio;</div><div class='add'>+	chip-&gt;can_sleep = 0;</div><div class='add'>+	chip-&gt;dbg_show = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ICH6-based, 631xesb-based */</div><div class='add'>+static struct ichx_desc ich6_desc = {</div><div class='add'>+	/* Bridges using the ICH6 controller need fixups for GPIO 0 - 17 */</div><div class='add'>+	.request = ich6_gpio_request,</div><div class='add'>+	.get = ich6_gpio_get,</div><div class='add'>+</div><div class='add'>+	/* GPIO 0-15 are read in the GPE0_STS PM register */</div><div class='add'>+	.uses_gpe0 = true,</div><div class='add'>+</div><div class='add'>+	.ngpio = 50,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Intel 3100 */</div><div class='add'>+static struct ichx_desc i3100_desc = {</div><div class='add'>+	/*</div><div class='add'>+	 * Bits 16,17, 20 of USE_SEL and bit 16 of USE_SEL2 always read 0 on</div><div class='add'>+	 * the Intel 3100.  See "Table 712. GPIO Summary Table" of 3100</div><div class='add'>+	 * Datasheet for more info.</div><div class='add'>+	 */</div><div class='add'>+	.use_sel_ignore = {0x00130000, 0x00010000, 0x0},</div><div class='add'>+</div><div class='add'>+	/* The 3100 needs fixups for GPIO 0 - 17 */</div><div class='add'>+	.request = ich6_gpio_request,</div><div class='add'>+	.get = ich6_gpio_get,</div><div class='add'>+</div><div class='add'>+	/* GPIO 0-15 are read in the GPE0_STS PM register */</div><div class='add'>+	.uses_gpe0 = true,</div><div class='add'>+</div><div class='add'>+	.ngpio = 50,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ICH7 and ICH8-based */</div><div class='add'>+static struct ichx_desc ich7_desc = {</div><div class='add'>+	.ngpio = 50,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ICH9-based */</div><div class='add'>+static struct ichx_desc ich9_desc = {</div><div class='add'>+	.ngpio = 61,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ICH10-based - Consumer/corporate versions have different amount of GPIO */</div><div class='add'>+static struct ichx_desc ich10_cons_desc = {</div><div class='add'>+	.ngpio = 61,</div><div class='add'>+};</div><div class='add'>+static struct ichx_desc ich10_corp_desc = {</div><div class='add'>+	.ngpio = 72,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Intel 5 series, 6 series, 3400 series, and C200 series */</div><div class='add'>+static struct ichx_desc intel5_desc = {</div><div class='add'>+	.ngpio = 76,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit ichx_gpio_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct resource *res_base, *res_pm;</div><div class='add'>+	int err;</div><div class='add'>+	struct lpc_ich_info *ich_info = pdev-&gt;dev.platform_data;</div><div class='add'>+</div><div class='add'>+	if (!ich_info)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	ichx_priv.dev = pdev;</div><div class='add'>+</div><div class='add'>+	switch (ich_info-&gt;gpio_version) {</div><div class='add'>+	case ICH_I3100_GPIO:</div><div class='add'>+		ichx_priv.desc = &amp;i3100_desc;</div><div class='add'>+		break;</div><div class='add'>+	case ICH_V5_GPIO:</div><div class='add'>+		ichx_priv.desc = &amp;intel5_desc;</div><div class='add'>+		break;</div><div class='add'>+	case ICH_V6_GPIO:</div><div class='add'>+		ichx_priv.desc = &amp;ich6_desc;</div><div class='add'>+		break;</div><div class='add'>+	case ICH_V7_GPIO:</div><div class='add'>+		ichx_priv.desc = &amp;ich7_desc;</div><div class='add'>+		break;</div><div class='add'>+	case ICH_V9_GPIO:</div><div class='add'>+		ichx_priv.desc = &amp;ich9_desc;</div><div class='add'>+		break;</div><div class='add'>+	case ICH_V10CORP_GPIO:</div><div class='add'>+		ichx_priv.desc = &amp;ich10_corp_desc;</div><div class='add'>+		break;</div><div class='add'>+	case ICH_V10CONS_GPIO:</div><div class='add'>+		ichx_priv.desc = &amp;ich10_cons_desc;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res_base = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPIO);</div><div class='add'>+	if (!res_base || !res_base-&gt;start || !res_base-&gt;end)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!request_region(res_base-&gt;start, resource_size(res_base),</div><div class='add'>+				pdev-&gt;name))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	ichx_priv.gpio_base = res_base;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If necessary, determine the I/O address of ACPI/power management</div><div class='add'>+	 * registers which are needed to read the the GPE0 register for GPI pins</div><div class='add'>+	 * 0 - 15 on some chipsets.</div><div class='add'>+	 */</div><div class='add'>+	if (!ichx_priv.desc-&gt;uses_gpe0)</div><div class='add'>+		goto init;</div><div class='add'>+</div><div class='add'>+	res_pm = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPE0);</div><div class='add'>+	if (!res_pm) {</div><div class='add'>+		pr_warn("ACPI BAR is unavailable, GPI 0 - 15 unavailable\n");</div><div class='add'>+		goto init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!request_region(res_pm-&gt;start, resource_size(res_pm),</div><div class='add'>+			pdev-&gt;name)) {</div><div class='add'>+		pr_warn("ACPI BAR is busy, GPI 0 - 15 unavailable\n");</div><div class='add'>+		goto init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ichx_priv.pm_base = res_pm;</div><div class='add'>+</div><div class='add'>+init:</div><div class='add'>+	ichx_gpiolib_setup(&amp;ichx_priv.chip);</div><div class='add'>+	err = gpiochip_add(&amp;ichx_priv.chip);</div><div class='add'>+	if (err) {</div><div class='add'>+		pr_err("Failed to register GPIOs\n");</div><div class='add'>+		goto add_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_info("GPIO from %d to %d on %s\n", ichx_priv.chip.base,</div><div class='add'>+	       ichx_priv.chip.base + ichx_priv.chip.ngpio - 1, DRV_NAME);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+add_err:</div><div class='add'>+	release_region(ichx_priv.gpio_base-&gt;start,</div><div class='add'>+			resource_size(ichx_priv.gpio_base));</div><div class='add'>+	if (ichx_priv.pm_base)</div><div class='add'>+		release_region(ichx_priv.pm_base-&gt;start,</div><div class='add'>+				resource_size(ichx_priv.pm_base));</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit ichx_gpio_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = gpiochip_remove(&amp;ichx_priv.chip);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "%s failed, %d\n",</div><div class='add'>+				"gpiochip_remove()", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	release_region(ichx_priv.gpio_base-&gt;start,</div><div class='add'>+				resource_size(ichx_priv.gpio_base));</div><div class='add'>+	if (ichx_priv.pm_base)</div><div class='add'>+		release_region(ichx_priv.pm_base-&gt;start,</div><div class='add'>+				resource_size(ichx_priv.pm_base));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver ichx_gpio_driver = {</div><div class='add'>+	.driver		= {</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+		.name	= DRV_NAME,</div><div class='add'>+	},</div><div class='add'>+	.probe		= ichx_gpio_probe,</div><div class='add'>+	.remove		= __devexit_p(ichx_gpio_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(ichx_gpio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Peter Tyser &lt;ptyser@xes-inc.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("GPIO interface for Intel ICH series");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_ALIAS("platform:"DRV_NAME);</div><div class='head'>diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c<br/>index 00692e89ef87..a1c8754f52cf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-langwell.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-langwell.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-langwell.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-langwell.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Langwell chip has 64 pins and thus there are 2 32bit registers to control</div><div class='hunk'>@@ -66,8 +67,8 @@ struct lnw_gpio {</div><div class='ctx'> 	struct gpio_chip		chip;</div><div class='ctx'> 	void				*reg_base;</div><div class='ctx'> 	spinlock_t			lock;</div><div class='del'>-	unsigned			irq_base;</div><div class='ctx'> 	struct pci_dev			*pdev;</div><div class='add'>+	struct irq_domain		*domain;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset,</div><div class='hunk'>@@ -176,13 +177,13 @@ static int lnw_gpio_direction_output(struct gpio_chip *chip,</div><div class='ctx'> static int lnw_gpio_to_irq(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip);</div><div class='del'>-	return lnw-&gt;irq_base + offset;</div><div class='add'>+	return irq_create_mapping(lnw-&gt;domain, offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lnw_irq_type(struct irq_data *d, unsigned type)</div><div class='ctx'> {</div><div class='ctx'> 	struct lnw_gpio *lnw = irq_data_get_irq_chip_data(d);</div><div class='del'>-	u32 gpio = d-&gt;irq - lnw-&gt;irq_base;</div><div class='add'>+	u32 gpio = irqd_to_hwirq(d);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 value;</div><div class='ctx'> 	void __iomem *grer = gpio_reg(&amp;lnw-&gt;chip, gpio, GRER);</div><div class='hunk'>@@ -249,20 +250,55 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc)</div><div class='ctx'> 	/* check GPIO controller to check which pin triggered the interrupt */</div><div class='ctx'> 	for (base = 0; base &lt; lnw-&gt;chip.ngpio; base += 32) {</div><div class='ctx'> 		gedr = gpio_reg(&amp;lnw-&gt;chip, base, GEDR);</div><div class='del'>-		pending = readl(gedr);</div><div class='del'>-		while (pending) {</div><div class='add'>+		while ((pending = readl(gedr))) {</div><div class='ctx'> 			gpio = __ffs(pending);</div><div class='ctx'> 			mask = BIT(gpio);</div><div class='del'>-			pending &amp;= ~mask;</div><div class='ctx'> 			/* Clear before handling so we can't lose an edge */</div><div class='ctx'> 			writel(mask, gedr);</div><div class='del'>-			generic_handle_irq(lnw-&gt;irq_base + base + gpio);</div><div class='add'>+			generic_handle_irq(irq_find_mapping(lnw-&gt;domain,</div><div class='add'>+							    base + gpio));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	chip-&gt;irq_eoi(data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void lnw_irq_init_hw(struct lnw_gpio *lnw)</div><div class='add'>+{</div><div class='add'>+	void __iomem *reg;</div><div class='add'>+	unsigned base;</div><div class='add'>+</div><div class='add'>+	for (base = 0; base &lt; lnw-&gt;chip.ngpio; base += 32) {</div><div class='add'>+		/* Clear the rising-edge detect register */</div><div class='add'>+		reg = gpio_reg(&amp;lnw-&gt;chip, base, GRER);</div><div class='add'>+		writel(0, reg);</div><div class='add'>+		/* Clear the falling-edge detect register */</div><div class='add'>+		reg = gpio_reg(&amp;lnw-&gt;chip, base, GFER);</div><div class='add'>+		writel(0, reg);</div><div class='add'>+		/* Clear the edge detect status register */</div><div class='add'>+		reg = gpio_reg(&amp;lnw-&gt;chip, base, GEDR);</div><div class='add'>+		writel(~0, reg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lnw_gpio_irq_map(struct irq_domain *d, unsigned int virq,</div><div class='add'>+			    irq_hw_number_t hw)</div><div class='add'>+{</div><div class='add'>+	struct lnw_gpio *lnw = d-&gt;host_data;</div><div class='add'>+</div><div class='add'>+	irq_set_chip_and_handler_name(virq, &amp;lnw_irqchip, handle_simple_irq,</div><div class='add'>+				      "demux");</div><div class='add'>+	irq_set_chip_data(virq, lnw);</div><div class='add'>+	irq_set_irq_type(virq, IRQ_TYPE_NONE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops lnw_gpio_irq_ops = {</div><div class='add'>+	.map = lnw_gpio_irq_map,</div><div class='add'>+	.xlate = irq_domain_xlate_twocell,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> static int lnw_gpio_runtime_resume(struct device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -300,23 +336,22 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,</div><div class='ctx'> 			const struct pci_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	void *base;</div><div class='del'>-	int i;</div><div class='ctx'> 	resource_size_t start, len;</div><div class='ctx'> 	struct lnw_gpio *lnw;</div><div class='del'>-	u32 irq_base;</div><div class='ctx'> 	u32 gpio_base;</div><div class='ctx'> 	int retval = 0;</div><div class='add'>+	int ngpio = id-&gt;driver_data;</div><div class='ctx'> </div><div class='ctx'> 	retval = pci_enable_device(pdev);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		goto done;</div><div class='add'>+		return retval;</div><div class='ctx'> </div><div class='ctx'> 	retval = pci_request_regions(pdev, "langwell_gpio");</div><div class='ctx'> 	if (retval) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "error requesting resources\n");</div><div class='ctx'> 		goto err2;</div><div class='ctx'> 	}</div><div class='del'>-	/* get the irq_base from bar1 */</div><div class='add'>+	/* get the gpio_base from bar1 */</div><div class='ctx'> 	start = pci_resource_start(pdev, 1);</div><div class='ctx'> 	len = pci_resource_len(pdev, 1);</div><div class='ctx'> 	base = ioremap_nocache(start, len);</div><div class='hunk'>@@ -324,28 +359,32 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "error mapping bar1\n");</div><div class='ctx'> 		goto err3;</div><div class='ctx'> 	}</div><div class='del'>-	irq_base = *(u32 *)base;</div><div class='ctx'> 	gpio_base = *((u32 *)base + 1);</div><div class='ctx'> 	/* release the IO mapping, since we already get the info from bar1 */</div><div class='ctx'> 	iounmap(base);</div><div class='ctx'> 	/* get the register base from bar0 */</div><div class='ctx'> 	start = pci_resource_start(pdev, 0);</div><div class='ctx'> 	len = pci_resource_len(pdev, 0);</div><div class='del'>-	base = ioremap_nocache(start, len);</div><div class='add'>+	base = devm_ioremap_nocache(&amp;pdev-&gt;dev, start, len);</div><div class='ctx'> 	if (!base) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "error mapping bar0\n");</div><div class='ctx'> 		retval = -EFAULT;</div><div class='ctx'> 		goto err3;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lnw = kzalloc(sizeof(struct lnw_gpio), GFP_KERNEL);</div><div class='add'>+	lnw = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct lnw_gpio), GFP_KERNEL);</div><div class='ctx'> 	if (!lnw) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "can't allocate langwell_gpio chip data\n");</div><div class='ctx'> 		retval = -ENOMEM;</div><div class='del'>-		goto err4;</div><div class='add'>+		goto err3;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	lnw-&gt;domain = irq_domain_add_linear(pdev-&gt;dev.of_node, ngpio,</div><div class='add'>+					    &amp;lnw_gpio_irq_ops, lnw);</div><div class='add'>+	if (!lnw-&gt;domain)</div><div class='add'>+		goto err3;</div><div class='add'>+</div><div class='ctx'> 	lnw-&gt;reg_base = base;</div><div class='del'>-	lnw-&gt;irq_base = irq_base;</div><div class='ctx'> 	lnw-&gt;chip.label = dev_name(&amp;pdev-&gt;dev);</div><div class='ctx'> 	lnw-&gt;chip.request = lnw_gpio_request;</div><div class='ctx'> 	lnw-&gt;chip.direction_input = lnw_gpio_direction_input;</div><div class='hunk'>@@ -354,38 +393,32 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,</div><div class='ctx'> 	lnw-&gt;chip.set = lnw_gpio_set;</div><div class='ctx'> 	lnw-&gt;chip.to_irq = lnw_gpio_to_irq;</div><div class='ctx'> 	lnw-&gt;chip.base = gpio_base;</div><div class='del'>-	lnw-&gt;chip.ngpio = id-&gt;driver_data;</div><div class='add'>+	lnw-&gt;chip.ngpio = ngpio;</div><div class='ctx'> 	lnw-&gt;chip.can_sleep = 0;</div><div class='ctx'> 	lnw-&gt;pdev = pdev;</div><div class='ctx'> 	pci_set_drvdata(pdev, lnw);</div><div class='ctx'> 	retval = gpiochip_add(&amp;lnw-&gt;chip);</div><div class='ctx'> 	if (retval) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "langwell gpiochip_add error %d\n", retval);</div><div class='del'>-		goto err5;</div><div class='add'>+		goto err3;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	lnw_irq_init_hw(lnw);</div><div class='add'>+</div><div class='ctx'> 	irq_set_handler_data(pdev-&gt;irq, lnw);</div><div class='ctx'> 	irq_set_chained_handler(pdev-&gt;irq, lnw_irq_handler);</div><div class='del'>-	for (i = 0; i &lt; lnw-&gt;chip.ngpio; i++) {</div><div class='del'>-		irq_set_chip_and_handler_name(i + lnw-&gt;irq_base, &amp;lnw_irqchip,</div><div class='del'>-					      handle_simple_irq, "demux");</div><div class='del'>-		irq_set_chip_data(i + lnw-&gt;irq_base, lnw);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;lnw-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	pm_runtime_put_noidle(&amp;pdev-&gt;dev);</div><div class='ctx'> 	pm_runtime_allow(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	goto done;</div><div class='del'>-err5:</div><div class='del'>-	kfree(lnw);</div><div class='del'>-err4:</div><div class='del'>-	iounmap(base);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='ctx'> err3:</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> err2:</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='del'>-done:</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-lpc32xx.c b/drivers/gpio/gpio-lpc32xx.c<br/>index 61c2d08d37b6..c2199beca98a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-lpc32xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-lpc32xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-lpc32xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-lpc32xx.c</a></div><div class='hunk'>@@ -21,6 +21,9 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/of_gpio.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;mach/platform.h&gt;</div><div class='hunk'>@@ -454,10 +457,57 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Empty now, can be removed later when mach-lpc32xx is finally switched over</div><div class='add'>+ * to DT support</div><div class='add'>+ */</div><div class='ctx'> void __init lpc32xx_gpio_init(void)</div><div class='ctx'> {</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lpc32xx_of_xlate(struct gpio_chip *gc,</div><div class='add'>+			    const struct of_phandle_args *gpiospec, u32 *flags)</div><div class='add'>+{</div><div class='add'>+	/* Is this the correct bank? */</div><div class='add'>+	u32 bank = gpiospec-&gt;args[0];</div><div class='add'>+	if ((bank &gt; ARRAY_SIZE(lpc32xx_gpiochip) ||</div><div class='add'>+	    (gc != &amp;lpc32xx_gpiochip[bank].chip)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (flags)</div><div class='add'>+		*flags = gpiospec-&gt;args[2];</div><div class='add'>+	return gpiospec-&gt;args[1];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit lpc32xx_gpio_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(lpc32xx_gpiochip); i++)</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(lpc32xx_gpiochip); i++) {</div><div class='add'>+		if (pdev-&gt;dev.of_node) {</div><div class='add'>+			lpc32xx_gpiochip[i].chip.of_xlate = lpc32xx_of_xlate;</div><div class='add'>+			lpc32xx_gpiochip[i].chip.of_gpio_n_cells = 3;</div><div class='add'>+			lpc32xx_gpiochip[i].chip.of_node = pdev-&gt;dev.of_node;</div><div class='add'>+		}</div><div class='ctx'> 		gpiochip_add(&amp;lpc32xx_gpiochip[i].chip);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static struct of_device_id lpc32xx_gpio_of_match[] __devinitdata = {</div><div class='add'>+	{ .compatible = "nxp,lpc3220-gpio", },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static struct platform_driver lpc32xx_gpio_driver = {</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "lpc32xx-gpio",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+		.of_match_table = of_match_ptr(lpc32xx_gpio_of_match),</div><div class='add'>+	},</div><div class='add'>+	.probe		= lpc32xx_gpio_probe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(lpc32xx_gpio_driver);</div><div class='head'>diff --git a/drivers/gpio/gpio-mcp23s08.c b/drivers/gpio/gpio-mcp23s08.c<br/>index c5d83a8a91c2..0f425189de11 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-mcp23s08.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-mcp23s08.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-mcp23s08.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-mcp23s08.c</a></div><div class='hunk'>@@ -353,7 +353,7 @@ static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)</div><div class='ctx'> 			chip-&gt;base + t, bank, t, label,</div><div class='ctx'> 			(mcp-&gt;cache[MCP_IODIR] &amp; mask) ? "in " : "out",</div><div class='ctx'> 			(mcp-&gt;cache[MCP_GPIO] &amp; mask) ? "hi" : "lo",</div><div class='del'>-			(mcp-&gt;cache[MCP_GPPU] &amp; mask) ? "  " : "up");</div><div class='add'>+			(mcp-&gt;cache[MCP_GPPU] &amp; mask) ? "up" : "  ");</div><div class='ctx'> 		/* NOTE:  ignoring the irq-related registers */</div><div class='ctx'> 		seq_printf(s, "\n");</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c<br/>index f0febe5b8221..db01f151d41c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-ml-ioh.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-ml-ioh.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-ml-ioh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-ml-ioh.c</a></div><div class='hunk'>@@ -611,17 +611,7 @@ static struct pci_driver ioh_gpio_driver = {</div><div class='ctx'> 	.resume = ioh_gpio_resume</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init ioh_gpio_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;ioh_gpio_driver);</div><div class='del'>-}</div><div class='del'>-module_init(ioh_gpio_pci_init);</div><div class='del'>-</div><div class='del'>-static void __exit ioh_gpio_pci_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;ioh_gpio_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(ioh_gpio_pci_exit);</div><div class='add'>+module_pci_driver(ioh_gpio_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("OKI SEMICONDUCTOR ML-IOH series GPIO Driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/gpio/gpio-mm-lantiq.c b/drivers/gpio/gpio-mm-lantiq.c<br/>new file mode 100644<br/>index 000000000000..2983dfbd0668<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-mm-lantiq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-mm-lantiq.c</a></div><div class='hunk'>@@ -0,0 +1,158 @@</div><div class='add'>+/*</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_gpio.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;lantiq_soc.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * By attaching hardware latches to the EBU it is possible to create output</div><div class='add'>+ * only gpios. This driver configures a special memory address, which when</div><div class='add'>+ * written to outputs 16 bit to the latches.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define LTQ_EBU_BUSCON	0x1e7ff		/* 16 bit access, slowest timing */</div><div class='add'>+#define LTQ_EBU_WP	0x80000000	/* write protect bit */</div><div class='add'>+</div><div class='add'>+struct ltq_mm {</div><div class='add'>+	struct of_mm_gpio_chip mmchip;</div><div class='add'>+	u16 shadow;	/* shadow the latches state */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ltq_mm_apply() - write the shadow value to the ebu address.</div><div class='add'>+ * @chip:     Pointer to our private data structure.</div><div class='add'>+ *</div><div class='add'>+ * Write the shadow value to the EBU to set the gpios. We need to set the</div><div class='add'>+ * global EBU lock to make sure that PCI/MTD dont break.</div><div class='add'>+ */</div><div class='add'>+static void ltq_mm_apply(struct ltq_mm *chip)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ebu_lock, flags);</div><div class='add'>+	ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1);</div><div class='add'>+	__raw_writew(chip-&gt;shadow, chip-&gt;mmchip.regs);</div><div class='add'>+	ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ebu_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ltq_mm_set() - gpio_chip-&gt;set - set gpios.</div><div class='add'>+ * @gc:     Pointer to gpio_chip device structure.</div><div class='add'>+ * @gpio:   GPIO signal number.</div><div class='add'>+ * @val:    Value to be written to specified signal.</div><div class='add'>+ *</div><div class='add'>+ * Set the shadow value and call ltq_mm_apply.</div><div class='add'>+ */</div><div class='add'>+static void ltq_mm_set(struct gpio_chip *gc, unsigned offset, int value)</div><div class='add'>+{</div><div class='add'>+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='add'>+	struct ltq_mm *chip =</div><div class='add'>+		container_of(mm_gc, struct ltq_mm, mmchip);</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		chip-&gt;shadow |= (1 &lt;&lt; offset);</div><div class='add'>+	else</div><div class='add'>+		chip-&gt;shadow &amp;= ~(1 &lt;&lt; offset);</div><div class='add'>+	ltq_mm_apply(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ltq_mm_dir_out() - gpio_chip-&gt;dir_out - set gpio direction.</div><div class='add'>+ * @gc:     Pointer to gpio_chip device structure.</div><div class='add'>+ * @gpio:   GPIO signal number.</div><div class='add'>+ * @val:    Value to be written to specified signal.</div><div class='add'>+ *</div><div class='add'>+ * Same as ltq_mm_set, always returns 0.</div><div class='add'>+ */</div><div class='add'>+static int ltq_mm_dir_out(struct gpio_chip *gc, unsigned offset, int value)</div><div class='add'>+{</div><div class='add'>+	ltq_mm_set(gc, offset, value);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ltq_mm_save_regs() - Set initial values of GPIO pins</div><div class='add'>+ * @mm_gc: pointer to memory mapped GPIO chip structure</div><div class='add'>+ */</div><div class='add'>+static void ltq_mm_save_regs(struct of_mm_gpio_chip *mm_gc)</div><div class='add'>+{</div><div class='add'>+	struct ltq_mm *chip =</div><div class='add'>+		container_of(mm_gc, struct ltq_mm, mmchip);</div><div class='add'>+</div><div class='add'>+	/* tell the ebu controller which memory address we will be using */</div><div class='add'>+	ltq_ebu_w32(CPHYSADDR(chip-&gt;mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1);</div><div class='add'>+</div><div class='add'>+	ltq_mm_apply(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ltq_mm_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	struct ltq_mm *chip;</div><div class='add'>+	const __be32 *shadow;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to get memory resource\n");</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip = kzalloc(sizeof(*chip), GFP_KERNEL);</div><div class='add'>+	if (!chip)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	chip-&gt;mmchip.gc.ngpio = 16;</div><div class='add'>+	chip-&gt;mmchip.gc.label = "gpio-mm-ltq";</div><div class='add'>+	chip-&gt;mmchip.gc.direction_output = ltq_mm_dir_out;</div><div class='add'>+	chip-&gt;mmchip.gc.set = ltq_mm_set;</div><div class='add'>+	chip-&gt;mmchip.save_regs = ltq_mm_save_regs;</div><div class='add'>+</div><div class='add'>+	/* store the shadow value if one was passed by the devicetree */</div><div class='add'>+	shadow = of_get_property(pdev-&gt;dev.of_node, "lantiq,shadow", NULL);</div><div class='add'>+	if (shadow)</div><div class='add'>+		chip-&gt;shadow = be32_to_cpu(*shadow);</div><div class='add'>+</div><div class='add'>+	ret = of_mm_gpiochip_add(pdev-&gt;dev.of_node, &amp;chip-&gt;mmchip);</div><div class='add'>+	if (ret)</div><div class='add'>+		kfree(chip);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id ltq_mm_match[] = {</div><div class='add'>+	{ .compatible = "lantiq,gpio-mm" },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ltq_mm_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver ltq_mm_driver = {</div><div class='add'>+	.probe = ltq_mm_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "gpio-mm-ltq",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = ltq_mm_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init ltq_mm_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;ltq_mm_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+subsys_initcall(ltq_mm_init);</div><div class='head'>diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c<br/>index e6568c19c939..5a1817eedd1b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-mpc8xxx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-mpc8xxx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-mpc8xxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-mpc8xxx.c</a></div><div class='hunk'>@@ -163,7 +163,8 @@ static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 	if (mask)</div><div class='ctx'> 		generic_handle_irq(irq_linear_revmap(mpc8xxx_gc-&gt;irq,</div><div class='ctx'> 						     32 - ffs(mask)));</div><div class='del'>-	chip-&gt;irq_eoi(&amp;desc-&gt;irq_data);</div><div class='add'>+	if (chip-&gt;irq_eoi)</div><div class='add'>+		chip-&gt;irq_eoi(&amp;desc-&gt;irq_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mpc8xxx_irq_unmask(struct irq_data *d)</div><div class='head'>diff --git a/drivers/gpio/gpio-msic.c b/drivers/gpio/gpio-msic.c<br/>new file mode 100644<br/>index 000000000000..71a838f44501<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-msic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-msic.c</a></div><div class='hunk'>@@ -0,0 +1,339 @@</div><div class='add'>+/*</div><div class='add'>+ * Intel Medfield MSIC GPIO driver&gt;</div><div class='add'>+ * Copyright (c) 2011, Intel Corporation.</div><div class='add'>+ *</div><div class='add'>+ * Author: Mathias Nyman &lt;mathias.nyman@linux.intel.com&gt;</div><div class='add'>+ * Based on intel_pmic_gpio.c</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along with</div><div class='add'>+ * this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mfd/intel_msic.h&gt;</div><div class='add'>+</div><div class='add'>+/* the offset for the mapping of global gpio pin to irq */</div><div class='add'>+#define MSIC_GPIO_IRQ_OFFSET	0x100</div><div class='add'>+</div><div class='add'>+#define MSIC_GPIO_DIR_IN	0</div><div class='add'>+#define MSIC_GPIO_DIR_OUT	BIT(5)</div><div class='add'>+#define MSIC_GPIO_TRIG_FALL	BIT(1)</div><div class='add'>+#define MSIC_GPIO_TRIG_RISE	BIT(2)</div><div class='add'>+</div><div class='add'>+/* masks for msic gpio output GPIOxxxxCTLO registers */</div><div class='add'>+#define MSIC_GPIO_DIR_MASK	BIT(5)</div><div class='add'>+#define MSIC_GPIO_DRV_MASK	BIT(4)</div><div class='add'>+#define MSIC_GPIO_REN_MASK	BIT(3)</div><div class='add'>+#define MSIC_GPIO_RVAL_MASK	(BIT(2) | BIT(1))</div><div class='add'>+#define MSIC_GPIO_DOUT_MASK	BIT(0)</div><div class='add'>+</div><div class='add'>+/* masks for msic gpio input GPIOxxxxCTLI registers */</div><div class='add'>+#define MSIC_GPIO_GLBYP_MASK	BIT(5)</div><div class='add'>+#define MSIC_GPIO_DBNC_MASK	(BIT(4) | BIT(3))</div><div class='add'>+#define MSIC_GPIO_INTCNT_MASK	(BIT(2) | BIT(1))</div><div class='add'>+#define MSIC_GPIO_DIN_MASK	BIT(0)</div><div class='add'>+</div><div class='add'>+#define MSIC_NUM_GPIO		24</div><div class='add'>+</div><div class='add'>+struct msic_gpio {</div><div class='add'>+	struct platform_device	*pdev;</div><div class='add'>+	struct mutex		buslock;</div><div class='add'>+	struct gpio_chip	chip;</div><div class='add'>+	int			irq;</div><div class='add'>+	unsigned		irq_base;</div><div class='add'>+	unsigned long		trig_change_mask;</div><div class='add'>+	unsigned		trig_type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * MSIC has 24 gpios, 16 low voltage (1.2-1.8v) and 8 high voltage (3v).</div><div class='add'>+ * Both the high and low voltage gpios are divided in two banks.</div><div class='add'>+ * GPIOs are numbered with GPIO0LV0 as gpio_base in the following order:</div><div class='add'>+ * GPIO0LV0..GPIO0LV7: low voltage, bank 0, gpio_base</div><div class='add'>+ * GPIO1LV0..GPIO1LV7: low voltage, bank 1,  gpio_base + 8</div><div class='add'>+ * GPIO0HV0..GPIO0HV3: high voltage, bank 0, gpio_base + 16</div><div class='add'>+ * GPIO1HV0..GPIO1HV3: high voltage, bank 1, gpio_base + 20</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int msic_gpio_to_ireg(unsigned offset)</div><div class='add'>+{</div><div class='add'>+	if (offset &gt;= MSIC_NUM_GPIO)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (offset &lt; 8)</div><div class='add'>+		return INTEL_MSIC_GPIO0LV0CTLI - offset;</div><div class='add'>+	if (offset &lt; 16)</div><div class='add'>+		return INTEL_MSIC_GPIO1LV0CTLI - offset + 8;</div><div class='add'>+	if (offset &lt; 20)</div><div class='add'>+		return INTEL_MSIC_GPIO0HV0CTLI - offset + 16;</div><div class='add'>+</div><div class='add'>+	return INTEL_MSIC_GPIO1HV0CTLI - offset + 20;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int msic_gpio_to_oreg(unsigned offset)</div><div class='add'>+{</div><div class='add'>+	if (offset &gt;= MSIC_NUM_GPIO)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (offset &lt; 8)</div><div class='add'>+		return INTEL_MSIC_GPIO0LV0CTLO - offset;</div><div class='add'>+	if (offset &lt; 16)</div><div class='add'>+		return INTEL_MSIC_GPIO1LV0CTLO - offset + 8;</div><div class='add'>+	if (offset &lt; 20)</div><div class='add'>+		return INTEL_MSIC_GPIO0HV0CTLO - offset + 16;</div><div class='add'>+</div><div class='add'>+	return INTEL_MSIC_GPIO1HV0CTLO + offset + 20;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int msic_gpio_direction_input(struct gpio_chip *chip, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	reg = msic_gpio_to_oreg(offset);</div><div class='add'>+	if (reg &lt; 0)</div><div class='add'>+		return reg;</div><div class='add'>+</div><div class='add'>+	return intel_msic_reg_update(reg, MSIC_GPIO_DIR_IN, MSIC_GPIO_DIR_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int msic_gpio_direction_output(struct gpio_chip *chip,</div><div class='add'>+			unsigned offset, int value)</div><div class='add'>+{</div><div class='add'>+	int reg;</div><div class='add'>+	unsigned mask;</div><div class='add'>+</div><div class='add'>+	value = (!!value) | MSIC_GPIO_DIR_OUT;</div><div class='add'>+	mask = MSIC_GPIO_DIR_MASK | MSIC_GPIO_DOUT_MASK;</div><div class='add'>+</div><div class='add'>+	reg = msic_gpio_to_oreg(offset);</div><div class='add'>+	if (reg &lt; 0)</div><div class='add'>+		return reg;</div><div class='add'>+</div><div class='add'>+	return intel_msic_reg_update(reg, value, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int msic_gpio_get(struct gpio_chip *chip, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	u8 r;</div><div class='add'>+	int ret;</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	reg = msic_gpio_to_ireg(offset);</div><div class='add'>+	if (reg &lt; 0)</div><div class='add'>+		return reg;</div><div class='add'>+</div><div class='add'>+	ret = intel_msic_reg_read(reg, &amp;r);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return r &amp; MSIC_GPIO_DIN_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void msic_gpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+{</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	reg = msic_gpio_to_oreg(offset);</div><div class='add'>+	if (reg &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	intel_msic_reg_update(reg, !!value , MSIC_GPIO_DOUT_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is called from genirq with mg-&gt;buslock locked and</div><div class='add'>+ * irq_desc-&gt;lock held. We can not access the scu bus here, so we</div><div class='add'>+ * store the change and update in the bus_sync_unlock() function below</div><div class='add'>+ */</div><div class='add'>+static int msic_irq_type(struct irq_data *data, unsigned type)</div><div class='add'>+{</div><div class='add'>+	struct msic_gpio *mg = irq_data_get_irq_chip_data(data);</div><div class='add'>+	u32 gpio = data-&gt;irq - mg-&gt;irq_base;</div><div class='add'>+</div><div class='add'>+	if (gpio &gt;= mg-&gt;chip.ngpio)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* mark for which gpio the trigger changed, protected by buslock */</div><div class='add'>+	mg-&gt;trig_change_mask |= (1 &lt;&lt; gpio);</div><div class='add'>+	mg-&gt;trig_type = type;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int msic_gpio_to_irq(struct gpio_chip *chip, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	struct msic_gpio *mg = container_of(chip, struct msic_gpio, chip);</div><div class='add'>+	return mg-&gt;irq_base + offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void msic_bus_lock(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	struct msic_gpio *mg = irq_data_get_irq_chip_data(data);</div><div class='add'>+	mutex_lock(&amp;mg-&gt;buslock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void msic_bus_sync_unlock(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	struct msic_gpio *mg = irq_data_get_irq_chip_data(data);</div><div class='add'>+	int offset;</div><div class='add'>+	int reg;</div><div class='add'>+	u8 trig = 0;</div><div class='add'>+</div><div class='add'>+	/* We can only get one change at a time as the buslock covers the</div><div class='add'>+	   entire transaction. The irq_desc-&gt;lock is dropped before we are</div><div class='add'>+	   called but that is fine */</div><div class='add'>+	if (mg-&gt;trig_change_mask) {</div><div class='add'>+		offset = __ffs(mg-&gt;trig_change_mask);</div><div class='add'>+</div><div class='add'>+		reg = msic_gpio_to_ireg(offset);</div><div class='add'>+		if (reg &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		if (mg-&gt;trig_type &amp; IRQ_TYPE_EDGE_RISING)</div><div class='add'>+			trig |= MSIC_GPIO_TRIG_RISE;</div><div class='add'>+		if (mg-&gt;trig_type &amp; IRQ_TYPE_EDGE_FALLING)</div><div class='add'>+			trig |= MSIC_GPIO_TRIG_FALL;</div><div class='add'>+</div><div class='add'>+		intel_msic_reg_update(reg, trig, MSIC_GPIO_INTCNT_MASK);</div><div class='add'>+		mg-&gt;trig_change_mask = 0;</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;mg-&gt;buslock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Firmware does all the masking and unmasking for us, no masking here. */</div><div class='add'>+static void msic_irq_unmask(struct irq_data *data) { }</div><div class='add'>+</div><div class='add'>+static void msic_irq_mask(struct irq_data *data) { }</div><div class='add'>+</div><div class='add'>+static struct irq_chip msic_irqchip = {</div><div class='add'>+	.name			= "MSIC-GPIO",</div><div class='add'>+	.irq_mask		= msic_irq_mask,</div><div class='add'>+	.irq_unmask		= msic_irq_unmask,</div><div class='add'>+	.irq_set_type		= msic_irq_type,</div><div class='add'>+	.irq_bus_lock		= msic_bus_lock,</div><div class='add'>+	.irq_bus_sync_unlock	= msic_bus_sync_unlock,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void msic_gpio_irq_handler(unsigned irq, struct irq_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct irq_data *data = irq_desc_get_irq_data(desc);</div><div class='add'>+	struct msic_gpio *mg = irq_data_get_irq_handler_data(data);</div><div class='add'>+	struct irq_chip *chip = irq_data_get_irq_chip(data);</div><div class='add'>+	struct intel_msic *msic = pdev_to_intel_msic(mg-&gt;pdev);</div><div class='add'>+	int i;</div><div class='add'>+	int bitnr;</div><div class='add'>+	u8 pin;</div><div class='add'>+	unsigned long pending = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; (mg-&gt;chip.ngpio / BITS_PER_BYTE); i++) {</div><div class='add'>+		intel_msic_irq_read(msic, INTEL_MSIC_GPIO0LVIRQ + i, &amp;pin);</div><div class='add'>+		pending = pin;</div><div class='add'>+</div><div class='add'>+		if (pending) {</div><div class='add'>+			for_each_set_bit(bitnr, &amp;pending, BITS_PER_BYTE)</div><div class='add'>+				generic_handle_irq(mg-&gt;irq_base +</div><div class='add'>+						   (i * BITS_PER_BYTE) + bitnr);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	chip-&gt;irq_eoi(data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit platform_msic_gpio_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct intel_msic_gpio_pdata *pdata = dev-&gt;platform_data;</div><div class='add'>+	struct msic_gpio *mg;</div><div class='add'>+	int irq = platform_get_irq(pdev, 0);</div><div class='add'>+	int retval;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (irq &lt; 0) {</div><div class='add'>+		dev_err(dev, "no IRQ line\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pdata || !pdata-&gt;gpio_base) {</div><div class='add'>+		dev_err(dev, "incorrect or missing platform data\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mg = kzalloc(sizeof(*mg), GFP_KERNEL);</div><div class='add'>+	if (!mg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(dev, mg);</div><div class='add'>+</div><div class='add'>+	mg-&gt;pdev = pdev;</div><div class='add'>+	mg-&gt;irq = irq;</div><div class='add'>+	mg-&gt;irq_base = pdata-&gt;gpio_base + MSIC_GPIO_IRQ_OFFSET;</div><div class='add'>+	mg-&gt;chip.label = "msic_gpio";</div><div class='add'>+	mg-&gt;chip.direction_input = msic_gpio_direction_input;</div><div class='add'>+	mg-&gt;chip.direction_output = msic_gpio_direction_output;</div><div class='add'>+	mg-&gt;chip.get = msic_gpio_get;</div><div class='add'>+	mg-&gt;chip.set = msic_gpio_set;</div><div class='add'>+	mg-&gt;chip.to_irq = msic_gpio_to_irq;</div><div class='add'>+	mg-&gt;chip.base = pdata-&gt;gpio_base;</div><div class='add'>+	mg-&gt;chip.ngpio = MSIC_NUM_GPIO;</div><div class='add'>+	mg-&gt;chip.can_sleep = 1;</div><div class='add'>+	mg-&gt;chip.dev = dev;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;mg-&gt;buslock);</div><div class='add'>+</div><div class='add'>+	retval = gpiochip_add(&amp;mg-&gt;chip);</div><div class='add'>+	if (retval) {</div><div class='add'>+		dev_err(dev, "Adding MSIC gpio chip failed\n");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; mg-&gt;chip.ngpio; i++) {</div><div class='add'>+		irq_set_chip_data(i + mg-&gt;irq_base, mg);</div><div class='add'>+		irq_set_chip_and_handler_name(i + mg-&gt;irq_base,</div><div class='add'>+					      &amp;msic_irqchip,</div><div class='add'>+					      handle_simple_irq,</div><div class='add'>+					      "demux");</div><div class='add'>+	}</div><div class='add'>+	irq_set_chained_handler(mg-&gt;irq, msic_gpio_irq_handler);</div><div class='add'>+	irq_set_handler_data(mg-&gt;irq, mg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	kfree(mg);</div><div class='add'>+	return retval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver platform_msic_gpio_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name		= "msic_gpio",</div><div class='add'>+		.owner		= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe		= platform_msic_gpio_probe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init platform_msic_gpio_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;platform_msic_gpio_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+subsys_initcall(platform_msic_gpio_init);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Mathias Nyman &lt;mathias.nyman@linux.intel.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Intel Medfield MSIC GPIO driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c<br/>index e79147634573..c337143b18f8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-mxc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-mxc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-mxc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-mxc.c</a></div><div class='hunk'>@@ -417,7 +417,7 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	err = bgpio_init(&amp;port-&gt;bgc, &amp;pdev-&gt;dev, 4,</div><div class='ctx'> 			 port-&gt;base + GPIO_PSR,</div><div class='ctx'> 			 port-&gt;base + GPIO_DR, NULL,</div><div class='del'>-			 port-&gt;base + GPIO_GDIR, NULL, false);</div><div class='add'>+			 port-&gt;base + GPIO_GDIR, NULL, 0);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_iounmap;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c<br/>index 385c58e8405b..39e495669961 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-mxs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-mxs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-mxs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-mxs.c</a></div><div class='hunk'>@@ -25,23 +25,25 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/basic_mmio_gpio.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;mach/mxs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define MXS_SET		0x4</div><div class='ctx'> #define MXS_CLR		0x8</div><div class='ctx'> </div><div class='del'>-#define PINCTRL_DOUT(n)		((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10)</div><div class='del'>-#define PINCTRL_DIN(n)		((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10)</div><div class='del'>-#define PINCTRL_DOE(n)		((cpu_is_mx23() ? 0x0700 : 0x0b00) + (n) * 0x10)</div><div class='del'>-#define PINCTRL_PIN2IRQ(n)	((cpu_is_mx23() ? 0x0800 : 0x1000) + (n) * 0x10)</div><div class='del'>-#define PINCTRL_IRQEN(n)	((cpu_is_mx23() ? 0x0900 : 0x1100) + (n) * 0x10)</div><div class='del'>-#define PINCTRL_IRQLEV(n)	((cpu_is_mx23() ? 0x0a00 : 0x1200) + (n) * 0x10)</div><div class='del'>-#define PINCTRL_IRQPOL(n)	((cpu_is_mx23() ? 0x0b00 : 0x1300) + (n) * 0x10)</div><div class='del'>-#define PINCTRL_IRQSTAT(n)	((cpu_is_mx23() ? 0x0c00 : 0x1400) + (n) * 0x10)</div><div class='add'>+#define PINCTRL_DOUT(p)		((is_imx23_gpio(p) ? 0x0500 : 0x0700) + (p-&gt;id) * 0x10)</div><div class='add'>+#define PINCTRL_DIN(p)		((is_imx23_gpio(p) ? 0x0600 : 0x0900) + (p-&gt;id) * 0x10)</div><div class='add'>+#define PINCTRL_DOE(p)		((is_imx23_gpio(p) ? 0x0700 : 0x0b00) + (p-&gt;id) * 0x10)</div><div class='add'>+#define PINCTRL_PIN2IRQ(p)	((is_imx23_gpio(p) ? 0x0800 : 0x1000) + (p-&gt;id) * 0x10)</div><div class='add'>+#define PINCTRL_IRQEN(p)	((is_imx23_gpio(p) ? 0x0900 : 0x1100) + (p-&gt;id) * 0x10)</div><div class='add'>+#define PINCTRL_IRQLEV(p)	((is_imx23_gpio(p) ? 0x0a00 : 0x1200) + (p-&gt;id) * 0x10)</div><div class='add'>+#define PINCTRL_IRQPOL(p)	((is_imx23_gpio(p) ? 0x0b00 : 0x1300) + (p-&gt;id) * 0x10)</div><div class='add'>+#define PINCTRL_IRQSTAT(p)	((is_imx23_gpio(p) ? 0x0c00 : 0x1400) + (p-&gt;id) * 0x10)</div><div class='ctx'> </div><div class='ctx'> #define GPIO_INT_FALL_EDGE	0x0</div><div class='ctx'> #define GPIO_INT_LOW_LEV	0x1</div><div class='hunk'>@@ -52,14 +54,30 @@</div><div class='ctx'> </div><div class='ctx'> #define irq_to_gpio(irq)	((irq) - MXS_GPIO_IRQ_START)</div><div class='ctx'> </div><div class='add'>+enum mxs_gpio_id {</div><div class='add'>+	IMX23_GPIO,</div><div class='add'>+	IMX28_GPIO,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mxs_gpio_port {</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> 	int id;</div><div class='ctx'> 	int irq;</div><div class='ctx'> 	int virtual_irq_start;</div><div class='ctx'> 	struct bgpio_chip bgc;</div><div class='add'>+	enum mxs_gpio_id devid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static inline int is_imx23_gpio(struct mxs_gpio_port *port)</div><div class='add'>+{</div><div class='add'>+	return port-&gt;devid == IMX23_GPIO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is_imx28_gpio(struct mxs_gpio_port *port)</div><div class='add'>+{</div><div class='add'>+	return port-&gt;devid == IMX28_GPIO;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Note: This driver assumes 32 GPIOs are handled in one register */</div><div class='ctx'> </div><div class='ctx'> static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)</div><div class='hunk'>@@ -89,21 +107,21 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* set level or edge */</div><div class='del'>-	pin_addr = port-&gt;base + PINCTRL_IRQLEV(port-&gt;id);</div><div class='add'>+	pin_addr = port-&gt;base + PINCTRL_IRQLEV(port);</div><div class='ctx'> 	if (edge &amp; GPIO_INT_LEV_MASK)</div><div class='ctx'> 		writel(pin_mask, pin_addr + MXS_SET);</div><div class='ctx'> 	else</div><div class='ctx'> 		writel(pin_mask, pin_addr + MXS_CLR);</div><div class='ctx'> </div><div class='ctx'> 	/* set polarity */</div><div class='del'>-	pin_addr = port-&gt;base + PINCTRL_IRQPOL(port-&gt;id);</div><div class='add'>+	pin_addr = port-&gt;base + PINCTRL_IRQPOL(port);</div><div class='ctx'> 	if (edge &amp; GPIO_INT_POL_MASK)</div><div class='ctx'> 		writel(pin_mask, pin_addr + MXS_SET);</div><div class='ctx'> 	else</div><div class='ctx'> 		writel(pin_mask, pin_addr + MXS_CLR);</div><div class='ctx'> </div><div class='ctx'> 	writel(1 &lt;&lt; (gpio &amp; 0x1f),</div><div class='del'>-	       port-&gt;base + PINCTRL_IRQSTAT(port-&gt;id) + MXS_CLR);</div><div class='add'>+	       port-&gt;base + PINCTRL_IRQSTAT(port) + MXS_CLR);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -117,8 +135,8 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)</div><div class='ctx'> </div><div class='ctx'> 	desc-&gt;irq_data.chip-&gt;irq_ack(&amp;desc-&gt;irq_data);</div><div class='ctx'> </div><div class='del'>-	irq_stat = readl(port-&gt;base + PINCTRL_IRQSTAT(port-&gt;id)) &amp;</div><div class='del'>-			readl(port-&gt;base + PINCTRL_IRQEN(port-&gt;id));</div><div class='add'>+	irq_stat = readl(port-&gt;base + PINCTRL_IRQSTAT(port)) &amp;</div><div class='add'>+			readl(port-&gt;base + PINCTRL_IRQEN(port));</div><div class='ctx'> </div><div class='ctx'> 	while (irq_stat != 0) {</div><div class='ctx'> 		int irqoffset = fls(irq_stat) - 1;</div><div class='hunk'>@@ -164,8 +182,8 @@ static void __init mxs_gpio_init_gc(struct mxs_gpio_port *port)</div><div class='ctx'> 	ct-&gt;chip.irq_unmask = irq_gc_mask_set_bit;</div><div class='ctx'> 	ct-&gt;chip.irq_set_type = mxs_gpio_set_irq_type;</div><div class='ctx'> 	ct-&gt;chip.irq_set_wake = mxs_gpio_set_wake_irq;</div><div class='del'>-	ct-&gt;regs.ack = PINCTRL_IRQSTAT(port-&gt;id) + MXS_CLR;</div><div class='del'>-	ct-&gt;regs.mask = PINCTRL_IRQEN(port-&gt;id);</div><div class='add'>+	ct-&gt;regs.ack = PINCTRL_IRQSTAT(port) + MXS_CLR;</div><div class='add'>+	ct-&gt;regs.mask = PINCTRL_IRQEN(port);</div><div class='ctx'> </div><div class='ctx'> 	irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0);</div><div class='ctx'> }</div><div class='hunk'>@@ -179,60 +197,83 @@ static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset)</div><div class='ctx'> 	return port-&gt;virtual_irq_start + offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct platform_device_id mxs_gpio_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "imx23-gpio",</div><div class='add'>+		.driver_data = IMX23_GPIO,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "imx28-gpio",</div><div class='add'>+		.driver_data = IMX28_GPIO,</div><div class='add'>+	}, {</div><div class='add'>+		/* sentinel */</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(platform, mxs_gpio_ids);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mxs_gpio_dt_ids[] = {</div><div class='add'>+	{ .compatible = "fsl,imx23-gpio", .data = (void *) IMX23_GPIO, },</div><div class='add'>+	{ .compatible = "fsl,imx28-gpio", .data = (void *) IMX28_GPIO, },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, mxs_gpio_dt_ids);</div><div class='add'>+</div><div class='ctx'> static int __devinit mxs_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	const struct of_device_id *of_id =</div><div class='add'>+			of_match_device(mxs_gpio_dt_ids, &amp;pdev-&gt;dev);</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct device_node *parent;</div><div class='ctx'> 	static void __iomem *base;</div><div class='ctx'> 	struct mxs_gpio_port *port;</div><div class='ctx'> 	struct resource *iores = NULL;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	port = kzalloc(sizeof(struct mxs_gpio_port), GFP_KERNEL);</div><div class='add'>+	port = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*port), GFP_KERNEL);</div><div class='ctx'> 	if (!port)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	port-&gt;id = pdev-&gt;id;</div><div class='add'>+	if (np) {</div><div class='add'>+		port-&gt;id = of_alias_get_id(np, "gpio");</div><div class='add'>+		if (port-&gt;id &lt; 0)</div><div class='add'>+			return port-&gt;id;</div><div class='add'>+		port-&gt;devid = (enum mxs_gpio_id) of_id-&gt;data;</div><div class='add'>+	} else {</div><div class='add'>+		port-&gt;id = pdev-&gt;id;</div><div class='add'>+		port-&gt;devid = pdev-&gt;id_entry-&gt;driver_data;</div><div class='add'>+	}</div><div class='ctx'> 	port-&gt;virtual_irq_start = MXS_GPIO_IRQ_START + port-&gt;id * 32;</div><div class='ctx'> </div><div class='add'>+	port-&gt;irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (port-&gt;irq &lt; 0)</div><div class='add'>+		return port-&gt;irq;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * map memory region only once, as all the gpio ports</div><div class='ctx'> 	 * share the same one</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!base) {</div><div class='del'>-		iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-		if (!iores) {</div><div class='del'>-			err = -ENODEV;</div><div class='del'>-			goto out_kfree;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (!request_mem_region(iores-&gt;start, resource_size(iores),</div><div class='del'>-					pdev-&gt;name)) {</div><div class='del'>-			err = -EBUSY;</div><div class='del'>-			goto out_kfree;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		base = ioremap(iores-&gt;start, resource_size(iores));</div><div class='del'>-		if (!base) {</div><div class='del'>-			err = -ENOMEM;</div><div class='del'>-			goto out_release_mem;</div><div class='add'>+		if (np) {</div><div class='add'>+			parent = of_get_parent(np);</div><div class='add'>+			base = of_iomap(parent, 0);</div><div class='add'>+			of_node_put(parent);</div><div class='add'>+		} else {</div><div class='add'>+			iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+			base = devm_request_and_ioremap(&amp;pdev-&gt;dev, iores);</div><div class='ctx'> 		}</div><div class='add'>+		if (!base)</div><div class='add'>+			return -EADDRNOTAVAIL;</div><div class='ctx'> 	}</div><div class='ctx'> 	port-&gt;base = base;</div><div class='ctx'> </div><div class='del'>-	port-&gt;irq = platform_get_irq(pdev, 0);</div><div class='del'>-	if (port-&gt;irq &lt; 0) {</div><div class='del'>-		err = -EINVAL;</div><div class='del'>-		goto out_iounmap;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * select the pin interrupt functionality but initially</div><div class='ctx'> 	 * disable the interrupts</div><div class='ctx'> 	 */</div><div class='del'>-	writel(~0U, port-&gt;base + PINCTRL_PIN2IRQ(port-&gt;id));</div><div class='del'>-	writel(0, port-&gt;base + PINCTRL_IRQEN(port-&gt;id));</div><div class='add'>+	writel(~0U, port-&gt;base + PINCTRL_PIN2IRQ(port));</div><div class='add'>+	writel(0, port-&gt;base + PINCTRL_IRQEN(port));</div><div class='ctx'> </div><div class='ctx'> 	/* clear address has to be used to clear IRQSTAT bits */</div><div class='del'>-	writel(~0U, port-&gt;base + PINCTRL_IRQSTAT(port-&gt;id) + MXS_CLR);</div><div class='add'>+	writel(~0U, port-&gt;base + PINCTRL_IRQSTAT(port) + MXS_CLR);</div><div class='ctx'> </div><div class='ctx'> 	/* gpio-mxs can be a generic irq chip */</div><div class='ctx'> 	mxs_gpio_init_gc(port);</div><div class='hunk'>@@ -242,41 +283,32 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	irq_set_handler_data(port-&gt;irq, port);</div><div class='ctx'> </div><div class='ctx'> 	err = bgpio_init(&amp;port-&gt;bgc, &amp;pdev-&gt;dev, 4,</div><div class='del'>-			 port-&gt;base + PINCTRL_DIN(port-&gt;id),</div><div class='del'>-			 port-&gt;base + PINCTRL_DOUT(port-&gt;id), NULL,</div><div class='del'>-			 port-&gt;base + PINCTRL_DOE(port-&gt;id), NULL, false);</div><div class='add'>+			 port-&gt;base + PINCTRL_DIN(port),</div><div class='add'>+			 port-&gt;base + PINCTRL_DOUT(port), NULL,</div><div class='add'>+			 port-&gt;base + PINCTRL_DOE(port), NULL, 0);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto out_iounmap;</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	port-&gt;bgc.gc.to_irq = mxs_gpio_to_irq;</div><div class='ctx'> 	port-&gt;bgc.gc.base = port-&gt;id * 32;</div><div class='ctx'> </div><div class='ctx'> 	err = gpiochip_add(&amp;port-&gt;bgc.gc);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_bgpio_remove;</div><div class='add'>+	if (err) {</div><div class='add'>+		bgpio_remove(&amp;port-&gt;bgc);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-out_bgpio_remove:</div><div class='del'>-	bgpio_remove(&amp;port-&gt;bgc);</div><div class='del'>-out_iounmap:</div><div class='del'>-	if (iores)</div><div class='del'>-		iounmap(port-&gt;base);</div><div class='del'>-out_release_mem:</div><div class='del'>-	if (iores)</div><div class='del'>-		release_mem_region(iores-&gt;start, resource_size(iores));</div><div class='del'>-out_kfree:</div><div class='del'>-	kfree(port);</div><div class='del'>-	dev_info(&amp;pdev-&gt;dev, "%s failed with errno %d\n", __func__, err);</div><div class='del'>-	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver mxs_gpio_driver = {</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "gpio-mxs",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='add'>+		.of_match_table = mxs_gpio_dt_ids,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= mxs_gpio_probe,</div><div class='add'>+	.id_table	= mxs_gpio_ids,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init mxs_gpio_init(void)</div><div class='head'>diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c<br/>index 1adc2ec1e383..c4ed1722734c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-omap.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-omap.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-omap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-omap.c</a></div><div class='hunk'>@@ -57,14 +57,10 @@ struct gpio_bank {</div><div class='ctx'> 	u16 irq;</div><div class='ctx'> 	int irq_base;</div><div class='ctx'> 	struct irq_domain *domain;</div><div class='del'>-	u32 suspend_wakeup;</div><div class='del'>-	u32 saved_wakeup;</div><div class='ctx'> 	u32 non_wakeup_gpios;</div><div class='ctx'> 	u32 enabled_non_wakeup_gpios;</div><div class='ctx'> 	struct gpio_regs context;</div><div class='ctx'> 	u32 saved_datain;</div><div class='del'>-	u32 saved_fallingdetect;</div><div class='del'>-	u32 saved_risingdetect;</div><div class='ctx'> 	u32 level_mask;</div><div class='ctx'> 	u32 toggle_mask;</div><div class='ctx'> 	spinlock_t lock;</div><div class='hunk'>@@ -516,11 +512,11 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;bank-&gt;lock, flags);</div><div class='ctx'> 	if (enable)</div><div class='del'>-		bank-&gt;suspend_wakeup |= gpio_bit;</div><div class='add'>+		bank-&gt;context.wake_en |= gpio_bit;</div><div class='ctx'> 	else</div><div class='del'>-		bank-&gt;suspend_wakeup &amp;= ~gpio_bit;</div><div class='add'>+		bank-&gt;context.wake_en &amp;= ~gpio_bit;</div><div class='ctx'> </div><div class='del'>-	__raw_writel(bank-&gt;suspend_wakeup, bank-&gt;base + bank-&gt;regs-&gt;wkup_en);</div><div class='add'>+	__raw_writel(bank-&gt;context.wake_en, bank-&gt;base + bank-&gt;regs-&gt;wkup_en);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bank-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -640,7 +636,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 	u32 isr;</div><div class='ctx'> 	unsigned int gpio_irq, gpio_index;</div><div class='ctx'> 	struct gpio_bank *bank;</div><div class='del'>-	u32 retrigger = 0;</div><div class='ctx'> 	int unmasked = 0;</div><div class='ctx'> 	struct irq_chip *chip = irq_desc_get_chip(desc);</div><div class='ctx'> </div><div class='hunk'>@@ -677,8 +672,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)</div><div class='ctx'> 			chained_irq_exit(chip, desc);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		isr |= retrigger;</div><div class='del'>-		retrigger = 0;</div><div class='ctx'> 		if (!isr)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -789,8 +782,7 @@ static int omap_mpuio_suspend_noirq(struct device *dev)</div><div class='ctx'> 	unsigned long		flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;bank-&gt;lock, flags);</div><div class='del'>-	bank-&gt;saved_wakeup = __raw_readl(mask_reg);</div><div class='del'>-	__raw_writel(0xffff &amp; ~bank-&gt;suspend_wakeup, mask_reg);</div><div class='add'>+	__raw_writel(0xffff &amp; ~bank-&gt;context.wake_en, mask_reg);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bank-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -805,7 +797,7 @@ static int omap_mpuio_resume_noirq(struct device *dev)</div><div class='ctx'> 	unsigned long		flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;bank-&gt;lock, flags);</div><div class='del'>-	__raw_writel(bank-&gt;saved_wakeup, mask_reg);</div><div class='add'>+	__raw_writel(bank-&gt;context.wake_en, mask_reg);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bank-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -965,18 +957,15 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	_gpio_rmw(base, bank-&gt;regs-&gt;irqenable, l, bank-&gt;regs-&gt;irqenable_inv);</div><div class='del'>-	_gpio_rmw(base, bank-&gt;regs-&gt;irqstatus, l,</div><div class='del'>-					bank-&gt;regs-&gt;irqenable_inv == false);</div><div class='del'>-	_gpio_rmw(base, bank-&gt;regs-&gt;irqenable, l, bank-&gt;regs-&gt;debounce_en != 0);</div><div class='del'>-	_gpio_rmw(base, bank-&gt;regs-&gt;irqenable, l, bank-&gt;regs-&gt;ctrl != 0);</div><div class='add'>+	_gpio_rmw(base, bank-&gt;regs-&gt;irqstatus, l, !bank-&gt;regs-&gt;irqenable_inv);</div><div class='ctx'> 	if (bank-&gt;regs-&gt;debounce_en)</div><div class='del'>-		_gpio_rmw(base, bank-&gt;regs-&gt;debounce_en, 0, 1);</div><div class='add'>+		__raw_writel(0, base + bank-&gt;regs-&gt;debounce_en);</div><div class='ctx'> </div><div class='ctx'> 	/* Save OE default value (0xffffffff) in the context */</div><div class='ctx'> 	bank-&gt;context.oe = __raw_readl(bank-&gt;base + bank-&gt;regs-&gt;direction);</div><div class='ctx'> 	 /* Initialize interface clk ungated, module enabled */</div><div class='ctx'> 	if (bank-&gt;regs-&gt;ctrl)</div><div class='del'>-		_gpio_rmw(base, bank-&gt;regs-&gt;ctrl, 0, 1);</div><div class='add'>+		__raw_writel(0, base + bank-&gt;regs-&gt;ctrl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __devinit void</div><div class='hunk'>@@ -1155,54 +1144,6 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_OMAP2PLUS</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_PM_SLEEP)</div><div class='del'>-static int omap_gpio_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct platform_device *pdev = to_platform_device(dev);</div><div class='del'>-	struct gpio_bank *bank = platform_get_drvdata(pdev);</div><div class='del'>-	void __iomem *base = bank-&gt;base;</div><div class='del'>-	void __iomem *wakeup_enable;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (!bank-&gt;mod_usage || !bank-&gt;loses_context)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (!bank-&gt;regs-&gt;wkup_en || !bank-&gt;suspend_wakeup)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	wakeup_enable = bank-&gt;base + bank-&gt;regs-&gt;wkup_en;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;bank-&gt;lock, flags);</div><div class='del'>-	bank-&gt;saved_wakeup = __raw_readl(wakeup_enable);</div><div class='del'>-	_gpio_rmw(base, bank-&gt;regs-&gt;wkup_en, 0xffffffff, 0);</div><div class='del'>-	_gpio_rmw(base, bank-&gt;regs-&gt;wkup_en, bank-&gt;suspend_wakeup, 1);</div><div class='del'>-	spin_unlock_irqrestore(&amp;bank-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int omap_gpio_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct platform_device *pdev = to_platform_device(dev);</div><div class='del'>-	struct gpio_bank *bank = platform_get_drvdata(pdev);</div><div class='del'>-	void __iomem *base = bank-&gt;base;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (!bank-&gt;mod_usage || !bank-&gt;loses_context)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (!bank-&gt;regs-&gt;wkup_en || !bank-&gt;saved_wakeup)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;bank-&gt;lock, flags);</div><div class='del'>-	_gpio_rmw(base, bank-&gt;regs-&gt;wkup_en, 0xffffffff, 0);</div><div class='del'>-	_gpio_rmw(base, bank-&gt;regs-&gt;wkup_en, bank-&gt;saved_wakeup, 1);</div><div class='del'>-	spin_unlock_irqrestore(&amp;bank-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_PM_SLEEP */</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_PM_RUNTIME)</div><div class='ctx'> static void omap_gpio_restore_context(struct gpio_bank *bank);</div><div class='ctx'> </div><div class='hunk'>@@ -1236,6 +1177,9 @@ static int omap_gpio_runtime_suspend(struct device *dev)</div><div class='ctx'> 		__raw_writel(wake_hi | bank-&gt;context.risingdetect,</div><div class='ctx'> 			     bank-&gt;base + bank-&gt;regs-&gt;risingdetect);</div><div class='ctx'> </div><div class='add'>+	if (!bank-&gt;enabled_non_wakeup_gpios)</div><div class='add'>+		goto update_gpio_context_count;</div><div class='add'>+</div><div class='ctx'> 	if (bank-&gt;power_mode != OFF_MODE) {</div><div class='ctx'> 		bank-&gt;power_mode = 0;</div><div class='ctx'> 		goto update_gpio_context_count;</div><div class='hunk'>@@ -1247,11 +1191,9 @@ static int omap_gpio_runtime_suspend(struct device *dev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	bank-&gt;saved_datain = __raw_readl(bank-&gt;base +</div><div class='ctx'> 						bank-&gt;regs-&gt;datain);</div><div class='del'>-	l1 = __raw_readl(bank-&gt;base + bank-&gt;regs-&gt;fallingdetect);</div><div class='del'>-	l2 = __raw_readl(bank-&gt;base + bank-&gt;regs-&gt;risingdetect);</div><div class='add'>+	l1 = bank-&gt;context.fallingdetect;</div><div class='add'>+	l2 = bank-&gt;context.risingdetect;</div><div class='ctx'> </div><div class='del'>-	bank-&gt;saved_fallingdetect = l1;</div><div class='del'>-	bank-&gt;saved_risingdetect = l2;</div><div class='ctx'> 	l1 &amp;= ~bank-&gt;enabled_non_wakeup_gpios;</div><div class='ctx'> 	l2 &amp;= ~bank-&gt;enabled_non_wakeup_gpios;</div><div class='ctx'> </div><div class='hunk'>@@ -1293,16 +1235,10 @@ static int omap_gpio_runtime_resume(struct device *dev)</div><div class='ctx'> 	__raw_writel(bank-&gt;context.risingdetect,</div><div class='ctx'> 		     bank-&gt;base + bank-&gt;regs-&gt;risingdetect);</div><div class='ctx'> </div><div class='del'>-	if (!bank-&gt;workaround_enabled) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;bank-&gt;lock, flags);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (bank-&gt;get_context_loss_count) {</div><div class='ctx'> 		context_lost_cnt_after =</div><div class='ctx'> 			bank-&gt;get_context_loss_count(bank-&gt;dev);</div><div class='del'>-		if (context_lost_cnt_after != bank-&gt;context_loss_count ||</div><div class='del'>-						!context_lost_cnt_after) {</div><div class='add'>+		if (context_lost_cnt_after != bank-&gt;context_loss_count) {</div><div class='ctx'> 			omap_gpio_restore_context(bank);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;bank-&gt;lock, flags);</div><div class='hunk'>@@ -1310,9 +1246,14 @@ static int omap_gpio_runtime_resume(struct device *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	__raw_writel(bank-&gt;saved_fallingdetect,</div><div class='add'>+	if (!bank-&gt;workaround_enabled) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;bank-&gt;lock, flags);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__raw_writel(bank-&gt;context.fallingdetect,</div><div class='ctx'> 			bank-&gt;base + bank-&gt;regs-&gt;fallingdetect);</div><div class='del'>-	__raw_writel(bank-&gt;saved_risingdetect,</div><div class='add'>+	__raw_writel(bank-&gt;context.risingdetect,</div><div class='ctx'> 			bank-&gt;base + bank-&gt;regs-&gt;risingdetect);</div><div class='ctx'> 	l = __raw_readl(bank-&gt;base + bank-&gt;regs-&gt;datain);</div><div class='ctx'> </div><div class='hunk'>@@ -1329,14 +1270,15 @@ static int omap_gpio_runtime_resume(struct device *dev)</div><div class='ctx'> 	 * No need to generate IRQs for the rising edge for gpio IRQs</div><div class='ctx'> 	 * configured with falling edge only; and vice versa.</div><div class='ctx'> 	 */</div><div class='del'>-	gen0 = l &amp; bank-&gt;saved_fallingdetect;</div><div class='add'>+	gen0 = l &amp; bank-&gt;context.fallingdetect;</div><div class='ctx'> 	gen0 &amp;= bank-&gt;saved_datain;</div><div class='ctx'> </div><div class='del'>-	gen1 = l &amp; bank-&gt;saved_risingdetect;</div><div class='add'>+	gen1 = l &amp; bank-&gt;context.risingdetect;</div><div class='ctx'> 	gen1 &amp;= ~(bank-&gt;saved_datain);</div><div class='ctx'> </div><div class='ctx'> 	/* FIXME: Consider GPIO IRQs with level detections properly! */</div><div class='del'>-	gen = l &amp; (~(bank-&gt;saved_fallingdetect) &amp; ~(bank-&gt;saved_risingdetect));</div><div class='add'>+	gen = l &amp; (~(bank-&gt;context.fallingdetect) &amp;</div><div class='add'>+					 ~(bank-&gt;context.risingdetect));</div><div class='ctx'> 	/* Consider all GPIO IRQs needed to be updated */</div><div class='ctx'> 	gen |= gen0 | gen1;</div><div class='ctx'> </div><div class='hunk'>@@ -1346,14 +1288,14 @@ static int omap_gpio_runtime_resume(struct device *dev)</div><div class='ctx'> 		old0 = __raw_readl(bank-&gt;base + bank-&gt;regs-&gt;leveldetect0);</div><div class='ctx'> 		old1 = __raw_readl(bank-&gt;base + bank-&gt;regs-&gt;leveldetect1);</div><div class='ctx'> </div><div class='del'>-		if (cpu_is_omap24xx() || cpu_is_omap34xx()) {</div><div class='add'>+		if (!bank-&gt;regs-&gt;irqstatus_raw0) {</div><div class='ctx'> 			__raw_writel(old0 | gen, bank-&gt;base +</div><div class='ctx'> 						bank-&gt;regs-&gt;leveldetect0);</div><div class='ctx'> 			__raw_writel(old1 | gen, bank-&gt;base +</div><div class='ctx'> 						bank-&gt;regs-&gt;leveldetect1);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (cpu_is_omap44xx()) {</div><div class='add'>+		if (bank-&gt;regs-&gt;irqstatus_raw0) {</div><div class='ctx'> 			__raw_writel(old0 | l, bank-&gt;base +</div><div class='ctx'> 						bank-&gt;regs-&gt;leveldetect0);</div><div class='ctx'> 			__raw_writel(old1 | l, bank-&gt;base +</div><div class='hunk'>@@ -1432,14 +1374,11 @@ static void omap_gpio_restore_context(struct gpio_bank *bank)</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_PM_RUNTIME */</div><div class='ctx'> #else</div><div class='del'>-#define omap_gpio_suspend NULL</div><div class='del'>-#define omap_gpio_resume NULL</div><div class='ctx'> #define omap_gpio_runtime_suspend NULL</div><div class='ctx'> #define omap_gpio_runtime_resume NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static const struct dev_pm_ops gpio_pm_ops = {</div><div class='del'>-	SET_SYSTEM_SLEEP_PM_OPS(omap_gpio_suspend, omap_gpio_resume)</div><div class='ctx'> 	SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume,</div><div class='ctx'> 									NULL)</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c<br/>index d3f3e8f54561..1c313c710be3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-pca953x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-pca953x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-pca953x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-pca953x.c</a></div><div class='hunk'>@@ -28,6 +28,8 @@</div><div class='ctx'> #define PCA953X_INVERT		2</div><div class='ctx'> #define PCA953X_DIRECTION	3</div><div class='ctx'> </div><div class='add'>+#define REG_ADDR_AI		0x80</div><div class='add'>+</div><div class='ctx'> #define PCA957X_IN		0</div><div class='ctx'> #define PCA957X_INVRT		1</div><div class='ctx'> #define PCA957X_BKEN		2</div><div class='hunk'>@@ -63,15 +65,15 @@ static const struct i2c_device_id pca953x_id[] = {</div><div class='ctx'> 	{ "pca6107", 8  | PCA953X_TYPE | PCA_INT, },</div><div class='ctx'> 	{ "tca6408", 8  | PCA953X_TYPE | PCA_INT, },</div><div class='ctx'> 	{ "tca6416", 16 | PCA953X_TYPE | PCA_INT, },</div><div class='del'>-	/* NYET:  { "tca6424", 24, }, */</div><div class='add'>+	{ "tca6424", 24 | PCA953X_TYPE | PCA_INT, },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(i2c, pca953x_id);</div><div class='ctx'> </div><div class='ctx'> struct pca953x_chip {</div><div class='ctx'> 	unsigned gpio_start;</div><div class='del'>-	uint16_t reg_output;</div><div class='del'>-	uint16_t reg_direction;</div><div class='add'>+	u32 reg_output;</div><div class='add'>+	u32 reg_direction;</div><div class='ctx'> 	struct mutex i2c_lock;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_GPIO_PCA953X_IRQ</div><div class='hunk'>@@ -89,12 +91,20 @@ struct pca953x_chip {</div><div class='ctx'> 	int	chip_type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int pca953x_write_reg(struct pca953x_chip *chip, int reg, uint16_t val)</div><div class='add'>+static int pca953x_write_reg(struct pca953x_chip *chip, int reg, u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (chip-&gt;gpio_chip.ngpio &lt;= 8)</div><div class='ctx'> 		ret = i2c_smbus_write_byte_data(chip-&gt;client, reg, val);</div><div class='add'>+	else if (chip-&gt;gpio_chip.ngpio == 24) {</div><div class='add'>+		ret = i2c_smbus_write_word_data(chip-&gt;client,</div><div class='add'>+						(reg &lt;&lt; 2) | REG_ADDR_AI,</div><div class='add'>+						val &amp; 0xffff);</div><div class='add'>+		ret = i2c_smbus_write_byte_data(chip-&gt;client,</div><div class='add'>+						(reg &lt;&lt; 2) + 2,</div><div class='add'>+						(val &amp; 0xff0000) &gt;&gt; 16);</div><div class='add'>+	}</div><div class='ctx'> 	else {</div><div class='ctx'> 		switch (chip-&gt;chip_type) {</div><div class='ctx'> 		case PCA953X_TYPE:</div><div class='hunk'>@@ -121,12 +131,17 @@ static int pca953x_write_reg(struct pca953x_chip *chip, int reg, uint16_t val)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pca953x_read_reg(struct pca953x_chip *chip, int reg, uint16_t *val)</div><div class='add'>+static int pca953x_read_reg(struct pca953x_chip *chip, int reg, u32 *val)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (chip-&gt;gpio_chip.ngpio &lt;= 8)</div><div class='ctx'> 		ret = i2c_smbus_read_byte_data(chip-&gt;client, reg);</div><div class='add'>+	else if (chip-&gt;gpio_chip.ngpio == 24) {</div><div class='add'>+		ret =  i2c_smbus_read_word_data(chip-&gt;client, reg &lt;&lt; 2);</div><div class='add'>+		ret |= (i2c_smbus_read_byte_data(chip-&gt;client,</div><div class='add'>+						 (reg &lt;&lt; 2) + 2)&lt;&lt;16);</div><div class='add'>+	}</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = i2c_smbus_read_word_data(chip-&gt;client, reg &lt;&lt; 1);</div><div class='ctx'> </div><div class='hunk'>@@ -135,14 +150,14 @@ static int pca953x_read_reg(struct pca953x_chip *chip, int reg, uint16_t *val)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*val = (uint16_t)ret;</div><div class='add'>+	*val = (u32)ret;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)</div><div class='ctx'> {</div><div class='ctx'> 	struct pca953x_chip *chip;</div><div class='del'>-	uint16_t reg_val;</div><div class='add'>+	uint reg_val;</div><div class='ctx'> 	int ret, offset = 0;</div><div class='ctx'> </div><div class='ctx'> 	chip = container_of(gc, struct pca953x_chip, gpio_chip);</div><div class='hunk'>@@ -173,7 +188,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc,</div><div class='ctx'> 		unsigned off, int val)</div><div class='ctx'> {</div><div class='ctx'> 	struct pca953x_chip *chip;</div><div class='del'>-	uint16_t reg_val;</div><div class='add'>+	uint reg_val;</div><div class='ctx'> 	int ret, offset = 0;</div><div class='ctx'> </div><div class='ctx'> 	chip = container_of(gc, struct pca953x_chip, gpio_chip);</div><div class='hunk'>@@ -223,7 +238,7 @@ exit:</div><div class='ctx'> static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)</div><div class='ctx'> {</div><div class='ctx'> 	struct pca953x_chip *chip;</div><div class='del'>-	uint16_t reg_val;</div><div class='add'>+	u32 reg_val;</div><div class='ctx'> 	int ret, offset = 0;</div><div class='ctx'> </div><div class='ctx'> 	chip = container_of(gc, struct pca953x_chip, gpio_chip);</div><div class='hunk'>@@ -253,7 +268,7 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)</div><div class='ctx'> static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)</div><div class='ctx'> {</div><div class='ctx'> 	struct pca953x_chip *chip;</div><div class='del'>-	uint16_t reg_val;</div><div class='add'>+	u32 reg_val;</div><div class='ctx'> 	int ret, offset = 0;</div><div class='ctx'> </div><div class='ctx'> 	chip = container_of(gc, struct pca953x_chip, gpio_chip);</div><div class='hunk'>@@ -386,7 +401,7 @@ static struct irq_chip pca953x_irq_chip = {</div><div class='ctx'> </div><div class='ctx'> static uint16_t pca953x_irq_pending(struct pca953x_chip *chip)</div><div class='ctx'> {</div><div class='del'>-	uint16_t cur_stat;</div><div class='add'>+	u32 cur_stat;</div><div class='ctx'> 	uint16_t old_stat;</div><div class='ctx'> 	uint16_t pending;</div><div class='ctx'> 	uint16_t trigger;</div><div class='hunk'>@@ -449,6 +464,7 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,</div><div class='ctx'> {</div><div class='ctx'> 	struct i2c_client *client = chip-&gt;client;</div><div class='ctx'> 	int ret, offset = 0;</div><div class='add'>+	u32 temporary;</div><div class='ctx'> </div><div class='ctx'> 	if (irq_base != -1</div><div class='ctx'> 			&amp;&amp; (id-&gt;driver_data &amp; PCA_INT)) {</div><div class='hunk'>@@ -462,7 +478,8 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,</div><div class='ctx'> 			offset = PCA957X_IN;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		ret = pca953x_read_reg(chip, offset, &amp;chip-&gt;irq_stat);</div><div class='add'>+		ret = pca953x_read_reg(chip, offset, &amp;temporary);</div><div class='add'>+		chip-&gt;irq_stat = temporary;</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out_failed;</div><div class='ctx'> </div><div class='hunk'>@@ -603,7 +620,7 @@ out:</div><div class='ctx'> static int __devinit device_pca957x_init(struct pca953x_chip *chip, int invert)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	uint16_t val = 0;</div><div class='add'>+	u32 val = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Let every port in proper state, that could save power */</div><div class='ctx'> 	pca953x_write_reg(chip, PCA957X_PUPD, 0x0);</div><div class='head'>diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c<br/>index e8729cc2ba2b..139ad3e20011 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-pch.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-pch.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-pch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-pch.c</a></div><div class='hunk'>@@ -230,16 +230,12 @@ static void pch_gpio_setup(struct pch_gpio *chip)</div><div class='ctx'> </div><div class='ctx'> static int pch_irq_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> {</div><div class='del'>-	u32 im;</div><div class='del'>-	u32 __iomem *im_reg;</div><div class='del'>-	u32 ien;</div><div class='del'>-	u32 im_pos;</div><div class='del'>-	int ch;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 val;</div><div class='del'>-	int irq = d-&gt;irq;</div><div class='ctx'> 	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);</div><div class='ctx'> 	struct pch_gpio *chip = gc-&gt;private;</div><div class='add'>+	u32 im, im_pos, val;</div><div class='add'>+	u32 __iomem *im_reg;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ch, irq = d-&gt;irq;</div><div class='ctx'> </div><div class='ctx'> 	ch = irq - chip-&gt;irq_base;</div><div class='ctx'> 	if (irq &lt;= chip-&gt;irq_base + 7) {</div><div class='hunk'>@@ -270,30 +266,22 @@ static int pch_irq_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> 	case IRQ_TYPE_LEVEL_LOW:</div><div class='ctx'> 		val = PCH_LEVEL_L;</div><div class='ctx'> 		break;</div><div class='del'>-	case IRQ_TYPE_PROBE:</div><div class='del'>-		goto end;</div><div class='ctx'> 	default:</div><div class='del'>-		dev_warn(chip-&gt;dev, "%s: unknown type(%dd)",</div><div class='del'>-			__func__, type);</div><div class='del'>-		goto end;</div><div class='add'>+		goto unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set interrupt mode */</div><div class='ctx'> 	im = ioread32(im_reg) &amp; ~(PCH_IM_MASK &lt;&lt; (im_pos * 4));</div><div class='ctx'> 	iowrite32(im | (val &lt;&lt; (im_pos * 4)), im_reg);</div><div class='ctx'> </div><div class='del'>-	/* iclr */</div><div class='del'>-	iowrite32(BIT(ch), &amp;chip-&gt;reg-&gt;iclr);</div><div class='add'>+	/* And the handler */</div><div class='add'>+	if (type &amp; (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))</div><div class='add'>+		__irq_set_handler_locked(d-&gt;irq, handle_level_irq);</div><div class='add'>+	else if (type &amp; (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))</div><div class='add'>+		__irq_set_handler_locked(d-&gt;irq, handle_edge_irq);</div><div class='ctx'> </div><div class='del'>-	/* IMASKCLR */</div><div class='del'>-	iowrite32(BIT(ch), &amp;chip-&gt;reg-&gt;imaskclr);</div><div class='del'>-</div><div class='del'>-	/* Enable interrupt */</div><div class='del'>-	ien = ioread32(&amp;chip-&gt;reg-&gt;ien);</div><div class='del'>-	iowrite32(ien | BIT(ch), &amp;chip-&gt;reg-&gt;ien);</div><div class='del'>-end:</div><div class='add'>+unlock:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;chip-&gt;spinlock, flags);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -313,18 +301,24 @@ static void pch_irq_mask(struct irq_data *d)</div><div class='ctx'> 	iowrite32(1 &lt;&lt; (d-&gt;irq - chip-&gt;irq_base), &amp;chip-&gt;reg-&gt;imask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void pch_irq_ack(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct pch_gpio *chip = gc-&gt;private;</div><div class='add'>+</div><div class='add'>+	iowrite32(1 &lt;&lt; (d-&gt;irq - chip-&gt;irq_base), &amp;chip-&gt;reg-&gt;iclr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static irqreturn_t pch_gpio_handler(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct pch_gpio *chip = dev_id;</div><div class='ctx'> 	u32 reg_val = ioread32(&amp;chip-&gt;reg-&gt;istatus);</div><div class='del'>-	int i;</div><div class='del'>-	int ret = IRQ_NONE;</div><div class='add'>+	int i, ret = IRQ_NONE;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; gpio_pins[chip-&gt;ioh]; i++) {</div><div class='ctx'> 		if (reg_val &amp; BIT(i)) {</div><div class='ctx'> 			dev_dbg(chip-&gt;dev, "%s:[%d]:irq=%d  status=0x%x\n",</div><div class='ctx'> 				__func__, i, irq, reg_val);</div><div class='del'>-			iowrite32(BIT(i), &amp;chip-&gt;reg-&gt;iclr);</div><div class='ctx'> 			generic_handle_irq(chip-&gt;irq_base + i);</div><div class='ctx'> 			ret = IRQ_HANDLED;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -343,6 +337,7 @@ static __devinit void pch_gpio_alloc_generic_chip(struct pch_gpio *chip,</div><div class='ctx'> 	gc-&gt;private = chip;</div><div class='ctx'> 	ct = gc-&gt;chip_types;</div><div class='ctx'> </div><div class='add'>+	ct-&gt;chip.irq_ack = pch_irq_ack;</div><div class='ctx'> 	ct-&gt;chip.irq_mask = pch_irq_mask;</div><div class='ctx'> 	ct-&gt;chip.irq_unmask = pch_irq_unmask;</div><div class='ctx'> 	ct-&gt;chip.irq_set_type = pch_irq_type;</div><div class='hunk'>@@ -357,6 +352,7 @@ static int __devinit pch_gpio_probe(struct pci_dev *pdev,</div><div class='ctx'> 	s32 ret;</div><div class='ctx'> 	struct pch_gpio *chip;</div><div class='ctx'> 	int irq_base;</div><div class='add'>+	u32 msk;</div><div class='ctx'> </div><div class='ctx'> 	chip = kzalloc(sizeof(*chip), GFP_KERNEL);</div><div class='ctx'> 	if (chip == NULL)</div><div class='hunk'>@@ -408,8 +404,13 @@ static int __devinit pch_gpio_probe(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> 	chip-&gt;irq_base = irq_base;</div><div class='ctx'> </div><div class='add'>+	/* Mask all interrupts, but enable them */</div><div class='add'>+	msk = (1 &lt;&lt; gpio_pins[chip-&gt;ioh]) - 1;</div><div class='add'>+	iowrite32(msk, &amp;chip-&gt;reg-&gt;imask);</div><div class='add'>+	iowrite32(msk, &amp;chip-&gt;reg-&gt;ien);</div><div class='add'>+</div><div class='ctx'> 	ret = request_irq(pdev-&gt;irq, pch_gpio_handler,</div><div class='del'>-			     IRQF_SHARED, KBUILD_MODNAME, chip);</div><div class='add'>+			  IRQF_SHARED, KBUILD_MODNAME, chip);</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='ctx'> 			"%s request_irq failed\n", __func__);</div><div class='hunk'>@@ -418,8 +419,6 @@ static int __devinit pch_gpio_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	pch_gpio_alloc_generic_chip(chip, irq_base, gpio_pins[chip-&gt;ioh]);</div><div class='ctx'> </div><div class='del'>-	/* Initialize interrupt ien register */</div><div class='del'>-	iowrite32(0, &amp;chip-&gt;reg-&gt;ien);</div><div class='ctx'> end:</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -539,17 +538,7 @@ static struct pci_driver pch_gpio_driver = {</div><div class='ctx'> 	.resume = pch_gpio_resume</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init pch_gpio_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;pch_gpio_driver);</div><div class='del'>-}</div><div class='del'>-module_init(pch_gpio_pci_init);</div><div class='del'>-</div><div class='del'>-static void __exit pch_gpio_pci_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;pch_gpio_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(pch_gpio_pci_exit);</div><div class='add'>+module_pci_driver(pch_gpio_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("PCH GPIO PCI Driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c<br/>index fc3ace3fd4cb..58a6a63a6ece 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-pxa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-pxa.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-pxa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-pxa.c</a></div><div class='hunk'>@@ -11,13 +11,17 @@</div><div class='ctx'>  *  it under the terms of the GNU General Public License version 2 as</div><div class='ctx'>  *  published by the Free Software Foundation.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/gpio-pxa.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/syscore_ops.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -56,6 +60,10 @@</div><div class='ctx'> </div><div class='ctx'> int pxa_last_gpio;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static struct irq_domain *domain;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> struct pxa_gpio_chip {</div><div class='ctx'> 	struct gpio_chip chip;</div><div class='ctx'> 	void __iomem	*regbase;</div><div class='hunk'>@@ -81,7 +89,6 @@ enum {</div><div class='ctx'> 	PXA3XX_GPIO,</div><div class='ctx'> 	PXA93X_GPIO,</div><div class='ctx'> 	MMP_GPIO = 0x10,</div><div class='del'>-	MMP2_GPIO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static DEFINE_SPINLOCK(gpio_lock);</div><div class='hunk'>@@ -475,22 +482,92 @@ static int pxa_gpio_nums(void)</div><div class='ctx'> 		gpio_type = MMP_GPIO;</div><div class='ctx'> 	} else if (cpu_is_mmp2()) {</div><div class='ctx'> 		count = 191;</div><div class='del'>-		gpio_type = MMP2_GPIO;</div><div class='add'>+		gpio_type = MMP_GPIO;</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* CONFIG_ARCH_MMP */</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct of_device_id pxa_gpio_dt_ids[] = {</div><div class='add'>+	{ .compatible = "mrvl,pxa-gpio" },</div><div class='add'>+	{ .compatible = "mrvl,mmp-gpio", .data = (void *)MMP_GPIO },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int pxa_irq_domain_map(struct irq_domain *d, unsigned int irq,</div><div class='add'>+			      irq_hw_number_t hw)</div><div class='add'>+{</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;pxa_muxed_gpio_chip,</div><div class='add'>+				 handle_edge_irq);</div><div class='add'>+	set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct irq_domain_ops pxa_irq_domain_ops = {</div><div class='add'>+	.map	= pxa_irq_domain_map,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static int __devinit pxa_gpio_probe_dt(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	int ret, nr_banks, nr_gpios, irq_base;</div><div class='add'>+	struct device_node *prev, *next, *np = pdev-&gt;dev.of_node;</div><div class='add'>+	const struct of_device_id *of_id =</div><div class='add'>+				of_match_device(pxa_gpio_dt_ids, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!of_id) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to find gpio controller\n");</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+	gpio_type = (int)of_id-&gt;data;</div><div class='add'>+</div><div class='add'>+	next = of_get_next_child(np, NULL);</div><div class='add'>+	prev = next;</div><div class='add'>+	if (!next) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to find child gpio node\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	for (nr_banks = 1; ; nr_banks++) {</div><div class='add'>+		next = of_get_next_child(np, prev);</div><div class='add'>+		if (!next)</div><div class='add'>+			break;</div><div class='add'>+		prev = next;</div><div class='add'>+	}</div><div class='add'>+	of_node_put(prev);</div><div class='add'>+	nr_gpios = nr_banks &lt;&lt; 5;</div><div class='add'>+	pxa_last_gpio = nr_gpios - 1;</div><div class='add'>+</div><div class='add'>+	irq_base = irq_alloc_descs(-1, 0, nr_gpios, 0);</div><div class='add'>+	if (irq_base &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to allocate IRQ numbers\n");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	domain = irq_domain_add_legacy(np, nr_gpios, irq_base, 0,</div><div class='add'>+				       &amp;pxa_irq_domain_ops, NULL);</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	iounmap(gpio_reg_base);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+#define pxa_gpio_probe_dt(pdev)		(-1)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int __devinit pxa_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pxa_gpio_chip *c;</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	struct pxa_gpio_platform_data *info;</div><div class='del'>-	int gpio, irq, ret;</div><div class='add'>+	int gpio, irq, ret, use_of = 0;</div><div class='ctx'> 	int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0;</div><div class='ctx'> </div><div class='del'>-	pxa_last_gpio = pxa_gpio_nums();</div><div class='add'>+	ret = pxa_gpio_probe_dt(pdev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		pxa_last_gpio = pxa_gpio_nums();</div><div class='add'>+	else</div><div class='add'>+		use_of = 1;</div><div class='ctx'> 	if (!pxa_last_gpio)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -545,25 +622,27 @@ static int __devinit pxa_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 			writel_relaxed(~0, c-&gt;regbase + ED_MASK_OFFSET);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!use_of) {</div><div class='ctx'> #ifdef CONFIG_ARCH_PXA</div><div class='del'>-	irq = gpio_to_irq(0);</div><div class='del'>-	irq_set_chip_and_handler(irq, &amp;pxa_muxed_gpio_chip,</div><div class='del'>-				 handle_edge_irq);</div><div class='del'>-	set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);</div><div class='del'>-	irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler);</div><div class='del'>-</div><div class='del'>-	irq = gpio_to_irq(1);</div><div class='del'>-	irq_set_chip_and_handler(irq, &amp;pxa_muxed_gpio_chip,</div><div class='del'>-				 handle_edge_irq);</div><div class='del'>-	set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);</div><div class='del'>-	irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler);</div><div class='del'>-#endif</div><div class='add'>+		irq = gpio_to_irq(0);</div><div class='add'>+		irq_set_chip_and_handler(irq, &amp;pxa_muxed_gpio_chip,</div><div class='add'>+					 handle_edge_irq);</div><div class='add'>+		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);</div><div class='add'>+		irq_set_chained_handler(IRQ_GPIO0, pxa_gpio_demux_handler);</div><div class='ctx'> </div><div class='del'>-	for (irq  = gpio_to_irq(gpio_offset);</div><div class='del'>-		irq &lt;= gpio_to_irq(pxa_last_gpio); irq++) {</div><div class='add'>+		irq = gpio_to_irq(1);</div><div class='ctx'> 		irq_set_chip_and_handler(irq, &amp;pxa_muxed_gpio_chip,</div><div class='ctx'> 					 handle_edge_irq);</div><div class='ctx'> 		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);</div><div class='add'>+		irq_set_chained_handler(IRQ_GPIO1, pxa_gpio_demux_handler);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+		for (irq  = gpio_to_irq(gpio_offset);</div><div class='add'>+			irq &lt;= gpio_to_irq(pxa_last_gpio); irq++) {</div><div class='add'>+			irq_set_chip_and_handler(irq, &amp;pxa_muxed_gpio_chip,</div><div class='add'>+						 handle_edge_irq);</div><div class='add'>+			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	irq_set_chained_handler(irq_mux, pxa_gpio_demux_handler);</div><div class='hunk'>@@ -574,6 +653,7 @@ static struct platform_driver pxa_gpio_driver = {</div><div class='ctx'> 	.probe		= pxa_gpio_probe,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "pxa-gpio",</div><div class='add'>+		.of_match_table = pxa_gpio_dt_ids,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-rc5t583.c b/drivers/gpio/gpio-rc5t583.c<br/>new file mode 100644<br/>index 000000000000..08428bf17718<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-rc5t583.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-rc5t583.c</a></div><div class='hunk'>@@ -0,0 +1,180 @@</div><div class='add'>+/*</div><div class='add'>+ * GPIO driver for RICOH583 power management chip.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ * Author: Laxman dewangan &lt;ldewangan@nvidia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Based on code</div><div class='add'>+ *	Copyright (C) 2011 RICOH COMPANY,LTD</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/mfd/rc5t583.h&gt;</div><div class='add'>+</div><div class='add'>+struct rc5t583_gpio {</div><div class='add'>+	struct gpio_chip gpio_chip;</div><div class='add'>+	struct rc5t583 *rc5t583;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct rc5t583_gpio *to_rc5t583_gpio(struct gpio_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return container_of(chip, struct rc5t583_gpio, gpio_chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rc5t583_gpio_get(struct gpio_chip *gc, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct rc5t583_gpio *rc5t583_gpio = to_rc5t583_gpio(gc);</div><div class='add'>+	struct device *parent = rc5t583_gpio-&gt;rc5t583-&gt;dev;</div><div class='add'>+	uint8_t val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = rc5t583_read(parent, RC5T583_GPIO_MON_IOIN, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return !!(val &amp; BIT(offset));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rc5t583_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)</div><div class='add'>+{</div><div class='add'>+	struct rc5t583_gpio *rc5t583_gpio = to_rc5t583_gpio(gc);</div><div class='add'>+	struct device *parent = rc5t583_gpio-&gt;rc5t583-&gt;dev;</div><div class='add'>+	if (val)</div><div class='add'>+		rc5t583_set_bits(parent, RC5T583_GPIO_IOOUT, BIT(offset));</div><div class='add'>+	else</div><div class='add'>+		rc5t583_clear_bits(parent, RC5T583_GPIO_IOOUT, BIT(offset));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rc5t583_gpio_dir_input(struct gpio_chip *gc, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct rc5t583_gpio *rc5t583_gpio = to_rc5t583_gpio(gc);</div><div class='add'>+	struct device *parent = rc5t583_gpio-&gt;rc5t583-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = rc5t583_clear_bits(parent, RC5T583_GPIO_IOSEL, BIT(offset));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Set pin to gpio mode */</div><div class='add'>+	return rc5t583_clear_bits(parent, RC5T583_GPIO_PGSEL, BIT(offset));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rc5t583_gpio_dir_output(struct gpio_chip *gc, unsigned offset,</div><div class='add'>+			int value)</div><div class='add'>+{</div><div class='add'>+	struct rc5t583_gpio *rc5t583_gpio = to_rc5t583_gpio(gc);</div><div class='add'>+	struct device *parent = rc5t583_gpio-&gt;rc5t583-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	rc5t583_gpio_set(gc, offset, value);</div><div class='add'>+	ret = rc5t583_set_bits(parent, RC5T583_GPIO_IOSEL, BIT(offset));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Set pin to gpio mode */</div><div class='add'>+	return rc5t583_clear_bits(parent, RC5T583_GPIO_PGSEL, BIT(offset));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rc5t583_gpio_to_irq(struct gpio_chip *gc, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	struct rc5t583_gpio *rc5t583_gpio = to_rc5t583_gpio(gc);</div><div class='add'>+</div><div class='add'>+	if ((offset &gt;= 0) &amp;&amp; (offset &lt; 8))</div><div class='add'>+		return rc5t583_gpio-&gt;rc5t583-&gt;irq_base +</div><div class='add'>+				RC5T583_IRQ_GPIO0 + offset;</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rc5t583_gpio_free(struct gpio_chip *gc, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	struct rc5t583_gpio *rc5t583_gpio = to_rc5t583_gpio(gc);</div><div class='add'>+	struct device *parent = rc5t583_gpio-&gt;rc5t583-&gt;dev;</div><div class='add'>+</div><div class='add'>+	rc5t583_set_bits(parent, RC5T583_GPIO_PGSEL, BIT(offset));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit rc5t583_gpio_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct rc5t583 *rc5t583 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct rc5t583_platform_data *pdata = dev_get_platdata(rc5t583-&gt;dev);</div><div class='add'>+	struct rc5t583_gpio *rc5t583_gpio;</div><div class='add'>+</div><div class='add'>+	rc5t583_gpio = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*rc5t583_gpio),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!rc5t583_gpio) {</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, "Mem allocation for rc5t583_gpio failed");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc5t583_gpio-&gt;gpio_chip.label = "gpio-rc5t583",</div><div class='add'>+	rc5t583_gpio-&gt;gpio_chip.owner = THIS_MODULE,</div><div class='add'>+	rc5t583_gpio-&gt;gpio_chip.free = rc5t583_gpio_free,</div><div class='add'>+	rc5t583_gpio-&gt;gpio_chip.direction_input = rc5t583_gpio_dir_input,</div><div class='add'>+	rc5t583_gpio-&gt;gpio_chip.direction_output = rc5t583_gpio_dir_output,</div><div class='add'>+	rc5t583_gpio-&gt;gpio_chip.set = rc5t583_gpio_set,</div><div class='add'>+	rc5t583_gpio-&gt;gpio_chip.get = rc5t583_gpio_get,</div><div class='add'>+	rc5t583_gpio-&gt;gpio_chip.to_irq = rc5t583_gpio_to_irq,</div><div class='add'>+	rc5t583_gpio-&gt;gpio_chip.ngpio = RC5T583_MAX_GPIO,</div><div class='add'>+	rc5t583_gpio-&gt;gpio_chip.can_sleep = 1,</div><div class='add'>+	rc5t583_gpio-&gt;gpio_chip.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	rc5t583_gpio-&gt;gpio_chip.base = -1;</div><div class='add'>+	rc5t583_gpio-&gt;rc5t583 = rc5t583;</div><div class='add'>+</div><div class='add'>+	if (pdata &amp;&amp; pdata-&gt;gpio_base)</div><div class='add'>+		rc5t583_gpio-&gt;gpio_chip.base = pdata-&gt;gpio_base;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, rc5t583_gpio);</div><div class='add'>+</div><div class='add'>+	return gpiochip_add(&amp;rc5t583_gpio-&gt;gpio_chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit rc5t583_gpio_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct rc5t583_gpio *rc5t583_gpio = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	return gpiochip_remove(&amp;rc5t583_gpio-&gt;gpio_chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver rc5t583_gpio_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name    = "rc5t583-gpio",</div><div class='add'>+		.owner   = THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe		= rc5t583_gpio_probe,</div><div class='add'>+	.remove		= __devexit_p(rc5t583_gpio_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init rc5t583_gpio_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;rc5t583_gpio_driver);</div><div class='add'>+}</div><div class='add'>+subsys_initcall(rc5t583_gpio_init);</div><div class='add'>+</div><div class='add'>+static void __exit rc5t583_gpio_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;rc5t583_gpio_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(rc5t583_gpio_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Laxman Dewangan &lt;ldewangan@nvidia.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("GPIO interface for RC5T583");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_ALIAS("platform:rc5t583-gpio");</div><div class='head'>diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c<br/>index 19d6fc0229c3..b6453d0e44ad 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-samsung.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-samsung.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-samsung.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-samsung.c</a></div><div class='hunk'>@@ -452,12 +452,14 @@ static struct samsung_gpio_cfg s3c24xx_gpiocfg_banka = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5)</div><div class='ctx'> static struct samsung_gpio_cfg exynos_gpio_cfg = {</div><div class='ctx'> 	.set_pull	= exynos_gpio_setpull,</div><div class='ctx'> 	.get_pull	= exynos_gpio_getpull,</div><div class='ctx'> 	.set_config	= samsung_gpio_setcfg_4bit,</div><div class='ctx'> 	.get_config	= samsung_gpio_getcfg_4bit,</div><div class='ctx'> };</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450)</div><div class='ctx'> static struct samsung_gpio_cfg s5p64x0_gpio_cfg_rbank = {</div><div class='hunk'>@@ -2123,8 +2125,8 @@ static struct samsung_gpio_chip s5pv210_gpios_4bit[] = {</div><div class='ctx'>  * uses the above macro and depends on the banks being listed in order here.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static struct samsung_gpio_chip exynos4_gpios_1[] = {</div><div class='ctx'> #ifdef CONFIG_ARCH_EXYNOS4</div><div class='add'>+static struct samsung_gpio_chip exynos4_gpios_1[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip	= {</div><div class='ctx'> 			.base	= EXYNOS4_GPA0(0),</div><div class='hunk'>@@ -2222,11 +2224,11 @@ static struct samsung_gpio_chip exynos4_gpios_1[] = {</div><div class='ctx'> 			.label	= "GPF3",</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-#endif</div><div class='ctx'> };</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-static struct samsung_gpio_chip exynos4_gpios_2[] = {</div><div class='ctx'> #ifdef CONFIG_ARCH_EXYNOS4</div><div class='add'>+static struct samsung_gpio_chip exynos4_gpios_2[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip	= {</div><div class='ctx'> 			.base	= EXYNOS4_GPJ0(0),</div><div class='hunk'>@@ -2367,11 +2369,11 @@ static struct samsung_gpio_chip exynos4_gpios_2[] = {</div><div class='ctx'> 			.to_irq	= samsung_gpiolib_to_irq,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-#endif</div><div class='ctx'> };</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-static struct samsung_gpio_chip exynos4_gpios_3[] = {</div><div class='ctx'> #ifdef CONFIG_ARCH_EXYNOS4</div><div class='add'>+static struct samsung_gpio_chip exynos4_gpios_3[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip	= {</div><div class='ctx'> 			.base	= EXYNOS4_GPZ(0),</div><div class='hunk'>@@ -2379,8 +2381,8 @@ static struct samsung_gpio_chip exynos4_gpios_3[] = {</div><div class='ctx'> 			.label	= "GPZ",</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-#endif</div><div class='ctx'> };</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_EXYNOS5</div><div class='ctx'> static struct samsung_gpio_chip exynos5_gpios_1[] = {</div><div class='hunk'>@@ -2452,6 +2454,12 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = {</div><div class='ctx'> 		},</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.chip	= {</div><div class='add'>+			.base	= EXYNOS5_GPC4(0),</div><div class='add'>+			.ngpio	= EXYNOS5_GPIO_C4_NR,</div><div class='add'>+			.label	= "GPC4",</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		.chip	= {</div><div class='ctx'> 			.base	= EXYNOS5_GPD0(0),</div><div class='ctx'> 			.ngpio	= EXYNOS5_GPIO_D0_NR,</div><div class='ctx'> 			.label	= "GPD0",</div><div class='hunk'>@@ -2714,12 +2722,227 @@ static __init void exynos_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,</div><div class='ctx'> }</div><div class='ctx'> #endif /* defined(CONFIG_ARCH_EXYNOS) &amp;&amp; defined(CONFIG_OF) */</div><div class='ctx'> </div><div class='add'>+static __init void exynos4_gpiolib_init(void)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_CPU_EXYNOS4210</div><div class='add'>+	struct samsung_gpio_chip *chip;</div><div class='add'>+	int i, nr_chips;</div><div class='add'>+	void __iomem *gpio_base1, *gpio_base2, *gpio_base3;</div><div class='add'>+	int group = 0;</div><div class='add'>+	void __iomem *gpx_base;</div><div class='add'>+</div><div class='add'>+	/* gpio part1 */</div><div class='add'>+	gpio_base1 = ioremap(EXYNOS4_PA_GPIO1, SZ_4K);</div><div class='add'>+	if (gpio_base1 == NULL) {</div><div class='add'>+		pr_err("unable to ioremap for gpio_base1\n");</div><div class='add'>+		goto err_ioremap1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip = exynos4_gpios_1;</div><div class='add'>+	nr_chips = ARRAY_SIZE(exynos4_gpios_1);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='add'>+		if (!chip-&gt;config) {</div><div class='add'>+			chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='add'>+			chip-&gt;group = group++;</div><div class='add'>+		}</div><div class='add'>+		exynos_gpiolib_attach_ofnode(chip,</div><div class='add'>+				EXYNOS4_PA_GPIO1, i * 0x20);</div><div class='add'>+	}</div><div class='add'>+	samsung_gpiolib_add_4bit_chips(exynos4_gpios_1,</div><div class='add'>+				       nr_chips, gpio_base1);</div><div class='add'>+</div><div class='add'>+	/* gpio part2 */</div><div class='add'>+	gpio_base2 = ioremap(EXYNOS4_PA_GPIO2, SZ_4K);</div><div class='add'>+	if (gpio_base2 == NULL) {</div><div class='add'>+		pr_err("unable to ioremap for gpio_base2\n");</div><div class='add'>+		goto err_ioremap2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* need to set base address for gpx */</div><div class='add'>+	chip = &amp;exynos4_gpios_2[16];</div><div class='add'>+	gpx_base = gpio_base2 + 0xC00;</div><div class='add'>+	for (i = 0; i &lt; 4; i++, chip++, gpx_base += 0x20)</div><div class='add'>+		chip-&gt;base = gpx_base;</div><div class='add'>+</div><div class='add'>+	chip = exynos4_gpios_2;</div><div class='add'>+	nr_chips = ARRAY_SIZE(exynos4_gpios_2);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='add'>+		if (!chip-&gt;config) {</div><div class='add'>+			chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='add'>+			chip-&gt;group = group++;</div><div class='add'>+		}</div><div class='add'>+		exynos_gpiolib_attach_ofnode(chip,</div><div class='add'>+				EXYNOS4_PA_GPIO2, i * 0x20);</div><div class='add'>+	}</div><div class='add'>+	samsung_gpiolib_add_4bit_chips(exynos4_gpios_2,</div><div class='add'>+				       nr_chips, gpio_base2);</div><div class='add'>+</div><div class='add'>+	/* gpio part3 */</div><div class='add'>+	gpio_base3 = ioremap(EXYNOS4_PA_GPIO3, SZ_256);</div><div class='add'>+	if (gpio_base3 == NULL) {</div><div class='add'>+		pr_err("unable to ioremap for gpio_base3\n");</div><div class='add'>+		goto err_ioremap3;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip = exynos4_gpios_3;</div><div class='add'>+	nr_chips = ARRAY_SIZE(exynos4_gpios_3);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='add'>+		if (!chip-&gt;config) {</div><div class='add'>+			chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='add'>+			chip-&gt;group = group++;</div><div class='add'>+		}</div><div class='add'>+		exynos_gpiolib_attach_ofnode(chip,</div><div class='add'>+				EXYNOS4_PA_GPIO3, i * 0x20);</div><div class='add'>+	}</div><div class='add'>+	samsung_gpiolib_add_4bit_chips(exynos4_gpios_3,</div><div class='add'>+				       nr_chips, gpio_base3);</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_CPU_EXYNOS4210) &amp;&amp; defined(CONFIG_S5P_GPIO_INT)</div><div class='add'>+	s5p_register_gpioint_bank(IRQ_GPIO_XA, 0, IRQ_GPIO1_NR_GROUPS);</div><div class='add'>+	s5p_register_gpioint_bank(IRQ_GPIO_XB, IRQ_GPIO1_NR_GROUPS, IRQ_GPIO2_NR_GROUPS);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err_ioremap3:</div><div class='add'>+	iounmap(gpio_base2);</div><div class='add'>+err_ioremap2:</div><div class='add'>+	iounmap(gpio_base1);</div><div class='add'>+err_ioremap1:</div><div class='add'>+	return;</div><div class='add'>+#endif	/* CONFIG_CPU_EXYNOS4210 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init void exynos5_gpiolib_init(void)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_SOC_EXYNOS5250</div><div class='add'>+	struct samsung_gpio_chip *chip;</div><div class='add'>+	int i, nr_chips;</div><div class='add'>+	void __iomem *gpio_base1, *gpio_base2, *gpio_base3, *gpio_base4;</div><div class='add'>+	int group = 0;</div><div class='add'>+	void __iomem *gpx_base;</div><div class='add'>+</div><div class='add'>+	/* gpio part1 */</div><div class='add'>+	gpio_base1 = ioremap(EXYNOS5_PA_GPIO1, SZ_4K);</div><div class='add'>+	if (gpio_base1 == NULL) {</div><div class='add'>+		pr_err("unable to ioremap for gpio_base1\n");</div><div class='add'>+		goto err_ioremap1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* need to set base address for gpc4 */</div><div class='add'>+	exynos5_gpios_1[11].base = gpio_base1 + 0x2E0;</div><div class='add'>+</div><div class='add'>+	/* need to set base address for gpx */</div><div class='add'>+	chip = &amp;exynos5_gpios_1[21];</div><div class='add'>+	gpx_base = gpio_base1 + 0xC00;</div><div class='add'>+	for (i = 0; i &lt; 4; i++, chip++, gpx_base += 0x20)</div><div class='add'>+		chip-&gt;base = gpx_base;</div><div class='add'>+</div><div class='add'>+	chip = exynos5_gpios_1;</div><div class='add'>+	nr_chips = ARRAY_SIZE(exynos5_gpios_1);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='add'>+		if (!chip-&gt;config) {</div><div class='add'>+			chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='add'>+			chip-&gt;group = group++;</div><div class='add'>+		}</div><div class='add'>+		exynos_gpiolib_attach_ofnode(chip,</div><div class='add'>+				EXYNOS5_PA_GPIO1, i * 0x20);</div><div class='add'>+	}</div><div class='add'>+	samsung_gpiolib_add_4bit_chips(exynos5_gpios_1,</div><div class='add'>+				       nr_chips, gpio_base1);</div><div class='add'>+</div><div class='add'>+	/* gpio part2 */</div><div class='add'>+	gpio_base2 = ioremap(EXYNOS5_PA_GPIO2, SZ_4K);</div><div class='add'>+	if (gpio_base2 == NULL) {</div><div class='add'>+		pr_err("unable to ioremap for gpio_base2\n");</div><div class='add'>+		goto err_ioremap2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip = exynos5_gpios_2;</div><div class='add'>+	nr_chips = ARRAY_SIZE(exynos5_gpios_2);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='add'>+		if (!chip-&gt;config) {</div><div class='add'>+			chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='add'>+			chip-&gt;group = group++;</div><div class='add'>+		}</div><div class='add'>+		exynos_gpiolib_attach_ofnode(chip,</div><div class='add'>+				EXYNOS5_PA_GPIO2, i * 0x20);</div><div class='add'>+	}</div><div class='add'>+	samsung_gpiolib_add_4bit_chips(exynos5_gpios_2,</div><div class='add'>+				       nr_chips, gpio_base2);</div><div class='add'>+</div><div class='add'>+	/* gpio part3 */</div><div class='add'>+	gpio_base3 = ioremap(EXYNOS5_PA_GPIO3, SZ_4K);</div><div class='add'>+	if (gpio_base3 == NULL) {</div><div class='add'>+		pr_err("unable to ioremap for gpio_base3\n");</div><div class='add'>+		goto err_ioremap3;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* need to set base address for gpv */</div><div class='add'>+	exynos5_gpios_3[0].base = gpio_base3;</div><div class='add'>+	exynos5_gpios_3[1].base = gpio_base3 + 0x20;</div><div class='add'>+	exynos5_gpios_3[2].base = gpio_base3 + 0x60;</div><div class='add'>+	exynos5_gpios_3[3].base = gpio_base3 + 0x80;</div><div class='add'>+	exynos5_gpios_3[4].base = gpio_base3 + 0xC0;</div><div class='add'>+</div><div class='add'>+	chip = exynos5_gpios_3;</div><div class='add'>+	nr_chips = ARRAY_SIZE(exynos5_gpios_3);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='add'>+		if (!chip-&gt;config) {</div><div class='add'>+			chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='add'>+			chip-&gt;group = group++;</div><div class='add'>+		}</div><div class='add'>+		exynos_gpiolib_attach_ofnode(chip,</div><div class='add'>+				EXYNOS5_PA_GPIO3, i * 0x20);</div><div class='add'>+	}</div><div class='add'>+	samsung_gpiolib_add_4bit_chips(exynos5_gpios_3,</div><div class='add'>+				       nr_chips, gpio_base3);</div><div class='add'>+</div><div class='add'>+	/* gpio part4 */</div><div class='add'>+	gpio_base4 = ioremap(EXYNOS5_PA_GPIO4, SZ_4K);</div><div class='add'>+	if (gpio_base4 == NULL) {</div><div class='add'>+		pr_err("unable to ioremap for gpio_base4\n");</div><div class='add'>+		goto err_ioremap4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip = exynos5_gpios_4;</div><div class='add'>+	nr_chips = ARRAY_SIZE(exynos5_gpios_4);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='add'>+		if (!chip-&gt;config) {</div><div class='add'>+			chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='add'>+			chip-&gt;group = group++;</div><div class='add'>+		}</div><div class='add'>+		exynos_gpiolib_attach_ofnode(chip,</div><div class='add'>+				EXYNOS5_PA_GPIO4, i * 0x20);</div><div class='add'>+	}</div><div class='add'>+	samsung_gpiolib_add_4bit_chips(exynos5_gpios_4,</div><div class='add'>+				       nr_chips, gpio_base4);</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err_ioremap4:</div><div class='add'>+	iounmap(gpio_base3);</div><div class='add'>+err_ioremap3:</div><div class='add'>+	iounmap(gpio_base2);</div><div class='add'>+err_ioremap2:</div><div class='add'>+	iounmap(gpio_base1);</div><div class='add'>+err_ioremap1:</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+#endif	/* CONFIG_SOC_EXYNOS5250 */</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* TODO: cleanup soc_is_* */</div><div class='ctx'> static __init int samsung_gpiolib_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct samsung_gpio_chip *chip;</div><div class='ctx'> 	int i, nr_chips;</div><div class='del'>-	void __iomem *gpio_base1, *gpio_base2, *gpio_base3, *gpio_base4;</div><div class='ctx'> 	int group = 0;</div><div class='ctx'> </div><div class='ctx'> 	samsung_gpiolib_set_cfg(samsung_gpio_cfgs, ARRAY_SIZE(samsung_gpio_cfgs));</div><div class='hunk'>@@ -2785,200 +3008,15 @@ static __init int samsung_gpiolib_init(void)</div><div class='ctx'> 		s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR);</div><div class='ctx'> #endif</div><div class='ctx'> 	} else if (soc_is_exynos4210()) {</div><div class='del'>-#ifdef CONFIG_CPU_EXYNOS4210</div><div class='del'>-		void __iomem *gpx_base;</div><div class='del'>-</div><div class='del'>-		/* gpio part1 */</div><div class='del'>-		gpio_base1 = ioremap(EXYNOS4_PA_GPIO1, SZ_4K);</div><div class='del'>-		if (gpio_base1 == NULL) {</div><div class='del'>-			pr_err("unable to ioremap for gpio_base1\n");</div><div class='del'>-			goto err_ioremap1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		chip = exynos4_gpios_1;</div><div class='del'>-		nr_chips = ARRAY_SIZE(exynos4_gpios_1);</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='del'>-			if (!chip-&gt;config) {</div><div class='del'>-				chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='del'>-				chip-&gt;group = group++;</div><div class='del'>-			}</div><div class='del'>-			exynos_gpiolib_attach_ofnode(chip,</div><div class='del'>-					EXYNOS4_PA_GPIO1, i * 0x20);</div><div class='del'>-		}</div><div class='del'>-		samsung_gpiolib_add_4bit_chips(exynos4_gpios_1,</div><div class='del'>-					       nr_chips, gpio_base1);</div><div class='del'>-</div><div class='del'>-		/* gpio part2 */</div><div class='del'>-		gpio_base2 = ioremap(EXYNOS4_PA_GPIO2, SZ_4K);</div><div class='del'>-		if (gpio_base2 == NULL) {</div><div class='del'>-			pr_err("unable to ioremap for gpio_base2\n");</div><div class='del'>-			goto err_ioremap2;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* need to set base address for gpx */</div><div class='del'>-		chip = &amp;exynos4_gpios_2[16];</div><div class='del'>-		gpx_base = gpio_base2 + 0xC00;</div><div class='del'>-		for (i = 0; i &lt; 4; i++, chip++, gpx_base += 0x20)</div><div class='del'>-			chip-&gt;base = gpx_base;</div><div class='del'>-</div><div class='del'>-		chip = exynos4_gpios_2;</div><div class='del'>-		nr_chips = ARRAY_SIZE(exynos4_gpios_2);</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='del'>-			if (!chip-&gt;config) {</div><div class='del'>-				chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='del'>-				chip-&gt;group = group++;</div><div class='del'>-			}</div><div class='del'>-			exynos_gpiolib_attach_ofnode(chip,</div><div class='del'>-					EXYNOS4_PA_GPIO2, i * 0x20);</div><div class='del'>-		}</div><div class='del'>-		samsung_gpiolib_add_4bit_chips(exynos4_gpios_2,</div><div class='del'>-					       nr_chips, gpio_base2);</div><div class='del'>-</div><div class='del'>-		/* gpio part3 */</div><div class='del'>-		gpio_base3 = ioremap(EXYNOS4_PA_GPIO3, SZ_256);</div><div class='del'>-		if (gpio_base3 == NULL) {</div><div class='del'>-			pr_err("unable to ioremap for gpio_base3\n");</div><div class='del'>-			goto err_ioremap3;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		chip = exynos4_gpios_3;</div><div class='del'>-		nr_chips = ARRAY_SIZE(exynos4_gpios_3);</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='del'>-			if (!chip-&gt;config) {</div><div class='del'>-				chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='del'>-				chip-&gt;group = group++;</div><div class='del'>-			}</div><div class='del'>-			exynos_gpiolib_attach_ofnode(chip,</div><div class='del'>-					EXYNOS4_PA_GPIO3, i * 0x20);</div><div class='del'>-		}</div><div class='del'>-		samsung_gpiolib_add_4bit_chips(exynos4_gpios_3,</div><div class='del'>-					       nr_chips, gpio_base3);</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_CPU_EXYNOS4210) &amp;&amp; defined(CONFIG_S5P_GPIO_INT)</div><div class='del'>-		s5p_register_gpioint_bank(IRQ_GPIO_XA, 0, IRQ_GPIO1_NR_GROUPS);</div><div class='del'>-		s5p_register_gpioint_bank(IRQ_GPIO_XB, IRQ_GPIO1_NR_GROUPS, IRQ_GPIO2_NR_GROUPS);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif	/* CONFIG_CPU_EXYNOS4210 */</div><div class='add'>+		exynos4_gpiolib_init();</div><div class='ctx'> 	} else if (soc_is_exynos5250()) {</div><div class='del'>-#ifdef CONFIG_SOC_EXYNOS5250</div><div class='del'>-		void __iomem *gpx_base;</div><div class='del'>-</div><div class='del'>-		/* gpio part1 */</div><div class='del'>-		gpio_base1 = ioremap(EXYNOS5_PA_GPIO1, SZ_4K);</div><div class='del'>-		if (gpio_base1 == NULL) {</div><div class='del'>-			pr_err("unable to ioremap for gpio_base1\n");</div><div class='del'>-			goto err_ioremap1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* need to set base address for gpx */</div><div class='del'>-		chip = &amp;exynos5_gpios_1[20];</div><div class='del'>-		gpx_base = gpio_base1 + 0xC00;</div><div class='del'>-		for (i = 0; i &lt; 4; i++, chip++, gpx_base += 0x20)</div><div class='del'>-			chip-&gt;base = gpx_base;</div><div class='del'>-</div><div class='del'>-		chip = exynos5_gpios_1;</div><div class='del'>-		nr_chips = ARRAY_SIZE(exynos5_gpios_1);</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='del'>-			if (!chip-&gt;config) {</div><div class='del'>-				chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='del'>-				chip-&gt;group = group++;</div><div class='del'>-			}</div><div class='del'>-			exynos_gpiolib_attach_ofnode(chip,</div><div class='del'>-					EXYNOS5_PA_GPIO1, i * 0x20);</div><div class='del'>-		}</div><div class='del'>-		samsung_gpiolib_add_4bit_chips(exynos5_gpios_1,</div><div class='del'>-					       nr_chips, gpio_base1);</div><div class='del'>-</div><div class='del'>-		/* gpio part2 */</div><div class='del'>-		gpio_base2 = ioremap(EXYNOS5_PA_GPIO2, SZ_4K);</div><div class='del'>-		if (gpio_base2 == NULL) {</div><div class='del'>-			pr_err("unable to ioremap for gpio_base2\n");</div><div class='del'>-			goto err_ioremap2;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		chip = exynos5_gpios_2;</div><div class='del'>-		nr_chips = ARRAY_SIZE(exynos5_gpios_2);</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='del'>-			if (!chip-&gt;config) {</div><div class='del'>-				chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='del'>-				chip-&gt;group = group++;</div><div class='del'>-			}</div><div class='del'>-			exynos_gpiolib_attach_ofnode(chip,</div><div class='del'>-					EXYNOS5_PA_GPIO2, i * 0x20);</div><div class='del'>-		}</div><div class='del'>-		samsung_gpiolib_add_4bit_chips(exynos5_gpios_2,</div><div class='del'>-					       nr_chips, gpio_base2);</div><div class='del'>-</div><div class='del'>-		/* gpio part3 */</div><div class='del'>-		gpio_base3 = ioremap(EXYNOS5_PA_GPIO3, SZ_4K);</div><div class='del'>-		if (gpio_base3 == NULL) {</div><div class='del'>-			pr_err("unable to ioremap for gpio_base3\n");</div><div class='del'>-			goto err_ioremap3;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* need to set base address for gpv */</div><div class='del'>-		exynos5_gpios_3[0].base = gpio_base3;</div><div class='del'>-		exynos5_gpios_3[1].base = gpio_base3 + 0x20;</div><div class='del'>-		exynos5_gpios_3[2].base = gpio_base3 + 0x60;</div><div class='del'>-		exynos5_gpios_3[3].base = gpio_base3 + 0x80;</div><div class='del'>-		exynos5_gpios_3[4].base = gpio_base3 + 0xC0;</div><div class='del'>-</div><div class='del'>-		chip = exynos5_gpios_3;</div><div class='del'>-		nr_chips = ARRAY_SIZE(exynos5_gpios_3);</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='del'>-			if (!chip-&gt;config) {</div><div class='del'>-				chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='del'>-				chip-&gt;group = group++;</div><div class='del'>-			}</div><div class='del'>-			exynos_gpiolib_attach_ofnode(chip,</div><div class='del'>-					EXYNOS5_PA_GPIO3, i * 0x20);</div><div class='del'>-		}</div><div class='del'>-		samsung_gpiolib_add_4bit_chips(exynos5_gpios_3,</div><div class='del'>-					       nr_chips, gpio_base3);</div><div class='del'>-</div><div class='del'>-		/* gpio part4 */</div><div class='del'>-		gpio_base4 = ioremap(EXYNOS5_PA_GPIO4, SZ_4K);</div><div class='del'>-		if (gpio_base4 == NULL) {</div><div class='del'>-			pr_err("unable to ioremap for gpio_base4\n");</div><div class='del'>-			goto err_ioremap4;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		chip = exynos5_gpios_4;</div><div class='del'>-		nr_chips = ARRAY_SIZE(exynos5_gpios_4);</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; nr_chips; i++, chip++) {</div><div class='del'>-			if (!chip-&gt;config) {</div><div class='del'>-				chip-&gt;config = &amp;exynos_gpio_cfg;</div><div class='del'>-				chip-&gt;group = group++;</div><div class='del'>-			}</div><div class='del'>-			exynos_gpiolib_attach_ofnode(chip,</div><div class='del'>-					EXYNOS5_PA_GPIO4, i * 0x20);</div><div class='del'>-		}</div><div class='del'>-		samsung_gpiolib_add_4bit_chips(exynos5_gpios_4,</div><div class='del'>-					       nr_chips, gpio_base4);</div><div class='del'>-#endif	/* CONFIG_SOC_EXYNOS5250 */</div><div class='add'>+		exynos5_gpiolib_init();</div><div class='ctx'> 	} else {</div><div class='ctx'> 		WARN(1, "Unknown SoC in gpio-samsung, no GPIOs added\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err_ioremap4:</div><div class='del'>-	iounmap(gpio_base3);</div><div class='del'>-err_ioremap3:</div><div class='del'>-	iounmap(gpio_base2);</div><div class='del'>-err_ioremap2:</div><div class='del'>-	iounmap(gpio_base1);</div><div class='del'>-err_ioremap1:</div><div class='del'>-	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> core_initcall(samsung_gpiolib_init);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c<br/>index 8cadf4d683a8..424dce8e3f30 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-sch.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-sch.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-sch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-sch.c</a></div><div class='hunk'>@@ -232,6 +232,14 @@ static int __devinit sch_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 			sch_gpio_resume.ngpio = 9;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case PCI_DEVICE_ID_INTEL_CENTERTON_ILB:</div><div class='add'>+			sch_gpio_core.base = 0;</div><div class='add'>+			sch_gpio_core.ngpio = 21;</div><div class='add'>+</div><div class='add'>+			sch_gpio_resume.base = 21;</div><div class='add'>+			sch_gpio_resume.ngpio = 9;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		default:</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c<br/>index 031e5d24837d..9d9891f7a607 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-sodaville.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-sodaville.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-sodaville.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-sodaville.c</a></div><div class='hunk'>@@ -224,7 +224,7 @@ static int __devinit sdv_gpio_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	ret = bgpio_init(&amp;sd-&gt;bgpio, &amp;pdev-&gt;dev, 4,</div><div class='ctx'> 			sd-&gt;gpio_pub_base + GPINR, sd-&gt;gpio_pub_base + GPOUTR,</div><div class='del'>-			NULL, sd-&gt;gpio_pub_base + GPOER, NULL, false);</div><div class='add'>+			NULL, sd-&gt;gpio_pub_base + GPOER, NULL, 0);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unmap;</div><div class='ctx'> 	sd-&gt;bgpio.gc.ngpio = SDV_NUM_PUB_GPIOS;</div><div class='hunk'>@@ -282,17 +282,7 @@ static struct pci_driver sdv_gpio_driver = {</div><div class='ctx'> 	.remove = sdv_gpio_remove,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init sdv_gpio_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;sdv_gpio_driver);</div><div class='del'>-}</div><div class='del'>-module_init(sdv_gpio_init);</div><div class='del'>-</div><div class='del'>-static void __exit sdv_gpio_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;sdv_gpio_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(sdv_gpio_exit);</div><div class='add'>+module_pci_driver(sdv_gpio_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Hans J. Koch &lt;hjk@linutronix.de&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("GPIO interface for Intel Sodaville SoCs");</div><div class='head'>diff --git a/drivers/gpio/gpio-sta2x11.c b/drivers/gpio/gpio-sta2x11.c<br/>new file mode 100644<br/>index 000000000000..38416be8ba11<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-sta2x11.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-sta2x11.c</a></div><div class='hunk'>@@ -0,0 +1,435 @@</div><div class='add'>+/*</div><div class='add'>+ * STMicroelectronics ConneXt (STA2X11) GPIO driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 ST Microelectronics (Alessandro Rubini)</div><div class='add'>+ * Based on gpio-ml-ioh.c, Copyright 2010 OKI Semiconductors Ltd.</div><div class='add'>+ * Also based on previous sta2x11 work, Copyright 2011 Wind River Systems, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.</div><div class='add'>+ * See the GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mfd/sta2x11-mfd.h&gt;</div><div class='add'>+</div><div class='add'>+struct gsta_regs {</div><div class='add'>+	u32 dat;		/* 0x00 */</div><div class='add'>+	u32 dats;</div><div class='add'>+	u32 datc;</div><div class='add'>+	u32 pdis;</div><div class='add'>+	u32 dir;		/* 0x10 */</div><div class='add'>+	u32 dirs;</div><div class='add'>+	u32 dirc;</div><div class='add'>+	u32 unused_1c;</div><div class='add'>+	u32 afsela;		/* 0x20 */</div><div class='add'>+	u32 unused_24[7];</div><div class='add'>+	u32 rimsc;		/* 0x40 */</div><div class='add'>+	u32 fimsc;</div><div class='add'>+	u32 is;</div><div class='add'>+	u32 ic;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gsta_gpio {</div><div class='add'>+	spinlock_t			lock;</div><div class='add'>+	struct device			*dev;</div><div class='add'>+	void __iomem			*reg_base;</div><div class='add'>+	struct gsta_regs __iomem	*regs[GSTA_NR_BLOCKS];</div><div class='add'>+	struct gpio_chip		gpio;</div><div class='add'>+	int				irq_base;</div><div class='add'>+	/* FIXME: save the whole config here (AF, ...) */</div><div class='add'>+	unsigned			irq_type[GSTA_NR_GPIO];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct gsta_regs __iomem *__regs(struct gsta_gpio *chip, int nr)</div><div class='add'>+{</div><div class='add'>+	return chip-&gt;regs[nr / GSTA_GPIO_PER_BLOCK];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 __bit(int nr)</div><div class='add'>+{</div><div class='add'>+	return 1U &lt;&lt; (nr % GSTA_GPIO_PER_BLOCK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * gpio methods</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void gsta_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)</div><div class='add'>+{</div><div class='add'>+	struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio);</div><div class='add'>+	struct gsta_regs __iomem *regs = __regs(chip, nr);</div><div class='add'>+	u32 bit = __bit(nr);</div><div class='add'>+</div><div class='add'>+	if (val)</div><div class='add'>+		writel(bit, &amp;regs-&gt;dats);</div><div class='add'>+	else</div><div class='add'>+		writel(bit, &amp;regs-&gt;datc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsta_gpio_get(struct gpio_chip *gpio, unsigned nr)</div><div class='add'>+{</div><div class='add'>+	struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio);</div><div class='add'>+	struct gsta_regs __iomem *regs = __regs(chip, nr);</div><div class='add'>+	u32 bit = __bit(nr);</div><div class='add'>+</div><div class='add'>+	return readl(&amp;regs-&gt;dat) &amp; bit;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsta_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,</div><div class='add'>+				      int val)</div><div class='add'>+{</div><div class='add'>+	struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio);</div><div class='add'>+	struct gsta_regs __iomem *regs = __regs(chip, nr);</div><div class='add'>+	u32 bit = __bit(nr);</div><div class='add'>+</div><div class='add'>+	writel(bit, &amp;regs-&gt;dirs);</div><div class='add'>+	/* Data register after direction, otherwise pullup/down is selected */</div><div class='add'>+	if (val)</div><div class='add'>+		writel(bit, &amp;regs-&gt;dats);</div><div class='add'>+	else</div><div class='add'>+		writel(bit, &amp;regs-&gt;datc);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsta_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)</div><div class='add'>+{</div><div class='add'>+	struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio);</div><div class='add'>+	struct gsta_regs __iomem *regs = __regs(chip, nr);</div><div class='add'>+	u32 bit = __bit(nr);</div><div class='add'>+</div><div class='add'>+	writel(bit, &amp;regs-&gt;dirc);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsta_gpio_to_irq(struct gpio_chip *gpio, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	struct gsta_gpio *chip = container_of(gpio, struct gsta_gpio, gpio);</div><div class='add'>+	return chip-&gt;irq_base + offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsta_gpio_setup(struct gsta_gpio *chip) /* called from probe */</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gpio = &amp;chip-&gt;gpio;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * ARCH_NR_GPIOS is currently 256 and dynamic allocation starts</div><div class='add'>+	 * from the end. However, for compatibility, we need the first</div><div class='add'>+	 * ConneXt device to start from gpio 0: it's the main chipset</div><div class='add'>+	 * on most boards so documents and drivers assume gpio0..gpio127</div><div class='add'>+	 */</div><div class='add'>+	static int gpio_base;</div><div class='add'>+</div><div class='add'>+	gpio-&gt;label = dev_name(chip-&gt;dev);</div><div class='add'>+	gpio-&gt;owner = THIS_MODULE;</div><div class='add'>+	gpio-&gt;direction_input = gsta_gpio_direction_input;</div><div class='add'>+	gpio-&gt;get = gsta_gpio_get;</div><div class='add'>+	gpio-&gt;direction_output = gsta_gpio_direction_output;</div><div class='add'>+	gpio-&gt;set = gsta_gpio_set;</div><div class='add'>+	gpio-&gt;dbg_show = NULL;</div><div class='add'>+	gpio-&gt;base = gpio_base;</div><div class='add'>+	gpio-&gt;ngpio = GSTA_NR_GPIO;</div><div class='add'>+	gpio-&gt;can_sleep = 0;</div><div class='add'>+	gpio-&gt;to_irq = gsta_gpio_to_irq;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * After the first device, turn to dynamic gpio numbers.</div><div class='add'>+	 * For example, with ARCH_NR_GPIOS = 256 we can fit two cards</div><div class='add'>+	 */</div><div class='add'>+	if (!gpio_base)</div><div class='add'>+		gpio_base = -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Special method: alternate functions and pullup/pulldown. This is only</div><div class='add'>+ * invoked on startup to configure gpio's according to platform data.</div><div class='add'>+ * FIXME : this functionality shall be managed (and exported to other drivers)</div><div class='add'>+ * via the pin control subsystem.</div><div class='add'>+ */</div><div class='add'>+static void gsta_set_config(struct gsta_gpio *chip, int nr, unsigned cfg)</div><div class='add'>+{</div><div class='add'>+	struct gsta_regs __iomem *regs = __regs(chip, nr);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 bit = __bit(nr);</div><div class='add'>+	u32 val;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	pr_info("%s: %p %i %i\n", __func__, chip, nr, cfg);</div><div class='add'>+</div><div class='add'>+	if (cfg == PINMUX_TYPE_NONE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Alternate function or not? */</div><div class='add'>+	spin_lock_irqsave(&amp;chip-&gt;lock, flags);</div><div class='add'>+	val = readl(&amp;regs-&gt;afsela);</div><div class='add'>+	if (cfg == PINMUX_TYPE_FUNCTION)</div><div class='add'>+		val |= bit;</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~bit;</div><div class='add'>+	writel(val | bit, &amp;regs-&gt;afsela);</div><div class='add'>+	if (cfg == PINMUX_TYPE_FUNCTION) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;chip-&gt;lock, flags);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* not alternate function: set details */</div><div class='add'>+	switch (cfg) {</div><div class='add'>+	case PINMUX_TYPE_OUTPUT_LOW:</div><div class='add'>+		writel(bit, &amp;regs-&gt;dirs);</div><div class='add'>+		writel(bit, &amp;regs-&gt;datc);</div><div class='add'>+		break;</div><div class='add'>+	case PINMUX_TYPE_OUTPUT_HIGH:</div><div class='add'>+		writel(bit, &amp;regs-&gt;dirs);</div><div class='add'>+		writel(bit, &amp;regs-&gt;dats);</div><div class='add'>+		break;</div><div class='add'>+	case PINMUX_TYPE_INPUT:</div><div class='add'>+		writel(bit, &amp;regs-&gt;dirc);</div><div class='add'>+		val = readl(&amp;regs-&gt;pdis) | bit;</div><div class='add'>+		writel(val, &amp;regs-&gt;pdis);</div><div class='add'>+		break;</div><div class='add'>+	case PINMUX_TYPE_INPUT_PULLUP:</div><div class='add'>+		writel(bit, &amp;regs-&gt;dirc);</div><div class='add'>+		val = readl(&amp;regs-&gt;pdis) &amp; ~bit;</div><div class='add'>+		writel(val, &amp;regs-&gt;pdis);</div><div class='add'>+		writel(bit, &amp;regs-&gt;dats);</div><div class='add'>+		break;</div><div class='add'>+	case PINMUX_TYPE_INPUT_PULLDOWN:</div><div class='add'>+		writel(bit, &amp;regs-&gt;dirc);</div><div class='add'>+		val = readl(&amp;regs-&gt;pdis) &amp; ~bit;</div><div class='add'>+		writel(val, &amp;regs-&gt;pdis);</div><div class='add'>+		writel(bit, &amp;regs-&gt;datc);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = 1;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;chip-&gt;lock, flags);</div><div class='add'>+	if (err)</div><div class='add'>+		pr_err("%s: chip %p, pin %i, cfg %i is invalid\n",</div><div class='add'>+		       __func__, chip, nr, cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Irq methods</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void gsta_irq_disable(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);</div><div class='add'>+	struct gsta_gpio *chip = gc-&gt;private;</div><div class='add'>+	int nr = data-&gt;irq - chip-&gt;irq_base;</div><div class='add'>+	struct gsta_regs __iomem *regs = __regs(chip, nr);</div><div class='add'>+	u32 bit = __bit(nr);</div><div class='add'>+	u32 val;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;chip-&gt;lock, flags);</div><div class='add'>+	if (chip-&gt;irq_type[nr] &amp; IRQ_TYPE_EDGE_RISING) {</div><div class='add'>+		val = readl(&amp;regs-&gt;rimsc) &amp; ~bit;</div><div class='add'>+		writel(val, &amp;regs-&gt;rimsc);</div><div class='add'>+	}</div><div class='add'>+	if (chip-&gt;irq_type[nr] &amp; IRQ_TYPE_EDGE_FALLING) {</div><div class='add'>+		val = readl(&amp;regs-&gt;fimsc) &amp; ~bit;</div><div class='add'>+		writel(val, &amp;regs-&gt;fimsc);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;chip-&gt;lock, flags);</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsta_irq_enable(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);</div><div class='add'>+	struct gsta_gpio *chip = gc-&gt;private;</div><div class='add'>+	int nr = data-&gt;irq - chip-&gt;irq_base;</div><div class='add'>+	struct gsta_regs __iomem *regs = __regs(chip, nr);</div><div class='add'>+	u32 bit = __bit(nr);</div><div class='add'>+	u32 val;</div><div class='add'>+	int type;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	type = chip-&gt;irq_type[nr];</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;chip-&gt;lock, flags);</div><div class='add'>+	val = readl(&amp;regs-&gt;rimsc);</div><div class='add'>+	if (type &amp; IRQ_TYPE_EDGE_RISING)</div><div class='add'>+		writel(val | bit, &amp;regs-&gt;rimsc);</div><div class='add'>+	else</div><div class='add'>+		writel(val &amp; ~bit, &amp;regs-&gt;rimsc);</div><div class='add'>+	val = readl(&amp;regs-&gt;rimsc);</div><div class='add'>+	if (type &amp; IRQ_TYPE_EDGE_FALLING)</div><div class='add'>+		writel(val | bit, &amp;regs-&gt;fimsc);</div><div class='add'>+	else</div><div class='add'>+		writel(val &amp; ~bit, &amp;regs-&gt;fimsc);</div><div class='add'>+	spin_unlock_irqrestore(&amp;chip-&gt;lock, flags);</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsta_irq_type(struct irq_data *d, unsigned int type)</div><div class='add'>+{</div><div class='add'>+	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct gsta_gpio *chip = gc-&gt;private;</div><div class='add'>+	int nr = d-&gt;irq - chip-&gt;irq_base;</div><div class='add'>+</div><div class='add'>+	/* We only support edge interrupts */</div><div class='add'>+	if (!(type &amp; (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))) {</div><div class='add'>+		pr_debug("%s: unsupported type 0x%x\n", __func__, type);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip-&gt;irq_type[nr] = type; /* used for enable/disable */</div><div class='add'>+</div><div class='add'>+	gsta_irq_enable(d);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t gsta_gpio_handler(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct gsta_gpio *chip = dev_id;</div><div class='add'>+	struct gsta_regs __iomem *regs;</div><div class='add'>+	u32 is;</div><div class='add'>+	int i, nr, base;</div><div class='add'>+	irqreturn_t ret = IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; GSTA_NR_BLOCKS; i++) {</div><div class='add'>+		regs = chip-&gt;regs[i];</div><div class='add'>+		base = chip-&gt;irq_base + i * GSTA_GPIO_PER_BLOCK;</div><div class='add'>+		while ((is = readl(&amp;regs-&gt;is))) {</div><div class='add'>+			nr = __ffs(is);</div><div class='add'>+			irq = base + nr;</div><div class='add'>+			generic_handle_irq(irq);</div><div class='add'>+			writel(1 &lt;&lt; nr, &amp;regs-&gt;ic);</div><div class='add'>+			ret = IRQ_HANDLED;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __devinit void gsta_alloc_irq_chip(struct gsta_gpio *chip)</div><div class='add'>+{</div><div class='add'>+	struct irq_chip_generic *gc;</div><div class='add'>+	struct irq_chip_type *ct;</div><div class='add'>+</div><div class='add'>+	gc = irq_alloc_generic_chip(KBUILD_MODNAME, 1, chip-&gt;irq_base,</div><div class='add'>+				     chip-&gt;reg_base, handle_simple_irq);</div><div class='add'>+	gc-&gt;private = chip;</div><div class='add'>+	ct = gc-&gt;chip_types;</div><div class='add'>+</div><div class='add'>+	ct-&gt;chip.irq_set_type = gsta_irq_type;</div><div class='add'>+	ct-&gt;chip.irq_disable = gsta_irq_disable;</div><div class='add'>+	ct-&gt;chip.irq_enable = gsta_irq_enable;</div><div class='add'>+</div><div class='add'>+	/* FIXME: this makes at most 32 interrupts. Request 0 by now */</div><div class='add'>+	irq_setup_generic_chip(gc, 0 /* IRQ_MSK(GSTA_GPIO_PER_BLOCK) */, 0,</div><div class='add'>+			       IRQ_NOREQUEST | IRQ_NOPROBE, 0);</div><div class='add'>+</div><div class='add'>+	/* Set up all all 128 interrupts: code from setup_generic_chip */</div><div class='add'>+	{</div><div class='add'>+		struct irq_chip_type *ct = gc-&gt;chip_types;</div><div class='add'>+		int i, j;</div><div class='add'>+		for (j = 0; j &lt; GSTA_NR_GPIO; j++) {</div><div class='add'>+			i = chip-&gt;irq_base + j;</div><div class='add'>+			irq_set_chip_and_handler(i, &amp;ct-&gt;chip, ct-&gt;handler);</div><div class='add'>+			irq_set_chip_data(i, gc);</div><div class='add'>+			irq_modify_status(i, IRQ_NOREQUEST | IRQ_NOPROBE, 0);</div><div class='add'>+		}</div><div class='add'>+		gc-&gt;irq_cnt = i - gc-&gt;irq_base;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The platform device used here is instantiated by the MFD device */</div><div class='add'>+static int __devinit gsta_probe(struct platform_device *dev)</div><div class='add'>+{</div><div class='add'>+	int i, err;</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	struct sta2x11_gpio_pdata *gpio_pdata;</div><div class='add'>+	struct gsta_gpio *chip;</div><div class='add'>+	struct resource *res;</div><div class='add'>+</div><div class='add'>+	pdev = *(struct pci_dev **)(dev-&gt;dev.platform_data);</div><div class='add'>+	gpio_pdata = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (gpio_pdata == NULL)</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "no gpio config\n");</div><div class='add'>+	pr_debug("gpio config: %p\n", gpio_pdata);</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(dev, IORESOURCE_MEM, 0);</div><div class='add'>+</div><div class='add'>+	chip = devm_kzalloc(&amp;dev-&gt;dev, sizeof(*chip), GFP_KERNEL);</div><div class='add'>+	chip-&gt;dev = &amp;dev-&gt;dev;</div><div class='add'>+	chip-&gt;reg_base = devm_request_and_ioremap(&amp;dev-&gt;dev, res);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; GSTA_NR_BLOCKS; i++) {</div><div class='add'>+		chip-&gt;regs[i] = chip-&gt;reg_base + i * 4096;</div><div class='add'>+		/* disable all irqs */</div><div class='add'>+		writel(0, &amp;chip-&gt;regs[i]-&gt;rimsc);</div><div class='add'>+		writel(0, &amp;chip-&gt;regs[i]-&gt;fimsc);</div><div class='add'>+		writel(~0, &amp;chip-&gt;regs[i]-&gt;ic);</div><div class='add'>+	}</div><div class='add'>+	spin_lock_init(&amp;chip-&gt;lock);</div><div class='add'>+	gsta_gpio_setup(chip);</div><div class='add'>+	for (i = 0; i &lt; GSTA_NR_GPIO; i++)</div><div class='add'>+		gsta_set_config(chip, i, gpio_pdata-&gt;pinconfig[i]);</div><div class='add'>+</div><div class='add'>+	/* 384 was used in previous code: be compatible for other drivers */</div><div class='add'>+	err = irq_alloc_descs(-1, 384, GSTA_NR_GPIO, NUMA_NO_NODE);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_warn(&amp;dev-&gt;dev, "sta2x11 gpio: Can't get irq base (%i)\n",</div><div class='add'>+			 -err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	chip-&gt;irq_base = err;</div><div class='add'>+	gsta_alloc_irq_chip(chip);</div><div class='add'>+</div><div class='add'>+	err = request_irq(pdev-&gt;irq, gsta_gpio_handler,</div><div class='add'>+			     IRQF_SHARED, KBUILD_MODNAME, chip);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "sta2x11 gpio: Can't request irq (%i)\n",</div><div class='add'>+			-err);</div><div class='add'>+		goto err_free_descs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = gpiochip_add(&amp;chip-&gt;gpio);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "sta2x11 gpio: Can't register (%i)\n",</div><div class='add'>+			-err);</div><div class='add'>+		goto err_free_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(dev, chip);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irq:</div><div class='add'>+	free_irq(pdev-&gt;irq, chip);</div><div class='add'>+err_free_descs:</div><div class='add'>+	irq_free_descs(chip-&gt;irq_base, GSTA_NR_GPIO);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver sta2x11_gpio_platform_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "sta2x11-gpio",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe = gsta_probe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(sta2x11_gpio_platform_driver);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_DESCRIPTION("sta2x11_gpio GPIO driver");</div><div class='head'>diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c<br/>new file mode 100644<br/>index 000000000000..e35096bf3cfb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-stp-xway.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-stp-xway.c</a></div><div class='hunk'>@@ -0,0 +1,301 @@</div><div class='add'>+/*</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012 John Crispin &lt;blogic@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of_gpio.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;lantiq_soc.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a</div><div class='add'>+ * peripheral controller used to drive external shift register cascades. At most</div><div class='add'>+ * 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem</div><div class='add'>+ * to drive the 2 LSBs of the cascade automatically.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* control register 0 */</div><div class='add'>+#define XWAY_STP_CON0		0x00</div><div class='add'>+/* control register 1 */</div><div class='add'>+#define XWAY_STP_CON1		0x04</div><div class='add'>+/* data register 0 */</div><div class='add'>+#define XWAY_STP_CPU0		0x08</div><div class='add'>+/* data register 1 */</div><div class='add'>+#define XWAY_STP_CPU1		0x0C</div><div class='add'>+/* access register */</div><div class='add'>+#define XWAY_STP_AR		0x10</div><div class='add'>+</div><div class='add'>+/* software or hardware update select bit */</div><div class='add'>+#define XWAY_STP_CON_SWU	BIT(31)</div><div class='add'>+</div><div class='add'>+/* automatic update rates */</div><div class='add'>+#define XWAY_STP_2HZ		0</div><div class='add'>+#define XWAY_STP_4HZ		BIT(23)</div><div class='add'>+#define XWAY_STP_8HZ		BIT(24)</div><div class='add'>+#define XWAY_STP_10HZ		(BIT(24) | BIT(23))</div><div class='add'>+#define XWAY_STP_SPEED_MASK	(0xf &lt;&lt; 23)</div><div class='add'>+</div><div class='add'>+/* clock source for automatic update */</div><div class='add'>+#define XWAY_STP_UPD_FPI	BIT(31)</div><div class='add'>+#define XWAY_STP_UPD_MASK	(BIT(31) | BIT(30))</div><div class='add'>+</div><div class='add'>+/* let the adsl core drive the 2 LSBs */</div><div class='add'>+#define XWAY_STP_ADSL_SHIFT	24</div><div class='add'>+#define XWAY_STP_ADSL_MASK	0x3</div><div class='add'>+</div><div class='add'>+/* 2 groups of 3 bits can be driven by the phys */</div><div class='add'>+#define XWAY_STP_PHY_MASK	0x3</div><div class='add'>+#define XWAY_STP_PHY1_SHIFT	27</div><div class='add'>+#define XWAY_STP_PHY2_SHIFT	15</div><div class='add'>+</div><div class='add'>+/* STP has 3 groups of 8 bits */</div><div class='add'>+#define XWAY_STP_GROUP0		BIT(0)</div><div class='add'>+#define XWAY_STP_GROUP1		BIT(1)</div><div class='add'>+#define XWAY_STP_GROUP2		BIT(2)</div><div class='add'>+#define XWAY_STP_GROUP_MASK	(0x7)</div><div class='add'>+</div><div class='add'>+/* Edge configuration bits */</div><div class='add'>+#define XWAY_STP_FALLING	BIT(26)</div><div class='add'>+#define XWAY_STP_EDGE_MASK	BIT(26)</div><div class='add'>+</div><div class='add'>+#define xway_stp_r32(m, reg)		__raw_readl(m + reg)</div><div class='add'>+#define xway_stp_w32(m, val, reg)	__raw_writel(val, m + reg)</div><div class='add'>+#define xway_stp_w32_mask(m, clear, set, reg) \</div><div class='add'>+		ltq_w32((ltq_r32(m + reg) &amp; ~(clear)) | (set), \</div><div class='add'>+		m + reg)</div><div class='add'>+</div><div class='add'>+struct xway_stp {</div><div class='add'>+	struct gpio_chip gc;</div><div class='add'>+	void __iomem *virt;</div><div class='add'>+	u32 edge;	/* rising or falling edge triggered shift register */</div><div class='add'>+	u16 shadow;	/* shadow the shift registers state */</div><div class='add'>+	u8 groups;	/* we can drive 1-3 groups of 8bit each */</div><div class='add'>+	u8 dsl;		/* the 2 LSBs can be driven by the dsl core */</div><div class='add'>+	u8 phy1;	/* 3 bits can be driven by phy1 */</div><div class='add'>+	u8 phy2;	/* 3 bits can be driven by phy2 */</div><div class='add'>+	u8 reserved;	/* mask out the hw driven bits in gpio_request */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * xway_stp_set() - gpio_chip-&gt;set - set gpios.</div><div class='add'>+ * @gc:     Pointer to gpio_chip device structure.</div><div class='add'>+ * @gpio:   GPIO signal number.</div><div class='add'>+ * @val:    Value to be written to specified signal.</div><div class='add'>+ *</div><div class='add'>+ * Set the shadow value and call ltq_ebu_apply.</div><div class='add'>+ */</div><div class='add'>+static void xway_stp_set(struct gpio_chip *gc, unsigned gpio, int val)</div><div class='add'>+{</div><div class='add'>+	struct xway_stp *chip =</div><div class='add'>+		container_of(gc, struct xway_stp, gc);</div><div class='add'>+</div><div class='add'>+	if (val)</div><div class='add'>+		chip-&gt;shadow |= BIT(gpio);</div><div class='add'>+	else</div><div class='add'>+		chip-&gt;shadow &amp;= ~BIT(gpio);</div><div class='add'>+	xway_stp_w32(chip-&gt;virt, chip-&gt;shadow, XWAY_STP_CPU0);</div><div class='add'>+	xway_stp_w32_mask(chip-&gt;virt, 0, XWAY_STP_CON_SWU, XWAY_STP_CON0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * xway_stp_dir_out() - gpio_chip-&gt;dir_out - set gpio direction.</div><div class='add'>+ * @gc:     Pointer to gpio_chip device structure.</div><div class='add'>+ * @gpio:   GPIO signal number.</div><div class='add'>+ * @val:    Value to be written to specified signal.</div><div class='add'>+ *</div><div class='add'>+ * Same as xway_stp_set, always returns 0.</div><div class='add'>+ */</div><div class='add'>+static int xway_stp_dir_out(struct gpio_chip *gc, unsigned gpio, int val)</div><div class='add'>+{</div><div class='add'>+	xway_stp_set(gc, gpio, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * xway_stp_request() - gpio_chip-&gt;request</div><div class='add'>+ * @gc:     Pointer to gpio_chip device structure.</div><div class='add'>+ * @gpio:   GPIO signal number.</div><div class='add'>+ *</div><div class='add'>+ * We mask out the HW driven pins</div><div class='add'>+ */</div><div class='add'>+static int xway_stp_request(struct gpio_chip *gc, unsigned gpio)</div><div class='add'>+{</div><div class='add'>+	struct xway_stp *chip =</div><div class='add'>+		container_of(gc, struct xway_stp, gc);</div><div class='add'>+</div><div class='add'>+	if ((gpio &lt; 8) &amp;&amp; (chip-&gt;reserved &amp; BIT(gpio))) {</div><div class='add'>+		dev_err(gc-&gt;dev, "GPIO %d is driven by hardware\n", gpio);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * xway_stp_hw_init() - Configure the STP unit and enable the clock gate</div><div class='add'>+ * @virt: pointer to the remapped register range</div><div class='add'>+ */</div><div class='add'>+static int xway_stp_hw_init(struct xway_stp *chip)</div><div class='add'>+{</div><div class='add'>+	/* sane defaults */</div><div class='add'>+	xway_stp_w32(chip-&gt;virt, 0, XWAY_STP_AR);</div><div class='add'>+	xway_stp_w32(chip-&gt;virt, 0, XWAY_STP_CPU0);</div><div class='add'>+	xway_stp_w32(chip-&gt;virt, 0, XWAY_STP_CPU1);</div><div class='add'>+	xway_stp_w32(chip-&gt;virt, XWAY_STP_CON_SWU, XWAY_STP_CON0);</div><div class='add'>+	xway_stp_w32(chip-&gt;virt, 0, XWAY_STP_CON1);</div><div class='add'>+</div><div class='add'>+	/* apply edge trigger settings for the shift register */</div><div class='add'>+	xway_stp_w32_mask(chip-&gt;virt, XWAY_STP_EDGE_MASK,</div><div class='add'>+				chip-&gt;edge, XWAY_STP_CON0);</div><div class='add'>+</div><div class='add'>+	/* apply led group settings */</div><div class='add'>+	xway_stp_w32_mask(chip-&gt;virt, XWAY_STP_GROUP_MASK,</div><div class='add'>+				chip-&gt;groups, XWAY_STP_CON1);</div><div class='add'>+</div><div class='add'>+	/* tell the hardware which pins are controlled by the dsl modem */</div><div class='add'>+	xway_stp_w32_mask(chip-&gt;virt,</div><div class='add'>+			XWAY_STP_ADSL_MASK &lt;&lt; XWAY_STP_ADSL_SHIFT,</div><div class='add'>+			chip-&gt;dsl &lt;&lt; XWAY_STP_ADSL_SHIFT,</div><div class='add'>+			XWAY_STP_CON0);</div><div class='add'>+</div><div class='add'>+	/* tell the hardware which pins are controlled by the phys */</div><div class='add'>+	xway_stp_w32_mask(chip-&gt;virt,</div><div class='add'>+			XWAY_STP_PHY_MASK &lt;&lt; XWAY_STP_PHY1_SHIFT,</div><div class='add'>+			chip-&gt;phy1 &lt;&lt; XWAY_STP_PHY1_SHIFT,</div><div class='add'>+			XWAY_STP_CON0);</div><div class='add'>+	xway_stp_w32_mask(chip-&gt;virt,</div><div class='add'>+			XWAY_STP_PHY_MASK &lt;&lt; XWAY_STP_PHY2_SHIFT,</div><div class='add'>+			chip-&gt;phy2 &lt;&lt; XWAY_STP_PHY2_SHIFT,</div><div class='add'>+			XWAY_STP_CON1);</div><div class='add'>+</div><div class='add'>+	/* mask out the hw driven bits in gpio_request */</div><div class='add'>+	chip-&gt;reserved = (chip-&gt;phy2 &lt;&lt; 5) | (chip-&gt;phy1 &lt;&lt; 2) | chip-&gt;dsl;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * if we have pins that are driven by hw, we need to tell the stp what</div><div class='add'>+	 * clock to use as a timer.</div><div class='add'>+	 */</div><div class='add'>+	if (chip-&gt;reserved)</div><div class='add'>+		xway_stp_w32_mask(chip-&gt;virt, XWAY_STP_UPD_MASK,</div><div class='add'>+			XWAY_STP_UPD_FPI, XWAY_STP_CON1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit xway_stp_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	const __be32 *shadow, *groups, *dsl, *phy;</div><div class='add'>+	struct xway_stp *chip;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to request STP resource\n");</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*chip), GFP_KERNEL);</div><div class='add'>+	if (!chip)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	chip-&gt;virt = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='add'>+	if (!chip-&gt;virt) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to remap STP memory\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	chip-&gt;gc.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	chip-&gt;gc.label = "stp-xway";</div><div class='add'>+	chip-&gt;gc.direction_output = xway_stp_dir_out;</div><div class='add'>+	chip-&gt;gc.set = xway_stp_set;</div><div class='add'>+	chip-&gt;gc.request = xway_stp_request;</div><div class='add'>+	chip-&gt;gc.base = -1;</div><div class='add'>+	chip-&gt;gc.owner = THIS_MODULE;</div><div class='add'>+</div><div class='add'>+	/* store the shadow value if one was passed by the devicetree */</div><div class='add'>+	shadow = of_get_property(pdev-&gt;dev.of_node, "lantiq,shadow", NULL);</div><div class='add'>+	if (shadow)</div><div class='add'>+		chip-&gt;shadow = be32_to_cpu(*shadow);</div><div class='add'>+</div><div class='add'>+	/* find out which gpio groups should be enabled */</div><div class='add'>+	groups = of_get_property(pdev-&gt;dev.of_node, "lantiq,groups", NULL);</div><div class='add'>+	if (groups)</div><div class='add'>+		chip-&gt;groups = be32_to_cpu(*groups) &amp; XWAY_STP_GROUP_MASK;</div><div class='add'>+	else</div><div class='add'>+		chip-&gt;groups = XWAY_STP_GROUP0;</div><div class='add'>+	chip-&gt;gc.ngpio = fls(chip-&gt;groups) * 8;</div><div class='add'>+</div><div class='add'>+	/* find out which gpios are controlled by the dsl core */</div><div class='add'>+	dsl = of_get_property(pdev-&gt;dev.of_node, "lantiq,dsl", NULL);</div><div class='add'>+	if (dsl)</div><div class='add'>+		chip-&gt;dsl = be32_to_cpu(*dsl) &amp; XWAY_STP_ADSL_MASK;</div><div class='add'>+</div><div class='add'>+	/* find out which gpios are controlled by the phys */</div><div class='add'>+	if (of_machine_is_compatible("lantiq,ar9") ||</div><div class='add'>+			of_machine_is_compatible("lantiq,gr9") ||</div><div class='add'>+			of_machine_is_compatible("lantiq,vr9")) {</div><div class='add'>+		phy = of_get_property(pdev-&gt;dev.of_node, "lantiq,phy1", NULL);</div><div class='add'>+		if (phy)</div><div class='add'>+			chip-&gt;phy1 = be32_to_cpu(*phy) &amp; XWAY_STP_PHY_MASK;</div><div class='add'>+		phy = of_get_property(pdev-&gt;dev.of_node, "lantiq,phy2", NULL);</div><div class='add'>+		if (phy)</div><div class='add'>+			chip-&gt;phy2 = be32_to_cpu(*phy) &amp; XWAY_STP_PHY_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check which edge trigger we should use, default to a falling edge */</div><div class='add'>+	if (!of_find_property(pdev-&gt;dev.of_node, "lantiq,rising", NULL))</div><div class='add'>+		chip-&gt;edge = XWAY_STP_FALLING;</div><div class='add'>+</div><div class='add'>+	clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(clk)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to get clock\n");</div><div class='add'>+		return PTR_ERR(clk);</div><div class='add'>+	}</div><div class='add'>+	clk_enable(clk);</div><div class='add'>+</div><div class='add'>+	ret = xway_stp_hw_init(chip);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = gpiochip_add(&amp;chip-&gt;gc);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Init done\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id xway_stp_match[] = {</div><div class='add'>+	{ .compatible = "lantiq,gpio-stp-xway" },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, xway_stp_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver xway_stp_driver = {</div><div class='add'>+	.probe = xway_stp_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "gpio-stp-xway",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = xway_stp_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __init xway_stp_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;xway_stp_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+subsys_initcall(xway_stp_init);</div><div class='head'>diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c<br/>index 12f349b3830d..dc5184d57892 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-tegra.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-tegra.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-tegra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-tegra.c</a></div><div class='hunk'>@@ -26,10 +26,10 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/gpio-tegra.h&gt;</div><div class='ctx'> #include &lt;mach/iomap.h&gt;</div><div class='ctx'> #include &lt;mach/suspend.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -108,18 +108,29 @@ static void tegra_gpio_mask_write(u32 reg, int gpio, int value)</div><div class='ctx'> 	tegra_gpio_writel(val, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void tegra_gpio_enable(int gpio)</div><div class='add'>+static void tegra_gpio_enable(int gpio)</div><div class='ctx'> {</div><div class='ctx'> 	tegra_gpio_mask_write(GPIO_MSK_CNF(gpio), gpio, 1);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(tegra_gpio_enable);</div><div class='ctx'> </div><div class='del'>-void tegra_gpio_disable(int gpio)</div><div class='add'>+static void tegra_gpio_disable(int gpio)</div><div class='ctx'> {</div><div class='ctx'> 	tegra_gpio_mask_write(GPIO_MSK_CNF(gpio), gpio, 0);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(tegra_gpio_disable);</div><div class='ctx'> </div><div class='add'>+int tegra_gpio_request(struct gpio_chip *chip, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	return pinctrl_request_gpio(offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tegra_gpio_free(struct gpio_chip *chip, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	pinctrl_free_gpio(offset);</div><div class='add'>+	tegra_gpio_disable(offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void tegra_gpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	tegra_gpio_mask_write(GPIO_MSK_OUT(offset), offset, value);</div><div class='hunk'>@@ -133,6 +144,7 @@ static int tegra_gpio_get(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> static int tegra_gpio_direction_input(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> {</div><div class='ctx'> 	tegra_gpio_mask_write(GPIO_MSK_OE(offset), offset, 0);</div><div class='add'>+	tegra_gpio_enable(offset);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -141,6 +153,7 @@ static int tegra_gpio_direction_output(struct gpio_chip *chip, unsigned offset,</div><div class='ctx'> {</div><div class='ctx'> 	tegra_gpio_set(chip, offset, value);</div><div class='ctx'> 	tegra_gpio_mask_write(GPIO_MSK_OE(offset), offset, 1);</div><div class='add'>+	tegra_gpio_enable(offset);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -151,13 +164,14 @@ static int tegra_gpio_to_irq(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> </div><div class='ctx'> static struct gpio_chip tegra_gpio_chip = {</div><div class='ctx'> 	.label			= "tegra-gpio",</div><div class='add'>+	.request		= tegra_gpio_request,</div><div class='add'>+	.free			= tegra_gpio_free,</div><div class='ctx'> 	.direction_input	= tegra_gpio_direction_input,</div><div class='ctx'> 	.get			= tegra_gpio_get,</div><div class='ctx'> 	.direction_output	= tegra_gpio_direction_output,</div><div class='ctx'> 	.set			= tegra_gpio_set,</div><div class='ctx'> 	.to_irq			= tegra_gpio_to_irq,</div><div class='ctx'> 	.base			= 0,</div><div class='del'>-	.ngpio			= TEGRA_NR_GPIOS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void tegra_gpio_irq_ack(struct irq_data *d)</div><div class='hunk'>@@ -224,6 +238,9 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bank-&gt;lvl_lock[port], flags);</div><div class='ctx'> </div><div class='add'>+	tegra_gpio_mask_write(GPIO_MSK_OE(gpio), gpio, 0);</div><div class='add'>+	tegra_gpio_enable(gpio);</div><div class='add'>+</div><div class='ctx'> 	if (type &amp; (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))</div><div class='ctx'> 		__irq_set_handler_locked(d-&gt;irq, handle_level_irq);</div><div class='ctx'> 	else if (type &amp; (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))</div><div class='hunk'>@@ -490,20 +507,6 @@ static int __init tegra_gpio_init(void)</div><div class='ctx'> }</div><div class='ctx'> postcore_initcall(tegra_gpio_init);</div><div class='ctx'> </div><div class='del'>-void tegra_gpio_config(struct tegra_gpio_table *table, int num)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; num; i++) {</div><div class='del'>-		int gpio = table[i].gpio;</div><div class='del'>-</div><div class='del'>-		if (table[i].enable)</div><div class='del'>-			tegra_gpio_enable(gpio);</div><div class='del'>-		else</div><div class='del'>-			tegra_gpio_disable(gpio);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef	CONFIG_DEBUG_FS</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='head'>diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c<br/>index 7eef648a3351..c1ad2884f2ed 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-tps65910.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-tps65910.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-tps65910.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-tps65910.c</a></div><div class='hunk'>@@ -18,14 +18,27 @@</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/tps65910.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+</div><div class='add'>+struct tps65910_gpio {</div><div class='add'>+	struct gpio_chip gpio_chip;</div><div class='add'>+	struct tps65910 *tps65910;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct tps65910_gpio *to_tps65910_gpio(struct gpio_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return container_of(chip, struct tps65910_gpio, gpio_chip);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset)</div><div class='ctx'> {</div><div class='del'>-	struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);</div><div class='del'>-	uint8_t val;</div><div class='add'>+	struct tps65910_gpio *tps65910_gpio = to_tps65910_gpio(gc);</div><div class='add'>+	struct tps65910 *tps65910 = tps65910_gpio-&gt;tps65910;</div><div class='add'>+	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	tps65910-&gt;read(tps65910, TPS65910_GPIO0 + offset, 1, &amp;val);</div><div class='add'>+	tps65910_reg_read(tps65910, TPS65910_GPIO0 + offset, &amp;val);</div><div class='ctx'> </div><div class='ctx'> 	if (val &amp; GPIO_STS_MASK)</div><div class='ctx'> 		return 1;</div><div class='hunk'>@@ -36,83 +49,170 @@ static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset)</div><div class='ctx'> static void tps65910_gpio_set(struct gpio_chip *gc, unsigned offset,</div><div class='ctx'> 			      int value)</div><div class='ctx'> {</div><div class='del'>-	struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);</div><div class='add'>+	struct tps65910_gpio *tps65910_gpio = to_tps65910_gpio(gc);</div><div class='add'>+	struct tps65910 *tps65910 = tps65910_gpio-&gt;tps65910;</div><div class='ctx'> </div><div class='ctx'> 	if (value)</div><div class='del'>-		tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset,</div><div class='add'>+		tps65910_reg_set_bits(tps65910, TPS65910_GPIO0 + offset,</div><div class='ctx'> 						GPIO_SET_MASK);</div><div class='ctx'> 	else</div><div class='del'>-		tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset,</div><div class='add'>+		tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset,</div><div class='ctx'> 						GPIO_SET_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset,</div><div class='ctx'> 				int value)</div><div class='ctx'> {</div><div class='del'>-	struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);</div><div class='add'>+	struct tps65910_gpio *tps65910_gpio = to_tps65910_gpio(gc);</div><div class='add'>+	struct tps65910 *tps65910 = tps65910_gpio-&gt;tps65910;</div><div class='ctx'> </div><div class='ctx'> 	/* Set the initial value */</div><div class='ctx'> 	tps65910_gpio_set(gc, offset, value);</div><div class='ctx'> </div><div class='del'>-	return tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset,</div><div class='add'>+	return tps65910_reg_set_bits(tps65910, TPS65910_GPIO0 + offset,</div><div class='ctx'> 						GPIO_CFG_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tps65910_gpio_input(struct gpio_chip *gc, unsigned offset)</div><div class='ctx'> {</div><div class='del'>-	struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);</div><div class='add'>+	struct tps65910_gpio *tps65910_gpio = to_tps65910_gpio(gc);</div><div class='add'>+	struct tps65910 *tps65910 = tps65910_gpio-&gt;tps65910;</div><div class='ctx'> </div><div class='del'>-	return tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset,</div><div class='add'>+	return tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset,</div><div class='ctx'> 						GPIO_CFG_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base)</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static struct tps65910_board *tps65910_parse_dt_for_gpio(struct device *dev,</div><div class='add'>+		struct tps65910 *tps65910, int chip_ngpio)</div><div class='ctx'> {</div><div class='add'>+	struct tps65910_board *tps65910_board = tps65910-&gt;of_plat_data;</div><div class='add'>+	unsigned int prop_array[TPS6591X_MAX_NUM_GPIO];</div><div class='add'>+	int ngpio = min(chip_ngpio, TPS6591X_MAX_NUM_GPIO);</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct tps65910_board *board_data;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	tps65910_board-&gt;gpio_base = -1;</div><div class='add'>+	ret = of_property_read_u32_array(tps65910-&gt;dev-&gt;of_node,</div><div class='add'>+			"ti,en-gpio-sleep", prop_array, ngpio);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_dbg(dev, "ti,en-gpio-sleep not specified\n");</div><div class='add'>+		return tps65910_board;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (!gpio_base)</div><div class='del'>-		return;</div><div class='add'>+	for (idx = 0; idx &lt; ngpio; idx++)</div><div class='add'>+		tps65910_board-&gt;en_gpio_sleep[idx] = (prop_array[idx] != 0);</div><div class='ctx'> </div><div class='del'>-	tps65910-&gt;gpio.owner		= THIS_MODULE;</div><div class='del'>-	tps65910-&gt;gpio.label		= tps65910-&gt;i2c_client-&gt;name;</div><div class='del'>-	tps65910-&gt;gpio.dev		= tps65910-&gt;dev;</div><div class='del'>-	tps65910-&gt;gpio.base		= gpio_base;</div><div class='add'>+	return tps65910_board;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static struct tps65910_board *tps65910_parse_dt_for_gpio(struct device *dev,</div><div class='add'>+		struct tps65910 *tps65910, int chip_ngpio)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int __devinit tps65910_gpio_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct tps65910 *tps65910 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct tps65910_board *pdata = dev_get_platdata(tps65910-&gt;dev);</div><div class='add'>+	struct tps65910_gpio *tps65910_gpio;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	tps65910_gpio = devm_kzalloc(&amp;pdev-&gt;dev,</div><div class='add'>+				sizeof(*tps65910_gpio), GFP_KERNEL);</div><div class='add'>+	if (!tps65910_gpio) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Could not allocate tps65910_gpio\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tps65910_gpio-&gt;tps65910 = tps65910;</div><div class='add'>+</div><div class='add'>+	tps65910_gpio-&gt;gpio_chip.owner = THIS_MODULE;</div><div class='add'>+	tps65910_gpio-&gt;gpio_chip.label = tps65910-&gt;i2c_client-&gt;name;</div><div class='ctx'> </div><div class='ctx'> 	switch(tps65910_chip_id(tps65910)) {</div><div class='ctx'> 	case TPS65910:</div><div class='del'>-		tps65910-&gt;gpio.ngpio	= TPS65910_NUM_GPIO;</div><div class='add'>+		tps65910_gpio-&gt;gpio_chip.ngpio = TPS65910_NUM_GPIO;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TPS65911:</div><div class='del'>-		tps65910-&gt;gpio.ngpio	= TPS65911_NUM_GPIO;</div><div class='add'>+		tps65910_gpio-&gt;gpio_chip.ngpio = TPS65911_NUM_GPIO;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return;</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	tps65910_gpio-&gt;gpio_chip.can_sleep = 1;</div><div class='add'>+	tps65910_gpio-&gt;gpio_chip.direction_input = tps65910_gpio_input;</div><div class='add'>+	tps65910_gpio-&gt;gpio_chip.direction_output = tps65910_gpio_output;</div><div class='add'>+	tps65910_gpio-&gt;gpio_chip.set	= tps65910_gpio_set;</div><div class='add'>+	tps65910_gpio-&gt;gpio_chip.get	= tps65910_gpio_get;</div><div class='add'>+	tps65910_gpio-&gt;gpio_chip.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	if (pdata &amp;&amp; pdata-&gt;gpio_base)</div><div class='add'>+		tps65910_gpio-&gt;gpio_chip.base = pdata-&gt;gpio_base;</div><div class='add'>+	else</div><div class='add'>+		tps65910_gpio-&gt;gpio_chip.base = -1;</div><div class='add'>+</div><div class='add'>+	if (!pdata &amp;&amp; tps65910-&gt;dev-&gt;of_node)</div><div class='add'>+		pdata = tps65910_parse_dt_for_gpio(&amp;pdev-&gt;dev, tps65910,</div><div class='add'>+			tps65910_gpio-&gt;gpio_chip.ngpio);</div><div class='add'>+</div><div class='add'>+	if (!pdata)</div><div class='add'>+		goto skip_init;</div><div class='add'>+</div><div class='add'>+	/* Configure sleep control for gpios if provided */</div><div class='add'>+	for (i = 0; i &lt; tps65910_gpio-&gt;gpio_chip.ngpio; ++i) {</div><div class='add'>+		if (!pdata-&gt;en_gpio_sleep[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = tps65910_reg_set_bits(tps65910,</div><div class='add'>+			TPS65910_GPIO0 + i, GPIO_SLEEP_MASK);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			dev_warn(tps65910-&gt;dev,</div><div class='add'>+				"GPIO Sleep setting failed with err %d\n", ret);</div><div class='ctx'> 	}</div><div class='del'>-	tps65910-&gt;gpio.can_sleep	= 1;</div><div class='del'>-</div><div class='del'>-	tps65910-&gt;gpio.direction_input	= tps65910_gpio_input;</div><div class='del'>-	tps65910-&gt;gpio.direction_output	= tps65910_gpio_output;</div><div class='del'>-	tps65910-&gt;gpio.set		= tps65910_gpio_set;</div><div class='del'>-	tps65910-&gt;gpio.get		= tps65910_gpio_get;</div><div class='del'>-</div><div class='del'>-	/* Configure sleep control for gpios */</div><div class='del'>-	board_data = dev_get_platdata(tps65910-&gt;dev);</div><div class='del'>-	if (board_data) {</div><div class='del'>-		int i;</div><div class='del'>-		for (i = 0; i &lt; tps65910-&gt;gpio.ngpio; ++i) {</div><div class='del'>-			if (board_data-&gt;en_gpio_sleep[i]) {</div><div class='del'>-				ret = tps65910_set_bits(tps65910,</div><div class='del'>-					TPS65910_GPIO0 + i, GPIO_SLEEP_MASK);</div><div class='del'>-				if (ret &lt; 0)</div><div class='del'>-					dev_warn(tps65910-&gt;dev,</div><div class='del'>-						"GPIO Sleep setting failed\n");</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+skip_init:</div><div class='add'>+	ret = gpiochip_add(&amp;tps65910_gpio-&gt;gpio_chip);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Could not register gpiochip, %d\n", ret);</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = gpiochip_add(&amp;tps65910-&gt;gpio);</div><div class='add'>+	platform_set_drvdata(pdev, tps65910_gpio);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit tps65910_gpio_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct tps65910_gpio *tps65910_gpio = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='del'>-	if (ret)</div><div class='del'>-		dev_warn(tps65910-&gt;dev, "GPIO registration failed: %d\n", ret);</div><div class='add'>+	return gpiochip_remove(&amp;tps65910_gpio-&gt;gpio_chip);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static struct platform_driver tps65910_gpio_driver = {</div><div class='add'>+	.driver.name    = "tps65910-gpio",</div><div class='add'>+	.driver.owner   = THIS_MODULE,</div><div class='add'>+	.probe		= tps65910_gpio_probe,</div><div class='add'>+	.remove		= __devexit_p(tps65910_gpio_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init tps65910_gpio_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;tps65910_gpio_driver);</div><div class='add'>+}</div><div class='add'>+subsys_initcall(tps65910_gpio_init);</div><div class='add'>+</div><div class='add'>+static void __exit tps65910_gpio_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;tps65910_gpio_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(tps65910_gpio_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Graeme Gregory &lt;gg@slimlogic.co.uk&gt;");</div><div class='add'>+MODULE_AUTHOR("Jorge Eduardo Candelaria jedu@slimlogic.co.uk&gt;");</div><div class='add'>+MODULE_DESCRIPTION("GPIO interface for TPS65910/TPS6511 PMICs");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_ALIAS("platform:tps65910-gpio");</div><div class='head'>diff --git a/drivers/gpio/gpio-wm831x.c b/drivers/gpio/gpio-wm831x.c<br/>index deb949e75ec1..e56a2165641c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-wm831x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-wm831x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpio-wm831x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpio-wm831x.c</a></div><div class='hunk'>@@ -102,10 +102,8 @@ static int wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> 	struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);</div><div class='ctx'> 	struct wm831x *wm831x = wm831x_gpio-&gt;wm831x;</div><div class='ctx'> </div><div class='del'>-	if (!wm831x-&gt;irq_base)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return wm831x-&gt;irq_base + WM831X_IRQ_GPIO_1 + offset;</div><div class='add'>+	return irq_create_mapping(wm831x-&gt;irq_domain,</div><div class='add'>+				  WM831X_IRQ_GPIO_1 + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int wm831x_gpio_set_debounce(struct gpio_chip *chip, unsigned offset,</div><div class='head'>diff --git a/drivers/of/gpio.c b/drivers/gpio/gpiolib-of.c<br/>index bf984b6dc477..d18068a9f3ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/of/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/of/gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpiolib-of.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpiolib-of.c</a></div><div class='hunk'>@@ -15,11 +15,39 @@</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='ctx'> #include &lt;linux/of_gpio.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='add'>+/* Private data structure for of_gpiochip_is_match */</div><div class='add'>+struct gg_data {</div><div class='add'>+	enum of_gpio_flags *flags;</div><div class='add'>+	struct of_phandle_args gpiospec;</div><div class='add'>+</div><div class='add'>+	int out_gpio;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Private function for resolving node pointer to gpio_chip */</div><div class='add'>+static int of_gpiochip_find_and_xlate(struct gpio_chip *gc, void *data)</div><div class='add'>+{</div><div class='add'>+	struct gg_data *gg_data = data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if ((gc-&gt;of_node != gg_data-&gt;gpiospec.np) ||</div><div class='add'>+	    (gc-&gt;of_gpio_n_cells != gg_data-&gt;gpiospec.args_count) ||</div><div class='add'>+	    (!gc-&gt;of_xlate))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	ret = gc-&gt;of_xlate(gc, &amp;gg_data-&gt;gpiospec, gg_data-&gt;flags);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	gg_data-&gt;out_gpio = ret + gc-&gt;base;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * of_get_named_gpio_flags() - Get a GPIO number and flags to use with GPIO API</div><div class='ctx'>  * @np:		device node to get GPIO from</div><div class='hunk'>@@ -34,46 +62,25 @@</div><div class='ctx'> int of_get_named_gpio_flags(struct device_node *np, const char *propname,</div><div class='ctx'>                            int index, enum of_gpio_flags *flags)</div><div class='ctx'> {</div><div class='add'>+	struct gg_data gg_data = { .flags = flags, .out_gpio = -ENODEV };</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct gpio_chip *gc;</div><div class='del'>-	struct of_phandle_args gpiospec;</div><div class='add'>+</div><div class='add'>+	/* .of_xlate might decide to not fill in the flags, so clear it. */</div><div class='add'>+	if (flags)</div><div class='add'>+		*flags = 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = of_parse_phandle_with_args(np, propname, "#gpio-cells", index,</div><div class='del'>-					 &amp;gpiospec);</div><div class='add'>+					 &amp;gg_data.gpiospec);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		pr_debug("%s: can't parse gpios property\n", __func__);</div><div class='del'>-		goto err0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gc = of_node_to_gpiochip(gpiospec.np);</div><div class='del'>-	if (!gc) {</div><div class='del'>-		pr_debug("%s: gpio controller %s isn't registered\n",</div><div class='del'>-			 np-&gt;full_name, gpiospec.np-&gt;full_name);</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto err1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (gpiospec.args_count != gc-&gt;of_gpio_n_cells) {</div><div class='del'>-		pr_debug("%s: wrong #gpio-cells for %s\n",</div><div class='del'>-			 np-&gt;full_name, gpiospec.np-&gt;full_name);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto err1;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* .xlate might decide to not fill in the flags, so clear it. */</div><div class='del'>-	if (flags)</div><div class='del'>-		*flags = 0;</div><div class='del'>-</div><div class='del'>-	ret = gc-&gt;of_xlate(gc, &amp;gpiospec, flags);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto err1;</div><div class='add'>+	gpiochip_find(&amp;gg_data, of_gpiochip_find_and_xlate);</div><div class='ctx'> </div><div class='del'>-	ret += gc-&gt;base;</div><div class='del'>-err1:</div><div class='del'>-	of_node_put(gpiospec.np);</div><div class='del'>-err0:</div><div class='add'>+	of_node_put(gg_data.gpiospec.np);</div><div class='ctx'> 	pr_debug("%s exited with status %d\n", __func__, ret);</div><div class='del'>-	return ret;</div><div class='add'>+	return gg_data.out_gpio;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(of_get_named_gpio_flags);</div><div class='ctx'> </div><div class='hunk'>@@ -227,14 +234,3 @@ void of_gpiochip_remove(struct gpio_chip *chip)</div><div class='ctx'> 	if (chip-&gt;of_node)</div><div class='ctx'> 		of_node_put(chip-&gt;of_node);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/* Private function for resolving node pointer to gpio_chip */</div><div class='del'>-static int of_gpiochip_is_match(struct gpio_chip *chip, const void *data)</div><div class='del'>-{</div><div class='del'>-	return chip-&gt;of_node == data;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct gpio_chip *of_node_to_gpiochip(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	return gpiochip_find(np, of_gpiochip_is_match);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c<br/>index 5a75510d66bb..120b2a0e3167 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpiolib.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpiolib.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpio/gpiolib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpio/gpiolib.c</a></div><div class='hunk'>@@ -1093,7 +1093,7 @@ unlock:</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='del'>-	pr_info("gpiochip_add: registered GPIOs %d to %d on device: %s\n",</div><div class='add'>+	pr_debug("gpiochip_add: registered GPIOs %d to %d on device: %s\n",</div><div class='ctx'> 		chip-&gt;base, chip-&gt;base + chip-&gt;ngpio - 1,</div><div class='ctx'> 		chip-&gt;label ? : "generic");</div><div class='ctx'> </div><div class='hunk'>@@ -1154,9 +1154,9 @@ EXPORT_SYMBOL_GPL(gpiochip_remove);</div><div class='ctx'>  * non-zero, this function will return to the caller and not iterate over any</div><div class='ctx'>  * more gpio_chips.</div><div class='ctx'>  */</div><div class='del'>-struct gpio_chip *gpiochip_find(const void *data,</div><div class='add'>+struct gpio_chip *gpiochip_find(void *data,</div><div class='ctx'> 				int (*match)(struct gpio_chip *chip,</div><div class='del'>-					     const void *data))</div><div class='add'>+					     void *data))</div><div class='ctx'> {</div><div class='ctx'> 	struct gpio_chip *chip = NULL;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -1302,8 +1302,18 @@ int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)</div><div class='ctx'> 				(flags &amp; GPIOF_INIT_HIGH) ? 1 : 0);</div><div class='ctx'> </div><div class='ctx'> 	if (err)</div><div class='del'>-		gpio_free(gpio);</div><div class='add'>+		goto free_gpio;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; GPIOF_EXPORT) {</div><div class='add'>+		err = gpio_export(gpio, flags &amp; GPIOF_EXPORT_CHANGEABLE);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_gpio;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='add'>+ free_gpio:</div><div class='add'>+	gpio_free(gpio);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(gpio_request_one);</div><div class='head'>diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig<br/>index e354bc0b052a..23120c00a881 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/Kconfig</a></div><div class='hunk'>@@ -186,3 +186,9 @@ source "drivers/gpu/drm/vmwgfx/Kconfig"</div><div class='ctx'> source "drivers/gpu/drm/gma500/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/gpu/drm/udl/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/gpu/drm/ast/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/gpu/drm/mgag200/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/gpu/drm/cirrus/Kconfig"</div><div class='head'>diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile<br/>index c20da5bda355..f65f65ed0ddf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/Makefile</a></div><div class='hunk'>@@ -34,6 +34,8 @@ obj-$(CONFIG_DRM_RADEON)+= radeon/</div><div class='ctx'> obj-$(CONFIG_DRM_MGA)	+= mga/</div><div class='ctx'> obj-$(CONFIG_DRM_I810)	+= i810/</div><div class='ctx'> obj-$(CONFIG_DRM_I915)  += i915/</div><div class='add'>+obj-$(CONFIG_DRM_MGAG200) += mgag200/</div><div class='add'>+obj-$(CONFIG_DRM_CIRRUS_QEMU) += cirrus/</div><div class='ctx'> obj-$(CONFIG_DRM_SIS)   += sis/</div><div class='ctx'> obj-$(CONFIG_DRM_SAVAGE)+= savage/</div><div class='ctx'> obj-$(CONFIG_DRM_VMWGFX)+= vmwgfx/</div><div class='hunk'>@@ -42,4 +44,5 @@ obj-$(CONFIG_DRM_NOUVEAU) +=nouveau/</div><div class='ctx'> obj-$(CONFIG_DRM_EXYNOS) +=exynos/</div><div class='ctx'> obj-$(CONFIG_DRM_GMA500) += gma500/</div><div class='ctx'> obj-$(CONFIG_DRM_UDL) += udl/</div><div class='add'>+obj-$(CONFIG_DRM_AST) += ast/</div><div class='ctx'> obj-y			+= i2c/</div><div class='head'>diff --git a/drivers/gpu/drm/ast/Kconfig b/drivers/gpu/drm/ast/Kconfig<br/>new file mode 100644<br/>index 000000000000..a277b1257888<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/ast/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+config DRM_AST</div><div class='add'>+	tristate "AST server chips"</div><div class='add'>+	depends on DRM &amp;&amp; PCI &amp;&amp; EXPERIMENTAL</div><div class='add'>+	select DRM_TTM</div><div class='add'>+	select FB_SYS_COPYAREA</div><div class='add'>+	select FB_SYS_FILLRECT</div><div class='add'>+	select FB_SYS_IMAGEBLIT</div><div class='add'>+	select DRM_KMS_HELPER</div><div class='add'>+	select DRM_TTM</div><div class='add'>+	help</div><div class='add'>+	 Say yes for experimental AST GPU driver. Do not enable</div><div class='add'>+	 this driver without having a working -modesetting,</div><div class='add'>+	 and a version of AST that knows to fail if KMS</div><div class='add'>+	 is bound to the driver. These GPUs are commonly found</div><div class='add'>+	 in server chipsets.</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/ast/Makefile b/drivers/gpu/drm/ast/Makefile<br/>new file mode 100644<br/>index 000000000000..8df4f284ee24<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/ast/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/Makefile</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+#</div><div class='add'>+# Makefile for the drm device driver.  This driver provides support for the</div><div class='add'>+# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.</div><div class='add'>+</div><div class='add'>+ccflags-y := -Iinclude/drm</div><div class='add'>+</div><div class='add'>+ast-y := ast_drv.o ast_main.o ast_mode.o ast_fb.o ast_ttm.o ast_post.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_DRM_AST) := ast.o
\ No newline at end of file</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_dram_tables.h b/drivers/gpu/drm/ast/ast_dram_tables.h<br/>new file mode 100644<br/>index 000000000000..cc04539c0ff3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/ast/ast_dram_tables.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_dram_tables.h</a></div><div class='hunk'>@@ -0,0 +1,144 @@</div><div class='add'>+#ifndef AST_DRAM_TABLES_H</div><div class='add'>+#define AST_DRAM_TABLES_H</div><div class='add'>+</div><div class='add'>+/* DRAM timing tables */</div><div class='add'>+struct ast_dramstruct {</div><div class='add'>+	u16 index;</div><div class='add'>+	u32 data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ast_dramstruct ast2000_dram_table_data[] = {</div><div class='add'>+	{ 0x0108, 0x00000000 },</div><div class='add'>+	{ 0x0120, 0x00004a21 },</div><div class='add'>+	{ 0xFF00, 0x00000043 },</div><div class='add'>+	{ 0x0000, 0xFFFFFFFF },</div><div class='add'>+	{ 0x0004, 0x00000089 },</div><div class='add'>+	{ 0x0008, 0x22331353 },</div><div class='add'>+	{ 0x000C, 0x0d07000b },</div><div class='add'>+	{ 0x0010, 0x11113333 },</div><div class='add'>+	{ 0x0020, 0x00110350 },</div><div class='add'>+	{ 0x0028, 0x1e0828f0 },</div><div class='add'>+	{ 0x0024, 0x00000001 },</div><div class='add'>+	{ 0x001C, 0x00000000 },</div><div class='add'>+	{ 0x0014, 0x00000003 },</div><div class='add'>+	{ 0xFF00, 0x00000043 },</div><div class='add'>+	{ 0x0018, 0x00000131 },</div><div class='add'>+	{ 0x0014, 0x00000001 },</div><div class='add'>+	{ 0xFF00, 0x00000043 },</div><div class='add'>+	{ 0x0018, 0x00000031 },</div><div class='add'>+	{ 0x0014, 0x00000001 },</div><div class='add'>+	{ 0xFF00, 0x00000043 },</div><div class='add'>+	{ 0x0028, 0x1e0828f1 },</div><div class='add'>+	{ 0x0024, 0x00000003 },</div><div class='add'>+	{ 0x002C, 0x1f0f28fb },</div><div class='add'>+	{ 0x0030, 0xFFFFFE01 },</div><div class='add'>+	{ 0xFFFF, 0xFFFFFFFF }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ast_dramstruct ast1100_dram_table_data[] = {</div><div class='add'>+	{ 0x2000, 0x1688a8a8 },</div><div class='add'>+	{ 0x2020, 0x000041f0 },</div><div class='add'>+	{ 0xFF00, 0x00000043 },</div><div class='add'>+	{ 0x0000, 0xfc600309 },</div><div class='add'>+	{ 0x006C, 0x00909090 },</div><div class='add'>+	{ 0x0064, 0x00050000 },</div><div class='add'>+	{ 0x0004, 0x00000585 },</div><div class='add'>+	{ 0x0008, 0x0011030f },</div><div class='add'>+	{ 0x0010, 0x22201724 },</div><div class='add'>+	{ 0x0018, 0x1e29011a },</div><div class='add'>+	{ 0x0020, 0x00c82222 },</div><div class='add'>+	{ 0x0014, 0x01001523 },</div><div class='add'>+	{ 0x001C, 0x1024010d },</div><div class='add'>+	{ 0x0024, 0x00cb2522 },</div><div class='add'>+	{ 0x0038, 0xffffff82 },</div><div class='add'>+	{ 0x003C, 0x00000000 },</div><div class='add'>+	{ 0x0040, 0x00000000 },</div><div class='add'>+	{ 0x0044, 0x00000000 },</div><div class='add'>+	{ 0x0048, 0x00000000 },</div><div class='add'>+	{ 0x004C, 0x00000000 },</div><div class='add'>+	{ 0x0050, 0x00000000 },</div><div class='add'>+	{ 0x0054, 0x00000000 },</div><div class='add'>+	{ 0x0058, 0x00000000 },</div><div class='add'>+	{ 0x005C, 0x00000000 },</div><div class='add'>+	{ 0x0060, 0x032aa02a },</div><div class='add'>+	{ 0x0064, 0x002d3000 },</div><div class='add'>+	{ 0x0068, 0x00000000 },</div><div class='add'>+	{ 0x0070, 0x00000000 },</div><div class='add'>+	{ 0x0074, 0x00000000 },</div><div class='add'>+	{ 0x0078, 0x00000000 },</div><div class='add'>+	{ 0x007C, 0x00000000 },</div><div class='add'>+	{ 0x0034, 0x00000001 },</div><div class='add'>+	{ 0xFF00, 0x00000043 },</div><div class='add'>+	{ 0x002C, 0x00000732 },</div><div class='add'>+	{ 0x0030, 0x00000040 },</div><div class='add'>+	{ 0x0028, 0x00000005 },</div><div class='add'>+	{ 0x0028, 0x00000007 },</div><div class='add'>+	{ 0x0028, 0x00000003 },</div><div class='add'>+	{ 0x0028, 0x00000001 },</div><div class='add'>+	{ 0x000C, 0x00005a08 },</div><div class='add'>+	{ 0x002C, 0x00000632 },</div><div class='add'>+	{ 0x0028, 0x00000001 },</div><div class='add'>+	{ 0x0030, 0x000003c0 },</div><div class='add'>+	{ 0x0028, 0x00000003 },</div><div class='add'>+	{ 0x0030, 0x00000040 },</div><div class='add'>+	{ 0x0028, 0x00000003 },</div><div class='add'>+	{ 0x000C, 0x00005a21 },</div><div class='add'>+	{ 0x0034, 0x00007c03 },</div><div class='add'>+	{ 0x0120, 0x00004c41 },</div><div class='add'>+	{ 0xffff, 0xffffffff },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ast_dramstruct ast2100_dram_table_data[] = {</div><div class='add'>+	{ 0x2000, 0x1688a8a8 },</div><div class='add'>+	{ 0x2020, 0x00004120 },</div><div class='add'>+	{ 0xFF00, 0x00000043 },</div><div class='add'>+	{ 0x0000, 0xfc600309 },</div><div class='add'>+	{ 0x006C, 0x00909090 },</div><div class='add'>+	{ 0x0064, 0x00070000 },</div><div class='add'>+	{ 0x0004, 0x00000489 },</div><div class='add'>+	{ 0x0008, 0x0011030f },</div><div class='add'>+	{ 0x0010, 0x32302926 },</div><div class='add'>+	{ 0x0018, 0x274c0122 },</div><div class='add'>+	{ 0x0020, 0x00ce2222 },</div><div class='add'>+	{ 0x0014, 0x01001523 },</div><div class='add'>+	{ 0x001C, 0x1024010d },</div><div class='add'>+	{ 0x0024, 0x00cb2522 },</div><div class='add'>+	{ 0x0038, 0xffffff82 },</div><div class='add'>+	{ 0x003C, 0x00000000 },</div><div class='add'>+	{ 0x0040, 0x00000000 },</div><div class='add'>+	{ 0x0044, 0x00000000 },</div><div class='add'>+	{ 0x0048, 0x00000000 },</div><div class='add'>+	{ 0x004C, 0x00000000 },</div><div class='add'>+	{ 0x0050, 0x00000000 },</div><div class='add'>+	{ 0x0054, 0x00000000 },</div><div class='add'>+	{ 0x0058, 0x00000000 },</div><div class='add'>+	{ 0x005C, 0x00000000 },</div><div class='add'>+	{ 0x0060, 0x0f2aa02a },</div><div class='add'>+	{ 0x0064, 0x003f3005 },</div><div class='add'>+	{ 0x0068, 0x02020202 },</div><div class='add'>+	{ 0x0070, 0x00000000 },</div><div class='add'>+	{ 0x0074, 0x00000000 },</div><div class='add'>+	{ 0x0078, 0x00000000 },</div><div class='add'>+	{ 0x007C, 0x00000000 },</div><div class='add'>+	{ 0x0034, 0x00000001 },</div><div class='add'>+	{ 0xFF00, 0x00000043 },</div><div class='add'>+	{ 0x002C, 0x00000942 },</div><div class='add'>+	{ 0x0030, 0x00000040 },</div><div class='add'>+	{ 0x0028, 0x00000005 },</div><div class='add'>+	{ 0x0028, 0x00000007 },</div><div class='add'>+	{ 0x0028, 0x00000003 },</div><div class='add'>+	{ 0x0028, 0x00000001 },</div><div class='add'>+	{ 0x000C, 0x00005a08 },</div><div class='add'>+	{ 0x002C, 0x00000842 },</div><div class='add'>+	{ 0x0028, 0x00000001 },</div><div class='add'>+	{ 0x0030, 0x000003c0 },</div><div class='add'>+	{ 0x0028, 0x00000003 },</div><div class='add'>+	{ 0x0030, 0x00000040 },</div><div class='add'>+	{ 0x0028, 0x00000003 },</div><div class='add'>+	{ 0x000C, 0x00005a21 },</div><div class='add'>+	{ 0x0034, 0x00007c03 },</div><div class='add'>+	{ 0x0120, 0x00005061 },</div><div class='add'>+	{ 0xffff, 0xffffffff },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c<br/>new file mode 100644<br/>index 000000000000..d0c4574ef49c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/ast/ast_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_drv.c</a></div><div class='hunk'>@@ -0,0 +1,244 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the</div><div class='add'>+ * "Software"), to deal in the Software without restriction, including</div><div class='add'>+ * without limitation the rights to use, copy, modify, merge, publish,</div><div class='add'>+ * distribute, sub license, and/or sell copies of the Software, and to</div><div class='add'>+ * permit persons to whom the Software is furnished to do so, subject to</div><div class='add'>+ * the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,</div><div class='add'>+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR</div><div class='add'>+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE</div><div class='add'>+ * USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the</div><div class='add'>+ * next paragraph) shall be included in all copies or substantial portions</div><div class='add'>+ * of the Software.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * Authors: Dave Airlie &lt;airlied@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/console.h&gt;</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+#include "drm_crtc_helper.h"</div><div class='add'>+</div><div class='add'>+#include "ast_drv.h"</div><div class='add'>+</div><div class='add'>+int ast_modeset = -1;</div><div class='add'>+</div><div class='add'>+MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");</div><div class='add'>+module_param_named(modeset, ast_modeset, int, 0400);</div><div class='add'>+</div><div class='add'>+#define PCI_VENDOR_ASPEED 0x1a03</div><div class='add'>+</div><div class='add'>+static struct drm_driver driver;</div><div class='add'>+</div><div class='add'>+#define AST_VGA_DEVICE(id, info) {		\</div><div class='add'>+	.class = PCI_BASE_CLASS_DISPLAY &lt;&lt; 16,	\</div><div class='add'>+	.class_mask = 0xff0000,			\</div><div class='add'>+	.vendor = PCI_VENDOR_ASPEED,			\</div><div class='add'>+	.device = id,				\</div><div class='add'>+	.subvendor = PCI_ANY_ID,		\</div><div class='add'>+	.subdevice = PCI_ANY_ID,		\</div><div class='add'>+	.driver_data = (unsigned long) info }</div><div class='add'>+</div><div class='add'>+static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {</div><div class='add'>+	AST_VGA_DEVICE(PCI_CHIP_AST2000, NULL),</div><div class='add'>+	AST_VGA_DEVICE(PCI_CHIP_AST2100, NULL),</div><div class='add'>+	/*	AST_VGA_DEVICE(PCI_CHIP_AST1180, NULL), - don't bind to 1180 for now */</div><div class='add'>+	{0, 0, 0},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(pci, pciidlist);</div><div class='add'>+</div><div class='add'>+static int __devinit</div><div class='add'>+ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	return drm_get_pci_dev(pdev, ent, &amp;driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ast_pci_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	drm_put_dev(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int ast_drm_freeze(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_kms_helper_poll_disable(dev);</div><div class='add'>+</div><div class='add'>+	pci_save_state(dev-&gt;pdev);</div><div class='add'>+</div><div class='add'>+	console_lock();</div><div class='add'>+	ast_fbdev_set_suspend(dev, 1);</div><div class='add'>+	console_unlock();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_drm_thaw(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	int error = 0;</div><div class='add'>+</div><div class='add'>+	ast_post_gpu(dev);</div><div class='add'>+</div><div class='add'>+	drm_mode_config_reset(dev);</div><div class='add'>+	mutex_lock(&amp;dev-&gt;mode_config.mutex);</div><div class='add'>+	drm_helper_resume_force_mode(dev);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;mode_config.mutex);</div><div class='add'>+</div><div class='add'>+	console_lock();</div><div class='add'>+	ast_fbdev_set_suspend(dev, 0);</div><div class='add'>+	console_unlock();</div><div class='add'>+	return error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_drm_resume(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (pci_enable_device(dev-&gt;pdev))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	ret = ast_drm_thaw(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	drm_kms_helper_poll_enable(dev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_pm_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	struct drm_device *ddev = pci_get_drvdata(pdev);</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	error = ast_drm_freeze(ddev);</div><div class='add'>+	if (error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	pci_set_power_state(pdev, PCI_D3hot);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+static int ast_pm_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	struct drm_device *ddev = pci_get_drvdata(pdev);</div><div class='add'>+	return ast_drm_resume(ddev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_pm_freeze(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	struct drm_device *ddev = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!ddev || !ddev-&gt;dev_private)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	return ast_drm_freeze(ddev);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_pm_thaw(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	struct drm_device *ddev = pci_get_drvdata(pdev);</div><div class='add'>+	return ast_drm_thaw(ddev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_pm_poweroff(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	struct drm_device *ddev = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	return ast_drm_freeze(ddev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops ast_pm_ops = {</div><div class='add'>+	.suspend = ast_pm_suspend,</div><div class='add'>+	.resume = ast_pm_resume,</div><div class='add'>+	.freeze = ast_pm_freeze,</div><div class='add'>+	.thaw = ast_pm_thaw,</div><div class='add'>+	.poweroff = ast_pm_poweroff,</div><div class='add'>+	.restore = ast_pm_resume,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pci_driver ast_pci_driver = {</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='add'>+	.id_table = pciidlist,</div><div class='add'>+	.probe = ast_pci_probe,</div><div class='add'>+	.remove = ast_pci_remove,</div><div class='add'>+	.driver.pm = &amp;ast_pm_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct file_operations ast_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = drm_open,</div><div class='add'>+	.release = drm_release,</div><div class='add'>+	.unlocked_ioctl = drm_ioctl,</div><div class='add'>+	.mmap = ast_mmap,</div><div class='add'>+	.poll = drm_poll,</div><div class='add'>+	.fasync = drm_fasync,</div><div class='add'>+	.read = drm_read,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct drm_driver driver = {</div><div class='add'>+	.driver_features = DRIVER_USE_MTRR | DRIVER_MODESET | DRIVER_GEM,</div><div class='add'>+	.dev_priv_size = 0,</div><div class='add'>+</div><div class='add'>+	.load = ast_driver_load,</div><div class='add'>+	.unload = ast_driver_unload,</div><div class='add'>+</div><div class='add'>+	.fops = &amp;ast_fops,</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='add'>+	.desc = DRIVER_DESC,</div><div class='add'>+	.date = DRIVER_DATE,</div><div class='add'>+	.major = DRIVER_MAJOR,</div><div class='add'>+	.minor = DRIVER_MINOR,</div><div class='add'>+	.patchlevel = DRIVER_PATCHLEVEL,</div><div class='add'>+</div><div class='add'>+	.gem_init_object = ast_gem_init_object,</div><div class='add'>+	.gem_free_object = ast_gem_free_object,</div><div class='add'>+	.dumb_create = ast_dumb_create,</div><div class='add'>+	.dumb_map_offset = ast_dumb_mmap_offset,</div><div class='add'>+	.dumb_destroy = ast_dumb_destroy,</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init ast_init(void)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_VGA_CONSOLE</div><div class='add'>+	if (vgacon_text_force() &amp;&amp; ast_modeset == -1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (ast_modeset == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return drm_pci_init(&amp;driver, &amp;ast_pci_driver);</div><div class='add'>+}</div><div class='add'>+static void __exit ast_exit(void)</div><div class='add'>+{</div><div class='add'>+	drm_pci_exit(&amp;driver, &amp;ast_pci_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(ast_init);</div><div class='add'>+module_exit(ast_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR(DRIVER_AUTHOR);</div><div class='add'>+MODULE_DESCRIPTION(DRIVER_DESC);</div><div class='add'>+MODULE_LICENSE("GPL and additional rights");</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h<br/>new file mode 100644<br/>index 000000000000..d4af9edcbb97<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/ast/ast_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_drv.h</a></div><div class='hunk'>@@ -0,0 +1,356 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the</div><div class='add'>+ * "Software"), to deal in the Software without restriction, including</div><div class='add'>+ * without limitation the rights to use, copy, modify, merge, publish,</div><div class='add'>+ * distribute, sub license, and/or sell copies of the Software, and to</div><div class='add'>+ * permit persons to whom the Software is furnished to do so, subject to</div><div class='add'>+ * the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,</div><div class='add'>+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR</div><div class='add'>+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE</div><div class='add'>+ * USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the</div><div class='add'>+ * next paragraph) shall be included in all copies or substantial portions</div><div class='add'>+ * of the Software.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * Authors: Dave Airlie &lt;airlied@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+#ifndef __AST_DRV_H__</div><div class='add'>+#define __AST_DRV_H__</div><div class='add'>+</div><div class='add'>+#include "drm_fb_helper.h"</div><div class='add'>+</div><div class='add'>+#include "ttm/ttm_bo_api.h"</div><div class='add'>+#include "ttm/ttm_bo_driver.h"</div><div class='add'>+#include "ttm/ttm_placement.h"</div><div class='add'>+#include "ttm/ttm_memory.h"</div><div class='add'>+#include "ttm/ttm_module.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/i2c-algo-bit.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRIVER_AUTHOR		"Dave Airlie"</div><div class='add'>+</div><div class='add'>+#define DRIVER_NAME		"ast"</div><div class='add'>+#define DRIVER_DESC		"AST"</div><div class='add'>+#define DRIVER_DATE		"20120228"</div><div class='add'>+</div><div class='add'>+#define DRIVER_MAJOR		0</div><div class='add'>+#define DRIVER_MINOR		1</div><div class='add'>+#define DRIVER_PATCHLEVEL	0</div><div class='add'>+</div><div class='add'>+#define PCI_CHIP_AST2000 0x2000</div><div class='add'>+#define PCI_CHIP_AST2100 0x2010</div><div class='add'>+#define PCI_CHIP_AST1180 0x1180</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+enum ast_chip {</div><div class='add'>+	AST2000,</div><div class='add'>+	AST2100,</div><div class='add'>+	AST1100,</div><div class='add'>+	AST2200,</div><div class='add'>+	AST2150,</div><div class='add'>+	AST2300,</div><div class='add'>+	AST1180,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AST_DRAM_512Mx16 0</div><div class='add'>+#define AST_DRAM_1Gx16   1</div><div class='add'>+#define AST_DRAM_512Mx32 2</div><div class='add'>+#define AST_DRAM_1Gx32   3</div><div class='add'>+#define AST_DRAM_2Gx16   6</div><div class='add'>+#define AST_DRAM_4Gx16   7</div><div class='add'>+</div><div class='add'>+struct ast_fbdev;</div><div class='add'>+</div><div class='add'>+struct ast_private {</div><div class='add'>+	struct drm_device *dev;</div><div class='add'>+</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+	void __iomem *ioregs;</div><div class='add'>+</div><div class='add'>+	enum ast_chip chip;</div><div class='add'>+	bool vga2_clone;</div><div class='add'>+	uint32_t dram_bus_width;</div><div class='add'>+	uint32_t dram_type;</div><div class='add'>+	uint32_t mclk;</div><div class='add'>+	uint32_t vram_size;</div><div class='add'>+</div><div class='add'>+	struct ast_fbdev *fbdev;</div><div class='add'>+</div><div class='add'>+	int fb_mtrr;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		struct drm_global_reference mem_global_ref;</div><div class='add'>+		struct ttm_bo_global_ref bo_global_ref;</div><div class='add'>+		struct ttm_bo_device bdev;</div><div class='add'>+		atomic_t validate_sequence;</div><div class='add'>+	} ttm;</div><div class='add'>+</div><div class='add'>+	struct drm_gem_object *cursor_cache;</div><div class='add'>+	uint64_t cursor_cache_gpu_addr;</div><div class='add'>+	struct ttm_bo_kmap_obj cache_kmap;</div><div class='add'>+	int next_cursor;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int ast_driver_load(struct drm_device *dev, unsigned long flags);</div><div class='add'>+int ast_driver_unload(struct drm_device *dev);</div><div class='add'>+</div><div class='add'>+struct ast_gem_object;</div><div class='add'>+</div><div class='add'>+#define AST_IO_AR_PORT_WRITE		(0x40)</div><div class='add'>+#define AST_IO_MISC_PORT_WRITE		(0x42)</div><div class='add'>+#define AST_IO_SEQ_PORT			(0x44)</div><div class='add'>+#define AST_DAC_INDEX_READ		(0x3c7)</div><div class='add'>+#define AST_IO_DAC_INDEX_WRITE		(0x48)</div><div class='add'>+#define AST_IO_DAC_DATA		        (0x49)</div><div class='add'>+#define AST_IO_GR_PORT			(0x4E)</div><div class='add'>+#define AST_IO_CRTC_PORT		(0x54)</div><div class='add'>+#define AST_IO_INPUT_STATUS1_READ	(0x5A)</div><div class='add'>+#define AST_IO_MISC_PORT_READ		(0x4C)</div><div class='add'>+</div><div class='add'>+#define __ast_read(x) \</div><div class='add'>+static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \</div><div class='add'>+u##x val = 0;\</div><div class='add'>+val = ioread##x(ast-&gt;regs + reg); \</div><div class='add'>+return val;\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+__ast_read(8);</div><div class='add'>+__ast_read(16);</div><div class='add'>+__ast_read(32)</div><div class='add'>+</div><div class='add'>+#define __ast_io_read(x) \</div><div class='add'>+static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \</div><div class='add'>+u##x val = 0;\</div><div class='add'>+val = ioread##x(ast-&gt;ioregs + reg); \</div><div class='add'>+return val;\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+__ast_io_read(8);</div><div class='add'>+__ast_io_read(16);</div><div class='add'>+__ast_io_read(32);</div><div class='add'>+</div><div class='add'>+#define __ast_write(x) \</div><div class='add'>+static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\</div><div class='add'>+	iowrite##x(val, ast-&gt;regs + reg);\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+__ast_write(8);</div><div class='add'>+__ast_write(16);</div><div class='add'>+__ast_write(32);</div><div class='add'>+</div><div class='add'>+#define __ast_io_write(x) \</div><div class='add'>+static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\</div><div class='add'>+	iowrite##x(val, ast-&gt;ioregs + reg);\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+__ast_io_write(8);</div><div class='add'>+__ast_io_write(16);</div><div class='add'>+#undef __ast_io_write</div><div class='add'>+</div><div class='add'>+static inline void ast_set_index_reg(struct ast_private *ast,</div><div class='add'>+				     uint32_t base, uint8_t index,</div><div class='add'>+				     uint8_t val)</div><div class='add'>+{</div><div class='add'>+	ast_io_write16(ast, base, ((u16)val &lt;&lt; 8) | index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_set_index_reg_mask(struct ast_private *ast,</div><div class='add'>+			    uint32_t base, uint8_t index,</div><div class='add'>+			    uint8_t mask, uint8_t val);</div><div class='add'>+uint8_t ast_get_index_reg(struct ast_private *ast,</div><div class='add'>+			  uint32_t base, uint8_t index);</div><div class='add'>+uint8_t ast_get_index_reg_mask(struct ast_private *ast,</div><div class='add'>+			       uint32_t base, uint8_t index, uint8_t mask);</div><div class='add'>+</div><div class='add'>+static inline void ast_open_key(struct ast_private *ast)</div><div class='add'>+{</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xA1, 0xFF, 0x04);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define AST_VIDMEM_SIZE_8M    0x00800000</div><div class='add'>+#define AST_VIDMEM_SIZE_16M   0x01000000</div><div class='add'>+#define AST_VIDMEM_SIZE_32M   0x02000000</div><div class='add'>+#define AST_VIDMEM_SIZE_64M   0x04000000</div><div class='add'>+#define AST_VIDMEM_SIZE_128M  0x08000000</div><div class='add'>+</div><div class='add'>+#define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M</div><div class='add'>+</div><div class='add'>+#define AST_MAX_HWC_WIDTH 64</div><div class='add'>+#define AST_MAX_HWC_HEIGHT 64</div><div class='add'>+</div><div class='add'>+#define AST_HWC_SIZE                (AST_MAX_HWC_WIDTH*AST_MAX_HWC_HEIGHT*2)</div><div class='add'>+#define AST_HWC_SIGNATURE_SIZE      32</div><div class='add'>+</div><div class='add'>+#define AST_DEFAULT_HWC_NUM 2</div><div class='add'>+/* define for signature structure */</div><div class='add'>+#define AST_HWC_SIGNATURE_CHECKSUM  0x00</div><div class='add'>+#define AST_HWC_SIGNATURE_SizeX     0x04</div><div class='add'>+#define AST_HWC_SIGNATURE_SizeY     0x08</div><div class='add'>+#define AST_HWC_SIGNATURE_X         0x0C</div><div class='add'>+#define AST_HWC_SIGNATURE_Y         0x10</div><div class='add'>+#define AST_HWC_SIGNATURE_HOTSPOTX  0x14</div><div class='add'>+#define AST_HWC_SIGNATURE_HOTSPOTY  0x18</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct ast_i2c_chan {</div><div class='add'>+	struct i2c_adapter adapter;</div><div class='add'>+	struct drm_device *dev;</div><div class='add'>+	struct i2c_algo_bit_data bit;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ast_connector {</div><div class='add'>+	struct drm_connector base;</div><div class='add'>+	struct ast_i2c_chan *i2c;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ast_crtc {</div><div class='add'>+	struct drm_crtc base;</div><div class='add'>+	u8 lut_r[256], lut_g[256], lut_b[256];</div><div class='add'>+	struct drm_gem_object *cursor_bo;</div><div class='add'>+	uint64_t cursor_addr;</div><div class='add'>+	int cursor_width, cursor_height;</div><div class='add'>+	u8 offset_x, offset_y;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ast_encoder {</div><div class='add'>+	struct drm_encoder base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ast_framebuffer {</div><div class='add'>+	struct drm_framebuffer base;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ast_fbdev {</div><div class='add'>+	struct drm_fb_helper helper;</div><div class='add'>+	struct ast_framebuffer afb;</div><div class='add'>+	struct list_head fbdev_list;</div><div class='add'>+	void *sysram;</div><div class='add'>+	int size;</div><div class='add'>+	struct ttm_bo_kmap_obj mapping;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define to_ast_crtc(x) container_of(x, struct ast_crtc, base)</div><div class='add'>+#define to_ast_connector(x) container_of(x, struct ast_connector, base)</div><div class='add'>+#define to_ast_encoder(x) container_of(x, struct ast_encoder, base)</div><div class='add'>+#define to_ast_framebuffer(x) container_of(x, struct ast_framebuffer, base)</div><div class='add'>+</div><div class='add'>+struct ast_vbios_stdtable {</div><div class='add'>+	u8 misc;</div><div class='add'>+	u8 seq[4];</div><div class='add'>+	u8 crtc[25];</div><div class='add'>+	u8 ar[20];</div><div class='add'>+	u8 gr[9];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ast_vbios_enhtable {</div><div class='add'>+	u32 ht;</div><div class='add'>+	u32 hde;</div><div class='add'>+	u32 hfp;</div><div class='add'>+	u32 hsync;</div><div class='add'>+	u32 vt;</div><div class='add'>+	u32 vde;</div><div class='add'>+	u32 vfp;</div><div class='add'>+	u32 vsync;</div><div class='add'>+	u32 dclk_index;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u32 refresh_rate;</div><div class='add'>+	u32 refresh_rate_index;</div><div class='add'>+	u32 mode_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ast_vbios_dclk_info {</div><div class='add'>+	u8 param1;</div><div class='add'>+	u8 param2;</div><div class='add'>+	u8 param3;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ast_vbios_mode_info {</div><div class='add'>+	struct ast_vbios_stdtable *std_table;</div><div class='add'>+	struct ast_vbios_enhtable *enh_table;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern int ast_mode_init(struct drm_device *dev);</div><div class='add'>+extern void ast_mode_fini(struct drm_device *dev);</div><div class='add'>+</div><div class='add'>+int ast_framebuffer_init(struct drm_device *dev,</div><div class='add'>+			 struct ast_framebuffer *ast_fb,</div><div class='add'>+			 struct drm_mode_fb_cmd2 *mode_cmd,</div><div class='add'>+			 struct drm_gem_object *obj);</div><div class='add'>+</div><div class='add'>+int ast_fbdev_init(struct drm_device *dev);</div><div class='add'>+void ast_fbdev_fini(struct drm_device *dev);</div><div class='add'>+void ast_fbdev_set_suspend(struct drm_device *dev, int state);</div><div class='add'>+</div><div class='add'>+struct ast_bo {</div><div class='add'>+	struct ttm_buffer_object bo;</div><div class='add'>+	struct ttm_placement placement;</div><div class='add'>+	struct ttm_bo_kmap_obj kmap;</div><div class='add'>+	struct drm_gem_object gem;</div><div class='add'>+	u32 placements[3];</div><div class='add'>+	int pin_count;</div><div class='add'>+};</div><div class='add'>+#define gem_to_ast_bo(gobj) container_of((gobj), struct ast_bo, gem)</div><div class='add'>+</div><div class='add'>+static inline struct ast_bo *</div><div class='add'>+ast_bo(struct ttm_buffer_object *bo)</div><div class='add'>+{</div><div class='add'>+	return container_of(bo, struct ast_bo, bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define to_ast_obj(x) container_of(x, struct ast_gem_object, base)</div><div class='add'>+</div><div class='add'>+#define AST_MM_ALIGN_SHIFT 4</div><div class='add'>+#define AST_MM_ALIGN_MASK ((1 &lt;&lt; AST_MM_ALIGN_SHIFT) - 1)</div><div class='add'>+</div><div class='add'>+extern int ast_dumb_create(struct drm_file *file,</div><div class='add'>+			   struct drm_device *dev,</div><div class='add'>+			   struct drm_mode_create_dumb *args);</div><div class='add'>+extern int ast_dumb_destroy(struct drm_file *file,</div><div class='add'>+			    struct drm_device *dev,</div><div class='add'>+			    uint32_t handle);</div><div class='add'>+</div><div class='add'>+extern int ast_gem_init_object(struct drm_gem_object *obj);</div><div class='add'>+extern void ast_gem_free_object(struct drm_gem_object *obj);</div><div class='add'>+extern int ast_dumb_mmap_offset(struct drm_file *file,</div><div class='add'>+				struct drm_device *dev,</div><div class='add'>+				uint32_t handle,</div><div class='add'>+				uint64_t *offset);</div><div class='add'>+</div><div class='add'>+#define DRM_FILE_PAGE_OFFSET (0x100000000ULL &gt;&gt; PAGE_SHIFT)</div><div class='add'>+</div><div class='add'>+int ast_mm_init(struct ast_private *ast);</div><div class='add'>+void ast_mm_fini(struct ast_private *ast);</div><div class='add'>+</div><div class='add'>+int ast_bo_create(struct drm_device *dev, int size, int align,</div><div class='add'>+		  uint32_t flags, struct ast_bo **pastbo);</div><div class='add'>+</div><div class='add'>+int ast_gem_create(struct drm_device *dev,</div><div class='add'>+		   u32 size, bool iskernel,</div><div class='add'>+		   struct drm_gem_object **obj);</div><div class='add'>+</div><div class='add'>+int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr);</div><div class='add'>+int ast_bo_unpin(struct ast_bo *bo);</div><div class='add'>+</div><div class='add'>+int ast_bo_reserve(struct ast_bo *bo, bool no_wait);</div><div class='add'>+void ast_bo_unreserve(struct ast_bo *bo);</div><div class='add'>+void ast_ttm_placement(struct ast_bo *bo, int domain);</div><div class='add'>+int ast_bo_push_sysram(struct ast_bo *bo);</div><div class='add'>+int ast_mmap(struct file *filp, struct vm_area_struct *vma);</div><div class='add'>+</div><div class='add'>+/* ast post */</div><div class='add'>+void ast_post_gpu(struct drm_device *dev);</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_fb.c b/drivers/gpu/drm/ast/ast_fb.c<br/>new file mode 100644<br/>index 000000000000..2fc8e9e860b1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/ast/ast_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_fb.c</a></div><div class='hunk'>@@ -0,0 +1,341 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the</div><div class='add'>+ * "Software"), to deal in the Software without restriction, including</div><div class='add'>+ * without limitation the rights to use, copy, modify, merge, publish,</div><div class='add'>+ * distribute, sub license, and/or sell copies of the Software, and to</div><div class='add'>+ * permit persons to whom the Software is furnished to do so, subject to</div><div class='add'>+ * the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,</div><div class='add'>+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR</div><div class='add'>+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE</div><div class='add'>+ * USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the</div><div class='add'>+ * next paragraph) shall be included in all copies or substantial portions</div><div class='add'>+ * of the Software.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * Authors: Dave Airlie &lt;airlied@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/tty.h&gt;</div><div class='add'>+#include &lt;linux/sysrq.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/fb.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+#include "drm_crtc.h"</div><div class='add'>+#include "drm_fb_helper.h"</div><div class='add'>+#include "ast_drv.h"</div><div class='add'>+</div><div class='add'>+static void ast_dirty_update(struct ast_fbdev *afbdev,</div><div class='add'>+			     int x, int y, int width, int height)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	struct ast_bo *bo;</div><div class='add'>+	int src_offset, dst_offset;</div><div class='add'>+	int bpp = (afbdev-&gt;afb.base.bits_per_pixel + 7)/8;</div><div class='add'>+	int ret;</div><div class='add'>+	bool unmap = false;</div><div class='add'>+</div><div class='add'>+	obj = afbdev-&gt;afb.obj;</div><div class='add'>+	bo = gem_to_ast_bo(obj);</div><div class='add'>+</div><div class='add'>+	ret = ast_bo_reserve(bo, true);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("failed to reserve fb bo\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!bo-&gt;kmap.virtual) {</div><div class='add'>+		ret = ttm_bo_kmap(&amp;bo-&gt;bo, 0, bo-&gt;bo.num_pages, &amp;bo-&gt;kmap);</div><div class='add'>+		if (ret) {</div><div class='add'>+			DRM_ERROR("failed to kmap fb updates\n");</div><div class='add'>+			ast_bo_unreserve(bo);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		unmap = true;</div><div class='add'>+	}</div><div class='add'>+	for (i = y; i &lt; y + height; i++) {</div><div class='add'>+		/* assume equal stride for now */</div><div class='add'>+		src_offset = dst_offset = i * afbdev-&gt;afb.base.pitches[0] + (x * bpp);</div><div class='add'>+		memcpy_toio(bo-&gt;kmap.virtual + src_offset, afbdev-&gt;sysram + src_offset, width * bpp);</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+	if (unmap)</div><div class='add'>+		ttm_bo_kunmap(&amp;bo-&gt;kmap);</div><div class='add'>+</div><div class='add'>+	ast_bo_unreserve(bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_fillrect(struct fb_info *info,</div><div class='add'>+			 const struct fb_fillrect *rect)</div><div class='add'>+{</div><div class='add'>+	struct ast_fbdev *afbdev = info-&gt;par;</div><div class='add'>+	sys_fillrect(info, rect);</div><div class='add'>+	ast_dirty_update(afbdev, rect-&gt;dx, rect-&gt;dy, rect-&gt;width,</div><div class='add'>+			 rect-&gt;height);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_copyarea(struct fb_info *info,</div><div class='add'>+			 const struct fb_copyarea *area)</div><div class='add'>+{</div><div class='add'>+	struct ast_fbdev *afbdev = info-&gt;par;</div><div class='add'>+	sys_copyarea(info, area);</div><div class='add'>+	ast_dirty_update(afbdev, area-&gt;dx, area-&gt;dy, area-&gt;width,</div><div class='add'>+			 area-&gt;height);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_imageblit(struct fb_info *info,</div><div class='add'>+			  const struct fb_image *image)</div><div class='add'>+{</div><div class='add'>+	struct ast_fbdev *afbdev = info-&gt;par;</div><div class='add'>+	sys_imageblit(info, image);</div><div class='add'>+	ast_dirty_update(afbdev, image-&gt;dx, image-&gt;dy, image-&gt;width,</div><div class='add'>+			 image-&gt;height);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct fb_ops astfb_ops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.fb_check_var = drm_fb_helper_check_var,</div><div class='add'>+	.fb_set_par = drm_fb_helper_set_par,</div><div class='add'>+	.fb_fillrect = ast_fillrect,</div><div class='add'>+	.fb_copyarea = ast_copyarea,</div><div class='add'>+	.fb_imageblit = ast_imageblit,</div><div class='add'>+	.fb_pan_display = drm_fb_helper_pan_display,</div><div class='add'>+	.fb_blank = drm_fb_helper_blank,</div><div class='add'>+	.fb_setcmap = drm_fb_helper_setcmap,</div><div class='add'>+	.fb_debug_enter = drm_fb_helper_debug_enter,</div><div class='add'>+	.fb_debug_leave = drm_fb_helper_debug_leave,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int astfb_create_object(struct ast_fbdev *afbdev,</div><div class='add'>+			       struct drm_mode_fb_cmd2 *mode_cmd,</div><div class='add'>+			       struct drm_gem_object **gobj_p)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = afbdev-&gt;helper.dev;</div><div class='add'>+	u32 bpp, depth;</div><div class='add'>+	u32 size;</div><div class='add'>+	struct drm_gem_object *gobj;</div><div class='add'>+</div><div class='add'>+	int ret = 0;</div><div class='add'>+	drm_fb_get_bpp_depth(mode_cmd-&gt;pixel_format, &amp;depth, &amp;bpp);</div><div class='add'>+</div><div class='add'>+	size = mode_cmd-&gt;pitches[0] * mode_cmd-&gt;height;</div><div class='add'>+	ret = ast_gem_create(dev, size, true, &amp;gobj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*gobj_p = gobj;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int astfb_create(struct ast_fbdev *afbdev,</div><div class='add'>+			struct drm_fb_helper_surface_size *sizes)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = afbdev-&gt;helper.dev;</div><div class='add'>+	struct drm_mode_fb_cmd2 mode_cmd;</div><div class='add'>+	struct drm_framebuffer *fb;</div><div class='add'>+	struct fb_info *info;</div><div class='add'>+	int size, ret;</div><div class='add'>+	struct device *device = &amp;dev-&gt;pdev-&gt;dev;</div><div class='add'>+	void *sysram;</div><div class='add'>+	struct drm_gem_object *gobj = NULL;</div><div class='add'>+	struct ast_bo *bo = NULL;</div><div class='add'>+	mode_cmd.width = sizes-&gt;surface_width;</div><div class='add'>+	mode_cmd.height = sizes-&gt;surface_height;</div><div class='add'>+	mode_cmd.pitches[0] = mode_cmd.width * ((sizes-&gt;surface_bpp + 7)/8);</div><div class='add'>+</div><div class='add'>+	mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes-&gt;surface_bpp,</div><div class='add'>+							  sizes-&gt;surface_depth);</div><div class='add'>+</div><div class='add'>+	size = mode_cmd.pitches[0] * mode_cmd.height;</div><div class='add'>+</div><div class='add'>+	ret = astfb_create_object(afbdev, &amp;mode_cmd, &amp;gobj);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("failed to create fbcon backing object %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	bo = gem_to_ast_bo(gobj);</div><div class='add'>+</div><div class='add'>+	sysram = vmalloc(size);</div><div class='add'>+	if (!sysram)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	info = framebuffer_alloc(0, device);</div><div class='add'>+	if (!info) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	info-&gt;par = afbdev;</div><div class='add'>+</div><div class='add'>+	ret = ast_framebuffer_init(dev, &amp;afbdev-&gt;afb, &amp;mode_cmd, gobj);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	afbdev-&gt;sysram = sysram;</div><div class='add'>+	afbdev-&gt;size = size;</div><div class='add'>+</div><div class='add'>+	fb = &amp;afbdev-&gt;afb.base;</div><div class='add'>+	afbdev-&gt;helper.fb = fb;</div><div class='add'>+	afbdev-&gt;helper.fbdev = info;</div><div class='add'>+</div><div class='add'>+	strcpy(info-&gt;fix.id, "astdrmfb");</div><div class='add'>+</div><div class='add'>+	info-&gt;flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;</div><div class='add'>+	info-&gt;fbops = &amp;astfb_ops;</div><div class='add'>+</div><div class='add'>+	ret = fb_alloc_cmap(&amp;info-&gt;cmap, 256, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info-&gt;apertures = alloc_apertures(1);</div><div class='add'>+	if (!info-&gt;apertures) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	info-&gt;apertures-&gt;ranges[0].base = pci_resource_start(dev-&gt;pdev, 0);</div><div class='add'>+	info-&gt;apertures-&gt;ranges[0].size = pci_resource_len(dev-&gt;pdev, 0);</div><div class='add'>+</div><div class='add'>+	drm_fb_helper_fill_fix(info, fb-&gt;pitches[0], fb-&gt;depth);</div><div class='add'>+	drm_fb_helper_fill_var(info, &amp;afbdev-&gt;helper, sizes-&gt;fb_width, sizes-&gt;fb_height);</div><div class='add'>+</div><div class='add'>+	info-&gt;screen_base = sysram;</div><div class='add'>+	info-&gt;screen_size = size;</div><div class='add'>+</div><div class='add'>+	info-&gt;pixmap.flags = FB_PIXMAP_SYSTEM;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("allocated %dx%d\n",</div><div class='add'>+		      fb-&gt;width, fb-&gt;height);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,</div><div class='add'>+			       u16 blue, int regno)</div><div class='add'>+{</div><div class='add'>+	struct ast_crtc *ast_crtc = to_ast_crtc(crtc);</div><div class='add'>+	ast_crtc-&gt;lut_r[regno] = red &gt;&gt; 8;</div><div class='add'>+	ast_crtc-&gt;lut_g[regno] = green &gt;&gt; 8;</div><div class='add'>+	ast_crtc-&gt;lut_b[regno] = blue &gt;&gt; 8;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,</div><div class='add'>+			       u16 *blue, int regno)</div><div class='add'>+{</div><div class='add'>+	struct ast_crtc *ast_crtc = to_ast_crtc(crtc);</div><div class='add'>+	*red = ast_crtc-&gt;lut_r[regno] &lt;&lt; 8;</div><div class='add'>+	*green = ast_crtc-&gt;lut_g[regno] &lt;&lt; 8;</div><div class='add'>+	*blue = ast_crtc-&gt;lut_b[regno] &lt;&lt; 8;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_find_or_create_single(struct drm_fb_helper *helper,</div><div class='add'>+					  struct drm_fb_helper_surface_size *sizes)</div><div class='add'>+{</div><div class='add'>+	struct ast_fbdev *afbdev = (struct ast_fbdev *)helper;</div><div class='add'>+	int new_fb = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!helper-&gt;fb) {</div><div class='add'>+		ret = astfb_create(afbdev, sizes);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		new_fb = 1;</div><div class='add'>+	}</div><div class='add'>+	return new_fb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct drm_fb_helper_funcs ast_fb_helper_funcs = {</div><div class='add'>+	.gamma_set = ast_fb_gamma_set,</div><div class='add'>+	.gamma_get = ast_fb_gamma_get,</div><div class='add'>+	.fb_probe = ast_find_or_create_single,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ast_fbdev_destroy(struct drm_device *dev,</div><div class='add'>+			      struct ast_fbdev *afbdev)</div><div class='add'>+{</div><div class='add'>+	struct fb_info *info;</div><div class='add'>+	struct ast_framebuffer *afb = &amp;afbdev-&gt;afb;</div><div class='add'>+	if (afbdev-&gt;helper.fbdev) {</div><div class='add'>+		info = afbdev-&gt;helper.fbdev;</div><div class='add'>+		unregister_framebuffer(info);</div><div class='add'>+		if (info-&gt;cmap.len)</div><div class='add'>+			fb_dealloc_cmap(&amp;info-&gt;cmap);</div><div class='add'>+		framebuffer_release(info);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (afb-&gt;obj) {</div><div class='add'>+		drm_gem_object_unreference_unlocked(afb-&gt;obj);</div><div class='add'>+		afb-&gt;obj = NULL;</div><div class='add'>+	}</div><div class='add'>+	drm_fb_helper_fini(&amp;afbdev-&gt;helper);</div><div class='add'>+</div><div class='add'>+	vfree(afbdev-&gt;sysram);</div><div class='add'>+	drm_framebuffer_cleanup(&amp;afb-&gt;base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_fbdev_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	struct ast_fbdev *afbdev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	afbdev = kzalloc(sizeof(struct ast_fbdev), GFP_KERNEL);</div><div class='add'>+	if (!afbdev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ast-&gt;fbdev = afbdev;</div><div class='add'>+	afbdev-&gt;helper.funcs = &amp;ast_fb_helper_funcs;</div><div class='add'>+	ret = drm_fb_helper_init(dev, &amp;afbdev-&gt;helper,</div><div class='add'>+				 1, 1);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(afbdev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_fb_helper_single_add_all_connectors(&amp;afbdev-&gt;helper);</div><div class='add'>+	drm_fb_helper_initial_config(&amp;afbdev-&gt;helper, 32);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_fbdev_fini(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (!ast-&gt;fbdev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ast_fbdev_destroy(dev, ast-&gt;fbdev);</div><div class='add'>+	kfree(ast-&gt;fbdev);</div><div class='add'>+	ast-&gt;fbdev = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_fbdev_set_suspend(struct drm_device *dev, int state)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (!ast-&gt;fbdev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fb_set_suspend(ast-&gt;fbdev-&gt;helper.fbdev, state);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c<br/>new file mode 100644<br/>index 000000000000..95ae55b8214b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/ast/ast_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_main.c</a></div><div class='hunk'>@@ -0,0 +1,527 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the</div><div class='add'>+ * "Software"), to deal in the Software without restriction, including</div><div class='add'>+ * without limitation the rights to use, copy, modify, merge, publish,</div><div class='add'>+ * distribute, sub license, and/or sell copies of the Software, and to</div><div class='add'>+ * permit persons to whom the Software is furnished to do so, subject to</div><div class='add'>+ * the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,</div><div class='add'>+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR</div><div class='add'>+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE</div><div class='add'>+ * USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the</div><div class='add'>+ * next paragraph) shall be included in all copies or substantial portions</div><div class='add'>+ * of the Software.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * Authors: Dave Airlie &lt;airlied@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "ast_drv.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#include "drm_fb_helper.h"</div><div class='add'>+#include "drm_crtc_helper.h"</div><div class='add'>+</div><div class='add'>+#include "ast_dram_tables.h"</div><div class='add'>+</div><div class='add'>+void ast_set_index_reg_mask(struct ast_private *ast,</div><div class='add'>+			    uint32_t base, uint8_t index,</div><div class='add'>+			    uint8_t mask, uint8_t val)</div><div class='add'>+{</div><div class='add'>+	u8 tmp;</div><div class='add'>+	ast_io_write8(ast, base, index);</div><div class='add'>+	tmp = (ast_io_read8(ast, base + 1) &amp; mask) | val;</div><div class='add'>+	ast_set_index_reg(ast, base, index, tmp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+uint8_t ast_get_index_reg(struct ast_private *ast,</div><div class='add'>+			  uint32_t base, uint8_t index)</div><div class='add'>+{</div><div class='add'>+	uint8_t ret;</div><div class='add'>+	ast_io_write8(ast, base, index);</div><div class='add'>+	ret = ast_io_read8(ast, base + 1);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+uint8_t ast_get_index_reg_mask(struct ast_private *ast,</div><div class='add'>+			       uint32_t base, uint8_t index, uint8_t mask)</div><div class='add'>+{</div><div class='add'>+	uint8_t ret;</div><div class='add'>+	ast_io_write8(ast, base, index);</div><div class='add'>+	ret = ast_io_read8(ast, base + 1) &amp; mask;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int ast_detect_chip(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;pdev-&gt;device == PCI_CHIP_AST1180) {</div><div class='add'>+		ast-&gt;chip = AST1100;</div><div class='add'>+		DRM_INFO("AST 1180 detected\n");</div><div class='add'>+	} else {</div><div class='add'>+		if (dev-&gt;pdev-&gt;revision &gt;= 0x20) {</div><div class='add'>+			ast-&gt;chip = AST2300;</div><div class='add'>+			DRM_INFO("AST 2300 detected\n");</div><div class='add'>+		} else if (dev-&gt;pdev-&gt;revision &gt;= 0x10) {</div><div class='add'>+			uint32_t data;</div><div class='add'>+			ast_write32(ast, 0xf004, 0x1e6e0000);</div><div class='add'>+			ast_write32(ast, 0xf000, 0x1);</div><div class='add'>+</div><div class='add'>+			data = ast_read32(ast, 0x1207c);</div><div class='add'>+			switch (data &amp; 0x0300) {</div><div class='add'>+			case 0x0200:</div><div class='add'>+				ast-&gt;chip = AST1100;</div><div class='add'>+				DRM_INFO("AST 1100 detected\n");</div><div class='add'>+				break;</div><div class='add'>+			case 0x0100:</div><div class='add'>+				ast-&gt;chip = AST2200;</div><div class='add'>+				DRM_INFO("AST 2200 detected\n");</div><div class='add'>+				break;</div><div class='add'>+			case 0x0000:</div><div class='add'>+				ast-&gt;chip = AST2150;</div><div class='add'>+				DRM_INFO("AST 2150 detected\n");</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				ast-&gt;chip = AST2100;</div><div class='add'>+				DRM_INFO("AST 2100 detected\n");</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			ast-&gt;vga2_clone = false;</div><div class='add'>+		} else {</div><div class='add'>+			ast-&gt;chip = 2000;</div><div class='add'>+			DRM_INFO("AST 2000 detected\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_get_dram_info(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	uint32_t data, data2;</div><div class='add'>+	uint32_t denum, num, div, ref_pll;</div><div class='add'>+</div><div class='add'>+	ast_write32(ast, 0xf004, 0x1e6e0000);</div><div class='add'>+	ast_write32(ast, 0xf000, 0x1);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	ast_write32(ast, 0x10000, 0xfc600309);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		;</div><div class='add'>+	} while (ast_read32(ast, 0x10000) != 0x01);</div><div class='add'>+	data = ast_read32(ast, 0x10004);</div><div class='add'>+</div><div class='add'>+	if (data &amp; 0x400)</div><div class='add'>+		ast-&gt;dram_bus_width = 16;</div><div class='add'>+	else</div><div class='add'>+		ast-&gt;dram_bus_width = 32;</div><div class='add'>+</div><div class='add'>+	if (ast-&gt;chip == AST2300) {</div><div class='add'>+		switch (data &amp; 0x03) {</div><div class='add'>+		case 0:</div><div class='add'>+			ast-&gt;dram_type = AST_DRAM_512Mx16;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+		case 1:</div><div class='add'>+			ast-&gt;dram_type = AST_DRAM_1Gx16;</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			ast-&gt;dram_type = AST_DRAM_2Gx16;</div><div class='add'>+			break;</div><div class='add'>+		case 3:</div><div class='add'>+			ast-&gt;dram_type = AST_DRAM_4Gx16;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		switch (data &amp; 0x0c) {</div><div class='add'>+		case 0:</div><div class='add'>+		case 4:</div><div class='add'>+			ast-&gt;dram_type = AST_DRAM_512Mx16;</div><div class='add'>+			break;</div><div class='add'>+		case 8:</div><div class='add'>+			if (data &amp; 0x40)</div><div class='add'>+				ast-&gt;dram_type = AST_DRAM_1Gx16;</div><div class='add'>+			else</div><div class='add'>+				ast-&gt;dram_type = AST_DRAM_512Mx32;</div><div class='add'>+			break;</div><div class='add'>+		case 0xc:</div><div class='add'>+			ast-&gt;dram_type = AST_DRAM_1Gx32;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = ast_read32(ast, 0x10120);</div><div class='add'>+	data2 = ast_read32(ast, 0x10170);</div><div class='add'>+	if (data2 &amp; 0x2000)</div><div class='add'>+		ref_pll = 14318;</div><div class='add'>+	else</div><div class='add'>+		ref_pll = 12000;</div><div class='add'>+</div><div class='add'>+	denum = data &amp; 0x1f;</div><div class='add'>+	num = (data &amp; 0x3fe0) &gt;&gt; 5;</div><div class='add'>+	data = (data &amp; 0xc000) &gt;&gt; 14;</div><div class='add'>+	switch (data) {</div><div class='add'>+	case 3:</div><div class='add'>+		div = 0x4;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+	case 1:</div><div class='add'>+		div = 0x2;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		div = 0x1;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	ast-&gt;mclk = ref_pll * (num + 2) / (denum + 2) * (div * 1000);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+uint32_t ast_get_max_dclk(struct drm_device *dev, int bpp)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	uint32_t dclk, jreg;</div><div class='add'>+	uint32_t dram_bus_width, mclk, dram_bandwidth, actual_dram_bandwidth, dram_efficency = 500;</div><div class='add'>+</div><div class='add'>+	dram_bus_width = ast-&gt;dram_bus_width;</div><div class='add'>+	mclk = ast-&gt;mclk;</div><div class='add'>+</div><div class='add'>+	if (ast-&gt;chip == AST2100 ||</div><div class='add'>+	    ast-&gt;chip == AST1100 ||</div><div class='add'>+	    ast-&gt;chip == AST2200 ||</div><div class='add'>+	    ast-&gt;chip == AST2150 ||</div><div class='add'>+	    ast-&gt;dram_bus_width == 16)</div><div class='add'>+		dram_efficency = 600;</div><div class='add'>+	else if (ast-&gt;chip == AST2300)</div><div class='add'>+		dram_efficency = 400;</div><div class='add'>+</div><div class='add'>+	dram_bandwidth = mclk * dram_bus_width * 2 / 8;</div><div class='add'>+	actual_dram_bandwidth = dram_bandwidth * dram_efficency / 1000;</div><div class='add'>+</div><div class='add'>+	if (ast-&gt;chip == AST1180)</div><div class='add'>+		dclk = actual_dram_bandwidth / ((bpp + 1) / 8);</div><div class='add'>+	else {</div><div class='add'>+		jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);</div><div class='add'>+		if ((jreg &amp; 0x08) &amp;&amp; (ast-&gt;chip == AST2000))</div><div class='add'>+			dclk = actual_dram_bandwidth / ((bpp + 1 + 16) / 8);</div><div class='add'>+		else if ((jreg &amp; 0x08) &amp;&amp; (bpp == 8))</div><div class='add'>+			dclk = actual_dram_bandwidth / ((bpp + 1 + 24) / 8);</div><div class='add'>+		else</div><div class='add'>+			dclk = actual_dram_bandwidth / ((bpp + 1) / 8);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ast-&gt;chip == AST2100 ||</div><div class='add'>+	    ast-&gt;chip == AST2200 ||</div><div class='add'>+	    ast-&gt;chip == AST2300 ||</div><div class='add'>+	    ast-&gt;chip == AST1180) {</div><div class='add'>+		if (dclk &gt; 200)</div><div class='add'>+			dclk = 200;</div><div class='add'>+	} else {</div><div class='add'>+		if (dclk &gt; 165)</div><div class='add'>+			dclk = 165;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dclk;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_user_framebuffer_destroy(struct drm_framebuffer *fb)</div><div class='add'>+{</div><div class='add'>+	struct ast_framebuffer *ast_fb = to_ast_framebuffer(fb);</div><div class='add'>+	if (ast_fb-&gt;obj)</div><div class='add'>+		drm_gem_object_unreference_unlocked(ast_fb-&gt;obj);</div><div class='add'>+</div><div class='add'>+	drm_framebuffer_cleanup(fb);</div><div class='add'>+	kfree(fb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_user_framebuffer_create_handle(struct drm_framebuffer *fb,</div><div class='add'>+					      struct drm_file *file,</div><div class='add'>+					      unsigned int *handle)</div><div class='add'>+{</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct drm_framebuffer_funcs ast_fb_funcs = {</div><div class='add'>+	.destroy = ast_user_framebuffer_destroy,</div><div class='add'>+	.create_handle = ast_user_framebuffer_create_handle,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+int ast_framebuffer_init(struct drm_device *dev,</div><div class='add'>+			 struct ast_framebuffer *ast_fb,</div><div class='add'>+			 struct drm_mode_fb_cmd2 *mode_cmd,</div><div class='add'>+			 struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = drm_framebuffer_init(dev, &amp;ast_fb-&gt;base, &amp;ast_fb_funcs);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("framebuffer init failed %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	drm_helper_mode_fill_fb_struct(&amp;ast_fb-&gt;base, mode_cmd);</div><div class='add'>+	ast_fb-&gt;obj = obj;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct drm_framebuffer *</div><div class='add'>+ast_user_framebuffer_create(struct drm_device *dev,</div><div class='add'>+	       struct drm_file *filp,</div><div class='add'>+	       struct drm_mode_fb_cmd2 *mode_cmd)</div><div class='add'>+{</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	struct ast_framebuffer *ast_fb;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	obj = drm_gem_object_lookup(dev, filp, mode_cmd-&gt;handles[0]);</div><div class='add'>+	if (obj == NULL)</div><div class='add'>+		return ERR_PTR(-ENOENT);</div><div class='add'>+</div><div class='add'>+	ast_fb = kzalloc(sizeof(*ast_fb), GFP_KERNEL);</div><div class='add'>+	if (!ast_fb) {</div><div class='add'>+		drm_gem_object_unreference_unlocked(obj);</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ast_framebuffer_init(dev, ast_fb, mode_cmd, obj);</div><div class='add'>+	if (ret) {</div><div class='add'>+		drm_gem_object_unreference_unlocked(obj);</div><div class='add'>+		kfree(ast_fb);</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+	}</div><div class='add'>+	return &amp;ast_fb-&gt;base;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct drm_mode_config_funcs ast_mode_funcs = {</div><div class='add'>+	.fb_create = ast_user_framebuffer_create,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u32 ast_get_vram_info(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	u8 jreg;</div><div class='add'>+</div><div class='add'>+	ast_open_key(ast);</div><div class='add'>+</div><div class='add'>+	jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xaa, 0xff);</div><div class='add'>+	switch (jreg &amp; 3) {</div><div class='add'>+	case 0: return AST_VIDMEM_SIZE_8M;</div><div class='add'>+	case 1: return AST_VIDMEM_SIZE_16M;</div><div class='add'>+	case 2: return AST_VIDMEM_SIZE_32M;</div><div class='add'>+	case 3: return AST_VIDMEM_SIZE_64M;</div><div class='add'>+	}</div><div class='add'>+	return AST_VIDMEM_DEFAULT_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_driver_load(struct drm_device *dev, unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL);</div><div class='add'>+	if (!ast)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev-&gt;dev_private = ast;</div><div class='add'>+	ast-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	ast-&gt;regs = pci_iomap(dev-&gt;pdev, 1, 0);</div><div class='add'>+	if (!ast-&gt;regs) {</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto out_free;</div><div class='add'>+	}</div><div class='add'>+	ast-&gt;ioregs = pci_iomap(dev-&gt;pdev, 2, 0);</div><div class='add'>+	if (!ast-&gt;ioregs) {</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto out_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ast_detect_chip(dev);</div><div class='add'>+</div><div class='add'>+	if (ast-&gt;chip != AST1180) {</div><div class='add'>+		ast_get_dram_info(dev);</div><div class='add'>+		ast-&gt;vram_size = ast_get_vram_info(dev);</div><div class='add'>+		DRM_INFO("dram %d %d %d %08x\n", ast-&gt;mclk, ast-&gt;dram_type, ast-&gt;dram_bus_width, ast-&gt;vram_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ast_mm_init(ast);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free;</div><div class='add'>+</div><div class='add'>+	drm_mode_config_init(dev);</div><div class='add'>+</div><div class='add'>+	dev-&gt;mode_config.funcs = (void *)&amp;ast_mode_funcs;</div><div class='add'>+	dev-&gt;mode_config.min_width = 0;</div><div class='add'>+	dev-&gt;mode_config.min_height = 0;</div><div class='add'>+	dev-&gt;mode_config.preferred_depth = 24;</div><div class='add'>+	dev-&gt;mode_config.prefer_shadow = 1;</div><div class='add'>+</div><div class='add'>+	if (ast-&gt;chip == AST2100 ||</div><div class='add'>+	    ast-&gt;chip == AST2200 ||</div><div class='add'>+	    ast-&gt;chip == AST2300 ||</div><div class='add'>+	    ast-&gt;chip == AST1180) {</div><div class='add'>+		dev-&gt;mode_config.max_width = 1920;</div><div class='add'>+		dev-&gt;mode_config.max_height = 2048;</div><div class='add'>+	} else {</div><div class='add'>+		dev-&gt;mode_config.max_width = 1600;</div><div class='add'>+		dev-&gt;mode_config.max_height = 1200;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ast_mode_init(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free;</div><div class='add'>+</div><div class='add'>+	ret = ast_fbdev_init(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+out_free:</div><div class='add'>+	kfree(ast);</div><div class='add'>+	dev-&gt;dev_private = NULL;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_driver_unload(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	ast_mode_fini(dev);</div><div class='add'>+	ast_fbdev_fini(dev);</div><div class='add'>+	drm_mode_config_cleanup(dev);</div><div class='add'>+</div><div class='add'>+	ast_mm_fini(ast);</div><div class='add'>+	pci_iounmap(dev-&gt;pdev, ast-&gt;ioregs);</div><div class='add'>+	pci_iounmap(dev-&gt;pdev, ast-&gt;regs);</div><div class='add'>+	kfree(ast);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_gem_create(struct drm_device *dev,</div><div class='add'>+		   u32 size, bool iskernel,</div><div class='add'>+		   struct drm_gem_object **obj)</div><div class='add'>+{</div><div class='add'>+	struct ast_bo *astbo;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*obj = NULL;</div><div class='add'>+</div><div class='add'>+	size = roundup(size, PAGE_SIZE);</div><div class='add'>+	if (size == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = ast_bo_create(dev, size, 0, 0, &amp;astbo);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (ret != -ERESTARTSYS)</div><div class='add'>+			DRM_ERROR("failed to allocate GEM object\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	*obj = &amp;astbo-&gt;gem;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_dumb_create(struct drm_file *file,</div><div class='add'>+		    struct drm_device *dev,</div><div class='add'>+		    struct drm_mode_create_dumb *args)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct drm_gem_object *gobj;</div><div class='add'>+	u32 handle;</div><div class='add'>+</div><div class='add'>+	args-&gt;pitch = args-&gt;width * ((args-&gt;bpp + 7) / 8);</div><div class='add'>+	args-&gt;size = args-&gt;pitch * args-&gt;height;</div><div class='add'>+</div><div class='add'>+	ret = ast_gem_create(dev, args-&gt;size, false,</div><div class='add'>+			     &amp;gobj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = drm_gem_handle_create(file, gobj, &amp;handle);</div><div class='add'>+	drm_gem_object_unreference_unlocked(gobj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	args-&gt;handle = handle;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_dumb_destroy(struct drm_file *file,</div><div class='add'>+		     struct drm_device *dev,</div><div class='add'>+		     uint32_t handle)</div><div class='add'>+{</div><div class='add'>+	return drm_gem_handle_delete(file, handle);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_gem_init_object(struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	BUG();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_bo_unref(struct ast_bo **bo)</div><div class='add'>+{</div><div class='add'>+	struct ttm_buffer_object *tbo;</div><div class='add'>+</div><div class='add'>+	if ((*bo) == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	tbo = &amp;((*bo)-&gt;bo);</div><div class='add'>+	ttm_bo_unref(&amp;tbo);</div><div class='add'>+	if (tbo == NULL)</div><div class='add'>+		*bo = NULL;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+void ast_gem_free_object(struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	struct ast_bo *ast_bo = gem_to_ast_bo(obj);</div><div class='add'>+</div><div class='add'>+	if (!ast_bo)</div><div class='add'>+		return;</div><div class='add'>+	ast_bo_unref(&amp;ast_bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static inline u64 ast_bo_mmap_offset(struct ast_bo *bo)</div><div class='add'>+{</div><div class='add'>+	return bo-&gt;bo.addr_space_offset;</div><div class='add'>+}</div><div class='add'>+int</div><div class='add'>+ast_dumb_mmap_offset(struct drm_file *file,</div><div class='add'>+		     struct drm_device *dev,</div><div class='add'>+		     uint32_t handle,</div><div class='add'>+		     uint64_t *offset)</div><div class='add'>+{</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	int ret;</div><div class='add'>+	struct ast_bo *bo;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	obj = drm_gem_object_lookup(dev, file, handle);</div><div class='add'>+	if (obj == NULL) {</div><div class='add'>+		ret = -ENOENT;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bo = gem_to_ast_bo(obj);</div><div class='add'>+	*offset = ast_bo_mmap_offset(bo);</div><div class='add'>+</div><div class='add'>+	drm_gem_object_unreference(obj);</div><div class='add'>+	ret = 0;</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c<br/>new file mode 100644<br/>index 000000000000..65f9d231af14<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/ast/ast_mode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_mode.c</a></div><div class='hunk'>@@ -0,0 +1,1160 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ * Parts based on xf86-video-ast</div><div class='add'>+ * Copyright (c) 2005 ASPEED Technology Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the</div><div class='add'>+ * "Software"), to deal in the Software without restriction, including</div><div class='add'>+ * without limitation the rights to use, copy, modify, merge, publish,</div><div class='add'>+ * distribute, sub license, and/or sell copies of the Software, and to</div><div class='add'>+ * permit persons to whom the Software is furnished to do so, subject to</div><div class='add'>+ * the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,</div><div class='add'>+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR</div><div class='add'>+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE</div><div class='add'>+ * USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the</div><div class='add'>+ * next paragraph) shall be included in all copies or substantial portions</div><div class='add'>+ * of the Software.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * Authors: Dave Airlie &lt;airlied@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm_crtc.h"</div><div class='add'>+#include "drm_crtc_helper.h"</div><div class='add'>+#include "ast_drv.h"</div><div class='add'>+</div><div class='add'>+#include "ast_tables.h"</div><div class='add'>+</div><div class='add'>+static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);</div><div class='add'>+static void ast_i2c_destroy(struct ast_i2c_chan *i2c);</div><div class='add'>+static int ast_cursor_set(struct drm_crtc *crtc,</div><div class='add'>+			  struct drm_file *file_priv,</div><div class='add'>+			  uint32_t handle,</div><div class='add'>+			  uint32_t width,</div><div class='add'>+			  uint32_t height);</div><div class='add'>+static int ast_cursor_move(struct drm_crtc *crtc,</div><div class='add'>+			   int x, int y);</div><div class='add'>+</div><div class='add'>+static inline void ast_load_palette_index(struct ast_private *ast,</div><div class='add'>+				     u8 index, u8 red, u8 green,</div><div class='add'>+				     u8 blue)</div><div class='add'>+{</div><div class='add'>+	ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index);</div><div class='add'>+	ast_io_read8(ast, AST_IO_SEQ_PORT);</div><div class='add'>+	ast_io_write8(ast, AST_IO_DAC_DATA, red);</div><div class='add'>+	ast_io_read8(ast, AST_IO_SEQ_PORT);</div><div class='add'>+	ast_io_write8(ast, AST_IO_DAC_DATA, green);</div><div class='add'>+	ast_io_read8(ast, AST_IO_SEQ_PORT);</div><div class='add'>+	ast_io_write8(ast, AST_IO_DAC_DATA, blue);</div><div class='add'>+	ast_io_read8(ast, AST_IO_SEQ_PORT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_crtc_load_lut(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	struct ast_crtc *ast_crtc = to_ast_crtc(crtc);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!crtc-&gt;enabled)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 256; i++)</div><div class='add'>+		ast_load_palette_index(ast, i, ast_crtc-&gt;lut_r[i],</div><div class='add'>+				       ast_crtc-&gt;lut_g[i], ast_crtc-&gt;lut_b[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mode *mode,</div><div class='add'>+				    struct drm_display_mode *adjusted_mode,</div><div class='add'>+				    struct ast_vbios_mode_info *vbios_mode)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate;</div><div class='add'>+	u32 hborder, vborder;</div><div class='add'>+</div><div class='add'>+	switch (crtc-&gt;fb-&gt;bits_per_pixel) {</div><div class='add'>+	case 8:</div><div class='add'>+		vbios_mode-&gt;std_table = &amp;vbios_stdtable[VGAModeIndex];</div><div class='add'>+		color_index = VGAModeIndex - 1;</div><div class='add'>+		break;</div><div class='add'>+	case 16:</div><div class='add'>+		vbios_mode-&gt;std_table = &amp;vbios_stdtable[HiCModeIndex];</div><div class='add'>+		color_index = HiCModeIndex;</div><div class='add'>+		break;</div><div class='add'>+	case 24:</div><div class='add'>+	case 32:</div><div class='add'>+		vbios_mode-&gt;std_table = &amp;vbios_stdtable[TrueCModeIndex];</div><div class='add'>+		color_index = TrueCModeIndex;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (crtc-&gt;mode.crtc_hdisplay) {</div><div class='add'>+	case 640:</div><div class='add'>+		vbios_mode-&gt;enh_table = &amp;res_640x480[refresh_rate_index];</div><div class='add'>+		break;</div><div class='add'>+	case 800:</div><div class='add'>+		vbios_mode-&gt;enh_table = &amp;res_800x600[refresh_rate_index];</div><div class='add'>+		break;</div><div class='add'>+	case 1024:</div><div class='add'>+		vbios_mode-&gt;enh_table = &amp;res_1024x768[refresh_rate_index];</div><div class='add'>+		break;</div><div class='add'>+	case 1280:</div><div class='add'>+		if (crtc-&gt;mode.crtc_vdisplay == 800)</div><div class='add'>+			vbios_mode-&gt;enh_table = &amp;res_1280x800[refresh_rate_index];</div><div class='add'>+		else</div><div class='add'>+			vbios_mode-&gt;enh_table = &amp;res_1280x1024[refresh_rate_index];</div><div class='add'>+		break;</div><div class='add'>+	case 1440:</div><div class='add'>+		vbios_mode-&gt;enh_table = &amp;res_1440x900[refresh_rate_index];</div><div class='add'>+		break;</div><div class='add'>+	case 1600:</div><div class='add'>+		vbios_mode-&gt;enh_table = &amp;res_1600x1200[refresh_rate_index];</div><div class='add'>+		break;</div><div class='add'>+	case 1680:</div><div class='add'>+		vbios_mode-&gt;enh_table = &amp;res_1680x1050[refresh_rate_index];</div><div class='add'>+		break;</div><div class='add'>+	case 1920:</div><div class='add'>+		if (crtc-&gt;mode.crtc_vdisplay == 1080)</div><div class='add'>+			vbios_mode-&gt;enh_table = &amp;res_1920x1080[refresh_rate_index];</div><div class='add'>+		else</div><div class='add'>+			vbios_mode-&gt;enh_table = &amp;res_1920x1200[refresh_rate_index];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	refresh_rate = drm_mode_vrefresh(mode);</div><div class='add'>+	while (vbios_mode-&gt;enh_table-&gt;refresh_rate &lt; refresh_rate) {</div><div class='add'>+		vbios_mode-&gt;enh_table++;</div><div class='add'>+		if ((vbios_mode-&gt;enh_table-&gt;refresh_rate &gt; refresh_rate) ||</div><div class='add'>+		    (vbios_mode-&gt;enh_table-&gt;refresh_rate == 0xff)) {</div><div class='add'>+			vbios_mode-&gt;enh_table--;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hborder = (vbios_mode-&gt;enh_table-&gt;flags &amp; HBorder) ? 8 : 0;</div><div class='add'>+	vborder = (vbios_mode-&gt;enh_table-&gt;flags &amp; VBorder) ? 8 : 0;</div><div class='add'>+</div><div class='add'>+	adjusted_mode-&gt;crtc_htotal = vbios_mode-&gt;enh_table-&gt;ht;</div><div class='add'>+	adjusted_mode-&gt;crtc_hblank_start = vbios_mode-&gt;enh_table-&gt;hde + hborder;</div><div class='add'>+	adjusted_mode-&gt;crtc_hblank_end = vbios_mode-&gt;enh_table-&gt;ht - hborder;</div><div class='add'>+	adjusted_mode-&gt;crtc_hsync_start = vbios_mode-&gt;enh_table-&gt;hde + hborder +</div><div class='add'>+		vbios_mode-&gt;enh_table-&gt;hfp;</div><div class='add'>+	adjusted_mode-&gt;crtc_hsync_end = (vbios_mode-&gt;enh_table-&gt;hde + hborder +</div><div class='add'>+					 vbios_mode-&gt;enh_table-&gt;hfp +</div><div class='add'>+					 vbios_mode-&gt;enh_table-&gt;hsync);</div><div class='add'>+</div><div class='add'>+	adjusted_mode-&gt;crtc_vtotal = vbios_mode-&gt;enh_table-&gt;vt;</div><div class='add'>+	adjusted_mode-&gt;crtc_vblank_start = vbios_mode-&gt;enh_table-&gt;vde + vborder;</div><div class='add'>+	adjusted_mode-&gt;crtc_vblank_end = vbios_mode-&gt;enh_table-&gt;vt - vborder;</div><div class='add'>+	adjusted_mode-&gt;crtc_vsync_start = vbios_mode-&gt;enh_table-&gt;vde + vborder +</div><div class='add'>+		vbios_mode-&gt;enh_table-&gt;vfp;</div><div class='add'>+	adjusted_mode-&gt;crtc_vsync_end = (vbios_mode-&gt;enh_table-&gt;vde + vborder +</div><div class='add'>+					 vbios_mode-&gt;enh_table-&gt;vfp +</div><div class='add'>+					 vbios_mode-&gt;enh_table-&gt;vsync);</div><div class='add'>+</div><div class='add'>+	refresh_rate_index = vbios_mode-&gt;enh_table-&gt;refresh_rate_index;</div><div class='add'>+	mode_id = vbios_mode-&gt;enh_table-&gt;mode_id;</div><div class='add'>+</div><div class='add'>+	if (ast-&gt;chip == AST1180) {</div><div class='add'>+		/* TODO 1180 */</div><div class='add'>+	} else {</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index &amp; 0xf) &lt;&lt; 4));</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index &amp; 0xff);</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id &amp; 0xff);</div><div class='add'>+</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, crtc-&gt;fb-&gt;bits_per_pixel);</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode-&gt;clock / 1000);</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode-&gt;crtc_hdisplay);</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode-&gt;crtc_hdisplay &gt;&gt; 8);</div><div class='add'>+</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode-&gt;crtc_vdisplay);</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode-&gt;crtc_vdisplay &gt;&gt; 8);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+static void ast_set_std_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,</div><div class='add'>+			    struct ast_vbios_mode_info *vbios_mode)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	struct ast_vbios_stdtable *stdtable;</div><div class='add'>+	u32 i;</div><div class='add'>+	u8 jreg;</div><div class='add'>+</div><div class='add'>+	stdtable = vbios_mode-&gt;std_table;</div><div class='add'>+</div><div class='add'>+	jreg = stdtable-&gt;misc;</div><div class='add'>+	ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);</div><div class='add'>+</div><div class='add'>+	/* Set SEQ */</div><div class='add'>+	ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		jreg = stdtable-&gt;seq[i];</div><div class='add'>+		if (!i)</div><div class='add'>+			jreg |= 0x20;</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set CRTC */</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);</div><div class='add'>+	for (i = 0; i &lt; 25; i++)</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable-&gt;crtc[i]);</div><div class='add'>+</div><div class='add'>+	/* set AR */</div><div class='add'>+	jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);</div><div class='add'>+	for (i = 0; i &lt; 20; i++) {</div><div class='add'>+		jreg = stdtable-&gt;ar[i];</div><div class='add'>+		ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i);</div><div class='add'>+		ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);</div><div class='add'>+	}</div><div class='add'>+	ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14);</div><div class='add'>+	ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00);</div><div class='add'>+</div><div class='add'>+	jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);</div><div class='add'>+	ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20);</div><div class='add'>+</div><div class='add'>+	/* Set GR */</div><div class='add'>+	for (i = 0; i &lt; 9; i++)</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable-&gt;gr[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,</div><div class='add'>+			     struct ast_vbios_mode_info *vbios_mode)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;</div><div class='add'>+	u16 temp;</div><div class='add'>+</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);</div><div class='add'>+</div><div class='add'>+	temp = (mode-&gt;crtc_htotal &gt;&gt; 3) - 5;</div><div class='add'>+	if (temp &amp; 0x100)</div><div class='add'>+		jregAC |= 0x01; /* HT D[8] */</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp);</div><div class='add'>+</div><div class='add'>+	temp = (mode-&gt;crtc_hdisplay &gt;&gt; 3) - 1;</div><div class='add'>+	if (temp &amp; 0x100)</div><div class='add'>+		jregAC |= 0x04; /* HDE D[8] */</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp);</div><div class='add'>+</div><div class='add'>+	temp = (mode-&gt;crtc_hblank_start &gt;&gt; 3) - 1;</div><div class='add'>+	if (temp &amp; 0x100)</div><div class='add'>+		jregAC |= 0x10; /* HBS D[8] */</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp);</div><div class='add'>+</div><div class='add'>+	temp = ((mode-&gt;crtc_hblank_end &gt;&gt; 3) - 1) &amp; 0x7f;</div><div class='add'>+	if (temp &amp; 0x20)</div><div class='add'>+		jreg05 |= 0x80;  /* HBE D[5] */</div><div class='add'>+	if (temp &amp; 0x40)</div><div class='add'>+		jregAD |= 0x01;  /* HBE D[5] */</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp &amp; 0x1f));</div><div class='add'>+</div><div class='add'>+	temp = (mode-&gt;crtc_hsync_start &gt;&gt; 3) - 1;</div><div class='add'>+	if (temp &amp; 0x100)</div><div class='add'>+		jregAC |= 0x40; /* HRS D[5] */</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp);</div><div class='add'>+</div><div class='add'>+	temp = ((mode-&gt;crtc_hsync_end &gt;&gt; 3) - 1) &amp; 0x3f;</div><div class='add'>+	if (temp &amp; 0x20)</div><div class='add'>+		jregAD |= 0x04; /* HRE D[5] */</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp &amp; 0x1f) | jreg05));</div><div class='add'>+</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC);</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD);</div><div class='add'>+</div><div class='add'>+	/* vert timings */</div><div class='add'>+	temp = (mode-&gt;crtc_vtotal) - 2;</div><div class='add'>+	if (temp &amp; 0x100)</div><div class='add'>+		jreg07 |= 0x01;</div><div class='add'>+	if (temp &amp; 0x200)</div><div class='add'>+		jreg07 |= 0x20;</div><div class='add'>+	if (temp &amp; 0x400)</div><div class='add'>+		jregAE |= 0x01;</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp);</div><div class='add'>+</div><div class='add'>+	temp = (mode-&gt;crtc_vsync_start) - 1;</div><div class='add'>+	if (temp &amp; 0x100)</div><div class='add'>+		jreg07 |= 0x04;</div><div class='add'>+	if (temp &amp; 0x200)</div><div class='add'>+		jreg07 |= 0x80;</div><div class='add'>+	if (temp &amp; 0x400)</div><div class='add'>+		jregAE |= 0x08;</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp);</div><div class='add'>+</div><div class='add'>+	temp = (mode-&gt;crtc_vsync_end - 1) &amp; 0x3f;</div><div class='add'>+	if (temp &amp; 0x10)</div><div class='add'>+		jregAE |= 0x20;</div><div class='add'>+	if (temp &amp; 0x20)</div><div class='add'>+		jregAE |= 0x40;</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp &amp; 0xf);</div><div class='add'>+</div><div class='add'>+	temp = mode-&gt;crtc_vdisplay - 1;</div><div class='add'>+	if (temp &amp; 0x100)</div><div class='add'>+		jreg07 |= 0x02;</div><div class='add'>+	if (temp &amp; 0x200)</div><div class='add'>+		jreg07 |= 0x40;</div><div class='add'>+	if (temp &amp; 0x400)</div><div class='add'>+		jregAE |= 0x02;</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp);</div><div class='add'>+</div><div class='add'>+	temp = mode-&gt;crtc_vblank_start - 1;</div><div class='add'>+	if (temp &amp; 0x100)</div><div class='add'>+		jreg07 |= 0x08;</div><div class='add'>+	if (temp &amp; 0x200)</div><div class='add'>+		jreg09 |= 0x20;</div><div class='add'>+	if (temp &amp; 0x400)</div><div class='add'>+		jregAE |= 0x04;</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp);</div><div class='add'>+</div><div class='add'>+	temp = mode-&gt;crtc_vblank_end - 1;</div><div class='add'>+	if (temp &amp; 0x100)</div><div class='add'>+		jregAE |= 0x10;</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp);</div><div class='add'>+</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07);</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09);</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80));</div><div class='add'>+</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_set_offset_reg(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	u16 offset;</div><div class='add'>+</div><div class='add'>+	offset = crtc-&gt;fb-&gt;pitches[0] &gt;&gt; 3;</div><div class='add'>+	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset &amp; 0xff));</div><div class='add'>+	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset &gt;&gt; 8) &amp; 0x3f);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_set_dclk_reg(struct drm_device *dev, struct drm_display_mode *mode,</div><div class='add'>+			     struct ast_vbios_mode_info *vbios_mode)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	struct ast_vbios_dclk_info *clk_info;</div><div class='add'>+</div><div class='add'>+	clk_info = &amp;dclk_table[vbios_mode-&gt;enh_table-&gt;dclk_index];</div><div class='add'>+</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info-&gt;param1);</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info-&gt;param2);</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f,</div><div class='add'>+			       (clk_info-&gt;param3 &amp; 0x80) | ((clk_info-&gt;param3 &amp; 0x3) &lt;&lt; 4));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,</div><div class='add'>+			     struct ast_vbios_mode_info *vbios_mode)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;</div><div class='add'>+</div><div class='add'>+	switch (crtc-&gt;fb-&gt;bits_per_pixel) {</div><div class='add'>+	case 8:</div><div class='add'>+		jregA0 = 0x70;</div><div class='add'>+		jregA3 = 0x01;</div><div class='add'>+		jregA8 = 0x00;</div><div class='add'>+		break;</div><div class='add'>+	case 15:</div><div class='add'>+	case 16:</div><div class='add'>+		jregA0 = 0x70;</div><div class='add'>+		jregA3 = 0x04;</div><div class='add'>+		jregA8 = 0x02;</div><div class='add'>+		break;</div><div class='add'>+	case 32:</div><div class='add'>+		jregA0 = 0x70;</div><div class='add'>+		jregA3 = 0x08;</div><div class='add'>+		jregA8 = 0x02;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0);</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3);</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8);</div><div class='add'>+</div><div class='add'>+	/* Set Threshold */</div><div class='add'>+	if (ast-&gt;chip == AST2300) {</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);</div><div class='add'>+	} else if (ast-&gt;chip == AST2100 ||</div><div class='add'>+		   ast-&gt;chip == AST1100 ||</div><div class='add'>+		   ast-&gt;chip == AST2200 ||</div><div class='add'>+		   ast-&gt;chip == AST2150) {</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);</div><div class='add'>+	} else {</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mode,</div><div class='add'>+		      struct ast_vbios_mode_info *vbios_mode)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	u8 jreg;</div><div class='add'>+</div><div class='add'>+	jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ);</div><div class='add'>+	jreg |= (vbios_mode-&gt;enh_table-&gt;flags &amp; SyncNN);</div><div class='add'>+	ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,</div><div class='add'>+		     struct ast_vbios_mode_info *vbios_mode)</div><div class='add'>+{</div><div class='add'>+	switch (crtc-&gt;fb-&gt;bits_per_pixel) {</div><div class='add'>+	case 8:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_set_start_address_crt1(struct drm_crtc *crtc, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	u32 addr;</div><div class='add'>+</div><div class='add'>+	addr = offset &gt;&gt; 2;</div><div class='add'>+	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr &amp; 0xff));</div><div class='add'>+	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr &gt;&gt; 8) &amp; 0xff));</div><div class='add'>+	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr &gt;&gt; 16) &amp; 0xff));</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (ast-&gt;chip == AST1180)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case DRM_MODE_DPMS_ON:</div><div class='add'>+	case DRM_MODE_DPMS_STANDBY:</div><div class='add'>+	case DRM_MODE_DPMS_SUSPEND:</div><div class='add'>+		ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);</div><div class='add'>+		ast_crtc_load_lut(crtc);</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_DPMS_OFF:</div><div class='add'>+		ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ast_crtc_mode_fixup(struct drm_crtc *crtc,</div><div class='add'>+				  struct drm_display_mode *mode,</div><div class='add'>+				  struct drm_display_mode *adjusted_mode)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ast is different - we will force move buffers out of VRAM */</div><div class='add'>+static int ast_crtc_do_set_base(struct drm_crtc *crtc,</div><div class='add'>+				struct drm_framebuffer *fb,</div><div class='add'>+				int x, int y, int atomic)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	struct ast_framebuffer *ast_fb;</div><div class='add'>+	struct ast_bo *bo;</div><div class='add'>+	int ret;</div><div class='add'>+	u64 gpu_addr;</div><div class='add'>+</div><div class='add'>+	/* push the previous fb to system ram */</div><div class='add'>+	if (!atomic &amp;&amp; fb) {</div><div class='add'>+		ast_fb = to_ast_framebuffer(fb);</div><div class='add'>+		obj = ast_fb-&gt;obj;</div><div class='add'>+		bo = gem_to_ast_bo(obj);</div><div class='add'>+		ret = ast_bo_reserve(bo, false);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		ast_bo_push_sysram(bo);</div><div class='add'>+		ast_bo_unreserve(bo);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ast_fb = to_ast_framebuffer(crtc-&gt;fb);</div><div class='add'>+	obj = ast_fb-&gt;obj;</div><div class='add'>+	bo = gem_to_ast_bo(obj);</div><div class='add'>+</div><div class='add'>+	ret = ast_bo_reserve(bo, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &amp;gpu_addr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ast_bo_unreserve(bo);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (&amp;ast-&gt;fbdev-&gt;afb == ast_fb) {</div><div class='add'>+		/* if pushing console in kmap it */</div><div class='add'>+		ret = ttm_bo_kmap(&amp;bo-&gt;bo, 0, bo-&gt;bo.num_pages, &amp;bo-&gt;kmap);</div><div class='add'>+		if (ret)</div><div class='add'>+			DRM_ERROR("failed to kmap fbcon\n");</div><div class='add'>+	}</div><div class='add'>+	ast_bo_unreserve(bo);</div><div class='add'>+</div><div class='add'>+	ast_set_start_address_crt1(crtc, (u32)gpu_addr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,</div><div class='add'>+			     struct drm_framebuffer *old_fb)</div><div class='add'>+{</div><div class='add'>+	return ast_crtc_do_set_base(crtc, old_fb, x, y, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_crtc_mode_set(struct drm_crtc *crtc,</div><div class='add'>+			     struct drm_display_mode *mode,</div><div class='add'>+			     struct drm_display_mode *adjusted_mode,</div><div class='add'>+			     int x, int y,</div><div class='add'>+			     struct drm_framebuffer *old_fb)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	struct ast_vbios_mode_info vbios_mode;</div><div class='add'>+	bool ret;</div><div class='add'>+	if (ast-&gt;chip == AST1180) {</div><div class='add'>+		DRM_ERROR("AST 1180 modesetting not supported\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ast_get_vbios_mode_info(crtc, mode, adjusted_mode, &amp;vbios_mode);</div><div class='add'>+	if (ret == false)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	ast_open_key(ast);</div><div class='add'>+</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04);</div><div class='add'>+</div><div class='add'>+	ast_set_std_reg(crtc, adjusted_mode, &amp;vbios_mode);</div><div class='add'>+	ast_set_crtc_reg(crtc, adjusted_mode, &amp;vbios_mode);</div><div class='add'>+	ast_set_offset_reg(crtc);</div><div class='add'>+	ast_set_dclk_reg(dev, adjusted_mode, &amp;vbios_mode);</div><div class='add'>+	ast_set_ext_reg(crtc, adjusted_mode, &amp;vbios_mode);</div><div class='add'>+	ast_set_sync_reg(dev, adjusted_mode, &amp;vbios_mode);</div><div class='add'>+	ast_set_dac_reg(crtc, adjusted_mode, &amp;vbios_mode);</div><div class='add'>+</div><div class='add'>+	ast_crtc_mode_set_base(crtc, x, y, old_fb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_crtc_disable(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_crtc_prepare(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_crtc_commit(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {</div><div class='add'>+	.dpms = ast_crtc_dpms,</div><div class='add'>+	.mode_fixup = ast_crtc_mode_fixup,</div><div class='add'>+	.mode_set = ast_crtc_mode_set,</div><div class='add'>+	.mode_set_base = ast_crtc_mode_set_base,</div><div class='add'>+	.disable = ast_crtc_disable,</div><div class='add'>+	.load_lut = ast_crtc_load_lut,</div><div class='add'>+	.disable = ast_crtc_disable,</div><div class='add'>+	.prepare = ast_crtc_prepare,</div><div class='add'>+	.commit = ast_crtc_commit,</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ast_crtc_reset(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,</div><div class='add'>+				 u16 *blue, uint32_t start, uint32_t size)</div><div class='add'>+{</div><div class='add'>+	struct ast_crtc *ast_crtc = to_ast_crtc(crtc);</div><div class='add'>+	int end = (start + size &gt; 256) ? 256 : start + size, i;</div><div class='add'>+</div><div class='add'>+	/* userspace palettes are always correct as is */</div><div class='add'>+	for (i = start; i &lt; end; i++) {</div><div class='add'>+		ast_crtc-&gt;lut_r[i] = red[i] &gt;&gt; 8;</div><div class='add'>+		ast_crtc-&gt;lut_g[i] = green[i] &gt;&gt; 8;</div><div class='add'>+		ast_crtc-&gt;lut_b[i] = blue[i] &gt;&gt; 8;</div><div class='add'>+	}</div><div class='add'>+	ast_crtc_load_lut(crtc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void ast_crtc_destroy(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	drm_crtc_cleanup(crtc);</div><div class='add'>+	kfree(crtc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct drm_crtc_funcs ast_crtc_funcs = {</div><div class='add'>+	.cursor_set = ast_cursor_set,</div><div class='add'>+	.cursor_move = ast_cursor_move,</div><div class='add'>+	.reset = ast_crtc_reset,</div><div class='add'>+	.set_config = drm_crtc_helper_set_config,</div><div class='add'>+	.gamma_set = ast_crtc_gamma_set,</div><div class='add'>+	.destroy = ast_crtc_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int ast_crtc_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_crtc *crtc;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL);</div><div class='add'>+	if (!crtc)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	drm_crtc_init(dev, &amp;crtc-&gt;base, &amp;ast_crtc_funcs);</div><div class='add'>+	drm_mode_crtc_set_gamma_size(&amp;crtc-&gt;base, 256);</div><div class='add'>+	drm_crtc_helper_add(&amp;crtc-&gt;base, &amp;ast_crtc_helper_funcs);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 256; i++) {</div><div class='add'>+		crtc-&gt;lut_r[i] = i;</div><div class='add'>+		crtc-&gt;lut_g[i] = i;</div><div class='add'>+		crtc-&gt;lut_b[i] = i;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_encoder_destroy(struct drm_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+	drm_encoder_cleanup(encoder);</div><div class='add'>+	kfree(encoder);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static struct drm_encoder *ast_best_single_encoder(struct drm_connector *connector)</div><div class='add'>+{</div><div class='add'>+	int enc_id = connector-&gt;encoder_ids[0];</div><div class='add'>+	struct drm_mode_object *obj;</div><div class='add'>+	struct drm_encoder *encoder;</div><div class='add'>+</div><div class='add'>+	/* pick the encoder ids */</div><div class='add'>+	if (enc_id) {</div><div class='add'>+		obj = drm_mode_object_find(connector-&gt;dev, enc_id, DRM_MODE_OBJECT_ENCODER);</div><div class='add'>+		if (!obj)</div><div class='add'>+			return NULL;</div><div class='add'>+		encoder = obj_to_encoder(obj);</div><div class='add'>+		return encoder;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static const struct drm_encoder_funcs ast_enc_funcs = {</div><div class='add'>+	.destroy = ast_encoder_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ast_encoder_dpms(struct drm_encoder *encoder, int mode)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ast_mode_fixup(struct drm_encoder *encoder,</div><div class='add'>+			   struct drm_display_mode *mode,</div><div class='add'>+			   struct drm_display_mode *adjusted_mode)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_encoder_mode_set(struct drm_encoder *encoder,</div><div class='add'>+			       struct drm_display_mode *mode,</div><div class='add'>+			       struct drm_display_mode *adjusted_mode)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_encoder_prepare(struct drm_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_encoder_commit(struct drm_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static const struct drm_encoder_helper_funcs ast_enc_helper_funcs = {</div><div class='add'>+	.dpms = ast_encoder_dpms,</div><div class='add'>+	.mode_fixup = ast_mode_fixup,</div><div class='add'>+	.prepare = ast_encoder_prepare,</div><div class='add'>+	.commit = ast_encoder_commit,</div><div class='add'>+	.mode_set = ast_encoder_mode_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int ast_encoder_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_encoder *ast_encoder;</div><div class='add'>+</div><div class='add'>+	ast_encoder = kzalloc(sizeof(struct ast_encoder), GFP_KERNEL);</div><div class='add'>+	if (!ast_encoder)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	drm_encoder_init(dev, &amp;ast_encoder-&gt;base, &amp;ast_enc_funcs,</div><div class='add'>+			 DRM_MODE_ENCODER_DAC);</div><div class='add'>+	drm_encoder_helper_add(&amp;ast_encoder-&gt;base, &amp;ast_enc_helper_funcs);</div><div class='add'>+</div><div class='add'>+	ast_encoder-&gt;base.possible_crtcs = 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_get_modes(struct drm_connector *connector)</div><div class='add'>+{</div><div class='add'>+	struct ast_connector *ast_connector = to_ast_connector(connector);</div><div class='add'>+	struct edid *edid;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	edid = drm_get_edid(connector, &amp;ast_connector-&gt;i2c-&gt;adapter);</div><div class='add'>+	if (edid) {</div><div class='add'>+		drm_mode_connector_update_edid_property(&amp;ast_connector-&gt;base, edid);</div><div class='add'>+		ret = drm_add_edid_modes(connector, edid);</div><div class='add'>+		return ret;</div><div class='add'>+	} else</div><div class='add'>+		drm_mode_connector_update_edid_property(&amp;ast_connector-&gt;base, NULL);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_mode_valid(struct drm_connector *connector,</div><div class='add'>+			  struct drm_display_mode *mode)</div><div class='add'>+{</div><div class='add'>+	return MODE_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_connector_destroy(struct drm_connector *connector)</div><div class='add'>+{</div><div class='add'>+	struct ast_connector *ast_connector = to_ast_connector(connector);</div><div class='add'>+	ast_i2c_destroy(ast_connector-&gt;i2c);</div><div class='add'>+	drm_sysfs_connector_remove(connector);</div><div class='add'>+	drm_connector_cleanup(connector);</div><div class='add'>+	kfree(connector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum drm_connector_status</div><div class='add'>+ast_connector_detect(struct drm_connector *connector, bool force)</div><div class='add'>+{</div><div class='add'>+	return connector_status_connected;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct drm_connector_helper_funcs ast_connector_helper_funcs = {</div><div class='add'>+	.mode_valid = ast_mode_valid,</div><div class='add'>+	.get_modes = ast_get_modes,</div><div class='add'>+	.best_encoder = ast_best_single_encoder,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct drm_connector_funcs ast_connector_funcs = {</div><div class='add'>+	.dpms = drm_helper_connector_dpms,</div><div class='add'>+	.detect = ast_connector_detect,</div><div class='add'>+	.fill_modes = drm_helper_probe_single_connector_modes,</div><div class='add'>+	.destroy = ast_connector_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int ast_connector_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_connector *ast_connector;</div><div class='add'>+	struct drm_connector *connector;</div><div class='add'>+	struct drm_encoder *encoder;</div><div class='add'>+</div><div class='add'>+	ast_connector = kzalloc(sizeof(struct ast_connector), GFP_KERNEL);</div><div class='add'>+	if (!ast_connector)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	connector = &amp;ast_connector-&gt;base;</div><div class='add'>+	drm_connector_init(dev, connector, &amp;ast_connector_funcs, DRM_MODE_CONNECTOR_VGA);</div><div class='add'>+</div><div class='add'>+	drm_connector_helper_add(connector, &amp;ast_connector_helper_funcs);</div><div class='add'>+</div><div class='add'>+	connector-&gt;interlace_allowed = 0;</div><div class='add'>+	connector-&gt;doublescan_allowed = 0;</div><div class='add'>+</div><div class='add'>+	drm_sysfs_connector_add(connector);</div><div class='add'>+</div><div class='add'>+	connector-&gt;polled = DRM_CONNECTOR_POLL_CONNECT;</div><div class='add'>+</div><div class='add'>+	encoder = list_first_entry(&amp;dev-&gt;mode_config.encoder_list, struct drm_encoder, head);</div><div class='add'>+	drm_mode_connector_attach_encoder(connector, encoder);</div><div class='add'>+</div><div class='add'>+	ast_connector-&gt;i2c = ast_i2c_create(dev);</div><div class='add'>+	if (!ast_connector-&gt;i2c)</div><div class='add'>+		DRM_ERROR("failed to add ddc bus for connector\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* allocate cursor cache and pin at start of VRAM */</div><div class='add'>+int ast_cursor_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	int size;</div><div class='add'>+	int ret;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	struct ast_bo *bo;</div><div class='add'>+	uint64_t gpu_addr;</div><div class='add'>+</div><div class='add'>+	size = (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE) * AST_DEFAULT_HWC_NUM;</div><div class='add'>+</div><div class='add'>+	ret = ast_gem_create(dev, size, true, &amp;obj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	bo = gem_to_ast_bo(obj);</div><div class='add'>+	ret = ast_bo_reserve(bo, false);</div><div class='add'>+	if (unlikely(ret != 0))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &amp;gpu_addr);</div><div class='add'>+	ast_bo_unreserve(bo);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	/* kmap the object */</div><div class='add'>+	ret = ttm_bo_kmap(&amp;bo-&gt;bo, 0, bo-&gt;bo.num_pages, &amp;ast-&gt;cache_kmap);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ast-&gt;cursor_cache = obj;</div><div class='add'>+	ast-&gt;cursor_cache_gpu_addr = gpu_addr;</div><div class='add'>+	DRM_ERROR("pinned cursor cache at %llx\n", ast-&gt;cursor_cache_gpu_addr);</div><div class='add'>+	return 0;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_cursor_fini(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	ttm_bo_kunmap(&amp;ast-&gt;cache_kmap);</div><div class='add'>+	drm_gem_object_unreference_unlocked(ast-&gt;cursor_cache);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_mode_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	ast_cursor_init(dev);</div><div class='add'>+	ast_crtc_init(dev);</div><div class='add'>+	ast_encoder_init(dev);</div><div class='add'>+	ast_connector_init(dev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_mode_fini(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	ast_cursor_fini(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_clock(void *i2c_priv)</div><div class='add'>+{</div><div class='add'>+	struct ast_i2c_chan *i2c = i2c_priv;</div><div class='add'>+	struct ast_private *ast = i2c-&gt;dev-&gt;dev_private;</div><div class='add'>+	uint32_t val;</div><div class='add'>+</div><div class='add'>+	val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) &gt;&gt; 4;</div><div class='add'>+	return val &amp; 1 ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_data(void *i2c_priv)</div><div class='add'>+{</div><div class='add'>+	struct ast_i2c_chan *i2c = i2c_priv;</div><div class='add'>+	struct ast_private *ast = i2c-&gt;dev-&gt;dev_private;</div><div class='add'>+	uint32_t val;</div><div class='add'>+</div><div class='add'>+	val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) &gt;&gt; 5;</div><div class='add'>+	return val &amp; 1 ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_clock(void *i2c_priv, int clock)</div><div class='add'>+{</div><div class='add'>+	struct ast_i2c_chan *i2c = i2c_priv;</div><div class='add'>+	struct ast_private *ast = i2c-&gt;dev-&gt;dev_private;</div><div class='add'>+	int i;</div><div class='add'>+	u8 ujcrb7, jtemp;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 0x10000; i++) {</div><div class='add'>+		ujcrb7 = ((clock &amp; 0x01) ? 0 : 1);</div><div class='add'>+		ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfe, ujcrb7);</div><div class='add'>+		jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01);</div><div class='add'>+		if (ujcrb7 == jtemp)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_data(void *i2c_priv, int data)</div><div class='add'>+{</div><div class='add'>+	struct ast_i2c_chan *i2c = i2c_priv;</div><div class='add'>+	struct ast_private *ast = i2c-&gt;dev-&gt;dev_private;</div><div class='add'>+	int i;</div><div class='add'>+	u8 ujcrb7, jtemp;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 0x10000; i++) {</div><div class='add'>+		ujcrb7 = ((data &amp; 0x01) ? 0 : 1) &lt;&lt; 2;</div><div class='add'>+		ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfb, ujcrb7);</div><div class='add'>+		jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04);</div><div class='add'>+		if (ujcrb7 == jtemp)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_i2c_chan *i2c;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL);</div><div class='add'>+	if (!i2c)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	i2c-&gt;adapter.owner = THIS_MODULE;</div><div class='add'>+	i2c-&gt;adapter.class = I2C_CLASS_DDC;</div><div class='add'>+	i2c-&gt;adapter.dev.parent = &amp;dev-&gt;pdev-&gt;dev;</div><div class='add'>+	i2c-&gt;dev = dev;</div><div class='add'>+	i2c_set_adapdata(&amp;i2c-&gt;adapter, i2c);</div><div class='add'>+	snprintf(i2c-&gt;adapter.name, sizeof(i2c-&gt;adapter.name),</div><div class='add'>+		 "AST i2c bit bus");</div><div class='add'>+	i2c-&gt;adapter.algo_data = &amp;i2c-&gt;bit;</div><div class='add'>+</div><div class='add'>+	i2c-&gt;bit.udelay = 20;</div><div class='add'>+	i2c-&gt;bit.timeout = 2;</div><div class='add'>+	i2c-&gt;bit.data = i2c;</div><div class='add'>+	i2c-&gt;bit.setsda = set_data;</div><div class='add'>+	i2c-&gt;bit.setscl = set_clock;</div><div class='add'>+	i2c-&gt;bit.getsda = get_data;</div><div class='add'>+	i2c-&gt;bit.getscl = get_clock;</div><div class='add'>+	ret = i2c_bit_add_bus(&amp;i2c-&gt;adapter);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("Failed to register bit i2c\n");</div><div class='add'>+		goto out_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return i2c;</div><div class='add'>+out_free:</div><div class='add'>+	kfree(i2c);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_i2c_destroy(struct ast_i2c_chan *i2c)</div><div class='add'>+{</div><div class='add'>+	if (!i2c)</div><div class='add'>+		return;</div><div class='add'>+	i2c_del_adapter(&amp;i2c-&gt;adapter);</div><div class='add'>+	kfree(i2c);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_show_cursor(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	u8 jreg;</div><div class='add'>+</div><div class='add'>+	jreg = 0x2;</div><div class='add'>+	/* enable ARGB cursor */</div><div class='add'>+	jreg |= 1;</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_hide_cursor(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 copy_cursor_image(u8 *src, u8 *dst, int width, int height)</div><div class='add'>+{</div><div class='add'>+	union {</div><div class='add'>+		u32 ul;</div><div class='add'>+		u8 b[4];</div><div class='add'>+	} srcdata32[2], data32;</div><div class='add'>+	union {</div><div class='add'>+		u16 us;</div><div class='add'>+		u8 b[2];</div><div class='add'>+	} data16;</div><div class='add'>+	u32 csum = 0;</div><div class='add'>+	s32 alpha_dst_delta, last_alpha_dst_delta;</div><div class='add'>+	u8 *srcxor, *dstxor;</div><div class='add'>+	int i, j;</div><div class='add'>+	u32 per_pixel_copy, two_pixel_copy;</div><div class='add'>+</div><div class='add'>+	alpha_dst_delta = AST_MAX_HWC_WIDTH &lt;&lt; 1;</div><div class='add'>+	last_alpha_dst_delta = alpha_dst_delta - (width &lt;&lt; 1);</div><div class='add'>+</div><div class='add'>+	srcxor = src;</div><div class='add'>+	dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta;</div><div class='add'>+	per_pixel_copy = width &amp; 1;</div><div class='add'>+	two_pixel_copy = width &gt;&gt; 1;</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; height; j++) {</div><div class='add'>+		for (i = 0; i &lt; two_pixel_copy; i++) {</div><div class='add'>+			srcdata32[0].ul = *((u32 *)srcxor) &amp; 0xf0f0f0f0;</div><div class='add'>+			srcdata32[1].ul = *((u32 *)(srcxor + 4)) &amp; 0xf0f0f0f0;</div><div class='add'>+			data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] &gt;&gt; 4);</div><div class='add'>+			data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] &gt;&gt; 4);</div><div class='add'>+			data32.b[2] = srcdata32[0].b[1] | (srcdata32[1].b[0] &gt;&gt; 4);</div><div class='add'>+			data32.b[3] = srcdata32[0].b[3] | (srcdata32[1].b[2] &gt;&gt; 4);</div><div class='add'>+</div><div class='add'>+			writel(data32.ul, dstxor);</div><div class='add'>+			csum += data32.ul;</div><div class='add'>+</div><div class='add'>+			dstxor += 4;</div><div class='add'>+			srcxor += 8;</div><div class='add'>+</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; per_pixel_copy; i++) {</div><div class='add'>+			srcdata32[0].ul = *((u32 *)srcxor) &amp; 0xf0f0f0f0;</div><div class='add'>+			data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] &gt;&gt; 4);</div><div class='add'>+			data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] &gt;&gt; 4);</div><div class='add'>+			writew(data16.us, dstxor);</div><div class='add'>+			csum += (u32)data16.us;</div><div class='add'>+</div><div class='add'>+			dstxor += 2;</div><div class='add'>+			srcxor += 4;</div><div class='add'>+		}</div><div class='add'>+		dstxor += last_alpha_dst_delta;</div><div class='add'>+	}</div><div class='add'>+	return csum;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_cursor_set(struct drm_crtc *crtc,</div><div class='add'>+			  struct drm_file *file_priv,</div><div class='add'>+			  uint32_t handle,</div><div class='add'>+			  uint32_t width,</div><div class='add'>+			  uint32_t height)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	struct ast_crtc *ast_crtc = to_ast_crtc(crtc);</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	struct ast_bo *bo;</div><div class='add'>+	uint64_t gpu_addr;</div><div class='add'>+	u32 csum;</div><div class='add'>+	int ret;</div><div class='add'>+	struct ttm_bo_kmap_obj uobj_map;</div><div class='add'>+	u8 *src, *dst;</div><div class='add'>+	bool src_isiomem, dst_isiomem;</div><div class='add'>+	if (!handle) {</div><div class='add'>+		ast_hide_cursor(crtc);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (width &gt; AST_MAX_HWC_WIDTH || height &gt; AST_MAX_HWC_HEIGHT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	obj = drm_gem_object_lookup(crtc-&gt;dev, file_priv, handle);</div><div class='add'>+	if (!obj) {</div><div class='add'>+		DRM_ERROR("Cannot find cursor object %x for crtc\n", handle);</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+	bo = gem_to_ast_bo(obj);</div><div class='add'>+</div><div class='add'>+	ret = ast_bo_reserve(bo, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_kmap(&amp;bo-&gt;bo, 0, bo-&gt;bo.num_pages, &amp;uobj_map);</div><div class='add'>+</div><div class='add'>+	src = ttm_kmap_obj_virtual(&amp;uobj_map, &amp;src_isiomem);</div><div class='add'>+	dst = ttm_kmap_obj_virtual(&amp;ast-&gt;cache_kmap, &amp;dst_isiomem);</div><div class='add'>+</div><div class='add'>+	if (src_isiomem == true)</div><div class='add'>+		DRM_ERROR("src cursor bo should be in main memory\n");</div><div class='add'>+	if (dst_isiomem == false)</div><div class='add'>+		DRM_ERROR("dst bo should be in VRAM\n");</div><div class='add'>+</div><div class='add'>+	dst += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast-&gt;next_cursor;</div><div class='add'>+</div><div class='add'>+	/* do data transfer to cursor cache */</div><div class='add'>+	csum = copy_cursor_image(src, dst, width, height);</div><div class='add'>+</div><div class='add'>+	/* write checksum + signature */</div><div class='add'>+	ttm_bo_kunmap(&amp;uobj_map);</div><div class='add'>+	ast_bo_unreserve(bo);</div><div class='add'>+	{</div><div class='add'>+		u8 *dst = (u8 *)ast-&gt;cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast-&gt;next_cursor + AST_HWC_SIZE;</div><div class='add'>+		writel(csum, dst);</div><div class='add'>+		writel(width, dst + AST_HWC_SIGNATURE_SizeX);</div><div class='add'>+		writel(height, dst + AST_HWC_SIGNATURE_SizeY);</div><div class='add'>+		writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX);</div><div class='add'>+		writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY);</div><div class='add'>+</div><div class='add'>+		/* set pattern offset */</div><div class='add'>+		gpu_addr = ast-&gt;cursor_cache_gpu_addr;</div><div class='add'>+		gpu_addr += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast-&gt;next_cursor;</div><div class='add'>+		gpu_addr &gt;&gt;= 3;</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, gpu_addr &amp; 0xff);</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, (gpu_addr &gt;&gt; 8) &amp; 0xff);</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, (gpu_addr &gt;&gt; 16) &amp; 0xff);</div><div class='add'>+	}</div><div class='add'>+	ast_crtc-&gt;cursor_width = width;</div><div class='add'>+	ast_crtc-&gt;cursor_height = height;</div><div class='add'>+	ast_crtc-&gt;offset_x = AST_MAX_HWC_WIDTH - width;</div><div class='add'>+	ast_crtc-&gt;offset_y = AST_MAX_HWC_WIDTH - height;</div><div class='add'>+</div><div class='add'>+	ast-&gt;next_cursor = (ast-&gt;next_cursor + 1) % AST_DEFAULT_HWC_NUM;</div><div class='add'>+</div><div class='add'>+	ast_show_cursor(crtc);</div><div class='add'>+</div><div class='add'>+	drm_gem_object_unreference_unlocked(obj);</div><div class='add'>+	return 0;</div><div class='add'>+fail:</div><div class='add'>+	drm_gem_object_unreference_unlocked(obj);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_cursor_move(struct drm_crtc *crtc,</div><div class='add'>+			   int x, int y)</div><div class='add'>+{</div><div class='add'>+	struct ast_crtc *ast_crtc = to_ast_crtc(crtc);</div><div class='add'>+	struct ast_private *ast = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	int x_offset, y_offset;</div><div class='add'>+	u8 *sig;</div><div class='add'>+</div><div class='add'>+	sig = (u8 *)ast-&gt;cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast-&gt;next_cursor + AST_HWC_SIZE;</div><div class='add'>+	writel(x, sig + AST_HWC_SIGNATURE_X);</div><div class='add'>+	writel(y, sig + AST_HWC_SIGNATURE_Y);</div><div class='add'>+</div><div class='add'>+	x_offset = ast_crtc-&gt;offset_x;</div><div class='add'>+	y_offset = ast_crtc-&gt;offset_y;</div><div class='add'>+	if (x &lt; 0) {</div><div class='add'>+		x_offset = (-x) + ast_crtc-&gt;offset_x;</div><div class='add'>+		x = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (y &lt; 0) {</div><div class='add'>+		y_offset = (-y) + ast_crtc-&gt;offset_y;</div><div class='add'>+		y = 0;</div><div class='add'>+	}</div><div class='add'>+	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);</div><div class='add'>+	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);</div><div class='add'>+	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x &amp; 0xff));</div><div class='add'>+	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x &gt;&gt; 8) &amp; 0x0f));</div><div class='add'>+	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, (y &amp; 0xff));</div><div class='add'>+	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, ((y &gt;&gt; 8) &amp; 0x07));</div><div class='add'>+</div><div class='add'>+	/* dummy write to fire HWC */</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xCB, 0xFF, 0x00);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c<br/>new file mode 100644<br/>index 000000000000..6edbee63b0cb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/ast/ast_post.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_post.c</a></div><div class='hunk'>@@ -0,0 +1,1780 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the</div><div class='add'>+ * "Software"), to deal in the Software without restriction, including</div><div class='add'>+ * without limitation the rights to use, copy, modify, merge, publish,</div><div class='add'>+ * distribute, sub license, and/or sell copies of the Software, and to</div><div class='add'>+ * permit persons to whom the Software is furnished to do so, subject to</div><div class='add'>+ * the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,</div><div class='add'>+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR</div><div class='add'>+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE</div><div class='add'>+ * USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the</div><div class='add'>+ * next paragraph) shall be included in all copies or substantial portions</div><div class='add'>+ * of the Software.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * Authors: Dave Airlie &lt;airlied@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "ast_drv.h"</div><div class='add'>+</div><div class='add'>+#include "ast_dram_tables.h"</div><div class='add'>+</div><div class='add'>+static void ast_init_dram_2300(struct drm_device *dev);</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ast_enable_vga(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	ast_io_write8(ast, 0x43, 0x01);</div><div class='add'>+	ast_io_write8(ast, 0x42, 0x01);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if 0 /* will use later */</div><div class='add'>+static bool</div><div class='add'>+ast_is_vga_enabled(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	u8 ch;</div><div class='add'>+</div><div class='add'>+	if (ast-&gt;chip == AST1180) {</div><div class='add'>+		/* TODO 1180 */</div><div class='add'>+	} else {</div><div class='add'>+		ch = ast_io_read8(ast, 0x43);</div><div class='add'>+		if (ch) {</div><div class='add'>+			ast_open_key(ast);</div><div class='add'>+			ch = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff);</div><div class='add'>+			return ch &amp; 0x04;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff };</div><div class='add'>+static const u8 extreginfo_ast2300a0[] = { 0x0f, 0x04, 0x1c, 0xff };</div><div class='add'>+static const u8 extreginfo_ast2300[] = { 0x0f, 0x04, 0x1f, 0xff };</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ast_set_def_ext_reg(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	u8 i, index, reg;</div><div class='add'>+	const u8 *ext_reg_info;</div><div class='add'>+</div><div class='add'>+	/* reset scratch */</div><div class='add'>+	for (i = 0x81; i &lt;= 0x8f; i++)</div><div class='add'>+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, 0x00);</div><div class='add'>+</div><div class='add'>+	if (ast-&gt;chip == AST2300) {</div><div class='add'>+		if (dev-&gt;pdev-&gt;revision &gt;= 0x20)</div><div class='add'>+			ext_reg_info = extreginfo_ast2300;</div><div class='add'>+		else</div><div class='add'>+			ext_reg_info = extreginfo_ast2300a0;</div><div class='add'>+	} else</div><div class='add'>+		ext_reg_info = extreginfo;</div><div class='add'>+</div><div class='add'>+	index = 0xa0;</div><div class='add'>+	while (*ext_reg_info != 0xff) {</div><div class='add'>+		ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, index, 0x00, *ext_reg_info);</div><div class='add'>+		index++;</div><div class='add'>+		ext_reg_info++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* disable standard IO/MEM decode if secondary */</div><div class='add'>+	/* ast_set_index_reg-mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x3); */</div><div class='add'>+</div><div class='add'>+	/* Set Ext. Default */</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x8c, 0x00, 0x01);</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x00, 0x00);</div><div class='add'>+</div><div class='add'>+	/* Enable RAMDAC for A1 */</div><div class='add'>+	reg = 0x04;</div><div class='add'>+	if (ast-&gt;chip == AST2300)</div><div class='add'>+		reg |= 0x20;</div><div class='add'>+	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 mindwm(struct ast_private *ast, u32 r)</div><div class='add'>+{</div><div class='add'>+	ast_write32(ast, 0xf004, r &amp; 0xffff0000);</div><div class='add'>+	ast_write32(ast, 0xf000, 0x1);</div><div class='add'>+</div><div class='add'>+	return ast_read32(ast, 0x10000 + (r &amp; 0x0000ffff));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void moutdwm(struct ast_private *ast, u32 r, u32 v)</div><div class='add'>+{</div><div class='add'>+	ast_write32(ast, 0xf004, r &amp; 0xffff0000);</div><div class='add'>+	ast_write32(ast, 0xf000, 0x1);</div><div class='add'>+	ast_write32(ast, 0x10000 + (r &amp; 0x0000ffff), v);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * AST2100/2150 DLL CBR Setting</div><div class='add'>+ */</div><div class='add'>+#define CBR_SIZE_AST2150	     ((16 &lt;&lt; 10) - 1)</div><div class='add'>+#define CBR_PASSNUM_AST2150          5</div><div class='add'>+#define CBR_THRESHOLD_AST2150        10</div><div class='add'>+#define CBR_THRESHOLD2_AST2150       10</div><div class='add'>+#define TIMEOUT_AST2150              5000000</div><div class='add'>+</div><div class='add'>+#define CBR_PATNUM_AST2150           8</div><div class='add'>+</div><div class='add'>+static const u32 pattern_AST2150[14] = {</div><div class='add'>+	0xFF00FF00,</div><div class='add'>+	0xCC33CC33,</div><div class='add'>+	0xAA55AA55,</div><div class='add'>+	0xFFFE0001,</div><div class='add'>+	0x683501FE,</div><div class='add'>+	0x0F1929B0,</div><div class='add'>+	0x2D0B4346,</div><div class='add'>+	0x60767F02,</div><div class='add'>+	0x6FBE36A6,</div><div class='add'>+	0x3A253035,</div><div class='add'>+	0x3019686D,</div><div class='add'>+	0x41C6167E,</div><div class='add'>+	0x620152BF,</div><div class='add'>+	0x20F050E0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u32 mmctestburst2_ast2150(struct ast_private *ast, u32 datagen)</div><div class='add'>+{</div><div class='add'>+	u32 data, timeout;</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000001 | (datagen &lt;&lt; 3));</div><div class='add'>+	timeout = 0;</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1e6e0070) &amp; 0x40;</div><div class='add'>+		if (++timeout &gt; TIMEOUT_AST2150) {</div><div class='add'>+			moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+			return 0xffffffff;</div><div class='add'>+		}</div><div class='add'>+	} while (!data);</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000003 | (datagen &lt;&lt; 3));</div><div class='add'>+	timeout = 0;</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1e6e0070) &amp; 0x40;</div><div class='add'>+		if (++timeout &gt; TIMEOUT_AST2150) {</div><div class='add'>+			moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+			return 0xffffffff;</div><div class='add'>+		}</div><div class='add'>+	} while (!data);</div><div class='add'>+	data = (mindwm(ast, 0x1e6e0070) &amp; 0x80) &gt;&gt; 7;</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if 0 /* unused in DDX driver - here for completeness */</div><div class='add'>+static u32 mmctestsingle2_ast2150(struct ast_private *ast, u32 datagen)</div><div class='add'>+{</div><div class='add'>+	u32 data, timeout;</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000005 | (datagen &lt;&lt; 3));</div><div class='add'>+	timeout = 0;</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1e6e0070) &amp; 0x40;</div><div class='add'>+		if (++timeout &gt; TIMEOUT_AST2150) {</div><div class='add'>+			moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+			return 0xffffffff;</div><div class='add'>+		}</div><div class='add'>+	} while (!data);</div><div class='add'>+	data = (mindwm(ast, 0x1e6e0070) &amp; 0x80) &gt;&gt; 7;</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int cbrtest_ast2150(struct ast_private *ast)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++)</div><div class='add'>+		if (mmctestburst2_ast2150(ast, i))</div><div class='add'>+			return 0;</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cbrscan_ast2150(struct ast_private *ast, int busw)</div><div class='add'>+{</div><div class='add'>+	u32 patcnt, loop;</div><div class='add'>+</div><div class='add'>+	for (patcnt = 0; patcnt &lt; CBR_PATNUM_AST2150; patcnt++) {</div><div class='add'>+		moutdwm(ast, 0x1e6e007c, pattern_AST2150[patcnt]);</div><div class='add'>+		for (loop = 0; loop &lt; CBR_PASSNUM_AST2150; loop++) {</div><div class='add'>+			if (cbrtest_ast2150(ast))</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+		if (loop == CBR_PASSNUM_AST2150)</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void cbrdlli_ast2150(struct ast_private *ast, int busw)</div><div class='add'>+{</div><div class='add'>+	u32 dll_min[4], dll_max[4], dlli, data, passcnt;</div><div class='add'>+</div><div class='add'>+cbr_start:</div><div class='add'>+	dll_min[0] = dll_min[1] = dll_min[2] = dll_min[3] = 0xff;</div><div class='add'>+	dll_max[0] = dll_max[1] = dll_max[2] = dll_max[3] = 0x0;</div><div class='add'>+	passcnt = 0;</div><div class='add'>+</div><div class='add'>+	for (dlli = 0; dlli &lt; 100; dlli++) {</div><div class='add'>+		moutdwm(ast, 0x1e6e0068, dlli | (dlli &lt;&lt; 8) | (dlli &lt;&lt; 16) | (dlli &lt;&lt; 24));</div><div class='add'>+		data = cbrscan_ast2150(ast, busw);</div><div class='add'>+		if (data != 0) {</div><div class='add'>+			if (data &amp; 0x1) {</div><div class='add'>+				if (dll_min[0] &gt; dlli)</div><div class='add'>+					dll_min[0] = dlli;</div><div class='add'>+				if (dll_max[0] &lt; dlli)</div><div class='add'>+					dll_max[0] = dlli;</div><div class='add'>+			}</div><div class='add'>+			passcnt++;</div><div class='add'>+		} else if (passcnt &gt;= CBR_THRESHOLD_AST2150)</div><div class='add'>+			goto cbr_start;</div><div class='add'>+	}</div><div class='add'>+	if (dll_max[0] == 0 || (dll_max[0]-dll_min[0]) &lt; CBR_THRESHOLD_AST2150)</div><div class='add'>+		goto cbr_start;</div><div class='add'>+</div><div class='add'>+	dlli = dll_min[0] + (((dll_max[0] - dll_min[0]) * 7) &gt;&gt; 4);</div><div class='add'>+	moutdwm(ast, 0x1e6e0068, dlli | (dlli &lt;&lt; 8) | (dlli &lt;&lt; 16) | (dlli &lt;&lt; 24));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void ast_init_dram_reg(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	u8 j;</div><div class='add'>+	u32 data, temp, i;</div><div class='add'>+	const struct ast_dramstruct *dram_reg_info;</div><div class='add'>+</div><div class='add'>+	j = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);</div><div class='add'>+</div><div class='add'>+	if ((j &amp; 0x80) == 0) { /* VGA only */</div><div class='add'>+		if (ast-&gt;chip == AST2000) {</div><div class='add'>+			dram_reg_info = ast2000_dram_table_data;</div><div class='add'>+			ast_write32(ast, 0xf004, 0x1e6e0000);</div><div class='add'>+			ast_write32(ast, 0xf000, 0x1);</div><div class='add'>+			ast_write32(ast, 0x10100, 0xa8);</div><div class='add'>+</div><div class='add'>+			do {</div><div class='add'>+				;</div><div class='add'>+			} while (ast_read32(ast, 0x10100) != 0xa8);</div><div class='add'>+		} else {/* AST2100/1100 */</div><div class='add'>+			if (ast-&gt;chip == AST2100 || ast-&gt;chip == 2200)</div><div class='add'>+				dram_reg_info = ast2100_dram_table_data;</div><div class='add'>+			else</div><div class='add'>+				dram_reg_info = ast1100_dram_table_data;</div><div class='add'>+</div><div class='add'>+			ast_write32(ast, 0xf004, 0x1e6e0000);</div><div class='add'>+			ast_write32(ast, 0xf000, 0x1);</div><div class='add'>+			ast_write32(ast, 0x12000, 0x1688A8A8);</div><div class='add'>+			do {</div><div class='add'>+				;</div><div class='add'>+			} while (ast_read32(ast, 0x12000) != 0x01);</div><div class='add'>+</div><div class='add'>+			ast_write32(ast, 0x10000, 0xfc600309);</div><div class='add'>+			do {</div><div class='add'>+				;</div><div class='add'>+			} while (ast_read32(ast, 0x10000) != 0x01);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		while (dram_reg_info-&gt;index != 0xffff) {</div><div class='add'>+			if (dram_reg_info-&gt;index == 0xff00) {/* delay fn */</div><div class='add'>+				for (i = 0; i &lt; 15; i++)</div><div class='add'>+					udelay(dram_reg_info-&gt;data);</div><div class='add'>+			} else if (dram_reg_info-&gt;index == 0x4 &amp;&amp; ast-&gt;chip != AST2000) {</div><div class='add'>+				data = dram_reg_info-&gt;data;</div><div class='add'>+				if (ast-&gt;dram_type == AST_DRAM_1Gx16)</div><div class='add'>+					data = 0x00000d89;</div><div class='add'>+				else if (ast-&gt;dram_type == AST_DRAM_1Gx32)</div><div class='add'>+					data = 0x00000c8d;</div><div class='add'>+</div><div class='add'>+				temp = ast_read32(ast, 0x12070);</div><div class='add'>+				temp &amp;= 0xc;</div><div class='add'>+				temp &lt;&lt;= 2;</div><div class='add'>+				ast_write32(ast, 0x10000 + dram_reg_info-&gt;index, data | temp);</div><div class='add'>+			} else</div><div class='add'>+				ast_write32(ast, 0x10000 + dram_reg_info-&gt;index, dram_reg_info-&gt;data);</div><div class='add'>+			dram_reg_info++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* AST 2100/2150 DRAM calibration */</div><div class='add'>+		data = ast_read32(ast, 0x10120);</div><div class='add'>+		if (data == 0x5061) { /* 266Mhz */</div><div class='add'>+			data = ast_read32(ast, 0x10004);</div><div class='add'>+			if (data &amp; 0x40)</div><div class='add'>+				cbrdlli_ast2150(ast, 16); /* 16 bits */</div><div class='add'>+			else</div><div class='add'>+				cbrdlli_ast2150(ast, 32); /* 32 bits */</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (ast-&gt;chip) {</div><div class='add'>+		case AST2000:</div><div class='add'>+			temp = ast_read32(ast, 0x10140);</div><div class='add'>+			ast_write32(ast, 0x10140, temp | 0x40);</div><div class='add'>+			break;</div><div class='add'>+		case AST1100:</div><div class='add'>+		case AST2100:</div><div class='add'>+		case AST2200:</div><div class='add'>+		case AST2150:</div><div class='add'>+			temp = ast_read32(ast, 0x1200c);</div><div class='add'>+			ast_write32(ast, 0x1200c, temp &amp; 0xfffffffd);</div><div class='add'>+			temp = ast_read32(ast, 0x12040);</div><div class='add'>+			ast_write32(ast, 0x12040, temp | 0x40);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* wait ready */</div><div class='add'>+	do {</div><div class='add'>+		j = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);</div><div class='add'>+	} while ((j &amp; 0x40) == 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_post_gpu(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	pci_read_config_dword(ast-&gt;dev-&gt;pdev, 0x04, &amp;reg);</div><div class='add'>+	reg |= 0x3;</div><div class='add'>+	pci_write_config_dword(ast-&gt;dev-&gt;pdev, 0x04, reg);</div><div class='add'>+</div><div class='add'>+	ast_enable_vga(dev);</div><div class='add'>+	ast_open_key(ast);</div><div class='add'>+	ast_set_def_ext_reg(dev);</div><div class='add'>+</div><div class='add'>+	if (ast-&gt;chip == AST2300)</div><div class='add'>+		ast_init_dram_2300(dev);</div><div class='add'>+	else</div><div class='add'>+		ast_init_dram_reg(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* AST 2300 DRAM settings */</div><div class='add'>+#define AST_DDR3 0</div><div class='add'>+#define AST_DDR2 1</div><div class='add'>+</div><div class='add'>+struct ast2300_dram_param {</div><div class='add'>+	u32 dram_type;</div><div class='add'>+	u32 dram_chipid;</div><div class='add'>+	u32 dram_freq;</div><div class='add'>+	u32 vram_size;</div><div class='add'>+	u32 odt;</div><div class='add'>+	u32 wodt;</div><div class='add'>+	u32 rodt;</div><div class='add'>+	u32 dram_config;</div><div class='add'>+	u32 reg_PERIOD;</div><div class='add'>+	u32 reg_MADJ;</div><div class='add'>+	u32 reg_SADJ;</div><div class='add'>+	u32 reg_MRS;</div><div class='add'>+	u32 reg_EMRS;</div><div class='add'>+	u32 reg_AC1;</div><div class='add'>+	u32 reg_AC2;</div><div class='add'>+	u32 reg_DQSIC;</div><div class='add'>+	u32 reg_DRV;</div><div class='add'>+	u32 reg_IOZ;</div><div class='add'>+	u32 reg_DQIDLY;</div><div class='add'>+	u32 reg_FREQ;</div><div class='add'>+	u32 madj_max;</div><div class='add'>+	u32 dll2_finetune_step;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DQSI DLL CBR Setting</div><div class='add'>+ */</div><div class='add'>+#define CBR_SIZE1            ((4  &lt;&lt; 10) - 1)</div><div class='add'>+#define CBR_SIZE2            ((64 &lt;&lt; 10) - 1)</div><div class='add'>+#define CBR_PASSNUM          5</div><div class='add'>+#define CBR_PASSNUM2         5</div><div class='add'>+#define CBR_THRESHOLD        10</div><div class='add'>+#define CBR_THRESHOLD2       10</div><div class='add'>+#define TIMEOUT              5000000</div><div class='add'>+#define CBR_PATNUM           8</div><div class='add'>+</div><div class='add'>+static const u32 pattern[8] = {</div><div class='add'>+	0xFF00FF00,</div><div class='add'>+	0xCC33CC33,</div><div class='add'>+	0xAA55AA55,</div><div class='add'>+	0x88778877,</div><div class='add'>+	0x92CC4D6E,</div><div class='add'>+	0x543D3CDE,</div><div class='add'>+	0xF1E843C7,</div><div class='add'>+	0x7C61D253</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if 0 /* unused in DDX, included for completeness */</div><div class='add'>+static int mmc_test_burst(struct ast_private *ast, u32 datagen)</div><div class='add'>+{</div><div class='add'>+	u32 data, timeout;</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x000000c1 | (datagen &lt;&lt; 3));</div><div class='add'>+	timeout = 0;</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1e6e0070) &amp; 0x3000;</div><div class='add'>+		if (data &amp; 0x2000) {</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		if (++timeout &gt; TIMEOUT) {</div><div class='add'>+			moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	} while (!data);</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int mmc_test_burst2(struct ast_private *ast, u32 datagen)</div><div class='add'>+{</div><div class='add'>+	u32 data, timeout;</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000041 | (datagen &lt;&lt; 3));</div><div class='add'>+	timeout = 0;</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1e6e0070) &amp; 0x1000;</div><div class='add'>+		if (++timeout &gt; TIMEOUT) {</div><div class='add'>+			moutdwm(ast, 0x1e6e0070, 0x0);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+	} while (!data);</div><div class='add'>+	data = mindwm(ast, 0x1e6e0078);</div><div class='add'>+	data = (data | (data &gt;&gt; 16)) &amp; 0xffff;</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x0);</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if 0 /* Unused in DDX here for completeness */</div><div class='add'>+static int mmc_test_single(struct ast_private *ast, u32 datagen)</div><div class='add'>+{</div><div class='add'>+	u32 data, timeout;</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x000000c5 | (datagen &lt;&lt; 3));</div><div class='add'>+	timeout = 0;</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1e6e0070) &amp; 0x3000;</div><div class='add'>+		if (data &amp; 0x2000)</div><div class='add'>+			return 0;</div><div class='add'>+		if (++timeout &gt; TIMEOUT) {</div><div class='add'>+			moutdwm(ast, 0x1e6e0070, 0x0);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	} while (!data);</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x0);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int mmc_test_single2(struct ast_private *ast, u32 datagen)</div><div class='add'>+{</div><div class='add'>+	u32 data, timeout;</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x00000005 | (datagen &lt;&lt; 3));</div><div class='add'>+	timeout = 0;</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1e6e0070) &amp; 0x1000;</div><div class='add'>+		if (++timeout &gt; TIMEOUT) {</div><div class='add'>+			moutdwm(ast, 0x1e6e0070, 0x0);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+	} while (!data);</div><div class='add'>+	data = mindwm(ast, 0x1e6e0078);</div><div class='add'>+	data = (data | (data &gt;&gt; 16)) &amp; 0xffff;</div><div class='add'>+	moutdwm(ast, 0x1e6e0070, 0x0);</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cbr_test(struct ast_private *ast)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+	int i;</div><div class='add'>+	data = mmc_test_single2(ast, 0);</div><div class='add'>+	if ((data &amp; 0xff) &amp;&amp; (data &amp; 0xff00))</div><div class='add'>+		return 0;</div><div class='add'>+	for (i = 0; i &lt; 8; i++) {</div><div class='add'>+		data = mmc_test_burst2(ast, i);</div><div class='add'>+		if ((data &amp; 0xff) &amp;&amp; (data &amp; 0xff00))</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+	if (!data)</div><div class='add'>+		return 3;</div><div class='add'>+	else if (data &amp; 0xff)</div><div class='add'>+		return 2;</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cbr_scan(struct ast_private *ast)</div><div class='add'>+{</div><div class='add'>+	u32 data, data2, patcnt, loop;</div><div class='add'>+</div><div class='add'>+	data2 = 3;</div><div class='add'>+	for (patcnt = 0; patcnt &lt; CBR_PATNUM; patcnt++) {</div><div class='add'>+		moutdwm(ast, 0x1e6e007c, pattern[patcnt]);</div><div class='add'>+		for (loop = 0; loop &lt; CBR_PASSNUM2; loop++) {</div><div class='add'>+			if ((data = cbr_test(ast)) != 0) {</div><div class='add'>+				data2 &amp;= data;</div><div class='add'>+				if (!data2)</div><div class='add'>+					return 0;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (loop == CBR_PASSNUM2)</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+	return data2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 cbr_test2(struct ast_private *ast)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	data = mmc_test_burst2(ast, 0);</div><div class='add'>+	if (data == 0xffff)</div><div class='add'>+		return 0;</div><div class='add'>+	data |= mmc_test_single2(ast, 0);</div><div class='add'>+	if (data == 0xffff)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ~data &amp; 0xffff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 cbr_scan2(struct ast_private *ast)</div><div class='add'>+{</div><div class='add'>+	u32 data, data2, patcnt, loop;</div><div class='add'>+</div><div class='add'>+	data2 = 0xffff;</div><div class='add'>+	for (patcnt = 0; patcnt &lt; CBR_PATNUM; patcnt++) {</div><div class='add'>+		moutdwm(ast, 0x1e6e007c, pattern[patcnt]);</div><div class='add'>+		for (loop = 0; loop &lt; CBR_PASSNUM2; loop++) {</div><div class='add'>+			if ((data = cbr_test2(ast)) != 0) {</div><div class='add'>+				data2 &amp;= data;</div><div class='add'>+				if (!data)</div><div class='add'>+					return 0;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (loop == CBR_PASSNUM2)</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+	return data2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if 0 /* unused in DDX - added for completeness */</div><div class='add'>+static void finetuneDQI(struct ast_private *ast, struct ast2300_dram_param *param)</div><div class='add'>+{</div><div class='add'>+	u32 gold_sadj[2], dllmin[16], dllmax[16], dlli, data, cnt, mask, passcnt;</div><div class='add'>+</div><div class='add'>+	gold_sadj[0] = (mindwm(ast, 0x1E6E0024) &gt;&gt; 16) &amp; 0xffff;</div><div class='add'>+	gold_sadj[1] = gold_sadj[0] &gt;&gt; 8;</div><div class='add'>+	gold_sadj[0] = gold_sadj[0] &amp; 0xff;</div><div class='add'>+	gold_sadj[0] = (gold_sadj[0] + gold_sadj[1]) &gt;&gt; 1;</div><div class='add'>+	gold_sadj[1] = gold_sadj[0];</div><div class='add'>+</div><div class='add'>+	for (cnt = 0; cnt &lt; 16; cnt++) {</div><div class='add'>+		dllmin[cnt] = 0xff;</div><div class='add'>+		dllmax[cnt] = 0x0;</div><div class='add'>+	}</div><div class='add'>+	passcnt = 0;</div><div class='add'>+	for (dlli = 0; dlli &lt; 76; dlli++) {</div><div class='add'>+		moutdwm(ast, 0x1E6E0068, 0x00001400 | (dlli &lt;&lt; 16) | (dlli &lt;&lt; 24));</div><div class='add'>+		/* Wait DQSI latch phase calibration */</div><div class='add'>+		moutdwm(ast, 0x1E6E0074, 0x00000010);</div><div class='add'>+		moutdwm(ast, 0x1E6E0070, 0x00000003);</div><div class='add'>+		do {</div><div class='add'>+			data = mindwm(ast, 0x1E6E0070);</div><div class='add'>+		} while (!(data &amp; 0x00001000));</div><div class='add'>+		moutdwm(ast, 0x1E6E0070, 0x00000000);</div><div class='add'>+</div><div class='add'>+		moutdwm(ast, 0x1E6E0074, CBR_SIZE1);</div><div class='add'>+		data = cbr_scan2(ast);</div><div class='add'>+		if (data != 0) {</div><div class='add'>+			mask = 0x00010001;</div><div class='add'>+			for (cnt = 0; cnt &lt; 16; cnt++) {</div><div class='add'>+				if (data &amp; mask) {</div><div class='add'>+					if (dllmin[cnt] &gt; dlli) {</div><div class='add'>+						dllmin[cnt] = dlli;</div><div class='add'>+					}</div><div class='add'>+					if (dllmax[cnt] &lt; dlli) {</div><div class='add'>+						dllmax[cnt] = dlli;</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='add'>+				mask &lt;&lt;= 1;</div><div class='add'>+			}</div><div class='add'>+			passcnt++;</div><div class='add'>+		} else if (passcnt &gt;= CBR_THRESHOLD) {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	data = 0;</div><div class='add'>+	for (cnt = 0; cnt &lt; 8; cnt++) {</div><div class='add'>+		data &gt;&gt;= 3;</div><div class='add'>+		if ((dllmax[cnt] &gt; dllmin[cnt]) &amp;&amp; ((dllmax[cnt] - dllmin[cnt]) &gt;= CBR_THRESHOLD)) {</div><div class='add'>+			dlli = (dllmin[cnt] + dllmax[cnt]) &gt;&gt; 1;</div><div class='add'>+			if (gold_sadj[0] &gt;= dlli) {</div><div class='add'>+				dlli = (gold_sadj[0] - dlli) &gt;&gt; 1;</div><div class='add'>+				if (dlli &gt; 3) {</div><div class='add'>+					dlli = 3;</div><div class='add'>+				}</div><div class='add'>+			} else {</div><div class='add'>+				dlli = (dlli - gold_sadj[0]) &gt;&gt; 1;</div><div class='add'>+				if (dlli &gt; 4) {</div><div class='add'>+					dlli = 4;</div><div class='add'>+				}</div><div class='add'>+				dlli = (8 - dlli) &amp; 0x7;</div><div class='add'>+			}</div><div class='add'>+			data |= dlli &lt;&lt; 21;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	moutdwm(ast, 0x1E6E0080, data);</div><div class='add'>+</div><div class='add'>+	data = 0;</div><div class='add'>+	for (cnt = 8; cnt &lt; 16; cnt++) {</div><div class='add'>+		data &gt;&gt;= 3;</div><div class='add'>+		if ((dllmax[cnt] &gt; dllmin[cnt]) &amp;&amp; ((dllmax[cnt] - dllmin[cnt]) &gt;= CBR_THRESHOLD)) {</div><div class='add'>+			dlli = (dllmin[cnt] + dllmax[cnt]) &gt;&gt; 1;</div><div class='add'>+			if (gold_sadj[1] &gt;= dlli) {</div><div class='add'>+				dlli = (gold_sadj[1] - dlli) &gt;&gt; 1;</div><div class='add'>+				if (dlli &gt; 3) {</div><div class='add'>+					dlli = 3;</div><div class='add'>+				} else {</div><div class='add'>+					dlli = (dlli - 1) &amp; 0x7;</div><div class='add'>+				}</div><div class='add'>+			} else {</div><div class='add'>+				dlli = (dlli - gold_sadj[1]) &gt;&gt; 1;</div><div class='add'>+				dlli += 1;</div><div class='add'>+				if (dlli &gt; 4) {</div><div class='add'>+					dlli = 4;</div><div class='add'>+				}</div><div class='add'>+				dlli = (8 - dlli) &amp; 0x7;</div><div class='add'>+			}</div><div class='add'>+			data |= dlli &lt;&lt; 21;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	moutdwm(ast, 0x1E6E0084, data);</div><div class='add'>+</div><div class='add'>+} /* finetuneDQI */</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void finetuneDQI_L(struct ast_private *ast, struct ast2300_dram_param *param)</div><div class='add'>+{</div><div class='add'>+	u32 gold_sadj[2], dllmin[16], dllmax[16], dlli, data, cnt, mask, passcnt;</div><div class='add'>+</div><div class='add'>+FINETUNE_START:</div><div class='add'>+	for (cnt = 0; cnt &lt; 16; cnt++) {</div><div class='add'>+		dllmin[cnt] = 0xff;</div><div class='add'>+		dllmax[cnt] = 0x0;</div><div class='add'>+	}</div><div class='add'>+	passcnt = 0;</div><div class='add'>+	for (dlli = 0; dlli &lt; 76; dlli++) {</div><div class='add'>+		moutdwm(ast, 0x1E6E0068, 0x00001400 | (dlli &lt;&lt; 16) | (dlli &lt;&lt; 24));</div><div class='add'>+		/* Wait DQSI latch phase calibration */</div><div class='add'>+		moutdwm(ast, 0x1E6E0074, 0x00000010);</div><div class='add'>+		moutdwm(ast, 0x1E6E0070, 0x00000003);</div><div class='add'>+		do {</div><div class='add'>+			data = mindwm(ast, 0x1E6E0070);</div><div class='add'>+		} while (!(data &amp; 0x00001000));</div><div class='add'>+		moutdwm(ast, 0x1E6E0070, 0x00000000);</div><div class='add'>+</div><div class='add'>+		moutdwm(ast, 0x1E6E0074, CBR_SIZE1);</div><div class='add'>+		data = cbr_scan2(ast);</div><div class='add'>+		if (data != 0) {</div><div class='add'>+			mask = 0x00010001;</div><div class='add'>+			for (cnt = 0; cnt &lt; 16; cnt++) {</div><div class='add'>+				if (data &amp; mask) {</div><div class='add'>+					if (dllmin[cnt] &gt; dlli) {</div><div class='add'>+						dllmin[cnt] = dlli;</div><div class='add'>+					}</div><div class='add'>+					if (dllmax[cnt] &lt; dlli) {</div><div class='add'>+						dllmax[cnt] = dlli;</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='add'>+				mask &lt;&lt;= 1;</div><div class='add'>+			}</div><div class='add'>+			passcnt++;</div><div class='add'>+		} else if (passcnt &gt;= CBR_THRESHOLD2) {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	gold_sadj[0] = 0x0;</div><div class='add'>+	passcnt = 0;</div><div class='add'>+	for (cnt = 0; cnt &lt; 16; cnt++) {</div><div class='add'>+		if ((dllmax[cnt] &gt; dllmin[cnt]) &amp;&amp; ((dllmax[cnt] - dllmin[cnt]) &gt;= CBR_THRESHOLD2)) {</div><div class='add'>+			gold_sadj[0] += dllmin[cnt];</div><div class='add'>+			passcnt++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (passcnt != 16) {</div><div class='add'>+		goto FINETUNE_START;</div><div class='add'>+	}</div><div class='add'>+	gold_sadj[0] = gold_sadj[0] &gt;&gt; 4;</div><div class='add'>+	gold_sadj[1] = gold_sadj[0];</div><div class='add'>+</div><div class='add'>+	data = 0;</div><div class='add'>+	for (cnt = 0; cnt &lt; 8; cnt++) {</div><div class='add'>+		data &gt;&gt;= 3;</div><div class='add'>+		if ((dllmax[cnt] &gt; dllmin[cnt]) &amp;&amp; ((dllmax[cnt] - dllmin[cnt]) &gt;= CBR_THRESHOLD2)) {</div><div class='add'>+			dlli = dllmin[cnt];</div><div class='add'>+			if (gold_sadj[0] &gt;= dlli) {</div><div class='add'>+				dlli = ((gold_sadj[0] - dlli) * 19) &gt;&gt; 5;</div><div class='add'>+				if (dlli &gt; 3) {</div><div class='add'>+					dlli = 3;</div><div class='add'>+				}</div><div class='add'>+			} else {</div><div class='add'>+				dlli = ((dlli - gold_sadj[0]) * 19) &gt;&gt; 5;</div><div class='add'>+				if (dlli &gt; 4) {</div><div class='add'>+					dlli = 4;</div><div class='add'>+				}</div><div class='add'>+				dlli = (8 - dlli) &amp; 0x7;</div><div class='add'>+			}</div><div class='add'>+			data |= dlli &lt;&lt; 21;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	moutdwm(ast, 0x1E6E0080, data);</div><div class='add'>+</div><div class='add'>+	data = 0;</div><div class='add'>+	for (cnt = 8; cnt &lt; 16; cnt++) {</div><div class='add'>+		data &gt;&gt;= 3;</div><div class='add'>+		if ((dllmax[cnt] &gt; dllmin[cnt]) &amp;&amp; ((dllmax[cnt] - dllmin[cnt]) &gt;= CBR_THRESHOLD2)) {</div><div class='add'>+			dlli = dllmin[cnt];</div><div class='add'>+			if (gold_sadj[1] &gt;= dlli) {</div><div class='add'>+				dlli = ((gold_sadj[1] - dlli) * 19) &gt;&gt; 5;</div><div class='add'>+				if (dlli &gt; 3) {</div><div class='add'>+					dlli = 3;</div><div class='add'>+				} else {</div><div class='add'>+					dlli = (dlli - 1) &amp; 0x7;</div><div class='add'>+				}</div><div class='add'>+			} else {</div><div class='add'>+				dlli = ((dlli - gold_sadj[1]) * 19) &gt;&gt; 5;</div><div class='add'>+				dlli += 1;</div><div class='add'>+				if (dlli &gt; 4) {</div><div class='add'>+					dlli = 4;</div><div class='add'>+				}</div><div class='add'>+				dlli = (8 - dlli) &amp; 0x7;</div><div class='add'>+			}</div><div class='add'>+			data |= dlli &lt;&lt; 21;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	moutdwm(ast, 0x1E6E0084, data);</div><div class='add'>+</div><div class='add'>+} /* finetuneDQI_L */</div><div class='add'>+</div><div class='add'>+static void finetuneDQI_L2(struct ast_private *ast, struct ast2300_dram_param *param)</div><div class='add'>+{</div><div class='add'>+	u32 gold_sadj[2], dllmin[16], dllmax[16], dlli, data, cnt, mask, passcnt, data2;</div><div class='add'>+</div><div class='add'>+	for (cnt = 0; cnt &lt; 16; cnt++) {</div><div class='add'>+		dllmin[cnt] = 0xff;</div><div class='add'>+		dllmax[cnt] = 0x0;</div><div class='add'>+	}</div><div class='add'>+	passcnt = 0;</div><div class='add'>+	for (dlli = 0; dlli &lt; 76; dlli++) {</div><div class='add'>+		moutdwm(ast, 0x1E6E0068, 0x00001400 | (dlli &lt;&lt; 16) | (dlli &lt;&lt; 24));</div><div class='add'>+		/* Wait DQSI latch phase calibration */</div><div class='add'>+		moutdwm(ast, 0x1E6E0074, 0x00000010);</div><div class='add'>+		moutdwm(ast, 0x1E6E0070, 0x00000003);</div><div class='add'>+		do {</div><div class='add'>+			data = mindwm(ast, 0x1E6E0070);</div><div class='add'>+		} while (!(data &amp; 0x00001000));</div><div class='add'>+		moutdwm(ast, 0x1E6E0070, 0x00000000);</div><div class='add'>+</div><div class='add'>+		moutdwm(ast, 0x1E6E0074, CBR_SIZE2);</div><div class='add'>+		data = cbr_scan2(ast);</div><div class='add'>+		if (data != 0) {</div><div class='add'>+			mask = 0x00010001;</div><div class='add'>+			for (cnt = 0; cnt &lt; 16; cnt++) {</div><div class='add'>+				if (data &amp; mask) {</div><div class='add'>+					if (dllmin[cnt] &gt; dlli) {</div><div class='add'>+						dllmin[cnt] = dlli;</div><div class='add'>+					}</div><div class='add'>+					if (dllmax[cnt] &lt; dlli) {</div><div class='add'>+						dllmax[cnt] = dlli;</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='add'>+				mask &lt;&lt;= 1;</div><div class='add'>+			}</div><div class='add'>+			passcnt++;</div><div class='add'>+		} else if (passcnt &gt;= CBR_THRESHOLD2) {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	gold_sadj[0] = 0x0;</div><div class='add'>+	gold_sadj[1] = 0xFF;</div><div class='add'>+	for (cnt = 0; cnt &lt; 8; cnt++) {</div><div class='add'>+		if ((dllmax[cnt] &gt; dllmin[cnt]) &amp;&amp; ((dllmax[cnt] - dllmin[cnt]) &gt;= CBR_THRESHOLD2)) {</div><div class='add'>+			if (gold_sadj[0] &lt; dllmin[cnt]) {</div><div class='add'>+				gold_sadj[0] = dllmin[cnt];</div><div class='add'>+			}</div><div class='add'>+			if (gold_sadj[1] &gt; dllmax[cnt]) {</div><div class='add'>+				gold_sadj[1] = dllmax[cnt];</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	gold_sadj[0] = (gold_sadj[1] + gold_sadj[0]) &gt;&gt; 1;</div><div class='add'>+	gold_sadj[1] = mindwm(ast, 0x1E6E0080);</div><div class='add'>+</div><div class='add'>+	data = 0;</div><div class='add'>+	for (cnt = 0; cnt &lt; 8; cnt++) {</div><div class='add'>+		data &gt;&gt;= 3;</div><div class='add'>+		data2 = gold_sadj[1] &amp; 0x7;</div><div class='add'>+		gold_sadj[1] &gt;&gt;= 3;</div><div class='add'>+		if ((dllmax[cnt] &gt; dllmin[cnt]) &amp;&amp; ((dllmax[cnt] - dllmin[cnt]) &gt;= CBR_THRESHOLD2)) {</div><div class='add'>+			dlli = (dllmin[cnt] + dllmax[cnt]) &gt;&gt; 1;</div><div class='add'>+			if (gold_sadj[0] &gt;= dlli) {</div><div class='add'>+				dlli = (gold_sadj[0] - dlli) &gt;&gt; 1;</div><div class='add'>+				if (dlli &gt; 0) {</div><div class='add'>+					dlli = 1;</div><div class='add'>+				}</div><div class='add'>+				if (data2 != 3) {</div><div class='add'>+					data2 = (data2 + dlli) &amp; 0x7;</div><div class='add'>+				}</div><div class='add'>+			} else {</div><div class='add'>+				dlli = (dlli - gold_sadj[0]) &gt;&gt; 1;</div><div class='add'>+				if (dlli &gt; 0) {</div><div class='add'>+					dlli = 1;</div><div class='add'>+				}</div><div class='add'>+				if (data2 != 4) {</div><div class='add'>+					data2 = (data2 - dlli) &amp; 0x7;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		data |= data2 &lt;&lt; 21;</div><div class='add'>+	}</div><div class='add'>+	moutdwm(ast, 0x1E6E0080, data);</div><div class='add'>+</div><div class='add'>+	gold_sadj[0] = 0x0;</div><div class='add'>+	gold_sadj[1] = 0xFF;</div><div class='add'>+	for (cnt = 8; cnt &lt; 16; cnt++) {</div><div class='add'>+		if ((dllmax[cnt] &gt; dllmin[cnt]) &amp;&amp; ((dllmax[cnt] - dllmin[cnt]) &gt;= CBR_THRESHOLD2)) {</div><div class='add'>+			if (gold_sadj[0] &lt; dllmin[cnt]) {</div><div class='add'>+				gold_sadj[0] = dllmin[cnt];</div><div class='add'>+			}</div><div class='add'>+			if (gold_sadj[1] &gt; dllmax[cnt]) {</div><div class='add'>+				gold_sadj[1] = dllmax[cnt];</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	gold_sadj[0] = (gold_sadj[1] + gold_sadj[0]) &gt;&gt; 1;</div><div class='add'>+	gold_sadj[1] = mindwm(ast, 0x1E6E0084);</div><div class='add'>+</div><div class='add'>+	data = 0;</div><div class='add'>+	for (cnt = 8; cnt &lt; 16; cnt++) {</div><div class='add'>+		data &gt;&gt;= 3;</div><div class='add'>+		data2 = gold_sadj[1] &amp; 0x7;</div><div class='add'>+		gold_sadj[1] &gt;&gt;= 3;</div><div class='add'>+		if ((dllmax[cnt] &gt; dllmin[cnt]) &amp;&amp; ((dllmax[cnt] - dllmin[cnt]) &gt;= CBR_THRESHOLD2)) {</div><div class='add'>+			dlli = (dllmin[cnt] + dllmax[cnt]) &gt;&gt; 1;</div><div class='add'>+			if (gold_sadj[0] &gt;= dlli) {</div><div class='add'>+				dlli = (gold_sadj[0] - dlli) &gt;&gt; 1;</div><div class='add'>+				if (dlli &gt; 0) {</div><div class='add'>+					dlli = 1;</div><div class='add'>+				}</div><div class='add'>+				if (data2 != 3) {</div><div class='add'>+					data2 = (data2 + dlli) &amp; 0x7;</div><div class='add'>+				}</div><div class='add'>+			} else {</div><div class='add'>+				dlli = (dlli - gold_sadj[0]) &gt;&gt; 1;</div><div class='add'>+				if (dlli &gt; 0) {</div><div class='add'>+					dlli = 1;</div><div class='add'>+				}</div><div class='add'>+				if (data2 != 4) {</div><div class='add'>+					data2 = (data2 - dlli) &amp; 0x7;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		data |= data2 &lt;&lt; 21;</div><div class='add'>+	}</div><div class='add'>+	moutdwm(ast, 0x1E6E0084, data);</div><div class='add'>+</div><div class='add'>+} /* finetuneDQI_L2 */</div><div class='add'>+</div><div class='add'>+static void cbr_dll2(struct ast_private *ast, struct ast2300_dram_param *param)</div><div class='add'>+{</div><div class='add'>+	u32 dllmin[2], dllmax[2], dlli, data, data2, passcnt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	finetuneDQI_L(ast, param);</div><div class='add'>+	finetuneDQI_L2(ast, param);</div><div class='add'>+</div><div class='add'>+CBR_START2:</div><div class='add'>+	dllmin[0] = dllmin[1] = 0xff;</div><div class='add'>+	dllmax[0] = dllmax[1] = 0x0;</div><div class='add'>+	passcnt = 0;</div><div class='add'>+	for (dlli = 0; dlli &lt; 76; dlli++) {</div><div class='add'>+		moutdwm(ast, 0x1E6E0068, 0x00001300 | (dlli &lt;&lt; 16) | (dlli &lt;&lt; 24));</div><div class='add'>+		/* Wait DQSI latch phase calibration */</div><div class='add'>+		moutdwm(ast, 0x1E6E0074, 0x00000010);</div><div class='add'>+		moutdwm(ast, 0x1E6E0070, 0x00000003);</div><div class='add'>+		do {</div><div class='add'>+			data = mindwm(ast, 0x1E6E0070);</div><div class='add'>+		} while (!(data &amp; 0x00001000));</div><div class='add'>+		moutdwm(ast, 0x1E6E0070, 0x00000000);</div><div class='add'>+</div><div class='add'>+		moutdwm(ast, 0x1E6E0074, CBR_SIZE2);</div><div class='add'>+		data = cbr_scan(ast);</div><div class='add'>+		if (data != 0) {</div><div class='add'>+			if (data &amp; 0x1) {</div><div class='add'>+				if (dllmin[0] &gt; dlli) {</div><div class='add'>+					dllmin[0] = dlli;</div><div class='add'>+				}</div><div class='add'>+				if (dllmax[0] &lt; dlli) {</div><div class='add'>+					dllmax[0] = dlli;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			if (data &amp; 0x2) {</div><div class='add'>+				if (dllmin[1] &gt; dlli) {</div><div class='add'>+					dllmin[1] = dlli;</div><div class='add'>+				}</div><div class='add'>+				if (dllmax[1] &lt; dlli) {</div><div class='add'>+					dllmax[1] = dlli;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			passcnt++;</div><div class='add'>+		} else if (passcnt &gt;= CBR_THRESHOLD) {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (dllmax[0] == 0 || (dllmax[0]-dllmin[0]) &lt; CBR_THRESHOLD) {</div><div class='add'>+		goto CBR_START2;</div><div class='add'>+	}</div><div class='add'>+	if (dllmax[1] == 0 || (dllmax[1]-dllmin[1]) &lt; CBR_THRESHOLD) {</div><div class='add'>+		goto CBR_START2;</div><div class='add'>+	}</div><div class='add'>+	dlli  = (dllmin[1] + dllmax[1]) &gt;&gt; 1;</div><div class='add'>+	dlli &lt;&lt;= 8;</div><div class='add'>+	dlli += (dllmin[0] + dllmax[0]) &gt;&gt; 1;</div><div class='add'>+	moutdwm(ast, 0x1E6E0068, (mindwm(ast, 0x1E6E0068) &amp; 0xFFFF) | (dlli &lt;&lt; 16));</div><div class='add'>+</div><div class='add'>+	data  = (mindwm(ast, 0x1E6E0080) &gt;&gt; 24) &amp; 0x1F;</div><div class='add'>+	data2 = (mindwm(ast, 0x1E6E0018) &amp; 0xff80ffff) | (data &lt;&lt; 16);</div><div class='add'>+	moutdwm(ast, 0x1E6E0018, data2);</div><div class='add'>+	moutdwm(ast, 0x1E6E0024, 0x8001 | (data &lt;&lt; 1) | (param-&gt;dll2_finetune_step &lt;&lt; 8));</div><div class='add'>+</div><div class='add'>+	/* Wait DQSI latch phase calibration */</div><div class='add'>+	moutdwm(ast, 0x1E6E0074, 0x00000010);</div><div class='add'>+	moutdwm(ast, 0x1E6E0070, 0x00000003);</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1E6E0070);</div><div class='add'>+	} while (!(data &amp; 0x00001000));</div><div class='add'>+	moutdwm(ast, 0x1E6E0070, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0070, 0x00000003);</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1E6E0070);</div><div class='add'>+	} while (!(data &amp; 0x00001000));</div><div class='add'>+	moutdwm(ast, 0x1E6E0070, 0x00000000);</div><div class='add'>+} /* CBRDLL2 */</div><div class='add'>+</div><div class='add'>+static void get_ddr3_info(struct ast_private *ast, struct ast2300_dram_param *param)</div><div class='add'>+{</div><div class='add'>+	u32 trap, trap_AC2, trap_MRS;</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1E6E2000, 0x1688A8A8);</div><div class='add'>+</div><div class='add'>+	/* Ger trap info */</div><div class='add'>+	trap = (mindwm(ast, 0x1E6E2070) &gt;&gt; 25) &amp; 0x3;</div><div class='add'>+	trap_AC2  = 0x00020000 + (trap &lt;&lt; 16);</div><div class='add'>+	trap_AC2 |= 0x00300000 + ((trap &amp; 0x2) &lt;&lt; 19);</div><div class='add'>+	trap_MRS  = 0x00000010 + (trap &lt;&lt; 4);</div><div class='add'>+	trap_MRS |= ((trap &amp; 0x2) &lt;&lt; 18);</div><div class='add'>+</div><div class='add'>+	param-&gt;reg_MADJ       = 0x00034C4C;</div><div class='add'>+	param-&gt;reg_SADJ       = 0x00001800;</div><div class='add'>+	param-&gt;reg_DRV        = 0x000000F0;</div><div class='add'>+	param-&gt;reg_PERIOD     = param-&gt;dram_freq;</div><div class='add'>+	param-&gt;rodt           = 0;</div><div class='add'>+</div><div class='add'>+	switch (param-&gt;dram_freq) {</div><div class='add'>+	case 336:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x0190);</div><div class='add'>+		param-&gt;wodt          = 0;</div><div class='add'>+		param-&gt;reg_AC1       = 0x22202725;</div><div class='add'>+		param-&gt;reg_AC2       = 0xAA007613 | trap_AC2;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x000000BA;</div><div class='add'>+		param-&gt;reg_MRS       = 0x04001400 | trap_MRS;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000000;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000034;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x00000074;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x00004DC0;</div><div class='add'>+		param-&gt;madj_max      = 96;</div><div class='add'>+		param-&gt;dll2_finetune_step = 3;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+	case 396:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x03F1);</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;reg_AC1       = 0x33302825;</div><div class='add'>+		param-&gt;reg_AC2       = 0xCC009617 | trap_AC2;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x000000E2;</div><div class='add'>+		param-&gt;reg_MRS       = 0x04001600 | trap_MRS;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000000;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000034;</div><div class='add'>+		param-&gt;reg_DRV       = 0x000000FA;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x00000089;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000050C0;</div><div class='add'>+		param-&gt;madj_max      = 96;</div><div class='add'>+		param-&gt;dll2_finetune_step = 4;</div><div class='add'>+</div><div class='add'>+		switch (param-&gt;dram_chipid) {</div><div class='add'>+		default:</div><div class='add'>+		case AST_DRAM_512Mx16:</div><div class='add'>+		case AST_DRAM_1Gx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC009617 | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		case AST_DRAM_2Gx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC009622 | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		case AST_DRAM_4Gx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC00963F | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 408:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x01F0);</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;reg_AC1       = 0x33302825;</div><div class='add'>+		param-&gt;reg_AC2       = 0xCC009617 | trap_AC2;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x000000E2;</div><div class='add'>+		param-&gt;reg_MRS       = 0x04001600 | trap_MRS;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000000;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000034;</div><div class='add'>+		param-&gt;reg_DRV       = 0x000000FA;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x00000089;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000050C0;</div><div class='add'>+		param-&gt;madj_max      = 96;</div><div class='add'>+		param-&gt;dll2_finetune_step = 4;</div><div class='add'>+</div><div class='add'>+		switch (param-&gt;dram_chipid) {</div><div class='add'>+		default:</div><div class='add'>+		case AST_DRAM_512Mx16:</div><div class='add'>+		case AST_DRAM_1Gx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC009617 | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		case AST_DRAM_2Gx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC009622 | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		case AST_DRAM_4Gx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC00963F | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case 456:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x0230);</div><div class='add'>+		param-&gt;wodt          = 0;</div><div class='add'>+		param-&gt;reg_AC1       = 0x33302926;</div><div class='add'>+		param-&gt;reg_AC2       = 0xCD44961A;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x000000FC;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00081830;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000000;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000045;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x00000097;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000052C0;</div><div class='add'>+		param-&gt;madj_max      = 88;</div><div class='add'>+		param-&gt;dll2_finetune_step = 4;</div><div class='add'>+		break;</div><div class='add'>+	case 504:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x0270);</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;reg_AC1       = 0x33302926;</div><div class='add'>+		param-&gt;reg_AC2       = 0xDE44A61D;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x00000117;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00081A30;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000000;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x070000BB;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x000000A0;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000054C0;</div><div class='add'>+		param-&gt;madj_max      = 79;</div><div class='add'>+		param-&gt;dll2_finetune_step = 4;</div><div class='add'>+		break;</div><div class='add'>+	case 528:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x0290);</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;rodt          = 1;</div><div class='add'>+		param-&gt;reg_AC1       = 0x33302926;</div><div class='add'>+		param-&gt;reg_AC2       = 0xEF44B61E;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x00000125;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00081A30;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000040;</div><div class='add'>+		param-&gt;reg_DRV       = 0x000000F5;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000023;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x00000088;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000055C0;</div><div class='add'>+		param-&gt;madj_max      = 76;</div><div class='add'>+		param-&gt;dll2_finetune_step = 3;</div><div class='add'>+		break;</div><div class='add'>+	case 576:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x0140);</div><div class='add'>+		param-&gt;reg_MADJ      = 0x00136868;</div><div class='add'>+		param-&gt;reg_SADJ      = 0x00004534;</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;rodt          = 1;</div><div class='add'>+		param-&gt;reg_AC1       = 0x33302A37;</div><div class='add'>+		param-&gt;reg_AC2       = 0xEF56B61E;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x0000013F;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00101A50;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000040;</div><div class='add'>+		param-&gt;reg_DRV       = 0x000000FA;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000023;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x00000078;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000057C0;</div><div class='add'>+		param-&gt;madj_max      = 136;</div><div class='add'>+		param-&gt;dll2_finetune_step = 3;</div><div class='add'>+		break;</div><div class='add'>+	case 600:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x02E1);</div><div class='add'>+		param-&gt;reg_MADJ      = 0x00136868;</div><div class='add'>+		param-&gt;reg_SADJ      = 0x00004534;</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;rodt          = 1;</div><div class='add'>+		param-&gt;reg_AC1       = 0x32302A37;</div><div class='add'>+		param-&gt;reg_AC2       = 0xDF56B61F;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x0000014D;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00101A50;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000004;</div><div class='add'>+		param-&gt;reg_DRV       = 0x000000F5;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000023;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x00000078;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000058C0;</div><div class='add'>+		param-&gt;madj_max      = 132;</div><div class='add'>+		param-&gt;dll2_finetune_step = 3;</div><div class='add'>+		break;</div><div class='add'>+	case 624:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x0160);</div><div class='add'>+		param-&gt;reg_MADJ      = 0x00136868;</div><div class='add'>+		param-&gt;reg_SADJ      = 0x00004534;</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;rodt          = 1;</div><div class='add'>+		param-&gt;reg_AC1       = 0x32302A37;</div><div class='add'>+		param-&gt;reg_AC2       = 0xEF56B621;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x0000015A;</div><div class='add'>+		param-&gt;reg_MRS       = 0x02101A50;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000004;</div><div class='add'>+		param-&gt;reg_DRV       = 0x000000F5;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000034;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x00000078;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000059C0;</div><div class='add'>+		param-&gt;madj_max      = 128;</div><div class='add'>+		param-&gt;dll2_finetune_step = 3;</div><div class='add'>+		break;</div><div class='add'>+	} /* switch freq */</div><div class='add'>+</div><div class='add'>+	switch (param-&gt;dram_chipid) {</div><div class='add'>+	case AST_DRAM_512Mx16:</div><div class='add'>+		param-&gt;dram_config = 0x130;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+	case AST_DRAM_1Gx16:</div><div class='add'>+		param-&gt;dram_config = 0x131;</div><div class='add'>+		break;</div><div class='add'>+	case AST_DRAM_2Gx16:</div><div class='add'>+		param-&gt;dram_config = 0x132;</div><div class='add'>+		break;</div><div class='add'>+	case AST_DRAM_4Gx16:</div><div class='add'>+		param-&gt;dram_config = 0x133;</div><div class='add'>+		break;</div><div class='add'>+	}; /* switch size */</div><div class='add'>+</div><div class='add'>+	switch (param-&gt;vram_size) {</div><div class='add'>+	default:</div><div class='add'>+	case AST_VIDMEM_SIZE_8M:</div><div class='add'>+		param-&gt;dram_config |= 0x00;</div><div class='add'>+		break;</div><div class='add'>+	case AST_VIDMEM_SIZE_16M:</div><div class='add'>+		param-&gt;dram_config |= 0x04;</div><div class='add'>+		break;</div><div class='add'>+	case AST_VIDMEM_SIZE_32M:</div><div class='add'>+		param-&gt;dram_config |= 0x08;</div><div class='add'>+		break;</div><div class='add'>+	case AST_VIDMEM_SIZE_64M:</div><div class='add'>+		param-&gt;dram_config |= 0x0c;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ddr3_init(struct ast_private *ast, struct ast2300_dram_param *param)</div><div class='add'>+{</div><div class='add'>+	u32 data, data2;</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1E6E0000, 0xFC600309);</div><div class='add'>+	moutdwm(ast, 0x1E6E0018, 0x00000100);</div><div class='add'>+	moutdwm(ast, 0x1E6E0024, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0034, 0x00000000);</div><div class='add'>+	udelay(10);</div><div class='add'>+	moutdwm(ast, 0x1E6E0064, param-&gt;reg_MADJ);</div><div class='add'>+	moutdwm(ast, 0x1E6E0068, param-&gt;reg_SADJ);</div><div class='add'>+	udelay(10);</div><div class='add'>+	moutdwm(ast, 0x1E6E0064, param-&gt;reg_MADJ | 0xC0000);</div><div class='add'>+	udelay(10);</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1E6E0004, param-&gt;dram_config);</div><div class='add'>+	moutdwm(ast, 0x1E6E0008, 0x90040f);</div><div class='add'>+	moutdwm(ast, 0x1E6E0010, param-&gt;reg_AC1);</div><div class='add'>+	moutdwm(ast, 0x1E6E0014, param-&gt;reg_AC2);</div><div class='add'>+	moutdwm(ast, 0x1E6E0020, param-&gt;reg_DQSIC);</div><div class='add'>+	moutdwm(ast, 0x1E6E0080, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0084, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0088, param-&gt;reg_DQIDLY);</div><div class='add'>+	moutdwm(ast, 0x1E6E0018, 0x4040A170);</div><div class='add'>+	moutdwm(ast, 0x1E6E0018, 0x20402370);</div><div class='add'>+	moutdwm(ast, 0x1E6E0038, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0040, 0xFF444444);</div><div class='add'>+	moutdwm(ast, 0x1E6E0044, 0x22222222);</div><div class='add'>+	moutdwm(ast, 0x1E6E0048, 0x22222222);</div><div class='add'>+	moutdwm(ast, 0x1E6E004C, 0x00000002);</div><div class='add'>+	moutdwm(ast, 0x1E6E0050, 0x80000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0050, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0054, 0);</div><div class='add'>+	moutdwm(ast, 0x1E6E0060, param-&gt;reg_DRV);</div><div class='add'>+	moutdwm(ast, 0x1E6E006C, param-&gt;reg_IOZ);</div><div class='add'>+	moutdwm(ast, 0x1E6E0070, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0074, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0078, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E007C, 0x00000000);</div><div class='add'>+	/* Wait MCLK2X lock to MCLK */</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1E6E001C);</div><div class='add'>+	} while (!(data &amp; 0x08000000));</div><div class='add'>+	moutdwm(ast, 0x1E6E0034, 0x00000001);</div><div class='add'>+	moutdwm(ast, 0x1E6E000C, 0x00005C04);</div><div class='add'>+	udelay(10);</div><div class='add'>+	moutdwm(ast, 0x1E6E000C, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0034, 0x00000000);</div><div class='add'>+	data = mindwm(ast, 0x1E6E001C);</div><div class='add'>+	data = (data &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	while ((data &amp; 0x08) || ((data &amp; 0x7) &lt; 2) || (data &lt; 4)) {</div><div class='add'>+		data2 = (mindwm(ast, 0x1E6E0064) &amp; 0xfff3ffff) + 4;</div><div class='add'>+		if ((data2 &amp; 0xff) &gt; param-&gt;madj_max) {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		moutdwm(ast, 0x1E6E0064, data2);</div><div class='add'>+		if (data2 &amp; 0x00100000) {</div><div class='add'>+			data2 = ((data2 &amp; 0xff) &gt;&gt; 3) + 3;</div><div class='add'>+		} else {</div><div class='add'>+			data2 = ((data2 &amp; 0xff) &gt;&gt; 2) + 5;</div><div class='add'>+		}</div><div class='add'>+		data = mindwm(ast, 0x1E6E0068) &amp; 0xffff00ff;</div><div class='add'>+		data2 += data &amp; 0xff;</div><div class='add'>+		data = data | (data2 &lt;&lt; 8);</div><div class='add'>+		moutdwm(ast, 0x1E6E0068, data);</div><div class='add'>+		udelay(10);</div><div class='add'>+		moutdwm(ast, 0x1E6E0064, mindwm(ast, 0x1E6E0064) | 0xC0000);</div><div class='add'>+		udelay(10);</div><div class='add'>+		data = mindwm(ast, 0x1E6E0018) &amp; 0xfffff1ff;</div><div class='add'>+		moutdwm(ast, 0x1E6E0018, data);</div><div class='add'>+		data = data | 0x200;</div><div class='add'>+		moutdwm(ast, 0x1E6E0018, data);</div><div class='add'>+		do {</div><div class='add'>+			data = mindwm(ast, 0x1E6E001C);</div><div class='add'>+		} while (!(data &amp; 0x08000000));</div><div class='add'>+</div><div class='add'>+		moutdwm(ast, 0x1E6E0034, 0x00000001);</div><div class='add'>+		moutdwm(ast, 0x1E6E000C, 0x00005C04);</div><div class='add'>+		udelay(10);</div><div class='add'>+		moutdwm(ast, 0x1E6E000C, 0x00000000);</div><div class='add'>+		moutdwm(ast, 0x1E6E0034, 0x00000000);</div><div class='add'>+		data = mindwm(ast, 0x1E6E001C);</div><div class='add'>+		data = (data &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	}</div><div class='add'>+	data = mindwm(ast, 0x1E6E0018) | 0xC00;</div><div class='add'>+	moutdwm(ast, 0x1E6E0018, data);</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1E6E0034, 0x00000001);</div><div class='add'>+	moutdwm(ast, 0x1E6E000C, 0x00000040);</div><div class='add'>+	udelay(50);</div><div class='add'>+	/* Mode Register Setting */</div><div class='add'>+	moutdwm(ast, 0x1E6E002C, param-&gt;reg_MRS | 0x100);</div><div class='add'>+	moutdwm(ast, 0x1E6E0030, param-&gt;reg_EMRS);</div><div class='add'>+	moutdwm(ast, 0x1E6E0028, 0x00000005);</div><div class='add'>+	moutdwm(ast, 0x1E6E0028, 0x00000007);</div><div class='add'>+	moutdwm(ast, 0x1E6E0028, 0x00000003);</div><div class='add'>+	moutdwm(ast, 0x1E6E0028, 0x00000001);</div><div class='add'>+	moutdwm(ast, 0x1E6E002C, param-&gt;reg_MRS);</div><div class='add'>+	moutdwm(ast, 0x1E6E000C, 0x00005C08);</div><div class='add'>+	moutdwm(ast, 0x1E6E0028, 0x00000001);</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1E6E000C, 0x7FFF5C01);</div><div class='add'>+	data = 0;</div><div class='add'>+	if (param-&gt;wodt) {</div><div class='add'>+		data = 0x300;</div><div class='add'>+	}</div><div class='add'>+	if (param-&gt;rodt) {</div><div class='add'>+		data = data | 0x3000 | ((param-&gt;reg_AC2 &amp; 0x60000) &gt;&gt; 3);</div><div class='add'>+	}</div><div class='add'>+	moutdwm(ast, 0x1E6E0034, data | 0x3);</div><div class='add'>+</div><div class='add'>+	/* Wait DQI delay lock */</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1E6E0080);</div><div class='add'>+	} while (!(data &amp; 0x40000000));</div><div class='add'>+	/* Wait DQSI delay lock */</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1E6E0020);</div><div class='add'>+	} while (!(data &amp; 0x00000800));</div><div class='add'>+	/* Calibrate the DQSI delay */</div><div class='add'>+	cbr_dll2(ast, param);</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1E6E0120, param-&gt;reg_FREQ);</div><div class='add'>+	/* ECC Memory Initialization */</div><div class='add'>+#ifdef ECC</div><div class='add'>+	moutdwm(ast, 0x1E6E007C, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0070, 0x221);</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1E6E0070);</div><div class='add'>+	} while (!(data &amp; 0x00001000));</div><div class='add'>+	moutdwm(ast, 0x1E6E0070, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0050, 0x80000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0050, 0x00000000);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void get_ddr2_info(struct ast_private *ast, struct ast2300_dram_param *param)</div><div class='add'>+{</div><div class='add'>+	u32 trap, trap_AC2, trap_MRS;</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1E6E2000, 0x1688A8A8);</div><div class='add'>+</div><div class='add'>+	/* Ger trap info */</div><div class='add'>+	trap = (mindwm(ast, 0x1E6E2070) &gt;&gt; 25) &amp; 0x3;</div><div class='add'>+	trap_AC2  = (trap &lt;&lt; 20) | (trap &lt;&lt; 16);</div><div class='add'>+	trap_AC2 += 0x00110000;</div><div class='add'>+	trap_MRS  = 0x00000040 | (trap &lt;&lt; 4);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	param-&gt;reg_MADJ       = 0x00034C4C;</div><div class='add'>+	param-&gt;reg_SADJ       = 0x00001800;</div><div class='add'>+	param-&gt;reg_DRV        = 0x000000F0;</div><div class='add'>+	param-&gt;reg_PERIOD     = param-&gt;dram_freq;</div><div class='add'>+	param-&gt;rodt           = 0;</div><div class='add'>+</div><div class='add'>+	switch (param-&gt;dram_freq) {</div><div class='add'>+	case 264:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x0130);</div><div class='add'>+		param-&gt;wodt          = 0;</div><div class='add'>+		param-&gt;reg_AC1       = 0x11101513;</div><div class='add'>+		param-&gt;reg_AC2       = 0x78117011;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x00000092;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00000842;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000000;</div><div class='add'>+		param-&gt;reg_DRV       = 0x000000F0;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000034;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x0000005A;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x00004AC0;</div><div class='add'>+		param-&gt;madj_max      = 138;</div><div class='add'>+		param-&gt;dll2_finetune_step = 3;</div><div class='add'>+		break;</div><div class='add'>+	case 336:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x0190);</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;reg_AC1       = 0x22202613;</div><div class='add'>+		param-&gt;reg_AC2       = 0xAA009016 | trap_AC2;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x000000BA;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00000A02 | trap_MRS;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000040;</div><div class='add'>+		param-&gt;reg_DRV       = 0x000000FA;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000034;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x00000074;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x00004DC0;</div><div class='add'>+		param-&gt;madj_max      = 96;</div><div class='add'>+		param-&gt;dll2_finetune_step = 3;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+	case 396:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x03F1);</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;rodt          = 0;</div><div class='add'>+		param-&gt;reg_AC1       = 0x33302714;</div><div class='add'>+		param-&gt;reg_AC2       = 0xCC00B01B | trap_AC2;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x000000E2;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00000C02 | trap_MRS;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000040;</div><div class='add'>+		param-&gt;reg_DRV       = 0x000000FA;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000034;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x00000089;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000050C0;</div><div class='add'>+		param-&gt;madj_max      = 96;</div><div class='add'>+		param-&gt;dll2_finetune_step = 4;</div><div class='add'>+</div><div class='add'>+		switch (param-&gt;dram_chipid) {</div><div class='add'>+		case AST_DRAM_512Mx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC00B016 | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+		case AST_DRAM_1Gx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC00B01B | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		case AST_DRAM_2Gx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC00B02B | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		case AST_DRAM_4Gx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC00B03F | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 408:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x01F0);</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;rodt          = 0;</div><div class='add'>+		param-&gt;reg_AC1       = 0x33302714;</div><div class='add'>+		param-&gt;reg_AC2       = 0xCC00B01B | trap_AC2;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x000000E2;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00000C02 | trap_MRS;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000040;</div><div class='add'>+		param-&gt;reg_DRV       = 0x000000FA;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000034;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x00000089;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000050C0;</div><div class='add'>+		param-&gt;madj_max      = 96;</div><div class='add'>+		param-&gt;dll2_finetune_step = 4;</div><div class='add'>+</div><div class='add'>+		switch (param-&gt;dram_chipid) {</div><div class='add'>+		case AST_DRAM_512Mx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC00B016 | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+		case AST_DRAM_1Gx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC00B01B | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		case AST_DRAM_2Gx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC00B02B | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		case AST_DRAM_4Gx16:</div><div class='add'>+			param-&gt;reg_AC2   = 0xCC00B03F | trap_AC2;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case 456:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x0230);</div><div class='add'>+		param-&gt;wodt          = 0;</div><div class='add'>+		param-&gt;reg_AC1       = 0x33302815;</div><div class='add'>+		param-&gt;reg_AC2       = 0xCD44B01E;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x000000FC;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00000E72;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000000;</div><div class='add'>+		param-&gt;reg_DRV       = 0x00000000;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000034;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x00000097;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000052C0;</div><div class='add'>+		param-&gt;madj_max      = 88;</div><div class='add'>+		param-&gt;dll2_finetune_step = 3;</div><div class='add'>+		break;</div><div class='add'>+	case 504:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x0261);</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;rodt          = 1;</div><div class='add'>+		param-&gt;reg_AC1       = 0x33302815;</div><div class='add'>+		param-&gt;reg_AC2       = 0xDE44C022;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x00000117;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00000E72;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000040;</div><div class='add'>+		param-&gt;reg_DRV       = 0x0000000A;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000045;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x000000A0;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000054C0;</div><div class='add'>+		param-&gt;madj_max      = 79;</div><div class='add'>+		param-&gt;dll2_finetune_step = 3;</div><div class='add'>+		break;</div><div class='add'>+	case 528:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x0120);</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;rodt          = 1;</div><div class='add'>+		param-&gt;reg_AC1       = 0x33302815;</div><div class='add'>+		param-&gt;reg_AC2       = 0xEF44D024;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x00000125;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00000E72;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000004;</div><div class='add'>+		param-&gt;reg_DRV       = 0x000000F9;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000045;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x000000A7;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000055C0;</div><div class='add'>+		param-&gt;madj_max      = 76;</div><div class='add'>+		param-&gt;dll2_finetune_step = 3;</div><div class='add'>+		break;</div><div class='add'>+	case 552:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x02A1);</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;rodt          = 1;</div><div class='add'>+		param-&gt;reg_AC1       = 0x43402915;</div><div class='add'>+		param-&gt;reg_AC2       = 0xFF44E025;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x00000132;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00000E72;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000040;</div><div class='add'>+		param-&gt;reg_DRV       = 0x0000000A;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000045;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x000000AD;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000056C0;</div><div class='add'>+		param-&gt;madj_max      = 76;</div><div class='add'>+		param-&gt;dll2_finetune_step = 3;</div><div class='add'>+		break;</div><div class='add'>+	case 576:</div><div class='add'>+		moutdwm(ast, 0x1E6E2020, 0x0140);</div><div class='add'>+		param-&gt;wodt          = 1;</div><div class='add'>+		param-&gt;rodt          = 1;</div><div class='add'>+		param-&gt;reg_AC1       = 0x43402915;</div><div class='add'>+		param-&gt;reg_AC2       = 0xFF44E027;</div><div class='add'>+		param-&gt;reg_DQSIC     = 0x0000013F;</div><div class='add'>+		param-&gt;reg_MRS       = 0x00000E72;</div><div class='add'>+		param-&gt;reg_EMRS      = 0x00000004;</div><div class='add'>+		param-&gt;reg_DRV       = 0x000000F5;</div><div class='add'>+		param-&gt;reg_IOZ       = 0x00000045;</div><div class='add'>+		param-&gt;reg_DQIDLY    = 0x000000B3;</div><div class='add'>+		param-&gt;reg_FREQ      = 0x000057C0;</div><div class='add'>+		param-&gt;madj_max      = 76;</div><div class='add'>+		param-&gt;dll2_finetune_step = 3;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (param-&gt;dram_chipid) {</div><div class='add'>+	case AST_DRAM_512Mx16:</div><div class='add'>+		param-&gt;dram_config = 0x100;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+	case AST_DRAM_1Gx16:</div><div class='add'>+		param-&gt;dram_config = 0x121;</div><div class='add'>+		break;</div><div class='add'>+	case AST_DRAM_2Gx16:</div><div class='add'>+		param-&gt;dram_config = 0x122;</div><div class='add'>+		break;</div><div class='add'>+	case AST_DRAM_4Gx16:</div><div class='add'>+		param-&gt;dram_config = 0x123;</div><div class='add'>+		break;</div><div class='add'>+	}; /* switch size */</div><div class='add'>+</div><div class='add'>+	switch (param-&gt;vram_size) {</div><div class='add'>+	default:</div><div class='add'>+	case AST_VIDMEM_SIZE_8M:</div><div class='add'>+		param-&gt;dram_config |= 0x00;</div><div class='add'>+		break;</div><div class='add'>+	case AST_VIDMEM_SIZE_16M:</div><div class='add'>+		param-&gt;dram_config |= 0x04;</div><div class='add'>+		break;</div><div class='add'>+	case AST_VIDMEM_SIZE_32M:</div><div class='add'>+		param-&gt;dram_config |= 0x08;</div><div class='add'>+		break;</div><div class='add'>+	case AST_VIDMEM_SIZE_64M:</div><div class='add'>+		param-&gt;dram_config |= 0x0c;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ddr2_init(struct ast_private *ast, struct ast2300_dram_param *param)</div><div class='add'>+{</div><div class='add'>+	u32 data, data2;</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1E6E0000, 0xFC600309);</div><div class='add'>+	moutdwm(ast, 0x1E6E0018, 0x00000100);</div><div class='add'>+	moutdwm(ast, 0x1E6E0024, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0064, param-&gt;reg_MADJ);</div><div class='add'>+	moutdwm(ast, 0x1E6E0068, param-&gt;reg_SADJ);</div><div class='add'>+	udelay(10);</div><div class='add'>+	moutdwm(ast, 0x1E6E0064, param-&gt;reg_MADJ | 0xC0000);</div><div class='add'>+	udelay(10);</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1E6E0004, param-&gt;dram_config);</div><div class='add'>+	moutdwm(ast, 0x1E6E0008, 0x90040f);</div><div class='add'>+	moutdwm(ast, 0x1E6E0010, param-&gt;reg_AC1);</div><div class='add'>+	moutdwm(ast, 0x1E6E0014, param-&gt;reg_AC2);</div><div class='add'>+	moutdwm(ast, 0x1E6E0020, param-&gt;reg_DQSIC);</div><div class='add'>+	moutdwm(ast, 0x1E6E0080, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0084, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0088, param-&gt;reg_DQIDLY);</div><div class='add'>+	moutdwm(ast, 0x1E6E0018, 0x4040A130);</div><div class='add'>+	moutdwm(ast, 0x1E6E0018, 0x20402330);</div><div class='add'>+	moutdwm(ast, 0x1E6E0038, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0040, 0xFF808000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0044, 0x88848466);</div><div class='add'>+	moutdwm(ast, 0x1E6E0048, 0x44440008);</div><div class='add'>+	moutdwm(ast, 0x1E6E004C, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0050, 0x80000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0050, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0054, 0);</div><div class='add'>+	moutdwm(ast, 0x1E6E0060, param-&gt;reg_DRV);</div><div class='add'>+	moutdwm(ast, 0x1E6E006C, param-&gt;reg_IOZ);</div><div class='add'>+	moutdwm(ast, 0x1E6E0070, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0074, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0078, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E007C, 0x00000000);</div><div class='add'>+</div><div class='add'>+	/* Wait MCLK2X lock to MCLK */</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1E6E001C);</div><div class='add'>+	} while (!(data &amp; 0x08000000));</div><div class='add'>+	moutdwm(ast, 0x1E6E0034, 0x00000001);</div><div class='add'>+	moutdwm(ast, 0x1E6E000C, 0x00005C04);</div><div class='add'>+	udelay(10);</div><div class='add'>+	moutdwm(ast, 0x1E6E000C, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0034, 0x00000000);</div><div class='add'>+	data = mindwm(ast, 0x1E6E001C);</div><div class='add'>+	data = (data &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	while ((data &amp; 0x08) || ((data &amp; 0x7) &lt; 2) || (data &lt; 4)) {</div><div class='add'>+		data2 = (mindwm(ast, 0x1E6E0064) &amp; 0xfff3ffff) + 4;</div><div class='add'>+		if ((data2 &amp; 0xff) &gt; param-&gt;madj_max) {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		moutdwm(ast, 0x1E6E0064, data2);</div><div class='add'>+		if (data2 &amp; 0x00100000) {</div><div class='add'>+			data2 = ((data2 &amp; 0xff) &gt;&gt; 3) + 3;</div><div class='add'>+		} else {</div><div class='add'>+			data2 = ((data2 &amp; 0xff) &gt;&gt; 2) + 5;</div><div class='add'>+		}</div><div class='add'>+		data = mindwm(ast, 0x1E6E0068) &amp; 0xffff00ff;</div><div class='add'>+		data2 += data &amp; 0xff;</div><div class='add'>+		data = data | (data2 &lt;&lt; 8);</div><div class='add'>+		moutdwm(ast, 0x1E6E0068, data);</div><div class='add'>+		udelay(10);</div><div class='add'>+		moutdwm(ast, 0x1E6E0064, mindwm(ast, 0x1E6E0064) | 0xC0000);</div><div class='add'>+		udelay(10);</div><div class='add'>+		data = mindwm(ast, 0x1E6E0018) &amp; 0xfffff1ff;</div><div class='add'>+		moutdwm(ast, 0x1E6E0018, data);</div><div class='add'>+		data = data | 0x200;</div><div class='add'>+		moutdwm(ast, 0x1E6E0018, data);</div><div class='add'>+		do {</div><div class='add'>+			data = mindwm(ast, 0x1E6E001C);</div><div class='add'>+		} while (!(data &amp; 0x08000000));</div><div class='add'>+</div><div class='add'>+		moutdwm(ast, 0x1E6E0034, 0x00000001);</div><div class='add'>+		moutdwm(ast, 0x1E6E000C, 0x00005C04);</div><div class='add'>+		udelay(10);</div><div class='add'>+		moutdwm(ast, 0x1E6E000C, 0x00000000);</div><div class='add'>+		moutdwm(ast, 0x1E6E0034, 0x00000000);</div><div class='add'>+		data = mindwm(ast, 0x1E6E001C);</div><div class='add'>+		data = (data &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	}</div><div class='add'>+	data = mindwm(ast, 0x1E6E0018) | 0xC00;</div><div class='add'>+	moutdwm(ast, 0x1E6E0018, data);</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1E6E0034, 0x00000001);</div><div class='add'>+	moutdwm(ast, 0x1E6E000C, 0x00000000);</div><div class='add'>+	udelay(50);</div><div class='add'>+	/* Mode Register Setting */</div><div class='add'>+	moutdwm(ast, 0x1E6E002C, param-&gt;reg_MRS | 0x100);</div><div class='add'>+	moutdwm(ast, 0x1E6E0030, param-&gt;reg_EMRS);</div><div class='add'>+	moutdwm(ast, 0x1E6E0028, 0x00000005);</div><div class='add'>+	moutdwm(ast, 0x1E6E0028, 0x00000007);</div><div class='add'>+	moutdwm(ast, 0x1E6E0028, 0x00000003);</div><div class='add'>+	moutdwm(ast, 0x1E6E0028, 0x00000001);</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1E6E000C, 0x00005C08);</div><div class='add'>+	moutdwm(ast, 0x1E6E002C, param-&gt;reg_MRS);</div><div class='add'>+	moutdwm(ast, 0x1E6E0028, 0x00000001);</div><div class='add'>+	moutdwm(ast, 0x1E6E0030, param-&gt;reg_EMRS | 0x380);</div><div class='add'>+	moutdwm(ast, 0x1E6E0028, 0x00000003);</div><div class='add'>+	moutdwm(ast, 0x1E6E0030, param-&gt;reg_EMRS);</div><div class='add'>+	moutdwm(ast, 0x1E6E0028, 0x00000003);</div><div class='add'>+</div><div class='add'>+	moutdwm(ast, 0x1E6E000C, 0x7FFF5C01);</div><div class='add'>+	data = 0;</div><div class='add'>+	if (param-&gt;wodt) {</div><div class='add'>+		data = 0x500;</div><div class='add'>+	}</div><div class='add'>+	if (param-&gt;rodt) {</div><div class='add'>+		data = data | 0x3000 | ((param-&gt;reg_AC2 &amp; 0x60000) &gt;&gt; 3);</div><div class='add'>+	}</div><div class='add'>+	moutdwm(ast, 0x1E6E0034, data | 0x3);</div><div class='add'>+	moutdwm(ast, 0x1E6E0120, param-&gt;reg_FREQ);</div><div class='add'>+</div><div class='add'>+	/* Wait DQI delay lock */</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1E6E0080);</div><div class='add'>+	} while (!(data &amp; 0x40000000));</div><div class='add'>+	/* Wait DQSI delay lock */</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1E6E0020);</div><div class='add'>+	} while (!(data &amp; 0x00000800));</div><div class='add'>+	/* Calibrate the DQSI delay */</div><div class='add'>+	cbr_dll2(ast, param);</div><div class='add'>+</div><div class='add'>+	/* ECC Memory Initialization */</div><div class='add'>+#ifdef ECC</div><div class='add'>+	moutdwm(ast, 0x1E6E007C, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0070, 0x221);</div><div class='add'>+	do {</div><div class='add'>+		data = mindwm(ast, 0x1E6E0070);</div><div class='add'>+	} while (!(data &amp; 0x00001000));</div><div class='add'>+	moutdwm(ast, 0x1E6E0070, 0x00000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0050, 0x80000000);</div><div class='add'>+	moutdwm(ast, 0x1E6E0050, 0x00000000);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_init_dram_2300(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	struct ast2300_dram_param param;</div><div class='add'>+	u32 temp;</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);</div><div class='add'>+	if ((reg &amp; 0x80) == 0) {/* vga only */</div><div class='add'>+		ast_write32(ast, 0xf004, 0x1e6e0000);</div><div class='add'>+		ast_write32(ast, 0xf000, 0x1);</div><div class='add'>+		ast_write32(ast, 0x12000, 0x1688a8a8);</div><div class='add'>+		do {</div><div class='add'>+			;</div><div class='add'>+		} while (ast_read32(ast, 0x12000) != 0x1);</div><div class='add'>+</div><div class='add'>+		ast_write32(ast, 0x10000, 0xfc600309);</div><div class='add'>+		do {</div><div class='add'>+			;</div><div class='add'>+		} while (ast_read32(ast, 0x10000) != 0x1);</div><div class='add'>+</div><div class='add'>+		/* Slow down CPU/AHB CLK in VGA only mode */</div><div class='add'>+		temp = ast_read32(ast, 0x12008);</div><div class='add'>+		temp |= 0x73;</div><div class='add'>+		ast_write32(ast, 0x12008, temp);</div><div class='add'>+</div><div class='add'>+		param.dram_type = AST_DDR3;</div><div class='add'>+		if (temp &amp; 0x01000000)</div><div class='add'>+			param.dram_type = AST_DDR2;</div><div class='add'>+		param.dram_chipid = ast-&gt;dram_type;</div><div class='add'>+		param.dram_freq = ast-&gt;mclk;</div><div class='add'>+		param.vram_size = ast-&gt;vram_size;</div><div class='add'>+</div><div class='add'>+		if (param.dram_type == AST_DDR3) {</div><div class='add'>+			get_ddr3_info(ast, &amp;param);</div><div class='add'>+			ddr3_init(ast, &amp;param);</div><div class='add'>+		} else {</div><div class='add'>+			get_ddr2_info(ast, &amp;param);</div><div class='add'>+			ddr2_init(ast, &amp;param);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		temp = mindwm(ast, 0x1e6e2040);</div><div class='add'>+		moutdwm(ast, 0x1e6e2040, temp | 0x40);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* wait ready */</div><div class='add'>+	do {</div><div class='add'>+		reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);</div><div class='add'>+	} while ((reg &amp; 0x40) == 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_tables.h b/drivers/gpu/drm/ast/ast_tables.h<br/>new file mode 100644<br/>index 000000000000..95fa6aba26bc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/ast/ast_tables.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_tables.h</a></div><div class='hunk'>@@ -0,0 +1,265 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2005 ASPEED Technology Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, distribute, and sell this software and its</div><div class='add'>+ * documentation for any purpose is hereby granted without fee, provided that</div><div class='add'>+ * the above copyright notice appear in all copies and that both that</div><div class='add'>+ * copyright notice and this permission notice appear in supporting</div><div class='add'>+ * documentation, and that the name of the authors not be used in</div><div class='add'>+ * advertising or publicity pertaining to distribution of the software without</div><div class='add'>+ * specific, written prior permission.  The authors makes no representations</div><div class='add'>+ * about the suitability of this software for any purpose.  It is provided</div><div class='add'>+ * "as is" without express or implied warranty.</div><div class='add'>+ *</div><div class='add'>+ * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,</div><div class='add'>+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO</div><div class='add'>+ * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR</div><div class='add'>+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,</div><div class='add'>+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER</div><div class='add'>+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR</div><div class='add'>+ * PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+/* Ported from xf86-video-ast driver */</div><div class='add'>+</div><div class='add'>+#ifndef AST_TABLES_H</div><div class='add'>+#define AST_TABLES_H</div><div class='add'>+</div><div class='add'>+/* Std. Table Index Definition */</div><div class='add'>+#define TextModeIndex		0</div><div class='add'>+#define EGAModeIndex		1</div><div class='add'>+#define VGAModeIndex		2</div><div class='add'>+#define HiCModeIndex		3</div><div class='add'>+#define TrueCModeIndex		4</div><div class='add'>+</div><div class='add'>+#define Charx8Dot               0x00000001</div><div class='add'>+#define HalfDCLK                0x00000002</div><div class='add'>+#define DoubleScanMode          0x00000004</div><div class='add'>+#define LineCompareOff          0x00000008</div><div class='add'>+#define SyncPP                  0x00000000</div><div class='add'>+#define SyncPN                  0x00000040</div><div class='add'>+#define SyncNP                  0x00000080</div><div class='add'>+#define SyncNN                  0x000000C0</div><div class='add'>+#define HBorder                 0x00000020</div><div class='add'>+#define VBorder                 0x00000010</div><div class='add'>+#define WideScreenMode		0x00000100</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* DCLK Index */</div><div class='add'>+#define VCLK25_175     		0x00</div><div class='add'>+#define VCLK28_322     		0x01</div><div class='add'>+#define VCLK31_5       		0x02</div><div class='add'>+#define VCLK36         		0x03</div><div class='add'>+#define VCLK40         		0x04</div><div class='add'>+#define VCLK49_5       		0x05</div><div class='add'>+#define VCLK50         		0x06</div><div class='add'>+#define VCLK56_25      		0x07</div><div class='add'>+#define VCLK65		 	0x08</div><div class='add'>+#define VCLK75	        	0x09</div><div class='add'>+#define VCLK78_75      		0x0A</div><div class='add'>+#define VCLK94_5       		0x0B</div><div class='add'>+#define VCLK108        		0x0C</div><div class='add'>+#define VCLK135        		0x0D</div><div class='add'>+#define VCLK157_5      		0x0E</div><div class='add'>+#define VCLK162        		0x0F</div><div class='add'>+/* #define VCLK193_25     		0x10 */</div><div class='add'>+#define VCLK154     		0x10</div><div class='add'>+#define VCLK83_5    		0x11</div><div class='add'>+#define VCLK106_5   		0x12</div><div class='add'>+#define VCLK146_25  		0x13</div><div class='add'>+#define VCLK148_5   		0x14</div><div class='add'>+</div><div class='add'>+static struct ast_vbios_dclk_info dclk_table[] = {</div><div class='add'>+	{0x2C, 0xE7, 0x03},					/* 00: VCLK25_175	*/</div><div class='add'>+	{0x95, 0x62, 0x03},				        /* 01: VCLK28_322	*/</div><div class='add'>+	{0x67, 0x63, 0x01},				        /* 02: VCLK31_5         */</div><div class='add'>+	{0x76, 0x63, 0x01},				        /* 03: VCLK36         	*/</div><div class='add'>+	{0xEE, 0x67, 0x01},				        /* 04: VCLK40          	*/</div><div class='add'>+	{0x82, 0x62, 0x01}, 			        /* 05: VCLK49_5        	*/</div><div class='add'>+	{0xC6, 0x64, 0x01},                        	        /* 06: VCLK50          	*/</div><div class='add'>+	{0x94, 0x62, 0x01},                        	        /* 07: VCLK56_25       	*/</div><div class='add'>+	{0x80, 0x64, 0x00},                        	        /* 08: VCLK65		*/</div><div class='add'>+	{0x7B, 0x63, 0x00},                        	        /* 09: VCLK75	        */</div><div class='add'>+	{0x67, 0x62, 0x00},				        /* 0A: VCLK78_75       	*/</div><div class='add'>+	{0x7C, 0x62, 0x00},                        	        /* 0B: VCLK94_5        	*/</div><div class='add'>+	{0x8E, 0x62, 0x00},                        	        /* 0C: VCLK108         	*/</div><div class='add'>+	{0x85, 0x24, 0x00},                        	        /* 0D: VCLK135         	*/</div><div class='add'>+	{0x67, 0x22, 0x00},                        	        /* 0E: VCLK157_5       	*/</div><div class='add'>+	{0x6A, 0x22, 0x00},				        /* 0F: VCLK162         	*/</div><div class='add'>+	{0x4d, 0x4c, 0x80},				        /* 10: VCLK154      	*/</div><div class='add'>+	{0xa7, 0x78, 0x80},					/* 11: VCLK83.5         */</div><div class='add'>+	{0x28, 0x49, 0x80},					/* 12: VCLK106.5        */</div><div class='add'>+	{0x37, 0x49, 0x80},					/* 13: VCLK146.25       */</div><div class='add'>+	{0x1f, 0x45, 0x80},					/* 14: VCLK148.5        */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ast_vbios_stdtable vbios_stdtable[] = {</div><div class='add'>+	/* MD_2_3_400 */</div><div class='add'>+	{</div><div class='add'>+		0x67,</div><div class='add'>+		{0x00,0x03,0x00,0x02},</div><div class='add'>+		{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,</div><div class='add'>+		 0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00,</div><div class='add'>+		 0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3,</div><div class='add'>+		 0xff},</div><div class='add'>+		{0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,</div><div class='add'>+		 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,</div><div class='add'>+		 0x0c,0x00,0x0f,0x08},</div><div class='add'>+		{0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00,</div><div class='add'>+		 0xff}</div><div class='add'>+	},</div><div class='add'>+	/* Mode12/ExtEGATable */</div><div class='add'>+	{</div><div class='add'>+		0xe3,</div><div class='add'>+		{0x01,0x0f,0x00,0x06},</div><div class='add'>+		{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,</div><div class='add'>+		 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,</div><div class='add'>+		 0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xe3,</div><div class='add'>+		 0xff},</div><div class='add'>+		{0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,</div><div class='add'>+		 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,</div><div class='add'>+		 0x01,0x00,0x0f,0x00},</div><div class='add'>+		{0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,</div><div class='add'>+		 0xff}</div><div class='add'>+	},</div><div class='add'>+	/* ExtVGATable */</div><div class='add'>+	{</div><div class='add'>+		0x2f,</div><div class='add'>+		{0x01,0x0f,0x00,0x0e},</div><div class='add'>+		{0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,</div><div class='add'>+		 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,</div><div class='add'>+		 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3,</div><div class='add'>+		 0xff},</div><div class='add'>+		{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,</div><div class='add'>+		 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,</div><div class='add'>+		 0x01,0x00,0x00,0x00},</div><div class='add'>+		{0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,</div><div class='add'>+		 0xff}</div><div class='add'>+	},</div><div class='add'>+	/* ExtHiCTable */</div><div class='add'>+	{</div><div class='add'>+		0x2f,</div><div class='add'>+		{0x01,0x0f,0x00,0x0e},</div><div class='add'>+		{0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,</div><div class='add'>+		 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,</div><div class='add'>+		 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3,</div><div class='add'>+		 0xff},</div><div class='add'>+		{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,</div><div class='add'>+		 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,</div><div class='add'>+		 0x01,0x00,0x00,0x00},</div><div class='add'>+		{0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,</div><div class='add'>+		 0xff}</div><div class='add'>+	},</div><div class='add'>+	/* ExtTrueCTable */</div><div class='add'>+	{</div><div class='add'>+		0x2f,</div><div class='add'>+		{0x01,0x0f,0x00,0x0e},</div><div class='add'>+		{0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e,</div><div class='add'>+		 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,</div><div class='add'>+		 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3,</div><div class='add'>+		 0xff},</div><div class='add'>+		{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,</div><div class='add'>+		 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,</div><div class='add'>+		 0x01,0x00,0x00,0x00},</div><div class='add'>+		{0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,</div><div class='add'>+		 0xff}</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ast_vbios_enhtable res_640x480[] = {</div><div class='add'>+	{ 800, 640, 8, 96, 525, 480, 2, 2, VCLK25_175,	/* 60Hz */</div><div class='add'>+	  (SyncNN | HBorder | VBorder | Charx8Dot), 60, 1, 0x2E },</div><div class='add'>+	{ 832, 640, 16, 40, 520, 480, 1, 3, VCLK31_5,	/* 72Hz */</div><div class='add'>+	  (SyncNN | HBorder | VBorder | Charx8Dot), 72, 2, 0x2E  },</div><div class='add'>+	{ 840, 640, 16, 64, 500, 480, 1, 3, VCLK31_5,	/* 75Hz */</div><div class='add'>+	  (SyncNN | Charx8Dot) , 75, 3, 0x2E },</div><div class='add'>+	{ 832, 640, 56, 56, 509, 480, 1, 3, VCLK36,		/* 85Hz */</div><div class='add'>+	  (SyncNN | Charx8Dot) , 85, 4, 0x2E },</div><div class='add'>+	{ 832, 640, 56, 56, 509, 480, 1, 3, VCLK36,		/* end */</div><div class='add'>+	  (SyncNN | Charx8Dot) , 0xFF, 4, 0x2E },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ast_vbios_enhtable res_800x600[] = {</div><div class='add'>+	{1024, 800, 24, 72, 625, 600, 1, 2, VCLK36,		/* 56Hz */</div><div class='add'>+	 (SyncPP | Charx8Dot), 56, 1, 0x30 },</div><div class='add'>+	{1056, 800, 40, 128, 628, 600, 1, 4, VCLK40,	/* 60Hz */</div><div class='add'>+	 (SyncPP | Charx8Dot), 60, 2, 0x30 },</div><div class='add'>+	{1040, 800, 56, 120, 666, 600, 37, 6, VCLK50,	/* 72Hz */</div><div class='add'>+	 (SyncPP | Charx8Dot), 72, 3, 0x30 },</div><div class='add'>+	{1056, 800, 16, 80, 625, 600, 1, 3, VCLK49_5,	/* 75Hz */</div><div class='add'>+	 (SyncPP | Charx8Dot), 75, 4, 0x30 },</div><div class='add'>+	{1048, 800, 32, 64, 631, 600, 1, 3, VCLK56_25,	/* 85Hz */</div><div class='add'>+	 (SyncPP | Charx8Dot), 84, 5, 0x30 },</div><div class='add'>+	{1048, 800, 32, 64, 631, 600, 1, 3, VCLK56_25,	/* end */</div><div class='add'>+	 (SyncPP | Charx8Dot), 0xFF, 5, 0x30 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static struct ast_vbios_enhtable res_1024x768[] = {</div><div class='add'>+	{1344, 1024, 24, 136, 806, 768, 3, 6, VCLK65,	/* 60Hz */</div><div class='add'>+	 (SyncNN | Charx8Dot), 60, 1, 0x31 },</div><div class='add'>+	{1328, 1024, 24, 136, 806, 768, 3, 6, VCLK75,	/* 70Hz */</div><div class='add'>+	 (SyncNN | Charx8Dot), 70, 2, 0x31 },</div><div class='add'>+	{1312, 1024, 16, 96, 800, 768, 1, 3, VCLK78_75,	/* 75Hz */</div><div class='add'>+	 (SyncPP | Charx8Dot), 75, 3, 0x31 },</div><div class='add'>+	{1376, 1024, 48, 96, 808, 768, 1, 3, VCLK94_5,	/* 85Hz */</div><div class='add'>+	 (SyncPP | Charx8Dot), 84, 4, 0x31 },</div><div class='add'>+	{1376, 1024, 48, 96, 808, 768, 1, 3, VCLK94_5,	/* end */</div><div class='add'>+	 (SyncPP | Charx8Dot), 0xFF, 4, 0x31 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ast_vbios_enhtable res_1280x1024[] = {</div><div class='add'>+	{1688, 1280, 48, 112, 1066, 1024, 1, 3, VCLK108,	/* 60Hz */</div><div class='add'>+	 (SyncPP | Charx8Dot), 60, 1, 0x32 },</div><div class='add'>+	{1688, 1280, 16, 144, 1066, 1024, 1, 3, VCLK135,	/* 75Hz */</div><div class='add'>+	 (SyncPP | Charx8Dot), 75, 2, 0x32 },</div><div class='add'>+	{1728, 1280, 64, 160, 1072, 1024, 1, 3, VCLK157_5,	/* 85Hz */</div><div class='add'>+	 (SyncPP | Charx8Dot), 85, 3, 0x32 },</div><div class='add'>+	{1728, 1280, 64, 160, 1072, 1024, 1, 3, VCLK157_5,	/* end */</div><div class='add'>+	 (SyncPP | Charx8Dot), 0xFF, 3, 0x32 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ast_vbios_enhtable res_1600x1200[] = {</div><div class='add'>+	{2160, 1600, 64, 192, 1250, 1200, 1, 3, VCLK162,	/* 60Hz */</div><div class='add'>+	 (SyncPP | Charx8Dot), 60, 1, 0x33 },</div><div class='add'>+	{2160, 1600, 64, 192, 1250, 1200, 1, 3, VCLK162,	/* end */</div><div class='add'>+	 (SyncPP | Charx8Dot), 0xFF, 1, 0x33 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ast_vbios_enhtable res_1920x1200[] = {</div><div class='add'>+	{2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154,	/* 60Hz */</div><div class='add'>+	 (SyncNP | Charx8Dot), 60, 1, 0x34 },</div><div class='add'>+	{2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154,	/* 60Hz */</div><div class='add'>+	 (SyncNP | Charx8Dot), 0xFF, 1, 0x34 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* 16:10 */</div><div class='add'>+static struct ast_vbios_enhtable res_1280x800[] = {</div><div class='add'>+	{1680, 1280, 72,128,  831,  800, 3, 6, VCLK83_5,	/* 60Hz */</div><div class='add'>+	 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode), 60, 1, 0x35 },</div><div class='add'>+	{1680, 1280, 72,128,  831,  800, 3, 6, VCLK83_5,	/* 60Hz */</div><div class='add'>+	 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode), 0xFF, 1, 0x35 },</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ast_vbios_enhtable res_1440x900[] = {</div><div class='add'>+	{1904, 1440, 80,152,  934,  900, 3, 6, VCLK106_5,	/* 60Hz */</div><div class='add'>+	 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode), 60, 1, 0x36 },</div><div class='add'>+	{1904, 1440, 80,152,  934,  900, 3, 6, VCLK106_5,	/* 60Hz */</div><div class='add'>+	 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode), 0xFF, 1, 0x36 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ast_vbios_enhtable res_1680x1050[] = {</div><div class='add'>+	{2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25,	/* 60Hz */</div><div class='add'>+	 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode), 60, 1, 0x37 },</div><div class='add'>+	{2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25,	/* 60Hz */</div><div class='add'>+	 (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode), 0xFF, 1, 0x37 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* HDTV */</div><div class='add'>+static struct ast_vbios_enhtable res_1920x1080[] = {</div><div class='add'>+	{2200, 1920, 88, 44, 1125, 1080, 4, 5, VCLK148_5,	/* 60Hz */</div><div class='add'>+	 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode), 60, 1, 0x38 },</div><div class='add'>+	{2200, 1920, 88, 44, 1125, 1080, 4, 5, VCLK148_5,	/* 60Hz */</div><div class='add'>+	 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode), 0xFF, 1, 0x38 },</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/ast/ast_ttm.c b/drivers/gpu/drm/ast/ast_ttm.c<br/>new file mode 100644<br/>index 000000000000..6cf2adea66bc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/ast/ast_ttm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ast/ast_ttm.c</a></div><div class='hunk'>@@ -0,0 +1,453 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the</div><div class='add'>+ * "Software"), to deal in the Software without restriction, including</div><div class='add'>+ * without limitation the rights to use, copy, modify, merge, publish,</div><div class='add'>+ * distribute, sub license, and/or sell copies of the Software, and to</div><div class='add'>+ * permit persons to whom the Software is furnished to do so, subject to</div><div class='add'>+ * the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,</div><div class='add'>+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR</div><div class='add'>+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE</div><div class='add'>+ * USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the</div><div class='add'>+ * next paragraph) shall be included in all copies or substantial portions</div><div class='add'>+ * of the Software.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * Authors: Dave Airlie &lt;airlied@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "ast_drv.h"</div><div class='add'>+#include &lt;ttm/ttm_page_alloc.h&gt;</div><div class='add'>+</div><div class='add'>+static inline struct ast_private *</div><div class='add'>+ast_bdev(struct ttm_bo_device *bd)</div><div class='add'>+{</div><div class='add'>+	return container_of(bd, struct ast_private, ttm.bdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ast_ttm_mem_global_init(struct drm_global_reference *ref)</div><div class='add'>+{</div><div class='add'>+	return ttm_mem_global_init(ref-&gt;object);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ast_ttm_mem_global_release(struct drm_global_reference *ref)</div><div class='add'>+{</div><div class='add'>+	ttm_mem_global_release(ref-&gt;object);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_ttm_global_init(struct ast_private *ast)</div><div class='add'>+{</div><div class='add'>+	struct drm_global_reference *global_ref;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	global_ref = &amp;ast-&gt;ttm.mem_global_ref;</div><div class='add'>+	global_ref-&gt;global_type = DRM_GLOBAL_TTM_MEM;</div><div class='add'>+	global_ref-&gt;size = sizeof(struct ttm_mem_global);</div><div class='add'>+	global_ref-&gt;init = &amp;ast_ttm_mem_global_init;</div><div class='add'>+	global_ref-&gt;release = &amp;ast_ttm_mem_global_release;</div><div class='add'>+	r = drm_global_item_ref(global_ref);</div><div class='add'>+	if (r != 0) {</div><div class='add'>+		DRM_ERROR("Failed setting up TTM memory accounting "</div><div class='add'>+			  "subsystem.\n");</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ast-&gt;ttm.bo_global_ref.mem_glob =</div><div class='add'>+		ast-&gt;ttm.mem_global_ref.object;</div><div class='add'>+	global_ref = &amp;ast-&gt;ttm.bo_global_ref.ref;</div><div class='add'>+	global_ref-&gt;global_type = DRM_GLOBAL_TTM_BO;</div><div class='add'>+	global_ref-&gt;size = sizeof(struct ttm_bo_global);</div><div class='add'>+	global_ref-&gt;init = &amp;ttm_bo_global_init;</div><div class='add'>+	global_ref-&gt;release = &amp;ttm_bo_global_release;</div><div class='add'>+	r = drm_global_item_ref(global_ref);</div><div class='add'>+	if (r != 0) {</div><div class='add'>+		DRM_ERROR("Failed setting up TTM BO subsystem.\n");</div><div class='add'>+		drm_global_item_unref(&amp;ast-&gt;ttm.mem_global_ref);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+ast_ttm_global_release(struct ast_private *ast)</div><div class='add'>+{</div><div class='add'>+	if (ast-&gt;ttm.mem_global_ref.release == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	drm_global_item_unref(&amp;ast-&gt;ttm.bo_global_ref.ref);</div><div class='add'>+	drm_global_item_unref(&amp;ast-&gt;ttm.mem_global_ref);</div><div class='add'>+	ast-&gt;ttm.mem_global_ref.release = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void ast_bo_ttm_destroy(struct ttm_buffer_object *tbo)</div><div class='add'>+{</div><div class='add'>+	struct ast_bo *bo;</div><div class='add'>+</div><div class='add'>+	bo = container_of(tbo, struct ast_bo, bo);</div><div class='add'>+</div><div class='add'>+	drm_gem_object_release(&amp;bo-&gt;gem);</div><div class='add'>+	kfree(bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool ast_ttm_bo_is_ast_bo(struct ttm_buffer_object *bo)</div><div class='add'>+{</div><div class='add'>+	if (bo-&gt;destroy == &amp;ast_bo_ttm_destroy)</div><div class='add'>+		return true;</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ast_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,</div><div class='add'>+		     struct ttm_mem_type_manager *man)</div><div class='add'>+{</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TTM_PL_SYSTEM:</div><div class='add'>+		man-&gt;flags = TTM_MEMTYPE_FLAG_MAPPABLE;</div><div class='add'>+		man-&gt;available_caching = TTM_PL_MASK_CACHING;</div><div class='add'>+		man-&gt;default_caching = TTM_PL_FLAG_CACHED;</div><div class='add'>+		break;</div><div class='add'>+	case TTM_PL_VRAM:</div><div class='add'>+		man-&gt;func = &amp;ttm_bo_manager_func;</div><div class='add'>+		man-&gt;flags = TTM_MEMTYPE_FLAG_FIXED |</div><div class='add'>+			TTM_MEMTYPE_FLAG_MAPPABLE;</div><div class='add'>+		man-&gt;available_caching = TTM_PL_FLAG_UNCACHED |</div><div class='add'>+			TTM_PL_FLAG_WC;</div><div class='add'>+		man-&gt;default_caching = TTM_PL_FLAG_WC;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ast_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)</div><div class='add'>+{</div><div class='add'>+	struct ast_bo *astbo = ast_bo(bo);</div><div class='add'>+</div><div class='add'>+	if (!ast_ttm_bo_is_ast_bo(bo))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ast_ttm_placement(astbo, TTM_PL_FLAG_SYSTEM);</div><div class='add'>+	*pl = astbo-&gt;placement;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_ttm_io_mem_reserve(struct ttm_bo_device *bdev,</div><div class='add'>+				  struct ttm_mem_reg *mem)</div><div class='add'>+{</div><div class='add'>+	struct ttm_mem_type_manager *man = &amp;bdev-&gt;man[mem-&gt;mem_type];</div><div class='add'>+	struct ast_private *ast = ast_bdev(bdev);</div><div class='add'>+</div><div class='add'>+	mem-&gt;bus.addr = NULL;</div><div class='add'>+	mem-&gt;bus.offset = 0;</div><div class='add'>+	mem-&gt;bus.size = mem-&gt;num_pages &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	mem-&gt;bus.base = 0;</div><div class='add'>+	mem-&gt;bus.is_iomem = false;</div><div class='add'>+	if (!(man-&gt;flags &amp; TTM_MEMTYPE_FLAG_MAPPABLE))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	switch (mem-&gt;mem_type) {</div><div class='add'>+	case TTM_PL_SYSTEM:</div><div class='add'>+		/* system memory */</div><div class='add'>+		return 0;</div><div class='add'>+	case TTM_PL_VRAM:</div><div class='add'>+		mem-&gt;bus.offset = mem-&gt;start &lt;&lt; PAGE_SHIFT;</div><div class='add'>+		mem-&gt;bus.base = pci_resource_start(ast-&gt;dev-&gt;pdev, 0);</div><div class='add'>+		mem-&gt;bus.is_iomem = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_bo_move(struct ttm_buffer_object *bo,</div><div class='add'>+		       bool evict, bool interruptible,</div><div class='add'>+		       bool no_wait_reserve, bool no_wait_gpu,</div><div class='add'>+		       struct ttm_mem_reg *new_mem)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+	r = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void ast_ttm_backend_destroy(struct ttm_tt *tt)</div><div class='add'>+{</div><div class='add'>+	ttm_tt_fini(tt);</div><div class='add'>+	kfree(tt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ttm_backend_func ast_tt_backend_func = {</div><div class='add'>+	.destroy = &amp;ast_ttm_backend_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct ttm_tt *ast_ttm_tt_create(struct ttm_bo_device *bdev,</div><div class='add'>+				 unsigned long size, uint32_t page_flags,</div><div class='add'>+				 struct page *dummy_read_page)</div><div class='add'>+{</div><div class='add'>+	struct ttm_tt *tt;</div><div class='add'>+</div><div class='add'>+	tt = kzalloc(sizeof(struct ttm_tt), GFP_KERNEL);</div><div class='add'>+	if (tt == NULL)</div><div class='add'>+		return NULL;</div><div class='add'>+	tt-&gt;func = &amp;ast_tt_backend_func;</div><div class='add'>+	if (ttm_tt_init(tt, bdev, size, page_flags, dummy_read_page)) {</div><div class='add'>+		kfree(tt);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	return tt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ast_ttm_tt_populate(struct ttm_tt *ttm)</div><div class='add'>+{</div><div class='add'>+	return ttm_pool_populate(ttm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ast_ttm_tt_unpopulate(struct ttm_tt *ttm)</div><div class='add'>+{</div><div class='add'>+	ttm_pool_unpopulate(ttm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ttm_bo_driver ast_bo_driver = {</div><div class='add'>+	.ttm_tt_create = ast_ttm_tt_create,</div><div class='add'>+	.ttm_tt_populate = ast_ttm_tt_populate,</div><div class='add'>+	.ttm_tt_unpopulate = ast_ttm_tt_unpopulate,</div><div class='add'>+	.init_mem_type = ast_bo_init_mem_type,</div><div class='add'>+	.evict_flags = ast_bo_evict_flags,</div><div class='add'>+	.move = ast_bo_move,</div><div class='add'>+	.verify_access = ast_bo_verify_access,</div><div class='add'>+	.io_mem_reserve = &amp;ast_ttm_io_mem_reserve,</div><div class='add'>+	.io_mem_free = &amp;ast_ttm_io_mem_free,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int ast_mm_init(struct ast_private *ast)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct drm_device *dev = ast-&gt;dev;</div><div class='add'>+	struct ttm_bo_device *bdev = &amp;ast-&gt;ttm.bdev;</div><div class='add'>+</div><div class='add'>+	ret = ast_ttm_global_init(ast);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_device_init(&amp;ast-&gt;ttm.bdev,</div><div class='add'>+				 ast-&gt;ttm.bo_global_ref.ref.object,</div><div class='add'>+				 &amp;ast_bo_driver, DRM_FILE_PAGE_OFFSET,</div><div class='add'>+				 true);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("Error initialising bo driver; %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_init_mm(bdev, TTM_PL_VRAM,</div><div class='add'>+			     ast-&gt;vram_size &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("Failed ttm VRAM init: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ast-&gt;fb_mtrr = drm_mtrr_add(pci_resource_start(dev-&gt;pdev, 0),</div><div class='add'>+				    pci_resource_len(dev-&gt;pdev, 0),</div><div class='add'>+				    DRM_MTRR_WC);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_mm_fini(struct ast_private *ast)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = ast-&gt;dev;</div><div class='add'>+	ttm_bo_device_release(&amp;ast-&gt;ttm.bdev);</div><div class='add'>+</div><div class='add'>+	ast_ttm_global_release(ast);</div><div class='add'>+</div><div class='add'>+	if (ast-&gt;fb_mtrr &gt;= 0) {</div><div class='add'>+		drm_mtrr_del(ast-&gt;fb_mtrr,</div><div class='add'>+			     pci_resource_start(dev-&gt;pdev, 0),</div><div class='add'>+			     pci_resource_len(dev-&gt;pdev, 0), DRM_MTRR_WC);</div><div class='add'>+		ast-&gt;fb_mtrr = -1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_ttm_placement(struct ast_bo *bo, int domain)</div><div class='add'>+{</div><div class='add'>+	u32 c = 0;</div><div class='add'>+	bo-&gt;placement.fpfn = 0;</div><div class='add'>+	bo-&gt;placement.lpfn = 0;</div><div class='add'>+	bo-&gt;placement.placement = bo-&gt;placements;</div><div class='add'>+	bo-&gt;placement.busy_placement = bo-&gt;placements;</div><div class='add'>+	if (domain &amp; TTM_PL_FLAG_VRAM)</div><div class='add'>+		bo-&gt;placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_VRAM;</div><div class='add'>+	if (domain &amp; TTM_PL_FLAG_SYSTEM)</div><div class='add'>+		bo-&gt;placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;</div><div class='add'>+	if (!c)</div><div class='add'>+		bo-&gt;placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;</div><div class='add'>+	bo-&gt;placement.num_placement = c;</div><div class='add'>+	bo-&gt;placement.num_busy_placement = c;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_bo_reserve(struct ast_bo *bo, bool no_wait)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_reserve(&amp;bo-&gt;bo, true, no_wait, false, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (ret != -ERESTARTSYS)</div><div class='add'>+			DRM_ERROR("reserve failed %p\n", bo);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ast_bo_unreserve(struct ast_bo *bo)</div><div class='add'>+{</div><div class='add'>+	ttm_bo_unreserve(&amp;bo-&gt;bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_bo_create(struct drm_device *dev, int size, int align,</div><div class='add'>+		  uint32_t flags, struct ast_bo **pastbo)</div><div class='add'>+{</div><div class='add'>+	struct ast_private *ast = dev-&gt;dev_private;</div><div class='add'>+	struct ast_bo *astbo;</div><div class='add'>+	size_t acc_size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	astbo = kzalloc(sizeof(struct ast_bo), GFP_KERNEL);</div><div class='add'>+	if (!astbo)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = drm_gem_object_init(dev, &amp;astbo-&gt;gem, size);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(astbo);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	astbo-&gt;gem.driver_private = NULL;</div><div class='add'>+	astbo-&gt;bo.bdev = &amp;ast-&gt;ttm.bdev;</div><div class='add'>+</div><div class='add'>+	ast_ttm_placement(astbo, TTM_PL_FLAG_VRAM | TTM_PL_FLAG_SYSTEM);</div><div class='add'>+</div><div class='add'>+	acc_size = ttm_bo_dma_acc_size(&amp;ast-&gt;ttm.bdev, size,</div><div class='add'>+				       sizeof(struct ast_bo));</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_init(&amp;ast-&gt;ttm.bdev, &amp;astbo-&gt;bo, size,</div><div class='add'>+			  ttm_bo_type_device, &amp;astbo-&gt;placement,</div><div class='add'>+			  align &gt;&gt; PAGE_SHIFT, 0, false, NULL, acc_size,</div><div class='add'>+			  NULL, ast_bo_ttm_destroy);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*pastbo = astbo;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 ast_bo_gpu_offset(struct ast_bo *bo)</div><div class='add'>+{</div><div class='add'>+	return bo-&gt;bo.offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	if (bo-&gt;pin_count) {</div><div class='add'>+		bo-&gt;pin_count++;</div><div class='add'>+		if (gpu_addr)</div><div class='add'>+			*gpu_addr = ast_bo_gpu_offset(bo);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ast_ttm_placement(bo, pl_flag);</div><div class='add'>+	for (i = 0; i &lt; bo-&gt;placement.num_placement; i++)</div><div class='add'>+		bo-&gt;placements[i] |= TTM_PL_FLAG_NO_EVICT;</div><div class='add'>+	ret = ttm_bo_validate(&amp;bo-&gt;bo, &amp;bo-&gt;placement, false, false, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	bo-&gt;pin_count = 1;</div><div class='add'>+	if (gpu_addr)</div><div class='add'>+		*gpu_addr = ast_bo_gpu_offset(bo);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_bo_unpin(struct ast_bo *bo)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+	if (!bo-&gt;pin_count) {</div><div class='add'>+		DRM_ERROR("unpin bad %p\n", bo);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	bo-&gt;pin_count--;</div><div class='add'>+	if (bo-&gt;pin_count)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bo-&gt;placement.num_placement ; i++)</div><div class='add'>+		bo-&gt;placements[i] &amp;= ~TTM_PL_FLAG_NO_EVICT;</div><div class='add'>+	ret = ttm_bo_validate(&amp;bo-&gt;bo, &amp;bo-&gt;placement, false, false, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_bo_push_sysram(struct ast_bo *bo)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+	if (!bo-&gt;pin_count) {</div><div class='add'>+		DRM_ERROR("unpin bad %p\n", bo);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	bo-&gt;pin_count--;</div><div class='add'>+	if (bo-&gt;pin_count)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (bo-&gt;kmap.virtual)</div><div class='add'>+		ttm_bo_kunmap(&amp;bo-&gt;kmap);</div><div class='add'>+</div><div class='add'>+	ast_ttm_placement(bo, TTM_PL_FLAG_SYSTEM);</div><div class='add'>+	for (i = 0; i &lt; bo-&gt;placement.num_placement ; i++)</div><div class='add'>+		bo-&gt;placements[i] |= TTM_PL_FLAG_NO_EVICT;</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_validate(&amp;bo-&gt;bo, &amp;bo-&gt;placement, false, false, false);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("pushing to VRAM failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ast_mmap(struct file *filp, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	struct drm_file *file_priv;</div><div class='add'>+	struct ast_private *ast;</div><div class='add'>+</div><div class='add'>+	if (unlikely(vma-&gt;vm_pgoff &lt; DRM_FILE_PAGE_OFFSET))</div><div class='add'>+		return drm_mmap(filp, vma);</div><div class='add'>+</div><div class='add'>+	file_priv = filp-&gt;private_data;</div><div class='add'>+	ast = file_priv-&gt;minor-&gt;dev-&gt;dev_private;</div><div class='add'>+	return ttm_bo_mmap(filp, vma, &amp;ast-&gt;ttm.bdev);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/cirrus/Kconfig b/drivers/gpu/drm/cirrus/Kconfig<br/>new file mode 100644<br/>index 000000000000..fc154dd75296<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/cirrus/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+config DRM_CIRRUS_QEMU</div><div class='add'>+	tristate "Cirrus driver for QEMU emulated device"</div><div class='add'>+	depends on DRM &amp;&amp; PCI &amp;&amp; EXPERIMENTAL</div><div class='add'>+	select FB_SYS_FILLRECT</div><div class='add'>+	select FB_SYS_COPYAREA</div><div class='add'>+	select FB_SYS_IMAGEBLIT</div><div class='add'>+	select DRM_KMS_HELPER</div><div class='add'>+	select DRM_TTM</div><div class='add'>+	help</div><div class='add'>+	 This is a KMS driver for emulated cirrus device in qemu.</div><div class='add'>+	 It is *NOT* intended for real cirrus devices. This requires</div><div class='add'>+	 the modesetting userspace X.org driver.</div><div class='head'>diff --git a/drivers/gpu/drm/cirrus/Makefile b/drivers/gpu/drm/cirrus/Makefile<br/>new file mode 100644<br/>index 000000000000..69ffe7006d55<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/cirrus/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+ccflags-y := -Iinclude/drm</div><div class='add'>+cirrus-y  := cirrus_main.o cirrus_mode.o \</div><div class='add'>+	cirrus_drv.o cirrus_fbdev.o cirrus_ttm.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_DRM_CIRRUS_QEMU) += cirrus.o</div><div class='head'>diff --git a/drivers/gpu/drm/cirrus/cirrus_drv.c b/drivers/gpu/drm/cirrus/cirrus_drv.c<br/>new file mode 100644<br/>index 000000000000..7053140c6596<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/cirrus/cirrus_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/cirrus_drv.c</a></div><div class='hunk'>@@ -0,0 +1,127 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat &lt;mjg@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License version 2. See the file COPYING in the main</div><div class='add'>+ * directory of this archive for more details.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Matthew Garrett</div><div class='add'>+ *          Dave Airlie</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/console.h&gt;</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+</div><div class='add'>+#include "cirrus_drv.h"</div><div class='add'>+</div><div class='add'>+int cirrus_modeset = -1;</div><div class='add'>+</div><div class='add'>+MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");</div><div class='add'>+module_param_named(modeset, cirrus_modeset, int, 0400);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is the generic driver code. This binds the driver to the drm core,</div><div class='add'>+ * which then performs further device association and calls our graphics init</div><div class='add'>+ * functions</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct drm_driver driver;</div><div class='add'>+</div><div class='add'>+/* only bind to the cirrus chip in qemu */</div><div class='add'>+static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {</div><div class='add'>+	{ PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5446, 0x1af4, 0x1100, 0,</div><div class='add'>+	  0, 0 },</div><div class='add'>+	{0,}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void cirrus_kick_out_firmware_fb(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct apertures_struct *ap;</div><div class='add'>+	bool primary = false;</div><div class='add'>+</div><div class='add'>+	ap = alloc_apertures(1);</div><div class='add'>+	ap-&gt;ranges[0].base = pci_resource_start(pdev, 0);</div><div class='add'>+	ap-&gt;ranges[0].size = pci_resource_len(pdev, 0);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86</div><div class='add'>+	primary = pdev-&gt;resource[PCI_ROM_RESOURCE].flags &amp; IORESOURCE_ROM_SHADOW;</div><div class='add'>+#endif</div><div class='add'>+	remove_conflicting_framebuffers(ap, "cirrusdrmfb", primary);</div><div class='add'>+	kfree(ap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit</div><div class='add'>+cirrus_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	cirrus_kick_out_firmware_fb(pdev);</div><div class='add'>+</div><div class='add'>+	return drm_get_pci_dev(pdev, ent, &amp;driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cirrus_pci_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	drm_put_dev(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations cirrus_driver_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = drm_open,</div><div class='add'>+	.release = drm_release,</div><div class='add'>+	.unlocked_ioctl = drm_ioctl,</div><div class='add'>+	.mmap = cirrus_mmap,</div><div class='add'>+	.poll = drm_poll,</div><div class='add'>+	.fasync = drm_fasync,</div><div class='add'>+};</div><div class='add'>+static struct drm_driver driver = {</div><div class='add'>+	.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_USE_MTRR,</div><div class='add'>+	.load = cirrus_driver_load,</div><div class='add'>+	.unload = cirrus_driver_unload,</div><div class='add'>+	.fops = &amp;cirrus_driver_fops,</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='add'>+	.desc = DRIVER_DESC,</div><div class='add'>+	.date = DRIVER_DATE,</div><div class='add'>+	.major = DRIVER_MAJOR,</div><div class='add'>+	.minor = DRIVER_MINOR,</div><div class='add'>+	.patchlevel = DRIVER_PATCHLEVEL,</div><div class='add'>+	.gem_init_object = cirrus_gem_init_object,</div><div class='add'>+	.gem_free_object = cirrus_gem_free_object,</div><div class='add'>+	.dumb_create = cirrus_dumb_create,</div><div class='add'>+	.dumb_map_offset = cirrus_dumb_mmap_offset,</div><div class='add'>+	.dumb_destroy = cirrus_dumb_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pci_driver cirrus_pci_driver = {</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='add'>+	.id_table = pciidlist,</div><div class='add'>+	.probe = cirrus_pci_probe,</div><div class='add'>+	.remove = cirrus_pci_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init cirrus_init(void)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_VGA_CONSOLE</div><div class='add'>+	if (vgacon_text_force() &amp;&amp; cirrus_modeset == -1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (cirrus_modeset == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return drm_pci_init(&amp;driver, &amp;cirrus_pci_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit cirrus_exit(void)</div><div class='add'>+{</div><div class='add'>+	drm_pci_exit(&amp;driver, &amp;cirrus_pci_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(cirrus_init);</div><div class='add'>+module_exit(cirrus_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(pci, pciidlist);</div><div class='add'>+MODULE_AUTHOR(DRIVER_AUTHOR);</div><div class='add'>+MODULE_DESCRIPTION(DRIVER_DESC);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/gpu/drm/cirrus/cirrus_drv.h b/drivers/gpu/drm/cirrus/cirrus_drv.h<br/>new file mode 100644<br/>index 000000000000..64ea597cb6d3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/cirrus/cirrus_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/cirrus_drv.h</a></div><div class='hunk'>@@ -0,0 +1,246 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License version 2. See the file COPYING in the main</div><div class='add'>+ * directory of this archive for more details.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Matthew Garrett</div><div class='add'>+ *          Dave Airlie</div><div class='add'>+ */</div><div class='add'>+#ifndef __CIRRUS_DRV_H__</div><div class='add'>+#define __CIRRUS_DRV_H__</div><div class='add'>+</div><div class='add'>+#include &lt;video/vga.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;drm/drm_fb_helper.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ttm/ttm_bo_api.h"</div><div class='add'>+#include "ttm/ttm_bo_driver.h"</div><div class='add'>+#include "ttm/ttm_placement.h"</div><div class='add'>+#include "ttm/ttm_memory.h"</div><div class='add'>+#include "ttm/ttm_module.h"</div><div class='add'>+</div><div class='add'>+#define DRIVER_AUTHOR		"Matthew Garrett"</div><div class='add'>+</div><div class='add'>+#define DRIVER_NAME		"cirrus"</div><div class='add'>+#define DRIVER_DESC		"qemu Cirrus emulation"</div><div class='add'>+#define DRIVER_DATE		"20110418"</div><div class='add'>+</div><div class='add'>+#define DRIVER_MAJOR		1</div><div class='add'>+#define DRIVER_MINOR		0</div><div class='add'>+#define DRIVER_PATCHLEVEL	0</div><div class='add'>+</div><div class='add'>+#define CIRRUSFB_CONN_LIMIT 1</div><div class='add'>+</div><div class='add'>+#define RREG8(reg) ioread8(((void __iomem *)cdev-&gt;rmmio) + (reg))</div><div class='add'>+#define WREG8(reg, v) iowrite8(v, ((void __iomem *)cdev-&gt;rmmio) + (reg))</div><div class='add'>+#define RREG32(reg) ioread32(((void __iomem *)cdev-&gt;rmmio) + (reg))</div><div class='add'>+#define WREG32(reg, v) iowrite32(v, ((void __iomem *)cdev-&gt;rmmio) + (reg))</div><div class='add'>+</div><div class='add'>+#define SEQ_INDEX 4</div><div class='add'>+#define SEQ_DATA 5</div><div class='add'>+</div><div class='add'>+#define WREG_SEQ(reg, v)					\</div><div class='add'>+	do {							\</div><div class='add'>+		WREG8(SEQ_INDEX, reg);				\</div><div class='add'>+		WREG8(SEQ_DATA, v);				\</div><div class='add'>+	} while (0)						\</div><div class='add'>+</div><div class='add'>+#define CRT_INDEX 0x14</div><div class='add'>+#define CRT_DATA 0x15</div><div class='add'>+</div><div class='add'>+#define WREG_CRT(reg, v)					\</div><div class='add'>+	do {							\</div><div class='add'>+		WREG8(CRT_INDEX, reg);				\</div><div class='add'>+		WREG8(CRT_DATA, v);				\</div><div class='add'>+	} while (0)						\</div><div class='add'>+</div><div class='add'>+#define GFX_INDEX 0xe</div><div class='add'>+#define GFX_DATA 0xf</div><div class='add'>+</div><div class='add'>+#define WREG_GFX(reg, v)					\</div><div class='add'>+	do {							\</div><div class='add'>+		WREG8(GFX_INDEX, reg);				\</div><div class='add'>+		WREG8(GFX_DATA, v);				\</div><div class='add'>+	} while (0)						\</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Cirrus has a "hidden" DAC register that can be accessed by writing to</div><div class='add'>+ * the pixel mask register to reset the state, then reading from the register</div><div class='add'>+ * four times. The next write will then pass to the DAC</div><div class='add'>+ */</div><div class='add'>+#define VGA_DAC_MASK 0x6</div><div class='add'>+</div><div class='add'>+#define WREG_HDR(v)						\</div><div class='add'>+	do {							\</div><div class='add'>+		RREG8(VGA_DAC_MASK);					\</div><div class='add'>+		RREG8(VGA_DAC_MASK);					\</div><div class='add'>+		RREG8(VGA_DAC_MASK);					\</div><div class='add'>+		RREG8(VGA_DAC_MASK);					\</div><div class='add'>+		WREG8(VGA_DAC_MASK, v);					\</div><div class='add'>+	} while (0)						\</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define CIRRUS_MAX_FB_HEIGHT 4096</div><div class='add'>+#define CIRRUS_MAX_FB_WIDTH 4096</div><div class='add'>+</div><div class='add'>+#define CIRRUS_DPMS_CLEARED (-1)</div><div class='add'>+</div><div class='add'>+#define to_cirrus_crtc(x) container_of(x, struct cirrus_crtc, base)</div><div class='add'>+#define to_cirrus_encoder(x) container_of(x, struct cirrus_encoder, base)</div><div class='add'>+#define to_cirrus_framebuffer(x) container_of(x, struct cirrus_framebuffer, base)</div><div class='add'>+</div><div class='add'>+struct cirrus_crtc {</div><div class='add'>+	struct drm_crtc			base;</div><div class='add'>+	u8				lut_r[256], lut_g[256], lut_b[256];</div><div class='add'>+	int				last_dpms;</div><div class='add'>+	bool				enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cirrus_fbdev;</div><div class='add'>+struct cirrus_mode_info {</div><div class='add'>+	bool				mode_config_initialized;</div><div class='add'>+	struct cirrus_crtc		*crtc;</div><div class='add'>+	/* pointer to fbdev info structure */</div><div class='add'>+	struct cirrus_fbdev		*gfbdev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cirrus_encoder {</div><div class='add'>+	struct drm_encoder		base;</div><div class='add'>+	int				last_dpms;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cirrus_connector {</div><div class='add'>+	struct drm_connector		base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cirrus_framebuffer {</div><div class='add'>+	struct drm_framebuffer		base;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cirrus_mc {</div><div class='add'>+	resource_size_t			vram_size;</div><div class='add'>+	resource_size_t			vram_base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cirrus_device {</div><div class='add'>+	struct drm_device		*dev;</div><div class='add'>+	unsigned long			flags;</div><div class='add'>+</div><div class='add'>+	resource_size_t			rmmio_base;</div><div class='add'>+	resource_size_t			rmmio_size;</div><div class='add'>+	void __iomem			*rmmio;</div><div class='add'>+</div><div class='add'>+	struct cirrus_mc			mc;</div><div class='add'>+	struct cirrus_mode_info		mode_info;</div><div class='add'>+</div><div class='add'>+	int				num_crtc;</div><div class='add'>+	int fb_mtrr;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		struct drm_global_reference mem_global_ref;</div><div class='add'>+		struct ttm_bo_global_ref bo_global_ref;</div><div class='add'>+		struct ttm_bo_device bdev;</div><div class='add'>+		atomic_t validate_sequence;</div><div class='add'>+	} ttm;</div><div class='add'>+	bool mm_inited;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct cirrus_fbdev {</div><div class='add'>+	struct drm_fb_helper helper;</div><div class='add'>+	struct cirrus_framebuffer gfb;</div><div class='add'>+	struct list_head fbdev_list;</div><div class='add'>+	void *sysram;</div><div class='add'>+	int size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cirrus_bo {</div><div class='add'>+	struct ttm_buffer_object bo;</div><div class='add'>+	struct ttm_placement placement;</div><div class='add'>+	struct ttm_bo_kmap_obj kmap;</div><div class='add'>+	struct drm_gem_object gem;</div><div class='add'>+	u32 placements[3];</div><div class='add'>+	int pin_count;</div><div class='add'>+};</div><div class='add'>+#define gem_to_cirrus_bo(gobj) container_of((gobj), struct cirrus_bo, gem)</div><div class='add'>+</div><div class='add'>+static inline struct cirrus_bo *</div><div class='add'>+cirrus_bo(struct ttm_buffer_object *bo)</div><div class='add'>+{</div><div class='add'>+	return container_of(bo, struct cirrus_bo, bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define to_cirrus_obj(x) container_of(x, struct cirrus_gem_object, base)</div><div class='add'>+#define DRM_FILE_PAGE_OFFSET (0x100000000ULL &gt;&gt; PAGE_SHIFT)</div><div class='add'>+</div><div class='add'>+				/* cirrus_mode.c */</div><div class='add'>+void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,</div><div class='add'>+			     u16 blue, int regno);</div><div class='add'>+void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,</div><div class='add'>+			     u16 *blue, int regno);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+				/* cirrus_main.c */</div><div class='add'>+int cirrus_device_init(struct cirrus_device *cdev,</div><div class='add'>+		      struct drm_device *ddev,</div><div class='add'>+		      struct pci_dev *pdev,</div><div class='add'>+		      uint32_t flags);</div><div class='add'>+void cirrus_device_fini(struct cirrus_device *cdev);</div><div class='add'>+int cirrus_gem_init_object(struct drm_gem_object *obj);</div><div class='add'>+void cirrus_gem_free_object(struct drm_gem_object *obj);</div><div class='add'>+int cirrus_dumb_mmap_offset(struct drm_file *file,</div><div class='add'>+			    struct drm_device *dev,</div><div class='add'>+			    uint32_t handle,</div><div class='add'>+			    uint64_t *offset);</div><div class='add'>+int cirrus_gem_create(struct drm_device *dev,</div><div class='add'>+		   u32 size, bool iskernel,</div><div class='add'>+		      struct drm_gem_object **obj);</div><div class='add'>+int cirrus_dumb_create(struct drm_file *file,</div><div class='add'>+		    struct drm_device *dev,</div><div class='add'>+		       struct drm_mode_create_dumb *args);</div><div class='add'>+int cirrus_dumb_destroy(struct drm_file *file,</div><div class='add'>+		     struct drm_device *dev,</div><div class='add'>+			uint32_t handle);</div><div class='add'>+</div><div class='add'>+int cirrus_framebuffer_init(struct drm_device *dev,</div><div class='add'>+			   struct cirrus_framebuffer *gfb,</div><div class='add'>+			    struct drm_mode_fb_cmd2 *mode_cmd,</div><div class='add'>+			    struct drm_gem_object *obj);</div><div class='add'>+</div><div class='add'>+				/* cirrus_display.c */</div><div class='add'>+int cirrus_modeset_init(struct cirrus_device *cdev);</div><div class='add'>+void cirrus_modeset_fini(struct cirrus_device *cdev);</div><div class='add'>+</div><div class='add'>+				/* cirrus_fbdev.c */</div><div class='add'>+int cirrus_fbdev_init(struct cirrus_device *cdev);</div><div class='add'>+void cirrus_fbdev_fini(struct cirrus_device *cdev);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+				/* cirrus_irq.c */</div><div class='add'>+void cirrus_driver_irq_preinstall(struct drm_device *dev);</div><div class='add'>+int cirrus_driver_irq_postinstall(struct drm_device *dev);</div><div class='add'>+void cirrus_driver_irq_uninstall(struct drm_device *dev);</div><div class='add'>+irqreturn_t cirrus_driver_irq_handler(DRM_IRQ_ARGS);</div><div class='add'>+</div><div class='add'>+				/* cirrus_kms.c */</div><div class='add'>+int cirrus_driver_load(struct drm_device *dev, unsigned long flags);</div><div class='add'>+int cirrus_driver_unload(struct drm_device *dev);</div><div class='add'>+extern struct drm_ioctl_desc cirrus_ioctls[];</div><div class='add'>+extern int cirrus_max_ioctl;</div><div class='add'>+</div><div class='add'>+int cirrus_mm_init(struct cirrus_device *cirrus);</div><div class='add'>+void cirrus_mm_fini(struct cirrus_device *cirrus);</div><div class='add'>+void cirrus_ttm_placement(struct cirrus_bo *bo, int domain);</div><div class='add'>+int cirrus_bo_create(struct drm_device *dev, int size, int align,</div><div class='add'>+		     uint32_t flags, struct cirrus_bo **pcirrusbo);</div><div class='add'>+int cirrus_mmap(struct file *filp, struct vm_area_struct *vma);</div><div class='add'>+int cirrus_bo_reserve(struct cirrus_bo *bo, bool no_wait);</div><div class='add'>+void cirrus_bo_unreserve(struct cirrus_bo *bo);</div><div class='add'>+int cirrus_bo_push_sysram(struct cirrus_bo *bo);</div><div class='add'>+int cirrus_bo_pin(struct cirrus_bo *bo, u32 pl_flag, u64 *gpu_addr);</div><div class='add'>+#endif				/* __CIRRUS_DRV_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/cirrus/cirrus_fbdev.c b/drivers/gpu/drm/cirrus/cirrus_fbdev.c<br/>new file mode 100644<br/>index 000000000000..9a276a536992<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/cirrus/cirrus_fbdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/cirrus_fbdev.c</a></div><div class='hunk'>@@ -0,0 +1,307 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License version 2. See the file COPYING in the main</div><div class='add'>+ * directory of this archive for more details.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Matthew Garrett</div><div class='add'>+ *          Dave Airlie</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+#include "drm_fb_helper.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/fb.h&gt;</div><div class='add'>+</div><div class='add'>+#include "cirrus_drv.h"</div><div class='add'>+</div><div class='add'>+static void cirrus_dirty_update(struct cirrus_fbdev *afbdev,</div><div class='add'>+			     int x, int y, int width, int height)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	struct cirrus_bo *bo;</div><div class='add'>+	int src_offset, dst_offset;</div><div class='add'>+	int bpp = (afbdev-&gt;gfb.base.bits_per_pixel + 7)/8;</div><div class='add'>+	int ret;</div><div class='add'>+	bool unmap = false;</div><div class='add'>+</div><div class='add'>+	obj = afbdev-&gt;gfb.obj;</div><div class='add'>+	bo = gem_to_cirrus_bo(obj);</div><div class='add'>+</div><div class='add'>+	ret = cirrus_bo_reserve(bo, true);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("failed to reserve fb bo\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!bo-&gt;kmap.virtual) {</div><div class='add'>+		ret = ttm_bo_kmap(&amp;bo-&gt;bo, 0, bo-&gt;bo.num_pages, &amp;bo-&gt;kmap);</div><div class='add'>+		if (ret) {</div><div class='add'>+			DRM_ERROR("failed to kmap fb updates\n");</div><div class='add'>+			cirrus_bo_unreserve(bo);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		unmap = true;</div><div class='add'>+	}</div><div class='add'>+	for (i = y; i &lt; y + height; i++) {</div><div class='add'>+		/* assume equal stride for now */</div><div class='add'>+		src_offset = dst_offset = i * afbdev-&gt;gfb.base.pitches[0] + (x * bpp);</div><div class='add'>+		memcpy_toio(bo-&gt;kmap.virtual + src_offset, afbdev-&gt;sysram + src_offset, width * bpp);</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+	if (unmap)</div><div class='add'>+		ttm_bo_kunmap(&amp;bo-&gt;kmap);</div><div class='add'>+</div><div class='add'>+	cirrus_bo_unreserve(bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cirrus_fillrect(struct fb_info *info,</div><div class='add'>+			 const struct fb_fillrect *rect)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_fbdev *afbdev = info-&gt;par;</div><div class='add'>+	sys_fillrect(info, rect);</div><div class='add'>+	cirrus_dirty_update(afbdev, rect-&gt;dx, rect-&gt;dy, rect-&gt;width,</div><div class='add'>+			 rect-&gt;height);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cirrus_copyarea(struct fb_info *info,</div><div class='add'>+			 const struct fb_copyarea *area)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_fbdev *afbdev = info-&gt;par;</div><div class='add'>+	sys_copyarea(info, area);</div><div class='add'>+	cirrus_dirty_update(afbdev, area-&gt;dx, area-&gt;dy, area-&gt;width,</div><div class='add'>+			 area-&gt;height);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cirrus_imageblit(struct fb_info *info,</div><div class='add'>+			  const struct fb_image *image)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_fbdev *afbdev = info-&gt;par;</div><div class='add'>+	sys_imageblit(info, image);</div><div class='add'>+	cirrus_dirty_update(afbdev, image-&gt;dx, image-&gt;dy, image-&gt;width,</div><div class='add'>+			 image-&gt;height);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static struct fb_ops cirrusfb_ops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.fb_check_var = drm_fb_helper_check_var,</div><div class='add'>+	.fb_set_par = drm_fb_helper_set_par,</div><div class='add'>+	.fb_fillrect = cirrus_fillrect,</div><div class='add'>+	.fb_copyarea = cirrus_copyarea,</div><div class='add'>+	.fb_imageblit = cirrus_imageblit,</div><div class='add'>+	.fb_pan_display = drm_fb_helper_pan_display,</div><div class='add'>+	.fb_blank = drm_fb_helper_blank,</div><div class='add'>+	.fb_setcmap = drm_fb_helper_setcmap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int cirrusfb_create_object(struct cirrus_fbdev *afbdev,</div><div class='add'>+			       struct drm_mode_fb_cmd2 *mode_cmd,</div><div class='add'>+			       struct drm_gem_object **gobj_p)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = afbdev-&gt;helper.dev;</div><div class='add'>+	u32 bpp, depth;</div><div class='add'>+	u32 size;</div><div class='add'>+	struct drm_gem_object *gobj;</div><div class='add'>+</div><div class='add'>+	int ret = 0;</div><div class='add'>+	drm_fb_get_bpp_depth(mode_cmd-&gt;pixel_format, &amp;depth, &amp;bpp);</div><div class='add'>+</div><div class='add'>+	if (bpp &gt; 24)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	size = mode_cmd-&gt;pitches[0] * mode_cmd-&gt;height;</div><div class='add'>+	ret = cirrus_gem_create(dev, size, true, &amp;gobj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*gobj_p = gobj;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cirrusfb_create(struct cirrus_fbdev *gfbdev,</div><div class='add'>+			   struct drm_fb_helper_surface_size *sizes)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = gfbdev-&gt;helper.dev;</div><div class='add'>+	struct cirrus_device *cdev = gfbdev-&gt;helper.dev-&gt;dev_private;</div><div class='add'>+	struct fb_info *info;</div><div class='add'>+	struct drm_framebuffer *fb;</div><div class='add'>+	struct drm_mode_fb_cmd2 mode_cmd;</div><div class='add'>+	struct device *device = &amp;dev-&gt;pdev-&gt;dev;</div><div class='add'>+	void *sysram;</div><div class='add'>+	struct drm_gem_object *gobj = NULL;</div><div class='add'>+	struct cirrus_bo *bo = NULL;</div><div class='add'>+	int size, ret;</div><div class='add'>+</div><div class='add'>+	mode_cmd.width = sizes-&gt;surface_width;</div><div class='add'>+	mode_cmd.height = sizes-&gt;surface_height;</div><div class='add'>+	mode_cmd.pitches[0] = mode_cmd.width * ((sizes-&gt;surface_bpp + 7) / 8);</div><div class='add'>+	mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes-&gt;surface_bpp,</div><div class='add'>+							  sizes-&gt;surface_depth);</div><div class='add'>+	size = mode_cmd.pitches[0] * mode_cmd.height;</div><div class='add'>+</div><div class='add'>+	ret = cirrusfb_create_object(gfbdev, &amp;mode_cmd, &amp;gobj);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("failed to create fbcon backing object %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bo = gem_to_cirrus_bo(gobj);</div><div class='add'>+</div><div class='add'>+	sysram = vmalloc(size);</div><div class='add'>+	if (!sysram)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	info = framebuffer_alloc(0, device);</div><div class='add'>+	if (info == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	info-&gt;par = gfbdev;</div><div class='add'>+</div><div class='add'>+	ret = cirrus_framebuffer_init(cdev-&gt;dev, &amp;gfbdev-&gt;gfb, &amp;mode_cmd, gobj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	gfbdev-&gt;sysram = sysram;</div><div class='add'>+	gfbdev-&gt;size = size;</div><div class='add'>+</div><div class='add'>+	fb = &amp;gfbdev-&gt;gfb.base;</div><div class='add'>+	if (!fb) {</div><div class='add'>+		DRM_INFO("fb is NULL\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* setup helper */</div><div class='add'>+	gfbdev-&gt;helper.fb = fb;</div><div class='add'>+	gfbdev-&gt;helper.fbdev = info;</div><div class='add'>+</div><div class='add'>+	strcpy(info-&gt;fix.id, "cirrusdrmfb");</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	info-&gt;flags = FBINFO_DEFAULT;</div><div class='add'>+	info-&gt;fbops = &amp;cirrusfb_ops;</div><div class='add'>+</div><div class='add'>+	drm_fb_helper_fill_fix(info, fb-&gt;pitches[0], fb-&gt;depth);</div><div class='add'>+	drm_fb_helper_fill_var(info, &amp;gfbdev-&gt;helper, sizes-&gt;fb_width,</div><div class='add'>+			       sizes-&gt;fb_height);</div><div class='add'>+</div><div class='add'>+	/* setup aperture base/size for vesafb takeover */</div><div class='add'>+	info-&gt;apertures = alloc_apertures(1);</div><div class='add'>+	if (!info-&gt;apertures) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_iounmap;</div><div class='add'>+	}</div><div class='add'>+	info-&gt;apertures-&gt;ranges[0].base = cdev-&gt;dev-&gt;mode_config.fb_base;</div><div class='add'>+	info-&gt;apertures-&gt;ranges[0].size = cdev-&gt;mc.vram_size;</div><div class='add'>+</div><div class='add'>+	info-&gt;screen_base = sysram;</div><div class='add'>+	info-&gt;screen_size = size;</div><div class='add'>+</div><div class='add'>+	info-&gt;fix.mmio_start = 0;</div><div class='add'>+	info-&gt;fix.mmio_len = 0;</div><div class='add'>+</div><div class='add'>+	ret = fb_alloc_cmap(&amp;info-&gt;cmap, 256, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("%s: can't allocate color map\n", info-&gt;fix.id);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_iounmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DRM_INFO("fb mappable at 0x%lX\n", info-&gt;fix.smem_start);</div><div class='add'>+	DRM_INFO("vram aper at 0x%lX\n", (unsigned long)info-&gt;fix.smem_start);</div><div class='add'>+	DRM_INFO("size %lu\n", (unsigned long)info-&gt;fix.smem_len);</div><div class='add'>+	DRM_INFO("fb depth is %d\n", fb-&gt;depth);</div><div class='add'>+	DRM_INFO("   pitch is %d\n", fb-&gt;pitches[0]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+out_iounmap:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cirrus_fb_find_or_create_single(struct drm_fb_helper *helper,</div><div class='add'>+					   struct drm_fb_helper_surface_size</div><div class='add'>+					   *sizes)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_fbdev *gfbdev = (struct cirrus_fbdev *)helper;</div><div class='add'>+	int new_fb = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!helper-&gt;fb) {</div><div class='add'>+		ret = cirrusfb_create(gfbdev, sizes);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		new_fb = 1;</div><div class='add'>+	}</div><div class='add'>+	return new_fb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cirrus_fbdev_destroy(struct drm_device *dev,</div><div class='add'>+				struct cirrus_fbdev *gfbdev)</div><div class='add'>+{</div><div class='add'>+	struct fb_info *info;</div><div class='add'>+	struct cirrus_framebuffer *gfb = &amp;gfbdev-&gt;gfb;</div><div class='add'>+</div><div class='add'>+	if (gfbdev-&gt;helper.fbdev) {</div><div class='add'>+		info = gfbdev-&gt;helper.fbdev;</div><div class='add'>+</div><div class='add'>+		unregister_framebuffer(info);</div><div class='add'>+		if (info-&gt;cmap.len)</div><div class='add'>+			fb_dealloc_cmap(&amp;info-&gt;cmap);</div><div class='add'>+		framebuffer_release(info);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (gfb-&gt;obj) {</div><div class='add'>+		drm_gem_object_unreference_unlocked(gfb-&gt;obj);</div><div class='add'>+		gfb-&gt;obj = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vfree(gfbdev-&gt;sysram);</div><div class='add'>+	drm_fb_helper_fini(&amp;gfbdev-&gt;helper);</div><div class='add'>+	drm_framebuffer_cleanup(&amp;gfb-&gt;base);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct drm_fb_helper_funcs cirrus_fb_helper_funcs = {</div><div class='add'>+	.gamma_set = cirrus_crtc_fb_gamma_set,</div><div class='add'>+	.gamma_get = cirrus_crtc_fb_gamma_get,</div><div class='add'>+	.fb_probe = cirrus_fb_find_or_create_single,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int cirrus_fbdev_init(struct cirrus_device *cdev)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_fbdev *gfbdev;</div><div class='add'>+	int ret;</div><div class='add'>+	int bpp_sel = 24;</div><div class='add'>+</div><div class='add'>+	/*bpp_sel = 8;*/</div><div class='add'>+	gfbdev = kzalloc(sizeof(struct cirrus_fbdev), GFP_KERNEL);</div><div class='add'>+	if (!gfbdev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cdev-&gt;mode_info.gfbdev = gfbdev;</div><div class='add'>+	gfbdev-&gt;helper.funcs = &amp;cirrus_fb_helper_funcs;</div><div class='add'>+</div><div class='add'>+	ret = drm_fb_helper_init(cdev-&gt;dev, &amp;gfbdev-&gt;helper,</div><div class='add'>+				 cdev-&gt;num_crtc, CIRRUSFB_CONN_LIMIT);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(gfbdev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	drm_fb_helper_single_add_all_connectors(&amp;gfbdev-&gt;helper);</div><div class='add'>+	drm_fb_helper_initial_config(&amp;gfbdev-&gt;helper, bpp_sel);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cirrus_fbdev_fini(struct cirrus_device *cdev)</div><div class='add'>+{</div><div class='add'>+	if (!cdev-&gt;mode_info.gfbdev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cirrus_fbdev_destroy(cdev-&gt;dev, cdev-&gt;mode_info.gfbdev);</div><div class='add'>+	kfree(cdev-&gt;mode_info.gfbdev);</div><div class='add'>+	cdev-&gt;mode_info.gfbdev = NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/cirrus/cirrus_main.c b/drivers/gpu/drm/cirrus/cirrus_main.c<br/>new file mode 100644<br/>index 000000000000..e3c122578417<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/cirrus/cirrus_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/cirrus_main.c</a></div><div class='hunk'>@@ -0,0 +1,335 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License version 2. See the file COPYING in the main</div><div class='add'>+ * directory of this archive for more details.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Matthew Garrett</div><div class='add'>+ *          Dave Airlie</div><div class='add'>+ */</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+#include "drm_crtc_helper.h"</div><div class='add'>+</div><div class='add'>+#include "cirrus_drv.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void cirrus_user_framebuffer_destroy(struct drm_framebuffer *fb)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_framebuffer *cirrus_fb = to_cirrus_framebuffer(fb);</div><div class='add'>+	if (cirrus_fb-&gt;obj)</div><div class='add'>+		drm_gem_object_unreference_unlocked(cirrus_fb-&gt;obj);</div><div class='add'>+	drm_framebuffer_cleanup(fb);</div><div class='add'>+	kfree(fb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cirrus_user_framebuffer_create_handle(struct drm_framebuffer *fb,</div><div class='add'>+						 struct drm_file *file_priv,</div><div class='add'>+						 unsigned int *handle)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct drm_framebuffer_funcs cirrus_fb_funcs = {</div><div class='add'>+	.destroy = cirrus_user_framebuffer_destroy,</div><div class='add'>+	.create_handle = cirrus_user_framebuffer_create_handle,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int cirrus_framebuffer_init(struct drm_device *dev,</div><div class='add'>+			    struct cirrus_framebuffer *gfb,</div><div class='add'>+			    struct drm_mode_fb_cmd2 *mode_cmd,</div><div class='add'>+			    struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = drm_framebuffer_init(dev, &amp;gfb-&gt;base, &amp;cirrus_fb_funcs);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("drm_framebuffer_init failed: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	drm_helper_mode_fill_fb_struct(&amp;gfb-&gt;base, mode_cmd);</div><div class='add'>+	gfb-&gt;obj = obj;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct drm_framebuffer *</div><div class='add'>+cirrus_user_framebuffer_create(struct drm_device *dev,</div><div class='add'>+			       struct drm_file *filp,</div><div class='add'>+			       struct drm_mode_fb_cmd2 *mode_cmd)</div><div class='add'>+{</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	struct cirrus_framebuffer *cirrus_fb;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 bpp, depth;</div><div class='add'>+</div><div class='add'>+	drm_fb_get_bpp_depth(mode_cmd-&gt;pixel_format, &amp;depth, &amp;bpp);</div><div class='add'>+	/* cirrus can't handle &gt; 24bpp framebuffers at all */</div><div class='add'>+	if (bpp &gt; 24)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	obj = drm_gem_object_lookup(dev, filp, mode_cmd-&gt;handles[0]);</div><div class='add'>+	if (obj == NULL)</div><div class='add'>+		return ERR_PTR(-ENOENT);</div><div class='add'>+</div><div class='add'>+	cirrus_fb = kzalloc(sizeof(*cirrus_fb), GFP_KERNEL);</div><div class='add'>+	if (!cirrus_fb) {</div><div class='add'>+		drm_gem_object_unreference_unlocked(obj);</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = cirrus_framebuffer_init(dev, cirrus_fb, mode_cmd, obj);</div><div class='add'>+	if (ret) {</div><div class='add'>+		drm_gem_object_unreference_unlocked(obj);</div><div class='add'>+		kfree(cirrus_fb);</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+	}</div><div class='add'>+	return &amp;cirrus_fb-&gt;base;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct drm_mode_config_funcs cirrus_mode_funcs = {</div><div class='add'>+	.fb_create = cirrus_user_framebuffer_create,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Unmap the framebuffer from the core and release the memory */</div><div class='add'>+static void cirrus_vram_fini(struct cirrus_device *cdev)</div><div class='add'>+{</div><div class='add'>+	iounmap(cdev-&gt;rmmio);</div><div class='add'>+	cdev-&gt;rmmio = NULL;</div><div class='add'>+	if (cdev-&gt;mc.vram_base)</div><div class='add'>+		release_mem_region(cdev-&gt;mc.vram_base, cdev-&gt;mc.vram_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Map the framebuffer from the card and configure the core */</div><div class='add'>+static int cirrus_vram_init(struct cirrus_device *cdev)</div><div class='add'>+{</div><div class='add'>+	/* BAR 0 is VRAM */</div><div class='add'>+	cdev-&gt;mc.vram_base = pci_resource_start(cdev-&gt;dev-&gt;pdev, 0);</div><div class='add'>+	/* We have 4MB of VRAM */</div><div class='add'>+	cdev-&gt;mc.vram_size = 4 * 1024 * 1024;</div><div class='add'>+</div><div class='add'>+	if (!request_mem_region(cdev-&gt;mc.vram_base, cdev-&gt;mc.vram_size,</div><div class='add'>+				"cirrusdrmfb_vram")) {</div><div class='add'>+		DRM_ERROR("can't reserve VRAM\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Our emulated hardware has two sets of memory. One is video RAM and can</div><div class='add'>+ * simply be used as a linear framebuffer - the other provides mmio access</div><div class='add'>+ * to the display registers. The latter can also be accessed via IO port</div><div class='add'>+ * access, but we map the range and use mmio to program them instead</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int cirrus_device_init(struct cirrus_device *cdev,</div><div class='add'>+		       struct drm_device *ddev,</div><div class='add'>+		       struct pci_dev *pdev, uint32_t flags)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cdev-&gt;dev = ddev;</div><div class='add'>+	cdev-&gt;flags = flags;</div><div class='add'>+</div><div class='add'>+	/* Hardcode the number of CRTCs to 1 */</div><div class='add'>+	cdev-&gt;num_crtc = 1;</div><div class='add'>+</div><div class='add'>+	/* BAR 0 is the framebuffer, BAR 1 contains registers */</div><div class='add'>+	cdev-&gt;rmmio_base = pci_resource_start(cdev-&gt;dev-&gt;pdev, 1);</div><div class='add'>+	cdev-&gt;rmmio_size = pci_resource_len(cdev-&gt;dev-&gt;pdev, 1);</div><div class='add'>+</div><div class='add'>+	if (!request_mem_region(cdev-&gt;rmmio_base, cdev-&gt;rmmio_size,</div><div class='add'>+				"cirrusdrmfb_mmio")) {</div><div class='add'>+		DRM_ERROR("can't reserve mmio registers\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cdev-&gt;rmmio = ioremap(cdev-&gt;rmmio_base, cdev-&gt;rmmio_size);</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;rmmio == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = cirrus_vram_init(cdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		release_mem_region(cdev-&gt;rmmio_base, cdev-&gt;rmmio_size);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cirrus_device_fini(struct cirrus_device *cdev)</div><div class='add'>+{</div><div class='add'>+	release_mem_region(cdev-&gt;rmmio_base, cdev-&gt;rmmio_size);</div><div class='add'>+	cirrus_vram_fini(cdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Functions here will be called by the core once it's bound the driver to</div><div class='add'>+ * a PCI device</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int cirrus_driver_load(struct drm_device *dev, unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_device *cdev;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	cdev = kzalloc(sizeof(struct cirrus_device), GFP_KERNEL);</div><div class='add'>+	if (cdev == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	dev-&gt;dev_private = (void *)cdev;</div><div class='add'>+</div><div class='add'>+	r = cirrus_device_init(cdev, dev, dev-&gt;pdev, flags);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(&amp;dev-&gt;pdev-&gt;dev, "Fatal error during GPU init: %d\n", r);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = cirrus_mm_init(cdev);</div><div class='add'>+	if (r)</div><div class='add'>+		dev_err(&amp;dev-&gt;pdev-&gt;dev, "fatal err on mm init\n");</div><div class='add'>+</div><div class='add'>+	r = cirrus_modeset_init(cdev);</div><div class='add'>+	if (r)</div><div class='add'>+		dev_err(&amp;dev-&gt;pdev-&gt;dev, "Fatal error during modeset init: %d\n", r);</div><div class='add'>+</div><div class='add'>+	dev-&gt;mode_config.funcs = (void *)&amp;cirrus_mode_funcs;</div><div class='add'>+out:</div><div class='add'>+	if (r)</div><div class='add'>+		cirrus_driver_unload(dev);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cirrus_driver_unload(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_device *cdev = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (cdev == NULL)</div><div class='add'>+		return 0;</div><div class='add'>+	cirrus_modeset_fini(cdev);</div><div class='add'>+	cirrus_mm_fini(cdev);</div><div class='add'>+	cirrus_device_fini(cdev);</div><div class='add'>+	kfree(cdev);</div><div class='add'>+	dev-&gt;dev_private = NULL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cirrus_gem_create(struct drm_device *dev,</div><div class='add'>+		   u32 size, bool iskernel,</div><div class='add'>+		   struct drm_gem_object **obj)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_bo *cirrusbo;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*obj = NULL;</div><div class='add'>+</div><div class='add'>+	size = roundup(size, PAGE_SIZE);</div><div class='add'>+	if (size == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = cirrus_bo_create(dev, size, 0, 0, &amp;cirrusbo);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (ret != -ERESTARTSYS)</div><div class='add'>+			DRM_ERROR("failed to allocate GEM object\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	*obj = &amp;cirrusbo-&gt;gem;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cirrus_dumb_create(struct drm_file *file,</div><div class='add'>+		    struct drm_device *dev,</div><div class='add'>+		    struct drm_mode_create_dumb *args)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct drm_gem_object *gobj;</div><div class='add'>+	u32 handle;</div><div class='add'>+</div><div class='add'>+	args-&gt;pitch = args-&gt;width * ((args-&gt;bpp + 7) / 8);</div><div class='add'>+	args-&gt;size = args-&gt;pitch * args-&gt;height;</div><div class='add'>+</div><div class='add'>+	ret = cirrus_gem_create(dev, args-&gt;size, false,</div><div class='add'>+			     &amp;gobj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = drm_gem_handle_create(file, gobj, &amp;handle);</div><div class='add'>+	drm_gem_object_unreference_unlocked(gobj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	args-&gt;handle = handle;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cirrus_dumb_destroy(struct drm_file *file,</div><div class='add'>+		     struct drm_device *dev,</div><div class='add'>+		     uint32_t handle)</div><div class='add'>+{</div><div class='add'>+	return drm_gem_handle_delete(file, handle);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cirrus_gem_init_object(struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	BUG();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cirrus_bo_unref(struct cirrus_bo **bo)</div><div class='add'>+{</div><div class='add'>+	struct ttm_buffer_object *tbo;</div><div class='add'>+</div><div class='add'>+	if ((*bo) == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	tbo = &amp;((*bo)-&gt;bo);</div><div class='add'>+	ttm_bo_unref(&amp;tbo);</div><div class='add'>+	if (tbo == NULL)</div><div class='add'>+		*bo = NULL;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cirrus_gem_free_object(struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_bo *cirrus_bo = gem_to_cirrus_bo(obj);</div><div class='add'>+</div><div class='add'>+	if (!cirrus_bo)</div><div class='add'>+		return;</div><div class='add'>+	cirrus_bo_unref(&amp;cirrus_bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static inline u64 cirrus_bo_mmap_offset(struct cirrus_bo *bo)</div><div class='add'>+{</div><div class='add'>+	return bo-&gt;bo.addr_space_offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+cirrus_dumb_mmap_offset(struct drm_file *file,</div><div class='add'>+		     struct drm_device *dev,</div><div class='add'>+		     uint32_t handle,</div><div class='add'>+		     uint64_t *offset)</div><div class='add'>+{</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	int ret;</div><div class='add'>+	struct cirrus_bo *bo;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	obj = drm_gem_object_lookup(dev, file, handle);</div><div class='add'>+	if (obj == NULL) {</div><div class='add'>+		ret = -ENOENT;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bo = gem_to_cirrus_bo(obj);</div><div class='add'>+	*offset = cirrus_bo_mmap_offset(bo);</div><div class='add'>+</div><div class='add'>+	drm_gem_object_unreference(obj);</div><div class='add'>+	ret = 0;</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c b/drivers/gpu/drm/cirrus/cirrus_mode.c<br/>new file mode 100644<br/>index 000000000000..100f6308c509<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/cirrus/cirrus_mode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/cirrus_mode.c</a></div><div class='hunk'>@@ -0,0 +1,629 @@</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License version 2. See the file COPYING in the main</div><div class='add'>+ * directory of this archive for more details.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Matthew Garrett</div><div class='add'>+ *          Dave Airlie</div><div class='add'>+ *</div><div class='add'>+ * Portions of this code derived from cirrusfb.c:</div><div class='add'>+ * drivers/video/cirrusfb.c - driver for Cirrus Logic chipsets</div><div class='add'>+ *</div><div class='add'>+ * Copyright 1999-2001 Jeff Garzik &lt;jgarzik@pobox.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+#include "drm_crtc_helper.h"</div><div class='add'>+</div><div class='add'>+#include &lt;video/cirrus.h&gt;</div><div class='add'>+</div><div class='add'>+#include "cirrus_drv.h"</div><div class='add'>+</div><div class='add'>+#define CIRRUS_LUT_SIZE 256</div><div class='add'>+</div><div class='add'>+#define PALETTE_INDEX 0x8</div><div class='add'>+#define PALETTE_DATA 0x9</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This file contains setup code for the CRTC.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void cirrus_crtc_load_lut(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct cirrus_device *cdev = dev-&gt;dev_private;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!crtc-&gt;enabled)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; CIRRUS_LUT_SIZE; i++) {</div><div class='add'>+		/* VGA registers */</div><div class='add'>+		WREG8(PALETTE_INDEX, i);</div><div class='add'>+		WREG8(PALETTE_DATA, cirrus_crtc-&gt;lut_r[i]);</div><div class='add'>+		WREG8(PALETTE_DATA, cirrus_crtc-&gt;lut_g[i]);</div><div class='add'>+		WREG8(PALETTE_DATA, cirrus_crtc-&gt;lut_b[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The DRM core requires DPMS functions, but they make little sense in our</div><div class='add'>+ * case and so are just stubs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void cirrus_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct cirrus_device *cdev = dev-&gt;dev_private;</div><div class='add'>+	u8 sr01, gr0e;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case DRM_MODE_DPMS_ON:</div><div class='add'>+		sr01 = 0x00;</div><div class='add'>+		gr0e = 0x00;</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_DPMS_STANDBY:</div><div class='add'>+		sr01 = 0x20;</div><div class='add'>+		gr0e = 0x02;</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_DPMS_SUSPEND:</div><div class='add'>+		sr01 = 0x20;</div><div class='add'>+		gr0e = 0x04;</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_DPMS_OFF:</div><div class='add'>+		sr01 = 0x20;</div><div class='add'>+		gr0e = 0x06;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WREG8(SEQ_INDEX, 0x1);</div><div class='add'>+	sr01 |= RREG8(SEQ_DATA) &amp; ~0x20;</div><div class='add'>+	WREG_SEQ(0x1, sr01);</div><div class='add'>+</div><div class='add'>+	WREG8(GFX_INDEX, 0xe);</div><div class='add'>+	gr0e |= RREG8(GFX_DATA) &amp; ~0x06;</div><div class='add'>+	WREG_GFX(0xe, gr0e);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The core passes the desired mode to the CRTC code to see whether any</div><div class='add'>+ * CRTC-specific modifications need to be made to it. We're in a position</div><div class='add'>+ * to just pass that straight through, so this does nothing</div><div class='add'>+ */</div><div class='add'>+static bool cirrus_crtc_mode_fixup(struct drm_crtc *crtc,</div><div class='add'>+				   struct drm_display_mode *mode,</div><div class='add'>+				   struct drm_display_mode *adjusted_mode)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cirrus_set_start_address(struct drm_crtc *crtc, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_device *cdev = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	u32 addr;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	addr = offset &gt;&gt; 2;</div><div class='add'>+	WREG_CRT(0x0c, (u8)((addr &gt;&gt; 8) &amp; 0xff));</div><div class='add'>+	WREG_CRT(0x0d, (u8)(addr &amp; 0xff));</div><div class='add'>+</div><div class='add'>+	WREG8(CRT_INDEX, 0x1b);</div><div class='add'>+	tmp = RREG8(CRT_DATA);</div><div class='add'>+	tmp &amp;= 0xf2;</div><div class='add'>+	tmp |= (addr &gt;&gt; 16) &amp; 0x01;</div><div class='add'>+	tmp |= (addr &gt;&gt; 15) &amp; 0x0c;</div><div class='add'>+	WREG_CRT(0x1b, tmp);</div><div class='add'>+	WREG8(CRT_INDEX, 0x1d);</div><div class='add'>+	tmp = RREG8(CRT_DATA);</div><div class='add'>+	tmp &amp;= 0x7f;</div><div class='add'>+	tmp |= (addr &gt;&gt; 12) &amp; 0x80;</div><div class='add'>+	WREG_CRT(0x1d, tmp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* cirrus is different - we will force move buffers out of VRAM */</div><div class='add'>+static int cirrus_crtc_do_set_base(struct drm_crtc *crtc,</div><div class='add'>+				struct drm_framebuffer *fb,</div><div class='add'>+				int x, int y, int atomic)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_device *cdev = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	struct cirrus_framebuffer *cirrus_fb;</div><div class='add'>+	struct cirrus_bo *bo;</div><div class='add'>+	int ret;</div><div class='add'>+	u64 gpu_addr;</div><div class='add'>+</div><div class='add'>+	/* push the previous fb to system ram */</div><div class='add'>+	if (!atomic &amp;&amp; fb) {</div><div class='add'>+		cirrus_fb = to_cirrus_framebuffer(fb);</div><div class='add'>+		obj = cirrus_fb-&gt;obj;</div><div class='add'>+		bo = gem_to_cirrus_bo(obj);</div><div class='add'>+		ret = cirrus_bo_reserve(bo, false);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		cirrus_bo_push_sysram(bo);</div><div class='add'>+		cirrus_bo_unreserve(bo);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cirrus_fb = to_cirrus_framebuffer(crtc-&gt;fb);</div><div class='add'>+	obj = cirrus_fb-&gt;obj;</div><div class='add'>+	bo = gem_to_cirrus_bo(obj);</div><div class='add'>+</div><div class='add'>+	ret = cirrus_bo_reserve(bo, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = cirrus_bo_pin(bo, TTM_PL_FLAG_VRAM, &amp;gpu_addr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		cirrus_bo_unreserve(bo);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (&amp;cdev-&gt;mode_info.gfbdev-&gt;gfb == cirrus_fb) {</div><div class='add'>+		/* if pushing console in kmap it */</div><div class='add'>+		ret = ttm_bo_kmap(&amp;bo-&gt;bo, 0, bo-&gt;bo.num_pages, &amp;bo-&gt;kmap);</div><div class='add'>+		if (ret)</div><div class='add'>+			DRM_ERROR("failed to kmap fbcon\n");</div><div class='add'>+	}</div><div class='add'>+	cirrus_bo_unreserve(bo);</div><div class='add'>+</div><div class='add'>+	cirrus_set_start_address(crtc, (u32)gpu_addr);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cirrus_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,</div><div class='add'>+			     struct drm_framebuffer *old_fb)</div><div class='add'>+{</div><div class='add'>+	return cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The meat of this driver. The core passes us a mode and we have to program</div><div class='add'>+ * it. The modesetting here is the bare minimum required to satisfy the qemu</div><div class='add'>+ * emulation of this hardware, and running this against a real device is</div><div class='add'>+ * likely to result in an inadequately programmed mode. We've already had</div><div class='add'>+ * the opportunity to modify the mode, so whatever we receive here should</div><div class='add'>+ * be something that can be correctly programmed and displayed</div><div class='add'>+ */</div><div class='add'>+static int cirrus_crtc_mode_set(struct drm_crtc *crtc,</div><div class='add'>+				struct drm_display_mode *mode,</div><div class='add'>+				struct drm_display_mode *adjusted_mode,</div><div class='add'>+				int x, int y, struct drm_framebuffer *old_fb)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct cirrus_device *cdev = dev-&gt;dev_private;</div><div class='add'>+	int hsyncstart, hsyncend, htotal, hdispend;</div><div class='add'>+	int vtotal, vdispend;</div><div class='add'>+	int tmp;</div><div class='add'>+	int sr07 = 0, hdr = 0;</div><div class='add'>+</div><div class='add'>+	htotal = mode-&gt;htotal / 8;</div><div class='add'>+	hsyncend = mode-&gt;hsync_end / 8;</div><div class='add'>+	hsyncstart = mode-&gt;hsync_start / 8;</div><div class='add'>+	hdispend = mode-&gt;hdisplay / 8;</div><div class='add'>+</div><div class='add'>+	vtotal = mode-&gt;vtotal;</div><div class='add'>+	vdispend = mode-&gt;vdisplay;</div><div class='add'>+</div><div class='add'>+	vdispend -= 1;</div><div class='add'>+	vtotal -= 2;</div><div class='add'>+</div><div class='add'>+	htotal -= 5;</div><div class='add'>+	hdispend -= 1;</div><div class='add'>+	hsyncstart += 1;</div><div class='add'>+	hsyncend += 1;</div><div class='add'>+</div><div class='add'>+	WREG_CRT(VGA_CRTC_V_SYNC_END, 0x20);</div><div class='add'>+	WREG_CRT(VGA_CRTC_H_TOTAL, htotal);</div><div class='add'>+	WREG_CRT(VGA_CRTC_H_DISP, hdispend);</div><div class='add'>+	WREG_CRT(VGA_CRTC_H_SYNC_START, hsyncstart);</div><div class='add'>+	WREG_CRT(VGA_CRTC_H_SYNC_END, hsyncend);</div><div class='add'>+	WREG_CRT(VGA_CRTC_V_TOTAL, vtotal &amp; 0xff);</div><div class='add'>+	WREG_CRT(VGA_CRTC_V_DISP_END, vdispend &amp; 0xff);</div><div class='add'>+</div><div class='add'>+	tmp = 0x40;</div><div class='add'>+	if ((vdispend + 1) &amp; 512)</div><div class='add'>+		tmp |= 0x20;</div><div class='add'>+	WREG_CRT(VGA_CRTC_MAX_SCAN, tmp);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Overflow bits for values that don't fit in the standard registers</div><div class='add'>+	 */</div><div class='add'>+	tmp = 16;</div><div class='add'>+	if (vtotal &amp; 256)</div><div class='add'>+		tmp |= 1;</div><div class='add'>+	if (vdispend &amp; 256)</div><div class='add'>+		tmp |= 2;</div><div class='add'>+	if ((vdispend + 1) &amp; 256)</div><div class='add'>+		tmp |= 8;</div><div class='add'>+	if (vtotal &amp; 512)</div><div class='add'>+		tmp |= 32;</div><div class='add'>+	if (vdispend &amp; 512)</div><div class='add'>+		tmp |= 64;</div><div class='add'>+	WREG_CRT(VGA_CRTC_OVERFLOW, tmp);</div><div class='add'>+</div><div class='add'>+	tmp = 0;</div><div class='add'>+</div><div class='add'>+	/* More overflow bits */</div><div class='add'>+</div><div class='add'>+	if ((htotal + 5) &amp; 64)</div><div class='add'>+		tmp |= 16;</div><div class='add'>+	if ((htotal + 5) &amp; 128)</div><div class='add'>+		tmp |= 32;</div><div class='add'>+	if (vtotal &amp; 256)</div><div class='add'>+		tmp |= 64;</div><div class='add'>+	if (vtotal &amp; 512)</div><div class='add'>+		tmp |= 128;</div><div class='add'>+</div><div class='add'>+	WREG_CRT(CL_CRT1A, tmp);</div><div class='add'>+</div><div class='add'>+	/* Disable Hercules/CGA compatibility */</div><div class='add'>+	WREG_CRT(VGA_CRTC_MODE, 0x03);</div><div class='add'>+</div><div class='add'>+	WREG8(SEQ_INDEX, 0x7);</div><div class='add'>+	sr07 = RREG8(SEQ_DATA);</div><div class='add'>+	sr07 &amp;= 0xe0;</div><div class='add'>+	hdr = 0;</div><div class='add'>+	switch (crtc-&gt;fb-&gt;bits_per_pixel) {</div><div class='add'>+	case 8:</div><div class='add'>+		sr07 |= 0x11;</div><div class='add'>+		break;</div><div class='add'>+	case 16:</div><div class='add'>+		sr07 |= 0xc1;</div><div class='add'>+		hdr = 0xc0;</div><div class='add'>+		break;</div><div class='add'>+	case 24:</div><div class='add'>+		sr07 |= 0x15;</div><div class='add'>+		hdr = 0xc5;</div><div class='add'>+		break;</div><div class='add'>+	case 32:</div><div class='add'>+		sr07 |= 0x19;</div><div class='add'>+		hdr = 0xc5;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WREG_SEQ(0x7, sr07);</div><div class='add'>+</div><div class='add'>+	/* Program the pitch */</div><div class='add'>+	tmp = crtc-&gt;fb-&gt;pitches[0] / 8;</div><div class='add'>+	WREG_CRT(VGA_CRTC_OFFSET, tmp);</div><div class='add'>+</div><div class='add'>+	/* Enable extended blanking and pitch bits, and enable full memory */</div><div class='add'>+	tmp = 0x22;</div><div class='add'>+	tmp |= (crtc-&gt;fb-&gt;pitches[0] &gt;&gt; 7) &amp; 0x10;</div><div class='add'>+	tmp |= (crtc-&gt;fb-&gt;pitches[0] &gt;&gt; 6) &amp; 0x40;</div><div class='add'>+	WREG_CRT(0x1b, tmp);</div><div class='add'>+</div><div class='add'>+	/* Enable high-colour modes */</div><div class='add'>+	WREG_GFX(VGA_GFX_MODE, 0x40);</div><div class='add'>+</div><div class='add'>+	/* And set graphics mode */</div><div class='add'>+	WREG_GFX(VGA_GFX_MISC, 0x01);</div><div class='add'>+</div><div class='add'>+	WREG_HDR(hdr);</div><div class='add'>+	cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is called before a mode is programmed. A typical use might be to</div><div class='add'>+ * enable DPMS during the programming to avoid seeing intermediate stages,</div><div class='add'>+ * but that's not relevant to us</div><div class='add'>+ */</div><div class='add'>+static void cirrus_crtc_prepare(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is called after a mode is programmed. It should reverse anything done</div><div class='add'>+ * by the prepare function</div><div class='add'>+ */</div><div class='add'>+static void cirrus_crtc_commit(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The core can pass us a set of gamma values to program. We actually only</div><div class='add'>+ * use this for 8-bit mode so can't perform smooth fades on deeper modes,</div><div class='add'>+ * but it's a requirement that we provide the function</div><div class='add'>+ */</div><div class='add'>+static void cirrus_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,</div><div class='add'>+				  u16 *blue, uint32_t start, uint32_t size)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (size != CIRRUS_LUT_SIZE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; CIRRUS_LUT_SIZE; i++) {</div><div class='add'>+		cirrus_crtc-&gt;lut_r[i] = red[i];</div><div class='add'>+		cirrus_crtc-&gt;lut_g[i] = green[i];</div><div class='add'>+		cirrus_crtc-&gt;lut_b[i] = blue[i];</div><div class='add'>+	}</div><div class='add'>+	cirrus_crtc_load_lut(crtc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Simple cleanup function */</div><div class='add'>+static void cirrus_crtc_destroy(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);</div><div class='add'>+</div><div class='add'>+	drm_crtc_cleanup(crtc);</div><div class='add'>+	kfree(cirrus_crtc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* These provide the minimum set of functions required to handle a CRTC */</div><div class='add'>+static const struct drm_crtc_funcs cirrus_crtc_funcs = {</div><div class='add'>+	.gamma_set = cirrus_crtc_gamma_set,</div><div class='add'>+	.set_config = drm_crtc_helper_set_config,</div><div class='add'>+	.destroy = cirrus_crtc_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct drm_crtc_helper_funcs cirrus_helper_funcs = {</div><div class='add'>+	.dpms = cirrus_crtc_dpms,</div><div class='add'>+	.mode_fixup = cirrus_crtc_mode_fixup,</div><div class='add'>+	.mode_set = cirrus_crtc_mode_set,</div><div class='add'>+	.mode_set_base = cirrus_crtc_mode_set_base,</div><div class='add'>+	.prepare = cirrus_crtc_prepare,</div><div class='add'>+	.commit = cirrus_crtc_commit,</div><div class='add'>+	.load_lut = cirrus_crtc_load_lut,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CRTC setup */</div><div class='add'>+static void cirrus_crtc_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_device *cdev = dev-&gt;dev_private;</div><div class='add'>+	struct cirrus_crtc *cirrus_crtc;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	cirrus_crtc = kzalloc(sizeof(struct cirrus_crtc) +</div><div class='add'>+			      (CIRRUSFB_CONN_LIMIT * sizeof(struct drm_connector *)),</div><div class='add'>+			      GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (cirrus_crtc == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	drm_crtc_init(dev, &amp;cirrus_crtc-&gt;base, &amp;cirrus_crtc_funcs);</div><div class='add'>+</div><div class='add'>+	drm_mode_crtc_set_gamma_size(&amp;cirrus_crtc-&gt;base, CIRRUS_LUT_SIZE);</div><div class='add'>+	cdev-&gt;mode_info.crtc = cirrus_crtc;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; CIRRUS_LUT_SIZE; i++) {</div><div class='add'>+		cirrus_crtc-&gt;lut_r[i] = i;</div><div class='add'>+		cirrus_crtc-&gt;lut_g[i] = i;</div><div class='add'>+		cirrus_crtc-&gt;lut_b[i] = i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_crtc_helper_add(&amp;cirrus_crtc-&gt;base, &amp;cirrus_helper_funcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/** Sets the color ramps on behalf of fbcon */</div><div class='add'>+void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,</div><div class='add'>+			      u16 blue, int regno)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);</div><div class='add'>+</div><div class='add'>+	cirrus_crtc-&gt;lut_r[regno] = red;</div><div class='add'>+	cirrus_crtc-&gt;lut_g[regno] = green;</div><div class='add'>+	cirrus_crtc-&gt;lut_b[regno] = blue;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/** Gets the color ramps on behalf of fbcon */</div><div class='add'>+void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,</div><div class='add'>+			      u16 *blue, int regno)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);</div><div class='add'>+</div><div class='add'>+	*red = cirrus_crtc-&gt;lut_r[regno];</div><div class='add'>+	*green = cirrus_crtc-&gt;lut_g[regno];</div><div class='add'>+	*blue = cirrus_crtc-&gt;lut_b[regno];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static bool cirrus_encoder_mode_fixup(struct drm_encoder *encoder,</div><div class='add'>+				  struct drm_display_mode *mode,</div><div class='add'>+				  struct drm_display_mode *adjusted_mode)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cirrus_encoder_mode_set(struct drm_encoder *encoder,</div><div class='add'>+				struct drm_display_mode *mode,</div><div class='add'>+				struct drm_display_mode *adjusted_mode)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cirrus_encoder_dpms(struct drm_encoder *encoder, int state)</div><div class='add'>+{</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cirrus_encoder_prepare(struct drm_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cirrus_encoder_commit(struct drm_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cirrus_encoder_destroy(struct drm_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_encoder *cirrus_encoder = to_cirrus_encoder(encoder);</div><div class='add'>+	drm_encoder_cleanup(encoder);</div><div class='add'>+	kfree(cirrus_encoder);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct drm_encoder_helper_funcs cirrus_encoder_helper_funcs = {</div><div class='add'>+	.dpms = cirrus_encoder_dpms,</div><div class='add'>+	.mode_fixup = cirrus_encoder_mode_fixup,</div><div class='add'>+	.mode_set = cirrus_encoder_mode_set,</div><div class='add'>+	.prepare = cirrus_encoder_prepare,</div><div class='add'>+	.commit = cirrus_encoder_commit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct drm_encoder_funcs cirrus_encoder_encoder_funcs = {</div><div class='add'>+	.destroy = cirrus_encoder_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct drm_encoder *cirrus_encoder_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_encoder *encoder;</div><div class='add'>+	struct cirrus_encoder *cirrus_encoder;</div><div class='add'>+</div><div class='add'>+	cirrus_encoder = kzalloc(sizeof(struct cirrus_encoder), GFP_KERNEL);</div><div class='add'>+	if (!cirrus_encoder)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	encoder = &amp;cirrus_encoder-&gt;base;</div><div class='add'>+	encoder-&gt;possible_crtcs = 0x1;</div><div class='add'>+</div><div class='add'>+	drm_encoder_init(dev, encoder, &amp;cirrus_encoder_encoder_funcs,</div><div class='add'>+			 DRM_MODE_ENCODER_DAC);</div><div class='add'>+	drm_encoder_helper_add(encoder, &amp;cirrus_encoder_helper_funcs);</div><div class='add'>+</div><div class='add'>+	return encoder;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+int cirrus_vga_get_modes(struct drm_connector *connector)</div><div class='add'>+{</div><div class='add'>+	/* Just add a static list of modes */</div><div class='add'>+	drm_add_modes_noedid(connector, 640, 480);</div><div class='add'>+	drm_add_modes_noedid(connector, 800, 600);</div><div class='add'>+	drm_add_modes_noedid(connector, 1024, 768);</div><div class='add'>+	drm_add_modes_noedid(connector, 1280, 1024);</div><div class='add'>+</div><div class='add'>+	return 4;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cirrus_vga_mode_valid(struct drm_connector *connector,</div><div class='add'>+				 struct drm_display_mode *mode)</div><div class='add'>+{</div><div class='add'>+	/* Any mode we've added is valid */</div><div class='add'>+	return MODE_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct drm_encoder *cirrus_connector_best_encoder(struct drm_connector</div><div class='add'>+						  *connector)</div><div class='add'>+{</div><div class='add'>+	int enc_id = connector-&gt;encoder_ids[0];</div><div class='add'>+	struct drm_mode_object *obj;</div><div class='add'>+	struct drm_encoder *encoder;</div><div class='add'>+</div><div class='add'>+	/* pick the encoder ids */</div><div class='add'>+	if (enc_id) {</div><div class='add'>+		obj =</div><div class='add'>+		    drm_mode_object_find(connector-&gt;dev, enc_id,</div><div class='add'>+					 DRM_MODE_OBJECT_ENCODER);</div><div class='add'>+		if (!obj)</div><div class='add'>+			return NULL;</div><div class='add'>+		encoder = obj_to_encoder(obj);</div><div class='add'>+		return encoder;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum drm_connector_status cirrus_vga_detect(struct drm_connector</div><div class='add'>+						   *connector, bool force)</div><div class='add'>+{</div><div class='add'>+	return connector_status_connected;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cirrus_connector_destroy(struct drm_connector *connector)</div><div class='add'>+{</div><div class='add'>+	drm_connector_cleanup(connector);</div><div class='add'>+	kfree(connector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct drm_connector_helper_funcs cirrus_vga_connector_helper_funcs = {</div><div class='add'>+	.get_modes = cirrus_vga_get_modes,</div><div class='add'>+	.mode_valid = cirrus_vga_mode_valid,</div><div class='add'>+	.best_encoder = cirrus_connector_best_encoder,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct drm_connector_funcs cirrus_vga_connector_funcs = {</div><div class='add'>+	.dpms = drm_helper_connector_dpms,</div><div class='add'>+	.detect = cirrus_vga_detect,</div><div class='add'>+	.fill_modes = drm_helper_probe_single_connector_modes,</div><div class='add'>+	.destroy = cirrus_connector_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct drm_connector *cirrus_vga_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_connector *connector;</div><div class='add'>+	struct cirrus_connector *cirrus_connector;</div><div class='add'>+</div><div class='add'>+	cirrus_connector = kzalloc(sizeof(struct cirrus_connector), GFP_KERNEL);</div><div class='add'>+	if (!cirrus_connector)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	connector = &amp;cirrus_connector-&gt;base;</div><div class='add'>+</div><div class='add'>+	drm_connector_init(dev, connector,</div><div class='add'>+			   &amp;cirrus_vga_connector_funcs, DRM_MODE_CONNECTOR_VGA);</div><div class='add'>+</div><div class='add'>+	drm_connector_helper_add(connector, &amp;cirrus_vga_connector_helper_funcs);</div><div class='add'>+</div><div class='add'>+	return connector;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+int cirrus_modeset_init(struct cirrus_device *cdev)</div><div class='add'>+{</div><div class='add'>+	struct drm_encoder *encoder;</div><div class='add'>+	struct drm_connector *connector;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	drm_mode_config_init(cdev-&gt;dev);</div><div class='add'>+	cdev-&gt;mode_info.mode_config_initialized = true;</div><div class='add'>+</div><div class='add'>+	cdev-&gt;dev-&gt;mode_config.max_width = CIRRUS_MAX_FB_WIDTH;</div><div class='add'>+	cdev-&gt;dev-&gt;mode_config.max_height = CIRRUS_MAX_FB_HEIGHT;</div><div class='add'>+</div><div class='add'>+	cdev-&gt;dev-&gt;mode_config.fb_base = cdev-&gt;mc.vram_base;</div><div class='add'>+	cdev-&gt;dev-&gt;mode_config.preferred_depth = 24;</div><div class='add'>+	/* don't prefer a shadow on virt GPU */</div><div class='add'>+	cdev-&gt;dev-&gt;mode_config.prefer_shadow = 0;</div><div class='add'>+</div><div class='add'>+	cirrus_crtc_init(cdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	encoder = cirrus_encoder_init(cdev-&gt;dev);</div><div class='add'>+	if (!encoder) {</div><div class='add'>+		DRM_ERROR("cirrus_encoder_init failed\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	connector = cirrus_vga_init(cdev-&gt;dev);</div><div class='add'>+	if (!connector) {</div><div class='add'>+		DRM_ERROR("cirrus_vga_init failed\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_mode_connector_attach_encoder(connector, encoder);</div><div class='add'>+</div><div class='add'>+	ret = cirrus_fbdev_init(cdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("cirrus_fbdev_init failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cirrus_modeset_fini(struct cirrus_device *cdev)</div><div class='add'>+{</div><div class='add'>+	cirrus_fbdev_fini(cdev);</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;mode_info.mode_config_initialized) {</div><div class='add'>+		drm_mode_config_cleanup(cdev-&gt;dev);</div><div class='add'>+		cdev-&gt;mode_info.mode_config_initialized = false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/cirrus/cirrus_ttm.c b/drivers/gpu/drm/cirrus/cirrus_ttm.c<br/>new file mode 100644<br/>index 000000000000..50e170f879de<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/cirrus/cirrus_ttm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/cirrus/cirrus_ttm.c</a></div><div class='hunk'>@@ -0,0 +1,458 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the</div><div class='add'>+ * "Software"), to deal in the Software without restriction, including</div><div class='add'>+ * without limitation the rights to use, copy, modify, merge, publish,</div><div class='add'>+ * distribute, sub license, and/or sell copies of the Software, and to</div><div class='add'>+ * permit persons to whom the Software is furnished to do so, subject to</div><div class='add'>+ * the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,</div><div class='add'>+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR</div><div class='add'>+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE</div><div class='add'>+ * USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the</div><div class='add'>+ * next paragraph) shall be included in all copies or substantial portions</div><div class='add'>+ * of the Software.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * Authors: Dave Airlie &lt;airlied@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "cirrus_drv.h"</div><div class='add'>+#include &lt;ttm/ttm_page_alloc.h&gt;</div><div class='add'>+</div><div class='add'>+static inline struct cirrus_device *</div><div class='add'>+cirrus_bdev(struct ttm_bo_device *bd)</div><div class='add'>+{</div><div class='add'>+	return container_of(bd, struct cirrus_device, ttm.bdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+cirrus_ttm_mem_global_init(struct drm_global_reference *ref)</div><div class='add'>+{</div><div class='add'>+	return ttm_mem_global_init(ref-&gt;object);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+cirrus_ttm_mem_global_release(struct drm_global_reference *ref)</div><div class='add'>+{</div><div class='add'>+	ttm_mem_global_release(ref-&gt;object);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cirrus_ttm_global_init(struct cirrus_device *cirrus)</div><div class='add'>+{</div><div class='add'>+	struct drm_global_reference *global_ref;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	global_ref = &amp;cirrus-&gt;ttm.mem_global_ref;</div><div class='add'>+	global_ref-&gt;global_type = DRM_GLOBAL_TTM_MEM;</div><div class='add'>+	global_ref-&gt;size = sizeof(struct ttm_mem_global);</div><div class='add'>+	global_ref-&gt;init = &amp;cirrus_ttm_mem_global_init;</div><div class='add'>+	global_ref-&gt;release = &amp;cirrus_ttm_mem_global_release;</div><div class='add'>+	r = drm_global_item_ref(global_ref);</div><div class='add'>+	if (r != 0) {</div><div class='add'>+		DRM_ERROR("Failed setting up TTM memory accounting "</div><div class='add'>+			  "subsystem.\n");</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cirrus-&gt;ttm.bo_global_ref.mem_glob =</div><div class='add'>+		cirrus-&gt;ttm.mem_global_ref.object;</div><div class='add'>+	global_ref = &amp;cirrus-&gt;ttm.bo_global_ref.ref;</div><div class='add'>+	global_ref-&gt;global_type = DRM_GLOBAL_TTM_BO;</div><div class='add'>+	global_ref-&gt;size = sizeof(struct ttm_bo_global);</div><div class='add'>+	global_ref-&gt;init = &amp;ttm_bo_global_init;</div><div class='add'>+	global_ref-&gt;release = &amp;ttm_bo_global_release;</div><div class='add'>+	r = drm_global_item_ref(global_ref);</div><div class='add'>+	if (r != 0) {</div><div class='add'>+		DRM_ERROR("Failed setting up TTM BO subsystem.\n");</div><div class='add'>+		drm_global_item_unref(&amp;cirrus-&gt;ttm.mem_global_ref);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+cirrus_ttm_global_release(struct cirrus_device *cirrus)</div><div class='add'>+{</div><div class='add'>+	if (cirrus-&gt;ttm.mem_global_ref.release == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	drm_global_item_unref(&amp;cirrus-&gt;ttm.bo_global_ref.ref);</div><div class='add'>+	drm_global_item_unref(&amp;cirrus-&gt;ttm.mem_global_ref);</div><div class='add'>+	cirrus-&gt;ttm.mem_global_ref.release = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void cirrus_bo_ttm_destroy(struct ttm_buffer_object *tbo)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_bo *bo;</div><div class='add'>+</div><div class='add'>+	bo = container_of(tbo, struct cirrus_bo, bo);</div><div class='add'>+</div><div class='add'>+	drm_gem_object_release(&amp;bo-&gt;gem);</div><div class='add'>+	kfree(bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool cirrus_ttm_bo_is_cirrus_bo(struct ttm_buffer_object *bo)</div><div class='add'>+{</div><div class='add'>+	if (bo-&gt;destroy == &amp;cirrus_bo_ttm_destroy)</div><div class='add'>+		return true;</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+cirrus_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,</div><div class='add'>+		     struct ttm_mem_type_manager *man)</div><div class='add'>+{</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TTM_PL_SYSTEM:</div><div class='add'>+		man-&gt;flags = TTM_MEMTYPE_FLAG_MAPPABLE;</div><div class='add'>+		man-&gt;available_caching = TTM_PL_MASK_CACHING;</div><div class='add'>+		man-&gt;default_caching = TTM_PL_FLAG_CACHED;</div><div class='add'>+		break;</div><div class='add'>+	case TTM_PL_VRAM:</div><div class='add'>+		man-&gt;func = &amp;ttm_bo_manager_func;</div><div class='add'>+		man-&gt;flags = TTM_MEMTYPE_FLAG_FIXED |</div><div class='add'>+			TTM_MEMTYPE_FLAG_MAPPABLE;</div><div class='add'>+		man-&gt;available_caching = TTM_PL_FLAG_UNCACHED |</div><div class='add'>+			TTM_PL_FLAG_WC;</div><div class='add'>+		man-&gt;default_caching = TTM_PL_FLAG_WC;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+cirrus_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_bo *cirrusbo = cirrus_bo(bo);</div><div class='add'>+</div><div class='add'>+	if (!cirrus_ttm_bo_is_cirrus_bo(bo))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cirrus_ttm_placement(cirrusbo, TTM_PL_FLAG_SYSTEM);</div><div class='add'>+	*pl = cirrusbo-&gt;placement;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cirrus_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cirrus_ttm_io_mem_reserve(struct ttm_bo_device *bdev,</div><div class='add'>+				  struct ttm_mem_reg *mem)</div><div class='add'>+{</div><div class='add'>+	struct ttm_mem_type_manager *man = &amp;bdev-&gt;man[mem-&gt;mem_type];</div><div class='add'>+	struct cirrus_device *cirrus = cirrus_bdev(bdev);</div><div class='add'>+</div><div class='add'>+	mem-&gt;bus.addr = NULL;</div><div class='add'>+	mem-&gt;bus.offset = 0;</div><div class='add'>+	mem-&gt;bus.size = mem-&gt;num_pages &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	mem-&gt;bus.base = 0;</div><div class='add'>+	mem-&gt;bus.is_iomem = false;</div><div class='add'>+	if (!(man-&gt;flags &amp; TTM_MEMTYPE_FLAG_MAPPABLE))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	switch (mem-&gt;mem_type) {</div><div class='add'>+	case TTM_PL_SYSTEM:</div><div class='add'>+		/* system memory */</div><div class='add'>+		return 0;</div><div class='add'>+	case TTM_PL_VRAM:</div><div class='add'>+		mem-&gt;bus.offset = mem-&gt;start &lt;&lt; PAGE_SHIFT;</div><div class='add'>+		mem-&gt;bus.base = pci_resource_start(cirrus-&gt;dev-&gt;pdev, 0);</div><div class='add'>+		mem-&gt;bus.is_iomem = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cirrus_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cirrus_bo_move(struct ttm_buffer_object *bo,</div><div class='add'>+		       bool evict, bool interruptible,</div><div class='add'>+		       bool no_wait_reserve, bool no_wait_gpu,</div><div class='add'>+		       struct ttm_mem_reg *new_mem)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+	r = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void cirrus_ttm_backend_destroy(struct ttm_tt *tt)</div><div class='add'>+{</div><div class='add'>+	ttm_tt_fini(tt);</div><div class='add'>+	kfree(tt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ttm_backend_func cirrus_tt_backend_func = {</div><div class='add'>+	.destroy = &amp;cirrus_ttm_backend_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct ttm_tt *cirrus_ttm_tt_create(struct ttm_bo_device *bdev,</div><div class='add'>+				 unsigned long size, uint32_t page_flags,</div><div class='add'>+				 struct page *dummy_read_page)</div><div class='add'>+{</div><div class='add'>+	struct ttm_tt *tt;</div><div class='add'>+</div><div class='add'>+	tt = kzalloc(sizeof(struct ttm_tt), GFP_KERNEL);</div><div class='add'>+	if (tt == NULL)</div><div class='add'>+		return NULL;</div><div class='add'>+	tt-&gt;func = &amp;cirrus_tt_backend_func;</div><div class='add'>+	if (ttm_tt_init(tt, bdev, size, page_flags, dummy_read_page)) {</div><div class='add'>+		kfree(tt);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	return tt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cirrus_ttm_tt_populate(struct ttm_tt *ttm)</div><div class='add'>+{</div><div class='add'>+	return ttm_pool_populate(ttm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cirrus_ttm_tt_unpopulate(struct ttm_tt *ttm)</div><div class='add'>+{</div><div class='add'>+	ttm_pool_unpopulate(ttm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ttm_bo_driver cirrus_bo_driver = {</div><div class='add'>+	.ttm_tt_create = cirrus_ttm_tt_create,</div><div class='add'>+	.ttm_tt_populate = cirrus_ttm_tt_populate,</div><div class='add'>+	.ttm_tt_unpopulate = cirrus_ttm_tt_unpopulate,</div><div class='add'>+	.init_mem_type = cirrus_bo_init_mem_type,</div><div class='add'>+	.evict_flags = cirrus_bo_evict_flags,</div><div class='add'>+	.move = cirrus_bo_move,</div><div class='add'>+	.verify_access = cirrus_bo_verify_access,</div><div class='add'>+	.io_mem_reserve = &amp;cirrus_ttm_io_mem_reserve,</div><div class='add'>+	.io_mem_free = &amp;cirrus_ttm_io_mem_free,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int cirrus_mm_init(struct cirrus_device *cirrus)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct drm_device *dev = cirrus-&gt;dev;</div><div class='add'>+	struct ttm_bo_device *bdev = &amp;cirrus-&gt;ttm.bdev;</div><div class='add'>+</div><div class='add'>+	ret = cirrus_ttm_global_init(cirrus);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_device_init(&amp;cirrus-&gt;ttm.bdev,</div><div class='add'>+				 cirrus-&gt;ttm.bo_global_ref.ref.object,</div><div class='add'>+				 &amp;cirrus_bo_driver, DRM_FILE_PAGE_OFFSET,</div><div class='add'>+				 true);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("Error initialising bo driver; %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_init_mm(bdev, TTM_PL_VRAM,</div><div class='add'>+			     cirrus-&gt;mc.vram_size &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("Failed ttm VRAM init: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cirrus-&gt;fb_mtrr = drm_mtrr_add(pci_resource_start(dev-&gt;pdev, 0),</div><div class='add'>+				    pci_resource_len(dev-&gt;pdev, 0),</div><div class='add'>+				    DRM_MTRR_WC);</div><div class='add'>+</div><div class='add'>+	cirrus-&gt;mm_inited = true;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cirrus_mm_fini(struct cirrus_device *cirrus)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = cirrus-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (!cirrus-&gt;mm_inited)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ttm_bo_device_release(&amp;cirrus-&gt;ttm.bdev);</div><div class='add'>+</div><div class='add'>+	cirrus_ttm_global_release(cirrus);</div><div class='add'>+</div><div class='add'>+	if (cirrus-&gt;fb_mtrr &gt;= 0) {</div><div class='add'>+		drm_mtrr_del(cirrus-&gt;fb_mtrr,</div><div class='add'>+			     pci_resource_start(dev-&gt;pdev, 0),</div><div class='add'>+			     pci_resource_len(dev-&gt;pdev, 0), DRM_MTRR_WC);</div><div class='add'>+		cirrus-&gt;fb_mtrr = -1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cirrus_ttm_placement(struct cirrus_bo *bo, int domain)</div><div class='add'>+{</div><div class='add'>+	u32 c = 0;</div><div class='add'>+	bo-&gt;placement.fpfn = 0;</div><div class='add'>+	bo-&gt;placement.lpfn = 0;</div><div class='add'>+	bo-&gt;placement.placement = bo-&gt;placements;</div><div class='add'>+	bo-&gt;placement.busy_placement = bo-&gt;placements;</div><div class='add'>+	if (domain &amp; TTM_PL_FLAG_VRAM)</div><div class='add'>+		bo-&gt;placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_VRAM;</div><div class='add'>+	if (domain &amp; TTM_PL_FLAG_SYSTEM)</div><div class='add'>+		bo-&gt;placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;</div><div class='add'>+	if (!c)</div><div class='add'>+		bo-&gt;placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;</div><div class='add'>+	bo-&gt;placement.num_placement = c;</div><div class='add'>+	bo-&gt;placement.num_busy_placement = c;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cirrus_bo_reserve(struct cirrus_bo *bo, bool no_wait)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_reserve(&amp;bo-&gt;bo, true, no_wait, false, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (ret != -ERESTARTSYS)</div><div class='add'>+			DRM_ERROR("reserve failed %p\n", bo);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cirrus_bo_unreserve(struct cirrus_bo *bo)</div><div class='add'>+{</div><div class='add'>+	ttm_bo_unreserve(&amp;bo-&gt;bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cirrus_bo_create(struct drm_device *dev, int size, int align,</div><div class='add'>+		  uint32_t flags, struct cirrus_bo **pcirrusbo)</div><div class='add'>+{</div><div class='add'>+	struct cirrus_device *cirrus = dev-&gt;dev_private;</div><div class='add'>+	struct cirrus_bo *cirrusbo;</div><div class='add'>+	size_t acc_size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cirrusbo = kzalloc(sizeof(struct cirrus_bo), GFP_KERNEL);</div><div class='add'>+	if (!cirrusbo)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = drm_gem_object_init(dev, &amp;cirrusbo-&gt;gem, size);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(cirrusbo);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cirrusbo-&gt;gem.driver_private = NULL;</div><div class='add'>+	cirrusbo-&gt;bo.bdev = &amp;cirrus-&gt;ttm.bdev;</div><div class='add'>+</div><div class='add'>+	cirrus_ttm_placement(cirrusbo, TTM_PL_FLAG_VRAM | TTM_PL_FLAG_SYSTEM);</div><div class='add'>+</div><div class='add'>+	acc_size = ttm_bo_dma_acc_size(&amp;cirrus-&gt;ttm.bdev, size,</div><div class='add'>+				       sizeof(struct cirrus_bo));</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_init(&amp;cirrus-&gt;ttm.bdev, &amp;cirrusbo-&gt;bo, size,</div><div class='add'>+			  ttm_bo_type_device, &amp;cirrusbo-&gt;placement,</div><div class='add'>+			  align &gt;&gt; PAGE_SHIFT, 0, false, NULL, acc_size,</div><div class='add'>+			  NULL, cirrus_bo_ttm_destroy);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*pcirrusbo = cirrusbo;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 cirrus_bo_gpu_offset(struct cirrus_bo *bo)</div><div class='add'>+{</div><div class='add'>+	return bo-&gt;bo.offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cirrus_bo_pin(struct cirrus_bo *bo, u32 pl_flag, u64 *gpu_addr)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	if (bo-&gt;pin_count) {</div><div class='add'>+		bo-&gt;pin_count++;</div><div class='add'>+		if (gpu_addr)</div><div class='add'>+			*gpu_addr = cirrus_bo_gpu_offset(bo);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cirrus_ttm_placement(bo, pl_flag);</div><div class='add'>+	for (i = 0; i &lt; bo-&gt;placement.num_placement; i++)</div><div class='add'>+		bo-&gt;placements[i] |= TTM_PL_FLAG_NO_EVICT;</div><div class='add'>+	ret = ttm_bo_validate(&amp;bo-&gt;bo, &amp;bo-&gt;placement, false, false, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	bo-&gt;pin_count = 1;</div><div class='add'>+	if (gpu_addr)</div><div class='add'>+		*gpu_addr = cirrus_bo_gpu_offset(bo);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cirrus_bo_unpin(struct cirrus_bo *bo)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+	if (!bo-&gt;pin_count) {</div><div class='add'>+		DRM_ERROR("unpin bad %p\n", bo);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	bo-&gt;pin_count--;</div><div class='add'>+	if (bo-&gt;pin_count)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bo-&gt;placement.num_placement ; i++)</div><div class='add'>+		bo-&gt;placements[i] &amp;= ~TTM_PL_FLAG_NO_EVICT;</div><div class='add'>+	ret = ttm_bo_validate(&amp;bo-&gt;bo, &amp;bo-&gt;placement, false, false, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cirrus_bo_push_sysram(struct cirrus_bo *bo)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+	if (!bo-&gt;pin_count) {</div><div class='add'>+		DRM_ERROR("unpin bad %p\n", bo);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	bo-&gt;pin_count--;</div><div class='add'>+	if (bo-&gt;pin_count)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (bo-&gt;kmap.virtual)</div><div class='add'>+		ttm_bo_kunmap(&amp;bo-&gt;kmap);</div><div class='add'>+</div><div class='add'>+	cirrus_ttm_placement(bo, TTM_PL_FLAG_SYSTEM);</div><div class='add'>+	for (i = 0; i &lt; bo-&gt;placement.num_placement ; i++)</div><div class='add'>+		bo-&gt;placements[i] |= TTM_PL_FLAG_NO_EVICT;</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_validate(&amp;bo-&gt;bo, &amp;bo-&gt;placement, false, false, false);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("pushing to VRAM failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cirrus_mmap(struct file *filp, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	struct drm_file *file_priv;</div><div class='add'>+	struct cirrus_device *cirrus;</div><div class='add'>+</div><div class='add'>+	if (unlikely(vma-&gt;vm_pgoff &lt; DRM_FILE_PAGE_OFFSET))</div><div class='add'>+		return drm_mmap(filp, vma);</div><div class='add'>+</div><div class='add'>+	file_priv = filp-&gt;private_data;</div><div class='add'>+	cirrus = file_priv-&gt;minor-&gt;dev-&gt;dev_private;</div><div class='add'>+	return ttm_bo_mmap(filp, vma, &amp;cirrus-&gt;ttm.bdev);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c<br/>index 4b8653b932f9..08758e061478 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_cache.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_cache.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_cache.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_cache.c</a></div><div class='hunk'>@@ -98,3 +98,26 @@ drm_clflush_pages(struct page *pages[], unsigned long num_pages)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_clflush_pages);</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+drm_clflush_virt_range(char *addr, unsigned long length)</div><div class='add'>+{</div><div class='add'>+#if defined(CONFIG_X86)</div><div class='add'>+	if (cpu_has_clflush) {</div><div class='add'>+		char *end = addr + length;</div><div class='add'>+		mb();</div><div class='add'>+		for (; addr &lt; end; addr += boot_cpu_data.x86_clflush_size)</div><div class='add'>+			clflush(addr);</div><div class='add'>+		clflush(end - 1);</div><div class='add'>+		mb();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)</div><div class='add'>+		printk(KERN_ERR "Timed out waiting for cache flush.\n");</div><div class='add'>+#else</div><div class='add'>+	printk(KERN_ERR "Architecture has no drm_cache.c support\n");</div><div class='add'>+	WARN_ON_ONCE(1);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_clflush_virt_range);</div><div class='head'>diff --git a/drivers/gpu/drm/drm_context.c b/drivers/gpu/drm/drm_context.c<br/>index 325365f6d355..affa629589ac 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_context.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_context.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_context.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_context.c</a></div><div class='hunk'>@@ -85,11 +85,12 @@ again:</div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> 	ret = idr_get_new_above(&amp;dev-&gt;ctx_idr, NULL,</div><div class='ctx'> 				DRM_RESERVED_CONTEXTS, &amp;new_id);</div><div class='del'>-	if (ret == -EAGAIN) {</div><div class='del'>-		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-		goto again;</div><div class='del'>-	}</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	if (ret == -EAGAIN)</div><div class='add'>+		goto again;</div><div class='add'>+	else if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	return new_id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c<br/>index c79870a75c2f..08a7aa722d6b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_crtc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_crtc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_crtc.c</a></div><div class='hunk'>@@ -227,7 +227,7 @@ static int drm_mode_object_get(struct drm_device *dev,</div><div class='ctx'> again:</div><div class='ctx'> 	if (idr_pre_get(&amp;dev-&gt;mode_config.crtc_idr, GFP_KERNEL) == 0) {</div><div class='ctx'> 		DRM_ERROR("Ran out memory getting a mode number\n");</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;mode_config.idr_mutex);</div><div class='hunk'>@@ -235,6 +235,8 @@ again:</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;mode_config.idr_mutex);</div><div class='ctx'> 	if (ret == -EAGAIN)</div><div class='ctx'> 		goto again;</div><div class='add'>+	else if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	obj-&gt;id = new_id;</div><div class='ctx'> 	obj-&gt;type = obj_type;</div><div class='hunk'>@@ -361,7 +363,7 @@ EXPORT_SYMBOL(drm_framebuffer_cleanup);</div><div class='ctx'>  * @funcs: callbacks for the new CRTC</div><div class='ctx'>  *</div><div class='ctx'>  * LOCKING:</div><div class='del'>- * Caller must hold mode config lock.</div><div class='add'>+ * Takes mode_config lock.</div><div class='ctx'>  *</div><div class='ctx'>  * Inits a new object created as base part of an driver crtc object.</div><div class='ctx'>  *</div><div class='hunk'>@@ -382,6 +384,8 @@ int drm_crtc_init(struct drm_device *dev, struct drm_crtc *crtc,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='add'>+	crtc-&gt;base.properties = &amp;crtc-&gt;properties;</div><div class='add'>+</div><div class='ctx'> 	list_add_tail(&amp;crtc-&gt;head, &amp;dev-&gt;mode_config.crtc_list);</div><div class='ctx'> 	dev-&gt;mode_config.num_crtc++;</div><div class='ctx'> </div><div class='hunk'>@@ -481,6 +485,7 @@ int drm_connector_init(struct drm_device *dev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='add'>+	connector-&gt;base.properties = &amp;connector-&gt;properties;</div><div class='ctx'> 	connector-&gt;dev = dev;</div><div class='ctx'> 	connector-&gt;funcs = funcs;</div><div class='ctx'> 	connector-&gt;connector_type = connector_type;</div><div class='hunk'>@@ -603,6 +608,7 @@ int drm_plane_init(struct drm_device *dev, struct drm_plane *plane,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='add'>+	plane-&gt;base.properties = &amp;plane-&gt;properties;</div><div class='ctx'> 	plane-&gt;dev = dev;</div><div class='ctx'> 	plane-&gt;funcs = funcs;</div><div class='ctx'> 	plane-&gt;format_types = kmalloc(sizeof(uint32_t) * format_count,</div><div class='hunk'>@@ -1422,11 +1428,7 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,</div><div class='ctx'> 	}</div><div class='ctx'> 	connector = obj_to_connector(obj);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; DRM_CONNECTOR_MAX_PROPERTY; i++) {</div><div class='del'>-		if (connector-&gt;property_ids[i] != 0) {</div><div class='del'>-			props_count++;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	props_count = connector-&gt;properties.count;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; DRM_CONNECTOR_MAX_ENCODER; i++) {</div><div class='ctx'> 		if (connector-&gt;encoder_ids[i] != 0) {</div><div class='hunk'>@@ -1479,21 +1481,19 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,</div><div class='ctx'> 		copied = 0;</div><div class='ctx'> 		prop_ptr = (uint32_t __user *)(unsigned long)(out_resp-&gt;props_ptr);</div><div class='ctx'> 		prop_values = (uint64_t __user *)(unsigned long)(out_resp-&gt;prop_values_ptr);</div><div class='del'>-		for (i = 0; i &lt; DRM_CONNECTOR_MAX_PROPERTY; i++) {</div><div class='del'>-			if (connector-&gt;property_ids[i] != 0) {</div><div class='del'>-				if (put_user(connector-&gt;property_ids[i],</div><div class='del'>-					     prop_ptr + copied)) {</div><div class='del'>-					ret = -EFAULT;</div><div class='del'>-					goto out;</div><div class='del'>-				}</div><div class='add'>+		for (i = 0; i &lt; connector-&gt;properties.count; i++) {</div><div class='add'>+			if (put_user(connector-&gt;properties.ids[i],</div><div class='add'>+				     prop_ptr + copied)) {</div><div class='add'>+				ret = -EFAULT;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-				if (put_user(connector-&gt;property_values[i],</div><div class='del'>-					     prop_values + copied)) {</div><div class='del'>-					ret = -EFAULT;</div><div class='del'>-					goto out;</div><div class='del'>-				}</div><div class='del'>-				copied++;</div><div class='add'>+			if (put_user(connector-&gt;properties.values[i],</div><div class='add'>+				     prop_values + copied)) {</div><div class='add'>+				ret = -EFAULT;</div><div class='add'>+				goto out;</div><div class='ctx'> 			}</div><div class='add'>+			copied++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	out_resp-&gt;count_props = props_count;</div><div class='hunk'>@@ -1830,7 +1830,7 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,</div><div class='ctx'> 	struct drm_display_mode *mode = NULL;</div><div class='ctx'> 	struct drm_mode_set set;</div><div class='ctx'> 	uint32_t __user *set_connectors_ptr;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='hunk'>@@ -2102,7 +2102,7 @@ int drm_mode_addfb(struct drm_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	fb = dev-&gt;mode_config.funcs-&gt;fb_create(dev, file_priv, &amp;r);</div><div class='ctx'> 	if (IS_ERR(fb)) {</div><div class='del'>-		DRM_ERROR("could not create framebuffer\n");</div><div class='add'>+		DRM_DEBUG_KMS("could not create framebuffer\n");</div><div class='ctx'> 		ret = PTR_ERR(fb);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2116,7 +2116,7 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int format_check(struct drm_mode_fb_cmd2 *r)</div><div class='add'>+static int format_check(const struct drm_mode_fb_cmd2 *r)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t format = r-&gt;pixel_format &amp; ~DRM_FORMAT_BIG_ENDIAN;</div><div class='ctx'> </div><div class='hunk'>@@ -2185,6 +2185,47 @@ static int format_check(struct drm_mode_fb_cmd2 *r)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int framebuffer_check(const struct drm_mode_fb_cmd2 *r)</div><div class='add'>+{</div><div class='add'>+	int ret, hsub, vsub, num_planes, i;</div><div class='add'>+</div><div class='add'>+	ret = format_check(r);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_DEBUG_KMS("bad framebuffer format 0x%08x\n", r-&gt;pixel_format);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hsub = drm_format_horz_chroma_subsampling(r-&gt;pixel_format);</div><div class='add'>+	vsub = drm_format_vert_chroma_subsampling(r-&gt;pixel_format);</div><div class='add'>+	num_planes = drm_format_num_planes(r-&gt;pixel_format);</div><div class='add'>+</div><div class='add'>+	if (r-&gt;width == 0 || r-&gt;width % hsub) {</div><div class='add'>+		DRM_DEBUG_KMS("bad framebuffer width %u\n", r-&gt;height);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (r-&gt;height == 0 || r-&gt;height % vsub) {</div><div class='add'>+		DRM_DEBUG_KMS("bad framebuffer height %u\n", r-&gt;height);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_planes; i++) {</div><div class='add'>+		unsigned int width = r-&gt;width / (i != 0 ? hsub : 1);</div><div class='add'>+</div><div class='add'>+		if (!r-&gt;handles[i]) {</div><div class='add'>+			DRM_DEBUG_KMS("no buffer object handle for plane %d\n", i);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (r-&gt;pitches[i] &lt; drm_format_plane_cpp(r-&gt;pixel_format, i) * width) {</div><div class='add'>+			DRM_DEBUG_KMS("bad pitch %u for plane %d\n", r-&gt;pitches[i], i);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * drm_mode_addfb2 - add an FB to the graphics configuration</div><div class='ctx'>  * @inode: inode from the ioctl</div><div class='hunk'>@@ -2208,33 +2249,31 @@ int drm_mode_addfb2(struct drm_device *dev,</div><div class='ctx'> 	struct drm_mode_fb_cmd2 *r = data;</div><div class='ctx'> 	struct drm_mode_config *config = &amp;dev-&gt;mode_config;</div><div class='ctx'> 	struct drm_framebuffer *fb;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if ((config-&gt;min_width &gt; r-&gt;width) || (r-&gt;width &gt; config-&gt;max_width)) {</div><div class='del'>-		DRM_ERROR("bad framebuffer width %d, should be &gt;= %d &amp;&amp; &lt;= %d\n",</div><div class='add'>+		DRM_DEBUG_KMS("bad framebuffer width %d, should be &gt;= %d &amp;&amp; &lt;= %d\n",</div><div class='ctx'> 			  r-&gt;width, config-&gt;min_width, config-&gt;max_width);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if ((config-&gt;min_height &gt; r-&gt;height) || (r-&gt;height &gt; config-&gt;max_height)) {</div><div class='del'>-		DRM_ERROR("bad framebuffer height %d, should be &gt;= %d &amp;&amp; &lt;= %d\n",</div><div class='add'>+		DRM_DEBUG_KMS("bad framebuffer height %d, should be &gt;= %d &amp;&amp; &lt;= %d\n",</div><div class='ctx'> 			  r-&gt;height, config-&gt;min_height, config-&gt;max_height);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = format_check(r);</div><div class='del'>-	if (ret) {</div><div class='del'>-		DRM_ERROR("bad framebuffer format 0x%08x\n", r-&gt;pixel_format);</div><div class='add'>+	ret = framebuffer_check(r);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;mode_config.mutex);</div><div class='ctx'> </div><div class='ctx'> 	fb = dev-&gt;mode_config.funcs-&gt;fb_create(dev, file_priv, r);</div><div class='ctx'> 	if (IS_ERR(fb)) {</div><div class='del'>-		DRM_ERROR("could not create framebuffer\n");</div><div class='add'>+		DRM_DEBUG_KMS("could not create framebuffer\n");</div><div class='ctx'> 		ret = PTR_ERR(fb);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2365,7 +2404,7 @@ int drm_mode_dirtyfb_ioctl(struct drm_device *dev,</div><div class='ctx'> 	struct drm_framebuffer *fb;</div><div class='ctx'> 	unsigned flags;</div><div class='ctx'> 	int num_clips;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -2564,7 +2603,7 @@ int drm_mode_attachmode_ioctl(struct drm_device *dev,</div><div class='ctx'> 	struct drm_display_mode *mode;</div><div class='ctx'> 	struct drm_mode_object *obj;</div><div class='ctx'> 	struct drm_mode_modeinfo *umode = &amp;mode_cmd-&gt;mode;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -2618,7 +2657,7 @@ int drm_mode_detachmode_ioctl(struct drm_device *dev,</div><div class='ctx'> 	struct drm_connector *connector;</div><div class='ctx'> 	struct drm_display_mode mode;</div><div class='ctx'> 	struct drm_mode_modeinfo *umode = &amp;mode_cmd-&gt;mode;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -2710,6 +2749,34 @@ struct drm_property *drm_property_create_enum(struct drm_device *dev, int flags,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_property_create_enum);</div><div class='ctx'> </div><div class='add'>+struct drm_property *drm_property_create_bitmask(struct drm_device *dev,</div><div class='add'>+					 int flags, const char *name,</div><div class='add'>+					 const struct drm_prop_enum_list *props,</div><div class='add'>+					 int num_values)</div><div class='add'>+{</div><div class='add'>+	struct drm_property *property;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	flags |= DRM_MODE_PROP_BITMASK;</div><div class='add'>+</div><div class='add'>+	property = drm_property_create(dev, flags, name, num_values);</div><div class='add'>+	if (!property)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_values; i++) {</div><div class='add'>+		ret = drm_property_add_enum(property, i,</div><div class='add'>+				      props[i].type,</div><div class='add'>+				      props[i].name);</div><div class='add'>+		if (ret) {</div><div class='add'>+			drm_property_destroy(dev, property);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return property;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_property_create_bitmask);</div><div class='add'>+</div><div class='ctx'> struct drm_property *drm_property_create_range(struct drm_device *dev, int flags,</div><div class='ctx'> 					 const char *name,</div><div class='ctx'> 					 uint64_t min, uint64_t max)</div><div class='hunk'>@@ -2734,7 +2801,14 @@ int drm_property_add_enum(struct drm_property *property, int index,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_property_enum *prop_enum;</div><div class='ctx'> </div><div class='del'>-	if (!(property-&gt;flags &amp; DRM_MODE_PROP_ENUM))</div><div class='add'>+	if (!(property-&gt;flags &amp; (DRM_MODE_PROP_ENUM | DRM_MODE_PROP_BITMASK)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Bitmask enum properties have the additional constraint of values</div><div class='add'>+	 * from 0 to 63</div><div class='add'>+	 */</div><div class='add'>+	if ((property-&gt;flags &amp; DRM_MODE_PROP_BITMASK) &amp;&amp; (value &gt; 63))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (!list_empty(&amp;property-&gt;enum_blob_list)) {</div><div class='hunk'>@@ -2778,60 +2852,78 @@ void drm_property_destroy(struct drm_device *dev, struct drm_property *property)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_property_destroy);</div><div class='ctx'> </div><div class='del'>-int drm_connector_attach_property(struct drm_connector *connector,</div><div class='add'>+void drm_connector_attach_property(struct drm_connector *connector,</div><div class='ctx'> 			       struct drm_property *property, uint64_t init_val)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; DRM_CONNECTOR_MAX_PROPERTY; i++) {</div><div class='del'>-		if (connector-&gt;property_ids[i] == 0) {</div><div class='del'>-			connector-&gt;property_ids[i] = property-&gt;base.id;</div><div class='del'>-			connector-&gt;property_values[i] = init_val;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i == DRM_CONNECTOR_MAX_PROPERTY)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+	drm_object_attach_property(&amp;connector-&gt;base, property, init_val);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_connector_attach_property);</div><div class='ctx'> </div><div class='ctx'> int drm_connector_property_set_value(struct drm_connector *connector,</div><div class='ctx'> 				  struct drm_property *property, uint64_t value)</div><div class='ctx'> {</div><div class='add'>+	return drm_object_property_set_value(&amp;connector-&gt;base, property, value);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_connector_property_set_value);</div><div class='add'>+</div><div class='add'>+int drm_connector_property_get_value(struct drm_connector *connector,</div><div class='add'>+				  struct drm_property *property, uint64_t *val)</div><div class='add'>+{</div><div class='add'>+	return drm_object_property_get_value(&amp;connector-&gt;base, property, val);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_connector_property_get_value);</div><div class='add'>+</div><div class='add'>+void drm_object_attach_property(struct drm_mode_object *obj,</div><div class='add'>+				struct drm_property *property,</div><div class='add'>+				uint64_t init_val)</div><div class='add'>+{</div><div class='add'>+	int count = obj-&gt;properties-&gt;count;</div><div class='add'>+</div><div class='add'>+	if (count == DRM_OBJECT_MAX_PROPERTY) {</div><div class='add'>+		WARN(1, "Failed to attach object property (type: 0x%x). Please "</div><div class='add'>+			"increase DRM_OBJECT_MAX_PROPERTY by 1 for each time "</div><div class='add'>+			"you see this message on the same object type.\n",</div><div class='add'>+			obj-&gt;type);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	obj-&gt;properties-&gt;ids[count] = property-&gt;base.id;</div><div class='add'>+	obj-&gt;properties-&gt;values[count] = init_val;</div><div class='add'>+	obj-&gt;properties-&gt;count++;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_object_attach_property);</div><div class='add'>+</div><div class='add'>+int drm_object_property_set_value(struct drm_mode_object *obj,</div><div class='add'>+				  struct drm_property *property, uint64_t val)</div><div class='add'>+{</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; DRM_CONNECTOR_MAX_PROPERTY; i++) {</div><div class='del'>-		if (connector-&gt;property_ids[i] == property-&gt;base.id) {</div><div class='del'>-			connector-&gt;property_values[i] = value;</div><div class='del'>-			break;</div><div class='add'>+	for (i = 0; i &lt; obj-&gt;properties-&gt;count; i++) {</div><div class='add'>+		if (obj-&gt;properties-&gt;ids[i] == property-&gt;base.id) {</div><div class='add'>+			obj-&gt;properties-&gt;values[i] = val;</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (i == DRM_CONNECTOR_MAX_PROPERTY)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(drm_connector_property_set_value);</div><div class='add'>+EXPORT_SYMBOL(drm_object_property_set_value);</div><div class='ctx'> </div><div class='del'>-int drm_connector_property_get_value(struct drm_connector *connector,</div><div class='add'>+int drm_object_property_get_value(struct drm_mode_object *obj,</div><div class='ctx'> 				  struct drm_property *property, uint64_t *val)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; DRM_CONNECTOR_MAX_PROPERTY; i++) {</div><div class='del'>-		if (connector-&gt;property_ids[i] == property-&gt;base.id) {</div><div class='del'>-			*val = connector-&gt;property_values[i];</div><div class='del'>-			break;</div><div class='add'>+	for (i = 0; i &lt; obj-&gt;properties-&gt;count; i++) {</div><div class='add'>+		if (obj-&gt;properties-&gt;ids[i] == property-&gt;base.id) {</div><div class='add'>+			*val = obj-&gt;properties-&gt;values[i];</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (i == DRM_CONNECTOR_MAX_PROPERTY)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(drm_connector_property_get_value);</div><div class='add'>+EXPORT_SYMBOL(drm_object_property_get_value);</div><div class='ctx'> </div><div class='ctx'> int drm_mode_getproperty_ioctl(struct drm_device *dev,</div><div class='ctx'> 			       void *data, struct drm_file *file_priv)</div><div class='hunk'>@@ -2862,7 +2954,7 @@ int drm_mode_getproperty_ioctl(struct drm_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> 	property = obj_to_property(obj);</div><div class='ctx'> </div><div class='del'>-	if (property-&gt;flags &amp; DRM_MODE_PROP_ENUM) {</div><div class='add'>+	if (property-&gt;flags &amp; (DRM_MODE_PROP_ENUM | DRM_MODE_PROP_BITMASK)) {</div><div class='ctx'> 		list_for_each_entry(prop_enum, &amp;property-&gt;enum_blob_list, head)</div><div class='ctx'> 			enum_count++;</div><div class='ctx'> 	} else if (property-&gt;flags &amp; DRM_MODE_PROP_BLOB) {</div><div class='hunk'>@@ -2887,7 +2979,7 @@ int drm_mode_getproperty_ioctl(struct drm_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> 	out_resp-&gt;count_values = value_count;</div><div class='ctx'> </div><div class='del'>-	if (property-&gt;flags &amp; DRM_MODE_PROP_ENUM) {</div><div class='add'>+	if (property-&gt;flags &amp; (DRM_MODE_PROP_ENUM | DRM_MODE_PROP_BITMASK)) {</div><div class='ctx'> 		if ((out_resp-&gt;count_enum_blobs &gt;= enum_count) &amp;&amp; enum_count) {</div><div class='ctx'> 			copied = 0;</div><div class='ctx'> 			enum_ptr = (struct drm_mode_property_enum __user *)(unsigned long)out_resp-&gt;enum_blob_ptr;</div><div class='hunk'>@@ -3009,7 +3101,7 @@ int drm_mode_connector_update_edid_property(struct drm_connector *connector,</div><div class='ctx'> 					    struct edid *edid)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = connector-&gt;dev;</div><div class='del'>-	int ret = 0, size;</div><div class='add'>+	int ret, size;</div><div class='ctx'> </div><div class='ctx'> 	if (connector-&gt;edid_blob_ptr)</div><div class='ctx'> 		drm_property_destroy_blob(dev, connector-&gt;edid_blob_ptr);</div><div class='hunk'>@@ -3033,75 +3125,202 @@ int drm_mode_connector_update_edid_property(struct drm_connector *connector,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_mode_connector_update_edid_property);</div><div class='ctx'> </div><div class='add'>+static bool drm_property_change_is_valid(struct drm_property *property,</div><div class='add'>+					 uint64_t value)</div><div class='add'>+{</div><div class='add'>+	if (property-&gt;flags &amp; DRM_MODE_PROP_IMMUTABLE)</div><div class='add'>+		return false;</div><div class='add'>+	if (property-&gt;flags &amp; DRM_MODE_PROP_RANGE) {</div><div class='add'>+		if (value &lt; property-&gt;values[0] || value &gt; property-&gt;values[1])</div><div class='add'>+			return false;</div><div class='add'>+		return true;</div><div class='add'>+	} else if (property-&gt;flags &amp; DRM_MODE_PROP_BITMASK) {</div><div class='add'>+		int i;</div><div class='add'>+		uint64_t valid_mask = 0;</div><div class='add'>+		for (i = 0; i &lt; property-&gt;num_values; i++)</div><div class='add'>+			valid_mask |= (1ULL &lt;&lt; property-&gt;values[i]);</div><div class='add'>+		return !(value &amp; ~valid_mask);</div><div class='add'>+	} else {</div><div class='add'>+		int i;</div><div class='add'>+		for (i = 0; i &lt; property-&gt;num_values; i++)</div><div class='add'>+			if (property-&gt;values[i] == value)</div><div class='add'>+				return true;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int drm_mode_connector_property_set_ioctl(struct drm_device *dev,</div><div class='ctx'> 				       void *data, struct drm_file *file_priv)</div><div class='ctx'> {</div><div class='del'>-	struct drm_mode_connector_set_property *out_resp = data;</div><div class='del'>-	struct drm_mode_object *obj;</div><div class='del'>-	struct drm_property *property;</div><div class='del'>-	struct drm_connector *connector;</div><div class='add'>+	struct drm_mode_connector_set_property *conn_set_prop = data;</div><div class='add'>+	struct drm_mode_obj_set_property obj_set_prop = {</div><div class='add'>+		.value = conn_set_prop-&gt;value,</div><div class='add'>+		.prop_id = conn_set_prop-&gt;prop_id,</div><div class='add'>+		.obj_id = conn_set_prop-&gt;connector_id,</div><div class='add'>+		.obj_type = DRM_MODE_OBJECT_CONNECTOR</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* It does all the locking and checking we need */</div><div class='add'>+	return drm_mode_obj_set_property_ioctl(dev, &amp;obj_set_prop, file_priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int drm_mode_connector_set_obj_prop(struct drm_mode_object *obj,</div><div class='add'>+					   struct drm_property *property,</div><div class='add'>+					   uint64_t value)</div><div class='add'>+{</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='add'>+	struct drm_connector *connector = obj_to_connector(obj);</div><div class='add'>+</div><div class='add'>+	/* Do DPMS ourselves */</div><div class='add'>+	if (property == connector-&gt;dev-&gt;mode_config.dpms_property) {</div><div class='add'>+		if (connector-&gt;funcs-&gt;dpms)</div><div class='add'>+			(*connector-&gt;funcs-&gt;dpms)(connector, (int)value);</div><div class='add'>+		ret = 0;</div><div class='add'>+	} else if (connector-&gt;funcs-&gt;set_property)</div><div class='add'>+		ret = connector-&gt;funcs-&gt;set_property(connector, property, value);</div><div class='add'>+</div><div class='add'>+	/* store the property value if successful */</div><div class='add'>+	if (!ret)</div><div class='add'>+		drm_connector_property_set_value(connector, property, value);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int drm_mode_crtc_set_obj_prop(struct drm_mode_object *obj,</div><div class='add'>+				      struct drm_property *property,</div><div class='add'>+				      uint64_t value)</div><div class='add'>+{</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+	struct drm_crtc *crtc = obj_to_crtc(obj);</div><div class='add'>+</div><div class='add'>+	if (crtc-&gt;funcs-&gt;set_property)</div><div class='add'>+		ret = crtc-&gt;funcs-&gt;set_property(crtc, property, value);</div><div class='add'>+	if (!ret)</div><div class='add'>+		drm_object_property_set_value(obj, property, value);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int drm_mode_plane_set_obj_prop(struct drm_mode_object *obj,</div><div class='add'>+				      struct drm_property *property,</div><div class='add'>+				      uint64_t value)</div><div class='add'>+{</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+	struct drm_plane *plane = obj_to_plane(obj);</div><div class='add'>+</div><div class='add'>+	if (plane-&gt;funcs-&gt;set_property)</div><div class='add'>+		ret = plane-&gt;funcs-&gt;set_property(plane, property, value);</div><div class='add'>+	if (!ret)</div><div class='add'>+		drm_object_property_set_value(obj, property, value);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int drm_mode_obj_get_properties_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+				      struct drm_file *file_priv)</div><div class='add'>+{</div><div class='add'>+	struct drm_mode_obj_get_properties *arg = data;</div><div class='add'>+	struct drm_mode_object *obj;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> 	int i;</div><div class='add'>+	int copied = 0;</div><div class='add'>+	int props_count = 0;</div><div class='add'>+	uint32_t __user *props_ptr;</div><div class='add'>+	uint64_t __user *prop_values_ptr;</div><div class='ctx'> </div><div class='ctx'> 	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;mode_config.mutex);</div><div class='ctx'> </div><div class='del'>-	obj = drm_mode_object_find(dev, out_resp-&gt;connector_id, DRM_MODE_OBJECT_CONNECTOR);</div><div class='add'>+	obj = drm_mode_object_find(dev, arg-&gt;obj_id, arg-&gt;obj_type);</div><div class='ctx'> 	if (!obj) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	if (!obj-&gt;properties) {</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='del'>-	connector = obj_to_connector(obj);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; DRM_CONNECTOR_MAX_PROPERTY; i++) {</div><div class='del'>-		if (connector-&gt;property_ids[i] == out_resp-&gt;prop_id)</div><div class='del'>-			break;</div><div class='add'>+	props_count = obj-&gt;properties-&gt;count;</div><div class='add'>+</div><div class='add'>+	/* This ioctl is called twice, once to determine how much space is</div><div class='add'>+	 * needed, and the 2nd time to fill it. */</div><div class='add'>+	if ((arg-&gt;count_props &gt;= props_count) &amp;&amp; props_count) {</div><div class='add'>+		copied = 0;</div><div class='add'>+		props_ptr = (uint32_t __user *)(unsigned long)(arg-&gt;props_ptr);</div><div class='add'>+		prop_values_ptr = (uint64_t __user *)(unsigned long)</div><div class='add'>+				  (arg-&gt;prop_values_ptr);</div><div class='add'>+		for (i = 0; i &lt; props_count; i++) {</div><div class='add'>+			if (put_user(obj-&gt;properties-&gt;ids[i],</div><div class='add'>+				     props_ptr + copied)) {</div><div class='add'>+				ret = -EFAULT;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			if (put_user(obj-&gt;properties-&gt;values[i],</div><div class='add'>+				     prop_values_ptr + copied)) {</div><div class='add'>+				ret = -EFAULT;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			copied++;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='add'>+	arg-&gt;count_props = props_count;</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;mode_config.mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int drm_mode_obj_set_property_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+				    struct drm_file *file_priv)</div><div class='add'>+{</div><div class='add'>+	struct drm_mode_obj_set_property *arg = data;</div><div class='add'>+	struct drm_mode_object *arg_obj;</div><div class='add'>+	struct drm_mode_object *prop_obj;</div><div class='add'>+	struct drm_property *property;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;mode_config.mutex);</div><div class='ctx'> </div><div class='del'>-	if (i == DRM_CONNECTOR_MAX_PROPERTY) {</div><div class='add'>+	arg_obj = drm_mode_object_find(dev, arg-&gt;obj_id, arg-&gt;obj_type);</div><div class='add'>+	if (!arg_obj)</div><div class='add'>+		goto out;</div><div class='add'>+	if (!arg_obj-&gt;properties)</div><div class='ctx'> 		goto out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	obj = drm_mode_object_find(dev, out_resp-&gt;prop_id, DRM_MODE_OBJECT_PROPERTY);</div><div class='del'>-	if (!obj) {</div><div class='add'>+	for (i = 0; i &lt; arg_obj-&gt;properties-&gt;count; i++)</div><div class='add'>+		if (arg_obj-&gt;properties-&gt;ids[i] == arg-&gt;prop_id)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+	if (i == arg_obj-&gt;properties-&gt;count)</div><div class='ctx'> 		goto out;</div><div class='del'>-	}</div><div class='del'>-	property = obj_to_property(obj);</div><div class='ctx'> </div><div class='del'>-	if (property-&gt;flags &amp; DRM_MODE_PROP_IMMUTABLE)</div><div class='add'>+	prop_obj = drm_mode_object_find(dev, arg-&gt;prop_id,</div><div class='add'>+					DRM_MODE_OBJECT_PROPERTY);</div><div class='add'>+	if (!prop_obj)</div><div class='ctx'> 		goto out;</div><div class='add'>+	property = obj_to_property(prop_obj);</div><div class='ctx'> </div><div class='del'>-	if (property-&gt;flags &amp; DRM_MODE_PROP_RANGE) {</div><div class='del'>-		if (out_resp-&gt;value &lt; property-&gt;values[0])</div><div class='del'>-			goto out;</div><div class='add'>+	if (!drm_property_change_is_valid(property, arg-&gt;value))</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-		if (out_resp-&gt;value &gt; property-&gt;values[1])</div><div class='del'>-			goto out;</div><div class='del'>-	} else {</div><div class='del'>-		int found = 0;</div><div class='del'>-		for (i = 0; i &lt; property-&gt;num_values; i++) {</div><div class='del'>-			if (property-&gt;values[i] == out_resp-&gt;value) {</div><div class='del'>-				found = 1;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if (!found) {</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='add'>+	switch (arg_obj-&gt;type) {</div><div class='add'>+	case DRM_MODE_OBJECT_CONNECTOR:</div><div class='add'>+		ret = drm_mode_connector_set_obj_prop(arg_obj, property,</div><div class='add'>+						      arg-&gt;value);</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_OBJECT_CRTC:</div><div class='add'>+		ret = drm_mode_crtc_set_obj_prop(arg_obj, property, arg-&gt;value);</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_OBJECT_PLANE:</div><div class='add'>+		ret = drm_mode_plane_set_obj_prop(arg_obj, property, arg-&gt;value);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Do DPMS ourselves */</div><div class='del'>-	if (property == connector-&gt;dev-&gt;mode_config.dpms_property) {</div><div class='del'>-		if (connector-&gt;funcs-&gt;dpms)</div><div class='del'>-			(*connector-&gt;funcs-&gt;dpms)(connector, (int) out_resp-&gt;value);</div><div class='del'>-		ret = 0;</div><div class='del'>-	} else if (connector-&gt;funcs-&gt;set_property)</div><div class='del'>-		ret = connector-&gt;funcs-&gt;set_property(connector, property, out_resp-&gt;value);</div><div class='del'>-</div><div class='del'>-	/* store the property value if successful */</div><div class='del'>-	if (!ret)</div><div class='del'>-		drm_connector_property_set_value(connector, property, out_resp-&gt;value);</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;mode_config.mutex);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -3173,6 +3392,11 @@ int drm_mode_gamma_set_ioctl(struct drm_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> 	crtc = obj_to_crtc(obj);</div><div class='ctx'> </div><div class='add'>+	if (crtc-&gt;funcs-&gt;gamma_set == NULL) {</div><div class='add'>+		ret = -ENOSYS;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* memcpy into gamma store */</div><div class='ctx'> 	if (crtc_lut-&gt;gamma_size != crtc-&gt;gamma_size) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -3468,3 +3692,140 @@ void drm_fb_get_bpp_depth(uint32_t format, unsigned int *depth,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_fb_get_bpp_depth);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_format_num_planes - get the number of planes for format</div><div class='add'>+ * @format: pixel format (DRM_FORMAT_*)</div><div class='add'>+ *</div><div class='add'>+ * RETURNS:</div><div class='add'>+ * The number of planes used by the specified pixel format.</div><div class='add'>+ */</div><div class='add'>+int drm_format_num_planes(uint32_t format)</div><div class='add'>+{</div><div class='add'>+	switch (format) {</div><div class='add'>+	case DRM_FORMAT_YUV410:</div><div class='add'>+	case DRM_FORMAT_YVU410:</div><div class='add'>+	case DRM_FORMAT_YUV411:</div><div class='add'>+	case DRM_FORMAT_YVU411:</div><div class='add'>+	case DRM_FORMAT_YUV420:</div><div class='add'>+	case DRM_FORMAT_YVU420:</div><div class='add'>+	case DRM_FORMAT_YUV422:</div><div class='add'>+	case DRM_FORMAT_YVU422:</div><div class='add'>+	case DRM_FORMAT_YUV444:</div><div class='add'>+	case DRM_FORMAT_YVU444:</div><div class='add'>+		return 3;</div><div class='add'>+	case DRM_FORMAT_NV12:</div><div class='add'>+	case DRM_FORMAT_NV21:</div><div class='add'>+	case DRM_FORMAT_NV16:</div><div class='add'>+	case DRM_FORMAT_NV61:</div><div class='add'>+		return 2;</div><div class='add'>+	default:</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_format_num_planes);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_format_plane_cpp - determine the bytes per pixel value</div><div class='add'>+ * @format: pixel format (DRM_FORMAT_*)</div><div class='add'>+ * @plane: plane index</div><div class='add'>+ *</div><div class='add'>+ * RETURNS:</div><div class='add'>+ * The bytes per pixel value for the specified plane.</div><div class='add'>+ */</div><div class='add'>+int drm_format_plane_cpp(uint32_t format, int plane)</div><div class='add'>+{</div><div class='add'>+	unsigned int depth;</div><div class='add'>+	int bpp;</div><div class='add'>+</div><div class='add'>+	if (plane &gt;= drm_format_num_planes(format))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (format) {</div><div class='add'>+	case DRM_FORMAT_YUYV:</div><div class='add'>+	case DRM_FORMAT_YVYU:</div><div class='add'>+	case DRM_FORMAT_UYVY:</div><div class='add'>+	case DRM_FORMAT_VYUY:</div><div class='add'>+		return 2;</div><div class='add'>+	case DRM_FORMAT_NV12:</div><div class='add'>+	case DRM_FORMAT_NV21:</div><div class='add'>+	case DRM_FORMAT_NV16:</div><div class='add'>+	case DRM_FORMAT_NV61:</div><div class='add'>+		return plane ? 2 : 1;</div><div class='add'>+	case DRM_FORMAT_YUV410:</div><div class='add'>+	case DRM_FORMAT_YVU410:</div><div class='add'>+	case DRM_FORMAT_YUV411:</div><div class='add'>+	case DRM_FORMAT_YVU411:</div><div class='add'>+	case DRM_FORMAT_YUV420:</div><div class='add'>+	case DRM_FORMAT_YVU420:</div><div class='add'>+	case DRM_FORMAT_YUV422:</div><div class='add'>+	case DRM_FORMAT_YVU422:</div><div class='add'>+	case DRM_FORMAT_YUV444:</div><div class='add'>+	case DRM_FORMAT_YVU444:</div><div class='add'>+		return 1;</div><div class='add'>+	default:</div><div class='add'>+		drm_fb_get_bpp_depth(format, &amp;depth, &amp;bpp);</div><div class='add'>+		return bpp &gt;&gt; 3;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_format_plane_cpp);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_format_horz_chroma_subsampling - get the horizontal chroma subsampling factor</div><div class='add'>+ * @format: pixel format (DRM_FORMAT_*)</div><div class='add'>+ *</div><div class='add'>+ * RETURNS:</div><div class='add'>+ * The horizontal chroma subsampling factor for the</div><div class='add'>+ * specified pixel format.</div><div class='add'>+ */</div><div class='add'>+int drm_format_horz_chroma_subsampling(uint32_t format)</div><div class='add'>+{</div><div class='add'>+	switch (format) {</div><div class='add'>+	case DRM_FORMAT_YUV411:</div><div class='add'>+	case DRM_FORMAT_YVU411:</div><div class='add'>+	case DRM_FORMAT_YUV410:</div><div class='add'>+	case DRM_FORMAT_YVU410:</div><div class='add'>+		return 4;</div><div class='add'>+	case DRM_FORMAT_YUYV:</div><div class='add'>+	case DRM_FORMAT_YVYU:</div><div class='add'>+	case DRM_FORMAT_UYVY:</div><div class='add'>+	case DRM_FORMAT_VYUY:</div><div class='add'>+	case DRM_FORMAT_NV12:</div><div class='add'>+	case DRM_FORMAT_NV21:</div><div class='add'>+	case DRM_FORMAT_NV16:</div><div class='add'>+	case DRM_FORMAT_NV61:</div><div class='add'>+	case DRM_FORMAT_YUV422:</div><div class='add'>+	case DRM_FORMAT_YVU422:</div><div class='add'>+	case DRM_FORMAT_YUV420:</div><div class='add'>+	case DRM_FORMAT_YVU420:</div><div class='add'>+		return 2;</div><div class='add'>+	default:</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_format_horz_chroma_subsampling);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * drm_format_vert_chroma_subsampling - get the vertical chroma subsampling factor</div><div class='add'>+ * @format: pixel format (DRM_FORMAT_*)</div><div class='add'>+ *</div><div class='add'>+ * RETURNS:</div><div class='add'>+ * The vertical chroma subsampling factor for the</div><div class='add'>+ * specified pixel format.</div><div class='add'>+ */</div><div class='add'>+int drm_format_vert_chroma_subsampling(uint32_t format)</div><div class='add'>+{</div><div class='add'>+	switch (format) {</div><div class='add'>+	case DRM_FORMAT_YUV410:</div><div class='add'>+	case DRM_FORMAT_YVU410:</div><div class='add'>+		return 4;</div><div class='add'>+	case DRM_FORMAT_YUV420:</div><div class='add'>+	case DRM_FORMAT_YVU420:</div><div class='add'>+	case DRM_FORMAT_NV12:</div><div class='add'>+	case DRM_FORMAT_NV21:</div><div class='add'>+		return 2;</div><div class='add'>+	default:</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_format_vert_chroma_subsampling);</div><div class='head'>diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c<br/>index 81118893264c..3252e7067d8b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_crtc_helper.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_crtc_helper.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_crtc_helper.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_crtc_helper.c</a></div><div class='hunk'>@@ -518,7 +518,7 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)</div><div class='ctx'> 	int count = 0, ro, fail = 0;</div><div class='ctx'> 	struct drm_crtc_helper_funcs *crtc_funcs;</div><div class='ctx'> 	struct drm_mode_set save_set;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("\n");</div><div class='hunk'>@@ -1023,36 +1023,3 @@ void drm_helper_hpd_irq_event(struct drm_device *dev)</div><div class='ctx'> 		queue_delayed_work(system_nrt_wq, &amp;dev-&gt;mode_config.output_poll_work, 0);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_helper_hpd_irq_event);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * drm_format_num_planes - get the number of planes for format</div><div class='del'>- * @format: pixel format (DRM_FORMAT_*)</div><div class='del'>- *</div><div class='del'>- * RETURNS:</div><div class='del'>- * The number of planes used by the specified pixel format.</div><div class='del'>- */</div><div class='del'>-int drm_format_num_planes(uint32_t format)</div><div class='del'>-{</div><div class='del'>-	switch (format) {</div><div class='del'>-	case DRM_FORMAT_YUV410:</div><div class='del'>-	case DRM_FORMAT_YVU410:</div><div class='del'>-	case DRM_FORMAT_YUV411:</div><div class='del'>-	case DRM_FORMAT_YVU411:</div><div class='del'>-	case DRM_FORMAT_YUV420:</div><div class='del'>-	case DRM_FORMAT_YVU420:</div><div class='del'>-	case DRM_FORMAT_YUV422:</div><div class='del'>-	case DRM_FORMAT_YVU422:</div><div class='del'>-	case DRM_FORMAT_YUV444:</div><div class='del'>-	case DRM_FORMAT_YVU444:</div><div class='del'>-		return 3;</div><div class='del'>-	case DRM_FORMAT_NV12:</div><div class='del'>-	case DRM_FORMAT_NV21:</div><div class='del'>-	case DRM_FORMAT_NV16:</div><div class='del'>-	case DRM_FORMAT_NV61:</div><div class='del'>-		return 2;</div><div class='del'>-	default:</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(drm_format_num_planes);</div><div class='head'>diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c<br/>index 6116e3b75393..8a9d0792e4ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_drv.c</a></div><div class='hunk'>@@ -163,7 +163,9 @@ static struct drm_ioctl_desc drm_ioctls[] = {</div><div class='ctx'> 	DRM_IOCTL_DEF(DRM_IOCTL_MODE_DIRTYFB, drm_mode_dirtyfb_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),</div><div class='ctx'> 	DRM_IOCTL_DEF(DRM_IOCTL_MODE_CREATE_DUMB, drm_mode_create_dumb_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),</div><div class='ctx'> 	DRM_IOCTL_DEF(DRM_IOCTL_MODE_MAP_DUMB, drm_mode_mmap_dumb_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),</div><div class='del'>-	DRM_IOCTL_DEF(DRM_IOCTL_MODE_DESTROY_DUMB, drm_mode_destroy_dumb_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED)</div><div class='add'>+	DRM_IOCTL_DEF(DRM_IOCTL_MODE_DESTROY_DUMB, drm_mode_destroy_dumb_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),</div><div class='add'>+	DRM_IOCTL_DEF(DRM_IOCTL_MODE_OBJ_GETPROPERTIES, drm_mode_obj_get_properties_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),</div><div class='add'>+	DRM_IOCTL_DEF(DRM_IOCTL_MODE_OBJ_SETPROPERTY, drm_mode_obj_set_property_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define DRM_CORE_IOCTL_COUNT	ARRAY_SIZE( drm_ioctls )</div><div class='head'>diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c<br/>index 5a18b0df8285..eb92fe257a39 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_edid.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_edid.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_edid.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_edid.c</a></div><div class='hunk'>@@ -30,7 +30,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "drm_edid.h"</div><div class='ctx'> #include "drm_edid_modes.h"</div><div class='hunk'>@@ -66,6 +66,8 @@</div><div class='ctx'> #define EDID_QUIRK_FIRST_DETAILED_PREFERRED	(1 &lt;&lt; 5)</div><div class='ctx'> /* use +hsync +vsync for detailed mode */</div><div class='ctx'> #define EDID_QUIRK_DETAILED_SYNC_PP		(1 &lt;&lt; 6)</div><div class='add'>+/* Force reduced-blanking timings for detailed modes */</div><div class='add'>+#define EDID_QUIRK_FORCE_REDUCED_BLANKING	(1 &lt;&lt; 7)</div><div class='ctx'> </div><div class='ctx'> struct detailed_mode_closure {</div><div class='ctx'> 	struct drm_connector *connector;</div><div class='hunk'>@@ -81,7 +83,7 @@ struct detailed_mode_closure {</div><div class='ctx'> #define LEVEL_CVT	3</div><div class='ctx'> </div><div class='ctx'> static struct edid_quirk {</div><div class='del'>-	char *vendor;</div><div class='add'>+	char vendor[4];</div><div class='ctx'> 	int product_id;</div><div class='ctx'> 	u32 quirks;</div><div class='ctx'> } edid_quirk_list[] = {</div><div class='hunk'>@@ -120,6 +122,9 @@ static struct edid_quirk {</div><div class='ctx'> 	/* Samsung SyncMaster 22[5-6]BW */</div><div class='ctx'> 	{ "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },</div><div class='ctx'> 	{ "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },</div><div class='add'>+</div><div class='add'>+	/* ViewSonic VA2026w */</div><div class='add'>+	{ "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*** DDC fetch and block validation ***/</div><div class='hunk'>@@ -144,21 +149,28 @@ int drm_edid_header_is_valid(const u8 *raw_edid)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_edid_header_is_valid);</div><div class='ctx'> </div><div class='add'>+static int edid_fixup __read_mostly = 6;</div><div class='add'>+module_param_named(edid_fixup, edid_fixup, int, 0400);</div><div class='add'>+MODULE_PARM_DESC(edid_fixup,</div><div class='add'>+		 "Minimum number of valid EDID header bytes (0-8, default 6)");</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Sanity check the EDID block (base or extension).  Return 0 if the block</div><div class='ctx'>  * doesn't check out, or 1 if it's valid.</div><div class='ctx'>  */</div><div class='del'>-bool drm_edid_block_valid(u8 *raw_edid)</div><div class='add'>+bool drm_edid_block_valid(u8 *raw_edid, int block)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u8 csum = 0;</div><div class='ctx'> 	struct edid *edid = (struct edid *)raw_edid;</div><div class='ctx'> </div><div class='del'>-	if (raw_edid[0] == 0x00) {</div><div class='add'>+	if (edid_fixup &gt; 8 || edid_fixup &lt; 0)</div><div class='add'>+		edid_fixup = 6;</div><div class='add'>+</div><div class='add'>+	if (block == 0) {</div><div class='ctx'> 		int score = drm_edid_header_is_valid(raw_edid);</div><div class='ctx'> 		if (score == 8) ;</div><div class='del'>-		else if (score &gt;= 6) {</div><div class='add'>+		else if (score &gt;= edid_fixup) {</div><div class='ctx'> 			DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");</div><div class='ctx'> 			memcpy(raw_edid, edid_header, sizeof(edid_header));</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -219,7 +231,7 @@ bool drm_edid_is_valid(struct edid *edid)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt;= edid-&gt;extensions; i++)</div><div class='del'>-		if (!drm_edid_block_valid(raw + i * EDID_LENGTH))</div><div class='add'>+		if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i))</div><div class='ctx'> 			return false;</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -299,7 +311,7 @@ drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)</div><div class='ctx'> 	for (i = 0; i &lt; 4; i++) {</div><div class='ctx'> 		if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))</div><div class='ctx'> 			goto out;</div><div class='del'>-		if (drm_edid_block_valid(block))</div><div class='add'>+		if (drm_edid_block_valid(block, 0))</div><div class='ctx'> 			break;</div><div class='ctx'> 		if (i == 0 &amp;&amp; drm_edid_is_zero(block, EDID_LENGTH)) {</div><div class='ctx'> 			connector-&gt;null_edid_counter++;</div><div class='hunk'>@@ -324,7 +336,7 @@ drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)</div><div class='ctx'> 				  block + (valid_extensions + 1) * EDID_LENGTH,</div><div class='ctx'> 				  j, EDID_LENGTH))</div><div class='ctx'> 				goto out;</div><div class='del'>-			if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH)) {</div><div class='add'>+			if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j)) {</div><div class='ctx'> 				valid_extensions++;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -486,23 +498,47 @@ static void edid_fixup_preferred(struct drm_connector *connector,</div><div class='ctx'> 	preferred_mode-&gt;type |= DRM_MODE_TYPE_PREFERRED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool</div><div class='add'>+mode_is_rb(const struct drm_display_mode *mode)</div><div class='add'>+{</div><div class='add'>+	return (mode-&gt;htotal - mode-&gt;hdisplay == 160) &amp;&amp;</div><div class='add'>+	       (mode-&gt;hsync_end - mode-&gt;hdisplay == 80) &amp;&amp;</div><div class='add'>+	       (mode-&gt;hsync_end - mode-&gt;hsync_start == 32) &amp;&amp;</div><div class='add'>+	       (mode-&gt;vsync_start - mode-&gt;vdisplay == 3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * drm_mode_find_dmt - Create a copy of a mode if present in DMT</div><div class='add'>+ * @dev: Device to duplicate against</div><div class='add'>+ * @hsize: Mode width</div><div class='add'>+ * @vsize: Mode height</div><div class='add'>+ * @fresh: Mode refresh rate</div><div class='add'>+ * @rb: Mode reduced-blanking-ness</div><div class='add'>+ *</div><div class='add'>+ * Walk the DMT mode list looking for a match for the given parameters.</div><div class='add'>+ * Return a newly allocated copy of the mode, or NULL if not found.</div><div class='add'>+ */</div><div class='ctx'> struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,</div><div class='del'>-					   int hsize, int vsize, int fresh)</div><div class='add'>+					   int hsize, int vsize, int fresh,</div><div class='add'>+					   bool rb)</div><div class='ctx'> {</div><div class='del'>-	struct drm_display_mode *mode = NULL;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; drm_num_dmt_modes; i++) {</div><div class='ctx'> 		const struct drm_display_mode *ptr = &amp;drm_dmt_modes[i];</div><div class='del'>-		if (hsize == ptr-&gt;hdisplay &amp;&amp;</div><div class='del'>-			vsize == ptr-&gt;vdisplay &amp;&amp;</div><div class='del'>-			fresh == drm_mode_vrefresh(ptr)) {</div><div class='del'>-			/* get the expected default mode */</div><div class='del'>-			mode = drm_mode_duplicate(dev, ptr);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+		if (hsize != ptr-&gt;hdisplay)</div><div class='add'>+			continue;</div><div class='add'>+		if (vsize != ptr-&gt;vdisplay)</div><div class='add'>+			continue;</div><div class='add'>+		if (fresh != drm_mode_vrefresh(ptr))</div><div class='add'>+			continue;</div><div class='add'>+		if (rb != mode_is_rb(ptr))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		return drm_mode_duplicate(dev, ptr);</div><div class='ctx'> 	}</div><div class='del'>-	return mode;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_mode_find_dmt);</div><div class='ctx'> </div><div class='hunk'>@@ -731,10 +767,17 @@ drm_mode_std(struct drm_connector *connector, struct edid *edid,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* check whether it can be found in default mode table */</div><div class='del'>-	mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate);</div><div class='add'>+	if (drm_monitor_supports_rb(edid)) {</div><div class='add'>+		mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,</div><div class='add'>+					 true);</div><div class='add'>+		if (mode)</div><div class='add'>+			return mode;</div><div class='add'>+	}</div><div class='add'>+	mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);</div><div class='ctx'> 	if (mode)</div><div class='ctx'> 		return mode;</div><div class='ctx'> </div><div class='add'>+	/* okay, generate it */</div><div class='ctx'> 	switch (timing_level) {</div><div class='ctx'> 	case LEVEL_DMT:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -748,6 +791,8 @@ drm_mode_std(struct drm_connector *connector, struct edid *edid,</div><div class='ctx'> 		 * secondary GTF curve.  Please don't do that.</div><div class='ctx'> 		 */</div><div class='ctx'> 		mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);</div><div class='add'>+		if (!mode)</div><div class='add'>+			return NULL;</div><div class='ctx'> 		if (drm_mode_hsync(mode) &gt; drm_gtf2_hbreak(edid)) {</div><div class='ctx'> 			drm_mode_destroy(dev, mode);</div><div class='ctx'> 			mode = drm_gtf_mode_complex(dev, hsize, vsize,</div><div class='hunk'>@@ -852,12 +897,19 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,</div><div class='ctx'> 				"Wrong Hsync/Vsync pulse width\n");</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (quirks &amp; EDID_QUIRK_FORCE_REDUCED_BLANKING) {</div><div class='add'>+		mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);</div><div class='add'>+		if (!mode)</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		goto set_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mode = drm_mode_create(dev);</div><div class='ctx'> 	if (!mode)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	mode-&gt;type = DRM_MODE_TYPE_DRIVER;</div><div class='del'>-</div><div class='ctx'> 	if (quirks &amp; EDID_QUIRK_135_CLOCK_TOO_HIGH)</div><div class='ctx'> 		timing-&gt;pixel_clock = cpu_to_le16(1088);</div><div class='ctx'> </div><div class='hunk'>@@ -881,8 +933,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	drm_mode_do_interlace_quirk(mode, pt);</div><div class='ctx'> </div><div class='del'>-	drm_mode_set_name(mode);</div><div class='del'>-</div><div class='ctx'> 	if (quirks &amp; EDID_QUIRK_DETAILED_SYNC_PP) {</div><div class='ctx'> 		pt-&gt;misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -892,6 +942,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,</div><div class='ctx'> 	mode-&gt;flags |= (pt-&gt;misc &amp; DRM_EDID_PT_VSYNC_POSITIVE) ?</div><div class='ctx'> 		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;</div><div class='ctx'> </div><div class='add'>+set_size:</div><div class='ctx'> 	mode-&gt;width_mm = pt-&gt;width_mm_lo | (pt-&gt;width_height_mm_hi &amp; 0xf0) &lt;&lt; 4;</div><div class='ctx'> 	mode-&gt;height_mm = pt-&gt;height_mm_lo | (pt-&gt;width_height_mm_hi &amp; 0xf) &lt;&lt; 8;</div><div class='ctx'> </div><div class='hunk'>@@ -905,16 +956,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,</div><div class='ctx'> 		mode-&gt;height_mm = edid-&gt;height_cm * 10;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return mode;</div><div class='del'>-}</div><div class='add'>+	mode-&gt;type = DRM_MODE_TYPE_DRIVER;</div><div class='add'>+	drm_mode_set_name(mode);</div><div class='ctx'> </div><div class='del'>-static bool</div><div class='del'>-mode_is_rb(const struct drm_display_mode *mode)</div><div class='del'>-{</div><div class='del'>-	return (mode-&gt;htotal - mode-&gt;hdisplay == 160) &amp;&amp;</div><div class='del'>-	       (mode-&gt;hsync_end - mode-&gt;hdisplay == 80) &amp;&amp;</div><div class='del'>-	       (mode-&gt;hsync_end - mode-&gt;hsync_start == 32) &amp;&amp;</div><div class='del'>-	       (mode-&gt;vsync_start - mode-&gt;vdisplay == 3);</div><div class='add'>+	return mode;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool</div><div class='hunk'>@@ -994,12 +1039,8 @@ mode_in_range(const struct drm_display_mode *mode, struct edid *edid,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will</div><div class='del'>- * need to account for them.</div><div class='del'>- */</div><div class='ctx'> static int</div><div class='del'>-drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,</div><div class='add'>+drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,</div><div class='ctx'> 			struct detailed_timing *timing)</div><div class='ctx'> {</div><div class='ctx'> 	int i, modes = 0;</div><div class='hunk'>@@ -1019,17 +1060,110 @@ drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,</div><div class='ctx'> 	return modes;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* fix up 1366x768 mode from 1368x768;</div><div class='add'>+ * GFT/CVT can't express 1366 width which isn't dividable by 8</div><div class='add'>+ */</div><div class='add'>+static void fixup_mode_1366x768(struct drm_display_mode *mode)</div><div class='add'>+{</div><div class='add'>+	if (mode-&gt;hdisplay == 1368 &amp;&amp; mode-&gt;vdisplay == 768) {</div><div class='add'>+		mode-&gt;hdisplay = 1366;</div><div class='add'>+		mode-&gt;hsync_start--;</div><div class='add'>+		mode-&gt;hsync_end--;</div><div class='add'>+		drm_mode_set_name(mode);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,</div><div class='add'>+			struct detailed_timing *timing)</div><div class='add'>+{</div><div class='add'>+	int i, modes = 0;</div><div class='add'>+	struct drm_display_mode *newmode;</div><div class='add'>+	struct drm_device *dev = connector-&gt;dev;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_extra_modes; i++) {</div><div class='add'>+		const struct minimode *m = &amp;extra_modes[i];</div><div class='add'>+		newmode = drm_gtf_mode(dev, m-&gt;w, m-&gt;h, m-&gt;r, 0, 0);</div><div class='add'>+		if (!newmode)</div><div class='add'>+			return modes;</div><div class='add'>+</div><div class='add'>+		fixup_mode_1366x768(newmode);</div><div class='add'>+		if (!mode_in_range(newmode, edid, timing)) {</div><div class='add'>+			drm_mode_destroy(dev, newmode);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		drm_mode_probed_add(connector, newmode);</div><div class='add'>+		modes++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return modes;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,</div><div class='add'>+			struct detailed_timing *timing)</div><div class='add'>+{</div><div class='add'>+	int i, modes = 0;</div><div class='add'>+	struct drm_display_mode *newmode;</div><div class='add'>+	struct drm_device *dev = connector-&gt;dev;</div><div class='add'>+	bool rb = drm_monitor_supports_rb(edid);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_extra_modes; i++) {</div><div class='add'>+		const struct minimode *m = &amp;extra_modes[i];</div><div class='add'>+		newmode = drm_cvt_mode(dev, m-&gt;w, m-&gt;h, m-&gt;r, rb, 0, 0);</div><div class='add'>+		if (!newmode)</div><div class='add'>+			return modes;</div><div class='add'>+</div><div class='add'>+		fixup_mode_1366x768(newmode);</div><div class='add'>+		if (!mode_in_range(newmode, edid, timing)) {</div><div class='add'>+			drm_mode_destroy(dev, newmode);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		drm_mode_probed_add(connector, newmode);</div><div class='add'>+		modes++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return modes;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> do_inferred_modes(struct detailed_timing *timing, void *c)</div><div class='ctx'> {</div><div class='ctx'> 	struct detailed_mode_closure *closure = c;</div><div class='ctx'> 	struct detailed_non_pixel *data = &amp;timing-&gt;data.other_data;</div><div class='del'>-	int gtf = (closure-&gt;edid-&gt;features &amp; DRM_EDID_FEATURE_DEFAULT_GTF);</div><div class='add'>+	struct detailed_data_monitor_range *range = &amp;data-&gt;data.range;</div><div class='add'>+</div><div class='add'>+	if (data-&gt;type != EDID_DETAIL_MONITOR_RANGE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	closure-&gt;modes += drm_dmt_modes_for_range(closure-&gt;connector,</div><div class='add'>+						  closure-&gt;edid,</div><div class='add'>+						  timing);</div><div class='add'>+	</div><div class='add'>+	if (!version_greater(closure-&gt;edid, 1, 1))</div><div class='add'>+		return; /* GTF not defined yet */</div><div class='ctx'> </div><div class='del'>-	if (gtf &amp;&amp; data-&gt;type == EDID_DETAIL_MONITOR_RANGE)</div><div class='add'>+	switch (range-&gt;flags) {</div><div class='add'>+	case 0x02: /* secondary gtf, XXX could do more */</div><div class='add'>+	case 0x00: /* default gtf */</div><div class='ctx'> 		closure-&gt;modes += drm_gtf_modes_for_range(closure-&gt;connector,</div><div class='ctx'> 							  closure-&gt;edid,</div><div class='ctx'> 							  timing);</div><div class='add'>+		break;</div><div class='add'>+	case 0x04: /* cvt, only in 1.4+ */</div><div class='add'>+		if (!version_greater(closure-&gt;edid, 1, 3))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		closure-&gt;modes += drm_cvt_modes_for_range(closure-&gt;connector,</div><div class='add'>+							  closure-&gt;edid,</div><div class='add'>+							  timing);</div><div class='add'>+		break;</div><div class='add'>+	case 0x01: /* just the ranges, no formula */</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -1062,8 +1196,8 @@ drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)</div><div class='ctx'> 				mode = drm_mode_find_dmt(connector-&gt;dev,</div><div class='ctx'> 							 est3_modes[m].w,</div><div class='ctx'> 							 est3_modes[m].h,</div><div class='del'>-							 est3_modes[m].r</div><div class='del'>-							 /*, est3_modes[m].rb */);</div><div class='add'>+							 est3_modes[m].r,</div><div class='add'>+							 est3_modes[m].rb);</div><div class='ctx'> 				if (mode) {</div><div class='ctx'> 					drm_mode_probed_add(connector, mode);</div><div class='ctx'> 					modes++;</div><div class='hunk'>@@ -1312,6 +1446,8 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid,</div><div class='ctx'> #define VENDOR_BLOCK    0x03</div><div class='ctx'> #define SPEAKER_BLOCK	0x04</div><div class='ctx'> #define EDID_BASIC_AUDIO	(1 &lt;&lt; 6)</div><div class='add'>+#define EDID_CEA_YCRCB444	(1 &lt;&lt; 5)</div><div class='add'>+#define EDID_CEA_YCRCB422	(1 &lt;&lt; 4)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * Search EDID for CEA extension block.</div><div class='hunk'>@@ -1666,13 +1802,29 @@ static void drm_add_display_info(struct edid *edid,</div><div class='ctx'> 	info-&gt;bpc = 0;</div><div class='ctx'> 	info-&gt;color_formats = 0;</div><div class='ctx'> </div><div class='del'>-	/* Only defined for 1.4 with digital displays */</div><div class='del'>-	if (edid-&gt;revision &lt; 4)</div><div class='add'>+	if (edid-&gt;revision &lt; 3)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (!(edid-&gt;input &amp; DRM_EDID_INPUT_DIGITAL))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* Get data from CEA blocks if present */</div><div class='add'>+	edid_ext = drm_find_cea_extension(edid);</div><div class='add'>+	if (edid_ext) {</div><div class='add'>+		info-&gt;cea_rev = edid_ext[1];</div><div class='add'>+</div><div class='add'>+		/* The existence of a CEA block should imply RGB support */</div><div class='add'>+		info-&gt;color_formats = DRM_COLOR_FORMAT_RGB444;</div><div class='add'>+		if (edid_ext[3] &amp; EDID_CEA_YCRCB444)</div><div class='add'>+			info-&gt;color_formats |= DRM_COLOR_FORMAT_YCRCB444;</div><div class='add'>+		if (edid_ext[3] &amp; EDID_CEA_YCRCB422)</div><div class='add'>+			info-&gt;color_formats |= DRM_COLOR_FORMAT_YCRCB422;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Only defined for 1.4 with digital displays */</div><div class='add'>+	if (edid-&gt;revision &lt; 4)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	switch (edid-&gt;input &amp; DRM_EDID_DIGITAL_DEPTH_MASK) {</div><div class='ctx'> 	case DRM_EDID_DIGITAL_DEPTH_6:</div><div class='ctx'> 		info-&gt;bpc = 6;</div><div class='hunk'>@@ -1698,18 +1850,11 @@ static void drm_add_display_info(struct edid *edid,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	info-&gt;color_formats = DRM_COLOR_FORMAT_RGB444;</div><div class='del'>-	if (info-&gt;color_formats &amp; DRM_EDID_FEATURE_RGB_YCRCB444)</div><div class='del'>-		info-&gt;color_formats = DRM_COLOR_FORMAT_YCRCB444;</div><div class='del'>-	if (info-&gt;color_formats &amp; DRM_EDID_FEATURE_RGB_YCRCB422)</div><div class='del'>-		info-&gt;color_formats = DRM_COLOR_FORMAT_YCRCB422;</div><div class='del'>-</div><div class='del'>-	/* Get data from CEA blocks if present */</div><div class='del'>-	edid_ext = drm_find_cea_extension(edid);</div><div class='del'>-	if (!edid_ext)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	info-&gt;cea_rev = edid_ext[1];</div><div class='add'>+	info-&gt;color_formats |= DRM_COLOR_FORMAT_RGB444;</div><div class='add'>+	if (edid-&gt;features &amp; DRM_EDID_FEATURE_RGB_YCRCB444)</div><div class='add'>+		info-&gt;color_formats |= DRM_COLOR_FORMAT_YCRCB444;</div><div class='add'>+	if (edid-&gt;features &amp; DRM_EDID_FEATURE_RGB_YCRCB422)</div><div class='add'>+		info-&gt;color_formats |= DRM_COLOR_FORMAT_YCRCB422;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/gpu/drm/drm_edid_load.c b/drivers/gpu/drm/drm_edid_load.c<br/>index da9acba2dd6c..66d4a28ad5a2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_edid_load.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_edid_load.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_edid_load.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_edid_load.c</a></div><div class='hunk'>@@ -173,7 +173,7 @@ static int edid_load(struct drm_connector *connector, char *name,</div><div class='ctx'> 	}</div><div class='ctx'> 	memcpy(edid, fwdata, fwsize);</div><div class='ctx'> </div><div class='del'>-	if (!drm_edid_block_valid(edid)) {</div><div class='add'>+	if (!drm_edid_block_valid(edid, 0)) {</div><div class='ctx'> 		DRM_ERROR("Base block of EDID firmware \"%s\" is invalid ",</div><div class='ctx'> 		    name);</div><div class='ctx'> 		kfree(edid);</div><div class='hunk'>@@ -185,7 +185,7 @@ static int edid_load(struct drm_connector *connector, char *name,</div><div class='ctx'> 		if (i != valid_extensions + 1)</div><div class='ctx'> 			memcpy(edid + (valid_extensions + 1) * EDID_LENGTH,</div><div class='ctx'> 			    edid + i * EDID_LENGTH, EDID_LENGTH);</div><div class='del'>-		if (drm_edid_block_valid(edid + i * EDID_LENGTH))</div><div class='add'>+		if (drm_edid_block_valid(edid + i * EDID_LENGTH, i))</div><div class='ctx'> 			valid_extensions++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -220,18 +220,18 @@ int drm_load_edid_firmware(struct drm_connector *connector)</div><div class='ctx'> {</div><div class='ctx'> 	char *connector_name = drm_get_connector_name(connector);</div><div class='ctx'> 	char *edidname = edid_firmware, *last, *colon;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (*edidname == '\0')</div><div class='del'>-		return ret;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	colon = strchr(edidname, ':');</div><div class='ctx'> 	if (colon != NULL) {</div><div class='ctx'> 		if (strncmp(connector_name, edidname, colon - edidname))</div><div class='del'>-			return ret;</div><div class='add'>+			return 0;</div><div class='ctx'> 		edidname = colon + 1;</div><div class='ctx'> 		if (*edidname == '\0')</div><div class='del'>-			return ret;</div><div class='add'>+			return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	last = edidname + strlen(edidname) - 1;</div><div class='head'>diff --git a/drivers/gpu/drm/drm_edid_modes.h b/drivers/gpu/drm/drm_edid_modes.h<br/>index a91ffb117220..ff98a7eb38dd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_edid_modes.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_edid_modes.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_edid_modes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_edid_modes.h</a></div><div class='hunk'>@@ -30,7 +30,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Autogenerated from the DMT spec.</div><div class='ctx'>  * This table is copied from xfree86/modes/xf86EdidModes.c.</div><div class='del'>- * But the mode with Reduced blank feature is deleted.</div><div class='ctx'>  */</div><div class='ctx'> static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	/* 640x350@85Hz */</div><div class='hunk'>@@ -81,6 +80,10 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,</div><div class='ctx'> 		   896, 1048, 0, 600, 601, 604, 631, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 800x600@120Hz RB */</div><div class='add'>+	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,</div><div class='add'>+		   880, 960, 0, 600, 603, 607, 636, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 848x480@60Hz */</div><div class='ctx'> 	{ DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,</div><div class='ctx'> 		   976, 1088, 0, 480, 486, 494, 517, 0,</div><div class='hunk'>@@ -106,10 +109,18 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,</div><div class='ctx'> 		   1168, 1376, 0, 768, 769, 772, 808, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1024x768@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,</div><div class='add'>+		   1104, 1184, 0, 768, 771, 775, 813, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 1152x864@75Hz */</div><div class='ctx'> 	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,</div><div class='ctx'> 		   1344, 1600, 0, 864, 865, 868, 900, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1280x768@60Hz RB */</div><div class='add'>+	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,</div><div class='add'>+		   1360, 1440, 0, 768, 771, 778, 790, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 1280x768@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,</div><div class='ctx'> 		   1472, 1664, 0, 768, 771, 778, 798, 0,</div><div class='hunk'>@@ -122,6 +133,14 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,</div><div class='ctx'> 		   1496, 1712, 0, 768, 771, 778, 809, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1280x768@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,</div><div class='add'>+		   1360, 1440, 0, 768, 771, 778, 813, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='add'>+	/* 1280x800@60Hz RB */</div><div class='add'>+	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,</div><div class='add'>+		   1360, 1440, 0, 800, 803, 809, 823, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 1280x800@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,</div><div class='ctx'> 		   1480, 1680, 0, 800, 803, 809, 831, 0,</div><div class='hunk'>@@ -134,6 +153,10 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,</div><div class='ctx'> 		   1496, 1712, 0, 800, 803, 809, 843, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1280x800@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,</div><div class='add'>+		   1360, 1440, 0, 800, 803, 809, 847, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 1280x960@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,</div><div class='ctx'> 		   1488, 1800, 0, 960, 961, 964, 1000, 0,</div><div class='hunk'>@@ -142,6 +165,10 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,</div><div class='ctx'> 		   1504, 1728, 0, 960, 961, 964, 1011, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1280x960@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,</div><div class='add'>+		   1360, 1440, 0, 960, 963, 967, 1017, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 1280x1024@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,</div><div class='ctx'> 		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,</div><div class='hunk'>@@ -154,22 +181,42 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,</div><div class='ctx'> 		   1504, 1728, 0, 1024, 1025, 1028, 1072, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1280x1024@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,</div><div class='add'>+		   1360, 1440, 0, 1024, 1027, 1034, 1084, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 1360x768@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,</div><div class='ctx'> 		   1536, 1792, 0, 768, 771, 777, 795, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1440x1050@60Hz */</div><div class='add'>+	/* 1360x768@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,</div><div class='add'>+		   1440, 1520, 0, 768, 771, 776, 813, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='add'>+	/* 1400x1050@60Hz RB */</div><div class='add'>+	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,</div><div class='add'>+		   1480, 1560, 0, 1050, 1053, 1057, 1080, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='add'>+	/* 1400x1050@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,</div><div class='ctx'> 		   1632, 1864, 0, 1050, 1053, 1057, 1089, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1440x1050@75Hz */</div><div class='add'>+	/* 1400x1050@75Hz */</div><div class='ctx'> 	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,</div><div class='ctx'> 		   1648, 1896, 0, 1050, 1053, 1057, 1099, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1440x1050@85Hz */</div><div class='add'>+	/* 1400x1050@85Hz */</div><div class='ctx'> 	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,</div><div class='ctx'> 		   1656, 1912, 0, 1050, 1053, 1057, 1105, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1400x1050@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,</div><div class='add'>+		   1480, 1560, 0, 1050, 1053, 1057, 1112, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='add'>+	/* 1440x900@60Hz RB */</div><div class='add'>+	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,</div><div class='add'>+		   1520, 1600, 0, 900, 903, 909, 926, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 1440x900@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,</div><div class='ctx'> 		   1672, 1904, 0, 900, 903, 909, 934, 0,</div><div class='hunk'>@@ -182,6 +229,10 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,</div><div class='ctx'> 		   1696, 1952, 0, 900, 903, 909, 948, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1440x900@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,</div><div class='add'>+		   1520, 1600, 0, 900, 903, 909, 953, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 1600x1200@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,</div><div class='ctx'> 		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,</div><div class='hunk'>@@ -202,6 +253,14 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,</div><div class='ctx'> 		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1600x1200@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,</div><div class='add'>+		   1680, 1760, 0, 1200, 1203, 1207, 1271, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='add'>+	/* 1680x1050@60Hz RB */</div><div class='add'>+	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,</div><div class='add'>+		   1760, 1840, 0, 1050, 1053, 1059, 1080, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 1680x1050@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,</div><div class='ctx'> 		   1960, 2240, 0, 1050, 1053, 1059, 1089, 0,</div><div class='hunk'>@@ -214,15 +273,23 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,</div><div class='ctx'> 		   1984, 2288, 0, 1050, 1053, 1059, 1105, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1680x1050@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,</div><div class='add'>+		   1760, 1840, 0, 1050, 1053, 1059, 1112, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 1792x1344@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,</div><div class='ctx'> 		   2120, 2448, 0, 1344, 1345, 1348, 1394, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1729x1344@75Hz */</div><div class='add'>+	/* 1792x1344@75Hz */</div><div class='ctx'> 	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,</div><div class='ctx'> 		   2104, 2456, 0, 1344, 1345, 1348, 1417, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1853x1392@60Hz */</div><div class='add'>+	/* 1792x1344@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,</div><div class='add'>+		   1872, 1952, 0, 1344, 1347, 1351, 1423, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='add'>+	/* 1856x1392@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,</div><div class='ctx'> 		   2176, 2528, 0, 1392, 1393, 1396, 1439, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='hunk'>@@ -230,6 +297,14 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,</div><div class='ctx'> 		   2208, 2560, 0, 1392, 1395, 1399, 1500, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1856x1392@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,</div><div class='add'>+		   1936, 2016, 0, 1392, 1395, 1399, 1474, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='add'>+	/* 1920x1200@60Hz RB */</div><div class='add'>+	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,</div><div class='add'>+		   2000, 2080, 0, 1200, 1203, 1209, 1235, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 1920x1200@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,</div><div class='ctx'> 		   2256, 2592, 0, 1200, 1203, 1209, 1245, 0,</div><div class='hunk'>@@ -242,6 +317,10 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,</div><div class='ctx'> 		   2272, 2624, 0, 1200, 1203, 1209, 1262, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1920x1200@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,</div><div class='add'>+		   2000, 2080, 0, 1200, 1203, 1209, 1271, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 1920x1440@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,</div><div class='ctx'> 		   2256, 2600, 0, 1440, 1441, 1444, 1500, 0,</div><div class='hunk'>@@ -250,6 +329,14 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,</div><div class='ctx'> 		   2288, 2640, 0, 1440, 1441, 1444, 1500, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 1920x1440@120Hz RB */</div><div class='add'>+	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,</div><div class='add'>+		   2000, 2080, 0, 1440, 1443, 1447, 1525, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='add'>+	/* 2560x1600@60Hz RB */</div><div class='add'>+	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,</div><div class='add'>+		   2640, 2720, 0, 1600, 1603, 1609, 1646, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='ctx'> 	/* 2560x1600@60Hz */</div><div class='ctx'> 	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,</div><div class='ctx'> 		   3032, 3504, 0, 1600, 1603, 1609, 1658, 0,</div><div class='hunk'>@@ -262,6 +349,11 @@ static const struct drm_display_mode drm_dmt_modes[] = {</div><div class='ctx'> 	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,</div><div class='ctx'> 		   3048, 3536, 0, 1600, 1603, 1609, 1682, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='add'>+	/* 2560x1600@120Hz RB */</div><div class='add'>+	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,</div><div class='add'>+		   2640, 2720, 0, 1600, 1603, 1609, 1694, 0,</div><div class='add'>+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> static const int drm_num_dmt_modes =</div><div class='ctx'> 	sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);</div><div class='hunk'>@@ -320,12 +412,14 @@ static const struct drm_display_mode edid_est_modes[] = {</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct {</div><div class='add'>+struct minimode {</div><div class='ctx'> 	short w;</div><div class='ctx'> 	short h;</div><div class='ctx'> 	short r;</div><div class='ctx'> 	short rb;</div><div class='del'>-} est3_modes[] = {</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct minimode est3_modes[] = {</div><div class='ctx'> 	/* byte 6 */</div><div class='ctx'> 	{ 640, 350, 85, 0 },</div><div class='ctx'> 	{ 640, 400, 85, 0 },</div><div class='hunk'>@@ -377,288 +471,304 @@ static const struct {</div><div class='ctx'> 	{ 1920, 1440, 60, 0 },</div><div class='ctx'> 	{ 1920, 1440, 75, 0 },</div><div class='ctx'> };</div><div class='del'>-static const int num_est3_modes = sizeof(est3_modes) / sizeof(est3_modes[0]);</div><div class='add'>+static const int num_est3_modes = ARRAY_SIZE(est3_modes);</div><div class='add'>+</div><div class='add'>+static const struct minimode extra_modes[] = {</div><div class='add'>+	{ 1024, 576,  60, 0 },</div><div class='add'>+	{ 1366, 768,  60, 0 },</div><div class='add'>+	{ 1600, 900,  60, 0 },</div><div class='add'>+	{ 1680, 945,  60, 0 },</div><div class='add'>+	{ 1920, 1080, 60, 0 },</div><div class='add'>+	{ 2048, 1152, 60, 0 },</div><div class='add'>+	{ 2048, 1536, 60, 0 },</div><div class='add'>+};</div><div class='add'>+static const int num_extra_modes = ARRAY_SIZE(extra_modes);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Probably taken from CEA-861 spec.</div><div class='ctx'>  * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.</div><div class='ctx'>  */</div><div class='ctx'> static const struct drm_display_mode edid_cea_modes[] = {</div><div class='del'>-	/* 640x480@60Hz */</div><div class='add'>+	/* 1 - 640x480@60Hz */</div><div class='ctx'> 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,</div><div class='ctx'> 		   752, 800, 0, 480, 490, 492, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 720x480@60Hz */</div><div class='add'>+	/* 2 - 720x480@60Hz */</div><div class='ctx'> 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,</div><div class='ctx'> 		   798, 858, 0, 480, 489, 495, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 720x480@60Hz */</div><div class='add'>+	/* 3 - 720x480@60Hz */</div><div class='ctx'> 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,</div><div class='ctx'> 		   798, 858, 0, 480, 489, 495, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1280x720@60Hz */</div><div class='add'>+	/* 4 - 1280x720@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,</div><div class='ctx'> 		   1430, 1650, 0, 720, 725, 730, 750, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1920x1080i@60Hz */</div><div class='add'>+	/* 5 - 1920x1080i@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,</div><div class='ctx'> 		   2052, 2200, 0, 1080, 1084, 1094, 1125, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |</div><div class='ctx'> 			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1440x480i@60Hz */</div><div class='add'>+	/* 6 - 1440x480i@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,</div><div class='ctx'> 		   1602, 1716, 0, 480, 488, 494, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='del'>-			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1440x480i@60Hz */</div><div class='add'>+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 7 - 1440x480i@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,</div><div class='ctx'> 		   1602, 1716, 0, 480, 488, 494, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='del'>-			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1440x240@60Hz */</div><div class='add'>+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 8 - 1440x240@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,</div><div class='ctx'> 		   1602, 1716, 0, 240, 244, 247, 262, 0,</div><div class='del'>-		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1440x240@60Hz */</div><div class='add'>+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='add'>+			DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 9 - 1440x240@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,</div><div class='ctx'> 		   1602, 1716, 0, 240, 244, 247, 262, 0,</div><div class='del'>-		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 2880x480i@60Hz */</div><div class='add'>+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='add'>+			DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 10 - 2880x480i@60Hz */</div><div class='ctx'> 	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,</div><div class='ctx'> 		   3204, 3432, 0, 480, 488, 494, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='ctx'> 			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 2880x480i@60Hz */</div><div class='add'>+	/* 11 - 2880x480i@60Hz */</div><div class='ctx'> 	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,</div><div class='ctx'> 		   3204, 3432, 0, 480, 488, 494, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='ctx'> 			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 2880x240@60Hz */</div><div class='add'>+	/* 12 - 2880x240@60Hz */</div><div class='ctx'> 	{ DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,</div><div class='ctx'> 		   3204, 3432, 0, 240, 244, 247, 262, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 2880x240@60Hz */</div><div class='add'>+	/* 13 - 2880x240@60Hz */</div><div class='ctx'> 	{ DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,</div><div class='ctx'> 		   3204, 3432, 0, 240, 244, 247, 262, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1440x480@60Hz */</div><div class='add'>+	/* 14 - 1440x480@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,</div><div class='ctx'> 		   1596, 1716, 0, 480, 489, 495, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1440x480@60Hz */</div><div class='add'>+	/* 15 - 1440x480@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,</div><div class='ctx'> 		   1596, 1716, 0, 480, 489, 495, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1920x1080@60Hz */</div><div class='add'>+	/* 16 - 1920x1080@60Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,</div><div class='ctx'> 		   2052, 2200, 0, 1080, 1084, 1089, 1125, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 720x576@50Hz */</div><div class='add'>+	/* 17 - 720x576@50Hz */</div><div class='ctx'> 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,</div><div class='ctx'> 		   796, 864, 0, 576, 581, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 720x576@50Hz */</div><div class='add'>+	/* 18 - 720x576@50Hz */</div><div class='ctx'> 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,</div><div class='ctx'> 		   796, 864, 0, 576, 581, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1280x720@50Hz */</div><div class='add'>+	/* 19 - 1280x720@50Hz */</div><div class='ctx'> 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,</div><div class='ctx'> 		   1760, 1980, 0, 720, 725, 730, 750, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1920x1080i@50Hz */</div><div class='add'>+	/* 20 - 1920x1080i@50Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,</div><div class='ctx'> 		   2492, 2640, 0, 1080, 1084, 1094, 1125, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |</div><div class='ctx'> 			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1440x576i@50Hz */</div><div class='add'>+	/* 21 - 1440x576i@50Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,</div><div class='ctx'> 		   1590, 1728, 0, 576, 580, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='del'>-			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1440x576i@50Hz */</div><div class='add'>+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 22 - 1440x576i@50Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,</div><div class='ctx'> 		   1590, 1728, 0, 576, 580, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='del'>-			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1440x288@50Hz */</div><div class='add'>+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 23 - 1440x288@50Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,</div><div class='ctx'> 		   1590, 1728, 0, 288, 290, 293, 312, 0,</div><div class='del'>-		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1440x288@50Hz */</div><div class='add'>+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='add'>+			DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 24 - 1440x288@50Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,</div><div class='ctx'> 		   1590, 1728, 0, 288, 290, 293, 312, 0,</div><div class='del'>-		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 2880x576i@50Hz */</div><div class='add'>+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='add'>+			DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 25 - 2880x576i@50Hz */</div><div class='ctx'> 	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,</div><div class='ctx'> 		   3180, 3456, 0, 576, 580, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='ctx'> 			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 2880x576i@50Hz */</div><div class='add'>+	/* 26 - 2880x576i@50Hz */</div><div class='ctx'> 	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,</div><div class='ctx'> 		   3180, 3456, 0, 576, 580, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='ctx'> 			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 2880x288@50Hz */</div><div class='add'>+	/* 27 - 2880x288@50Hz */</div><div class='ctx'> 	{ DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,</div><div class='ctx'> 		   3180, 3456, 0, 288, 290, 293, 312, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 2880x288@50Hz */</div><div class='add'>+	/* 28 - 2880x288@50Hz */</div><div class='ctx'> 	{ DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,</div><div class='ctx'> 		   3180, 3456, 0, 288, 290, 293, 312, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1440x576@50Hz */</div><div class='add'>+	/* 29 - 1440x576@50Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,</div><div class='ctx'> 		   1592, 1728, 0, 576, 581, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1440x576@50Hz */</div><div class='add'>+	/* 30 - 1440x576@50Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,</div><div class='ctx'> 		   1592, 1728, 0, 576, 581, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1920x1080@50Hz */</div><div class='add'>+	/* 31 - 1920x1080@50Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,</div><div class='ctx'> 		   2492, 2640, 0, 1080, 1084, 1089, 1125, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1920x1080@24Hz */</div><div class='add'>+	/* 32 - 1920x1080@24Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,</div><div class='ctx'> 		   2602, 2750, 0, 1080, 1084, 1089, 1125, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1920x1080@25Hz */</div><div class='add'>+	/* 33 - 1920x1080@25Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,</div><div class='ctx'> 		   2492, 2640, 0, 1080, 1084, 1089, 1125, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1920x1080@30Hz */</div><div class='add'>+	/* 34 - 1920x1080@30Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,</div><div class='ctx'> 		   2052, 2200, 0, 1080, 1084, 1089, 1125, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 2880x480@60Hz */</div><div class='add'>+	/* 35 - 2880x480@60Hz */</div><div class='ctx'> 	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,</div><div class='ctx'> 		   3192, 3432, 0, 480, 489, 495, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 2880x480@60Hz */</div><div class='add'>+	/* 36 - 2880x480@60Hz */</div><div class='ctx'> 	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,</div><div class='ctx'> 		   3192, 3432, 0, 480, 489, 495, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 2880x576@50Hz */</div><div class='add'>+	/* 37 - 2880x576@50Hz */</div><div class='ctx'> 	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,</div><div class='ctx'> 		   3184, 3456, 0, 576, 581, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 2880x576@50Hz */</div><div class='add'>+	/* 38 - 2880x576@50Hz */</div><div class='ctx'> 	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,</div><div class='ctx'> 		   3184, 3456, 0, 576, 581, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1920x1080i@50Hz */</div><div class='add'>+	/* 39 - 1920x1080i@50Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,</div><div class='ctx'> 		   2120, 2304, 0, 1080, 1126, 1136, 1250, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='ctx'> 			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1920x1080i@100Hz */</div><div class='add'>+	/* 40 - 1920x1080i@100Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,</div><div class='ctx'> 		   2492, 2640, 0, 1080, 1084, 1094, 1125, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |</div><div class='ctx'> 			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1280x720@100Hz */</div><div class='add'>+	/* 41 - 1280x720@100Hz */</div><div class='ctx'> 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,</div><div class='ctx'> 		   1760, 1980, 0, 720, 725, 730, 750, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 720x576@100Hz */</div><div class='add'>+	/* 42 - 720x576@100Hz */</div><div class='ctx'> 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,</div><div class='ctx'> 		   796, 864, 0, 576, 581, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 720x576@100Hz */</div><div class='add'>+	/* 43 - 720x576@100Hz */</div><div class='ctx'> 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,</div><div class='ctx'> 		   796, 864, 0, 576, 581, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1440x576i@100Hz */</div><div class='add'>+	/* 44 - 1440x576i@100Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,</div><div class='ctx'> 		   1590, 1728, 0, 576, 580, 586, 625, 0,</div><div class='del'>-		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1440x576i@100Hz */</div><div class='add'>+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='add'>+			DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 45 - 1440x576i@100Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,</div><div class='ctx'> 		   1590, 1728, 0, 576, 580, 586, 625, 0,</div><div class='del'>-		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1920x1080i@120Hz */</div><div class='add'>+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='add'>+			DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 46 - 1920x1080i@120Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,</div><div class='ctx'> 		   2052, 2200, 0, 1080, 1084, 1094, 1125, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |</div><div class='ctx'> 			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1280x720@120Hz */</div><div class='add'>+	/* 47 - 1280x720@120Hz */</div><div class='ctx'> 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,</div><div class='ctx'> 		   1430, 1650, 0, 720, 725, 730, 750, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 720x480@120Hz */</div><div class='add'>+	/* 48 - 720x480@120Hz */</div><div class='ctx'> 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,</div><div class='ctx'> 		   798, 858, 0, 480, 489, 495, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 720x480@120Hz */</div><div class='add'>+	/* 49 - 720x480@120Hz */</div><div class='ctx'> 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,</div><div class='ctx'> 		   798, 858, 0, 480, 489, 495, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1440x480i@120Hz */</div><div class='add'>+	/* 50 - 1440x480i@120Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,</div><div class='ctx'> 		   1602, 1716, 0, 480, 488, 494, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='del'>-			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1440x480i@120Hz */</div><div class='add'>+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 51 - 1440x480i@120Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,</div><div class='ctx'> 		   1602, 1716, 0, 480, 488, 494, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='del'>-			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 720x576@200Hz */</div><div class='add'>+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 52 - 720x576@200Hz */</div><div class='ctx'> 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,</div><div class='ctx'> 		   796, 864, 0, 576, 581, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 720x576@200Hz */</div><div class='add'>+	/* 53 - 720x576@200Hz */</div><div class='ctx'> 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,</div><div class='ctx'> 		   796, 864, 0, 576, 581, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1440x576i@200Hz */</div><div class='add'>+	/* 54 - 1440x576i@200Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,</div><div class='ctx'> 		   1590, 1728, 0, 576, 580, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='del'>-			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1440x576i@200Hz */</div><div class='add'>+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 55 - 1440x576i@200Hz */</div><div class='ctx'> 	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,</div><div class='ctx'> 		   1590, 1728, 0, 576, 580, 586, 625, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='del'>-			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 720x480@240Hz */</div><div class='add'>+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 56 - 720x480@240Hz */</div><div class='ctx'> 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,</div><div class='ctx'> 		   798, 858, 0, 480, 489, 495, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 720x480@240Hz */</div><div class='add'>+	/* 57 - 720x480@240Hz */</div><div class='ctx'> 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,</div><div class='ctx'> 		   798, 858, 0, 480, 489, 495, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },</div><div class='del'>-	/* 1440x480i@240 */</div><div class='add'>+	/* 58 - 1440x480i@240 */</div><div class='ctx'> 	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,</div><div class='ctx'> 		   1602, 1716, 0, 480, 488, 494, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='del'>-			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1440x480i@240 */</div><div class='add'>+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 59 - 1440x480i@240 */</div><div class='ctx'> 	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,</div><div class='ctx'> 		   1602, 1716, 0, 480, 488, 494, 525, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |</div><div class='del'>-			DRM_MODE_FLAG_INTERLACE) },</div><div class='del'>-	/* 1280x720@24Hz */</div><div class='add'>+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },</div><div class='add'>+	/* 60 - 1280x720@24Hz */</div><div class='ctx'> 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,</div><div class='ctx'> 		   3080, 3300, 0, 720, 725, 730, 750, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1280x720@25Hz */</div><div class='add'>+	/* 61 - 1280x720@25Hz */</div><div class='ctx'> 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,</div><div class='ctx'> 		   3740, 3960, 0, 720, 725, 730, 750, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1280x720@30Hz */</div><div class='add'>+	/* 62 - 1280x720@30Hz */</div><div class='ctx'> 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,</div><div class='ctx'> 		   3080, 3300, 0, 720, 725, 730, 750, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1920x1080@120Hz */</div><div class='add'>+	/* 63 - 1920x1080@120Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,</div><div class='ctx'> 		   2052, 2200, 0, 1080, 1084, 1089, 1125, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='del'>-	/* 1920x1080@100Hz */</div><div class='add'>+	/* 64 - 1920x1080@100Hz */</div><div class='ctx'> 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,</div><div class='ctx'> 		   2492, 2640, 0, 1080, 1084, 1094, 1125, 0,</div><div class='ctx'> 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },</div><div class='ctx'> };</div><div class='del'>-static const int drm_num_cea_modes =</div><div class='del'>-	sizeof (edid_cea_modes) / sizeof (edid_cea_modes[0]);</div><div class='add'>+static const int drm_num_cea_modes = ARRAY_SIZE(edid_cea_modes);</div><div class='head'>diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c<br/>index a0d6e894d97c..5683b7fdd746 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_fb_helper.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_fb_helper.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_fb_helper.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_fb_helper.c</a></div><div class='hunk'>@@ -136,6 +136,9 @@ static void drm_fb_helper_restore_lut_atomic(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	uint16_t *r_base, *g_base, *b_base;</div><div class='ctx'> </div><div class='add'>+	if (crtc-&gt;funcs-&gt;gamma_set == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	r_base = crtc-&gt;gamma_store;</div><div class='ctx'> 	g_base = r_base + crtc-&gt;gamma_size;</div><div class='ctx'> 	b_base = g_base + crtc-&gt;gamma_size;</div><div class='hunk'>@@ -383,7 +386,6 @@ int drm_fb_helper_init(struct drm_device *dev,</div><div class='ctx'> 		       int crtc_count, int max_conn_count)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_crtc *crtc;</div><div class='del'>-	int ret = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	fb_helper-&gt;dev = dev;</div><div class='hunk'>@@ -408,10 +410,8 @@ int drm_fb_helper_init(struct drm_device *dev,</div><div class='ctx'> 				sizeof(struct drm_connector *),</div><div class='ctx'> 				GFP_KERNEL);</div><div class='ctx'> </div><div class='del'>-		if (!fb_helper-&gt;crtc_info[i].mode_set.connectors) {</div><div class='del'>-			ret = -ENOMEM;</div><div class='add'>+		if (!fb_helper-&gt;crtc_info[i].mode_set.connectors)</div><div class='ctx'> 			goto out_free;</div><div class='del'>-		}</div><div class='ctx'> 		fb_helper-&gt;crtc_info[i].mode_set.num_connectors = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1083,7 +1083,7 @@ static bool drm_target_cloned(struct drm_fb_helper *fb_helper,</div><div class='ctx'> </div><div class='ctx'> 	/* try and find a 1024x768 mode on each connector */</div><div class='ctx'> 	can_clone = true;</div><div class='del'>-	dmt_mode = drm_mode_find_dmt(fb_helper-&gt;dev, 1024, 768, 60);</div><div class='add'>+	dmt_mode = drm_mode_find_dmt(fb_helper-&gt;dev, 1024, 768, 60, false);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; fb_helper-&gt;connector_count; i++) {</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c<br/>index 83114b5e3cee..d58e69da1fb5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_gem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_gem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_gem.c</a></div><div class='hunk'>@@ -201,6 +201,19 @@ free:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_gem_object_alloc);</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+drm_gem_remove_prime_handles(struct drm_gem_object *obj, struct drm_file *filp)</div><div class='add'>+{</div><div class='add'>+	if (obj-&gt;import_attach) {</div><div class='add'>+		drm_prime_remove_imported_buf_handle(&amp;filp-&gt;prime,</div><div class='add'>+				obj-&gt;import_attach-&gt;dmabuf);</div><div class='add'>+	}</div><div class='add'>+	if (obj-&gt;export_dma_buf) {</div><div class='add'>+		drm_prime_remove_imported_buf_handle(&amp;filp-&gt;prime,</div><div class='add'>+				obj-&gt;export_dma_buf);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * Removes the mapping from handle to filp for this object.</div><div class='ctx'>  */</div><div class='hunk'>@@ -233,9 +246,7 @@ drm_gem_handle_delete(struct drm_file *filp, u32 handle)</div><div class='ctx'> 	idr_remove(&amp;filp-&gt;object_idr, handle);</div><div class='ctx'> 	spin_unlock(&amp;filp-&gt;table_lock);</div><div class='ctx'> </div><div class='del'>-	if (obj-&gt;import_attach)</div><div class='del'>-		drm_prime_remove_imported_buf_handle(&amp;filp-&gt;prime,</div><div class='del'>-				obj-&gt;import_attach-&gt;dmabuf);</div><div class='add'>+	drm_gem_remove_prime_handles(obj, filp);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;driver-&gt;gem_close_object)</div><div class='ctx'> 		dev-&gt;driver-&gt;gem_close_object(obj, filp);</div><div class='hunk'>@@ -272,8 +283,7 @@ again:</div><div class='ctx'> 	spin_unlock(&amp;file_priv-&gt;table_lock);</div><div class='ctx'> 	if (ret == -EAGAIN)</div><div class='ctx'> 		goto again;</div><div class='del'>-</div><div class='del'>-	if (ret != 0)</div><div class='add'>+	else if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	drm_gem_object_handle_reference(obj);</div><div class='hunk'>@@ -329,7 +339,7 @@ drm_gem_create_mmap_offset(struct drm_gem_object *obj)</div><div class='ctx'> 	struct drm_gem_mm *mm = dev-&gt;mm_private;</div><div class='ctx'> 	struct drm_map_list *list;</div><div class='ctx'> 	struct drm_local_map *map;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Set the object up for mmap'ing */</div><div class='ctx'> 	list = &amp;obj-&gt;map_list;</div><div class='hunk'>@@ -456,8 +466,7 @@ again:</div><div class='ctx'> </div><div class='ctx'> 		if (ret == -EAGAIN)</div><div class='ctx'> 			goto again;</div><div class='del'>-</div><div class='del'>-		if (ret != 0)</div><div class='add'>+		else if (ret)</div><div class='ctx'> 			goto err;</div><div class='ctx'> </div><div class='ctx'> 		/* Allocate a reference for the name table.  */</div><div class='hunk'>@@ -532,9 +541,7 @@ drm_gem_object_release_handle(int id, void *ptr, void *data)</div><div class='ctx'> 	struct drm_gem_object *obj = ptr;</div><div class='ctx'> 	struct drm_device *dev = obj-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	if (obj-&gt;import_attach)</div><div class='del'>-		drm_prime_remove_imported_buf_handle(&amp;file_priv-&gt;prime,</div><div class='del'>-				obj-&gt;import_attach-&gt;dmabuf);</div><div class='add'>+	drm_gem_remove_prime_handles(obj, file_priv);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;driver-&gt;gem_close_object)</div><div class='ctx'> 		dev-&gt;driver-&gt;gem_close_object(obj, file_priv);</div><div class='hunk'>@@ -628,7 +635,7 @@ void drm_gem_vm_open(struct vm_area_struct *vma)</div><div class='ctx'> 	drm_gem_object_reference(obj);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;obj-&gt;dev-&gt;struct_mutex);</div><div class='del'>-	drm_vm_open_locked(vma);</div><div class='add'>+	drm_vm_open_locked(obj-&gt;dev, vma);</div><div class='ctx'> 	mutex_unlock(&amp;obj-&gt;dev-&gt;struct_mutex);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_gem_vm_open);</div><div class='hunk'>@@ -639,7 +646,7 @@ void drm_gem_vm_close(struct vm_area_struct *vma)</div><div class='ctx'> 	struct drm_device *dev = obj-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	drm_vm_close_locked(vma);</div><div class='add'>+	drm_vm_close_locked(obj-&gt;dev, vma);</div><div class='ctx'> 	drm_gem_object_unreference(obj);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> }</div><div class='hunk'>@@ -712,7 +719,7 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)</div><div class='ctx'> 	 */</div><div class='ctx'> 	drm_gem_object_reference(obj);</div><div class='ctx'> </div><div class='del'>-	drm_vm_open_locked(vma);</div><div class='add'>+	drm_vm_open_locked(dev, vma);</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='head'>diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c<br/>index cf85155da2a0..64a62c697313 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_ioctl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_ioctl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_ioctl.c</a></div><div class='hunk'>@@ -283,6 +283,10 @@ int drm_getcap(struct drm_device *dev, void *data, struct drm_file *file_priv)</div><div class='ctx'> 	case DRM_CAP_DUMB_PREFER_SHADOW:</div><div class='ctx'> 		req-&gt;value = dev-&gt;mode_config.prefer_shadow;</div><div class='ctx'> 		break;</div><div class='add'>+	case DRM_CAP_PRIME:</div><div class='add'>+		req-&gt;value |= dev-&gt;driver-&gt;prime_fd_to_handle ? DRM_PRIME_CAP_IMPORT : 0;</div><div class='add'>+		req-&gt;value |= dev-&gt;driver-&gt;prime_handle_to_fd ? DRM_PRIME_CAP_EXPORT : 0;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c<br/>index c869436e238a..c798eeae0a03 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_irq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_irq.c</a></div><div class='hunk'>@@ -189,7 +189,7 @@ void drm_vblank_cleanup(struct drm_device *dev)</div><div class='ctx'> 	if (dev-&gt;num_crtcs == 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;dev-&gt;vblank_disable_timer);</div><div class='add'>+	del_timer_sync(&amp;dev-&gt;vblank_disable_timer);</div><div class='ctx'> </div><div class='ctx'> 	vblank_disable_fn((unsigned long)dev);</div><div class='ctx'> </div><div class='hunk'>@@ -310,7 +310,7 @@ static void drm_irq_vgaarb_nokms(void *cookie, bool state)</div><div class='ctx'>  */</div><div class='ctx'> int drm_irq_install(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> 	unsigned long sh_flags = 0;</div><div class='ctx'> 	char *irqname;</div><div class='ctx'> </div><div class='hunk'>@@ -731,7 +731,7 @@ EXPORT_SYMBOL(drm_calc_vbltimestamp_from_scanoutpos);</div><div class='ctx'> u32 drm_get_last_vbltimestamp(struct drm_device *dev, int crtc,</div><div class='ctx'> 			      struct timeval *tvblank, unsigned flags)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Define requested maximum error on timestamps (nanoseconds). */</div><div class='ctx'> 	int max_error = (int) drm_timestamp_precision * 1000;</div><div class='hunk'>@@ -1031,18 +1031,15 @@ int drm_modeset_ctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		    struct drm_file *file_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_modeset_ctl *modeset = data;</div><div class='del'>-	int ret = 0;</div><div class='ctx'> 	unsigned int crtc;</div><div class='ctx'> </div><div class='ctx'> 	/* If drm_vblank_init() hasn't been called yet, just no-op */</div><div class='ctx'> 	if (!dev-&gt;num_crtcs)</div><div class='del'>-		goto out;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	crtc = modeset-&gt;crtc;</div><div class='del'>-	if (crtc &gt;= dev-&gt;num_crtcs) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	if (crtc &gt;= dev-&gt;num_crtcs)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	switch (modeset-&gt;cmd) {</div><div class='ctx'> 	case _DRM_PRE_MODESET:</div><div class='hunk'>@@ -1052,12 +1049,10 @@ int drm_modeset_ctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		drm_vblank_post_modeset(dev, crtc);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int drm_queue_vblank_event(struct drm_device *dev, int pipe,</div><div class='hunk'>@@ -1154,7 +1149,7 @@ int drm_wait_vblank(struct drm_device *dev, void *data,</div><div class='ctx'> 		    struct drm_file *file_priv)</div><div class='ctx'> {</div><div class='ctx'> 	union drm_wait_vblank *vblwait = data;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> 	unsigned int flags, seq, crtc, high_crtc;</div><div class='ctx'> </div><div class='ctx'> 	if ((!drm_dev_to_irq(dev)) || (!dev-&gt;irq_enabled))</div><div class='head'>diff --git a/drivers/gpu/drm/drm_lock.c b/drivers/gpu/drm/drm_lock.c<br/>index c79c713eeba0..521152041691 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_lock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_lock.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_lock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_lock.c</a></div><div class='hunk'>@@ -331,7 +331,7 @@ static int drm_notifier(void *priv)</div><div class='ctx'> </div><div class='ctx'> void drm_idlelock_take(struct drm_lock_data *lock_data)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;lock_data-&gt;spinlock);</div><div class='ctx'> 	lock_data-&gt;kernel_waiters++;</div><div class='head'>diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c<br/>index 1bdf2b54eaf6..f546ff98a114 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_prime.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_prime.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_prime.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_prime.c</a></div><div class='hunk'>@@ -68,6 +68,7 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_gem_object *obj;</div><div class='ctx'> 	void *buf;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	obj = drm_gem_object_lookup(dev, file_priv, handle);</div><div class='ctx'> 	if (!obj)</div><div class='hunk'>@@ -100,6 +101,17 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,</div><div class='ctx'> 		obj-&gt;export_dma_buf = buf;</div><div class='ctx'> 		*prime_fd = dma_buf_fd(buf, flags);</div><div class='ctx'> 	}</div><div class='add'>+	/* if we've exported this buffer the cheat and add it to the import list</div><div class='add'>+	 * so we get the correct handle back</div><div class='add'>+	 */</div><div class='add'>+	ret = drm_prime_add_imported_buf_handle(&amp;file_priv-&gt;prime,</div><div class='add'>+			obj-&gt;export_dma_buf, handle);</div><div class='add'>+	if (ret) {</div><div class='add'>+		drm_gem_object_unreference_unlocked(obj);</div><div class='add'>+		mutex_unlock(&amp;file_priv-&gt;prime.lock);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mutex_unlock(&amp;file_priv-&gt;prime.lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -227,6 +239,42 @@ out:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(drm_prime_pages_to_sg);</div><div class='ctx'> </div><div class='add'>+/* export an sg table into an array of pages and addresses</div><div class='add'>+   this is currently required by the TTM driver in order to do correct fault</div><div class='add'>+   handling */</div><div class='add'>+int drm_prime_sg_to_page_addr_arrays(struct sg_table *sgt, struct page **pages,</div><div class='add'>+				     dma_addr_t *addrs, int max_pages)</div><div class='add'>+{</div><div class='add'>+	unsigned count;</div><div class='add'>+	struct scatterlist *sg;</div><div class='add'>+	struct page *page;</div><div class='add'>+	u32 len, offset;</div><div class='add'>+	int pg_index;</div><div class='add'>+	dma_addr_t addr;</div><div class='add'>+</div><div class='add'>+	pg_index = 0;</div><div class='add'>+	for_each_sg(sgt-&gt;sgl, sg, sgt-&gt;nents, count) {</div><div class='add'>+		len = sg-&gt;length;</div><div class='add'>+		offset = sg-&gt;offset;</div><div class='add'>+		page = sg_page(sg);</div><div class='add'>+		addr = sg_dma_address(sg);</div><div class='add'>+</div><div class='add'>+		while (len &gt; 0) {</div><div class='add'>+			if (WARN_ON(pg_index &gt;= max_pages))</div><div class='add'>+				return -1;</div><div class='add'>+			pages[pg_index] = page;</div><div class='add'>+			if (addrs)</div><div class='add'>+				addrs[pg_index] = addr;</div><div class='add'>+</div><div class='add'>+			page++;</div><div class='add'>+			addr += PAGE_SIZE;</div><div class='add'>+			len -= PAGE_SIZE;</div><div class='add'>+			pg_index++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(drm_prime_sg_to_page_addr_arrays);</div><div class='ctx'> /* helper function to cleanup a GEM/prime object */</div><div class='ctx'> void drm_prime_gem_destroy(struct drm_gem_object *obj, struct sg_table *sg)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c<br/>index aa454f80e109..21bcd4a555d8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_stub.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_stub.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_stub.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_stub.c</a></div><div class='hunk'>@@ -122,11 +122,10 @@ again:</div><div class='ctx'> 	ret = idr_get_new_above(&amp;drm_minors_idr, NULL,</div><div class='ctx'> 				base, &amp;new_id);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	if (ret == -EAGAIN) {</div><div class='add'>+	if (ret == -EAGAIN)</div><div class='ctx'> 		goto again;</div><div class='del'>-	} else if (ret) {</div><div class='add'>+	else if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (new_id &gt;= limit) {</div><div class='ctx'> 		idr_remove(&amp;drm_minors_idr, new_id);</div><div class='hunk'>@@ -211,7 +210,7 @@ EXPORT_SYMBOL(drm_master_put);</div><div class='ctx'> int drm_setmaster_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 			struct drm_file *file_priv)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (file_priv-&gt;is_master)</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c<br/>index 5a7bd51fc3d8..45cf1dd3eb9c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_sysfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_sysfs.c</a></div><div class='hunk'>@@ -347,17 +347,17 @@ static struct bin_attribute edid_attr = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * drm_sysfs_connector_add - add an connector to sysfs</div><div class='add'>+ * drm_sysfs_connector_add - add a connector to sysfs</div><div class='ctx'>  * @connector: connector to add</div><div class='ctx'>  *</div><div class='del'>- * Create an connector device in sysfs, along with its associated connector</div><div class='add'>+ * Create a connector device in sysfs, along with its associated connector</div><div class='ctx'>  * properties (so far, connection status, dpms, mode list &amp; edid) and</div><div class='ctx'>  * generate a hotplug event so userspace knows there's a new connector</div><div class='ctx'>  * available.</div><div class='ctx'>  *</div><div class='ctx'>  * Note:</div><div class='del'>- * This routine should only be called *once* for each DRM minor registered.</div><div class='del'>- * A second call for an already registered device will trigger the BUG_ON</div><div class='add'>+ * This routine should only be called *once* for each registered connector.</div><div class='add'>+ * A second call for an already registered connector will trigger the BUG_ON</div><div class='ctx'>  * below.</div><div class='ctx'>  */</div><div class='ctx'> int drm_sysfs_connector_add(struct drm_connector *connector)</div><div class='hunk'>@@ -366,7 +366,7 @@ int drm_sysfs_connector_add(struct drm_connector *connector)</div><div class='ctx'> 	int attr_cnt = 0;</div><div class='ctx'> 	int opt_cnt = 0;</div><div class='ctx'> 	int i;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* We shouldn't get called more than once for the same connector */</div><div class='ctx'> 	BUG_ON(device_is_registered(&amp;connector-&gt;kdev));</div><div class='head'>diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c<br/>index 149561818349..961ee08927fe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/drm_vm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/drm_vm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/drm_vm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/drm_vm.c</a></div><div class='hunk'>@@ -406,10 +406,9 @@ static const struct vm_operations_struct drm_vm_sg_ops = {</div><div class='ctx'>  * Create a new drm_vma_entry structure as the \p vma private data entry and</div><div class='ctx'>  * add it to drm_device::vmalist.</div><div class='ctx'>  */</div><div class='del'>-void drm_vm_open_locked(struct vm_area_struct *vma)</div><div class='add'>+void drm_vm_open_locked(struct drm_device *dev,</div><div class='add'>+		struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='del'>-	struct drm_file *priv = vma-&gt;vm_file-&gt;private_data;</div><div class='del'>-	struct drm_device *dev = priv-&gt;minor-&gt;dev;</div><div class='ctx'> 	struct drm_vma_entry *vma_entry;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG("0x%08lx,0x%08lx\n",</div><div class='hunk'>@@ -430,14 +429,13 @@ static void drm_vm_open(struct vm_area_struct *vma)</div><div class='ctx'> 	struct drm_device *dev = priv-&gt;minor-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	drm_vm_open_locked(vma);</div><div class='add'>+	drm_vm_open_locked(dev, vma);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void drm_vm_close_locked(struct vm_area_struct *vma)</div><div class='add'>+void drm_vm_close_locked(struct drm_device *dev,</div><div class='add'>+		struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='del'>-	struct drm_file *priv = vma-&gt;vm_file-&gt;private_data;</div><div class='del'>-	struct drm_device *dev = priv-&gt;minor-&gt;dev;</div><div class='ctx'> 	struct drm_vma_entry *pt, *temp;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG("0x%08lx,0x%08lx\n",</div><div class='hunk'>@@ -467,7 +465,7 @@ static void drm_vm_close(struct vm_area_struct *vma)</div><div class='ctx'> 	struct drm_device *dev = priv-&gt;minor-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	drm_vm_close_locked(vma);</div><div class='add'>+	drm_vm_close_locked(dev, vma);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -519,7 +517,7 @@ static int drm_mmap_dma(struct file *filp, struct vm_area_struct *vma)</div><div class='ctx'> 	vma-&gt;vm_flags |= VM_RESERVED;	/* Don't swap */</div><div class='ctx'> 	vma-&gt;vm_flags |= VM_DONTEXPAND;</div><div class='ctx'> </div><div class='del'>-	drm_vm_open_locked(vma);</div><div class='add'>+	drm_vm_open_locked(dev, vma);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -670,7 +668,7 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)</div><div class='ctx'> 	vma-&gt;vm_flags |= VM_RESERVED;	/* Don't swap */</div><div class='ctx'> 	vma-&gt;vm_flags |= VM_DONTEXPAND;</div><div class='ctx'> </div><div class='del'>-	drm_vm_open_locked(vma);</div><div class='add'>+	drm_vm_open_locked(dev, vma);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig<br/>index 3343ac437fe5..7f5096763b7d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/Kconfig</a></div><div class='hunk'>@@ -10,6 +10,12 @@ config DRM_EXYNOS</div><div class='ctx'> 	  Choose this option if you have a Samsung SoC EXYNOS chipset.</div><div class='ctx'> 	  If M is selected the module will be called exynosdrm.</div><div class='ctx'> </div><div class='add'>+config DRM_EXYNOS_DMABUF</div><div class='add'>+	bool "EXYNOS DRM DMABUF"</div><div class='add'>+	depends on DRM_EXYNOS</div><div class='add'>+	help</div><div class='add'>+	  Choose this option if you want to use DMABUF feature for DRM.</div><div class='add'>+</div><div class='ctx'> config DRM_EXYNOS_FIMD</div><div class='ctx'> 	bool "Exynos DRM FIMD"</div><div class='ctx'> 	depends on DRM_EXYNOS &amp;&amp; !FB_S3C</div><div class='hunk'>@@ -27,3 +33,9 @@ config DRM_EXYNOS_VIDI</div><div class='ctx'> 	depends on DRM_EXYNOS</div><div class='ctx'> 	help</div><div class='ctx'> 	  Choose this option if you want to use Exynos VIDI for DRM.</div><div class='add'>+</div><div class='add'>+config DRM_EXYNOS_G2D</div><div class='add'>+	bool "Exynos DRM G2D"</div><div class='add'>+	depends on DRM_EXYNOS</div><div class='add'>+	help</div><div class='add'>+	  Choose this option if you want to use Exynos G2D for DRM.</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/Makefile b/drivers/gpu/drm/exynos/Makefile<br/>index 9e0bff8badf9..eb651ca8e2a8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/Makefile</a></div><div class='hunk'>@@ -8,10 +8,12 @@ exynosdrm-y := exynos_drm_drv.o exynos_drm_encoder.o exynos_drm_connector.o \</div><div class='ctx'> 		exynos_drm_buf.o exynos_drm_gem.o exynos_drm_core.o \</div><div class='ctx'> 		exynos_drm_plane.o</div><div class='ctx'> </div><div class='add'>+exynosdrm-$(CONFIG_DRM_EXYNOS_DMABUF) += exynos_drm_dmabuf.o</div><div class='ctx'> exynosdrm-$(CONFIG_DRM_EXYNOS_FIMD)	+= exynos_drm_fimd.o</div><div class='ctx'> exynosdrm-$(CONFIG_DRM_EXYNOS_HDMI)	+= exynos_hdmi.o exynos_mixer.o \</div><div class='ctx'> 					   exynos_ddc.o exynos_hdmiphy.o \</div><div class='ctx'> 					   exynos_drm_hdmi.o</div><div class='ctx'> exynosdrm-$(CONFIG_DRM_EXYNOS_VIDI)	+= exynos_drm_vidi.o</div><div class='add'>+exynosdrm-$(CONFIG_DRM_EXYNOS_G2D)	+= exynos_drm_g2d.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_DRM_EXYNOS)		+= exynosdrm.o</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_buf.c b/drivers/gpu/drm/exynos/exynos_drm_buf.c<br/>index de8d2090bce3..b3cb0a69fbf2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_buf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_buf.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_buf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_buf.c</a></div><div class='hunk'>@@ -35,7 +35,7 @@ static int lowlevel_buffer_allocate(struct drm_device *dev,</div><div class='ctx'> 		unsigned int flags, struct exynos_drm_gem_buf *buf)</div><div class='ctx'> {</div><div class='ctx'> 	dma_addr_t start_addr;</div><div class='del'>-	unsigned int npages, page_size, i = 0;</div><div class='add'>+	unsigned int npages, i = 0;</div><div class='ctx'> 	struct scatterlist *sgl;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -53,13 +53,13 @@ static int lowlevel_buffer_allocate(struct drm_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	if (buf-&gt;size &gt;= SZ_1M) {</div><div class='ctx'> 		npages = buf-&gt;size &gt;&gt; SECTION_SHIFT;</div><div class='del'>-		page_size = SECTION_SIZE;</div><div class='add'>+		buf-&gt;page_size = SECTION_SIZE;</div><div class='ctx'> 	} else if (buf-&gt;size &gt;= SZ_64K) {</div><div class='ctx'> 		npages = buf-&gt;size &gt;&gt; 16;</div><div class='del'>-		page_size = SZ_64K;</div><div class='add'>+		buf-&gt;page_size = SZ_64K;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		npages = buf-&gt;size &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		page_size = PAGE_SIZE;</div><div class='add'>+		buf-&gt;page_size = PAGE_SIZE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	buf-&gt;sgt = kzalloc(sizeof(struct sg_table), GFP_KERNEL);</div><div class='hunk'>@@ -96,9 +96,9 @@ static int lowlevel_buffer_allocate(struct drm_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	while (i &lt; npages) {</div><div class='ctx'> 		buf-&gt;pages[i] = phys_to_page(start_addr);</div><div class='del'>-		sg_set_page(sgl, buf-&gt;pages[i], page_size, 0);</div><div class='add'>+		sg_set_page(sgl, buf-&gt;pages[i], buf-&gt;page_size, 0);</div><div class='ctx'> 		sg_dma_address(sgl) = start_addr;</div><div class='del'>-		start_addr += page_size;</div><div class='add'>+		start_addr += buf-&gt;page_size;</div><div class='ctx'> 		sgl = sg_next(sgl);</div><div class='ctx'> 		i++;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c<br/>index 3486ffed0bf0..4afb625128d7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_crtc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_crtc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_crtc.c</a></div><div class='hunk'>@@ -105,6 +105,8 @@ int exynos_drm_overlay_update(struct exynos_drm_overlay *overlay,</div><div class='ctx'> 	overlay-&gt;fb_y = pos-&gt;fb_y;</div><div class='ctx'> 	overlay-&gt;fb_width = fb-&gt;width;</div><div class='ctx'> 	overlay-&gt;fb_height = fb-&gt;height;</div><div class='add'>+	overlay-&gt;src_width = pos-&gt;src_w;</div><div class='add'>+	overlay-&gt;src_height = pos-&gt;src_h;</div><div class='ctx'> 	overlay-&gt;bpp = fb-&gt;bits_per_pixel;</div><div class='ctx'> 	overlay-&gt;pitch = fb-&gt;pitches[0];</div><div class='ctx'> 	overlay-&gt;pixel_format = fb-&gt;pixel_format;</div><div class='hunk'>@@ -153,6 +155,8 @@ static int exynos_drm_crtc_update(struct drm_crtc *crtc)</div><div class='ctx'> 	pos.crtc_y = 0;</div><div class='ctx'> 	pos.crtc_w = fb-&gt;width - crtc-&gt;x;</div><div class='ctx'> 	pos.crtc_h = fb-&gt;height - crtc-&gt;y;</div><div class='add'>+	pos.src_w = pos.crtc_w;</div><div class='add'>+	pos.src_h = pos.crtc_h;</div><div class='ctx'> </div><div class='ctx'> 	return exynos_drm_overlay_update(overlay, crtc-&gt;fb, mode, &amp;pos);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.h b/drivers/gpu/drm/exynos/exynos_drm_crtc.h<br/>index 25f72a62cb88..16b8e2195a0d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_crtc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_crtc.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_crtc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_crtc.h</a></div><div class='hunk'>@@ -42,6 +42,8 @@ void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc);</div><div class='ctx'>  *	- the unit is screen coordinates.</div><div class='ctx'>  * @fb_y: offset y on a framebuffer to be displayed</div><div class='ctx'>  *	- the unit is screen coordinates.</div><div class='add'>+ * @src_w: width of source area to be displayed from a framebuffer.</div><div class='add'>+ * @src_h: height of source area to be displayed from a framebuffer.</div><div class='ctx'>  * @crtc_x: offset x on hardware screen.</div><div class='ctx'>  * @crtc_y: offset y on hardware screen.</div><div class='ctx'>  * @crtc_w: width of hardware screen.</div><div class='hunk'>@@ -50,6 +52,8 @@ void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc);</div><div class='ctx'> struct exynos_drm_crtc_pos {</div><div class='ctx'> 	unsigned int fb_x;</div><div class='ctx'> 	unsigned int fb_y;</div><div class='add'>+	unsigned int src_w;</div><div class='add'>+	unsigned int src_h;</div><div class='ctx'> 	unsigned int crtc_x;</div><div class='ctx'> 	unsigned int crtc_y;</div><div class='ctx'> 	unsigned int crtc_w;</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c<br/>new file mode 100644<br/>index 000000000000..274909271c36<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_dmabuf.c</a></div><div class='hunk'>@@ -0,0 +1,272 @@</div><div class='add'>+/* exynos_drm_dmabuf.c</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Author: Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the next</div><div class='add'>+ * paragraph) shall be included in all copies or substantial portions of the</div><div class='add'>+ * Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+#include "exynos_drm_drv.h"</div><div class='add'>+#include "exynos_drm_gem.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dma-buf.h&gt;</div><div class='add'>+</div><div class='add'>+static struct sg_table *exynos_pages_to_sg(struct page **pages, int nr_pages,</div><div class='add'>+		unsigned int page_size)</div><div class='add'>+{</div><div class='add'>+	struct sg_table *sgt = NULL;</div><div class='add'>+	struct scatterlist *sgl;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);</div><div class='add'>+	if (!sgt)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = sg_alloc_table(sgt, nr_pages, GFP_KERNEL);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_sgt;</div><div class='add'>+</div><div class='add'>+	if (page_size &lt; PAGE_SIZE)</div><div class='add'>+		page_size = PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	for_each_sg(sgt-&gt;sgl, sgl, nr_pages, i)</div><div class='add'>+		sg_set_page(sgl, pages[i], page_size, 0);</div><div class='add'>+</div><div class='add'>+	return sgt;</div><div class='add'>+</div><div class='add'>+err_free_sgt:</div><div class='add'>+	kfree(sgt);</div><div class='add'>+	sgt = NULL;</div><div class='add'>+out:</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sg_table *</div><div class='add'>+		exynos_gem_map_dma_buf(struct dma_buf_attachment *attach,</div><div class='add'>+					enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	struct exynos_drm_gem_obj *gem_obj = attach-&gt;dmabuf-&gt;priv;</div><div class='add'>+	struct drm_device *dev = gem_obj-&gt;base.dev;</div><div class='add'>+	struct exynos_drm_gem_buf *buf;</div><div class='add'>+	struct sg_table *sgt = NULL;</div><div class='add'>+	unsigned int npages;</div><div class='add'>+	int nents;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_PRIME("%s\n", __FILE__);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+	buf = gem_obj-&gt;buffer;</div><div class='add'>+</div><div class='add'>+	/* there should always be pages allocated. */</div><div class='add'>+	if (!buf-&gt;pages) {</div><div class='add'>+		DRM_ERROR("pages is null.\n");</div><div class='add'>+		goto err_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	npages = buf-&gt;size / buf-&gt;page_size;</div><div class='add'>+</div><div class='add'>+	sgt = exynos_pages_to_sg(buf-&gt;pages, npages, buf-&gt;page_size);</div><div class='add'>+	nents = dma_map_sg(attach-&gt;dev, sgt-&gt;sgl, sgt-&gt;nents, dir);</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_PRIME("npages = %d buffer size = 0x%lx page_size = 0x%lx\n",</div><div class='add'>+			npages, buf-&gt;size, buf-&gt;page_size);</div><div class='add'>+</div><div class='add'>+err_unlock:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	return sgt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void exynos_gem_unmap_dma_buf(struct dma_buf_attachment *attach,</div><div class='add'>+						struct sg_table *sgt,</div><div class='add'>+						enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	dma_unmap_sg(attach-&gt;dev, sgt-&gt;sgl, sgt-&gt;nents, dir);</div><div class='add'>+	sg_free_table(sgt);</div><div class='add'>+	kfree(sgt);</div><div class='add'>+	sgt = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void exynos_dmabuf_release(struct dma_buf *dmabuf)</div><div class='add'>+{</div><div class='add'>+	struct exynos_drm_gem_obj *exynos_gem_obj = dmabuf-&gt;priv;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_PRIME("%s\n", __FILE__);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * exynos_dmabuf_release() call means that file object's</div><div class='add'>+	 * f_count is 0 and it calls drm_gem_object_handle_unreference()</div><div class='add'>+	 * to drop the references that these values had been increased</div><div class='add'>+	 * at drm_prime_handle_to_fd()</div><div class='add'>+	 */</div><div class='add'>+	if (exynos_gem_obj-&gt;base.export_dma_buf == dmabuf) {</div><div class='add'>+		exynos_gem_obj-&gt;base.export_dma_buf = NULL;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * drop this gem object refcount to release allocated buffer</div><div class='add'>+		 * and resources.</div><div class='add'>+		 */</div><div class='add'>+		drm_gem_object_unreference_unlocked(&amp;exynos_gem_obj-&gt;base);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *exynos_gem_dmabuf_kmap_atomic(struct dma_buf *dma_buf,</div><div class='add'>+						unsigned long page_num)</div><div class='add'>+{</div><div class='add'>+	/* TODO */</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void exynos_gem_dmabuf_kunmap_atomic(struct dma_buf *dma_buf,</div><div class='add'>+						unsigned long page_num,</div><div class='add'>+						void *addr)</div><div class='add'>+{</div><div class='add'>+	/* TODO */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *exynos_gem_dmabuf_kmap(struct dma_buf *dma_buf,</div><div class='add'>+					unsigned long page_num)</div><div class='add'>+{</div><div class='add'>+	/* TODO */</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void exynos_gem_dmabuf_kunmap(struct dma_buf *dma_buf,</div><div class='add'>+					unsigned long page_num, void *addr)</div><div class='add'>+{</div><div class='add'>+	/* TODO */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct dma_buf_ops exynos_dmabuf_ops = {</div><div class='add'>+	.map_dma_buf		= exynos_gem_map_dma_buf,</div><div class='add'>+	.unmap_dma_buf		= exynos_gem_unmap_dma_buf,</div><div class='add'>+	.kmap			= exynos_gem_dmabuf_kmap,</div><div class='add'>+	.kmap_atomic		= exynos_gem_dmabuf_kmap_atomic,</div><div class='add'>+	.kunmap			= exynos_gem_dmabuf_kunmap,</div><div class='add'>+	.kunmap_atomic		= exynos_gem_dmabuf_kunmap_atomic,</div><div class='add'>+	.release		= exynos_dmabuf_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dma_buf *exynos_dmabuf_prime_export(struct drm_device *drm_dev,</div><div class='add'>+				struct drm_gem_object *obj, int flags)</div><div class='add'>+{</div><div class='add'>+	struct exynos_drm_gem_obj *exynos_gem_obj = to_exynos_gem_obj(obj);</div><div class='add'>+</div><div class='add'>+	return dma_buf_export(exynos_gem_obj, &amp;exynos_dmabuf_ops,</div><div class='add'>+				exynos_gem_obj-&gt;base.size, 0600);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev,</div><div class='add'>+				struct dma_buf *dma_buf)</div><div class='add'>+{</div><div class='add'>+	struct dma_buf_attachment *attach;</div><div class='add'>+	struct sg_table *sgt;</div><div class='add'>+	struct scatterlist *sgl;</div><div class='add'>+	struct exynos_drm_gem_obj *exynos_gem_obj;</div><div class='add'>+	struct exynos_drm_gem_buf *buffer;</div><div class='add'>+	struct page *page;</div><div class='add'>+	int ret, i = 0;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_PRIME("%s\n", __FILE__);</div><div class='add'>+</div><div class='add'>+	/* is this one of own objects? */</div><div class='add'>+	if (dma_buf-&gt;ops == &amp;exynos_dmabuf_ops) {</div><div class='add'>+		struct drm_gem_object *obj;</div><div class='add'>+</div><div class='add'>+		exynos_gem_obj = dma_buf-&gt;priv;</div><div class='add'>+		obj = &amp;exynos_gem_obj-&gt;base;</div><div class='add'>+</div><div class='add'>+		/* is it from our device? */</div><div class='add'>+		if (obj-&gt;dev == drm_dev) {</div><div class='add'>+			drm_gem_object_reference(obj);</div><div class='add'>+			return obj;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	attach = dma_buf_attach(dma_buf, drm_dev-&gt;dev);</div><div class='add'>+	if (IS_ERR(attach))</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);</div><div class='add'>+	if (IS_ERR(sgt)) {</div><div class='add'>+		ret = PTR_ERR(sgt);</div><div class='add'>+		goto err_buf_detach;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);</div><div class='add'>+	if (!buffer) {</div><div class='add'>+		DRM_ERROR("failed to allocate exynos_drm_gem_buf.\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_unmap_attach;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buffer-&gt;pages = kzalloc(sizeof(*page) * sgt-&gt;nents, GFP_KERNEL);</div><div class='add'>+	if (!buffer-&gt;pages) {</div><div class='add'>+		DRM_ERROR("failed to allocate pages.\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_free_buffer;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	exynos_gem_obj = exynos_drm_gem_init(drm_dev, dma_buf-&gt;size);</div><div class='add'>+	if (!exynos_gem_obj) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_free_pages;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sgl = sgt-&gt;sgl;</div><div class='add'>+	buffer-&gt;dma_addr = sg_dma_address(sgl);</div><div class='add'>+</div><div class='add'>+	while (i &lt; sgt-&gt;nents) {</div><div class='add'>+		buffer-&gt;pages[i] = sg_page(sgl);</div><div class='add'>+		buffer-&gt;size += sg_dma_len(sgl);</div><div class='add'>+		sgl = sg_next(sgl);</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	exynos_gem_obj-&gt;buffer = buffer;</div><div class='add'>+	buffer-&gt;sgt = sgt;</div><div class='add'>+	exynos_gem_obj-&gt;base.import_attach = attach;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_PRIME("dma_addr = 0x%x, size = 0x%lx\n", buffer-&gt;dma_addr,</div><div class='add'>+								buffer-&gt;size);</div><div class='add'>+</div><div class='add'>+	return &amp;exynos_gem_obj-&gt;base;</div><div class='add'>+</div><div class='add'>+err_free_pages:</div><div class='add'>+	kfree(buffer-&gt;pages);</div><div class='add'>+	buffer-&gt;pages = NULL;</div><div class='add'>+err_free_buffer:</div><div class='add'>+	kfree(buffer);</div><div class='add'>+	buffer = NULL;</div><div class='add'>+err_unmap_attach:</div><div class='add'>+	dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL);</div><div class='add'>+err_buf_detach:</div><div class='add'>+	dma_buf_detach(dma_buf, attach);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Inki Dae &lt;inki.dae@samsung.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Samsung SoC DRM DMABUF Module");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.h b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.h<br/>new file mode 100644<br/>index 000000000000..662a8f98ccdb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_dmabuf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_dmabuf.h</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+/* exynos_drm_dmabuf.h</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Author: Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the next</div><div class='add'>+ * paragraph) shall be included in all copies or substantial portions of the</div><div class='add'>+ * Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _EXYNOS_DRM_DMABUF_H_</div><div class='add'>+#define _EXYNOS_DRM_DMABUF_H_</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS_DMABUF</div><div class='add'>+struct dma_buf *exynos_dmabuf_prime_export(struct drm_device *drm_dev,</div><div class='add'>+				struct drm_gem_object *obj, int flags);</div><div class='add'>+</div><div class='add'>+struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev,</div><div class='add'>+						struct dma_buf *dma_buf);</div><div class='add'>+#else</div><div class='add'>+#define exynos_dmabuf_prime_export		NULL</div><div class='add'>+#define exynos_dmabuf_prime_import		NULL</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c<br/>index a6819b5f8428..d6de2e07fa03 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_drv.c</a></div><div class='hunk'>@@ -39,6 +39,8 @@</div><div class='ctx'> #include "exynos_drm_gem.h"</div><div class='ctx'> #include "exynos_drm_plane.h"</div><div class='ctx'> #include "exynos_drm_vidi.h"</div><div class='add'>+#include "exynos_drm_dmabuf.h"</div><div class='add'>+#include "exynos_drm_g2d.h"</div><div class='ctx'> </div><div class='ctx'> #define DRIVER_NAME	"exynos"</div><div class='ctx'> #define DRIVER_DESC	"Samsung SoC DRM"</div><div class='hunk'>@@ -147,8 +149,17 @@ static int exynos_drm_unload(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> static int exynos_drm_open(struct drm_device *dev, struct drm_file *file)</div><div class='ctx'> {</div><div class='add'>+	struct drm_exynos_file_private *file_priv;</div><div class='add'>+</div><div class='ctx'> 	DRM_DEBUG_DRIVER("%s\n", __FILE__);</div><div class='ctx'> </div><div class='add'>+	file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);</div><div class='add'>+	if (!file_priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	drm_prime_init_file_private(&amp;file-&gt;prime);</div><div class='add'>+	file-&gt;driver_priv = file_priv;</div><div class='add'>+</div><div class='ctx'> 	return exynos_drm_subdrv_open(dev, file);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -170,6 +181,7 @@ static void exynos_drm_preclose(struct drm_device *dev,</div><div class='ctx'> 			e-&gt;base.destroy(&amp;e-&gt;base);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	drm_prime_destroy_file_private(&amp;file-&gt;prime);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev-&gt;event_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	exynos_drm_subdrv_close(dev, file);</div><div class='hunk'>@@ -193,7 +205,7 @@ static void exynos_drm_lastclose(struct drm_device *dev)</div><div class='ctx'> 	exynos_drm_fbdev_restore_mode(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct vm_operations_struct exynos_drm_gem_vm_ops = {</div><div class='add'>+static const struct vm_operations_struct exynos_drm_gem_vm_ops = {</div><div class='ctx'> 	.fault = exynos_drm_gem_fault,</div><div class='ctx'> 	.open = drm_gem_vm_open,</div><div class='ctx'> 	.close = drm_gem_vm_close,</div><div class='hunk'>@@ -207,10 +219,18 @@ static struct drm_ioctl_desc exynos_ioctls[] = {</div><div class='ctx'> 			DRM_AUTH),</div><div class='ctx'> 	DRM_IOCTL_DEF_DRV(EXYNOS_GEM_MMAP,</div><div class='ctx'> 			exynos_drm_gem_mmap_ioctl, DRM_UNLOCKED | DRM_AUTH),</div><div class='add'>+	DRM_IOCTL_DEF_DRV(EXYNOS_GEM_GET,</div><div class='add'>+			exynos_drm_gem_get_ioctl, DRM_UNLOCKED),</div><div class='ctx'> 	DRM_IOCTL_DEF_DRV(EXYNOS_PLANE_SET_ZPOS, exynos_plane_set_zpos_ioctl,</div><div class='ctx'> 			DRM_UNLOCKED | DRM_AUTH),</div><div class='ctx'> 	DRM_IOCTL_DEF_DRV(EXYNOS_VIDI_CONNECTION,</div><div class='ctx'> 			vidi_connection_ioctl, DRM_UNLOCKED | DRM_AUTH),</div><div class='add'>+	DRM_IOCTL_DEF_DRV(EXYNOS_G2D_GET_VER,</div><div class='add'>+			exynos_g2d_get_ver_ioctl, DRM_UNLOCKED | DRM_AUTH),</div><div class='add'>+	DRM_IOCTL_DEF_DRV(EXYNOS_G2D_SET_CMDLIST,</div><div class='add'>+			exynos_g2d_set_cmdlist_ioctl, DRM_UNLOCKED | DRM_AUTH),</div><div class='add'>+	DRM_IOCTL_DEF_DRV(EXYNOS_G2D_EXEC,</div><div class='add'>+			exynos_g2d_exec_ioctl, DRM_UNLOCKED | DRM_AUTH),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct file_operations exynos_drm_driver_fops = {</div><div class='hunk'>@@ -224,8 +244,8 @@ static const struct file_operations exynos_drm_driver_fops = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct drm_driver exynos_drm_driver = {</div><div class='del'>-	.driver_features	= DRIVER_HAVE_IRQ | DRIVER_BUS_PLATFORM |</div><div class='del'>-				  DRIVER_MODESET | DRIVER_GEM,</div><div class='add'>+	.driver_features	= DRIVER_HAVE_IRQ | DRIVER_MODESET |</div><div class='add'>+					DRIVER_GEM | DRIVER_PRIME,</div><div class='ctx'> 	.load			= exynos_drm_load,</div><div class='ctx'> 	.unload			= exynos_drm_unload,</div><div class='ctx'> 	.open			= exynos_drm_open,</div><div class='hunk'>@@ -241,6 +261,10 @@ static struct drm_driver exynos_drm_driver = {</div><div class='ctx'> 	.dumb_create		= exynos_drm_gem_dumb_create,</div><div class='ctx'> 	.dumb_map_offset	= exynos_drm_gem_dumb_map_offset,</div><div class='ctx'> 	.dumb_destroy		= exynos_drm_gem_dumb_destroy,</div><div class='add'>+	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,</div><div class='add'>+	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,</div><div class='add'>+	.gem_prime_export	= exynos_dmabuf_prime_export,</div><div class='add'>+	.gem_prime_import	= exynos_dmabuf_prime_import,</div><div class='ctx'> 	.ioctls			= exynos_ioctls,</div><div class='ctx'> 	.fops			= &amp;exynos_drm_driver_fops,</div><div class='ctx'> 	.name	= DRIVER_NAME,</div><div class='hunk'>@@ -307,6 +331,12 @@ static int __init exynos_drm_init(void)</div><div class='ctx'> 		goto out_vidi;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS_G2D</div><div class='add'>+	ret = platform_driver_register(&amp;g2d_driver);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out_g2d;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	ret = platform_driver_register(&amp;exynos_drm_platform_driver);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -314,6 +344,11 @@ static int __init exynos_drm_init(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS_G2D</div><div class='add'>+	platform_driver_unregister(&amp;g2d_driver);</div><div class='add'>+out_g2d:</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_DRM_EXYNOS_VIDI</div><div class='ctx'> out_vidi:</div><div class='ctx'> 	platform_driver_unregister(&amp;vidi_driver);</div><div class='hunk'>@@ -341,6 +376,10 @@ static void __exit exynos_drm_exit(void)</div><div class='ctx'> </div><div class='ctx'> 	platform_driver_unregister(&amp;exynos_drm_platform_driver);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS_G2D</div><div class='add'>+	platform_driver_unregister(&amp;g2d_driver);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_DRM_EXYNOS_HDMI</div><div class='ctx'> 	platform_driver_unregister(&amp;exynos_drm_common_hdmi_driver);</div><div class='ctx'> 	platform_driver_unregister(&amp;mixer_driver);</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h<br/>index 1d814175cd49..c82c90c443e7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_drv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_drv.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_drv.h</a></div><div class='hunk'>@@ -77,6 +77,8 @@ struct exynos_drm_overlay_ops {</div><div class='ctx'>  *	- the unit is screen coordinates.</div><div class='ctx'>  * @fb_width: width of a framebuffer.</div><div class='ctx'>  * @fb_height: height of a framebuffer.</div><div class='add'>+ * @src_width: width of a partial image to be displayed from framebuffer.</div><div class='add'>+ * @src_height: height of a partial image to be displayed from framebuffer.</div><div class='ctx'>  * @crtc_x: offset x on hardware screen.</div><div class='ctx'>  * @crtc_y: offset y on hardware screen.</div><div class='ctx'>  * @crtc_width: window width to be displayed (hardware screen).</div><div class='hunk'>@@ -108,6 +110,8 @@ struct exynos_drm_overlay {</div><div class='ctx'> 	unsigned int fb_y;</div><div class='ctx'> 	unsigned int fb_width;</div><div class='ctx'> 	unsigned int fb_height;</div><div class='add'>+	unsigned int src_width;</div><div class='add'>+	unsigned int src_height;</div><div class='ctx'> 	unsigned int crtc_x;</div><div class='ctx'> 	unsigned int crtc_y;</div><div class='ctx'> 	unsigned int crtc_width;</div><div class='hunk'>@@ -205,6 +209,18 @@ struct exynos_drm_manager {</div><div class='ctx'> 	struct exynos_drm_display_ops *display_ops;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct exynos_drm_g2d_private {</div><div class='add'>+	struct device		*dev;</div><div class='add'>+	struct list_head	inuse_cmdlist;</div><div class='add'>+	struct list_head	event_list;</div><div class='add'>+	struct list_head	gem_list;</div><div class='add'>+	unsigned int		gem_nr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct drm_exynos_file_private {</div><div class='add'>+	struct exynos_drm_g2d_private	*g2d_priv;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Exynos drm private structure.</div><div class='ctx'>  */</div><div class='hunk'>@@ -287,4 +303,5 @@ extern struct platform_driver hdmi_driver;</div><div class='ctx'> extern struct platform_driver mixer_driver;</div><div class='ctx'> extern struct platform_driver exynos_drm_common_hdmi_driver;</div><div class='ctx'> extern struct platform_driver vidi_driver;</div><div class='add'>+extern struct platform_driver g2d_driver;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.c b/drivers/gpu/drm/exynos/exynos_drm_encoder.c<br/>index 6e9ac7bd1dcf..23d5ad379f86 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_encoder.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_encoder.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_encoder.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_encoder.c</a></div><div class='hunk'>@@ -172,19 +172,12 @@ static void exynos_drm_encoder_commit(struct drm_encoder *encoder)</div><div class='ctx'> 		manager_ops-&gt;commit(manager-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct drm_crtc *</div><div class='del'>-exynos_drm_encoder_get_crtc(struct drm_encoder *encoder)</div><div class='del'>-{</div><div class='del'>-	return encoder-&gt;crtc;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct drm_encoder_helper_funcs exynos_encoder_helper_funcs = {</div><div class='ctx'> 	.dpms		= exynos_drm_encoder_dpms,</div><div class='ctx'> 	.mode_fixup	= exynos_drm_encoder_mode_fixup,</div><div class='ctx'> 	.mode_set	= exynos_drm_encoder_mode_set,</div><div class='ctx'> 	.prepare	= exynos_drm_encoder_prepare,</div><div class='ctx'> 	.commit		= exynos_drm_encoder_commit,</div><div class='del'>-	.get_crtc	= exynos_drm_encoder_get_crtc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void exynos_drm_encoder_destroy(struct drm_encoder *encoder)</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c b/drivers/gpu/drm/exynos/exynos_drm_fb.c<br/>index c38c8f468fa3..4ccfe4328fab 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_fb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_fb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_fb.c</a></div><div class='hunk'>@@ -51,11 +51,22 @@ struct exynos_drm_fb {</div><div class='ctx'> static void exynos_drm_fb_destroy(struct drm_framebuffer *fb)</div><div class='ctx'> {</div><div class='ctx'> 	struct exynos_drm_fb *exynos_fb = to_exynos_fb(fb);</div><div class='add'>+	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("%s\n", __FILE__);</div><div class='ctx'> </div><div class='ctx'> 	drm_framebuffer_cleanup(fb);</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(exynos_fb-&gt;exynos_gem_obj); i++) {</div><div class='add'>+		struct drm_gem_object *obj;</div><div class='add'>+</div><div class='add'>+		if (exynos_fb-&gt;exynos_gem_obj[i] == NULL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		obj = &amp;exynos_fb-&gt;exynos_gem_obj[i]-&gt;base;</div><div class='add'>+		drm_gem_object_unreference_unlocked(obj);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	kfree(exynos_fb);</div><div class='ctx'> 	exynos_fb = NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -134,11 +145,11 @@ exynos_user_fb_create(struct drm_device *dev, struct drm_file *file_priv,</div><div class='ctx'> 		return ERR_PTR(-ENOENT);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	drm_gem_object_unreference_unlocked(obj);</div><div class='del'>-</div><div class='ctx'> 	fb = exynos_drm_framebuffer_init(dev, mode_cmd, obj);</div><div class='del'>-	if (IS_ERR(fb))</div><div class='add'>+	if (IS_ERR(fb)) {</div><div class='add'>+		drm_gem_object_unreference_unlocked(obj);</div><div class='ctx'> 		return fb;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	exynos_fb = to_exynos_fb(fb);</div><div class='ctx'> 	nr = exynos_drm_format_num_buffers(fb-&gt;pixel_format);</div><div class='hunk'>@@ -152,8 +163,6 @@ exynos_user_fb_create(struct drm_device *dev, struct drm_file *file_priv,</div><div class='ctx'> 			return ERR_PTR(-ENOENT);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		drm_gem_object_unreference_unlocked(obj);</div><div class='del'>-</div><div class='ctx'> 		exynos_fb-&gt;exynos_gem_obj[i] = to_exynos_gem_obj(obj);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -191,7 +200,7 @@ static void exynos_drm_output_poll_changed(struct drm_device *dev)</div><div class='ctx'> 		drm_fb_helper_hotplug_event(fb_helper);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct drm_mode_config_funcs exynos_drm_mode_config_funcs = {</div><div class='add'>+static const struct drm_mode_config_funcs exynos_drm_mode_config_funcs = {</div><div class='ctx'> 	.fb_create = exynos_user_fb_create,</div><div class='ctx'> 	.output_poll_changed = exynos_drm_output_poll_changed,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.h b/drivers/gpu/drm/exynos/exynos_drm_fb.h<br/>index 3ecb30d93552..50823756cdea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_fb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_fb.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_fb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_fb.h</a></div><div class='hunk'>@@ -31,10 +31,10 @@</div><div class='ctx'> static inline int exynos_drm_format_num_buffers(uint32_t format)</div><div class='ctx'> {</div><div class='ctx'> 	switch (format) {</div><div class='del'>-	case DRM_FORMAT_NV12M:</div><div class='add'>+	case DRM_FORMAT_NV12:</div><div class='ctx'> 	case DRM_FORMAT_NV12MT:</div><div class='ctx'> 		return 2;</div><div class='del'>-	case DRM_FORMAT_YUV420M:</div><div class='add'>+	case DRM_FORMAT_YUV420:</div><div class='ctx'> 		return 3;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return 1;</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c<br/>new file mode 100644<br/>index 000000000000..d2d88f22a037<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_g2d.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_g2d.c</a></div><div class='hunk'>@@ -0,0 +1,937 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 Samsung Electronics Co.Ltd</div><div class='add'>+ * Authors: Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundationr</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "exynos_drm.h"</div><div class='add'>+#include "exynos_drm_drv.h"</div><div class='add'>+#include "exynos_drm_gem.h"</div><div class='add'>+</div><div class='add'>+#define G2D_HW_MAJOR_VER		4</div><div class='add'>+#define G2D_HW_MINOR_VER		1</div><div class='add'>+</div><div class='add'>+/* vaild register range set from user: 0x0104 ~ 0x0880 */</div><div class='add'>+#define G2D_VALID_START			0x0104</div><div class='add'>+#define G2D_VALID_END			0x0880</div><div class='add'>+</div><div class='add'>+/* general registers */</div><div class='add'>+#define G2D_SOFT_RESET			0x0000</div><div class='add'>+#define G2D_INTEN			0x0004</div><div class='add'>+#define G2D_INTC_PEND			0x000C</div><div class='add'>+#define G2D_DMA_SFR_BASE_ADDR		0x0080</div><div class='add'>+#define G2D_DMA_COMMAND			0x0084</div><div class='add'>+#define G2D_DMA_STATUS			0x008C</div><div class='add'>+#define G2D_DMA_HOLD_CMD		0x0090</div><div class='add'>+</div><div class='add'>+/* command registers */</div><div class='add'>+#define G2D_BITBLT_START		0x0100</div><div class='add'>+</div><div class='add'>+/* registers for base address */</div><div class='add'>+#define G2D_SRC_BASE_ADDR		0x0304</div><div class='add'>+#define G2D_SRC_PLANE2_BASE_ADDR	0x0318</div><div class='add'>+#define G2D_DST_BASE_ADDR		0x0404</div><div class='add'>+#define G2D_DST_PLANE2_BASE_ADDR	0x0418</div><div class='add'>+#define G2D_PAT_BASE_ADDR		0x0500</div><div class='add'>+#define G2D_MSK_BASE_ADDR		0x0520</div><div class='add'>+</div><div class='add'>+/* G2D_SOFT_RESET */</div><div class='add'>+#define G2D_SFRCLEAR			(1 &lt;&lt; 1)</div><div class='add'>+#define G2D_R				(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* G2D_INTEN */</div><div class='add'>+#define G2D_INTEN_ACF			(1 &lt;&lt; 3)</div><div class='add'>+#define G2D_INTEN_UCF			(1 &lt;&lt; 2)</div><div class='add'>+#define G2D_INTEN_GCF			(1 &lt;&lt; 1)</div><div class='add'>+#define G2D_INTEN_SCF			(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* G2D_INTC_PEND */</div><div class='add'>+#define G2D_INTP_ACMD_FIN		(1 &lt;&lt; 3)</div><div class='add'>+#define G2D_INTP_UCMD_FIN		(1 &lt;&lt; 2)</div><div class='add'>+#define G2D_INTP_GCMD_FIN		(1 &lt;&lt; 1)</div><div class='add'>+#define G2D_INTP_SCMD_FIN		(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* G2D_DMA_COMMAND */</div><div class='add'>+#define G2D_DMA_HALT			(1 &lt;&lt; 2)</div><div class='add'>+#define G2D_DMA_CONTINUE		(1 &lt;&lt; 1)</div><div class='add'>+#define G2D_DMA_START			(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* G2D_DMA_STATUS */</div><div class='add'>+#define G2D_DMA_LIST_DONE_COUNT		(0xFF &lt;&lt; 17)</div><div class='add'>+#define G2D_DMA_BITBLT_DONE_COUNT	(0xFFFF &lt;&lt; 1)</div><div class='add'>+#define G2D_DMA_DONE			(1 &lt;&lt; 0)</div><div class='add'>+#define G2D_DMA_LIST_DONE_COUNT_OFFSET	17</div><div class='add'>+</div><div class='add'>+/* G2D_DMA_HOLD_CMD */</div><div class='add'>+#define G2D_USET_HOLD			(1 &lt;&lt; 2)</div><div class='add'>+#define G2D_LIST_HOLD			(1 &lt;&lt; 1)</div><div class='add'>+#define G2D_BITBLT_HOLD			(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* G2D_BITBLT_START */</div><div class='add'>+#define G2D_START_CASESEL		(1 &lt;&lt; 2)</div><div class='add'>+#define G2D_START_NHOLT			(1 &lt;&lt; 1)</div><div class='add'>+#define G2D_START_BITBLT		(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+#define G2D_CMDLIST_SIZE		(PAGE_SIZE / 4)</div><div class='add'>+#define G2D_CMDLIST_NUM			64</div><div class='add'>+#define G2D_CMDLIST_POOL_SIZE		(G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)</div><div class='add'>+#define G2D_CMDLIST_DATA_NUM		(G2D_CMDLIST_SIZE / sizeof(u32) - 2)</div><div class='add'>+</div><div class='add'>+/* cmdlist data structure */</div><div class='add'>+struct g2d_cmdlist {</div><div class='add'>+	u32	head;</div><div class='add'>+	u32	data[G2D_CMDLIST_DATA_NUM];</div><div class='add'>+	u32	last;	/* last data offset */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct drm_exynos_pending_g2d_event {</div><div class='add'>+	struct drm_pending_event	base;</div><div class='add'>+	struct drm_exynos_g2d_event	event;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct g2d_gem_node {</div><div class='add'>+	struct list_head	list;</div><div class='add'>+	unsigned int		handle;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct g2d_cmdlist_node {</div><div class='add'>+	struct list_head	list;</div><div class='add'>+	struct g2d_cmdlist	*cmdlist;</div><div class='add'>+	unsigned int		gem_nr;</div><div class='add'>+	dma_addr_t		dma_addr;</div><div class='add'>+</div><div class='add'>+	struct drm_exynos_pending_g2d_event	*event;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct g2d_runqueue_node {</div><div class='add'>+	struct list_head	list;</div><div class='add'>+	struct list_head	run_cmdlist;</div><div class='add'>+	struct list_head	event_list;</div><div class='add'>+	struct completion	complete;</div><div class='add'>+	int			async;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct g2d_data {</div><div class='add'>+	struct device			*dev;</div><div class='add'>+	struct clk			*gate_clk;</div><div class='add'>+	struct resource			*regs_res;</div><div class='add'>+	void __iomem			*regs;</div><div class='add'>+	int				irq;</div><div class='add'>+	struct workqueue_struct		*g2d_workq;</div><div class='add'>+	struct work_struct		runqueue_work;</div><div class='add'>+	struct exynos_drm_subdrv	subdrv;</div><div class='add'>+	bool				suspended;</div><div class='add'>+</div><div class='add'>+	/* cmdlist */</div><div class='add'>+	struct g2d_cmdlist_node		*cmdlist_node;</div><div class='add'>+	struct list_head		free_cmdlist;</div><div class='add'>+	struct mutex			cmdlist_mutex;</div><div class='add'>+	dma_addr_t			cmdlist_pool;</div><div class='add'>+	void				*cmdlist_pool_virt;</div><div class='add'>+</div><div class='add'>+	/* runqueue*/</div><div class='add'>+	struct g2d_runqueue_node	*runqueue_node;</div><div class='add'>+	struct list_head		runqueue;</div><div class='add'>+	struct mutex			runqueue_mutex;</div><div class='add'>+	struct kmem_cache		*runqueue_slab;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int g2d_init_cmdlist(struct g2d_data *g2d)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = g2d-&gt;dev;</div><div class='add'>+	struct g2d_cmdlist_node *node = g2d-&gt;cmdlist_node;</div><div class='add'>+	int nr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	g2d-&gt;cmdlist_pool_virt = dma_alloc_coherent(dev, G2D_CMDLIST_POOL_SIZE,</div><div class='add'>+						&amp;g2d-&gt;cmdlist_pool, GFP_KERNEL);</div><div class='add'>+	if (!g2d-&gt;cmdlist_pool_virt) {</div><div class='add'>+		dev_err(dev, "failed to allocate dma memory\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	node = kcalloc(G2D_CMDLIST_NUM, G2D_CMDLIST_NUM * sizeof(*node),</div><div class='add'>+			GFP_KERNEL);</div><div class='add'>+	if (!node) {</div><div class='add'>+		dev_err(dev, "failed to allocate memory\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (nr = 0; nr &lt; G2D_CMDLIST_NUM; nr++) {</div><div class='add'>+		node[nr].cmdlist =</div><div class='add'>+			g2d-&gt;cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;</div><div class='add'>+		node[nr].dma_addr =</div><div class='add'>+			g2d-&gt;cmdlist_pool + nr * G2D_CMDLIST_SIZE;</div><div class='add'>+</div><div class='add'>+		list_add_tail(&amp;node[nr].list, &amp;g2d-&gt;free_cmdlist);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	dma_free_coherent(dev, G2D_CMDLIST_POOL_SIZE, g2d-&gt;cmdlist_pool_virt,</div><div class='add'>+			g2d-&gt;cmdlist_pool);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g2d_fini_cmdlist(struct g2d_data *g2d)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = g2d-&gt;dev;</div><div class='add'>+</div><div class='add'>+	kfree(g2d-&gt;cmdlist_node);</div><div class='add'>+	dma_free_coherent(dev, G2D_CMDLIST_POOL_SIZE, g2d-&gt;cmdlist_pool_virt,</div><div class='add'>+			g2d-&gt;cmdlist_pool);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = g2d-&gt;dev;</div><div class='add'>+	struct g2d_cmdlist_node *node;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;g2d-&gt;cmdlist_mutex);</div><div class='add'>+	if (list_empty(&amp;g2d-&gt;free_cmdlist)) {</div><div class='add'>+		dev_err(dev, "there is no free cmdlist\n");</div><div class='add'>+		mutex_unlock(&amp;g2d-&gt;cmdlist_mutex);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	node = list_first_entry(&amp;g2d-&gt;free_cmdlist, struct g2d_cmdlist_node,</div><div class='add'>+				list);</div><div class='add'>+	list_del_init(&amp;node-&gt;list);</div><div class='add'>+	mutex_unlock(&amp;g2d-&gt;cmdlist_mutex);</div><div class='add'>+</div><div class='add'>+	return node;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;g2d-&gt;cmdlist_mutex);</div><div class='add'>+	list_move_tail(&amp;node-&gt;list, &amp;g2d-&gt;free_cmdlist);</div><div class='add'>+	mutex_unlock(&amp;g2d-&gt;cmdlist_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv,</div><div class='add'>+				     struct g2d_cmdlist_node *node)</div><div class='add'>+{</div><div class='add'>+	struct g2d_cmdlist_node *lnode;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;g2d_priv-&gt;inuse_cmdlist))</div><div class='add'>+		goto add_to_list;</div><div class='add'>+</div><div class='add'>+	/* this links to base address of new cmdlist */</div><div class='add'>+	lnode = list_entry(g2d_priv-&gt;inuse_cmdlist.prev,</div><div class='add'>+				struct g2d_cmdlist_node, list);</div><div class='add'>+	lnode-&gt;cmdlist-&gt;data[lnode-&gt;cmdlist-&gt;last] = node-&gt;dma_addr;</div><div class='add'>+</div><div class='add'>+add_to_list:</div><div class='add'>+	list_add_tail(&amp;node-&gt;list, &amp;g2d_priv-&gt;inuse_cmdlist);</div><div class='add'>+</div><div class='add'>+	if (node-&gt;event)</div><div class='add'>+		list_add_tail(&amp;node-&gt;event-&gt;base.link, &amp;g2d_priv-&gt;event_list);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int g2d_get_cmdlist_gem(struct drm_device *drm_dev,</div><div class='add'>+			       struct drm_file *file,</div><div class='add'>+			       struct g2d_cmdlist_node *node)</div><div class='add'>+{</div><div class='add'>+	struct drm_exynos_file_private *file_priv = file-&gt;driver_priv;</div><div class='add'>+	struct exynos_drm_g2d_private *g2d_priv = file_priv-&gt;g2d_priv;</div><div class='add'>+	struct g2d_cmdlist *cmdlist = node-&gt;cmdlist;</div><div class='add'>+	dma_addr_t *addr;</div><div class='add'>+	int offset;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; node-&gt;gem_nr; i++) {</div><div class='add'>+		struct g2d_gem_node *gem_node;</div><div class='add'>+</div><div class='add'>+		gem_node = kzalloc(sizeof(*gem_node), GFP_KERNEL);</div><div class='add'>+		if (!gem_node) {</div><div class='add'>+			dev_err(g2d_priv-&gt;dev, "failed to allocate gem node\n");</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		offset = cmdlist-&gt;last - (i * 2 + 1);</div><div class='add'>+		gem_node-&gt;handle = cmdlist-&gt;data[offset];</div><div class='add'>+</div><div class='add'>+		addr = exynos_drm_gem_get_dma_addr(drm_dev, gem_node-&gt;handle,</div><div class='add'>+						   file);</div><div class='add'>+		if (IS_ERR(addr)) {</div><div class='add'>+			node-&gt;gem_nr = i;</div><div class='add'>+			kfree(gem_node);</div><div class='add'>+			return PTR_ERR(addr);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cmdlist-&gt;data[offset] = *addr;</div><div class='add'>+		list_add_tail(&amp;gem_node-&gt;list, &amp;g2d_priv-&gt;gem_list);</div><div class='add'>+		g2d_priv-&gt;gem_nr++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g2d_put_cmdlist_gem(struct drm_device *drm_dev,</div><div class='add'>+				struct drm_file *file,</div><div class='add'>+				unsigned int nr)</div><div class='add'>+{</div><div class='add'>+	struct drm_exynos_file_private *file_priv = file-&gt;driver_priv;</div><div class='add'>+	struct exynos_drm_g2d_private *g2d_priv = file_priv-&gt;g2d_priv;</div><div class='add'>+	struct g2d_gem_node *node, *n;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe_reverse(node, n, &amp;g2d_priv-&gt;gem_list, list) {</div><div class='add'>+		if (!nr)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		exynos_drm_gem_put_dma_addr(drm_dev, node-&gt;handle, file);</div><div class='add'>+		list_del_init(&amp;node-&gt;list);</div><div class='add'>+		kfree(node);</div><div class='add'>+		nr--;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g2d_dma_start(struct g2d_data *g2d,</div><div class='add'>+			  struct g2d_runqueue_node *runqueue_node)</div><div class='add'>+{</div><div class='add'>+	struct g2d_cmdlist_node *node =</div><div class='add'>+				list_first_entry(&amp;runqueue_node-&gt;run_cmdlist,</div><div class='add'>+						struct g2d_cmdlist_node, list);</div><div class='add'>+</div><div class='add'>+	pm_runtime_get_sync(g2d-&gt;dev);</div><div class='add'>+	clk_enable(g2d-&gt;gate_clk);</div><div class='add'>+</div><div class='add'>+	/* interrupt enable */</div><div class='add'>+	writel_relaxed(G2D_INTEN_ACF | G2D_INTEN_UCF | G2D_INTEN_GCF,</div><div class='add'>+			g2d-&gt;regs + G2D_INTEN);</div><div class='add'>+</div><div class='add'>+	writel_relaxed(node-&gt;dma_addr, g2d-&gt;regs + G2D_DMA_SFR_BASE_ADDR);</div><div class='add'>+	writel_relaxed(G2D_DMA_START, g2d-&gt;regs + G2D_DMA_COMMAND);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)</div><div class='add'>+{</div><div class='add'>+	struct g2d_runqueue_node *runqueue_node;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;g2d-&gt;runqueue))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	runqueue_node = list_first_entry(&amp;g2d-&gt;runqueue,</div><div class='add'>+					 struct g2d_runqueue_node, list);</div><div class='add'>+	list_del_init(&amp;runqueue_node-&gt;list);</div><div class='add'>+	return runqueue_node;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g2d_free_runqueue_node(struct g2d_data *g2d,</div><div class='add'>+				   struct g2d_runqueue_node *runqueue_node)</div><div class='add'>+{</div><div class='add'>+	if (!runqueue_node)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;g2d-&gt;cmdlist_mutex);</div><div class='add'>+	list_splice_tail_init(&amp;runqueue_node-&gt;run_cmdlist, &amp;g2d-&gt;free_cmdlist);</div><div class='add'>+	mutex_unlock(&amp;g2d-&gt;cmdlist_mutex);</div><div class='add'>+</div><div class='add'>+	kmem_cache_free(g2d-&gt;runqueue_slab, runqueue_node);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g2d_exec_runqueue(struct g2d_data *g2d)</div><div class='add'>+{</div><div class='add'>+	g2d-&gt;runqueue_node = g2d_get_runqueue_node(g2d);</div><div class='add'>+	if (g2d-&gt;runqueue_node)</div><div class='add'>+		g2d_dma_start(g2d, g2d-&gt;runqueue_node);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g2d_runqueue_worker(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct g2d_data *g2d = container_of(work, struct g2d_data,</div><div class='add'>+					    runqueue_work);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;g2d-&gt;runqueue_mutex);</div><div class='add'>+	clk_disable(g2d-&gt;gate_clk);</div><div class='add'>+	pm_runtime_put_sync(g2d-&gt;dev);</div><div class='add'>+</div><div class='add'>+	complete(&amp;g2d-&gt;runqueue_node-&gt;complete);</div><div class='add'>+	if (g2d-&gt;runqueue_node-&gt;async)</div><div class='add'>+		g2d_free_runqueue_node(g2d, g2d-&gt;runqueue_node);</div><div class='add'>+</div><div class='add'>+	if (g2d-&gt;suspended)</div><div class='add'>+		g2d-&gt;runqueue_node = NULL;</div><div class='add'>+	else</div><div class='add'>+		g2d_exec_runqueue(g2d);</div><div class='add'>+	mutex_unlock(&amp;g2d-&gt;runqueue_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *drm_dev = g2d-&gt;subdrv.drm_dev;</div><div class='add'>+	struct g2d_runqueue_node *runqueue_node = g2d-&gt;runqueue_node;</div><div class='add'>+	struct drm_exynos_pending_g2d_event *e;</div><div class='add'>+	struct timeval now;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;runqueue_node-&gt;event_list))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	e = list_first_entry(&amp;runqueue_node-&gt;event_list,</div><div class='add'>+			     struct drm_exynos_pending_g2d_event, base.link);</div><div class='add'>+</div><div class='add'>+	do_gettimeofday(&amp;now);</div><div class='add'>+	e-&gt;event.tv_sec = now.tv_sec;</div><div class='add'>+	e-&gt;event.tv_usec = now.tv_usec;</div><div class='add'>+	e-&gt;event.cmdlist_no = cmdlist_no;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;drm_dev-&gt;event_lock, flags);</div><div class='add'>+	list_move_tail(&amp;e-&gt;base.link, &amp;e-&gt;base.file_priv-&gt;event_list);</div><div class='add'>+	wake_up_interruptible(&amp;e-&gt;base.file_priv-&gt;event_wait);</div><div class='add'>+	spin_unlock_irqrestore(&amp;drm_dev-&gt;event_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t g2d_irq_handler(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct g2d_data *g2d = dev_id;</div><div class='add'>+	u32 pending;</div><div class='add'>+</div><div class='add'>+	pending = readl_relaxed(g2d-&gt;regs + G2D_INTC_PEND);</div><div class='add'>+	if (pending)</div><div class='add'>+		writel_relaxed(pending, g2d-&gt;regs + G2D_INTC_PEND);</div><div class='add'>+</div><div class='add'>+	if (pending &amp; G2D_INTP_GCMD_FIN) {</div><div class='add'>+		u32 cmdlist_no = readl_relaxed(g2d-&gt;regs + G2D_DMA_STATUS);</div><div class='add'>+</div><div class='add'>+		cmdlist_no = (cmdlist_no &amp; G2D_DMA_LIST_DONE_COUNT) &gt;&gt;</div><div class='add'>+						G2D_DMA_LIST_DONE_COUNT_OFFSET;</div><div class='add'>+</div><div class='add'>+		g2d_finish_event(g2d, cmdlist_no);</div><div class='add'>+</div><div class='add'>+		writel_relaxed(0, g2d-&gt;regs + G2D_DMA_HOLD_CMD);</div><div class='add'>+		if (!(pending &amp; G2D_INTP_ACMD_FIN)) {</div><div class='add'>+			writel_relaxed(G2D_DMA_CONTINUE,</div><div class='add'>+					g2d-&gt;regs + G2D_DMA_COMMAND);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pending &amp; G2D_INTP_ACMD_FIN)</div><div class='add'>+		queue_work(g2d-&gt;g2d_workq, &amp;g2d-&gt;runqueue_work);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int g2d_check_reg_offset(struct device *dev, struct g2d_cmdlist *cmdlist,</div><div class='add'>+				int nr, bool for_addr)</div><div class='add'>+{</div><div class='add'>+	int reg_offset;</div><div class='add'>+	int index;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr; i++) {</div><div class='add'>+		index = cmdlist-&gt;last - 2 * (i + 1);</div><div class='add'>+		reg_offset = cmdlist-&gt;data[index] &amp; ~0xfffff000;</div><div class='add'>+</div><div class='add'>+		if (reg_offset &lt; G2D_VALID_START || reg_offset &gt; G2D_VALID_END)</div><div class='add'>+			goto err;</div><div class='add'>+		if (reg_offset % 4)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		switch (reg_offset) {</div><div class='add'>+		case G2D_SRC_BASE_ADDR:</div><div class='add'>+		case G2D_SRC_PLANE2_BASE_ADDR:</div><div class='add'>+		case G2D_DST_BASE_ADDR:</div><div class='add'>+		case G2D_DST_PLANE2_BASE_ADDR:</div><div class='add'>+		case G2D_PAT_BASE_ADDR:</div><div class='add'>+		case G2D_MSK_BASE_ADDR:</div><div class='add'>+			if (!for_addr)</div><div class='add'>+				goto err;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			if (for_addr)</div><div class='add'>+				goto err;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	dev_err(dev, "Bad register offset: 0x%x\n", cmdlist-&gt;data[index]);</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ioctl functions */</div><div class='add'>+int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,</div><div class='add'>+			     struct drm_file *file)</div><div class='add'>+{</div><div class='add'>+	struct drm_exynos_g2d_get_ver *ver = data;</div><div class='add'>+</div><div class='add'>+	ver-&gt;major = G2D_HW_MAJOR_VER;</div><div class='add'>+	ver-&gt;minor = G2D_HW_MINOR_VER;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(exynos_g2d_get_ver_ioctl);</div><div class='add'>+</div><div class='add'>+int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,</div><div class='add'>+				 struct drm_file *file)</div><div class='add'>+{</div><div class='add'>+	struct drm_exynos_file_private *file_priv = file-&gt;driver_priv;</div><div class='add'>+	struct exynos_drm_g2d_private *g2d_priv = file_priv-&gt;g2d_priv;</div><div class='add'>+	struct device *dev = g2d_priv-&gt;dev;</div><div class='add'>+	struct g2d_data *g2d;</div><div class='add'>+	struct drm_exynos_g2d_set_cmdlist *req = data;</div><div class='add'>+	struct drm_exynos_g2d_cmd *cmd;</div><div class='add'>+	struct drm_exynos_pending_g2d_event *e;</div><div class='add'>+	struct g2d_cmdlist_node *node;</div><div class='add'>+	struct g2d_cmdlist *cmdlist;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	g2d = dev_get_drvdata(dev);</div><div class='add'>+	if (!g2d)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	node = g2d_get_cmdlist(g2d);</div><div class='add'>+	if (!node)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	node-&gt;event = NULL;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;event_type != G2D_EVENT_NOT) {</div><div class='add'>+		spin_lock_irqsave(&amp;drm_dev-&gt;event_lock, flags);</div><div class='add'>+		if (file-&gt;event_space &lt; sizeof(e-&gt;event)) {</div><div class='add'>+			spin_unlock_irqrestore(&amp;drm_dev-&gt;event_lock, flags);</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		file-&gt;event_space -= sizeof(e-&gt;event);</div><div class='add'>+		spin_unlock_irqrestore(&amp;drm_dev-&gt;event_lock, flags);</div><div class='add'>+</div><div class='add'>+		e = kzalloc(sizeof(*node-&gt;event), GFP_KERNEL);</div><div class='add'>+		if (!e) {</div><div class='add'>+			dev_err(dev, "failed to allocate event\n");</div><div class='add'>+</div><div class='add'>+			spin_lock_irqsave(&amp;drm_dev-&gt;event_lock, flags);</div><div class='add'>+			file-&gt;event_space += sizeof(e-&gt;event);</div><div class='add'>+			spin_unlock_irqrestore(&amp;drm_dev-&gt;event_lock, flags);</div><div class='add'>+</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		e-&gt;event.base.type = DRM_EXYNOS_G2D_EVENT;</div><div class='add'>+		e-&gt;event.base.length = sizeof(e-&gt;event);</div><div class='add'>+		e-&gt;event.user_data = req-&gt;user_data;</div><div class='add'>+		e-&gt;base.event = &amp;e-&gt;event.base;</div><div class='add'>+		e-&gt;base.file_priv = file;</div><div class='add'>+		e-&gt;base.destroy = (void (*) (struct drm_pending_event *)) kfree;</div><div class='add'>+</div><div class='add'>+		node-&gt;event = e;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmdlist = node-&gt;cmdlist;</div><div class='add'>+</div><div class='add'>+	cmdlist-&gt;last = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If don't clear SFR registers, the cmdlist is affected by register</div><div class='add'>+	 * values of previous cmdlist. G2D hw executes SFR clear command and</div><div class='add'>+	 * a next command at the same time then the next command is ignored and</div><div class='add'>+	 * is executed rightly from next next command, so needs a dummy command</div><div class='add'>+	 * to next command of SFR clear command.</div><div class='add'>+	 */</div><div class='add'>+	cmdlist-&gt;data[cmdlist-&gt;last++] = G2D_SOFT_RESET;</div><div class='add'>+	cmdlist-&gt;data[cmdlist-&gt;last++] = G2D_SFRCLEAR;</div><div class='add'>+	cmdlist-&gt;data[cmdlist-&gt;last++] = G2D_SRC_BASE_ADDR;</div><div class='add'>+	cmdlist-&gt;data[cmdlist-&gt;last++] = 0;</div><div class='add'>+</div><div class='add'>+	if (node-&gt;event) {</div><div class='add'>+		cmdlist-&gt;data[cmdlist-&gt;last++] = G2D_DMA_HOLD_CMD;</div><div class='add'>+		cmdlist-&gt;data[cmdlist-&gt;last++] = G2D_LIST_HOLD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check size of cmdlist: last 2 is about G2D_BITBLT_START */</div><div class='add'>+	size = cmdlist-&gt;last + req-&gt;cmd_nr * 2 + req-&gt;cmd_gem_nr * 2 + 2;</div><div class='add'>+	if (size &gt; G2D_CMDLIST_DATA_NUM) {</div><div class='add'>+		dev_err(dev, "cmdlist size is too big\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_free_event;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req-&gt;cmd;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(cmdlist-&gt;data + cmdlist-&gt;last,</div><div class='add'>+				(void __user *)cmd,</div><div class='add'>+				sizeof(*cmd) * req-&gt;cmd_nr)) {</div><div class='add'>+		ret = -EFAULT;</div><div class='add'>+		goto err_free_event;</div><div class='add'>+	}</div><div class='add'>+	cmdlist-&gt;last += req-&gt;cmd_nr * 2;</div><div class='add'>+</div><div class='add'>+	ret = g2d_check_reg_offset(dev, cmdlist, req-&gt;cmd_nr, false);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_free_event;</div><div class='add'>+</div><div class='add'>+	node-&gt;gem_nr = req-&gt;cmd_gem_nr;</div><div class='add'>+	if (req-&gt;cmd_gem_nr) {</div><div class='add'>+		struct drm_exynos_g2d_cmd *cmd_gem;</div><div class='add'>+</div><div class='add'>+		cmd_gem = (struct drm_exynos_g2d_cmd *)(uint32_t)req-&gt;cmd_gem;</div><div class='add'>+</div><div class='add'>+		if (copy_from_user(cmdlist-&gt;data + cmdlist-&gt;last,</div><div class='add'>+					(void __user *)cmd_gem,</div><div class='add'>+					sizeof(*cmd_gem) * req-&gt;cmd_gem_nr)) {</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+			goto err_free_event;</div><div class='add'>+		}</div><div class='add'>+		cmdlist-&gt;last += req-&gt;cmd_gem_nr * 2;</div><div class='add'>+</div><div class='add'>+		ret = g2d_check_reg_offset(dev, cmdlist, req-&gt;cmd_gem_nr, true);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err_free_event;</div><div class='add'>+</div><div class='add'>+		ret = g2d_get_cmdlist_gem(drm_dev, file, node);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err_unmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmdlist-&gt;data[cmdlist-&gt;last++] = G2D_BITBLT_START;</div><div class='add'>+	cmdlist-&gt;data[cmdlist-&gt;last++] = G2D_START_BITBLT;</div><div class='add'>+</div><div class='add'>+	/* head */</div><div class='add'>+	cmdlist-&gt;head = cmdlist-&gt;last / 2;</div><div class='add'>+</div><div class='add'>+	/* tail */</div><div class='add'>+	cmdlist-&gt;data[cmdlist-&gt;last] = 0;</div><div class='add'>+</div><div class='add'>+	g2d_add_cmdlist_to_inuse(g2d_priv, node);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unmap:</div><div class='add'>+	g2d_put_cmdlist_gem(drm_dev, file, node-&gt;gem_nr);</div><div class='add'>+err_free_event:</div><div class='add'>+	if (node-&gt;event) {</div><div class='add'>+		spin_lock_irqsave(&amp;drm_dev-&gt;event_lock, flags);</div><div class='add'>+		file-&gt;event_space += sizeof(e-&gt;event);</div><div class='add'>+		spin_unlock_irqrestore(&amp;drm_dev-&gt;event_lock, flags);</div><div class='add'>+		kfree(node-&gt;event);</div><div class='add'>+	}</div><div class='add'>+err:</div><div class='add'>+	g2d_put_cmdlist(g2d, node);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(exynos_g2d_set_cmdlist_ioctl);</div><div class='add'>+</div><div class='add'>+int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,</div><div class='add'>+			  struct drm_file *file)</div><div class='add'>+{</div><div class='add'>+	struct drm_exynos_file_private *file_priv = file-&gt;driver_priv;</div><div class='add'>+	struct exynos_drm_g2d_private *g2d_priv = file_priv-&gt;g2d_priv;</div><div class='add'>+	struct device *dev = g2d_priv-&gt;dev;</div><div class='add'>+	struct g2d_data *g2d;</div><div class='add'>+	struct drm_exynos_g2d_exec *req = data;</div><div class='add'>+	struct g2d_runqueue_node *runqueue_node;</div><div class='add'>+	struct list_head *run_cmdlist;</div><div class='add'>+	struct list_head *event_list;</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	g2d = dev_get_drvdata(dev);</div><div class='add'>+	if (!g2d)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	runqueue_node = kmem_cache_alloc(g2d-&gt;runqueue_slab, GFP_KERNEL);</div><div class='add'>+	if (!runqueue_node) {</div><div class='add'>+		dev_err(dev, "failed to allocate memory\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	run_cmdlist = &amp;runqueue_node-&gt;run_cmdlist;</div><div class='add'>+	event_list = &amp;runqueue_node-&gt;event_list;</div><div class='add'>+	INIT_LIST_HEAD(run_cmdlist);</div><div class='add'>+	INIT_LIST_HEAD(event_list);</div><div class='add'>+	init_completion(&amp;runqueue_node-&gt;complete);</div><div class='add'>+	runqueue_node-&gt;async = req-&gt;async;</div><div class='add'>+</div><div class='add'>+	list_splice_init(&amp;g2d_priv-&gt;inuse_cmdlist, run_cmdlist);</div><div class='add'>+	list_splice_init(&amp;g2d_priv-&gt;event_list, event_list);</div><div class='add'>+</div><div class='add'>+	if (list_empty(run_cmdlist)) {</div><div class='add'>+		dev_err(dev, "there is no inuse cmdlist\n");</div><div class='add'>+		kmem_cache_free(g2d-&gt;runqueue_slab, runqueue_node);</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;g2d-&gt;runqueue_mutex);</div><div class='add'>+	list_add_tail(&amp;runqueue_node-&gt;list, &amp;g2d-&gt;runqueue);</div><div class='add'>+	if (!g2d-&gt;runqueue_node)</div><div class='add'>+		g2d_exec_runqueue(g2d);</div><div class='add'>+	mutex_unlock(&amp;g2d-&gt;runqueue_mutex);</div><div class='add'>+</div><div class='add'>+	if (runqueue_node-&gt;async)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	wait_for_completion(&amp;runqueue_node-&gt;complete);</div><div class='add'>+	g2d_free_runqueue_node(g2d, runqueue_node);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(exynos_g2d_exec_ioctl);</div><div class='add'>+</div><div class='add'>+static int g2d_open(struct drm_device *drm_dev, struct device *dev,</div><div class='add'>+			struct drm_file *file)</div><div class='add'>+{</div><div class='add'>+	struct drm_exynos_file_private *file_priv = file-&gt;driver_priv;</div><div class='add'>+	struct exynos_drm_g2d_private *g2d_priv;</div><div class='add'>+</div><div class='add'>+	g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL);</div><div class='add'>+	if (!g2d_priv) {</div><div class='add'>+		dev_err(dev, "failed to allocate g2d private data\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	g2d_priv-&gt;dev = dev;</div><div class='add'>+	file_priv-&gt;g2d_priv = g2d_priv;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;g2d_priv-&gt;inuse_cmdlist);</div><div class='add'>+	INIT_LIST_HEAD(&amp;g2d_priv-&gt;event_list);</div><div class='add'>+	INIT_LIST_HEAD(&amp;g2d_priv-&gt;gem_list);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g2d_close(struct drm_device *drm_dev, struct device *dev,</div><div class='add'>+			struct drm_file *file)</div><div class='add'>+{</div><div class='add'>+	struct drm_exynos_file_private *file_priv = file-&gt;driver_priv;</div><div class='add'>+	struct exynos_drm_g2d_private *g2d_priv = file_priv-&gt;g2d_priv;</div><div class='add'>+	struct g2d_data *g2d;</div><div class='add'>+	struct g2d_cmdlist_node *node, *n;</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	g2d = dev_get_drvdata(dev);</div><div class='add'>+	if (!g2d)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;g2d-&gt;cmdlist_mutex);</div><div class='add'>+	list_for_each_entry_safe(node, n, &amp;g2d_priv-&gt;inuse_cmdlist, list)</div><div class='add'>+		list_move_tail(&amp;node-&gt;list, &amp;g2d-&gt;free_cmdlist);</div><div class='add'>+	mutex_unlock(&amp;g2d-&gt;cmdlist_mutex);</div><div class='add'>+</div><div class='add'>+	g2d_put_cmdlist_gem(drm_dev, file, g2d_priv-&gt;gem_nr);</div><div class='add'>+</div><div class='add'>+	kfree(file_priv-&gt;g2d_priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit g2d_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	struct g2d_data *g2d;</div><div class='add'>+	struct exynos_drm_subdrv *subdrv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	g2d = kzalloc(sizeof(*g2d), GFP_KERNEL);</div><div class='add'>+	if (!g2d) {</div><div class='add'>+		dev_err(dev, "failed to allocate driver data\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	g2d-&gt;runqueue_slab = kmem_cache_create("g2d_runqueue_slab",</div><div class='add'>+			sizeof(struct g2d_runqueue_node), 0, 0, NULL);</div><div class='add'>+	if (!g2d-&gt;runqueue_slab) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_free_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	g2d-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	g2d-&gt;g2d_workq = create_singlethread_workqueue("g2d");</div><div class='add'>+	if (!g2d-&gt;g2d_workq) {</div><div class='add'>+		dev_err(dev, "failed to create workqueue\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_destroy_slab;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;g2d-&gt;runqueue_work, g2d_runqueue_worker);</div><div class='add'>+	INIT_LIST_HEAD(&amp;g2d-&gt;free_cmdlist);</div><div class='add'>+	INIT_LIST_HEAD(&amp;g2d-&gt;runqueue);</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;g2d-&gt;cmdlist_mutex);</div><div class='add'>+	mutex_init(&amp;g2d-&gt;runqueue_mutex);</div><div class='add'>+</div><div class='add'>+	ret = g2d_init_cmdlist(g2d);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_destroy_workqueue;</div><div class='add'>+</div><div class='add'>+	g2d-&gt;gate_clk = clk_get(dev, "fimg2d");</div><div class='add'>+	if (IS_ERR(g2d-&gt;gate_clk)) {</div><div class='add'>+		dev_err(dev, "failed to get gate clock\n");</div><div class='add'>+		ret = PTR_ERR(g2d-&gt;gate_clk);</div><div class='add'>+		goto err_fini_cmdlist;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pm_runtime_enable(dev);</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_err(dev, "failed to get I/O memory\n");</div><div class='add'>+		ret = -ENOENT;</div><div class='add'>+		goto err_put_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	g2d-&gt;regs_res = request_mem_region(res-&gt;start, resource_size(res),</div><div class='add'>+					   dev_name(dev));</div><div class='add'>+	if (!g2d-&gt;regs_res) {</div><div class='add'>+		dev_err(dev, "failed to request I/O memory\n");</div><div class='add'>+		ret = -ENOENT;</div><div class='add'>+		goto err_put_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	g2d-&gt;regs = ioremap(res-&gt;start, resource_size(res));</div><div class='add'>+	if (!g2d-&gt;regs) {</div><div class='add'>+		dev_err(dev, "failed to remap I/O memory\n");</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+		goto err_release_res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	g2d-&gt;irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (g2d-&gt;irq &lt; 0) {</div><div class='add'>+		dev_err(dev, "failed to get irq\n");</div><div class='add'>+		ret = g2d-&gt;irq;</div><div class='add'>+		goto err_unmap_base;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = request_irq(g2d-&gt;irq, g2d_irq_handler, 0, "drm_g2d", g2d);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "irq request failed\n");</div><div class='add'>+		goto err_unmap_base;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, g2d);</div><div class='add'>+</div><div class='add'>+	subdrv = &amp;g2d-&gt;subdrv;</div><div class='add'>+	subdrv-&gt;dev = dev;</div><div class='add'>+	subdrv-&gt;open = g2d_open;</div><div class='add'>+	subdrv-&gt;close = g2d_close;</div><div class='add'>+</div><div class='add'>+	ret = exynos_drm_subdrv_register(subdrv);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "failed to register drm g2d device\n");</div><div class='add'>+		goto err_free_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n",</div><div class='add'>+			G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irq:</div><div class='add'>+	free_irq(g2d-&gt;irq, g2d);</div><div class='add'>+err_unmap_base:</div><div class='add'>+	iounmap(g2d-&gt;regs);</div><div class='add'>+err_release_res:</div><div class='add'>+	release_resource(g2d-&gt;regs_res);</div><div class='add'>+	kfree(g2d-&gt;regs_res);</div><div class='add'>+err_put_clk:</div><div class='add'>+	pm_runtime_disable(dev);</div><div class='add'>+	clk_put(g2d-&gt;gate_clk);</div><div class='add'>+err_fini_cmdlist:</div><div class='add'>+	g2d_fini_cmdlist(g2d);</div><div class='add'>+err_destroy_workqueue:</div><div class='add'>+	destroy_workqueue(g2d-&gt;g2d_workq);</div><div class='add'>+err_destroy_slab:</div><div class='add'>+	kmem_cache_destroy(g2d-&gt;runqueue_slab);</div><div class='add'>+err_free_mem:</div><div class='add'>+	kfree(g2d);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit g2d_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct g2d_data *g2d = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	cancel_work_sync(&amp;g2d-&gt;runqueue_work);</div><div class='add'>+	exynos_drm_subdrv_unregister(&amp;g2d-&gt;subdrv);</div><div class='add'>+	free_irq(g2d-&gt;irq, g2d);</div><div class='add'>+</div><div class='add'>+	while (g2d-&gt;runqueue_node) {</div><div class='add'>+		g2d_free_runqueue_node(g2d, g2d-&gt;runqueue_node);</div><div class='add'>+		g2d-&gt;runqueue_node = g2d_get_runqueue_node(g2d);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iounmap(g2d-&gt;regs);</div><div class='add'>+	release_resource(g2d-&gt;regs_res);</div><div class='add'>+	kfree(g2d-&gt;regs_res);</div><div class='add'>+</div><div class='add'>+	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='add'>+	clk_put(g2d-&gt;gate_clk);</div><div class='add'>+</div><div class='add'>+	g2d_fini_cmdlist(g2d);</div><div class='add'>+	destroy_workqueue(g2d-&gt;g2d_workq);</div><div class='add'>+	kmem_cache_destroy(g2d-&gt;runqueue_slab);</div><div class='add'>+	kfree(g2d);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int g2d_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct g2d_data *g2d = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;g2d-&gt;runqueue_mutex);</div><div class='add'>+	g2d-&gt;suspended = true;</div><div class='add'>+	mutex_unlock(&amp;g2d-&gt;runqueue_mutex);</div><div class='add'>+</div><div class='add'>+	while (g2d-&gt;runqueue_node)</div><div class='add'>+		/* FIXME: good range? */</div><div class='add'>+		usleep_range(500, 1000);</div><div class='add'>+</div><div class='add'>+	flush_work_sync(&amp;g2d-&gt;runqueue_work);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int g2d_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct g2d_data *g2d = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	g2d-&gt;suspended = false;</div><div class='add'>+	g2d_exec_runqueue(g2d);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+SIMPLE_DEV_PM_OPS(g2d_pm_ops, g2d_suspend, g2d_resume);</div><div class='add'>+</div><div class='add'>+struct platform_driver g2d_driver = {</div><div class='add'>+	.probe		= g2d_probe,</div><div class='add'>+	.remove		= __devexit_p(g2d_remove),</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "s5p-g2d",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+		.pm	= &amp;g2d_pm_ops,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.h b/drivers/gpu/drm/exynos/exynos_drm_g2d.h<br/>new file mode 100644<br/>index 000000000000..1a9c7ca8c15b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_g2d.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_g2d.h</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 Samsung Electronics Co.Ltd</div><div class='add'>+ * Authors: Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundationr</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DRM_EXYNOS_G2D</div><div class='add'>+extern int exynos_g2d_get_ver_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+				    struct drm_file *file_priv);</div><div class='add'>+extern int exynos_g2d_set_cmdlist_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+					struct drm_file *file_priv);</div><div class='add'>+extern int exynos_g2d_exec_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+				 struct drm_file *file_priv);</div><div class='add'>+#else</div><div class='add'>+static inline int exynos_g2d_get_ver_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+					   struct drm_file *file_priv)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int exynos_g2d_set_cmdlist_ioctl(struct drm_device *dev,</div><div class='add'>+					       void *data,</div><div class='add'>+					       struct drm_file *file_priv)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int exynos_g2d_exec_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+					struct drm_file *file_priv)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c b/drivers/gpu/drm/exynos/exynos_drm_gem.c<br/>index 1dffa8359f88..5c8b683029ea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_gem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_gem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_gem.c</a></div><div class='hunk'>@@ -66,6 +66,22 @@ static int check_gem_flags(unsigned int flags)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void update_vm_cache_attr(struct exynos_drm_gem_obj *obj,</div><div class='add'>+					struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	DRM_DEBUG_KMS("flags = 0x%x\n", obj-&gt;flags);</div><div class='add'>+</div><div class='add'>+	/* non-cachable as default. */</div><div class='add'>+	if (obj-&gt;flags &amp; EXYNOS_BO_CACHABLE)</div><div class='add'>+		vma-&gt;vm_page_prot = vm_get_page_prot(vma-&gt;vm_flags);</div><div class='add'>+	else if (obj-&gt;flags &amp; EXYNOS_BO_WC)</div><div class='add'>+		vma-&gt;vm_page_prot =</div><div class='add'>+			pgprot_writecombine(vm_get_page_prot(vma-&gt;vm_flags));</div><div class='add'>+	else</div><div class='add'>+		vma-&gt;vm_page_prot =</div><div class='add'>+			pgprot_noncached(vm_get_page_prot(vma-&gt;vm_flags));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static unsigned long roundup_gem_size(unsigned long size, unsigned int flags)</div><div class='ctx'> {</div><div class='ctx'> 	if (!IS_NONCONTIG_BUFFER(flags)) {</div><div class='hunk'>@@ -80,7 +96,7 @@ out:</div><div class='ctx'> 	return roundup(size, PAGE_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct page **exynos_gem_get_pages(struct drm_gem_object *obj,</div><div class='add'>+struct page **exynos_gem_get_pages(struct drm_gem_object *obj,</div><div class='ctx'> 						gfp_t gfpmask)</div><div class='ctx'> {</div><div class='ctx'> 	struct inode *inode;</div><div class='hunk'>@@ -180,6 +196,7 @@ static int exynos_drm_gem_get_pages(struct drm_gem_object *obj)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	npages = obj-&gt;size &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	buf-&gt;page_size = PAGE_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	buf-&gt;sgt = kzalloc(sizeof(struct sg_table), GFP_KERNEL);</div><div class='ctx'> 	if (!buf-&gt;sgt) {</div><div class='hunk'>@@ -262,24 +279,24 @@ static int exynos_drm_gem_handle_create(struct drm_gem_object *obj,</div><div class='ctx'> void exynos_drm_gem_destroy(struct exynos_drm_gem_obj *exynos_gem_obj)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_gem_object *obj;</div><div class='add'>+	struct exynos_drm_gem_buf *buf;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("%s\n", __FILE__);</div><div class='ctx'> </div><div class='del'>-	if (!exynos_gem_obj)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	obj = &amp;exynos_gem_obj-&gt;base;</div><div class='add'>+	buf = exynos_gem_obj-&gt;buffer;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("handle count = %d\n", atomic_read(&amp;obj-&gt;handle_count));</div><div class='ctx'> </div><div class='del'>-	if ((exynos_gem_obj-&gt;flags &amp; EXYNOS_BO_NONCONTIG) &amp;&amp;</div><div class='del'>-			exynos_gem_obj-&gt;buffer-&gt;pages)</div><div class='add'>+	if (!buf-&gt;pages)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (exynos_gem_obj-&gt;flags &amp; EXYNOS_BO_NONCONTIG)</div><div class='ctx'> 		exynos_drm_gem_put_pages(obj);</div><div class='ctx'> 	else</div><div class='del'>-		exynos_drm_free_buf(obj-&gt;dev, exynos_gem_obj-&gt;flags,</div><div class='del'>-					exynos_gem_obj-&gt;buffer);</div><div class='add'>+		exynos_drm_free_buf(obj-&gt;dev, exynos_gem_obj-&gt;flags, buf);</div><div class='ctx'> </div><div class='del'>-	exynos_drm_fini_buf(obj-&gt;dev, exynos_gem_obj-&gt;buffer);</div><div class='add'>+	exynos_drm_fini_buf(obj-&gt;dev, buf);</div><div class='ctx'> 	exynos_gem_obj-&gt;buffer = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (obj-&gt;map_list.map)</div><div class='hunk'>@@ -292,7 +309,7 @@ void exynos_drm_gem_destroy(struct exynos_drm_gem_obj *exynos_gem_obj)</div><div class='ctx'> 	exynos_gem_obj = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct exynos_drm_gem_obj *exynos_drm_gem_init(struct drm_device *dev,</div><div class='add'>+struct exynos_drm_gem_obj *exynos_drm_gem_init(struct drm_device *dev,</div><div class='ctx'> 						      unsigned long size)</div><div class='ctx'> {</div><div class='ctx'> 	struct exynos_drm_gem_obj *exynos_gem_obj;</div><div class='hunk'>@@ -493,8 +510,7 @@ static int exynos_drm_gem_mmap_buffer(struct file *filp,</div><div class='ctx'> </div><div class='ctx'> 	vma-&gt;vm_flags |= (VM_IO | VM_RESERVED);</div><div class='ctx'> </div><div class='del'>-	/* in case of direct mapping, always having non-cachable attribute */</div><div class='del'>-	vma-&gt;vm_page_prot = pgprot_noncached(vma-&gt;vm_page_prot);</div><div class='add'>+	update_vm_cache_attr(exynos_gem_obj, vma);</div><div class='ctx'> </div><div class='ctx'> 	vm_size = usize = vma-&gt;vm_end - vma-&gt;vm_start;</div><div class='ctx'> </div><div class='hunk'>@@ -588,6 +604,32 @@ int exynos_drm_gem_mmap_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int exynos_drm_gem_get_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+				      struct drm_file *file_priv)</div><div class='add'>+{	struct exynos_drm_gem_obj *exynos_gem_obj;</div><div class='add'>+	struct drm_exynos_gem_info *args = data;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+	obj = drm_gem_object_lookup(dev, file_priv, args-&gt;handle);</div><div class='add'>+	if (!obj) {</div><div class='add'>+		DRM_ERROR("failed to lookup gem object.\n");</div><div class='add'>+		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	exynos_gem_obj = to_exynos_gem_obj(obj);</div><div class='add'>+</div><div class='add'>+	args-&gt;flags = exynos_gem_obj-&gt;flags;</div><div class='add'>+	args-&gt;size = exynos_gem_obj-&gt;size;</div><div class='add'>+</div><div class='add'>+	drm_gem_object_unreference(obj);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int exynos_drm_gem_init_object(struct drm_gem_object *obj)</div><div class='ctx'> {</div><div class='ctx'> 	DRM_DEBUG_KMS("%s\n", __FILE__);</div><div class='hunk'>@@ -597,8 +639,17 @@ int exynos_drm_gem_init_object(struct drm_gem_object *obj)</div><div class='ctx'> </div><div class='ctx'> void exynos_drm_gem_free_object(struct drm_gem_object *obj)</div><div class='ctx'> {</div><div class='add'>+	struct exynos_drm_gem_obj *exynos_gem_obj;</div><div class='add'>+	struct exynos_drm_gem_buf *buf;</div><div class='add'>+</div><div class='ctx'> 	DRM_DEBUG_KMS("%s\n", __FILE__);</div><div class='ctx'> </div><div class='add'>+	exynos_gem_obj = to_exynos_gem_obj(obj);</div><div class='add'>+	buf = exynos_gem_obj-&gt;buffer;</div><div class='add'>+</div><div class='add'>+	if (obj-&gt;import_attach)</div><div class='add'>+		drm_prime_gem_destroy(obj, buf-&gt;sgt);</div><div class='add'>+</div><div class='ctx'> 	exynos_drm_gem_destroy(to_exynos_gem_obj(obj));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -638,7 +689,6 @@ int exynos_drm_gem_dumb_map_offset(struct drm_file *file_priv,</div><div class='ctx'> 				   struct drm_device *dev, uint32_t handle,</div><div class='ctx'> 				   uint64_t *offset)</div><div class='ctx'> {</div><div class='del'>-	struct exynos_drm_gem_obj *exynos_gem_obj;</div><div class='ctx'> 	struct drm_gem_object *obj;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -659,15 +709,13 @@ int exynos_drm_gem_dumb_map_offset(struct drm_file *file_priv,</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	exynos_gem_obj = to_exynos_gem_obj(obj);</div><div class='del'>-</div><div class='del'>-	if (!exynos_gem_obj-&gt;base.map_list.map) {</div><div class='del'>-		ret = drm_gem_create_mmap_offset(&amp;exynos_gem_obj-&gt;base);</div><div class='add'>+	if (!obj-&gt;map_list.map) {</div><div class='add'>+		ret = drm_gem_create_mmap_offset(obj);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*offset = (u64)exynos_gem_obj-&gt;base.map_list.hash.key &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	*offset = (u64)obj-&gt;map_list.hash.key &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> 	DRM_DEBUG_KMS("offset = 0x%lx\n", (unsigned long)*offset);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -724,6 +772,8 @@ int exynos_drm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)</div><div class='ctx'> </div><div class='ctx'> int exynos_drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='add'>+	struct exynos_drm_gem_obj *exynos_gem_obj;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("%s\n", __FILE__);</div><div class='hunk'>@@ -735,8 +785,20 @@ int exynos_drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	obj = vma-&gt;vm_private_data;</div><div class='add'>+	exynos_gem_obj = to_exynos_gem_obj(obj);</div><div class='add'>+</div><div class='add'>+	ret = check_gem_flags(exynos_gem_obj-&gt;flags);</div><div class='add'>+	if (ret) {</div><div class='add'>+		drm_gem_vm_close(vma);</div><div class='add'>+		drm_gem_free_mmap_offset(obj);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	vma-&gt;vm_flags &amp;= ~VM_PFNMAP;</div><div class='ctx'> 	vma-&gt;vm_flags |= VM_MIXEDMAP;</div><div class='ctx'> </div><div class='add'>+	update_vm_cache_attr(exynos_gem_obj, vma);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.h b/drivers/gpu/drm/exynos/exynos_drm_gem.h<br/>index 4ed842039505..14d038b6cb02 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_gem.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_gem.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_gem.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_gem.h</a></div><div class='hunk'>@@ -40,6 +40,7 @@</div><div class='ctx'>  *	device address with IOMMU.</div><div class='ctx'>  * @sgt: sg table to transfer page data.</div><div class='ctx'>  * @pages: contain all pages to allocated memory region.</div><div class='add'>+ * @page_size: could be 4K, 64K or 1MB.</div><div class='ctx'>  * @size: size of allocated memory region.</div><div class='ctx'>  */</div><div class='ctx'> struct exynos_drm_gem_buf {</div><div class='hunk'>@@ -47,6 +48,7 @@ struct exynos_drm_gem_buf {</div><div class='ctx'> 	dma_addr_t		dma_addr;</div><div class='ctx'> 	struct sg_table		*sgt;</div><div class='ctx'> 	struct page		**pages;</div><div class='add'>+	unsigned long		page_size;</div><div class='ctx'> 	unsigned long		size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -74,9 +76,15 @@ struct exynos_drm_gem_obj {</div><div class='ctx'> 	unsigned int			flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct page **exynos_gem_get_pages(struct drm_gem_object *obj, gfp_t gfpmask);</div><div class='add'>+</div><div class='ctx'> /* destroy a buffer with gem object */</div><div class='ctx'> void exynos_drm_gem_destroy(struct exynos_drm_gem_obj *exynos_gem_obj);</div><div class='ctx'> </div><div class='add'>+/* create a private gem object and initialize it. */</div><div class='add'>+struct exynos_drm_gem_obj *exynos_drm_gem_init(struct drm_device *dev,</div><div class='add'>+						      unsigned long size);</div><div class='add'>+</div><div class='ctx'> /* create a new buffer with gem object */</div><div class='ctx'> struct exynos_drm_gem_obj *exynos_drm_gem_create(struct drm_device *dev,</div><div class='ctx'> 						unsigned int flags,</div><div class='hunk'>@@ -119,6 +127,10 @@ int exynos_drm_gem_map_offset_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> int exynos_drm_gem_mmap_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 			      struct drm_file *file_priv);</div><div class='ctx'> </div><div class='add'>+/* get buffer information to memory region allocated by gem. */</div><div class='add'>+int exynos_drm_gem_get_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+				      struct drm_file *file_priv);</div><div class='add'>+</div><div class='ctx'> /* initialize gem object. */</div><div class='ctx'> int exynos_drm_gem_init_object(struct drm_gem_object *obj);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_hdmi.c b/drivers/gpu/drm/exynos/exynos_drm_hdmi.c<br/>index 3424463676e0..5d9d2c2f8f3f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_hdmi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_hdmi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_hdmi.c</a></div><div class='hunk'>@@ -37,6 +37,8 @@ struct drm_hdmi_context {</div><div class='ctx'> 	struct exynos_drm_subdrv	subdrv;</div><div class='ctx'> 	struct exynos_drm_hdmi_context	*hdmi_ctx;</div><div class='ctx'> 	struct exynos_drm_hdmi_context	*mixer_ctx;</div><div class='add'>+</div><div class='add'>+	bool	enabled[MIXER_WIN_NR];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void exynos_hdmi_ops_register(struct exynos_hdmi_ops *ops)</div><div class='hunk'>@@ -189,23 +191,34 @@ static void drm_hdmi_dpms(struct device *subdrv_dev, int mode)</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("%s\n", __FILE__);</div><div class='ctx'> </div><div class='del'>-	switch (mode) {</div><div class='del'>-	case DRM_MODE_DPMS_ON:</div><div class='del'>-		break;</div><div class='del'>-	case DRM_MODE_DPMS_STANDBY:</div><div class='del'>-	case DRM_MODE_DPMS_SUSPEND:</div><div class='del'>-	case DRM_MODE_DPMS_OFF:</div><div class='del'>-		if (hdmi_ops &amp;&amp; hdmi_ops-&gt;disable)</div><div class='del'>-			hdmi_ops-&gt;disable(ctx-&gt;hdmi_ctx-&gt;ctx);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		DRM_DEBUG_KMS("unkown dps mode: %d\n", mode);</div><div class='del'>-		break;</div><div class='add'>+	if (mixer_ops &amp;&amp; mixer_ops-&gt;dpms)</div><div class='add'>+		mixer_ops-&gt;dpms(ctx-&gt;mixer_ctx-&gt;ctx, mode);</div><div class='add'>+</div><div class='add'>+	if (hdmi_ops &amp;&amp; hdmi_ops-&gt;dpms)</div><div class='add'>+		hdmi_ops-&gt;dpms(ctx-&gt;hdmi_ctx-&gt;ctx, mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void drm_hdmi_apply(struct device *subdrv_dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_hdmi_context *ctx = to_context(subdrv_dev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("%s\n", __FILE__);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MIXER_WIN_NR; i++) {</div><div class='add'>+		if (!ctx-&gt;enabled[i])</div><div class='add'>+			continue;</div><div class='add'>+		if (mixer_ops &amp;&amp; mixer_ops-&gt;win_commit)</div><div class='add'>+			mixer_ops-&gt;win_commit(ctx-&gt;mixer_ctx-&gt;ctx, i);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (hdmi_ops &amp;&amp; hdmi_ops-&gt;commit)</div><div class='add'>+		hdmi_ops-&gt;commit(ctx-&gt;hdmi_ctx-&gt;ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct exynos_drm_manager_ops drm_hdmi_manager_ops = {</div><div class='ctx'> 	.dpms = drm_hdmi_dpms,</div><div class='add'>+	.apply = drm_hdmi_apply,</div><div class='ctx'> 	.enable_vblank = drm_hdmi_enable_vblank,</div><div class='ctx'> 	.disable_vblank = drm_hdmi_disable_vblank,</div><div class='ctx'> 	.mode_fixup = drm_hdmi_mode_fixup,</div><div class='hunk'>@@ -228,21 +241,37 @@ static void drm_mixer_mode_set(struct device *subdrv_dev,</div><div class='ctx'> static void drm_mixer_commit(struct device *subdrv_dev, int zpos)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_hdmi_context *ctx = to_context(subdrv_dev);</div><div class='add'>+	int win = (zpos == DEFAULT_ZPOS) ? MIXER_DEFAULT_WIN : zpos;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("%s\n", __FILE__);</div><div class='ctx'> </div><div class='add'>+	if (win &lt; 0 || win &gt; MIXER_WIN_NR) {</div><div class='add'>+		DRM_ERROR("mixer window[%d] is wrong\n", win);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (mixer_ops &amp;&amp; mixer_ops-&gt;win_commit)</div><div class='del'>-		mixer_ops-&gt;win_commit(ctx-&gt;mixer_ctx-&gt;ctx, zpos);</div><div class='add'>+		mixer_ops-&gt;win_commit(ctx-&gt;mixer_ctx-&gt;ctx, win);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;enabled[win] = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void drm_mixer_disable(struct device *subdrv_dev, int zpos)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_hdmi_context *ctx = to_context(subdrv_dev);</div><div class='add'>+	int win = (zpos == DEFAULT_ZPOS) ? MIXER_DEFAULT_WIN : zpos;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("%s\n", __FILE__);</div><div class='ctx'> </div><div class='add'>+	if (win &lt; 0 || win &gt; MIXER_WIN_NR) {</div><div class='add'>+		DRM_ERROR("mixer window[%d] is wrong\n", win);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (mixer_ops &amp;&amp; mixer_ops-&gt;win_disable)</div><div class='del'>-		mixer_ops-&gt;win_disable(ctx-&gt;mixer_ctx-&gt;ctx, zpos);</div><div class='add'>+		mixer_ops-&gt;win_disable(ctx-&gt;mixer_ctx-&gt;ctx, win);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;enabled[win] = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct exynos_drm_overlay_ops drm_hdmi_overlay_ops = {</div><div class='hunk'>@@ -335,25 +364,6 @@ static int __devinit exynos_drm_hdmi_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hdmi_runtime_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	DRM_DEBUG_KMS("%s\n", __FILE__);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hdmi_runtime_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	DRM_DEBUG_KMS("%s\n", __FILE__);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct dev_pm_ops hdmi_pm_ops = {</div><div class='del'>-	.runtime_suspend = hdmi_runtime_suspend,</div><div class='del'>-	.runtime_resume	 = hdmi_runtime_resume,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int __devexit exynos_drm_hdmi_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_hdmi_context *ctx = platform_get_drvdata(pdev);</div><div class='hunk'>@@ -372,6 +382,5 @@ struct platform_driver exynos_drm_common_hdmi_driver = {</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "exynos-drm-hdmi",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='del'>-		.pm = &amp;hdmi_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_hdmi.h b/drivers/gpu/drm/exynos/exynos_drm_hdmi.h<br/>index f3ae192c8dcf..bd8126996e52 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_hdmi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_hdmi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_hdmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_hdmi.h</a></div><div class='hunk'>@@ -26,6 +26,9 @@</div><div class='ctx'> #ifndef _EXYNOS_DRM_HDMI_H_</div><div class='ctx'> #define _EXYNOS_DRM_HDMI_H_</div><div class='ctx'> </div><div class='add'>+#define MIXER_WIN_NR		3</div><div class='add'>+#define MIXER_DEFAULT_WIN	0</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * exynos hdmi common context structure.</div><div class='ctx'>  *</div><div class='hunk'>@@ -54,13 +57,14 @@ struct exynos_hdmi_ops {</div><div class='ctx'> 	void (*get_max_resol)(void *ctx, unsigned int *width,</div><div class='ctx'> 				unsigned int *height);</div><div class='ctx'> 	void (*commit)(void *ctx);</div><div class='del'>-	void (*disable)(void *ctx);</div><div class='add'>+	void (*dpms)(void *ctx, int mode);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct exynos_mixer_ops {</div><div class='ctx'> 	/* manager */</div><div class='ctx'> 	int (*enable_vblank)(void *ctx, int pipe);</div><div class='ctx'> 	void (*disable_vblank)(void *ctx);</div><div class='add'>+	void (*dpms)(void *ctx, int mode);</div><div class='ctx'> </div><div class='ctx'> 	/* overlay */</div><div class='ctx'> 	void (*win_mode_set)(void *ctx, struct exynos_drm_overlay *overlay);</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c<br/>index f92fe4c6174a..c4c6525d4653 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_plane.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_drm_plane.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_drm_plane.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_drm_plane.c</a></div><div class='hunk'>@@ -41,8 +41,6 @@ exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,</div><div class='ctx'> 		container_of(plane, struct exynos_plane, base);</div><div class='ctx'> 	struct exynos_drm_overlay *overlay = &amp;exynos_plane-&gt;overlay;</div><div class='ctx'> 	struct exynos_drm_crtc_pos pos;</div><div class='del'>-	unsigned int x = src_x &gt;&gt; 16;</div><div class='del'>-	unsigned int y = src_y &gt;&gt; 16;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='hunk'>@@ -53,10 +51,12 @@ exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,</div><div class='ctx'> 	pos.crtc_w = crtc_w;</div><div class='ctx'> 	pos.crtc_h = crtc_h;</div><div class='ctx'> </div><div class='del'>-	pos.fb_x = x;</div><div class='del'>-	pos.fb_y = y;</div><div class='add'>+	/* considering 16.16 fixed point of source values */</div><div class='add'>+	pos.fb_x = src_x &gt;&gt; 16;</div><div class='add'>+	pos.fb_y = src_y &gt;&gt; 16;</div><div class='add'>+	pos.src_w = src_w &gt;&gt; 16;</div><div class='add'>+	pos.src_h = src_h &gt;&gt; 16;</div><div class='ctx'> </div><div class='del'>-	/* TODO: scale feature */</div><div class='ctx'> 	ret = exynos_drm_overlay_update(overlay, fb, &amp;crtc-&gt;mode, &amp;pos);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c<br/>index b00353876458..a137e9e39a33 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_hdmi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_hdmi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_hdmi.c</a></div><div class='hunk'>@@ -57,18 +57,16 @@ struct hdmi_resources {</div><div class='ctx'> struct hdmi_context {</div><div class='ctx'> 	struct device			*dev;</div><div class='ctx'> 	struct drm_device		*drm_dev;</div><div class='del'>-	struct fb_videomode		*default_timing;</div><div class='del'>-	unsigned int			is_v13:1;</div><div class='del'>-	unsigned int			default_win;</div><div class='del'>-	unsigned int			default_bpp;</div><div class='del'>-	bool				hpd_handle;</div><div class='del'>-	bool				enabled;</div><div class='add'>+	bool				hpd;</div><div class='add'>+	bool				powered;</div><div class='add'>+	bool				is_v13;</div><div class='add'>+	bool				dvi_mode;</div><div class='add'>+	struct mutex			hdmi_mutex;</div><div class='ctx'> </div><div class='ctx'> 	struct resource			*regs_res;</div><div class='ctx'> 	void __iomem			*regs;</div><div class='del'>-	unsigned int			irq;</div><div class='del'>-	struct workqueue_struct		*wq;</div><div class='del'>-	struct work_struct		hotplug_work;</div><div class='add'>+	unsigned int			external_irq;</div><div class='add'>+	unsigned int			internal_irq;</div><div class='ctx'> </div><div class='ctx'> 	struct i2c_client		*ddc_port;</div><div class='ctx'> 	struct i2c_client		*hdmiphy_port;</div><div class='hunk'>@@ -78,6 +76,9 @@ struct hdmi_context {</div><div class='ctx'> </div><div class='ctx'> 	struct hdmi_resources		res;</div><div class='ctx'> 	void				*parent_ctx;</div><div class='add'>+</div><div class='add'>+	void				(*cfg_hpd)(bool external);</div><div class='add'>+	int				(*get_hpd)(void);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* HDMI Version 1.3 */</div><div class='hunk'>@@ -361,6 +362,13 @@ static const u8 hdmiphy_conf27_027[32] = {</div><div class='ctx'> 	0x54, 0xe3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x00,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const u8 hdmiphy_conf74_176[32] = {</div><div class='add'>+	0x01, 0xd1, 0x1f, 0x10, 0x40, 0x5b, 0xef, 0x08,</div><div class='add'>+	0x81, 0xa0, 0xb9, 0xd8, 0x45, 0xa0, 0xac, 0x80,</div><div class='add'>+	0x5a, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,</div><div class='add'>+	0x54, 0xa6, 0x24, 0x01, 0x00, 0x00, 0x01, 0x00,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const u8 hdmiphy_conf74_25[32] = {</div><div class='ctx'> 	0x01, 0xd1, 0x1f, 0x10, 0x40, 0x40, 0xf8, 0x08,</div><div class='ctx'> 	0x81, 0xa0, 0xba, 0xd8, 0x45, 0xa0, 0xac, 0x80,</div><div class='hunk'>@@ -750,6 +758,63 @@ static const struct hdmi_preset_conf hdmi_conf_1080i60 = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct hdmi_preset_conf hdmi_conf_1080p30 = {</div><div class='add'>+	.core = {</div><div class='add'>+		.h_blank = {0x18, 0x01},</div><div class='add'>+		.v2_blank = {0x65, 0x04},</div><div class='add'>+		.v1_blank = {0x2d, 0x00},</div><div class='add'>+		.v_line = {0x65, 0x04},</div><div class='add'>+		.h_line = {0x98, 0x08},</div><div class='add'>+		.hsync_pol = {0x00},</div><div class='add'>+		.vsync_pol = {0x00},</div><div class='add'>+		.int_pro_mode = {0x00},</div><div class='add'>+		.v_blank_f0 = {0xff, 0xff},</div><div class='add'>+		.v_blank_f1 = {0xff, 0xff},</div><div class='add'>+		.h_sync_start = {0x56, 0x00},</div><div class='add'>+		.h_sync_end = {0x82, 0x00},</div><div class='add'>+		.v_sync_line_bef_2 = {0x09, 0x00},</div><div class='add'>+		.v_sync_line_bef_1 = {0x04, 0x00},</div><div class='add'>+		.v_sync_line_aft_2 = {0xff, 0xff},</div><div class='add'>+		.v_sync_line_aft_1 = {0xff, 0xff},</div><div class='add'>+		.v_sync_line_aft_pxl_2 = {0xff, 0xff},</div><div class='add'>+		.v_sync_line_aft_pxl_1 = {0xff, 0xff},</div><div class='add'>+		.v_blank_f2 = {0xff, 0xff},</div><div class='add'>+		.v_blank_f3 = {0xff, 0xff},</div><div class='add'>+		.v_blank_f4 = {0xff, 0xff},</div><div class='add'>+		.v_blank_f5 = {0xff, 0xff},</div><div class='add'>+		.v_sync_line_aft_3 = {0xff, 0xff},</div><div class='add'>+		.v_sync_line_aft_4 = {0xff, 0xff},</div><div class='add'>+		.v_sync_line_aft_5 = {0xff, 0xff},</div><div class='add'>+		.v_sync_line_aft_6 = {0xff, 0xff},</div><div class='add'>+		.v_sync_line_aft_pxl_3 = {0xff, 0xff},</div><div class='add'>+		.v_sync_line_aft_pxl_4 = {0xff, 0xff},</div><div class='add'>+		.v_sync_line_aft_pxl_5 = {0xff, 0xff},</div><div class='add'>+		.v_sync_line_aft_pxl_6 = {0xff, 0xff},</div><div class='add'>+		.vact_space_1 = {0xff, 0xff},</div><div class='add'>+		.vact_space_2 = {0xff, 0xff},</div><div class='add'>+		.vact_space_3 = {0xff, 0xff},</div><div class='add'>+		.vact_space_4 = {0xff, 0xff},</div><div class='add'>+		.vact_space_5 = {0xff, 0xff},</div><div class='add'>+		.vact_space_6 = {0xff, 0xff},</div><div class='add'>+		/* other don't care */</div><div class='add'>+	},</div><div class='add'>+	.tg = {</div><div class='add'>+		0x00, /* cmd */</div><div class='add'>+		0x98, 0x08, /* h_fsz */</div><div class='add'>+		0x18, 0x01, 0x80, 0x07, /* hact */</div><div class='add'>+		0x65, 0x04, /* v_fsz */</div><div class='add'>+		0x01, 0x00, 0x33, 0x02, /* vsync */</div><div class='add'>+		0x2d, 0x00, 0x38, 0x04, /* vact */</div><div class='add'>+		0x33, 0x02, /* field_chg */</div><div class='add'>+		0x48, 0x02, /* vact_st2 */</div><div class='add'>+		0x00, 0x00, /* vact_st3 */</div><div class='add'>+		0x00, 0x00, /* vact_st4 */</div><div class='add'>+		0x01, 0x00, 0x01, 0x00, /* vsync top/bot */</div><div class='add'>+		0x01, 0x00, 0x33, 0x02, /* field top/bot */</div><div class='add'>+		0x00, /* 3d FP */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct hdmi_preset_conf hdmi_conf_1080p50 = {</div><div class='ctx'> 	.core = {</div><div class='ctx'> 		.h_blank = {0xd0, 0x02},</div><div class='hunk'>@@ -864,6 +929,7 @@ static const struct hdmi_conf hdmi_confs[] = {</div><div class='ctx'> 	{ 1280, 720, 60, false, hdmiphy_conf74_25, &amp;hdmi_conf_720p60 },</div><div class='ctx'> 	{ 1920, 1080, 50, true, hdmiphy_conf74_25, &amp;hdmi_conf_1080i50 },</div><div class='ctx'> 	{ 1920, 1080, 60, true, hdmiphy_conf74_25, &amp;hdmi_conf_1080i60 },</div><div class='add'>+	{ 1920, 1080, 30, false, hdmiphy_conf74_176, &amp;hdmi_conf_1080p30 },</div><div class='ctx'> 	{ 1920, 1080, 50, false, hdmiphy_conf148_5, &amp;hdmi_conf_1080p50 },</div><div class='ctx'> 	{ 1920, 1080, 60, false, hdmiphy_conf148_5, &amp;hdmi_conf_1080p60 },</div><div class='ctx'> };</div><div class='hunk'>@@ -1194,12 +1260,8 @@ static int hdmi_conf_index(struct hdmi_context *hdata,</div><div class='ctx'> static bool hdmi_is_connected(void *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct hdmi_context *hdata = ctx;</div><div class='del'>-	u32 val = hdmi_reg_read(hdata, HDMI_HPD_STATUS);</div><div class='del'>-</div><div class='del'>-	if (val)</div><div class='del'>-		return true;</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	return hdata-&gt;hpd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hdmi_get_edid(void *ctx, struct drm_connector *connector,</div><div class='hunk'>@@ -1215,10 +1277,12 @@ static int hdmi_get_edid(void *ctx, struct drm_connector *connector,</div><div class='ctx'> </div><div class='ctx'> 	raw_edid = drm_get_edid(connector, hdata-&gt;ddc_port-&gt;adapter);</div><div class='ctx'> 	if (raw_edid) {</div><div class='add'>+		hdata-&gt;dvi_mode = !drm_detect_hdmi_monitor(raw_edid);</div><div class='ctx'> 		memcpy(edid, raw_edid, min((1 + raw_edid-&gt;extensions)</div><div class='ctx'> 					* EDID_LENGTH, len));</div><div class='del'>-		DRM_DEBUG_KMS("width[%d] x height[%d]\n",</div><div class='del'>-				raw_edid-&gt;width_cm, raw_edid-&gt;height_cm);</div><div class='add'>+		DRM_DEBUG_KMS("%s : width[%d] x height[%d]\n",</div><div class='add'>+			(hdata-&gt;dvi_mode ? "dvi monitor" : "hdmi monitor"),</div><div class='add'>+			raw_edid-&gt;width_cm, raw_edid-&gt;height_cm);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1289,28 +1353,6 @@ static int hdmi_check_timing(void *ctx, void *timing)</div><div class='ctx'> 		return hdmi_v14_check_timing(check_timing);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hdmi_display_power_on(void *ctx, int mode)</div><div class='del'>-{</div><div class='del'>-	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='del'>-</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case DRM_MODE_DPMS_ON:</div><div class='del'>-		DRM_DEBUG_KMS("hdmi [on]\n");</div><div class='del'>-		break;</div><div class='del'>-	case DRM_MODE_DPMS_STANDBY:</div><div class='del'>-		break;</div><div class='del'>-	case DRM_MODE_DPMS_SUSPEND:</div><div class='del'>-		break;</div><div class='del'>-	case DRM_MODE_DPMS_OFF:</div><div class='del'>-		DRM_DEBUG_KMS("hdmi [off]\n");</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void hdmi_set_acr(u32 freq, u8 *acr)</div><div class='ctx'> {</div><div class='ctx'> 	u32 n, cts;</div><div class='hunk'>@@ -1463,10 +1505,7 @@ static void hdmi_audio_init(struct hdmi_context *hdata)</div><div class='ctx'> </div><div class='ctx'> static void hdmi_audio_control(struct hdmi_context *hdata, bool onoff)</div><div class='ctx'> {</div><div class='del'>-	u32 mod;</div><div class='del'>-</div><div class='del'>-	mod = hdmi_reg_read(hdata, HDMI_MODE_SEL);</div><div class='del'>-	if (mod &amp; HDMI_DVI_MODE_EN)</div><div class='add'>+	if (hdata-&gt;dvi_mode)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	hdmi_reg_writeb(hdata, HDMI_AUI_CON, onoff ? 2 : 0);</div><div class='hunk'>@@ -1478,9 +1517,6 @@ static void hdmi_conf_reset(struct hdmi_context *hdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='del'>-	/* disable hpd handle for drm */</div><div class='del'>-	hdata-&gt;hpd_handle = false;</div><div class='del'>-</div><div class='ctx'> 	if (hdata-&gt;is_v13)</div><div class='ctx'> 		reg = HDMI_V13_CORE_RSTOUT;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1491,16 +1527,10 @@ static void hdmi_conf_reset(struct hdmi_context *hdata)</div><div class='ctx'> 	mdelay(10);</div><div class='ctx'> 	hdmi_reg_writemask(hdata, reg, ~0, HDMI_CORE_SW_RSTOUT);</div><div class='ctx'> 	mdelay(10);</div><div class='del'>-</div><div class='del'>-	/* enable hpd handle for drm */</div><div class='del'>-	hdata-&gt;hpd_handle = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hdmi_conf_init(struct hdmi_context *hdata)</div><div class='ctx'> {</div><div class='del'>-	/* disable hpd handle for drm */</div><div class='del'>-	hdata-&gt;hpd_handle = false;</div><div class='del'>-</div><div class='ctx'> 	/* enable HPD interrupts */</div><div class='ctx'> 	hdmi_reg_writemask(hdata, HDMI_INTC_CON, 0, HDMI_INTC_EN_GLOBAL |</div><div class='ctx'> 		HDMI_INTC_EN_HPD_PLUG | HDMI_INTC_EN_HPD_UNPLUG);</div><div class='hunk'>@@ -1514,6 +1544,14 @@ static void hdmi_conf_init(struct hdmi_context *hdata)</div><div class='ctx'> 	/* disable bluescreen */</div><div class='ctx'> 	hdmi_reg_writemask(hdata, HDMI_CON_0, 0, HDMI_BLUE_SCR_EN);</div><div class='ctx'> </div><div class='add'>+	if (hdata-&gt;dvi_mode) {</div><div class='add'>+		/* choose DVI mode */</div><div class='add'>+		hdmi_reg_writemask(hdata, HDMI_MODE_SEL,</div><div class='add'>+				HDMI_MODE_DVI_EN, HDMI_MODE_MASK);</div><div class='add'>+		hdmi_reg_writeb(hdata, HDMI_CON_2,</div><div class='add'>+				HDMI_VID_PREAMBLE_DIS | HDMI_GUARD_BAND_DIS);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (hdata-&gt;is_v13) {</div><div class='ctx'> 		/* choose bluescreen (fecal) color */</div><div class='ctx'> 		hdmi_reg_writeb(hdata, HDMI_V13_BLUE_SCREEN_0, 0x12);</div><div class='hunk'>@@ -1535,9 +1573,6 @@ static void hdmi_conf_init(struct hdmi_context *hdata)</div><div class='ctx'> 		hdmi_reg_writeb(hdata, HDMI_AVI_BYTE(1), 2 &lt;&lt; 5);</div><div class='ctx'> 		hdmi_reg_writemask(hdata, HDMI_CON_1, 2, 3 &lt;&lt; 5);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	/* enable hpd handle for drm */</div><div class='del'>-	hdata-&gt;hpd_handle = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hdmi_v13_timing_apply(struct hdmi_context *hdata)</div><div class='hunk'>@@ -1890,8 +1925,11 @@ static void hdmi_conf_apply(struct hdmi_context *hdata)</div><div class='ctx'> 	hdmiphy_conf_reset(hdata);</div><div class='ctx'> 	hdmiphy_conf_apply(hdata);</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;hdata-&gt;hdmi_mutex);</div><div class='ctx'> 	hdmi_conf_reset(hdata);</div><div class='ctx'> 	hdmi_conf_init(hdata);</div><div class='add'>+	mutex_unlock(&amp;hdata-&gt;hdmi_mutex);</div><div class='add'>+</div><div class='ctx'> 	hdmi_audio_init(hdata);</div><div class='ctx'> </div><div class='ctx'> 	/* setting core registers */</div><div class='hunk'>@@ -1971,20 +2009,86 @@ static void hdmi_commit(void *ctx)</div><div class='ctx'> 	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='ctx'> </div><div class='ctx'> 	hdmi_conf_apply(hdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hdmi_poweron(struct hdmi_context *hdata)</div><div class='add'>+{</div><div class='add'>+	struct hdmi_resources *res = &amp;hdata-&gt;res;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hdata-&gt;hdmi_mutex);</div><div class='add'>+	if (hdata-&gt;powered) {</div><div class='add'>+		mutex_unlock(&amp;hdata-&gt;hdmi_mutex);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hdata-&gt;powered = true;</div><div class='add'>+</div><div class='add'>+	if (hdata-&gt;cfg_hpd)</div><div class='add'>+		hdata-&gt;cfg_hpd(true);</div><div class='add'>+	mutex_unlock(&amp;hdata-&gt;hdmi_mutex);</div><div class='add'>+</div><div class='add'>+	pm_runtime_get_sync(hdata-&gt;dev);</div><div class='add'>+</div><div class='add'>+	regulator_bulk_enable(res-&gt;regul_count, res-&gt;regul_bulk);</div><div class='add'>+	clk_enable(res-&gt;hdmiphy);</div><div class='add'>+	clk_enable(res-&gt;hdmi);</div><div class='add'>+	clk_enable(res-&gt;sclk_hdmi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hdmi_poweroff(struct hdmi_context *hdata)</div><div class='add'>+{</div><div class='add'>+	struct hdmi_resources *res = &amp;hdata-&gt;res;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hdata-&gt;hdmi_mutex);</div><div class='add'>+	if (!hdata-&gt;powered)</div><div class='add'>+		goto out;</div><div class='add'>+	mutex_unlock(&amp;hdata-&gt;hdmi_mutex);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The TV power domain needs any condition of hdmiphy to turn off and</div><div class='add'>+	 * its reset state seems to meet the condition.</div><div class='add'>+	 */</div><div class='add'>+	hdmiphy_conf_reset(hdata);</div><div class='add'>+</div><div class='add'>+	clk_disable(res-&gt;sclk_hdmi);</div><div class='add'>+	clk_disable(res-&gt;hdmi);</div><div class='add'>+	clk_disable(res-&gt;hdmiphy);</div><div class='add'>+	regulator_bulk_disable(res-&gt;regul_count, res-&gt;regul_bulk);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put_sync(hdata-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	hdata-&gt;enabled = true;</div><div class='add'>+	mutex_lock(&amp;hdata-&gt;hdmi_mutex);</div><div class='add'>+	if (hdata-&gt;cfg_hpd)</div><div class='add'>+		hdata-&gt;cfg_hpd(false);</div><div class='add'>+</div><div class='add'>+	hdata-&gt;powered = false;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;hdata-&gt;hdmi_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hdmi_disable(void *ctx)</div><div class='add'>+static void hdmi_dpms(void *ctx, int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct hdmi_context *hdata = ctx;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='ctx'> </div><div class='del'>-	if (hdata-&gt;enabled) {</div><div class='del'>-		hdmi_audio_control(hdata, false);</div><div class='del'>-		hdmiphy_conf_reset(hdata);</div><div class='del'>-		hdmi_conf_reset(hdata);</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case DRM_MODE_DPMS_ON:</div><div class='add'>+		hdmi_poweron(hdata);</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_DPMS_STANDBY:</div><div class='add'>+	case DRM_MODE_DPMS_SUSPEND:</div><div class='add'>+	case DRM_MODE_DPMS_OFF:</div><div class='add'>+		hdmi_poweroff(hdata);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		DRM_DEBUG_KMS("unknown dpms mode: %d\n", mode);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1993,30 +2097,35 @@ static struct exynos_hdmi_ops hdmi_ops = {</div><div class='ctx'> 	.is_connected	= hdmi_is_connected,</div><div class='ctx'> 	.get_edid	= hdmi_get_edid,</div><div class='ctx'> 	.check_timing	= hdmi_check_timing,</div><div class='del'>-	.power_on	= hdmi_display_power_on,</div><div class='ctx'> </div><div class='ctx'> 	/* manager */</div><div class='ctx'> 	.mode_fixup	= hdmi_mode_fixup,</div><div class='ctx'> 	.mode_set	= hdmi_mode_set,</div><div class='ctx'> 	.get_max_resol	= hdmi_get_max_resol,</div><div class='ctx'> 	.commit		= hdmi_commit,</div><div class='del'>-	.disable	= hdmi_disable,</div><div class='add'>+	.dpms		= hdmi_dpms,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Handle hotplug events outside the interrupt handler proper.</div><div class='del'>- */</div><div class='del'>-static void hdmi_hotplug_func(struct work_struct *work)</div><div class='add'>+static irqreturn_t hdmi_external_irq_thread(int irq, void *arg)</div><div class='ctx'> {</div><div class='del'>-	struct hdmi_context *hdata =</div><div class='del'>-		container_of(work, struct hdmi_context, hotplug_work);</div><div class='del'>-	struct exynos_drm_hdmi_context *ctx =</div><div class='del'>-		(struct exynos_drm_hdmi_context *)hdata-&gt;parent_ctx;</div><div class='add'>+	struct exynos_drm_hdmi_context *ctx = arg;</div><div class='add'>+	struct hdmi_context *hdata = ctx-&gt;ctx;</div><div class='add'>+</div><div class='add'>+	if (!hdata-&gt;get_hpd)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hdata-&gt;hdmi_mutex);</div><div class='add'>+	hdata-&gt;hpd = hdata-&gt;get_hpd();</div><div class='add'>+	mutex_unlock(&amp;hdata-&gt;hdmi_mutex);</div><div class='ctx'> </div><div class='del'>-	drm_helper_hpd_irq_event(ctx-&gt;drm_dev);</div><div class='add'>+	if (ctx-&gt;drm_dev)</div><div class='add'>+		drm_helper_hpd_irq_event(ctx-&gt;drm_dev);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t hdmi_irq_handler(int irq, void *arg)</div><div class='add'>+static irqreturn_t hdmi_internal_irq_thread(int irq, void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct exynos_drm_hdmi_context *ctx = arg;</div><div class='ctx'> 	struct hdmi_context *hdata = ctx-&gt;ctx;</div><div class='hunk'>@@ -2025,19 +2134,28 @@ static irqreturn_t hdmi_irq_handler(int irq, void *arg)</div><div class='ctx'> 	intc_flag = hdmi_reg_read(hdata, HDMI_INTC_FLAG);</div><div class='ctx'> 	/* clearing flags for HPD plug/unplug */</div><div class='ctx'> 	if (intc_flag &amp; HDMI_INTC_FLAG_HPD_UNPLUG) {</div><div class='del'>-		DRM_DEBUG_KMS("unplugged, handling:%d\n", hdata-&gt;hpd_handle);</div><div class='add'>+		DRM_DEBUG_KMS("unplugged\n");</div><div class='ctx'> 		hdmi_reg_writemask(hdata, HDMI_INTC_FLAG, ~0,</div><div class='ctx'> 			HDMI_INTC_FLAG_HPD_UNPLUG);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (intc_flag &amp; HDMI_INTC_FLAG_HPD_PLUG) {</div><div class='del'>-		DRM_DEBUG_KMS("plugged, handling:%d\n", hdata-&gt;hpd_handle);</div><div class='add'>+		DRM_DEBUG_KMS("plugged\n");</div><div class='ctx'> 		hdmi_reg_writemask(hdata, HDMI_INTC_FLAG, ~0,</div><div class='ctx'> 			HDMI_INTC_FLAG_HPD_PLUG);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;drm_dev &amp;&amp; hdata-&gt;hpd_handle)</div><div class='del'>-		queue_work(hdata-&gt;wq, &amp;hdata-&gt;hotplug_work);</div><div class='add'>+	mutex_lock(&amp;hdata-&gt;hdmi_mutex);</div><div class='add'>+	hdata-&gt;hpd = hdmi_reg_read(hdata, HDMI_HPD_STATUS);</div><div class='add'>+	if (hdata-&gt;powered &amp;&amp; hdata-&gt;hpd) {</div><div class='add'>+		mutex_unlock(&amp;hdata-&gt;hdmi_mutex);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;hdata-&gt;hdmi_mutex);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;drm_dev)</div><div class='add'>+		drm_helper_hpd_irq_event(ctx-&gt;drm_dev);</div><div class='ctx'> </div><div class='add'>+out:</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2131,68 +2249,6 @@ static int hdmi_resources_cleanup(struct hdmi_context *hdata)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hdmi_resource_poweron(struct hdmi_context *hdata)</div><div class='del'>-{</div><div class='del'>-	struct hdmi_resources *res = &amp;hdata-&gt;res;</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='del'>-</div><div class='del'>-	/* turn HDMI power on */</div><div class='del'>-	regulator_bulk_enable(res-&gt;regul_count, res-&gt;regul_bulk);</div><div class='del'>-	/* power-on hdmi physical interface */</div><div class='del'>-	clk_enable(res-&gt;hdmiphy);</div><div class='del'>-	/* turn clocks on */</div><div class='del'>-	clk_enable(res-&gt;hdmi);</div><div class='del'>-	clk_enable(res-&gt;sclk_hdmi);</div><div class='del'>-</div><div class='del'>-	hdmiphy_conf_reset(hdata);</div><div class='del'>-	hdmi_conf_reset(hdata);</div><div class='del'>-	hdmi_conf_init(hdata);</div><div class='del'>-	hdmi_audio_init(hdata);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hdmi_resource_poweroff(struct hdmi_context *hdata)</div><div class='del'>-{</div><div class='del'>-	struct hdmi_resources *res = &amp;hdata-&gt;res;</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='del'>-</div><div class='del'>-	/* turn clocks off */</div><div class='del'>-	clk_disable(res-&gt;sclk_hdmi);</div><div class='del'>-	clk_disable(res-&gt;hdmi);</div><div class='del'>-	/* power-off hdmiphy */</div><div class='del'>-	clk_disable(res-&gt;hdmiphy);</div><div class='del'>-	/* turn HDMI power off */</div><div class='del'>-	regulator_bulk_disable(res-&gt;regul_count, res-&gt;regul_bulk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hdmi_runtime_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("%s\n", __func__);</div><div class='del'>-</div><div class='del'>-	hdmi_resource_poweroff(ctx-&gt;ctx);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hdmi_runtime_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("%s\n", __func__);</div><div class='del'>-</div><div class='del'>-	hdmi_resource_poweron(ctx-&gt;ctx);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct dev_pm_ops hdmi_pm_ops = {</div><div class='del'>-	.runtime_suspend = hdmi_runtime_suspend,</div><div class='del'>-	.runtime_resume	 = hdmi_runtime_resume,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct i2c_client *hdmi_ddc, *hdmi_hdmiphy;</div><div class='ctx'> </div><div class='ctx'> void hdmi_attach_ddc_client(struct i2c_client *ddc)</div><div class='hunk'>@@ -2237,15 +2293,16 @@ static int __devinit hdmi_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mutex_init(&amp;hdata-&gt;hdmi_mutex);</div><div class='add'>+</div><div class='ctx'> 	drm_hdmi_ctx-&gt;ctx = (void *)hdata;</div><div class='ctx'> 	hdata-&gt;parent_ctx = (void *)drm_hdmi_ctx;</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, drm_hdmi_ctx);</div><div class='ctx'> </div><div class='ctx'> 	hdata-&gt;is_v13 = pdata-&gt;is_v13;</div><div class='del'>-	hdata-&gt;default_win = pdata-&gt;default_win;</div><div class='del'>-	hdata-&gt;default_timing = &amp;pdata-&gt;timing;</div><div class='del'>-	hdata-&gt;default_bpp = pdata-&gt;bpp;</div><div class='add'>+	hdata-&gt;cfg_hpd = pdata-&gt;cfg_hpd;</div><div class='add'>+	hdata-&gt;get_hpd = pdata-&gt;get_hpd;</div><div class='ctx'> 	hdata-&gt;dev = dev;</div><div class='ctx'> </div><div class='ctx'> 	ret = hdmi_resources_init(hdata);</div><div class='hunk'>@@ -2294,41 +2351,49 @@ static int __devinit hdmi_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	hdata-&gt;hdmiphy_port = hdmi_hdmiphy;</div><div class='ctx'> </div><div class='del'>-	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='del'>-	if (res == NULL) {</div><div class='del'>-		DRM_ERROR("get interrupt resource failed.\n");</div><div class='del'>-		ret = -ENXIO;</div><div class='add'>+	hdata-&gt;external_irq = platform_get_irq_byname(pdev, "external_irq");</div><div class='add'>+	if (hdata-&gt;external_irq &lt; 0) {</div><div class='add'>+		DRM_ERROR("failed to get platform irq\n");</div><div class='add'>+		ret = hdata-&gt;external_irq;</div><div class='ctx'> 		goto err_hdmiphy;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* create workqueue and hotplug work */</div><div class='del'>-	hdata-&gt;wq = alloc_workqueue("exynos-drm-hdmi",</div><div class='del'>-			WQ_UNBOUND | WQ_NON_REENTRANT, 1);</div><div class='del'>-	if (hdata-&gt;wq == NULL) {</div><div class='del'>-		DRM_ERROR("Failed to create workqueue.\n");</div><div class='del'>-		ret = -ENOMEM;</div><div class='add'>+	hdata-&gt;internal_irq = platform_get_irq_byname(pdev, "internal_irq");</div><div class='add'>+	if (hdata-&gt;internal_irq &lt; 0) {</div><div class='add'>+		DRM_ERROR("failed to get platform internal irq\n");</div><div class='add'>+		ret = hdata-&gt;internal_irq;</div><div class='ctx'> 		goto err_hdmiphy;</div><div class='ctx'> 	}</div><div class='del'>-	INIT_WORK(&amp;hdata-&gt;hotplug_work, hdmi_hotplug_func);</div><div class='ctx'> </div><div class='del'>-	/* register hpd interrupt */</div><div class='del'>-	ret = request_irq(res-&gt;start, hdmi_irq_handler, 0, "drm_hdmi",</div><div class='del'>-				drm_hdmi_ctx);</div><div class='add'>+	ret = request_threaded_irq(hdata-&gt;external_irq, NULL,</div><div class='add'>+			hdmi_external_irq_thread, IRQF_TRIGGER_RISING |</div><div class='add'>+			IRQF_TRIGGER_FALLING | IRQF_ONESHOT,</div><div class='add'>+			"hdmi_external", drm_hdmi_ctx);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		DRM_ERROR("request interrupt failed.\n");</div><div class='del'>-		goto err_workqueue;</div><div class='add'>+		DRM_ERROR("failed to register hdmi internal interrupt\n");</div><div class='add'>+		goto err_hdmiphy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hdata-&gt;cfg_hpd)</div><div class='add'>+		hdata-&gt;cfg_hpd(false);</div><div class='add'>+</div><div class='add'>+	ret = request_threaded_irq(hdata-&gt;internal_irq, NULL,</div><div class='add'>+			hdmi_internal_irq_thread, IRQF_ONESHOT,</div><div class='add'>+			"hdmi_internal", drm_hdmi_ctx);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("failed to register hdmi internal interrupt\n");</div><div class='add'>+		goto err_free_irq;</div><div class='ctx'> 	}</div><div class='del'>-	hdata-&gt;irq = res-&gt;start;</div><div class='ctx'> </div><div class='ctx'> 	/* register specific callbacks to common hdmi. */</div><div class='ctx'> 	exynos_hdmi_ops_register(&amp;hdmi_ops);</div><div class='ctx'> </div><div class='del'>-	hdmi_resource_poweron(hdata);</div><div class='add'>+	pm_runtime_enable(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_workqueue:</div><div class='del'>-	destroy_workqueue(hdata-&gt;wq);</div><div class='add'>+err_free_irq:</div><div class='add'>+	free_irq(hdata-&gt;external_irq, drm_hdmi_ctx);</div><div class='ctx'> err_hdmiphy:</div><div class='ctx'> 	i2c_del_driver(&amp;hdmiphy_driver);</div><div class='ctx'> err_ddc:</div><div class='hunk'>@@ -2348,18 +2413,15 @@ err_data:</div><div class='ctx'> </div><div class='ctx'> static int __devexit hdmi_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	struct exynos_drm_hdmi_context *ctx = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct hdmi_context *hdata = ctx-&gt;ctx;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='ctx'> </div><div class='del'>-	hdmi_resource_poweroff(hdata);</div><div class='add'>+	pm_runtime_disable(dev);</div><div class='ctx'> </div><div class='del'>-	disable_irq(hdata-&gt;irq);</div><div class='del'>-	free_irq(hdata-&gt;irq, hdata);</div><div class='del'>-</div><div class='del'>-	cancel_work_sync(&amp;hdata-&gt;hotplug_work);</div><div class='del'>-	destroy_workqueue(hdata-&gt;wq);</div><div class='add'>+	free_irq(hdata-&gt;internal_irq, hdata);</div><div class='ctx'> </div><div class='ctx'> 	hdmi_resources_cleanup(hdata);</div><div class='ctx'> </div><div class='hunk'>@@ -2378,12 +2440,43 @@ static int __devexit hdmi_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int hdmi_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev);</div><div class='add'>+	struct hdmi_context *hdata = ctx-&gt;ctx;</div><div class='add'>+</div><div class='add'>+	disable_irq(hdata-&gt;internal_irq);</div><div class='add'>+	disable_irq(hdata-&gt;external_irq);</div><div class='add'>+</div><div class='add'>+	hdata-&gt;hpd = false;</div><div class='add'>+	if (ctx-&gt;drm_dev)</div><div class='add'>+		drm_helper_hpd_irq_event(ctx-&gt;drm_dev);</div><div class='add'>+</div><div class='add'>+	hdmi_poweroff(hdata);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hdmi_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev);</div><div class='add'>+	struct hdmi_context *hdata = ctx-&gt;ctx;</div><div class='add'>+</div><div class='add'>+	enable_irq(hdata-&gt;external_irq);</div><div class='add'>+	enable_irq(hdata-&gt;internal_irq);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(hdmi_pm_ops, hdmi_suspend, hdmi_resume);</div><div class='add'>+</div><div class='ctx'> struct platform_driver hdmi_driver = {</div><div class='ctx'> 	.probe		= hdmi_probe,</div><div class='ctx'> 	.remove		= __devexit_p(hdmi_remove),</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "exynos4-hdmi",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='del'>-		.pm = &amp;hdmi_pm_ops,</div><div class='add'>+		.pm	= &amp;hdmi_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c<br/>index e15438c01129..e2147a2ddcec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_mixer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/exynos_mixer.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/exynos_mixer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/exynos_mixer.c</a></div><div class='hunk'>@@ -37,9 +37,6 @@</div><div class='ctx'> #include "exynos_drm_drv.h"</div><div class='ctx'> #include "exynos_drm_hdmi.h"</div><div class='ctx'> </div><div class='del'>-#define MIXER_WIN_NR		3</div><div class='del'>-#define MIXER_DEFAULT_WIN	0</div><div class='del'>-</div><div class='ctx'> #define get_mixer_context(dev)	platform_get_drvdata(to_platform_device(dev))</div><div class='ctx'> </div><div class='ctx'> struct hdmi_win_data {</div><div class='hunk'>@@ -57,13 +54,14 @@ struct hdmi_win_data {</div><div class='ctx'> 	unsigned int		fb_y;</div><div class='ctx'> 	unsigned int		fb_width;</div><div class='ctx'> 	unsigned int		fb_height;</div><div class='add'>+	unsigned int		src_width;</div><div class='add'>+	unsigned int		src_height;</div><div class='ctx'> 	unsigned int		mode_width;</div><div class='ctx'> 	unsigned int		mode_height;</div><div class='ctx'> 	unsigned int		scan_flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mixer_resources {</div><div class='del'>-	struct device		*dev;</div><div class='ctx'> 	int			irq;</div><div class='ctx'> 	void __iomem		*mixer_regs;</div><div class='ctx'> 	void __iomem		*vp_regs;</div><div class='hunk'>@@ -76,10 +74,13 @@ struct mixer_resources {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mixer_context {</div><div class='del'>-	unsigned int		irq;</div><div class='add'>+	struct device		*dev;</div><div class='ctx'> 	int			pipe;</div><div class='ctx'> 	bool			interlace;</div><div class='add'>+	bool			powered;</div><div class='add'>+	u32			int_en;</div><div class='ctx'> </div><div class='add'>+	struct mutex		mixer_mutex;</div><div class='ctx'> 	struct mixer_resources	mixer_res;</div><div class='ctx'> 	struct hdmi_win_data	win_data[MIXER_WIN_NR];</div><div class='ctx'> };</div><div class='hunk'>@@ -352,10 +353,7 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)</div><div class='ctx'> 	struct mixer_resources *res = &amp;ctx-&gt;mixer_res;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct hdmi_win_data *win_data;</div><div class='del'>-	unsigned int full_width, full_height, width, height;</div><div class='ctx'> 	unsigned int x_ratio, y_ratio;</div><div class='del'>-	unsigned int src_x_offset, src_y_offset, dst_x_offset, dst_y_offset;</div><div class='del'>-	unsigned int mode_width, mode_height;</div><div class='ctx'> 	unsigned int buf_num;</div><div class='ctx'> 	dma_addr_t luma_addr[2], chroma_addr[2];</div><div class='ctx'> 	bool tiled_mode = false;</div><div class='hunk'>@@ -367,7 +365,7 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)</div><div class='ctx'> 	switch (win_data-&gt;pixel_format) {</div><div class='ctx'> 	case DRM_FORMAT_NV12MT:</div><div class='ctx'> 		tiled_mode = true;</div><div class='del'>-	case DRM_FORMAT_NV12M:</div><div class='add'>+	case DRM_FORMAT_NV12:</div><div class='ctx'> 		crcb_mode = false;</div><div class='ctx'> 		buf_num = 2;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -382,21 +380,9 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	full_width = win_data-&gt;fb_width;</div><div class='del'>-	full_height = win_data-&gt;fb_height;</div><div class='del'>-	width = win_data-&gt;crtc_width;</div><div class='del'>-	height = win_data-&gt;crtc_height;</div><div class='del'>-	mode_width = win_data-&gt;mode_width;</div><div class='del'>-	mode_height = win_data-&gt;mode_height;</div><div class='del'>-</div><div class='ctx'> 	/* scaling feature: (src &lt;&lt; 16) / dst */</div><div class='del'>-	x_ratio = (width &lt;&lt; 16) / width;</div><div class='del'>-	y_ratio = (height &lt;&lt; 16) / height;</div><div class='del'>-</div><div class='del'>-	src_x_offset = win_data-&gt;fb_x;</div><div class='del'>-	src_y_offset = win_data-&gt;fb_y;</div><div class='del'>-	dst_x_offset = win_data-&gt;crtc_x;</div><div class='del'>-	dst_y_offset = win_data-&gt;crtc_y;</div><div class='add'>+	x_ratio = (win_data-&gt;src_width &lt;&lt; 16) / win_data-&gt;crtc_width;</div><div class='add'>+	y_ratio = (win_data-&gt;src_height &lt;&lt; 16) / win_data-&gt;crtc_height;</div><div class='ctx'> </div><div class='ctx'> 	if (buf_num == 2) {</div><div class='ctx'> 		luma_addr[0] = win_data-&gt;dma_addr;</div><div class='hunk'>@@ -404,7 +390,7 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		luma_addr[0] = win_data-&gt;dma_addr;</div><div class='ctx'> 		chroma_addr[0] = win_data-&gt;dma_addr</div><div class='del'>-			+ (full_width * full_height);</div><div class='add'>+			+ (win_data-&gt;fb_width * win_data-&gt;fb_height);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (win_data-&gt;scan_flags &amp; DRM_MODE_FLAG_INTERLACE) {</div><div class='hunk'>@@ -413,8 +399,8 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)</div><div class='ctx'> 			luma_addr[1] = luma_addr[0] + 0x40;</div><div class='ctx'> 			chroma_addr[1] = chroma_addr[0] + 0x40;</div><div class='ctx'> 		} else {</div><div class='del'>-			luma_addr[1] = luma_addr[0] + full_width;</div><div class='del'>-			chroma_addr[1] = chroma_addr[0] + full_width;</div><div class='add'>+			luma_addr[1] = luma_addr[0] + win_data-&gt;fb_width;</div><div class='add'>+			chroma_addr[1] = chroma_addr[0] + win_data-&gt;fb_width;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ctx-&gt;interlace = false;</div><div class='hunk'>@@ -435,26 +421,26 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)</div><div class='ctx'> 	vp_reg_writemask(res, VP_MODE, val, VP_MODE_FMT_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* setting size of input image */</div><div class='del'>-	vp_reg_write(res, VP_IMG_SIZE_Y, VP_IMG_HSIZE(full_width) |</div><div class='del'>-		VP_IMG_VSIZE(full_height));</div><div class='add'>+	vp_reg_write(res, VP_IMG_SIZE_Y, VP_IMG_HSIZE(win_data-&gt;fb_width) |</div><div class='add'>+		VP_IMG_VSIZE(win_data-&gt;fb_height));</div><div class='ctx'> 	/* chroma height has to reduced by 2 to avoid chroma distorions */</div><div class='del'>-	vp_reg_write(res, VP_IMG_SIZE_C, VP_IMG_HSIZE(full_width) |</div><div class='del'>-		VP_IMG_VSIZE(full_height / 2));</div><div class='add'>+	vp_reg_write(res, VP_IMG_SIZE_C, VP_IMG_HSIZE(win_data-&gt;fb_width) |</div><div class='add'>+		VP_IMG_VSIZE(win_data-&gt;fb_height / 2));</div><div class='ctx'> </div><div class='del'>-	vp_reg_write(res, VP_SRC_WIDTH, width);</div><div class='del'>-	vp_reg_write(res, VP_SRC_HEIGHT, height);</div><div class='add'>+	vp_reg_write(res, VP_SRC_WIDTH, win_data-&gt;src_width);</div><div class='add'>+	vp_reg_write(res, VP_SRC_HEIGHT, win_data-&gt;src_height);</div><div class='ctx'> 	vp_reg_write(res, VP_SRC_H_POSITION,</div><div class='del'>-			VP_SRC_H_POSITION_VAL(src_x_offset));</div><div class='del'>-	vp_reg_write(res, VP_SRC_V_POSITION, src_y_offset);</div><div class='add'>+			VP_SRC_H_POSITION_VAL(win_data-&gt;fb_x));</div><div class='add'>+	vp_reg_write(res, VP_SRC_V_POSITION, win_data-&gt;fb_y);</div><div class='ctx'> </div><div class='del'>-	vp_reg_write(res, VP_DST_WIDTH, width);</div><div class='del'>-	vp_reg_write(res, VP_DST_H_POSITION, dst_x_offset);</div><div class='add'>+	vp_reg_write(res, VP_DST_WIDTH, win_data-&gt;crtc_width);</div><div class='add'>+	vp_reg_write(res, VP_DST_H_POSITION, win_data-&gt;crtc_x);</div><div class='ctx'> 	if (ctx-&gt;interlace) {</div><div class='del'>-		vp_reg_write(res, VP_DST_HEIGHT, height / 2);</div><div class='del'>-		vp_reg_write(res, VP_DST_V_POSITION, dst_y_offset / 2);</div><div class='add'>+		vp_reg_write(res, VP_DST_HEIGHT, win_data-&gt;crtc_height / 2);</div><div class='add'>+		vp_reg_write(res, VP_DST_V_POSITION, win_data-&gt;crtc_y / 2);</div><div class='ctx'> 	} else {</div><div class='del'>-		vp_reg_write(res, VP_DST_HEIGHT, height);</div><div class='del'>-		vp_reg_write(res, VP_DST_V_POSITION, dst_y_offset);</div><div class='add'>+		vp_reg_write(res, VP_DST_HEIGHT, win_data-&gt;crtc_height);</div><div class='add'>+		vp_reg_write(res, VP_DST_V_POSITION, win_data-&gt;crtc_y);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	vp_reg_write(res, VP_H_RATIO, x_ratio);</div><div class='hunk'>@@ -468,8 +454,8 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)</div><div class='ctx'> 	vp_reg_write(res, VP_TOP_C_PTR, chroma_addr[0]);</div><div class='ctx'> 	vp_reg_write(res, VP_BOT_C_PTR, chroma_addr[1]);</div><div class='ctx'> </div><div class='del'>-	mixer_cfg_scan(ctx, mode_height);</div><div class='del'>-	mixer_cfg_rgb_fmt(ctx, mode_height);</div><div class='add'>+	mixer_cfg_scan(ctx, win_data-&gt;mode_height);</div><div class='add'>+	mixer_cfg_rgb_fmt(ctx, win_data-&gt;mode_height);</div><div class='ctx'> 	mixer_cfg_layer(ctx, win, true);</div><div class='ctx'> 	mixer_run(ctx);</div><div class='ctx'> </div><div class='hunk'>@@ -484,10 +470,8 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win)</div><div class='ctx'> 	struct mixer_resources *res = &amp;ctx-&gt;mixer_res;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct hdmi_win_data *win_data;</div><div class='del'>-	unsigned int full_width, width, height;</div><div class='ctx'> 	unsigned int x_ratio, y_ratio;</div><div class='ctx'> 	unsigned int src_x_offset, src_y_offset, dst_x_offset, dst_y_offset;</div><div class='del'>-	unsigned int mode_width, mode_height;</div><div class='ctx'> 	dma_addr_t dma_addr;</div><div class='ctx'> 	unsigned int fmt;</div><div class='ctx'> 	u32 val;</div><div class='hunk'>@@ -510,26 +494,17 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win)</div><div class='ctx'> 		fmt = ARGB8888;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dma_addr = win_data-&gt;dma_addr;</div><div class='del'>-	full_width = win_data-&gt;fb_width;</div><div class='del'>-	width = win_data-&gt;crtc_width;</div><div class='del'>-	height = win_data-&gt;crtc_height;</div><div class='del'>-	mode_width = win_data-&gt;mode_width;</div><div class='del'>-	mode_height = win_data-&gt;mode_height;</div><div class='del'>-</div><div class='ctx'> 	/* 2x scaling feature */</div><div class='ctx'> 	x_ratio = 0;</div><div class='ctx'> 	y_ratio = 0;</div><div class='ctx'> </div><div class='del'>-	src_x_offset = win_data-&gt;fb_x;</div><div class='del'>-	src_y_offset = win_data-&gt;fb_y;</div><div class='ctx'> 	dst_x_offset = win_data-&gt;crtc_x;</div><div class='ctx'> 	dst_y_offset = win_data-&gt;crtc_y;</div><div class='ctx'> </div><div class='ctx'> 	/* converting dma address base and source offset */</div><div class='del'>-	dma_addr = dma_addr</div><div class='del'>-		+ (src_x_offset * win_data-&gt;bpp &gt;&gt; 3)</div><div class='del'>-		+ (src_y_offset * full_width * win_data-&gt;bpp &gt;&gt; 3);</div><div class='add'>+	dma_addr = win_data-&gt;dma_addr</div><div class='add'>+		+ (win_data-&gt;fb_x * win_data-&gt;bpp &gt;&gt; 3)</div><div class='add'>+		+ (win_data-&gt;fb_y * win_data-&gt;fb_width * win_data-&gt;bpp &gt;&gt; 3);</div><div class='ctx'> 	src_x_offset = 0;</div><div class='ctx'> 	src_y_offset = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -546,10 +521,10 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win)</div><div class='ctx'> 		MXR_GRP_CFG_FORMAT_VAL(fmt), MXR_GRP_CFG_FORMAT_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* setup geometry */</div><div class='del'>-	mixer_reg_write(res, MXR_GRAPHIC_SPAN(win), full_width);</div><div class='add'>+	mixer_reg_write(res, MXR_GRAPHIC_SPAN(win), win_data-&gt;fb_width);</div><div class='ctx'> </div><div class='del'>-	val  = MXR_GRP_WH_WIDTH(width);</div><div class='del'>-	val |= MXR_GRP_WH_HEIGHT(height);</div><div class='add'>+	val  = MXR_GRP_WH_WIDTH(win_data-&gt;crtc_width);</div><div class='add'>+	val |= MXR_GRP_WH_HEIGHT(win_data-&gt;crtc_height);</div><div class='ctx'> 	val |= MXR_GRP_WH_H_SCALE(x_ratio);</div><div class='ctx'> 	val |= MXR_GRP_WH_V_SCALE(y_ratio);</div><div class='ctx'> 	mixer_reg_write(res, MXR_GRAPHIC_WH(win), val);</div><div class='hunk'>@@ -567,8 +542,8 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win)</div><div class='ctx'> 	/* set buffer address to mixer */</div><div class='ctx'> 	mixer_reg_write(res, MXR_GRAPHIC_BASE(win), dma_addr);</div><div class='ctx'> </div><div class='del'>-	mixer_cfg_scan(ctx, mode_height);</div><div class='del'>-	mixer_cfg_rgb_fmt(ctx, mode_height);</div><div class='add'>+	mixer_cfg_scan(ctx, win_data-&gt;mode_height);</div><div class='add'>+	mixer_cfg_rgb_fmt(ctx, win_data-&gt;mode_height);</div><div class='ctx'> 	mixer_cfg_layer(ctx, win, true);</div><div class='ctx'> 	mixer_run(ctx);</div><div class='ctx'> </div><div class='hunk'>@@ -591,6 +566,118 @@ static void vp_win_reset(struct mixer_context *ctx)</div><div class='ctx'> 	WARN(tries == 0, "failed to reset Video Processor\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mixer_win_reset(struct mixer_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct mixer_resources *res = &amp;ctx-&gt;mixer_res;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 val; /* value stored to register */</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;res-&gt;reg_slock, flags);</div><div class='add'>+	mixer_vsync_set_update(ctx, false);</div><div class='add'>+</div><div class='add'>+	mixer_reg_writemask(res, MXR_CFG, MXR_CFG_DST_HDMI, MXR_CFG_DST_MASK);</div><div class='add'>+</div><div class='add'>+	/* set output in RGB888 mode */</div><div class='add'>+	mixer_reg_writemask(res, MXR_CFG, MXR_CFG_OUT_RGB888, MXR_CFG_OUT_MASK);</div><div class='add'>+</div><div class='add'>+	/* 16 beat burst in DMA */</div><div class='add'>+	mixer_reg_writemask(res, MXR_STATUS, MXR_STATUS_16_BURST,</div><div class='add'>+		MXR_STATUS_BURST_MASK);</div><div class='add'>+</div><div class='add'>+	/* setting default layer priority: layer1 &gt; layer0 &gt; video</div><div class='add'>+	 * because typical usage scenario would be</div><div class='add'>+	 * layer1 - OSD</div><div class='add'>+	 * layer0 - framebuffer</div><div class='add'>+	 * video - video overlay</div><div class='add'>+	 */</div><div class='add'>+	val = MXR_LAYER_CFG_GRP1_VAL(3);</div><div class='add'>+	val |= MXR_LAYER_CFG_GRP0_VAL(2);</div><div class='add'>+	val |= MXR_LAYER_CFG_VP_VAL(1);</div><div class='add'>+	mixer_reg_write(res, MXR_LAYER_CFG, val);</div><div class='add'>+</div><div class='add'>+	/* setting background color */</div><div class='add'>+	mixer_reg_write(res, MXR_BG_COLOR0, 0x008080);</div><div class='add'>+	mixer_reg_write(res, MXR_BG_COLOR1, 0x008080);</div><div class='add'>+	mixer_reg_write(res, MXR_BG_COLOR2, 0x008080);</div><div class='add'>+</div><div class='add'>+	/* setting graphical layers */</div><div class='add'>+	val  = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */</div><div class='add'>+	val |= MXR_GRP_CFG_WIN_BLEND_EN;</div><div class='add'>+	val |= MXR_GRP_CFG_BLEND_PRE_MUL;</div><div class='add'>+	val |= MXR_GRP_CFG_PIXEL_BLEND_EN;</div><div class='add'>+	val |= MXR_GRP_CFG_ALPHA_VAL(0xff); /* non-transparent alpha */</div><div class='add'>+</div><div class='add'>+	/* the same configuration for both layers */</div><div class='add'>+	mixer_reg_write(res, MXR_GRAPHIC_CFG(0), val);</div><div class='add'>+	mixer_reg_write(res, MXR_GRAPHIC_CFG(1), val);</div><div class='add'>+</div><div class='add'>+	/* setting video layers */</div><div class='add'>+	val = MXR_GRP_CFG_ALPHA_VAL(0);</div><div class='add'>+	mixer_reg_write(res, MXR_VIDEO_CFG, val);</div><div class='add'>+</div><div class='add'>+	/* configuration of Video Processor Registers */</div><div class='add'>+	vp_win_reset(ctx);</div><div class='add'>+	vp_default_filter(res);</div><div class='add'>+</div><div class='add'>+	/* disable all layers */</div><div class='add'>+	mixer_reg_writemask(res, MXR_CFG, 0, MXR_CFG_GRP0_ENABLE);</div><div class='add'>+	mixer_reg_writemask(res, MXR_CFG, 0, MXR_CFG_GRP1_ENABLE);</div><div class='add'>+	mixer_reg_writemask(res, MXR_CFG, 0, MXR_CFG_VP_ENABLE);</div><div class='add'>+</div><div class='add'>+	mixer_vsync_set_update(ctx, true);</div><div class='add'>+	spin_unlock_irqrestore(&amp;res-&gt;reg_slock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mixer_poweron(struct mixer_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct mixer_resources *res = &amp;ctx-&gt;mixer_res;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ctx-&gt;mixer_mutex);</div><div class='add'>+	if (ctx-&gt;powered) {</div><div class='add'>+		mutex_unlock(&amp;ctx-&gt;mixer_mutex);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	ctx-&gt;powered = true;</div><div class='add'>+	mutex_unlock(&amp;ctx-&gt;mixer_mutex);</div><div class='add'>+</div><div class='add'>+	pm_runtime_get_sync(ctx-&gt;dev);</div><div class='add'>+</div><div class='add'>+	clk_enable(res-&gt;mixer);</div><div class='add'>+	clk_enable(res-&gt;vp);</div><div class='add'>+	clk_enable(res-&gt;sclk_mixer);</div><div class='add'>+</div><div class='add'>+	mixer_reg_write(res, MXR_INT_EN, ctx-&gt;int_en);</div><div class='add'>+	mixer_win_reset(ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mixer_poweroff(struct mixer_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct mixer_resources *res = &amp;ctx-&gt;mixer_res;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ctx-&gt;mixer_mutex);</div><div class='add'>+	if (!ctx-&gt;powered)</div><div class='add'>+		goto out;</div><div class='add'>+	mutex_unlock(&amp;ctx-&gt;mixer_mutex);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;int_en = mixer_reg_read(res, MXR_INT_EN);</div><div class='add'>+</div><div class='add'>+	clk_disable(res-&gt;mixer);</div><div class='add'>+	clk_disable(res-&gt;vp);</div><div class='add'>+	clk_disable(res-&gt;sclk_mixer);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put_sync(ctx-&gt;dev);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ctx-&gt;mixer_mutex);</div><div class='add'>+	ctx-&gt;powered = false;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;ctx-&gt;mixer_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mixer_enable_vblank(void *ctx, int pipe)</div><div class='ctx'> {</div><div class='ctx'> 	struct mixer_context *mixer_ctx = ctx;</div><div class='hunk'>@@ -618,6 +705,27 @@ static void mixer_disable_vblank(void *ctx)</div><div class='ctx'> 	mixer_reg_writemask(res, MXR_INT_EN, 0, MXR_INT_EN_VSYNC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mixer_dpms(void *ctx, int mode)</div><div class='add'>+{</div><div class='add'>+	struct mixer_context *mixer_ctx = ctx;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case DRM_MODE_DPMS_ON:</div><div class='add'>+		mixer_poweron(mixer_ctx);</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_DPMS_STANDBY:</div><div class='add'>+	case DRM_MODE_DPMS_SUSPEND:</div><div class='add'>+	case DRM_MODE_DPMS_OFF:</div><div class='add'>+		mixer_poweroff(mixer_ctx);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		DRM_DEBUG_KMS("unknown dpms mode: %d\n", mode);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mixer_win_mode_set(void *ctx,</div><div class='ctx'> 			      struct exynos_drm_overlay *overlay)</div><div class='ctx'> {</div><div class='hunk'>@@ -643,7 +751,7 @@ static void mixer_win_mode_set(void *ctx,</div><div class='ctx'> 		win = MIXER_DEFAULT_WIN;</div><div class='ctx'> </div><div class='ctx'> 	if (win &lt; 0 || win &gt; MIXER_WIN_NR) {</div><div class='del'>-		DRM_ERROR("overlay plane[%d] is wrong\n", win);</div><div class='add'>+		DRM_ERROR("mixer window[%d] is wrong\n", win);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -665,6 +773,8 @@ static void mixer_win_mode_set(void *ctx,</div><div class='ctx'> 	win_data-&gt;fb_y = overlay-&gt;fb_y;</div><div class='ctx'> 	win_data-&gt;fb_width = overlay-&gt;fb_width;</div><div class='ctx'> 	win_data-&gt;fb_height = overlay-&gt;fb_height;</div><div class='add'>+	win_data-&gt;src_width = overlay-&gt;src_width;</div><div class='add'>+	win_data-&gt;src_height = overlay-&gt;src_height;</div><div class='ctx'> </div><div class='ctx'> 	win_data-&gt;mode_width = overlay-&gt;mode_width;</div><div class='ctx'> 	win_data-&gt;mode_height = overlay-&gt;mode_height;</div><div class='hunk'>@@ -672,44 +782,26 @@ static void mixer_win_mode_set(void *ctx,</div><div class='ctx'> 	win_data-&gt;scan_flags = overlay-&gt;scan_flag;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mixer_win_commit(void *ctx, int zpos)</div><div class='add'>+static void mixer_win_commit(void *ctx, int win)</div><div class='ctx'> {</div><div class='ctx'> 	struct mixer_context *mixer_ctx = ctx;</div><div class='del'>-	int win = zpos;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("[%d] %s, win: %d\n", __LINE__, __func__, win);</div><div class='ctx'> </div><div class='del'>-	if (win == DEFAULT_ZPOS)</div><div class='del'>-		win = MIXER_DEFAULT_WIN;</div><div class='del'>-</div><div class='del'>-	if (win &lt; 0 || win &gt; MIXER_WIN_NR) {</div><div class='del'>-		DRM_ERROR("overlay plane[%d] is wrong\n", win);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (win &gt; 1)</div><div class='ctx'> 		vp_video_buffer(mixer_ctx, win);</div><div class='ctx'> 	else</div><div class='ctx'> 		mixer_graph_buffer(mixer_ctx, win);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mixer_win_disable(void *ctx, int zpos)</div><div class='add'>+static void mixer_win_disable(void *ctx, int win)</div><div class='ctx'> {</div><div class='ctx'> 	struct mixer_context *mixer_ctx = ctx;</div><div class='ctx'> 	struct mixer_resources *res = &amp;mixer_ctx-&gt;mixer_res;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int win = zpos;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("[%d] %s, win: %d\n", __LINE__, __func__, win);</div><div class='ctx'> </div><div class='del'>-	if (win == DEFAULT_ZPOS)</div><div class='del'>-		win = MIXER_DEFAULT_WIN;</div><div class='del'>-</div><div class='del'>-	if (win &lt; 0 || win &gt; MIXER_WIN_NR) {</div><div class='del'>-		DRM_ERROR("overlay plane[%d] is wrong\n", win);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	spin_lock_irqsave(&amp;res-&gt;reg_slock, flags);</div><div class='ctx'> 	mixer_vsync_set_update(mixer_ctx, false);</div><div class='ctx'> </div><div class='hunk'>@@ -723,6 +815,7 @@ static struct exynos_mixer_ops mixer_ops = {</div><div class='ctx'> 	/* manager */</div><div class='ctx'> 	.enable_vblank		= mixer_enable_vblank,</div><div class='ctx'> 	.disable_vblank		= mixer_disable_vblank,</div><div class='add'>+	.dpms			= mixer_dpms,</div><div class='ctx'> </div><div class='ctx'> 	/* overlay */</div><div class='ctx'> 	.win_mode_set		= mixer_win_mode_set,</div><div class='hunk'>@@ -773,7 +866,7 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg)</div><div class='ctx'> 	struct exynos_drm_hdmi_context *drm_hdmi_ctx = arg;</div><div class='ctx'> 	struct mixer_context *ctx = drm_hdmi_ctx-&gt;ctx;</div><div class='ctx'> 	struct mixer_resources *res = &amp;ctx-&gt;mixer_res;</div><div class='del'>-	u32 val, val_base;</div><div class='add'>+	u32 val, base, shadow;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;res-&gt;reg_slock);</div><div class='ctx'> </div><div class='hunk'>@@ -784,12 +877,14 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg)</div><div class='ctx'> 	if (val &amp; MXR_INT_STATUS_VSYNC) {</div><div class='ctx'> 		/* interlace scan need to check shadow register */</div><div class='ctx'> 		if (ctx-&gt;interlace) {</div><div class='del'>-			val_base = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(0));</div><div class='del'>-			if (ctx-&gt;win_data[0].dma_addr != val_base)</div><div class='add'>+			base = mixer_reg_read(res, MXR_GRAPHIC_BASE(0));</div><div class='add'>+			shadow = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(0));</div><div class='add'>+			if (base != shadow)</div><div class='ctx'> 				goto out;</div><div class='ctx'> </div><div class='del'>-			val_base = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(1));</div><div class='del'>-			if (ctx-&gt;win_data[1].dma_addr != val_base)</div><div class='add'>+			base = mixer_reg_read(res, MXR_GRAPHIC_BASE(1));</div><div class='add'>+			shadow = mixer_reg_read(res, MXR_GRAPHIC_BASE_S(1));</div><div class='add'>+			if (base != shadow)</div><div class='ctx'> 				goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -811,117 +906,6 @@ out:</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mixer_win_reset(struct mixer_context *ctx)</div><div class='del'>-{</div><div class='del'>-	struct mixer_resources *res = &amp;ctx-&gt;mixer_res;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 val; /* value stored to register */</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;res-&gt;reg_slock, flags);</div><div class='del'>-	mixer_vsync_set_update(ctx, false);</div><div class='del'>-</div><div class='del'>-	mixer_reg_writemask(res, MXR_CFG, MXR_CFG_DST_HDMI, MXR_CFG_DST_MASK);</div><div class='del'>-</div><div class='del'>-	/* set output in RGB888 mode */</div><div class='del'>-	mixer_reg_writemask(res, MXR_CFG, MXR_CFG_OUT_RGB888, MXR_CFG_OUT_MASK);</div><div class='del'>-</div><div class='del'>-	/* 16 beat burst in DMA */</div><div class='del'>-	mixer_reg_writemask(res, MXR_STATUS, MXR_STATUS_16_BURST,</div><div class='del'>-		MXR_STATUS_BURST_MASK);</div><div class='del'>-</div><div class='del'>-	/* setting default layer priority: layer1 &gt; layer0 &gt; video</div><div class='del'>-	 * because typical usage scenario would be</div><div class='del'>-	 * layer1 - OSD</div><div class='del'>-	 * layer0 - framebuffer</div><div class='del'>-	 * video - video overlay</div><div class='del'>-	 */</div><div class='del'>-	val = MXR_LAYER_CFG_GRP1_VAL(3);</div><div class='del'>-	val |= MXR_LAYER_CFG_GRP0_VAL(2);</div><div class='del'>-	val |= MXR_LAYER_CFG_VP_VAL(1);</div><div class='del'>-	mixer_reg_write(res, MXR_LAYER_CFG, val);</div><div class='del'>-</div><div class='del'>-	/* setting background color */</div><div class='del'>-	mixer_reg_write(res, MXR_BG_COLOR0, 0x008080);</div><div class='del'>-	mixer_reg_write(res, MXR_BG_COLOR1, 0x008080);</div><div class='del'>-	mixer_reg_write(res, MXR_BG_COLOR2, 0x008080);</div><div class='del'>-</div><div class='del'>-	/* setting graphical layers */</div><div class='del'>-</div><div class='del'>-	val  = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */</div><div class='del'>-	val |= MXR_GRP_CFG_WIN_BLEND_EN;</div><div class='del'>-	val |= MXR_GRP_CFG_ALPHA_VAL(0xff); /* non-transparent alpha */</div><div class='del'>-</div><div class='del'>-	/* the same configuration for both layers */</div><div class='del'>-	mixer_reg_write(res, MXR_GRAPHIC_CFG(0), val);</div><div class='del'>-</div><div class='del'>-	val |= MXR_GRP_CFG_BLEND_PRE_MUL;</div><div class='del'>-	val |= MXR_GRP_CFG_PIXEL_BLEND_EN;</div><div class='del'>-	mixer_reg_write(res, MXR_GRAPHIC_CFG(1), val);</div><div class='del'>-</div><div class='del'>-	/* configuration of Video Processor Registers */</div><div class='del'>-	vp_win_reset(ctx);</div><div class='del'>-	vp_default_filter(res);</div><div class='del'>-</div><div class='del'>-	/* disable all layers */</div><div class='del'>-	mixer_reg_writemask(res, MXR_CFG, 0, MXR_CFG_GRP0_ENABLE);</div><div class='del'>-	mixer_reg_writemask(res, MXR_CFG, 0, MXR_CFG_GRP1_ENABLE);</div><div class='del'>-	mixer_reg_writemask(res, MXR_CFG, 0, MXR_CFG_VP_ENABLE);</div><div class='del'>-</div><div class='del'>-	mixer_vsync_set_update(ctx, true);</div><div class='del'>-	spin_unlock_irqrestore(&amp;res-&gt;reg_slock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mixer_resource_poweron(struct mixer_context *ctx)</div><div class='del'>-{</div><div class='del'>-	struct mixer_resources *res = &amp;ctx-&gt;mixer_res;</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='del'>-</div><div class='del'>-	clk_enable(res-&gt;mixer);</div><div class='del'>-	clk_enable(res-&gt;vp);</div><div class='del'>-	clk_enable(res-&gt;sclk_mixer);</div><div class='del'>-</div><div class='del'>-	mixer_win_reset(ctx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mixer_resource_poweroff(struct mixer_context *ctx)</div><div class='del'>-{</div><div class='del'>-	struct mixer_resources *res = &amp;ctx-&gt;mixer_res;</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);</div><div class='del'>-</div><div class='del'>-	clk_disable(res-&gt;mixer);</div><div class='del'>-	clk_disable(res-&gt;vp);</div><div class='del'>-	clk_disable(res-&gt;sclk_mixer);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mixer_runtime_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct exynos_drm_hdmi_context *ctx = get_mixer_context(dev);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("resume - start\n");</div><div class='del'>-</div><div class='del'>-	mixer_resource_poweron(ctx-&gt;ctx);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mixer_runtime_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct exynos_drm_hdmi_context *ctx = get_mixer_context(dev);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("suspend - start\n");</div><div class='del'>-</div><div class='del'>-	mixer_resource_poweroff(ctx-&gt;ctx);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct dev_pm_ops mixer_pm_ops = {</div><div class='del'>-	.runtime_suspend = mixer_runtime_suspend,</div><div class='del'>-	.runtime_resume	 = mixer_runtime_resume,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int __devinit mixer_resources_init(struct exynos_drm_hdmi_context *ctx,</div><div class='ctx'> 				 struct platform_device *pdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -931,7 +915,6 @@ static int __devinit mixer_resources_init(struct exynos_drm_hdmi_context *ctx,</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	mixer_res-&gt;dev = dev;</div><div class='ctx'> 	spin_lock_init(&amp;mixer_res-&gt;reg_slock);</div><div class='ctx'> </div><div class='ctx'> 	mixer_res-&gt;mixer = clk_get(dev, "mixer");</div><div class='hunk'>@@ -1027,7 +1010,6 @@ fail:</div><div class='ctx'> 		clk_put(mixer_res-&gt;vp);</div><div class='ctx'> 	if (!IS_ERR_OR_NULL(mixer_res-&gt;mixer))</div><div class='ctx'> 		clk_put(mixer_res-&gt;mixer);</div><div class='del'>-	mixer_res-&gt;dev = NULL;</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1035,7 +1017,6 @@ static void mixer_resources_cleanup(struct mixer_context *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mixer_resources *res = &amp;ctx-&gt;mixer_res;</div><div class='ctx'> </div><div class='del'>-	disable_irq(res-&gt;irq);</div><div class='ctx'> 	free_irq(res-&gt;irq, ctx);</div><div class='ctx'> </div><div class='ctx'> 	iounmap(res-&gt;vp_regs);</div><div class='hunk'>@@ -1064,6 +1045,9 @@ static int __devinit mixer_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mutex_init(&amp;ctx-&gt;mixer_mutex);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	drm_hdmi_ctx-&gt;ctx = (void *)ctx;</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, drm_hdmi_ctx);</div><div class='hunk'>@@ -1076,7 +1060,7 @@ static int __devinit mixer_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* register specific callback point to common hdmi. */</div><div class='ctx'> 	exynos_mixer_ops_register(&amp;mixer_ops);</div><div class='ctx'> </div><div class='del'>-	mixer_resource_poweron(ctx);</div><div class='add'>+	pm_runtime_enable(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1095,12 +1079,27 @@ static int mixer_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	dev_info(dev, "remove successful\n");</div><div class='ctx'> </div><div class='del'>-	mixer_resource_poweroff(ctx);</div><div class='add'>+	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='ctx'> 	mixer_resources_cleanup(ctx);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int mixer_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct exynos_drm_hdmi_context *drm_hdmi_ctx = get_mixer_context(dev);</div><div class='add'>+	struct mixer_context *ctx = drm_hdmi_ctx-&gt;ctx;</div><div class='add'>+</div><div class='add'>+	mixer_poweroff(ctx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(mixer_pm_ops, mixer_suspend, NULL);</div><div class='add'>+</div><div class='ctx'> struct platform_driver mixer_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "s5p-mixer",</div><div class='head'>diff --git a/drivers/gpu/drm/exynos/regs-hdmi.h b/drivers/gpu/drm/exynos/regs-hdmi.h<br/>index 3c04bea842ce..9cc7c5e9718c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/regs-hdmi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/exynos/regs-hdmi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/exynos/regs-hdmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/exynos/regs-hdmi.h</a></div><div class='hunk'>@@ -138,14 +138,16 @@</div><div class='ctx'> #define HDMI_ASP_MASK			(1 &lt;&lt; 2)</div><div class='ctx'> #define HDMI_EN				(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='add'>+/* HDMI_CON_2 */</div><div class='add'>+#define HDMI_VID_PREAMBLE_DIS		(1 &lt;&lt; 5)</div><div class='add'>+#define HDMI_GUARD_BAND_DIS		(1 &lt;&lt; 1)</div><div class='add'>+</div><div class='ctx'> /* HDMI_PHY_STATUS */</div><div class='ctx'> #define HDMI_PHY_STATUS_READY		(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='ctx'> /* HDMI_MODE_SEL */</div><div class='ctx'> #define HDMI_MODE_HDMI_EN		(1 &lt;&lt; 1)</div><div class='ctx'> #define HDMI_MODE_DVI_EN		(1 &lt;&lt; 0)</div><div class='del'>-#define HDMI_DVI_MODE_EN		(1)</div><div class='del'>-#define HDMI_DVI_MODE_DIS		(0)</div><div class='ctx'> #define HDMI_MODE_MASK			(3 &lt;&lt; 0)</div><div class='ctx'> </div><div class='ctx'> /* HDMI_TG_CMD */</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/Makefile b/drivers/gpu/drm/gma500/Makefile<br/>index 1583982917ce..abfa2a93f0d0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/Makefile</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> #</div><div class='ctx'> #	KMS driver for the GMA500</div><div class='ctx'> #</div><div class='del'>-ccflags-y += -Iinclude/drm</div><div class='add'>+ccflags-y += -I$(srctree)/include/drm</div><div class='ctx'> </div><div class='ctx'> gma500_gfx-y += gem_glue.o \</div><div class='ctx'> 	  accel_2d.o \</div><div class='hunk'>@@ -12,7 +12,6 @@ gma500_gfx-y += gem_glue.o \</div><div class='ctx'> 	  intel_bios.o \</div><div class='ctx'> 	  intel_i2c.o \</div><div class='ctx'> 	  intel_gmbus.o \</div><div class='del'>-	  intel_opregion.o \</div><div class='ctx'> 	  mmu.o \</div><div class='ctx'> 	  power.o \</div><div class='ctx'> 	  psb_drv.o \</div><div class='hunk'>@@ -25,6 +24,8 @@ gma500_gfx-y += gem_glue.o \</div><div class='ctx'> 	  psb_device.o \</div><div class='ctx'> 	  mid_bios.o</div><div class='ctx'> </div><div class='add'>+gma500_gfx-$(CONFIG_ACPI) +=  opregion.o \</div><div class='add'>+</div><div class='ctx'> gma500_gfx-$(CONFIG_DRM_GMA3600) +=  cdv_device.o \</div><div class='ctx'> 	  cdv_intel_crt.o \</div><div class='ctx'> 	  cdv_intel_display.o \</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/cdv_device.c b/drivers/gpu/drm/gma500/cdv_device.c<br/>index a54cc738926a..9764045428ce 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/cdv_device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/cdv_device.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/cdv_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/cdv_device.c</a></div><div class='hunk'>@@ -49,13 +49,15 @@ static void cdv_disable_vga(struct drm_device *dev)</div><div class='ctx'> static int cdv_output_init(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	drm_mode_create_scaling_mode_property(dev);</div><div class='add'>+</div><div class='ctx'> 	cdv_disable_vga(dev);</div><div class='ctx'> </div><div class='ctx'> 	cdv_intel_crt_init(dev, &amp;dev_priv-&gt;mode_dev);</div><div class='ctx'> 	cdv_intel_lvds_init(dev, &amp;dev_priv-&gt;mode_dev);</div><div class='ctx'> </div><div class='del'>-	/* These bits indicate HDMI not SDVO on CDV, but we don't yet support</div><div class='del'>-	   the HDMI interface */</div><div class='add'>+	/* These bits indicate HDMI not SDVO on CDV */</div><div class='ctx'> 	if (REG_READ(SDVOB) &amp; SDVO_DETECTED)</div><div class='ctx'> 		cdv_hdmi_init(dev, &amp;dev_priv-&gt;mode_dev, SDVOB);</div><div class='ctx'> 	if (REG_READ(SDVOC) &amp; SDVO_DETECTED)</div><div class='hunk'>@@ -66,76 +68,71 @@ static int cdv_output_init(struct drm_device *dev)</div><div class='ctx'> #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- *	Poulsbo Backlight Interfaces</div><div class='add'>+ *	Cedartrail Backlght Interfaces</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define BLC_PWM_PRECISION_FACTOR 100	/* 10000000 */</div><div class='del'>-#define BLC_PWM_FREQ_CALC_CONSTANT 32</div><div class='del'>-#define MHz 1000000</div><div class='del'>-</div><div class='del'>-#define PSB_BLC_PWM_PRECISION_FACTOR    10</div><div class='del'>-#define PSB_BLC_MAX_PWM_REG_FREQ        0xFFFE</div><div class='del'>-#define PSB_BLC_MIN_PWM_REG_FREQ        0x2</div><div class='del'>-</div><div class='del'>-#define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)</div><div class='del'>-#define PSB_BACKLIGHT_PWM_CTL_SHIFT	(16)</div><div class='del'>-</div><div class='del'>-static int cdv_brightness;</div><div class='ctx'> static struct backlight_device *cdv_backlight_device;</div><div class='ctx'> </div><div class='del'>-static int cdv_get_brightness(struct backlight_device *bd)</div><div class='add'>+static int cdv_backlight_combination_mode(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	/* return locally cached var instead of HW read (due to DPST etc.) */</div><div class='del'>-	/* FIXME: ideally return actual value in case firmware fiddled with</div><div class='del'>-	   it */</div><div class='del'>-	return cdv_brightness;</div><div class='add'>+	return REG_READ(BLC_PWM_CTL2) &amp; PWM_LEGACY_MODE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static int cdv_backlight_setup(struct drm_device *dev)</div><div class='add'>+static int cdv_get_brightness(struct backlight_device *bd)</div><div class='ctx'> {</div><div class='del'>-	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	unsigned long core_clock;</div><div class='del'>-	/* u32 bl_max_freq; */</div><div class='del'>-	/* unsigned long value; */</div><div class='del'>-	u16 bl_max_freq;</div><div class='del'>-	uint32_t value;</div><div class='del'>-	uint32_t blc_pwm_precision_factor;</div><div class='del'>-</div><div class='del'>-	/* get bl_max_freq and pol from dev_priv*/</div><div class='del'>-	if (!dev_priv-&gt;lvds_bl) {</div><div class='del'>-		dev_err(dev-&gt;dev, "Has no valid LVDS backlight info\n");</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	}</div><div class='del'>-	bl_max_freq = dev_priv-&gt;lvds_bl-&gt;freq;</div><div class='del'>-	blc_pwm_precision_factor = PSB_BLC_PWM_PRECISION_FACTOR;</div><div class='add'>+	struct drm_device *dev = bl_get_data(bd);</div><div class='add'>+	u32 val = REG_READ(BLC_PWM_CTL) &amp; BACKLIGHT_DUTY_CYCLE_MASK;</div><div class='ctx'> </div><div class='del'>-	core_clock = dev_priv-&gt;core_freq;</div><div class='add'>+	if (cdv_backlight_combination_mode(dev)) {</div><div class='add'>+		u8 lbpc;</div><div class='ctx'> </div><div class='del'>-	value = (core_clock * MHz) / BLC_PWM_FREQ_CALC_CONSTANT;</div><div class='del'>-	value *= blc_pwm_precision_factor;</div><div class='del'>-	value /= bl_max_freq;</div><div class='del'>-	value /= blc_pwm_precision_factor;</div><div class='add'>+		val &amp;= ~1;</div><div class='add'>+		pci_read_config_byte(dev-&gt;pdev, 0xF4, &amp;lbpc);</div><div class='add'>+		val *= lbpc;</div><div class='add'>+	}</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (value &gt; (unsigned long long)PSB_BLC_MAX_PWM_REG_FREQ ||</div><div class='del'>-		 value &lt; (unsigned long long)PSB_BLC_MIN_PWM_REG_FREQ)</div><div class='del'>-				return -ERANGE;</div><div class='del'>-	else {</div><div class='del'>-		/* FIXME */</div><div class='add'>+static u32 cdv_get_max_backlight(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 max = REG_READ(BLC_PWM_CTL);</div><div class='add'>+</div><div class='add'>+	if (max == 0) {</div><div class='add'>+		DRM_DEBUG_KMS("LVDS Panel PWM value is 0!\n");</div><div class='add'>+		/* i915 does this, I believe which means that we should not</div><div class='add'>+		 * smash PWM control as firmware will take control of it. */</div><div class='add'>+		return 1;</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+</div><div class='add'>+	max &gt;&gt;= 16;</div><div class='add'>+	if (cdv_backlight_combination_mode(dev))</div><div class='add'>+		max *= 0xff;</div><div class='add'>+	return max;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cdv_set_brightness(struct backlight_device *bd)</div><div class='ctx'> {</div><div class='add'>+	struct drm_device *dev = bl_get_data(bd);</div><div class='ctx'> 	int level = bd-&gt;props.brightness;</div><div class='add'>+	u32 blc_pwm_ctl;</div><div class='ctx'> </div><div class='ctx'> 	/* Percentage 1-100% being valid */</div><div class='ctx'> 	if (level &lt; 1)</div><div class='ctx'> 		level = 1;</div><div class='ctx'> </div><div class='del'>-	/*cdv_intel_lvds_set_brightness(dev, level); FIXME */</div><div class='del'>-	cdv_brightness = level;</div><div class='add'>+	if (cdv_backlight_combination_mode(dev)) {</div><div class='add'>+		u32 max = cdv_get_max_backlight(dev);</div><div class='add'>+		u8 lbpc;</div><div class='add'>+</div><div class='add'>+		lbpc = level * 0xfe / max + 1;</div><div class='add'>+		level /= lbpc;</div><div class='add'>+</div><div class='add'>+		pci_write_config_byte(dev-&gt;pdev, 0xF4, lbpc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	blc_pwm_ctl = REG_READ(BLC_PWM_CTL) &amp; ~BACKLIGHT_DUTY_CYCLE_MASK;</div><div class='add'>+	REG_WRITE(BLC_PWM_CTL, (blc_pwm_ctl |</div><div class='add'>+				(level &lt;&lt; BACKLIGHT_DUTY_CYCLE_SHIFT)));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -147,7 +144,6 @@ static const struct backlight_ops cdv_ops = {</div><div class='ctx'> static int cdv_backlight_init(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int ret;</div><div class='ctx'> 	struct backlight_properties props;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;props, 0, sizeof(struct backlight_properties));</div><div class='hunk'>@@ -159,14 +155,9 @@ static int cdv_backlight_init(struct drm_device *dev)</div><div class='ctx'> 	if (IS_ERR(cdv_backlight_device))</div><div class='ctx'> 		return PTR_ERR(cdv_backlight_device);</div><div class='ctx'> </div><div class='del'>-	ret = cdv_backlight_setup(dev);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		backlight_device_unregister(cdv_backlight_device);</div><div class='del'>-		cdv_backlight_device = NULL;</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-	cdv_backlight_device-&gt;props.brightness = 100;</div><div class='del'>-	cdv_backlight_device-&gt;props.max_brightness = 100;</div><div class='add'>+	cdv_backlight_device-&gt;props.brightness =</div><div class='add'>+			cdv_get_brightness(cdv_backlight_device);</div><div class='add'>+	cdv_backlight_device-&gt;props.max_brightness = cdv_get_max_backlight(dev);</div><div class='ctx'> 	backlight_update_status(cdv_backlight_device);</div><div class='ctx'> 	dev_priv-&gt;backlight_device = cdv_backlight_device;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -238,6 +229,19 @@ static void cdv_init_pm(struct drm_device *dev)</div><div class='ctx'> 	dev_err(dev-&gt;dev, "GPU: power management timed out.\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void cdv_errata(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	/* Disable bonus launch.</div><div class='add'>+	 *	CPU and GPU competes for memory and display misses updates and</div><div class='add'>+	 *	flickers. Worst with dual core, dual displays.</div><div class='add'>+	 *</div><div class='add'>+	 *	Fixes were done to Win 7 gfx driver to disable a feature called</div><div class='add'>+	 *	Bonus Launch to work around the issue, by degrading</div><div class='add'>+	 *	performance.</div><div class='add'>+	 */</div><div class='add'>+	 CDV_MSG_WRITE32(3, 0x30, 0x08027108);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *	cdv_save_display_registers	-	save registers lost on suspend</div><div class='ctx'>  *	@dev: our DRM device</div><div class='hunk'>@@ -251,7 +255,7 @@ static int cdv_save_display_registers(struct drm_device *dev)</div><div class='ctx'> 	struct psb_save_area *regs = &amp;dev_priv-&gt;regs;</div><div class='ctx'> 	struct drm_connector *connector;</div><div class='ctx'> </div><div class='del'>-	dev_info(dev-&gt;dev, "Saving GPU registers.\n");</div><div class='add'>+	dev_dbg(dev-&gt;dev, "Saving GPU registers.\n");</div><div class='ctx'> </div><div class='ctx'> 	pci_read_config_byte(dev-&gt;pdev, 0xF4, &amp;regs-&gt;cdv.saveLBB);</div><div class='ctx'> </div><div class='hunk'>@@ -355,7 +359,7 @@ static int cdv_restore_display_registers(struct drm_device *dev)</div><div class='ctx'> 	REG_WRITE(PSB_INT_MASK_R, regs-&gt;cdv.saveIMR);</div><div class='ctx'> </div><div class='ctx'> 	/* Fix arbitration bug */</div><div class='del'>-	CDV_MSG_WRITE32(3, 0x30, 0x08027108);</div><div class='add'>+	cdv_errata(dev);</div><div class='ctx'> </div><div class='ctx'> 	drm_mode_config_reset(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -447,13 +451,106 @@ static void cdv_get_core_freq(struct drm_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void cdv_hotplug_work_func(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+        struct drm_psb_private *dev_priv = container_of(work, struct drm_psb_private,</div><div class='add'>+							hotplug_work);                 </div><div class='add'>+        struct drm_device *dev = dev_priv-&gt;dev;</div><div class='add'>+</div><div class='add'>+        /* Just fire off a uevent and let userspace tell us what to do */</div><div class='add'>+        drm_helper_hpd_irq_event(dev);</div><div class='add'>+}                       </div><div class='add'>+</div><div class='add'>+/* The core driver has received a hotplug IRQ. We are in IRQ context</div><div class='add'>+   so extract the needed information and kick off queued processing */</div><div class='add'>+   </div><div class='add'>+static int cdv_hotplug_event(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	schedule_work(&amp;dev_priv-&gt;hotplug_work);</div><div class='add'>+	REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cdv_hotplug_enable(struct drm_device *dev, bool on)</div><div class='add'>+{</div><div class='add'>+	if (on) {</div><div class='add'>+		u32 hotplug = REG_READ(PORT_HOTPLUG_EN);</div><div class='add'>+		hotplug |= HDMIB_HOTPLUG_INT_EN | HDMIC_HOTPLUG_INT_EN |</div><div class='add'>+			   HDMID_HOTPLUG_INT_EN | CRT_HOTPLUG_INT_EN;</div><div class='add'>+		REG_WRITE(PORT_HOTPLUG_EN, hotplug);</div><div class='add'>+	}  else {</div><div class='add'>+		REG_WRITE(PORT_HOTPLUG_EN, 0);</div><div class='add'>+		REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));</div><div class='add'>+	}	</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Cedarview */</div><div class='add'>+static const struct psb_offset cdv_regmap[2] = {</div><div class='add'>+	{</div><div class='add'>+		.fp0 = FPA0,</div><div class='add'>+		.fp1 = FPA1,</div><div class='add'>+		.cntr = DSPACNTR,</div><div class='add'>+		.conf = PIPEACONF,</div><div class='add'>+		.src = PIPEASRC,</div><div class='add'>+		.dpll = DPLL_A,</div><div class='add'>+		.dpll_md = DPLL_A_MD,</div><div class='add'>+		.htotal = HTOTAL_A,</div><div class='add'>+		.hblank = HBLANK_A,</div><div class='add'>+		.hsync = HSYNC_A,</div><div class='add'>+		.vtotal = VTOTAL_A,</div><div class='add'>+		.vblank = VBLANK_A,</div><div class='add'>+		.vsync = VSYNC_A,</div><div class='add'>+		.stride = DSPASTRIDE,</div><div class='add'>+		.size = DSPASIZE,</div><div class='add'>+		.pos = DSPAPOS,</div><div class='add'>+		.base = DSPABASE,</div><div class='add'>+		.surf = DSPASURF,</div><div class='add'>+		.addr = DSPABASE,</div><div class='add'>+		.status = PIPEASTAT,</div><div class='add'>+		.linoff = DSPALINOFF,</div><div class='add'>+		.tileoff = DSPATILEOFF,</div><div class='add'>+		.palette = PALETTE_A,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.fp0 = FPB0,</div><div class='add'>+		.fp1 = FPB1,</div><div class='add'>+		.cntr = DSPBCNTR,</div><div class='add'>+		.conf = PIPEBCONF,</div><div class='add'>+		.src = PIPEBSRC,</div><div class='add'>+		.dpll = DPLL_B,</div><div class='add'>+		.dpll_md = DPLL_B_MD,</div><div class='add'>+		.htotal = HTOTAL_B,</div><div class='add'>+		.hblank = HBLANK_B,</div><div class='add'>+		.hsync = HSYNC_B,</div><div class='add'>+		.vtotal = VTOTAL_B,</div><div class='add'>+		.vblank = VBLANK_B,</div><div class='add'>+		.vsync = VSYNC_B,</div><div class='add'>+		.stride = DSPBSTRIDE,</div><div class='add'>+		.size = DSPBSIZE,</div><div class='add'>+		.pos = DSPBPOS,</div><div class='add'>+		.base = DSPBBASE,</div><div class='add'>+		.surf = DSPBSURF,</div><div class='add'>+		.addr = DSPBBASE,</div><div class='add'>+		.status = PIPEBSTAT,</div><div class='add'>+		.linoff = DSPBLINOFF,</div><div class='add'>+		.tileoff = DSPBTILEOFF,</div><div class='add'>+		.palette = PALETTE_B,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int cdv_chip_setup(struct drm_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	INIT_WORK(&amp;dev_priv-&gt;hotplug_work, cdv_hotplug_work_func);</div><div class='add'>+</div><div class='add'>+	if (pci_enable_msi(dev-&gt;pdev))</div><div class='add'>+		dev_warn(dev-&gt;dev, "Enabling MSI failed!\n");</div><div class='add'>+	dev_priv-&gt;regmap = cdv_regmap;</div><div class='ctx'> 	cdv_get_core_freq(dev);</div><div class='del'>-	gma_intel_opregion_init(dev);</div><div class='add'>+	psb_intel_opregion_init(dev);</div><div class='ctx'> 	psb_intel_init_bios(dev);</div><div class='del'>-	REG_WRITE(PORT_HOTPLUG_EN, 0);</div><div class='del'>-	REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));</div><div class='add'>+	cdv_hotplug_enable(dev, false);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -464,13 +561,19 @@ const struct psb_ops cdv_chip_ops = {</div><div class='ctx'> 	.accel_2d = 0,</div><div class='ctx'> 	.pipes = 2,</div><div class='ctx'> 	.crtcs = 2,</div><div class='add'>+	.hdmi_mask = (1 &lt;&lt; 0) | (1 &lt;&lt; 1),</div><div class='add'>+	.lvds_mask = (1 &lt;&lt; 1),</div><div class='add'>+	.cursor_needs_phys = 0,</div><div class='ctx'> 	.sgx_offset = MRST_SGX_OFFSET,</div><div class='ctx'> 	.chip_setup = cdv_chip_setup,</div><div class='add'>+	.errata = cdv_errata,</div><div class='ctx'> </div><div class='ctx'> 	.crtc_helper = &amp;cdv_intel_helper_funcs,</div><div class='ctx'> 	.crtc_funcs = &amp;cdv_intel_crtc_funcs,</div><div class='ctx'> </div><div class='ctx'> 	.output_init = cdv_output_init,</div><div class='add'>+	.hotplug = cdv_hotplug_event,</div><div class='add'>+	.hotplug_enable = cdv_hotplug_enable,</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE</div><div class='ctx'> 	.backlight_init = cdv_backlight_init,</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/cdv_intel_crt.c b/drivers/gpu/drm/gma500/cdv_intel_crt.c<br/>index a71a6cd95bdd..187422018601 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/cdv_intel_crt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/cdv_intel_crt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/cdv_intel_crt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/cdv_intel_crt.c</a></div><div class='hunk'>@@ -67,8 +67,6 @@ static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode)</div><div class='ctx'> static int cdv_intel_crt_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 				struct drm_display_mode *mode)</div><div class='ctx'> {</div><div class='del'>-	struct drm_psb_private *dev_priv = connector-&gt;dev-&gt;dev_private;</div><div class='del'>-	int max_clock = 0;</div><div class='ctx'> 	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLSCAN)</div><div class='ctx'> 		return MODE_NO_DBLESCAN;</div><div class='ctx'> </div><div class='hunk'>@@ -77,18 +75,9 @@ static int cdv_intel_crt_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 		return MODE_CLOCK_LOW;</div><div class='ctx'> </div><div class='ctx'> 	/* The max clock for CDV is 355 instead of 400 */</div><div class='del'>-	max_clock = 355000;</div><div class='del'>-	if (mode-&gt;clock &gt; max_clock)</div><div class='add'>+	if (mode-&gt;clock &gt; 355000)</div><div class='ctx'> 		return MODE_CLOCK_HIGH;</div><div class='ctx'> </div><div class='del'>-	if (mode-&gt;hdisplay &gt; 1680 || mode-&gt;vdisplay &gt; 1050)</div><div class='del'>-		return MODE_PANEL;</div><div class='del'>-</div><div class='del'>-	/* We assume worst case scenario of 32 bpp here, since we don't know */</div><div class='del'>-	if ((ALIGN(mode-&gt;hdisplay * 4, 64) * mode-&gt;vdisplay) &gt;</div><div class='del'>-	    dev_priv-&gt;vram_stolen_size)</div><div class='del'>-		return MODE_MEM;</div><div class='del'>-</div><div class='ctx'> 	return MODE_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -156,13 +145,7 @@ static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,</div><div class='ctx'> 	struct drm_device *dev = connector-&gt;dev;</div><div class='ctx'> 	u32 hotplug_en;</div><div class='ctx'> 	int i, tries = 0, ret = false;</div><div class='del'>-	u32 adpa_orig;</div><div class='del'>-</div><div class='del'>-	/* disable the DAC when doing the hotplug detection */</div><div class='del'>-</div><div class='del'>-	adpa_orig = REG_READ(ADPA);</div><div class='del'>-</div><div class='del'>-	REG_WRITE(ADPA, adpa_orig &amp; ~(ADPA_DAC_ENABLE));</div><div class='add'>+	u32 orig;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * On a CDV thep, CRT detect sequence need to be done twice</div><div class='hunk'>@@ -170,7 +153,7 @@ static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,</div><div class='ctx'> 	 */</div><div class='ctx'> 	tries = 2;</div><div class='ctx'> </div><div class='del'>-	hotplug_en = REG_READ(PORT_HOTPLUG_EN);</div><div class='add'>+	orig = hotplug_en = REG_READ(PORT_HOTPLUG_EN);</div><div class='ctx'> 	hotplug_en &amp;= ~(CRT_HOTPLUG_DETECT_MASK);</div><div class='ctx'> 	hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;</div><div class='ctx'> </div><div class='hunk'>@@ -195,8 +178,11 @@ static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,</div><div class='ctx'> 	    CRT_HOTPLUG_MONITOR_NONE)</div><div class='ctx'> 		ret = true;</div><div class='ctx'> </div><div class='del'>-	/* Restore the saved ADPA */</div><div class='del'>-	REG_WRITE(ADPA, adpa_orig);</div><div class='add'>+	 /* clear the interrupt we just generated, if any */</div><div class='add'>+	REG_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);</div><div class='add'>+</div><div class='add'>+	/* and put the bits back */</div><div class='add'>+	REG_WRITE(PORT_HOTPLUG_EN, orig);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/gma500/cdv_intel_display.c b/drivers/gpu/drm/gma500/cdv_intel_display.c<br/>index be8455919b33..c3e9a0f701df 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/cdv_intel_display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/cdv_intel_display.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/cdv_intel_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/cdv_intel_display.c</a></div><div class='hunk'>@@ -216,22 +216,22 @@ static void cdv_sb_reset(struct drm_device *dev)</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='ctx'> cdv_dpll_set_clock_cdv(struct drm_device *dev, struct drm_crtc *crtc,</div><div class='del'>-			       struct cdv_intel_clock_t *clock)</div><div class='add'>+			       struct cdv_intel_clock_t *clock, bool is_lvds)</div><div class='ctx'> {</div><div class='del'>-	struct psb_intel_crtc *psb_crtc =</div><div class='del'>-				to_psb_intel_crtc(crtc);</div><div class='add'>+	struct psb_intel_crtc *psb_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	int pipe = psb_crtc-&gt;pipe;</div><div class='ctx'> 	u32 m, n_vco, p;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;</div><div class='add'>+	int ref_sfr = (pipe == 0) ? SB_REF_DPLLA : SB_REF_DPLLB;</div><div class='ctx'> 	u32 ref_value;</div><div class='add'>+	u32 lane_reg, lane_value;</div><div class='ctx'> </div><div class='ctx'> 	cdv_sb_reset(dev);</div><div class='ctx'> </div><div class='del'>-	if ((REG_READ(dpll_reg) &amp; DPLL_SYNCLOCK_ENABLE) == 0) {</div><div class='del'>-		DRM_ERROR("Attempting to set DPLL with refclk disabled\n");</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='add'>+	REG_WRITE(dpll_reg, DPLL_SYNCLOCK_ENABLE | DPLL_VGA_MODE_DIS);</div><div class='add'>+</div><div class='add'>+	udelay(100);</div><div class='ctx'> </div><div class='ctx'> 	/* Follow the BIOS and write the REF/SFR Register. Hardcoded value */</div><div class='ctx'> 	ref_value = 0x68A701;</div><div class='hunk'>@@ -241,6 +241,35 @@ cdv_dpll_set_clock_cdv(struct drm_device *dev, struct drm_crtc *crtc,</div><div class='ctx'> 	/* We don't know what the other fields of these regs are, so</div><div class='ctx'> 	 * leave them in place.</div><div class='ctx'> 	 */</div><div class='add'>+	/* </div><div class='add'>+	 * The BIT 14:13 of 0x8010/0x8030 is used to select the ref clk</div><div class='add'>+	 * for the pipe A/B. Display spec 1.06 has wrong definition.</div><div class='add'>+	 * Correct definition is like below:</div><div class='add'>+	 *</div><div class='add'>+	 * refclka mean use clock from same PLL</div><div class='add'>+	 *</div><div class='add'>+	 * if DPLLA sets 01 and DPLLB sets 01, they use clock from their pll</div><div class='add'>+	 *</div><div class='add'>+	 * if DPLLA sets 01 and DPLLB sets 02, both use clk from DPLLA</div><div class='add'>+	 *</div><div class='add'>+	 */  </div><div class='add'>+	ret = cdv_sb_read(dev, ref_sfr, &amp;ref_value);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	ref_value &amp;= ~(REF_CLK_MASK);</div><div class='add'>+</div><div class='add'>+	/* use DPLL_A for pipeB on CRT/HDMI */</div><div class='add'>+	if (pipe == 1 &amp;&amp; !is_lvds) {</div><div class='add'>+		DRM_DEBUG_KMS("use DPLLA for pipe B\n");</div><div class='add'>+		ref_value |= REF_CLK_DPLLA;</div><div class='add'>+	} else {</div><div class='add'>+		DRM_DEBUG_KMS("use their DPLL for pipe A/B\n");</div><div class='add'>+		ref_value |= REF_CLK_DPLL;</div><div class='add'>+	}</div><div class='add'>+	ret = cdv_sb_write(dev, ref_sfr, ref_value);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	ret = cdv_sb_read(dev, SB_M(pipe), &amp;m);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -307,36 +336,29 @@ cdv_dpll_set_clock_cdv(struct drm_device *dev, struct drm_crtc *crtc,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	/* always Program the Lane Register for the Pipe A*/</div><div class='del'>-	if (pipe == 0) {</div><div class='del'>-		/* Program the Lane0/1 for HDMI B */</div><div class='del'>-		u32 lane_reg, lane_value;</div><div class='del'>-</div><div class='del'>-		lane_reg = PSB_LANE0;</div><div class='del'>-		cdv_sb_read(dev, lane_reg, &amp;lane_value);</div><div class='del'>-		lane_value &amp;= ~(LANE_PLL_MASK);</div><div class='del'>-		lane_value |= LANE_PLL_ENABLE;</div><div class='del'>-		cdv_sb_write(dev, lane_reg, lane_value);</div><div class='del'>-</div><div class='del'>-		lane_reg = PSB_LANE1;</div><div class='del'>-		cdv_sb_read(dev, lane_reg, &amp;lane_value);</div><div class='del'>-		lane_value &amp;= ~(LANE_PLL_MASK);</div><div class='del'>-		lane_value |= LANE_PLL_ENABLE;</div><div class='del'>-		cdv_sb_write(dev, lane_reg, lane_value);</div><div class='del'>-</div><div class='del'>-		/* Program the Lane2/3 for HDMI C */</div><div class='del'>-		lane_reg = PSB_LANE2;</div><div class='del'>-		cdv_sb_read(dev, lane_reg, &amp;lane_value);</div><div class='del'>-		lane_value &amp;= ~(LANE_PLL_MASK);</div><div class='del'>-		lane_value |= LANE_PLL_ENABLE;</div><div class='del'>-		cdv_sb_write(dev, lane_reg, lane_value);</div><div class='del'>-</div><div class='del'>-		lane_reg = PSB_LANE3;</div><div class='del'>-		cdv_sb_read(dev, lane_reg, &amp;lane_value);</div><div class='del'>-		lane_value &amp;= ~(LANE_PLL_MASK);</div><div class='del'>-		lane_value |= LANE_PLL_ENABLE;</div><div class='del'>-		cdv_sb_write(dev, lane_reg, lane_value);</div><div class='del'>-	}</div><div class='add'>+	lane_reg = PSB_LANE0;</div><div class='add'>+	cdv_sb_read(dev, lane_reg, &amp;lane_value);</div><div class='add'>+	lane_value &amp;= ~(LANE_PLL_MASK);</div><div class='add'>+	lane_value |= LANE_PLL_ENABLE | LANE_PLL_PIPE(pipe);</div><div class='add'>+	cdv_sb_write(dev, lane_reg, lane_value);</div><div class='add'>+</div><div class='add'>+	lane_reg = PSB_LANE1;</div><div class='add'>+	cdv_sb_read(dev, lane_reg, &amp;lane_value);</div><div class='add'>+	lane_value &amp;= ~(LANE_PLL_MASK);</div><div class='add'>+	lane_value |= LANE_PLL_ENABLE | LANE_PLL_PIPE(pipe);</div><div class='add'>+	cdv_sb_write(dev, lane_reg, lane_value);</div><div class='add'>+</div><div class='add'>+	lane_reg = PSB_LANE2;</div><div class='add'>+	cdv_sb_read(dev, lane_reg, &amp;lane_value);</div><div class='add'>+	lane_value &amp;= ~(LANE_PLL_MASK);</div><div class='add'>+	lane_value |= LANE_PLL_ENABLE | LANE_PLL_PIPE(pipe);</div><div class='add'>+	cdv_sb_write(dev, lane_reg, lane_value);</div><div class='add'>+</div><div class='add'>+	lane_reg = PSB_LANE3;</div><div class='add'>+	cdv_sb_read(dev, lane_reg, &amp;lane_value);</div><div class='add'>+	lane_value &amp;= ~(LANE_PLL_MASK);</div><div class='add'>+	lane_value |= LANE_PLL_ENABLE | LANE_PLL_PIPE(pipe);</div><div class='add'>+	cdv_sb_write(dev, lane_reg, lane_value);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -480,14 +502,12 @@ static int cdv_intel_pipe_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 			    int x, int y, struct drm_framebuffer *old_fb)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	struct psb_framebuffer *psbfb = to_psb_fb(crtc-&gt;fb);</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	unsigned long start, offset;</div><div class='del'>-	int dspbase = (pipe == 0 ? DSPABASE : DSPBBASE);</div><div class='del'>-	int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);</div><div class='del'>-	int dspstride = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE;</div><div class='del'>-	int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;</div><div class='ctx'> 	u32 dspcntr;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -509,9 +529,9 @@ static int cdv_intel_pipe_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 	start = psbfb-&gt;gtt-&gt;offset;</div><div class='ctx'> 	offset = y * crtc-&gt;fb-&gt;pitches[0] + x * (crtc-&gt;fb-&gt;bits_per_pixel / 8);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(dspstride, crtc-&gt;fb-&gt;pitches[0]);</div><div class='add'>+	REG_WRITE(map-&gt;stride, crtc-&gt;fb-&gt;pitches[0]);</div><div class='ctx'> </div><div class='del'>-	dspcntr = REG_READ(dspcntr_reg);</div><div class='add'>+	dspcntr = REG_READ(map-&gt;cntr);</div><div class='ctx'> 	dspcntr &amp;= ~DISPPLANE_PIXFORMAT_MASK;</div><div class='ctx'> </div><div class='ctx'> 	switch (crtc-&gt;fb-&gt;bits_per_pixel) {</div><div class='hunk'>@@ -533,15 +553,15 @@ static int cdv_intel_pipe_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto psb_intel_pipe_set_base_exit;</div><div class='ctx'> 	}</div><div class='del'>-	REG_WRITE(dspcntr_reg, dspcntr);</div><div class='add'>+	REG_WRITE(map-&gt;cntr, dspcntr);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev-&gt;dev,</div><div class='ctx'> 		"Writing base %08lX %08lX %d %d\n", start, offset, x, y);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(dspbase, offset);</div><div class='del'>-	REG_READ(dspbase);</div><div class='del'>-	REG_WRITE(dspsurf, start);</div><div class='del'>-	REG_READ(dspsurf);</div><div class='add'>+	REG_WRITE(map-&gt;base, offset);</div><div class='add'>+	REG_READ(map-&gt;base);</div><div class='add'>+	REG_WRITE(map-&gt;surf, start);</div><div class='add'>+	REG_READ(map-&gt;surf);</div><div class='ctx'> </div><div class='ctx'> psb_intel_pipe_cleaner:</div><div class='ctx'> 	/* If there was a previous display we can now unpin it */</div><div class='hunk'>@@ -553,6 +573,199 @@ psb_intel_pipe_set_base_exit:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define		FIFO_PIPEA		(1 &lt;&lt; 0)</div><div class='add'>+#define		FIFO_PIPEB		(1 &lt;&lt; 1)</div><div class='add'>+</div><div class='add'>+static bool cdv_intel_pipe_enabled(struct drm_device *dev, int pipe)</div><div class='add'>+{</div><div class='add'>+	struct drm_crtc *crtc;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct psb_intel_crtc *psb_intel_crtc = NULL;</div><div class='add'>+</div><div class='add'>+	crtc = dev_priv-&gt;pipe_to_crtc_mapping[pipe];</div><div class='add'>+	psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='add'>+</div><div class='add'>+	if (crtc-&gt;fb == NULL || !psb_intel_crtc-&gt;active)</div><div class='add'>+		return false;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool cdv_intel_single_pipe_active (struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	uint32_t pipe_enabled = 0;</div><div class='add'>+</div><div class='add'>+	if (cdv_intel_pipe_enabled(dev, 0))</div><div class='add'>+		pipe_enabled |= FIFO_PIPEA;</div><div class='add'>+</div><div class='add'>+	if (cdv_intel_pipe_enabled(dev, 1))</div><div class='add'>+		pipe_enabled |= FIFO_PIPEB;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("pipe enabled %x\n", pipe_enabled);</div><div class='add'>+</div><div class='add'>+	if (pipe_enabled == FIFO_PIPEA || pipe_enabled == FIFO_PIPEB)</div><div class='add'>+		return true;</div><div class='add'>+	else</div><div class='add'>+		return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool is_pipeb_lvds(struct drm_device *dev, struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='add'>+	struct drm_mode_config *mode_config = &amp;dev-&gt;mode_config;</div><div class='add'>+	struct drm_connector *connector;</div><div class='add'>+</div><div class='add'>+	if (psb_intel_crtc-&gt;pipe != 1)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(connector, &amp;mode_config-&gt;connector_list, head) {</div><div class='add'>+		struct psb_intel_encoder *psb_intel_encoder =</div><div class='add'>+					psb_intel_attached_encoder(connector);</div><div class='add'>+</div><div class='add'>+		if (!connector-&gt;encoder</div><div class='add'>+		    || connector-&gt;encoder-&gt;crtc != crtc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (psb_intel_encoder-&gt;type == INTEL_OUTPUT_LVDS)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cdv_intel_disable_self_refresh (struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	if (REG_READ(FW_BLC_SELF) &amp; FW_BLC_SELF_EN) {</div><div class='add'>+</div><div class='add'>+		/* Disable self-refresh before adjust WM */</div><div class='add'>+		REG_WRITE(FW_BLC_SELF, (REG_READ(FW_BLC_SELF) &amp; ~FW_BLC_SELF_EN));</div><div class='add'>+		REG_READ(FW_BLC_SELF);</div><div class='add'>+</div><div class='add'>+		cdv_intel_wait_for_vblank(dev);</div><div class='add'>+</div><div class='add'>+		/* Cedarview workaround to write ovelay plane, which force to leave</div><div class='add'>+		 * MAX_FIFO state.</div><div class='add'>+		 */</div><div class='add'>+		REG_WRITE(OV_OVADD, 0/*dev_priv-&gt;ovl_offset*/);</div><div class='add'>+		REG_READ(OV_OVADD);</div><div class='add'>+</div><div class='add'>+		cdv_intel_wait_for_vblank(dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cdv_intel_update_watermark (struct drm_device *dev, struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	if (cdv_intel_single_pipe_active(dev)) {</div><div class='add'>+		u32 fw;</div><div class='add'>+</div><div class='add'>+		fw = REG_READ(DSPFW1);</div><div class='add'>+		fw &amp;= ~DSP_FIFO_SR_WM_MASK;</div><div class='add'>+		fw |= (0x7e &lt;&lt; DSP_FIFO_SR_WM_SHIFT);</div><div class='add'>+		fw &amp;= ~CURSOR_B_FIFO_WM_MASK;</div><div class='add'>+		fw |= (0x4 &lt;&lt; CURSOR_B_FIFO_WM_SHIFT);</div><div class='add'>+		REG_WRITE(DSPFW1, fw);</div><div class='add'>+</div><div class='add'>+		fw = REG_READ(DSPFW2);</div><div class='add'>+		fw &amp;= ~CURSOR_A_FIFO_WM_MASK;</div><div class='add'>+		fw |= (0x6 &lt;&lt; CURSOR_A_FIFO_WM_SHIFT);</div><div class='add'>+		fw &amp;= ~DSP_PLANE_C_FIFO_WM_MASK;</div><div class='add'>+		fw |= (0x8 &lt;&lt; DSP_PLANE_C_FIFO_WM_SHIFT);</div><div class='add'>+		REG_WRITE(DSPFW2, fw);</div><div class='add'>+</div><div class='add'>+		REG_WRITE(DSPFW3, 0x36000000);</div><div class='add'>+</div><div class='add'>+		/* ignore FW4 */</div><div class='add'>+</div><div class='add'>+		if (is_pipeb_lvds(dev, crtc)) {</div><div class='add'>+			REG_WRITE(DSPFW5, 0x00040330);</div><div class='add'>+		} else {</div><div class='add'>+			fw = (3 &lt;&lt; DSP_PLANE_B_FIFO_WM1_SHIFT) |</div><div class='add'>+			     (4 &lt;&lt; DSP_PLANE_A_FIFO_WM1_SHIFT) |</div><div class='add'>+			     (3 &lt;&lt; CURSOR_B_FIFO_WM1_SHIFT) |</div><div class='add'>+			     (4 &lt;&lt; CURSOR_FIFO_SR_WM1_SHIFT);</div><div class='add'>+			REG_WRITE(DSPFW5, fw);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		REG_WRITE(DSPFW6, 0x10);</div><div class='add'>+</div><div class='add'>+		cdv_intel_wait_for_vblank(dev);</div><div class='add'>+</div><div class='add'>+		/* enable self-refresh for single pipe active */</div><div class='add'>+		REG_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);</div><div class='add'>+		REG_READ(FW_BLC_SELF);</div><div class='add'>+		cdv_intel_wait_for_vblank(dev);</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+</div><div class='add'>+		/* HW team suggested values... */</div><div class='add'>+		REG_WRITE(DSPFW1, 0x3f880808);</div><div class='add'>+		REG_WRITE(DSPFW2, 0x0b020202);</div><div class='add'>+		REG_WRITE(DSPFW3, 0x24000000);</div><div class='add'>+		REG_WRITE(DSPFW4, 0x08030202);</div><div class='add'>+		REG_WRITE(DSPFW5, 0x01010101);</div><div class='add'>+		REG_WRITE(DSPFW6, 0x1d0);</div><div class='add'>+</div><div class='add'>+		cdv_intel_wait_for_vblank(dev);</div><div class='add'>+</div><div class='add'>+		cdv_intel_disable_self_refresh(dev);</div><div class='add'>+	</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/** Loads the palette/gamma unit for the CRTC with the prepared values */</div><div class='add'>+static void cdv_intel_crtc_load_lut(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='add'>+	int palreg = PALETTE_A;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* The clocks have to be on to load the palette. */</div><div class='add'>+	if (!crtc-&gt;enabled)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (psb_intel_crtc-&gt;pipe) {</div><div class='add'>+	case 0:</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		palreg = PALETTE_B;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		palreg = PALETTE_C;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dev-&gt;dev, "Illegal Pipe Number.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (gma_power_begin(dev, false)) {</div><div class='add'>+		for (i = 0; i &lt; 256; i++) {</div><div class='add'>+			REG_WRITE(palreg + 4 * i,</div><div class='add'>+				  ((psb_intel_crtc-&gt;lut_r[i] +</div><div class='add'>+				  psb_intel_crtc-&gt;lut_adj[i]) &lt;&lt; 16) |</div><div class='add'>+				  ((psb_intel_crtc-&gt;lut_g[i] +</div><div class='add'>+				  psb_intel_crtc-&gt;lut_adj[i]) &lt;&lt; 8) |</div><div class='add'>+				  (psb_intel_crtc-&gt;lut_b[i] +</div><div class='add'>+				  psb_intel_crtc-&gt;lut_adj[i]));</div><div class='add'>+		}</div><div class='add'>+		gma_power_end(dev);</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; 256; i++) {</div><div class='add'>+			dev_priv-&gt;regs.pipe[0].palette[i] =</div><div class='add'>+				  ((psb_intel_crtc-&gt;lut_r[i] +</div><div class='add'>+				  psb_intel_crtc-&gt;lut_adj[i]) &lt;&lt; 16) |</div><div class='add'>+				  ((psb_intel_crtc-&gt;lut_g[i] +</div><div class='add'>+				  psb_intel_crtc-&gt;lut_adj[i]) &lt;&lt; 8) |</div><div class='add'>+				  (psb_intel_crtc-&gt;lut_b[i] +</div><div class='add'>+				  psb_intel_crtc-&gt;lut_adj[i]);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * Sets the power management mode of the pipe and plane.</div><div class='ctx'>  *</div><div class='hunk'>@@ -562,62 +775,80 @@ psb_intel_pipe_set_base_exit:</div><div class='ctx'> static void cdv_intel_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='del'>-	int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;</div><div class='del'>-	int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;</div><div class='del'>-	int dspbase_reg = (pipe == 0) ? DSPABASE : DSPBBASE;</div><div class='del'>-	int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	u32 temp;</div><div class='ctx'> </div><div class='ctx'> 	/* XXX: When our outputs are all unaware of DPMS modes other than off</div><div class='ctx'> 	 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.</div><div class='ctx'> 	 */</div><div class='add'>+	cdv_intel_disable_self_refresh(dev);</div><div class='add'>+</div><div class='ctx'> 	switch (mode) {</div><div class='ctx'> 	case DRM_MODE_DPMS_ON:</div><div class='ctx'> 	case DRM_MODE_DPMS_STANDBY:</div><div class='ctx'> 	case DRM_MODE_DPMS_SUSPEND:</div><div class='add'>+		if (psb_intel_crtc-&gt;active)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		psb_intel_crtc-&gt;active = true;</div><div class='add'>+</div><div class='ctx'> 		/* Enable the DPLL */</div><div class='del'>-		temp = REG_READ(dpll_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;dpll);</div><div class='ctx'> 		if ((temp &amp; DPLL_VCO_ENABLE) == 0) {</div><div class='del'>-			REG_WRITE(dpll_reg, temp);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 			/* Wait for the clocks to stabilize. */</div><div class='ctx'> 			udelay(150);</div><div class='del'>-			REG_WRITE(dpll_reg, temp | DPLL_VCO_ENABLE);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp | DPLL_VCO_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 			/* Wait for the clocks to stabilize. */</div><div class='ctx'> 			udelay(150);</div><div class='del'>-			REG_WRITE(dpll_reg, temp | DPLL_VCO_ENABLE);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp | DPLL_VCO_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 			/* Wait for the clocks to stabilize. */</div><div class='ctx'> 			udelay(150);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Jim Bish - switch plan and pipe per scott */</div><div class='ctx'> 		/* Enable the plane */</div><div class='del'>-		temp = REG_READ(dspcntr_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;cntr);</div><div class='ctx'> 		if ((temp &amp; DISPLAY_PLANE_ENABLE) == 0) {</div><div class='del'>-			REG_WRITE(dspcntr_reg,</div><div class='add'>+			REG_WRITE(map-&gt;cntr,</div><div class='ctx'> 				  temp | DISPLAY_PLANE_ENABLE);</div><div class='ctx'> 			/* Flush the plane changes */</div><div class='del'>-			REG_WRITE(dspbase_reg, REG_READ(dspbase_reg));</div><div class='add'>+			REG_WRITE(map-&gt;base, REG_READ(map-&gt;base));</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		udelay(150);</div><div class='ctx'> </div><div class='ctx'> 		/* Enable the pipe */</div><div class='del'>-		temp = REG_READ(pipeconf_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 		if ((temp &amp; PIPEACONF_ENABLE) == 0)</div><div class='del'>-			REG_WRITE(pipeconf_reg, temp | PIPEACONF_ENABLE);</div><div class='add'>+			REG_WRITE(map-&gt;conf, temp | PIPEACONF_ENABLE);</div><div class='add'>+</div><div class='add'>+		temp = REG_READ(map-&gt;status);</div><div class='add'>+		temp &amp;= ~(0xFFFF);</div><div class='add'>+		temp |= PIPE_FIFO_UNDERRUN;</div><div class='add'>+		REG_WRITE(map-&gt;status, temp);</div><div class='add'>+		REG_READ(map-&gt;status);</div><div class='ctx'> </div><div class='del'>-		psb_intel_crtc_load_lut(crtc);</div><div class='add'>+		cdv_intel_update_watermark(dev, crtc);</div><div class='add'>+		cdv_intel_crtc_load_lut(crtc);</div><div class='ctx'> </div><div class='ctx'> 		/* Give the overlay scaler a chance to enable</div><div class='ctx'> 		 * if it's on this pipe */</div><div class='ctx'> 		/* psb_intel_crtc_dpms_video(crtc, true); TODO */</div><div class='add'>+		psb_intel_crtc-&gt;crtc_enable = true;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DRM_MODE_DPMS_OFF:</div><div class='add'>+		if (!psb_intel_crtc-&gt;active)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		psb_intel_crtc-&gt;active = false;</div><div class='add'>+</div><div class='ctx'> 		/* Give the overlay scaler a chance to disable</div><div class='ctx'> 		 * if it's on this pipe */</div><div class='ctx'> 		/* psb_intel_crtc_dpms_video(crtc, FALSE); TODO */</div><div class='hunk'>@@ -627,14 +858,15 @@ static void cdv_intel_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> </div><div class='ctx'> 		/* Jim Bish - changed pipe/plane here as well. */</div><div class='ctx'> </div><div class='add'>+		drm_vblank_off(dev, pipe);</div><div class='ctx'> 		/* Wait for vblank for the disable to take effect */</div><div class='ctx'> 		cdv_intel_wait_for_vblank(dev);</div><div class='ctx'> </div><div class='ctx'> 		/* Next, disable display pipes */</div><div class='del'>-		temp = REG_READ(pipeconf_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 		if ((temp &amp; PIPEACONF_ENABLE) != 0) {</div><div class='del'>-			REG_WRITE(pipeconf_reg, temp &amp; ~PIPEACONF_ENABLE);</div><div class='del'>-			REG_READ(pipeconf_reg);</div><div class='add'>+			REG_WRITE(map-&gt;conf, temp &amp; ~PIPEACONF_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;conf);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Wait for vblank for the disable to take effect. */</div><div class='hunk'>@@ -643,23 +875,25 @@ static void cdv_intel_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> 		udelay(150);</div><div class='ctx'> </div><div class='ctx'> 		/* Disable display plane */</div><div class='del'>-		temp = REG_READ(dspcntr_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;cntr);</div><div class='ctx'> 		if ((temp &amp; DISPLAY_PLANE_ENABLE) != 0) {</div><div class='del'>-			REG_WRITE(dspcntr_reg,</div><div class='add'>+			REG_WRITE(map-&gt;cntr,</div><div class='ctx'> 				  temp &amp; ~DISPLAY_PLANE_ENABLE);</div><div class='ctx'> 			/* Flush the plane changes */</div><div class='del'>-			REG_WRITE(dspbase_reg, REG_READ(dspbase_reg));</div><div class='del'>-			REG_READ(dspbase_reg);</div><div class='add'>+			REG_WRITE(map-&gt;base, REG_READ(map-&gt;base));</div><div class='add'>+			REG_READ(map-&gt;base);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		temp = REG_READ(dpll_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;dpll);</div><div class='ctx'> 		if ((temp &amp; DPLL_VCO_ENABLE) != 0) {</div><div class='del'>-			REG_WRITE(dpll_reg, temp &amp; ~DPLL_VCO_ENABLE);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp &amp; ~DPLL_VCO_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Wait for the clocks to turn off. */</div><div class='ctx'> 		udelay(150);</div><div class='add'>+		cdv_intel_update_watermark(dev, crtc);</div><div class='add'>+		psb_intel_crtc-&gt;crtc_enable = false;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	/*Set FIFO Watermarks*/</div><div class='hunk'>@@ -709,21 +943,10 @@ static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 			       struct drm_framebuffer *old_fb)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='del'>-	int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;</div><div class='del'>-	int dpll_md_reg = (psb_intel_crtc-&gt;pipe == 0) ? DPLL_A_MD : DPLL_B_MD;</div><div class='del'>-	int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;</div><div class='del'>-	int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;</div><div class='del'>-	int htot_reg = (pipe == 0) ? HTOTAL_A : HTOTAL_B;</div><div class='del'>-	int hblank_reg = (pipe == 0) ? HBLANK_A : HBLANK_B;</div><div class='del'>-	int hsync_reg = (pipe == 0) ? HSYNC_A : HSYNC_B;</div><div class='del'>-	int vtot_reg = (pipe == 0) ? VTOTAL_A : VTOTAL_B;</div><div class='del'>-	int vblank_reg = (pipe == 0) ? VBLANK_A : VBLANK_B;</div><div class='del'>-	int vsync_reg = (pipe == 0) ? VSYNC_A : VSYNC_B;</div><div class='del'>-	int dspsize_reg = (pipe == 0) ? DSPASIZE : DSPBSIZE;</div><div class='del'>-	int dsppos_reg = (pipe == 0) ? DSPAPOS : DSPBPOS;</div><div class='del'>-	int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	int refclk;</div><div class='ctx'> 	struct cdv_intel_clock_t clock;</div><div class='ctx'> 	u32 dpll = 0, dspcntr, pipeconf;</div><div class='hunk'>@@ -757,13 +980,18 @@ static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	refclk = 96000;</div><div class='del'>-</div><div class='del'>-	/* Hack selection about ref clk for CRT */</div><div class='del'>-	/* Select 27MHz as the reference clk for HDMI */</div><div class='del'>-	if (is_crt || is_hdmi)</div><div class='add'>+	if (dev_priv-&gt;dplla_96mhz)</div><div class='add'>+		/* low-end sku, 96/100 mhz */</div><div class='add'>+		refclk = 96000;</div><div class='add'>+	else</div><div class='add'>+		/* high-end sku, 27/100 mhz */</div><div class='ctx'> 		refclk = 27000;</div><div class='ctx'> </div><div class='add'>+	if (is_lvds &amp;&amp; dev_priv-&gt;lvds_use_ssc) {</div><div class='add'>+		refclk = dev_priv-&gt;lvds_ssc_freq * 1000;</div><div class='add'>+		DRM_DEBUG_KMS("Use SSC reference clock %d Mhz\n", dev_priv-&gt;lvds_ssc_freq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	drm_mode_debug_printmodeline(adjusted_mode);</div><div class='ctx'> </div><div class='ctx'> 	ok = cdv_intel_find_best_PLL(crtc, adjusted_mode-&gt;clock, refclk,</div><div class='hunk'>@@ -779,18 +1007,17 @@ static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> /*	dpll |= PLL_REF_INPUT_TVCLKINBC; */</div><div class='ctx'> 		dpll |= 3;</div><div class='ctx'> 	}</div><div class='del'>-		dpll |= PLL_REF_INPUT_DREFCLK;</div><div class='add'>+/*		dpll |= PLL_REF_INPUT_DREFCLK; */</div><div class='ctx'> </div><div class='ctx'> 	dpll |= DPLL_SYNCLOCK_ENABLE;</div><div class='del'>-	dpll |= DPLL_VGA_MODE_DIS;</div><div class='del'>-	if (is_lvds)</div><div class='add'>+/*	if (is_lvds)</div><div class='ctx'> 		dpll |= DPLLB_MODE_LVDS;</div><div class='ctx'> 	else</div><div class='del'>-		dpll |= DPLLB_MODE_DAC_SERIAL;</div><div class='add'>+		dpll |= DPLLB_MODE_DAC_SERIAL; */</div><div class='ctx'> 	/* dpll |= (2 &lt;&lt; 11); */</div><div class='ctx'> </div><div class='ctx'> 	/* setup pipeconf */</div><div class='del'>-	pipeconf = REG_READ(pipeconf_reg);</div><div class='add'>+	pipeconf = REG_READ(map-&gt;conf);</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the display plane register */</div><div class='ctx'> 	dspcntr = DISPPLANE_GAMMA_ENABLE;</div><div class='hunk'>@@ -803,10 +1030,10 @@ static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	dspcntr |= DISPLAY_PLANE_ENABLE;</div><div class='ctx'> 	pipeconf |= PIPEACONF_ENABLE;</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(dpll_reg, dpll | DPLL_VGA_MODE_DIS | DPLL_SYNCLOCK_ENABLE);</div><div class='del'>-	REG_READ(dpll_reg);</div><div class='add'>+	REG_WRITE(map-&gt;dpll, dpll | DPLL_VGA_MODE_DIS | DPLL_SYNCLOCK_ENABLE);</div><div class='add'>+	REG_READ(map-&gt;dpll);</div><div class='ctx'> </div><div class='del'>-	cdv_dpll_set_clock_cdv(dev, crtc, &amp;clock);</div><div class='add'>+	cdv_dpll_set_clock_cdv(dev, crtc, &amp;clock, is_lvds);</div><div class='ctx'> </div><div class='ctx'> 	udelay(150);</div><div class='ctx'> </div><div class='hunk'>@@ -848,48 +1075,48 @@ static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B');</div><div class='ctx'> 	drm_mode_debug_printmodeline(mode);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(dpll_reg,</div><div class='del'>-		(REG_READ(dpll_reg) &amp; ~DPLL_LOCK) | DPLL_VCO_ENABLE);</div><div class='del'>-	REG_READ(dpll_reg);</div><div class='add'>+	REG_WRITE(map-&gt;dpll,</div><div class='add'>+		(REG_READ(map-&gt;dpll) &amp; ~DPLL_LOCK) | DPLL_VCO_ENABLE);</div><div class='add'>+	REG_READ(map-&gt;dpll);</div><div class='ctx'> 	/* Wait for the clocks to stabilize. */</div><div class='ctx'> 	udelay(150); /* 42 usec w/o calibration, 110 with.  rounded up. */</div><div class='ctx'> </div><div class='del'>-	if (!(REG_READ(dpll_reg) &amp; DPLL_LOCK)) {</div><div class='add'>+	if (!(REG_READ(map-&gt;dpll) &amp; DPLL_LOCK)) {</div><div class='ctx'> 		dev_err(dev-&gt;dev, "Failed to get DPLL lock\n");</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	{</div><div class='ctx'> 		int sdvo_pixel_multiply = adjusted_mode-&gt;clock / mode-&gt;clock;</div><div class='del'>-		REG_WRITE(dpll_md_reg, (0 &lt;&lt; DPLL_MD_UDI_DIVIDER_SHIFT) | ((sdvo_pixel_multiply - 1) &lt;&lt; DPLL_MD_UDI_MULTIPLIER_SHIFT));</div><div class='add'>+		REG_WRITE(map-&gt;dpll_md, (0 &lt;&lt; DPLL_MD_UDI_DIVIDER_SHIFT) | ((sdvo_pixel_multiply - 1) &lt;&lt; DPLL_MD_UDI_MULTIPLIER_SHIFT));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(htot_reg, (adjusted_mode-&gt;crtc_hdisplay - 1) |</div><div class='add'>+	REG_WRITE(map-&gt;htotal, (adjusted_mode-&gt;crtc_hdisplay - 1) |</div><div class='ctx'> 		  ((adjusted_mode-&gt;crtc_htotal - 1) &lt;&lt; 16));</div><div class='del'>-	REG_WRITE(hblank_reg, (adjusted_mode-&gt;crtc_hblank_start - 1) |</div><div class='add'>+	REG_WRITE(map-&gt;hblank, (adjusted_mode-&gt;crtc_hblank_start - 1) |</div><div class='ctx'> 		  ((adjusted_mode-&gt;crtc_hblank_end - 1) &lt;&lt; 16));</div><div class='del'>-	REG_WRITE(hsync_reg, (adjusted_mode-&gt;crtc_hsync_start - 1) |</div><div class='add'>+	REG_WRITE(map-&gt;hsync, (adjusted_mode-&gt;crtc_hsync_start - 1) |</div><div class='ctx'> 		  ((adjusted_mode-&gt;crtc_hsync_end - 1) &lt;&lt; 16));</div><div class='del'>-	REG_WRITE(vtot_reg, (adjusted_mode-&gt;crtc_vdisplay - 1) |</div><div class='add'>+	REG_WRITE(map-&gt;vtotal, (adjusted_mode-&gt;crtc_vdisplay - 1) |</div><div class='ctx'> 		  ((adjusted_mode-&gt;crtc_vtotal - 1) &lt;&lt; 16));</div><div class='del'>-	REG_WRITE(vblank_reg, (adjusted_mode-&gt;crtc_vblank_start - 1) |</div><div class='add'>+	REG_WRITE(map-&gt;vblank, (adjusted_mode-&gt;crtc_vblank_start - 1) |</div><div class='ctx'> 		  ((adjusted_mode-&gt;crtc_vblank_end - 1) &lt;&lt; 16));</div><div class='del'>-	REG_WRITE(vsync_reg, (adjusted_mode-&gt;crtc_vsync_start - 1) |</div><div class='add'>+	REG_WRITE(map-&gt;vsync, (adjusted_mode-&gt;crtc_vsync_start - 1) |</div><div class='ctx'> 		  ((adjusted_mode-&gt;crtc_vsync_end - 1) &lt;&lt; 16));</div><div class='ctx'> 	/* pipesrc and dspsize control the size that is scaled from,</div><div class='ctx'> 	 * which should always be the user's requested size.</div><div class='ctx'> 	 */</div><div class='del'>-	REG_WRITE(dspsize_reg,</div><div class='add'>+	REG_WRITE(map-&gt;size,</div><div class='ctx'> 		  ((mode-&gt;vdisplay - 1) &lt;&lt; 16) | (mode-&gt;hdisplay - 1));</div><div class='del'>-	REG_WRITE(dsppos_reg, 0);</div><div class='del'>-	REG_WRITE(pipesrc_reg,</div><div class='add'>+	REG_WRITE(map-&gt;pos, 0);</div><div class='add'>+	REG_WRITE(map-&gt;src,</div><div class='ctx'> 		  ((mode-&gt;hdisplay - 1) &lt;&lt; 16) | (mode-&gt;vdisplay - 1));</div><div class='del'>-	REG_WRITE(pipeconf_reg, pipeconf);</div><div class='del'>-	REG_READ(pipeconf_reg);</div><div class='add'>+	REG_WRITE(map-&gt;conf, pipeconf);</div><div class='add'>+	REG_READ(map-&gt;conf);</div><div class='ctx'> </div><div class='ctx'> 	cdv_intel_wait_for_vblank(dev);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(dspcntr_reg, dspcntr);</div><div class='add'>+	REG_WRITE(map-&gt;cntr, dspcntr);</div><div class='ctx'> </div><div class='ctx'> 	/* Flush the plane changes */</div><div class='ctx'> 	{</div><div class='hunk'>@@ -903,58 +1130,6 @@ static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/** Loads the palette/gamma unit for the CRTC with the prepared values */</div><div class='del'>-static void cdv_intel_crtc_load_lut(struct drm_crtc *crtc)</div><div class='del'>-{</div><div class='del'>-	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	struct drm_psb_private *dev_priv =</div><div class='del'>-				(struct drm_psb_private *)dev-&gt;dev_private;</div><div class='del'>-	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='del'>-	int palreg = PALETTE_A;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* The clocks have to be on to load the palette. */</div><div class='del'>-	if (!crtc-&gt;enabled)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	switch (psb_intel_crtc-&gt;pipe) {</div><div class='del'>-	case 0:</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		palreg = PALETTE_B;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		palreg = PALETTE_C;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dev-&gt;dev, "Illegal Pipe Number.\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (gma_power_begin(dev, false)) {</div><div class='del'>-		for (i = 0; i &lt; 256; i++) {</div><div class='del'>-			REG_WRITE(palreg + 4 * i,</div><div class='del'>-				  ((psb_intel_crtc-&gt;lut_r[i] +</div><div class='del'>-				  psb_intel_crtc-&gt;lut_adj[i]) &lt;&lt; 16) |</div><div class='del'>-				  ((psb_intel_crtc-&gt;lut_g[i] +</div><div class='del'>-				  psb_intel_crtc-&gt;lut_adj[i]) &lt;&lt; 8) |</div><div class='del'>-				  (psb_intel_crtc-&gt;lut_b[i] +</div><div class='del'>-				  psb_intel_crtc-&gt;lut_adj[i]));</div><div class='del'>-		}</div><div class='del'>-		gma_power_end(dev);</div><div class='del'>-	} else {</div><div class='del'>-		for (i = 0; i &lt; 256; i++) {</div><div class='del'>-			dev_priv-&gt;regs.psb.save_palette_a[i] =</div><div class='del'>-				  ((psb_intel_crtc-&gt;lut_r[i] +</div><div class='del'>-				  psb_intel_crtc-&gt;lut_adj[i]) &lt;&lt; 16) |</div><div class='del'>-				  ((psb_intel_crtc-&gt;lut_g[i] +</div><div class='del'>-				  psb_intel_crtc-&gt;lut_adj[i]) &lt;&lt; 8) |</div><div class='del'>-				  (psb_intel_crtc-&gt;lut_b[i] +</div><div class='del'>-				  psb_intel_crtc-&gt;lut_adj[i]);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * Save HW states of giving crtc</div><div class='hunk'>@@ -962,11 +1137,10 @@ static void cdv_intel_crtc_load_lut(struct drm_crtc *crtc)</div><div class='ctx'> static void cdv_intel_crtc_save(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	/* struct drm_psb_private *dev_priv =</div><div class='del'>-			(struct drm_psb_private *)dev-&gt;dev_private; */</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	struct psb_intel_crtc_state *crtc_state = psb_intel_crtc-&gt;crtc_state;</div><div class='del'>-	int pipeA = (psb_intel_crtc-&gt;pipe == 0);</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[psb_intel_crtc-&gt;pipe];</div><div class='ctx'> 	uint32_t paletteReg;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -975,25 +1149,25 @@ static void cdv_intel_crtc_save(struct drm_crtc *crtc)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;saveDSPCNTR = REG_READ(pipeA ? DSPACNTR : DSPBCNTR);</div><div class='del'>-	crtc_state-&gt;savePIPECONF = REG_READ(pipeA ? PIPEACONF : PIPEBCONF);</div><div class='del'>-	crtc_state-&gt;savePIPESRC = REG_READ(pipeA ? PIPEASRC : PIPEBSRC);</div><div class='del'>-	crtc_state-&gt;saveFP0 = REG_READ(pipeA ? FPA0 : FPB0);</div><div class='del'>-	crtc_state-&gt;saveFP1 = REG_READ(pipeA ? FPA1 : FPB1);</div><div class='del'>-	crtc_state-&gt;saveDPLL = REG_READ(pipeA ? DPLL_A : DPLL_B);</div><div class='del'>-	crtc_state-&gt;saveHTOTAL = REG_READ(pipeA ? HTOTAL_A : HTOTAL_B);</div><div class='del'>-	crtc_state-&gt;saveHBLANK = REG_READ(pipeA ? HBLANK_A : HBLANK_B);</div><div class='del'>-	crtc_state-&gt;saveHSYNC = REG_READ(pipeA ? HSYNC_A : HSYNC_B);</div><div class='del'>-	crtc_state-&gt;saveVTOTAL = REG_READ(pipeA ? VTOTAL_A : VTOTAL_B);</div><div class='del'>-	crtc_state-&gt;saveVBLANK = REG_READ(pipeA ? VBLANK_A : VBLANK_B);</div><div class='del'>-	crtc_state-&gt;saveVSYNC = REG_READ(pipeA ? VSYNC_A : VSYNC_B);</div><div class='del'>-	crtc_state-&gt;saveDSPSTRIDE = REG_READ(pipeA ? DSPASTRIDE : DSPBSTRIDE);</div><div class='add'>+	crtc_state-&gt;saveDSPCNTR = REG_READ(map-&gt;cntr);</div><div class='add'>+	crtc_state-&gt;savePIPECONF = REG_READ(map-&gt;conf);</div><div class='add'>+	crtc_state-&gt;savePIPESRC = REG_READ(map-&gt;src);</div><div class='add'>+	crtc_state-&gt;saveFP0 = REG_READ(map-&gt;fp0);</div><div class='add'>+	crtc_state-&gt;saveFP1 = REG_READ(map-&gt;fp1);</div><div class='add'>+	crtc_state-&gt;saveDPLL = REG_READ(map-&gt;dpll);</div><div class='add'>+	crtc_state-&gt;saveHTOTAL = REG_READ(map-&gt;htotal);</div><div class='add'>+	crtc_state-&gt;saveHBLANK = REG_READ(map-&gt;hblank);</div><div class='add'>+	crtc_state-&gt;saveHSYNC = REG_READ(map-&gt;hsync);</div><div class='add'>+	crtc_state-&gt;saveVTOTAL = REG_READ(map-&gt;vtotal);</div><div class='add'>+	crtc_state-&gt;saveVBLANK = REG_READ(map-&gt;vblank);</div><div class='add'>+	crtc_state-&gt;saveVSYNC = REG_READ(map-&gt;vsync);</div><div class='add'>+	crtc_state-&gt;saveDSPSTRIDE = REG_READ(map-&gt;stride);</div><div class='ctx'> </div><div class='ctx'> 	/*NOTE: DSPSIZE DSPPOS only for psb*/</div><div class='del'>-	crtc_state-&gt;saveDSPSIZE = REG_READ(pipeA ? DSPASIZE : DSPBSIZE);</div><div class='del'>-	crtc_state-&gt;saveDSPPOS = REG_READ(pipeA ? DSPAPOS : DSPBPOS);</div><div class='add'>+	crtc_state-&gt;saveDSPSIZE = REG_READ(map-&gt;size);</div><div class='add'>+	crtc_state-&gt;saveDSPPOS = REG_READ(map-&gt;pos);</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;saveDSPBASE = REG_READ(pipeA ? DSPABASE : DSPBBASE);</div><div class='add'>+	crtc_state-&gt;saveDSPBASE = REG_READ(map-&gt;base);</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG("(%x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x)\n",</div><div class='ctx'> 			crtc_state-&gt;saveDSPCNTR,</div><div class='hunk'>@@ -1014,7 +1188,7 @@ static void cdv_intel_crtc_save(struct drm_crtc *crtc)</div><div class='ctx'> 			crtc_state-&gt;saveDSPBASE</div><div class='ctx'> 		);</div><div class='ctx'> </div><div class='del'>-	paletteReg = pipeA ? PALETTE_A : PALETTE_B;</div><div class='add'>+	paletteReg = map-&gt;palette;</div><div class='ctx'> 	for (i = 0; i &lt; 256; ++i)</div><div class='ctx'> 		crtc_state-&gt;savePalette[i] = REG_READ(paletteReg + (i &lt;&lt; 2));</div><div class='ctx'> }</div><div class='hunk'>@@ -1025,12 +1199,10 @@ static void cdv_intel_crtc_save(struct drm_crtc *crtc)</div><div class='ctx'> static void cdv_intel_crtc_restore(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	/* struct drm_psb_private * dev_priv =</div><div class='del'>-				(struct drm_psb_private *)dev-&gt;dev_private; */</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc =  to_psb_intel_crtc(crtc);</div><div class='ctx'> 	struct psb_intel_crtc_state *crtc_state = psb_intel_crtc-&gt;crtc_state;</div><div class='del'>-	/* struct drm_crtc_helper_funcs * crtc_funcs = crtc-&gt;helper_private; */</div><div class='del'>-	int pipeA = (psb_intel_crtc-&gt;pipe == 0);</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[psb_intel_crtc-&gt;pipe];</div><div class='ctx'> 	uint32_t paletteReg;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -1041,23 +1213,23 @@ static void cdv_intel_crtc_restore(struct drm_crtc *crtc)</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG(</div><div class='ctx'> 		"current:(%x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x)\n",</div><div class='del'>-		REG_READ(pipeA ? DSPACNTR : DSPBCNTR),</div><div class='del'>-		REG_READ(pipeA ? PIPEACONF : PIPEBCONF),</div><div class='del'>-		REG_READ(pipeA ? PIPEASRC : PIPEBSRC),</div><div class='del'>-		REG_READ(pipeA ? FPA0 : FPB0),</div><div class='del'>-		REG_READ(pipeA ? FPA1 : FPB1),</div><div class='del'>-		REG_READ(pipeA ? DPLL_A : DPLL_B),</div><div class='del'>-		REG_READ(pipeA ? HTOTAL_A : HTOTAL_B),</div><div class='del'>-		REG_READ(pipeA ? HBLANK_A : HBLANK_B),</div><div class='del'>-		REG_READ(pipeA ? HSYNC_A : HSYNC_B),</div><div class='del'>-		REG_READ(pipeA ? VTOTAL_A : VTOTAL_B),</div><div class='del'>-		REG_READ(pipeA ? VBLANK_A : VBLANK_B),</div><div class='del'>-		REG_READ(pipeA ? VSYNC_A : VSYNC_B),</div><div class='del'>-		REG_READ(pipeA ? DSPASTRIDE : DSPBSTRIDE),</div><div class='del'>-		REG_READ(pipeA ? DSPASIZE : DSPBSIZE),</div><div class='del'>-		REG_READ(pipeA ? DSPAPOS : DSPBPOS),</div><div class='del'>-		REG_READ(pipeA ? DSPABASE : DSPBBASE)</div><div class='del'>-		);</div><div class='add'>+		REG_READ(map-&gt;cntr),</div><div class='add'>+		REG_READ(map-&gt;conf),</div><div class='add'>+		REG_READ(map-&gt;src),</div><div class='add'>+		REG_READ(map-&gt;fp0),</div><div class='add'>+		REG_READ(map-&gt;fp1),</div><div class='add'>+		REG_READ(map-&gt;dpll),</div><div class='add'>+		REG_READ(map-&gt;htotal),</div><div class='add'>+		REG_READ(map-&gt;hblank),</div><div class='add'>+		REG_READ(map-&gt;hsync),</div><div class='add'>+		REG_READ(map-&gt;vtotal),</div><div class='add'>+		REG_READ(map-&gt;vblank),</div><div class='add'>+		REG_READ(map-&gt;vsync),</div><div class='add'>+		REG_READ(map-&gt;stride),</div><div class='add'>+		REG_READ(map-&gt;size),</div><div class='add'>+		REG_READ(map-&gt;pos),</div><div class='add'>+		REG_READ(map-&gt;base)</div><div class='add'>+	);</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG(</div><div class='ctx'> 		"saved: (%x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x)\n",</div><div class='hunk'>@@ -1077,51 +1249,51 @@ static void cdv_intel_crtc_restore(struct drm_crtc *crtc)</div><div class='ctx'> 		crtc_state-&gt;saveDSPSIZE,</div><div class='ctx'> 		crtc_state-&gt;saveDSPPOS,</div><div class='ctx'> 		crtc_state-&gt;saveDSPBASE</div><div class='del'>-		);</div><div class='add'>+	);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	if (crtc_state-&gt;saveDPLL &amp; DPLL_VCO_ENABLE) {</div><div class='del'>-		REG_WRITE(pipeA ? DPLL_A : DPLL_B,</div><div class='del'>-			crtc_state-&gt;saveDPLL &amp; ~DPLL_VCO_ENABLE);</div><div class='del'>-		REG_READ(pipeA ? DPLL_A : DPLL_B);</div><div class='add'>+		REG_WRITE(map-&gt;dpll,</div><div class='add'>+				crtc_state-&gt;saveDPLL &amp; ~DPLL_VCO_ENABLE);</div><div class='add'>+		REG_READ(map-&gt;dpll);</div><div class='ctx'> 		DRM_DEBUG("write dpll: %x\n",</div><div class='del'>-				REG_READ(pipeA ? DPLL_A : DPLL_B));</div><div class='add'>+				REG_READ(map-&gt;dpll));</div><div class='ctx'> 		udelay(150);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? FPA0 : FPB0, crtc_state-&gt;saveFP0);</div><div class='del'>-	REG_READ(pipeA ? FPA0 : FPB0);</div><div class='add'>+	REG_WRITE(map-&gt;fp0, crtc_state-&gt;saveFP0);</div><div class='add'>+	REG_READ(map-&gt;fp0);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? FPA1 : FPB1, crtc_state-&gt;saveFP1);</div><div class='del'>-	REG_READ(pipeA ? FPA1 : FPB1);</div><div class='add'>+	REG_WRITE(map-&gt;fp1, crtc_state-&gt;saveFP1);</div><div class='add'>+	REG_READ(map-&gt;fp1);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? DPLL_A : DPLL_B, crtc_state-&gt;saveDPLL);</div><div class='del'>-	REG_READ(pipeA ? DPLL_A : DPLL_B);</div><div class='add'>+	REG_WRITE(map-&gt;dpll, crtc_state-&gt;saveDPLL);</div><div class='add'>+	REG_READ(map-&gt;dpll);</div><div class='ctx'> 	udelay(150);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? HTOTAL_A : HTOTAL_B, crtc_state-&gt;saveHTOTAL);</div><div class='del'>-	REG_WRITE(pipeA ? HBLANK_A : HBLANK_B, crtc_state-&gt;saveHBLANK);</div><div class='del'>-	REG_WRITE(pipeA ? HSYNC_A : HSYNC_B, crtc_state-&gt;saveHSYNC);</div><div class='del'>-	REG_WRITE(pipeA ? VTOTAL_A : VTOTAL_B, crtc_state-&gt;saveVTOTAL);</div><div class='del'>-	REG_WRITE(pipeA ? VBLANK_A : VBLANK_B, crtc_state-&gt;saveVBLANK);</div><div class='del'>-	REG_WRITE(pipeA ? VSYNC_A : VSYNC_B, crtc_state-&gt;saveVSYNC);</div><div class='del'>-	REG_WRITE(pipeA ? DSPASTRIDE : DSPBSTRIDE, crtc_state-&gt;saveDSPSTRIDE);</div><div class='add'>+	REG_WRITE(map-&gt;htotal, crtc_state-&gt;saveHTOTAL);</div><div class='add'>+	REG_WRITE(map-&gt;hblank, crtc_state-&gt;saveHBLANK);</div><div class='add'>+	REG_WRITE(map-&gt;hsync, crtc_state-&gt;saveHSYNC);</div><div class='add'>+	REG_WRITE(map-&gt;vtotal, crtc_state-&gt;saveVTOTAL);</div><div class='add'>+	REG_WRITE(map-&gt;vblank, crtc_state-&gt;saveVBLANK);</div><div class='add'>+	REG_WRITE(map-&gt;vsync, crtc_state-&gt;saveVSYNC);</div><div class='add'>+	REG_WRITE(map-&gt;stride, crtc_state-&gt;saveDSPSTRIDE);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? DSPASIZE : DSPBSIZE, crtc_state-&gt;saveDSPSIZE);</div><div class='del'>-	REG_WRITE(pipeA ? DSPAPOS : DSPBPOS, crtc_state-&gt;saveDSPPOS);</div><div class='add'>+	REG_WRITE(map-&gt;size, crtc_state-&gt;saveDSPSIZE);</div><div class='add'>+	REG_WRITE(map-&gt;pos, crtc_state-&gt;saveDSPPOS);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? PIPEASRC : PIPEBSRC, crtc_state-&gt;savePIPESRC);</div><div class='del'>-	REG_WRITE(pipeA ? DSPABASE : DSPBBASE, crtc_state-&gt;saveDSPBASE);</div><div class='del'>-	REG_WRITE(pipeA ? PIPEACONF : PIPEBCONF, crtc_state-&gt;savePIPECONF);</div><div class='add'>+	REG_WRITE(map-&gt;src, crtc_state-&gt;savePIPESRC);</div><div class='add'>+	REG_WRITE(map-&gt;base, crtc_state-&gt;saveDSPBASE);</div><div class='add'>+	REG_WRITE(map-&gt;conf, crtc_state-&gt;savePIPECONF);</div><div class='ctx'> </div><div class='ctx'> 	cdv_intel_wait_for_vblank(dev);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? DSPACNTR : DSPBCNTR, crtc_state-&gt;saveDSPCNTR);</div><div class='del'>-	REG_WRITE(pipeA ? DSPABASE : DSPBBASE, crtc_state-&gt;saveDSPBASE);</div><div class='add'>+	REG_WRITE(map-&gt;cntr, crtc_state-&gt;saveDSPCNTR);</div><div class='add'>+	REG_WRITE(map-&gt;base, crtc_state-&gt;saveDSPBASE);</div><div class='ctx'> </div><div class='ctx'> 	cdv_intel_wait_for_vblank(dev);</div><div class='ctx'> </div><div class='del'>-	paletteReg = pipeA ? PALETTE_A : PALETTE_B;</div><div class='add'>+	paletteReg = map-&gt;palette;</div><div class='ctx'> 	for (i = 0; i &lt; 256; ++i)</div><div class='ctx'> 		REG_WRITE(paletteReg + (i &lt;&lt; 2), crtc_state-&gt;savePalette[i]);</div><div class='ctx'> }</div><div class='hunk'>@@ -1296,35 +1468,30 @@ static void i8xx_clock(int refclk, struct cdv_intel_clock_t *clock)</div><div class='ctx'> static int cdv_intel_crtc_clock_get(struct drm_device *dev,</div><div class='ctx'> 				struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	u32 dpll;</div><div class='ctx'> 	u32 fp;</div><div class='ctx'> 	struct cdv_intel_clock_t clock;</div><div class='ctx'> 	bool is_lvds;</div><div class='del'>-	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct psb_pipe *p = &amp;dev_priv-&gt;regs.pipe[pipe];</div><div class='ctx'> </div><div class='ctx'> 	if (gma_power_begin(dev, false)) {</div><div class='del'>-		dpll = REG_READ((pipe == 0) ? DPLL_A : DPLL_B);</div><div class='add'>+		dpll = REG_READ(map-&gt;dpll);</div><div class='ctx'> 		if ((dpll &amp; DISPLAY_RATE_SELECT_FPA1) == 0)</div><div class='del'>-			fp = REG_READ((pipe == 0) ? FPA0 : FPB0);</div><div class='add'>+			fp = REG_READ(map-&gt;fp0);</div><div class='ctx'> 		else</div><div class='del'>-			fp = REG_READ((pipe == 0) ? FPA1 : FPB1);</div><div class='add'>+			fp = REG_READ(map-&gt;fp1);</div><div class='ctx'> 		is_lvds = (pipe == 1) &amp;&amp; (REG_READ(LVDS) &amp; LVDS_PORT_EN);</div><div class='ctx'> 		gma_power_end(dev);</div><div class='ctx'> 	} else {</div><div class='del'>-		dpll = (pipe == 0) ?</div><div class='del'>-			dev_priv-&gt;regs.psb.saveDPLL_A :</div><div class='del'>-			dev_priv-&gt;regs.psb.saveDPLL_B;</div><div class='del'>-</div><div class='add'>+		dpll = p-&gt;dpll;</div><div class='ctx'> 		if ((dpll &amp; DISPLAY_RATE_SELECT_FPA1) == 0)</div><div class='del'>-			fp = (pipe == 0) ?</div><div class='del'>-				dev_priv-&gt;regs.psb.saveFPA0 :</div><div class='del'>-				dev_priv-&gt;regs.psb.saveFPB0;</div><div class='add'>+			fp = p-&gt;fp0;</div><div class='ctx'> 		else</div><div class='del'>-			fp = (pipe == 0) ?</div><div class='del'>-				dev_priv-&gt;regs.psb.saveFPA1 :</div><div class='del'>-				dev_priv-&gt;regs.psb.saveFPB1;</div><div class='add'>+			fp = p-&gt;fp1;</div><div class='ctx'> </div><div class='ctx'> 		is_lvds = (pipe == 1) &amp;&amp;</div><div class='ctx'> 				(dev_priv-&gt;regs.psb.saveLVDS &amp; LVDS_PORT_EN);</div><div class='hunk'>@@ -1382,32 +1549,26 @@ struct drm_display_mode *cdv_intel_crtc_mode_get(struct drm_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct psb_pipe *p = &amp;dev_priv-&gt;regs.pipe[pipe];</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	struct drm_display_mode *mode;</div><div class='ctx'> 	int htot;</div><div class='ctx'> 	int hsync;</div><div class='ctx'> 	int vtot;</div><div class='ctx'> 	int vsync;</div><div class='del'>-	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> </div><div class='ctx'> 	if (gma_power_begin(dev, false)) {</div><div class='del'>-		htot = REG_READ((pipe == 0) ? HTOTAL_A : HTOTAL_B);</div><div class='del'>-		hsync = REG_READ((pipe == 0) ? HSYNC_A : HSYNC_B);</div><div class='del'>-		vtot = REG_READ((pipe == 0) ? VTOTAL_A : VTOTAL_B);</div><div class='del'>-		vsync = REG_READ((pipe == 0) ? VSYNC_A : VSYNC_B);</div><div class='add'>+		htot = REG_READ(map-&gt;htotal);</div><div class='add'>+		hsync = REG_READ(map-&gt;hsync);</div><div class='add'>+		vtot = REG_READ(map-&gt;vtotal);</div><div class='add'>+		vsync = REG_READ(map-&gt;vsync);</div><div class='ctx'> 		gma_power_end(dev);</div><div class='ctx'> 	} else {</div><div class='del'>-		htot = (pipe == 0) ?</div><div class='del'>-			dev_priv-&gt;regs.psb.saveHTOTAL_A :</div><div class='del'>-			dev_priv-&gt;regs.psb.saveHTOTAL_B;</div><div class='del'>-		hsync = (pipe == 0) ?</div><div class='del'>-			dev_priv-&gt;regs.psb.saveHSYNC_A :</div><div class='del'>-			dev_priv-&gt;regs.psb.saveHSYNC_B;</div><div class='del'>-		vtot = (pipe == 0) ?</div><div class='del'>-			dev_priv-&gt;regs.psb.saveVTOTAL_A :</div><div class='del'>-			dev_priv-&gt;regs.psb.saveVTOTAL_B;</div><div class='del'>-		vsync = (pipe == 0) ?</div><div class='del'>-			dev_priv-&gt;regs.psb.saveVSYNC_A :</div><div class='del'>-			dev_priv-&gt;regs.psb.saveVSYNC_B;</div><div class='add'>+		htot = p-&gt;htotal;</div><div class='add'>+		hsync = p-&gt;hsync;</div><div class='add'>+		vtot = p-&gt;vtotal;</div><div class='add'>+		vsync = p-&gt;vsync;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mode = kzalloc(sizeof(*mode), GFP_KERNEL);</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c<br/>index 8d5269555005..88b59d4a7b7f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/cdv_intel_hdmi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/cdv_intel_hdmi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/cdv_intel_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/cdv_intel_hdmi.c</a></div><div class='hunk'>@@ -242,8 +242,6 @@ static int cdv_hdmi_get_modes(struct drm_connector *connector)</div><div class='ctx'> static int cdv_hdmi_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 				 struct drm_display_mode *mode)</div><div class='ctx'> {</div><div class='del'>-	struct drm_psb_private *dev_priv = connector-&gt;dev-&gt;dev_private;</div><div class='del'>-</div><div class='ctx'> 	if (mode-&gt;clock &gt; 165000)</div><div class='ctx'> 		return MODE_CLOCK_HIGH;</div><div class='ctx'> 	if (mode-&gt;clock &lt; 20000)</div><div class='hunk'>@@ -257,11 +255,6 @@ static int cdv_hdmi_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 	if (mode-&gt;flags &amp; DRM_MODE_FLAG_INTERLACE)</div><div class='ctx'> 		return MODE_NO_INTERLACE;</div><div class='ctx'> </div><div class='del'>-	/* We assume worst case scenario of 32 bpp here, since we don't know */</div><div class='del'>-	if ((ALIGN(mode-&gt;hdisplay * 4, 64) * mode-&gt;vdisplay) &gt;</div><div class='del'>-	    dev_priv-&gt;vram_stolen_size)</div><div class='del'>-		return MODE_MEM;</div><div class='del'>-</div><div class='ctx'> 	return MODE_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/gma500/cdv_intel_lvds.c b/drivers/gpu/drm/gma500/cdv_intel_lvds.c<br/>index 8359c1a3f45f..ff5b58eb878c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/cdv_intel_lvds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/cdv_intel_lvds.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/cdv_intel_lvds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/cdv_intel_lvds.c</a></div><div class='hunk'>@@ -356,6 +356,8 @@ static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(</div><div class='add'>+							encoder-&gt;crtc);</div><div class='ctx'> 	u32 pfit_control;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -377,6 +379,8 @@ static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,</div><div class='ctx'> 	else</div><div class='ctx'> 		pfit_control = 0;</div><div class='ctx'> </div><div class='add'>+	pfit_control |= psb_intel_crtc-&gt;pipe &lt;&lt; PFIT_PIPE_SHIFT;</div><div class='add'>+</div><div class='ctx'> 	if (dev_priv-&gt;lvds_dither)</div><div class='ctx'> 		pfit_control |= PANEL_8TO6_DITHER_ENABLE;</div><div class='ctx'> </div><div class='hunk'>@@ -552,10 +556,60 @@ static void cdv_intel_lvds_enc_destroy(struct drm_encoder *encoder)</div><div class='ctx'> 	drm_encoder_cleanup(encoder);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-const struct drm_encoder_funcs cdv_intel_lvds_enc_funcs = {</div><div class='add'>+static const struct drm_encoder_funcs cdv_intel_lvds_enc_funcs = {</div><div class='ctx'> 	.destroy = cdv_intel_lvds_enc_destroy,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Enumerate the child dev array parsed from VBT to check whether</div><div class='add'>+ * the LVDS is present.</div><div class='add'>+ * If it is present, return 1.</div><div class='add'>+ * If it is not present, return false.</div><div class='add'>+ * If no child dev is parsed from VBT, it assumes that the LVDS is present.</div><div class='add'>+ */</div><div class='add'>+static bool lvds_is_present_in_vbt(struct drm_device *dev,</div><div class='add'>+				   u8 *i2c_pin)</div><div class='add'>+{</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!dev_priv-&gt;child_dev_num)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev_priv-&gt;child_dev_num; i++) {</div><div class='add'>+		struct child_device_config *child = dev_priv-&gt;child_dev + i;</div><div class='add'>+</div><div class='add'>+		/* If the device type is not LFP, continue.</div><div class='add'>+		 * We have to check both the new identifiers as well as the</div><div class='add'>+		 * old for compatibility with some BIOSes.</div><div class='add'>+		 */</div><div class='add'>+		if (child-&gt;device_type != DEVICE_TYPE_INT_LFP &amp;&amp;</div><div class='add'>+		    child-&gt;device_type != DEVICE_TYPE_LFP)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (child-&gt;i2c_pin)</div><div class='add'>+		    *i2c_pin = child-&gt;i2c_pin;</div><div class='add'>+</div><div class='add'>+		/* However, we cannot trust the BIOS writers to populate</div><div class='add'>+		 * the VBT correctly.  Since LVDS requires additional</div><div class='add'>+		 * information from AIM blocks, a non-zero addin offset is</div><div class='add'>+		 * a good indicator that the LVDS is actually present.</div><div class='add'>+		 */</div><div class='add'>+		if (child-&gt;addin_offset)</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		/* But even then some BIOS writers perform some black magic</div><div class='add'>+		 * and instantiate the device without reference to any</div><div class='add'>+		 * additional data.  Trust that if the VBT was written into</div><div class='add'>+		 * the OpRegion then they have validated the LVDS's existence.</div><div class='add'>+		 */</div><div class='add'>+		if (dev_priv-&gt;opregion.vbt)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * cdv_intel_lvds_init - setup LVDS connectors on this device</div><div class='ctx'>  * @dev: drm device</div><div class='hunk'>@@ -576,6 +630,13 @@ void cdv_intel_lvds_init(struct drm_device *dev,</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	u32 lvds;</div><div class='ctx'> 	int pipe;</div><div class='add'>+	u8 pin;</div><div class='add'>+</div><div class='add'>+	pin = GMBUS_PORT_PANEL;</div><div class='add'>+	if (!lvds_is_present_in_vbt(dev, &amp;pin)) {</div><div class='add'>+		DRM_DEBUG_KMS("LVDS is not present in VBT\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder),</div><div class='ctx'> 				    GFP_KERNEL);</div><div class='hunk'>@@ -710,6 +771,19 @@ void cdv_intel_lvds_init(struct drm_device *dev,</div><div class='ctx'> 		goto failed_find;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* setup PWM */</div><div class='add'>+	{</div><div class='add'>+		u32 pwm;</div><div class='add'>+</div><div class='add'>+		pwm = REG_READ(BLC_PWM_CTL2);</div><div class='add'>+		if (pipe == 1)</div><div class='add'>+			pwm |= PWM_PIPE_B;</div><div class='add'>+		else</div><div class='add'>+			pwm &amp;= ~PWM_PIPE_B;</div><div class='add'>+		pwm |= PWM_ENABLE;</div><div class='add'>+		REG_WRITE(BLC_PWM_CTL2, pwm);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> out:</div><div class='ctx'> 	drm_sysfs_connector_add(connector);</div><div class='ctx'> 	return;</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/framebuffer.c b/drivers/gpu/drm/gma500/framebuffer.c<br/>index 8ea202f1ba50..5732b5702e1c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/framebuffer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/framebuffer.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/framebuffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/framebuffer.c</a></div><div class='hunk'>@@ -153,7 +153,7 @@ static void psbfb_vm_close(struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct vm_operations_struct psbfb_vm_ops = {</div><div class='add'>+static const struct vm_operations_struct psbfb_vm_ops = {</div><div class='ctx'> 	.fault	= psbfb_vm_fault,</div><div class='ctx'> 	.open	= psbfb_vm_open,</div><div class='ctx'> 	.close	= psbfb_vm_close</div><div class='hunk'>@@ -408,6 +408,8 @@ static int psbfb_create(struct psb_fbdev *fbdev,</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	memset(dev_priv-&gt;vram_addr + backing-&gt;offset, 0, size);</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='ctx'> 	info = framebuffer_alloc(0, device);</div><div class='hunk'>@@ -453,8 +455,7 @@ static int psbfb_create(struct psb_fbdev *fbdev,</div><div class='ctx'> 	info-&gt;fix.ypanstep = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Accessed stolen memory directly */</div><div class='del'>-	info-&gt;screen_base = (char *)dev_priv-&gt;vram_addr +</div><div class='del'>-							backing-&gt;offset;</div><div class='add'>+	info-&gt;screen_base = dev_priv-&gt;vram_addr + backing-&gt;offset;</div><div class='ctx'> 	info-&gt;screen_size = size;</div><div class='ctx'> </div><div class='ctx'> 	if (dev_priv-&gt;gtt.stolen_size) {</div><div class='hunk'>@@ -475,7 +476,7 @@ static int psbfb_create(struct psb_fbdev *fbdev,</div><div class='ctx'> </div><div class='ctx'> 	/* Use default scratch pixmap (info-&gt;pixmap.flags = FB_PIXMAP_SYSTEM) */</div><div class='ctx'> </div><div class='del'>-	dev_info(dev-&gt;dev, "allocated %dx%d fb\n",</div><div class='add'>+	dev_dbg(dev-&gt;dev, "allocated %dx%d fb\n",</div><div class='ctx'> 					psbfb-&gt;base.width, psbfb-&gt;base.height);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='hunk'>@@ -543,9 +544,25 @@ static int psbfb_probe(struct drm_fb_helper *helper,</div><div class='ctx'> 				struct drm_fb_helper_surface_size *sizes)</div><div class='ctx'> {</div><div class='ctx'> 	struct psb_fbdev *psb_fbdev = (struct psb_fbdev *)helper;</div><div class='add'>+	struct drm_device *dev = psb_fbdev-&gt;psb_fb_helper.dev;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	int new_fb = 0;</div><div class='add'>+	int bytespp;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	bytespp = sizes-&gt;surface_bpp / 8;</div><div class='add'>+	if (bytespp == 3)	/* no 24bit packed */</div><div class='add'>+		bytespp = 4;</div><div class='add'>+</div><div class='add'>+	/* If the mode will not fit in 32bit then switch to 16bit to get</div><div class='add'>+	   a console on full resolution. The X mode setting server will</div><div class='add'>+	   allocate its own 32bit GEM framebuffer */</div><div class='add'>+	if (ALIGN(sizes-&gt;fb_width * bytespp, 64) * sizes-&gt;fb_height &gt;</div><div class='add'>+	                dev_priv-&gt;vram_stolen_size) {</div><div class='add'>+                sizes-&gt;surface_bpp = 16;</div><div class='add'>+                sizes-&gt;surface_depth = 16;</div><div class='add'>+        }</div><div class='add'>+</div><div class='ctx'> 	if (!helper-&gt;fb) {</div><div class='ctx'> 		ret = psbfb_create(psb_fbdev, sizes);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -555,7 +572,7 @@ static int psbfb_probe(struct drm_fb_helper *helper,</div><div class='ctx'> 	return new_fb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct drm_fb_helper_funcs psb_fb_helper_funcs = {</div><div class='add'>+static struct drm_fb_helper_funcs psb_fb_helper_funcs = {</div><div class='ctx'> 	.gamma_set = psbfb_gamma_set,</div><div class='ctx'> 	.gamma_get = psbfb_gamma_get,</div><div class='ctx'> 	.fb_probe = psbfb_probe,</div><div class='hunk'>@@ -732,10 +749,7 @@ static void psb_setup_outputs(struct drm_device *dev)</div><div class='ctx'> 			clone_mask = (1 &lt;&lt; INTEL_OUTPUT_SDVO);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case INTEL_OUTPUT_LVDS:</div><div class='del'>-			if (IS_MRST(dev))</div><div class='del'>-				crtc_mask = (1 &lt;&lt; 0);</div><div class='del'>-			else</div><div class='del'>-				crtc_mask = (1 &lt;&lt; 1);</div><div class='add'>+		        crtc_mask = dev_priv-&gt;ops-&gt;lvds_mask;</div><div class='ctx'> 			clone_mask = (1 &lt;&lt; INTEL_OUTPUT_LVDS);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case INTEL_OUTPUT_MIPI:</div><div class='hunk'>@@ -747,10 +761,7 @@ static void psb_setup_outputs(struct drm_device *dev)</div><div class='ctx'> 			clone_mask = (1 &lt;&lt; INTEL_OUTPUT_MIPI2);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case INTEL_OUTPUT_HDMI:</div><div class='del'>-			if (IS_MFLD(dev))</div><div class='del'>-				crtc_mask = (1 &lt;&lt; 1);</div><div class='del'>-			else	</div><div class='del'>-				crtc_mask = (1 &lt;&lt; 0);</div><div class='add'>+		        crtc_mask = dev_priv-&gt;ops-&gt;hdmi_mask;</div><div class='ctx'> 			clone_mask = (1 &lt;&lt; INTEL_OUTPUT_HDMI);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -771,7 +782,7 @@ void psb_modeset_init(struct drm_device *dev)</div><div class='ctx'> 	dev-&gt;mode_config.min_width = 0;</div><div class='ctx'> 	dev-&gt;mode_config.min_height = 0;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;mode_config.funcs = (void *) &amp;psb_mode_funcs;</div><div class='add'>+	dev-&gt;mode_config.funcs = &amp;psb_mode_funcs;</div><div class='ctx'> </div><div class='ctx'> 	/* set memory base */</div><div class='ctx'> 	/* Oaktrail and Poulsbo should use BAR 2*/</div><div class='hunk'>@@ -786,15 +797,23 @@ void psb_modeset_init(struct drm_device *dev)</div><div class='ctx'> 	dev-&gt;mode_config.max_height = 2048;</div><div class='ctx'> </div><div class='ctx'> 	psb_setup_outputs(dev);</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;ops-&gt;errata)</div><div class='add'>+	        dev_priv-&gt;ops-&gt;errata(dev);</div><div class='add'>+</div><div class='add'>+        dev_priv-&gt;modeset = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void psb_modeset_cleanup(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	if (dev_priv-&gt;modeset) {</div><div class='add'>+		mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='del'>-	drm_kms_helper_poll_fini(dev);</div><div class='del'>-	psb_fbdev_fini(dev);</div><div class='del'>-	drm_mode_config_cleanup(dev);</div><div class='add'>+		drm_kms_helper_poll_fini(dev);</div><div class='add'>+		psb_fbdev_fini(dev);</div><div class='add'>+		drm_mode_config_cleanup(dev);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/gem.c b/drivers/gpu/drm/gma500/gem.c<br/>index 9fbb86868e2e..fc7d144bc2d3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/gem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/gem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/gem.c</a></div><div class='hunk'>@@ -124,6 +124,8 @@ static int psb_gem_create(struct drm_file *file,</div><div class='ctx'> 		dev_err(dev-&gt;dev, "GEM init failed for %lld\n", size);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='add'>+	/* Limit the object to 32bit mappings */</div><div class='add'>+	mapping_set_gfp_mask(r-&gt;gem.filp-&gt;f_mapping, GFP_KERNEL | __GFP_DMA32);</div><div class='ctx'> 	/* Give the object a handle so we can carry it more easily */</div><div class='ctx'> 	ret = drm_gem_handle_create(file, &amp;r-&gt;gem, &amp;handle);</div><div class='ctx'> 	if (ret) {</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/gtt.c b/drivers/gpu/drm/gma500/gtt.c<br/>index c6465b40090f..04a371aceb34 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/gtt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/gtt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/gtt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/gtt.c</a></div><div class='hunk'>@@ -39,6 +39,10 @@ static inline uint32_t psb_gtt_mask_pte(uint32_t pfn, int type)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t mask = PSB_PTE_VALID;</div><div class='ctx'> </div><div class='add'>+	/* Ensure we explode rather than put an invalid low mapping of</div><div class='add'>+	   a high mapping page into the gtt */</div><div class='add'>+	BUG_ON(pfn &amp; ~(0xFFFFFFFF &gt;&gt; PAGE_SHIFT));</div><div class='add'>+</div><div class='ctx'> 	if (type &amp; PSB_MMU_CACHED_MEMORY)</div><div class='ctx'> 		mask |= PSB_PTE_CACHED;</div><div class='ctx'> 	if (type &amp; PSB_MMU_RO_MEMORY)</div><div class='hunk'>@@ -57,7 +61,7 @@ static inline uint32_t psb_gtt_mask_pte(uint32_t pfn, int type)</div><div class='ctx'>  *	Given a gtt_range object return the GTT offset of the page table</div><div class='ctx'>  *	entries for this gtt_range</div><div class='ctx'>  */</div><div class='del'>-static u32 *psb_gtt_entry(struct drm_device *dev, struct gtt_range *r)</div><div class='add'>+static u32 __iomem *psb_gtt_entry(struct drm_device *dev, struct gtt_range *r)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	unsigned long offset;</div><div class='hunk'>@@ -78,7 +82,8 @@ static u32 *psb_gtt_entry(struct drm_device *dev, struct gtt_range *r)</div><div class='ctx'>  */</div><div class='ctx'> static int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r)</div><div class='ctx'> {</div><div class='del'>-	u32 *gtt_slot, pte;</div><div class='add'>+	u32 __iomem *gtt_slot;</div><div class='add'>+	u32 pte;</div><div class='ctx'> 	struct page **pages;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -93,7 +98,7 @@ static int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r)</div><div class='ctx'> 	pages = r-&gt;pages;</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure changes are visible to the GPU */</div><div class='del'>-	set_pages_array_uc(pages, r-&gt;npage);</div><div class='add'>+	set_pages_array_wc(pages, r-&gt;npage);</div><div class='ctx'> </div><div class='ctx'> 	/* Write our page entries into the GTT itself */</div><div class='ctx'> 	for (i = r-&gt;roll; i &lt; r-&gt;npage; i++) {</div><div class='hunk'>@@ -122,7 +127,8 @@ static int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r)</div><div class='ctx'> static void psb_gtt_remove(struct drm_device *dev, struct gtt_range *r)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 *gtt_slot, pte;</div><div class='add'>+	u32 __iomem *gtt_slot;</div><div class='add'>+	u32 pte;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(r-&gt;stolen);</div><div class='hunk'>@@ -148,7 +154,8 @@ static void psb_gtt_remove(struct drm_device *dev, struct gtt_range *r)</div><div class='ctx'>  */</div><div class='ctx'> void psb_gtt_roll(struct drm_device *dev, struct gtt_range *r, int roll)</div><div class='ctx'> {</div><div class='del'>-	u32 *gtt_slot, pte;</div><div class='add'>+	u32 __iomem *gtt_slot;</div><div class='add'>+	u32 pte;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (roll &gt;= r-&gt;npage) {</div><div class='hunk'>@@ -409,8 +416,6 @@ int psb_gtt_init(struct drm_device *dev, int resume)</div><div class='ctx'> 	unsigned long stolen_size, vram_stolen_size;</div><div class='ctx'> 	unsigned i, num_pages;</div><div class='ctx'> 	unsigned pfn_base;</div><div class='del'>-	uint32_t vram_pages;</div><div class='del'>-	uint32_t dvmt_mode = 0;</div><div class='ctx'> 	struct psb_gtt *pg;</div><div class='ctx'> </div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -483,13 +488,8 @@ int psb_gtt_init(struct drm_device *dev, int resume)</div><div class='ctx'> </div><div class='ctx'> 	stolen_size = vram_stolen_size;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "Stolen memory information\n");</div><div class='del'>-	printk(KERN_INFO "       base in RAM: 0x%x\n", dev_priv-&gt;stolen_base);</div><div class='del'>-	printk(KERN_INFO "       size: %luK, calculated by (GTT RAM base) - (Stolen base), seems wrong\n",</div><div class='del'>-		vram_stolen_size/1024);</div><div class='del'>-	dvmt_mode = (dev_priv-&gt;gmch_ctrl &gt;&gt; 4) &amp; 0x7;</div><div class='del'>-	printk(KERN_INFO "      the correct size should be: %dM(dvmt mode=%d)\n",</div><div class='del'>-		(dvmt_mode == 1) ? 1 : (2 &lt;&lt; (dvmt_mode - 1)), dvmt_mode);</div><div class='add'>+	dev_dbg(dev-&gt;dev, "Stolen memory base 0x%x, size %luK\n",</div><div class='add'>+			dev_priv-&gt;stolen_base, vram_stolen_size / 1024);</div><div class='ctx'> </div><div class='ctx'> 	if (resume &amp;&amp; (gtt_pages != pg-&gt;gtt_pages) &amp;&amp;</div><div class='ctx'> 	    (stolen_size != pg-&gt;stolen_size)) {</div><div class='hunk'>@@ -525,8 +525,8 @@ int psb_gtt_init(struct drm_device *dev, int resume)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	pfn_base = dev_priv-&gt;stolen_base &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	vram_pages = num_pages = vram_stolen_size &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	printk(KERN_INFO"Set up %d stolen pages starting at 0x%08x, GTT offset %dK\n",</div><div class='add'>+	num_pages = vram_stolen_size &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	dev_dbg(dev-&gt;dev, "Set up %d stolen pages starting at 0x%08x, GTT offset %dK\n",</div><div class='ctx'> 		num_pages, pfn_base &lt;&lt; PAGE_SHIFT, 0);</div><div class='ctx'> 	for (i = 0; i &lt; num_pages; ++i) {</div><div class='ctx'> 		pte = psb_gtt_mask_pte(pfn_base + i, 0);</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/intel_bios.c b/drivers/gpu/drm/gma500/intel_bios.c<br/>index d4d0c5b8bf91..973d7f6d66b7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/intel_bios.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/intel_bios.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/intel_bios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/intel_bios.c</a></div><div class='hunk'>@@ -26,6 +26,8 @@</div><div class='ctx'> #include "psb_intel_reg.h"</div><div class='ctx'> #include "intel_bios.h"</div><div class='ctx'> </div><div class='add'>+#define	SLAVE_ADDR1	0x70</div><div class='add'>+#define	SLAVE_ADDR2	0x72</div><div class='ctx'> </div><div class='ctx'> static void *find_section(struct bdb_header *bdb, int section_id)</div><div class='ctx'> {</div><div class='hunk'>@@ -52,6 +54,16 @@ static void *find_section(struct bdb_header *bdb, int section_id)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u16</div><div class='add'>+get_blocksize(void *p)</div><div class='add'>+{</div><div class='add'>+	u16 *block_ptr, block_size;</div><div class='add'>+</div><div class='add'>+	block_ptr = (u16 *)((char *)p - 2);</div><div class='add'>+	block_size = *block_ptr;</div><div class='add'>+	return block_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,</div><div class='ctx'> 			struct lvds_dvo_timing *dvo_timing)</div><div class='ctx'> {</div><div class='hunk'>@@ -75,6 +87,16 @@ static void fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,</div><div class='ctx'> 	panel_fixed_mode-&gt;clock = dvo_timing-&gt;clock * 10;</div><div class='ctx'> 	panel_fixed_mode-&gt;type = DRM_MODE_TYPE_PREFERRED;</div><div class='ctx'> </div><div class='add'>+	if (dvo_timing-&gt;hsync_positive)</div><div class='add'>+		panel_fixed_mode-&gt;flags |= DRM_MODE_FLAG_PHSYNC;</div><div class='add'>+	else</div><div class='add'>+		panel_fixed_mode-&gt;flags |= DRM_MODE_FLAG_NHSYNC;</div><div class='add'>+</div><div class='add'>+	if (dvo_timing-&gt;vsync_positive)</div><div class='add'>+		panel_fixed_mode-&gt;flags |= DRM_MODE_FLAG_PVSYNC;</div><div class='add'>+	else</div><div class='add'>+		panel_fixed_mode-&gt;flags |= DRM_MODE_FLAG_NVSYNC;</div><div class='add'>+</div><div class='ctx'> 	/* Some VBTs have bogus h/vtotal values */</div><div class='ctx'> 	if (panel_fixed_mode-&gt;hsync_end &gt; panel_fixed_mode-&gt;htotal)</div><div class='ctx'> 		panel_fixed_mode-&gt;htotal = panel_fixed_mode-&gt;hsync_end + 1;</div><div class='hunk'>@@ -217,6 +239,180 @@ static void parse_general_features(struct drm_psb_private *dev_priv,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+parse_sdvo_device_mapping(struct drm_psb_private *dev_priv,</div><div class='add'>+			  struct bdb_header *bdb)</div><div class='add'>+{</div><div class='add'>+	struct sdvo_device_mapping *p_mapping;</div><div class='add'>+	struct bdb_general_definitions *p_defs;</div><div class='add'>+	struct child_device_config *p_child;</div><div class='add'>+	int i, child_device_num, count;</div><div class='add'>+	u16	block_size;</div><div class='add'>+</div><div class='add'>+	p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);</div><div class='add'>+	if (!p_defs) {</div><div class='add'>+		DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	/* judge whether the size of child device meets the requirements.</div><div class='add'>+	 * If the child device size obtained from general definition block</div><div class='add'>+	 * is different with sizeof(struct child_device_config), skip the</div><div class='add'>+	 * parsing of sdvo device info</div><div class='add'>+	 */</div><div class='add'>+	if (p_defs-&gt;child_dev_size != sizeof(*p_child)) {</div><div class='add'>+		/* different child dev size . Ignore it */</div><div class='add'>+		DRM_DEBUG_KMS("different child size is found. Invalid.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	/* get the block size of general definitions */</div><div class='add'>+	block_size = get_blocksize(p_defs);</div><div class='add'>+	/* get the number of child device */</div><div class='add'>+	child_device_num = (block_size - sizeof(*p_defs)) /</div><div class='add'>+				sizeof(*p_child);</div><div class='add'>+	count = 0;</div><div class='add'>+	for (i = 0; i &lt; child_device_num; i++) {</div><div class='add'>+		p_child = &amp;(p_defs-&gt;devices[i]);</div><div class='add'>+		if (!p_child-&gt;device_type) {</div><div class='add'>+			/* skip the device block if device type is invalid */</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		if (p_child-&gt;slave_addr != SLAVE_ADDR1 &amp;&amp;</div><div class='add'>+			p_child-&gt;slave_addr != SLAVE_ADDR2) {</div><div class='add'>+			/*</div><div class='add'>+			 * If the slave address is neither 0x70 nor 0x72,</div><div class='add'>+			 * it is not a SDVO device. Skip it.</div><div class='add'>+			 */</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		if (p_child-&gt;dvo_port != DEVICE_PORT_DVOB &amp;&amp;</div><div class='add'>+			p_child-&gt;dvo_port != DEVICE_PORT_DVOC) {</div><div class='add'>+			/* skip the incorrect SDVO port */</div><div class='add'>+			DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"</div><div class='add'>+				" %s port\n",</div><div class='add'>+				p_child-&gt;slave_addr,</div><div class='add'>+				(p_child-&gt;dvo_port == DEVICE_PORT_DVOB) ?</div><div class='add'>+					"SDVOB" : "SDVOC");</div><div class='add'>+		p_mapping = &amp;(dev_priv-&gt;sdvo_mappings[p_child-&gt;dvo_port - 1]);</div><div class='add'>+		if (!p_mapping-&gt;initialized) {</div><div class='add'>+			p_mapping-&gt;dvo_port = p_child-&gt;dvo_port;</div><div class='add'>+			p_mapping-&gt;slave_addr = p_child-&gt;slave_addr;</div><div class='add'>+			p_mapping-&gt;dvo_wiring = p_child-&gt;dvo_wiring;</div><div class='add'>+			p_mapping-&gt;ddc_pin = p_child-&gt;ddc_pin;</div><div class='add'>+			p_mapping-&gt;i2c_pin = p_child-&gt;i2c_pin;</div><div class='add'>+			p_mapping-&gt;initialized = 1;</div><div class='add'>+			DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",</div><div class='add'>+				      p_mapping-&gt;dvo_port,</div><div class='add'>+				      p_mapping-&gt;slave_addr,</div><div class='add'>+				      p_mapping-&gt;dvo_wiring,</div><div class='add'>+				      p_mapping-&gt;ddc_pin,</div><div class='add'>+				      p_mapping-&gt;i2c_pin);</div><div class='add'>+		} else {</div><div class='add'>+			DRM_DEBUG_KMS("Maybe one SDVO port is shared by "</div><div class='add'>+					 "two SDVO device.\n");</div><div class='add'>+		}</div><div class='add'>+		if (p_child-&gt;slave2_addr) {</div><div class='add'>+			/* Maybe this is a SDVO device with multiple inputs */</div><div class='add'>+			/* And the mapping info is not added */</div><div class='add'>+			DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"</div><div class='add'>+				" is a SDVO device with multiple inputs.\n");</div><div class='add'>+		}</div><div class='add'>+		count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!count) {</div><div class='add'>+		/* No SDVO device info is found */</div><div class='add'>+		DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");</div><div class='add'>+	}</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+parse_driver_features(struct drm_psb_private *dev_priv,</div><div class='add'>+		      struct bdb_header *bdb)</div><div class='add'>+{</div><div class='add'>+	struct bdb_driver_features *driver;</div><div class='add'>+</div><div class='add'>+	driver = find_section(bdb, BDB_DRIVER_FEATURES);</div><div class='add'>+	if (!driver)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* This bit means to use 96Mhz for DPLL_A or not */</div><div class='add'>+	if (driver-&gt;primary_lfp_id)</div><div class='add'>+		dev_priv-&gt;dplla_96mhz = true;</div><div class='add'>+	else</div><div class='add'>+		dev_priv-&gt;dplla_96mhz = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+parse_device_mapping(struct drm_psb_private *dev_priv,</div><div class='add'>+		       struct bdb_header *bdb)</div><div class='add'>+{</div><div class='add'>+	struct bdb_general_definitions *p_defs;</div><div class='add'>+	struct child_device_config *p_child, *child_dev_ptr;</div><div class='add'>+	int i, child_device_num, count;</div><div class='add'>+	u16	block_size;</div><div class='add'>+</div><div class='add'>+	p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);</div><div class='add'>+	if (!p_defs) {</div><div class='add'>+		DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	/* judge whether the size of child device meets the requirements.</div><div class='add'>+	 * If the child device size obtained from general definition block</div><div class='add'>+	 * is different with sizeof(struct child_device_config), skip the</div><div class='add'>+	 * parsing of sdvo device info</div><div class='add'>+	 */</div><div class='add'>+	if (p_defs-&gt;child_dev_size != sizeof(*p_child)) {</div><div class='add'>+		/* different child dev size . Ignore it */</div><div class='add'>+		DRM_DEBUG_KMS("different child size is found. Invalid.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	/* get the block size of general definitions */</div><div class='add'>+	block_size = get_blocksize(p_defs);</div><div class='add'>+	/* get the number of child device */</div><div class='add'>+	child_device_num = (block_size - sizeof(*p_defs)) /</div><div class='add'>+				sizeof(*p_child);</div><div class='add'>+	count = 0;</div><div class='add'>+	/* get the number of child devices that are present */</div><div class='add'>+	for (i = 0; i &lt; child_device_num; i++) {</div><div class='add'>+		p_child = &amp;(p_defs-&gt;devices[i]);</div><div class='add'>+		if (!p_child-&gt;device_type) {</div><div class='add'>+			/* skip the device block if device type is invalid */</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		count++;</div><div class='add'>+	}</div><div class='add'>+	if (!count) {</div><div class='add'>+		DRM_DEBUG_KMS("no child dev is parsed from VBT\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	dev_priv-&gt;child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);</div><div class='add'>+	if (!dev_priv-&gt;child_dev) {</div><div class='add'>+		DRM_DEBUG_KMS("No memory space for child devices\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;child_dev_num = count;</div><div class='add'>+	count = 0;</div><div class='add'>+	for (i = 0; i &lt; child_device_num; i++) {</div><div class='add'>+		p_child = &amp;(p_defs-&gt;devices[i]);</div><div class='add'>+		if (!p_child-&gt;device_type) {</div><div class='add'>+			/* skip the device block if device type is invalid */</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		child_dev_ptr = dev_priv-&gt;child_dev + count;</div><div class='add'>+		count++;</div><div class='add'>+		memcpy((void *)child_dev_ptr, (void *)p_child,</div><div class='add'>+					sizeof(*p_child));</div><div class='add'>+	}</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * psb_intel_init_bios - initialize VBIOS settings &amp; find VBT</div><div class='ctx'>  * @dev: DRM device</div><div class='hunk'>@@ -236,38 +432,54 @@ bool psb_intel_init_bios(struct drm_device *dev)</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct pci_dev *pdev = dev-&gt;pdev;</div><div class='ctx'> 	struct vbt_header *vbt = NULL;</div><div class='del'>-	struct bdb_header *bdb;</div><div class='del'>-	u8 __iomem *bios;</div><div class='add'>+	struct bdb_header *bdb = NULL;</div><div class='add'>+	u8 __iomem *bios = NULL;</div><div class='ctx'> 	size_t size;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	bios = pci_map_rom(pdev, &amp;size);</div><div class='del'>-	if (!bios)</div><div class='del'>-		return -1;</div><div class='add'>+	/* XXX Should this validation be moved to intel_opregion.c? */</div><div class='add'>+	if (dev_priv-&gt;opregion.vbt) {</div><div class='add'>+		struct vbt_header *vbt = dev_priv-&gt;opregion.vbt;</div><div class='add'>+		if (memcmp(vbt-&gt;signature, "$VBT", 4) == 0) {</div><div class='add'>+			DRM_DEBUG_KMS("Using VBT from OpRegion: %20s\n",</div><div class='add'>+					 vbt-&gt;signature);</div><div class='add'>+			bdb = (struct bdb_header *)((char *)vbt + vbt-&gt;bdb_offset);</div><div class='add'>+		} else</div><div class='add'>+			dev_priv-&gt;opregion.vbt = NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* Scour memory looking for the VBT signature */</div><div class='del'>-	for (i = 0; i + 4 &lt; size; i++) {</div><div class='del'>-		if (!memcmp(bios + i, "$VBT", 4)) {</div><div class='del'>-			vbt = (struct vbt_header *)(bios + i);</div><div class='del'>-			break;</div><div class='add'>+	if (bdb == NULL) {</div><div class='add'>+		bios = pci_map_rom(pdev, &amp;size);</div><div class='add'>+		if (!bios)</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		/* Scour memory looking for the VBT signature */</div><div class='add'>+		for (i = 0; i + 4 &lt; size; i++) {</div><div class='add'>+			if (!memcmp(bios + i, "$VBT", 4)) {</div><div class='add'>+				vbt = (struct vbt_header *)(bios + i);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (!vbt) {</div><div class='del'>-		dev_err(dev-&gt;dev, "VBT signature missing\n");</div><div class='del'>-		pci_unmap_rom(pdev, bios);</div><div class='del'>-		return -1;</div><div class='add'>+		if (!vbt) {</div><div class='add'>+			dev_err(dev-&gt;dev, "VBT signature missing\n");</div><div class='add'>+			pci_unmap_rom(pdev, bios);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+		bdb = (struct bdb_header *)(bios + i + vbt-&gt;bdb_offset);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bdb = (struct bdb_header *)(bios + i + vbt-&gt;bdb_offset);</div><div class='del'>-</div><div class='del'>-	/* Grab useful general definitions */</div><div class='add'>+	/* Grab useful general dxefinitions */</div><div class='ctx'> 	parse_general_features(dev_priv, bdb);</div><div class='add'>+	parse_driver_features(dev_priv, bdb);</div><div class='ctx'> 	parse_lfp_panel_data(dev_priv, bdb);</div><div class='ctx'> 	parse_sdvo_panel_data(dev_priv, bdb);</div><div class='add'>+	parse_sdvo_device_mapping(dev_priv, bdb);</div><div class='add'>+	parse_device_mapping(dev_priv, bdb);</div><div class='ctx'> 	parse_backlight_data(dev_priv, bdb);</div><div class='ctx'> </div><div class='del'>-	pci_unmap_rom(pdev, bios);</div><div class='add'>+	if (bios)</div><div class='add'>+		pci_unmap_rom(pdev, bios);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -278,26 +490,8 @@ bool psb_intel_init_bios(struct drm_device *dev)</div><div class='ctx'> void psb_intel_destroy_bios(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_display_mode *sdvo_lvds_vbt_mode =</div><div class='del'>-				dev_priv-&gt;sdvo_lvds_vbt_mode;</div><div class='del'>-	struct drm_display_mode *lfp_lvds_vbt_mode =</div><div class='del'>-				dev_priv-&gt;lfp_lvds_vbt_mode;</div><div class='del'>-	struct bdb_lvds_backlight *lvds_bl =</div><div class='del'>-				dev_priv-&gt;lvds_bl;</div><div class='del'>-</div><div class='del'>-	/*free sdvo panel mode*/</div><div class='del'>-	if (sdvo_lvds_vbt_mode) {</div><div class='del'>-		dev_priv-&gt;sdvo_lvds_vbt_mode = NULL;</div><div class='del'>-		kfree(sdvo_lvds_vbt_mode);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (lfp_lvds_vbt_mode) {</div><div class='del'>-		dev_priv-&gt;lfp_lvds_vbt_mode = NULL;</div><div class='del'>-		kfree(lfp_lvds_vbt_mode);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (lvds_bl) {</div><div class='del'>-		dev_priv-&gt;lvds_bl = NULL;</div><div class='del'>-		kfree(lvds_bl);</div><div class='del'>-	}</div><div class='add'>+	kfree(dev_priv-&gt;sdvo_lvds_vbt_mode);</div><div class='add'>+	kfree(dev_priv-&gt;lfp_lvds_vbt_mode);</div><div class='add'>+	kfree(dev_priv-&gt;lvds_bl);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/intel_bios.h b/drivers/gpu/drm/gma500/intel_bios.h<br/>index 70f1bf018183..0a738663eb5a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/intel_bios.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/intel_bios.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/intel_bios.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/intel_bios.h</a></div><div class='hunk'>@@ -127,9 +127,93 @@ struct bdb_general_features {</div><div class='ctx'> 	/* bits 5 */</div><div class='ctx'> 	u8 int_crt_support:1;</div><div class='ctx'> 	u8 int_tv_support:1;</div><div class='del'>-	u8 rsvd11:6; /* finish byte */</div><div class='add'>+	u8 int_efp_support:1;</div><div class='add'>+	u8 dp_ssc_enb:1;	/* PCH attached eDP supports SSC */</div><div class='add'>+	u8 dp_ssc_freq:1;	/* SSC freq for PCH attached eDP */</div><div class='add'>+	u8 rsvd11:3; /* finish byte */</div><div class='ctx'> } __attribute__((packed));</div><div class='ctx'> </div><div class='add'>+/* pre-915 */</div><div class='add'>+#define GPIO_PIN_DVI_LVDS	0x03 /* "DVI/LVDS DDC GPIO pins" */</div><div class='add'>+#define GPIO_PIN_ADD_I2C	0x05 /* "ADDCARD I2C GPIO pins" */</div><div class='add'>+#define GPIO_PIN_ADD_DDC	0x04 /* "ADDCARD DDC GPIO pins" */</div><div class='add'>+#define GPIO_PIN_ADD_DDC_I2C	0x06 /* "ADDCARD DDC/I2C GPIO pins" */</div><div class='add'>+</div><div class='add'>+/* Pre 915 */</div><div class='add'>+#define DEVICE_TYPE_NONE	0x00</div><div class='add'>+#define DEVICE_TYPE_CRT		0x01</div><div class='add'>+#define DEVICE_TYPE_TV		0x09</div><div class='add'>+#define DEVICE_TYPE_EFP		0x12</div><div class='add'>+#define DEVICE_TYPE_LFP		0x22</div><div class='add'>+/* On 915+ */</div><div class='add'>+#define DEVICE_TYPE_CRT_DPMS		0x6001</div><div class='add'>+#define DEVICE_TYPE_CRT_DPMS_HOTPLUG	0x4001</div><div class='add'>+#define DEVICE_TYPE_TV_COMPOSITE	0x0209</div><div class='add'>+#define DEVICE_TYPE_TV_MACROVISION	0x0289</div><div class='add'>+#define DEVICE_TYPE_TV_RF_COMPOSITE	0x020c</div><div class='add'>+#define DEVICE_TYPE_TV_SVIDEO_COMPOSITE	0x0609</div><div class='add'>+#define DEVICE_TYPE_TV_SCART		0x0209</div><div class='add'>+#define DEVICE_TYPE_TV_CODEC_HOTPLUG_PWR 0x6009</div><div class='add'>+#define DEVICE_TYPE_EFP_HOTPLUG_PWR	0x6012</div><div class='add'>+#define DEVICE_TYPE_EFP_DVI_HOTPLUG_PWR	0x6052</div><div class='add'>+#define DEVICE_TYPE_EFP_DVI_I		0x6053</div><div class='add'>+#define DEVICE_TYPE_EFP_DVI_D_DUAL	0x6152</div><div class='add'>+#define DEVICE_TYPE_EFP_DVI_D_HDCP	0x60d2</div><div class='add'>+#define DEVICE_TYPE_OPENLDI_HOTPLUG_PWR	0x6062</div><div class='add'>+#define DEVICE_TYPE_OPENLDI_DUALPIX	0x6162</div><div class='add'>+#define DEVICE_TYPE_LFP_PANELLINK	0x5012</div><div class='add'>+#define DEVICE_TYPE_LFP_CMOS_PWR	0x5042</div><div class='add'>+#define DEVICE_TYPE_LFP_LVDS_PWR	0x5062</div><div class='add'>+#define DEVICE_TYPE_LFP_LVDS_DUAL	0x5162</div><div class='add'>+#define DEVICE_TYPE_LFP_LVDS_DUAL_HDCP	0x51e2</div><div class='add'>+</div><div class='add'>+#define DEVICE_CFG_NONE		0x00</div><div class='add'>+#define DEVICE_CFG_12BIT_DVOB	0x01</div><div class='add'>+#define DEVICE_CFG_12BIT_DVOC	0x02</div><div class='add'>+#define DEVICE_CFG_24BIT_DVOBC	0x09</div><div class='add'>+#define DEVICE_CFG_24BIT_DVOCB	0x0a</div><div class='add'>+#define DEVICE_CFG_DUAL_DVOB	0x11</div><div class='add'>+#define DEVICE_CFG_DUAL_DVOC	0x12</div><div class='add'>+#define DEVICE_CFG_DUAL_DVOBC	0x13</div><div class='add'>+#define DEVICE_CFG_DUAL_LINK_DVOBC	0x19</div><div class='add'>+#define DEVICE_CFG_DUAL_LINK_DVOCB	0x1a</div><div class='add'>+</div><div class='add'>+#define DEVICE_WIRE_NONE	0x00</div><div class='add'>+#define DEVICE_WIRE_DVOB	0x01</div><div class='add'>+#define DEVICE_WIRE_DVOC	0x02</div><div class='add'>+#define DEVICE_WIRE_DVOBC	0x03</div><div class='add'>+#define DEVICE_WIRE_DVOBB	0x05</div><div class='add'>+#define DEVICE_WIRE_DVOCC	0x06</div><div class='add'>+#define DEVICE_WIRE_DVOB_MASTER 0x0d</div><div class='add'>+#define DEVICE_WIRE_DVOC_MASTER 0x0e</div><div class='add'>+</div><div class='add'>+#define DEVICE_PORT_DVOA	0x00 /* none on 845+ */</div><div class='add'>+#define DEVICE_PORT_DVOB	0x01</div><div class='add'>+#define DEVICE_PORT_DVOC	0x02</div><div class='add'>+</div><div class='add'>+struct child_device_config {</div><div class='add'>+	u16 handle;</div><div class='add'>+	u16 device_type;</div><div class='add'>+	u8  device_id[10]; /* ascii string */</div><div class='add'>+	u16 addin_offset;</div><div class='add'>+	u8  dvo_port; /* See Device_PORT_* above */</div><div class='add'>+	u8  i2c_pin;</div><div class='add'>+	u8  slave_addr;</div><div class='add'>+	u8  ddc_pin;</div><div class='add'>+	u16 edid_ptr;</div><div class='add'>+	u8  dvo_cfg; /* See DEVICE_CFG_* above */</div><div class='add'>+	u8  dvo2_port;</div><div class='add'>+	u8  i2c2_pin;</div><div class='add'>+	u8  slave2_addr;</div><div class='add'>+	u8  ddc2_pin;</div><div class='add'>+	u8  capabilities;</div><div class='add'>+	u8  dvo_wiring;/* See DEVICE_WIRE_* above */</div><div class='add'>+	u8  dvo2_wiring;</div><div class='add'>+	u16 extended_type;</div><div class='add'>+	u8  dvo_function;</div><div class='add'>+} __attribute__((packed));</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> struct bdb_general_definitions {</div><div class='ctx'> 	/* DDC GPIO */</div><div class='ctx'> 	u8 crt_ddc_gmbus_pin;</div><div class='hunk'>@@ -144,13 +228,18 @@ struct bdb_general_definitions {</div><div class='ctx'> 	u8 boot_display[2];</div><div class='ctx'> 	u8 child_dev_size;</div><div class='ctx'> </div><div class='del'>-	/* device info */</div><div class='del'>-	u8 tv_or_lvds_info[33];</div><div class='del'>-	u8 dev1[33];</div><div class='del'>-	u8 dev2[33];</div><div class='del'>-	u8 dev3[33];</div><div class='del'>-	u8 dev4[33];</div><div class='del'>-	/* may be another device block here on some platforms */</div><div class='add'>+	/*</div><div class='add'>+	 * Device info:</div><div class='add'>+	 * If TV is present, it'll be at devices[0].</div><div class='add'>+	 * LVDS will be next, either devices[0] or [1], if present.</div><div class='add'>+	 * On some platforms the number of device is 6. But could be as few as</div><div class='add'>+	 * 4 if both TV and LVDS are missing.</div><div class='add'>+	 * And the device num is related with the size of general definition</div><div class='add'>+	 * block. It is obtained by using the following formula:</div><div class='add'>+	 * number = (block_size - sizeof(bdb_general_definitions))/</div><div class='add'>+	 *	     sizeof(child_device_config);</div><div class='add'>+	 */</div><div class='add'>+	struct child_device_config devices[0];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bdb_lvds_options {</div><div class='hunk'>@@ -302,6 +391,45 @@ struct bdb_sdvo_lvds_options {</div><div class='ctx'> 	u8 panel_misc_bits_4;</div><div class='ctx'> } __attribute__((packed));</div><div class='ctx'> </div><div class='add'>+struct bdb_driver_features {</div><div class='add'>+	u8 boot_dev_algorithm:1;</div><div class='add'>+	u8 block_display_switch:1;</div><div class='add'>+	u8 allow_display_switch:1;</div><div class='add'>+	u8 hotplug_dvo:1;</div><div class='add'>+	u8 dual_view_zoom:1;</div><div class='add'>+	u8 int15h_hook:1;</div><div class='add'>+	u8 sprite_in_clone:1;</div><div class='add'>+	u8 primary_lfp_id:1;</div><div class='add'>+</div><div class='add'>+	u16 boot_mode_x;</div><div class='add'>+	u16 boot_mode_y;</div><div class='add'>+	u8 boot_mode_bpp;</div><div class='add'>+	u8 boot_mode_refresh;</div><div class='add'>+</div><div class='add'>+	u16 enable_lfp_primary:1;</div><div class='add'>+	u16 selective_mode_pruning:1;</div><div class='add'>+	u16 dual_frequency:1;</div><div class='add'>+	u16 render_clock_freq:1; /* 0: high freq; 1: low freq */</div><div class='add'>+	u16 nt_clone_support:1;</div><div class='add'>+	u16 power_scheme_ui:1; /* 0: CUI; 1: 3rd party */</div><div class='add'>+	u16 sprite_display_assign:1; /* 0: secondary; 1: primary */</div><div class='add'>+	u16 cui_aspect_scaling:1;</div><div class='add'>+	u16 preserve_aspect_ratio:1;</div><div class='add'>+	u16 sdvo_device_power_down:1;</div><div class='add'>+	u16 crt_hotplug:1;</div><div class='add'>+	u16 lvds_config:2;</div><div class='add'>+	u16 tv_hotplug:1;</div><div class='add'>+	u16 hdmi_config:2;</div><div class='add'>+</div><div class='add'>+	u8 static_display:1;</div><div class='add'>+	u8 reserved2:7;</div><div class='add'>+	u16 legacy_crt_max_x;</div><div class='add'>+	u16 legacy_crt_max_y;</div><div class='add'>+	u8 legacy_crt_max_refresh;</div><div class='add'>+</div><div class='add'>+	u8 hdmi_termination;</div><div class='add'>+	u8 custom_vbt_version;</div><div class='add'>+} __attribute__((packed));</div><div class='ctx'> </div><div class='ctx'> extern bool psb_intel_init_bios(struct drm_device *dev);</div><div class='ctx'> extern void psb_intel_destroy_bios(struct drm_device *dev);</div><div class='hunk'>@@ -427,4 +555,21 @@ extern void psb_intel_destroy_bios(struct drm_device *dev);</div><div class='ctx'> #define   SWF14_APM_STANDBY	0x1</div><div class='ctx'> #define   SWF14_APM_RESTORE	0x0</div><div class='ctx'> </div><div class='add'>+/* Add the device class for LFP, TV, HDMI */</div><div class='add'>+#define	 DEVICE_TYPE_INT_LFP	0x1022</div><div class='add'>+#define	 DEVICE_TYPE_INT_TV	0x1009</div><div class='add'>+#define	 DEVICE_TYPE_HDMI	0x60D2</div><div class='add'>+#define	 DEVICE_TYPE_DP		0x68C6</div><div class='add'>+#define	 DEVICE_TYPE_eDP	0x78C6</div><div class='add'>+</div><div class='add'>+/* define the DVO port for HDMI output type */</div><div class='add'>+#define		DVO_B		1</div><div class='add'>+#define		DVO_C		2</div><div class='add'>+#define		DVO_D		3</div><div class='add'>+</div><div class='add'>+/* define the PORT for DP output type */</div><div class='add'>+#define		PORT_IDPB	7</div><div class='add'>+#define		PORT_IDPC	8</div><div class='add'>+#define		PORT_IDPD	9</div><div class='add'>+</div><div class='ctx'> #endif /* _I830_BIOS_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/mdfld_device.c b/drivers/gpu/drm/gma500/mdfld_device.c<br/>index af656787db0f..265ad0de44a6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/mdfld_device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/mdfld_device.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/mdfld_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/mdfld_device.c</a></div><div class='hunk'>@@ -163,142 +163,30 @@ struct backlight_device *mdfld_get_backlight_device(void)</div><div class='ctx'>  *</div><div class='ctx'>  * Notes: FIXME_JLIU7 need to add the support for DPI MIPI &amp; HDMI audio</div><div class='ctx'>  */</div><div class='del'>-static int mdfld_save_display_registers(struct drm_device *dev, int pipe)</div><div class='add'>+static int mdfld_save_display_registers(struct drm_device *dev, int pipenum)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct medfield_state *regs = &amp;dev_priv-&gt;regs.mdfld;</div><div class='add'>+	struct psb_pipe *pipe = &amp;dev_priv-&gt;regs.pipe[pipenum];</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipenum];</div><div class='ctx'> 	int i;</div><div class='add'>+	u32 *mipi_val;</div><div class='ctx'> </div><div class='ctx'> 	/* register */</div><div class='del'>-	u32 dpll_reg = MRST_DPLL_A;</div><div class='del'>-	u32 fp_reg = MRST_FPA0;</div><div class='del'>-	u32 pipeconf_reg = PIPEACONF;</div><div class='del'>-	u32 htot_reg = HTOTAL_A;</div><div class='del'>-	u32 hblank_reg = HBLANK_A;</div><div class='del'>-	u32 hsync_reg = HSYNC_A;</div><div class='del'>-	u32 vtot_reg = VTOTAL_A;</div><div class='del'>-	u32 vblank_reg = VBLANK_A;</div><div class='del'>-	u32 vsync_reg = VSYNC_A;</div><div class='del'>-	u32 pipesrc_reg = PIPEASRC;</div><div class='del'>-	u32 dspstride_reg = DSPASTRIDE;</div><div class='del'>-	u32 dsplinoff_reg = DSPALINOFF;</div><div class='del'>-	u32 dsptileoff_reg = DSPATILEOFF;</div><div class='del'>-	u32 dspsize_reg = DSPASIZE;</div><div class='del'>-	u32 dsppos_reg = DSPAPOS;</div><div class='del'>-	u32 dspsurf_reg = DSPASURF;</div><div class='ctx'> 	u32 mipi_reg = MIPI;</div><div class='del'>-	u32 dspcntr_reg = DSPACNTR;</div><div class='del'>-	u32 dspstatus_reg = PIPEASTAT;</div><div class='del'>-	u32 palette_reg = PALETTE_A;</div><div class='del'>-</div><div class='del'>-	/* pointer to values */</div><div class='del'>-	u32 *dpll_val = &amp;regs-&gt;saveDPLL_A;</div><div class='del'>-	u32 *fp_val = &amp;regs-&gt;saveFPA0;</div><div class='del'>-	u32 *pipeconf_val = &amp;regs-&gt;savePIPEACONF;</div><div class='del'>-	u32 *htot_val = &amp;regs-&gt;saveHTOTAL_A;</div><div class='del'>-	u32 *hblank_val = &amp;regs-&gt;saveHBLANK_A;</div><div class='del'>-	u32 *hsync_val = &amp;regs-&gt;saveHSYNC_A;</div><div class='del'>-	u32 *vtot_val = &amp;regs-&gt;saveVTOTAL_A;</div><div class='del'>-	u32 *vblank_val = &amp;regs-&gt;saveVBLANK_A;</div><div class='del'>-	u32 *vsync_val = &amp;regs-&gt;saveVSYNC_A;</div><div class='del'>-	u32 *pipesrc_val = &amp;regs-&gt;savePIPEASRC;</div><div class='del'>-	u32 *dspstride_val = &amp;regs-&gt;saveDSPASTRIDE;</div><div class='del'>-	u32 *dsplinoff_val = &amp;regs-&gt;saveDSPALINOFF;</div><div class='del'>-	u32 *dsptileoff_val = &amp;regs-&gt;saveDSPATILEOFF;</div><div class='del'>-	u32 *dspsize_val = &amp;regs-&gt;saveDSPASIZE;</div><div class='del'>-	u32 *dsppos_val = &amp;regs-&gt;saveDSPAPOS;</div><div class='del'>-	u32 *dspsurf_val = &amp;regs-&gt;saveDSPASURF;</div><div class='del'>-	u32 *mipi_val = &amp;regs-&gt;saveMIPI;</div><div class='del'>-	u32 *dspcntr_val = &amp;regs-&gt;saveDSPACNTR;</div><div class='del'>-	u32 *dspstatus_val = &amp;regs-&gt;saveDSPASTATUS;</div><div class='del'>-	u32 *palette_val = regs-&gt;save_palette_a;</div><div class='del'>-</div><div class='del'>-	switch (pipe) {</div><div class='add'>+</div><div class='add'>+	switch (pipenum) {</div><div class='ctx'> 	case 0:</div><div class='add'>+		mipi_val = &amp;regs-&gt;saveMIPI;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='del'>-		/* regester */</div><div class='del'>-		dpll_reg = MDFLD_DPLL_B;</div><div class='del'>-		fp_reg = MDFLD_DPLL_DIV0;</div><div class='del'>-		pipeconf_reg = PIPEBCONF;</div><div class='del'>-		htot_reg = HTOTAL_B;</div><div class='del'>-		hblank_reg = HBLANK_B;</div><div class='del'>-		hsync_reg = HSYNC_B;</div><div class='del'>-		vtot_reg = VTOTAL_B;</div><div class='del'>-		vblank_reg = VBLANK_B;</div><div class='del'>-		vsync_reg = VSYNC_B;</div><div class='del'>-		pipesrc_reg = PIPEBSRC;</div><div class='del'>-		dspstride_reg = DSPBSTRIDE;</div><div class='del'>-		dsplinoff_reg = DSPBLINOFF;</div><div class='del'>-		dsptileoff_reg = DSPBTILEOFF;</div><div class='del'>-		dspsize_reg = DSPBSIZE;</div><div class='del'>-		dsppos_reg = DSPBPOS;</div><div class='del'>-		dspsurf_reg = DSPBSURF;</div><div class='del'>-		dspcntr_reg = DSPBCNTR;</div><div class='del'>-		dspstatus_reg = PIPEBSTAT;</div><div class='del'>-		palette_reg = PALETTE_B;</div><div class='del'>-</div><div class='del'>-		/* values */</div><div class='del'>-		dpll_val = &amp;regs-&gt;saveDPLL_B;</div><div class='del'>-		fp_val = &amp;regs-&gt;saveFPB0;</div><div class='del'>-		pipeconf_val = &amp;regs-&gt;savePIPEBCONF;</div><div class='del'>-		htot_val = &amp;regs-&gt;saveHTOTAL_B;</div><div class='del'>-		hblank_val = &amp;regs-&gt;saveHBLANK_B;</div><div class='del'>-		hsync_val = &amp;regs-&gt;saveHSYNC_B;</div><div class='del'>-		vtot_val = &amp;regs-&gt;saveVTOTAL_B;</div><div class='del'>-		vblank_val = &amp;regs-&gt;saveVBLANK_B;</div><div class='del'>-		vsync_val = &amp;regs-&gt;saveVSYNC_B;</div><div class='del'>-		pipesrc_val = &amp;regs-&gt;savePIPEBSRC;</div><div class='del'>-		dspstride_val = &amp;regs-&gt;saveDSPBSTRIDE;</div><div class='del'>-		dsplinoff_val = &amp;regs-&gt;saveDSPBLINOFF;</div><div class='del'>-		dsptileoff_val = &amp;regs-&gt;saveDSPBTILEOFF;</div><div class='del'>-		dspsize_val = &amp;regs-&gt;saveDSPBSIZE;</div><div class='del'>-		dsppos_val = &amp;regs-&gt;saveDSPBPOS;</div><div class='del'>-		dspsurf_val = &amp;regs-&gt;saveDSPBSURF;</div><div class='del'>-		dspcntr_val = &amp;regs-&gt;saveDSPBCNTR;</div><div class='del'>-		dspstatus_val = &amp;regs-&gt;saveDSPBSTATUS;</div><div class='del'>-		palette_val = regs-&gt;save_palette_b;</div><div class='add'>+		mipi_val = &amp;regs-&gt;saveMIPI;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		/* register */</div><div class='del'>-		pipeconf_reg = PIPECCONF;</div><div class='del'>-		htot_reg = HTOTAL_C;</div><div class='del'>-		hblank_reg = HBLANK_C;</div><div class='del'>-		hsync_reg = HSYNC_C;</div><div class='del'>-		vtot_reg = VTOTAL_C;</div><div class='del'>-		vblank_reg = VBLANK_C;</div><div class='del'>-		vsync_reg = VSYNC_C;</div><div class='del'>-		pipesrc_reg = PIPECSRC;</div><div class='del'>-		dspstride_reg = DSPCSTRIDE;</div><div class='del'>-		dsplinoff_reg = DSPCLINOFF;</div><div class='del'>-		dsptileoff_reg = DSPCTILEOFF;</div><div class='del'>-		dspsize_reg = DSPCSIZE;</div><div class='del'>-		dsppos_reg = DSPCPOS;</div><div class='del'>-		dspsurf_reg = DSPCSURF;</div><div class='ctx'> 		mipi_reg = MIPI_C;</div><div class='del'>-		dspcntr_reg = DSPCCNTR;</div><div class='del'>-		dspstatus_reg = PIPECSTAT;</div><div class='del'>-		palette_reg = PALETTE_C;</div><div class='del'>-</div><div class='ctx'> 		/* pointer to values */</div><div class='del'>-		pipeconf_val = &amp;regs-&gt;savePIPECCONF;</div><div class='del'>-		htot_val = &amp;regs-&gt;saveHTOTAL_C;</div><div class='del'>-		hblank_val = &amp;regs-&gt;saveHBLANK_C;</div><div class='del'>-		hsync_val = &amp;regs-&gt;saveHSYNC_C;</div><div class='del'>-		vtot_val = &amp;regs-&gt;saveVTOTAL_C;</div><div class='del'>-		vblank_val = &amp;regs-&gt;saveVBLANK_C;</div><div class='del'>-		vsync_val = &amp;regs-&gt;saveVSYNC_C;</div><div class='del'>-		pipesrc_val = &amp;regs-&gt;savePIPECSRC;</div><div class='del'>-		dspstride_val = &amp;regs-&gt;saveDSPCSTRIDE;</div><div class='del'>-		dsplinoff_val = &amp;regs-&gt;saveDSPCLINOFF;</div><div class='del'>-		dsptileoff_val = &amp;regs-&gt;saveDSPCTILEOFF;</div><div class='del'>-		dspsize_val = &amp;regs-&gt;saveDSPCSIZE;</div><div class='del'>-		dsppos_val = &amp;regs-&gt;saveDSPCPOS;</div><div class='del'>-		dspsurf_val = &amp;regs-&gt;saveDSPCSURF;</div><div class='ctx'> 		mipi_val = &amp;regs-&gt;saveMIPI_C;</div><div class='del'>-		dspcntr_val = &amp;regs-&gt;saveDSPCCNTR;</div><div class='del'>-		dspstatus_val = &amp;regs-&gt;saveDSPCSTATUS;</div><div class='del'>-		palette_val = regs-&gt;save_palette_c;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		DRM_ERROR("%s, invalid pipe number.\n", __func__);</div><div class='hunk'>@@ -306,30 +194,30 @@ static int mdfld_save_display_registers(struct drm_device *dev, int pipe)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Pipe &amp; plane A info */</div><div class='del'>-	*dpll_val = PSB_RVDC32(dpll_reg);</div><div class='del'>-	*fp_val = PSB_RVDC32(fp_reg);</div><div class='del'>-	*pipeconf_val = PSB_RVDC32(pipeconf_reg);</div><div class='del'>-	*htot_val = PSB_RVDC32(htot_reg);</div><div class='del'>-	*hblank_val = PSB_RVDC32(hblank_reg);</div><div class='del'>-	*hsync_val = PSB_RVDC32(hsync_reg);</div><div class='del'>-	*vtot_val = PSB_RVDC32(vtot_reg);</div><div class='del'>-	*vblank_val = PSB_RVDC32(vblank_reg);</div><div class='del'>-	*vsync_val = PSB_RVDC32(vsync_reg);</div><div class='del'>-	*pipesrc_val = PSB_RVDC32(pipesrc_reg);</div><div class='del'>-	*dspstride_val = PSB_RVDC32(dspstride_reg);</div><div class='del'>-	*dsplinoff_val = PSB_RVDC32(dsplinoff_reg);</div><div class='del'>-	*dsptileoff_val = PSB_RVDC32(dsptileoff_reg);</div><div class='del'>-	*dspsize_val = PSB_RVDC32(dspsize_reg);</div><div class='del'>-	*dsppos_val = PSB_RVDC32(dsppos_reg);</div><div class='del'>-	*dspsurf_val = PSB_RVDC32(dspsurf_reg);</div><div class='del'>-	*dspcntr_val = PSB_RVDC32(dspcntr_reg);</div><div class='del'>-	*dspstatus_val = PSB_RVDC32(dspstatus_reg);</div><div class='add'>+	pipe-&gt;dpll = PSB_RVDC32(map-&gt;dpll);</div><div class='add'>+	pipe-&gt;fp0 = PSB_RVDC32(map-&gt;fp0);</div><div class='add'>+	pipe-&gt;conf = PSB_RVDC32(map-&gt;conf);</div><div class='add'>+	pipe-&gt;htotal = PSB_RVDC32(map-&gt;htotal);</div><div class='add'>+	pipe-&gt;hblank = PSB_RVDC32(map-&gt;hblank);</div><div class='add'>+	pipe-&gt;hsync = PSB_RVDC32(map-&gt;hsync);</div><div class='add'>+	pipe-&gt;vtotal = PSB_RVDC32(map-&gt;vtotal);</div><div class='add'>+	pipe-&gt;vblank = PSB_RVDC32(map-&gt;vblank);</div><div class='add'>+	pipe-&gt;vsync = PSB_RVDC32(map-&gt;vsync);</div><div class='add'>+	pipe-&gt;src = PSB_RVDC32(map-&gt;src);</div><div class='add'>+	pipe-&gt;stride = PSB_RVDC32(map-&gt;stride);</div><div class='add'>+	pipe-&gt;linoff = PSB_RVDC32(map-&gt;linoff);</div><div class='add'>+	pipe-&gt;tileoff = PSB_RVDC32(map-&gt;tileoff);</div><div class='add'>+	pipe-&gt;size = PSB_RVDC32(map-&gt;size);</div><div class='add'>+	pipe-&gt;pos = PSB_RVDC32(map-&gt;pos);</div><div class='add'>+	pipe-&gt;surf = PSB_RVDC32(map-&gt;surf);</div><div class='add'>+	pipe-&gt;cntr = PSB_RVDC32(map-&gt;cntr);</div><div class='add'>+	pipe-&gt;status = PSB_RVDC32(map-&gt;status);</div><div class='ctx'> </div><div class='ctx'> 	/*save palette (gamma) */</div><div class='ctx'> 	for (i = 0; i &lt; 256; i++)</div><div class='del'>-		palette_val[i] = PSB_RVDC32(palette_reg + (i &lt;&lt; 2));</div><div class='add'>+		pipe-&gt;palette[i] = PSB_RVDC32(map-&gt;palette + (i &lt;&lt; 2));</div><div class='ctx'> </div><div class='del'>-	if (pipe == 1) {</div><div class='add'>+	if (pipenum == 1) {</div><div class='ctx'> 		regs-&gt;savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL);</div><div class='ctx'> 		regs-&gt;savePFIT_PGM_RATIOS = PSB_RVDC32(PFIT_PGM_RATIOS);</div><div class='ctx'> </div><div class='hunk'>@@ -349,7 +237,7 @@ static int mdfld_save_display_registers(struct drm_device *dev, int pipe)</div><div class='ctx'>  *</div><div class='ctx'>  * Notes: FIXME_JLIU7 need to add the support for DPI MIPI &amp; HDMI audio</div><div class='ctx'>  */</div><div class='del'>-static int mdfld_restore_display_registers(struct drm_device *dev, int pipe)</div><div class='add'>+static int mdfld_restore_display_registers(struct drm_device *dev, int pipenum)</div><div class='ctx'> {</div><div class='ctx'> 	/* To get  panel out of ULPS mode. */</div><div class='ctx'> 	u32 temp = 0;</div><div class='hunk'>@@ -357,142 +245,30 @@ static int mdfld_restore_display_registers(struct drm_device *dev, int pipe)</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct mdfld_dsi_config *dsi_config = NULL;</div><div class='ctx'> 	struct medfield_state *regs = &amp;dev_priv-&gt;regs.mdfld;</div><div class='del'>-	u32 i = 0;</div><div class='del'>-	u32 dpll = 0;</div><div class='add'>+	struct psb_pipe *pipe = &amp;dev_priv-&gt;regs.pipe[pipenum];</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipenum];</div><div class='add'>+	u32 i;</div><div class='add'>+	u32 dpll;</div><div class='ctx'> 	u32 timeout = 0;</div><div class='ctx'> </div><div class='del'>-	/* regester */</div><div class='del'>-	u32 dpll_reg = MRST_DPLL_A;</div><div class='del'>-	u32 fp_reg = MRST_FPA0;</div><div class='del'>-	u32 pipeconf_reg = PIPEACONF;</div><div class='del'>-	u32 htot_reg = HTOTAL_A;</div><div class='del'>-	u32 hblank_reg = HBLANK_A;</div><div class='del'>-	u32 hsync_reg = HSYNC_A;</div><div class='del'>-	u32 vtot_reg = VTOTAL_A;</div><div class='del'>-	u32 vblank_reg = VBLANK_A;</div><div class='del'>-	u32 vsync_reg = VSYNC_A;</div><div class='del'>-	u32 pipesrc_reg = PIPEASRC;</div><div class='del'>-	u32 dspstride_reg = DSPASTRIDE;</div><div class='del'>-	u32 dsplinoff_reg = DSPALINOFF;</div><div class='del'>-	u32 dsptileoff_reg = DSPATILEOFF;</div><div class='del'>-	u32 dspsize_reg = DSPASIZE;</div><div class='del'>-	u32 dsppos_reg = DSPAPOS;</div><div class='del'>-	u32 dspsurf_reg = DSPASURF;</div><div class='del'>-	u32 dspstatus_reg = PIPEASTAT;</div><div class='add'>+	/* register */</div><div class='ctx'> 	u32 mipi_reg = MIPI;</div><div class='del'>-	u32 dspcntr_reg = DSPACNTR;</div><div class='del'>-	u32 palette_reg = PALETTE_A;</div><div class='ctx'> </div><div class='ctx'> 	/* values */</div><div class='del'>-	u32 dpll_val = regs-&gt;saveDPLL_A &amp; ~DPLL_VCO_ENABLE;</div><div class='del'>-	u32 fp_val = regs-&gt;saveFPA0;</div><div class='del'>-	u32 pipeconf_val = regs-&gt;savePIPEACONF;</div><div class='del'>-	u32 htot_val = regs-&gt;saveHTOTAL_A;</div><div class='del'>-	u32 hblank_val = regs-&gt;saveHBLANK_A;</div><div class='del'>-	u32 hsync_val = regs-&gt;saveHSYNC_A;</div><div class='del'>-	u32 vtot_val = regs-&gt;saveVTOTAL_A;</div><div class='del'>-	u32 vblank_val = regs-&gt;saveVBLANK_A;</div><div class='del'>-	u32 vsync_val = regs-&gt;saveVSYNC_A;</div><div class='del'>-	u32 pipesrc_val = regs-&gt;savePIPEASRC;</div><div class='del'>-	u32 dspstride_val = regs-&gt;saveDSPASTRIDE;</div><div class='del'>-	u32 dsplinoff_val = regs-&gt;saveDSPALINOFF;</div><div class='del'>-	u32 dsptileoff_val = regs-&gt;saveDSPATILEOFF;</div><div class='del'>-	u32 dspsize_val = regs-&gt;saveDSPASIZE;</div><div class='del'>-	u32 dsppos_val = regs-&gt;saveDSPAPOS;</div><div class='del'>-	u32 dspsurf_val = regs-&gt;saveDSPASURF;</div><div class='del'>-	u32 dspstatus_val = regs-&gt;saveDSPASTATUS;</div><div class='add'>+	u32 dpll_val = pipe-&gt;dpll;</div><div class='ctx'> 	u32 mipi_val = regs-&gt;saveMIPI;</div><div class='del'>-	u32 dspcntr_val = regs-&gt;saveDSPACNTR;</div><div class='del'>-	u32 *palette_val = regs-&gt;save_palette_a;</div><div class='ctx'> </div><div class='del'>-	switch (pipe) {</div><div class='add'>+	switch (pipenum) {</div><div class='ctx'> 	case 0:</div><div class='add'>+		dpll_val &amp;= ~DPLL_VCO_ENABLE;</div><div class='ctx'> 		dsi_config = dev_priv-&gt;dsi_configs[0];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='del'>-		/* regester */</div><div class='del'>-		dpll_reg = MDFLD_DPLL_B;</div><div class='del'>-		fp_reg = MDFLD_DPLL_DIV0;</div><div class='del'>-		pipeconf_reg = PIPEBCONF;</div><div class='del'>-		htot_reg = HTOTAL_B;</div><div class='del'>-		hblank_reg = HBLANK_B;</div><div class='del'>-		hsync_reg = HSYNC_B;</div><div class='del'>-		vtot_reg = VTOTAL_B;</div><div class='del'>-		vblank_reg = VBLANK_B;</div><div class='del'>-		vsync_reg = VSYNC_B;</div><div class='del'>-		pipesrc_reg = PIPEBSRC;</div><div class='del'>-		dspstride_reg = DSPBSTRIDE;</div><div class='del'>-		dsplinoff_reg = DSPBLINOFF;</div><div class='del'>-		dsptileoff_reg = DSPBTILEOFF;</div><div class='del'>-		dspsize_reg = DSPBSIZE;</div><div class='del'>-		dsppos_reg = DSPBPOS;</div><div class='del'>-		dspsurf_reg = DSPBSURF;</div><div class='del'>-		dspcntr_reg = DSPBCNTR;</div><div class='del'>-		dspstatus_reg = PIPEBSTAT;</div><div class='del'>-		palette_reg = PALETTE_B;</div><div class='del'>-</div><div class='del'>-		/* values */</div><div class='del'>-		dpll_val = regs-&gt;saveDPLL_B &amp; ~DPLL_VCO_ENABLE;</div><div class='del'>-		fp_val = regs-&gt;saveFPB0;</div><div class='del'>-		pipeconf_val = regs-&gt;savePIPEBCONF;</div><div class='del'>-		htot_val = regs-&gt;saveHTOTAL_B;</div><div class='del'>-		hblank_val = regs-&gt;saveHBLANK_B;</div><div class='del'>-		hsync_val = regs-&gt;saveHSYNC_B;</div><div class='del'>-		vtot_val = regs-&gt;saveVTOTAL_B;</div><div class='del'>-		vblank_val = regs-&gt;saveVBLANK_B;</div><div class='del'>-		vsync_val = regs-&gt;saveVSYNC_B;</div><div class='del'>-		pipesrc_val = regs-&gt;savePIPEBSRC;</div><div class='del'>-		dspstride_val = regs-&gt;saveDSPBSTRIDE;</div><div class='del'>-		dsplinoff_val = regs-&gt;saveDSPBLINOFF;</div><div class='del'>-		dsptileoff_val = regs-&gt;saveDSPBTILEOFF;</div><div class='del'>-		dspsize_val = regs-&gt;saveDSPBSIZE;</div><div class='del'>-		dsppos_val = regs-&gt;saveDSPBPOS;</div><div class='del'>-		dspsurf_val = regs-&gt;saveDSPBSURF;</div><div class='del'>-		dspcntr_val = regs-&gt;saveDSPBCNTR;</div><div class='del'>-		dspstatus_val = regs-&gt;saveDSPBSTATUS;</div><div class='del'>-		palette_val = regs-&gt;save_palette_b;</div><div class='add'>+		dpll_val &amp;= ~DPLL_VCO_ENABLE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='del'>-		/* regester */</div><div class='del'>-		pipeconf_reg = PIPECCONF;</div><div class='del'>-		htot_reg = HTOTAL_C;</div><div class='del'>-		hblank_reg = HBLANK_C;</div><div class='del'>-		hsync_reg = HSYNC_C;</div><div class='del'>-		vtot_reg = VTOTAL_C;</div><div class='del'>-		vblank_reg = VBLANK_C;</div><div class='del'>-		vsync_reg = VSYNC_C;</div><div class='del'>-		pipesrc_reg = PIPECSRC;</div><div class='del'>-		dspstride_reg = DSPCSTRIDE;</div><div class='del'>-		dsplinoff_reg = DSPCLINOFF;</div><div class='del'>-		dsptileoff_reg = DSPCTILEOFF;</div><div class='del'>-		dspsize_reg = DSPCSIZE;</div><div class='del'>-		dsppos_reg = DSPCPOS;</div><div class='del'>-		dspsurf_reg = DSPCSURF;</div><div class='ctx'> 		mipi_reg = MIPI_C;</div><div class='del'>-		dspcntr_reg = DSPCCNTR;</div><div class='del'>-		dspstatus_reg = PIPECSTAT;</div><div class='del'>-		palette_reg = PALETTE_C;</div><div class='del'>-</div><div class='del'>-		/* values */</div><div class='del'>-		pipeconf_val = regs-&gt;savePIPECCONF;</div><div class='del'>-		htot_val = regs-&gt;saveHTOTAL_C;</div><div class='del'>-		hblank_val = regs-&gt;saveHBLANK_C;</div><div class='del'>-		hsync_val = regs-&gt;saveHSYNC_C;</div><div class='del'>-		vtot_val = regs-&gt;saveVTOTAL_C;</div><div class='del'>-		vblank_val = regs-&gt;saveVBLANK_C;</div><div class='del'>-		vsync_val = regs-&gt;saveVSYNC_C;</div><div class='del'>-		pipesrc_val = regs-&gt;savePIPECSRC;</div><div class='del'>-		dspstride_val = regs-&gt;saveDSPCSTRIDE;</div><div class='del'>-		dsplinoff_val = regs-&gt;saveDSPCLINOFF;</div><div class='del'>-		dsptileoff_val = regs-&gt;saveDSPCTILEOFF;</div><div class='del'>-		dspsize_val = regs-&gt;saveDSPCSIZE;</div><div class='del'>-		dsppos_val = regs-&gt;saveDSPCPOS;</div><div class='del'>-		dspsurf_val = regs-&gt;saveDSPCSURF;</div><div class='ctx'> 		mipi_val = regs-&gt;saveMIPI_C;</div><div class='del'>-		dspcntr_val = regs-&gt;saveDSPCCNTR;</div><div class='del'>-		dspstatus_val = regs-&gt;saveDSPCSTATUS;</div><div class='del'>-		palette_val = regs-&gt;save_palette_c;</div><div class='del'>-</div><div class='ctx'> 		dsi_config = dev_priv-&gt;dsi_configs[1];</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -503,14 +279,14 @@ static int mdfld_restore_display_registers(struct drm_device *dev, int pipe)</div><div class='ctx'> 	/*make sure VGA plane is off. it initializes to on after reset!*/</div><div class='ctx'> 	PSB_WVDC32(0x80000000, VGACNTRL);</div><div class='ctx'> </div><div class='del'>-	if (pipe == 1) {</div><div class='del'>-		PSB_WVDC32(dpll_val &amp; ~DPLL_VCO_ENABLE, dpll_reg);</div><div class='del'>-		PSB_RVDC32(dpll_reg);</div><div class='add'>+	if (pipenum == 1) {</div><div class='add'>+		PSB_WVDC32(dpll_val &amp; ~DPLL_VCO_ENABLE, map-&gt;dpll);</div><div class='add'>+		PSB_RVDC32(map-&gt;dpll);</div><div class='ctx'> </div><div class='del'>-		PSB_WVDC32(fp_val, fp_reg);</div><div class='add'>+		PSB_WVDC32(pipe-&gt;fp0, map-&gt;fp0);</div><div class='ctx'> 	} else {</div><div class='ctx'> </div><div class='del'>-		dpll = PSB_RVDC32(dpll_reg);</div><div class='add'>+		dpll = PSB_RVDC32(map-&gt;dpll);</div><div class='ctx'> </div><div class='ctx'> 		if (!(dpll &amp; DPLL_VCO_ENABLE)) {</div><div class='ctx'> </div><div class='hunk'>@@ -518,23 +294,23 @@ static int mdfld_restore_display_registers(struct drm_device *dev, int pipe)</div><div class='ctx'> 			   before enable the VCO */</div><div class='ctx'> 			if (dpll &amp; MDFLD_PWR_GATE_EN) {</div><div class='ctx'> 				dpll &amp;= ~MDFLD_PWR_GATE_EN;</div><div class='del'>-				PSB_WVDC32(dpll, dpll_reg);</div><div class='add'>+				PSB_WVDC32(dpll, map-&gt;dpll);</div><div class='ctx'> 				/* FIXME_MDFLD PO - change 500 to 1 after PO */</div><div class='ctx'> 				udelay(500);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			PSB_WVDC32(fp_val, fp_reg);</div><div class='del'>-			PSB_WVDC32(dpll_val, dpll_reg);</div><div class='add'>+			PSB_WVDC32(pipe-&gt;fp0, map-&gt;fp0);</div><div class='add'>+			PSB_WVDC32(dpll_val, map-&gt;dpll);</div><div class='ctx'> 			/* FIXME_MDFLD PO - change 500 to 1 after PO */</div><div class='ctx'> 			udelay(500);</div><div class='ctx'> </div><div class='ctx'> 			dpll_val |= DPLL_VCO_ENABLE;</div><div class='del'>-			PSB_WVDC32(dpll_val, dpll_reg);</div><div class='del'>-			PSB_RVDC32(dpll_reg);</div><div class='add'>+			PSB_WVDC32(dpll_val, map-&gt;dpll);</div><div class='add'>+			PSB_RVDC32(map-&gt;dpll);</div><div class='ctx'> </div><div class='ctx'> 			/* wait for DSI PLL to lock */</div><div class='ctx'> 			while (timeout &lt; 20000 &amp;&amp;</div><div class='del'>-			  !(PSB_RVDC32(pipeconf_reg) &amp; PIPECONF_DSIPLL_LOCK)) {</div><div class='add'>+			  !(PSB_RVDC32(map-&gt;conf) &amp; PIPECONF_DSIPLL_LOCK)) {</div><div class='ctx'> 				udelay(150);</div><div class='ctx'> 				timeout++;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -547,28 +323,28 @@ static int mdfld_restore_display_registers(struct drm_device *dev, int pipe)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Restore mode */</div><div class='del'>-	PSB_WVDC32(htot_val, htot_reg);</div><div class='del'>-	PSB_WVDC32(hblank_val, hblank_reg);</div><div class='del'>-	PSB_WVDC32(hsync_val, hsync_reg);</div><div class='del'>-	PSB_WVDC32(vtot_val, vtot_reg);</div><div class='del'>-	PSB_WVDC32(vblank_val, vblank_reg);</div><div class='del'>-	PSB_WVDC32(vsync_val, vsync_reg);</div><div class='del'>-	PSB_WVDC32(pipesrc_val, pipesrc_reg);</div><div class='del'>-	PSB_WVDC32(dspstatus_val, dspstatus_reg);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;htotal, map-&gt;htotal);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;hblank, map-&gt;hblank);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;hsync, map-&gt;hsync);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;vtotal, map-&gt;vtotal);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;vblank, map-&gt;vblank);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;vsync, map-&gt;vsync);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;src, map-&gt;src);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;status, map-&gt;status);</div><div class='ctx'> </div><div class='ctx'> 	/*set up the plane*/</div><div class='del'>-	PSB_WVDC32(dspstride_val, dspstride_reg);</div><div class='del'>-	PSB_WVDC32(dsplinoff_val, dsplinoff_reg);</div><div class='del'>-	PSB_WVDC32(dsptileoff_val, dsptileoff_reg);</div><div class='del'>-	PSB_WVDC32(dspsize_val, dspsize_reg);</div><div class='del'>-	PSB_WVDC32(dsppos_val, dsppos_reg);</div><div class='del'>-	PSB_WVDC32(dspsurf_val, dspsurf_reg);</div><div class='del'>-</div><div class='del'>-	if (pipe == 1) {</div><div class='add'>+	PSB_WVDC32(pipe-&gt;stride, map-&gt;stride);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;linoff, map-&gt;linoff);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;tileoff, map-&gt;tileoff);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;size, map-&gt;size);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;pos, map-&gt;pos);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;surf, map-&gt;surf);</div><div class='add'>+</div><div class='add'>+	if (pipenum == 1) {</div><div class='ctx'> 		/* restore palette (gamma) */</div><div class='ctx'> 		/*DRM_UDELAY(50000); */</div><div class='ctx'> 		for (i = 0; i &lt; 256; i++)</div><div class='del'>-			PSB_WVDC32(palette_val[i], palette_reg + (i &lt;&lt; 2));</div><div class='add'>+			PSB_WVDC32(pipe-&gt;palette[i], map-&gt;palette + (i &lt;&lt; 2));</div><div class='ctx'> </div><div class='ctx'> 		PSB_WVDC32(regs-&gt;savePFIT_CONTROL, PFIT_CONTROL);</div><div class='ctx'> 		PSB_WVDC32(regs-&gt;savePFIT_PGM_RATIOS, PFIT_PGM_RATIOS);</div><div class='hunk'>@@ -578,7 +354,7 @@ static int mdfld_restore_display_registers(struct drm_device *dev, int pipe)</div><div class='ctx'> 		/*TODO: resume pipe*/</div><div class='ctx'> </div><div class='ctx'> 		/*enable the plane*/</div><div class='del'>-		PSB_WVDC32(dspcntr_val &amp; ~DISPLAY_PLANE_ENABLE, dspcntr_reg);</div><div class='add'>+		PSB_WVDC32(pipe-&gt;cntr &amp; ~DISPLAY_PLANE_ENABLE, map-&gt;cntr);</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -588,7 +364,7 @@ static int mdfld_restore_display_registers(struct drm_device *dev, int pipe)</div><div class='ctx'> </div><div class='ctx'> 	/*setup MIPI adapter + MIPI IP registers*/</div><div class='ctx'> 	if (dsi_config)</div><div class='del'>-		mdfld_dsi_controller_init(dsi_config, pipe);</div><div class='add'>+		mdfld_dsi_controller_init(dsi_config, pipenum);</div><div class='ctx'> </div><div class='ctx'> 	if (in_atomic() || in_interrupt())</div><div class='ctx'> 		mdelay(20);</div><div class='hunk'>@@ -596,7 +372,7 @@ static int mdfld_restore_display_registers(struct drm_device *dev, int pipe)</div><div class='ctx'> 		msleep(20);</div><div class='ctx'> </div><div class='ctx'> 	/*enable the plane*/</div><div class='del'>-	PSB_WVDC32(dspcntr_val, dspcntr_reg);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;cntr, map-&gt;cntr);</div><div class='ctx'> </div><div class='ctx'> 	if (in_atomic() || in_interrupt())</div><div class='ctx'> 		mdelay(20);</div><div class='hunk'>@@ -625,12 +401,12 @@ static int mdfld_restore_display_registers(struct drm_device *dev, int pipe)</div><div class='ctx'> 	mdelay(1);</div><div class='ctx'> </div><div class='ctx'> 	/*enable the pipe*/</div><div class='del'>-	PSB_WVDC32(pipeconf_val, pipeconf_reg);</div><div class='add'>+	PSB_WVDC32(pipe-&gt;conf, map-&gt;conf);</div><div class='ctx'> </div><div class='ctx'> 	/* restore palette (gamma) */</div><div class='ctx'> 	/*DRM_UDELAY(50000); */</div><div class='ctx'> 	for (i = 0; i &lt; 256; i++)</div><div class='del'>-		PSB_WVDC32(palette_val[i], palette_reg + (i &lt;&lt; 2));</div><div class='add'>+		PSB_WVDC32(pipe-&gt;palette[i], map-&gt;palette + (i &lt;&lt; 2));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -667,14 +443,98 @@ static int mdfld_power_up(struct drm_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Medfield  */</div><div class='add'>+static const struct psb_offset mdfld_regmap[3] = {</div><div class='add'>+	{</div><div class='add'>+		.fp0 = MRST_FPA0,</div><div class='add'>+		.fp1 = MRST_FPA1,</div><div class='add'>+		.cntr = DSPACNTR,</div><div class='add'>+		.conf = PIPEACONF,</div><div class='add'>+		.src = PIPEASRC,</div><div class='add'>+		.dpll = MRST_DPLL_A,</div><div class='add'>+		.htotal = HTOTAL_A,</div><div class='add'>+		.hblank = HBLANK_A,</div><div class='add'>+		.hsync = HSYNC_A,</div><div class='add'>+		.vtotal = VTOTAL_A,</div><div class='add'>+		.vblank = VBLANK_A,</div><div class='add'>+		.vsync = VSYNC_A,</div><div class='add'>+		.stride = DSPASTRIDE,</div><div class='add'>+		.size = DSPASIZE,</div><div class='add'>+		.pos = DSPAPOS,</div><div class='add'>+		.surf = DSPASURF,</div><div class='add'>+		.addr = MRST_DSPABASE,</div><div class='add'>+		.status = PIPEASTAT,</div><div class='add'>+		.linoff = DSPALINOFF,</div><div class='add'>+		.tileoff = DSPATILEOFF,</div><div class='add'>+		.palette = PALETTE_A,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.fp0 = MDFLD_DPLL_DIV0,</div><div class='add'>+		.cntr = DSPBCNTR,</div><div class='add'>+		.conf = PIPEBCONF,</div><div class='add'>+		.src = PIPEBSRC,</div><div class='add'>+		.dpll = MDFLD_DPLL_B,</div><div class='add'>+		.htotal = HTOTAL_B,</div><div class='add'>+		.hblank = HBLANK_B,</div><div class='add'>+		.hsync = HSYNC_B,</div><div class='add'>+		.vtotal = VTOTAL_B,</div><div class='add'>+		.vblank = VBLANK_B,</div><div class='add'>+		.vsync = VSYNC_B,</div><div class='add'>+		.stride = DSPBSTRIDE,</div><div class='add'>+		.size = DSPBSIZE,</div><div class='add'>+		.pos = DSPBPOS,</div><div class='add'>+		.surf = DSPBSURF,</div><div class='add'>+		.addr = MRST_DSPBBASE,</div><div class='add'>+		.status = PIPEBSTAT,</div><div class='add'>+		.linoff = DSPBLINOFF,</div><div class='add'>+		.tileoff = DSPBTILEOFF,</div><div class='add'>+		.palette = PALETTE_B,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.fp0 = MRST_FPA0,	/* This is what the old code did ?? */</div><div class='add'>+		.cntr = DSPCCNTR,</div><div class='add'>+		.conf = PIPECCONF,</div><div class='add'>+		.src = PIPECSRC,</div><div class='add'>+		/* No DPLL_C */</div><div class='add'>+		.dpll = MRST_DPLL_A,</div><div class='add'>+		.htotal = HTOTAL_C,</div><div class='add'>+		.hblank = HBLANK_C,</div><div class='add'>+		.hsync = HSYNC_C,</div><div class='add'>+		.vtotal = VTOTAL_C,</div><div class='add'>+		.vblank = VBLANK_C,</div><div class='add'>+		.vsync = VSYNC_C,</div><div class='add'>+		.stride = DSPCSTRIDE,</div><div class='add'>+		.size = DSPBSIZE,</div><div class='add'>+		.pos = DSPCPOS,</div><div class='add'>+		.surf = DSPCSURF,</div><div class='add'>+		.addr = MDFLD_DSPCBASE,</div><div class='add'>+		.status = PIPECSTAT,</div><div class='add'>+		.linoff = DSPCLINOFF,</div><div class='add'>+		.tileoff = DSPCTILEOFF,</div><div class='add'>+		.palette = PALETTE_C,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mdfld_chip_setup(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	if (pci_enable_msi(dev-&gt;pdev))</div><div class='add'>+		dev_warn(dev-&gt;dev, "Enabling MSI failed!\n");</div><div class='add'>+	dev_priv-&gt;regmap = mdfld_regmap;</div><div class='add'>+	return mid_chip_setup(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct psb_ops mdfld_chip_ops = {</div><div class='ctx'> 	.name = "mdfld",</div><div class='ctx'> 	.accel_2d = 0,</div><div class='ctx'> 	.pipes = 3,</div><div class='ctx'> 	.crtcs = 3,</div><div class='add'>+	.lvds_mask = (1 &lt;&lt; 1),</div><div class='add'>+	.hdmi_mask = (1 &lt;&lt; 1),</div><div class='add'>+	.cursor_needs_phys = 0,</div><div class='ctx'> 	.sgx_offset = MRST_SGX_OFFSET,</div><div class='ctx'> </div><div class='del'>-	.chip_setup = mid_chip_setup,</div><div class='add'>+	.chip_setup = mdfld_chip_setup,</div><div class='ctx'> 	.crtc_helper = &amp;mdfld_helper_funcs,</div><div class='ctx'> 	.crtc_funcs = &amp;psb_intel_crtc_funcs,</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c<br/>index d52358b744a0..b34ff097b979 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/mdfld_dsi_dpi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/mdfld_dsi_dpi.c</a></div><div class='hunk'>@@ -869,7 +869,6 @@ void mdfld_dsi_dpi_mode_set(struct drm_encoder *encoder,</div><div class='ctx'> 		mdfld_set_pipe_timing(dsi_config, pipe);</div><div class='ctx'> </div><div class='ctx'> 		REG_WRITE(DSPABASE, 0x00);</div><div class='del'>-		REG_WRITE(DSPASTRIDE, (mode-&gt;hdisplay * 4));</div><div class='ctx'> 		REG_WRITE(DSPASIZE,</div><div class='ctx'> 			((mode-&gt;vdisplay - 1) &lt;&lt; 16) | (mode-&gt;hdisplay - 1));</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c b/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c<br/>index baa0e14165e0..489ffd2c66e5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c</a></div><div class='hunk'>@@ -605,6 +605,8 @@ int mdfld_dsi_pkg_sender_init(struct mdfld_dsi_connector *dsi_connector,</div><div class='ctx'> 	struct mdfld_dsi_config *dsi_config =</div><div class='ctx'> 				mdfld_dsi_get_config(dsi_connector);</div><div class='ctx'> 	struct drm_device *dev = dsi_config-&gt;dev;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	u32 mipi_val = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!dsi_connector) {</div><div class='hunk'>@@ -632,21 +634,13 @@ int mdfld_dsi_pkg_sender_init(struct mdfld_dsi_connector *dsi_connector,</div><div class='ctx'> 	pkg_sender-&gt;status = MDFLD_DSI_PKG_SENDER_FREE;</div><div class='ctx'> </div><div class='ctx'> 	/*init regs*/</div><div class='del'>-	if (pipe == 0) {</div><div class='del'>-		pkg_sender-&gt;dpll_reg = MRST_DPLL_A;</div><div class='del'>-		pkg_sender-&gt;dspcntr_reg = DSPACNTR;</div><div class='del'>-		pkg_sender-&gt;pipeconf_reg = PIPEACONF;</div><div class='del'>-		pkg_sender-&gt;dsplinoff_reg = DSPALINOFF;</div><div class='del'>-		pkg_sender-&gt;dspsurf_reg = DSPASURF;</div><div class='del'>-		pkg_sender-&gt;pipestat_reg = PIPEASTAT;</div><div class='del'>-	} else if (pipe == 2) {</div><div class='del'>-		pkg_sender-&gt;dpll_reg = MRST_DPLL_A;</div><div class='del'>-		pkg_sender-&gt;dspcntr_reg = DSPCCNTR;</div><div class='del'>-		pkg_sender-&gt;pipeconf_reg = PIPECCONF;</div><div class='del'>-		pkg_sender-&gt;dsplinoff_reg = DSPCLINOFF;</div><div class='del'>-		pkg_sender-&gt;dspsurf_reg = DSPCSURF;</div><div class='del'>-		pkg_sender-&gt;pipestat_reg = PIPECSTAT;</div><div class='del'>-	}</div><div class='add'>+	/* FIXME: should just copy the regmap ptr ? */</div><div class='add'>+	pkg_sender-&gt;dpll_reg = map-&gt;dpll;</div><div class='add'>+	pkg_sender-&gt;dspcntr_reg = map-&gt;cntr;</div><div class='add'>+	pkg_sender-&gt;pipeconf_reg = map-&gt;conf;</div><div class='add'>+	pkg_sender-&gt;dsplinoff_reg = map-&gt;linoff;</div><div class='add'>+	pkg_sender-&gt;dspsurf_reg = map-&gt;surf;</div><div class='add'>+	pkg_sender-&gt;pipestat_reg = map-&gt;status;</div><div class='ctx'> </div><div class='ctx'> 	pkg_sender-&gt;mipi_intr_stat_reg = MIPI_INTR_STAT_REG(pipe);</div><div class='ctx'> 	pkg_sender-&gt;mipi_lp_gen_data_reg = MIPI_LP_GEN_DATA_REG(pipe);</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/mdfld_intel_display.c b/drivers/gpu/drm/gma500/mdfld_intel_display.c<br/>index a35a2921bdf7..3f3cd619c79f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/mdfld_intel_display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/mdfld_intel_display.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/mdfld_intel_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/mdfld_intel_display.c</a></div><div class='hunk'>@@ -50,17 +50,14 @@ struct mrst_clock_t {</div><div class='ctx'> </div><div class='ctx'> void mdfldWaitForPipeDisable(struct drm_device *dev, int pipe)</div><div class='ctx'> {</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	int count, temp;</div><div class='del'>-	u32 pipeconf_reg = PIPEACONF;</div><div class='ctx'> </div><div class='ctx'> 	switch (pipe) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		break;</div><div class='ctx'> 	case 1:</div><div class='del'>-		pipeconf_reg = PIPEBCONF;</div><div class='del'>-		break;</div><div class='ctx'> 	case 2:</div><div class='del'>-		pipeconf_reg = PIPECCONF;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		DRM_ERROR("Illegal Pipe Number.\n");</div><div class='hunk'>@@ -73,7 +70,7 @@ void mdfldWaitForPipeDisable(struct drm_device *dev, int pipe)</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for for the pipe disable to take effect. */</div><div class='ctx'> 	for (count = 0; count &lt; COUNT_MAX; count++) {</div><div class='del'>-		temp = REG_READ(pipeconf_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 		if ((temp &amp; PIPEACONF_PIPE_STATE) == 0)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -81,17 +78,14 @@ void mdfldWaitForPipeDisable(struct drm_device *dev, int pipe)</div><div class='ctx'> </div><div class='ctx'> void mdfldWaitForPipeEnable(struct drm_device *dev, int pipe)</div><div class='ctx'> {</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	int count, temp;</div><div class='del'>-	u32 pipeconf_reg = PIPEACONF;</div><div class='ctx'> </div><div class='ctx'> 	switch (pipe) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		break;</div><div class='ctx'> 	case 1:</div><div class='del'>-		pipeconf_reg = PIPEBCONF;</div><div class='del'>-		break;</div><div class='ctx'> 	case 2:</div><div class='del'>-		pipeconf_reg = PIPECCONF;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		DRM_ERROR("Illegal Pipe Number.\n");</div><div class='hunk'>@@ -104,7 +98,7 @@ void mdfldWaitForPipeEnable(struct drm_device *dev, int pipe)</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for for the pipe enable to take effect. */</div><div class='ctx'> 	for (count = 0; count &lt; COUNT_MAX; count++) {</div><div class='del'>-		temp = REG_READ(pipeconf_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 		if ((temp &amp; PIPEACONF_PIPE_STATE) == 1)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -189,15 +183,12 @@ static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,</div><div class='ctx'> 				struct drm_framebuffer *old_fb)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	/* struct drm_i915_master_private *master_priv; */</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	struct psb_framebuffer *psbfb = to_psb_fb(crtc-&gt;fb);</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	unsigned long start, offset;</div><div class='del'>-	int dsplinoff = DSPALINOFF;</div><div class='del'>-	int dspsurf = DSPASURF;</div><div class='del'>-	int dspstride = DSPASTRIDE;</div><div class='del'>-	int dspcntr_reg = DSPACNTR;</div><div class='ctx'> 	u32 dspcntr;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -215,23 +206,7 @@ static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	switch (pipe) {</div><div class='del'>-	case 0:</div><div class='del'>-		dsplinoff = DSPALINOFF;</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		dsplinoff = DSPBLINOFF;</div><div class='del'>-		dspsurf = DSPBSURF;</div><div class='del'>-		dspstride = DSPBSTRIDE;</div><div class='del'>-		dspcntr_reg = DSPBCNTR;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		dsplinoff = DSPCLINOFF;</div><div class='del'>-		dspsurf = DSPCSURF;</div><div class='del'>-		dspstride = DSPCSTRIDE;</div><div class='del'>-		dspcntr_reg = DSPCCNTR;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='add'>+	if (pipe &gt; 2) {</div><div class='ctx'> 		DRM_ERROR("Illegal Pipe Number.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -242,8 +217,8 @@ static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,</div><div class='ctx'> 	start = psbfb-&gt;gtt-&gt;offset;</div><div class='ctx'> 	offset = y * crtc-&gt;fb-&gt;pitches[0] + x * (crtc-&gt;fb-&gt;bits_per_pixel / 8);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(dspstride, crtc-&gt;fb-&gt;pitches[0]);</div><div class='del'>-	dspcntr = REG_READ(dspcntr_reg);</div><div class='add'>+	REG_WRITE(map-&gt;stride, crtc-&gt;fb-&gt;pitches[0]);</div><div class='add'>+	dspcntr = REG_READ(map-&gt;cntr);</div><div class='ctx'> 	dspcntr &amp;= ~DISPPLANE_PIXFORMAT_MASK;</div><div class='ctx'> </div><div class='ctx'> 	switch (crtc-&gt;fb-&gt;bits_per_pixel) {</div><div class='hunk'>@@ -261,14 +236,14 @@ static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,</div><div class='ctx'> 		dspcntr |= DISPPLANE_32BPP_NO_ALPHA;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	REG_WRITE(dspcntr_reg, dspcntr);</div><div class='add'>+	REG_WRITE(map-&gt;cntr, dspcntr);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev-&gt;dev, "Writing base %08lX %08lX %d %d\n",</div><div class='ctx'> 						start, offset, x, y);</div><div class='del'>-	REG_WRITE(dsplinoff, offset);</div><div class='del'>-	REG_READ(dsplinoff);</div><div class='del'>-	REG_WRITE(dspsurf, start);</div><div class='del'>-	REG_READ(dspsurf);</div><div class='add'>+	REG_WRITE(map-&gt;linoff, offset);</div><div class='add'>+	REG_READ(map-&gt;linoff);</div><div class='add'>+	REG_WRITE(map-&gt;surf, start);</div><div class='add'>+	REG_READ(map-&gt;surf);</div><div class='ctx'> </div><div class='ctx'> 	gma_power_end(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -281,78 +256,56 @@ static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,</div><div class='ctx'>  */</div><div class='ctx'> void mdfld_disable_crtc(struct drm_device *dev, int pipe)</div><div class='ctx'> {</div><div class='del'>-	int dpll_reg = MRST_DPLL_A;</div><div class='del'>-	int dspcntr_reg = DSPACNTR;</div><div class='del'>-	int dspbase_reg = MRST_DSPABASE;</div><div class='del'>-	int pipeconf_reg = PIPEACONF;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	u32 temp;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev-&gt;dev, "pipe = %d\n", pipe);</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	switch (pipe) {</div><div class='del'>-	case 0:</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		dpll_reg = MDFLD_DPLL_B;</div><div class='del'>-		dspcntr_reg = DSPBCNTR;</div><div class='del'>-		dspbase_reg = DSPBSURF;</div><div class='del'>-		pipeconf_reg = PIPEBCONF;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		dpll_reg = MRST_DPLL_A;</div><div class='del'>-		dspcntr_reg = DSPCCNTR;</div><div class='del'>-		dspbase_reg = MDFLD_DSPCBASE;</div><div class='del'>-		pipeconf_reg = PIPECCONF;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		DRM_ERROR("Illegal Pipe Number.\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (pipe != 1)</div><div class='ctx'> 		mdfld_dsi_gen_fifo_ready(dev, MIPI_GEN_FIFO_STAT_REG(pipe),</div><div class='ctx'> 				HS_CTRL_FIFO_EMPTY | HS_DATA_FIFO_EMPTY);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable display plane */</div><div class='del'>-	temp = REG_READ(dspcntr_reg);</div><div class='add'>+	temp = REG_READ(map-&gt;cntr);</div><div class='ctx'> 	if ((temp &amp; DISPLAY_PLANE_ENABLE) != 0) {</div><div class='del'>-		REG_WRITE(dspcntr_reg,</div><div class='add'>+		REG_WRITE(map-&gt;cntr,</div><div class='ctx'> 			  temp &amp; ~DISPLAY_PLANE_ENABLE);</div><div class='ctx'> 		/* Flush the plane changes */</div><div class='del'>-		REG_WRITE(dspbase_reg, REG_READ(dspbase_reg));</div><div class='del'>-		REG_READ(dspbase_reg);</div><div class='add'>+		REG_WRITE(map-&gt;base, REG_READ(map-&gt;base));</div><div class='add'>+		REG_READ(map-&gt;base);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* FIXME_JLIU7 MDFLD_PO revisit */</div><div class='ctx'> </div><div class='ctx'> 	/* Next, disable display pipes */</div><div class='del'>-	temp = REG_READ(pipeconf_reg);</div><div class='add'>+	temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 	if ((temp &amp; PIPEACONF_ENABLE) != 0) {</div><div class='ctx'> 		temp &amp;= ~PIPEACONF_ENABLE;</div><div class='ctx'> 		temp |= PIPECONF_PLANE_OFF | PIPECONF_CURSOR_OFF;</div><div class='del'>-		REG_WRITE(pipeconf_reg, temp);</div><div class='del'>-		REG_READ(pipeconf_reg);</div><div class='add'>+		REG_WRITE(map-&gt;conf, temp);</div><div class='add'>+		REG_READ(map-&gt;conf);</div><div class='ctx'> </div><div class='ctx'> 		/* Wait for for the pipe disable to take effect. */</div><div class='ctx'> 		mdfldWaitForPipeDisable(dev, pipe);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	temp = REG_READ(dpll_reg);</div><div class='add'>+	temp = REG_READ(map-&gt;dpll);</div><div class='ctx'> 	if (temp &amp; DPLL_VCO_ENABLE) {</div><div class='ctx'> 		if ((pipe != 1 &amp;&amp;</div><div class='ctx'> 			!((REG_READ(PIPEACONF) | REG_READ(PIPECCONF))</div><div class='ctx'> 				&amp; PIPEACONF_ENABLE)) || pipe == 1) {</div><div class='ctx'> 			temp &amp;= ~(DPLL_VCO_ENABLE);</div><div class='del'>-			REG_WRITE(dpll_reg, temp);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 			/* Wait for the clocks to turn off. */</div><div class='ctx'> 			/* FIXME_MDFLD PO may need more delay */</div><div class='ctx'> 			udelay(500);</div><div class='ctx'> </div><div class='ctx'> 			if (!(temp &amp; MDFLD_PWR_GATE_EN)) {</div><div class='ctx'> 				/* gating power of DPLL */</div><div class='del'>-				REG_WRITE(dpll_reg, temp | MDFLD_PWR_GATE_EN);</div><div class='add'>+				REG_WRITE(map-&gt;dpll, temp | MDFLD_PWR_GATE_EN);</div><div class='ctx'> 				/* FIXME_MDFLD PO - change 500 to 1 after PO */</div><div class='ctx'> 				udelay(5000);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -373,41 +326,15 @@ static void mdfld_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='del'>-	int dpll_reg = MRST_DPLL_A;</div><div class='del'>-	int dspcntr_reg = DSPACNTR;</div><div class='del'>-	int dspbase_reg = MRST_DSPABASE;</div><div class='del'>-	int pipeconf_reg = PIPEACONF;</div><div class='del'>-	u32 pipestat_reg = PIPEASTAT;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	u32 pipeconf = dev_priv-&gt;pipeconf[pipe];</div><div class='ctx'> 	u32 temp;</div><div class='ctx'> 	int timeout = 0;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev-&gt;dev, "mode = %d, pipe = %d\n", mode, pipe);</div><div class='ctx'> </div><div class='del'>-/* FIXME_JLIU7 MDFLD_PO replaced w/ the following function */</div><div class='del'>-/* mdfld_dbi_dpms (struct drm_device *dev, int pipe, bool enabled) */</div><div class='del'>-</div><div class='del'>-	switch (pipe) {</div><div class='del'>-	case 0:</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		dpll_reg = DPLL_B;</div><div class='del'>-		dspcntr_reg = DSPBCNTR;</div><div class='del'>-		dspbase_reg = MRST_DSPBBASE;</div><div class='del'>-		pipeconf_reg = PIPEBCONF;</div><div class='del'>-		dpll_reg = MDFLD_DPLL_B;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		dpll_reg = MRST_DPLL_A;</div><div class='del'>-		dspcntr_reg = DSPCCNTR;</div><div class='del'>-		dspbase_reg = MDFLD_DSPCBASE;</div><div class='del'>-		pipeconf_reg = PIPECCONF;</div><div class='del'>-		pipestat_reg = PIPECSTAT;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		DRM_ERROR("Illegal Pipe Number.\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	/* Note: Old code uses pipe a stat for pipe b but that appears</div><div class='add'>+	   to be a bug */</div><div class='ctx'> </div><div class='ctx'> 	if (!gma_power_begin(dev, true))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -420,25 +347,25 @@ static void mdfld_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> 	case DRM_MODE_DPMS_STANDBY:</div><div class='ctx'> 	case DRM_MODE_DPMS_SUSPEND:</div><div class='ctx'> 		/* Enable the DPLL */</div><div class='del'>-		temp = REG_READ(dpll_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;dpll);</div><div class='ctx'> </div><div class='ctx'> 		if ((temp &amp; DPLL_VCO_ENABLE) == 0) {</div><div class='ctx'> 			/* When ungating power of DPLL, needs to wait 0.5us</div><div class='ctx'> 			   before enable the VCO */</div><div class='ctx'> 			if (temp &amp; MDFLD_PWR_GATE_EN) {</div><div class='ctx'> 				temp &amp;= ~MDFLD_PWR_GATE_EN;</div><div class='del'>-				REG_WRITE(dpll_reg, temp);</div><div class='add'>+				REG_WRITE(map-&gt;dpll, temp);</div><div class='ctx'> 				/* FIXME_MDFLD PO - change 500 to 1 after PO */</div><div class='ctx'> 				udelay(500);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			REG_WRITE(dpll_reg, temp);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 			/* FIXME_MDFLD PO - change 500 to 1 after PO */</div><div class='ctx'> 			udelay(500);</div><div class='ctx'> </div><div class='del'>-			REG_WRITE(dpll_reg, temp | DPLL_VCO_ENABLE);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp | DPLL_VCO_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> </div><div class='ctx'> 			/**</div><div class='ctx'> 			 * wait for DSI PLL to lock</div><div class='hunk'>@@ -446,25 +373,25 @@ static void mdfld_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> 			 * since both MIPI pipes share the same PLL.</div><div class='ctx'> 			 */</div><div class='ctx'> 			while ((pipe != 2) &amp;&amp; (timeout &lt; 20000) &amp;&amp;</div><div class='del'>-			  !(REG_READ(pipeconf_reg) &amp; PIPECONF_DSIPLL_LOCK)) {</div><div class='add'>+			  !(REG_READ(map-&gt;conf) &amp; PIPECONF_DSIPLL_LOCK)) {</div><div class='ctx'> 				udelay(150);</div><div class='ctx'> 				timeout++;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Enable the plane */</div><div class='del'>-		temp = REG_READ(dspcntr_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;cntr);</div><div class='ctx'> 		if ((temp &amp; DISPLAY_PLANE_ENABLE) == 0) {</div><div class='del'>-			REG_WRITE(dspcntr_reg,</div><div class='add'>+			REG_WRITE(map-&gt;cntr,</div><div class='ctx'> 				temp | DISPLAY_PLANE_ENABLE);</div><div class='ctx'> 			/* Flush the plane changes */</div><div class='del'>-			REG_WRITE(dspbase_reg, REG_READ(dspbase_reg));</div><div class='add'>+			REG_WRITE(map-&gt;base, REG_READ(map-&gt;base));</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Enable the pipe */</div><div class='del'>-		temp = REG_READ(pipeconf_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 		if ((temp &amp; PIPEACONF_ENABLE) == 0) {</div><div class='del'>-			REG_WRITE(pipeconf_reg, pipeconf);</div><div class='add'>+			REG_WRITE(map-&gt;conf, pipeconf);</div><div class='ctx'> </div><div class='ctx'> 			/* Wait for for the pipe enable to take effect. */</div><div class='ctx'> 			mdfldWaitForPipeEnable(dev, pipe);</div><div class='hunk'>@@ -473,39 +400,39 @@ static void mdfld_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> 		/*workaround for sighting 3741701 Random X blank display*/</div><div class='ctx'> 		/*perform w/a in video mode only on pipe A or C*/</div><div class='ctx'> 		if (pipe == 0 || pipe == 2) {</div><div class='del'>-			REG_WRITE(pipestat_reg, REG_READ(pipestat_reg));</div><div class='add'>+			REG_WRITE(map-&gt;status, REG_READ(map-&gt;status));</div><div class='ctx'> 			msleep(100);</div><div class='del'>-			if (PIPE_VBLANK_STATUS &amp; REG_READ(pipestat_reg))</div><div class='add'>+			if (PIPE_VBLANK_STATUS &amp; REG_READ(map-&gt;status))</div><div class='ctx'> 				dev_dbg(dev-&gt;dev, "OK");</div><div class='ctx'> 			else {</div><div class='ctx'> 				dev_dbg(dev-&gt;dev, "STUCK!!!!");</div><div class='ctx'> 				/*shutdown controller*/</div><div class='del'>-				temp = REG_READ(dspcntr_reg);</div><div class='del'>-				REG_WRITE(dspcntr_reg,</div><div class='add'>+				temp = REG_READ(map-&gt;cntr);</div><div class='add'>+				REG_WRITE(map-&gt;cntr,</div><div class='ctx'> 						temp &amp; ~DISPLAY_PLANE_ENABLE);</div><div class='del'>-				REG_WRITE(dspbase_reg, REG_READ(dspbase_reg));</div><div class='add'>+				REG_WRITE(map-&gt;base, REG_READ(map-&gt;base));</div><div class='ctx'> 				/*mdfld_dsi_dpi_shut_down(dev, pipe);*/</div><div class='ctx'> 				REG_WRITE(0xb048, 1);</div><div class='ctx'> 				msleep(100);</div><div class='del'>-				temp = REG_READ(pipeconf_reg);</div><div class='add'>+				temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 				temp &amp;= ~PIPEACONF_ENABLE;</div><div class='del'>-				REG_WRITE(pipeconf_reg, temp);</div><div class='add'>+				REG_WRITE(map-&gt;conf, temp);</div><div class='ctx'> 				msleep(100); /*wait for pipe disable*/</div><div class='ctx'> 				REG_WRITE(MIPI_DEVICE_READY_REG(pipe), 0);</div><div class='ctx'> 				msleep(100);</div><div class='ctx'> 				REG_WRITE(0xb004, REG_READ(0xb004));</div><div class='ctx'> 				/* try to bring the controller back up again*/</div><div class='ctx'> 				REG_WRITE(MIPI_DEVICE_READY_REG(pipe), 1);</div><div class='del'>-				temp = REG_READ(dspcntr_reg);</div><div class='del'>-				REG_WRITE(dspcntr_reg,</div><div class='add'>+				temp = REG_READ(map-&gt;cntr);</div><div class='add'>+				REG_WRITE(map-&gt;cntr,</div><div class='ctx'> 						temp | DISPLAY_PLANE_ENABLE);</div><div class='del'>-				REG_WRITE(dspbase_reg, REG_READ(dspbase_reg));</div><div class='add'>+				REG_WRITE(map-&gt;base, REG_READ(map-&gt;base));</div><div class='ctx'> 				/*mdfld_dsi_dpi_turn_on(dev, pipe);*/</div><div class='ctx'> 				REG_WRITE(0xb048, 2);</div><div class='ctx'> 				msleep(100);</div><div class='del'>-				temp = REG_READ(pipeconf_reg);</div><div class='add'>+				temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 				temp |= PIPEACONF_ENABLE;</div><div class='del'>-				REG_WRITE(pipeconf_reg, temp);</div><div class='add'>+				REG_WRITE(map-&gt;conf, temp);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -529,35 +456,35 @@ static void mdfld_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> 		REG_WRITE(VGACNTRL, VGA_DISP_DISABLE);</div><div class='ctx'> </div><div class='ctx'> 		/* Disable display plane */</div><div class='del'>-		temp = REG_READ(dspcntr_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;cntr);</div><div class='ctx'> 		if ((temp &amp; DISPLAY_PLANE_ENABLE) != 0) {</div><div class='del'>-			REG_WRITE(dspcntr_reg,</div><div class='add'>+			REG_WRITE(map-&gt;cntr,</div><div class='ctx'> 				  temp &amp; ~DISPLAY_PLANE_ENABLE);</div><div class='ctx'> 			/* Flush the plane changes */</div><div class='del'>-			REG_WRITE(dspbase_reg, REG_READ(dspbase_reg));</div><div class='del'>-			REG_READ(dspbase_reg);</div><div class='add'>+			REG_WRITE(map-&gt;base, REG_READ(map-&gt;base));</div><div class='add'>+			REG_READ(map-&gt;base);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Next, disable display pipes */</div><div class='del'>-		temp = REG_READ(pipeconf_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 		if ((temp &amp; PIPEACONF_ENABLE) != 0) {</div><div class='ctx'> 			temp &amp;= ~PIPEACONF_ENABLE;</div><div class='ctx'> 			temp |= PIPECONF_PLANE_OFF | PIPECONF_CURSOR_OFF;</div><div class='del'>-			REG_WRITE(pipeconf_reg, temp);</div><div class='del'>-			REG_READ(pipeconf_reg);</div><div class='add'>+			REG_WRITE(map-&gt;conf, temp);</div><div class='add'>+			REG_READ(map-&gt;conf);</div><div class='ctx'> </div><div class='ctx'> 			/* Wait for for the pipe disable to take effect. */</div><div class='ctx'> 			mdfldWaitForPipeDisable(dev, pipe);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		temp = REG_READ(dpll_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;dpll);</div><div class='ctx'> 		if (temp &amp; DPLL_VCO_ENABLE) {</div><div class='ctx'> 			if ((pipe != 1 &amp;&amp; !((REG_READ(PIPEACONF)</div><div class='ctx'> 				| REG_READ(PIPECCONF)) &amp; PIPEACONF_ENABLE))</div><div class='ctx'> 					|| pipe == 1) {</div><div class='ctx'> 				temp &amp;= ~(DPLL_VCO_ENABLE);</div><div class='del'>-				REG_WRITE(dpll_reg, temp);</div><div class='del'>-				REG_READ(dpll_reg);</div><div class='add'>+				REG_WRITE(map-&gt;dpll, temp);</div><div class='add'>+				REG_READ(map-&gt;dpll);</div><div class='ctx'> 				/* Wait for the clocks to turn off. */</div><div class='ctx'> 				/* FIXME_MDFLD PO may need more delay */</div><div class='ctx'> 				udelay(500);</div><div class='hunk'>@@ -764,21 +691,7 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='del'>-	int fp_reg = MRST_FPA0;</div><div class='del'>-	int dpll_reg = MRST_DPLL_A;</div><div class='del'>-	int dspcntr_reg = DSPACNTR;</div><div class='del'>-	int pipeconf_reg = PIPEACONF;</div><div class='del'>-	int htot_reg = HTOTAL_A;</div><div class='del'>-	int hblank_reg = HBLANK_A;</div><div class='del'>-	int hsync_reg = HSYNC_A;</div><div class='del'>-	int vtot_reg = VTOTAL_A;</div><div class='del'>-	int vblank_reg = VBLANK_A;</div><div class='del'>-	int vsync_reg = VSYNC_A;</div><div class='del'>-	int dspsize_reg = DSPASIZE;</div><div class='del'>-	int dsppos_reg = DSPAPOS;</div><div class='del'>-	int pipesrc_reg = PIPEASRC;</div><div class='del'>-	u32 *pipeconf = &amp;dev_priv-&gt;pipeconf[pipe];</div><div class='del'>-	u32 *dspcntr = &amp;dev_priv-&gt;dspcntr[pipe];</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	int refclk = 0;</div><div class='ctx'> 	int clk_n = 0, clk_p2 = 0, clk_byte = 1, clk = 0, m_conv = 0,</div><div class='ctx'> 								clk_tmp = 0;</div><div class='hunk'>@@ -806,45 +719,6 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	switch (pipe) {</div><div class='del'>-	case 0:</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		fp_reg = FPB0;</div><div class='del'>-		dpll_reg = DPLL_B;</div><div class='del'>-		dspcntr_reg = DSPBCNTR;</div><div class='del'>-		pipeconf_reg = PIPEBCONF;</div><div class='del'>-		htot_reg = HTOTAL_B;</div><div class='del'>-		hblank_reg = HBLANK_B;</div><div class='del'>-		hsync_reg = HSYNC_B;</div><div class='del'>-		vtot_reg = VTOTAL_B;</div><div class='del'>-		vblank_reg = VBLANK_B;</div><div class='del'>-		vsync_reg = VSYNC_B;</div><div class='del'>-		dspsize_reg = DSPBSIZE;</div><div class='del'>-		dsppos_reg = DSPBPOS;</div><div class='del'>-		pipesrc_reg = PIPEBSRC;</div><div class='del'>-		fp_reg = MDFLD_DPLL_DIV0;</div><div class='del'>-		dpll_reg = MDFLD_DPLL_B;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		dpll_reg = MRST_DPLL_A;</div><div class='del'>-		dspcntr_reg = DSPCCNTR;</div><div class='del'>-		pipeconf_reg = PIPECCONF;</div><div class='del'>-		htot_reg = HTOTAL_C;</div><div class='del'>-		hblank_reg = HBLANK_C;</div><div class='del'>-		hsync_reg = HSYNC_C;</div><div class='del'>-		vtot_reg = VTOTAL_C;</div><div class='del'>-		vblank_reg = VBLANK_C;</div><div class='del'>-		vsync_reg = VSYNC_C;</div><div class='del'>-		dspsize_reg = DSPCSIZE;</div><div class='del'>-		dsppos_reg = DSPCPOS;</div><div class='del'>-		pipesrc_reg = PIPECSRC;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		DRM_ERROR("Illegal Pipe Number.\n");</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	ret = check_fb(crtc-&gt;fb);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -929,21 +803,21 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		 * contained within the displayable area of the screen image</div><div class='ctx'> 		 * (frame buffer).</div><div class='ctx'> 		 */</div><div class='del'>-		REG_WRITE(dspsize_reg, ((min(mode-&gt;crtc_vdisplay, adjusted_mode-&gt;crtc_vdisplay) - 1) &lt;&lt; 16)</div><div class='add'>+		REG_WRITE(map-&gt;size, ((min(mode-&gt;crtc_vdisplay, adjusted_mode-&gt;crtc_vdisplay) - 1) &lt;&lt; 16)</div><div class='ctx'> 				| (min(mode-&gt;crtc_hdisplay, adjusted_mode-&gt;crtc_hdisplay) - 1));</div><div class='ctx'> 		/* Set the CRTC with encoder mode. */</div><div class='del'>-		REG_WRITE(pipesrc_reg, ((mode-&gt;crtc_hdisplay - 1) &lt;&lt; 16)</div><div class='add'>+		REG_WRITE(map-&gt;src, ((mode-&gt;crtc_hdisplay - 1) &lt;&lt; 16)</div><div class='ctx'> 				 | (mode-&gt;crtc_vdisplay - 1));</div><div class='ctx'> 	} else {</div><div class='del'>-		REG_WRITE(dspsize_reg,</div><div class='add'>+		REG_WRITE(map-&gt;size,</div><div class='ctx'> 				((mode-&gt;crtc_vdisplay - 1) &lt;&lt; 16) |</div><div class='ctx'> 						(mode-&gt;crtc_hdisplay - 1));</div><div class='del'>-		REG_WRITE(pipesrc_reg,</div><div class='add'>+		REG_WRITE(map-&gt;src,</div><div class='ctx'> 				((mode-&gt;crtc_hdisplay - 1) &lt;&lt; 16) |</div><div class='ctx'> 						(mode-&gt;crtc_vdisplay - 1));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(dsppos_reg, 0);</div><div class='add'>+	REG_WRITE(map-&gt;pos, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (psb_intel_encoder)</div><div class='ctx'> 		drm_connector_property_get_value(connector,</div><div class='hunk'>@@ -961,34 +835,34 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		offsetY = (adjusted_mode-&gt;crtc_vdisplay -</div><div class='ctx'> 					mode-&gt;crtc_vdisplay) / 2;</div><div class='ctx'> </div><div class='del'>-		REG_WRITE(htot_reg, (mode-&gt;crtc_hdisplay - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;htotal, (mode-&gt;crtc_hdisplay - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_htotal - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(vtot_reg, (mode-&gt;crtc_vdisplay - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;vtotal, (mode-&gt;crtc_vdisplay - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_vtotal - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(hblank_reg, (adjusted_mode-&gt;crtc_hblank_start -</div><div class='add'>+		REG_WRITE(map-&gt;hblank, (adjusted_mode-&gt;crtc_hblank_start -</div><div class='ctx'> 								offsetX - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_hblank_end - offsetX - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(hsync_reg, (adjusted_mode-&gt;crtc_hsync_start -</div><div class='add'>+		REG_WRITE(map-&gt;hsync, (adjusted_mode-&gt;crtc_hsync_start -</div><div class='ctx'> 								offsetX - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_hsync_end - offsetX - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(vblank_reg, (adjusted_mode-&gt;crtc_vblank_start -</div><div class='add'>+		REG_WRITE(map-&gt;vblank, (adjusted_mode-&gt;crtc_vblank_start -</div><div class='ctx'> 								offsetY - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_vblank_end - offsetY - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(vsync_reg, (adjusted_mode-&gt;crtc_vsync_start -</div><div class='add'>+		REG_WRITE(map-&gt;vsync, (adjusted_mode-&gt;crtc_vsync_start -</div><div class='ctx'> 								offsetY - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_vsync_end - offsetY - 1) &lt;&lt; 16));</div><div class='ctx'> 	} else {</div><div class='del'>-		REG_WRITE(htot_reg, (adjusted_mode-&gt;crtc_hdisplay - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;htotal, (adjusted_mode-&gt;crtc_hdisplay - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_htotal - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(vtot_reg, (adjusted_mode-&gt;crtc_vdisplay - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;vtotal, (adjusted_mode-&gt;crtc_vdisplay - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_vtotal - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(hblank_reg, (adjusted_mode-&gt;crtc_hblank_start - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;hblank, (adjusted_mode-&gt;crtc_hblank_start - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_hblank_end - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(hsync_reg, (adjusted_mode-&gt;crtc_hsync_start - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;hsync, (adjusted_mode-&gt;crtc_hsync_start - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_hsync_end - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(vblank_reg, (adjusted_mode-&gt;crtc_vblank_start - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;vblank, (adjusted_mode-&gt;crtc_vblank_start - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_vblank_end - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(vsync_reg, (adjusted_mode-&gt;crtc_vsync_start - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;vsync, (adjusted_mode-&gt;crtc_vsync_start - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_vsync_end - 1) &lt;&lt; 16));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1000,12 +874,12 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* setup pipeconf */</div><div class='del'>-	*pipeconf = PIPEACONF_ENABLE; /* FIXME_JLIU7 REG_READ(pipeconf_reg); */</div><div class='add'>+	dev_priv-&gt;pipeconf[pipe] = PIPEACONF_ENABLE; /* FIXME_JLIU7 REG_READ(pipeconf_reg); */</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the display plane register */</div><div class='del'>-	*dspcntr = REG_READ(dspcntr_reg);</div><div class='del'>-	*dspcntr |= pipe &lt;&lt; DISPPLANE_SEL_PIPE_POS;</div><div class='del'>-	*dspcntr |= DISPLAY_PLANE_ENABLE;</div><div class='add'>+	dev_priv-&gt;dspcntr[pipe] = REG_READ(map-&gt;cntr);</div><div class='add'>+	dev_priv-&gt;dspcntr[pipe] |= pipe &lt;&lt; DISPPLANE_SEL_PIPE_POS;</div><div class='add'>+	dev_priv-&gt;dspcntr[pipe] |= DISPLAY_PLANE_ENABLE;</div><div class='ctx'> </div><div class='ctx'> 	if (is_mipi2)</div><div class='ctx'> 		goto mrst_crtc_mode_set_exit;</div><div class='hunk'>@@ -1070,21 +944,21 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 					clock.p1, m_conv);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		dpll = REG_READ(dpll_reg);</div><div class='add'>+		dpll = REG_READ(map-&gt;dpll);</div><div class='ctx'> </div><div class='ctx'> 		if (dpll &amp; DPLL_VCO_ENABLE) {</div><div class='ctx'> 			dpll &amp;= ~DPLL_VCO_ENABLE;</div><div class='del'>-			REG_WRITE(dpll_reg, dpll);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, dpll);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> </div><div class='ctx'> 			/* FIXME jliu7 check the DPLL lock bit PIPEACONF[29] */</div><div class='ctx'> 			/* FIXME_MDFLD PO - change 500 to 1 after PO */</div><div class='ctx'> 			udelay(500);</div><div class='ctx'> </div><div class='ctx'> 			/* reset M1, N1 &amp; P1 */</div><div class='del'>-			REG_WRITE(fp_reg, 0);</div><div class='add'>+			REG_WRITE(map-&gt;fp0, 0);</div><div class='ctx'> 			dpll &amp;= ~MDFLD_P1_MASK;</div><div class='del'>-			REG_WRITE(dpll_reg, dpll);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, dpll);</div><div class='ctx'> 			/* FIXME_MDFLD PO - change 500 to 1 after PO */</div><div class='ctx'> 			udelay(500);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1093,7 +967,7 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		 * enable the VCO */</div><div class='ctx'> 		if (dpll &amp; MDFLD_PWR_GATE_EN) {</div><div class='ctx'> 			dpll &amp;= ~MDFLD_PWR_GATE_EN;</div><div class='del'>-			REG_WRITE(dpll_reg, dpll);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, dpll);</div><div class='ctx'> 			/* FIXME_MDFLD PO - change 500 to 1 after PO */</div><div class='ctx'> 			udelay(500);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1134,18 +1008,18 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		fp = 0x000000c1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(fp_reg, fp);</div><div class='del'>-	REG_WRITE(dpll_reg, dpll);</div><div class='add'>+	REG_WRITE(map-&gt;fp0, fp);</div><div class='add'>+	REG_WRITE(map-&gt;dpll, dpll);</div><div class='ctx'> 	/* FIXME_MDFLD PO - change 500 to 1 after PO */</div><div class='ctx'> 	udelay(500);</div><div class='ctx'> </div><div class='ctx'> 	dpll |= DPLL_VCO_ENABLE;</div><div class='del'>-	REG_WRITE(dpll_reg, dpll);</div><div class='del'>-	REG_READ(dpll_reg);</div><div class='add'>+	REG_WRITE(map-&gt;dpll, dpll);</div><div class='add'>+	REG_READ(map-&gt;dpll);</div><div class='ctx'> </div><div class='ctx'> 	/* wait for DSI PLL to lock */</div><div class='ctx'> 	while (timeout &lt; 20000 &amp;&amp;</div><div class='del'>-			!(REG_READ(pipeconf_reg) &amp; PIPECONF_DSIPLL_LOCK)) {</div><div class='add'>+			!(REG_READ(map-&gt;conf) &amp; PIPECONF_DSIPLL_LOCK)) {</div><div class='ctx'> 		udelay(150);</div><div class='ctx'> 		timeout++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1155,11 +1029,11 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev-&gt;dev, "is_mipi = 0x%x\n", is_mipi);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeconf_reg, *pipeconf);</div><div class='del'>-	REG_READ(pipeconf_reg);</div><div class='add'>+	REG_WRITE(map-&gt;conf, dev_priv-&gt;pipeconf[pipe]);</div><div class='add'>+	REG_READ(map-&gt;conf);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for for the pipe enable to take effect. */</div><div class='del'>-	REG_WRITE(dspcntr_reg, *dspcntr);</div><div class='add'>+	REG_WRITE(map-&gt;cntr, dev_priv-&gt;dspcntr[pipe]);</div><div class='ctx'> 	psb_intel_wait_for_vblank(dev);</div><div class='ctx'> </div><div class='ctx'> mrst_crtc_mode_set_exit:</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/mid_bios.c b/drivers/gpu/drm/gma500/mid_bios.c<br/>index 5eee9ad80da4..b2a790bd9899 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/mid_bios.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/mid_bios.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/mid_bios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/mid_bios.c</a></div><div class='hunk'>@@ -118,139 +118,214 @@ static void mid_get_pci_revID(struct drm_psb_private *dev_priv)</div><div class='ctx'> 					dev_priv-&gt;platform_rev_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct vbt_header {</div><div class='add'>+	u32 signature;</div><div class='add'>+	u8 revision;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* The same for r0 and r1 */</div><div class='add'>+struct vbt_r0 {</div><div class='add'>+	struct vbt_header vbt_header;</div><div class='add'>+	u8 size;</div><div class='add'>+	u8 checksum;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct vbt_r10 {</div><div class='add'>+	struct vbt_header vbt_header;</div><div class='add'>+	u8 checksum;</div><div class='add'>+	u16 size;</div><div class='add'>+	u8 panel_count;</div><div class='add'>+	u8 primary_panel_idx;</div><div class='add'>+	u8 secondary_panel_idx;</div><div class='add'>+	u8 __reserved[5];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+static int read_vbt_r0(u32 addr, struct vbt_r0 *vbt)</div><div class='add'>+{</div><div class='add'>+	void __iomem *vbt_virtual;</div><div class='add'>+</div><div class='add'>+	vbt_virtual = ioremap(addr, sizeof(*vbt));</div><div class='add'>+	if (vbt_virtual == NULL)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	memcpy_fromio(vbt, vbt_virtual, sizeof(*vbt));</div><div class='add'>+	iounmap(vbt_virtual);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int read_vbt_r10(u32 addr, struct vbt_r10 *vbt)</div><div class='add'>+{</div><div class='add'>+	void __iomem *vbt_virtual;</div><div class='add'>+</div><div class='add'>+	vbt_virtual = ioremap(addr, sizeof(*vbt));</div><div class='add'>+	if (!vbt_virtual)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	memcpy_fromio(vbt, vbt_virtual, sizeof(*vbt));</div><div class='add'>+	iounmap(vbt_virtual);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mid_get_vbt_data_r0(struct drm_psb_private *dev_priv, u32 addr)</div><div class='add'>+{</div><div class='add'>+	struct vbt_r0 vbt;</div><div class='add'>+	void __iomem *gct_virtual;</div><div class='add'>+	struct gct_r0 gct;</div><div class='add'>+	u8 bpi;</div><div class='add'>+</div><div class='add'>+	if (read_vbt_r0(addr, &amp;vbt))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	gct_virtual = ioremap(addr + sizeof(vbt), vbt.size - sizeof(vbt));</div><div class='add'>+	if (!gct_virtual)</div><div class='add'>+		return -1;</div><div class='add'>+	memcpy_fromio(&amp;gct, gct_virtual, sizeof(gct));</div><div class='add'>+	iounmap(gct_virtual);</div><div class='add'>+</div><div class='add'>+	bpi = gct.PD.BootPanelIndex;</div><div class='add'>+	dev_priv-&gt;gct_data.bpi = bpi;</div><div class='add'>+	dev_priv-&gt;gct_data.pt = gct.PD.PanelType;</div><div class='add'>+	dev_priv-&gt;gct_data.DTD = gct.panel[bpi].DTD;</div><div class='add'>+	dev_priv-&gt;gct_data.Panel_Port_Control =</div><div class='add'>+		gct.panel[bpi].Panel_Port_Control;</div><div class='add'>+	dev_priv-&gt;gct_data.Panel_MIPI_Display_Descriptor =</div><div class='add'>+		gct.panel[bpi].Panel_MIPI_Display_Descriptor;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mid_get_vbt_data_r1(struct drm_psb_private *dev_priv, u32 addr)</div><div class='add'>+{</div><div class='add'>+	struct vbt_r0 vbt;</div><div class='add'>+	void __iomem *gct_virtual;</div><div class='add'>+	struct gct_r1 gct;</div><div class='add'>+	u8 bpi;</div><div class='add'>+</div><div class='add'>+	if (read_vbt_r0(addr, &amp;vbt))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	gct_virtual = ioremap(addr + sizeof(vbt), vbt.size - sizeof(vbt));</div><div class='add'>+	if (!gct_virtual)</div><div class='add'>+		return -1;</div><div class='add'>+	memcpy_fromio(&amp;gct, gct_virtual, sizeof(gct));</div><div class='add'>+	iounmap(gct_virtual);</div><div class='add'>+</div><div class='add'>+	bpi = gct.PD.BootPanelIndex;</div><div class='add'>+	dev_priv-&gt;gct_data.bpi = bpi;</div><div class='add'>+	dev_priv-&gt;gct_data.pt = gct.PD.PanelType;</div><div class='add'>+	dev_priv-&gt;gct_data.DTD = gct.panel[bpi].DTD;</div><div class='add'>+	dev_priv-&gt;gct_data.Panel_Port_Control =</div><div class='add'>+		gct.panel[bpi].Panel_Port_Control;</div><div class='add'>+	dev_priv-&gt;gct_data.Panel_MIPI_Display_Descriptor =</div><div class='add'>+		gct.panel[bpi].Panel_MIPI_Display_Descriptor;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mid_get_vbt_data_r10(struct drm_psb_private *dev_priv, u32 addr)</div><div class='add'>+{</div><div class='add'>+	struct vbt_r10 vbt;</div><div class='add'>+	void __iomem *gct_virtual;</div><div class='add'>+	struct gct_r10 *gct;</div><div class='add'>+	struct oaktrail_timing_info *dp_ti = &amp;dev_priv-&gt;gct_data.DTD;</div><div class='add'>+	struct gct_r10_timing_info *ti;</div><div class='add'>+	int ret = -1;</div><div class='add'>+</div><div class='add'>+	if (read_vbt_r10(addr, &amp;vbt))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	gct = kmalloc(sizeof(*gct) * vbt.panel_count, GFP_KERNEL);</div><div class='add'>+	if (!gct)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	gct_virtual = ioremap(addr + sizeof(vbt),</div><div class='add'>+			sizeof(*gct) * vbt.panel_count);</div><div class='add'>+	if (!gct_virtual)</div><div class='add'>+		goto out;</div><div class='add'>+	memcpy_fromio(gct, gct_virtual, sizeof(*gct));</div><div class='add'>+	iounmap(gct_virtual);</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;gct_data.bpi = vbt.primary_panel_idx;</div><div class='add'>+	dev_priv-&gt;gct_data.Panel_MIPI_Display_Descriptor =</div><div class='add'>+		gct[vbt.primary_panel_idx].Panel_MIPI_Display_Descriptor;</div><div class='add'>+</div><div class='add'>+	ti = &amp;gct[vbt.primary_panel_idx].DTD;</div><div class='add'>+	dp_ti-&gt;pixel_clock = ti-&gt;pixel_clock;</div><div class='add'>+	dp_ti-&gt;hactive_hi = ti-&gt;hactive_hi;</div><div class='add'>+	dp_ti-&gt;hactive_lo = ti-&gt;hactive_lo;</div><div class='add'>+	dp_ti-&gt;hblank_hi = ti-&gt;hblank_hi;</div><div class='add'>+	dp_ti-&gt;hblank_lo = ti-&gt;hblank_lo;</div><div class='add'>+	dp_ti-&gt;hsync_offset_hi = ti-&gt;hsync_offset_hi;</div><div class='add'>+	dp_ti-&gt;hsync_offset_lo = ti-&gt;hsync_offset_lo;</div><div class='add'>+	dp_ti-&gt;hsync_pulse_width_hi = ti-&gt;hsync_pulse_width_hi;</div><div class='add'>+	dp_ti-&gt;hsync_pulse_width_lo = ti-&gt;hsync_pulse_width_lo;</div><div class='add'>+	dp_ti-&gt;vactive_hi = ti-&gt;vactive_hi;</div><div class='add'>+	dp_ti-&gt;vactive_lo = ti-&gt;vactive_lo;</div><div class='add'>+	dp_ti-&gt;vblank_hi = ti-&gt;vblank_hi;</div><div class='add'>+	dp_ti-&gt;vblank_lo = ti-&gt;vblank_lo;</div><div class='add'>+	dp_ti-&gt;vsync_offset_hi = ti-&gt;vsync_offset_hi;</div><div class='add'>+	dp_ti-&gt;vsync_offset_lo = ti-&gt;vsync_offset_lo;</div><div class='add'>+	dp_ti-&gt;vsync_pulse_width_hi = ti-&gt;vsync_pulse_width_hi;</div><div class='add'>+	dp_ti-&gt;vsync_pulse_width_lo = ti-&gt;vsync_pulse_width_lo;</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+out:</div><div class='add'>+	kfree(gct);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mid_get_vbt_data(struct drm_psb_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = dev_priv-&gt;dev;</div><div class='del'>-	struct oaktrail_vbt *vbt = &amp;dev_priv-&gt;vbt_data;</div><div class='ctx'> 	u32 addr;</div><div class='del'>-	u16 new_size;</div><div class='del'>-	u8 *vbt_virtual;</div><div class='del'>-	u8 bpi;</div><div class='del'>-	u8 number_desc = 0;</div><div class='del'>-	struct oaktrail_timing_info *dp_ti = &amp;dev_priv-&gt;gct_data.DTD;</div><div class='del'>-	struct gct_r10_timing_info ti;</div><div class='del'>-	void *pGCT;</div><div class='add'>+	u8 __iomem *vbt_virtual;</div><div class='add'>+	struct vbt_header vbt_header;</div><div class='ctx'> 	struct pci_dev *pci_gfx_root = pci_get_bus_and_slot(0, PCI_DEVFN(2, 0));</div><div class='add'>+	int ret = -1;</div><div class='ctx'> </div><div class='del'>-	/* Get the address of the platform config vbt, B0:D2:F0;0xFC */</div><div class='add'>+	/* Get the address of the platform config vbt */</div><div class='ctx'> 	pci_read_config_dword(pci_gfx_root, 0xFC, &amp;addr);</div><div class='ctx'> 	pci_dev_put(pci_gfx_root);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev-&gt;dev, "drm platform config address is %x\n", addr);</div><div class='ctx'> </div><div class='del'>-	/* check for platform config address == 0. */</div><div class='del'>-	/* this means fw doesn't support vbt */</div><div class='del'>-</div><div class='del'>-	if (addr == 0) {</div><div class='del'>-		vbt-&gt;size = 0;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	if (!addr)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/* get the virtual address of the vbt */</div><div class='del'>-	vbt_virtual = ioremap(addr, sizeof(*vbt));</div><div class='del'>-	if (vbt_virtual == NULL) {</div><div class='del'>-		vbt-&gt;size = 0;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	vbt_virtual = ioremap(addr, sizeof(vbt_header));</div><div class='add'>+	if (!vbt_virtual)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	memcpy(vbt, vbt_virtual, sizeof(*vbt));</div><div class='del'>-	iounmap(vbt_virtual); /* Free virtual address space */</div><div class='add'>+	memcpy_fromio(&amp;vbt_header, vbt_virtual, sizeof(vbt_header));</div><div class='add'>+	iounmap(vbt_virtual);</div><div class='ctx'> </div><div class='del'>-	/* No matching signature don't process the data */</div><div class='del'>-	if (memcmp(vbt-&gt;signature, "$GCT", 4)) {</div><div class='del'>-		vbt-&gt;size = 0;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	if (memcmp(&amp;vbt_header.signature, "$GCT", 4))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev-&gt;dev, "GCT revision is %02x\n", vbt_header.revision);</div><div class='ctx'> </div><div class='del'>-	dev_dbg(dev-&gt;dev, "GCT revision is %x\n", vbt-&gt;revision);</div><div class='del'>-</div><div class='del'>-	switch (vbt-&gt;revision) {</div><div class='del'>-	case 0:</div><div class='del'>-		vbt-&gt;oaktrail_gct = ioremap(addr + sizeof(*vbt) - 4,</div><div class='del'>-					vbt-&gt;size - sizeof(*vbt) + 4);</div><div class='del'>-		pGCT = vbt-&gt;oaktrail_gct;</div><div class='del'>-		bpi = ((struct oaktrail_gct_v1 *)pGCT)-&gt;PD.BootPanelIndex;</div><div class='del'>-		dev_priv-&gt;gct_data.bpi = bpi;</div><div class='del'>-		dev_priv-&gt;gct_data.pt =</div><div class='del'>-			((struct oaktrail_gct_v1 *)pGCT)-&gt;PD.PanelType;</div><div class='del'>-		memcpy(&amp;dev_priv-&gt;gct_data.DTD,</div><div class='del'>-			&amp;((struct oaktrail_gct_v1 *)pGCT)-&gt;panel[bpi].DTD,</div><div class='del'>-				sizeof(struct oaktrail_timing_info));</div><div class='del'>-		dev_priv-&gt;gct_data.Panel_Port_Control =</div><div class='del'>-		  ((struct oaktrail_gct_v1 *)pGCT)-&gt;panel[bpi].Panel_Port_Control;</div><div class='del'>-		dev_priv-&gt;gct_data.Panel_MIPI_Display_Descriptor =</div><div class='del'>-			((struct oaktrail_gct_v1 *)pGCT)-&gt;panel[bpi].Panel_MIPI_Display_Descriptor;</div><div class='add'>+	switch (vbt_header.revision) {</div><div class='add'>+	case 0x00:</div><div class='add'>+		ret = mid_get_vbt_data_r0(dev_priv, addr);</div><div class='ctx'> 		break;</div><div class='del'>-	case 1:</div><div class='del'>-		vbt-&gt;oaktrail_gct = ioremap(addr + sizeof(*vbt) - 4,</div><div class='del'>-					vbt-&gt;size - sizeof(*vbt) + 4);</div><div class='del'>-		pGCT = vbt-&gt;oaktrail_gct;</div><div class='del'>-		bpi = ((struct oaktrail_gct_v2 *)pGCT)-&gt;PD.BootPanelIndex;</div><div class='del'>-		dev_priv-&gt;gct_data.bpi = bpi;</div><div class='del'>-		dev_priv-&gt;gct_data.pt =</div><div class='del'>-			((struct oaktrail_gct_v2 *)pGCT)-&gt;PD.PanelType;</div><div class='del'>-		memcpy(&amp;dev_priv-&gt;gct_data.DTD,</div><div class='del'>-			&amp;((struct oaktrail_gct_v2 *)pGCT)-&gt;panel[bpi].DTD,</div><div class='del'>-				sizeof(struct oaktrail_timing_info));</div><div class='del'>-		dev_priv-&gt;gct_data.Panel_Port_Control =</div><div class='del'>-		  ((struct oaktrail_gct_v2 *)pGCT)-&gt;panel[bpi].Panel_Port_Control;</div><div class='del'>-		dev_priv-&gt;gct_data.Panel_MIPI_Display_Descriptor =</div><div class='del'>-			((struct oaktrail_gct_v2 *)pGCT)-&gt;panel[bpi].Panel_MIPI_Display_Descriptor;</div><div class='add'>+	case 0x01:</div><div class='add'>+		ret = mid_get_vbt_data_r1(dev_priv, addr);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x10:</div><div class='del'>-		/*header definition changed from rev 01 (v2) to rev 10h. */</div><div class='del'>-		/*so, some values have changed location*/</div><div class='del'>-		new_size = vbt-&gt;checksum; /*checksum contains lo size byte*/</div><div class='del'>-		/*LSB of oaktrail_gct contains hi size byte*/</div><div class='del'>-		new_size |= ((0xff &amp; (unsigned int)(long)vbt-&gt;oaktrail_gct)) &lt;&lt; 8;</div><div class='del'>-</div><div class='del'>-		vbt-&gt;checksum = vbt-&gt;size; /*size contains the checksum*/</div><div class='del'>-		if (new_size &gt; 0xff)</div><div class='del'>-			vbt-&gt;size = 0xff; /*restrict size to 255*/</div><div class='del'>-		else</div><div class='del'>-			vbt-&gt;size = new_size;</div><div class='del'>-</div><div class='del'>-		/* number of descriptors defined in the GCT */</div><div class='del'>-		number_desc = ((0xff00 &amp; (unsigned int)(long)vbt-&gt;oaktrail_gct)) &gt;&gt; 8;</div><div class='del'>-		bpi = ((0xff0000 &amp; (unsigned int)(long)vbt-&gt;oaktrail_gct)) &gt;&gt; 16;</div><div class='del'>-		vbt-&gt;oaktrail_gct = ioremap(addr + GCT_R10_HEADER_SIZE,</div><div class='del'>-				GCT_R10_DISPLAY_DESC_SIZE * number_desc);</div><div class='del'>-		pGCT = vbt-&gt;oaktrail_gct;</div><div class='del'>-		pGCT = (u8 *)pGCT + (bpi*GCT_R10_DISPLAY_DESC_SIZE);</div><div class='del'>-		dev_priv-&gt;gct_data.bpi = bpi; /*save boot panel id*/</div><div class='del'>-</div><div class='del'>-		/*copy the GCT display timings into a temp structure*/</div><div class='del'>-		memcpy(&amp;ti, pGCT, sizeof(struct gct_r10_timing_info));</div><div class='del'>-</div><div class='del'>-		/*now copy the temp struct into the dev_priv-&gt;gct_data*/</div><div class='del'>-		dp_ti-&gt;pixel_clock = ti.pixel_clock;</div><div class='del'>-		dp_ti-&gt;hactive_hi = ti.hactive_hi;</div><div class='del'>-		dp_ti-&gt;hactive_lo = ti.hactive_lo;</div><div class='del'>-		dp_ti-&gt;hblank_hi = ti.hblank_hi;</div><div class='del'>-		dp_ti-&gt;hblank_lo = ti.hblank_lo;</div><div class='del'>-		dp_ti-&gt;hsync_offset_hi = ti.hsync_offset_hi;</div><div class='del'>-		dp_ti-&gt;hsync_offset_lo = ti.hsync_offset_lo;</div><div class='del'>-		dp_ti-&gt;hsync_pulse_width_hi = ti.hsync_pulse_width_hi;</div><div class='del'>-		dp_ti-&gt;hsync_pulse_width_lo = ti.hsync_pulse_width_lo;</div><div class='del'>-		dp_ti-&gt;vactive_hi = ti.vactive_hi;</div><div class='del'>-		dp_ti-&gt;vactive_lo = ti.vactive_lo;</div><div class='del'>-		dp_ti-&gt;vblank_hi = ti.vblank_hi;</div><div class='del'>-		dp_ti-&gt;vblank_lo = ti.vblank_lo;</div><div class='del'>-		dp_ti-&gt;vsync_offset_hi = ti.vsync_offset_hi;</div><div class='del'>-		dp_ti-&gt;vsync_offset_lo = ti.vsync_offset_lo;</div><div class='del'>-		dp_ti-&gt;vsync_pulse_width_hi = ti.vsync_pulse_width_hi;</div><div class='del'>-		dp_ti-&gt;vsync_pulse_width_lo = ti.vsync_pulse_width_lo;</div><div class='del'>-</div><div class='del'>-		/* Move the MIPI_Display_Descriptor data from GCT to dev priv */</div><div class='del'>-		dev_priv-&gt;gct_data.Panel_MIPI_Display_Descriptor =</div><div class='del'>-							*((u8 *)pGCT + 0x0d);</div><div class='del'>-		dev_priv-&gt;gct_data.Panel_MIPI_Display_Descriptor |=</div><div class='del'>-						(*((u8 *)pGCT + 0x0e)) &lt;&lt; 8;</div><div class='add'>+		ret = mid_get_vbt_data_r10(dev_priv, addr);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_err(dev-&gt;dev, "Unknown revision of GCT!\n");</div><div class='del'>-		vbt-&gt;size = 0;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "Unable to read GCT!");</div><div class='add'>+	else</div><div class='add'>+		dev_priv-&gt;has_gct = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mid_chip_setup(struct drm_device *dev)</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/oaktrail.h b/drivers/gpu/drm/gma500/oaktrail.h<br/>index 2da1f368f14e..f2f9f38a5362 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/oaktrail.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/oaktrail.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/oaktrail.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/oaktrail.h</a></div><div class='hunk'>@@ -19,14 +19,6 @@</div><div class='ctx'> </div><div class='ctx'> /* MID device specific descriptors */</div><div class='ctx'> </div><div class='del'>-struct oaktrail_vbt {</div><div class='del'>-	s8 signature[4];	/*4 bytes,"$GCT" */</div><div class='del'>-	u8 revision;</div><div class='del'>-	u8 size;</div><div class='del'>-	u8 checksum;</div><div class='del'>-	void *oaktrail_gct;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='ctx'> struct oaktrail_timing_info {</div><div class='ctx'> 	u16 pixel_clock;</div><div class='ctx'> 	u8 hactive_lo;</div><div class='hunk'>@@ -161,7 +153,7 @@ union oaktrail_panel_rx {</div><div class='ctx'> 	u16 panel_receiver;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-struct oaktrail_gct_v1 {</div><div class='add'>+struct gct_r0 {</div><div class='ctx'> 	union { /*8 bits,Defined as follows: */</div><div class='ctx'> 		struct {</div><div class='ctx'> 			u8 PanelType:4; /*4 bits, Bit field for panels*/</div><div class='hunk'>@@ -178,7 +170,7 @@ struct oaktrail_gct_v1 {</div><div class='ctx'> 	union oaktrail_panel_rx panelrx[4]; /* panel receivers*/</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-struct oaktrail_gct_v2 {</div><div class='add'>+struct gct_r1 {</div><div class='ctx'> 	union { /*8 bits,Defined as follows: */</div><div class='ctx'> 		struct {</div><div class='ctx'> 			u8 PanelType:4; /*4 bits, Bit field for panels*/</div><div class='hunk'>@@ -195,6 +187,16 @@ struct oaktrail_gct_v2 {</div><div class='ctx'> 	union oaktrail_panel_rx panelrx[4]; /* panel receivers*/</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+struct gct_r10 {</div><div class='add'>+	struct gct_r10_timing_info DTD;</div><div class='add'>+	u16 Panel_MIPI_Display_Descriptor;</div><div class='add'>+	u16 Panel_MIPI_Receiver_Descriptor;</div><div class='add'>+	u16 Panel_Backlight_Inverter_Descriptor;</div><div class='add'>+	u8 Panel_Initial_Brightness;</div><div class='add'>+	u32 MIPI_Ctlr_Init_ptr;</div><div class='add'>+	u32 MIPI_Panel_Init_ptr;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> struct oaktrail_gct_data {</div><div class='ctx'> 	u8 bpi; /* boot panel index, number of panel used during boot */</div><div class='ctx'> 	u8 pt; /* panel type, 4 bit field, 0=lvds, 1=mipi */</div><div class='hunk'>@@ -213,9 +215,6 @@ struct oaktrail_gct_data {</div><div class='ctx'> #define MODE_SETTING_IN_DSR		0x4</div><div class='ctx'> #define MODE_SETTING_ENCODER_DONE	0x8</div><div class='ctx'> </div><div class='del'>-#define GCT_R10_HEADER_SIZE		16</div><div class='del'>-#define GCT_R10_DISPLAY_DESC_SIZE	28</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  *	Moorestown HDMI interfaces</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/oaktrail_crtc.c b/drivers/gpu/drm/gma500/oaktrail_crtc.c<br/>index a39b0d0d680f..f821c835ca90 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/oaktrail_crtc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/oaktrail_crtc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/oaktrail_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/oaktrail_crtc.c</a></div><div class='hunk'>@@ -162,12 +162,10 @@ mrstFindBestPLL(struct drm_crtc *crtc, int target, int refclk,</div><div class='ctx'> static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='del'>-	int dpll_reg = (pipe == 0) ? MRST_DPLL_A : DPLL_B;</div><div class='del'>-	int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;</div><div class='del'>-	int dspbase_reg = (pipe == 0) ? MRST_DSPABASE : DSPBBASE;</div><div class='del'>-	int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	u32 temp;</div><div class='ctx'> </div><div class='ctx'> 	if (!gma_power_begin(dev, true))</div><div class='hunk'>@@ -181,32 +179,32 @@ static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> 	case DRM_MODE_DPMS_STANDBY:</div><div class='ctx'> 	case DRM_MODE_DPMS_SUSPEND:</div><div class='ctx'> 		/* Enable the DPLL */</div><div class='del'>-		temp = REG_READ(dpll_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;dpll);</div><div class='ctx'> 		if ((temp &amp; DPLL_VCO_ENABLE) == 0) {</div><div class='del'>-			REG_WRITE(dpll_reg, temp);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 			/* Wait for the clocks to stabilize. */</div><div class='ctx'> 			udelay(150);</div><div class='del'>-			REG_WRITE(dpll_reg, temp | DPLL_VCO_ENABLE);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp | DPLL_VCO_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 			/* Wait for the clocks to stabilize. */</div><div class='ctx'> 			udelay(150);</div><div class='del'>-			REG_WRITE(dpll_reg, temp | DPLL_VCO_ENABLE);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp | DPLL_VCO_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 			/* Wait for the clocks to stabilize. */</div><div class='ctx'> 			udelay(150);</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Enable the pipe */</div><div class='del'>-		temp = REG_READ(pipeconf_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 		if ((temp &amp; PIPEACONF_ENABLE) == 0)</div><div class='del'>-			REG_WRITE(pipeconf_reg, temp | PIPEACONF_ENABLE);</div><div class='add'>+			REG_WRITE(map-&gt;conf, temp | PIPEACONF_ENABLE);</div><div class='ctx'> 		/* Enable the plane */</div><div class='del'>-		temp = REG_READ(dspcntr_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;cntr);</div><div class='ctx'> 		if ((temp &amp; DISPLAY_PLANE_ENABLE) == 0) {</div><div class='del'>-			REG_WRITE(dspcntr_reg,</div><div class='add'>+			REG_WRITE(map-&gt;cntr,</div><div class='ctx'> 				  temp | DISPLAY_PLANE_ENABLE);</div><div class='ctx'> 			/* Flush the plane changes */</div><div class='del'>-			REG_WRITE(dspbase_reg, REG_READ(dspbase_reg));</div><div class='add'>+			REG_WRITE(map-&gt;base, REG_READ(map-&gt;base));</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		psb_intel_crtc_load_lut(crtc);</div><div class='hunk'>@@ -223,28 +221,28 @@ static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> 		/* Disable the VGA plane that we never use */</div><div class='ctx'> 		REG_WRITE(VGACNTRL, VGA_DISP_DISABLE);</div><div class='ctx'> 		/* Disable display plane */</div><div class='del'>-		temp = REG_READ(dspcntr_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;cntr);</div><div class='ctx'> 		if ((temp &amp; DISPLAY_PLANE_ENABLE) != 0) {</div><div class='del'>-			REG_WRITE(dspcntr_reg,</div><div class='add'>+			REG_WRITE(map-&gt;cntr,</div><div class='ctx'> 				  temp &amp; ~DISPLAY_PLANE_ENABLE);</div><div class='ctx'> 			/* Flush the plane changes */</div><div class='del'>-			REG_WRITE(dspbase_reg, REG_READ(dspbase_reg));</div><div class='del'>-			REG_READ(dspbase_reg);</div><div class='add'>+			REG_WRITE(map-&gt;base, REG_READ(map-&gt;base));</div><div class='add'>+			REG_READ(map-&gt;base);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Next, disable display pipes */</div><div class='del'>-		temp = REG_READ(pipeconf_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 		if ((temp &amp; PIPEACONF_ENABLE) != 0) {</div><div class='del'>-			REG_WRITE(pipeconf_reg, temp &amp; ~PIPEACONF_ENABLE);</div><div class='del'>-			REG_READ(pipeconf_reg);</div><div class='add'>+			REG_WRITE(map-&gt;conf, temp &amp; ~PIPEACONF_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;conf);</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Wait for for the pipe disable to take effect. */</div><div class='ctx'> 		psb_intel_wait_for_vblank(dev);</div><div class='ctx'> </div><div class='del'>-		temp = REG_READ(dpll_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;dpll);</div><div class='ctx'> 		if ((temp &amp; DPLL_VCO_ENABLE) != 0) {</div><div class='del'>-			REG_WRITE(dpll_reg, temp &amp; ~DPLL_VCO_ENABLE);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp &amp; ~DPLL_VCO_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Wait for the clocks to turn off. */</div><div class='hunk'>@@ -292,17 +290,7 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='del'>-	int fp_reg = (pipe == 0) ? MRST_FPA0 : FPB0;</div><div class='del'>-	int dpll_reg = (pipe == 0) ? MRST_DPLL_A : DPLL_B;</div><div class='del'>-	int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;</div><div class='del'>-	int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;</div><div class='del'>-	int htot_reg = (pipe == 0) ? HTOTAL_A : HTOTAL_B;</div><div class='del'>-	int hblank_reg = (pipe == 0) ? HBLANK_A : HBLANK_B;</div><div class='del'>-	int hsync_reg = (pipe == 0) ? HSYNC_A : HSYNC_B;</div><div class='del'>-	int vtot_reg = (pipe == 0) ? VTOTAL_A : VTOTAL_B;</div><div class='del'>-	int vblank_reg = (pipe == 0) ? VBLANK_A : VBLANK_B;</div><div class='del'>-	int vsync_reg = (pipe == 0) ? VSYNC_A : VSYNC_B;</div><div class='del'>-	int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	int refclk = 0;</div><div class='ctx'> 	struct oaktrail_clock_t clock;</div><div class='ctx'> 	u32 dpll = 0, fp = 0, dspcntr, pipeconf;</div><div class='hunk'>@@ -350,7 +338,7 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	if (oaktrail_panel_fitter_pipe(dev) == pipe)</div><div class='ctx'> 		REG_WRITE(PFIT_CONTROL, 0);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipesrc_reg,</div><div class='add'>+	REG_WRITE(map-&gt;src,</div><div class='ctx'> 		  ((mode-&gt;crtc_hdisplay - 1) &lt;&lt; 16) |</div><div class='ctx'> 		  (mode-&gt;crtc_vdisplay - 1));</div><div class='ctx'> </div><div class='hunk'>@@ -369,34 +357,34 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		offsetY = (adjusted_mode-&gt;crtc_vdisplay -</div><div class='ctx'> 			   mode-&gt;crtc_vdisplay) / 2;</div><div class='ctx'> </div><div class='del'>-		REG_WRITE(htot_reg, (mode-&gt;crtc_hdisplay - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;htotal, (mode-&gt;crtc_hdisplay - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_htotal - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(vtot_reg, (mode-&gt;crtc_vdisplay - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;vtotal, (mode-&gt;crtc_vdisplay - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_vtotal - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(hblank_reg,</div><div class='add'>+		REG_WRITE(map-&gt;hblank,</div><div class='ctx'> 			(adjusted_mode-&gt;crtc_hblank_start - offsetX - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_hblank_end - offsetX - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(hsync_reg,</div><div class='add'>+		REG_WRITE(map-&gt;hsync,</div><div class='ctx'> 			(adjusted_mode-&gt;crtc_hsync_start - offsetX - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_hsync_end - offsetX - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(vblank_reg,</div><div class='add'>+		REG_WRITE(map-&gt;vblank,</div><div class='ctx'> 			(adjusted_mode-&gt;crtc_vblank_start - offsetY - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_vblank_end - offsetY - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(vsync_reg,</div><div class='add'>+		REG_WRITE(map-&gt;vsync,</div><div class='ctx'> 			(adjusted_mode-&gt;crtc_vsync_start - offsetY - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_vsync_end - offsetY - 1) &lt;&lt; 16));</div><div class='ctx'> 	} else {</div><div class='del'>-		REG_WRITE(htot_reg, (adjusted_mode-&gt;crtc_hdisplay - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;htotal, (adjusted_mode-&gt;crtc_hdisplay - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_htotal - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(vtot_reg, (adjusted_mode-&gt;crtc_vdisplay - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;vtotal, (adjusted_mode-&gt;crtc_vdisplay - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_vtotal - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(hblank_reg, (adjusted_mode-&gt;crtc_hblank_start - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;hblank, (adjusted_mode-&gt;crtc_hblank_start - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_hblank_end - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(hsync_reg, (adjusted_mode-&gt;crtc_hsync_start - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;hsync, (adjusted_mode-&gt;crtc_hsync_start - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_hsync_end - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(vblank_reg, (adjusted_mode-&gt;crtc_vblank_start - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;vblank, (adjusted_mode-&gt;crtc_vblank_start - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_vblank_end - 1) &lt;&lt; 16));</div><div class='del'>-		REG_WRITE(vsync_reg, (adjusted_mode-&gt;crtc_vsync_start - 1) |</div><div class='add'>+		REG_WRITE(map-&gt;vsync, (adjusted_mode-&gt;crtc_vsync_start - 1) |</div><div class='ctx'> 			((adjusted_mode-&gt;crtc_vsync_end - 1) &lt;&lt; 16));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -408,10 +396,10 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* setup pipeconf */</div><div class='del'>-	pipeconf = REG_READ(pipeconf_reg);</div><div class='add'>+	pipeconf = REG_READ(map-&gt;conf);</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the display plane register */</div><div class='del'>-	dspcntr = REG_READ(dspcntr_reg);</div><div class='add'>+	dspcntr = REG_READ(map-&gt;cntr);</div><div class='ctx'> 	dspcntr |= DISPPLANE_GAMMA_ENABLE;</div><div class='ctx'> </div><div class='ctx'> 	if (pipe == 0)</div><div class='hunk'>@@ -467,30 +455,30 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	mrstPrintPll("chosen", &amp;clock);</div><div class='ctx'> </div><div class='ctx'> 	if (dpll &amp; DPLL_VCO_ENABLE) {</div><div class='del'>-		REG_WRITE(fp_reg, fp);</div><div class='del'>-		REG_WRITE(dpll_reg, dpll &amp; ~DPLL_VCO_ENABLE);</div><div class='del'>-		REG_READ(dpll_reg);</div><div class='add'>+		REG_WRITE(map-&gt;fp0, fp);</div><div class='add'>+		REG_WRITE(map-&gt;dpll, dpll &amp; ~DPLL_VCO_ENABLE);</div><div class='add'>+		REG_READ(map-&gt;dpll);</div><div class='ctx'> 		/* Check the DPLLA lock bit PIPEACONF[29] */</div><div class='ctx'> 		udelay(150);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(fp_reg, fp);</div><div class='del'>-	REG_WRITE(dpll_reg, dpll);</div><div class='del'>-	REG_READ(dpll_reg);</div><div class='add'>+	REG_WRITE(map-&gt;fp0, fp);</div><div class='add'>+	REG_WRITE(map-&gt;dpll, dpll);</div><div class='add'>+	REG_READ(map-&gt;dpll);</div><div class='ctx'> 	/* Wait for the clocks to stabilize. */</div><div class='ctx'> 	udelay(150);</div><div class='ctx'> </div><div class='ctx'> 	/* write it again -- the BIOS does, after all */</div><div class='del'>-	REG_WRITE(dpll_reg, dpll);</div><div class='del'>-	REG_READ(dpll_reg);</div><div class='add'>+	REG_WRITE(map-&gt;dpll, dpll);</div><div class='add'>+	REG_READ(map-&gt;dpll);</div><div class='ctx'> 	/* Wait for the clocks to stabilize. */</div><div class='ctx'> 	udelay(150);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeconf_reg, pipeconf);</div><div class='del'>-	REG_READ(pipeconf_reg);</div><div class='add'>+	REG_WRITE(map-&gt;conf, pipeconf);</div><div class='add'>+	REG_READ(map-&gt;conf);</div><div class='ctx'> 	psb_intel_wait_for_vblank(dev);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(dspcntr_reg, dspcntr);</div><div class='add'>+	REG_WRITE(map-&gt;cntr, dspcntr);</div><div class='ctx'> 	psb_intel_wait_for_vblank(dev);</div><div class='ctx'> </div><div class='ctx'> oaktrail_crtc_mode_set_exit:</div><div class='hunk'>@@ -509,15 +497,13 @@ static int oaktrail_pipe_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 			    int x, int y, struct drm_framebuffer *old_fb)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	struct psb_framebuffer *psbfb = to_psb_fb(crtc-&gt;fb);</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	unsigned long start, offset;</div><div class='ctx'> </div><div class='del'>-	int dspbase = (pipe == 0 ? DSPALINOFF : DSPBBASE);</div><div class='del'>-	int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);</div><div class='del'>-	int dspstride = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE;</div><div class='del'>-	int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;</div><div class='ctx'> 	u32 dspcntr;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -533,9 +519,9 @@ static int oaktrail_pipe_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 	start = psbfb-&gt;gtt-&gt;offset;</div><div class='ctx'> 	offset = y * crtc-&gt;fb-&gt;pitches[0] + x * (crtc-&gt;fb-&gt;bits_per_pixel / 8);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(dspstride, crtc-&gt;fb-&gt;pitches[0]);</div><div class='add'>+	REG_WRITE(map-&gt;stride, crtc-&gt;fb-&gt;pitches[0]);</div><div class='ctx'> </div><div class='del'>-	dspcntr = REG_READ(dspcntr_reg);</div><div class='add'>+	dspcntr = REG_READ(map-&gt;cntr);</div><div class='ctx'> 	dspcntr &amp;= ~DISPPLANE_PIXFORMAT_MASK;</div><div class='ctx'> </div><div class='ctx'> 	switch (crtc-&gt;fb-&gt;bits_per_pixel) {</div><div class='hunk'>@@ -557,12 +543,12 @@ static int oaktrail_pipe_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto pipe_set_base_exit;</div><div class='ctx'> 	}</div><div class='del'>-	REG_WRITE(dspcntr_reg, dspcntr);</div><div class='add'>+	REG_WRITE(map-&gt;cntr, dspcntr);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(dspbase, offset);</div><div class='del'>-	REG_READ(dspbase);</div><div class='del'>-	REG_WRITE(dspsurf, start);</div><div class='del'>-	REG_READ(dspsurf);</div><div class='add'>+	REG_WRITE(map-&gt;base, offset);</div><div class='add'>+	REG_READ(map-&gt;base);</div><div class='add'>+	REG_WRITE(map-&gt;surf, start);</div><div class='add'>+	REG_READ(map-&gt;surf);</div><div class='ctx'> </div><div class='ctx'> pipe_set_base_exit:</div><div class='ctx'> 	gma_power_end(dev);</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/oaktrail_device.c b/drivers/gpu/drm/gma500/oaktrail_device.c<br/>index 41d1924ea31e..0f9b7db80f6b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/oaktrail_device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/oaktrail_device.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/oaktrail_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/oaktrail_device.c</a></div><div class='hunk'>@@ -187,6 +187,7 @@ static int oaktrail_save_display_registers(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_save_area *regs = &amp;dev_priv-&gt;regs;</div><div class='add'>+	struct psb_pipe *p = &amp;regs-&gt;pipe[0];</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u32 pp_stat;</div><div class='ctx'> </div><div class='hunk'>@@ -201,24 +202,24 @@ static int oaktrail_save_display_registers(struct drm_device *dev)</div><div class='ctx'> 	regs-&gt;psb.saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT);</div><div class='ctx'> </div><div class='ctx'> 	/* Pipe &amp; plane A info */</div><div class='del'>-	regs-&gt;psb.savePIPEACONF = PSB_RVDC32(PIPEACONF);</div><div class='del'>-	regs-&gt;psb.savePIPEASRC = PSB_RVDC32(PIPEASRC);</div><div class='del'>-	regs-&gt;psb.saveFPA0 = PSB_RVDC32(MRST_FPA0);</div><div class='del'>-	regs-&gt;psb.saveFPA1 = PSB_RVDC32(MRST_FPA1);</div><div class='del'>-	regs-&gt;psb.saveDPLL_A = PSB_RVDC32(MRST_DPLL_A);</div><div class='del'>-	regs-&gt;psb.saveHTOTAL_A = PSB_RVDC32(HTOTAL_A);</div><div class='del'>-	regs-&gt;psb.saveHBLANK_A = PSB_RVDC32(HBLANK_A);</div><div class='del'>-	regs-&gt;psb.saveHSYNC_A = PSB_RVDC32(HSYNC_A);</div><div class='del'>-	regs-&gt;psb.saveVTOTAL_A = PSB_RVDC32(VTOTAL_A);</div><div class='del'>-	regs-&gt;psb.saveVBLANK_A = PSB_RVDC32(VBLANK_A);</div><div class='del'>-	regs-&gt;psb.saveVSYNC_A = PSB_RVDC32(VSYNC_A);</div><div class='add'>+	p-&gt;conf = PSB_RVDC32(PIPEACONF);</div><div class='add'>+	p-&gt;src = PSB_RVDC32(PIPEASRC);</div><div class='add'>+	p-&gt;fp0 = PSB_RVDC32(MRST_FPA0);</div><div class='add'>+	p-&gt;fp1 = PSB_RVDC32(MRST_FPA1);</div><div class='add'>+	p-&gt;dpll = PSB_RVDC32(MRST_DPLL_A);</div><div class='add'>+	p-&gt;htotal = PSB_RVDC32(HTOTAL_A);</div><div class='add'>+	p-&gt;hblank = PSB_RVDC32(HBLANK_A);</div><div class='add'>+	p-&gt;hsync = PSB_RVDC32(HSYNC_A);</div><div class='add'>+	p-&gt;vtotal = PSB_RVDC32(VTOTAL_A);</div><div class='add'>+	p-&gt;vblank = PSB_RVDC32(VBLANK_A);</div><div class='add'>+	p-&gt;vsync = PSB_RVDC32(VSYNC_A);</div><div class='ctx'> 	regs-&gt;psb.saveBCLRPAT_A = PSB_RVDC32(BCLRPAT_A);</div><div class='del'>-	regs-&gt;psb.saveDSPACNTR = PSB_RVDC32(DSPACNTR);</div><div class='del'>-	regs-&gt;psb.saveDSPASTRIDE = PSB_RVDC32(DSPASTRIDE);</div><div class='del'>-	regs-&gt;psb.saveDSPAADDR = PSB_RVDC32(DSPABASE);</div><div class='del'>-	regs-&gt;psb.saveDSPASURF = PSB_RVDC32(DSPASURF);</div><div class='del'>-	regs-&gt;psb.saveDSPALINOFF = PSB_RVDC32(DSPALINOFF);</div><div class='del'>-	regs-&gt;psb.saveDSPATILEOFF = PSB_RVDC32(DSPATILEOFF);</div><div class='add'>+	p-&gt;cntr = PSB_RVDC32(DSPACNTR);</div><div class='add'>+	p-&gt;stride = PSB_RVDC32(DSPASTRIDE);</div><div class='add'>+	p-&gt;addr = PSB_RVDC32(DSPABASE);</div><div class='add'>+	p-&gt;surf = PSB_RVDC32(DSPASURF);</div><div class='add'>+	p-&gt;linoff = PSB_RVDC32(DSPALINOFF);</div><div class='add'>+	p-&gt;tileoff = PSB_RVDC32(DSPATILEOFF);</div><div class='ctx'> </div><div class='ctx'> 	/* Save cursor regs */</div><div class='ctx'> 	regs-&gt;psb.saveDSPACURSOR_CTRL = PSB_RVDC32(CURACNTR);</div><div class='hunk'>@@ -227,7 +228,7 @@ static int oaktrail_save_display_registers(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Save palette (gamma) */</div><div class='ctx'> 	for (i = 0; i &lt; 256; i++)</div><div class='del'>-		regs-&gt;psb.save_palette_a[i] = PSB_RVDC32(PALETTE_A + (i &lt;&lt; 2));</div><div class='add'>+		p-&gt;palette[i] = PSB_RVDC32(PALETTE_A + (i &lt;&lt; 2));</div><div class='ctx'> </div><div class='ctx'> 	if (dev_priv-&gt;hdmi_priv)</div><div class='ctx'> 		oaktrail_hdmi_save(dev);</div><div class='hunk'>@@ -300,6 +301,7 @@ static int oaktrail_restore_display_registers(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_save_area *regs = &amp;dev_priv-&gt;regs;</div><div class='add'>+	struct psb_pipe *p = &amp;regs-&gt;pipe[0];</div><div class='ctx'> 	u32 pp_stat;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -317,21 +319,21 @@ static int oaktrail_restore_display_registers(struct drm_device *dev)</div><div class='ctx'> 	PSB_WVDC32(0x80000000, VGACNTRL);</div><div class='ctx'> </div><div class='ctx'> 	/* set the plls */</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveFPA0, MRST_FPA0);</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveFPA1, MRST_FPA1);</div><div class='add'>+	PSB_WVDC32(p-&gt;fp0, MRST_FPA0);</div><div class='add'>+	PSB_WVDC32(p-&gt;fp1, MRST_FPA1);</div><div class='ctx'> </div><div class='ctx'> 	/* Actually enable it */</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveDPLL_A, MRST_DPLL_A);</div><div class='add'>+	PSB_WVDC32(p-&gt;dpll, MRST_DPLL_A);</div><div class='ctx'> 	DRM_UDELAY(150);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore mode */</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveHTOTAL_A, HTOTAL_A);</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveHBLANK_A, HBLANK_A);</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveHSYNC_A, HSYNC_A);</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveVTOTAL_A, VTOTAL_A);</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveVBLANK_A, VBLANK_A);</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveVSYNC_A, VSYNC_A);</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.savePIPEASRC, PIPEASRC);</div><div class='add'>+	PSB_WVDC32(p-&gt;htotal, HTOTAL_A);</div><div class='add'>+	PSB_WVDC32(p-&gt;hblank, HBLANK_A);</div><div class='add'>+	PSB_WVDC32(p-&gt;hsync, HSYNC_A);</div><div class='add'>+	PSB_WVDC32(p-&gt;vtotal, VTOTAL_A);</div><div class='add'>+	PSB_WVDC32(p-&gt;vblank, VBLANK_A);</div><div class='add'>+	PSB_WVDC32(p-&gt;vsync, VSYNC_A);</div><div class='add'>+	PSB_WVDC32(p-&gt;src, PIPEASRC);</div><div class='ctx'> 	PSB_WVDC32(regs-&gt;psb.saveBCLRPAT_A, BCLRPAT_A);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore performance mode*/</div><div class='hunk'>@@ -339,16 +341,16 @@ static int oaktrail_restore_display_registers(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Enable the pipe*/</div><div class='ctx'> 	if (dev_priv-&gt;iLVDS_enable)</div><div class='del'>-		PSB_WVDC32(regs-&gt;psb.savePIPEACONF, PIPEACONF);</div><div class='add'>+		PSB_WVDC32(p-&gt;conf, PIPEACONF);</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the plane*/</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveDSPALINOFF, DSPALINOFF);</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveDSPASTRIDE, DSPASTRIDE);</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveDSPATILEOFF, DSPATILEOFF);</div><div class='add'>+	PSB_WVDC32(p-&gt;linoff, DSPALINOFF);</div><div class='add'>+	PSB_WVDC32(p-&gt;stride, DSPASTRIDE);</div><div class='add'>+	PSB_WVDC32(p-&gt;tileoff, DSPATILEOFF);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable the plane */</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveDSPACNTR, DSPACNTR);</div><div class='del'>-	PSB_WVDC32(regs-&gt;psb.saveDSPASURF, DSPASURF);</div><div class='add'>+	PSB_WVDC32(p-&gt;cntr, DSPACNTR);</div><div class='add'>+	PSB_WVDC32(p-&gt;surf, DSPASURF);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable Cursor A */</div><div class='ctx'> 	PSB_WVDC32(regs-&gt;psb.saveDSPACURSOR_CTRL, CURACNTR);</div><div class='hunk'>@@ -357,7 +359,7 @@ static int oaktrail_restore_display_registers(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Restore palette (gamma) */</div><div class='ctx'> 	for (i = 0; i &lt; 256; i++)</div><div class='del'>-		PSB_WVDC32(regs-&gt;psb.save_palette_a[i], PALETTE_A + (i &lt;&lt; 2));</div><div class='add'>+		PSB_WVDC32(p-&gt;palette[i], PALETTE_A + (i &lt;&lt; 2));</div><div class='ctx'> </div><div class='ctx'> 	if (dev_priv-&gt;hdmi_priv)</div><div class='ctx'> 		oaktrail_hdmi_restore(dev);</div><div class='hunk'>@@ -454,31 +456,84 @@ static int oaktrail_power_up(struct drm_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Oaktrail */</div><div class='add'>+static const struct psb_offset oaktrail_regmap[2] = {</div><div class='add'>+	{</div><div class='add'>+		.fp0 = MRST_FPA0,</div><div class='add'>+		.fp1 = MRST_FPA1,</div><div class='add'>+		.cntr = DSPACNTR,</div><div class='add'>+		.conf = PIPEACONF,</div><div class='add'>+		.src = PIPEASRC,</div><div class='add'>+		.dpll = MRST_DPLL_A,</div><div class='add'>+		.htotal = HTOTAL_A,</div><div class='add'>+		.hblank = HBLANK_A,</div><div class='add'>+		.hsync = HSYNC_A,</div><div class='add'>+		.vtotal = VTOTAL_A,</div><div class='add'>+		.vblank = VBLANK_A,</div><div class='add'>+		.vsync = VSYNC_A,</div><div class='add'>+		.stride = DSPASTRIDE,</div><div class='add'>+		.size = DSPASIZE,</div><div class='add'>+		.pos = DSPAPOS,</div><div class='add'>+		.surf = DSPASURF,</div><div class='add'>+		.addr = MRST_DSPABASE,</div><div class='add'>+		.status = PIPEASTAT,</div><div class='add'>+		.linoff = DSPALINOFF,</div><div class='add'>+		.tileoff = DSPATILEOFF,</div><div class='add'>+		.palette = PALETTE_A,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.fp0 = FPB0,</div><div class='add'>+		.fp1 = FPB1,</div><div class='add'>+		.cntr = DSPBCNTR,</div><div class='add'>+		.conf = PIPEBCONF,</div><div class='add'>+		.src = PIPEBSRC,</div><div class='add'>+		.dpll = DPLL_B,</div><div class='add'>+		.htotal = HTOTAL_B,</div><div class='add'>+		.hblank = HBLANK_B,</div><div class='add'>+		.hsync = HSYNC_B,</div><div class='add'>+		.vtotal = VTOTAL_B,</div><div class='add'>+		.vblank = VBLANK_B,</div><div class='add'>+		.vsync = VSYNC_B,</div><div class='add'>+		.stride = DSPBSTRIDE,</div><div class='add'>+		.size = DSPBSIZE,</div><div class='add'>+		.pos = DSPBPOS,</div><div class='add'>+		.surf = DSPBSURF,</div><div class='add'>+		.addr = DSPBBASE,</div><div class='add'>+		.status = PIPEBSTAT,</div><div class='add'>+		.linoff = DSPBLINOFF,</div><div class='add'>+		.tileoff = DSPBTILEOFF,</div><div class='add'>+		.palette = PALETTE_B,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static int oaktrail_chip_setup(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct oaktrail_vbt *vbt = &amp;dev_priv-&gt;vbt_data;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	</div><div class='add'>+	if (pci_enable_msi(dev-&gt;pdev))</div><div class='add'>+		dev_warn(dev-&gt;dev, "Enabling MSI failed!\n");</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;regmap = oaktrail_regmap;</div><div class='add'>+</div><div class='ctx'> 	ret = mid_chip_setup(dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='del'>-	if (vbt-&gt;size == 0) {</div><div class='add'>+	if (!dev_priv-&gt;has_gct) {</div><div class='ctx'> 		/* Now pull the BIOS data */</div><div class='del'>-		gma_intel_opregion_init(dev);</div><div class='add'>+		psb_intel_opregion_init(dev);</div><div class='ctx'> 		psb_intel_init_bios(dev);</div><div class='ctx'> 	}</div><div class='add'>+	oaktrail_hdmi_setup(dev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void oaktrail_teardown(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct oaktrail_vbt *vbt = &amp;dev_priv-&gt;vbt_data;</div><div class='ctx'> </div><div class='ctx'> 	oaktrail_hdmi_teardown(dev);</div><div class='del'>-	if (vbt-&gt;size == 0)</div><div class='add'>+	if (!dev_priv-&gt;has_gct)</div><div class='ctx'> 		psb_intel_destroy_bios(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -487,6 +542,9 @@ const struct psb_ops oaktrail_chip_ops = {</div><div class='ctx'> 	.accel_2d = 1,</div><div class='ctx'> 	.pipes = 2,</div><div class='ctx'> 	.crtcs = 2,</div><div class='add'>+	.hdmi_mask = (1 &lt;&lt; 0),</div><div class='add'>+	.lvds_mask = (1 &lt;&lt; 0),</div><div class='add'>+	.cursor_needs_phys = 0,</div><div class='ctx'> 	.sgx_offset = MRST_SGX_OFFSET,</div><div class='ctx'> </div><div class='ctx'> 	.chip_setup = oaktrail_chip_setup,</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/oaktrail_hdmi.c b/drivers/gpu/drm/gma500/oaktrail_hdmi.c<br/>index f8b367b45f66..c10899c953b9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/oaktrail_hdmi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/oaktrail_hdmi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/oaktrail_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/oaktrail_hdmi.c</a></div><div class='hunk'>@@ -179,7 +179,6 @@ static void oaktrail_hdmi_dpms(struct drm_encoder *encoder, int mode)</div><div class='ctx'> static int oaktrail_hdmi_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 				struct drm_display_mode *mode)</div><div class='ctx'> {</div><div class='del'>-	struct drm_psb_private *dev_priv = connector-&gt;dev-&gt;dev_private;</div><div class='ctx'> 	if (mode-&gt;clock &gt; 165000)</div><div class='ctx'> 		return MODE_CLOCK_HIGH;</div><div class='ctx'> 	if (mode-&gt;clock &lt; 20000)</div><div class='hunk'>@@ -188,11 +187,6 @@ static int oaktrail_hdmi_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLSCAN)</div><div class='ctx'> 		return MODE_NO_DBLESCAN;</div><div class='ctx'> </div><div class='del'>-	/* We assume worst case scenario of 32 bpp here, since we don't know */</div><div class='del'>-	if ((ALIGN(mode-&gt;hdisplay * 4, 64) * mode-&gt;vdisplay) &gt;</div><div class='del'>-	    dev_priv-&gt;vram_stolen_size)</div><div class='del'>-		return MODE_MEM;</div><div class='del'>-</div><div class='ctx'> 	return MODE_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -440,6 +434,7 @@ void oaktrail_hdmi_save(struct drm_device *dev)</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct oaktrail_hdmi_dev *hdmi_dev = dev_priv-&gt;hdmi_priv;</div><div class='ctx'> 	struct psb_state *regs = &amp;dev_priv-&gt;regs.psb;</div><div class='add'>+	struct psb_pipe *pipeb = &amp;dev_priv-&gt;regs.pipe[1];</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* dpll */</div><div class='hunk'>@@ -450,14 +445,14 @@ void oaktrail_hdmi_save(struct drm_device *dev)</div><div class='ctx'> 	hdmi_dev-&gt;saveDPLL_CLK_ENABLE = PSB_RVDC32(DPLL_CLK_ENABLE);</div><div class='ctx'> </div><div class='ctx'> 	/* pipe B */</div><div class='del'>-	regs-&gt;savePIPEBCONF = PSB_RVDC32(PIPEBCONF);</div><div class='del'>-	regs-&gt;savePIPEBSRC  = PSB_RVDC32(PIPEBSRC);</div><div class='del'>-	regs-&gt;saveHTOTAL_B  = PSB_RVDC32(HTOTAL_B);</div><div class='del'>-	regs-&gt;saveHBLANK_B  = PSB_RVDC32(HBLANK_B);</div><div class='del'>-	regs-&gt;saveHSYNC_B   = PSB_RVDC32(HSYNC_B);</div><div class='del'>-	regs-&gt;saveVTOTAL_B  = PSB_RVDC32(VTOTAL_B);</div><div class='del'>-	regs-&gt;saveVBLANK_B  = PSB_RVDC32(VBLANK_B);</div><div class='del'>-	regs-&gt;saveVSYNC_B   = PSB_RVDC32(VSYNC_B);</div><div class='add'>+	pipeb-&gt;conf = PSB_RVDC32(PIPEBCONF);</div><div class='add'>+	pipeb-&gt;src = PSB_RVDC32(PIPEBSRC);</div><div class='add'>+	pipeb-&gt;htotal = PSB_RVDC32(HTOTAL_B);</div><div class='add'>+	pipeb-&gt;hblank = PSB_RVDC32(HBLANK_B);</div><div class='add'>+	pipeb-&gt;hsync = PSB_RVDC32(HSYNC_B);</div><div class='add'>+	pipeb-&gt;vtotal = PSB_RVDC32(VTOTAL_B);</div><div class='add'>+	pipeb-&gt;vblank = PSB_RVDC32(VBLANK_B);</div><div class='add'>+	pipeb-&gt;vsync = PSB_RVDC32(VSYNC_B);</div><div class='ctx'> </div><div class='ctx'> 	hdmi_dev-&gt;savePCH_PIPEBCONF = PSB_RVDC32(PCH_PIPEBCONF);</div><div class='ctx'> 	hdmi_dev-&gt;savePCH_PIPEBSRC = PSB_RVDC32(PCH_PIPEBSRC);</div><div class='hunk'>@@ -469,12 +464,12 @@ void oaktrail_hdmi_save(struct drm_device *dev)</div><div class='ctx'> 	hdmi_dev-&gt;savePCH_VSYNC_B  = PSB_RVDC32(PCH_VSYNC_B);</div><div class='ctx'> </div><div class='ctx'> 	/* plane */</div><div class='del'>-	regs-&gt;saveDSPBCNTR = PSB_RVDC32(DSPBCNTR);</div><div class='del'>-	regs-&gt;saveDSPBSTRIDE = PSB_RVDC32(DSPBSTRIDE);</div><div class='del'>-	regs-&gt;saveDSPBADDR = PSB_RVDC32(DSPBBASE);</div><div class='del'>-	regs-&gt;saveDSPBSURF = PSB_RVDC32(DSPBSURF);</div><div class='del'>-	regs-&gt;saveDSPBLINOFF = PSB_RVDC32(DSPBLINOFF);</div><div class='del'>-	regs-&gt;saveDSPBTILEOFF = PSB_RVDC32(DSPBTILEOFF);</div><div class='add'>+	pipeb-&gt;cntr = PSB_RVDC32(DSPBCNTR);</div><div class='add'>+	pipeb-&gt;stride = PSB_RVDC32(DSPBSTRIDE);</div><div class='add'>+	pipeb-&gt;addr = PSB_RVDC32(DSPBBASE);</div><div class='add'>+	pipeb-&gt;surf = PSB_RVDC32(DSPBSURF);</div><div class='add'>+	pipeb-&gt;linoff = PSB_RVDC32(DSPBLINOFF);</div><div class='add'>+	pipeb-&gt;tileoff = PSB_RVDC32(DSPBTILEOFF);</div><div class='ctx'> </div><div class='ctx'> 	/* cursor B */</div><div class='ctx'> 	regs-&gt;saveDSPBCURSOR_CTRL = PSB_RVDC32(CURBCNTR);</div><div class='hunk'>@@ -483,7 +478,7 @@ void oaktrail_hdmi_save(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* save palette */</div><div class='ctx'> 	for (i = 0; i &lt; 256; i++)</div><div class='del'>-		regs-&gt;save_palette_b[i] = PSB_RVDC32(PALETTE_B + (i &lt;&lt; 2));</div><div class='add'>+		pipeb-&gt;palette[i] = PSB_RVDC32(PALETTE_B + (i &lt;&lt; 2));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* restore HDMI register state */</div><div class='hunk'>@@ -492,6 +487,7 @@ void oaktrail_hdmi_restore(struct drm_device *dev)</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct oaktrail_hdmi_dev *hdmi_dev = dev_priv-&gt;hdmi_priv;</div><div class='ctx'> 	struct psb_state *regs = &amp;dev_priv-&gt;regs.psb;</div><div class='add'>+	struct psb_pipe *pipeb = &amp;dev_priv-&gt;regs.pipe[1];</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* dpll */</div><div class='hunk'>@@ -503,13 +499,13 @@ void oaktrail_hdmi_restore(struct drm_device *dev)</div><div class='ctx'> 	DRM_UDELAY(150);</div><div class='ctx'> </div><div class='ctx'> 	/* pipe */</div><div class='del'>-	PSB_WVDC32(regs-&gt;savePIPEBSRC, PIPEBSRC);</div><div class='del'>-	PSB_WVDC32(regs-&gt;saveHTOTAL_B, HTOTAL_B);</div><div class='del'>-	PSB_WVDC32(regs-&gt;saveHBLANK_B, HBLANK_B);</div><div class='del'>-	PSB_WVDC32(regs-&gt;saveHSYNC_B,  HSYNC_B);</div><div class='del'>-	PSB_WVDC32(regs-&gt;saveVTOTAL_B, VTOTAL_B);</div><div class='del'>-	PSB_WVDC32(regs-&gt;saveVBLANK_B, VBLANK_B);</div><div class='del'>-	PSB_WVDC32(regs-&gt;saveVSYNC_B,  VSYNC_B);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;src, PIPEBSRC);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;htotal, HTOTAL_B);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;hblank, HBLANK_B);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;hsync,  HSYNC_B);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;vtotal, VTOTAL_B);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;vblank, VBLANK_B);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;vsync,  VSYNC_B);</div><div class='ctx'> </div><div class='ctx'> 	PSB_WVDC32(hdmi_dev-&gt;savePCH_PIPEBSRC, PCH_PIPEBSRC);</div><div class='ctx'> 	PSB_WVDC32(hdmi_dev-&gt;savePCH_HTOTAL_B, PCH_HTOTAL_B);</div><div class='hunk'>@@ -519,15 +515,15 @@ void oaktrail_hdmi_restore(struct drm_device *dev)</div><div class='ctx'> 	PSB_WVDC32(hdmi_dev-&gt;savePCH_VBLANK_B, PCH_VBLANK_B);</div><div class='ctx'> 	PSB_WVDC32(hdmi_dev-&gt;savePCH_VSYNC_B,  PCH_VSYNC_B);</div><div class='ctx'> </div><div class='del'>-	PSB_WVDC32(regs-&gt;savePIPEBCONF, PIPEBCONF);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;conf, PIPEBCONF);</div><div class='ctx'> 	PSB_WVDC32(hdmi_dev-&gt;savePCH_PIPEBCONF, PCH_PIPEBCONF);</div><div class='ctx'> </div><div class='ctx'> 	/* plane */</div><div class='del'>-	PSB_WVDC32(regs-&gt;saveDSPBLINOFF, DSPBLINOFF);</div><div class='del'>-	PSB_WVDC32(regs-&gt;saveDSPBSTRIDE, DSPBSTRIDE);</div><div class='del'>-	PSB_WVDC32(regs-&gt;saveDSPBTILEOFF, DSPBTILEOFF);</div><div class='del'>-	PSB_WVDC32(regs-&gt;saveDSPBCNTR, DSPBCNTR);</div><div class='del'>-	PSB_WVDC32(regs-&gt;saveDSPBSURF, DSPBSURF);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;linoff, DSPBLINOFF);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;stride, DSPBSTRIDE);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;tileoff, DSPBTILEOFF);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;cntr, DSPBCNTR);</div><div class='add'>+	PSB_WVDC32(pipeb-&gt;surf, DSPBSURF);</div><div class='ctx'> </div><div class='ctx'> 	/* cursor B */</div><div class='ctx'> 	PSB_WVDC32(regs-&gt;saveDSPBCURSOR_CTRL, CURBCNTR);</div><div class='hunk'>@@ -536,5 +532,5 @@ void oaktrail_hdmi_restore(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* restore palette */</div><div class='ctx'> 	for (i = 0; i &lt; 256; i++)</div><div class='del'>-		PSB_WVDC32(regs-&gt;save_palette_b[i], PALETTE_B + (i &lt;&lt; 2));</div><div class='add'>+		PSB_WVDC32(pipeb-&gt;palette[i], PALETTE_B + (i &lt;&lt; 2));</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c b/drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c<br/>index 5e84fbde749b..88627e3ba1e3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c</a></div><div class='hunk'>@@ -250,7 +250,7 @@ static irqreturn_t oaktrail_hdmi_i2c_handler(int this_irq, void *dev)</div><div class='ctx'>  */</div><div class='ctx'> static void oaktrail_hdmi_i2c_gpio_fix(void)</div><div class='ctx'> {</div><div class='del'>-	void *base;</div><div class='add'>+	void __iomem *base;</div><div class='ctx'> 	unsigned int gpio_base = 0xff12c000;</div><div class='ctx'> 	int gpio_len = 0x1000;</div><div class='ctx'> 	u32 temp;</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/oaktrail_lvds.c b/drivers/gpu/drm/gma500/oaktrail_lvds.c<br/>index 654f32b22b21..558c77fb55ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/oaktrail_lvds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/oaktrail_lvds.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/oaktrail_lvds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/oaktrail_lvds.c</a></div><div class='hunk'>@@ -257,7 +257,7 @@ static void oaktrail_lvds_get_configuration_mode(struct drm_device *dev,</div><div class='ctx'> 	mode_dev-&gt;panel_fixed_mode = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* Use the firmware provided data on Moorestown */</div><div class='del'>-	if (dev_priv-&gt;vbt_data.size != 0x00) { /*if non-zero, then use vbt*/</div><div class='add'>+	if (dev_priv-&gt;has_gct) {</div><div class='ctx'> 		mode = kzalloc(sizeof(*mode), GFP_KERNEL);</div><div class='ctx'> 		if (!mode)</div><div class='ctx'> 			return;</div><div class='hunk'>@@ -371,7 +371,7 @@ void oaktrail_lvds_init(struct drm_device *dev,</div><div class='ctx'> 					BRIGHTNESS_MAX_LEVEL);</div><div class='ctx'> </div><div class='ctx'> 	mode_dev-&gt;panel_wants_dither = false;</div><div class='del'>-	if (dev_priv-&gt;vbt_data.size != 0x00)</div><div class='add'>+	if (dev_priv-&gt;has_gct)</div><div class='ctx'> 		mode_dev-&gt;panel_wants_dither = (dev_priv-&gt;gct_data.</div><div class='ctx'> 			Panel_Port_Control &amp; MRST_PANEL_8TO6_DITHER_ENABLE);</div><div class='ctx'>         if (dev_priv-&gt;lvds_dither)</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/opregion.c b/drivers/gpu/drm/gma500/opregion.c<br/>new file mode 100644<br/>index 000000000000..4f186eca3a30<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/opregion.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/opregion.c</a></div><div class='hunk'>@@ -0,0 +1,344 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2011 Intel Corporation</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the next</div><div class='add'>+ * paragraph) shall be included in all copies or substantial portions of the</div><div class='add'>+ * Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER</div><div class='add'>+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER</div><div class='add'>+ * DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='add'>+#include &lt;linux/acpi_io.h&gt;</div><div class='add'>+#include "psb_drv.h"</div><div class='add'>+#include "psb_intel_reg.h"</div><div class='add'>+</div><div class='add'>+#define PCI_ASLE 0xe4</div><div class='add'>+#define PCI_ASLS 0xfc</div><div class='add'>+</div><div class='add'>+#define OPREGION_HEADER_OFFSET 0</div><div class='add'>+#define OPREGION_ACPI_OFFSET   0x100</div><div class='add'>+#define   ACPI_CLID 0x01ac /* current lid state indicator */</div><div class='add'>+#define   ACPI_CDCK 0x01b0 /* current docking state indicator */</div><div class='add'>+#define OPREGION_SWSCI_OFFSET  0x200</div><div class='add'>+#define OPREGION_ASLE_OFFSET   0x300</div><div class='add'>+#define OPREGION_VBT_OFFSET    0x400</div><div class='add'>+</div><div class='add'>+#define OPREGION_SIGNATURE "IntelGraphicsMem"</div><div class='add'>+#define MBOX_ACPI      (1&lt;&lt;0)</div><div class='add'>+#define MBOX_SWSCI     (1&lt;&lt;1)</div><div class='add'>+#define MBOX_ASLE      (1&lt;&lt;2)</div><div class='add'>+</div><div class='add'>+struct opregion_header {</div><div class='add'>+	u8 signature[16];</div><div class='add'>+	u32 size;</div><div class='add'>+	u32 opregion_ver;</div><div class='add'>+	u8 bios_ver[32];</div><div class='add'>+	u8 vbios_ver[16];</div><div class='add'>+	u8 driver_ver[16];</div><div class='add'>+	u32 mboxes;</div><div class='add'>+	u8 reserved[164];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* OpRegion mailbox #1: public ACPI methods */</div><div class='add'>+struct opregion_acpi {</div><div class='add'>+	u32 drdy;	/* driver readiness */</div><div class='add'>+	u32 csts;	/* notification status */</div><div class='add'>+	u32 cevt;	/* current event */</div><div class='add'>+	u8 rsvd1[20];</div><div class='add'>+	u32 didl[8];	/* supported display devices ID list */</div><div class='add'>+	u32 cpdl[8];	/* currently presented display list */</div><div class='add'>+	u32 cadl[8];	/* currently active display list */</div><div class='add'>+	u32 nadl[8];	/* next active devices list */</div><div class='add'>+	u32 aslp;	/* ASL sleep time-out */</div><div class='add'>+	u32 tidx;	/* toggle table index */</div><div class='add'>+	u32 chpd;	/* current hotplug enable indicator */</div><div class='add'>+	u32 clid;	/* current lid state*/</div><div class='add'>+	u32 cdck;	/* current docking state */</div><div class='add'>+	u32 sxsw;	/* Sx state resume */</div><div class='add'>+	u32 evts;	/* ASL supported events */</div><div class='add'>+	u32 cnot;	/* current OS notification */</div><div class='add'>+	u32 nrdy;	/* driver status */</div><div class='add'>+	u8 rsvd2[60];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* OpRegion mailbox #2: SWSCI */</div><div class='add'>+struct opregion_swsci {</div><div class='add'>+	/*FIXME: add it later*/</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* OpRegion mailbox #3: ASLE */</div><div class='add'>+struct opregion_asle {</div><div class='add'>+	u32 ardy;	/* driver readiness */</div><div class='add'>+	u32 aslc;	/* ASLE interrupt command */</div><div class='add'>+	u32 tche;	/* technology enabled indicator */</div><div class='add'>+	u32 alsi;	/* current ALS illuminance reading */</div><div class='add'>+	u32 bclp;	/* backlight brightness to set */</div><div class='add'>+	u32 pfit;	/* panel fitting state */</div><div class='add'>+	u32 cblv;	/* current brightness level */</div><div class='add'>+	u16 bclm[20];	/* backlight level duty cycle mapping table */</div><div class='add'>+	u32 cpfm;	/* current panel fitting mode */</div><div class='add'>+	u32 epfm;	/* enabled panel fitting modes */</div><div class='add'>+	u8 plut[74];	/* panel LUT and identifier */</div><div class='add'>+	u32 pfmb;	/* PWM freq and min brightness */</div><div class='add'>+	u8 rsvd[102];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* ASLE irq request bits */</div><div class='add'>+#define ASLE_SET_ALS_ILLUM     (1 &lt;&lt; 0)</div><div class='add'>+#define ASLE_SET_BACKLIGHT     (1 &lt;&lt; 1)</div><div class='add'>+#define ASLE_SET_PFIT          (1 &lt;&lt; 2)</div><div class='add'>+#define ASLE_SET_PWM_FREQ      (1 &lt;&lt; 3)</div><div class='add'>+#define ASLE_REQ_MSK           0xf</div><div class='add'>+</div><div class='add'>+/* response bits of ASLE irq request */</div><div class='add'>+#define ASLE_ALS_ILLUM_FAILED   (1&lt;&lt;10)</div><div class='add'>+#define ASLE_BACKLIGHT_FAILED   (1&lt;&lt;12)</div><div class='add'>+#define ASLE_PFIT_FAILED        (1&lt;&lt;14)</div><div class='add'>+#define ASLE_PWM_FREQ_FAILED    (1&lt;&lt;16)</div><div class='add'>+</div><div class='add'>+/* ASLE backlight brightness to set */</div><div class='add'>+#define ASLE_BCLP_VALID                (1&lt;&lt;31)</div><div class='add'>+#define ASLE_BCLP_MSK          (~(1&lt;&lt;31))</div><div class='add'>+</div><div class='add'>+/* ASLE panel fitting request */</div><div class='add'>+#define ASLE_PFIT_VALID         (1&lt;&lt;31)</div><div class='add'>+#define ASLE_PFIT_CENTER (1&lt;&lt;0)</div><div class='add'>+#define ASLE_PFIT_STRETCH_TEXT (1&lt;&lt;1)</div><div class='add'>+#define ASLE_PFIT_STRETCH_GFX (1&lt;&lt;2)</div><div class='add'>+</div><div class='add'>+/* response bits of ASLE irq request */</div><div class='add'>+#define ASLE_ALS_ILLUM_FAILED	(1&lt;&lt;10)</div><div class='add'>+#define ASLE_BACKLIGHT_FAILED	(1&lt;&lt;12)</div><div class='add'>+#define ASLE_PFIT_FAILED	(1&lt;&lt;14)</div><div class='add'>+#define ASLE_PWM_FREQ_FAILED	(1&lt;&lt;16)</div><div class='add'>+</div><div class='add'>+/* ASLE backlight brightness to set */</div><div class='add'>+#define ASLE_BCLP_VALID                (1&lt;&lt;31)</div><div class='add'>+#define ASLE_BCLP_MSK          (~(1&lt;&lt;31))</div><div class='add'>+</div><div class='add'>+/* ASLE panel fitting request */</div><div class='add'>+#define ASLE_PFIT_VALID         (1&lt;&lt;31)</div><div class='add'>+#define ASLE_PFIT_CENTER (1&lt;&lt;0)</div><div class='add'>+#define ASLE_PFIT_STRETCH_TEXT (1&lt;&lt;1)</div><div class='add'>+#define ASLE_PFIT_STRETCH_GFX (1&lt;&lt;2)</div><div class='add'>+</div><div class='add'>+/* PWM frequency and minimum brightness */</div><div class='add'>+#define ASLE_PFMB_BRIGHTNESS_MASK (0xff)</div><div class='add'>+#define ASLE_PFMB_BRIGHTNESS_VALID (1&lt;&lt;8)</div><div class='add'>+#define ASLE_PFMB_PWM_MASK (0x7ffffe00)</div><div class='add'>+#define ASLE_PFMB_PWM_VALID (1&lt;&lt;31)</div><div class='add'>+</div><div class='add'>+#define ASLE_CBLV_VALID         (1&lt;&lt;31)</div><div class='add'>+</div><div class='add'>+static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)</div><div class='add'>+{</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct opregion_asle *asle = dev_priv-&gt;opregion.asle;</div><div class='add'>+	struct backlight_device *bd = dev_priv-&gt;backlight_device;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_DRIVER("asle set backlight %x\n", bclp);</div><div class='add'>+</div><div class='add'>+	if (!(bclp &amp; ASLE_BCLP_VALID))</div><div class='add'>+		return ASLE_BACKLIGHT_FAILED;</div><div class='add'>+</div><div class='add'>+	if (bd == NULL)</div><div class='add'>+		return ASLE_BACKLIGHT_FAILED;</div><div class='add'>+</div><div class='add'>+	bclp &amp;= ASLE_BCLP_MSK;</div><div class='add'>+	if (bclp &gt; 255)</div><div class='add'>+		return ASLE_BACKLIGHT_FAILED;</div><div class='add'>+</div><div class='add'>+	if (config_enabled(CONFIG_BACKLIGHT_CLASS_DEVICE)) {</div><div class='add'>+		int max = bd-&gt;props.max_brightness;</div><div class='add'>+		bd-&gt;props.brightness = bclp * max / 255;</div><div class='add'>+		backlight_update_status(bd);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	asle-&gt;cblv = (bclp * 0x64) / 0xff | ASLE_CBLV_VALID;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void psb_intel_opregion_asle_intr(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct opregion_asle *asle = dev_priv-&gt;opregion.asle;</div><div class='add'>+	u32 asle_stat = 0;</div><div class='add'>+	u32 asle_req;</div><div class='add'>+</div><div class='add'>+	if (!asle)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	asle_req = asle-&gt;aslc &amp; ASLE_REQ_MSK;</div><div class='add'>+	if (!asle_req) {</div><div class='add'>+		DRM_DEBUG_DRIVER("non asle set request??\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (asle_req &amp; ASLE_SET_BACKLIGHT)</div><div class='add'>+		asle_stat |= asle_set_backlight(dev, asle-&gt;bclp);</div><div class='add'>+</div><div class='add'>+	asle-&gt;aslc = asle_stat;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ASLE_ALS_EN    (1&lt;&lt;0)</div><div class='add'>+#define ASLE_BLC_EN    (1&lt;&lt;1)</div><div class='add'>+#define ASLE_PFIT_EN   (1&lt;&lt;2)</div><div class='add'>+#define ASLE_PFMB_EN   (1&lt;&lt;3)</div><div class='add'>+</div><div class='add'>+void psb_intel_opregion_enable_asle(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct opregion_asle *asle = dev_priv-&gt;opregion.asle;</div><div class='add'>+</div><div class='add'>+	if (asle) {</div><div class='add'>+		/* Don't do this on Medfield or other non PC like devices, they</div><div class='add'>+		   use the bit for something different altogether */</div><div class='add'>+		psb_enable_pipestat(dev_priv, 0, PIPE_LEGACY_BLC_EVENT_ENABLE);</div><div class='add'>+		psb_enable_pipestat(dev_priv, 1, PIPE_LEGACY_BLC_EVENT_ENABLE);</div><div class='add'>+</div><div class='add'>+		asle-&gt;tche = ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN</div><div class='add'>+								| ASLE_PFMB_EN;</div><div class='add'>+		asle-&gt;ardy = 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ACPI_EV_DISPLAY_SWITCH (1&lt;&lt;0)</div><div class='add'>+#define ACPI_EV_LID            (1&lt;&lt;1)</div><div class='add'>+#define ACPI_EV_DOCK           (1&lt;&lt;2)</div><div class='add'>+</div><div class='add'>+static struct psb_intel_opregion *system_opregion;</div><div class='add'>+</div><div class='add'>+static int psb_intel_opregion_video_event(struct notifier_block *nb,</div><div class='add'>+					  unsigned long val, void *data)</div><div class='add'>+{</div><div class='add'>+	/* The only video events relevant to opregion are 0x80. These indicate</div><div class='add'>+	   either a docking event, lid switch or display switch request. In</div><div class='add'>+	   Linux, these are handled by the dock, button and video drivers.</div><div class='add'>+	   We might want to fix the video driver to be opregion-aware in</div><div class='add'>+	   future, but right now we just indicate to the firmware that the</div><div class='add'>+	   request has been handled */</div><div class='add'>+</div><div class='add'>+	struct opregion_acpi *acpi;</div><div class='add'>+</div><div class='add'>+	if (!system_opregion)</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+	acpi = system_opregion-&gt;acpi;</div><div class='add'>+	acpi-&gt;csts = 0;</div><div class='add'>+</div><div class='add'>+	return NOTIFY_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block psb_intel_opregion_notifier = {</div><div class='add'>+	.notifier_call = psb_intel_opregion_video_event,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void psb_intel_opregion_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct psb_intel_opregion *opregion = &amp;dev_priv-&gt;opregion;</div><div class='add'>+</div><div class='add'>+	if (!opregion-&gt;header)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (opregion-&gt;acpi) {</div><div class='add'>+		/* Notify BIOS we are ready to handle ACPI video ext notifs.</div><div class='add'>+		 * Right now, all the events are handled by the ACPI video</div><div class='add'>+		 * module. We don't actually need to do anything with them. */</div><div class='add'>+		opregion-&gt;acpi-&gt;csts = 0;</div><div class='add'>+		opregion-&gt;acpi-&gt;drdy = 1;</div><div class='add'>+</div><div class='add'>+		system_opregion = opregion;</div><div class='add'>+		register_acpi_notifier(&amp;psb_intel_opregion_notifier);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (opregion-&gt;asle)</div><div class='add'>+		psb_intel_opregion_enable_asle(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void psb_intel_opregion_fini(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct psb_intel_opregion *opregion = &amp;dev_priv-&gt;opregion;</div><div class='add'>+</div><div class='add'>+	if (!opregion-&gt;header)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (opregion-&gt;acpi) {</div><div class='add'>+		opregion-&gt;acpi-&gt;drdy = 0;</div><div class='add'>+</div><div class='add'>+		system_opregion = NULL;</div><div class='add'>+		unregister_acpi_notifier(&amp;psb_intel_opregion_notifier);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* just clear all opregion memory pointers now */</div><div class='add'>+	iounmap(opregion-&gt;header);</div><div class='add'>+	opregion-&gt;header = NULL;</div><div class='add'>+	opregion-&gt;acpi = NULL;</div><div class='add'>+	opregion-&gt;swsci = NULL;</div><div class='add'>+	opregion-&gt;asle = NULL;</div><div class='add'>+	opregion-&gt;vbt = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int psb_intel_opregion_setup(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct psb_intel_opregion *opregion = &amp;dev_priv-&gt;opregion;</div><div class='add'>+	u32 opregion_phy, mboxes;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	pci_read_config_dword(dev-&gt;pdev, PCI_ASLS, &amp;opregion_phy);</div><div class='add'>+	if (opregion_phy == 0) {</div><div class='add'>+		DRM_DEBUG_DRIVER("ACPI Opregion not supported\n");</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+	}</div><div class='add'>+	DRM_DEBUG("OpRegion detected at 0x%8x\n", opregion_phy);</div><div class='add'>+	base = acpi_os_ioremap(opregion_phy, 8*1024);</div><div class='add'>+	if (!base)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (memcmp(base, OPREGION_SIGNATURE, 16)) {</div><div class='add'>+		DRM_DEBUG_DRIVER("opregion signature mismatch\n");</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	opregion-&gt;header = base;</div><div class='add'>+	opregion-&gt;vbt = base + OPREGION_VBT_OFFSET;</div><div class='add'>+</div><div class='add'>+	opregion-&gt;lid_state = base + ACPI_CLID;</div><div class='add'>+</div><div class='add'>+	mboxes = opregion-&gt;header-&gt;mboxes;</div><div class='add'>+	if (mboxes &amp; MBOX_ACPI) {</div><div class='add'>+		DRM_DEBUG_DRIVER("Public ACPI methods supported\n");</div><div class='add'>+		opregion-&gt;acpi = base + OPREGION_ACPI_OFFSET;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mboxes &amp; MBOX_ASLE) {</div><div class='add'>+		DRM_DEBUG_DRIVER("ASLE supported\n");</div><div class='add'>+		opregion-&gt;asle = base + OPREGION_ASLE_OFFSET;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	iounmap(base);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/intel_opregion.c b/drivers/gpu/drm/gma500/opregion.h<br/>index d946bc1b17bf..72dc6b921265 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/intel_opregion.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/intel_opregion.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/opregion.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/opregion.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright 2010 Intel Corporation</div><div class='add'>+ * Copyright 2012 Intel Corporation</div><div class='ctx'>  *</div><div class='ctx'>  * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='ctx'>  * copy of this software and associated documentation files (the "Software"),</div><div class='hunk'>@@ -20,62 +20,30 @@</div><div class='ctx'>  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER</div><div class='ctx'>  * DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  *</div><div class='del'>- * FIXME: resolve with the i915 version</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include "psb_drv.h"</div><div class='add'>+#if defined(CONFIG_ACPI)</div><div class='add'>+extern void psb_intel_opregion_asle_intr(struct drm_device *dev);</div><div class='add'>+extern void psb_intel_opregion_init(struct drm_device *dev);</div><div class='add'>+extern void psb_intel_opregion_fini(struct drm_device *dev);</div><div class='add'>+extern int psb_intel_opregion_setup(struct drm_device *dev);</div><div class='ctx'> </div><div class='del'>-struct opregion_header {</div><div class='del'>-	u8 signature[16];</div><div class='del'>-	u32 size;</div><div class='del'>-	u32 opregion_ver;</div><div class='del'>-	u8 bios_ver[32];</div><div class='del'>-	u8 vbios_ver[16];</div><div class='del'>-	u8 driver_ver[16];</div><div class='del'>-	u32 mboxes;</div><div class='del'>-	u8 reserved[164];</div><div class='del'>-} __packed;</div><div class='add'>+#else</div><div class='ctx'> </div><div class='del'>-struct opregion_apci {</div><div class='del'>-	/*FIXME: add it later*/</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct opregion_swsci {</div><div class='del'>-	/*FIXME: add it later*/</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct opregion_acpi {</div><div class='del'>-	/*FIXME: add it later*/</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-int gma_intel_opregion_init(struct drm_device *dev)</div><div class='add'>+extern inline void psb_intel_opregion_asle_intr(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 opregion_phy;</div><div class='del'>-	void *base;</div><div class='del'>-	u32 *lid_state;</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;lid_state = NULL;</div><div class='del'>-</div><div class='del'>-	pci_read_config_dword(dev-&gt;pdev, 0xfc, &amp;opregion_phy);</div><div class='del'>-	if (opregion_phy == 0)</div><div class='del'>-		return -ENOTSUPP;</div><div class='del'>-</div><div class='del'>-	base = ioremap(opregion_phy, 8*1024);</div><div class='del'>-	if (!base)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	lid_state = base + 0x01ac;</div><div class='add'>+extern inline void psb_intel_opregion_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;lid_state = lid_state;</div><div class='del'>-	dev_priv-&gt;lid_last_state = readl(lid_state);</div><div class='del'>-	return 0;</div><div class='add'>+extern inline void psb_intel_opregion_fini(struct drm_device *dev)</div><div class='add'>+{</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int gma_intel_opregion_exit(struct drm_device *dev)</div><div class='add'>+extern inline int psb_intel_opregion_setup(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	if (dev_priv-&gt;lid_state)</div><div class='del'>-		iounmap(dev_priv-&gt;lid_state);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/psb_device.c b/drivers/gpu/drm/gma500/psb_device.c<br/>index 95d163e4f1f4..eff039bf92d4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/psb_device.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_device.c</a></div><div class='hunk'>@@ -197,7 +197,8 @@ static int psb_save_display_registers(struct drm_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(connector, &amp;dev-&gt;mode_config.connector_list, head)</div><div class='del'>-		connector-&gt;funcs-&gt;save(connector);</div><div class='add'>+		if (connector-&gt;funcs-&gt;save)</div><div class='add'>+			connector-&gt;funcs-&gt;save(connector);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;mode_config.mutex);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -235,7 +236,8 @@ static int psb_restore_display_registers(struct drm_device *dev)</div><div class='ctx'> 			crtc-&gt;funcs-&gt;restore(crtc);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(connector, &amp;dev-&gt;mode_config.connector_list, head)</div><div class='del'>-		connector-&gt;funcs-&gt;restore(connector);</div><div class='add'>+		if (connector-&gt;funcs-&gt;restore)</div><div class='add'>+			connector-&gt;funcs-&gt;restore(connector);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;mode_config.mutex);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -289,17 +291,80 @@ static void psb_get_core_freq(struct drm_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Poulsbo */</div><div class='add'>+static const struct psb_offset psb_regmap[2] = {</div><div class='add'>+	{</div><div class='add'>+		.fp0 = FPA0,</div><div class='add'>+		.fp1 = FPA1,</div><div class='add'>+		.cntr = DSPACNTR,</div><div class='add'>+		.conf = PIPEACONF,</div><div class='add'>+		.src = PIPEASRC,</div><div class='add'>+		.dpll = DPLL_A,</div><div class='add'>+		.htotal = HTOTAL_A,</div><div class='add'>+		.hblank = HBLANK_A,</div><div class='add'>+		.hsync = HSYNC_A,</div><div class='add'>+		.vtotal = VTOTAL_A,</div><div class='add'>+		.vblank = VBLANK_A,</div><div class='add'>+		.vsync = VSYNC_A,</div><div class='add'>+		.stride = DSPASTRIDE,</div><div class='add'>+		.size = DSPASIZE,</div><div class='add'>+		.pos = DSPAPOS,</div><div class='add'>+		.base = DSPABASE,</div><div class='add'>+		.surf = DSPASURF,</div><div class='add'>+		.addr = DSPABASE,</div><div class='add'>+		.status = PIPEASTAT,</div><div class='add'>+		.linoff = DSPALINOFF,</div><div class='add'>+		.tileoff = DSPATILEOFF,</div><div class='add'>+		.palette = PALETTE_A,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.fp0 = FPB0,</div><div class='add'>+		.fp1 = FPB1,</div><div class='add'>+		.cntr = DSPBCNTR,</div><div class='add'>+		.conf = PIPEBCONF,</div><div class='add'>+		.src = PIPEBSRC,</div><div class='add'>+		.dpll = DPLL_B,</div><div class='add'>+		.htotal = HTOTAL_B,</div><div class='add'>+		.hblank = HBLANK_B,</div><div class='add'>+		.hsync = HSYNC_B,</div><div class='add'>+		.vtotal = VTOTAL_B,</div><div class='add'>+		.vblank = VBLANK_B,</div><div class='add'>+		.vsync = VSYNC_B,</div><div class='add'>+		.stride = DSPBSTRIDE,</div><div class='add'>+		.size = DSPBSIZE,</div><div class='add'>+		.pos = DSPBPOS,</div><div class='add'>+		.base = DSPBBASE,</div><div class='add'>+		.surf = DSPBSURF,</div><div class='add'>+		.addr = DSPBBASE,</div><div class='add'>+		.status = PIPEBSTAT,</div><div class='add'>+		.linoff = DSPBLINOFF,</div><div class='add'>+		.tileoff = DSPBTILEOFF,</div><div class='add'>+		.palette = PALETTE_B,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int psb_chip_setup(struct drm_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	dev_priv-&gt;regmap = psb_regmap;</div><div class='ctx'> 	psb_get_core_freq(dev);</div><div class='ctx'> 	gma_intel_setup_gmbus(dev);</div><div class='del'>-	gma_intel_opregion_init(dev);</div><div class='add'>+	psb_intel_opregion_init(dev);</div><div class='ctx'> 	psb_intel_init_bios(dev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Not exactly an erratum more an irritation */</div><div class='add'>+static void psb_chip_errata(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	psb_lid_timer_init(dev_priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void psb_chip_teardown(struct drm_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	psb_lid_timer_takedown(dev_priv);</div><div class='ctx'> 	gma_intel_teardown_gmbus(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -308,9 +373,13 @@ const struct psb_ops psb_chip_ops = {</div><div class='ctx'> 	.accel_2d = 1,</div><div class='ctx'> 	.pipes = 2,</div><div class='ctx'> 	.crtcs = 2,</div><div class='add'>+	.hdmi_mask = (1 &lt;&lt; 0),</div><div class='add'>+	.lvds_mask = (1 &lt;&lt; 1),</div><div class='add'>+	.cursor_needs_phys = 1,</div><div class='ctx'> 	.sgx_offset = PSB_SGX_OFFSET,</div><div class='ctx'> 	.chip_setup = psb_chip_setup,</div><div class='ctx'> 	.chip_teardown = psb_chip_teardown,</div><div class='add'>+	.errata = psb_chip_errata,</div><div class='ctx'> </div><div class='ctx'> 	.crtc_helper = &amp;psb_intel_helper_funcs,</div><div class='ctx'> 	.crtc_funcs = &amp;psb_intel_crtc_funcs,</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c<br/>index c34adf9d910a..caba6e08693c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/psb_drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_drv.c</a></div><div class='hunk'>@@ -79,6 +79,14 @@ static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {</div><div class='ctx'> 	{ 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &amp;cdv_chip_ops},</div><div class='ctx'> 	{ 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &amp;cdv_chip_ops},</div><div class='ctx'> 	{ 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &amp;cdv_chip_ops},</div><div class='add'>+	{ 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &amp;cdv_chip_ops},</div><div class='add'>+	{ 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &amp;cdv_chip_ops},</div><div class='add'>+	{ 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &amp;cdv_chip_ops},</div><div class='add'>+	{ 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &amp;cdv_chip_ops},</div><div class='add'>+	{ 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &amp;cdv_chip_ops},</div><div class='add'>+	{ 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &amp;cdv_chip_ops},</div><div class='add'>+	{ 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &amp;cdv_chip_ops},</div><div class='add'>+	{ 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &amp;cdv_chip_ops},</div><div class='ctx'> #endif</div><div class='ctx'> 	{ 0, }</div><div class='ctx'> };</div><div class='hunk'>@@ -144,10 +152,6 @@ static void psb_lastclose(struct drm_device *dev)</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void psb_do_takedown(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int psb_do_init(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='hunk'>@@ -172,24 +176,6 @@ static int psb_do_init(struct drm_device *dev)</div><div class='ctx'> 	dev_priv-&gt;gatt_free_offset = pg-&gt;mmu_gatt_start +</div><div class='ctx'> 	    (stolen_gtt &lt;&lt; PAGE_SHIFT) * 1024;</div><div class='ctx'> </div><div class='del'>-	if (1 || drm_debug) {</div><div class='del'>-		uint32_t core_id = PSB_RSGX32(PSB_CR_CORE_ID);</div><div class='del'>-		uint32_t core_rev = PSB_RSGX32(PSB_CR_CORE_REVISION);</div><div class='del'>-		DRM_INFO("SGX core id = 0x%08x\n", core_id);</div><div class='del'>-		DRM_INFO("SGX core rev major = 0x%02x, minor = 0x%02x\n",</div><div class='del'>-			 (core_rev &amp; _PSB_CC_REVISION_MAJOR_MASK) &gt;&gt;</div><div class='del'>-			 _PSB_CC_REVISION_MAJOR_SHIFT,</div><div class='del'>-			 (core_rev &amp; _PSB_CC_REVISION_MINOR_MASK) &gt;&gt;</div><div class='del'>-			 _PSB_CC_REVISION_MINOR_SHIFT);</div><div class='del'>-		DRM_INFO</div><div class='del'>-		    ("SGX core rev maintenance = 0x%02x, designer = 0x%02x\n",</div><div class='del'>-		     (core_rev &amp; _PSB_CC_REVISION_MAINTENANCE_MASK) &gt;&gt;</div><div class='del'>-		     _PSB_CC_REVISION_MAINTENANCE_SHIFT,</div><div class='del'>-		     (core_rev &amp; _PSB_CC_REVISION_DESIGNER_MASK) &gt;&gt;</div><div class='del'>-		     _PSB_CC_REVISION_DESIGNER_SHIFT);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> 	spin_lock_init(&amp;dev_priv-&gt;irqmask_lock);</div><div class='ctx'> 	spin_lock_init(&amp;dev_priv-&gt;lock_2d);</div><div class='ctx'> </div><div class='hunk'>@@ -204,7 +190,6 @@ static int psb_do_init(struct drm_device *dev)</div><div class='ctx'> 	PSB_WSGX32(pg-&gt;gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);</div><div class='ctx'> 	return 0;</div><div class='ctx'> out_err:</div><div class='del'>-	psb_do_takedown(dev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -214,18 +199,16 @@ static int psb_driver_unload(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Kill vblank etc here */</div><div class='ctx'> </div><div class='del'>-	gma_backlight_exit(dev);</div><div class='del'>-</div><div class='del'>-	psb_modeset_cleanup(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (dev_priv) {</div><div class='del'>-		psb_lid_timer_takedown(dev_priv);</div><div class='del'>-		gma_intel_opregion_exit(dev);</div><div class='add'>+		if (dev_priv-&gt;backlight_device)</div><div class='add'>+			gma_backlight_exit(dev);</div><div class='add'>+		psb_modeset_cleanup(dev);</div><div class='ctx'> </div><div class='ctx'> 		if (dev_priv-&gt;ops-&gt;chip_teardown)</div><div class='ctx'> 			dev_priv-&gt;ops-&gt;chip_teardown(dev);</div><div class='del'>-		psb_do_takedown(dev);</div><div class='ctx'> </div><div class='add'>+		psb_intel_opregion_fini(dev);</div><div class='ctx'> </div><div class='ctx'> 		if (dev_priv-&gt;pf_pd) {</div><div class='ctx'> 			psb_mmu_free_pagedir(dev_priv-&gt;pf_pd);</div><div class='hunk'>@@ -246,6 +229,7 @@ static int psb_driver_unload(struct drm_device *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 		psb_gtt_takedown(dev);</div><div class='ctx'> 		if (dev_priv-&gt;scratch_page) {</div><div class='add'>+			set_pages_wb(dev_priv-&gt;scratch_page, 1);</div><div class='ctx'> 			__free_page(dev_priv-&gt;scratch_page);</div><div class='ctx'> 			dev_priv-&gt;scratch_page = NULL;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -258,15 +242,13 @@ static int psb_driver_unload(struct drm_device *dev)</div><div class='ctx'> 			dev_priv-&gt;sgx_reg = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		/* Destroy VBT data */</div><div class='add'>+		psb_intel_destroy_bios(dev);</div><div class='add'>+</div><div class='ctx'> 		kfree(dev_priv);</div><div class='ctx'> 		dev-&gt;dev_private = NULL;</div><div class='del'>-</div><div class='del'>-		/*destroy VBT data*/</div><div class='del'>-		psb_intel_destroy_bios(dev);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	gma_power_uninit(dev);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -290,11 +272,6 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(dev-&gt;pdev);</div><div class='ctx'> </div><div class='del'>-	if (!IS_PSB(dev)) {</div><div class='del'>-		if (pci_enable_msi(dev-&gt;pdev))</div><div class='del'>-			dev_warn(dev-&gt;dev, "Enabling MSI failed!\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	dev_priv-&gt;num_pipe = dev_priv-&gt;ops-&gt;pipes;</div><div class='ctx'> </div><div class='ctx'> 	resource_start = pci_resource_start(dev-&gt;pdev, PSB_MMIO_RESOURCE);</div><div class='hunk'>@@ -309,6 +286,8 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)</div><div class='ctx'> 	if (!dev_priv-&gt;sgx_reg)</div><div class='ctx'> 		goto out_err;</div><div class='ctx'> </div><div class='add'>+	psb_intel_opregion_setup(dev);</div><div class='add'>+</div><div class='ctx'> 	ret = dev_priv-&gt;ops-&gt;chip_setup(dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_err;</div><div class='hunk'>@@ -348,10 +327,7 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)</div><div class='ctx'> 	PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);</div><div class='ctx'> 	PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);</div><div class='ctx'> </div><div class='del'>-/*	igd_opregion_init(&amp;dev_priv-&gt;opregion_dev); */</div><div class='ctx'> 	acpi_video_register();</div><div class='del'>-	if (dev_priv-&gt;lid_state)</div><div class='del'>-		psb_lid_timer_init(dev_priv);</div><div class='ctx'> </div><div class='ctx'> 	ret = drm_vblank_init(dev, dev_priv-&gt;num_pipe);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -370,8 +346,8 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)</div><div class='ctx'> 	PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);</div><div class='ctx'> 	PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;irqmask_lock, irqflags);</div><div class='del'>-	if (IS_PSB(dev) &amp;&amp; drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='del'>-		drm_irq_install(dev);</div><div class='add'>+</div><div class='add'>+	drm_irq_install(dev);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;vblank_disable_allowed = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -619,7 +595,7 @@ static const struct dev_pm_ops psb_pm_ops = {</div><div class='ctx'> 	.runtime_idle = psb_runtime_idle,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct vm_operations_struct psb_gem_vm_ops = {</div><div class='add'>+static const struct vm_operations_struct psb_gem_vm_ops = {</div><div class='ctx'> 	.fault = psb_gem_fault,</div><div class='ctx'> 	.open = drm_gem_vm_open,</div><div class='ctx'> 	.close = drm_gem_vm_close,</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h<br/>index 40ce2c9bc2e4..1bd115ecefe1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_drv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/psb_drv.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_drv.h</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include "psb_intel_drv.h"</div><div class='ctx'> #include "gtt.h"</div><div class='ctx'> #include "power.h"</div><div class='add'>+#include "opregion.h"</div><div class='ctx'> #include "oaktrail.h"</div><div class='ctx'> </div><div class='ctx'> /* Append new drm mode definition here, align with libdrm definition */</div><div class='hunk'>@@ -120,6 +121,7 @@ enum {</div><div class='ctx'> #define PSB_HWSTAM		  0x2098</div><div class='ctx'> #define PSB_INSTPM		  0x20C0</div><div class='ctx'> #define PSB_INT_IDENTITY_R        0x20A4</div><div class='add'>+#define _PSB_IRQ_ASLE		  (1&lt;&lt;0)</div><div class='ctx'> #define _MDFLD_PIPEC_EVENT_FLAG   (1&lt;&lt;2)</div><div class='ctx'> #define _MDFLD_PIPEC_VBLANK_FLAG  (1&lt;&lt;3)</div><div class='ctx'> #define _PSB_DPST_PIPEB_FLAG      (1&lt;&lt;4)</div><div class='hunk'>@@ -130,6 +132,7 @@ enum {</div><div class='ctx'> #define _PSB_VSYNC_PIPEA_FLAG	  (1&lt;&lt;7)</div><div class='ctx'> #define _MDFLD_MIPIA_FLAG	  (1&lt;&lt;16)</div><div class='ctx'> #define _MDFLD_MIPIC_FLAG	  (1&lt;&lt;17)</div><div class='add'>+#define _PSB_IRQ_DISP_HOTSYNC	  (1&lt;&lt;17)</div><div class='ctx'> #define _PSB_IRQ_SGX_FLAG	  (1&lt;&lt;18)</div><div class='ctx'> #define _PSB_IRQ_MSVDX_FLAG	  (1&lt;&lt;19)</div><div class='ctx'> #define _LNC_IRQ_TOPAZ_FLAG	  (1&lt;&lt;20)</div><div class='hunk'>@@ -257,7 +260,8 @@ struct psb_intel_opregion {</div><div class='ctx'> 	struct opregion_acpi *acpi;</div><div class='ctx'> 	struct opregion_swsci *swsci;</div><div class='ctx'> 	struct opregion_asle *asle;</div><div class='del'>-	int enabled;</div><div class='add'>+	void *vbt;</div><div class='add'>+	u32 __iomem *lid_state;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct sdvo_device_mapping {</div><div class='hunk'>@@ -277,50 +281,72 @@ struct intel_gmbus {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ *	Register offset maps</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct psb_offset {</div><div class='add'>+	u32	fp0;</div><div class='add'>+	u32	fp1;</div><div class='add'>+	u32	cntr;</div><div class='add'>+	u32	conf;</div><div class='add'>+	u32	src;</div><div class='add'>+	u32	dpll;</div><div class='add'>+	u32	dpll_md;</div><div class='add'>+	u32	htotal;</div><div class='add'>+	u32	hblank;</div><div class='add'>+	u32	hsync;</div><div class='add'>+	u32	vtotal;</div><div class='add'>+	u32	vblank;</div><div class='add'>+	u32	vsync;</div><div class='add'>+	u32	stride;</div><div class='add'>+	u32	size;</div><div class='add'>+	u32	pos;</div><div class='add'>+	u32	surf;</div><div class='add'>+	u32	addr;</div><div class='add'>+	u32	base;</div><div class='add'>+	u32	status;</div><div class='add'>+	u32	linoff;</div><div class='add'>+	u32	tileoff;</div><div class='add'>+	u32	palette;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  *	Register save state. This is used to hold the context when the</div><div class='ctx'>  *	device is powered off. In the case of Oaktrail this can (but does not</div><div class='ctx'>  *	yet) include screen blank. Operations occuring during the save</div><div class='ctx'>  *	update the register cache instead.</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *	Common status for pipes.</div><div class='add'>+ */</div><div class='add'>+struct psb_pipe {</div><div class='add'>+	u32	fp0;</div><div class='add'>+	u32	fp1;</div><div class='add'>+	u32	cntr;</div><div class='add'>+	u32	conf;</div><div class='add'>+	u32	src;</div><div class='add'>+	u32	dpll;</div><div class='add'>+	u32	dpll_md;</div><div class='add'>+	u32	htotal;</div><div class='add'>+	u32	hblank;</div><div class='add'>+	u32	hsync;</div><div class='add'>+	u32	vtotal;</div><div class='add'>+	u32	vblank;</div><div class='add'>+	u32	vsync;</div><div class='add'>+	u32	stride;</div><div class='add'>+	u32	size;</div><div class='add'>+	u32	pos;</div><div class='add'>+	u32	base;</div><div class='add'>+	u32	surf;</div><div class='add'>+	u32	addr;</div><div class='add'>+	u32	status;</div><div class='add'>+	u32	linoff;</div><div class='add'>+	u32	tileoff;</div><div class='add'>+	u32	palette[256];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct psb_state {</div><div class='del'>-	uint32_t saveDSPACNTR;</div><div class='del'>-	uint32_t saveDSPBCNTR;</div><div class='del'>-	uint32_t savePIPEACONF;</div><div class='del'>-	uint32_t savePIPEBCONF;</div><div class='del'>-	uint32_t savePIPEASRC;</div><div class='del'>-	uint32_t savePIPEBSRC;</div><div class='del'>-	uint32_t saveFPA0;</div><div class='del'>-	uint32_t saveFPA1;</div><div class='del'>-	uint32_t saveDPLL_A;</div><div class='del'>-	uint32_t saveDPLL_A_MD;</div><div class='del'>-	uint32_t saveHTOTAL_A;</div><div class='del'>-	uint32_t saveHBLANK_A;</div><div class='del'>-	uint32_t saveHSYNC_A;</div><div class='del'>-	uint32_t saveVTOTAL_A;</div><div class='del'>-	uint32_t saveVBLANK_A;</div><div class='del'>-	uint32_t saveVSYNC_A;</div><div class='del'>-	uint32_t saveDSPASTRIDE;</div><div class='del'>-	uint32_t saveDSPASIZE;</div><div class='del'>-	uint32_t saveDSPAPOS;</div><div class='del'>-	uint32_t saveDSPABASE;</div><div class='del'>-	uint32_t saveDSPASURF;</div><div class='del'>-	uint32_t saveDSPASTATUS;</div><div class='del'>-	uint32_t saveFPB0;</div><div class='del'>-	uint32_t saveFPB1;</div><div class='del'>-	uint32_t saveDPLL_B;</div><div class='del'>-	uint32_t saveDPLL_B_MD;</div><div class='del'>-	uint32_t saveHTOTAL_B;</div><div class='del'>-	uint32_t saveHBLANK_B;</div><div class='del'>-	uint32_t saveHSYNC_B;</div><div class='del'>-	uint32_t saveVTOTAL_B;</div><div class='del'>-	uint32_t saveVBLANK_B;</div><div class='del'>-	uint32_t saveVSYNC_B;</div><div class='del'>-	uint32_t saveDSPBSTRIDE;</div><div class='del'>-	uint32_t saveDSPBSIZE;</div><div class='del'>-	uint32_t saveDSPBPOS;</div><div class='del'>-	uint32_t saveDSPBBASE;</div><div class='del'>-	uint32_t saveDSPBSURF;</div><div class='del'>-	uint32_t saveDSPBSTATUS;</div><div class='ctx'> 	uint32_t saveVCLK_DIVISOR_VGA0;</div><div class='ctx'> 	uint32_t saveVCLK_DIVISOR_VGA1;</div><div class='ctx'> 	uint32_t saveVCLK_POST_DIV;</div><div class='hunk'>@@ -335,14 +361,8 @@ struct psb_state {</div><div class='ctx'> 	uint32_t savePP_CONTROL;</div><div class='ctx'> 	uint32_t savePP_CYCLE;</div><div class='ctx'> 	uint32_t savePFIT_CONTROL;</div><div class='del'>-	uint32_t savePaletteA[256];</div><div class='del'>-	uint32_t savePaletteB[256];</div><div class='ctx'> 	uint32_t saveCLOCKGATING;</div><div class='ctx'> 	uint32_t saveDSPARB;</div><div class='del'>-	uint32_t saveDSPATILEOFF;</div><div class='del'>-	uint32_t saveDSPBTILEOFF;</div><div class='del'>-	uint32_t saveDSPAADDR;</div><div class='del'>-	uint32_t saveDSPBADDR;</div><div class='ctx'> 	uint32_t savePFIT_AUTO_RATIOS;</div><div class='ctx'> 	uint32_t savePFIT_PGM_RATIOS;</div><div class='ctx'> 	uint32_t savePP_ON_DELAYS;</div><div class='hunk'>@@ -350,8 +370,6 @@ struct psb_state {</div><div class='ctx'> 	uint32_t savePP_DIVISOR;</div><div class='ctx'> 	uint32_t saveBCLRPAT_A;</div><div class='ctx'> 	uint32_t saveBCLRPAT_B;</div><div class='del'>-	uint32_t saveDSPALINOFF;</div><div class='del'>-	uint32_t saveDSPBLINOFF;</div><div class='ctx'> 	uint32_t savePERF_MODE;</div><div class='ctx'> 	uint32_t saveDSPFW1;</div><div class='ctx'> 	uint32_t saveDSPFW2;</div><div class='hunk'>@@ -366,8 +384,6 @@ struct psb_state {</div><div class='ctx'> 	uint32_t saveDSPBCURSOR_BASE;</div><div class='ctx'> 	uint32_t saveDSPACURSOR_POS;</div><div class='ctx'> 	uint32_t saveDSPBCURSOR_POS;</div><div class='del'>-	uint32_t save_palette_a[256];</div><div class='del'>-	uint32_t save_palette_b[256];</div><div class='ctx'> 	uint32_t saveOV_OVADD;</div><div class='ctx'> 	uint32_t saveOV_OGAMC0;</div><div class='ctx'> 	uint32_t saveOV_OGAMC1;</div><div class='hunk'>@@ -390,64 +406,7 @@ struct psb_state {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct medfield_state {</div><div class='del'>-	uint32_t saveDPLL_A;</div><div class='del'>-	uint32_t saveFPA0;</div><div class='del'>-	uint32_t savePIPEACONF;</div><div class='del'>-	uint32_t saveHTOTAL_A;</div><div class='del'>-	uint32_t saveHBLANK_A;</div><div class='del'>-	uint32_t saveHSYNC_A;</div><div class='del'>-	uint32_t saveVTOTAL_A;</div><div class='del'>-	uint32_t saveVBLANK_A;</div><div class='del'>-	uint32_t saveVSYNC_A;</div><div class='del'>-	uint32_t savePIPEASRC;</div><div class='del'>-	uint32_t saveDSPASTRIDE;</div><div class='del'>-	uint32_t saveDSPALINOFF;</div><div class='del'>-	uint32_t saveDSPATILEOFF;</div><div class='del'>-	uint32_t saveDSPASIZE;</div><div class='del'>-	uint32_t saveDSPAPOS;</div><div class='del'>-	uint32_t saveDSPASURF;</div><div class='del'>-	uint32_t saveDSPACNTR;</div><div class='del'>-	uint32_t saveDSPASTATUS;</div><div class='del'>-	uint32_t save_palette_a[256];</div><div class='ctx'> 	uint32_t saveMIPI;</div><div class='del'>-</div><div class='del'>-	uint32_t saveDPLL_B;</div><div class='del'>-	uint32_t saveFPB0;</div><div class='del'>-	uint32_t savePIPEBCONF;</div><div class='del'>-	uint32_t saveHTOTAL_B;</div><div class='del'>-	uint32_t saveHBLANK_B;</div><div class='del'>-	uint32_t saveHSYNC_B;</div><div class='del'>-	uint32_t saveVTOTAL_B;</div><div class='del'>-	uint32_t saveVBLANK_B;</div><div class='del'>-	uint32_t saveVSYNC_B;</div><div class='del'>-	uint32_t savePIPEBSRC;</div><div class='del'>-	uint32_t saveDSPBSTRIDE;</div><div class='del'>-	uint32_t saveDSPBLINOFF;</div><div class='del'>-	uint32_t saveDSPBTILEOFF;</div><div class='del'>-	uint32_t saveDSPBSIZE;</div><div class='del'>-	uint32_t saveDSPBPOS;</div><div class='del'>-	uint32_t saveDSPBSURF;</div><div class='del'>-	uint32_t saveDSPBCNTR;</div><div class='del'>-	uint32_t saveDSPBSTATUS;</div><div class='del'>-	uint32_t save_palette_b[256];</div><div class='del'>-</div><div class='del'>-	uint32_t savePIPECCONF;</div><div class='del'>-	uint32_t saveHTOTAL_C;</div><div class='del'>-	uint32_t saveHBLANK_C;</div><div class='del'>-	uint32_t saveHSYNC_C;</div><div class='del'>-	uint32_t saveVTOTAL_C;</div><div class='del'>-	uint32_t saveVBLANK_C;</div><div class='del'>-	uint32_t saveVSYNC_C;</div><div class='del'>-	uint32_t savePIPECSRC;</div><div class='del'>-	uint32_t saveDSPCSTRIDE;</div><div class='del'>-	uint32_t saveDSPCLINOFF;</div><div class='del'>-	uint32_t saveDSPCTILEOFF;</div><div class='del'>-	uint32_t saveDSPCSIZE;</div><div class='del'>-	uint32_t saveDSPCPOS;</div><div class='del'>-	uint32_t saveDSPCSURF;</div><div class='del'>-	uint32_t saveDSPCCNTR;</div><div class='del'>-	uint32_t saveDSPCSTATUS;</div><div class='del'>-	uint32_t save_palette_c[256];</div><div class='ctx'> 	uint32_t saveMIPI_C;</div><div class='ctx'> </div><div class='ctx'> 	uint32_t savePFIT_CONTROL;</div><div class='hunk'>@@ -476,6 +435,7 @@ struct cdv_state {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct psb_save_area {</div><div class='add'>+	struct psb_pipe pipe[3];</div><div class='ctx'> 	uint32_t saveBSM;</div><div class='ctx'> 	uint32_t saveVBT;</div><div class='ctx'> 	union {</div><div class='hunk'>@@ -494,15 +454,19 @@ struct psb_ops;</div><div class='ctx'> struct drm_psb_private {</div><div class='ctx'> 	struct drm_device *dev;</div><div class='ctx'> 	const struct psb_ops *ops;</div><div class='add'>+	const struct psb_offset *regmap;</div><div class='add'>+	</div><div class='add'>+	struct child_device_config *child_dev;</div><div class='add'>+	int child_dev_num;</div><div class='ctx'> </div><div class='ctx'> 	struct psb_gtt gtt;</div><div class='ctx'> </div><div class='ctx'> 	/* GTT Memory manager */</div><div class='ctx'> 	struct psb_gtt_mm *gtt_mm;</div><div class='ctx'> 	struct page *scratch_page;</div><div class='del'>-	u32 *gtt_map;</div><div class='add'>+	u32 __iomem *gtt_map;</div><div class='ctx'> 	uint32_t stolen_base;</div><div class='del'>-	void *vram_addr;</div><div class='add'>+	u8 __iomem *vram_addr;</div><div class='ctx'> 	unsigned long vram_stolen_size;</div><div class='ctx'> 	int gtt_initialized;</div><div class='ctx'> 	u16 gmch_ctrl;		/* Saved GTT setup */</div><div class='hunk'>@@ -518,8 +482,8 @@ struct drm_psb_private {</div><div class='ctx'> 	 * Register base</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	uint8_t *sgx_reg;</div><div class='del'>-	uint8_t *vdc_reg;</div><div class='add'>+	uint8_t __iomem *sgx_reg;</div><div class='add'>+	uint8_t __iomem *vdc_reg;</div><div class='ctx'> 	uint32_t gatt_free_offset;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -543,6 +507,7 @@ struct drm_psb_private {</div><div class='ctx'> 	 * Modesetting</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct psb_intel_mode_device mode_dev;</div><div class='add'>+	bool modeset;	/* true if we have done the mode_device setup */</div><div class='ctx'> </div><div class='ctx'> 	struct drm_crtc *plane_to_crtc_mapping[PSB_NUM_PIPE];</div><div class='ctx'> 	struct drm_crtc *pipe_to_crtc_mapping[PSB_NUM_PIPE];</div><div class='hunk'>@@ -605,7 +570,7 @@ struct drm_psb_private {</div><div class='ctx'> 	int rpm_enabled;</div><div class='ctx'> </div><div class='ctx'> 	/* MID specific */</div><div class='del'>-	struct oaktrail_vbt vbt_data;</div><div class='add'>+	bool has_gct;</div><div class='ctx'> 	struct oaktrail_gct_data gct_data;</div><div class='ctx'> </div><div class='ctx'> 	/* Oaktrail HDMI state */</div><div class='hunk'>@@ -621,6 +586,11 @@ struct drm_psb_private {</div><div class='ctx'> 	uint32_t msi_addr;</div><div class='ctx'> 	uint32_t msi_data;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Hotplug handling</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	struct work_struct hotplug_work;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * LID-Switch</div><div class='hunk'>@@ -628,7 +598,6 @@ struct drm_psb_private {</div><div class='ctx'> 	spinlock_t lid_lock;</div><div class='ctx'> 	struct timer_list lid_timer;</div><div class='ctx'> 	struct psb_intel_opregion opregion;</div><div class='del'>-	u32 *lid_state;</div><div class='ctx'> 	u32 lid_last_state;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -669,6 +638,8 @@ struct drm_psb_private {</div><div class='ctx'> 	u32 dspcntr[3];</div><div class='ctx'> </div><div class='ctx'> 	int mdfld_panel_id;</div><div class='add'>+</div><div class='add'>+	bool dplla_96mhz;	/* DPLL data from the VBT */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -682,6 +653,9 @@ struct psb_ops {</div><div class='ctx'> 	int pipes;		/* Number of output pipes */</div><div class='ctx'> 	int crtcs;		/* Number of CRTCs */</div><div class='ctx'> 	int sgx_offset;		/* Base offset of SGX device */</div><div class='add'>+	int hdmi_mask;		/* Mask of HDMI CRTCs */</div><div class='add'>+	int lvds_mask;		/* Mask of LVDS CRTCs */</div><div class='add'>+	int cursor_needs_phys;  /* If cursor base reg need physical address */</div><div class='ctx'> </div><div class='ctx'> 	/* Sub functions */</div><div class='ctx'> 	struct drm_crtc_helper_funcs const *crtc_helper;</div><div class='hunk'>@@ -690,9 +664,13 @@ struct psb_ops {</div><div class='ctx'> 	/* Setup hooks */</div><div class='ctx'> 	int (*chip_setup)(struct drm_device *dev);</div><div class='ctx'> 	void (*chip_teardown)(struct drm_device *dev);</div><div class='add'>+	/* Optional helper caller after modeset */</div><div class='add'>+	void (*errata)(struct drm_device *dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Display management hooks */</div><div class='ctx'> 	int (*output_init)(struct drm_device *dev);</div><div class='add'>+	int (*hotplug)(struct drm_device *dev);</div><div class='add'>+	void (*hotplug_enable)(struct drm_device *dev, bool on);</div><div class='ctx'> 	/* Power management hooks */</div><div class='ctx'> 	void (*init_pm)(struct drm_device *dev);</div><div class='ctx'> 	int (*save_regs)(struct drm_device *dev);</div><div class='hunk'>@@ -789,12 +767,6 @@ psb_disable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask);</div><div class='ctx'> extern u32 psb_get_vblank_counter(struct drm_device *dev, int crtc);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * intel_opregion.c</div><div class='del'>- */</div><div class='del'>-extern int gma_intel_opregion_init(struct drm_device *dev);</div><div class='del'>-extern int gma_intel_opregion_exit(struct drm_device *dev);</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * framebuffer.c</div><div class='ctx'>  */</div><div class='ctx'> extern int psbfb_probed(struct drm_device *dev);</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/psb_intel_display.c b/drivers/gpu/drm/gma500/psb_intel_display.c<br/>index 2616558457c8..36c3c99612f6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_intel_display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/psb_intel_display.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_intel_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_intel_display.c</a></div><div class='hunk'>@@ -337,15 +337,12 @@ static int psb_intel_pipe_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 			    int x, int y, struct drm_framebuffer *old_fb)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	/* struct drm_i915_master_private *master_priv; */</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	struct psb_framebuffer *psbfb = to_psb_fb(crtc-&gt;fb);</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	unsigned long start, offset;</div><div class='del'>-	int dspbase = (pipe == 0 ? DSPABASE : DSPBBASE);</div><div class='del'>-	int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);</div><div class='del'>-	int dspstride = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE;</div><div class='del'>-	int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;</div><div class='ctx'> 	u32 dspcntr;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -367,9 +364,9 @@ static int psb_intel_pipe_set_base(struct drm_crtc *crtc,</div><div class='ctx'> </div><div class='ctx'> 	offset = y * crtc-&gt;fb-&gt;pitches[0] + x * (crtc-&gt;fb-&gt;bits_per_pixel / 8);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(dspstride, crtc-&gt;fb-&gt;pitches[0]);</div><div class='add'>+	REG_WRITE(map-&gt;stride, crtc-&gt;fb-&gt;pitches[0]);</div><div class='ctx'> </div><div class='del'>-	dspcntr = REG_READ(dspcntr_reg);</div><div class='add'>+	dspcntr = REG_READ(map-&gt;cntr);</div><div class='ctx'> 	dspcntr &amp;= ~DISPPLANE_PIXFORMAT_MASK;</div><div class='ctx'> </div><div class='ctx'> 	switch (crtc-&gt;fb-&gt;bits_per_pixel) {</div><div class='hunk'>@@ -392,18 +389,10 @@ static int psb_intel_pipe_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 		psb_gtt_unpin(psbfb-&gt;gtt);</div><div class='ctx'> 		goto psb_intel_pipe_set_base_exit;</div><div class='ctx'> 	}</div><div class='del'>-	REG_WRITE(dspcntr_reg, dspcntr);</div><div class='del'>-</div><div class='add'>+	REG_WRITE(map-&gt;cntr, dspcntr);</div><div class='ctx'> </div><div class='del'>-	if (0 /* FIXMEAC - check what PSB needs */) {</div><div class='del'>-		REG_WRITE(dspbase, offset);</div><div class='del'>-		REG_READ(dspbase);</div><div class='del'>-		REG_WRITE(dspsurf, start);</div><div class='del'>-		REG_READ(dspsurf);</div><div class='del'>-	} else {</div><div class='del'>-		REG_WRITE(dspbase, start + offset);</div><div class='del'>-		REG_READ(dspbase);</div><div class='del'>-	}</div><div class='add'>+	REG_WRITE(map-&gt;base, start + offset);</div><div class='add'>+	REG_READ(map-&gt;base);</div><div class='ctx'> </div><div class='ctx'> psb_intel_pipe_cleaner:</div><div class='ctx'> 	/* If there was a previous display we can now unpin it */</div><div class='hunk'>@@ -424,14 +413,10 @@ psb_intel_pipe_set_base_exit:</div><div class='ctx'> static void psb_intel_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	/* struct drm_i915_master_private *master_priv; */</div><div class='del'>-	/* struct drm_i915_private *dev_priv = dev-&gt;dev_private; */</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='del'>-	int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;</div><div class='del'>-	int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;</div><div class='del'>-	int dspbase_reg = (pipe == 0) ? DSPABASE : DSPBBASE;</div><div class='del'>-	int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	u32 temp;</div><div class='ctx'> </div><div class='ctx'> 	/* XXX: When our outputs are all unaware of DPMS modes other than off</div><div class='hunk'>@@ -442,34 +427,34 @@ static void psb_intel_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> 	case DRM_MODE_DPMS_STANDBY:</div><div class='ctx'> 	case DRM_MODE_DPMS_SUSPEND:</div><div class='ctx'> 		/* Enable the DPLL */</div><div class='del'>-		temp = REG_READ(dpll_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;dpll);</div><div class='ctx'> 		if ((temp &amp; DPLL_VCO_ENABLE) == 0) {</div><div class='del'>-			REG_WRITE(dpll_reg, temp);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 			/* Wait for the clocks to stabilize. */</div><div class='ctx'> 			udelay(150);</div><div class='del'>-			REG_WRITE(dpll_reg, temp | DPLL_VCO_ENABLE);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp | DPLL_VCO_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 			/* Wait for the clocks to stabilize. */</div><div class='ctx'> 			udelay(150);</div><div class='del'>-			REG_WRITE(dpll_reg, temp | DPLL_VCO_ENABLE);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp | DPLL_VCO_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 			/* Wait for the clocks to stabilize. */</div><div class='ctx'> 			udelay(150);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Enable the pipe */</div><div class='del'>-		temp = REG_READ(pipeconf_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 		if ((temp &amp; PIPEACONF_ENABLE) == 0)</div><div class='del'>-			REG_WRITE(pipeconf_reg, temp | PIPEACONF_ENABLE);</div><div class='add'>+			REG_WRITE(map-&gt;conf, temp | PIPEACONF_ENABLE);</div><div class='ctx'> </div><div class='ctx'> 		/* Enable the plane */</div><div class='del'>-		temp = REG_READ(dspcntr_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;cntr);</div><div class='ctx'> 		if ((temp &amp; DISPLAY_PLANE_ENABLE) == 0) {</div><div class='del'>-			REG_WRITE(dspcntr_reg,</div><div class='add'>+			REG_WRITE(map-&gt;cntr,</div><div class='ctx'> 				  temp | DISPLAY_PLANE_ENABLE);</div><div class='ctx'> 			/* Flush the plane changes */</div><div class='del'>-			REG_WRITE(dspbase_reg, REG_READ(dspbase_reg));</div><div class='add'>+			REG_WRITE(map-&gt;base, REG_READ(map-&gt;base));</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		psb_intel_crtc_load_lut(crtc);</div><div class='hunk'>@@ -487,29 +472,29 @@ static void psb_intel_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> 		REG_WRITE(VGACNTRL, VGA_DISP_DISABLE);</div><div class='ctx'> </div><div class='ctx'> 		/* Disable display plane */</div><div class='del'>-		temp = REG_READ(dspcntr_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;cntr);</div><div class='ctx'> 		if ((temp &amp; DISPLAY_PLANE_ENABLE) != 0) {</div><div class='del'>-			REG_WRITE(dspcntr_reg,</div><div class='add'>+			REG_WRITE(map-&gt;cntr,</div><div class='ctx'> 				  temp &amp; ~DISPLAY_PLANE_ENABLE);</div><div class='ctx'> 			/* Flush the plane changes */</div><div class='del'>-			REG_WRITE(dspbase_reg, REG_READ(dspbase_reg));</div><div class='del'>-			REG_READ(dspbase_reg);</div><div class='add'>+			REG_WRITE(map-&gt;base, REG_READ(map-&gt;base));</div><div class='add'>+			REG_READ(map-&gt;base);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Next, disable display pipes */</div><div class='del'>-		temp = REG_READ(pipeconf_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;conf);</div><div class='ctx'> 		if ((temp &amp; PIPEACONF_ENABLE) != 0) {</div><div class='del'>-			REG_WRITE(pipeconf_reg, temp &amp; ~PIPEACONF_ENABLE);</div><div class='del'>-			REG_READ(pipeconf_reg);</div><div class='add'>+			REG_WRITE(map-&gt;conf, temp &amp; ~PIPEACONF_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;conf);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Wait for vblank for the disable to take effect. */</div><div class='ctx'> 		psb_intel_wait_for_vblank(dev);</div><div class='ctx'> </div><div class='del'>-		temp = REG_READ(dpll_reg);</div><div class='add'>+		temp = REG_READ(map-&gt;dpll);</div><div class='ctx'> 		if ((temp &amp; DPLL_VCO_ENABLE) != 0) {</div><div class='del'>-			REG_WRITE(dpll_reg, temp &amp; ~DPLL_VCO_ENABLE);</div><div class='del'>-			REG_READ(dpll_reg);</div><div class='add'>+			REG_WRITE(map-&gt;dpll, temp &amp; ~DPLL_VCO_ENABLE);</div><div class='add'>+			REG_READ(map-&gt;dpll);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Wait for the clocks to turn off. */</div><div class='hunk'>@@ -589,22 +574,11 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 			       struct drm_framebuffer *old_fb)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	struct drm_crtc_helper_funcs *crtc_funcs = crtc-&gt;helper_private;</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='del'>-	int fp_reg = (pipe == 0) ? FPA0 : FPB0;</div><div class='del'>-	int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;</div><div class='del'>-	int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;</div><div class='del'>-	int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;</div><div class='del'>-	int htot_reg = (pipe == 0) ? HTOTAL_A : HTOTAL_B;</div><div class='del'>-	int hblank_reg = (pipe == 0) ? HBLANK_A : HBLANK_B;</div><div class='del'>-	int hsync_reg = (pipe == 0) ? HSYNC_A : HSYNC_B;</div><div class='del'>-	int vtot_reg = (pipe == 0) ? VTOTAL_A : VTOTAL_B;</div><div class='del'>-	int vblank_reg = (pipe == 0) ? VBLANK_A : VBLANK_B;</div><div class='del'>-	int vsync_reg = (pipe == 0) ? VSYNC_A : VSYNC_B;</div><div class='del'>-	int dspsize_reg = (pipe == 0) ? DSPASIZE : DSPBSIZE;</div><div class='del'>-	int dsppos_reg = (pipe == 0) ? DSPAPOS : DSPBPOS;</div><div class='del'>-	int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	int refclk;</div><div class='ctx'> 	struct psb_intel_clock_t clock;</div><div class='ctx'> 	u32 dpll = 0, fp = 0, dspcntr, pipeconf;</div><div class='hunk'>@@ -690,7 +664,7 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	dpll |= PLL_REF_INPUT_DREFCLK;</div><div class='ctx'> </div><div class='ctx'> 	/* setup pipeconf */</div><div class='del'>-	pipeconf = REG_READ(pipeconf_reg);</div><div class='add'>+	pipeconf = REG_READ(map-&gt;conf);</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the display plane register */</div><div class='ctx'> 	dspcntr = DISPPLANE_GAMMA_ENABLE;</div><div class='hunk'>@@ -712,9 +686,9 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	drm_mode_debug_printmodeline(mode);</div><div class='ctx'> </div><div class='ctx'> 	if (dpll &amp; DPLL_VCO_ENABLE) {</div><div class='del'>-		REG_WRITE(fp_reg, fp);</div><div class='del'>-		REG_WRITE(dpll_reg, dpll &amp; ~DPLL_VCO_ENABLE);</div><div class='del'>-		REG_READ(dpll_reg);</div><div class='add'>+		REG_WRITE(map-&gt;fp0, fp);</div><div class='add'>+		REG_WRITE(map-&gt;dpll, dpll &amp; ~DPLL_VCO_ENABLE);</div><div class='add'>+		REG_READ(map-&gt;dpll);</div><div class='ctx'> 		udelay(150);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -747,45 +721,45 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		REG_READ(LVDS);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(fp_reg, fp);</div><div class='del'>-	REG_WRITE(dpll_reg, dpll);</div><div class='del'>-	REG_READ(dpll_reg);</div><div class='add'>+	REG_WRITE(map-&gt;fp0, fp);</div><div class='add'>+	REG_WRITE(map-&gt;dpll, dpll);</div><div class='add'>+	REG_READ(map-&gt;dpll);</div><div class='ctx'> 	/* Wait for the clocks to stabilize. */</div><div class='ctx'> 	udelay(150);</div><div class='ctx'> </div><div class='ctx'> 	/* write it again -- the BIOS does, after all */</div><div class='del'>-	REG_WRITE(dpll_reg, dpll);</div><div class='add'>+	REG_WRITE(map-&gt;dpll, dpll);</div><div class='ctx'> </div><div class='del'>-	REG_READ(dpll_reg);</div><div class='add'>+	REG_READ(map-&gt;dpll);</div><div class='ctx'> 	/* Wait for the clocks to stabilize. */</div><div class='ctx'> 	udelay(150);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(htot_reg, (adjusted_mode-&gt;crtc_hdisplay - 1) |</div><div class='add'>+	REG_WRITE(map-&gt;htotal, (adjusted_mode-&gt;crtc_hdisplay - 1) |</div><div class='ctx'> 		  ((adjusted_mode-&gt;crtc_htotal - 1) &lt;&lt; 16));</div><div class='del'>-	REG_WRITE(hblank_reg, (adjusted_mode-&gt;crtc_hblank_start - 1) |</div><div class='add'>+	REG_WRITE(map-&gt;hblank, (adjusted_mode-&gt;crtc_hblank_start - 1) |</div><div class='ctx'> 		  ((adjusted_mode-&gt;crtc_hblank_end - 1) &lt;&lt; 16));</div><div class='del'>-	REG_WRITE(hsync_reg, (adjusted_mode-&gt;crtc_hsync_start - 1) |</div><div class='add'>+	REG_WRITE(map-&gt;hsync, (adjusted_mode-&gt;crtc_hsync_start - 1) |</div><div class='ctx'> 		  ((adjusted_mode-&gt;crtc_hsync_end - 1) &lt;&lt; 16));</div><div class='del'>-	REG_WRITE(vtot_reg, (adjusted_mode-&gt;crtc_vdisplay - 1) |</div><div class='add'>+	REG_WRITE(map-&gt;vtotal, (adjusted_mode-&gt;crtc_vdisplay - 1) |</div><div class='ctx'> 		  ((adjusted_mode-&gt;crtc_vtotal - 1) &lt;&lt; 16));</div><div class='del'>-	REG_WRITE(vblank_reg, (adjusted_mode-&gt;crtc_vblank_start - 1) |</div><div class='add'>+	REG_WRITE(map-&gt;vblank, (adjusted_mode-&gt;crtc_vblank_start - 1) |</div><div class='ctx'> 		  ((adjusted_mode-&gt;crtc_vblank_end - 1) &lt;&lt; 16));</div><div class='del'>-	REG_WRITE(vsync_reg, (adjusted_mode-&gt;crtc_vsync_start - 1) |</div><div class='add'>+	REG_WRITE(map-&gt;vsync, (adjusted_mode-&gt;crtc_vsync_start - 1) |</div><div class='ctx'> 		  ((adjusted_mode-&gt;crtc_vsync_end - 1) &lt;&lt; 16));</div><div class='ctx'> 	/* pipesrc and dspsize control the size that is scaled from,</div><div class='ctx'> 	 * which should always be the user's requested size.</div><div class='ctx'> 	 */</div><div class='del'>-	REG_WRITE(dspsize_reg,</div><div class='add'>+	REG_WRITE(map-&gt;size,</div><div class='ctx'> 		  ((mode-&gt;vdisplay - 1) &lt;&lt; 16) | (mode-&gt;hdisplay - 1));</div><div class='del'>-	REG_WRITE(dsppos_reg, 0);</div><div class='del'>-	REG_WRITE(pipesrc_reg,</div><div class='add'>+	REG_WRITE(map-&gt;pos, 0);</div><div class='add'>+	REG_WRITE(map-&gt;src,</div><div class='ctx'> 		  ((mode-&gt;hdisplay - 1) &lt;&lt; 16) | (mode-&gt;vdisplay - 1));</div><div class='del'>-	REG_WRITE(pipeconf_reg, pipeconf);</div><div class='del'>-	REG_READ(pipeconf_reg);</div><div class='add'>+	REG_WRITE(map-&gt;conf, pipeconf);</div><div class='add'>+	REG_READ(map-&gt;conf);</div><div class='ctx'> </div><div class='ctx'> 	psb_intel_wait_for_vblank(dev);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(dspcntr_reg, dspcntr);</div><div class='add'>+	REG_WRITE(map-&gt;cntr, dspcntr);</div><div class='ctx'> </div><div class='ctx'> 	/* Flush the plane changes */</div><div class='ctx'> 	crtc_funcs-&gt;mode_set_base(crtc, x, y, old_fb);</div><div class='hunk'>@@ -799,10 +773,10 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> void psb_intel_crtc_load_lut(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	struct drm_psb_private *dev_priv =</div><div class='del'>-				(struct drm_psb_private *)dev-&gt;dev_private;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='del'>-	int palreg = PALETTE_A;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[psb_intel_crtc-&gt;pipe];</div><div class='add'>+	int palreg = map-&gt;palette;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* The clocks have to be on to load the palette. */</div><div class='hunk'>@@ -811,12 +785,7 @@ void psb_intel_crtc_load_lut(struct drm_crtc *crtc)</div><div class='ctx'> </div><div class='ctx'> 	switch (psb_intel_crtc-&gt;pipe) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		break;</div><div class='ctx'> 	case 1:</div><div class='del'>-		palreg = PALETTE_B;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		palreg = PALETTE_C;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_err(dev-&gt;dev, "Illegal Pipe Number.\n");</div><div class='hunk'>@@ -836,7 +805,7 @@ void psb_intel_crtc_load_lut(struct drm_crtc *crtc)</div><div class='ctx'> 		gma_power_end(dev);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		for (i = 0; i &lt; 256; i++) {</div><div class='del'>-			dev_priv-&gt;regs.psb.save_palette_a[i] =</div><div class='add'>+			dev_priv-&gt;regs.pipe[0].palette[i] =</div><div class='ctx'> 				  ((psb_intel_crtc-&gt;lut_r[i] +</div><div class='ctx'> 				  psb_intel_crtc-&gt;lut_adj[i]) &lt;&lt; 16) |</div><div class='ctx'> 				  ((psb_intel_crtc-&gt;lut_g[i] +</div><div class='hunk'>@@ -854,11 +823,10 @@ void psb_intel_crtc_load_lut(struct drm_crtc *crtc)</div><div class='ctx'> static void psb_intel_crtc_save(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	/* struct drm_psb_private *dev_priv =</div><div class='del'>-			(struct drm_psb_private *)dev-&gt;dev_private; */</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	struct psb_intel_crtc_state *crtc_state = psb_intel_crtc-&gt;crtc_state;</div><div class='del'>-	int pipeA = (psb_intel_crtc-&gt;pipe == 0);</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[psb_intel_crtc-&gt;pipe];</div><div class='ctx'> 	uint32_t paletteReg;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -867,27 +835,27 @@ static void psb_intel_crtc_save(struct drm_crtc *crtc)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;saveDSPCNTR = REG_READ(pipeA ? DSPACNTR : DSPBCNTR);</div><div class='del'>-	crtc_state-&gt;savePIPECONF = REG_READ(pipeA ? PIPEACONF : PIPEBCONF);</div><div class='del'>-	crtc_state-&gt;savePIPESRC = REG_READ(pipeA ? PIPEASRC : PIPEBSRC);</div><div class='del'>-	crtc_state-&gt;saveFP0 = REG_READ(pipeA ? FPA0 : FPB0);</div><div class='del'>-	crtc_state-&gt;saveFP1 = REG_READ(pipeA ? FPA1 : FPB1);</div><div class='del'>-	crtc_state-&gt;saveDPLL = REG_READ(pipeA ? DPLL_A : DPLL_B);</div><div class='del'>-	crtc_state-&gt;saveHTOTAL = REG_READ(pipeA ? HTOTAL_A : HTOTAL_B);</div><div class='del'>-	crtc_state-&gt;saveHBLANK = REG_READ(pipeA ? HBLANK_A : HBLANK_B);</div><div class='del'>-	crtc_state-&gt;saveHSYNC = REG_READ(pipeA ? HSYNC_A : HSYNC_B);</div><div class='del'>-	crtc_state-&gt;saveVTOTAL = REG_READ(pipeA ? VTOTAL_A : VTOTAL_B);</div><div class='del'>-	crtc_state-&gt;saveVBLANK = REG_READ(pipeA ? VBLANK_A : VBLANK_B);</div><div class='del'>-	crtc_state-&gt;saveVSYNC = REG_READ(pipeA ? VSYNC_A : VSYNC_B);</div><div class='del'>-	crtc_state-&gt;saveDSPSTRIDE = REG_READ(pipeA ? DSPASTRIDE : DSPBSTRIDE);</div><div class='add'>+	crtc_state-&gt;saveDSPCNTR = REG_READ(map-&gt;cntr);</div><div class='add'>+	crtc_state-&gt;savePIPECONF = REG_READ(map-&gt;conf);</div><div class='add'>+	crtc_state-&gt;savePIPESRC = REG_READ(map-&gt;src);</div><div class='add'>+	crtc_state-&gt;saveFP0 = REG_READ(map-&gt;fp0);</div><div class='add'>+	crtc_state-&gt;saveFP1 = REG_READ(map-&gt;fp1);</div><div class='add'>+	crtc_state-&gt;saveDPLL = REG_READ(map-&gt;dpll);</div><div class='add'>+	crtc_state-&gt;saveHTOTAL = REG_READ(map-&gt;htotal);</div><div class='add'>+	crtc_state-&gt;saveHBLANK = REG_READ(map-&gt;hblank);</div><div class='add'>+	crtc_state-&gt;saveHSYNC = REG_READ(map-&gt;hsync);</div><div class='add'>+	crtc_state-&gt;saveVTOTAL = REG_READ(map-&gt;vtotal);</div><div class='add'>+	crtc_state-&gt;saveVBLANK = REG_READ(map-&gt;vblank);</div><div class='add'>+	crtc_state-&gt;saveVSYNC = REG_READ(map-&gt;vsync);</div><div class='add'>+	crtc_state-&gt;saveDSPSTRIDE = REG_READ(map-&gt;stride);</div><div class='ctx'> </div><div class='ctx'> 	/*NOTE: DSPSIZE DSPPOS only for psb*/</div><div class='del'>-	crtc_state-&gt;saveDSPSIZE = REG_READ(pipeA ? DSPASIZE : DSPBSIZE);</div><div class='del'>-	crtc_state-&gt;saveDSPPOS = REG_READ(pipeA ? DSPAPOS : DSPBPOS);</div><div class='add'>+	crtc_state-&gt;saveDSPSIZE = REG_READ(map-&gt;size);</div><div class='add'>+	crtc_state-&gt;saveDSPPOS = REG_READ(map-&gt;pos);</div><div class='ctx'> </div><div class='del'>-	crtc_state-&gt;saveDSPBASE = REG_READ(pipeA ? DSPABASE : DSPBBASE);</div><div class='add'>+	crtc_state-&gt;saveDSPBASE = REG_READ(map-&gt;base);</div><div class='ctx'> </div><div class='del'>-	paletteReg = pipeA ? PALETTE_A : PALETTE_B;</div><div class='add'>+	paletteReg = map-&gt;palette;</div><div class='ctx'> 	for (i = 0; i &lt; 256; ++i)</div><div class='ctx'> 		crtc_state-&gt;savePalette[i] = REG_READ(paletteReg + (i &lt;&lt; 2));</div><div class='ctx'> }</div><div class='hunk'>@@ -898,12 +866,10 @@ static void psb_intel_crtc_save(struct drm_crtc *crtc)</div><div class='ctx'> static void psb_intel_crtc_restore(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	/* struct drm_psb_private * dev_priv =</div><div class='del'>-				(struct drm_psb_private *)dev-&gt;dev_private; */</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc =  to_psb_intel_crtc(crtc);</div><div class='ctx'> 	struct psb_intel_crtc_state *crtc_state = psb_intel_crtc-&gt;crtc_state;</div><div class='del'>-	/* struct drm_crtc_helper_funcs * crtc_funcs = crtc-&gt;helper_private; */</div><div class='del'>-	int pipeA = (psb_intel_crtc-&gt;pipe == 0);</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[psb_intel_crtc-&gt;pipe];</div><div class='ctx'> 	uint32_t paletteReg;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -913,45 +879,45 @@ static void psb_intel_crtc_restore(struct drm_crtc *crtc)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (crtc_state-&gt;saveDPLL &amp; DPLL_VCO_ENABLE) {</div><div class='del'>-		REG_WRITE(pipeA ? DPLL_A : DPLL_B,</div><div class='add'>+		REG_WRITE(map-&gt;dpll,</div><div class='ctx'> 			crtc_state-&gt;saveDPLL &amp; ~DPLL_VCO_ENABLE);</div><div class='del'>-		REG_READ(pipeA ? DPLL_A : DPLL_B);</div><div class='add'>+		REG_READ(map-&gt;dpll);</div><div class='ctx'> 		udelay(150);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? FPA0 : FPB0, crtc_state-&gt;saveFP0);</div><div class='del'>-	REG_READ(pipeA ? FPA0 : FPB0);</div><div class='add'>+	REG_WRITE(map-&gt;fp0, crtc_state-&gt;saveFP0);</div><div class='add'>+	REG_READ(map-&gt;fp0);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? FPA1 : FPB1, crtc_state-&gt;saveFP1);</div><div class='del'>-	REG_READ(pipeA ? FPA1 : FPB1);</div><div class='add'>+	REG_WRITE(map-&gt;fp1, crtc_state-&gt;saveFP1);</div><div class='add'>+	REG_READ(map-&gt;fp1);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? DPLL_A : DPLL_B, crtc_state-&gt;saveDPLL);</div><div class='del'>-	REG_READ(pipeA ? DPLL_A : DPLL_B);</div><div class='add'>+	REG_WRITE(map-&gt;dpll, crtc_state-&gt;saveDPLL);</div><div class='add'>+	REG_READ(map-&gt;dpll);</div><div class='ctx'> 	udelay(150);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? HTOTAL_A : HTOTAL_B, crtc_state-&gt;saveHTOTAL);</div><div class='del'>-	REG_WRITE(pipeA ? HBLANK_A : HBLANK_B, crtc_state-&gt;saveHBLANK);</div><div class='del'>-	REG_WRITE(pipeA ? HSYNC_A : HSYNC_B, crtc_state-&gt;saveHSYNC);</div><div class='del'>-	REG_WRITE(pipeA ? VTOTAL_A : VTOTAL_B, crtc_state-&gt;saveVTOTAL);</div><div class='del'>-	REG_WRITE(pipeA ? VBLANK_A : VBLANK_B, crtc_state-&gt;saveVBLANK);</div><div class='del'>-	REG_WRITE(pipeA ? VSYNC_A : VSYNC_B, crtc_state-&gt;saveVSYNC);</div><div class='del'>-	REG_WRITE(pipeA ? DSPASTRIDE : DSPBSTRIDE, crtc_state-&gt;saveDSPSTRIDE);</div><div class='add'>+	REG_WRITE(map-&gt;htotal, crtc_state-&gt;saveHTOTAL);</div><div class='add'>+	REG_WRITE(map-&gt;hblank, crtc_state-&gt;saveHBLANK);</div><div class='add'>+	REG_WRITE(map-&gt;hsync, crtc_state-&gt;saveHSYNC);</div><div class='add'>+	REG_WRITE(map-&gt;vtotal, crtc_state-&gt;saveVTOTAL);</div><div class='add'>+	REG_WRITE(map-&gt;vblank, crtc_state-&gt;saveVBLANK);</div><div class='add'>+	REG_WRITE(map-&gt;vsync, crtc_state-&gt;saveVSYNC);</div><div class='add'>+	REG_WRITE(map-&gt;stride, crtc_state-&gt;saveDSPSTRIDE);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? DSPASIZE : DSPBSIZE, crtc_state-&gt;saveDSPSIZE);</div><div class='del'>-	REG_WRITE(pipeA ? DSPAPOS : DSPBPOS, crtc_state-&gt;saveDSPPOS);</div><div class='add'>+	REG_WRITE(map-&gt;size, crtc_state-&gt;saveDSPSIZE);</div><div class='add'>+	REG_WRITE(map-&gt;pos, crtc_state-&gt;saveDSPPOS);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? PIPEASRC : PIPEBSRC, crtc_state-&gt;savePIPESRC);</div><div class='del'>-	REG_WRITE(pipeA ? DSPABASE : DSPBBASE, crtc_state-&gt;saveDSPBASE);</div><div class='del'>-	REG_WRITE(pipeA ? PIPEACONF : PIPEBCONF, crtc_state-&gt;savePIPECONF);</div><div class='add'>+	REG_WRITE(map-&gt;src, crtc_state-&gt;savePIPESRC);</div><div class='add'>+	REG_WRITE(map-&gt;base, crtc_state-&gt;saveDSPBASE);</div><div class='add'>+	REG_WRITE(map-&gt;conf, crtc_state-&gt;savePIPECONF);</div><div class='ctx'> </div><div class='ctx'> 	psb_intel_wait_for_vblank(dev);</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(pipeA ? DSPACNTR : DSPBCNTR, crtc_state-&gt;saveDSPCNTR);</div><div class='del'>-	REG_WRITE(pipeA ? DSPABASE : DSPBBASE, crtc_state-&gt;saveDSPBASE);</div><div class='add'>+	REG_WRITE(map-&gt;cntr, crtc_state-&gt;saveDSPCNTR);</div><div class='add'>+	REG_WRITE(map-&gt;base, crtc_state-&gt;saveDSPBASE);</div><div class='ctx'> </div><div class='ctx'> 	psb_intel_wait_for_vblank(dev);</div><div class='ctx'> </div><div class='del'>-	paletteReg = pipeA ? PALETTE_A : PALETTE_B;</div><div class='add'>+	paletteReg = map-&gt;palette;</div><div class='ctx'> 	for (i = 0; i &lt; 256; ++i)</div><div class='ctx'> 		REG_WRITE(paletteReg + (i &lt;&lt; 2), crtc_state-&gt;savePalette[i]);</div><div class='ctx'> }</div><div class='hunk'>@@ -962,6 +928,7 @@ static int psb_intel_crtc_cursor_set(struct drm_crtc *crtc,</div><div class='ctx'> 				 uint32_t width, uint32_t height)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='ctx'> 	uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR;</div><div class='hunk'>@@ -969,8 +936,10 @@ static int psb_intel_crtc_cursor_set(struct drm_crtc *crtc,</div><div class='ctx'> 	uint32_t temp;</div><div class='ctx'> 	size_t addr = 0;</div><div class='ctx'> 	struct gtt_range *gt;</div><div class='add'>+	struct gtt_range *cursor_gt = psb_intel_crtc-&gt;cursor_gt;</div><div class='ctx'> 	struct drm_gem_object *obj;</div><div class='del'>-	int ret;</div><div class='add'>+	void *tmp_dst, *tmp_src;</div><div class='add'>+	int ret, i, cursor_pages;</div><div class='ctx'> </div><div class='ctx'> 	/* if we want to turn of the cursor ignore width and height */</div><div class='ctx'> 	if (!handle) {</div><div class='hunk'>@@ -1019,10 +988,32 @@ static int psb_intel_crtc_cursor_set(struct drm_crtc *crtc,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (dev_priv-&gt;ops-&gt;cursor_needs_phys) {</div><div class='add'>+		if (cursor_gt == NULL) {</div><div class='add'>+			dev_err(dev-&gt;dev, "No hardware cursor mem available");</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	addr = gt-&gt;offset;	/* Or resource.start ??? */</div><div class='add'>+		/* Prevent overflow */</div><div class='add'>+		if (gt-&gt;npage &gt; 4)</div><div class='add'>+			cursor_pages = 4;</div><div class='add'>+		else</div><div class='add'>+			cursor_pages = gt-&gt;npage;</div><div class='add'>+</div><div class='add'>+		/* Copy the cursor to cursor mem */</div><div class='add'>+		tmp_dst = dev_priv-&gt;vram_addr + cursor_gt-&gt;offset;</div><div class='add'>+		for (i = 0; i &lt; cursor_pages; i++) {</div><div class='add'>+			tmp_src = kmap(gt-&gt;pages[i]);</div><div class='add'>+			memcpy(tmp_dst, tmp_src, PAGE_SIZE);</div><div class='add'>+			kunmap(gt-&gt;pages[i]);</div><div class='add'>+			tmp_dst += PAGE_SIZE;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	psb_intel_crtc-&gt;cursor_addr = addr;</div><div class='add'>+		addr = psb_intel_crtc-&gt;cursor_addr;</div><div class='add'>+	} else {</div><div class='add'>+		addr = gt-&gt;offset;      /* Or resource.start ??? */</div><div class='add'>+		psb_intel_crtc-&gt;cursor_addr = addr;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	temp = 0;</div><div class='ctx'> 	/* set the pipe for the cursor */</div><div class='hunk'>@@ -1115,34 +1106,30 @@ static int psb_intel_crtc_clock_get(struct drm_device *dev,</div><div class='ctx'> 				struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	int pipe = psb_intel_crtc-&gt;pipe;</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> 	u32 dpll;</div><div class='ctx'> 	u32 fp;</div><div class='ctx'> 	struct psb_intel_clock_t clock;</div><div class='ctx'> 	bool is_lvds;</div><div class='del'>-	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct psb_pipe *p = &amp;dev_priv-&gt;regs.pipe[pipe];</div><div class='ctx'> </div><div class='ctx'> 	if (gma_power_begin(dev, false)) {</div><div class='del'>-		dpll = REG_READ((pipe == 0) ? DPLL_A : DPLL_B);</div><div class='add'>+		dpll = REG_READ(map-&gt;dpll);</div><div class='ctx'> 		if ((dpll &amp; DISPLAY_RATE_SELECT_FPA1) == 0)</div><div class='del'>-			fp = REG_READ((pipe == 0) ? FPA0 : FPB0);</div><div class='add'>+			fp = REG_READ(map-&gt;fp0);</div><div class='ctx'> 		else</div><div class='del'>-			fp = REG_READ((pipe == 0) ? FPA1 : FPB1);</div><div class='add'>+			fp = REG_READ(map-&gt;fp1);</div><div class='ctx'> 		is_lvds = (pipe == 1) &amp;&amp; (REG_READ(LVDS) &amp; LVDS_PORT_EN);</div><div class='ctx'> 		gma_power_end(dev);</div><div class='ctx'> 	} else {</div><div class='del'>-		dpll = (pipe == 0) ?</div><div class='del'>-			dev_priv-&gt;regs.psb.saveDPLL_A :</div><div class='del'>-			dev_priv-&gt;regs.psb.saveDPLL_B;</div><div class='add'>+		dpll = p-&gt;dpll;</div><div class='ctx'> </div><div class='ctx'> 		if ((dpll &amp; DISPLAY_RATE_SELECT_FPA1) == 0)</div><div class='del'>-			fp = (pipe == 0) ?</div><div class='del'>-				dev_priv-&gt;regs.psb.saveFPA0 :</div><div class='del'>-				dev_priv-&gt;regs.psb.saveFPB0;</div><div class='add'>+			fp = p-&gt;fp0;</div><div class='ctx'> 		else</div><div class='del'>-			fp = (pipe == 0) ?</div><div class='del'>-				dev_priv-&gt;regs.psb.saveFPA1 :</div><div class='del'>-				dev_priv-&gt;regs.psb.saveFPB1;</div><div class='add'>+		        fp = p-&gt;fp1;</div><div class='ctx'> </div><div class='ctx'> 		is_lvds = (pipe == 1) &amp;&amp; (dev_priv-&gt;regs.psb.saveLVDS &amp;</div><div class='ctx'> 								LVDS_PORT_EN);</div><div class='hunk'>@@ -1202,26 +1189,20 @@ struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev,</div><div class='ctx'> 	int vtot;</div><div class='ctx'> 	int vsync;</div><div class='ctx'> 	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct psb_pipe *p = &amp;dev_priv-&gt;regs.pipe[pipe];</div><div class='add'>+	const struct psb_offset *map = &amp;dev_priv-&gt;regmap[pipe];</div><div class='ctx'> </div><div class='ctx'> 	if (gma_power_begin(dev, false)) {</div><div class='del'>-		htot = REG_READ((pipe == 0) ? HTOTAL_A : HTOTAL_B);</div><div class='del'>-		hsync = REG_READ((pipe == 0) ? HSYNC_A : HSYNC_B);</div><div class='del'>-		vtot = REG_READ((pipe == 0) ? VTOTAL_A : VTOTAL_B);</div><div class='del'>-		vsync = REG_READ((pipe == 0) ? VSYNC_A : VSYNC_B);</div><div class='add'>+		htot = REG_READ(map-&gt;htotal);</div><div class='add'>+		hsync = REG_READ(map-&gt;hsync);</div><div class='add'>+		vtot = REG_READ(map-&gt;vtotal);</div><div class='add'>+		vsync = REG_READ(map-&gt;vsync);</div><div class='ctx'> 		gma_power_end(dev);</div><div class='ctx'> 	} else {</div><div class='del'>-		htot = (pipe == 0) ?</div><div class='del'>-			dev_priv-&gt;regs.psb.saveHTOTAL_A :</div><div class='del'>-			dev_priv-&gt;regs.psb.saveHTOTAL_B;</div><div class='del'>-		hsync = (pipe == 0) ?</div><div class='del'>-			dev_priv-&gt;regs.psb.saveHSYNC_A :</div><div class='del'>-			dev_priv-&gt;regs.psb.saveHSYNC_B;</div><div class='del'>-		vtot = (pipe == 0) ?</div><div class='del'>-			dev_priv-&gt;regs.psb.saveVTOTAL_A :</div><div class='del'>-			dev_priv-&gt;regs.psb.saveVTOTAL_B;</div><div class='del'>-		vsync = (pipe == 0) ?</div><div class='del'>-			dev_priv-&gt;regs.psb.saveVSYNC_A :</div><div class='del'>-			dev_priv-&gt;regs.psb.saveVSYNC_B;</div><div class='add'>+		htot = p-&gt;htotal;</div><div class='add'>+		hsync = p-&gt;hsync;</div><div class='add'>+		vtot = p-&gt;vtotal;</div><div class='add'>+		vsync = p-&gt;vsync;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mode = kzalloc(sizeof(*mode), GFP_KERNEL);</div><div class='hunk'>@@ -1257,6 +1238,9 @@ void psb_intel_crtc_destroy(struct drm_crtc *crtc)</div><div class='ctx'> 		drm_gem_object_unreference(psb_intel_crtc-&gt;cursor_obj);</div><div class='ctx'> 		psb_intel_crtc-&gt;cursor_obj = NULL;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (psb_intel_crtc-&gt;cursor_gt != NULL)</div><div class='add'>+		psb_gtt_free_range(crtc-&gt;dev, psb_intel_crtc-&gt;cursor_gt);</div><div class='ctx'> 	kfree(psb_intel_crtc-&gt;crtc_state);</div><div class='ctx'> 	drm_crtc_cleanup(crtc);</div><div class='ctx'> 	kfree(psb_intel_crtc);</div><div class='hunk'>@@ -1285,13 +1269,33 @@ const struct drm_crtc_funcs psb_intel_crtc_funcs = {</div><div class='ctx'>  * Set the default value of cursor control and base register</div><div class='ctx'>  * to zero. This is a workaround for h/w defect on Oaktrail</div><div class='ctx'>  */</div><div class='del'>-static void psb_intel_cursor_init(struct drm_device *dev, int pipe)</div><div class='add'>+static void psb_intel_cursor_init(struct drm_device *dev,</div><div class='add'>+				  struct psb_intel_crtc *psb_intel_crtc)</div><div class='ctx'> {</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	u32 control[3] = { CURACNTR, CURBCNTR, CURCCNTR };</div><div class='ctx'> 	u32 base[3] = { CURABASE, CURBBASE, CURCBASE };</div><div class='add'>+	struct gtt_range *cursor_gt;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;ops-&gt;cursor_needs_phys) {</div><div class='add'>+		/* Allocate 4 pages of stolen mem for a hardware cursor. That</div><div class='add'>+		 * is enough for the 64 x 64 ARGB cursors we support.</div><div class='add'>+		 */</div><div class='add'>+		cursor_gt = psb_gtt_alloc_range(dev, 4 * PAGE_SIZE, "cursor", 1);</div><div class='add'>+		if (!cursor_gt) {</div><div class='add'>+			psb_intel_crtc-&gt;cursor_gt = NULL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		psb_intel_crtc-&gt;cursor_gt = cursor_gt;</div><div class='add'>+		psb_intel_crtc-&gt;cursor_addr = dev_priv-&gt;stolen_base +</div><div class='add'>+							cursor_gt-&gt;offset;</div><div class='add'>+	} else {</div><div class='add'>+		psb_intel_crtc-&gt;cursor_gt = NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(control[pipe], 0);</div><div class='del'>-	REG_WRITE(base[pipe], 0);</div><div class='add'>+out:</div><div class='add'>+	REG_WRITE(control[psb_intel_crtc-&gt;pipe], 0);</div><div class='add'>+	REG_WRITE(base[psb_intel_crtc-&gt;pipe], 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void psb_intel_crtc_init(struct drm_device *dev, int pipe,</div><div class='hunk'>@@ -1357,7 +1361,7 @@ void psb_intel_crtc_init(struct drm_device *dev, int pipe,</div><div class='ctx'> 	psb_intel_crtc-&gt;mode_set.connectors =</div><div class='ctx'> 	    (struct drm_connector **) (psb_intel_crtc + 1);</div><div class='ctx'> 	psb_intel_crtc-&gt;mode_set.num_connectors = 0;</div><div class='del'>-	psb_intel_cursor_init(dev, pipe);</div><div class='add'>+	psb_intel_cursor_init(dev, psb_intel_crtc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/psb_intel_drv.h b/drivers/gpu/drm/gma500/psb_intel_drv.h<br/>index f40535e56689..2515f83248cb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_intel_drv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/psb_intel_drv.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_intel_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_intel_drv.h</a></div><div class='hunk'>@@ -106,11 +106,6 @@ struct psb_intel_mode_device {</div><div class='ctx'> 	 size_t(*bo_offset) (struct drm_device *dev, void *bo);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Cursor (Can go ?)</div><div class='del'>-	 */</div><div class='del'>-	int cursor_needs_physical;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * LVDS info</div><div class='ctx'> 	 */</div><div class='ctx'> 	int backlight_duty_cycle;	/* restore backlight to this value */</div><div class='hunk'>@@ -176,6 +171,7 @@ struct psb_intel_crtc {</div><div class='ctx'> 	int pipe;</div><div class='ctx'> 	int plane;</div><div class='ctx'> 	uint32_t cursor_addr;</div><div class='add'>+	struct gtt_range *cursor_gt;</div><div class='ctx'> 	u8 lut_r[256], lut_g[256], lut_b[256];</div><div class='ctx'> 	u8 lut_adj[256];</div><div class='ctx'> 	struct psb_intel_framebuffer *fbdev_fb;</div><div class='hunk'>@@ -193,6 +189,9 @@ struct psb_intel_crtc {</div><div class='ctx'> 	/*crtc mode setting flags*/</div><div class='ctx'> 	u32 mode_flags;</div><div class='ctx'> </div><div class='add'>+	bool active;</div><div class='add'>+	bool crtc_enable;</div><div class='add'>+</div><div class='ctx'> 	/* Saved Crtc HW states */</div><div class='ctx'> 	struct psb_intel_crtc_state *crtc_state;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/psb_intel_reg.h b/drivers/gpu/drm/gma500/psb_intel_reg.h<br/>index e89d3a2e8fdc..8e8c8efb0a89 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_intel_reg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/psb_intel_reg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_intel_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_intel_reg.h</a></div><div class='hunk'>@@ -91,6 +91,9 @@</div><div class='ctx'> </div><div class='ctx'> #define BLC_PWM_CTL		0x61254</div><div class='ctx'> #define BLC_PWM_CTL2		0x61250</div><div class='add'>+#define  PWM_ENABLE		(1 &lt;&lt; 31)</div><div class='add'>+#define  PWM_LEGACY_MODE	(1 &lt;&lt; 30)</div><div class='add'>+#define  PWM_PIPE_B		(1 &lt;&lt; 29)</div><div class='ctx'> #define BLC_PWM_CTL_C		0x62254</div><div class='ctx'> #define BLC_PWM_CTL2_C		0x62250</div><div class='ctx'> #define BACKLIGHT_MODULATION_FREQ_SHIFT		(17)</div><div class='hunk'>@@ -216,7 +219,7 @@</div><div class='ctx'> #define DPLLB_LVDS_P2_CLOCK_DIV_14	(0 &lt;&lt; 24)	/* i915 */</div><div class='ctx'> #define DPLLB_LVDS_P2_CLOCK_DIV_7	(1 &lt;&lt; 24)	/* i915 */</div><div class='ctx'> #define DPLL_P2_CLOCK_DIV_MASK		0x03000000	/* i915 */</div><div class='del'>-#define DPLL_FPA01_P1_POST_DIV_MASK	0x00ff0000	/* i915 */</div><div class='add'>+#define DPLL_FPA0h1_P1_POST_DIV_MASK	0x00ff0000	/* i915 */</div><div class='ctx'> #define DPLL_LOCK			(1 &lt;&lt; 15)	/* CDV */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -343,6 +346,9 @@</div><div class='ctx'> #define FP_M2_DIV_SHIFT			0</div><div class='ctx'> </div><div class='ctx'> #define PORT_HOTPLUG_EN		0x61110</div><div class='add'>+#define HDMIB_HOTPLUG_INT_EN		(1 &lt;&lt; 29)</div><div class='add'>+#define HDMIC_HOTPLUG_INT_EN		(1 &lt;&lt; 28)</div><div class='add'>+#define HDMID_HOTPLUG_INT_EN		(1 &lt;&lt; 27)</div><div class='ctx'> #define SDVOB_HOTPLUG_INT_EN		(1 &lt;&lt; 26)</div><div class='ctx'> #define SDVOC_HOTPLUG_INT_EN		(1 &lt;&lt; 25)</div><div class='ctx'> #define TV_HOTPLUG_INT_EN		(1 &lt;&lt; 18)</div><div class='hunk'>@@ -501,10 +507,12 @@</div><div class='ctx'> #define PIPE_VBLANK_INTERRUPT_ENABLE		(1UL &lt;&lt; 17)</div><div class='ctx'> #define PIPE_START_VBLANK_INTERRUPT_ENABLE	(1UL &lt;&lt; 18)</div><div class='ctx'> #define PIPE_TE_ENABLE				(1UL &lt;&lt; 22)</div><div class='add'>+#define PIPE_LEGACY_BLC_EVENT_ENABLE		(1UL &lt;&lt; 22)</div><div class='ctx'> #define PIPE_DPST_EVENT_ENABLE			(1UL &lt;&lt; 23)</div><div class='ctx'> #define PIPE_VSYNC_ENABL			(1UL &lt;&lt; 25)</div><div class='ctx'> #define PIPE_HDMI_AUDIO_UNDERRUN		(1UL &lt;&lt; 26)</div><div class='ctx'> #define PIPE_HDMI_AUDIO_BUFFER_DONE		(1UL &lt;&lt; 27)</div><div class='add'>+#define PIPE_FIFO_UNDERRUN			(1UL &lt;&lt; 31)</div><div class='ctx'> #define PIPE_HDMI_AUDIO_INT_MASK		(PIPE_HDMI_AUDIO_UNDERRUN | \</div><div class='ctx'> 						PIPE_HDMI_AUDIO_BUFFER_DONE)</div><div class='ctx'> #define PIPE_EVENT_MASK ((1 &lt;&lt; 29)|(1 &lt;&lt; 28)|(1 &lt;&lt; 27)|(1 &lt;&lt; 26)|(1 &lt;&lt; 24)|(1 &lt;&lt; 23)|(1 &lt;&lt; 22)|(1 &lt;&lt; 21)|(1 &lt;&lt; 20)|(1 &lt;&lt; 16))</div><div class='hunk'>@@ -569,12 +577,27 @@ struct dpst_guardband {</div><div class='ctx'> #define PIPE_PIXEL_MASK		0x00ffffff</div><div class='ctx'> #define PIPE_PIXEL_SHIFT	0</div><div class='ctx'> </div><div class='add'>+#define FW_BLC_SELF		0x20e0 </div><div class='add'>+#define FW_BLC_SELF_EN          (1&lt;&lt;15)</div><div class='add'>+</div><div class='ctx'> #define DSPARB			0x70030</div><div class='ctx'> #define DSPFW1			0x70034</div><div class='add'>+#define DSP_FIFO_SR_WM_MASK		0xFF800000</div><div class='add'>+#define DSP_FIFO_SR_WM_SHIFT		23</div><div class='add'>+#define CURSOR_B_FIFO_WM_MASK		0x003F0000</div><div class='add'>+#define CURSOR_B_FIFO_WM_SHIFT		16</div><div class='ctx'> #define DSPFW2			0x70038</div><div class='add'>+#define CURSOR_A_FIFO_WM_MASK		0x3F00</div><div class='add'>+#define CURSOR_A_FIFO_WM_SHIFT		8</div><div class='add'>+#define DSP_PLANE_C_FIFO_WM_MASK	0x7F</div><div class='add'>+#define DSP_PLANE_C_FIFO_WM_SHIFT	0</div><div class='ctx'> #define DSPFW3			0x7003c</div><div class='ctx'> #define DSPFW4			0x70050</div><div class='ctx'> #define DSPFW5			0x70054</div><div class='add'>+#define DSP_PLANE_B_FIFO_WM1_SHIFT	24</div><div class='add'>+#define DSP_PLANE_A_FIFO_WM1_SHIFT	16</div><div class='add'>+#define CURSOR_B_FIFO_WM1_SHIFT		8</div><div class='add'>+#define CURSOR_FIFO_SR_WM1_SHIFT	0</div><div class='ctx'> #define DSPFW6			0x70058</div><div class='ctx'> #define DSPCHICKENBIT		0x70400</div><div class='ctx'> #define DSPACNTR		0x70180</div><div class='hunk'>@@ -1290,6 +1313,15 @@ No status bits are changed.</div><div class='ctx'> #define SB_N_CB_TUNE_MASK			PSB_MASK(25, 24)</div><div class='ctx'> #define SB_N_CB_TUNE_SHIFT			24</div><div class='ctx'> </div><div class='add'>+/* the bit 14:13 is used to select between the different reference clock for Pipe A/B */</div><div class='add'>+#define SB_REF_DPLLA		0x8010</div><div class='add'>+#define SB_REF_DPLLB		0x8030</div><div class='add'>+#define	REF_CLK_MASK		(0x3 &lt;&lt; 13)</div><div class='add'>+#define REF_CLK_CORE		(0 &lt;&lt; 13)</div><div class='add'>+#define REF_CLK_DPLL		(1 &lt;&lt; 13)</div><div class='add'>+#define REF_CLK_DPLLA		(2 &lt;&lt; 13)</div><div class='add'>+/* For the DPLL B, it will use the reference clk from DPLL A when using (2 &lt;&lt; 13) */</div><div class='add'>+</div><div class='ctx'> #define _SB_REF_A		0x8018</div><div class='ctx'> #define _SB_REF_B		0x8038</div><div class='ctx'> #define SB_REF_SFR(pipe)	_PIPE(pipe, _SB_REF_A, _SB_REF_B)</div><div class='hunk'>@@ -1313,6 +1345,7 @@ No status bits are changed.</div><div class='ctx'> </div><div class='ctx'> #define LANE_PLL_MASK		(0x7 &lt;&lt; 20)</div><div class='ctx'> #define LANE_PLL_ENABLE		(0x3 &lt;&lt; 20)</div><div class='add'>+#define LANE_PLL_PIPE(p)	(((p) == 0) ? (1 &lt;&lt; 21) : (0 &lt;&lt; 21))</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/gma500/psb_intel_sdvo.c b/drivers/gpu/drm/gma500/psb_intel_sdvo.c<br/>index 36330cabcea2..d39b15be7649 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_intel_sdvo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/psb_intel_sdvo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_intel_sdvo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_intel_sdvo.c</a></div><div class='hunk'>@@ -1141,7 +1141,6 @@ static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode)</div><div class='ctx'> static int psb_intel_sdvo_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 				 struct drm_display_mode *mode)</div><div class='ctx'> {</div><div class='del'>-	struct drm_psb_private *dev_priv = connector-&gt;dev-&gt;dev_private;</div><div class='ctx'> 	struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);</div><div class='ctx'> </div><div class='ctx'> 	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLSCAN)</div><div class='hunk'>@@ -1161,11 +1160,6 @@ static int psb_intel_sdvo_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 			return MODE_PANEL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* We assume worst case scenario of 32 bpp here, since we don't know */</div><div class='del'>-	if ((ALIGN(mode-&gt;hdisplay * 4, 64) * mode-&gt;vdisplay) &gt;</div><div class='del'>-	    dev_priv-&gt;vram_stolen_size)</div><div class='del'>-		return MODE_MEM;</div><div class='del'>-</div><div class='ctx'> 	return MODE_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2044,8 +2038,7 @@ psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector)</div><div class='ctx'> 	struct drm_device *dev = connector-&gt;base.base.dev;</div><div class='ctx'> </div><div class='ctx'> 	intel_attach_force_audio_property(&amp;connector-&gt;base.base);</div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen &gt;= 4 &amp;&amp; IS_MOBILE(dev))</div><div class='del'>-		intel_attach_broadcast_rgb_property(&amp;connector-&gt;base.base);</div><div class='add'>+	intel_attach_broadcast_rgb_property(&amp;connector-&gt;base.base);</div><div class='ctx'> 	*/</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/gma500/psb_irq.c b/drivers/gpu/drm/gma500/psb_irq.c<br/>index 1869586457b1..8652cdf3f03f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/psb_irq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_irq.c</a></div><div class='hunk'>@@ -190,6 +190,9 @@ static void mid_pipe_event_handler(struct drm_device *dev, int pipe)</div><div class='ctx'>  */</div><div class='ctx'> static void psb_vdc_interrupt(struct drm_device *dev, uint32_t vdc_stat)</div><div class='ctx'> {</div><div class='add'>+	if (vdc_stat &amp; _PSB_IRQ_ASLE)</div><div class='add'>+		psb_intel_opregion_asle_intr(dev);</div><div class='add'>+</div><div class='ctx'> 	if (vdc_stat &amp; _PSB_VSYNC_PIPEA_FLAG)</div><div class='ctx'> 		mid_pipe_event_handler(dev, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -199,11 +202,9 @@ static void psb_vdc_interrupt(struct drm_device *dev, uint32_t vdc_stat)</div><div class='ctx'> </div><div class='ctx'> irqreturn_t psb_irq_handler(DRM_IRQ_ARGS)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = (struct drm_device *) arg;</div><div class='del'>-	struct drm_psb_private *dev_priv =</div><div class='del'>-	    (struct drm_psb_private *) dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	uint32_t vdc_stat, dsp_int = 0, sgx_int = 0;</div><div class='add'>+	struct drm_device *dev = arg;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	uint32_t vdc_stat, dsp_int = 0, sgx_int = 0, hotplug_int = 0;</div><div class='ctx'> 	int handled = 0;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;dev_priv-&gt;irqmask_lock);</div><div class='hunk'>@@ -220,6 +221,8 @@ irqreturn_t psb_irq_handler(DRM_IRQ_ARGS)</div><div class='ctx'> </div><div class='ctx'> 	if (vdc_stat &amp; _PSB_IRQ_SGX_FLAG)</div><div class='ctx'> 		sgx_int = 1;</div><div class='add'>+	if (vdc_stat &amp; _PSB_IRQ_DISP_HOTSYNC)</div><div class='add'>+		hotplug_int = 1;</div><div class='ctx'> </div><div class='ctx'> 	vdc_stat &amp;= dev_priv-&gt;vdc_irq_mask;</div><div class='ctx'> 	spin_unlock(&amp;dev_priv-&gt;irqmask_lock);</div><div class='hunk'>@@ -241,6 +244,13 @@ irqreturn_t psb_irq_handler(DRM_IRQ_ARGS)</div><div class='ctx'> 		handled = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Note: this bit has other meanings on some devices, so we will</div><div class='add'>+	   need to address that later if it ever matters */</div><div class='add'>+	if (hotplug_int &amp;&amp; dev_priv-&gt;ops-&gt;hotplug) {</div><div class='add'>+		handled = dev_priv-&gt;ops-&gt;hotplug(dev);</div><div class='add'>+		REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	PSB_WVDC32(vdc_stat, PSB_INT_IDENTITY_R);</div><div class='ctx'> 	(void) PSB_RVDC32(PSB_INT_IDENTITY_R);</div><div class='ctx'> 	DRM_READMEMORYBARRIER();</div><div class='hunk'>@@ -273,6 +283,11 @@ void psb_irq_preinstall(struct drm_device *dev)</div><div class='ctx'> 		dev_priv-&gt;vdc_irq_mask |= _MDFLD_PIPEC_EVENT_FLAG;</div><div class='ctx'> 	*/</div><div class='ctx'> </div><div class='add'>+	/* Revisit this area - want per device masks ? */</div><div class='add'>+	if (dev_priv-&gt;ops-&gt;hotplug)</div><div class='add'>+		dev_priv-&gt;vdc_irq_mask |= _PSB_IRQ_DISP_HOTSYNC;</div><div class='add'>+	dev_priv-&gt;vdc_irq_mask |= _PSB_IRQ_ASLE;</div><div class='add'>+</div><div class='ctx'> 	/* This register is safe even if display island is off */</div><div class='ctx'> 	PSB_WVDC32(~dev_priv-&gt;vdc_irq_mask, PSB_INT_MASK_R);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;irqmask_lock, irqflags);</div><div class='hunk'>@@ -305,18 +320,23 @@ int psb_irq_postinstall(struct drm_device *dev)</div><div class='ctx'> 	else</div><div class='ctx'> 		psb_disable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE);</div><div class='ctx'> </div><div class='add'>+	if (dev_priv-&gt;ops-&gt;hotplug_enable)</div><div class='add'>+		dev_priv-&gt;ops-&gt;hotplug_enable(dev, true);</div><div class='add'>+</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;irqmask_lock, irqflags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void psb_irq_uninstall(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct drm_psb_private *dev_priv =</div><div class='del'>-	    (struct drm_psb_private *) dev-&gt;dev_private;</div><div class='add'>+	struct drm_psb_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	unsigned long irqflags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;irqmask_lock, irqflags);</div><div class='ctx'> </div><div class='add'>+	if (dev_priv-&gt;ops-&gt;hotplug_enable)</div><div class='add'>+		dev_priv-&gt;ops-&gt;hotplug_enable(dev, false);</div><div class='add'>+</div><div class='ctx'> 	PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;vblank_enabled[0])</div><div class='hunk'>@@ -406,7 +426,7 @@ void psb_irq_turn_off_dpst(struct drm_device *dev)</div><div class='ctx'> 		psb_disable_pipestat(dev_priv, 0, PIPE_DPST_EVENT_ENABLE);</div><div class='ctx'> </div><div class='ctx'> 		pwm_reg = PSB_RVDC32(PWM_CONTROL_LOGIC);</div><div class='del'>-		PSB_WVDC32(pwm_reg &amp; !(PWM_PHASEIN_INT_ENABLE),</div><div class='add'>+		PSB_WVDC32(pwm_reg &amp; ~PWM_PHASEIN_INT_ENABLE,</div><div class='ctx'> 							PWM_CONTROL_LOGIC);</div><div class='ctx'> 		pwm_reg = PSB_RVDC32(PWM_CONTROL_LOGIC);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/gma500/psb_lid.c b/drivers/gpu/drm/gma500/psb_lid.c<br/>index b867aabe6bf3..1d2ebb5e530f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_lid.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/gma500/psb_lid.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/gma500/psb_lid.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/gma500/psb_lid.c</a></div><div class='hunk'>@@ -29,7 +29,7 @@ static void psb_lid_timer_func(unsigned long data)</div><div class='ctx'> 	struct drm_device *dev = (struct drm_device *)dev_priv-&gt;dev;</div><div class='ctx'> 	struct timer_list *lid_timer = &amp;dev_priv-&gt;lid_timer;</div><div class='ctx'> 	unsigned long irq_flags;</div><div class='del'>-	u32 *lid_state = dev_priv-&gt;lid_state;</div><div class='add'>+	u32 __iomem *lid_state = dev_priv-&gt;opregion.lid_state;</div><div class='ctx'> 	u32 pp_status;</div><div class='ctx'> </div><div class='ctx'> 	if (readl(lid_state) == dev_priv-&gt;lid_last_state)</div><div class='hunk'>@@ -40,10 +40,16 @@ static void psb_lid_timer_func(unsigned long data)</div><div class='ctx'> 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | POWER_TARGET_ON);</div><div class='ctx'> 		do {</div><div class='ctx'> 			pp_status = REG_READ(PP_STATUS);</div><div class='del'>-		} while ((pp_status &amp; PP_ON) == 0);</div><div class='add'>+		} while ((pp_status &amp; PP_ON) == 0 &amp;&amp;</div><div class='add'>+			 (pp_status &amp; PP_SEQUENCE_MASK) != 0);</div><div class='ctx'> </div><div class='del'>-		/*FIXME: should be backlight level before*/</div><div class='del'>-		psb_intel_lvds_set_brightness(dev, 100);</div><div class='add'>+		if (REG_READ(PP_STATUS) &amp; PP_ON) {</div><div class='add'>+			/*FIXME: should be backlight level before*/</div><div class='add'>+			psb_intel_lvds_set_brightness(dev, 100);</div><div class='add'>+		} else {</div><div class='add'>+			DRM_DEBUG("LVDS panel never powered up");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		psb_intel_lvds_set_brightness(dev, 0);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i810/i810_dma.c b/drivers/gpu/drm/i810/i810_dma.c<br/>index f920fb5e42b6..fa9439159ebd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i810/i810_dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i810/i810_dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i810/i810_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i810/i810_dma.c</a></div><div class='hunk'>@@ -130,11 +130,10 @@ static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* This is all entirely broken */</div><div class='del'>-	down_write(&amp;current-&gt;mm-&gt;mmap_sem);</div><div class='ctx'> 	old_fops = file_priv-&gt;filp-&gt;f_op;</div><div class='ctx'> 	file_priv-&gt;filp-&gt;f_op = &amp;i810_buffer_fops;</div><div class='ctx'> 	dev_priv-&gt;mmap_buffer = buf;</div><div class='del'>-	buf_priv-&gt;virtual = (void *)do_mmap(file_priv-&gt;filp, 0, buf-&gt;total,</div><div class='add'>+	buf_priv-&gt;virtual = (void *)vm_mmap(file_priv-&gt;filp, 0, buf-&gt;total,</div><div class='ctx'> 					    PROT_READ | PROT_WRITE,</div><div class='ctx'> 					    MAP_SHARED, buf-&gt;bus_address);</div><div class='ctx'> 	dev_priv-&gt;mmap_buffer = NULL;</div><div class='hunk'>@@ -145,7 +144,6 @@ static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)</div><div class='ctx'> 		retcode = PTR_ERR(buf_priv-&gt;virtual);</div><div class='ctx'> 		buf_priv-&gt;virtual = NULL;</div><div class='ctx'> 	}</div><div class='del'>-	up_write(&amp;current-&gt;mm-&gt;mmap_sem);</div><div class='ctx'> </div><div class='ctx'> 	return retcode;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile<br/>index ce7fc77678b4..2e9268da58d8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/Makefile</a></div><div class='hunk'>@@ -11,17 +11,21 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o \</div><div class='ctx'> 	  i915_gem_evict.o \</div><div class='ctx'> 	  i915_gem_execbuffer.o \</div><div class='ctx'> 	  i915_gem_gtt.o \</div><div class='add'>+	  i915_gem_stolen.o \</div><div class='ctx'> 	  i915_gem_tiling.o \</div><div class='add'>+	  i915_sysfs.o \</div><div class='ctx'> 	  i915_trace_points.o \</div><div class='ctx'> 	  intel_display.o \</div><div class='ctx'> 	  intel_crt.o \</div><div class='ctx'> 	  intel_lvds.o \</div><div class='ctx'> 	  intel_bios.o \</div><div class='add'>+	  intel_ddi.o \</div><div class='ctx'> 	  intel_dp.o \</div><div class='ctx'> 	  intel_hdmi.o \</div><div class='ctx'> 	  intel_sdvo.o \</div><div class='ctx'> 	  intel_modes.o \</div><div class='ctx'> 	  intel_panel.o \</div><div class='add'>+	  intel_pm.o \</div><div class='ctx'> 	  intel_i2c.o \</div><div class='ctx'> 	  intel_fb.o \</div><div class='ctx'> 	  intel_tv.o \</div><div class='hunk'>@@ -34,7 +38,8 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o \</div><div class='ctx'> 	  dvo_ch7017.o \</div><div class='ctx'> 	  dvo_ivch.o \</div><div class='ctx'> 	  dvo_tfp410.o \</div><div class='del'>-	  dvo_sil164.o</div><div class='add'>+	  dvo_sil164.o \</div><div class='add'>+	  i915_gem_dmabuf.o</div><div class='ctx'> </div><div class='ctx'> i915-$(CONFIG_COMPAT)   += i915_ioc32.o</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c<br/>index b505b70dba05..5363e9c66c27 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_debugfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_debugfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_debugfs.c</a></div><div class='hunk'>@@ -47,7 +47,6 @@ enum {</div><div class='ctx'> 	FLUSHING_LIST,</div><div class='ctx'> 	INACTIVE_LIST,</div><div class='ctx'> 	PINNED_LIST,</div><div class='del'>-	DEFERRED_FREE_LIST,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const char *yesno(int v)</div><div class='hunk'>@@ -178,18 +177,10 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data)</div><div class='ctx'> 		seq_printf(m, "Inactive:\n");</div><div class='ctx'> 		head = &amp;dev_priv-&gt;mm.inactive_list;</div><div class='ctx'> 		break;</div><div class='del'>-	case PINNED_LIST:</div><div class='del'>-		seq_printf(m, "Pinned:\n");</div><div class='del'>-		head = &amp;dev_priv-&gt;mm.pinned_list;</div><div class='del'>-		break;</div><div class='ctx'> 	case FLUSHING_LIST:</div><div class='ctx'> 		seq_printf(m, "Flushing:\n");</div><div class='ctx'> 		head = &amp;dev_priv-&gt;mm.flushing_list;</div><div class='ctx'> 		break;</div><div class='del'>-	case DEFERRED_FREE_LIST:</div><div class='del'>-		seq_printf(m, "Deferred free:\n");</div><div class='del'>-		head = &amp;dev_priv-&gt;mm.deferred_free_list;</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -252,21 +243,11 @@ static int i915_gem_object_info(struct seq_file *m, void* data)</div><div class='ctx'> 		   count, mappable_count, size, mappable_size);</div><div class='ctx'> </div><div class='ctx'> 	size = count = mappable_size = mappable_count = 0;</div><div class='del'>-	count_objects(&amp;dev_priv-&gt;mm.pinned_list, mm_list);</div><div class='del'>-	seq_printf(m, "  %u [%u] pinned objects, %zu [%zu] bytes\n",</div><div class='del'>-		   count, mappable_count, size, mappable_size);</div><div class='del'>-</div><div class='del'>-	size = count = mappable_size = mappable_count = 0;</div><div class='ctx'> 	count_objects(&amp;dev_priv-&gt;mm.inactive_list, mm_list);</div><div class='ctx'> 	seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",</div><div class='ctx'> 		   count, mappable_count, size, mappable_size);</div><div class='ctx'> </div><div class='ctx'> 	size = count = mappable_size = mappable_count = 0;</div><div class='del'>-	count_objects(&amp;dev_priv-&gt;mm.deferred_free_list, mm_list);</div><div class='del'>-	seq_printf(m, "  %u [%u] freed objects, %zu [%zu] bytes\n",</div><div class='del'>-		   count, mappable_count, size, mappable_size);</div><div class='del'>-</div><div class='del'>-	size = count = mappable_size = mappable_count = 0;</div><div class='ctx'> 	list_for_each_entry(obj, &amp;dev_priv-&gt;mm.gtt_list, gtt_list) {</div><div class='ctx'> 		if (obj-&gt;fault_mappable) {</div><div class='ctx'> 			size += obj-&gt;gtt_space-&gt;size;</div><div class='hunk'>@@ -294,6 +275,7 @@ static int i915_gem_gtt_info(struct seq_file *m, void* data)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_info_node *node = (struct drm_info_node *) m-&gt;private;</div><div class='ctx'> 	struct drm_device *dev = node-&gt;minor-&gt;dev;</div><div class='add'>+	uintptr_t list = (uintptr_t) node-&gt;info_ent-&gt;data;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='ctx'> 	size_t total_obj_size, total_gtt_size;</div><div class='hunk'>@@ -305,6 +287,9 @@ static int i915_gem_gtt_info(struct seq_file *m, void* data)</div><div class='ctx'> </div><div class='ctx'> 	total_obj_size = total_gtt_size = count = 0;</div><div class='ctx'> 	list_for_each_entry(obj, &amp;dev_priv-&gt;mm.gtt_list, gtt_list) {</div><div class='add'>+		if (list == PINNED_LIST &amp;&amp; obj-&gt;pin_count == 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		seq_printf(m, "   ");</div><div class='ctx'> 		describe_obj(m, obj);</div><div class='ctx'> 		seq_printf(m, "\n");</div><div class='hunk'>@@ -321,7 +306,6 @@ static int i915_gem_gtt_info(struct seq_file *m, void* data)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int i915_gem_pageflip_info(struct seq_file *m, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_info_node *node = (struct drm_info_node *) m-&gt;private;</div><div class='hunk'>@@ -430,10 +414,6 @@ static void i915_ring_seqno_info(struct seq_file *m,</div><div class='ctx'> 	if (ring-&gt;get_seqno) {</div><div class='ctx'> 		seq_printf(m, "Current sequence (%s): %d\n",</div><div class='ctx'> 			   ring-&gt;name, ring-&gt;get_seqno(ring));</div><div class='del'>-		seq_printf(m, "Waiter sequence (%s):  %d\n",</div><div class='del'>-			   ring-&gt;name, ring-&gt;waiting_seqno);</div><div class='del'>-		seq_printf(m, "IRQ sequence (%s):     %d\n",</div><div class='del'>-			   ring-&gt;name, ring-&gt;irq_seqno);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -468,7 +448,45 @@ static int i915_interrupt_info(struct seq_file *m, void *data)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (!HAS_PCH_SPLIT(dev)) {</div><div class='add'>+	if (IS_VALLEYVIEW(dev)) {</div><div class='add'>+		seq_printf(m, "Display IER:\t%08x\n",</div><div class='add'>+			   I915_READ(VLV_IER));</div><div class='add'>+		seq_printf(m, "Display IIR:\t%08x\n",</div><div class='add'>+			   I915_READ(VLV_IIR));</div><div class='add'>+		seq_printf(m, "Display IIR_RW:\t%08x\n",</div><div class='add'>+			   I915_READ(VLV_IIR_RW));</div><div class='add'>+		seq_printf(m, "Display IMR:\t%08x\n",</div><div class='add'>+			   I915_READ(VLV_IMR));</div><div class='add'>+		for_each_pipe(pipe)</div><div class='add'>+			seq_printf(m, "Pipe %c stat:\t%08x\n",</div><div class='add'>+				   pipe_name(pipe),</div><div class='add'>+				   I915_READ(PIPESTAT(pipe)));</div><div class='add'>+</div><div class='add'>+		seq_printf(m, "Master IER:\t%08x\n",</div><div class='add'>+			   I915_READ(VLV_MASTER_IER));</div><div class='add'>+</div><div class='add'>+		seq_printf(m, "Render IER:\t%08x\n",</div><div class='add'>+			   I915_READ(GTIER));</div><div class='add'>+		seq_printf(m, "Render IIR:\t%08x\n",</div><div class='add'>+			   I915_READ(GTIIR));</div><div class='add'>+		seq_printf(m, "Render IMR:\t%08x\n",</div><div class='add'>+			   I915_READ(GTIMR));</div><div class='add'>+</div><div class='add'>+		seq_printf(m, "PM IER:\t\t%08x\n",</div><div class='add'>+			   I915_READ(GEN6_PMIER));</div><div class='add'>+		seq_printf(m, "PM IIR:\t\t%08x\n",</div><div class='add'>+			   I915_READ(GEN6_PMIIR));</div><div class='add'>+		seq_printf(m, "PM IMR:\t\t%08x\n",</div><div class='add'>+			   I915_READ(GEN6_PMIMR));</div><div class='add'>+</div><div class='add'>+		seq_printf(m, "Port hotplug:\t%08x\n",</div><div class='add'>+			   I915_READ(PORT_HOTPLUG_EN));</div><div class='add'>+		seq_printf(m, "DPFLIPSTAT:\t%08x\n",</div><div class='add'>+			   I915_READ(VLV_DPFLIPSTAT));</div><div class='add'>+		seq_printf(m, "DPINVGTT:\t%08x\n",</div><div class='add'>+			   I915_READ(DPINVGTT));</div><div class='add'>+</div><div class='add'>+	} else if (!HAS_PCH_SPLIT(dev)) {</div><div class='ctx'> 		seq_printf(m, "Interrupt enable:    %08x\n",</div><div class='ctx'> 			   I915_READ(IER));</div><div class='ctx'> 		seq_printf(m, "Interrupt identity:  %08x\n",</div><div class='hunk'>@@ -564,69 +582,6 @@ static int i915_hws_info(struct seq_file *m, void *data)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int i915_ringbuffer_data(struct seq_file *m, void *data)</div><div class='del'>-{</div><div class='del'>-	struct drm_info_node *node = (struct drm_info_node *) m-&gt;private;</div><div class='del'>-	struct drm_device *dev = node-&gt;minor-&gt;dev;</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct intel_ring_buffer *ring;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = mutex_lock_interruptible(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ring = &amp;dev_priv-&gt;ring[(uintptr_t)node-&gt;info_ent-&gt;data];</div><div class='del'>-	if (!ring-&gt;obj) {</div><div class='del'>-		seq_printf(m, "No ringbuffer setup\n");</div><div class='del'>-	} else {</div><div class='del'>-		const u8 __iomem *virt = ring-&gt;virtual_start;</div><div class='del'>-		uint32_t off;</div><div class='del'>-</div><div class='del'>-		for (off = 0; off &lt; ring-&gt;size; off += 4) {</div><div class='del'>-			uint32_t *ptr = (uint32_t *)(virt + off);</div><div class='del'>-			seq_printf(m, "%08x :  %08x\n", off, *ptr);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int i915_ringbuffer_info(struct seq_file *m, void *data)</div><div class='del'>-{</div><div class='del'>-	struct drm_info_node *node = (struct drm_info_node *) m-&gt;private;</div><div class='del'>-	struct drm_device *dev = node-&gt;minor-&gt;dev;</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct intel_ring_buffer *ring;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ring = &amp;dev_priv-&gt;ring[(uintptr_t)node-&gt;info_ent-&gt;data];</div><div class='del'>-	if (ring-&gt;size == 0)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	ret = mutex_lock_interruptible(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	seq_printf(m, "Ring %s:\n", ring-&gt;name);</div><div class='del'>-	seq_printf(m, "  Head :    %08x\n", I915_READ_HEAD(ring) &amp; HEAD_ADDR);</div><div class='del'>-	seq_printf(m, "  Tail :    %08x\n", I915_READ_TAIL(ring) &amp; TAIL_ADDR);</div><div class='del'>-	seq_printf(m, "  Size :    %08x\n", ring-&gt;size);</div><div class='del'>-	seq_printf(m, "  Active :  %08x\n", intel_ring_get_active_head(ring));</div><div class='del'>-	seq_printf(m, "  NOPID :   %08x\n", I915_READ_NOPID(ring));</div><div class='del'>-	if (IS_GEN6(dev) || IS_GEN7(dev)) {</div><div class='del'>-		seq_printf(m, "  Sync 0 :   %08x\n", I915_READ_SYNC_0(ring));</div><div class='del'>-		seq_printf(m, "  Sync 1 :   %08x\n", I915_READ_SYNC_1(ring));</div><div class='del'>-	}</div><div class='del'>-	seq_printf(m, "  Control : %08x\n", I915_READ_CTL(ring));</div><div class='del'>-	seq_printf(m, "  Start :   %08x\n", I915_READ_START(ring));</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const char *ring_str(int ring)</div><div class='ctx'> {</div><div class='ctx'> 	switch (ring) {</div><div class='hunk'>@@ -704,6 +659,7 @@ static void i915_ring_error_state(struct seq_file *m,</div><div class='ctx'> 				  struct drm_i915_error_state *error,</div><div class='ctx'> 				  unsigned ring)</div><div class='ctx'> {</div><div class='add'>+	BUG_ON(ring &gt;= I915_NUM_RINGS); /* shut up confused gcc */</div><div class='ctx'> 	seq_printf(m, "%s command stream:\n", ring_str(ring));</div><div class='ctx'> 	seq_printf(m, "  HEAD: 0x%08x\n", error-&gt;head[ring]);</div><div class='ctx'> 	seq_printf(m, "  TAIL: 0x%08x\n", error-&gt;tail[ring]);</div><div class='hunk'>@@ -718,8 +674,8 @@ static void i915_ring_error_state(struct seq_file *m,</div><div class='ctx'> 	if (INTEL_INFO(dev)-&gt;gen &gt;= 4)</div><div class='ctx'> 		seq_printf(m, "  INSTPS: 0x%08x\n", error-&gt;instps[ring]);</div><div class='ctx'> 	seq_printf(m, "  INSTPM: 0x%08x\n", error-&gt;instpm[ring]);</div><div class='add'>+	seq_printf(m, "  FADDR: 0x%08x\n", error-&gt;faddr[ring]);</div><div class='ctx'> 	if (INTEL_INFO(dev)-&gt;gen &gt;= 6) {</div><div class='del'>-		seq_printf(m, "  FADDR: 0x%08x\n", error-&gt;faddr[ring]);</div><div class='ctx'> 		seq_printf(m, "  FAULT_REG: 0x%08x\n", error-&gt;fault_reg[ring]);</div><div class='ctx'> 		seq_printf(m, "  SYNC_0: 0x%08x\n",</div><div class='ctx'> 			   error-&gt;semaphore_mboxes[ring][0]);</div><div class='hunk'>@@ -727,31 +683,35 @@ static void i915_ring_error_state(struct seq_file *m,</div><div class='ctx'> 			   error-&gt;semaphore_mboxes[ring][1]);</div><div class='ctx'> 	}</div><div class='ctx'> 	seq_printf(m, "  seqno: 0x%08x\n", error-&gt;seqno[ring]);</div><div class='add'>+	seq_printf(m, "  waiting: %s\n", yesno(error-&gt;waiting[ring]));</div><div class='ctx'> 	seq_printf(m, "  ring-&gt;head: 0x%08x\n", error-&gt;cpu_ring_head[ring]);</div><div class='ctx'> 	seq_printf(m, "  ring-&gt;tail: 0x%08x\n", error-&gt;cpu_ring_tail[ring]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct i915_error_state_file_priv {</div><div class='add'>+	struct drm_device *dev;</div><div class='add'>+	struct drm_i915_error_state *error;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int i915_error_state(struct seq_file *m, void *unused)</div><div class='ctx'> {</div><div class='del'>-	struct drm_info_node *node = (struct drm_info_node *) m-&gt;private;</div><div class='del'>-	struct drm_device *dev = node-&gt;minor-&gt;dev;</div><div class='add'>+	struct i915_error_state_file_priv *error_priv = m-&gt;private;</div><div class='add'>+	struct drm_device *dev = error_priv-&gt;dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_i915_error_state *error;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct drm_i915_error_state *error = error_priv-&gt;error;</div><div class='add'>+	struct intel_ring_buffer *ring;</div><div class='ctx'> 	int i, j, page, offset, elt;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;dev_priv-&gt;error_lock, flags);</div><div class='del'>-	if (!dev_priv-&gt;first_error) {</div><div class='add'>+	if (!error) {</div><div class='ctx'> 		seq_printf(m, "no error state collected\n");</div><div class='del'>-		goto out;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	error = dev_priv-&gt;first_error;</div><div class='del'>-</div><div class='ctx'> 	seq_printf(m, "Time: %ld s %ld us\n", error-&gt;time.tv_sec,</div><div class='ctx'> 		   error-&gt;time.tv_usec);</div><div class='ctx'> 	seq_printf(m, "PCI ID: 0x%04x\n", dev-&gt;pci_device);</div><div class='ctx'> 	seq_printf(m, "EIR: 0x%08x\n", error-&gt;eir);</div><div class='add'>+	seq_printf(m, "IER: 0x%08x\n", error-&gt;ier);</div><div class='ctx'> 	seq_printf(m, "PGTBL_ER: 0x%08x\n", error-&gt;pgtbl_er);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dev_priv-&gt;num_fence_regs; i++)</div><div class='hunk'>@@ -762,11 +722,8 @@ static int i915_error_state(struct seq_file *m, void *unused)</div><div class='ctx'> 		seq_printf(m, "DONE_REG: 0x%08x\n", error-&gt;done_reg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	i915_ring_error_state(m, dev, error, RCS);</div><div class='del'>-	if (HAS_BLT(dev))</div><div class='del'>-		i915_ring_error_state(m, dev, error, BCS);</div><div class='del'>-	if (HAS_BSD(dev))</div><div class='del'>-		i915_ring_error_state(m, dev, error, VCS);</div><div class='add'>+	for_each_ring(ring, dev_priv, i)</div><div class='add'>+		i915_ring_error_state(m, dev, error, i);</div><div class='ctx'> </div><div class='ctx'> 	if (error-&gt;active_bo)</div><div class='ctx'> 		print_error_buffers(m, "Active",</div><div class='hunk'>@@ -828,12 +785,71 @@ static int i915_error_state(struct seq_file *m, void *unused)</div><div class='ctx'> 	if (error-&gt;display)</div><div class='ctx'> 		intel_display_print_error_state(m, dev, error-&gt;display);</div><div class='ctx'> </div><div class='del'>-out:</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+i915_error_state_write(struct file *filp,</div><div class='add'>+		       const char __user *ubuf,</div><div class='add'>+		       size_t cnt,</div><div class='add'>+		       loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct seq_file *m = filp-&gt;private_data;</div><div class='add'>+	struct i915_error_state_file_priv *error_priv = m-&gt;private;</div><div class='add'>+	struct drm_device *dev = error_priv-&gt;dev;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_DRIVER("Resetting error state\n");</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	i915_destroy_error_state(dev);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+	return cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int i915_error_state_open(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = inode-&gt;i_private;</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct i915_error_state_file_priv *error_priv;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);</div><div class='add'>+	if (!error_priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	error_priv-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;error_lock, flags);</div><div class='add'>+	error_priv-&gt;error = dev_priv-&gt;first_error;</div><div class='add'>+	if (error_priv-&gt;error)</div><div class='add'>+		kref_get(&amp;error_priv-&gt;error-&gt;ref);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;error_lock, flags);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return single_open(file, i915_error_state, error_priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int i915_error_state_release(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct seq_file *m = file-&gt;private_data;</div><div class='add'>+	struct i915_error_state_file_priv *error_priv = m-&gt;private;</div><div class='add'>+</div><div class='add'>+	if (error_priv-&gt;error)</div><div class='add'>+		kref_put(&amp;error_priv-&gt;error-&gt;ref, i915_error_state_free);</div><div class='add'>+	kfree(error_priv);</div><div class='add'>+</div><div class='add'>+	return single_release(inode, file);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations i915_error_state_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = i915_error_state_open,</div><div class='add'>+	.read = seq_read,</div><div class='add'>+	.write = i915_error_state_write,</div><div class='add'>+	.llseek = default_llseek,</div><div class='add'>+	.release = i915_error_state_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int i915_rstdby_delays(struct seq_file *m, void *unused)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_info_node *node = (struct drm_info_node *) m-&gt;private;</div><div class='hunk'>@@ -1132,6 +1148,17 @@ static int gen6_drpc_info(struct seq_file *m)</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "Core Power Down: %s\n",</div><div class='ctx'> 		   yesno(gt_core_status &amp; GEN6_CORE_CPD_STATE_MASK));</div><div class='add'>+</div><div class='add'>+	/* Not exactly sure what this is */</div><div class='add'>+	seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",</div><div class='add'>+		   I915_READ(GEN6_GT_GFX_RC6_LOCKED));</div><div class='add'>+	seq_printf(m, "RC6 residency since boot: %u\n",</div><div class='add'>+		   I915_READ(GEN6_GT_GFX_RC6));</div><div class='add'>+	seq_printf(m, "RC6+ residency since boot: %u\n",</div><div class='add'>+		   I915_READ(GEN6_GT_GFX_RC6p));</div><div class='add'>+	seq_printf(m, "RC6++ residency since boot: %u\n",</div><div class='add'>+		   I915_READ(GEN6_GT_GFX_RC6pp));</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1224,6 +1251,9 @@ static int i915_emon_status(struct seq_file *m, void *unused)</div><div class='ctx'> 	unsigned long temp, chipset, gfx;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (!IS_GEN5(dev))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	ret = mutex_lock_interruptible(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1303,17 +1333,25 @@ static int i915_opregion(struct seq_file *m, void *unused)</div><div class='ctx'> 	struct drm_device *dev = node-&gt;minor-&gt;dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_opregion *opregion = &amp;dev_priv-&gt;opregion;</div><div class='add'>+	void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (data == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	ret = mutex_lock_interruptible(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	if (opregion-&gt;header)</div><div class='del'>-		seq_write(m, opregion-&gt;header, OPREGION_SIZE);</div><div class='add'>+	if (opregion-&gt;header) {</div><div class='add'>+		memcpy_fromio(data, opregion-&gt;header, OPREGION_SIZE);</div><div class='add'>+		seq_write(m, data, OPREGION_SIZE);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='add'>+out:</div><div class='add'>+	kfree(data);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1502,6 +1540,53 @@ static int i915_ppgtt_info(struct seq_file *m, void *data)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int i915_dpio_info(struct seq_file *m, void *data)</div><div class='add'>+{</div><div class='add'>+	struct drm_info_node *node = (struct drm_info_node *) m-&gt;private;</div><div class='add'>+	struct drm_device *dev = node-&gt;minor-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	if (!IS_VALLEYVIEW(dev)) {</div><div class='add'>+		seq_printf(m, "unsupported\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mutex_lock_interruptible(&amp;dev-&gt;mode_config.mutex);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "DPIO_DIV_A: 0x%08x\n",</div><div class='add'>+		   intel_dpio_read(dev_priv, _DPIO_DIV_A));</div><div class='add'>+	seq_printf(m, "DPIO_DIV_B: 0x%08x\n",</div><div class='add'>+		   intel_dpio_read(dev_priv, _DPIO_DIV_B));</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",</div><div class='add'>+		   intel_dpio_read(dev_priv, _DPIO_REFSFR_A));</div><div class='add'>+	seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",</div><div class='add'>+		   intel_dpio_read(dev_priv, _DPIO_REFSFR_B));</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",</div><div class='add'>+		   intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));</div><div class='add'>+	seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",</div><div class='add'>+		   intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",</div><div class='add'>+		   intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));</div><div class='add'>+	seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",</div><div class='add'>+		   intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",</div><div class='add'>+		   intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;mode_config.mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static ssize_t</div><div class='ctx'> i915_wedged_read(struct file *filp,</div><div class='ctx'> 		 char __user *ubuf,</div><div class='hunk'>@@ -1559,6 +1644,65 @@ static const struct file_operations i915_wedged_fops = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static ssize_t</div><div class='add'>+i915_ring_stop_read(struct file *filp,</div><div class='add'>+		    char __user *ubuf,</div><div class='add'>+		    size_t max,</div><div class='add'>+		    loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = filp-&gt;private_data;</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	char buf[20];</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	len = snprintf(buf, sizeof(buf),</div><div class='add'>+		       "0x%08x\n", dev_priv-&gt;stop_rings);</div><div class='add'>+</div><div class='add'>+	if (len &gt; sizeof(buf))</div><div class='add'>+		len = sizeof(buf);</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(ubuf, max, ppos, buf, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+i915_ring_stop_write(struct file *filp,</div><div class='add'>+		     const char __user *ubuf,</div><div class='add'>+		     size_t cnt,</div><div class='add'>+		     loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = filp-&gt;private_data;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	char buf[20];</div><div class='add'>+	int val = 0;</div><div class='add'>+</div><div class='add'>+	if (cnt &gt; 0) {</div><div class='add'>+		if (cnt &gt; sizeof(buf) - 1)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		if (copy_from_user(buf, ubuf, cnt))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		buf[cnt] = 0;</div><div class='add'>+</div><div class='add'>+		val = simple_strtoul(buf, NULL, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	dev_priv-&gt;stop_rings = val;</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+	return cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations i915_ring_stop_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = simple_open,</div><div class='add'>+	.read = i915_ring_stop_read,</div><div class='add'>+	.write = i915_ring_stop_write,</div><div class='add'>+	.llseek = default_llseek,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='ctx'> i915_max_freq_read(struct file *filp,</div><div class='ctx'> 		   char __user *ubuf,</div><div class='ctx'> 		   size_t max,</div><div class='hunk'>@@ -1735,7 +1879,7 @@ static int i915_forcewake_open(struct inode *inode, struct file *file)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int i915_forcewake_release(struct inode *inode, struct file *file)</div><div class='add'>+static int i915_forcewake_release(struct inode *inode, struct file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = inode-&gt;i_private;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='hunk'>@@ -1800,11 +1944,10 @@ static struct drm_info_list i915_debugfs_list[] = {</div><div class='ctx'> 	{"i915_capabilities", i915_capabilities, 0},</div><div class='ctx'> 	{"i915_gem_objects", i915_gem_object_info, 0},</div><div class='ctx'> 	{"i915_gem_gtt", i915_gem_gtt_info, 0},</div><div class='add'>+	{"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},</div><div class='ctx'> 	{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},</div><div class='ctx'> 	{"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},</div><div class='ctx'> 	{"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},</div><div class='del'>-	{"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},</div><div class='del'>-	{"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},</div><div class='ctx'> 	{"i915_gem_pageflip", i915_gem_pageflip_info, 0},</div><div class='ctx'> 	{"i915_gem_request", i915_gem_request_info, 0},</div><div class='ctx'> 	{"i915_gem_seqno", i915_gem_seqno_info, 0},</div><div class='hunk'>@@ -1813,13 +1956,6 @@ static struct drm_info_list i915_debugfs_list[] = {</div><div class='ctx'> 	{"i915_gem_hws", i915_hws_info, 0, (void *)RCS},</div><div class='ctx'> 	{"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},</div><div class='ctx'> 	{"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},</div><div class='del'>-	{"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RCS},</div><div class='del'>-	{"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RCS},</div><div class='del'>-	{"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)VCS},</div><div class='del'>-	{"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)VCS},</div><div class='del'>-	{"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)BCS},</div><div class='del'>-	{"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)BCS},</div><div class='del'>-	{"i915_error_state", i915_error_state, 0},</div><div class='ctx'> 	{"i915_rstdby_delays", i915_rstdby_delays, 0},</div><div class='ctx'> 	{"i915_cur_delayinfo", i915_cur_delayinfo, 0},</div><div class='ctx'> 	{"i915_delayfreq_table", i915_delayfreq_table, 0},</div><div class='hunk'>@@ -1836,6 +1972,7 @@ static struct drm_info_list i915_debugfs_list[] = {</div><div class='ctx'> 	{"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},</div><div class='ctx'> 	{"i915_swizzle_info", i915_swizzle_info, 0},</div><div class='ctx'> 	{"i915_ppgtt_info", i915_ppgtt_info, 0},</div><div class='add'>+	{"i915_dpio", i915_dpio_info, 0},</div><div class='ctx'> };</div><div class='ctx'> #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)</div><div class='ctx'> </div><div class='hunk'>@@ -1864,6 +2001,17 @@ int i915_debugfs_init(struct drm_minor *minor)</div><div class='ctx'> 				  &amp;i915_cache_sharing_fops);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='add'>+	ret = i915_debugfs_create(minor-&gt;debugfs_root, minor,</div><div class='add'>+				  "i915_ring_stop",</div><div class='add'>+				  &amp;i915_ring_stop_fops);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = i915_debugfs_create(minor-&gt;debugfs_root, minor,</div><div class='add'>+				  "i915_error_state",</div><div class='add'>+				  &amp;i915_error_state_fops);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	return drm_debugfs_create_files(i915_debugfs_list,</div><div class='ctx'> 					I915_DEBUGFS_ENTRIES,</div><div class='hunk'>@@ -1882,6 +2030,10 @@ void i915_debugfs_cleanup(struct drm_minor *minor)</div><div class='ctx'> 				 1, minor);</div><div class='ctx'> 	drm_debugfs_remove_files((struct drm_info_list *) &amp;i915_cache_sharing_fops,</div><div class='ctx'> 				 1, minor);</div><div class='add'>+	drm_debugfs_remove_files((struct drm_info_list *) &amp;i915_ring_stop_fops,</div><div class='add'>+				 1, minor);</div><div class='add'>+	drm_debugfs_remove_files((struct drm_info_list *) &amp;i915_error_state_fops,</div><div class='add'>+				 1, minor);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_DEBUG_FS */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c<br/>index 785f67f963ef..f94792626b94 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_dma.c</a></div><div class='hunk'>@@ -26,6 +26,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "drm.h"</div><div class='ctx'> #include "drm_crtc_helper.h"</div><div class='hunk'>@@ -34,15 +36,62 @@</div><div class='ctx'> #include "i915_drm.h"</div><div class='ctx'> #include "i915_drv.h"</div><div class='ctx'> #include "i915_trace.h"</div><div class='del'>-#include "../../../platform/x86/intel_ips.h"</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/vgaarb.h&gt;</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/pnp.h&gt;</div><div class='ctx'> #include &lt;linux/vga_switcheroo.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;acpi/video.h&gt;</div><div class='add'>+#include &lt;asm/pat.h&gt;</div><div class='add'>+</div><div class='add'>+#define LP_RING(d) (&amp;((struct drm_i915_private *)(d))-&gt;ring[RCS])</div><div class='add'>+</div><div class='add'>+#define BEGIN_LP_RING(n) \</div><div class='add'>+	intel_ring_begin(LP_RING(dev_priv), (n))</div><div class='add'>+</div><div class='add'>+#define OUT_RING(x) \</div><div class='add'>+	intel_ring_emit(LP_RING(dev_priv), x)</div><div class='add'>+</div><div class='add'>+#define ADVANCE_LP_RING() \</div><div class='add'>+	intel_ring_advance(LP_RING(dev_priv))</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Lock test for when it's just for synchronization of ring access.</div><div class='add'>+ *</div><div class='add'>+ * In that case, we don't need to do it when GEM is initialized as nobody else</div><div class='add'>+ * has access to the ring.</div><div class='add'>+ */</div><div class='add'>+#define RING_LOCK_TEST_WITH_RETURN(dev, file) do {			\</div><div class='add'>+	if (LP_RING(dev-&gt;dev_private)-&gt;obj == NULL)			\</div><div class='add'>+		LOCK_TEST_WITH_RETURN(dev, file);			\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+static inline u32</div><div class='add'>+intel_read_legacy_status_page(struct drm_i915_private *dev_priv, int reg)</div><div class='add'>+{</div><div class='add'>+	if (I915_NEED_GFX_HWS(dev_priv-&gt;dev))</div><div class='add'>+		return ioread32(dev_priv-&gt;dri1.gfx_hws_cpu_addr + reg);</div><div class='add'>+	else</div><div class='add'>+		return intel_read_status_page(LP_RING(dev_priv), reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define READ_HWSP(dev_priv, reg) intel_read_legacy_status_page(dev_priv, reg)</div><div class='add'>+#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX)</div><div class='add'>+#define I915_BREADCRUMB_INDEX		0x21</div><div class='add'>+</div><div class='add'>+void i915_update_dri1_breadcrumb(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct drm_i915_master_private *master_priv;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;primary-&gt;master) {</div><div class='add'>+		master_priv = dev-&gt;primary-&gt;master-&gt;driver_priv;</div><div class='add'>+		if (master_priv-&gt;sarea_priv)</div><div class='add'>+			master_priv-&gt;sarea_priv-&gt;last_dispatch =</div><div class='add'>+				READ_BREADCRUMB(dev_priv);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static void i915_write_hws_pga(struct drm_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -97,7 +146,7 @@ static void i915_free_hws(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (ring-&gt;status_page.gfx_addr) {</div><div class='ctx'> 		ring-&gt;status_page.gfx_addr = 0;</div><div class='del'>-		drm_core_ioremapfree(&amp;dev_priv-&gt;hws_map, dev);</div><div class='add'>+		iounmap(dev_priv-&gt;dri1.gfx_hws_cpu_addr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Need to rewrite hardware status page */</div><div class='hunk'>@@ -195,7 +244,7 @@ static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)</div><div class='ctx'> </div><div class='ctx'> 	/* Allow hardware batchbuffers unless told otherwise.</div><div class='ctx'> 	 */</div><div class='del'>-	dev_priv-&gt;allow_batchbuffer = 1;</div><div class='add'>+	dev_priv-&gt;dri1.allow_batchbuffer = 1;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -207,7 +256,7 @@ static int i915_dma_resume(struct drm_device * dev)</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_DRIVER("%s\n", __func__);</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;map.handle == NULL) {</div><div class='add'>+	if (ring-&gt;virtual_start == NULL) {</div><div class='ctx'> 		DRM_ERROR("can not ioremap virtual address for"</div><div class='ctx'> 			  " ring buffer\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -236,6 +285,9 @@ static int i915_dma_init(struct drm_device *dev, void *data,</div><div class='ctx'> 	drm_i915_init_t *init = data;</div><div class='ctx'> 	int retcode = 0;</div><div class='ctx'> </div><div class='add'>+	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	switch (init-&gt;func) {</div><div class='ctx'> 	case I915_INIT_DMA:</div><div class='ctx'> 		retcode = i915_initialize(dev, init);</div><div class='hunk'>@@ -578,6 +630,9 @@ static int i915_flush_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='hunk'>@@ -598,7 +653,10 @@ static int i915_batchbuffer(struct drm_device *dev, void *data,</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct drm_clip_rect *cliprects = NULL;</div><div class='ctx'> </div><div class='del'>-	if (!dev_priv-&gt;allow_batchbuffer) {</div><div class='add'>+	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!dev_priv-&gt;dri1.allow_batchbuffer) {</div><div class='ctx'> 		DRM_ERROR("Batchbuffer ioctl disabled\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -655,6 +713,9 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data,</div><div class='ctx'> 	DRM_DEBUG_DRIVER("i915 cmdbuffer, buf %p sz %d cliprects %d\n",</div><div class='ctx'> 			cmdbuf-&gt;buf, cmdbuf-&gt;sz, cmdbuf-&gt;num_cliprects);</div><div class='ctx'> </div><div class='add'>+	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);</div><div class='ctx'> </div><div class='ctx'> 	if (cmdbuf-&gt;num_cliprects &lt; 0)</div><div class='hunk'>@@ -706,11 +767,166 @@ fail_batch_free:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int i915_emit_irq(struct drm_device * dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct drm_i915_master_private *master_priv = dev-&gt;primary-&gt;master-&gt;driver_priv;</div><div class='add'>+</div><div class='add'>+	i915_kernel_lost_context(dev);</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_DRIVER("\n");</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;counter++;</div><div class='add'>+	if (dev_priv-&gt;counter &gt; 0x7FFFFFFFUL)</div><div class='add'>+		dev_priv-&gt;counter = 1;</div><div class='add'>+	if (master_priv-&gt;sarea_priv)</div><div class='add'>+		master_priv-&gt;sarea_priv-&gt;last_enqueue = dev_priv-&gt;counter;</div><div class='add'>+</div><div class='add'>+	if (BEGIN_LP_RING(4) == 0) {</div><div class='add'>+		OUT_RING(MI_STORE_DWORD_INDEX);</div><div class='add'>+		OUT_RING(I915_BREADCRUMB_INDEX &lt;&lt; MI_STORE_DWORD_INDEX_SHIFT);</div><div class='add'>+		OUT_RING(dev_priv-&gt;counter);</div><div class='add'>+		OUT_RING(MI_USER_INTERRUPT);</div><div class='add'>+		ADVANCE_LP_RING();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dev_priv-&gt;counter;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int i915_wait_irq(struct drm_device * dev, int irq_nr)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	struct drm_i915_master_private *master_priv = dev-&gt;primary-&gt;master-&gt;driver_priv;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	struct intel_ring_buffer *ring = LP_RING(dev_priv);</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_DRIVER("irq_nr=%d breadcrumb=%d\n", irq_nr,</div><div class='add'>+		  READ_BREADCRUMB(dev_priv));</div><div class='add'>+</div><div class='add'>+	if (READ_BREADCRUMB(dev_priv) &gt;= irq_nr) {</div><div class='add'>+		if (master_priv-&gt;sarea_priv)</div><div class='add'>+			master_priv-&gt;sarea_priv-&gt;last_dispatch = READ_BREADCRUMB(dev_priv);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (master_priv-&gt;sarea_priv)</div><div class='add'>+		master_priv-&gt;sarea_priv-&gt;perf_boxes |= I915_BOX_WAIT;</div><div class='add'>+</div><div class='add'>+	if (ring-&gt;irq_get(ring)) {</div><div class='add'>+		DRM_WAIT_ON(ret, ring-&gt;irq_queue, 3 * DRM_HZ,</div><div class='add'>+			    READ_BREADCRUMB(dev_priv) &gt;= irq_nr);</div><div class='add'>+		ring-&gt;irq_put(ring);</div><div class='add'>+	} else if (wait_for(READ_BREADCRUMB(dev_priv) &gt;= irq_nr, 3000))</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (ret == -EBUSY) {</div><div class='add'>+		DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",</div><div class='add'>+			  READ_BREADCRUMB(dev_priv), (int)dev_priv-&gt;counter);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Needs the lock as it touches the ring.</div><div class='add'>+ */</div><div class='add'>+static int i915_irq_emit(struct drm_device *dev, void *data,</div><div class='add'>+			 struct drm_file *file_priv)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	drm_i915_irq_emit_t *emit = data;</div><div class='add'>+	int result;</div><div class='add'>+</div><div class='add'>+	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!dev_priv || !LP_RING(dev_priv)-&gt;virtual_start) {</div><div class='add'>+		DRM_ERROR("called with no initialization\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	result = i915_emit_irq(dev);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+	if (DRM_COPY_TO_USER(emit-&gt;irq_seq, &amp;result, sizeof(int))) {</div><div class='add'>+		DRM_ERROR("copy_to_user\n");</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Doesn't need the hardware lock.</div><div class='add'>+ */</div><div class='add'>+static int i915_irq_wait(struct drm_device *dev, void *data,</div><div class='add'>+			 struct drm_file *file_priv)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	drm_i915_irq_wait_t *irqwait = data;</div><div class='add'>+</div><div class='add'>+	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!dev_priv) {</div><div class='add'>+		DRM_ERROR("called with no initialization\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return i915_wait_irq(dev, irqwait-&gt;irq_seq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int i915_vblank_pipe_get(struct drm_device *dev, void *data,</div><div class='add'>+			 struct drm_file *file_priv)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	drm_i915_vblank_pipe_t *pipe = data;</div><div class='add'>+</div><div class='add'>+	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!dev_priv) {</div><div class='add'>+		DRM_ERROR("called with no initialization\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pipe-&gt;pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Schedule buffer swap at given vertical blank.</div><div class='add'>+ */</div><div class='add'>+static int i915_vblank_swap(struct drm_device *dev, void *data,</div><div class='add'>+		     struct drm_file *file_priv)</div><div class='add'>+{</div><div class='add'>+	/* The delayed swap mechanism was fundamentally racy, and has been</div><div class='add'>+	 * removed.  The model was that the client requested a delayed flip/swap</div><div class='add'>+	 * from the kernel, then waited for vblank before continuing to perform</div><div class='add'>+	 * rendering.  The problem was that the kernel might wake the client</div><div class='add'>+	 * up before it dispatched the vblank swap (since the lock has to be</div><div class='add'>+	 * held while touching the ringbuffer), in which case the client would</div><div class='add'>+	 * clear and start the next frame before the swap occurred, and</div><div class='add'>+	 * flicker would occur in addition to likely missing the vblank.</div><div class='add'>+	 *</div><div class='add'>+	 * In the absence of this ioctl, userland falls back to a correct path</div><div class='add'>+	 * of waiting for a vblank, then dispatching the swap on its own.</div><div class='add'>+	 * Context switching to userland and back is plenty fast enough for</div><div class='add'>+	 * meeting the requirements of vblank swapping.</div><div class='add'>+	 */</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int i915_flip_bufs(struct drm_device *dev, void *data,</div><div class='ctx'> 			  struct drm_file *file_priv)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	DRM_DEBUG_DRIVER("%s\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);</div><div class='hunk'>@@ -739,7 +955,7 @@ static int i915_getparam(struct drm_device *dev, void *data,</div><div class='ctx'> 		value = dev-&gt;pdev-&gt;irq ? 1 : 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_PARAM_ALLOW_BATCHBUFFER:</div><div class='del'>-		value = dev_priv-&gt;allow_batchbuffer ? 1 : 0;</div><div class='add'>+		value = dev_priv-&gt;dri1.allow_batchbuffer ? 1 : 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_PARAM_LAST_DISPATCH:</div><div class='ctx'> 		value = READ_BREADCRUMB(dev_priv);</div><div class='hunk'>@@ -748,7 +964,7 @@ static int i915_getparam(struct drm_device *dev, void *data,</div><div class='ctx'> 		value = dev-&gt;pci_device;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_PARAM_HAS_GEM:</div><div class='del'>-		value = dev_priv-&gt;has_gem;</div><div class='add'>+		value = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_PARAM_NUM_FENCES_AVAIL:</div><div class='ctx'> 		value = dev_priv-&gt;num_fence_regs - dev_priv-&gt;fence_reg_start;</div><div class='hunk'>@@ -761,13 +977,13 @@ static int i915_getparam(struct drm_device *dev, void *data,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_PARAM_HAS_EXECBUF2:</div><div class='ctx'> 		/* depends on GEM */</div><div class='del'>-		value = dev_priv-&gt;has_gem;</div><div class='add'>+		value = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_PARAM_HAS_BSD:</div><div class='del'>-		value = HAS_BSD(dev);</div><div class='add'>+		value = intel_ring_initialized(&amp;dev_priv-&gt;ring[VCS]);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_PARAM_HAS_BLT:</div><div class='del'>-		value = HAS_BLT(dev);</div><div class='add'>+		value = intel_ring_initialized(&amp;dev_priv-&gt;ring[BCS]);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_PARAM_HAS_RELAXED_FENCING:</div><div class='ctx'> 		value = 1;</div><div class='hunk'>@@ -787,6 +1003,9 @@ static int i915_getparam(struct drm_device *dev, void *data,</div><div class='ctx'> 	case I915_PARAM_HAS_LLC:</div><div class='ctx'> 		value = HAS_LLC(dev);</div><div class='ctx'> 		break;</div><div class='add'>+	case I915_PARAM_HAS_ALIASING_PPGTT:</div><div class='add'>+		value = dev_priv-&gt;mm.aliasing_ppgtt ? 1 : 0;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		DRM_DEBUG_DRIVER("Unknown parameter %d\n",</div><div class='ctx'> 				 param-&gt;param);</div><div class='hunk'>@@ -816,10 +1035,9 @@ static int i915_setparam(struct drm_device *dev, void *data,</div><div class='ctx'> 	case I915_SETPARAM_USE_MI_BATCHBUFFER_START:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:</div><div class='del'>-		dev_priv-&gt;tex_lru_log_granularity = param-&gt;value;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_SETPARAM_ALLOW_BATCHBUFFER:</div><div class='del'>-		dev_priv-&gt;allow_batchbuffer = param-&gt;value;</div><div class='add'>+		dev_priv-&gt;dri1.allow_batchbuffer = param-&gt;value ? 1 : 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_SETPARAM_NUM_USED_FENCES:</div><div class='ctx'> 		if (param-&gt;value &gt; dev_priv-&gt;num_fence_regs ||</div><div class='hunk'>@@ -844,6 +1062,9 @@ static int i915_set_status_page(struct drm_device *dev, void *data,</div><div class='ctx'> 	drm_i915_hws_addr_t *hws = data;</div><div class='ctx'> 	struct intel_ring_buffer *ring = LP_RING(dev_priv);</div><div class='ctx'> </div><div class='add'>+	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	if (!I915_NEED_GFX_HWS(dev))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -861,23 +1082,17 @@ static int i915_set_status_page(struct drm_device *dev, void *data,</div><div class='ctx'> </div><div class='ctx'> 	ring-&gt;status_page.gfx_addr = hws-&gt;addr &amp; (0x1ffff&lt;&lt;12);</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;hws_map.offset = dev-&gt;agp-&gt;base + hws-&gt;addr;</div><div class='del'>-	dev_priv-&gt;hws_map.size = 4*1024;</div><div class='del'>-	dev_priv-&gt;hws_map.type = 0;</div><div class='del'>-	dev_priv-&gt;hws_map.flags = 0;</div><div class='del'>-	dev_priv-&gt;hws_map.mtrr = 0;</div><div class='del'>-</div><div class='del'>-	drm_core_ioremap_wc(&amp;dev_priv-&gt;hws_map, dev);</div><div class='del'>-	if (dev_priv-&gt;hws_map.handle == NULL) {</div><div class='add'>+	dev_priv-&gt;dri1.gfx_hws_cpu_addr = ioremap_wc(dev-&gt;agp-&gt;base + hws-&gt;addr,</div><div class='add'>+						     4096);</div><div class='add'>+	if (dev_priv-&gt;dri1.gfx_hws_cpu_addr == NULL) {</div><div class='ctx'> 		i915_dma_cleanup(dev);</div><div class='ctx'> 		ring-&gt;status_page.gfx_addr = 0;</div><div class='ctx'> 		DRM_ERROR("can not ioremap virtual address for"</div><div class='ctx'> 				" G33 hw status page\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='del'>-	ring-&gt;status_page.page_addr =</div><div class='del'>-		(void __force __iomem *)dev_priv-&gt;hws_map.handle;</div><div class='del'>-	memset_io(ring-&gt;status_page.page_addr, 0, PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	memset_io(dev_priv-&gt;dri1.gfx_hws_cpu_addr, 0, PAGE_SIZE);</div><div class='ctx'> 	I915_WRITE(HWS_PGA, ring-&gt;status_page.gfx_addr);</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_DRIVER("load hws HWS_PGA with gfx mem 0x%x\n",</div><div class='hunk'>@@ -1013,133 +1228,6 @@ intel_teardown_mchbar(struct drm_device *dev)</div><div class='ctx'> 		release_resource(&amp;dev_priv-&gt;mch_res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define PTE_ADDRESS_MASK		0xfffff000</div><div class='del'>-#define PTE_ADDRESS_MASK_HIGH		0x000000f0 /* i915+ */</div><div class='del'>-#define PTE_MAPPING_TYPE_UNCACHED	(0 &lt;&lt; 1)</div><div class='del'>-#define PTE_MAPPING_TYPE_DCACHE		(1 &lt;&lt; 1) /* i830 only */</div><div class='del'>-#define PTE_MAPPING_TYPE_CACHED		(3 &lt;&lt; 1)</div><div class='del'>-#define PTE_MAPPING_TYPE_MASK		(3 &lt;&lt; 1)</div><div class='del'>-#define PTE_VALID			(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i915_stolen_to_phys - take an offset into stolen memory and turn it into</div><div class='del'>- *                       a physical one</div><div class='del'>- * @dev: drm device</div><div class='del'>- * @offset: address to translate</div><div class='del'>- *</div><div class='del'>- * Some chip functions require allocations from stolen space and need the</div><div class='del'>- * physical address of the memory in question.</div><div class='del'>- */</div><div class='del'>-static unsigned long i915_stolen_to_phys(struct drm_device *dev, u32 offset)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct pci_dev *pdev = dev_priv-&gt;bridge_dev;</div><div class='del'>-	u32 base;</div><div class='del'>-</div><div class='del'>-#if 0</div><div class='del'>-	/* On the machines I have tested the Graphics Base of Stolen Memory</div><div class='del'>-	 * is unreliable, so compute the base by subtracting the stolen memory</div><div class='del'>-	 * from the Top of Low Usable DRAM which is where the BIOS places</div><div class='del'>-	 * the graphics stolen memory.</div><div class='del'>-	 */</div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen &gt; 3 || IS_G33(dev)) {</div><div class='del'>-		/* top 32bits are reserved = 0 */</div><div class='del'>-		pci_read_config_dword(pdev, 0xA4, &amp;base);</div><div class='del'>-	} else {</div><div class='del'>-		/* XXX presume 8xx is the same as i915 */</div><div class='del'>-		pci_bus_read_config_dword(pdev-&gt;bus, 2, 0x5C, &amp;base);</div><div class='del'>-	}</div><div class='del'>-#else</div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen &gt; 3 || IS_G33(dev)) {</div><div class='del'>-		u16 val;</div><div class='del'>-		pci_read_config_word(pdev, 0xb0, &amp;val);</div><div class='del'>-		base = val &gt;&gt; 4 &lt;&lt; 20;</div><div class='del'>-	} else {</div><div class='del'>-		u8 val;</div><div class='del'>-		pci_read_config_byte(pdev, 0x9c, &amp;val);</div><div class='del'>-		base = val &gt;&gt; 3 &lt;&lt; 27;</div><div class='del'>-	}</div><div class='del'>-	base -= dev_priv-&gt;mm.gtt-&gt;stolen_size;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	return base + offset;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void i915_warn_stolen(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	DRM_ERROR("not enough stolen space for compressed buffer, disabling\n");</div><div class='del'>-	DRM_ERROR("hint: you may be able to increase stolen memory size in the BIOS to avoid this\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void i915_setup_compression(struct drm_device *dev, int size)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_mm_node *compressed_fb, *uninitialized_var(compressed_llb);</div><div class='del'>-	unsigned long cfb_base;</div><div class='del'>-	unsigned long ll_base = 0;</div><div class='del'>-</div><div class='del'>-	/* Just in case the BIOS is doing something questionable. */</div><div class='del'>-	intel_disable_fbc(dev);</div><div class='del'>-</div><div class='del'>-	compressed_fb = drm_mm_search_free(&amp;dev_priv-&gt;mm.stolen, size, 4096, 0);</div><div class='del'>-	if (compressed_fb)</div><div class='del'>-		compressed_fb = drm_mm_get_block(compressed_fb, size, 4096);</div><div class='del'>-	if (!compressed_fb)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	cfb_base = i915_stolen_to_phys(dev, compressed_fb-&gt;start);</div><div class='del'>-	if (!cfb_base)</div><div class='del'>-		goto err_fb;</div><div class='del'>-</div><div class='del'>-	if (!(IS_GM45(dev) || HAS_PCH_SPLIT(dev))) {</div><div class='del'>-		compressed_llb = drm_mm_search_free(&amp;dev_priv-&gt;mm.stolen,</div><div class='del'>-						    4096, 4096, 0);</div><div class='del'>-		if (compressed_llb)</div><div class='del'>-			compressed_llb = drm_mm_get_block(compressed_llb,</div><div class='del'>-							  4096, 4096);</div><div class='del'>-		if (!compressed_llb)</div><div class='del'>-			goto err_fb;</div><div class='del'>-</div><div class='del'>-		ll_base = i915_stolen_to_phys(dev, compressed_llb-&gt;start);</div><div class='del'>-		if (!ll_base)</div><div class='del'>-			goto err_llb;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;cfb_size = size;</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;compressed_fb = compressed_fb;</div><div class='del'>-	if (HAS_PCH_SPLIT(dev))</div><div class='del'>-		I915_WRITE(ILK_DPFC_CB_BASE, compressed_fb-&gt;start);</div><div class='del'>-	else if (IS_GM45(dev)) {</div><div class='del'>-		I915_WRITE(DPFC_CB_BASE, compressed_fb-&gt;start);</div><div class='del'>-	} else {</div><div class='del'>-		I915_WRITE(FBC_CFB_BASE, cfb_base);</div><div class='del'>-		I915_WRITE(FBC_LL_BASE, ll_base);</div><div class='del'>-		dev_priv-&gt;compressed_llb = compressed_llb;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n",</div><div class='del'>-		      cfb_base, ll_base, size &gt;&gt; 20);</div><div class='del'>-	return;</div><div class='del'>-</div><div class='del'>-err_llb:</div><div class='del'>-	drm_mm_put_block(compressed_llb);</div><div class='del'>-err_fb:</div><div class='del'>-	drm_mm_put_block(compressed_fb);</div><div class='del'>-err:</div><div class='del'>-	dev_priv-&gt;no_fbc_reason = FBC_STOLEN_TOO_SMALL;</div><div class='del'>-	i915_warn_stolen(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void i915_cleanup_compression(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	drm_mm_put_block(dev_priv-&gt;compressed_fb);</div><div class='del'>-	if (dev_priv-&gt;compressed_llb)</div><div class='del'>-		drm_mm_put_block(dev_priv-&gt;compressed_llb);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* true = enable decode, false = disable decoder */</div><div class='ctx'> static unsigned int i915_vga_set_decode(void *cookie, bool state)</div><div class='ctx'> {</div><div class='hunk'>@@ -1158,14 +1246,14 @@ static void i915_switcheroo_set_state(struct pci_dev *pdev, enum vga_switcheroo_</div><div class='ctx'> 	struct drm_device *dev = pci_get_drvdata(pdev);</div><div class='ctx'> 	pm_message_t pmm = { .event = PM_EVENT_SUSPEND };</div><div class='ctx'> 	if (state == VGA_SWITCHEROO_ON) {</div><div class='del'>-		printk(KERN_INFO "i915: switched on\n");</div><div class='add'>+		pr_info("switched on\n");</div><div class='ctx'> 		dev-&gt;switch_power_state = DRM_SWITCH_POWER_CHANGING;</div><div class='ctx'> 		/* i915 resume handler doesn't set to D0 */</div><div class='ctx'> 		pci_set_power_state(dev-&gt;pdev, PCI_D0);</div><div class='ctx'> 		i915_resume(dev);</div><div class='ctx'> 		dev-&gt;switch_power_state = DRM_SWITCH_POWER_ON;</div><div class='ctx'> 	} else {</div><div class='del'>-		printk(KERN_ERR "i915: switched off\n");</div><div class='add'>+		pr_err("switched off\n");</div><div class='ctx'> 		dev-&gt;switch_power_state = DRM_SWITCH_POWER_CHANGING;</div><div class='ctx'> 		i915_suspend(dev, pmm);</div><div class='ctx'> 		dev-&gt;switch_power_state = DRM_SWITCH_POWER_OFF;</div><div class='hunk'>@@ -1183,88 +1271,11 @@ static bool i915_switcheroo_can_switch(struct pci_dev *pdev)</div><div class='ctx'> 	return can_switch;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool</div><div class='del'>-intel_enable_ppgtt(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	if (i915_enable_ppgtt &gt;= 0)</div><div class='del'>-		return i915_enable_ppgtt;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_INTEL_IOMMU</div><div class='del'>-	/* Disable ppgtt on SNB if VT-d is on. */</div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen == 6 &amp;&amp; intel_iommu_gfx_mapped)</div><div class='del'>-		return false;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int i915_load_gem_init(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	unsigned long prealloc_size, gtt_size, mappable_size;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	prealloc_size = dev_priv-&gt;mm.gtt-&gt;stolen_size;</div><div class='del'>-	gtt_size = dev_priv-&gt;mm.gtt-&gt;gtt_total_entries &lt;&lt; PAGE_SHIFT;</div><div class='del'>-	mappable_size = dev_priv-&gt;mm.gtt-&gt;gtt_mappable_entries &lt;&lt; PAGE_SHIFT;</div><div class='del'>-</div><div class='del'>-	/* Basic memrange allocator for stolen space */</div><div class='del'>-	drm_mm_init(&amp;dev_priv-&gt;mm.stolen, 0, prealloc_size);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	if (intel_enable_ppgtt(dev) &amp;&amp; HAS_ALIASING_PPGTT(dev)) {</div><div class='del'>-		/* PPGTT pdes are stolen from global gtt ptes, so shrink the</div><div class='del'>-		 * aperture accordingly when using aliasing ppgtt. */</div><div class='del'>-		gtt_size -= I915_PPGTT_PD_ENTRIES*PAGE_SIZE;</div><div class='del'>-		/* For paranoia keep the guard page in between. */</div><div class='del'>-		gtt_size -= PAGE_SIZE;</div><div class='del'>-</div><div class='del'>-		i915_gem_do_init(dev, 0, mappable_size, gtt_size);</div><div class='del'>-</div><div class='del'>-		ret = i915_gem_init_aliasing_ppgtt(dev);</div><div class='del'>-		if (ret) {</div><div class='del'>-			mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		/* Let GEM Manage all of the aperture.</div><div class='del'>-		 *</div><div class='del'>-		 * However, leave one page at the end still bound to the scratch</div><div class='del'>-		 * page.  There are a number of places where the hardware</div><div class='del'>-		 * apparently prefetches past the end of the object, and we've</div><div class='del'>-		 * seen multiple hangs with the GPU head pointer stuck in a</div><div class='del'>-		 * batchbuffer bound at the last page of the aperture.  One page</div><div class='del'>-		 * should be enough to keep any prefetching inside of the</div><div class='del'>-		 * aperture.</div><div class='del'>-		 */</div><div class='del'>-		i915_gem_do_init(dev, 0, mappable_size, gtt_size - PAGE_SIZE);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = i915_gem_init_hw(dev);</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	if (ret) {</div><div class='del'>-		i915_gem_cleanup_aliasing_ppgtt(dev);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Try to set up FBC with a reasonable compressed buffer size */</div><div class='del'>-	if (I915_HAS_FBC(dev) &amp;&amp; i915_powersave) {</div><div class='del'>-		int cfb_size;</div><div class='del'>-</div><div class='del'>-		/* Leave 1M for line length buffer &amp; misc. */</div><div class='del'>-</div><div class='del'>-		/* Try to get a 32M buffer... */</div><div class='del'>-		if (prealloc_size &gt; (36*1024*1024))</div><div class='del'>-			cfb_size = 32*1024*1024;</div><div class='del'>-		else /* fall back to 7/8 of the stolen space */</div><div class='del'>-			cfb_size = prealloc_size * 7 / 8;</div><div class='del'>-		i915_setup_compression(dev, cfb_size);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Allow hardware batchbuffers unless told otherwise. */</div><div class='del'>-	dev_priv-&gt;allow_batchbuffer = 1;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+static const struct vga_switcheroo_client_ops i915_switcheroo_ops = {</div><div class='add'>+	.set_gpu_state = i915_switcheroo_set_state,</div><div class='add'>+	.reprobe = NULL,</div><div class='add'>+	.can_switch = i915_switcheroo_can_switch,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static int i915_load_modeset_init(struct drm_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -1288,22 +1299,22 @@ static int i915_load_modeset_init(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	intel_register_dsm_handler();</div><div class='ctx'> </div><div class='del'>-	ret = vga_switcheroo_register_client(dev-&gt;pdev,</div><div class='del'>-					     i915_switcheroo_set_state,</div><div class='del'>-					     NULL,</div><div class='del'>-					     i915_switcheroo_can_switch);</div><div class='add'>+	ret = vga_switcheroo_register_client(dev-&gt;pdev, &amp;i915_switcheroo_ops);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto cleanup_vga_client;</div><div class='ctx'> </div><div class='del'>-	/* IIR "flip pending" bit means done if this bit is set */</div><div class='del'>-	if (IS_GEN3(dev) &amp;&amp; (I915_READ(ECOSKPD) &amp; ECO_FLIP_DONE))</div><div class='del'>-		dev_priv-&gt;flip_pending_is_done = true;</div><div class='add'>+	/* Initialise stolen first so that we may reserve preallocated</div><div class='add'>+	 * objects for the BIOS to KMS transition.</div><div class='add'>+	 */</div><div class='add'>+	ret = i915_gem_init_stolen(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto cleanup_vga_switcheroo;</div><div class='ctx'> </div><div class='ctx'> 	intel_modeset_init(dev);</div><div class='ctx'> </div><div class='del'>-	ret = i915_load_gem_init(dev);</div><div class='add'>+	ret = i915_gem_init(dev);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto cleanup_vga_switcheroo;</div><div class='add'>+		goto cleanup_gem_stolen;</div><div class='ctx'> </div><div class='ctx'> 	intel_modeset_gem_init(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1333,6 +1344,8 @@ cleanup_gem:</div><div class='ctx'> 	i915_gem_cleanup_ringbuffer(dev);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> 	i915_gem_cleanup_aliasing_ppgtt(dev);</div><div class='add'>+cleanup_gem_stolen:</div><div class='add'>+	i915_gem_cleanup_stolen(dev);</div><div class='ctx'> cleanup_vga_switcheroo:</div><div class='ctx'> 	vga_switcheroo_unregister_client(dev-&gt;pdev);</div><div class='ctx'> cleanup_vga_client:</div><div class='hunk'>@@ -1365,569 +1378,26 @@ void i915_master_destroy(struct drm_device *dev, struct drm_master *master)</div><div class='ctx'> 	master-&gt;driver_priv = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void i915_pineview_get_mem_freq(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 tmp;</div><div class='del'>-</div><div class='del'>-	tmp = I915_READ(CLKCFG);</div><div class='del'>-</div><div class='del'>-	switch (tmp &amp; CLKCFG_FSB_MASK) {</div><div class='del'>-	case CLKCFG_FSB_533:</div><div class='del'>-		dev_priv-&gt;fsb_freq = 533; /* 133*4 */</div><div class='del'>-		break;</div><div class='del'>-	case CLKCFG_FSB_800:</div><div class='del'>-		dev_priv-&gt;fsb_freq = 800; /* 200*4 */</div><div class='del'>-		break;</div><div class='del'>-	case CLKCFG_FSB_667:</div><div class='del'>-		dev_priv-&gt;fsb_freq =  667; /* 167*4 */</div><div class='del'>-		break;</div><div class='del'>-	case CLKCFG_FSB_400:</div><div class='del'>-		dev_priv-&gt;fsb_freq = 400; /* 100*4 */</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (tmp &amp; CLKCFG_MEM_MASK) {</div><div class='del'>-	case CLKCFG_MEM_533:</div><div class='del'>-		dev_priv-&gt;mem_freq = 533;</div><div class='del'>-		break;</div><div class='del'>-	case CLKCFG_MEM_667:</div><div class='del'>-		dev_priv-&gt;mem_freq = 667;</div><div class='del'>-		break;</div><div class='del'>-	case CLKCFG_MEM_800:</div><div class='del'>-		dev_priv-&gt;mem_freq = 800;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* detect pineview DDR3 setting */</div><div class='del'>-	tmp = I915_READ(CSHRDDR3CTL);</div><div class='del'>-	dev_priv-&gt;is_ddr3 = (tmp &amp; CSHRDDR3CTL_DDR3) ? 1 : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void i915_ironlake_get_mem_freq(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u16 ddrpll, csipll;</div><div class='del'>-</div><div class='del'>-	ddrpll = I915_READ16(DDRMPLL1);</div><div class='del'>-	csipll = I915_READ16(CSIPLL0);</div><div class='del'>-</div><div class='del'>-	switch (ddrpll &amp; 0xff) {</div><div class='del'>-	case 0xc:</div><div class='del'>-		dev_priv-&gt;mem_freq = 800;</div><div class='del'>-		break;</div><div class='del'>-	case 0x10:</div><div class='del'>-		dev_priv-&gt;mem_freq = 1066;</div><div class='del'>-		break;</div><div class='del'>-	case 0x14:</div><div class='del'>-		dev_priv-&gt;mem_freq = 1333;</div><div class='del'>-		break;</div><div class='del'>-	case 0x18:</div><div class='del'>-		dev_priv-&gt;mem_freq = 1600;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		DRM_DEBUG_DRIVER("unknown memory frequency 0x%02x\n",</div><div class='del'>-				 ddrpll &amp; 0xff);</div><div class='del'>-		dev_priv-&gt;mem_freq = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;r_t = dev_priv-&gt;mem_freq;</div><div class='del'>-</div><div class='del'>-	switch (csipll &amp; 0x3ff) {</div><div class='del'>-	case 0x00c:</div><div class='del'>-		dev_priv-&gt;fsb_freq = 3200;</div><div class='del'>-		break;</div><div class='del'>-	case 0x00e:</div><div class='del'>-		dev_priv-&gt;fsb_freq = 3733;</div><div class='del'>-		break;</div><div class='del'>-	case 0x010:</div><div class='del'>-		dev_priv-&gt;fsb_freq = 4266;</div><div class='del'>-		break;</div><div class='del'>-	case 0x012:</div><div class='del'>-		dev_priv-&gt;fsb_freq = 4800;</div><div class='del'>-		break;</div><div class='del'>-	case 0x014:</div><div class='del'>-		dev_priv-&gt;fsb_freq = 5333;</div><div class='del'>-		break;</div><div class='del'>-	case 0x016:</div><div class='del'>-		dev_priv-&gt;fsb_freq = 5866;</div><div class='del'>-		break;</div><div class='del'>-	case 0x018:</div><div class='del'>-		dev_priv-&gt;fsb_freq = 6400;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		DRM_DEBUG_DRIVER("unknown fsb frequency 0x%04x\n",</div><div class='del'>-				 csipll &amp; 0x3ff);</div><div class='del'>-		dev_priv-&gt;fsb_freq = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;fsb_freq == 3200) {</div><div class='del'>-		dev_priv-&gt;c_m = 0;</div><div class='del'>-	} else if (dev_priv-&gt;fsb_freq &gt; 3200 &amp;&amp; dev_priv-&gt;fsb_freq &lt;= 4800) {</div><div class='del'>-		dev_priv-&gt;c_m = 1;</div><div class='del'>-	} else {</div><div class='del'>-		dev_priv-&gt;c_m = 2;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct cparams {</div><div class='del'>-	u16 i;</div><div class='del'>-	u16 t;</div><div class='del'>-	u16 m;</div><div class='del'>-	u16 c;</div><div class='del'>-} cparams[] = {</div><div class='del'>-	{ 1, 1333, 301, 28664 },</div><div class='del'>-	{ 1, 1066, 294, 24460 },</div><div class='del'>-	{ 1, 800, 294, 25192 },</div><div class='del'>-	{ 0, 1333, 276, 27605 },</div><div class='del'>-	{ 0, 1066, 276, 27605 },</div><div class='del'>-	{ 0, 800, 231, 23784 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-unsigned long i915_chipset_val(struct drm_i915_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-	u64 total_count, diff, ret;</div><div class='del'>-	u32 count1, count2, count3, m = 0, c = 0;</div><div class='del'>-	unsigned long now = jiffies_to_msecs(jiffies), diff1;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	diff1 = now - dev_priv-&gt;last_time1;</div><div class='del'>-</div><div class='del'>-	/* Prevent division-by-zero if we are asking too fast.</div><div class='del'>-	 * Also, we don't get interesting results if we are polling</div><div class='del'>-	 * faster than once in 10ms, so just return the saved value</div><div class='del'>-	 * in such cases.</div><div class='del'>-	 */</div><div class='del'>-	if (diff1 &lt;= 10)</div><div class='del'>-		return dev_priv-&gt;chipset_power;</div><div class='del'>-</div><div class='del'>-	count1 = I915_READ(DMIEC);</div><div class='del'>-	count2 = I915_READ(DDREC);</div><div class='del'>-	count3 = I915_READ(CSIEC);</div><div class='del'>-</div><div class='del'>-	total_count = count1 + count2 + count3;</div><div class='del'>-</div><div class='del'>-	/* FIXME: handle per-counter overflow */</div><div class='del'>-	if (total_count &lt; dev_priv-&gt;last_count1) {</div><div class='del'>-		diff = ~0UL - dev_priv-&gt;last_count1;</div><div class='del'>-		diff += total_count;</div><div class='del'>-	} else {</div><div class='del'>-		diff = total_count - dev_priv-&gt;last_count1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(cparams); i++) {</div><div class='del'>-		if (cparams[i].i == dev_priv-&gt;c_m &amp;&amp;</div><div class='del'>-		    cparams[i].t == dev_priv-&gt;r_t) {</div><div class='del'>-			m = cparams[i].m;</div><div class='del'>-			c = cparams[i].c;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	diff = div_u64(diff, diff1);</div><div class='del'>-	ret = ((m * diff) + c);</div><div class='del'>-	ret = div_u64(ret, 10);</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;last_count1 = total_count;</div><div class='del'>-	dev_priv-&gt;last_time1 = now;</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;chipset_power = ret;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned long i915_mch_val(struct drm_i915_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-	unsigned long m, x, b;</div><div class='del'>-	u32 tsfs;</div><div class='del'>-</div><div class='del'>-	tsfs = I915_READ(TSFS);</div><div class='del'>-</div><div class='del'>-	m = ((tsfs &amp; TSFS_SLOPE_MASK) &gt;&gt; TSFS_SLOPE_SHIFT);</div><div class='del'>-	x = I915_READ8(TR1);</div><div class='del'>-</div><div class='del'>-	b = tsfs &amp; TSFS_INTR_MASK;</div><div class='del'>-</div><div class='del'>-	return ((m * x) / 127) - b;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u16 pvid_to_extvid(struct drm_i915_private *dev_priv, u8 pxvid)</div><div class='del'>-{</div><div class='del'>-	static const struct v_table {</div><div class='del'>-		u16 vd; /* in .1 mil */</div><div class='del'>-		u16 vm; /* in .1 mil */</div><div class='del'>-	} v_table[] = {</div><div class='del'>-		{ 0, 0, },</div><div class='del'>-		{ 375, 0, },</div><div class='del'>-		{ 500, 0, },</div><div class='del'>-		{ 625, 0, },</div><div class='del'>-		{ 750, 0, },</div><div class='del'>-		{ 875, 0, },</div><div class='del'>-		{ 1000, 0, },</div><div class='del'>-		{ 1125, 0, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4125, 3000, },</div><div class='del'>-		{ 4250, 3125, },</div><div class='del'>-		{ 4375, 3250, },</div><div class='del'>-		{ 4500, 3375, },</div><div class='del'>-		{ 4625, 3500, },</div><div class='del'>-		{ 4750, 3625, },</div><div class='del'>-		{ 4875, 3750, },</div><div class='del'>-		{ 5000, 3875, },</div><div class='del'>-		{ 5125, 4000, },</div><div class='del'>-		{ 5250, 4125, },</div><div class='del'>-		{ 5375, 4250, },</div><div class='del'>-		{ 5500, 4375, },</div><div class='del'>-		{ 5625, 4500, },</div><div class='del'>-		{ 5750, 4625, },</div><div class='del'>-		{ 5875, 4750, },</div><div class='del'>-		{ 6000, 4875, },</div><div class='del'>-		{ 6125, 5000, },</div><div class='del'>-		{ 6250, 5125, },</div><div class='del'>-		{ 6375, 5250, },</div><div class='del'>-		{ 6500, 5375, },</div><div class='del'>-		{ 6625, 5500, },</div><div class='del'>-		{ 6750, 5625, },</div><div class='del'>-		{ 6875, 5750, },</div><div class='del'>-		{ 7000, 5875, },</div><div class='del'>-		{ 7125, 6000, },</div><div class='del'>-		{ 7250, 6125, },</div><div class='del'>-		{ 7375, 6250, },</div><div class='del'>-		{ 7500, 6375, },</div><div class='del'>-		{ 7625, 6500, },</div><div class='del'>-		{ 7750, 6625, },</div><div class='del'>-		{ 7875, 6750, },</div><div class='del'>-		{ 8000, 6875, },</div><div class='del'>-		{ 8125, 7000, },</div><div class='del'>-		{ 8250, 7125, },</div><div class='del'>-		{ 8375, 7250, },</div><div class='del'>-		{ 8500, 7375, },</div><div class='del'>-		{ 8625, 7500, },</div><div class='del'>-		{ 8750, 7625, },</div><div class='del'>-		{ 8875, 7750, },</div><div class='del'>-		{ 9000, 7875, },</div><div class='del'>-		{ 9125, 8000, },</div><div class='del'>-		{ 9250, 8125, },</div><div class='del'>-		{ 9375, 8250, },</div><div class='del'>-		{ 9500, 8375, },</div><div class='del'>-		{ 9625, 8500, },</div><div class='del'>-		{ 9750, 8625, },</div><div class='del'>-		{ 9875, 8750, },</div><div class='del'>-		{ 10000, 8875, },</div><div class='del'>-		{ 10125, 9000, },</div><div class='del'>-		{ 10250, 9125, },</div><div class='del'>-		{ 10375, 9250, },</div><div class='del'>-		{ 10500, 9375, },</div><div class='del'>-		{ 10625, 9500, },</div><div class='del'>-		{ 10750, 9625, },</div><div class='del'>-		{ 10875, 9750, },</div><div class='del'>-		{ 11000, 9875, },</div><div class='del'>-		{ 11125, 10000, },</div><div class='del'>-		{ 11250, 10125, },</div><div class='del'>-		{ 11375, 10250, },</div><div class='del'>-		{ 11500, 10375, },</div><div class='del'>-		{ 11625, 10500, },</div><div class='del'>-		{ 11750, 10625, },</div><div class='del'>-		{ 11875, 10750, },</div><div class='del'>-		{ 12000, 10875, },</div><div class='del'>-		{ 12125, 11000, },</div><div class='del'>-		{ 12250, 11125, },</div><div class='del'>-		{ 12375, 11250, },</div><div class='del'>-		{ 12500, 11375, },</div><div class='del'>-		{ 12625, 11500, },</div><div class='del'>-		{ 12750, 11625, },</div><div class='del'>-		{ 12875, 11750, },</div><div class='del'>-		{ 13000, 11875, },</div><div class='del'>-		{ 13125, 12000, },</div><div class='del'>-		{ 13250, 12125, },</div><div class='del'>-		{ 13375, 12250, },</div><div class='del'>-		{ 13500, 12375, },</div><div class='del'>-		{ 13625, 12500, },</div><div class='del'>-		{ 13750, 12625, },</div><div class='del'>-		{ 13875, 12750, },</div><div class='del'>-		{ 14000, 12875, },</div><div class='del'>-		{ 14125, 13000, },</div><div class='del'>-		{ 14250, 13125, },</div><div class='del'>-		{ 14375, 13250, },</div><div class='del'>-		{ 14500, 13375, },</div><div class='del'>-		{ 14625, 13500, },</div><div class='del'>-		{ 14750, 13625, },</div><div class='del'>-		{ 14875, 13750, },</div><div class='del'>-		{ 15000, 13875, },</div><div class='del'>-		{ 15125, 14000, },</div><div class='del'>-		{ 15250, 14125, },</div><div class='del'>-		{ 15375, 14250, },</div><div class='del'>-		{ 15500, 14375, },</div><div class='del'>-		{ 15625, 14500, },</div><div class='del'>-		{ 15750, 14625, },</div><div class='del'>-		{ 15875, 14750, },</div><div class='del'>-		{ 16000, 14875, },</div><div class='del'>-		{ 16125, 15000, },</div><div class='del'>-	};</div><div class='del'>-	if (dev_priv-&gt;info-&gt;is_mobile)</div><div class='del'>-		return v_table[pxvid].vm;</div><div class='del'>-	else</div><div class='del'>-		return v_table[pxvid].vd;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void i915_update_gfx_val(struct drm_i915_private *dev_priv)</div><div class='add'>+static void</div><div class='add'>+i915_mtrr_setup(struct drm_i915_private *dev_priv, unsigned long base,</div><div class='add'>+		unsigned long size)</div><div class='ctx'> {</div><div class='del'>-	struct timespec now, diff1;</div><div class='del'>-	u64 diff;</div><div class='del'>-	unsigned long diffms;</div><div class='del'>-	u32 count;</div><div class='add'>+	dev_priv-&gt;mm.gtt_mtrr = -1;</div><div class='ctx'> </div><div class='del'>-	getrawmonotonic(&amp;now);</div><div class='del'>-	diff1 = timespec_sub(now, dev_priv-&gt;last_time2);</div><div class='del'>-</div><div class='del'>-	/* Don't divide by 0 */</div><div class='del'>-	diffms = diff1.tv_sec * 1000 + diff1.tv_nsec / 1000000;</div><div class='del'>-	if (!diffms)</div><div class='add'>+#if defined(CONFIG_X86_PAT)</div><div class='add'>+	if (cpu_has_pat)</div><div class='ctx'> 		return;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	count = I915_READ(GFXEC);</div><div class='del'>-</div><div class='del'>-	if (count &lt; dev_priv-&gt;last_count2) {</div><div class='del'>-		diff = ~0UL - dev_priv-&gt;last_count2;</div><div class='del'>-		diff += count;</div><div class='del'>-	} else {</div><div class='del'>-		diff = count - dev_priv-&gt;last_count2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;last_count2 = count;</div><div class='del'>-	dev_priv-&gt;last_time2 = now;</div><div class='del'>-</div><div class='del'>-	/* More magic constants... */</div><div class='del'>-	diff = diff * 1181;</div><div class='del'>-	diff = div_u64(diff, diffms * 10);</div><div class='del'>-	dev_priv-&gt;gfx_power = diff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-unsigned long i915_gfx_val(struct drm_i915_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-	unsigned long t, corr, state1, corr2, state2;</div><div class='del'>-	u32 pxvid, ext_v;</div><div class='del'>-</div><div class='del'>-	pxvid = I915_READ(PXVFREQ_BASE + (dev_priv-&gt;cur_delay * 4));</div><div class='del'>-	pxvid = (pxvid &gt;&gt; 24) &amp; 0x7f;</div><div class='del'>-	ext_v = pvid_to_extvid(dev_priv, pxvid);</div><div class='del'>-</div><div class='del'>-	state1 = ext_v;</div><div class='del'>-</div><div class='del'>-	t = i915_mch_val(dev_priv);</div><div class='del'>-</div><div class='del'>-	/* Revel in the empirically derived constants */</div><div class='del'>-</div><div class='del'>-	/* Correction factor in 1/100000 units */</div><div class='del'>-	if (t &gt; 80)</div><div class='del'>-		corr = ((t * 2349) + 135940);</div><div class='del'>-	else if (t &gt;= 50)</div><div class='del'>-		corr = ((t * 964) + 29317);</div><div class='del'>-	else /* &lt; 50 */</div><div class='del'>-		corr = ((t * 301) + 1004);</div><div class='del'>-</div><div class='del'>-	corr = corr * ((150142 * state1) / 10000 - 78642);</div><div class='del'>-	corr /= 100000;</div><div class='del'>-	corr2 = (corr * dev_priv-&gt;corr);</div><div class='del'>-</div><div class='del'>-	state2 = (corr2 * state1) / 10000;</div><div class='del'>-	state2 /= 100; /* convert to mW */</div><div class='del'>-</div><div class='del'>-	i915_update_gfx_val(dev_priv);</div><div class='del'>-</div><div class='del'>-	return dev_priv-&gt;gfx_power + state2;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Global for IPS driver to get at the current i915 device */</div><div class='del'>-static struct drm_i915_private *i915_mch_dev;</div><div class='del'>-/*</div><div class='del'>- * Lock protecting IPS related data structures</div><div class='del'>- *   - i915_mch_dev</div><div class='del'>- *   - dev_priv-&gt;max_delay</div><div class='del'>- *   - dev_priv-&gt;min_delay</div><div class='del'>- *   - dev_priv-&gt;fmax</div><div class='del'>- *   - dev_priv-&gt;gpu_busy</div><div class='del'>- */</div><div class='del'>-static DEFINE_SPINLOCK(mchdev_lock);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i915_read_mch_val - return value for IPS use</div><div class='del'>- *</div><div class='del'>- * Calculate and return a value for the IPS driver to use when deciding whether</div><div class='del'>- * we have thermal and power headroom to increase CPU or GPU power budget.</div><div class='del'>- */</div><div class='del'>-unsigned long i915_read_mch_val(void)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv;</div><div class='del'>-	unsigned long chipset_val, graphics_val, ret = 0;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;mchdev_lock);</div><div class='del'>-	if (!i915_mch_dev)</div><div class='del'>-		goto out_unlock;</div><div class='del'>-	dev_priv = i915_mch_dev;</div><div class='del'>-</div><div class='del'>-	chipset_val = i915_chipset_val(dev_priv);</div><div class='del'>-	graphics_val = i915_gfx_val(dev_priv);</div><div class='del'>-</div><div class='del'>-	ret = chipset_val + graphics_val;</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	spin_unlock(&amp;mchdev_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(i915_read_mch_val);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i915_gpu_raise - raise GPU frequency limit</div><div class='del'>- *</div><div class='del'>- * Raise the limit; IPS indicates we have thermal headroom.</div><div class='del'>- */</div><div class='del'>-bool i915_gpu_raise(void)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv;</div><div class='del'>-	bool ret = true;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;mchdev_lock);</div><div class='del'>-	if (!i915_mch_dev) {</div><div class='del'>-		ret = false;</div><div class='del'>-		goto out_unlock;</div><div class='del'>-	}</div><div class='del'>-	dev_priv = i915_mch_dev;</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;max_delay &gt; dev_priv-&gt;fmax)</div><div class='del'>-		dev_priv-&gt;max_delay--;</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	spin_unlock(&amp;mchdev_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(i915_gpu_raise);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i915_gpu_lower - lower GPU frequency limit</div><div class='del'>- *</div><div class='del'>- * IPS indicates we're close to a thermal limit, so throttle back the GPU</div><div class='del'>- * frequency maximum.</div><div class='del'>- */</div><div class='del'>-bool i915_gpu_lower(void)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv;</div><div class='del'>-	bool ret = true;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;mchdev_lock);</div><div class='del'>-	if (!i915_mch_dev) {</div><div class='del'>-		ret = false;</div><div class='del'>-		goto out_unlock;</div><div class='del'>-	}</div><div class='del'>-	dev_priv = i915_mch_dev;</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;max_delay &lt; dev_priv-&gt;min_delay)</div><div class='del'>-		dev_priv-&gt;max_delay++;</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	spin_unlock(&amp;mchdev_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(i915_gpu_lower);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i915_gpu_busy - indicate GPU business to IPS</div><div class='del'>- *</div><div class='del'>- * Tell the IPS driver whether or not the GPU is busy.</div><div class='del'>- */</div><div class='del'>-bool i915_gpu_busy(void)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv;</div><div class='del'>-	bool ret = false;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;mchdev_lock);</div><div class='del'>-	if (!i915_mch_dev)</div><div class='del'>-		goto out_unlock;</div><div class='del'>-	dev_priv = i915_mch_dev;</div><div class='del'>-</div><div class='del'>-	ret = dev_priv-&gt;busy;</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	spin_unlock(&amp;mchdev_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(i915_gpu_busy);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i915_gpu_turbo_disable - disable graphics turbo</div><div class='del'>- *</div><div class='del'>- * Disable graphics turbo by resetting the max frequency and setting the</div><div class='del'>- * current frequency to the default.</div><div class='del'>- */</div><div class='del'>-bool i915_gpu_turbo_disable(void)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv;</div><div class='del'>-	bool ret = true;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;mchdev_lock);</div><div class='del'>-	if (!i915_mch_dev) {</div><div class='del'>-		ret = false;</div><div class='del'>-		goto out_unlock;</div><div class='del'>-	}</div><div class='del'>-	dev_priv = i915_mch_dev;</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;max_delay = dev_priv-&gt;fstart;</div><div class='del'>-</div><div class='del'>-	if (!ironlake_set_drps(dev_priv-&gt;dev, dev_priv-&gt;fstart))</div><div class='del'>-		ret = false;</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	spin_unlock(&amp;mchdev_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(i915_gpu_turbo_disable);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * Tells the intel_ips driver that the i915 driver is now loaded, if</div><div class='del'>- * IPS got loaded first.</div><div class='del'>- *</div><div class='del'>- * This awkward dance is so that neither module has to depend on the</div><div class='del'>- * other in order for IPS to do the appropriate communication of</div><div class='del'>- * GPU turbo limits to i915.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-ips_ping_for_i915_load(void)</div><div class='del'>-{</div><div class='del'>-	void (*link)(void);</div><div class='del'>-</div><div class='del'>-	link = symbol_get(ips_link_to_i915_driver);</div><div class='del'>-	if (link) {</div><div class='del'>-		link();</div><div class='del'>-		symbol_put(ips_link_to_i915_driver);</div><div class='add'>+	/* Set up a WC MTRR for non-PAT systems.  This is more common than</div><div class='add'>+	 * one would think, because the kernel disables PAT on first</div><div class='add'>+	 * generation Core chips because WC PAT gets overridden by a UC</div><div class='add'>+	 * MTRR if present.  Even if a UC MTRR isn't present.</div><div class='add'>+	 */</div><div class='add'>+	dev_priv-&gt;mm.gtt_mtrr = mtrr_add(base, size, MTRR_TYPE_WRCOMB, 1);</div><div class='add'>+	if (dev_priv-&gt;mm.gtt_mtrr &lt; 0) {</div><div class='add'>+		DRM_INFO("MTRR allocation failed.  Graphics "</div><div class='add'>+			 "performance may suffer.\n");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1945,8 +1415,16 @@ ips_ping_for_i915_load(void)</div><div class='ctx'> int i915_driver_load(struct drm_device *dev, unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv;</div><div class='add'>+	struct intel_device_info *info;</div><div class='ctx'> 	int ret = 0, mmio_bar;</div><div class='del'>-	uint32_t agp_size;</div><div class='add'>+	uint32_t aperture_size;</div><div class='add'>+</div><div class='add'>+	info = (struct intel_device_info *) flags;</div><div class='add'>+</div><div class='add'>+	/* Refuse to load on gen6+ without kms enabled. */</div><div class='add'>+	if (info-&gt;gen &gt;= 6 &amp;&amp; !drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	/* i915 has 4 more counters */</div><div class='ctx'> 	dev-&gt;counters += 4;</div><div class='hunk'>@@ -1961,7 +1439,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;dev_private = (void *)dev_priv;</div><div class='ctx'> 	dev_priv-&gt;dev = dev;</div><div class='del'>-	dev_priv-&gt;info = (struct intel_device_info *) flags;</div><div class='add'>+	dev_priv-&gt;info = info;</div><div class='ctx'> </div><div class='ctx'> 	if (i915_get_bridge_dev(dev)) {</div><div class='ctx'> 		ret = -EIO;</div><div class='hunk'>@@ -2000,27 +1478,16 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)</div><div class='ctx'> 		goto out_rmmap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	agp_size = dev_priv-&gt;mm.gtt-&gt;gtt_mappable_entries &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	aperture_size = dev_priv-&gt;mm.gtt-&gt;gtt_mappable_entries &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	dev_priv-&gt;mm.gtt_mapping =</div><div class='del'>-		io_mapping_create_wc(dev-&gt;agp-&gt;base, agp_size);</div><div class='add'>+		io_mapping_create_wc(dev-&gt;agp-&gt;base, aperture_size);</div><div class='ctx'> 	if (dev_priv-&gt;mm.gtt_mapping == NULL) {</div><div class='ctx'> 		ret = -EIO;</div><div class='ctx'> 		goto out_rmmap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Set up a WC MTRR for non-PAT systems.  This is more common than</div><div class='del'>-	 * one would think, because the kernel disables PAT on first</div><div class='del'>-	 * generation Core chips because WC PAT gets overridden by a UC</div><div class='del'>-	 * MTRR if present.  Even if a UC MTRR isn't present.</div><div class='del'>-	 */</div><div class='del'>-	dev_priv-&gt;mm.gtt_mtrr = mtrr_add(dev-&gt;agp-&gt;base,</div><div class='del'>-					 agp_size,</div><div class='del'>-					 MTRR_TYPE_WRCOMB, 1);</div><div class='del'>-	if (dev_priv-&gt;mm.gtt_mtrr &lt; 0) {</div><div class='del'>-		DRM_INFO("MTRR allocation failed.  Graphics "</div><div class='del'>-			 "performance may suffer.\n");</div><div class='del'>-	}</div><div class='add'>+	i915_mtrr_setup(dev_priv, dev-&gt;agp-&gt;base, aperture_size);</div><div class='ctx'> </div><div class='ctx'> 	/* The i915 workqueue is primarily used for batched retirement of</div><div class='ctx'> 	 * requests (and thus managing bo) once the task has been completed</div><div class='hunk'>@@ -2044,9 +1511,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)</div><div class='ctx'> 		goto out_mtrrfree;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* enable GEM by default */</div><div class='del'>-	dev_priv-&gt;has_gem = 1;</div><div class='del'>-</div><div class='ctx'> 	intel_irq_init(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Try to make sure MCHBAR is enabled before poking at it */</div><div class='hunk'>@@ -2066,11 +1530,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)</div><div class='ctx'> 			goto out_gem_unload;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_PINEVIEW(dev))</div><div class='del'>-		i915_pineview_get_mem_freq(dev);</div><div class='del'>-	else if (IS_GEN5(dev))</div><div class='del'>-		i915_ironlake_get_mem_freq(dev);</div><div class='del'>-</div><div class='ctx'> 	/* On the 945G/GM, the chipset reports the MSI capability on the</div><div class='ctx'> 	 * integrated graphics even though the support isn't actually there</div><div class='ctx'> 	 * according to the published specs.  It doesn't appear to function</div><div class='hunk'>@@ -2090,7 +1549,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)</div><div class='ctx'> 	spin_lock_init(&amp;dev_priv-&gt;error_lock);</div><div class='ctx'> 	spin_lock_init(&amp;dev_priv-&gt;rps_lock);</div><div class='ctx'> </div><div class='del'>-	if (IS_IVYBRIDGE(dev))</div><div class='add'>+	if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))</div><div class='ctx'> 		dev_priv-&gt;num_pipe = 3;</div><div class='ctx'> 	else if (IS_MOBILE(dev) || !IS_GEN2(dev))</div><div class='ctx'> 		dev_priv-&gt;num_pipe = 2;</div><div class='hunk'>@@ -2114,6 +1573,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	i915_setup_sysfs(dev);</div><div class='add'>+</div><div class='ctx'> 	/* Must be done after probing outputs */</div><div class='ctx'> 	intel_opregion_init(dev);</div><div class='ctx'> 	acpi_video_register();</div><div class='hunk'>@@ -2121,12 +1582,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)</div><div class='ctx'> 	setup_timer(&amp;dev_priv-&gt;hangcheck_timer, i915_hangcheck_elapsed,</div><div class='ctx'> 		    (unsigned long) dev);</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;mchdev_lock);</div><div class='del'>-	i915_mch_dev = dev_priv;</div><div class='del'>-	dev_priv-&gt;mchdev_lock = &amp;mchdev_lock;</div><div class='del'>-	spin_unlock(&amp;mchdev_lock);</div><div class='del'>-</div><div class='del'>-	ips_ping_for_i915_load();</div><div class='add'>+	if (IS_GEN5(dev))</div><div class='add'>+		intel_gpu_ips_init(dev_priv);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2161,17 +1618,18 @@ int i915_driver_unload(struct drm_device *dev)</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;mchdev_lock);</div><div class='del'>-	i915_mch_dev = NULL;</div><div class='del'>-	spin_unlock(&amp;mchdev_lock);</div><div class='add'>+	intel_gpu_ips_teardown();</div><div class='add'>+</div><div class='add'>+	i915_teardown_sysfs(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (dev_priv-&gt;mm.inactive_shrinker.shrink)</div><div class='ctx'> 		unregister_shrinker(&amp;dev_priv-&gt;mm.inactive_shrinker);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	ret = i915_gpu_idle(dev, true);</div><div class='add'>+	ret = i915_gpu_idle(dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		DRM_ERROR("failed to idle hardware: %d\n", ret);</div><div class='add'>+	i915_gem_retire_requests(dev);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* Cancel the retire work handler, which should be idle now. */</div><div class='hunk'>@@ -2223,8 +1681,7 @@ int i915_driver_unload(struct drm_device *dev)</div><div class='ctx'> 		i915_gem_cleanup_ringbuffer(dev);</div><div class='ctx'> 		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> 		i915_gem_cleanup_aliasing_ppgtt(dev);</div><div class='del'>-		if (I915_HAS_FBC(dev) &amp;&amp; i915_powersave)</div><div class='del'>-			i915_cleanup_compression(dev);</div><div class='add'>+		i915_gem_cleanup_stolen(dev);</div><div class='ctx'> 		drm_mm_takedown(&amp;dev_priv-&gt;mm.stolen);</div><div class='ctx'> </div><div class='ctx'> 		intel_cleanup_overlay(dev);</div><div class='hunk'>@@ -2272,7 +1729,7 @@ int i915_driver_open(struct drm_device *dev, struct drm_file *file)</div><div class='ctx'>  * mode setting case, we want to restore the kernel's initial mode (just</div><div class='ctx'>  * in case the last client left us in a bad state).</div><div class='ctx'>  *</div><div class='del'>- * Additionally, in the non-mode setting case, we'll tear down the AGP</div><div class='add'>+ * Additionally, in the non-mode setting case, we'll tear down the GTT</div><div class='ctx'>  * and DMA structures, since the kernel won't be using them, and clea</div><div class='ctx'>  * up any GEM state.</div><div class='ctx'>  */</div><div class='hunk'>@@ -2317,7 +1774,7 @@ struct drm_ioctl_desc i915_ioctls[] = {</div><div class='ctx'> 	DRM_IOCTL_DEF_DRV(I915_INIT_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),</div><div class='ctx'> 	DRM_IOCTL_DEF_DRV(I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH),</div><div class='ctx'> 	DRM_IOCTL_DEF_DRV(I915_DESTROY_HEAP,  drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),</div><div class='del'>-	DRM_IOCTL_DEF_DRV(I915_SET_VBLANK_PIPE,  i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),</div><div class='add'>+	DRM_IOCTL_DEF_DRV(I915_SET_VBLANK_PIPE,  drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),</div><div class='ctx'> 	DRM_IOCTL_DEF_DRV(I915_GET_VBLANK_PIPE,  i915_vblank_pipe_get, DRM_AUTH),</div><div class='ctx'> 	DRM_IOCTL_DEF_DRV(I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),</div><div class='ctx'> 	DRM_IOCTL_DEF_DRV(I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),</div><div class='hunk'>@@ -2350,16 +1807,10 @@ struct drm_ioctl_desc i915_ioctls[] = {</div><div class='ctx'> </div><div class='ctx'> int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * Determine if the device really is AGP or not.</div><div class='del'>- *</div><div class='del'>- * All Intel graphics chipsets are treated as AGP, even if they are really</div><div class='del'>- * PCI-e.</div><div class='del'>- *</div><div class='del'>- * \param dev   The device to be tested.</div><div class='del'>- *</div><div class='del'>- * \returns</div><div class='del'>- * A value of 1 is always retured to indictate every i9x5 is AGP.</div><div class='add'>+/*</div><div class='add'>+ * This is really ugly: Because old userspace abused the linux agp interface to</div><div class='add'>+ * manage the gtt, we need to claim that all intel devices are agp.  For</div><div class='add'>+ * otherwise the drm core refuses to initialize the agp support code.</div><div class='ctx'>  */</div><div class='ctx'> int i915_driver_device_is_agp(struct drm_device * dev)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c<br/>index ae8a64f9f845..9fe9ebe52a7a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_drv.c</a></div><div class='hunk'>@@ -84,6 +84,12 @@ MODULE_PARM_DESC(lvds_downclock,</div><div class='ctx'> 		"Use panel (LVDS/eDP) downclocking for power savings "</div><div class='ctx'> 		"(default: false)");</div><div class='ctx'> </div><div class='add'>+int i915_lvds_channel_mode __read_mostly;</div><div class='add'>+module_param_named(lvds_channel_mode, i915_lvds_channel_mode, int, 0600);</div><div class='add'>+MODULE_PARM_DESC(lvds_channel_mode,</div><div class='add'>+		 "Specify LVDS channel mode "</div><div class='add'>+		 "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");</div><div class='add'>+</div><div class='ctx'> int i915_panel_use_ssc __read_mostly = -1;</div><div class='ctx'> module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);</div><div class='ctx'> MODULE_PARM_DESC(lvds_use_ssc,</div><div class='hunk'>@@ -93,8 +99,8 @@ MODULE_PARM_DESC(lvds_use_ssc,</div><div class='ctx'> int i915_vbt_sdvo_panel_type __read_mostly = -1;</div><div class='ctx'> module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600);</div><div class='ctx'> MODULE_PARM_DESC(vbt_sdvo_panel_type,</div><div class='del'>-		"Override selection of SDVO panel mode in the VBT "</div><div class='del'>-		"(default: auto)");</div><div class='add'>+		"Override/Ignore selection of SDVO panel mode in the VBT "</div><div class='add'>+		"(-2=ignore, -1=auto [default], index in VBT BIOS table)");</div><div class='ctx'> </div><div class='ctx'> static bool i915_try_reset __read_mostly = true;</div><div class='ctx'> module_param_named(reset, i915_try_reset, bool, 0600);</div><div class='hunk'>@@ -209,6 +215,7 @@ static const struct intel_device_info intel_ironlake_d_info = {</div><div class='ctx'> 	.gen = 5,</div><div class='ctx'> 	.need_gfx_hws = 1, .has_hotplug = 1,</div><div class='ctx'> 	.has_bsd_ring = 1,</div><div class='add'>+	.has_pch_split = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct intel_device_info intel_ironlake_m_info = {</div><div class='hunk'>@@ -216,6 +223,7 @@ static const struct intel_device_info intel_ironlake_m_info = {</div><div class='ctx'> 	.need_gfx_hws = 1, .has_hotplug = 1,</div><div class='ctx'> 	.has_fbc = 1,</div><div class='ctx'> 	.has_bsd_ring = 1,</div><div class='add'>+	.has_pch_split = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct intel_device_info intel_sandybridge_d_info = {</div><div class='hunk'>@@ -224,6 +232,8 @@ static const struct intel_device_info intel_sandybridge_d_info = {</div><div class='ctx'> 	.has_bsd_ring = 1,</div><div class='ctx'> 	.has_blt_ring = 1,</div><div class='ctx'> 	.has_llc = 1,</div><div class='add'>+	.has_pch_split = 1,</div><div class='add'>+	.has_force_wake = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct intel_device_info intel_sandybridge_m_info = {</div><div class='hunk'>@@ -233,6 +243,8 @@ static const struct intel_device_info intel_sandybridge_m_info = {</div><div class='ctx'> 	.has_bsd_ring = 1,</div><div class='ctx'> 	.has_blt_ring = 1,</div><div class='ctx'> 	.has_llc = 1,</div><div class='add'>+	.has_pch_split = 1,</div><div class='add'>+	.has_force_wake = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct intel_device_info intel_ivybridge_d_info = {</div><div class='hunk'>@@ -241,6 +253,8 @@ static const struct intel_device_info intel_ivybridge_d_info = {</div><div class='ctx'> 	.has_bsd_ring = 1,</div><div class='ctx'> 	.has_blt_ring = 1,</div><div class='ctx'> 	.has_llc = 1,</div><div class='add'>+	.has_pch_split = 1,</div><div class='add'>+	.has_force_wake = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct intel_device_info intel_ivybridge_m_info = {</div><div class='hunk'>@@ -250,6 +264,46 @@ static const struct intel_device_info intel_ivybridge_m_info = {</div><div class='ctx'> 	.has_bsd_ring = 1,</div><div class='ctx'> 	.has_blt_ring = 1,</div><div class='ctx'> 	.has_llc = 1,</div><div class='add'>+	.has_pch_split = 1,</div><div class='add'>+	.has_force_wake = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct intel_device_info intel_valleyview_m_info = {</div><div class='add'>+	.gen = 7, .is_mobile = 1,</div><div class='add'>+	.need_gfx_hws = 1, .has_hotplug = 1,</div><div class='add'>+	.has_fbc = 0,</div><div class='add'>+	.has_bsd_ring = 1,</div><div class='add'>+	.has_blt_ring = 1,</div><div class='add'>+	.is_valleyview = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct intel_device_info intel_valleyview_d_info = {</div><div class='add'>+	.gen = 7,</div><div class='add'>+	.need_gfx_hws = 1, .has_hotplug = 1,</div><div class='add'>+	.has_fbc = 0,</div><div class='add'>+	.has_bsd_ring = 1,</div><div class='add'>+	.has_blt_ring = 1,</div><div class='add'>+	.is_valleyview = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct intel_device_info intel_haswell_d_info = {</div><div class='add'>+	.is_haswell = 1, .gen = 7,</div><div class='add'>+	.need_gfx_hws = 1, .has_hotplug = 1,</div><div class='add'>+	.has_bsd_ring = 1,</div><div class='add'>+	.has_blt_ring = 1,</div><div class='add'>+	.has_llc = 1,</div><div class='add'>+	.has_pch_split = 1,</div><div class='add'>+	.has_force_wake = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct intel_device_info intel_haswell_m_info = {</div><div class='add'>+	.is_haswell = 1, .gen = 7, .is_mobile = 1,</div><div class='add'>+	.need_gfx_hws = 1, .has_hotplug = 1,</div><div class='add'>+	.has_bsd_ring = 1,</div><div class='add'>+	.has_blt_ring = 1,</div><div class='add'>+	.has_llc = 1,</div><div class='add'>+	.has_pch_split = 1,</div><div class='add'>+	.has_force_wake = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct pci_device_id pciidlist[] = {		/* aka */</div><div class='hunk'>@@ -297,6 +351,13 @@ static const struct pci_device_id pciidlist[] = {		/* aka */</div><div class='ctx'> 	INTEL_VGA_DEVICE(0x0162, &amp;intel_ivybridge_d_info), /* GT2 desktop */</div><div class='ctx'> 	INTEL_VGA_DEVICE(0x015a, &amp;intel_ivybridge_d_info), /* GT1 server */</div><div class='ctx'> 	INTEL_VGA_DEVICE(0x016a, &amp;intel_ivybridge_d_info), /* GT2 server */</div><div class='add'>+	INTEL_VGA_DEVICE(0x0402, &amp;intel_haswell_d_info), /* GT1 desktop */</div><div class='add'>+	INTEL_VGA_DEVICE(0x0412, &amp;intel_haswell_d_info), /* GT2 desktop */</div><div class='add'>+	INTEL_VGA_DEVICE(0x040a, &amp;intel_haswell_d_info), /* GT1 server */</div><div class='add'>+	INTEL_VGA_DEVICE(0x041a, &amp;intel_haswell_d_info), /* GT2 server */</div><div class='add'>+	INTEL_VGA_DEVICE(0x0406, &amp;intel_haswell_m_info), /* GT1 mobile */</div><div class='add'>+	INTEL_VGA_DEVICE(0x0416, &amp;intel_haswell_m_info), /* GT2 mobile */</div><div class='add'>+	INTEL_VGA_DEVICE(0x0c16, &amp;intel_haswell_d_info), /* SDV */</div><div class='ctx'> 	{0, 0, 0}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -308,6 +369,7 @@ MODULE_DEVICE_TABLE(pci, pciidlist);</div><div class='ctx'> #define INTEL_PCH_IBX_DEVICE_ID_TYPE	0x3b00</div><div class='ctx'> #define INTEL_PCH_CPT_DEVICE_ID_TYPE	0x1c00</div><div class='ctx'> #define INTEL_PCH_PPT_DEVICE_ID_TYPE	0x1e00</div><div class='add'>+#define INTEL_PCH_LPT_DEVICE_ID_TYPE	0x8c00</div><div class='ctx'> </div><div class='ctx'> void intel_detect_pch(struct drm_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -328,20 +390,45 @@ void intel_detect_pch(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 			if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {</div><div class='ctx'> 				dev_priv-&gt;pch_type = PCH_IBX;</div><div class='add'>+				dev_priv-&gt;num_pch_pll = 2;</div><div class='ctx'> 				DRM_DEBUG_KMS("Found Ibex Peak PCH\n");</div><div class='ctx'> 			} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {</div><div class='ctx'> 				dev_priv-&gt;pch_type = PCH_CPT;</div><div class='add'>+				dev_priv-&gt;num_pch_pll = 2;</div><div class='ctx'> 				DRM_DEBUG_KMS("Found CougarPoint PCH\n");</div><div class='ctx'> 			} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {</div><div class='ctx'> 				/* PantherPoint is CPT compatible */</div><div class='ctx'> 				dev_priv-&gt;pch_type = PCH_CPT;</div><div class='add'>+				dev_priv-&gt;num_pch_pll = 2;</div><div class='ctx'> 				DRM_DEBUG_KMS("Found PatherPoint PCH\n");</div><div class='add'>+			} else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {</div><div class='add'>+				dev_priv-&gt;pch_type = PCH_LPT;</div><div class='add'>+				dev_priv-&gt;num_pch_pll = 0;</div><div class='add'>+				DRM_DEBUG_KMS("Found LynxPoint PCH\n");</div><div class='ctx'> 			}</div><div class='add'>+			BUG_ON(dev_priv-&gt;num_pch_pll &gt; I915_NUM_PLLS);</div><div class='ctx'> 		}</div><div class='ctx'> 		pci_dev_put(pch);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool i915_semaphore_is_enabled(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &lt; 6)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (i915_semaphores &gt;= 0)</div><div class='add'>+		return i915_semaphores;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_INTEL_IOMMU</div><div class='add'>+	/* Enable semaphores on SNB when IO remapping is off */</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen == 6 &amp;&amp; intel_iommu_gfx_mapped)</div><div class='add'>+		return false;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> 	int count;</div><div class='hunk'>@@ -366,7 +453,7 @@ void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	while (count++ &lt; 50 &amp;&amp; (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) &amp; 1))</div><div class='ctx'> 		udelay(10);</div><div class='ctx'> </div><div class='del'>-	I915_WRITE_NOTRACE(FORCEWAKE_MT, (1&lt;&lt;16) | 1);</div><div class='add'>+	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_ENABLE(1));</div><div class='ctx'> 	POSTING_READ(FORCEWAKE_MT);</div><div class='ctx'> </div><div class='ctx'> 	count = 0;</div><div class='hunk'>@@ -408,7 +495,7 @@ void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)</div><div class='ctx'> </div><div class='ctx'> void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='del'>-	I915_WRITE_NOTRACE(FORCEWAKE_MT, (1&lt;&lt;16) | 0);</div><div class='add'>+	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(1));</div><div class='ctx'> 	/* The below doubles as a POSTING_READ */</div><div class='ctx'> 	gen6_gt_check_fifodbg(dev_priv);</div><div class='ctx'> }</div><div class='hunk'>@@ -446,6 +533,31 @@ int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void vlv_force_wake_get(struct drm_i915_private *dev_priv)</div><div class='add'>+{</div><div class='add'>+	int count;</div><div class='add'>+</div><div class='add'>+	count = 0;</div><div class='add'>+</div><div class='add'>+	/* Already awake? */</div><div class='add'>+	if ((I915_READ(0x130094) &amp; 0xa1) == 0xa1)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffffffff);</div><div class='add'>+	POSTING_READ(FORCEWAKE_VLV);</div><div class='add'>+</div><div class='add'>+	count = 0;</div><div class='add'>+	while (count++ &lt; 50 &amp;&amp; (I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) &amp; 1) == 0)</div><div class='add'>+		udelay(10);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void vlv_force_wake_put(struct drm_i915_private *dev_priv)</div><div class='add'>+{</div><div class='add'>+	I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffff0000);</div><div class='add'>+	/* FIXME: confirm VLV behavior with Punit folks */</div><div class='add'>+	POSTING_READ(FORCEWAKE_VLV);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int i915_drm_freeze(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='hunk'>@@ -525,15 +637,16 @@ static int i915_drm_thaw(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* KMS EnterVT equivalent */</div><div class='ctx'> 	if (drm_core_check_feature(dev, DRIVER_MODESET)) {</div><div class='add'>+		if (HAS_PCH_SPLIT(dev))</div><div class='add'>+			ironlake_init_pch_refclk(dev);</div><div class='add'>+</div><div class='ctx'> 		mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> 		dev_priv-&gt;mm.suspended = 0;</div><div class='ctx'> </div><div class='ctx'> 		error = i915_gem_init_hw(dev);</div><div class='ctx'> 		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='del'>-		if (HAS_PCH_SPLIT(dev))</div><div class='del'>-			ironlake_init_pch_refclk(dev);</div><div class='del'>-</div><div class='add'>+		intel_modeset_init_hw(dev);</div><div class='ctx'> 		drm_mode_config_reset(dev);</div><div class='ctx'> 		drm_irq_install(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -541,9 +654,6 @@ static int i915_drm_thaw(struct drm_device *dev)</div><div class='ctx'> 		mutex_lock(&amp;dev-&gt;mode_config.mutex);</div><div class='ctx'> 		drm_helper_resume_force_mode(dev);</div><div class='ctx'> 		mutex_unlock(&amp;dev-&gt;mode_config.mutex);</div><div class='del'>-</div><div class='del'>-		if (IS_IRONLAKE_M(dev))</div><div class='del'>-			ironlake_enable_rc6(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	intel_opregion_init(dev);</div><div class='hunk'>@@ -576,7 +686,7 @@ int i915_resume(struct drm_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int i8xx_do_reset(struct drm_device *dev, u8 flags)</div><div class='add'>+static int i8xx_do_reset(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> </div><div class='hunk'>@@ -610,11 +720,12 @@ static int i965_reset_complete(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	u8 gdrst;</div><div class='ctx'> 	pci_read_config_byte(dev-&gt;pdev, I965_GDRST, &amp;gdrst);</div><div class='del'>-	return gdrst &amp; 0x1;</div><div class='add'>+	return (gdrst &amp; GRDOM_RESET_ENABLE) == 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int i965_do_reset(struct drm_device *dev, u8 flags)</div><div class='add'>+static int i965_do_reset(struct drm_device *dev)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='ctx'> 	u8 gdrst;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -623,20 +734,43 @@ static int i965_do_reset(struct drm_device *dev, u8 flags)</div><div class='ctx'> 	 * triggers the reset; when done, the hardware will clear it.</div><div class='ctx'> 	 */</div><div class='ctx'> 	pci_read_config_byte(dev-&gt;pdev, I965_GDRST, &amp;gdrst);</div><div class='del'>-	pci_write_config_byte(dev-&gt;pdev, I965_GDRST, gdrst | flags | 0x1);</div><div class='add'>+	pci_write_config_byte(dev-&gt;pdev, I965_GDRST,</div><div class='add'>+			      gdrst | GRDOM_RENDER |</div><div class='add'>+			      GRDOM_RESET_ENABLE);</div><div class='add'>+	ret =  wait_for(i965_reset_complete(dev), 500);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* We can't reset render&amp;media without also resetting display ... */</div><div class='add'>+	pci_read_config_byte(dev-&gt;pdev, I965_GDRST, &amp;gdrst);</div><div class='add'>+	pci_write_config_byte(dev-&gt;pdev, I965_GDRST,</div><div class='add'>+			      gdrst | GRDOM_MEDIA |</div><div class='add'>+			      GRDOM_RESET_ENABLE);</div><div class='ctx'> </div><div class='ctx'> 	return wait_for(i965_reset_complete(dev), 500);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ironlake_do_reset(struct drm_device *dev, u8 flags)</div><div class='add'>+static int ironlake_do_reset(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);</div><div class='del'>-	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | flags | 0x1);</div><div class='add'>+	u32 gdrst;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);</div><div class='add'>+	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,</div><div class='add'>+		   gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE);</div><div class='add'>+	ret = wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) &amp; 0x1, 500);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* We can't reset render&amp;media without also resetting display ... */</div><div class='add'>+	gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);</div><div class='add'>+	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,</div><div class='add'>+		   gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE);</div><div class='ctx'> 	return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) &amp; 0x1, 500);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gen6_do_reset(struct drm_device *dev, u8 flags)</div><div class='add'>+static int gen6_do_reset(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	int	ret;</div><div class='hunk'>@@ -671,10 +805,44 @@ static int gen6_do_reset(struct drm_device *dev, u8 flags)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int intel_gpu_reset(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int ret = -ENODEV;</div><div class='add'>+</div><div class='add'>+	switch (INTEL_INFO(dev)-&gt;gen) {</div><div class='add'>+	case 7:</div><div class='add'>+	case 6:</div><div class='add'>+		ret = gen6_do_reset(dev);</div><div class='add'>+		break;</div><div class='add'>+	case 5:</div><div class='add'>+		ret = ironlake_do_reset(dev);</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		ret = i965_do_reset(dev);</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		ret = i8xx_do_reset(dev);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Also reset the gpu hangman. */</div><div class='add'>+	if (dev_priv-&gt;stop_rings) {</div><div class='add'>+		DRM_DEBUG("Simulated gpu hang, resetting stop_rings\n");</div><div class='add'>+		dev_priv-&gt;stop_rings = 0;</div><div class='add'>+		if (ret == -ENODEV) {</div><div class='add'>+			DRM_ERROR("Reset not implemented, but ignoring "</div><div class='add'>+				  "error for simulated gpu hangs\n");</div><div class='add'>+			ret = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * i915_reset - reset chip after a hang</div><div class='ctx'>  * @dev: drm device to reset</div><div class='del'>- * @flags: reset domains</div><div class='ctx'>  *</div><div class='ctx'>  * Reset the chip.  Useful if a hang is detected. Returns zero on successful</div><div class='ctx'>  * reset or otherwise an error code.</div><div class='hunk'>@@ -687,14 +855,9 @@ static int gen6_do_reset(struct drm_device *dev, u8 flags)</div><div class='ctx'>  *   - re-init interrupt state</div><div class='ctx'>  *   - re-init display</div><div class='ctx'>  */</div><div class='del'>-int i915_reset(struct drm_device *dev, u8 flags)</div><div class='add'>+int i915_reset(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	/*</div><div class='del'>-	 * We really should only reset the display subsystem if we actually</div><div class='del'>-	 * need to</div><div class='del'>-	 */</div><div class='del'>-	bool need_display = true;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!i915_try_reset)</div><div class='hunk'>@@ -703,26 +866,16 @@ int i915_reset(struct drm_device *dev, u8 flags)</div><div class='ctx'> 	if (!mutex_trylock(&amp;dev-&gt;struct_mutex))</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='add'>+	dev_priv-&gt;stop_rings = 0;</div><div class='add'>+</div><div class='ctx'> 	i915_gem_reset(dev);</div><div class='ctx'> </div><div class='ctx'> 	ret = -ENODEV;</div><div class='del'>-	if (get_seconds() - dev_priv-&gt;last_gpu_reset &lt; 5) {</div><div class='add'>+	if (get_seconds() - dev_priv-&gt;last_gpu_reset &lt; 5)</div><div class='ctx'> 		DRM_ERROR("GPU hanging too fast, declaring wedged!\n");</div><div class='del'>-	} else switch (INTEL_INFO(dev)-&gt;gen) {</div><div class='del'>-	case 7:</div><div class='del'>-	case 6:</div><div class='del'>-		ret = gen6_do_reset(dev, flags);</div><div class='del'>-		break;</div><div class='del'>-	case 5:</div><div class='del'>-		ret = ironlake_do_reset(dev, flags);</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		ret = i965_do_reset(dev, flags);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		ret = i8xx_do_reset(dev, flags);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	else</div><div class='add'>+		ret = intel_gpu_reset(dev);</div><div class='add'>+</div><div class='ctx'> 	dev_priv-&gt;last_gpu_reset = get_seconds();</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		DRM_ERROR("Failed to reset chip.\n");</div><div class='hunk'>@@ -746,36 +899,27 @@ int i915_reset(struct drm_device *dev, u8 flags)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (drm_core_check_feature(dev, DRIVER_MODESET) ||</div><div class='ctx'> 			!dev_priv-&gt;mm.suspended) {</div><div class='add'>+		struct intel_ring_buffer *ring;</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='ctx'> 		dev_priv-&gt;mm.suspended = 0;</div><div class='ctx'> </div><div class='ctx'> 		i915_gem_init_swizzling(dev);</div><div class='ctx'> </div><div class='del'>-		dev_priv-&gt;ring[RCS].init(&amp;dev_priv-&gt;ring[RCS]);</div><div class='del'>-		if (HAS_BSD(dev))</div><div class='del'>-		    dev_priv-&gt;ring[VCS].init(&amp;dev_priv-&gt;ring[VCS]);</div><div class='del'>-		if (HAS_BLT(dev))</div><div class='del'>-		    dev_priv-&gt;ring[BCS].init(&amp;dev_priv-&gt;ring[BCS]);</div><div class='add'>+		for_each_ring(ring, dev_priv, i)</div><div class='add'>+			ring-&gt;init(ring);</div><div class='ctx'> </div><div class='ctx'> 		i915_gem_init_ppgtt(dev);</div><div class='ctx'> </div><div class='ctx'> 		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-		drm_irq_uninstall(dev);</div><div class='del'>-		drm_mode_config_reset(dev);</div><div class='del'>-		drm_irq_install(dev);</div><div class='del'>-		mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+		if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+			intel_modeset_init_hw(dev);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Perform a full modeset as on later generations, e.g. Ironlake, we may</div><div class='del'>-	 * need to retrain the display link and cannot just restore the register</div><div class='del'>-	 * values.</div><div class='del'>-	 */</div><div class='del'>-	if (need_display) {</div><div class='del'>-		mutex_lock(&amp;dev-&gt;mode_config.mutex);</div><div class='del'>-		drm_helper_resume_force_mode(dev);</div><div class='del'>-		mutex_unlock(&amp;dev-&gt;mode_config.mutex);</div><div class='add'>+		drm_irq_uninstall(dev);</div><div class='add'>+		drm_irq_install(dev);</div><div class='add'>+	} else {</div><div class='add'>+		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -874,7 +1018,7 @@ static const struct dev_pm_ops i915_pm_ops = {</div><div class='ctx'> 	.restore = i915_pm_resume,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct vm_operations_struct i915_gem_vm_ops = {</div><div class='add'>+static const struct vm_operations_struct i915_gem_vm_ops = {</div><div class='ctx'> 	.fault = i915_gem_fault,</div><div class='ctx'> 	.open = drm_gem_vm_open,</div><div class='ctx'> 	.close = drm_gem_vm_close,</div><div class='hunk'>@@ -901,7 +1045,7 @@ static struct drm_driver driver = {</div><div class='ctx'> 	 */</div><div class='ctx'> 	.driver_features =</div><div class='ctx'> 	    DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/</div><div class='del'>-	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,</div><div class='add'>+	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | DRIVER_PRIME,</div><div class='ctx'> 	.load = i915_driver_load,</div><div class='ctx'> 	.unload = i915_driver_unload,</div><div class='ctx'> 	.open = i915_driver_open,</div><div class='hunk'>@@ -924,6 +1068,12 @@ static struct drm_driver driver = {</div><div class='ctx'> 	.gem_init_object = i915_gem_init_object,</div><div class='ctx'> 	.gem_free_object = i915_gem_free_object,</div><div class='ctx'> 	.gem_vm_ops = &amp;i915_gem_vm_ops,</div><div class='add'>+</div><div class='add'>+	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,</div><div class='add'>+	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,</div><div class='add'>+	.gem_prime_export = i915_gem_prime_export,</div><div class='add'>+	.gem_prime_import = i915_gem_prime_import,</div><div class='add'>+</div><div class='ctx'> 	.dumb_create = i915_gem_dumb_create,</div><div class='ctx'> 	.dumb_map_offset = i915_gem_mmap_gtt,</div><div class='ctx'> 	.dumb_destroy = i915_gem_dumb_destroy,</div><div class='hunk'>@@ -993,6 +1143,12 @@ MODULE_AUTHOR(DRIVER_AUTHOR);</div><div class='ctx'> MODULE_DESCRIPTION(DRIVER_DESC);</div><div class='ctx'> MODULE_LICENSE("GPL and additional rights");</div><div class='ctx'> </div><div class='add'>+/* We give fast paths for the really cool registers */</div><div class='add'>+#define NEEDS_FORCE_WAKE(dev_priv, reg) \</div><div class='add'>+	((HAS_FORCE_WAKE((dev_priv)-&gt;dev)) &amp;&amp; \</div><div class='add'>+	 ((reg) &lt; 0x40000) &amp;&amp;            \</div><div class='add'>+	 ((reg) != FORCEWAKE))</div><div class='add'>+</div><div class='ctx'> #define __i915_read(x, y) \</div><div class='ctx'> u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \</div><div class='ctx'> 	u##x val = 0; \</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h<br/>index 5fabc6c31fec..b0b676abde0d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_drv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_drv.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_drv.h</a></div><div class='hunk'>@@ -38,6 +38,8 @@</div><div class='ctx'> #include &lt;linux/i2c-algo-bit.h&gt;</div><div class='ctx'> #include &lt;drm/intel-gtt.h&gt;</div><div class='ctx'> #include &lt;linux/backlight.h&gt;</div><div class='add'>+#include &lt;linux/intel-iommu.h&gt;</div><div class='add'>+#include &lt;linux/kref.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* General customization:</div><div class='ctx'>  */</div><div class='hunk'>@@ -63,10 +65,30 @@ enum plane {</div><div class='ctx'> };</div><div class='ctx'> #define plane_name(p) ((p) + 'A')</div><div class='ctx'> </div><div class='add'>+enum port {</div><div class='add'>+	PORT_A = 0,</div><div class='add'>+	PORT_B,</div><div class='add'>+	PORT_C,</div><div class='add'>+	PORT_D,</div><div class='add'>+	PORT_E,</div><div class='add'>+	I915_MAX_PORTS</div><div class='add'>+};</div><div class='add'>+#define port_name(p) ((p) + 'A')</div><div class='add'>+</div><div class='ctx'> #define I915_GEM_GPU_DOMAINS	(~(I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT))</div><div class='ctx'> </div><div class='ctx'> #define for_each_pipe(p) for ((p) = 0; (p) &lt; dev_priv-&gt;num_pipe; (p)++)</div><div class='ctx'> </div><div class='add'>+struct intel_pch_pll {</div><div class='add'>+	int refcount; /* count of number of CRTCs sharing this PLL */</div><div class='add'>+	int active; /* count of number of active CRTCs (i.e. DPMS on) */</div><div class='add'>+	bool on; /* is the PLL actually active? Disabled during modeset */</div><div class='add'>+	int pll_reg;</div><div class='add'>+	int fp0_reg;</div><div class='add'>+	int fp1_reg;</div><div class='add'>+};</div><div class='add'>+#define I915_NUM_PLLS 2</div><div class='add'>+</div><div class='ctx'> /* Interface history:</div><div class='ctx'>  *</div><div class='ctx'>  * 1.1: Original.</div><div class='hunk'>@@ -111,11 +133,11 @@ struct opregion_asle;</div><div class='ctx'> struct drm_i915_private;</div><div class='ctx'> </div><div class='ctx'> struct intel_opregion {</div><div class='del'>-	struct opregion_header *header;</div><div class='del'>-	struct opregion_acpi *acpi;</div><div class='del'>-	struct opregion_swsci *swsci;</div><div class='del'>-	struct opregion_asle *asle;</div><div class='del'>-	void *vbt;</div><div class='add'>+	struct opregion_header __iomem *header;</div><div class='add'>+	struct opregion_acpi __iomem *acpi;</div><div class='add'>+	struct opregion_swsci __iomem *swsci;</div><div class='add'>+	struct opregion_asle __iomem *asle;</div><div class='add'>+	void __iomem *vbt;</div><div class='ctx'> 	u32 __iomem *lid_state;</div><div class='ctx'> };</div><div class='ctx'> #define OPREGION_SIZE            (8*1024)</div><div class='hunk'>@@ -135,7 +157,6 @@ struct drm_i915_master_private {</div><div class='ctx'> struct drm_i915_fence_reg {</div><div class='ctx'> 	struct list_head lru_list;</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='del'>-	uint32_t setup_seqno;</div><div class='ctx'> 	int pin_count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -151,8 +172,11 @@ struct sdvo_device_mapping {</div><div class='ctx'> struct intel_display_error_state;</div><div class='ctx'> </div><div class='ctx'> struct drm_i915_error_state {</div><div class='add'>+	struct kref ref;</div><div class='ctx'> 	u32 eir;</div><div class='ctx'> 	u32 pgtbl_er;</div><div class='add'>+	u32 ier;</div><div class='add'>+	bool waiting[I915_NUM_RINGS];</div><div class='ctx'> 	u32 pipestat[I915_MAX_PIPES];</div><div class='ctx'> 	u32 tail[I915_NUM_RINGS];</div><div class='ctx'> 	u32 head[I915_NUM_RINGS];</div><div class='hunk'>@@ -218,11 +242,15 @@ struct drm_i915_display_funcs {</div><div class='ctx'> 	void (*update_wm)(struct drm_device *dev);</div><div class='ctx'> 	void (*update_sprite_wm)(struct drm_device *dev, int pipe,</div><div class='ctx'> 				 uint32_t sprite_width, int pixel_size);</div><div class='add'>+	void (*sanitize_pm)(struct drm_device *dev);</div><div class='add'>+	void (*update_linetime_wm)(struct drm_device *dev, int pipe,</div><div class='add'>+				 struct drm_display_mode *mode);</div><div class='ctx'> 	int (*crtc_mode_set)(struct drm_crtc *crtc,</div><div class='ctx'> 			     struct drm_display_mode *mode,</div><div class='ctx'> 			     struct drm_display_mode *adjusted_mode,</div><div class='ctx'> 			     int x, int y,</div><div class='ctx'> 			     struct drm_framebuffer *old_fb);</div><div class='add'>+	void (*off)(struct drm_crtc *crtc);</div><div class='ctx'> 	void (*write_eld)(struct drm_connector *connector,</div><div class='ctx'> 			  struct drm_crtc *crtc);</div><div class='ctx'> 	void (*fdi_link_train)(struct drm_crtc *crtc);</div><div class='hunk'>@@ -255,6 +283,10 @@ struct intel_device_info {</div><div class='ctx'> 	u8 is_broadwater:1;</div><div class='ctx'> 	u8 is_crestline:1;</div><div class='ctx'> 	u8 is_ivybridge:1;</div><div class='add'>+	u8 is_valleyview:1;</div><div class='add'>+	u8 has_pch_split:1;</div><div class='add'>+	u8 has_force_wake:1;</div><div class='add'>+	u8 is_haswell:1;</div><div class='ctx'> 	u8 has_fbc:1;</div><div class='ctx'> 	u8 has_pipe_cxsr:1;</div><div class='ctx'> 	u8 has_hotplug:1;</div><div class='hunk'>@@ -291,10 +323,12 @@ enum no_fbc_reason {</div><div class='ctx'> enum intel_pch {</div><div class='ctx'> 	PCH_IBX,	/* Ibexpeak PCH */</div><div class='ctx'> 	PCH_CPT,	/* Cougarpoint PCH */</div><div class='add'>+	PCH_LPT,	/* Lynxpoint PCH */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define QUIRK_PIPEA_FORCE (1&lt;&lt;0)</div><div class='ctx'> #define QUIRK_LVDS_SSC_DISABLE (1&lt;&lt;1)</div><div class='add'>+#define QUIRK_INVERT_BRIGHTNESS (1&lt;&lt;2)</div><div class='ctx'> </div><div class='ctx'> struct intel_fbdev;</div><div class='ctx'> struct intel_fbc_work;</div><div class='hunk'>@@ -302,7 +336,6 @@ struct intel_fbc_work;</div><div class='ctx'> struct intel_gmbus {</div><div class='ctx'> 	struct i2c_adapter adapter;</div><div class='ctx'> 	bool force_bit;</div><div class='del'>-	bool has_gpio;</div><div class='ctx'> 	u32 reg0;</div><div class='ctx'> 	u32 gpio_reg;</div><div class='ctx'> 	struct i2c_algo_bit_data bit_algo;</div><div class='hunk'>@@ -314,7 +347,6 @@ typedef struct drm_i915_private {</div><div class='ctx'> </div><div class='ctx'> 	const struct intel_device_info *info;</div><div class='ctx'> </div><div class='del'>-	int has_gem;</div><div class='ctx'> 	int relative_constants_mode;</div><div class='ctx'> </div><div class='ctx'> 	void __iomem *regs;</div><div class='hunk'>@@ -326,19 +358,23 @@ typedef struct drm_i915_private {</div><div class='ctx'> 	/** gt_lock is also taken in irq contexts. */</div><div class='ctx'> 	struct spinlock gt_lock;</div><div class='ctx'> </div><div class='del'>-	struct intel_gmbus *gmbus;</div><div class='add'>+	struct intel_gmbus gmbus[GMBUS_NUM_PORTS];</div><div class='ctx'> </div><div class='ctx'> 	/** gmbus_mutex protects against concurrent usage of the single hw gmbus</div><div class='ctx'> 	 * controller on different i2c buses. */</div><div class='ctx'> 	struct mutex gmbus_mutex;</div><div class='ctx'> </div><div class='add'>+	/**</div><div class='add'>+	 * Base address of the gmbus and gpio block.</div><div class='add'>+	 */</div><div class='add'>+	uint32_t gpio_mmio_base;</div><div class='add'>+</div><div class='ctx'> 	struct pci_dev *bridge_dev;</div><div class='ctx'> 	struct intel_ring_buffer ring[I915_NUM_RINGS];</div><div class='ctx'> 	uint32_t next_seqno;</div><div class='ctx'> </div><div class='ctx'> 	drm_dma_handle_t *status_page_dmah;</div><div class='ctx'> 	uint32_t counter;</div><div class='del'>-	drm_local_map_t hws_map;</div><div class='ctx'> 	struct drm_i915_gem_object *pwrctx;</div><div class='ctx'> 	struct drm_i915_gem_object *renderctx;</div><div class='ctx'> </div><div class='hunk'>@@ -354,6 +390,10 @@ typedef struct drm_i915_private {</div><div class='ctx'> </div><div class='ctx'> 	/* protects the irq masks */</div><div class='ctx'> 	spinlock_t irq_lock;</div><div class='add'>+</div><div class='add'>+	/* DPIO indirect register protection */</div><div class='add'>+	spinlock_t dpio_lock;</div><div class='add'>+</div><div class='ctx'> 	/** Cached value of IMR to avoid reads in updating the bitfield */</div><div class='ctx'> 	u32 pipestat[2];</div><div class='ctx'> 	u32 irq_mask;</div><div class='hunk'>@@ -363,22 +403,20 @@ typedef struct drm_i915_private {</div><div class='ctx'> 	u32 hotplug_supported_mask;</div><div class='ctx'> 	struct work_struct hotplug_work;</div><div class='ctx'> </div><div class='del'>-	int tex_lru_log_granularity;</div><div class='del'>-	int allow_batchbuffer;</div><div class='ctx'> 	unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;</div><div class='del'>-	int vblank_pipe;</div><div class='ctx'> 	int num_pipe;</div><div class='add'>+	int num_pch_pll;</div><div class='ctx'> </div><div class='ctx'> 	/* For hangcheck timer */</div><div class='ctx'> #define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */</div><div class='ctx'> 	struct timer_list hangcheck_timer;</div><div class='ctx'> 	int hangcheck_count;</div><div class='del'>-	uint32_t last_acthd;</div><div class='del'>-	uint32_t last_acthd_bsd;</div><div class='del'>-	uint32_t last_acthd_blt;</div><div class='add'>+	uint32_t last_acthd[I915_NUM_RINGS];</div><div class='ctx'> 	uint32_t last_instdone;</div><div class='ctx'> 	uint32_t last_instdone1;</div><div class='ctx'> </div><div class='add'>+	unsigned int stop_rings;</div><div class='add'>+</div><div class='ctx'> 	unsigned long cfb_size;</div><div class='ctx'> 	unsigned int cfb_fb;</div><div class='ctx'> 	enum plane cfb_plane;</div><div class='hunk'>@@ -405,6 +443,8 @@ typedef struct drm_i915_private {</div><div class='ctx'> 	unsigned int lvds_use_ssc:1;</div><div class='ctx'> 	unsigned int display_clock_mode:1;</div><div class='ctx'> 	int lvds_ssc_freq;</div><div class='add'>+	unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */</div><div class='add'>+	unsigned int lvds_val; /* used for checking LVDS channel mode */</div><div class='ctx'> 	struct {</div><div class='ctx'> 		int rate;</div><div class='ctx'> 		int lanes;</div><div class='hunk'>@@ -428,6 +468,7 @@ typedef struct drm_i915_private {</div><div class='ctx'> 	unsigned int fsb_freq, mem_freq, is_ddr3;</div><div class='ctx'> </div><div class='ctx'> 	spinlock_t error_lock;</div><div class='add'>+	/* Protected by dev-&gt;error_lock. */</div><div class='ctx'> 	struct drm_i915_error_state *first_error;</div><div class='ctx'> 	struct work_struct error_work;</div><div class='ctx'> 	struct completion error_completion;</div><div class='hunk'>@@ -652,24 +693,10 @@ typedef struct drm_i915_private {</div><div class='ctx'> 		 */</div><div class='ctx'> 		struct list_head inactive_list;</div><div class='ctx'> </div><div class='del'>-		/**</div><div class='del'>-		 * LRU list of objects which are not in the ringbuffer but</div><div class='del'>-		 * are still pinned in the GTT.</div><div class='del'>-		 */</div><div class='del'>-		struct list_head pinned_list;</div><div class='del'>-</div><div class='ctx'> 		/** LRU list of objects with fence regs on them. */</div><div class='ctx'> 		struct list_head fence_list;</div><div class='ctx'> </div><div class='ctx'> 		/**</div><div class='del'>-		 * List of objects currently pending being freed.</div><div class='del'>-		 *</div><div class='del'>-		 * These objects are no longer in use, but due to a signal</div><div class='del'>-		 * we were prevented from freeing them at the appointed time.</div><div class='del'>-		 */</div><div class='del'>-		struct list_head deferred_free_list;</div><div class='del'>-</div><div class='del'>-		/**</div><div class='ctx'> 		 * We leave the user IRQ off as much as possible,</div><div class='ctx'> 		 * but this means that requests will finish and never</div><div class='ctx'> 		 * be retired once the system goes idle. Set a timer to</div><div class='hunk'>@@ -717,6 +744,16 @@ typedef struct drm_i915_private {</div><div class='ctx'> 		size_t object_memory;</div><div class='ctx'> 		u32 object_count;</div><div class='ctx'> 	} mm;</div><div class='add'>+</div><div class='add'>+	/* Old dri1 support infrastructure, beware the dragons ya fools entering</div><div class='add'>+	 * here! */</div><div class='add'>+	struct {</div><div class='add'>+		unsigned allow_batchbuffer : 1;</div><div class='add'>+		u32 __iomem *gfx_hws_cpu_addr;</div><div class='add'>+	} dri1;</div><div class='add'>+</div><div class='add'>+	/* Kernel Modesetting */</div><div class='add'>+</div><div class='ctx'> 	struct sdvo_device_mapping sdvo_mappings[2];</div><div class='ctx'> 	/* indicate whether the LVDS_BORDER should be enabled or not */</div><div class='ctx'> 	unsigned int lvds_border_bits;</div><div class='hunk'>@@ -726,7 +763,8 @@ typedef struct drm_i915_private {</div><div class='ctx'> 	struct drm_crtc *plane_to_crtc_mapping[3];</div><div class='ctx'> 	struct drm_crtc *pipe_to_crtc_mapping[3];</div><div class='ctx'> 	wait_queue_head_t pending_flip_queue;</div><div class='del'>-	bool flip_pending_is_done;</div><div class='add'>+</div><div class='add'>+	struct intel_pch_pll pch_plls[I915_NUM_PLLS];</div><div class='ctx'> </div><div class='ctx'> 	/* Reclocking support */</div><div class='ctx'> 	bool render_reclock_avail;</div><div class='hunk'>@@ -781,6 +819,11 @@ typedef struct drm_i915_private {</div><div class='ctx'> 	struct drm_property *force_audio_property;</div><div class='ctx'> } drm_i915_private_t;</div><div class='ctx'> </div><div class='add'>+/* Iterate over initialised rings */</div><div class='add'>+#define for_each_ring(ring__, dev_priv__, i__) \</div><div class='add'>+	for ((i__) = 0; (i__) &lt; I915_NUM_RINGS; (i__)++) \</div><div class='add'>+		if (((ring__) = &amp;(dev_priv__)-&gt;ring[(i__)]), intel_ring_initialized((ring__)))</div><div class='add'>+</div><div class='ctx'> enum hdmi_force_audio {</div><div class='ctx'> 	HDMI_AUDIO_OFF_DVI = -2,	/* no aux data for HDMI-DVI converter */</div><div class='ctx'> 	HDMI_AUDIO_OFF,			/* force turn off HDMI audio */</div><div class='hunk'>@@ -844,7 +887,14 @@ struct drm_i915_gem_object {</div><div class='ctx'> 	 * Current tiling mode for the object.</div><div class='ctx'> 	 */</div><div class='ctx'> 	unsigned int tiling_mode:2;</div><div class='del'>-	unsigned int tiling_changed:1;</div><div class='add'>+	/**</div><div class='add'>+	 * Whether the tiling parameters for the currently associated fence</div><div class='add'>+	 * register have changed. Note that for the purposes of tracking</div><div class='add'>+	 * tiling changes we also treat the unfenced register, the register</div><div class='add'>+	 * slot that the object occupies whilst it executes a fenced</div><div class='add'>+	 * command (such as BLT on gen2/3), as a "fence".</div><div class='add'>+	 */</div><div class='add'>+	unsigned int fence_dirty:1;</div><div class='ctx'> </div><div class='ctx'> 	/** How many users have pinned this object in GTT space. The following</div><div class='ctx'> 	 * users can each hold at most one reference: pwrite/pread, pin_ioctl</div><div class='hunk'>@@ -881,6 +931,7 @@ struct drm_i915_gem_object {</div><div class='ctx'> 	unsigned int cache_level:2;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int has_aliasing_ppgtt_mapping:1;</div><div class='add'>+	unsigned int has_global_gtt_mapping:1;</div><div class='ctx'> </div><div class='ctx'> 	struct page **pages;</div><div class='ctx'> </div><div class='hunk'>@@ -890,6 +941,11 @@ struct drm_i915_gem_object {</div><div class='ctx'> 	struct scatterlist *sg_list;</div><div class='ctx'> 	int num_sg;</div><div class='ctx'> </div><div class='add'>+	/* prime dma-buf support */</div><div class='add'>+	struct sg_table *sg_table;</div><div class='add'>+	void *dma_buf_vmapping;</div><div class='add'>+	int vmapping_count;</div><div class='add'>+</div><div class='ctx'> 	/**</div><div class='ctx'> 	 * Used for performing relocations during execbuffer insertion.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -904,13 +960,12 @@ struct drm_i915_gem_object {</div><div class='ctx'> 	 */</div><div class='ctx'> 	uint32_t gtt_offset;</div><div class='ctx'> </div><div class='del'>-	/** Breadcrumb of last rendering to the buffer. */</div><div class='del'>-	uint32_t last_rendering_seqno;</div><div class='ctx'> 	struct intel_ring_buffer *ring;</div><div class='ctx'> </div><div class='add'>+	/** Breadcrumb of last rendering to the buffer. */</div><div class='add'>+	uint32_t last_rendering_seqno;</div><div class='ctx'> 	/** Breadcrumb of last fenced GPU access to the buffer. */</div><div class='ctx'> 	uint32_t last_fenced_seqno;</div><div class='del'>-	struct intel_ring_buffer *last_fenced_ring;</div><div class='ctx'> </div><div class='ctx'> 	/** Current tiling stride for the object, if it's tiled. */</div><div class='ctx'> 	uint32_t stride;</div><div class='hunk'>@@ -918,13 +973,6 @@ struct drm_i915_gem_object {</div><div class='ctx'> 	/** Record of address bit 17 of each page at last unbind. */</div><div class='ctx'> 	unsigned long *bit_17;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	/**</div><div class='del'>-	 * If present, while GEM_DOMAIN_CPU is in the read domain this array</div><div class='del'>-	 * flags which individual pages are valid.</div><div class='del'>-	 */</div><div class='del'>-	uint8_t *page_cpu_valid;</div><div class='del'>-</div><div class='ctx'> 	/** User space pin count and filp owning the pin */</div><div class='ctx'> 	uint32_t user_pin_count;</div><div class='ctx'> 	struct drm_file *pin_filp;</div><div class='hunk'>@@ -1001,6 +1049,8 @@ struct drm_i915_file_private {</div><div class='ctx'> #define IS_IRONLAKE_D(dev)	((dev)-&gt;pci_device == 0x0042)</div><div class='ctx'> #define IS_IRONLAKE_M(dev)	((dev)-&gt;pci_device == 0x0046)</div><div class='ctx'> #define IS_IVYBRIDGE(dev)	(INTEL_INFO(dev)-&gt;is_ivybridge)</div><div class='add'>+#define IS_VALLEYVIEW(dev)	(INTEL_INFO(dev)-&gt;is_valleyview)</div><div class='add'>+#define IS_HASWELL(dev)	(INTEL_INFO(dev)-&gt;is_haswell)</div><div class='ctx'> #define IS_MOBILE(dev)		(INTEL_INFO(dev)-&gt;is_mobile)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1044,13 +1094,16 @@ struct drm_i915_file_private {</div><div class='ctx'> #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)-&gt;has_pipe_cxsr)</div><div class='ctx'> #define I915_HAS_FBC(dev) (INTEL_INFO(dev)-&gt;has_fbc)</div><div class='ctx'> </div><div class='del'>-#define HAS_PCH_SPLIT(dev) (IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev))</div><div class='add'>+#define HAS_PCH_SPLIT(dev) (INTEL_INFO(dev)-&gt;has_pch_split)</div><div class='ctx'> #define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)-&gt;gen &gt;= 5)</div><div class='ctx'> </div><div class='ctx'> #define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)-&gt;dev_private)-&gt;pch_type)</div><div class='add'>+#define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT)</div><div class='ctx'> #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)</div><div class='ctx'> #define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)</div><div class='ctx'> </div><div class='add'>+#define HAS_FORCE_WAKE(dev) (INTEL_INFO(dev)-&gt;has_force_wake)</div><div class='add'>+</div><div class='ctx'> #include "i915_trace.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1081,6 +1134,7 @@ extern int i915_panel_ignore_lid __read_mostly;</div><div class='ctx'> extern unsigned int i915_powersave __read_mostly;</div><div class='ctx'> extern int i915_semaphores __read_mostly;</div><div class='ctx'> extern unsigned int i915_lvds_downclock __read_mostly;</div><div class='add'>+extern int i915_lvds_channel_mode __read_mostly;</div><div class='ctx'> extern int i915_panel_use_ssc __read_mostly;</div><div class='ctx'> extern int i915_vbt_sdvo_panel_type __read_mostly;</div><div class='ctx'> extern int i915_enable_rc6 __read_mostly;</div><div class='hunk'>@@ -1094,6 +1148,7 @@ extern int i915_master_create(struct drm_device *dev, struct drm_master *master)</div><div class='ctx'> extern void i915_master_destroy(struct drm_device *dev, struct drm_master *master);</div><div class='ctx'> </div><div class='ctx'> 				/* i915_dma.c */</div><div class='add'>+void i915_update_dri1_breadcrumb(struct drm_device *dev);</div><div class='ctx'> extern void i915_kernel_lost_context(struct drm_device * dev);</div><div class='ctx'> extern int i915_driver_load(struct drm_device *, unsigned long flags);</div><div class='ctx'> extern int i915_driver_unload(struct drm_device *);</div><div class='hunk'>@@ -1104,12 +1159,14 @@ extern void i915_driver_preclose(struct drm_device *dev,</div><div class='ctx'> extern void i915_driver_postclose(struct drm_device *dev,</div><div class='ctx'> 				  struct drm_file *file_priv);</div><div class='ctx'> extern int i915_driver_device_is_agp(struct drm_device * dev);</div><div class='add'>+#ifdef CONFIG_COMPAT</div><div class='ctx'> extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,</div><div class='ctx'> 			      unsigned long arg);</div><div class='add'>+#endif</div><div class='ctx'> extern int i915_emit_box(struct drm_device *dev,</div><div class='ctx'> 			 struct drm_clip_rect *box,</div><div class='ctx'> 			 int DR1, int DR4);</div><div class='del'>-extern int i915_reset(struct drm_device *dev, u8 flags);</div><div class='add'>+extern int i915_reset(struct drm_device *dev);</div><div class='ctx'> extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv);</div><div class='ctx'> extern unsigned long i915_mch_val(struct drm_i915_private *dev_priv);</div><div class='ctx'> extern unsigned long i915_gfx_val(struct drm_i915_private *dev_priv);</div><div class='hunk'>@@ -1119,19 +1176,10 @@ extern void i915_update_gfx_val(struct drm_i915_private *dev_priv);</div><div class='ctx'> /* i915_irq.c */</div><div class='ctx'> void i915_hangcheck_elapsed(unsigned long data);</div><div class='ctx'> void i915_handle_error(struct drm_device *dev, bool wedged);</div><div class='del'>-extern int i915_irq_emit(struct drm_device *dev, void *data,</div><div class='del'>-			 struct drm_file *file_priv);</div><div class='del'>-extern int i915_irq_wait(struct drm_device *dev, void *data,</div><div class='del'>-			 struct drm_file *file_priv);</div><div class='ctx'> </div><div class='ctx'> extern void intel_irq_init(struct drm_device *dev);</div><div class='ctx'> </div><div class='del'>-extern int i915_vblank_pipe_set(struct drm_device *dev, void *data,</div><div class='del'>-				struct drm_file *file_priv);</div><div class='del'>-extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,</div><div class='del'>-				struct drm_file *file_priv);</div><div class='del'>-extern int i915_vblank_swap(struct drm_device *dev, void *data,</div><div class='del'>-			    struct drm_file *file_priv);</div><div class='add'>+void i915_error_state_free(struct kref *error_ref);</div><div class='ctx'> </div><div class='ctx'> void</div><div class='ctx'> i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);</div><div class='hunk'>@@ -1205,8 +1253,12 @@ int __must_check i915_gem_object_unbind(struct drm_i915_gem_object *obj);</div><div class='ctx'> void i915_gem_release_mmap(struct drm_i915_gem_object *obj);</div><div class='ctx'> void i915_gem_lastclose(struct drm_device *dev);</div><div class='ctx'> </div><div class='add'>+int i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj,</div><div class='add'>+				  gfp_t gfpmask);</div><div class='ctx'> int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);</div><div class='ctx'> int __must_check i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj);</div><div class='add'>+int i915_gem_object_sync(struct drm_i915_gem_object *obj,</div><div class='add'>+			 struct intel_ring_buffer *to);</div><div class='ctx'> void i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,</div><div class='ctx'> 				    struct intel_ring_buffer *ring,</div><div class='ctx'> 				    u32 seqno);</div><div class='hunk'>@@ -1229,17 +1281,18 @@ i915_seqno_passed(uint32_t seq1, uint32_t seq2)</div><div class='ctx'> </div><div class='ctx'> u32 i915_gem_next_request_seqno(struct intel_ring_buffer *ring);</div><div class='ctx'> </div><div class='del'>-int __must_check i915_gem_object_get_fence(struct drm_i915_gem_object *obj,</div><div class='del'>-					   struct intel_ring_buffer *pipelined);</div><div class='add'>+int __must_check i915_gem_object_get_fence(struct drm_i915_gem_object *obj);</div><div class='ctx'> int __must_check i915_gem_object_put_fence(struct drm_i915_gem_object *obj);</div><div class='ctx'> </div><div class='del'>-static inline void</div><div class='add'>+static inline bool</div><div class='ctx'> i915_gem_object_pin_fence(struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='ctx'> 	if (obj-&gt;fence_reg != I915_FENCE_REG_NONE) {</div><div class='ctx'> 		struct drm_i915_private *dev_priv = obj-&gt;base.dev-&gt;dev_private;</div><div class='ctx'> 		dev_priv-&gt;fence_regs[obj-&gt;fence_reg].pin_count++;</div><div class='del'>-	}</div><div class='add'>+		return true;</div><div class='add'>+	} else</div><div class='add'>+		return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='hunk'>@@ -1260,27 +1313,25 @@ int __must_check i915_gem_object_set_domain(struct drm_i915_gem_object *obj,</div><div class='ctx'> 					    uint32_t read_domains,</div><div class='ctx'> 					    uint32_t write_domain);</div><div class='ctx'> int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);</div><div class='add'>+int __must_check i915_gem_init(struct drm_device *dev);</div><div class='ctx'> int __must_check i915_gem_init_hw(struct drm_device *dev);</div><div class='ctx'> void i915_gem_init_swizzling(struct drm_device *dev);</div><div class='ctx'> void i915_gem_init_ppgtt(struct drm_device *dev);</div><div class='ctx'> void i915_gem_cleanup_ringbuffer(struct drm_device *dev);</div><div class='del'>-void i915_gem_do_init(struct drm_device *dev,</div><div class='del'>-		      unsigned long start,</div><div class='del'>-		      unsigned long mappable_end,</div><div class='del'>-		      unsigned long end);</div><div class='del'>-int __must_check i915_gpu_idle(struct drm_device *dev, bool do_retire);</div><div class='add'>+int __must_check i915_gpu_idle(struct drm_device *dev);</div><div class='ctx'> int __must_check i915_gem_idle(struct drm_device *dev);</div><div class='ctx'> int __must_check i915_add_request(struct intel_ring_buffer *ring,</div><div class='ctx'> 				  struct drm_file *file,</div><div class='ctx'> 				  struct drm_i915_gem_request *request);</div><div class='ctx'> int __must_check i915_wait_request(struct intel_ring_buffer *ring,</div><div class='del'>-				   uint32_t seqno,</div><div class='del'>-				   bool do_retire);</div><div class='add'>+				   uint32_t seqno);</div><div class='ctx'> int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);</div><div class='ctx'> int __must_check</div><div class='ctx'> i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj,</div><div class='ctx'> 				  bool write);</div><div class='ctx'> int __must_check</div><div class='add'>+i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write);</div><div class='add'>+int __must_check</div><div class='ctx'> i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,</div><div class='ctx'> 				     u32 alignment,</div><div class='ctx'> 				     struct intel_ring_buffer *pipelined);</div><div class='hunk'>@@ -1301,6 +1352,13 @@ i915_gem_get_unfenced_gtt_alignment(struct drm_device *dev,</div><div class='ctx'> int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,</div><div class='ctx'> 				    enum i915_cache_level cache_level);</div><div class='ctx'> </div><div class='add'>+struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,</div><div class='add'>+				struct dma_buf *dma_buf);</div><div class='add'>+</div><div class='add'>+struct dma_buf *i915_gem_prime_export(struct drm_device *dev,</div><div class='add'>+				struct drm_gem_object *gem_obj, int flags);</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /* i915_gem_gtt.c */</div><div class='ctx'> int __must_check i915_gem_init_aliasing_ppgtt(struct drm_device *dev);</div><div class='ctx'> void i915_gem_cleanup_aliasing_ppgtt(struct drm_device *dev);</div><div class='hunk'>@@ -1311,18 +1369,24 @@ void i915_ppgtt_unbind_object(struct i915_hw_ppgtt *ppgtt,</div><div class='ctx'> 			      struct drm_i915_gem_object *obj);</div><div class='ctx'> </div><div class='ctx'> void i915_gem_restore_gtt_mappings(struct drm_device *dev);</div><div class='del'>-int __must_check i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj);</div><div class='del'>-void i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj,</div><div class='add'>+int __must_check i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj);</div><div class='add'>+void i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj,</div><div class='ctx'> 				enum i915_cache_level cache_level);</div><div class='ctx'> void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj);</div><div class='add'>+void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj);</div><div class='add'>+void i915_gem_init_global_gtt(struct drm_device *dev,</div><div class='add'>+			      unsigned long start,</div><div class='add'>+			      unsigned long mappable_end,</div><div class='add'>+			      unsigned long end);</div><div class='ctx'> </div><div class='ctx'> /* i915_gem_evict.c */</div><div class='ctx'> int __must_check i915_gem_evict_something(struct drm_device *dev, int min_size,</div><div class='ctx'> 					  unsigned alignment, bool mappable);</div><div class='del'>-int __must_check i915_gem_evict_everything(struct drm_device *dev,</div><div class='del'>-					   bool purgeable_only);</div><div class='del'>-int __must_check i915_gem_evict_inactive(struct drm_device *dev,</div><div class='del'>-					 bool purgeable_only);</div><div class='add'>+int i915_gem_evict_everything(struct drm_device *dev, bool purgeable_only);</div><div class='add'>+</div><div class='add'>+/* i915_gem_stolen.c */</div><div class='add'>+int i915_gem_init_stolen(struct drm_device *dev);</div><div class='add'>+void i915_gem_cleanup_stolen(struct drm_device *dev);</div><div class='ctx'> </div><div class='ctx'> /* i915_gem_tiling.c */</div><div class='ctx'> void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);</div><div class='hunk'>@@ -1354,9 +1418,20 @@ extern int i915_restore_state(struct drm_device *dev);</div><div class='ctx'> extern int i915_save_state(struct drm_device *dev);</div><div class='ctx'> extern int i915_restore_state(struct drm_device *dev);</div><div class='ctx'> </div><div class='add'>+/* i915_sysfs.c */</div><div class='add'>+void i915_setup_sysfs(struct drm_device *dev_priv);</div><div class='add'>+void i915_teardown_sysfs(struct drm_device *dev_priv);</div><div class='add'>+</div><div class='ctx'> /* intel_i2c.c */</div><div class='ctx'> extern int intel_setup_gmbus(struct drm_device *dev);</div><div class='ctx'> extern void intel_teardown_gmbus(struct drm_device *dev);</div><div class='add'>+extern inline bool intel_gmbus_is_port_valid(unsigned port)</div><div class='add'>+{</div><div class='add'>+	return (port &gt;= GMBUS_PORT_SSC &amp;&amp; port &lt;= GMBUS_PORT_DPD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+extern struct i2c_adapter *intel_gmbus_get_adapter(</div><div class='add'>+		struct drm_i915_private *dev_priv, unsigned port);</div><div class='ctx'> extern void intel_gmbus_set_speed(struct i2c_adapter *adapter, int speed);</div><div class='ctx'> extern void intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit);</div><div class='ctx'> extern inline bool intel_gmbus_is_forced_bit(struct i2c_adapter *adapter)</div><div class='hunk'>@@ -1391,6 +1466,7 @@ static inline void intel_unregister_dsm_handler(void) { return; }</div><div class='ctx'> #endif /* CONFIG_ACPI */</div><div class='ctx'> </div><div class='ctx'> /* modesetting */</div><div class='add'>+extern void intel_modeset_init_hw(struct drm_device *dev);</div><div class='ctx'> extern void intel_modeset_init(struct drm_device *dev);</div><div class='ctx'> extern void intel_modeset_gem_init(struct drm_device *dev);</div><div class='ctx'> extern void intel_modeset_cleanup(struct drm_device *dev);</div><div class='hunk'>@@ -1403,12 +1479,17 @@ extern void ironlake_enable_rc6(struct drm_device *dev);</div><div class='ctx'> extern void gen6_set_rps(struct drm_device *dev, u8 val);</div><div class='ctx'> extern void intel_detect_pch(struct drm_device *dev);</div><div class='ctx'> extern int intel_trans_dp_port_sel(struct drm_crtc *crtc);</div><div class='add'>+extern int intel_enable_rc6(const struct drm_device *dev);</div><div class='ctx'> </div><div class='add'>+extern bool i915_semaphore_is_enabled(struct drm_device *dev);</div><div class='ctx'> extern void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv);</div><div class='ctx'> extern void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv);</div><div class='ctx'> extern void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv);</div><div class='ctx'> extern void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv);</div><div class='ctx'> </div><div class='add'>+extern void vlv_force_wake_get(struct drm_i915_private *dev_priv);</div><div class='add'>+extern void vlv_force_wake_put(struct drm_i915_private *dev_priv);</div><div class='add'>+</div><div class='ctx'> /* overlay */</div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> extern struct intel_overlay_error_state *intel_overlay_capture_error_state(struct drm_device *dev);</div><div class='hunk'>@@ -1420,28 +1501,6 @@ extern void intel_display_print_error_state(struct seq_file *m,</div><div class='ctx'> 					    struct intel_display_error_state *error);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define LP_RING(d) (&amp;((struct drm_i915_private *)(d))-&gt;ring[RCS])</div><div class='del'>-</div><div class='del'>-#define BEGIN_LP_RING(n) \</div><div class='del'>-	intel_ring_begin(LP_RING(dev_priv), (n))</div><div class='del'>-</div><div class='del'>-#define OUT_RING(x) \</div><div class='del'>-	intel_ring_emit(LP_RING(dev_priv), x)</div><div class='del'>-</div><div class='del'>-#define ADVANCE_LP_RING() \</div><div class='del'>-	intel_ring_advance(LP_RING(dev_priv))</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * Lock test for when it's just for synchronization of ring access.</div><div class='del'>- *</div><div class='del'>- * In that case, we don't need to do it when GEM is initialized as nobody else</div><div class='del'>- * has access to the ring.</div><div class='del'>- */</div><div class='del'>-#define RING_LOCK_TEST_WITH_RETURN(dev, file) do {			\</div><div class='del'>-	if (LP_RING(dev-&gt;dev_private)-&gt;obj == NULL)			\</div><div class='del'>-		LOCK_TEST_WITH_RETURN(dev, file);			\</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='ctx'> /* On SNB platform, before reading ring registers forcewake bit</div><div class='ctx'>  * must be set to prevent GT core from power down and stale values being</div><div class='ctx'>  * returned.</div><div class='hunk'>@@ -1450,12 +1509,6 @@ void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv);</div><div class='ctx'> void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv);</div><div class='ctx'> int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv);</div><div class='ctx'> </div><div class='del'>-/* We give fast paths for the really cool registers */</div><div class='del'>-#define NEEDS_FORCE_WAKE(dev_priv, reg) \</div><div class='del'>-	(((dev_priv)-&gt;info-&gt;gen &gt;= 6) &amp;&amp; \</div><div class='del'>-	 ((reg) &lt; 0x40000) &amp;&amp;		 \</div><div class='del'>-	 ((reg) != FORCEWAKE))</div><div class='del'>-</div><div class='ctx'> #define __i915_read(x, y) \</div><div class='ctx'> 	u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c<br/>index 0d1e4b7b4b99..288d7b8f49ae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_gem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem.c</a></div><div class='hunk'>@@ -35,31 +35,41 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/swap.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/dma-buf.h&gt;</div><div class='ctx'> </div><div class='ctx'> static __must_check int i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj);</div><div class='ctx'> static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);</div><div class='ctx'> static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj);</div><div class='del'>-static __must_check int i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj,</div><div class='del'>-							  bool write);</div><div class='del'>-static __must_check int i915_gem_object_set_cpu_read_domain_range(struct drm_i915_gem_object *obj,</div><div class='del'>-								  uint64_t offset,</div><div class='del'>-								  uint64_t size);</div><div class='del'>-static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_i915_gem_object *obj);</div><div class='ctx'> static __must_check int i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,</div><div class='ctx'> 						    unsigned alignment,</div><div class='ctx'> 						    bool map_and_fenceable);</div><div class='del'>-static void i915_gem_clear_fence_reg(struct drm_device *dev,</div><div class='del'>-				     struct drm_i915_fence_reg *reg);</div><div class='ctx'> static int i915_gem_phys_pwrite(struct drm_device *dev,</div><div class='ctx'> 				struct drm_i915_gem_object *obj,</div><div class='ctx'> 				struct drm_i915_gem_pwrite *args,</div><div class='ctx'> 				struct drm_file *file);</div><div class='del'>-static void i915_gem_free_object_tail(struct drm_i915_gem_object *obj);</div><div class='add'>+</div><div class='add'>+static void i915_gem_write_fence(struct drm_device *dev, int reg,</div><div class='add'>+				 struct drm_i915_gem_object *obj);</div><div class='add'>+static void i915_gem_object_update_fence(struct drm_i915_gem_object *obj,</div><div class='add'>+					 struct drm_i915_fence_reg *fence,</div><div class='add'>+					 bool enable);</div><div class='ctx'> </div><div class='ctx'> static int i915_gem_inactive_shrink(struct shrinker *shrinker,</div><div class='ctx'> 				    struct shrink_control *sc);</div><div class='ctx'> static void i915_gem_object_truncate(struct drm_i915_gem_object *obj);</div><div class='ctx'> </div><div class='add'>+static inline void i915_gem_object_fence_lost(struct drm_i915_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	if (obj-&gt;tiling_mode)</div><div class='add'>+		i915_gem_release_mmap(obj);</div><div class='add'>+</div><div class='add'>+	/* As we do not have an associated fence register, we will force</div><div class='add'>+	 * a tiling change if we ever need to acquire one.</div><div class='add'>+	 */</div><div class='add'>+	obj-&gt;fence_dirty = false;</div><div class='add'>+	obj-&gt;fence_reg = I915_FENCE_REG_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* some bookkeeping */</div><div class='ctx'> static void i915_gem_info_add_obj(struct drm_i915_private *dev_priv,</div><div class='ctx'> 				  size_t size)</div><div class='hunk'>@@ -122,26 +132,7 @@ int i915_mutex_lock_interruptible(struct drm_device *dev)</div><div class='ctx'> static inline bool</div><div class='ctx'> i915_gem_object_is_inactive(struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='del'>-	return obj-&gt;gtt_space &amp;&amp; !obj-&gt;active &amp;&amp; obj-&gt;pin_count == 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void i915_gem_do_init(struct drm_device *dev,</div><div class='del'>-		      unsigned long start,</div><div class='del'>-		      unsigned long mappable_end,</div><div class='del'>-		      unsigned long end)</div><div class='del'>-{</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	drm_mm_init(&amp;dev_priv-&gt;mm.gtt_space, start, end - start);</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;mm.gtt_start = start;</div><div class='del'>-	dev_priv-&gt;mm.gtt_mappable_end = mappable_end;</div><div class='del'>-	dev_priv-&gt;mm.gtt_end = end;</div><div class='del'>-	dev_priv-&gt;mm.gtt_total = end - start;</div><div class='del'>-	dev_priv-&gt;mm.mappable_gtt_total = min(end, mappable_end) - start;</div><div class='del'>-</div><div class='del'>-	/* Take over this portion of the GTT */</div><div class='del'>-	intel_gtt_clear_range(start / PAGE_SIZE, (end-start) / PAGE_SIZE);</div><div class='add'>+	return !obj-&gt;active;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='hunk'>@@ -150,12 +141,20 @@ i915_gem_init_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_gem_init *args = data;</div><div class='ctx'> </div><div class='add'>+	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	if (args-&gt;gtt_start &gt;= args-&gt;gtt_end ||</div><div class='ctx'> 	    (args-&gt;gtt_end | args-&gt;gtt_start) &amp; (PAGE_SIZE - 1))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	/* GEM with user mode setting was never supported on ilk and later. */</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &gt;= 5)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	i915_gem_do_init(dev, args-&gt;gtt_start, args-&gt;gtt_end, args-&gt;gtt_end);</div><div class='add'>+	i915_gem_init_global_gtt(dev, args-&gt;gtt_start,</div><div class='add'>+				 args-&gt;gtt_end, args-&gt;gtt_end);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -170,13 +169,11 @@ i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='ctx'> 	size_t pinned;</div><div class='ctx'> </div><div class='del'>-	if (!(dev-&gt;driver-&gt;driver_features &amp; DRIVER_GEM))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	pinned = 0;</div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	list_for_each_entry(obj, &amp;dev_priv-&gt;mm.pinned_list, mm_list)</div><div class='del'>-		pinned += obj-&gt;gtt_space-&gt;size;</div><div class='add'>+	list_for_each_entry(obj, &amp;dev_priv-&gt;mm.gtt_list, gtt_list)</div><div class='add'>+		if (obj-&gt;pin_count)</div><div class='add'>+			pinned += obj-&gt;gtt_space-&gt;size;</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='ctx'> 	args-&gt;aper_size = dev_priv-&gt;mm.gtt_total;</div><div class='hunk'>@@ -247,6 +244,7 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		      struct drm_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_gem_create *args = data;</div><div class='add'>+</div><div class='ctx'> 	return i915_gem_create(file, dev,</div><div class='ctx'> 			       args-&gt;size, &amp;args-&gt;handle);</div><div class='ctx'> }</div><div class='hunk'>@@ -259,66 +257,6 @@ static int i915_gem_object_needs_bit17_swizzle(struct drm_i915_gem_object *obj)</div><div class='ctx'> 		obj-&gt;tiling_mode != I915_TILING_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * This is the fast shmem pread path, which attempts to copy_from_user directly</div><div class='del'>- * from the backing pages of the object to the user's address space.  On a</div><div class='del'>- * fault, it fails so we can fall back to i915_gem_shmem_pwrite_slow().</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-i915_gem_shmem_pread_fast(struct drm_device *dev,</div><div class='del'>-			  struct drm_i915_gem_object *obj,</div><div class='del'>-			  struct drm_i915_gem_pread *args,</div><div class='del'>-			  struct drm_file *file)</div><div class='del'>-{</div><div class='del'>-	struct address_space *mapping = obj-&gt;base.filp-&gt;f_path.dentry-&gt;d_inode-&gt;i_mapping;</div><div class='del'>-	ssize_t remain;</div><div class='del'>-	loff_t offset;</div><div class='del'>-	char __user *user_data;</div><div class='del'>-	int page_offset, page_length;</div><div class='del'>-</div><div class='del'>-	user_data = (char __user *) (uintptr_t) args-&gt;data_ptr;</div><div class='del'>-	remain = args-&gt;size;</div><div class='del'>-</div><div class='del'>-	offset = args-&gt;offset;</div><div class='del'>-</div><div class='del'>-	while (remain &gt; 0) {</div><div class='del'>-		struct page *page;</div><div class='del'>-		char *vaddr;</div><div class='del'>-		int ret;</div><div class='del'>-</div><div class='del'>-		/* Operation in this page</div><div class='del'>-		 *</div><div class='del'>-		 * page_offset = offset within page</div><div class='del'>-		 * page_length = bytes to copy for this page</div><div class='del'>-		 */</div><div class='del'>-		page_offset = offset_in_page(offset);</div><div class='del'>-		page_length = remain;</div><div class='del'>-		if ((page_offset + remain) &gt; PAGE_SIZE)</div><div class='del'>-			page_length = PAGE_SIZE - page_offset;</div><div class='del'>-</div><div class='del'>-		page = shmem_read_mapping_page(mapping, offset &gt;&gt; PAGE_SHIFT);</div><div class='del'>-		if (IS_ERR(page))</div><div class='del'>-			return PTR_ERR(page);</div><div class='del'>-</div><div class='del'>-		vaddr = kmap_atomic(page);</div><div class='del'>-		ret = __copy_to_user_inatomic(user_data,</div><div class='del'>-					      vaddr + page_offset,</div><div class='del'>-					      page_length);</div><div class='del'>-		kunmap_atomic(vaddr);</div><div class='del'>-</div><div class='del'>-		mark_page_accessed(page);</div><div class='del'>-		page_cache_release(page);</div><div class='del'>-		if (ret)</div><div class='del'>-			return -EFAULT;</div><div class='del'>-</div><div class='del'>-		remain -= page_length;</div><div class='del'>-		user_data += page_length;</div><div class='del'>-		offset += page_length;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline int</div><div class='ctx'> __copy_to_user_swizzled(char __user *cpu_vaddr,</div><div class='ctx'> 			const char *gpu_vaddr, int gpu_offset,</div><div class='hunk'>@@ -346,8 +284,8 @@ __copy_to_user_swizzled(char __user *cpu_vaddr,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='del'>-__copy_from_user_swizzled(char __user *gpu_vaddr, int gpu_offset,</div><div class='del'>-			  const char *cpu_vaddr,</div><div class='add'>+__copy_from_user_swizzled(char *gpu_vaddr, int gpu_offset,</div><div class='add'>+			  const char __user *cpu_vaddr,</div><div class='ctx'> 			  int length)</div><div class='ctx'> {</div><div class='ctx'> 	int ret, cpu_offset = 0;</div><div class='hunk'>@@ -371,37 +309,121 @@ __copy_from_user_swizzled(char __user *gpu_vaddr, int gpu_offset,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * This is the fallback shmem pread path, which allocates temporary storage</div><div class='del'>- * in kernel space to copy_to_user into outside of the struct_mutex, so we</div><div class='del'>- * can copy out of the object's backing pages while holding the struct mutex</div><div class='del'>- * and not take page faults.</div><div class='del'>- */</div><div class='add'>+/* Per-page copy function for the shmem pread fastpath.</div><div class='add'>+ * Flushes invalid cachelines before reading the target if</div><div class='add'>+ * needs_clflush is set. */</div><div class='ctx'> static int</div><div class='del'>-i915_gem_shmem_pread_slow(struct drm_device *dev,</div><div class='del'>-			  struct drm_i915_gem_object *obj,</div><div class='del'>-			  struct drm_i915_gem_pread *args,</div><div class='del'>-			  struct drm_file *file)</div><div class='add'>+shmem_pread_fast(struct page *page, int shmem_page_offset, int page_length,</div><div class='add'>+		 char __user *user_data,</div><div class='add'>+		 bool page_do_bit17_swizzling, bool needs_clflush)</div><div class='add'>+{</div><div class='add'>+	char *vaddr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (unlikely(page_do_bit17_swizzling))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	vaddr = kmap_atomic(page);</div><div class='add'>+	if (needs_clflush)</div><div class='add'>+		drm_clflush_virt_range(vaddr + shmem_page_offset,</div><div class='add'>+				       page_length);</div><div class='add'>+	ret = __copy_to_user_inatomic(user_data,</div><div class='add'>+				      vaddr + shmem_page_offset,</div><div class='add'>+				      page_length);</div><div class='add'>+	kunmap_atomic(vaddr);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+shmem_clflush_swizzled_range(char *addr, unsigned long length,</div><div class='add'>+			     bool swizzled)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(swizzled)) {</div><div class='add'>+		unsigned long start = (unsigned long) addr;</div><div class='add'>+		unsigned long end = (unsigned long) addr + length;</div><div class='add'>+</div><div class='add'>+		/* For swizzling simply ensure that we always flush both</div><div class='add'>+		 * channels. Lame, but simple and it works. Swizzled</div><div class='add'>+		 * pwrite/pread is far from a hotpath - current userspace</div><div class='add'>+		 * doesn't use it at all. */</div><div class='add'>+		start = round_down(start, 128);</div><div class='add'>+		end = round_up(end, 128);</div><div class='add'>+</div><div class='add'>+		drm_clflush_virt_range((void *)start, end - start);</div><div class='add'>+	} else {</div><div class='add'>+		drm_clflush_virt_range(addr, length);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Only difference to the fast-path function is that this can handle bit17</div><div class='add'>+ * and uses non-atomic copy and kmap functions. */</div><div class='add'>+static int</div><div class='add'>+shmem_pread_slow(struct page *page, int shmem_page_offset, int page_length,</div><div class='add'>+		 char __user *user_data,</div><div class='add'>+		 bool page_do_bit17_swizzling, bool needs_clflush)</div><div class='add'>+{</div><div class='add'>+	char *vaddr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vaddr = kmap(page);</div><div class='add'>+	if (needs_clflush)</div><div class='add'>+		shmem_clflush_swizzled_range(vaddr + shmem_page_offset,</div><div class='add'>+					     page_length,</div><div class='add'>+					     page_do_bit17_swizzling);</div><div class='add'>+</div><div class='add'>+	if (page_do_bit17_swizzling)</div><div class='add'>+		ret = __copy_to_user_swizzled(user_data,</div><div class='add'>+					      vaddr, shmem_page_offset,</div><div class='add'>+					      page_length);</div><div class='add'>+	else</div><div class='add'>+		ret = __copy_to_user(user_data,</div><div class='add'>+				     vaddr + shmem_page_offset,</div><div class='add'>+				     page_length);</div><div class='add'>+	kunmap(page);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+i915_gem_shmem_pread(struct drm_device *dev,</div><div class='add'>+		     struct drm_i915_gem_object *obj,</div><div class='add'>+		     struct drm_i915_gem_pread *args,</div><div class='add'>+		     struct drm_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct address_space *mapping = obj-&gt;base.filp-&gt;f_path.dentry-&gt;d_inode-&gt;i_mapping;</div><div class='ctx'> 	char __user *user_data;</div><div class='ctx'> 	ssize_t remain;</div><div class='ctx'> 	loff_t offset;</div><div class='del'>-	int shmem_page_offset, page_length, ret;</div><div class='add'>+	int shmem_page_offset, page_length, ret = 0;</div><div class='ctx'> 	int obj_do_bit17_swizzling, page_do_bit17_swizzling;</div><div class='add'>+	int hit_slowpath = 0;</div><div class='add'>+	int prefaulted = 0;</div><div class='add'>+	int needs_clflush = 0;</div><div class='add'>+	int release_page;</div><div class='ctx'> </div><div class='ctx'> 	user_data = (char __user *) (uintptr_t) args-&gt;data_ptr;</div><div class='ctx'> 	remain = args-&gt;size;</div><div class='ctx'> </div><div class='ctx'> 	obj_do_bit17_swizzling = i915_gem_object_needs_bit17_swizzle(obj);</div><div class='ctx'> </div><div class='del'>-	offset = args-&gt;offset;</div><div class='add'>+	if (!(obj-&gt;base.read_domains &amp; I915_GEM_DOMAIN_CPU)) {</div><div class='add'>+		/* If we're not in the cpu read domain, set ourself into the gtt</div><div class='add'>+		 * read domain and manually flush cachelines (if required). This</div><div class='add'>+		 * optimizes for the case when the gpu will dirty the data</div><div class='add'>+		 * anyway again before the next pread happens. */</div><div class='add'>+		if (obj-&gt;cache_level == I915_CACHE_NONE)</div><div class='add'>+			needs_clflush = 1;</div><div class='add'>+		ret = i915_gem_object_set_to_gtt_domain(obj, false);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	offset = args-&gt;offset;</div><div class='ctx'> </div><div class='ctx'> 	while (remain &gt; 0) {</div><div class='ctx'> 		struct page *page;</div><div class='del'>-		char *vaddr;</div><div class='ctx'> </div><div class='ctx'> 		/* Operation in this page</div><div class='ctx'> 		 *</div><div class='hunk'>@@ -413,28 +435,51 @@ i915_gem_shmem_pread_slow(struct drm_device *dev,</div><div class='ctx'> 		if ((shmem_page_offset + page_length) &gt; PAGE_SIZE)</div><div class='ctx'> 			page_length = PAGE_SIZE - shmem_page_offset;</div><div class='ctx'> </div><div class='del'>-		page = shmem_read_mapping_page(mapping, offset &gt;&gt; PAGE_SHIFT);</div><div class='del'>-		if (IS_ERR(page)) {</div><div class='del'>-			ret = PTR_ERR(page);</div><div class='del'>-			goto out;</div><div class='add'>+		if (obj-&gt;pages) {</div><div class='add'>+			page = obj-&gt;pages[offset &gt;&gt; PAGE_SHIFT];</div><div class='add'>+			release_page = 0;</div><div class='add'>+		} else {</div><div class='add'>+			page = shmem_read_mapping_page(mapping, offset &gt;&gt; PAGE_SHIFT);</div><div class='add'>+			if (IS_ERR(page)) {</div><div class='add'>+				ret = PTR_ERR(page);</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			release_page = 1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		page_do_bit17_swizzling = obj_do_bit17_swizzling &amp;&amp;</div><div class='ctx'> 			(page_to_phys(page) &amp; (1 &lt;&lt; 17)) != 0;</div><div class='ctx'> </div><div class='del'>-		vaddr = kmap(page);</div><div class='del'>-		if (page_do_bit17_swizzling)</div><div class='del'>-			ret = __copy_to_user_swizzled(user_data,</div><div class='del'>-						      vaddr, shmem_page_offset,</div><div class='del'>-						      page_length);</div><div class='del'>-		else</div><div class='del'>-			ret = __copy_to_user(user_data,</div><div class='del'>-					     vaddr + shmem_page_offset,</div><div class='del'>-					     page_length);</div><div class='del'>-		kunmap(page);</div><div class='add'>+		ret = shmem_pread_fast(page, shmem_page_offset, page_length,</div><div class='add'>+				       user_data, page_do_bit17_swizzling,</div><div class='add'>+				       needs_clflush);</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			goto next_page;</div><div class='ctx'> </div><div class='del'>-		mark_page_accessed(page);</div><div class='add'>+		hit_slowpath = 1;</div><div class='add'>+		page_cache_get(page);</div><div class='add'>+		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+		if (!prefaulted) {</div><div class='add'>+			ret = fault_in_multipages_writeable(user_data, remain);</div><div class='add'>+			/* Userspace is tricking us, but we've already clobbered</div><div class='add'>+			 * its pages with the prefault and promised to write the</div><div class='add'>+			 * data up to the first fault. Hence ignore any errors</div><div class='add'>+			 * and just continue. */</div><div class='add'>+			(void)ret;</div><div class='add'>+			prefaulted = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = shmem_pread_slow(page, shmem_page_offset, page_length,</div><div class='add'>+				       user_data, page_do_bit17_swizzling,</div><div class='add'>+				       needs_clflush);</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> 		page_cache_release(page);</div><div class='add'>+next_page:</div><div class='add'>+		mark_page_accessed(page);</div><div class='add'>+		if (release_page)</div><div class='add'>+			page_cache_release(page);</div><div class='ctx'> </div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			ret = -EFAULT;</div><div class='hunk'>@@ -447,10 +492,11 @@ i915_gem_shmem_pread_slow(struct drm_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	/* Fixup: Kill any reinstated backing storage pages */</div><div class='del'>-	if (obj-&gt;madv == __I915_MADV_PURGED)</div><div class='del'>-		i915_gem_object_truncate(obj);</div><div class='add'>+	if (hit_slowpath) {</div><div class='add'>+		/* Fixup: Kill any reinstated backing storage pages */</div><div class='add'>+		if (obj-&gt;madv == __I915_MADV_PURGED)</div><div class='add'>+			i915_gem_object_truncate(obj);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -476,11 +522,6 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		       args-&gt;size))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	ret = fault_in_pages_writeable((char __user *)(uintptr_t)args-&gt;data_ptr,</div><div class='del'>-				       args-&gt;size);</div><div class='del'>-	if (ret)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='ctx'> 	ret = i915_mutex_lock_interruptible(dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -498,19 +539,17 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	trace_i915_gem_object_pread(obj, args-&gt;offset, args-&gt;size);</div><div class='del'>-</div><div class='del'>-	ret = i915_gem_object_set_cpu_read_domain_range(obj,</div><div class='del'>-							args-&gt;offset,</div><div class='del'>-							args-&gt;size);</div><div class='del'>-	if (ret)</div><div class='add'>+	/* prime objects have no backing filp to GEM pread/pwrite</div><div class='add'>+	 * pages from.</div><div class='add'>+	 */</div><div class='add'>+	if (!obj-&gt;base.filp) {</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	ret = -EFAULT;</div><div class='del'>-	if (!i915_gem_object_needs_bit17_swizzle(obj))</div><div class='del'>-		ret = i915_gem_shmem_pread_fast(dev, obj, args, file);</div><div class='del'>-	if (ret == -EFAULT)</div><div class='del'>-		ret = i915_gem_shmem_pread_slow(dev, obj, args, file);</div><div class='add'>+	trace_i915_gem_object_pread(obj, args-&gt;offset, args-&gt;size);</div><div class='add'>+</div><div class='add'>+	ret = i915_gem_shmem_pread(dev, obj, args, file);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	drm_gem_object_unreference(&amp;obj-&gt;base);</div><div class='hunk'>@@ -529,40 +568,19 @@ fast_user_write(struct io_mapping *mapping,</div><div class='ctx'> 		char __user *user_data,</div><div class='ctx'> 		int length)</div><div class='ctx'> {</div><div class='del'>-	char *vaddr_atomic;</div><div class='add'>+	void __iomem *vaddr_atomic;</div><div class='add'>+	void *vaddr;</div><div class='ctx'> 	unsigned long unwritten;</div><div class='ctx'> </div><div class='ctx'> 	vaddr_atomic = io_mapping_map_atomic_wc(mapping, page_base);</div><div class='del'>-	unwritten = __copy_from_user_inatomic_nocache(vaddr_atomic + page_offset,</div><div class='add'>+	/* We can use the cpu mem copy function because this is X86. */</div><div class='add'>+	vaddr = (void __force*)vaddr_atomic + page_offset;</div><div class='add'>+	unwritten = __copy_from_user_inatomic_nocache(vaddr,</div><div class='ctx'> 						      user_data, length);</div><div class='ctx'> 	io_mapping_unmap_atomic(vaddr_atomic);</div><div class='ctx'> 	return unwritten;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Here's the write path which can sleep for</div><div class='del'>- * page faults</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline void</div><div class='del'>-slow_kernel_write(struct io_mapping *mapping,</div><div class='del'>-		  loff_t gtt_base, int gtt_offset,</div><div class='del'>-		  struct page *user_page, int user_offset,</div><div class='del'>-		  int length)</div><div class='del'>-{</div><div class='del'>-	char __iomem *dst_vaddr;</div><div class='del'>-	char *src_vaddr;</div><div class='del'>-</div><div class='del'>-	dst_vaddr = io_mapping_map_wc(mapping, gtt_base);</div><div class='del'>-	src_vaddr = kmap(user_page);</div><div class='del'>-</div><div class='del'>-	memcpy_toio(dst_vaddr + gtt_offset,</div><div class='del'>-		    src_vaddr + user_offset,</div><div class='del'>-		    length);</div><div class='del'>-</div><div class='del'>-	kunmap(user_page);</div><div class='del'>-	io_mapping_unmap(dst_vaddr);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * This is the fast pwrite path, where we copy the data directly from the</div><div class='ctx'>  * user into the GTT, uncached.</div><div class='hunk'>@@ -577,7 +595,19 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev,</div><div class='ctx'> 	ssize_t remain;</div><div class='ctx'> 	loff_t offset, page_base;</div><div class='ctx'> 	char __user *user_data;</div><div class='del'>-	int page_offset, page_length;</div><div class='add'>+	int page_offset, page_length, ret;</div><div class='add'>+</div><div class='add'>+	ret = i915_gem_object_pin(obj, 0, true);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = i915_gem_object_set_to_gtt_domain(obj, true);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_unpin;</div><div class='add'>+</div><div class='add'>+	ret = i915_gem_object_put_fence(obj);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_unpin;</div><div class='ctx'> </div><div class='ctx'> 	user_data = (char __user *) (uintptr_t) args-&gt;data_ptr;</div><div class='ctx'> 	remain = args-&gt;size;</div><div class='hunk'>@@ -602,214 +632,133 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev,</div><div class='ctx'> 		 * retry in the slow path.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (fast_user_write(dev_priv-&gt;mm.gtt_mapping, page_base,</div><div class='del'>-				    page_offset, user_data, page_length))</div><div class='del'>-			return -EFAULT;</div><div class='add'>+				    page_offset, user_data, page_length)) {</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+			goto out_unpin;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		remain -= page_length;</div><div class='ctx'> 		user_data += page_length;</div><div class='ctx'> 		offset += page_length;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+out_unpin:</div><div class='add'>+	i915_gem_object_unpin(obj);</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * This is the fallback GTT pwrite path, which uses get_user_pages to pin</div><div class='del'>- * the memory and maps it using kmap_atomic for copying.</div><div class='del'>- *</div><div class='del'>- * This code resulted in x11perf -rgb10text consuming about 10% more CPU</div><div class='del'>- * than using i915_gem_gtt_pwrite_fast on a G45 (32-bit).</div><div class='del'>- */</div><div class='add'>+/* Per-page copy function for the shmem pwrite fastpath.</div><div class='add'>+ * Flushes invalid cachelines before writing to the target if</div><div class='add'>+ * needs_clflush_before is set and flushes out any written cachelines after</div><div class='add'>+ * writing if needs_clflush is set. */</div><div class='ctx'> static int</div><div class='del'>-i915_gem_gtt_pwrite_slow(struct drm_device *dev,</div><div class='del'>-			 struct drm_i915_gem_object *obj,</div><div class='del'>-			 struct drm_i915_gem_pwrite *args,</div><div class='del'>-			 struct drm_file *file)</div><div class='add'>+shmem_pwrite_fast(struct page *page, int shmem_page_offset, int page_length,</div><div class='add'>+		  char __user *user_data,</div><div class='add'>+		  bool page_do_bit17_swizzling,</div><div class='add'>+		  bool needs_clflush_before,</div><div class='add'>+		  bool needs_clflush_after)</div><div class='ctx'> {</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	ssize_t remain;</div><div class='del'>-	loff_t gtt_page_base, offset;</div><div class='del'>-	loff_t first_data_page, last_data_page, num_pages;</div><div class='del'>-	loff_t pinned_pages, i;</div><div class='del'>-	struct page **user_pages;</div><div class='del'>-	struct mm_struct *mm = current-&gt;mm;</div><div class='del'>-	int gtt_page_offset, data_page_offset, data_page_index, page_length;</div><div class='add'>+	char *vaddr;</div><div class='ctx'> 	int ret;</div><div class='del'>-	uint64_t data_ptr = args-&gt;data_ptr;</div><div class='del'>-</div><div class='del'>-	remain = args-&gt;size;</div><div class='del'>-</div><div class='del'>-	/* Pin the user pages containing the data.  We can't fault while</div><div class='del'>-	 * holding the struct mutex, and all of the pwrite implementations</div><div class='del'>-	 * want to hold it while dereferencing the user data.</div><div class='del'>-	 */</div><div class='del'>-	first_data_page = data_ptr / PAGE_SIZE;</div><div class='del'>-	last_data_page = (data_ptr + args-&gt;size - 1) / PAGE_SIZE;</div><div class='del'>-	num_pages = last_data_page - first_data_page + 1;</div><div class='del'>-</div><div class='del'>-	user_pages = drm_malloc_ab(num_pages, sizeof(struct page *));</div><div class='del'>-	if (user_pages == NULL)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	down_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-	pinned_pages = get_user_pages(current, mm, (uintptr_t)args-&gt;data_ptr,</div><div class='del'>-				      num_pages, 0, 0, user_pages, NULL);</div><div class='del'>-	up_read(&amp;mm-&gt;mmap_sem);</div><div class='del'>-	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	if (pinned_pages &lt; num_pages) {</div><div class='del'>-		ret = -EFAULT;</div><div class='del'>-		goto out_unpin_pages;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = i915_gem_object_set_to_gtt_domain(obj, true);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_unpin_pages;</div><div class='ctx'> </div><div class='del'>-	ret = i915_gem_object_put_fence(obj);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_unpin_pages;</div><div class='del'>-</div><div class='del'>-	offset = obj-&gt;gtt_offset + args-&gt;offset;</div><div class='del'>-</div><div class='del'>-	while (remain &gt; 0) {</div><div class='del'>-		/* Operation in this page</div><div class='del'>-		 *</div><div class='del'>-		 * gtt_page_base = page offset within aperture</div><div class='del'>-		 * gtt_page_offset = offset within page in aperture</div><div class='del'>-		 * data_page_index = page number in get_user_pages return</div><div class='del'>-		 * data_page_offset = offset with data_page_index page.</div><div class='del'>-		 * page_length = bytes to copy for this page</div><div class='del'>-		 */</div><div class='del'>-		gtt_page_base = offset &amp; PAGE_MASK;</div><div class='del'>-		gtt_page_offset = offset_in_page(offset);</div><div class='del'>-		data_page_index = data_ptr / PAGE_SIZE - first_data_page;</div><div class='del'>-		data_page_offset = offset_in_page(data_ptr);</div><div class='del'>-</div><div class='del'>-		page_length = remain;</div><div class='del'>-		if ((gtt_page_offset + page_length) &gt; PAGE_SIZE)</div><div class='del'>-			page_length = PAGE_SIZE - gtt_page_offset;</div><div class='del'>-		if ((data_page_offset + page_length) &gt; PAGE_SIZE)</div><div class='del'>-			page_length = PAGE_SIZE - data_page_offset;</div><div class='del'>-</div><div class='del'>-		slow_kernel_write(dev_priv-&gt;mm.gtt_mapping,</div><div class='del'>-				  gtt_page_base, gtt_page_offset,</div><div class='del'>-				  user_pages[data_page_index],</div><div class='del'>-				  data_page_offset,</div><div class='del'>-				  page_length);</div><div class='del'>-</div><div class='del'>-		remain -= page_length;</div><div class='del'>-		offset += page_length;</div><div class='del'>-		data_ptr += page_length;</div><div class='del'>-	}</div><div class='add'>+	if (unlikely(page_do_bit17_swizzling))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-out_unpin_pages:</div><div class='del'>-	for (i = 0; i &lt; pinned_pages; i++)</div><div class='del'>-		page_cache_release(user_pages[i]);</div><div class='del'>-	drm_free_large(user_pages);</div><div class='add'>+	vaddr = kmap_atomic(page);</div><div class='add'>+	if (needs_clflush_before)</div><div class='add'>+		drm_clflush_virt_range(vaddr + shmem_page_offset,</div><div class='add'>+				       page_length);</div><div class='add'>+	ret = __copy_from_user_inatomic_nocache(vaddr + shmem_page_offset,</div><div class='add'>+						user_data,</div><div class='add'>+						page_length);</div><div class='add'>+	if (needs_clflush_after)</div><div class='add'>+		drm_clflush_virt_range(vaddr + shmem_page_offset,</div><div class='add'>+				       page_length);</div><div class='add'>+	kunmap_atomic(vaddr);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * This is the fast shmem pwrite path, which attempts to directly</div><div class='del'>- * copy_from_user into the kmapped pages backing the object.</div><div class='del'>- */</div><div class='add'>+/* Only difference to the fast-path function is that this can handle bit17</div><div class='add'>+ * and uses non-atomic copy and kmap functions. */</div><div class='ctx'> static int</div><div class='del'>-i915_gem_shmem_pwrite_fast(struct drm_device *dev,</div><div class='del'>-			   struct drm_i915_gem_object *obj,</div><div class='del'>-			   struct drm_i915_gem_pwrite *args,</div><div class='del'>-			   struct drm_file *file)</div><div class='add'>+shmem_pwrite_slow(struct page *page, int shmem_page_offset, int page_length,</div><div class='add'>+		  char __user *user_data,</div><div class='add'>+		  bool page_do_bit17_swizzling,</div><div class='add'>+		  bool needs_clflush_before,</div><div class='add'>+		  bool needs_clflush_after)</div><div class='ctx'> {</div><div class='del'>-	struct address_space *mapping = obj-&gt;base.filp-&gt;f_path.dentry-&gt;d_inode-&gt;i_mapping;</div><div class='del'>-	ssize_t remain;</div><div class='del'>-	loff_t offset;</div><div class='del'>-	char __user *user_data;</div><div class='del'>-	int page_offset, page_length;</div><div class='del'>-</div><div class='del'>-	user_data = (char __user *) (uintptr_t) args-&gt;data_ptr;</div><div class='del'>-	remain = args-&gt;size;</div><div class='del'>-</div><div class='del'>-	offset = args-&gt;offset;</div><div class='del'>-	obj-&gt;dirty = 1;</div><div class='del'>-</div><div class='del'>-	while (remain &gt; 0) {</div><div class='del'>-		struct page *page;</div><div class='del'>-		char *vaddr;</div><div class='del'>-		int ret;</div><div class='del'>-</div><div class='del'>-		/* Operation in this page</div><div class='del'>-		 *</div><div class='del'>-		 * page_offset = offset within page</div><div class='del'>-		 * page_length = bytes to copy for this page</div><div class='del'>-		 */</div><div class='del'>-		page_offset = offset_in_page(offset);</div><div class='del'>-		page_length = remain;</div><div class='del'>-		if ((page_offset + remain) &gt; PAGE_SIZE)</div><div class='del'>-			page_length = PAGE_SIZE - page_offset;</div><div class='del'>-</div><div class='del'>-		page = shmem_read_mapping_page(mapping, offset &gt;&gt; PAGE_SHIFT);</div><div class='del'>-		if (IS_ERR(page))</div><div class='del'>-			return PTR_ERR(page);</div><div class='add'>+	char *vaddr;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-		vaddr = kmap_atomic(page);</div><div class='del'>-		ret = __copy_from_user_inatomic(vaddr + page_offset,</div><div class='add'>+	vaddr = kmap(page);</div><div class='add'>+	if (unlikely(needs_clflush_before || page_do_bit17_swizzling))</div><div class='add'>+		shmem_clflush_swizzled_range(vaddr + shmem_page_offset,</div><div class='add'>+					     page_length,</div><div class='add'>+					     page_do_bit17_swizzling);</div><div class='add'>+	if (page_do_bit17_swizzling)</div><div class='add'>+		ret = __copy_from_user_swizzled(vaddr, shmem_page_offset,</div><div class='ctx'> 						user_data,</div><div class='ctx'> 						page_length);</div><div class='del'>-		kunmap_atomic(vaddr);</div><div class='del'>-</div><div class='del'>-		set_page_dirty(page);</div><div class='del'>-		mark_page_accessed(page);</div><div class='del'>-		page_cache_release(page);</div><div class='del'>-</div><div class='del'>-		/* If we get a fault while copying data, then (presumably) our</div><div class='del'>-		 * source page isn't available.  Return the error and we'll</div><div class='del'>-		 * retry in the slow path.</div><div class='del'>-		 */</div><div class='del'>-		if (ret)</div><div class='del'>-			return -EFAULT;</div><div class='del'>-</div><div class='del'>-		remain -= page_length;</div><div class='del'>-		user_data += page_length;</div><div class='del'>-		offset += page_length;</div><div class='del'>-	}</div><div class='add'>+	else</div><div class='add'>+		ret = __copy_from_user(vaddr + shmem_page_offset,</div><div class='add'>+				       user_data,</div><div class='add'>+				       page_length);</div><div class='add'>+	if (needs_clflush_after)</div><div class='add'>+		shmem_clflush_swizzled_range(vaddr + shmem_page_offset,</div><div class='add'>+					     page_length,</div><div class='add'>+					     page_do_bit17_swizzling);</div><div class='add'>+	kunmap(page);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * This is the fallback shmem pwrite path, which uses get_user_pages to pin</div><div class='del'>- * the memory and maps it using kmap_atomic for copying.</div><div class='del'>- *</div><div class='del'>- * This avoids taking mmap_sem for faulting on the user's address while the</div><div class='del'>- * struct_mutex is held.</div><div class='del'>- */</div><div class='ctx'> static int</div><div class='del'>-i915_gem_shmem_pwrite_slow(struct drm_device *dev,</div><div class='del'>-			   struct drm_i915_gem_object *obj,</div><div class='del'>-			   struct drm_i915_gem_pwrite *args,</div><div class='del'>-			   struct drm_file *file)</div><div class='add'>+i915_gem_shmem_pwrite(struct drm_device *dev,</div><div class='add'>+		      struct drm_i915_gem_object *obj,</div><div class='add'>+		      struct drm_i915_gem_pwrite *args,</div><div class='add'>+		      struct drm_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct address_space *mapping = obj-&gt;base.filp-&gt;f_path.dentry-&gt;d_inode-&gt;i_mapping;</div><div class='ctx'> 	ssize_t remain;</div><div class='ctx'> 	loff_t offset;</div><div class='ctx'> 	char __user *user_data;</div><div class='del'>-	int shmem_page_offset, page_length, ret;</div><div class='add'>+	int shmem_page_offset, page_length, ret = 0;</div><div class='ctx'> 	int obj_do_bit17_swizzling, page_do_bit17_swizzling;</div><div class='add'>+	int hit_slowpath = 0;</div><div class='add'>+	int needs_clflush_after = 0;</div><div class='add'>+	int needs_clflush_before = 0;</div><div class='add'>+	int release_page;</div><div class='ctx'> </div><div class='ctx'> 	user_data = (char __user *) (uintptr_t) args-&gt;data_ptr;</div><div class='ctx'> 	remain = args-&gt;size;</div><div class='ctx'> </div><div class='ctx'> 	obj_do_bit17_swizzling = i915_gem_object_needs_bit17_swizzle(obj);</div><div class='ctx'> </div><div class='add'>+	if (obj-&gt;base.write_domain != I915_GEM_DOMAIN_CPU) {</div><div class='add'>+		/* If we're not in the cpu write domain, set ourself into the gtt</div><div class='add'>+		 * write domain and manually flush cachelines (if required). This</div><div class='add'>+		 * optimizes for the case when the gpu will use the data</div><div class='add'>+		 * right away and we therefore have to clflush anyway. */</div><div class='add'>+		if (obj-&gt;cache_level == I915_CACHE_NONE)</div><div class='add'>+			needs_clflush_after = 1;</div><div class='add'>+		ret = i915_gem_object_set_to_gtt_domain(obj, true);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	/* Same trick applies for invalidate partially written cachelines before</div><div class='add'>+	 * writing.  */</div><div class='add'>+	if (!(obj-&gt;base.read_domains &amp; I915_GEM_DOMAIN_CPU)</div><div class='add'>+	    &amp;&amp; obj-&gt;cache_level == I915_CACHE_NONE)</div><div class='add'>+		needs_clflush_before = 1;</div><div class='add'>+</div><div class='ctx'> 	offset = args-&gt;offset;</div><div class='ctx'> 	obj-&gt;dirty = 1;</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-</div><div class='ctx'> 	while (remain &gt; 0) {</div><div class='ctx'> 		struct page *page;</div><div class='del'>-		char *vaddr;</div><div class='add'>+		int partial_cacheline_write;</div><div class='ctx'> </div><div class='ctx'> 		/* Operation in this page</div><div class='ctx'> 		 *</div><div class='hunk'>@@ -822,29 +771,51 @@ i915_gem_shmem_pwrite_slow(struct drm_device *dev,</div><div class='ctx'> 		if ((shmem_page_offset + page_length) &gt; PAGE_SIZE)</div><div class='ctx'> 			page_length = PAGE_SIZE - shmem_page_offset;</div><div class='ctx'> </div><div class='del'>-		page = shmem_read_mapping_page(mapping, offset &gt;&gt; PAGE_SHIFT);</div><div class='del'>-		if (IS_ERR(page)) {</div><div class='del'>-			ret = PTR_ERR(page);</div><div class='del'>-			goto out;</div><div class='add'>+		/* If we don't overwrite a cacheline completely we need to be</div><div class='add'>+		 * careful to have up-to-date data by first clflushing. Don't</div><div class='add'>+		 * overcomplicate things and flush the entire patch. */</div><div class='add'>+		partial_cacheline_write = needs_clflush_before &amp;&amp;</div><div class='add'>+			((shmem_page_offset | page_length)</div><div class='add'>+				&amp; (boot_cpu_data.x86_clflush_size - 1));</div><div class='add'>+</div><div class='add'>+		if (obj-&gt;pages) {</div><div class='add'>+			page = obj-&gt;pages[offset &gt;&gt; PAGE_SHIFT];</div><div class='add'>+			release_page = 0;</div><div class='add'>+		} else {</div><div class='add'>+			page = shmem_read_mapping_page(mapping, offset &gt;&gt; PAGE_SHIFT);</div><div class='add'>+			if (IS_ERR(page)) {</div><div class='add'>+				ret = PTR_ERR(page);</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			release_page = 1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		page_do_bit17_swizzling = obj_do_bit17_swizzling &amp;&amp;</div><div class='ctx'> 			(page_to_phys(page) &amp; (1 &lt;&lt; 17)) != 0;</div><div class='ctx'> </div><div class='del'>-		vaddr = kmap(page);</div><div class='del'>-		if (page_do_bit17_swizzling)</div><div class='del'>-			ret = __copy_from_user_swizzled(vaddr, shmem_page_offset,</div><div class='del'>-							user_data,</div><div class='del'>-							page_length);</div><div class='del'>-		else</div><div class='del'>-			ret = __copy_from_user(vaddr + shmem_page_offset,</div><div class='del'>-					       user_data,</div><div class='del'>-					       page_length);</div><div class='del'>-		kunmap(page);</div><div class='add'>+		ret = shmem_pwrite_fast(page, shmem_page_offset, page_length,</div><div class='add'>+					user_data, page_do_bit17_swizzling,</div><div class='add'>+					partial_cacheline_write,</div><div class='add'>+					needs_clflush_after);</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			goto next_page;</div><div class='add'>+</div><div class='add'>+		hit_slowpath = 1;</div><div class='add'>+		page_cache_get(page);</div><div class='add'>+		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='add'>+		ret = shmem_pwrite_slow(page, shmem_page_offset, page_length,</div><div class='add'>+					user_data, page_do_bit17_swizzling,</div><div class='add'>+					partial_cacheline_write,</div><div class='add'>+					needs_clflush_after);</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+		page_cache_release(page);</div><div class='add'>+next_page:</div><div class='ctx'> 		set_page_dirty(page);</div><div class='ctx'> 		mark_page_accessed(page);</div><div class='del'>-		page_cache_release(page);</div><div class='add'>+		if (release_page)</div><div class='add'>+			page_cache_release(page);</div><div class='ctx'> </div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			ret = -EFAULT;</div><div class='hunk'>@@ -857,17 +828,21 @@ i915_gem_shmem_pwrite_slow(struct drm_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	/* Fixup: Kill any reinstated backing storage pages */</div><div class='del'>-	if (obj-&gt;madv == __I915_MADV_PURGED)</div><div class='del'>-		i915_gem_object_truncate(obj);</div><div class='del'>-	/* and flush dirty cachelines in case the object isn't in the cpu write</div><div class='del'>-	 * domain anymore. */</div><div class='del'>-	if (obj-&gt;base.write_domain != I915_GEM_DOMAIN_CPU) {</div><div class='del'>-		i915_gem_clflush_object(obj);</div><div class='del'>-		intel_gtt_chipset_flush();</div><div class='add'>+	if (hit_slowpath) {</div><div class='add'>+		/* Fixup: Kill any reinstated backing storage pages */</div><div class='add'>+		if (obj-&gt;madv == __I915_MADV_PURGED)</div><div class='add'>+			i915_gem_object_truncate(obj);</div><div class='add'>+		/* and flush dirty cachelines in case the object isn't in the cpu write</div><div class='add'>+		 * domain anymore. */</div><div class='add'>+		if (obj-&gt;base.write_domain != I915_GEM_DOMAIN_CPU) {</div><div class='add'>+			i915_gem_clflush_object(obj);</div><div class='add'>+			intel_gtt_chipset_flush();</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (needs_clflush_after)</div><div class='add'>+		intel_gtt_chipset_flush();</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -892,8 +867,8 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		       args-&gt;size))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	ret = fault_in_pages_readable((char __user *)(uintptr_t)args-&gt;data_ptr,</div><div class='del'>-				      args-&gt;size);</div><div class='add'>+	ret = fault_in_multipages_readable((char __user *)(uintptr_t)args-&gt;data_ptr,</div><div class='add'>+					   args-&gt;size);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='hunk'>@@ -914,8 +889,17 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* prime objects have no backing filp to GEM pread/pwrite</div><div class='add'>+	 * pages from.</div><div class='add'>+	 */</div><div class='add'>+	if (!obj-&gt;base.filp) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	trace_i915_gem_object_pwrite(obj, args-&gt;offset, args-&gt;size);</div><div class='ctx'> </div><div class='add'>+	ret = -EFAULT;</div><div class='ctx'> 	/* We can only do the GTT pwrite on untiled buffers, as otherwise</div><div class='ctx'> 	 * it would end up going through the fenced access, and we'll get</div><div class='ctx'> 	 * different detiling behavior between reading and writing.</div><div class='hunk'>@@ -928,42 +912,18 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (obj-&gt;gtt_space &amp;&amp;</div><div class='add'>+	    obj-&gt;cache_level == I915_CACHE_NONE &amp;&amp;</div><div class='add'>+	    obj-&gt;tiling_mode == I915_TILING_NONE &amp;&amp;</div><div class='add'>+	    obj-&gt;map_and_fenceable &amp;&amp;</div><div class='ctx'> 	    obj-&gt;base.write_domain != I915_GEM_DOMAIN_CPU) {</div><div class='del'>-		ret = i915_gem_object_pin(obj, 0, true);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		ret = i915_gem_object_set_to_gtt_domain(obj, true);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_unpin;</div><div class='del'>-</div><div class='del'>-		ret = i915_gem_object_put_fence(obj);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_unpin;</div><div class='del'>-</div><div class='ctx'> 		ret = i915_gem_gtt_pwrite_fast(dev, obj, args, file);</div><div class='del'>-		if (ret == -EFAULT)</div><div class='del'>-			ret = i915_gem_gtt_pwrite_slow(dev, obj, args, file);</div><div class='del'>-</div><div class='del'>-out_unpin:</div><div class='del'>-		i915_gem_object_unpin(obj);</div><div class='del'>-</div><div class='del'>-		if (ret != -EFAULT)</div><div class='del'>-			goto out;</div><div class='del'>-		/* Fall through to the shmfs paths because the gtt paths might</div><div class='del'>-		 * fail with non-page-backed user pointers (e.g. gtt mappings</div><div class='del'>-		 * when moving data between textures). */</div><div class='add'>+		/* Note that the gtt paths might fail with non-page-backed user</div><div class='add'>+		 * pointers (e.g. gtt mappings when moving data between</div><div class='add'>+		 * textures). Fallback to the shmem path in that case. */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = i915_gem_object_set_to_cpu_domain(obj, 1);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	ret = -EFAULT;</div><div class='del'>-	if (!i915_gem_object_needs_bit17_swizzle(obj))</div><div class='del'>-		ret = i915_gem_shmem_pwrite_fast(dev, obj, args, file);</div><div class='ctx'> 	if (ret == -EFAULT)</div><div class='del'>-		ret = i915_gem_shmem_pwrite_slow(dev, obj, args, file);</div><div class='add'>+		ret = i915_gem_shmem_pwrite(dev, obj, args, file);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	drm_gem_object_unreference(&amp;obj-&gt;base);</div><div class='hunk'>@@ -986,9 +946,6 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	uint32_t write_domain = args-&gt;write_domain;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!(dev-&gt;driver-&gt;driver_features &amp; DRIVER_GEM))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	/* Only handle setting domains to types used by the CPU. */</div><div class='ctx'> 	if (write_domain &amp; I915_GEM_GPU_DOMAINS)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1042,9 +999,6 @@ i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (!(dev-&gt;driver-&gt;driver_features &amp; DRIVER_GEM))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	ret = i915_mutex_lock_interruptible(dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1080,13 +1034,18 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	struct drm_gem_object *obj;</div><div class='ctx'> 	unsigned long addr;</div><div class='ctx'> </div><div class='del'>-	if (!(dev-&gt;driver-&gt;driver_features &amp; DRIVER_GEM))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	obj = drm_gem_object_lookup(dev, file, args-&gt;handle);</div><div class='ctx'> 	if (obj == NULL)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='add'>+	/* prime objects have no backing filp to GEM mmap</div><div class='add'>+	 * pages from.</div><div class='add'>+	 */</div><div class='add'>+	if (!obj-&gt;filp) {</div><div class='add'>+		drm_gem_object_unreference_unlocked(obj);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	addr = vm_mmap(obj-&gt;filp, 0, args-&gt;size,</div><div class='ctx'> 		       PROT_READ | PROT_WRITE, MAP_SHARED,</div><div class='ctx'> 		       args-&gt;offset);</div><div class='hunk'>@@ -1151,10 +1110,10 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)</div><div class='ctx'> 			goto unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (obj-&gt;tiling_mode == I915_TILING_NONE)</div><div class='del'>-		ret = i915_gem_object_put_fence(obj);</div><div class='del'>-	else</div><div class='del'>-		ret = i915_gem_object_get_fence(obj, NULL);</div><div class='add'>+	if (!obj-&gt;has_global_gtt_mapping)</div><div class='add'>+		i915_gem_gtt_bind_object(obj, obj-&gt;cache_level);</div><div class='add'>+</div><div class='add'>+	ret = i915_gem_object_get_fence(obj);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='hunk'>@@ -1308,9 +1267,6 @@ i915_gem_mmap_gtt(struct drm_file *file,</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!(dev-&gt;driver-&gt;driver_features &amp; DRIVER_GEM))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	ret = i915_mutex_lock_interruptible(dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1368,14 +1324,10 @@ i915_gem_mmap_gtt_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_gem_mmap_gtt *args = data;</div><div class='ctx'> </div><div class='del'>-	if (!(dev-&gt;driver-&gt;driver_features &amp; DRIVER_GEM))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	return i915_gem_mmap_gtt(file, dev, args-&gt;handle, &amp;args-&gt;offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static int</div><div class='add'>+int</div><div class='ctx'> i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj,</div><div class='ctx'> 			      gfp_t gfpmask)</div><div class='ctx'> {</div><div class='hunk'>@@ -1384,6 +1336,9 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj,</div><div class='ctx'> 	struct inode *inode;</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> </div><div class='add'>+	if (obj-&gt;pages || obj-&gt;sg_table)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	/* Get the list of pages out of our struct file.  They'll be pinned</div><div class='ctx'> 	 * at this point until we release them.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1425,6 +1380,9 @@ i915_gem_object_put_pages_gtt(struct drm_i915_gem_object *obj)</div><div class='ctx'> 	int page_count = obj-&gt;base.size / PAGE_SIZE;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (!obj-&gt;pages)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	BUG_ON(obj-&gt;madv == __I915_MADV_PURGED);</div><div class='ctx'> </div><div class='ctx'> 	if (i915_gem_object_needs_bit17_swizzle(obj))</div><div class='hunk'>@@ -1473,7 +1431,6 @@ i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,</div><div class='ctx'> </div><div class='ctx'> 	if (obj-&gt;fenced_gpu_access) {</div><div class='ctx'> 		obj-&gt;last_fenced_seqno = seqno;</div><div class='del'>-		obj-&gt;last_fenced_ring = ring;</div><div class='ctx'> </div><div class='ctx'> 		/* Bump MRU to take account of the delayed flush */</div><div class='ctx'> 		if (obj-&gt;fence_reg != I915_FENCE_REG_NONE) {</div><div class='hunk'>@@ -1512,15 +1469,11 @@ i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj)</div><div class='ctx'> 	struct drm_device *dev = obj-&gt;base.dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> </div><div class='del'>-	if (obj-&gt;pin_count != 0)</div><div class='del'>-		list_move_tail(&amp;obj-&gt;mm_list, &amp;dev_priv-&gt;mm.pinned_list);</div><div class='del'>-	else</div><div class='del'>-		list_move_tail(&amp;obj-&gt;mm_list, &amp;dev_priv-&gt;mm.inactive_list);</div><div class='add'>+	list_move_tail(&amp;obj-&gt;mm_list, &amp;dev_priv-&gt;mm.inactive_list);</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!list_empty(&amp;obj-&gt;gpu_write_list));</div><div class='ctx'> 	BUG_ON(!obj-&gt;active);</div><div class='ctx'> 	obj-&gt;ring = NULL;</div><div class='del'>-	obj-&gt;last_fenced_ring = NULL;</div><div class='ctx'> </div><div class='ctx'> 	i915_gem_object_move_off_active(obj);</div><div class='ctx'> 	obj-&gt;fenced_gpu_access = false;</div><div class='hunk'>@@ -1546,6 +1499,9 @@ i915_gem_object_truncate(struct drm_i915_gem_object *obj)</div><div class='ctx'> 	inode = obj-&gt;base.filp-&gt;f_path.dentry-&gt;d_inode;</div><div class='ctx'> 	shmem_truncate_range(inode, 0, (loff_t)-1);</div><div class='ctx'> </div><div class='add'>+	if (obj-&gt;base.map_list.map)</div><div class='add'>+		drm_gem_free_mmap_offset(&amp;obj-&gt;base);</div><div class='add'>+</div><div class='ctx'> 	obj-&gt;madv = __I915_MADV_PURGED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1711,30 +1667,29 @@ static void i915_gem_reset_fences(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dev_priv-&gt;num_fence_regs; i++) {</div><div class='ctx'> 		struct drm_i915_fence_reg *reg = &amp;dev_priv-&gt;fence_regs[i];</div><div class='del'>-		struct drm_i915_gem_object *obj = reg-&gt;obj;</div><div class='ctx'> </div><div class='del'>-		if (!obj)</div><div class='del'>-			continue;</div><div class='add'>+		i915_gem_write_fence(dev, i, NULL);</div><div class='ctx'> </div><div class='del'>-		if (obj-&gt;tiling_mode)</div><div class='del'>-			i915_gem_release_mmap(obj);</div><div class='add'>+		if (reg-&gt;obj)</div><div class='add'>+			i915_gem_object_fence_lost(reg-&gt;obj);</div><div class='ctx'> </div><div class='del'>-		reg-&gt;obj-&gt;fence_reg = I915_FENCE_REG_NONE;</div><div class='del'>-		reg-&gt;obj-&gt;fenced_gpu_access = false;</div><div class='del'>-		reg-&gt;obj-&gt;last_fenced_seqno = 0;</div><div class='del'>-		reg-&gt;obj-&gt;last_fenced_ring = NULL;</div><div class='del'>-		i915_gem_clear_fence_reg(dev, reg);</div><div class='add'>+		reg-&gt;pin_count = 0;</div><div class='add'>+		reg-&gt;obj = NULL;</div><div class='add'>+		INIT_LIST_HEAD(&amp;reg-&gt;lru_list);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;dev_priv-&gt;mm.fence_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void i915_gem_reset(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='add'>+	struct intel_ring_buffer *ring;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; I915_NUM_RINGS; i++)</div><div class='del'>-		i915_gem_reset_ring_lists(dev_priv, &amp;dev_priv-&gt;ring[i]);</div><div class='add'>+	for_each_ring(ring, dev_priv, i)</div><div class='add'>+		i915_gem_reset_ring_lists(dev_priv, ring);</div><div class='ctx'> </div><div class='ctx'> 	/* Remove anything from the flushing lists. The GPU cache is likely</div><div class='ctx'> 	 * to be lost on reset along with the data, so simply move the</div><div class='hunk'>@@ -1839,24 +1794,11 @@ void</div><div class='ctx'> i915_gem_retire_requests(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_ring_buffer *ring;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!list_empty(&amp;dev_priv-&gt;mm.deferred_free_list)) {</div><div class='del'>-	    struct drm_i915_gem_object *obj, *next;</div><div class='del'>-</div><div class='del'>-	    /* We must be careful that during unbind() we do not</div><div class='del'>-	     * accidentally infinitely recurse into retire requests.</div><div class='del'>-	     * Currently:</div><div class='del'>-	     *   retire -&gt; free -&gt; unbind -&gt; wait -&gt; retire_ring</div><div class='del'>-	     */</div><div class='del'>-	    list_for_each_entry_safe(obj, next,</div><div class='del'>-				     &amp;dev_priv-&gt;mm.deferred_free_list,</div><div class='del'>-				     mm_list)</div><div class='del'>-		    i915_gem_free_object_tail(obj);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; I915_NUM_RINGS; i++)</div><div class='del'>-		i915_gem_retire_requests_ring(&amp;dev_priv-&gt;ring[i]);</div><div class='add'>+	for_each_ring(ring, dev_priv, i)</div><div class='add'>+		i915_gem_retire_requests_ring(ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1864,6 +1806,7 @@ i915_gem_retire_work_handler(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv;</div><div class='ctx'> 	struct drm_device *dev;</div><div class='add'>+	struct intel_ring_buffer *ring;</div><div class='ctx'> 	bool idle;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -1883,9 +1826,7 @@ i915_gem_retire_work_handler(struct work_struct *work)</div><div class='ctx'> 	 * objects indefinitely.</div><div class='ctx'> 	 */</div><div class='ctx'> 	idle = true;</div><div class='del'>-	for (i = 0; i &lt; I915_NUM_RINGS; i++) {</div><div class='del'>-		struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[i];</div><div class='del'>-</div><div class='add'>+	for_each_ring(ring, dev_priv, i) {</div><div class='ctx'> 		if (!list_empty(&amp;ring-&gt;gpu_write_list)) {</div><div class='ctx'> 			struct drm_i915_gem_request *request;</div><div class='ctx'> 			int ret;</div><div class='hunk'>@@ -1907,20 +1848,10 @@ i915_gem_retire_work_handler(struct work_struct *work)</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * Waits for a sequence number to be signaled, and cleans up the</div><div class='del'>- * request and object lists appropriately for that event.</div><div class='del'>- */</div><div class='del'>-int</div><div class='del'>-i915_wait_request(struct intel_ring_buffer *ring,</div><div class='del'>-		  uint32_t seqno,</div><div class='del'>-		  bool do_retire)</div><div class='add'>+static int</div><div class='add'>+i915_gem_check_wedge(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='del'>-	drm_i915_private_t *dev_priv = ring-&gt;dev-&gt;dev_private;</div><div class='del'>-	u32 ier;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	BUG_ON(seqno == 0);</div><div class='add'>+	BUG_ON(!mutex_is_locked(&amp;dev_priv-&gt;dev-&gt;struct_mutex));</div><div class='ctx'> </div><div class='ctx'> 	if (atomic_read(&amp;dev_priv-&gt;mm.wedged)) {</div><div class='ctx'> 		struct completion *x = &amp;dev_priv-&gt;error_completion;</div><div class='hunk'>@@ -1935,6 +1866,20 @@ i915_wait_request(struct intel_ring_buffer *ring,</div><div class='ctx'> 		return recovery_complete ? -EIO : -EAGAIN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Compare seqno against outstanding lazy request. Emit a request if they are</div><div class='add'>+ * equal.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+i915_gem_check_olr(struct intel_ring_buffer *ring, u32 seqno)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	BUG_ON(!mutex_is_locked(&amp;ring-&gt;dev-&gt;struct_mutex));</div><div class='add'>+</div><div class='ctx'> 	if (seqno == ring-&gt;outstanding_lazy_request) {</div><div class='ctx'> 		struct drm_i915_gem_request *request;</div><div class='ctx'> </div><div class='hunk'>@@ -1948,54 +1893,67 @@ i915_wait_request(struct intel_ring_buffer *ring,</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		seqno = request-&gt;seqno;</div><div class='add'>+		BUG_ON(seqno != request-&gt;seqno);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!i915_seqno_passed(ring-&gt;get_seqno(ring), seqno)) {</div><div class='del'>-		if (HAS_PCH_SPLIT(ring-&gt;dev))</div><div class='del'>-			ier = I915_READ(DEIER) | I915_READ(GTIER);</div><div class='del'>-		else</div><div class='del'>-			ier = I915_READ(IER);</div><div class='del'>-		if (!ier) {</div><div class='del'>-			DRM_ERROR("something (likely vbetool) disabled "</div><div class='del'>-				  "interrupts, re-enabling\n");</div><div class='del'>-			ring-&gt;dev-&gt;driver-&gt;irq_preinstall(ring-&gt;dev);</div><div class='del'>-			ring-&gt;dev-&gt;driver-&gt;irq_postinstall(ring-&gt;dev);</div><div class='del'>-		}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		trace_i915_gem_request_wait_begin(ring, seqno);</div><div class='del'>-</div><div class='del'>-		ring-&gt;waiting_seqno = seqno;</div><div class='del'>-		if (ring-&gt;irq_get(ring)) {</div><div class='del'>-			if (dev_priv-&gt;mm.interruptible)</div><div class='del'>-				ret = wait_event_interruptible(ring-&gt;irq_queue,</div><div class='del'>-							       i915_seqno_passed(ring-&gt;get_seqno(ring), seqno)</div><div class='del'>-							       || atomic_read(&amp;dev_priv-&gt;mm.wedged));</div><div class='del'>-			else</div><div class='del'>-				wait_event(ring-&gt;irq_queue,</div><div class='del'>-					   i915_seqno_passed(ring-&gt;get_seqno(ring), seqno)</div><div class='del'>-					   || atomic_read(&amp;dev_priv-&gt;mm.wedged));</div><div class='del'>-</div><div class='del'>-			ring-&gt;irq_put(ring);</div><div class='del'>-		} else if (wait_for_atomic(i915_seqno_passed(ring-&gt;get_seqno(ring),</div><div class='del'>-							     seqno) ||</div><div class='del'>-					   atomic_read(&amp;dev_priv-&gt;mm.wedged), 3000))</div><div class='del'>-			ret = -EBUSY;</div><div class='del'>-		ring-&gt;waiting_seqno = 0;</div><div class='del'>-</div><div class='del'>-		trace_i915_gem_request_wait_end(ring, seqno);</div><div class='del'>-	}</div><div class='add'>+static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno,</div><div class='add'>+			bool interruptible)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = ring-&gt;dev-&gt;dev_private;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (i915_seqno_passed(ring-&gt;get_seqno(ring), seqno))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	trace_i915_gem_request_wait_begin(ring, seqno);</div><div class='add'>+	if (WARN_ON(!ring-&gt;irq_get(ring)))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+#define EXIT_COND \</div><div class='add'>+	(i915_seqno_passed(ring-&gt;get_seqno(ring), seqno) || \</div><div class='add'>+	atomic_read(&amp;dev_priv-&gt;mm.wedged))</div><div class='add'>+</div><div class='add'>+	if (interruptible)</div><div class='add'>+		ret = wait_event_interruptible(ring-&gt;irq_queue,</div><div class='add'>+					       EXIT_COND);</div><div class='add'>+	else</div><div class='add'>+		wait_event(ring-&gt;irq_queue, EXIT_COND);</div><div class='add'>+</div><div class='add'>+	ring-&gt;irq_put(ring);</div><div class='add'>+	trace_i915_gem_request_wait_end(ring, seqno);</div><div class='add'>+#undef EXIT_COND</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Waits for a sequence number to be signaled, and cleans up the</div><div class='add'>+ * request and object lists appropriately for that event.</div><div class='add'>+ */</div><div class='add'>+int</div><div class='add'>+i915_wait_request(struct intel_ring_buffer *ring,</div><div class='add'>+		  uint32_t seqno)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = ring-&gt;dev-&gt;dev_private;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	BUG_ON(seqno == 0);</div><div class='add'>+</div><div class='add'>+	ret = i915_gem_check_wedge(dev_priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = i915_gem_check_olr(ring, seqno);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = __wait_seqno(ring, seqno, dev_priv-&gt;mm.interruptible);</div><div class='ctx'> 	if (atomic_read(&amp;dev_priv-&gt;mm.wedged))</div><div class='ctx'> 		ret = -EAGAIN;</div><div class='ctx'> </div><div class='del'>-	/* Directly dispatch request retiring.  While we have the work queue</div><div class='del'>-	 * to handle this, the waiter on a request often wants an associated</div><div class='del'>-	 * buffer to have made it to the inactive list, and we would need</div><div class='del'>-	 * a separate wait queue to handle that.</div><div class='del'>-	 */</div><div class='del'>-	if (ret == 0 &amp;&amp; do_retire)</div><div class='del'>-		i915_gem_retire_requests_ring(ring);</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2017,15 +1975,58 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj)</div><div class='ctx'> 	 * it.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (obj-&gt;active) {</div><div class='del'>-		ret = i915_wait_request(obj-&gt;ring, obj-&gt;last_rendering_seqno,</div><div class='del'>-					true);</div><div class='add'>+		ret = i915_wait_request(obj-&gt;ring, obj-&gt;last_rendering_seqno);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='add'>+		i915_gem_retire_requests_ring(obj-&gt;ring);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * i915_gem_object_sync - sync an object to a ring.</div><div class='add'>+ *</div><div class='add'>+ * @obj: object which may be in use on another ring.</div><div class='add'>+ * @to: ring we wish to use the object on. May be NULL.</div><div class='add'>+ *</div><div class='add'>+ * This code is meant to abstract object synchronization with the GPU.</div><div class='add'>+ * Calling with NULL implies synchronizing the object with the CPU</div><div class='add'>+ * rather than a particular GPU ring.</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 if successful, else propagates up the lower layer error.</div><div class='add'>+ */</div><div class='add'>+int</div><div class='add'>+i915_gem_object_sync(struct drm_i915_gem_object *obj,</div><div class='add'>+		     struct intel_ring_buffer *to)</div><div class='add'>+{</div><div class='add'>+	struct intel_ring_buffer *from = obj-&gt;ring;</div><div class='add'>+	u32 seqno;</div><div class='add'>+	int ret, idx;</div><div class='add'>+</div><div class='add'>+	if (from == NULL || to == from)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (to == NULL || !i915_semaphore_is_enabled(obj-&gt;base.dev))</div><div class='add'>+		return i915_gem_object_wait_rendering(obj);</div><div class='add'>+</div><div class='add'>+	idx = intel_ring_sync_index(from, to);</div><div class='add'>+</div><div class='add'>+	seqno = obj-&gt;last_rendering_seqno;</div><div class='add'>+	if (seqno &lt;= from-&gt;sync_seqno[idx])</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = i915_gem_check_olr(obj-&gt;ring, seqno);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = to-&gt;sync_to(to, from, seqno);</div><div class='add'>+	if (!ret)</div><div class='add'>+		from-&gt;sync_seqno[idx] = seqno;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void i915_gem_object_finish_gtt(struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='ctx'> 	u32 old_write_domain, old_read_domains;</div><div class='hunk'>@@ -2062,13 +2063,11 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)</div><div class='ctx'> 	if (obj-&gt;gtt_space == NULL)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (obj-&gt;pin_count != 0) {</div><div class='del'>-		DRM_ERROR("Attempting to unbind pinned buffer\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	if (obj-&gt;pin_count)</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	ret = i915_gem_object_finish_gpu(obj);</div><div class='del'>-	if (ret == -ERESTARTSYS)</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	/* Continue on if we fail due to EIO, the GPU is hung so we</div><div class='ctx'> 	 * should be safe and we need to cleanup or else we might</div><div class='hunk'>@@ -2095,16 +2094,18 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)</div><div class='ctx'> </div><div class='ctx'> 	/* release the fence reg _after_ flushing */</div><div class='ctx'> 	ret = i915_gem_object_put_fence(obj);</div><div class='del'>-	if (ret == -ERESTARTSYS)</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	trace_i915_gem_object_unbind(obj);</div><div class='ctx'> </div><div class='del'>-	i915_gem_gtt_unbind_object(obj);</div><div class='add'>+	if (obj-&gt;has_global_gtt_mapping)</div><div class='add'>+		i915_gem_gtt_unbind_object(obj);</div><div class='ctx'> 	if (obj-&gt;has_aliasing_ppgtt_mapping) {</div><div class='ctx'> 		i915_ppgtt_unbind_object(dev_priv-&gt;mm.aliasing_ppgtt, obj);</div><div class='ctx'> 		obj-&gt;has_aliasing_ppgtt_mapping = 0;</div><div class='ctx'> 	}</div><div class='add'>+	i915_gem_gtt_finish_object(obj);</div><div class='ctx'> </div><div class='ctx'> 	i915_gem_object_put_pages_gtt(obj);</div><div class='ctx'> </div><div class='hunk'>@@ -2145,7 +2146,7 @@ i915_gem_flush_ring(struct intel_ring_buffer *ring,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int i915_ring_idle(struct intel_ring_buffer *ring, bool do_retire)</div><div class='add'>+static int i915_ring_idle(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -2159,208 +2160,201 @@ static int i915_ring_idle(struct intel_ring_buffer *ring, bool do_retire)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return i915_wait_request(ring, i915_gem_next_request_seqno(ring),</div><div class='del'>-				 do_retire);</div><div class='add'>+	return i915_wait_request(ring, i915_gem_next_request_seqno(ring));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int i915_gpu_idle(struct drm_device *dev, bool do_retire)</div><div class='add'>+int i915_gpu_idle(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_ring_buffer *ring;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='ctx'> 	/* Flush everything onto the inactive list. */</div><div class='del'>-	for (i = 0; i &lt; I915_NUM_RINGS; i++) {</div><div class='del'>-		ret = i915_ring_idle(&amp;dev_priv-&gt;ring[i], do_retire);</div><div class='add'>+	for_each_ring(ring, dev_priv, i) {</div><div class='add'>+		ret = i915_ring_idle(ring);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='add'>+</div><div class='add'>+		/* Is the device fubar? */</div><div class='add'>+		if (WARN_ON(!list_empty(&amp;ring-&gt;gpu_write_list)))</div><div class='add'>+			return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sandybridge_write_fence_reg(struct drm_i915_gem_object *obj,</div><div class='del'>-				       struct intel_ring_buffer *pipelined)</div><div class='add'>+static void sandybridge_write_fence_reg(struct drm_device *dev, int reg,</div><div class='add'>+					struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = obj-&gt;base.dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 size = obj-&gt;gtt_space-&gt;size;</div><div class='del'>-	int regnum = obj-&gt;fence_reg;</div><div class='ctx'> 	uint64_t val;</div><div class='ctx'> </div><div class='del'>-	val = (uint64_t)((obj-&gt;gtt_offset + size - 4096) &amp;</div><div class='del'>-			 0xfffff000) &lt;&lt; 32;</div><div class='del'>-	val |= obj-&gt;gtt_offset &amp; 0xfffff000;</div><div class='del'>-	val |= (uint64_t)((obj-&gt;stride / 128) - 1) &lt;&lt;</div><div class='del'>-		SANDYBRIDGE_FENCE_PITCH_SHIFT;</div><div class='del'>-</div><div class='del'>-	if (obj-&gt;tiling_mode == I915_TILING_Y)</div><div class='del'>-		val |= 1 &lt;&lt; I965_FENCE_TILING_Y_SHIFT;</div><div class='del'>-	val |= I965_FENCE_REG_VALID;</div><div class='add'>+	if (obj) {</div><div class='add'>+		u32 size = obj-&gt;gtt_space-&gt;size;</div><div class='ctx'> </div><div class='del'>-	if (pipelined) {</div><div class='del'>-		int ret = intel_ring_begin(pipelined, 6);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+		val = (uint64_t)((obj-&gt;gtt_offset + size - 4096) &amp;</div><div class='add'>+				 0xfffff000) &lt;&lt; 32;</div><div class='add'>+		val |= obj-&gt;gtt_offset &amp; 0xfffff000;</div><div class='add'>+		val |= (uint64_t)((obj-&gt;stride / 128) - 1) &lt;&lt;</div><div class='add'>+			SANDYBRIDGE_FENCE_PITCH_SHIFT;</div><div class='ctx'> </div><div class='del'>-		intel_ring_emit(pipelined, MI_NOOP);</div><div class='del'>-		intel_ring_emit(pipelined, MI_LOAD_REGISTER_IMM(2));</div><div class='del'>-		intel_ring_emit(pipelined, FENCE_REG_SANDYBRIDGE_0 + regnum*8);</div><div class='del'>-		intel_ring_emit(pipelined, (u32)val);</div><div class='del'>-		intel_ring_emit(pipelined, FENCE_REG_SANDYBRIDGE_0 + regnum*8 + 4);</div><div class='del'>-		intel_ring_emit(pipelined, (u32)(val &gt;&gt; 32));</div><div class='del'>-		intel_ring_advance(pipelined);</div><div class='add'>+		if (obj-&gt;tiling_mode == I915_TILING_Y)</div><div class='add'>+			val |= 1 &lt;&lt; I965_FENCE_TILING_Y_SHIFT;</div><div class='add'>+		val |= I965_FENCE_REG_VALID;</div><div class='ctx'> 	} else</div><div class='del'>-		I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + regnum * 8, val);</div><div class='add'>+		val = 0;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + reg * 8, val);</div><div class='add'>+	POSTING_READ(FENCE_REG_SANDYBRIDGE_0 + reg * 8);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int i965_write_fence_reg(struct drm_i915_gem_object *obj,</div><div class='del'>-				struct intel_ring_buffer *pipelined)</div><div class='add'>+static void i965_write_fence_reg(struct drm_device *dev, int reg,</div><div class='add'>+				 struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = obj-&gt;base.dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 size = obj-&gt;gtt_space-&gt;size;</div><div class='del'>-	int regnum = obj-&gt;fence_reg;</div><div class='ctx'> 	uint64_t val;</div><div class='ctx'> </div><div class='del'>-	val = (uint64_t)((obj-&gt;gtt_offset + size - 4096) &amp;</div><div class='del'>-		    0xfffff000) &lt;&lt; 32;</div><div class='del'>-	val |= obj-&gt;gtt_offset &amp; 0xfffff000;</div><div class='del'>-	val |= ((obj-&gt;stride / 128) - 1) &lt;&lt; I965_FENCE_PITCH_SHIFT;</div><div class='del'>-	if (obj-&gt;tiling_mode == I915_TILING_Y)</div><div class='del'>-		val |= 1 &lt;&lt; I965_FENCE_TILING_Y_SHIFT;</div><div class='del'>-	val |= I965_FENCE_REG_VALID;</div><div class='del'>-</div><div class='del'>-	if (pipelined) {</div><div class='del'>-		int ret = intel_ring_begin(pipelined, 6);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+	if (obj) {</div><div class='add'>+		u32 size = obj-&gt;gtt_space-&gt;size;</div><div class='ctx'> </div><div class='del'>-		intel_ring_emit(pipelined, MI_NOOP);</div><div class='del'>-		intel_ring_emit(pipelined, MI_LOAD_REGISTER_IMM(2));</div><div class='del'>-		intel_ring_emit(pipelined, FENCE_REG_965_0 + regnum*8);</div><div class='del'>-		intel_ring_emit(pipelined, (u32)val);</div><div class='del'>-		intel_ring_emit(pipelined, FENCE_REG_965_0 + regnum*8 + 4);</div><div class='del'>-		intel_ring_emit(pipelined, (u32)(val &gt;&gt; 32));</div><div class='del'>-		intel_ring_advance(pipelined);</div><div class='add'>+		val = (uint64_t)((obj-&gt;gtt_offset + size - 4096) &amp;</div><div class='add'>+				 0xfffff000) &lt;&lt; 32;</div><div class='add'>+		val |= obj-&gt;gtt_offset &amp; 0xfffff000;</div><div class='add'>+		val |= ((obj-&gt;stride / 128) - 1) &lt;&lt; I965_FENCE_PITCH_SHIFT;</div><div class='add'>+		if (obj-&gt;tiling_mode == I915_TILING_Y)</div><div class='add'>+			val |= 1 &lt;&lt; I965_FENCE_TILING_Y_SHIFT;</div><div class='add'>+		val |= I965_FENCE_REG_VALID;</div><div class='ctx'> 	} else</div><div class='del'>-		I915_WRITE64(FENCE_REG_965_0 + regnum * 8, val);</div><div class='add'>+		val = 0;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	I915_WRITE64(FENCE_REG_965_0 + reg * 8, val);</div><div class='add'>+	POSTING_READ(FENCE_REG_965_0 + reg * 8);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int i915_write_fence_reg(struct drm_i915_gem_object *obj,</div><div class='del'>-				struct intel_ring_buffer *pipelined)</div><div class='add'>+static void i915_write_fence_reg(struct drm_device *dev, int reg,</div><div class='add'>+				 struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = obj-&gt;base.dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 size = obj-&gt;gtt_space-&gt;size;</div><div class='del'>-	u32 fence_reg, val, pitch_val;</div><div class='del'>-	int tile_width;</div><div class='del'>-</div><div class='del'>-	if (WARN((obj-&gt;gtt_offset &amp; ~I915_FENCE_START_MASK) ||</div><div class='del'>-		 (size &amp; -size) != size ||</div><div class='del'>-		 (obj-&gt;gtt_offset &amp; (size - 1)),</div><div class='del'>-		 "object 0x%08x [fenceable? %d] not 1M or pot-size (0x%08x) aligned\n",</div><div class='del'>-		 obj-&gt;gtt_offset, obj-&gt;map_and_fenceable, size))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	u32 val;</div><div class='ctx'> </div><div class='del'>-	if (obj-&gt;tiling_mode == I915_TILING_Y &amp;&amp; HAS_128_BYTE_Y_TILING(dev))</div><div class='del'>-		tile_width = 128;</div><div class='del'>-	else</div><div class='del'>-		tile_width = 512;</div><div class='del'>-</div><div class='del'>-	/* Note: pitch better be a power of two tile widths */</div><div class='del'>-	pitch_val = obj-&gt;stride / tile_width;</div><div class='del'>-	pitch_val = ffs(pitch_val) - 1;</div><div class='del'>-</div><div class='del'>-	val = obj-&gt;gtt_offset;</div><div class='del'>-	if (obj-&gt;tiling_mode == I915_TILING_Y)</div><div class='del'>-		val |= 1 &lt;&lt; I830_FENCE_TILING_Y_SHIFT;</div><div class='del'>-	val |= I915_FENCE_SIZE_BITS(size);</div><div class='del'>-	val |= pitch_val &lt;&lt; I830_FENCE_PITCH_SHIFT;</div><div class='del'>-	val |= I830_FENCE_REG_VALID;</div><div class='del'>-</div><div class='del'>-	fence_reg = obj-&gt;fence_reg;</div><div class='del'>-	if (fence_reg &lt; 8)</div><div class='del'>-		fence_reg = FENCE_REG_830_0 + fence_reg * 4;</div><div class='del'>-	else</div><div class='del'>-		fence_reg = FENCE_REG_945_8 + (fence_reg - 8) * 4;</div><div class='add'>+	if (obj) {</div><div class='add'>+		u32 size = obj-&gt;gtt_space-&gt;size;</div><div class='add'>+		int pitch_val;</div><div class='add'>+		int tile_width;</div><div class='ctx'> </div><div class='del'>-	if (pipelined) {</div><div class='del'>-		int ret = intel_ring_begin(pipelined, 4);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+		WARN((obj-&gt;gtt_offset &amp; ~I915_FENCE_START_MASK) ||</div><div class='add'>+		     (size &amp; -size) != size ||</div><div class='add'>+		     (obj-&gt;gtt_offset &amp; (size - 1)),</div><div class='add'>+		     "object 0x%08x [fenceable? %d] not 1M or pot-size (0x%08x) aligned\n",</div><div class='add'>+		     obj-&gt;gtt_offset, obj-&gt;map_and_fenceable, size);</div><div class='ctx'> </div><div class='del'>-		intel_ring_emit(pipelined, MI_NOOP);</div><div class='del'>-		intel_ring_emit(pipelined, MI_LOAD_REGISTER_IMM(1));</div><div class='del'>-		intel_ring_emit(pipelined, fence_reg);</div><div class='del'>-		intel_ring_emit(pipelined, val);</div><div class='del'>-		intel_ring_advance(pipelined);</div><div class='add'>+		if (obj-&gt;tiling_mode == I915_TILING_Y &amp;&amp; HAS_128_BYTE_Y_TILING(dev))</div><div class='add'>+			tile_width = 128;</div><div class='add'>+		else</div><div class='add'>+			tile_width = 512;</div><div class='add'>+</div><div class='add'>+		/* Note: pitch better be a power of two tile widths */</div><div class='add'>+		pitch_val = obj-&gt;stride / tile_width;</div><div class='add'>+		pitch_val = ffs(pitch_val) - 1;</div><div class='add'>+</div><div class='add'>+		val = obj-&gt;gtt_offset;</div><div class='add'>+		if (obj-&gt;tiling_mode == I915_TILING_Y)</div><div class='add'>+			val |= 1 &lt;&lt; I830_FENCE_TILING_Y_SHIFT;</div><div class='add'>+		val |= I915_FENCE_SIZE_BITS(size);</div><div class='add'>+		val |= pitch_val &lt;&lt; I830_FENCE_PITCH_SHIFT;</div><div class='add'>+		val |= I830_FENCE_REG_VALID;</div><div class='ctx'> 	} else</div><div class='del'>-		I915_WRITE(fence_reg, val);</div><div class='add'>+		val = 0;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	if (reg &lt; 8)</div><div class='add'>+		reg = FENCE_REG_830_0 + reg * 4;</div><div class='add'>+	else</div><div class='add'>+		reg = FENCE_REG_945_8 + (reg - 8) * 4;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(reg, val);</div><div class='add'>+	POSTING_READ(reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int i830_write_fence_reg(struct drm_i915_gem_object *obj,</div><div class='del'>-				struct intel_ring_buffer *pipelined)</div><div class='add'>+static void i830_write_fence_reg(struct drm_device *dev, int reg,</div><div class='add'>+				struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = obj-&gt;base.dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 size = obj-&gt;gtt_space-&gt;size;</div><div class='del'>-	int regnum = obj-&gt;fence_reg;</div><div class='ctx'> 	uint32_t val;</div><div class='del'>-	uint32_t pitch_val;</div><div class='ctx'> </div><div class='del'>-	if (WARN((obj-&gt;gtt_offset &amp; ~I830_FENCE_START_MASK) ||</div><div class='del'>-		 (size &amp; -size) != size ||</div><div class='del'>-		 (obj-&gt;gtt_offset &amp; (size - 1)),</div><div class='del'>-		 "object 0x%08x not 512K or pot-size 0x%08x aligned\n",</div><div class='del'>-		 obj-&gt;gtt_offset, size))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	pitch_val = obj-&gt;stride / 128;</div><div class='del'>-	pitch_val = ffs(pitch_val) - 1;</div><div class='del'>-</div><div class='del'>-	val = obj-&gt;gtt_offset;</div><div class='del'>-	if (obj-&gt;tiling_mode == I915_TILING_Y)</div><div class='del'>-		val |= 1 &lt;&lt; I830_FENCE_TILING_Y_SHIFT;</div><div class='del'>-	val |= I830_FENCE_SIZE_BITS(size);</div><div class='del'>-	val |= pitch_val &lt;&lt; I830_FENCE_PITCH_SHIFT;</div><div class='del'>-	val |= I830_FENCE_REG_VALID;</div><div class='add'>+	if (obj) {</div><div class='add'>+		u32 size = obj-&gt;gtt_space-&gt;size;</div><div class='add'>+		uint32_t pitch_val;</div><div class='add'>+</div><div class='add'>+		WARN((obj-&gt;gtt_offset &amp; ~I830_FENCE_START_MASK) ||</div><div class='add'>+		     (size &amp; -size) != size ||</div><div class='add'>+		     (obj-&gt;gtt_offset &amp; (size - 1)),</div><div class='add'>+		     "object 0x%08x not 512K or pot-size 0x%08x aligned\n",</div><div class='add'>+		     obj-&gt;gtt_offset, size);</div><div class='add'>+</div><div class='add'>+		pitch_val = obj-&gt;stride / 128;</div><div class='add'>+		pitch_val = ffs(pitch_val) - 1;</div><div class='add'>+</div><div class='add'>+		val = obj-&gt;gtt_offset;</div><div class='add'>+		if (obj-&gt;tiling_mode == I915_TILING_Y)</div><div class='add'>+			val |= 1 &lt;&lt; I830_FENCE_TILING_Y_SHIFT;</div><div class='add'>+		val |= I830_FENCE_SIZE_BITS(size);</div><div class='add'>+		val |= pitch_val &lt;&lt; I830_FENCE_PITCH_SHIFT;</div><div class='add'>+		val |= I830_FENCE_REG_VALID;</div><div class='add'>+	} else</div><div class='add'>+		val = 0;</div><div class='ctx'> </div><div class='del'>-	if (pipelined) {</div><div class='del'>-		int ret = intel_ring_begin(pipelined, 4);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+	I915_WRITE(FENCE_REG_830_0 + reg * 4, val);</div><div class='add'>+	POSTING_READ(FENCE_REG_830_0 + reg * 4);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		intel_ring_emit(pipelined, MI_NOOP);</div><div class='del'>-		intel_ring_emit(pipelined, MI_LOAD_REGISTER_IMM(1));</div><div class='del'>-		intel_ring_emit(pipelined, FENCE_REG_830_0 + regnum*4);</div><div class='del'>-		intel_ring_emit(pipelined, val);</div><div class='del'>-		intel_ring_advance(pipelined);</div><div class='del'>-	} else</div><div class='del'>-		I915_WRITE(FENCE_REG_830_0 + regnum * 4, val);</div><div class='add'>+static void i915_gem_write_fence(struct drm_device *dev, int reg,</div><div class='add'>+				 struct drm_i915_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	switch (INTEL_INFO(dev)-&gt;gen) {</div><div class='add'>+	case 7:</div><div class='add'>+	case 6: sandybridge_write_fence_reg(dev, reg, obj); break;</div><div class='add'>+	case 5:</div><div class='add'>+	case 4: i965_write_fence_reg(dev, reg, obj); break;</div><div class='add'>+	case 3: i915_write_fence_reg(dev, reg, obj); break;</div><div class='add'>+	case 2: i830_write_fence_reg(dev, reg, obj); break;</div><div class='add'>+	default: break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+static inline int fence_number(struct drm_i915_private *dev_priv,</div><div class='add'>+			       struct drm_i915_fence_reg *fence)</div><div class='add'>+{</div><div class='add'>+	return fence - dev_priv-&gt;fence_regs;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool ring_passed_seqno(struct intel_ring_buffer *ring, u32 seqno)</div><div class='add'>+static void i915_gem_object_update_fence(struct drm_i915_gem_object *obj,</div><div class='add'>+					 struct drm_i915_fence_reg *fence,</div><div class='add'>+					 bool enable)</div><div class='ctx'> {</div><div class='del'>-	return i915_seqno_passed(ring-&gt;get_seqno(ring), seqno);</div><div class='add'>+	struct drm_i915_private *dev_priv = obj-&gt;base.dev-&gt;dev_private;</div><div class='add'>+	int reg = fence_number(dev_priv, fence);</div><div class='add'>+</div><div class='add'>+	i915_gem_write_fence(obj-&gt;base.dev, reg, enable ? obj : NULL);</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		obj-&gt;fence_reg = reg;</div><div class='add'>+		fence-&gt;obj = obj;</div><div class='add'>+		list_move_tail(&amp;fence-&gt;lru_list, &amp;dev_priv-&gt;mm.fence_list);</div><div class='add'>+	} else {</div><div class='add'>+		obj-&gt;fence_reg = I915_FENCE_REG_NONE;</div><div class='add'>+		fence-&gt;obj = NULL;</div><div class='add'>+		list_del_init(&amp;fence-&gt;lru_list);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-i915_gem_object_flush_fence(struct drm_i915_gem_object *obj,</div><div class='del'>-			    struct intel_ring_buffer *pipelined)</div><div class='add'>+i915_gem_object_flush_fence(struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (obj-&gt;fenced_gpu_access) {</div><div class='ctx'> 		if (obj-&gt;base.write_domain &amp; I915_GEM_GPU_DOMAINS) {</div><div class='del'>-			ret = i915_gem_flush_ring(obj-&gt;last_fenced_ring,</div><div class='add'>+			ret = i915_gem_flush_ring(obj-&gt;ring,</div><div class='ctx'> 						  0, obj-&gt;base.write_domain);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='hunk'>@@ -2369,18 +2363,12 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj,</div><div class='ctx'> 		obj-&gt;fenced_gpu_access = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (obj-&gt;last_fenced_seqno &amp;&amp; pipelined != obj-&gt;last_fenced_ring) {</div><div class='del'>-		if (!ring_passed_seqno(obj-&gt;last_fenced_ring,</div><div class='del'>-				       obj-&gt;last_fenced_seqno)) {</div><div class='del'>-			ret = i915_wait_request(obj-&gt;last_fenced_ring,</div><div class='del'>-						obj-&gt;last_fenced_seqno,</div><div class='del'>-						true);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-		}</div><div class='add'>+	if (obj-&gt;last_fenced_seqno) {</div><div class='add'>+		ret = i915_wait_request(obj-&gt;ring, obj-&gt;last_fenced_seqno);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		obj-&gt;last_fenced_seqno = 0;</div><div class='del'>-		obj-&gt;last_fenced_ring = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure that all CPU reads are completed before installing a fence</div><div class='hunk'>@@ -2395,34 +2383,29 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj,</div><div class='ctx'> int</div><div class='ctx'> i915_gem_object_put_fence(struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *dev_priv = obj-&gt;base.dev-&gt;dev_private;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (obj-&gt;tiling_mode)</div><div class='del'>-		i915_gem_release_mmap(obj);</div><div class='del'>-</div><div class='del'>-	ret = i915_gem_object_flush_fence(obj, NULL);</div><div class='add'>+	ret = i915_gem_object_flush_fence(obj);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (obj-&gt;fence_reg != I915_FENCE_REG_NONE) {</div><div class='del'>-		struct drm_i915_private *dev_priv = obj-&gt;base.dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-		WARN_ON(dev_priv-&gt;fence_regs[obj-&gt;fence_reg].pin_count);</div><div class='del'>-		i915_gem_clear_fence_reg(obj-&gt;base.dev,</div><div class='del'>-					 &amp;dev_priv-&gt;fence_regs[obj-&gt;fence_reg]);</div><div class='add'>+	if (obj-&gt;fence_reg == I915_FENCE_REG_NONE)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-		obj-&gt;fence_reg = I915_FENCE_REG_NONE;</div><div class='del'>-	}</div><div class='add'>+	i915_gem_object_update_fence(obj,</div><div class='add'>+				     &amp;dev_priv-&gt;fence_regs[obj-&gt;fence_reg],</div><div class='add'>+				     false);</div><div class='add'>+	i915_gem_object_fence_lost(obj);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct drm_i915_fence_reg *</div><div class='del'>-i915_find_fence_reg(struct drm_device *dev,</div><div class='del'>-		    struct intel_ring_buffer *pipelined)</div><div class='add'>+i915_find_fence_reg(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_i915_fence_reg *reg, *first, *avail;</div><div class='add'>+	struct drm_i915_fence_reg *reg, *avail;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* First try to find a free reg */</div><div class='hunk'>@@ -2440,204 +2423,77 @@ i915_find_fence_reg(struct drm_device *dev,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* None available, try to steal one or wait for a user to finish */</div><div class='del'>-	avail = first = NULL;</div><div class='ctx'> 	list_for_each_entry(reg, &amp;dev_priv-&gt;mm.fence_list, lru_list) {</div><div class='ctx'> 		if (reg-&gt;pin_count)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (first == NULL)</div><div class='del'>-			first = reg;</div><div class='del'>-</div><div class='del'>-		if (!pipelined ||</div><div class='del'>-		    !reg-&gt;obj-&gt;last_fenced_ring ||</div><div class='del'>-		    reg-&gt;obj-&gt;last_fenced_ring == pipelined) {</div><div class='del'>-			avail = reg;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+		return reg;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (avail == NULL)</div><div class='del'>-		avail = first;</div><div class='del'>-</div><div class='del'>-	return avail;</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i915_gem_object_get_fence - set up a fence reg for an object</div><div class='add'>+ * i915_gem_object_get_fence - set up fencing for an object</div><div class='ctx'>  * @obj: object to map through a fence reg</div><div class='del'>- * @pipelined: ring on which to queue the change, or NULL for CPU access</div><div class='del'>- * @interruptible: must we wait uninterruptibly for the register to retire?</div><div class='ctx'>  *</div><div class='ctx'>  * When mapping objects through the GTT, userspace wants to be able to write</div><div class='ctx'>  * to them without having to worry about swizzling if the object is tiled.</div><div class='del'>- *</div><div class='ctx'>  * This function walks the fence regs looking for a free one for @obj,</div><div class='ctx'>  * stealing one if it can't find any.</div><div class='ctx'>  *</div><div class='ctx'>  * It then sets up the reg based on the object's properties: address, pitch</div><div class='ctx'>  * and tiling format.</div><div class='add'>+ *</div><div class='add'>+ * For an untiled surface, this removes any existing fence.</div><div class='ctx'>  */</div><div class='ctx'> int</div><div class='del'>-i915_gem_object_get_fence(struct drm_i915_gem_object *obj,</div><div class='del'>-			  struct intel_ring_buffer *pipelined)</div><div class='add'>+i915_gem_object_get_fence(struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = obj-&gt;base.dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	bool enable = obj-&gt;tiling_mode != I915_TILING_NONE;</div><div class='ctx'> 	struct drm_i915_fence_reg *reg;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/* XXX disable pipelining. There are bugs. Shocking. */</div><div class='del'>-	pipelined = NULL;</div><div class='add'>+	/* Have we updated the tiling parameters upon the object and so</div><div class='add'>+	 * will need to serialise the write to the associated fence register?</div><div class='add'>+	 */</div><div class='add'>+	if (obj-&gt;fence_dirty) {</div><div class='add'>+		ret = i915_gem_object_flush_fence(obj);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Just update our place in the LRU if our fence is getting reused. */</div><div class='ctx'> 	if (obj-&gt;fence_reg != I915_FENCE_REG_NONE) {</div><div class='ctx'> 		reg = &amp;dev_priv-&gt;fence_regs[obj-&gt;fence_reg];</div><div class='del'>-		list_move_tail(&amp;reg-&gt;lru_list, &amp;dev_priv-&gt;mm.fence_list);</div><div class='del'>-</div><div class='del'>-		if (obj-&gt;tiling_changed) {</div><div class='del'>-			ret = i915_gem_object_flush_fence(obj, pipelined);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-</div><div class='del'>-			if (!obj-&gt;fenced_gpu_access &amp;&amp; !obj-&gt;last_fenced_seqno)</div><div class='del'>-				pipelined = NULL;</div><div class='del'>-</div><div class='del'>-			if (pipelined) {</div><div class='del'>-				reg-&gt;setup_seqno =</div><div class='del'>-					i915_gem_next_request_seqno(pipelined);</div><div class='del'>-				obj-&gt;last_fenced_seqno = reg-&gt;setup_seqno;</div><div class='del'>-				obj-&gt;last_fenced_ring = pipelined;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			goto update;</div><div class='add'>+		if (!obj-&gt;fence_dirty) {</div><div class='add'>+			list_move_tail(&amp;reg-&gt;lru_list,</div><div class='add'>+				       &amp;dev_priv-&gt;mm.fence_list);</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='add'>+	} else if (enable) {</div><div class='add'>+		reg = i915_find_fence_reg(dev);</div><div class='add'>+		if (reg == NULL)</div><div class='add'>+			return -EDEADLK;</div><div class='ctx'> </div><div class='del'>-		if (!pipelined) {</div><div class='del'>-			if (reg-&gt;setup_seqno) {</div><div class='del'>-				if (!ring_passed_seqno(obj-&gt;last_fenced_ring,</div><div class='del'>-						       reg-&gt;setup_seqno)) {</div><div class='del'>-					ret = i915_wait_request(obj-&gt;last_fenced_ring,</div><div class='del'>-								reg-&gt;setup_seqno,</div><div class='del'>-								true);</div><div class='del'>-					if (ret)</div><div class='del'>-						return ret;</div><div class='del'>-				}</div><div class='add'>+		if (reg-&gt;obj) {</div><div class='add'>+			struct drm_i915_gem_object *old = reg-&gt;obj;</div><div class='ctx'> </div><div class='del'>-				reg-&gt;setup_seqno = 0;</div><div class='del'>-			}</div><div class='del'>-		} else if (obj-&gt;last_fenced_ring &amp;&amp;</div><div class='del'>-			   obj-&gt;last_fenced_ring != pipelined) {</div><div class='del'>-			ret = i915_gem_object_flush_fence(obj, pipelined);</div><div class='add'>+			ret = i915_gem_object_flush_fence(old);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	reg = i915_find_fence_reg(dev, pipelined);</div><div class='del'>-	if (reg == NULL)</div><div class='del'>-		return -EDEADLK;</div><div class='del'>-</div><div class='del'>-	ret = i915_gem_object_flush_fence(obj, pipelined);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (reg-&gt;obj) {</div><div class='del'>-		struct drm_i915_gem_object *old = reg-&gt;obj;</div><div class='del'>-</div><div class='del'>-		drm_gem_object_reference(&amp;old-&gt;base);</div><div class='del'>-</div><div class='del'>-		if (old-&gt;tiling_mode)</div><div class='del'>-			i915_gem_release_mmap(old);</div><div class='ctx'> </div><div class='del'>-		ret = i915_gem_object_flush_fence(old, pipelined);</div><div class='del'>-		if (ret) {</div><div class='del'>-			drm_gem_object_unreference(&amp;old-&gt;base);</div><div class='del'>-			return ret;</div><div class='add'>+			i915_gem_object_fence_lost(old);</div><div class='ctx'> 		}</div><div class='add'>+	} else</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-		if (old-&gt;last_fenced_seqno == 0 &amp;&amp; obj-&gt;last_fenced_seqno == 0)</div><div class='del'>-			pipelined = NULL;</div><div class='del'>-</div><div class='del'>-		old-&gt;fence_reg = I915_FENCE_REG_NONE;</div><div class='del'>-		old-&gt;last_fenced_ring = pipelined;</div><div class='del'>-		old-&gt;last_fenced_seqno =</div><div class='del'>-			pipelined ? i915_gem_next_request_seqno(pipelined) : 0;</div><div class='del'>-</div><div class='del'>-		drm_gem_object_unreference(&amp;old-&gt;base);</div><div class='del'>-	} else if (obj-&gt;last_fenced_seqno == 0)</div><div class='del'>-		pipelined = NULL;</div><div class='del'>-</div><div class='del'>-	reg-&gt;obj = obj;</div><div class='del'>-	list_move_tail(&amp;reg-&gt;lru_list, &amp;dev_priv-&gt;mm.fence_list);</div><div class='del'>-	obj-&gt;fence_reg = reg - dev_priv-&gt;fence_regs;</div><div class='del'>-	obj-&gt;last_fenced_ring = pipelined;</div><div class='del'>-</div><div class='del'>-	reg-&gt;setup_seqno =</div><div class='del'>-		pipelined ? i915_gem_next_request_seqno(pipelined) : 0;</div><div class='del'>-	obj-&gt;last_fenced_seqno = reg-&gt;setup_seqno;</div><div class='del'>-</div><div class='del'>-update:</div><div class='del'>-	obj-&gt;tiling_changed = false;</div><div class='del'>-	switch (INTEL_INFO(dev)-&gt;gen) {</div><div class='del'>-	case 7:</div><div class='del'>-	case 6:</div><div class='del'>-		ret = sandybridge_write_fence_reg(obj, pipelined);</div><div class='del'>-		break;</div><div class='del'>-	case 5:</div><div class='del'>-	case 4:</div><div class='del'>-		ret = i965_write_fence_reg(obj, pipelined);</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-		ret = i915_write_fence_reg(obj, pipelined);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		ret = i830_write_fence_reg(obj, pipelined);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i915_gem_clear_fence_reg - clear out fence register info</div><div class='del'>- * @obj: object to clear</div><div class='del'>- *</div><div class='del'>- * Zeroes out the fence register itself and clears out the associated</div><div class='del'>- * data structures in dev_priv and obj.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-i915_gem_clear_fence_reg(struct drm_device *dev,</div><div class='del'>-			 struct drm_i915_fence_reg *reg)</div><div class='del'>-{</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t fence_reg = reg - dev_priv-&gt;fence_regs;</div><div class='del'>-</div><div class='del'>-	switch (INTEL_INFO(dev)-&gt;gen) {</div><div class='del'>-	case 7:</div><div class='del'>-	case 6:</div><div class='del'>-		I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + fence_reg*8, 0);</div><div class='del'>-		break;</div><div class='del'>-	case 5:</div><div class='del'>-	case 4:</div><div class='del'>-		I915_WRITE64(FENCE_REG_965_0 + fence_reg*8, 0);</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-		if (fence_reg &gt;= 8)</div><div class='del'>-			fence_reg = FENCE_REG_945_8 + (fence_reg - 8) * 4;</div><div class='del'>-		else</div><div class='del'>-	case 2:</div><div class='del'>-			fence_reg = FENCE_REG_830_0 + fence_reg * 4;</div><div class='del'>-</div><div class='del'>-		I915_WRITE(fence_reg, 0);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	i915_gem_object_update_fence(obj, reg, enable);</div><div class='add'>+	obj-&gt;fence_dirty = false;</div><div class='ctx'> </div><div class='del'>-	list_del_init(&amp;reg-&gt;lru_list);</div><div class='del'>-	reg-&gt;obj = NULL;</div><div class='del'>-	reg-&gt;setup_seqno = 0;</div><div class='del'>-	reg-&gt;pin_count = 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2749,7 +2605,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = i915_gem_gtt_bind_object(obj);</div><div class='add'>+	ret = i915_gem_gtt_prepare_object(obj);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		i915_gem_object_put_pages_gtt(obj);</div><div class='ctx'> 		drm_mm_put_block(obj-&gt;gtt_space);</div><div class='hunk'>@@ -2761,6 +2617,9 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,</div><div class='ctx'> 		goto search_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!dev_priv-&gt;mm.aliasing_ppgtt)</div><div class='add'>+		i915_gem_gtt_bind_object(obj, obj-&gt;cache_level);</div><div class='add'>+</div><div class='ctx'> 	list_add_tail(&amp;obj-&gt;gtt_list, &amp;dev_priv-&gt;mm.gtt_list);</div><div class='ctx'> 	list_add_tail(&amp;obj-&gt;mm_list, &amp;dev_priv-&gt;mm.inactive_list);</div><div class='ctx'> </div><div class='hunk'>@@ -2878,6 +2737,7 @@ i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj)</div><div class='ctx'> int</div><div class='ctx'> i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)</div><div class='ctx'> {</div><div class='add'>+	drm_i915_private_t *dev_priv = obj-&gt;base.dev-&gt;dev_private;</div><div class='ctx'> 	uint32_t old_write_domain, old_read_domains;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -2918,6 +2778,10 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)</div><div class='ctx'> 					    old_read_domains,</div><div class='ctx'> 					    old_write_domain);</div><div class='ctx'> </div><div class='add'>+	/* And bump the LRU for this access */</div><div class='add'>+	if (i915_gem_object_is_inactive(obj))</div><div class='add'>+		list_move_tail(&amp;obj-&gt;mm_list, &amp;dev_priv-&gt;mm.inactive_list);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2953,7 +2817,8 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,</div><div class='ctx'> 				return ret;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		i915_gem_gtt_rebind_object(obj, cache_level);</div><div class='add'>+		if (obj-&gt;has_global_gtt_mapping)</div><div class='add'>+			i915_gem_gtt_bind_object(obj, cache_level);</div><div class='ctx'> 		if (obj-&gt;has_aliasing_ppgtt_mapping)</div><div class='ctx'> 			i915_ppgtt_bind_object(dev_priv-&gt;mm.aliasing_ppgtt,</div><div class='ctx'> 					       obj, cache_level);</div><div class='hunk'>@@ -2990,11 +2855,6 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,</div><div class='ctx'>  * Prepare buffer for display plane (scanout, cursors, etc).</div><div class='ctx'>  * Can be called from an uninterruptible phase (modesetting) and allows</div><div class='ctx'>  * any flushes to be pipelined (for pageflips).</div><div class='del'>- *</div><div class='del'>- * For the display plane, we want to be in the GTT but out of any write</div><div class='del'>- * domains. So in many ways this looks like set_to_gtt_domain() apart from the</div><div class='del'>- * ability to pipeline the waits, pinning and any additional subtleties</div><div class='del'>- * that may differentiate the display plane from ordinary buffers.</div><div class='ctx'>  */</div><div class='ctx'> int</div><div class='ctx'> i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,</div><div class='hunk'>@@ -3009,8 +2869,8 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (pipelined != obj-&gt;ring) {</div><div class='del'>-		ret = i915_gem_object_wait_rendering(obj);</div><div class='del'>-		if (ret == -ERESTARTSYS)</div><div class='add'>+		ret = i915_gem_object_sync(obj, pipelined);</div><div class='add'>+		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3082,7 +2942,7 @@ i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj)</div><div class='ctx'>  * This function returns when the move is complete, including waiting on</div><div class='ctx'>  * flushes to occur.</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='add'>+int</div><div class='ctx'> i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t old_write_domain, old_read_domains;</div><div class='hunk'>@@ -3095,17 +2955,14 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = i915_gem_object_wait_rendering(obj);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (write || obj-&gt;pending_gpu_write) {</div><div class='add'>+		ret = i915_gem_object_wait_rendering(obj);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	i915_gem_object_flush_gtt_write_domain(obj);</div><div class='ctx'> </div><div class='del'>-	/* If we have a partially-valid cache of the object in the CPU,</div><div class='del'>-	 * finish invalidating it and free the per-page flags.</div><div class='del'>-	 */</div><div class='del'>-	i915_gem_object_set_to_full_cpu_read_domain(obj);</div><div class='del'>-</div><div class='ctx'> 	old_write_domain = obj-&gt;base.write_domain;</div><div class='ctx'> 	old_read_domains = obj-&gt;base.read_domains;</div><div class='ctx'> </div><div class='hunk'>@@ -3136,113 +2993,6 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * Moves the object from a partially CPU read to a full one.</div><div class='del'>- *</div><div class='del'>- * Note that this only resolves i915_gem_object_set_cpu_read_domain_range(),</div><div class='del'>- * and doesn't handle transitioning from !(read_domains &amp; I915_GEM_DOMAIN_CPU).</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-i915_gem_object_set_to_full_cpu_read_domain(struct drm_i915_gem_object *obj)</div><div class='del'>-{</div><div class='del'>-	if (!obj-&gt;page_cpu_valid)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* If we're partially in the CPU read domain, finish moving it in.</div><div class='del'>-	 */</div><div class='del'>-	if (obj-&gt;base.read_domains &amp; I915_GEM_DOMAIN_CPU) {</div><div class='del'>-		int i;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt;= (obj-&gt;base.size - 1) / PAGE_SIZE; i++) {</div><div class='del'>-			if (obj-&gt;page_cpu_valid[i])</div><div class='del'>-				continue;</div><div class='del'>-			drm_clflush_pages(obj-&gt;pages + i, 1);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Free the page_cpu_valid mappings which are now stale, whether</div><div class='del'>-	 * or not we've got I915_GEM_DOMAIN_CPU.</div><div class='del'>-	 */</div><div class='del'>-	kfree(obj-&gt;page_cpu_valid);</div><div class='del'>-	obj-&gt;page_cpu_valid = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * Set the CPU read domain on a range of the object.</div><div class='del'>- *</div><div class='del'>- * The object ends up with I915_GEM_DOMAIN_CPU in its read flags although it's</div><div class='del'>- * not entirely valid.  The page_cpu_valid member of the object flags which</div><div class='del'>- * pages have been flushed, and will be respected by</div><div class='del'>- * i915_gem_object_set_to_cpu_domain() if it's called on to get a valid mapping</div><div class='del'>- * of the whole object.</div><div class='del'>- *</div><div class='del'>- * This function returns when the move is complete, including waiting on</div><div class='del'>- * flushes to occur.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-i915_gem_object_set_cpu_read_domain_range(struct drm_i915_gem_object *obj,</div><div class='del'>-					  uint64_t offset, uint64_t size)</div><div class='del'>-{</div><div class='del'>-	uint32_t old_read_domains;</div><div class='del'>-	int i, ret;</div><div class='del'>-</div><div class='del'>-	if (offset == 0 &amp;&amp; size == obj-&gt;base.size)</div><div class='del'>-		return i915_gem_object_set_to_cpu_domain(obj, 0);</div><div class='del'>-</div><div class='del'>-	ret = i915_gem_object_flush_gpu_write_domain(obj);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = i915_gem_object_wait_rendering(obj);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	i915_gem_object_flush_gtt_write_domain(obj);</div><div class='del'>-</div><div class='del'>-	/* If we're already fully in the CPU read domain, we're done. */</div><div class='del'>-	if (obj-&gt;page_cpu_valid == NULL &amp;&amp;</div><div class='del'>-	    (obj-&gt;base.read_domains &amp; I915_GEM_DOMAIN_CPU) != 0)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Otherwise, create/clear the per-page CPU read domain flag if we're</div><div class='del'>-	 * newly adding I915_GEM_DOMAIN_CPU</div><div class='del'>-	 */</div><div class='del'>-	if (obj-&gt;page_cpu_valid == NULL) {</div><div class='del'>-		obj-&gt;page_cpu_valid = kzalloc(obj-&gt;base.size / PAGE_SIZE,</div><div class='del'>-					      GFP_KERNEL);</div><div class='del'>-		if (obj-&gt;page_cpu_valid == NULL)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-	} else if ((obj-&gt;base.read_domains &amp; I915_GEM_DOMAIN_CPU) == 0)</div><div class='del'>-		memset(obj-&gt;page_cpu_valid, 0, obj-&gt;base.size / PAGE_SIZE);</div><div class='del'>-</div><div class='del'>-	/* Flush the cache on any pages that are still invalid from the CPU's</div><div class='del'>-	 * perspective.</div><div class='del'>-	 */</div><div class='del'>-	for (i = offset / PAGE_SIZE; i &lt;= (offset + size - 1) / PAGE_SIZE;</div><div class='del'>-	     i++) {</div><div class='del'>-		if (obj-&gt;page_cpu_valid[i])</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		drm_clflush_pages(obj-&gt;pages + i, 1);</div><div class='del'>-</div><div class='del'>-		obj-&gt;page_cpu_valid[i] = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* It should now be out of any other write domains, and we can update</div><div class='del'>-	 * the domain values for our changes.</div><div class='del'>-	 */</div><div class='del'>-	BUG_ON((obj-&gt;base.write_domain &amp; ~I915_GEM_DOMAIN_CPU) != 0);</div><div class='del'>-</div><div class='del'>-	old_read_domains = obj-&gt;base.read_domains;</div><div class='del'>-	obj-&gt;base.read_domains |= I915_GEM_DOMAIN_CPU;</div><div class='del'>-</div><div class='del'>-	trace_i915_gem_object_change_domain(obj,</div><div class='del'>-					    old_read_domains,</div><div class='del'>-					    obj-&gt;base.write_domain);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Throttle our rendering by waiting until the ring has completed our requests</div><div class='ctx'>  * emitted over 20 msec ago.</div><div class='ctx'>  *</div><div class='hunk'>@@ -3280,28 +3030,7 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file)</div><div class='ctx'> 	if (seqno == 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = 0;</div><div class='del'>-	if (!i915_seqno_passed(ring-&gt;get_seqno(ring), seqno)) {</div><div class='del'>-		/* And wait for the seqno passing without holding any locks and</div><div class='del'>-		 * causing extra latency for others. This is safe as the irq</div><div class='del'>-		 * generation is designed to be run atomically and so is</div><div class='del'>-		 * lockless.</div><div class='del'>-		 */</div><div class='del'>-		if (ring-&gt;irq_get(ring)) {</div><div class='del'>-			ret = wait_event_interruptible(ring-&gt;irq_queue,</div><div class='del'>-						       i915_seqno_passed(ring-&gt;get_seqno(ring), seqno)</div><div class='del'>-						       || atomic_read(&amp;dev_priv-&gt;mm.wedged));</div><div class='del'>-			ring-&gt;irq_put(ring);</div><div class='del'>-</div><div class='del'>-			if (ret == 0 &amp;&amp; atomic_read(&amp;dev_priv-&gt;mm.wedged))</div><div class='del'>-				ret = -EIO;</div><div class='del'>-		} else if (wait_for_atomic(i915_seqno_passed(ring-&gt;get_seqno(ring),</div><div class='del'>-							     seqno) ||</div><div class='del'>-				    atomic_read(&amp;dev_priv-&gt;mm.wedged), 3000)) {</div><div class='del'>-			ret = -EBUSY;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	ret = __wait_seqno(ring, seqno, true);</div><div class='ctx'> 	if (ret == 0)</div><div class='ctx'> 		queue_delayed_work(dev_priv-&gt;wq, &amp;dev_priv-&gt;mm.retire_work, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -3313,12 +3042,9 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,</div><div class='ctx'> 		    uint32_t alignment,</div><div class='ctx'> 		    bool map_and_fenceable)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = obj-&gt;base.dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(obj-&gt;pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNT);</div><div class='del'>-	WARN_ON(i915_verify_lists(dev));</div><div class='ctx'> </div><div class='ctx'> 	if (obj-&gt;gtt_space != NULL) {</div><div class='ctx'> 		if ((alignment &amp;&amp; obj-&gt;gtt_offset &amp; (alignment - 1)) ||</div><div class='hunk'>@@ -3343,34 +3069,23 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (obj-&gt;pin_count++ == 0) {</div><div class='del'>-		if (!obj-&gt;active)</div><div class='del'>-			list_move_tail(&amp;obj-&gt;mm_list,</div><div class='del'>-				       &amp;dev_priv-&gt;mm.pinned_list);</div><div class='del'>-	}</div><div class='add'>+	if (!obj-&gt;has_global_gtt_mapping &amp;&amp; map_and_fenceable)</div><div class='add'>+		i915_gem_gtt_bind_object(obj, obj-&gt;cache_level);</div><div class='add'>+</div><div class='add'>+	obj-&gt;pin_count++;</div><div class='ctx'> 	obj-&gt;pin_mappable |= map_and_fenceable;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(i915_verify_lists(dev));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void</div><div class='ctx'> i915_gem_object_unpin(struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = obj-&gt;base.dev;</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	WARN_ON(i915_verify_lists(dev));</div><div class='ctx'> 	BUG_ON(obj-&gt;pin_count == 0);</div><div class='ctx'> 	BUG_ON(obj-&gt;gtt_space == NULL);</div><div class='ctx'> </div><div class='del'>-	if (--obj-&gt;pin_count == 0) {</div><div class='del'>-		if (!obj-&gt;active)</div><div class='del'>-			list_move_tail(&amp;obj-&gt;mm_list,</div><div class='del'>-				       &amp;dev_priv-&gt;mm.inactive_list);</div><div class='add'>+	if (--obj-&gt;pin_count == 0)</div><div class='ctx'> 		obj-&gt;pin_mappable = false;</div><div class='del'>-	}</div><div class='del'>-	WARN_ON(i915_verify_lists(dev));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='hunk'>@@ -3494,20 +3209,9 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		if (obj-&gt;base.write_domain &amp; I915_GEM_GPU_DOMAINS) {</div><div class='ctx'> 			ret = i915_gem_flush_ring(obj-&gt;ring,</div><div class='ctx'> 						  0, obj-&gt;base.write_domain);</div><div class='del'>-		} else if (obj-&gt;ring-&gt;outstanding_lazy_request ==</div><div class='del'>-			   obj-&gt;last_rendering_seqno) {</div><div class='del'>-			struct drm_i915_gem_request *request;</div><div class='del'>-</div><div class='del'>-			/* This ring is not being cleared by active usage,</div><div class='del'>-			 * so emit a request to do so.</div><div class='del'>-			 */</div><div class='del'>-			request = kzalloc(sizeof(*request), GFP_KERNEL);</div><div class='del'>-			if (request) {</div><div class='del'>-				ret = i915_add_request(obj-&gt;ring, NULL, request);</div><div class='del'>-				if (ret)</div><div class='del'>-					kfree(request);</div><div class='del'>-			} else</div><div class='del'>-				ret = -ENOMEM;</div><div class='add'>+		} else {</div><div class='add'>+			ret = i915_gem_check_olr(obj-&gt;ring,</div><div class='add'>+						 obj-&gt;last_rendering_seqno);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Update the active list for the hardware's current position.</div><div class='hunk'>@@ -3587,6 +3291,7 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev,</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='ctx'> 	struct address_space *mapping;</div><div class='add'>+	u32 mask;</div><div class='ctx'> </div><div class='ctx'> 	obj = kzalloc(sizeof(*obj), GFP_KERNEL);</div><div class='ctx'> 	if (obj == NULL)</div><div class='hunk'>@@ -3597,8 +3302,15 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mask = GFP_HIGHUSER | __GFP_RECLAIMABLE;</div><div class='add'>+	if (IS_CRESTLINE(dev) || IS_BROADWATER(dev)) {</div><div class='add'>+		/* 965gm cannot relocate objects above 4GiB. */</div><div class='add'>+		mask &amp;= ~__GFP_HIGHMEM;</div><div class='add'>+		mask |= __GFP_DMA32;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mapping = obj-&gt;base.filp-&gt;f_path.dentry-&gt;d_inode-&gt;i_mapping;</div><div class='del'>-	mapping_set_gfp_mask(mapping, GFP_HIGHUSER | __GFP_RECLAIMABLE);</div><div class='add'>+	mapping_set_gfp_mask(mapping, mask);</div><div class='ctx'> </div><div class='ctx'> 	i915_gem_info_add_obj(dev_priv, size);</div><div class='ctx'> </div><div class='hunk'>@@ -3643,46 +3355,42 @@ int i915_gem_init_object(struct drm_gem_object *obj)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void i915_gem_free_object_tail(struct drm_i915_gem_object *obj)</div><div class='add'>+void i915_gem_free_object(struct drm_gem_object *gem_obj)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);</div><div class='ctx'> 	struct drm_device *dev = obj-&gt;base.dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = i915_gem_object_unbind(obj);</div><div class='del'>-	if (ret == -ERESTARTSYS) {</div><div class='del'>-		list_move(&amp;obj-&gt;mm_list,</div><div class='del'>-			  &amp;dev_priv-&gt;mm.deferred_free_list);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	trace_i915_gem_object_destroy(obj);</div><div class='ctx'> </div><div class='add'>+	if (gem_obj-&gt;import_attach)</div><div class='add'>+		drm_prime_gem_destroy(gem_obj, obj-&gt;sg_table);</div><div class='add'>+</div><div class='add'>+	if (obj-&gt;phys_obj)</div><div class='add'>+		i915_gem_detach_phys_object(dev, obj);</div><div class='add'>+</div><div class='add'>+	obj-&gt;pin_count = 0;</div><div class='add'>+	if (WARN_ON(i915_gem_object_unbind(obj) == -ERESTARTSYS)) {</div><div class='add'>+		bool was_interruptible;</div><div class='add'>+</div><div class='add'>+		was_interruptible = dev_priv-&gt;mm.interruptible;</div><div class='add'>+		dev_priv-&gt;mm.interruptible = false;</div><div class='add'>+</div><div class='add'>+		WARN_ON(i915_gem_object_unbind(obj));</div><div class='add'>+</div><div class='add'>+		dev_priv-&gt;mm.interruptible = was_interruptible;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (obj-&gt;base.map_list.map)</div><div class='ctx'> 		drm_gem_free_mmap_offset(&amp;obj-&gt;base);</div><div class='ctx'> </div><div class='ctx'> 	drm_gem_object_release(&amp;obj-&gt;base);</div><div class='ctx'> 	i915_gem_info_remove_obj(dev_priv, obj-&gt;base.size);</div><div class='ctx'> </div><div class='del'>-	kfree(obj-&gt;page_cpu_valid);</div><div class='ctx'> 	kfree(obj-&gt;bit_17);</div><div class='ctx'> 	kfree(obj);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void i915_gem_free_object(struct drm_gem_object *gem_obj)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);</div><div class='del'>-	struct drm_device *dev = obj-&gt;base.dev;</div><div class='del'>-</div><div class='del'>-	while (obj-&gt;pin_count &gt; 0)</div><div class='del'>-		i915_gem_object_unpin(obj);</div><div class='del'>-</div><div class='del'>-	if (obj-&gt;phys_obj)</div><div class='del'>-		i915_gem_detach_phys_object(dev, obj);</div><div class='del'>-</div><div class='del'>-	i915_gem_free_object_tail(obj);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int</div><div class='ctx'> i915_gem_idle(struct drm_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -3696,20 +3404,16 @@ i915_gem_idle(struct drm_device *dev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = i915_gpu_idle(dev, true);</div><div class='add'>+	ret = i915_gpu_idle(dev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='add'>+	i915_gem_retire_requests(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Under UMS, be paranoid and evict. */</div><div class='del'>-	if (!drm_core_check_feature(dev, DRIVER_MODESET)) {</div><div class='del'>-		ret = i915_gem_evict_inactive(dev, false);</div><div class='del'>-		if (ret) {</div><div class='del'>-			mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		i915_gem_evict_everything(dev, false);</div><div class='ctx'> </div><div class='ctx'> 	i915_gem_reset_fences(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -3747,9 +3451,9 @@ void i915_gem_init_swizzling(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	I915_WRITE(TILECTL, I915_READ(TILECTL) | TILECTL_SWZCTL);</div><div class='ctx'> 	if (IS_GEN6(dev))</div><div class='del'>-		I915_WRITE(ARB_MODE, ARB_MODE_ENABLE(ARB_MODE_SWIZZLE_SNB));</div><div class='add'>+		I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_SNB));</div><div class='ctx'> 	else</div><div class='del'>-		I915_WRITE(ARB_MODE, ARB_MODE_ENABLE(ARB_MODE_SWIZZLE_IVB));</div><div class='add'>+		I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_IVB));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void i915_gem_init_ppgtt(struct drm_device *dev)</div><div class='hunk'>@@ -3787,21 +3491,27 @@ void i915_gem_init_ppgtt(struct drm_device *dev)</div><div class='ctx'> 	pd_offset &lt;&lt;= 16;</div><div class='ctx'> </div><div class='ctx'> 	if (INTEL_INFO(dev)-&gt;gen == 6) {</div><div class='del'>-		uint32_t ecochk = I915_READ(GAM_ECOCHK);</div><div class='add'>+		uint32_t ecochk, gab_ctl, ecobits;</div><div class='add'>+</div><div class='add'>+		ecobits = I915_READ(GAC_ECO_BITS); </div><div class='add'>+		I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_PPGTT_CACHE64B);</div><div class='add'>+</div><div class='add'>+		gab_ctl = I915_READ(GAB_CTL);</div><div class='add'>+		I915_WRITE(GAB_CTL, gab_ctl | GAB_CTL_CONT_AFTER_PAGEFAULT);</div><div class='add'>+</div><div class='add'>+		ecochk = I915_READ(GAM_ECOCHK);</div><div class='ctx'> 		I915_WRITE(GAM_ECOCHK, ecochk | ECOCHK_SNB_BIT |</div><div class='ctx'> 				       ECOCHK_PPGTT_CACHE64B);</div><div class='del'>-		I915_WRITE(GFX_MODE, GFX_MODE_ENABLE(GFX_PPGTT_ENABLE));</div><div class='add'>+		I915_WRITE(GFX_MODE, _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE));</div><div class='ctx'> 	} else if (INTEL_INFO(dev)-&gt;gen &gt;= 7) {</div><div class='ctx'> 		I915_WRITE(GAM_ECOCHK, ECOCHK_PPGTT_CACHE64B);</div><div class='ctx'> 		/* GFX_MODE is per-ring on gen7+ */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; I915_NUM_RINGS; i++) {</div><div class='del'>-		ring = &amp;dev_priv-&gt;ring[i];</div><div class='del'>-</div><div class='add'>+	for_each_ring(ring, dev_priv, i) {</div><div class='ctx'> 		if (INTEL_INFO(dev)-&gt;gen &gt;= 7)</div><div class='ctx'> 			I915_WRITE(RING_MODE_GEN7(ring),</div><div class='del'>-				   GFX_MODE_ENABLE(GFX_PPGTT_ENABLE));</div><div class='add'>+				   _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE));</div><div class='ctx'> </div><div class='ctx'> 		I915_WRITE(RING_PP_DIR_DCLV(ring), PP_DIR_DCLV_2G);</div><div class='ctx'> 		I915_WRITE(RING_PP_DIR_BASE(ring), pd_offset);</div><div class='hunk'>@@ -3845,14 +3555,80 @@ cleanup_render_ring:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool</div><div class='add'>+intel_enable_ppgtt(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	if (i915_enable_ppgtt &gt;= 0)</div><div class='add'>+		return i915_enable_ppgtt;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_INTEL_IOMMU</div><div class='add'>+	/* Disable ppgtt on SNB if VT-d is on. */</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen == 6 &amp;&amp; intel_iommu_gfx_mapped)</div><div class='add'>+		return false;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int i915_gem_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	unsigned long gtt_size, mappable_size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	gtt_size = dev_priv-&gt;mm.gtt-&gt;gtt_total_entries &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	mappable_size = dev_priv-&gt;mm.gtt-&gt;gtt_mappable_entries &lt;&lt; PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	if (intel_enable_ppgtt(dev) &amp;&amp; HAS_ALIASING_PPGTT(dev)) {</div><div class='add'>+		/* PPGTT pdes are stolen from global gtt ptes, so shrink the</div><div class='add'>+		 * aperture accordingly when using aliasing ppgtt. */</div><div class='add'>+		gtt_size -= I915_PPGTT_PD_ENTRIES*PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+		i915_gem_init_global_gtt(dev, 0, mappable_size, gtt_size);</div><div class='add'>+</div><div class='add'>+		ret = i915_gem_init_aliasing_ppgtt(dev);</div><div class='add'>+		if (ret) {</div><div class='add'>+			mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* Let GEM Manage all of the aperture.</div><div class='add'>+		 *</div><div class='add'>+		 * However, leave one page at the end still bound to the scratch</div><div class='add'>+		 * page.  There are a number of places where the hardware</div><div class='add'>+		 * apparently prefetches past the end of the object, and we've</div><div class='add'>+		 * seen multiple hangs with the GPU head pointer stuck in a</div><div class='add'>+		 * batchbuffer bound at the last page of the aperture.  One page</div><div class='add'>+		 * should be enough to keep any prefetching inside of the</div><div class='add'>+		 * aperture.</div><div class='add'>+		 */</div><div class='add'>+		i915_gem_init_global_gtt(dev, 0, mappable_size,</div><div class='add'>+					 gtt_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = i915_gem_init_hw(dev);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	if (ret) {</div><div class='add'>+		i915_gem_cleanup_aliasing_ppgtt(dev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Allow hardware batchbuffers unless told otherwise, but not for KMS. */</div><div class='add'>+	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		dev_priv-&gt;dri1.allow_batchbuffer = 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void</div><div class='ctx'> i915_gem_cleanup_ringbuffer(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_ring_buffer *ring;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; I915_NUM_RINGS; i++)</div><div class='del'>-		intel_cleanup_ring_buffer(&amp;dev_priv-&gt;ring[i]);</div><div class='add'>+	for_each_ring(ring, dev_priv, i)</div><div class='add'>+		intel_cleanup_ring_buffer(ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='hunk'>@@ -3860,7 +3636,7 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		       struct drm_file *file_priv)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int ret, i;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -3882,10 +3658,6 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	BUG_ON(!list_empty(&amp;dev_priv-&gt;mm.active_list));</div><div class='ctx'> 	BUG_ON(!list_empty(&amp;dev_priv-&gt;mm.flushing_list));</div><div class='ctx'> 	BUG_ON(!list_empty(&amp;dev_priv-&gt;mm.inactive_list));</div><div class='del'>-	for (i = 0; i &lt; I915_NUM_RINGS; i++) {</div><div class='del'>-		BUG_ON(!list_empty(&amp;dev_priv-&gt;ring[i].active_list));</div><div class='del'>-		BUG_ON(!list_empty(&amp;dev_priv-&gt;ring[i].request_list));</div><div class='del'>-	}</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='ctx'> 	ret = drm_irq_install(dev);</div><div class='hunk'>@@ -3944,9 +3716,7 @@ i915_gem_load(struct drm_device *dev)</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;dev_priv-&gt;mm.active_list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;dev_priv-&gt;mm.flushing_list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;dev_priv-&gt;mm.inactive_list);</div><div class='del'>-	INIT_LIST_HEAD(&amp;dev_priv-&gt;mm.pinned_list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;dev_priv-&gt;mm.fence_list);</div><div class='del'>-	INIT_LIST_HEAD(&amp;dev_priv-&gt;mm.deferred_free_list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;dev_priv-&gt;mm.gtt_list);</div><div class='ctx'> 	for (i = 0; i &lt; I915_NUM_RINGS; i++)</div><div class='ctx'> 		init_ring_lists(&amp;dev_priv-&gt;ring[i]);</div><div class='hunk'>@@ -3958,12 +3728,8 @@ i915_gem_load(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* On GEN3 we really need to make sure the ARB C3 LP bit is set */</div><div class='ctx'> 	if (IS_GEN3(dev)) {</div><div class='del'>-		u32 tmp = I915_READ(MI_ARB_STATE);</div><div class='del'>-		if (!(tmp &amp; MI_ARB_C3_LP_WRITE_ENABLE)) {</div><div class='del'>-			/* arb state is a masked write, so set bit + bit in mask */</div><div class='del'>-			tmp = MI_ARB_C3_LP_WRITE_ENABLE | (MI_ARB_C3_LP_WRITE_ENABLE &lt;&lt; MI_ARB_MASK_SHIFT);</div><div class='del'>-			I915_WRITE(MI_ARB_STATE, tmp);</div><div class='del'>-		}</div><div class='add'>+		I915_WRITE(MI_ARB_STATE,</div><div class='add'>+			   _MASKED_BIT_ENABLE(MI_ARB_C3_LP_WRITE_ENABLE));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_priv-&gt;relative_constants_mode = I915_EXEC_CONSTANTS_REL_GENERAL;</div><div class='hunk'>@@ -3978,9 +3744,7 @@ i915_gem_load(struct drm_device *dev)</div><div class='ctx'> 		dev_priv-&gt;num_fence_regs = 8;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize fence registers to zero */</div><div class='del'>-	for (i = 0; i &lt; dev_priv-&gt;num_fence_regs; i++) {</div><div class='del'>-		i915_gem_clear_fence_reg(dev, &amp;dev_priv-&gt;fence_regs[i]);</div><div class='del'>-	}</div><div class='add'>+	i915_gem_reset_fences(dev);</div><div class='ctx'> </div><div class='ctx'> 	i915_gem_detect_bit_6_swizzle(dev);</div><div class='ctx'> 	init_waitqueue_head(&amp;dev_priv-&gt;pending_flip_queue);</div><div class='hunk'>@@ -4268,7 +4032,7 @@ rescan:</div><div class='ctx'> 		 * This has a dramatic impact to reduce the number of</div><div class='ctx'> 		 * OOM-killer events whilst running the GPU aggressively.</div><div class='ctx'> 		 */</div><div class='del'>-		if (i915_gpu_idle(dev, true) == 0)</div><div class='add'>+		if (i915_gpu_idle(dev) == 0)</div><div class='ctx'> 			goto rescan;</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_gem_debug.c b/drivers/gpu/drm/i915/i915_gem_debug.c<br/>index cc93cac242d6..a4f6aaabca99 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem_debug.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_gem_debug.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem_debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_debug.c</a></div><div class='hunk'>@@ -114,22 +114,6 @@ i915_verify_lists(struct drm_device *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(obj, &amp;dev_priv-&gt;mm.pinned_list, list) {</div><div class='del'>-		if (obj-&gt;base.dev != dev ||</div><div class='del'>-		    !atomic_read(&amp;obj-&gt;base.refcount.refcount)) {</div><div class='del'>-			DRM_ERROR("freed pinned %p\n", obj);</div><div class='del'>-			err++;</div><div class='del'>-			break;</div><div class='del'>-		} else if (!obj-&gt;pin_count || obj-&gt;active ||</div><div class='del'>-			   (obj-&gt;base.write_domain &amp; I915_GEM_GPU_DOMAINS)) {</div><div class='del'>-			DRM_ERROR("invalid pinned %p (p %d a %d w %x)\n",</div><div class='del'>-				  obj,</div><div class='del'>-				  obj-&gt;pin_count, obj-&gt;active,</div><div class='del'>-				  obj-&gt;base.write_domain);</div><div class='del'>-			err++;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return warned = err;</div><div class='ctx'> }</div><div class='ctx'> #endif /* WATCH_INACTIVE */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c<br/>new file mode 100644<br/>index 000000000000..aa308e1337db<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem_dmabuf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_dmabuf.c</a></div><div class='hunk'>@@ -0,0 +1,232 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the next</div><div class='add'>+ * paragraph) shall be included in all copies or substantial portions of the</div><div class='add'>+ * Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER</div><div class='add'>+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER</div><div class='add'>+ * DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors:</div><div class='add'>+ *	Dave Airlie &lt;airlied@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "i915_drv.h"</div><div class='add'>+#include &lt;linux/dma-buf.h&gt;</div><div class='add'>+</div><div class='add'>+static struct sg_table *i915_gem_map_dma_buf(struct dma_buf_attachment *attachment,</div><div class='add'>+				      enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_gem_object *obj = attachment-&gt;dmabuf-&gt;priv;</div><div class='add'>+	struct drm_device *dev = obj-&gt;base.dev;</div><div class='add'>+	int npages = obj-&gt;base.size / PAGE_SIZE;</div><div class='add'>+	struct sg_table *sg = NULL;</div><div class='add'>+	int ret;</div><div class='add'>+	int nents;</div><div class='add'>+</div><div class='add'>+	ret = i915_mutex_lock_interruptible(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+</div><div class='add'>+	if (!obj-&gt;pages) {</div><div class='add'>+		ret = i915_gem_object_get_pages_gtt(obj, __GFP_NORETRY | __GFP_NOWARN);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* link the pages into an SG then map the sg */</div><div class='add'>+	sg = drm_prime_pages_to_sg(obj-&gt;pages, npages);</div><div class='add'>+	nents = dma_map_sg(attachment-&gt;dev, sg-&gt;sgl, sg-&gt;nents, dir);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	return sg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,</div><div class='add'>+			    struct sg_table *sg, enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	dma_unmap_sg(attachment-&gt;dev, sg-&gt;sgl, sg-&gt;nents, dir);</div><div class='add'>+	sg_free_table(sg);</div><div class='add'>+	kfree(sg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i915_gem_dmabuf_release(struct dma_buf *dma_buf)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_gem_object *obj = dma_buf-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (obj-&gt;base.export_dma_buf == dma_buf) {</div><div class='add'>+		/* drop the reference on the export fd holds */</div><div class='add'>+		obj-&gt;base.export_dma_buf = NULL;</div><div class='add'>+		drm_gem_object_unreference_unlocked(&amp;obj-&gt;base);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *i915_gem_dmabuf_vmap(struct dma_buf *dma_buf)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_gem_object *obj = dma_buf-&gt;priv;</div><div class='add'>+	struct drm_device *dev = obj-&gt;base.dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = i915_mutex_lock_interruptible(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+</div><div class='add'>+	if (obj-&gt;dma_buf_vmapping) {</div><div class='add'>+		obj-&gt;vmapping_count++;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!obj-&gt;pages) {</div><div class='add'>+		ret = i915_gem_object_get_pages_gtt(obj, __GFP_NORETRY | __GFP_NOWARN);</div><div class='add'>+		if (ret) {</div><div class='add'>+			mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+			return ERR_PTR(ret);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	obj-&gt;dma_buf_vmapping = vmap(obj-&gt;pages, obj-&gt;base.size / PAGE_SIZE, 0, PAGE_KERNEL);</div><div class='add'>+	if (!obj-&gt;dma_buf_vmapping) {</div><div class='add'>+		DRM_ERROR("failed to vmap object\n");</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	obj-&gt;vmapping_count = 1;</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	return obj-&gt;dma_buf_vmapping;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i915_gem_dmabuf_vunmap(struct dma_buf *dma_buf, void *vaddr)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_gem_object *obj = dma_buf-&gt;priv;</div><div class='add'>+	struct drm_device *dev = obj-&gt;base.dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = i915_mutex_lock_interruptible(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	--obj-&gt;vmapping_count;</div><div class='add'>+	if (obj-&gt;vmapping_count == 0) {</div><div class='add'>+		vunmap(obj-&gt;dma_buf_vmapping);</div><div class='add'>+		obj-&gt;dma_buf_vmapping = NULL;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *i915_gem_dmabuf_kmap_atomic(struct dma_buf *dma_buf, unsigned long page_num)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i915_gem_dmabuf_kunmap_atomic(struct dma_buf *dma_buf, unsigned long page_num, void *addr)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+static void *i915_gem_dmabuf_kmap(struct dma_buf *dma_buf, unsigned long page_num)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i915_gem_dmabuf_kunmap(struct dma_buf *dma_buf, unsigned long page_num, void *addr)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int i915_gem_dmabuf_mmap(struct dma_buf *dma_buf, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dma_buf_ops i915_dmabuf_ops =  {</div><div class='add'>+	.map_dma_buf = i915_gem_map_dma_buf,</div><div class='add'>+	.unmap_dma_buf = i915_gem_unmap_dma_buf,</div><div class='add'>+	.release = i915_gem_dmabuf_release,</div><div class='add'>+	.kmap = i915_gem_dmabuf_kmap,</div><div class='add'>+	.kmap_atomic = i915_gem_dmabuf_kmap_atomic,</div><div class='add'>+	.kunmap = i915_gem_dmabuf_kunmap,</div><div class='add'>+	.kunmap_atomic = i915_gem_dmabuf_kunmap_atomic,</div><div class='add'>+	.mmap = i915_gem_dmabuf_mmap,</div><div class='add'>+	.vmap = i915_gem_dmabuf_vmap,</div><div class='add'>+	.vunmap = i915_gem_dmabuf_vunmap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dma_buf *i915_gem_prime_export(struct drm_device *dev,</div><div class='add'>+				struct drm_gem_object *gem_obj, int flags)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);</div><div class='add'>+</div><div class='add'>+	return dma_buf_export(obj, &amp;i915_dmabuf_ops,</div><div class='add'>+						  obj-&gt;base.size, 0600);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,</div><div class='add'>+				struct dma_buf *dma_buf)</div><div class='add'>+{</div><div class='add'>+	struct dma_buf_attachment *attach;</div><div class='add'>+	struct sg_table *sg;</div><div class='add'>+	struct drm_i915_gem_object *obj;</div><div class='add'>+	int npages;</div><div class='add'>+	int size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* is this one of own objects? */</div><div class='add'>+	if (dma_buf-&gt;ops == &amp;i915_dmabuf_ops) {</div><div class='add'>+		obj = dma_buf-&gt;priv;</div><div class='add'>+		/* is it from our device? */</div><div class='add'>+		if (obj-&gt;base.dev == dev) {</div><div class='add'>+			drm_gem_object_reference(&amp;obj-&gt;base);</div><div class='add'>+			return &amp;obj-&gt;base;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* need to attach */</div><div class='add'>+	attach = dma_buf_attach(dma_buf, dev-&gt;dev);</div><div class='add'>+	if (IS_ERR(attach))</div><div class='add'>+		return ERR_CAST(attach);</div><div class='add'>+</div><div class='add'>+	sg = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);</div><div class='add'>+	if (IS_ERR(sg)) {</div><div class='add'>+		ret = PTR_ERR(sg);</div><div class='add'>+		goto fail_detach;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = dma_buf-&gt;size;</div><div class='add'>+	npages = size / PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	obj = kzalloc(sizeof(*obj), GFP_KERNEL);</div><div class='add'>+	if (obj == NULL) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto fail_unmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = drm_gem_private_object_init(dev, &amp;obj-&gt;base, size);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(obj);</div><div class='add'>+		goto fail_unmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	obj-&gt;sg_table = sg;</div><div class='add'>+	obj-&gt;base.import_attach = attach;</div><div class='add'>+</div><div class='add'>+	return &amp;obj-&gt;base;</div><div class='add'>+</div><div class='add'>+fail_unmap:</div><div class='add'>+	dma_buf_unmap_attachment(attach, sg, DMA_BIDIRECTIONAL);</div><div class='add'>+fail_detach:</div><div class='add'>+	dma_buf_detach(dma_buf, attach);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c<br/>index 21a82710f4b2..ae7c24e12e52 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem_evict.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_gem_evict.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem_evict.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_evict.c</a></div><div class='hunk'>@@ -35,6 +35,9 @@</div><div class='ctx'> static bool</div><div class='ctx'> mark_free(struct drm_i915_gem_object *obj, struct list_head *unwind)</div><div class='ctx'> {</div><div class='add'>+	if (obj-&gt;pin_count)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	list_add(&amp;obj-&gt;exec_list, unwind);</div><div class='ctx'> 	return drm_mm_scan_add_block(obj-&gt;gtt_space);</div><div class='ctx'> }</div><div class='hunk'>@@ -90,7 +93,7 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,</div><div class='ctx'> 	/* Now merge in the soon-to-be-expired objects... */</div><div class='ctx'> 	list_for_each_entry(obj, &amp;dev_priv-&gt;mm.active_list, mm_list) {</div><div class='ctx'> 		/* Does the object require an outstanding flush? */</div><div class='del'>-		if (obj-&gt;base.write_domain || obj-&gt;pin_count)</div><div class='add'>+		if (obj-&gt;base.write_domain)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (mark_free(obj, &amp;unwind_list))</div><div class='hunk'>@@ -99,14 +102,11 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,</div><div class='ctx'> </div><div class='ctx'> 	/* Finally add anything with a pending flush (in order of retirement) */</div><div class='ctx'> 	list_for_each_entry(obj, &amp;dev_priv-&gt;mm.flushing_list, mm_list) {</div><div class='del'>-		if (obj-&gt;pin_count)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='ctx'> 		if (mark_free(obj, &amp;unwind_list))</div><div class='ctx'> 			goto found;</div><div class='ctx'> 	}</div><div class='ctx'> 	list_for_each_entry(obj, &amp;dev_priv-&gt;mm.active_list, mm_list) {</div><div class='del'>-		if (!obj-&gt;base.write_domain || obj-&gt;pin_count)</div><div class='add'>+		if (!obj-&gt;base.write_domain)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (mark_free(obj, &amp;unwind_list))</div><div class='hunk'>@@ -166,8 +166,9 @@ int</div><div class='ctx'> i915_gem_evict_everything(struct drm_device *dev, bool purgeable_only)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int ret;</div><div class='add'>+	struct drm_i915_gem_object *obj, *next;</div><div class='ctx'> 	bool lists_empty;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	lists_empty = (list_empty(&amp;dev_priv-&gt;mm.inactive_list) &amp;&amp;</div><div class='ctx'> 		       list_empty(&amp;dev_priv-&gt;mm.flushing_list) &amp;&amp;</div><div class='hunk'>@@ -177,29 +178,24 @@ i915_gem_evict_everything(struct drm_device *dev, bool purgeable_only)</div><div class='ctx'> </div><div class='ctx'> 	trace_i915_gem_evict_everything(dev, purgeable_only);</div><div class='ctx'> </div><div class='del'>-	/* Flush everything (on to the inactive lists) and evict */</div><div class='del'>-	ret = i915_gpu_idle(dev, true);</div><div class='add'>+	/* The gpu_idle will flush everything in the write domain to the</div><div class='add'>+	 * active list. Then we must move everything off the active list</div><div class='add'>+	 * with retire requests.</div><div class='add'>+	 */</div><div class='add'>+	ret = i915_gpu_idle(dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!list_empty(&amp;dev_priv-&gt;mm.flushing_list));</div><div class='add'>+	i915_gem_retire_requests(dev);</div><div class='ctx'> </div><div class='del'>-	return i915_gem_evict_inactive(dev, purgeable_only);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/** Unbinds all inactive objects. */</div><div class='del'>-int</div><div class='del'>-i915_gem_evict_inactive(struct drm_device *dev, bool purgeable_only)</div><div class='del'>-{</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_i915_gem_object *obj, *next;</div><div class='add'>+	BUG_ON(!list_empty(&amp;dev_priv-&gt;mm.flushing_list));</div><div class='ctx'> </div><div class='add'>+	/* Having flushed everything, unbind() should never raise an error */</div><div class='ctx'> 	list_for_each_entry_safe(obj, next,</div><div class='ctx'> 				 &amp;dev_priv-&gt;mm.inactive_list, mm_list) {</div><div class='ctx'> 		if (!purgeable_only || obj-&gt;madv != I915_MADV_WILLNEED) {</div><div class='del'>-			int ret = i915_gem_object_unbind(obj);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='add'>+			if (obj-&gt;pin_count == 0)</div><div class='add'>+				WARN_ON(i915_gem_object_unbind(obj));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c<br/>index de431942ded4..974a9f1068a3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem_execbuffer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_gem_execbuffer.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem_execbuffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_execbuffer.c</a></div><div class='hunk'>@@ -266,6 +266,12 @@ eb_destroy(struct eb_objects *eb)</div><div class='ctx'> 	kfree(eb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	return (obj-&gt;base.write_domain == I915_GEM_DOMAIN_CPU ||</div><div class='add'>+		obj-&gt;cache_level != I915_CACHE_NONE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,</div><div class='ctx'> 				   struct eb_objects *eb,</div><div class='hunk'>@@ -273,6 +279,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = obj-&gt;base.dev;</div><div class='ctx'> 	struct drm_gem_object *target_obj;</div><div class='add'>+	struct drm_i915_gem_object *target_i915_obj;</div><div class='ctx'> 	uint32_t target_offset;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -281,7 +288,8 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,</div><div class='ctx'> 	if (unlikely(target_obj == NULL))</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='del'>-	target_offset = to_intel_bo(target_obj)-&gt;gtt_offset;</div><div class='add'>+	target_i915_obj = to_intel_bo(target_obj);</div><div class='add'>+	target_offset = target_i915_obj-&gt;gtt_offset;</div><div class='ctx'> </div><div class='ctx'> 	/* The target buffer should have appeared before us in the</div><div class='ctx'> 	 * exec_object list, so it should have a GTT space bound by now.</div><div class='hunk'>@@ -352,11 +360,19 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* We can't wait for rendering with pagefaults disabled */</div><div class='add'>+	if (obj-&gt;active &amp;&amp; in_atomic())</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='ctx'> 	reloc-&gt;delta += target_offset;</div><div class='del'>-	if (obj-&gt;base.write_domain == I915_GEM_DOMAIN_CPU) {</div><div class='add'>+	if (use_cpu_reloc(obj)) {</div><div class='ctx'> 		uint32_t page_offset = reloc-&gt;offset &amp; ~PAGE_MASK;</div><div class='ctx'> 		char *vaddr;</div><div class='ctx'> </div><div class='add'>+		ret = i915_gem_object_set_to_cpu_domain(obj, 1);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='ctx'> 		vaddr = kmap_atomic(obj-&gt;pages[reloc-&gt;offset &gt;&gt; PAGE_SHIFT]);</div><div class='ctx'> 		*(uint32_t *)(vaddr + page_offset) = reloc-&gt;delta;</div><div class='ctx'> 		kunmap_atomic(vaddr);</div><div class='hunk'>@@ -365,11 +381,11 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,</div><div class='ctx'> 		uint32_t __iomem *reloc_entry;</div><div class='ctx'> 		void __iomem *reloc_page;</div><div class='ctx'> </div><div class='del'>-		/* We can't wait for rendering with pagefaults disabled */</div><div class='del'>-		if (obj-&gt;active &amp;&amp; in_atomic())</div><div class='del'>-			return -EFAULT;</div><div class='add'>+		ret = i915_gem_object_set_to_gtt_domain(obj, true);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-		ret = i915_gem_object_set_to_gtt_domain(obj, 1);</div><div class='add'>+		ret = i915_gem_object_put_fence(obj);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -383,6 +399,16 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,</div><div class='ctx'> 		io_mapping_unmap_atomic(reloc_page);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and</div><div class='add'>+	 * pipe_control writes because the gpu doesn't properly redirect them</div><div class='add'>+	 * through the ppgtt for non_secure batchbuffers. */</div><div class='add'>+	if (unlikely(IS_GEN6(dev) &amp;&amp;</div><div class='add'>+	    reloc-&gt;write_domain == I915_GEM_DOMAIN_INSTRUCTION &amp;&amp;</div><div class='add'>+	    !target_i915_obj-&gt;has_global_gtt_mapping)) {</div><div class='add'>+		i915_gem_gtt_bind_object(target_i915_obj,</div><div class='add'>+					 target_i915_obj-&gt;cache_level);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* and update the user's relocation entry */</div><div class='ctx'> 	reloc-&gt;presumed_offset = target_offset;</div><div class='ctx'> </div><div class='hunk'>@@ -393,30 +419,46 @@ static int</div><div class='ctx'> i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,</div><div class='ctx'> 				    struct eb_objects *eb)</div><div class='ctx'> {</div><div class='add'>+#define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))</div><div class='add'>+	struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)];</div><div class='ctx'> 	struct drm_i915_gem_relocation_entry __user *user_relocs;</div><div class='ctx'> 	struct drm_i915_gem_exec_object2 *entry = obj-&gt;exec_entry;</div><div class='del'>-	int i, ret;</div><div class='add'>+	int remain, ret;</div><div class='ctx'> </div><div class='ctx'> 	user_relocs = (void __user *)(uintptr_t)entry-&gt;relocs_ptr;</div><div class='del'>-	for (i = 0; i &lt; entry-&gt;relocation_count; i++) {</div><div class='del'>-		struct drm_i915_gem_relocation_entry reloc;</div><div class='ctx'> </div><div class='del'>-		if (__copy_from_user_inatomic(&amp;reloc,</div><div class='del'>-					      user_relocs+i,</div><div class='del'>-					      sizeof(reloc)))</div><div class='add'>+	remain = entry-&gt;relocation_count;</div><div class='add'>+	while (remain) {</div><div class='add'>+		struct drm_i915_gem_relocation_entry *r = stack_reloc;</div><div class='add'>+		int count = remain;</div><div class='add'>+		if (count &gt; ARRAY_SIZE(stack_reloc))</div><div class='add'>+			count = ARRAY_SIZE(stack_reloc);</div><div class='add'>+		remain -= count;</div><div class='add'>+</div><div class='add'>+		if (__copy_from_user_inatomic(r, user_relocs, count*sizeof(r[0])))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> </div><div class='del'>-		ret = i915_gem_execbuffer_relocate_entry(obj, eb, &amp;reloc);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+		do {</div><div class='add'>+			u64 offset = r-&gt;presumed_offset;</div><div class='ctx'> </div><div class='del'>-		if (__copy_to_user_inatomic(&amp;user_relocs[i].presumed_offset,</div><div class='del'>-					    &amp;reloc.presumed_offset,</div><div class='del'>-					    sizeof(reloc.presumed_offset)))</div><div class='del'>-			return -EFAULT;</div><div class='add'>+			ret = i915_gem_execbuffer_relocate_entry(obj, eb, r);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			if (r-&gt;presumed_offset != offset &amp;&amp;</div><div class='add'>+			    __copy_to_user_inatomic(&amp;user_relocs-&gt;presumed_offset,</div><div class='add'>+						    &amp;r-&gt;presumed_offset,</div><div class='add'>+						    sizeof(r-&gt;presumed_offset))) {</div><div class='add'>+				return -EFAULT;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			user_relocs++;</div><div class='add'>+			r++;</div><div class='add'>+		} while (--count);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+#undef N_RELOC</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -465,6 +507,13 @@ i915_gem_execbuffer_relocate(struct drm_device *dev,</div><div class='ctx'> #define  __EXEC_OBJECT_HAS_FENCE (1&lt;&lt;31)</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='add'>+need_reloc_mappable(struct drm_i915_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_gem_exec_object2 *entry = obj-&gt;exec_entry;</div><div class='add'>+	return entry-&gt;relocation_count &amp;&amp; !use_cpu_reloc(obj);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='ctx'> pin_and_fence_object(struct drm_i915_gem_object *obj,</div><div class='ctx'> 		     struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='hunk'>@@ -477,8 +526,7 @@ pin_and_fence_object(struct drm_i915_gem_object *obj,</div><div class='ctx'> 		has_fenced_gpu_access &amp;&amp;</div><div class='ctx'> 		entry-&gt;flags &amp; EXEC_OBJECT_NEEDS_FENCE &amp;&amp;</div><div class='ctx'> 		obj-&gt;tiling_mode != I915_TILING_NONE;</div><div class='del'>-	need_mappable =</div><div class='del'>-		entry-&gt;relocation_count ? true : need_fence;</div><div class='add'>+	need_mappable = need_fence || need_reloc_mappable(obj);</div><div class='ctx'> </div><div class='ctx'> 	ret = i915_gem_object_pin(obj, entry-&gt;alignment, need_mappable);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -486,18 +534,13 @@ pin_and_fence_object(struct drm_i915_gem_object *obj,</div><div class='ctx'> </div><div class='ctx'> 	if (has_fenced_gpu_access) {</div><div class='ctx'> 		if (entry-&gt;flags &amp; EXEC_OBJECT_NEEDS_FENCE) {</div><div class='del'>-			if (obj-&gt;tiling_mode) {</div><div class='del'>-				ret = i915_gem_object_get_fence(obj, ring);</div><div class='del'>-				if (ret)</div><div class='del'>-					goto err_unpin;</div><div class='add'>+			ret = i915_gem_object_get_fence(obj);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto err_unpin;</div><div class='ctx'> </div><div class='add'>+			if (i915_gem_object_pin_fence(obj))</div><div class='ctx'> 				entry-&gt;flags |= __EXEC_OBJECT_HAS_FENCE;</div><div class='del'>-				i915_gem_object_pin_fence(obj);</div><div class='del'>-			} else {</div><div class='del'>-				ret = i915_gem_object_put_fence(obj);</div><div class='del'>-				if (ret)</div><div class='del'>-					goto err_unpin;</div><div class='del'>-			}</div><div class='add'>+</div><div class='ctx'> 			obj-&gt;pending_fenced_gpu_access = true;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -535,8 +578,7 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,</div><div class='ctx'> 			has_fenced_gpu_access &amp;&amp;</div><div class='ctx'> 			entry-&gt;flags &amp; EXEC_OBJECT_NEEDS_FENCE &amp;&amp;</div><div class='ctx'> 			obj-&gt;tiling_mode != I915_TILING_NONE;</div><div class='del'>-		need_mappable =</div><div class='del'>-			entry-&gt;relocation_count ? true : need_fence;</div><div class='add'>+		need_mappable = need_fence || need_reloc_mappable(obj);</div><div class='ctx'> </div><div class='ctx'> 		if (need_mappable)</div><div class='ctx'> 			list_move(&amp;obj-&gt;exec_list, &amp;ordered_objects);</div><div class='hunk'>@@ -576,8 +618,7 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,</div><div class='ctx'> 				has_fenced_gpu_access &amp;&amp;</div><div class='ctx'> 				entry-&gt;flags &amp; EXEC_OBJECT_NEEDS_FENCE &amp;&amp;</div><div class='ctx'> 				obj-&gt;tiling_mode != I915_TILING_NONE;</div><div class='del'>-			need_mappable =</div><div class='del'>-				entry-&gt;relocation_count ? true : need_fence;</div><div class='add'>+			need_mappable = need_fence || need_reloc_mappable(obj);</div><div class='ctx'> </div><div class='ctx'> 			if ((entry-&gt;alignment &amp;&amp; obj-&gt;gtt_offset &amp; (entry-&gt;alignment - 1)) ||</div><div class='ctx'> 			    (need_mappable &amp;&amp; !obj-&gt;map_and_fenceable))</div><div class='hunk'>@@ -798,64 +839,6 @@ i915_gem_execbuffer_flush(struct drm_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool</div><div class='del'>-intel_enable_semaphores(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen &lt; 6)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (i915_semaphores &gt;= 0)</div><div class='del'>-		return i915_semaphores;</div><div class='del'>-</div><div class='del'>-	/* Disable semaphores on SNB */</div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen == 6)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-i915_gem_execbuffer_sync_rings(struct drm_i915_gem_object *obj,</div><div class='del'>-			       struct intel_ring_buffer *to)</div><div class='del'>-{</div><div class='del'>-	struct intel_ring_buffer *from = obj-&gt;ring;</div><div class='del'>-	u32 seqno;</div><div class='del'>-	int ret, idx;</div><div class='del'>-</div><div class='del'>-	if (from == NULL || to == from)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* XXX gpu semaphores are implicated in various hard hangs on SNB */</div><div class='del'>-	if (!intel_enable_semaphores(obj-&gt;base.dev))</div><div class='del'>-		return i915_gem_object_wait_rendering(obj);</div><div class='del'>-</div><div class='del'>-	idx = intel_ring_sync_index(from, to);</div><div class='del'>-</div><div class='del'>-	seqno = obj-&gt;last_rendering_seqno;</div><div class='del'>-	if (seqno &lt;= from-&gt;sync_seqno[idx])</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (seqno == from-&gt;outstanding_lazy_request) {</div><div class='del'>-		struct drm_i915_gem_request *request;</div><div class='del'>-</div><div class='del'>-		request = kzalloc(sizeof(*request), GFP_KERNEL);</div><div class='del'>-		if (request == NULL)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-</div><div class='del'>-		ret = i915_add_request(from, NULL, request);</div><div class='del'>-		if (ret) {</div><div class='del'>-			kfree(request);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		seqno = request-&gt;seqno;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	from-&gt;sync_seqno[idx] = seqno;</div><div class='del'>-</div><div class='del'>-	return to-&gt;sync_to(to, from, seqno - 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int</div><div class='ctx'> i915_gem_execbuffer_wait_for_flips(struct intel_ring_buffer *ring, u32 flips)</div><div class='ctx'> {</div><div class='hunk'>@@ -917,7 +900,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(obj, objects, exec_list) {</div><div class='del'>-		ret = i915_gem_execbuffer_sync_rings(obj, ring);</div><div class='add'>+		ret = i915_gem_object_sync(obj, ring);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -955,7 +938,7 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec,</div><div class='ctx'> 		if (!access_ok(VERIFY_WRITE, ptr, length))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> </div><div class='del'>-		if (fault_in_pages_readable(ptr, length))</div><div class='add'>+		if (fault_in_multipages_readable(ptr, length))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -984,11 +967,14 @@ i915_gem_execbuffer_move_to_active(struct list_head *objects,</div><div class='ctx'> 			obj-&gt;pending_gpu_write = true;</div><div class='ctx'> 			list_move_tail(&amp;obj-&gt;gpu_write_list,</div><div class='ctx'> 				       &amp;ring-&gt;gpu_write_list);</div><div class='del'>-			intel_mark_busy(ring-&gt;dev, obj);</div><div class='add'>+			if (obj-&gt;pin_count) /* check for potential scanout */</div><div class='add'>+				intel_mark_busy(ring-&gt;dev, obj);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		trace_i915_gem_object_change_domain(obj, old_read, old_write);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	intel_mark_busy(ring-&gt;dev, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1078,17 +1064,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,</div><div class='ctx'> 		ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_EXEC_BSD:</div><div class='del'>-		if (!HAS_BSD(dev)) {</div><div class='del'>-			DRM_DEBUG("execbuf with invalid ring (BSD)\n");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='ctx'> 		ring = &amp;dev_priv-&gt;ring[VCS];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case I915_EXEC_BLT:</div><div class='del'>-		if (!HAS_BLT(dev)) {</div><div class='del'>-			DRM_DEBUG("execbuf with invalid ring (BLT)\n");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='ctx'> 		ring = &amp;dev_priv-&gt;ring[BCS];</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1096,6 +1074,11 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,</div><div class='ctx'> 			  (int)(args-&gt;flags &amp; I915_EXEC_RING_MASK));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+	if (!intel_ring_initialized(ring)) {</div><div class='add'>+		DRM_DEBUG("execbuf with invalid ring: %d\n",</div><div class='add'>+			  (int)(args-&gt;flags &amp; I915_EXEC_RING_MASK));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mode = args-&gt;flags &amp; I915_EXEC_CONSTANTS_MASK;</div><div class='ctx'> 	mask = I915_EXEC_CONSTANTS_MASK;</div><div class='hunk'>@@ -1133,11 +1116,17 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (INTEL_INFO(dev)-&gt;gen &gt;= 5) {</div><div class='add'>+			DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (args-&gt;num_cliprects &gt; UINT_MAX / sizeof(*cliprects)) {</div><div class='ctx'> 			DRM_DEBUG("execbuf with %u cliprects\n",</div><div class='ctx'> 				  args-&gt;num_cliprects);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		cliprects = kmalloc(args-&gt;num_cliprects * sizeof(*cliprects),</div><div class='ctx'> 				    GFP_KERNEL);</div><div class='ctx'> 		if (cliprects == NULL) {</div><div class='hunk'>@@ -1242,9 +1231,10 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,</div><div class='ctx'> 			 * so every billion or so execbuffers, we need to stall</div><div class='ctx'> 			 * the GPU in order to reset the counters.</div><div class='ctx'> 			 */</div><div class='del'>-			ret = i915_gpu_idle(dev, true);</div><div class='add'>+			ret = i915_gpu_idle(dev);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				goto err;</div><div class='add'>+			i915_gem_retire_requests(dev);</div><div class='ctx'> </div><div class='ctx'> 			BUG_ON(ring-&gt;sync_seqno[i]);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c<br/>index a135c61f4119..9fd25a435536 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem_gtt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_gem_gtt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem_gtt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_gtt.c</a></div><div class='hunk'>@@ -96,11 +96,10 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)</div><div class='ctx'> 					     GFP_KERNEL);</div><div class='ctx'> 		if (!ppgtt-&gt;pt_dma_addr)</div><div class='ctx'> 			goto err_pt_alloc;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ppgtt-&gt;num_pd_entries; i++) {</div><div class='del'>-		dma_addr_t pt_addr;</div><div class='del'>-		if (dev_priv-&gt;mm.gtt-&gt;needs_dmar) {</div><div class='add'>+		for (i = 0; i &lt; ppgtt-&gt;num_pd_entries; i++) {</div><div class='add'>+			dma_addr_t pt_addr;</div><div class='add'>+</div><div class='ctx'> 			pt_addr = pci_map_page(dev-&gt;pdev, ppgtt-&gt;pt_pages[i],</div><div class='ctx'> 					       0, 4096,</div><div class='ctx'> 					       PCI_DMA_BIDIRECTIONAL);</div><div class='hunk'>@@ -112,8 +111,7 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 			}</div><div class='ctx'> 			ppgtt-&gt;pt_dma_addr[i] = pt_addr;</div><div class='del'>-		} else</div><div class='del'>-			pt_addr = page_to_phys(ppgtt-&gt;pt_pages[i]);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ppgtt-&gt;scratch_page_dma_addr = dev_priv-&gt;mm.gtt-&gt;scratch_page_dma;</div><div class='hunk'>@@ -269,7 +267,13 @@ void i915_ppgtt_bind_object(struct i915_hw_ppgtt *ppgtt,</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dev_priv-&gt;mm.gtt-&gt;needs_dmar) {</div><div class='add'>+	if (obj-&gt;sg_table) {</div><div class='add'>+		i915_ppgtt_insert_sg_entries(ppgtt,</div><div class='add'>+					     obj-&gt;sg_table-&gt;sgl,</div><div class='add'>+					     obj-&gt;sg_table-&gt;nents,</div><div class='add'>+					     obj-&gt;gtt_space-&gt;start &gt;&gt; PAGE_SHIFT,</div><div class='add'>+					     pte_flags);</div><div class='add'>+	} else if (dev_priv-&gt;mm.gtt-&gt;needs_dmar) {</div><div class='ctx'> 		BUG_ON(!obj-&gt;sg_list);</div><div class='ctx'> </div><div class='ctx'> 		i915_ppgtt_insert_sg_entries(ppgtt,</div><div class='hunk'>@@ -319,7 +323,7 @@ static bool do_idling(struct drm_i915_private *dev_priv)</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(dev_priv-&gt;mm.gtt-&gt;do_idle_maps)) {</div><div class='ctx'> 		dev_priv-&gt;mm.interruptible = false;</div><div class='del'>-		if (i915_gpu_idle(dev_priv-&gt;dev, false)) {</div><div class='add'>+		if (i915_gpu_idle(dev_priv-&gt;dev)) {</div><div class='ctx'> 			DRM_ERROR("Couldn't idle GPU\n");</div><div class='ctx'> 			/* Wait a bit, in hopes it avoids the hang */</div><div class='ctx'> 			udelay(10);</div><div class='hunk'>@@ -346,48 +350,39 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(obj, &amp;dev_priv-&gt;mm.gtt_list, gtt_list) {</div><div class='ctx'> 		i915_gem_clflush_object(obj);</div><div class='del'>-		i915_gem_gtt_rebind_object(obj, obj-&gt;cache_level);</div><div class='add'>+		i915_gem_gtt_bind_object(obj, obj-&gt;cache_level);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	intel_gtt_chipset_flush();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj)</div><div class='add'>+int i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = obj-&gt;base.dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	unsigned int agp_type = cache_level_to_agp_type(dev, obj-&gt;cache_level);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;mm.gtt-&gt;needs_dmar) {</div><div class='del'>-		ret = intel_gtt_map_memory(obj-&gt;pages,</div><div class='del'>-					   obj-&gt;base.size &gt;&gt; PAGE_SHIFT,</div><div class='del'>-					   &amp;obj-&gt;sg_list,</div><div class='del'>-					   &amp;obj-&gt;num_sg);</div><div class='del'>-		if (ret != 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		intel_gtt_insert_sg_entries(obj-&gt;sg_list,</div><div class='del'>-					    obj-&gt;num_sg,</div><div class='del'>-					    obj-&gt;gtt_space-&gt;start &gt;&gt; PAGE_SHIFT,</div><div class='del'>-					    agp_type);</div><div class='del'>-	} else</div><div class='del'>-		intel_gtt_insert_pages(obj-&gt;gtt_space-&gt;start &gt;&gt; PAGE_SHIFT,</div><div class='del'>-				       obj-&gt;base.size &gt;&gt; PAGE_SHIFT,</div><div class='del'>-				       obj-&gt;pages,</div><div class='del'>-				       agp_type);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	if (dev_priv-&gt;mm.gtt-&gt;needs_dmar)</div><div class='add'>+		return intel_gtt_map_memory(obj-&gt;pages,</div><div class='add'>+					    obj-&gt;base.size &gt;&gt; PAGE_SHIFT,</div><div class='add'>+					    &amp;obj-&gt;sg_list,</div><div class='add'>+					    &amp;obj-&gt;num_sg);</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj,</div><div class='del'>-				enum i915_cache_level cache_level)</div><div class='add'>+void i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj,</div><div class='add'>+			      enum i915_cache_level cache_level)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = obj-&gt;base.dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	unsigned int agp_type = cache_level_to_agp_type(dev, cache_level);</div><div class='ctx'> </div><div class='del'>-	if (dev_priv-&gt;mm.gtt-&gt;needs_dmar) {</div><div class='add'>+	if (obj-&gt;sg_table) {</div><div class='add'>+		intel_gtt_insert_sg_entries(obj-&gt;sg_table-&gt;sgl,</div><div class='add'>+					    obj-&gt;sg_table-&gt;nents,</div><div class='add'>+					    obj-&gt;gtt_space-&gt;start &gt;&gt; PAGE_SHIFT,</div><div class='add'>+					    agp_type);</div><div class='add'>+	} else if (dev_priv-&gt;mm.gtt-&gt;needs_dmar) {</div><div class='ctx'> 		BUG_ON(!obj-&gt;sg_list);</div><div class='ctx'> </div><div class='ctx'> 		intel_gtt_insert_sg_entries(obj-&gt;sg_list,</div><div class='hunk'>@@ -399,19 +394,26 @@ void i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj,</div><div class='ctx'> 				       obj-&gt;base.size &gt;&gt; PAGE_SHIFT,</div><div class='ctx'> 				       obj-&gt;pages,</div><div class='ctx'> 				       agp_type);</div><div class='add'>+</div><div class='add'>+	obj-&gt;has_global_gtt_mapping = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj)</div><div class='ctx'> {</div><div class='add'>+	intel_gtt_clear_range(obj-&gt;gtt_space-&gt;start &gt;&gt; PAGE_SHIFT,</div><div class='add'>+			      obj-&gt;base.size &gt;&gt; PAGE_SHIFT);</div><div class='add'>+</div><div class='add'>+	obj-&gt;has_global_gtt_mapping = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj)</div><div class='add'>+{</div><div class='ctx'> 	struct drm_device *dev = obj-&gt;base.dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	bool interruptible;</div><div class='ctx'> </div><div class='ctx'> 	interruptible = do_idling(dev_priv);</div><div class='ctx'> </div><div class='del'>-	intel_gtt_clear_range(obj-&gt;gtt_space-&gt;start &gt;&gt; PAGE_SHIFT,</div><div class='del'>-			      obj-&gt;base.size &gt;&gt; PAGE_SHIFT);</div><div class='del'>-</div><div class='ctx'> 	if (obj-&gt;sg_list) {</div><div class='ctx'> 		intel_gtt_unmap_memory(obj-&gt;sg_list, obj-&gt;num_sg);</div><div class='ctx'> 		obj-&gt;sg_list = NULL;</div><div class='hunk'>@@ -419,3 +421,23 @@ void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj)</div><div class='ctx'> </div><div class='ctx'> 	undo_idling(dev_priv, interruptible);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void i915_gem_init_global_gtt(struct drm_device *dev,</div><div class='add'>+			      unsigned long start,</div><div class='add'>+			      unsigned long mappable_end,</div><div class='add'>+			      unsigned long end)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	/* Substract the guard page ... */</div><div class='add'>+	drm_mm_init(&amp;dev_priv-&gt;mm.gtt_space, start, end - start - PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;mm.gtt_start = start;</div><div class='add'>+	dev_priv-&gt;mm.gtt_mappable_end = mappable_end;</div><div class='add'>+	dev_priv-&gt;mm.gtt_end = end;</div><div class='add'>+	dev_priv-&gt;mm.gtt_total = end - start;</div><div class='add'>+	dev_priv-&gt;mm.mappable_gtt_total = min(end, mappable_end) - start;</div><div class='add'>+</div><div class='add'>+	/* ... but ensure that we clear the entire range. */</div><div class='add'>+	intel_gtt_clear_range(start / PAGE_SIZE, (end-start) / PAGE_SIZE);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c<br/>new file mode 100644<br/>index 000000000000..ada2e90a2a60<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem_stolen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_stolen.c</a></div><div class='hunk'>@@ -0,0 +1,202 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright © 2008-2012 Intel Corporation</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the next</div><div class='add'>+ * paragraph) shall be included in all copies or substantial portions of the</div><div class='add'>+ * Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER</div><div class='add'>+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS</div><div class='add'>+ * IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors:</div><div class='add'>+ *    Eric Anholt &lt;eric@anholt.net&gt;</div><div class='add'>+ *    Chris Wilson &lt;chris@chris-wilson.co.uk&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+#include "i915_drm.h"</div><div class='add'>+#include "i915_drv.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The BIOS typically reserves some of the system's memory for the exclusive</div><div class='add'>+ * use of the integrated graphics. This memory is no longer available for</div><div class='add'>+ * use by the OS and so the user finds that his system has less memory</div><div class='add'>+ * available than he put in. We refer to this memory as stolen.</div><div class='add'>+ *</div><div class='add'>+ * The BIOS will allocate its framebuffer from the stolen memory. Our</div><div class='add'>+ * goal is try to reuse that object for our own fbcon which must always</div><div class='add'>+ * be available for panics. Anything else we can reuse the stolen memory</div><div class='add'>+ * for is a boon.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define PTE_ADDRESS_MASK		0xfffff000</div><div class='add'>+#define PTE_ADDRESS_MASK_HIGH		0x000000f0 /* i915+ */</div><div class='add'>+#define PTE_MAPPING_TYPE_UNCACHED	(0 &lt;&lt; 1)</div><div class='add'>+#define PTE_MAPPING_TYPE_DCACHE		(1 &lt;&lt; 1) /* i830 only */</div><div class='add'>+#define PTE_MAPPING_TYPE_CACHED		(3 &lt;&lt; 1)</div><div class='add'>+#define PTE_MAPPING_TYPE_MASK		(3 &lt;&lt; 1)</div><div class='add'>+#define PTE_VALID			(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * i915_stolen_to_phys - take an offset into stolen memory and turn it into</div><div class='add'>+ *                       a physical one</div><div class='add'>+ * @dev: drm device</div><div class='add'>+ * @offset: address to translate</div><div class='add'>+ *</div><div class='add'>+ * Some chip functions require allocations from stolen space and need the</div><div class='add'>+ * physical address of the memory in question.</div><div class='add'>+ */</div><div class='add'>+static unsigned long i915_stolen_to_phys(struct drm_device *dev, u32 offset)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct pci_dev *pdev = dev_priv-&gt;bridge_dev;</div><div class='add'>+	u32 base;</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+	/* On the machines I have tested the Graphics Base of Stolen Memory</div><div class='add'>+	 * is unreliable, so compute the base by subtracting the stolen memory</div><div class='add'>+	 * from the Top of Low Usable DRAM which is where the BIOS places</div><div class='add'>+	 * the graphics stolen memory.</div><div class='add'>+	 */</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &gt; 3 || IS_G33(dev)) {</div><div class='add'>+		/* top 32bits are reserved = 0 */</div><div class='add'>+		pci_read_config_dword(pdev, 0xA4, &amp;base);</div><div class='add'>+	} else {</div><div class='add'>+		/* XXX presume 8xx is the same as i915 */</div><div class='add'>+		pci_bus_read_config_dword(pdev-&gt;bus, 2, 0x5C, &amp;base);</div><div class='add'>+	}</div><div class='add'>+#else</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &gt; 3 || IS_G33(dev)) {</div><div class='add'>+		u16 val;</div><div class='add'>+		pci_read_config_word(pdev, 0xb0, &amp;val);</div><div class='add'>+		base = val &gt;&gt; 4 &lt;&lt; 20;</div><div class='add'>+	} else {</div><div class='add'>+		u8 val;</div><div class='add'>+		pci_read_config_byte(pdev, 0x9c, &amp;val);</div><div class='add'>+		base = val &gt;&gt; 3 &lt;&lt; 27;</div><div class='add'>+	}</div><div class='add'>+	base -= dev_priv-&gt;mm.gtt-&gt;stolen_size;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return base + offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i915_warn_stolen(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	DRM_INFO("not enough stolen space for compressed buffer, disabling\n");</div><div class='add'>+	DRM_INFO("hint: you may be able to increase stolen memory size in the BIOS to avoid this\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i915_setup_compression(struct drm_device *dev, int size)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct drm_mm_node *compressed_fb, *uninitialized_var(compressed_llb);</div><div class='add'>+	unsigned long cfb_base;</div><div class='add'>+	unsigned long ll_base = 0;</div><div class='add'>+</div><div class='add'>+	/* Just in case the BIOS is doing something questionable. */</div><div class='add'>+	intel_disable_fbc(dev);</div><div class='add'>+</div><div class='add'>+	compressed_fb = drm_mm_search_free(&amp;dev_priv-&gt;mm.stolen, size, 4096, 0);</div><div class='add'>+	if (compressed_fb)</div><div class='add'>+		compressed_fb = drm_mm_get_block(compressed_fb, size, 4096);</div><div class='add'>+	if (!compressed_fb)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	cfb_base = i915_stolen_to_phys(dev, compressed_fb-&gt;start);</div><div class='add'>+	if (!cfb_base)</div><div class='add'>+		goto err_fb;</div><div class='add'>+</div><div class='add'>+	if (!(IS_GM45(dev) || HAS_PCH_SPLIT(dev))) {</div><div class='add'>+		compressed_llb = drm_mm_search_free(&amp;dev_priv-&gt;mm.stolen,</div><div class='add'>+						    4096, 4096, 0);</div><div class='add'>+		if (compressed_llb)</div><div class='add'>+			compressed_llb = drm_mm_get_block(compressed_llb,</div><div class='add'>+							  4096, 4096);</div><div class='add'>+		if (!compressed_llb)</div><div class='add'>+			goto err_fb;</div><div class='add'>+</div><div class='add'>+		ll_base = i915_stolen_to_phys(dev, compressed_llb-&gt;start);</div><div class='add'>+		if (!ll_base)</div><div class='add'>+			goto err_llb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;cfb_size = size;</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;compressed_fb = compressed_fb;</div><div class='add'>+	if (HAS_PCH_SPLIT(dev))</div><div class='add'>+		I915_WRITE(ILK_DPFC_CB_BASE, compressed_fb-&gt;start);</div><div class='add'>+	else if (IS_GM45(dev)) {</div><div class='add'>+		I915_WRITE(DPFC_CB_BASE, compressed_fb-&gt;start);</div><div class='add'>+	} else {</div><div class='add'>+		I915_WRITE(FBC_CFB_BASE, cfb_base);</div><div class='add'>+		I915_WRITE(FBC_LL_BASE, ll_base);</div><div class='add'>+		dev_priv-&gt;compressed_llb = compressed_llb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n",</div><div class='add'>+		      cfb_base, ll_base, size &gt;&gt; 20);</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err_llb:</div><div class='add'>+	drm_mm_put_block(compressed_llb);</div><div class='add'>+err_fb:</div><div class='add'>+	drm_mm_put_block(compressed_fb);</div><div class='add'>+err:</div><div class='add'>+	dev_priv-&gt;no_fbc_reason = FBC_STOLEN_TOO_SMALL;</div><div class='add'>+	i915_warn_stolen(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i915_cleanup_compression(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	drm_mm_put_block(dev_priv-&gt;compressed_fb);</div><div class='add'>+	if (dev_priv-&gt;compressed_llb)</div><div class='add'>+		drm_mm_put_block(dev_priv-&gt;compressed_llb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void i915_gem_cleanup_stolen(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	if (I915_HAS_FBC(dev) &amp;&amp; i915_powersave)</div><div class='add'>+		i915_cleanup_compression(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int i915_gem_init_stolen(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	unsigned long prealloc_size = dev_priv-&gt;mm.gtt-&gt;stolen_size;</div><div class='add'>+</div><div class='add'>+	/* Basic memrange allocator for stolen space */</div><div class='add'>+	drm_mm_init(&amp;dev_priv-&gt;mm.stolen, 0, prealloc_size);</div><div class='add'>+</div><div class='add'>+	/* Try to set up FBC with a reasonable compressed buffer size */</div><div class='add'>+	if (I915_HAS_FBC(dev) &amp;&amp; i915_powersave) {</div><div class='add'>+		int cfb_size;</div><div class='add'>+</div><div class='add'>+		/* Leave 1M for line length buffer &amp; misc. */</div><div class='add'>+</div><div class='add'>+		/* Try to get a 32M buffer... */</div><div class='add'>+		if (prealloc_size &gt; (36*1024*1024))</div><div class='add'>+			cfb_size = 32*1024*1024;</div><div class='add'>+		else /* fall back to 7/8 of the stolen space */</div><div class='add'>+			cfb_size = prealloc_size * 7 / 8;</div><div class='add'>+		i915_setup_compression(dev, cfb_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c<br/>index 1a9306665987..b964df51cec7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem_tiling.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_gem_tiling.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_gem_tiling.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_gem_tiling.c</a></div><div class='hunk'>@@ -354,9 +354,15 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,</div><div class='ctx'> 		/* We need to rebind the object if its current allocation</div><div class='ctx'> 		 * no longer meets the alignment restrictions for its new</div><div class='ctx'> 		 * tiling mode. Otherwise we can just leave it alone, but</div><div class='del'>-		 * need to ensure that any fence register is cleared.</div><div class='add'>+		 * need to ensure that any fence register is updated before</div><div class='add'>+		 * the next fenced (either through the GTT or by the BLT unit</div><div class='add'>+		 * on older GPUs) access.</div><div class='add'>+		 *</div><div class='add'>+		 * After updating the tiling parameters, we then flag whether</div><div class='add'>+		 * we need to update an associated fence register. Note this</div><div class='add'>+		 * has to also include the unfenced register the GPU uses</div><div class='add'>+		 * whilst executing a fenced command for an untiled object.</div><div class='ctx'> 		 */</div><div class='del'>-		i915_gem_release_mmap(obj);</div><div class='ctx'> </div><div class='ctx'> 		obj-&gt;map_and_fenceable =</div><div class='ctx'> 			obj-&gt;gtt_space == NULL ||</div><div class='hunk'>@@ -374,9 +380,15 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (ret == 0) {</div><div class='del'>-			obj-&gt;tiling_changed = true;</div><div class='add'>+			obj-&gt;fence_dirty =</div><div class='add'>+				obj-&gt;fenced_gpu_access ||</div><div class='add'>+				obj-&gt;fence_reg != I915_FENCE_REG_NONE;</div><div class='add'>+</div><div class='ctx'> 			obj-&gt;tiling_mode = args-&gt;tiling_mode;</div><div class='ctx'> 			obj-&gt;stride = args-&gt;stride;</div><div class='add'>+</div><div class='add'>+			/* Force the fence to be reacquired for GTT access */</div><div class='add'>+			i915_gem_release_mmap(obj);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* we have to maintain this existing ABI... */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_ioc32.c b/drivers/gpu/drm/i915/i915_ioc32.c<br/>index 13b028994b2b..0e72abb9f701 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_ioc32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_ioc32.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_ioc32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_ioc32.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "drm.h"</div><div class='ctx'> #include "i915_drm.h"</div><div class='add'>+#include "i915_drv.h"</div><div class='ctx'> </div><div class='ctx'> typedef struct _drm_i915_batchbuffer32 {</div><div class='ctx'> 	int start;		/* agp offset */</div><div class='hunk'>@@ -181,7 +182,7 @@ static int compat_i915_alloc(struct file *file, unsigned int cmd,</div><div class='ctx'> 			 (unsigned long)request);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-drm_ioctl_compat_t *i915_compat_ioctls[] = {</div><div class='add'>+static drm_ioctl_compat_t *i915_compat_ioctls[] = {</div><div class='ctx'> 	[DRM_I915_BATCHBUFFER] = compat_i915_batchbuffer,</div><div class='ctx'> 	[DRM_I915_CMDBUFFER] = compat_i915_cmdbuffer,</div><div class='ctx'> 	[DRM_I915_GETPARAM] = compat_i915_getparam,</div><div class='hunk'>@@ -189,6 +190,7 @@ drm_ioctl_compat_t *i915_compat_ioctls[] = {</div><div class='ctx'> 	[DRM_I915_ALLOC] = compat_i915_alloc</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_COMPAT</div><div class='ctx'> /**</div><div class='ctx'>  * Called whenever a 32-bit process running under a 64-bit kernel</div><div class='ctx'>  * performs an ioctl on /dev/dri/card&lt;n&gt;.</div><div class='hunk'>@@ -217,3 +219,4 @@ long i915_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c<br/>index afd4e03e337e..b1fe0edda955 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_irq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_irq.c</a></div><div class='hunk'>@@ -26,6 +26,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/sysrq.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include "drmP.h"</div><div class='hunk'>@@ -35,35 +37,6 @@</div><div class='ctx'> #include "i915_trace.h"</div><div class='ctx'> #include "intel_drv.h"</div><div class='ctx'> </div><div class='del'>-#define MAX_NOPID ((u32)~0)</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * Interrupts that are always left unmasked.</div><div class='del'>- *</div><div class='del'>- * Since pipe events are edge-triggered from the PIPESTAT register to IIR,</div><div class='del'>- * we leave them always unmasked in IMR and then control enabling them through</div><div class='del'>- * PIPESTAT alone.</div><div class='del'>- */</div><div class='del'>-#define I915_INTERRUPT_ENABLE_FIX			\</div><div class='del'>-	(I915_ASLE_INTERRUPT |				\</div><div class='del'>-	 I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |		\</div><div class='del'>-	 I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |		\</div><div class='del'>-	 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |	\</div><div class='del'>-	 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT |	\</div><div class='del'>-	 I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)</div><div class='del'>-</div><div class='del'>-/** Interrupts that we mask and unmask at runtime. */</div><div class='del'>-#define I915_INTERRUPT_ENABLE_VAR (I915_USER_INTERRUPT | I915_BSD_USER_INTERRUPT)</div><div class='del'>-</div><div class='del'>-#define I915_PIPE_VBLANK_STATUS	(PIPE_START_VBLANK_INTERRUPT_STATUS |\</div><div class='del'>-				 PIPE_VBLANK_INTERRUPT_STATUS)</div><div class='del'>-</div><div class='del'>-#define I915_PIPE_VBLANK_ENABLE	(PIPE_START_VBLANK_INTERRUPT_ENABLE |\</div><div class='del'>-				 PIPE_VBLANK_INTERRUPT_ENABLE)</div><div class='del'>-</div><div class='del'>-#define DRM_I915_VBLANK_PIPE_ALL	(DRM_I915_VBLANK_PIPE_A | \</div><div class='del'>-					 DRM_I915_VBLANK_PIPE_B)</div><div class='del'>-</div><div class='ctx'> /* For display hotplug interrupt */</div><div class='ctx'> static void</div><div class='ctx'> ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask)</div><div class='hunk'>@@ -118,6 +91,10 @@ void intel_enable_asle(struct drm_device *dev)</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	unsigned long irqflags;</div><div class='ctx'> </div><div class='add'>+	/* FIXME: opregion/asle for VLV */</div><div class='add'>+	if (IS_VALLEYVIEW(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='ctx'> </div><div class='ctx'> 	if (HAS_PCH_SPLIT(dev))</div><div class='hunk'>@@ -354,15 +331,12 @@ static void notify_ring(struct drm_device *dev,</div><div class='ctx'> 			struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 seqno;</div><div class='ctx'> </div><div class='ctx'> 	if (ring-&gt;obj == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	seqno = ring-&gt;get_seqno(ring);</div><div class='del'>-	trace_i915_gem_request_complete(ring, seqno);</div><div class='add'>+	trace_i915_gem_request_complete(ring, ring-&gt;get_seqno(ring));</div><div class='ctx'> </div><div class='del'>-	ring-&gt;irq_seqno = seqno;</div><div class='ctx'> 	wake_up_all(&amp;ring-&gt;irq_queue);</div><div class='ctx'> 	if (i915_enable_hangcheck) {</div><div class='ctx'> 		dev_priv-&gt;hangcheck_count = 0;</div><div class='hunk'>@@ -376,8 +350,8 @@ static void gen6_pm_rps_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,</div><div class='ctx'> 						    rps_work);</div><div class='del'>-	u8 new_delay = dev_priv-&gt;cur_delay;</div><div class='ctx'> 	u32 pm_iir, pm_imr;</div><div class='add'>+	u8 new_delay;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;dev_priv-&gt;rps_lock);</div><div class='ctx'> 	pm_iir = dev_priv-&gt;pm_iir;</div><div class='hunk'>@@ -386,51 +360,160 @@ static void gen6_pm_rps_work(struct work_struct *work)</div><div class='ctx'> 	I915_WRITE(GEN6_PMIMR, 0);</div><div class='ctx'> 	spin_unlock_irq(&amp;dev_priv-&gt;rps_lock);</div><div class='ctx'> </div><div class='del'>-	if (!pm_iir)</div><div class='add'>+	if ((pm_iir &amp; GEN6_PM_DEFERRED_EVENTS) == 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev_priv-&gt;dev-&gt;struct_mutex);</div><div class='del'>-	if (pm_iir &amp; GEN6_PM_RP_UP_THRESHOLD) {</div><div class='del'>-		if (dev_priv-&gt;cur_delay != dev_priv-&gt;max_delay)</div><div class='del'>-			new_delay = dev_priv-&gt;cur_delay + 1;</div><div class='del'>-		if (new_delay &gt; dev_priv-&gt;max_delay)</div><div class='del'>-			new_delay = dev_priv-&gt;max_delay;</div><div class='del'>-	} else if (pm_iir &amp; (GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_TIMEOUT)) {</div><div class='del'>-		gen6_gt_force_wake_get(dev_priv);</div><div class='del'>-		if (dev_priv-&gt;cur_delay != dev_priv-&gt;min_delay)</div><div class='del'>-			new_delay = dev_priv-&gt;cur_delay - 1;</div><div class='del'>-		if (new_delay &lt; dev_priv-&gt;min_delay) {</div><div class='del'>-			new_delay = dev_priv-&gt;min_delay;</div><div class='del'>-			I915_WRITE(GEN6_RP_INTERRUPT_LIMITS,</div><div class='del'>-				   I915_READ(GEN6_RP_INTERRUPT_LIMITS) |</div><div class='del'>-				   ((new_delay &lt;&lt; 16) &amp; 0x3f0000));</div><div class='del'>-		} else {</div><div class='del'>-			/* Make sure we continue to get down interrupts</div><div class='del'>-			 * until we hit the minimum frequency */</div><div class='del'>-			I915_WRITE(GEN6_RP_INTERRUPT_LIMITS,</div><div class='del'>-				   I915_READ(GEN6_RP_INTERRUPT_LIMITS) &amp; ~0x3f0000);</div><div class='del'>-		}</div><div class='del'>-		gen6_gt_force_wake_put(dev_priv);</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	if (pm_iir &amp; GEN6_PM_RP_UP_THRESHOLD)</div><div class='add'>+		new_delay = dev_priv-&gt;cur_delay + 1;</div><div class='add'>+	else</div><div class='add'>+		new_delay = dev_priv-&gt;cur_delay - 1;</div><div class='ctx'> </div><div class='ctx'> 	gen6_set_rps(dev_priv-&gt;dev, new_delay);</div><div class='del'>-	dev_priv-&gt;cur_delay = new_delay;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;dev_priv-&gt;dev-&gt;struct_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void snb_gt_irq_handler(struct drm_device *dev,</div><div class='add'>+			       struct drm_i915_private *dev_priv,</div><div class='add'>+			       u32 gt_iir)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	if (gt_iir &amp; (GEN6_RENDER_USER_INTERRUPT |</div><div class='add'>+		      GEN6_RENDER_PIPE_CONTROL_NOTIFY_INTERRUPT))</div><div class='add'>+		notify_ring(dev, &amp;dev_priv-&gt;ring[RCS]);</div><div class='add'>+	if (gt_iir &amp; GEN6_BSD_USER_INTERRUPT)</div><div class='add'>+		notify_ring(dev, &amp;dev_priv-&gt;ring[VCS]);</div><div class='add'>+	if (gt_iir &amp; GEN6_BLITTER_USER_INTERRUPT)</div><div class='add'>+		notify_ring(dev, &amp;dev_priv-&gt;ring[BCS]);</div><div class='add'>+</div><div class='add'>+	if (gt_iir &amp; (GT_GEN6_BLT_CS_ERROR_INTERRUPT |</div><div class='add'>+		      GT_GEN6_BSD_CS_ERROR_INTERRUPT |</div><div class='add'>+		      GT_RENDER_CS_ERROR_INTERRUPT)) {</div><div class='add'>+		DRM_ERROR("GT error interrupt 0x%08x\n", gt_iir);</div><div class='add'>+		i915_handle_error(dev, false);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gen6_queue_rps_work(struct drm_i915_private *dev_priv,</div><div class='add'>+				u32 pm_iir)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * rps_lock not held here because clearing is non-destructive. There is</div><div class='del'>-	 * an *extremely* unlikely race with gen6_rps_enable() that is prevented</div><div class='del'>-	 * by holding struct_mutex for the duration of the write.</div><div class='add'>+	 * IIR bits should never already be set because IMR should</div><div class='add'>+	 * prevent an interrupt from being shown in IIR. The warning</div><div class='add'>+	 * displays a case where we've unsafely cleared</div><div class='add'>+	 * dev_priv-&gt;pm_iir. Although missing an interrupt of the same</div><div class='add'>+	 * type is not a problem, it displays a problem in the logic.</div><div class='add'>+	 *</div><div class='add'>+	 * The mask bit in IMR is cleared by rps_work.</div><div class='ctx'> 	 */</div><div class='del'>-	mutex_unlock(&amp;dev_priv-&gt;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;rps_lock, flags);</div><div class='add'>+	WARN(dev_priv-&gt;pm_iir &amp; pm_iir, "Missed a PM interrupt\n");</div><div class='add'>+	dev_priv-&gt;pm_iir |= pm_iir;</div><div class='add'>+	I915_WRITE(GEN6_PMIMR, dev_priv-&gt;pm_iir);</div><div class='add'>+	POSTING_READ(GEN6_PMIMR);</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;rps_lock, flags);</div><div class='add'>+</div><div class='add'>+	queue_work(dev_priv-&gt;wq, &amp;dev_priv-&gt;rps_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pch_irq_handler(struct drm_device *dev)</div><div class='add'>+static irqreturn_t valleyview_irq_handler(DRM_IRQ_ARGS)</div><div class='ctx'> {</div><div class='add'>+	struct drm_device *dev = (struct drm_device *) arg;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='del'>-	u32 pch_iir;</div><div class='add'>+	u32 iir, gt_iir, pm_iir;</div><div class='add'>+	irqreturn_t ret = IRQ_NONE;</div><div class='add'>+	unsigned long irqflags;</div><div class='ctx'> 	int pipe;</div><div class='add'>+	u32 pipe_stats[I915_MAX_PIPES];</div><div class='add'>+	u32 vblank_status;</div><div class='add'>+	int vblank = 0;</div><div class='add'>+	bool blc_event;</div><div class='ctx'> </div><div class='del'>-	pch_iir = I915_READ(SDEIIR);</div><div class='add'>+	atomic_inc(&amp;dev_priv-&gt;irq_received);</div><div class='add'>+</div><div class='add'>+	vblank_status = PIPE_START_VBLANK_INTERRUPT_STATUS |</div><div class='add'>+		PIPE_VBLANK_INTERRUPT_STATUS;</div><div class='add'>+</div><div class='add'>+	while (true) {</div><div class='add'>+		iir = I915_READ(VLV_IIR);</div><div class='add'>+		gt_iir = I915_READ(GTIIR);</div><div class='add'>+		pm_iir = I915_READ(GEN6_PMIIR);</div><div class='add'>+</div><div class='add'>+		if (gt_iir == 0 &amp;&amp; pm_iir == 0 &amp;&amp; iir == 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		ret = IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+		snb_gt_irq_handler(dev, dev_priv, gt_iir);</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='add'>+		for_each_pipe(pipe) {</div><div class='add'>+			int reg = PIPESTAT(pipe);</div><div class='add'>+			pipe_stats[pipe] = I915_READ(reg);</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Clear the PIPE*STAT regs before the IIR</div><div class='add'>+			 */</div><div class='add'>+			if (pipe_stats[pipe] &amp; 0x8000ffff) {</div><div class='add'>+				if (pipe_stats[pipe] &amp; PIPE_FIFO_UNDERRUN_STATUS)</div><div class='add'>+					DRM_DEBUG_DRIVER("pipe %c underrun\n",</div><div class='add'>+							 pipe_name(pipe));</div><div class='add'>+				I915_WRITE(reg, pipe_stats[pipe]);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='add'>+</div><div class='add'>+		/* Consume port.  Then clear IIR or we'll miss events */</div><div class='add'>+		if (iir &amp; I915_DISPLAY_PORT_INTERRUPT) {</div><div class='add'>+			u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);</div><div class='add'>+</div><div class='add'>+			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",</div><div class='add'>+					 hotplug_status);</div><div class='add'>+			if (hotplug_status &amp; dev_priv-&gt;hotplug_supported_mask)</div><div class='add'>+				queue_work(dev_priv-&gt;wq,</div><div class='add'>+					   &amp;dev_priv-&gt;hotplug_work);</div><div class='add'>+</div><div class='add'>+			I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);</div><div class='add'>+			I915_READ(PORT_HOTPLUG_STAT);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		if (iir &amp; I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT) {</div><div class='add'>+			drm_handle_vblank(dev, 0);</div><div class='add'>+			vblank++;</div><div class='add'>+			intel_finish_page_flip(dev, 0);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (iir &amp; I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT) {</div><div class='add'>+			drm_handle_vblank(dev, 1);</div><div class='add'>+			vblank++;</div><div class='add'>+			intel_finish_page_flip(dev, 0);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pipe_stats[pipe] &amp; PIPE_LEGACY_BLC_EVENT_STATUS)</div><div class='add'>+			blc_event = true;</div><div class='add'>+</div><div class='add'>+		if (pm_iir &amp; GEN6_PM_DEFERRED_EVENTS)</div><div class='add'>+			gen6_queue_rps_work(dev_priv, pm_iir);</div><div class='add'>+</div><div class='add'>+		I915_WRITE(GTIIR, gt_iir);</div><div class='add'>+		I915_WRITE(GEN6_PMIIR, pm_iir);</div><div class='add'>+		I915_WRITE(VLV_IIR, iir);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	int pipe;</div><div class='ctx'> </div><div class='ctx'> 	if (pch_iir &amp; SDE_AUDIO_POWER_MASK)</div><div class='ctx'> 		DRM_DEBUG_DRIVER("PCH audio power change on port %d\n",</div><div class='hunk'>@@ -467,95 +550,110 @@ static void pch_irq_handler(struct drm_device *dev)</div><div class='ctx'> 		DRM_DEBUG_DRIVER("PCH transcoder A underrun interrupt\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	int pipe;</div><div class='add'>+</div><div class='add'>+	if (pch_iir &amp; SDE_AUDIO_POWER_MASK_CPT)</div><div class='add'>+		DRM_DEBUG_DRIVER("PCH audio power change on port %d\n",</div><div class='add'>+				 (pch_iir &amp; SDE_AUDIO_POWER_MASK_CPT) &gt;&gt;</div><div class='add'>+				 SDE_AUDIO_POWER_SHIFT_CPT);</div><div class='add'>+</div><div class='add'>+	if (pch_iir &amp; SDE_AUX_MASK_CPT)</div><div class='add'>+		DRM_DEBUG_DRIVER("AUX channel interrupt\n");</div><div class='add'>+</div><div class='add'>+	if (pch_iir &amp; SDE_GMBUS_CPT)</div><div class='add'>+		DRM_DEBUG_DRIVER("PCH GMBUS interrupt\n");</div><div class='add'>+</div><div class='add'>+	if (pch_iir &amp; SDE_AUDIO_CP_REQ_CPT)</div><div class='add'>+		DRM_DEBUG_DRIVER("Audio CP request interrupt\n");</div><div class='add'>+</div><div class='add'>+	if (pch_iir &amp; SDE_AUDIO_CP_CHG_CPT)</div><div class='add'>+		DRM_DEBUG_DRIVER("Audio CP change interrupt\n");</div><div class='add'>+</div><div class='add'>+	if (pch_iir &amp; SDE_FDI_MASK_CPT)</div><div class='add'>+		for_each_pipe(pipe)</div><div class='add'>+			DRM_DEBUG_DRIVER("  pipe %c FDI IIR: 0x%08x\n",</div><div class='add'>+					 pipe_name(pipe),</div><div class='add'>+					 I915_READ(FDI_RX_IIR(pipe)));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = (struct drm_device *) arg;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='del'>-	int ret = IRQ_NONE;</div><div class='del'>-	u32 de_iir, gt_iir, de_ier, pch_iir, pm_iir;</div><div class='del'>-	struct drm_i915_master_private *master_priv;</div><div class='add'>+	u32 de_iir, gt_iir, de_ier, pm_iir;</div><div class='add'>+	irqreturn_t ret = IRQ_NONE;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	atomic_inc(&amp;dev_priv-&gt;irq_received);</div><div class='ctx'> </div><div class='ctx'> 	/* disable master interrupt before clearing iir  */</div><div class='ctx'> 	de_ier = I915_READ(DEIER);</div><div class='ctx'> 	I915_WRITE(DEIER, de_ier &amp; ~DE_MASTER_IRQ_CONTROL);</div><div class='del'>-	POSTING_READ(DEIER);</div><div class='ctx'> </div><div class='del'>-	de_iir = I915_READ(DEIIR);</div><div class='ctx'> 	gt_iir = I915_READ(GTIIR);</div><div class='del'>-	pch_iir = I915_READ(SDEIIR);</div><div class='del'>-	pm_iir = I915_READ(GEN6_PMIIR);</div><div class='del'>-</div><div class='del'>-	if (de_iir == 0 &amp;&amp; gt_iir == 0 &amp;&amp; pch_iir == 0 &amp;&amp; pm_iir == 0)</div><div class='del'>-		goto done;</div><div class='del'>-</div><div class='del'>-	ret = IRQ_HANDLED;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;primary-&gt;master) {</div><div class='del'>-		master_priv = dev-&gt;primary-&gt;master-&gt;driver_priv;</div><div class='del'>-		if (master_priv-&gt;sarea_priv)</div><div class='del'>-			master_priv-&gt;sarea_priv-&gt;last_dispatch =</div><div class='del'>-				READ_BREADCRUMB(dev_priv);</div><div class='add'>+	if (gt_iir) {</div><div class='add'>+		snb_gt_irq_handler(dev, dev_priv, gt_iir);</div><div class='add'>+		I915_WRITE(GTIIR, gt_iir);</div><div class='add'>+		ret = IRQ_HANDLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (gt_iir &amp; (GT_USER_INTERRUPT | GT_PIPE_NOTIFY))</div><div class='del'>-		notify_ring(dev, &amp;dev_priv-&gt;ring[RCS]);</div><div class='del'>-	if (gt_iir &amp; GT_GEN6_BSD_USER_INTERRUPT)</div><div class='del'>-		notify_ring(dev, &amp;dev_priv-&gt;ring[VCS]);</div><div class='del'>-	if (gt_iir &amp; GT_BLT_USER_INTERRUPT)</div><div class='del'>-		notify_ring(dev, &amp;dev_priv-&gt;ring[BCS]);</div><div class='del'>-</div><div class='del'>-	if (de_iir &amp; DE_GSE_IVB)</div><div class='del'>-		intel_opregion_gse_intr(dev);</div><div class='del'>-</div><div class='del'>-	if (de_iir &amp; DE_PLANEA_FLIP_DONE_IVB) {</div><div class='del'>-		intel_prepare_page_flip(dev, 0);</div><div class='del'>-		intel_finish_page_flip_plane(dev, 0);</div><div class='del'>-	}</div><div class='add'>+	de_iir = I915_READ(DEIIR);</div><div class='add'>+	if (de_iir) {</div><div class='add'>+		if (de_iir &amp; DE_GSE_IVB)</div><div class='add'>+			intel_opregion_gse_intr(dev);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; 3; i++) {</div><div class='add'>+			if (de_iir &amp; (DE_PLANEA_FLIP_DONE_IVB &lt;&lt; (5 * i))) {</div><div class='add'>+				intel_prepare_page_flip(dev, i);</div><div class='add'>+				intel_finish_page_flip_plane(dev, i);</div><div class='add'>+			}</div><div class='add'>+			if (de_iir &amp; (DE_PIPEA_VBLANK_IVB &lt;&lt; (5 * i)))</div><div class='add'>+				drm_handle_vblank(dev, i);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (de_iir &amp; DE_PLANEB_FLIP_DONE_IVB) {</div><div class='del'>-		intel_prepare_page_flip(dev, 1);</div><div class='del'>-		intel_finish_page_flip_plane(dev, 1);</div><div class='del'>-	}</div><div class='add'>+		/* check event from PCH */</div><div class='add'>+		if (de_iir &amp; DE_PCH_EVENT_IVB) {</div><div class='add'>+			u32 pch_iir = I915_READ(SDEIIR);</div><div class='ctx'> </div><div class='del'>-	if (de_iir &amp; DE_PIPEA_VBLANK_IVB)</div><div class='del'>-		drm_handle_vblank(dev, 0);</div><div class='add'>+			if (pch_iir &amp; SDE_HOTPLUG_MASK_CPT)</div><div class='add'>+				queue_work(dev_priv-&gt;wq, &amp;dev_priv-&gt;hotplug_work);</div><div class='add'>+			cpt_irq_handler(dev, pch_iir);</div><div class='ctx'> </div><div class='del'>-	if (de_iir &amp; DE_PIPEB_VBLANK_IVB)</div><div class='del'>-		drm_handle_vblank(dev, 1);</div><div class='add'>+			/* clear PCH hotplug event before clear CPU irq */</div><div class='add'>+			I915_WRITE(SDEIIR, pch_iir);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	/* check event from PCH */</div><div class='del'>-	if (de_iir &amp; DE_PCH_EVENT_IVB) {</div><div class='del'>-		if (pch_iir &amp; SDE_HOTPLUG_MASK_CPT)</div><div class='del'>-			queue_work(dev_priv-&gt;wq, &amp;dev_priv-&gt;hotplug_work);</div><div class='del'>-		pch_irq_handler(dev);</div><div class='add'>+		I915_WRITE(DEIIR, de_iir);</div><div class='add'>+		ret = IRQ_HANDLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pm_iir &amp; GEN6_PM_DEFERRED_EVENTS) {</div><div class='del'>-		unsigned long flags;</div><div class='del'>-		spin_lock_irqsave(&amp;dev_priv-&gt;rps_lock, flags);</div><div class='del'>-		WARN(dev_priv-&gt;pm_iir &amp; pm_iir, "Missed a PM interrupt\n");</div><div class='del'>-		dev_priv-&gt;pm_iir |= pm_iir;</div><div class='del'>-		I915_WRITE(GEN6_PMIMR, dev_priv-&gt;pm_iir);</div><div class='del'>-		POSTING_READ(GEN6_PMIMR);</div><div class='del'>-		spin_unlock_irqrestore(&amp;dev_priv-&gt;rps_lock, flags);</div><div class='del'>-		queue_work(dev_priv-&gt;wq, &amp;dev_priv-&gt;rps_work);</div><div class='add'>+	pm_iir = I915_READ(GEN6_PMIIR);</div><div class='add'>+	if (pm_iir) {</div><div class='add'>+		if (pm_iir &amp; GEN6_PM_DEFERRED_EVENTS)</div><div class='add'>+			gen6_queue_rps_work(dev_priv, pm_iir);</div><div class='add'>+		I915_WRITE(GEN6_PMIIR, pm_iir);</div><div class='add'>+		ret = IRQ_HANDLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* should clear PCH hotplug event before clear CPU irq */</div><div class='del'>-	I915_WRITE(SDEIIR, pch_iir);</div><div class='del'>-	I915_WRITE(GTIIR, gt_iir);</div><div class='del'>-	I915_WRITE(DEIIR, de_iir);</div><div class='del'>-	I915_WRITE(GEN6_PMIIR, pm_iir);</div><div class='del'>-</div><div class='del'>-done:</div><div class='ctx'> 	I915_WRITE(DEIER, de_ier);</div><div class='ctx'> 	POSTING_READ(DEIER);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ilk_gt_irq_handler(struct drm_device *dev,</div><div class='add'>+			       struct drm_i915_private *dev_priv,</div><div class='add'>+			       u32 gt_iir)</div><div class='add'>+{</div><div class='add'>+	if (gt_iir &amp; (GT_USER_INTERRUPT | GT_PIPE_NOTIFY))</div><div class='add'>+		notify_ring(dev, &amp;dev_priv-&gt;ring[RCS]);</div><div class='add'>+	if (gt_iir &amp; GT_BSD_USER_INTERRUPT)</div><div class='add'>+		notify_ring(dev, &amp;dev_priv-&gt;ring[VCS]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = (struct drm_device *) arg;</div><div class='hunk'>@@ -563,14 +661,9 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)</div><div class='ctx'> 	int ret = IRQ_NONE;</div><div class='ctx'> 	u32 de_iir, gt_iir, de_ier, pch_iir, pm_iir;</div><div class='ctx'> 	u32 hotplug_mask;</div><div class='del'>-	struct drm_i915_master_private *master_priv;</div><div class='del'>-	u32 bsd_usr_interrupt = GT_BSD_USER_INTERRUPT;</div><div class='ctx'> </div><div class='ctx'> 	atomic_inc(&amp;dev_priv-&gt;irq_received);</div><div class='ctx'> </div><div class='del'>-	if (IS_GEN6(dev))</div><div class='del'>-		bsd_usr_interrupt = GT_GEN6_BSD_USER_INTERRUPT;</div><div class='del'>-</div><div class='ctx'> 	/* disable master interrupt before clearing iir  */</div><div class='ctx'> 	de_ier = I915_READ(DEIER);</div><div class='ctx'> 	I915_WRITE(DEIER, de_ier &amp; ~DE_MASTER_IRQ_CONTROL);</div><div class='hunk'>@@ -592,19 +685,10 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)</div><div class='ctx'> </div><div class='ctx'> 	ret = IRQ_HANDLED;</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;primary-&gt;master) {</div><div class='del'>-		master_priv = dev-&gt;primary-&gt;master-&gt;driver_priv;</div><div class='del'>-		if (master_priv-&gt;sarea_priv)</div><div class='del'>-			master_priv-&gt;sarea_priv-&gt;last_dispatch =</div><div class='del'>-				READ_BREADCRUMB(dev_priv);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (gt_iir &amp; (GT_USER_INTERRUPT | GT_PIPE_NOTIFY))</div><div class='del'>-		notify_ring(dev, &amp;dev_priv-&gt;ring[RCS]);</div><div class='del'>-	if (gt_iir &amp; bsd_usr_interrupt)</div><div class='del'>-		notify_ring(dev, &amp;dev_priv-&gt;ring[VCS]);</div><div class='del'>-	if (gt_iir &amp; GT_BLT_USER_INTERRUPT)</div><div class='del'>-		notify_ring(dev, &amp;dev_priv-&gt;ring[BCS]);</div><div class='add'>+	if (IS_GEN5(dev))</div><div class='add'>+		ilk_gt_irq_handler(dev, dev_priv, gt_iir);</div><div class='add'>+	else</div><div class='add'>+		snb_gt_irq_handler(dev, dev_priv, gt_iir);</div><div class='ctx'> </div><div class='ctx'> 	if (de_iir &amp; DE_GSE)</div><div class='ctx'> 		intel_opregion_gse_intr(dev);</div><div class='hunk'>@@ -629,7 +713,10 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)</div><div class='ctx'> 	if (de_iir &amp; DE_PCH_EVENT) {</div><div class='ctx'> 		if (pch_iir &amp; hotplug_mask)</div><div class='ctx'> 			queue_work(dev_priv-&gt;wq, &amp;dev_priv-&gt;hotplug_work);</div><div class='del'>-		pch_irq_handler(dev);</div><div class='add'>+		if (HAS_PCH_CPT(dev))</div><div class='add'>+			cpt_irq_handler(dev, pch_iir);</div><div class='add'>+		else</div><div class='add'>+			ibx_irq_handler(dev, pch_iir);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (de_iir &amp; DE_PCU_EVENT) {</div><div class='hunk'>@@ -637,25 +724,8 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)</div><div class='ctx'> 		i915_handle_rps_change(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_GEN6(dev) &amp;&amp; pm_iir &amp; GEN6_PM_DEFERRED_EVENTS) {</div><div class='del'>-		/*</div><div class='del'>-		 * IIR bits should never already be set because IMR should</div><div class='del'>-		 * prevent an interrupt from being shown in IIR. The warning</div><div class='del'>-		 * displays a case where we've unsafely cleared</div><div class='del'>-		 * dev_priv-&gt;pm_iir. Although missing an interrupt of the same</div><div class='del'>-		 * type is not a problem, it displays a problem in the logic.</div><div class='del'>-		 *</div><div class='del'>-		 * The mask bit in IMR is cleared by rps_work.</div><div class='del'>-		 */</div><div class='del'>-		unsigned long flags;</div><div class='del'>-		spin_lock_irqsave(&amp;dev_priv-&gt;rps_lock, flags);</div><div class='del'>-		WARN(dev_priv-&gt;pm_iir &amp; pm_iir, "Missed a PM interrupt\n");</div><div class='del'>-		dev_priv-&gt;pm_iir |= pm_iir;</div><div class='del'>-		I915_WRITE(GEN6_PMIMR, dev_priv-&gt;pm_iir);</div><div class='del'>-		POSTING_READ(GEN6_PMIMR);</div><div class='del'>-		spin_unlock_irqrestore(&amp;dev_priv-&gt;rps_lock, flags);</div><div class='del'>-		queue_work(dev_priv-&gt;wq, &amp;dev_priv-&gt;rps_work);</div><div class='del'>-	}</div><div class='add'>+	if (IS_GEN6(dev) &amp;&amp; pm_iir &amp; GEN6_PM_DEFERRED_EVENTS)</div><div class='add'>+		gen6_queue_rps_work(dev_priv, pm_iir);</div><div class='ctx'> </div><div class='ctx'> 	/* should clear PCH hotplug event before clear CPU irq */</div><div class='ctx'> 	I915_WRITE(SDEIIR, pch_iir);</div><div class='hunk'>@@ -691,7 +761,7 @@ static void i915_error_work_func(struct work_struct *work)</div><div class='ctx'> 	if (atomic_read(&amp;dev_priv-&gt;mm.wedged)) {</div><div class='ctx'> 		DRM_DEBUG_DRIVER("resetting chip\n");</div><div class='ctx'> 		kobject_uevent_env(&amp;dev-&gt;primary-&gt;kdev.kobj, KOBJ_CHANGE, reset_event);</div><div class='del'>-		if (!i915_reset(dev, GRDOM_RENDER)) {</div><div class='add'>+		if (!i915_reset(dev)) {</div><div class='ctx'> 			atomic_set(&amp;dev_priv-&gt;mm.wedged, 0);</div><div class='ctx'> 			kobject_uevent_env(&amp;dev-&gt;primary-&gt;kdev.kobj, KOBJ_CHANGE, reset_done_event);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -727,7 +797,8 @@ i915_error_object_create(struct drm_i915_private *dev_priv,</div><div class='ctx'> 			goto unwind;</div><div class='ctx'> </div><div class='ctx'> 		local_irq_save(flags);</div><div class='del'>-		if (reloc_offset &lt; dev_priv-&gt;mm.gtt_mappable_end) {</div><div class='add'>+		if (reloc_offset &lt; dev_priv-&gt;mm.gtt_mappable_end &amp;&amp;</div><div class='add'>+		    src-&gt;has_global_gtt_mapping) {</div><div class='ctx'> 			void __iomem *s;</div><div class='ctx'> </div><div class='ctx'> 			/* Simply ignore tiling or any overlapping fence.</div><div class='hunk'>@@ -782,10 +853,11 @@ i915_error_object_free(struct drm_i915_error_object *obj)</div><div class='ctx'> 	kfree(obj);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-i915_error_state_free(struct drm_device *dev,</div><div class='del'>-		      struct drm_i915_error_state *error)</div><div class='add'>+void</div><div class='add'>+i915_error_state_free(struct kref *error_ref)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_error_state *error = container_of(error_ref,</div><div class='add'>+							  typeof(*error), ref);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(error-&gt;ring); i++) {</div><div class='hunk'>@@ -798,37 +870,56 @@ i915_error_state_free(struct drm_device *dev,</div><div class='ctx'> 	kfree(error-&gt;overlay);</div><div class='ctx'> 	kfree(error);</div><div class='ctx'> }</div><div class='add'>+static void capture_bo(struct drm_i915_error_buffer *err,</div><div class='add'>+		       struct drm_i915_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	err-&gt;size = obj-&gt;base.size;</div><div class='add'>+	err-&gt;name = obj-&gt;base.name;</div><div class='add'>+	err-&gt;seqno = obj-&gt;last_rendering_seqno;</div><div class='add'>+	err-&gt;gtt_offset = obj-&gt;gtt_offset;</div><div class='add'>+	err-&gt;read_domains = obj-&gt;base.read_domains;</div><div class='add'>+	err-&gt;write_domain = obj-&gt;base.write_domain;</div><div class='add'>+	err-&gt;fence_reg = obj-&gt;fence_reg;</div><div class='add'>+	err-&gt;pinned = 0;</div><div class='add'>+	if (obj-&gt;pin_count &gt; 0)</div><div class='add'>+		err-&gt;pinned = 1;</div><div class='add'>+	if (obj-&gt;user_pin_count &gt; 0)</div><div class='add'>+		err-&gt;pinned = -1;</div><div class='add'>+	err-&gt;tiling = obj-&gt;tiling_mode;</div><div class='add'>+	err-&gt;dirty = obj-&gt;dirty;</div><div class='add'>+	err-&gt;purgeable = obj-&gt;madv != I915_MADV_WILLNEED;</div><div class='add'>+	err-&gt;ring = obj-&gt;ring ? obj-&gt;ring-&gt;id : -1;</div><div class='add'>+	err-&gt;cache_level = obj-&gt;cache_level;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static u32 capture_bo_list(struct drm_i915_error_buffer *err,</div><div class='del'>-			   int count,</div><div class='del'>-			   struct list_head *head)</div><div class='add'>+static u32 capture_active_bo(struct drm_i915_error_buffer *err,</div><div class='add'>+			     int count, struct list_head *head)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(obj, head, mm_list) {</div><div class='del'>-		err-&gt;size = obj-&gt;base.size;</div><div class='del'>-		err-&gt;name = obj-&gt;base.name;</div><div class='del'>-		err-&gt;seqno = obj-&gt;last_rendering_seqno;</div><div class='del'>-		err-&gt;gtt_offset = obj-&gt;gtt_offset;</div><div class='del'>-		err-&gt;read_domains = obj-&gt;base.read_domains;</div><div class='del'>-		err-&gt;write_domain = obj-&gt;base.write_domain;</div><div class='del'>-		err-&gt;fence_reg = obj-&gt;fence_reg;</div><div class='del'>-		err-&gt;pinned = 0;</div><div class='del'>-		if (obj-&gt;pin_count &gt; 0)</div><div class='del'>-			err-&gt;pinned = 1;</div><div class='del'>-		if (obj-&gt;user_pin_count &gt; 0)</div><div class='del'>-			err-&gt;pinned = -1;</div><div class='del'>-		err-&gt;tiling = obj-&gt;tiling_mode;</div><div class='del'>-		err-&gt;dirty = obj-&gt;dirty;</div><div class='del'>-		err-&gt;purgeable = obj-&gt;madv != I915_MADV_WILLNEED;</div><div class='del'>-		err-&gt;ring = obj-&gt;ring ? obj-&gt;ring-&gt;id : -1;</div><div class='del'>-		err-&gt;cache_level = obj-&gt;cache_level;</div><div class='del'>-</div><div class='add'>+		capture_bo(err++, obj);</div><div class='ctx'> 		if (++i == count)</div><div class='ctx'> 			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		err++;</div><div class='add'>+static u32 capture_pinned_bo(struct drm_i915_error_buffer *err,</div><div class='add'>+			     int count, struct list_head *head)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_gem_object *obj;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(obj, head, gtt_list) {</div><div class='add'>+		if (obj-&gt;pin_count == 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		capture_bo(err++, obj);</div><div class='add'>+		if (++i == count)</div><div class='add'>+			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return i;</div><div class='hunk'>@@ -901,7 +992,6 @@ static void i915_record_ring_state(struct drm_device *dev,</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> </div><div class='ctx'> 	if (INTEL_INFO(dev)-&gt;gen &gt;= 6) {</div><div class='del'>-		error-&gt;faddr[ring-&gt;id] = I915_READ(RING_DMA_FADD(ring-&gt;mmio_base));</div><div class='ctx'> 		error-&gt;fault_reg[ring-&gt;id] = I915_READ(RING_FAULT_REG(ring));</div><div class='ctx'> 		error-&gt;semaphore_mboxes[ring-&gt;id][0]</div><div class='ctx'> 			= I915_READ(RING_SYNC_0(ring-&gt;mmio_base));</div><div class='hunk'>@@ -910,6 +1000,7 @@ static void i915_record_ring_state(struct drm_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (INTEL_INFO(dev)-&gt;gen &gt;= 4) {</div><div class='add'>+		error-&gt;faddr[ring-&gt;id] = I915_READ(RING_DMA_FADD(ring-&gt;mmio_base));</div><div class='ctx'> 		error-&gt;ipeir[ring-&gt;id] = I915_READ(RING_IPEIR(ring-&gt;mmio_base));</div><div class='ctx'> 		error-&gt;ipehr[ring-&gt;id] = I915_READ(RING_IPEHR(ring-&gt;mmio_base));</div><div class='ctx'> 		error-&gt;instdone[ring-&gt;id] = I915_READ(RING_INSTDONE(ring-&gt;mmio_base));</div><div class='hunk'>@@ -919,11 +1010,13 @@ static void i915_record_ring_state(struct drm_device *dev,</div><div class='ctx'> 			error-&gt;bbaddr = I915_READ64(BB_ADDR);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='add'>+		error-&gt;faddr[ring-&gt;id] = I915_READ(DMA_FADD_I8XX);</div><div class='ctx'> 		error-&gt;ipeir[ring-&gt;id] = I915_READ(IPEIR);</div><div class='ctx'> 		error-&gt;ipehr[ring-&gt;id] = I915_READ(IPEHR);</div><div class='ctx'> 		error-&gt;instdone[ring-&gt;id] = I915_READ(INSTDONE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	error-&gt;waiting[ring-&gt;id] = waitqueue_active(&amp;ring-&gt;irq_queue);</div><div class='ctx'> 	error-&gt;instpm[ring-&gt;id] = I915_READ(RING_INSTPM(ring-&gt;mmio_base));</div><div class='ctx'> 	error-&gt;seqno[ring-&gt;id] = ring-&gt;get_seqno(ring);</div><div class='ctx'> 	error-&gt;acthd[ring-&gt;id] = intel_ring_get_active_head(ring);</div><div class='hunk'>@@ -938,15 +1031,11 @@ static void i915_gem_record_rings(struct drm_device *dev,</div><div class='ctx'> 				  struct drm_i915_error_state *error)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_ring_buffer *ring;</div><div class='ctx'> 	struct drm_i915_gem_request *request;</div><div class='ctx'> 	int i, count;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; I915_NUM_RINGS; i++) {</div><div class='del'>-		struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[i];</div><div class='del'>-</div><div class='del'>-		if (ring-&gt;obj == NULL)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='add'>+	for_each_ring(ring, dev_priv, i) {</div><div class='ctx'> 		i915_record_ring_state(dev, error, ring);</div><div class='ctx'> </div><div class='ctx'> 		error-&gt;ring[i].batchbuffer =</div><div class='hunk'>@@ -1013,8 +1102,19 @@ static void i915_capture_error_state(struct drm_device *dev)</div><div class='ctx'> 	DRM_INFO("capturing error event; look for more information in /debug/dri/%d/i915_error_state\n",</div><div class='ctx'> 		 dev-&gt;primary-&gt;index);</div><div class='ctx'> </div><div class='add'>+	kref_init(&amp;error-&gt;ref);</div><div class='ctx'> 	error-&gt;eir = I915_READ(EIR);</div><div class='ctx'> 	error-&gt;pgtbl_er = I915_READ(PGTBL_ER);</div><div class='add'>+</div><div class='add'>+	if (HAS_PCH_SPLIT(dev))</div><div class='add'>+		error-&gt;ier = I915_READ(DEIER) | I915_READ(GTIER);</div><div class='add'>+	else if (IS_VALLEYVIEW(dev))</div><div class='add'>+		error-&gt;ier = I915_READ(GTIER) | I915_READ(VLV_IER);</div><div class='add'>+	else if (IS_GEN2(dev))</div><div class='add'>+		error-&gt;ier = I915_READ16(IER);</div><div class='add'>+	else</div><div class='add'>+		error-&gt;ier = I915_READ(IER);</div><div class='add'>+</div><div class='ctx'> 	for_each_pipe(pipe)</div><div class='ctx'> 		error-&gt;pipestat[pipe] = I915_READ(PIPESTAT(pipe));</div><div class='ctx'> </div><div class='hunk'>@@ -1034,8 +1134,9 @@ static void i915_capture_error_state(struct drm_device *dev)</div><div class='ctx'> 	list_for_each_entry(obj, &amp;dev_priv-&gt;mm.active_list, mm_list)</div><div class='ctx'> 		i++;</div><div class='ctx'> 	error-&gt;active_bo_count = i;</div><div class='del'>-	list_for_each_entry(obj, &amp;dev_priv-&gt;mm.pinned_list, mm_list)</div><div class='del'>-		i++;</div><div class='add'>+	list_for_each_entry(obj, &amp;dev_priv-&gt;mm.gtt_list, gtt_list)</div><div class='add'>+		if (obj-&gt;pin_count)</div><div class='add'>+			i++;</div><div class='ctx'> 	error-&gt;pinned_bo_count = i - error-&gt;active_bo_count;</div><div class='ctx'> </div><div class='ctx'> 	error-&gt;active_bo = NULL;</div><div class='hunk'>@@ -1050,15 +1151,15 @@ static void i915_capture_error_state(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (error-&gt;active_bo)</div><div class='ctx'> 		error-&gt;active_bo_count =</div><div class='del'>-			capture_bo_list(error-&gt;active_bo,</div><div class='del'>-					error-&gt;active_bo_count,</div><div class='del'>-					&amp;dev_priv-&gt;mm.active_list);</div><div class='add'>+			capture_active_bo(error-&gt;active_bo,</div><div class='add'>+					  error-&gt;active_bo_count,</div><div class='add'>+					  &amp;dev_priv-&gt;mm.active_list);</div><div class='ctx'> </div><div class='ctx'> 	if (error-&gt;pinned_bo)</div><div class='ctx'> 		error-&gt;pinned_bo_count =</div><div class='del'>-			capture_bo_list(error-&gt;pinned_bo,</div><div class='del'>-					error-&gt;pinned_bo_count,</div><div class='del'>-					&amp;dev_priv-&gt;mm.pinned_list);</div><div class='add'>+			capture_pinned_bo(error-&gt;pinned_bo,</div><div class='add'>+					  error-&gt;pinned_bo_count,</div><div class='add'>+					  &amp;dev_priv-&gt;mm.gtt_list);</div><div class='ctx'> </div><div class='ctx'> 	do_gettimeofday(&amp;error-&gt;time);</div><div class='ctx'> </div><div class='hunk'>@@ -1073,7 +1174,7 @@ static void i915_capture_error_state(struct drm_device *dev)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;error_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (error)</div><div class='del'>-		i915_error_state_free(dev, error);</div><div class='add'>+		i915_error_state_free(&amp;error-&gt;ref);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void i915_destroy_error_state(struct drm_device *dev)</div><div class='hunk'>@@ -1088,7 +1189,7 @@ void i915_destroy_error_state(struct drm_device *dev)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;error_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (error)</div><div class='del'>-		i915_error_state_free(dev, error);</div><div class='add'>+		kref_put(&amp;error-&gt;ref, i915_error_state_free);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> #define i915_capture_error_state(x)</div><div class='hunk'>@@ -1103,33 +1204,26 @@ static void i915_report_and_clear_eir(struct drm_device *dev)</div><div class='ctx'> 	if (!eir)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_ERR "render error detected, EIR: 0x%08x\n",</div><div class='del'>-	       eir);</div><div class='add'>+	pr_err("render error detected, EIR: 0x%08x\n", eir);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_G4X(dev)) {</div><div class='ctx'> 		if (eir &amp; (GM45_ERROR_MEM_PRIV | GM45_ERROR_CP_PRIV)) {</div><div class='ctx'> 			u32 ipeir = I915_READ(IPEIR_I965);</div><div class='ctx'> </div><div class='del'>-			printk(KERN_ERR "  IPEIR: 0x%08x\n",</div><div class='del'>-			       I915_READ(IPEIR_I965));</div><div class='del'>-			printk(KERN_ERR "  IPEHR: 0x%08x\n",</div><div class='del'>-			       I915_READ(IPEHR_I965));</div><div class='del'>-			printk(KERN_ERR "  INSTDONE: 0x%08x\n",</div><div class='add'>+			pr_err("  IPEIR: 0x%08x\n", I915_READ(IPEIR_I965));</div><div class='add'>+			pr_err("  IPEHR: 0x%08x\n", I915_READ(IPEHR_I965));</div><div class='add'>+			pr_err("  INSTDONE: 0x%08x\n",</div><div class='ctx'> 			       I915_READ(INSTDONE_I965));</div><div class='del'>-			printk(KERN_ERR "  INSTPS: 0x%08x\n",</div><div class='del'>-			       I915_READ(INSTPS));</div><div class='del'>-			printk(KERN_ERR "  INSTDONE1: 0x%08x\n",</div><div class='del'>-			       I915_READ(INSTDONE1));</div><div class='del'>-			printk(KERN_ERR "  ACTHD: 0x%08x\n",</div><div class='del'>-			       I915_READ(ACTHD_I965));</div><div class='add'>+			pr_err("  INSTPS: 0x%08x\n", I915_READ(INSTPS));</div><div class='add'>+			pr_err("  INSTDONE1: 0x%08x\n", I915_READ(INSTDONE1));</div><div class='add'>+			pr_err("  ACTHD: 0x%08x\n", I915_READ(ACTHD_I965));</div><div class='ctx'> 			I915_WRITE(IPEIR_I965, ipeir);</div><div class='ctx'> 			POSTING_READ(IPEIR_I965);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (eir &amp; GM45_ERROR_PAGE_TABLE) {</div><div class='ctx'> 			u32 pgtbl_err = I915_READ(PGTBL_ER);</div><div class='del'>-			printk(KERN_ERR "page table error\n");</div><div class='del'>-			printk(KERN_ERR "  PGTBL_ER: 0x%08x\n",</div><div class='del'>-			       pgtbl_err);</div><div class='add'>+			pr_err("page table error\n");</div><div class='add'>+			pr_err("  PGTBL_ER: 0x%08x\n", pgtbl_err);</div><div class='ctx'> 			I915_WRITE(PGTBL_ER, pgtbl_err);</div><div class='ctx'> 			POSTING_READ(PGTBL_ER);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1138,53 +1232,42 @@ static void i915_report_and_clear_eir(struct drm_device *dev)</div><div class='ctx'> 	if (!IS_GEN2(dev)) {</div><div class='ctx'> 		if (eir &amp; I915_ERROR_PAGE_TABLE) {</div><div class='ctx'> 			u32 pgtbl_err = I915_READ(PGTBL_ER);</div><div class='del'>-			printk(KERN_ERR "page table error\n");</div><div class='del'>-			printk(KERN_ERR "  PGTBL_ER: 0x%08x\n",</div><div class='del'>-			       pgtbl_err);</div><div class='add'>+			pr_err("page table error\n");</div><div class='add'>+			pr_err("  PGTBL_ER: 0x%08x\n", pgtbl_err);</div><div class='ctx'> 			I915_WRITE(PGTBL_ER, pgtbl_err);</div><div class='ctx'> 			POSTING_READ(PGTBL_ER);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (eir &amp; I915_ERROR_MEMORY_REFRESH) {</div><div class='del'>-		printk(KERN_ERR "memory refresh error:\n");</div><div class='add'>+		pr_err("memory refresh error:\n");</div><div class='ctx'> 		for_each_pipe(pipe)</div><div class='del'>-			printk(KERN_ERR "pipe %c stat: 0x%08x\n",</div><div class='add'>+			pr_err("pipe %c stat: 0x%08x\n",</div><div class='ctx'> 			       pipe_name(pipe), I915_READ(PIPESTAT(pipe)));</div><div class='ctx'> 		/* pipestat has already been acked */</div><div class='ctx'> 	}</div><div class='ctx'> 	if (eir &amp; I915_ERROR_INSTRUCTION) {</div><div class='del'>-		printk(KERN_ERR "instruction error\n");</div><div class='del'>-		printk(KERN_ERR "  INSTPM: 0x%08x\n",</div><div class='del'>-		       I915_READ(INSTPM));</div><div class='add'>+		pr_err("instruction error\n");</div><div class='add'>+		pr_err("  INSTPM: 0x%08x\n", I915_READ(INSTPM));</div><div class='ctx'> 		if (INTEL_INFO(dev)-&gt;gen &lt; 4) {</div><div class='ctx'> 			u32 ipeir = I915_READ(IPEIR);</div><div class='ctx'> </div><div class='del'>-			printk(KERN_ERR "  IPEIR: 0x%08x\n",</div><div class='del'>-			       I915_READ(IPEIR));</div><div class='del'>-			printk(KERN_ERR "  IPEHR: 0x%08x\n",</div><div class='del'>-			       I915_READ(IPEHR));</div><div class='del'>-			printk(KERN_ERR "  INSTDONE: 0x%08x\n",</div><div class='del'>-			       I915_READ(INSTDONE));</div><div class='del'>-			printk(KERN_ERR "  ACTHD: 0x%08x\n",</div><div class='del'>-			       I915_READ(ACTHD));</div><div class='add'>+			pr_err("  IPEIR: 0x%08x\n", I915_READ(IPEIR));</div><div class='add'>+			pr_err("  IPEHR: 0x%08x\n", I915_READ(IPEHR));</div><div class='add'>+			pr_err("  INSTDONE: 0x%08x\n", I915_READ(INSTDONE));</div><div class='add'>+			pr_err("  ACTHD: 0x%08x\n", I915_READ(ACTHD));</div><div class='ctx'> 			I915_WRITE(IPEIR, ipeir);</div><div class='ctx'> 			POSTING_READ(IPEIR);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			u32 ipeir = I915_READ(IPEIR_I965);</div><div class='ctx'> </div><div class='del'>-			printk(KERN_ERR "  IPEIR: 0x%08x\n",</div><div class='del'>-			       I915_READ(IPEIR_I965));</div><div class='del'>-			printk(KERN_ERR "  IPEHR: 0x%08x\n",</div><div class='del'>-			       I915_READ(IPEHR_I965));</div><div class='del'>-			printk(KERN_ERR "  INSTDONE: 0x%08x\n",</div><div class='add'>+			pr_err("  IPEIR: 0x%08x\n", I915_READ(IPEIR_I965));</div><div class='add'>+			pr_err("  IPEHR: 0x%08x\n", I915_READ(IPEHR_I965));</div><div class='add'>+			pr_err("  INSTDONE: 0x%08x\n",</div><div class='ctx'> 			       I915_READ(INSTDONE_I965));</div><div class='del'>-			printk(KERN_ERR "  INSTPS: 0x%08x\n",</div><div class='del'>-			       I915_READ(INSTPS));</div><div class='del'>-			printk(KERN_ERR "  INSTDONE1: 0x%08x\n",</div><div class='del'>-			       I915_READ(INSTDONE1));</div><div class='del'>-			printk(KERN_ERR "  ACTHD: 0x%08x\n",</div><div class='del'>-			       I915_READ(ACTHD_I965));</div><div class='add'>+			pr_err("  INSTPS: 0x%08x\n", I915_READ(INSTPS));</div><div class='add'>+			pr_err("  INSTDONE1: 0x%08x\n", I915_READ(INSTDONE1));</div><div class='add'>+			pr_err("  ACTHD: 0x%08x\n", I915_READ(ACTHD_I965));</div><div class='ctx'> 			I915_WRITE(IPEIR_I965, ipeir);</div><div class='ctx'> 			POSTING_READ(IPEIR_I965);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1217,6 +1300,8 @@ static void i915_report_and_clear_eir(struct drm_device *dev)</div><div class='ctx'> void i915_handle_error(struct drm_device *dev, bool wedged)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_ring_buffer *ring;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	i915_capture_error_state(dev);</div><div class='ctx'> 	i915_report_and_clear_eir(dev);</div><div class='hunk'>@@ -1228,11 +1313,8 @@ void i915_handle_error(struct drm_device *dev, bool wedged)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Wakeup waiting processes so they don't hang</div><div class='ctx'> 		 */</div><div class='del'>-		wake_up_all(&amp;dev_priv-&gt;ring[RCS].irq_queue);</div><div class='del'>-		if (HAS_BSD(dev))</div><div class='del'>-			wake_up_all(&amp;dev_priv-&gt;ring[VCS].irq_queue);</div><div class='del'>-		if (HAS_BLT(dev))</div><div class='del'>-			wake_up_all(&amp;dev_priv-&gt;ring[BCS].irq_queue);</div><div class='add'>+		for_each_ring(ring, dev_priv, i)</div><div class='add'>+			wake_up_all(&amp;ring-&gt;irq_queue);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	queue_work(dev_priv-&gt;wq, &amp;dev_priv-&gt;error_work);</div><div class='hunk'>@@ -1265,7 +1347,8 @@ static void i915_pageflip_stall_check(struct drm_device *dev, int pipe)</div><div class='ctx'> 	obj = work-&gt;pending_flip_obj;</div><div class='ctx'> 	if (INTEL_INFO(dev)-&gt;gen &gt;= 4) {</div><div class='ctx'> 		int dspsurf = DSPSURF(intel_crtc-&gt;plane);</div><div class='del'>-		stall_detected = I915_READ(dspsurf) == obj-&gt;gtt_offset;</div><div class='add'>+		stall_detected = I915_HI_DISPBASE(I915_READ(dspsurf)) ==</div><div class='add'>+					obj-&gt;gtt_offset;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		int dspaddr = DSPADDR(intel_crtc-&gt;plane);</div><div class='ctx'> 		stall_detected = I915_READ(dspaddr) == (obj-&gt;gtt_offset +</div><div class='hunk'>@@ -1281,248 +1364,6 @@ static void i915_pageflip_stall_check(struct drm_device *dev, int pipe)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)</div><div class='del'>-{</div><div class='del'>-	struct drm_device *dev = (struct drm_device *) arg;</div><div class='del'>-	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='del'>-	struct drm_i915_master_private *master_priv;</div><div class='del'>-	u32 iir, new_iir;</div><div class='del'>-	u32 pipe_stats[I915_MAX_PIPES];</div><div class='del'>-	u32 vblank_status;</div><div class='del'>-	int vblank = 0;</div><div class='del'>-	unsigned long irqflags;</div><div class='del'>-	int irq_received;</div><div class='del'>-	int ret = IRQ_NONE, pipe;</div><div class='del'>-	bool blc_event = false;</div><div class='del'>-</div><div class='del'>-	atomic_inc(&amp;dev_priv-&gt;irq_received);</div><div class='del'>-</div><div class='del'>-	iir = I915_READ(IIR);</div><div class='del'>-</div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen &gt;= 4)</div><div class='del'>-		vblank_status = PIPE_START_VBLANK_INTERRUPT_STATUS;</div><div class='del'>-	else</div><div class='del'>-		vblank_status = PIPE_VBLANK_INTERRUPT_STATUS;</div><div class='del'>-</div><div class='del'>-	for (;;) {</div><div class='del'>-		irq_received = iir != 0;</div><div class='del'>-</div><div class='del'>-		/* Can't rely on pipestat interrupt bit in iir as it might</div><div class='del'>-		 * have been cleared after the pipestat interrupt was received.</div><div class='del'>-		 * It doesn't set the bit in iir again, but it still produces</div><div class='del'>-		 * interrupts (for non-MSI).</div><div class='del'>-		 */</div><div class='del'>-		spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='del'>-		if (iir &amp; I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)</div><div class='del'>-			i915_handle_error(dev, false);</div><div class='del'>-</div><div class='del'>-		for_each_pipe(pipe) {</div><div class='del'>-			int reg = PIPESTAT(pipe);</div><div class='del'>-			pipe_stats[pipe] = I915_READ(reg);</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Clear the PIPE*STAT regs before the IIR</div><div class='del'>-			 */</div><div class='del'>-			if (pipe_stats[pipe] &amp; 0x8000ffff) {</div><div class='del'>-				if (pipe_stats[pipe] &amp; PIPE_FIFO_UNDERRUN_STATUS)</div><div class='del'>-					DRM_DEBUG_DRIVER("pipe %c underrun\n",</div><div class='del'>-							 pipe_name(pipe));</div><div class='del'>-				I915_WRITE(reg, pipe_stats[pipe]);</div><div class='del'>-				irq_received = 1;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='del'>-</div><div class='del'>-		if (!irq_received)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		ret = IRQ_HANDLED;</div><div class='del'>-</div><div class='del'>-		/* Consume port.  Then clear IIR or we'll miss events */</div><div class='del'>-		if ((I915_HAS_HOTPLUG(dev)) &amp;&amp;</div><div class='del'>-		    (iir &amp; I915_DISPLAY_PORT_INTERRUPT)) {</div><div class='del'>-			u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);</div><div class='del'>-</div><div class='del'>-			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",</div><div class='del'>-				  hotplug_status);</div><div class='del'>-			if (hotplug_status &amp; dev_priv-&gt;hotplug_supported_mask)</div><div class='del'>-				queue_work(dev_priv-&gt;wq,</div><div class='del'>-					   &amp;dev_priv-&gt;hotplug_work);</div><div class='del'>-</div><div class='del'>-			I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);</div><div class='del'>-			I915_READ(PORT_HOTPLUG_STAT);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		I915_WRITE(IIR, iir);</div><div class='del'>-		new_iir = I915_READ(IIR); /* Flush posted writes */</div><div class='del'>-</div><div class='del'>-		if (dev-&gt;primary-&gt;master) {</div><div class='del'>-			master_priv = dev-&gt;primary-&gt;master-&gt;driver_priv;</div><div class='del'>-			if (master_priv-&gt;sarea_priv)</div><div class='del'>-				master_priv-&gt;sarea_priv-&gt;last_dispatch =</div><div class='del'>-					READ_BREADCRUMB(dev_priv);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (iir &amp; I915_USER_INTERRUPT)</div><div class='del'>-			notify_ring(dev, &amp;dev_priv-&gt;ring[RCS]);</div><div class='del'>-		if (iir &amp; I915_BSD_USER_INTERRUPT)</div><div class='del'>-			notify_ring(dev, &amp;dev_priv-&gt;ring[VCS]);</div><div class='del'>-</div><div class='del'>-		if (iir &amp; I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT) {</div><div class='del'>-			intel_prepare_page_flip(dev, 0);</div><div class='del'>-			if (dev_priv-&gt;flip_pending_is_done)</div><div class='del'>-				intel_finish_page_flip_plane(dev, 0);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (iir &amp; I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT) {</div><div class='del'>-			intel_prepare_page_flip(dev, 1);</div><div class='del'>-			if (dev_priv-&gt;flip_pending_is_done)</div><div class='del'>-				intel_finish_page_flip_plane(dev, 1);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		for_each_pipe(pipe) {</div><div class='del'>-			if (pipe_stats[pipe] &amp; vblank_status &amp;&amp;</div><div class='del'>-			    drm_handle_vblank(dev, pipe)) {</div><div class='del'>-				vblank++;</div><div class='del'>-				if (!dev_priv-&gt;flip_pending_is_done) {</div><div class='del'>-					i915_pageflip_stall_check(dev, pipe);</div><div class='del'>-					intel_finish_page_flip(dev, pipe);</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (pipe_stats[pipe] &amp; PIPE_LEGACY_BLC_EVENT_STATUS)</div><div class='del'>-				blc_event = true;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		if (blc_event || (iir &amp; I915_ASLE_INTERRUPT))</div><div class='del'>-			intel_opregion_asle_intr(dev);</div><div class='del'>-</div><div class='del'>-		/* With MSI, interrupts are only generated when iir</div><div class='del'>-		 * transitions from zero to nonzero.  If another bit got</div><div class='del'>-		 * set while we were handling the existing iir bits, then</div><div class='del'>-		 * we would never get another interrupt.</div><div class='del'>-		 *</div><div class='del'>-		 * This is fine on non-MSI as well, as if we hit this path</div><div class='del'>-		 * we avoid exiting the interrupt handler only to generate</div><div class='del'>-		 * another one.</div><div class='del'>-		 *</div><div class='del'>-		 * Note that for MSI this could cause a stray interrupt report</div><div class='del'>-		 * if an interrupt landed in the time between writing IIR and</div><div class='del'>-		 * the posting read.  This should be rare enough to never</div><div class='del'>-		 * trigger the 99% of 100,000 interrupts test for disabling</div><div class='del'>-		 * stray interrupts.</div><div class='del'>-		 */</div><div class='del'>-		iir = new_iir;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int i915_emit_irq(struct drm_device * dev)</div><div class='del'>-{</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_i915_master_private *master_priv = dev-&gt;primary-&gt;master-&gt;driver_priv;</div><div class='del'>-</div><div class='del'>-	i915_kernel_lost_context(dev);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_DRIVER("\n");</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;counter++;</div><div class='del'>-	if (dev_priv-&gt;counter &gt; 0x7FFFFFFFUL)</div><div class='del'>-		dev_priv-&gt;counter = 1;</div><div class='del'>-	if (master_priv-&gt;sarea_priv)</div><div class='del'>-		master_priv-&gt;sarea_priv-&gt;last_enqueue = dev_priv-&gt;counter;</div><div class='del'>-</div><div class='del'>-	if (BEGIN_LP_RING(4) == 0) {</div><div class='del'>-		OUT_RING(MI_STORE_DWORD_INDEX);</div><div class='del'>-		OUT_RING(I915_BREADCRUMB_INDEX &lt;&lt; MI_STORE_DWORD_INDEX_SHIFT);</div><div class='del'>-		OUT_RING(dev_priv-&gt;counter);</div><div class='del'>-		OUT_RING(MI_USER_INTERRUPT);</div><div class='del'>-		ADVANCE_LP_RING();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return dev_priv-&gt;counter;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int i915_wait_irq(struct drm_device * dev, int irq_nr)</div><div class='del'>-{</div><div class='del'>-	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='del'>-	struct drm_i915_master_private *master_priv = dev-&gt;primary-&gt;master-&gt;driver_priv;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct intel_ring_buffer *ring = LP_RING(dev_priv);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_DRIVER("irq_nr=%d breadcrumb=%d\n", irq_nr,</div><div class='del'>-		  READ_BREADCRUMB(dev_priv));</div><div class='del'>-</div><div class='del'>-	if (READ_BREADCRUMB(dev_priv) &gt;= irq_nr) {</div><div class='del'>-		if (master_priv-&gt;sarea_priv)</div><div class='del'>-			master_priv-&gt;sarea_priv-&gt;last_dispatch = READ_BREADCRUMB(dev_priv);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (master_priv-&gt;sarea_priv)</div><div class='del'>-		master_priv-&gt;sarea_priv-&gt;perf_boxes |= I915_BOX_WAIT;</div><div class='del'>-</div><div class='del'>-	if (ring-&gt;irq_get(ring)) {</div><div class='del'>-		DRM_WAIT_ON(ret, ring-&gt;irq_queue, 3 * DRM_HZ,</div><div class='del'>-			    READ_BREADCRUMB(dev_priv) &gt;= irq_nr);</div><div class='del'>-		ring-&gt;irq_put(ring);</div><div class='del'>-	} else if (wait_for(READ_BREADCRUMB(dev_priv) &gt;= irq_nr, 3000))</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-</div><div class='del'>-	if (ret == -EBUSY) {</div><div class='del'>-		DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",</div><div class='del'>-			  READ_BREADCRUMB(dev_priv), (int)dev_priv-&gt;counter);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Needs the lock as it touches the ring.</div><div class='del'>- */</div><div class='del'>-int i915_irq_emit(struct drm_device *dev, void *data,</div><div class='del'>-			 struct drm_file *file_priv)</div><div class='del'>-{</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	drm_i915_irq_emit_t *emit = data;</div><div class='del'>-	int result;</div><div class='del'>-</div><div class='del'>-	if (!dev_priv || !LP_RING(dev_priv)-&gt;virtual_start) {</div><div class='del'>-		DRM_ERROR("called with no initialization\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	result = i915_emit_irq(dev);</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-</div><div class='del'>-	if (DRM_COPY_TO_USER(emit-&gt;irq_seq, &amp;result, sizeof(int))) {</div><div class='del'>-		DRM_ERROR("copy_to_user\n");</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Doesn't need the hardware lock.</div><div class='del'>- */</div><div class='del'>-int i915_irq_wait(struct drm_device *dev, void *data,</div><div class='del'>-			 struct drm_file *file_priv)</div><div class='del'>-{</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	drm_i915_irq_wait_t *irqwait = data;</div><div class='del'>-</div><div class='del'>-	if (!dev_priv) {</div><div class='del'>-		DRM_ERROR("called with no initialization\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return i915_wait_irq(dev, irqwait-&gt;irq_seq);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Called from drm generic code, passed 'crtc' which</div><div class='ctx'>  * we use as a pipe index</div><div class='ctx'>  */</div><div class='hunk'>@@ -1544,7 +1385,7 @@ static int i915_enable_vblank(struct drm_device *dev, int pipe)</div><div class='ctx'> </div><div class='ctx'> 	/* maintain vblank delivery even in deep C-states */</div><div class='ctx'> 	if (dev_priv-&gt;info-&gt;gen == 3)</div><div class='del'>-		I915_WRITE(INSTPM, INSTPM_AGPBUSY_DIS &lt;&lt; 16);</div><div class='add'>+		I915_WRITE(INSTPM, _MASKED_BIT_DISABLE(INSTPM_AGPBUSY_DIS));</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1575,8 +1416,34 @@ static int ivybridge_enable_vblank(struct drm_device *dev, int pipe)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='del'>-	ironlake_enable_display_irq(dev_priv, (pipe == 0) ?</div><div class='del'>-				    DE_PIPEA_VBLANK_IVB : DE_PIPEB_VBLANK_IVB);</div><div class='add'>+	ironlake_enable_display_irq(dev_priv,</div><div class='add'>+				    DE_PIPEA_VBLANK_IVB &lt;&lt; (5 * pipe));</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int valleyview_enable_vblank(struct drm_device *dev, int pipe)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	unsigned long irqflags;</div><div class='add'>+	u32 dpfl, imr;</div><div class='add'>+</div><div class='add'>+	if (!i915_pipe_enabled(dev, pipe))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='add'>+	dpfl = I915_READ(VLV_DPFLIPSTAT);</div><div class='add'>+	imr = I915_READ(VLV_IMR);</div><div class='add'>+	if (pipe == 0) {</div><div class='add'>+		dpfl |= PIPEA_VBLANK_INT_EN;</div><div class='add'>+		imr &amp;= ~I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT;</div><div class='add'>+	} else {</div><div class='add'>+		dpfl |= PIPEA_VBLANK_INT_EN;</div><div class='add'>+		imr &amp;= ~I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;</div><div class='add'>+	}</div><div class='add'>+	I915_WRITE(VLV_DPFLIPSTAT, dpfl);</div><div class='add'>+	I915_WRITE(VLV_IMR, imr);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1592,8 +1459,7 @@ static void i915_disable_vblank(struct drm_device *dev, int pipe)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='ctx'> 	if (dev_priv-&gt;info-&gt;gen == 3)</div><div class='del'>-		I915_WRITE(INSTPM,</div><div class='del'>-			   INSTPM_AGPBUSY_DIS &lt;&lt; 16 | INSTPM_AGPBUSY_DIS);</div><div class='add'>+		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_AGPBUSY_DIS));</div><div class='ctx'> </div><div class='ctx'> 	i915_disable_pipestat(dev_priv, pipe,</div><div class='ctx'> 			      PIPE_VBLANK_INTERRUPT_ENABLE |</div><div class='hunk'>@@ -1618,63 +1484,30 @@ static void ivybridge_disable_vblank(struct drm_device *dev, int pipe)</div><div class='ctx'> 	unsigned long irqflags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='del'>-	ironlake_disable_display_irq(dev_priv, (pipe == 0) ?</div><div class='del'>-				     DE_PIPEA_VBLANK_IVB : DE_PIPEB_VBLANK_IVB);</div><div class='add'>+	ironlake_disable_display_irq(dev_priv,</div><div class='add'>+				     DE_PIPEA_VBLANK_IVB &lt;&lt; (pipe * 5));</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Set the vblank monitor pipe</div><div class='del'>- */</div><div class='del'>-int i915_vblank_pipe_set(struct drm_device *dev, void *data,</div><div class='del'>-			 struct drm_file *file_priv)</div><div class='del'>-{</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	if (!dev_priv) {</div><div class='del'>-		DRM_ERROR("called with no initialization\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int i915_vblank_pipe_get(struct drm_device *dev, void *data,</div><div class='del'>-			 struct drm_file *file_priv)</div><div class='add'>+static void valleyview_disable_vblank(struct drm_device *dev, int pipe)</div><div class='ctx'> {</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	drm_i915_vblank_pipe_t *pipe = data;</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	unsigned long irqflags;</div><div class='add'>+	u32 dpfl, imr;</div><div class='ctx'> </div><div class='del'>-	if (!dev_priv) {</div><div class='del'>-		DRM_ERROR("called with no initialization\n");</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='add'>+	dpfl = I915_READ(VLV_DPFLIPSTAT);</div><div class='add'>+	imr = I915_READ(VLV_IMR);</div><div class='add'>+	if (pipe == 0) {</div><div class='add'>+		dpfl &amp;= ~PIPEA_VBLANK_INT_EN;</div><div class='add'>+		imr |= I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT;</div><div class='add'>+	} else {</div><div class='add'>+		dpfl &amp;= ~PIPEB_VBLANK_INT_EN;</div><div class='add'>+		imr |= I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	pipe-&gt;pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * Schedule buffer swap at given vertical blank.</div><div class='del'>- */</div><div class='del'>-int i915_vblank_swap(struct drm_device *dev, void *data,</div><div class='del'>-		     struct drm_file *file_priv)</div><div class='del'>-{</div><div class='del'>-	/* The delayed swap mechanism was fundamentally racy, and has been</div><div class='del'>-	 * removed.  The model was that the client requested a delayed flip/swap</div><div class='del'>-	 * from the kernel, then waited for vblank before continuing to perform</div><div class='del'>-	 * rendering.  The problem was that the kernel might wake the client</div><div class='del'>-	 * up before it dispatched the vblank swap (since the lock has to be</div><div class='del'>-	 * held while touching the ringbuffer), in which case the client would</div><div class='del'>-	 * clear and start the next frame before the swap occurred, and</div><div class='del'>-	 * flicker would occur in addition to likely missing the vblank.</div><div class='del'>-	 *</div><div class='del'>-	 * In the absence of this ioctl, userland falls back to a correct path</div><div class='del'>-	 * of waiting for a vblank, then dispatching the swap on its own.</div><div class='del'>-	 * Context switching to userland and back is plenty fast enough for</div><div class='del'>-	 * meeting the requirements of vblank swapping.</div><div class='del'>-	 */</div><div class='del'>-	return -EINVAL;</div><div class='add'>+	I915_WRITE(VLV_IMR, imr);</div><div class='add'>+	I915_WRITE(VLV_DPFLIPSTAT, dpfl);</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32</div><div class='hunk'>@@ -1689,11 +1522,9 @@ static bool i915_hangcheck_ring_idle(struct intel_ring_buffer *ring, bool *err)</div><div class='ctx'> 	if (list_empty(&amp;ring-&gt;request_list) ||</div><div class='ctx'> 	    i915_seqno_passed(ring-&gt;get_seqno(ring), ring_last_seqno(ring))) {</div><div class='ctx'> 		/* Issue a wake-up to catch stuck h/w. */</div><div class='del'>-		if (ring-&gt;waiting_seqno &amp;&amp; waitqueue_active(&amp;ring-&gt;irq_queue)) {</div><div class='del'>-			DRM_ERROR("Hangcheck timer elapsed... %s idle [waiting on %d, at %d], missed IRQ?\n",</div><div class='del'>-				  ring-&gt;name,</div><div class='del'>-				  ring-&gt;waiting_seqno,</div><div class='del'>-				  ring-&gt;get_seqno(ring));</div><div class='add'>+		if (waitqueue_active(&amp;ring-&gt;irq_queue)) {</div><div class='add'>+			DRM_ERROR("Hangcheck timer elapsed... %s idle\n",</div><div class='add'>+				  ring-&gt;name);</div><div class='ctx'> 			wake_up_all(&amp;ring-&gt;irq_queue);</div><div class='ctx'> 			*err = true;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1716,6 +1547,35 @@ static bool kick_ring(struct intel_ring_buffer *ring)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool i915_hangcheck_hung(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;hangcheck_count++ &gt; 1) {</div><div class='add'>+		bool hung = true;</div><div class='add'>+</div><div class='add'>+		DRM_ERROR("Hangcheck timer elapsed... GPU hung\n");</div><div class='add'>+		i915_handle_error(dev, true);</div><div class='add'>+</div><div class='add'>+		if (!IS_GEN2(dev)) {</div><div class='add'>+			struct intel_ring_buffer *ring;</div><div class='add'>+			int i;</div><div class='add'>+</div><div class='add'>+			/* Is the chip hanging on a WAIT_FOR_EVENT?</div><div class='add'>+			 * If so we can simply poke the RB_WAIT bit</div><div class='add'>+			 * and break the hang. This should work on</div><div class='add'>+			 * all but the second generation chipsets.</div><div class='add'>+			 */</div><div class='add'>+			for_each_ring(ring, dev_priv, i)</div><div class='add'>+				hung &amp;= !kick_ring(ring);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return hung;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * This is called when the chip hasn't reported back with completed</div><div class='ctx'>  * batchbuffers in a long time. The first time this is called we simply record</div><div class='hunk'>@@ -1726,19 +1586,31 @@ void i915_hangcheck_elapsed(unsigned long data)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = (struct drm_device *)data;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t acthd, instdone, instdone1, acthd_bsd, acthd_blt;</div><div class='del'>-	bool err = false;</div><div class='add'>+	uint32_t acthd[I915_NUM_RINGS], instdone, instdone1;</div><div class='add'>+	struct intel_ring_buffer *ring;</div><div class='add'>+	bool err = false, idle;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!i915_enable_hangcheck)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	memset(acthd, 0, sizeof(acthd));</div><div class='add'>+	idle = true;</div><div class='add'>+	for_each_ring(ring, dev_priv, i) {</div><div class='add'>+	    idle &amp;= i915_hangcheck_ring_idle(ring, &amp;err);</div><div class='add'>+	    acthd[i] = intel_ring_get_active_head(ring);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* If all work is done then ACTHD clearly hasn't advanced. */</div><div class='del'>-	if (i915_hangcheck_ring_idle(&amp;dev_priv-&gt;ring[RCS], &amp;err) &amp;&amp;</div><div class='del'>-	    i915_hangcheck_ring_idle(&amp;dev_priv-&gt;ring[VCS], &amp;err) &amp;&amp;</div><div class='del'>-	    i915_hangcheck_ring_idle(&amp;dev_priv-&gt;ring[BCS], &amp;err)) {</div><div class='del'>-		dev_priv-&gt;hangcheck_count = 0;</div><div class='del'>-		if (err)</div><div class='add'>+	if (idle) {</div><div class='add'>+		if (err) {</div><div class='add'>+			if (i915_hangcheck_hung(dev))</div><div class='add'>+				return;</div><div class='add'>+</div><div class='ctx'> 			goto repeat;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev_priv-&gt;hangcheck_count = 0;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1749,47 +1621,16 @@ void i915_hangcheck_elapsed(unsigned long data)</div><div class='ctx'> 		instdone = I915_READ(INSTDONE_I965);</div><div class='ctx'> 		instdone1 = I915_READ(INSTDONE1);</div><div class='ctx'> 	}</div><div class='del'>-	acthd = intel_ring_get_active_head(&amp;dev_priv-&gt;ring[RCS]);</div><div class='del'>-	acthd_bsd = HAS_BSD(dev) ?</div><div class='del'>-		intel_ring_get_active_head(&amp;dev_priv-&gt;ring[VCS]) : 0;</div><div class='del'>-	acthd_blt = HAS_BLT(dev) ?</div><div class='del'>-		intel_ring_get_active_head(&amp;dev_priv-&gt;ring[BCS]) : 0;</div><div class='ctx'> </div><div class='del'>-	if (dev_priv-&gt;last_acthd == acthd &amp;&amp;</div><div class='del'>-	    dev_priv-&gt;last_acthd_bsd == acthd_bsd &amp;&amp;</div><div class='del'>-	    dev_priv-&gt;last_acthd_blt == acthd_blt &amp;&amp;</div><div class='add'>+	if (memcmp(dev_priv-&gt;last_acthd, acthd, sizeof(acthd)) == 0 &amp;&amp;</div><div class='ctx'> 	    dev_priv-&gt;last_instdone == instdone &amp;&amp;</div><div class='ctx'> 	    dev_priv-&gt;last_instdone1 == instdone1) {</div><div class='del'>-		if (dev_priv-&gt;hangcheck_count++ &gt; 1) {</div><div class='del'>-			DRM_ERROR("Hangcheck timer elapsed... GPU hung\n");</div><div class='del'>-			i915_handle_error(dev, true);</div><div class='del'>-</div><div class='del'>-			if (!IS_GEN2(dev)) {</div><div class='del'>-				/* Is the chip hanging on a WAIT_FOR_EVENT?</div><div class='del'>-				 * If so we can simply poke the RB_WAIT bit</div><div class='del'>-				 * and break the hang. This should work on</div><div class='del'>-				 * all but the second generation chipsets.</div><div class='del'>-				 */</div><div class='del'>-				if (kick_ring(&amp;dev_priv-&gt;ring[RCS]))</div><div class='del'>-					goto repeat;</div><div class='del'>-</div><div class='del'>-				if (HAS_BSD(dev) &amp;&amp;</div><div class='del'>-				    kick_ring(&amp;dev_priv-&gt;ring[VCS]))</div><div class='del'>-					goto repeat;</div><div class='del'>-</div><div class='del'>-				if (HAS_BLT(dev) &amp;&amp;</div><div class='del'>-				    kick_ring(&amp;dev_priv-&gt;ring[BCS]))</div><div class='del'>-					goto repeat;</div><div class='del'>-			}</div><div class='del'>-</div><div class='add'>+		if (i915_hangcheck_hung(dev))</div><div class='ctx'> 			return;</div><div class='del'>-		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev_priv-&gt;hangcheck_count = 0;</div><div class='ctx'> </div><div class='del'>-		dev_priv-&gt;last_acthd = acthd;</div><div class='del'>-		dev_priv-&gt;last_acthd_bsd = acthd_bsd;</div><div class='del'>-		dev_priv-&gt;last_acthd_blt = acthd_blt;</div><div class='add'>+		memcpy(dev_priv-&gt;last_acthd, acthd, sizeof(acthd));</div><div class='ctx'> 		dev_priv-&gt;last_instdone = instdone;</div><div class='ctx'> 		dev_priv-&gt;last_instdone1 = instdone1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1808,10 +1649,6 @@ static void ironlake_irq_preinstall(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	atomic_set(&amp;dev_priv-&gt;irq_received, 0);</div><div class='ctx'> </div><div class='del'>-	INIT_WORK(&amp;dev_priv-&gt;hotplug_work, i915_hotplug_work_func);</div><div class='del'>-	INIT_WORK(&amp;dev_priv-&gt;error_work, i915_error_work_func);</div><div class='del'>-	if (IS_GEN6(dev) || IS_IVYBRIDGE(dev))</div><div class='del'>-		INIT_WORK(&amp;dev_priv-&gt;rps_work, gen6_pm_rps_work);</div><div class='ctx'> </div><div class='ctx'> 	I915_WRITE(HWSTAM, 0xeffe);</div><div class='ctx'> </div><div class='hunk'>@@ -1832,6 +1669,38 @@ static void ironlake_irq_preinstall(struct drm_device *dev)</div><div class='ctx'> 	POSTING_READ(SDEIER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void valleyview_irq_preinstall(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	int pipe;</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;dev_priv-&gt;irq_received, 0);</div><div class='add'>+</div><div class='add'>+	/* VLV magic */</div><div class='add'>+	I915_WRITE(VLV_IMR, 0);</div><div class='add'>+	I915_WRITE(RING_IMR(RENDER_RING_BASE), 0);</div><div class='add'>+	I915_WRITE(RING_IMR(GEN6_BSD_RING_BASE), 0);</div><div class='add'>+	I915_WRITE(RING_IMR(BLT_RING_BASE), 0);</div><div class='add'>+</div><div class='add'>+	/* and GT */</div><div class='add'>+	I915_WRITE(GTIIR, I915_READ(GTIIR));</div><div class='add'>+	I915_WRITE(GTIIR, I915_READ(GTIIR));</div><div class='add'>+	I915_WRITE(GTIMR, 0xffffffff);</div><div class='add'>+	I915_WRITE(GTIER, 0x0);</div><div class='add'>+	POSTING_READ(GTIER);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(DPINVGTT, 0xff);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(PORT_HOTPLUG_EN, 0);</div><div class='add'>+	I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));</div><div class='add'>+	for_each_pipe(pipe)</div><div class='add'>+		I915_WRITE(PIPESTAT(pipe), 0xffff);</div><div class='add'>+	I915_WRITE(VLV_IIR, 0xffffffff);</div><div class='add'>+	I915_WRITE(VLV_IMR, 0xffffffff);</div><div class='add'>+	I915_WRITE(VLV_IER, 0x0);</div><div class='add'>+	POSTING_READ(VLV_IER);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Enable digital hotplug on the PCH, and configure the DP short pulse</div><div class='ctx'>  * duration to 2ms (which is the minimum in the Display Port spec)</div><div class='hunk'>@@ -1861,13 +1730,6 @@ static int ironlake_irq_postinstall(struct drm_device *dev)</div><div class='ctx'> 	u32 render_irqs;</div><div class='ctx'> 	u32 hotplug_mask;</div><div class='ctx'> </div><div class='del'>-	DRM_INIT_WAITQUEUE(&amp;dev_priv-&gt;ring[RCS].irq_queue);</div><div class='del'>-	if (HAS_BSD(dev))</div><div class='del'>-		DRM_INIT_WAITQUEUE(&amp;dev_priv-&gt;ring[VCS].irq_queue);</div><div class='del'>-	if (HAS_BLT(dev))</div><div class='del'>-		DRM_INIT_WAITQUEUE(&amp;dev_priv-&gt;ring[BCS].irq_queue);</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;</div><div class='ctx'> 	dev_priv-&gt;irq_mask = ~display_mask;</div><div class='ctx'> </div><div class='ctx'> 	/* should always can generate irq */</div><div class='hunk'>@@ -1884,8 +1746,8 @@ static int ironlake_irq_postinstall(struct drm_device *dev)</div><div class='ctx'> 	if (IS_GEN6(dev))</div><div class='ctx'> 		render_irqs =</div><div class='ctx'> 			GT_USER_INTERRUPT |</div><div class='del'>-			GT_GEN6_BSD_USER_INTERRUPT |</div><div class='del'>-			GT_BLT_USER_INTERRUPT;</div><div class='add'>+			GEN6_BSD_USER_INTERRUPT |</div><div class='add'>+			GEN6_BLITTER_USER_INTERRUPT;</div><div class='ctx'> 	else</div><div class='ctx'> 		render_irqs =</div><div class='ctx'> 			GT_USER_INTERRUPT |</div><div class='hunk'>@@ -1930,26 +1792,24 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='ctx'> 	/* enable kind of interrupts always enabled */</div><div class='del'>-	u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE_IVB |</div><div class='del'>-		DE_PCH_EVENT_IVB | DE_PLANEA_FLIP_DONE_IVB |</div><div class='del'>-		DE_PLANEB_FLIP_DONE_IVB;</div><div class='add'>+	u32 display_mask =</div><div class='add'>+		DE_MASTER_IRQ_CONTROL | DE_GSE_IVB | DE_PCH_EVENT_IVB |</div><div class='add'>+		DE_PLANEC_FLIP_DONE_IVB |</div><div class='add'>+		DE_PLANEB_FLIP_DONE_IVB |</div><div class='add'>+		DE_PLANEA_FLIP_DONE_IVB;</div><div class='ctx'> 	u32 render_irqs;</div><div class='ctx'> 	u32 hotplug_mask;</div><div class='ctx'> </div><div class='del'>-	DRM_INIT_WAITQUEUE(&amp;dev_priv-&gt;ring[RCS].irq_queue);</div><div class='del'>-	if (HAS_BSD(dev))</div><div class='del'>-		DRM_INIT_WAITQUEUE(&amp;dev_priv-&gt;ring[VCS].irq_queue);</div><div class='del'>-	if (HAS_BLT(dev))</div><div class='del'>-		DRM_INIT_WAITQUEUE(&amp;dev_priv-&gt;ring[BCS].irq_queue);</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;</div><div class='ctx'> 	dev_priv-&gt;irq_mask = ~display_mask;</div><div class='ctx'> </div><div class='ctx'> 	/* should always can generate irq */</div><div class='ctx'> 	I915_WRITE(DEIIR, I915_READ(DEIIR));</div><div class='ctx'> 	I915_WRITE(DEIMR, dev_priv-&gt;irq_mask);</div><div class='del'>-	I915_WRITE(DEIER, display_mask | DE_PIPEA_VBLANK_IVB |</div><div class='del'>-		   DE_PIPEB_VBLANK_IVB);</div><div class='add'>+	I915_WRITE(DEIER,</div><div class='add'>+		   display_mask |</div><div class='add'>+		   DE_PIPEC_VBLANK_IVB |</div><div class='add'>+		   DE_PIPEB_VBLANK_IVB |</div><div class='add'>+		   DE_PIPEA_VBLANK_IVB);</div><div class='ctx'> 	POSTING_READ(DEIER);</div><div class='ctx'> </div><div class='ctx'> 	dev_priv-&gt;gt_irq_mask = ~0;</div><div class='hunk'>@@ -1957,8 +1817,8 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)</div><div class='ctx'> 	I915_WRITE(GTIIR, I915_READ(GTIIR));</div><div class='ctx'> 	I915_WRITE(GTIMR, dev_priv-&gt;gt_irq_mask);</div><div class='ctx'> </div><div class='del'>-	render_irqs = GT_USER_INTERRUPT | GT_GEN6_BSD_USER_INTERRUPT |</div><div class='del'>-		GT_BLT_USER_INTERRUPT;</div><div class='add'>+	render_irqs = GT_USER_INTERRUPT | GEN6_BSD_USER_INTERRUPT |</div><div class='add'>+		GEN6_BLITTER_USER_INTERRUPT;</div><div class='ctx'> 	I915_WRITE(GTIER, render_irqs);</div><div class='ctx'> 	POSTING_READ(GTIER);</div><div class='ctx'> </div><div class='hunk'>@@ -1978,15 +1838,496 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void i915_driver_irq_preinstall(struct drm_device * dev)</div><div class='add'>+static int valleyview_irq_postinstall(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	u32 render_irqs;</div><div class='add'>+	u32 enable_mask;</div><div class='add'>+	u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN);</div><div class='add'>+	u16 msid;</div><div class='add'>+</div><div class='add'>+	enable_mask = I915_DISPLAY_PORT_INTERRUPT;</div><div class='add'>+	enable_mask |= I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT |</div><div class='add'>+		I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;irq_mask = ~enable_mask;</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;pipestat[0] = 0;</div><div class='add'>+	dev_priv-&gt;pipestat[1] = 0;</div><div class='add'>+</div><div class='add'>+	/* Hack for broken MSIs on VLV */</div><div class='add'>+	pci_write_config_dword(dev_priv-&gt;dev-&gt;pdev, 0x94, 0xfee00000);</div><div class='add'>+	pci_read_config_word(dev-&gt;pdev, 0x98, &amp;msid);</div><div class='add'>+	msid &amp;= 0xff; /* mask out delivery bits */</div><div class='add'>+	msid |= (1&lt;&lt;14);</div><div class='add'>+	pci_write_config_word(dev_priv-&gt;dev-&gt;pdev, 0x98, msid);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(VLV_IMR, dev_priv-&gt;irq_mask);</div><div class='add'>+	I915_WRITE(VLV_IER, enable_mask);</div><div class='add'>+	I915_WRITE(VLV_IIR, 0xffffffff);</div><div class='add'>+	I915_WRITE(PIPESTAT(0), 0xffff);</div><div class='add'>+	I915_WRITE(PIPESTAT(1), 0xffff);</div><div class='add'>+	POSTING_READ(VLV_IER);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(VLV_IIR, 0xffffffff);</div><div class='add'>+	I915_WRITE(VLV_IIR, 0xffffffff);</div><div class='add'>+</div><div class='add'>+	render_irqs = GT_GEN6_BLT_FLUSHDW_NOTIFY_INTERRUPT |</div><div class='add'>+		GT_GEN6_BLT_CS_ERROR_INTERRUPT |</div><div class='add'>+		GT_GEN6_BLT_USER_INTERRUPT |</div><div class='add'>+		GT_GEN6_BSD_USER_INTERRUPT |</div><div class='add'>+		GT_GEN6_BSD_CS_ERROR_INTERRUPT |</div><div class='add'>+		GT_GEN7_L3_PARITY_ERROR_INTERRUPT |</div><div class='add'>+		GT_PIPE_NOTIFY |</div><div class='add'>+		GT_RENDER_CS_ERROR_INTERRUPT |</div><div class='add'>+		GT_SYNC_STATUS |</div><div class='add'>+		GT_USER_INTERRUPT;</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;gt_irq_mask = ~render_irqs;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GTIIR, I915_READ(GTIIR));</div><div class='add'>+	I915_WRITE(GTIIR, I915_READ(GTIIR));</div><div class='add'>+	I915_WRITE(GTIMR, 0);</div><div class='add'>+	I915_WRITE(GTIER, render_irqs);</div><div class='add'>+	POSTING_READ(GTIER);</div><div class='add'>+</div><div class='add'>+	/* ack &amp; enable invalid PTE error interrupts */</div><div class='add'>+#if 0 /* FIXME: add support to irq handler for checking these bits */</div><div class='add'>+	I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK);</div><div class='add'>+	I915_WRITE(DPINVGTT, DPINVGTT_EN_MASK);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	I915_WRITE(VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);</div><div class='add'>+#if 0 /* FIXME: check register definitions; some have moved */</div><div class='add'>+	/* Note HDMI and DP share bits */</div><div class='add'>+	if (dev_priv-&gt;hotplug_supported_mask &amp; HDMIB_HOTPLUG_INT_STATUS)</div><div class='add'>+		hotplug_en |= HDMIB_HOTPLUG_INT_EN;</div><div class='add'>+	if (dev_priv-&gt;hotplug_supported_mask &amp; HDMIC_HOTPLUG_INT_STATUS)</div><div class='add'>+		hotplug_en |= HDMIC_HOTPLUG_INT_EN;</div><div class='add'>+	if (dev_priv-&gt;hotplug_supported_mask &amp; HDMID_HOTPLUG_INT_STATUS)</div><div class='add'>+		hotplug_en |= HDMID_HOTPLUG_INT_EN;</div><div class='add'>+	if (dev_priv-&gt;hotplug_supported_mask &amp; SDVOC_HOTPLUG_INT_STATUS)</div><div class='add'>+		hotplug_en |= SDVOC_HOTPLUG_INT_EN;</div><div class='add'>+	if (dev_priv-&gt;hotplug_supported_mask &amp; SDVOB_HOTPLUG_INT_STATUS)</div><div class='add'>+		hotplug_en |= SDVOB_HOTPLUG_INT_EN;</div><div class='add'>+	if (dev_priv-&gt;hotplug_supported_mask &amp; CRT_HOTPLUG_INT_STATUS) {</div><div class='add'>+		hotplug_en |= CRT_HOTPLUG_INT_EN;</div><div class='add'>+		hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void valleyview_irq_uninstall(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	int pipe;</div><div class='add'>+</div><div class='add'>+	if (!dev_priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for_each_pipe(pipe)</div><div class='add'>+		I915_WRITE(PIPESTAT(pipe), 0xffff);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(HWSTAM, 0xffffffff);</div><div class='add'>+	I915_WRITE(PORT_HOTPLUG_EN, 0);</div><div class='add'>+	I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));</div><div class='add'>+	for_each_pipe(pipe)</div><div class='add'>+		I915_WRITE(PIPESTAT(pipe), 0xffff);</div><div class='add'>+	I915_WRITE(VLV_IIR, 0xffffffff);</div><div class='add'>+	I915_WRITE(VLV_IMR, 0xffffffff);</div><div class='add'>+	I915_WRITE(VLV_IER, 0x0);</div><div class='add'>+	POSTING_READ(VLV_IER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ironlake_irq_uninstall(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (!dev_priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(HWSTAM, 0xffffffff);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(DEIMR, 0xffffffff);</div><div class='add'>+	I915_WRITE(DEIER, 0x0);</div><div class='add'>+	I915_WRITE(DEIIR, I915_READ(DEIIR));</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GTIMR, 0xffffffff);</div><div class='add'>+	I915_WRITE(GTIER, 0x0);</div><div class='add'>+	I915_WRITE(GTIIR, I915_READ(GTIIR));</div><div class='add'>+</div><div class='add'>+	I915_WRITE(SDEIMR, 0xffffffff);</div><div class='add'>+	I915_WRITE(SDEIER, 0x0);</div><div class='add'>+	I915_WRITE(SDEIIR, I915_READ(SDEIIR));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i8xx_irq_preinstall(struct drm_device * dev)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='ctx'> 	int pipe;</div><div class='ctx'> </div><div class='ctx'> 	atomic_set(&amp;dev_priv-&gt;irq_received, 0);</div><div class='ctx'> </div><div class='del'>-	INIT_WORK(&amp;dev_priv-&gt;hotplug_work, i915_hotplug_work_func);</div><div class='del'>-	INIT_WORK(&amp;dev_priv-&gt;error_work, i915_error_work_func);</div><div class='add'>+	for_each_pipe(pipe)</div><div class='add'>+		I915_WRITE(PIPESTAT(pipe), 0);</div><div class='add'>+	I915_WRITE16(IMR, 0xffff);</div><div class='add'>+	I915_WRITE16(IER, 0x0);</div><div class='add'>+	POSTING_READ16(IER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int i8xx_irq_postinstall(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;pipestat[0] = 0;</div><div class='add'>+	dev_priv-&gt;pipestat[1] = 0;</div><div class='add'>+</div><div class='add'>+	I915_WRITE16(EMR,</div><div class='add'>+		     ~(I915_ERROR_PAGE_TABLE | I915_ERROR_MEMORY_REFRESH));</div><div class='add'>+</div><div class='add'>+	/* Unmask the interrupts that we always want on. */</div><div class='add'>+	dev_priv-&gt;irq_mask =</div><div class='add'>+		~(I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |</div><div class='add'>+		  I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |</div><div class='add'>+		  I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |</div><div class='add'>+		  I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT |</div><div class='add'>+		  I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);</div><div class='add'>+	I915_WRITE16(IMR, dev_priv-&gt;irq_mask);</div><div class='add'>+</div><div class='add'>+	I915_WRITE16(IER,</div><div class='add'>+		     I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |</div><div class='add'>+		     I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |</div><div class='add'>+		     I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT |</div><div class='add'>+		     I915_USER_INTERRUPT);</div><div class='add'>+	POSTING_READ16(IER);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t i8xx_irq_handler(DRM_IRQ_ARGS)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = (struct drm_device *) arg;</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	u16 iir, new_iir;</div><div class='add'>+	u32 pipe_stats[2];</div><div class='add'>+	unsigned long irqflags;</div><div class='add'>+	int irq_received;</div><div class='add'>+	int pipe;</div><div class='add'>+	u16 flip_mask =</div><div class='add'>+		I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |</div><div class='add'>+		I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;dev_priv-&gt;irq_received);</div><div class='add'>+</div><div class='add'>+	iir = I915_READ16(IIR);</div><div class='add'>+	if (iir == 0)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	while (iir &amp; ~flip_mask) {</div><div class='add'>+		/* Can't rely on pipestat interrupt bit in iir as it might</div><div class='add'>+		 * have been cleared after the pipestat interrupt was received.</div><div class='add'>+		 * It doesn't set the bit in iir again, but it still produces</div><div class='add'>+		 * interrupts (for non-MSI).</div><div class='add'>+		 */</div><div class='add'>+		spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='add'>+		if (iir &amp; I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)</div><div class='add'>+			i915_handle_error(dev, false);</div><div class='add'>+</div><div class='add'>+		for_each_pipe(pipe) {</div><div class='add'>+			int reg = PIPESTAT(pipe);</div><div class='add'>+			pipe_stats[pipe] = I915_READ(reg);</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Clear the PIPE*STAT regs before the IIR</div><div class='add'>+			 */</div><div class='add'>+			if (pipe_stats[pipe] &amp; 0x8000ffff) {</div><div class='add'>+				if (pipe_stats[pipe] &amp; PIPE_FIFO_UNDERRUN_STATUS)</div><div class='add'>+					DRM_DEBUG_DRIVER("pipe %c underrun\n",</div><div class='add'>+							 pipe_name(pipe));</div><div class='add'>+				I915_WRITE(reg, pipe_stats[pipe]);</div><div class='add'>+				irq_received = 1;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='add'>+</div><div class='add'>+		I915_WRITE16(IIR, iir &amp; ~flip_mask);</div><div class='add'>+		new_iir = I915_READ16(IIR); /* Flush posted writes */</div><div class='add'>+</div><div class='add'>+		i915_update_dri1_breadcrumb(dev);</div><div class='add'>+</div><div class='add'>+		if (iir &amp; I915_USER_INTERRUPT)</div><div class='add'>+			notify_ring(dev, &amp;dev_priv-&gt;ring[RCS]);</div><div class='add'>+</div><div class='add'>+		if (pipe_stats[0] &amp; PIPE_VBLANK_INTERRUPT_STATUS &amp;&amp;</div><div class='add'>+		    drm_handle_vblank(dev, 0)) {</div><div class='add'>+			if (iir &amp; I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT) {</div><div class='add'>+				intel_prepare_page_flip(dev, 0);</div><div class='add'>+				intel_finish_page_flip(dev, 0);</div><div class='add'>+				flip_mask &amp;= ~I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pipe_stats[1] &amp; PIPE_VBLANK_INTERRUPT_STATUS &amp;&amp;</div><div class='add'>+		    drm_handle_vblank(dev, 1)) {</div><div class='add'>+			if (iir &amp; I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT) {</div><div class='add'>+				intel_prepare_page_flip(dev, 1);</div><div class='add'>+				intel_finish_page_flip(dev, 1);</div><div class='add'>+				flip_mask &amp;= ~I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		iir = new_iir;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i8xx_irq_uninstall(struct drm_device * dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	int pipe;</div><div class='add'>+</div><div class='add'>+	for_each_pipe(pipe) {</div><div class='add'>+		/* Clear enable bits; then clear status bits */</div><div class='add'>+		I915_WRITE(PIPESTAT(pipe), 0);</div><div class='add'>+		I915_WRITE(PIPESTAT(pipe), I915_READ(PIPESTAT(pipe)));</div><div class='add'>+	}</div><div class='add'>+	I915_WRITE16(IMR, 0xffff);</div><div class='add'>+	I915_WRITE16(IER, 0x0);</div><div class='add'>+	I915_WRITE16(IIR, I915_READ16(IIR));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i915_irq_preinstall(struct drm_device * dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	int pipe;</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;dev_priv-&gt;irq_received, 0);</div><div class='add'>+</div><div class='add'>+	if (I915_HAS_HOTPLUG(dev)) {</div><div class='add'>+		I915_WRITE(PORT_HOTPLUG_EN, 0);</div><div class='add'>+		I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	I915_WRITE16(HWSTAM, 0xeffe);</div><div class='add'>+	for_each_pipe(pipe)</div><div class='add'>+		I915_WRITE(PIPESTAT(pipe), 0);</div><div class='add'>+	I915_WRITE(IMR, 0xffffffff);</div><div class='add'>+	I915_WRITE(IER, 0x0);</div><div class='add'>+	POSTING_READ(IER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int i915_irq_postinstall(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	u32 enable_mask;</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;pipestat[0] = 0;</div><div class='add'>+	dev_priv-&gt;pipestat[1] = 0;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(EMR, ~(I915_ERROR_PAGE_TABLE | I915_ERROR_MEMORY_REFRESH));</div><div class='add'>+</div><div class='add'>+	/* Unmask the interrupts that we always want on. */</div><div class='add'>+	dev_priv-&gt;irq_mask =</div><div class='add'>+		~(I915_ASLE_INTERRUPT |</div><div class='add'>+		  I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |</div><div class='add'>+		  I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |</div><div class='add'>+		  I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |</div><div class='add'>+		  I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT |</div><div class='add'>+		  I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);</div><div class='add'>+</div><div class='add'>+	enable_mask =</div><div class='add'>+		I915_ASLE_INTERRUPT |</div><div class='add'>+		I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |</div><div class='add'>+		I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |</div><div class='add'>+		I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT |</div><div class='add'>+		I915_USER_INTERRUPT;</div><div class='add'>+</div><div class='add'>+	if (I915_HAS_HOTPLUG(dev)) {</div><div class='add'>+		/* Enable in IER... */</div><div class='add'>+		enable_mask |= I915_DISPLAY_PORT_INTERRUPT;</div><div class='add'>+		/* and unmask in IMR */</div><div class='add'>+		dev_priv-&gt;irq_mask &amp;= ~I915_DISPLAY_PORT_INTERRUPT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	I915_WRITE(IMR, dev_priv-&gt;irq_mask);</div><div class='add'>+	I915_WRITE(IER, enable_mask);</div><div class='add'>+	POSTING_READ(IER);</div><div class='add'>+</div><div class='add'>+	if (I915_HAS_HOTPLUG(dev)) {</div><div class='add'>+		u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN);</div><div class='add'>+</div><div class='add'>+		if (dev_priv-&gt;hotplug_supported_mask &amp; HDMIB_HOTPLUG_INT_STATUS)</div><div class='add'>+			hotplug_en |= HDMIB_HOTPLUG_INT_EN;</div><div class='add'>+		if (dev_priv-&gt;hotplug_supported_mask &amp; HDMIC_HOTPLUG_INT_STATUS)</div><div class='add'>+			hotplug_en |= HDMIC_HOTPLUG_INT_EN;</div><div class='add'>+		if (dev_priv-&gt;hotplug_supported_mask &amp; HDMID_HOTPLUG_INT_STATUS)</div><div class='add'>+			hotplug_en |= HDMID_HOTPLUG_INT_EN;</div><div class='add'>+		if (dev_priv-&gt;hotplug_supported_mask &amp; SDVOC_HOTPLUG_INT_STATUS)</div><div class='add'>+			hotplug_en |= SDVOC_HOTPLUG_INT_EN;</div><div class='add'>+		if (dev_priv-&gt;hotplug_supported_mask &amp; SDVOB_HOTPLUG_INT_STATUS)</div><div class='add'>+			hotplug_en |= SDVOB_HOTPLUG_INT_EN;</div><div class='add'>+		if (dev_priv-&gt;hotplug_supported_mask &amp; CRT_HOTPLUG_INT_STATUS) {</div><div class='add'>+			hotplug_en |= CRT_HOTPLUG_INT_EN;</div><div class='add'>+			hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Ignore TV since it's buggy */</div><div class='add'>+</div><div class='add'>+		I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	intel_opregion_enable_asle(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t i915_irq_handler(DRM_IRQ_ARGS)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = (struct drm_device *) arg;</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	u32 iir, new_iir, pipe_stats[I915_MAX_PIPES];</div><div class='add'>+	unsigned long irqflags;</div><div class='add'>+	u32 flip_mask =</div><div class='add'>+		I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |</div><div class='add'>+		I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;</div><div class='add'>+	u32 flip[2] = {</div><div class='add'>+		I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT,</div><div class='add'>+		I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT</div><div class='add'>+	};</div><div class='add'>+	int pipe, ret = IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;dev_priv-&gt;irq_received);</div><div class='add'>+</div><div class='add'>+	iir = I915_READ(IIR);</div><div class='add'>+	do {</div><div class='add'>+		bool irq_received = (iir &amp; ~flip_mask) != 0;</div><div class='add'>+		bool blc_event = false;</div><div class='add'>+</div><div class='add'>+		/* Can't rely on pipestat interrupt bit in iir as it might</div><div class='add'>+		 * have been cleared after the pipestat interrupt was received.</div><div class='add'>+		 * It doesn't set the bit in iir again, but it still produces</div><div class='add'>+		 * interrupts (for non-MSI).</div><div class='add'>+		 */</div><div class='add'>+		spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='add'>+		if (iir &amp; I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)</div><div class='add'>+			i915_handle_error(dev, false);</div><div class='add'>+</div><div class='add'>+		for_each_pipe(pipe) {</div><div class='add'>+			int reg = PIPESTAT(pipe);</div><div class='add'>+			pipe_stats[pipe] = I915_READ(reg);</div><div class='add'>+</div><div class='add'>+			/* Clear the PIPE*STAT regs before the IIR */</div><div class='add'>+			if (pipe_stats[pipe] &amp; 0x8000ffff) {</div><div class='add'>+				if (pipe_stats[pipe] &amp; PIPE_FIFO_UNDERRUN_STATUS)</div><div class='add'>+					DRM_DEBUG_DRIVER("pipe %c underrun\n",</div><div class='add'>+							 pipe_name(pipe));</div><div class='add'>+				I915_WRITE(reg, pipe_stats[pipe]);</div><div class='add'>+				irq_received = true;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='add'>+</div><div class='add'>+		if (!irq_received)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* Consume port.  Then clear IIR or we'll miss events */</div><div class='add'>+		if ((I915_HAS_HOTPLUG(dev)) &amp;&amp;</div><div class='add'>+		    (iir &amp; I915_DISPLAY_PORT_INTERRUPT)) {</div><div class='add'>+			u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);</div><div class='add'>+</div><div class='add'>+			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",</div><div class='add'>+				  hotplug_status);</div><div class='add'>+			if (hotplug_status &amp; dev_priv-&gt;hotplug_supported_mask)</div><div class='add'>+				queue_work(dev_priv-&gt;wq,</div><div class='add'>+					   &amp;dev_priv-&gt;hotplug_work);</div><div class='add'>+</div><div class='add'>+			I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);</div><div class='add'>+			POSTING_READ(PORT_HOTPLUG_STAT);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		I915_WRITE(IIR, iir &amp; ~flip_mask);</div><div class='add'>+		new_iir = I915_READ(IIR); /* Flush posted writes */</div><div class='add'>+</div><div class='add'>+		if (iir &amp; I915_USER_INTERRUPT)</div><div class='add'>+			notify_ring(dev, &amp;dev_priv-&gt;ring[RCS]);</div><div class='add'>+</div><div class='add'>+		for_each_pipe(pipe) {</div><div class='add'>+			int plane = pipe;</div><div class='add'>+			if (IS_MOBILE(dev))</div><div class='add'>+				plane = !plane;</div><div class='add'>+			if (pipe_stats[pipe] &amp; PIPE_VBLANK_INTERRUPT_STATUS &amp;&amp;</div><div class='add'>+			    drm_handle_vblank(dev, pipe)) {</div><div class='add'>+				if (iir &amp; flip[plane]) {</div><div class='add'>+					intel_prepare_page_flip(dev, plane);</div><div class='add'>+					intel_finish_page_flip(dev, pipe);</div><div class='add'>+					flip_mask &amp;= ~flip[plane];</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (pipe_stats[pipe] &amp; PIPE_LEGACY_BLC_EVENT_STATUS)</div><div class='add'>+				blc_event = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (blc_event || (iir &amp; I915_ASLE_INTERRUPT))</div><div class='add'>+			intel_opregion_asle_intr(dev);</div><div class='add'>+</div><div class='add'>+		/* With MSI, interrupts are only generated when iir</div><div class='add'>+		 * transitions from zero to nonzero.  If another bit got</div><div class='add'>+		 * set while we were handling the existing iir bits, then</div><div class='add'>+		 * we would never get another interrupt.</div><div class='add'>+		 *</div><div class='add'>+		 * This is fine on non-MSI as well, as if we hit this path</div><div class='add'>+		 * we avoid exiting the interrupt handler only to generate</div><div class='add'>+		 * another one.</div><div class='add'>+		 *</div><div class='add'>+		 * Note that for MSI this could cause a stray interrupt report</div><div class='add'>+		 * if an interrupt landed in the time between writing IIR and</div><div class='add'>+		 * the posting read.  This should be rare enough to never</div><div class='add'>+		 * trigger the 99% of 100,000 interrupts test for disabling</div><div class='add'>+		 * stray interrupts.</div><div class='add'>+		 */</div><div class='add'>+		ret = IRQ_HANDLED;</div><div class='add'>+		iir = new_iir;</div><div class='add'>+	} while (iir &amp; ~flip_mask);</div><div class='add'>+</div><div class='add'>+	i915_update_dri1_breadcrumb(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i915_irq_uninstall(struct drm_device * dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	int pipe;</div><div class='add'>+</div><div class='add'>+	if (I915_HAS_HOTPLUG(dev)) {</div><div class='add'>+		I915_WRITE(PORT_HOTPLUG_EN, 0);</div><div class='add'>+		I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	I915_WRITE16(HWSTAM, 0xffff);</div><div class='add'>+	for_each_pipe(pipe) {</div><div class='add'>+		/* Clear enable bits; then clear status bits */</div><div class='add'>+		I915_WRITE(PIPESTAT(pipe), 0);</div><div class='add'>+		I915_WRITE(PIPESTAT(pipe), I915_READ(PIPESTAT(pipe)));</div><div class='add'>+	}</div><div class='add'>+	I915_WRITE(IMR, 0xffffffff);</div><div class='add'>+	I915_WRITE(IER, 0x0);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(IIR, I915_READ(IIR));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i965_irq_preinstall(struct drm_device * dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	int pipe;</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;dev_priv-&gt;irq_received, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (I915_HAS_HOTPLUG(dev)) {</div><div class='ctx'> 		I915_WRITE(PORT_HOTPLUG_EN, 0);</div><div class='hunk'>@@ -2001,20 +2342,25 @@ static void i915_driver_irq_preinstall(struct drm_device * dev)</div><div class='ctx'> 	POSTING_READ(IER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Must be called after intel_modeset_init or hotplug interrupts won't be</div><div class='del'>- * enabled correctly.</div><div class='del'>- */</div><div class='del'>-static int i915_driver_irq_postinstall(struct drm_device *dev)</div><div class='add'>+static int i965_irq_postinstall(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='del'>-	u32 enable_mask = I915_INTERRUPT_ENABLE_FIX | I915_INTERRUPT_ENABLE_VAR;</div><div class='add'>+	u32 enable_mask;</div><div class='ctx'> 	u32 error_mask;</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;</div><div class='del'>-</div><div class='ctx'> 	/* Unmask the interrupts that we always want on. */</div><div class='del'>-	dev_priv-&gt;irq_mask = ~I915_INTERRUPT_ENABLE_FIX;</div><div class='add'>+	dev_priv-&gt;irq_mask = ~(I915_ASLE_INTERRUPT |</div><div class='add'>+			       I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |</div><div class='add'>+			       I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |</div><div class='add'>+			       I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |</div><div class='add'>+			       I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT |</div><div class='add'>+			       I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);</div><div class='add'>+</div><div class='add'>+	enable_mask = ~dev_priv-&gt;irq_mask;</div><div class='add'>+	enable_mask |= I915_USER_INTERRUPT;</div><div class='add'>+</div><div class='add'>+	if (IS_G4X(dev))</div><div class='add'>+		enable_mask |= I915_BSD_USER_INTERRUPT;</div><div class='ctx'> </div><div class='ctx'> 	dev_priv-&gt;pipestat[0] = 0;</div><div class='ctx'> 	dev_priv-&gt;pipestat[1] = 0;</div><div class='hunk'>@@ -2081,31 +2427,124 @@ static int i915_driver_irq_postinstall(struct drm_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ironlake_irq_uninstall(struct drm_device *dev)</div><div class='add'>+static irqreturn_t i965_irq_handler(DRM_IRQ_ARGS)</div><div class='ctx'> {</div><div class='add'>+	struct drm_device *dev = (struct drm_device *) arg;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='add'>+	u32 iir, new_iir;</div><div class='add'>+	u32 pipe_stats[I915_MAX_PIPES];</div><div class='add'>+	unsigned long irqflags;</div><div class='add'>+	int irq_received;</div><div class='add'>+	int ret = IRQ_NONE, pipe;</div><div class='ctx'> </div><div class='del'>-	if (!dev_priv)</div><div class='del'>-		return;</div><div class='add'>+	atomic_inc(&amp;dev_priv-&gt;irq_received);</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;vblank_pipe = 0;</div><div class='add'>+	iir = I915_READ(IIR);</div><div class='ctx'> </div><div class='del'>-	I915_WRITE(HWSTAM, 0xffffffff);</div><div class='add'>+	for (;;) {</div><div class='add'>+		bool blc_event = false;</div><div class='ctx'> </div><div class='del'>-	I915_WRITE(DEIMR, 0xffffffff);</div><div class='del'>-	I915_WRITE(DEIER, 0x0);</div><div class='del'>-	I915_WRITE(DEIIR, I915_READ(DEIIR));</div><div class='add'>+		irq_received = iir != 0;</div><div class='ctx'> </div><div class='del'>-	I915_WRITE(GTIMR, 0xffffffff);</div><div class='del'>-	I915_WRITE(GTIER, 0x0);</div><div class='del'>-	I915_WRITE(GTIIR, I915_READ(GTIIR));</div><div class='add'>+		/* Can't rely on pipestat interrupt bit in iir as it might</div><div class='add'>+		 * have been cleared after the pipestat interrupt was received.</div><div class='add'>+		 * It doesn't set the bit in iir again, but it still produces</div><div class='add'>+		 * interrupts (for non-MSI).</div><div class='add'>+		 */</div><div class='add'>+		spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='add'>+		if (iir &amp; I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)</div><div class='add'>+			i915_handle_error(dev, false);</div><div class='ctx'> </div><div class='del'>-	I915_WRITE(SDEIMR, 0xffffffff);</div><div class='del'>-	I915_WRITE(SDEIER, 0x0);</div><div class='del'>-	I915_WRITE(SDEIIR, I915_READ(SDEIIR));</div><div class='add'>+		for_each_pipe(pipe) {</div><div class='add'>+			int reg = PIPESTAT(pipe);</div><div class='add'>+			pipe_stats[pipe] = I915_READ(reg);</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Clear the PIPE*STAT regs before the IIR</div><div class='add'>+			 */</div><div class='add'>+			if (pipe_stats[pipe] &amp; 0x8000ffff) {</div><div class='add'>+				if (pipe_stats[pipe] &amp; PIPE_FIFO_UNDERRUN_STATUS)</div><div class='add'>+					DRM_DEBUG_DRIVER("pipe %c underrun\n",</div><div class='add'>+							 pipe_name(pipe));</div><div class='add'>+				I915_WRITE(reg, pipe_stats[pipe]);</div><div class='add'>+				irq_received = 1;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, irqflags);</div><div class='add'>+</div><div class='add'>+		if (!irq_received)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		ret = IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+		/* Consume port.  Then clear IIR or we'll miss events */</div><div class='add'>+		if ((I915_HAS_HOTPLUG(dev)) &amp;&amp;</div><div class='add'>+		    (iir &amp; I915_DISPLAY_PORT_INTERRUPT)) {</div><div class='add'>+			u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);</div><div class='add'>+</div><div class='add'>+			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",</div><div class='add'>+				  hotplug_status);</div><div class='add'>+			if (hotplug_status &amp; dev_priv-&gt;hotplug_supported_mask)</div><div class='add'>+				queue_work(dev_priv-&gt;wq,</div><div class='add'>+					   &amp;dev_priv-&gt;hotplug_work);</div><div class='add'>+</div><div class='add'>+			I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);</div><div class='add'>+			I915_READ(PORT_HOTPLUG_STAT);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		I915_WRITE(IIR, iir);</div><div class='add'>+		new_iir = I915_READ(IIR); /* Flush posted writes */</div><div class='add'>+</div><div class='add'>+		if (iir &amp; I915_USER_INTERRUPT)</div><div class='add'>+			notify_ring(dev, &amp;dev_priv-&gt;ring[RCS]);</div><div class='add'>+		if (iir &amp; I915_BSD_USER_INTERRUPT)</div><div class='add'>+			notify_ring(dev, &amp;dev_priv-&gt;ring[VCS]);</div><div class='add'>+</div><div class='add'>+		if (iir &amp; I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT)</div><div class='add'>+			intel_prepare_page_flip(dev, 0);</div><div class='add'>+</div><div class='add'>+		if (iir &amp; I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT)</div><div class='add'>+			intel_prepare_page_flip(dev, 1);</div><div class='add'>+</div><div class='add'>+		for_each_pipe(pipe) {</div><div class='add'>+			if (pipe_stats[pipe] &amp; PIPE_START_VBLANK_INTERRUPT_STATUS &amp;&amp;</div><div class='add'>+			    drm_handle_vblank(dev, pipe)) {</div><div class='add'>+				i915_pageflip_stall_check(dev, pipe);</div><div class='add'>+				intel_finish_page_flip(dev, pipe);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (pipe_stats[pipe] &amp; PIPE_LEGACY_BLC_EVENT_STATUS)</div><div class='add'>+				blc_event = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		if (blc_event || (iir &amp; I915_ASLE_INTERRUPT))</div><div class='add'>+			intel_opregion_asle_intr(dev);</div><div class='add'>+</div><div class='add'>+		/* With MSI, interrupts are only generated when iir</div><div class='add'>+		 * transitions from zero to nonzero.  If another bit got</div><div class='add'>+		 * set while we were handling the existing iir bits, then</div><div class='add'>+		 * we would never get another interrupt.</div><div class='add'>+		 *</div><div class='add'>+		 * This is fine on non-MSI as well, as if we hit this path</div><div class='add'>+		 * we avoid exiting the interrupt handler only to generate</div><div class='add'>+		 * another one.</div><div class='add'>+		 *</div><div class='add'>+		 * Note that for MSI this could cause a stray interrupt report</div><div class='add'>+		 * if an interrupt landed in the time between writing IIR and</div><div class='add'>+		 * the posting read.  This should be rare enough to never</div><div class='add'>+		 * trigger the 99% of 100,000 interrupts test for disabling</div><div class='add'>+		 * stray interrupts.</div><div class='add'>+		 */</div><div class='add'>+		iir = new_iir;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i915_update_dri1_breadcrumb(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void i915_driver_irq_uninstall(struct drm_device * dev)</div><div class='add'>+static void i965_irq_uninstall(struct drm_device * dev)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev-&gt;dev_private;</div><div class='ctx'> 	int pipe;</div><div class='hunk'>@@ -2113,8 +2552,6 @@ static void i915_driver_irq_uninstall(struct drm_device * dev)</div><div class='ctx'> 	if (!dev_priv)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;vblank_pipe = 0;</div><div class='del'>-</div><div class='ctx'> 	if (I915_HAS_HOTPLUG(dev)) {</div><div class='ctx'> 		I915_WRITE(PORT_HOTPLUG_EN, 0);</div><div class='ctx'> 		I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));</div><div class='hunk'>@@ -2134,9 +2571,15 @@ static void i915_driver_irq_uninstall(struct drm_device * dev)</div><div class='ctx'> </div><div class='ctx'> void intel_irq_init(struct drm_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;dev_priv-&gt;hotplug_work, i915_hotplug_work_func);</div><div class='add'>+	INIT_WORK(&amp;dev_priv-&gt;error_work, i915_error_work_func);</div><div class='add'>+	INIT_WORK(&amp;dev_priv-&gt;rps_work, gen6_pm_rps_work);</div><div class='add'>+</div><div class='ctx'> 	dev-&gt;driver-&gt;get_vblank_counter = i915_get_vblank_counter;</div><div class='ctx'> 	dev-&gt;max_vblank_count = 0xffffff; /* only 24 bits of frame count */</div><div class='del'>-	if (IS_G4X(dev) || IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev)) {</div><div class='add'>+	if (IS_G4X(dev) || INTEL_INFO(dev)-&gt;gen &gt;= 5) {</div><div class='ctx'> 		dev-&gt;max_vblank_count = 0xffffffff; /* full 32 bit counter */</div><div class='ctx'> 		dev-&gt;driver-&gt;get_vblank_counter = gm45_get_vblank_counter;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2147,7 +2590,14 @@ void intel_irq_init(struct drm_device *dev)</div><div class='ctx'> 		dev-&gt;driver-&gt;get_vblank_timestamp = NULL;</div><div class='ctx'> 	dev-&gt;driver-&gt;get_scanout_position = i915_get_crtc_scanoutpos;</div><div class='ctx'> </div><div class='del'>-	if (IS_IVYBRIDGE(dev)) {</div><div class='add'>+	if (IS_VALLEYVIEW(dev)) {</div><div class='add'>+		dev-&gt;driver-&gt;irq_handler = valleyview_irq_handler;</div><div class='add'>+		dev-&gt;driver-&gt;irq_preinstall = valleyview_irq_preinstall;</div><div class='add'>+		dev-&gt;driver-&gt;irq_postinstall = valleyview_irq_postinstall;</div><div class='add'>+		dev-&gt;driver-&gt;irq_uninstall = valleyview_irq_uninstall;</div><div class='add'>+		dev-&gt;driver-&gt;enable_vblank = valleyview_enable_vblank;</div><div class='add'>+		dev-&gt;driver-&gt;disable_vblank = valleyview_disable_vblank;</div><div class='add'>+	} else if (IS_IVYBRIDGE(dev)) {</div><div class='ctx'> 		/* Share pre &amp; uninstall handlers with ILK/SNB */</div><div class='ctx'> 		dev-&gt;driver-&gt;irq_handler = ivybridge_irq_handler;</div><div class='ctx'> 		dev-&gt;driver-&gt;irq_preinstall = ironlake_irq_preinstall;</div><div class='hunk'>@@ -2155,6 +2605,14 @@ void intel_irq_init(struct drm_device *dev)</div><div class='ctx'> 		dev-&gt;driver-&gt;irq_uninstall = ironlake_irq_uninstall;</div><div class='ctx'> 		dev-&gt;driver-&gt;enable_vblank = ivybridge_enable_vblank;</div><div class='ctx'> 		dev-&gt;driver-&gt;disable_vblank = ivybridge_disable_vblank;</div><div class='add'>+	} else if (IS_HASWELL(dev)) {</div><div class='add'>+		/* Share interrupts handling with IVB */</div><div class='add'>+		dev-&gt;driver-&gt;irq_handler = ivybridge_irq_handler;</div><div class='add'>+		dev-&gt;driver-&gt;irq_preinstall = ironlake_irq_preinstall;</div><div class='add'>+		dev-&gt;driver-&gt;irq_postinstall = ivybridge_irq_postinstall;</div><div class='add'>+		dev-&gt;driver-&gt;irq_uninstall = ironlake_irq_uninstall;</div><div class='add'>+		dev-&gt;driver-&gt;enable_vblank = ivybridge_enable_vblank;</div><div class='add'>+		dev-&gt;driver-&gt;disable_vblank = ivybridge_disable_vblank;</div><div class='ctx'> 	} else if (HAS_PCH_SPLIT(dev)) {</div><div class='ctx'> 		dev-&gt;driver-&gt;irq_handler = ironlake_irq_handler;</div><div class='ctx'> 		dev-&gt;driver-&gt;irq_preinstall = ironlake_irq_preinstall;</div><div class='hunk'>@@ -2163,10 +2621,25 @@ void intel_irq_init(struct drm_device *dev)</div><div class='ctx'> 		dev-&gt;driver-&gt;enable_vblank = ironlake_enable_vblank;</div><div class='ctx'> 		dev-&gt;driver-&gt;disable_vblank = ironlake_disable_vblank;</div><div class='ctx'> 	} else {</div><div class='del'>-		dev-&gt;driver-&gt;irq_preinstall = i915_driver_irq_preinstall;</div><div class='del'>-		dev-&gt;driver-&gt;irq_postinstall = i915_driver_irq_postinstall;</div><div class='del'>-		dev-&gt;driver-&gt;irq_uninstall = i915_driver_irq_uninstall;</div><div class='del'>-		dev-&gt;driver-&gt;irq_handler = i915_driver_irq_handler;</div><div class='add'>+		if (INTEL_INFO(dev)-&gt;gen == 2) {</div><div class='add'>+			dev-&gt;driver-&gt;irq_preinstall = i8xx_irq_preinstall;</div><div class='add'>+			dev-&gt;driver-&gt;irq_postinstall = i8xx_irq_postinstall;</div><div class='add'>+			dev-&gt;driver-&gt;irq_handler = i8xx_irq_handler;</div><div class='add'>+			dev-&gt;driver-&gt;irq_uninstall = i8xx_irq_uninstall;</div><div class='add'>+		} else if (INTEL_INFO(dev)-&gt;gen == 3) {</div><div class='add'>+			/* IIR "flip pending" means done if this bit is set */</div><div class='add'>+			I915_WRITE(ECOSKPD, _MASKED_BIT_DISABLE(ECO_FLIP_DONE));</div><div class='add'>+</div><div class='add'>+			dev-&gt;driver-&gt;irq_preinstall = i915_irq_preinstall;</div><div class='add'>+			dev-&gt;driver-&gt;irq_postinstall = i915_irq_postinstall;</div><div class='add'>+			dev-&gt;driver-&gt;irq_uninstall = i915_irq_uninstall;</div><div class='add'>+			dev-&gt;driver-&gt;irq_handler = i915_irq_handler;</div><div class='add'>+		} else {</div><div class='add'>+			dev-&gt;driver-&gt;irq_preinstall = i965_irq_preinstall;</div><div class='add'>+			dev-&gt;driver-&gt;irq_postinstall = i965_irq_postinstall;</div><div class='add'>+			dev-&gt;driver-&gt;irq_uninstall = i965_irq_uninstall;</div><div class='add'>+			dev-&gt;driver-&gt;irq_handler = i965_irq_handler;</div><div class='add'>+		}</div><div class='ctx'> 		dev-&gt;driver-&gt;enable_vblank = i915_enable_vblank;</div><div class='ctx'> 		dev-&gt;driver-&gt;disable_vblank = i915_disable_vblank;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h<br/>index 9d24d65f0c3e..48d5e8e051cf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_reg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_reg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_reg.h</a></div><div class='hunk'>@@ -27,6 +27,11 @@</div><div class='ctx'> </div><div class='ctx'> #define _PIPE(pipe, a, b) ((a) + (pipe)*((b)-(a)))</div><div class='ctx'> </div><div class='add'>+#define _PORT(port, a, b) ((a) + (port)*((b)-(a)))</div><div class='add'>+</div><div class='add'>+#define _MASKED_BIT_ENABLE(a) (((a) &lt;&lt; 16) | (a))</div><div class='add'>+#define _MASKED_BIT_DISABLE(a) ((a) &lt;&lt; 16)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * The Bridge device's PCI config space has information about the</div><div class='ctx'>  * fb aperture size and the amount of pre-reserved memory.</div><div class='hunk'>@@ -77,6 +82,7 @@</div><div class='ctx'> #define  GRDOM_FULL	(0&lt;&lt;2)</div><div class='ctx'> #define  GRDOM_RENDER	(1&lt;&lt;2)</div><div class='ctx'> #define  GRDOM_MEDIA	(3&lt;&lt;2)</div><div class='add'>+#define  GRDOM_RESET_ENABLE (1&lt;&lt;0)</div><div class='ctx'> </div><div class='ctx'> #define GEN6_MBCUNIT_SNPCR	0x900c /* for LLC config */</div><div class='ctx'> #define   GEN6_MBC_SNPCR_SHIFT	21</div><div class='hunk'>@@ -125,6 +131,13 @@</div><div class='ctx'> #define   ECOCHK_PPGTT_CACHE64B		(0x3&lt;&lt;3)</div><div class='ctx'> #define   ECOCHK_PPGTT_CACHE4B		(0x0&lt;&lt;3)</div><div class='ctx'> </div><div class='add'>+#define GAC_ECO_BITS			0x14090</div><div class='add'>+#define   ECOBITS_PPGTT_CACHE64B	(3&lt;&lt;8)</div><div class='add'>+#define   ECOBITS_PPGTT_CACHE4B		(0&lt;&lt;8)</div><div class='add'>+</div><div class='add'>+#define GAB_CTL				0x24000</div><div class='add'>+#define   GAB_CTL_CONT_AFTER_PAGEFAULT	(1&lt;&lt;8)</div><div class='add'>+</div><div class='ctx'> /* VGA stuff */</div><div class='ctx'> </div><div class='ctx'> #define VGA_ST01_MDA 0x3ba</div><div class='hunk'>@@ -197,6 +210,14 @@</div><div class='ctx'> #define MI_DISPLAY_FLIP		MI_INSTR(0x14, 2)</div><div class='ctx'> #define MI_DISPLAY_FLIP_I915	MI_INSTR(0x14, 1)</div><div class='ctx'> #define   MI_DISPLAY_FLIP_PLANE(n) ((n) &lt;&lt; 20)</div><div class='add'>+/* IVB has funny definitions for which plane to flip. */</div><div class='add'>+#define   MI_DISPLAY_FLIP_IVB_PLANE_A  (0 &lt;&lt; 19)</div><div class='add'>+#define   MI_DISPLAY_FLIP_IVB_PLANE_B  (1 &lt;&lt; 19)</div><div class='add'>+#define   MI_DISPLAY_FLIP_IVB_SPRITE_A (2 &lt;&lt; 19)</div><div class='add'>+#define   MI_DISPLAY_FLIP_IVB_SPRITE_B (3 &lt;&lt; 19)</div><div class='add'>+#define   MI_DISPLAY_FLIP_IVB_PLANE_C  (4 &lt;&lt; 19)</div><div class='add'>+#define   MI_DISPLAY_FLIP_IVB_SPRITE_C (5 &lt;&lt; 19)</div><div class='add'>+</div><div class='ctx'> #define MI_SET_CONTEXT		MI_INSTR(0x18, 0)</div><div class='ctx'> #define   MI_MM_SPACE_GTT		(1&lt;&lt;8)</div><div class='ctx'> #define   MI_MM_SPACE_PHYSICAL		(0&lt;&lt;8)</div><div class='hunk'>@@ -222,6 +243,7 @@</div><div class='ctx'> #define   MI_BATCH_NON_SECURE	(1)</div><div class='ctx'> #define   MI_BATCH_NON_SECURE_I965 (1&lt;&lt;8)</div><div class='ctx'> #define MI_BATCH_BUFFER_START	MI_INSTR(0x31, 0)</div><div class='add'>+#define   MI_BATCH_GTT		    (2&lt;&lt;6) /* aliased with (1&lt;&lt;7) on gen4 */</div><div class='ctx'> #define MI_SEMAPHORE_MBOX	MI_INSTR(0x16, 1) /* gen6+ */</div><div class='ctx'> #define  MI_SEMAPHORE_GLOBAL_GTT    (1&lt;&lt;22)</div><div class='ctx'> #define  MI_SEMAPHORE_UPDATE	    (1&lt;&lt;21)</div><div class='hunk'>@@ -301,6 +323,61 @@</div><div class='ctx'> #define  DEBUG_RESET_RENDER		(1&lt;&lt;8)</div><div class='ctx'> #define  DEBUG_RESET_DISPLAY		(1&lt;&lt;9)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * DPIO - a special bus for various display related registers to hide behind:</div><div class='add'>+ *  0x800c: m1, m2, n, p1, p2, k dividers</div><div class='add'>+ *  0x8014: REF and SFR select</div><div class='add'>+ *  0x8014: N divider, VCO select</div><div class='add'>+ *  0x801c/3c: core clock bits</div><div class='add'>+ *  0x8048/68: low pass filter coefficients</div><div class='add'>+ *  0x8100: fast clock controls</div><div class='add'>+ */</div><div class='add'>+#define DPIO_PKT			0x2100</div><div class='add'>+#define  DPIO_RID			(0&lt;&lt;24)</div><div class='add'>+#define  DPIO_OP_WRITE			(1&lt;&lt;16)</div><div class='add'>+#define  DPIO_OP_READ			(0&lt;&lt;16)</div><div class='add'>+#define  DPIO_PORTID			(0x12&lt;&lt;8)</div><div class='add'>+#define  DPIO_BYTE			(0xf&lt;&lt;4)</div><div class='add'>+#define  DPIO_BUSY			(1&lt;&lt;0) /* status only */</div><div class='add'>+#define DPIO_DATA			0x2104</div><div class='add'>+#define DPIO_REG			0x2108</div><div class='add'>+#define DPIO_CTL			0x2110</div><div class='add'>+#define  DPIO_MODSEL1			(1&lt;&lt;3) /* if ref clk b == 27 */</div><div class='add'>+#define  DPIO_MODSEL0			(1&lt;&lt;2) /* if ref clk a == 27 */</div><div class='add'>+#define  DPIO_SFR_BYPASS		(1&lt;&lt;1)</div><div class='add'>+#define  DPIO_RESET			(1&lt;&lt;0)</div><div class='add'>+</div><div class='add'>+#define _DPIO_DIV_A			0x800c</div><div class='add'>+#define   DPIO_POST_DIV_SHIFT		(28) /* 3 bits */</div><div class='add'>+#define   DPIO_K_SHIFT			(24) /* 4 bits */</div><div class='add'>+#define   DPIO_P1_SHIFT			(21) /* 3 bits */</div><div class='add'>+#define   DPIO_P2_SHIFT			(16) /* 5 bits */</div><div class='add'>+#define   DPIO_N_SHIFT			(12) /* 4 bits */</div><div class='add'>+#define   DPIO_ENABLE_CALIBRATION	(1&lt;&lt;11)</div><div class='add'>+#define   DPIO_M1DIV_SHIFT		(8) /* 3 bits */</div><div class='add'>+#define   DPIO_M2DIV_MASK		0xff</div><div class='add'>+#define _DPIO_DIV_B			0x802c</div><div class='add'>+#define DPIO_DIV(pipe) _PIPE(pipe, _DPIO_DIV_A, _DPIO_DIV_B)</div><div class='add'>+</div><div class='add'>+#define _DPIO_REFSFR_A			0x8014</div><div class='add'>+#define   DPIO_REFSEL_OVERRIDE		27</div><div class='add'>+#define   DPIO_PLL_MODESEL_SHIFT	24 /* 3 bits */</div><div class='add'>+#define   DPIO_BIAS_CURRENT_CTL_SHIFT	21 /* 3 bits, always 0x7 */</div><div class='add'>+#define   DPIO_PLL_REFCLK_SEL_SHIFT	16 /* 2 bits */</div><div class='add'>+#define   DPIO_DRIVER_CTL_SHIFT		12 /* always set to 0x8 */</div><div class='add'>+#define   DPIO_CLK_BIAS_CTL_SHIFT	8 /* always set to 0x5 */</div><div class='add'>+#define _DPIO_REFSFR_B			0x8034</div><div class='add'>+#define DPIO_REFSFR(pipe) _PIPE(pipe, _DPIO_REFSFR_A, _DPIO_REFSFR_B)</div><div class='add'>+</div><div class='add'>+#define _DPIO_CORE_CLK_A		0x801c</div><div class='add'>+#define _DPIO_CORE_CLK_B		0x803c</div><div class='add'>+#define DPIO_CORE_CLK(pipe) _PIPE(pipe, _DPIO_CORE_CLK_A, _DPIO_CORE_CLK_B)</div><div class='add'>+</div><div class='add'>+#define _DPIO_LFP_COEFF_A		0x8048</div><div class='add'>+#define _DPIO_LFP_COEFF_B		0x8068</div><div class='add'>+#define DPIO_LFP_COEFF(pipe) _PIPE(pipe, _DPIO_LFP_COEFF_A, _DPIO_LFP_COEFF_B)</div><div class='add'>+</div><div class='add'>+#define DPIO_FASTCLK_DISABLE		0x8100</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Fence registers</div><div class='hunk'>@@ -360,8 +437,6 @@</div><div class='ctx'> #define ARB_MODE		0x04030</div><div class='ctx'> #define   ARB_MODE_SWIZZLE_SNB	(1&lt;&lt;4)</div><div class='ctx'> #define   ARB_MODE_SWIZZLE_IVB	(1&lt;&lt;5)</div><div class='del'>-#define   ARB_MODE_ENABLE(x)	GFX_MODE_ENABLE(x)</div><div class='del'>-#define   ARB_MODE_DISABLE(x)	GFX_MODE_DISABLE(x)</div><div class='ctx'> #define RENDER_HWS_PGA_GEN7	(0x04080)</div><div class='ctx'> #define RING_FAULT_REG(ring)	(0x4094 + 0x100*(ring)-&gt;id)</div><div class='ctx'> #define DONE_REG		0x40b0</div><div class='hunk'>@@ -417,6 +492,7 @@</div><div class='ctx'> #define INSTDONE	0x02090</div><div class='ctx'> #define NOPID		0x02094</div><div class='ctx'> #define HWSTAM		0x02098</div><div class='add'>+#define DMA_FADD_I8XX	0x020d0</div><div class='ctx'> </div><div class='ctx'> #define ERROR_GEN6	0x040a0</div><div class='ctx'> </div><div class='hunk'>@@ -432,6 +508,7 @@</div><div class='ctx'>  */</div><div class='ctx'> # define _3D_CHICKEN2_WM_READ_PIPELINED			(1 &lt;&lt; 14)</div><div class='ctx'> #define _3D_CHICKEN3	0x02090</div><div class='add'>+#define  _3D_CHICKEN_SF_DISABLE_FASTCLIP_CULL		(1 &lt;&lt; 5)</div><div class='ctx'> </div><div class='ctx'> #define MI_MODE		0x0209c</div><div class='ctx'> # define VS_TIMER_DISPATCH				(1 &lt;&lt; 6)</div><div class='hunk'>@@ -447,14 +524,16 @@</div><div class='ctx'> #define   GFX_PSMI_GRANULARITY		(1&lt;&lt;10)</div><div class='ctx'> #define   GFX_PPGTT_ENABLE		(1&lt;&lt;9)</div><div class='ctx'> </div><div class='del'>-#define GFX_MODE_ENABLE(bit) (((bit) &lt;&lt; 16) | (bit))</div><div class='del'>-#define GFX_MODE_DISABLE(bit) (((bit) &lt;&lt; 16) | (0))</div><div class='del'>-</div><div class='ctx'> #define SCPD0		0x0209c /* 915+ only */</div><div class='ctx'> #define IER		0x020a0</div><div class='ctx'> #define IIR		0x020a4</div><div class='ctx'> #define IMR		0x020a8</div><div class='ctx'> #define ISR		0x020ac</div><div class='add'>+#define VLV_IIR_RW	0x182084</div><div class='add'>+#define VLV_IER		0x1820a0</div><div class='add'>+#define VLV_IIR		0x1820a4</div><div class='add'>+#define VLV_IMR		0x1820a8</div><div class='add'>+#define VLV_ISR		0x1820ac</div><div class='ctx'> #define   I915_PIPE_CONTROL_NOTIFY_INTERRUPT		(1&lt;&lt;18)</div><div class='ctx'> #define   I915_DISPLAY_PORT_INTERRUPT			(1&lt;&lt;17)</div><div class='ctx'> #define   I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT	(1&lt;&lt;15)</div><div class='hunk'>@@ -500,7 +579,6 @@</div><div class='ctx'> #define LM_BURST_LENGTH     0x00000700</div><div class='ctx'> #define LM_FIFO_WATERMARK   0x0000001F</div><div class='ctx'> #define MI_ARB_STATE	0x020e4 /* 915+ only */</div><div class='del'>-#define   MI_ARB_MASK_SHIFT	  16	/* shift for enable bits */</div><div class='ctx'> </div><div class='ctx'> /* Make render/texture TLB fetches lower priorty than associated data</div><div class='ctx'>  *   fetches. This is not turned on by default</div><div class='hunk'>@@ -565,7 +643,6 @@</div><div class='ctx'> #define   MI_ARB_DISPLAY_PRIORITY_B_A		(1 &lt;&lt; 0)	/* display B &gt; display A */</div><div class='ctx'> </div><div class='ctx'> #define CACHE_MODE_0	0x02120 /* 915+ only */</div><div class='del'>-#define   CM0_MASK_SHIFT          16</div><div class='ctx'> #define   CM0_IZ_OPT_DISABLE      (1&lt;&lt;6)</div><div class='ctx'> #define   CM0_ZR_OPT_DISABLE      (1&lt;&lt;5)</div><div class='ctx'> #define	  CM0_STC_EVICT_DISABLE_LRA_SNB	(1&lt;&lt;5)</div><div class='hunk'>@@ -579,7 +656,12 @@</div><div class='ctx'> #define   ECO_GATING_CX_ONLY	(1&lt;&lt;3)</div><div class='ctx'> #define   ECO_FLIP_DONE		(1&lt;&lt;0)</div><div class='ctx'> </div><div class='del'>-/* GEN6 interrupt control */</div><div class='add'>+#define CACHE_MODE_1		0x7004 /* IVB+ */</div><div class='add'>+#define   PIXEL_SUBSPAN_COLLECT_OPT_DISABLE (1&lt;&lt;6)</div><div class='add'>+</div><div class='add'>+/* GEN6 interrupt control</div><div class='add'>+ * Note that the per-ring interrupt bits do alias with the global interrupt bits</div><div class='add'>+ * in GTIMR. */</div><div class='ctx'> #define GEN6_RENDER_HWSTAM	0x2098</div><div class='ctx'> #define GEN6_RENDER_IMR		0x20a8</div><div class='ctx'> #define   GEN6_RENDER_CONTEXT_SWITCH_INTERRUPT		(1 &lt;&lt; 8)</div><div class='hunk'>@@ -615,6 +697,21 @@</div><div class='ctx'> </div><div class='ctx'> #define GEN6_BSD_RNCID			0x12198</div><div class='ctx'> </div><div class='add'>+#define GEN7_FF_THREAD_MODE		0x20a0</div><div class='add'>+#define   GEN7_FF_SCHED_MASK		0x0077070</div><div class='add'>+#define   GEN7_FF_TS_SCHED_HS1		(0x5&lt;&lt;16)</div><div class='add'>+#define   GEN7_FF_TS_SCHED_HS0		(0x3&lt;&lt;16)</div><div class='add'>+#define   GEN7_FF_TS_SCHED_LOAD_BALANCE	(0x1&lt;&lt;16)</div><div class='add'>+#define   GEN7_FF_TS_SCHED_HW		(0x0&lt;&lt;16) /* Default */</div><div class='add'>+#define   GEN7_FF_VS_SCHED_HS1		(0x5&lt;&lt;12)</div><div class='add'>+#define   GEN7_FF_VS_SCHED_HS0		(0x3&lt;&lt;12)</div><div class='add'>+#define   GEN7_FF_VS_SCHED_LOAD_BALANCE	(0x1&lt;&lt;12) /* Default */</div><div class='add'>+#define   GEN7_FF_VS_SCHED_HW		(0x0&lt;&lt;12)</div><div class='add'>+#define   GEN7_FF_DS_SCHED_HS1		(0x5&lt;&lt;4)</div><div class='add'>+#define   GEN7_FF_DS_SCHED_HS0		(0x3&lt;&lt;4)</div><div class='add'>+#define   GEN7_FF_DS_SCHED_LOAD_BALANCE	(0x1&lt;&lt;4)  /* Default */</div><div class='add'>+#define   GEN7_FF_DS_SCHED_HW		(0x0&lt;&lt;4)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Framebuffer compression (915+ only)</div><div class='ctx'>  */</div><div class='hunk'>@@ -743,9 +840,9 @@</div><div class='ctx'> #define   GMBUS_PORT_PANEL	3</div><div class='ctx'> #define   GMBUS_PORT_DPC	4 /* HDMIC */</div><div class='ctx'> #define   GMBUS_PORT_DPB	5 /* SDVO, HDMIB */</div><div class='del'>-				  /* 6 reserved */</div><div class='del'>-#define   GMBUS_PORT_DPD	7 /* HDMID */</div><div class='del'>-#define   GMBUS_NUM_PORTS       8</div><div class='add'>+#define   GMBUS_PORT_DPD	6 /* HDMID */</div><div class='add'>+#define   GMBUS_PORT_RESERVED	7 /* 7 reserved */</div><div class='add'>+#define   GMBUS_NUM_PORTS	(GMBUS_PORT_DPD - GMBUS_PORT_SSC + 1)</div><div class='ctx'> #define GMBUS1			0x5104 /* command/status */</div><div class='ctx'> #define   GMBUS_SW_CLR_INT	(1&lt;&lt;31)</div><div class='ctx'> #define   GMBUS_SW_RDY		(1&lt;&lt;30)</div><div class='hunk'>@@ -797,7 +894,9 @@</div><div class='ctx'> #define DPLL(pipe) _PIPE(pipe, _DPLL_A, _DPLL_B)</div><div class='ctx'> #define   DPLL_VCO_ENABLE		(1 &lt;&lt; 31)</div><div class='ctx'> #define   DPLL_DVO_HIGH_SPEED		(1 &lt;&lt; 30)</div><div class='add'>+#define   DPLL_EXT_BUFFER_ENABLE_VLV	(1 &lt;&lt; 30)</div><div class='ctx'> #define   DPLL_SYNCLOCK_ENABLE		(1 &lt;&lt; 29)</div><div class='add'>+#define   DPLL_REFA_CLK_ENABLE_VLV	(1 &lt;&lt; 29)</div><div class='ctx'> #define   DPLL_VGA_MODE_DIS		(1 &lt;&lt; 28)</div><div class='ctx'> #define   DPLLB_MODE_DAC_SERIAL		(1 &lt;&lt; 26) /* i915 */</div><div class='ctx'> #define   DPLLB_MODE_LVDS		(2 &lt;&lt; 26) /* i915 */</div><div class='hunk'>@@ -809,6 +908,7 @@</div><div class='ctx'> #define   DPLL_P2_CLOCK_DIV_MASK	0x03000000 /* i915 */</div><div class='ctx'> #define   DPLL_FPA01_P1_POST_DIV_MASK	0x00ff0000 /* i915 */</div><div class='ctx'> #define   DPLL_FPA01_P1_POST_DIV_MASK_PINEVIEW	0x00ff8000 /* Pineview */</div><div class='add'>+#define   DPLL_INTEGRATED_CLOCK_VLV	(1&lt;&lt;13)</div><div class='ctx'> </div><div class='ctx'> #define SRX_INDEX		0x3c4</div><div class='ctx'> #define SRX_DATA		0x3c5</div><div class='hunk'>@@ -904,6 +1004,7 @@</div><div class='ctx'> #define   DPLL_MD_VGA_UDI_MULTIPLIER_SHIFT	0</div><div class='ctx'> #define _DPLL_B_MD 0x06020 /* 965+ only */</div><div class='ctx'> #define DPLL_MD(pipe) _PIPE(pipe, _DPLL_A_MD, _DPLL_B_MD)</div><div class='add'>+</div><div class='ctx'> #define _FPA0	0x06040</div><div class='ctx'> #define _FPA1	0x06044</div><div class='ctx'> #define _FPB0	0x06048</div><div class='hunk'>@@ -1044,6 +1145,9 @@</div><div class='ctx'> #define RAMCLK_GATE_D		0x6210		/* CRL only */</div><div class='ctx'> #define DEUC			0x6214          /* CRL only */</div><div class='ctx'> </div><div class='add'>+#define FW_BLC_SELF_VLV		0x6500</div><div class='add'>+#define  FW_CSPWRDWNEN		(1&lt;&lt;15)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Palette regs</div><div class='ctx'>  */</div><div class='hunk'>@@ -1601,9 +1705,12 @@</div><div class='ctx'> /* Video Data Island Packet control */</div><div class='ctx'> #define VIDEO_DIP_DATA		0x61178</div><div class='ctx'> #define VIDEO_DIP_CTL		0x61170</div><div class='add'>+/* Pre HSW: */</div><div class='ctx'> #define   VIDEO_DIP_ENABLE		(1 &lt;&lt; 31)</div><div class='ctx'> #define   VIDEO_DIP_PORT_B		(1 &lt;&lt; 29)</div><div class='ctx'> #define   VIDEO_DIP_PORT_C		(2 &lt;&lt; 29)</div><div class='add'>+#define   VIDEO_DIP_PORT_D		(3 &lt;&lt; 29)</div><div class='add'>+#define   VIDEO_DIP_PORT_MASK		(3 &lt;&lt; 29)</div><div class='ctx'> #define   VIDEO_DIP_ENABLE_AVI		(1 &lt;&lt; 21)</div><div class='ctx'> #define   VIDEO_DIP_ENABLE_VENDOR	(2 &lt;&lt; 21)</div><div class='ctx'> #define   VIDEO_DIP_ENABLE_SPD		(8 &lt;&lt; 21)</div><div class='hunk'>@@ -1614,6 +1721,10 @@</div><div class='ctx'> #define   VIDEO_DIP_FREQ_ONCE		(0 &lt;&lt; 16)</div><div class='ctx'> #define   VIDEO_DIP_FREQ_VSYNC		(1 &lt;&lt; 16)</div><div class='ctx'> #define   VIDEO_DIP_FREQ_2VSYNC		(2 &lt;&lt; 16)</div><div class='add'>+#define   VIDEO_DIP_FREQ_MASK		(3 &lt;&lt; 16)</div><div class='add'>+/* HSW and later: */</div><div class='add'>+#define   VIDEO_DIP_ENABLE_AVI_HSW	(1 &lt;&lt; 12)</div><div class='add'>+#define   VIDEO_DIP_ENABLE_SPD_HSW	(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='ctx'> /* Panel power sequencing */</div><div class='ctx'> #define PP_STATUS	0x61200</div><div class='hunk'>@@ -2380,7 +2491,8 @@</div><div class='ctx'> </div><div class='ctx'> /* Pipe A */</div><div class='ctx'> #define _PIPEADSL		0x70000</div><div class='del'>-#define   DSL_LINEMASK		0x00000fff</div><div class='add'>+#define   DSL_LINEMASK_GEN2	0x00000fff</div><div class='add'>+#define   DSL_LINEMASK_GEN3	0x00001fff</div><div class='ctx'> #define _PIPEACONF		0x70008</div><div class='ctx'> #define   PIPECONF_ENABLE	(1&lt;&lt;31)</div><div class='ctx'> #define   PIPECONF_DISABLE	0</div><div class='hunk'>@@ -2422,23 +2534,30 @@</div><div class='ctx'> #define   PIPECONF_DITHER_TYPE_TEMP (3&lt;&lt;2)</div><div class='ctx'> #define _PIPEASTAT		0x70024</div><div class='ctx'> #define   PIPE_FIFO_UNDERRUN_STATUS		(1UL&lt;&lt;31)</div><div class='add'>+#define   SPRITE1_FLIPDONE_INT_EN_VLV		(1UL&lt;&lt;30)</div><div class='ctx'> #define   PIPE_CRC_ERROR_ENABLE			(1UL&lt;&lt;29)</div><div class='ctx'> #define   PIPE_CRC_DONE_ENABLE			(1UL&lt;&lt;28)</div><div class='ctx'> #define   PIPE_GMBUS_EVENT_ENABLE		(1UL&lt;&lt;27)</div><div class='add'>+#define   PLANE_FLIP_DONE_INT_EN_VLV		(1UL&lt;&lt;26)</div><div class='ctx'> #define   PIPE_HOTPLUG_INTERRUPT_ENABLE		(1UL&lt;&lt;26)</div><div class='ctx'> #define   PIPE_VSYNC_INTERRUPT_ENABLE		(1UL&lt;&lt;25)</div><div class='ctx'> #define   PIPE_DISPLAY_LINE_COMPARE_ENABLE	(1UL&lt;&lt;24)</div><div class='ctx'> #define   PIPE_DPST_EVENT_ENABLE		(1UL&lt;&lt;23)</div><div class='add'>+#define   SPRITE0_FLIP_DONE_INT_EN_VLV		(1UL&lt;&lt;26)</div><div class='ctx'> #define   PIPE_LEGACY_BLC_EVENT_ENABLE		(1UL&lt;&lt;22)</div><div class='ctx'> #define   PIPE_ODD_FIELD_INTERRUPT_ENABLE	(1UL&lt;&lt;21)</div><div class='ctx'> #define   PIPE_EVEN_FIELD_INTERRUPT_ENABLE	(1UL&lt;&lt;20)</div><div class='ctx'> #define   PIPE_HOTPLUG_TV_INTERRUPT_ENABLE	(1UL&lt;&lt;18) /* pre-965 */</div><div class='ctx'> #define   PIPE_START_VBLANK_INTERRUPT_ENABLE	(1UL&lt;&lt;18) /* 965 or later */</div><div class='ctx'> #define   PIPE_VBLANK_INTERRUPT_ENABLE		(1UL&lt;&lt;17)</div><div class='add'>+#define   PIPEA_HBLANK_INT_EN_VLV		(1UL&lt;&lt;16)</div><div class='ctx'> #define   PIPE_OVERLAY_UPDATED_ENABLE		(1UL&lt;&lt;16)</div><div class='add'>+#define   SPRITE1_FLIPDONE_INT_STATUS_VLV	(1UL&lt;&lt;15)</div><div class='add'>+#define   SPRITE0_FLIPDONE_INT_STATUS_VLV	(1UL&lt;&lt;15)</div><div class='ctx'> #define   PIPE_CRC_ERROR_INTERRUPT_STATUS	(1UL&lt;&lt;13)</div><div class='ctx'> #define   PIPE_CRC_DONE_INTERRUPT_STATUS	(1UL&lt;&lt;12)</div><div class='ctx'> #define   PIPE_GMBUS_INTERRUPT_STATUS		(1UL&lt;&lt;11)</div><div class='add'>+#define   PLANE_FLIPDONE_INT_STATUS_VLV		(1UL&lt;&lt;10)</div><div class='ctx'> #define   PIPE_HOTPLUG_INTERRUPT_STATUS		(1UL&lt;&lt;10)</div><div class='ctx'> #define   PIPE_VSYNC_INTERRUPT_STATUS		(1UL&lt;&lt;9)</div><div class='ctx'> #define   PIPE_DISPLAY_LINE_COMPARE_STATUS	(1UL&lt;&lt;8)</div><div class='hunk'>@@ -2463,6 +2582,40 @@</div><div class='ctx'> #define PIPEFRAMEPIXEL(pipe)  _PIPE(pipe, _PIPEAFRAMEPIXEL, _PIPEBFRAMEPIXEL)</div><div class='ctx'> #define PIPESTAT(pipe) _PIPE(pipe, _PIPEASTAT, _PIPEBSTAT)</div><div class='ctx'> </div><div class='add'>+#define VLV_DPFLIPSTAT				0x70028</div><div class='add'>+#define   PIPEB_LINE_COMPARE_STATUS		(1&lt;&lt;29)</div><div class='add'>+#define   PIPEB_HLINE_INT_EN			(1&lt;&lt;28)</div><div class='add'>+#define   PIPEB_VBLANK_INT_EN			(1&lt;&lt;27)</div><div class='add'>+#define   SPRITED_FLIPDONE_INT_EN		(1&lt;&lt;26)</div><div class='add'>+#define   SPRITEC_FLIPDONE_INT_EN		(1&lt;&lt;25)</div><div class='add'>+#define   PLANEB_FLIPDONE_INT_EN		(1&lt;&lt;24)</div><div class='add'>+#define   PIPEA_LINE_COMPARE_STATUS		(1&lt;&lt;21)</div><div class='add'>+#define   PIPEA_HLINE_INT_EN			(1&lt;&lt;20)</div><div class='add'>+#define   PIPEA_VBLANK_INT_EN			(1&lt;&lt;19)</div><div class='add'>+#define   SPRITEB_FLIPDONE_INT_EN		(1&lt;&lt;18)</div><div class='add'>+#define   SPRITEA_FLIPDONE_INT_EN		(1&lt;&lt;17)</div><div class='add'>+#define   PLANEA_FLIPDONE_INT_EN		(1&lt;&lt;16)</div><div class='add'>+</div><div class='add'>+#define DPINVGTT				0x7002c /* VLV only */</div><div class='add'>+#define   CURSORB_INVALID_GTT_INT_EN		(1&lt;&lt;23)</div><div class='add'>+#define   CURSORA_INVALID_GTT_INT_EN		(1&lt;&lt;22)</div><div class='add'>+#define   SPRITED_INVALID_GTT_INT_EN		(1&lt;&lt;21)</div><div class='add'>+#define   SPRITEC_INVALID_GTT_INT_EN		(1&lt;&lt;20)</div><div class='add'>+#define   PLANEB_INVALID_GTT_INT_EN		(1&lt;&lt;19)</div><div class='add'>+#define   SPRITEB_INVALID_GTT_INT_EN		(1&lt;&lt;18)</div><div class='add'>+#define   SPRITEA_INVALID_GTT_INT_EN		(1&lt;&lt;17)</div><div class='add'>+#define   PLANEA_INVALID_GTT_INT_EN		(1&lt;&lt;16)</div><div class='add'>+#define   DPINVGTT_EN_MASK			0xff0000</div><div class='add'>+#define   CURSORB_INVALID_GTT_STATUS		(1&lt;&lt;7)</div><div class='add'>+#define   CURSORA_INVALID_GTT_STATUS		(1&lt;&lt;6)</div><div class='add'>+#define   SPRITED_INVALID_GTT_STATUS		(1&lt;&lt;5)</div><div class='add'>+#define   SPRITEC_INVALID_GTT_STATUS		(1&lt;&lt;4)</div><div class='add'>+#define   PLANEB_INVALID_GTT_STATUS		(1&lt;&lt;3)</div><div class='add'>+#define   SPRITEB_INVALID_GTT_STATUS		(1&lt;&lt;2)</div><div class='add'>+#define   SPRITEA_INVALID_GTT_STATUS		(1&lt;&lt;1)</div><div class='add'>+#define   PLANEA_INVALID_GTT_STATUS		(1&lt;&lt;0)</div><div class='add'>+#define   DPINVGTT_STATUS_MASK			0xff</div><div class='add'>+</div><div class='ctx'> #define DSPARB			0x70030</div><div class='ctx'> #define   DSPARB_CSTART_MASK	(0x7f &lt;&lt; 7)</div><div class='ctx'> #define   DSPARB_CSTART_SHIFT	7</div><div class='hunk'>@@ -2492,11 +2645,28 @@</div><div class='ctx'> #define   DSPFW_HPLL_CURSOR_MASK	(0x3f&lt;&lt;16)</div><div class='ctx'> #define   DSPFW_HPLL_SR_MASK		(0x1ff)</div><div class='ctx'> </div><div class='add'>+/* drain latency register values*/</div><div class='add'>+#define DRAIN_LATENCY_PRECISION_32	32</div><div class='add'>+#define DRAIN_LATENCY_PRECISION_16	16</div><div class='add'>+#define VLV_DDL1			0x70050</div><div class='add'>+#define DDL_CURSORA_PRECISION_32	(1&lt;&lt;31)</div><div class='add'>+#define DDL_CURSORA_PRECISION_16	(0&lt;&lt;31)</div><div class='add'>+#define DDL_CURSORA_SHIFT		24</div><div class='add'>+#define DDL_PLANEA_PRECISION_32		(1&lt;&lt;7)</div><div class='add'>+#define DDL_PLANEA_PRECISION_16		(0&lt;&lt;7)</div><div class='add'>+#define VLV_DDL2			0x70054</div><div class='add'>+#define DDL_CURSORB_PRECISION_32	(1&lt;&lt;31)</div><div class='add'>+#define DDL_CURSORB_PRECISION_16	(0&lt;&lt;31)</div><div class='add'>+#define DDL_CURSORB_SHIFT		24</div><div class='add'>+#define DDL_PLANEB_PRECISION_32		(1&lt;&lt;7)</div><div class='add'>+#define DDL_PLANEB_PRECISION_16		(0&lt;&lt;7)</div><div class='add'>+</div><div class='ctx'> /* FIFO watermark sizes etc */</div><div class='ctx'> #define G4X_FIFO_LINE_SIZE	64</div><div class='ctx'> #define I915_FIFO_LINE_SIZE	64</div><div class='ctx'> #define I830_FIFO_LINE_SIZE	32</div><div class='ctx'> </div><div class='add'>+#define VALLEYVIEW_FIFO_SIZE	255</div><div class='ctx'> #define G4X_FIFO_SIZE		127</div><div class='ctx'> #define I965_FIFO_SIZE		512</div><div class='ctx'> #define I945_FIFO_SIZE		127</div><div class='hunk'>@@ -2504,6 +2674,7 @@</div><div class='ctx'> #define I855GM_FIFO_SIZE	127 /* In cachelines */</div><div class='ctx'> #define I830_FIFO_SIZE		95</div><div class='ctx'> </div><div class='add'>+#define VALLEYVIEW_MAX_WM	0xff</div><div class='ctx'> #define G4X_MAX_WM		0x3f</div><div class='ctx'> #define I915_MAX_WM		0x3f</div><div class='ctx'> </div><div class='hunk'>@@ -2518,6 +2689,7 @@</div><div class='ctx'> #define PINEVIEW_CURSOR_DFT_WM	0</div><div class='ctx'> #define PINEVIEW_CURSOR_GUARD_WM	5</div><div class='ctx'> </div><div class='add'>+#define VALLEYVIEW_CURSOR_MAX_WM 64</div><div class='ctx'> #define I965_CURSOR_FIFO	64</div><div class='ctx'> #define I965_CURSOR_MAX_WM	32</div><div class='ctx'> #define I965_CURSOR_DFT_WM	8</div><div class='hunk'>@@ -2726,6 +2898,13 @@</div><div class='ctx'> #define DSPSURF(plane) _PIPE(plane, _DSPASURF, _DSPBSURF)</div><div class='ctx'> #define DSPTILEOFF(plane) _PIPE(plane, _DSPATILEOFF, _DSPBTILEOFF)</div><div class='ctx'> </div><div class='add'>+/* Display/Sprite base address macros */</div><div class='add'>+#define DISP_BASEADDR_MASK	(0xfffff000)</div><div class='add'>+#define I915_LO_DISPBASE(val)	(val &amp; ~DISP_BASEADDR_MASK)</div><div class='add'>+#define I915_HI_DISPBASE(val)	(val &amp; DISP_BASEADDR_MASK)</div><div class='add'>+#define I915_MODIFY_DISPBASE(reg, gfx_addr) \</div><div class='add'>+		(I915_WRITE(reg, gfx_addr | I915_LO_DISPBASE(I915_READ(reg))))</div><div class='add'>+</div><div class='ctx'> /* VBIOS flags */</div><div class='ctx'> #define SWF00			0x71410</div><div class='ctx'> #define SWF01			0x71414</div><div class='hunk'>@@ -3058,25 +3237,38 @@</div><div class='ctx'> #define DE_PCH_EVENT_IVB		(1&lt;&lt;28)</div><div class='ctx'> #define DE_DP_A_HOTPLUG_IVB		(1&lt;&lt;27)</div><div class='ctx'> #define DE_AUX_CHANNEL_A_IVB		(1&lt;&lt;26)</div><div class='add'>+#define DE_SPRITEC_FLIP_DONE_IVB	(1&lt;&lt;14)</div><div class='add'>+#define DE_PLANEC_FLIP_DONE_IVB		(1&lt;&lt;13)</div><div class='add'>+#define DE_PIPEC_VBLANK_IVB		(1&lt;&lt;10)</div><div class='ctx'> #define DE_SPRITEB_FLIP_DONE_IVB	(1&lt;&lt;9)</div><div class='del'>-#define DE_SPRITEA_FLIP_DONE_IVB	(1&lt;&lt;4)</div><div class='ctx'> #define DE_PLANEB_FLIP_DONE_IVB		(1&lt;&lt;8)</div><div class='del'>-#define DE_PLANEA_FLIP_DONE_IVB		(1&lt;&lt;3)</div><div class='ctx'> #define DE_PIPEB_VBLANK_IVB		(1&lt;&lt;5)</div><div class='add'>+#define DE_SPRITEA_FLIP_DONE_IVB	(1&lt;&lt;4)</div><div class='add'>+#define DE_PLANEA_FLIP_DONE_IVB		(1&lt;&lt;3)</div><div class='ctx'> #define DE_PIPEA_VBLANK_IVB		(1&lt;&lt;0)</div><div class='ctx'> </div><div class='add'>+#define VLV_MASTER_IER			0x4400c /* Gunit master IER */</div><div class='add'>+#define   MASTER_INTERRUPT_ENABLE	(1&lt;&lt;31)</div><div class='add'>+</div><div class='ctx'> #define DEISR   0x44000</div><div class='ctx'> #define DEIMR   0x44004</div><div class='ctx'> #define DEIIR   0x44008</div><div class='ctx'> #define DEIER   0x4400c</div><div class='ctx'> </div><div class='del'>-/* GT interrupt */</div><div class='del'>-#define GT_PIPE_NOTIFY		(1 &lt;&lt; 4)</div><div class='del'>-#define GT_SYNC_STATUS          (1 &lt;&lt; 2)</div><div class='del'>-#define GT_USER_INTERRUPT       (1 &lt;&lt; 0)</div><div class='del'>-#define GT_BSD_USER_INTERRUPT   (1 &lt;&lt; 5)</div><div class='del'>-#define GT_GEN6_BSD_USER_INTERRUPT	(1 &lt;&lt; 12)</div><div class='del'>-#define GT_BLT_USER_INTERRUPT	(1 &lt;&lt; 22)</div><div class='add'>+/* GT interrupt.</div><div class='add'>+ * Note that for gen6+ the ring-specific interrupt bits do alias with the</div><div class='add'>+ * corresponding bits in the per-ring interrupt control registers. */</div><div class='add'>+#define GT_GEN6_BLT_FLUSHDW_NOTIFY_INTERRUPT	(1 &lt;&lt; 26)</div><div class='add'>+#define GT_GEN6_BLT_CS_ERROR_INTERRUPT		(1 &lt;&lt; 25)</div><div class='add'>+#define GT_GEN6_BLT_USER_INTERRUPT		(1 &lt;&lt; 22)</div><div class='add'>+#define GT_GEN6_BSD_CS_ERROR_INTERRUPT		(1 &lt;&lt; 15)</div><div class='add'>+#define GT_GEN6_BSD_USER_INTERRUPT		(1 &lt;&lt; 12)</div><div class='add'>+#define GT_BSD_USER_INTERRUPT			(1 &lt;&lt; 5) /* ilk only */</div><div class='add'>+#define GT_GEN7_L3_PARITY_ERROR_INTERRUPT	(1 &lt;&lt; 5)</div><div class='add'>+#define GT_PIPE_NOTIFY				(1 &lt;&lt; 4)</div><div class='add'>+#define GT_RENDER_CS_ERROR_INTERRUPT		(1 &lt;&lt; 3)</div><div class='add'>+#define GT_SYNC_STATUS				(1 &lt;&lt; 2)</div><div class='add'>+#define GT_USER_INTERRUPT			(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='ctx'> #define GTISR   0x44010</div><div class='ctx'> #define GTIMR   0x44014</div><div class='hunk'>@@ -3129,7 +3321,7 @@</div><div class='ctx'> </div><div class='ctx'> /* PCH */</div><div class='ctx'> </div><div class='del'>-/* south display engine interrupt */</div><div class='add'>+/* south display engine interrupt: IBX */</div><div class='ctx'> #define SDE_AUDIO_POWER_D	(1 &lt;&lt; 27)</div><div class='ctx'> #define SDE_AUDIO_POWER_C	(1 &lt;&lt; 26)</div><div class='ctx'> #define SDE_AUDIO_POWER_B	(1 &lt;&lt; 25)</div><div class='hunk'>@@ -3165,15 +3357,44 @@</div><div class='ctx'> #define SDE_TRANSA_CRC_ERR	(1 &lt;&lt; 1)</div><div class='ctx'> #define SDE_TRANSA_FIFO_UNDER	(1 &lt;&lt; 0)</div><div class='ctx'> #define SDE_TRANS_MASK		(0x3f)</div><div class='del'>-/* CPT */</div><div class='del'>-#define SDE_CRT_HOTPLUG_CPT	(1 &lt;&lt; 19)</div><div class='add'>+</div><div class='add'>+/* south display engine interrupt: CPT/PPT */</div><div class='add'>+#define SDE_AUDIO_POWER_D_CPT	(1 &lt;&lt; 31)</div><div class='add'>+#define SDE_AUDIO_POWER_C_CPT	(1 &lt;&lt; 30)</div><div class='add'>+#define SDE_AUDIO_POWER_B_CPT	(1 &lt;&lt; 29)</div><div class='add'>+#define SDE_AUDIO_POWER_SHIFT_CPT   29</div><div class='add'>+#define SDE_AUDIO_POWER_MASK_CPT    (7 &lt;&lt; 29)</div><div class='add'>+#define SDE_AUXD_CPT		(1 &lt;&lt; 27)</div><div class='add'>+#define SDE_AUXC_CPT		(1 &lt;&lt; 26)</div><div class='add'>+#define SDE_AUXB_CPT		(1 &lt;&lt; 25)</div><div class='add'>+#define SDE_AUX_MASK_CPT	(7 &lt;&lt; 25)</div><div class='ctx'> #define SDE_PORTD_HOTPLUG_CPT	(1 &lt;&lt; 23)</div><div class='ctx'> #define SDE_PORTC_HOTPLUG_CPT	(1 &lt;&lt; 22)</div><div class='ctx'> #define SDE_PORTB_HOTPLUG_CPT	(1 &lt;&lt; 21)</div><div class='add'>+#define SDE_CRT_HOTPLUG_CPT	(1 &lt;&lt; 19)</div><div class='ctx'> #define SDE_HOTPLUG_MASK_CPT	(SDE_CRT_HOTPLUG_CPT |		\</div><div class='ctx'> 				 SDE_PORTD_HOTPLUG_CPT |	\</div><div class='ctx'> 				 SDE_PORTC_HOTPLUG_CPT |	\</div><div class='ctx'> 				 SDE_PORTB_HOTPLUG_CPT)</div><div class='add'>+#define SDE_GMBUS_CPT		(1 &lt;&lt; 17)</div><div class='add'>+#define SDE_AUDIO_CP_REQ_C_CPT	(1 &lt;&lt; 10)</div><div class='add'>+#define SDE_AUDIO_CP_CHG_C_CPT	(1 &lt;&lt; 9)</div><div class='add'>+#define SDE_FDI_RXC_CPT		(1 &lt;&lt; 8)</div><div class='add'>+#define SDE_AUDIO_CP_REQ_B_CPT	(1 &lt;&lt; 6)</div><div class='add'>+#define SDE_AUDIO_CP_CHG_B_CPT	(1 &lt;&lt; 5)</div><div class='add'>+#define SDE_FDI_RXB_CPT		(1 &lt;&lt; 4)</div><div class='add'>+#define SDE_AUDIO_CP_REQ_A_CPT	(1 &lt;&lt; 2)</div><div class='add'>+#define SDE_AUDIO_CP_CHG_A_CPT	(1 &lt;&lt; 1)</div><div class='add'>+#define SDE_FDI_RXA_CPT		(1 &lt;&lt; 0)</div><div class='add'>+#define SDE_AUDIO_CP_REQ_CPT	(SDE_AUDIO_CP_REQ_C_CPT | \</div><div class='add'>+				 SDE_AUDIO_CP_REQ_B_CPT | \</div><div class='add'>+				 SDE_AUDIO_CP_REQ_A_CPT)</div><div class='add'>+#define SDE_AUDIO_CP_CHG_CPT	(SDE_AUDIO_CP_CHG_C_CPT | \</div><div class='add'>+				 SDE_AUDIO_CP_CHG_B_CPT | \</div><div class='add'>+				 SDE_AUDIO_CP_CHG_A_CPT)</div><div class='add'>+#define SDE_FDI_MASK_CPT	(SDE_FDI_RXC_CPT | \</div><div class='add'>+				 SDE_FDI_RXB_CPT | \</div><div class='add'>+				 SDE_FDI_RXA_CPT)</div><div class='ctx'> </div><div class='ctx'> #define SDEISR  0xc4000</div><div class='ctx'> #define SDEIMR  0xc4004</div><div class='hunk'>@@ -3226,15 +3447,15 @@</div><div class='ctx'> </div><div class='ctx'> #define _PCH_DPLL_A              0xc6014</div><div class='ctx'> #define _PCH_DPLL_B              0xc6018</div><div class='del'>-#define PCH_DPLL(pipe) (pipe == 0 ?  _PCH_DPLL_A : _PCH_DPLL_B)</div><div class='add'>+#define _PCH_DPLL(pll) (pll == 0 ? _PCH_DPLL_A : _PCH_DPLL_B)</div><div class='ctx'> </div><div class='ctx'> #define _PCH_FPA0                0xc6040</div><div class='ctx'> #define  FP_CB_TUNE		(0x3&lt;&lt;22)</div><div class='ctx'> #define _PCH_FPA1                0xc6044</div><div class='ctx'> #define _PCH_FPB0                0xc6048</div><div class='ctx'> #define _PCH_FPB1                0xc604c</div><div class='del'>-#define PCH_FP0(pipe) (pipe == 0 ? _PCH_FPA0 : _PCH_FPB0)</div><div class='del'>-#define PCH_FP1(pipe) (pipe == 0 ? _PCH_FPA1 : _PCH_FPB1)</div><div class='add'>+#define _PCH_FP0(pll) (pll == 0 ? _PCH_FPA0 : _PCH_FPB0)</div><div class='add'>+#define _PCH_FP1(pll) (pll == 0 ? _PCH_FPA1 : _PCH_FPB1)</div><div class='ctx'> </div><div class='ctx'> #define PCH_DPLL_TEST           0xc606c</div><div class='ctx'> </div><div class='hunk'>@@ -3329,6 +3550,57 @@</div><div class='ctx'> #define TVIDEO_DIP_DATA(pipe) _PIPE(pipe, _VIDEO_DIP_DATA_A, _VIDEO_DIP_DATA_B)</div><div class='ctx'> #define TVIDEO_DIP_GCP(pipe) _PIPE(pipe, _VIDEO_DIP_GCP_A, _VIDEO_DIP_GCP_B)</div><div class='ctx'> </div><div class='add'>+#define VLV_VIDEO_DIP_CTL_A		0x60220</div><div class='add'>+#define VLV_VIDEO_DIP_DATA_A		0x60208</div><div class='add'>+#define VLV_VIDEO_DIP_GDCP_PAYLOAD_A	0x60210</div><div class='add'>+</div><div class='add'>+#define VLV_VIDEO_DIP_CTL_B		0x61170</div><div class='add'>+#define VLV_VIDEO_DIP_DATA_B		0x61174</div><div class='add'>+#define VLV_VIDEO_DIP_GDCP_PAYLOAD_B	0x61178</div><div class='add'>+</div><div class='add'>+#define VLV_TVIDEO_DIP_CTL(pipe) \</div><div class='add'>+	 _PIPE(pipe, VLV_VIDEO_DIP_CTL_A, VLV_VIDEO_DIP_CTL_B)</div><div class='add'>+#define VLV_TVIDEO_DIP_DATA(pipe) \</div><div class='add'>+	 _PIPE(pipe, VLV_VIDEO_DIP_DATA_A, VLV_VIDEO_DIP_DATA_B)</div><div class='add'>+#define VLV_TVIDEO_DIP_GCP(pipe) \</div><div class='add'>+	_PIPE(pipe, VLV_VIDEO_DIP_GDCP_PAYLOAD_A, VLV_VIDEO_DIP_GDCP_PAYLOAD_B)</div><div class='add'>+</div><div class='add'>+/* Haswell DIP controls */</div><div class='add'>+#define HSW_VIDEO_DIP_CTL_A		0x60200</div><div class='add'>+#define HSW_VIDEO_DIP_AVI_DATA_A	0x60220</div><div class='add'>+#define HSW_VIDEO_DIP_VS_DATA_A		0x60260</div><div class='add'>+#define HSW_VIDEO_DIP_SPD_DATA_A	0x602A0</div><div class='add'>+#define HSW_VIDEO_DIP_GMP_DATA_A	0x602E0</div><div class='add'>+#define HSW_VIDEO_DIP_VSC_DATA_A	0x60320</div><div class='add'>+#define HSW_VIDEO_DIP_AVI_ECC_A		0x60240</div><div class='add'>+#define HSW_VIDEO_DIP_VS_ECC_A		0x60280</div><div class='add'>+#define HSW_VIDEO_DIP_SPD_ECC_A		0x602C0</div><div class='add'>+#define HSW_VIDEO_DIP_GMP_ECC_A		0x60300</div><div class='add'>+#define HSW_VIDEO_DIP_VSC_ECC_A		0x60344</div><div class='add'>+#define HSW_VIDEO_DIP_GCP_A		0x60210</div><div class='add'>+</div><div class='add'>+#define HSW_VIDEO_DIP_CTL_B		0x61200</div><div class='add'>+#define HSW_VIDEO_DIP_AVI_DATA_B	0x61220</div><div class='add'>+#define HSW_VIDEO_DIP_VS_DATA_B		0x61260</div><div class='add'>+#define HSW_VIDEO_DIP_SPD_DATA_B	0x612A0</div><div class='add'>+#define HSW_VIDEO_DIP_GMP_DATA_B	0x612E0</div><div class='add'>+#define HSW_VIDEO_DIP_VSC_DATA_B	0x61320</div><div class='add'>+#define HSW_VIDEO_DIP_BVI_ECC_B		0x61240</div><div class='add'>+#define HSW_VIDEO_DIP_VS_ECC_B		0x61280</div><div class='add'>+#define HSW_VIDEO_DIP_SPD_ECC_B		0x612C0</div><div class='add'>+#define HSW_VIDEO_DIP_GMP_ECC_B		0x61300</div><div class='add'>+#define HSW_VIDEO_DIP_VSC_ECC_B		0x61344</div><div class='add'>+#define HSW_VIDEO_DIP_GCP_B		0x61210</div><div class='add'>+</div><div class='add'>+#define HSW_TVIDEO_DIP_CTL(pipe) \</div><div class='add'>+	 _PIPE(pipe, HSW_VIDEO_DIP_CTL_A, HSW_VIDEO_DIP_CTL_B)</div><div class='add'>+#define HSW_TVIDEO_DIP_AVI_DATA(pipe) \</div><div class='add'>+	 _PIPE(pipe, HSW_VIDEO_DIP_AVI_DATA_A, HSW_VIDEO_DIP_AVI_DATA_B)</div><div class='add'>+#define HSW_TVIDEO_DIP_SPD_DATA(pipe) \</div><div class='add'>+	 _PIPE(pipe, HSW_VIDEO_DIP_SPD_DATA_A, HSW_VIDEO_DIP_SPD_DATA_B)</div><div class='add'>+#define HSW_TVIDEO_DIP_GCP(pipe) \</div><div class='add'>+	_PIPE(pipe, HSW_VIDEO_DIP_GCP_A, HSW_VIDEO_DIP_GCP_B)</div><div class='add'>+</div><div class='ctx'> #define _TRANS_HTOTAL_B          0xe1000</div><div class='ctx'> #define _TRANS_HBLANK_B          0xe1004</div><div class='ctx'> #define _TRANS_HSYNC_B           0xe1008</div><div class='hunk'>@@ -3489,6 +3761,9 @@</div><div class='ctx'> #define  FDI_LINK_TRAIN_PATTERN_IDLE_CPT	(2&lt;&lt;8)</div><div class='ctx'> #define  FDI_LINK_TRAIN_NORMAL_CPT		(3&lt;&lt;8)</div><div class='ctx'> #define  FDI_LINK_TRAIN_PATTERN_MASK_CPT	(3&lt;&lt;8)</div><div class='add'>+/* LPT */</div><div class='add'>+#define  FDI_PORT_WIDTH_2X_LPT			(1&lt;&lt;19)</div><div class='add'>+#define  FDI_PORT_WIDTH_1X_LPT			(0&lt;&lt;19)</div><div class='ctx'> </div><div class='ctx'> #define _FDI_RXA_MISC            0xf0010</div><div class='ctx'> #define _FDI_RXB_MISC            0xf1010</div><div class='hunk'>@@ -3549,6 +3824,7 @@</div><div class='ctx'> #define  ADPA_CRT_HOTPLUG_FORCE_TRIGGER (1&lt;&lt;16)</div><div class='ctx'> </div><div class='ctx'> /* or SDVOB */</div><div class='add'>+#define VLV_HDMIB 0x61140</div><div class='ctx'> #define HDMIB   0xe1140</div><div class='ctx'> #define  PORT_ENABLE    (1 &lt;&lt; 31)</div><div class='ctx'> #define  TRANSCODER(pipe)       ((pipe) &lt;&lt; 30)</div><div class='hunk'>@@ -3714,6 +3990,8 @@</div><div class='ctx'> #define  EDP_LINK_TRAIN_VOL_EMP_MASK_IVB	(0x3f&lt;&lt;22)</div><div class='ctx'> </div><div class='ctx'> #define  FORCEWAKE				0xA18C</div><div class='add'>+#define  FORCEWAKE_VLV				0x1300b0</div><div class='add'>+#define  FORCEWAKE_ACK_VLV			0x1300b4</div><div class='ctx'> #define  FORCEWAKE_ACK				0x130090</div><div class='ctx'> #define  FORCEWAKE_MT				0xa188 /* multi-threaded */</div><div class='ctx'> #define  FORCEWAKE_MT_ACK			0x130040</div><div class='hunk'>@@ -3731,6 +4009,7 @@</div><div class='ctx'> </div><div class='ctx'> #define GEN6_UCGCTL1				0x9400</div><div class='ctx'> # define GEN6_BLBUNIT_CLOCK_GATE_DISABLE		(1 &lt;&lt; 5)</div><div class='add'>+# define GEN6_CSUNIT_CLOCK_GATE_DISABLE			(1 &lt;&lt; 7)</div><div class='ctx'> </div><div class='ctx'> #define GEN6_UCGCTL2				0x9404</div><div class='ctx'> # define GEN6_RCZUNIT_CLOCK_GATE_DISABLE		(1 &lt;&lt; 13)</div><div class='hunk'>@@ -3811,6 +4090,11 @@</div><div class='ctx'> 						 GEN6_PM_RP_DOWN_THRESHOLD | \</div><div class='ctx'> 						 GEN6_PM_RP_DOWN_TIMEOUT)</div><div class='ctx'> </div><div class='add'>+#define GEN6_GT_GFX_RC6_LOCKED			0x138104</div><div class='add'>+#define GEN6_GT_GFX_RC6				0x138108</div><div class='add'>+#define GEN6_GT_GFX_RC6p			0x13810C</div><div class='add'>+#define GEN6_GT_GFX_RC6pp			0x138110</div><div class='add'>+</div><div class='ctx'> #define GEN6_PCODE_MAILBOX			0x138124</div><div class='ctx'> #define   GEN6_PCODE_READY			(1&lt;&lt;31)</div><div class='ctx'> #define   GEN6_READ_OC_PARAMS			0xc</div><div class='hunk'>@@ -3870,4 +4154,197 @@</div><div class='ctx'> #define   AUD_CONFIG_PIXEL_CLOCK_HDMI		(0xf &lt;&lt; 16)</div><div class='ctx'> #define   AUD_CONFIG_DISABLE_NCTS		(1 &lt;&lt; 3)</div><div class='ctx'> </div><div class='add'>+/* HSW Power Wells */</div><div class='add'>+#define HSW_PWR_WELL_CTL1		0x45400		/* BIOS */</div><div class='add'>+#define HSW_PWR_WELL_CTL2		0x45404		/* Driver */</div><div class='add'>+#define HSW_PWR_WELL_CTL3		0x45408		/* KVMR */</div><div class='add'>+#define HSW_PWR_WELL_CTL4		0x4540C		/* Debug */</div><div class='add'>+#define   HSW_PWR_WELL_ENABLE				(1&lt;&lt;31)</div><div class='add'>+#define   HSW_PWR_WELL_STATE				(1&lt;&lt;30)</div><div class='add'>+#define HSW_PWR_WELL_CTL5		0x45410</div><div class='add'>+#define   HSW_PWR_WELL_ENABLE_SINGLE_STEP	(1&lt;&lt;31)</div><div class='add'>+#define   HSW_PWR_WELL_PWR_GATE_OVERRIDE	(1&lt;&lt;20)</div><div class='add'>+#define   HSW_PWR_WELL_FORCE_ON				(1&lt;&lt;19)</div><div class='add'>+#define HSW_PWR_WELL_CTL6		0x45414</div><div class='add'>+</div><div class='add'>+/* Per-pipe DDI Function Control */</div><div class='add'>+#define PIPE_DDI_FUNC_CTL_A			0x60400</div><div class='add'>+#define PIPE_DDI_FUNC_CTL_B			0x61400</div><div class='add'>+#define PIPE_DDI_FUNC_CTL_C			0x62400</div><div class='add'>+#define PIPE_DDI_FUNC_CTL_EDP		0x6F400</div><div class='add'>+#define DDI_FUNC_CTL(pipe) _PIPE(pipe, \</div><div class='add'>+					PIPE_DDI_FUNC_CTL_A, \</div><div class='add'>+					PIPE_DDI_FUNC_CTL_B)</div><div class='add'>+#define  PIPE_DDI_FUNC_ENABLE		(1&lt;&lt;31)</div><div class='add'>+/* Those bits are ignored by pipe EDP since it can only connect to DDI A */</div><div class='add'>+#define  PIPE_DDI_PORT_MASK				(0xf&lt;&lt;28)</div><div class='add'>+#define  PIPE_DDI_SELECT_PORT(x)		((x)&lt;&lt;28)</div><div class='add'>+#define  PIPE_DDI_MODE_SELECT_HDMI		(0&lt;&lt;24)</div><div class='add'>+#define  PIPE_DDI_MODE_SELECT_DVI		(1&lt;&lt;24)</div><div class='add'>+#define  PIPE_DDI_MODE_SELECT_DP_SST	(2&lt;&lt;24)</div><div class='add'>+#define  PIPE_DDI_MODE_SELECT_DP_MST	(3&lt;&lt;24)</div><div class='add'>+#define  PIPE_DDI_MODE_SELECT_FDI		(4&lt;&lt;24)</div><div class='add'>+#define  PIPE_DDI_BPC_8					(0&lt;&lt;20)</div><div class='add'>+#define  PIPE_DDI_BPC_10				(1&lt;&lt;20)</div><div class='add'>+#define  PIPE_DDI_BPC_6					(2&lt;&lt;20)</div><div class='add'>+#define  PIPE_DDI_BPC_12				(3&lt;&lt;20)</div><div class='add'>+#define  PIPE_DDI_BFI_ENABLE			(1&lt;&lt;4)</div><div class='add'>+#define  PIPE_DDI_PORT_WIDTH_X1			(0&lt;&lt;1)</div><div class='add'>+#define  PIPE_DDI_PORT_WIDTH_X2			(1&lt;&lt;1)</div><div class='add'>+#define  PIPE_DDI_PORT_WIDTH_X4			(3&lt;&lt;1)</div><div class='add'>+</div><div class='add'>+/* DisplayPort Transport Control */</div><div class='add'>+#define DP_TP_CTL_A			0x64040</div><div class='add'>+#define DP_TP_CTL_B			0x64140</div><div class='add'>+#define DP_TP_CTL(port) _PORT(port, \</div><div class='add'>+					DP_TP_CTL_A, \</div><div class='add'>+					DP_TP_CTL_B)</div><div class='add'>+#define  DP_TP_CTL_ENABLE		(1&lt;&lt;31)</div><div class='add'>+#define  DP_TP_CTL_MODE_SST	(0&lt;&lt;27)</div><div class='add'>+#define  DP_TP_CTL_MODE_MST	(1&lt;&lt;27)</div><div class='add'>+#define  DP_TP_CTL_ENHANCED_FRAME_ENABLE	(1&lt;&lt;18)</div><div class='add'>+#define  DP_TP_CTL_FDI_AUTOTRAIN	(1&lt;&lt;15)</div><div class='add'>+#define  DP_TP_CTL_LINK_TRAIN_MASK		(7&lt;&lt;8)</div><div class='add'>+#define  DP_TP_CTL_LINK_TRAIN_PAT1		(0&lt;&lt;8)</div><div class='add'>+#define  DP_TP_CTL_LINK_TRAIN_PAT2		(1&lt;&lt;8)</div><div class='add'>+#define  DP_TP_CTL_LINK_TRAIN_NORMAL	(3&lt;&lt;8)</div><div class='add'>+</div><div class='add'>+/* DisplayPort Transport Status */</div><div class='add'>+#define DP_TP_STATUS_A			0x64044</div><div class='add'>+#define DP_TP_STATUS_B			0x64144</div><div class='add'>+#define DP_TP_STATUS(port) _PORT(port, \</div><div class='add'>+					DP_TP_STATUS_A, \</div><div class='add'>+					DP_TP_STATUS_B)</div><div class='add'>+#define  DP_TP_STATUS_AUTOTRAIN_DONE	(1&lt;&lt;12)</div><div class='add'>+</div><div class='add'>+/* DDI Buffer Control */</div><div class='add'>+#define DDI_BUF_CTL_A				0x64000</div><div class='add'>+#define DDI_BUF_CTL_B				0x64100</div><div class='add'>+#define DDI_BUF_CTL(port) _PORT(port, \</div><div class='add'>+					DDI_BUF_CTL_A, \</div><div class='add'>+					DDI_BUF_CTL_B)</div><div class='add'>+#define  DDI_BUF_CTL_ENABLE				(1&lt;&lt;31)</div><div class='add'>+#define  DDI_BUF_EMP_400MV_0DB_HSW		(0&lt;&lt;24)   /* Sel0 */</div><div class='add'>+#define  DDI_BUF_EMP_400MV_3_5DB_HSW	(1&lt;&lt;24)   /* Sel1 */</div><div class='add'>+#define  DDI_BUF_EMP_400MV_6DB_HSW		(2&lt;&lt;24)   /* Sel2 */</div><div class='add'>+#define  DDI_BUF_EMP_400MV_9_5DB_HSW	(3&lt;&lt;24)   /* Sel3 */</div><div class='add'>+#define  DDI_BUF_EMP_600MV_0DB_HSW		(4&lt;&lt;24)   /* Sel4 */</div><div class='add'>+#define  DDI_BUF_EMP_600MV_3_5DB_HSW	(5&lt;&lt;24)   /* Sel5 */</div><div class='add'>+#define  DDI_BUF_EMP_600MV_6DB_HSW		(6&lt;&lt;24)   /* Sel6 */</div><div class='add'>+#define  DDI_BUF_EMP_800MV_0DB_HSW		(7&lt;&lt;24)   /* Sel7 */</div><div class='add'>+#define  DDI_BUF_EMP_800MV_3_5DB_HSW	(8&lt;&lt;24)   /* Sel8 */</div><div class='add'>+#define  DDI_BUF_EMP_MASK				(0xf&lt;&lt;24)</div><div class='add'>+#define  DDI_BUF_IS_IDLE				(1&lt;&lt;7)</div><div class='add'>+#define  DDI_PORT_WIDTH_X1				(0&lt;&lt;1)</div><div class='add'>+#define  DDI_PORT_WIDTH_X2				(1&lt;&lt;1)</div><div class='add'>+#define  DDI_PORT_WIDTH_X4				(3&lt;&lt;1)</div><div class='add'>+#define  DDI_INIT_DISPLAY_DETECTED		(1&lt;&lt;0)</div><div class='add'>+</div><div class='add'>+/* DDI Buffer Translations */</div><div class='add'>+#define DDI_BUF_TRANS_A				0x64E00</div><div class='add'>+#define DDI_BUF_TRANS_B				0x64E60</div><div class='add'>+#define DDI_BUF_TRANS(port) _PORT(port, \</div><div class='add'>+					DDI_BUF_TRANS_A, \</div><div class='add'>+					DDI_BUF_TRANS_B)</div><div class='add'>+</div><div class='add'>+/* Sideband Interface (SBI) is programmed indirectly, via</div><div class='add'>+ * SBI_ADDR, which contains the register offset; and SBI_DATA,</div><div class='add'>+ * which contains the payload */</div><div class='add'>+#define SBI_ADDR				0xC6000</div><div class='add'>+#define SBI_DATA				0xC6004</div><div class='add'>+#define SBI_CTL_STAT			0xC6008</div><div class='add'>+#define  SBI_CTL_OP_CRRD		(0x6&lt;&lt;8)</div><div class='add'>+#define  SBI_CTL_OP_CRWR		(0x7&lt;&lt;8)</div><div class='add'>+#define  SBI_RESPONSE_FAIL		(0x1&lt;&lt;1)</div><div class='add'>+#define  SBI_RESPONSE_SUCCESS	(0x0&lt;&lt;1)</div><div class='add'>+#define  SBI_BUSY				(0x1&lt;&lt;0)</div><div class='add'>+#define  SBI_READY				(0x0&lt;&lt;0)</div><div class='add'>+</div><div class='add'>+/* SBI offsets */</div><div class='add'>+#define  SBI_SSCDIVINTPHASE6		0x0600</div><div class='add'>+#define   SBI_SSCDIVINTPHASE_DIVSEL_MASK	((0x7f)&lt;&lt;1)</div><div class='add'>+#define   SBI_SSCDIVINTPHASE_DIVSEL(x)		((x)&lt;&lt;1)</div><div class='add'>+#define   SBI_SSCDIVINTPHASE_INCVAL_MASK	((0x7f)&lt;&lt;8)</div><div class='add'>+#define   SBI_SSCDIVINTPHASE_INCVAL(x)		((x)&lt;&lt;8)</div><div class='add'>+#define   SBI_SSCDIVINTPHASE_DIR(x)			((x)&lt;&lt;15)</div><div class='add'>+#define   SBI_SSCDIVINTPHASE_PROPAGATE		(1&lt;&lt;0)</div><div class='add'>+#define  SBI_SSCCTL					0x020c</div><div class='add'>+#define  SBI_SSCCTL6				0x060C</div><div class='add'>+#define   SBI_SSCCTL_DISABLE		(1&lt;&lt;0)</div><div class='add'>+#define  SBI_SSCAUXDIV6				0x0610</div><div class='add'>+#define   SBI_SSCAUXDIV_FINALDIV2SEL(x)		((x)&lt;&lt;4)</div><div class='add'>+#define  SBI_DBUFF0					0x2a00</div><div class='add'>+</div><div class='add'>+/* LPT PIXCLK_GATE */</div><div class='add'>+#define PIXCLK_GATE				0xC6020</div><div class='add'>+#define  PIXCLK_GATE_UNGATE		1&lt;&lt;0</div><div class='add'>+#define  PIXCLK_GATE_GATE		0&lt;&lt;0</div><div class='add'>+</div><div class='add'>+/* SPLL */</div><div class='add'>+#define SPLL_CTL				0x46020</div><div class='add'>+#define  SPLL_PLL_ENABLE		(1&lt;&lt;31)</div><div class='add'>+#define  SPLL_PLL_SCC			(1&lt;&lt;28)</div><div class='add'>+#define  SPLL_PLL_NON_SCC		(2&lt;&lt;28)</div><div class='add'>+#define  SPLL_PLL_FREQ_810MHz	(0&lt;&lt;26)</div><div class='add'>+#define  SPLL_PLL_FREQ_1350MHz	(1&lt;&lt;26)</div><div class='add'>+</div><div class='add'>+/* WRPLL */</div><div class='add'>+#define WRPLL_CTL1				0x46040</div><div class='add'>+#define WRPLL_CTL2				0x46060</div><div class='add'>+#define  WRPLL_PLL_ENABLE				(1&lt;&lt;31)</div><div class='add'>+#define  WRPLL_PLL_SELECT_SSC			(0x01&lt;&lt;28)</div><div class='add'>+#define  WRPLL_PLL_SELECT_NON_SCC		(0x02&lt;&lt;28)</div><div class='add'>+#define  WRPLL_PLL_SELECT_LCPLL_2700	(0x03&lt;&lt;28)</div><div class='add'>+/* WRPLL divider programming */</div><div class='add'>+#define  WRPLL_DIVIDER_REFERENCE(x)		((x)&lt;&lt;0)</div><div class='add'>+#define  WRPLL_DIVIDER_POST(x)			((x)&lt;&lt;8)</div><div class='add'>+#define  WRPLL_DIVIDER_FEEDBACK(x)		((x)&lt;&lt;16)</div><div class='add'>+</div><div class='add'>+/* Port clock selection */</div><div class='add'>+#define PORT_CLK_SEL_A			0x46100</div><div class='add'>+#define PORT_CLK_SEL_B			0x46104</div><div class='add'>+#define PORT_CLK_SEL(port) _PORT(port, \</div><div class='add'>+					PORT_CLK_SEL_A, \</div><div class='add'>+					PORT_CLK_SEL_B)</div><div class='add'>+#define  PORT_CLK_SEL_LCPLL_2700	(0&lt;&lt;29)</div><div class='add'>+#define  PORT_CLK_SEL_LCPLL_1350	(1&lt;&lt;29)</div><div class='add'>+#define  PORT_CLK_SEL_LCPLL_810		(2&lt;&lt;29)</div><div class='add'>+#define  PORT_CLK_SEL_SPLL			(3&lt;&lt;29)</div><div class='add'>+#define  PORT_CLK_SEL_WRPLL1		(4&lt;&lt;29)</div><div class='add'>+#define  PORT_CLK_SEL_WRPLL2		(5&lt;&lt;29)</div><div class='add'>+</div><div class='add'>+/* Pipe clock selection */</div><div class='add'>+#define PIPE_CLK_SEL_A			0x46140</div><div class='add'>+#define PIPE_CLK_SEL_B			0x46144</div><div class='add'>+#define PIPE_CLK_SEL(pipe) _PIPE(pipe, \</div><div class='add'>+					PIPE_CLK_SEL_A, \</div><div class='add'>+					PIPE_CLK_SEL_B)</div><div class='add'>+/* For each pipe, we need to select the corresponding port clock */</div><div class='add'>+#define  PIPE_CLK_SEL_DISABLED	(0x0&lt;&lt;29)</div><div class='add'>+#define  PIPE_CLK_SEL_PORT(x)	((x+1)&lt;&lt;29)</div><div class='add'>+</div><div class='add'>+/* LCPLL Control */</div><div class='add'>+#define LCPLL_CTL				0x130040</div><div class='add'>+#define  LCPLL_PLL_DISABLE		(1&lt;&lt;31)</div><div class='add'>+#define  LCPLL_PLL_LOCK			(1&lt;&lt;30)</div><div class='add'>+#define  LCPLL_CD_CLOCK_DISABLE	(1&lt;&lt;25)</div><div class='add'>+#define  LCPLL_CD2X_CLOCK_DISABLE	(1&lt;&lt;23)</div><div class='add'>+</div><div class='add'>+/* Pipe WM_LINETIME - watermark line time */</div><div class='add'>+#define PIPE_WM_LINETIME_A		0x45270</div><div class='add'>+#define PIPE_WM_LINETIME_B		0x45274</div><div class='add'>+#define PIPE_WM_LINETIME(pipe) _PIPE(pipe, \</div><div class='add'>+					PIPE_WM_LINETIME_A, \</div><div class='add'>+					PIPE_WM_LINETIME_A)</div><div class='add'>+#define   PIPE_WM_LINETIME_MASK		(0x1ff)</div><div class='add'>+#define   PIPE_WM_LINETIME_TIME(x)			((x))</div><div class='add'>+#define   PIPE_WM_LINETIME_IPS_LINETIME_MASK	(0x1ff&lt;&lt;16)</div><div class='add'>+#define   PIPE_WM_LINETIME_IPS_LINETIME(x)		((x)&lt;&lt;16)</div><div class='add'>+</div><div class='add'>+/* SFUSE_STRAP */</div><div class='add'>+#define SFUSE_STRAP				0xc2014</div><div class='add'>+#define  SFUSE_STRAP_DDIB_DETECTED	(1&lt;&lt;2)</div><div class='add'>+#define  SFUSE_STRAP_DDIC_DETECTED	(1&lt;&lt;1)</div><div class='add'>+#define  SFUSE_STRAP_DDID_DETECTED	(1&lt;&lt;0)</div><div class='add'>+</div><div class='ctx'> #endif /* _I915_REG_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c<br/>index 2b5eb229ff2c..0ede02a99d91 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_suspend.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_suspend.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_suspend.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_suspend.c</a></div><div class='hunk'>@@ -40,7 +40,7 @@ static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (HAS_PCH_SPLIT(dev))</div><div class='del'>-		dpll_reg = PCH_DPLL(pipe);</div><div class='add'>+		dpll_reg = _PCH_DPLL(pipe);</div><div class='ctx'> 	else</div><div class='ctx'> 		dpll_reg = (pipe == PIPE_A) ? _DPLL_A : _DPLL_B;</div><div class='ctx'> </div><div class='hunk'>@@ -876,22 +876,6 @@ int i915_restore_state(struct drm_device *dev)</div><div class='ctx'> 		I915_WRITE(IER, dev_priv-&gt;saveIER);</div><div class='ctx'> 		I915_WRITE(IMR, dev_priv-&gt;saveIMR);</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-</div><div class='del'>-	if (drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='del'>-		intel_init_clock_gating(dev);</div><div class='del'>-</div><div class='del'>-	if (IS_IRONLAKE_M(dev)) {</div><div class='del'>-		ironlake_enable_drps(dev);</div><div class='del'>-		intel_init_emon(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen &gt;= 6) {</div><div class='del'>-		gen6_enable_rps(dev_priv);</div><div class='del'>-		gen6_update_ring_freq(dev_priv);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* Cache mode state */</div><div class='ctx'> 	I915_WRITE(CACHE_MODE_0, dev_priv-&gt;saveCACHE_MODE_0 | 0xffff0000);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c<br/>new file mode 100644<br/>index 000000000000..79f83445afa0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_sysfs.c</a></div><div class='hunk'>@@ -0,0 +1,111 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright © 2012 Intel Corporation</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the next</div><div class='add'>+ * paragraph) shall be included in all copies or substantial portions of the</div><div class='add'>+ * Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER</div><div class='add'>+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS</div><div class='add'>+ * IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors:</div><div class='add'>+ *    Ben Widawsky &lt;ben@bwidawsk.net&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/stat.h&gt;</div><div class='add'>+#include &lt;linux/sysfs.h&gt;</div><div class='add'>+#include "i915_drv.h"</div><div class='add'>+</div><div class='add'>+static u32 calc_residency(struct drm_device *dev, const u32 reg)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u64 raw_time; /* 32b value may overflow during fixed point math */</div><div class='add'>+</div><div class='add'>+	if (!intel_enable_rc6(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	raw_time = I915_READ(reg) * 128ULL;</div><div class='add'>+	return DIV_ROUND_UP_ULL(raw_time, 100000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+show_rc6_mask(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);</div><div class='add'>+	return snprintf(buf, PAGE_SIZE, "%x", intel_enable_rc6(dminor-&gt;dev));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+show_rc6_ms(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);</div><div class='add'>+	u32 rc6_residency = calc_residency(dminor-&gt;dev, GEN6_GT_GFX_RC6);</div><div class='add'>+	return snprintf(buf, PAGE_SIZE, "%u", rc6_residency);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+show_rc6p_ms(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);</div><div class='add'>+	u32 rc6p_residency = calc_residency(dminor-&gt;dev, GEN6_GT_GFX_RC6p);</div><div class='add'>+	return snprintf(buf, PAGE_SIZE, "%u", rc6p_residency);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+show_rc6pp_ms(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);</div><div class='add'>+	u32 rc6pp_residency = calc_residency(dminor-&gt;dev, GEN6_GT_GFX_RC6pp);</div><div class='add'>+	return snprintf(buf, PAGE_SIZE, "%u", rc6pp_residency);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEVICE_ATTR(rc6_enable, S_IRUGO, show_rc6_mask, NULL);</div><div class='add'>+static DEVICE_ATTR(rc6_residency_ms, S_IRUGO, show_rc6_ms, NULL);</div><div class='add'>+static DEVICE_ATTR(rc6p_residency_ms, S_IRUGO, show_rc6p_ms, NULL);</div><div class='add'>+static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO, show_rc6pp_ms, NULL);</div><div class='add'>+</div><div class='add'>+static struct attribute *rc6_attrs[] = {</div><div class='add'>+	&amp;dev_attr_rc6_enable.attr,</div><div class='add'>+	&amp;dev_attr_rc6_residency_ms.attr,</div><div class='add'>+	&amp;dev_attr_rc6p_residency_ms.attr,</div><div class='add'>+	&amp;dev_attr_rc6pp_residency_ms.attr,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute_group rc6_attr_group = {</div><div class='add'>+	.name = power_group_name,</div><div class='add'>+	.attrs =  rc6_attrs</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void i915_setup_sysfs(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* ILK doesn't have any residency information */</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &lt; 6)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = sysfs_merge_group(&amp;dev-&gt;primary-&gt;kdev.kobj, &amp;rc6_attr_group);</div><div class='add'>+	if (ret)</div><div class='add'>+		DRM_ERROR("sysfs setup failed\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void i915_teardown_sysfs(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	sysfs_unmerge_group(&amp;dev-&gt;primary-&gt;kdev.kobj, &amp;rc6_attr_group);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/i915/i915_trace_points.c b/drivers/gpu/drm/i915/i915_trace_points.c<br/>index ead876eb6ea0..f1df2bd4ecf4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_trace_points.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/i915_trace_points.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/i915_trace_points.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/i915_trace_points.c</a></div><div class='hunk'>@@ -7,5 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "i915_drv.h"</div><div class='ctx'> </div><div class='add'>+#ifndef __CHECKER__</div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='ctx'> #include "i915_trace.h"</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_acpi.c b/drivers/gpu/drm/i915/intel_acpi.c<br/>index bae3edf956a4..f413899475e9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_acpi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_acpi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_acpi.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;acpi/acpi_drivers.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "drmP.h"</div><div class='add'>+#include "i915_drv.h"</div><div class='ctx'> </div><div class='ctx'> #define INTEL_DSM_REVISION_ID 1 /* For Calpella anyway... */</div><div class='ctx'> </div><div class='hunk'>@@ -182,8 +183,6 @@ static void intel_dsm_platform_mux_info(void)</div><div class='ctx'> 			DRM_DEBUG_DRIVER("  hpd mux info: %s\n",</div><div class='ctx'> 			       intel_dsm_mux_type(info-&gt;buffer.pointer[3]));</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		DRM_ERROR("MUX INFO call failed\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c<br/>index b48fc2a8410c..353459362f6f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_bios.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_bios.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_bios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_bios.c</a></div><div class='hunk'>@@ -174,6 +174,28 @@ get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,</div><div class='ctx'> 	return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* get lvds_fp_timing entry</div><div class='add'>+ * this function may return NULL if the corresponding entry is invalid</div><div class='add'>+ */</div><div class='add'>+static const struct lvds_fp_timing *</div><div class='add'>+get_lvds_fp_timing(const struct bdb_header *bdb,</div><div class='add'>+		   const struct bdb_lvds_lfp_data *data,</div><div class='add'>+		   const struct bdb_lvds_lfp_data_ptrs *ptrs,</div><div class='add'>+		   int index)</div><div class='add'>+{</div><div class='add'>+	size_t data_ofs = (const u8 *)data - (const u8 *)bdb;</div><div class='add'>+	u16 data_size = ((const u16 *)data)[-1]; /* stored in header */</div><div class='add'>+	size_t ofs;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= ARRAY_SIZE(ptrs-&gt;ptr))</div><div class='add'>+		return NULL;</div><div class='add'>+	ofs = ptrs-&gt;ptr[index].fp_timing_offset;</div><div class='add'>+	if (ofs &lt; data_ofs ||</div><div class='add'>+	    ofs + sizeof(struct lvds_fp_timing) &gt; data_ofs + data_size)</div><div class='add'>+		return NULL;</div><div class='add'>+	return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Try to find integrated panel data */</div><div class='ctx'> static void</div><div class='ctx'> parse_lfp_panel_data(struct drm_i915_private *dev_priv,</div><div class='hunk'>@@ -183,6 +205,7 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	const struct bdb_lvds_lfp_data *lvds_lfp_data;</div><div class='ctx'> 	const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;</div><div class='ctx'> 	const struct lvds_dvo_timing *panel_dvo_timing;</div><div class='add'>+	const struct lvds_fp_timing *fp_timing;</div><div class='ctx'> 	struct drm_display_mode *panel_fixed_mode;</div><div class='ctx'> 	int i, downclock;</div><div class='ctx'> </div><div class='hunk'>@@ -244,6 +267,19 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,</div><div class='ctx'> 			      "Normal Clock %dKHz, downclock %dKHz\n",</div><div class='ctx'> 			      panel_fixed_mode-&gt;clock, 10*downclock);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,</div><div class='add'>+				       lvds_lfp_data_ptrs,</div><div class='add'>+				       lvds_options-&gt;panel_type);</div><div class='add'>+	if (fp_timing) {</div><div class='add'>+		/* check the resolution, just to be sure */</div><div class='add'>+		if (fp_timing-&gt;x_res == panel_fixed_mode-&gt;hdisplay &amp;&amp;</div><div class='add'>+		    fp_timing-&gt;y_res == panel_fixed_mode-&gt;vdisplay) {</div><div class='add'>+			dev_priv-&gt;bios_lvds_val = fp_timing-&gt;lvds_reg_val;</div><div class='add'>+			DRM_DEBUG_KMS("VBT initial LVDS value %x\n",</div><div class='add'>+				      dev_priv-&gt;bios_lvds_val);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Try to find sdvo panel data */</div><div class='hunk'>@@ -256,6 +292,11 @@ parse_sdvo_panel_data(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	int index;</div><div class='ctx'> </div><div class='ctx'> 	index = i915_vbt_sdvo_panel_type;</div><div class='add'>+	if (index == -2) {</div><div class='add'>+		DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (index == -1) {</div><div class='ctx'> 		struct bdb_sdvo_lvds_options *sdvo_lvds_options;</div><div class='ctx'> </div><div class='hunk'>@@ -332,11 +373,11 @@ parse_general_definitions(struct drm_i915_private *dev_priv,</div><div class='ctx'> 		if (block_size &gt;= sizeof(*general)) {</div><div class='ctx'> 			int bus_pin = general-&gt;crt_ddc_gmbus_pin;</div><div class='ctx'> 			DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);</div><div class='del'>-			if (bus_pin &gt;= 1 &amp;&amp; bus_pin &lt;= 6)</div><div class='add'>+			if (intel_gmbus_is_port_valid(bus_pin))</div><div class='ctx'> 				dev_priv-&gt;crt_ddc_pin = bus_pin;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",</div><div class='del'>-				  block_size);</div><div class='add'>+				      block_size);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c<br/>index 90b9793fd5da..75a70c46ef1b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_crt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_crt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_crt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_crt.c</a></div><div class='hunk'>@@ -55,18 +55,36 @@ static struct intel_crt *intel_attached_crt(struct drm_connector *connector)</div><div class='ctx'> 			    struct intel_crt, base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_crt_dpms(struct drm_encoder *encoder, int mode)</div><div class='add'>+static void pch_crt_dpms(struct drm_encoder *encoder, int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 temp, reg;</div><div class='add'>+	u32 temp;</div><div class='ctx'> </div><div class='del'>-	if (HAS_PCH_SPLIT(dev))</div><div class='del'>-		reg = PCH_ADPA;</div><div class='del'>-	else</div><div class='del'>-		reg = ADPA;</div><div class='add'>+	temp = I915_READ(PCH_ADPA);</div><div class='add'>+	temp &amp;= ~ADPA_DAC_ENABLE;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case DRM_MODE_DPMS_ON:</div><div class='add'>+		temp |= ADPA_DAC_ENABLE;</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_DPMS_STANDBY:</div><div class='add'>+	case DRM_MODE_DPMS_SUSPEND:</div><div class='add'>+	case DRM_MODE_DPMS_OFF:</div><div class='add'>+		/* Just leave port enable cleared */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	I915_WRITE(PCH_ADPA, temp);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	temp = I915_READ(reg);</div><div class='add'>+static void gmch_crt_dpms(struct drm_encoder *encoder, int mode)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = encoder-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 temp;</div><div class='add'>+</div><div class='add'>+	temp = I915_READ(ADPA);</div><div class='ctx'> 	temp &amp;= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);</div><div class='ctx'> 	temp &amp;= ~ADPA_DAC_ENABLE;</div><div class='ctx'> </div><div class='hunk'>@@ -85,7 +103,7 @@ static void intel_crt_dpms(struct drm_encoder *encoder, int mode)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	I915_WRITE(reg, temp);</div><div class='add'>+	I915_WRITE(ADPA, temp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int intel_crt_mode_valid(struct drm_connector *connector,</div><div class='hunk'>@@ -278,9 +296,10 @@ static bool intel_crt_detect_ddc(struct drm_connector *connector)</div><div class='ctx'> 	if (intel_ddc_probe(&amp;crt-&gt;base, dev_priv-&gt;crt_ddc_pin)) {</div><div class='ctx'> 		struct edid *edid;</div><div class='ctx'> 		bool is_digital = false;</div><div class='add'>+		struct i2c_adapter *i2c;</div><div class='ctx'> </div><div class='del'>-		edid = drm_get_edid(connector,</div><div class='del'>-			&amp;dev_priv-&gt;gmbus[dev_priv-&gt;crt_ddc_pin].adapter);</div><div class='add'>+		i2c = intel_gmbus_get_adapter(dev_priv, dev_priv-&gt;crt_ddc_pin);</div><div class='add'>+		edid = drm_get_edid(connector, i2c);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * This may be a DVI-I connector with a shared DDC</div><div class='ctx'> 		 * link between analog and digital outputs, so we</div><div class='hunk'>@@ -476,15 +495,16 @@ static int intel_crt_get_modes(struct drm_connector *connector)</div><div class='ctx'> 	struct drm_device *dev = connector-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	int ret;</div><div class='add'>+	struct i2c_adapter *i2c;</div><div class='ctx'> </div><div class='del'>-	ret = intel_ddc_get_modes(connector,</div><div class='del'>-				 &amp;dev_priv-&gt;gmbus[dev_priv-&gt;crt_ddc_pin].adapter);</div><div class='add'>+	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv-&gt;crt_ddc_pin);</div><div class='add'>+	ret = intel_ddc_get_modes(connector, i2c);</div><div class='ctx'> 	if (ret || !IS_G4X(dev))</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Try to probe digital port for output in DVI-I -&gt; VGA mode. */</div><div class='del'>-	return intel_ddc_get_modes(connector,</div><div class='del'>-				   &amp;dev_priv-&gt;gmbus[GMBUS_PORT_DPB].adapter);</div><div class='add'>+	i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);</div><div class='add'>+	return intel_ddc_get_modes(connector, i2c);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int intel_crt_set_property(struct drm_connector *connector,</div><div class='hunk'>@@ -507,12 +527,20 @@ static void intel_crt_reset(struct drm_connector *connector)</div><div class='ctx'>  * Routines for controlling stuff on the analog port</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {</div><div class='del'>-	.dpms = intel_crt_dpms,</div><div class='add'>+static const struct drm_encoder_helper_funcs pch_encoder_funcs = {</div><div class='ctx'> 	.mode_fixup = intel_crt_mode_fixup,</div><div class='ctx'> 	.prepare = intel_encoder_prepare,</div><div class='ctx'> 	.commit = intel_encoder_commit,</div><div class='ctx'> 	.mode_set = intel_crt_mode_set,</div><div class='add'>+	.dpms = pch_crt_dpms,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct drm_encoder_helper_funcs gmch_encoder_funcs = {</div><div class='add'>+	.mode_fixup = intel_crt_mode_fixup,</div><div class='add'>+	.prepare = intel_encoder_prepare,</div><div class='add'>+	.commit = intel_encoder_commit,</div><div class='add'>+	.mode_set = intel_crt_mode_set,</div><div class='add'>+	.dpms = gmch_crt_dpms,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct drm_connector_funcs intel_crt_connector_funcs = {</div><div class='hunk'>@@ -536,7 +564,7 @@ static const struct drm_encoder_funcs intel_crt_enc_funcs = {</div><div class='ctx'> </div><div class='ctx'> static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)</div><div class='ctx'> {</div><div class='del'>-	DRM_DEBUG_KMS("Skipping CRT initialization for %s\n", id-&gt;ident);</div><div class='add'>+	DRM_INFO("Skipping CRT initialization for %s\n", id-&gt;ident);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -558,6 +586,7 @@ void intel_crt_init(struct drm_device *dev)</div><div class='ctx'> 	struct intel_crt *crt;</div><div class='ctx'> 	struct intel_connector *intel_connector;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	const struct drm_encoder_helper_funcs *encoder_helper_funcs;</div><div class='ctx'> </div><div class='ctx'> 	/* Skip machines without VGA that falsely report hotplug events */</div><div class='ctx'> 	if (dmi_check_system(intel_no_crt))</div><div class='hunk'>@@ -586,14 +615,23 @@ void intel_crt_init(struct drm_device *dev)</div><div class='ctx'> 	crt-&gt;base.clone_mask = (1 &lt;&lt; INTEL_SDVO_NON_TV_CLONE_BIT |</div><div class='ctx'> 				1 &lt;&lt; INTEL_ANALOG_CLONE_BIT |</div><div class='ctx'> 				1 &lt;&lt; INTEL_SDVO_LVDS_CLONE_BIT);</div><div class='del'>-	crt-&gt;base.crtc_mask = (1 &lt;&lt; 0) | (1 &lt;&lt; 1);</div><div class='add'>+	if (IS_HASWELL(dev))</div><div class='add'>+		crt-&gt;base.crtc_mask = (1 &lt;&lt; 0);</div><div class='add'>+	else</div><div class='add'>+		crt-&gt;base.crtc_mask = (1 &lt;&lt; 0) | (1 &lt;&lt; 1);</div><div class='add'>+</div><div class='ctx'> 	if (IS_GEN2(dev))</div><div class='ctx'> 		connector-&gt;interlace_allowed = 0;</div><div class='ctx'> 	else</div><div class='ctx'> 		connector-&gt;interlace_allowed = 1;</div><div class='ctx'> 	connector-&gt;doublescan_allowed = 0;</div><div class='ctx'> </div><div class='del'>-	drm_encoder_helper_add(&amp;crt-&gt;base.base, &amp;intel_crt_helper_funcs);</div><div class='add'>+	if (HAS_PCH_SPLIT(dev))</div><div class='add'>+		encoder_helper_funcs = &amp;pch_encoder_funcs;</div><div class='add'>+	else</div><div class='add'>+		encoder_helper_funcs = &amp;gmch_encoder_funcs;</div><div class='add'>+</div><div class='add'>+	drm_encoder_helper_add(&amp;crt-&gt;base.base, encoder_helper_funcs);</div><div class='ctx'> 	drm_connector_helper_add(connector, &amp;intel_crt_connector_helper_funcs);</div><div class='ctx'> </div><div class='ctx'> 	drm_sysfs_connector_add(connector);</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c<br/>new file mode 100644<br/>index 000000000000..46d1e886c692<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_ddi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_ddi.c</a></div><div class='hunk'>@@ -0,0 +1,755 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright © 2012 Intel Corporation</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the next</div><div class='add'>+ * paragraph) shall be included in all copies or substantial portions of the</div><div class='add'>+ * Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER</div><div class='add'>+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS</div><div class='add'>+ * IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors:</div><div class='add'>+ *    Eugeni Dodonov &lt;eugeni.dodonov@intel.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "i915_drv.h"</div><div class='add'>+#include "intel_drv.h"</div><div class='add'>+</div><div class='add'>+/* HDMI/DVI modes ignore everything but the last 2 items. So we share</div><div class='add'>+ * them for both DP and FDI transports, allowing those ports to</div><div class='add'>+ * automatically adapt to HDMI connections as well</div><div class='add'>+ */</div><div class='add'>+static const u32 hsw_ddi_translations_dp[] = {</div><div class='add'>+	0x00FFFFFF, 0x0006000E,		/* DP parameters */</div><div class='add'>+	0x00D75FFF, 0x0005000A,</div><div class='add'>+	0x00C30FFF, 0x00040006,</div><div class='add'>+	0x80AAAFFF, 0x000B0000,</div><div class='add'>+	0x00FFFFFF, 0x0005000A,</div><div class='add'>+	0x00D75FFF, 0x000C0004,</div><div class='add'>+	0x80C30FFF, 0x000B0000,</div><div class='add'>+	0x00FFFFFF, 0x00040006,</div><div class='add'>+	0x80D75FFF, 0x000B0000,</div><div class='add'>+	0x00FFFFFF, 0x00040006		/* HDMI parameters */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 hsw_ddi_translations_fdi[] = {</div><div class='add'>+	0x00FFFFFF, 0x0007000E,		/* FDI parameters */</div><div class='add'>+	0x00D75FFF, 0x000F000A,</div><div class='add'>+	0x00C30FFF, 0x00060006,</div><div class='add'>+	0x00AAAFFF, 0x001E0000,</div><div class='add'>+	0x00FFFFFF, 0x000F000A,</div><div class='add'>+	0x00D75FFF, 0x00160004,</div><div class='add'>+	0x00C30FFF, 0x001E0000,</div><div class='add'>+	0x00FFFFFF, 0x00060006,</div><div class='add'>+	0x00D75FFF, 0x001E0000,</div><div class='add'>+	0x00FFFFFF, 0x00040006		/* HDMI parameters */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* On Haswell, DDI port buffers must be programmed with correct values</div><div class='add'>+ * in advance. The buffer values are different for FDI and DP modes,</div><div class='add'>+ * but the HDMI/DVI fields are shared among those. So we program the DDI</div><div class='add'>+ * in either FDI or DP modes only, as HDMI connections will work with both</div><div class='add'>+ * of those</div><div class='add'>+ */</div><div class='add'>+void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port, bool use_fdi_mode)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 reg;</div><div class='add'>+	int i;</div><div class='add'>+	const u32 *ddi_translations = ((use_fdi_mode) ?</div><div class='add'>+		hsw_ddi_translations_fdi :</div><div class='add'>+		hsw_ddi_translations_dp);</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_DRIVER("Initializing DDI buffers for port %c in %s mode\n",</div><div class='add'>+			port_name(port),</div><div class='add'>+			use_fdi_mode ? "FDI" : "DP");</div><div class='add'>+</div><div class='add'>+	WARN((use_fdi_mode &amp;&amp; (port != PORT_E)),</div><div class='add'>+		"Programming port %c in FDI mode, this probably will not work.\n",</div><div class='add'>+		port_name(port));</div><div class='add'>+</div><div class='add'>+	for (i=0, reg=DDI_BUF_TRANS(port); i &lt; ARRAY_SIZE(hsw_ddi_translations_fdi); i++) {</div><div class='add'>+		I915_WRITE(reg, ddi_translations[i]);</div><div class='add'>+		reg += 4;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Program DDI buffers translations for DP. By default, program ports A-D in DP</div><div class='add'>+ * mode and port E for FDI.</div><div class='add'>+ */</div><div class='add'>+void intel_prepare_ddi(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	int port;</div><div class='add'>+</div><div class='add'>+	if (IS_HASWELL(dev)) {</div><div class='add'>+		for (port = PORT_A; port &lt; PORT_E; port++)</div><div class='add'>+			intel_prepare_ddi_buffers(dev, port, false);</div><div class='add'>+</div><div class='add'>+		/* DDI E is the suggested one to work in FDI mode, so program is as such by</div><div class='add'>+		 * default. It will have to be re-programmed in case a digital DP output</div><div class='add'>+		 * will be detected on it</div><div class='add'>+		 */</div><div class='add'>+		intel_prepare_ddi_buffers(dev, PORT_E, true);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const long hsw_ddi_buf_ctl_values[] = {</div><div class='add'>+	DDI_BUF_EMP_400MV_0DB_HSW,</div><div class='add'>+	DDI_BUF_EMP_400MV_3_5DB_HSW,</div><div class='add'>+	DDI_BUF_EMP_400MV_6DB_HSW,</div><div class='add'>+	DDI_BUF_EMP_400MV_9_5DB_HSW,</div><div class='add'>+	DDI_BUF_EMP_600MV_0DB_HSW,</div><div class='add'>+	DDI_BUF_EMP_600MV_3_5DB_HSW,</div><div class='add'>+	DDI_BUF_EMP_600MV_6DB_HSW,</div><div class='add'>+	DDI_BUF_EMP_800MV_0DB_HSW,</div><div class='add'>+	DDI_BUF_EMP_800MV_3_5DB_HSW</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Starting with Haswell, different DDI ports can work in FDI mode for</div><div class='add'>+ * connection to the PCH-located connectors. For this, it is necessary to train</div><div class='add'>+ * both the DDI port and PCH receiver for the desired DDI buffer settings.</div><div class='add'>+ *</div><div class='add'>+ * The recommended port to work in FDI mode is DDI E, which we use here. Also,</div><div class='add'>+ * please note that when FDI mode is active on DDI E, it shares 2 lines with</div><div class='add'>+ * DDI A (which is used for eDP)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+void hsw_fdi_link_train(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	int pipe = intel_crtc-&gt;pipe;</div><div class='add'>+	u32 reg, temp, i;</div><div class='add'>+</div><div class='add'>+	/* Configure CPU PLL, wait for warmup */</div><div class='add'>+	I915_WRITE(SPLL_CTL,</div><div class='add'>+			SPLL_PLL_ENABLE |</div><div class='add'>+			SPLL_PLL_FREQ_1350MHz |</div><div class='add'>+			SPLL_PLL_SCC);</div><div class='add'>+</div><div class='add'>+	/* Use SPLL to drive the output when in FDI mode */</div><div class='add'>+	I915_WRITE(PORT_CLK_SEL(PORT_E),</div><div class='add'>+			PORT_CLK_SEL_SPLL);</div><div class='add'>+	I915_WRITE(PIPE_CLK_SEL(pipe),</div><div class='add'>+			PIPE_CLK_SEL_PORT(PORT_E));</div><div class='add'>+</div><div class='add'>+	udelay(20);</div><div class='add'>+</div><div class='add'>+	/* Start the training iterating through available voltages and emphasis */</div><div class='add'>+	for (i=0; i &lt; ARRAY_SIZE(hsw_ddi_buf_ctl_values); i++) {</div><div class='add'>+		/* Configure DP_TP_CTL with auto-training */</div><div class='add'>+		I915_WRITE(DP_TP_CTL(PORT_E),</div><div class='add'>+					DP_TP_CTL_FDI_AUTOTRAIN |</div><div class='add'>+					DP_TP_CTL_ENHANCED_FRAME_ENABLE |</div><div class='add'>+					DP_TP_CTL_LINK_TRAIN_PAT1 |</div><div class='add'>+					DP_TP_CTL_ENABLE);</div><div class='add'>+</div><div class='add'>+		/* Configure and enable DDI_BUF_CTL for DDI E with next voltage */</div><div class='add'>+		temp = I915_READ(DDI_BUF_CTL(PORT_E));</div><div class='add'>+		temp = (temp &amp; ~DDI_BUF_EMP_MASK);</div><div class='add'>+		I915_WRITE(DDI_BUF_CTL(PORT_E),</div><div class='add'>+				temp |</div><div class='add'>+				DDI_BUF_CTL_ENABLE |</div><div class='add'>+				DDI_PORT_WIDTH_X2 |</div><div class='add'>+				hsw_ddi_buf_ctl_values[i]);</div><div class='add'>+</div><div class='add'>+		udelay(600);</div><div class='add'>+</div><div class='add'>+		/* Enable CPU FDI Receiver with auto-training */</div><div class='add'>+		reg = FDI_RX_CTL(pipe);</div><div class='add'>+		I915_WRITE(reg,</div><div class='add'>+				I915_READ(reg) |</div><div class='add'>+					FDI_LINK_TRAIN_AUTO |</div><div class='add'>+					FDI_RX_ENABLE |</div><div class='add'>+					FDI_LINK_TRAIN_PATTERN_1_CPT |</div><div class='add'>+					FDI_RX_ENHANCE_FRAME_ENABLE |</div><div class='add'>+					FDI_PORT_WIDTH_2X_LPT |</div><div class='add'>+					FDI_RX_PLL_ENABLE);</div><div class='add'>+		POSTING_READ(reg);</div><div class='add'>+		udelay(100);</div><div class='add'>+</div><div class='add'>+		temp = I915_READ(DP_TP_STATUS(PORT_E));</div><div class='add'>+		if (temp &amp; DP_TP_STATUS_AUTOTRAIN_DONE) {</div><div class='add'>+			DRM_DEBUG_DRIVER("BUF_CTL training done on %d step\n", i);</div><div class='add'>+</div><div class='add'>+			/* Enable normal pixel sending for FDI */</div><div class='add'>+			I915_WRITE(DP_TP_CTL(PORT_E),</div><div class='add'>+						DP_TP_CTL_FDI_AUTOTRAIN |</div><div class='add'>+						DP_TP_CTL_LINK_TRAIN_NORMAL |</div><div class='add'>+						DP_TP_CTL_ENHANCED_FRAME_ENABLE |</div><div class='add'>+						DP_TP_CTL_ENABLE);</div><div class='add'>+</div><div class='add'>+			/* Enable PIPE_DDI_FUNC_CTL for the pipe to work in FDI mode */</div><div class='add'>+			temp = I915_READ(DDI_FUNC_CTL(pipe));</div><div class='add'>+			temp &amp;= ~PIPE_DDI_PORT_MASK;</div><div class='add'>+			temp |= PIPE_DDI_SELECT_PORT(PORT_E) |</div><div class='add'>+					PIPE_DDI_MODE_SELECT_FDI |</div><div class='add'>+					PIPE_DDI_FUNC_ENABLE |</div><div class='add'>+					PIPE_DDI_PORT_WIDTH_X2;</div><div class='add'>+			I915_WRITE(DDI_FUNC_CTL(pipe),</div><div class='add'>+					temp);</div><div class='add'>+			break;</div><div class='add'>+		} else {</div><div class='add'>+			DRM_ERROR("Error training BUF_CTL %d\n", i);</div><div class='add'>+</div><div class='add'>+			/* Disable DP_TP_CTL and FDI_RX_CTL) and retry */</div><div class='add'>+			I915_WRITE(DP_TP_CTL(PORT_E),</div><div class='add'>+					I915_READ(DP_TP_CTL(PORT_E)) &amp;</div><div class='add'>+						~DP_TP_CTL_ENABLE);</div><div class='add'>+			I915_WRITE(FDI_RX_CTL(pipe),</div><div class='add'>+					I915_READ(FDI_RX_CTL(pipe)) &amp;</div><div class='add'>+						~FDI_RX_PLL_ENABLE);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("FDI train done.\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* For DDI connections, it is possible to support different outputs over the</div><div class='add'>+ * same DDI port, such as HDMI or DP or even VGA via FDI. So we don't know by</div><div class='add'>+ * the time the output is detected what exactly is on the other end of it. This</div><div class='add'>+ * function aims at providing support for this detection and proper output</div><div class='add'>+ * configuration.</div><div class='add'>+ */</div><div class='add'>+void intel_ddi_init(struct drm_device *dev, enum port port)</div><div class='add'>+{</div><div class='add'>+	/* For now, we don't do any proper output detection and assume that we</div><div class='add'>+	 * handle HDMI only */</div><div class='add'>+</div><div class='add'>+	switch(port){</div><div class='add'>+	case PORT_A:</div><div class='add'>+		/* We don't handle eDP and DP yet */</div><div class='add'>+		DRM_DEBUG_DRIVER("Found digital output on DDI port A\n");</div><div class='add'>+		break;</div><div class='add'>+	/* Assume that the  ports B, C and D are working in HDMI mode for now */</div><div class='add'>+	case PORT_B:</div><div class='add'>+	case PORT_C:</div><div class='add'>+	case PORT_D:</div><div class='add'>+		intel_hdmi_init(dev, DDI_BUF_CTL(port));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		DRM_DEBUG_DRIVER("No handlers defined for port %d, skipping DDI initialization\n",</div><div class='add'>+				port);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* WRPLL clock dividers */</div><div class='add'>+struct wrpll_tmds_clock {</div><div class='add'>+	u32 clock;</div><div class='add'>+	u16 p;		/* Post divider */</div><div class='add'>+	u16 n2;		/* Feedback divider */</div><div class='add'>+	u16 r2;		/* Reference divider */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Table of matching values for WRPLL clocks programming for each frequency */</div><div class='add'>+static const struct wrpll_tmds_clock wrpll_tmds_clock_table[] = {</div><div class='add'>+	{19750,	38,	25,	18},</div><div class='add'>+	{20000,	48,	32,	18},</div><div class='add'>+	{21000,	36,	21,	15},</div><div class='add'>+	{21912,	42,	29,	17},</div><div class='add'>+	{22000,	36,	22,	15},</div><div class='add'>+	{23000,	36,	23,	15},</div><div class='add'>+	{23500,	40,	40,	23},</div><div class='add'>+	{23750,	26,	16,	14},</div><div class='add'>+	{23750,	26,	16,	14},</div><div class='add'>+	{24000,	36,	24,	15},</div><div class='add'>+	{25000,	36,	25,	15},</div><div class='add'>+	{25175,	26,	40,	33},</div><div class='add'>+	{25200,	30,	21,	15},</div><div class='add'>+	{26000,	36,	26,	15},</div><div class='add'>+	{27000,	30,	21,	14},</div><div class='add'>+	{27027,	18,	100,	111},</div><div class='add'>+	{27500,	30,	29,	19},</div><div class='add'>+	{28000,	34,	30,	17},</div><div class='add'>+	{28320,	26,	30,	22},</div><div class='add'>+	{28322,	32,	42,	25},</div><div class='add'>+	{28750,	24,	23,	18},</div><div class='add'>+	{29000,	30,	29,	18},</div><div class='add'>+	{29750,	32,	30,	17},</div><div class='add'>+	{30000,	30,	25,	15},</div><div class='add'>+	{30750,	30,	41,	24},</div><div class='add'>+	{31000,	30,	31,	18},</div><div class='add'>+	{31500,	30,	28,	16},</div><div class='add'>+	{32000,	30,	32,	18},</div><div class='add'>+	{32500,	28,	32,	19},</div><div class='add'>+	{33000,	24,	22,	15},</div><div class='add'>+	{34000,	28,	30,	17},</div><div class='add'>+	{35000,	26,	32,	19},</div><div class='add'>+	{35500,	24,	30,	19},</div><div class='add'>+	{36000,	26,	26,	15},</div><div class='add'>+	{36750,	26,	46,	26},</div><div class='add'>+	{37000,	24,	23,	14},</div><div class='add'>+	{37762,	22,	40,	26},</div><div class='add'>+	{37800,	20,	21,	15},</div><div class='add'>+	{38000,	24,	27,	16},</div><div class='add'>+	{38250,	24,	34,	20},</div><div class='add'>+	{39000,	24,	26,	15},</div><div class='add'>+	{40000,	24,	32,	18},</div><div class='add'>+	{40500,	20,	21,	14},</div><div class='add'>+	{40541,	22,	147,	89},</div><div class='add'>+	{40750,	18,	19,	14},</div><div class='add'>+	{41000,	16,	17,	14},</div><div class='add'>+	{41500,	22,	44,	26},</div><div class='add'>+	{41540,	22,	44,	26},</div><div class='add'>+	{42000,	18,	21,	15},</div><div class='add'>+	{42500,	22,	45,	26},</div><div class='add'>+	{43000,	20,	43,	27},</div><div class='add'>+	{43163,	20,	24,	15},</div><div class='add'>+	{44000,	18,	22,	15},</div><div class='add'>+	{44900,	20,	108,	65},</div><div class='add'>+	{45000,	20,	25,	15},</div><div class='add'>+	{45250,	20,	52,	31},</div><div class='add'>+	{46000,	18,	23,	15},</div><div class='add'>+	{46750,	20,	45,	26},</div><div class='add'>+	{47000,	20,	40,	23},</div><div class='add'>+	{48000,	18,	24,	15},</div><div class='add'>+	{49000,	18,	49,	30},</div><div class='add'>+	{49500,	16,	22,	15},</div><div class='add'>+	{50000,	18,	25,	15},</div><div class='add'>+	{50500,	18,	32,	19},</div><div class='add'>+	{51000,	18,	34,	20},</div><div class='add'>+	{52000,	18,	26,	15},</div><div class='add'>+	{52406,	14,	34,	25},</div><div class='add'>+	{53000,	16,	22,	14},</div><div class='add'>+	{54000,	16,	24,	15},</div><div class='add'>+	{54054,	16,	173,	108},</div><div class='add'>+	{54500,	14,	24,	17},</div><div class='add'>+	{55000,	12,	22,	18},</div><div class='add'>+	{56000,	14,	45,	31},</div><div class='add'>+	{56250,	16,	25,	15},</div><div class='add'>+	{56750,	14,	25,	17},</div><div class='add'>+	{57000,	16,	27,	16},</div><div class='add'>+	{58000,	16,	43,	25},</div><div class='add'>+	{58250,	16,	38,	22},</div><div class='add'>+	{58750,	16,	40,	23},</div><div class='add'>+	{59000,	14,	26,	17},</div><div class='add'>+	{59341,	14,	40,	26},</div><div class='add'>+	{59400,	16,	44,	25},</div><div class='add'>+	{60000,	16,	32,	18},</div><div class='add'>+	{60500,	12,	39,	29},</div><div class='add'>+	{61000,	14,	49,	31},</div><div class='add'>+	{62000,	14,	37,	23},</div><div class='add'>+	{62250,	14,	42,	26},</div><div class='add'>+	{63000,	12,	21,	15},</div><div class='add'>+	{63500,	14,	28,	17},</div><div class='add'>+	{64000,	12,	27,	19},</div><div class='add'>+	{65000,	14,	32,	19},</div><div class='add'>+	{65250,	12,	29,	20},</div><div class='add'>+	{65500,	12,	32,	22},</div><div class='add'>+	{66000,	12,	22,	15},</div><div class='add'>+	{66667,	14,	38,	22},</div><div class='add'>+	{66750,	10,	21,	17},</div><div class='add'>+	{67000,	14,	33,	19},</div><div class='add'>+	{67750,	14,	58,	33},</div><div class='add'>+	{68000,	14,	30,	17},</div><div class='add'>+	{68179,	14,	46,	26},</div><div class='add'>+	{68250,	14,	46,	26},</div><div class='add'>+	{69000,	12,	23,	15},</div><div class='add'>+	{70000,	12,	28,	18},</div><div class='add'>+	{71000,	12,	30,	19},</div><div class='add'>+	{72000,	12,	24,	15},</div><div class='add'>+	{73000,	10,	23,	17},</div><div class='add'>+	{74000,	12,	23,	14},</div><div class='add'>+	{74176,	8,	100,	91},</div><div class='add'>+	{74250,	10,	22,	16},</div><div class='add'>+	{74481,	12,	43,	26},</div><div class='add'>+	{74500,	10,	29,	21},</div><div class='add'>+	{75000,	12,	25,	15},</div><div class='add'>+	{75250,	10,	39,	28},</div><div class='add'>+	{76000,	12,	27,	16},</div><div class='add'>+	{77000,	12,	53,	31},</div><div class='add'>+	{78000,	12,	26,	15},</div><div class='add'>+	{78750,	12,	28,	16},</div><div class='add'>+	{79000,	10,	38,	26},</div><div class='add'>+	{79500,	10,	28,	19},</div><div class='add'>+	{80000,	12,	32,	18},</div><div class='add'>+	{81000,	10,	21,	14},</div><div class='add'>+	{81081,	6,	100,	111},</div><div class='add'>+	{81624,	8,	29,	24},</div><div class='add'>+	{82000,	8,	17,	14},</div><div class='add'>+	{83000,	10,	40,	26},</div><div class='add'>+	{83950,	10,	28,	18},</div><div class='add'>+	{84000,	10,	28,	18},</div><div class='add'>+	{84750,	6,	16,	17},</div><div class='add'>+	{85000,	6,	17,	18},</div><div class='add'>+	{85250,	10,	30,	19},</div><div class='add'>+	{85750,	10,	27,	17},</div><div class='add'>+	{86000,	10,	43,	27},</div><div class='add'>+	{87000,	10,	29,	18},</div><div class='add'>+	{88000,	10,	44,	27},</div><div class='add'>+	{88500,	10,	41,	25},</div><div class='add'>+	{89000,	10,	28,	17},</div><div class='add'>+	{89012,	6,	90,	91},</div><div class='add'>+	{89100,	10,	33,	20},</div><div class='add'>+	{90000,	10,	25,	15},</div><div class='add'>+	{91000,	10,	32,	19},</div><div class='add'>+	{92000,	10,	46,	27},</div><div class='add'>+	{93000,	10,	31,	18},</div><div class='add'>+	{94000,	10,	40,	23},</div><div class='add'>+	{94500,	10,	28,	16},</div><div class='add'>+	{95000,	10,	44,	25},</div><div class='add'>+	{95654,	10,	39,	22},</div><div class='add'>+	{95750,	10,	39,	22},</div><div class='add'>+	{96000,	10,	32,	18},</div><div class='add'>+	{97000,	8,	23,	16},</div><div class='add'>+	{97750,	8,	42,	29},</div><div class='add'>+	{98000,	8,	45,	31},</div><div class='add'>+	{99000,	8,	22,	15},</div><div class='add'>+	{99750,	8,	34,	23},</div><div class='add'>+	{100000,	6,	20,	18},</div><div class='add'>+	{100500,	6,	19,	17},</div><div class='add'>+	{101000,	6,	37,	33},</div><div class='add'>+	{101250,	8,	21,	14},</div><div class='add'>+	{102000,	6,	17,	15},</div><div class='add'>+	{102250,	6,	25,	22},</div><div class='add'>+	{103000,	8,	29,	19},</div><div class='add'>+	{104000,	8,	37,	24},</div><div class='add'>+	{105000,	8,	28,	18},</div><div class='add'>+	{106000,	8,	22,	14},</div><div class='add'>+	{107000,	8,	46,	29},</div><div class='add'>+	{107214,	8,	27,	17},</div><div class='add'>+	{108000,	8,	24,	15},</div><div class='add'>+	{108108,	8,	173,	108},</div><div class='add'>+	{109000,	6,	23,	19},</div><div class='add'>+	{109000,	6,	23,	19},</div><div class='add'>+	{110000,	6,	22,	18},</div><div class='add'>+	{110013,	6,	22,	18},</div><div class='add'>+	{110250,	8,	49,	30},</div><div class='add'>+	{110500,	8,	36,	22},</div><div class='add'>+	{111000,	8,	23,	14},</div><div class='add'>+	{111264,	8,	150,	91},</div><div class='add'>+	{111375,	8,	33,	20},</div><div class='add'>+	{112000,	8,	63,	38},</div><div class='add'>+	{112500,	8,	25,	15},</div><div class='add'>+	{113100,	8,	57,	34},</div><div class='add'>+	{113309,	8,	42,	25},</div><div class='add'>+	{114000,	8,	27,	16},</div><div class='add'>+	{115000,	6,	23,	18},</div><div class='add'>+	{116000,	8,	43,	25},</div><div class='add'>+	{117000,	8,	26,	15},</div><div class='add'>+	{117500,	8,	40,	23},</div><div class='add'>+	{118000,	6,	38,	29},</div><div class='add'>+	{119000,	8,	30,	17},</div><div class='add'>+	{119500,	8,	46,	26},</div><div class='add'>+	{119651,	8,	39,	22},</div><div class='add'>+	{120000,	8,	32,	18},</div><div class='add'>+	{121000,	6,	39,	29},</div><div class='add'>+	{121250,	6,	31,	23},</div><div class='add'>+	{121750,	6,	23,	17},</div><div class='add'>+	{122000,	6,	42,	31},</div><div class='add'>+	{122614,	6,	30,	22},</div><div class='add'>+	{123000,	6,	41,	30},</div><div class='add'>+	{123379,	6,	37,	27},</div><div class='add'>+	{124000,	6,	51,	37},</div><div class='add'>+	{125000,	6,	25,	18},</div><div class='add'>+	{125250,	4,	13,	14},</div><div class='add'>+	{125750,	4,	27,	29},</div><div class='add'>+	{126000,	6,	21,	15},</div><div class='add'>+	{127000,	6,	24,	17},</div><div class='add'>+	{127250,	6,	41,	29},</div><div class='add'>+	{128000,	6,	27,	19},</div><div class='add'>+	{129000,	6,	43,	30},</div><div class='add'>+	{129859,	4,	25,	26},</div><div class='add'>+	{130000,	6,	26,	18},</div><div class='add'>+	{130250,	6,	42,	29},</div><div class='add'>+	{131000,	6,	32,	22},</div><div class='add'>+	{131500,	6,	38,	26},</div><div class='add'>+	{131850,	6,	41,	28},</div><div class='add'>+	{132000,	6,	22,	15},</div><div class='add'>+	{132750,	6,	28,	19},</div><div class='add'>+	{133000,	6,	34,	23},</div><div class='add'>+	{133330,	6,	37,	25},</div><div class='add'>+	{134000,	6,	61,	41},</div><div class='add'>+	{135000,	6,	21,	14},</div><div class='add'>+	{135250,	6,	167,	111},</div><div class='add'>+	{136000,	6,	62,	41},</div><div class='add'>+	{137000,	6,	35,	23},</div><div class='add'>+	{138000,	6,	23,	15},</div><div class='add'>+	{138500,	6,	40,	26},</div><div class='add'>+	{138750,	6,	37,	24},</div><div class='add'>+	{139000,	6,	34,	22},</div><div class='add'>+	{139050,	6,	34,	22},</div><div class='add'>+	{139054,	6,	34,	22},</div><div class='add'>+	{140000,	6,	28,	18},</div><div class='add'>+	{141000,	6,	36,	23},</div><div class='add'>+	{141500,	6,	22,	14},</div><div class='add'>+	{142000,	6,	30,	19},</div><div class='add'>+	{143000,	6,	27,	17},</div><div class='add'>+	{143472,	4,	17,	16},</div><div class='add'>+	{144000,	6,	24,	15},</div><div class='add'>+	{145000,	6,	29,	18},</div><div class='add'>+	{146000,	6,	47,	29},</div><div class='add'>+	{146250,	6,	26,	16},</div><div class='add'>+	{147000,	6,	49,	30},</div><div class='add'>+	{147891,	6,	23,	14},</div><div class='add'>+	{148000,	6,	23,	14},</div><div class='add'>+	{148250,	6,	28,	17},</div><div class='add'>+	{148352,	4,	100,	91},</div><div class='add'>+	{148500,	6,	33,	20},</div><div class='add'>+	{149000,	6,	48,	29},</div><div class='add'>+	{150000,	6,	25,	15},</div><div class='add'>+	{151000,	4,	19,	17},</div><div class='add'>+	{152000,	6,	27,	16},</div><div class='add'>+	{152280,	6,	44,	26},</div><div class='add'>+	{153000,	6,	34,	20},</div><div class='add'>+	{154000,	6,	53,	31},</div><div class='add'>+	{155000,	6,	31,	18},</div><div class='add'>+	{155250,	6,	50,	29},</div><div class='add'>+	{155750,	6,	45,	26},</div><div class='add'>+	{156000,	6,	26,	15},</div><div class='add'>+	{157000,	6,	61,	35},</div><div class='add'>+	{157500,	6,	28,	16},</div><div class='add'>+	{158000,	6,	65,	37},</div><div class='add'>+	{158250,	6,	44,	25},</div><div class='add'>+	{159000,	6,	53,	30},</div><div class='add'>+	{159500,	6,	39,	22},</div><div class='add'>+	{160000,	6,	32,	18},</div><div class='add'>+	{161000,	4,	31,	26},</div><div class='add'>+	{162000,	4,	18,	15},</div><div class='add'>+	{162162,	4,	131,	109},</div><div class='add'>+	{162500,	4,	53,	44},</div><div class='add'>+	{163000,	4,	29,	24},</div><div class='add'>+	{164000,	4,	17,	14},</div><div class='add'>+	{165000,	4,	22,	18},</div><div class='add'>+	{166000,	4,	32,	26},</div><div class='add'>+	{167000,	4,	26,	21},</div><div class='add'>+	{168000,	4,	46,	37},</div><div class='add'>+	{169000,	4,	104,	83},</div><div class='add'>+	{169128,	4,	64,	51},</div><div class='add'>+	{169500,	4,	39,	31},</div><div class='add'>+	{170000,	4,	34,	27},</div><div class='add'>+	{171000,	4,	19,	15},</div><div class='add'>+	{172000,	4,	51,	40},</div><div class='add'>+	{172750,	4,	32,	25},</div><div class='add'>+	{172800,	4,	32,	25},</div><div class='add'>+	{173000,	4,	41,	32},</div><div class='add'>+	{174000,	4,	49,	38},</div><div class='add'>+	{174787,	4,	22,	17},</div><div class='add'>+	{175000,	4,	35,	27},</div><div class='add'>+	{176000,	4,	30,	23},</div><div class='add'>+	{177000,	4,	38,	29},</div><div class='add'>+	{178000,	4,	29,	22},</div><div class='add'>+	{178500,	4,	37,	28},</div><div class='add'>+	{179000,	4,	53,	40},</div><div class='add'>+	{179500,	4,	73,	55},</div><div class='add'>+	{180000,	4,	20,	15},</div><div class='add'>+	{181000,	4,	55,	41},</div><div class='add'>+	{182000,	4,	31,	23},</div><div class='add'>+	{183000,	4,	42,	31},</div><div class='add'>+	{184000,	4,	30,	22},</div><div class='add'>+	{184750,	4,	26,	19},</div><div class='add'>+	{185000,	4,	37,	27},</div><div class='add'>+	{186000,	4,	51,	37},</div><div class='add'>+	{187000,	4,	36,	26},</div><div class='add'>+	{188000,	4,	32,	23},</div><div class='add'>+	{189000,	4,	21,	15},</div><div class='add'>+	{190000,	4,	38,	27},</div><div class='add'>+	{190960,	4,	41,	29},</div><div class='add'>+	{191000,	4,	41,	29},</div><div class='add'>+	{192000,	4,	27,	19},</div><div class='add'>+	{192250,	4,	37,	26},</div><div class='add'>+	{193000,	4,	20,	14},</div><div class='add'>+	{193250,	4,	53,	37},</div><div class='add'>+	{194000,	4,	23,	16},</div><div class='add'>+	{194208,	4,	23,	16},</div><div class='add'>+	{195000,	4,	26,	18},</div><div class='add'>+	{196000,	4,	45,	31},</div><div class='add'>+	{197000,	4,	35,	24},</div><div class='add'>+	{197750,	4,	41,	28},</div><div class='add'>+	{198000,	4,	22,	15},</div><div class='add'>+	{198500,	4,	25,	17},</div><div class='add'>+	{199000,	4,	28,	19},</div><div class='add'>+	{200000,	4,	37,	25},</div><div class='add'>+	{201000,	4,	61,	41},</div><div class='add'>+	{202000,	4,	112,	75},</div><div class='add'>+	{202500,	4,	21,	14},</div><div class='add'>+	{203000,	4,	146,	97},</div><div class='add'>+	{204000,	4,	62,	41},</div><div class='add'>+	{204750,	4,	44,	29},</div><div class='add'>+	{205000,	4,	38,	25},</div><div class='add'>+	{206000,	4,	29,	19},</div><div class='add'>+	{207000,	4,	23,	15},</div><div class='add'>+	{207500,	4,	40,	26},</div><div class='add'>+	{208000,	4,	37,	24},</div><div class='add'>+	{208900,	4,	48,	31},</div><div class='add'>+	{209000,	4,	48,	31},</div><div class='add'>+	{209250,	4,	31,	20},</div><div class='add'>+	{210000,	4,	28,	18},</div><div class='add'>+	{211000,	4,	25,	16},</div><div class='add'>+	{212000,	4,	22,	14},</div><div class='add'>+	{213000,	4,	30,	19},</div><div class='add'>+	{213750,	4,	38,	24},</div><div class='add'>+	{214000,	4,	46,	29},</div><div class='add'>+	{214750,	4,	35,	22},</div><div class='add'>+	{215000,	4,	43,	27},</div><div class='add'>+	{216000,	4,	24,	15},</div><div class='add'>+	{217000,	4,	37,	23},</div><div class='add'>+	{218000,	4,	42,	26},</div><div class='add'>+	{218250,	4,	42,	26},</div><div class='add'>+	{218750,	4,	34,	21},</div><div class='add'>+	{219000,	4,	47,	29},</div><div class='add'>+	{219000,	4,	47,	29},</div><div class='add'>+	{220000,	4,	44,	27},</div><div class='add'>+	{220640,	4,	49,	30},</div><div class='add'>+	{220750,	4,	36,	22},</div><div class='add'>+	{221000,	4,	36,	22},</div><div class='add'>+	{222000,	4,	23,	14},</div><div class='add'>+	{222525,	4,	28,	17},</div><div class='add'>+	{222750,	4,	33,	20},</div><div class='add'>+	{227000,	4,	37,	22},</div><div class='add'>+	{230250,	4,	29,	17},</div><div class='add'>+	{233500,	4,	38,	22},</div><div class='add'>+	{235000,	4,	40,	23},</div><div class='add'>+	{238000,	4,	30,	17},</div><div class='add'>+	{241500,	2,	17,	19},</div><div class='add'>+	{245250,	2,	20,	22},</div><div class='add'>+	{247750,	2,	22,	24},</div><div class='add'>+	{253250,	2,	15,	16},</div><div class='add'>+	{256250,	2,	18,	19},</div><div class='add'>+	{262500,	2,	31,	32},</div><div class='add'>+	{267250,	2,	66,	67},</div><div class='add'>+	{268500,	2,	94,	95},</div><div class='add'>+	{270000,	2,	14,	14},</div><div class='add'>+	{272500,	2,	77,	76},</div><div class='add'>+	{273750,	2,	57,	56},</div><div class='add'>+	{280750,	2,	24,	23},</div><div class='add'>+	{281250,	2,	23,	22},</div><div class='add'>+	{286000,	2,	17,	16},</div><div class='add'>+	{291750,	2,	26,	24},</div><div class='add'>+	{296703,	2,	56,	51},</div><div class='add'>+	{297000,	2,	22,	20},</div><div class='add'>+	{298000,	2,	21,	19},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void intel_ddi_mode_set(struct drm_encoder *encoder,</div><div class='add'>+				struct drm_display_mode *mode,</div><div class='add'>+				struct drm_display_mode *adjusted_mode)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = encoder-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct drm_crtc *crtc = encoder-&gt;crtc;</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);</div><div class='add'>+	int port = intel_hdmi-&gt;ddi_port;</div><div class='add'>+	int pipe = intel_crtc-&gt;pipe;</div><div class='add'>+	int p, n2, r2, valid=0;</div><div class='add'>+	u32 temp, i;</div><div class='add'>+</div><div class='add'>+	/* On Haswell, we need to enable the clocks and prepare DDI function to</div><div class='add'>+	 * work in HDMI mode for this pipe.</div><div class='add'>+	 */</div><div class='add'>+	DRM_DEBUG_KMS("Preparing HDMI DDI mode for Haswell on port %c, pipe %c\n", port_name(port), pipe_name(pipe));</div><div class='add'>+</div><div class='add'>+	for (i=0; i &lt; ARRAY_SIZE(wrpll_tmds_clock_table); i++) {</div><div class='add'>+		if (crtc-&gt;mode.clock == wrpll_tmds_clock_table[i].clock) {</div><div class='add'>+			p = wrpll_tmds_clock_table[i].p;</div><div class='add'>+			n2 = wrpll_tmds_clock_table[i].n2;</div><div class='add'>+			r2 = wrpll_tmds_clock_table[i].r2;</div><div class='add'>+</div><div class='add'>+			DRM_DEBUG_KMS("WR PLL clock: found settings for %dKHz refresh rate: p=%d, n2=%d, r2=%d\n",</div><div class='add'>+					crtc-&gt;mode.clock,</div><div class='add'>+					p, n2, r2);</div><div class='add'>+</div><div class='add'>+			valid = 1;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!valid) {</div><div class='add'>+		DRM_ERROR("Unable to find WR PLL clock settings for %dKHz refresh rate\n",</div><div class='add'>+				crtc-&gt;mode.clock);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable LCPLL if disabled */</div><div class='add'>+	temp = I915_READ(LCPLL_CTL);</div><div class='add'>+	if (temp &amp; LCPLL_PLL_DISABLE)</div><div class='add'>+		I915_WRITE(LCPLL_CTL,</div><div class='add'>+				temp &amp; ~LCPLL_PLL_DISABLE);</div><div class='add'>+</div><div class='add'>+	/* Configure WR PLL 1, program the correct divider values for</div><div class='add'>+	 * the desired frequency and wait for warmup */</div><div class='add'>+	I915_WRITE(WRPLL_CTL1,</div><div class='add'>+			WRPLL_PLL_ENABLE |</div><div class='add'>+			WRPLL_PLL_SELECT_LCPLL_2700 |</div><div class='add'>+			WRPLL_DIVIDER_REFERENCE(r2) |</div><div class='add'>+			WRPLL_DIVIDER_FEEDBACK(n2) |</div><div class='add'>+			WRPLL_DIVIDER_POST(p));</div><div class='add'>+</div><div class='add'>+	udelay(20);</div><div class='add'>+</div><div class='add'>+	/* Use WRPLL1 clock to drive the output to the port, and tell the pipe to use</div><div class='add'>+	 * this port for connection.</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(PORT_CLK_SEL(port),</div><div class='add'>+			PORT_CLK_SEL_WRPLL1);</div><div class='add'>+	I915_WRITE(PIPE_CLK_SEL(pipe),</div><div class='add'>+			PIPE_CLK_SEL_PORT(port));</div><div class='add'>+</div><div class='add'>+	udelay(20);</div><div class='add'>+</div><div class='add'>+	if (intel_hdmi-&gt;has_audio) {</div><div class='add'>+		/* Proper support for digital audio needs a new logic and a new set</div><div class='add'>+		 * of registers, so we leave it for future patch bombing.</div><div class='add'>+		 */</div><div class='add'>+		DRM_DEBUG_DRIVER("HDMI audio on pipe %c not yet supported on DDI\n",</div><div class='add'>+				 pipe_name(intel_crtc-&gt;pipe));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable PIPE_DDI_FUNC_CTL for the pipe to work in HDMI mode */</div><div class='add'>+	temp = I915_READ(DDI_FUNC_CTL(pipe));</div><div class='add'>+	temp &amp;= ~PIPE_DDI_PORT_MASK;</div><div class='add'>+	temp &amp;= ~PIPE_DDI_BPC_12;</div><div class='add'>+	temp |= PIPE_DDI_SELECT_PORT(port) |</div><div class='add'>+			PIPE_DDI_MODE_SELECT_HDMI |</div><div class='add'>+			((intel_crtc-&gt;bpp &gt; 24) ?</div><div class='add'>+				PIPE_DDI_BPC_12 :</div><div class='add'>+				PIPE_DDI_BPC_8) |</div><div class='add'>+			PIPE_DDI_FUNC_ENABLE;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(DDI_FUNC_CTL(pipe), temp);</div><div class='add'>+</div><div class='add'>+	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);</div><div class='add'>+	intel_hdmi_set_spd_infoframe(encoder);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_ddi_dpms(struct drm_encoder *encoder, int mode)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = encoder-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);</div><div class='add'>+	int port = intel_hdmi-&gt;ddi_port;</div><div class='add'>+	u32 temp;</div><div class='add'>+</div><div class='add'>+	temp = I915_READ(DDI_BUF_CTL(port));</div><div class='add'>+</div><div class='add'>+	if (mode != DRM_MODE_DPMS_ON) {</div><div class='add'>+		temp &amp;= ~DDI_BUF_CTL_ENABLE;</div><div class='add'>+	} else {</div><div class='add'>+		temp |= DDI_BUF_CTL_ENABLE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable DDI_BUF_CTL. In HDMI/DVI mode, the port width,</div><div class='add'>+	 * and swing/emphasis values are ignored so nothing special needs</div><div class='add'>+	 * to be done besides enabling the port.</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(DDI_BUF_CTL(port),</div><div class='add'>+			temp);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c<br/>index 5908cd563400..e0aa064def31 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_display.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_display.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'>  *	Eric Anholt &lt;eric@anholt.net&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/cpufreq.h&gt;</div><div class='add'>+#include &lt;linux/dmi.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='hunk'>@@ -44,7 +44,6 @@</div><div class='ctx'> #define HAS_eDP (intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))</div><div class='ctx'> </div><div class='ctx'> bool intel_pipe_has_type(struct drm_crtc *crtc, int type);</div><div class='del'>-static void intel_update_watermarks(struct drm_device *dev);</div><div class='ctx'> static void intel_increase_pllclock(struct drm_crtc *crtc);</div><div class='ctx'> static void intel_crtc_update_cursor(struct drm_crtc *crtc, bool on);</div><div class='ctx'> </div><div class='hunk'>@@ -360,6 +359,88 @@ static const intel_limit_t intel_limits_ironlake_display_port = {</div><div class='ctx'> 	.find_pll = intel_find_pll_ironlake_dp,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;dpio_lock, flags);</div><div class='add'>+	if (wait_for_atomic_us((I915_READ(DPIO_PKT) &amp; DPIO_BUSY) == 0, 100)) {</div><div class='add'>+		DRM_ERROR("DPIO idle wait timed out\n");</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	I915_WRITE(DPIO_REG, reg);</div><div class='add'>+	I915_WRITE(DPIO_PKT, DPIO_RID | DPIO_OP_READ | DPIO_PORTID |</div><div class='add'>+		   DPIO_BYTE);</div><div class='add'>+	if (wait_for_atomic_us((I915_READ(DPIO_PKT) &amp; DPIO_BUSY) == 0, 100)) {</div><div class='add'>+		DRM_ERROR("DPIO read wait timed out\n");</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+	val = I915_READ(DPIO_DATA);</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;dpio_lock, flags);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vlv_init_dpio(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	/* Reset the DPIO config */</div><div class='add'>+	I915_WRITE(DPIO_CTL, 0);</div><div class='add'>+	POSTING_READ(DPIO_CTL);</div><div class='add'>+	I915_WRITE(DPIO_CTL, 1);</div><div class='add'>+	POSTING_READ(DPIO_CTL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)</div><div class='add'>+{</div><div class='add'>+	DRM_INFO("Forcing lvds to dual link mode on %s\n", id-&gt;ident);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dmi_system_id intel_dual_link_lvds[] = {</div><div class='add'>+	{</div><div class='add'>+		.callback = intel_dual_link_lvds_callback,</div><div class='add'>+		.ident = "Apple MacBook Pro (Core i5/i7 Series)",</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{ }	/* terminating entry */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool is_dual_link_lvds(struct drm_i915_private *dev_priv,</div><div class='add'>+			      unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	/* use the module option value if specified */</div><div class='add'>+	if (i915_lvds_channel_mode &gt; 0)</div><div class='add'>+		return i915_lvds_channel_mode == 2;</div><div class='add'>+</div><div class='add'>+	if (dmi_check_system(intel_dual_link_lvds))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;lvds_val)</div><div class='add'>+		val = dev_priv-&gt;lvds_val;</div><div class='add'>+	else {</div><div class='add'>+		/* BIOS should set the proper LVDS register value at boot, but</div><div class='add'>+		 * in reality, it doesn't set the value when the lid is closed;</div><div class='add'>+		 * we need to check "the value to be set" in VBT when LVDS</div><div class='add'>+		 * register is uninitialized.</div><div class='add'>+		 */</div><div class='add'>+		val = I915_READ(reg);</div><div class='add'>+		if (!(val &amp; ~LVDS_DETECTED))</div><div class='add'>+			val = dev_priv-&gt;bios_lvds_val;</div><div class='add'>+		dev_priv-&gt;lvds_val = val;</div><div class='add'>+	}</div><div class='add'>+	return (val &amp; LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc,</div><div class='ctx'> 						int refclk)</div><div class='ctx'> {</div><div class='hunk'>@@ -368,8 +449,7 @@ static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc,</div><div class='ctx'> 	const intel_limit_t *limit;</div><div class='ctx'> </div><div class='ctx'> 	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {</div><div class='del'>-		if ((I915_READ(PCH_LVDS) &amp; LVDS_CLKB_POWER_MASK) ==</div><div class='del'>-		    LVDS_CLKB_POWER_UP) {</div><div class='add'>+		if (is_dual_link_lvds(dev_priv, PCH_LVDS)) {</div><div class='ctx'> 			/* LVDS dual channel */</div><div class='ctx'> 			if (refclk == 100000)</div><div class='ctx'> 				limit = &amp;intel_limits_ironlake_dual_lvds_100m;</div><div class='hunk'>@@ -397,8 +477,7 @@ static const intel_limit_t *intel_g4x_limit(struct drm_crtc *crtc)</div><div class='ctx'> 	const intel_limit_t *limit;</div><div class='ctx'> </div><div class='ctx'> 	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {</div><div class='del'>-		if ((I915_READ(LVDS) &amp; LVDS_CLKB_POWER_MASK) ==</div><div class='del'>-		    LVDS_CLKB_POWER_UP)</div><div class='add'>+		if (is_dual_link_lvds(dev_priv, LVDS))</div><div class='ctx'> 			/* LVDS with dual channel */</div><div class='ctx'> 			limit = &amp;intel_limits_g4x_dual_channel_lvds;</div><div class='ctx'> 		else</div><div class='hunk'>@@ -536,8 +615,7 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,</div><div class='ctx'> 		 * reliably set up different single/dual channel state, if we</div><div class='ctx'> 		 * even can.</div><div class='ctx'> 		 */</div><div class='del'>-		if ((I915_READ(LVDS) &amp; LVDS_CLKB_POWER_MASK) ==</div><div class='del'>-		    LVDS_CLKB_POWER_UP)</div><div class='add'>+		if (is_dual_link_lvds(dev_priv, LVDS))</div><div class='ctx'> 			clock.p2 = limit-&gt;p2.p2_fast;</div><div class='ctx'> 		else</div><div class='ctx'> 			clock.p2 = limit-&gt;p2.p2_slow;</div><div class='hunk'>@@ -706,6 +784,17 @@ intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ironlake_wait_for_vblank(struct drm_device *dev, int pipe)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 frame, frame_reg = PIPEFRAME(pipe);</div><div class='add'>+</div><div class='add'>+	frame = I915_READ(frame_reg);</div><div class='add'>+</div><div class='add'>+	if (wait_for(I915_READ_NOTRACE(frame_reg) != frame, 50))</div><div class='add'>+		DRM_DEBUG_KMS("vblank wait timed out\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * intel_wait_for_vblank - wait for vblank on a given pipe</div><div class='ctx'>  * @dev: drm device</div><div class='hunk'>@@ -719,6 +808,11 @@ void intel_wait_for_vblank(struct drm_device *dev, int pipe)</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	int pipestat_reg = PIPESTAT(pipe);</div><div class='ctx'> </div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &gt;= 5) {</div><div class='add'>+		ironlake_wait_for_vblank(dev, pipe);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Clear existing vblank status. Note this will clear any other</div><div class='ctx'> 	 * sticky status fields as well.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -771,15 +865,20 @@ void intel_wait_for_pipe_off(struct drm_device *dev, int pipe)</div><div class='ctx'> 			     100))</div><div class='ctx'> 			DRM_DEBUG_KMS("pipe_off wait timed out\n");</div><div class='ctx'> 	} else {</div><div class='del'>-		u32 last_line;</div><div class='add'>+		u32 last_line, line_mask;</div><div class='ctx'> 		int reg = PIPEDSL(pipe);</div><div class='ctx'> 		unsigned long timeout = jiffies + msecs_to_jiffies(100);</div><div class='ctx'> </div><div class='add'>+		if (IS_GEN2(dev))</div><div class='add'>+			line_mask = DSL_LINEMASK_GEN2;</div><div class='add'>+		else</div><div class='add'>+			line_mask = DSL_LINEMASK_GEN3;</div><div class='add'>+</div><div class='ctx'> 		/* Wait for the display line to settle */</div><div class='ctx'> 		do {</div><div class='del'>-			last_line = I915_READ(reg) &amp; DSL_LINEMASK;</div><div class='add'>+			last_line = I915_READ(reg) &amp; line_mask;</div><div class='ctx'> 			mdelay(5);</div><div class='del'>-		} while (((I915_READ(reg) &amp; DSL_LINEMASK) != last_line) &amp;&amp;</div><div class='add'>+		} while (((I915_READ(reg) &amp; line_mask) != last_line) &amp;&amp;</div><div class='ctx'> 			 time_after(timeout, jiffies));</div><div class='ctx'> 		if (time_after(jiffies, timeout))</div><div class='ctx'> 			DRM_DEBUG_KMS("pipe_off wait timed out\n");</div><div class='hunk'>@@ -811,34 +910,49 @@ static void assert_pll(struct drm_i915_private *dev_priv,</div><div class='ctx'> </div><div class='ctx'> /* For ILK+ */</div><div class='ctx'> static void assert_pch_pll(struct drm_i915_private *dev_priv,</div><div class='del'>-			   enum pipe pipe, bool state)</div><div class='add'>+			   struct intel_pch_pll *pll,</div><div class='add'>+			   struct intel_crtc *crtc,</div><div class='add'>+			   bool state)</div><div class='ctx'> {</div><div class='del'>-	int reg;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	bool cur_state;</div><div class='ctx'> </div><div class='del'>-	if (HAS_PCH_CPT(dev_priv-&gt;dev)) {</div><div class='del'>-		u32 pch_dpll;</div><div class='del'>-</div><div class='del'>-		pch_dpll = I915_READ(PCH_DPLL_SEL);</div><div class='del'>-</div><div class='del'>-		/* Make sure the selected PLL is enabled to the transcoder */</div><div class='del'>-		WARN(!((pch_dpll &gt;&gt; (4 * pipe)) &amp; 8),</div><div class='del'>-		     "transcoder %d PLL not enabled\n", pipe);</div><div class='del'>-</div><div class='del'>-		/* Convert the transcoder pipe number to a pll pipe number */</div><div class='del'>-		pipe = (pch_dpll &gt;&gt; (4 * pipe)) &amp; 1;</div><div class='add'>+	if (HAS_PCH_LPT(dev_priv-&gt;dev)) {</div><div class='add'>+		DRM_DEBUG_DRIVER("LPT detected: skipping PCH PLL test\n");</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	reg = PCH_DPLL(pipe);</div><div class='del'>-	val = I915_READ(reg);</div><div class='add'>+	if (WARN (!pll,</div><div class='add'>+		  "asserting PCH PLL %s with no PLL\n", state_string(state)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	val = I915_READ(pll-&gt;pll_reg);</div><div class='ctx'> 	cur_state = !!(val &amp; DPLL_VCO_ENABLE);</div><div class='ctx'> 	WARN(cur_state != state,</div><div class='del'>-	     "PCH PLL state assertion failure (expected %s, current %s)\n",</div><div class='del'>-	     state_string(state), state_string(cur_state));</div><div class='add'>+	     "PCH PLL state for reg %x assertion failure (expected %s, current %s), val=%08x\n",</div><div class='add'>+	     pll-&gt;pll_reg, state_string(state), state_string(cur_state), val);</div><div class='add'>+</div><div class='add'>+	/* Make sure the selected PLL is correctly attached to the transcoder */</div><div class='add'>+	if (crtc &amp;&amp; HAS_PCH_CPT(dev_priv-&gt;dev)) {</div><div class='add'>+		u32 pch_dpll;</div><div class='add'>+</div><div class='add'>+		pch_dpll = I915_READ(PCH_DPLL_SEL);</div><div class='add'>+		cur_state = pll-&gt;pll_reg == _PCH_DPLL_B;</div><div class='add'>+		if (!WARN(((pch_dpll &gt;&gt; (4 * crtc-&gt;pipe)) &amp; 1) != cur_state,</div><div class='add'>+			  "PLL[%d] not attached to this transcoder %d: %08x\n",</div><div class='add'>+			  cur_state, crtc-&gt;pipe, pch_dpll)) {</div><div class='add'>+			cur_state = !!(val &gt;&gt; (4*crtc-&gt;pipe + 3));</div><div class='add'>+			WARN(cur_state != state,</div><div class='add'>+			     "PLL[%d] not %s on this transcoder %d: %08x\n",</div><div class='add'>+			     pll-&gt;pll_reg == _PCH_DPLL_B,</div><div class='add'>+			     state_string(state),</div><div class='add'>+			     crtc-&gt;pipe,</div><div class='add'>+			     val);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='del'>-#define assert_pch_pll_enabled(d, p) assert_pch_pll(d, p, true)</div><div class='del'>-#define assert_pch_pll_disabled(d, p) assert_pch_pll(d, p, false)</div><div class='add'>+#define assert_pch_pll_enabled(d, p, c) assert_pch_pll(d, p, c, true)</div><div class='add'>+#define assert_pch_pll_disabled(d, p, c) assert_pch_pll(d, p, c, false)</div><div class='ctx'> </div><div class='ctx'> static void assert_fdi_tx(struct drm_i915_private *dev_priv,</div><div class='ctx'> 			  enum pipe pipe, bool state)</div><div class='hunk'>@@ -847,9 +961,16 @@ static void assert_fdi_tx(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	bool cur_state;</div><div class='ctx'> </div><div class='del'>-	reg = FDI_TX_CTL(pipe);</div><div class='del'>-	val = I915_READ(reg);</div><div class='del'>-	cur_state = !!(val &amp; FDI_TX_ENABLE);</div><div class='add'>+	if (IS_HASWELL(dev_priv-&gt;dev)) {</div><div class='add'>+		/* On Haswell, DDI is used instead of FDI_TX_CTL */</div><div class='add'>+		reg = DDI_FUNC_CTL(pipe);</div><div class='add'>+		val = I915_READ(reg);</div><div class='add'>+		cur_state = !!(val &amp; PIPE_DDI_FUNC_ENABLE);</div><div class='add'>+	} else {</div><div class='add'>+		reg = FDI_TX_CTL(pipe);</div><div class='add'>+		val = I915_READ(reg);</div><div class='add'>+		cur_state = !!(val &amp; FDI_TX_ENABLE);</div><div class='add'>+	}</div><div class='ctx'> 	WARN(cur_state != state,</div><div class='ctx'> 	     "FDI TX state assertion failure (expected %s, current %s)\n",</div><div class='ctx'> 	     state_string(state), state_string(cur_state));</div><div class='hunk'>@@ -864,9 +985,14 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	bool cur_state;</div><div class='ctx'> </div><div class='del'>-	reg = FDI_RX_CTL(pipe);</div><div class='del'>-	val = I915_READ(reg);</div><div class='del'>-	cur_state = !!(val &amp; FDI_RX_ENABLE);</div><div class='add'>+	if (IS_HASWELL(dev_priv-&gt;dev) &amp;&amp; pipe &gt; 0) {</div><div class='add'>+			DRM_ERROR("Attempting to enable FDI_RX on Haswell pipe &gt; 0\n");</div><div class='add'>+			return;</div><div class='add'>+	} else {</div><div class='add'>+		reg = FDI_RX_CTL(pipe);</div><div class='add'>+		val = I915_READ(reg);</div><div class='add'>+		cur_state = !!(val &amp; FDI_RX_ENABLE);</div><div class='add'>+	}</div><div class='ctx'> 	WARN(cur_state != state,</div><div class='ctx'> 	     "FDI RX state assertion failure (expected %s, current %s)\n",</div><div class='ctx'> 	     state_string(state), state_string(cur_state));</div><div class='hunk'>@@ -884,6 +1010,10 @@ static void assert_fdi_tx_pll_enabled(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	if (dev_priv-&gt;info-&gt;gen == 5)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* On Haswell, DDI ports are responsible for the FDI PLL setup */</div><div class='add'>+	if (IS_HASWELL(dev_priv-&gt;dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	reg = FDI_TX_CTL(pipe);</div><div class='ctx'> 	val = I915_READ(reg);</div><div class='ctx'> 	WARN(!(val &amp; FDI_TX_PLL_ENABLE), "FDI TX PLL assertion failure, should be active but is disabled\n");</div><div class='hunk'>@@ -895,6 +1025,10 @@ static void assert_fdi_rx_pll_enabled(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	int reg;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='add'>+	if (IS_HASWELL(dev_priv-&gt;dev) &amp;&amp; pipe &gt; 0) {</div><div class='add'>+		DRM_ERROR("Attempting to enable FDI on Haswell with pipe &gt; 0\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> 	reg = FDI_RX_CTL(pipe);</div><div class='ctx'> 	val = I915_READ(reg);</div><div class='ctx'> 	WARN(!(val &amp; FDI_RX_PLL_ENABLE), "FDI RX PLL assertion failure, should be active but is disabled\n");</div><div class='hunk'>@@ -1000,6 +1134,11 @@ static void assert_pch_refclk_enabled(struct drm_i915_private *dev_priv)</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	bool enabled;</div><div class='ctx'> </div><div class='add'>+	if (HAS_PCH_LPT(dev_priv-&gt;dev)) {</div><div class='add'>+		DRM_DEBUG_DRIVER("LPT does not has PCH refclk, skipping check\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	val = I915_READ(PCH_DREF_CONTROL);</div><div class='ctx'> 	enabled = !!(val &amp; (DREF_SSC_SOURCE_MASK | DREF_NONSPREAD_SOURCE_MASK |</div><div class='ctx'> 			    DREF_SUPERSPREAD_SOURCE_MASK));</div><div class='hunk'>@@ -1198,6 +1337,69 @@ static void intel_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)</div><div class='ctx'> 	POSTING_READ(reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* SBI access */</div><div class='add'>+static void</div><div class='add'>+intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;dpio_lock, flags);</div><div class='add'>+	if (wait_for((I915_READ(SBI_CTL_STAT) &amp; SBI_READY) == 0,</div><div class='add'>+				100)) {</div><div class='add'>+		DRM_ERROR("timeout waiting for SBI to become ready\n");</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	I915_WRITE(SBI_ADDR,</div><div class='add'>+			(reg &lt;&lt; 16));</div><div class='add'>+	I915_WRITE(SBI_DATA,</div><div class='add'>+			value);</div><div class='add'>+	I915_WRITE(SBI_CTL_STAT,</div><div class='add'>+			SBI_BUSY |</div><div class='add'>+			SBI_CTL_OP_CRWR);</div><div class='add'>+</div><div class='add'>+	if (wait_for((I915_READ(SBI_CTL_STAT) &amp; (SBI_READY | SBI_RESPONSE_SUCCESS)) == 0,</div><div class='add'>+				100)) {</div><div class='add'>+		DRM_ERROR("timeout waiting for SBI to complete write transaction\n");</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;dpio_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;dpio_lock, flags);</div><div class='add'>+	if (wait_for((I915_READ(SBI_CTL_STAT) &amp; SBI_READY) == 0,</div><div class='add'>+				100)) {</div><div class='add'>+		DRM_ERROR("timeout waiting for SBI to become ready\n");</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	I915_WRITE(SBI_ADDR,</div><div class='add'>+			(reg &lt;&lt; 16));</div><div class='add'>+	I915_WRITE(SBI_CTL_STAT,</div><div class='add'>+			SBI_BUSY |</div><div class='add'>+			SBI_CTL_OP_CRRD);</div><div class='add'>+</div><div class='add'>+	if (wait_for((I915_READ(SBI_CTL_STAT) &amp; (SBI_READY | SBI_RESPONSE_SUCCESS)) == 0,</div><div class='add'>+				100)) {</div><div class='add'>+		DRM_ERROR("timeout waiting for SBI to complete read transaction\n");</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	value = I915_READ(SBI_DATA);</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;dpio_lock, flags);</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * intel_enable_pch_pll - enable PCH PLL</div><div class='ctx'>  * @dev_priv: i915 private structure</div><div class='hunk'>@@ -1206,60 +1408,88 @@ static void intel_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)</div><div class='ctx'>  * The PCH PLL needs to be enabled before the PCH transcoder, since it</div><div class='ctx'>  * drives the transcoder clock.</div><div class='ctx'>  */</div><div class='del'>-static void intel_enable_pch_pll(struct drm_i915_private *dev_priv,</div><div class='del'>-				 enum pipe pipe)</div><div class='add'>+static void intel_enable_pch_pll(struct intel_crtc *intel_crtc)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *dev_priv = intel_crtc-&gt;base.dev-&gt;dev_private;</div><div class='add'>+	struct intel_pch_pll *pll;</div><div class='ctx'> 	int reg;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='del'>-	if (pipe &gt; 1)</div><div class='add'>+	/* PCH PLLs only available on ILK, SNB and IVB */</div><div class='add'>+	BUG_ON(dev_priv-&gt;info-&gt;gen &lt; 5);</div><div class='add'>+	pll = intel_crtc-&gt;pch_pll;</div><div class='add'>+	if (pll == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(pll-&gt;refcount == 0))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* PCH only available on ILK+ */</div><div class='del'>-	BUG_ON(dev_priv-&gt;info-&gt;gen &lt; 5);</div><div class='add'>+	DRM_DEBUG_KMS("enable PCH PLL %x (active %d, on? %d)for crtc %d\n",</div><div class='add'>+		      pll-&gt;pll_reg, pll-&gt;active, pll-&gt;on,</div><div class='add'>+		      intel_crtc-&gt;base.base.id);</div><div class='ctx'> </div><div class='ctx'> 	/* PCH refclock must be enabled first */</div><div class='ctx'> 	assert_pch_refclk_enabled(dev_priv);</div><div class='ctx'> </div><div class='del'>-	reg = PCH_DPLL(pipe);</div><div class='add'>+	if (pll-&gt;active++ &amp;&amp; pll-&gt;on) {</div><div class='add'>+		assert_pch_pll_enabled(dev_priv, pll, NULL);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("enabling PCH PLL %x\n", pll-&gt;pll_reg);</div><div class='add'>+</div><div class='add'>+	reg = pll-&gt;pll_reg;</div><div class='ctx'> 	val = I915_READ(reg);</div><div class='ctx'> 	val |= DPLL_VCO_ENABLE;</div><div class='ctx'> 	I915_WRITE(reg, val);</div><div class='ctx'> 	POSTING_READ(reg);</div><div class='ctx'> 	udelay(200);</div><div class='add'>+</div><div class='add'>+	pll-&gt;on = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_disable_pch_pll(struct drm_i915_private *dev_priv,</div><div class='del'>-				  enum pipe pipe)</div><div class='add'>+static void intel_disable_pch_pll(struct intel_crtc *intel_crtc)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *dev_priv = intel_crtc-&gt;base.dev-&gt;dev_private;</div><div class='add'>+	struct intel_pch_pll *pll = intel_crtc-&gt;pch_pll;</div><div class='ctx'> 	int reg;</div><div class='del'>-	u32 val, pll_mask = TRANSC_DPLL_ENABLE | TRANSC_DPLLB_SEL,</div><div class='del'>-		pll_sel = TRANSC_DPLL_ENABLE;</div><div class='del'>-</div><div class='del'>-	if (pipe &gt; 1)</div><div class='del'>-		return;</div><div class='add'>+	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	/* PCH only available on ILK+ */</div><div class='ctx'> 	BUG_ON(dev_priv-&gt;info-&gt;gen &lt; 5);</div><div class='add'>+	if (pll == NULL)</div><div class='add'>+	       return;</div><div class='ctx'> </div><div class='del'>-	/* Make sure transcoder isn't still depending on us */</div><div class='del'>-	assert_transcoder_disabled(dev_priv, pipe);</div><div class='add'>+	if (WARN_ON(pll-&gt;refcount == 0))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	if (pipe == 0)</div><div class='del'>-		pll_sel |= TRANSC_DPLLA_SEL;</div><div class='del'>-	else if (pipe == 1)</div><div class='del'>-		pll_sel |= TRANSC_DPLLB_SEL;</div><div class='add'>+	DRM_DEBUG_KMS("disable PCH PLL %x (active %d, on? %d) for crtc %d\n",</div><div class='add'>+		      pll-&gt;pll_reg, pll-&gt;active, pll-&gt;on,</div><div class='add'>+		      intel_crtc-&gt;base.base.id);</div><div class='ctx'> </div><div class='add'>+	if (WARN_ON(pll-&gt;active == 0)) {</div><div class='add'>+		assert_pch_pll_disabled(dev_priv, pll, NULL);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if ((I915_READ(PCH_DPLL_SEL) &amp; pll_mask) == pll_sel)</div><div class='add'>+	if (--pll-&gt;active) {</div><div class='add'>+		assert_pch_pll_enabled(dev_priv, pll, NULL);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("disabling PCH PLL %x\n", pll-&gt;pll_reg);</div><div class='ctx'> </div><div class='del'>-	reg = PCH_DPLL(pipe);</div><div class='add'>+	/* Make sure transcoder isn't still depending on us */</div><div class='add'>+	assert_transcoder_disabled(dev_priv, intel_crtc-&gt;pipe);</div><div class='add'>+</div><div class='add'>+	reg = pll-&gt;pll_reg;</div><div class='ctx'> 	val = I915_READ(reg);</div><div class='ctx'> 	val &amp;= ~DPLL_VCO_ENABLE;</div><div class='ctx'> 	I915_WRITE(reg, val);</div><div class='ctx'> 	POSTING_READ(reg);</div><div class='ctx'> 	udelay(200);</div><div class='add'>+</div><div class='add'>+	pll-&gt;on = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_enable_transcoder(struct drm_i915_private *dev_priv,</div><div class='hunk'>@@ -1273,12 +1503,18 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	BUG_ON(dev_priv-&gt;info-&gt;gen &lt; 5);</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure PCH DPLL is enabled */</div><div class='del'>-	assert_pch_pll_enabled(dev_priv, pipe);</div><div class='add'>+	assert_pch_pll_enabled(dev_priv,</div><div class='add'>+			       to_intel_crtc(crtc)-&gt;pch_pll,</div><div class='add'>+			       to_intel_crtc(crtc));</div><div class='ctx'> </div><div class='ctx'> 	/* FDI must be feeding us bits for PCH ports */</div><div class='ctx'> 	assert_fdi_tx_enabled(dev_priv, pipe);</div><div class='ctx'> 	assert_fdi_rx_enabled(dev_priv, pipe);</div><div class='ctx'> </div><div class='add'>+	if (IS_HASWELL(dev_priv-&gt;dev) &amp;&amp; pipe &gt; 0) {</div><div class='add'>+		DRM_ERROR("Attempting to enable transcoder on Haswell with pipe &gt; 0\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> 	reg = TRANSCONF(pipe);</div><div class='ctx'> 	val = I915_READ(reg);</div><div class='ctx'> 	pipeconf_val = I915_READ(PIPECONF(pipe));</div><div class='hunk'>@@ -1415,7 +1651,7 @@ static void intel_disable_pipe(struct drm_i915_private *dev_priv,</div><div class='ctx'>  * Plane regs are double buffered, going from enabled-&gt;disabled needs a</div><div class='ctx'>  * trigger in order to latch.  The display address reg provides this.</div><div class='ctx'>  */</div><div class='del'>-static void intel_flush_display_plane(struct drm_i915_private *dev_priv,</div><div class='add'>+void intel_flush_display_plane(struct drm_i915_private *dev_priv,</div><div class='ctx'> 				      enum plane plane)</div><div class='ctx'> {</div><div class='ctx'> 	I915_WRITE(DSPADDR(plane), I915_READ(DSPADDR(plane)));</div><div class='hunk'>@@ -1526,490 +1762,6 @@ static void intel_disable_pch_ports(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	disable_pch_hdmi(dev_priv, pipe, HDMID);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void i8xx_disable_fbc(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 fbc_ctl;</div><div class='del'>-</div><div class='del'>-	/* Disable compression */</div><div class='del'>-	fbc_ctl = I915_READ(FBC_CONTROL);</div><div class='del'>-	if ((fbc_ctl &amp; FBC_CTL_EN) == 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	fbc_ctl &amp;= ~FBC_CTL_EN;</div><div class='del'>-	I915_WRITE(FBC_CONTROL, fbc_ctl);</div><div class='del'>-</div><div class='del'>-	/* Wait for compressing bit to clear */</div><div class='del'>-	if (wait_for((I915_READ(FBC_STATUS) &amp; FBC_STAT_COMPRESSING) == 0, 10)) {</div><div class='del'>-		DRM_DEBUG_KMS("FBC idle timed out\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("disabled FBC\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval)</div><div class='del'>-{</div><div class='del'>-	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_framebuffer *fb = crtc-&gt;fb;</div><div class='del'>-	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);</div><div class='del'>-	struct drm_i915_gem_object *obj = intel_fb-&gt;obj;</div><div class='del'>-	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='del'>-	int cfb_pitch;</div><div class='del'>-	int plane, i;</div><div class='del'>-	u32 fbc_ctl, fbc_ctl2;</div><div class='del'>-</div><div class='del'>-	cfb_pitch = dev_priv-&gt;cfb_size / FBC_LL_SIZE;</div><div class='del'>-	if (fb-&gt;pitches[0] &lt; cfb_pitch)</div><div class='del'>-		cfb_pitch = fb-&gt;pitches[0];</div><div class='del'>-</div><div class='del'>-	/* FBC_CTL wants 64B units */</div><div class='del'>-	cfb_pitch = (cfb_pitch / 64) - 1;</div><div class='del'>-	plane = intel_crtc-&gt;plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB;</div><div class='del'>-</div><div class='del'>-	/* Clear old tags */</div><div class='del'>-	for (i = 0; i &lt; (FBC_LL_SIZE / 32) + 1; i++)</div><div class='del'>-		I915_WRITE(FBC_TAG + (i * 4), 0);</div><div class='del'>-</div><div class='del'>-	/* Set it up... */</div><div class='del'>-	fbc_ctl2 = FBC_CTL_FENCE_DBL | FBC_CTL_IDLE_IMM | FBC_CTL_CPU_FENCE;</div><div class='del'>-	fbc_ctl2 |= plane;</div><div class='del'>-	I915_WRITE(FBC_CONTROL2, fbc_ctl2);</div><div class='del'>-	I915_WRITE(FBC_FENCE_OFF, crtc-&gt;y);</div><div class='del'>-</div><div class='del'>-	/* enable it... */</div><div class='del'>-	fbc_ctl = FBC_CTL_EN | FBC_CTL_PERIODIC;</div><div class='del'>-	if (IS_I945GM(dev))</div><div class='del'>-		fbc_ctl |= FBC_CTL_C3_IDLE; /* 945 needs special SR handling */</div><div class='del'>-	fbc_ctl |= (cfb_pitch &amp; 0xff) &lt;&lt; FBC_CTL_STRIDE_SHIFT;</div><div class='del'>-	fbc_ctl |= (interval &amp; 0x2fff) &lt;&lt; FBC_CTL_INTERVAL_SHIFT;</div><div class='del'>-	fbc_ctl |= obj-&gt;fence_reg;</div><div class='del'>-	I915_WRITE(FBC_CONTROL, fbc_ctl);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("enabled FBC, pitch %d, yoff %d, plane %d, ",</div><div class='del'>-		      cfb_pitch, crtc-&gt;y, intel_crtc-&gt;plane);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool i8xx_fbc_enabled(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	return I915_READ(FBC_CONTROL) &amp; FBC_CTL_EN;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)</div><div class='del'>-{</div><div class='del'>-	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_framebuffer *fb = crtc-&gt;fb;</div><div class='del'>-	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);</div><div class='del'>-	struct drm_i915_gem_object *obj = intel_fb-&gt;obj;</div><div class='del'>-	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='del'>-	int plane = intel_crtc-&gt;plane == 0 ? DPFC_CTL_PLANEA : DPFC_CTL_PLANEB;</div><div class='del'>-	unsigned long stall_watermark = 200;</div><div class='del'>-	u32 dpfc_ctl;</div><div class='del'>-</div><div class='del'>-	dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;</div><div class='del'>-	dpfc_ctl |= DPFC_CTL_FENCE_EN | obj-&gt;fence_reg;</div><div class='del'>-	I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN |</div><div class='del'>-		   (stall_watermark &lt;&lt; DPFC_RECOMP_STALL_WM_SHIFT) |</div><div class='del'>-		   (interval &lt;&lt; DPFC_RECOMP_TIMER_COUNT_SHIFT));</div><div class='del'>-	I915_WRITE(DPFC_FENCE_YOFF, crtc-&gt;y);</div><div class='del'>-</div><div class='del'>-	/* enable it... */</div><div class='del'>-	I915_WRITE(DPFC_CONTROL, I915_READ(DPFC_CONTROL) | DPFC_CTL_EN);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc-&gt;plane);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void g4x_disable_fbc(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 dpfc_ctl;</div><div class='del'>-</div><div class='del'>-	/* Disable compression */</div><div class='del'>-	dpfc_ctl = I915_READ(DPFC_CONTROL);</div><div class='del'>-	if (dpfc_ctl &amp; DPFC_CTL_EN) {</div><div class='del'>-		dpfc_ctl &amp;= ~DPFC_CTL_EN;</div><div class='del'>-		I915_WRITE(DPFC_CONTROL, dpfc_ctl);</div><div class='del'>-</div><div class='del'>-		DRM_DEBUG_KMS("disabled FBC\n");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool g4x_fbc_enabled(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	return I915_READ(DPFC_CONTROL) &amp; DPFC_CTL_EN;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sandybridge_blit_fbc_update(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 blt_ecoskpd;</div><div class='del'>-</div><div class='del'>-	/* Make sure blitter notifies FBC of writes */</div><div class='del'>-	gen6_gt_force_wake_get(dev_priv);</div><div class='del'>-	blt_ecoskpd = I915_READ(GEN6_BLITTER_ECOSKPD);</div><div class='del'>-	blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY &lt;&lt;</div><div class='del'>-		GEN6_BLITTER_LOCK_SHIFT;</div><div class='del'>-	I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);</div><div class='del'>-	blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY;</div><div class='del'>-	I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);</div><div class='del'>-	blt_ecoskpd &amp;= ~(GEN6_BLITTER_FBC_NOTIFY &lt;&lt;</div><div class='del'>-			 GEN6_BLITTER_LOCK_SHIFT);</div><div class='del'>-	I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);</div><div class='del'>-	POSTING_READ(GEN6_BLITTER_ECOSKPD);</div><div class='del'>-	gen6_gt_force_wake_put(dev_priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval)</div><div class='del'>-{</div><div class='del'>-	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_framebuffer *fb = crtc-&gt;fb;</div><div class='del'>-	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);</div><div class='del'>-	struct drm_i915_gem_object *obj = intel_fb-&gt;obj;</div><div class='del'>-	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='del'>-	int plane = intel_crtc-&gt;plane == 0 ? DPFC_CTL_PLANEA : DPFC_CTL_PLANEB;</div><div class='del'>-	unsigned long stall_watermark = 200;</div><div class='del'>-	u32 dpfc_ctl;</div><div class='del'>-</div><div class='del'>-	dpfc_ctl = I915_READ(ILK_DPFC_CONTROL);</div><div class='del'>-	dpfc_ctl &amp;= DPFC_RESERVED;</div><div class='del'>-	dpfc_ctl |= (plane | DPFC_CTL_LIMIT_1X);</div><div class='del'>-	/* Set persistent mode for front-buffer rendering, ala X. */</div><div class='del'>-	dpfc_ctl |= DPFC_CTL_PERSISTENT_MODE;</div><div class='del'>-	dpfc_ctl |= (DPFC_CTL_FENCE_EN | obj-&gt;fence_reg);</div><div class='del'>-	I915_WRITE(ILK_DPFC_CHICKEN, DPFC_HT_MODIFY);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(ILK_DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN |</div><div class='del'>-		   (stall_watermark &lt;&lt; DPFC_RECOMP_STALL_WM_SHIFT) |</div><div class='del'>-		   (interval &lt;&lt; DPFC_RECOMP_TIMER_COUNT_SHIFT));</div><div class='del'>-	I915_WRITE(ILK_DPFC_FENCE_YOFF, crtc-&gt;y);</div><div class='del'>-	I915_WRITE(ILK_FBC_RT_BASE, obj-&gt;gtt_offset | ILK_FBC_RT_VALID);</div><div class='del'>-	/* enable it... */</div><div class='del'>-	I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);</div><div class='del'>-</div><div class='del'>-	if (IS_GEN6(dev)) {</div><div class='del'>-		I915_WRITE(SNB_DPFC_CTL_SA,</div><div class='del'>-			   SNB_CPU_FENCE_ENABLE | obj-&gt;fence_reg);</div><div class='del'>-		I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc-&gt;y);</div><div class='del'>-		sandybridge_blit_fbc_update(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc-&gt;plane);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ironlake_disable_fbc(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 dpfc_ctl;</div><div class='del'>-</div><div class='del'>-	/* Disable compression */</div><div class='del'>-	dpfc_ctl = I915_READ(ILK_DPFC_CONTROL);</div><div class='del'>-	if (dpfc_ctl &amp; DPFC_CTL_EN) {</div><div class='del'>-		dpfc_ctl &amp;= ~DPFC_CTL_EN;</div><div class='del'>-		I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl);</div><div class='del'>-</div><div class='del'>-		DRM_DEBUG_KMS("disabled FBC\n");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool ironlake_fbc_enabled(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	return I915_READ(ILK_DPFC_CONTROL) &amp; DPFC_CTL_EN;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool intel_fbc_enabled(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	if (!dev_priv-&gt;display.fbc_enabled)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return dev_priv-&gt;display.fbc_enabled(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void intel_fbc_work_fn(struct work_struct *__work)</div><div class='del'>-{</div><div class='del'>-	struct intel_fbc_work *work =</div><div class='del'>-		container_of(to_delayed_work(__work),</div><div class='del'>-			     struct intel_fbc_work, work);</div><div class='del'>-	struct drm_device *dev = work-&gt;crtc-&gt;dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	if (work == dev_priv-&gt;fbc_work) {</div><div class='del'>-		/* Double check that we haven't switched fb without cancelling</div><div class='del'>-		 * the prior work.</div><div class='del'>-		 */</div><div class='del'>-		if (work-&gt;crtc-&gt;fb == work-&gt;fb) {</div><div class='del'>-			dev_priv-&gt;display.enable_fbc(work-&gt;crtc,</div><div class='del'>-						     work-&gt;interval);</div><div class='del'>-</div><div class='del'>-			dev_priv-&gt;cfb_plane = to_intel_crtc(work-&gt;crtc)-&gt;plane;</div><div class='del'>-			dev_priv-&gt;cfb_fb = work-&gt;crtc-&gt;fb-&gt;base.id;</div><div class='del'>-			dev_priv-&gt;cfb_y = work-&gt;crtc-&gt;y;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		dev_priv-&gt;fbc_work = NULL;</div><div class='del'>-	}</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-</div><div class='del'>-	kfree(work);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void intel_cancel_fbc_work(struct drm_i915_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-	if (dev_priv-&gt;fbc_work == NULL)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("cancelling pending FBC enable\n");</div><div class='del'>-</div><div class='del'>-	/* Synchronisation is provided by struct_mutex and checking of</div><div class='del'>-	 * dev_priv-&gt;fbc_work, so we can perform the cancellation</div><div class='del'>-	 * entirely asynchronously.</div><div class='del'>-	 */</div><div class='del'>-	if (cancel_delayed_work(&amp;dev_priv-&gt;fbc_work-&gt;work))</div><div class='del'>-		/* tasklet was killed before being run, clean up */</div><div class='del'>-		kfree(dev_priv-&gt;fbc_work);</div><div class='del'>-</div><div class='del'>-	/* Mark the work as no longer wanted so that if it does</div><div class='del'>-	 * wake-up (because the work was already running and waiting</div><div class='del'>-	 * for our mutex), it will discover that is no longer</div><div class='del'>-	 * necessary to run.</div><div class='del'>-	 */</div><div class='del'>-	dev_priv-&gt;fbc_work = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval)</div><div class='del'>-{</div><div class='del'>-	struct intel_fbc_work *work;</div><div class='del'>-	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	if (!dev_priv-&gt;display.enable_fbc)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	intel_cancel_fbc_work(dev_priv);</div><div class='del'>-</div><div class='del'>-	work = kzalloc(sizeof *work, GFP_KERNEL);</div><div class='del'>-	if (work == NULL) {</div><div class='del'>-		dev_priv-&gt;display.enable_fbc(crtc, interval);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	work-&gt;crtc = crtc;</div><div class='del'>-	work-&gt;fb = crtc-&gt;fb;</div><div class='del'>-	work-&gt;interval = interval;</div><div class='del'>-	INIT_DELAYED_WORK(&amp;work-&gt;work, intel_fbc_work_fn);</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;fbc_work = work;</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("scheduling delayed FBC enable\n");</div><div class='del'>-</div><div class='del'>-	/* Delay the actual enabling to let pageflipping cease and the</div><div class='del'>-	 * display to settle before starting the compression. Note that</div><div class='del'>-	 * this delay also serves a second purpose: it allows for a</div><div class='del'>-	 * vblank to pass after disabling the FBC before we attempt</div><div class='del'>-	 * to modify the control registers.</div><div class='del'>-	 *</div><div class='del'>-	 * A more complicated solution would involve tracking vblanks</div><div class='del'>-	 * following the termination of the page-flipping sequence</div><div class='del'>-	 * and indeed performing the enable as a co-routine and not</div><div class='del'>-	 * waiting synchronously upon the vblank.</div><div class='del'>-	 */</div><div class='del'>-	schedule_delayed_work(&amp;work-&gt;work, msecs_to_jiffies(50));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void intel_disable_fbc(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	intel_cancel_fbc_work(dev_priv);</div><div class='del'>-</div><div class='del'>-	if (!dev_priv-&gt;display.disable_fbc)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;display.disable_fbc(dev);</div><div class='del'>-	dev_priv-&gt;cfb_plane = -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * intel_update_fbc - enable/disable FBC as needed</div><div class='del'>- * @dev: the drm_device</div><div class='del'>- *</div><div class='del'>- * Set up the framebuffer compression hardware at mode set time.  We</div><div class='del'>- * enable it if possible:</div><div class='del'>- *   - plane A only (on pre-965)</div><div class='del'>- *   - no pixel mulitply/line duplication</div><div class='del'>- *   - no alpha buffer discard</div><div class='del'>- *   - no dual wide</div><div class='del'>- *   - framebuffer &lt;= 2048 in width, 1536 in height</div><div class='del'>- *</div><div class='del'>- * We can't assume that any compression will take place (worst case),</div><div class='del'>- * so the compressed buffer has to be the same size as the uncompressed</div><div class='del'>- * one.  It also must reside (along with the line length buffer) in</div><div class='del'>- * stolen memory.</div><div class='del'>- *</div><div class='del'>- * We need to enable/disable FBC on a global basis.</div><div class='del'>- */</div><div class='del'>-static void intel_update_fbc(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_crtc *crtc = NULL, *tmp_crtc;</div><div class='del'>-	struct intel_crtc *intel_crtc;</div><div class='del'>-	struct drm_framebuffer *fb;</div><div class='del'>-	struct intel_framebuffer *intel_fb;</div><div class='del'>-	struct drm_i915_gem_object *obj;</div><div class='del'>-	int enable_fbc;</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("\n");</div><div class='del'>-</div><div class='del'>-	if (!i915_powersave)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (!I915_HAS_FBC(dev))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If FBC is already on, we just have to verify that we can</div><div class='del'>-	 * keep it that way...</div><div class='del'>-	 * Need to disable if:</div><div class='del'>-	 *   - more than one pipe is active</div><div class='del'>-	 *   - changing FBC params (stride, fence, mode)</div><div class='del'>-	 *   - new fb is too large to fit in compressed buffer</div><div class='del'>-	 *   - going to an unsupported config (interlace, pixel multiply, etc.)</div><div class='del'>-	 */</div><div class='del'>-	list_for_each_entry(tmp_crtc, &amp;dev-&gt;mode_config.crtc_list, head) {</div><div class='del'>-		if (tmp_crtc-&gt;enabled &amp;&amp; tmp_crtc-&gt;fb) {</div><div class='del'>-			if (crtc) {</div><div class='del'>-				DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");</div><div class='del'>-				dev_priv-&gt;no_fbc_reason = FBC_MULTIPLE_PIPES;</div><div class='del'>-				goto out_disable;</div><div class='del'>-			}</div><div class='del'>-			crtc = tmp_crtc;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!crtc || crtc-&gt;fb == NULL) {</div><div class='del'>-		DRM_DEBUG_KMS("no output, disabling\n");</div><div class='del'>-		dev_priv-&gt;no_fbc_reason = FBC_NO_OUTPUT;</div><div class='del'>-		goto out_disable;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	intel_crtc = to_intel_crtc(crtc);</div><div class='del'>-	fb = crtc-&gt;fb;</div><div class='del'>-	intel_fb = to_intel_framebuffer(fb);</div><div class='del'>-	obj = intel_fb-&gt;obj;</div><div class='del'>-</div><div class='del'>-	enable_fbc = i915_enable_fbc;</div><div class='del'>-	if (enable_fbc &lt; 0) {</div><div class='del'>-		DRM_DEBUG_KMS("fbc set to per-chip default\n");</div><div class='del'>-		enable_fbc = 1;</div><div class='del'>-		if (INTEL_INFO(dev)-&gt;gen &lt;= 6)</div><div class='del'>-			enable_fbc = 0;</div><div class='del'>-	}</div><div class='del'>-	if (!enable_fbc) {</div><div class='del'>-		DRM_DEBUG_KMS("fbc disabled per module param\n");</div><div class='del'>-		dev_priv-&gt;no_fbc_reason = FBC_MODULE_PARAM;</div><div class='del'>-		goto out_disable;</div><div class='del'>-	}</div><div class='del'>-	if (intel_fb-&gt;obj-&gt;base.size &gt; dev_priv-&gt;cfb_size) {</div><div class='del'>-		DRM_DEBUG_KMS("framebuffer too large, disabling "</div><div class='del'>-			      "compression\n");</div><div class='del'>-		dev_priv-&gt;no_fbc_reason = FBC_STOLEN_TOO_SMALL;</div><div class='del'>-		goto out_disable;</div><div class='del'>-	}</div><div class='del'>-	if ((crtc-&gt;mode.flags &amp; DRM_MODE_FLAG_INTERLACE) ||</div><div class='del'>-	    (crtc-&gt;mode.flags &amp; DRM_MODE_FLAG_DBLSCAN)) {</div><div class='del'>-		DRM_DEBUG_KMS("mode incompatible with compression, "</div><div class='del'>-			      "disabling\n");</div><div class='del'>-		dev_priv-&gt;no_fbc_reason = FBC_UNSUPPORTED_MODE;</div><div class='del'>-		goto out_disable;</div><div class='del'>-	}</div><div class='del'>-	if ((crtc-&gt;mode.hdisplay &gt; 2048) ||</div><div class='del'>-	    (crtc-&gt;mode.vdisplay &gt; 1536)) {</div><div class='del'>-		DRM_DEBUG_KMS("mode too large for compression, disabling\n");</div><div class='del'>-		dev_priv-&gt;no_fbc_reason = FBC_MODE_TOO_LARGE;</div><div class='del'>-		goto out_disable;</div><div class='del'>-	}</div><div class='del'>-	if ((IS_I915GM(dev) || IS_I945GM(dev)) &amp;&amp; intel_crtc-&gt;plane != 0) {</div><div class='del'>-		DRM_DEBUG_KMS("plane not 0, disabling compression\n");</div><div class='del'>-		dev_priv-&gt;no_fbc_reason = FBC_BAD_PLANE;</div><div class='del'>-		goto out_disable;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* The use of a CPU fence is mandatory in order to detect writes</div><div class='del'>-	 * by the CPU to the scanout and trigger updates to the FBC.</div><div class='del'>-	 */</div><div class='del'>-	if (obj-&gt;tiling_mode != I915_TILING_X ||</div><div class='del'>-	    obj-&gt;fence_reg == I915_FENCE_REG_NONE) {</div><div class='del'>-		DRM_DEBUG_KMS("framebuffer not tiled or fenced, disabling compression\n");</div><div class='del'>-		dev_priv-&gt;no_fbc_reason = FBC_NOT_TILED;</div><div class='del'>-		goto out_disable;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If the kernel debugger is active, always disable compression */</div><div class='del'>-	if (in_dbg_master())</div><div class='del'>-		goto out_disable;</div><div class='del'>-</div><div class='del'>-	/* If the scanout has not changed, don't modify the FBC settings.</div><div class='del'>-	 * Note that we make the fundamental assumption that the fb-&gt;obj</div><div class='del'>-	 * cannot be unpinned (and have its GTT offset and fence revoked)</div><div class='del'>-	 * without first being decoupled from the scanout and FBC disabled.</div><div class='del'>-	 */</div><div class='del'>-	if (dev_priv-&gt;cfb_plane == intel_crtc-&gt;plane &amp;&amp;</div><div class='del'>-	    dev_priv-&gt;cfb_fb == fb-&gt;base.id &amp;&amp;</div><div class='del'>-	    dev_priv-&gt;cfb_y == crtc-&gt;y)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (intel_fbc_enabled(dev)) {</div><div class='del'>-		/* We update FBC along two paths, after changing fb/crtc</div><div class='del'>-		 * configuration (modeswitching) and after page-flipping</div><div class='del'>-		 * finishes. For the latter, we know that not only did</div><div class='del'>-		 * we disable the FBC at the start of the page-flip</div><div class='del'>-		 * sequence, but also more than one vblank has passed.</div><div class='del'>-		 *</div><div class='del'>-		 * For the former case of modeswitching, it is possible</div><div class='del'>-		 * to switch between two FBC valid configurations</div><div class='del'>-		 * instantaneously so we do need to disable the FBC</div><div class='del'>-		 * before we can modify its control registers. We also</div><div class='del'>-		 * have to wait for the next vblank for that to take</div><div class='del'>-		 * effect. However, since we delay enabling FBC we can</div><div class='del'>-		 * assume that a vblank has passed since disabling and</div><div class='del'>-		 * that we can safely alter the registers in the deferred</div><div class='del'>-		 * callback.</div><div class='del'>-		 *</div><div class='del'>-		 * In the scenario that we go from a valid to invalid</div><div class='del'>-		 * and then back to valid FBC configuration we have</div><div class='del'>-		 * no strict enforcement that a vblank occurred since</div><div class='del'>-		 * disabling the FBC. However, along all current pipe</div><div class='del'>-		 * disabling paths we do need to wait for a vblank at</div><div class='del'>-		 * some point. And we wait before enabling FBC anyway.</div><div class='del'>-		 */</div><div class='del'>-		DRM_DEBUG_KMS("disabling active FBC for update\n");</div><div class='del'>-		intel_disable_fbc(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	intel_enable_fbc(crtc, 500);</div><div class='del'>-	return;</div><div class='del'>-</div><div class='del'>-out_disable:</div><div class='del'>-	/* Multiple disables should be harmless */</div><div class='del'>-	if (intel_fbc_enabled(dev)) {</div><div class='del'>-		DRM_DEBUG_KMS("unsupported config, disabling FBC\n");</div><div class='del'>-		intel_disable_fbc(dev);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int</div><div class='ctx'> intel_pin_and_fence_fb_obj(struct drm_device *dev,</div><div class='ctx'> 			   struct drm_i915_gem_object *obj,</div><div class='hunk'>@@ -2050,13 +1802,11 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,</div><div class='ctx'> 	 * framebuffer compression.  For simplicity, we always install</div><div class='ctx'> 	 * a fence as the cost is not that onerous.</div><div class='ctx'> 	 */</div><div class='del'>-	if (obj-&gt;tiling_mode != I915_TILING_NONE) {</div><div class='del'>-		ret = i915_gem_object_get_fence(obj, pipelined);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_unpin;</div><div class='add'>+	ret = i915_gem_object_get_fence(obj);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_unpin;</div><div class='ctx'> </div><div class='del'>-		i915_gem_object_pin_fence(obj);</div><div class='del'>-	}</div><div class='add'>+	i915_gem_object_pin_fence(obj);</div><div class='ctx'> </div><div class='ctx'> 	dev_priv-&gt;mm.interruptible = true;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2137,7 +1887,7 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,</div><div class='ctx'> 		      Start, Offset, x, y, fb-&gt;pitches[0]);</div><div class='ctx'> 	I915_WRITE(DSPSTRIDE(plane), fb-&gt;pitches[0]);</div><div class='ctx'> 	if (INTEL_INFO(dev)-&gt;gen &gt;= 4) {</div><div class='del'>-		I915_WRITE(DSPSURF(plane), Start);</div><div class='add'>+		I915_MODIFY_DISPBASE(DSPSURF(plane), Start);</div><div class='ctx'> 		I915_WRITE(DSPTILEOFF(plane), (y &lt;&lt; 16) | x);</div><div class='ctx'> 		I915_WRITE(DSPADDR(plane), Offset);</div><div class='ctx'> 	} else</div><div class='hunk'>@@ -2217,7 +1967,7 @@ static int ironlake_update_plane(struct drm_crtc *crtc,</div><div class='ctx'> 	DRM_DEBUG_KMS("Writing base %08lX %08lX %d %d %d\n",</div><div class='ctx'> 		      Start, Offset, x, y, fb-&gt;pitches[0]);</div><div class='ctx'> 	I915_WRITE(DSPSTRIDE(plane), fb-&gt;pitches[0]);</div><div class='del'>-	I915_WRITE(DSPSURF(plane), Start);</div><div class='add'>+	I915_MODIFY_DISPBASE(DSPSURF(plane), Start);</div><div class='ctx'> 	I915_WRITE(DSPTILEOFF(plane), (y &lt;&lt; 16) | x);</div><div class='ctx'> 	I915_WRITE(DSPADDR(plane), Offset);</div><div class='ctx'> 	POSTING_READ(reg);</div><div class='hunk'>@@ -2232,16 +1982,12 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = dev_priv-&gt;display.update_plane(crtc, fb, x, y);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	intel_update_fbc(dev);</div><div class='add'>+	if (dev_priv-&gt;display.disable_fbc)</div><div class='add'>+		dev_priv-&gt;display.disable_fbc(dev);</div><div class='ctx'> 	intel_increase_pllclock(crtc);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return dev_priv-&gt;display.update_plane(crtc, fb, x, y);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -2276,6 +2022,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,</div><div class='ctx'> 		    struct drm_framebuffer *old_fb)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_i915_master_private *master_priv;</div><div class='ctx'> 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -2286,16 +2033,10 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (intel_crtc-&gt;plane) {</div><div class='del'>-	case 0:</div><div class='del'>-	case 1:</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		if (IS_IVYBRIDGE(dev))</div><div class='del'>-			break;</div><div class='del'>-		/* fall through otherwise */</div><div class='del'>-	default:</div><div class='del'>-		DRM_ERROR("no plane for crtc\n");</div><div class='add'>+	if(intel_crtc-&gt;plane &gt; dev_priv-&gt;num_pipe) {</div><div class='add'>+		DRM_ERROR("no plane for crtc: plane %d, num_pipes %d\n",</div><div class='add'>+				intel_crtc-&gt;plane,</div><div class='add'>+				dev_priv-&gt;num_pipe);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2312,8 +2053,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,</div><div class='ctx'> 	if (old_fb)</div><div class='ctx'> 		intel_finish_fb(old_fb);</div><div class='ctx'> </div><div class='del'>-	ret = intel_pipe_set_base_atomic(crtc, crtc-&gt;fb, x, y,</div><div class='del'>-					 LEAVE_ATOMIC_MODE_SET);</div><div class='add'>+	ret = dev_priv-&gt;display.update_plane(crtc, crtc-&gt;fb, x, y);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		intel_unpin_fb_obj(to_intel_framebuffer(crtc-&gt;fb)-&gt;obj);</div><div class='ctx'> 		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='hunk'>@@ -2326,6 +2066,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,</div><div class='ctx'> 		intel_unpin_fb_obj(to_intel_framebuffer(old_fb)-&gt;obj);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	intel_update_fbc(dev);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (!dev-&gt;primary-&gt;master)</div><div class='hunk'>@@ -2547,7 +2288,7 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='ctx'> 	int pipe = intel_crtc-&gt;pipe;</div><div class='del'>-	u32 reg, temp, i;</div><div class='add'>+	u32 reg, temp, i, retry;</div><div class='ctx'> </div><div class='ctx'> 	/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit</div><div class='ctx'> 	   for train result */</div><div class='hunk'>@@ -2599,15 +2340,19 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)</div><div class='ctx'> 		POSTING_READ(reg);</div><div class='ctx'> 		udelay(500);</div><div class='ctx'> </div><div class='del'>-		reg = FDI_RX_IIR(pipe);</div><div class='del'>-		temp = I915_READ(reg);</div><div class='del'>-		DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);</div><div class='del'>-</div><div class='del'>-		if (temp &amp; FDI_RX_BIT_LOCK) {</div><div class='del'>-			I915_WRITE(reg, temp | FDI_RX_BIT_LOCK);</div><div class='del'>-			DRM_DEBUG_KMS("FDI train 1 done.\n");</div><div class='del'>-			break;</div><div class='add'>+		for (retry = 0; retry &lt; 5; retry++) {</div><div class='add'>+			reg = FDI_RX_IIR(pipe);</div><div class='add'>+			temp = I915_READ(reg);</div><div class='add'>+			DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);</div><div class='add'>+			if (temp &amp; FDI_RX_BIT_LOCK) {</div><div class='add'>+				I915_WRITE(reg, temp | FDI_RX_BIT_LOCK);</div><div class='add'>+				DRM_DEBUG_KMS("FDI train 1 done.\n");</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			udelay(50);</div><div class='ctx'> 		}</div><div class='add'>+		if (retry &lt; 5)</div><div class='add'>+			break;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (i == 4)</div><div class='ctx'> 		DRM_ERROR("FDI train 1 fail!\n");</div><div class='hunk'>@@ -2648,15 +2393,19 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)</div><div class='ctx'> 		POSTING_READ(reg);</div><div class='ctx'> 		udelay(500);</div><div class='ctx'> </div><div class='del'>-		reg = FDI_RX_IIR(pipe);</div><div class='del'>-		temp = I915_READ(reg);</div><div class='del'>-		DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);</div><div class='del'>-</div><div class='del'>-		if (temp &amp; FDI_RX_SYMBOL_LOCK) {</div><div class='del'>-			I915_WRITE(reg, temp | FDI_RX_SYMBOL_LOCK);</div><div class='del'>-			DRM_DEBUG_KMS("FDI train 2 done.\n");</div><div class='del'>-			break;</div><div class='add'>+		for (retry = 0; retry &lt; 5; retry++) {</div><div class='add'>+			reg = FDI_RX_IIR(pipe);</div><div class='add'>+			temp = I915_READ(reg);</div><div class='add'>+			DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);</div><div class='add'>+			if (temp &amp; FDI_RX_SYMBOL_LOCK) {</div><div class='add'>+				I915_WRITE(reg, temp | FDI_RX_SYMBOL_LOCK);</div><div class='add'>+				DRM_DEBUG_KMS("FDI train 2 done.\n");</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			udelay(50);</div><div class='ctx'> 		}</div><div class='add'>+		if (retry &lt; 5)</div><div class='add'>+			break;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (i == 4)</div><div class='ctx'> 		DRM_ERROR("FDI train 2 fail!\n");</div><div class='hunk'>@@ -2808,14 +2557,18 @@ static void ironlake_fdi_pll_enable(struct drm_crtc *crtc)</div><div class='ctx'> 	POSTING_READ(reg);</div><div class='ctx'> 	udelay(200);</div><div class='ctx'> </div><div class='del'>-	/* Enable CPU FDI TX PLL, always on for Ironlake */</div><div class='del'>-	reg = FDI_TX_CTL(pipe);</div><div class='del'>-	temp = I915_READ(reg);</div><div class='del'>-	if ((temp &amp; FDI_TX_PLL_ENABLE) == 0) {</div><div class='del'>-		I915_WRITE(reg, temp | FDI_TX_PLL_ENABLE);</div><div class='add'>+	/* On Haswell, the PLL configuration for ports and pipes is handled</div><div class='add'>+	 * separately, as part of DDI setup */</div><div class='add'>+	if (!IS_HASWELL(dev)) {</div><div class='add'>+		/* Enable CPU FDI TX PLL, always on for Ironlake */</div><div class='add'>+		reg = FDI_TX_CTL(pipe);</div><div class='add'>+		temp = I915_READ(reg);</div><div class='add'>+		if ((temp &amp; FDI_TX_PLL_ENABLE) == 0) {</div><div class='add'>+			I915_WRITE(reg, temp | FDI_TX_PLL_ENABLE);</div><div class='ctx'> </div><div class='del'>-		POSTING_READ(reg);</div><div class='del'>-		udelay(100);</div><div class='add'>+			POSTING_READ(reg);</div><div class='add'>+			udelay(100);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2888,38 +2641,16 @@ static void ironlake_fdi_disable(struct drm_crtc *crtc)</div><div class='ctx'> 	udelay(100);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * When we disable a pipe, we need to clear any pending scanline wait events</div><div class='del'>- * to avoid hanging the ring, which we assume we are waiting on.</div><div class='del'>- */</div><div class='del'>-static void intel_clear_scanline_wait(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct intel_ring_buffer *ring;</div><div class='del'>-	u32 tmp;</div><div class='del'>-</div><div class='del'>-	if (IS_GEN2(dev))</div><div class='del'>-		/* Can't break the hang on i8xx */</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ring = LP_RING(dev_priv);</div><div class='del'>-	tmp = I915_READ_CTL(ring);</div><div class='del'>-	if (tmp &amp; RING_WAIT)</div><div class='del'>-		I915_WRITE_CTL(ring, tmp);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_gem_object *obj;</div><div class='del'>-	struct drm_i915_private *dev_priv;</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	if (crtc-&gt;fb == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	obj = to_intel_framebuffer(crtc-&gt;fb)-&gt;obj;</div><div class='del'>-	dev_priv = crtc-&gt;dev-&gt;dev_private;</div><div class='del'>-	wait_event(dev_priv-&gt;pending_flip_queue,</div><div class='del'>-		   atomic_read(&amp;obj-&gt;pending_flip) == 0);</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	intel_finish_fb(crtc-&gt;fb);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool intel_crtc_driving_pch(struct drm_crtc *crtc)</div><div class='hunk'>@@ -2936,6 +2667,22 @@ static bool intel_crtc_driving_pch(struct drm_crtc *crtc)</div><div class='ctx'> 		if (encoder-&gt;base.crtc != crtc)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		/* On Haswell, LPT PCH handles the VGA connection via FDI, and Haswell</div><div class='add'>+		 * CPU handles all others */</div><div class='add'>+		if (IS_HASWELL(dev)) {</div><div class='add'>+			/* It is still unclear how this will work on PPT, so throw up a warning */</div><div class='add'>+			WARN_ON(!HAS_PCH_LPT(dev));</div><div class='add'>+</div><div class='add'>+			if (encoder-&gt;type == DRM_MODE_ENCODER_DAC) {</div><div class='add'>+				DRM_DEBUG_KMS("Haswell detected DAC encoder, assuming is PCH\n");</div><div class='add'>+				return true;</div><div class='add'>+			} else {</div><div class='add'>+				DRM_DEBUG_KMS("Haswell detected encoder %d, assuming is CPU\n",</div><div class='add'>+						encoder-&gt;type);</div><div class='add'>+				return false;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		switch (encoder-&gt;type) {</div><div class='ctx'> 		case INTEL_OUTPUT_EDP:</div><div class='ctx'> 			if (!intel_encoder_is_pch_edp(&amp;encoder-&gt;base))</div><div class='hunk'>@@ -2947,6 +2694,97 @@ static bool intel_crtc_driving_pch(struct drm_crtc *crtc)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Program iCLKIP clock to the desired frequency */</div><div class='add'>+static void lpt_program_iclkip(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 divsel, phaseinc, auxdiv, phasedir = 0;</div><div class='add'>+	u32 temp;</div><div class='add'>+</div><div class='add'>+	/* It is necessary to ungate the pixclk gate prior to programming</div><div class='add'>+	 * the divisors, and gate it back when it is done.</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(PIXCLK_GATE, PIXCLK_GATE_GATE);</div><div class='add'>+</div><div class='add'>+	/* Disable SSCCTL */</div><div class='add'>+	intel_sbi_write(dev_priv, SBI_SSCCTL6,</div><div class='add'>+				intel_sbi_read(dev_priv, SBI_SSCCTL6) |</div><div class='add'>+					SBI_SSCCTL_DISABLE);</div><div class='add'>+</div><div class='add'>+	/* 20MHz is a corner case which is out of range for the 7-bit divisor */</div><div class='add'>+	if (crtc-&gt;mode.clock == 20000) {</div><div class='add'>+		auxdiv = 1;</div><div class='add'>+		divsel = 0x41;</div><div class='add'>+		phaseinc = 0x20;</div><div class='add'>+	} else {</div><div class='add'>+		/* The iCLK virtual clock root frequency is in MHz,</div><div class='add'>+		 * but the crtc-&gt;mode.clock in in KHz. To get the divisors,</div><div class='add'>+		 * it is necessary to divide one by another, so we</div><div class='add'>+		 * convert the virtual clock precision to KHz here for higher</div><div class='add'>+		 * precision.</div><div class='add'>+		 */</div><div class='add'>+		u32 iclk_virtual_root_freq = 172800 * 1000;</div><div class='add'>+		u32 iclk_pi_range = 64;</div><div class='add'>+		u32 desired_divisor, msb_divisor_value, pi_value;</div><div class='add'>+</div><div class='add'>+		desired_divisor = (iclk_virtual_root_freq / crtc-&gt;mode.clock);</div><div class='add'>+		msb_divisor_value = desired_divisor / iclk_pi_range;</div><div class='add'>+		pi_value = desired_divisor % iclk_pi_range;</div><div class='add'>+</div><div class='add'>+		auxdiv = 0;</div><div class='add'>+		divsel = msb_divisor_value - 2;</div><div class='add'>+		phaseinc = pi_value;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This should not happen with any sane values */</div><div class='add'>+	WARN_ON(SBI_SSCDIVINTPHASE_DIVSEL(divsel) &amp;</div><div class='add'>+		~SBI_SSCDIVINTPHASE_DIVSEL_MASK);</div><div class='add'>+	WARN_ON(SBI_SSCDIVINTPHASE_DIR(phasedir) &amp;</div><div class='add'>+		~SBI_SSCDIVINTPHASE_INCVAL_MASK);</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("iCLKIP clock: found settings for %dKHz refresh rate: auxdiv=%x, divsel=%x, phasedir=%x, phaseinc=%x\n",</div><div class='add'>+			crtc-&gt;mode.clock,</div><div class='add'>+			auxdiv,</div><div class='add'>+			divsel,</div><div class='add'>+			phasedir,</div><div class='add'>+			phaseinc);</div><div class='add'>+</div><div class='add'>+	/* Program SSCDIVINTPHASE6 */</div><div class='add'>+	temp = intel_sbi_read(dev_priv, SBI_SSCDIVINTPHASE6);</div><div class='add'>+	temp &amp;= ~SBI_SSCDIVINTPHASE_DIVSEL_MASK;</div><div class='add'>+	temp |= SBI_SSCDIVINTPHASE_DIVSEL(divsel);</div><div class='add'>+	temp &amp;= ~SBI_SSCDIVINTPHASE_INCVAL_MASK;</div><div class='add'>+	temp |= SBI_SSCDIVINTPHASE_INCVAL(phaseinc);</div><div class='add'>+	temp |= SBI_SSCDIVINTPHASE_DIR(phasedir);</div><div class='add'>+	temp |= SBI_SSCDIVINTPHASE_PROPAGATE;</div><div class='add'>+</div><div class='add'>+	intel_sbi_write(dev_priv,</div><div class='add'>+			SBI_SSCDIVINTPHASE6,</div><div class='add'>+			temp);</div><div class='add'>+</div><div class='add'>+	/* Program SSCAUXDIV */</div><div class='add'>+	temp = intel_sbi_read(dev_priv, SBI_SSCAUXDIV6);</div><div class='add'>+	temp &amp;= ~SBI_SSCAUXDIV_FINALDIV2SEL(1);</div><div class='add'>+	temp |= SBI_SSCAUXDIV_FINALDIV2SEL(auxdiv);</div><div class='add'>+	intel_sbi_write(dev_priv,</div><div class='add'>+			SBI_SSCAUXDIV6,</div><div class='add'>+			temp);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	/* Enable modulator and associated divider */</div><div class='add'>+	temp = intel_sbi_read(dev_priv, SBI_SSCCTL6);</div><div class='add'>+	temp &amp;= ~SBI_SSCCTL_DISABLE;</div><div class='add'>+	intel_sbi_write(dev_priv,</div><div class='add'>+			SBI_SSCCTL6,</div><div class='add'>+			temp);</div><div class='add'>+</div><div class='add'>+	/* Wait for initialization time */</div><div class='add'>+	udelay(24);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(PIXCLK_GATE, PIXCLK_GATE_UNGATE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Enable PCH resources required for PCH ports:</div><div class='ctx'>  *   - PCH PLLs</div><div class='hunk'>@@ -2961,29 +2799,41 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='ctx'> 	int pipe = intel_crtc-&gt;pipe;</div><div class='del'>-	u32 reg, temp, transc_sel;</div><div class='add'>+	u32 reg, temp;</div><div class='add'>+</div><div class='add'>+	assert_transcoder_disabled(dev_priv, pipe);</div><div class='ctx'> </div><div class='ctx'> 	/* For PCH output, training FDI link */</div><div class='ctx'> 	dev_priv-&gt;display.fdi_link_train(crtc);</div><div class='ctx'> </div><div class='del'>-	intel_enable_pch_pll(dev_priv, pipe);</div><div class='add'>+	intel_enable_pch_pll(intel_crtc);</div><div class='ctx'> </div><div class='del'>-	if (HAS_PCH_CPT(dev)) {</div><div class='del'>-		transc_sel = intel_crtc-&gt;use_pll_a ? TRANSC_DPLLA_SEL :</div><div class='del'>-			TRANSC_DPLLB_SEL;</div><div class='add'>+	if (HAS_PCH_LPT(dev)) {</div><div class='add'>+		DRM_DEBUG_KMS("LPT detected: programming iCLKIP\n");</div><div class='add'>+		lpt_program_iclkip(crtc);</div><div class='add'>+	} else if (HAS_PCH_CPT(dev)) {</div><div class='add'>+		u32 sel;</div><div class='ctx'> </div><div class='del'>-		/* Be sure PCH DPLL SEL is set */</div><div class='ctx'> 		temp = I915_READ(PCH_DPLL_SEL);</div><div class='del'>-		if (pipe == 0) {</div><div class='del'>-			temp &amp;= ~(TRANSA_DPLLB_SEL);</div><div class='del'>-			temp |= (TRANSA_DPLL_ENABLE | TRANSA_DPLLA_SEL);</div><div class='del'>-		} else if (pipe == 1) {</div><div class='del'>-			temp &amp;= ~(TRANSB_DPLLB_SEL);</div><div class='del'>-			temp |= (TRANSB_DPLL_ENABLE | TRANSB_DPLLB_SEL);</div><div class='del'>-		} else if (pipe == 2) {</div><div class='del'>-			temp &amp;= ~(TRANSC_DPLLB_SEL);</div><div class='del'>-			temp |= (TRANSC_DPLL_ENABLE | transc_sel);</div><div class='add'>+		switch (pipe) {</div><div class='add'>+		default:</div><div class='add'>+		case 0:</div><div class='add'>+			temp |= TRANSA_DPLL_ENABLE;</div><div class='add'>+			sel = TRANSA_DPLLB_SEL;</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+			temp |= TRANSB_DPLL_ENABLE;</div><div class='add'>+			sel = TRANSB_DPLLB_SEL;</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			temp |= TRANSC_DPLL_ENABLE;</div><div class='add'>+			sel = TRANSC_DPLLB_SEL;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='add'>+		if (intel_crtc-&gt;pch_pll-&gt;pll_reg == _PCH_DPLL_B)</div><div class='add'>+			temp |= sel;</div><div class='add'>+		else</div><div class='add'>+			temp &amp;= ~sel;</div><div class='ctx'> 		I915_WRITE(PCH_DPLL_SEL, temp);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2998,7 +2848,8 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)</div><div class='ctx'> 	I915_WRITE(TRANS_VSYNC(pipe),  I915_READ(VSYNC(pipe)));</div><div class='ctx'> 	I915_WRITE(TRANS_VSYNCSHIFT(pipe),  I915_READ(VSYNCSHIFT(pipe)));</div><div class='ctx'> </div><div class='del'>-	intel_fdi_normal_train(crtc);</div><div class='add'>+	if (!IS_HASWELL(dev))</div><div class='add'>+		intel_fdi_normal_train(crtc);</div><div class='ctx'> </div><div class='ctx'> 	/* For PCH DP, enable TRANS_DP_CTL */</div><div class='ctx'> 	if (HAS_PCH_CPT(dev) &amp;&amp;</div><div class='hunk'>@@ -3041,6 +2892,93 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)</div><div class='ctx'> 	intel_enable_transcoder(dev_priv, pipe);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void intel_put_pch_pll(struct intel_crtc *intel_crtc)</div><div class='add'>+{</div><div class='add'>+	struct intel_pch_pll *pll = intel_crtc-&gt;pch_pll;</div><div class='add'>+</div><div class='add'>+	if (pll == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (pll-&gt;refcount == 0) {</div><div class='add'>+		WARN(1, "bad PCH PLL refcount\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	--pll-&gt;refcount;</div><div class='add'>+	intel_crtc-&gt;pch_pll = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct intel_pch_pll *intel_get_pch_pll(struct intel_crtc *intel_crtc, u32 dpll, u32 fp)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = intel_crtc-&gt;base.dev-&gt;dev_private;</div><div class='add'>+	struct intel_pch_pll *pll;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	pll = intel_crtc-&gt;pch_pll;</div><div class='add'>+	if (pll) {</div><div class='add'>+		DRM_DEBUG_KMS("CRTC:%d reusing existing PCH PLL %x\n",</div><div class='add'>+			      intel_crtc-&gt;base.base.id, pll-&gt;pll_reg);</div><div class='add'>+		goto prepare;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (HAS_PCH_IBX(dev_priv-&gt;dev)) {</div><div class='add'>+		/* Ironlake PCH has a fixed PLL-&gt;PCH pipe mapping. */</div><div class='add'>+		i = intel_crtc-&gt;pipe;</div><div class='add'>+		pll = &amp;dev_priv-&gt;pch_plls[i];</div><div class='add'>+</div><div class='add'>+		DRM_DEBUG_KMS("CRTC:%d using pre-allocated PCH PLL %x\n",</div><div class='add'>+			      intel_crtc-&gt;base.base.id, pll-&gt;pll_reg);</div><div class='add'>+</div><div class='add'>+		goto found;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev_priv-&gt;num_pch_pll; i++) {</div><div class='add'>+		pll = &amp;dev_priv-&gt;pch_plls[i];</div><div class='add'>+</div><div class='add'>+		/* Only want to check enabled timings first */</div><div class='add'>+		if (pll-&gt;refcount == 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (dpll == (I915_READ(pll-&gt;pll_reg) &amp; 0x7fffffff) &amp;&amp;</div><div class='add'>+		    fp == I915_READ(pll-&gt;fp0_reg)) {</div><div class='add'>+			DRM_DEBUG_KMS("CRTC:%d sharing existing PCH PLL %x (refcount %d, ative %d)\n",</div><div class='add'>+				      intel_crtc-&gt;base.base.id,</div><div class='add'>+				      pll-&gt;pll_reg, pll-&gt;refcount, pll-&gt;active);</div><div class='add'>+</div><div class='add'>+			goto found;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Ok no matching timings, maybe there's a free one? */</div><div class='add'>+	for (i = 0; i &lt; dev_priv-&gt;num_pch_pll; i++) {</div><div class='add'>+		pll = &amp;dev_priv-&gt;pch_plls[i];</div><div class='add'>+		if (pll-&gt;refcount == 0) {</div><div class='add'>+			DRM_DEBUG_KMS("CRTC:%d allocated PCH PLL %x\n",</div><div class='add'>+				      intel_crtc-&gt;base.base.id, pll-&gt;pll_reg);</div><div class='add'>+			goto found;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+</div><div class='add'>+found:</div><div class='add'>+	intel_crtc-&gt;pch_pll = pll;</div><div class='add'>+	pll-&gt;refcount++;</div><div class='add'>+	DRM_DEBUG_DRIVER("using pll %d for pipe %d\n", i, intel_crtc-&gt;pipe);</div><div class='add'>+prepare: /* separate function? */</div><div class='add'>+	DRM_DEBUG_DRIVER("switching PLL %x off\n", pll-&gt;pll_reg);</div><div class='add'>+</div><div class='add'>+	/* Wait for the clocks to stabilize before rewriting the regs */</div><div class='add'>+	I915_WRITE(pll-&gt;pll_reg, dpll &amp; ~DPLL_VCO_ENABLE);</div><div class='add'>+	POSTING_READ(pll-&gt;pll_reg);</div><div class='add'>+	udelay(150);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(pll-&gt;fp0_reg, fp);</div><div class='add'>+	I915_WRITE(pll-&gt;pll_reg, dpll &amp; ~DPLL_VCO_ENABLE);</div><div class='add'>+	pll-&gt;on = false;</div><div class='add'>+	return pll;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void intel_cpt_verify_modeset(struct drm_device *dev, int pipe)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='hunk'>@@ -3185,8 +3123,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* disable PCH DPLL */</div><div class='del'>-	if (!intel_crtc-&gt;no_pll)</div><div class='del'>-		intel_disable_pch_pll(dev_priv, pipe);</div><div class='add'>+	intel_disable_pch_pll(intel_crtc);</div><div class='ctx'> </div><div class='ctx'> 	/* Switch from PCDclk to Rawclk */</div><div class='ctx'> 	reg = FDI_RX_CTL(pipe);</div><div class='hunk'>@@ -3214,7 +3151,6 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> 	intel_update_fbc(dev);</div><div class='del'>-	intel_clear_scanline_wait(dev);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3242,6 +3178,12 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ironlake_crtc_off(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	intel_put_pch_pll(intel_crtc);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void intel_crtc_dpms_overlay(struct intel_crtc *intel_crtc, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	if (!enable &amp;&amp; intel_crtc-&gt;overlay) {</div><div class='hunk'>@@ -3313,7 +3255,6 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)</div><div class='ctx'> 	intel_crtc-&gt;active = false;</div><div class='ctx'> 	intel_update_fbc(dev);</div><div class='ctx'> 	intel_update_watermarks(dev);</div><div class='del'>-	intel_clear_scanline_wait(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='hunk'>@@ -3333,6 +3274,10 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void i9xx_crtc_off(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * Sets the power management mode of the pipe and plane.</div><div class='ctx'>  */</div><div class='hunk'>@@ -3380,25 +3325,11 @@ static void intel_crtc_disable(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_crtc_helper_funcs *crtc_funcs = crtc-&gt;helper_private;</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='del'>-</div><div class='del'>-	/* Flush any pending WAITs before we disable the pipe. Note that</div><div class='del'>-	 * we need to drop the struct_mutex in order to acquire it again</div><div class='del'>-	 * during the lowlevel dpms routines around a couple of the</div><div class='del'>-	 * operations. It does not look trivial nor desirable to move</div><div class='del'>-	 * that locking higher. So instead we leave a window for the</div><div class='del'>-	 * submission of further commands on the fb before we can actually</div><div class='del'>-	 * disable it. This race with userspace exists anyway, and we can</div><div class='del'>-	 * only rely on the pipe being disabled by userspace after it</div><div class='del'>-	 * receives the hotplug notification and has flushed any pending</div><div class='del'>-	 * batches.</div><div class='del'>-	 */</div><div class='del'>-	if (crtc-&gt;fb) {</div><div class='del'>-		mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-		intel_finish_fb(crtc-&gt;fb);</div><div class='del'>-		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	}</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> </div><div class='ctx'> 	crtc_funcs-&gt;dpms(crtc, DRM_MODE_DPMS_OFF);</div><div class='add'>+	dev_priv-&gt;display.off(crtc);</div><div class='add'>+</div><div class='ctx'> 	assert_plane_disabled(dev-&gt;dev_private, to_intel_crtc(crtc)-&gt;plane);</div><div class='ctx'> 	assert_pipe_disabled(dev-&gt;dev_private, to_intel_crtc(crtc)-&gt;pipe);</div><div class='ctx'> </div><div class='hunk'>@@ -3448,8 +3379,7 @@ void intel_encoder_commit(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_encoder_helper_funcs *encoder_funcs = encoder-&gt;helper_private;</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='del'>-	struct intel_encoder *intel_encoder = to_intel_encoder(encoder);</div><div class='del'>-	struct intel_crtc *intel_crtc = to_intel_crtc(intel_encoder-&gt;base.crtc);</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder-&gt;crtc);</div><div class='ctx'> </div><div class='ctx'> 	/* lvds has its own version of commit see intel_lvds_commit */</div><div class='ctx'> 	encoder_funcs-&gt;dpms(encoder, DRM_MODE_DPMS_ON);</div><div class='hunk'>@@ -3487,6 +3417,11 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int valleyview_get_display_clock_speed(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	return 400000; /* FIXME */</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int i945_get_display_clock_speed(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	return 400000;</div><div class='hunk'>@@ -3584,1342 +3519,6 @@ ironlake_compute_m_n(int bits_per_pixel, int nlanes, int pixel_clock,</div><div class='ctx'> 	fdi_reduce_ratio(&amp;m_n-&gt;link_m, &amp;m_n-&gt;link_n);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-struct intel_watermark_params {</div><div class='del'>-	unsigned long fifo_size;</div><div class='del'>-	unsigned long max_wm;</div><div class='del'>-	unsigned long default_wm;</div><div class='del'>-	unsigned long guard_size;</div><div class='del'>-	unsigned long cacheline_size;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Pineview has different values for various configs */</div><div class='del'>-static const struct intel_watermark_params pineview_display_wm = {</div><div class='del'>-	PINEVIEW_DISPLAY_FIFO,</div><div class='del'>-	PINEVIEW_MAX_WM,</div><div class='del'>-	PINEVIEW_DFT_WM,</div><div class='del'>-	PINEVIEW_GUARD_WM,</div><div class='del'>-	PINEVIEW_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params pineview_display_hplloff_wm = {</div><div class='del'>-	PINEVIEW_DISPLAY_FIFO,</div><div class='del'>-	PINEVIEW_MAX_WM,</div><div class='del'>-	PINEVIEW_DFT_HPLLOFF_WM,</div><div class='del'>-	PINEVIEW_GUARD_WM,</div><div class='del'>-	PINEVIEW_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params pineview_cursor_wm = {</div><div class='del'>-	PINEVIEW_CURSOR_FIFO,</div><div class='del'>-	PINEVIEW_CURSOR_MAX_WM,</div><div class='del'>-	PINEVIEW_CURSOR_DFT_WM,</div><div class='del'>-	PINEVIEW_CURSOR_GUARD_WM,</div><div class='del'>-	PINEVIEW_FIFO_LINE_SIZE,</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params pineview_cursor_hplloff_wm = {</div><div class='del'>-	PINEVIEW_CURSOR_FIFO,</div><div class='del'>-	PINEVIEW_CURSOR_MAX_WM,</div><div class='del'>-	PINEVIEW_CURSOR_DFT_WM,</div><div class='del'>-	PINEVIEW_CURSOR_GUARD_WM,</div><div class='del'>-	PINEVIEW_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params g4x_wm_info = {</div><div class='del'>-	G4X_FIFO_SIZE,</div><div class='del'>-	G4X_MAX_WM,</div><div class='del'>-	G4X_MAX_WM,</div><div class='del'>-	2,</div><div class='del'>-	G4X_FIFO_LINE_SIZE,</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params g4x_cursor_wm_info = {</div><div class='del'>-	I965_CURSOR_FIFO,</div><div class='del'>-	I965_CURSOR_MAX_WM,</div><div class='del'>-	I965_CURSOR_DFT_WM,</div><div class='del'>-	2,</div><div class='del'>-	G4X_FIFO_LINE_SIZE,</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params i965_cursor_wm_info = {</div><div class='del'>-	I965_CURSOR_FIFO,</div><div class='del'>-	I965_CURSOR_MAX_WM,</div><div class='del'>-	I965_CURSOR_DFT_WM,</div><div class='del'>-	2,</div><div class='del'>-	I915_FIFO_LINE_SIZE,</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params i945_wm_info = {</div><div class='del'>-	I945_FIFO_SIZE,</div><div class='del'>-	I915_MAX_WM,</div><div class='del'>-	1,</div><div class='del'>-	2,</div><div class='del'>-	I915_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params i915_wm_info = {</div><div class='del'>-	I915_FIFO_SIZE,</div><div class='del'>-	I915_MAX_WM,</div><div class='del'>-	1,</div><div class='del'>-	2,</div><div class='del'>-	I915_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params i855_wm_info = {</div><div class='del'>-	I855GM_FIFO_SIZE,</div><div class='del'>-	I915_MAX_WM,</div><div class='del'>-	1,</div><div class='del'>-	2,</div><div class='del'>-	I830_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params i830_wm_info = {</div><div class='del'>-	I830_FIFO_SIZE,</div><div class='del'>-	I915_MAX_WM,</div><div class='del'>-	1,</div><div class='del'>-	2,</div><div class='del'>-	I830_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct intel_watermark_params ironlake_display_wm_info = {</div><div class='del'>-	ILK_DISPLAY_FIFO,</div><div class='del'>-	ILK_DISPLAY_MAXWM,</div><div class='del'>-	ILK_DISPLAY_DFTWM,</div><div class='del'>-	2,</div><div class='del'>-	ILK_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params ironlake_cursor_wm_info = {</div><div class='del'>-	ILK_CURSOR_FIFO,</div><div class='del'>-	ILK_CURSOR_MAXWM,</div><div class='del'>-	ILK_CURSOR_DFTWM,</div><div class='del'>-	2,</div><div class='del'>-	ILK_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params ironlake_display_srwm_info = {</div><div class='del'>-	ILK_DISPLAY_SR_FIFO,</div><div class='del'>-	ILK_DISPLAY_MAX_SRWM,</div><div class='del'>-	ILK_DISPLAY_DFT_SRWM,</div><div class='del'>-	2,</div><div class='del'>-	ILK_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params ironlake_cursor_srwm_info = {</div><div class='del'>-	ILK_CURSOR_SR_FIFO,</div><div class='del'>-	ILK_CURSOR_MAX_SRWM,</div><div class='del'>-	ILK_CURSOR_DFT_SRWM,</div><div class='del'>-	2,</div><div class='del'>-	ILK_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct intel_watermark_params sandybridge_display_wm_info = {</div><div class='del'>-	SNB_DISPLAY_FIFO,</div><div class='del'>-	SNB_DISPLAY_MAXWM,</div><div class='del'>-	SNB_DISPLAY_DFTWM,</div><div class='del'>-	2,</div><div class='del'>-	SNB_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params sandybridge_cursor_wm_info = {</div><div class='del'>-	SNB_CURSOR_FIFO,</div><div class='del'>-	SNB_CURSOR_MAXWM,</div><div class='del'>-	SNB_CURSOR_DFTWM,</div><div class='del'>-	2,</div><div class='del'>-	SNB_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params sandybridge_display_srwm_info = {</div><div class='del'>-	SNB_DISPLAY_SR_FIFO,</div><div class='del'>-	SNB_DISPLAY_MAX_SRWM,</div><div class='del'>-	SNB_DISPLAY_DFT_SRWM,</div><div class='del'>-	2,</div><div class='del'>-	SNB_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-static const struct intel_watermark_params sandybridge_cursor_srwm_info = {</div><div class='del'>-	SNB_CURSOR_SR_FIFO,</div><div class='del'>-	SNB_CURSOR_MAX_SRWM,</div><div class='del'>-	SNB_CURSOR_DFT_SRWM,</div><div class='del'>-	2,</div><div class='del'>-	SNB_FIFO_LINE_SIZE</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * intel_calculate_wm - calculate watermark level</div><div class='del'>- * @clock_in_khz: pixel clock</div><div class='del'>- * @wm: chip FIFO params</div><div class='del'>- * @pixel_size: display pixel size</div><div class='del'>- * @latency_ns: memory latency for the platform</div><div class='del'>- *</div><div class='del'>- * Calculate the watermark level (the level at which the display plane will</div><div class='del'>- * start fetching from memory again).  Each chip has a different display</div><div class='del'>- * FIFO size and allocation, so the caller needs to figure that out and pass</div><div class='del'>- * in the correct intel_watermark_params structure.</div><div class='del'>- *</div><div class='del'>- * As the pixel clock runs, the FIFO will be drained at a rate that depends</div><div class='del'>- * on the pixel size.  When it reaches the watermark level, it'll start</div><div class='del'>- * fetching FIFO line sized based chunks from memory until the FIFO fills</div><div class='del'>- * past the watermark point.  If the FIFO drains completely, a FIFO underrun</div><div class='del'>- * will occur, and a display engine hang could result.</div><div class='del'>- */</div><div class='del'>-static unsigned long intel_calculate_wm(unsigned long clock_in_khz,</div><div class='del'>-					const struct intel_watermark_params *wm,</div><div class='del'>-					int fifo_size,</div><div class='del'>-					int pixel_size,</div><div class='del'>-					unsigned long latency_ns)</div><div class='del'>-{</div><div class='del'>-	long entries_required, wm_size;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Note: we need to make sure we don't overflow for various clock &amp;</div><div class='del'>-	 * latency values.</div><div class='del'>-	 * clocks go from a few thousand to several hundred thousand.</div><div class='del'>-	 * latency is usually a few thousand</div><div class='del'>-	 */</div><div class='del'>-	entries_required = ((clock_in_khz / 1000) * pixel_size * latency_ns) /</div><div class='del'>-		1000;</div><div class='del'>-	entries_required = DIV_ROUND_UP(entries_required, wm-&gt;cacheline_size);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("FIFO entries required for mode: %ld\n", entries_required);</div><div class='del'>-</div><div class='del'>-	wm_size = fifo_size - (entries_required + wm-&gt;guard_size);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("FIFO watermark level: %ld\n", wm_size);</div><div class='del'>-</div><div class='del'>-	/* Don't promote wm_size to unsigned... */</div><div class='del'>-	if (wm_size &gt; (long)wm-&gt;max_wm)</div><div class='del'>-		wm_size = wm-&gt;max_wm;</div><div class='del'>-	if (wm_size &lt;= 0)</div><div class='del'>-		wm_size = wm-&gt;default_wm;</div><div class='del'>-	return wm_size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct cxsr_latency {</div><div class='del'>-	int is_desktop;</div><div class='del'>-	int is_ddr3;</div><div class='del'>-	unsigned long fsb_freq;</div><div class='del'>-	unsigned long mem_freq;</div><div class='del'>-	unsigned long display_sr;</div><div class='del'>-	unsigned long display_hpll_disable;</div><div class='del'>-	unsigned long cursor_sr;</div><div class='del'>-	unsigned long cursor_hpll_disable;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct cxsr_latency cxsr_latency_table[] = {</div><div class='del'>-	{1, 0, 800, 400, 3382, 33382, 3983, 33983},    /* DDR2-400 SC */</div><div class='del'>-	{1, 0, 800, 667, 3354, 33354, 3807, 33807},    /* DDR2-667 SC */</div><div class='del'>-	{1, 0, 800, 800, 3347, 33347, 3763, 33763},    /* DDR2-800 SC */</div><div class='del'>-	{1, 1, 800, 667, 6420, 36420, 6873, 36873},    /* DDR3-667 SC */</div><div class='del'>-	{1, 1, 800, 800, 5902, 35902, 6318, 36318},    /* DDR3-800 SC */</div><div class='del'>-</div><div class='del'>-	{1, 0, 667, 400, 3400, 33400, 4021, 34021},    /* DDR2-400 SC */</div><div class='del'>-	{1, 0, 667, 667, 3372, 33372, 3845, 33845},    /* DDR2-667 SC */</div><div class='del'>-	{1, 0, 667, 800, 3386, 33386, 3822, 33822},    /* DDR2-800 SC */</div><div class='del'>-	{1, 1, 667, 667, 6438, 36438, 6911, 36911},    /* DDR3-667 SC */</div><div class='del'>-	{1, 1, 667, 800, 5941, 35941, 6377, 36377},    /* DDR3-800 SC */</div><div class='del'>-</div><div class='del'>-	{1, 0, 400, 400, 3472, 33472, 4173, 34173},    /* DDR2-400 SC */</div><div class='del'>-	{1, 0, 400, 667, 3443, 33443, 3996, 33996},    /* DDR2-667 SC */</div><div class='del'>-	{1, 0, 400, 800, 3430, 33430, 3946, 33946},    /* DDR2-800 SC */</div><div class='del'>-	{1, 1, 400, 667, 6509, 36509, 7062, 37062},    /* DDR3-667 SC */</div><div class='del'>-	{1, 1, 400, 800, 5985, 35985, 6501, 36501},    /* DDR3-800 SC */</div><div class='del'>-</div><div class='del'>-	{0, 0, 800, 400, 3438, 33438, 4065, 34065},    /* DDR2-400 SC */</div><div class='del'>-	{0, 0, 800, 667, 3410, 33410, 3889, 33889},    /* DDR2-667 SC */</div><div class='del'>-	{0, 0, 800, 800, 3403, 33403, 3845, 33845},    /* DDR2-800 SC */</div><div class='del'>-	{0, 1, 800, 667, 6476, 36476, 6955, 36955},    /* DDR3-667 SC */</div><div class='del'>-	{0, 1, 800, 800, 5958, 35958, 6400, 36400},    /* DDR3-800 SC */</div><div class='del'>-</div><div class='del'>-	{0, 0, 667, 400, 3456, 33456, 4103, 34106},    /* DDR2-400 SC */</div><div class='del'>-	{0, 0, 667, 667, 3428, 33428, 3927, 33927},    /* DDR2-667 SC */</div><div class='del'>-	{0, 0, 667, 800, 3443, 33443, 3905, 33905},    /* DDR2-800 SC */</div><div class='del'>-	{0, 1, 667, 667, 6494, 36494, 6993, 36993},    /* DDR3-667 SC */</div><div class='del'>-	{0, 1, 667, 800, 5998, 35998, 6460, 36460},    /* DDR3-800 SC */</div><div class='del'>-</div><div class='del'>-	{0, 0, 400, 400, 3528, 33528, 4255, 34255},    /* DDR2-400 SC */</div><div class='del'>-	{0, 0, 400, 667, 3500, 33500, 4079, 34079},    /* DDR2-667 SC */</div><div class='del'>-	{0, 0, 400, 800, 3487, 33487, 4029, 34029},    /* DDR2-800 SC */</div><div class='del'>-	{0, 1, 400, 667, 6566, 36566, 7145, 37145},    /* DDR3-667 SC */</div><div class='del'>-	{0, 1, 400, 800, 6042, 36042, 6584, 36584},    /* DDR3-800 SC */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct cxsr_latency *intel_get_cxsr_latency(int is_desktop,</div><div class='del'>-							 int is_ddr3,</div><div class='del'>-							 int fsb,</div><div class='del'>-							 int mem)</div><div class='del'>-{</div><div class='del'>-	const struct cxsr_latency *latency;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (fsb == 0 || mem == 0)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(cxsr_latency_table); i++) {</div><div class='del'>-		latency = &amp;cxsr_latency_table[i];</div><div class='del'>-		if (is_desktop == latency-&gt;is_desktop &amp;&amp;</div><div class='del'>-		    is_ddr3 == latency-&gt;is_ddr3 &amp;&amp;</div><div class='del'>-		    fsb == latency-&gt;fsb_freq &amp;&amp; mem == latency-&gt;mem_freq)</div><div class='del'>-			return latency;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("Unknown FSB/MEM found, disable CxSR\n");</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pineview_disable_cxsr(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	/* deactivate cxsr */</div><div class='del'>-	I915_WRITE(DSPFW3, I915_READ(DSPFW3) &amp; ~PINEVIEW_SELF_REFRESH_EN);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Latency for FIFO fetches is dependent on several factors:</div><div class='del'>- *   - memory configuration (speed, channels)</div><div class='del'>- *   - chipset</div><div class='del'>- *   - current MCH state</div><div class='del'>- * It can be fairly high in some situations, so here we assume a fairly</div><div class='del'>- * pessimal value.  It's a tradeoff between extra memory fetches (if we</div><div class='del'>- * set this value too high, the FIFO will fetch frequently to stay full)</div><div class='del'>- * and power consumption (set it too low to save power and we might see</div><div class='del'>- * FIFO underruns and display "flicker").</div><div class='del'>- *</div><div class='del'>- * A value of 5us seems to be a good balance; safe for very low end</div><div class='del'>- * platforms but not overly aggressive on lower latency configs.</div><div class='del'>- */</div><div class='del'>-static const int latency_ns = 5000;</div><div class='del'>-</div><div class='del'>-static int i9xx_get_fifo_size(struct drm_device *dev, int plane)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t dsparb = I915_READ(DSPARB);</div><div class='del'>-	int size;</div><div class='del'>-</div><div class='del'>-	size = dsparb &amp; 0x7f;</div><div class='del'>-	if (plane)</div><div class='del'>-		size = ((dsparb &gt;&gt; DSPARB_CSTART_SHIFT) &amp; 0x7f) - size;</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,</div><div class='del'>-		      plane ? "B" : "A", size);</div><div class='del'>-</div><div class='del'>-	return size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int i85x_get_fifo_size(struct drm_device *dev, int plane)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t dsparb = I915_READ(DSPARB);</div><div class='del'>-	int size;</div><div class='del'>-</div><div class='del'>-	size = dsparb &amp; 0x1ff;</div><div class='del'>-	if (plane)</div><div class='del'>-		size = ((dsparb &gt;&gt; DSPARB_BEND_SHIFT) &amp; 0x1ff) - size;</div><div class='del'>-	size &gt;&gt;= 1; /* Convert to cachelines */</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,</div><div class='del'>-		      plane ? "B" : "A", size);</div><div class='del'>-</div><div class='del'>-	return size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int i845_get_fifo_size(struct drm_device *dev, int plane)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t dsparb = I915_READ(DSPARB);</div><div class='del'>-	int size;</div><div class='del'>-</div><div class='del'>-	size = dsparb &amp; 0x7f;</div><div class='del'>-	size &gt;&gt;= 2; /* Convert to cachelines */</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,</div><div class='del'>-		      plane ? "B" : "A",</div><div class='del'>-		      size);</div><div class='del'>-</div><div class='del'>-	return size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int i830_get_fifo_size(struct drm_device *dev, int plane)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t dsparb = I915_READ(DSPARB);</div><div class='del'>-	int size;</div><div class='del'>-</div><div class='del'>-	size = dsparb &amp; 0x7f;</div><div class='del'>-	size &gt;&gt;= 1; /* Convert to cachelines */</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,</div><div class='del'>-		      plane ? "B" : "A", size);</div><div class='del'>-</div><div class='del'>-	return size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct drm_crtc *single_enabled_crtc(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_crtc *crtc, *enabled = NULL;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(crtc, &amp;dev-&gt;mode_config.crtc_list, head) {</div><div class='del'>-		if (crtc-&gt;enabled &amp;&amp; crtc-&gt;fb) {</div><div class='del'>-			if (enabled)</div><div class='del'>-				return NULL;</div><div class='del'>-			enabled = crtc;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return enabled;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pineview_update_wm(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_crtc *crtc;</div><div class='del'>-	const struct cxsr_latency *latency;</div><div class='del'>-	u32 reg;</div><div class='del'>-	unsigned long wm;</div><div class='del'>-</div><div class='del'>-	latency = intel_get_cxsr_latency(IS_PINEVIEW_G(dev), dev_priv-&gt;is_ddr3,</div><div class='del'>-					 dev_priv-&gt;fsb_freq, dev_priv-&gt;mem_freq);</div><div class='del'>-	if (!latency) {</div><div class='del'>-		DRM_DEBUG_KMS("Unknown FSB/MEM found, disable CxSR\n");</div><div class='del'>-		pineview_disable_cxsr(dev);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	crtc = single_enabled_crtc(dev);</div><div class='del'>-	if (crtc) {</div><div class='del'>-		int clock = crtc-&gt;mode.clock;</div><div class='del'>-		int pixel_size = crtc-&gt;fb-&gt;bits_per_pixel / 8;</div><div class='del'>-</div><div class='del'>-		/* Display SR */</div><div class='del'>-		wm = intel_calculate_wm(clock, &amp;pineview_display_wm,</div><div class='del'>-					pineview_display_wm.fifo_size,</div><div class='del'>-					pixel_size, latency-&gt;display_sr);</div><div class='del'>-		reg = I915_READ(DSPFW1);</div><div class='del'>-		reg &amp;= ~DSPFW_SR_MASK;</div><div class='del'>-		reg |= wm &lt;&lt; DSPFW_SR_SHIFT;</div><div class='del'>-		I915_WRITE(DSPFW1, reg);</div><div class='del'>-		DRM_DEBUG_KMS("DSPFW1 register is %x\n", reg);</div><div class='del'>-</div><div class='del'>-		/* cursor SR */</div><div class='del'>-		wm = intel_calculate_wm(clock, &amp;pineview_cursor_wm,</div><div class='del'>-					pineview_display_wm.fifo_size,</div><div class='del'>-					pixel_size, latency-&gt;cursor_sr);</div><div class='del'>-		reg = I915_READ(DSPFW3);</div><div class='del'>-		reg &amp;= ~DSPFW_CURSOR_SR_MASK;</div><div class='del'>-		reg |= (wm &amp; 0x3f) &lt;&lt; DSPFW_CURSOR_SR_SHIFT;</div><div class='del'>-		I915_WRITE(DSPFW3, reg);</div><div class='del'>-</div><div class='del'>-		/* Display HPLL off SR */</div><div class='del'>-		wm = intel_calculate_wm(clock, &amp;pineview_display_hplloff_wm,</div><div class='del'>-					pineview_display_hplloff_wm.fifo_size,</div><div class='del'>-					pixel_size, latency-&gt;display_hpll_disable);</div><div class='del'>-		reg = I915_READ(DSPFW3);</div><div class='del'>-		reg &amp;= ~DSPFW_HPLL_SR_MASK;</div><div class='del'>-		reg |= wm &amp; DSPFW_HPLL_SR_MASK;</div><div class='del'>-		I915_WRITE(DSPFW3, reg);</div><div class='del'>-</div><div class='del'>-		/* cursor HPLL off SR */</div><div class='del'>-		wm = intel_calculate_wm(clock, &amp;pineview_cursor_hplloff_wm,</div><div class='del'>-					pineview_display_hplloff_wm.fifo_size,</div><div class='del'>-					pixel_size, latency-&gt;cursor_hpll_disable);</div><div class='del'>-		reg = I915_READ(DSPFW3);</div><div class='del'>-		reg &amp;= ~DSPFW_HPLL_CURSOR_MASK;</div><div class='del'>-		reg |= (wm &amp; 0x3f) &lt;&lt; DSPFW_HPLL_CURSOR_SHIFT;</div><div class='del'>-		I915_WRITE(DSPFW3, reg);</div><div class='del'>-		DRM_DEBUG_KMS("DSPFW3 register is %x\n", reg);</div><div class='del'>-</div><div class='del'>-		/* activate cxsr */</div><div class='del'>-		I915_WRITE(DSPFW3,</div><div class='del'>-			   I915_READ(DSPFW3) | PINEVIEW_SELF_REFRESH_EN);</div><div class='del'>-		DRM_DEBUG_KMS("Self-refresh is enabled\n");</div><div class='del'>-	} else {</div><div class='del'>-		pineview_disable_cxsr(dev);</div><div class='del'>-		DRM_DEBUG_KMS("Self-refresh is disabled\n");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool g4x_compute_wm0(struct drm_device *dev,</div><div class='del'>-			    int plane,</div><div class='del'>-			    const struct intel_watermark_params *display,</div><div class='del'>-			    int display_latency_ns,</div><div class='del'>-			    const struct intel_watermark_params *cursor,</div><div class='del'>-			    int cursor_latency_ns,</div><div class='del'>-			    int *plane_wm,</div><div class='del'>-			    int *cursor_wm)</div><div class='del'>-{</div><div class='del'>-	struct drm_crtc *crtc;</div><div class='del'>-	int htotal, hdisplay, clock, pixel_size;</div><div class='del'>-	int line_time_us, line_count;</div><div class='del'>-	int entries, tlb_miss;</div><div class='del'>-</div><div class='del'>-	crtc = intel_get_crtc_for_plane(dev, plane);</div><div class='del'>-	if (crtc-&gt;fb == NULL || !crtc-&gt;enabled) {</div><div class='del'>-		*cursor_wm = cursor-&gt;guard_size;</div><div class='del'>-		*plane_wm = display-&gt;guard_size;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	htotal = crtc-&gt;mode.htotal;</div><div class='del'>-	hdisplay = crtc-&gt;mode.hdisplay;</div><div class='del'>-	clock = crtc-&gt;mode.clock;</div><div class='del'>-	pixel_size = crtc-&gt;fb-&gt;bits_per_pixel / 8;</div><div class='del'>-</div><div class='del'>-	/* Use the small buffer method to calculate plane watermark */</div><div class='del'>-	entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000;</div><div class='del'>-	tlb_miss = display-&gt;fifo_size*display-&gt;cacheline_size - hdisplay * 8;</div><div class='del'>-	if (tlb_miss &gt; 0)</div><div class='del'>-		entries += tlb_miss;</div><div class='del'>-	entries = DIV_ROUND_UP(entries, display-&gt;cacheline_size);</div><div class='del'>-	*plane_wm = entries + display-&gt;guard_size;</div><div class='del'>-	if (*plane_wm &gt; (int)display-&gt;max_wm)</div><div class='del'>-		*plane_wm = display-&gt;max_wm;</div><div class='del'>-</div><div class='del'>-	/* Use the large buffer method to calculate cursor watermark */</div><div class='del'>-	line_time_us = ((htotal * 1000) / clock);</div><div class='del'>-	line_count = (cursor_latency_ns / line_time_us + 1000) / 1000;</div><div class='del'>-	entries = line_count * 64 * pixel_size;</div><div class='del'>-	tlb_miss = cursor-&gt;fifo_size*cursor-&gt;cacheline_size - hdisplay * 8;</div><div class='del'>-	if (tlb_miss &gt; 0)</div><div class='del'>-		entries += tlb_miss;</div><div class='del'>-	entries = DIV_ROUND_UP(entries, cursor-&gt;cacheline_size);</div><div class='del'>-	*cursor_wm = entries + cursor-&gt;guard_size;</div><div class='del'>-	if (*cursor_wm &gt; (int)cursor-&gt;max_wm)</div><div class='del'>-		*cursor_wm = (int)cursor-&gt;max_wm;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Check the wm result.</div><div class='del'>- *</div><div class='del'>- * If any calculated watermark values is larger than the maximum value that</div><div class='del'>- * can be programmed into the associated watermark register, that watermark</div><div class='del'>- * must be disabled.</div><div class='del'>- */</div><div class='del'>-static bool g4x_check_srwm(struct drm_device *dev,</div><div class='del'>-			   int display_wm, int cursor_wm,</div><div class='del'>-			   const struct intel_watermark_params *display,</div><div class='del'>-			   const struct intel_watermark_params *cursor)</div><div class='del'>-{</div><div class='del'>-	DRM_DEBUG_KMS("SR watermark: display plane %d, cursor %d\n",</div><div class='del'>-		      display_wm, cursor_wm);</div><div class='del'>-</div><div class='del'>-	if (display_wm &gt; display-&gt;max_wm) {</div><div class='del'>-		DRM_DEBUG_KMS("display watermark is too large(%d/%ld), disabling\n",</div><div class='del'>-			      display_wm, display-&gt;max_wm);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cursor_wm &gt; cursor-&gt;max_wm) {</div><div class='del'>-		DRM_DEBUG_KMS("cursor watermark is too large(%d/%ld), disabling\n",</div><div class='del'>-			      cursor_wm, cursor-&gt;max_wm);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!(display_wm || cursor_wm)) {</div><div class='del'>-		DRM_DEBUG_KMS("SR latency is 0, disabling\n");</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool g4x_compute_srwm(struct drm_device *dev,</div><div class='del'>-			     int plane,</div><div class='del'>-			     int latency_ns,</div><div class='del'>-			     const struct intel_watermark_params *display,</div><div class='del'>-			     const struct intel_watermark_params *cursor,</div><div class='del'>-			     int *display_wm, int *cursor_wm)</div><div class='del'>-{</div><div class='del'>-	struct drm_crtc *crtc;</div><div class='del'>-	int hdisplay, htotal, pixel_size, clock;</div><div class='del'>-	unsigned long line_time_us;</div><div class='del'>-	int line_count, line_size;</div><div class='del'>-	int small, large;</div><div class='del'>-	int entries;</div><div class='del'>-</div><div class='del'>-	if (!latency_ns) {</div><div class='del'>-		*display_wm = *cursor_wm = 0;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	crtc = intel_get_crtc_for_plane(dev, plane);</div><div class='del'>-	hdisplay = crtc-&gt;mode.hdisplay;</div><div class='del'>-	htotal = crtc-&gt;mode.htotal;</div><div class='del'>-	clock = crtc-&gt;mode.clock;</div><div class='del'>-	pixel_size = crtc-&gt;fb-&gt;bits_per_pixel / 8;</div><div class='del'>-</div><div class='del'>-	line_time_us = (htotal * 1000) / clock;</div><div class='del'>-	line_count = (latency_ns / line_time_us + 1000) / 1000;</div><div class='del'>-	line_size = hdisplay * pixel_size;</div><div class='del'>-</div><div class='del'>-	/* Use the minimum of the small and large buffer method for primary */</div><div class='del'>-	small = ((clock * pixel_size / 1000) * latency_ns) / 1000;</div><div class='del'>-	large = line_count * line_size;</div><div class='del'>-</div><div class='del'>-	entries = DIV_ROUND_UP(min(small, large), display-&gt;cacheline_size);</div><div class='del'>-	*display_wm = entries + display-&gt;guard_size;</div><div class='del'>-</div><div class='del'>-	/* calculate the self-refresh watermark for display cursor */</div><div class='del'>-	entries = line_count * pixel_size * 64;</div><div class='del'>-	entries = DIV_ROUND_UP(entries, cursor-&gt;cacheline_size);</div><div class='del'>-	*cursor_wm = entries + cursor-&gt;guard_size;</div><div class='del'>-</div><div class='del'>-	return g4x_check_srwm(dev,</div><div class='del'>-			      *display_wm, *cursor_wm,</div><div class='del'>-			      display, cursor);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define single_plane_enabled(mask) is_power_of_2(mask)</div><div class='del'>-</div><div class='del'>-static void g4x_update_wm(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	static const int sr_latency_ns = 12000;</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int planea_wm, planeb_wm, cursora_wm, cursorb_wm;</div><div class='del'>-	int plane_sr, cursor_sr;</div><div class='del'>-	unsigned int enabled = 0;</div><div class='del'>-</div><div class='del'>-	if (g4x_compute_wm0(dev, 0,</div><div class='del'>-			    &amp;g4x_wm_info, latency_ns,</div><div class='del'>-			    &amp;g4x_cursor_wm_info, latency_ns,</div><div class='del'>-			    &amp;planea_wm, &amp;cursora_wm))</div><div class='del'>-		enabled |= 1;</div><div class='del'>-</div><div class='del'>-	if (g4x_compute_wm0(dev, 1,</div><div class='del'>-			    &amp;g4x_wm_info, latency_ns,</div><div class='del'>-			    &amp;g4x_cursor_wm_info, latency_ns,</div><div class='del'>-			    &amp;planeb_wm, &amp;cursorb_wm))</div><div class='del'>-		enabled |= 2;</div><div class='del'>-</div><div class='del'>-	plane_sr = cursor_sr = 0;</div><div class='del'>-	if (single_plane_enabled(enabled) &amp;&amp;</div><div class='del'>-	    g4x_compute_srwm(dev, ffs(enabled) - 1,</div><div class='del'>-			     sr_latency_ns,</div><div class='del'>-			     &amp;g4x_wm_info,</div><div class='del'>-			     &amp;g4x_cursor_wm_info,</div><div class='del'>-			     &amp;plane_sr, &amp;cursor_sr))</div><div class='del'>-		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);</div><div class='del'>-	else</div><div class='del'>-		I915_WRITE(FW_BLC_SELF,</div><div class='del'>-			   I915_READ(FW_BLC_SELF) &amp; ~FW_BLC_SELF_EN);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("Setting FIFO watermarks - A: plane=%d, cursor=%d, B: plane=%d, cursor=%d, SR: plane=%d, cursor=%d\n",</div><div class='del'>-		      planea_wm, cursora_wm,</div><div class='del'>-		      planeb_wm, cursorb_wm,</div><div class='del'>-		      plane_sr, cursor_sr);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(DSPFW1,</div><div class='del'>-		   (plane_sr &lt;&lt; DSPFW_SR_SHIFT) |</div><div class='del'>-		   (cursorb_wm &lt;&lt; DSPFW_CURSORB_SHIFT) |</div><div class='del'>-		   (planeb_wm &lt;&lt; DSPFW_PLANEB_SHIFT) |</div><div class='del'>-		   planea_wm);</div><div class='del'>-	I915_WRITE(DSPFW2,</div><div class='del'>-		   (I915_READ(DSPFW2) &amp; DSPFW_CURSORA_MASK) |</div><div class='del'>-		   (cursora_wm &lt;&lt; DSPFW_CURSORA_SHIFT));</div><div class='del'>-	/* HPLL off in SR has some issues on G4x... disable it */</div><div class='del'>-	I915_WRITE(DSPFW3,</div><div class='del'>-		   (I915_READ(DSPFW3) &amp; ~DSPFW_HPLL_SR_EN) |</div><div class='del'>-		   (cursor_sr &lt;&lt; DSPFW_CURSOR_SR_SHIFT));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void i965_update_wm(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_crtc *crtc;</div><div class='del'>-	int srwm = 1;</div><div class='del'>-	int cursor_sr = 16;</div><div class='del'>-</div><div class='del'>-	/* Calc sr entries for one plane configs */</div><div class='del'>-	crtc = single_enabled_crtc(dev);</div><div class='del'>-	if (crtc) {</div><div class='del'>-		/* self-refresh has much higher latency */</div><div class='del'>-		static const int sr_latency_ns = 12000;</div><div class='del'>-		int clock = crtc-&gt;mode.clock;</div><div class='del'>-		int htotal = crtc-&gt;mode.htotal;</div><div class='del'>-		int hdisplay = crtc-&gt;mode.hdisplay;</div><div class='del'>-		int pixel_size = crtc-&gt;fb-&gt;bits_per_pixel / 8;</div><div class='del'>-		unsigned long line_time_us;</div><div class='del'>-		int entries;</div><div class='del'>-</div><div class='del'>-		line_time_us = ((htotal * 1000) / clock);</div><div class='del'>-</div><div class='del'>-		/* Use ns/us then divide to preserve precision */</div><div class='del'>-		entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *</div><div class='del'>-			pixel_size * hdisplay;</div><div class='del'>-		entries = DIV_ROUND_UP(entries, I915_FIFO_LINE_SIZE);</div><div class='del'>-		srwm = I965_FIFO_SIZE - entries;</div><div class='del'>-		if (srwm &lt; 0)</div><div class='del'>-			srwm = 1;</div><div class='del'>-		srwm &amp;= 0x1ff;</div><div class='del'>-		DRM_DEBUG_KMS("self-refresh entries: %d, wm: %d\n",</div><div class='del'>-			      entries, srwm);</div><div class='del'>-</div><div class='del'>-		entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *</div><div class='del'>-			pixel_size * 64;</div><div class='del'>-		entries = DIV_ROUND_UP(entries,</div><div class='del'>-					  i965_cursor_wm_info.cacheline_size);</div><div class='del'>-		cursor_sr = i965_cursor_wm_info.fifo_size -</div><div class='del'>-			(entries + i965_cursor_wm_info.guard_size);</div><div class='del'>-</div><div class='del'>-		if (cursor_sr &gt; i965_cursor_wm_info.max_wm)</div><div class='del'>-			cursor_sr = i965_cursor_wm_info.max_wm;</div><div class='del'>-</div><div class='del'>-		DRM_DEBUG_KMS("self-refresh watermark: display plane %d "</div><div class='del'>-			      "cursor %d\n", srwm, cursor_sr);</div><div class='del'>-</div><div class='del'>-		if (IS_CRESTLINE(dev))</div><div class='del'>-			I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);</div><div class='del'>-	} else {</div><div class='del'>-		/* Turn off self refresh if both pipes are enabled */</div><div class='del'>-		if (IS_CRESTLINE(dev))</div><div class='del'>-			I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)</div><div class='del'>-				   &amp; ~FW_BLC_SELF_EN);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n",</div><div class='del'>-		      srwm);</div><div class='del'>-</div><div class='del'>-	/* 965 has limitations... */</div><div class='del'>-	I915_WRITE(DSPFW1, (srwm &lt;&lt; DSPFW_SR_SHIFT) |</div><div class='del'>-		   (8 &lt;&lt; 16) | (8 &lt;&lt; 8) | (8 &lt;&lt; 0));</div><div class='del'>-	I915_WRITE(DSPFW2, (8 &lt;&lt; 8) | (8 &lt;&lt; 0));</div><div class='del'>-	/* update cursor SR watermark */</div><div class='del'>-	I915_WRITE(DSPFW3, (cursor_sr &lt;&lt; DSPFW_CURSOR_SR_SHIFT));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void i9xx_update_wm(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	const struct intel_watermark_params *wm_info;</div><div class='del'>-	uint32_t fwater_lo;</div><div class='del'>-	uint32_t fwater_hi;</div><div class='del'>-	int cwm, srwm = 1;</div><div class='del'>-	int fifo_size;</div><div class='del'>-	int planea_wm, planeb_wm;</div><div class='del'>-	struct drm_crtc *crtc, *enabled = NULL;</div><div class='del'>-</div><div class='del'>-	if (IS_I945GM(dev))</div><div class='del'>-		wm_info = &amp;i945_wm_info;</div><div class='del'>-	else if (!IS_GEN2(dev))</div><div class='del'>-		wm_info = &amp;i915_wm_info;</div><div class='del'>-	else</div><div class='del'>-		wm_info = &amp;i855_wm_info;</div><div class='del'>-</div><div class='del'>-	fifo_size = dev_priv-&gt;display.get_fifo_size(dev, 0);</div><div class='del'>-	crtc = intel_get_crtc_for_plane(dev, 0);</div><div class='del'>-	if (crtc-&gt;enabled &amp;&amp; crtc-&gt;fb) {</div><div class='del'>-		planea_wm = intel_calculate_wm(crtc-&gt;mode.clock,</div><div class='del'>-					       wm_info, fifo_size,</div><div class='del'>-					       crtc-&gt;fb-&gt;bits_per_pixel / 8,</div><div class='del'>-					       latency_ns);</div><div class='del'>-		enabled = crtc;</div><div class='del'>-	} else</div><div class='del'>-		planea_wm = fifo_size - wm_info-&gt;guard_size;</div><div class='del'>-</div><div class='del'>-	fifo_size = dev_priv-&gt;display.get_fifo_size(dev, 1);</div><div class='del'>-	crtc = intel_get_crtc_for_plane(dev, 1);</div><div class='del'>-	if (crtc-&gt;enabled &amp;&amp; crtc-&gt;fb) {</div><div class='del'>-		planeb_wm = intel_calculate_wm(crtc-&gt;mode.clock,</div><div class='del'>-					       wm_info, fifo_size,</div><div class='del'>-					       crtc-&gt;fb-&gt;bits_per_pixel / 8,</div><div class='del'>-					       latency_ns);</div><div class='del'>-		if (enabled == NULL)</div><div class='del'>-			enabled = crtc;</div><div class='del'>-		else</div><div class='del'>-			enabled = NULL;</div><div class='del'>-	} else</div><div class='del'>-		planeb_wm = fifo_size - wm_info-&gt;guard_size;</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Overlay gets an aggressive default since video jitter is bad.</div><div class='del'>-	 */</div><div class='del'>-	cwm = 2;</div><div class='del'>-</div><div class='del'>-	/* Play safe and disable self-refresh before adjusting watermarks. */</div><div class='del'>-	if (IS_I945G(dev) || IS_I945GM(dev))</div><div class='del'>-		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN_MASK | 0);</div><div class='del'>-	else if (IS_I915GM(dev))</div><div class='del'>-		I915_WRITE(INSTPM, I915_READ(INSTPM) &amp; ~INSTPM_SELF_EN);</div><div class='del'>-</div><div class='del'>-	/* Calc sr entries for one plane configs */</div><div class='del'>-	if (HAS_FW_BLC(dev) &amp;&amp; enabled) {</div><div class='del'>-		/* self-refresh has much higher latency */</div><div class='del'>-		static const int sr_latency_ns = 6000;</div><div class='del'>-		int clock = enabled-&gt;mode.clock;</div><div class='del'>-		int htotal = enabled-&gt;mode.htotal;</div><div class='del'>-		int hdisplay = enabled-&gt;mode.hdisplay;</div><div class='del'>-		int pixel_size = enabled-&gt;fb-&gt;bits_per_pixel / 8;</div><div class='del'>-		unsigned long line_time_us;</div><div class='del'>-		int entries;</div><div class='del'>-</div><div class='del'>-		line_time_us = (htotal * 1000) / clock;</div><div class='del'>-</div><div class='del'>-		/* Use ns/us then divide to preserve precision */</div><div class='del'>-		entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *</div><div class='del'>-			pixel_size * hdisplay;</div><div class='del'>-		entries = DIV_ROUND_UP(entries, wm_info-&gt;cacheline_size);</div><div class='del'>-		DRM_DEBUG_KMS("self-refresh entries: %d\n", entries);</div><div class='del'>-		srwm = wm_info-&gt;fifo_size - entries;</div><div class='del'>-		if (srwm &lt; 0)</div><div class='del'>-			srwm = 1;</div><div class='del'>-</div><div class='del'>-		if (IS_I945G(dev) || IS_I945GM(dev))</div><div class='del'>-			I915_WRITE(FW_BLC_SELF,</div><div class='del'>-				   FW_BLC_SELF_FIFO_MASK | (srwm &amp; 0xff));</div><div class='del'>-		else if (IS_I915GM(dev))</div><div class='del'>-			I915_WRITE(FW_BLC_SELF, srwm &amp; 0x3f);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n",</div><div class='del'>-		      planea_wm, planeb_wm, cwm, srwm);</div><div class='del'>-</div><div class='del'>-	fwater_lo = ((planeb_wm &amp; 0x3f) &lt;&lt; 16) | (planea_wm &amp; 0x3f);</div><div class='del'>-	fwater_hi = (cwm &amp; 0x1f);</div><div class='del'>-</div><div class='del'>-	/* Set request length to 8 cachelines per fetch */</div><div class='del'>-	fwater_lo = fwater_lo | (1 &lt;&lt; 24) | (1 &lt;&lt; 8);</div><div class='del'>-	fwater_hi = fwater_hi | (1 &lt;&lt; 8);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(FW_BLC, fwater_lo);</div><div class='del'>-	I915_WRITE(FW_BLC2, fwater_hi);</div><div class='del'>-</div><div class='del'>-	if (HAS_FW_BLC(dev)) {</div><div class='del'>-		if (enabled) {</div><div class='del'>-			if (IS_I945G(dev) || IS_I945GM(dev))</div><div class='del'>-				I915_WRITE(FW_BLC_SELF,</div><div class='del'>-					   FW_BLC_SELF_EN_MASK | FW_BLC_SELF_EN);</div><div class='del'>-			else if (IS_I915GM(dev))</div><div class='del'>-				I915_WRITE(INSTPM, I915_READ(INSTPM) | INSTPM_SELF_EN);</div><div class='del'>-			DRM_DEBUG_KMS("memory self refresh enabled\n");</div><div class='del'>-		} else</div><div class='del'>-			DRM_DEBUG_KMS("memory self refresh disabled\n");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void i830_update_wm(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_crtc *crtc;</div><div class='del'>-	uint32_t fwater_lo;</div><div class='del'>-	int planea_wm;</div><div class='del'>-</div><div class='del'>-	crtc = single_enabled_crtc(dev);</div><div class='del'>-	if (crtc == NULL)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	planea_wm = intel_calculate_wm(crtc-&gt;mode.clock, &amp;i830_wm_info,</div><div class='del'>-				       dev_priv-&gt;display.get_fifo_size(dev, 0),</div><div class='del'>-				       crtc-&gt;fb-&gt;bits_per_pixel / 8,</div><div class='del'>-				       latency_ns);</div><div class='del'>-	fwater_lo = I915_READ(FW_BLC) &amp; ~0xfff;</div><div class='del'>-	fwater_lo |= (3&lt;&lt;8) | planea_wm;</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d\n", planea_wm);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(FW_BLC, fwater_lo);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define ILK_LP0_PLANE_LATENCY		700</div><div class='del'>-#define ILK_LP0_CURSOR_LATENCY		1300</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Check the wm result.</div><div class='del'>- *</div><div class='del'>- * If any calculated watermark values is larger than the maximum value that</div><div class='del'>- * can be programmed into the associated watermark register, that watermark</div><div class='del'>- * must be disabled.</div><div class='del'>- */</div><div class='del'>-static bool ironlake_check_srwm(struct drm_device *dev, int level,</div><div class='del'>-				int fbc_wm, int display_wm, int cursor_wm,</div><div class='del'>-				const struct intel_watermark_params *display,</div><div class='del'>-				const struct intel_watermark_params *cursor)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_KMS("watermark %d: display plane %d, fbc lines %d,"</div><div class='del'>-		      " cursor %d\n", level, display_wm, fbc_wm, cursor_wm);</div><div class='del'>-</div><div class='del'>-	if (fbc_wm &gt; SNB_FBC_MAX_SRWM) {</div><div class='del'>-		DRM_DEBUG_KMS("fbc watermark(%d) is too large(%d), disabling wm%d+\n",</div><div class='del'>-			      fbc_wm, SNB_FBC_MAX_SRWM, level);</div><div class='del'>-</div><div class='del'>-		/* fbc has it's own way to disable FBC WM */</div><div class='del'>-		I915_WRITE(DISP_ARB_CTL,</div><div class='del'>-			   I915_READ(DISP_ARB_CTL) | DISP_FBC_WM_DIS);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (display_wm &gt; display-&gt;max_wm) {</div><div class='del'>-		DRM_DEBUG_KMS("display watermark(%d) is too large(%d), disabling wm%d+\n",</div><div class='del'>-			      display_wm, SNB_DISPLAY_MAX_SRWM, level);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cursor_wm &gt; cursor-&gt;max_wm) {</div><div class='del'>-		DRM_DEBUG_KMS("cursor watermark(%d) is too large(%d), disabling wm%d+\n",</div><div class='del'>-			      cursor_wm, SNB_CURSOR_MAX_SRWM, level);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!(fbc_wm || display_wm || cursor_wm)) {</div><div class='del'>-		DRM_DEBUG_KMS("latency %d is 0, disabling wm%d+\n", level, level);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Compute watermark values of WM[1-3],</div><div class='del'>- */</div><div class='del'>-static bool ironlake_compute_srwm(struct drm_device *dev, int level, int plane,</div><div class='del'>-				  int latency_ns,</div><div class='del'>-				  const struct intel_watermark_params *display,</div><div class='del'>-				  const struct intel_watermark_params *cursor,</div><div class='del'>-				  int *fbc_wm, int *display_wm, int *cursor_wm)</div><div class='del'>-{</div><div class='del'>-	struct drm_crtc *crtc;</div><div class='del'>-	unsigned long line_time_us;</div><div class='del'>-	int hdisplay, htotal, pixel_size, clock;</div><div class='del'>-	int line_count, line_size;</div><div class='del'>-	int small, large;</div><div class='del'>-	int entries;</div><div class='del'>-</div><div class='del'>-	if (!latency_ns) {</div><div class='del'>-		*fbc_wm = *display_wm = *cursor_wm = 0;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	crtc = intel_get_crtc_for_plane(dev, plane);</div><div class='del'>-	hdisplay = crtc-&gt;mode.hdisplay;</div><div class='del'>-	htotal = crtc-&gt;mode.htotal;</div><div class='del'>-	clock = crtc-&gt;mode.clock;</div><div class='del'>-	pixel_size = crtc-&gt;fb-&gt;bits_per_pixel / 8;</div><div class='del'>-</div><div class='del'>-	line_time_us = (htotal * 1000) / clock;</div><div class='del'>-	line_count = (latency_ns / line_time_us + 1000) / 1000;</div><div class='del'>-	line_size = hdisplay * pixel_size;</div><div class='del'>-</div><div class='del'>-	/* Use the minimum of the small and large buffer method for primary */</div><div class='del'>-	small = ((clock * pixel_size / 1000) * latency_ns) / 1000;</div><div class='del'>-	large = line_count * line_size;</div><div class='del'>-</div><div class='del'>-	entries = DIV_ROUND_UP(min(small, large), display-&gt;cacheline_size);</div><div class='del'>-	*display_wm = entries + display-&gt;guard_size;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Spec says:</div><div class='del'>-	 * FBC WM = ((Final Primary WM * 64) / number of bytes per line) + 2</div><div class='del'>-	 */</div><div class='del'>-	*fbc_wm = DIV_ROUND_UP(*display_wm * 64, line_size) + 2;</div><div class='del'>-</div><div class='del'>-	/* calculate the self-refresh watermark for display cursor */</div><div class='del'>-	entries = line_count * pixel_size * 64;</div><div class='del'>-	entries = DIV_ROUND_UP(entries, cursor-&gt;cacheline_size);</div><div class='del'>-	*cursor_wm = entries + cursor-&gt;guard_size;</div><div class='del'>-</div><div class='del'>-	return ironlake_check_srwm(dev, level,</div><div class='del'>-				   *fbc_wm, *display_wm, *cursor_wm,</div><div class='del'>-				   display, cursor);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ironlake_update_wm(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int fbc_wm, plane_wm, cursor_wm;</div><div class='del'>-	unsigned int enabled;</div><div class='del'>-</div><div class='del'>-	enabled = 0;</div><div class='del'>-	if (g4x_compute_wm0(dev, 0,</div><div class='del'>-			    &amp;ironlake_display_wm_info,</div><div class='del'>-			    ILK_LP0_PLANE_LATENCY,</div><div class='del'>-			    &amp;ironlake_cursor_wm_info,</div><div class='del'>-			    ILK_LP0_CURSOR_LATENCY,</div><div class='del'>-			    &amp;plane_wm, &amp;cursor_wm)) {</div><div class='del'>-		I915_WRITE(WM0_PIPEA_ILK,</div><div class='del'>-			   (plane_wm &lt;&lt; WM0_PIPE_PLANE_SHIFT) | cursor_wm);</div><div class='del'>-		DRM_DEBUG_KMS("FIFO watermarks For pipe A -"</div><div class='del'>-			      " plane %d, " "cursor: %d\n",</div><div class='del'>-			      plane_wm, cursor_wm);</div><div class='del'>-		enabled |= 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (g4x_compute_wm0(dev, 1,</div><div class='del'>-			    &amp;ironlake_display_wm_info,</div><div class='del'>-			    ILK_LP0_PLANE_LATENCY,</div><div class='del'>-			    &amp;ironlake_cursor_wm_info,</div><div class='del'>-			    ILK_LP0_CURSOR_LATENCY,</div><div class='del'>-			    &amp;plane_wm, &amp;cursor_wm)) {</div><div class='del'>-		I915_WRITE(WM0_PIPEB_ILK,</div><div class='del'>-			   (plane_wm &lt;&lt; WM0_PIPE_PLANE_SHIFT) | cursor_wm);</div><div class='del'>-		DRM_DEBUG_KMS("FIFO watermarks For pipe B -"</div><div class='del'>-			      " plane %d, cursor: %d\n",</div><div class='del'>-			      plane_wm, cursor_wm);</div><div class='del'>-		enabled |= 2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Calculate and update the self-refresh watermark only when one</div><div class='del'>-	 * display plane is used.</div><div class='del'>-	 */</div><div class='del'>-	I915_WRITE(WM3_LP_ILK, 0);</div><div class='del'>-	I915_WRITE(WM2_LP_ILK, 0);</div><div class='del'>-	I915_WRITE(WM1_LP_ILK, 0);</div><div class='del'>-</div><div class='del'>-	if (!single_plane_enabled(enabled))</div><div class='del'>-		return;</div><div class='del'>-	enabled = ffs(enabled) - 1;</div><div class='del'>-</div><div class='del'>-	/* WM1 */</div><div class='del'>-	if (!ironlake_compute_srwm(dev, 1, enabled,</div><div class='del'>-				   ILK_READ_WM1_LATENCY() * 500,</div><div class='del'>-				   &amp;ironlake_display_srwm_info,</div><div class='del'>-				   &amp;ironlake_cursor_srwm_info,</div><div class='del'>-				   &amp;fbc_wm, &amp;plane_wm, &amp;cursor_wm))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(WM1_LP_ILK,</div><div class='del'>-		   WM1_LP_SR_EN |</div><div class='del'>-		   (ILK_READ_WM1_LATENCY() &lt;&lt; WM1_LP_LATENCY_SHIFT) |</div><div class='del'>-		   (fbc_wm &lt;&lt; WM1_LP_FBC_SHIFT) |</div><div class='del'>-		   (plane_wm &lt;&lt; WM1_LP_SR_SHIFT) |</div><div class='del'>-		   cursor_wm);</div><div class='del'>-</div><div class='del'>-	/* WM2 */</div><div class='del'>-	if (!ironlake_compute_srwm(dev, 2, enabled,</div><div class='del'>-				   ILK_READ_WM2_LATENCY() * 500,</div><div class='del'>-				   &amp;ironlake_display_srwm_info,</div><div class='del'>-				   &amp;ironlake_cursor_srwm_info,</div><div class='del'>-				   &amp;fbc_wm, &amp;plane_wm, &amp;cursor_wm))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(WM2_LP_ILK,</div><div class='del'>-		   WM2_LP_EN |</div><div class='del'>-		   (ILK_READ_WM2_LATENCY() &lt;&lt; WM1_LP_LATENCY_SHIFT) |</div><div class='del'>-		   (fbc_wm &lt;&lt; WM1_LP_FBC_SHIFT) |</div><div class='del'>-		   (plane_wm &lt;&lt; WM1_LP_SR_SHIFT) |</div><div class='del'>-		   cursor_wm);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * WM3 is unsupported on ILK, probably because we don't have latency</div><div class='del'>-	 * data for that power state</div><div class='del'>-	 */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void sandybridge_update_wm(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int latency = SNB_READ_WM0_LATENCY() * 100;	/* In unit 0.1us */</div><div class='del'>-	u32 val;</div><div class='del'>-	int fbc_wm, plane_wm, cursor_wm;</div><div class='del'>-	unsigned int enabled;</div><div class='del'>-</div><div class='del'>-	enabled = 0;</div><div class='del'>-	if (g4x_compute_wm0(dev, 0,</div><div class='del'>-			    &amp;sandybridge_display_wm_info, latency,</div><div class='del'>-			    &amp;sandybridge_cursor_wm_info, latency,</div><div class='del'>-			    &amp;plane_wm, &amp;cursor_wm)) {</div><div class='del'>-		val = I915_READ(WM0_PIPEA_ILK);</div><div class='del'>-		val &amp;= ~(WM0_PIPE_PLANE_MASK | WM0_PIPE_CURSOR_MASK);</div><div class='del'>-		I915_WRITE(WM0_PIPEA_ILK, val |</div><div class='del'>-			   ((plane_wm &lt;&lt; WM0_PIPE_PLANE_SHIFT) | cursor_wm));</div><div class='del'>-		DRM_DEBUG_KMS("FIFO watermarks For pipe A -"</div><div class='del'>-			      " plane %d, " "cursor: %d\n",</div><div class='del'>-			      plane_wm, cursor_wm);</div><div class='del'>-		enabled |= 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (g4x_compute_wm0(dev, 1,</div><div class='del'>-			    &amp;sandybridge_display_wm_info, latency,</div><div class='del'>-			    &amp;sandybridge_cursor_wm_info, latency,</div><div class='del'>-			    &amp;plane_wm, &amp;cursor_wm)) {</div><div class='del'>-		val = I915_READ(WM0_PIPEB_ILK);</div><div class='del'>-		val &amp;= ~(WM0_PIPE_PLANE_MASK | WM0_PIPE_CURSOR_MASK);</div><div class='del'>-		I915_WRITE(WM0_PIPEB_ILK, val |</div><div class='del'>-			   ((plane_wm &lt;&lt; WM0_PIPE_PLANE_SHIFT) | cursor_wm));</div><div class='del'>-		DRM_DEBUG_KMS("FIFO watermarks For pipe B -"</div><div class='del'>-			      " plane %d, cursor: %d\n",</div><div class='del'>-			      plane_wm, cursor_wm);</div><div class='del'>-		enabled |= 2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* IVB has 3 pipes */</div><div class='del'>-	if (IS_IVYBRIDGE(dev) &amp;&amp;</div><div class='del'>-	    g4x_compute_wm0(dev, 2,</div><div class='del'>-			    &amp;sandybridge_display_wm_info, latency,</div><div class='del'>-			    &amp;sandybridge_cursor_wm_info, latency,</div><div class='del'>-			    &amp;plane_wm, &amp;cursor_wm)) {</div><div class='del'>-		val = I915_READ(WM0_PIPEC_IVB);</div><div class='del'>-		val &amp;= ~(WM0_PIPE_PLANE_MASK | WM0_PIPE_CURSOR_MASK);</div><div class='del'>-		I915_WRITE(WM0_PIPEC_IVB, val |</div><div class='del'>-			   ((plane_wm &lt;&lt; WM0_PIPE_PLANE_SHIFT) | cursor_wm));</div><div class='del'>-		DRM_DEBUG_KMS("FIFO watermarks For pipe C -"</div><div class='del'>-			      " plane %d, cursor: %d\n",</div><div class='del'>-			      plane_wm, cursor_wm);</div><div class='del'>-		enabled |= 3;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Calculate and update the self-refresh watermark only when one</div><div class='del'>-	 * display plane is used.</div><div class='del'>-	 *</div><div class='del'>-	 * SNB support 3 levels of watermark.</div><div class='del'>-	 *</div><div class='del'>-	 * WM1/WM2/WM2 watermarks have to be enabled in the ascending order,</div><div class='del'>-	 * and disabled in the descending order</div><div class='del'>-	 *</div><div class='del'>-	 */</div><div class='del'>-	I915_WRITE(WM3_LP_ILK, 0);</div><div class='del'>-	I915_WRITE(WM2_LP_ILK, 0);</div><div class='del'>-	I915_WRITE(WM1_LP_ILK, 0);</div><div class='del'>-</div><div class='del'>-	if (!single_plane_enabled(enabled) ||</div><div class='del'>-	    dev_priv-&gt;sprite_scaling_enabled)</div><div class='del'>-		return;</div><div class='del'>-	enabled = ffs(enabled) - 1;</div><div class='del'>-</div><div class='del'>-	/* WM1 */</div><div class='del'>-	if (!ironlake_compute_srwm(dev, 1, enabled,</div><div class='del'>-				   SNB_READ_WM1_LATENCY() * 500,</div><div class='del'>-				   &amp;sandybridge_display_srwm_info,</div><div class='del'>-				   &amp;sandybridge_cursor_srwm_info,</div><div class='del'>-				   &amp;fbc_wm, &amp;plane_wm, &amp;cursor_wm))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(WM1_LP_ILK,</div><div class='del'>-		   WM1_LP_SR_EN |</div><div class='del'>-		   (SNB_READ_WM1_LATENCY() &lt;&lt; WM1_LP_LATENCY_SHIFT) |</div><div class='del'>-		   (fbc_wm &lt;&lt; WM1_LP_FBC_SHIFT) |</div><div class='del'>-		   (plane_wm &lt;&lt; WM1_LP_SR_SHIFT) |</div><div class='del'>-		   cursor_wm);</div><div class='del'>-</div><div class='del'>-	/* WM2 */</div><div class='del'>-	if (!ironlake_compute_srwm(dev, 2, enabled,</div><div class='del'>-				   SNB_READ_WM2_LATENCY() * 500,</div><div class='del'>-				   &amp;sandybridge_display_srwm_info,</div><div class='del'>-				   &amp;sandybridge_cursor_srwm_info,</div><div class='del'>-				   &amp;fbc_wm, &amp;plane_wm, &amp;cursor_wm))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(WM2_LP_ILK,</div><div class='del'>-		   WM2_LP_EN |</div><div class='del'>-		   (SNB_READ_WM2_LATENCY() &lt;&lt; WM1_LP_LATENCY_SHIFT) |</div><div class='del'>-		   (fbc_wm &lt;&lt; WM1_LP_FBC_SHIFT) |</div><div class='del'>-		   (plane_wm &lt;&lt; WM1_LP_SR_SHIFT) |</div><div class='del'>-		   cursor_wm);</div><div class='del'>-</div><div class='del'>-	/* WM3 */</div><div class='del'>-	if (!ironlake_compute_srwm(dev, 3, enabled,</div><div class='del'>-				   SNB_READ_WM3_LATENCY() * 500,</div><div class='del'>-				   &amp;sandybridge_display_srwm_info,</div><div class='del'>-				   &amp;sandybridge_cursor_srwm_info,</div><div class='del'>-				   &amp;fbc_wm, &amp;plane_wm, &amp;cursor_wm))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(WM3_LP_ILK,</div><div class='del'>-		   WM3_LP_EN |</div><div class='del'>-		   (SNB_READ_WM3_LATENCY() &lt;&lt; WM1_LP_LATENCY_SHIFT) |</div><div class='del'>-		   (fbc_wm &lt;&lt; WM1_LP_FBC_SHIFT) |</div><div class='del'>-		   (plane_wm &lt;&lt; WM1_LP_SR_SHIFT) |</div><div class='del'>-		   cursor_wm);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool</div><div class='del'>-sandybridge_compute_sprite_wm(struct drm_device *dev, int plane,</div><div class='del'>-			      uint32_t sprite_width, int pixel_size,</div><div class='del'>-			      const struct intel_watermark_params *display,</div><div class='del'>-			      int display_latency_ns, int *sprite_wm)</div><div class='del'>-{</div><div class='del'>-	struct drm_crtc *crtc;</div><div class='del'>-	int clock;</div><div class='del'>-	int entries, tlb_miss;</div><div class='del'>-</div><div class='del'>-	crtc = intel_get_crtc_for_plane(dev, plane);</div><div class='del'>-	if (crtc-&gt;fb == NULL || !crtc-&gt;enabled) {</div><div class='del'>-		*sprite_wm = display-&gt;guard_size;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	clock = crtc-&gt;mode.clock;</div><div class='del'>-</div><div class='del'>-	/* Use the small buffer method to calculate the sprite watermark */</div><div class='del'>-	entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000;</div><div class='del'>-	tlb_miss = display-&gt;fifo_size*display-&gt;cacheline_size -</div><div class='del'>-		sprite_width * 8;</div><div class='del'>-	if (tlb_miss &gt; 0)</div><div class='del'>-		entries += tlb_miss;</div><div class='del'>-	entries = DIV_ROUND_UP(entries, display-&gt;cacheline_size);</div><div class='del'>-	*sprite_wm = entries + display-&gt;guard_size;</div><div class='del'>-	if (*sprite_wm &gt; (int)display-&gt;max_wm)</div><div class='del'>-		*sprite_wm = display-&gt;max_wm;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool</div><div class='del'>-sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane,</div><div class='del'>-				uint32_t sprite_width, int pixel_size,</div><div class='del'>-				const struct intel_watermark_params *display,</div><div class='del'>-				int latency_ns, int *sprite_wm)</div><div class='del'>-{</div><div class='del'>-	struct drm_crtc *crtc;</div><div class='del'>-	unsigned long line_time_us;</div><div class='del'>-	int clock;</div><div class='del'>-	int line_count, line_size;</div><div class='del'>-	int small, large;</div><div class='del'>-	int entries;</div><div class='del'>-</div><div class='del'>-	if (!latency_ns) {</div><div class='del'>-		*sprite_wm = 0;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	crtc = intel_get_crtc_for_plane(dev, plane);</div><div class='del'>-	clock = crtc-&gt;mode.clock;</div><div class='del'>-	if (!clock) {</div><div class='del'>-		*sprite_wm = 0;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	line_time_us = (sprite_width * 1000) / clock;</div><div class='del'>-	if (!line_time_us) {</div><div class='del'>-		*sprite_wm = 0;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	line_count = (latency_ns / line_time_us + 1000) / 1000;</div><div class='del'>-	line_size = sprite_width * pixel_size;</div><div class='del'>-</div><div class='del'>-	/* Use the minimum of the small and large buffer method for primary */</div><div class='del'>-	small = ((clock * pixel_size / 1000) * latency_ns) / 1000;</div><div class='del'>-	large = line_count * line_size;</div><div class='del'>-</div><div class='del'>-	entries = DIV_ROUND_UP(min(small, large), display-&gt;cacheline_size);</div><div class='del'>-	*sprite_wm = entries + display-&gt;guard_size;</div><div class='del'>-</div><div class='del'>-	return *sprite_wm &gt; 0x3ff ? false : true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,</div><div class='del'>-					 uint32_t sprite_width, int pixel_size)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int latency = SNB_READ_WM0_LATENCY() * 100;	/* In unit 0.1us */</div><div class='del'>-	u32 val;</div><div class='del'>-	int sprite_wm, reg;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	switch (pipe) {</div><div class='del'>-	case 0:</div><div class='del'>-		reg = WM0_PIPEA_ILK;</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		reg = WM0_PIPEB_ILK;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		reg = WM0_PIPEC_IVB;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return; /* bad pipe */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = sandybridge_compute_sprite_wm(dev, pipe, sprite_width, pixel_size,</div><div class='del'>-					    &amp;sandybridge_display_wm_info,</div><div class='del'>-					    latency, &amp;sprite_wm);</div><div class='del'>-	if (!ret) {</div><div class='del'>-		DRM_DEBUG_KMS("failed to compute sprite wm for pipe %d\n",</div><div class='del'>-			      pipe);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	val = I915_READ(reg);</div><div class='del'>-	val &amp;= ~WM0_PIPE_SPRITE_MASK;</div><div class='del'>-	I915_WRITE(reg, val | (sprite_wm &lt;&lt; WM0_PIPE_SPRITE_SHIFT));</div><div class='del'>-	DRM_DEBUG_KMS("sprite watermarks For pipe %d - %d\n", pipe, sprite_wm);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	ret = sandybridge_compute_sprite_srwm(dev, pipe, sprite_width,</div><div class='del'>-					      pixel_size,</div><div class='del'>-					      &amp;sandybridge_display_srwm_info,</div><div class='del'>-					      SNB_READ_WM1_LATENCY() * 500,</div><div class='del'>-					      &amp;sprite_wm);</div><div class='del'>-	if (!ret) {</div><div class='del'>-		DRM_DEBUG_KMS("failed to compute sprite lp1 wm on pipe %d\n",</div><div class='del'>-			      pipe);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	I915_WRITE(WM1S_LP_ILK, sprite_wm);</div><div class='del'>-</div><div class='del'>-	/* Only IVB has two more LP watermarks for sprite */</div><div class='del'>-	if (!IS_IVYBRIDGE(dev))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ret = sandybridge_compute_sprite_srwm(dev, pipe, sprite_width,</div><div class='del'>-					      pixel_size,</div><div class='del'>-					      &amp;sandybridge_display_srwm_info,</div><div class='del'>-					      SNB_READ_WM2_LATENCY() * 500,</div><div class='del'>-					      &amp;sprite_wm);</div><div class='del'>-	if (!ret) {</div><div class='del'>-		DRM_DEBUG_KMS("failed to compute sprite lp2 wm on pipe %d\n",</div><div class='del'>-			      pipe);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	I915_WRITE(WM2S_LP_IVB, sprite_wm);</div><div class='del'>-</div><div class='del'>-	ret = sandybridge_compute_sprite_srwm(dev, pipe, sprite_width,</div><div class='del'>-					      pixel_size,</div><div class='del'>-					      &amp;sandybridge_display_srwm_info,</div><div class='del'>-					      SNB_READ_WM3_LATENCY() * 500,</div><div class='del'>-					      &amp;sprite_wm);</div><div class='del'>-	if (!ret) {</div><div class='del'>-		DRM_DEBUG_KMS("failed to compute sprite lp3 wm on pipe %d\n",</div><div class='del'>-			      pipe);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	I915_WRITE(WM3S_LP_IVB, sprite_wm);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * intel_update_watermarks - update FIFO watermark values based on current modes</div><div class='del'>- *</div><div class='del'>- * Calculate watermark values for the various WM regs based on current mode</div><div class='del'>- * and plane configuration.</div><div class='del'>- *</div><div class='del'>- * There are several cases to deal with here:</div><div class='del'>- *   - normal (i.e. non-self-refresh)</div><div class='del'>- *   - self-refresh (SR) mode</div><div class='del'>- *   - lines are large relative to FIFO size (buffer can hold up to 2)</div><div class='del'>- *   - lines are small relative to FIFO size (buffer can hold more than 2</div><div class='del'>- *     lines), so need to account for TLB latency</div><div class='del'>- *</div><div class='del'>- *   The normal calculation is:</div><div class='del'>- *     watermark = dotclock * bytes per pixel * latency</div><div class='del'>- *   where latency is platform &amp; configuration dependent (we assume pessimal</div><div class='del'>- *   values here).</div><div class='del'>- *</div><div class='del'>- *   The SR calculation is:</div><div class='del'>- *     watermark = (trunc(latency/line time)+1) * surface width *</div><div class='del'>- *       bytes per pixel</div><div class='del'>- *   where</div><div class='del'>- *     line time = htotal / dotclock</div><div class='del'>- *     surface width = hdisplay for normal plane and 64 for cursor</div><div class='del'>- *   and latency is assumed to be high, as above.</div><div class='del'>- *</div><div class='del'>- * The final value programmed to the register should always be rounded up,</div><div class='del'>- * and include an extra 2 entries to account for clock crossings.</div><div class='del'>- *</div><div class='del'>- * We don't use the sprite, so we can ignore that.  And on Crestline we have</div><div class='del'>- * to set the non-SR watermarks to 8.</div><div class='del'>- */</div><div class='del'>-static void intel_update_watermarks(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;display.update_wm)</div><div class='del'>-		dev_priv-&gt;display.update_wm(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,</div><div class='del'>-				    uint32_t sprite_width, int pixel_size)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;display.update_sprite_wm)</div><div class='del'>-		dev_priv-&gt;display.update_sprite_wm(dev, pipe, sprite_width,</div><div class='del'>-						   pixel_size);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)</div><div class='ctx'> {</div><div class='ctx'> 	if (i915_panel_use_ssc &gt;= 0)</div><div class='hunk'>@@ -5143,6 +3742,222 @@ static void i9xx_update_pll_dividers(struct drm_crtc *crtc,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void intel_update_lvds(struct drm_crtc *crtc, intel_clock_t *clock,</div><div class='add'>+			      struct drm_display_mode *adjusted_mode)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	int pipe = intel_crtc-&gt;pipe;</div><div class='add'>+	u32 temp;</div><div class='add'>+</div><div class='add'>+	temp = I915_READ(LVDS);</div><div class='add'>+	temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;</div><div class='add'>+	if (pipe == 1) {</div><div class='add'>+		temp |= LVDS_PIPEB_SELECT;</div><div class='add'>+	} else {</div><div class='add'>+		temp &amp;= ~LVDS_PIPEB_SELECT;</div><div class='add'>+	}</div><div class='add'>+	/* set the corresponsding LVDS_BORDER bit */</div><div class='add'>+	temp |= dev_priv-&gt;lvds_border_bits;</div><div class='add'>+	/* Set the B0-B3 data pairs corresponding to whether we're going to</div><div class='add'>+	 * set the DPLLs for dual-channel mode or not.</div><div class='add'>+	 */</div><div class='add'>+	if (clock-&gt;p2 == 7)</div><div class='add'>+		temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;</div><div class='add'>+	else</div><div class='add'>+		temp &amp;= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);</div><div class='add'>+</div><div class='add'>+	/* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)</div><div class='add'>+	 * appropriately here, but we need to look more thoroughly into how</div><div class='add'>+	 * panels behave in the two modes.</div><div class='add'>+	 */</div><div class='add'>+	/* set the dithering flag on LVDS as needed */</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &gt;= 4) {</div><div class='add'>+		if (dev_priv-&gt;lvds_dither)</div><div class='add'>+			temp |= LVDS_ENABLE_DITHER;</div><div class='add'>+		else</div><div class='add'>+			temp &amp;= ~LVDS_ENABLE_DITHER;</div><div class='add'>+	}</div><div class='add'>+	temp &amp;= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);</div><div class='add'>+	if (adjusted_mode-&gt;flags &amp; DRM_MODE_FLAG_NHSYNC)</div><div class='add'>+		temp |= LVDS_HSYNC_POLARITY;</div><div class='add'>+	if (adjusted_mode-&gt;flags &amp; DRM_MODE_FLAG_NVSYNC)</div><div class='add'>+		temp |= LVDS_VSYNC_POLARITY;</div><div class='add'>+	I915_WRITE(LVDS, temp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i9xx_update_pll(struct drm_crtc *crtc,</div><div class='add'>+			    struct drm_display_mode *mode,</div><div class='add'>+			    struct drm_display_mode *adjusted_mode,</div><div class='add'>+			    intel_clock_t *clock, intel_clock_t *reduced_clock,</div><div class='add'>+			    int num_connectors)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	int pipe = intel_crtc-&gt;pipe;</div><div class='add'>+	u32 dpll;</div><div class='add'>+	bool is_sdvo;</div><div class='add'>+</div><div class='add'>+	is_sdvo = intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO) ||</div><div class='add'>+		intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI);</div><div class='add'>+</div><div class='add'>+	dpll = DPLL_VGA_MODE_DIS;</div><div class='add'>+</div><div class='add'>+	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))</div><div class='add'>+		dpll |= DPLLB_MODE_LVDS;</div><div class='add'>+	else</div><div class='add'>+		dpll |= DPLLB_MODE_DAC_SERIAL;</div><div class='add'>+	if (is_sdvo) {</div><div class='add'>+		int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);</div><div class='add'>+		if (pixel_multiplier &gt; 1) {</div><div class='add'>+			if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))</div><div class='add'>+				dpll |= (pixel_multiplier - 1) &lt;&lt; SDVO_MULTIPLIER_SHIFT_HIRES;</div><div class='add'>+		}</div><div class='add'>+		dpll |= DPLL_DVO_HIGH_SPEED;</div><div class='add'>+	}</div><div class='add'>+	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT))</div><div class='add'>+		dpll |= DPLL_DVO_HIGH_SPEED;</div><div class='add'>+</div><div class='add'>+	/* compute bitmask from p1 value */</div><div class='add'>+	if (IS_PINEVIEW(dev))</div><div class='add'>+		dpll |= (1 &lt;&lt; (clock-&gt;p1 - 1)) &lt;&lt; DPLL_FPA01_P1_POST_DIV_SHIFT_PINEVIEW;</div><div class='add'>+	else {</div><div class='add'>+		dpll |= (1 &lt;&lt; (clock-&gt;p1 - 1)) &lt;&lt; DPLL_FPA01_P1_POST_DIV_SHIFT;</div><div class='add'>+		if (IS_G4X(dev) &amp;&amp; reduced_clock)</div><div class='add'>+			dpll |= (1 &lt;&lt; (reduced_clock-&gt;p1 - 1)) &lt;&lt; DPLL_FPA1_P1_POST_DIV_SHIFT;</div><div class='add'>+	}</div><div class='add'>+	switch (clock-&gt;p2) {</div><div class='add'>+	case 5:</div><div class='add'>+		dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5;</div><div class='add'>+		break;</div><div class='add'>+	case 7:</div><div class='add'>+		dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7;</div><div class='add'>+		break;</div><div class='add'>+	case 10:</div><div class='add'>+		dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_10;</div><div class='add'>+		break;</div><div class='add'>+	case 14:</div><div class='add'>+		dpll |= DPLLB_LVDS_P2_CLOCK_DIV_14;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &gt;= 4)</div><div class='add'>+		dpll |= (6 &lt;&lt; PLL_LOAD_PULSE_PHASE_SHIFT);</div><div class='add'>+</div><div class='add'>+	if (is_sdvo &amp;&amp; intel_pipe_has_type(crtc, INTEL_OUTPUT_TVOUT))</div><div class='add'>+		dpll |= PLL_REF_INPUT_TVCLKINBC;</div><div class='add'>+	else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_TVOUT))</div><div class='add'>+		/* XXX: just matching BIOS for now */</div><div class='add'>+		/*	dpll |= PLL_REF_INPUT_TVCLKINBC; */</div><div class='add'>+		dpll |= 3;</div><div class='add'>+	else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &amp;&amp;</div><div class='add'>+		 intel_panel_use_ssc(dev_priv) &amp;&amp; num_connectors &lt; 2)</div><div class='add'>+		dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN;</div><div class='add'>+	else</div><div class='add'>+		dpll |= PLL_REF_INPUT_DREFCLK;</div><div class='add'>+</div><div class='add'>+	dpll |= DPLL_VCO_ENABLE;</div><div class='add'>+	I915_WRITE(DPLL(pipe), dpll &amp; ~DPLL_VCO_ENABLE);</div><div class='add'>+	POSTING_READ(DPLL(pipe));</div><div class='add'>+	udelay(150);</div><div class='add'>+</div><div class='add'>+	/* The LVDS pin pair needs to be on before the DPLLs are enabled.</div><div class='add'>+	 * This is an exception to the general rule that mode_set doesn't turn</div><div class='add'>+	 * things on.</div><div class='add'>+	 */</div><div class='add'>+	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))</div><div class='add'>+		intel_update_lvds(crtc, clock, adjusted_mode);</div><div class='add'>+</div><div class='add'>+	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT))</div><div class='add'>+		intel_dp_set_m_n(crtc, mode, adjusted_mode);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(DPLL(pipe), dpll);</div><div class='add'>+</div><div class='add'>+	/* Wait for the clocks to stabilize. */</div><div class='add'>+	POSTING_READ(DPLL(pipe));</div><div class='add'>+	udelay(150);</div><div class='add'>+</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &gt;= 4) {</div><div class='add'>+		u32 temp = 0;</div><div class='add'>+		if (is_sdvo) {</div><div class='add'>+			temp = intel_mode_get_pixel_multiplier(adjusted_mode);</div><div class='add'>+			if (temp &gt; 1)</div><div class='add'>+				temp = (temp - 1) &lt;&lt; DPLL_MD_UDI_MULTIPLIER_SHIFT;</div><div class='add'>+			else</div><div class='add'>+				temp = 0;</div><div class='add'>+		}</div><div class='add'>+		I915_WRITE(DPLL_MD(pipe), temp);</div><div class='add'>+	} else {</div><div class='add'>+		/* The pixel multiplier can only be updated once the</div><div class='add'>+		 * DPLL is enabled and the clocks are stable.</div><div class='add'>+		 *</div><div class='add'>+		 * So write it again.</div><div class='add'>+		 */</div><div class='add'>+		I915_WRITE(DPLL(pipe), dpll);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i8xx_update_pll(struct drm_crtc *crtc,</div><div class='add'>+			    struct drm_display_mode *adjusted_mode,</div><div class='add'>+			    intel_clock_t *clock,</div><div class='add'>+			    int num_connectors)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	int pipe = intel_crtc-&gt;pipe;</div><div class='add'>+	u32 dpll;</div><div class='add'>+</div><div class='add'>+	dpll = DPLL_VGA_MODE_DIS;</div><div class='add'>+</div><div class='add'>+	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {</div><div class='add'>+		dpll |= (1 &lt;&lt; (clock-&gt;p1 - 1)) &lt;&lt; DPLL_FPA01_P1_POST_DIV_SHIFT;</div><div class='add'>+	} else {</div><div class='add'>+		if (clock-&gt;p1 == 2)</div><div class='add'>+			dpll |= PLL_P1_DIVIDE_BY_TWO;</div><div class='add'>+		else</div><div class='add'>+			dpll |= (clock-&gt;p1 - 2) &lt;&lt; DPLL_FPA01_P1_POST_DIV_SHIFT;</div><div class='add'>+		if (clock-&gt;p2 == 4)</div><div class='add'>+			dpll |= PLL_P2_DIVIDE_BY_4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_TVOUT))</div><div class='add'>+		/* XXX: just matching BIOS for now */</div><div class='add'>+		/*	dpll |= PLL_REF_INPUT_TVCLKINBC; */</div><div class='add'>+		dpll |= 3;</div><div class='add'>+	else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &amp;&amp;</div><div class='add'>+		 intel_panel_use_ssc(dev_priv) &amp;&amp; num_connectors &lt; 2)</div><div class='add'>+		dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN;</div><div class='add'>+	else</div><div class='add'>+		dpll |= PLL_REF_INPUT_DREFCLK;</div><div class='add'>+</div><div class='add'>+	dpll |= DPLL_VCO_ENABLE;</div><div class='add'>+	I915_WRITE(DPLL(pipe), dpll &amp; ~DPLL_VCO_ENABLE);</div><div class='add'>+	POSTING_READ(DPLL(pipe));</div><div class='add'>+	udelay(150);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(DPLL(pipe), dpll);</div><div class='add'>+</div><div class='add'>+	/* Wait for the clocks to stabilize. */</div><div class='add'>+	POSTING_READ(DPLL(pipe));</div><div class='add'>+	udelay(150);</div><div class='add'>+</div><div class='add'>+	/* The LVDS pin pair needs to be on before the DPLLs are enabled.</div><div class='add'>+	 * This is an exception to the general rule that mode_set doesn't turn</div><div class='add'>+	 * things on.</div><div class='add'>+	 */</div><div class='add'>+	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))</div><div class='add'>+		intel_update_lvds(crtc, clock, adjusted_mode);</div><div class='add'>+</div><div class='add'>+	/* The pixel multiplier can only be updated once the</div><div class='add'>+	 * DPLL is enabled and the clocks are stable.</div><div class='add'>+	 *</div><div class='add'>+	 * So write it again.</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(DPLL(pipe), dpll);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int i9xx_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 			      struct drm_display_mode *mode,</div><div class='ctx'> 			      struct drm_display_mode *adjusted_mode,</div><div class='hunk'>@@ -5156,15 +3971,13 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	int plane = intel_crtc-&gt;plane;</div><div class='ctx'> 	int refclk, num_connectors = 0;</div><div class='ctx'> 	intel_clock_t clock, reduced_clock;</div><div class='del'>-	u32 dpll, dspcntr, pipeconf, vsyncshift;</div><div class='del'>-	bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false;</div><div class='del'>-	bool is_crt = false, is_lvds = false, is_tv = false, is_dp = false;</div><div class='add'>+	u32 dspcntr, pipeconf, vsyncshift;</div><div class='add'>+	bool ok, has_reduced_clock = false, is_sdvo = false;</div><div class='add'>+	bool is_lvds = false, is_tv = false, is_dp = false;</div><div class='ctx'> 	struct drm_mode_config *mode_config = &amp;dev-&gt;mode_config;</div><div class='ctx'> 	struct intel_encoder *encoder;</div><div class='ctx'> 	const intel_limit_t *limit;</div><div class='ctx'> 	int ret;</div><div class='del'>-	u32 temp;</div><div class='del'>-	u32 lvds_sync = 0;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(encoder, &amp;mode_config-&gt;encoder_list, base.head) {</div><div class='ctx'> 		if (encoder-&gt;base.crtc != crtc)</div><div class='hunk'>@@ -5180,15 +3993,9 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 			if (encoder-&gt;needs_tv_clock)</div><div class='ctx'> 				is_tv = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case INTEL_OUTPUT_DVO:</div><div class='del'>-			is_dvo = true;</div><div class='del'>-			break;</div><div class='ctx'> 		case INTEL_OUTPUT_TVOUT:</div><div class='ctx'> 			is_tv = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case INTEL_OUTPUT_ANALOG:</div><div class='del'>-			is_crt = true;</div><div class='del'>-			break;</div><div class='ctx'> 		case INTEL_OUTPUT_DISPLAYPORT:</div><div class='ctx'> 			is_dp = true;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -5235,71 +4042,12 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	i9xx_update_pll_dividers(crtc, &amp;clock, has_reduced_clock ?</div><div class='ctx'> 				 &amp;reduced_clock : NULL);</div><div class='ctx'> </div><div class='del'>-	dpll = DPLL_VGA_MODE_DIS;</div><div class='del'>-</div><div class='del'>-	if (!IS_GEN2(dev)) {</div><div class='del'>-		if (is_lvds)</div><div class='del'>-			dpll |= DPLLB_MODE_LVDS;</div><div class='del'>-		else</div><div class='del'>-			dpll |= DPLLB_MODE_DAC_SERIAL;</div><div class='del'>-		if (is_sdvo) {</div><div class='del'>-			int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);</div><div class='del'>-			if (pixel_multiplier &gt; 1) {</div><div class='del'>-				if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))</div><div class='del'>-					dpll |= (pixel_multiplier - 1) &lt;&lt; SDVO_MULTIPLIER_SHIFT_HIRES;</div><div class='del'>-			}</div><div class='del'>-			dpll |= DPLL_DVO_HIGH_SPEED;</div><div class='del'>-		}</div><div class='del'>-		if (is_dp)</div><div class='del'>-			dpll |= DPLL_DVO_HIGH_SPEED;</div><div class='del'>-</div><div class='del'>-		/* compute bitmask from p1 value */</div><div class='del'>-		if (IS_PINEVIEW(dev))</div><div class='del'>-			dpll |= (1 &lt;&lt; (clock.p1 - 1)) &lt;&lt; DPLL_FPA01_P1_POST_DIV_SHIFT_PINEVIEW;</div><div class='del'>-		else {</div><div class='del'>-			dpll |= (1 &lt;&lt; (clock.p1 - 1)) &lt;&lt; DPLL_FPA01_P1_POST_DIV_SHIFT;</div><div class='del'>-			if (IS_G4X(dev) &amp;&amp; has_reduced_clock)</div><div class='del'>-				dpll |= (1 &lt;&lt; (reduced_clock.p1 - 1)) &lt;&lt; DPLL_FPA1_P1_POST_DIV_SHIFT;</div><div class='del'>-		}</div><div class='del'>-		switch (clock.p2) {</div><div class='del'>-		case 5:</div><div class='del'>-			dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5;</div><div class='del'>-			break;</div><div class='del'>-		case 7:</div><div class='del'>-			dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7;</div><div class='del'>-			break;</div><div class='del'>-		case 10:</div><div class='del'>-			dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_10;</div><div class='del'>-			break;</div><div class='del'>-		case 14:</div><div class='del'>-			dpll |= DPLLB_LVDS_P2_CLOCK_DIV_14;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (INTEL_INFO(dev)-&gt;gen &gt;= 4)</div><div class='del'>-			dpll |= (6 &lt;&lt; PLL_LOAD_PULSE_PHASE_SHIFT);</div><div class='del'>-	} else {</div><div class='del'>-		if (is_lvds) {</div><div class='del'>-			dpll |= (1 &lt;&lt; (clock.p1 - 1)) &lt;&lt; DPLL_FPA01_P1_POST_DIV_SHIFT;</div><div class='del'>-		} else {</div><div class='del'>-			if (clock.p1 == 2)</div><div class='del'>-				dpll |= PLL_P1_DIVIDE_BY_TWO;</div><div class='del'>-			else</div><div class='del'>-				dpll |= (clock.p1 - 2) &lt;&lt; DPLL_FPA01_P1_POST_DIV_SHIFT;</div><div class='del'>-			if (clock.p2 == 4)</div><div class='del'>-				dpll |= PLL_P2_DIVIDE_BY_4;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (is_sdvo &amp;&amp; is_tv)</div><div class='del'>-		dpll |= PLL_REF_INPUT_TVCLKINBC;</div><div class='del'>-	else if (is_tv)</div><div class='del'>-		/* XXX: just matching BIOS for now */</div><div class='del'>-		/*	dpll |= PLL_REF_INPUT_TVCLKINBC; */</div><div class='del'>-		dpll |= 3;</div><div class='del'>-	else if (is_lvds &amp;&amp; intel_panel_use_ssc(dev_priv) &amp;&amp; num_connectors &lt; 2)</div><div class='del'>-		dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN;</div><div class='add'>+	if (IS_GEN2(dev))</div><div class='add'>+		i8xx_update_pll(crtc, adjusted_mode, &amp;clock, num_connectors);</div><div class='ctx'> 	else</div><div class='del'>-		dpll |= PLL_REF_INPUT_DREFCLK;</div><div class='add'>+		i9xx_update_pll(crtc, mode, adjusted_mode, &amp;clock,</div><div class='add'>+				has_reduced_clock ? &amp;reduced_clock : NULL,</div><div class='add'>+				num_connectors);</div><div class='ctx'> </div><div class='ctx'> 	/* setup pipeconf */</div><div class='ctx'> 	pipeconf = I915_READ(PIPECONF(pipe));</div><div class='hunk'>@@ -5336,97 +4084,9 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dpll |= DPLL_VCO_ENABLE;</div><div class='del'>-</div><div class='ctx'> 	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B');</div><div class='ctx'> 	drm_mode_debug_printmodeline(mode);</div><div class='ctx'> </div><div class='del'>-	I915_WRITE(DPLL(pipe), dpll &amp; ~DPLL_VCO_ENABLE);</div><div class='del'>-</div><div class='del'>-	POSTING_READ(DPLL(pipe));</div><div class='del'>-	udelay(150);</div><div class='del'>-</div><div class='del'>-	/* The LVDS pin pair needs to be on before the DPLLs are enabled.</div><div class='del'>-	 * This is an exception to the general rule that mode_set doesn't turn</div><div class='del'>-	 * things on.</div><div class='del'>-	 */</div><div class='del'>-	if (is_lvds) {</div><div class='del'>-		temp = I915_READ(LVDS);</div><div class='del'>-		temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;</div><div class='del'>-		if (pipe == 1) {</div><div class='del'>-			temp |= LVDS_PIPEB_SELECT;</div><div class='del'>-		} else {</div><div class='del'>-			temp &amp;= ~LVDS_PIPEB_SELECT;</div><div class='del'>-		}</div><div class='del'>-		/* set the corresponsding LVDS_BORDER bit */</div><div class='del'>-		temp |= dev_priv-&gt;lvds_border_bits;</div><div class='del'>-		/* Set the B0-B3 data pairs corresponding to whether we're going to</div><div class='del'>-		 * set the DPLLs for dual-channel mode or not.</div><div class='del'>-		 */</div><div class='del'>-		if (clock.p2 == 7)</div><div class='del'>-			temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;</div><div class='del'>-		else</div><div class='del'>-			temp &amp;= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);</div><div class='del'>-</div><div class='del'>-		/* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)</div><div class='del'>-		 * appropriately here, but we need to look more thoroughly into how</div><div class='del'>-		 * panels behave in the two modes.</div><div class='del'>-		 */</div><div class='del'>-		/* set the dithering flag on LVDS as needed */</div><div class='del'>-		if (INTEL_INFO(dev)-&gt;gen &gt;= 4) {</div><div class='del'>-			if (dev_priv-&gt;lvds_dither)</div><div class='del'>-				temp |= LVDS_ENABLE_DITHER;</div><div class='del'>-			else</div><div class='del'>-				temp &amp;= ~LVDS_ENABLE_DITHER;</div><div class='del'>-		}</div><div class='del'>-		if (adjusted_mode-&gt;flags &amp; DRM_MODE_FLAG_NHSYNC)</div><div class='del'>-			lvds_sync |= LVDS_HSYNC_POLARITY;</div><div class='del'>-		if (adjusted_mode-&gt;flags &amp; DRM_MODE_FLAG_NVSYNC)</div><div class='del'>-			lvds_sync |= LVDS_VSYNC_POLARITY;</div><div class='del'>-		if ((temp &amp; (LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY))</div><div class='del'>-		    != lvds_sync) {</div><div class='del'>-			char flags[2] = "-+";</div><div class='del'>-			DRM_INFO("Changing LVDS panel from "</div><div class='del'>-				 "(%chsync, %cvsync) to (%chsync, %cvsync)\n",</div><div class='del'>-				 flags[!(temp &amp; LVDS_HSYNC_POLARITY)],</div><div class='del'>-				 flags[!(temp &amp; LVDS_VSYNC_POLARITY)],</div><div class='del'>-				 flags[!(lvds_sync &amp; LVDS_HSYNC_POLARITY)],</div><div class='del'>-				 flags[!(lvds_sync &amp; LVDS_VSYNC_POLARITY)]);</div><div class='del'>-			temp &amp;= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);</div><div class='del'>-			temp |= lvds_sync;</div><div class='del'>-		}</div><div class='del'>-		I915_WRITE(LVDS, temp);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (is_dp) {</div><div class='del'>-		intel_dp_set_m_n(crtc, mode, adjusted_mode);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	I915_WRITE(DPLL(pipe), dpll);</div><div class='del'>-</div><div class='del'>-	/* Wait for the clocks to stabilize. */</div><div class='del'>-	POSTING_READ(DPLL(pipe));</div><div class='del'>-	udelay(150);</div><div class='del'>-</div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen &gt;= 4) {</div><div class='del'>-		temp = 0;</div><div class='del'>-		if (is_sdvo) {</div><div class='del'>-			temp = intel_mode_get_pixel_multiplier(adjusted_mode);</div><div class='del'>-			if (temp &gt; 1)</div><div class='del'>-				temp = (temp - 1) &lt;&lt; DPLL_MD_UDI_MULTIPLIER_SHIFT;</div><div class='del'>-			else</div><div class='del'>-				temp = 0;</div><div class='del'>-		}</div><div class='del'>-		I915_WRITE(DPLL_MD(pipe), temp);</div><div class='del'>-	} else {</div><div class='del'>-		/* The pixel multiplier can only be updated once the</div><div class='del'>-		 * DPLL is enabled and the clocks are stable.</div><div class='del'>-		 *</div><div class='del'>-		 * So write it again.</div><div class='del'>-		 */</div><div class='del'>-		I915_WRITE(DPLL(pipe), dpll);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (HAS_PIPE_CXSR(dev)) {</div><div class='ctx'> 		if (intel_crtc-&gt;lowfreq_avail) {</div><div class='ctx'> 			DRM_DEBUG_KMS("enabling CxSR downclocking\n");</div><div class='hunk'>@@ -5492,7 +4152,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> </div><div class='ctx'> 	I915_WRITE(DSPCNTR(plane), dspcntr);</div><div class='ctx'> 	POSTING_READ(DSPCNTR(plane));</div><div class='del'>-	intel_enable_plane(dev_priv, plane, pipe);</div><div class='ctx'> </div><div class='ctx'> 	ret = intel_pipe_set_base(crtc, x, y, old_fb);</div><div class='ctx'> </div><div class='hunk'>@@ -5668,17 +4327,16 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	u32 dpll, fp = 0, fp2 = 0, dspcntr, pipeconf;</div><div class='ctx'> 	bool ok, has_reduced_clock = false, is_sdvo = false;</div><div class='ctx'> 	bool is_crt = false, is_lvds = false, is_tv = false, is_dp = false;</div><div class='del'>-	struct intel_encoder *has_edp_encoder = NULL;</div><div class='ctx'> 	struct drm_mode_config *mode_config = &amp;dev-&gt;mode_config;</div><div class='del'>-	struct intel_encoder *encoder;</div><div class='add'>+	struct intel_encoder *encoder, *edp_encoder = NULL;</div><div class='ctx'> 	const intel_limit_t *limit;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct fdi_m_n m_n = {0};</div><div class='ctx'> 	u32 temp;</div><div class='del'>-	u32 lvds_sync = 0;</div><div class='ctx'> 	int target_clock, pixel_multiplier, lane, link_bw, factor;</div><div class='ctx'> 	unsigned int pipe_bpp;</div><div class='ctx'> 	bool dither;</div><div class='add'>+	bool is_cpu_edp = false, is_pch_edp = false;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(encoder, &amp;mode_config-&gt;encoder_list, base.head) {</div><div class='ctx'> 		if (encoder-&gt;base.crtc != crtc)</div><div class='hunk'>@@ -5704,7 +4362,12 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 			is_dp = true;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case INTEL_OUTPUT_EDP:</div><div class='del'>-			has_edp_encoder = encoder;</div><div class='add'>+			is_dp = true;</div><div class='add'>+			if (intel_encoder_is_pch_edp(&amp;encoder-&gt;base))</div><div class='add'>+				is_pch_edp = true;</div><div class='add'>+			else</div><div class='add'>+				is_cpu_edp = true;</div><div class='add'>+			edp_encoder = encoder;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -5767,15 +4430,13 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	lane = 0;</div><div class='ctx'> 	/* CPU eDP doesn't require FDI link, so just set DP M/N</div><div class='ctx'> 	   according to current link config */</div><div class='del'>-	if (has_edp_encoder &amp;&amp;</div><div class='del'>-	    !intel_encoder_is_pch_edp(&amp;has_edp_encoder-&gt;base)) {</div><div class='add'>+	if (is_cpu_edp) {</div><div class='ctx'> 		target_clock = mode-&gt;clock;</div><div class='del'>-		intel_edp_link_config(has_edp_encoder,</div><div class='del'>-				      &amp;lane, &amp;link_bw);</div><div class='add'>+		intel_edp_link_config(edp_encoder, &amp;lane, &amp;link_bw);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* [e]DP over FDI requires target mode clock</div><div class='ctx'> 		   instead of link clock */</div><div class='del'>-		if (is_dp || intel_encoder_is_pch_edp(&amp;has_edp_encoder-&gt;base))</div><div class='add'>+		if (is_dp)</div><div class='ctx'> 			target_clock = mode-&gt;clock;</div><div class='ctx'> 		else</div><div class='ctx'> 			target_clock = adjusted_mode-&gt;clock;</div><div class='hunk'>@@ -5866,7 +4527,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		}</div><div class='ctx'> 		dpll |= DPLL_DVO_HIGH_SPEED;</div><div class='ctx'> 	}</div><div class='del'>-	if (is_dp || intel_encoder_is_pch_edp(&amp;has_edp_encoder-&gt;base))</div><div class='add'>+	if (is_dp &amp;&amp; !is_cpu_edp)</div><div class='ctx'> 		dpll |= DPLL_DVO_HIGH_SPEED;</div><div class='ctx'> </div><div class='ctx'> 	/* compute bitmask from p1 value */</div><div class='hunk'>@@ -5909,30 +4570,22 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	DRM_DEBUG_KMS("Mode for pipe %d:\n", pipe);</div><div class='ctx'> 	drm_mode_debug_printmodeline(mode);</div><div class='ctx'> </div><div class='del'>-	/* PCH eDP needs FDI, but CPU eDP does not */</div><div class='del'>-	if (!intel_crtc-&gt;no_pll) {</div><div class='del'>-		if (!has_edp_encoder ||</div><div class='del'>-		    intel_encoder_is_pch_edp(&amp;has_edp_encoder-&gt;base)) {</div><div class='del'>-			I915_WRITE(PCH_FP0(pipe), fp);</div><div class='del'>-			I915_WRITE(PCH_DPLL(pipe), dpll &amp; ~DPLL_VCO_ENABLE);</div><div class='del'>-</div><div class='del'>-			POSTING_READ(PCH_DPLL(pipe));</div><div class='del'>-			udelay(150);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		if (dpll == (I915_READ(PCH_DPLL(0)) &amp; 0x7fffffff) &amp;&amp;</div><div class='del'>-		    fp == I915_READ(PCH_FP0(0))) {</div><div class='del'>-			intel_crtc-&gt;use_pll_a = true;</div><div class='del'>-			DRM_DEBUG_KMS("using pipe a dpll\n");</div><div class='del'>-		} else if (dpll == (I915_READ(PCH_DPLL(1)) &amp; 0x7fffffff) &amp;&amp;</div><div class='del'>-			   fp == I915_READ(PCH_FP0(1))) {</div><div class='del'>-			intel_crtc-&gt;use_pll_a = false;</div><div class='del'>-			DRM_DEBUG_KMS("using pipe b dpll\n");</div><div class='del'>-		} else {</div><div class='del'>-			DRM_DEBUG_KMS("no matching PLL configuration for pipe 2\n");</div><div class='add'>+	/* CPU eDP is the only output that doesn't need a PCH PLL of its own on</div><div class='add'>+	 * pre-Haswell/LPT generation */</div><div class='add'>+	if (HAS_PCH_LPT(dev)) {</div><div class='add'>+		DRM_DEBUG_KMS("LPT detected: no PLL for pipe %d necessary\n",</div><div class='add'>+				pipe);</div><div class='add'>+	} else if (!is_cpu_edp) {</div><div class='add'>+		struct intel_pch_pll *pll;</div><div class='add'>+</div><div class='add'>+		pll = intel_get_pch_pll(intel_crtc, dpll, fp);</div><div class='add'>+		if (pll == NULL) {</div><div class='add'>+			DRM_DEBUG_DRIVER("failed to find PLL for pipe %d\n",</div><div class='add'>+					 pipe);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='add'>+	} else</div><div class='add'>+		intel_put_pch_pll(intel_crtc);</div><div class='ctx'> </div><div class='ctx'> 	/* The LVDS pin pair needs to be on before the DPLLs are enabled.</div><div class='ctx'> 	 * This is an exception to the general rule that mode_set doesn't turn</div><div class='hunk'>@@ -5965,22 +4618,11 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		 * appropriately here, but we need to look more thoroughly into how</div><div class='ctx'> 		 * panels behave in the two modes.</div><div class='ctx'> 		 */</div><div class='add'>+		temp &amp;= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);</div><div class='ctx'> 		if (adjusted_mode-&gt;flags &amp; DRM_MODE_FLAG_NHSYNC)</div><div class='del'>-			lvds_sync |= LVDS_HSYNC_POLARITY;</div><div class='add'>+			temp |= LVDS_HSYNC_POLARITY;</div><div class='ctx'> 		if (adjusted_mode-&gt;flags &amp; DRM_MODE_FLAG_NVSYNC)</div><div class='del'>-			lvds_sync |= LVDS_VSYNC_POLARITY;</div><div class='del'>-		if ((temp &amp; (LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY))</div><div class='del'>-		    != lvds_sync) {</div><div class='del'>-			char flags[2] = "-+";</div><div class='del'>-			DRM_INFO("Changing LVDS panel from "</div><div class='del'>-				 "(%chsync, %cvsync) to (%chsync, %cvsync)\n",</div><div class='del'>-				 flags[!(temp &amp; LVDS_HSYNC_POLARITY)],</div><div class='del'>-				 flags[!(temp &amp; LVDS_VSYNC_POLARITY)],</div><div class='del'>-				 flags[!(lvds_sync &amp; LVDS_HSYNC_POLARITY)],</div><div class='del'>-				 flags[!(lvds_sync &amp; LVDS_VSYNC_POLARITY)]);</div><div class='del'>-			temp &amp;= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);</div><div class='del'>-			temp |= lvds_sync;</div><div class='del'>-		}</div><div class='add'>+			temp |= LVDS_VSYNC_POLARITY;</div><div class='ctx'> 		I915_WRITE(PCH_LVDS, temp);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5990,7 +4632,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		pipeconf |= PIPECONF_DITHER_EN;</div><div class='ctx'> 		pipeconf |= PIPECONF_DITHER_TYPE_SP;</div><div class='ctx'> 	}</div><div class='del'>-	if (is_dp || intel_encoder_is_pch_edp(&amp;has_edp_encoder-&gt;base)) {</div><div class='add'>+	if (is_dp &amp;&amp; !is_cpu_edp) {</div><div class='ctx'> 		intel_dp_set_m_n(crtc, mode, adjusted_mode);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* For non-DP output, clear any trans DP clock recovery setting.*/</div><div class='hunk'>@@ -6000,13 +4642,11 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		I915_WRITE(TRANSDPLINK_N1(pipe), 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!intel_crtc-&gt;no_pll &amp;&amp;</div><div class='del'>-	    (!has_edp_encoder ||</div><div class='del'>-	     intel_encoder_is_pch_edp(&amp;has_edp_encoder-&gt;base))) {</div><div class='del'>-		I915_WRITE(PCH_DPLL(pipe), dpll);</div><div class='add'>+	if (intel_crtc-&gt;pch_pll) {</div><div class='add'>+		I915_WRITE(intel_crtc-&gt;pch_pll-&gt;pll_reg, dpll);</div><div class='ctx'> </div><div class='ctx'> 		/* Wait for the clocks to stabilize. */</div><div class='del'>-		POSTING_READ(PCH_DPLL(pipe));</div><div class='add'>+		POSTING_READ(intel_crtc-&gt;pch_pll-&gt;pll_reg);</div><div class='ctx'> 		udelay(150);</div><div class='ctx'> </div><div class='ctx'> 		/* The pixel multiplier can only be updated once the</div><div class='hunk'>@@ -6014,20 +4654,20 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 		 *</div><div class='ctx'> 		 * So write it again.</div><div class='ctx'> 		 */</div><div class='del'>-		I915_WRITE(PCH_DPLL(pipe), dpll);</div><div class='add'>+		I915_WRITE(intel_crtc-&gt;pch_pll-&gt;pll_reg, dpll);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	intel_crtc-&gt;lowfreq_avail = false;</div><div class='del'>-	if (!intel_crtc-&gt;no_pll) {</div><div class='add'>+	if (intel_crtc-&gt;pch_pll) {</div><div class='ctx'> 		if (is_lvds &amp;&amp; has_reduced_clock &amp;&amp; i915_powersave) {</div><div class='del'>-			I915_WRITE(PCH_FP1(pipe), fp2);</div><div class='add'>+			I915_WRITE(intel_crtc-&gt;pch_pll-&gt;fp1_reg, fp2);</div><div class='ctx'> 			intel_crtc-&gt;lowfreq_avail = true;</div><div class='ctx'> 			if (HAS_PIPE_CXSR(dev)) {</div><div class='ctx'> 				DRM_DEBUG_KMS("enabling CxSR downclocking\n");</div><div class='ctx'> 				pipeconf |= PIPECONF_CXSR_DOWNCLOCK;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='del'>-			I915_WRITE(PCH_FP1(pipe), fp);</div><div class='add'>+			I915_WRITE(intel_crtc-&gt;pch_pll-&gt;fp1_reg, fp);</div><div class='ctx'> 			if (HAS_PIPE_CXSR(dev)) {</div><div class='ctx'> 				DRM_DEBUG_KMS("disabling CxSR downclocking\n");</div><div class='ctx'> 				pipeconf &amp;= ~PIPECONF_CXSR_DOWNCLOCK;</div><div class='hunk'>@@ -6080,10 +4720,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> 	I915_WRITE(PIPE_LINK_M1(pipe), m_n.link_m);</div><div class='ctx'> 	I915_WRITE(PIPE_LINK_N1(pipe), m_n.link_n);</div><div class='ctx'> </div><div class='del'>-	if (has_edp_encoder &amp;&amp;</div><div class='del'>-	    !intel_encoder_is_pch_edp(&amp;has_edp_encoder-&gt;base)) {</div><div class='add'>+	if (is_cpu_edp)</div><div class='ctx'> 		ironlake_set_pll_edp(crtc, adjusted_mode-&gt;clock);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	I915_WRITE(PIPECONF(pipe), pipeconf);</div><div class='ctx'> 	POSTING_READ(PIPECONF(pipe));</div><div class='hunk'>@@ -6097,6 +4735,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,</div><div class='ctx'> </div><div class='ctx'> 	intel_update_watermarks(dev);</div><div class='ctx'> </div><div class='add'>+	intel_update_linetime_watermarks(dev, pipe, adjusted_mode);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6451,7 +5091,7 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,</div><div class='ctx'> 	if (!visible &amp;&amp; !intel_crtc-&gt;cursor_visible)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (IS_IVYBRIDGE(dev)) {</div><div class='add'>+	if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) {</div><div class='ctx'> 		I915_WRITE(CURPOS_IVB(pipe), pos);</div><div class='ctx'> 		ivb_update_cursor(crtc, base);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -6461,9 +5101,6 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,</div><div class='ctx'> 		else</div><div class='ctx'> 			i9xx_update_cursor(crtc, base);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (visible)</div><div class='del'>-		intel_mark_busy(dev, to_intel_framebuffer(crtc-&gt;fb)-&gt;obj);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int intel_crtc_cursor_set(struct drm_crtc *crtc,</div><div class='hunk'>@@ -6987,7 +5624,6 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,</div><div class='ctx'> 	mode-&gt;vsync_end = ((vsync &amp; 0xffff0000) &gt;&gt; 16) + 1;</div><div class='ctx'> </div><div class='ctx'> 	drm_mode_set_name(mode);</div><div class='del'>-	drm_mode_set_crtcinfo(mode, 0);</div><div class='ctx'> </div><div class='ctx'> 	return mode;</div><div class='ctx'> }</div><div class='hunk'>@@ -7072,9 +5708,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='del'>-	int pipe = intel_crtc-&gt;pipe;</div><div class='del'>-	int dpll_reg = DPLL(pipe);</div><div class='del'>-	int dpll = I915_READ(dpll_reg);</div><div class='ctx'> </div><div class='ctx'> 	if (HAS_PCH_SPLIT(dev))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -7087,10 +5720,15 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)</div><div class='ctx'> 	 * the manual case.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!HAS_PIPE_CXSR(dev) &amp;&amp; intel_crtc-&gt;lowfreq_avail) {</div><div class='add'>+		int pipe = intel_crtc-&gt;pipe;</div><div class='add'>+		int dpll_reg = DPLL(pipe);</div><div class='add'>+		int dpll;</div><div class='add'>+</div><div class='ctx'> 		DRM_DEBUG_DRIVER("downclocking LVDS\n");</div><div class='ctx'> </div><div class='ctx'> 		assert_panel_unlocked(dev_priv, pipe);</div><div class='ctx'> </div><div class='add'>+		dpll = I915_READ(dpll_reg);</div><div class='ctx'> 		dpll |= DISPLAY_RATE_SELECT_FPA1;</div><div class='ctx'> 		I915_WRITE(dpll_reg, dpll);</div><div class='ctx'> 		intel_wait_for_vblank(dev, pipe);</div><div class='hunk'>@@ -7157,12 +5795,16 @@ void intel_mark_busy(struct drm_device *dev, struct drm_i915_gem_object *obj)</div><div class='ctx'> 	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (!dev_priv-&gt;busy)</div><div class='add'>+	if (!dev_priv-&gt;busy) {</div><div class='add'>+		intel_sanitize_pm(dev);</div><div class='ctx'> 		dev_priv-&gt;busy = true;</div><div class='del'>-	else</div><div class='add'>+	} else</div><div class='ctx'> 		mod_timer(&amp;dev_priv-&gt;idle_timer, jiffies +</div><div class='ctx'> 			  msecs_to_jiffies(GPU_IDLE_TIMEOUT));</div><div class='ctx'> </div><div class='add'>+	if (obj == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry(crtc, &amp;dev-&gt;mode_config.crtc_list, head) {</div><div class='ctx'> 		if (!crtc-&gt;fb)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -7335,18 +5977,19 @@ static int intel_gen2_queue_flip(struct drm_device *dev,</div><div class='ctx'> 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='ctx'> 	unsigned long offset;</div><div class='ctx'> 	u32 flip_mask;</div><div class='add'>+	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));</div><div class='add'>+	ret = intel_pin_and_fence_fb_obj(dev, obj, ring);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		goto err;</div><div class='ctx'> </div><div class='ctx'> 	/* Offset into the new buffer for cases of shared fbs between CRTCs */</div><div class='ctx'> 	offset = crtc-&gt;y * fb-&gt;pitches[0] + crtc-&gt;x * fb-&gt;bits_per_pixel/8;</div><div class='ctx'> </div><div class='del'>-	ret = BEGIN_LP_RING(6);</div><div class='add'>+	ret = intel_ring_begin(ring, 6);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		goto err_unpin;</div><div class='ctx'> </div><div class='ctx'> 	/* Can't queue multiple flips, so wait for the previous</div><div class='ctx'> 	 * one to finish before executing the next.</div><div class='hunk'>@@ -7355,15 +5998,19 @@ static int intel_gen2_queue_flip(struct drm_device *dev,</div><div class='ctx'> 		flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;</div><div class='ctx'> 	else</div><div class='ctx'> 		flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;</div><div class='del'>-	OUT_RING(MI_WAIT_FOR_EVENT | flip_mask);</div><div class='del'>-	OUT_RING(MI_NOOP);</div><div class='del'>-	OUT_RING(MI_DISPLAY_FLIP |</div><div class='del'>-		 MI_DISPLAY_FLIP_PLANE(intel_crtc-&gt;plane));</div><div class='del'>-	OUT_RING(fb-&gt;pitches[0]);</div><div class='del'>-	OUT_RING(obj-&gt;gtt_offset + offset);</div><div class='del'>-	OUT_RING(0); /* aux display base address, unused */</div><div class='del'>-	ADVANCE_LP_RING();</div><div class='del'>-out:</div><div class='add'>+	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | flip_mask);</div><div class='add'>+	intel_ring_emit(ring, MI_NOOP);</div><div class='add'>+	intel_ring_emit(ring, MI_DISPLAY_FLIP |</div><div class='add'>+			MI_DISPLAY_FLIP_PLANE(intel_crtc-&gt;plane));</div><div class='add'>+	intel_ring_emit(ring, fb-&gt;pitches[0]);</div><div class='add'>+	intel_ring_emit(ring, obj-&gt;gtt_offset + offset);</div><div class='add'>+	intel_ring_emit(ring, 0); /* aux display base address, unused */</div><div class='add'>+	intel_ring_advance(ring);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unpin:</div><div class='add'>+	intel_unpin_fb_obj(obj);</div><div class='add'>+err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7376,33 +6023,38 @@ static int intel_gen3_queue_flip(struct drm_device *dev,</div><div class='ctx'> 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='ctx'> 	unsigned long offset;</div><div class='ctx'> 	u32 flip_mask;</div><div class='add'>+	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));</div><div class='add'>+	ret = intel_pin_and_fence_fb_obj(dev, obj, ring);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		goto err;</div><div class='ctx'> </div><div class='ctx'> 	/* Offset into the new buffer for cases of shared fbs between CRTCs */</div><div class='ctx'> 	offset = crtc-&gt;y * fb-&gt;pitches[0] + crtc-&gt;x * fb-&gt;bits_per_pixel/8;</div><div class='ctx'> </div><div class='del'>-	ret = BEGIN_LP_RING(6);</div><div class='add'>+	ret = intel_ring_begin(ring, 6);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		goto err_unpin;</div><div class='ctx'> </div><div class='ctx'> 	if (intel_crtc-&gt;plane)</div><div class='ctx'> 		flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;</div><div class='ctx'> 	else</div><div class='ctx'> 		flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;</div><div class='del'>-	OUT_RING(MI_WAIT_FOR_EVENT | flip_mask);</div><div class='del'>-	OUT_RING(MI_NOOP);</div><div class='del'>-	OUT_RING(MI_DISPLAY_FLIP_I915 |</div><div class='del'>-		 MI_DISPLAY_FLIP_PLANE(intel_crtc-&gt;plane));</div><div class='del'>-	OUT_RING(fb-&gt;pitches[0]);</div><div class='del'>-	OUT_RING(obj-&gt;gtt_offset + offset);</div><div class='del'>-	OUT_RING(MI_NOOP);</div><div class='del'>-</div><div class='del'>-	ADVANCE_LP_RING();</div><div class='del'>-out:</div><div class='add'>+	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | flip_mask);</div><div class='add'>+	intel_ring_emit(ring, MI_NOOP);</div><div class='add'>+	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 |</div><div class='add'>+			MI_DISPLAY_FLIP_PLANE(intel_crtc-&gt;plane));</div><div class='add'>+	intel_ring_emit(ring, fb-&gt;pitches[0]);</div><div class='add'>+	intel_ring_emit(ring, obj-&gt;gtt_offset + offset);</div><div class='add'>+	intel_ring_emit(ring, MI_NOOP);</div><div class='add'>+</div><div class='add'>+	intel_ring_advance(ring);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unpin:</div><div class='add'>+	intel_unpin_fb_obj(obj);</div><div class='add'>+err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7414,24 +6066,25 @@ static int intel_gen4_queue_flip(struct drm_device *dev,</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='ctx'> 	uint32_t pf, pipesrc;</div><div class='add'>+	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));</div><div class='add'>+	ret = intel_pin_and_fence_fb_obj(dev, obj, ring);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		goto err;</div><div class='ctx'> </div><div class='del'>-	ret = BEGIN_LP_RING(4);</div><div class='add'>+	ret = intel_ring_begin(ring, 4);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		goto err_unpin;</div><div class='ctx'> </div><div class='ctx'> 	/* i965+ uses the linear or tiled offsets from the</div><div class='ctx'> 	 * Display Registers (which do not change across a page-flip)</div><div class='ctx'> 	 * so we need only reprogram the base address.</div><div class='ctx'> 	 */</div><div class='del'>-	OUT_RING(MI_DISPLAY_FLIP |</div><div class='del'>-		 MI_DISPLAY_FLIP_PLANE(intel_crtc-&gt;plane));</div><div class='del'>-	OUT_RING(fb-&gt;pitches[0]);</div><div class='del'>-	OUT_RING(obj-&gt;gtt_offset | obj-&gt;tiling_mode);</div><div class='add'>+	intel_ring_emit(ring, MI_DISPLAY_FLIP |</div><div class='add'>+			MI_DISPLAY_FLIP_PLANE(intel_crtc-&gt;plane));</div><div class='add'>+	intel_ring_emit(ring, fb-&gt;pitches[0]);</div><div class='add'>+	intel_ring_emit(ring, obj-&gt;gtt_offset | obj-&gt;tiling_mode);</div><div class='ctx'> </div><div class='ctx'> 	/* XXX Enabling the panel-fitter across page-flip is so far</div><div class='ctx'> 	 * untested on non-native modes, so ignore it for now.</div><div class='hunk'>@@ -7439,9 +6092,13 @@ static int intel_gen4_queue_flip(struct drm_device *dev,</div><div class='ctx'> 	 */</div><div class='ctx'> 	pf = 0;</div><div class='ctx'> 	pipesrc = I915_READ(PIPESRC(intel_crtc-&gt;pipe)) &amp; 0x0fff0fff;</div><div class='del'>-	OUT_RING(pf | pipesrc);</div><div class='del'>-	ADVANCE_LP_RING();</div><div class='del'>-out:</div><div class='add'>+	intel_ring_emit(ring, pf | pipesrc);</div><div class='add'>+	intel_ring_advance(ring);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unpin:</div><div class='add'>+	intel_unpin_fb_obj(obj);</div><div class='add'>+err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7452,21 +6109,22 @@ static int intel_gen6_queue_flip(struct drm_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> 	uint32_t pf, pipesrc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));</div><div class='add'>+	ret = intel_pin_and_fence_fb_obj(dev, obj, ring);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		goto err;</div><div class='ctx'> </div><div class='del'>-	ret = BEGIN_LP_RING(4);</div><div class='add'>+	ret = intel_ring_begin(ring, 4);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		goto err_unpin;</div><div class='ctx'> </div><div class='del'>-	OUT_RING(MI_DISPLAY_FLIP |</div><div class='del'>-		 MI_DISPLAY_FLIP_PLANE(intel_crtc-&gt;plane));</div><div class='del'>-	OUT_RING(fb-&gt;pitches[0] | obj-&gt;tiling_mode);</div><div class='del'>-	OUT_RING(obj-&gt;gtt_offset);</div><div class='add'>+	intel_ring_emit(ring, MI_DISPLAY_FLIP |</div><div class='add'>+			MI_DISPLAY_FLIP_PLANE(intel_crtc-&gt;plane));</div><div class='add'>+	intel_ring_emit(ring, fb-&gt;pitches[0] | obj-&gt;tiling_mode);</div><div class='add'>+	intel_ring_emit(ring, obj-&gt;gtt_offset);</div><div class='ctx'> </div><div class='ctx'> 	/* Contrary to the suggestions in the documentation,</div><div class='ctx'> 	 * "Enable Panel Fitter" does not seem to be required when page</div><div class='hunk'>@@ -7476,9 +6134,13 @@ static int intel_gen6_queue_flip(struct drm_device *dev,</div><div class='ctx'> 	 */</div><div class='ctx'> 	pf = 0;</div><div class='ctx'> 	pipesrc = I915_READ(PIPESRC(intel_crtc-&gt;pipe)) &amp; 0x0fff0fff;</div><div class='del'>-	OUT_RING(pf | pipesrc);</div><div class='del'>-	ADVANCE_LP_RING();</div><div class='del'>-out:</div><div class='add'>+	intel_ring_emit(ring, pf | pipesrc);</div><div class='add'>+	intel_ring_advance(ring);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unpin:</div><div class='add'>+	intel_unpin_fb_obj(obj);</div><div class='add'>+err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7496,22 +6158,43 @@ static int intel_gen7_queue_flip(struct drm_device *dev,</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='ctx'> 	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[BCS];</div><div class='add'>+	uint32_t plane_bit = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = intel_pin_and_fence_fb_obj(dev, obj, ring);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	switch(intel_crtc-&gt;plane) {</div><div class='add'>+	case PLANE_A:</div><div class='add'>+		plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_A;</div><div class='add'>+		break;</div><div class='add'>+	case PLANE_B:</div><div class='add'>+		plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_B;</div><div class='add'>+		break;</div><div class='add'>+	case PLANE_C:</div><div class='add'>+		plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_C;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(1, "unknown plane in flip command\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = intel_ring_begin(ring, 4);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		goto err_unpin;</div><div class='ctx'> </div><div class='del'>-	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc-&gt;plane &lt;&lt; 19));</div><div class='add'>+	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | plane_bit);</div><div class='ctx'> 	intel_ring_emit(ring, (fb-&gt;pitches[0] | obj-&gt;tiling_mode));</div><div class='ctx'> 	intel_ring_emit(ring, (obj-&gt;gtt_offset));</div><div class='ctx'> 	intel_ring_emit(ring, (MI_NOOP));</div><div class='ctx'> 	intel_ring_advance(ring);</div><div class='del'>-out:</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unpin:</div><div class='add'>+	intel_unpin_fb_obj(obj);</div><div class='add'>+err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7588,6 +6271,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,</div><div class='ctx'> 		goto cleanup_pending;</div><div class='ctx'> </div><div class='ctx'> 	intel_disable_fbc(dev);</div><div class='add'>+	intel_mark_busy(dev, obj);</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='ctx'> 	trace_i915_flip_request(intel_crtc-&gt;plane, obj);</div><div class='hunk'>@@ -7616,10 +6300,11 @@ static void intel_sanitize_modesetting(struct drm_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	u32 reg, val;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear any frame start delays used for debugging left by the BIOS */</div><div class='del'>-	for_each_pipe(pipe) {</div><div class='del'>-		reg = PIPECONF(pipe);</div><div class='add'>+	for_each_pipe(i) {</div><div class='add'>+		reg = PIPECONF(i);</div><div class='ctx'> 		I915_WRITE(reg, I915_READ(reg) &amp; ~PIPECONF_FRAME_START_DELAY_MASK);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7689,6 +6374,23 @@ static const struct drm_crtc_funcs intel_crtc_funcs = {</div><div class='ctx'> 	.page_flip = intel_crtc_page_flip,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void intel_pch_pll_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;num_pch_pll == 0) {</div><div class='add'>+		DRM_DEBUG_KMS("No PCH PLLs on this hardware, skipping initialisation\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev_priv-&gt;num_pch_pll; i++) {</div><div class='add'>+		dev_priv-&gt;pch_plls[i].pll_reg = _PCH_DPLL(i);</div><div class='add'>+		dev_priv-&gt;pch_plls[i].fp0_reg = _PCH_FP0(i);</div><div class='add'>+		dev_priv-&gt;pch_plls[i].fp1_reg = _PCH_FP1(i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void intel_crtc_init(struct drm_device *dev, int pipe)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='hunk'>@@ -7726,8 +6428,6 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)</div><div class='ctx'> 	intel_crtc-&gt;bpp = 24; /* default for pre-Ironlake */</div><div class='ctx'> </div><div class='ctx'> 	if (HAS_PCH_SPLIT(dev)) {</div><div class='del'>-		if (pipe == 2 &amp;&amp; IS_IVYBRIDGE(dev))</div><div class='del'>-			intel_crtc-&gt;no_pll = true;</div><div class='ctx'> 		intel_helper_funcs.prepare = ironlake_crtc_prepare;</div><div class='ctx'> 		intel_helper_funcs.commit = ironlake_crtc_commit;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -7746,15 +6446,12 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)</div><div class='ctx'> int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,</div><div class='ctx'> 				struct drm_file *file)</div><div class='ctx'> {</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_i915_get_pipe_from_crtc_id *pipe_from_crtc_id = data;</div><div class='ctx'> 	struct drm_mode_object *drmmode_obj;</div><div class='ctx'> 	struct intel_crtc *crtc;</div><div class='ctx'> </div><div class='del'>-	if (!dev_priv) {</div><div class='del'>-		DRM_ERROR("called with no initialization\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	drmmode_obj = drm_mode_object_find(dev, pipe_from_crtc_id-&gt;crtc_id,</div><div class='ctx'> 			DRM_MODE_OBJECT_CRTC);</div><div class='hunk'>@@ -7827,12 +6524,31 @@ static void intel_setup_outputs(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	intel_crt_init(dev);</div><div class='ctx'> </div><div class='del'>-	if (HAS_PCH_SPLIT(dev)) {</div><div class='add'>+	if (IS_HASWELL(dev)) {</div><div class='add'>+		int found;</div><div class='add'>+</div><div class='add'>+		/* Haswell uses DDI functions to detect digital outputs */</div><div class='add'>+		found = I915_READ(DDI_BUF_CTL_A) &amp; DDI_INIT_DISPLAY_DETECTED;</div><div class='add'>+		/* DDI A only supports eDP */</div><div class='add'>+		if (found)</div><div class='add'>+			intel_ddi_init(dev, PORT_A);</div><div class='add'>+</div><div class='add'>+		/* DDI B, C and D detection is indicated by the SFUSE_STRAP</div><div class='add'>+		 * register */</div><div class='add'>+		found = I915_READ(SFUSE_STRAP);</div><div class='add'>+</div><div class='add'>+		if (found &amp; SFUSE_STRAP_DDIB_DETECTED)</div><div class='add'>+			intel_ddi_init(dev, PORT_B);</div><div class='add'>+		if (found &amp; SFUSE_STRAP_DDIC_DETECTED)</div><div class='add'>+			intel_ddi_init(dev, PORT_C);</div><div class='add'>+		if (found &amp; SFUSE_STRAP_DDID_DETECTED)</div><div class='add'>+			intel_ddi_init(dev, PORT_D);</div><div class='add'>+	} else if (HAS_PCH_SPLIT(dev)) {</div><div class='ctx'> 		int found;</div><div class='ctx'> </div><div class='ctx'> 		if (I915_READ(HDMIB) &amp; PORT_DETECTED) {</div><div class='ctx'> 			/* PCH SDVOB multiplex with HDMIB */</div><div class='del'>-			found = intel_sdvo_init(dev, PCH_SDVOB);</div><div class='add'>+			found = intel_sdvo_init(dev, PCH_SDVOB, true);</div><div class='ctx'> 			if (!found)</div><div class='ctx'> 				intel_hdmi_init(dev, HDMIB);</div><div class='ctx'> 			if (!found &amp;&amp; (I915_READ(PCH_DP_B) &amp; DP_DETECTED))</div><div class='hunk'>@@ -7856,7 +6572,7 @@ static void intel_setup_outputs(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 		if (I915_READ(SDVOB) &amp; SDVO_DETECTED) {</div><div class='ctx'> 			DRM_DEBUG_KMS("probing SDVOB\n");</div><div class='del'>-			found = intel_sdvo_init(dev, SDVOB);</div><div class='add'>+			found = intel_sdvo_init(dev, SDVOB, true);</div><div class='ctx'> 			if (!found &amp;&amp; SUPPORTS_INTEGRATED_HDMI(dev)) {</div><div class='ctx'> 				DRM_DEBUG_KMS("probing HDMI on SDVOB\n");</div><div class='ctx'> 				intel_hdmi_init(dev, SDVOB);</div><div class='hunk'>@@ -7872,7 +6588,7 @@ static void intel_setup_outputs(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 		if (I915_READ(SDVOB) &amp; SDVO_DETECTED) {</div><div class='ctx'> 			DRM_DEBUG_KMS("probing SDVOC\n");</div><div class='del'>-			found = intel_sdvo_init(dev, SDVOC);</div><div class='add'>+			found = intel_sdvo_init(dev, SDVOC, false);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!found &amp;&amp; (I915_READ(SDVOC) &amp; SDVO_DETECTED)) {</div><div class='hunk'>@@ -8001,882 +6717,6 @@ static const struct drm_mode_config_funcs intel_mode_funcs = {</div><div class='ctx'> 	.output_poll_changed = intel_fb_output_poll_changed,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct drm_i915_gem_object *</div><div class='del'>-intel_alloc_context_page(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_gem_object *ctx;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	WARN_ON(!mutex_is_locked(&amp;dev-&gt;struct_mutex));</div><div class='del'>-</div><div class='del'>-	ctx = i915_gem_alloc_object(dev, 4096);</div><div class='del'>-	if (!ctx) {</div><div class='del'>-		DRM_DEBUG("failed to alloc power context, RC6 disabled\n");</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = i915_gem_object_pin(ctx, 4096, true);</div><div class='del'>-	if (ret) {</div><div class='del'>-		DRM_ERROR("failed to pin power context: %d\n", ret);</div><div class='del'>-		goto err_unref;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = i915_gem_object_set_to_gtt_domain(ctx, 1);</div><div class='del'>-	if (ret) {</div><div class='del'>-		DRM_ERROR("failed to set-domain on power context: %d\n", ret);</div><div class='del'>-		goto err_unpin;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ctx;</div><div class='del'>-</div><div class='del'>-err_unpin:</div><div class='del'>-	i915_gem_object_unpin(ctx);</div><div class='del'>-err_unref:</div><div class='del'>-	drm_gem_object_unreference(&amp;ctx-&gt;base);</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool ironlake_set_drps(struct drm_device *dev, u8 val)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u16 rgvswctl;</div><div class='del'>-</div><div class='del'>-	rgvswctl = I915_READ16(MEMSWCTL);</div><div class='del'>-	if (rgvswctl &amp; MEMCTL_CMD_STS) {</div><div class='del'>-		DRM_DEBUG("gpu busy, RCS change rejected\n");</div><div class='del'>-		return false; /* still busy with another command */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rgvswctl = (MEMCTL_CMD_CHFREQ &lt;&lt; MEMCTL_CMD_SHIFT) |</div><div class='del'>-		(val &lt;&lt; MEMCTL_FREQ_SHIFT) | MEMCTL_SFCAVM;</div><div class='del'>-	I915_WRITE16(MEMSWCTL, rgvswctl);</div><div class='del'>-	POSTING_READ16(MEMSWCTL);</div><div class='del'>-</div><div class='del'>-	rgvswctl |= MEMCTL_CMD_STS;</div><div class='del'>-	I915_WRITE16(MEMSWCTL, rgvswctl);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ironlake_enable_drps(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 rgvmodectl = I915_READ(MEMMODECTL);</div><div class='del'>-	u8 fmax, fmin, fstart, vstart;</div><div class='del'>-</div><div class='del'>-	/* Enable temp reporting */</div><div class='del'>-	I915_WRITE16(PMMISC, I915_READ(PMMISC) | MCPPCE_EN);</div><div class='del'>-	I915_WRITE16(TSC1, I915_READ(TSC1) | TSE);</div><div class='del'>-</div><div class='del'>-	/* 100ms RC evaluation intervals */</div><div class='del'>-	I915_WRITE(RCUPEI, 100000);</div><div class='del'>-	I915_WRITE(RCDNEI, 100000);</div><div class='del'>-</div><div class='del'>-	/* Set max/min thresholds to 90ms and 80ms respectively */</div><div class='del'>-	I915_WRITE(RCBMAXAVG, 90000);</div><div class='del'>-	I915_WRITE(RCBMINAVG, 80000);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(MEMIHYST, 1);</div><div class='del'>-</div><div class='del'>-	/* Set up min, max, and cur for interrupt handling */</div><div class='del'>-	fmax = (rgvmodectl &amp; MEMMODE_FMAX_MASK) &gt;&gt; MEMMODE_FMAX_SHIFT;</div><div class='del'>-	fmin = (rgvmodectl &amp; MEMMODE_FMIN_MASK);</div><div class='del'>-	fstart = (rgvmodectl &amp; MEMMODE_FSTART_MASK) &gt;&gt;</div><div class='del'>-		MEMMODE_FSTART_SHIFT;</div><div class='del'>-</div><div class='del'>-	vstart = (I915_READ(PXVFREQ_BASE + (fstart * 4)) &amp; PXVFREQ_PX_MASK) &gt;&gt;</div><div class='del'>-		PXVFREQ_PX_SHIFT;</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;fmax = fmax; /* IPS callback will increase this */</div><div class='del'>-	dev_priv-&gt;fstart = fstart;</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;max_delay = fstart;</div><div class='del'>-	dev_priv-&gt;min_delay = fmin;</div><div class='del'>-	dev_priv-&gt;cur_delay = fstart;</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG_DRIVER("fmax: %d, fmin: %d, fstart: %d\n",</div><div class='del'>-			 fmax, fmin, fstart);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(MEMINTREN, MEMINT_CX_SUPR_EN | MEMINT_EVAL_CHG_EN);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Interrupts will be enabled in ironlake_irq_postinstall</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	I915_WRITE(VIDSTART, vstart);</div><div class='del'>-	POSTING_READ(VIDSTART);</div><div class='del'>-</div><div class='del'>-	rgvmodectl |= MEMMODE_SWMODE_EN;</div><div class='del'>-	I915_WRITE(MEMMODECTL, rgvmodectl);</div><div class='del'>-</div><div class='del'>-	if (wait_for((I915_READ(MEMSWCTL) &amp; MEMCTL_CMD_STS) == 0, 10))</div><div class='del'>-		DRM_ERROR("stuck trying to change perf mode\n");</div><div class='del'>-	msleep(1);</div><div class='del'>-</div><div class='del'>-	ironlake_set_drps(dev, fstart);</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;last_count1 = I915_READ(0x112e4) + I915_READ(0x112e8) +</div><div class='del'>-		I915_READ(0x112e0);</div><div class='del'>-	dev_priv-&gt;last_time1 = jiffies_to_msecs(jiffies);</div><div class='del'>-	dev_priv-&gt;last_count2 = I915_READ(0x112f4);</div><div class='del'>-	getrawmonotonic(&amp;dev_priv-&gt;last_time2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ironlake_disable_drps(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u16 rgvswctl = I915_READ16(MEMSWCTL);</div><div class='del'>-</div><div class='del'>-	/* Ack interrupts, disable EFC interrupt */</div><div class='del'>-	I915_WRITE(MEMINTREN, I915_READ(MEMINTREN) &amp; ~MEMINT_EVAL_CHG_EN);</div><div class='del'>-	I915_WRITE(MEMINTRSTS, MEMINT_EVAL_CHG);</div><div class='del'>-	I915_WRITE(DEIER, I915_READ(DEIER) &amp; ~DE_PCU_EVENT);</div><div class='del'>-	I915_WRITE(DEIIR, DE_PCU_EVENT);</div><div class='del'>-	I915_WRITE(DEIMR, I915_READ(DEIMR) | DE_PCU_EVENT);</div><div class='del'>-</div><div class='del'>-	/* Go back to the starting frequency */</div><div class='del'>-	ironlake_set_drps(dev, dev_priv-&gt;fstart);</div><div class='del'>-	msleep(1);</div><div class='del'>-	rgvswctl |= MEMCTL_CMD_STS;</div><div class='del'>-	I915_WRITE(MEMSWCTL, rgvswctl);</div><div class='del'>-	msleep(1);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void gen6_set_rps(struct drm_device *dev, u8 val)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 swreq;</div><div class='del'>-</div><div class='del'>-	swreq = (val &amp; 0x3ff) &lt;&lt; 25;</div><div class='del'>-	I915_WRITE(GEN6_RPNSWREQ, swreq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void gen6_disable_rps(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(GEN6_RPNSWREQ, 1 &lt;&lt; 31);</div><div class='del'>-	I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);</div><div class='del'>-	I915_WRITE(GEN6_PMIER, 0);</div><div class='del'>-	/* Complete PM interrupt masking here doesn't race with the rps work</div><div class='del'>-	 * item again unmasking PM interrupts because that is using a different</div><div class='del'>-	 * register (PMIMR) to mask PM interrupts. The only risk is in leaving</div><div class='del'>-	 * stale bits in PMIIR and PMIMR which gen6_enable_rps will clean up. */</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;dev_priv-&gt;rps_lock);</div><div class='del'>-	dev_priv-&gt;pm_iir = 0;</div><div class='del'>-	spin_unlock_irq(&amp;dev_priv-&gt;rps_lock);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long intel_pxfreq(u32 vidfreq)</div><div class='del'>-{</div><div class='del'>-	unsigned long freq;</div><div class='del'>-	int div = (vidfreq &amp; 0x3f0000) &gt;&gt; 16;</div><div class='del'>-	int post = (vidfreq &amp; 0x3000) &gt;&gt; 12;</div><div class='del'>-	int pre = (vidfreq &amp; 0x7);</div><div class='del'>-</div><div class='del'>-	if (!pre)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	freq = ((div * 133333) / ((1&lt;&lt;post) * pre));</div><div class='del'>-</div><div class='del'>-	return freq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void intel_init_emon(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 lcfuse;</div><div class='del'>-	u8 pxw[16];</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Disable to program */</div><div class='del'>-	I915_WRITE(ECR, 0);</div><div class='del'>-	POSTING_READ(ECR);</div><div class='del'>-</div><div class='del'>-	/* Program energy weights for various events */</div><div class='del'>-	I915_WRITE(SDEW, 0x15040d00);</div><div class='del'>-	I915_WRITE(CSIEW0, 0x007f0000);</div><div class='del'>-	I915_WRITE(CSIEW1, 0x1e220004);</div><div class='del'>-	I915_WRITE(CSIEW2, 0x04000004);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 5; i++)</div><div class='del'>-		I915_WRITE(PEW + (i * 4), 0);</div><div class='del'>-	for (i = 0; i &lt; 3; i++)</div><div class='del'>-		I915_WRITE(DEW + (i * 4), 0);</div><div class='del'>-</div><div class='del'>-	/* Program P-state weights to account for frequency power adjustment */</div><div class='del'>-	for (i = 0; i &lt; 16; i++) {</div><div class='del'>-		u32 pxvidfreq = I915_READ(PXVFREQ_BASE + (i * 4));</div><div class='del'>-		unsigned long freq = intel_pxfreq(pxvidfreq);</div><div class='del'>-		unsigned long vid = (pxvidfreq &amp; PXVFREQ_PX_MASK) &gt;&gt;</div><div class='del'>-			PXVFREQ_PX_SHIFT;</div><div class='del'>-		unsigned long val;</div><div class='del'>-</div><div class='del'>-		val = vid * vid;</div><div class='del'>-		val *= (freq / 1000);</div><div class='del'>-		val *= 255;</div><div class='del'>-		val /= (127*127*900);</div><div class='del'>-		if (val &gt; 0xff)</div><div class='del'>-			DRM_ERROR("bad pxval: %ld\n", val);</div><div class='del'>-		pxw[i] = val;</div><div class='del'>-	}</div><div class='del'>-	/* Render standby states get 0 weight */</div><div class='del'>-	pxw[14] = 0;</div><div class='del'>-	pxw[15] = 0;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 4; i++) {</div><div class='del'>-		u32 val = (pxw[i*4] &lt;&lt; 24) | (pxw[(i*4)+1] &lt;&lt; 16) |</div><div class='del'>-			(pxw[(i*4)+2] &lt;&lt; 8) | (pxw[(i*4)+3]);</div><div class='del'>-		I915_WRITE(PXW + (i * 4), val);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Adjust magic regs to magic values (more experimental results) */</div><div class='del'>-	I915_WRITE(OGW0, 0);</div><div class='del'>-	I915_WRITE(OGW1, 0);</div><div class='del'>-	I915_WRITE(EG0, 0x00007f00);</div><div class='del'>-	I915_WRITE(EG1, 0x0000000e);</div><div class='del'>-	I915_WRITE(EG2, 0x000e0000);</div><div class='del'>-	I915_WRITE(EG3, 0x68000300);</div><div class='del'>-	I915_WRITE(EG4, 0x42000000);</div><div class='del'>-	I915_WRITE(EG5, 0x00140031);</div><div class='del'>-	I915_WRITE(EG6, 0);</div><div class='del'>-	I915_WRITE(EG7, 0);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 8; i++)</div><div class='del'>-		I915_WRITE(PXWL + (i * 4), 0);</div><div class='del'>-</div><div class='del'>-	/* Enable PMON + select events */</div><div class='del'>-	I915_WRITE(ECR, 0x80000019);</div><div class='del'>-</div><div class='del'>-	lcfuse = I915_READ(LCFUSE02);</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;corr = (lcfuse &amp; LCFUSE_HIV_MASK);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int intel_enable_rc6(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Respect the kernel parameter if it is set</div><div class='del'>-	 */</div><div class='del'>-	if (i915_enable_rc6 &gt;= 0)</div><div class='del'>-		return i915_enable_rc6;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Disable RC6 on Ironlake</div><div class='del'>-	 */</div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen == 5)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Disable rc6 on Sandybridge</div><div class='del'>-	 */</div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen == 6) {</div><div class='del'>-		DRM_DEBUG_DRIVER("Sandybridge: deep RC6 disabled\n");</div><div class='del'>-		return INTEL_RC6_ENABLE;</div><div class='del'>-	}</div><div class='del'>-	DRM_DEBUG_DRIVER("RC6 and deep RC6 enabled\n");</div><div class='del'>-	return (INTEL_RC6_ENABLE | INTEL_RC6p_ENABLE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void gen6_enable_rps(struct drm_i915_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-	u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);</div><div class='del'>-	u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);</div><div class='del'>-	u32 pcu_mbox, rc6_mask = 0;</div><div class='del'>-	u32 gtfifodbg;</div><div class='del'>-	int cur_freq, min_freq, max_freq;</div><div class='del'>-	int rc6_mode;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Here begins a magic sequence of register writes to enable</div><div class='del'>-	 * auto-downclocking.</div><div class='del'>-	 *</div><div class='del'>-	 * Perhaps there might be some value in exposing these to</div><div class='del'>-	 * userspace...</div><div class='del'>-	 */</div><div class='del'>-	I915_WRITE(GEN6_RC_STATE, 0);</div><div class='del'>-	mutex_lock(&amp;dev_priv-&gt;dev-&gt;struct_mutex);</div><div class='del'>-</div><div class='del'>-	/* Clear the DBG now so we don't confuse earlier errors */</div><div class='del'>-	if ((gtfifodbg = I915_READ(GTFIFODBG))) {</div><div class='del'>-		DRM_ERROR("GT fifo had a previous error %x\n", gtfifodbg);</div><div class='del'>-		I915_WRITE(GTFIFODBG, gtfifodbg);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gen6_gt_force_wake_get(dev_priv);</div><div class='del'>-</div><div class='del'>-	/* disable the counters and set deterministic thresholds */</div><div class='del'>-	I915_WRITE(GEN6_RC_CONTROL, 0);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(GEN6_RC1_WAKE_RATE_LIMIT, 1000 &lt;&lt; 16);</div><div class='del'>-	I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 40 &lt;&lt; 16 | 30);</div><div class='del'>-	I915_WRITE(GEN6_RC6pp_WAKE_RATE_LIMIT, 30);</div><div class='del'>-	I915_WRITE(GEN6_RC_EVALUATION_INTERVAL, 125000);</div><div class='del'>-	I915_WRITE(GEN6_RC_IDLE_HYSTERSIS, 25);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; I915_NUM_RINGS; i++)</div><div class='del'>-		I915_WRITE(RING_MAX_IDLE(dev_priv-&gt;ring[i].mmio_base), 10);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(GEN6_RC_SLEEP, 0);</div><div class='del'>-	I915_WRITE(GEN6_RC1e_THRESHOLD, 1000);</div><div class='del'>-	I915_WRITE(GEN6_RC6_THRESHOLD, 50000);</div><div class='del'>-	I915_WRITE(GEN6_RC6p_THRESHOLD, 100000);</div><div class='del'>-	I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */</div><div class='del'>-</div><div class='del'>-	rc6_mode = intel_enable_rc6(dev_priv-&gt;dev);</div><div class='del'>-	if (rc6_mode &amp; INTEL_RC6_ENABLE)</div><div class='del'>-		rc6_mask |= GEN6_RC_CTL_RC6_ENABLE;</div><div class='del'>-</div><div class='del'>-	if (rc6_mode &amp; INTEL_RC6p_ENABLE)</div><div class='del'>-		rc6_mask |= GEN6_RC_CTL_RC6p_ENABLE;</div><div class='del'>-</div><div class='del'>-	if (rc6_mode &amp; INTEL_RC6pp_ENABLE)</div><div class='del'>-		rc6_mask |= GEN6_RC_CTL_RC6pp_ENABLE;</div><div class='del'>-</div><div class='del'>-	DRM_INFO("Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n",</div><div class='del'>-			(rc6_mode &amp; INTEL_RC6_ENABLE) ? "on" : "off",</div><div class='del'>-			(rc6_mode &amp; INTEL_RC6p_ENABLE) ? "on" : "off",</div><div class='del'>-			(rc6_mode &amp; INTEL_RC6pp_ENABLE) ? "on" : "off");</div><div class='del'>-</div><div class='del'>-	I915_WRITE(GEN6_RC_CONTROL,</div><div class='del'>-		   rc6_mask |</div><div class='del'>-		   GEN6_RC_CTL_EI_MODE(1) |</div><div class='del'>-		   GEN6_RC_CTL_HW_ENABLE);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(GEN6_RPNSWREQ,</div><div class='del'>-		   GEN6_FREQUENCY(10) |</div><div class='del'>-		   GEN6_OFFSET(0) |</div><div class='del'>-		   GEN6_AGGRESSIVE_TURBO);</div><div class='del'>-	I915_WRITE(GEN6_RC_VIDEO_FREQ,</div><div class='del'>-		   GEN6_FREQUENCY(12));</div><div class='del'>-</div><div class='del'>-	I915_WRITE(GEN6_RP_DOWN_TIMEOUT, 1000000);</div><div class='del'>-	I915_WRITE(GEN6_RP_INTERRUPT_LIMITS,</div><div class='del'>-		   18 &lt;&lt; 24 |</div><div class='del'>-		   6 &lt;&lt; 16);</div><div class='del'>-	I915_WRITE(GEN6_RP_UP_THRESHOLD, 10000);</div><div class='del'>-	I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 1000000);</div><div class='del'>-	I915_WRITE(GEN6_RP_UP_EI, 100000);</div><div class='del'>-	I915_WRITE(GEN6_RP_DOWN_EI, 5000000);</div><div class='del'>-	I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);</div><div class='del'>-	I915_WRITE(GEN6_RP_CONTROL,</div><div class='del'>-		   GEN6_RP_MEDIA_TURBO |</div><div class='del'>-		   GEN6_RP_MEDIA_HW_MODE |</div><div class='del'>-		   GEN6_RP_MEDIA_IS_GFX |</div><div class='del'>-		   GEN6_RP_ENABLE |</div><div class='del'>-		   GEN6_RP_UP_BUSY_AVG |</div><div class='del'>-		   GEN6_RP_DOWN_IDLE_CONT);</div><div class='del'>-</div><div class='del'>-	if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &amp; GEN6_PCODE_READY) == 0,</div><div class='del'>-		     500))</div><div class='del'>-		DRM_ERROR("timeout waiting for pcode mailbox to become idle\n");</div><div class='del'>-</div><div class='del'>-	I915_WRITE(GEN6_PCODE_DATA, 0);</div><div class='del'>-	I915_WRITE(GEN6_PCODE_MAILBOX,</div><div class='del'>-		   GEN6_PCODE_READY |</div><div class='del'>-		   GEN6_PCODE_WRITE_MIN_FREQ_TABLE);</div><div class='del'>-	if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &amp; GEN6_PCODE_READY) == 0,</div><div class='del'>-		     500))</div><div class='del'>-		DRM_ERROR("timeout waiting for pcode mailbox to finish\n");</div><div class='del'>-</div><div class='del'>-	min_freq = (rp_state_cap &amp; 0xff0000) &gt;&gt; 16;</div><div class='del'>-	max_freq = rp_state_cap &amp; 0xff;</div><div class='del'>-	cur_freq = (gt_perf_status &amp; 0xff00) &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-	/* Check for overclock support */</div><div class='del'>-	if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &amp; GEN6_PCODE_READY) == 0,</div><div class='del'>-		     500))</div><div class='del'>-		DRM_ERROR("timeout waiting for pcode mailbox to become idle\n");</div><div class='del'>-	I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_READ_OC_PARAMS);</div><div class='del'>-	pcu_mbox = I915_READ(GEN6_PCODE_DATA);</div><div class='del'>-	if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &amp; GEN6_PCODE_READY) == 0,</div><div class='del'>-		     500))</div><div class='del'>-		DRM_ERROR("timeout waiting for pcode mailbox to finish\n");</div><div class='del'>-	if (pcu_mbox &amp; (1&lt;&lt;31)) { /* OC supported */</div><div class='del'>-		max_freq = pcu_mbox &amp; 0xff;</div><div class='del'>-		DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max to %dMHz\n", pcu_mbox * 50);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* In units of 100MHz */</div><div class='del'>-	dev_priv-&gt;max_delay = max_freq;</div><div class='del'>-	dev_priv-&gt;min_delay = min_freq;</div><div class='del'>-	dev_priv-&gt;cur_delay = cur_freq;</div><div class='del'>-</div><div class='del'>-	/* requires MSI enabled */</div><div class='del'>-	I915_WRITE(GEN6_PMIER,</div><div class='del'>-		   GEN6_PM_MBOX_EVENT |</div><div class='del'>-		   GEN6_PM_THERMAL_EVENT |</div><div class='del'>-		   GEN6_PM_RP_DOWN_TIMEOUT |</div><div class='del'>-		   GEN6_PM_RP_UP_THRESHOLD |</div><div class='del'>-		   GEN6_PM_RP_DOWN_THRESHOLD |</div><div class='del'>-		   GEN6_PM_RP_UP_EI_EXPIRED |</div><div class='del'>-		   GEN6_PM_RP_DOWN_EI_EXPIRED);</div><div class='del'>-	spin_lock_irq(&amp;dev_priv-&gt;rps_lock);</div><div class='del'>-	WARN_ON(dev_priv-&gt;pm_iir != 0);</div><div class='del'>-	I915_WRITE(GEN6_PMIMR, 0);</div><div class='del'>-	spin_unlock_irq(&amp;dev_priv-&gt;rps_lock);</div><div class='del'>-	/* enable all PM interrupts */</div><div class='del'>-	I915_WRITE(GEN6_PMINTRMSK, 0);</div><div class='del'>-</div><div class='del'>-	gen6_gt_force_wake_put(dev_priv);</div><div class='del'>-	mutex_unlock(&amp;dev_priv-&gt;dev-&gt;struct_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void gen6_update_ring_freq(struct drm_i915_private *dev_priv)</div><div class='del'>-{</div><div class='del'>-	int min_freq = 15;</div><div class='del'>-	int gpu_freq, ia_freq, max_ia_freq;</div><div class='del'>-	int scaling_factor = 180;</div><div class='del'>-</div><div class='del'>-	max_ia_freq = cpufreq_quick_get_max(0);</div><div class='del'>-	/*</div><div class='del'>-	 * Default to measured freq if none found, PCU will ensure we don't go</div><div class='del'>-	 * over</div><div class='del'>-	 */</div><div class='del'>-	if (!max_ia_freq)</div><div class='del'>-		max_ia_freq = tsc_khz;</div><div class='del'>-</div><div class='del'>-	/* Convert from kHz to MHz */</div><div class='del'>-	max_ia_freq /= 1000;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;dev_priv-&gt;dev-&gt;struct_mutex);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * For each potential GPU frequency, load a ring frequency we'd like</div><div class='del'>-	 * to use for memory access.  We do this by specifying the IA frequency</div><div class='del'>-	 * the PCU should use as a reference to determine the ring frequency.</div><div class='del'>-	 */</div><div class='del'>-	for (gpu_freq = dev_priv-&gt;max_delay; gpu_freq &gt;= dev_priv-&gt;min_delay;</div><div class='del'>-	     gpu_freq--) {</div><div class='del'>-		int diff = dev_priv-&gt;max_delay - gpu_freq;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * For GPU frequencies less than 750MHz, just use the lowest</div><div class='del'>-		 * ring freq.</div><div class='del'>-		 */</div><div class='del'>-		if (gpu_freq &lt; min_freq)</div><div class='del'>-			ia_freq = 800;</div><div class='del'>-		else</div><div class='del'>-			ia_freq = max_ia_freq - ((diff * scaling_factor) / 2);</div><div class='del'>-		ia_freq = DIV_ROUND_CLOSEST(ia_freq, 100);</div><div class='del'>-</div><div class='del'>-		I915_WRITE(GEN6_PCODE_DATA,</div><div class='del'>-			   (ia_freq &lt;&lt; GEN6_PCODE_FREQ_IA_RATIO_SHIFT) |</div><div class='del'>-			   gpu_freq);</div><div class='del'>-		I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |</div><div class='del'>-			   GEN6_PCODE_WRITE_MIN_FREQ_TABLE);</div><div class='del'>-		if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &amp;</div><div class='del'>-			      GEN6_PCODE_READY) == 0, 10)) {</div><div class='del'>-			DRM_ERROR("pcode write of freq table timed out\n");</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;dev_priv-&gt;dev-&gt;struct_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ironlake_init_clock_gating(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE;</div><div class='del'>-</div><div class='del'>-	/* Required for FBC */</div><div class='del'>-	dspclk_gate |= DPFCUNIT_CLOCK_GATE_DISABLE |</div><div class='del'>-		DPFCRUNIT_CLOCK_GATE_DISABLE |</div><div class='del'>-		DPFDUNIT_CLOCK_GATE_DISABLE;</div><div class='del'>-	/* Required for CxSR */</div><div class='del'>-	dspclk_gate |= DPARBUNIT_CLOCK_GATE_DISABLE;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(PCH_3DCGDIS0,</div><div class='del'>-		   MARIUNIT_CLOCK_GATE_DISABLE |</div><div class='del'>-		   SVSMUNIT_CLOCK_GATE_DISABLE);</div><div class='del'>-	I915_WRITE(PCH_3DCGDIS1,</div><div class='del'>-		   VFMUNIT_CLOCK_GATE_DISABLE);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * According to the spec the following bits should be set in</div><div class='del'>-	 * order to enable memory self-refresh</div><div class='del'>-	 * The bit 22/21 of 0x42004</div><div class='del'>-	 * The bit 5 of 0x42020</div><div class='del'>-	 * The bit 15 of 0x45000</div><div class='del'>-	 */</div><div class='del'>-	I915_WRITE(ILK_DISPLAY_CHICKEN2,</div><div class='del'>-		   (I915_READ(ILK_DISPLAY_CHICKEN2) |</div><div class='del'>-		    ILK_DPARB_GATE | ILK_VSDPFD_FULL));</div><div class='del'>-	I915_WRITE(ILK_DSPCLK_GATE,</div><div class='del'>-		   (I915_READ(ILK_DSPCLK_GATE) |</div><div class='del'>-		    ILK_DPARB_CLK_GATE));</div><div class='del'>-	I915_WRITE(DISP_ARB_CTL,</div><div class='del'>-		   (I915_READ(DISP_ARB_CTL) |</div><div class='del'>-		    DISP_FBC_WM_DIS));</div><div class='del'>-	I915_WRITE(WM3_LP_ILK, 0);</div><div class='del'>-	I915_WRITE(WM2_LP_ILK, 0);</div><div class='del'>-	I915_WRITE(WM1_LP_ILK, 0);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Based on the document from hardware guys the following bits</div><div class='del'>-	 * should be set unconditionally in order to enable FBC.</div><div class='del'>-	 * The bit 22 of 0x42000</div><div class='del'>-	 * The bit 22 of 0x42004</div><div class='del'>-	 * The bit 7,8,9 of 0x42020.</div><div class='del'>-	 */</div><div class='del'>-	if (IS_IRONLAKE_M(dev)) {</div><div class='del'>-		I915_WRITE(ILK_DISPLAY_CHICKEN1,</div><div class='del'>-			   I915_READ(ILK_DISPLAY_CHICKEN1) |</div><div class='del'>-			   ILK_FBCQ_DIS);</div><div class='del'>-		I915_WRITE(ILK_DISPLAY_CHICKEN2,</div><div class='del'>-			   I915_READ(ILK_DISPLAY_CHICKEN2) |</div><div class='del'>-			   ILK_DPARB_GATE);</div><div class='del'>-		I915_WRITE(ILK_DSPCLK_GATE,</div><div class='del'>-			   I915_READ(ILK_DSPCLK_GATE) |</div><div class='del'>-			   ILK_DPFC_DIS1 |</div><div class='del'>-			   ILK_DPFC_DIS2 |</div><div class='del'>-			   ILK_CLK_FBC);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	I915_WRITE(ILK_DISPLAY_CHICKEN2,</div><div class='del'>-		   I915_READ(ILK_DISPLAY_CHICKEN2) |</div><div class='del'>-		   ILK_ELPIN_409_SELECT);</div><div class='del'>-	I915_WRITE(_3D_CHICKEN2,</div><div class='del'>-		   _3D_CHICKEN2_WM_READ_PIPELINED &lt;&lt; 16 |</div><div class='del'>-		   _3D_CHICKEN2_WM_READ_PIPELINED);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gen6_init_clock_gating(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int pipe;</div><div class='del'>-	uint32_t dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(ILK_DISPLAY_CHICKEN2,</div><div class='del'>-		   I915_READ(ILK_DISPLAY_CHICKEN2) |</div><div class='del'>-		   ILK_ELPIN_409_SELECT);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(WM3_LP_ILK, 0);</div><div class='del'>-	I915_WRITE(WM2_LP_ILK, 0);</div><div class='del'>-	I915_WRITE(WM1_LP_ILK, 0);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(GEN6_UCGCTL1,</div><div class='del'>-		   I915_READ(GEN6_UCGCTL1) |</div><div class='del'>-		   GEN6_BLBUNIT_CLOCK_GATE_DISABLE);</div><div class='del'>-</div><div class='del'>-	/* According to the BSpec vol1g, bit 12 (RCPBUNIT) clock</div><div class='del'>-	 * gating disable must be set.  Failure to set it results in</div><div class='del'>-	 * flickering pixels due to Z write ordering failures after</div><div class='del'>-	 * some amount of runtime in the Mesa "fire" demo, and Unigine</div><div class='del'>-	 * Sanctuary and Tropics, and apparently anything else with</div><div class='del'>-	 * alpha test or pixel discard.</div><div class='del'>-	 *</div><div class='del'>-	 * According to the spec, bit 11 (RCCUNIT) must also be set,</div><div class='del'>-	 * but we didn't debug actual testcases to find it out.</div><div class='del'>-	 */</div><div class='del'>-	I915_WRITE(GEN6_UCGCTL2,</div><div class='del'>-		   GEN6_RCPBUNIT_CLOCK_GATE_DISABLE |</div><div class='del'>-		   GEN6_RCCUNIT_CLOCK_GATE_DISABLE);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * According to the spec the following bits should be</div><div class='del'>-	 * set in order to enable memory self-refresh and fbc:</div><div class='del'>-	 * The bit21 and bit22 of 0x42000</div><div class='del'>-	 * The bit21 and bit22 of 0x42004</div><div class='del'>-	 * The bit5 and bit7 of 0x42020</div><div class='del'>-	 * The bit14 of 0x70180</div><div class='del'>-	 * The bit14 of 0x71180</div><div class='del'>-	 */</div><div class='del'>-	I915_WRITE(ILK_DISPLAY_CHICKEN1,</div><div class='del'>-		   I915_READ(ILK_DISPLAY_CHICKEN1) |</div><div class='del'>-		   ILK_FBCQ_DIS | ILK_PABSTRETCH_DIS);</div><div class='del'>-	I915_WRITE(ILK_DISPLAY_CHICKEN2,</div><div class='del'>-		   I915_READ(ILK_DISPLAY_CHICKEN2) |</div><div class='del'>-		   ILK_DPARB_GATE | ILK_VSDPFD_FULL);</div><div class='del'>-	I915_WRITE(ILK_DSPCLK_GATE,</div><div class='del'>-		   I915_READ(ILK_DSPCLK_GATE) |</div><div class='del'>-		   ILK_DPARB_CLK_GATE  |</div><div class='del'>-		   ILK_DPFD_CLK_GATE);</div><div class='del'>-</div><div class='del'>-	for_each_pipe(pipe) {</div><div class='del'>-		I915_WRITE(DSPCNTR(pipe),</div><div class='del'>-			   I915_READ(DSPCNTR(pipe)) |</div><div class='del'>-			   DISPPLANE_TRICKLE_FEED_DISABLE);</div><div class='del'>-		intel_flush_display_plane(dev_priv, pipe);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ivybridge_init_clock_gating(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int pipe;</div><div class='del'>-	uint32_t dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(WM3_LP_ILK, 0);</div><div class='del'>-	I915_WRITE(WM2_LP_ILK, 0);</div><div class='del'>-	I915_WRITE(WM1_LP_ILK, 0);</div><div class='del'>-</div><div class='del'>-	/* According to the spec, bit 13 (RCZUNIT) must be set on IVB.</div><div class='del'>-	 * This implements the WaDisableRCZUnitClockGating workaround.</div><div class='del'>-	 */</div><div class='del'>-	I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);</div><div class='del'>-</div><div class='del'>-	I915_WRITE(IVB_CHICKEN3,</div><div class='del'>-		   CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE |</div><div class='del'>-		   CHICKEN3_DGMG_DONE_FIX_DISABLE);</div><div class='del'>-</div><div class='del'>-	/* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */</div><div class='del'>-	I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,</div><div class='del'>-		   GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);</div><div class='del'>-</div><div class='del'>-	/* WaApplyL3ControlAndL3ChickenMode requires those two on Ivy Bridge */</div><div class='del'>-	I915_WRITE(GEN7_L3CNTLREG1,</div><div class='del'>-			GEN7_WA_FOR_GEN7_L3_CONTROL);</div><div class='del'>-	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,</div><div class='del'>-			GEN7_WA_L3_CHICKEN_MODE);</div><div class='del'>-</div><div class='del'>-	/* This is required by WaCatErrorRejectionIssue */</div><div class='del'>-	I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,</div><div class='del'>-			I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |</div><div class='del'>-			GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);</div><div class='del'>-</div><div class='del'>-	for_each_pipe(pipe) {</div><div class='del'>-		I915_WRITE(DSPCNTR(pipe),</div><div class='del'>-			   I915_READ(DSPCNTR(pipe)) |</div><div class='del'>-			   DISPPLANE_TRICKLE_FEED_DISABLE);</div><div class='del'>-		intel_flush_display_plane(dev_priv, pipe);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void g4x_init_clock_gating(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t dspclk_gate;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(RENCLK_GATE_D1, 0);</div><div class='del'>-	I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE |</div><div class='del'>-		   GS_UNIT_CLOCK_GATE_DISABLE |</div><div class='del'>-		   CL_UNIT_CLOCK_GATE_DISABLE);</div><div class='del'>-	I915_WRITE(RAMCLK_GATE_D, 0);</div><div class='del'>-	dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE |</div><div class='del'>-		OVRUNIT_CLOCK_GATE_DISABLE |</div><div class='del'>-		OVCUNIT_CLOCK_GATE_DISABLE;</div><div class='del'>-	if (IS_GM45(dev))</div><div class='del'>-		dspclk_gate |= DSSUNIT_CLOCK_GATE_DISABLE;</div><div class='del'>-	I915_WRITE(DSPCLK_GATE_D, dspclk_gate);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void crestline_init_clock_gating(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(RENCLK_GATE_D1, I965_RCC_CLOCK_GATE_DISABLE);</div><div class='del'>-	I915_WRITE(RENCLK_GATE_D2, 0);</div><div class='del'>-	I915_WRITE(DSPCLK_GATE_D, 0);</div><div class='del'>-	I915_WRITE(RAMCLK_GATE_D, 0);</div><div class='del'>-	I915_WRITE16(DEUC, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void broadwater_init_clock_gating(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(RENCLK_GATE_D1, I965_RCZ_CLOCK_GATE_DISABLE |</div><div class='del'>-		   I965_RCC_CLOCK_GATE_DISABLE |</div><div class='del'>-		   I965_RCPB_CLOCK_GATE_DISABLE |</div><div class='del'>-		   I965_ISC_CLOCK_GATE_DISABLE |</div><div class='del'>-		   I965_FBC_CLOCK_GATE_DISABLE);</div><div class='del'>-	I915_WRITE(RENCLK_GATE_D2, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gen3_init_clock_gating(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	u32 dstate = I915_READ(D_STATE);</div><div class='del'>-</div><div class='del'>-	dstate |= DSTATE_PLL_D3_OFF | DSTATE_GFX_CLOCK_GATING |</div><div class='del'>-		DSTATE_DOT_CLOCK_GATING;</div><div class='del'>-	I915_WRITE(D_STATE, dstate);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void i85x_init_clock_gating(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(RENCLK_GATE_D1, SV_CLOCK_GATE_DISABLE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void i830_init_clock_gating(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	I915_WRITE(DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ibx_init_clock_gating(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * On Ibex Peak and Cougar Point, we need to disable clock</div><div class='del'>-	 * gating for the panel power sequencer or it will fail to</div><div class='del'>-	 * start up when no ports are active.</div><div class='del'>-	 */</div><div class='del'>-	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cpt_init_clock_gating(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int pipe;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * On Ibex Peak and Cougar Point, we need to disable clock</div><div class='del'>-	 * gating for the panel power sequencer or it will fail to</div><div class='del'>-	 * start up when no ports are active.</div><div class='del'>-	 */</div><div class='del'>-	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);</div><div class='del'>-	I915_WRITE(SOUTH_CHICKEN2, I915_READ(SOUTH_CHICKEN2) |</div><div class='del'>-		   DPLS_EDP_PPS_FIX_DIS);</div><div class='del'>-	/* Without this, mode sets may fail silently on FDI */</div><div class='del'>-	for_each_pipe(pipe)</div><div class='del'>-		I915_WRITE(TRANS_CHICKEN2(pipe), TRANS_AUTOTRAIN_GEN_STALL_DIS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ironlake_teardown_rc6(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;renderctx) {</div><div class='del'>-		i915_gem_object_unpin(dev_priv-&gt;renderctx);</div><div class='del'>-		drm_gem_object_unreference(&amp;dev_priv-&gt;renderctx-&gt;base);</div><div class='del'>-		dev_priv-&gt;renderctx = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;pwrctx) {</div><div class='del'>-		i915_gem_object_unpin(dev_priv-&gt;pwrctx);</div><div class='del'>-		drm_gem_object_unreference(&amp;dev_priv-&gt;pwrctx-&gt;base);</div><div class='del'>-		dev_priv-&gt;pwrctx = NULL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ironlake_disable_rc6(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	if (I915_READ(PWRCTXA)) {</div><div class='del'>-		/* Wake the GPU, prevent RC6, then restore RSTDBYCTL */</div><div class='del'>-		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) | RCX_SW_EXIT);</div><div class='del'>-		wait_for(((I915_READ(RSTDBYCTL) &amp; RSX_STATUS_MASK) == RSX_STATUS_ON),</div><div class='del'>-			 50);</div><div class='del'>-</div><div class='del'>-		I915_WRITE(PWRCTXA, 0);</div><div class='del'>-		POSTING_READ(PWRCTXA);</div><div class='del'>-</div><div class='del'>-		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) &amp; ~RCX_SW_EXIT);</div><div class='del'>-		POSTING_READ(RSTDBYCTL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ironlake_teardown_rc6(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ironlake_setup_rc6(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;renderctx == NULL)</div><div class='del'>-		dev_priv-&gt;renderctx = intel_alloc_context_page(dev);</div><div class='del'>-	if (!dev_priv-&gt;renderctx)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;pwrctx == NULL)</div><div class='del'>-		dev_priv-&gt;pwrctx = intel_alloc_context_page(dev);</div><div class='del'>-	if (!dev_priv-&gt;pwrctx) {</div><div class='del'>-		ironlake_teardown_rc6(dev);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ironlake_enable_rc6(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* rc6 disabled by default due to repeated reports of hanging during</div><div class='del'>-	 * boot and resume.</div><div class='del'>-	 */</div><div class='del'>-	if (!intel_enable_rc6(dev))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-	ret = ironlake_setup_rc6(dev);</div><div class='del'>-	if (ret) {</div><div class='del'>-		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * GPU can automatically power down the render unit if given a page</div><div class='del'>-	 * to save state.</div><div class='del'>-	 */</div><div class='del'>-	ret = BEGIN_LP_RING(6);</div><div class='del'>-	if (ret) {</div><div class='del'>-		ironlake_teardown_rc6(dev);</div><div class='del'>-		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	OUT_RING(MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);</div><div class='del'>-	OUT_RING(MI_SET_CONTEXT);</div><div class='del'>-	OUT_RING(dev_priv-&gt;renderctx-&gt;gtt_offset |</div><div class='del'>-		 MI_MM_SPACE_GTT |</div><div class='del'>-		 MI_SAVE_EXT_STATE_EN |</div><div class='del'>-		 MI_RESTORE_EXT_STATE_EN |</div><div class='del'>-		 MI_RESTORE_INHIBIT);</div><div class='del'>-	OUT_RING(MI_SUSPEND_FLUSH);</div><div class='del'>-	OUT_RING(MI_NOOP);</div><div class='del'>-	OUT_RING(MI_FLUSH);</div><div class='del'>-	ADVANCE_LP_RING();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Wait for the command parser to advance past MI_SET_CONTEXT. The HW</div><div class='del'>-	 * does an implicit flush, combined with MI_FLUSH above, it should be</div><div class='del'>-	 * safe to assume that renderctx is valid</div><div class='del'>-	 */</div><div class='del'>-	ret = intel_wait_ring_idle(LP_RING(dev_priv));</div><div class='del'>-	if (ret) {</div><div class='del'>-		DRM_ERROR("failed to enable ironlake power power savings\n");</div><div class='del'>-		ironlake_teardown_rc6(dev);</div><div class='del'>-		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	I915_WRITE(PWRCTXA, dev_priv-&gt;pwrctx-&gt;gtt_offset | PWRCTX_EN);</div><div class='del'>-	I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) &amp; ~RCX_SW_EXIT);</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void intel_init_clock_gating(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	dev_priv-&gt;display.init_clock_gating(dev);</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;display.init_pch_clock_gating)</div><div class='del'>-		dev_priv-&gt;display.init_pch_clock_gating(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Set up chip specific display functions */</div><div class='ctx'> static void intel_init_display(struct drm_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -8886,32 +6726,20 @@ static void intel_init_display(struct drm_device *dev)</div><div class='ctx'> 	if (HAS_PCH_SPLIT(dev)) {</div><div class='ctx'> 		dev_priv-&gt;display.dpms = ironlake_crtc_dpms;</div><div class='ctx'> 		dev_priv-&gt;display.crtc_mode_set = ironlake_crtc_mode_set;</div><div class='add'>+		dev_priv-&gt;display.off = ironlake_crtc_off;</div><div class='ctx'> 		dev_priv-&gt;display.update_plane = ironlake_update_plane;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev_priv-&gt;display.dpms = i9xx_crtc_dpms;</div><div class='ctx'> 		dev_priv-&gt;display.crtc_mode_set = i9xx_crtc_mode_set;</div><div class='add'>+		dev_priv-&gt;display.off = i9xx_crtc_off;</div><div class='ctx'> 		dev_priv-&gt;display.update_plane = i9xx_update_plane;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (I915_HAS_FBC(dev)) {</div><div class='del'>-		if (HAS_PCH_SPLIT(dev)) {</div><div class='del'>-			dev_priv-&gt;display.fbc_enabled = ironlake_fbc_enabled;</div><div class='del'>-			dev_priv-&gt;display.enable_fbc = ironlake_enable_fbc;</div><div class='del'>-			dev_priv-&gt;display.disable_fbc = ironlake_disable_fbc;</div><div class='del'>-		} else if (IS_GM45(dev)) {</div><div class='del'>-			dev_priv-&gt;display.fbc_enabled = g4x_fbc_enabled;</div><div class='del'>-			dev_priv-&gt;display.enable_fbc = g4x_enable_fbc;</div><div class='del'>-			dev_priv-&gt;display.disable_fbc = g4x_disable_fbc;</div><div class='del'>-		} else if (IS_CRESTLINE(dev)) {</div><div class='del'>-			dev_priv-&gt;display.fbc_enabled = i8xx_fbc_enabled;</div><div class='del'>-			dev_priv-&gt;display.enable_fbc = i8xx_enable_fbc;</div><div class='del'>-			dev_priv-&gt;display.disable_fbc = i8xx_disable_fbc;</div><div class='del'>-		}</div><div class='del'>-		/* 855GM needs testing */</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Returns the core display clock speed */</div><div class='del'>-	if (IS_I945G(dev) || (IS_G33(dev) &amp;&amp; !IS_PINEVIEW_M(dev)))</div><div class='add'>+	if (IS_VALLEYVIEW(dev))</div><div class='add'>+		dev_priv-&gt;display.get_display_clock_speed =</div><div class='add'>+			valleyview_get_display_clock_speed;</div><div class='add'>+	else if (IS_I945G(dev) || (IS_G33(dev) &amp;&amp; !IS_PINEVIEW_M(dev)))</div><div class='ctx'> 		dev_priv-&gt;display.get_display_clock_speed =</div><div class='ctx'> 			i945_get_display_clock_speed;</div><div class='ctx'> 	else if (IS_I915G(dev))</div><div class='hunk'>@@ -8933,124 +6761,27 @@ static void intel_init_display(struct drm_device *dev)</div><div class='ctx'> 		dev_priv-&gt;display.get_display_clock_speed =</div><div class='ctx'> 			i830_get_display_clock_speed;</div><div class='ctx'> </div><div class='del'>-	/* For FIFO watermark updates */</div><div class='ctx'> 	if (HAS_PCH_SPLIT(dev)) {</div><div class='del'>-		dev_priv-&gt;display.force_wake_get = __gen6_gt_force_wake_get;</div><div class='del'>-		dev_priv-&gt;display.force_wake_put = __gen6_gt_force_wake_put;</div><div class='del'>-</div><div class='del'>-		/* IVB configs may use multi-threaded forcewake */</div><div class='del'>-		if (IS_IVYBRIDGE(dev)) {</div><div class='del'>-			u32	ecobus;</div><div class='del'>-</div><div class='del'>-			/* A small trick here - if the bios hasn't configured MT forcewake,</div><div class='del'>-			 * and if the device is in RC6, then force_wake_mt_get will not wake</div><div class='del'>-			 * the device and the ECOBUS read will return zero. Which will be</div><div class='del'>-			 * (correctly) interpreted by the test below as MT forcewake being</div><div class='del'>-			 * disabled.</div><div class='del'>-			 */</div><div class='del'>-			mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-			__gen6_gt_force_wake_mt_get(dev_priv);</div><div class='del'>-			ecobus = I915_READ_NOTRACE(ECOBUS);</div><div class='del'>-			__gen6_gt_force_wake_mt_put(dev_priv);</div><div class='del'>-			mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='del'>-</div><div class='del'>-			if (ecobus &amp; FORCEWAKE_MT_ENABLE) {</div><div class='del'>-				DRM_DEBUG_KMS("Using MT version of forcewake\n");</div><div class='del'>-				dev_priv-&gt;display.force_wake_get =</div><div class='del'>-					__gen6_gt_force_wake_mt_get;</div><div class='del'>-				dev_priv-&gt;display.force_wake_put =</div><div class='del'>-					__gen6_gt_force_wake_mt_put;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (HAS_PCH_IBX(dev))</div><div class='del'>-			dev_priv-&gt;display.init_pch_clock_gating = ibx_init_clock_gating;</div><div class='del'>-		else if (HAS_PCH_CPT(dev))</div><div class='del'>-			dev_priv-&gt;display.init_pch_clock_gating = cpt_init_clock_gating;</div><div class='del'>-</div><div class='ctx'> 		if (IS_GEN5(dev)) {</div><div class='del'>-			if (I915_READ(MLTR_ILK) &amp; ILK_SRLT_MASK)</div><div class='del'>-				dev_priv-&gt;display.update_wm = ironlake_update_wm;</div><div class='del'>-			else {</div><div class='del'>-				DRM_DEBUG_KMS("Failed to get proper latency. "</div><div class='del'>-					      "Disable CxSR\n");</div><div class='del'>-				dev_priv-&gt;display.update_wm = NULL;</div><div class='del'>-			}</div><div class='ctx'> 			dev_priv-&gt;display.fdi_link_train = ironlake_fdi_link_train;</div><div class='del'>-			dev_priv-&gt;display.init_clock_gating = ironlake_init_clock_gating;</div><div class='ctx'> 			dev_priv-&gt;display.write_eld = ironlake_write_eld;</div><div class='ctx'> 		} else if (IS_GEN6(dev)) {</div><div class='del'>-			if (SNB_READ_WM0_LATENCY()) {</div><div class='del'>-				dev_priv-&gt;display.update_wm = sandybridge_update_wm;</div><div class='del'>-				dev_priv-&gt;display.update_sprite_wm = sandybridge_update_sprite_wm;</div><div class='del'>-			} else {</div><div class='del'>-				DRM_DEBUG_KMS("Failed to read display plane latency. "</div><div class='del'>-					      "Disable CxSR\n");</div><div class='del'>-				dev_priv-&gt;display.update_wm = NULL;</div><div class='del'>-			}</div><div class='ctx'> 			dev_priv-&gt;display.fdi_link_train = gen6_fdi_link_train;</div><div class='del'>-			dev_priv-&gt;display.init_clock_gating = gen6_init_clock_gating;</div><div class='ctx'> 			dev_priv-&gt;display.write_eld = ironlake_write_eld;</div><div class='ctx'> 		} else if (IS_IVYBRIDGE(dev)) {</div><div class='ctx'> 			/* FIXME: detect B0+ stepping and use auto training */</div><div class='ctx'> 			dev_priv-&gt;display.fdi_link_train = ivb_manual_fdi_link_train;</div><div class='del'>-			if (SNB_READ_WM0_LATENCY()) {</div><div class='del'>-				dev_priv-&gt;display.update_wm = sandybridge_update_wm;</div><div class='del'>-				dev_priv-&gt;display.update_sprite_wm = sandybridge_update_sprite_wm;</div><div class='del'>-			} else {</div><div class='del'>-				DRM_DEBUG_KMS("Failed to read display plane latency. "</div><div class='del'>-					      "Disable CxSR\n");</div><div class='del'>-				dev_priv-&gt;display.update_wm = NULL;</div><div class='del'>-			}</div><div class='del'>-			dev_priv-&gt;display.init_clock_gating = ivybridge_init_clock_gating;</div><div class='add'>+			dev_priv-&gt;display.write_eld = ironlake_write_eld;</div><div class='add'>+		} else if (IS_HASWELL(dev)) {</div><div class='add'>+			dev_priv-&gt;display.fdi_link_train = hsw_fdi_link_train;</div><div class='ctx'> 			dev_priv-&gt;display.write_eld = ironlake_write_eld;</div><div class='ctx'> 		} else</div><div class='ctx'> 			dev_priv-&gt;display.update_wm = NULL;</div><div class='del'>-	} else if (IS_PINEVIEW(dev)) {</div><div class='del'>-		if (!intel_get_cxsr_latency(IS_PINEVIEW_G(dev),</div><div class='del'>-					    dev_priv-&gt;is_ddr3,</div><div class='del'>-					    dev_priv-&gt;fsb_freq,</div><div class='del'>-					    dev_priv-&gt;mem_freq)) {</div><div class='del'>-			DRM_INFO("failed to find known CxSR latency "</div><div class='del'>-				 "(found ddr%s fsb freq %d, mem freq %d), "</div><div class='del'>-				 "disabling CxSR\n",</div><div class='del'>-				 (dev_priv-&gt;is_ddr3 == 1) ? "3" : "2",</div><div class='del'>-				 dev_priv-&gt;fsb_freq, dev_priv-&gt;mem_freq);</div><div class='del'>-			/* Disable CxSR and never update its watermark again */</div><div class='del'>-			pineview_disable_cxsr(dev);</div><div class='del'>-			dev_priv-&gt;display.update_wm = NULL;</div><div class='del'>-		} else</div><div class='del'>-			dev_priv-&gt;display.update_wm = pineview_update_wm;</div><div class='del'>-		dev_priv-&gt;display.init_clock_gating = gen3_init_clock_gating;</div><div class='add'>+	} else if (IS_VALLEYVIEW(dev)) {</div><div class='add'>+		dev_priv-&gt;display.force_wake_get = vlv_force_wake_get;</div><div class='add'>+		dev_priv-&gt;display.force_wake_put = vlv_force_wake_put;</div><div class='ctx'> 	} else if (IS_G4X(dev)) {</div><div class='ctx'> 		dev_priv-&gt;display.write_eld = g4x_write_eld;</div><div class='del'>-		dev_priv-&gt;display.update_wm = g4x_update_wm;</div><div class='del'>-		dev_priv-&gt;display.init_clock_gating = g4x_init_clock_gating;</div><div class='del'>-	} else if (IS_GEN4(dev)) {</div><div class='del'>-		dev_priv-&gt;display.update_wm = i965_update_wm;</div><div class='del'>-		if (IS_CRESTLINE(dev))</div><div class='del'>-			dev_priv-&gt;display.init_clock_gating = crestline_init_clock_gating;</div><div class='del'>-		else if (IS_BROADWATER(dev))</div><div class='del'>-			dev_priv-&gt;display.init_clock_gating = broadwater_init_clock_gating;</div><div class='del'>-	} else if (IS_GEN3(dev)) {</div><div class='del'>-		dev_priv-&gt;display.update_wm = i9xx_update_wm;</div><div class='del'>-		dev_priv-&gt;display.get_fifo_size = i9xx_get_fifo_size;</div><div class='del'>-		dev_priv-&gt;display.init_clock_gating = gen3_init_clock_gating;</div><div class='del'>-	} else if (IS_I865G(dev)) {</div><div class='del'>-		dev_priv-&gt;display.update_wm = i830_update_wm;</div><div class='del'>-		dev_priv-&gt;display.init_clock_gating = i85x_init_clock_gating;</div><div class='del'>-		dev_priv-&gt;display.get_fifo_size = i830_get_fifo_size;</div><div class='del'>-	} else if (IS_I85X(dev)) {</div><div class='del'>-		dev_priv-&gt;display.update_wm = i9xx_update_wm;</div><div class='del'>-		dev_priv-&gt;display.get_fifo_size = i85x_get_fifo_size;</div><div class='del'>-		dev_priv-&gt;display.init_clock_gating = i85x_init_clock_gating;</div><div class='del'>-	} else {</div><div class='del'>-		dev_priv-&gt;display.update_wm = i830_update_wm;</div><div class='del'>-		dev_priv-&gt;display.init_clock_gating = i830_init_clock_gating;</div><div class='del'>-		if (IS_845G(dev))</div><div class='del'>-			dev_priv-&gt;display.get_fifo_size = i845_get_fifo_size;</div><div class='del'>-		else</div><div class='del'>-			dev_priv-&gt;display.get_fifo_size = i830_get_fifo_size;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Default just returns -ENODEV to indicate unsupported */</div><div class='hunk'>@@ -9089,7 +6820,7 @@ static void quirk_pipea_force(struct drm_device *dev)</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> </div><div class='ctx'> 	dev_priv-&gt;quirks |= QUIRK_PIPEA_FORCE;</div><div class='del'>-	DRM_DEBUG_DRIVER("applying pipe a force quirk\n");</div><div class='add'>+	DRM_INFO("applying pipe a force quirk\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -9099,6 +6830,18 @@ static void quirk_ssc_force_disable(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	dev_priv-&gt;quirks |= QUIRK_LVDS_SSC_DISABLE;</div><div class='add'>+	DRM_INFO("applying lvds SSC disable quirk\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * A machine (e.g. Acer Aspire 5734Z) may need to invert the panel backlight</div><div class='add'>+ * brightness value</div><div class='add'>+ */</div><div class='add'>+static void quirk_invert_brightness(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	dev_priv-&gt;quirks |= QUIRK_INVERT_BRIGHTNESS;</div><div class='add'>+	DRM_INFO("applying inverted panel brightness quirk\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct intel_quirk {</div><div class='hunk'>@@ -9108,7 +6851,7 @@ struct intel_quirk {</div><div class='ctx'> 	void (*hook)(struct drm_device *dev);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct intel_quirk intel_quirks[] = {</div><div class='add'>+static struct intel_quirk intel_quirks[] = {</div><div class='ctx'> 	/* HP Mini needs pipe A force quirk (LP: #322104) */</div><div class='ctx'> 	{ 0x27ae, 0x103c, 0x361a, quirk_pipea_force },</div><div class='ctx'> </div><div class='hunk'>@@ -9133,6 +6876,9 @@ struct intel_quirk intel_quirks[] = {</div><div class='ctx'> </div><div class='ctx'> 	/* Sony Vaio Y cannot use SSC on LVDS */</div><div class='ctx'> 	{ 0x0046, 0x104d, 0x9076, quirk_ssc_force_disable },</div><div class='add'>+</div><div class='add'>+	/* Acer Aspire 5734Z must invert backlight brightness */</div><div class='add'>+	{ 0x2a42, 0x1025, 0x0459, quirk_invert_brightness },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void intel_init_quirks(struct drm_device *dev)</div><div class='hunk'>@@ -9165,7 +6911,7 @@ static void i915_disable_vga(struct drm_device *dev)</div><div class='ctx'> 		vga_reg = VGACNTRL;</div><div class='ctx'> </div><div class='ctx'> 	vga_get_uninterruptible(dev-&gt;pdev, VGA_RSRC_LEGACY_IO);</div><div class='del'>-	outb(1, VGA_SR_INDEX);</div><div class='add'>+	outb(SR01, VGA_SR_INDEX);</div><div class='ctx'> 	sr1 = inb(VGA_SR_DATA);</div><div class='ctx'> 	outb(sr1 | 1&lt;&lt;5, VGA_SR_DATA);</div><div class='ctx'> 	vga_put(dev-&gt;pdev, VGA_RSRC_LEGACY_IO);</div><div class='hunk'>@@ -9175,6 +6921,40 @@ static void i915_disable_vga(struct drm_device *dev)</div><div class='ctx'> 	POSTING_READ(vga_reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ivb_pch_pwm_override(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * IVB has CPU eDP backlight regs too, set things up to let the</div><div class='add'>+	 * PCH regs control the backlight</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(BLC_PWM_CPU_CTL2, PWM_ENABLE);</div><div class='add'>+	I915_WRITE(BLC_PWM_CPU_CTL, 0);</div><div class='add'>+	I915_WRITE(BLC_PWM_PCH_CTL1, PWM_ENABLE | (1&lt;&lt;30));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_modeset_init_hw(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	intel_init_clock_gating(dev);</div><div class='add'>+</div><div class='add'>+	if (IS_IRONLAKE_M(dev)) {</div><div class='add'>+		ironlake_enable_drps(dev);</div><div class='add'>+		ironlake_enable_rc6(dev);</div><div class='add'>+		intel_init_emon(dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((IS_GEN6(dev) || IS_GEN7(dev)) &amp;&amp; !IS_VALLEYVIEW(dev)) {</div><div class='add'>+		gen6_enable_rps(dev_priv);</div><div class='add'>+		gen6_update_ring_freq(dev_priv);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (IS_IVYBRIDGE(dev))</div><div class='add'>+		ivb_pch_pwm_override(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void intel_modeset_init(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='hunk'>@@ -9188,10 +6968,14 @@ void intel_modeset_init(struct drm_device *dev)</div><div class='ctx'> 	dev-&gt;mode_config.preferred_depth = 24;</div><div class='ctx'> 	dev-&gt;mode_config.prefer_shadow = 1;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;mode_config.funcs = (void *)&amp;intel_mode_funcs;</div><div class='add'>+	dev-&gt;mode_config.funcs = &amp;intel_mode_funcs;</div><div class='ctx'> </div><div class='ctx'> 	intel_init_quirks(dev);</div><div class='ctx'> </div><div class='add'>+	intel_init_pm(dev);</div><div class='add'>+</div><div class='add'>+	intel_prepare_ddi(dev);</div><div class='add'>+</div><div class='ctx'> 	intel_init_display(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_GEN2(dev)) {</div><div class='hunk'>@@ -9216,22 +7000,12 @@ void intel_modeset_init(struct drm_device *dev)</div><div class='ctx'> 			DRM_DEBUG_KMS("plane %d init failed: %d\n", i, ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	intel_pch_pll_init(dev);</div><div class='add'>+</div><div class='ctx'> 	/* Just disable it once at startup */</div><div class='ctx'> 	i915_disable_vga(dev);</div><div class='ctx'> 	intel_setup_outputs(dev);</div><div class='ctx'> </div><div class='del'>-	intel_init_clock_gating(dev);</div><div class='del'>-</div><div class='del'>-	if (IS_IRONLAKE_M(dev)) {</div><div class='del'>-		ironlake_enable_drps(dev);</div><div class='del'>-		intel_init_emon(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (IS_GEN6(dev) || IS_GEN7(dev)) {</div><div class='del'>-		gen6_enable_rps(dev_priv);</div><div class='del'>-		gen6_update_ring_freq(dev_priv);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	INIT_WORK(&amp;dev_priv-&gt;idle_work, intel_idle_update);</div><div class='ctx'> 	setup_timer(&amp;dev_priv-&gt;idle_timer, intel_gpu_idle_timer,</div><div class='ctx'> 		    (unsigned long)dev);</div><div class='hunk'>@@ -9239,8 +7013,7 @@ void intel_modeset_init(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> void intel_modeset_gem_init(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	if (IS_IRONLAKE_M(dev))</div><div class='del'>-		ironlake_enable_rc6(dev);</div><div class='add'>+	intel_modeset_init_hw(dev);</div><div class='ctx'> </div><div class='ctx'> 	intel_setup_overlay(dev);</div><div class='ctx'> }</div><div class='hunk'>@@ -9270,12 +7043,15 @@ void intel_modeset_cleanup(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (IS_IRONLAKE_M(dev))</div><div class='ctx'> 		ironlake_disable_drps(dev);</div><div class='del'>-	if (IS_GEN6(dev) || IS_GEN7(dev))</div><div class='add'>+	if ((IS_GEN6(dev) || IS_GEN7(dev)) &amp;&amp; !IS_VALLEYVIEW(dev))</div><div class='ctx'> 		gen6_disable_rps(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_IRONLAKE_M(dev))</div><div class='ctx'> 		ironlake_disable_rc6(dev);</div><div class='ctx'> </div><div class='add'>+	if (IS_VALLEYVIEW(dev))</div><div class='add'>+		vlv_init_dpio(dev);</div><div class='add'>+</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable the irq before mode object teardown, for the irq might</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c<br/>index 4b637919f74f..296cfc201a81 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_dp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_dp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_dp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_dp.c</a></div><div class='hunk'>@@ -266,6 +266,9 @@ intel_dp_mode_valid(struct drm_connector *connector,</div><div class='ctx'> 	if (mode-&gt;clock &lt; 10000)</div><div class='ctx'> 		return MODE_CLOCK_LOW;</div><div class='ctx'> </div><div class='add'>+	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLCLK)</div><div class='add'>+		return MODE_H_ILLEGAL;</div><div class='add'>+</div><div class='ctx'> 	return MODE_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -688,7 +691,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,</div><div class='ctx'> 	int lane_count, clock;</div><div class='ctx'> 	int max_lane_count = intel_dp_max_lane_count(intel_dp);</div><div class='ctx'> 	int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0;</div><div class='del'>-	int bpp;</div><div class='add'>+	int bpp, mode_rate;</div><div class='ctx'> 	static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };</div><div class='ctx'> </div><div class='ctx'> 	if (is_edp(intel_dp) &amp;&amp; intel_dp-&gt;panel_fixed_mode) {</div><div class='hunk'>@@ -702,24 +705,33 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,</div><div class='ctx'> 		mode-&gt;clock = intel_dp-&gt;panel_fixed_mode-&gt;clock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (mode-&gt;flags &amp; DRM_MODE_FLAG_DBLCLK)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("DP link computation with max lane count %i "</div><div class='add'>+		      "max bw %02x pixel clock %iKHz\n",</div><div class='add'>+		      max_lane_count, bws[max_clock], mode-&gt;clock);</div><div class='add'>+</div><div class='ctx'> 	if (!intel_dp_adjust_dithering(intel_dp, mode, adjusted_mode))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	bpp = adjusted_mode-&gt;private_flags &amp; INTEL_MODE_DP_FORCE_6BPC ? 18 : 24;</div><div class='add'>+	mode_rate = intel_dp_link_required(mode-&gt;clock, bpp);</div><div class='ctx'> </div><div class='ctx'> 	for (lane_count = 1; lane_count &lt;= max_lane_count; lane_count &lt;&lt;= 1) {</div><div class='ctx'> 		for (clock = 0; clock &lt;= max_clock; clock++) {</div><div class='ctx'> 			int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);</div><div class='ctx'> </div><div class='del'>-			if (intel_dp_link_required(mode-&gt;clock, bpp)</div><div class='del'>-					&lt;= link_avail) {</div><div class='add'>+			if (mode_rate &lt;= link_avail) {</div><div class='ctx'> 				intel_dp-&gt;link_bw = bws[clock];</div><div class='ctx'> 				intel_dp-&gt;lane_count = lane_count;</div><div class='ctx'> 				adjusted_mode-&gt;clock = intel_dp_link_clock(intel_dp-&gt;link_bw);</div><div class='del'>-				DRM_DEBUG_KMS("Display port link bw %02x lane "</div><div class='del'>-						"count %d clock %d\n",</div><div class='add'>+				DRM_DEBUG_KMS("DP link bw %02x lane "</div><div class='add'>+						"count %d clock %d bpp %d\n",</div><div class='ctx'> 				       intel_dp-&gt;link_bw, intel_dp-&gt;lane_count,</div><div class='del'>-				       adjusted_mode-&gt;clock);</div><div class='add'>+				       adjusted_mode-&gt;clock, bpp);</div><div class='add'>+				DRM_DEBUG_KMS("DP link bw required %i available %i\n",</div><div class='add'>+					      mode_rate, link_avail);</div><div class='ctx'> 				return true;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1148,10 +1160,10 @@ static void ironlake_edp_panel_off(struct intel_dp *intel_dp)</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_KMS("Turn eDP power off\n");</div><div class='ctx'> </div><div class='del'>-	WARN(intel_dp-&gt;want_panel_vdd, "Cannot turn power off while VDD is on\n");</div><div class='add'>+	WARN(!intel_dp-&gt;want_panel_vdd, "Need VDD to turn off panel\n");</div><div class='ctx'> </div><div class='ctx'> 	pp = ironlake_get_pp_control(dev_priv);</div><div class='del'>-	pp &amp;= ~(POWER_TARGET_ON | EDP_FORCE_VDD | PANEL_POWER_RESET | EDP_BLC_ENABLE);</div><div class='add'>+	pp &amp;= ~(POWER_TARGET_ON | PANEL_POWER_RESET | EDP_BLC_ENABLE);</div><div class='ctx'> 	I915_WRITE(PCH_PP_CONTROL, pp);</div><div class='ctx'> 	POSTING_READ(PCH_PP_CONTROL);</div><div class='ctx'> </div><div class='hunk'>@@ -1259,18 +1271,16 @@ static void intel_dp_prepare(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+	/* Make sure the panel is off before trying to change the mode. But also</div><div class='add'>+	 * ensure that we have vdd while we switch off the panel. */</div><div class='add'>+	ironlake_edp_panel_vdd_on(intel_dp);</div><div class='ctx'> 	ironlake_edp_backlight_off(intel_dp);</div><div class='ctx'> 	ironlake_edp_panel_off(intel_dp);</div><div class='ctx'> </div><div class='del'>-	/* Wake up the sink first */</div><div class='del'>-	ironlake_edp_panel_vdd_on(intel_dp);</div><div class='ctx'> 	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);</div><div class='ctx'> 	intel_dp_link_down(intel_dp);</div><div class='ctx'> 	ironlake_edp_panel_vdd_off(intel_dp, false);</div><div class='del'>-</div><div class='del'>-	/* Make sure the panel is off before trying to</div><div class='del'>-	 * change the mode</div><div class='del'>-	 */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_dp_commit(struct drm_encoder *encoder)</div><div class='hunk'>@@ -1302,10 +1312,11 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)</div><div class='ctx'> 	uint32_t dp_reg = I915_READ(intel_dp-&gt;output_reg);</div><div class='ctx'> </div><div class='ctx'> 	if (mode != DRM_MODE_DPMS_ON) {</div><div class='add'>+		/* Switching the panel off requires vdd. */</div><div class='add'>+		ironlake_edp_panel_vdd_on(intel_dp);</div><div class='ctx'> 		ironlake_edp_backlight_off(intel_dp);</div><div class='ctx'> 		ironlake_edp_panel_off(intel_dp);</div><div class='ctx'> </div><div class='del'>-		ironlake_edp_panel_vdd_on(intel_dp);</div><div class='ctx'> 		intel_dp_sink_dpms(intel_dp, mode);</div><div class='ctx'> 		intel_dp_link_down(intel_dp);</div><div class='ctx'> 		ironlake_edp_panel_vdd_off(intel_dp, false);</div><div class='hunk'>@@ -1954,6 +1965,23 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+intel_dp_probe_oui(struct intel_dp *intel_dp)</div><div class='add'>+{</div><div class='add'>+	u8 buf[3];</div><div class='add'>+</div><div class='add'>+	if (!(intel_dp-&gt;dpcd[DP_DOWN_STREAM_PORT_COUNT] &amp; DP_OUI_SUPPORT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (intel_dp_aux_native_read_retry(intel_dp, DP_SINK_OUI, buf, 3))</div><div class='add'>+		DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n",</div><div class='add'>+			      buf[0], buf[1], buf[2]);</div><div class='add'>+</div><div class='add'>+	if (intel_dp_aux_native_read_retry(intel_dp, DP_BRANCH_OUI, buf, 3))</div><div class='add'>+		DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n",</div><div class='add'>+			      buf[0], buf[1], buf[2]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool</div><div class='ctx'> intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector)</div><div class='ctx'> {</div><div class='hunk'>@@ -2137,6 +2165,8 @@ intel_dp_detect(struct drm_connector *connector, bool force)</div><div class='ctx'> 	if (status != connector_status_connected)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='add'>+	intel_dp_probe_oui(intel_dp);</div><div class='add'>+</div><div class='ctx'> 	if (intel_dp-&gt;force_audio != HDMI_AUDIO_AUTO) {</div><div class='ctx'> 		intel_dp-&gt;has_audio = (intel_dp-&gt;force_audio == HDMI_AUDIO_ON);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -2438,6 +2468,7 @@ intel_dp_init(struct drm_device *dev, int output_reg)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	intel_encoder-&gt;crtc_mask = (1 &lt;&lt; 0) | (1 &lt;&lt; 1) | (1 &lt;&lt; 2);</div><div class='add'>+</div><div class='ctx'> 	connector-&gt;interlace_allowed = true;</div><div class='ctx'> 	connector-&gt;doublescan_allowed = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2483,6 +2514,13 @@ intel_dp_init(struct drm_device *dev, int output_reg)</div><div class='ctx'> 		pp_off = I915_READ(PCH_PP_OFF_DELAYS);</div><div class='ctx'> 		pp_div = I915_READ(PCH_PP_DIVISOR);</div><div class='ctx'> </div><div class='add'>+		if (!pp_on || !pp_off || !pp_div) {</div><div class='add'>+			DRM_INFO("bad panel power sequencing delays, disabling panel\n");</div><div class='add'>+			intel_dp_encoder_destroy(&amp;intel_dp-&gt;base.base);</div><div class='add'>+			intel_dp_destroy(&amp;intel_connector-&gt;base);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* Pull timing values out of registers */</div><div class='ctx'> 		cur.t1_t3 = (pp_on &amp; PANEL_POWER_UP_DELAY_MASK) &gt;&gt;</div><div class='ctx'> 			PANEL_POWER_UP_DELAY_SHIFT;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h<br/>index 715afa153025..3e0918834e7e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_drv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_drv.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_drv.h</a></div><div class='hunk'>@@ -45,6 +45,18 @@</div><div class='ctx'> 	ret__;								\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#define wait_for_atomic_us(COND, US) ({ \</div><div class='add'>+	int i, ret__ = -ETIMEDOUT;	\</div><div class='add'>+	for (i = 0; i &lt; (US); i++) {	\</div><div class='add'>+		if ((COND)) {		\</div><div class='add'>+			ret__ = 0;	\</div><div class='add'>+			break;		\</div><div class='add'>+		}			\</div><div class='add'>+		udelay(1);		\</div><div class='add'>+	}				\</div><div class='add'>+	ret__;				\</div><div class='add'>+})</div><div class='add'>+</div><div class='ctx'> #define wait_for(COND, MS) _wait_for(COND, MS, 1)</div><div class='ctx'> #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)</div><div class='ctx'> </div><div class='hunk'>@@ -171,8 +183,8 @@ struct intel_crtc {</div><div class='ctx'> 	bool cursor_visible;</div><div class='ctx'> 	unsigned int bpp;</div><div class='ctx'> </div><div class='del'>-	bool no_pll; /* tertiary pipe for IVB */</div><div class='del'>-	bool use_pll_a;</div><div class='add'>+	/* We can share PLLs across outputs if the timings match */</div><div class='add'>+	struct intel_pch_pll *pch_pll;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct intel_plane {</div><div class='hunk'>@@ -196,6 +208,25 @@ struct intel_plane {</div><div class='ctx'> 			     struct drm_intel_sprite_colorkey *key);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct intel_watermark_params {</div><div class='add'>+	unsigned long fifo_size;</div><div class='add'>+	unsigned long max_wm;</div><div class='add'>+	unsigned long default_wm;</div><div class='add'>+	unsigned long guard_size;</div><div class='add'>+	unsigned long cacheline_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cxsr_latency {</div><div class='add'>+	int is_desktop;</div><div class='add'>+	int is_ddr3;</div><div class='add'>+	unsigned long fsb_freq;</div><div class='add'>+	unsigned long mem_freq;</div><div class='add'>+	unsigned long display_sr;</div><div class='add'>+	unsigned long display_hpll_disable;</div><div class='add'>+	unsigned long cursor_sr;</div><div class='add'>+	unsigned long cursor_hpll_disable;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)</div><div class='ctx'> #define to_intel_connector(x) container_of(x, struct intel_connector, base)</div><div class='ctx'> #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)</div><div class='hunk'>@@ -207,6 +238,8 @@ struct intel_plane {</div><div class='ctx'> #define DIP_TYPE_AVI    0x82</div><div class='ctx'> #define DIP_VERSION_AVI 0x2</div><div class='ctx'> #define DIP_LEN_AVI     13</div><div class='add'>+#define DIP_AVI_PR_1    0</div><div class='add'>+#define DIP_AVI_PR_2    1</div><div class='ctx'> </div><div class='ctx'> #define DIP_TYPE_SPD	0x83</div><div class='ctx'> #define DIP_VERSION_SPD	0x1</div><div class='hunk'>@@ -240,23 +273,36 @@ struct dip_infoframe {</div><div class='ctx'> 			uint8_t ITC_EC_Q_SC;</div><div class='ctx'> 			/* PB4 - VIC 6:0 */</div><div class='ctx'> 			uint8_t VIC;</div><div class='del'>-			/* PB5 - PR 3:0 */</div><div class='del'>-			uint8_t PR;</div><div class='add'>+			/* PB5 - YQ 7:6, CN 5:4, PR 3:0 */</div><div class='add'>+			uint8_t YQ_CN_PR;</div><div class='ctx'> 			/* PB6 to PB13 */</div><div class='ctx'> 			uint16_t top_bar_end;</div><div class='ctx'> 			uint16_t bottom_bar_start;</div><div class='ctx'> 			uint16_t left_bar_end;</div><div class='ctx'> 			uint16_t right_bar_start;</div><div class='del'>-		} avi;</div><div class='add'>+		} __attribute__ ((packed)) avi;</div><div class='ctx'> 		struct {</div><div class='ctx'> 			uint8_t vn[8];</div><div class='ctx'> 			uint8_t pd[16];</div><div class='ctx'> 			uint8_t sdi;</div><div class='del'>-		} spd;</div><div class='add'>+		} __attribute__ ((packed)) spd;</div><div class='ctx'> 		uint8_t payload[27];</div><div class='ctx'> 	} __attribute__ ((packed)) body;</div><div class='ctx'> } __attribute__((packed));</div><div class='ctx'> </div><div class='add'>+struct intel_hdmi {</div><div class='add'>+	struct intel_encoder base;</div><div class='add'>+	u32 sdvox_reg;</div><div class='add'>+	int ddc_bus;</div><div class='add'>+	int ddi_port;</div><div class='add'>+	uint32_t color_range;</div><div class='add'>+	bool has_hdmi_sink;</div><div class='add'>+	bool has_audio;</div><div class='add'>+	enum hdmi_force_audio force_audio;</div><div class='add'>+	void (*write_infoframe)(struct drm_encoder *encoder,</div><div class='add'>+				struct dip_infoframe *frame);</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static inline struct drm_crtc *</div><div class='ctx'> intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)</div><div class='ctx'> {</div><div class='hunk'>@@ -296,8 +342,13 @@ extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector)</div><div class='ctx'> </div><div class='ctx'> extern void intel_crt_init(struct drm_device *dev);</div><div class='ctx'> extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);</div><div class='del'>-void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);</div><div class='del'>-extern bool intel_sdvo_init(struct drm_device *dev, int output_device);</div><div class='add'>+extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);</div><div class='add'>+extern void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,</div><div class='add'>+			    struct drm_display_mode *adjusted_mode);</div><div class='add'>+extern void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder);</div><div class='add'>+extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);</div><div class='add'>+extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,</div><div class='add'>+			    bool is_sdvob);</div><div class='ctx'> extern void intel_dvo_init(struct drm_device *dev);</div><div class='ctx'> extern void intel_tv_init(struct drm_device *dev);</div><div class='ctx'> extern void intel_mark_busy(struct drm_device *dev,</div><div class='hunk'>@@ -311,6 +362,10 @@ extern bool intel_dpd_is_edp(struct drm_device *dev);</div><div class='ctx'> extern void intel_edp_link_config(struct intel_encoder *, int *, int *);</div><div class='ctx'> extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);</div><div class='ctx'> extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);</div><div class='add'>+extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,</div><div class='add'>+				      enum plane plane);</div><div class='add'>+</div><div class='add'>+void intel_sanitize_pm(struct drm_device *dev);</div><div class='ctx'> </div><div class='ctx'> /* intel_panel.c */</div><div class='ctx'> extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,</div><div class='hunk'>@@ -368,12 +423,9 @@ extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,</div><div class='ctx'> extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,</div><div class='ctx'> 				    u16 *blue, int regno);</div><div class='ctx'> extern void intel_enable_clock_gating(struct drm_device *dev);</div><div class='add'>+extern void ironlake_disable_rc6(struct drm_device *dev);</div><div class='ctx'> extern void ironlake_enable_drps(struct drm_device *dev);</div><div class='ctx'> extern void ironlake_disable_drps(struct drm_device *dev);</div><div class='del'>-extern void gen6_enable_rps(struct drm_i915_private *dev_priv);</div><div class='del'>-extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv);</div><div class='del'>-extern void gen6_disable_rps(struct drm_device *dev);</div><div class='del'>-extern void intel_init_emon(struct drm_device *dev);</div><div class='ctx'> </div><div class='ctx'> extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,</div><div class='ctx'> 				      struct drm_i915_gem_object *obj,</div><div class='hunk'>@@ -411,16 +463,43 @@ extern void intel_init_clock_gating(struct drm_device *dev);</div><div class='ctx'> extern void intel_write_eld(struct drm_encoder *encoder,</div><div class='ctx'> 			    struct drm_display_mode *mode);</div><div class='ctx'> extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);</div><div class='add'>+extern void intel_prepare_ddi(struct drm_device *dev);</div><div class='add'>+extern void hsw_fdi_link_train(struct drm_crtc *crtc);</div><div class='add'>+extern void intel_ddi_init(struct drm_device *dev, enum port port);</div><div class='ctx'> </div><div class='ctx'> /* For use by IVB LP watermark workaround in intel_sprite.c */</div><div class='del'>-extern void sandybridge_update_wm(struct drm_device *dev);</div><div class='add'>+extern void intel_update_watermarks(struct drm_device *dev);</div><div class='ctx'> extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,</div><div class='ctx'> 					   uint32_t sprite_width,</div><div class='ctx'> 					   int pixel_size);</div><div class='add'>+extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,</div><div class='add'>+			 struct drm_display_mode *mode);</div><div class='ctx'> </div><div class='ctx'> extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,</div><div class='ctx'> 				     struct drm_file *file_priv);</div><div class='ctx'> extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,</div><div class='ctx'> 				     struct drm_file *file_priv);</div><div class='ctx'> </div><div class='add'>+extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);</div><div class='add'>+</div><div class='add'>+/* Power-related functions, located in intel_pm.c */</div><div class='add'>+extern void intel_init_pm(struct drm_device *dev);</div><div class='add'>+/* FBC */</div><div class='add'>+extern bool intel_fbc_enabled(struct drm_device *dev);</div><div class='add'>+extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);</div><div class='add'>+extern void intel_update_fbc(struct drm_device *dev);</div><div class='add'>+/* IPS */</div><div class='add'>+extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);</div><div class='add'>+extern void intel_gpu_ips_teardown(void);</div><div class='add'>+</div><div class='add'>+extern void gen6_enable_rps(struct drm_i915_private *dev_priv);</div><div class='add'>+extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv);</div><div class='add'>+extern void gen6_disable_rps(struct drm_device *dev);</div><div class='add'>+extern void intel_init_emon(struct drm_device *dev);</div><div class='add'>+</div><div class='add'>+extern void intel_ddi_dpms(struct drm_encoder *encoder, int mode);</div><div class='add'>+extern void intel_ddi_mode_set(struct drm_encoder *encoder,</div><div class='add'>+				struct drm_display_mode *mode,</div><div class='add'>+				struct drm_display_mode *adjusted_mode);</div><div class='add'>+</div><div class='ctx'> #endif /* __INTEL_DRV_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c<br/>index 020a7d7f744d..60ba50b956f2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_dvo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_dvo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_dvo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_dvo.c</a></div><div class='hunk'>@@ -243,7 +243,7 @@ static int intel_dvo_get_modes(struct drm_connector *connector)</div><div class='ctx'> 	 * that's not the case.</div><div class='ctx'> 	 */</div><div class='ctx'> 	intel_ddc_get_modes(connector,</div><div class='del'>-			    &amp;dev_priv-&gt;gmbus[GMBUS_PORT_DPC].adapter);</div><div class='add'>+			    intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));</div><div class='ctx'> 	if (!list_empty(&amp;connector-&gt;probed_modes))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='hunk'>@@ -375,7 +375,7 @@ void intel_dvo_init(struct drm_device *dev)</div><div class='ctx'> 		 * special cases, but otherwise default to what's defined</div><div class='ctx'> 		 * in the spec.</div><div class='ctx'> 		 */</div><div class='del'>-		if (dvo-&gt;gpio != 0)</div><div class='add'>+		if (intel_gmbus_is_port_valid(dvo-&gt;gpio))</div><div class='ctx'> 			gpio = dvo-&gt;gpio;</div><div class='ctx'> 		else if (dvo-&gt;type == INTEL_DVO_CHIP_LVDS)</div><div class='ctx'> 			gpio = GMBUS_PORT_SSC;</div><div class='hunk'>@@ -386,7 +386,7 @@ void intel_dvo_init(struct drm_device *dev)</div><div class='ctx'> 		 * It appears that everything is on GPIOE except for panels</div><div class='ctx'> 		 * on i830 laptops, which are on GPIOB (DVOA).</div><div class='ctx'> 		 */</div><div class='del'>-		i2c = &amp;dev_priv-&gt;gmbus[gpio].adapter;</div><div class='add'>+		i2c = intel_gmbus_get_adapter(dev_priv, gpio);</div><div class='ctx'> </div><div class='ctx'> 		intel_dvo-&gt;dev = *dvo;</div><div class='ctx'> 		if (!dvo-&gt;dev_ops-&gt;init(&amp;intel_dvo-&gt;dev, i2c))</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c<br/>index 6e9ee33fd412..bf8690720a0c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_fb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_fb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_fb.c</a></div><div class='hunk'>@@ -94,7 +94,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev,</div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* Flush everything out, we'll be doing GTT only from now on */</div><div class='del'>-	ret = intel_pin_and_fence_fb_obj(dev, obj, false);</div><div class='add'>+	ret = intel_pin_and_fence_fb_obj(dev, obj, NULL);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		DRM_ERROR("failed to pin fb: %d\n", ret);</div><div class='ctx'> 		goto out_unref;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c<br/>index cae3e5f17a49..2ead3bf7c21d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_hdmi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_hdmi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_hdmi.c</a></div><div class='hunk'>@@ -37,19 +37,7 @@</div><div class='ctx'> #include "i915_drm.h"</div><div class='ctx'> #include "i915_drv.h"</div><div class='ctx'> </div><div class='del'>-struct intel_hdmi {</div><div class='del'>-	struct intel_encoder base;</div><div class='del'>-	u32 sdvox_reg;</div><div class='del'>-	int ddc_bus;</div><div class='del'>-	uint32_t color_range;</div><div class='del'>-	bool has_hdmi_sink;</div><div class='del'>-	bool has_audio;</div><div class='del'>-	enum hdmi_force_audio force_audio;</div><div class='del'>-	void (*write_infoframe)(struct drm_encoder *encoder,</div><div class='del'>-				struct dip_infoframe *frame);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder)</div><div class='add'>+struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	return container_of(encoder, struct intel_hdmi, base.base);</div><div class='ctx'> }</div><div class='hunk'>@@ -75,108 +63,246 @@ void intel_dip_infoframe_csum(struct dip_infoframe *frame)</div><div class='ctx'> 	frame-&gt;checksum = 0x100 - sum;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 intel_infoframe_index(struct dip_infoframe *frame)</div><div class='add'>+static u32 g4x_infoframe_index(struct dip_infoframe *frame)</div><div class='ctx'> {</div><div class='del'>-	u32 flags = 0;</div><div class='del'>-</div><div class='ctx'> 	switch (frame-&gt;type) {</div><div class='ctx'> 	case DIP_TYPE_AVI:</div><div class='del'>-		flags |= VIDEO_DIP_SELECT_AVI;</div><div class='del'>-		break;</div><div class='add'>+		return VIDEO_DIP_SELECT_AVI;</div><div class='ctx'> 	case DIP_TYPE_SPD:</div><div class='del'>-		flags |= VIDEO_DIP_SELECT_SPD;</div><div class='del'>-		break;</div><div class='add'>+		return VIDEO_DIP_SELECT_SPD;</div><div class='ctx'> 	default:</div><div class='ctx'> 		DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame-&gt;type);</div><div class='del'>-		break;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return flags;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 intel_infoframe_flags(struct dip_infoframe *frame)</div><div class='add'>+static u32 g4x_infoframe_enable(struct dip_infoframe *frame)</div><div class='ctx'> {</div><div class='del'>-	u32 flags = 0;</div><div class='add'>+	switch (frame-&gt;type) {</div><div class='add'>+	case DIP_TYPE_AVI:</div><div class='add'>+		return VIDEO_DIP_ENABLE_AVI;</div><div class='add'>+	case DIP_TYPE_SPD:</div><div class='add'>+		return VIDEO_DIP_ENABLE_SPD;</div><div class='add'>+	default:</div><div class='add'>+		DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame-&gt;type);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+static u32 hsw_infoframe_enable(struct dip_infoframe *frame)</div><div class='add'>+{</div><div class='ctx'> 	switch (frame-&gt;type) {</div><div class='ctx'> 	case DIP_TYPE_AVI:</div><div class='del'>-		flags |= VIDEO_DIP_ENABLE_AVI | VIDEO_DIP_FREQ_VSYNC;</div><div class='del'>-		break;</div><div class='add'>+		return VIDEO_DIP_ENABLE_AVI_HSW;</div><div class='ctx'> 	case DIP_TYPE_SPD:</div><div class='del'>-		flags |= VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_FREQ_VSYNC;</div><div class='del'>-		break;</div><div class='add'>+		return VIDEO_DIP_ENABLE_SPD_HSW;</div><div class='ctx'> 	default:</div><div class='ctx'> 		DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame-&gt;type);</div><div class='del'>-		break;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return flags;</div><div class='add'>+static u32 hsw_infoframe_data_reg(struct dip_infoframe *frame, enum pipe pipe)</div><div class='add'>+{</div><div class='add'>+	switch (frame-&gt;type) {</div><div class='add'>+	case DIP_TYPE_AVI:</div><div class='add'>+		return HSW_TVIDEO_DIP_AVI_DATA(pipe);</div><div class='add'>+	case DIP_TYPE_SPD:</div><div class='add'>+		return HSW_TVIDEO_DIP_SPD_DATA(pipe);</div><div class='add'>+	default:</div><div class='add'>+		DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame-&gt;type);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void i9xx_write_infoframe(struct drm_encoder *encoder,</div><div class='del'>-				 struct dip_infoframe *frame)</div><div class='add'>+static void g4x_write_infoframe(struct drm_encoder *encoder,</div><div class='add'>+				struct dip_infoframe *frame)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t *data = (uint32_t *)frame;</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);</div><div class='del'>-	u32 port, flags, val = I915_READ(VIDEO_DIP_CTL);</div><div class='add'>+	u32 val = I915_READ(VIDEO_DIP_CTL);</div><div class='ctx'> 	unsigned i, len = DIP_HEADER_SIZE + frame-&gt;len;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	/* XXX first guess at handling video port, is this corrent? */</div><div class='add'>+	val &amp;= ~VIDEO_DIP_PORT_MASK;</div><div class='ctx'> 	if (intel_hdmi-&gt;sdvox_reg == SDVOB)</div><div class='del'>-		port = VIDEO_DIP_PORT_B;</div><div class='add'>+		val |= VIDEO_DIP_PORT_B;</div><div class='ctx'> 	else if (intel_hdmi-&gt;sdvox_reg == SDVOC)</div><div class='del'>-		port = VIDEO_DIP_PORT_C;</div><div class='add'>+		val |= VIDEO_DIP_PORT_C;</div><div class='ctx'> 	else</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	flags = intel_infoframe_index(frame);</div><div class='add'>+	val &amp;= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */</div><div class='add'>+	val |= g4x_infoframe_index(frame);</div><div class='ctx'> </div><div class='del'>-	val &amp;= ~VIDEO_DIP_SELECT_MASK;</div><div class='add'>+	val &amp;= ~g4x_infoframe_enable(frame);</div><div class='add'>+	val |= VIDEO_DIP_ENABLE;</div><div class='ctx'> </div><div class='del'>-	I915_WRITE(VIDEO_DIP_CTL, val | port | flags);</div><div class='add'>+	I915_WRITE(VIDEO_DIP_CTL, val);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len; i += 4) {</div><div class='ctx'> 		I915_WRITE(VIDEO_DIP_DATA, *data);</div><div class='ctx'> 		data++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	flags |= intel_infoframe_flags(frame);</div><div class='add'>+	val |= g4x_infoframe_enable(frame);</div><div class='add'>+	val &amp;= ~VIDEO_DIP_FREQ_MASK;</div><div class='add'>+	val |= VIDEO_DIP_FREQ_VSYNC;</div><div class='ctx'> </div><div class='del'>-	I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | val | port | flags);</div><div class='add'>+	I915_WRITE(VIDEO_DIP_CTL, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ironlake_write_infoframe(struct drm_encoder *encoder,</div><div class='del'>-				     struct dip_infoframe *frame)</div><div class='add'>+static void ibx_write_infoframe(struct drm_encoder *encoder,</div><div class='add'>+				struct dip_infoframe *frame)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t *data = (uint32_t *)frame;</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_crtc *crtc = encoder-&gt;crtc;</div><div class='del'>-	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder-&gt;crtc);</div><div class='add'>+	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);</div><div class='ctx'> 	int reg = TVIDEO_DIP_CTL(intel_crtc-&gt;pipe);</div><div class='ctx'> 	unsigned i, len = DIP_HEADER_SIZE + frame-&gt;len;</div><div class='del'>-	u32 flags, val = I915_READ(reg);</div><div class='add'>+	u32 val = I915_READ(reg);</div><div class='add'>+</div><div class='add'>+	val &amp;= ~VIDEO_DIP_PORT_MASK;</div><div class='add'>+	switch (intel_hdmi-&gt;sdvox_reg) {</div><div class='add'>+	case HDMIB:</div><div class='add'>+		val |= VIDEO_DIP_PORT_B;</div><div class='add'>+		break;</div><div class='add'>+	case HDMIC:</div><div class='add'>+		val |= VIDEO_DIP_PORT_C;</div><div class='add'>+		break;</div><div class='add'>+	case HDMID:</div><div class='add'>+		val |= VIDEO_DIP_PORT_D;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	intel_wait_for_vblank(dev, intel_crtc-&gt;pipe);</div><div class='ctx'> </div><div class='del'>-	flags = intel_infoframe_index(frame);</div><div class='add'>+	val &amp;= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */</div><div class='add'>+	val |= g4x_infoframe_index(frame);</div><div class='add'>+</div><div class='add'>+	val &amp;= ~g4x_infoframe_enable(frame);</div><div class='add'>+	val |= VIDEO_DIP_ENABLE;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(reg, val);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i += 4) {</div><div class='add'>+		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc-&gt;pipe), *data);</div><div class='add'>+		data++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val |= g4x_infoframe_enable(frame);</div><div class='add'>+	val &amp;= ~VIDEO_DIP_FREQ_MASK;</div><div class='add'>+	val |= VIDEO_DIP_FREQ_VSYNC;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cpt_write_infoframe(struct drm_encoder *encoder,</div><div class='add'>+				struct dip_infoframe *frame)</div><div class='add'>+{</div><div class='add'>+	uint32_t *data = (uint32_t *)frame;</div><div class='add'>+	struct drm_device *dev = encoder-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder-&gt;crtc);</div><div class='add'>+	int reg = TVIDEO_DIP_CTL(intel_crtc-&gt;pipe);</div><div class='add'>+	unsigned i, len = DIP_HEADER_SIZE + frame-&gt;len;</div><div class='add'>+	u32 val = I915_READ(reg);</div><div class='add'>+</div><div class='add'>+	intel_wait_for_vblank(dev, intel_crtc-&gt;pipe);</div><div class='ctx'> </div><div class='ctx'> 	val &amp;= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */</div><div class='add'>+	val |= g4x_infoframe_index(frame);</div><div class='add'>+</div><div class='add'>+	/* The DIP control register spec says that we need to update the AVI</div><div class='add'>+	 * infoframe without clearing its enable bit */</div><div class='add'>+	if (frame-&gt;type == DIP_TYPE_AVI)</div><div class='add'>+		val |= VIDEO_DIP_ENABLE_AVI;</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~g4x_infoframe_enable(frame);</div><div class='add'>+</div><div class='add'>+	val |= VIDEO_DIP_ENABLE;</div><div class='ctx'> </div><div class='del'>-	I915_WRITE(reg, VIDEO_DIP_ENABLE | val | flags);</div><div class='add'>+	I915_WRITE(reg, val);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len; i += 4) {</div><div class='ctx'> 		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc-&gt;pipe), *data);</div><div class='ctx'> 		data++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	flags |= intel_infoframe_flags(frame);</div><div class='add'>+	val |= g4x_infoframe_enable(frame);</div><div class='add'>+	val &amp;= ~VIDEO_DIP_FREQ_MASK;</div><div class='add'>+	val |= VIDEO_DIP_FREQ_VSYNC;</div><div class='ctx'> </div><div class='del'>-	I915_WRITE(reg, VIDEO_DIP_ENABLE | val | flags);</div><div class='add'>+	I915_WRITE(reg, val);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void vlv_write_infoframe(struct drm_encoder *encoder,</div><div class='add'>+				     struct dip_infoframe *frame)</div><div class='add'>+{</div><div class='add'>+	uint32_t *data = (uint32_t *)frame;</div><div class='add'>+	struct drm_device *dev = encoder-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder-&gt;crtc);</div><div class='add'>+	int reg = VLV_TVIDEO_DIP_CTL(intel_crtc-&gt;pipe);</div><div class='add'>+	unsigned i, len = DIP_HEADER_SIZE + frame-&gt;len;</div><div class='add'>+	u32 val = I915_READ(reg);</div><div class='add'>+</div><div class='add'>+	intel_wait_for_vblank(dev, intel_crtc-&gt;pipe);</div><div class='add'>+</div><div class='add'>+	val &amp;= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */</div><div class='add'>+	val |= g4x_infoframe_index(frame);</div><div class='add'>+</div><div class='add'>+	val &amp;= ~g4x_infoframe_enable(frame);</div><div class='add'>+	val |= VIDEO_DIP_ENABLE;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(reg, val);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i += 4) {</div><div class='add'>+		I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc-&gt;pipe), *data);</div><div class='add'>+		data++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val |= g4x_infoframe_enable(frame);</div><div class='add'>+	val &amp;= ~VIDEO_DIP_FREQ_MASK;</div><div class='add'>+	val |= VIDEO_DIP_FREQ_VSYNC;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hsw_write_infoframe(struct drm_encoder *encoder,</div><div class='add'>+				struct dip_infoframe *frame)</div><div class='add'>+{</div><div class='add'>+	uint32_t *data = (uint32_t *)frame;</div><div class='add'>+	struct drm_device *dev = encoder-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder-&gt;crtc);</div><div class='add'>+	u32 ctl_reg = HSW_TVIDEO_DIP_CTL(intel_crtc-&gt;pipe);</div><div class='add'>+	u32 data_reg = hsw_infoframe_data_reg(frame, intel_crtc-&gt;pipe);</div><div class='add'>+	unsigned int i, len = DIP_HEADER_SIZE + frame-&gt;len;</div><div class='add'>+	u32 val = I915_READ(ctl_reg);</div><div class='add'>+</div><div class='add'>+	if (data_reg == 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	intel_wait_for_vblank(dev, intel_crtc-&gt;pipe);</div><div class='add'>+</div><div class='add'>+	val &amp;= ~hsw_infoframe_enable(frame);</div><div class='add'>+	I915_WRITE(ctl_reg, val);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i += 4) {</div><div class='add'>+		I915_WRITE(data_reg + i, *data);</div><div class='add'>+		data++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val |= hsw_infoframe_enable(frame);</div><div class='add'>+	I915_WRITE(ctl_reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void intel_set_infoframe(struct drm_encoder *encoder,</div><div class='ctx'> 				struct dip_infoframe *frame)</div><div class='ctx'> {</div><div class='hunk'>@@ -189,7 +315,8 @@ static void intel_set_infoframe(struct drm_encoder *encoder,</div><div class='ctx'> 	intel_hdmi-&gt;write_infoframe(encoder, frame);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)</div><div class='add'>+void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,</div><div class='add'>+					 struct drm_display_mode *adjusted_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct dip_infoframe avi_if = {</div><div class='ctx'> 		.type = DIP_TYPE_AVI,</div><div class='hunk'>@@ -197,10 +324,13 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)</div><div class='ctx'> 		.len = DIP_LEN_AVI,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	if (adjusted_mode-&gt;flags &amp; DRM_MODE_FLAG_DBLCLK)</div><div class='add'>+		avi_if.body.avi.YQ_CN_PR |= DIP_AVI_PR_2;</div><div class='add'>+</div><div class='ctx'> 	intel_set_infoframe(encoder, &amp;avi_if);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder)</div><div class='add'>+void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct dip_infoframe spd_if;</div><div class='ctx'> </div><div class='hunk'>@@ -221,8 +351,7 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct drm_crtc *crtc = encoder-&gt;crtc;</div><div class='del'>-	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder-&gt;crtc);</div><div class='ctx'> 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);</div><div class='ctx'> 	u32 sdvox;</div><div class='ctx'> </div><div class='hunk'>@@ -259,7 +388,7 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,</div><div class='ctx'> 	I915_WRITE(intel_hdmi-&gt;sdvox_reg, sdvox);</div><div class='ctx'> 	POSTING_READ(intel_hdmi-&gt;sdvox_reg);</div><div class='ctx'> </div><div class='del'>-	intel_hdmi_set_avi_infoframe(encoder);</div><div class='add'>+	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);</div><div class='ctx'> 	intel_hdmi_set_spd_infoframe(encoder);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -334,7 +463,8 @@ intel_hdmi_detect(struct drm_connector *connector, bool force)</div><div class='ctx'> 	intel_hdmi-&gt;has_hdmi_sink = false;</div><div class='ctx'> 	intel_hdmi-&gt;has_audio = false;</div><div class='ctx'> 	edid = drm_get_edid(connector,</div><div class='del'>-			    &amp;dev_priv-&gt;gmbus[intel_hdmi-&gt;ddc_bus].adapter);</div><div class='add'>+			    intel_gmbus_get_adapter(dev_priv,</div><div class='add'>+						    intel_hdmi-&gt;ddc_bus));</div><div class='ctx'> </div><div class='ctx'> 	if (edid) {</div><div class='ctx'> 		if (edid-&gt;input &amp; DRM_EDID_INPUT_DIGITAL) {</div><div class='hunk'>@@ -367,7 +497,8 @@ static int intel_hdmi_get_modes(struct drm_connector *connector)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	return intel_ddc_get_modes(connector,</div><div class='del'>-				   &amp;dev_priv-&gt;gmbus[intel_hdmi-&gt;ddc_bus].adapter);</div><div class='add'>+				   intel_gmbus_get_adapter(dev_priv,</div><div class='add'>+							   intel_hdmi-&gt;ddc_bus));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool</div><div class='hunk'>@@ -379,7 +510,8 @@ intel_hdmi_detect_audio(struct drm_connector *connector)</div><div class='ctx'> 	bool has_audio = false;</div><div class='ctx'> </div><div class='ctx'> 	edid = drm_get_edid(connector,</div><div class='del'>-			    &amp;dev_priv-&gt;gmbus[intel_hdmi-&gt;ddc_bus].adapter);</div><div class='add'>+			    intel_gmbus_get_adapter(dev_priv,</div><div class='add'>+						    intel_hdmi-&gt;ddc_bus));</div><div class='ctx'> 	if (edid) {</div><div class='ctx'> 		if (edid-&gt;input &amp; DRM_EDID_INPUT_DIGITAL)</div><div class='ctx'> 			has_audio = drm_detect_monitor_audio(edid);</div><div class='hunk'>@@ -393,8 +525,8 @@ intel_hdmi_detect_audio(struct drm_connector *connector)</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> intel_hdmi_set_property(struct drm_connector *connector,</div><div class='del'>-		      struct drm_property *property,</div><div class='del'>-		      uint64_t val)</div><div class='add'>+			struct drm_property *property,</div><div class='add'>+			uint64_t val)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = connector-&gt;dev-&gt;dev_private;</div><div class='hunk'>@@ -453,6 +585,14 @@ static void intel_hdmi_destroy(struct drm_connector *connector)</div><div class='ctx'> 	kfree(connector);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs_hsw = {</div><div class='add'>+	.dpms = intel_ddi_dpms,</div><div class='add'>+	.mode_fixup = intel_hdmi_mode_fixup,</div><div class='add'>+	.prepare = intel_encoder_prepare,</div><div class='add'>+	.mode_set = intel_ddi_mode_set,</div><div class='add'>+	.commit = intel_encoder_commit,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {</div><div class='ctx'> 	.dpms = intel_hdmi_dpms,</div><div class='ctx'> 	.mode_fixup = intel_hdmi_mode_fixup,</div><div class='hunk'>@@ -542,20 +682,60 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)</div><div class='ctx'> 		intel_encoder-&gt;clone_mask = (1 &lt;&lt; INTEL_HDMIF_CLONE_BIT);</div><div class='ctx'> 		intel_hdmi-&gt;ddc_bus = GMBUS_PORT_DPD;</div><div class='ctx'> 		dev_priv-&gt;hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;</div><div class='add'>+	} else if (sdvox_reg == DDI_BUF_CTL(PORT_B)) {</div><div class='add'>+		DRM_DEBUG_DRIVER("LPT: detected output on DDI B\n");</div><div class='add'>+		intel_encoder-&gt;clone_mask = (1 &lt;&lt; INTEL_HDMIB_CLONE_BIT);</div><div class='add'>+		intel_hdmi-&gt;ddc_bus = GMBUS_PORT_DPB;</div><div class='add'>+		intel_hdmi-&gt;ddi_port = PORT_B;</div><div class='add'>+		dev_priv-&gt;hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;</div><div class='add'>+	} else if (sdvox_reg == DDI_BUF_CTL(PORT_C)) {</div><div class='add'>+		DRM_DEBUG_DRIVER("LPT: detected output on DDI C\n");</div><div class='add'>+		intel_encoder-&gt;clone_mask = (1 &lt;&lt; INTEL_HDMIC_CLONE_BIT);</div><div class='add'>+		intel_hdmi-&gt;ddc_bus = GMBUS_PORT_DPC;</div><div class='add'>+		intel_hdmi-&gt;ddi_port = PORT_C;</div><div class='add'>+		dev_priv-&gt;hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;</div><div class='add'>+	} else if (sdvox_reg == DDI_BUF_CTL(PORT_D)) {</div><div class='add'>+		DRM_DEBUG_DRIVER("LPT: detected output on DDI D\n");</div><div class='add'>+		intel_encoder-&gt;clone_mask = (1 &lt;&lt; INTEL_HDMID_CLONE_BIT);</div><div class='add'>+		intel_hdmi-&gt;ddc_bus = GMBUS_PORT_DPD;</div><div class='add'>+		intel_hdmi-&gt;ddi_port = PORT_D;</div><div class='add'>+		dev_priv-&gt;hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;</div><div class='add'>+	} else {</div><div class='add'>+		/* If we got an unknown sdvox_reg, things are pretty much broken</div><div class='add'>+		 * in a way that we should let the kernel know about it */</div><div class='add'>+		BUG();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	intel_hdmi-&gt;sdvox_reg = sdvox_reg;</div><div class='ctx'> </div><div class='ctx'> 	if (!HAS_PCH_SPLIT(dev)) {</div><div class='del'>-		intel_hdmi-&gt;write_infoframe = i9xx_write_infoframe;</div><div class='add'>+		intel_hdmi-&gt;write_infoframe = g4x_write_infoframe;</div><div class='ctx'> 		I915_WRITE(VIDEO_DIP_CTL, 0);</div><div class='add'>+	} else if (IS_VALLEYVIEW(dev)) {</div><div class='add'>+		intel_hdmi-&gt;write_infoframe = vlv_write_infoframe;</div><div class='add'>+		for_each_pipe(i)</div><div class='add'>+			I915_WRITE(VLV_TVIDEO_DIP_CTL(i), 0);</div><div class='add'>+	} else if (IS_HASWELL(dev)) {</div><div class='add'>+		/* FIXME: Haswell has a new set of DIP frame registers, but we are</div><div class='add'>+		 * just doing the minimal required for HDMI to work at this stage.</div><div class='add'>+		 */</div><div class='add'>+		intel_hdmi-&gt;write_infoframe = hsw_write_infoframe;</div><div class='add'>+		for_each_pipe(i)</div><div class='add'>+			I915_WRITE(HSW_TVIDEO_DIP_CTL(i), 0);</div><div class='add'>+	} else if (HAS_PCH_IBX(dev)) {</div><div class='add'>+		intel_hdmi-&gt;write_infoframe = ibx_write_infoframe;</div><div class='add'>+		for_each_pipe(i)</div><div class='add'>+			I915_WRITE(TVIDEO_DIP_CTL(i), 0);</div><div class='ctx'> 	} else {</div><div class='del'>-		intel_hdmi-&gt;write_infoframe = ironlake_write_infoframe;</div><div class='add'>+		intel_hdmi-&gt;write_infoframe = cpt_write_infoframe;</div><div class='ctx'> 		for_each_pipe(i)</div><div class='ctx'> 			I915_WRITE(TVIDEO_DIP_CTL(i), 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	drm_encoder_helper_add(&amp;intel_encoder-&gt;base, &amp;intel_hdmi_helper_funcs);</div><div class='add'>+	if (IS_HASWELL(dev))</div><div class='add'>+		drm_encoder_helper_add(&amp;intel_encoder-&gt;base, &amp;intel_hdmi_helper_funcs_hsw);</div><div class='add'>+	else</div><div class='add'>+		drm_encoder_helper_add(&amp;intel_encoder-&gt;base, &amp;intel_hdmi_helper_funcs);</div><div class='ctx'> </div><div class='ctx'> 	intel_hdmi_add_properties(intel_hdmi, connector);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c<br/>index 8fdc95700218..1991a4408cf9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_i2c.c</a></div><div class='hunk'>@@ -35,6 +35,20 @@</div><div class='ctx'> #include "i915_drm.h"</div><div class='ctx'> #include "i915_drv.h"</div><div class='ctx'> </div><div class='add'>+struct gmbus_port {</div><div class='add'>+	const char *name;</div><div class='add'>+	int reg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct gmbus_port gmbus_ports[] = {</div><div class='add'>+	{ "ssc", GPIOB },</div><div class='add'>+	{ "vga", GPIOA },</div><div class='add'>+	{ "panel", GPIOC },</div><div class='add'>+	{ "dpc", GPIOD },</div><div class='add'>+	{ "dpb", GPIOE },</div><div class='add'>+	{ "dpd", GPIOF },</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Intel GPIO access functions */</div><div class='ctx'> </div><div class='ctx'> #define I2C_RISEFALL_TIME 10</div><div class='hunk'>@@ -49,10 +63,7 @@ void</div><div class='ctx'> intel_i2c_reset(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	if (HAS_PCH_SPLIT(dev))</div><div class='del'>-		I915_WRITE(PCH_GMBUS0, 0);</div><div class='del'>-	else</div><div class='del'>-		I915_WRITE(GMBUS0, 0);</div><div class='add'>+	I915_WRITE(dev_priv-&gt;gpio_mmio_base + GMBUS0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_i2c_quirk_set(struct drm_i915_private *dev_priv, bool enable)</div><div class='hunk'>@@ -140,63 +151,173 @@ static void set_data(void *data, int state_high)</div><div class='ctx'> 	POSTING_READ(bus-&gt;gpio_reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool</div><div class='add'>+static int</div><div class='add'>+intel_gpio_pre_xfer(struct i2c_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct intel_gmbus *bus = container_of(adapter,</div><div class='add'>+					       struct intel_gmbus,</div><div class='add'>+					       adapter);</div><div class='add'>+	struct drm_i915_private *dev_priv = bus-&gt;dev_priv;</div><div class='add'>+</div><div class='add'>+	intel_i2c_reset(dev_priv-&gt;dev);</div><div class='add'>+	intel_i2c_quirk_set(dev_priv, true);</div><div class='add'>+	set_data(bus, 1);</div><div class='add'>+	set_clock(bus, 1);</div><div class='add'>+	udelay(I2C_RISEFALL_TIME);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+intel_gpio_post_xfer(struct i2c_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct intel_gmbus *bus = container_of(adapter,</div><div class='add'>+					       struct intel_gmbus,</div><div class='add'>+					       adapter);</div><div class='add'>+	struct drm_i915_private *dev_priv = bus-&gt;dev_priv;</div><div class='add'>+</div><div class='add'>+	set_data(bus, 1);</div><div class='add'>+	set_clock(bus, 1);</div><div class='add'>+	intel_i2c_quirk_set(dev_priv, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='ctx'> intel_gpio_setup(struct intel_gmbus *bus, u32 pin)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = bus-&gt;dev_priv;</div><div class='del'>-	static const int map_pin_to_reg[] = {</div><div class='del'>-		0,</div><div class='del'>-		GPIOB,</div><div class='del'>-		GPIOA,</div><div class='del'>-		GPIOC,</div><div class='del'>-		GPIOD,</div><div class='del'>-		GPIOE,</div><div class='del'>-		0,</div><div class='del'>-		GPIOF,</div><div class='del'>-	};</div><div class='ctx'> 	struct i2c_algo_bit_data *algo;</div><div class='ctx'> </div><div class='del'>-	if (pin &gt;= ARRAY_SIZE(map_pin_to_reg) || !map_pin_to_reg[pin])</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='ctx'> 	algo = &amp;bus-&gt;bit_algo;</div><div class='ctx'> </div><div class='del'>-	bus-&gt;gpio_reg = map_pin_to_reg[pin];</div><div class='del'>-	if (HAS_PCH_SPLIT(dev_priv-&gt;dev))</div><div class='del'>-		bus-&gt;gpio_reg += PCH_GPIOA - GPIOA;</div><div class='add'>+	/* -1 to map pin pair to gmbus index */</div><div class='add'>+	bus-&gt;gpio_reg = dev_priv-&gt;gpio_mmio_base + gmbus_ports[pin - 1].reg;</div><div class='ctx'> </div><div class='ctx'> 	bus-&gt;adapter.algo_data = algo;</div><div class='ctx'> 	algo-&gt;setsda = set_data;</div><div class='ctx'> 	algo-&gt;setscl = set_clock;</div><div class='ctx'> 	algo-&gt;getsda = get_data;</div><div class='ctx'> 	algo-&gt;getscl = get_clock;</div><div class='add'>+	algo-&gt;pre_xfer = intel_gpio_pre_xfer;</div><div class='add'>+	algo-&gt;post_xfer = intel_gpio_post_xfer;</div><div class='ctx'> 	algo-&gt;udelay = I2C_RISEFALL_TIME;</div><div class='ctx'> 	algo-&gt;timeout = usecs_to_jiffies(2200);</div><div class='ctx'> 	algo-&gt;data = bus;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='add'>+static int</div><div class='add'>+gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,</div><div class='add'>+		u32 gmbus1_index)</div><div class='add'>+{</div><div class='add'>+	int reg_offset = dev_priv-&gt;gpio_mmio_base;</div><div class='add'>+	u16 len = msg-&gt;len;</div><div class='add'>+	u8 *buf = msg-&gt;buf;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GMBUS1 + reg_offset,</div><div class='add'>+		   gmbus1_index |</div><div class='add'>+		   GMBUS_CYCLE_WAIT |</div><div class='add'>+		   (len &lt;&lt; GMBUS_BYTE_COUNT_SHIFT) |</div><div class='add'>+		   (msg-&gt;addr &lt;&lt; GMBUS_SLAVE_ADDR_SHIFT) |</div><div class='add'>+		   GMBUS_SLAVE_READ | GMBUS_SW_RDY);</div><div class='add'>+	while (len) {</div><div class='add'>+		int ret;</div><div class='add'>+		u32 val, loop = 0;</div><div class='add'>+		u32 gmbus2;</div><div class='add'>+</div><div class='add'>+		ret = wait_for((gmbus2 = I915_READ(GMBUS2 + reg_offset)) &amp;</div><div class='add'>+			       (GMBUS_SATOER | GMBUS_HW_RDY),</div><div class='add'>+			       50);</div><div class='add'>+		if (ret)</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+		if (gmbus2 &amp; GMBUS_SATOER)</div><div class='add'>+			return -ENXIO;</div><div class='add'>+</div><div class='add'>+		val = I915_READ(GMBUS3 + reg_offset);</div><div class='add'>+		do {</div><div class='add'>+			*buf++ = val &amp; 0xff;</div><div class='add'>+			val &gt;&gt;= 8;</div><div class='add'>+		} while (--len &amp;&amp; ++loop &lt; 4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-intel_i2c_quirk_xfer(struct intel_gmbus *bus,</div><div class='del'>-		     struct i2c_msg *msgs,</div><div class='del'>-		     int num)</div><div class='add'>+gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)</div><div class='ctx'> {</div><div class='del'>-	struct drm_i915_private *dev_priv = bus-&gt;dev_priv;</div><div class='add'>+	int reg_offset = dev_priv-&gt;gpio_mmio_base;</div><div class='add'>+	u16 len = msg-&gt;len;</div><div class='add'>+	u8 *buf = msg-&gt;buf;</div><div class='add'>+	u32 val, loop;</div><div class='add'>+</div><div class='add'>+	val = loop = 0;</div><div class='add'>+	while (len &amp;&amp; loop &lt; 4) {</div><div class='add'>+		val |= *buf++ &lt;&lt; (8 * loop++);</div><div class='add'>+		len -= 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GMBUS3 + reg_offset, val);</div><div class='add'>+	I915_WRITE(GMBUS1 + reg_offset,</div><div class='add'>+		   GMBUS_CYCLE_WAIT |</div><div class='add'>+		   (msg-&gt;len &lt;&lt; GMBUS_BYTE_COUNT_SHIFT) |</div><div class='add'>+		   (msg-&gt;addr &lt;&lt; GMBUS_SLAVE_ADDR_SHIFT) |</div><div class='add'>+		   GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);</div><div class='add'>+	while (len) {</div><div class='add'>+		int ret;</div><div class='add'>+		u32 gmbus2;</div><div class='add'>+</div><div class='add'>+		val = loop = 0;</div><div class='add'>+		do {</div><div class='add'>+			val |= *buf++ &lt;&lt; (8 * loop);</div><div class='add'>+		} while (--len &amp;&amp; ++loop &lt; 4);</div><div class='add'>+</div><div class='add'>+		I915_WRITE(GMBUS3 + reg_offset, val);</div><div class='add'>+</div><div class='add'>+		ret = wait_for((gmbus2 = I915_READ(GMBUS2 + reg_offset)) &amp;</div><div class='add'>+			       (GMBUS_SATOER | GMBUS_HW_RDY),</div><div class='add'>+			       50);</div><div class='add'>+		if (ret)</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+		if (gmbus2 &amp; GMBUS_SATOER)</div><div class='add'>+			return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The gmbus controller can combine a 1 or 2 byte write with a read that</div><div class='add'>+ * immediately follows it by using an "INDEX" cycle.</div><div class='add'>+ */</div><div class='add'>+static bool</div><div class='add'>+gmbus_is_index_read(struct i2c_msg *msgs, int i, int num)</div><div class='add'>+{</div><div class='add'>+	return (i + 1 &lt; num &amp;&amp;</div><div class='add'>+		!(msgs[i].flags &amp; I2C_M_RD) &amp;&amp; msgs[i].len &lt;= 2 &amp;&amp;</div><div class='add'>+		(msgs[i + 1].flags &amp; I2C_M_RD));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+gmbus_xfer_index_read(struct drm_i915_private *dev_priv, struct i2c_msg *msgs)</div><div class='add'>+{</div><div class='add'>+	int reg_offset = dev_priv-&gt;gpio_mmio_base;</div><div class='add'>+	u32 gmbus1_index = 0;</div><div class='add'>+	u32 gmbus5 = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	intel_i2c_reset(dev_priv-&gt;dev);</div><div class='add'>+	if (msgs[0].len == 2)</div><div class='add'>+		gmbus5 = GMBUS_2BYTE_INDEX_EN |</div><div class='add'>+			 msgs[0].buf[1] | (msgs[0].buf[0] &lt;&lt; 8);</div><div class='add'>+	if (msgs[0].len == 1)</div><div class='add'>+		gmbus1_index = GMBUS_CYCLE_INDEX |</div><div class='add'>+			       (msgs[0].buf[0] &lt;&lt; GMBUS_SLAVE_INDEX_SHIFT);</div><div class='ctx'> </div><div class='del'>-	intel_i2c_quirk_set(dev_priv, true);</div><div class='del'>-	set_data(bus, 1);</div><div class='del'>-	set_clock(bus, 1);</div><div class='del'>-	udelay(I2C_RISEFALL_TIME);</div><div class='add'>+	/* GMBUS5 holds 16-bit index */</div><div class='add'>+	if (gmbus5)</div><div class='add'>+		I915_WRITE(GMBUS5 + reg_offset, gmbus5);</div><div class='ctx'> </div><div class='del'>-	ret = i2c_bit_algo.master_xfer(&amp;bus-&gt;adapter, msgs, num);</div><div class='add'>+	ret = gmbus_xfer_read(dev_priv, &amp;msgs[1], gmbus1_index);</div><div class='ctx'> </div><div class='del'>-	set_data(bus, 1);</div><div class='del'>-	set_clock(bus, 1);</div><div class='del'>-	intel_i2c_quirk_set(dev_priv, false);</div><div class='add'>+	/* Clear GMBUS5 after each index transfer */</div><div class='add'>+	if (gmbus5)</div><div class='add'>+		I915_WRITE(GMBUS5 + reg_offset, 0);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -210,117 +331,111 @@ gmbus_xfer(struct i2c_adapter *adapter,</div><div class='ctx'> 					       struct intel_gmbus,</div><div class='ctx'> 					       adapter);</div><div class='ctx'> 	struct drm_i915_private *dev_priv = bus-&gt;dev_priv;</div><div class='del'>-	int i, reg_offset, ret;</div><div class='add'>+	int i, reg_offset;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev_priv-&gt;gmbus_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (bus-&gt;force_bit) {</div><div class='del'>-		ret = intel_i2c_quirk_xfer(bus, msgs, num);</div><div class='add'>+		ret = i2c_bit_algo.master_xfer(adapter, msgs, num);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	reg_offset = HAS_PCH_SPLIT(dev_priv-&gt;dev) ? PCH_GMBUS0 - GMBUS0 : 0;</div><div class='add'>+	reg_offset = dev_priv-&gt;gpio_mmio_base;</div><div class='ctx'> </div><div class='ctx'> 	I915_WRITE(GMBUS0 + reg_offset, bus-&gt;reg0);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num; i++) {</div><div class='del'>-		u16 len = msgs[i].len;</div><div class='del'>-		u8 *buf = msgs[i].buf;</div><div class='del'>-</div><div class='del'>-		if (msgs[i].flags &amp; I2C_M_RD) {</div><div class='del'>-			I915_WRITE(GMBUS1 + reg_offset,</div><div class='del'>-				   GMBUS_CYCLE_WAIT |</div><div class='del'>-				   (i + 1 == num ? GMBUS_CYCLE_STOP : 0) |</div><div class='del'>-				   (len &lt;&lt; GMBUS_BYTE_COUNT_SHIFT) |</div><div class='del'>-				   (msgs[i].addr &lt;&lt; GMBUS_SLAVE_ADDR_SHIFT) |</div><div class='del'>-				   GMBUS_SLAVE_READ | GMBUS_SW_RDY);</div><div class='del'>-			POSTING_READ(GMBUS2+reg_offset);</div><div class='del'>-			do {</div><div class='del'>-				u32 val, loop = 0;</div><div class='del'>-</div><div class='del'>-				if (wait_for(I915_READ(GMBUS2 + reg_offset) &amp; (GMBUS_SATOER | GMBUS_HW_RDY), 50))</div><div class='del'>-					goto timeout;</div><div class='del'>-				if (I915_READ(GMBUS2 + reg_offset) &amp; GMBUS_SATOER)</div><div class='del'>-					goto clear_err;</div><div class='del'>-</div><div class='del'>-				val = I915_READ(GMBUS3 + reg_offset);</div><div class='del'>-				do {</div><div class='del'>-					*buf++ = val &amp; 0xff;</div><div class='del'>-					val &gt;&gt;= 8;</div><div class='del'>-				} while (--len &amp;&amp; ++loop &lt; 4);</div><div class='del'>-			} while (len);</div><div class='add'>+		u32 gmbus2;</div><div class='add'>+</div><div class='add'>+		if (gmbus_is_index_read(msgs, i, num)) {</div><div class='add'>+			ret = gmbus_xfer_index_read(dev_priv, &amp;msgs[i]);</div><div class='add'>+			i += 1;  /* set i to the index of the read xfer */</div><div class='add'>+		} else if (msgs[i].flags &amp; I2C_M_RD) {</div><div class='add'>+			ret = gmbus_xfer_read(dev_priv, &amp;msgs[i], 0);</div><div class='ctx'> 		} else {</div><div class='del'>-			u32 val, loop;</div><div class='del'>-</div><div class='del'>-			val = loop = 0;</div><div class='del'>-			do {</div><div class='del'>-				val |= *buf++ &lt;&lt; (8 * loop);</div><div class='del'>-			} while (--len &amp;&amp; ++loop &lt; 4);</div><div class='del'>-</div><div class='del'>-			I915_WRITE(GMBUS3 + reg_offset, val);</div><div class='del'>-			I915_WRITE(GMBUS1 + reg_offset,</div><div class='del'>-				   GMBUS_CYCLE_WAIT |</div><div class='del'>-				   (i + 1 == num ? GMBUS_CYCLE_STOP : 0) |</div><div class='del'>-				   (msgs[i].len &lt;&lt; GMBUS_BYTE_COUNT_SHIFT) |</div><div class='del'>-				   (msgs[i].addr &lt;&lt; GMBUS_SLAVE_ADDR_SHIFT) |</div><div class='del'>-				   GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);</div><div class='del'>-			POSTING_READ(GMBUS2+reg_offset);</div><div class='del'>-</div><div class='del'>-			while (len) {</div><div class='del'>-				if (wait_for(I915_READ(GMBUS2 + reg_offset) &amp; (GMBUS_SATOER | GMBUS_HW_RDY), 50))</div><div class='del'>-					goto timeout;</div><div class='del'>-				if (I915_READ(GMBUS2 + reg_offset) &amp; GMBUS_SATOER)</div><div class='del'>-					goto clear_err;</div><div class='del'>-</div><div class='del'>-				val = loop = 0;</div><div class='del'>-				do {</div><div class='del'>-					val |= *buf++ &lt;&lt; (8 * loop);</div><div class='del'>-				} while (--len &amp;&amp; ++loop &lt; 4);</div><div class='del'>-</div><div class='del'>-				I915_WRITE(GMBUS3 + reg_offset, val);</div><div class='del'>-				POSTING_READ(GMBUS2+reg_offset);</div><div class='del'>-			}</div><div class='add'>+			ret = gmbus_xfer_write(dev_priv, &amp;msgs[i]);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (i + 1 &lt; num &amp;&amp; wait_for(I915_READ(GMBUS2 + reg_offset) &amp; (GMBUS_SATOER | GMBUS_HW_WAIT_PHASE), 50))</div><div class='add'>+		if (ret == -ETIMEDOUT)</div><div class='add'>+			goto timeout;</div><div class='add'>+		if (ret == -ENXIO)</div><div class='add'>+			goto clear_err;</div><div class='add'>+</div><div class='add'>+		ret = wait_for((gmbus2 = I915_READ(GMBUS2 + reg_offset)) &amp;</div><div class='add'>+			       (GMBUS_SATOER | GMBUS_HW_WAIT_PHASE),</div><div class='add'>+			       50);</div><div class='add'>+		if (ret)</div><div class='ctx'> 			goto timeout;</div><div class='del'>-		if (I915_READ(GMBUS2 + reg_offset) &amp; GMBUS_SATOER)</div><div class='add'>+		if (gmbus2 &amp; GMBUS_SATOER)</div><div class='ctx'> 			goto clear_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	goto done;</div><div class='add'>+	/* Generate a STOP condition on the bus. Note that gmbus can't generata</div><div class='add'>+	 * a STOP on the very first cycle. To simplify the code we</div><div class='add'>+	 * unconditionally generate the STOP condition with an additional gmbus</div><div class='add'>+	 * cycle. */</div><div class='add'>+	I915_WRITE(GMBUS1 + reg_offset, GMBUS_CYCLE_STOP | GMBUS_SW_RDY);</div><div class='add'>+</div><div class='add'>+	/* Mark the GMBUS interface as disabled after waiting for idle.</div><div class='add'>+	 * We will re-enable it at the start of the next xfer,</div><div class='add'>+	 * till then let it sleep.</div><div class='add'>+	 */</div><div class='add'>+	if (wait_for((I915_READ(GMBUS2 + reg_offset) &amp; GMBUS_ACTIVE) == 0,</div><div class='add'>+		     10)) {</div><div class='add'>+		DRM_DEBUG_KMS("GMBUS [%s] timed out waiting for idle\n",</div><div class='add'>+			 adapter-&gt;name);</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+	I915_WRITE(GMBUS0 + reg_offset, 0);</div><div class='add'>+	ret = ret ?: i;</div><div class='add'>+	goto out;</div><div class='ctx'> </div><div class='ctx'> clear_err:</div><div class='add'>+	/*</div><div class='add'>+	 * Wait for bus to IDLE before clearing NAK.</div><div class='add'>+	 * If we clear the NAK while bus is still active, then it will stay</div><div class='add'>+	 * active and the next transaction may fail.</div><div class='add'>+	 *</div><div class='add'>+	 * If no ACK is received during the address phase of a transaction, the</div><div class='add'>+	 * adapter must report -ENXIO. It is not clear what to return if no ACK</div><div class='add'>+	 * is received at other times. But we have to be careful to not return</div><div class='add'>+	 * spurious -ENXIO because that will prevent i2c and drm edid functions</div><div class='add'>+	 * from retrying. So return -ENXIO only when gmbus properly quiescents -</div><div class='add'>+	 * timing out seems to happen when there _is_ a ddc chip present, but</div><div class='add'>+	 * it's slow responding and only answers on the 2nd retry.</div><div class='add'>+	 */</div><div class='add'>+	ret = -ENXIO;</div><div class='add'>+	if (wait_for((I915_READ(GMBUS2 + reg_offset) &amp; GMBUS_ACTIVE) == 0,</div><div class='add'>+		     10)) {</div><div class='add'>+		DRM_DEBUG_KMS("GMBUS [%s] timed out after NAK\n",</div><div class='add'>+			      adapter-&gt;name);</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Toggle the Software Clear Interrupt bit. This has the effect</div><div class='ctx'> 	 * of resetting the GMBUS controller and so clearing the</div><div class='ctx'> 	 * BUS_ERROR raised by the slave's NAK.</div><div class='ctx'> 	 */</div><div class='ctx'> 	I915_WRITE(GMBUS1 + reg_offset, GMBUS_SW_CLR_INT);</div><div class='ctx'> 	I915_WRITE(GMBUS1 + reg_offset, 0);</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	/* Mark the GMBUS interface as disabled after waiting for idle.</div><div class='del'>-	 * We will re-enable it at the start of the next xfer,</div><div class='del'>-	 * till then let it sleep.</div><div class='del'>-	 */</div><div class='del'>-	if (wait_for((I915_READ(GMBUS2 + reg_offset) &amp; GMBUS_ACTIVE) == 0, 10))</div><div class='del'>-		DRM_INFO("GMBUS timed out waiting for idle\n");</div><div class='ctx'> 	I915_WRITE(GMBUS0 + reg_offset, 0);</div><div class='del'>-	ret = i;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("GMBUS [%s] NAK for addr: %04x %c(%d)\n",</div><div class='add'>+			 adapter-&gt;name, msgs[i].addr,</div><div class='add'>+			 (msgs[i].flags &amp; I2C_M_RD) ? 'r' : 'w', msgs[i].len);</div><div class='add'>+</div><div class='ctx'> 	goto out;</div><div class='ctx'> </div><div class='ctx'> timeout:</div><div class='del'>-	DRM_INFO("GMBUS timed out, falling back to bit banging on pin %d [%s]\n",</div><div class='del'>-		 bus-&gt;reg0 &amp; 0xff, bus-&gt;adapter.name);</div><div class='add'>+	DRM_INFO("GMBUS [%s] timed out, falling back to bit banging on pin %d\n",</div><div class='add'>+		 bus-&gt;adapter.name, bus-&gt;reg0 &amp; 0xff);</div><div class='ctx'> 	I915_WRITE(GMBUS0 + reg_offset, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Hardware may not support GMBUS over these pins? Try GPIO bitbanging instead. */</div><div class='del'>-	if (!bus-&gt;has_gpio) {</div><div class='del'>-		ret = -EIO;</div><div class='del'>-	} else {</div><div class='del'>-		bus-&gt;force_bit = true;</div><div class='del'>-		ret = intel_i2c_quirk_xfer(bus, msgs, num);</div><div class='del'>-	}</div><div class='add'>+	bus-&gt;force_bit = true;</div><div class='add'>+	ret = i2c_bit_algo.master_xfer(adapter, msgs, num);</div><div class='add'>+</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;dev_priv-&gt;gmbus_mutex);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -346,35 +461,26 @@ static const struct i2c_algorithm gmbus_algorithm = {</div><div class='ctx'>  */</div><div class='ctx'> int intel_setup_gmbus(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	static const char *names[GMBUS_NUM_PORTS] = {</div><div class='del'>-		"disabled",</div><div class='del'>-		"ssc",</div><div class='del'>-		"vga",</div><div class='del'>-		"panel",</div><div class='del'>-		"dpc",</div><div class='del'>-		"dpb",</div><div class='del'>-		"reserved",</div><div class='del'>-		"dpd",</div><div class='del'>-	};</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;gmbus = kcalloc(GMBUS_NUM_PORTS, sizeof(struct intel_gmbus),</div><div class='del'>-				  GFP_KERNEL);</div><div class='del'>-	if (dev_priv-&gt;gmbus == NULL)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (HAS_PCH_SPLIT(dev))</div><div class='add'>+		dev_priv-&gt;gpio_mmio_base = PCH_GPIOA - GPIOA;</div><div class='add'>+	else</div><div class='add'>+		dev_priv-&gt;gpio_mmio_base = 0;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;dev_priv-&gt;gmbus_mutex);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; GMBUS_NUM_PORTS; i++) {</div><div class='ctx'> 		struct intel_gmbus *bus = &amp;dev_priv-&gt;gmbus[i];</div><div class='add'>+		u32 port = i + 1; /* +1 to map gmbus index to pin pair */</div><div class='ctx'> </div><div class='ctx'> 		bus-&gt;adapter.owner = THIS_MODULE;</div><div class='ctx'> 		bus-&gt;adapter.class = I2C_CLASS_DDC;</div><div class='ctx'> 		snprintf(bus-&gt;adapter.name,</div><div class='ctx'> 			 sizeof(bus-&gt;adapter.name),</div><div class='ctx'> 			 "i915 gmbus %s",</div><div class='del'>-			 names[i]);</div><div class='add'>+			 gmbus_ports[i].name);</div><div class='ctx'> </div><div class='ctx'> 		bus-&gt;adapter.dev.parent = &amp;dev-&gt;pdev-&gt;dev;</div><div class='ctx'> 		bus-&gt;dev_priv = dev_priv;</div><div class='hunk'>@@ -385,13 +491,13 @@ int intel_setup_gmbus(struct drm_device *dev)</div><div class='ctx'> 			goto err;</div><div class='ctx'> </div><div class='ctx'> 		/* By default use a conservative clock rate */</div><div class='del'>-		bus-&gt;reg0 = i | GMBUS_RATE_100KHZ;</div><div class='add'>+		bus-&gt;reg0 = port | GMBUS_RATE_100KHZ;</div><div class='ctx'> </div><div class='del'>-		bus-&gt;has_gpio = intel_gpio_setup(bus, i);</div><div class='del'>-</div><div class='del'>-		/* XXX force bit banging until GMBUS is fully debugged */</div><div class='del'>-		if (bus-&gt;has_gpio)</div><div class='add'>+		/* gmbus seems to be broken on i830 */</div><div class='add'>+		if (IS_I830(dev))</div><div class='ctx'> 			bus-&gt;force_bit = true;</div><div class='add'>+</div><div class='add'>+		intel_gpio_setup(bus, port);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	intel_i2c_reset(dev_priv-&gt;dev);</div><div class='hunk'>@@ -403,11 +509,18 @@ err:</div><div class='ctx'> 		struct intel_gmbus *bus = &amp;dev_priv-&gt;gmbus[i];</div><div class='ctx'> 		i2c_del_adapter(&amp;bus-&gt;adapter);</div><div class='ctx'> 	}</div><div class='del'>-	kfree(dev_priv-&gt;gmbus);</div><div class='del'>-	dev_priv-&gt;gmbus = NULL;</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct i2c_adapter *intel_gmbus_get_adapter(struct drm_i915_private *dev_priv,</div><div class='add'>+					    unsigned port)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(!intel_gmbus_is_port_valid(port));</div><div class='add'>+	/* -1 to map pin pair to gmbus index */</div><div class='add'>+	return (intel_gmbus_is_port_valid(port)) ?</div><div class='add'>+		&amp;dev_priv-&gt;gmbus[port - 1].adapter : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void intel_gmbus_set_speed(struct i2c_adapter *adapter, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_gmbus *bus = to_intel_gmbus(adapter);</div><div class='hunk'>@@ -419,8 +532,7 @@ void intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_gmbus *bus = to_intel_gmbus(adapter);</div><div class='ctx'> </div><div class='del'>-	if (bus-&gt;has_gpio)</div><div class='del'>-		bus-&gt;force_bit = force_bit;</div><div class='add'>+	bus-&gt;force_bit = force_bit;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_teardown_gmbus(struct drm_device *dev)</div><div class='hunk'>@@ -435,7 +547,4 @@ void intel_teardown_gmbus(struct drm_device *dev)</div><div class='ctx'> 		struct intel_gmbus *bus = &amp;dev_priv-&gt;gmbus[i];</div><div class='ctx'> 		i2c_del_adapter(&amp;bus-&gt;adapter);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	kfree(dev_priv-&gt;gmbus);</div><div class='del'>-	dev_priv-&gt;gmbus = NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c<br/>index 30e2c82101de..08eb04c787e8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_lvds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_lvds.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_lvds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_lvds.c</a></div><div class='hunk'>@@ -480,7 +480,7 @@ static int intel_lvds_get_modes(struct drm_connector *connector)</div><div class='ctx'> </div><div class='ctx'> static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)</div><div class='ctx'> {</div><div class='del'>-	DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id-&gt;ident);</div><div class='add'>+	DRM_INFO("Skipping forced modeset for %s\n", id-&gt;ident);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -628,7 +628,7 @@ static const struct drm_encoder_funcs intel_lvds_enc_funcs = {</div><div class='ctx'> </div><div class='ctx'> static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)</div><div class='ctx'> {</div><div class='del'>-	DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id-&gt;ident);</div><div class='add'>+	DRM_INFO("Skipping LVDS initialization for %s\n", id-&gt;ident);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -747,10 +747,18 @@ static const struct dmi_system_id intel_no_lvds[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.callback = intel_no_lvds_dmi_callback,</div><div class='add'>+		.ident = "Hewlett-Packard HP t5740e Thin Client",</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = intel_no_lvds_dmi_callback,</div><div class='ctx'> 		.ident = "Hewlett-Packard t5745",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),</div><div class='del'>-			DMI_MATCH(DMI_BOARD_NAME, "hp t5745"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='hunk'>@@ -758,7 +766,7 @@ static const struct dmi_system_id intel_no_lvds[] = {</div><div class='ctx'> 		.ident = "Hewlett-Packard st5747",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),</div><div class='del'>-			DMI_MATCH(DMI_BOARD_NAME, "hp st5747"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='hunk'>@@ -851,8 +859,8 @@ static bool lvds_is_present_in_vbt(struct drm_device *dev,</div><div class='ctx'> 		    child-&gt;device_type != DEVICE_TYPE_LFP)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (child-&gt;i2c_pin)</div><div class='del'>-		    *i2c_pin = child-&gt;i2c_pin;</div><div class='add'>+		if (intel_gmbus_is_port_valid(child-&gt;i2c_pin))</div><div class='add'>+			*i2c_pin = child-&gt;i2c_pin;</div><div class='ctx'> </div><div class='ctx'> 		/* However, we cannot trust the BIOS writers to populate</div><div class='ctx'> 		 * the VBT correctly.  Since LVDS requires additional</div><div class='hunk'>@@ -993,7 +1001,8 @@ bool intel_lvds_init(struct drm_device *dev)</div><div class='ctx'> 	 * preferred mode is the right one.</div><div class='ctx'> 	 */</div><div class='ctx'> 	intel_lvds-&gt;edid = drm_get_edid(connector,</div><div class='del'>-					&amp;dev_priv-&gt;gmbus[pin].adapter);</div><div class='add'>+					intel_gmbus_get_adapter(dev_priv,</div><div class='add'>+								pin));</div><div class='ctx'> 	if (intel_lvds-&gt;edid) {</div><div class='ctx'> 		if (drm_add_edid_modes(connector,</div><div class='ctx'> 				       intel_lvds-&gt;edid)) {</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c<br/>index d1928e79d9b6..d67ec3a51e42 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_modes.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_modes.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_modes.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_modes.c</a></div><div class='hunk'>@@ -56,7 +56,8 @@ bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus)</div><div class='ctx'> 		}</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	return i2c_transfer(&amp;dev_priv-&gt;gmbus[ddc_bus].adapter, msgs, 2) == 2;</div><div class='add'>+	return i2c_transfer(intel_gmbus_get_adapter(dev_priv, ddc_bus),</div><div class='add'>+			    msgs, 2) == 2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c<br/>index 289140bc83cb..18bd0af855dc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_opregion.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_opregion.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_opregion.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_opregion.c</a></div><div class='hunk'>@@ -25,6 +25,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/acpi_io.h&gt;</div><div class='ctx'> #include &lt;acpi/video.h&gt;</div><div class='hunk'>@@ -149,7 +151,7 @@ struct opregion_asle {</div><div class='ctx'> static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct opregion_asle *asle = dev_priv-&gt;opregion.asle;</div><div class='add'>+	struct opregion_asle __iomem *asle = dev_priv-&gt;opregion.asle;</div><div class='ctx'> 	u32 max;</div><div class='ctx'> </div><div class='ctx'> 	if (!(bclp &amp; ASLE_BCLP_VALID))</div><div class='hunk'>@@ -161,7 +163,7 @@ static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)</div><div class='ctx'> </div><div class='ctx'> 	max = intel_panel_get_max_backlight(dev);</div><div class='ctx'> 	intel_panel_set_backlight(dev, bclp * max / 255);</div><div class='del'>-	asle-&gt;cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID;</div><div class='add'>+	iowrite32((bclp*0x64)/0xff | ASLE_CBLV_VALID, &amp;asle-&gt;cblv);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -198,14 +200,14 @@ static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)</div><div class='ctx'> void intel_opregion_asle_intr(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct opregion_asle *asle = dev_priv-&gt;opregion.asle;</div><div class='add'>+	struct opregion_asle __iomem *asle = dev_priv-&gt;opregion.asle;</div><div class='ctx'> 	u32 asle_stat = 0;</div><div class='ctx'> 	u32 asle_req;</div><div class='ctx'> </div><div class='ctx'> 	if (!asle)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	asle_req = asle-&gt;aslc &amp; ASLE_REQ_MSK;</div><div class='add'>+	asle_req = ioread32(&amp;asle-&gt;aslc) &amp; ASLE_REQ_MSK;</div><div class='ctx'> </div><div class='ctx'> 	if (!asle_req) {</div><div class='ctx'> 		DRM_DEBUG_DRIVER("non asle set request??\n");</div><div class='hunk'>@@ -213,31 +215,31 @@ void intel_opregion_asle_intr(struct drm_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (asle_req &amp; ASLE_SET_ALS_ILLUM)</div><div class='del'>-		asle_stat |= asle_set_als_illum(dev, asle-&gt;alsi);</div><div class='add'>+		asle_stat |= asle_set_als_illum(dev, ioread32(&amp;asle-&gt;alsi));</div><div class='ctx'> </div><div class='ctx'> 	if (asle_req &amp; ASLE_SET_BACKLIGHT)</div><div class='del'>-		asle_stat |= asle_set_backlight(dev, asle-&gt;bclp);</div><div class='add'>+		asle_stat |= asle_set_backlight(dev, ioread32(&amp;asle-&gt;bclp));</div><div class='ctx'> </div><div class='ctx'> 	if (asle_req &amp; ASLE_SET_PFIT)</div><div class='del'>-		asle_stat |= asle_set_pfit(dev, asle-&gt;pfit);</div><div class='add'>+		asle_stat |= asle_set_pfit(dev, ioread32(&amp;asle-&gt;pfit));</div><div class='ctx'> </div><div class='ctx'> 	if (asle_req &amp; ASLE_SET_PWM_FREQ)</div><div class='del'>-		asle_stat |= asle_set_pwm_freq(dev, asle-&gt;pfmb);</div><div class='add'>+		asle_stat |= asle_set_pwm_freq(dev, ioread32(&amp;asle-&gt;pfmb));</div><div class='ctx'> </div><div class='del'>-	asle-&gt;aslc = asle_stat;</div><div class='add'>+	iowrite32(asle_stat, &amp;asle-&gt;aslc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_opregion_gse_intr(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct opregion_asle *asle = dev_priv-&gt;opregion.asle;</div><div class='add'>+	struct opregion_asle __iomem *asle = dev_priv-&gt;opregion.asle;</div><div class='ctx'> 	u32 asle_stat = 0;</div><div class='ctx'> 	u32 asle_req;</div><div class='ctx'> </div><div class='ctx'> 	if (!asle)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	asle_req = asle-&gt;aslc &amp; ASLE_REQ_MSK;</div><div class='add'>+	asle_req = ioread32(&amp;asle-&gt;aslc) &amp; ASLE_REQ_MSK;</div><div class='ctx'> </div><div class='ctx'> 	if (!asle_req) {</div><div class='ctx'> 		DRM_DEBUG_DRIVER("non asle set request??\n");</div><div class='hunk'>@@ -250,7 +252,7 @@ void intel_opregion_gse_intr(struct drm_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (asle_req &amp; ASLE_SET_BACKLIGHT)</div><div class='del'>-		asle_stat |= asle_set_backlight(dev, asle-&gt;bclp);</div><div class='add'>+		asle_stat |= asle_set_backlight(dev, ioread32(&amp;asle-&gt;bclp));</div><div class='ctx'> </div><div class='ctx'> 	if (asle_req &amp; ASLE_SET_PFIT) {</div><div class='ctx'> 		DRM_DEBUG_DRIVER("Pfit is not supported\n");</div><div class='hunk'>@@ -262,7 +264,7 @@ void intel_opregion_gse_intr(struct drm_device *dev)</div><div class='ctx'> 		asle_stat |= ASLE_PWM_FREQ_FAILED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	asle-&gt;aslc = asle_stat;</div><div class='add'>+	iowrite32(asle_stat, &amp;asle-&gt;aslc);</div><div class='ctx'> }</div><div class='ctx'> #define ASLE_ALS_EN    (1&lt;&lt;0)</div><div class='ctx'> #define ASLE_BLC_EN    (1&lt;&lt;1)</div><div class='hunk'>@@ -272,15 +274,16 @@ void intel_opregion_gse_intr(struct drm_device *dev)</div><div class='ctx'> void intel_opregion_enable_asle(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct opregion_asle *asle = dev_priv-&gt;opregion.asle;</div><div class='add'>+	struct opregion_asle __iomem *asle = dev_priv-&gt;opregion.asle;</div><div class='ctx'> </div><div class='ctx'> 	if (asle) {</div><div class='ctx'> 		if (IS_MOBILE(dev))</div><div class='ctx'> 			intel_enable_asle(dev);</div><div class='ctx'> </div><div class='del'>-		asle-&gt;tche = ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN |</div><div class='del'>-			ASLE_PFMB_EN;</div><div class='del'>-		asle-&gt;ardy = 1;</div><div class='add'>+		iowrite32(ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN |</div><div class='add'>+			  ASLE_PFMB_EN,</div><div class='add'>+			  &amp;asle-&gt;tche);</div><div class='add'>+		iowrite32(1, &amp;asle-&gt;ardy);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -298,7 +301,7 @@ static int intel_opregion_video_event(struct notifier_block *nb,</div><div class='ctx'> 	   Linux, these are handled by the dock, button and video drivers.</div><div class='ctx'> 	*/</div><div class='ctx'> </div><div class='del'>-	struct opregion_acpi *acpi;</div><div class='add'>+	struct opregion_acpi __iomem *acpi;</div><div class='ctx'> 	struct acpi_bus_event *event = data;</div><div class='ctx'> 	int ret = NOTIFY_OK;</div><div class='ctx'> </div><div class='hunk'>@@ -310,10 +313,11 @@ static int intel_opregion_video_event(struct notifier_block *nb,</div><div class='ctx'> </div><div class='ctx'> 	acpi = system_opregion-&gt;acpi;</div><div class='ctx'> </div><div class='del'>-	if (event-&gt;type == 0x80 &amp;&amp; !(acpi-&gt;cevt &amp; 0x1))</div><div class='add'>+	if (event-&gt;type == 0x80 &amp;&amp;</div><div class='add'>+	    (ioread32(&amp;acpi-&gt;cevt) &amp; 1) == 0)</div><div class='ctx'> 		ret = NOTIFY_BAD;</div><div class='ctx'> </div><div class='del'>-	acpi-&gt;csts = 0;</div><div class='add'>+	iowrite32(0, &amp;acpi-&gt;csts);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -337,6 +341,7 @@ static void intel_didl_outputs(struct drm_device *dev)</div><div class='ctx'> 	struct acpi_device *acpi_dev, *acpi_cdev, *acpi_video_bus = NULL;</div><div class='ctx'> 	unsigned long long device_id;</div><div class='ctx'> 	acpi_status status;</div><div class='add'>+	u32 temp;</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	handle = DEVICE_ACPI_HANDLE(&amp;dev-&gt;pdev-&gt;dev);</div><div class='hunk'>@@ -355,7 +360,7 @@ static void intel_didl_outputs(struct drm_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!acpi_video_bus) {</div><div class='del'>-		printk(KERN_WARNING "No ACPI video bus found\n");</div><div class='add'>+		pr_warn("No ACPI video bus found\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -371,7 +376,8 @@ static void intel_didl_outputs(struct drm_device *dev)</div><div class='ctx'> 		if (ACPI_SUCCESS(status)) {</div><div class='ctx'> 			if (!device_id)</div><div class='ctx'> 				goto blind_set;</div><div class='del'>-			opregion-&gt;acpi-&gt;didl[i] = (u32)(device_id &amp; 0x0f0f);</div><div class='add'>+			iowrite32((u32)(device_id &amp; 0x0f0f),</div><div class='add'>+				  &amp;opregion-&gt;acpi-&gt;didl[i]);</div><div class='ctx'> 			i++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -379,7 +385,7 @@ static void intel_didl_outputs(struct drm_device *dev)</div><div class='ctx'> end:</div><div class='ctx'> 	/* If fewer than 8 outputs, the list must be null terminated */</div><div class='ctx'> 	if (i &lt; 8)</div><div class='del'>-		opregion-&gt;acpi-&gt;didl[i] = 0;</div><div class='add'>+		iowrite32(0, &amp;opregion-&gt;acpi-&gt;didl[i]);</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> blind_set:</div><div class='hunk'>@@ -413,7 +419,9 @@ blind_set:</div><div class='ctx'> 			output_type = ACPI_LVDS_OUTPUT;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		opregion-&gt;acpi-&gt;didl[i] |= (1&lt;&lt;31) | output_type | i;</div><div class='add'>+		temp = ioread32(&amp;opregion-&gt;acpi-&gt;didl[i]);</div><div class='add'>+		iowrite32(temp | (1&lt;&lt;31) | output_type | i,</div><div class='add'>+			  &amp;opregion-&gt;acpi-&gt;didl[i]);</div><div class='ctx'> 		i++;</div><div class='ctx'> 	}</div><div class='ctx'> 	goto end;</div><div class='hunk'>@@ -434,8 +442,8 @@ void intel_opregion_init(struct drm_device *dev)</div><div class='ctx'> 		/* Notify BIOS we are ready to handle ACPI video ext notifs.</div><div class='ctx'> 		 * Right now, all the events are handled by the ACPI video module.</div><div class='ctx'> 		 * We don't actually need to do anything with them. */</div><div class='del'>-		opregion-&gt;acpi-&gt;csts = 0;</div><div class='del'>-		opregion-&gt;acpi-&gt;drdy = 1;</div><div class='add'>+		iowrite32(0, &amp;opregion-&gt;acpi-&gt;csts);</div><div class='add'>+		iowrite32(1, &amp;opregion-&gt;acpi-&gt;drdy);</div><div class='ctx'> </div><div class='ctx'> 		system_opregion = opregion;</div><div class='ctx'> 		register_acpi_notifier(&amp;intel_opregion_notifier);</div><div class='hunk'>@@ -454,7 +462,7 @@ void intel_opregion_fini(struct drm_device *dev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (opregion-&gt;acpi) {</div><div class='del'>-		opregion-&gt;acpi-&gt;drdy = 0;</div><div class='add'>+		iowrite32(0, &amp;opregion-&gt;acpi-&gt;drdy);</div><div class='ctx'> </div><div class='ctx'> 		system_opregion = NULL;</div><div class='ctx'> 		unregister_acpi_notifier(&amp;intel_opregion_notifier);</div><div class='hunk'>@@ -474,8 +482,9 @@ int intel_opregion_setup(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_opregion *opregion = &amp;dev_priv-&gt;opregion;</div><div class='del'>-	void *base;</div><div class='add'>+	void __iomem *base;</div><div class='ctx'> 	u32 asls, mboxes;</div><div class='add'>+	char buf[sizeof(OPREGION_SIGNATURE)];</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	pci_read_config_dword(dev-&gt;pdev, PCI_ASLS, &amp;asls);</div><div class='hunk'>@@ -489,7 +498,9 @@ int intel_opregion_setup(struct drm_device *dev)</div><div class='ctx'> 	if (!base)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (memcmp(base, OPREGION_SIGNATURE, 16)) {</div><div class='add'>+	memcpy_fromio(buf, base, sizeof(buf));</div><div class='add'>+</div><div class='add'>+	if (memcmp(buf, OPREGION_SIGNATURE, 16)) {</div><div class='ctx'> 		DRM_DEBUG_DRIVER("opregion signature mismatch\n");</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		goto err_out;</div><div class='hunk'>@@ -499,7 +510,7 @@ int intel_opregion_setup(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	opregion-&gt;lid_state = base + ACPI_CLID;</div><div class='ctx'> </div><div class='del'>-	mboxes = opregion-&gt;header-&gt;mboxes;</div><div class='add'>+	mboxes = ioread32(&amp;opregion-&gt;header-&gt;mboxes);</div><div class='ctx'> 	if (mboxes &amp; MBOX_ACPI) {</div><div class='ctx'> 		DRM_DEBUG_DRIVER("Public ACPI methods supported\n");</div><div class='ctx'> 		opregion-&gt;acpi = base + OPREGION_ACPI_OFFSET;</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c<br/>index 80b331c322fb..458743da3774 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_overlay.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_overlay.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_overlay.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_overlay.c</a></div><div class='hunk'>@@ -187,14 +187,14 @@ struct intel_overlay {</div><div class='ctx'> 	void (*flip_tail)(struct intel_overlay *);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct overlay_registers *</div><div class='add'>+static struct overlay_registers __iomem *</div><div class='ctx'> intel_overlay_map_regs(struct intel_overlay *overlay)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = overlay-&gt;dev-&gt;dev_private;</div><div class='del'>-	struct overlay_registers *regs;</div><div class='add'>+	struct overlay_registers __iomem *regs;</div><div class='ctx'> </div><div class='ctx'> 	if (OVERLAY_NEEDS_PHYSICAL(overlay-&gt;dev))</div><div class='del'>-		regs = overlay-&gt;reg_bo-&gt;phys_obj-&gt;handle-&gt;vaddr;</div><div class='add'>+		regs = (struct overlay_registers __iomem *)overlay-&gt;reg_bo-&gt;phys_obj-&gt;handle-&gt;vaddr;</div><div class='ctx'> 	else</div><div class='ctx'> 		regs = io_mapping_map_wc(dev_priv-&gt;mm.gtt_mapping,</div><div class='ctx'> 					 overlay-&gt;reg_bo-&gt;gtt_offset);</div><div class='hunk'>@@ -203,7 +203,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_overlay_unmap_regs(struct intel_overlay *overlay,</div><div class='del'>-				     struct overlay_registers *regs)</div><div class='add'>+				     struct overlay_registers __iomem *regs)</div><div class='ctx'> {</div><div class='ctx'> 	if (!OVERLAY_NEEDS_PHYSICAL(overlay-&gt;dev))</div><div class='ctx'> 		io_mapping_unmap(regs);</div><div class='hunk'>@@ -215,20 +215,21 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = overlay-&gt;dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(overlay-&gt;last_flip_req);</div><div class='del'>-	ret = i915_add_request(LP_RING(dev_priv), NULL, request);</div><div class='add'>+	ret = i915_add_request(ring, NULL, request);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 	    kfree(request);</div><div class='ctx'> 	    return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	overlay-&gt;last_flip_req = request-&gt;seqno;</div><div class='ctx'> 	overlay-&gt;flip_tail = tail;</div><div class='del'>-	ret = i915_wait_request(LP_RING(dev_priv), overlay-&gt;last_flip_req,</div><div class='del'>-				true);</div><div class='add'>+	ret = i915_wait_request(ring, overlay-&gt;last_flip_req);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='add'>+	i915_gem_retire_requests(dev);</div><div class='ctx'> </div><div class='ctx'> 	overlay-&gt;last_flip_req = 0;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -262,7 +263,7 @@ i830_activate_pipe_a(struct drm_device *dev)</div><div class='ctx'> 	DRM_DEBUG_DRIVER("Enabling pipe A in order to enable overlay\n");</div><div class='ctx'> </div><div class='ctx'> 	mode = drm_mode_duplicate(dev, &amp;vesa_640x480);</div><div class='del'>-	drm_mode_set_crtcinfo(mode, 0);</div><div class='add'>+</div><div class='ctx'> 	if (!drm_crtc_helper_set_mode(&amp;crtc-&gt;base, mode,</div><div class='ctx'> 				       crtc-&gt;base.x, crtc-&gt;base.y,</div><div class='ctx'> 				       crtc-&gt;base.fb))</div><div class='hunk'>@@ -287,6 +288,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = overlay-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> 	struct drm_i915_gem_request *request;</div><div class='ctx'> 	int pipe_a_quirk = 0;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -306,17 +308,17 @@ static int intel_overlay_on(struct intel_overlay *overlay)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = BEGIN_LP_RING(4);</div><div class='add'>+	ret = intel_ring_begin(ring, 4);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		kfree(request);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_ON);</div><div class='del'>-	OUT_RING(overlay-&gt;flip_addr | OFC_UPDATE);</div><div class='del'>-	OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);</div><div class='del'>-	OUT_RING(MI_NOOP);</div><div class='del'>-	ADVANCE_LP_RING();</div><div class='add'>+	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_ON);</div><div class='add'>+	intel_ring_emit(ring, overlay-&gt;flip_addr | OFC_UPDATE);</div><div class='add'>+	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);</div><div class='add'>+	intel_ring_emit(ring, MI_NOOP);</div><div class='add'>+	intel_ring_advance(ring);</div><div class='ctx'> </div><div class='ctx'> 	ret = intel_overlay_do_wait_request(overlay, request, NULL);</div><div class='ctx'> out:</div><div class='hunk'>@@ -332,6 +334,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = overlay-&gt;dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> 	struct drm_i915_gem_request *request;</div><div class='ctx'> 	u32 flip_addr = overlay-&gt;flip_addr;</div><div class='ctx'> 	u32 tmp;</div><div class='hunk'>@@ -351,16 +354,16 @@ static int intel_overlay_continue(struct intel_overlay *overlay,</div><div class='ctx'> 	if (tmp &amp; (1 &lt;&lt; 17))</div><div class='ctx'> 		DRM_DEBUG("overlay underrun, DOVSTA: %x\n", tmp);</div><div class='ctx'> </div><div class='del'>-	ret = BEGIN_LP_RING(2);</div><div class='add'>+	ret = intel_ring_begin(ring, 2);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		kfree(request);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='del'>-	OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);</div><div class='del'>-	OUT_RING(flip_addr);</div><div class='del'>-	ADVANCE_LP_RING();</div><div class='add'>+	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);</div><div class='add'>+	intel_ring_emit(ring, flip_addr);</div><div class='add'>+	intel_ring_advance(ring);</div><div class='ctx'> </div><div class='del'>-	ret = i915_add_request(LP_RING(dev_priv), NULL, request);</div><div class='add'>+	ret = i915_add_request(ring, NULL, request);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		kfree(request);</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -401,6 +404,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = overlay-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> 	u32 flip_addr = overlay-&gt;flip_addr;</div><div class='ctx'> 	struct drm_i915_gem_request *request;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -417,20 +421,20 @@ static int intel_overlay_off(struct intel_overlay *overlay)</div><div class='ctx'> 	 * of the hw. Do it in both cases */</div><div class='ctx'> 	flip_addr |= OFC_UPDATE;</div><div class='ctx'> </div><div class='del'>-	ret = BEGIN_LP_RING(6);</div><div class='add'>+	ret = intel_ring_begin(ring, 6);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		kfree(request);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* wait for overlay to go idle */</div><div class='del'>-	OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);</div><div class='del'>-	OUT_RING(flip_addr);</div><div class='del'>-	OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);</div><div class='add'>+	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);</div><div class='add'>+	intel_ring_emit(ring, flip_addr);</div><div class='add'>+	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);</div><div class='ctx'> 	/* turn overlay off */</div><div class='del'>-	OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_OFF);</div><div class='del'>-	OUT_RING(flip_addr);</div><div class='del'>-	OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);</div><div class='del'>-	ADVANCE_LP_RING();</div><div class='add'>+	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_OFF);</div><div class='add'>+	intel_ring_emit(ring, flip_addr);</div><div class='add'>+	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);</div><div class='add'>+	intel_ring_advance(ring);</div><div class='ctx'> </div><div class='ctx'> 	return intel_overlay_do_wait_request(overlay, request,</div><div class='ctx'> 					     intel_overlay_off_tail);</div><div class='hunk'>@@ -442,15 +446,16 @@ static int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = overlay-&gt;dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (overlay-&gt;last_flip_req == 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = i915_wait_request(LP_RING(dev_priv), overlay-&gt;last_flip_req,</div><div class='del'>-				true);</div><div class='add'>+	ret = i915_wait_request(ring, overlay-&gt;last_flip_req);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='add'>+	i915_gem_retire_requests(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (overlay-&gt;flip_tail)</div><div class='ctx'> 		overlay-&gt;flip_tail(overlay);</div><div class='hunk'>@@ -467,6 +472,7 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = overlay-&gt;dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Only wait if there is actually an old frame to release to</div><div class='hunk'>@@ -483,15 +489,15 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)</div><div class='ctx'> 		if (request == NULL)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-		ret = BEGIN_LP_RING(2);</div><div class='add'>+		ret = intel_ring_begin(ring, 2);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			kfree(request);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);</div><div class='del'>-		OUT_RING(MI_NOOP);</div><div class='del'>-		ADVANCE_LP_RING();</div><div class='add'>+		intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);</div><div class='add'>+		intel_ring_emit(ring, MI_NOOP);</div><div class='add'>+		intel_ring_advance(ring);</div><div class='ctx'> </div><div class='ctx'> 		ret = intel_overlay_do_wait_request(overlay, request,</div><div class='ctx'> 						    intel_overlay_release_old_vid_tail);</div><div class='hunk'>@@ -619,14 +625,15 @@ static const u16 uv_static_hcoeffs[N_HORIZ_UV_TAPS * N_PHASES] = {</div><div class='ctx'> 	0x3000, 0x0800, 0x3000</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void update_polyphase_filter(struct overlay_registers *regs)</div><div class='add'>+static void update_polyphase_filter(struct overlay_registers __iomem *regs)</div><div class='ctx'> {</div><div class='del'>-	memcpy(regs-&gt;Y_HCOEFS, y_static_hcoeffs, sizeof(y_static_hcoeffs));</div><div class='del'>-	memcpy(regs-&gt;UV_HCOEFS, uv_static_hcoeffs, sizeof(uv_static_hcoeffs));</div><div class='add'>+	memcpy_toio(regs-&gt;Y_HCOEFS, y_static_hcoeffs, sizeof(y_static_hcoeffs));</div><div class='add'>+	memcpy_toio(regs-&gt;UV_HCOEFS, uv_static_hcoeffs,</div><div class='add'>+		    sizeof(uv_static_hcoeffs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool update_scaling_factors(struct intel_overlay *overlay,</div><div class='del'>-				   struct overlay_registers *regs,</div><div class='add'>+				   struct overlay_registers __iomem *regs,</div><div class='ctx'> 				   struct put_image_params *params)</div><div class='ctx'> {</div><div class='ctx'> 	/* fixed point with a 12 bit shift */</div><div class='hunk'>@@ -665,16 +672,19 @@ static bool update_scaling_factors(struct intel_overlay *overlay,</div><div class='ctx'> 	overlay-&gt;old_xscale = xscale;</div><div class='ctx'> 	overlay-&gt;old_yscale = yscale;</div><div class='ctx'> </div><div class='del'>-	regs-&gt;YRGBSCALE = (((yscale &amp; FRACT_MASK) &lt;&lt; 20) |</div><div class='del'>-			   ((xscale &gt;&gt; FP_SHIFT)  &lt;&lt; 16) |</div><div class='del'>-			   ((xscale &amp; FRACT_MASK) &lt;&lt; 3));</div><div class='add'>+	iowrite32(((yscale &amp; FRACT_MASK) &lt;&lt; 20) |</div><div class='add'>+		  ((xscale &gt;&gt; FP_SHIFT)  &lt;&lt; 16) |</div><div class='add'>+		  ((xscale &amp; FRACT_MASK) &lt;&lt; 3),</div><div class='add'>+		 &amp;regs-&gt;YRGBSCALE);</div><div class='ctx'> </div><div class='del'>-	regs-&gt;UVSCALE = (((yscale_UV &amp; FRACT_MASK) &lt;&lt; 20) |</div><div class='del'>-			 ((xscale_UV &gt;&gt; FP_SHIFT)  &lt;&lt; 16) |</div><div class='del'>-			 ((xscale_UV &amp; FRACT_MASK) &lt;&lt; 3));</div><div class='add'>+	iowrite32(((yscale_UV &amp; FRACT_MASK) &lt;&lt; 20) |</div><div class='add'>+		  ((xscale_UV &gt;&gt; FP_SHIFT)  &lt;&lt; 16) |</div><div class='add'>+		  ((xscale_UV &amp; FRACT_MASK) &lt;&lt; 3),</div><div class='add'>+		 &amp;regs-&gt;UVSCALE);</div><div class='ctx'> </div><div class='del'>-	regs-&gt;UVSCALEV = ((((yscale    &gt;&gt; FP_SHIFT) &lt;&lt; 16) |</div><div class='del'>-			   ((yscale_UV &gt;&gt; FP_SHIFT) &lt;&lt; 0)));</div><div class='add'>+	iowrite32((((yscale    &gt;&gt; FP_SHIFT) &lt;&lt; 16) |</div><div class='add'>+		   ((yscale_UV &gt;&gt; FP_SHIFT) &lt;&lt; 0)),</div><div class='add'>+		 &amp;regs-&gt;UVSCALEV);</div><div class='ctx'> </div><div class='ctx'> 	if (scale_changed)</div><div class='ctx'> 		update_polyphase_filter(regs);</div><div class='hunk'>@@ -683,30 +693,32 @@ static bool update_scaling_factors(struct intel_overlay *overlay,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void update_colorkey(struct intel_overlay *overlay,</div><div class='del'>-			    struct overlay_registers *regs)</div><div class='add'>+			    struct overlay_registers __iomem *regs)</div><div class='ctx'> {</div><div class='ctx'> 	u32 key = overlay-&gt;color_key;</div><div class='ctx'> </div><div class='ctx'> 	switch (overlay-&gt;crtc-&gt;base.fb-&gt;bits_per_pixel) {</div><div class='ctx'> 	case 8:</div><div class='del'>-		regs-&gt;DCLRKV = 0;</div><div class='del'>-		regs-&gt;DCLRKM = CLK_RGB8I_MASK | DST_KEY_ENABLE;</div><div class='add'>+		iowrite32(0, &amp;regs-&gt;DCLRKV);</div><div class='add'>+		iowrite32(CLK_RGB8I_MASK | DST_KEY_ENABLE, &amp;regs-&gt;DCLRKM);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case 16:</div><div class='ctx'> 		if (overlay-&gt;crtc-&gt;base.fb-&gt;depth == 15) {</div><div class='del'>-			regs-&gt;DCLRKV = RGB15_TO_COLORKEY(key);</div><div class='del'>-			regs-&gt;DCLRKM = CLK_RGB15_MASK | DST_KEY_ENABLE;</div><div class='add'>+			iowrite32(RGB15_TO_COLORKEY(key), &amp;regs-&gt;DCLRKV);</div><div class='add'>+			iowrite32(CLK_RGB15_MASK | DST_KEY_ENABLE,</div><div class='add'>+				  &amp;regs-&gt;DCLRKM);</div><div class='ctx'> 		} else {</div><div class='del'>-			regs-&gt;DCLRKV = RGB16_TO_COLORKEY(key);</div><div class='del'>-			regs-&gt;DCLRKM = CLK_RGB16_MASK | DST_KEY_ENABLE;</div><div class='add'>+			iowrite32(RGB16_TO_COLORKEY(key), &amp;regs-&gt;DCLRKV);</div><div class='add'>+			iowrite32(CLK_RGB16_MASK | DST_KEY_ENABLE,</div><div class='add'>+				  &amp;regs-&gt;DCLRKM);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case 24:</div><div class='ctx'> 	case 32:</div><div class='del'>-		regs-&gt;DCLRKV = key;</div><div class='del'>-		regs-&gt;DCLRKM = CLK_RGB24_MASK | DST_KEY_ENABLE;</div><div class='add'>+		iowrite32(key, &amp;regs-&gt;DCLRKV);</div><div class='add'>+		iowrite32(CLK_RGB24_MASK | DST_KEY_ENABLE, &amp;regs-&gt;DCLRKM);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -761,9 +773,10 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,</div><div class='ctx'> 				      struct put_image_params *params)</div><div class='ctx'> {</div><div class='ctx'> 	int ret, tmp_width;</div><div class='del'>-	struct overlay_registers *regs;</div><div class='add'>+	struct overlay_registers __iomem *regs;</div><div class='ctx'> 	bool scale_changed = false;</div><div class='ctx'> 	struct drm_device *dev = overlay-&gt;dev;</div><div class='add'>+	u32 swidth, swidthsw, sheight, ostride;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!mutex_is_locked(&amp;dev-&gt;struct_mutex));</div><div class='ctx'> 	BUG_ON(!mutex_is_locked(&amp;dev-&gt;mode_config.mutex));</div><div class='hunk'>@@ -782,16 +795,18 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,</div><div class='ctx'> 		goto out_unpin;</div><div class='ctx'> </div><div class='ctx'> 	if (!overlay-&gt;active) {</div><div class='add'>+		u32 oconfig;</div><div class='ctx'> 		regs = intel_overlay_map_regs(overlay);</div><div class='ctx'> 		if (!regs) {</div><div class='ctx'> 			ret = -ENOMEM;</div><div class='ctx'> 			goto out_unpin;</div><div class='ctx'> 		}</div><div class='del'>-		regs-&gt;OCONFIG = OCONF_CC_OUT_8BIT;</div><div class='add'>+		oconfig = OCONF_CC_OUT_8BIT;</div><div class='ctx'> 		if (IS_GEN4(overlay-&gt;dev))</div><div class='del'>-			regs-&gt;OCONFIG |= OCONF_CSC_MODE_BT709;</div><div class='del'>-		regs-&gt;OCONFIG |= overlay-&gt;crtc-&gt;pipe == 0 ?</div><div class='add'>+			oconfig |= OCONF_CSC_MODE_BT709;</div><div class='add'>+		oconfig |= overlay-&gt;crtc-&gt;pipe == 0 ?</div><div class='ctx'> 			OCONF_PIPE_A : OCONF_PIPE_B;</div><div class='add'>+		iowrite32(oconfig, &amp;regs-&gt;OCONFIG);</div><div class='ctx'> 		intel_overlay_unmap_regs(overlay, regs);</div><div class='ctx'> </div><div class='ctx'> 		ret = intel_overlay_on(overlay);</div><div class='hunk'>@@ -805,42 +820,46 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,</div><div class='ctx'> 		goto out_unpin;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	regs-&gt;DWINPOS = (params-&gt;dst_y &lt;&lt; 16) | params-&gt;dst_x;</div><div class='del'>-	regs-&gt;DWINSZ = (params-&gt;dst_h &lt;&lt; 16) | params-&gt;dst_w;</div><div class='add'>+	iowrite32((params-&gt;dst_y &lt;&lt; 16) | params-&gt;dst_x, &amp;regs-&gt;DWINPOS);</div><div class='add'>+	iowrite32((params-&gt;dst_h &lt;&lt; 16) | params-&gt;dst_w, &amp;regs-&gt;DWINSZ);</div><div class='ctx'> </div><div class='ctx'> 	if (params-&gt;format &amp; I915_OVERLAY_YUV_PACKED)</div><div class='ctx'> 		tmp_width = packed_width_bytes(params-&gt;format, params-&gt;src_w);</div><div class='ctx'> 	else</div><div class='ctx'> 		tmp_width = params-&gt;src_w;</div><div class='ctx'> </div><div class='del'>-	regs-&gt;SWIDTH = params-&gt;src_w;</div><div class='del'>-	regs-&gt;SWIDTHSW = calc_swidthsw(overlay-&gt;dev,</div><div class='del'>-				       params-&gt;offset_Y, tmp_width);</div><div class='del'>-	regs-&gt;SHEIGHT = params-&gt;src_h;</div><div class='del'>-	regs-&gt;OBUF_0Y = new_bo-&gt;gtt_offset + params-&gt;offset_Y;</div><div class='del'>-	regs-&gt;OSTRIDE = params-&gt;stride_Y;</div><div class='add'>+	swidth = params-&gt;src_w;</div><div class='add'>+	swidthsw = calc_swidthsw(overlay-&gt;dev, params-&gt;offset_Y, tmp_width);</div><div class='add'>+	sheight = params-&gt;src_h;</div><div class='add'>+	iowrite32(new_bo-&gt;gtt_offset + params-&gt;offset_Y, &amp;regs-&gt;OBUF_0Y);</div><div class='add'>+	ostride = params-&gt;stride_Y;</div><div class='ctx'> </div><div class='ctx'> 	if (params-&gt;format &amp; I915_OVERLAY_YUV_PLANAR) {</div><div class='ctx'> 		int uv_hscale = uv_hsubsampling(params-&gt;format);</div><div class='ctx'> 		int uv_vscale = uv_vsubsampling(params-&gt;format);</div><div class='ctx'> 		u32 tmp_U, tmp_V;</div><div class='del'>-		regs-&gt;SWIDTH |= (params-&gt;src_w/uv_hscale) &lt;&lt; 16;</div><div class='add'>+		swidth |= (params-&gt;src_w/uv_hscale) &lt;&lt; 16;</div><div class='ctx'> 		tmp_U = calc_swidthsw(overlay-&gt;dev, params-&gt;offset_U,</div><div class='ctx'> 				      params-&gt;src_w/uv_hscale);</div><div class='ctx'> 		tmp_V = calc_swidthsw(overlay-&gt;dev, params-&gt;offset_V,</div><div class='ctx'> 				      params-&gt;src_w/uv_hscale);</div><div class='del'>-		regs-&gt;SWIDTHSW |= max_t(u32, tmp_U, tmp_V) &lt;&lt; 16;</div><div class='del'>-		regs-&gt;SHEIGHT |= (params-&gt;src_h/uv_vscale) &lt;&lt; 16;</div><div class='del'>-		regs-&gt;OBUF_0U = new_bo-&gt;gtt_offset + params-&gt;offset_U;</div><div class='del'>-		regs-&gt;OBUF_0V = new_bo-&gt;gtt_offset + params-&gt;offset_V;</div><div class='del'>-		regs-&gt;OSTRIDE |= params-&gt;stride_UV &lt;&lt; 16;</div><div class='add'>+		swidthsw |= max_t(u32, tmp_U, tmp_V) &lt;&lt; 16;</div><div class='add'>+		sheight |= (params-&gt;src_h/uv_vscale) &lt;&lt; 16;</div><div class='add'>+		iowrite32(new_bo-&gt;gtt_offset + params-&gt;offset_U, &amp;regs-&gt;OBUF_0U);</div><div class='add'>+		iowrite32(new_bo-&gt;gtt_offset + params-&gt;offset_V, &amp;regs-&gt;OBUF_0V);</div><div class='add'>+		ostride |= params-&gt;stride_UV &lt;&lt; 16;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	iowrite32(swidth, &amp;regs-&gt;SWIDTH);</div><div class='add'>+	iowrite32(swidthsw, &amp;regs-&gt;SWIDTHSW);</div><div class='add'>+	iowrite32(sheight, &amp;regs-&gt;SHEIGHT);</div><div class='add'>+	iowrite32(ostride, &amp;regs-&gt;OSTRIDE);</div><div class='add'>+</div><div class='ctx'> 	scale_changed = update_scaling_factors(overlay, regs, params);</div><div class='ctx'> </div><div class='ctx'> 	update_colorkey(overlay, regs);</div><div class='ctx'> </div><div class='del'>-	regs-&gt;OCMD = overlay_cmd_reg(params);</div><div class='add'>+	iowrite32(overlay_cmd_reg(params), &amp;regs-&gt;OCMD);</div><div class='ctx'> </div><div class='ctx'> 	intel_overlay_unmap_regs(overlay, regs);</div><div class='ctx'> </div><div class='hunk'>@@ -860,7 +879,7 @@ out_unpin:</div><div class='ctx'> </div><div class='ctx'> int intel_overlay_switch_off(struct intel_overlay *overlay)</div><div class='ctx'> {</div><div class='del'>-	struct overlay_registers *regs;</div><div class='add'>+	struct overlay_registers __iomem *regs;</div><div class='ctx'> 	struct drm_device *dev = overlay-&gt;dev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -879,7 +898,7 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	regs = intel_overlay_map_regs(overlay);</div><div class='del'>-	regs-&gt;OCMD = 0;</div><div class='add'>+	iowrite32(0, &amp;regs-&gt;OCMD);</div><div class='ctx'> 	intel_overlay_unmap_regs(overlay, regs);</div><div class='ctx'> </div><div class='ctx'> 	ret = intel_overlay_off(overlay);</div><div class='hunk'>@@ -1109,11 +1128,7 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,</div><div class='ctx'> 	struct put_image_params *params;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!dev_priv) {</div><div class='del'>-		DRM_ERROR("called with no initialization\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	/* No need to check for DRIVER_MODESET - we don't set it up then. */</div><div class='ctx'> 	overlay = dev_priv-&gt;overlay;</div><div class='ctx'> 	if (!overlay) {</div><div class='ctx'> 		DRM_DEBUG("userspace bug: no overlay\n");</div><div class='hunk'>@@ -1250,10 +1265,11 @@ out_free:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void update_reg_attrs(struct intel_overlay *overlay,</div><div class='del'>-			     struct overlay_registers *regs)</div><div class='add'>+			     struct overlay_registers __iomem *regs)</div><div class='ctx'> {</div><div class='del'>-	regs-&gt;OCLRC0 = (overlay-&gt;contrast &lt;&lt; 18) | (overlay-&gt;brightness &amp; 0xff);</div><div class='del'>-	regs-&gt;OCLRC1 = overlay-&gt;saturation;</div><div class='add'>+	iowrite32((overlay-&gt;contrast &lt;&lt; 18) | (overlay-&gt;brightness &amp; 0xff),</div><div class='add'>+		  &amp;regs-&gt;OCLRC0);</div><div class='add'>+	iowrite32(overlay-&gt;saturation, &amp;regs-&gt;OCLRC1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool check_gamma_bounds(u32 gamma1, u32 gamma2)</div><div class='hunk'>@@ -1306,14 +1322,10 @@ int intel_overlay_attrs(struct drm_device *dev, void *data,</div><div class='ctx'> 	struct drm_intel_overlay_attrs *attrs = data;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_overlay *overlay;</div><div class='del'>-	struct overlay_registers *regs;</div><div class='add'>+	struct overlay_registers __iomem *regs;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!dev_priv) {</div><div class='del'>-		DRM_ERROR("called with no initialization\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	/* No need to check for DRIVER_MODESET - we don't set it up then. */</div><div class='ctx'> 	overlay = dev_priv-&gt;overlay;</div><div class='ctx'> 	if (!overlay) {</div><div class='ctx'> 		DRM_DEBUG("userspace bug: no overlay\n");</div><div class='hunk'>@@ -1396,7 +1408,7 @@ void intel_setup_overlay(struct drm_device *dev)</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_overlay *overlay;</div><div class='ctx'> 	struct drm_i915_gem_object *reg_bo;</div><div class='del'>-	struct overlay_registers *regs;</div><div class='add'>+	struct overlay_registers __iomem *regs;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!HAS_OVERLAY(dev))</div><div class='hunk'>@@ -1451,7 +1463,7 @@ void intel_setup_overlay(struct drm_device *dev)</div><div class='ctx'> 	if (!regs)</div><div class='ctx'> 		goto out_unpin_bo;</div><div class='ctx'> </div><div class='del'>-	memset(regs, 0, sizeof(struct overlay_registers));</div><div class='add'>+	memset_io(regs, 0, sizeof(struct overlay_registers));</div><div class='ctx'> 	update_polyphase_filter(regs);</div><div class='ctx'> 	update_reg_attrs(overlay, regs);</div><div class='ctx'> </div><div class='hunk'>@@ -1499,14 +1511,17 @@ struct intel_overlay_error_state {</div><div class='ctx'> 	u32 isr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct overlay_registers *</div><div class='add'>+static struct overlay_registers __iomem *</div><div class='ctx'> intel_overlay_map_regs_atomic(struct intel_overlay *overlay)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = overlay-&gt;dev-&gt;dev_private;</div><div class='del'>-	struct overlay_registers *regs;</div><div class='add'>+	struct overlay_registers __iomem *regs;</div><div class='ctx'> </div><div class='ctx'> 	if (OVERLAY_NEEDS_PHYSICAL(overlay-&gt;dev))</div><div class='del'>-		regs = overlay-&gt;reg_bo-&gt;phys_obj-&gt;handle-&gt;vaddr;</div><div class='add'>+		/* Cast to make sparse happy, but it's wc memory anyway, so</div><div class='add'>+		 * equivalent to the wc io mapping on X86. */</div><div class='add'>+		regs = (struct overlay_registers __iomem *)</div><div class='add'>+			overlay-&gt;reg_bo-&gt;phys_obj-&gt;handle-&gt;vaddr;</div><div class='ctx'> 	else</div><div class='ctx'> 		regs = io_mapping_map_atomic_wc(dev_priv-&gt;mm.gtt_mapping,</div><div class='ctx'> 						overlay-&gt;reg_bo-&gt;gtt_offset);</div><div class='hunk'>@@ -1515,7 +1530,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay,</div><div class='del'>-					    struct overlay_registers *regs)</div><div class='add'>+					struct overlay_registers __iomem *regs)</div><div class='ctx'> {</div><div class='ctx'> 	if (!OVERLAY_NEEDS_PHYSICAL(overlay-&gt;dev))</div><div class='ctx'> 		io_mapping_unmap_atomic(regs);</div><div class='hunk'>@@ -1540,9 +1555,9 @@ intel_overlay_capture_error_state(struct drm_device *dev)</div><div class='ctx'> 	error-&gt;dovsta = I915_READ(DOVSTA);</div><div class='ctx'> 	error-&gt;isr = I915_READ(ISR);</div><div class='ctx'> 	if (OVERLAY_NEEDS_PHYSICAL(overlay-&gt;dev))</div><div class='del'>-		error-&gt;base = (long) overlay-&gt;reg_bo-&gt;phys_obj-&gt;handle-&gt;vaddr;</div><div class='add'>+		error-&gt;base = (__force long)overlay-&gt;reg_bo-&gt;phys_obj-&gt;handle-&gt;vaddr;</div><div class='ctx'> 	else</div><div class='del'>-		error-&gt;base = (long) overlay-&gt;reg_bo-&gt;gtt_offset;</div><div class='add'>+		error-&gt;base = overlay-&gt;reg_bo-&gt;gtt_offset;</div><div class='ctx'> </div><div class='ctx'> 	regs = intel_overlay_map_regs_atomic(overlay);</div><div class='ctx'> 	if (!regs)</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c<br/>index 48177ec4720e..2a1625d84a69 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_panel.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_panel.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_panel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_panel.c</a></div><div class='hunk'>@@ -28,6 +28,9 @@</div><div class='ctx'>  *      Chris Wilson &lt;chris@chris-wilson.co.uk&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include "intel_drv.h"</div><div class='ctx'> </div><div class='ctx'> #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */</div><div class='hunk'>@@ -169,7 +172,7 @@ u32 intel_panel_get_max_backlight(struct drm_device *dev)</div><div class='ctx'> 		/* XXX add code here to query mode clock or hardware clock</div><div class='ctx'> 		 * and program max PWM appropriately.</div><div class='ctx'> 		 */</div><div class='del'>-		printk_once(KERN_WARNING "fixme: max PWM is zero.\n");</div><div class='add'>+		pr_warn_once("fixme: max PWM is zero\n");</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -189,6 +192,27 @@ u32 intel_panel_get_max_backlight(struct drm_device *dev)</div><div class='ctx'> 	return max;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int i915_panel_invert_brightness;</div><div class='add'>+MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "</div><div class='add'>+	"(-1 force normal, 0 machine defaults, 1 force inversion), please "</div><div class='add'>+	"report PCI device ID, subsystem vendor and subsystem device ID "</div><div class='add'>+	"to dri-devel@lists.freedesktop.org, if your machine needs it. "</div><div class='add'>+	"It will then be included in an upcoming module version.");</div><div class='add'>+module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);</div><div class='add'>+static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (i915_panel_invert_brightness &lt; 0)</div><div class='add'>+		return val;</div><div class='add'>+</div><div class='add'>+	if (i915_panel_invert_brightness &gt; 0 ||</div><div class='add'>+	    dev_priv-&gt;quirks &amp; QUIRK_INVERT_BRIGHTNESS)</div><div class='add'>+		return intel_panel_get_max_backlight(dev) - val;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> u32 intel_panel_get_backlight(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='hunk'>@@ -209,6 +233,7 @@ u32 intel_panel_get_backlight(struct drm_device *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	val = intel_panel_compute_brightness(dev, val);</div><div class='ctx'> 	DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='hunk'>@@ -226,6 +251,7 @@ static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);</div><div class='add'>+	level = intel_panel_compute_brightness(dev, level);</div><div class='ctx'> </div><div class='ctx'> 	if (HAS_PCH_SPLIT(dev))</div><div class='ctx'> 		return intel_pch_panel_set_backlight(dev, level);</div><div class='hunk'>@@ -342,6 +368,7 @@ int intel_panel_setup_backlight(struct drm_device *dev)</div><div class='ctx'> 	else</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='add'>+	memset(&amp;props, 0, sizeof(props));</div><div class='ctx'> 	props.type = BACKLIGHT_RAW;</div><div class='ctx'> 	props.max_brightness = intel_panel_get_max_backlight(dev);</div><div class='ctx'> 	dev_priv-&gt;backlight =</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c<br/>new file mode 100644<br/>index 000000000000..d0ce2a5b1d3f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_pm.c</a></div><div class='hunk'>@@ -0,0 +1,3820 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright © 2012 Intel Corporation</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the next</div><div class='add'>+ * paragraph) shall be included in all copies or substantial portions of the</div><div class='add'>+ * Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER</div><div class='add'>+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING</div><div class='add'>+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS</div><div class='add'>+ * IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors:</div><div class='add'>+ *    Eugeni Dodonov &lt;eugeni.dodonov@intel.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/cpufreq.h&gt;</div><div class='add'>+#include "i915_drv.h"</div><div class='add'>+#include "intel_drv.h"</div><div class='add'>+#include "../../../platform/x86/intel_ips.h"</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+/* FBC, or Frame Buffer Compression, is a technique employed to compress the</div><div class='add'>+ * framebuffer contents in-memory, aiming at reducing the required bandwidth</div><div class='add'>+ * during in-memory transfers and, therefore, reduce the power packet.</div><div class='add'>+ *</div><div class='add'>+ * The benefits of FBC are mostly visible with solid backgrounds and</div><div class='add'>+ * variation-less patterns.</div><div class='add'>+ *</div><div class='add'>+ * FBC-related functionality can be enabled by the means of the</div><div class='add'>+ * i915.i915_enable_fbc parameter</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void i8xx_disable_fbc(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 fbc_ctl;</div><div class='add'>+</div><div class='add'>+	/* Disable compression */</div><div class='add'>+	fbc_ctl = I915_READ(FBC_CONTROL);</div><div class='add'>+	if ((fbc_ctl &amp; FBC_CTL_EN) == 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fbc_ctl &amp;= ~FBC_CTL_EN;</div><div class='add'>+	I915_WRITE(FBC_CONTROL, fbc_ctl);</div><div class='add'>+</div><div class='add'>+	/* Wait for compressing bit to clear */</div><div class='add'>+	if (wait_for((I915_READ(FBC_STATUS) &amp; FBC_STAT_COMPRESSING) == 0, 10)) {</div><div class='add'>+		DRM_DEBUG_KMS("FBC idle timed out\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("disabled FBC\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct drm_framebuffer *fb = crtc-&gt;fb;</div><div class='add'>+	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);</div><div class='add'>+	struct drm_i915_gem_object *obj = intel_fb-&gt;obj;</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	int cfb_pitch;</div><div class='add'>+	int plane, i;</div><div class='add'>+	u32 fbc_ctl, fbc_ctl2;</div><div class='add'>+</div><div class='add'>+	cfb_pitch = dev_priv-&gt;cfb_size / FBC_LL_SIZE;</div><div class='add'>+	if (fb-&gt;pitches[0] &lt; cfb_pitch)</div><div class='add'>+		cfb_pitch = fb-&gt;pitches[0];</div><div class='add'>+</div><div class='add'>+	/* FBC_CTL wants 64B units */</div><div class='add'>+	cfb_pitch = (cfb_pitch / 64) - 1;</div><div class='add'>+	plane = intel_crtc-&gt;plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB;</div><div class='add'>+</div><div class='add'>+	/* Clear old tags */</div><div class='add'>+	for (i = 0; i &lt; (FBC_LL_SIZE / 32) + 1; i++)</div><div class='add'>+		I915_WRITE(FBC_TAG + (i * 4), 0);</div><div class='add'>+</div><div class='add'>+	/* Set it up... */</div><div class='add'>+	fbc_ctl2 = FBC_CTL_FENCE_DBL | FBC_CTL_IDLE_IMM | FBC_CTL_CPU_FENCE;</div><div class='add'>+	fbc_ctl2 |= plane;</div><div class='add'>+	I915_WRITE(FBC_CONTROL2, fbc_ctl2);</div><div class='add'>+	I915_WRITE(FBC_FENCE_OFF, crtc-&gt;y);</div><div class='add'>+</div><div class='add'>+	/* enable it... */</div><div class='add'>+	fbc_ctl = FBC_CTL_EN | FBC_CTL_PERIODIC;</div><div class='add'>+	if (IS_I945GM(dev))</div><div class='add'>+		fbc_ctl |= FBC_CTL_C3_IDLE; /* 945 needs special SR handling */</div><div class='add'>+	fbc_ctl |= (cfb_pitch &amp; 0xff) &lt;&lt; FBC_CTL_STRIDE_SHIFT;</div><div class='add'>+	fbc_ctl |= (interval &amp; 0x2fff) &lt;&lt; FBC_CTL_INTERVAL_SHIFT;</div><div class='add'>+	fbc_ctl |= obj-&gt;fence_reg;</div><div class='add'>+	I915_WRITE(FBC_CONTROL, fbc_ctl);</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("enabled FBC, pitch %d, yoff %d, plane %d, ",</div><div class='add'>+		      cfb_pitch, crtc-&gt;y, intel_crtc-&gt;plane);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool i8xx_fbc_enabled(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	return I915_READ(FBC_CONTROL) &amp; FBC_CTL_EN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct drm_framebuffer *fb = crtc-&gt;fb;</div><div class='add'>+	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);</div><div class='add'>+	struct drm_i915_gem_object *obj = intel_fb-&gt;obj;</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	int plane = intel_crtc-&gt;plane == 0 ? DPFC_CTL_PLANEA : DPFC_CTL_PLANEB;</div><div class='add'>+	unsigned long stall_watermark = 200;</div><div class='add'>+	u32 dpfc_ctl;</div><div class='add'>+</div><div class='add'>+	dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;</div><div class='add'>+	dpfc_ctl |= DPFC_CTL_FENCE_EN | obj-&gt;fence_reg;</div><div class='add'>+	I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN |</div><div class='add'>+		   (stall_watermark &lt;&lt; DPFC_RECOMP_STALL_WM_SHIFT) |</div><div class='add'>+		   (interval &lt;&lt; DPFC_RECOMP_TIMER_COUNT_SHIFT));</div><div class='add'>+	I915_WRITE(DPFC_FENCE_YOFF, crtc-&gt;y);</div><div class='add'>+</div><div class='add'>+	/* enable it... */</div><div class='add'>+	I915_WRITE(DPFC_CONTROL, I915_READ(DPFC_CONTROL) | DPFC_CTL_EN);</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc-&gt;plane);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g4x_disable_fbc(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 dpfc_ctl;</div><div class='add'>+</div><div class='add'>+	/* Disable compression */</div><div class='add'>+	dpfc_ctl = I915_READ(DPFC_CONTROL);</div><div class='add'>+	if (dpfc_ctl &amp; DPFC_CTL_EN) {</div><div class='add'>+		dpfc_ctl &amp;= ~DPFC_CTL_EN;</div><div class='add'>+		I915_WRITE(DPFC_CONTROL, dpfc_ctl);</div><div class='add'>+</div><div class='add'>+		DRM_DEBUG_KMS("disabled FBC\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool g4x_fbc_enabled(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	return I915_READ(DPFC_CONTROL) &amp; DPFC_CTL_EN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sandybridge_blit_fbc_update(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 blt_ecoskpd;</div><div class='add'>+</div><div class='add'>+	/* Make sure blitter notifies FBC of writes */</div><div class='add'>+	gen6_gt_force_wake_get(dev_priv);</div><div class='add'>+	blt_ecoskpd = I915_READ(GEN6_BLITTER_ECOSKPD);</div><div class='add'>+	blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY &lt;&lt;</div><div class='add'>+		GEN6_BLITTER_LOCK_SHIFT;</div><div class='add'>+	I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);</div><div class='add'>+	blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY;</div><div class='add'>+	I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);</div><div class='add'>+	blt_ecoskpd &amp;= ~(GEN6_BLITTER_FBC_NOTIFY &lt;&lt;</div><div class='add'>+			 GEN6_BLITTER_LOCK_SHIFT);</div><div class='add'>+	I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);</div><div class='add'>+	POSTING_READ(GEN6_BLITTER_ECOSKPD);</div><div class='add'>+	gen6_gt_force_wake_put(dev_priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct drm_framebuffer *fb = crtc-&gt;fb;</div><div class='add'>+	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);</div><div class='add'>+	struct drm_i915_gem_object *obj = intel_fb-&gt;obj;</div><div class='add'>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	int plane = intel_crtc-&gt;plane == 0 ? DPFC_CTL_PLANEA : DPFC_CTL_PLANEB;</div><div class='add'>+	unsigned long stall_watermark = 200;</div><div class='add'>+	u32 dpfc_ctl;</div><div class='add'>+</div><div class='add'>+	dpfc_ctl = I915_READ(ILK_DPFC_CONTROL);</div><div class='add'>+	dpfc_ctl &amp;= DPFC_RESERVED;</div><div class='add'>+	dpfc_ctl |= (plane | DPFC_CTL_LIMIT_1X);</div><div class='add'>+	/* Set persistent mode for front-buffer rendering, ala X. */</div><div class='add'>+	dpfc_ctl |= DPFC_CTL_PERSISTENT_MODE;</div><div class='add'>+	dpfc_ctl |= (DPFC_CTL_FENCE_EN | obj-&gt;fence_reg);</div><div class='add'>+	I915_WRITE(ILK_DPFC_CHICKEN, DPFC_HT_MODIFY);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(ILK_DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN |</div><div class='add'>+		   (stall_watermark &lt;&lt; DPFC_RECOMP_STALL_WM_SHIFT) |</div><div class='add'>+		   (interval &lt;&lt; DPFC_RECOMP_TIMER_COUNT_SHIFT));</div><div class='add'>+	I915_WRITE(ILK_DPFC_FENCE_YOFF, crtc-&gt;y);</div><div class='add'>+	I915_WRITE(ILK_FBC_RT_BASE, obj-&gt;gtt_offset | ILK_FBC_RT_VALID);</div><div class='add'>+	/* enable it... */</div><div class='add'>+	I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);</div><div class='add'>+</div><div class='add'>+	if (IS_GEN6(dev)) {</div><div class='add'>+		I915_WRITE(SNB_DPFC_CTL_SA,</div><div class='add'>+			   SNB_CPU_FENCE_ENABLE | obj-&gt;fence_reg);</div><div class='add'>+		I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc-&gt;y);</div><div class='add'>+		sandybridge_blit_fbc_update(dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc-&gt;plane);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ironlake_disable_fbc(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 dpfc_ctl;</div><div class='add'>+</div><div class='add'>+	/* Disable compression */</div><div class='add'>+	dpfc_ctl = I915_READ(ILK_DPFC_CONTROL);</div><div class='add'>+	if (dpfc_ctl &amp; DPFC_CTL_EN) {</div><div class='add'>+		dpfc_ctl &amp;= ~DPFC_CTL_EN;</div><div class='add'>+		I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl);</div><div class='add'>+</div><div class='add'>+		DRM_DEBUG_KMS("disabled FBC\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ironlake_fbc_enabled(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	return I915_READ(ILK_DPFC_CONTROL) &amp; DPFC_CTL_EN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool intel_fbc_enabled(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (!dev_priv-&gt;display.fbc_enabled)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return dev_priv-&gt;display.fbc_enabled(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void intel_fbc_work_fn(struct work_struct *__work)</div><div class='add'>+{</div><div class='add'>+	struct intel_fbc_work *work =</div><div class='add'>+		container_of(to_delayed_work(__work),</div><div class='add'>+			     struct intel_fbc_work, work);</div><div class='add'>+	struct drm_device *dev = work-&gt;crtc-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	if (work == dev_priv-&gt;fbc_work) {</div><div class='add'>+		/* Double check that we haven't switched fb without cancelling</div><div class='add'>+		 * the prior work.</div><div class='add'>+		 */</div><div class='add'>+		if (work-&gt;crtc-&gt;fb == work-&gt;fb) {</div><div class='add'>+			dev_priv-&gt;display.enable_fbc(work-&gt;crtc,</div><div class='add'>+						     work-&gt;interval);</div><div class='add'>+</div><div class='add'>+			dev_priv-&gt;cfb_plane = to_intel_crtc(work-&gt;crtc)-&gt;plane;</div><div class='add'>+			dev_priv-&gt;cfb_fb = work-&gt;crtc-&gt;fb-&gt;base.id;</div><div class='add'>+			dev_priv-&gt;cfb_y = work-&gt;crtc-&gt;y;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev_priv-&gt;fbc_work = NULL;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+	kfree(work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void intel_cancel_fbc_work(struct drm_i915_private *dev_priv)</div><div class='add'>+{</div><div class='add'>+	if (dev_priv-&gt;fbc_work == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("cancelling pending FBC enable\n");</div><div class='add'>+</div><div class='add'>+	/* Synchronisation is provided by struct_mutex and checking of</div><div class='add'>+	 * dev_priv-&gt;fbc_work, so we can perform the cancellation</div><div class='add'>+	 * entirely asynchronously.</div><div class='add'>+	 */</div><div class='add'>+	if (cancel_delayed_work(&amp;dev_priv-&gt;fbc_work-&gt;work))</div><div class='add'>+		/* tasklet was killed before being run, clean up */</div><div class='add'>+		kfree(dev_priv-&gt;fbc_work);</div><div class='add'>+</div><div class='add'>+	/* Mark the work as no longer wanted so that if it does</div><div class='add'>+	 * wake-up (because the work was already running and waiting</div><div class='add'>+	 * for our mutex), it will discover that is no longer</div><div class='add'>+	 * necessary to run.</div><div class='add'>+	 */</div><div class='add'>+	dev_priv-&gt;fbc_work = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval)</div><div class='add'>+{</div><div class='add'>+	struct intel_fbc_work *work;</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (!dev_priv-&gt;display.enable_fbc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	intel_cancel_fbc_work(dev_priv);</div><div class='add'>+</div><div class='add'>+	work = kzalloc(sizeof *work, GFP_KERNEL);</div><div class='add'>+	if (work == NULL) {</div><div class='add'>+		dev_priv-&gt;display.enable_fbc(crtc, interval);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	work-&gt;crtc = crtc;</div><div class='add'>+	work-&gt;fb = crtc-&gt;fb;</div><div class='add'>+	work-&gt;interval = interval;</div><div class='add'>+	INIT_DELAYED_WORK(&amp;work-&gt;work, intel_fbc_work_fn);</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;fbc_work = work;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("scheduling delayed FBC enable\n");</div><div class='add'>+</div><div class='add'>+	/* Delay the actual enabling to let pageflipping cease and the</div><div class='add'>+	 * display to settle before starting the compression. Note that</div><div class='add'>+	 * this delay also serves a second purpose: it allows for a</div><div class='add'>+	 * vblank to pass after disabling the FBC before we attempt</div><div class='add'>+	 * to modify the control registers.</div><div class='add'>+	 *</div><div class='add'>+	 * A more complicated solution would involve tracking vblanks</div><div class='add'>+	 * following the termination of the page-flipping sequence</div><div class='add'>+	 * and indeed performing the enable as a co-routine and not</div><div class='add'>+	 * waiting synchronously upon the vblank.</div><div class='add'>+	 */</div><div class='add'>+	schedule_delayed_work(&amp;work-&gt;work, msecs_to_jiffies(50));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_disable_fbc(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	intel_cancel_fbc_work(dev_priv);</div><div class='add'>+</div><div class='add'>+	if (!dev_priv-&gt;display.disable_fbc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;display.disable_fbc(dev);</div><div class='add'>+	dev_priv-&gt;cfb_plane = -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * intel_update_fbc - enable/disable FBC as needed</div><div class='add'>+ * @dev: the drm_device</div><div class='add'>+ *</div><div class='add'>+ * Set up the framebuffer compression hardware at mode set time.  We</div><div class='add'>+ * enable it if possible:</div><div class='add'>+ *   - plane A only (on pre-965)</div><div class='add'>+ *   - no pixel mulitply/line duplication</div><div class='add'>+ *   - no alpha buffer discard</div><div class='add'>+ *   - no dual wide</div><div class='add'>+ *   - framebuffer &lt;= 2048 in width, 1536 in height</div><div class='add'>+ *</div><div class='add'>+ * We can't assume that any compression will take place (worst case),</div><div class='add'>+ * so the compressed buffer has to be the same size as the uncompressed</div><div class='add'>+ * one.  It also must reside (along with the line length buffer) in</div><div class='add'>+ * stolen memory.</div><div class='add'>+ *</div><div class='add'>+ * We need to enable/disable FBC on a global basis.</div><div class='add'>+ */</div><div class='add'>+void intel_update_fbc(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct drm_crtc *crtc = NULL, *tmp_crtc;</div><div class='add'>+	struct intel_crtc *intel_crtc;</div><div class='add'>+	struct drm_framebuffer *fb;</div><div class='add'>+	struct intel_framebuffer *intel_fb;</div><div class='add'>+	struct drm_i915_gem_object *obj;</div><div class='add'>+	int enable_fbc;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("\n");</div><div class='add'>+</div><div class='add'>+	if (!i915_powersave)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!I915_HAS_FBC(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If FBC is already on, we just have to verify that we can</div><div class='add'>+	 * keep it that way...</div><div class='add'>+	 * Need to disable if:</div><div class='add'>+	 *   - more than one pipe is active</div><div class='add'>+	 *   - changing FBC params (stride, fence, mode)</div><div class='add'>+	 *   - new fb is too large to fit in compressed buffer</div><div class='add'>+	 *   - going to an unsupported config (interlace, pixel multiply, etc.)</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry(tmp_crtc, &amp;dev-&gt;mode_config.crtc_list, head) {</div><div class='add'>+		if (tmp_crtc-&gt;enabled &amp;&amp; tmp_crtc-&gt;fb) {</div><div class='add'>+			if (crtc) {</div><div class='add'>+				DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");</div><div class='add'>+				dev_priv-&gt;no_fbc_reason = FBC_MULTIPLE_PIPES;</div><div class='add'>+				goto out_disable;</div><div class='add'>+			}</div><div class='add'>+			crtc = tmp_crtc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!crtc || crtc-&gt;fb == NULL) {</div><div class='add'>+		DRM_DEBUG_KMS("no output, disabling\n");</div><div class='add'>+		dev_priv-&gt;no_fbc_reason = FBC_NO_OUTPUT;</div><div class='add'>+		goto out_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	intel_crtc = to_intel_crtc(crtc);</div><div class='add'>+	fb = crtc-&gt;fb;</div><div class='add'>+	intel_fb = to_intel_framebuffer(fb);</div><div class='add'>+	obj = intel_fb-&gt;obj;</div><div class='add'>+</div><div class='add'>+	enable_fbc = i915_enable_fbc;</div><div class='add'>+	if (enable_fbc &lt; 0) {</div><div class='add'>+		DRM_DEBUG_KMS("fbc set to per-chip default\n");</div><div class='add'>+		enable_fbc = 1;</div><div class='add'>+		if (INTEL_INFO(dev)-&gt;gen &lt;= 6)</div><div class='add'>+			enable_fbc = 0;</div><div class='add'>+	}</div><div class='add'>+	if (!enable_fbc) {</div><div class='add'>+		DRM_DEBUG_KMS("fbc disabled per module param\n");</div><div class='add'>+		dev_priv-&gt;no_fbc_reason = FBC_MODULE_PARAM;</div><div class='add'>+		goto out_disable;</div><div class='add'>+	}</div><div class='add'>+	if (intel_fb-&gt;obj-&gt;base.size &gt; dev_priv-&gt;cfb_size) {</div><div class='add'>+		DRM_DEBUG_KMS("framebuffer too large, disabling "</div><div class='add'>+			      "compression\n");</div><div class='add'>+		dev_priv-&gt;no_fbc_reason = FBC_STOLEN_TOO_SMALL;</div><div class='add'>+		goto out_disable;</div><div class='add'>+	}</div><div class='add'>+	if ((crtc-&gt;mode.flags &amp; DRM_MODE_FLAG_INTERLACE) ||</div><div class='add'>+	    (crtc-&gt;mode.flags &amp; DRM_MODE_FLAG_DBLSCAN)) {</div><div class='add'>+		DRM_DEBUG_KMS("mode incompatible with compression, "</div><div class='add'>+			      "disabling\n");</div><div class='add'>+		dev_priv-&gt;no_fbc_reason = FBC_UNSUPPORTED_MODE;</div><div class='add'>+		goto out_disable;</div><div class='add'>+	}</div><div class='add'>+	if ((crtc-&gt;mode.hdisplay &gt; 2048) ||</div><div class='add'>+	    (crtc-&gt;mode.vdisplay &gt; 1536)) {</div><div class='add'>+		DRM_DEBUG_KMS("mode too large for compression, disabling\n");</div><div class='add'>+		dev_priv-&gt;no_fbc_reason = FBC_MODE_TOO_LARGE;</div><div class='add'>+		goto out_disable;</div><div class='add'>+	}</div><div class='add'>+	if ((IS_I915GM(dev) || IS_I945GM(dev)) &amp;&amp; intel_crtc-&gt;plane != 0) {</div><div class='add'>+		DRM_DEBUG_KMS("plane not 0, disabling compression\n");</div><div class='add'>+		dev_priv-&gt;no_fbc_reason = FBC_BAD_PLANE;</div><div class='add'>+		goto out_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The use of a CPU fence is mandatory in order to detect writes</div><div class='add'>+	 * by the CPU to the scanout and trigger updates to the FBC.</div><div class='add'>+	 */</div><div class='add'>+	if (obj-&gt;tiling_mode != I915_TILING_X ||</div><div class='add'>+	    obj-&gt;fence_reg == I915_FENCE_REG_NONE) {</div><div class='add'>+		DRM_DEBUG_KMS("framebuffer not tiled or fenced, disabling compression\n");</div><div class='add'>+		dev_priv-&gt;no_fbc_reason = FBC_NOT_TILED;</div><div class='add'>+		goto out_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If the kernel debugger is active, always disable compression */</div><div class='add'>+	if (in_dbg_master())</div><div class='add'>+		goto out_disable;</div><div class='add'>+</div><div class='add'>+	/* If the scanout has not changed, don't modify the FBC settings.</div><div class='add'>+	 * Note that we make the fundamental assumption that the fb-&gt;obj</div><div class='add'>+	 * cannot be unpinned (and have its GTT offset and fence revoked)</div><div class='add'>+	 * without first being decoupled from the scanout and FBC disabled.</div><div class='add'>+	 */</div><div class='add'>+	if (dev_priv-&gt;cfb_plane == intel_crtc-&gt;plane &amp;&amp;</div><div class='add'>+	    dev_priv-&gt;cfb_fb == fb-&gt;base.id &amp;&amp;</div><div class='add'>+	    dev_priv-&gt;cfb_y == crtc-&gt;y)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (intel_fbc_enabled(dev)) {</div><div class='add'>+		/* We update FBC along two paths, after changing fb/crtc</div><div class='add'>+		 * configuration (modeswitching) and after page-flipping</div><div class='add'>+		 * finishes. For the latter, we know that not only did</div><div class='add'>+		 * we disable the FBC at the start of the page-flip</div><div class='add'>+		 * sequence, but also more than one vblank has passed.</div><div class='add'>+		 *</div><div class='add'>+		 * For the former case of modeswitching, it is possible</div><div class='add'>+		 * to switch between two FBC valid configurations</div><div class='add'>+		 * instantaneously so we do need to disable the FBC</div><div class='add'>+		 * before we can modify its control registers. We also</div><div class='add'>+		 * have to wait for the next vblank for that to take</div><div class='add'>+		 * effect. However, since we delay enabling FBC we can</div><div class='add'>+		 * assume that a vblank has passed since disabling and</div><div class='add'>+		 * that we can safely alter the registers in the deferred</div><div class='add'>+		 * callback.</div><div class='add'>+		 *</div><div class='add'>+		 * In the scenario that we go from a valid to invalid</div><div class='add'>+		 * and then back to valid FBC configuration we have</div><div class='add'>+		 * no strict enforcement that a vblank occurred since</div><div class='add'>+		 * disabling the FBC. However, along all current pipe</div><div class='add'>+		 * disabling paths we do need to wait for a vblank at</div><div class='add'>+		 * some point. And we wait before enabling FBC anyway.</div><div class='add'>+		 */</div><div class='add'>+		DRM_DEBUG_KMS("disabling active FBC for update\n");</div><div class='add'>+		intel_disable_fbc(dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	intel_enable_fbc(crtc, 500);</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+out_disable:</div><div class='add'>+	/* Multiple disables should be harmless */</div><div class='add'>+	if (intel_fbc_enabled(dev)) {</div><div class='add'>+		DRM_DEBUG_KMS("unsupported config, disabling FBC\n");</div><div class='add'>+		intel_disable_fbc(dev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i915_pineview_get_mem_freq(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 tmp;</div><div class='add'>+</div><div class='add'>+	tmp = I915_READ(CLKCFG);</div><div class='add'>+</div><div class='add'>+	switch (tmp &amp; CLKCFG_FSB_MASK) {</div><div class='add'>+	case CLKCFG_FSB_533:</div><div class='add'>+		dev_priv-&gt;fsb_freq = 533; /* 133*4 */</div><div class='add'>+		break;</div><div class='add'>+	case CLKCFG_FSB_800:</div><div class='add'>+		dev_priv-&gt;fsb_freq = 800; /* 200*4 */</div><div class='add'>+		break;</div><div class='add'>+	case CLKCFG_FSB_667:</div><div class='add'>+		dev_priv-&gt;fsb_freq =  667; /* 167*4 */</div><div class='add'>+		break;</div><div class='add'>+	case CLKCFG_FSB_400:</div><div class='add'>+		dev_priv-&gt;fsb_freq = 400; /* 100*4 */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (tmp &amp; CLKCFG_MEM_MASK) {</div><div class='add'>+	case CLKCFG_MEM_533:</div><div class='add'>+		dev_priv-&gt;mem_freq = 533;</div><div class='add'>+		break;</div><div class='add'>+	case CLKCFG_MEM_667:</div><div class='add'>+		dev_priv-&gt;mem_freq = 667;</div><div class='add'>+		break;</div><div class='add'>+	case CLKCFG_MEM_800:</div><div class='add'>+		dev_priv-&gt;mem_freq = 800;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* detect pineview DDR3 setting */</div><div class='add'>+	tmp = I915_READ(CSHRDDR3CTL);</div><div class='add'>+	dev_priv-&gt;is_ddr3 = (tmp &amp; CSHRDDR3CTL_DDR3) ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i915_ironlake_get_mem_freq(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u16 ddrpll, csipll;</div><div class='add'>+</div><div class='add'>+	ddrpll = I915_READ16(DDRMPLL1);</div><div class='add'>+	csipll = I915_READ16(CSIPLL0);</div><div class='add'>+</div><div class='add'>+	switch (ddrpll &amp; 0xff) {</div><div class='add'>+	case 0xc:</div><div class='add'>+		dev_priv-&gt;mem_freq = 800;</div><div class='add'>+		break;</div><div class='add'>+	case 0x10:</div><div class='add'>+		dev_priv-&gt;mem_freq = 1066;</div><div class='add'>+		break;</div><div class='add'>+	case 0x14:</div><div class='add'>+		dev_priv-&gt;mem_freq = 1333;</div><div class='add'>+		break;</div><div class='add'>+	case 0x18:</div><div class='add'>+		dev_priv-&gt;mem_freq = 1600;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		DRM_DEBUG_DRIVER("unknown memory frequency 0x%02x\n",</div><div class='add'>+				 ddrpll &amp; 0xff);</div><div class='add'>+		dev_priv-&gt;mem_freq = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;r_t = dev_priv-&gt;mem_freq;</div><div class='add'>+</div><div class='add'>+	switch (csipll &amp; 0x3ff) {</div><div class='add'>+	case 0x00c:</div><div class='add'>+		dev_priv-&gt;fsb_freq = 3200;</div><div class='add'>+		break;</div><div class='add'>+	case 0x00e:</div><div class='add'>+		dev_priv-&gt;fsb_freq = 3733;</div><div class='add'>+		break;</div><div class='add'>+	case 0x010:</div><div class='add'>+		dev_priv-&gt;fsb_freq = 4266;</div><div class='add'>+		break;</div><div class='add'>+	case 0x012:</div><div class='add'>+		dev_priv-&gt;fsb_freq = 4800;</div><div class='add'>+		break;</div><div class='add'>+	case 0x014:</div><div class='add'>+		dev_priv-&gt;fsb_freq = 5333;</div><div class='add'>+		break;</div><div class='add'>+	case 0x016:</div><div class='add'>+		dev_priv-&gt;fsb_freq = 5866;</div><div class='add'>+		break;</div><div class='add'>+	case 0x018:</div><div class='add'>+		dev_priv-&gt;fsb_freq = 6400;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		DRM_DEBUG_DRIVER("unknown fsb frequency 0x%04x\n",</div><div class='add'>+				 csipll &amp; 0x3ff);</div><div class='add'>+		dev_priv-&gt;fsb_freq = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;fsb_freq == 3200) {</div><div class='add'>+		dev_priv-&gt;c_m = 0;</div><div class='add'>+	} else if (dev_priv-&gt;fsb_freq &gt; 3200 &amp;&amp; dev_priv-&gt;fsb_freq &lt;= 4800) {</div><div class='add'>+		dev_priv-&gt;c_m = 1;</div><div class='add'>+	} else {</div><div class='add'>+		dev_priv-&gt;c_m = 2;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct cxsr_latency cxsr_latency_table[] = {</div><div class='add'>+	{1, 0, 800, 400, 3382, 33382, 3983, 33983},    /* DDR2-400 SC */</div><div class='add'>+	{1, 0, 800, 667, 3354, 33354, 3807, 33807},    /* DDR2-667 SC */</div><div class='add'>+	{1, 0, 800, 800, 3347, 33347, 3763, 33763},    /* DDR2-800 SC */</div><div class='add'>+	{1, 1, 800, 667, 6420, 36420, 6873, 36873},    /* DDR3-667 SC */</div><div class='add'>+	{1, 1, 800, 800, 5902, 35902, 6318, 36318},    /* DDR3-800 SC */</div><div class='add'>+</div><div class='add'>+	{1, 0, 667, 400, 3400, 33400, 4021, 34021},    /* DDR2-400 SC */</div><div class='add'>+	{1, 0, 667, 667, 3372, 33372, 3845, 33845},    /* DDR2-667 SC */</div><div class='add'>+	{1, 0, 667, 800, 3386, 33386, 3822, 33822},    /* DDR2-800 SC */</div><div class='add'>+	{1, 1, 667, 667, 6438, 36438, 6911, 36911},    /* DDR3-667 SC */</div><div class='add'>+	{1, 1, 667, 800, 5941, 35941, 6377, 36377},    /* DDR3-800 SC */</div><div class='add'>+</div><div class='add'>+	{1, 0, 400, 400, 3472, 33472, 4173, 34173},    /* DDR2-400 SC */</div><div class='add'>+	{1, 0, 400, 667, 3443, 33443, 3996, 33996},    /* DDR2-667 SC */</div><div class='add'>+	{1, 0, 400, 800, 3430, 33430, 3946, 33946},    /* DDR2-800 SC */</div><div class='add'>+	{1, 1, 400, 667, 6509, 36509, 7062, 37062},    /* DDR3-667 SC */</div><div class='add'>+	{1, 1, 400, 800, 5985, 35985, 6501, 36501},    /* DDR3-800 SC */</div><div class='add'>+</div><div class='add'>+	{0, 0, 800, 400, 3438, 33438, 4065, 34065},    /* DDR2-400 SC */</div><div class='add'>+	{0, 0, 800, 667, 3410, 33410, 3889, 33889},    /* DDR2-667 SC */</div><div class='add'>+	{0, 0, 800, 800, 3403, 33403, 3845, 33845},    /* DDR2-800 SC */</div><div class='add'>+	{0, 1, 800, 667, 6476, 36476, 6955, 36955},    /* DDR3-667 SC */</div><div class='add'>+	{0, 1, 800, 800, 5958, 35958, 6400, 36400},    /* DDR3-800 SC */</div><div class='add'>+</div><div class='add'>+	{0, 0, 667, 400, 3456, 33456, 4103, 34106},    /* DDR2-400 SC */</div><div class='add'>+	{0, 0, 667, 667, 3428, 33428, 3927, 33927},    /* DDR2-667 SC */</div><div class='add'>+	{0, 0, 667, 800, 3443, 33443, 3905, 33905},    /* DDR2-800 SC */</div><div class='add'>+	{0, 1, 667, 667, 6494, 36494, 6993, 36993},    /* DDR3-667 SC */</div><div class='add'>+	{0, 1, 667, 800, 5998, 35998, 6460, 36460},    /* DDR3-800 SC */</div><div class='add'>+</div><div class='add'>+	{0, 0, 400, 400, 3528, 33528, 4255, 34255},    /* DDR2-400 SC */</div><div class='add'>+	{0, 0, 400, 667, 3500, 33500, 4079, 34079},    /* DDR2-667 SC */</div><div class='add'>+	{0, 0, 400, 800, 3487, 33487, 4029, 34029},    /* DDR2-800 SC */</div><div class='add'>+	{0, 1, 400, 667, 6566, 36566, 7145, 37145},    /* DDR3-667 SC */</div><div class='add'>+	{0, 1, 400, 800, 6042, 36042, 6584, 36584},    /* DDR3-800 SC */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct cxsr_latency *intel_get_cxsr_latency(int is_desktop,</div><div class='add'>+							 int is_ddr3,</div><div class='add'>+							 int fsb,</div><div class='add'>+							 int mem)</div><div class='add'>+{</div><div class='add'>+	const struct cxsr_latency *latency;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (fsb == 0 || mem == 0)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(cxsr_latency_table); i++) {</div><div class='add'>+		latency = &amp;cxsr_latency_table[i];</div><div class='add'>+		if (is_desktop == latency-&gt;is_desktop &amp;&amp;</div><div class='add'>+		    is_ddr3 == latency-&gt;is_ddr3 &amp;&amp;</div><div class='add'>+		    fsb == latency-&gt;fsb_freq &amp;&amp; mem == latency-&gt;mem_freq)</div><div class='add'>+			return latency;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("Unknown FSB/MEM found, disable CxSR\n");</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pineview_disable_cxsr(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	/* deactivate cxsr */</div><div class='add'>+	I915_WRITE(DSPFW3, I915_READ(DSPFW3) &amp; ~PINEVIEW_SELF_REFRESH_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Latency for FIFO fetches is dependent on several factors:</div><div class='add'>+ *   - memory configuration (speed, channels)</div><div class='add'>+ *   - chipset</div><div class='add'>+ *   - current MCH state</div><div class='add'>+ * It can be fairly high in some situations, so here we assume a fairly</div><div class='add'>+ * pessimal value.  It's a tradeoff between extra memory fetches (if we</div><div class='add'>+ * set this value too high, the FIFO will fetch frequently to stay full)</div><div class='add'>+ * and power consumption (set it too low to save power and we might see</div><div class='add'>+ * FIFO underruns and display "flicker").</div><div class='add'>+ *</div><div class='add'>+ * A value of 5us seems to be a good balance; safe for very low end</div><div class='add'>+ * platforms but not overly aggressive on lower latency configs.</div><div class='add'>+ */</div><div class='add'>+static const int latency_ns = 5000;</div><div class='add'>+</div><div class='add'>+static int i9xx_get_fifo_size(struct drm_device *dev, int plane)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	uint32_t dsparb = I915_READ(DSPARB);</div><div class='add'>+	int size;</div><div class='add'>+</div><div class='add'>+	size = dsparb &amp; 0x7f;</div><div class='add'>+	if (plane)</div><div class='add'>+		size = ((dsparb &gt;&gt; DSPARB_CSTART_SHIFT) &amp; 0x7f) - size;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,</div><div class='add'>+		      plane ? "B" : "A", size);</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int i85x_get_fifo_size(struct drm_device *dev, int plane)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	uint32_t dsparb = I915_READ(DSPARB);</div><div class='add'>+	int size;</div><div class='add'>+</div><div class='add'>+	size = dsparb &amp; 0x1ff;</div><div class='add'>+	if (plane)</div><div class='add'>+		size = ((dsparb &gt;&gt; DSPARB_BEND_SHIFT) &amp; 0x1ff) - size;</div><div class='add'>+	size &gt;&gt;= 1; /* Convert to cachelines */</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,</div><div class='add'>+		      plane ? "B" : "A", size);</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int i845_get_fifo_size(struct drm_device *dev, int plane)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	uint32_t dsparb = I915_READ(DSPARB);</div><div class='add'>+	int size;</div><div class='add'>+</div><div class='add'>+	size = dsparb &amp; 0x7f;</div><div class='add'>+	size &gt;&gt;= 2; /* Convert to cachelines */</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,</div><div class='add'>+		      plane ? "B" : "A",</div><div class='add'>+		      size);</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int i830_get_fifo_size(struct drm_device *dev, int plane)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	uint32_t dsparb = I915_READ(DSPARB);</div><div class='add'>+	int size;</div><div class='add'>+</div><div class='add'>+	size = dsparb &amp; 0x7f;</div><div class='add'>+	size &gt;&gt;= 1; /* Convert to cachelines */</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,</div><div class='add'>+		      plane ? "B" : "A", size);</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Pineview has different values for various configs */</div><div class='add'>+static const struct intel_watermark_params pineview_display_wm = {</div><div class='add'>+	PINEVIEW_DISPLAY_FIFO,</div><div class='add'>+	PINEVIEW_MAX_WM,</div><div class='add'>+	PINEVIEW_DFT_WM,</div><div class='add'>+	PINEVIEW_GUARD_WM,</div><div class='add'>+	PINEVIEW_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params pineview_display_hplloff_wm = {</div><div class='add'>+	PINEVIEW_DISPLAY_FIFO,</div><div class='add'>+	PINEVIEW_MAX_WM,</div><div class='add'>+	PINEVIEW_DFT_HPLLOFF_WM,</div><div class='add'>+	PINEVIEW_GUARD_WM,</div><div class='add'>+	PINEVIEW_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params pineview_cursor_wm = {</div><div class='add'>+	PINEVIEW_CURSOR_FIFO,</div><div class='add'>+	PINEVIEW_CURSOR_MAX_WM,</div><div class='add'>+	PINEVIEW_CURSOR_DFT_WM,</div><div class='add'>+	PINEVIEW_CURSOR_GUARD_WM,</div><div class='add'>+	PINEVIEW_FIFO_LINE_SIZE,</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params pineview_cursor_hplloff_wm = {</div><div class='add'>+	PINEVIEW_CURSOR_FIFO,</div><div class='add'>+	PINEVIEW_CURSOR_MAX_WM,</div><div class='add'>+	PINEVIEW_CURSOR_DFT_WM,</div><div class='add'>+	PINEVIEW_CURSOR_GUARD_WM,</div><div class='add'>+	PINEVIEW_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params g4x_wm_info = {</div><div class='add'>+	G4X_FIFO_SIZE,</div><div class='add'>+	G4X_MAX_WM,</div><div class='add'>+	G4X_MAX_WM,</div><div class='add'>+	2,</div><div class='add'>+	G4X_FIFO_LINE_SIZE,</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params g4x_cursor_wm_info = {</div><div class='add'>+	I965_CURSOR_FIFO,</div><div class='add'>+	I965_CURSOR_MAX_WM,</div><div class='add'>+	I965_CURSOR_DFT_WM,</div><div class='add'>+	2,</div><div class='add'>+	G4X_FIFO_LINE_SIZE,</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params valleyview_wm_info = {</div><div class='add'>+	VALLEYVIEW_FIFO_SIZE,</div><div class='add'>+	VALLEYVIEW_MAX_WM,</div><div class='add'>+	VALLEYVIEW_MAX_WM,</div><div class='add'>+	2,</div><div class='add'>+	G4X_FIFO_LINE_SIZE,</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params valleyview_cursor_wm_info = {</div><div class='add'>+	I965_CURSOR_FIFO,</div><div class='add'>+	VALLEYVIEW_CURSOR_MAX_WM,</div><div class='add'>+	I965_CURSOR_DFT_WM,</div><div class='add'>+	2,</div><div class='add'>+	G4X_FIFO_LINE_SIZE,</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params i965_cursor_wm_info = {</div><div class='add'>+	I965_CURSOR_FIFO,</div><div class='add'>+	I965_CURSOR_MAX_WM,</div><div class='add'>+	I965_CURSOR_DFT_WM,</div><div class='add'>+	2,</div><div class='add'>+	I915_FIFO_LINE_SIZE,</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params i945_wm_info = {</div><div class='add'>+	I945_FIFO_SIZE,</div><div class='add'>+	I915_MAX_WM,</div><div class='add'>+	1,</div><div class='add'>+	2,</div><div class='add'>+	I915_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params i915_wm_info = {</div><div class='add'>+	I915_FIFO_SIZE,</div><div class='add'>+	I915_MAX_WM,</div><div class='add'>+	1,</div><div class='add'>+	2,</div><div class='add'>+	I915_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params i855_wm_info = {</div><div class='add'>+	I855GM_FIFO_SIZE,</div><div class='add'>+	I915_MAX_WM,</div><div class='add'>+	1,</div><div class='add'>+	2,</div><div class='add'>+	I830_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params i830_wm_info = {</div><div class='add'>+	I830_FIFO_SIZE,</div><div class='add'>+	I915_MAX_WM,</div><div class='add'>+	1,</div><div class='add'>+	2,</div><div class='add'>+	I830_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct intel_watermark_params ironlake_display_wm_info = {</div><div class='add'>+	ILK_DISPLAY_FIFO,</div><div class='add'>+	ILK_DISPLAY_MAXWM,</div><div class='add'>+	ILK_DISPLAY_DFTWM,</div><div class='add'>+	2,</div><div class='add'>+	ILK_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params ironlake_cursor_wm_info = {</div><div class='add'>+	ILK_CURSOR_FIFO,</div><div class='add'>+	ILK_CURSOR_MAXWM,</div><div class='add'>+	ILK_CURSOR_DFTWM,</div><div class='add'>+	2,</div><div class='add'>+	ILK_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params ironlake_display_srwm_info = {</div><div class='add'>+	ILK_DISPLAY_SR_FIFO,</div><div class='add'>+	ILK_DISPLAY_MAX_SRWM,</div><div class='add'>+	ILK_DISPLAY_DFT_SRWM,</div><div class='add'>+	2,</div><div class='add'>+	ILK_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params ironlake_cursor_srwm_info = {</div><div class='add'>+	ILK_CURSOR_SR_FIFO,</div><div class='add'>+	ILK_CURSOR_MAX_SRWM,</div><div class='add'>+	ILK_CURSOR_DFT_SRWM,</div><div class='add'>+	2,</div><div class='add'>+	ILK_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct intel_watermark_params sandybridge_display_wm_info = {</div><div class='add'>+	SNB_DISPLAY_FIFO,</div><div class='add'>+	SNB_DISPLAY_MAXWM,</div><div class='add'>+	SNB_DISPLAY_DFTWM,</div><div class='add'>+	2,</div><div class='add'>+	SNB_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params sandybridge_cursor_wm_info = {</div><div class='add'>+	SNB_CURSOR_FIFO,</div><div class='add'>+	SNB_CURSOR_MAXWM,</div><div class='add'>+	SNB_CURSOR_DFTWM,</div><div class='add'>+	2,</div><div class='add'>+	SNB_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params sandybridge_display_srwm_info = {</div><div class='add'>+	SNB_DISPLAY_SR_FIFO,</div><div class='add'>+	SNB_DISPLAY_MAX_SRWM,</div><div class='add'>+	SNB_DISPLAY_DFT_SRWM,</div><div class='add'>+	2,</div><div class='add'>+	SNB_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+static const struct intel_watermark_params sandybridge_cursor_srwm_info = {</div><div class='add'>+	SNB_CURSOR_SR_FIFO,</div><div class='add'>+	SNB_CURSOR_MAX_SRWM,</div><div class='add'>+	SNB_CURSOR_DFT_SRWM,</div><div class='add'>+	2,</div><div class='add'>+	SNB_FIFO_LINE_SIZE</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * intel_calculate_wm - calculate watermark level</div><div class='add'>+ * @clock_in_khz: pixel clock</div><div class='add'>+ * @wm: chip FIFO params</div><div class='add'>+ * @pixel_size: display pixel size</div><div class='add'>+ * @latency_ns: memory latency for the platform</div><div class='add'>+ *</div><div class='add'>+ * Calculate the watermark level (the level at which the display plane will</div><div class='add'>+ * start fetching from memory again).  Each chip has a different display</div><div class='add'>+ * FIFO size and allocation, so the caller needs to figure that out and pass</div><div class='add'>+ * in the correct intel_watermark_params structure.</div><div class='add'>+ *</div><div class='add'>+ * As the pixel clock runs, the FIFO will be drained at a rate that depends</div><div class='add'>+ * on the pixel size.  When it reaches the watermark level, it'll start</div><div class='add'>+ * fetching FIFO line sized based chunks from memory until the FIFO fills</div><div class='add'>+ * past the watermark point.  If the FIFO drains completely, a FIFO underrun</div><div class='add'>+ * will occur, and a display engine hang could result.</div><div class='add'>+ */</div><div class='add'>+static unsigned long intel_calculate_wm(unsigned long clock_in_khz,</div><div class='add'>+					const struct intel_watermark_params *wm,</div><div class='add'>+					int fifo_size,</div><div class='add'>+					int pixel_size,</div><div class='add'>+					unsigned long latency_ns)</div><div class='add'>+{</div><div class='add'>+	long entries_required, wm_size;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Note: we need to make sure we don't overflow for various clock &amp;</div><div class='add'>+	 * latency values.</div><div class='add'>+	 * clocks go from a few thousand to several hundred thousand.</div><div class='add'>+	 * latency is usually a few thousand</div><div class='add'>+	 */</div><div class='add'>+	entries_required = ((clock_in_khz / 1000) * pixel_size * latency_ns) /</div><div class='add'>+		1000;</div><div class='add'>+	entries_required = DIV_ROUND_UP(entries_required, wm-&gt;cacheline_size);</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("FIFO entries required for mode: %ld\n", entries_required);</div><div class='add'>+</div><div class='add'>+	wm_size = fifo_size - (entries_required + wm-&gt;guard_size);</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("FIFO watermark level: %ld\n", wm_size);</div><div class='add'>+</div><div class='add'>+	/* Don't promote wm_size to unsigned... */</div><div class='add'>+	if (wm_size &gt; (long)wm-&gt;max_wm)</div><div class='add'>+		wm_size = wm-&gt;max_wm;</div><div class='add'>+	if (wm_size &lt;= 0)</div><div class='add'>+		wm_size = wm-&gt;default_wm;</div><div class='add'>+	return wm_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct drm_crtc *single_enabled_crtc(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_crtc *crtc, *enabled = NULL;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(crtc, &amp;dev-&gt;mode_config.crtc_list, head) {</div><div class='add'>+		if (crtc-&gt;enabled &amp;&amp; crtc-&gt;fb) {</div><div class='add'>+			if (enabled)</div><div class='add'>+				return NULL;</div><div class='add'>+			enabled = crtc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return enabled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pineview_update_wm(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct drm_crtc *crtc;</div><div class='add'>+	const struct cxsr_latency *latency;</div><div class='add'>+	u32 reg;</div><div class='add'>+	unsigned long wm;</div><div class='add'>+</div><div class='add'>+	latency = intel_get_cxsr_latency(IS_PINEVIEW_G(dev), dev_priv-&gt;is_ddr3,</div><div class='add'>+					 dev_priv-&gt;fsb_freq, dev_priv-&gt;mem_freq);</div><div class='add'>+	if (!latency) {</div><div class='add'>+		DRM_DEBUG_KMS("Unknown FSB/MEM found, disable CxSR\n");</div><div class='add'>+		pineview_disable_cxsr(dev);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	crtc = single_enabled_crtc(dev);</div><div class='add'>+	if (crtc) {</div><div class='add'>+		int clock = crtc-&gt;mode.clock;</div><div class='add'>+		int pixel_size = crtc-&gt;fb-&gt;bits_per_pixel / 8;</div><div class='add'>+</div><div class='add'>+		/* Display SR */</div><div class='add'>+		wm = intel_calculate_wm(clock, &amp;pineview_display_wm,</div><div class='add'>+					pineview_display_wm.fifo_size,</div><div class='add'>+					pixel_size, latency-&gt;display_sr);</div><div class='add'>+		reg = I915_READ(DSPFW1);</div><div class='add'>+		reg &amp;= ~DSPFW_SR_MASK;</div><div class='add'>+		reg |= wm &lt;&lt; DSPFW_SR_SHIFT;</div><div class='add'>+		I915_WRITE(DSPFW1, reg);</div><div class='add'>+		DRM_DEBUG_KMS("DSPFW1 register is %x\n", reg);</div><div class='add'>+</div><div class='add'>+		/* cursor SR */</div><div class='add'>+		wm = intel_calculate_wm(clock, &amp;pineview_cursor_wm,</div><div class='add'>+					pineview_display_wm.fifo_size,</div><div class='add'>+					pixel_size, latency-&gt;cursor_sr);</div><div class='add'>+		reg = I915_READ(DSPFW3);</div><div class='add'>+		reg &amp;= ~DSPFW_CURSOR_SR_MASK;</div><div class='add'>+		reg |= (wm &amp; 0x3f) &lt;&lt; DSPFW_CURSOR_SR_SHIFT;</div><div class='add'>+		I915_WRITE(DSPFW3, reg);</div><div class='add'>+</div><div class='add'>+		/* Display HPLL off SR */</div><div class='add'>+		wm = intel_calculate_wm(clock, &amp;pineview_display_hplloff_wm,</div><div class='add'>+					pineview_display_hplloff_wm.fifo_size,</div><div class='add'>+					pixel_size, latency-&gt;display_hpll_disable);</div><div class='add'>+		reg = I915_READ(DSPFW3);</div><div class='add'>+		reg &amp;= ~DSPFW_HPLL_SR_MASK;</div><div class='add'>+		reg |= wm &amp; DSPFW_HPLL_SR_MASK;</div><div class='add'>+		I915_WRITE(DSPFW3, reg);</div><div class='add'>+</div><div class='add'>+		/* cursor HPLL off SR */</div><div class='add'>+		wm = intel_calculate_wm(clock, &amp;pineview_cursor_hplloff_wm,</div><div class='add'>+					pineview_display_hplloff_wm.fifo_size,</div><div class='add'>+					pixel_size, latency-&gt;cursor_hpll_disable);</div><div class='add'>+		reg = I915_READ(DSPFW3);</div><div class='add'>+		reg &amp;= ~DSPFW_HPLL_CURSOR_MASK;</div><div class='add'>+		reg |= (wm &amp; 0x3f) &lt;&lt; DSPFW_HPLL_CURSOR_SHIFT;</div><div class='add'>+		I915_WRITE(DSPFW3, reg);</div><div class='add'>+		DRM_DEBUG_KMS("DSPFW3 register is %x\n", reg);</div><div class='add'>+</div><div class='add'>+		/* activate cxsr */</div><div class='add'>+		I915_WRITE(DSPFW3,</div><div class='add'>+			   I915_READ(DSPFW3) | PINEVIEW_SELF_REFRESH_EN);</div><div class='add'>+		DRM_DEBUG_KMS("Self-refresh is enabled\n");</div><div class='add'>+	} else {</div><div class='add'>+		pineview_disable_cxsr(dev);</div><div class='add'>+		DRM_DEBUG_KMS("Self-refresh is disabled\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool g4x_compute_wm0(struct drm_device *dev,</div><div class='add'>+			    int plane,</div><div class='add'>+			    const struct intel_watermark_params *display,</div><div class='add'>+			    int display_latency_ns,</div><div class='add'>+			    const struct intel_watermark_params *cursor,</div><div class='add'>+			    int cursor_latency_ns,</div><div class='add'>+			    int *plane_wm,</div><div class='add'>+			    int *cursor_wm)</div><div class='add'>+{</div><div class='add'>+	struct drm_crtc *crtc;</div><div class='add'>+	int htotal, hdisplay, clock, pixel_size;</div><div class='add'>+	int line_time_us, line_count;</div><div class='add'>+	int entries, tlb_miss;</div><div class='add'>+</div><div class='add'>+	crtc = intel_get_crtc_for_plane(dev, plane);</div><div class='add'>+	if (crtc-&gt;fb == NULL || !crtc-&gt;enabled) {</div><div class='add'>+		*cursor_wm = cursor-&gt;guard_size;</div><div class='add'>+		*plane_wm = display-&gt;guard_size;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	htotal = crtc-&gt;mode.htotal;</div><div class='add'>+	hdisplay = crtc-&gt;mode.hdisplay;</div><div class='add'>+	clock = crtc-&gt;mode.clock;</div><div class='add'>+	pixel_size = crtc-&gt;fb-&gt;bits_per_pixel / 8;</div><div class='add'>+</div><div class='add'>+	/* Use the small buffer method to calculate plane watermark */</div><div class='add'>+	entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000;</div><div class='add'>+	tlb_miss = display-&gt;fifo_size*display-&gt;cacheline_size - hdisplay * 8;</div><div class='add'>+	if (tlb_miss &gt; 0)</div><div class='add'>+		entries += tlb_miss;</div><div class='add'>+	entries = DIV_ROUND_UP(entries, display-&gt;cacheline_size);</div><div class='add'>+	*plane_wm = entries + display-&gt;guard_size;</div><div class='add'>+	if (*plane_wm &gt; (int)display-&gt;max_wm)</div><div class='add'>+		*plane_wm = display-&gt;max_wm;</div><div class='add'>+</div><div class='add'>+	/* Use the large buffer method to calculate cursor watermark */</div><div class='add'>+	line_time_us = ((htotal * 1000) / clock);</div><div class='add'>+	line_count = (cursor_latency_ns / line_time_us + 1000) / 1000;</div><div class='add'>+	entries = line_count * 64 * pixel_size;</div><div class='add'>+	tlb_miss = cursor-&gt;fifo_size*cursor-&gt;cacheline_size - hdisplay * 8;</div><div class='add'>+	if (tlb_miss &gt; 0)</div><div class='add'>+		entries += tlb_miss;</div><div class='add'>+	entries = DIV_ROUND_UP(entries, cursor-&gt;cacheline_size);</div><div class='add'>+	*cursor_wm = entries + cursor-&gt;guard_size;</div><div class='add'>+	if (*cursor_wm &gt; (int)cursor-&gt;max_wm)</div><div class='add'>+		*cursor_wm = (int)cursor-&gt;max_wm;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Check the wm result.</div><div class='add'>+ *</div><div class='add'>+ * If any calculated watermark values is larger than the maximum value that</div><div class='add'>+ * can be programmed into the associated watermark register, that watermark</div><div class='add'>+ * must be disabled.</div><div class='add'>+ */</div><div class='add'>+static bool g4x_check_srwm(struct drm_device *dev,</div><div class='add'>+			   int display_wm, int cursor_wm,</div><div class='add'>+			   const struct intel_watermark_params *display,</div><div class='add'>+			   const struct intel_watermark_params *cursor)</div><div class='add'>+{</div><div class='add'>+	DRM_DEBUG_KMS("SR watermark: display plane %d, cursor %d\n",</div><div class='add'>+		      display_wm, cursor_wm);</div><div class='add'>+</div><div class='add'>+	if (display_wm &gt; display-&gt;max_wm) {</div><div class='add'>+		DRM_DEBUG_KMS("display watermark is too large(%d/%ld), disabling\n",</div><div class='add'>+			      display_wm, display-&gt;max_wm);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cursor_wm &gt; cursor-&gt;max_wm) {</div><div class='add'>+		DRM_DEBUG_KMS("cursor watermark is too large(%d/%ld), disabling\n",</div><div class='add'>+			      cursor_wm, cursor-&gt;max_wm);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(display_wm || cursor_wm)) {</div><div class='add'>+		DRM_DEBUG_KMS("SR latency is 0, disabling\n");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool g4x_compute_srwm(struct drm_device *dev,</div><div class='add'>+			     int plane,</div><div class='add'>+			     int latency_ns,</div><div class='add'>+			     const struct intel_watermark_params *display,</div><div class='add'>+			     const struct intel_watermark_params *cursor,</div><div class='add'>+			     int *display_wm, int *cursor_wm)</div><div class='add'>+{</div><div class='add'>+	struct drm_crtc *crtc;</div><div class='add'>+	int hdisplay, htotal, pixel_size, clock;</div><div class='add'>+	unsigned long line_time_us;</div><div class='add'>+	int line_count, line_size;</div><div class='add'>+	int small, large;</div><div class='add'>+	int entries;</div><div class='add'>+</div><div class='add'>+	if (!latency_ns) {</div><div class='add'>+		*display_wm = *cursor_wm = 0;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	crtc = intel_get_crtc_for_plane(dev, plane);</div><div class='add'>+	hdisplay = crtc-&gt;mode.hdisplay;</div><div class='add'>+	htotal = crtc-&gt;mode.htotal;</div><div class='add'>+	clock = crtc-&gt;mode.clock;</div><div class='add'>+	pixel_size = crtc-&gt;fb-&gt;bits_per_pixel / 8;</div><div class='add'>+</div><div class='add'>+	line_time_us = (htotal * 1000) / clock;</div><div class='add'>+	line_count = (latency_ns / line_time_us + 1000) / 1000;</div><div class='add'>+	line_size = hdisplay * pixel_size;</div><div class='add'>+</div><div class='add'>+	/* Use the minimum of the small and large buffer method for primary */</div><div class='add'>+	small = ((clock * pixel_size / 1000) * latency_ns) / 1000;</div><div class='add'>+	large = line_count * line_size;</div><div class='add'>+</div><div class='add'>+	entries = DIV_ROUND_UP(min(small, large), display-&gt;cacheline_size);</div><div class='add'>+	*display_wm = entries + display-&gt;guard_size;</div><div class='add'>+</div><div class='add'>+	/* calculate the self-refresh watermark for display cursor */</div><div class='add'>+	entries = line_count * pixel_size * 64;</div><div class='add'>+	entries = DIV_ROUND_UP(entries, cursor-&gt;cacheline_size);</div><div class='add'>+	*cursor_wm = entries + cursor-&gt;guard_size;</div><div class='add'>+</div><div class='add'>+	return g4x_check_srwm(dev,</div><div class='add'>+			      *display_wm, *cursor_wm,</div><div class='add'>+			      display, cursor);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool vlv_compute_drain_latency(struct drm_device *dev,</div><div class='add'>+				     int plane,</div><div class='add'>+				     int *plane_prec_mult,</div><div class='add'>+				     int *plane_dl,</div><div class='add'>+				     int *cursor_prec_mult,</div><div class='add'>+				     int *cursor_dl)</div><div class='add'>+{</div><div class='add'>+	struct drm_crtc *crtc;</div><div class='add'>+	int clock, pixel_size;</div><div class='add'>+	int entries;</div><div class='add'>+</div><div class='add'>+	crtc = intel_get_crtc_for_plane(dev, plane);</div><div class='add'>+	if (crtc-&gt;fb == NULL || !crtc-&gt;enabled)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	clock = crtc-&gt;mode.clock;	/* VESA DOT Clock */</div><div class='add'>+	pixel_size = crtc-&gt;fb-&gt;bits_per_pixel / 8;	/* BPP */</div><div class='add'>+</div><div class='add'>+	entries = (clock / 1000) * pixel_size;</div><div class='add'>+	*plane_prec_mult = (entries &gt; 256) ?</div><div class='add'>+		DRAIN_LATENCY_PRECISION_32 : DRAIN_LATENCY_PRECISION_16;</div><div class='add'>+	*plane_dl = (64 * (*plane_prec_mult) * 4) / ((clock / 1000) *</div><div class='add'>+						     pixel_size);</div><div class='add'>+</div><div class='add'>+	entries = (clock / 1000) * 4;	/* BPP is always 4 for cursor */</div><div class='add'>+	*cursor_prec_mult = (entries &gt; 256) ?</div><div class='add'>+		DRAIN_LATENCY_PRECISION_32 : DRAIN_LATENCY_PRECISION_16;</div><div class='add'>+	*cursor_dl = (64 * (*cursor_prec_mult) * 4) / ((clock / 1000) * 4);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Update drain latency registers of memory arbiter</div><div class='add'>+ *</div><div class='add'>+ * Valleyview SoC has a new memory arbiter and needs drain latency registers</div><div class='add'>+ * to be programmed. Each plane has a drain latency multiplier and a drain</div><div class='add'>+ * latency value.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void vlv_update_drain_latency(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int planea_prec, planea_dl, planeb_prec, planeb_dl;</div><div class='add'>+	int cursora_prec, cursora_dl, cursorb_prec, cursorb_dl;</div><div class='add'>+	int plane_prec_mult, cursor_prec_mult; /* Precision multiplier is</div><div class='add'>+							either 16 or 32 */</div><div class='add'>+</div><div class='add'>+	/* For plane A, Cursor A */</div><div class='add'>+	if (vlv_compute_drain_latency(dev, 0, &amp;plane_prec_mult, &amp;planea_dl,</div><div class='add'>+				      &amp;cursor_prec_mult, &amp;cursora_dl)) {</div><div class='add'>+		cursora_prec = (cursor_prec_mult == DRAIN_LATENCY_PRECISION_32) ?</div><div class='add'>+			DDL_CURSORA_PRECISION_32 : DDL_CURSORA_PRECISION_16;</div><div class='add'>+		planea_prec = (plane_prec_mult == DRAIN_LATENCY_PRECISION_32) ?</div><div class='add'>+			DDL_PLANEA_PRECISION_32 : DDL_PLANEA_PRECISION_16;</div><div class='add'>+</div><div class='add'>+		I915_WRITE(VLV_DDL1, cursora_prec |</div><div class='add'>+				(cursora_dl &lt;&lt; DDL_CURSORA_SHIFT) |</div><div class='add'>+				planea_prec | planea_dl);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* For plane B, Cursor B */</div><div class='add'>+	if (vlv_compute_drain_latency(dev, 1, &amp;plane_prec_mult, &amp;planeb_dl,</div><div class='add'>+				      &amp;cursor_prec_mult, &amp;cursorb_dl)) {</div><div class='add'>+		cursorb_prec = (cursor_prec_mult == DRAIN_LATENCY_PRECISION_32) ?</div><div class='add'>+			DDL_CURSORB_PRECISION_32 : DDL_CURSORB_PRECISION_16;</div><div class='add'>+		planeb_prec = (plane_prec_mult == DRAIN_LATENCY_PRECISION_32) ?</div><div class='add'>+			DDL_PLANEB_PRECISION_32 : DDL_PLANEB_PRECISION_16;</div><div class='add'>+</div><div class='add'>+		I915_WRITE(VLV_DDL2, cursorb_prec |</div><div class='add'>+				(cursorb_dl &lt;&lt; DDL_CURSORB_SHIFT) |</div><div class='add'>+				planeb_prec | planeb_dl);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define single_plane_enabled(mask) is_power_of_2(mask)</div><div class='add'>+</div><div class='add'>+static void valleyview_update_wm(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	static const int sr_latency_ns = 12000;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int planea_wm, planeb_wm, cursora_wm, cursorb_wm;</div><div class='add'>+	int plane_sr, cursor_sr;</div><div class='add'>+	unsigned int enabled = 0;</div><div class='add'>+</div><div class='add'>+	vlv_update_drain_latency(dev);</div><div class='add'>+</div><div class='add'>+	if (g4x_compute_wm0(dev, 0,</div><div class='add'>+			    &amp;valleyview_wm_info, latency_ns,</div><div class='add'>+			    &amp;valleyview_cursor_wm_info, latency_ns,</div><div class='add'>+			    &amp;planea_wm, &amp;cursora_wm))</div><div class='add'>+		enabled |= 1;</div><div class='add'>+</div><div class='add'>+	if (g4x_compute_wm0(dev, 1,</div><div class='add'>+			    &amp;valleyview_wm_info, latency_ns,</div><div class='add'>+			    &amp;valleyview_cursor_wm_info, latency_ns,</div><div class='add'>+			    &amp;planeb_wm, &amp;cursorb_wm))</div><div class='add'>+		enabled |= 2;</div><div class='add'>+</div><div class='add'>+	plane_sr = cursor_sr = 0;</div><div class='add'>+	if (single_plane_enabled(enabled) &amp;&amp;</div><div class='add'>+	    g4x_compute_srwm(dev, ffs(enabled) - 1,</div><div class='add'>+			     sr_latency_ns,</div><div class='add'>+			     &amp;valleyview_wm_info,</div><div class='add'>+			     &amp;valleyview_cursor_wm_info,</div><div class='add'>+			     &amp;plane_sr, &amp;cursor_sr))</div><div class='add'>+		I915_WRITE(FW_BLC_SELF_VLV, FW_CSPWRDWNEN);</div><div class='add'>+	else</div><div class='add'>+		I915_WRITE(FW_BLC_SELF_VLV,</div><div class='add'>+			   I915_READ(FW_BLC_SELF_VLV) &amp; ~FW_CSPWRDWNEN);</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("Setting FIFO watermarks - A: plane=%d, cursor=%d, B: plane=%d, cursor=%d, SR: plane=%d, cursor=%d\n",</div><div class='add'>+		      planea_wm, cursora_wm,</div><div class='add'>+		      planeb_wm, cursorb_wm,</div><div class='add'>+		      plane_sr, cursor_sr);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(DSPFW1,</div><div class='add'>+		   (plane_sr &lt;&lt; DSPFW_SR_SHIFT) |</div><div class='add'>+		   (cursorb_wm &lt;&lt; DSPFW_CURSORB_SHIFT) |</div><div class='add'>+		   (planeb_wm &lt;&lt; DSPFW_PLANEB_SHIFT) |</div><div class='add'>+		   planea_wm);</div><div class='add'>+	I915_WRITE(DSPFW2,</div><div class='add'>+		   (I915_READ(DSPFW2) &amp; DSPFW_CURSORA_MASK) |</div><div class='add'>+		   (cursora_wm &lt;&lt; DSPFW_CURSORA_SHIFT));</div><div class='add'>+	I915_WRITE(DSPFW3,</div><div class='add'>+		   (I915_READ(DSPFW3) | (cursor_sr &lt;&lt; DSPFW_CURSOR_SR_SHIFT)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g4x_update_wm(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	static const int sr_latency_ns = 12000;</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int planea_wm, planeb_wm, cursora_wm, cursorb_wm;</div><div class='add'>+	int plane_sr, cursor_sr;</div><div class='add'>+	unsigned int enabled = 0;</div><div class='add'>+</div><div class='add'>+	if (g4x_compute_wm0(dev, 0,</div><div class='add'>+			    &amp;g4x_wm_info, latency_ns,</div><div class='add'>+			    &amp;g4x_cursor_wm_info, latency_ns,</div><div class='add'>+			    &amp;planea_wm, &amp;cursora_wm))</div><div class='add'>+		enabled |= 1;</div><div class='add'>+</div><div class='add'>+	if (g4x_compute_wm0(dev, 1,</div><div class='add'>+			    &amp;g4x_wm_info, latency_ns,</div><div class='add'>+			    &amp;g4x_cursor_wm_info, latency_ns,</div><div class='add'>+			    &amp;planeb_wm, &amp;cursorb_wm))</div><div class='add'>+		enabled |= 2;</div><div class='add'>+</div><div class='add'>+	plane_sr = cursor_sr = 0;</div><div class='add'>+	if (single_plane_enabled(enabled) &amp;&amp;</div><div class='add'>+	    g4x_compute_srwm(dev, ffs(enabled) - 1,</div><div class='add'>+			     sr_latency_ns,</div><div class='add'>+			     &amp;g4x_wm_info,</div><div class='add'>+			     &amp;g4x_cursor_wm_info,</div><div class='add'>+			     &amp;plane_sr, &amp;cursor_sr))</div><div class='add'>+		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);</div><div class='add'>+	else</div><div class='add'>+		I915_WRITE(FW_BLC_SELF,</div><div class='add'>+			   I915_READ(FW_BLC_SELF) &amp; ~FW_BLC_SELF_EN);</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("Setting FIFO watermarks - A: plane=%d, cursor=%d, B: plane=%d, cursor=%d, SR: plane=%d, cursor=%d\n",</div><div class='add'>+		      planea_wm, cursora_wm,</div><div class='add'>+		      planeb_wm, cursorb_wm,</div><div class='add'>+		      plane_sr, cursor_sr);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(DSPFW1,</div><div class='add'>+		   (plane_sr &lt;&lt; DSPFW_SR_SHIFT) |</div><div class='add'>+		   (cursorb_wm &lt;&lt; DSPFW_CURSORB_SHIFT) |</div><div class='add'>+		   (planeb_wm &lt;&lt; DSPFW_PLANEB_SHIFT) |</div><div class='add'>+		   planea_wm);</div><div class='add'>+	I915_WRITE(DSPFW2,</div><div class='add'>+		   (I915_READ(DSPFW2) &amp; DSPFW_CURSORA_MASK) |</div><div class='add'>+		   (cursora_wm &lt;&lt; DSPFW_CURSORA_SHIFT));</div><div class='add'>+	/* HPLL off in SR has some issues on G4x... disable it */</div><div class='add'>+	I915_WRITE(DSPFW3,</div><div class='add'>+		   (I915_READ(DSPFW3) &amp; ~DSPFW_HPLL_SR_EN) |</div><div class='add'>+		   (cursor_sr &lt;&lt; DSPFW_CURSOR_SR_SHIFT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i965_update_wm(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct drm_crtc *crtc;</div><div class='add'>+	int srwm = 1;</div><div class='add'>+	int cursor_sr = 16;</div><div class='add'>+</div><div class='add'>+	/* Calc sr entries for one plane configs */</div><div class='add'>+	crtc = single_enabled_crtc(dev);</div><div class='add'>+	if (crtc) {</div><div class='add'>+		/* self-refresh has much higher latency */</div><div class='add'>+		static const int sr_latency_ns = 12000;</div><div class='add'>+		int clock = crtc-&gt;mode.clock;</div><div class='add'>+		int htotal = crtc-&gt;mode.htotal;</div><div class='add'>+		int hdisplay = crtc-&gt;mode.hdisplay;</div><div class='add'>+		int pixel_size = crtc-&gt;fb-&gt;bits_per_pixel / 8;</div><div class='add'>+		unsigned long line_time_us;</div><div class='add'>+		int entries;</div><div class='add'>+</div><div class='add'>+		line_time_us = ((htotal * 1000) / clock);</div><div class='add'>+</div><div class='add'>+		/* Use ns/us then divide to preserve precision */</div><div class='add'>+		entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *</div><div class='add'>+			pixel_size * hdisplay;</div><div class='add'>+		entries = DIV_ROUND_UP(entries, I915_FIFO_LINE_SIZE);</div><div class='add'>+		srwm = I965_FIFO_SIZE - entries;</div><div class='add'>+		if (srwm &lt; 0)</div><div class='add'>+			srwm = 1;</div><div class='add'>+		srwm &amp;= 0x1ff;</div><div class='add'>+		DRM_DEBUG_KMS("self-refresh entries: %d, wm: %d\n",</div><div class='add'>+			      entries, srwm);</div><div class='add'>+</div><div class='add'>+		entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *</div><div class='add'>+			pixel_size * 64;</div><div class='add'>+		entries = DIV_ROUND_UP(entries,</div><div class='add'>+					  i965_cursor_wm_info.cacheline_size);</div><div class='add'>+		cursor_sr = i965_cursor_wm_info.fifo_size -</div><div class='add'>+			(entries + i965_cursor_wm_info.guard_size);</div><div class='add'>+</div><div class='add'>+		if (cursor_sr &gt; i965_cursor_wm_info.max_wm)</div><div class='add'>+			cursor_sr = i965_cursor_wm_info.max_wm;</div><div class='add'>+</div><div class='add'>+		DRM_DEBUG_KMS("self-refresh watermark: display plane %d "</div><div class='add'>+			      "cursor %d\n", srwm, cursor_sr);</div><div class='add'>+</div><div class='add'>+		if (IS_CRESTLINE(dev))</div><div class='add'>+			I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);</div><div class='add'>+	} else {</div><div class='add'>+		/* Turn off self refresh if both pipes are enabled */</div><div class='add'>+		if (IS_CRESTLINE(dev))</div><div class='add'>+			I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)</div><div class='add'>+				   &amp; ~FW_BLC_SELF_EN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n",</div><div class='add'>+		      srwm);</div><div class='add'>+</div><div class='add'>+	/* 965 has limitations... */</div><div class='add'>+	I915_WRITE(DSPFW1, (srwm &lt;&lt; DSPFW_SR_SHIFT) |</div><div class='add'>+		   (8 &lt;&lt; 16) | (8 &lt;&lt; 8) | (8 &lt;&lt; 0));</div><div class='add'>+	I915_WRITE(DSPFW2, (8 &lt;&lt; 8) | (8 &lt;&lt; 0));</div><div class='add'>+	/* update cursor SR watermark */</div><div class='add'>+	I915_WRITE(DSPFW3, (cursor_sr &lt;&lt; DSPFW_CURSOR_SR_SHIFT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i9xx_update_wm(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	const struct intel_watermark_params *wm_info;</div><div class='add'>+	uint32_t fwater_lo;</div><div class='add'>+	uint32_t fwater_hi;</div><div class='add'>+	int cwm, srwm = 1;</div><div class='add'>+	int fifo_size;</div><div class='add'>+	int planea_wm, planeb_wm;</div><div class='add'>+	struct drm_crtc *crtc, *enabled = NULL;</div><div class='add'>+</div><div class='add'>+	if (IS_I945GM(dev))</div><div class='add'>+		wm_info = &amp;i945_wm_info;</div><div class='add'>+	else if (!IS_GEN2(dev))</div><div class='add'>+		wm_info = &amp;i915_wm_info;</div><div class='add'>+	else</div><div class='add'>+		wm_info = &amp;i855_wm_info;</div><div class='add'>+</div><div class='add'>+	fifo_size = dev_priv-&gt;display.get_fifo_size(dev, 0);</div><div class='add'>+	crtc = intel_get_crtc_for_plane(dev, 0);</div><div class='add'>+	if (crtc-&gt;enabled &amp;&amp; crtc-&gt;fb) {</div><div class='add'>+		planea_wm = intel_calculate_wm(crtc-&gt;mode.clock,</div><div class='add'>+					       wm_info, fifo_size,</div><div class='add'>+					       crtc-&gt;fb-&gt;bits_per_pixel / 8,</div><div class='add'>+					       latency_ns);</div><div class='add'>+		enabled = crtc;</div><div class='add'>+	} else</div><div class='add'>+		planea_wm = fifo_size - wm_info-&gt;guard_size;</div><div class='add'>+</div><div class='add'>+	fifo_size = dev_priv-&gt;display.get_fifo_size(dev, 1);</div><div class='add'>+	crtc = intel_get_crtc_for_plane(dev, 1);</div><div class='add'>+	if (crtc-&gt;enabled &amp;&amp; crtc-&gt;fb) {</div><div class='add'>+		planeb_wm = intel_calculate_wm(crtc-&gt;mode.clock,</div><div class='add'>+					       wm_info, fifo_size,</div><div class='add'>+					       crtc-&gt;fb-&gt;bits_per_pixel / 8,</div><div class='add'>+					       latency_ns);</div><div class='add'>+		if (enabled == NULL)</div><div class='add'>+			enabled = crtc;</div><div class='add'>+		else</div><div class='add'>+			enabled = NULL;</div><div class='add'>+	} else</div><div class='add'>+		planeb_wm = fifo_size - wm_info-&gt;guard_size;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Overlay gets an aggressive default since video jitter is bad.</div><div class='add'>+	 */</div><div class='add'>+	cwm = 2;</div><div class='add'>+</div><div class='add'>+	/* Play safe and disable self-refresh before adjusting watermarks. */</div><div class='add'>+	if (IS_I945G(dev) || IS_I945GM(dev))</div><div class='add'>+		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN_MASK | 0);</div><div class='add'>+	else if (IS_I915GM(dev))</div><div class='add'>+		I915_WRITE(INSTPM, I915_READ(INSTPM) &amp; ~INSTPM_SELF_EN);</div><div class='add'>+</div><div class='add'>+	/* Calc sr entries for one plane configs */</div><div class='add'>+	if (HAS_FW_BLC(dev) &amp;&amp; enabled) {</div><div class='add'>+		/* self-refresh has much higher latency */</div><div class='add'>+		static const int sr_latency_ns = 6000;</div><div class='add'>+		int clock = enabled-&gt;mode.clock;</div><div class='add'>+		int htotal = enabled-&gt;mode.htotal;</div><div class='add'>+		int hdisplay = enabled-&gt;mode.hdisplay;</div><div class='add'>+		int pixel_size = enabled-&gt;fb-&gt;bits_per_pixel / 8;</div><div class='add'>+		unsigned long line_time_us;</div><div class='add'>+		int entries;</div><div class='add'>+</div><div class='add'>+		line_time_us = (htotal * 1000) / clock;</div><div class='add'>+</div><div class='add'>+		/* Use ns/us then divide to preserve precision */</div><div class='add'>+		entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *</div><div class='add'>+			pixel_size * hdisplay;</div><div class='add'>+		entries = DIV_ROUND_UP(entries, wm_info-&gt;cacheline_size);</div><div class='add'>+		DRM_DEBUG_KMS("self-refresh entries: %d\n", entries);</div><div class='add'>+		srwm = wm_info-&gt;fifo_size - entries;</div><div class='add'>+		if (srwm &lt; 0)</div><div class='add'>+			srwm = 1;</div><div class='add'>+</div><div class='add'>+		if (IS_I945G(dev) || IS_I945GM(dev))</div><div class='add'>+			I915_WRITE(FW_BLC_SELF,</div><div class='add'>+				   FW_BLC_SELF_FIFO_MASK | (srwm &amp; 0xff));</div><div class='add'>+		else if (IS_I915GM(dev))</div><div class='add'>+			I915_WRITE(FW_BLC_SELF, srwm &amp; 0x3f);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n",</div><div class='add'>+		      planea_wm, planeb_wm, cwm, srwm);</div><div class='add'>+</div><div class='add'>+	fwater_lo = ((planeb_wm &amp; 0x3f) &lt;&lt; 16) | (planea_wm &amp; 0x3f);</div><div class='add'>+	fwater_hi = (cwm &amp; 0x1f);</div><div class='add'>+</div><div class='add'>+	/* Set request length to 8 cachelines per fetch */</div><div class='add'>+	fwater_lo = fwater_lo | (1 &lt;&lt; 24) | (1 &lt;&lt; 8);</div><div class='add'>+	fwater_hi = fwater_hi | (1 &lt;&lt; 8);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(FW_BLC, fwater_lo);</div><div class='add'>+	I915_WRITE(FW_BLC2, fwater_hi);</div><div class='add'>+</div><div class='add'>+	if (HAS_FW_BLC(dev)) {</div><div class='add'>+		if (enabled) {</div><div class='add'>+			if (IS_I945G(dev) || IS_I945GM(dev))</div><div class='add'>+				I915_WRITE(FW_BLC_SELF,</div><div class='add'>+					   FW_BLC_SELF_EN_MASK | FW_BLC_SELF_EN);</div><div class='add'>+			else if (IS_I915GM(dev))</div><div class='add'>+				I915_WRITE(INSTPM, I915_READ(INSTPM) | INSTPM_SELF_EN);</div><div class='add'>+			DRM_DEBUG_KMS("memory self refresh enabled\n");</div><div class='add'>+		} else</div><div class='add'>+			DRM_DEBUG_KMS("memory self refresh disabled\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i830_update_wm(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct drm_crtc *crtc;</div><div class='add'>+	uint32_t fwater_lo;</div><div class='add'>+	int planea_wm;</div><div class='add'>+</div><div class='add'>+	crtc = single_enabled_crtc(dev);</div><div class='add'>+	if (crtc == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	planea_wm = intel_calculate_wm(crtc-&gt;mode.clock, &amp;i830_wm_info,</div><div class='add'>+				       dev_priv-&gt;display.get_fifo_size(dev, 0),</div><div class='add'>+				       crtc-&gt;fb-&gt;bits_per_pixel / 8,</div><div class='add'>+				       latency_ns);</div><div class='add'>+	fwater_lo = I915_READ(FW_BLC) &amp; ~0xfff;</div><div class='add'>+	fwater_lo |= (3&lt;&lt;8) | planea_wm;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d\n", planea_wm);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(FW_BLC, fwater_lo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ILK_LP0_PLANE_LATENCY		700</div><div class='add'>+#define ILK_LP0_CURSOR_LATENCY		1300</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Check the wm result.</div><div class='add'>+ *</div><div class='add'>+ * If any calculated watermark values is larger than the maximum value that</div><div class='add'>+ * can be programmed into the associated watermark register, that watermark</div><div class='add'>+ * must be disabled.</div><div class='add'>+ */</div><div class='add'>+static bool ironlake_check_srwm(struct drm_device *dev, int level,</div><div class='add'>+				int fbc_wm, int display_wm, int cursor_wm,</div><div class='add'>+				const struct intel_watermark_params *display,</div><div class='add'>+				const struct intel_watermark_params *cursor)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("watermark %d: display plane %d, fbc lines %d,"</div><div class='add'>+		      " cursor %d\n", level, display_wm, fbc_wm, cursor_wm);</div><div class='add'>+</div><div class='add'>+	if (fbc_wm &gt; SNB_FBC_MAX_SRWM) {</div><div class='add'>+		DRM_DEBUG_KMS("fbc watermark(%d) is too large(%d), disabling wm%d+\n",</div><div class='add'>+			      fbc_wm, SNB_FBC_MAX_SRWM, level);</div><div class='add'>+</div><div class='add'>+		/* fbc has it's own way to disable FBC WM */</div><div class='add'>+		I915_WRITE(DISP_ARB_CTL,</div><div class='add'>+			   I915_READ(DISP_ARB_CTL) | DISP_FBC_WM_DIS);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (display_wm &gt; display-&gt;max_wm) {</div><div class='add'>+		DRM_DEBUG_KMS("display watermark(%d) is too large(%d), disabling wm%d+\n",</div><div class='add'>+			      display_wm, SNB_DISPLAY_MAX_SRWM, level);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cursor_wm &gt; cursor-&gt;max_wm) {</div><div class='add'>+		DRM_DEBUG_KMS("cursor watermark(%d) is too large(%d), disabling wm%d+\n",</div><div class='add'>+			      cursor_wm, SNB_CURSOR_MAX_SRWM, level);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(fbc_wm || display_wm || cursor_wm)) {</div><div class='add'>+		DRM_DEBUG_KMS("latency %d is 0, disabling wm%d+\n", level, level);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Compute watermark values of WM[1-3],</div><div class='add'>+ */</div><div class='add'>+static bool ironlake_compute_srwm(struct drm_device *dev, int level, int plane,</div><div class='add'>+				  int latency_ns,</div><div class='add'>+				  const struct intel_watermark_params *display,</div><div class='add'>+				  const struct intel_watermark_params *cursor,</div><div class='add'>+				  int *fbc_wm, int *display_wm, int *cursor_wm)</div><div class='add'>+{</div><div class='add'>+	struct drm_crtc *crtc;</div><div class='add'>+	unsigned long line_time_us;</div><div class='add'>+	int hdisplay, htotal, pixel_size, clock;</div><div class='add'>+	int line_count, line_size;</div><div class='add'>+	int small, large;</div><div class='add'>+	int entries;</div><div class='add'>+</div><div class='add'>+	if (!latency_ns) {</div><div class='add'>+		*fbc_wm = *display_wm = *cursor_wm = 0;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	crtc = intel_get_crtc_for_plane(dev, plane);</div><div class='add'>+	hdisplay = crtc-&gt;mode.hdisplay;</div><div class='add'>+	htotal = crtc-&gt;mode.htotal;</div><div class='add'>+	clock = crtc-&gt;mode.clock;</div><div class='add'>+	pixel_size = crtc-&gt;fb-&gt;bits_per_pixel / 8;</div><div class='add'>+</div><div class='add'>+	line_time_us = (htotal * 1000) / clock;</div><div class='add'>+	line_count = (latency_ns / line_time_us + 1000) / 1000;</div><div class='add'>+	line_size = hdisplay * pixel_size;</div><div class='add'>+</div><div class='add'>+	/* Use the minimum of the small and large buffer method for primary */</div><div class='add'>+	small = ((clock * pixel_size / 1000) * latency_ns) / 1000;</div><div class='add'>+	large = line_count * line_size;</div><div class='add'>+</div><div class='add'>+	entries = DIV_ROUND_UP(min(small, large), display-&gt;cacheline_size);</div><div class='add'>+	*display_wm = entries + display-&gt;guard_size;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Spec says:</div><div class='add'>+	 * FBC WM = ((Final Primary WM * 64) / number of bytes per line) + 2</div><div class='add'>+	 */</div><div class='add'>+	*fbc_wm = DIV_ROUND_UP(*display_wm * 64, line_size) + 2;</div><div class='add'>+</div><div class='add'>+	/* calculate the self-refresh watermark for display cursor */</div><div class='add'>+	entries = line_count * pixel_size * 64;</div><div class='add'>+	entries = DIV_ROUND_UP(entries, cursor-&gt;cacheline_size);</div><div class='add'>+	*cursor_wm = entries + cursor-&gt;guard_size;</div><div class='add'>+</div><div class='add'>+	return ironlake_check_srwm(dev, level,</div><div class='add'>+				   *fbc_wm, *display_wm, *cursor_wm,</div><div class='add'>+				   display, cursor);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ironlake_update_wm(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int fbc_wm, plane_wm, cursor_wm;</div><div class='add'>+	unsigned int enabled;</div><div class='add'>+</div><div class='add'>+	enabled = 0;</div><div class='add'>+	if (g4x_compute_wm0(dev, 0,</div><div class='add'>+			    &amp;ironlake_display_wm_info,</div><div class='add'>+			    ILK_LP0_PLANE_LATENCY,</div><div class='add'>+			    &amp;ironlake_cursor_wm_info,</div><div class='add'>+			    ILK_LP0_CURSOR_LATENCY,</div><div class='add'>+			    &amp;plane_wm, &amp;cursor_wm)) {</div><div class='add'>+		I915_WRITE(WM0_PIPEA_ILK,</div><div class='add'>+			   (plane_wm &lt;&lt; WM0_PIPE_PLANE_SHIFT) | cursor_wm);</div><div class='add'>+		DRM_DEBUG_KMS("FIFO watermarks For pipe A -"</div><div class='add'>+			      " plane %d, " "cursor: %d\n",</div><div class='add'>+			      plane_wm, cursor_wm);</div><div class='add'>+		enabled |= 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (g4x_compute_wm0(dev, 1,</div><div class='add'>+			    &amp;ironlake_display_wm_info,</div><div class='add'>+			    ILK_LP0_PLANE_LATENCY,</div><div class='add'>+			    &amp;ironlake_cursor_wm_info,</div><div class='add'>+			    ILK_LP0_CURSOR_LATENCY,</div><div class='add'>+			    &amp;plane_wm, &amp;cursor_wm)) {</div><div class='add'>+		I915_WRITE(WM0_PIPEB_ILK,</div><div class='add'>+			   (plane_wm &lt;&lt; WM0_PIPE_PLANE_SHIFT) | cursor_wm);</div><div class='add'>+		DRM_DEBUG_KMS("FIFO watermarks For pipe B -"</div><div class='add'>+			      " plane %d, cursor: %d\n",</div><div class='add'>+			      plane_wm, cursor_wm);</div><div class='add'>+		enabled |= 2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Calculate and update the self-refresh watermark only when one</div><div class='add'>+	 * display plane is used.</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(WM3_LP_ILK, 0);</div><div class='add'>+	I915_WRITE(WM2_LP_ILK, 0);</div><div class='add'>+	I915_WRITE(WM1_LP_ILK, 0);</div><div class='add'>+</div><div class='add'>+	if (!single_plane_enabled(enabled))</div><div class='add'>+		return;</div><div class='add'>+	enabled = ffs(enabled) - 1;</div><div class='add'>+</div><div class='add'>+	/* WM1 */</div><div class='add'>+	if (!ironlake_compute_srwm(dev, 1, enabled,</div><div class='add'>+				   ILK_READ_WM1_LATENCY() * 500,</div><div class='add'>+				   &amp;ironlake_display_srwm_info,</div><div class='add'>+				   &amp;ironlake_cursor_srwm_info,</div><div class='add'>+				   &amp;fbc_wm, &amp;plane_wm, &amp;cursor_wm))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(WM1_LP_ILK,</div><div class='add'>+		   WM1_LP_SR_EN |</div><div class='add'>+		   (ILK_READ_WM1_LATENCY() &lt;&lt; WM1_LP_LATENCY_SHIFT) |</div><div class='add'>+		   (fbc_wm &lt;&lt; WM1_LP_FBC_SHIFT) |</div><div class='add'>+		   (plane_wm &lt;&lt; WM1_LP_SR_SHIFT) |</div><div class='add'>+		   cursor_wm);</div><div class='add'>+</div><div class='add'>+	/* WM2 */</div><div class='add'>+	if (!ironlake_compute_srwm(dev, 2, enabled,</div><div class='add'>+				   ILK_READ_WM2_LATENCY() * 500,</div><div class='add'>+				   &amp;ironlake_display_srwm_info,</div><div class='add'>+				   &amp;ironlake_cursor_srwm_info,</div><div class='add'>+				   &amp;fbc_wm, &amp;plane_wm, &amp;cursor_wm))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(WM2_LP_ILK,</div><div class='add'>+		   WM2_LP_EN |</div><div class='add'>+		   (ILK_READ_WM2_LATENCY() &lt;&lt; WM1_LP_LATENCY_SHIFT) |</div><div class='add'>+		   (fbc_wm &lt;&lt; WM1_LP_FBC_SHIFT) |</div><div class='add'>+		   (plane_wm &lt;&lt; WM1_LP_SR_SHIFT) |</div><div class='add'>+		   cursor_wm);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * WM3 is unsupported on ILK, probably because we don't have latency</div><div class='add'>+	 * data for that power state</div><div class='add'>+	 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sandybridge_update_wm(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int latency = SNB_READ_WM0_LATENCY() * 100;	/* In unit 0.1us */</div><div class='add'>+	u32 val;</div><div class='add'>+	int fbc_wm, plane_wm, cursor_wm;</div><div class='add'>+	unsigned int enabled;</div><div class='add'>+</div><div class='add'>+	enabled = 0;</div><div class='add'>+	if (g4x_compute_wm0(dev, 0,</div><div class='add'>+			    &amp;sandybridge_display_wm_info, latency,</div><div class='add'>+			    &amp;sandybridge_cursor_wm_info, latency,</div><div class='add'>+			    &amp;plane_wm, &amp;cursor_wm)) {</div><div class='add'>+		val = I915_READ(WM0_PIPEA_ILK);</div><div class='add'>+		val &amp;= ~(WM0_PIPE_PLANE_MASK | WM0_PIPE_CURSOR_MASK);</div><div class='add'>+		I915_WRITE(WM0_PIPEA_ILK, val |</div><div class='add'>+			   ((plane_wm &lt;&lt; WM0_PIPE_PLANE_SHIFT) | cursor_wm));</div><div class='add'>+		DRM_DEBUG_KMS("FIFO watermarks For pipe A -"</div><div class='add'>+			      " plane %d, " "cursor: %d\n",</div><div class='add'>+			      plane_wm, cursor_wm);</div><div class='add'>+		enabled |= 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (g4x_compute_wm0(dev, 1,</div><div class='add'>+			    &amp;sandybridge_display_wm_info, latency,</div><div class='add'>+			    &amp;sandybridge_cursor_wm_info, latency,</div><div class='add'>+			    &amp;plane_wm, &amp;cursor_wm)) {</div><div class='add'>+		val = I915_READ(WM0_PIPEB_ILK);</div><div class='add'>+		val &amp;= ~(WM0_PIPE_PLANE_MASK | WM0_PIPE_CURSOR_MASK);</div><div class='add'>+		I915_WRITE(WM0_PIPEB_ILK, val |</div><div class='add'>+			   ((plane_wm &lt;&lt; WM0_PIPE_PLANE_SHIFT) | cursor_wm));</div><div class='add'>+		DRM_DEBUG_KMS("FIFO watermarks For pipe B -"</div><div class='add'>+			      " plane %d, cursor: %d\n",</div><div class='add'>+			      plane_wm, cursor_wm);</div><div class='add'>+		enabled |= 2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((dev_priv-&gt;num_pipe == 3) &amp;&amp;</div><div class='add'>+	    g4x_compute_wm0(dev, 2,</div><div class='add'>+			    &amp;sandybridge_display_wm_info, latency,</div><div class='add'>+			    &amp;sandybridge_cursor_wm_info, latency,</div><div class='add'>+			    &amp;plane_wm, &amp;cursor_wm)) {</div><div class='add'>+		val = I915_READ(WM0_PIPEC_IVB);</div><div class='add'>+		val &amp;= ~(WM0_PIPE_PLANE_MASK | WM0_PIPE_CURSOR_MASK);</div><div class='add'>+		I915_WRITE(WM0_PIPEC_IVB, val |</div><div class='add'>+			   ((plane_wm &lt;&lt; WM0_PIPE_PLANE_SHIFT) | cursor_wm));</div><div class='add'>+		DRM_DEBUG_KMS("FIFO watermarks For pipe C -"</div><div class='add'>+			      " plane %d, cursor: %d\n",</div><div class='add'>+			      plane_wm, cursor_wm);</div><div class='add'>+		enabled |= 3;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Calculate and update the self-refresh watermark only when one</div><div class='add'>+	 * display plane is used.</div><div class='add'>+	 *</div><div class='add'>+	 * SNB support 3 levels of watermark.</div><div class='add'>+	 *</div><div class='add'>+	 * WM1/WM2/WM2 watermarks have to be enabled in the ascending order,</div><div class='add'>+	 * and disabled in the descending order</div><div class='add'>+	 *</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(WM3_LP_ILK, 0);</div><div class='add'>+	I915_WRITE(WM2_LP_ILK, 0);</div><div class='add'>+	I915_WRITE(WM1_LP_ILK, 0);</div><div class='add'>+</div><div class='add'>+	if (!single_plane_enabled(enabled) ||</div><div class='add'>+	    dev_priv-&gt;sprite_scaling_enabled)</div><div class='add'>+		return;</div><div class='add'>+	enabled = ffs(enabled) - 1;</div><div class='add'>+</div><div class='add'>+	/* WM1 */</div><div class='add'>+	if (!ironlake_compute_srwm(dev, 1, enabled,</div><div class='add'>+				   SNB_READ_WM1_LATENCY() * 500,</div><div class='add'>+				   &amp;sandybridge_display_srwm_info,</div><div class='add'>+				   &amp;sandybridge_cursor_srwm_info,</div><div class='add'>+				   &amp;fbc_wm, &amp;plane_wm, &amp;cursor_wm))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(WM1_LP_ILK,</div><div class='add'>+		   WM1_LP_SR_EN |</div><div class='add'>+		   (SNB_READ_WM1_LATENCY() &lt;&lt; WM1_LP_LATENCY_SHIFT) |</div><div class='add'>+		   (fbc_wm &lt;&lt; WM1_LP_FBC_SHIFT) |</div><div class='add'>+		   (plane_wm &lt;&lt; WM1_LP_SR_SHIFT) |</div><div class='add'>+		   cursor_wm);</div><div class='add'>+</div><div class='add'>+	/* WM2 */</div><div class='add'>+	if (!ironlake_compute_srwm(dev, 2, enabled,</div><div class='add'>+				   SNB_READ_WM2_LATENCY() * 500,</div><div class='add'>+				   &amp;sandybridge_display_srwm_info,</div><div class='add'>+				   &amp;sandybridge_cursor_srwm_info,</div><div class='add'>+				   &amp;fbc_wm, &amp;plane_wm, &amp;cursor_wm))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(WM2_LP_ILK,</div><div class='add'>+		   WM2_LP_EN |</div><div class='add'>+		   (SNB_READ_WM2_LATENCY() &lt;&lt; WM1_LP_LATENCY_SHIFT) |</div><div class='add'>+		   (fbc_wm &lt;&lt; WM1_LP_FBC_SHIFT) |</div><div class='add'>+		   (plane_wm &lt;&lt; WM1_LP_SR_SHIFT) |</div><div class='add'>+		   cursor_wm);</div><div class='add'>+</div><div class='add'>+	/* WM3 */</div><div class='add'>+	if (!ironlake_compute_srwm(dev, 3, enabled,</div><div class='add'>+				   SNB_READ_WM3_LATENCY() * 500,</div><div class='add'>+				   &amp;sandybridge_display_srwm_info,</div><div class='add'>+				   &amp;sandybridge_cursor_srwm_info,</div><div class='add'>+				   &amp;fbc_wm, &amp;plane_wm, &amp;cursor_wm))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(WM3_LP_ILK,</div><div class='add'>+		   WM3_LP_EN |</div><div class='add'>+		   (SNB_READ_WM3_LATENCY() &lt;&lt; WM1_LP_LATENCY_SHIFT) |</div><div class='add'>+		   (fbc_wm &lt;&lt; WM1_LP_FBC_SHIFT) |</div><div class='add'>+		   (plane_wm &lt;&lt; WM1_LP_SR_SHIFT) |</div><div class='add'>+		   cursor_wm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+haswell_update_linetime_wm(struct drm_device *dev, int pipe,</div><div class='add'>+				 struct drm_display_mode *mode)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 temp;</div><div class='add'>+</div><div class='add'>+	temp = I915_READ(PIPE_WM_LINETIME(pipe));</div><div class='add'>+	temp &amp;= ~PIPE_WM_LINETIME_MASK;</div><div class='add'>+</div><div class='add'>+	/* The WM are computed with base on how long it takes to fill a single</div><div class='add'>+	 * row at the given clock rate, multiplied by 8.</div><div class='add'>+	 * */</div><div class='add'>+	temp |= PIPE_WM_LINETIME_TIME(</div><div class='add'>+		((mode-&gt;crtc_hdisplay * 1000) / mode-&gt;clock) * 8);</div><div class='add'>+</div><div class='add'>+	/* IPS watermarks are only used by pipe A, and are ignored by</div><div class='add'>+	 * pipes B and C.  They are calculated similarly to the common</div><div class='add'>+	 * linetime values, except that we are using CD clock frequency</div><div class='add'>+	 * in MHz instead of pixel rate for the division.</div><div class='add'>+	 *</div><div class='add'>+	 * This is a placeholder for the IPS watermark calculation code.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	I915_WRITE(PIPE_WM_LINETIME(pipe), temp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+sandybridge_compute_sprite_wm(struct drm_device *dev, int plane,</div><div class='add'>+			      uint32_t sprite_width, int pixel_size,</div><div class='add'>+			      const struct intel_watermark_params *display,</div><div class='add'>+			      int display_latency_ns, int *sprite_wm)</div><div class='add'>+{</div><div class='add'>+	struct drm_crtc *crtc;</div><div class='add'>+	int clock;</div><div class='add'>+	int entries, tlb_miss;</div><div class='add'>+</div><div class='add'>+	crtc = intel_get_crtc_for_plane(dev, plane);</div><div class='add'>+	if (crtc-&gt;fb == NULL || !crtc-&gt;enabled) {</div><div class='add'>+		*sprite_wm = display-&gt;guard_size;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clock = crtc-&gt;mode.clock;</div><div class='add'>+</div><div class='add'>+	/* Use the small buffer method to calculate the sprite watermark */</div><div class='add'>+	entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000;</div><div class='add'>+	tlb_miss = display-&gt;fifo_size*display-&gt;cacheline_size -</div><div class='add'>+		sprite_width * 8;</div><div class='add'>+	if (tlb_miss &gt; 0)</div><div class='add'>+		entries += tlb_miss;</div><div class='add'>+	entries = DIV_ROUND_UP(entries, display-&gt;cacheline_size);</div><div class='add'>+	*sprite_wm = entries + display-&gt;guard_size;</div><div class='add'>+	if (*sprite_wm &gt; (int)display-&gt;max_wm)</div><div class='add'>+		*sprite_wm = display-&gt;max_wm;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane,</div><div class='add'>+				uint32_t sprite_width, int pixel_size,</div><div class='add'>+				const struct intel_watermark_params *display,</div><div class='add'>+				int latency_ns, int *sprite_wm)</div><div class='add'>+{</div><div class='add'>+	struct drm_crtc *crtc;</div><div class='add'>+	unsigned long line_time_us;</div><div class='add'>+	int clock;</div><div class='add'>+	int line_count, line_size;</div><div class='add'>+	int small, large;</div><div class='add'>+	int entries;</div><div class='add'>+</div><div class='add'>+	if (!latency_ns) {</div><div class='add'>+		*sprite_wm = 0;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	crtc = intel_get_crtc_for_plane(dev, plane);</div><div class='add'>+	clock = crtc-&gt;mode.clock;</div><div class='add'>+	if (!clock) {</div><div class='add'>+		*sprite_wm = 0;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	line_time_us = (sprite_width * 1000) / clock;</div><div class='add'>+	if (!line_time_us) {</div><div class='add'>+		*sprite_wm = 0;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	line_count = (latency_ns / line_time_us + 1000) / 1000;</div><div class='add'>+	line_size = sprite_width * pixel_size;</div><div class='add'>+</div><div class='add'>+	/* Use the minimum of the small and large buffer method for primary */</div><div class='add'>+	small = ((clock * pixel_size / 1000) * latency_ns) / 1000;</div><div class='add'>+	large = line_count * line_size;</div><div class='add'>+</div><div class='add'>+	entries = DIV_ROUND_UP(min(small, large), display-&gt;cacheline_size);</div><div class='add'>+	*sprite_wm = entries + display-&gt;guard_size;</div><div class='add'>+</div><div class='add'>+	return *sprite_wm &gt; 0x3ff ? false : true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,</div><div class='add'>+					 uint32_t sprite_width, int pixel_size)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int latency = SNB_READ_WM0_LATENCY() * 100;	/* In unit 0.1us */</div><div class='add'>+	u32 val;</div><div class='add'>+	int sprite_wm, reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (pipe) {</div><div class='add'>+	case 0:</div><div class='add'>+		reg = WM0_PIPEA_ILK;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		reg = WM0_PIPEB_ILK;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		reg = WM0_PIPEC_IVB;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return; /* bad pipe */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = sandybridge_compute_sprite_wm(dev, pipe, sprite_width, pixel_size,</div><div class='add'>+					    &amp;sandybridge_display_wm_info,</div><div class='add'>+					    latency, &amp;sprite_wm);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		DRM_DEBUG_KMS("failed to compute sprite wm for pipe %d\n",</div><div class='add'>+			      pipe);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = I915_READ(reg);</div><div class='add'>+	val &amp;= ~WM0_PIPE_SPRITE_MASK;</div><div class='add'>+	I915_WRITE(reg, val | (sprite_wm &lt;&lt; WM0_PIPE_SPRITE_SHIFT));</div><div class='add'>+	DRM_DEBUG_KMS("sprite watermarks For pipe %d - %d\n", pipe, sprite_wm);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	ret = sandybridge_compute_sprite_srwm(dev, pipe, sprite_width,</div><div class='add'>+					      pixel_size,</div><div class='add'>+					      &amp;sandybridge_display_srwm_info,</div><div class='add'>+					      SNB_READ_WM1_LATENCY() * 500,</div><div class='add'>+					      &amp;sprite_wm);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		DRM_DEBUG_KMS("failed to compute sprite lp1 wm on pipe %d\n",</div><div class='add'>+			      pipe);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	I915_WRITE(WM1S_LP_ILK, sprite_wm);</div><div class='add'>+</div><div class='add'>+	/* Only IVB has two more LP watermarks for sprite */</div><div class='add'>+	if (!IS_IVYBRIDGE(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = sandybridge_compute_sprite_srwm(dev, pipe, sprite_width,</div><div class='add'>+					      pixel_size,</div><div class='add'>+					      &amp;sandybridge_display_srwm_info,</div><div class='add'>+					      SNB_READ_WM2_LATENCY() * 500,</div><div class='add'>+					      &amp;sprite_wm);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		DRM_DEBUG_KMS("failed to compute sprite lp2 wm on pipe %d\n",</div><div class='add'>+			      pipe);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	I915_WRITE(WM2S_LP_IVB, sprite_wm);</div><div class='add'>+</div><div class='add'>+	ret = sandybridge_compute_sprite_srwm(dev, pipe, sprite_width,</div><div class='add'>+					      pixel_size,</div><div class='add'>+					      &amp;sandybridge_display_srwm_info,</div><div class='add'>+					      SNB_READ_WM3_LATENCY() * 500,</div><div class='add'>+					      &amp;sprite_wm);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		DRM_DEBUG_KMS("failed to compute sprite lp3 wm on pipe %d\n",</div><div class='add'>+			      pipe);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	I915_WRITE(WM3S_LP_IVB, sprite_wm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * intel_update_watermarks - update FIFO watermark values based on current modes</div><div class='add'>+ *</div><div class='add'>+ * Calculate watermark values for the various WM regs based on current mode</div><div class='add'>+ * and plane configuration.</div><div class='add'>+ *</div><div class='add'>+ * There are several cases to deal with here:</div><div class='add'>+ *   - normal (i.e. non-self-refresh)</div><div class='add'>+ *   - self-refresh (SR) mode</div><div class='add'>+ *   - lines are large relative to FIFO size (buffer can hold up to 2)</div><div class='add'>+ *   - lines are small relative to FIFO size (buffer can hold more than 2</div><div class='add'>+ *     lines), so need to account for TLB latency</div><div class='add'>+ *</div><div class='add'>+ *   The normal calculation is:</div><div class='add'>+ *     watermark = dotclock * bytes per pixel * latency</div><div class='add'>+ *   where latency is platform &amp; configuration dependent (we assume pessimal</div><div class='add'>+ *   values here).</div><div class='add'>+ *</div><div class='add'>+ *   The SR calculation is:</div><div class='add'>+ *     watermark = (trunc(latency/line time)+1) * surface width *</div><div class='add'>+ *       bytes per pixel</div><div class='add'>+ *   where</div><div class='add'>+ *     line time = htotal / dotclock</div><div class='add'>+ *     surface width = hdisplay for normal plane and 64 for cursor</div><div class='add'>+ *   and latency is assumed to be high, as above.</div><div class='add'>+ *</div><div class='add'>+ * The final value programmed to the register should always be rounded up,</div><div class='add'>+ * and include an extra 2 entries to account for clock crossings.</div><div class='add'>+ *</div><div class='add'>+ * We don't use the sprite, so we can ignore that.  And on Crestline we have</div><div class='add'>+ * to set the non-SR watermarks to 8.</div><div class='add'>+ */</div><div class='add'>+void intel_update_watermarks(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;display.update_wm)</div><div class='add'>+		dev_priv-&gt;display.update_wm(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_update_linetime_watermarks(struct drm_device *dev,</div><div class='add'>+		int pipe, struct drm_display_mode *mode)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;display.update_linetime_wm)</div><div class='add'>+		dev_priv-&gt;display.update_linetime_wm(dev, pipe, mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,</div><div class='add'>+				    uint32_t sprite_width, int pixel_size)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;display.update_sprite_wm)</div><div class='add'>+		dev_priv-&gt;display.update_sprite_wm(dev, pipe, sprite_width,</div><div class='add'>+						   pixel_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct drm_i915_gem_object *</div><div class='add'>+intel_alloc_context_page(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_gem_object *ctx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	WARN_ON(!mutex_is_locked(&amp;dev-&gt;struct_mutex));</div><div class='add'>+</div><div class='add'>+	ctx = i915_gem_alloc_object(dev, 4096);</div><div class='add'>+	if (!ctx) {</div><div class='add'>+		DRM_DEBUG("failed to alloc power context, RC6 disabled\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = i915_gem_object_pin(ctx, 4096, true);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("failed to pin power context: %d\n", ret);</div><div class='add'>+		goto err_unref;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = i915_gem_object_set_to_gtt_domain(ctx, 1);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("failed to set-domain on power context: %d\n", ret);</div><div class='add'>+		goto err_unpin;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ctx;</div><div class='add'>+</div><div class='add'>+err_unpin:</div><div class='add'>+	i915_gem_object_unpin(ctx);</div><div class='add'>+err_unref:</div><div class='add'>+	drm_gem_object_unreference(&amp;ctx-&gt;base);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool ironlake_set_drps(struct drm_device *dev, u8 val)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u16 rgvswctl;</div><div class='add'>+</div><div class='add'>+	rgvswctl = I915_READ16(MEMSWCTL);</div><div class='add'>+	if (rgvswctl &amp; MEMCTL_CMD_STS) {</div><div class='add'>+		DRM_DEBUG("gpu busy, RCS change rejected\n");</div><div class='add'>+		return false; /* still busy with another command */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rgvswctl = (MEMCTL_CMD_CHFREQ &lt;&lt; MEMCTL_CMD_SHIFT) |</div><div class='add'>+		(val &lt;&lt; MEMCTL_FREQ_SHIFT) | MEMCTL_SFCAVM;</div><div class='add'>+	I915_WRITE16(MEMSWCTL, rgvswctl);</div><div class='add'>+	POSTING_READ16(MEMSWCTL);</div><div class='add'>+</div><div class='add'>+	rgvswctl |= MEMCTL_CMD_STS;</div><div class='add'>+	I915_WRITE16(MEMSWCTL, rgvswctl);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ironlake_enable_drps(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 rgvmodectl = I915_READ(MEMMODECTL);</div><div class='add'>+	u8 fmax, fmin, fstart, vstart;</div><div class='add'>+</div><div class='add'>+	/* Enable temp reporting */</div><div class='add'>+	I915_WRITE16(PMMISC, I915_READ(PMMISC) | MCPPCE_EN);</div><div class='add'>+	I915_WRITE16(TSC1, I915_READ(TSC1) | TSE);</div><div class='add'>+</div><div class='add'>+	/* 100ms RC evaluation intervals */</div><div class='add'>+	I915_WRITE(RCUPEI, 100000);</div><div class='add'>+	I915_WRITE(RCDNEI, 100000);</div><div class='add'>+</div><div class='add'>+	/* Set max/min thresholds to 90ms and 80ms respectively */</div><div class='add'>+	I915_WRITE(RCBMAXAVG, 90000);</div><div class='add'>+	I915_WRITE(RCBMINAVG, 80000);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(MEMIHYST, 1);</div><div class='add'>+</div><div class='add'>+	/* Set up min, max, and cur for interrupt handling */</div><div class='add'>+	fmax = (rgvmodectl &amp; MEMMODE_FMAX_MASK) &gt;&gt; MEMMODE_FMAX_SHIFT;</div><div class='add'>+	fmin = (rgvmodectl &amp; MEMMODE_FMIN_MASK);</div><div class='add'>+	fstart = (rgvmodectl &amp; MEMMODE_FSTART_MASK) &gt;&gt;</div><div class='add'>+		MEMMODE_FSTART_SHIFT;</div><div class='add'>+</div><div class='add'>+	vstart = (I915_READ(PXVFREQ_BASE + (fstart * 4)) &amp; PXVFREQ_PX_MASK) &gt;&gt;</div><div class='add'>+		PXVFREQ_PX_SHIFT;</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;fmax = fmax; /* IPS callback will increase this */</div><div class='add'>+	dev_priv-&gt;fstart = fstart;</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;max_delay = fstart;</div><div class='add'>+	dev_priv-&gt;min_delay = fmin;</div><div class='add'>+	dev_priv-&gt;cur_delay = fstart;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_DRIVER("fmax: %d, fmin: %d, fstart: %d\n",</div><div class='add'>+			 fmax, fmin, fstart);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(MEMINTREN, MEMINT_CX_SUPR_EN | MEMINT_EVAL_CHG_EN);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Interrupts will be enabled in ironlake_irq_postinstall</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	I915_WRITE(VIDSTART, vstart);</div><div class='add'>+	POSTING_READ(VIDSTART);</div><div class='add'>+</div><div class='add'>+	rgvmodectl |= MEMMODE_SWMODE_EN;</div><div class='add'>+	I915_WRITE(MEMMODECTL, rgvmodectl);</div><div class='add'>+</div><div class='add'>+	if (wait_for((I915_READ(MEMSWCTL) &amp; MEMCTL_CMD_STS) == 0, 10))</div><div class='add'>+		DRM_ERROR("stuck trying to change perf mode\n");</div><div class='add'>+	msleep(1);</div><div class='add'>+</div><div class='add'>+	ironlake_set_drps(dev, fstart);</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;last_count1 = I915_READ(0x112e4) + I915_READ(0x112e8) +</div><div class='add'>+		I915_READ(0x112e0);</div><div class='add'>+	dev_priv-&gt;last_time1 = jiffies_to_msecs(jiffies);</div><div class='add'>+	dev_priv-&gt;last_count2 = I915_READ(0x112f4);</div><div class='add'>+	getrawmonotonic(&amp;dev_priv-&gt;last_time2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ironlake_disable_drps(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u16 rgvswctl = I915_READ16(MEMSWCTL);</div><div class='add'>+</div><div class='add'>+	/* Ack interrupts, disable EFC interrupt */</div><div class='add'>+	I915_WRITE(MEMINTREN, I915_READ(MEMINTREN) &amp; ~MEMINT_EVAL_CHG_EN);</div><div class='add'>+	I915_WRITE(MEMINTRSTS, MEMINT_EVAL_CHG);</div><div class='add'>+	I915_WRITE(DEIER, I915_READ(DEIER) &amp; ~DE_PCU_EVENT);</div><div class='add'>+	I915_WRITE(DEIIR, DE_PCU_EVENT);</div><div class='add'>+	I915_WRITE(DEIMR, I915_READ(DEIMR) | DE_PCU_EVENT);</div><div class='add'>+</div><div class='add'>+	/* Go back to the starting frequency */</div><div class='add'>+	ironlake_set_drps(dev, dev_priv-&gt;fstart);</div><div class='add'>+	msleep(1);</div><div class='add'>+	rgvswctl |= MEMCTL_CMD_STS;</div><div class='add'>+	I915_WRITE(MEMSWCTL, rgvswctl);</div><div class='add'>+	msleep(1);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void gen6_set_rps(struct drm_device *dev, u8 val)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 limits;</div><div class='add'>+</div><div class='add'>+	limits = 0;</div><div class='add'>+	if (val &gt;= dev_priv-&gt;max_delay)</div><div class='add'>+		val = dev_priv-&gt;max_delay;</div><div class='add'>+	else</div><div class='add'>+		limits |= dev_priv-&gt;max_delay &lt;&lt; 24;</div><div class='add'>+</div><div class='add'>+	if (val &lt;= dev_priv-&gt;min_delay)</div><div class='add'>+		val = dev_priv-&gt;min_delay;</div><div class='add'>+	else</div><div class='add'>+		limits |= dev_priv-&gt;min_delay &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	if (val == dev_priv-&gt;cur_delay)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GEN6_RPNSWREQ,</div><div class='add'>+		   GEN6_FREQUENCY(val) |</div><div class='add'>+		   GEN6_OFFSET(0) |</div><div class='add'>+		   GEN6_AGGRESSIVE_TURBO);</div><div class='add'>+</div><div class='add'>+	/* Make sure we continue to get interrupts</div><div class='add'>+	 * until we hit the minimum or maximum frequencies.</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits);</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;cur_delay = val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void gen6_disable_rps(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GEN6_RPNSWREQ, 1 &lt;&lt; 31);</div><div class='add'>+	I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);</div><div class='add'>+	I915_WRITE(GEN6_PMIER, 0);</div><div class='add'>+	/* Complete PM interrupt masking here doesn't race with the rps work</div><div class='add'>+	 * item again unmasking PM interrupts because that is using a different</div><div class='add'>+	 * register (PMIMR) to mask PM interrupts. The only risk is in leaving</div><div class='add'>+	 * stale bits in PMIIR and PMIMR which gen6_enable_rps will clean up. */</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;dev_priv-&gt;rps_lock);</div><div class='add'>+	dev_priv-&gt;pm_iir = 0;</div><div class='add'>+	spin_unlock_irq(&amp;dev_priv-&gt;rps_lock);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int intel_enable_rc6(const struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Respect the kernel parameter if it is set</div><div class='add'>+	 */</div><div class='add'>+	if (i915_enable_rc6 &gt;= 0)</div><div class='add'>+		return i915_enable_rc6;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable RC6 on Ironlake</div><div class='add'>+	 */</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen == 5)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Sorry Haswell, no RC6 for you for now. */</div><div class='add'>+	if (IS_HASWELL(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable rc6 on Sandybridge</div><div class='add'>+	 */</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen == 6) {</div><div class='add'>+		DRM_DEBUG_DRIVER("Sandybridge: deep RC6 disabled\n");</div><div class='add'>+		return INTEL_RC6_ENABLE;</div><div class='add'>+	}</div><div class='add'>+	DRM_DEBUG_DRIVER("RC6 and deep RC6 enabled\n");</div><div class='add'>+	return (INTEL_RC6_ENABLE | INTEL_RC6p_ENABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void gen6_enable_rps(struct drm_i915_private *dev_priv)</div><div class='add'>+{</div><div class='add'>+	struct intel_ring_buffer *ring;</div><div class='add'>+	u32 rp_state_cap;</div><div class='add'>+	u32 gt_perf_status;</div><div class='add'>+	u32 pcu_mbox, rc6_mask = 0;</div><div class='add'>+	u32 gtfifodbg;</div><div class='add'>+	int rc6_mode;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Here begins a magic sequence of register writes to enable</div><div class='add'>+	 * auto-downclocking.</div><div class='add'>+	 *</div><div class='add'>+	 * Perhaps there might be some value in exposing these to</div><div class='add'>+	 * userspace...</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(GEN6_RC_STATE, 0);</div><div class='add'>+	mutex_lock(&amp;dev_priv-&gt;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+	/* Clear the DBG now so we don't confuse earlier errors */</div><div class='add'>+	if ((gtfifodbg = I915_READ(GTFIFODBG))) {</div><div class='add'>+		DRM_ERROR("GT fifo had a previous error %x\n", gtfifodbg);</div><div class='add'>+		I915_WRITE(GTFIFODBG, gtfifodbg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gen6_gt_force_wake_get(dev_priv);</div><div class='add'>+</div><div class='add'>+	rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);</div><div class='add'>+	gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);</div><div class='add'>+</div><div class='add'>+	/* In units of 100MHz */</div><div class='add'>+	dev_priv-&gt;max_delay = rp_state_cap &amp; 0xff;</div><div class='add'>+	dev_priv-&gt;min_delay = (rp_state_cap &amp; 0xff0000) &gt;&gt; 16;</div><div class='add'>+	dev_priv-&gt;cur_delay = 0;</div><div class='add'>+</div><div class='add'>+	/* disable the counters and set deterministic thresholds */</div><div class='add'>+	I915_WRITE(GEN6_RC_CONTROL, 0);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GEN6_RC1_WAKE_RATE_LIMIT, 1000 &lt;&lt; 16);</div><div class='add'>+	I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 40 &lt;&lt; 16 | 30);</div><div class='add'>+	I915_WRITE(GEN6_RC6pp_WAKE_RATE_LIMIT, 30);</div><div class='add'>+	I915_WRITE(GEN6_RC_EVALUATION_INTERVAL, 125000);</div><div class='add'>+	I915_WRITE(GEN6_RC_IDLE_HYSTERSIS, 25);</div><div class='add'>+</div><div class='add'>+	for_each_ring(ring, dev_priv, i)</div><div class='add'>+		I915_WRITE(RING_MAX_IDLE(ring-&gt;mmio_base), 10);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GEN6_RC_SLEEP, 0);</div><div class='add'>+	I915_WRITE(GEN6_RC1e_THRESHOLD, 1000);</div><div class='add'>+	I915_WRITE(GEN6_RC6_THRESHOLD, 50000);</div><div class='add'>+	I915_WRITE(GEN6_RC6p_THRESHOLD, 100000);</div><div class='add'>+	I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */</div><div class='add'>+</div><div class='add'>+	rc6_mode = intel_enable_rc6(dev_priv-&gt;dev);</div><div class='add'>+	if (rc6_mode &amp; INTEL_RC6_ENABLE)</div><div class='add'>+		rc6_mask |= GEN6_RC_CTL_RC6_ENABLE;</div><div class='add'>+</div><div class='add'>+	if (rc6_mode &amp; INTEL_RC6p_ENABLE)</div><div class='add'>+		rc6_mask |= GEN6_RC_CTL_RC6p_ENABLE;</div><div class='add'>+</div><div class='add'>+	if (rc6_mode &amp; INTEL_RC6pp_ENABLE)</div><div class='add'>+		rc6_mask |= GEN6_RC_CTL_RC6pp_ENABLE;</div><div class='add'>+</div><div class='add'>+	DRM_INFO("Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n",</div><div class='add'>+			(rc6_mode &amp; INTEL_RC6_ENABLE) ? "on" : "off",</div><div class='add'>+			(rc6_mode &amp; INTEL_RC6p_ENABLE) ? "on" : "off",</div><div class='add'>+			(rc6_mode &amp; INTEL_RC6pp_ENABLE) ? "on" : "off");</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GEN6_RC_CONTROL,</div><div class='add'>+		   rc6_mask |</div><div class='add'>+		   GEN6_RC_CTL_EI_MODE(1) |</div><div class='add'>+		   GEN6_RC_CTL_HW_ENABLE);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GEN6_RPNSWREQ,</div><div class='add'>+		   GEN6_FREQUENCY(10) |</div><div class='add'>+		   GEN6_OFFSET(0) |</div><div class='add'>+		   GEN6_AGGRESSIVE_TURBO);</div><div class='add'>+	I915_WRITE(GEN6_RC_VIDEO_FREQ,</div><div class='add'>+		   GEN6_FREQUENCY(12));</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GEN6_RP_DOWN_TIMEOUT, 1000000);</div><div class='add'>+	I915_WRITE(GEN6_RP_INTERRUPT_LIMITS,</div><div class='add'>+		   dev_priv-&gt;max_delay &lt;&lt; 24 |</div><div class='add'>+		   dev_priv-&gt;min_delay &lt;&lt; 16);</div><div class='add'>+	I915_WRITE(GEN6_RP_UP_THRESHOLD, 10000);</div><div class='add'>+	I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 1000000);</div><div class='add'>+	I915_WRITE(GEN6_RP_UP_EI, 100000);</div><div class='add'>+	I915_WRITE(GEN6_RP_DOWN_EI, 5000000);</div><div class='add'>+	I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);</div><div class='add'>+	I915_WRITE(GEN6_RP_CONTROL,</div><div class='add'>+		   GEN6_RP_MEDIA_TURBO |</div><div class='add'>+		   GEN6_RP_MEDIA_HW_NORMAL_MODE |</div><div class='add'>+		   GEN6_RP_MEDIA_IS_GFX |</div><div class='add'>+		   GEN6_RP_ENABLE |</div><div class='add'>+		   GEN6_RP_UP_BUSY_AVG |</div><div class='add'>+		   GEN6_RP_DOWN_IDLE_CONT);</div><div class='add'>+</div><div class='add'>+	if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &amp; GEN6_PCODE_READY) == 0,</div><div class='add'>+		     500))</div><div class='add'>+		DRM_ERROR("timeout waiting for pcode mailbox to become idle\n");</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GEN6_PCODE_DATA, 0);</div><div class='add'>+	I915_WRITE(GEN6_PCODE_MAILBOX,</div><div class='add'>+		   GEN6_PCODE_READY |</div><div class='add'>+		   GEN6_PCODE_WRITE_MIN_FREQ_TABLE);</div><div class='add'>+	if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &amp; GEN6_PCODE_READY) == 0,</div><div class='add'>+		     500))</div><div class='add'>+		DRM_ERROR("timeout waiting for pcode mailbox to finish\n");</div><div class='add'>+</div><div class='add'>+	/* Check for overclock support */</div><div class='add'>+	if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &amp; GEN6_PCODE_READY) == 0,</div><div class='add'>+		     500))</div><div class='add'>+		DRM_ERROR("timeout waiting for pcode mailbox to become idle\n");</div><div class='add'>+	I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_READ_OC_PARAMS);</div><div class='add'>+	pcu_mbox = I915_READ(GEN6_PCODE_DATA);</div><div class='add'>+	if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &amp; GEN6_PCODE_READY) == 0,</div><div class='add'>+		     500))</div><div class='add'>+		DRM_ERROR("timeout waiting for pcode mailbox to finish\n");</div><div class='add'>+	if (pcu_mbox &amp; (1&lt;&lt;31)) { /* OC supported */</div><div class='add'>+		dev_priv-&gt;max_delay = pcu_mbox &amp; 0xff;</div><div class='add'>+		DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max to %dMHz\n", pcu_mbox * 50);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gen6_set_rps(dev_priv-&gt;dev, (gt_perf_status &amp; 0xff00) &gt;&gt; 8);</div><div class='add'>+</div><div class='add'>+	/* requires MSI enabled */</div><div class='add'>+	I915_WRITE(GEN6_PMIER,</div><div class='add'>+		   GEN6_PM_MBOX_EVENT |</div><div class='add'>+		   GEN6_PM_THERMAL_EVENT |</div><div class='add'>+		   GEN6_PM_RP_DOWN_TIMEOUT |</div><div class='add'>+		   GEN6_PM_RP_UP_THRESHOLD |</div><div class='add'>+		   GEN6_PM_RP_DOWN_THRESHOLD |</div><div class='add'>+		   GEN6_PM_RP_UP_EI_EXPIRED |</div><div class='add'>+		   GEN6_PM_RP_DOWN_EI_EXPIRED);</div><div class='add'>+	spin_lock_irq(&amp;dev_priv-&gt;rps_lock);</div><div class='add'>+	WARN_ON(dev_priv-&gt;pm_iir != 0);</div><div class='add'>+	I915_WRITE(GEN6_PMIMR, 0);</div><div class='add'>+	spin_unlock_irq(&amp;dev_priv-&gt;rps_lock);</div><div class='add'>+	/* enable all PM interrupts */</div><div class='add'>+	I915_WRITE(GEN6_PMINTRMSK, 0);</div><div class='add'>+</div><div class='add'>+	gen6_gt_force_wake_put(dev_priv);</div><div class='add'>+	mutex_unlock(&amp;dev_priv-&gt;dev-&gt;struct_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void gen6_update_ring_freq(struct drm_i915_private *dev_priv)</div><div class='add'>+{</div><div class='add'>+	int min_freq = 15;</div><div class='add'>+	int gpu_freq, ia_freq, max_ia_freq;</div><div class='add'>+	int scaling_factor = 180;</div><div class='add'>+</div><div class='add'>+	max_ia_freq = cpufreq_quick_get_max(0);</div><div class='add'>+	/*</div><div class='add'>+	 * Default to measured freq if none found, PCU will ensure we don't go</div><div class='add'>+	 * over</div><div class='add'>+	 */</div><div class='add'>+	if (!max_ia_freq)</div><div class='add'>+		max_ia_freq = tsc_khz;</div><div class='add'>+</div><div class='add'>+	/* Convert from kHz to MHz */</div><div class='add'>+	max_ia_freq /= 1000;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev_priv-&gt;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * For each potential GPU frequency, load a ring frequency we'd like</div><div class='add'>+	 * to use for memory access.  We do this by specifying the IA frequency</div><div class='add'>+	 * the PCU should use as a reference to determine the ring frequency.</div><div class='add'>+	 */</div><div class='add'>+	for (gpu_freq = dev_priv-&gt;max_delay; gpu_freq &gt;= dev_priv-&gt;min_delay;</div><div class='add'>+	     gpu_freq--) {</div><div class='add'>+		int diff = dev_priv-&gt;max_delay - gpu_freq;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * For GPU frequencies less than 750MHz, just use the lowest</div><div class='add'>+		 * ring freq.</div><div class='add'>+		 */</div><div class='add'>+		if (gpu_freq &lt; min_freq)</div><div class='add'>+			ia_freq = 800;</div><div class='add'>+		else</div><div class='add'>+			ia_freq = max_ia_freq - ((diff * scaling_factor) / 2);</div><div class='add'>+		ia_freq = DIV_ROUND_CLOSEST(ia_freq, 100);</div><div class='add'>+</div><div class='add'>+		I915_WRITE(GEN6_PCODE_DATA,</div><div class='add'>+			   (ia_freq &lt;&lt; GEN6_PCODE_FREQ_IA_RATIO_SHIFT) |</div><div class='add'>+			   gpu_freq);</div><div class='add'>+		I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |</div><div class='add'>+			   GEN6_PCODE_WRITE_MIN_FREQ_TABLE);</div><div class='add'>+		if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &amp;</div><div class='add'>+			      GEN6_PCODE_READY) == 0, 10)) {</div><div class='add'>+			DRM_ERROR("pcode write of freq table timed out\n");</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;dev_priv-&gt;dev-&gt;struct_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ironlake_teardown_rc6(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;renderctx) {</div><div class='add'>+		i915_gem_object_unpin(dev_priv-&gt;renderctx);</div><div class='add'>+		drm_gem_object_unreference(&amp;dev_priv-&gt;renderctx-&gt;base);</div><div class='add'>+		dev_priv-&gt;renderctx = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;pwrctx) {</div><div class='add'>+		i915_gem_object_unpin(dev_priv-&gt;pwrctx);</div><div class='add'>+		drm_gem_object_unreference(&amp;dev_priv-&gt;pwrctx-&gt;base);</div><div class='add'>+		dev_priv-&gt;pwrctx = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ironlake_disable_rc6(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (I915_READ(PWRCTXA)) {</div><div class='add'>+		/* Wake the GPU, prevent RC6, then restore RSTDBYCTL */</div><div class='add'>+		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) | RCX_SW_EXIT);</div><div class='add'>+		wait_for(((I915_READ(RSTDBYCTL) &amp; RSX_STATUS_MASK) == RSX_STATUS_ON),</div><div class='add'>+			 50);</div><div class='add'>+</div><div class='add'>+		I915_WRITE(PWRCTXA, 0);</div><div class='add'>+		POSTING_READ(PWRCTXA);</div><div class='add'>+</div><div class='add'>+		I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) &amp; ~RCX_SW_EXIT);</div><div class='add'>+		POSTING_READ(RSTDBYCTL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ironlake_teardown_rc6(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ironlake_setup_rc6(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;renderctx == NULL)</div><div class='add'>+		dev_priv-&gt;renderctx = intel_alloc_context_page(dev);</div><div class='add'>+	if (!dev_priv-&gt;renderctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;pwrctx == NULL)</div><div class='add'>+		dev_priv-&gt;pwrctx = intel_alloc_context_page(dev);</div><div class='add'>+	if (!dev_priv-&gt;pwrctx) {</div><div class='add'>+		ironlake_teardown_rc6(dev);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ironlake_enable_rc6(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* rc6 disabled by default due to repeated reports of hanging during</div><div class='add'>+	 * boot and resume.</div><div class='add'>+	 */</div><div class='add'>+	if (!intel_enable_rc6(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	ret = ironlake_setup_rc6(dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * GPU can automatically power down the render unit if given a page</div><div class='add'>+	 * to save state.</div><div class='add'>+	 */</div><div class='add'>+	ret = intel_ring_begin(ring, 6);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ironlake_teardown_rc6(dev);</div><div class='add'>+		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	intel_ring_emit(ring, MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);</div><div class='add'>+	intel_ring_emit(ring, MI_SET_CONTEXT);</div><div class='add'>+	intel_ring_emit(ring, dev_priv-&gt;renderctx-&gt;gtt_offset |</div><div class='add'>+			MI_MM_SPACE_GTT |</div><div class='add'>+			MI_SAVE_EXT_STATE_EN |</div><div class='add'>+			MI_RESTORE_EXT_STATE_EN |</div><div class='add'>+			MI_RESTORE_INHIBIT);</div><div class='add'>+	intel_ring_emit(ring, MI_SUSPEND_FLUSH);</div><div class='add'>+	intel_ring_emit(ring, MI_NOOP);</div><div class='add'>+	intel_ring_emit(ring, MI_FLUSH);</div><div class='add'>+	intel_ring_advance(ring);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Wait for the command parser to advance past MI_SET_CONTEXT. The HW</div><div class='add'>+	 * does an implicit flush, combined with MI_FLUSH above, it should be</div><div class='add'>+	 * safe to assume that renderctx is valid</div><div class='add'>+	 */</div><div class='add'>+	ret = intel_wait_ring_idle(ring);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("failed to enable ironlake power power savings\n");</div><div class='add'>+		ironlake_teardown_rc6(dev);</div><div class='add'>+		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	I915_WRITE(PWRCTXA, dev_priv-&gt;pwrctx-&gt;gtt_offset | PWRCTX_EN);</div><div class='add'>+	I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) &amp; ~RCX_SW_EXIT);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long intel_pxfreq(u32 vidfreq)</div><div class='add'>+{</div><div class='add'>+	unsigned long freq;</div><div class='add'>+	int div = (vidfreq &amp; 0x3f0000) &gt;&gt; 16;</div><div class='add'>+	int post = (vidfreq &amp; 0x3000) &gt;&gt; 12;</div><div class='add'>+	int pre = (vidfreq &amp; 0x7);</div><div class='add'>+</div><div class='add'>+	if (!pre)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	freq = ((div * 133333) / ((1&lt;&lt;post) * pre));</div><div class='add'>+</div><div class='add'>+	return freq;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct cparams {</div><div class='add'>+	u16 i;</div><div class='add'>+	u16 t;</div><div class='add'>+	u16 m;</div><div class='add'>+	u16 c;</div><div class='add'>+} cparams[] = {</div><div class='add'>+	{ 1, 1333, 301, 28664 },</div><div class='add'>+	{ 1, 1066, 294, 24460 },</div><div class='add'>+	{ 1, 800, 294, 25192 },</div><div class='add'>+	{ 0, 1333, 276, 27605 },</div><div class='add'>+	{ 0, 1066, 276, 27605 },</div><div class='add'>+	{ 0, 800, 231, 23784 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+unsigned long i915_chipset_val(struct drm_i915_private *dev_priv)</div><div class='add'>+{</div><div class='add'>+	u64 total_count, diff, ret;</div><div class='add'>+	u32 count1, count2, count3, m = 0, c = 0;</div><div class='add'>+	unsigned long now = jiffies_to_msecs(jiffies), diff1;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	diff1 = now - dev_priv-&gt;last_time1;</div><div class='add'>+</div><div class='add'>+	/* Prevent division-by-zero if we are asking too fast.</div><div class='add'>+	 * Also, we don't get interesting results if we are polling</div><div class='add'>+	 * faster than once in 10ms, so just return the saved value</div><div class='add'>+	 * in such cases.</div><div class='add'>+	 */</div><div class='add'>+	if (diff1 &lt;= 10)</div><div class='add'>+		return dev_priv-&gt;chipset_power;</div><div class='add'>+</div><div class='add'>+	count1 = I915_READ(DMIEC);</div><div class='add'>+	count2 = I915_READ(DDREC);</div><div class='add'>+	count3 = I915_READ(CSIEC);</div><div class='add'>+</div><div class='add'>+	total_count = count1 + count2 + count3;</div><div class='add'>+</div><div class='add'>+	/* FIXME: handle per-counter overflow */</div><div class='add'>+	if (total_count &lt; dev_priv-&gt;last_count1) {</div><div class='add'>+		diff = ~0UL - dev_priv-&gt;last_count1;</div><div class='add'>+		diff += total_count;</div><div class='add'>+	} else {</div><div class='add'>+		diff = total_count - dev_priv-&gt;last_count1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(cparams); i++) {</div><div class='add'>+		if (cparams[i].i == dev_priv-&gt;c_m &amp;&amp;</div><div class='add'>+		    cparams[i].t == dev_priv-&gt;r_t) {</div><div class='add'>+			m = cparams[i].m;</div><div class='add'>+			c = cparams[i].c;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	diff = div_u64(diff, diff1);</div><div class='add'>+	ret = ((m * diff) + c);</div><div class='add'>+	ret = div_u64(ret, 10);</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;last_count1 = total_count;</div><div class='add'>+	dev_priv-&gt;last_time1 = now;</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;chipset_power = ret;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long i915_mch_val(struct drm_i915_private *dev_priv)</div><div class='add'>+{</div><div class='add'>+	unsigned long m, x, b;</div><div class='add'>+	u32 tsfs;</div><div class='add'>+</div><div class='add'>+	tsfs = I915_READ(TSFS);</div><div class='add'>+</div><div class='add'>+	m = ((tsfs &amp; TSFS_SLOPE_MASK) &gt;&gt; TSFS_SLOPE_SHIFT);</div><div class='add'>+	x = I915_READ8(TR1);</div><div class='add'>+</div><div class='add'>+	b = tsfs &amp; TSFS_INTR_MASK;</div><div class='add'>+</div><div class='add'>+	return ((m * x) / 127) - b;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 pvid_to_extvid(struct drm_i915_private *dev_priv, u8 pxvid)</div><div class='add'>+{</div><div class='add'>+	static const struct v_table {</div><div class='add'>+		u16 vd; /* in .1 mil */</div><div class='add'>+		u16 vm; /* in .1 mil */</div><div class='add'>+	} v_table[] = {</div><div class='add'>+		{ 0, 0, },</div><div class='add'>+		{ 375, 0, },</div><div class='add'>+		{ 500, 0, },</div><div class='add'>+		{ 625, 0, },</div><div class='add'>+		{ 750, 0, },</div><div class='add'>+		{ 875, 0, },</div><div class='add'>+		{ 1000, 0, },</div><div class='add'>+		{ 1125, 0, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4125, 3000, },</div><div class='add'>+		{ 4250, 3125, },</div><div class='add'>+		{ 4375, 3250, },</div><div class='add'>+		{ 4500, 3375, },</div><div class='add'>+		{ 4625, 3500, },</div><div class='add'>+		{ 4750, 3625, },</div><div class='add'>+		{ 4875, 3750, },</div><div class='add'>+		{ 5000, 3875, },</div><div class='add'>+		{ 5125, 4000, },</div><div class='add'>+		{ 5250, 4125, },</div><div class='add'>+		{ 5375, 4250, },</div><div class='add'>+		{ 5500, 4375, },</div><div class='add'>+		{ 5625, 4500, },</div><div class='add'>+		{ 5750, 4625, },</div><div class='add'>+		{ 5875, 4750, },</div><div class='add'>+		{ 6000, 4875, },</div><div class='add'>+		{ 6125, 5000, },</div><div class='add'>+		{ 6250, 5125, },</div><div class='add'>+		{ 6375, 5250, },</div><div class='add'>+		{ 6500, 5375, },</div><div class='add'>+		{ 6625, 5500, },</div><div class='add'>+		{ 6750, 5625, },</div><div class='add'>+		{ 6875, 5750, },</div><div class='add'>+		{ 7000, 5875, },</div><div class='add'>+		{ 7125, 6000, },</div><div class='add'>+		{ 7250, 6125, },</div><div class='add'>+		{ 7375, 6250, },</div><div class='add'>+		{ 7500, 6375, },</div><div class='add'>+		{ 7625, 6500, },</div><div class='add'>+		{ 7750, 6625, },</div><div class='add'>+		{ 7875, 6750, },</div><div class='add'>+		{ 8000, 6875, },</div><div class='add'>+		{ 8125, 7000, },</div><div class='add'>+		{ 8250, 7125, },</div><div class='add'>+		{ 8375, 7250, },</div><div class='add'>+		{ 8500, 7375, },</div><div class='add'>+		{ 8625, 7500, },</div><div class='add'>+		{ 8750, 7625, },</div><div class='add'>+		{ 8875, 7750, },</div><div class='add'>+		{ 9000, 7875, },</div><div class='add'>+		{ 9125, 8000, },</div><div class='add'>+		{ 9250, 8125, },</div><div class='add'>+		{ 9375, 8250, },</div><div class='add'>+		{ 9500, 8375, },</div><div class='add'>+		{ 9625, 8500, },</div><div class='add'>+		{ 9750, 8625, },</div><div class='add'>+		{ 9875, 8750, },</div><div class='add'>+		{ 10000, 8875, },</div><div class='add'>+		{ 10125, 9000, },</div><div class='add'>+		{ 10250, 9125, },</div><div class='add'>+		{ 10375, 9250, },</div><div class='add'>+		{ 10500, 9375, },</div><div class='add'>+		{ 10625, 9500, },</div><div class='add'>+		{ 10750, 9625, },</div><div class='add'>+		{ 10875, 9750, },</div><div class='add'>+		{ 11000, 9875, },</div><div class='add'>+		{ 11125, 10000, },</div><div class='add'>+		{ 11250, 10125, },</div><div class='add'>+		{ 11375, 10250, },</div><div class='add'>+		{ 11500, 10375, },</div><div class='add'>+		{ 11625, 10500, },</div><div class='add'>+		{ 11750, 10625, },</div><div class='add'>+		{ 11875, 10750, },</div><div class='add'>+		{ 12000, 10875, },</div><div class='add'>+		{ 12125, 11000, },</div><div class='add'>+		{ 12250, 11125, },</div><div class='add'>+		{ 12375, 11250, },</div><div class='add'>+		{ 12500, 11375, },</div><div class='add'>+		{ 12625, 11500, },</div><div class='add'>+		{ 12750, 11625, },</div><div class='add'>+		{ 12875, 11750, },</div><div class='add'>+		{ 13000, 11875, },</div><div class='add'>+		{ 13125, 12000, },</div><div class='add'>+		{ 13250, 12125, },</div><div class='add'>+		{ 13375, 12250, },</div><div class='add'>+		{ 13500, 12375, },</div><div class='add'>+		{ 13625, 12500, },</div><div class='add'>+		{ 13750, 12625, },</div><div class='add'>+		{ 13875, 12750, },</div><div class='add'>+		{ 14000, 12875, },</div><div class='add'>+		{ 14125, 13000, },</div><div class='add'>+		{ 14250, 13125, },</div><div class='add'>+		{ 14375, 13250, },</div><div class='add'>+		{ 14500, 13375, },</div><div class='add'>+		{ 14625, 13500, },</div><div class='add'>+		{ 14750, 13625, },</div><div class='add'>+		{ 14875, 13750, },</div><div class='add'>+		{ 15000, 13875, },</div><div class='add'>+		{ 15125, 14000, },</div><div class='add'>+		{ 15250, 14125, },</div><div class='add'>+		{ 15375, 14250, },</div><div class='add'>+		{ 15500, 14375, },</div><div class='add'>+		{ 15625, 14500, },</div><div class='add'>+		{ 15750, 14625, },</div><div class='add'>+		{ 15875, 14750, },</div><div class='add'>+		{ 16000, 14875, },</div><div class='add'>+		{ 16125, 15000, },</div><div class='add'>+	};</div><div class='add'>+	if (dev_priv-&gt;info-&gt;is_mobile)</div><div class='add'>+		return v_table[pxvid].vm;</div><div class='add'>+	else</div><div class='add'>+		return v_table[pxvid].vd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void i915_update_gfx_val(struct drm_i915_private *dev_priv)</div><div class='add'>+{</div><div class='add'>+	struct timespec now, diff1;</div><div class='add'>+	u64 diff;</div><div class='add'>+	unsigned long diffms;</div><div class='add'>+	u32 count;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;info-&gt;gen != 5)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	getrawmonotonic(&amp;now);</div><div class='add'>+	diff1 = timespec_sub(now, dev_priv-&gt;last_time2);</div><div class='add'>+</div><div class='add'>+	/* Don't divide by 0 */</div><div class='add'>+	diffms = diff1.tv_sec * 1000 + diff1.tv_nsec / 1000000;</div><div class='add'>+	if (!diffms)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	count = I915_READ(GFXEC);</div><div class='add'>+</div><div class='add'>+	if (count &lt; dev_priv-&gt;last_count2) {</div><div class='add'>+		diff = ~0UL - dev_priv-&gt;last_count2;</div><div class='add'>+		diff += count;</div><div class='add'>+	} else {</div><div class='add'>+		diff = count - dev_priv-&gt;last_count2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;last_count2 = count;</div><div class='add'>+	dev_priv-&gt;last_time2 = now;</div><div class='add'>+</div><div class='add'>+	/* More magic constants... */</div><div class='add'>+	diff = diff * 1181;</div><div class='add'>+	diff = div_u64(diff, diffms * 10);</div><div class='add'>+	dev_priv-&gt;gfx_power = diff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned long i915_gfx_val(struct drm_i915_private *dev_priv)</div><div class='add'>+{</div><div class='add'>+	unsigned long t, corr, state1, corr2, state2;</div><div class='add'>+	u32 pxvid, ext_v;</div><div class='add'>+</div><div class='add'>+	pxvid = I915_READ(PXVFREQ_BASE + (dev_priv-&gt;cur_delay * 4));</div><div class='add'>+	pxvid = (pxvid &gt;&gt; 24) &amp; 0x7f;</div><div class='add'>+	ext_v = pvid_to_extvid(dev_priv, pxvid);</div><div class='add'>+</div><div class='add'>+	state1 = ext_v;</div><div class='add'>+</div><div class='add'>+	t = i915_mch_val(dev_priv);</div><div class='add'>+</div><div class='add'>+	/* Revel in the empirically derived constants */</div><div class='add'>+</div><div class='add'>+	/* Correction factor in 1/100000 units */</div><div class='add'>+	if (t &gt; 80)</div><div class='add'>+		corr = ((t * 2349) + 135940);</div><div class='add'>+	else if (t &gt;= 50)</div><div class='add'>+		corr = ((t * 964) + 29317);</div><div class='add'>+	else /* &lt; 50 */</div><div class='add'>+		corr = ((t * 301) + 1004);</div><div class='add'>+</div><div class='add'>+	corr = corr * ((150142 * state1) / 10000 - 78642);</div><div class='add'>+	corr /= 100000;</div><div class='add'>+	corr2 = (corr * dev_priv-&gt;corr);</div><div class='add'>+</div><div class='add'>+	state2 = (corr2 * state1) / 10000;</div><div class='add'>+	state2 /= 100; /* convert to mW */</div><div class='add'>+</div><div class='add'>+	i915_update_gfx_val(dev_priv);</div><div class='add'>+</div><div class='add'>+	return dev_priv-&gt;gfx_power + state2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Global for IPS driver to get at the current i915 device */</div><div class='add'>+static struct drm_i915_private *i915_mch_dev;</div><div class='add'>+/*</div><div class='add'>+ * Lock protecting IPS related data structures</div><div class='add'>+ *   - i915_mch_dev</div><div class='add'>+ *   - dev_priv-&gt;max_delay</div><div class='add'>+ *   - dev_priv-&gt;min_delay</div><div class='add'>+ *   - dev_priv-&gt;fmax</div><div class='add'>+ *   - dev_priv-&gt;gpu_busy</div><div class='add'>+ */</div><div class='add'>+static DEFINE_SPINLOCK(mchdev_lock);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * i915_read_mch_val - return value for IPS use</div><div class='add'>+ *</div><div class='add'>+ * Calculate and return a value for the IPS driver to use when deciding whether</div><div class='add'>+ * we have thermal and power headroom to increase CPU or GPU power budget.</div><div class='add'>+ */</div><div class='add'>+unsigned long i915_read_mch_val(void)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv;</div><div class='add'>+	unsigned long chipset_val, graphics_val, ret = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;mchdev_lock);</div><div class='add'>+	if (!i915_mch_dev)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	dev_priv = i915_mch_dev;</div><div class='add'>+</div><div class='add'>+	chipset_val = i915_chipset_val(dev_priv);</div><div class='add'>+	graphics_val = i915_gfx_val(dev_priv);</div><div class='add'>+</div><div class='add'>+	ret = chipset_val + graphics_val;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock(&amp;mchdev_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(i915_read_mch_val);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * i915_gpu_raise - raise GPU frequency limit</div><div class='add'>+ *</div><div class='add'>+ * Raise the limit; IPS indicates we have thermal headroom.</div><div class='add'>+ */</div><div class='add'>+bool i915_gpu_raise(void)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv;</div><div class='add'>+	bool ret = true;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;mchdev_lock);</div><div class='add'>+	if (!i915_mch_dev) {</div><div class='add'>+		ret = false;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+	dev_priv = i915_mch_dev;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;max_delay &gt; dev_priv-&gt;fmax)</div><div class='add'>+		dev_priv-&gt;max_delay--;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock(&amp;mchdev_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(i915_gpu_raise);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * i915_gpu_lower - lower GPU frequency limit</div><div class='add'>+ *</div><div class='add'>+ * IPS indicates we're close to a thermal limit, so throttle back the GPU</div><div class='add'>+ * frequency maximum.</div><div class='add'>+ */</div><div class='add'>+bool i915_gpu_lower(void)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv;</div><div class='add'>+	bool ret = true;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;mchdev_lock);</div><div class='add'>+	if (!i915_mch_dev) {</div><div class='add'>+		ret = false;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+	dev_priv = i915_mch_dev;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;max_delay &lt; dev_priv-&gt;min_delay)</div><div class='add'>+		dev_priv-&gt;max_delay++;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock(&amp;mchdev_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(i915_gpu_lower);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * i915_gpu_busy - indicate GPU business to IPS</div><div class='add'>+ *</div><div class='add'>+ * Tell the IPS driver whether or not the GPU is busy.</div><div class='add'>+ */</div><div class='add'>+bool i915_gpu_busy(void)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv;</div><div class='add'>+	bool ret = false;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;mchdev_lock);</div><div class='add'>+	if (!i915_mch_dev)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	dev_priv = i915_mch_dev;</div><div class='add'>+</div><div class='add'>+	ret = dev_priv-&gt;busy;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock(&amp;mchdev_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(i915_gpu_busy);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * i915_gpu_turbo_disable - disable graphics turbo</div><div class='add'>+ *</div><div class='add'>+ * Disable graphics turbo by resetting the max frequency and setting the</div><div class='add'>+ * current frequency to the default.</div><div class='add'>+ */</div><div class='add'>+bool i915_gpu_turbo_disable(void)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv;</div><div class='add'>+	bool ret = true;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;mchdev_lock);</div><div class='add'>+	if (!i915_mch_dev) {</div><div class='add'>+		ret = false;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+	dev_priv = i915_mch_dev;</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;max_delay = dev_priv-&gt;fstart;</div><div class='add'>+</div><div class='add'>+	if (!ironlake_set_drps(dev_priv-&gt;dev, dev_priv-&gt;fstart))</div><div class='add'>+		ret = false;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock(&amp;mchdev_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(i915_gpu_turbo_disable);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * Tells the intel_ips driver that the i915 driver is now loaded, if</div><div class='add'>+ * IPS got loaded first.</div><div class='add'>+ *</div><div class='add'>+ * This awkward dance is so that neither module has to depend on the</div><div class='add'>+ * other in order for IPS to do the appropriate communication of</div><div class='add'>+ * GPU turbo limits to i915.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+ips_ping_for_i915_load(void)</div><div class='add'>+{</div><div class='add'>+	void (*link)(void);</div><div class='add'>+</div><div class='add'>+	link = symbol_get(ips_link_to_i915_driver);</div><div class='add'>+	if (link) {</div><div class='add'>+		link();</div><div class='add'>+		symbol_put(ips_link_to_i915_driver);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_gpu_ips_init(struct drm_i915_private *dev_priv)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;mchdev_lock);</div><div class='add'>+	i915_mch_dev = dev_priv;</div><div class='add'>+	dev_priv-&gt;mchdev_lock = &amp;mchdev_lock;</div><div class='add'>+	spin_unlock(&amp;mchdev_lock);</div><div class='add'>+</div><div class='add'>+	ips_ping_for_i915_load();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_gpu_ips_teardown(void)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;mchdev_lock);</div><div class='add'>+	i915_mch_dev = NULL;</div><div class='add'>+	spin_unlock(&amp;mchdev_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_init_emon(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 lcfuse;</div><div class='add'>+	u8 pxw[16];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Disable to program */</div><div class='add'>+	I915_WRITE(ECR, 0);</div><div class='add'>+	POSTING_READ(ECR);</div><div class='add'>+</div><div class='add'>+	/* Program energy weights for various events */</div><div class='add'>+	I915_WRITE(SDEW, 0x15040d00);</div><div class='add'>+	I915_WRITE(CSIEW0, 0x007f0000);</div><div class='add'>+	I915_WRITE(CSIEW1, 0x1e220004);</div><div class='add'>+	I915_WRITE(CSIEW2, 0x04000004);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 5; i++)</div><div class='add'>+		I915_WRITE(PEW + (i * 4), 0);</div><div class='add'>+	for (i = 0; i &lt; 3; i++)</div><div class='add'>+		I915_WRITE(DEW + (i * 4), 0);</div><div class='add'>+</div><div class='add'>+	/* Program P-state weights to account for frequency power adjustment */</div><div class='add'>+	for (i = 0; i &lt; 16; i++) {</div><div class='add'>+		u32 pxvidfreq = I915_READ(PXVFREQ_BASE + (i * 4));</div><div class='add'>+		unsigned long freq = intel_pxfreq(pxvidfreq);</div><div class='add'>+		unsigned long vid = (pxvidfreq &amp; PXVFREQ_PX_MASK) &gt;&gt;</div><div class='add'>+			PXVFREQ_PX_SHIFT;</div><div class='add'>+		unsigned long val;</div><div class='add'>+</div><div class='add'>+		val = vid * vid;</div><div class='add'>+		val *= (freq / 1000);</div><div class='add'>+		val *= 255;</div><div class='add'>+		val /= (127*127*900);</div><div class='add'>+		if (val &gt; 0xff)</div><div class='add'>+			DRM_ERROR("bad pxval: %ld\n", val);</div><div class='add'>+		pxw[i] = val;</div><div class='add'>+	}</div><div class='add'>+	/* Render standby states get 0 weight */</div><div class='add'>+	pxw[14] = 0;</div><div class='add'>+	pxw[15] = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		u32 val = (pxw[i*4] &lt;&lt; 24) | (pxw[(i*4)+1] &lt;&lt; 16) |</div><div class='add'>+			(pxw[(i*4)+2] &lt;&lt; 8) | (pxw[(i*4)+3]);</div><div class='add'>+		I915_WRITE(PXW + (i * 4), val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Adjust magic regs to magic values (more experimental results) */</div><div class='add'>+	I915_WRITE(OGW0, 0);</div><div class='add'>+	I915_WRITE(OGW1, 0);</div><div class='add'>+	I915_WRITE(EG0, 0x00007f00);</div><div class='add'>+	I915_WRITE(EG1, 0x0000000e);</div><div class='add'>+	I915_WRITE(EG2, 0x000e0000);</div><div class='add'>+	I915_WRITE(EG3, 0x68000300);</div><div class='add'>+	I915_WRITE(EG4, 0x42000000);</div><div class='add'>+	I915_WRITE(EG5, 0x00140031);</div><div class='add'>+	I915_WRITE(EG6, 0);</div><div class='add'>+	I915_WRITE(EG7, 0);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++)</div><div class='add'>+		I915_WRITE(PXWL + (i * 4), 0);</div><div class='add'>+</div><div class='add'>+	/* Enable PMON + select events */</div><div class='add'>+	I915_WRITE(ECR, 0x80000019);</div><div class='add'>+</div><div class='add'>+	lcfuse = I915_READ(LCFUSE02);</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;corr = (lcfuse &amp; LCFUSE_HIV_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ironlake_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	uint32_t dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE;</div><div class='add'>+</div><div class='add'>+	/* Required for FBC */</div><div class='add'>+	dspclk_gate |= DPFCUNIT_CLOCK_GATE_DISABLE |</div><div class='add'>+		DPFCRUNIT_CLOCK_GATE_DISABLE |</div><div class='add'>+		DPFDUNIT_CLOCK_GATE_DISABLE;</div><div class='add'>+	/* Required for CxSR */</div><div class='add'>+	dspclk_gate |= DPARBUNIT_CLOCK_GATE_DISABLE;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(PCH_3DCGDIS0,</div><div class='add'>+		   MARIUNIT_CLOCK_GATE_DISABLE |</div><div class='add'>+		   SVSMUNIT_CLOCK_GATE_DISABLE);</div><div class='add'>+	I915_WRITE(PCH_3DCGDIS1,</div><div class='add'>+		   VFMUNIT_CLOCK_GATE_DISABLE);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * According to the spec the following bits should be set in</div><div class='add'>+	 * order to enable memory self-refresh</div><div class='add'>+	 * The bit 22/21 of 0x42004</div><div class='add'>+	 * The bit 5 of 0x42020</div><div class='add'>+	 * The bit 15 of 0x45000</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(ILK_DISPLAY_CHICKEN2,</div><div class='add'>+		   (I915_READ(ILK_DISPLAY_CHICKEN2) |</div><div class='add'>+		    ILK_DPARB_GATE | ILK_VSDPFD_FULL));</div><div class='add'>+	I915_WRITE(ILK_DSPCLK_GATE,</div><div class='add'>+		   (I915_READ(ILK_DSPCLK_GATE) |</div><div class='add'>+		    ILK_DPARB_CLK_GATE));</div><div class='add'>+	I915_WRITE(DISP_ARB_CTL,</div><div class='add'>+		   (I915_READ(DISP_ARB_CTL) |</div><div class='add'>+		    DISP_FBC_WM_DIS));</div><div class='add'>+	I915_WRITE(WM3_LP_ILK, 0);</div><div class='add'>+	I915_WRITE(WM2_LP_ILK, 0);</div><div class='add'>+	I915_WRITE(WM1_LP_ILK, 0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Based on the document from hardware guys the following bits</div><div class='add'>+	 * should be set unconditionally in order to enable FBC.</div><div class='add'>+	 * The bit 22 of 0x42000</div><div class='add'>+	 * The bit 22 of 0x42004</div><div class='add'>+	 * The bit 7,8,9 of 0x42020.</div><div class='add'>+	 */</div><div class='add'>+	if (IS_IRONLAKE_M(dev)) {</div><div class='add'>+		I915_WRITE(ILK_DISPLAY_CHICKEN1,</div><div class='add'>+			   I915_READ(ILK_DISPLAY_CHICKEN1) |</div><div class='add'>+			   ILK_FBCQ_DIS);</div><div class='add'>+		I915_WRITE(ILK_DISPLAY_CHICKEN2,</div><div class='add'>+			   I915_READ(ILK_DISPLAY_CHICKEN2) |</div><div class='add'>+			   ILK_DPARB_GATE);</div><div class='add'>+		I915_WRITE(ILK_DSPCLK_GATE,</div><div class='add'>+			   I915_READ(ILK_DSPCLK_GATE) |</div><div class='add'>+			   ILK_DPFC_DIS1 |</div><div class='add'>+			   ILK_DPFC_DIS2 |</div><div class='add'>+			   ILK_CLK_FBC);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	I915_WRITE(ILK_DISPLAY_CHICKEN2,</div><div class='add'>+		   I915_READ(ILK_DISPLAY_CHICKEN2) |</div><div class='add'>+		   ILK_ELPIN_409_SELECT);</div><div class='add'>+	I915_WRITE(_3D_CHICKEN2,</div><div class='add'>+		   _3D_CHICKEN2_WM_READ_PIPELINED &lt;&lt; 16 |</div><div class='add'>+		   _3D_CHICKEN2_WM_READ_PIPELINED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gen6_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int pipe;</div><div class='add'>+	uint32_t dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(ILK_DISPLAY_CHICKEN2,</div><div class='add'>+		   I915_READ(ILK_DISPLAY_CHICKEN2) |</div><div class='add'>+		   ILK_ELPIN_409_SELECT);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(WM3_LP_ILK, 0);</div><div class='add'>+	I915_WRITE(WM2_LP_ILK, 0);</div><div class='add'>+	I915_WRITE(WM1_LP_ILK, 0);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(CACHE_MODE_0,</div><div class='add'>+		   _MASKED_BIT_DISABLE(CM0_STC_EVICT_DISABLE_LRA_SNB));</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GEN6_UCGCTL1,</div><div class='add'>+		   I915_READ(GEN6_UCGCTL1) |</div><div class='add'>+		   GEN6_BLBUNIT_CLOCK_GATE_DISABLE |</div><div class='add'>+		   GEN6_CSUNIT_CLOCK_GATE_DISABLE);</div><div class='add'>+</div><div class='add'>+	/* According to the BSpec vol1g, bit 12 (RCPBUNIT) clock</div><div class='add'>+	 * gating disable must be set.  Failure to set it results in</div><div class='add'>+	 * flickering pixels due to Z write ordering failures after</div><div class='add'>+	 * some amount of runtime in the Mesa "fire" demo, and Unigine</div><div class='add'>+	 * Sanctuary and Tropics, and apparently anything else with</div><div class='add'>+	 * alpha test or pixel discard.</div><div class='add'>+	 *</div><div class='add'>+	 * According to the spec, bit 11 (RCCUNIT) must also be set,</div><div class='add'>+	 * but we didn't debug actual testcases to find it out.</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(GEN6_UCGCTL2,</div><div class='add'>+		   GEN6_RCPBUNIT_CLOCK_GATE_DISABLE |</div><div class='add'>+		   GEN6_RCCUNIT_CLOCK_GATE_DISABLE);</div><div class='add'>+</div><div class='add'>+	/* Bspec says we need to always set all mask bits. */</div><div class='add'>+	I915_WRITE(_3D_CHICKEN, (0xFFFF &lt;&lt; 16) |</div><div class='add'>+		   _3D_CHICKEN_SF_DISABLE_FASTCLIP_CULL);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * According to the spec the following bits should be</div><div class='add'>+	 * set in order to enable memory self-refresh and fbc:</div><div class='add'>+	 * The bit21 and bit22 of 0x42000</div><div class='add'>+	 * The bit21 and bit22 of 0x42004</div><div class='add'>+	 * The bit5 and bit7 of 0x42020</div><div class='add'>+	 * The bit14 of 0x70180</div><div class='add'>+	 * The bit14 of 0x71180</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(ILK_DISPLAY_CHICKEN1,</div><div class='add'>+		   I915_READ(ILK_DISPLAY_CHICKEN1) |</div><div class='add'>+		   ILK_FBCQ_DIS | ILK_PABSTRETCH_DIS);</div><div class='add'>+	I915_WRITE(ILK_DISPLAY_CHICKEN2,</div><div class='add'>+		   I915_READ(ILK_DISPLAY_CHICKEN2) |</div><div class='add'>+		   ILK_DPARB_GATE | ILK_VSDPFD_FULL);</div><div class='add'>+	I915_WRITE(ILK_DSPCLK_GATE,</div><div class='add'>+		   I915_READ(ILK_DSPCLK_GATE) |</div><div class='add'>+		   ILK_DPARB_CLK_GATE  |</div><div class='add'>+		   ILK_DPFD_CLK_GATE);</div><div class='add'>+</div><div class='add'>+	for_each_pipe(pipe) {</div><div class='add'>+		I915_WRITE(DSPCNTR(pipe),</div><div class='add'>+			   I915_READ(DSPCNTR(pipe)) |</div><div class='add'>+			   DISPPLANE_TRICKLE_FEED_DISABLE);</div><div class='add'>+		intel_flush_display_plane(dev_priv, pipe);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv)</div><div class='add'>+{</div><div class='add'>+	uint32_t reg = I915_READ(GEN7_FF_THREAD_MODE);</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~GEN7_FF_SCHED_MASK;</div><div class='add'>+	reg |= GEN7_FF_TS_SCHED_HW;</div><div class='add'>+	reg |= GEN7_FF_VS_SCHED_HW;</div><div class='add'>+	reg |= GEN7_FF_DS_SCHED_HW;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(GEN7_FF_THREAD_MODE, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ivybridge_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int pipe;</div><div class='add'>+	uint32_t dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(WM3_LP_ILK, 0);</div><div class='add'>+	I915_WRITE(WM2_LP_ILK, 0);</div><div class='add'>+	I915_WRITE(WM1_LP_ILK, 0);</div><div class='add'>+</div><div class='add'>+	/* According to the spec, bit 13 (RCZUNIT) must be set on IVB.</div><div class='add'>+	 * This implements the WaDisableRCZUnitClockGating workaround.</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(IVB_CHICKEN3,</div><div class='add'>+		   CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE |</div><div class='add'>+		   CHICKEN3_DGMG_DONE_FIX_DISABLE);</div><div class='add'>+</div><div class='add'>+	/* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */</div><div class='add'>+	I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,</div><div class='add'>+		   GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);</div><div class='add'>+</div><div class='add'>+	/* WaApplyL3ControlAndL3ChickenMode requires those two on Ivy Bridge */</div><div class='add'>+	I915_WRITE(GEN7_L3CNTLREG1,</div><div class='add'>+			GEN7_WA_FOR_GEN7_L3_CONTROL);</div><div class='add'>+	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,</div><div class='add'>+			GEN7_WA_L3_CHICKEN_MODE);</div><div class='add'>+</div><div class='add'>+	/* This is required by WaCatErrorRejectionIssue */</div><div class='add'>+	I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,</div><div class='add'>+			I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |</div><div class='add'>+			GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);</div><div class='add'>+</div><div class='add'>+	for_each_pipe(pipe) {</div><div class='add'>+		I915_WRITE(DSPCNTR(pipe),</div><div class='add'>+			   I915_READ(DSPCNTR(pipe)) |</div><div class='add'>+			   DISPPLANE_TRICKLE_FEED_DISABLE);</div><div class='add'>+		intel_flush_display_plane(dev_priv, pipe);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gen7_setup_fixed_func_scheduler(dev_priv);</div><div class='add'>+</div><div class='add'>+	/* WaDisable4x2SubspanOptimization */</div><div class='add'>+	I915_WRITE(CACHE_MODE_1,</div><div class='add'>+		   _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void valleyview_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int pipe;</div><div class='add'>+	uint32_t dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(WM3_LP_ILK, 0);</div><div class='add'>+	I915_WRITE(WM2_LP_ILK, 0);</div><div class='add'>+	I915_WRITE(WM1_LP_ILK, 0);</div><div class='add'>+</div><div class='add'>+	/* According to the spec, bit 13 (RCZUNIT) must be set on IVB.</div><div class='add'>+	 * This implements the WaDisableRCZUnitClockGating workaround.</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);</div><div class='add'>+</div><div class='add'>+	I915_WRITE(IVB_CHICKEN3,</div><div class='add'>+		   CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE |</div><div class='add'>+		   CHICKEN3_DGMG_DONE_FIX_DISABLE);</div><div class='add'>+</div><div class='add'>+	/* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */</div><div class='add'>+	I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,</div><div class='add'>+		   GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);</div><div class='add'>+</div><div class='add'>+	/* WaApplyL3ControlAndL3ChickenMode requires those two on Ivy Bridge */</div><div class='add'>+	I915_WRITE(GEN7_L3CNTLREG1, GEN7_WA_FOR_GEN7_L3_CONTROL);</div><div class='add'>+	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE);</div><div class='add'>+</div><div class='add'>+	/* This is required by WaCatErrorRejectionIssue */</div><div class='add'>+	I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,</div><div class='add'>+		   I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |</div><div class='add'>+		   GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);</div><div class='add'>+</div><div class='add'>+	for_each_pipe(pipe) {</div><div class='add'>+		I915_WRITE(DSPCNTR(pipe),</div><div class='add'>+			   I915_READ(DSPCNTR(pipe)) |</div><div class='add'>+			   DISPPLANE_TRICKLE_FEED_DISABLE);</div><div class='add'>+		intel_flush_display_plane(dev_priv, pipe);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	I915_WRITE(CACHE_MODE_1,</div><div class='add'>+		   _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void g4x_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	uint32_t dspclk_gate;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(RENCLK_GATE_D1, 0);</div><div class='add'>+	I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE |</div><div class='add'>+		   GS_UNIT_CLOCK_GATE_DISABLE |</div><div class='add'>+		   CL_UNIT_CLOCK_GATE_DISABLE);</div><div class='add'>+	I915_WRITE(RAMCLK_GATE_D, 0);</div><div class='add'>+	dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE |</div><div class='add'>+		OVRUNIT_CLOCK_GATE_DISABLE |</div><div class='add'>+		OVCUNIT_CLOCK_GATE_DISABLE;</div><div class='add'>+	if (IS_GM45(dev))</div><div class='add'>+		dspclk_gate |= DSSUNIT_CLOCK_GATE_DISABLE;</div><div class='add'>+	I915_WRITE(DSPCLK_GATE_D, dspclk_gate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void crestline_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(RENCLK_GATE_D1, I965_RCC_CLOCK_GATE_DISABLE);</div><div class='add'>+	I915_WRITE(RENCLK_GATE_D2, 0);</div><div class='add'>+	I915_WRITE(DSPCLK_GATE_D, 0);</div><div class='add'>+	I915_WRITE(RAMCLK_GATE_D, 0);</div><div class='add'>+	I915_WRITE16(DEUC, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void broadwater_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(RENCLK_GATE_D1, I965_RCZ_CLOCK_GATE_DISABLE |</div><div class='add'>+		   I965_RCC_CLOCK_GATE_DISABLE |</div><div class='add'>+		   I965_RCPB_CLOCK_GATE_DISABLE |</div><div class='add'>+		   I965_ISC_CLOCK_GATE_DISABLE |</div><div class='add'>+		   I965_FBC_CLOCK_GATE_DISABLE);</div><div class='add'>+	I915_WRITE(RENCLK_GATE_D2, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gen3_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 dstate = I915_READ(D_STATE);</div><div class='add'>+</div><div class='add'>+	dstate |= DSTATE_PLL_D3_OFF | DSTATE_GFX_CLOCK_GATING |</div><div class='add'>+		DSTATE_DOT_CLOCK_GATING;</div><div class='add'>+	I915_WRITE(D_STATE, dstate);</div><div class='add'>+</div><div class='add'>+	if (IS_PINEVIEW(dev))</div><div class='add'>+		I915_WRITE(ECOSKPD, _MASKED_BIT_ENABLE(ECO_GATING_CX_ONLY));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i85x_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(RENCLK_GATE_D1, SV_CLOCK_GATE_DISABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void i830_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	I915_WRITE(DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ibx_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * On Ibex Peak and Cougar Point, we need to disable clock</div><div class='add'>+	 * gating for the panel power sequencer or it will fail to</div><div class='add'>+	 * start up when no ports are active.</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cpt_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	int pipe;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * On Ibex Peak and Cougar Point, we need to disable clock</div><div class='add'>+	 * gating for the panel power sequencer or it will fail to</div><div class='add'>+	 * start up when no ports are active.</div><div class='add'>+	 */</div><div class='add'>+	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);</div><div class='add'>+	I915_WRITE(SOUTH_CHICKEN2, I915_READ(SOUTH_CHICKEN2) |</div><div class='add'>+		   DPLS_EDP_PPS_FIX_DIS);</div><div class='add'>+	/* Without this, mode sets may fail silently on FDI */</div><div class='add'>+	for_each_pipe(pipe)</div><div class='add'>+		I915_WRITE(TRANS_CHICKEN2(pipe), TRANS_AUTOTRAIN_GEN_STALL_DIS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_init_clock_gating(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;display.init_clock_gating(dev);</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;display.init_pch_clock_gating)</div><div class='add'>+		dev_priv-&gt;display.init_pch_clock_gating(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gen6_sanitize_pm(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	u32 limits, delay, old;</div><div class='add'>+</div><div class='add'>+	gen6_gt_force_wake_get(dev_priv);</div><div class='add'>+</div><div class='add'>+	old = limits = I915_READ(GEN6_RP_INTERRUPT_LIMITS);</div><div class='add'>+	/* Make sure we continue to get interrupts</div><div class='add'>+	 * until we hit the minimum or maximum frequencies.</div><div class='add'>+	 */</div><div class='add'>+	limits &amp;= ~(0x3f &lt;&lt; 16 | 0x3f &lt;&lt; 24);</div><div class='add'>+	delay = dev_priv-&gt;cur_delay;</div><div class='add'>+	if (delay &lt; dev_priv-&gt;max_delay)</div><div class='add'>+		limits |= (dev_priv-&gt;max_delay &amp; 0x3f) &lt;&lt; 24;</div><div class='add'>+	if (delay &gt; dev_priv-&gt;min_delay)</div><div class='add'>+		limits |= (dev_priv-&gt;min_delay &amp; 0x3f) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	if (old != limits) {</div><div class='add'>+		/* Note that the known failure case is to read back 0. */</div><div class='add'>+		DRM_DEBUG_DRIVER("Power management discrepancy: GEN6_RP_INTERRUPT_LIMITS "</div><div class='add'>+				 "expected %08x, was %08x\n", limits, old);</div><div class='add'>+		I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gen6_gt_force_wake_put(dev_priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_sanitize_pm(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;display.sanitize_pm)</div><div class='add'>+		dev_priv-&gt;display.sanitize_pm(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Starting with Haswell, we have different power wells for</div><div class='add'>+ * different parts of the GPU. This attempts to enable them all.</div><div class='add'>+ */</div><div class='add'>+void intel_init_power_wells(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	unsigned long power_wells[] = {</div><div class='add'>+		HSW_PWR_WELL_CTL1,</div><div class='add'>+		HSW_PWR_WELL_CTL2,</div><div class='add'>+		HSW_PWR_WELL_CTL4</div><div class='add'>+	};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!IS_HASWELL(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(power_wells); i++) {</div><div class='add'>+		int well = I915_READ(power_wells[i]);</div><div class='add'>+</div><div class='add'>+		if ((well &amp; HSW_PWR_WELL_STATE) == 0) {</div><div class='add'>+			I915_WRITE(power_wells[i], well &amp; HSW_PWR_WELL_ENABLE);</div><div class='add'>+			if (wait_for(I915_READ(power_wells[i] &amp; HSW_PWR_WELL_STATE), 20))</div><div class='add'>+				DRM_ERROR("Error enabling power well %lx\n", power_wells[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set up chip specific power management-related functions */</div><div class='add'>+void intel_init_pm(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (I915_HAS_FBC(dev)) {</div><div class='add'>+		if (HAS_PCH_SPLIT(dev)) {</div><div class='add'>+			dev_priv-&gt;display.fbc_enabled = ironlake_fbc_enabled;</div><div class='add'>+			dev_priv-&gt;display.enable_fbc = ironlake_enable_fbc;</div><div class='add'>+			dev_priv-&gt;display.disable_fbc = ironlake_disable_fbc;</div><div class='add'>+		} else if (IS_GM45(dev)) {</div><div class='add'>+			dev_priv-&gt;display.fbc_enabled = g4x_fbc_enabled;</div><div class='add'>+			dev_priv-&gt;display.enable_fbc = g4x_enable_fbc;</div><div class='add'>+			dev_priv-&gt;display.disable_fbc = g4x_disable_fbc;</div><div class='add'>+		} else if (IS_CRESTLINE(dev)) {</div><div class='add'>+			dev_priv-&gt;display.fbc_enabled = i8xx_fbc_enabled;</div><div class='add'>+			dev_priv-&gt;display.enable_fbc = i8xx_enable_fbc;</div><div class='add'>+			dev_priv-&gt;display.disable_fbc = i8xx_disable_fbc;</div><div class='add'>+		}</div><div class='add'>+		/* 855GM needs testing */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* For cxsr */</div><div class='add'>+	if (IS_PINEVIEW(dev))</div><div class='add'>+		i915_pineview_get_mem_freq(dev);</div><div class='add'>+	else if (IS_GEN5(dev))</div><div class='add'>+		i915_ironlake_get_mem_freq(dev);</div><div class='add'>+</div><div class='add'>+	/* For FIFO watermark updates */</div><div class='add'>+	if (HAS_PCH_SPLIT(dev)) {</div><div class='add'>+		dev_priv-&gt;display.force_wake_get = __gen6_gt_force_wake_get;</div><div class='add'>+		dev_priv-&gt;display.force_wake_put = __gen6_gt_force_wake_put;</div><div class='add'>+</div><div class='add'>+		/* IVB configs may use multi-threaded forcewake */</div><div class='add'>+		if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) {</div><div class='add'>+			u32	ecobus;</div><div class='add'>+</div><div class='add'>+			/* A small trick here - if the bios hasn't configured MT forcewake,</div><div class='add'>+			 * and if the device is in RC6, then force_wake_mt_get will not wake</div><div class='add'>+			 * the device and the ECOBUS read will return zero. Which will be</div><div class='add'>+			 * (correctly) interpreted by the test below as MT forcewake being</div><div class='add'>+			 * disabled.</div><div class='add'>+			 */</div><div class='add'>+			mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+			__gen6_gt_force_wake_mt_get(dev_priv);</div><div class='add'>+			ecobus = I915_READ_NOTRACE(ECOBUS);</div><div class='add'>+			__gen6_gt_force_wake_mt_put(dev_priv);</div><div class='add'>+			mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+</div><div class='add'>+			if (ecobus &amp; FORCEWAKE_MT_ENABLE) {</div><div class='add'>+				DRM_DEBUG_KMS("Using MT version of forcewake\n");</div><div class='add'>+				dev_priv-&gt;display.force_wake_get =</div><div class='add'>+					__gen6_gt_force_wake_mt_get;</div><div class='add'>+				dev_priv-&gt;display.force_wake_put =</div><div class='add'>+					__gen6_gt_force_wake_mt_put;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (HAS_PCH_IBX(dev))</div><div class='add'>+			dev_priv-&gt;display.init_pch_clock_gating = ibx_init_clock_gating;</div><div class='add'>+		else if (HAS_PCH_CPT(dev))</div><div class='add'>+			dev_priv-&gt;display.init_pch_clock_gating = cpt_init_clock_gating;</div><div class='add'>+</div><div class='add'>+		if (IS_GEN5(dev)) {</div><div class='add'>+			if (I915_READ(MLTR_ILK) &amp; ILK_SRLT_MASK)</div><div class='add'>+				dev_priv-&gt;display.update_wm = ironlake_update_wm;</div><div class='add'>+			else {</div><div class='add'>+				DRM_DEBUG_KMS("Failed to get proper latency. "</div><div class='add'>+					      "Disable CxSR\n");</div><div class='add'>+				dev_priv-&gt;display.update_wm = NULL;</div><div class='add'>+			}</div><div class='add'>+			dev_priv-&gt;display.init_clock_gating = ironlake_init_clock_gating;</div><div class='add'>+		} else if (IS_GEN6(dev)) {</div><div class='add'>+			if (SNB_READ_WM0_LATENCY()) {</div><div class='add'>+				dev_priv-&gt;display.update_wm = sandybridge_update_wm;</div><div class='add'>+				dev_priv-&gt;display.update_sprite_wm = sandybridge_update_sprite_wm;</div><div class='add'>+			} else {</div><div class='add'>+				DRM_DEBUG_KMS("Failed to read display plane latency. "</div><div class='add'>+					      "Disable CxSR\n");</div><div class='add'>+				dev_priv-&gt;display.update_wm = NULL;</div><div class='add'>+			}</div><div class='add'>+			dev_priv-&gt;display.init_clock_gating = gen6_init_clock_gating;</div><div class='add'>+			dev_priv-&gt;display.sanitize_pm = gen6_sanitize_pm;</div><div class='add'>+		} else if (IS_IVYBRIDGE(dev)) {</div><div class='add'>+			/* FIXME: detect B0+ stepping and use auto training */</div><div class='add'>+			if (SNB_READ_WM0_LATENCY()) {</div><div class='add'>+				dev_priv-&gt;display.update_wm = sandybridge_update_wm;</div><div class='add'>+				dev_priv-&gt;display.update_sprite_wm = sandybridge_update_sprite_wm;</div><div class='add'>+			} else {</div><div class='add'>+				DRM_DEBUG_KMS("Failed to read display plane latency. "</div><div class='add'>+					      "Disable CxSR\n");</div><div class='add'>+				dev_priv-&gt;display.update_wm = NULL;</div><div class='add'>+			}</div><div class='add'>+			dev_priv-&gt;display.init_clock_gating = ivybridge_init_clock_gating;</div><div class='add'>+			dev_priv-&gt;display.sanitize_pm = gen6_sanitize_pm;</div><div class='add'>+		} else if (IS_HASWELL(dev)) {</div><div class='add'>+			if (SNB_READ_WM0_LATENCY()) {</div><div class='add'>+				dev_priv-&gt;display.update_wm = sandybridge_update_wm;</div><div class='add'>+				dev_priv-&gt;display.update_sprite_wm = sandybridge_update_sprite_wm;</div><div class='add'>+				dev_priv-&gt;display.update_linetime_wm = haswell_update_linetime_wm;</div><div class='add'>+			} else {</div><div class='add'>+				DRM_DEBUG_KMS("Failed to read display plane latency. "</div><div class='add'>+					      "Disable CxSR\n");</div><div class='add'>+				dev_priv-&gt;display.update_wm = NULL;</div><div class='add'>+			}</div><div class='add'>+			dev_priv-&gt;display.init_clock_gating = ivybridge_init_clock_gating;</div><div class='add'>+			dev_priv-&gt;display.sanitize_pm = gen6_sanitize_pm;</div><div class='add'>+		} else</div><div class='add'>+			dev_priv-&gt;display.update_wm = NULL;</div><div class='add'>+	} else if (IS_VALLEYVIEW(dev)) {</div><div class='add'>+		dev_priv-&gt;display.update_wm = valleyview_update_wm;</div><div class='add'>+		dev_priv-&gt;display.init_clock_gating =</div><div class='add'>+			valleyview_init_clock_gating;</div><div class='add'>+		dev_priv-&gt;display.force_wake_get = vlv_force_wake_get;</div><div class='add'>+		dev_priv-&gt;display.force_wake_put = vlv_force_wake_put;</div><div class='add'>+	} else if (IS_PINEVIEW(dev)) {</div><div class='add'>+		if (!intel_get_cxsr_latency(IS_PINEVIEW_G(dev),</div><div class='add'>+					    dev_priv-&gt;is_ddr3,</div><div class='add'>+					    dev_priv-&gt;fsb_freq,</div><div class='add'>+					    dev_priv-&gt;mem_freq)) {</div><div class='add'>+			DRM_INFO("failed to find known CxSR latency "</div><div class='add'>+				 "(found ddr%s fsb freq %d, mem freq %d), "</div><div class='add'>+				 "disabling CxSR\n",</div><div class='add'>+				 (dev_priv-&gt;is_ddr3 == 1) ? "3" : "2",</div><div class='add'>+				 dev_priv-&gt;fsb_freq, dev_priv-&gt;mem_freq);</div><div class='add'>+			/* Disable CxSR and never update its watermark again */</div><div class='add'>+			pineview_disable_cxsr(dev);</div><div class='add'>+			dev_priv-&gt;display.update_wm = NULL;</div><div class='add'>+		} else</div><div class='add'>+			dev_priv-&gt;display.update_wm = pineview_update_wm;</div><div class='add'>+		dev_priv-&gt;display.init_clock_gating = gen3_init_clock_gating;</div><div class='add'>+	} else if (IS_G4X(dev)) {</div><div class='add'>+		dev_priv-&gt;display.update_wm = g4x_update_wm;</div><div class='add'>+		dev_priv-&gt;display.init_clock_gating = g4x_init_clock_gating;</div><div class='add'>+	} else if (IS_GEN4(dev)) {</div><div class='add'>+		dev_priv-&gt;display.update_wm = i965_update_wm;</div><div class='add'>+		if (IS_CRESTLINE(dev))</div><div class='add'>+			dev_priv-&gt;display.init_clock_gating = crestline_init_clock_gating;</div><div class='add'>+		else if (IS_BROADWATER(dev))</div><div class='add'>+			dev_priv-&gt;display.init_clock_gating = broadwater_init_clock_gating;</div><div class='add'>+	} else if (IS_GEN3(dev)) {</div><div class='add'>+		dev_priv-&gt;display.update_wm = i9xx_update_wm;</div><div class='add'>+		dev_priv-&gt;display.get_fifo_size = i9xx_get_fifo_size;</div><div class='add'>+		dev_priv-&gt;display.init_clock_gating = gen3_init_clock_gating;</div><div class='add'>+	} else if (IS_I865G(dev)) {</div><div class='add'>+		dev_priv-&gt;display.update_wm = i830_update_wm;</div><div class='add'>+		dev_priv-&gt;display.init_clock_gating = i85x_init_clock_gating;</div><div class='add'>+		dev_priv-&gt;display.get_fifo_size = i830_get_fifo_size;</div><div class='add'>+	} else if (IS_I85X(dev)) {</div><div class='add'>+		dev_priv-&gt;display.update_wm = i9xx_update_wm;</div><div class='add'>+		dev_priv-&gt;display.get_fifo_size = i85x_get_fifo_size;</div><div class='add'>+		dev_priv-&gt;display.init_clock_gating = i85x_init_clock_gating;</div><div class='add'>+	} else {</div><div class='add'>+		dev_priv-&gt;display.update_wm = i830_update_wm;</div><div class='add'>+		dev_priv-&gt;display.init_clock_gating = i830_init_clock_gating;</div><div class='add'>+		if (IS_845G(dev))</div><div class='add'>+			dev_priv-&gt;display.get_fifo_size = i845_get_fifo_size;</div><div class='add'>+		else</div><div class='add'>+			dev_priv-&gt;display.get_fifo_size = i830_get_fifo_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We attempt to init the necessary power wells early in the initialization</div><div class='add'>+	 * time, so the subsystems that expect power to be enabled can work.</div><div class='add'>+	 */</div><div class='add'>+	intel_init_power_wells(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c<br/>index 80fce51e2f43..e5b84ff89ca5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_ringbuffer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_ringbuffer.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_ringbuffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_ringbuffer.c</a></div><div class='hunk'>@@ -53,9 +53,35 @@ static inline int ring_space(struct intel_ring_buffer *ring)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-render_ring_flush(struct intel_ring_buffer *ring,</div><div class='del'>-		  u32	invalidate_domains,</div><div class='del'>-		  u32	flush_domains)</div><div class='add'>+gen2_render_ring_flush(struct intel_ring_buffer *ring,</div><div class='add'>+		       u32	invalidate_domains,</div><div class='add'>+		       u32	flush_domains)</div><div class='add'>+{</div><div class='add'>+	u32 cmd;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cmd = MI_FLUSH;</div><div class='add'>+	if (((invalidate_domains|flush_domains) &amp; I915_GEM_DOMAIN_RENDER) == 0)</div><div class='add'>+		cmd |= MI_NO_WRITE_FLUSH;</div><div class='add'>+</div><div class='add'>+	if (invalidate_domains &amp; I915_GEM_DOMAIN_SAMPLER)</div><div class='add'>+		cmd |= MI_READ_FLUSH;</div><div class='add'>+</div><div class='add'>+	ret = intel_ring_begin(ring, 2);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	intel_ring_emit(ring, cmd);</div><div class='add'>+	intel_ring_emit(ring, MI_NOOP);</div><div class='add'>+	intel_ring_advance(ring);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+gen4_render_ring_flush(struct intel_ring_buffer *ring,</div><div class='add'>+		       u32	invalidate_domains,</div><div class='add'>+		       u32	flush_domains)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = ring-&gt;dev;</div><div class='ctx'> 	u32 cmd;</div><div class='hunk'>@@ -90,17 +116,8 @@ render_ring_flush(struct intel_ring_buffer *ring,</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	cmd = MI_FLUSH | MI_NO_WRITE_FLUSH;</div><div class='del'>-	if ((invalidate_domains|flush_domains) &amp;</div><div class='del'>-	    I915_GEM_DOMAIN_RENDER)</div><div class='add'>+	if ((invalidate_domains|flush_domains) &amp; I915_GEM_DOMAIN_RENDER)</div><div class='ctx'> 		cmd &amp;= ~MI_NO_WRITE_FLUSH;</div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen &lt; 4) {</div><div class='del'>-		/*</div><div class='del'>-		 * On the 965, the sampler cache always gets flushed</div><div class='del'>-		 * and this bit is reserved.</div><div class='del'>-		 */</div><div class='del'>-		if (invalidate_domains &amp; I915_GEM_DOMAIN_SAMPLER)</div><div class='del'>-			cmd |= MI_READ_FLUSH;</div><div class='del'>-	}</div><div class='ctx'> 	if (invalidate_domains &amp; I915_GEM_DOMAIN_INSTRUCTION)</div><div class='ctx'> 		cmd |= MI_EXE_FLUSH;</div><div class='ctx'> </div><div class='hunk'>@@ -249,10 +266,15 @@ u32 intel_ring_get_active_head(struct intel_ring_buffer *ring)</div><div class='ctx'> </div><div class='ctx'> static int init_ring_common(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='del'>-	drm_i915_private_t *dev_priv = ring-&gt;dev-&gt;dev_private;</div><div class='add'>+	struct drm_device *dev = ring-&gt;dev;</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_i915_gem_object *obj = ring-&gt;obj;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> 	u32 head;</div><div class='ctx'> </div><div class='add'>+	if (HAS_FORCE_WAKE(dev))</div><div class='add'>+		gen6_gt_force_wake_get(dev_priv);</div><div class='add'>+</div><div class='ctx'> 	/* Stop the ring if it's running. */</div><div class='ctx'> 	I915_WRITE_CTL(ring, 0);</div><div class='ctx'> 	I915_WRITE_HEAD(ring, 0);</div><div class='hunk'>@@ -290,9 +312,9 @@ static int init_ring_common(struct intel_ring_buffer *ring)</div><div class='ctx'> 			| RING_VALID);</div><div class='ctx'> </div><div class='ctx'> 	/* If the head is still not zero, the ring is dead */</div><div class='del'>-	if ((I915_READ_CTL(ring) &amp; RING_VALID) == 0 ||</div><div class='del'>-	    I915_READ_START(ring) != obj-&gt;gtt_offset ||</div><div class='del'>-	    (I915_READ_HEAD(ring) &amp; HEAD_ADDR) != 0) {</div><div class='add'>+	if (wait_for((I915_READ_CTL(ring) &amp; RING_VALID) != 0 &amp;&amp;</div><div class='add'>+		     I915_READ_START(ring) == obj-&gt;gtt_offset &amp;&amp;</div><div class='add'>+		     (I915_READ_HEAD(ring) &amp; HEAD_ADDR) == 0, 50)) {</div><div class='ctx'> 		DRM_ERROR("%s initialization failed "</div><div class='ctx'> 				"ctl %08x head %08x tail %08x start %08x\n",</div><div class='ctx'> 				ring-&gt;name,</div><div class='hunk'>@@ -300,7 +322,8 @@ static int init_ring_common(struct intel_ring_buffer *ring)</div><div class='ctx'> 				I915_READ_HEAD(ring),</div><div class='ctx'> 				I915_READ_TAIL(ring),</div><div class='ctx'> 				I915_READ_START(ring));</div><div class='del'>-		return -EIO;</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!drm_core_check_feature(ring-&gt;dev, DRIVER_MODESET))</div><div class='hunk'>@@ -309,9 +332,14 @@ static int init_ring_common(struct intel_ring_buffer *ring)</div><div class='ctx'> 		ring-&gt;head = I915_READ_HEAD(ring);</div><div class='ctx'> 		ring-&gt;tail = I915_READ_TAIL(ring) &amp; TAIL_ADDR;</div><div class='ctx'> 		ring-&gt;space = ring_space(ring);</div><div class='add'>+		ring-&gt;last_retired_head = -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+out:</div><div class='add'>+	if (HAS_FORCE_WAKE(dev))</div><div class='add'>+		gen6_gt_force_wake_put(dev_priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -384,12 +412,11 @@ static int init_render_ring(struct intel_ring_buffer *ring)</div><div class='ctx'> 	int ret = init_ring_common(ring);</div><div class='ctx'> </div><div class='ctx'> 	if (INTEL_INFO(dev)-&gt;gen &gt; 3) {</div><div class='del'>-		int mode = VS_TIMER_DISPATCH &lt;&lt; 16 | VS_TIMER_DISPATCH;</div><div class='del'>-		I915_WRITE(MI_MODE, mode);</div><div class='add'>+		I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(VS_TIMER_DISPATCH));</div><div class='ctx'> 		if (IS_GEN7(dev))</div><div class='ctx'> 			I915_WRITE(GFX_MODE_GEN7,</div><div class='del'>-				   GFX_MODE_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) |</div><div class='del'>-				   GFX_MODE_ENABLE(GFX_REPLAY_MODE));</div><div class='add'>+				   _MASKED_BIT_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) |</div><div class='add'>+				   _MASKED_BIT_ENABLE(GFX_REPLAY_MODE));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (INTEL_INFO(dev)-&gt;gen &gt;= 5) {</div><div class='hunk'>@@ -398,19 +425,19 @@ static int init_render_ring(struct intel_ring_buffer *ring)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (INTEL_INFO(dev)-&gt;gen &gt;= 6) {</div><div class='del'>-		I915_WRITE(INSTPM,</div><div class='del'>-			   INSTPM_FORCE_ORDERING &lt;&lt; 16 | INSTPM_FORCE_ORDERING);</div><div class='del'>-</div><div class='add'>+	if (IS_GEN6(dev)) {</div><div class='ctx'> 		/* From the Sandybridge PRM, volume 1 part 3, page 24:</div><div class='ctx'> 		 * "If this bit is set, STCunit will have LRA as replacement</div><div class='ctx'> 		 *  policy. [...] This bit must be reset.  LRA replacement</div><div class='ctx'> 		 *  policy is not supported."</div><div class='ctx'> 		 */</div><div class='ctx'> 		I915_WRITE(CACHE_MODE_0,</div><div class='del'>-			   CM0_STC_EVICT_DISABLE_LRA_SNB &lt;&lt; CM0_MASK_SHIFT);</div><div class='add'>+			   _MASKED_BIT_DISABLE(CM0_STC_EVICT_DISABLE_LRA_SNB));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &gt;= 6)</div><div class='add'>+		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -480,21 +507,30 @@ gen6_add_request(struct intel_ring_buffer *ring,</div><div class='ctx'>  * @seqno - seqno which the waiter will block on</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='del'>-intel_ring_sync(struct intel_ring_buffer *waiter,</div><div class='del'>-		struct intel_ring_buffer *signaller,</div><div class='del'>-		int ring,</div><div class='del'>-		u32 seqno)</div><div class='add'>+gen6_ring_sync(struct intel_ring_buffer *waiter,</div><div class='add'>+	       struct intel_ring_buffer *signaller,</div><div class='add'>+	       u32 seqno)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u32 dw1 = MI_SEMAPHORE_MBOX |</div><div class='ctx'> 		  MI_SEMAPHORE_COMPARE |</div><div class='ctx'> 		  MI_SEMAPHORE_REGISTER;</div><div class='ctx'> </div><div class='add'>+	/* Throughout all of the GEM code, seqno passed implies our current</div><div class='add'>+	 * seqno is &gt;= the last seqno executed. However for hardware the</div><div class='add'>+	 * comparison is strictly greater than.</div><div class='add'>+	 */</div><div class='add'>+	seqno -= 1;</div><div class='add'>+</div><div class='add'>+	WARN_ON(signaller-&gt;semaphore_register[waiter-&gt;id] ==</div><div class='add'>+		MI_SEMAPHORE_SYNC_INVALID);</div><div class='add'>+</div><div class='ctx'> 	ret = intel_ring_begin(waiter, 4);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	intel_ring_emit(waiter, dw1 | signaller-&gt;semaphore_register[ring]);</div><div class='add'>+	intel_ring_emit(waiter,</div><div class='add'>+			dw1 | signaller-&gt;semaphore_register[waiter-&gt;id]);</div><div class='ctx'> 	intel_ring_emit(waiter, seqno);</div><div class='ctx'> 	intel_ring_emit(waiter, 0);</div><div class='ctx'> 	intel_ring_emit(waiter, MI_NOOP);</div><div class='hunk'>@@ -503,47 +539,6 @@ intel_ring_sync(struct intel_ring_buffer *waiter,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* VCS-&gt;RCS (RVSYNC) or BCS-&gt;RCS (RBSYNC) */</div><div class='del'>-int</div><div class='del'>-render_ring_sync_to(struct intel_ring_buffer *waiter,</div><div class='del'>-		    struct intel_ring_buffer *signaller,</div><div class='del'>-		    u32 seqno)</div><div class='del'>-{</div><div class='del'>-	WARN_ON(signaller-&gt;semaphore_register[RCS] == MI_SEMAPHORE_SYNC_INVALID);</div><div class='del'>-	return intel_ring_sync(waiter,</div><div class='del'>-			       signaller,</div><div class='del'>-			       RCS,</div><div class='del'>-			       seqno);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* RCS-&gt;VCS (VRSYNC) or BCS-&gt;VCS (VBSYNC) */</div><div class='del'>-int</div><div class='del'>-gen6_bsd_ring_sync_to(struct intel_ring_buffer *waiter,</div><div class='del'>-		      struct intel_ring_buffer *signaller,</div><div class='del'>-		      u32 seqno)</div><div class='del'>-{</div><div class='del'>-	WARN_ON(signaller-&gt;semaphore_register[VCS] == MI_SEMAPHORE_SYNC_INVALID);</div><div class='del'>-	return intel_ring_sync(waiter,</div><div class='del'>-			       signaller,</div><div class='del'>-			       VCS,</div><div class='del'>-			       seqno);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* RCS-&gt;BCS (BRSYNC) or VCS-&gt;BCS (BVSYNC) */</div><div class='del'>-int</div><div class='del'>-gen6_blt_ring_sync_to(struct intel_ring_buffer *waiter,</div><div class='del'>-		      struct intel_ring_buffer *signaller,</div><div class='del'>-		      u32 seqno)</div><div class='del'>-{</div><div class='del'>-	WARN_ON(signaller-&gt;semaphore_register[BCS] == MI_SEMAPHORE_SYNC_INVALID);</div><div class='del'>-	return intel_ring_sync(waiter,</div><div class='del'>-			       signaller,</div><div class='del'>-			       BCS,</div><div class='del'>-			       seqno);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> #define PIPE_CONTROL_FLUSH(ring__, addr__)					\</div><div class='ctx'> do {									\</div><div class='ctx'> 	intel_ring_emit(ring__, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE |		\</div><div class='hunk'>@@ -605,27 +600,6 @@ pc_render_add_request(struct intel_ring_buffer *ring,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-render_ring_add_request(struct intel_ring_buffer *ring,</div><div class='del'>-			u32 *result)</div><div class='del'>-{</div><div class='del'>-	u32 seqno = i915_gem_next_request_seqno(ring);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = intel_ring_begin(ring, 4);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);</div><div class='del'>-	intel_ring_emit(ring, I915_GEM_HWS_INDEX &lt;&lt; MI_STORE_DWORD_INDEX_SHIFT);</div><div class='del'>-	intel_ring_emit(ring, seqno);</div><div class='del'>-	intel_ring_emit(ring, MI_USER_INTERRUPT);</div><div class='del'>-	intel_ring_advance(ring);</div><div class='del'>-</div><div class='del'>-	*result = seqno;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static u32</div><div class='ctx'> gen6_ring_get_seqno(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='hunk'>@@ -652,76 +626,115 @@ pc_render_get_seqno(struct intel_ring_buffer *ring)</div><div class='ctx'> 	return pc-&gt;cpu_page[0];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-ironlake_enable_irq(drm_i915_private_t *dev_priv, u32 mask)</div><div class='add'>+static bool</div><div class='add'>+gen5_ring_get_irq(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='del'>-	dev_priv-&gt;gt_irq_mask &amp;= ~mask;</div><div class='del'>-	I915_WRITE(GTIMR, dev_priv-&gt;gt_irq_mask);</div><div class='del'>-	POSTING_READ(GTIMR);</div><div class='add'>+	struct drm_device *dev = ring-&gt;dev;</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;irq_enabled)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='add'>+	if (ring-&gt;irq_refcount++ == 0) {</div><div class='add'>+		dev_priv-&gt;gt_irq_mask &amp;= ~ring-&gt;irq_enable_mask;</div><div class='add'>+		I915_WRITE(GTIMR, dev_priv-&gt;gt_irq_mask);</div><div class='add'>+		POSTING_READ(GTIMR);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-ironlake_disable_irq(drm_i915_private_t *dev_priv, u32 mask)</div><div class='add'>+gen5_ring_put_irq(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='del'>-	dev_priv-&gt;gt_irq_mask |= mask;</div><div class='del'>-	I915_WRITE(GTIMR, dev_priv-&gt;gt_irq_mask);</div><div class='del'>-	POSTING_READ(GTIMR);</div><div class='add'>+	struct drm_device *dev = ring-&gt;dev;</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='add'>+	if (--ring-&gt;irq_refcount == 0) {</div><div class='add'>+		dev_priv-&gt;gt_irq_mask |= ring-&gt;irq_enable_mask;</div><div class='add'>+		I915_WRITE(GTIMR, dev_priv-&gt;gt_irq_mask);</div><div class='add'>+		POSTING_READ(GTIMR);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask)</div><div class='add'>+static bool</div><div class='add'>+i9xx_ring_get_irq(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='del'>-	dev_priv-&gt;irq_mask &amp;= ~mask;</div><div class='del'>-	I915_WRITE(IMR, dev_priv-&gt;irq_mask);</div><div class='del'>-	POSTING_READ(IMR);</div><div class='add'>+	struct drm_device *dev = ring-&gt;dev;</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;irq_enabled)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='add'>+	if (ring-&gt;irq_refcount++ == 0) {</div><div class='add'>+		dev_priv-&gt;irq_mask &amp;= ~ring-&gt;irq_enable_mask;</div><div class='add'>+		I915_WRITE(IMR, dev_priv-&gt;irq_mask);</div><div class='add'>+		POSTING_READ(IMR);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-i915_disable_irq(drm_i915_private_t *dev_priv, u32 mask)</div><div class='add'>+i9xx_ring_put_irq(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='del'>-	dev_priv-&gt;irq_mask |= mask;</div><div class='del'>-	I915_WRITE(IMR, dev_priv-&gt;irq_mask);</div><div class='del'>-	POSTING_READ(IMR);</div><div class='add'>+	struct drm_device *dev = ring-&gt;dev;</div><div class='add'>+	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='add'>+	if (--ring-&gt;irq_refcount == 0) {</div><div class='add'>+		dev_priv-&gt;irq_mask |= ring-&gt;irq_enable_mask;</div><div class='add'>+		I915_WRITE(IMR, dev_priv-&gt;irq_mask);</div><div class='add'>+		POSTING_READ(IMR);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool</div><div class='del'>-render_ring_get_irq(struct intel_ring_buffer *ring)</div><div class='add'>+i8xx_ring_get_irq(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = ring-&gt;dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (!dev-&gt;irq_enabled)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;ring-&gt;irq_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='ctx'> 	if (ring-&gt;irq_refcount++ == 0) {</div><div class='del'>-		if (HAS_PCH_SPLIT(dev))</div><div class='del'>-			ironlake_enable_irq(dev_priv,</div><div class='del'>-					    GT_PIPE_NOTIFY | GT_USER_INTERRUPT);</div><div class='del'>-		else</div><div class='del'>-			i915_enable_irq(dev_priv, I915_USER_INTERRUPT);</div><div class='add'>+		dev_priv-&gt;irq_mask &amp;= ~ring-&gt;irq_enable_mask;</div><div class='add'>+		I915_WRITE16(IMR, dev_priv-&gt;irq_mask);</div><div class='add'>+		POSTING_READ16(IMR);</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock(&amp;ring-&gt;irq_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-render_ring_put_irq(struct intel_ring_buffer *ring)</div><div class='add'>+i8xx_ring_put_irq(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = ring-&gt;dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;ring-&gt;irq_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='ctx'> 	if (--ring-&gt;irq_refcount == 0) {</div><div class='del'>-		if (HAS_PCH_SPLIT(dev))</div><div class='del'>-			ironlake_disable_irq(dev_priv,</div><div class='del'>-					     GT_USER_INTERRUPT |</div><div class='del'>-					     GT_PIPE_NOTIFY);</div><div class='del'>-		else</div><div class='del'>-			i915_disable_irq(dev_priv, I915_USER_INTERRUPT);</div><div class='add'>+		dev_priv-&gt;irq_mask |= ring-&gt;irq_enable_mask;</div><div class='add'>+		I915_WRITE16(IMR, dev_priv-&gt;irq_mask);</div><div class='add'>+		POSTING_READ16(IMR);</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock(&amp;ring-&gt;irq_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_ring_setup_status_page(struct intel_ring_buffer *ring)</div><div class='hunk'>@@ -773,7 +786,7 @@ bsd_ring_flush(struct intel_ring_buffer *ring,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-ring_add_request(struct intel_ring_buffer *ring,</div><div class='add'>+i9xx_add_request(struct intel_ring_buffer *ring,</div><div class='ctx'> 		 u32 *result)</div><div class='ctx'> {</div><div class='ctx'> 	u32 seqno;</div><div class='hunk'>@@ -796,10 +809,11 @@ ring_add_request(struct intel_ring_buffer *ring,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool</div><div class='del'>-gen6_ring_get_irq(struct intel_ring_buffer *ring, u32 gflag, u32 rflag)</div><div class='add'>+gen6_ring_get_irq(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = ring-&gt;dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (!dev-&gt;irq_enabled)</div><div class='ctx'> 	       return false;</div><div class='hunk'>@@ -809,120 +823,87 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring, u32 gflag, u32 rflag)</div><div class='ctx'> 	 * blt/bsd rings on ivb. */</div><div class='ctx'> 	gen6_gt_force_wake_get(dev_priv);</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;ring-&gt;irq_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='ctx'> 	if (ring-&gt;irq_refcount++ == 0) {</div><div class='del'>-		ring-&gt;irq_mask &amp;= ~rflag;</div><div class='del'>-		I915_WRITE_IMR(ring, ring-&gt;irq_mask);</div><div class='del'>-		ironlake_enable_irq(dev_priv, gflag);</div><div class='add'>+		I915_WRITE_IMR(ring, ~ring-&gt;irq_enable_mask);</div><div class='add'>+		dev_priv-&gt;gt_irq_mask &amp;= ~ring-&gt;irq_enable_mask;</div><div class='add'>+		I915_WRITE(GTIMR, dev_priv-&gt;gt_irq_mask);</div><div class='add'>+		POSTING_READ(GTIMR);</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock(&amp;ring-&gt;irq_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-gen6_ring_put_irq(struct intel_ring_buffer *ring, u32 gflag, u32 rflag)</div><div class='add'>+gen6_ring_put_irq(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = ring-&gt;dev;</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;ring-&gt;irq_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='ctx'> 	if (--ring-&gt;irq_refcount == 0) {</div><div class='del'>-		ring-&gt;irq_mask |= rflag;</div><div class='del'>-		I915_WRITE_IMR(ring, ring-&gt;irq_mask);</div><div class='del'>-		ironlake_disable_irq(dev_priv, gflag);</div><div class='add'>+		I915_WRITE_IMR(ring, ~0);</div><div class='add'>+		dev_priv-&gt;gt_irq_mask |= ring-&gt;irq_enable_mask;</div><div class='add'>+		I915_WRITE(GTIMR, dev_priv-&gt;gt_irq_mask);</div><div class='add'>+		POSTING_READ(GTIMR);</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock(&amp;ring-&gt;irq_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	gen6_gt_force_wake_put(dev_priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool</div><div class='del'>-bsd_ring_get_irq(struct intel_ring_buffer *ring)</div><div class='add'>+static int</div><div class='add'>+i965_dispatch_execbuffer(struct intel_ring_buffer *ring, u32 offset, u32 length)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = ring-&gt;dev;</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	if (!dev-&gt;irq_enabled)</div><div class='del'>-		return false;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;ring-&gt;irq_lock);</div><div class='del'>-	if (ring-&gt;irq_refcount++ == 0) {</div><div class='del'>-		if (IS_G4X(dev))</div><div class='del'>-			i915_enable_irq(dev_priv, I915_BSD_USER_INTERRUPT);</div><div class='del'>-		else</div><div class='del'>-			ironlake_enable_irq(dev_priv, GT_BSD_USER_INTERRUPT);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;ring-&gt;irq_lock);</div><div class='add'>+	ret = intel_ring_begin(ring, 2);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-static void</div><div class='del'>-bsd_ring_put_irq(struct intel_ring_buffer *ring)</div><div class='del'>-{</div><div class='del'>-	struct drm_device *dev = ring-&gt;dev;</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	intel_ring_emit(ring,</div><div class='add'>+			MI_BATCH_BUFFER_START |</div><div class='add'>+			MI_BATCH_GTT |</div><div class='add'>+			MI_BATCH_NON_SECURE_I965);</div><div class='add'>+	intel_ring_emit(ring, offset);</div><div class='add'>+	intel_ring_advance(ring);</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;ring-&gt;irq_lock);</div><div class='del'>-	if (--ring-&gt;irq_refcount == 0) {</div><div class='del'>-		if (IS_G4X(dev))</div><div class='del'>-			i915_disable_irq(dev_priv, I915_BSD_USER_INTERRUPT);</div><div class='del'>-		else</div><div class='del'>-			ironlake_disable_irq(dev_priv, GT_BSD_USER_INTERRUPT);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;ring-&gt;irq_lock);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-ring_dispatch_execbuffer(struct intel_ring_buffer *ring, u32 offset, u32 length)</div><div class='add'>+i830_dispatch_execbuffer(struct intel_ring_buffer *ring,</div><div class='add'>+				u32 offset, u32 len)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = intel_ring_begin(ring, 2);</div><div class='add'>+	ret = intel_ring_begin(ring, 4);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	intel_ring_emit(ring,</div><div class='del'>-			MI_BATCH_BUFFER_START | (2 &lt;&lt; 6) |</div><div class='del'>-			MI_BATCH_NON_SECURE_I965);</div><div class='del'>-	intel_ring_emit(ring, offset);</div><div class='add'>+	intel_ring_emit(ring, MI_BATCH_BUFFER);</div><div class='add'>+	intel_ring_emit(ring, offset | MI_BATCH_NON_SECURE);</div><div class='add'>+	intel_ring_emit(ring, offset + len - 8);</div><div class='add'>+	intel_ring_emit(ring, 0);</div><div class='ctx'> 	intel_ring_advance(ring);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-render_ring_dispatch_execbuffer(struct intel_ring_buffer *ring,</div><div class='add'>+i915_dispatch_execbuffer(struct intel_ring_buffer *ring,</div><div class='ctx'> 				u32 offset, u32 len)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = ring-&gt;dev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (IS_I830(dev) || IS_845G(dev)) {</div><div class='del'>-		ret = intel_ring_begin(ring, 4);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		intel_ring_emit(ring, MI_BATCH_BUFFER);</div><div class='del'>-		intel_ring_emit(ring, offset | MI_BATCH_NON_SECURE);</div><div class='del'>-		intel_ring_emit(ring, offset + len - 8);</div><div class='del'>-		intel_ring_emit(ring, 0);</div><div class='del'>-	} else {</div><div class='del'>-		ret = intel_ring_begin(ring, 2);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+	ret = intel_ring_begin(ring, 2);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-		if (INTEL_INFO(dev)-&gt;gen &gt;= 4) {</div><div class='del'>-			intel_ring_emit(ring,</div><div class='del'>-					MI_BATCH_BUFFER_START | (2 &lt;&lt; 6) |</div><div class='del'>-					MI_BATCH_NON_SECURE_I965);</div><div class='del'>-			intel_ring_emit(ring, offset);</div><div class='del'>-		} else {</div><div class='del'>-			intel_ring_emit(ring,</div><div class='del'>-					MI_BATCH_BUFFER_START | (2 &lt;&lt; 6));</div><div class='del'>-			intel_ring_emit(ring, offset | MI_BATCH_NON_SECURE);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_GTT);</div><div class='add'>+	intel_ring_emit(ring, offset | MI_BATCH_NON_SECURE);</div><div class='ctx'> 	intel_ring_advance(ring);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -930,7 +911,6 @@ render_ring_dispatch_execbuffer(struct intel_ring_buffer *ring,</div><div class='ctx'> </div><div class='ctx'> static void cleanup_status_page(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='del'>-	drm_i915_private_t *dev_priv = ring-&gt;dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='ctx'> </div><div class='ctx'> 	obj = ring-&gt;status_page.obj;</div><div class='hunk'>@@ -941,14 +921,11 @@ static void cleanup_status_page(struct intel_ring_buffer *ring)</div><div class='ctx'> 	i915_gem_object_unpin(obj);</div><div class='ctx'> 	drm_gem_object_unreference(&amp;obj-&gt;base);</div><div class='ctx'> 	ring-&gt;status_page.obj = NULL;</div><div class='del'>-</div><div class='del'>-	memset(&amp;dev_priv-&gt;hws_map, 0, sizeof(dev_priv-&gt;hws_map));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int init_status_page(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = ring-&gt;dev;</div><div class='del'>-	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -969,7 +946,6 @@ static int init_status_page(struct intel_ring_buffer *ring)</div><div class='ctx'> 	ring-&gt;status_page.gfx_addr = obj-&gt;gtt_offset;</div><div class='ctx'> 	ring-&gt;status_page.page_addr = kmap(obj-&gt;pages[0]);</div><div class='ctx'> 	if (ring-&gt;status_page.page_addr == NULL) {</div><div class='del'>-		memset(&amp;dev_priv-&gt;hws_map, 0, sizeof(dev_priv-&gt;hws_map));</div><div class='ctx'> 		goto err_unpin;</div><div class='ctx'> 	}</div><div class='ctx'> 	ring-&gt;status_page.obj = obj;</div><div class='hunk'>@@ -989,8 +965,8 @@ err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int intel_init_ring_buffer(struct drm_device *dev,</div><div class='del'>-			   struct intel_ring_buffer *ring)</div><div class='add'>+static int intel_init_ring_buffer(struct drm_device *dev,</div><div class='add'>+				  struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_gem_object *obj;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -999,10 +975,9 @@ int intel_init_ring_buffer(struct drm_device *dev,</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;ring-&gt;active_list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;ring-&gt;request_list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;ring-&gt;gpu_write_list);</div><div class='add'>+	ring-&gt;size = 32 * PAGE_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	init_waitqueue_head(&amp;ring-&gt;irq_queue);</div><div class='del'>-	spin_lock_init(&amp;ring-&gt;irq_lock);</div><div class='del'>-	ring-&gt;irq_mask = ~0;</div><div class='ctx'> </div><div class='ctx'> 	if (I915_NEED_GFX_HWS(dev)) {</div><div class='ctx'> 		ret = init_status_page(ring);</div><div class='hunk'>@@ -1023,20 +998,18 @@ int intel_init_ring_buffer(struct drm_device *dev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_unref;</div><div class='ctx'> </div><div class='del'>-	ring-&gt;map.size = ring-&gt;size;</div><div class='del'>-	ring-&gt;map.offset = dev-&gt;agp-&gt;base + obj-&gt;gtt_offset;</div><div class='del'>-	ring-&gt;map.type = 0;</div><div class='del'>-	ring-&gt;map.flags = 0;</div><div class='del'>-	ring-&gt;map.mtrr = 0;</div><div class='add'>+	ret = i915_gem_object_set_to_gtt_domain(obj, true);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_unpin;</div><div class='ctx'> </div><div class='del'>-	drm_core_ioremap_wc(&amp;ring-&gt;map, dev);</div><div class='del'>-	if (ring-&gt;map.handle == NULL) {</div><div class='add'>+	ring-&gt;virtual_start = ioremap_wc(dev-&gt;agp-&gt;base + obj-&gt;gtt_offset,</div><div class='add'>+					 ring-&gt;size);</div><div class='add'>+	if (ring-&gt;virtual_start == NULL) {</div><div class='ctx'> 		DRM_ERROR("Failed to map ringbuffer.\n");</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto err_unpin;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ring-&gt;virtual_start = ring-&gt;map.handle;</div><div class='ctx'> 	ret = ring-&gt;init(ring);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_unmap;</div><div class='hunk'>@@ -1052,7 +1025,7 @@ int intel_init_ring_buffer(struct drm_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_unmap:</div><div class='del'>-	drm_core_ioremapfree(&amp;ring-&gt;map, dev);</div><div class='add'>+	iounmap(ring-&gt;virtual_start);</div><div class='ctx'> err_unpin:</div><div class='ctx'> 	i915_gem_object_unpin(obj);</div><div class='ctx'> err_unref:</div><div class='hunk'>@@ -1080,7 +1053,7 @@ void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring)</div><div class='ctx'> </div><div class='ctx'> 	I915_WRITE_CTL(ring, 0);</div><div class='ctx'> </div><div class='del'>-	drm_core_ioremapfree(&amp;ring-&gt;map, ring-&gt;dev);</div><div class='add'>+	iounmap(ring-&gt;virtual_start);</div><div class='ctx'> </div><div class='ctx'> 	i915_gem_object_unpin(ring-&gt;obj);</div><div class='ctx'> 	drm_gem_object_unreference(&amp;ring-&gt;obj-&gt;base);</div><div class='hunk'>@@ -1094,7 +1067,7 @@ void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring)</div><div class='ctx'> </div><div class='ctx'> static int intel_wrap_ring_buffer(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='del'>-	unsigned int *virt;</div><div class='add'>+	uint32_t __iomem *virt;</div><div class='ctx'> 	int rem = ring-&gt;size - ring-&gt;tail;</div><div class='ctx'> </div><div class='ctx'> 	if (ring-&gt;space &lt; rem) {</div><div class='hunk'>@@ -1103,12 +1076,10 @@ static int intel_wrap_ring_buffer(struct intel_ring_buffer *ring)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	virt = (unsigned int *)(ring-&gt;virtual_start + ring-&gt;tail);</div><div class='del'>-	rem /= 8;</div><div class='del'>-	while (rem--) {</div><div class='del'>-		*virt++ = MI_NOOP;</div><div class='del'>-		*virt++ = MI_NOOP;</div><div class='del'>-	}</div><div class='add'>+	virt = ring-&gt;virtual_start + ring-&gt;tail;</div><div class='add'>+	rem /= 4;</div><div class='add'>+	while (rem--)</div><div class='add'>+		iowrite32(MI_NOOP, virt++);</div><div class='ctx'> </div><div class='ctx'> 	ring-&gt;tail = 0;</div><div class='ctx'> 	ring-&gt;space = ring_space(ring);</div><div class='hunk'>@@ -1129,9 +1100,11 @@ static int intel_ring_wait_seqno(struct intel_ring_buffer *ring, u32 seqno)</div><div class='ctx'> 	was_interruptible = dev_priv-&gt;mm.interruptible;</div><div class='ctx'> 	dev_priv-&gt;mm.interruptible = false;</div><div class='ctx'> </div><div class='del'>-	ret = i915_wait_request(ring, seqno, true);</div><div class='add'>+	ret = i915_wait_request(ring, seqno);</div><div class='ctx'> </div><div class='ctx'> 	dev_priv-&gt;mm.interruptible = was_interruptible;</div><div class='add'>+	if (!ret)</div><div class='add'>+		i915_gem_retire_requests_ring(ring);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1205,15 +1178,12 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	trace_i915_ring_wait_begin(ring);</div><div class='del'>-	if (drm_core_check_feature(dev, DRIVER_GEM))</div><div class='del'>-		/* With GEM the hangcheck timer should kick us out of the loop,</div><div class='del'>-		 * leaving it early runs the risk of corrupting GEM state (due</div><div class='del'>-		 * to running on almost untested codepaths). But on resume</div><div class='del'>-		 * timers don't work yet, so prevent a complete hang in that</div><div class='del'>-		 * case by choosing an insanely large timeout. */</div><div class='del'>-		end = jiffies + 60 * HZ;</div><div class='del'>-	else</div><div class='del'>-		end = jiffies + 3 * HZ;</div><div class='add'>+	/* With GEM the hangcheck timer should kick us out of the loop,</div><div class='add'>+	 * leaving it early runs the risk of corrupting GEM state (due</div><div class='add'>+	 * to running on almost untested codepaths). But on resume</div><div class='add'>+	 * timers don't work yet, so prevent a complete hang in that</div><div class='add'>+	 * case by choosing an insanely large timeout. */</div><div class='add'>+	end = jiffies + 60 * HZ;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		ring-&gt;head = I915_READ_HEAD(ring);</div><div class='hunk'>@@ -1265,48 +1235,14 @@ int intel_ring_begin(struct intel_ring_buffer *ring,</div><div class='ctx'> </div><div class='ctx'> void intel_ring_advance(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='add'>+	struct drm_i915_private *dev_priv = ring-&gt;dev-&gt;dev_private;</div><div class='add'>+</div><div class='ctx'> 	ring-&gt;tail &amp;= ring-&gt;size - 1;</div><div class='add'>+	if (dev_priv-&gt;stop_rings &amp; intel_ring_flag(ring))</div><div class='add'>+		return;</div><div class='ctx'> 	ring-&gt;write_tail(ring, ring-&gt;tail);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct intel_ring_buffer render_ring = {</div><div class='del'>-	.name			= "render ring",</div><div class='del'>-	.id			= RCS,</div><div class='del'>-	.mmio_base		= RENDER_RING_BASE,</div><div class='del'>-	.size			= 32 * PAGE_SIZE,</div><div class='del'>-	.init			= init_render_ring,</div><div class='del'>-	.write_tail		= ring_write_tail,</div><div class='del'>-	.flush			= render_ring_flush,</div><div class='del'>-	.add_request		= render_ring_add_request,</div><div class='del'>-	.get_seqno		= ring_get_seqno,</div><div class='del'>-	.irq_get		= render_ring_get_irq,</div><div class='del'>-	.irq_put		= render_ring_put_irq,</div><div class='del'>-	.dispatch_execbuffer	= render_ring_dispatch_execbuffer,</div><div class='del'>-	.cleanup		= render_ring_cleanup,</div><div class='del'>-	.sync_to		= render_ring_sync_to,</div><div class='del'>-	.semaphore_register	= {MI_SEMAPHORE_SYNC_INVALID,</div><div class='del'>-				   MI_SEMAPHORE_SYNC_RV,</div><div class='del'>-				   MI_SEMAPHORE_SYNC_RB},</div><div class='del'>-	.signal_mbox		= {GEN6_VRSYNC, GEN6_BRSYNC},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ring buffer for bit-stream decoder */</div><div class='del'>-</div><div class='del'>-static const struct intel_ring_buffer bsd_ring = {</div><div class='del'>-	.name                   = "bsd ring",</div><div class='del'>-	.id			= VCS,</div><div class='del'>-	.mmio_base		= BSD_RING_BASE,</div><div class='del'>-	.size			= 32 * PAGE_SIZE,</div><div class='del'>-	.init			= init_ring_common,</div><div class='del'>-	.write_tail		= ring_write_tail,</div><div class='del'>-	.flush			= bsd_ring_flush,</div><div class='del'>-	.add_request		= ring_add_request,</div><div class='del'>-	.get_seqno		= ring_get_seqno,</div><div class='del'>-	.irq_get		= bsd_ring_get_irq,</div><div class='del'>-	.irq_put		= bsd_ring_put_irq,</div><div class='del'>-	.dispatch_execbuffer	= ring_dispatch_execbuffer,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> static void gen6_bsd_ring_write_tail(struct intel_ring_buffer *ring,</div><div class='ctx'> 				     u32 value)</div><div class='hunk'>@@ -1369,77 +1305,8 @@ gen6_ring_dispatch_execbuffer(struct intel_ring_buffer *ring,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool</div><div class='del'>-gen6_render_ring_get_irq(struct intel_ring_buffer *ring)</div><div class='del'>-{</div><div class='del'>-	return gen6_ring_get_irq(ring,</div><div class='del'>-				 GT_USER_INTERRUPT,</div><div class='del'>-				 GEN6_RENDER_USER_INTERRUPT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-gen6_render_ring_put_irq(struct intel_ring_buffer *ring)</div><div class='del'>-{</div><div class='del'>-	return gen6_ring_put_irq(ring,</div><div class='del'>-				 GT_USER_INTERRUPT,</div><div class='del'>-				 GEN6_RENDER_USER_INTERRUPT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool</div><div class='del'>-gen6_bsd_ring_get_irq(struct intel_ring_buffer *ring)</div><div class='del'>-{</div><div class='del'>-	return gen6_ring_get_irq(ring,</div><div class='del'>-				 GT_GEN6_BSD_USER_INTERRUPT,</div><div class='del'>-				 GEN6_BSD_USER_INTERRUPT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-gen6_bsd_ring_put_irq(struct intel_ring_buffer *ring)</div><div class='del'>-{</div><div class='del'>-	return gen6_ring_put_irq(ring,</div><div class='del'>-				 GT_GEN6_BSD_USER_INTERRUPT,</div><div class='del'>-				 GEN6_BSD_USER_INTERRUPT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* ring buffer for Video Codec for Gen6+ */</div><div class='del'>-static const struct intel_ring_buffer gen6_bsd_ring = {</div><div class='del'>-	.name			= "gen6 bsd ring",</div><div class='del'>-	.id			= VCS,</div><div class='del'>-	.mmio_base		= GEN6_BSD_RING_BASE,</div><div class='del'>-	.size			= 32 * PAGE_SIZE,</div><div class='del'>-	.init			= init_ring_common,</div><div class='del'>-	.write_tail		= gen6_bsd_ring_write_tail,</div><div class='del'>-	.flush			= gen6_ring_flush,</div><div class='del'>-	.add_request		= gen6_add_request,</div><div class='del'>-	.get_seqno		= gen6_ring_get_seqno,</div><div class='del'>-	.irq_get		= gen6_bsd_ring_get_irq,</div><div class='del'>-	.irq_put		= gen6_bsd_ring_put_irq,</div><div class='del'>-	.dispatch_execbuffer	= gen6_ring_dispatch_execbuffer,</div><div class='del'>-	.sync_to		= gen6_bsd_ring_sync_to,</div><div class='del'>-	.semaphore_register	= {MI_SEMAPHORE_SYNC_VR,</div><div class='del'>-				   MI_SEMAPHORE_SYNC_INVALID,</div><div class='del'>-				   MI_SEMAPHORE_SYNC_VB},</div><div class='del'>-	.signal_mbox		= {GEN6_RVSYNC, GEN6_BVSYNC},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Blitter support (SandyBridge+) */</div><div class='ctx'> </div><div class='del'>-static bool</div><div class='del'>-blt_ring_get_irq(struct intel_ring_buffer *ring)</div><div class='del'>-{</div><div class='del'>-	return gen6_ring_get_irq(ring,</div><div class='del'>-				 GT_BLT_USER_INTERRUPT,</div><div class='del'>-				 GEN6_BLITTER_USER_INTERRUPT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-blt_ring_put_irq(struct intel_ring_buffer *ring)</div><div class='del'>-{</div><div class='del'>-	gen6_ring_put_irq(ring,</div><div class='del'>-			  GT_BLT_USER_INTERRUPT,</div><div class='del'>-			  GEN6_BLITTER_USER_INTERRUPT);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int blt_ring_flush(struct intel_ring_buffer *ring,</div><div class='ctx'> 			  u32 invalidate, u32 flush)</div><div class='ctx'> {</div><div class='hunk'>@@ -1461,42 +1328,63 @@ static int blt_ring_flush(struct intel_ring_buffer *ring,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct intel_ring_buffer gen6_blt_ring = {</div><div class='del'>-	.name			= "blt ring",</div><div class='del'>-	.id			= BCS,</div><div class='del'>-	.mmio_base		= BLT_RING_BASE,</div><div class='del'>-	.size			= 32 * PAGE_SIZE,</div><div class='del'>-	.init			= init_ring_common,</div><div class='del'>-	.write_tail		= ring_write_tail,</div><div class='del'>-	.flush			= blt_ring_flush,</div><div class='del'>-	.add_request		= gen6_add_request,</div><div class='del'>-	.get_seqno		= gen6_ring_get_seqno,</div><div class='del'>-	.irq_get		= blt_ring_get_irq,</div><div class='del'>-	.irq_put		= blt_ring_put_irq,</div><div class='del'>-	.dispatch_execbuffer	= gen6_ring_dispatch_execbuffer,</div><div class='del'>-	.sync_to		= gen6_blt_ring_sync_to,</div><div class='del'>-	.semaphore_register	= {MI_SEMAPHORE_SYNC_BR,</div><div class='del'>-				   MI_SEMAPHORE_SYNC_BV,</div><div class='del'>-				   MI_SEMAPHORE_SYNC_INVALID},</div><div class='del'>-	.signal_mbox		= {GEN6_RBSYNC, GEN6_VBSYNC},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> int intel_init_render_ring_buffer(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> </div><div class='del'>-	*ring = render_ring;</div><div class='add'>+	ring-&gt;name = "render ring";</div><div class='add'>+	ring-&gt;id = RCS;</div><div class='add'>+	ring-&gt;mmio_base = RENDER_RING_BASE;</div><div class='add'>+</div><div class='ctx'> 	if (INTEL_INFO(dev)-&gt;gen &gt;= 6) {</div><div class='ctx'> 		ring-&gt;add_request = gen6_add_request;</div><div class='ctx'> 		ring-&gt;flush = gen6_render_ring_flush;</div><div class='del'>-		ring-&gt;irq_get = gen6_render_ring_get_irq;</div><div class='del'>-		ring-&gt;irq_put = gen6_render_ring_put_irq;</div><div class='add'>+		ring-&gt;irq_get = gen6_ring_get_irq;</div><div class='add'>+		ring-&gt;irq_put = gen6_ring_put_irq;</div><div class='add'>+		ring-&gt;irq_enable_mask = GT_USER_INTERRUPT;</div><div class='ctx'> 		ring-&gt;get_seqno = gen6_ring_get_seqno;</div><div class='add'>+		ring-&gt;sync_to = gen6_ring_sync;</div><div class='add'>+		ring-&gt;semaphore_register[0] = MI_SEMAPHORE_SYNC_INVALID;</div><div class='add'>+		ring-&gt;semaphore_register[1] = MI_SEMAPHORE_SYNC_RV;</div><div class='add'>+		ring-&gt;semaphore_register[2] = MI_SEMAPHORE_SYNC_RB;</div><div class='add'>+		ring-&gt;signal_mbox[0] = GEN6_VRSYNC;</div><div class='add'>+		ring-&gt;signal_mbox[1] = GEN6_BRSYNC;</div><div class='ctx'> 	} else if (IS_GEN5(dev)) {</div><div class='ctx'> 		ring-&gt;add_request = pc_render_add_request;</div><div class='add'>+		ring-&gt;flush = gen4_render_ring_flush;</div><div class='ctx'> 		ring-&gt;get_seqno = pc_render_get_seqno;</div><div class='add'>+		ring-&gt;irq_get = gen5_ring_get_irq;</div><div class='add'>+		ring-&gt;irq_put = gen5_ring_put_irq;</div><div class='add'>+		ring-&gt;irq_enable_mask = GT_USER_INTERRUPT | GT_PIPE_NOTIFY;</div><div class='add'>+	} else {</div><div class='add'>+		ring-&gt;add_request = i9xx_add_request;</div><div class='add'>+		if (INTEL_INFO(dev)-&gt;gen &lt; 4)</div><div class='add'>+			ring-&gt;flush = gen2_render_ring_flush;</div><div class='add'>+		else</div><div class='add'>+			ring-&gt;flush = gen4_render_ring_flush;</div><div class='add'>+		ring-&gt;get_seqno = ring_get_seqno;</div><div class='add'>+		if (IS_GEN2(dev)) {</div><div class='add'>+			ring-&gt;irq_get = i8xx_ring_get_irq;</div><div class='add'>+			ring-&gt;irq_put = i8xx_ring_put_irq;</div><div class='add'>+		} else {</div><div class='add'>+			ring-&gt;irq_get = i9xx_ring_get_irq;</div><div class='add'>+			ring-&gt;irq_put = i9xx_ring_put_irq;</div><div class='add'>+		}</div><div class='add'>+		ring-&gt;irq_enable_mask = I915_USER_INTERRUPT;</div><div class='ctx'> 	}</div><div class='add'>+	ring-&gt;write_tail = ring_write_tail;</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &gt;= 6)</div><div class='add'>+		ring-&gt;dispatch_execbuffer = gen6_ring_dispatch_execbuffer;</div><div class='add'>+	else if (INTEL_INFO(dev)-&gt;gen &gt;= 4)</div><div class='add'>+		ring-&gt;dispatch_execbuffer = i965_dispatch_execbuffer;</div><div class='add'>+	else if (IS_I830(dev) || IS_845G(dev))</div><div class='add'>+		ring-&gt;dispatch_execbuffer = i830_dispatch_execbuffer;</div><div class='add'>+	else</div><div class='add'>+		ring-&gt;dispatch_execbuffer = i915_dispatch_execbuffer;</div><div class='add'>+	ring-&gt;init = init_render_ring;</div><div class='add'>+	ring-&gt;cleanup = render_ring_cleanup;</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	if (!I915_NEED_GFX_HWS(dev)) {</div><div class='ctx'> 		ring-&gt;status_page.page_addr = dev_priv-&gt;status_page_dmah-&gt;vaddr;</div><div class='hunk'>@@ -1511,16 +1399,42 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[RCS];</div><div class='ctx'> </div><div class='del'>-	*ring = render_ring;</div><div class='add'>+	ring-&gt;name = "render ring";</div><div class='add'>+	ring-&gt;id = RCS;</div><div class='add'>+	ring-&gt;mmio_base = RENDER_RING_BASE;</div><div class='add'>+</div><div class='ctx'> 	if (INTEL_INFO(dev)-&gt;gen &gt;= 6) {</div><div class='del'>-		ring-&gt;add_request = gen6_add_request;</div><div class='del'>-		ring-&gt;irq_get = gen6_render_ring_get_irq;</div><div class='del'>-		ring-&gt;irq_put = gen6_render_ring_put_irq;</div><div class='del'>-	} else if (IS_GEN5(dev)) {</div><div class='del'>-		ring-&gt;add_request = pc_render_add_request;</div><div class='del'>-		ring-&gt;get_seqno = pc_render_get_seqno;</div><div class='add'>+		/* non-kms not supported on gen6+ */</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Note: gem is not supported on gen5/ilk without kms (the corresponding</div><div class='add'>+	 * gem_init ioctl returns with -ENODEV). Hence we do not need to set up</div><div class='add'>+	 * the special gen5 functions. */</div><div class='add'>+	ring-&gt;add_request = i9xx_add_request;</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &lt; 4)</div><div class='add'>+		ring-&gt;flush = gen2_render_ring_flush;</div><div class='add'>+	else</div><div class='add'>+		ring-&gt;flush = gen4_render_ring_flush;</div><div class='add'>+	ring-&gt;get_seqno = ring_get_seqno;</div><div class='add'>+	if (IS_GEN2(dev)) {</div><div class='add'>+		ring-&gt;irq_get = i8xx_ring_get_irq;</div><div class='add'>+		ring-&gt;irq_put = i8xx_ring_put_irq;</div><div class='add'>+	} else {</div><div class='add'>+		ring-&gt;irq_get = i9xx_ring_get_irq;</div><div class='add'>+		ring-&gt;irq_put = i9xx_ring_put_irq;</div><div class='add'>+	}</div><div class='add'>+	ring-&gt;irq_enable_mask = I915_USER_INTERRUPT;</div><div class='add'>+	ring-&gt;write_tail = ring_write_tail;</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &gt;= 4)</div><div class='add'>+		ring-&gt;dispatch_execbuffer = i965_dispatch_execbuffer;</div><div class='add'>+	else if (IS_I830(dev) || IS_845G(dev))</div><div class='add'>+		ring-&gt;dispatch_execbuffer = i830_dispatch_execbuffer;</div><div class='add'>+	else</div><div class='add'>+		ring-&gt;dispatch_execbuffer = i915_dispatch_execbuffer;</div><div class='add'>+	ring-&gt;init = init_render_ring;</div><div class='add'>+	ring-&gt;cleanup = render_ring_cleanup;</div><div class='add'>+</div><div class='ctx'> 	if (!I915_NEED_GFX_HWS(dev))</div><div class='ctx'> 		ring-&gt;status_page.page_addr = dev_priv-&gt;status_page_dmah-&gt;vaddr;</div><div class='ctx'> </div><div class='hunk'>@@ -1534,20 +1448,13 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)</div><div class='ctx'> 	if (IS_I830(ring-&gt;dev))</div><div class='ctx'> 		ring-&gt;effective_size -= 128;</div><div class='ctx'> </div><div class='del'>-	ring-&gt;map.offset = start;</div><div class='del'>-	ring-&gt;map.size = size;</div><div class='del'>-	ring-&gt;map.type = 0;</div><div class='del'>-	ring-&gt;map.flags = 0;</div><div class='del'>-	ring-&gt;map.mtrr = 0;</div><div class='del'>-</div><div class='del'>-	drm_core_ioremap_wc(&amp;ring-&gt;map, dev);</div><div class='del'>-	if (ring-&gt;map.handle == NULL) {</div><div class='add'>+	ring-&gt;virtual_start = ioremap_wc(start, size);</div><div class='add'>+	if (ring-&gt;virtual_start == NULL) {</div><div class='ctx'> 		DRM_ERROR("can not ioremap virtual address for"</div><div class='ctx'> 			  " ring buffer\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ring-&gt;virtual_start = (void __force __iomem *)ring-&gt;map.handle;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1556,10 +1463,46 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[VCS];</div><div class='ctx'> </div><div class='del'>-	if (IS_GEN6(dev) || IS_GEN7(dev))</div><div class='del'>-		*ring = gen6_bsd_ring;</div><div class='del'>-	else</div><div class='del'>-		*ring = bsd_ring;</div><div class='add'>+	ring-&gt;name = "bsd ring";</div><div class='add'>+	ring-&gt;id = VCS;</div><div class='add'>+</div><div class='add'>+	ring-&gt;write_tail = ring_write_tail;</div><div class='add'>+	if (IS_GEN6(dev) || IS_GEN7(dev)) {</div><div class='add'>+		ring-&gt;mmio_base = GEN6_BSD_RING_BASE;</div><div class='add'>+		/* gen6 bsd needs a special wa for tail updates */</div><div class='add'>+		if (IS_GEN6(dev))</div><div class='add'>+			ring-&gt;write_tail = gen6_bsd_ring_write_tail;</div><div class='add'>+		ring-&gt;flush = gen6_ring_flush;</div><div class='add'>+		ring-&gt;add_request = gen6_add_request;</div><div class='add'>+		ring-&gt;get_seqno = gen6_ring_get_seqno;</div><div class='add'>+		ring-&gt;irq_enable_mask = GEN6_BSD_USER_INTERRUPT;</div><div class='add'>+		ring-&gt;irq_get = gen6_ring_get_irq;</div><div class='add'>+		ring-&gt;irq_put = gen6_ring_put_irq;</div><div class='add'>+		ring-&gt;dispatch_execbuffer = gen6_ring_dispatch_execbuffer;</div><div class='add'>+		ring-&gt;sync_to = gen6_ring_sync;</div><div class='add'>+		ring-&gt;semaphore_register[0] = MI_SEMAPHORE_SYNC_VR;</div><div class='add'>+		ring-&gt;semaphore_register[1] = MI_SEMAPHORE_SYNC_INVALID;</div><div class='add'>+		ring-&gt;semaphore_register[2] = MI_SEMAPHORE_SYNC_VB;</div><div class='add'>+		ring-&gt;signal_mbox[0] = GEN6_RVSYNC;</div><div class='add'>+		ring-&gt;signal_mbox[1] = GEN6_BVSYNC;</div><div class='add'>+	} else {</div><div class='add'>+		ring-&gt;mmio_base = BSD_RING_BASE;</div><div class='add'>+		ring-&gt;flush = bsd_ring_flush;</div><div class='add'>+		ring-&gt;add_request = i9xx_add_request;</div><div class='add'>+		ring-&gt;get_seqno = ring_get_seqno;</div><div class='add'>+		if (IS_GEN5(dev)) {</div><div class='add'>+			ring-&gt;irq_enable_mask = GT_BSD_USER_INTERRUPT;</div><div class='add'>+			ring-&gt;irq_get = gen5_ring_get_irq;</div><div class='add'>+			ring-&gt;irq_put = gen5_ring_put_irq;</div><div class='add'>+		} else {</div><div class='add'>+			ring-&gt;irq_enable_mask = I915_BSD_USER_INTERRUPT;</div><div class='add'>+			ring-&gt;irq_get = i9xx_ring_get_irq;</div><div class='add'>+			ring-&gt;irq_put = i9xx_ring_put_irq;</div><div class='add'>+		}</div><div class='add'>+		ring-&gt;dispatch_execbuffer = i965_dispatch_execbuffer;</div><div class='add'>+	}</div><div class='add'>+	ring-&gt;init = init_ring_common;</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	return intel_init_ring_buffer(dev, ring);</div><div class='ctx'> }</div><div class='hunk'>@@ -1569,7 +1512,25 @@ int intel_init_blt_ring_buffer(struct drm_device *dev)</div><div class='ctx'> 	drm_i915_private_t *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_ring_buffer *ring = &amp;dev_priv-&gt;ring[BCS];</div><div class='ctx'> </div><div class='del'>-	*ring = gen6_blt_ring;</div><div class='add'>+	ring-&gt;name = "blitter ring";</div><div class='add'>+	ring-&gt;id = BCS;</div><div class='add'>+</div><div class='add'>+	ring-&gt;mmio_base = BLT_RING_BASE;</div><div class='add'>+	ring-&gt;write_tail = ring_write_tail;</div><div class='add'>+	ring-&gt;flush = blt_ring_flush;</div><div class='add'>+	ring-&gt;add_request = gen6_add_request;</div><div class='add'>+	ring-&gt;get_seqno = gen6_ring_get_seqno;</div><div class='add'>+	ring-&gt;irq_enable_mask = GEN6_BLITTER_USER_INTERRUPT;</div><div class='add'>+	ring-&gt;irq_get = gen6_ring_get_irq;</div><div class='add'>+	ring-&gt;irq_put = gen6_ring_put_irq;</div><div class='add'>+	ring-&gt;dispatch_execbuffer = gen6_ring_dispatch_execbuffer;</div><div class='add'>+	ring-&gt;sync_to = gen6_ring_sync;</div><div class='add'>+	ring-&gt;semaphore_register[0] = MI_SEMAPHORE_SYNC_BR;</div><div class='add'>+	ring-&gt;semaphore_register[1] = MI_SEMAPHORE_SYNC_BV;</div><div class='add'>+	ring-&gt;semaphore_register[2] = MI_SEMAPHORE_SYNC_INVALID;</div><div class='add'>+	ring-&gt;signal_mbox[0] = GEN6_RBSYNC;</div><div class='add'>+	ring-&gt;signal_mbox[1] = GEN6_VBSYNC;</div><div class='add'>+	ring-&gt;init = init_ring_common;</div><div class='ctx'> </div><div class='ctx'> 	return intel_init_ring_buffer(dev, ring);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h<br/>index bc0365b8fa4d..55d3da26bae7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_ringbuffer.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_ringbuffer.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_ringbuffer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_ringbuffer.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> #define _INTEL_RINGBUFFER_H_</div><div class='ctx'> </div><div class='ctx'> struct  intel_hw_status_page {</div><div class='del'>-	u32	__iomem	*page_addr;</div><div class='add'>+	u32		*page_addr;</div><div class='ctx'> 	unsigned int	gfx_addr;</div><div class='ctx'> 	struct		drm_i915_gem_object *obj;</div><div class='ctx'> };</div><div class='hunk'>@@ -56,12 +56,9 @@ struct  intel_ring_buffer {</div><div class='ctx'> 	 */</div><div class='ctx'> 	u32		last_retired_head;</div><div class='ctx'> </div><div class='del'>-	spinlock_t	irq_lock;</div><div class='del'>-	u32		irq_refcount;</div><div class='del'>-	u32		irq_mask;</div><div class='del'>-	u32		irq_seqno;		/* last seq seem at irq time */</div><div class='add'>+	u32		irq_refcount;		/* protected by dev_priv-&gt;irq_lock */</div><div class='add'>+	u32		irq_enable_mask;	/* bitmask to enable ring interrupt */</div><div class='ctx'> 	u32		trace_irq_seqno;</div><div class='del'>-	u32		waiting_seqno;</div><div class='ctx'> 	u32		sync_seqno[I915_NUM_RINGS-1];</div><div class='ctx'> 	bool __must_check (*irq_get)(struct intel_ring_buffer *ring);</div><div class='ctx'> 	void		(*irq_put)(struct intel_ring_buffer *ring);</div><div class='hunk'>@@ -118,11 +115,16 @@ struct  intel_ring_buffer {</div><div class='ctx'> 	u32 outstanding_lazy_request;</div><div class='ctx'> </div><div class='ctx'> 	wait_queue_head_t irq_queue;</div><div class='del'>-	drm_local_map_t map;</div><div class='ctx'> </div><div class='ctx'> 	void *private;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static inline bool</div><div class='add'>+intel_ring_initialized(struct intel_ring_buffer *ring)</div><div class='add'>+{</div><div class='add'>+	return ring-&gt;obj != NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline unsigned</div><div class='ctx'> intel_ring_flag(struct intel_ring_buffer *ring)</div><div class='ctx'> {</div><div class='hunk'>@@ -152,7 +154,9 @@ static inline u32</div><div class='ctx'> intel_read_status_page(struct intel_ring_buffer *ring,</div><div class='ctx'> 		       int reg)</div><div class='ctx'> {</div><div class='del'>-	return ioread32(ring-&gt;status_page.page_addr + reg);</div><div class='add'>+	/* Ensure that the compiler doesn't optimize away the load. */</div><div class='add'>+	barrier();</div><div class='add'>+	return ring-&gt;status_page.page_addr[reg];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -170,10 +174,7 @@ intel_read_status_page(struct intel_ring_buffer *ring,</div><div class='ctx'>  *</div><div class='ctx'>  * The area from dword 0x20 to 0x3ff is available for driver usage.</div><div class='ctx'>  */</div><div class='del'>-#define READ_HWSP(dev_priv, reg) intel_read_status_page(LP_RING(dev_priv), reg)</div><div class='del'>-#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX)</div><div class='ctx'> #define I915_GEM_HWS_INDEX		0x20</div><div class='del'>-#define I915_BREADCRUMB_INDEX		0x21</div><div class='ctx'> </div><div class='ctx'> void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c<br/>index 232d77d07d8b..b6a9d45fc3c6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_sdvo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_sdvo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_sdvo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_sdvo.c</a></div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'> #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)</div><div class='ctx'> #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)</div><div class='ctx'> #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)</div><div class='del'>-#define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)</div><div class='add'>+#define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)</div><div class='ctx'> </div><div class='ctx'> #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\</div><div class='ctx'> 			SDVO_TV_MASK)</div><div class='hunk'>@@ -74,7 +74,7 @@ struct intel_sdvo {</div><div class='ctx'> 	struct i2c_adapter ddc;</div><div class='ctx'> </div><div class='ctx'> 	/* Register for the SDVO device: SDVOB or SDVOC */</div><div class='del'>-	int sdvo_reg;</div><div class='add'>+	uint32_t sdvo_reg;</div><div class='ctx'> </div><div class='ctx'> 	/* Active outputs controlled by this SDVO output */</div><div class='ctx'> 	uint16_t controlled_output;</div><div class='hunk'>@@ -114,6 +114,9 @@ struct intel_sdvo {</div><div class='ctx'> 	 */</div><div class='ctx'> 	bool is_tv;</div><div class='ctx'> </div><div class='add'>+	/* On different gens SDVOB is at different places. */</div><div class='add'>+	bool is_sdvob;</div><div class='add'>+</div><div class='ctx'> 	/* This is for current tv format name */</div><div class='ctx'> 	int tv_format_index;</div><div class='ctx'> </div><div class='hunk'>@@ -403,8 +406,7 @@ static const struct _sdvo_cmd_name {</div><div class='ctx'> 	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define IS_SDVOB(reg)	(reg == SDVOB || reg == PCH_SDVOB)</div><div class='del'>-#define SDVO_NAME(svdo) (IS_SDVOB((svdo)-&gt;sdvo_reg) ? "SDVOB" : "SDVOC")</div><div class='add'>+#define SDVO_NAME(svdo) ((svdo)-&gt;is_sdvob ? "SDVOB" : "SDVOC")</div><div class='ctx'> </div><div class='ctx'> static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,</div><div class='ctx'> 				   const void *args, int args_len)</div><div class='hunk'>@@ -441,9 +443,17 @@ static const char *cmd_status_names[] = {</div><div class='ctx'> static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,</div><div class='ctx'> 				 const void *args, int args_len)</div><div class='ctx'> {</div><div class='del'>-	u8 buf[args_len*2 + 2], status;</div><div class='del'>-	struct i2c_msg msgs[args_len + 3];</div><div class='del'>-	int i, ret;</div><div class='add'>+	u8 *buf, status;</div><div class='add'>+	struct i2c_msg *msgs;</div><div class='add'>+	int i, ret = true;</div><div class='add'>+</div><div class='add'>+	buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);</div><div class='add'>+	if (!msgs)</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='ctx'> 	intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);</div><div class='ctx'> </div><div class='hunk'>@@ -477,15 +487,19 @@ static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,</div><div class='ctx'> 	ret = i2c_transfer(intel_sdvo-&gt;i2c, msgs, i+3);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);</div><div class='del'>-		return false;</div><div class='add'>+		ret = false;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ret != i+3) {</div><div class='ctx'> 		/* failure in I2C transfer */</div><div class='ctx'> 		DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);</div><div class='del'>-		return false;</div><div class='add'>+		ret = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='add'>+out:</div><div class='add'>+	kfree(msgs);</div><div class='add'>+	kfree(buf);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,</div><div class='hunk'>@@ -733,18 +747,18 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,</div><div class='ctx'> 	uint16_t h_sync_offset, v_sync_offset;</div><div class='ctx'> 	int mode_clock;</div><div class='ctx'> </div><div class='del'>-	width = mode-&gt;crtc_hdisplay;</div><div class='del'>-	height = mode-&gt;crtc_vdisplay;</div><div class='add'>+	width = mode-&gt;hdisplay;</div><div class='add'>+	height = mode-&gt;vdisplay;</div><div class='ctx'> </div><div class='ctx'> 	/* do some mode translations */</div><div class='del'>-	h_blank_len = mode-&gt;crtc_hblank_end - mode-&gt;crtc_hblank_start;</div><div class='del'>-	h_sync_len = mode-&gt;crtc_hsync_end - mode-&gt;crtc_hsync_start;</div><div class='add'>+	h_blank_len = mode-&gt;htotal - mode-&gt;hdisplay;</div><div class='add'>+	h_sync_len = mode-&gt;hsync_end - mode-&gt;hsync_start;</div><div class='ctx'> </div><div class='del'>-	v_blank_len = mode-&gt;crtc_vblank_end - mode-&gt;crtc_vblank_start;</div><div class='del'>-	v_sync_len = mode-&gt;crtc_vsync_end - mode-&gt;crtc_vsync_start;</div><div class='add'>+	v_blank_len = mode-&gt;vtotal - mode-&gt;vdisplay;</div><div class='add'>+	v_sync_len = mode-&gt;vsync_end - mode-&gt;vsync_start;</div><div class='ctx'> </div><div class='del'>-	h_sync_offset = mode-&gt;crtc_hsync_start - mode-&gt;crtc_hblank_start;</div><div class='del'>-	v_sync_offset = mode-&gt;crtc_vsync_start - mode-&gt;crtc_vblank_start;</div><div class='add'>+	h_sync_offset = mode-&gt;hsync_start - mode-&gt;hdisplay;</div><div class='add'>+	v_sync_offset = mode-&gt;vsync_start - mode-&gt;vdisplay;</div><div class='ctx'> </div><div class='ctx'> 	mode_clock = mode-&gt;clock;</div><div class='ctx'> 	mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;</div><div class='hunk'>@@ -769,10 +783,12 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,</div><div class='ctx'> 		((v_sync_len &amp; 0x30) &gt;&gt; 4);</div><div class='ctx'> </div><div class='ctx'> 	dtd-&gt;part2.dtd_flags = 0x18;</div><div class='add'>+	if (mode-&gt;flags &amp; DRM_MODE_FLAG_INTERLACE)</div><div class='add'>+		dtd-&gt;part2.dtd_flags |= DTD_FLAG_INTERLACE;</div><div class='ctx'> 	if (mode-&gt;flags &amp; DRM_MODE_FLAG_PHSYNC)</div><div class='del'>-		dtd-&gt;part2.dtd_flags |= 0x2;</div><div class='add'>+		dtd-&gt;part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;</div><div class='ctx'> 	if (mode-&gt;flags &amp; DRM_MODE_FLAG_PVSYNC)</div><div class='del'>-		dtd-&gt;part2.dtd_flags |= 0x4;</div><div class='add'>+		dtd-&gt;part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;</div><div class='ctx'> </div><div class='ctx'> 	dtd-&gt;part2.sdvo_flags = 0;</div><div class='ctx'> 	dtd-&gt;part2.v_sync_off_high = v_sync_offset &amp; 0xc0;</div><div class='hunk'>@@ -806,9 +822,11 @@ static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,</div><div class='ctx'> 	mode-&gt;clock = dtd-&gt;part1.clock * 10;</div><div class='ctx'> </div><div class='ctx'> 	mode-&gt;flags &amp;= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);</div><div class='del'>-	if (dtd-&gt;part2.dtd_flags &amp; 0x2)</div><div class='add'>+	if (dtd-&gt;part2.dtd_flags &amp; DTD_FLAG_INTERLACE)</div><div class='add'>+		mode-&gt;flags |= DRM_MODE_FLAG_INTERLACE;</div><div class='add'>+	if (dtd-&gt;part2.dtd_flags &amp; DTD_FLAG_HSYNC_POSITIVE)</div><div class='ctx'> 		mode-&gt;flags |= DRM_MODE_FLAG_PHSYNC;</div><div class='del'>-	if (dtd-&gt;part2.dtd_flags &amp; 0x4)</div><div class='add'>+	if (dtd-&gt;part2.dtd_flags &amp; DTD_FLAG_VSYNC_POSITIVE)</div><div class='ctx'> 		mode-&gt;flags |= DRM_MODE_FLAG_PVSYNC;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -873,17 +891,24 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)</div><div class='ctx'> 	};</div><div class='ctx'> 	uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;</div><div class='ctx'> 	uint8_t set_buf_index[2] = { 1, 0 };</div><div class='del'>-	uint64_t *data = (uint64_t *)&amp;avi_if;</div><div class='add'>+	uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];</div><div class='add'>+	uint64_t *data = (uint64_t *)sdvo_data;</div><div class='ctx'> 	unsigned i;</div><div class='ctx'> </div><div class='ctx'> 	intel_dip_infoframe_csum(&amp;avi_if);</div><div class='ctx'> </div><div class='add'>+	/* sdvo spec says that the ecc is handled by the hw, and it looks like</div><div class='add'>+	 * we must not send the ecc field, either. */</div><div class='add'>+	memcpy(sdvo_data, &amp;avi_if, 3);</div><div class='add'>+	sdvo_data[3] = avi_if.checksum;</div><div class='add'>+	memcpy(&amp;sdvo_data[4], &amp;avi_if.body, sizeof(avi_if.body.avi));</div><div class='add'>+</div><div class='ctx'> 	if (!intel_sdvo_set_value(intel_sdvo,</div><div class='ctx'> 				  SDVO_CMD_SET_HBUF_INDEX,</div><div class='ctx'> 				  set_buf_index, 2))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; sizeof(avi_if); i += 8) {</div><div class='add'>+	for (i = 0; i &lt; sizeof(sdvo_data); i += 8) {</div><div class='ctx'> 		if (!intel_sdvo_set_value(intel_sdvo,</div><div class='ctx'> 					  SDVO_CMD_SET_HBUF_DATA,</div><div class='ctx'> 					  data, 8))</div><div class='hunk'>@@ -1220,8 +1245,14 @@ static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct in</div><div class='ctx'> </div><div class='ctx'> static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)</div><div class='ctx'> {</div><div class='add'>+	struct drm_device *dev = intel_sdvo-&gt;base.base.dev;</div><div class='ctx'> 	u8 response[2];</div><div class='ctx'> </div><div class='add'>+	/* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise</div><div class='add'>+	 * on the line. */</div><div class='add'>+	if (IS_I945G(dev) || IS_I945GM(dev))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,</div><div class='ctx'> 				    &amp;response, 2) &amp;&amp; response[0];</div><div class='ctx'> }</div><div class='hunk'>@@ -1254,10 +1285,11 @@ intel_sdvo_get_analog_edid(struct drm_connector *connector)</div><div class='ctx'> 	struct drm_i915_private *dev_priv = connector-&gt;dev-&gt;dev_private;</div><div class='ctx'> </div><div class='ctx'> 	return drm_get_edid(connector,</div><div class='del'>-			    &amp;dev_priv-&gt;gmbus[dev_priv-&gt;crt_ddc_pin].adapter);</div><div class='add'>+			    intel_gmbus_get_adapter(dev_priv,</div><div class='add'>+						    dev_priv-&gt;crt_ddc_pin));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum drm_connector_status</div><div class='add'>+static enum drm_connector_status</div><div class='ctx'> intel_sdvo_tmds_sink_detect(struct drm_connector *connector)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);</div><div class='hunk'>@@ -1343,8 +1375,7 @@ intel_sdvo_detect(struct drm_connector *connector, bool force)</div><div class='ctx'> 		return connector_status_unknown;</div><div class='ctx'> </div><div class='ctx'> 	/* add 30ms delay when the output type might be TV */</div><div class='del'>-	if (intel_sdvo-&gt;caps.output_flags &amp;</div><div class='del'>-	    (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))</div><div class='add'>+	if (intel_sdvo-&gt;caps.output_flags &amp; SDVO_TV_MASK)</div><div class='ctx'> 		mdelay(30);</div><div class='ctx'> </div><div class='ctx'> 	if (!intel_sdvo_read_response(intel_sdvo, &amp;response, 2))</div><div class='hunk'>@@ -1564,9 +1595,6 @@ end:</div><div class='ctx'> 			intel_sdvo-&gt;sdvo_lvds_fixed_mode =</div><div class='ctx'> 				drm_mode_duplicate(connector-&gt;dev, newmode);</div><div class='ctx'> </div><div class='del'>-			drm_mode_set_crtcinfo(intel_sdvo-&gt;sdvo_lvds_fixed_mode,</div><div class='del'>-					      0);</div><div class='del'>-</div><div class='ctx'> 			intel_sdvo-&gt;is_lvds = true;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1895,7 +1923,7 @@ intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,</div><div class='ctx'> {</div><div class='ctx'> 	struct sdvo_device_mapping *mapping;</div><div class='ctx'> </div><div class='del'>-	if (IS_SDVOB(reg))</div><div class='add'>+	if (sdvo-&gt;is_sdvob)</div><div class='ctx'> 		mapping = &amp;(dev_priv-&gt;sdvo_mappings[0]);</div><div class='ctx'> 	else</div><div class='ctx'> 		mapping = &amp;(dev_priv-&gt;sdvo_mappings[1]);</div><div class='hunk'>@@ -1913,7 +1941,7 @@ intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	struct sdvo_device_mapping *mapping;</div><div class='ctx'> 	u8 pin;</div><div class='ctx'> </div><div class='del'>-	if (IS_SDVOB(reg))</div><div class='add'>+	if (sdvo-&gt;is_sdvob)</div><div class='ctx'> 		mapping = &amp;dev_priv-&gt;sdvo_mappings[0];</div><div class='ctx'> 	else</div><div class='ctx'> 		mapping = &amp;dev_priv-&gt;sdvo_mappings[1];</div><div class='hunk'>@@ -1922,12 +1950,12 @@ intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,</div><div class='ctx'> 	if (mapping-&gt;initialized)</div><div class='ctx'> 		pin = mapping-&gt;i2c_pin;</div><div class='ctx'> </div><div class='del'>-	if (pin &lt; GMBUS_NUM_PORTS) {</div><div class='del'>-		sdvo-&gt;i2c = &amp;dev_priv-&gt;gmbus[pin].adapter;</div><div class='add'>+	if (intel_gmbus_is_port_valid(pin)) {</div><div class='add'>+		sdvo-&gt;i2c = intel_gmbus_get_adapter(dev_priv, pin);</div><div class='ctx'> 		intel_gmbus_set_speed(sdvo-&gt;i2c, GMBUS_RATE_1MHZ);</div><div class='ctx'> 		intel_gmbus_force_bit(sdvo-&gt;i2c, true);</div><div class='ctx'> 	} else {</div><div class='del'>-		sdvo-&gt;i2c = &amp;dev_priv-&gt;gmbus[GMBUS_PORT_DPB].adapter;</div><div class='add'>+		sdvo-&gt;i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1938,12 +1966,12 @@ intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u8</div><div class='del'>-intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)</div><div class='add'>+intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct sdvo_device_mapping *my_mapping, *other_mapping;</div><div class='ctx'> </div><div class='del'>-	if (IS_SDVOB(sdvo_reg)) {</div><div class='add'>+	if (sdvo-&gt;is_sdvob) {</div><div class='ctx'> 		my_mapping = &amp;dev_priv-&gt;sdvo_mappings[0];</div><div class='ctx'> 		other_mapping = &amp;dev_priv-&gt;sdvo_mappings[1];</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1968,7 +1996,7 @@ intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)</div><div class='ctx'> 	/* No SDVO device info is found for another DVO port,</div><div class='ctx'> 	 * so use mapping assumption we had before BIOS parsing.</div><div class='ctx'> 	 */</div><div class='del'>-	if (IS_SDVOB(sdvo_reg))</div><div class='add'>+	if (sdvo-&gt;is_sdvob)</div><div class='ctx'> 		return 0x70;</div><div class='ctx'> 	else</div><div class='ctx'> 		return 0x72;</div><div class='hunk'>@@ -2193,6 +2221,10 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)</div><div class='ctx'> 		if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))</div><div class='ctx'> 			return false;</div><div class='ctx'> </div><div class='add'>+	if (flags &amp; SDVO_OUTPUT_YPRPB0)</div><div class='add'>+		if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='ctx'> 	if (flags &amp; SDVO_OUTPUT_RGB0)</div><div class='ctx'> 		if (!intel_sdvo_analog_init(intel_sdvo, 0))</div><div class='ctx'> 			return false;</div><div class='hunk'>@@ -2484,7 +2516,7 @@ intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,</div><div class='ctx'> 	return i2c_add_adapter(&amp;sdvo-&gt;ddc) == 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)</div><div class='add'>+bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_encoder *intel_encoder;</div><div class='hunk'>@@ -2496,7 +2528,8 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	intel_sdvo-&gt;sdvo_reg = sdvo_reg;</div><div class='del'>-	intel_sdvo-&gt;slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) &gt;&gt; 1;</div><div class='add'>+	intel_sdvo-&gt;is_sdvob = is_sdvob;</div><div class='add'>+	intel_sdvo-&gt;slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) &gt;&gt; 1;</div><div class='ctx'> 	intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);</div><div class='ctx'> 	if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {</div><div class='ctx'> 		kfree(intel_sdvo);</div><div class='hunk'>@@ -2513,13 +2546,13 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)</div><div class='ctx'> 		u8 byte;</div><div class='ctx'> </div><div class='ctx'> 		if (!intel_sdvo_read_byte(intel_sdvo, i, &amp;byte)) {</div><div class='del'>-			DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",</div><div class='del'>-				      IS_SDVOB(sdvo_reg) ? 'B' : 'C');</div><div class='add'>+			DRM_DEBUG_KMS("No SDVO device found on %s\n",</div><div class='add'>+				      SDVO_NAME(intel_sdvo));</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_SDVOB(sdvo_reg))</div><div class='add'>+	if (intel_sdvo-&gt;is_sdvob)</div><div class='ctx'> 		dev_priv-&gt;hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;</div><div class='ctx'> 	else</div><div class='ctx'> 		dev_priv-&gt;hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;</div><div class='hunk'>@@ -2540,8 +2573,8 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)</div><div class='ctx'> </div><div class='ctx'> 	if (intel_sdvo_output_setup(intel_sdvo,</div><div class='ctx'> 				    intel_sdvo-&gt;caps.output_flags) != true) {</div><div class='del'>-		DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",</div><div class='del'>-			      IS_SDVOB(sdvo_reg) ? 'B' : 'C');</div><div class='add'>+		DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",</div><div class='add'>+			      SDVO_NAME(intel_sdvo));</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_sdvo_regs.h b/drivers/gpu/drm/i915/intel_sdvo_regs.h<br/>index 6b7b22f4d63e..9d030142ee43 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_sdvo_regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_sdvo_regs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_sdvo_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_sdvo_regs.h</a></div><div class='hunk'>@@ -61,6 +61,11 @@ struct intel_sdvo_caps {</div><div class='ctx'> 	u16 output_flags;</div><div class='ctx'> } __attribute__((packed));</div><div class='ctx'> </div><div class='add'>+/* Note: SDVO detailed timing flags match EDID misc flags. */</div><div class='add'>+#define DTD_FLAG_HSYNC_POSITIVE (1 &lt;&lt; 1)</div><div class='add'>+#define DTD_FLAG_VSYNC_POSITIVE (1 &lt;&lt; 2)</div><div class='add'>+#define DTD_FLAG_INTERLACE	(1 &lt;&lt; 7)</div><div class='add'>+</div><div class='ctx'> /** This matches the EDID DTD structure, more or less */</div><div class='ctx'> struct intel_sdvo_dtd {</div><div class='ctx'> 	struct {</div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c<br/>index e90dfb625c42..2a20fb0781d7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_sprite.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_sprite.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_sprite.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_sprite.c</a></div><div class='hunk'>@@ -110,14 +110,18 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,</div><div class='ctx'> 	 * when scaling is disabled.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (crtc_w != src_w || crtc_h != src_h) {</div><div class='del'>-		dev_priv-&gt;sprite_scaling_enabled = true;</div><div class='del'>-		sandybridge_update_wm(dev);</div><div class='del'>-		intel_wait_for_vblank(dev, pipe);</div><div class='add'>+		if (!dev_priv-&gt;sprite_scaling_enabled) {</div><div class='add'>+			dev_priv-&gt;sprite_scaling_enabled = true;</div><div class='add'>+			intel_update_watermarks(dev);</div><div class='add'>+			intel_wait_for_vblank(dev, pipe);</div><div class='add'>+		}</div><div class='ctx'> 		sprscale = SPRITE_SCALE_ENABLE | (src_w &lt;&lt; 16) | src_h;</div><div class='ctx'> 	} else {</div><div class='del'>-		dev_priv-&gt;sprite_scaling_enabled = false;</div><div class='del'>-		/* potentially re-enable LP watermarks */</div><div class='del'>-		sandybridge_update_wm(dev);</div><div class='add'>+		if (dev_priv-&gt;sprite_scaling_enabled) {</div><div class='add'>+			dev_priv-&gt;sprite_scaling_enabled = false;</div><div class='add'>+			/* potentially re-enable LP watermarks */</div><div class='add'>+			intel_update_watermarks(dev);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	I915_WRITE(SPRSTRIDE(pipe), fb-&gt;pitches[0]);</div><div class='hunk'>@@ -133,7 +137,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,</div><div class='ctx'> 	I915_WRITE(SPRSIZE(pipe), (crtc_h &lt;&lt; 16) | crtc_w);</div><div class='ctx'> 	I915_WRITE(SPRSCALE(pipe), sprscale);</div><div class='ctx'> 	I915_WRITE(SPRCTL(pipe), sprctl);</div><div class='del'>-	I915_WRITE(SPRSURF(pipe), obj-&gt;gtt_offset);</div><div class='add'>+	I915_MODIFY_DISPBASE(SPRSURF(pipe), obj-&gt;gtt_offset);</div><div class='ctx'> 	POSTING_READ(SPRSURF(pipe));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -149,8 +153,11 @@ ivb_disable_plane(struct drm_plane *plane)</div><div class='ctx'> 	/* Can't leave the scaler enabled... */</div><div class='ctx'> 	I915_WRITE(SPRSCALE(pipe), 0);</div><div class='ctx'> 	/* Activate double buffered register update */</div><div class='del'>-	I915_WRITE(SPRSURF(pipe), 0);</div><div class='add'>+	I915_MODIFY_DISPBASE(SPRSURF(pipe), 0);</div><div class='ctx'> 	POSTING_READ(SPRSURF(pipe));</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;sprite_scaling_enabled = false;</div><div class='add'>+	intel_update_watermarks(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -208,7 +215,7 @@ ivb_get_colorkey(struct drm_plane *plane, struct drm_intel_sprite_colorkey *key)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-snb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,</div><div class='add'>+ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,</div><div class='ctx'> 		 struct drm_i915_gem_object *obj, int crtc_x, int crtc_y,</div><div class='ctx'> 		 unsigned int crtc_w, unsigned int crtc_h,</div><div class='ctx'> 		 uint32_t x, uint32_t y,</div><div class='hunk'>@@ -218,7 +225,7 @@ snb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct intel_plane *intel_plane = to_intel_plane(plane);</div><div class='ctx'> 	int pipe = intel_plane-&gt;pipe, pixel_size;</div><div class='del'>-	u32 dvscntr, dvsscale = 0;</div><div class='add'>+	u32 dvscntr, dvsscale;</div><div class='ctx'> </div><div class='ctx'> 	dvscntr = I915_READ(DVSCNTR(pipe));</div><div class='ctx'> </div><div class='hunk'>@@ -262,8 +269,8 @@ snb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,</div><div class='ctx'> 	if (obj-&gt;tiling_mode != I915_TILING_NONE)</div><div class='ctx'> 		dvscntr |= DVS_TILED;</div><div class='ctx'> </div><div class='del'>-	/* must disable */</div><div class='del'>-	dvscntr |= DVS_TRICKLE_FEED_DISABLE;</div><div class='add'>+	if (IS_GEN6(dev))</div><div class='add'>+		dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */</div><div class='ctx'> 	dvscntr |= DVS_ENABLE;</div><div class='ctx'> </div><div class='ctx'> 	/* Sizes are 0 based */</div><div class='hunk'>@@ -274,7 +281,8 @@ snb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,</div><div class='ctx'> </div><div class='ctx'> 	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size);</div><div class='ctx'> </div><div class='del'>-	if (crtc_w != src_w || crtc_h != src_h)</div><div class='add'>+	dvsscale = 0;</div><div class='add'>+	if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h)</div><div class='ctx'> 		dvsscale = DVS_SCALE_ENABLE | (src_w &lt;&lt; 16) | src_h;</div><div class='ctx'> </div><div class='ctx'> 	I915_WRITE(DVSSTRIDE(pipe), fb-&gt;pitches[0]);</div><div class='hunk'>@@ -290,12 +298,12 @@ snb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,</div><div class='ctx'> 	I915_WRITE(DVSSIZE(pipe), (crtc_h &lt;&lt; 16) | crtc_w);</div><div class='ctx'> 	I915_WRITE(DVSSCALE(pipe), dvsscale);</div><div class='ctx'> 	I915_WRITE(DVSCNTR(pipe), dvscntr);</div><div class='del'>-	I915_WRITE(DVSSURF(pipe), obj-&gt;gtt_offset);</div><div class='add'>+	I915_MODIFY_DISPBASE(DVSSURF(pipe), obj-&gt;gtt_offset);</div><div class='ctx'> 	POSTING_READ(DVSSURF(pipe));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-snb_disable_plane(struct drm_plane *plane)</div><div class='add'>+ilk_disable_plane(struct drm_plane *plane)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = plane-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='hunk'>@@ -306,7 +314,7 @@ snb_disable_plane(struct drm_plane *plane)</div><div class='ctx'> 	/* Disable the scaler */</div><div class='ctx'> 	I915_WRITE(DVSSCALE(pipe), 0);</div><div class='ctx'> 	/* Flush double buffered register updates */</div><div class='del'>-	I915_WRITE(DVSSURF(pipe), 0);</div><div class='add'>+	I915_MODIFY_DISPBASE(DVSSURF(pipe), 0);</div><div class='ctx'> 	POSTING_READ(DVSSURF(pipe));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -333,7 +341,7 @@ intel_disable_primary(struct drm_crtc *crtc)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-snb_update_colorkey(struct drm_plane *plane,</div><div class='add'>+ilk_update_colorkey(struct drm_plane *plane,</div><div class='ctx'> 		    struct drm_intel_sprite_colorkey *key)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = plane-&gt;dev;</div><div class='hunk'>@@ -362,7 +370,7 @@ snb_update_colorkey(struct drm_plane *plane,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-snb_get_colorkey(struct drm_plane *plane, struct drm_intel_sprite_colorkey *key)</div><div class='add'>+ilk_get_colorkey(struct drm_plane *plane, struct drm_intel_sprite_colorkey *key)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = plane-&gt;dev;</div><div class='ctx'> 	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='hunk'>@@ -550,14 +558,13 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data,</div><div class='ctx'> 			      struct drm_file *file_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_intel_sprite_colorkey *set = data;</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_mode_object *obj;</div><div class='ctx'> 	struct drm_plane *plane;</div><div class='ctx'> 	struct intel_plane *intel_plane;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (!dev_priv)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure we don't try to enable both src &amp; dest simultaneously */</div><div class='ctx'> 	if ((set-&gt;flags &amp; (I915_SET_COLORKEY_DESTINATION | I915_SET_COLORKEY_SOURCE)) == (I915_SET_COLORKEY_DESTINATION | I915_SET_COLORKEY_SOURCE))</div><div class='hunk'>@@ -584,14 +591,13 @@ int intel_sprite_get_colorkey(struct drm_device *dev, void *data,</div><div class='ctx'> 			      struct drm_file *file_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_intel_sprite_colorkey *get = data;</div><div class='del'>-	struct drm_i915_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_mode_object *obj;</div><div class='ctx'> 	struct drm_plane *plane;</div><div class='ctx'> 	struct intel_plane *intel_plane;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (!dev_priv)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (!drm_core_check_feature(dev, DRIVER_MODESET))</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;mode_config.mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -616,6 +622,14 @@ static const struct drm_plane_funcs intel_plane_funcs = {</div><div class='ctx'> 	.destroy = intel_destroy_plane,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static uint32_t ilk_plane_formats[] = {</div><div class='add'>+	DRM_FORMAT_XRGB8888,</div><div class='add'>+	DRM_FORMAT_YUYV,</div><div class='add'>+	DRM_FORMAT_YVYU,</div><div class='add'>+	DRM_FORMAT_UYVY,</div><div class='add'>+	DRM_FORMAT_VYUY,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static uint32_t snb_plane_formats[] = {</div><div class='ctx'> 	DRM_FORMAT_XBGR8888,</div><div class='ctx'> 	DRM_FORMAT_XRGB8888,</div><div class='hunk'>@@ -630,34 +644,56 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_plane *intel_plane;</div><div class='ctx'> 	unsigned long possible_crtcs;</div><div class='add'>+	const uint32_t *plane_formats;</div><div class='add'>+	int num_plane_formats;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!(IS_GEN6(dev) || IS_GEN7(dev)))</div><div class='add'>+	if (INTEL_INFO(dev)-&gt;gen &lt; 5)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	intel_plane = kzalloc(sizeof(struct intel_plane), GFP_KERNEL);</div><div class='ctx'> 	if (!intel_plane)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (IS_GEN6(dev)) {</div><div class='add'>+	switch (INTEL_INFO(dev)-&gt;gen) {</div><div class='add'>+	case 5:</div><div class='add'>+	case 6:</div><div class='ctx'> 		intel_plane-&gt;max_downscale = 16;</div><div class='del'>-		intel_plane-&gt;update_plane = snb_update_plane;</div><div class='del'>-		intel_plane-&gt;disable_plane = snb_disable_plane;</div><div class='del'>-		intel_plane-&gt;update_colorkey = snb_update_colorkey;</div><div class='del'>-		intel_plane-&gt;get_colorkey = snb_get_colorkey;</div><div class='del'>-	} else if (IS_GEN7(dev)) {</div><div class='add'>+		intel_plane-&gt;update_plane = ilk_update_plane;</div><div class='add'>+		intel_plane-&gt;disable_plane = ilk_disable_plane;</div><div class='add'>+		intel_plane-&gt;update_colorkey = ilk_update_colorkey;</div><div class='add'>+		intel_plane-&gt;get_colorkey = ilk_get_colorkey;</div><div class='add'>+</div><div class='add'>+		if (IS_GEN6(dev)) {</div><div class='add'>+			plane_formats = snb_plane_formats;</div><div class='add'>+			num_plane_formats = ARRAY_SIZE(snb_plane_formats);</div><div class='add'>+		} else {</div><div class='add'>+			plane_formats = ilk_plane_formats;</div><div class='add'>+			num_plane_formats = ARRAY_SIZE(ilk_plane_formats);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 7:</div><div class='ctx'> 		intel_plane-&gt;max_downscale = 2;</div><div class='ctx'> 		intel_plane-&gt;update_plane = ivb_update_plane;</div><div class='ctx'> 		intel_plane-&gt;disable_plane = ivb_disable_plane;</div><div class='ctx'> 		intel_plane-&gt;update_colorkey = ivb_update_colorkey;</div><div class='ctx'> 		intel_plane-&gt;get_colorkey = ivb_get_colorkey;</div><div class='add'>+</div><div class='add'>+		plane_formats = snb_plane_formats;</div><div class='add'>+		num_plane_formats = ARRAY_SIZE(snb_plane_formats);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	intel_plane-&gt;pipe = pipe;</div><div class='ctx'> 	possible_crtcs = (1 &lt;&lt; pipe);</div><div class='ctx'> 	ret = drm_plane_init(dev, &amp;intel_plane-&gt;base, possible_crtcs,</div><div class='del'>-			     &amp;intel_plane_funcs, snb_plane_formats,</div><div class='del'>-			     ARRAY_SIZE(snb_plane_formats), false);</div><div class='add'>+			     &amp;intel_plane_funcs,</div><div class='add'>+			     plane_formats, num_plane_formats,</div><div class='add'>+			     false);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		kfree(intel_plane);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c<br/>index 05f765ef5464..a233a51fd7e6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_tv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/i915/intel_tv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/i915/intel_tv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/i915/intel_tv.c</a></div><div class='hunk'>@@ -674,6 +674,54 @@ static const struct tv_mode tv_modes[] = {</div><div class='ctx'> 		.filter_table = filter_table,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='add'>+		.name       = "480p",</div><div class='add'>+		.clock		= 107520,</div><div class='add'>+		.refresh	= 59940,</div><div class='add'>+		.oversample     = TV_OVERSAMPLE_4X,</div><div class='add'>+		.component_only = 1,</div><div class='add'>+</div><div class='add'>+		.hsync_end      = 64,               .hblank_end         = 122,</div><div class='add'>+		.hblank_start   = 842,              .htotal             = 857,</div><div class='add'>+</div><div class='add'>+		.progressive    = true,		    .trilevel_sync = false,</div><div class='add'>+</div><div class='add'>+		.vsync_start_f1 = 12,               .vsync_start_f2     = 12,</div><div class='add'>+		.vsync_len      = 12,</div><div class='add'>+</div><div class='add'>+		.veq_ena        = false,</div><div class='add'>+</div><div class='add'>+		.vi_end_f1      = 44,               .vi_end_f2          = 44,</div><div class='add'>+		.nbr_end        = 479,</div><div class='add'>+</div><div class='add'>+		.burst_ena      = false,</div><div class='add'>+</div><div class='add'>+		.filter_table = filter_table,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name       = "576p",</div><div class='add'>+		.clock		= 107520,</div><div class='add'>+		.refresh	= 50000,</div><div class='add'>+		.oversample     = TV_OVERSAMPLE_4X,</div><div class='add'>+		.component_only = 1,</div><div class='add'>+</div><div class='add'>+		.hsync_end      = 64,               .hblank_end         = 139,</div><div class='add'>+		.hblank_start   = 859,              .htotal             = 863,</div><div class='add'>+</div><div class='add'>+		.progressive    = true,		    .trilevel_sync = false,</div><div class='add'>+</div><div class='add'>+		.vsync_start_f1 = 10,               .vsync_start_f2     = 10,</div><div class='add'>+		.vsync_len      = 10,</div><div class='add'>+</div><div class='add'>+		.veq_ena        = false,</div><div class='add'>+</div><div class='add'>+		.vi_end_f1      = 48,               .vi_end_f2          = 48,</div><div class='add'>+		.nbr_end        = 575,</div><div class='add'>+</div><div class='add'>+		.burst_ena      = false,</div><div class='add'>+</div><div class='add'>+		.filter_table = filter_table,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		.name       = "720p@60Hz",</div><div class='ctx'> 		.clock		= 148800,</div><div class='ctx'> 		.refresh	= 60000,</div><div class='hunk'>@@ -811,7 +859,7 @@ intel_tv_mode_lookup(const char *tv_format)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; sizeof(tv_modes) / sizeof(tv_modes[0]); i++) {</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tv_modes); i++) {</div><div class='ctx'> 		const struct tv_mode *tv_mode = &amp;tv_modes[i];</div><div class='ctx'> </div><div class='ctx'> 		if (!strcmp(tv_format, tv_mode-&gt;name))</div><div class='hunk'>@@ -1153,6 +1201,15 @@ intel_tv_detect_type(struct intel_tv *intel_tv,</div><div class='ctx'> 		   DAC_B_0_7_V |</div><div class='ctx'> 		   DAC_C_0_7_V);</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The TV sense state should be cleared to zero on cantiga platform. Otherwise</div><div class='add'>+	 * the TV is misdetected. This is hardware requirement.</div><div class='add'>+	 */</div><div class='add'>+	if (IS_GM45(dev))</div><div class='add'>+		tv_dac &amp;= ~(TVDAC_STATE_CHG_EN | TVDAC_A_SENSE_CTL |</div><div class='add'>+			    TVDAC_B_SENSE_CTL | TVDAC_C_SENSE_CTL);</div><div class='add'>+</div><div class='ctx'> 	I915_WRITE(TV_CTL, tv_ctl);</div><div class='ctx'> 	I915_WRITE(TV_DAC, tv_dac);</div><div class='ctx'> 	POSTING_READ(TV_DAC);</div><div class='hunk'>@@ -1185,6 +1242,11 @@ intel_tv_detect_type(struct intel_tv *intel_tv,</div><div class='ctx'> </div><div class='ctx'> 	I915_WRITE(TV_DAC, save_tv_dac &amp; ~TVDAC_STATE_CHG_EN);</div><div class='ctx'> 	I915_WRITE(TV_CTL, save_tv_ctl);</div><div class='add'>+	POSTING_READ(TV_CTL);</div><div class='add'>+</div><div class='add'>+	/* For unknown reasons the hw barfs if we don't do this vblank wait. */</div><div class='add'>+	intel_wait_for_vblank(intel_tv-&gt;base.base.dev,</div><div class='add'>+			      to_intel_crtc(intel_tv-&gt;base.base.crtc)-&gt;pipe);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore interrupt config */</div><div class='ctx'> 	if (connector-&gt;polled &amp; DRM_CONNECTOR_POLL_HPD) {</div><div class='hunk'>@@ -1240,11 +1302,8 @@ intel_tv_detect(struct drm_connector *connector, bool force)</div><div class='ctx'> 	int type;</div><div class='ctx'> </div><div class='ctx'> 	mode = reported_modes[0];</div><div class='del'>-	drm_mode_set_crtcinfo(&amp;mode, 0);</div><div class='ctx'> </div><div class='del'>-	if (intel_tv-&gt;base.base.crtc &amp;&amp; intel_tv-&gt;base.base.crtc-&gt;enabled) {</div><div class='del'>-		type = intel_tv_detect_type(intel_tv, connector);</div><div class='del'>-	} else if (force) {</div><div class='add'>+	if (force) {</div><div class='ctx'> 		struct intel_load_detect_pipe tmp;</div><div class='ctx'> </div><div class='ctx'> 		if (intel_get_load_detect_pipe(&amp;intel_tv-&gt;base, connector,</div><div class='head'>diff --git a/drivers/gpu/drm/mgag200/Kconfig b/drivers/gpu/drm/mgag200/Kconfig<br/>new file mode 100644<br/>index 000000000000..d63013497f66<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/mgag200/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+config DRM_MGAG200</div><div class='add'>+	tristate "Kernel modesetting driver for MGA G200 server engines"</div><div class='add'>+	depends on DRM &amp;&amp; PCI &amp;&amp; EXPERIMENTAL</div><div class='add'>+	select FB_SYS_FILLRECT</div><div class='add'>+	select FB_SYS_COPYAREA</div><div class='add'>+	select FB_SYS_IMAGEBLIT</div><div class='add'>+	select DRM_KMS_HELPER</div><div class='add'>+	select DRM_TTM</div><div class='add'>+	help</div><div class='add'>+	 This is a KMS driver for the MGA G200 server chips, it</div><div class='add'>+         does not support the original MGA G200 or any of the desktop</div><div class='add'>+         chips. It requires 0.3.0 of the modesetting userspace driver,</div><div class='add'>+         and a version of mga driver that will fail on KMS enabled</div><div class='add'>+         devices.</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/mgag200/Makefile b/drivers/gpu/drm/mgag200/Makefile<br/>new file mode 100644<br/>index 000000000000..7db592eedbf1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/mgag200/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+ccflags-y := -Iinclude/drm</div><div class='add'>+mgag200-y   := mgag200_main.o mgag200_mode.o \</div><div class='add'>+	mgag200_drv.o mgag200_fb.o mgag200_i2c.o mgag200_ttm.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_DRM_MGAG200) += mgag200.o</div><div class='head'>diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c b/drivers/gpu/drm/mgag200/mgag200_drv.c<br/>new file mode 100644<br/>index 000000000000..93e832d6c328<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/mgag200/mgag200_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_drv.c</a></div><div class='hunk'>@@ -0,0 +1,135 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License version 2. See the file COPYING in the main</div><div class='add'>+ * directory of this archive for more details.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Matthew Garrett</div><div class='add'>+ *          Dave Airlie</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/console.h&gt;</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+</div><div class='add'>+#include "mgag200_drv.h"</div><div class='add'>+</div><div class='add'>+#include "drm_pciids.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is the generic driver code. This binds the driver to the drm core,</div><div class='add'>+ * which then performs further device association and calls our graphics init</div><div class='add'>+ * functions</div><div class='add'>+ */</div><div class='add'>+int mgag200_modeset = -1;</div><div class='add'>+</div><div class='add'>+MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");</div><div class='add'>+module_param_named(modeset, mgag200_modeset, int, 0400);</div><div class='add'>+</div><div class='add'>+static struct drm_driver driver;</div><div class='add'>+</div><div class='add'>+static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {</div><div class='add'>+	{ PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_A },</div><div class='add'>+	{ PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B },</div><div class='add'>+	{ PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV },</div><div class='add'>+	{ PCI_VENDOR_ID_MATROX, 0x532, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_WB },</div><div class='add'>+	{ PCI_VENDOR_ID_MATROX, 0x533, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH },</div><div class='add'>+	{ PCI_VENDOR_ID_MATROX, 0x534, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_ER },</div><div class='add'>+	{0,}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(pci, pciidlist);</div><div class='add'>+</div><div class='add'>+static void mgag200_kick_out_firmware_fb(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct apertures_struct *ap;</div><div class='add'>+	bool primary = false;</div><div class='add'>+</div><div class='add'>+	ap = alloc_apertures(1);</div><div class='add'>+	ap-&gt;ranges[0].base = pci_resource_start(pdev, 0);</div><div class='add'>+	ap-&gt;ranges[0].size = pci_resource_len(pdev, 0);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86</div><div class='add'>+	primary = pdev-&gt;resource[PCI_ROM_RESOURCE].flags &amp; IORESOURCE_ROM_SHADOW;</div><div class='add'>+#endif</div><div class='add'>+	remove_conflicting_framebuffers(ap, "mgag200drmfb", primary);</div><div class='add'>+	kfree(ap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int __devinit</div><div class='add'>+mga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	mgag200_kick_out_firmware_fb(pdev);</div><div class='add'>+</div><div class='add'>+	return drm_get_pci_dev(pdev, ent, &amp;driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_pci_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	drm_put_dev(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations mgag200_driver_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = drm_open,</div><div class='add'>+	.release = drm_release,</div><div class='add'>+	.unlocked_ioctl = drm_ioctl,</div><div class='add'>+	.mmap = mgag200_mmap,</div><div class='add'>+	.poll = drm_poll,</div><div class='add'>+	.fasync = drm_fasync,</div><div class='add'>+	.read = drm_read,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct drm_driver driver = {</div><div class='add'>+	.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_USE_MTRR,</div><div class='add'>+	.load = mgag200_driver_load,</div><div class='add'>+	.unload = mgag200_driver_unload,</div><div class='add'>+	.fops = &amp;mgag200_driver_fops,</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='add'>+	.desc = DRIVER_DESC,</div><div class='add'>+	.date = DRIVER_DATE,</div><div class='add'>+	.major = DRIVER_MAJOR,</div><div class='add'>+	.minor = DRIVER_MINOR,</div><div class='add'>+	.patchlevel = DRIVER_PATCHLEVEL,</div><div class='add'>+</div><div class='add'>+	.gem_init_object = mgag200_gem_init_object,</div><div class='add'>+	.gem_free_object = mgag200_gem_free_object,</div><div class='add'>+	.dumb_create = mgag200_dumb_create,</div><div class='add'>+	.dumb_map_offset = mgag200_dumb_mmap_offset,</div><div class='add'>+	.dumb_destroy = mgag200_dumb_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pci_driver mgag200_pci_driver = {</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='add'>+	.id_table = pciidlist,</div><div class='add'>+	.probe = mga_pci_probe,</div><div class='add'>+	.remove = mga_pci_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init mgag200_init(void)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_VGA_CONSOLE</div><div class='add'>+	if (vgacon_text_force() &amp;&amp; mgag200_modeset == -1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (mgag200_modeset == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return drm_pci_init(&amp;driver, &amp;mgag200_pci_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit mgag200_exit(void)</div><div class='add'>+{</div><div class='add'>+	drm_pci_exit(&amp;driver, &amp;mgag200_pci_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(mgag200_init);</div><div class='add'>+module_exit(mgag200_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR(DRIVER_AUTHOR);</div><div class='add'>+MODULE_DESCRIPTION(DRIVER_DESC);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h<br/>new file mode 100644<br/>index 000000000000..6f13b3563234<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/mgag200/mgag200_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_drv.h</a></div><div class='hunk'>@@ -0,0 +1,276 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2010 Matt Turner.</div><div class='add'>+ * Copyright 2012 Red Hat </div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License version 2. See the file COPYING in the main</div><div class='add'>+ * directory of this archive for more details.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Matthew Garrett</div><div class='add'>+ * 	    Matt Turner</div><div class='add'>+ *	    Dave Airlie</div><div class='add'>+ */</div><div class='add'>+#ifndef __MGAG200_DRV_H__</div><div class='add'>+#define __MGAG200_DRV_H__</div><div class='add'>+</div><div class='add'>+#include &lt;video/vga.h&gt;</div><div class='add'>+</div><div class='add'>+#include "drm/drm_fb_helper.h"</div><div class='add'>+#include "ttm/ttm_bo_api.h"</div><div class='add'>+#include "ttm/ttm_bo_driver.h"</div><div class='add'>+#include "ttm/ttm_placement.h"</div><div class='add'>+#include "ttm/ttm_memory.h"</div><div class='add'>+#include "ttm/ttm_module.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/i2c-algo-bit.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mgag200_reg.h"</div><div class='add'>+</div><div class='add'>+#define DRIVER_AUTHOR		"Matthew Garrett"</div><div class='add'>+</div><div class='add'>+#define DRIVER_NAME		"mgag200"</div><div class='add'>+#define DRIVER_DESC		"MGA G200 SE"</div><div class='add'>+#define DRIVER_DATE		"20110418"</div><div class='add'>+</div><div class='add'>+#define DRIVER_MAJOR		1</div><div class='add'>+#define DRIVER_MINOR		0</div><div class='add'>+#define DRIVER_PATCHLEVEL	0</div><div class='add'>+</div><div class='add'>+#define MGAG200FB_CONN_LIMIT 1</div><div class='add'>+</div><div class='add'>+#define RREG8(reg) ioread8(((void __iomem *)mdev-&gt;rmmio) + (reg))</div><div class='add'>+#define WREG8(reg, v) iowrite8(v, ((void __iomem *)mdev-&gt;rmmio) + (reg))</div><div class='add'>+#define RREG32(reg) ioread32(((void __iomem *)mdev-&gt;rmmio) + (reg))</div><div class='add'>+#define WREG32(reg, v) iowrite32(v, ((void __iomem *)mdev-&gt;rmmio) + (reg))</div><div class='add'>+</div><div class='add'>+#define ATTR_INDEX 0x1fc0</div><div class='add'>+#define ATTR_DATA 0x1fc1</div><div class='add'>+</div><div class='add'>+#define WREG_ATTR(reg, v)					\</div><div class='add'>+	do {							\</div><div class='add'>+		RREG8(0x1fda);					\</div><div class='add'>+		WREG8(ATTR_INDEX, reg);				\</div><div class='add'>+		WREG8(ATTR_DATA, v);				\</div><div class='add'>+	} while (0)						\</div><div class='add'>+</div><div class='add'>+#define WREG_SEQ(reg, v)					\</div><div class='add'>+	do {							\</div><div class='add'>+		WREG8(MGAREG_SEQ_INDEX, reg);			\</div><div class='add'>+		WREG8(MGAREG_SEQ_DATA, v);			\</div><div class='add'>+	} while (0)						\</div><div class='add'>+</div><div class='add'>+#define WREG_CRT(reg, v)					\</div><div class='add'>+	do {							\</div><div class='add'>+		WREG8(MGAREG_CRTC_INDEX, reg);			\</div><div class='add'>+		WREG8(MGAREG_CRTC_DATA, v);			\</div><div class='add'>+	} while (0)						\</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define WREG_ECRT(reg, v)					\</div><div class='add'>+	do {							\</div><div class='add'>+		WREG8(MGAREG_CRTCEXT_INDEX, reg);				\</div><div class='add'>+		WREG8(MGAREG_CRTCEXT_DATA, v);				\</div><div class='add'>+	} while (0)						\</div><div class='add'>+</div><div class='add'>+#define GFX_INDEX 0x1fce</div><div class='add'>+#define GFX_DATA 0x1fcf</div><div class='add'>+</div><div class='add'>+#define WREG_GFX(reg, v)					\</div><div class='add'>+	do {							\</div><div class='add'>+		WREG8(GFX_INDEX, reg);				\</div><div class='add'>+		WREG8(GFX_DATA, v);				\</div><div class='add'>+	} while (0)						\</div><div class='add'>+</div><div class='add'>+#define DAC_INDEX 0x3c00</div><div class='add'>+#define DAC_DATA 0x3c0a</div><div class='add'>+</div><div class='add'>+#define WREG_DAC(reg, v)					\</div><div class='add'>+	do {							\</div><div class='add'>+		WREG8(DAC_INDEX, reg);				\</div><div class='add'>+		WREG8(DAC_DATA, v);				\</div><div class='add'>+	} while (0)						\</div><div class='add'>+</div><div class='add'>+#define MGA_MISC_OUT 0x1fc2</div><div class='add'>+#define MGA_MISC_IN 0x1fcc</div><div class='add'>+</div><div class='add'>+#define MGAG200_MAX_FB_HEIGHT 4096</div><div class='add'>+#define MGAG200_MAX_FB_WIDTH 4096</div><div class='add'>+</div><div class='add'>+#define MATROX_DPMS_CLEARED (-1)</div><div class='add'>+</div><div class='add'>+#define to_mga_crtc(x) container_of(x, struct mga_crtc, base)</div><div class='add'>+#define to_mga_encoder(x) container_of(x, struct mga_encoder, base)</div><div class='add'>+#define to_mga_connector(x) container_of(x, struct mga_connector, base)</div><div class='add'>+#define to_mga_framebuffer(x) container_of(x, struct mga_framebuffer, base)</div><div class='add'>+</div><div class='add'>+struct mga_framebuffer {</div><div class='add'>+	struct drm_framebuffer base;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mga_fbdev {</div><div class='add'>+	struct drm_fb_helper helper;</div><div class='add'>+	struct mga_framebuffer mfb;</div><div class='add'>+	struct list_head fbdev_list;</div><div class='add'>+	void *sysram;</div><div class='add'>+	int size;</div><div class='add'>+	struct ttm_bo_kmap_obj mapping;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mga_crtc {</div><div class='add'>+	struct drm_crtc base;</div><div class='add'>+	u8 lut_r[256], lut_g[256], lut_b[256];</div><div class='add'>+	int last_dpms;</div><div class='add'>+	bool enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mga_mode_info {</div><div class='add'>+	bool mode_config_initialized;</div><div class='add'>+	struct mga_crtc *crtc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mga_encoder {</div><div class='add'>+	struct drm_encoder base;</div><div class='add'>+	int last_dpms;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct mga_i2c_chan {</div><div class='add'>+	struct i2c_adapter adapter;</div><div class='add'>+	struct drm_device *dev;</div><div class='add'>+	struct i2c_algo_bit_data bit;</div><div class='add'>+	int data, clock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mga_connector {</div><div class='add'>+	struct drm_connector base;</div><div class='add'>+	struct mga_i2c_chan *i2c;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct mga_mc {</div><div class='add'>+	resource_size_t			vram_size;</div><div class='add'>+	resource_size_t			vram_base;</div><div class='add'>+	resource_size_t			vram_window;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mga_type {</div><div class='add'>+	G200_SE_A,</div><div class='add'>+	G200_SE_B,</div><div class='add'>+	G200_WB,</div><div class='add'>+	G200_EV,</div><div class='add'>+	G200_EH,</div><div class='add'>+	G200_ER,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define IS_G200_SE(mdev) (mdev-&gt;type == G200_SE_A || mdev-&gt;type == G200_SE_B)</div><div class='add'>+</div><div class='add'>+struct mga_device {</div><div class='add'>+	struct drm_device		*dev;</div><div class='add'>+	unsigned long			flags;</div><div class='add'>+</div><div class='add'>+	resource_size_t			rmmio_base;</div><div class='add'>+	resource_size_t			rmmio_size;</div><div class='add'>+	void __iomem			*rmmio;</div><div class='add'>+</div><div class='add'>+	drm_local_map_t			*framebuffer;</div><div class='add'>+</div><div class='add'>+	struct mga_mc			mc;</div><div class='add'>+	struct mga_mode_info		mode_info;</div><div class='add'>+</div><div class='add'>+	struct mga_fbdev *mfbdev;</div><div class='add'>+</div><div class='add'>+	bool				suspended;</div><div class='add'>+	int				num_crtc;</div><div class='add'>+	enum mga_type			type;</div><div class='add'>+	int				has_sdram;</div><div class='add'>+	struct drm_display_mode		mode;</div><div class='add'>+</div><div class='add'>+	int bpp_shifts[4];</div><div class='add'>+</div><div class='add'>+	int fb_mtrr;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		struct drm_global_reference mem_global_ref;</div><div class='add'>+		struct ttm_bo_global_ref bo_global_ref;</div><div class='add'>+		struct ttm_bo_device bdev;</div><div class='add'>+		atomic_t validate_sequence;</div><div class='add'>+	} ttm;</div><div class='add'>+</div><div class='add'>+	u32 reg_1e24; /* SE model number */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct mgag200_bo {</div><div class='add'>+	struct ttm_buffer_object bo;</div><div class='add'>+	struct ttm_placement placement;</div><div class='add'>+	struct ttm_bo_kmap_obj kmap;</div><div class='add'>+	struct drm_gem_object gem;</div><div class='add'>+	u32 placements[3];</div><div class='add'>+	int pin_count;</div><div class='add'>+};</div><div class='add'>+#define gem_to_mga_bo(gobj) container_of((gobj), struct mgag200_bo, gem)</div><div class='add'>+</div><div class='add'>+static inline struct mgag200_bo *</div><div class='add'>+mgag200_bo(struct ttm_buffer_object *bo)</div><div class='add'>+{</div><div class='add'>+	return container_of(bo, struct mgag200_bo, bo);</div><div class='add'>+}</div><div class='add'>+				/* mga_crtc.c */</div><div class='add'>+void mga_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,</div><div class='add'>+			     u16 blue, int regno);</div><div class='add'>+void mga_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,</div><div class='add'>+			     u16 *blue, int regno);</div><div class='add'>+</div><div class='add'>+				/* mgag200_mode.c */</div><div class='add'>+int mgag200_modeset_init(struct mga_device *mdev);</div><div class='add'>+void mgag200_modeset_fini(struct mga_device *mdev);</div><div class='add'>+</div><div class='add'>+				/* mga_fbdev.c */</div><div class='add'>+int mgag200_fbdev_init(struct mga_device *mdev);</div><div class='add'>+void mgag200_fbdev_fini(struct mga_device *mdev);</div><div class='add'>+</div><div class='add'>+				/* mgag200_main.c */</div><div class='add'>+int mgag200_framebuffer_init(struct drm_device *dev,</div><div class='add'>+			     struct mga_framebuffer *mfb,</div><div class='add'>+			     struct drm_mode_fb_cmd2 *mode_cmd,</div><div class='add'>+			     struct drm_gem_object *obj);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+int mgag200_driver_load(struct drm_device *dev, unsigned long flags);</div><div class='add'>+int mgag200_driver_unload(struct drm_device *dev);</div><div class='add'>+int mgag200_gem_create(struct drm_device *dev,</div><div class='add'>+		   u32 size, bool iskernel,</div><div class='add'>+		       struct drm_gem_object **obj);</div><div class='add'>+int mgag200_gem_init_object(struct drm_gem_object *obj);</div><div class='add'>+int mgag200_dumb_create(struct drm_file *file,</div><div class='add'>+			struct drm_device *dev,</div><div class='add'>+			struct drm_mode_create_dumb *args);</div><div class='add'>+int mgag200_dumb_destroy(struct drm_file *file,</div><div class='add'>+			 struct drm_device *dev,</div><div class='add'>+			 uint32_t handle);</div><div class='add'>+void mgag200_gem_free_object(struct drm_gem_object *obj);</div><div class='add'>+int</div><div class='add'>+mgag200_dumb_mmap_offset(struct drm_file *file,</div><div class='add'>+			 struct drm_device *dev,</div><div class='add'>+			 uint32_t handle,</div><div class='add'>+			 uint64_t *offset);</div><div class='add'>+				/* mga_i2c.c */</div><div class='add'>+struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev);</div><div class='add'>+void mgag200_i2c_destroy(struct mga_i2c_chan *i2c);</div><div class='add'>+</div><div class='add'>+#define DRM_FILE_PAGE_OFFSET (0x100000000ULL &gt;&gt; PAGE_SHIFT)</div><div class='add'>+void mgag200_ttm_placement(struct mgag200_bo *bo, int domain);</div><div class='add'>+</div><div class='add'>+int mgag200_bo_reserve(struct mgag200_bo *bo, bool no_wait);</div><div class='add'>+void mgag200_bo_unreserve(struct mgag200_bo *bo);</div><div class='add'>+int mgag200_bo_create(struct drm_device *dev, int size, int align,</div><div class='add'>+		      uint32_t flags, struct mgag200_bo **pastbo);</div><div class='add'>+int mgag200_mm_init(struct mga_device *mdev);</div><div class='add'>+void mgag200_mm_fini(struct mga_device *mdev);</div><div class='add'>+int mgag200_mmap(struct file *filp, struct vm_area_struct *vma);</div><div class='add'>+int mgag200_bo_pin(struct mgag200_bo *bo, u32 pl_flag, u64 *gpu_addr);</div><div class='add'>+int mgag200_bo_unpin(struct mgag200_bo *bo);</div><div class='add'>+int mgag200_bo_push_sysram(struct mgag200_bo *bo);</div><div class='add'>+#endif				/* __MGAG200_DRV_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/mgag200/mgag200_fb.c b/drivers/gpu/drm/mgag200/mgag200_fb.c<br/>new file mode 100644<br/>index 000000000000..880d3369760e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/mgag200/mgag200_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_fb.c</a></div><div class='hunk'>@@ -0,0 +1,294 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2010 Matt Turner.</div><div class='add'>+ * Copyright 2012 Red Hat</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License version 2. See the file COPYING in the main</div><div class='add'>+ * directory of this archive for more details.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Matthew Garrett</div><div class='add'>+ *          Matt Turner</div><div class='add'>+ *          Dave Airlie</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+#include "drm_fb_helper.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/fb.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mgag200_drv.h"</div><div class='add'>+</div><div class='add'>+static void mga_dirty_update(struct mga_fbdev *mfbdev,</div><div class='add'>+			     int x, int y, int width, int height)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	struct mgag200_bo *bo;</div><div class='add'>+	int src_offset, dst_offset;</div><div class='add'>+	int bpp = (mfbdev-&gt;mfb.base.bits_per_pixel + 7)/8;</div><div class='add'>+	int ret;</div><div class='add'>+	bool unmap = false;</div><div class='add'>+</div><div class='add'>+	obj = mfbdev-&gt;mfb.obj;</div><div class='add'>+	bo = gem_to_mga_bo(obj);</div><div class='add'>+</div><div class='add'>+	ret = mgag200_bo_reserve(bo, true);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("failed to reserve fb bo\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!bo-&gt;kmap.virtual) {</div><div class='add'>+		ret = ttm_bo_kmap(&amp;bo-&gt;bo, 0, bo-&gt;bo.num_pages, &amp;bo-&gt;kmap);</div><div class='add'>+		if (ret) {</div><div class='add'>+			DRM_ERROR("failed to kmap fb updates\n");</div><div class='add'>+			mgag200_bo_unreserve(bo);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		unmap = true;</div><div class='add'>+	}</div><div class='add'>+	for (i = y; i &lt; y + height; i++) {</div><div class='add'>+		/* assume equal stride for now */</div><div class='add'>+		src_offset = dst_offset = i * mfbdev-&gt;mfb.base.pitches[0] + (x * bpp);</div><div class='add'>+		memcpy_toio(bo-&gt;kmap.virtual + src_offset, mfbdev-&gt;sysram + src_offset, width * bpp);</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+	if (unmap)</div><div class='add'>+		ttm_bo_kunmap(&amp;bo-&gt;kmap);</div><div class='add'>+</div><div class='add'>+	mgag200_bo_unreserve(bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_fillrect(struct fb_info *info,</div><div class='add'>+			 const struct fb_fillrect *rect)</div><div class='add'>+{</div><div class='add'>+	struct mga_fbdev *mfbdev = info-&gt;par;</div><div class='add'>+	sys_fillrect(info, rect);</div><div class='add'>+	mga_dirty_update(mfbdev, rect-&gt;dx, rect-&gt;dy, rect-&gt;width,</div><div class='add'>+			 rect-&gt;height);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_copyarea(struct fb_info *info,</div><div class='add'>+			 const struct fb_copyarea *area)</div><div class='add'>+{</div><div class='add'>+	struct mga_fbdev *mfbdev = info-&gt;par;</div><div class='add'>+	sys_copyarea(info, area);</div><div class='add'>+	mga_dirty_update(mfbdev, area-&gt;dx, area-&gt;dy, area-&gt;width,</div><div class='add'>+			 area-&gt;height);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_imageblit(struct fb_info *info,</div><div class='add'>+			  const struct fb_image *image)</div><div class='add'>+{</div><div class='add'>+	struct mga_fbdev *mfbdev = info-&gt;par;</div><div class='add'>+	sys_imageblit(info, image);</div><div class='add'>+	mga_dirty_update(mfbdev, image-&gt;dx, image-&gt;dy, image-&gt;width,</div><div class='add'>+			 image-&gt;height);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static struct fb_ops mgag200fb_ops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.fb_check_var = drm_fb_helper_check_var,</div><div class='add'>+	.fb_set_par = drm_fb_helper_set_par,</div><div class='add'>+	.fb_fillrect = mga_fillrect,</div><div class='add'>+	.fb_copyarea = mga_copyarea,</div><div class='add'>+	.fb_imageblit = mga_imageblit,</div><div class='add'>+	.fb_pan_display = drm_fb_helper_pan_display,</div><div class='add'>+	.fb_blank = drm_fb_helper_blank,</div><div class='add'>+	.fb_setcmap = drm_fb_helper_setcmap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mgag200fb_create_object(struct mga_fbdev *afbdev,</div><div class='add'>+				   struct drm_mode_fb_cmd2 *mode_cmd,</div><div class='add'>+				   struct drm_gem_object **gobj_p)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = afbdev-&gt;helper.dev;</div><div class='add'>+	u32 bpp, depth;</div><div class='add'>+	u32 size;</div><div class='add'>+	struct drm_gem_object *gobj;</div><div class='add'>+</div><div class='add'>+	int ret = 0;</div><div class='add'>+	drm_fb_get_bpp_depth(mode_cmd-&gt;pixel_format, &amp;depth, &amp;bpp);</div><div class='add'>+</div><div class='add'>+	size = mode_cmd-&gt;pitches[0] * mode_cmd-&gt;height;</div><div class='add'>+	ret = mgag200_gem_create(dev, size, true, &amp;gobj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*gobj_p = gobj;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mgag200fb_create(struct mga_fbdev *mfbdev,</div><div class='add'>+			   struct drm_fb_helper_surface_size *sizes)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = mfbdev-&gt;helper.dev;</div><div class='add'>+	struct drm_mode_fb_cmd2 mode_cmd;</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+	struct fb_info *info;</div><div class='add'>+	struct drm_framebuffer *fb;</div><div class='add'>+	struct drm_gem_object *gobj = NULL;</div><div class='add'>+	struct device *device = &amp;dev-&gt;pdev-&gt;dev;</div><div class='add'>+	struct mgag200_bo *bo;</div><div class='add'>+	int ret;</div><div class='add'>+	void *sysram;</div><div class='add'>+	int size;</div><div class='add'>+</div><div class='add'>+	mode_cmd.width = sizes-&gt;surface_width;</div><div class='add'>+	mode_cmd.height = sizes-&gt;surface_height;</div><div class='add'>+	mode_cmd.pitches[0] = mode_cmd.width * ((sizes-&gt;surface_bpp + 7) / 8);</div><div class='add'>+</div><div class='add'>+	mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes-&gt;surface_bpp,</div><div class='add'>+							  sizes-&gt;surface_depth);</div><div class='add'>+	size = mode_cmd.pitches[0] * mode_cmd.height;</div><div class='add'>+</div><div class='add'>+	ret = mgag200fb_create_object(mfbdev, &amp;mode_cmd, &amp;gobj);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("failed to create fbcon backing object %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	bo = gem_to_mga_bo(gobj);</div><div class='add'>+</div><div class='add'>+	sysram = vmalloc(size);</div><div class='add'>+	if (!sysram)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	info = framebuffer_alloc(0, device);</div><div class='add'>+	if (info == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	info-&gt;par = mfbdev;</div><div class='add'>+</div><div class='add'>+	ret = mgag200_framebuffer_init(dev, &amp;mfbdev-&gt;mfb, &amp;mode_cmd, gobj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mfbdev-&gt;sysram = sysram;</div><div class='add'>+	mfbdev-&gt;size = size;</div><div class='add'>+</div><div class='add'>+	fb = &amp;mfbdev-&gt;mfb.base;</div><div class='add'>+</div><div class='add'>+	/* setup helper */</div><div class='add'>+	mfbdev-&gt;helper.fb = fb;</div><div class='add'>+	mfbdev-&gt;helper.fbdev = info;</div><div class='add'>+</div><div class='add'>+	ret = fb_alloc_cmap(&amp;info-&gt;cmap, 256, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("%s: can't allocate color map\n", info-&gt;fix.id);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	strcpy(info-&gt;fix.id, "mgadrmfb");</div><div class='add'>+</div><div class='add'>+	info-&gt;flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;</div><div class='add'>+	info-&gt;fbops = &amp;mgag200fb_ops;</div><div class='add'>+</div><div class='add'>+	/* setup aperture base/size for vesafb takeover */</div><div class='add'>+	info-&gt;apertures = alloc_apertures(1);</div><div class='add'>+	if (!info-&gt;apertures) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	info-&gt;apertures-&gt;ranges[0].base = mdev-&gt;dev-&gt;mode_config.fb_base;</div><div class='add'>+	info-&gt;apertures-&gt;ranges[0].size = mdev-&gt;mc.vram_size;</div><div class='add'>+</div><div class='add'>+	drm_fb_helper_fill_fix(info, fb-&gt;pitches[0], fb-&gt;depth);</div><div class='add'>+	drm_fb_helper_fill_var(info, &amp;mfbdev-&gt;helper, sizes-&gt;fb_width,</div><div class='add'>+			       sizes-&gt;fb_height);</div><div class='add'>+</div><div class='add'>+	info-&gt;screen_base = sysram;</div><div class='add'>+	info-&gt;screen_size = size;</div><div class='add'>+	info-&gt;pixmap.flags = FB_PIXMAP_SYSTEM;</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_KMS("allocated %dx%d\n",</div><div class='add'>+		      fb-&gt;width, fb-&gt;height);</div><div class='add'>+	return 0;</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_fb_find_or_create_single(struct drm_fb_helper *helper,</div><div class='add'>+					   struct drm_fb_helper_surface_size</div><div class='add'>+					   *sizes)</div><div class='add'>+{</div><div class='add'>+	struct mga_fbdev *mfbdev = (struct mga_fbdev *)helper;</div><div class='add'>+	int new_fb = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!helper-&gt;fb) {</div><div class='add'>+		ret = mgag200fb_create(mfbdev, sizes);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		new_fb = 1;</div><div class='add'>+	}</div><div class='add'>+	return new_fb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_fbdev_destroy(struct drm_device *dev,</div><div class='add'>+				struct mga_fbdev *mfbdev)</div><div class='add'>+{</div><div class='add'>+	struct fb_info *info;</div><div class='add'>+	struct mga_framebuffer *mfb = &amp;mfbdev-&gt;mfb;</div><div class='add'>+</div><div class='add'>+	if (mfbdev-&gt;helper.fbdev) {</div><div class='add'>+		info = mfbdev-&gt;helper.fbdev;</div><div class='add'>+</div><div class='add'>+		unregister_framebuffer(info);</div><div class='add'>+		if (info-&gt;cmap.len)</div><div class='add'>+			fb_dealloc_cmap(&amp;info-&gt;cmap);</div><div class='add'>+		framebuffer_release(info);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mfb-&gt;obj) {</div><div class='add'>+		drm_gem_object_unreference_unlocked(mfb-&gt;obj);</div><div class='add'>+		mfb-&gt;obj = NULL;</div><div class='add'>+	}</div><div class='add'>+	drm_fb_helper_fini(&amp;mfbdev-&gt;helper);</div><div class='add'>+	vfree(mfbdev-&gt;sysram);</div><div class='add'>+	drm_framebuffer_cleanup(&amp;mfb-&gt;base);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct drm_fb_helper_funcs mga_fb_helper_funcs = {</div><div class='add'>+	.gamma_set = mga_crtc_fb_gamma_set,</div><div class='add'>+	.gamma_get = mga_crtc_fb_gamma_get,</div><div class='add'>+	.fb_probe = mga_fb_find_or_create_single,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mgag200_fbdev_init(struct mga_device *mdev)</div><div class='add'>+{</div><div class='add'>+	struct mga_fbdev *mfbdev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mfbdev = kzalloc(sizeof(struct mga_fbdev), GFP_KERNEL);</div><div class='add'>+	if (!mfbdev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mdev-&gt;mfbdev = mfbdev;</div><div class='add'>+	mfbdev-&gt;helper.funcs = &amp;mga_fb_helper_funcs;</div><div class='add'>+</div><div class='add'>+	ret = drm_fb_helper_init(mdev-&gt;dev, &amp;mfbdev-&gt;helper,</div><div class='add'>+				 mdev-&gt;num_crtc, MGAG200FB_CONN_LIMIT);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(mfbdev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	drm_fb_helper_single_add_all_connectors(&amp;mfbdev-&gt;helper);</div><div class='add'>+	drm_fb_helper_initial_config(&amp;mfbdev-&gt;helper, 32);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mgag200_fbdev_fini(struct mga_device *mdev)</div><div class='add'>+{</div><div class='add'>+	if (!mdev-&gt;mfbdev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mga_fbdev_destroy(mdev-&gt;dev, mdev-&gt;mfbdev);</div><div class='add'>+	kfree(mdev-&gt;mfbdev);</div><div class='add'>+	mdev-&gt;mfbdev = NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/mgag200/mgag200_i2c.c b/drivers/gpu/drm/mgag200/mgag200_i2c.c<br/>new file mode 100644<br/>index 000000000000..dd3568a1b6b0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/mgag200/mgag200_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_i2c.c</a></div><div class='hunk'>@@ -0,0 +1,156 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the</div><div class='add'>+ * "Software"), to deal in the Software without restriction, including</div><div class='add'>+ * without limitation the rights to use, copy, modify, merge, publish,</div><div class='add'>+ * distribute, sub license, and/or sell copies of the Software, and to</div><div class='add'>+ * permit persons to whom the Software is furnished to do so, subject to</div><div class='add'>+ * the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,</div><div class='add'>+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR</div><div class='add'>+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE</div><div class='add'>+ * USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the</div><div class='add'>+ * next paragraph) shall be included in all copies or substantial portions</div><div class='add'>+ * of the Software.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * Authors: Dave Airlie &lt;airlied@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/i2c-algo-bit.h&gt;</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+</div><div class='add'>+#include "mgag200_drv.h"</div><div class='add'>+</div><div class='add'>+static int mga_i2c_read_gpio(struct mga_device *mdev)</div><div class='add'>+{</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_GEN_IO_DATA);</div><div class='add'>+	return RREG8(DAC_DATA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_i2c_set_gpio(struct mga_device *mdev, int mask, int val)</div><div class='add'>+{</div><div class='add'>+	int tmp;</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_GEN_IO_CTL);</div><div class='add'>+	tmp = (RREG8(DAC_DATA) &amp; mask) | val;</div><div class='add'>+	WREG_DAC(MGA1064_GEN_IO_CTL, tmp);</div><div class='add'>+	WREG_DAC(MGA1064_GEN_IO_DATA, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mga_i2c_set(struct mga_device *mdev, int mask, int state)</div><div class='add'>+{</div><div class='add'>+	if (state)</div><div class='add'>+		state = 0;</div><div class='add'>+	else</div><div class='add'>+		state = mask;</div><div class='add'>+	mga_i2c_set_gpio(mdev, ~mask, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_gpio_setsda(void *data, int state)</div><div class='add'>+{</div><div class='add'>+	struct mga_i2c_chan *i2c = data;</div><div class='add'>+	struct mga_device *mdev = i2c-&gt;dev-&gt;dev_private;</div><div class='add'>+	mga_i2c_set(mdev, i2c-&gt;data, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_gpio_setscl(void *data, int state)</div><div class='add'>+{</div><div class='add'>+	struct mga_i2c_chan *i2c = data;</div><div class='add'>+	struct mga_device *mdev = i2c-&gt;dev-&gt;dev_private;</div><div class='add'>+	mga_i2c_set(mdev, i2c-&gt;clock, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_gpio_getsda(void *data)</div><div class='add'>+{</div><div class='add'>+	struct mga_i2c_chan *i2c = data;</div><div class='add'>+	struct mga_device *mdev = i2c-&gt;dev-&gt;dev_private;</div><div class='add'>+	return (mga_i2c_read_gpio(mdev) &amp; i2c-&gt;data) ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_gpio_getscl(void *data)</div><div class='add'>+{</div><div class='add'>+	struct mga_i2c_chan *i2c = data;</div><div class='add'>+	struct mga_device *mdev = i2c-&gt;dev-&gt;dev_private;</div><div class='add'>+	return (mga_i2c_read_gpio(mdev) &amp; i2c-&gt;clock) ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+	struct mga_i2c_chan *i2c;</div><div class='add'>+	int ret;</div><div class='add'>+	int data, clock;</div><div class='add'>+</div><div class='add'>+	WREG_DAC(MGA1064_GEN_IO_DATA, 0xff);</div><div class='add'>+	WREG_DAC(MGA1064_GEN_IO_CTL, 0);</div><div class='add'>+</div><div class='add'>+	switch (mdev-&gt;type) {</div><div class='add'>+	case G200_SE_A:</div><div class='add'>+	case G200_SE_B:</div><div class='add'>+	case G200_EV:</div><div class='add'>+	case G200_WB:</div><div class='add'>+		data = 1;</div><div class='add'>+		clock = 2;</div><div class='add'>+		break;</div><div class='add'>+	case G200_EH:</div><div class='add'>+	case G200_ER:</div><div class='add'>+		data = 2;</div><div class='add'>+		clock = 1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		data = 2;</div><div class='add'>+		clock = 8;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i2c = kzalloc(sizeof(struct mga_i2c_chan), GFP_KERNEL);</div><div class='add'>+	if (!i2c)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	i2c-&gt;data = data;</div><div class='add'>+	i2c-&gt;clock = clock;</div><div class='add'>+	i2c-&gt;adapter.owner = THIS_MODULE;</div><div class='add'>+	i2c-&gt;adapter.class = I2C_CLASS_DDC;</div><div class='add'>+	i2c-&gt;adapter.dev.parent = &amp;dev-&gt;pdev-&gt;dev;</div><div class='add'>+	i2c-&gt;dev = dev;</div><div class='add'>+	i2c_set_adapdata(&amp;i2c-&gt;adapter, i2c);</div><div class='add'>+	snprintf(i2c-&gt;adapter.name, sizeof(i2c-&gt;adapter.name), "mga i2c");</div><div class='add'>+</div><div class='add'>+	i2c-&gt;adapter.algo_data = &amp;i2c-&gt;bit;</div><div class='add'>+</div><div class='add'>+	i2c-&gt;bit.udelay = 10;</div><div class='add'>+	i2c-&gt;bit.timeout = 2;</div><div class='add'>+	i2c-&gt;bit.data = i2c;</div><div class='add'>+	i2c-&gt;bit.setsda		= mga_gpio_setsda;</div><div class='add'>+	i2c-&gt;bit.setscl		= mga_gpio_setscl;</div><div class='add'>+	i2c-&gt;bit.getsda		= mga_gpio_getsda;</div><div class='add'>+	i2c-&gt;bit.getscl		= mga_gpio_getscl;</div><div class='add'>+</div><div class='add'>+	ret = i2c_bit_add_bus(&amp;i2c-&gt;adapter);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(i2c);</div><div class='add'>+		i2c = NULL;</div><div class='add'>+	}</div><div class='add'>+	return i2c;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mgag200_i2c_destroy(struct mga_i2c_chan *i2c)</div><div class='add'>+{</div><div class='add'>+	if (!i2c)</div><div class='add'>+		return;</div><div class='add'>+	i2c_del_adapter(&amp;i2c-&gt;adapter);</div><div class='add'>+	kfree(i2c);</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c b/drivers/gpu/drm/mgag200/mgag200_main.c<br/>new file mode 100644<br/>index 000000000000..636a81cd2f37<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/mgag200/mgag200_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_main.c</a></div><div class='hunk'>@@ -0,0 +1,388 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2010 Matt Turner.</div><div class='add'>+ * Copyright 2012 Red Hat</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License version 2. See the file COPYING in the main</div><div class='add'>+ * directory of this archive for more details.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Matthew Garrett</div><div class='add'>+ *          Matt Turner</div><div class='add'>+ *          Dave Airlie</div><div class='add'>+ */</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+#include "drm_crtc_helper.h"</div><div class='add'>+#include "mgag200_drv.h"</div><div class='add'>+</div><div class='add'>+static void mga_user_framebuffer_destroy(struct drm_framebuffer *fb)</div><div class='add'>+{</div><div class='add'>+	struct mga_framebuffer *mga_fb = to_mga_framebuffer(fb);</div><div class='add'>+	if (mga_fb-&gt;obj)</div><div class='add'>+		drm_gem_object_unreference_unlocked(mga_fb-&gt;obj);</div><div class='add'>+	drm_framebuffer_cleanup(fb);</div><div class='add'>+	kfree(fb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_user_framebuffer_create_handle(struct drm_framebuffer *fb,</div><div class='add'>+						 struct drm_file *file_priv,</div><div class='add'>+						 unsigned int *handle)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct drm_framebuffer_funcs mga_fb_funcs = {</div><div class='add'>+	.destroy = mga_user_framebuffer_destroy,</div><div class='add'>+	.create_handle = mga_user_framebuffer_create_handle,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mgag200_framebuffer_init(struct drm_device *dev,</div><div class='add'>+			     struct mga_framebuffer *gfb,</div><div class='add'>+			     struct drm_mode_fb_cmd2 *mode_cmd,</div><div class='add'>+			     struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	int ret = drm_framebuffer_init(dev, &amp;gfb-&gt;base, &amp;mga_fb_funcs);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("drm_framebuffer_init failed: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	drm_helper_mode_fill_fb_struct(&amp;gfb-&gt;base, mode_cmd);</div><div class='add'>+	gfb-&gt;obj = obj;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct drm_framebuffer *</div><div class='add'>+mgag200_user_framebuffer_create(struct drm_device *dev,</div><div class='add'>+				struct drm_file *filp,</div><div class='add'>+				struct drm_mode_fb_cmd2 *mode_cmd)</div><div class='add'>+{</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	struct mga_framebuffer *mga_fb;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	obj = drm_gem_object_lookup(dev, filp, mode_cmd-&gt;handles[0]);</div><div class='add'>+	if (obj == NULL)</div><div class='add'>+		return ERR_PTR(-ENOENT);</div><div class='add'>+</div><div class='add'>+	mga_fb = kzalloc(sizeof(*mga_fb), GFP_KERNEL);</div><div class='add'>+	if (!mga_fb) {</div><div class='add'>+		drm_gem_object_unreference_unlocked(obj);</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mgag200_framebuffer_init(dev, mga_fb, mode_cmd, obj);</div><div class='add'>+	if (ret) {</div><div class='add'>+		drm_gem_object_unreference_unlocked(obj);</div><div class='add'>+		kfree(mga_fb);</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+	}</div><div class='add'>+	return &amp;mga_fb-&gt;base;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct drm_mode_config_funcs mga_mode_funcs = {</div><div class='add'>+	.fb_create = mgag200_user_framebuffer_create,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Unmap the framebuffer from the core and release the memory */</div><div class='add'>+static void mga_vram_fini(struct mga_device *mdev)</div><div class='add'>+{</div><div class='add'>+	pci_iounmap(mdev-&gt;dev-&gt;pdev, mdev-&gt;rmmio);</div><div class='add'>+	mdev-&gt;rmmio = NULL;</div><div class='add'>+	if (mdev-&gt;mc.vram_base)</div><div class='add'>+		release_mem_region(mdev-&gt;mc.vram_base, mdev-&gt;mc.vram_window);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_probe_vram(struct mga_device *mdev, void __iomem *mem)</div><div class='add'>+{</div><div class='add'>+	int offset;</div><div class='add'>+	int orig;</div><div class='add'>+	int test1, test2;</div><div class='add'>+	int orig1, orig2;</div><div class='add'>+</div><div class='add'>+	/* Probe */</div><div class='add'>+	orig = ioread16(mem);</div><div class='add'>+	iowrite16(0, mem);</div><div class='add'>+</div><div class='add'>+	for (offset = 0x100000; offset &lt; mdev-&gt;mc.vram_window; offset += 0x4000) {</div><div class='add'>+		orig1 = ioread8(mem + offset);</div><div class='add'>+		orig2 = ioread8(mem + offset + 0x100);</div><div class='add'>+</div><div class='add'>+		iowrite16(0xaa55, mem + offset);</div><div class='add'>+		iowrite16(0xaa55, mem + offset + 0x100);</div><div class='add'>+</div><div class='add'>+		test1 = ioread16(mem + offset);</div><div class='add'>+		test2 = ioread16(mem);</div><div class='add'>+</div><div class='add'>+		iowrite16(orig1, mem + offset);</div><div class='add'>+		iowrite16(orig2, mem + offset + 0x100);</div><div class='add'>+</div><div class='add'>+		if (test1 != 0xaa55) {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (test2) {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iowrite16(orig, mem);</div><div class='add'>+	return offset - 65536;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Map the framebuffer from the card and configure the core */</div><div class='add'>+static int mga_vram_init(struct mga_device *mdev)</div><div class='add'>+{</div><div class='add'>+	void __iomem *mem;</div><div class='add'>+	struct apertures_struct *aper = alloc_apertures(1);</div><div class='add'>+</div><div class='add'>+	/* BAR 0 is VRAM */</div><div class='add'>+	mdev-&gt;mc.vram_base = pci_resource_start(mdev-&gt;dev-&gt;pdev, 0);</div><div class='add'>+	mdev-&gt;mc.vram_window = pci_resource_len(mdev-&gt;dev-&gt;pdev, 0);</div><div class='add'>+</div><div class='add'>+	aper-&gt;ranges[0].base = mdev-&gt;mc.vram_base;</div><div class='add'>+	aper-&gt;ranges[0].size = mdev-&gt;mc.vram_window;</div><div class='add'>+	aper-&gt;count = 1;</div><div class='add'>+</div><div class='add'>+	remove_conflicting_framebuffers(aper, "mgafb", true);</div><div class='add'>+</div><div class='add'>+	if (!request_mem_region(mdev-&gt;mc.vram_base, mdev-&gt;mc.vram_window,</div><div class='add'>+				"mgadrmfb_vram")) {</div><div class='add'>+		DRM_ERROR("can't reserve VRAM\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mem = pci_iomap(mdev-&gt;dev-&gt;pdev, 0, 0);</div><div class='add'>+</div><div class='add'>+	mdev-&gt;mc.vram_size = mga_probe_vram(mdev, mem);</div><div class='add'>+</div><div class='add'>+	pci_iounmap(mdev-&gt;dev-&gt;pdev, mem);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mgag200_device_init(struct drm_device *dev,</div><div class='add'>+			       uint32_t flags)</div><div class='add'>+{</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+	int ret, option;</div><div class='add'>+</div><div class='add'>+	mdev-&gt;type = flags;</div><div class='add'>+</div><div class='add'>+	/* Hardcode the number of CRTCs to 1 */</div><div class='add'>+	mdev-&gt;num_crtc = 1;</div><div class='add'>+</div><div class='add'>+	pci_read_config_dword(dev-&gt;pdev, PCI_MGA_OPTION, &amp;option);</div><div class='add'>+	mdev-&gt;has_sdram = !(option &amp; (1 &lt;&lt; 14));</div><div class='add'>+</div><div class='add'>+	/* BAR 0 is the framebuffer, BAR 1 contains registers */</div><div class='add'>+	mdev-&gt;rmmio_base = pci_resource_start(mdev-&gt;dev-&gt;pdev, 1);</div><div class='add'>+	mdev-&gt;rmmio_size = pci_resource_len(mdev-&gt;dev-&gt;pdev, 1);</div><div class='add'>+</div><div class='add'>+	if (!request_mem_region(mdev-&gt;rmmio_base, mdev-&gt;rmmio_size,</div><div class='add'>+				"mgadrmfb_mmio")) {</div><div class='add'>+		DRM_ERROR("can't reserve mmio registers\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mdev-&gt;rmmio = pci_iomap(dev-&gt;pdev, 1, 0);</div><div class='add'>+	if (mdev-&gt;rmmio == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* stash G200 SE model number for later use */</div><div class='add'>+	if (IS_G200_SE(mdev))</div><div class='add'>+		mdev-&gt;reg_1e24 = RREG32(0x1e24);</div><div class='add'>+</div><div class='add'>+	ret = mga_vram_init(mdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		release_mem_region(mdev-&gt;rmmio_base, mdev-&gt;rmmio_size);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mdev-&gt;bpp_shifts[0] = 0;</div><div class='add'>+	mdev-&gt;bpp_shifts[1] = 1;</div><div class='add'>+	mdev-&gt;bpp_shifts[2] = 0;</div><div class='add'>+	mdev-&gt;bpp_shifts[3] = 2;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mgag200_device_fini(struct mga_device *mdev)</div><div class='add'>+{</div><div class='add'>+	release_mem_region(mdev-&gt;rmmio_base, mdev-&gt;rmmio_size);</div><div class='add'>+	mga_vram_fini(mdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Functions here will be called by the core once it's bound the driver to</div><div class='add'>+ * a PCI device</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+int mgag200_driver_load(struct drm_device *dev, unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	struct mga_device *mdev;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	mdev = kzalloc(sizeof(struct mga_device), GFP_KERNEL);</div><div class='add'>+	if (mdev == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	dev-&gt;dev_private = (void *)mdev;</div><div class='add'>+	mdev-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	r = mgag200_device_init(dev, flags);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(&amp;dev-&gt;pdev-&gt;dev, "Fatal error during GPU init: %d\n", r);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	r = mgag200_mm_init(mdev);</div><div class='add'>+	if (r)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	drm_mode_config_init(dev);</div><div class='add'>+	dev-&gt;mode_config.funcs = (void *)&amp;mga_mode_funcs;</div><div class='add'>+	dev-&gt;mode_config.min_width = 0;</div><div class='add'>+	dev-&gt;mode_config.min_height = 0;</div><div class='add'>+	dev-&gt;mode_config.preferred_depth = 24;</div><div class='add'>+	dev-&gt;mode_config.prefer_shadow = 1;</div><div class='add'>+</div><div class='add'>+	r = mgag200_modeset_init(mdev);</div><div class='add'>+	if (r)</div><div class='add'>+		dev_err(&amp;dev-&gt;pdev-&gt;dev, "Fatal error during modeset init: %d\n", r);</div><div class='add'>+out:</div><div class='add'>+	if (r)</div><div class='add'>+		mgag200_driver_unload(dev);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgag200_driver_unload(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (mdev == NULL)</div><div class='add'>+		return 0;</div><div class='add'>+	mgag200_modeset_fini(mdev);</div><div class='add'>+	mgag200_fbdev_fini(mdev);</div><div class='add'>+	drm_mode_config_cleanup(dev);</div><div class='add'>+	mgag200_mm_fini(mdev);</div><div class='add'>+	mgag200_device_fini(mdev);</div><div class='add'>+	kfree(mdev);</div><div class='add'>+	dev-&gt;dev_private = NULL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgag200_gem_create(struct drm_device *dev,</div><div class='add'>+		   u32 size, bool iskernel,</div><div class='add'>+		   struct drm_gem_object **obj)</div><div class='add'>+{</div><div class='add'>+	struct mgag200_bo *astbo;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*obj = NULL;</div><div class='add'>+</div><div class='add'>+	size = roundup(size, PAGE_SIZE);</div><div class='add'>+	if (size == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = mgag200_bo_create(dev, size, 0, 0, &amp;astbo);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (ret != -ERESTARTSYS)</div><div class='add'>+			DRM_ERROR("failed to allocate GEM object\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	*obj = &amp;astbo-&gt;gem;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgag200_dumb_create(struct drm_file *file,</div><div class='add'>+		    struct drm_device *dev,</div><div class='add'>+		    struct drm_mode_create_dumb *args)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct drm_gem_object *gobj;</div><div class='add'>+	u32 handle;</div><div class='add'>+</div><div class='add'>+	args-&gt;pitch = args-&gt;width * ((args-&gt;bpp + 7) / 8);</div><div class='add'>+	args-&gt;size = args-&gt;pitch * args-&gt;height;</div><div class='add'>+</div><div class='add'>+	ret = mgag200_gem_create(dev, args-&gt;size, false,</div><div class='add'>+			     &amp;gobj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = drm_gem_handle_create(file, gobj, &amp;handle);</div><div class='add'>+	drm_gem_object_unreference_unlocked(gobj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	args-&gt;handle = handle;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgag200_dumb_destroy(struct drm_file *file,</div><div class='add'>+		     struct drm_device *dev,</div><div class='add'>+		     uint32_t handle)</div><div class='add'>+{</div><div class='add'>+	return drm_gem_handle_delete(file, handle);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgag200_gem_init_object(struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	BUG();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mgag200_bo_unref(struct mgag200_bo **bo)</div><div class='add'>+{</div><div class='add'>+	struct ttm_buffer_object *tbo;</div><div class='add'>+</div><div class='add'>+	if ((*bo) == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	tbo = &amp;((*bo)-&gt;bo);</div><div class='add'>+	ttm_bo_unref(&amp;tbo);</div><div class='add'>+	if (tbo == NULL)</div><div class='add'>+		*bo = NULL;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mgag200_gem_free_object(struct drm_gem_object *obj)</div><div class='add'>+{</div><div class='add'>+	struct mgag200_bo *mgag200_bo = gem_to_mga_bo(obj);</div><div class='add'>+</div><div class='add'>+	if (!mgag200_bo)</div><div class='add'>+		return;</div><div class='add'>+	mgag200_bo_unref(&amp;mgag200_bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static inline u64 mgag200_bo_mmap_offset(struct mgag200_bo *bo)</div><div class='add'>+{</div><div class='add'>+	return bo-&gt;bo.addr_space_offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+mgag200_dumb_mmap_offset(struct drm_file *file,</div><div class='add'>+		     struct drm_device *dev,</div><div class='add'>+		     uint32_t handle,</div><div class='add'>+		     uint64_t *offset)</div><div class='add'>+{</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	int ret;</div><div class='add'>+	struct mgag200_bo *bo;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	obj = drm_gem_object_lookup(dev, file, handle);</div><div class='add'>+	if (obj == NULL) {</div><div class='add'>+		ret = -ENOENT;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bo = gem_to_mga_bo(obj);</div><div class='add'>+	*offset = mgag200_bo_mmap_offset(bo);</div><div class='add'>+</div><div class='add'>+	drm_gem_object_unreference(obj);</div><div class='add'>+	ret = 0;</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c<br/>new file mode 100644<br/>index 000000000000..d303061b251e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/mgag200/mgag200_mode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_mode.c</a></div><div class='hunk'>@@ -0,0 +1,1533 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2010 Matt Turner.</div><div class='add'>+ * Copyright 2012 Red Hat</div><div class='add'>+ *</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General</div><div class='add'>+ * Public License version 2. See the file COPYING in the main</div><div class='add'>+ * directory of this archive for more details.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Matthew Garrett</div><div class='add'>+ *	    Matt Turner</div><div class='add'>+ *	    Dave Airlie</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+#include "drm_crtc_helper.h"</div><div class='add'>+</div><div class='add'>+#include "mgag200_drv.h"</div><div class='add'>+</div><div class='add'>+#define MGAG200_LUT_SIZE 256</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This file contains setup code for the CRTC.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void mga_crtc_load_lut(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct mga_crtc *mga_crtc = to_mga_crtc(crtc);</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!crtc-&gt;enabled)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX + MGA1064_INDEX, 0);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MGAG200_LUT_SIZE; i++) {</div><div class='add'>+		/* VGA registers */</div><div class='add'>+		WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc-&gt;lut_r[i]);</div><div class='add'>+		WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc-&gt;lut_g[i]);</div><div class='add'>+		WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc-&gt;lut_b[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mga_wait_vsync(struct mga_device *mdev)</div><div class='add'>+{</div><div class='add'>+	unsigned int count = 0;</div><div class='add'>+	unsigned int status = 0;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		status = RREG32(MGAREG_Status);</div><div class='add'>+		count++;</div><div class='add'>+	} while ((status &amp; 0x08) &amp;&amp; (count &lt; 250000));</div><div class='add'>+	count = 0;</div><div class='add'>+	status = 0;</div><div class='add'>+	do {</div><div class='add'>+		status = RREG32(MGAREG_Status);</div><div class='add'>+		count++;</div><div class='add'>+	} while (!(status &amp; 0x08) &amp;&amp; (count &lt; 250000));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mga_wait_busy(struct mga_device *mdev)</div><div class='add'>+{</div><div class='add'>+	unsigned int count = 0;</div><div class='add'>+	unsigned int status = 0;</div><div class='add'>+	do {</div><div class='add'>+		status = RREG8(MGAREG_Status + 2);</div><div class='add'>+		count++;</div><div class='add'>+	} while ((status &amp; 0x01) &amp;&amp; (count &lt; 500000));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The core passes the desired mode to the CRTC code to see whether any</div><div class='add'>+ * CRTC-specific modifications need to be made to it. We're in a position</div><div class='add'>+ * to just pass that straight through, so this does nothing</div><div class='add'>+ */</div><div class='add'>+static bool mga_crtc_mode_fixup(struct drm_crtc *crtc,</div><div class='add'>+				   struct drm_display_mode *mode,</div><div class='add'>+				   struct drm_display_mode *adjusted_mode)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_g200se_set_plls(struct mga_device *mdev, long clock)</div><div class='add'>+{</div><div class='add'>+	unsigned int vcomax, vcomin, pllreffreq;</div><div class='add'>+	unsigned int delta, tmpdelta, permitteddelta;</div><div class='add'>+	unsigned int testp, testm, testn;</div><div class='add'>+	unsigned int p, m, n;</div><div class='add'>+	unsigned int computed;</div><div class='add'>+</div><div class='add'>+	m = n = p = 0;</div><div class='add'>+	vcomax = 320000;</div><div class='add'>+	vcomin = 160000;</div><div class='add'>+	pllreffreq = 25000;</div><div class='add'>+</div><div class='add'>+	delta = 0xffffffff;</div><div class='add'>+	permitteddelta = clock * 5 / 1000;</div><div class='add'>+</div><div class='add'>+	for (testp = 8; testp &gt; 0; testp /= 2) {</div><div class='add'>+		if (clock * testp &gt; vcomax)</div><div class='add'>+			continue;</div><div class='add'>+		if (clock * testp &lt; vcomin)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (testn = 17; testn &lt; 256; testn++) {</div><div class='add'>+			for (testm = 1; testm &lt; 32; testm++) {</div><div class='add'>+				computed = (pllreffreq * testn) /</div><div class='add'>+					(testm * testp);</div><div class='add'>+				if (computed &gt; clock)</div><div class='add'>+					tmpdelta = computed - clock;</div><div class='add'>+				else</div><div class='add'>+					tmpdelta = clock - computed;</div><div class='add'>+				if (tmpdelta &lt; delta) {</div><div class='add'>+					delta = tmpdelta;</div><div class='add'>+					m = testm - 1;</div><div class='add'>+					n = testn - 1;</div><div class='add'>+					p = testp - 1;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (delta &gt; permitteddelta) {</div><div class='add'>+		printk(KERN_WARNING "PLL delta too large\n");</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WREG_DAC(MGA1064_PIX_PLLC_M, m);</div><div class='add'>+	WREG_DAC(MGA1064_PIX_PLLC_N, n);</div><div class='add'>+	WREG_DAC(MGA1064_PIX_PLLC_P, p);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_g200wb_set_plls(struct mga_device *mdev, long clock)</div><div class='add'>+{</div><div class='add'>+	unsigned int vcomax, vcomin, pllreffreq;</div><div class='add'>+	unsigned int delta, tmpdelta, permitteddelta;</div><div class='add'>+	unsigned int testp, testm, testn;</div><div class='add'>+	unsigned int p, m, n;</div><div class='add'>+	unsigned int computed;</div><div class='add'>+	int i, j, tmpcount, vcount;</div><div class='add'>+	bool pll_locked = false;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	m = n = p = 0;</div><div class='add'>+	vcomax = 550000;</div><div class='add'>+	vcomin = 150000;</div><div class='add'>+	pllreffreq = 48000;</div><div class='add'>+</div><div class='add'>+	delta = 0xffffffff;</div><div class='add'>+	permitteddelta = clock * 5 / 1000;</div><div class='add'>+</div><div class='add'>+	for (testp = 1; testp &lt; 9; testp++) {</div><div class='add'>+		if (clock * testp &gt; vcomax)</div><div class='add'>+			continue;</div><div class='add'>+		if (clock * testp &lt; vcomin)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (testm = 1; testm &lt; 17; testm++) {</div><div class='add'>+			for (testn = 1; testn &lt; 151; testn++) {</div><div class='add'>+				computed = (pllreffreq * testn) /</div><div class='add'>+					(testm * testp);</div><div class='add'>+				if (computed &gt; clock)</div><div class='add'>+					tmpdelta = computed - clock;</div><div class='add'>+				else</div><div class='add'>+					tmpdelta = clock - computed;</div><div class='add'>+				if (tmpdelta &lt; delta) {</div><div class='add'>+					delta = tmpdelta;</div><div class='add'>+					n = testn - 1;</div><div class='add'>+					m = (testm - 1) | ((n &gt;&gt; 1) &amp; 0x80);</div><div class='add'>+					p = testp - 1;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt;= 32 &amp;&amp; pll_locked == false; i++) {</div><div class='add'>+		if (i &gt; 0) {</div><div class='add'>+			WREG8(MGAREG_CRTC_INDEX, 0x1e);</div><div class='add'>+			tmp = RREG8(MGAREG_CRTC_DATA);</div><div class='add'>+			if (tmp &lt; 0xff)</div><div class='add'>+				WREG8(MGAREG_CRTC_DATA, tmp+1);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* set pixclkdis to 1 */</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS;</div><div class='add'>+		WREG_DAC(MGA1064_PIX_CLK_CTL_CLK_DIS, tmp);</div><div class='add'>+</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_REMHEADCTL);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		tmp |= MGA1064_REMHEADCTL_CLKDIS;</div><div class='add'>+		WREG_DAC(MGA1064_REMHEADCTL, tmp);</div><div class='add'>+</div><div class='add'>+		/* select PLL Set C */</div><div class='add'>+		tmp = RREG8(MGAREG_MEM_MISC_READ);</div><div class='add'>+		tmp |= 0x3 &lt;&lt; 2;</div><div class='add'>+		WREG8(MGAREG_MEM_MISC_WRITE, tmp);</div><div class='add'>+</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN | 0x80;</div><div class='add'>+		WREG_DAC(MGA1064_PIX_CLK_CTL, tmp);</div><div class='add'>+</div><div class='add'>+		udelay(500);</div><div class='add'>+</div><div class='add'>+		/* reset the PLL */</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_VREF_CTL);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		tmp &amp;= ~0x04;</div><div class='add'>+		WREG_DAC(MGA1064_VREF_CTL, tmp);</div><div class='add'>+</div><div class='add'>+		udelay(50);</div><div class='add'>+</div><div class='add'>+		/* program pixel pll register */</div><div class='add'>+		WREG_DAC(MGA1064_WB_PIX_PLLC_N, n);</div><div class='add'>+		WREG_DAC(MGA1064_WB_PIX_PLLC_M, m);</div><div class='add'>+		WREG_DAC(MGA1064_WB_PIX_PLLC_P, p);</div><div class='add'>+</div><div class='add'>+		udelay(50);</div><div class='add'>+</div><div class='add'>+		/* turn pll on */</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_VREF_CTL);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		tmp |= 0x04;</div><div class='add'>+		WREG_DAC(MGA1064_VREF_CTL, tmp);</div><div class='add'>+</div><div class='add'>+		udelay(500);</div><div class='add'>+</div><div class='add'>+		/* select the pixel pll */</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		tmp &amp;= ~MGA1064_PIX_CLK_CTL_SEL_MSK;</div><div class='add'>+		tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL;</div><div class='add'>+		WREG_DAC(MGA1064_PIX_CLK_CTL, tmp);</div><div class='add'>+</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_REMHEADCTL);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		tmp &amp;= ~MGA1064_REMHEADCTL_CLKSL_MSK;</div><div class='add'>+		tmp |= MGA1064_REMHEADCTL_CLKSL_PLL;</div><div class='add'>+		WREG_DAC(MGA1064_REMHEADCTL, tmp);</div><div class='add'>+</div><div class='add'>+		/* reset dotclock rate bit */</div><div class='add'>+		WREG8(MGAREG_SEQ_INDEX, 1);</div><div class='add'>+		tmp = RREG8(MGAREG_SEQ_DATA);</div><div class='add'>+		tmp &amp;= ~0x8;</div><div class='add'>+		WREG8(MGAREG_SEQ_DATA, tmp);</div><div class='add'>+</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		tmp &amp;= ~MGA1064_PIX_CLK_CTL_CLK_DIS;</div><div class='add'>+		WREG_DAC(MGA1064_PIX_CLK_CTL, tmp);</div><div class='add'>+</div><div class='add'>+		vcount = RREG8(MGAREG_VCOUNT);</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; 30 &amp;&amp; pll_locked == false; j++) {</div><div class='add'>+			tmpcount = RREG8(MGAREG_VCOUNT);</div><div class='add'>+			if (tmpcount &lt; vcount)</div><div class='add'>+				vcount = 0;</div><div class='add'>+			if ((tmpcount - vcount) &gt; 2)</div><div class='add'>+				pll_locked = true;</div><div class='add'>+			else</div><div class='add'>+				udelay(5);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_REMHEADCTL);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp &amp;= ~MGA1064_REMHEADCTL_CLKDIS;</div><div class='add'>+	WREG_DAC(MGA1064_REMHEADCTL, tmp);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_g200ev_set_plls(struct mga_device *mdev, long clock)</div><div class='add'>+{</div><div class='add'>+	unsigned int vcomax, vcomin, pllreffreq;</div><div class='add'>+	unsigned int delta, tmpdelta, permitteddelta;</div><div class='add'>+	unsigned int testp, testm, testn;</div><div class='add'>+	unsigned int p, m, n;</div><div class='add'>+	unsigned int computed;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	m = n = p = 0;</div><div class='add'>+	vcomax = 550000;</div><div class='add'>+	vcomin = 150000;</div><div class='add'>+	pllreffreq = 50000;</div><div class='add'>+</div><div class='add'>+	delta = 0xffffffff;</div><div class='add'>+	permitteddelta = clock * 5 / 1000;</div><div class='add'>+</div><div class='add'>+	for (testp = 16; testp &gt; 0; testp--) {</div><div class='add'>+		if (clock * testp &gt; vcomax)</div><div class='add'>+			continue;</div><div class='add'>+		if (clock * testp &lt; vcomin)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (testn = 1; testn &lt; 257; testn++) {</div><div class='add'>+			for (testm = 1; testm &lt; 17; testm++) {</div><div class='add'>+				computed = (pllreffreq * testn) /</div><div class='add'>+					(testm * testp);</div><div class='add'>+				if (computed &gt; clock)</div><div class='add'>+					tmpdelta = computed - clock;</div><div class='add'>+				else</div><div class='add'>+					tmpdelta = clock - computed;</div><div class='add'>+				if (tmpdelta &lt; delta) {</div><div class='add'>+					delta = tmpdelta;</div><div class='add'>+					n = testn - 1;</div><div class='add'>+					m = testm - 1;</div><div class='add'>+					p = testp - 1;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS;</div><div class='add'>+	WREG_DAC(MGA1064_PIX_CLK_CTL_CLK_DIS, tmp);</div><div class='add'>+</div><div class='add'>+	tmp = RREG8(MGAREG_MEM_MISC_READ);</div><div class='add'>+	tmp |= 0x3 &lt;&lt; 2;</div><div class='add'>+	WREG8(MGAREG_MEM_MISC_WRITE, tmp);</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_PIX_PLL_STAT);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	WREG_DAC(MGA1064_PIX_PLL_STAT, tmp &amp; ~0x40);</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN;</div><div class='add'>+	WREG_DAC(MGA1064_PIX_CLK_CTL, tmp);</div><div class='add'>+</div><div class='add'>+	WREG_DAC(MGA1064_EV_PIX_PLLC_M, m);</div><div class='add'>+	WREG_DAC(MGA1064_EV_PIX_PLLC_N, n);</div><div class='add'>+	WREG_DAC(MGA1064_EV_PIX_PLLC_P, p);</div><div class='add'>+</div><div class='add'>+	udelay(50);</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp &amp;= ~MGA1064_PIX_CLK_CTL_CLK_POW_DOWN;</div><div class='add'>+	WREG_DAC(MGA1064_PIX_CLK_CTL, tmp);</div><div class='add'>+</div><div class='add'>+	udelay(500);</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp &amp;= ~MGA1064_PIX_CLK_CTL_SEL_MSK;</div><div class='add'>+	tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL;</div><div class='add'>+	WREG_DAC(MGA1064_PIX_CLK_CTL, tmp);</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_PIX_PLL_STAT);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	WREG_DAC(MGA1064_PIX_PLL_STAT, tmp | 0x40);</div><div class='add'>+</div><div class='add'>+	tmp = RREG8(MGAREG_MEM_MISC_READ);</div><div class='add'>+	tmp |= (0x3 &lt;&lt; 2);</div><div class='add'>+	WREG8(MGAREG_MEM_MISC_WRITE, tmp);</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp &amp;= ~MGA1064_PIX_CLK_CTL_CLK_DIS;</div><div class='add'>+	WREG_DAC(MGA1064_PIX_CLK_CTL, tmp);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_g200eh_set_plls(struct mga_device *mdev, long clock)</div><div class='add'>+{</div><div class='add'>+	unsigned int vcomax, vcomin, pllreffreq;</div><div class='add'>+	unsigned int delta, tmpdelta, permitteddelta;</div><div class='add'>+	unsigned int testp, testm, testn;</div><div class='add'>+	unsigned int p, m, n;</div><div class='add'>+	unsigned int computed;</div><div class='add'>+	int i, j, tmpcount, vcount;</div><div class='add'>+	u8 tmp;</div><div class='add'>+	bool pll_locked = false;</div><div class='add'>+</div><div class='add'>+	m = n = p = 0;</div><div class='add'>+	vcomax = 800000;</div><div class='add'>+	vcomin = 400000;</div><div class='add'>+	pllreffreq = 3333;</div><div class='add'>+</div><div class='add'>+	delta = 0xffffffff;</div><div class='add'>+	permitteddelta = clock * 5 / 1000;</div><div class='add'>+</div><div class='add'>+	for (testp = 16; testp &gt; 0; testp--) {</div><div class='add'>+		if (clock * testp &gt; vcomax)</div><div class='add'>+			continue;</div><div class='add'>+		if (clock * testp &lt; vcomin)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (testm = 1; testm &lt; 33; testm++) {</div><div class='add'>+			for (testn = 1; testn &lt; 257; testn++) {</div><div class='add'>+				computed = (pllreffreq * testn) /</div><div class='add'>+					(testm * testp);</div><div class='add'>+				if (computed &gt; clock)</div><div class='add'>+					tmpdelta = computed - clock;</div><div class='add'>+				else</div><div class='add'>+					tmpdelta = clock - computed;</div><div class='add'>+				if (tmpdelta &lt; delta) {</div><div class='add'>+					delta = tmpdelta;</div><div class='add'>+					n = testn - 1;</div><div class='add'>+					m = (testm - 1) | ((n &gt;&gt; 1) &amp; 0x80);</div><div class='add'>+					p = testp - 1;</div><div class='add'>+				}</div><div class='add'>+				if ((clock * testp) &gt;= 600000)</div><div class='add'>+					p |= 80;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt;= 32 &amp;&amp; pll_locked == false; i++) {</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS;</div><div class='add'>+		WREG_DAC(MGA1064_PIX_CLK_CTL_CLK_DIS, tmp);</div><div class='add'>+</div><div class='add'>+		tmp = RREG8(MGAREG_MEM_MISC_READ);</div><div class='add'>+		tmp |= 0x3 &lt;&lt; 2;</div><div class='add'>+		WREG8(MGAREG_MEM_MISC_WRITE, tmp);</div><div class='add'>+</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN;</div><div class='add'>+		WREG_DAC(MGA1064_PIX_CLK_CTL, tmp);</div><div class='add'>+</div><div class='add'>+		udelay(500);</div><div class='add'>+</div><div class='add'>+		WREG_DAC(MGA1064_EH_PIX_PLLC_M, m);</div><div class='add'>+		WREG_DAC(MGA1064_EH_PIX_PLLC_N, n);</div><div class='add'>+		WREG_DAC(MGA1064_EH_PIX_PLLC_P, p);</div><div class='add'>+</div><div class='add'>+		udelay(500);</div><div class='add'>+</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		tmp &amp;= ~MGA1064_PIX_CLK_CTL_SEL_MSK;</div><div class='add'>+		tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL;</div><div class='add'>+		WREG_DAC(MGA1064_PIX_CLK_CTL, tmp);</div><div class='add'>+</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		tmp &amp;= ~MGA1064_PIX_CLK_CTL_CLK_DIS;</div><div class='add'>+		tmp &amp;= ~MGA1064_PIX_CLK_CTL_CLK_POW_DOWN;</div><div class='add'>+		WREG_DAC(MGA1064_PIX_CLK_CTL, tmp);</div><div class='add'>+</div><div class='add'>+		vcount = RREG8(MGAREG_VCOUNT);</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; 30 &amp;&amp; pll_locked == false; j++) {</div><div class='add'>+			tmpcount = RREG8(MGAREG_VCOUNT);</div><div class='add'>+			if (tmpcount &lt; vcount)</div><div class='add'>+				vcount = 0;</div><div class='add'>+			if ((tmpcount - vcount) &gt; 2)</div><div class='add'>+				pll_locked = true;</div><div class='add'>+			else</div><div class='add'>+				udelay(5);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_g200er_set_plls(struct mga_device *mdev, long clock)</div><div class='add'>+{</div><div class='add'>+	unsigned int vcomax, vcomin, pllreffreq;</div><div class='add'>+	unsigned int delta, tmpdelta;</div><div class='add'>+	unsigned int testr, testn, testm, testo;</div><div class='add'>+	unsigned int p, m, n;</div><div class='add'>+	unsigned int computed;</div><div class='add'>+	int tmp;</div><div class='add'>+</div><div class='add'>+	m = n = p = 0;</div><div class='add'>+	vcomax = 1488000;</div><div class='add'>+	vcomin = 1056000;</div><div class='add'>+	pllreffreq = 48000;</div><div class='add'>+</div><div class='add'>+	delta = 0xffffffff;</div><div class='add'>+</div><div class='add'>+	for (testr = 0; testr &lt; 4; testr++) {</div><div class='add'>+		if (delta == 0)</div><div class='add'>+			break;</div><div class='add'>+		for (testn = 5; testn &lt; 129; testn++) {</div><div class='add'>+			if (delta == 0)</div><div class='add'>+				break;</div><div class='add'>+			for (testm = 3; testm &gt;= 0; testm--) {</div><div class='add'>+				if (delta == 0)</div><div class='add'>+					break;</div><div class='add'>+				for (testo = 5; testo &lt; 33; testo++) {</div><div class='add'>+					computed = pllreffreq * (testn + 1) /</div><div class='add'>+						(testr + 1);</div><div class='add'>+					if (computed &lt; vcomin)</div><div class='add'>+						continue;</div><div class='add'>+					if (computed &gt; vcomax)</div><div class='add'>+						continue;</div><div class='add'>+					if (computed &gt; clock)</div><div class='add'>+						tmpdelta = computed - clock;</div><div class='add'>+					else</div><div class='add'>+						tmpdelta = clock - computed;</div><div class='add'>+					if (tmpdelta &lt; delta) {</div><div class='add'>+						delta = tmpdelta;</div><div class='add'>+						m = testm | (testo &lt;&lt; 3);</div><div class='add'>+						n = testn;</div><div class='add'>+						p = testr | (testr &lt;&lt; 3);</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS;</div><div class='add'>+	WREG_DAC(MGA1064_PIX_CLK_CTL_CLK_DIS, tmp);</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_REMHEADCTL);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp |= MGA1064_REMHEADCTL_CLKDIS;</div><div class='add'>+	WREG_DAC(MGA1064_REMHEADCTL, tmp);</div><div class='add'>+</div><div class='add'>+	tmp = RREG8(MGAREG_MEM_MISC_READ);</div><div class='add'>+	tmp |= (0x3&lt;&lt;2) | 0xc0;</div><div class='add'>+	WREG8(MGAREG_MEM_MISC_WRITE, tmp);</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp &amp;= ~MGA1064_PIX_CLK_CTL_CLK_DIS;</div><div class='add'>+	tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN;</div><div class='add'>+	WREG_DAC(MGA1064_PIX_CLK_CTL, tmp);</div><div class='add'>+</div><div class='add'>+	udelay(500);</div><div class='add'>+</div><div class='add'>+	WREG_DAC(MGA1064_ER_PIX_PLLC_N, n);</div><div class='add'>+	WREG_DAC(MGA1064_ER_PIX_PLLC_M, m);</div><div class='add'>+	WREG_DAC(MGA1064_ER_PIX_PLLC_P, p);</div><div class='add'>+</div><div class='add'>+	udelay(50);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_crtc_set_plls(struct mga_device *mdev, long clock)</div><div class='add'>+{</div><div class='add'>+	switch(mdev-&gt;type) {</div><div class='add'>+	case G200_SE_A:</div><div class='add'>+	case G200_SE_B:</div><div class='add'>+		return mga_g200se_set_plls(mdev, clock);</div><div class='add'>+		break;</div><div class='add'>+	case G200_WB:</div><div class='add'>+		return mga_g200wb_set_plls(mdev, clock);</div><div class='add'>+		break;</div><div class='add'>+	case G200_EV:</div><div class='add'>+		return mga_g200ev_set_plls(mdev, clock);</div><div class='add'>+		break;</div><div class='add'>+	case G200_EH:</div><div class='add'>+		return mga_g200eh_set_plls(mdev, clock);</div><div class='add'>+		break;</div><div class='add'>+	case G200_ER:</div><div class='add'>+		return mga_g200er_set_plls(mdev, clock);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_g200wb_prepare(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct mga_device *mdev = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	u8 tmp;</div><div class='add'>+	int iter_max;</div><div class='add'>+</div><div class='add'>+	/* 1- The first step is to warn the BMC of an upcoming mode change.</div><div class='add'>+	 * We are putting the misc&lt;0&gt; to output.*/</div><div class='add'>+</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_GEN_IO_CTL);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp |= 0x10;</div><div class='add'>+	WREG_DAC(MGA1064_GEN_IO_CTL, tmp);</div><div class='add'>+</div><div class='add'>+	/* we are putting a 1 on the misc&lt;0&gt; line */</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_GEN_IO_DATA);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp |= 0x10;</div><div class='add'>+	WREG_DAC(MGA1064_GEN_IO_DATA, tmp);</div><div class='add'>+</div><div class='add'>+	/* 2- Second step to mask and further scan request</div><div class='add'>+	 * This will be done by asserting the remfreqmsk bit (XSPAREREG&lt;7&gt;)</div><div class='add'>+	 */</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_SPAREREG);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp |= 0x80;</div><div class='add'>+	WREG_DAC(MGA1064_SPAREREG, tmp);</div><div class='add'>+</div><div class='add'>+	/* 3a- the third step is to verifu if there is an active scan</div><div class='add'>+	 * We are searching for a 0 on remhsyncsts &lt;XSPAREREG&lt;0&gt;)</div><div class='add'>+	 */</div><div class='add'>+	iter_max = 300;</div><div class='add'>+	while (!(tmp &amp; 0x1) &amp;&amp; iter_max) {</div><div class='add'>+		WREG8(DAC_INDEX, MGA1064_SPAREREG);</div><div class='add'>+		tmp = RREG8(DAC_DATA);</div><div class='add'>+		udelay(1000);</div><div class='add'>+		iter_max--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 3b- this step occurs only if the remove is actually scanning</div><div class='add'>+	 * we are waiting for the end of the frame which is a 1 on</div><div class='add'>+	 * remvsyncsts (XSPAREREG&lt;1&gt;)</div><div class='add'>+	 */</div><div class='add'>+	if (iter_max) {</div><div class='add'>+		iter_max = 300;</div><div class='add'>+		while ((tmp &amp; 0x2) &amp;&amp; iter_max) {</div><div class='add'>+			WREG8(DAC_INDEX, MGA1064_SPAREREG);</div><div class='add'>+			tmp = RREG8(DAC_DATA);</div><div class='add'>+			udelay(1000);</div><div class='add'>+			iter_max--;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_g200wb_commit(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	u8 tmp;</div><div class='add'>+	struct mga_device *mdev = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	/* 1- The first step is to ensure that the vrsten and hrsten are set */</div><div class='add'>+	WREG8(MGAREG_CRTCEXT_INDEX, 1);</div><div class='add'>+	tmp = RREG8(MGAREG_CRTCEXT_DATA);</div><div class='add'>+	WREG8(MGAREG_CRTCEXT_DATA, tmp | 0x88);</div><div class='add'>+</div><div class='add'>+	/* 2- second step is to assert the rstlvl2 */</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_REMHEADCTL2);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp |= 0x8;</div><div class='add'>+	WREG8(DAC_DATA, tmp);</div><div class='add'>+</div><div class='add'>+	/* wait 10 us */</div><div class='add'>+	udelay(10);</div><div class='add'>+</div><div class='add'>+	/* 3- deassert rstlvl2 */</div><div class='add'>+	tmp &amp;= ~0x08;</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_REMHEADCTL2);</div><div class='add'>+	WREG8(DAC_DATA, tmp);</div><div class='add'>+</div><div class='add'>+	/* 4- remove mask of scan request */</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_SPAREREG);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp &amp;= ~0x80;</div><div class='add'>+	WREG8(DAC_DATA, tmp);</div><div class='add'>+</div><div class='add'>+	/* 5- put back a 0 on the misc&lt;0&gt; line */</div><div class='add'>+	WREG8(DAC_INDEX, MGA1064_GEN_IO_DATA);</div><div class='add'>+	tmp = RREG8(DAC_DATA);</div><div class='add'>+	tmp &amp;= ~0x10;</div><div class='add'>+	WREG_DAC(MGA1064_GEN_IO_DATA, tmp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+void mga_set_start_address(struct drm_crtc *crtc, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	struct mga_device *mdev = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	u32 addr;</div><div class='add'>+	int count;</div><div class='add'>+</div><div class='add'>+	while (RREG8(0x1fda) &amp; 0x08);</div><div class='add'>+	while (!(RREG8(0x1fda) &amp; 0x08));</div><div class='add'>+</div><div class='add'>+	count = RREG8(MGAREG_VCOUNT) + 2;</div><div class='add'>+	while (RREG8(MGAREG_VCOUNT) &lt; count);</div><div class='add'>+</div><div class='add'>+	addr = offset &gt;&gt; 2;</div><div class='add'>+	WREG_CRT(0x0d, (u8)(addr &amp; 0xff));</div><div class='add'>+	WREG_CRT(0x0c, (u8)(addr &gt;&gt; 8) &amp; 0xff);</div><div class='add'>+	WREG_CRT(0xaf, (u8)(addr &gt;&gt; 16) &amp; 0xf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* ast is different - we will force move buffers out of VRAM */</div><div class='add'>+static int mga_crtc_do_set_base(struct drm_crtc *crtc,</div><div class='add'>+				struct drm_framebuffer *fb,</div><div class='add'>+				int x, int y, int atomic)</div><div class='add'>+{</div><div class='add'>+	struct mga_device *mdev = crtc-&gt;dev-&gt;dev_private;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	struct mga_framebuffer *mga_fb;</div><div class='add'>+	struct mgag200_bo *bo;</div><div class='add'>+	int ret;</div><div class='add'>+	u64 gpu_addr;</div><div class='add'>+</div><div class='add'>+	/* push the previous fb to system ram */</div><div class='add'>+	if (!atomic &amp;&amp; fb) {</div><div class='add'>+		mga_fb = to_mga_framebuffer(fb);</div><div class='add'>+		obj = mga_fb-&gt;obj;</div><div class='add'>+		bo = gem_to_mga_bo(obj);</div><div class='add'>+		ret = mgag200_bo_reserve(bo, false);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		mgag200_bo_push_sysram(bo);</div><div class='add'>+		mgag200_bo_unreserve(bo);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mga_fb = to_mga_framebuffer(crtc-&gt;fb);</div><div class='add'>+	obj = mga_fb-&gt;obj;</div><div class='add'>+	bo = gem_to_mga_bo(obj);</div><div class='add'>+</div><div class='add'>+	ret = mgag200_bo_reserve(bo, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = mgag200_bo_pin(bo, TTM_PL_FLAG_VRAM, &amp;gpu_addr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mgag200_bo_unreserve(bo);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (&amp;mdev-&gt;mfbdev-&gt;mfb == mga_fb) {</div><div class='add'>+		/* if pushing console in kmap it */</div><div class='add'>+		ret = ttm_bo_kmap(&amp;bo-&gt;bo, 0, bo-&gt;bo.num_pages, &amp;bo-&gt;kmap);</div><div class='add'>+		if (ret)</div><div class='add'>+			DRM_ERROR("failed to kmap fbcon\n");</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+	mgag200_bo_unreserve(bo);</div><div class='add'>+</div><div class='add'>+	DRM_INFO("mga base %llx\n", gpu_addr);</div><div class='add'>+</div><div class='add'>+	mga_set_start_address(crtc, (u32)gpu_addr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,</div><div class='add'>+				  struct drm_framebuffer *old_fb)</div><div class='add'>+{</div><div class='add'>+	return mga_crtc_do_set_base(crtc, old_fb, x, y, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_crtc_mode_set(struct drm_crtc *crtc,</div><div class='add'>+				struct drm_display_mode *mode,</div><div class='add'>+				struct drm_display_mode *adjusted_mode,</div><div class='add'>+				int x, int y, struct drm_framebuffer *old_fb)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+	int hdisplay, hsyncstart, hsyncend, htotal;</div><div class='add'>+	int vdisplay, vsyncstart, vsyncend, vtotal;</div><div class='add'>+	int pitch;</div><div class='add'>+	int option = 0, option2 = 0;</div><div class='add'>+	int i;</div><div class='add'>+	unsigned char misc = 0;</div><div class='add'>+	unsigned char ext_vga[6];</div><div class='add'>+	unsigned char ext_vga_index24;</div><div class='add'>+	unsigned char dac_index90 = 0;</div><div class='add'>+	u8 bppshift;</div><div class='add'>+</div><div class='add'>+	static unsigned char dacvalue[] = {</div><div class='add'>+		/* 0x00: */        0,    0,    0,    0,    0,    0, 0x00,    0,</div><div class='add'>+		/* 0x08: */        0,    0,    0,    0,    0,    0,    0,    0,</div><div class='add'>+		/* 0x10: */        0,    0,    0,    0,    0,    0,    0,    0,</div><div class='add'>+		/* 0x18: */     0x00,    0, 0xC9, 0xFF, 0xBF, 0x20, 0x1F, 0x20,</div><div class='add'>+		/* 0x20: */     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='add'>+		/* 0x28: */     0x00, 0x00, 0x00, 0x00,    0,    0,    0, 0x40,</div><div class='add'>+		/* 0x30: */     0x00, 0xB0, 0x00, 0xC2, 0x34, 0x14, 0x02, 0x83,</div><div class='add'>+		/* 0x38: */     0x00, 0x93, 0x00, 0x77, 0x00, 0x00, 0x00, 0x3A,</div><div class='add'>+		/* 0x40: */        0,    0,    0,    0,    0,    0,    0,    0,</div><div class='add'>+		/* 0x48: */        0,    0,    0,    0,    0,    0,    0,    0</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	bppshift = mdev-&gt;bpp_shifts[(crtc-&gt;fb-&gt;bits_per_pixel &gt;&gt; 3) - 1];</div><div class='add'>+</div><div class='add'>+	switch (mdev-&gt;type) {</div><div class='add'>+	case G200_SE_A:</div><div class='add'>+	case G200_SE_B:</div><div class='add'>+		dacvalue[MGA1064_VREF_CTL] = 0x03;</div><div class='add'>+		dacvalue[MGA1064_PIX_CLK_CTL] = MGA1064_PIX_CLK_CTL_SEL_PLL;</div><div class='add'>+		dacvalue[MGA1064_MISC_CTL] = MGA1064_MISC_CTL_DAC_EN |</div><div class='add'>+					     MGA1064_MISC_CTL_VGA8 |</div><div class='add'>+					     MGA1064_MISC_CTL_DAC_RAM_CS;</div><div class='add'>+		if (mdev-&gt;has_sdram)</div><div class='add'>+			option = 0x40049120;</div><div class='add'>+		else</div><div class='add'>+			option = 0x4004d120;</div><div class='add'>+		option2 = 0x00008000;</div><div class='add'>+		break;</div><div class='add'>+	case G200_WB:</div><div class='add'>+		dacvalue[MGA1064_VREF_CTL] = 0x07;</div><div class='add'>+		option = 0x41049120;</div><div class='add'>+		option2 = 0x0000b000;</div><div class='add'>+		break;</div><div class='add'>+	case G200_EV:</div><div class='add'>+		dacvalue[MGA1064_PIX_CLK_CTL] = MGA1064_PIX_CLK_CTL_SEL_PLL;</div><div class='add'>+		dacvalue[MGA1064_MISC_CTL] = MGA1064_MISC_CTL_VGA8 |</div><div class='add'>+					     MGA1064_MISC_CTL_DAC_RAM_CS;</div><div class='add'>+		option = 0x00000120;</div><div class='add'>+		option2 = 0x0000b000;</div><div class='add'>+		break;</div><div class='add'>+	case G200_EH:</div><div class='add'>+		dacvalue[MGA1064_MISC_CTL] = MGA1064_MISC_CTL_VGA8 |</div><div class='add'>+					     MGA1064_MISC_CTL_DAC_RAM_CS;</div><div class='add'>+		option = 0x00000120;</div><div class='add'>+		option2 = 0x0000b000;</div><div class='add'>+		break;</div><div class='add'>+	case G200_ER:</div><div class='add'>+		dac_index90 = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (crtc-&gt;fb-&gt;bits_per_pixel) {</div><div class='add'>+	case 8:</div><div class='add'>+		dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_8bits;</div><div class='add'>+		break;</div><div class='add'>+	case 16:</div><div class='add'>+		if (crtc-&gt;fb-&gt;depth == 15)</div><div class='add'>+			dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_15bits;</div><div class='add'>+		else</div><div class='add'>+			dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_16bits;</div><div class='add'>+		break;</div><div class='add'>+	case 24:</div><div class='add'>+		dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_24bits;</div><div class='add'>+		break;</div><div class='add'>+	case 32:</div><div class='add'>+		dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_32_24bits;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mode-&gt;flags &amp; DRM_MODE_FLAG_NHSYNC)</div><div class='add'>+		misc |= 0x40;</div><div class='add'>+	if (mode-&gt;flags &amp; DRM_MODE_FLAG_NVSYNC)</div><div class='add'>+		misc |= 0x80;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sizeof(dacvalue); i++) {</div><div class='add'>+		if ((i &lt;= 0x03) ||</div><div class='add'>+		    (i == 0x07) ||</div><div class='add'>+		    (i == 0x0b) ||</div><div class='add'>+		    (i == 0x0f) ||</div><div class='add'>+		    ((i &gt;= 0x13) &amp;&amp; (i &lt;= 0x17)) ||</div><div class='add'>+		    (i == 0x1b) ||</div><div class='add'>+		    (i == 0x1c) ||</div><div class='add'>+		    ((i &gt;= 0x1f) &amp;&amp; (i &lt;= 0x29)) ||</div><div class='add'>+		    ((i &gt;= 0x30) &amp;&amp; (i &lt;= 0x37)))</div><div class='add'>+			continue;</div><div class='add'>+		if (IS_G200_SE(mdev) &amp;&amp;</div><div class='add'>+		    ((i == 0x2c) || (i == 0x2d) || (i == 0x2e)))</div><div class='add'>+			continue;</div><div class='add'>+		if ((mdev-&gt;type == G200_EV || mdev-&gt;type == G200_WB || mdev-&gt;type == G200_EH) &amp;&amp;</div><div class='add'>+		    (i &gt;= 0x44) &amp;&amp; (i &lt;= 0x4e))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		WREG_DAC(i, dacvalue[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;type == G200_ER) {</div><div class='add'>+		WREG_DAC(0x90, dac_index90);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	if (option)</div><div class='add'>+		pci_write_config_dword(dev-&gt;pdev, PCI_MGA_OPTION, option);</div><div class='add'>+	if (option2)</div><div class='add'>+		pci_write_config_dword(dev-&gt;pdev, PCI_MGA_OPTION2, option2);</div><div class='add'>+</div><div class='add'>+	WREG_SEQ(2, 0xf);</div><div class='add'>+	WREG_SEQ(3, 0);</div><div class='add'>+	WREG_SEQ(4, 0xe);</div><div class='add'>+</div><div class='add'>+	pitch = crtc-&gt;fb-&gt;pitches[0] / (crtc-&gt;fb-&gt;bits_per_pixel / 8);</div><div class='add'>+	if (crtc-&gt;fb-&gt;bits_per_pixel == 24)</div><div class='add'>+		pitch = pitch &gt;&gt; (4 - bppshift);</div><div class='add'>+	else</div><div class='add'>+		pitch = pitch &gt;&gt; (4 - bppshift);</div><div class='add'>+</div><div class='add'>+	hdisplay = mode-&gt;hdisplay / 8 - 1;</div><div class='add'>+	hsyncstart = mode-&gt;hsync_start / 8 - 1;</div><div class='add'>+	hsyncend = mode-&gt;hsync_end / 8 - 1;</div><div class='add'>+	htotal = mode-&gt;htotal / 8 - 1;</div><div class='add'>+</div><div class='add'>+	/* Work around hardware quirk */</div><div class='add'>+	if ((htotal &amp; 0x07) == 0x06 || (htotal &amp; 0x07) == 0x04)</div><div class='add'>+		htotal++;</div><div class='add'>+</div><div class='add'>+	vdisplay = mode-&gt;vdisplay - 1;</div><div class='add'>+	vsyncstart = mode-&gt;vsync_start - 1;</div><div class='add'>+	vsyncend = mode-&gt;vsync_end - 1;</div><div class='add'>+	vtotal = mode-&gt;vtotal - 2;</div><div class='add'>+</div><div class='add'>+	WREG_GFX(0, 0);</div><div class='add'>+	WREG_GFX(1, 0);</div><div class='add'>+	WREG_GFX(2, 0);</div><div class='add'>+	WREG_GFX(3, 0);</div><div class='add'>+	WREG_GFX(4, 0);</div><div class='add'>+	WREG_GFX(5, 0x40);</div><div class='add'>+	WREG_GFX(6, 0x5);</div><div class='add'>+	WREG_GFX(7, 0xf);</div><div class='add'>+	WREG_GFX(8, 0xf);</div><div class='add'>+</div><div class='add'>+	WREG_CRT(0, htotal - 4);</div><div class='add'>+	WREG_CRT(1, hdisplay);</div><div class='add'>+	WREG_CRT(2, hdisplay);</div><div class='add'>+	WREG_CRT(3, (htotal &amp; 0x1F) | 0x80);</div><div class='add'>+	WREG_CRT(4, hsyncstart);</div><div class='add'>+	WREG_CRT(5, ((htotal &amp; 0x20) &lt;&lt; 2) | (hsyncend &amp; 0x1F));</div><div class='add'>+	WREG_CRT(6, vtotal &amp; 0xFF);</div><div class='add'>+	WREG_CRT(7, ((vtotal &amp; 0x100) &gt;&gt; 8) |</div><div class='add'>+		 ((vdisplay &amp; 0x100) &gt;&gt; 7) |</div><div class='add'>+		 ((vsyncstart &amp; 0x100) &gt;&gt; 6) |</div><div class='add'>+		 ((vdisplay &amp; 0x100) &gt;&gt; 5) |</div><div class='add'>+		 ((vdisplay &amp; 0x100) &gt;&gt; 4) | /* linecomp */</div><div class='add'>+		 ((vtotal &amp; 0x200) &gt;&gt; 4)|</div><div class='add'>+		 ((vdisplay &amp; 0x200) &gt;&gt; 3) |</div><div class='add'>+		 ((vsyncstart &amp; 0x200) &gt;&gt; 2));</div><div class='add'>+	WREG_CRT(9, ((vdisplay &amp; 0x200) &gt;&gt; 4) |</div><div class='add'>+		 ((vdisplay &amp; 0x200) &gt;&gt; 3));</div><div class='add'>+	WREG_CRT(10, 0);</div><div class='add'>+	WREG_CRT(11, 0);</div><div class='add'>+	WREG_CRT(12, 0);</div><div class='add'>+	WREG_CRT(13, 0);</div><div class='add'>+	WREG_CRT(14, 0);</div><div class='add'>+	WREG_CRT(15, 0);</div><div class='add'>+	WREG_CRT(16, vsyncstart &amp; 0xFF);</div><div class='add'>+	WREG_CRT(17, (vsyncend &amp; 0x0F) | 0x20);</div><div class='add'>+	WREG_CRT(18, vdisplay &amp; 0xFF);</div><div class='add'>+	WREG_CRT(19, pitch &amp; 0xFF);</div><div class='add'>+	WREG_CRT(20, 0);</div><div class='add'>+	WREG_CRT(21, vdisplay &amp; 0xFF);</div><div class='add'>+	WREG_CRT(22, (vtotal + 1) &amp; 0xFF);</div><div class='add'>+	WREG_CRT(23, 0xc3);</div><div class='add'>+	WREG_CRT(24, vdisplay &amp; 0xFF);</div><div class='add'>+</div><div class='add'>+	ext_vga[0] = 0;</div><div class='add'>+	ext_vga[5] = 0;</div><div class='add'>+</div><div class='add'>+	/* TODO interlace */</div><div class='add'>+</div><div class='add'>+	ext_vga[0] |= (pitch &amp; 0x300) &gt;&gt; 4;</div><div class='add'>+	ext_vga[1] = (((htotal - 4) &amp; 0x100) &gt;&gt; 8) |</div><div class='add'>+		((hdisplay &amp; 0x100) &gt;&gt; 7) |</div><div class='add'>+		((hsyncstart &amp; 0x100) &gt;&gt; 6) |</div><div class='add'>+		(htotal &amp; 0x40);</div><div class='add'>+	ext_vga[2] = ((vtotal &amp; 0xc00) &gt;&gt; 10) |</div><div class='add'>+		((vdisplay &amp; 0x400) &gt;&gt; 8) |</div><div class='add'>+		((vdisplay &amp; 0xc00) &gt;&gt; 7) |</div><div class='add'>+		((vsyncstart &amp; 0xc00) &gt;&gt; 5) |</div><div class='add'>+		((vdisplay &amp; 0x400) &gt;&gt; 3);</div><div class='add'>+	if (crtc-&gt;fb-&gt;bits_per_pixel == 24)</div><div class='add'>+		ext_vga[3] = (((1 &lt;&lt; bppshift) * 3) - 1) | 0x80;</div><div class='add'>+	else</div><div class='add'>+		ext_vga[3] = ((1 &lt;&lt; bppshift) - 1) | 0x80;</div><div class='add'>+	ext_vga[4] = 0;</div><div class='add'>+	if (mdev-&gt;type == G200_WB)</div><div class='add'>+		ext_vga[1] |= 0x88;</div><div class='add'>+</div><div class='add'>+	ext_vga_index24 = 0x05;</div><div class='add'>+</div><div class='add'>+	/* Set pixel clocks */</div><div class='add'>+	misc = 0x2d;</div><div class='add'>+	WREG8(MGA_MISC_OUT, misc);</div><div class='add'>+</div><div class='add'>+	mga_crtc_set_plls(mdev, mode-&gt;clock);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 6; i++) {</div><div class='add'>+		WREG_ECRT(i, ext_vga[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;type == G200_ER)</div><div class='add'>+		WREG_ECRT(24, ext_vga_index24);</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;type == G200_EV) {</div><div class='add'>+		WREG_ECRT(6, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WREG_ECRT(0, ext_vga[0]);</div><div class='add'>+	/* Enable mga pixel clock */</div><div class='add'>+	misc = 0x2d;</div><div class='add'>+</div><div class='add'>+	WREG8(MGA_MISC_OUT, misc);</div><div class='add'>+</div><div class='add'>+	if (adjusted_mode)</div><div class='add'>+		memcpy(&amp;mdev-&gt;mode, mode, sizeof(struct drm_display_mode));</div><div class='add'>+</div><div class='add'>+	mga_crtc_do_set_base(crtc, old_fb, x, y, 0);</div><div class='add'>+</div><div class='add'>+	/* reset tagfifo */</div><div class='add'>+	if (mdev-&gt;type == G200_ER) {</div><div class='add'>+		u32 mem_ctl = RREG32(MGAREG_MEMCTL);</div><div class='add'>+		u8 seq1;</div><div class='add'>+</div><div class='add'>+		/* screen off */</div><div class='add'>+		WREG8(MGAREG_SEQ_INDEX, 0x01);</div><div class='add'>+		seq1 = RREG8(MGAREG_SEQ_DATA) | 0x20;</div><div class='add'>+		WREG8(MGAREG_SEQ_DATA, seq1);</div><div class='add'>+</div><div class='add'>+		WREG32(MGAREG_MEMCTL, mem_ctl | 0x00200000);</div><div class='add'>+		udelay(1000);</div><div class='add'>+		WREG32(MGAREG_MEMCTL, mem_ctl &amp; ~0x00200000);</div><div class='add'>+</div><div class='add'>+		WREG8(MGAREG_SEQ_DATA, seq1 &amp; ~0x20);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	if (IS_G200_SE(mdev)) {</div><div class='add'>+		if (mdev-&gt;reg_1e24 &gt;= 0x02) {</div><div class='add'>+			u8 hi_pri_lvl;</div><div class='add'>+			u32 bpp;</div><div class='add'>+			u32 mb;</div><div class='add'>+</div><div class='add'>+			if (crtc-&gt;fb-&gt;bits_per_pixel &gt; 16)</div><div class='add'>+				bpp = 32;</div><div class='add'>+			else if (crtc-&gt;fb-&gt;bits_per_pixel &gt; 8)</div><div class='add'>+				bpp = 16;</div><div class='add'>+			else</div><div class='add'>+				bpp = 8;</div><div class='add'>+</div><div class='add'>+			mb = (mode-&gt;clock * bpp) / 1000;</div><div class='add'>+			if (mb &gt; 3100)</div><div class='add'>+				hi_pri_lvl = 0;</div><div class='add'>+			else if (mb &gt; 2600)</div><div class='add'>+				hi_pri_lvl = 1;</div><div class='add'>+			else if (mb &gt; 1900)</div><div class='add'>+				hi_pri_lvl = 2;</div><div class='add'>+			else if (mb &gt; 1160)</div><div class='add'>+				hi_pri_lvl = 3;</div><div class='add'>+			else if (mb &gt; 440)</div><div class='add'>+				hi_pri_lvl = 4;</div><div class='add'>+			else</div><div class='add'>+				hi_pri_lvl = 5;</div><div class='add'>+</div><div class='add'>+			WREG8(0x1fde, 0x06);</div><div class='add'>+			WREG8(0x1fdf, hi_pri_lvl);</div><div class='add'>+		} else {</div><div class='add'>+			if (mdev-&gt;reg_1e24 &gt;= 0x01)</div><div class='add'>+				WREG8(0x1fdf, 0x03);</div><div class='add'>+			else</div><div class='add'>+				WREG8(0x1fdf, 0x04);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if 0 /* code from mjg to attempt D3 on crtc dpms off - revisit later */</div><div class='add'>+static int mga_suspend(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct mga_crtc *mga_crtc = to_mga_crtc(crtc);</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;pdev;</div><div class='add'>+	int option;</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;suspended)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	WREG_SEQ(1, 0x20);</div><div class='add'>+	WREG_ECRT(1, 0x30);</div><div class='add'>+	/* Disable the pixel clock */</div><div class='add'>+	WREG_DAC(0x1a, 0x05);</div><div class='add'>+	/* Power down the DAC */</div><div class='add'>+	WREG_DAC(0x1e, 0x18);</div><div class='add'>+	/* Power down the pixel PLL */</div><div class='add'>+	WREG_DAC(0x1a, 0x0d);</div><div class='add'>+</div><div class='add'>+	/* Disable PLLs and clocks */</div><div class='add'>+	pci_read_config_dword(pdev, PCI_MGA_OPTION, &amp;option);</div><div class='add'>+	option &amp;= ~(0x1F8024);</div><div class='add'>+	pci_write_config_dword(pdev, PCI_MGA_OPTION, option);</div><div class='add'>+	pci_set_power_state(pdev, PCI_D3hot);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	mdev-&gt;suspended = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_resume(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct mga_crtc *mga_crtc = to_mga_crtc(crtc);</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;pdev;</div><div class='add'>+	int option;</div><div class='add'>+</div><div class='add'>+	if (!mdev-&gt;suspended)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	pci_set_power_state(pdev, PCI_D0);</div><div class='add'>+	pci_enable_device(pdev);</div><div class='add'>+</div><div class='add'>+	/* Disable sysclk */</div><div class='add'>+	pci_read_config_dword(pdev, PCI_MGA_OPTION, &amp;option);</div><div class='add'>+	option &amp;= ~(0x4);</div><div class='add'>+	pci_write_config_dword(pdev, PCI_MGA_OPTION, option);</div><div class='add'>+</div><div class='add'>+	mdev-&gt;suspended = false;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void mga_crtc_dpms(struct drm_crtc *crtc, int mode)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+	u8 seq1 = 0, crtcext1 = 0;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case DRM_MODE_DPMS_ON:</div><div class='add'>+		seq1 = 0;</div><div class='add'>+		crtcext1 = 0;</div><div class='add'>+		mga_crtc_load_lut(crtc);</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_DPMS_STANDBY:</div><div class='add'>+		seq1 = 0x20;</div><div class='add'>+		crtcext1 = 0x10;</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_DPMS_SUSPEND:</div><div class='add'>+		seq1 = 0x20;</div><div class='add'>+		crtcext1 = 0x20;</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_DPMS_OFF:</div><div class='add'>+		seq1 = 0x20;</div><div class='add'>+		crtcext1 = 0x30;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+	if (mode == DRM_MODE_DPMS_OFF) {</div><div class='add'>+		mga_suspend(crtc);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	WREG8(MGAREG_SEQ_INDEX, 0x01);</div><div class='add'>+	seq1 |= RREG8(MGAREG_SEQ_DATA) &amp; ~0x20;</div><div class='add'>+	mga_wait_vsync(mdev);</div><div class='add'>+	mga_wait_busy(mdev);</div><div class='add'>+	WREG8(MGAREG_SEQ_DATA, seq1);</div><div class='add'>+	msleep(20);</div><div class='add'>+	WREG8(MGAREG_CRTCEXT_INDEX, 0x01);</div><div class='add'>+	crtcext1 |= RREG8(MGAREG_CRTCEXT_DATA) &amp; ~0x30;</div><div class='add'>+	WREG8(MGAREG_CRTCEXT_DATA, crtcext1);</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+	if (mode == DRM_MODE_DPMS_ON &amp;&amp; mdev-&gt;suspended == true) {</div><div class='add'>+		mga_resume(crtc);</div><div class='add'>+		drm_helper_resume_force_mode(dev);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is called before a mode is programmed. A typical use might be to</div><div class='add'>+ * enable DPMS during the programming to avoid seeing intermediate stages,</div><div class='add'>+ * but that's not relevant to us</div><div class='add'>+ */</div><div class='add'>+static void mga_crtc_prepare(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	/*	mga_resume(crtc);*/</div><div class='add'>+</div><div class='add'>+	WREG8(MGAREG_CRTC_INDEX, 0x11);</div><div class='add'>+	tmp = RREG8(MGAREG_CRTC_DATA);</div><div class='add'>+	WREG_CRT(0x11, tmp | 0x80);</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;type == G200_SE_A || mdev-&gt;type == G200_SE_B) {</div><div class='add'>+		WREG_SEQ(0, 1);</div><div class='add'>+		msleep(50);</div><div class='add'>+		WREG_SEQ(1, 0x20);</div><div class='add'>+		msleep(20);</div><div class='add'>+	} else {</div><div class='add'>+		WREG8(MGAREG_SEQ_INDEX, 0x1);</div><div class='add'>+		tmp = RREG8(MGAREG_SEQ_DATA);</div><div class='add'>+</div><div class='add'>+		/* start sync reset */</div><div class='add'>+		WREG_SEQ(0, 1);</div><div class='add'>+		WREG_SEQ(1, tmp | 0x20);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;type == G200_WB)</div><div class='add'>+		mga_g200wb_prepare(crtc);</div><div class='add'>+</div><div class='add'>+	WREG_CRT(17, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This is called after a mode is programmed. It should reverse anything done</div><div class='add'>+ * by the prepare function</div><div class='add'>+ */</div><div class='add'>+static void mga_crtc_commit(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = crtc-&gt;dev;</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+	struct drm_crtc_helper_funcs *crtc_funcs = crtc-&gt;helper_private;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;type == G200_WB)</div><div class='add'>+		mga_g200wb_commit(crtc);</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;type == G200_SE_A || mdev-&gt;type == G200_SE_B) {</div><div class='add'>+		msleep(50);</div><div class='add'>+		WREG_SEQ(1, 0x0);</div><div class='add'>+		msleep(20);</div><div class='add'>+		WREG_SEQ(0, 0x3);</div><div class='add'>+	} else {</div><div class='add'>+		WREG8(MGAREG_SEQ_INDEX, 0x1);</div><div class='add'>+		tmp = RREG8(MGAREG_SEQ_DATA);</div><div class='add'>+</div><div class='add'>+		tmp &amp;= ~0x20;</div><div class='add'>+		WREG_SEQ(0x1, tmp);</div><div class='add'>+		WREG_SEQ(0, 3);</div><div class='add'>+	}</div><div class='add'>+	crtc_funcs-&gt;dpms(crtc, DRM_MODE_DPMS_ON);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The core can pass us a set of gamma values to program. We actually only</div><div class='add'>+ * use this for 8-bit mode so can't perform smooth fades on deeper modes,</div><div class='add'>+ * but it's a requirement that we provide the function</div><div class='add'>+ */</div><div class='add'>+static void mga_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,</div><div class='add'>+				  u16 *blue, uint32_t start, uint32_t size)</div><div class='add'>+{</div><div class='add'>+	struct mga_crtc *mga_crtc = to_mga_crtc(crtc);</div><div class='add'>+	int end = (start + size &gt; MGAG200_LUT_SIZE) ? MGAG200_LUT_SIZE : start + size;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = start; i &lt; end; i++) {</div><div class='add'>+		mga_crtc-&gt;lut_r[i] = red[i] &gt;&gt; 8;</div><div class='add'>+		mga_crtc-&gt;lut_g[i] = green[i] &gt;&gt; 8;</div><div class='add'>+		mga_crtc-&gt;lut_b[i] = blue[i] &gt;&gt; 8;</div><div class='add'>+	}</div><div class='add'>+	mga_crtc_load_lut(crtc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Simple cleanup function */</div><div class='add'>+static void mga_crtc_destroy(struct drm_crtc *crtc)</div><div class='add'>+{</div><div class='add'>+	struct mga_crtc *mga_crtc = to_mga_crtc(crtc);</div><div class='add'>+</div><div class='add'>+	drm_crtc_cleanup(crtc);</div><div class='add'>+	kfree(mga_crtc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* These provide the minimum set of functions required to handle a CRTC */</div><div class='add'>+static const struct drm_crtc_funcs mga_crtc_funcs = {</div><div class='add'>+	.gamma_set = mga_crtc_gamma_set,</div><div class='add'>+	.set_config = drm_crtc_helper_set_config,</div><div class='add'>+	.destroy = mga_crtc_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct drm_crtc_helper_funcs mga_helper_funcs = {</div><div class='add'>+	.dpms = mga_crtc_dpms,</div><div class='add'>+	.mode_fixup = mga_crtc_mode_fixup,</div><div class='add'>+	.mode_set = mga_crtc_mode_set,</div><div class='add'>+	.mode_set_base = mga_crtc_mode_set_base,</div><div class='add'>+	.prepare = mga_crtc_prepare,</div><div class='add'>+	.commit = mga_crtc_commit,</div><div class='add'>+	.load_lut = mga_crtc_load_lut,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CRTC setup */</div><div class='add'>+static void mga_crtc_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+	struct mga_crtc *mga_crtc;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mga_crtc = kzalloc(sizeof(struct mga_crtc) +</div><div class='add'>+			      (MGAG200FB_CONN_LIMIT * sizeof(struct drm_connector *)),</div><div class='add'>+			      GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (mga_crtc == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	drm_crtc_init(dev, &amp;mga_crtc-&gt;base, &amp;mga_crtc_funcs);</div><div class='add'>+</div><div class='add'>+	drm_mode_crtc_set_gamma_size(&amp;mga_crtc-&gt;base, MGAG200_LUT_SIZE);</div><div class='add'>+	mdev-&gt;mode_info.crtc = mga_crtc;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MGAG200_LUT_SIZE; i++) {</div><div class='add'>+		mga_crtc-&gt;lut_r[i] = i;</div><div class='add'>+		mga_crtc-&gt;lut_g[i] = i;</div><div class='add'>+		mga_crtc-&gt;lut_b[i] = i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_crtc_helper_add(&amp;mga_crtc-&gt;base, &amp;mga_helper_funcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/** Sets the color ramps on behalf of fbcon */</div><div class='add'>+void mga_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,</div><div class='add'>+			      u16 blue, int regno)</div><div class='add'>+{</div><div class='add'>+	struct mga_crtc *mga_crtc = to_mga_crtc(crtc);</div><div class='add'>+</div><div class='add'>+	mga_crtc-&gt;lut_r[regno] = red &gt;&gt; 8;</div><div class='add'>+	mga_crtc-&gt;lut_g[regno] = green &gt;&gt; 8;</div><div class='add'>+	mga_crtc-&gt;lut_b[regno] = blue &gt;&gt; 8;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/** Gets the color ramps on behalf of fbcon */</div><div class='add'>+void mga_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,</div><div class='add'>+			      u16 *blue, int regno)</div><div class='add'>+{</div><div class='add'>+	struct mga_crtc *mga_crtc = to_mga_crtc(crtc);</div><div class='add'>+</div><div class='add'>+	*red = (u16)mga_crtc-&gt;lut_r[regno] &lt;&lt; 8;</div><div class='add'>+	*green = (u16)mga_crtc-&gt;lut_g[regno] &lt;&lt; 8;</div><div class='add'>+	*blue = (u16)mga_crtc-&gt;lut_b[regno] &lt;&lt; 8;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The encoder comes after the CRTC in the output pipeline, but before</div><div class='add'>+ * the connector. It's responsible for ensuring that the digital</div><div class='add'>+ * stream is appropriately converted into the output format. Setup is</div><div class='add'>+ * very simple in this case - all we have to do is inform qemu of the</div><div class='add'>+ * colour depth in order to ensure that it displays appropriately</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * These functions are analagous to those in the CRTC code, but are intended</div><div class='add'>+ * to handle any encoder-specific limitations</div><div class='add'>+ */</div><div class='add'>+static bool mga_encoder_mode_fixup(struct drm_encoder *encoder,</div><div class='add'>+				  struct drm_display_mode *mode,</div><div class='add'>+				  struct drm_display_mode *adjusted_mode)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_encoder_mode_set(struct drm_encoder *encoder,</div><div class='add'>+				struct drm_display_mode *mode,</div><div class='add'>+				struct drm_display_mode *adjusted_mode)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_encoder_dpms(struct drm_encoder *encoder, int state)</div><div class='add'>+{</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_encoder_prepare(struct drm_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_encoder_commit(struct drm_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mga_encoder_destroy(struct drm_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+	struct mga_encoder *mga_encoder = to_mga_encoder(encoder);</div><div class='add'>+	drm_encoder_cleanup(encoder);</div><div class='add'>+	kfree(mga_encoder);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct drm_encoder_helper_funcs mga_encoder_helper_funcs = {</div><div class='add'>+	.dpms = mga_encoder_dpms,</div><div class='add'>+	.mode_fixup = mga_encoder_mode_fixup,</div><div class='add'>+	.mode_set = mga_encoder_mode_set,</div><div class='add'>+	.prepare = mga_encoder_prepare,</div><div class='add'>+	.commit = mga_encoder_commit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct drm_encoder_funcs mga_encoder_encoder_funcs = {</div><div class='add'>+	.destroy = mga_encoder_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct drm_encoder *mga_encoder_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_encoder *encoder;</div><div class='add'>+	struct mga_encoder *mga_encoder;</div><div class='add'>+</div><div class='add'>+	mga_encoder = kzalloc(sizeof(struct mga_encoder), GFP_KERNEL);</div><div class='add'>+	if (!mga_encoder)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	encoder = &amp;mga_encoder-&gt;base;</div><div class='add'>+	encoder-&gt;possible_crtcs = 0x1;</div><div class='add'>+</div><div class='add'>+	drm_encoder_init(dev, encoder, &amp;mga_encoder_encoder_funcs,</div><div class='add'>+			 DRM_MODE_ENCODER_DAC);</div><div class='add'>+	drm_encoder_helper_add(encoder, &amp;mga_encoder_helper_funcs);</div><div class='add'>+</div><div class='add'>+	return encoder;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int mga_vga_get_modes(struct drm_connector *connector)</div><div class='add'>+{</div><div class='add'>+	struct mga_connector *mga_connector = to_mga_connector(connector);</div><div class='add'>+	struct edid *edid;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	edid = drm_get_edid(connector, &amp;mga_connector-&gt;i2c-&gt;adapter);</div><div class='add'>+	if (edid) {</div><div class='add'>+		drm_mode_connector_update_edid_property(connector, edid);</div><div class='add'>+		ret = drm_add_edid_modes(connector, edid);</div><div class='add'>+		connector-&gt;display_info.raw_edid = NULL;</div><div class='add'>+		kfree(edid);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mga_vga_mode_valid(struct drm_connector *connector,</div><div class='add'>+				 struct drm_display_mode *mode)</div><div class='add'>+{</div><div class='add'>+	/* FIXME: Add bandwidth and g200se limitations */</div><div class='add'>+</div><div class='add'>+	if (mode-&gt;crtc_hdisplay &gt; 2048 || mode-&gt;crtc_hsync_start &gt; 4096 ||</div><div class='add'>+	    mode-&gt;crtc_hsync_end &gt; 4096 || mode-&gt;crtc_htotal &gt; 4096 ||</div><div class='add'>+	    mode-&gt;crtc_vdisplay &gt; 2048 || mode-&gt;crtc_vsync_start &gt; 4096 ||</div><div class='add'>+	    mode-&gt;crtc_vsync_end &gt; 4096 || mode-&gt;crtc_vtotal &gt; 4096) {</div><div class='add'>+		return MODE_BAD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return MODE_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct drm_encoder *mga_connector_best_encoder(struct drm_connector</div><div class='add'>+						  *connector)</div><div class='add'>+{</div><div class='add'>+	int enc_id = connector-&gt;encoder_ids[0];</div><div class='add'>+	struct drm_mode_object *obj;</div><div class='add'>+	struct drm_encoder *encoder;</div><div class='add'>+</div><div class='add'>+	/* pick the encoder ids */</div><div class='add'>+	if (enc_id) {</div><div class='add'>+		obj =</div><div class='add'>+		    drm_mode_object_find(connector-&gt;dev, enc_id,</div><div class='add'>+					 DRM_MODE_OBJECT_ENCODER);</div><div class='add'>+		if (!obj)</div><div class='add'>+			return NULL;</div><div class='add'>+		encoder = obj_to_encoder(obj);</div><div class='add'>+		return encoder;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum drm_connector_status mga_vga_detect(struct drm_connector</div><div class='add'>+						   *connector, bool force)</div><div class='add'>+{</div><div class='add'>+	return connector_status_connected;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mga_connector_destroy(struct drm_connector *connector)</div><div class='add'>+{</div><div class='add'>+	struct mga_connector *mga_connector = to_mga_connector(connector);</div><div class='add'>+	mgag200_i2c_destroy(mga_connector-&gt;i2c);</div><div class='add'>+	drm_connector_cleanup(connector);</div><div class='add'>+	kfree(connector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct drm_connector_helper_funcs mga_vga_connector_helper_funcs = {</div><div class='add'>+	.get_modes = mga_vga_get_modes,</div><div class='add'>+	.mode_valid = mga_vga_mode_valid,</div><div class='add'>+	.best_encoder = mga_connector_best_encoder,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct drm_connector_funcs mga_vga_connector_funcs = {</div><div class='add'>+	.dpms = drm_helper_connector_dpms,</div><div class='add'>+	.detect = mga_vga_detect,</div><div class='add'>+	.fill_modes = drm_helper_probe_single_connector_modes,</div><div class='add'>+	.destroy = mga_connector_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct drm_connector *mga_vga_init(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_connector *connector;</div><div class='add'>+	struct mga_connector *mga_connector;</div><div class='add'>+</div><div class='add'>+	mga_connector = kzalloc(sizeof(struct mga_connector), GFP_KERNEL);</div><div class='add'>+	if (!mga_connector)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	connector = &amp;mga_connector-&gt;base;</div><div class='add'>+</div><div class='add'>+	drm_connector_init(dev, connector,</div><div class='add'>+			   &amp;mga_vga_connector_funcs, DRM_MODE_CONNECTOR_VGA);</div><div class='add'>+</div><div class='add'>+	drm_connector_helper_add(connector, &amp;mga_vga_connector_helper_funcs);</div><div class='add'>+</div><div class='add'>+	mga_connector-&gt;i2c = mgag200_i2c_create(dev);</div><div class='add'>+	if (!mga_connector-&gt;i2c)</div><div class='add'>+		DRM_ERROR("failed to add ddc bus\n");</div><div class='add'>+</div><div class='add'>+	return connector;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+int mgag200_modeset_init(struct mga_device *mdev)</div><div class='add'>+{</div><div class='add'>+	struct drm_encoder *encoder;</div><div class='add'>+	struct drm_connector *connector;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mdev-&gt;mode_info.mode_config_initialized = true;</div><div class='add'>+</div><div class='add'>+	mdev-&gt;dev-&gt;mode_config.max_width = MGAG200_MAX_FB_WIDTH;</div><div class='add'>+	mdev-&gt;dev-&gt;mode_config.max_height = MGAG200_MAX_FB_HEIGHT;</div><div class='add'>+</div><div class='add'>+	mdev-&gt;dev-&gt;mode_config.fb_base = mdev-&gt;mc.vram_base;</div><div class='add'>+</div><div class='add'>+	mga_crtc_init(mdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	encoder = mga_encoder_init(mdev-&gt;dev);</div><div class='add'>+	if (!encoder) {</div><div class='add'>+		DRM_ERROR("mga_encoder_init failed\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	connector = mga_vga_init(mdev-&gt;dev);</div><div class='add'>+	if (!connector) {</div><div class='add'>+		DRM_ERROR("mga_vga_init failed\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_mode_connector_attach_encoder(connector, encoder);</div><div class='add'>+</div><div class='add'>+	ret = mgag200_fbdev_init(mdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("mga_fbdev_init failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mgag200_modeset_fini(struct mga_device *mdev)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/mgag200/mgag200_reg.h b/drivers/gpu/drm/mgag200/mgag200_reg.h<br/>new file mode 100644<br/>index 000000000000..fb24d8655feb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/mgag200/mgag200_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_reg.h</a></div><div class='hunk'>@@ -0,0 +1,661 @@</div><div class='add'>+/*</div><div class='add'>+ * MGA Millennium (MGA2064W) functions</div><div class='add'>+ * MGA Mystique (MGA1064SG) functions</div><div class='add'>+ *</div><div class='add'>+ * Copyright 1996 The XFree86 Project, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Authors</div><div class='add'>+ *		Dirk Hohndel</div><div class='add'>+ *			hohndel@XFree86.Org</div><div class='add'>+ *		David Dawes</div><div class='add'>+ *			dawes@XFree86.Org</div><div class='add'>+ * Contributors:</div><div class='add'>+ *		Guy DESBIEF, Aix-en-provence, France</div><div class='add'>+ *			g.desbief@aix.pacwan.net</div><div class='add'>+ *		MGA1064SG Mystique register file</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#ifndef _MGA_REG_H_</div><div class='add'>+#define _MGA_REG_H_</div><div class='add'>+</div><div class='add'>+#define	MGAREG_DWGCTL		0x1c00</div><div class='add'>+#define	MGAREG_MACCESS		0x1c04</div><div class='add'>+/* the following is a mystique only register */</div><div class='add'>+#define MGAREG_MCTLWTST		0x1c08</div><div class='add'>+#define	MGAREG_ZORG		0x1c0c</div><div class='add'>+</div><div class='add'>+#define	MGAREG_PAT0		0x1c10</div><div class='add'>+#define	MGAREG_PAT1		0x1c14</div><div class='add'>+#define	MGAREG_PLNWT		0x1c1c</div><div class='add'>+</div><div class='add'>+#define	MGAREG_BCOL		0x1c20</div><div class='add'>+#define	MGAREG_FCOL		0x1c24</div><div class='add'>+</div><div class='add'>+#define	MGAREG_SRC0		0x1c30</div><div class='add'>+#define	MGAREG_SRC1		0x1c34</div><div class='add'>+#define	MGAREG_SRC2		0x1c38</div><div class='add'>+#define	MGAREG_SRC3		0x1c3c</div><div class='add'>+</div><div class='add'>+#define	MGAREG_XYSTRT		0x1c40</div><div class='add'>+#define	MGAREG_XYEND		0x1c44</div><div class='add'>+</div><div class='add'>+#define	MGAREG_SHIFT		0x1c50</div><div class='add'>+/* the following is a mystique only register */</div><div class='add'>+#define MGAREG_DMAPAD		0x1c54</div><div class='add'>+#define	MGAREG_SGN		0x1c58</div><div class='add'>+#define	MGAREG_LEN		0x1c5c</div><div class='add'>+</div><div class='add'>+#define	MGAREG_AR0		0x1c60</div><div class='add'>+#define	MGAREG_AR1		0x1c64</div><div class='add'>+#define	MGAREG_AR2		0x1c68</div><div class='add'>+#define	MGAREG_AR3		0x1c6c</div><div class='add'>+#define	MGAREG_AR4		0x1c70</div><div class='add'>+#define	MGAREG_AR5		0x1c74</div><div class='add'>+#define	MGAREG_AR6		0x1c78</div><div class='add'>+</div><div class='add'>+#define	MGAREG_CXBNDRY		0x1c80</div><div class='add'>+#define	MGAREG_FXBNDRY		0x1c84</div><div class='add'>+#define	MGAREG_YDSTLEN		0x1c88</div><div class='add'>+#define	MGAREG_PITCH		0x1c8c</div><div class='add'>+</div><div class='add'>+#define	MGAREG_YDST		0x1c90</div><div class='add'>+#define	MGAREG_YDSTORG		0x1c94</div><div class='add'>+#define	MGAREG_YTOP		0x1c98</div><div class='add'>+#define	MGAREG_YBOT		0x1c9c</div><div class='add'>+</div><div class='add'>+#define	MGAREG_CXLEFT		0x1ca0</div><div class='add'>+#define	MGAREG_CXRIGHT		0x1ca4</div><div class='add'>+#define	MGAREG_FXLEFT		0x1ca8</div><div class='add'>+#define	MGAREG_FXRIGHT		0x1cac</div><div class='add'>+</div><div class='add'>+#define	MGAREG_XDST		0x1cb0</div><div class='add'>+</div><div class='add'>+#define	MGAREG_DR0		0x1cc0</div><div class='add'>+#define	MGAREG_DR1		0x1cc4</div><div class='add'>+#define	MGAREG_DR2		0x1cc8</div><div class='add'>+#define	MGAREG_DR3		0x1ccc</div><div class='add'>+</div><div class='add'>+#define	MGAREG_DR4		0x1cd0</div><div class='add'>+#define	MGAREG_DR5		0x1cd4</div><div class='add'>+#define	MGAREG_DR6		0x1cd8</div><div class='add'>+#define	MGAREG_DR7		0x1cdc</div><div class='add'>+</div><div class='add'>+#define	MGAREG_DR8		0x1ce0</div><div class='add'>+#define	MGAREG_DR9		0x1ce4</div><div class='add'>+#define	MGAREG_DR10		0x1ce8</div><div class='add'>+#define	MGAREG_DR11		0x1cec</div><div class='add'>+</div><div class='add'>+#define	MGAREG_DR12		0x1cf0</div><div class='add'>+#define	MGAREG_DR13		0x1cf4</div><div class='add'>+#define	MGAREG_DR14		0x1cf8</div><div class='add'>+#define	MGAREG_DR15		0x1cfc</div><div class='add'>+</div><div class='add'>+#define MGAREG_SRCORG		0x2cb4</div><div class='add'>+#define MGAREG_DSTORG		0x2cb8</div><div class='add'>+</div><div class='add'>+/* add or or this to one of the previous "power registers" to start</div><div class='add'>+   the drawing engine */</div><div class='add'>+</div><div class='add'>+#define MGAREG_EXEC		0x0100</div><div class='add'>+</div><div class='add'>+#define	MGAREG_FIFOSTATUS	0x1e10</div><div class='add'>+#define	MGAREG_Status		0x1e14</div><div class='add'>+#define MGAREG_CACHEFLUSH       0x1fff</div><div class='add'>+#define	MGAREG_ICLEAR		0x1e18</div><div class='add'>+#define	MGAREG_IEN		0x1e1c</div><div class='add'>+</div><div class='add'>+#define	MGAREG_VCOUNT		0x1e20</div><div class='add'>+</div><div class='add'>+#define	MGAREG_Reset		0x1e40</div><div class='add'>+</div><div class='add'>+#define	MGAREG_OPMODE		0x1e54</div><div class='add'>+</div><div class='add'>+/* Warp Registers */</div><div class='add'>+#define MGAREG_WIADDR           0x1dc0</div><div class='add'>+#define MGAREG_WIADDR2          0x1dd8</div><div class='add'>+#define MGAREG_WGETMSB          0x1dc8</div><div class='add'>+#define MGAREG_WVRTXSZ          0x1dcc</div><div class='add'>+#define MGAREG_WACCEPTSEQ       0x1dd4</div><div class='add'>+#define MGAREG_WMISC            0x1e70</div><div class='add'>+</div><div class='add'>+#define MGAREG_MEMCTL           0x2e08</div><div class='add'>+</div><div class='add'>+/* OPMODE register additives */</div><div class='add'>+</div><div class='add'>+#define MGAOPM_DMA_GENERAL	(0x00 &lt;&lt; 2)</div><div class='add'>+#define MGAOPM_DMA_BLIT		(0x01 &lt;&lt; 2)</div><div class='add'>+#define MGAOPM_DMA_VECTOR	(0x10 &lt;&lt; 2)</div><div class='add'>+</div><div class='add'>+/* MACCESS register additives */</div><div class='add'>+#define MGAMAC_PW8               0x00</div><div class='add'>+#define MGAMAC_PW16              0x01</div><div class='add'>+#define MGAMAC_PW24              0x03 /* not a typo */</div><div class='add'>+#define MGAMAC_PW32              0x02 /* not a typo */</div><div class='add'>+#define MGAMAC_BYPASS332         0x10000000</div><div class='add'>+#define MGAMAC_NODITHER          0x40000000</div><div class='add'>+#define MGAMAC_DIT555            0x80000000</div><div class='add'>+</div><div class='add'>+/* DWGCTL register additives */</div><div class='add'>+</div><div class='add'>+/* Lines */</div><div class='add'>+</div><div class='add'>+#define MGADWG_LINE_OPEN	0x00</div><div class='add'>+#define MGADWG_AUTOLINE_OPEN	0x01</div><div class='add'>+#define MGADWG_LINE_CLOSE	0x02</div><div class='add'>+#define MGADWG_AUTOLINE_CLOSE	0x03</div><div class='add'>+</div><div class='add'>+/* Trapezoids */</div><div class='add'>+#define MGADWG_TRAP		0x04</div><div class='add'>+#define MGADWG_TEXTURE_TRAP	0x06</div><div class='add'>+</div><div class='add'>+/* BitBlts */</div><div class='add'>+</div><div class='add'>+#define MGADWG_BITBLT		0x08</div><div class='add'>+#define MGADWG_FBITBLT		0x0c</div><div class='add'>+#define MGADWG_ILOAD		0x09</div><div class='add'>+#define MGADWG_ILOAD_SCALE	0x0d</div><div class='add'>+#define MGADWG_ILOAD_FILTER	0x0f</div><div class='add'>+#define MGADWG_ILOAD_HIQH	0x07</div><div class='add'>+#define MGADWG_ILOAD_HIQHV	0x0e</div><div class='add'>+#define MGADWG_IDUMP		0x0a</div><div class='add'>+</div><div class='add'>+/* atype access to WRAM */</div><div class='add'>+</div><div class='add'>+#define MGADWG_RPL		( 0x00 &lt;&lt; 4 )</div><div class='add'>+#define MGADWG_RSTR		( 0x01 &lt;&lt; 4 )</div><div class='add'>+#define MGADWG_ZI		( 0x03 &lt;&lt; 4 )</div><div class='add'>+#define MGADWG_BLK 		( 0x04 &lt;&lt; 4 )</div><div class='add'>+#define MGADWG_I		( 0x07 &lt;&lt; 4 )</div><div class='add'>+</div><div class='add'>+/* specifies whether bit blits are linear or xy */</div><div class='add'>+#define MGADWG_LINEAR		( 0x01 &lt;&lt; 7 )</div><div class='add'>+</div><div class='add'>+/* z drawing mode. use MGADWG_NOZCMP for always */</div><div class='add'>+</div><div class='add'>+#define MGADWG_NOZCMP		( 0x00 &lt;&lt; 8 )</div><div class='add'>+#define MGADWG_ZE		( 0x02 &lt;&lt; 8 )</div><div class='add'>+#define MGADWG_ZNE		( 0x03 &lt;&lt; 8 )</div><div class='add'>+#define MGADWG_ZLT		( 0x04 &lt;&lt; 8 )</div><div class='add'>+#define MGADWG_ZLTE		( 0x05 &lt;&lt; 8 )</div><div class='add'>+#define MGADWG_GT		( 0x06 &lt;&lt; 8 )</div><div class='add'>+#define MGADWG_GTE		( 0x07 &lt;&lt; 8 )</div><div class='add'>+</div><div class='add'>+/* use this to force colour expansion circuitry to do its stuff */</div><div class='add'>+</div><div class='add'>+#define MGADWG_SOLID		( 0x01 &lt;&lt; 11 )</div><div class='add'>+</div><div class='add'>+/* ar register at zero */</div><div class='add'>+</div><div class='add'>+#define MGADWG_ARZERO		( 0x01 &lt;&lt; 12 )</div><div class='add'>+</div><div class='add'>+#define MGADWG_SGNZERO		( 0x01 &lt;&lt; 13 )</div><div class='add'>+</div><div class='add'>+#define MGADWG_SHIFTZERO	( 0x01 &lt;&lt; 14 )</div><div class='add'>+</div><div class='add'>+/* See table on 4-43 for bop ALU operations */</div><div class='add'>+</div><div class='add'>+/* See table on 4-44 for translucidity masks */</div><div class='add'>+</div><div class='add'>+#define MGADWG_BMONOLEF		( 0x00 &lt;&lt; 25 )</div><div class='add'>+#define MGADWG_BMONOWF		( 0x04 &lt;&lt; 25 )</div><div class='add'>+#define MGADWG_BPLAN		( 0x01 &lt;&lt; 25 )</div><div class='add'>+</div><div class='add'>+/* note that if bfcol is specified and you're doing a bitblt, it causes</div><div class='add'>+   a fbitblt to be performed, so check that you obey the fbitblt rules */</div><div class='add'>+</div><div class='add'>+#define MGADWG_BFCOL   		( 0x02 &lt;&lt; 25 )</div><div class='add'>+#define MGADWG_BUYUV		( 0x0e &lt;&lt; 25 )</div><div class='add'>+#define MGADWG_BU32BGR		( 0x03 &lt;&lt; 25 )</div><div class='add'>+#define MGADWG_BU32RGB		( 0x07 &lt;&lt; 25 )</div><div class='add'>+#define MGADWG_BU24BGR		( 0x0b &lt;&lt; 25 )</div><div class='add'>+#define MGADWG_BU24RGB		( 0x0f &lt;&lt; 25 )</div><div class='add'>+</div><div class='add'>+#define MGADWG_PATTERN		( 0x01 &lt;&lt; 29 )</div><div class='add'>+#define MGADWG_TRANSC		( 0x01 &lt;&lt; 30 )</div><div class='add'>+#define MGAREG_MISC_WRITE	0x3c2</div><div class='add'>+#define MGAREG_MISC_READ	0x3cc</div><div class='add'>+#define MGAREG_MEM_MISC_WRITE       0x1fc2</div><div class='add'>+#define MGAREG_MEM_MISC_READ        0x1fcc</div><div class='add'>+</div><div class='add'>+#define MGAREG_MISC_IOADSEL	(0x1 &lt;&lt; 0)</div><div class='add'>+#define MGAREG_MISC_RAMMAPEN	(0x1 &lt;&lt; 1)</div><div class='add'>+#define MGAREG_MISC_CLK_SEL_VGA25	(0x0 &lt;&lt; 2)</div><div class='add'>+#define MGAREG_MISC_CLK_SEL_VGA28	(0x1 &lt;&lt; 2)</div><div class='add'>+#define MGAREG_MISC_CLK_SEL_MGA_PIX	(0x2 &lt;&lt; 2)</div><div class='add'>+#define MGAREG_MISC_CLK_SEL_MGA_MSK	(0x3 &lt;&lt; 2)</div><div class='add'>+#define MGAREG_MISC_VIDEO_DIS	(0x1 &lt;&lt; 4)</div><div class='add'>+#define MGAREG_MISC_HIGH_PG_SEL	(0x1 &lt;&lt; 5)</div><div class='add'>+</div><div class='add'>+/* MMIO VGA registers */</div><div class='add'>+#define MGAREG_SEQ_INDEX	0x1fc4</div><div class='add'>+#define MGAREG_SEQ_DATA		0x1fc5</div><div class='add'>+#define MGAREG_CRTC_INDEX	0x1fd4</div><div class='add'>+#define MGAREG_CRTC_DATA	0x1fd5</div><div class='add'>+#define MGAREG_CRTCEXT_INDEX	0x1fde</div><div class='add'>+#define MGAREG_CRTCEXT_DATA	0x1fdf</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* MGA bits for registers PCI_OPTION_REG */</div><div class='add'>+#define MGA1064_OPT_SYS_CLK_PCI   		( 0x00 &lt;&lt; 0 )</div><div class='add'>+#define MGA1064_OPT_SYS_CLK_PLL   		( 0x01 &lt;&lt; 0 )</div><div class='add'>+#define MGA1064_OPT_SYS_CLK_EXT   		( 0x02 &lt;&lt; 0 )</div><div class='add'>+#define MGA1064_OPT_SYS_CLK_MSK   		( 0x03 &lt;&lt; 0 )</div><div class='add'>+</div><div class='add'>+#define MGA1064_OPT_SYS_CLK_DIS   		( 0x01 &lt;&lt; 2 )</div><div class='add'>+#define MGA1064_OPT_G_CLK_DIV_1   		( 0x01 &lt;&lt; 3 )</div><div class='add'>+#define MGA1064_OPT_M_CLK_DIV_1   		( 0x01 &lt;&lt; 4 )</div><div class='add'>+</div><div class='add'>+#define MGA1064_OPT_SYS_PLL_PDN   		( 0x01 &lt;&lt; 5 )</div><div class='add'>+#define MGA1064_OPT_VGA_ION   		( 0x01 &lt;&lt; 8 )</div><div class='add'>+</div><div class='add'>+/* MGA registers in PCI config space */</div><div class='add'>+#define PCI_MGA_INDEX		0x44</div><div class='add'>+#define PCI_MGA_DATA		0x48</div><div class='add'>+#define PCI_MGA_OPTION		0x40</div><div class='add'>+#define PCI_MGA_OPTION2		0x50</div><div class='add'>+#define PCI_MGA_OPTION3		0x54</div><div class='add'>+</div><div class='add'>+#define RAMDAC_OFFSET		0x3c00</div><div class='add'>+</div><div class='add'>+/* TVP3026 direct registers */</div><div class='add'>+</div><div class='add'>+#define TVP3026_INDEX		0x00</div><div class='add'>+#define TVP3026_WADR_PAL	0x00</div><div class='add'>+#define TVP3026_COL_PAL		0x01</div><div class='add'>+#define TVP3026_PIX_RD_MSK	0x02</div><div class='add'>+#define TVP3026_RADR_PAL	0x03</div><div class='add'>+#define TVP3026_CUR_COL_ADDR	0x04</div><div class='add'>+#define TVP3026_CUR_COL_DATA	0x05</div><div class='add'>+#define TVP3026_DATA		0x0a</div><div class='add'>+#define TVP3026_CUR_RAM		0x0b</div><div class='add'>+#define TVP3026_CUR_XLOW	0x0c</div><div class='add'>+#define TVP3026_CUR_XHI		0x0d</div><div class='add'>+#define TVP3026_CUR_YLOW	0x0e</div><div class='add'>+#define TVP3026_CUR_YHI		0x0f</div><div class='add'>+</div><div class='add'>+/* TVP3026 indirect registers */</div><div class='add'>+</div><div class='add'>+#define TVP3026_SILICON_REV	0x01</div><div class='add'>+#define TVP3026_CURSOR_CTL	0x06</div><div class='add'>+#define TVP3026_LATCH_CTL	0x0f</div><div class='add'>+#define TVP3026_TRUE_COLOR_CTL	0x18</div><div class='add'>+#define TVP3026_MUX_CTL		0x19</div><div class='add'>+#define TVP3026_CLK_SEL		0x1a</div><div class='add'>+#define TVP3026_PAL_PAGE	0x1c</div><div class='add'>+#define TVP3026_GEN_CTL		0x1d</div><div class='add'>+#define TVP3026_MISC_CTL	0x1e</div><div class='add'>+#define TVP3026_GEN_IO_CTL	0x2a</div><div class='add'>+#define TVP3026_GEN_IO_DATA	0x2b</div><div class='add'>+#define TVP3026_PLL_ADDR	0x2c</div><div class='add'>+#define TVP3026_PIX_CLK_DATA	0x2d</div><div class='add'>+#define TVP3026_MEM_CLK_DATA	0x2e</div><div class='add'>+#define TVP3026_LOAD_CLK_DATA	0x2f</div><div class='add'>+#define TVP3026_KEY_RED_LOW	0x32</div><div class='add'>+#define TVP3026_KEY_RED_HI	0x33</div><div class='add'>+#define TVP3026_KEY_GREEN_LOW	0x34</div><div class='add'>+#define TVP3026_KEY_GREEN_HI	0x35</div><div class='add'>+#define TVP3026_KEY_BLUE_LOW	0x36</div><div class='add'>+#define TVP3026_KEY_BLUE_HI	0x37</div><div class='add'>+#define TVP3026_KEY_CTL		0x38</div><div class='add'>+#define TVP3026_MCLK_CTL	0x39</div><div class='add'>+#define TVP3026_SENSE_TEST	0x3a</div><div class='add'>+#define TVP3026_TEST_DATA	0x3b</div><div class='add'>+#define TVP3026_CRC_LSB		0x3c</div><div class='add'>+#define TVP3026_CRC_MSB		0x3d</div><div class='add'>+#define TVP3026_CRC_CTL		0x3e</div><div class='add'>+#define TVP3026_ID		0x3f</div><div class='add'>+#define TVP3026_RESET		0xff</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* MGA1064 DAC Register file */</div><div class='add'>+/* MGA1064 direct registers */</div><div class='add'>+</div><div class='add'>+#define MGA1064_INDEX		0x00</div><div class='add'>+#define MGA1064_WADR_PAL	0x00</div><div class='add'>+#define MGA1064_SPAREREG        0x00</div><div class='add'>+#define MGA1064_COL_PAL		0x01</div><div class='add'>+#define MGA1064_PIX_RD_MSK	0x02</div><div class='add'>+#define MGA1064_RADR_PAL	0x03</div><div class='add'>+#define MGA1064_DATA		0x0a</div><div class='add'>+</div><div class='add'>+#define MGA1064_CUR_XLOW	0x0c</div><div class='add'>+#define MGA1064_CUR_XHI		0x0d</div><div class='add'>+#define MGA1064_CUR_YLOW	0x0e</div><div class='add'>+#define MGA1064_CUR_YHI		0x0f</div><div class='add'>+</div><div class='add'>+/* MGA1064 indirect registers */</div><div class='add'>+#define MGA1064_DVI_PIPE_CTL    0x03</div><div class='add'>+#define MGA1064_CURSOR_BASE_ADR_LOW	0x04</div><div class='add'>+#define MGA1064_CURSOR_BASE_ADR_HI	0x05</div><div class='add'>+#define MGA1064_CURSOR_CTL	0x06</div><div class='add'>+#define MGA1064_CURSOR_COL0_RED	0x08</div><div class='add'>+#define MGA1064_CURSOR_COL0_GREEN	0x09</div><div class='add'>+#define MGA1064_CURSOR_COL0_BLUE	0x0a</div><div class='add'>+</div><div class='add'>+#define MGA1064_CURSOR_COL1_RED	0x0c</div><div class='add'>+#define MGA1064_CURSOR_COL1_GREEN	0x0d</div><div class='add'>+#define MGA1064_CURSOR_COL1_BLUE	0x0e</div><div class='add'>+</div><div class='add'>+#define MGA1064_CURSOR_COL2_RED	0x010</div><div class='add'>+#define MGA1064_CURSOR_COL2_GREEN	0x011</div><div class='add'>+#define MGA1064_CURSOR_COL2_BLUE	0x012</div><div class='add'>+</div><div class='add'>+#define MGA1064_VREF_CTL	0x018</div><div class='add'>+</div><div class='add'>+#define MGA1064_MUL_CTL		0x19</div><div class='add'>+#define MGA1064_MUL_CTL_8bits		0x0</div><div class='add'>+#define MGA1064_MUL_CTL_15bits		0x01</div><div class='add'>+#define MGA1064_MUL_CTL_16bits		0x02</div><div class='add'>+#define MGA1064_MUL_CTL_24bits		0x03</div><div class='add'>+#define MGA1064_MUL_CTL_32bits		0x04</div><div class='add'>+#define MGA1064_MUL_CTL_2G8V16bits		0x05</div><div class='add'>+#define MGA1064_MUL_CTL_G16V16bits		0x06</div><div class='add'>+#define MGA1064_MUL_CTL_32_24bits		0x07</div><div class='add'>+</div><div class='add'>+#define MGA1064_PIX_CLK_CTL		0x1a</div><div class='add'>+#define MGA1064_PIX_CLK_CTL_CLK_DIS		( 0x01 &lt;&lt; 2 )</div><div class='add'>+#define MGA1064_PIX_CLK_CTL_CLK_POW_DOWN	( 0x01 &lt;&lt; 3 )</div><div class='add'>+#define MGA1064_PIX_CLK_CTL_SEL_PCI		( 0x00 &lt;&lt; 0 )</div><div class='add'>+#define MGA1064_PIX_CLK_CTL_SEL_PLL		( 0x01 &lt;&lt; 0 )</div><div class='add'>+#define MGA1064_PIX_CLK_CTL_SEL_EXT		( 0x02 &lt;&lt; 0 )</div><div class='add'>+#define MGA1064_PIX_CLK_CTL_SEL_MSK		( 0x03 &lt;&lt; 0 )</div><div class='add'>+</div><div class='add'>+#define MGA1064_GEN_CTL		0x1d</div><div class='add'>+#define MGA1064_GEN_CTL_SYNC_ON_GREEN_DIS      (0x01 &lt;&lt; 5)</div><div class='add'>+#define MGA1064_MISC_CTL	0x1e</div><div class='add'>+#define MGA1064_MISC_CTL_DAC_EN                ( 0x01 &lt;&lt; 0 )</div><div class='add'>+#define MGA1064_MISC_CTL_VGA   		( 0x01 &lt;&lt; 1 )</div><div class='add'>+#define MGA1064_MISC_CTL_DIS_CON   		( 0x03 &lt;&lt; 1 )</div><div class='add'>+#define MGA1064_MISC_CTL_MAFC   		( 0x02 &lt;&lt; 1 )</div><div class='add'>+#define MGA1064_MISC_CTL_VGA8   		( 0x01 &lt;&lt; 3 )</div><div class='add'>+#define MGA1064_MISC_CTL_DAC_RAM_CS   		( 0x01 &lt;&lt; 4 )</div><div class='add'>+</div><div class='add'>+#define MGA1064_GEN_IO_CTL2	0x29</div><div class='add'>+#define MGA1064_GEN_IO_CTL	0x2a</div><div class='add'>+#define MGA1064_GEN_IO_DATA	0x2b</div><div class='add'>+#define MGA1064_SYS_PLL_M	0x2c</div><div class='add'>+#define MGA1064_SYS_PLL_N	0x2d</div><div class='add'>+#define MGA1064_SYS_PLL_P	0x2e</div><div class='add'>+#define MGA1064_SYS_PLL_STAT	0x2f</div><div class='add'>+</div><div class='add'>+#define MGA1064_REMHEADCTL     0x30</div><div class='add'>+#define MGA1064_REMHEADCTL_CLKDIS ( 0x01 &lt;&lt; 0 )</div><div class='add'>+#define MGA1064_REMHEADCTL_CLKSL_OFF ( 0x00 &lt;&lt; 1 )</div><div class='add'>+#define MGA1064_REMHEADCTL_CLKSL_PLL ( 0x01 &lt;&lt; 1 )</div><div class='add'>+#define MGA1064_REMHEADCTL_CLKSL_PCI ( 0x02 &lt;&lt; 1 )</div><div class='add'>+#define MGA1064_REMHEADCTL_CLKSL_MSK ( 0x03 &lt;&lt; 1 )</div><div class='add'>+</div><div class='add'>+#define MGA1064_REMHEADCTL2     0x31</div><div class='add'>+</div><div class='add'>+#define MGA1064_ZOOM_CTL	0x38</div><div class='add'>+#define MGA1064_SENSE_TST	0x3a</div><div class='add'>+</div><div class='add'>+#define MGA1064_CRC_LSB		0x3c</div><div class='add'>+#define MGA1064_CRC_MSB		0x3d</div><div class='add'>+#define MGA1064_CRC_CTL		0x3e</div><div class='add'>+#define MGA1064_COL_KEY_MSK_LSB		0x40</div><div class='add'>+#define MGA1064_COL_KEY_MSK_MSB		0x41</div><div class='add'>+#define MGA1064_COL_KEY_LSB		0x42</div><div class='add'>+#define MGA1064_COL_KEY_MSB		0x43</div><div class='add'>+#define MGA1064_PIX_PLLA_M	0x44</div><div class='add'>+#define MGA1064_PIX_PLLA_N	0x45</div><div class='add'>+#define MGA1064_PIX_PLLA_P	0x46</div><div class='add'>+#define MGA1064_PIX_PLLB_M	0x48</div><div class='add'>+#define MGA1064_PIX_PLLB_N	0x49</div><div class='add'>+#define MGA1064_PIX_PLLB_P	0x4a</div><div class='add'>+#define MGA1064_PIX_PLLC_M	0x4c</div><div class='add'>+#define MGA1064_PIX_PLLC_N	0x4d</div><div class='add'>+#define MGA1064_PIX_PLLC_P	0x4e</div><div class='add'>+</div><div class='add'>+#define MGA1064_PIX_PLL_STAT	0x4f</div><div class='add'>+</div><div class='add'>+/*Added for G450 dual head*/</div><div class='add'>+</div><div class='add'>+#define MGA1064_VID_PLL_STAT    0x8c</div><div class='add'>+#define MGA1064_VID_PLL_P       0x8D</div><div class='add'>+#define MGA1064_VID_PLL_M       0x8E</div><div class='add'>+#define MGA1064_VID_PLL_N       0x8F</div><div class='add'>+</div><div class='add'>+/* Modified PLL for G200 Winbond (G200WB) */</div><div class='add'>+#define MGA1064_WB_PIX_PLLC_M	0xb7</div><div class='add'>+#define MGA1064_WB_PIX_PLLC_N	0xb6</div><div class='add'>+#define MGA1064_WB_PIX_PLLC_P	0xb8</div><div class='add'>+</div><div class='add'>+/* Modified PLL for G200 Maxim (G200EV) */</div><div class='add'>+#define MGA1064_EV_PIX_PLLC_M	0xb6</div><div class='add'>+#define MGA1064_EV_PIX_PLLC_N	0xb7</div><div class='add'>+#define MGA1064_EV_PIX_PLLC_P	0xb8</div><div class='add'>+</div><div class='add'>+/* Modified PLL for G200 EH */</div><div class='add'>+#define MGA1064_EH_PIX_PLLC_M   0xb6</div><div class='add'>+#define MGA1064_EH_PIX_PLLC_N   0xb7</div><div class='add'>+#define MGA1064_EH_PIX_PLLC_P   0xb8</div><div class='add'>+</div><div class='add'>+/* Modified PLL for G200 Maxim (G200ER) */</div><div class='add'>+#define MGA1064_ER_PIX_PLLC_M	0xb7</div><div class='add'>+#define MGA1064_ER_PIX_PLLC_N	0xb6</div><div class='add'>+#define MGA1064_ER_PIX_PLLC_P	0xb8</div><div class='add'>+</div><div class='add'>+#define MGA1064_DISP_CTL        0x8a</div><div class='add'>+#define MGA1064_DISP_CTL_DAC1OUTSEL_MASK       0x01</div><div class='add'>+#define MGA1064_DISP_CTL_DAC1OUTSEL_DIS        0x00</div><div class='add'>+#define MGA1064_DISP_CTL_DAC1OUTSEL_EN         0x01</div><div class='add'>+#define MGA1064_DISP_CTL_DAC2OUTSEL_MASK       (0x03 &lt;&lt; 2)</div><div class='add'>+#define MGA1064_DISP_CTL_DAC2OUTSEL_DIS        0x00</div><div class='add'>+#define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC1      (0x01 &lt;&lt; 2)</div><div class='add'>+#define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC2      (0x02 &lt;&lt; 2)</div><div class='add'>+#define MGA1064_DISP_CTL_DAC2OUTSEL_TVE        (0x03 &lt;&lt; 2)</div><div class='add'>+#define MGA1064_DISP_CTL_PANOUTSEL_MASK        (0x03 &lt;&lt; 5)</div><div class='add'>+#define MGA1064_DISP_CTL_PANOUTSEL_DIS         0x00</div><div class='add'>+#define MGA1064_DISP_CTL_PANOUTSEL_CRTC1       (0x01 &lt;&lt; 5)</div><div class='add'>+#define MGA1064_DISP_CTL_PANOUTSEL_CRTC2RGB    (0x02 &lt;&lt; 5)</div><div class='add'>+#define MGA1064_DISP_CTL_PANOUTSEL_CRTC2656    (0x03 &lt;&lt; 5)</div><div class='add'>+</div><div class='add'>+#define MGA1064_SYNC_CTL        0x8b</div><div class='add'>+</div><div class='add'>+#define MGA1064_PWR_CTL         0xa0</div><div class='add'>+#define MGA1064_PWR_CTL_DAC2_EN                (0x01 &lt;&lt; 0)</div><div class='add'>+#define MGA1064_PWR_CTL_VID_PLL_EN             (0x01 &lt;&lt; 1)</div><div class='add'>+#define MGA1064_PWR_CTL_PANEL_EN               (0x01 &lt;&lt; 2)</div><div class='add'>+#define MGA1064_PWR_CTL_RFIFO_EN               (0x01 &lt;&lt; 3)</div><div class='add'>+#define MGA1064_PWR_CTL_CFIFO_EN               (0x01 &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+#define MGA1064_PAN_CTL         0xa2</div><div class='add'>+</div><div class='add'>+/* Using crtc2 */</div><div class='add'>+#define MGAREG2_C2CTL            0x10</div><div class='add'>+#define MGAREG2_C2HPARAM         0x14</div><div class='add'>+#define MGAREG2_C2HSYNC          0x18</div><div class='add'>+#define MGAREG2_C2VPARAM         0x1c</div><div class='add'>+#define MGAREG2_C2VSYNC          0x20</div><div class='add'>+#define MGAREG2_C2STARTADD0      0x28</div><div class='add'>+</div><div class='add'>+#define MGAREG2_C2OFFSET         0x40</div><div class='add'>+#define MGAREG2_C2DATACTL        0x4c</div><div class='add'>+</div><div class='add'>+#define MGAREG_C2CTL            0x3c10</div><div class='add'>+#define MGAREG_C2CTL_C2_EN                     0x01</div><div class='add'>+</div><div class='add'>+#define MGAREG_C2_HIPRILVL_M                   (0x07 &lt;&lt; 4)</div><div class='add'>+#define MGAREG_C2_MAXHIPRI_M                   (0x07 &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+#define MGAREG_C2CTL_PIXCLKSEL_MASK            (0x03 &lt;&lt; 1)</div><div class='add'>+#define MGAREG_C2CTL_PIXCLKSELH_MASK           (0x01 &lt;&lt; 14)</div><div class='add'>+#define MGAREG_C2CTL_PIXCLKSEL_PCICLK          0x00</div><div class='add'>+#define MGAREG_C2CTL_PIXCLKSEL_VDOCLK          (0x01 &lt;&lt; 1)</div><div class='add'>+#define MGAREG_C2CTL_PIXCLKSEL_PIXELPLL        (0x02 &lt;&lt; 1)</div><div class='add'>+#define MGAREG_C2CTL_PIXCLKSEL_VIDEOPLL        (0x03 &lt;&lt; 1)</div><div class='add'>+#define MGAREG_C2CTL_PIXCLKSEL_VDCLK           (0x01 &lt;&lt; 14)</div><div class='add'>+</div><div class='add'>+#define MGAREG_C2CTL_PIXCLKSEL_CRISTAL         (0x01 &lt;&lt; 1) | (0x01 &lt;&lt; 14)</div><div class='add'>+#define MGAREG_C2CTL_PIXCLKSEL_SYSTEMPLL       (0x02 &lt;&lt; 1) | (0x01 &lt;&lt; 14)</div><div class='add'>+</div><div class='add'>+#define MGAREG_C2CTL_PIXCLKDIS_MASK            (0x01 &lt;&lt; 3)</div><div class='add'>+#define MGAREG_C2CTL_PIXCLKDIS_DISABLE         (0x01 &lt;&lt; 3)</div><div class='add'>+</div><div class='add'>+#define MGAREG_C2CTL_CRTCDACSEL_MASK           (0x01 &lt;&lt; 20)</div><div class='add'>+#define MGAREG_C2CTL_CRTCDACSEL_CRTC1          0x00</div><div class='add'>+#define MGAREG_C2CTL_CRTCDACSEL_CRTC2          (0x01 &lt;&lt; 20)</div><div class='add'>+</div><div class='add'>+#define MGAREG_C2HPARAM         0x3c14</div><div class='add'>+#define MGAREG_C2HSYNC          0x3c18</div><div class='add'>+#define MGAREG_C2VPARAM         0x3c1c</div><div class='add'>+#define MGAREG_C2VSYNC          0x3c20</div><div class='add'>+#define MGAREG_C2STARTADD0      0x3c28</div><div class='add'>+</div><div class='add'>+#define MGAREG_C2OFFSET         0x3c40</div><div class='add'>+#define MGAREG_C2DATACTL        0x3c4c</div><div class='add'>+</div><div class='add'>+/* video register */</div><div class='add'>+</div><div class='add'>+#define MGAREG_BESA1C3ORG	0x3d60</div><div class='add'>+#define MGAREG_BESA1CORG	0x3d10</div><div class='add'>+#define MGAREG_BESA1ORG		0x3d00</div><div class='add'>+#define MGAREG_BESCTL		0x3d20</div><div class='add'>+#define MGAREG_BESGLOBCTL	0x3dc0</div><div class='add'>+#define MGAREG_BESHCOORD	0x3d28</div><div class='add'>+#define MGAREG_BESHISCAL	0x3d30</div><div class='add'>+#define MGAREG_BESHSRCEND	0x3d3c</div><div class='add'>+#define MGAREG_BESHSRCLST	0x3d50</div><div class='add'>+#define MGAREG_BESHSRCST	0x3d38</div><div class='add'>+#define MGAREG_BESLUMACTL	0x3d40</div><div class='add'>+#define MGAREG_BESPITCH		0x3d24</div><div class='add'>+#define MGAREG_BESV1SRCLST	0x3d54</div><div class='add'>+#define MGAREG_BESV1WGHT	0x3d48</div><div class='add'>+#define MGAREG_BESVCOORD	0x3d2c</div><div class='add'>+#define MGAREG_BESVISCAL	0x3d34</div><div class='add'>+</div><div class='add'>+/* texture engine registers */</div><div class='add'>+</div><div class='add'>+#define MGAREG_TMR0		0x2c00</div><div class='add'>+#define MGAREG_TMR1		0x2c04</div><div class='add'>+#define MGAREG_TMR2		0x2c08</div><div class='add'>+#define MGAREG_TMR3		0x2c0c</div><div class='add'>+#define MGAREG_TMR4		0x2c10</div><div class='add'>+#define MGAREG_TMR5		0x2c14</div><div class='add'>+#define MGAREG_TMR6		0x2c18</div><div class='add'>+#define MGAREG_TMR7		0x2c1c</div><div class='add'>+#define MGAREG_TMR8		0x2c20</div><div class='add'>+#define MGAREG_TEXORG		0x2c24</div><div class='add'>+#define MGAREG_TEXWIDTH		0x2c28</div><div class='add'>+#define MGAREG_TEXHEIGHT	0x2c2c</div><div class='add'>+#define MGAREG_TEXCTL		0x2c30</div><div class='add'>+#    define MGA_TW4                             (0x00000000)</div><div class='add'>+#    define MGA_TW8                             (0x00000001)</div><div class='add'>+#    define MGA_TW15                            (0x00000002)</div><div class='add'>+#    define MGA_TW16                            (0x00000003)</div><div class='add'>+#    define MGA_TW12                            (0x00000004)</div><div class='add'>+#    define MGA_TW32                            (0x00000006)</div><div class='add'>+#    define MGA_TW8A                            (0x00000007)</div><div class='add'>+#    define MGA_TW8AL                           (0x00000008)</div><div class='add'>+#    define MGA_TW422                           (0x0000000A)</div><div class='add'>+#    define MGA_TW422UYVY                       (0x0000000B)</div><div class='add'>+#    define MGA_PITCHLIN                        (0x00000100)</div><div class='add'>+#    define MGA_NOPERSPECTIVE                   (0x00200000)</div><div class='add'>+#    define MGA_TAKEY                           (0x02000000)</div><div class='add'>+#    define MGA_TAMASK                          (0x04000000)</div><div class='add'>+#    define MGA_CLAMPUV                         (0x18000000)</div><div class='add'>+#    define MGA_TEXMODULATE                     (0x20000000)</div><div class='add'>+#define MGAREG_TEXCTL2		0x2c3c</div><div class='add'>+#    define MGA_G400_TC2_MAGIC                  (0x00008000)</div><div class='add'>+#    define MGA_TC2_DECALBLEND                  (0x00000001)</div><div class='add'>+#    define MGA_TC2_IDECAL                      (0x00000002)</div><div class='add'>+#    define MGA_TC2_DECALDIS                    (0x00000004)</div><div class='add'>+#    define MGA_TC2_CKSTRANSDIS                 (0x00000010)</div><div class='add'>+#    define MGA_TC2_BORDEREN                    (0x00000020)</div><div class='add'>+#    define MGA_TC2_SPECEN                      (0x00000040)</div><div class='add'>+#    define MGA_TC2_DUALTEX                     (0x00000080)</div><div class='add'>+#    define MGA_TC2_TABLEFOG                    (0x00000100)</div><div class='add'>+#    define MGA_TC2_BUMPMAP                     (0x00000200)</div><div class='add'>+#    define MGA_TC2_SELECT_TMU1                 (0x80000000)</div><div class='add'>+#define MGAREG_TEXTRANS		0x2c34</div><div class='add'>+#define MGAREG_TEXTRANSHIGH	0x2c38</div><div class='add'>+#define MGAREG_TEXFILTER	0x2c58</div><div class='add'>+#    define MGA_MIN_NRST                        (0x00000000)</div><div class='add'>+#    define MGA_MIN_BILIN                       (0x00000002)</div><div class='add'>+#    define MGA_MIN_ANISO                       (0x0000000D)</div><div class='add'>+#    define MGA_MAG_NRST                        (0x00000000)</div><div class='add'>+#    define MGA_MAG_BILIN                       (0x00000020)</div><div class='add'>+#    define MGA_FILTERALPHA                     (0x00100000)</div><div class='add'>+#define MGAREG_ALPHASTART	0x2c70</div><div class='add'>+#define MGAREG_ALPHAXINC	0x2c74</div><div class='add'>+#define MGAREG_ALPHAYINC	0x2c78</div><div class='add'>+#define MGAREG_ALPHACTRL	0x2c7c</div><div class='add'>+#    define MGA_SRC_ZERO                        (0x00000000)</div><div class='add'>+#    define MGA_SRC_ONE                         (0x00000001)</div><div class='add'>+#    define MGA_SRC_DST_COLOR                   (0x00000002)</div><div class='add'>+#    define MGA_SRC_ONE_MINUS_DST_COLOR         (0x00000003)</div><div class='add'>+#    define MGA_SRC_ALPHA                       (0x00000004)</div><div class='add'>+#    define MGA_SRC_ONE_MINUS_SRC_ALPHA         (0x00000005)</div><div class='add'>+#    define MGA_SRC_DST_ALPHA                   (0x00000006)</div><div class='add'>+#    define MGA_SRC_ONE_MINUS_DST_ALPHA         (0x00000007)</div><div class='add'>+#    define MGA_SRC_SRC_ALPHA_SATURATE          (0x00000008)</div><div class='add'>+#    define MGA_SRC_BLEND_MASK                  (0x0000000f)</div><div class='add'>+#    define MGA_DST_ZERO                        (0x00000000)</div><div class='add'>+#    define MGA_DST_ONE                         (0x00000010)</div><div class='add'>+#    define MGA_DST_SRC_COLOR                   (0x00000020)</div><div class='add'>+#    define MGA_DST_ONE_MINUS_SRC_COLOR         (0x00000030)</div><div class='add'>+#    define MGA_DST_SRC_ALPHA                   (0x00000040)</div><div class='add'>+#    define MGA_DST_ONE_MINUS_SRC_ALPHA         (0x00000050)</div><div class='add'>+#    define MGA_DST_DST_ALPHA                   (0x00000060)</div><div class='add'>+#    define MGA_DST_ONE_MINUS_DST_ALPHA         (0x00000070)</div><div class='add'>+#    define MGA_DST_BLEND_MASK                  (0x00000070)</div><div class='add'>+#    define MGA_ALPHACHANNEL                    (0x00000100)</div><div class='add'>+#    define MGA_VIDEOALPHA                      (0x00000200)</div><div class='add'>+#    define MGA_DIFFUSEDALPHA                   (0x01000000)</div><div class='add'>+#    define MGA_MODULATEDALPHA                  (0x02000000)</div><div class='add'>+#define MGAREG_TDUALSTAGE0                      (0x2CF8)</div><div class='add'>+#define MGAREG_TDUALSTAGE1                      (0x2CFC)</div><div class='add'>+#    define MGA_TDS_COLOR_ARG2_DIFFUSE          (0x00000000)</div><div class='add'>+#    define MGA_TDS_COLOR_ARG2_SPECULAR         (0x00000001)</div><div class='add'>+#    define MGA_TDS_COLOR_ARG2_FCOL             (0x00000002)</div><div class='add'>+#    define MGA_TDS_COLOR_ARG2_PREVSTAGE        (0x00000003)</div><div class='add'>+#    define MGA_TDS_COLOR_ALPHA_DIFFUSE         (0x00000000)</div><div class='add'>+#    define MGA_TDS_COLOR_ALPHA_FCOL            (0x00000004)</div><div class='add'>+#    define MGA_TDS_COLOR_ALPHA_CURRTEX         (0x00000008)</div><div class='add'>+#    define MGA_TDS_COLOR_ALPHA_PREVTEX         (0x0000000c)</div><div class='add'>+#    define MGA_TDS_COLOR_ALPHA_PREVSTAGE       (0x00000010)</div><div class='add'>+#    define MGA_TDS_COLOR_ARG1_REPLICATEALPHA   (0x00000020)</div><div class='add'>+#    define MGA_TDS_COLOR_ARG1_INV              (0x00000040)</div><div class='add'>+#    define MGA_TDS_COLOR_ARG2_REPLICATEALPHA   (0x00000080)</div><div class='add'>+#    define MGA_TDS_COLOR_ARG2_INV              (0x00000100)</div><div class='add'>+#    define MGA_TDS_COLOR_ALPHA1INV             (0x00000200)</div><div class='add'>+#    define MGA_TDS_COLOR_ALPHA2INV             (0x00000400)</div><div class='add'>+#    define MGA_TDS_COLOR_ARG1MUL_ALPHA1        (0x00000800)</div><div class='add'>+#    define MGA_TDS_COLOR_ARG2MUL_ALPHA2        (0x00001000)</div><div class='add'>+#    define MGA_TDS_COLOR_ARG1ADD_MULOUT        (0x00002000)</div><div class='add'>+#    define MGA_TDS_COLOR_ARG2ADD_MULOUT        (0x00004000)</div><div class='add'>+#    define MGA_TDS_COLOR_MODBRIGHT_2X          (0x00008000)</div><div class='add'>+#    define MGA_TDS_COLOR_MODBRIGHT_4X          (0x00010000)</div><div class='add'>+#    define MGA_TDS_COLOR_ADD_SUB               (0x00000000)</div><div class='add'>+#    define MGA_TDS_COLOR_ADD_ADD               (0x00020000)</div><div class='add'>+#    define MGA_TDS_COLOR_ADD2X                 (0x00040000)</div><div class='add'>+#    define MGA_TDS_COLOR_ADDBIAS               (0x00080000)</div><div class='add'>+#    define MGA_TDS_COLOR_BLEND                 (0x00100000)</div><div class='add'>+#    define MGA_TDS_COLOR_SEL_ARG1              (0x00000000)</div><div class='add'>+#    define MGA_TDS_COLOR_SEL_ARG2              (0x00200000)</div><div class='add'>+#    define MGA_TDS_COLOR_SEL_ADD               (0x00400000)</div><div class='add'>+#    define MGA_TDS_COLOR_SEL_MUL               (0x00600000)</div><div class='add'>+#    define MGA_TDS_ALPHA_ARG1_INV              (0x00800000)</div><div class='add'>+#    define MGA_TDS_ALPHA_ARG2_DIFFUSE          (0x00000000)</div><div class='add'>+#    define MGA_TDS_ALPHA_ARG2_FCOL             (0x01000000)</div><div class='add'>+#    define MGA_TDS_ALPHA_ARG2_PREVTEX          (0x02000000)</div><div class='add'>+#    define MGA_TDS_ALPHA_ARG2_PREVSTAGE        (0x03000000)</div><div class='add'>+#    define MGA_TDS_ALPHA_ARG2_INV              (0x04000000)</div><div class='add'>+#    define MGA_TDS_ALPHA_ADD                   (0x08000000)</div><div class='add'>+#    define MGA_TDS_ALPHA_ADDBIAS               (0x10000000)</div><div class='add'>+#    define MGA_TDS_ALPHA_ADD2X                 (0x20000000)</div><div class='add'>+#    define MGA_TDS_ALPHA_SEL_ARG1              (0x00000000)</div><div class='add'>+#    define MGA_TDS_ALPHA_SEL_ARG2              (0x40000000)</div><div class='add'>+#    define MGA_TDS_ALPHA_SEL_ADD               (0x80000000)</div><div class='add'>+#    define MGA_TDS_ALPHA_SEL_MUL               (0xc0000000)</div><div class='add'>+</div><div class='add'>+#define MGAREG_DWGSYNC		0x2c4c</div><div class='add'>+</div><div class='add'>+#define MGAREG_AGP_PLL		0x1e4c</div><div class='add'>+#define MGA_AGP2XPLL_ENABLE		0x1</div><div class='add'>+#define MGA_AGP2XPLL_DISABLE		0x0</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/mgag200/mgag200_ttm.c b/drivers/gpu/drm/mgag200/mgag200_ttm.c<br/>new file mode 100644<br/>index 000000000000..b223dcb7a710<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/mgag200/mgag200_ttm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/mgag200/mgag200_ttm.c</a></div><div class='hunk'>@@ -0,0 +1,452 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the</div><div class='add'>+ * "Software"), to deal in the Software without restriction, including</div><div class='add'>+ * without limitation the rights to use, copy, modify, merge, publish,</div><div class='add'>+ * distribute, sub license, and/or sell copies of the Software, and to</div><div class='add'>+ * permit persons to whom the Software is furnished to do so, subject to</div><div class='add'>+ * the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,</div><div class='add'>+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR</div><div class='add'>+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE</div><div class='add'>+ * USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the</div><div class='add'>+ * next paragraph) shall be included in all copies or substantial portions</div><div class='add'>+ * of the Software.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * Authors: Dave Airlie &lt;airlied@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "mgag200_drv.h"</div><div class='add'>+#include &lt;ttm/ttm_page_alloc.h&gt;</div><div class='add'>+</div><div class='add'>+static inline struct mga_device *</div><div class='add'>+mgag200_bdev(struct ttm_bo_device *bd)</div><div class='add'>+{</div><div class='add'>+	return container_of(bd, struct mga_device, ttm.bdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mgag200_ttm_mem_global_init(struct drm_global_reference *ref)</div><div class='add'>+{</div><div class='add'>+	return ttm_mem_global_init(ref-&gt;object);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mgag200_ttm_mem_global_release(struct drm_global_reference *ref)</div><div class='add'>+{</div><div class='add'>+	ttm_mem_global_release(ref-&gt;object);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mgag200_ttm_global_init(struct mga_device *ast)</div><div class='add'>+{</div><div class='add'>+	struct drm_global_reference *global_ref;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	global_ref = &amp;ast-&gt;ttm.mem_global_ref;</div><div class='add'>+	global_ref-&gt;global_type = DRM_GLOBAL_TTM_MEM;</div><div class='add'>+	global_ref-&gt;size = sizeof(struct ttm_mem_global);</div><div class='add'>+	global_ref-&gt;init = &amp;mgag200_ttm_mem_global_init;</div><div class='add'>+	global_ref-&gt;release = &amp;mgag200_ttm_mem_global_release;</div><div class='add'>+	r = drm_global_item_ref(global_ref);</div><div class='add'>+	if (r != 0) {</div><div class='add'>+		DRM_ERROR("Failed setting up TTM memory accounting "</div><div class='add'>+			  "subsystem.\n");</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ast-&gt;ttm.bo_global_ref.mem_glob =</div><div class='add'>+		ast-&gt;ttm.mem_global_ref.object;</div><div class='add'>+	global_ref = &amp;ast-&gt;ttm.bo_global_ref.ref;</div><div class='add'>+	global_ref-&gt;global_type = DRM_GLOBAL_TTM_BO;</div><div class='add'>+	global_ref-&gt;size = sizeof(struct ttm_bo_global);</div><div class='add'>+	global_ref-&gt;init = &amp;ttm_bo_global_init;</div><div class='add'>+	global_ref-&gt;release = &amp;ttm_bo_global_release;</div><div class='add'>+	r = drm_global_item_ref(global_ref);</div><div class='add'>+	if (r != 0) {</div><div class='add'>+		DRM_ERROR("Failed setting up TTM BO subsystem.\n");</div><div class='add'>+		drm_global_item_unref(&amp;ast-&gt;ttm.mem_global_ref);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+mgag200_ttm_global_release(struct mga_device *ast)</div><div class='add'>+{</div><div class='add'>+	if (ast-&gt;ttm.mem_global_ref.release == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	drm_global_item_unref(&amp;ast-&gt;ttm.bo_global_ref.ref);</div><div class='add'>+	drm_global_item_unref(&amp;ast-&gt;ttm.mem_global_ref);</div><div class='add'>+	ast-&gt;ttm.mem_global_ref.release = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void mgag200_bo_ttm_destroy(struct ttm_buffer_object *tbo)</div><div class='add'>+{</div><div class='add'>+	struct mgag200_bo *bo;</div><div class='add'>+</div><div class='add'>+	bo = container_of(tbo, struct mgag200_bo, bo);</div><div class='add'>+</div><div class='add'>+	drm_gem_object_release(&amp;bo-&gt;gem);</div><div class='add'>+	kfree(bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mgag200_ttm_bo_is_mgag200_bo(struct ttm_buffer_object *bo)</div><div class='add'>+{</div><div class='add'>+	if (bo-&gt;destroy == &amp;mgag200_bo_ttm_destroy)</div><div class='add'>+		return true;</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mgag200_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,</div><div class='add'>+		     struct ttm_mem_type_manager *man)</div><div class='add'>+{</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TTM_PL_SYSTEM:</div><div class='add'>+		man-&gt;flags = TTM_MEMTYPE_FLAG_MAPPABLE;</div><div class='add'>+		man-&gt;available_caching = TTM_PL_MASK_CACHING;</div><div class='add'>+		man-&gt;default_caching = TTM_PL_FLAG_CACHED;</div><div class='add'>+		break;</div><div class='add'>+	case TTM_PL_VRAM:</div><div class='add'>+		man-&gt;func = &amp;ttm_bo_manager_func;</div><div class='add'>+		man-&gt;flags = TTM_MEMTYPE_FLAG_FIXED |</div><div class='add'>+			TTM_MEMTYPE_FLAG_MAPPABLE;</div><div class='add'>+		man-&gt;available_caching = TTM_PL_FLAG_UNCACHED |</div><div class='add'>+			TTM_PL_FLAG_WC;</div><div class='add'>+		man-&gt;default_caching = TTM_PL_FLAG_WC;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mgag200_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)</div><div class='add'>+{</div><div class='add'>+	struct mgag200_bo *mgabo = mgag200_bo(bo);</div><div class='add'>+</div><div class='add'>+	if (!mgag200_ttm_bo_is_mgag200_bo(bo))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mgag200_ttm_placement(mgabo, TTM_PL_FLAG_SYSTEM);</div><div class='add'>+	*pl = mgabo-&gt;placement;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mgag200_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mgag200_ttm_io_mem_reserve(struct ttm_bo_device *bdev,</div><div class='add'>+				  struct ttm_mem_reg *mem)</div><div class='add'>+{</div><div class='add'>+	struct ttm_mem_type_manager *man = &amp;bdev-&gt;man[mem-&gt;mem_type];</div><div class='add'>+	struct mga_device *mdev = mgag200_bdev(bdev);</div><div class='add'>+</div><div class='add'>+	mem-&gt;bus.addr = NULL;</div><div class='add'>+	mem-&gt;bus.offset = 0;</div><div class='add'>+	mem-&gt;bus.size = mem-&gt;num_pages &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	mem-&gt;bus.base = 0;</div><div class='add'>+	mem-&gt;bus.is_iomem = false;</div><div class='add'>+	if (!(man-&gt;flags &amp; TTM_MEMTYPE_FLAG_MAPPABLE))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	switch (mem-&gt;mem_type) {</div><div class='add'>+	case TTM_PL_SYSTEM:</div><div class='add'>+		/* system memory */</div><div class='add'>+		return 0;</div><div class='add'>+	case TTM_PL_VRAM:</div><div class='add'>+		mem-&gt;bus.offset = mem-&gt;start &lt;&lt; PAGE_SHIFT;</div><div class='add'>+		mem-&gt;bus.base = pci_resource_start(mdev-&gt;dev-&gt;pdev, 0);</div><div class='add'>+		mem-&gt;bus.is_iomem = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mgag200_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mgag200_bo_move(struct ttm_buffer_object *bo,</div><div class='add'>+		       bool evict, bool interruptible,</div><div class='add'>+		       bool no_wait_reserve, bool no_wait_gpu,</div><div class='add'>+		       struct ttm_mem_reg *new_mem)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+	r = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void mgag200_ttm_backend_destroy(struct ttm_tt *tt)</div><div class='add'>+{</div><div class='add'>+	ttm_tt_fini(tt);</div><div class='add'>+	kfree(tt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ttm_backend_func mgag200_tt_backend_func = {</div><div class='add'>+	.destroy = &amp;mgag200_ttm_backend_destroy,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct ttm_tt *mgag200_ttm_tt_create(struct ttm_bo_device *bdev,</div><div class='add'>+				 unsigned long size, uint32_t page_flags,</div><div class='add'>+				 struct page *dummy_read_page)</div><div class='add'>+{</div><div class='add'>+	struct ttm_tt *tt;</div><div class='add'>+</div><div class='add'>+	tt = kzalloc(sizeof(struct ttm_tt), GFP_KERNEL);</div><div class='add'>+	if (tt == NULL)</div><div class='add'>+		return NULL;</div><div class='add'>+	tt-&gt;func = &amp;mgag200_tt_backend_func;</div><div class='add'>+	if (ttm_tt_init(tt, bdev, size, page_flags, dummy_read_page)) {</div><div class='add'>+		kfree(tt);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	return tt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mgag200_ttm_tt_populate(struct ttm_tt *ttm)</div><div class='add'>+{</div><div class='add'>+	return ttm_pool_populate(ttm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mgag200_ttm_tt_unpopulate(struct ttm_tt *ttm)</div><div class='add'>+{</div><div class='add'>+	ttm_pool_unpopulate(ttm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ttm_bo_driver mgag200_bo_driver = {</div><div class='add'>+	.ttm_tt_create = mgag200_ttm_tt_create,</div><div class='add'>+	.ttm_tt_populate = mgag200_ttm_tt_populate,</div><div class='add'>+	.ttm_tt_unpopulate = mgag200_ttm_tt_unpopulate,</div><div class='add'>+	.init_mem_type = mgag200_bo_init_mem_type,</div><div class='add'>+	.evict_flags = mgag200_bo_evict_flags,</div><div class='add'>+	.move = mgag200_bo_move,</div><div class='add'>+	.verify_access = mgag200_bo_verify_access,</div><div class='add'>+	.io_mem_reserve = &amp;mgag200_ttm_io_mem_reserve,</div><div class='add'>+	.io_mem_free = &amp;mgag200_ttm_io_mem_free,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mgag200_mm_init(struct mga_device *mdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct drm_device *dev = mdev-&gt;dev;</div><div class='add'>+	struct ttm_bo_device *bdev = &amp;mdev-&gt;ttm.bdev;</div><div class='add'>+</div><div class='add'>+	ret = mgag200_ttm_global_init(mdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_device_init(&amp;mdev-&gt;ttm.bdev,</div><div class='add'>+				 mdev-&gt;ttm.bo_global_ref.ref.object,</div><div class='add'>+				 &amp;mgag200_bo_driver, DRM_FILE_PAGE_OFFSET,</div><div class='add'>+				 true);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("Error initialising bo driver; %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_init_mm(bdev, TTM_PL_VRAM, mdev-&gt;mc.vram_size &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("Failed ttm VRAM init: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mdev-&gt;fb_mtrr = drm_mtrr_add(pci_resource_start(dev-&gt;pdev, 0),</div><div class='add'>+				    pci_resource_len(dev-&gt;pdev, 0),</div><div class='add'>+				    DRM_MTRR_WC);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mgag200_mm_fini(struct mga_device *mdev)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = mdev-&gt;dev;</div><div class='add'>+	ttm_bo_device_release(&amp;mdev-&gt;ttm.bdev);</div><div class='add'>+</div><div class='add'>+	mgag200_ttm_global_release(mdev);</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;fb_mtrr &gt;= 0) {</div><div class='add'>+		drm_mtrr_del(mdev-&gt;fb_mtrr,</div><div class='add'>+			     pci_resource_start(dev-&gt;pdev, 0),</div><div class='add'>+			     pci_resource_len(dev-&gt;pdev, 0), DRM_MTRR_WC);</div><div class='add'>+		mdev-&gt;fb_mtrr = -1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mgag200_ttm_placement(struct mgag200_bo *bo, int domain)</div><div class='add'>+{</div><div class='add'>+	u32 c = 0;</div><div class='add'>+	bo-&gt;placement.fpfn = 0;</div><div class='add'>+	bo-&gt;placement.lpfn = 0;</div><div class='add'>+	bo-&gt;placement.placement = bo-&gt;placements;</div><div class='add'>+	bo-&gt;placement.busy_placement = bo-&gt;placements;</div><div class='add'>+	if (domain &amp; TTM_PL_FLAG_VRAM)</div><div class='add'>+		bo-&gt;placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_VRAM;</div><div class='add'>+	if (domain &amp; TTM_PL_FLAG_SYSTEM)</div><div class='add'>+		bo-&gt;placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;</div><div class='add'>+	if (!c)</div><div class='add'>+		bo-&gt;placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;</div><div class='add'>+	bo-&gt;placement.num_placement = c;</div><div class='add'>+	bo-&gt;placement.num_busy_placement = c;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgag200_bo_reserve(struct mgag200_bo *bo, bool no_wait)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_reserve(&amp;bo-&gt;bo, true, no_wait, false, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (ret != -ERESTARTSYS)</div><div class='add'>+			DRM_ERROR("reserve failed %p\n", bo);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mgag200_bo_unreserve(struct mgag200_bo *bo)</div><div class='add'>+{</div><div class='add'>+	ttm_bo_unreserve(&amp;bo-&gt;bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgag200_bo_create(struct drm_device *dev, int size, int align,</div><div class='add'>+		  uint32_t flags, struct mgag200_bo **pmgabo)</div><div class='add'>+{</div><div class='add'>+	struct mga_device *mdev = dev-&gt;dev_private;</div><div class='add'>+	struct mgag200_bo *mgabo;</div><div class='add'>+	size_t acc_size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mgabo = kzalloc(sizeof(struct mgag200_bo), GFP_KERNEL);</div><div class='add'>+	if (!mgabo)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = drm_gem_object_init(dev, &amp;mgabo-&gt;gem, size);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(mgabo);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mgabo-&gt;gem.driver_private = NULL;</div><div class='add'>+	mgabo-&gt;bo.bdev = &amp;mdev-&gt;ttm.bdev;</div><div class='add'>+</div><div class='add'>+	mgag200_ttm_placement(mgabo, TTM_PL_FLAG_VRAM | TTM_PL_FLAG_SYSTEM);</div><div class='add'>+</div><div class='add'>+	acc_size = ttm_bo_dma_acc_size(&amp;mdev-&gt;ttm.bdev, size,</div><div class='add'>+				       sizeof(struct mgag200_bo));</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_init(&amp;mdev-&gt;ttm.bdev, &amp;mgabo-&gt;bo, size,</div><div class='add'>+			  ttm_bo_type_device, &amp;mgabo-&gt;placement,</div><div class='add'>+			  align &gt;&gt; PAGE_SHIFT, 0, false, NULL, acc_size,</div><div class='add'>+			  NULL, mgag200_bo_ttm_destroy);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*pmgabo = mgabo;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 mgag200_bo_gpu_offset(struct mgag200_bo *bo)</div><div class='add'>+{</div><div class='add'>+	return bo-&gt;bo.offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgag200_bo_pin(struct mgag200_bo *bo, u32 pl_flag, u64 *gpu_addr)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	if (bo-&gt;pin_count) {</div><div class='add'>+		bo-&gt;pin_count++;</div><div class='add'>+		if (gpu_addr)</div><div class='add'>+			*gpu_addr = mgag200_bo_gpu_offset(bo);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mgag200_ttm_placement(bo, pl_flag);</div><div class='add'>+	for (i = 0; i &lt; bo-&gt;placement.num_placement; i++)</div><div class='add'>+		bo-&gt;placements[i] |= TTM_PL_FLAG_NO_EVICT;</div><div class='add'>+	ret = ttm_bo_validate(&amp;bo-&gt;bo, &amp;bo-&gt;placement, false, false, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	bo-&gt;pin_count = 1;</div><div class='add'>+	if (gpu_addr)</div><div class='add'>+		*gpu_addr = mgag200_bo_gpu_offset(bo);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgag200_bo_unpin(struct mgag200_bo *bo)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+	if (!bo-&gt;pin_count) {</div><div class='add'>+		DRM_ERROR("unpin bad %p\n", bo);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	bo-&gt;pin_count--;</div><div class='add'>+	if (bo-&gt;pin_count)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bo-&gt;placement.num_placement ; i++)</div><div class='add'>+		bo-&gt;placements[i] &amp;= ~TTM_PL_FLAG_NO_EVICT;</div><div class='add'>+	ret = ttm_bo_validate(&amp;bo-&gt;bo, &amp;bo-&gt;placement, false, false, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgag200_bo_push_sysram(struct mgag200_bo *bo)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+	if (!bo-&gt;pin_count) {</div><div class='add'>+		DRM_ERROR("unpin bad %p\n", bo);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	bo-&gt;pin_count--;</div><div class='add'>+	if (bo-&gt;pin_count)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (bo-&gt;kmap.virtual)</div><div class='add'>+		ttm_bo_kunmap(&amp;bo-&gt;kmap);</div><div class='add'>+</div><div class='add'>+	mgag200_ttm_placement(bo, TTM_PL_FLAG_SYSTEM);</div><div class='add'>+	for (i = 0; i &lt; bo-&gt;placement.num_placement ; i++)</div><div class='add'>+		bo-&gt;placements[i] |= TTM_PL_FLAG_NO_EVICT;</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_validate(&amp;bo-&gt;bo, &amp;bo-&gt;placement, false, false, false);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("pushing to VRAM failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgag200_mmap(struct file *filp, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	struct drm_file *file_priv;</div><div class='add'>+	struct mga_device *mdev;</div><div class='add'>+</div><div class='add'>+	if (unlikely(vma-&gt;vm_pgoff &lt; DRM_FILE_PAGE_OFFSET))</div><div class='add'>+		return drm_mmap(filp, vma);</div><div class='add'>+</div><div class='add'>+	file_priv = filp-&gt;private_data;</div><div class='add'>+	mdev = file_priv-&gt;minor-&gt;dev-&gt;dev_private;</div><div class='add'>+	return ttm_bo_mmap(filp, vma, &amp;mdev-&gt;ttm.bdev);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile<br/>index 1a2ad7eb1734..fe5267d06ab5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/Makefile</a></div><div class='hunk'>@@ -16,10 +16,13 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \</div><div class='ctx'>              nv04_mc.o nv40_mc.o nv50_mc.o \</div><div class='ctx'>              nv04_fb.o nv10_fb.o nv20_fb.o nv30_fb.o nv40_fb.o \</div><div class='ctx'>              nv50_fb.o nvc0_fb.o \</div><div class='del'>-             nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o nvc0_fifo.o \</div><div class='add'>+             nv04_fifo.o nv10_fifo.o nv17_fifo.o nv40_fifo.o nv50_fifo.o \</div><div class='add'>+             nv84_fifo.o nvc0_fifo.o nve0_fifo.o \</div><div class='add'>+             nv04_fence.o nv10_fence.o nv84_fence.o nvc0_fence.o \</div><div class='add'>+             nv04_software.o nv50_software.o nvc0_software.o \</div><div class='ctx'>              nv04_graph.o nv10_graph.o nv20_graph.o \</div><div class='del'>-             nv40_graph.o nv50_graph.o nvc0_graph.o \</div><div class='del'>-             nv40_grctx.o nv50_grctx.o nvc0_grctx.o \</div><div class='add'>+             nv40_graph.o nv50_graph.o nvc0_graph.o nve0_graph.o \</div><div class='add'>+             nv40_grctx.o nv50_grctx.o nvc0_grctx.o nve0_grctx.o \</div><div class='ctx'>              nv84_crypt.o nv98_crypt.o \</div><div class='ctx'>              nva3_copy.o nvc0_copy.o \</div><div class='ctx'>              nv31_mpeg.o nv50_mpeg.o \</div><div class='hunk'>@@ -37,7 +40,7 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \</div><div class='ctx'> 	     nv50_calc.o \</div><div class='ctx'> 	     nv04_pm.o nv40_pm.o nv50_pm.o nva3_pm.o nvc0_pm.o \</div><div class='ctx'> 	     nv50_vram.o nvc0_vram.o \</div><div class='del'>-	     nv50_vm.o nvc0_vm.o</div><div class='add'>+	     nv50_vm.o nvc0_vm.o nouveau_prime.o</div><div class='ctx'> </div><div class='ctx'> nouveau-$(CONFIG_DRM_NOUVEAU_DEBUG) += nouveau_debugfs.o</div><div class='ctx'> nouveau-$(CONFIG_COMPAT) += nouveau_ioc32.o</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_acpi.c b/drivers/gpu/drm/nouveau/nouveau_acpi.c<br/>index 7814a760c164..fc841e87b343 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_acpi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_acpi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_acpi.c</a></div><div class='hunk'>@@ -270,7 +270,7 @@ static bool nouveau_dsm_detect(void)</div><div class='ctx'> 	struct acpi_buffer buffer = {sizeof(acpi_method_name), acpi_method_name};</div><div class='ctx'> 	struct pci_dev *pdev = NULL;</div><div class='ctx'> 	int has_dsm = 0;</div><div class='del'>-	int has_optimus;</div><div class='add'>+	int has_optimus = 0;</div><div class='ctx'> 	int vga_count = 0;</div><div class='ctx'> 	bool guid_valid;</div><div class='ctx'> 	int retval;</div><div class='hunk'>@@ -338,7 +338,8 @@ void nouveau_switcheroo_optimus_dsm(void)</div><div class='ctx'> </div><div class='ctx'> void nouveau_unregister_dsm_handler(void)</div><div class='ctx'> {</div><div class='del'>-	vga_switcheroo_unregister_handler();</div><div class='add'>+	if (nouveau_dsm_priv.optimus_detected || nouveau_dsm_priv.dsm_detected)</div><div class='add'>+		vga_switcheroo_unregister_handler();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* retrieve the ROM in 4k blocks */</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c<br/>index 80963d05b54a..2f11e16a81a9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_bios.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_bios.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_bios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_bios.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include "nouveau_gpio.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io-mapping.h&gt;</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* these defines are made up */</div><div class='ctx'> #define NV_CIO_CRE_44_HEADA 0x0</div><div class='hunk'>@@ -195,35 +196,24 @@ static void</div><div class='ctx'> bios_shadow_acpi(struct nvbios *bios)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = bios-&gt;dev-&gt;pdev;</div><div class='del'>-	int ptr, len, ret;</div><div class='del'>-	u8 data[3];</div><div class='add'>+	int cnt = 65536 / ROM_BIOS_PAGE;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!nouveau_acpi_rom_supported(pdev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ret = nouveau_acpi_get_bios_chunk(data, 0, sizeof(data));</div><div class='del'>-	if (ret != sizeof(data))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	bios-&gt;length = min(data[2] * 512, 65536);</div><div class='del'>-	bios-&gt;data = kmalloc(bios-&gt;length, GFP_KERNEL);</div><div class='add'>+	bios-&gt;data = kmalloc(cnt * ROM_BIOS_PAGE, GFP_KERNEL);</div><div class='ctx'> 	if (!bios-&gt;data)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	len = bios-&gt;length;</div><div class='del'>-	ptr = 0;</div><div class='del'>-	while (len) {</div><div class='del'>-		int size = (len &gt; ROM_BIOS_PAGE) ? ROM_BIOS_PAGE : len;</div><div class='del'>-</div><div class='del'>-		ret = nouveau_acpi_get_bios_chunk(bios-&gt;data, ptr, size);</div><div class='del'>-		if (ret != size) {</div><div class='del'>-			kfree(bios-&gt;data);</div><div class='del'>-			bios-&gt;data = NULL;</div><div class='add'>+	bios-&gt;length = 0;</div><div class='add'>+	while (cnt--) {</div><div class='add'>+		ret = nouveau_acpi_get_bios_chunk(bios-&gt;data, bios-&gt;length,</div><div class='add'>+						  ROM_BIOS_PAGE);</div><div class='add'>+		if (ret != ROM_BIOS_PAGE)</div><div class='ctx'> 			return;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='del'>-		len -= size;</div><div class='del'>-		ptr += size;</div><div class='add'>+		bios-&gt;length += ROM_BIOS_PAGE;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -249,8 +239,12 @@ bios_shadow(struct drm_device *dev)</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nvbios *bios = &amp;dev_priv-&gt;vbios;</div><div class='ctx'> 	struct methods *mthd, *best;</div><div class='add'>+	const struct firmware *fw;</div><div class='add'>+	char fname[32];</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (nouveau_vbios) {</div><div class='add'>+		/* try to match one of the built-in methods */</div><div class='ctx'> 		mthd = shadow_methods;</div><div class='ctx'> 		do {</div><div class='ctx'> 			if (strcasecmp(nouveau_vbios, mthd-&gt;desc))</div><div class='hunk'>@@ -263,6 +257,22 @@ bios_shadow(struct drm_device *dev)</div><div class='ctx'> 				return true;</div><div class='ctx'> 		} while ((++mthd)-&gt;shadow);</div><div class='ctx'> </div><div class='add'>+		/* attempt to load firmware image */</div><div class='add'>+		snprintf(fname, sizeof(fname), "nouveau/%s", nouveau_vbios);</div><div class='add'>+		ret = request_firmware(&amp;fw, fname, &amp;dev-&gt;pdev-&gt;dev);</div><div class='add'>+		if (ret == 0) {</div><div class='add'>+			bios-&gt;length = fw-&gt;size;</div><div class='add'>+			bios-&gt;data   = kmemdup(fw-&gt;data, fw-&gt;size, GFP_KERNEL);</div><div class='add'>+			release_firmware(fw);</div><div class='add'>+</div><div class='add'>+			NV_INFO(dev, "VBIOS image: %s\n", nouveau_vbios);</div><div class='add'>+			if (score_vbios(bios, 1))</div><div class='add'>+				return true;</div><div class='add'>+</div><div class='add'>+			kfree(bios-&gt;data);</div><div class='add'>+			bios-&gt;data = NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		NV_ERROR(dev, "VBIOS source \'%s\' invalid\n", nouveau_vbios);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -273,6 +283,7 @@ bios_shadow(struct drm_device *dev)</div><div class='ctx'> 		mthd-&gt;score = score_vbios(bios, mthd-&gt;rw);</div><div class='ctx'> 		mthd-&gt;size = bios-&gt;length;</div><div class='ctx'> 		mthd-&gt;data = bios-&gt;data;</div><div class='add'>+		bios-&gt;data = NULL;</div><div class='ctx'> 	} while (mthd-&gt;score != 3 &amp;&amp; (++mthd)-&gt;shadow);</div><div class='ctx'> </div><div class='ctx'> 	mthd = shadow_methods;</div><div class='hunk'>@@ -6156,10 +6167,14 @@ dcb_fake_connectors(struct nvbios *bios)</div><div class='ctx'> </div><div class='ctx'> 	/* heuristic: if we ever get a non-zero connector field, assume</div><div class='ctx'> 	 * that all the indices are valid and we don't need fake them.</div><div class='add'>+	 *</div><div class='add'>+	 * and, as usual, a blacklist of boards with bad bios data..</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; dcbt-&gt;entries; i++) {</div><div class='del'>-		if (dcbt-&gt;entry[i].connector)</div><div class='del'>-			return;</div><div class='add'>+	if (!nv_match_device(bios-&gt;dev, 0x0392, 0x107d, 0x20a2)) {</div><div class='add'>+		for (i = 0; i &lt; dcbt-&gt;entries; i++) {</div><div class='add'>+			if (dcbt-&gt;entry[i].connector)</div><div class='add'>+				return;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* no useful connector info available, we need to make it up</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c<br/>index 7d15a774f9c9..7f80ed523562 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_bo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_bo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_bo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_bo.c</a></div><div class='hunk'>@@ -35,6 +35,8 @@</div><div class='ctx'> #include "nouveau_dma.h"</div><div class='ctx'> #include "nouveau_mm.h"</div><div class='ctx'> #include "nouveau_vm.h"</div><div class='add'>+#include "nouveau_fence.h"</div><div class='add'>+#include "nouveau_ramht.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/log2.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -89,12 +91,17 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,</div><div class='ctx'> int</div><div class='ctx'> nouveau_bo_new(struct drm_device *dev, int size, int align,</div><div class='ctx'> 	       uint32_t flags, uint32_t tile_mode, uint32_t tile_flags,</div><div class='add'>+	       struct sg_table *sg,</div><div class='ctx'> 	       struct nouveau_bo **pnvbo)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_bo *nvbo;</div><div class='ctx'> 	size_t acc_size;</div><div class='ctx'> 	int ret;</div><div class='add'>+	int type = ttm_bo_type_device;</div><div class='add'>+</div><div class='add'>+	if (sg)</div><div class='add'>+		type = ttm_bo_type_sg;</div><div class='ctx'> </div><div class='ctx'> 	nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);</div><div class='ctx'> 	if (!nvbo)</div><div class='hunk'>@@ -120,8 +127,8 @@ nouveau_bo_new(struct drm_device *dev, int size, int align,</div><div class='ctx'> 				       sizeof(struct nouveau_bo));</div><div class='ctx'> </div><div class='ctx'> 	ret = ttm_bo_init(&amp;dev_priv-&gt;ttm.bdev, &amp;nvbo-&gt;bo, size,</div><div class='del'>-			  ttm_bo_type_device, &amp;nvbo-&gt;placement,</div><div class='del'>-			  align &gt;&gt; PAGE_SHIFT, 0, false, NULL, acc_size,</div><div class='add'>+			  type, &amp;nvbo-&gt;placement,</div><div class='add'>+			  align &gt;&gt; PAGE_SHIFT, 0, false, NULL, acc_size, sg,</div><div class='ctx'> 			  nouveau_bo_del_ttm);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		/* ttm will call nouveau_bo_del_ttm if it fails.. */</div><div class='hunk'>@@ -473,7 +480,7 @@ nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,</div><div class='ctx'> 	struct nouveau_fence *fence = NULL;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = nouveau_fence_new(chan, &amp;fence, true);</div><div class='add'>+	ret = nouveau_fence_new(chan, &amp;fence);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -484,6 +491,76 @@ nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='add'>+nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='add'>+		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_mem *node = old_mem-&gt;mm_node;</div><div class='add'>+	int ret = RING_SPACE(chan, 10);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		BEGIN_NVC0(chan, NvSubCopy, 0x0400, 8);</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(node-&gt;vma[0].offset));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(node-&gt;vma[0].offset));</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(node-&gt;vma[1].offset));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(node-&gt;vma[1].offset));</div><div class='add'>+		OUT_RING  (chan, PAGE_SIZE);</div><div class='add'>+		OUT_RING  (chan, PAGE_SIZE);</div><div class='add'>+		OUT_RING  (chan, PAGE_SIZE);</div><div class='add'>+		OUT_RING  (chan, new_mem-&gt;num_pages);</div><div class='add'>+		BEGIN_IMC0(chan, NvSubCopy, 0x0300, 0x0386);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nvc0_bo_move_init(struct nouveau_channel *chan, u32 handle)</div><div class='add'>+{</div><div class='add'>+	int ret = RING_SPACE(chan, 2);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		BEGIN_NVC0(chan, NvSubCopy, 0x0000, 1);</div><div class='add'>+		OUT_RING  (chan, handle);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nvc0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='add'>+		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_mem *node = old_mem-&gt;mm_node;</div><div class='add'>+	u64 src_offset = node-&gt;vma[0].offset;</div><div class='add'>+	u64 dst_offset = node-&gt;vma[1].offset;</div><div class='add'>+	u32 page_count = new_mem-&gt;num_pages;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	page_count = new_mem-&gt;num_pages;</div><div class='add'>+	while (page_count) {</div><div class='add'>+		int line_count = (page_count &gt; 8191) ? 8191 : page_count;</div><div class='add'>+</div><div class='add'>+		ret = RING_SPACE(chan, 11);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		BEGIN_NVC0(chan, NvSubCopy, 0x030c, 8);</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(src_offset));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(src_offset));</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(dst_offset));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(dst_offset));</div><div class='add'>+		OUT_RING  (chan, PAGE_SIZE);</div><div class='add'>+		OUT_RING  (chan, PAGE_SIZE);</div><div class='add'>+		OUT_RING  (chan, PAGE_SIZE);</div><div class='add'>+		OUT_RING  (chan, line_count);</div><div class='add'>+		BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1);</div><div class='add'>+		OUT_RING  (chan, 0x00000110);</div><div class='add'>+</div><div class='add'>+		page_count -= line_count;</div><div class='add'>+		src_offset += (PAGE_SIZE * line_count);</div><div class='add'>+		dst_offset += (PAGE_SIZE * line_count);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='ctx'> nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)</div><div class='ctx'> {</div><div class='hunk'>@@ -501,17 +578,17 @@ nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0238, 2);</div><div class='add'>+		BEGIN_NVC0(chan, NvSubCopy, 0x0238, 2);</div><div class='ctx'> 		OUT_RING  (chan, upper_32_bits(dst_offset));</div><div class='ctx'> 		OUT_RING  (chan, lower_32_bits(dst_offset));</div><div class='del'>-		BEGIN_NVC0(chan, 2, NvSubM2MF, 0x030c, 6);</div><div class='add'>+		BEGIN_NVC0(chan, NvSubCopy, 0x030c, 6);</div><div class='ctx'> 		OUT_RING  (chan, upper_32_bits(src_offset));</div><div class='ctx'> 		OUT_RING  (chan, lower_32_bits(src_offset));</div><div class='ctx'> 		OUT_RING  (chan, PAGE_SIZE); /* src_pitch */</div><div class='ctx'> 		OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */</div><div class='ctx'> 		OUT_RING  (chan, PAGE_SIZE); /* line_length */</div><div class='ctx'> 		OUT_RING  (chan, line_count);</div><div class='del'>-		BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0300, 1);</div><div class='add'>+		BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1);</div><div class='ctx'> 		OUT_RING  (chan, 0x00100110);</div><div class='ctx'> </div><div class='ctx'> 		page_count -= line_count;</div><div class='hunk'>@@ -523,6 +600,102 @@ nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='add'>+nva3_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='add'>+		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_mem *node = old_mem-&gt;mm_node;</div><div class='add'>+	u64 src_offset = node-&gt;vma[0].offset;</div><div class='add'>+	u64 dst_offset = node-&gt;vma[1].offset;</div><div class='add'>+	u32 page_count = new_mem-&gt;num_pages;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	page_count = new_mem-&gt;num_pages;</div><div class='add'>+	while (page_count) {</div><div class='add'>+		int line_count = (page_count &gt; 8191) ? 8191 : page_count;</div><div class='add'>+</div><div class='add'>+		ret = RING_SPACE(chan, 11);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		BEGIN_NV04(chan, NvSubCopy, 0x030c, 8);</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(src_offset));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(src_offset));</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(dst_offset));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(dst_offset));</div><div class='add'>+		OUT_RING  (chan, PAGE_SIZE);</div><div class='add'>+		OUT_RING  (chan, PAGE_SIZE);</div><div class='add'>+		OUT_RING  (chan, PAGE_SIZE);</div><div class='add'>+		OUT_RING  (chan, line_count);</div><div class='add'>+		BEGIN_NV04(chan, NvSubCopy, 0x0300, 1);</div><div class='add'>+		OUT_RING  (chan, 0x00000110);</div><div class='add'>+</div><div class='add'>+		page_count -= line_count;</div><div class='add'>+		src_offset += (PAGE_SIZE * line_count);</div><div class='add'>+		dst_offset += (PAGE_SIZE * line_count);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv98_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='add'>+		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_mem *node = old_mem-&gt;mm_node;</div><div class='add'>+	int ret = RING_SPACE(chan, 7);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		BEGIN_NV04(chan, NvSubCopy, 0x0320, 6);</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(node-&gt;vma[0].offset));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(node-&gt;vma[0].offset));</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(node-&gt;vma[1].offset));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(node-&gt;vma[1].offset));</div><div class='add'>+		OUT_RING  (chan, 0x00000000 /* COPY */);</div><div class='add'>+		OUT_RING  (chan, new_mem-&gt;num_pages &lt;&lt; PAGE_SHIFT);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv84_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='add'>+		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_mem *node = old_mem-&gt;mm_node;</div><div class='add'>+	int ret = RING_SPACE(chan, 7);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		BEGIN_NV04(chan, NvSubCopy, 0x0304, 6);</div><div class='add'>+		OUT_RING  (chan, new_mem-&gt;num_pages &lt;&lt; PAGE_SHIFT);</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(node-&gt;vma[0].offset));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(node-&gt;vma[0].offset));</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(node-&gt;vma[1].offset));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(node-&gt;vma[1].offset));</div><div class='add'>+		OUT_RING  (chan, 0x00000000 /* MODE_COPY, QUERY_NONE */);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv50_bo_move_init(struct nouveau_channel *chan, u32 handle)</div><div class='add'>+{</div><div class='add'>+	int ret = nouveau_notifier_alloc(chan, NvNotify0, 32, 0xfe0, 0x1000,</div><div class='add'>+					 &amp;chan-&gt;m2mf_ntfy);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		ret = RING_SPACE(chan, 6);</div><div class='add'>+		if (ret == 0) {</div><div class='add'>+			BEGIN_NV04(chan, NvSubCopy, 0x0000, 1);</div><div class='add'>+			OUT_RING  (chan, handle);</div><div class='add'>+			BEGIN_NV04(chan, NvSubCopy, 0x0180, 3);</div><div class='add'>+			OUT_RING  (chan, NvNotify0);</div><div class='add'>+			OUT_RING  (chan, NvDmaFB);</div><div class='add'>+			OUT_RING  (chan, NvDmaFB);</div><div class='add'>+		} else {</div><div class='add'>+			nouveau_ramht_remove(chan, NvNotify0);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='ctx'> nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 		  struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)</div><div class='ctx'> {</div><div class='hunk'>@@ -546,7 +719,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='ctx'> </div><div class='del'>-			BEGIN_RING(chan, NvSubM2MF, 0x0200, 7);</div><div class='add'>+			BEGIN_NV04(chan, NvSubCopy, 0x0200, 7);</div><div class='ctx'> 			OUT_RING  (chan, 0);</div><div class='ctx'> 			OUT_RING  (chan, 0);</div><div class='ctx'> 			OUT_RING  (chan, stride);</div><div class='hunk'>@@ -559,7 +732,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='ctx'> </div><div class='del'>-			BEGIN_RING(chan, NvSubM2MF, 0x0200, 1);</div><div class='add'>+			BEGIN_NV04(chan, NvSubCopy, 0x0200, 1);</div><div class='ctx'> 			OUT_RING  (chan, 1);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (old_mem-&gt;mem_type == TTM_PL_VRAM &amp;&amp;</div><div class='hunk'>@@ -568,7 +741,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='ctx'> </div><div class='del'>-			BEGIN_RING(chan, NvSubM2MF, 0x021c, 7);</div><div class='add'>+			BEGIN_NV04(chan, NvSubCopy, 0x021c, 7);</div><div class='ctx'> 			OUT_RING  (chan, 0);</div><div class='ctx'> 			OUT_RING  (chan, 0);</div><div class='ctx'> 			OUT_RING  (chan, stride);</div><div class='hunk'>@@ -581,7 +754,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='ctx'> </div><div class='del'>-			BEGIN_RING(chan, NvSubM2MF, 0x021c, 1);</div><div class='add'>+			BEGIN_NV04(chan, NvSubCopy, 0x021c, 1);</div><div class='ctx'> 			OUT_RING  (chan, 1);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -589,10 +762,10 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		BEGIN_RING(chan, NvSubM2MF, 0x0238, 2);</div><div class='add'>+		BEGIN_NV04(chan, NvSubCopy, 0x0238, 2);</div><div class='ctx'> 		OUT_RING  (chan, upper_32_bits(src_offset));</div><div class='ctx'> 		OUT_RING  (chan, upper_32_bits(dst_offset));</div><div class='del'>-		BEGIN_RING(chan, NvSubM2MF, 0x030c, 8);</div><div class='add'>+		BEGIN_NV04(chan, NvSubCopy, 0x030c, 8);</div><div class='ctx'> 		OUT_RING  (chan, lower_32_bits(src_offset));</div><div class='ctx'> 		OUT_RING  (chan, lower_32_bits(dst_offset));</div><div class='ctx'> 		OUT_RING  (chan, stride);</div><div class='hunk'>@@ -601,7 +774,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 		OUT_RING  (chan, height);</div><div class='ctx'> 		OUT_RING  (chan, 0x00000101);</div><div class='ctx'> 		OUT_RING  (chan, 0x00000000);</div><div class='del'>-		BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);</div><div class='add'>+		BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);</div><div class='ctx'> 		OUT_RING  (chan, 0);</div><div class='ctx'> </div><div class='ctx'> 		length -= amount;</div><div class='hunk'>@@ -612,6 +785,24 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+nv04_bo_move_init(struct nouveau_channel *chan, u32 handle)</div><div class='add'>+{</div><div class='add'>+	int ret = nouveau_notifier_alloc(chan, NvNotify0, 32, 0xfe0, 0x1000,</div><div class='add'>+					 &amp;chan-&gt;m2mf_ntfy);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		ret = RING_SPACE(chan, 4);</div><div class='add'>+		if (ret == 0) {</div><div class='add'>+			BEGIN_NV04(chan, NvSubCopy, 0x0000, 1);</div><div class='add'>+			OUT_RING  (chan, handle);</div><div class='add'>+			BEGIN_NV04(chan, NvSubCopy, 0x0180, 1);</div><div class='add'>+			OUT_RING  (chan, NvNotify0);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline uint32_t</div><div class='ctx'> nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo,</div><div class='ctx'> 		      struct nouveau_channel *chan, struct ttm_mem_reg *mem)</div><div class='hunk'>@@ -634,7 +825,7 @@ nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);</div><div class='add'>+	BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);</div><div class='ctx'> 	OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, old_mem));</div><div class='ctx'> 	OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, new_mem));</div><div class='ctx'> </div><div class='hunk'>@@ -646,7 +837,7 @@ nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		BEGIN_RING(chan, NvSubM2MF,</div><div class='add'>+		BEGIN_NV04(chan, NvSubCopy,</div><div class='ctx'> 				 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);</div><div class='ctx'> 		OUT_RING  (chan, src_offset);</div><div class='ctx'> 		OUT_RING  (chan, dst_offset);</div><div class='hunk'>@@ -656,7 +847,7 @@ nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,</div><div class='ctx'> 		OUT_RING  (chan, line_count);</div><div class='ctx'> 		OUT_RING  (chan, 0x00000101);</div><div class='ctx'> 		OUT_RING  (chan, 0x00000000);</div><div class='del'>-		BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);</div><div class='add'>+		BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);</div><div class='ctx'> 		OUT_RING  (chan, 0);</div><div class='ctx'> </div><div class='ctx'> 		page_count -= line_count;</div><div class='hunk'>@@ -716,13 +907,7 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dev_priv-&gt;card_type &lt; NV_50)</div><div class='del'>-		ret = nv04_bo_move_m2mf(chan, bo, &amp;bo-&gt;mem, new_mem);</div><div class='del'>-	else</div><div class='del'>-	if (dev_priv-&gt;card_type &lt; NV_C0)</div><div class='del'>-		ret = nv50_bo_move_m2mf(chan, bo, &amp;bo-&gt;mem, new_mem);</div><div class='del'>-	else</div><div class='del'>-		ret = nvc0_bo_move_m2mf(chan, bo, &amp;bo-&gt;mem, new_mem);</div><div class='add'>+	ret = dev_priv-&gt;ttm.move(chan, bo, &amp;bo-&gt;mem, new_mem);</div><div class='ctx'> 	if (ret == 0) {</div><div class='ctx'> 		ret = nouveau_bo_move_accel_cleanup(chan, nvbo, evict,</div><div class='ctx'> 						    no_wait_reserve,</div><div class='hunk'>@@ -734,6 +919,49 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void</div><div class='add'>+nouveau_bo_move_init(struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = chan-&gt;dev-&gt;dev_private;</div><div class='add'>+	static const struct {</div><div class='add'>+		const char *name;</div><div class='add'>+		int engine;</div><div class='add'>+		u32 oclass;</div><div class='add'>+		int (*exec)(struct nouveau_channel *,</div><div class='add'>+			    struct ttm_buffer_object *,</div><div class='add'>+			    struct ttm_mem_reg *, struct ttm_mem_reg *);</div><div class='add'>+		int (*init)(struct nouveau_channel *, u32 handle);</div><div class='add'>+	} _methods[] = {</div><div class='add'>+		{  "COPY", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },</div><div class='add'>+		{ "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },</div><div class='add'>+		{ "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },</div><div class='add'>+		{  "COPY", 0, 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },</div><div class='add'>+		{ "CRYPT", 0, 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },</div><div class='add'>+		{  "M2MF", 0, 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },</div><div class='add'>+		{  "M2MF", 0, 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },</div><div class='add'>+		{  "M2MF", 0, 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },</div><div class='add'>+		{},</div><div class='add'>+		{ "CRYPT", 0, 0x88b4, nv98_bo_move_exec, nv50_bo_move_init },</div><div class='add'>+	}, *mthd = _methods;</div><div class='add'>+	const char *name = "CPU";</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		u32 handle = (mthd-&gt;engine &lt;&lt; 16) | mthd-&gt;oclass;</div><div class='add'>+		ret = nouveau_gpuobj_gr_new(chan, handle, mthd-&gt;oclass);</div><div class='add'>+		if (ret == 0) {</div><div class='add'>+			ret = mthd-&gt;init(chan, handle);</div><div class='add'>+			if (ret == 0) {</div><div class='add'>+				dev_priv-&gt;ttm.move = mthd-&gt;exec;</div><div class='add'>+				name = mthd-&gt;name;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} while ((++mthd)-&gt;exec);</div><div class='add'>+</div><div class='add'>+	NV_INFO(chan-&gt;dev, "MM: using %s for buffer copies\n", name);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,</div><div class='ctx'> 		      bool no_wait_reserve, bool no_wait_gpu,</div><div class='hunk'>@@ -817,9 +1045,14 @@ nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem)</div><div class='ctx'> 		} else</div><div class='ctx'> 		if (new_mem &amp;&amp; new_mem-&gt;mem_type == TTM_PL_TT &amp;&amp;</div><div class='ctx'> 		    nvbo-&gt;page_shift == vma-&gt;vm-&gt;spg_shift) {</div><div class='del'>-			nouveau_vm_map_sg(vma, 0, new_mem-&gt;</div><div class='del'>-					  num_pages &lt;&lt; PAGE_SHIFT,</div><div class='del'>-					  new_mem-&gt;mm_node);</div><div class='add'>+			if (((struct nouveau_mem *)new_mem-&gt;mm_node)-&gt;sg)</div><div class='add'>+				nouveau_vm_map_sg_table(vma, 0, new_mem-&gt;</div><div class='add'>+						  num_pages &lt;&lt; PAGE_SHIFT,</div><div class='add'>+						  new_mem-&gt;mm_node);</div><div class='add'>+			else</div><div class='add'>+				nouveau_vm_map_sg(vma, 0, new_mem-&gt;</div><div class='add'>+						  num_pages &lt;&lt; PAGE_SHIFT,</div><div class='add'>+						  new_mem-&gt;mm_node);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			nouveau_vm_unmap(vma);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -885,8 +1118,8 @@ nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Software copy if the card isn't up and running yet. */</div><div class='del'>-	if (!dev_priv-&gt;channel) {</div><div class='add'>+	/* CPU copy if we have no accelerated method available */</div><div class='add'>+	if (!dev_priv-&gt;ttm.move) {</div><div class='ctx'> 		ret = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1030,26 +1263,10 @@ nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)</div><div class='ctx'> </div><div class='ctx'> 	nvbo-&gt;placement.fpfn = 0;</div><div class='ctx'> 	nvbo-&gt;placement.lpfn = dev_priv-&gt;fb_mappable_pages;</div><div class='del'>-	nouveau_bo_placement_set(nvbo, TTM_PL_VRAM, 0);</div><div class='add'>+	nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_VRAM, 0);</div><div class='ctx'> 	return nouveau_bo_validate(nvbo, false, true, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void</div><div class='del'>-nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence)</div><div class='del'>-{</div><div class='del'>-	struct nouveau_fence *old_fence;</div><div class='del'>-</div><div class='del'>-	if (likely(fence))</div><div class='del'>-		nouveau_fence_ref(fence);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;nvbo-&gt;bo.bdev-&gt;fence_lock);</div><div class='del'>-	old_fence = nvbo-&gt;bo.sync_obj;</div><div class='del'>-	nvbo-&gt;bo.sync_obj = fence;</div><div class='del'>-	spin_unlock(&amp;nvbo-&gt;bo.bdev-&gt;fence_lock);</div><div class='del'>-</div><div class='del'>-	nouveau_fence_unref(&amp;old_fence);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int</div><div class='ctx'> nouveau_ttm_tt_populate(struct ttm_tt *ttm)</div><div class='ctx'> {</div><div class='hunk'>@@ -1058,10 +1275,19 @@ nouveau_ttm_tt_populate(struct ttm_tt *ttm)</div><div class='ctx'> 	struct drm_device *dev;</div><div class='ctx'> 	unsigned i;</div><div class='ctx'> 	int r;</div><div class='add'>+	bool slave = !!(ttm-&gt;page_flags &amp; TTM_PAGE_FLAG_SG);</div><div class='ctx'> </div><div class='ctx'> 	if (ttm-&gt;state != tt_unpopulated)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (slave &amp;&amp; ttm-&gt;sg) {</div><div class='add'>+		/* make userspace faulting work */</div><div class='add'>+		drm_prime_sg_to_page_addr_arrays(ttm-&gt;sg, ttm-&gt;pages,</div><div class='add'>+						 ttm_dma-&gt;dma_address, ttm-&gt;num_pages);</div><div class='add'>+		ttm-&gt;state = tt_unbound;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	dev_priv = nouveau_bdev(ttm-&gt;bdev);</div><div class='ctx'> 	dev = dev_priv-&gt;dev;</div><div class='ctx'> </div><div class='hunk'>@@ -1106,6 +1332,10 @@ nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm)</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv;</div><div class='ctx'> 	struct drm_device *dev;</div><div class='ctx'> 	unsigned i;</div><div class='add'>+	bool slave = !!(ttm-&gt;page_flags &amp; TTM_PAGE_FLAG_SG);</div><div class='add'>+</div><div class='add'>+	if (slave)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	dev_priv = nouveau_bdev(ttm-&gt;bdev);</div><div class='ctx'> 	dev = dev_priv-&gt;dev;</div><div class='hunk'>@@ -1134,6 +1364,52 @@ nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm)</div><div class='ctx'> 	ttm_pool_unpopulate(ttm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void</div><div class='add'>+nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_fence *old_fence = NULL;</div><div class='add'>+</div><div class='add'>+	if (likely(fence))</div><div class='add'>+		nouveau_fence_ref(fence);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;nvbo-&gt;bo.bdev-&gt;fence_lock);</div><div class='add'>+	old_fence = nvbo-&gt;bo.sync_obj;</div><div class='add'>+	nvbo-&gt;bo.sync_obj = fence;</div><div class='add'>+	spin_unlock(&amp;nvbo-&gt;bo.bdev-&gt;fence_lock);</div><div class='add'>+</div><div class='add'>+	nouveau_fence_unref(&amp;old_fence);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nouveau_bo_fence_unref(void **sync_obj)</div><div class='add'>+{</div><div class='add'>+	nouveau_fence_unref((struct nouveau_fence **)sync_obj);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *</div><div class='add'>+nouveau_bo_fence_ref(void *sync_obj)</div><div class='add'>+{</div><div class='add'>+	return nouveau_fence_ref(sync_obj);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+nouveau_bo_fence_signalled(void *sync_obj, void *sync_arg)</div><div class='add'>+{</div><div class='add'>+	return nouveau_fence_done(sync_obj);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nouveau_bo_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)</div><div class='add'>+{</div><div class='add'>+	return nouveau_fence_wait(sync_obj, lazy, intr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nouveau_bo_fence_flush(void *sync_obj, void *sync_arg)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct ttm_bo_driver nouveau_bo_driver = {</div><div class='ctx'> 	.ttm_tt_create = &amp;nouveau_ttm_tt_create,</div><div class='ctx'> 	.ttm_tt_populate = &amp;nouveau_ttm_tt_populate,</div><div class='hunk'>@@ -1144,11 +1420,11 @@ struct ttm_bo_driver nouveau_bo_driver = {</div><div class='ctx'> 	.move_notify = nouveau_bo_move_ntfy,</div><div class='ctx'> 	.move = nouveau_bo_move,</div><div class='ctx'> 	.verify_access = nouveau_bo_verify_access,</div><div class='del'>-	.sync_obj_signaled = __nouveau_fence_signalled,</div><div class='del'>-	.sync_obj_wait = __nouveau_fence_wait,</div><div class='del'>-	.sync_obj_flush = __nouveau_fence_flush,</div><div class='del'>-	.sync_obj_unref = __nouveau_fence_unref,</div><div class='del'>-	.sync_obj_ref = __nouveau_fence_ref,</div><div class='add'>+	.sync_obj_signaled = nouveau_bo_fence_signalled,</div><div class='add'>+	.sync_obj_wait = nouveau_bo_fence_wait,</div><div class='add'>+	.sync_obj_flush = nouveau_bo_fence_flush,</div><div class='add'>+	.sync_obj_unref = nouveau_bo_fence_unref,</div><div class='add'>+	.sync_obj_ref = nouveau_bo_fence_ref,</div><div class='ctx'> 	.fault_reserve_notify = &amp;nouveau_ttm_fault_reserve_notify,</div><div class='ctx'> 	.io_mem_reserve = &amp;nouveau_ttm_io_mem_reserve,</div><div class='ctx'> 	.io_mem_free = &amp;nouveau_ttm_io_mem_free,</div><div class='hunk'>@@ -1181,9 +1457,12 @@ nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm,</div><div class='ctx'> </div><div class='ctx'> 	if (nvbo-&gt;bo.mem.mem_type == TTM_PL_VRAM)</div><div class='ctx'> 		nouveau_vm_map(vma, nvbo-&gt;bo.mem.mm_node);</div><div class='del'>-	else</div><div class='del'>-	if (nvbo-&gt;bo.mem.mem_type == TTM_PL_TT)</div><div class='del'>-		nouveau_vm_map_sg(vma, 0, size, node);</div><div class='add'>+	else if (nvbo-&gt;bo.mem.mem_type == TTM_PL_TT) {</div><div class='add'>+		if (node-&gt;sg)</div><div class='add'>+			nouveau_vm_map_sg_table(vma, 0, size, node);</div><div class='add'>+		else</div><div class='add'>+			nouveau_vm_map_sg(vma, 0, size, node);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	list_add_tail(&amp;vma-&gt;head, &amp;nvbo-&gt;vma_list);</div><div class='ctx'> 	vma-&gt;refcount = 1;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c<br/>index 846afb0bfef4..629d8a2df5bd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_channel.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_channel.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_channel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_channel.c</a></div><div class='hunk'>@@ -27,7 +27,10 @@</div><div class='ctx'> #include "nouveau_drv.h"</div><div class='ctx'> #include "nouveau_drm.h"</div><div class='ctx'> #include "nouveau_dma.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> #include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_fence.h"</div><div class='add'>+#include "nouveau_software.h"</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> nouveau_channel_pushbuf_init(struct nouveau_channel *chan)</div><div class='hunk'>@@ -38,7 +41,7 @@ nouveau_channel_pushbuf_init(struct nouveau_channel *chan)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* allocate buffer object */</div><div class='del'>-	ret = nouveau_bo_new(dev, 65536, 0, mem, 0, 0, &amp;chan-&gt;pushbuf_bo);</div><div class='add'>+	ret = nouveau_bo_new(dev, 65536, 0, mem, 0, 0, NULL, &amp;chan-&gt;pushbuf_bo);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -117,8 +120,9 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,</div><div class='ctx'> 		      struct drm_file *file_priv,</div><div class='ctx'> 		      uint32_t vram_handle, uint32_t gart_handle)</div><div class='ctx'> {</div><div class='add'>+	struct nouveau_exec_engine *fence = nv_engine(dev, NVOBJ_ENGINE_FENCE);</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='ctx'> 	struct nouveau_fpriv *fpriv = nouveau_fpriv(file_priv);</div><div class='ctx'> 	struct nouveau_channel *chan;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -155,10 +159,6 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	NV_DEBUG(dev, "initialising channel %d\n", chan-&gt;id);</div><div class='del'>-	INIT_LIST_HEAD(&amp;chan-&gt;nvsw.vbl_wait);</div><div class='del'>-	INIT_LIST_HEAD(&amp;chan-&gt;nvsw.flip);</div><div class='del'>-	INIT_LIST_HEAD(&amp;chan-&gt;fence.pending);</div><div class='del'>-	spin_lock_init(&amp;chan-&gt;fence.lock);</div><div class='ctx'> </div><div class='ctx'> 	/* setup channel's memory and vm */</div><div class='ctx'> 	ret = nouveau_gpuobj_channel_init(chan, vram_handle, gart_handle);</div><div class='hunk'>@@ -188,20 +188,15 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,</div><div class='ctx'> 	chan-&gt;user_put = 0x40;</div><div class='ctx'> 	chan-&gt;user_get = 0x44;</div><div class='ctx'> 	if (dev_priv-&gt;card_type &gt;= NV_50)</div><div class='del'>-                chan-&gt;user_get_hi = 0x60;</div><div class='add'>+		chan-&gt;user_get_hi = 0x60;</div><div class='ctx'> </div><div class='del'>-	/* disable the fifo caches */</div><div class='del'>-	pfifo-&gt;reassign(dev, false);</div><div class='del'>-</div><div class='del'>-	/* Construct initial RAMFC for new channel */</div><div class='del'>-	ret = pfifo-&gt;create_context(chan);</div><div class='add'>+	/* create fifo context */</div><div class='add'>+	ret = pfifo-&gt;base.context_new(chan, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		nouveau_channel_put(&amp;chan);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pfifo-&gt;reassign(dev, true);</div><div class='del'>-</div><div class='ctx'> 	/* Insert NOPs for NOUVEAU_DMA_SKIPS */</div><div class='ctx'> 	ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -211,9 +206,28 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; NOUVEAU_DMA_SKIPS; i++)</div><div class='ctx'> 		OUT_RING  (chan, 0x00000000);</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_gr_new(chan, NvSw, nouveau_software_class(dev));</div><div class='add'>+	if (ret) {</div><div class='add'>+		nouveau_channel_put(&amp;chan);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;card_type &lt; NV_C0) {</div><div class='add'>+		ret = RING_SPACE(chan, 2);</div><div class='add'>+		if (ret) {</div><div class='add'>+			nouveau_channel_put(&amp;chan);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		BEGIN_NV04(chan, NvSubSw, NV01_SUBCHAN_OBJECT, 1);</div><div class='add'>+		OUT_RING  (chan, NvSw);</div><div class='add'>+		FIRE_RING (chan);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	FIRE_RING(chan);</div><div class='ctx'> </div><div class='del'>-	ret = nouveau_fence_channel_init(chan);</div><div class='add'>+	ret = fence-&gt;context_new(chan, NVOBJ_ENGINE_FENCE);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		nouveau_channel_put(&amp;chan);</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -268,7 +282,6 @@ nouveau_channel_put_unlocked(struct nouveau_channel **pchan)</div><div class='ctx'> 	struct nouveau_channel *chan = *pchan;</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -285,24 +298,12 @@ nouveau_channel_put_unlocked(struct nouveau_channel **pchan)</div><div class='ctx'> 	/* give it chance to idle */</div><div class='ctx'> 	nouveau_channel_idle(chan);</div><div class='ctx'> </div><div class='del'>-	/* ensure all outstanding fences are signaled.  they should be if the</div><div class='del'>-	 * above attempts at idling were OK, but if we failed this'll tell TTM</div><div class='del'>-	 * we're done with the buffers.</div><div class='del'>-	 */</div><div class='del'>-	nouveau_fence_channel_fini(chan);</div><div class='del'>-</div><div class='del'>-	/* boot it off the hardware */</div><div class='del'>-	pfifo-&gt;reassign(dev, false);</div><div class='del'>-</div><div class='ctx'> 	/* destroy the engine specific contexts */</div><div class='del'>-	pfifo-&gt;destroy_context(chan);</div><div class='del'>-	for (i = 0; i &lt; NVOBJ_ENGINE_NR; i++) {</div><div class='add'>+	for (i = NVOBJ_ENGINE_NR - 1; i &gt;= 0; i--) {</div><div class='ctx'> 		if (chan-&gt;engctx[i])</div><div class='ctx'> 			dev_priv-&gt;eng[i]-&gt;context_del(chan, i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pfifo-&gt;reassign(dev, true);</div><div class='del'>-</div><div class='ctx'> 	/* aside from its resources, the channel should now be dead,</div><div class='ctx'> 	 * remove it from the channel list</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -354,38 +355,37 @@ nouveau_channel_ref(struct nouveau_channel *chan,</div><div class='ctx'> 	*pchan = chan;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void</div><div class='add'>+int</div><div class='ctx'> nouveau_channel_idle(struct nouveau_channel *chan)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct nouveau_fence *fence = NULL;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	nouveau_fence_update(chan);</div><div class='del'>-</div><div class='del'>-	if (chan-&gt;fence.sequence != chan-&gt;fence.sequence_ack) {</div><div class='del'>-		ret = nouveau_fence_new(chan, &amp;fence, true);</div><div class='del'>-		if (!ret) {</div><div class='del'>-			ret = nouveau_fence_wait(fence, false, false);</div><div class='del'>-			nouveau_fence_unref(&amp;fence);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (ret)</div><div class='del'>-			NV_ERROR(dev, "Failed to idle channel %d.\n", chan-&gt;id);</div><div class='add'>+	ret = nouveau_fence_new(chan, &amp;fence);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		ret = nouveau_fence_wait(fence, false, false);</div><div class='add'>+		nouveau_fence_unref(&amp;fence);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		NV_ERROR(dev, "Failed to idle channel %d.\n", chan-&gt;id);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* cleans up all the fifos from file_priv */</div><div class='ctx'> void</div><div class='ctx'> nouveau_channel_cleanup(struct drm_device *dev, struct drm_file *file_priv)</div><div class='ctx'> {</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_engine *engine = &amp;dev_priv-&gt;engine;</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct nouveau_channel *chan;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (!pfifo)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	NV_DEBUG(dev, "clearing FIFO enables from file_priv\n");</div><div class='del'>-	for (i = 0; i &lt; engine-&gt;fifo.channels; i++) {</div><div class='add'>+	for (i = 0; i &lt; pfifo-&gt;channels; i++) {</div><div class='ctx'> 		chan = nouveau_channel_get(file_priv, i);</div><div class='ctx'> 		if (IS_ERR(chan))</div><div class='ctx'> 			continue;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c<br/>index fa860358add1..7b11edb077d0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_connector.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_connector.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_connector.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_connector.c</a></div><div class='hunk'>@@ -654,7 +654,13 @@ nouveau_connector_detect_depth(struct drm_connector *connector)</div><div class='ctx'> 	if (nv_connector-&gt;edid &amp;&amp; connector-&gt;display_info.bpc)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* if not, we're out of options unless we're LVDS, default to 8bpc */</div><div class='add'>+	/* EDID 1.4 is *supposed* to be supported on eDP, but, Apple... */</div><div class='add'>+	if (nv_connector-&gt;type == DCB_CONNECTOR_eDP) {</div><div class='add'>+		connector-&gt;display_info.bpc = 6;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* we're out of options unless we're LVDS, default to 8bpc */</div><div class='ctx'> 	if (nv_encoder-&gt;dcb-&gt;type != OUTPUT_LVDS) {</div><div class='ctx'> 		connector-&gt;display_info.bpc = 8;</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_debugfs.c b/drivers/gpu/drm/nouveau/nouveau_debugfs.c<br/>index fa2ec491f6a7..188c92b327e2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_debugfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_debugfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_debugfs.c</a></div><div class='hunk'>@@ -67,8 +67,6 @@ nouveau_debugfs_channel_info(struct seq_file *m, void *data)</div><div class='ctx'> 			   nvchan_rd32(chan, 0x8c));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	seq_printf(m, "last fence    : %d\n", chan-&gt;fence.sequence);</div><div class='del'>-	seq_printf(m, "last signalled: %d\n", chan-&gt;fence.sequence_ack);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c<br/>index a85e112863d1..69688ef5cf46 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_display.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_display.c</a></div><div class='hunk'>@@ -33,7 +33,9 @@</div><div class='ctx'> #include "nouveau_crtc.h"</div><div class='ctx'> #include "nouveau_dma.h"</div><div class='ctx'> #include "nouveau_connector.h"</div><div class='add'>+#include "nouveau_software.h"</div><div class='ctx'> #include "nouveau_gpio.h"</div><div class='add'>+#include "nouveau_fence.h"</div><div class='ctx'> #include "nv50_display.h"</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -300,7 +302,7 @@ nouveau_display_create(struct drm_device *dev)</div><div class='ctx'> 		disp-&gt;color_vibrance_property-&gt;values[1] = 200; /* -100..+100 */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev-&gt;mode_config.funcs = (void *)&amp;nouveau_mode_config_funcs;</div><div class='add'>+	dev-&gt;mode_config.funcs = &amp;nouveau_mode_config_funcs;</div><div class='ctx'> 	dev-&gt;mode_config.fb_base = pci_resource_start(dev-&gt;pdev, 1);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;mode_config.min_width = 0;</div><div class='hunk'>@@ -325,14 +327,21 @@ nouveau_display_create(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	ret = disp-&gt;create(dev);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto disp_create_err;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;mode_config.num_crtc) {</div><div class='ctx'> 		ret = drm_vblank_init(dev, dev-&gt;mode_config.num_crtc);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+			goto vblank_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+vblank_err:</div><div class='add'>+	disp-&gt;destroy(dev);</div><div class='add'>+disp_create_err:</div><div class='add'>+	drm_kms_helper_poll_fini(dev);</div><div class='add'>+	drm_mode_config_cleanup(dev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -425,6 +434,7 @@ nouveau_page_flip_emit(struct nouveau_channel *chan,</div><div class='ctx'> 		       struct nouveau_page_flip_state *s,</div><div class='ctx'> 		       struct nouveau_fence **pfence)</div><div class='ctx'> {</div><div class='add'>+	struct nouveau_software_chan *swch = chan-&gt;engctx[NVOBJ_ENGINE_SW];</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = chan-&gt;dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -432,7 +442,7 @@ nouveau_page_flip_emit(struct nouveau_channel *chan,</div><div class='ctx'> </div><div class='ctx'> 	/* Queue it to the pending list */</div><div class='ctx'> 	spin_lock_irqsave(&amp;dev-&gt;event_lock, flags);</div><div class='del'>-	list_add_tail(&amp;s-&gt;head, &amp;chan-&gt;nvsw.flip);</div><div class='add'>+	list_add_tail(&amp;s-&gt;head, &amp;swch-&gt;flip);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev-&gt;event_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* Synchronize with the old framebuffer */</div><div class='hunk'>@@ -446,17 +456,17 @@ nouveau_page_flip_emit(struct nouveau_channel *chan,</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='ctx'> 	if (dev_priv-&gt;card_type &lt; NV_C0) {</div><div class='del'>-		BEGIN_RING(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);</div><div class='add'>+		BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);</div><div class='ctx'> 		OUT_RING  (chan, 0x00000000);</div><div class='ctx'> 		OUT_RING  (chan, 0x00000000);</div><div class='ctx'> 	} else {</div><div class='del'>-		BEGIN_NVC0(chan, 2, 0, NV10_SUBCHAN_REF_CNT, 1);</div><div class='del'>-		OUT_RING  (chan, ++chan-&gt;fence.sequence);</div><div class='del'>-		BEGIN_NVC0(chan, 8, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);</div><div class='add'>+		BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);</div><div class='add'>+		OUT_RING  (chan, 0);</div><div class='add'>+		BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);</div><div class='ctx'> 	}</div><div class='ctx'> 	FIRE_RING (chan);</div><div class='ctx'> </div><div class='del'>-	ret = nouveau_fence_new(chan, pfence, true);</div><div class='add'>+	ret = nouveau_fence_new(chan, pfence);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='hunk'>@@ -477,7 +487,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,</div><div class='ctx'> 	struct nouveau_bo *old_bo = nouveau_framebuffer(crtc-&gt;fb)-&gt;nvbo;</div><div class='ctx'> 	struct nouveau_bo *new_bo = nouveau_framebuffer(fb)-&gt;nvbo;</div><div class='ctx'> 	struct nouveau_page_flip_state *s;</div><div class='del'>-	struct nouveau_channel *chan;</div><div class='add'>+	struct nouveau_channel *chan = NULL;</div><div class='ctx'> 	struct nouveau_fence *fence;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -500,7 +510,9 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,</div><div class='ctx'> 		  new_bo-&gt;bo.offset };</div><div class='ctx'> </div><div class='ctx'> 	/* Choose the channel the flip will be handled in */</div><div class='del'>-	chan = nouveau_fence_channel(new_bo-&gt;bo.sync_obj);</div><div class='add'>+	fence = new_bo-&gt;bo.sync_obj;</div><div class='add'>+	if (fence)</div><div class='add'>+		chan = nouveau_channel_get_unlocked(fence-&gt;channel);</div><div class='ctx'> 	if (!chan)</div><div class='ctx'> 		chan = nouveau_channel_get_unlocked(dev_priv-&gt;channel);</div><div class='ctx'> 	mutex_lock(&amp;chan-&gt;mutex);</div><div class='hunk'>@@ -540,20 +552,20 @@ int</div><div class='ctx'> nouveau_finish_page_flip(struct nouveau_channel *chan,</div><div class='ctx'> 			 struct nouveau_page_flip_state *ps)</div><div class='ctx'> {</div><div class='add'>+	struct nouveau_software_chan *swch = chan-&gt;engctx[NVOBJ_ENGINE_SW];</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct nouveau_page_flip_state *s;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev-&gt;event_lock, flags);</div><div class='ctx'> </div><div class='del'>-	if (list_empty(&amp;chan-&gt;nvsw.flip)) {</div><div class='add'>+	if (list_empty(&amp;swch-&gt;flip)) {</div><div class='ctx'> 		NV_ERROR(dev, "Unexpected pageflip in channel %d.\n", chan-&gt;id);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;dev-&gt;event_lock, flags);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	s = list_first_entry(&amp;chan-&gt;nvsw.flip,</div><div class='del'>-			     struct nouveau_page_flip_state, head);</div><div class='add'>+	s = list_first_entry(&amp;swch-&gt;flip, struct nouveau_page_flip_state, head);</div><div class='ctx'> 	if (s-&gt;event) {</div><div class='ctx'> 		struct drm_pending_vblank_event *e = s-&gt;event;</div><div class='ctx'> 		struct timeval now;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h<br/>index 23d4edf992b7..8db68be9544f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_dma.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_dma.h</a></div><div class='hunk'>@@ -48,12 +48,12 @@ void nv50_dma_push(struct nouveau_channel *, struct nouveau_bo *,</div><div class='ctx'> </div><div class='ctx'> /* Hardcoded object assignments to subchannels (subchannel id). */</div><div class='ctx'> enum {</div><div class='del'>-	NvSubM2MF	= 0,</div><div class='add'>+	NvSubCtxSurf2D  = 0,</div><div class='ctx'> 	NvSubSw		= 1,</div><div class='del'>-	NvSub2D		= 2,</div><div class='del'>-	NvSubCtxSurf2D  = 2,</div><div class='add'>+	NvSubImageBlit  = 2,</div><div class='add'>+	NvSub2D		= 3,</div><div class='ctx'> 	NvSubGdiRect    = 3,</div><div class='del'>-	NvSubImageBlit  = 4</div><div class='add'>+	NvSubCopy	= 4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Object handles. */</div><div class='hunk'>@@ -73,6 +73,7 @@ enum {</div><div class='ctx'> 	NvSema		= 0x8000000f,</div><div class='ctx'> 	NvEvoSema0	= 0x80000010,</div><div class='ctx'> 	NvEvoSema1	= 0x80000011,</div><div class='add'>+	NvNotify1       = 0x80000012,</div><div class='ctx'> </div><div class='ctx'> 	/* G80+ display objects */</div><div class='ctx'> 	NvEvoVRAM	= 0x01000000,</div><div class='hunk'>@@ -127,15 +128,33 @@ extern void</div><div class='ctx'> OUT_RINGp(struct nouveau_channel *chan, const void *data, unsigned nr_dwords);</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-BEGIN_NVC0(struct nouveau_channel *chan, int op, int subc, int mthd, int size)</div><div class='add'>+BEGIN_NV04(struct nouveau_channel *chan, int subc, int mthd, int size)</div><div class='ctx'> {</div><div class='del'>-	OUT_RING(chan, (op &lt;&lt; 28) | (size &lt;&lt; 16) | (subc &lt;&lt; 13) | (mthd &gt;&gt; 2));</div><div class='add'>+	OUT_RING(chan, 0x00000000 | (subc &lt;&lt; 13) | (size &lt;&lt; 18) | mthd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-BEGIN_RING(struct nouveau_channel *chan, int subc, int mthd, int size)</div><div class='add'>+BEGIN_NI04(struct nouveau_channel *chan, int subc, int mthd, int size)</div><div class='ctx'> {</div><div class='del'>-	OUT_RING(chan, (subc &lt;&lt; 13) | (size &lt;&lt; 18) | mthd);</div><div class='add'>+	OUT_RING(chan, 0x40000000 | (subc &lt;&lt; 13) | (size &lt;&lt; 18) | mthd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+BEGIN_NVC0(struct nouveau_channel *chan, int subc, int mthd, int size)</div><div class='add'>+{</div><div class='add'>+	OUT_RING(chan, 0x20000000 | (size &lt;&lt; 16) | (subc &lt;&lt; 13) | (mthd &gt;&gt; 2));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+BEGIN_NIC0(struct nouveau_channel *chan, int subc, int mthd, int size)</div><div class='add'>+{</div><div class='add'>+	OUT_RING(chan, 0x60000000 | (size &lt;&lt; 16) | (subc &lt;&lt; 13) | (mthd &gt;&gt; 2));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data)</div><div class='add'>+{</div><div class='add'>+	OUT_RING(chan, 0x80000000 | (data &lt;&lt; 16) | (subc &lt;&lt; 13) | (mthd &gt;&gt; 2));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define WRITE_PUT(val) do {                                                    \</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c<br/>index d996134b1b28..7e289d2ad8e4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_dp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_dp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_dp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_dp.c</a></div><div class='hunk'>@@ -510,6 +510,25 @@ nouveau_dp_dpms(struct drm_encoder *encoder, int mode, u32 datarate,</div><div class='ctx'> 		nouveau_dp_link_train(encoder, datarate, func);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+nouveau_dp_probe_oui(struct drm_device *dev, struct nouveau_i2c_chan *auxch,</div><div class='add'>+		     u8 *dpcd)</div><div class='add'>+{</div><div class='add'>+	u8 buf[3];</div><div class='add'>+</div><div class='add'>+	if (!(dpcd[DP_DOWN_STREAM_PORT_COUNT] &amp; DP_OUI_SUPPORT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!auxch_tx(dev, auxch-&gt;drive, 9, DP_SINK_OUI, buf, 3))</div><div class='add'>+		NV_DEBUG_KMS(dev, "Sink OUI: %02hx%02hx%02hx\n",</div><div class='add'>+			     buf[0], buf[1], buf[2]);</div><div class='add'>+</div><div class='add'>+	if (!auxch_tx(dev, auxch-&gt;drive, 9, DP_BRANCH_OUI, buf, 3))</div><div class='add'>+		NV_DEBUG_KMS(dev, "Branch OUI: %02hx%02hx%02hx\n",</div><div class='add'>+			     buf[0], buf[1], buf[2]);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool</div><div class='ctx'> nouveau_dp_detect(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='hunk'>@@ -544,6 +563,8 @@ nouveau_dp_detect(struct drm_encoder *encoder)</div><div class='ctx'> 	NV_DEBUG_KMS(dev, "maximum: %dx%d\n",</div><div class='ctx'> 		     nv_encoder-&gt;dp.link_nr, nv_encoder-&gt;dp.link_bw);</div><div class='ctx'> </div><div class='add'>+	nouveau_dp_probe_oui(dev, auxch, dpcd);</div><div class='add'>+</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c<br/>index 4f2030bd5676..cad254c8e387 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_drv.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> #include "nouveau_fb.h"</div><div class='ctx'> #include "nouveau_fbcon.h"</div><div class='ctx'> #include "nouveau_pm.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> #include "nv50_display.h"</div><div class='ctx'> </div><div class='ctx'> #include "drm_pciids.h"</div><div class='hunk'>@@ -175,7 +176,7 @@ nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)</div><div class='ctx'> 	struct drm_device *dev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_instmem_engine *pinstmem = &amp;dev_priv-&gt;engine.instmem;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct nouveau_channel *chan;</div><div class='ctx'> 	struct drm_crtc *crtc;</div><div class='ctx'> 	int ret, i, e;</div><div class='hunk'>@@ -214,17 +215,13 @@ nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)</div><div class='ctx'> 	ttm_bo_evict_mm(&amp;dev_priv-&gt;ttm.bdev, TTM_PL_VRAM);</div><div class='ctx'> </div><div class='ctx'> 	NV_INFO(dev, "Idling channels...\n");</div><div class='del'>-	for (i = 0; i &lt; pfifo-&gt;channels; i++) {</div><div class='add'>+	for (i = 0; i &lt; (pfifo ? pfifo-&gt;channels : 0); i++) {</div><div class='ctx'> 		chan = dev_priv-&gt;channels.ptr[i];</div><div class='ctx'> </div><div class='ctx'> 		if (chan &amp;&amp; chan-&gt;pushbuf_bo)</div><div class='ctx'> 			nouveau_channel_idle(chan);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pfifo-&gt;reassign(dev, false);</div><div class='del'>-	pfifo-&gt;disable(dev);</div><div class='del'>-	pfifo-&gt;unload_context(dev);</div><div class='del'>-</div><div class='ctx'> 	for (e = NVOBJ_ENGINE_NR - 1; e &gt;= 0; e--) {</div><div class='ctx'> 		if (!dev_priv-&gt;eng[e])</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -265,8 +262,6 @@ out_abort:</div><div class='ctx'> 		if (dev_priv-&gt;eng[e])</div><div class='ctx'> 			dev_priv-&gt;eng[e]-&gt;init(dev, e);</div><div class='ctx'> 	}</div><div class='del'>-	pfifo-&gt;enable(dev);</div><div class='del'>-	pfifo-&gt;reassign(dev, true);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -274,6 +269,7 @@ int</div><div class='ctx'> nouveau_pci_resume(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = pci_get_drvdata(pdev);</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_engine *engine = &amp;dev_priv-&gt;engine;</div><div class='ctx'> 	struct drm_crtc *crtc;</div><div class='hunk'>@@ -321,7 +317,6 @@ nouveau_pci_resume(struct pci_dev *pdev)</div><div class='ctx'> 		if (dev_priv-&gt;eng[i])</div><div class='ctx'> 			dev_priv-&gt;eng[i]-&gt;init(dev, i);</div><div class='ctx'> 	}</div><div class='del'>-	engine-&gt;fifo.init(dev);</div><div class='ctx'> </div><div class='ctx'> 	nouveau_irq_postinstall(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -330,7 +325,7 @@ nouveau_pci_resume(struct pci_dev *pdev)</div><div class='ctx'> 		struct nouveau_channel *chan;</div><div class='ctx'> 		int j;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; dev_priv-&gt;engine.fifo.channels; i++) {</div><div class='add'>+		for (i = 0; i &lt; (pfifo ? pfifo-&gt;channels : 0); i++) {</div><div class='ctx'> 			chan = dev_priv-&gt;channels.ptr[i];</div><div class='ctx'> 			if (!chan || !chan-&gt;pushbuf_bo)</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -408,7 +403,7 @@ static struct drm_driver driver = {</div><div class='ctx'> 	.driver_features =</div><div class='ctx'> 		DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |</div><div class='ctx'> 		DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |</div><div class='del'>-		DRIVER_MODESET,</div><div class='add'>+		DRIVER_MODESET | DRIVER_PRIME,</div><div class='ctx'> 	.load = nouveau_load,</div><div class='ctx'> 	.firstopen = nouveau_firstopen,</div><div class='ctx'> 	.lastclose = nouveau_lastclose,</div><div class='hunk'>@@ -430,6 +425,12 @@ static struct drm_driver driver = {</div><div class='ctx'> 	.reclaim_buffers = drm_core_reclaim_buffers,</div><div class='ctx'> 	.ioctls = nouveau_ioctls,</div><div class='ctx'> 	.fops = &amp;nouveau_driver_fops,</div><div class='add'>+</div><div class='add'>+	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,</div><div class='add'>+	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,</div><div class='add'>+	.gem_prime_export = nouveau_gem_prime_export,</div><div class='add'>+	.gem_prime_import = nouveau_gem_prime_import,</div><div class='add'>+</div><div class='ctx'> 	.gem_init_object = nouveau_gem_object_new,</div><div class='ctx'> 	.gem_free_object = nouveau_gem_object_del,</div><div class='ctx'> 	.gem_open_object = nouveau_gem_object_open,</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h<br/>index 3aef353a926c..8613cb23808c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_drv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_drv.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_drv.h</a></div><div class='hunk'>@@ -70,7 +70,7 @@ struct nouveau_mem;</div><div class='ctx'> </div><div class='ctx'> #define MAX_NUM_DCB_ENTRIES 16</div><div class='ctx'> </div><div class='del'>-#define NOUVEAU_MAX_CHANNEL_NR 128</div><div class='add'>+#define NOUVEAU_MAX_CHANNEL_NR 4096</div><div class='ctx'> #define NOUVEAU_MAX_TILE_NR 15</div><div class='ctx'> </div><div class='ctx'> struct nouveau_mem {</div><div class='hunk'>@@ -86,6 +86,7 @@ struct nouveau_mem {</div><div class='ctx'> 	u32 memtype;</div><div class='ctx'> 	u64 offset;</div><div class='ctx'> 	u64 size;</div><div class='add'>+	struct sg_table *sg;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct nouveau_tile_reg {</div><div class='hunk'>@@ -122,6 +123,9 @@ struct nouveau_bo {</div><div class='ctx'> </div><div class='ctx'> 	struct drm_gem_object *gem;</div><div class='ctx'> 	int pin_refcnt;</div><div class='add'>+</div><div class='add'>+	struct ttm_bo_kmap_obj dma_buf_vmap;</div><div class='add'>+	int vmapping_count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define nouveau_bo_tile_layout(nvbo)				\</div><div class='hunk'>@@ -164,8 +168,10 @@ enum nouveau_flags {</div><div class='ctx'> #define NVOBJ_ENGINE_PPP	NVOBJ_ENGINE_MPEG</div><div class='ctx'> #define NVOBJ_ENGINE_BSP	6</div><div class='ctx'> #define NVOBJ_ENGINE_VP		7</div><div class='del'>-#define NVOBJ_ENGINE_DISPLAY	15</div><div class='add'>+#define NVOBJ_ENGINE_FIFO	14</div><div class='add'>+#define NVOBJ_ENGINE_FENCE	15</div><div class='ctx'> #define NVOBJ_ENGINE_NR		16</div><div class='add'>+#define NVOBJ_ENGINE_DISPLAY	(NVOBJ_ENGINE_NR + 0) /*XXX*/</div><div class='ctx'> </div><div class='ctx'> #define NVOBJ_FLAG_DONT_MAP             (1 &lt;&lt; 0)</div><div class='ctx'> #define NVOBJ_FLAG_ZERO_ALLOC		(1 &lt;&lt; 1)</div><div class='hunk'>@@ -233,17 +239,6 @@ struct nouveau_channel {</div><div class='ctx'> 	uint32_t user_get_hi;</div><div class='ctx'> 	uint32_t user_put;</div><div class='ctx'> </div><div class='del'>-	/* Fencing */</div><div class='del'>-	struct {</div><div class='del'>-		/* lock protects the pending list only */</div><div class='del'>-		spinlock_t lock;</div><div class='del'>-		struct list_head pending;</div><div class='del'>-		uint32_t sequence;</div><div class='del'>-		uint32_t sequence_ack;</div><div class='del'>-		atomic_t last_sequence_irq;</div><div class='del'>-		struct nouveau_vma vma;</div><div class='del'>-	} fence;</div><div class='del'>-</div><div class='ctx'> 	/* DMA push buffer */</div><div class='ctx'> 	struct nouveau_gpuobj *pushbuf;</div><div class='ctx'> 	struct nouveau_bo     *pushbuf_bo;</div><div class='hunk'>@@ -257,8 +252,6 @@ struct nouveau_channel {</div><div class='ctx'> </div><div class='ctx'> 	/* PFIFO context */</div><div class='ctx'> 	struct nouveau_gpuobj *ramfc;</div><div class='del'>-	struct nouveau_gpuobj *cache;</div><div class='del'>-	void *fifo_priv;</div><div class='ctx'> </div><div class='ctx'> 	/* Execution engine contexts */</div><div class='ctx'> 	void *engctx[NVOBJ_ENGINE_NR];</div><div class='hunk'>@@ -292,18 +285,6 @@ struct nouveau_channel {</div><div class='ctx'> 		int ib_put;</div><div class='ctx'> 	} dma;</div><div class='ctx'> </div><div class='del'>-	uint32_t sw_subchannel[8];</div><div class='del'>-</div><div class='del'>-	struct nouveau_vma dispc_vma[4];</div><div class='del'>-	struct {</div><div class='del'>-		struct nouveau_gpuobj *vblsem;</div><div class='del'>-		uint32_t vblsem_head;</div><div class='del'>-		uint32_t vblsem_offset;</div><div class='del'>-		uint32_t vblsem_rval;</div><div class='del'>-		struct list_head vbl_wait;</div><div class='del'>-		struct list_head flip;</div><div class='del'>-	} nvsw;</div><div class='del'>-</div><div class='ctx'> 	struct {</div><div class='ctx'> 		bool active;</div><div class='ctx'> 		char name[32];</div><div class='hunk'>@@ -366,30 +347,6 @@ struct nouveau_fb_engine {</div><div class='ctx'> 	void (*free_tile_region)(struct drm_device *dev, int i);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct nouveau_fifo_engine {</div><div class='del'>-	void *priv;</div><div class='del'>-	int  channels;</div><div class='del'>-</div><div class='del'>-	struct nouveau_gpuobj *playlist[2];</div><div class='del'>-	int cur_playlist;</div><div class='del'>-</div><div class='del'>-	int  (*init)(struct drm_device *);</div><div class='del'>-	void (*takedown)(struct drm_device *);</div><div class='del'>-</div><div class='del'>-	void (*disable)(struct drm_device *);</div><div class='del'>-	void (*enable)(struct drm_device *);</div><div class='del'>-	bool (*reassign)(struct drm_device *, bool enable);</div><div class='del'>-	bool (*cache_pull)(struct drm_device *dev, bool enable);</div><div class='del'>-</div><div class='del'>-	int  (*channel_id)(struct drm_device *);</div><div class='del'>-</div><div class='del'>-	int  (*create_context)(struct nouveau_channel *);</div><div class='del'>-	void (*destroy_context)(struct nouveau_channel *);</div><div class='del'>-	int  (*load_context)(struct nouveau_channel *);</div><div class='del'>-	int  (*unload_context)(struct drm_device *);</div><div class='del'>-	void (*tlb_flush)(struct drm_device *dev);</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct nouveau_display_engine {</div><div class='ctx'> 	void *priv;</div><div class='ctx'> 	int (*early_init)(struct drm_device *);</div><div class='hunk'>@@ -597,7 +554,6 @@ struct nouveau_engine {</div><div class='ctx'> 	struct nouveau_mc_engine      mc;</div><div class='ctx'> 	struct nouveau_timer_engine   timer;</div><div class='ctx'> 	struct nouveau_fb_engine      fb;</div><div class='del'>-	struct nouveau_fifo_engine    fifo;</div><div class='ctx'> 	struct nouveau_display_engine display;</div><div class='ctx'> 	struct nouveau_gpio_engine    gpio;</div><div class='ctx'> 	struct nouveau_pm_engine      pm;</div><div class='hunk'>@@ -740,6 +696,9 @@ struct drm_nouveau_private {</div><div class='ctx'> 		struct ttm_bo_global_ref bo_global_ref;</div><div class='ctx'> 		struct ttm_bo_device bdev;</div><div class='ctx'> 		atomic_t validate_sequence;</div><div class='add'>+		int (*move)(struct nouveau_channel *,</div><div class='add'>+			    struct ttm_buffer_object *,</div><div class='add'>+			    struct ttm_mem_reg *, struct ttm_mem_reg *);</div><div class='ctx'> 	} ttm;</div><div class='ctx'> </div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -977,7 +936,7 @@ extern void nouveau_channel_put_unlocked(struct nouveau_channel **);</div><div class='ctx'> extern void nouveau_channel_put(struct nouveau_channel **);</div><div class='ctx'> extern void nouveau_channel_ref(struct nouveau_channel *chan,</div><div class='ctx'> 				struct nouveau_channel **pchan);</div><div class='del'>-extern void nouveau_channel_idle(struct nouveau_channel *chan);</div><div class='add'>+extern int  nouveau_channel_idle(struct nouveau_channel *chan);</div><div class='ctx'> </div><div class='ctx'> /* nouveau_object.c */</div><div class='ctx'> #define NVOBJ_ENGINE_ADD(d, e, p) do {                                         \</div><div class='hunk'>@@ -1209,56 +1168,6 @@ extern void nv50_fb_vm_trap(struct drm_device *, int display);</div><div class='ctx'> extern int  nvc0_fb_init(struct drm_device *);</div><div class='ctx'> extern void nvc0_fb_takedown(struct drm_device *);</div><div class='ctx'> </div><div class='del'>-/* nv04_fifo.c */</div><div class='del'>-extern int  nv04_fifo_init(struct drm_device *);</div><div class='del'>-extern void nv04_fifo_fini(struct drm_device *);</div><div class='del'>-extern void nv04_fifo_disable(struct drm_device *);</div><div class='del'>-extern void nv04_fifo_enable(struct drm_device *);</div><div class='del'>-extern bool nv04_fifo_reassign(struct drm_device *, bool);</div><div class='del'>-extern bool nv04_fifo_cache_pull(struct drm_device *, bool);</div><div class='del'>-extern int  nv04_fifo_channel_id(struct drm_device *);</div><div class='del'>-extern int  nv04_fifo_create_context(struct nouveau_channel *);</div><div class='del'>-extern void nv04_fifo_destroy_context(struct nouveau_channel *);</div><div class='del'>-extern int  nv04_fifo_load_context(struct nouveau_channel *);</div><div class='del'>-extern int  nv04_fifo_unload_context(struct drm_device *);</div><div class='del'>-extern void nv04_fifo_isr(struct drm_device *);</div><div class='del'>-</div><div class='del'>-/* nv10_fifo.c */</div><div class='del'>-extern int  nv10_fifo_init(struct drm_device *);</div><div class='del'>-extern int  nv10_fifo_channel_id(struct drm_device *);</div><div class='del'>-extern int  nv10_fifo_create_context(struct nouveau_channel *);</div><div class='del'>-extern int  nv10_fifo_load_context(struct nouveau_channel *);</div><div class='del'>-extern int  nv10_fifo_unload_context(struct drm_device *);</div><div class='del'>-</div><div class='del'>-/* nv40_fifo.c */</div><div class='del'>-extern int  nv40_fifo_init(struct drm_device *);</div><div class='del'>-extern int  nv40_fifo_create_context(struct nouveau_channel *);</div><div class='del'>-extern int  nv40_fifo_load_context(struct nouveau_channel *);</div><div class='del'>-extern int  nv40_fifo_unload_context(struct drm_device *);</div><div class='del'>-</div><div class='del'>-/* nv50_fifo.c */</div><div class='del'>-extern int  nv50_fifo_init(struct drm_device *);</div><div class='del'>-extern void nv50_fifo_takedown(struct drm_device *);</div><div class='del'>-extern int  nv50_fifo_channel_id(struct drm_device *);</div><div class='del'>-extern int  nv50_fifo_create_context(struct nouveau_channel *);</div><div class='del'>-extern void nv50_fifo_destroy_context(struct nouveau_channel *);</div><div class='del'>-extern int  nv50_fifo_load_context(struct nouveau_channel *);</div><div class='del'>-extern int  nv50_fifo_unload_context(struct drm_device *);</div><div class='del'>-extern void nv50_fifo_tlb_flush(struct drm_device *dev);</div><div class='del'>-</div><div class='del'>-/* nvc0_fifo.c */</div><div class='del'>-extern int  nvc0_fifo_init(struct drm_device *);</div><div class='del'>-extern void nvc0_fifo_takedown(struct drm_device *);</div><div class='del'>-extern void nvc0_fifo_disable(struct drm_device *);</div><div class='del'>-extern void nvc0_fifo_enable(struct drm_device *);</div><div class='del'>-extern bool nvc0_fifo_reassign(struct drm_device *, bool);</div><div class='del'>-extern bool nvc0_fifo_cache_pull(struct drm_device *, bool);</div><div class='del'>-extern int  nvc0_fifo_channel_id(struct drm_device *);</div><div class='del'>-extern int  nvc0_fifo_create_context(struct nouveau_channel *);</div><div class='del'>-extern void nvc0_fifo_destroy_context(struct nouveau_channel *);</div><div class='del'>-extern int  nvc0_fifo_load_context(struct nouveau_channel *);</div><div class='del'>-extern int  nvc0_fifo_unload_context(struct drm_device *);</div><div class='del'>-</div><div class='ctx'> /* nv04_graph.c */</div><div class='ctx'> extern int  nv04_graph_create(struct drm_device *);</div><div class='ctx'> extern int  nv04_graph_object_new(struct nouveau_channel *, int, u32, u16);</div><div class='hunk'>@@ -1277,18 +1186,23 @@ extern int  nv20_graph_create(struct drm_device *);</div><div class='ctx'> </div><div class='ctx'> /* nv40_graph.c */</div><div class='ctx'> extern int  nv40_graph_create(struct drm_device *);</div><div class='del'>-extern void nv40_grctx_init(struct nouveau_grctx *);</div><div class='add'>+extern void nv40_grctx_init(struct drm_device *, u32 *size);</div><div class='add'>+extern void nv40_grctx_fill(struct drm_device *, struct nouveau_gpuobj *);</div><div class='ctx'> </div><div class='ctx'> /* nv50_graph.c */</div><div class='ctx'> extern int  nv50_graph_create(struct drm_device *);</div><div class='del'>-extern int  nv50_grctx_init(struct nouveau_grctx *);</div><div class='ctx'> extern struct nouveau_enum nv50_data_error_names[];</div><div class='ctx'> extern int  nv50_graph_isr_chid(struct drm_device *dev, u64 inst);</div><div class='add'>+extern int  nv50_grctx_init(struct drm_device *, u32 *, u32, u32 *, u32 *);</div><div class='add'>+extern void nv50_grctx_fill(struct drm_device *, struct nouveau_gpuobj *);</div><div class='ctx'> </div><div class='ctx'> /* nvc0_graph.c */</div><div class='ctx'> extern int  nvc0_graph_create(struct drm_device *);</div><div class='ctx'> extern int  nvc0_graph_isr_chid(struct drm_device *dev, u64 inst);</div><div class='ctx'> </div><div class='add'>+/* nve0_graph.c */</div><div class='add'>+extern int  nve0_graph_create(struct drm_device *);</div><div class='add'>+</div><div class='ctx'> /* nv84_crypt.c */</div><div class='ctx'> extern int  nv84_crypt_create(struct drm_device *);</div><div class='ctx'> </div><div class='hunk'>@@ -1414,9 +1328,12 @@ extern int nv04_crtc_create(struct drm_device *, int index);</div><div class='ctx'> </div><div class='ctx'> /* nouveau_bo.c */</div><div class='ctx'> extern struct ttm_bo_driver nouveau_bo_driver;</div><div class='add'>+extern void nouveau_bo_move_init(struct nouveau_channel *);</div><div class='ctx'> extern int nouveau_bo_new(struct drm_device *, int size, int align,</div><div class='ctx'> 			  uint32_t flags, uint32_t tile_mode,</div><div class='del'>-			  uint32_t tile_flags, struct nouveau_bo **);</div><div class='add'>+			  uint32_t tile_flags,</div><div class='add'>+			  struct sg_table *sg,</div><div class='add'>+			  struct nouveau_bo **);</div><div class='ctx'> extern int nouveau_bo_pin(struct nouveau_bo *, uint32_t flags);</div><div class='ctx'> extern int nouveau_bo_unpin(struct nouveau_bo *);</div><div class='ctx'> extern int nouveau_bo_map(struct nouveau_bo *);</div><div class='hunk'>@@ -1437,50 +1354,6 @@ extern int  nouveau_bo_vma_add(struct nouveau_bo *, struct nouveau_vm *,</div><div class='ctx'> 			       struct nouveau_vma *);</div><div class='ctx'> extern void nouveau_bo_vma_del(struct nouveau_bo *, struct nouveau_vma *);</div><div class='ctx'> </div><div class='del'>-/* nouveau_fence.c */</div><div class='del'>-struct nouveau_fence;</div><div class='del'>-extern int nouveau_fence_init(struct drm_device *);</div><div class='del'>-extern void nouveau_fence_fini(struct drm_device *);</div><div class='del'>-extern int nouveau_fence_channel_init(struct nouveau_channel *);</div><div class='del'>-extern void nouveau_fence_channel_fini(struct nouveau_channel *);</div><div class='del'>-extern void nouveau_fence_update(struct nouveau_channel *);</div><div class='del'>-extern int nouveau_fence_new(struct nouveau_channel *, struct nouveau_fence **,</div><div class='del'>-			     bool emit);</div><div class='del'>-extern int nouveau_fence_emit(struct nouveau_fence *);</div><div class='del'>-extern void nouveau_fence_work(struct nouveau_fence *fence,</div><div class='del'>-			       void (*work)(void *priv, bool signalled),</div><div class='del'>-			       void *priv);</div><div class='del'>-struct nouveau_channel *nouveau_fence_channel(struct nouveau_fence *);</div><div class='del'>-</div><div class='del'>-extern bool __nouveau_fence_signalled(void *obj, void *arg);</div><div class='del'>-extern int __nouveau_fence_wait(void *obj, void *arg, bool lazy, bool intr);</div><div class='del'>-extern int __nouveau_fence_flush(void *obj, void *arg);</div><div class='del'>-extern void __nouveau_fence_unref(void **obj);</div><div class='del'>-extern void *__nouveau_fence_ref(void *obj);</div><div class='del'>-</div><div class='del'>-static inline bool nouveau_fence_signalled(struct nouveau_fence *obj)</div><div class='del'>-{</div><div class='del'>-	return __nouveau_fence_signalled(obj, NULL);</div><div class='del'>-}</div><div class='del'>-static inline int</div><div class='del'>-nouveau_fence_wait(struct nouveau_fence *obj, bool lazy, bool intr)</div><div class='del'>-{</div><div class='del'>-	return __nouveau_fence_wait(obj, NULL, lazy, intr);</div><div class='del'>-}</div><div class='del'>-extern int nouveau_fence_sync(struct nouveau_fence *, struct nouveau_channel *);</div><div class='del'>-static inline int nouveau_fence_flush(struct nouveau_fence *obj)</div><div class='del'>-{</div><div class='del'>-	return __nouveau_fence_flush(obj, NULL);</div><div class='del'>-}</div><div class='del'>-static inline void nouveau_fence_unref(struct nouveau_fence **obj)</div><div class='del'>-{</div><div class='del'>-	__nouveau_fence_unref((void **)obj);</div><div class='del'>-}</div><div class='del'>-static inline struct nouveau_fence *nouveau_fence_ref(struct nouveau_fence *obj)</div><div class='del'>-{</div><div class='del'>-	return __nouveau_fence_ref(obj);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* nouveau_gem.c */</div><div class='ctx'> extern int nouveau_gem_new(struct drm_device *, int size, int align,</div><div class='ctx'> 			   uint32_t domain, uint32_t tile_mode,</div><div class='hunk'>@@ -1501,6 +1374,11 @@ extern int nouveau_gem_ioctl_cpu_fini(struct drm_device *, void *,</div><div class='ctx'> extern int nouveau_gem_ioctl_info(struct drm_device *, void *,</div><div class='ctx'> 				  struct drm_file *);</div><div class='ctx'> </div><div class='add'>+extern struct dma_buf *nouveau_gem_prime_export(struct drm_device *dev,</div><div class='add'>+				struct drm_gem_object *obj, int flags);</div><div class='add'>+extern struct drm_gem_object *nouveau_gem_prime_import(struct drm_device *dev,</div><div class='add'>+				struct dma_buf *dma_buf);</div><div class='add'>+</div><div class='ctx'> /* nouveau_display.c */</div><div class='ctx'> int nouveau_display_create(struct drm_device *dev);</div><div class='ctx'> void nouveau_display_destroy(struct drm_device *dev);</div><div class='hunk'>@@ -1772,6 +1650,7 @@ nv44_graph_class(struct drm_device *dev)</div><div class='ctx'> #define NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_EQUAL                 0x00000001</div><div class='ctx'> #define NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG                    0x00000002</div><div class='ctx'> #define NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL                0x00000004</div><div class='add'>+#define NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD                         0x00001000</div><div class='ctx'> #define NV84_SUBCHAN_NOTIFY_INTR                                     0x00000020</div><div class='ctx'> #define NV84_SUBCHAN_WRCACHE_FLUSH                                   0x00000024</div><div class='ctx'> #define NV10_SUBCHAN_REF_CNT                                         0x00000050</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c<br/>index 8113e9201ed9..153b9a15469b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_fbcon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_fbcon.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_fbcon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_fbcon.c</a></div><div class='hunk'>@@ -153,7 +153,7 @@ nouveau_fbcon_sync(struct fb_info *info)</div><div class='ctx'> 	struct drm_device *dev = nfbdev-&gt;dev;</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_channel *chan = dev_priv-&gt;channel;</div><div class='del'>-	int ret, i;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!chan || !chan-&gt;accel_done || in_interrupt() ||</div><div class='ctx'> 	    info-&gt;state != FBINFO_STATE_RUNNING ||</div><div class='hunk'>@@ -163,38 +163,8 @@ nouveau_fbcon_sync(struct fb_info *info)</div><div class='ctx'> 	if (!mutex_trylock(&amp;chan-&gt;mutex))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = RING_SPACE(chan, 4);</div><div class='del'>-	if (ret) {</div><div class='del'>-		mutex_unlock(&amp;chan-&gt;mutex);</div><div class='del'>-		nouveau_fbcon_gpu_lockup(info);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;card_type &gt;= NV_C0) {</div><div class='del'>-		BEGIN_NVC0(chan, 2, NvSub2D, 0x010c, 1);</div><div class='del'>-		OUT_RING  (chan, 0);</div><div class='del'>-		BEGIN_NVC0(chan, 2, NvSub2D, 0x0100, 1);</div><div class='del'>-		OUT_RING  (chan, 0);</div><div class='del'>-	} else {</div><div class='del'>-		BEGIN_RING(chan, 0, 0x0104, 1);</div><div class='del'>-		OUT_RING  (chan, 0);</div><div class='del'>-		BEGIN_RING(chan, 0, 0x0100, 1);</div><div class='del'>-		OUT_RING  (chan, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	nouveau_bo_wr32(chan-&gt;notifier_bo, chan-&gt;m2mf_ntfy/4 + 3, 0xffffffff);</div><div class='del'>-	FIRE_RING(chan);</div><div class='add'>+	ret = nouveau_channel_idle(chan);</div><div class='ctx'> 	mutex_unlock(&amp;chan-&gt;mutex);</div><div class='del'>-</div><div class='del'>-	ret = -EBUSY;</div><div class='del'>-	for (i = 0; i &lt; 100000; i++) {</div><div class='del'>-		if (!nouveau_bo_rd32(chan-&gt;notifier_bo, chan-&gt;m2mf_ntfy/4 + 3)) {</div><div class='del'>-			ret = 0;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		DRM_UDELAY(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		nouveau_fbcon_gpu_lockup(info);</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c<br/>index c1dc20f6cb85..3c180493dab8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_fence.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_fence.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_fence.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_fence.c</a></div><div class='hunk'>@@ -32,220 +32,100 @@</div><div class='ctx'> </div><div class='ctx'> #include "nouveau_drv.h"</div><div class='ctx'> #include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_fence.h"</div><div class='add'>+#include "nouveau_software.h"</div><div class='ctx'> #include "nouveau_dma.h"</div><div class='ctx'> </div><div class='del'>-#define USE_REFCNT(dev) (nouveau_private(dev)-&gt;chipset &gt;= 0x10)</div><div class='del'>-#define USE_SEMA(dev) (nouveau_private(dev)-&gt;chipset &gt;= 0x17)</div><div class='del'>-</div><div class='del'>-struct nouveau_fence {</div><div class='del'>-	struct nouveau_channel *channel;</div><div class='del'>-	struct kref refcount;</div><div class='del'>-	struct list_head entry;</div><div class='del'>-</div><div class='del'>-	uint32_t sequence;</div><div class='del'>-	bool signalled;</div><div class='del'>-</div><div class='del'>-	void (*work)(void *priv, bool signalled);</div><div class='del'>-	void *priv;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct nouveau_semaphore {</div><div class='del'>-	struct kref ref;</div><div class='del'>-	struct drm_device *dev;</div><div class='del'>-	struct drm_mm_node *mem;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline struct nouveau_fence *</div><div class='del'>-nouveau_fence(void *sync_obj)</div><div class='add'>+void</div><div class='add'>+nouveau_fence_context_del(struct nouveau_fence_chan *fctx)</div><div class='ctx'> {</div><div class='del'>-	return (struct nouveau_fence *)sync_obj;</div><div class='add'>+	struct nouveau_fence *fence, *fnext;</div><div class='add'>+	spin_lock(&amp;fctx-&gt;lock);</div><div class='add'>+	list_for_each_entry_safe(fence, fnext, &amp;fctx-&gt;pending, head) {</div><div class='add'>+		if (fence-&gt;work)</div><div class='add'>+			fence-&gt;work(fence-&gt;priv, false);</div><div class='add'>+		fence-&gt;channel = NULL;</div><div class='add'>+		list_del(&amp;fence-&gt;head);</div><div class='add'>+		nouveau_fence_unref(&amp;fence);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;fctx-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nouveau_fence_del(struct kref *ref)</div><div class='add'>+void</div><div class='add'>+nouveau_fence_context_new(struct nouveau_fence_chan *fctx)</div><div class='ctx'> {</div><div class='del'>-	struct nouveau_fence *fence =</div><div class='del'>-		container_of(ref, struct nouveau_fence, refcount);</div><div class='del'>-</div><div class='del'>-	nouveau_channel_ref(NULL, &amp;fence-&gt;channel);</div><div class='del'>-	kfree(fence);</div><div class='add'>+	INIT_LIST_HEAD(&amp;fctx-&gt;pending);</div><div class='add'>+	spin_lock_init(&amp;fctx-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void</div><div class='ctx'> nouveau_fence_update(struct nouveau_channel *chan)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	struct nouveau_fence *tmp, *fence;</div><div class='del'>-	uint32_t sequence;</div><div class='add'>+	struct nouveau_fence_priv *priv = nv_engine(dev, NVOBJ_ENGINE_FENCE);</div><div class='add'>+	struct nouveau_fence_chan *fctx = chan-&gt;engctx[NVOBJ_ENGINE_FENCE];</div><div class='add'>+	struct nouveau_fence *fence, *fnext;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;chan-&gt;fence.lock);</div><div class='del'>-</div><div class='del'>-	/* Fetch the last sequence if the channel is still up and running */</div><div class='del'>-	if (likely(!list_empty(&amp;chan-&gt;fence.pending))) {</div><div class='del'>-		if (USE_REFCNT(dev))</div><div class='del'>-			sequence = nvchan_rd32(chan, 0x48);</div><div class='del'>-		else</div><div class='del'>-			sequence = atomic_read(&amp;chan-&gt;fence.last_sequence_irq);</div><div class='del'>-</div><div class='del'>-		if (chan-&gt;fence.sequence_ack == sequence)</div><div class='del'>-			goto out;</div><div class='del'>-		chan-&gt;fence.sequence_ack = sequence;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(fence, tmp, &amp;chan-&gt;fence.pending, entry) {</div><div class='del'>-		if (fence-&gt;sequence &gt; chan-&gt;fence.sequence_ack)</div><div class='add'>+	spin_lock(&amp;fctx-&gt;lock);</div><div class='add'>+	list_for_each_entry_safe(fence, fnext, &amp;fctx-&gt;pending, head) {</div><div class='add'>+		if (priv-&gt;read(chan) &lt; fence-&gt;sequence)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		fence-&gt;signalled = true;</div><div class='del'>-		list_del(&amp;fence-&gt;entry);</div><div class='ctx'> 		if (fence-&gt;work)</div><div class='ctx'> 			fence-&gt;work(fence-&gt;priv, true);</div><div class='del'>-</div><div class='del'>-		kref_put(&amp;fence-&gt;refcount, nouveau_fence_del);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	spin_unlock(&amp;chan-&gt;fence.lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **pfence,</div><div class='del'>-		  bool emit)</div><div class='del'>-{</div><div class='del'>-	struct nouveau_fence *fence;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	fence = kzalloc(sizeof(*fence), GFP_KERNEL);</div><div class='del'>-	if (!fence)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	kref_init(&amp;fence-&gt;refcount);</div><div class='del'>-	nouveau_channel_ref(chan, &amp;fence-&gt;channel);</div><div class='del'>-</div><div class='del'>-	if (emit)</div><div class='del'>-		ret = nouveau_fence_emit(fence);</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='add'>+		fence-&gt;channel = NULL;</div><div class='add'>+		list_del(&amp;fence-&gt;head);</div><div class='ctx'> 		nouveau_fence_unref(&amp;fence);</div><div class='del'>-	*pfence = fence;</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct nouveau_channel *</div><div class='del'>-nouveau_fence_channel(struct nouveau_fence *fence)</div><div class='del'>-{</div><div class='del'>-	return fence ? nouveau_channel_get_unlocked(fence-&gt;channel) : NULL;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;fctx-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='del'>-nouveau_fence_emit(struct nouveau_fence *fence)</div><div class='add'>+nouveau_fence_emit(struct nouveau_fence *fence, struct nouveau_channel *chan)</div><div class='ctx'> {</div><div class='del'>-	struct nouveau_channel *chan = fence-&gt;channel;</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nouveau_fence_priv *priv = nv_engine(dev, NVOBJ_ENGINE_FENCE);</div><div class='add'>+	struct nouveau_fence_chan *fctx = chan-&gt;engctx[NVOBJ_ENGINE_FENCE];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = RING_SPACE(chan, 2);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (unlikely(chan-&gt;fence.sequence == chan-&gt;fence.sequence_ack - 1)) {</div><div class='del'>-		nouveau_fence_update(chan);</div><div class='add'>+	fence-&gt;channel  = chan;</div><div class='add'>+	fence-&gt;timeout  = jiffies + (3 * DRM_HZ);</div><div class='add'>+	fence-&gt;sequence = ++fctx-&gt;sequence;</div><div class='ctx'> </div><div class='del'>-		BUG_ON(chan-&gt;fence.sequence ==</div><div class='del'>-		       chan-&gt;fence.sequence_ack - 1);</div><div class='add'>+	ret = priv-&gt;emit(fence);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		kref_get(&amp;fence-&gt;kref);</div><div class='add'>+		spin_lock(&amp;fctx-&gt;lock);</div><div class='add'>+		list_add_tail(&amp;fence-&gt;head, &amp;fctx-&gt;pending);</div><div class='add'>+		spin_unlock(&amp;fctx-&gt;lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fence-&gt;sequence = ++chan-&gt;fence.sequence;</div><div class='del'>-</div><div class='del'>-	kref_get(&amp;fence-&gt;refcount);</div><div class='del'>-	spin_lock(&amp;chan-&gt;fence.lock);</div><div class='del'>-	list_add_tail(&amp;fence-&gt;entry, &amp;chan-&gt;fence.pending);</div><div class='del'>-	spin_unlock(&amp;chan-&gt;fence.lock);</div><div class='del'>-</div><div class='del'>-	if (USE_REFCNT(dev)) {</div><div class='del'>-		if (dev_priv-&gt;card_type &lt; NV_C0)</div><div class='del'>-			BEGIN_RING(chan, 0, NV10_SUBCHAN_REF_CNT, 1);</div><div class='del'>-		else</div><div class='del'>-			BEGIN_NVC0(chan, 2, 0, NV10_SUBCHAN_REF_CNT, 1);</div><div class='del'>-	} else {</div><div class='del'>-		BEGIN_RING(chan, NvSubSw, 0x0150, 1);</div><div class='del'>-	}</div><div class='del'>-	OUT_RING (chan, fence-&gt;sequence);</div><div class='del'>-	FIRE_RING(chan);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-nouveau_fence_work(struct nouveau_fence *fence,</div><div class='del'>-		   void (*work)(void *priv, bool signalled),</div><div class='del'>-		   void *priv)</div><div class='del'>-{</div><div class='del'>-	BUG_ON(fence-&gt;work);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;fence-&gt;channel-&gt;fence.lock);</div><div class='del'>-</div><div class='del'>-	if (fence-&gt;signalled) {</div><div class='del'>-		work(priv, true);</div><div class='del'>-	} else {</div><div class='del'>-		fence-&gt;work = work;</div><div class='del'>-		fence-&gt;priv = priv;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;fence-&gt;channel-&gt;fence.lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-__nouveau_fence_unref(void **sync_obj)</div><div class='del'>-{</div><div class='del'>-	struct nouveau_fence *fence = nouveau_fence(*sync_obj);</div><div class='del'>-</div><div class='del'>-	if (fence)</div><div class='del'>-		kref_put(&amp;fence-&gt;refcount, nouveau_fence_del);</div><div class='del'>-	*sync_obj = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void *</div><div class='del'>-__nouveau_fence_ref(void *sync_obj)</div><div class='del'>-{</div><div class='del'>-	struct nouveau_fence *fence = nouveau_fence(sync_obj);</div><div class='del'>-</div><div class='del'>-	kref_get(&amp;fence-&gt;refcount);</div><div class='del'>-	return sync_obj;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool</div><div class='del'>-__nouveau_fence_signalled(void *sync_obj, void *sync_arg)</div><div class='add'>+nouveau_fence_done(struct nouveau_fence *fence)</div><div class='ctx'> {</div><div class='del'>-	struct nouveau_fence *fence = nouveau_fence(sync_obj);</div><div class='del'>-	struct nouveau_channel *chan = fence-&gt;channel;</div><div class='del'>-</div><div class='del'>-	if (fence-&gt;signalled)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	nouveau_fence_update(chan);</div><div class='del'>-	return fence-&gt;signalled;</div><div class='add'>+	if (fence-&gt;channel)</div><div class='add'>+		nouveau_fence_update(fence-&gt;channel);</div><div class='add'>+	return !fence-&gt;channel;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='del'>-__nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)</div><div class='add'>+nouveau_fence_wait(struct nouveau_fence *fence, bool lazy, bool intr)</div><div class='ctx'> {</div><div class='del'>-	unsigned long timeout = jiffies + (3 * DRM_HZ);</div><div class='ctx'> 	unsigned long sleep_time = NSEC_PER_MSEC / 1000;</div><div class='ctx'> 	ktime_t t;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	while (1) {</div><div class='del'>-		if (__nouveau_fence_signalled(sync_obj, sync_arg))</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if (time_after_eq(jiffies, timeout)) {</div><div class='add'>+	while (!nouveau_fence_done(fence)) {</div><div class='add'>+		if (fence-&gt;timeout &amp;&amp; time_after_eq(jiffies, fence-&gt;timeout)) {</div><div class='ctx'> 			ret = -EBUSY;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		__set_current_state(intr ? TASK_INTERRUPTIBLE</div><div class='del'>-			: TASK_UNINTERRUPTIBLE);</div><div class='add'>+		__set_current_state(intr ? TASK_INTERRUPTIBLE :</div><div class='add'>+					   TASK_UNINTERRUPTIBLE);</div><div class='ctx'> 		if (lazy) {</div><div class='ctx'> 			t = ktime_set(0, sleep_time);</div><div class='ctx'> 			schedule_hrtimeout(&amp;t, HRTIMER_MODE_REL);</div><div class='hunk'>@@ -261,354 +141,72 @@ __nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	__set_current_state(TASK_RUNNING);</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct nouveau_semaphore *</div><div class='del'>-semaphore_alloc(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_semaphore *sema;</div><div class='del'>-	int size = (dev_priv-&gt;chipset &lt; 0x84) ? 4 : 16;</div><div class='del'>-	int ret, i;</div><div class='del'>-</div><div class='del'>-	if (!USE_SEMA(dev))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	sema = kmalloc(sizeof(*sema), GFP_KERNEL);</div><div class='del'>-	if (!sema)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	ret = drm_mm_pre_get(&amp;dev_priv-&gt;fence.heap);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;dev_priv-&gt;fence.lock);</div><div class='del'>-	sema-&gt;mem = drm_mm_search_free(&amp;dev_priv-&gt;fence.heap, size, 0, 0);</div><div class='del'>-	if (sema-&gt;mem)</div><div class='del'>-		sema-&gt;mem = drm_mm_get_block_atomic(sema-&gt;mem, size, 0);</div><div class='del'>-	spin_unlock(&amp;dev_priv-&gt;fence.lock);</div><div class='del'>-</div><div class='del'>-	if (!sema-&gt;mem)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	kref_init(&amp;sema-&gt;ref);</div><div class='del'>-	sema-&gt;dev = dev;</div><div class='del'>-	for (i = sema-&gt;mem-&gt;start; i &lt; sema-&gt;mem-&gt;start + size; i += 4)</div><div class='del'>-		nouveau_bo_wr32(dev_priv-&gt;fence.bo, i / 4, 0);</div><div class='del'>-</div><div class='del'>-	return sema;</div><div class='del'>-fail:</div><div class='del'>-	kfree(sema);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-semaphore_free(struct kref *ref)</div><div class='del'>-{</div><div class='del'>-	struct nouveau_semaphore *sema =</div><div class='del'>-		container_of(ref, struct nouveau_semaphore, ref);</div><div class='del'>-	struct drm_nouveau_private *dev_priv = sema-&gt;dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;dev_priv-&gt;fence.lock);</div><div class='del'>-	drm_mm_put_block(sema-&gt;mem);</div><div class='del'>-	spin_unlock(&amp;dev_priv-&gt;fence.lock);</div><div class='del'>-</div><div class='del'>-	kfree(sema);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-semaphore_work(void *priv, bool signalled)</div><div class='del'>-{</div><div class='del'>-	struct nouveau_semaphore *sema = priv;</div><div class='del'>-	struct drm_nouveau_private *dev_priv = sema-&gt;dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	if (unlikely(!signalled))</div><div class='del'>-		nouveau_bo_wr32(dev_priv-&gt;fence.bo, sema-&gt;mem-&gt;start / 4, 1);</div><div class='del'>-</div><div class='del'>-	kref_put(&amp;sema-&gt;ref, semaphore_free);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = chan-&gt;dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fence *fence = NULL;</div><div class='del'>-	u64 offset = chan-&gt;fence.vma.offset + sema-&gt;mem-&gt;start;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;chipset &lt; 0x84) {</div><div class='del'>-		ret = RING_SPACE(chan, 4);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 3);</div><div class='del'>-		OUT_RING  (chan, NvSema);</div><div class='del'>-		OUT_RING  (chan, offset);</div><div class='del'>-		OUT_RING  (chan, 1);</div><div class='del'>-	} else</div><div class='del'>-	if (dev_priv-&gt;chipset &lt; 0xc0) {</div><div class='del'>-		ret = RING_SPACE(chan, 7);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);</div><div class='del'>-		OUT_RING  (chan, chan-&gt;vram_handle);</div><div class='del'>-		BEGIN_RING(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);</div><div class='del'>-		OUT_RING  (chan, upper_32_bits(offset));</div><div class='del'>-		OUT_RING  (chan, lower_32_bits(offset));</div><div class='del'>-		OUT_RING  (chan, 1);</div><div class='del'>-		OUT_RING  (chan, 1); /* ACQUIRE_EQ */</div><div class='del'>-	} else {</div><div class='del'>-		ret = RING_SPACE(chan, 5);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		BEGIN_NVC0(chan, 2, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);</div><div class='del'>-		OUT_RING  (chan, upper_32_bits(offset));</div><div class='del'>-		OUT_RING  (chan, lower_32_bits(offset));</div><div class='del'>-		OUT_RING  (chan, 1);</div><div class='del'>-		OUT_RING  (chan, 0x1001); /* ACQUIRE_EQ */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Delay semaphore destruction until its work is done */</div><div class='del'>-	ret = nouveau_fence_new(chan, &amp;fence, true);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	kref_get(&amp;sema-&gt;ref);</div><div class='del'>-	nouveau_fence_work(fence, semaphore_work, sema);</div><div class='del'>-	nouveau_fence_unref(&amp;fence);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = chan-&gt;dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fence *fence = NULL;</div><div class='del'>-	u64 offset = chan-&gt;fence.vma.offset + sema-&gt;mem-&gt;start;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;chipset &lt; 0x84) {</div><div class='del'>-		ret = RING_SPACE(chan, 5);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 2);</div><div class='del'>-		OUT_RING  (chan, NvSema);</div><div class='del'>-		OUT_RING  (chan, offset);</div><div class='del'>-		BEGIN_RING(chan, 0, NV11_SUBCHAN_SEMAPHORE_RELEASE, 1);</div><div class='del'>-		OUT_RING  (chan, 1);</div><div class='del'>-	} else</div><div class='del'>-	if (dev_priv-&gt;chipset &lt; 0xc0) {</div><div class='del'>-		ret = RING_SPACE(chan, 7);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);</div><div class='del'>-		OUT_RING  (chan, chan-&gt;vram_handle);</div><div class='del'>-		BEGIN_RING(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);</div><div class='del'>-		OUT_RING  (chan, upper_32_bits(offset));</div><div class='del'>-		OUT_RING  (chan, lower_32_bits(offset));</div><div class='del'>-		OUT_RING  (chan, 1);</div><div class='del'>-		OUT_RING  (chan, 2); /* RELEASE */</div><div class='del'>-	} else {</div><div class='del'>-		ret = RING_SPACE(chan, 5);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		BEGIN_NVC0(chan, 2, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);</div><div class='del'>-		OUT_RING  (chan, upper_32_bits(offset));</div><div class='del'>-		OUT_RING  (chan, lower_32_bits(offset));</div><div class='del'>-		OUT_RING  (chan, 1);</div><div class='del'>-		OUT_RING  (chan, 0x1002); /* RELEASE */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Delay semaphore destruction until its work is done */</div><div class='del'>-	ret = nouveau_fence_new(chan, &amp;fence, true);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	kref_get(&amp;sema-&gt;ref);</div><div class='del'>-	nouveau_fence_work(fence, semaphore_work, sema);</div><div class='del'>-	nouveau_fence_unref(&amp;fence);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int</div><div class='del'>-nouveau_fence_sync(struct nouveau_fence *fence,</div><div class='del'>-		   struct nouveau_channel *wchan)</div><div class='add'>+nouveau_fence_sync(struct nouveau_fence *fence, struct nouveau_channel *chan)</div><div class='ctx'> {</div><div class='del'>-	struct nouveau_channel *chan = nouveau_fence_channel(fence);</div><div class='del'>-	struct drm_device *dev = wchan-&gt;dev;</div><div class='del'>-	struct nouveau_semaphore *sema;</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	struct nouveau_fence_priv *priv = nv_engine(dev, NVOBJ_ENGINE_FENCE);</div><div class='add'>+	struct nouveau_channel *prev;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (likely(!chan || chan == wchan ||</div><div class='del'>-		   nouveau_fence_signalled(fence)))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	sema = semaphore_alloc(dev);</div><div class='del'>-	if (!sema) {</div><div class='del'>-		/* Early card or broken userspace, fall back to</div><div class='del'>-		 * software sync. */</div><div class='del'>-		ret = nouveau_fence_wait(fence, true, false);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* try to take chan's mutex, if we can't take it right away</div><div class='del'>-	 * we have to fallback to software sync to prevent locking</div><div class='del'>-	 * order issues</div><div class='del'>-	 */</div><div class='del'>-	if (!mutex_trylock(&amp;chan-&gt;mutex)) {</div><div class='del'>-		ret = nouveau_fence_wait(fence, true, false);</div><div class='del'>-		goto out_unref;</div><div class='add'>+	prev = fence ? nouveau_channel_get_unlocked(fence-&gt;channel) : NULL;</div><div class='add'>+	if (prev) {</div><div class='add'>+		if (unlikely(prev != chan &amp;&amp; !nouveau_fence_done(fence))) {</div><div class='add'>+			ret = priv-&gt;sync(fence, prev, chan);</div><div class='add'>+			if (unlikely(ret))</div><div class='add'>+				ret = nouveau_fence_wait(fence, true, false);</div><div class='add'>+		}</div><div class='add'>+		nouveau_channel_put_unlocked(&amp;prev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Make wchan wait until it gets signalled */</div><div class='del'>-	ret = semaphore_acquire(wchan, sema);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_unlock;</div><div class='del'>-</div><div class='del'>-	/* Signal the semaphore from chan */</div><div class='del'>-	ret = semaphore_release(chan, sema);</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	mutex_unlock(&amp;chan-&gt;mutex);</div><div class='del'>-out_unref:</div><div class='del'>-	kref_put(&amp;sema-&gt;ref, semaphore_free);</div><div class='del'>-out:</div><div class='del'>-	if (chan)</div><div class='del'>-		nouveau_channel_put_unlocked(&amp;chan);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int</div><div class='del'>-__nouveau_fence_flush(void *sync_obj, void *sync_arg)</div><div class='add'>+static void</div><div class='add'>+nouveau_fence_del(struct kref *kref)</div><div class='ctx'> {</div><div class='del'>-	return 0;</div><div class='add'>+	struct nouveau_fence *fence = container_of(kref, typeof(*fence), kref);</div><div class='add'>+	kfree(fence);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int</div><div class='del'>-nouveau_fence_channel_init(struct nouveau_channel *chan)</div><div class='add'>+void</div><div class='add'>+nouveau_fence_unref(struct nouveau_fence **pfence)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_gpuobj *obj = NULL;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;card_type &lt; NV_C0) {</div><div class='del'>-		/* Create an NV_SW object for various sync purposes */</div><div class='del'>-		ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ret = RING_SPACE(chan, 2);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		BEGIN_RING(chan, NvSubSw, NV01_SUBCHAN_OBJECT, 1);</div><div class='del'>-		OUT_RING  (chan, NvSw);</div><div class='del'>-		FIRE_RING (chan);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Setup area of memory shared between all channels for x-chan sync */</div><div class='del'>-	if (USE_SEMA(dev) &amp;&amp; dev_priv-&gt;chipset &lt; 0x84) {</div><div class='del'>-		struct ttm_mem_reg *mem = &amp;dev_priv-&gt;fence.bo-&gt;bo.mem;</div><div class='del'>-</div><div class='del'>-		ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_FROM_MEMORY,</div><div class='del'>-					     mem-&gt;start &lt;&lt; PAGE_SHIFT,</div><div class='del'>-					     mem-&gt;size, NV_MEM_ACCESS_RW,</div><div class='del'>-					     NV_MEM_TARGET_VRAM, &amp;obj);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ret = nouveau_ramht_insert(chan, NvSema, obj);</div><div class='del'>-		nouveau_gpuobj_ref(NULL, &amp;obj);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	} else</div><div class='del'>-	if (USE_SEMA(dev)) {</div><div class='del'>-		/* map fence bo into channel's vm */</div><div class='del'>-		ret = nouveau_bo_vma_add(dev_priv-&gt;fence.bo, chan-&gt;vm,</div><div class='del'>-					 &amp;chan-&gt;fence.vma);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	atomic_set(&amp;chan-&gt;fence.last_sequence_irq, 0);</div><div class='del'>-	return 0;</div><div class='add'>+	if (*pfence)</div><div class='add'>+		kref_put(&amp;(*pfence)-&gt;kref, nouveau_fence_del);</div><div class='add'>+	*pfence = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void</div><div class='del'>-nouveau_fence_channel_fini(struct nouveau_channel *chan)</div><div class='add'>+struct nouveau_fence *</div><div class='add'>+nouveau_fence_ref(struct nouveau_fence *fence)</div><div class='ctx'> {</div><div class='del'>-	struct drm_nouveau_private *dev_priv = chan-&gt;dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fence *tmp, *fence;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;chan-&gt;fence.lock);</div><div class='del'>-	list_for_each_entry_safe(fence, tmp, &amp;chan-&gt;fence.pending, entry) {</div><div class='del'>-		fence-&gt;signalled = true;</div><div class='del'>-		list_del(&amp;fence-&gt;entry);</div><div class='del'>-</div><div class='del'>-		if (unlikely(fence-&gt;work))</div><div class='del'>-			fence-&gt;work(fence-&gt;priv, false);</div><div class='del'>-</div><div class='del'>-		kref_put(&amp;fence-&gt;refcount, nouveau_fence_del);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;chan-&gt;fence.lock);</div><div class='del'>-</div><div class='del'>-	nouveau_bo_vma_del(dev_priv-&gt;fence.bo, &amp;chan-&gt;fence.vma);</div><div class='add'>+	kref_get(&amp;fence-&gt;kref);</div><div class='add'>+	return fence;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='del'>-nouveau_fence_init(struct drm_device *dev)</div><div class='add'>+nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **pfence)</div><div class='ctx'> {</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int size = (dev_priv-&gt;chipset &lt; 0x84) ? 4096 : 16384;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* Create a shared VRAM heap for cross-channel sync. */</div><div class='del'>-	if (USE_SEMA(dev)) {</div><div class='del'>-		ret = nouveau_bo_new(dev, size, 0, TTM_PL_FLAG_VRAM,</div><div class='del'>-				     0, 0, &amp;dev_priv-&gt;fence.bo);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+	struct nouveau_fence *fence;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-		ret = nouveau_bo_pin(dev_priv-&gt;fence.bo, TTM_PL_FLAG_VRAM);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto fail;</div><div class='add'>+	if (unlikely(!chan-&gt;engctx[NVOBJ_ENGINE_FENCE]))</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-		ret = nouveau_bo_map(dev_priv-&gt;fence.bo);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto fail;</div><div class='add'>+	fence = kzalloc(sizeof(*fence), GFP_KERNEL);</div><div class='add'>+	if (!fence)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	kref_init(&amp;fence-&gt;kref);</div><div class='ctx'> </div><div class='del'>-		ret = drm_mm_init(&amp;dev_priv-&gt;fence.heap, 0,</div><div class='del'>-				  dev_priv-&gt;fence.bo-&gt;bo.mem.size);</div><div class='add'>+	if (chan) {</div><div class='add'>+		ret = nouveau_fence_emit(fence, chan);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto fail;</div><div class='del'>-</div><div class='del'>-		spin_lock_init(&amp;dev_priv-&gt;fence.lock);</div><div class='add'>+			nouveau_fence_unref(&amp;fence);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-fail:</div><div class='del'>-	nouveau_bo_unmap(dev_priv-&gt;fence.bo);</div><div class='del'>-	nouveau_bo_ref(NULL, &amp;dev_priv-&gt;fence.bo);</div><div class='add'>+	*pfence = fence;</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-nouveau_fence_fini(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	if (USE_SEMA(dev)) {</div><div class='del'>-		drm_mm_takedown(&amp;dev_priv-&gt;fence.heap);</div><div class='del'>-		nouveau_bo_unmap(dev_priv-&gt;fence.bo);</div><div class='del'>-		nouveau_bo_unpin(dev_priv-&gt;fence.bo);</div><div class='del'>-		nouveau_bo_ref(NULL, &amp;dev_priv-&gt;fence.bo);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.h b/drivers/gpu/drm/nouveau/nouveau_fence.h<br/>new file mode 100644<br/>index 000000000000..82ba733393ae<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_fence.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_fence.h</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+#ifndef __NOUVEAU_FENCE_H__</div><div class='add'>+#define __NOUVEAU_FENCE_H__</div><div class='add'>+</div><div class='add'>+struct nouveau_fence {</div><div class='add'>+	struct list_head head;</div><div class='add'>+	struct kref kref;</div><div class='add'>+</div><div class='add'>+	struct nouveau_channel *channel;</div><div class='add'>+	unsigned long timeout;</div><div class='add'>+	u32 sequence;</div><div class='add'>+</div><div class='add'>+	void (*work)(void *priv, bool signalled);</div><div class='add'>+	void *priv;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int  nouveau_fence_new(struct nouveau_channel *, struct nouveau_fence **);</div><div class='add'>+struct nouveau_fence *</div><div class='add'>+nouveau_fence_ref(struct nouveau_fence *);</div><div class='add'>+void nouveau_fence_unref(struct nouveau_fence **);</div><div class='add'>+</div><div class='add'>+int  nouveau_fence_emit(struct nouveau_fence *, struct nouveau_channel *);</div><div class='add'>+bool nouveau_fence_done(struct nouveau_fence *);</div><div class='add'>+int  nouveau_fence_wait(struct nouveau_fence *, bool lazy, bool intr);</div><div class='add'>+int  nouveau_fence_sync(struct nouveau_fence *, struct nouveau_channel *);</div><div class='add'>+void nouveau_fence_idle(struct nouveau_channel *);</div><div class='add'>+void nouveau_fence_update(struct nouveau_channel *);</div><div class='add'>+</div><div class='add'>+struct nouveau_fence_chan {</div><div class='add'>+	struct list_head pending;</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	u32 sequence;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nouveau_fence_priv {</div><div class='add'>+	struct nouveau_exec_engine engine;</div><div class='add'>+	int (*emit)(struct nouveau_fence *);</div><div class='add'>+	int (*sync)(struct nouveau_fence *, struct nouveau_channel *,</div><div class='add'>+		    struct nouveau_channel *);</div><div class='add'>+	u32 (*read)(struct nouveau_channel *);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void nouveau_fence_context_new(struct nouveau_fence_chan *);</div><div class='add'>+void nouveau_fence_context_del(struct nouveau_fence_chan *);</div><div class='add'>+</div><div class='add'>+int nv04_fence_create(struct drm_device *dev);</div><div class='add'>+int nv04_fence_mthd(struct nouveau_channel *, u32, u32, u32);</div><div class='add'>+</div><div class='add'>+int nv10_fence_create(struct drm_device *dev);</div><div class='add'>+int nv84_fence_create(struct drm_device *dev);</div><div class='add'>+int nvc0_fence_create(struct drm_device *dev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_fifo.h b/drivers/gpu/drm/nouveau/nouveau_fifo.h<br/>new file mode 100644<br/>index 000000000000..ce99cab2f257<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_fifo.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_fifo.h</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+#ifndef __NOUVEAU_FIFO_H__</div><div class='add'>+#define __NOUVEAU_FIFO_H__</div><div class='add'>+</div><div class='add'>+struct nouveau_fifo_priv {</div><div class='add'>+	struct nouveau_exec_engine base;</div><div class='add'>+	u32 channels;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nouveau_fifo_chan {</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+bool nv04_fifo_cache_pull(struct drm_device *, bool);</div><div class='add'>+void nv04_fifo_context_del(struct nouveau_channel *, int);</div><div class='add'>+int  nv04_fifo_fini(struct drm_device *, int, bool);</div><div class='add'>+int  nv04_fifo_init(struct drm_device *, int);</div><div class='add'>+void nv04_fifo_isr(struct drm_device *);</div><div class='add'>+void nv04_fifo_destroy(struct drm_device *, int);</div><div class='add'>+</div><div class='add'>+void nv50_fifo_playlist_update(struct drm_device *);</div><div class='add'>+void nv50_fifo_destroy(struct drm_device *, int);</div><div class='add'>+void nv50_fifo_tlb_flush(struct drm_device *, int);</div><div class='add'>+</div><div class='add'>+int  nv04_fifo_create(struct drm_device *);</div><div class='add'>+int  nv10_fifo_create(struct drm_device *);</div><div class='add'>+int  nv17_fifo_create(struct drm_device *);</div><div class='add'>+int  nv40_fifo_create(struct drm_device *);</div><div class='add'>+int  nv50_fifo_create(struct drm_device *);</div><div class='add'>+int  nv84_fifo_create(struct drm_device *);</div><div class='add'>+int  nvc0_fifo_create(struct drm_device *);</div><div class='add'>+int  nve0_fifo_create(struct drm_device *);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c<br/>index ed52a6f41613..30f542316944 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_gem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_gem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_gem.c</a></div><div class='hunk'>@@ -23,12 +23,14 @@</div><div class='ctx'>  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/dma-buf.h&gt;</div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "drm.h"</div><div class='ctx'> </div><div class='ctx'> #include "nouveau_drv.h"</div><div class='ctx'> #include "nouveau_drm.h"</div><div class='ctx'> #include "nouveau_dma.h"</div><div class='add'>+#include "nouveau_fence.h"</div><div class='ctx'> </div><div class='ctx'> #define nouveau_gem_pushbuf_sync(chan) 0</div><div class='ctx'> </div><div class='hunk'>@@ -53,6 +55,9 @@ nouveau_gem_object_del(struct drm_gem_object *gem)</div><div class='ctx'> 		nouveau_bo_unpin(nvbo);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (gem-&gt;import_attach)</div><div class='add'>+		drm_prime_gem_destroy(gem, nvbo-&gt;bo.sg);</div><div class='add'>+</div><div class='ctx'> 	ttm_bo_unref(&amp;bo);</div><div class='ctx'> </div><div class='ctx'> 	drm_gem_object_release(gem);</div><div class='hunk'>@@ -139,7 +144,7 @@ nouveau_gem_new(struct drm_device *dev, int size, int align, uint32_t domain,</div><div class='ctx'> 		flags |= TTM_PL_FLAG_SYSTEM;</div><div class='ctx'> </div><div class='ctx'> 	ret = nouveau_bo_new(dev, size, align, flags, tile_mode,</div><div class='del'>-			     tile_flags, pnvbo);</div><div class='add'>+			     tile_flags, NULL, pnvbo);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	nvbo = *pnvbo;</div><div class='hunk'>@@ -704,7 +709,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (chan-&gt;dma.ib_max) {</div><div class='del'>-		ret = nouveau_dma_wait(chan, req-&gt;nr_push + 1, 6);</div><div class='add'>+		ret = nouveau_dma_wait(chan, req-&gt;nr_push + 1, 16);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			NV_INFO(dev, "nv50cal_space: %d\n", ret);</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -774,7 +779,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = nouveau_fence_new(chan, &amp;fence, true);</div><div class='add'>+	ret = nouveau_fence_new(chan, &amp;fence);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		NV_ERROR(dev, "error fencing pushbuf: %d\n", ret);</div><div class='ctx'> 		WIND_RING(chan);</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_gpio.c b/drivers/gpu/drm/nouveau/nouveau_gpio.c<br/>index a580cc62337a..82c19e82ff02 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_gpio.c</a></div><div class='hunk'>@@ -387,7 +387,7 @@ nouveau_gpio_reset(struct drm_device *dev)</div><div class='ctx'> 		if (dev_priv-&gt;card_type &gt;= NV_D0) {</div><div class='ctx'> 			nv_mask(dev, 0x00d610 + (line * 4), 0xff, unk0);</div><div class='ctx'> 			if (unk1--)</div><div class='del'>-				nv_mask(dev, 0x00d640 + (unk1 * 4), 0xff, line);</div><div class='add'>+				nv_mask(dev, 0x00d740 + (unk1 * 4), 0xff, line);</div><div class='ctx'> 		} else</div><div class='ctx'> 		if (dev_priv-&gt;card_type &gt;= NV_50) {</div><div class='ctx'> 			static const u32 regs[] = { 0xe100, 0xe28c };</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_grctx.h b/drivers/gpu/drm/nouveau/nouveau_grctx.h<br/>index 86c2e374e938..b0795ececbda 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_grctx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_grctx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_grctx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_grctx.h</a></div><div class='hunk'>@@ -18,7 +18,6 @@ struct nouveau_grctx {</div><div class='ctx'> 	uint32_t ctxvals_base;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef CP_CTX</div><div class='ctx'> static inline void</div><div class='ctx'> cp_out(struct nouveau_grctx *ctx, uint32_t inst)</div><div class='ctx'> {</div><div class='hunk'>@@ -88,10 +87,8 @@ _cp_bra(struct nouveau_grctx *ctx, u32 mod, int flag, int state, int name)</div><div class='ctx'> 		    (state ? 0 : CP_BRA_IF_CLEAR));</div><div class='ctx'> }</div><div class='ctx'> #define cp_bra(c, f, s, n) _cp_bra((c), 0, CP_FLAG_##f, CP_FLAG_##f##_##s, n)</div><div class='del'>-#ifdef CP_BRA_MOD</div><div class='ctx'> #define cp_cal(c, f, s, n) _cp_bra((c), 1, CP_FLAG_##f, CP_FLAG_##f##_##s, n)</div><div class='ctx'> #define cp_ret(c, f, s) _cp_bra((c), 2, CP_FLAG_##f, CP_FLAG_##f##_##s, 0)</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='ctx'> _cp_wait(struct nouveau_grctx *ctx, int flag, int state)</div><div class='hunk'>@@ -128,6 +125,5 @@ gr_def(struct nouveau_grctx *ctx, uint32_t reg, uint32_t val)</div><div class='ctx'> </div><div class='ctx'> 	nv_wo32(ctx-&gt;data, reg * 4, val);</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_hdmi.c b/drivers/gpu/drm/nouveau/nouveau_hdmi.c<br/>index 59ea1c14eca0..c3de36384522 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_hdmi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_hdmi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_hdmi.c</a></div><div class='hunk'>@@ -32,7 +32,9 @@ static bool</div><div class='ctx'> hdmi_sor(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = encoder-&gt;dev-&gt;dev_private;</div><div class='del'>-	if (dev_priv-&gt;chipset &lt; 0xa3)</div><div class='add'>+	if (dev_priv-&gt;chipset &lt;  0xa3 ||</div><div class='add'>+	    dev_priv-&gt;chipset == 0xaa ||</div><div class='add'>+	    dev_priv-&gt;chipset == 0xac)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_hw.c b/drivers/gpu/drm/nouveau/nouveau_hw.c<br/>index ba896e54b799..b87ad3bd7739 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_hw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_hw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_hw.c</a></div><div class='hunk'>@@ -1018,11 +1018,6 @@ nv_load_state_ext(struct drm_device *dev, int head,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	NVWriteCRTC(dev, head, NV_PCRTC_START, regp-&gt;fb_start);</div><div class='del'>-</div><div class='del'>-	/* Enable vblank interrupts. */</div><div class='del'>-	NVWriteCRTC(dev, head, NV_PCRTC_INTR_EN_0,</div><div class='del'>-		    (dev-&gt;vblank_enabled[head] ? 1 : 0));</div><div class='del'>-	NVWriteCRTC(dev, head, NV_PCRTC_INTR_0, NV_PCRTC_INTR_0_VBLANK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_i2c.c b/drivers/gpu/drm/nouveau/nouveau_i2c.c<br/>index e2be95af2e52..77e564667b5c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_i2c.c</a></div><div class='hunk'>@@ -29,10 +29,6 @@</div><div class='ctx'> #include "nouveau_i2c.h"</div><div class='ctx'> #include "nouveau_hw.h"</div><div class='ctx'> </div><div class='del'>-#define T_TIMEOUT  2200000</div><div class='del'>-#define T_RISEFALL 1000</div><div class='del'>-#define T_HOLD     5000</div><div class='del'>-</div><div class='ctx'> static void</div><div class='ctx'> i2c_drive_scl(void *data, int state)</div><div class='ctx'> {</div><div class='hunk'>@@ -113,175 +109,6 @@ i2c_sense_sda(void *data)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-i2c_delay(struct nouveau_i2c_chan *port, u32 nsec)</div><div class='del'>-{</div><div class='del'>-	udelay((nsec + 500) / 1000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool</div><div class='del'>-i2c_raise_scl(struct nouveau_i2c_chan *port)</div><div class='del'>-{</div><div class='del'>-	u32 timeout = T_TIMEOUT / T_RISEFALL;</div><div class='del'>-</div><div class='del'>-	i2c_drive_scl(port, 1);</div><div class='del'>-	do {</div><div class='del'>-		i2c_delay(port, T_RISEFALL);</div><div class='del'>-	} while (!i2c_sense_scl(port) &amp;&amp; --timeout);</div><div class='del'>-</div><div class='del'>-	return timeout != 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-i2c_start(struct nouveau_i2c_chan *port)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	port-&gt;state  = i2c_sense_scl(port);</div><div class='del'>-	port-&gt;state |= i2c_sense_sda(port) &lt;&lt; 1;</div><div class='del'>-	if (port-&gt;state != 3) {</div><div class='del'>-		i2c_drive_scl(port, 0);</div><div class='del'>-		i2c_drive_sda(port, 1);</div><div class='del'>-		if (!i2c_raise_scl(port))</div><div class='del'>-			ret = -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	i2c_drive_sda(port, 0);</div><div class='del'>-	i2c_delay(port, T_HOLD);</div><div class='del'>-	i2c_drive_scl(port, 0);</div><div class='del'>-	i2c_delay(port, T_HOLD);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-i2c_stop(struct nouveau_i2c_chan *port)</div><div class='del'>-{</div><div class='del'>-	i2c_drive_scl(port, 0);</div><div class='del'>-	i2c_drive_sda(port, 0);</div><div class='del'>-	i2c_delay(port, T_RISEFALL);</div><div class='del'>-</div><div class='del'>-	i2c_drive_scl(port, 1);</div><div class='del'>-	i2c_delay(port, T_HOLD);</div><div class='del'>-	i2c_drive_sda(port, 1);</div><div class='del'>-	i2c_delay(port, T_HOLD);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-i2c_bitw(struct nouveau_i2c_chan *port, int sda)</div><div class='del'>-{</div><div class='del'>-	i2c_drive_sda(port, sda);</div><div class='del'>-	i2c_delay(port, T_RISEFALL);</div><div class='del'>-</div><div class='del'>-	if (!i2c_raise_scl(port))</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-	i2c_delay(port, T_HOLD);</div><div class='del'>-</div><div class='del'>-	i2c_drive_scl(port, 0);</div><div class='del'>-	i2c_delay(port, T_HOLD);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-i2c_bitr(struct nouveau_i2c_chan *port)</div><div class='del'>-{</div><div class='del'>-	int sda;</div><div class='del'>-</div><div class='del'>-	i2c_drive_sda(port, 1);</div><div class='del'>-	i2c_delay(port, T_RISEFALL);</div><div class='del'>-</div><div class='del'>-	if (!i2c_raise_scl(port))</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-	i2c_delay(port, T_HOLD);</div><div class='del'>-</div><div class='del'>-	sda = i2c_sense_sda(port);</div><div class='del'>-</div><div class='del'>-	i2c_drive_scl(port, 0);</div><div class='del'>-	i2c_delay(port, T_HOLD);</div><div class='del'>-	return sda;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-i2c_get_byte(struct nouveau_i2c_chan *port, u8 *byte, bool last)</div><div class='del'>-{</div><div class='del'>-	int i, bit;</div><div class='del'>-</div><div class='del'>-	*byte = 0;</div><div class='del'>-	for (i = 7; i &gt;= 0; i--) {</div><div class='del'>-		bit = i2c_bitr(port);</div><div class='del'>-		if (bit &lt; 0)</div><div class='del'>-			return bit;</div><div class='del'>-		*byte |= bit &lt;&lt; i;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return i2c_bitw(port, last ? 1 : 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-i2c_put_byte(struct nouveau_i2c_chan *port, u8 byte)</div><div class='del'>-{</div><div class='del'>-	int i, ret;</div><div class='del'>-	for (i = 7; i &gt;= 0; i--) {</div><div class='del'>-		ret = i2c_bitw(port, !!(byte &amp; (1 &lt;&lt; i)));</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = i2c_bitr(port);</div><div class='del'>-	if (ret == 1) /* nack */</div><div class='del'>-		ret = -EIO;</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-i2c_addr(struct nouveau_i2c_chan *port, struct i2c_msg *msg)</div><div class='del'>-{</div><div class='del'>-	u32 addr = msg-&gt;addr &lt;&lt; 1;</div><div class='del'>-	if (msg-&gt;flags &amp; I2C_M_RD)</div><div class='del'>-		addr |= 1;</div><div class='del'>-	return i2c_put_byte(port, addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-i2c_bit_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)</div><div class='del'>-{</div><div class='del'>-	struct nouveau_i2c_chan *port = (struct nouveau_i2c_chan *)adap;</div><div class='del'>-	struct i2c_msg *msg = msgs;</div><div class='del'>-	int ret = 0, mcnt = num;</div><div class='del'>-</div><div class='del'>-	while (!ret &amp;&amp; mcnt--) {</div><div class='del'>-		u8 remaining = msg-&gt;len;</div><div class='del'>-		u8 *ptr = msg-&gt;buf;</div><div class='del'>-</div><div class='del'>-		ret = i2c_start(port);</div><div class='del'>-		if (ret == 0)</div><div class='del'>-			ret = i2c_addr(port, msg);</div><div class='del'>-</div><div class='del'>-		if (msg-&gt;flags &amp; I2C_M_RD) {</div><div class='del'>-			while (!ret &amp;&amp; remaining--)</div><div class='del'>-				ret = i2c_get_byte(port, ptr++, !remaining);</div><div class='del'>-		} else {</div><div class='del'>-			while (!ret &amp;&amp; remaining--)</div><div class='del'>-				ret = i2c_put_byte(port, *ptr++);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		msg++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	i2c_stop(port);</div><div class='del'>-	return (ret &lt; 0) ? ret : num;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32</div><div class='del'>-i2c_bit_func(struct i2c_adapter *adap)</div><div class='del'>-{</div><div class='del'>-	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const struct i2c_algorithm nouveau_i2c_bit_algo = {</div><div class='del'>-	.master_xfer = i2c_bit_xfer,</div><div class='del'>-	.functionality = i2c_bit_func</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const uint32_t nv50_i2c_port[] = {</div><div class='ctx'> 	0x00e138, 0x00e150, 0x00e168, 0x00e180,</div><div class='ctx'> 	0x00e254, 0x00e274, 0x00e764, 0x00e780,</div><div class='hunk'>@@ -384,12 +211,10 @@ nouveau_i2c_init(struct drm_device *dev)</div><div class='ctx'> 		case 0: /* NV04:NV50 */</div><div class='ctx'> 			port-&gt;drive = entry[0];</div><div class='ctx'> 			port-&gt;sense = entry[1];</div><div class='del'>-			port-&gt;adapter.algo = &amp;nouveau_i2c_bit_algo;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 4: /* NV4E */</div><div class='ctx'> 			port-&gt;drive = 0x600800 + entry[1];</div><div class='ctx'> 			port-&gt;sense = port-&gt;drive;</div><div class='del'>-			port-&gt;adapter.algo = &amp;nouveau_i2c_bit_algo;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 5: /* NV50- */</div><div class='ctx'> 			port-&gt;drive = entry[0] &amp; 0x0f;</div><div class='hunk'>@@ -402,7 +227,6 @@ nouveau_i2c_init(struct drm_device *dev)</div><div class='ctx'> 				port-&gt;drive = 0x00d014 + (port-&gt;drive * 0x20);</div><div class='ctx'> 				port-&gt;sense = port-&gt;drive;</div><div class='ctx'> 			}</div><div class='del'>-			port-&gt;adapter.algo = &amp;nouveau_i2c_bit_algo;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 6: /* NV50- DP AUX */</div><div class='ctx'> 			port-&gt;drive = entry[0];</div><div class='hunk'>@@ -413,7 +237,7 @@ nouveau_i2c_init(struct drm_device *dev)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (!port-&gt;adapter.algo) {</div><div class='add'>+		if (!port-&gt;adapter.algo &amp;&amp; !port-&gt;drive) {</div><div class='ctx'> 			NV_ERROR(dev, "I2C%d: type %d index %x/%x unknown\n",</div><div class='ctx'> 				 i, port-&gt;type, port-&gt;drive, port-&gt;sense);</div><div class='ctx'> 			kfree(port);</div><div class='hunk'>@@ -429,7 +253,26 @@ nouveau_i2c_init(struct drm_device *dev)</div><div class='ctx'> 		port-&gt;dcb = ROM32(entry[0]);</div><div class='ctx'> 		i2c_set_adapdata(&amp;port-&gt;adapter, i2c);</div><div class='ctx'> </div><div class='del'>-		ret = i2c_add_adapter(&amp;port-&gt;adapter);</div><div class='add'>+		if (port-&gt;adapter.algo != &amp;nouveau_dp_i2c_algo) {</div><div class='add'>+			port-&gt;adapter.algo_data = &amp;port-&gt;bit;</div><div class='add'>+			port-&gt;bit.udelay = 10;</div><div class='add'>+			port-&gt;bit.timeout = usecs_to_jiffies(2200);</div><div class='add'>+			port-&gt;bit.data = port;</div><div class='add'>+			port-&gt;bit.setsda = i2c_drive_sda;</div><div class='add'>+			port-&gt;bit.setscl = i2c_drive_scl;</div><div class='add'>+			port-&gt;bit.getsda = i2c_sense_sda;</div><div class='add'>+			port-&gt;bit.getscl = i2c_sense_scl;</div><div class='add'>+</div><div class='add'>+			i2c_drive_scl(port, 0);</div><div class='add'>+			i2c_drive_sda(port, 1);</div><div class='add'>+			i2c_drive_scl(port, 1);</div><div class='add'>+</div><div class='add'>+			ret = i2c_bit_add_bus(&amp;port-&gt;adapter);</div><div class='add'>+		} else {</div><div class='add'>+			port-&gt;adapter.algo = &amp;nouveau_dp_i2c_algo;</div><div class='add'>+			ret = i2c_add_adapter(&amp;port-&gt;adapter);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			NV_ERROR(dev, "I2C%d: failed register: %d\n", i, ret);</div><div class='ctx'> 			kfree(port);</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_i2c.h b/drivers/gpu/drm/nouveau/nouveau_i2c.h<br/>index 4d2e4e9031be..1d083893a4d7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_i2c.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_i2c.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_i2c.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_i2c.h</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> struct nouveau_i2c_chan {</div><div class='ctx'> 	struct i2c_adapter adapter;</div><div class='ctx'> 	struct drm_device *dev;</div><div class='add'>+	struct i2c_algo_bit_data bit;</div><div class='ctx'> 	struct list_head head;</div><div class='ctx'> 	u8  index;</div><div class='ctx'> 	u8  type;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c<br/>index b08065f981df..5b498ea32e14 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_mem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_mem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_mem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_mem.c</a></div><div class='hunk'>@@ -39,6 +39,8 @@</div><div class='ctx'> #include "nouveau_pm.h"</div><div class='ctx'> #include "nouveau_mm.h"</div><div class='ctx'> #include "nouveau_vm.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='add'>+#include "nouveau_fence.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * NV10-NV40 tiling helpers</div><div class='hunk'>@@ -50,7 +52,6 @@ nv10_mem_update_tile_region(struct drm_device *dev,</div><div class='ctx'> 			    uint32_t size, uint32_t pitch, uint32_t flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='ctx'> 	struct nouveau_fb_engine *pfb = &amp;dev_priv-&gt;engine.fb;</div><div class='ctx'> 	int i = tile - dev_priv-&gt;tile.reg, j;</div><div class='ctx'> 	unsigned long save;</div><div class='hunk'>@@ -64,8 +65,8 @@ nv10_mem_update_tile_region(struct drm_device *dev,</div><div class='ctx'> 		pfb-&gt;init_tile_region(dev, i, addr, size, pitch, flags);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, save);</div><div class='del'>-	pfifo-&gt;reassign(dev, false);</div><div class='del'>-	pfifo-&gt;cache_pull(dev, false);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHES, 0);</div><div class='add'>+	nv04_fifo_cache_pull(dev, false);</div><div class='ctx'> </div><div class='ctx'> 	nouveau_wait_for_idle(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -75,8 +76,8 @@ nv10_mem_update_tile_region(struct drm_device *dev,</div><div class='ctx'> 			dev_priv-&gt;eng[j]-&gt;set_tile_region(dev, i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pfifo-&gt;cache_pull(dev, true);</div><div class='del'>-	pfifo-&gt;reassign(dev, true);</div><div class='add'>+	nv04_fifo_cache_pull(dev, true);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHES, 1);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, save);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -89,7 +90,7 @@ nv10_mem_get_tile_region(struct drm_device *dev, int i)</div><div class='ctx'> 	spin_lock(&amp;dev_priv-&gt;tile.lock);</div><div class='ctx'> </div><div class='ctx'> 	if (!tile-&gt;used &amp;&amp;</div><div class='del'>-	    (!tile-&gt;fence || nouveau_fence_signalled(tile-&gt;fence)))</div><div class='add'>+	    (!tile-&gt;fence || nouveau_fence_done(tile-&gt;fence)))</div><div class='ctx'> 		tile-&gt;used = true;</div><div class='ctx'> 	else</div><div class='ctx'> 		tile = NULL;</div><div class='hunk'>@@ -416,7 +417,7 @@ nouveau_mem_vram_init(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (dev_priv-&gt;card_type &lt; NV_50) {</div><div class='ctx'> 		ret = nouveau_bo_new(dev, 256*1024, 0, TTM_PL_FLAG_VRAM,</div><div class='del'>-				     0, 0, &amp;dev_priv-&gt;vga_ram);</div><div class='add'>+				     0, 0, NULL, &amp;dev_priv-&gt;vga_ram);</div><div class='ctx'> 		if (ret == 0)</div><div class='ctx'> 			ret = nouveau_bo_pin(dev_priv-&gt;vga_ram,</div><div class='ctx'> 					     TTM_PL_FLAG_VRAM);</div><div class='hunk'>@@ -843,6 +844,7 @@ nouveau_mem_timing_calc(struct drm_device *dev, u32 freq,</div><div class='ctx'> 		ret = nv50_mem_timing_calc(dev, freq, e, len, boot, t);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NV_C0:</div><div class='add'>+	case NV_D0:</div><div class='ctx'> 		ret = nvc0_mem_timing_calc(dev, freq, e, len, boot, t);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -977,6 +979,8 @@ nouveau_mem_exec(struct nouveau_mem_exec_func *exec,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NV_MEM_TYPE_DDR3:</div><div class='ctx'> 		tDLLK = 12000;</div><div class='add'>+		tCKSRE = 2000;</div><div class='add'>+		tXS = 1000;</div><div class='ctx'> 		mr1_dlloff = 0x00000001;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NV_MEM_TYPE_GDDR3:</div><div class='hunk'>@@ -1023,6 +1027,7 @@ nouveau_mem_exec(struct nouveau_mem_exec_func *exec,</div><div class='ctx'> 	exec-&gt;refresh_self(exec, false);</div><div class='ctx'> 	exec-&gt;refresh_auto(exec, true);</div><div class='ctx'> 	exec-&gt;wait(exec, tXS);</div><div class='add'>+	exec-&gt;wait(exec, tXS);</div><div class='ctx'> </div><div class='ctx'> 	/* update MRs */</div><div class='ctx'> 	if (mr[2] != info-&gt;mr[2]) {</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c<br/>index cc419fae794b..b190cc01c820 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_object.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_object.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_object.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_object.c</a></div><div class='hunk'>@@ -34,9 +34,10 @@</div><div class='ctx'> #include "drm.h"</div><div class='ctx'> #include "nouveau_drv.h"</div><div class='ctx'> #include "nouveau_drm.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> #include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_software.h"</div><div class='ctx'> #include "nouveau_vm.h"</div><div class='del'>-#include "nv50_display.h"</div><div class='ctx'> </div><div class='ctx'> struct nouveau_gpuobj_method {</div><div class='ctx'> 	struct list_head head;</div><div class='hunk'>@@ -120,12 +121,13 @@ nouveau_gpuobj_mthd_call2(struct drm_device *dev, int chid,</div><div class='ctx'> 			  u32 class, u32 mthd, u32 data)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct nouveau_channel *chan = NULL;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;channels.lock, flags);</div><div class='del'>-	if (chid &gt;= 0 &amp;&amp; chid &lt; dev_priv-&gt;engine.fifo.channels)</div><div class='add'>+	if (chid &gt;= 0 &amp;&amp; chid &lt; pfifo-&gt;channels)</div><div class='ctx'> 		chan = dev_priv-&gt;channels.ptr[chid];</div><div class='ctx'> 	if (chan)</div><div class='ctx'> 		ret = nouveau_gpuobj_mthd_call(chan, class, mthd, data);</div><div class='hunk'>@@ -133,37 +135,6 @@ nouveau_gpuobj_mthd_call2(struct drm_device *dev, int chid,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* NVidia uses context objects to drive drawing operations.</div><div class='del'>-</div><div class='del'>-   Context objects can be selected into 8 subchannels in the FIFO,</div><div class='del'>-   and then used via DMA command buffers.</div><div class='del'>-</div><div class='del'>-   A context object is referenced by a user defined handle (CARD32). The HW</div><div class='del'>-   looks up graphics objects in a hash table in the instance RAM.</div><div class='del'>-</div><div class='del'>-   An entry in the hash table consists of 2 CARD32. The first CARD32 contains</div><div class='del'>-   the handle, the second one a bitfield, that contains the address of the</div><div class='del'>-   object in instance RAM.</div><div class='del'>-</div><div class='del'>-   The format of the second CARD32 seems to be:</div><div class='del'>-</div><div class='del'>-   NV4 to NV30:</div><div class='del'>-</div><div class='del'>-   15: 0  instance_addr &gt;&gt; 4</div><div class='del'>-   17:16  engine (here uses 1 = graphics)</div><div class='del'>-   28:24  channel id (here uses 0)</div><div class='del'>-   31	  valid (use 1)</div><div class='del'>-</div><div class='del'>-   NV40:</div><div class='del'>-</div><div class='del'>-   15: 0  instance_addr &gt;&gt; 4   (maybe 19-0)</div><div class='del'>-   21:20  engine (here uses 1 = graphics)</div><div class='del'>-   I'm unsure about the other bits, but using 0 seems to work.</div><div class='del'>-</div><div class='del'>-   The key into the hash table depends on the object handle and channel id and</div><div class='del'>-   is given as:</div><div class='del'>-*/</div><div class='del'>-</div><div class='ctx'> int</div><div class='ctx'> nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan,</div><div class='ctx'> 		   uint32_t size, int align, uint32_t flags,</div><div class='hunk'>@@ -267,7 +238,7 @@ nouveau_gpuobj_takedown(struct drm_device *dev)</div><div class='ctx'> 		kfree(oc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!list_empty(&amp;dev_priv-&gt;gpuobj_list));</div><div class='add'>+	WARN_ON(!list_empty(&amp;dev_priv-&gt;gpuobj_list));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -361,34 +332,6 @@ nouveau_gpuobj_new_fake(struct drm_device *dev, u32 pinst, u64 vinst,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>-   DMA objects are used to reference a piece of memory in the</div><div class='del'>-   framebuffer, PCI or AGP address space. Each object is 16 bytes big</div><div class='del'>-   and looks as follows:</div><div class='del'>-</div><div class='del'>-   entry[0]</div><div class='del'>-   11:0  class (seems like I can always use 0 here)</div><div class='del'>-   12    page table present?</div><div class='del'>-   13    page entry linear?</div><div class='del'>-   15:14 access: 0 rw, 1 ro, 2 wo</div><div class='del'>-   17:16 target: 0 NV memory, 1 NV memory tiled, 2 PCI, 3 AGP</div><div class='del'>-   31:20 dma adjust (bits 0-11 of the address)</div><div class='del'>-   entry[1]</div><div class='del'>-   dma limit (size of transfer)</div><div class='del'>-   entry[X]</div><div class='del'>-   1     0 readonly, 1 readwrite</div><div class='del'>-   31:12 dma frame address of the page (bits 12-31 of the address)</div><div class='del'>-   entry[N]</div><div class='del'>-   page table terminator, same value as the first pte, as does nvidia</div><div class='del'>-   rivatv uses 0xffffffff</div><div class='del'>-</div><div class='del'>-   Non linear page tables need a list of frame addresses afterwards,</div><div class='del'>-   the rivatv project has some info on this.</div><div class='del'>-</div><div class='del'>-   The method below creates a DMA object in instance RAM and returns a handle</div><div class='del'>-   to it that can be used to set up context objects.</div><div class='del'>-*/</div><div class='del'>-</div><div class='ctx'> void</div><div class='ctx'> nv50_gpuobj_dma_init(struct nouveau_gpuobj *obj, u32 offset, int class,</div><div class='ctx'> 		     u64 base, u64 size, int target, int access,</div><div class='hunk'>@@ -540,82 +483,6 @@ nouveau_gpuobj_dma_new(struct nouveau_channel *chan, int class, u64 base,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Context objects in the instance RAM have the following structure.</div><div class='del'>- * On NV40 they are 32 byte long, on NV30 and smaller 16 bytes.</div><div class='del'>-</div><div class='del'>-   NV4 - NV30:</div><div class='del'>-</div><div class='del'>-   entry[0]</div><div class='del'>-   11:0 class</div><div class='del'>-   12   chroma key enable</div><div class='del'>-   13   user clip enable</div><div class='del'>-   14   swizzle enable</div><div class='del'>-   17:15 patch config:</div><div class='del'>-       scrcopy_and, rop_and, blend_and, scrcopy, srccopy_pre, blend_pre</div><div class='del'>-   18   synchronize enable</div><div class='del'>-   19   endian: 1 big, 0 little</div><div class='del'>-   21:20 dither mode</div><div class='del'>-   23    single step enable</div><div class='del'>-   24    patch status: 0 invalid, 1 valid</div><div class='del'>-   25    context_surface 0: 1 valid</div><div class='del'>-   26    context surface 1: 1 valid</div><div class='del'>-   27    context pattern: 1 valid</div><div class='del'>-   28    context rop: 1 valid</div><div class='del'>-   29,30 context beta, beta4</div><div class='del'>-   entry[1]</div><div class='del'>-   7:0   mono format</div><div class='del'>-   15:8  color format</div><div class='del'>-   31:16 notify instance address</div><div class='del'>-   entry[2]</div><div class='del'>-   15:0  dma 0 instance address</div><div class='del'>-   31:16 dma 1 instance address</div><div class='del'>-   entry[3]</div><div class='del'>-   dma method traps</div><div class='del'>-</div><div class='del'>-   NV40:</div><div class='del'>-   No idea what the exact format is. Here's what can be deducted:</div><div class='del'>-</div><div class='del'>-   entry[0]:</div><div class='del'>-   11:0  class  (maybe uses more bits here?)</div><div class='del'>-   17    user clip enable</div><div class='del'>-   21:19 patch config</div><div class='del'>-   25    patch status valid ?</div><div class='del'>-   entry[1]:</div><div class='del'>-   15:0  DMA notifier  (maybe 20:0)</div><div class='del'>-   entry[2]:</div><div class='del'>-   15:0  DMA 0 instance (maybe 20:0)</div><div class='del'>-   24    big endian</div><div class='del'>-   entry[3]:</div><div class='del'>-   15:0  DMA 1 instance (maybe 20:0)</div><div class='del'>-   entry[4]:</div><div class='del'>-   entry[5]:</div><div class='del'>-   set to 0?</div><div class='del'>-*/</div><div class='del'>-static int</div><div class='del'>-nouveau_gpuobj_sw_new(struct nouveau_channel *chan, u32 handle, u16 class)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = chan-&gt;dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_gpuobj *gpuobj;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL);</div><div class='del'>-	if (!gpuobj)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	gpuobj-&gt;dev = chan-&gt;dev;</div><div class='del'>-	gpuobj-&gt;engine = NVOBJ_ENGINE_SW;</div><div class='del'>-	gpuobj-&gt;class = class;</div><div class='del'>-	kref_init(&amp;gpuobj-&gt;refcount);</div><div class='del'>-	gpuobj-&gt;cinst = 0x40;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;dev_priv-&gt;ramin_lock);</div><div class='del'>-	list_add_tail(&amp;gpuobj-&gt;list, &amp;dev_priv-&gt;gpuobj_list);</div><div class='del'>-	spin_unlock(&amp;dev_priv-&gt;ramin_lock);</div><div class='del'>-</div><div class='del'>-	ret = nouveau_ramht_insert(chan, handle, gpuobj);</div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;gpuobj);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int</div><div class='ctx'> nouveau_gpuobj_gr_new(struct nouveau_channel *chan, u32 handle, int class)</div><div class='ctx'> {</div><div class='hunk'>@@ -632,9 +499,6 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, u32 handle, int class)</div><div class='ctx'> 		if (oc-&gt;id != class)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (oc-&gt;engine == NVOBJ_ENGINE_SW)</div><div class='del'>-			return nouveau_gpuobj_sw_new(chan, handle, class);</div><div class='del'>-</div><div class='ctx'> 		if (!chan-&gt;engctx[oc-&gt;engine]) {</div><div class='ctx'> 			ret = eng-&gt;context_new(chan, oc-&gt;engine);</div><div class='ctx'> 			if (ret)</div><div class='hunk'>@@ -644,7 +508,6 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, u32 handle, int class)</div><div class='ctx'> 		return eng-&gt;object_new(chan, oc-&gt;engine, handle, class);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	NV_ERROR(dev, "illegal object class: 0x%x\n", class);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -693,11 +556,10 @@ nouveau_gpuobj_channel_init_pramin(struct nouveau_channel *chan)</div><div class='ctx'> static int</div><div class='ctx'> nvc0_gpuobj_channel_init(struct nouveau_channel *chan, struct nouveau_vm *vm)</div><div class='ctx'> {</div><div class='del'>-	struct drm_nouveau_private *dev_priv = chan-&gt;dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct nouveau_gpuobj *pgd = NULL;</div><div class='ctx'> 	struct nouveau_vm_pgd *vpgd;</div><div class='del'>-	int ret, i;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = nouveau_gpuobj_new(dev, NULL, 4096, 0x1000, 0, &amp;chan-&gt;ramin);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -722,19 +584,6 @@ nvc0_gpuobj_channel_init(struct nouveau_channel *chan, struct nouveau_vm *vm)</div><div class='ctx'> 	nv_wo32(chan-&gt;ramin, 0x0208, 0xffffffff);</div><div class='ctx'> 	nv_wo32(chan-&gt;ramin, 0x020c, 0x000000ff);</div><div class='ctx'> </div><div class='del'>-	/* map display semaphore buffers into channel's vm */</div><div class='del'>-	for (i = 0; i &lt; dev-&gt;mode_config.num_crtc; i++) {</div><div class='del'>-		struct nouveau_bo *bo;</div><div class='del'>-		if (dev_priv-&gt;card_type &gt;= NV_D0)</div><div class='del'>-			bo = nvd0_display_crtc_sema(dev, i);</div><div class='del'>-		else</div><div class='del'>-			bo = nv50_display(dev)-&gt;crtc[i].sem.bo;</div><div class='del'>-</div><div class='del'>-		ret = nouveau_bo_vma_add(bo, chan-&gt;vm, &amp;chan-&gt;dispc_vma[i]);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -747,7 +596,7 @@ nouveau_gpuobj_channel_init(struct nouveau_channel *chan,</div><div class='ctx'> 	struct nouveau_fpriv *fpriv = nouveau_fpriv(chan-&gt;file_priv);</div><div class='ctx'> 	struct nouveau_vm *vm = fpriv ? fpriv-&gt;vm : dev_priv-&gt;chan_vm;</div><div class='ctx'> 	struct nouveau_gpuobj *vram = NULL, *tt = NULL;</div><div class='del'>-	int ret, i;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	NV_DEBUG(dev, "ch%d vram=0x%08x tt=0x%08x\n", chan-&gt;id, vram_h, tt_h);</div><div class='ctx'> 	if (dev_priv-&gt;card_type &gt;= NV_C0)</div><div class='hunk'>@@ -795,25 +644,6 @@ nouveau_gpuobj_channel_init(struct nouveau_channel *chan,</div><div class='ctx'> 		nouveau_gpuobj_ref(NULL, &amp;ramht);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='del'>-</div><div class='del'>-		/* dma objects for display sync channel semaphore blocks */</div><div class='del'>-		for (i = 0; i &lt; dev-&gt;mode_config.num_crtc; i++) {</div><div class='del'>-			struct nouveau_gpuobj *sem = NULL;</div><div class='del'>-			struct nv50_display_crtc *dispc =</div><div class='del'>-				&amp;nv50_display(dev)-&gt;crtc[i];</div><div class='del'>-			u64 offset = dispc-&gt;sem.bo-&gt;bo.offset;</div><div class='del'>-</div><div class='del'>-			ret = nouveau_gpuobj_dma_new(chan, 0x3d, offset, 0xfff,</div><div class='del'>-						     NV_MEM_ACCESS_RW,</div><div class='del'>-						     NV_MEM_TARGET_VRAM, &amp;sem);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-</div><div class='del'>-			ret = nouveau_ramht_insert(chan, NvEvoSema0 + i, sem);</div><div class='del'>-			nouveau_gpuobj_ref(NULL, &amp;sem);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* VRAM ctxdma */</div><div class='hunk'>@@ -873,25 +703,7 @@ nouveau_gpuobj_channel_init(struct nouveau_channel *chan,</div><div class='ctx'> void</div><div class='ctx'> nouveau_gpuobj_channel_takedown(struct nouveau_channel *chan)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	NV_DEBUG(dev, "ch%d\n", chan-&gt;id);</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;card_type &gt;= NV_D0) {</div><div class='del'>-		for (i = 0; i &lt; dev-&gt;mode_config.num_crtc; i++) {</div><div class='del'>-			struct nouveau_bo *bo = nvd0_display_crtc_sema(dev, i);</div><div class='del'>-			nouveau_bo_vma_del(bo, &amp;chan-&gt;dispc_vma[i]);</div><div class='del'>-		}</div><div class='del'>-	} else</div><div class='del'>-	if (dev_priv-&gt;card_type &gt;= NV_50) {</div><div class='del'>-		struct nv50_display *disp = nv50_display(dev);</div><div class='del'>-		for (i = 0; i &lt; dev-&gt;mode_config.num_crtc; i++) {</div><div class='del'>-			struct nv50_display_crtc *dispc = &amp;disp-&gt;crtc[i];</div><div class='del'>-			nouveau_bo_vma_del(dispc-&gt;sem.bo, &amp;chan-&gt;dispc_vma[i]);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	NV_DEBUG(chan-&gt;dev, "ch%d\n", chan-&gt;id);</div><div class='ctx'> </div><div class='ctx'> 	nouveau_vm_ref(NULL, &amp;chan-&gt;vm, chan-&gt;vm_pd);</div><div class='ctx'> 	nouveau_gpuobj_ref(NULL, &amp;chan-&gt;vm_pd);</div><div class='hunk'>@@ -956,6 +768,17 @@ int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data,</div><div class='ctx'> 	if (init-&gt;handle == ~0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	/* compatibility with userspace that assumes 506e for all chipsets */</div><div class='add'>+	if (init-&gt;class == 0x506e) {</div><div class='add'>+		init-&gt;class = nouveau_software_class(dev);</div><div class='add'>+		if (init-&gt;class == 0x906e)</div><div class='add'>+			return 0;</div><div class='add'>+	} else</div><div class='add'>+	if (init-&gt;class == 0x906e) {</div><div class='add'>+		NV_ERROR(dev, "906e not supported yet\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	chan = nouveau_channel_get(file_priv, init-&gt;channel);</div><div class='ctx'> 	if (IS_ERR(chan))</div><div class='ctx'> 		return PTR_ERR(chan);</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_perf.c b/drivers/gpu/drm/nouveau/nouveau_perf.c<br/>index 69a528d106e6..ea6acf1c4a78 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_perf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_perf.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_perf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_perf.c</a></div><div class='hunk'>@@ -83,7 +83,7 @@ nouveau_perf_entry(struct drm_device *dev, int idx,</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 *</div><div class='add'>+u8 *</div><div class='ctx'> nouveau_perf_rammap(struct drm_device *dev, u32 freq,</div><div class='ctx'> 		    u8 *ver, u8 *hdr, u8 *cnt, u8 *len)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.h b/drivers/gpu/drm/nouveau/nouveau_pm.h<br/>index 3f82dfea61dd..07cac72c72b4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_pm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_pm.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_pm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_pm.h</a></div><div class='hunk'>@@ -61,8 +61,10 @@ int  nouveau_voltage_gpio_set(struct drm_device *, int voltage);</div><div class='ctx'> /* nouveau_perf.c */</div><div class='ctx'> void nouveau_perf_init(struct drm_device *);</div><div class='ctx'> void nouveau_perf_fini(struct drm_device *);</div><div class='del'>-u8 *nouveau_perf_timing(struct drm_device *, u32 freq, u8 *ver, u8 *len);</div><div class='add'>+u8 *nouveau_perf_rammap(struct drm_device *, u32 freq, u8 *ver,</div><div class='add'>+			u8 *hdr, u8 *cnt, u8 *len);</div><div class='ctx'> u8 *nouveau_perf_ramcfg(struct drm_device *, u32 freq, u8 *ver, u8 *len);</div><div class='add'>+u8 *nouveau_perf_timing(struct drm_device *, u32 freq, u8 *ver, u8 *len);</div><div class='ctx'> </div><div class='ctx'> /* nouveau_mem.c */</div><div class='ctx'> void nouveau_mem_timing_init(struct drm_device *);</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_prime.c b/drivers/gpu/drm/nouveau/nouveau_prime.c<br/>new file mode 100644<br/>index 000000000000..a89240e5fb29<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_prime.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_prime.c</a></div><div class='hunk'>@@ -0,0 +1,208 @@</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_drm.h"</div><div class='add'>+#include "nouveau_dma.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dma-buf.h&gt;</div><div class='add'>+</div><div class='add'>+static struct sg_table *nouveau_gem_map_dma_buf(struct dma_buf_attachment *attachment,</div><div class='add'>+					  enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_bo *nvbo = attachment-&gt;dmabuf-&gt;priv;</div><div class='add'>+	struct drm_device *dev = nvbo-&gt;gem-&gt;dev;</div><div class='add'>+	int npages = nvbo-&gt;bo.num_pages;</div><div class='add'>+	struct sg_table *sg;</div><div class='add'>+	int nents;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	sg = drm_prime_pages_to_sg(nvbo-&gt;bo.ttm-&gt;pages, npages);</div><div class='add'>+	nents = dma_map_sg(attachment-&gt;dev, sg-&gt;sgl, sg-&gt;nents, dir);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	return sg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nouveau_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,</div><div class='add'>+				      struct sg_table *sg, enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	dma_unmap_sg(attachment-&gt;dev, sg-&gt;sgl, sg-&gt;nents, dir);</div><div class='add'>+	sg_free_table(sg);</div><div class='add'>+	kfree(sg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nouveau_gem_dmabuf_release(struct dma_buf *dma_buf)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_bo *nvbo = dma_buf-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (nvbo-&gt;gem-&gt;export_dma_buf == dma_buf) {</div><div class='add'>+		nvbo-&gt;gem-&gt;export_dma_buf = NULL;</div><div class='add'>+		drm_gem_object_unreference_unlocked(nvbo-&gt;gem);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *nouveau_gem_kmap_atomic(struct dma_buf *dma_buf, unsigned long page_num)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nouveau_gem_kunmap_atomic(struct dma_buf *dma_buf, unsigned long page_num, void *addr)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+static void *nouveau_gem_kmap(struct dma_buf *dma_buf, unsigned long page_num)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nouveau_gem_kunmap(struct dma_buf *dma_buf, unsigned long page_num, void *addr)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nouveau_gem_prime_mmap(struct dma_buf *dma_buf, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *nouveau_gem_prime_vmap(struct dma_buf *dma_buf)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_bo *nvbo = dma_buf-&gt;priv;</div><div class='add'>+	struct drm_device *dev = nvbo-&gt;gem-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	if (nvbo-&gt;vmapping_count) {</div><div class='add'>+		nvbo-&gt;vmapping_count++;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_kmap(&amp;nvbo-&gt;bo, 0, nvbo-&gt;bo.num_pages,</div><div class='add'>+			  &amp;nvbo-&gt;dma_buf_vmap);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+	}</div><div class='add'>+	nvbo-&gt;vmapping_count = 1;</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	return nvbo-&gt;dma_buf_vmap.virtual;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nouveau_gem_prime_vunmap(struct dma_buf *dma_buf, void *vaddr)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_bo *nvbo = dma_buf-&gt;priv;</div><div class='add'>+	struct drm_device *dev = nvbo-&gt;gem-&gt;dev;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	nvbo-&gt;vmapping_count--;</div><div class='add'>+	if (nvbo-&gt;vmapping_count == 0) {</div><div class='add'>+		ttm_bo_kunmap(&amp;nvbo-&gt;dma_buf_vmap);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dma_buf_ops nouveau_dmabuf_ops =  {</div><div class='add'>+	.map_dma_buf = nouveau_gem_map_dma_buf,</div><div class='add'>+	.unmap_dma_buf = nouveau_gem_unmap_dma_buf,</div><div class='add'>+	.release = nouveau_gem_dmabuf_release,</div><div class='add'>+	.kmap = nouveau_gem_kmap,</div><div class='add'>+	.kmap_atomic = nouveau_gem_kmap_atomic,</div><div class='add'>+	.kunmap = nouveau_gem_kunmap,</div><div class='add'>+	.kunmap_atomic = nouveau_gem_kunmap_atomic,</div><div class='add'>+	.mmap = nouveau_gem_prime_mmap,</div><div class='add'>+	.vmap = nouveau_gem_prime_vmap,</div><div class='add'>+	.vunmap = nouveau_gem_prime_vunmap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nouveau_prime_new(struct drm_device *dev,</div><div class='add'>+		  size_t size,</div><div class='add'>+		  struct sg_table *sg,</div><div class='add'>+		  struct nouveau_bo **pnvbo)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_bo *nvbo;</div><div class='add'>+	u32 flags = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	flags = TTM_PL_FLAG_TT;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_bo_new(dev, size, 0, flags, 0, 0,</div><div class='add'>+			     sg, pnvbo);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	nvbo = *pnvbo;</div><div class='add'>+</div><div class='add'>+	/* we restrict allowed domains on nv50+ to only the types</div><div class='add'>+	 * that were requested at creation time.  not possibly on</div><div class='add'>+	 * earlier chips without busting the ABI.</div><div class='add'>+	 */</div><div class='add'>+	nvbo-&gt;valid_domains = NOUVEAU_GEM_DOMAIN_GART;</div><div class='add'>+	nvbo-&gt;gem = drm_gem_object_alloc(dev, nvbo-&gt;bo.mem.size);</div><div class='add'>+	if (!nvbo-&gt;gem) {</div><div class='add'>+		nouveau_bo_ref(NULL, pnvbo);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nvbo-&gt;gem-&gt;driver_private = nvbo;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct dma_buf *nouveau_gem_prime_export(struct drm_device *dev,</div><div class='add'>+				struct drm_gem_object *obj, int flags)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_bo *nvbo = nouveau_gem_object(obj);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* pin buffer into GTT */</div><div class='add'>+	ret = nouveau_bo_pin(nvbo, TTM_PL_FLAG_TT);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	return dma_buf_export(nvbo, &amp;nouveau_dmabuf_ops, obj-&gt;size, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct drm_gem_object *nouveau_gem_prime_import(struct drm_device *dev,</div><div class='add'>+				struct dma_buf *dma_buf)</div><div class='add'>+{</div><div class='add'>+	struct dma_buf_attachment *attach;</div><div class='add'>+	struct sg_table *sg;</div><div class='add'>+	struct nouveau_bo *nvbo;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (dma_buf-&gt;ops == &amp;nouveau_dmabuf_ops) {</div><div class='add'>+		nvbo = dma_buf-&gt;priv;</div><div class='add'>+		if (nvbo-&gt;gem) {</div><div class='add'>+			if (nvbo-&gt;gem-&gt;dev == dev) {</div><div class='add'>+				drm_gem_object_reference(nvbo-&gt;gem);</div><div class='add'>+				return nvbo-&gt;gem;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/* need to attach */</div><div class='add'>+	attach = dma_buf_attach(dma_buf, dev-&gt;dev);</div><div class='add'>+	if (IS_ERR(attach))</div><div class='add'>+		return ERR_PTR(PTR_ERR(attach));</div><div class='add'>+</div><div class='add'>+	sg = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);</div><div class='add'>+	if (IS_ERR(sg)) {</div><div class='add'>+		ret = PTR_ERR(sg);</div><div class='add'>+		goto fail_detach;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = nouveau_prime_new(dev, dma_buf-&gt;size, sg, &amp;nvbo);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto fail_unmap;</div><div class='add'>+</div><div class='add'>+	nvbo-&gt;gem-&gt;import_attach = attach;</div><div class='add'>+</div><div class='add'>+	return nvbo-&gt;gem;</div><div class='add'>+</div><div class='add'>+fail_unmap:</div><div class='add'>+	dma_buf_unmap_attachment(attach, sg, DMA_BIDIRECTIONAL);</div><div class='add'>+fail_detach:</div><div class='add'>+	dma_buf_detach(dma_buf, attach);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c<br/>index 47f245edf538..38483a042bc2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_sgdma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_sgdma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_sgdma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_sgdma.c</a></div><div class='hunk'>@@ -290,7 +290,10 @@ nv50_sgdma_bind(struct ttm_tt *ttm, struct ttm_mem_reg *mem)</div><div class='ctx'> 	struct nouveau_mem *node = mem-&gt;mm_node;</div><div class='ctx'> </div><div class='ctx'> 	/* noop: bound in move_notify() */</div><div class='del'>-	node-&gt;pages = nvbe-&gt;ttm.dma_address;</div><div class='add'>+	if (ttm-&gt;sg) {</div><div class='add'>+		node-&gt;sg = ttm-&gt;sg;</div><div class='add'>+	} else</div><div class='add'>+		node-&gt;pages = nvbe-&gt;ttm.dma_address;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -338,10 +341,10 @@ nouveau_sgdma_init(struct drm_device *dev)</div><div class='ctx'> 	u32 aper_size, align;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (dev_priv-&gt;card_type &gt;= NV_40 &amp;&amp; pci_is_pcie(dev-&gt;pdev))</div><div class='add'>+	if (dev_priv-&gt;card_type &gt;= NV_40)</div><div class='ctx'> 		aper_size = 512 * 1024 * 1024;</div><div class='ctx'> 	else</div><div class='del'>-		aper_size = 64 * 1024 * 1024;</div><div class='add'>+		aper_size = 128 * 1024 * 1024;</div><div class='ctx'> </div><div class='ctx'> 	/* Dear NVIDIA, NV44+ would like proper present bits in PTEs for</div><div class='ctx'> 	 * christmas.  The cards before it have them, the cards after</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_software.h b/drivers/gpu/drm/nouveau/nouveau_software.h<br/>new file mode 100644<br/>index 000000000000..e60bc6ce9003<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_software.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_software.h</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+#ifndef __NOUVEAU_SOFTWARE_H__</div><div class='add'>+#define __NOUVEAU_SOFTWARE_H__</div><div class='add'>+</div><div class='add'>+struct nouveau_software_priv {</div><div class='add'>+	struct nouveau_exec_engine base;</div><div class='add'>+	struct list_head vblank;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nouveau_software_chan {</div><div class='add'>+	struct list_head flip;</div><div class='add'>+	struct {</div><div class='add'>+		struct list_head list;</div><div class='add'>+		struct nouveau_bo *bo;</div><div class='add'>+		u32 offset;</div><div class='add'>+		u32 value;</div><div class='add'>+		u32 head;</div><div class='add'>+	} vblank;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+nouveau_software_vblank(struct drm_device *dev, int crtc)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_software_priv *psw = nv_engine(dev, NVOBJ_ENGINE_SW);</div><div class='add'>+	struct nouveau_software_chan *pch, *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(pch, tmp, &amp;psw-&gt;vblank, vblank.list) {</div><div class='add'>+		if (pch-&gt;vblank.head != crtc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		nouveau_bo_wr32(pch-&gt;vblank.bo, pch-&gt;vblank.offset,</div><div class='add'>+						pch-&gt;vblank.value);</div><div class='add'>+		list_del(&amp;pch-&gt;vblank.list);</div><div class='add'>+		drm_vblank_put(dev, crtc);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+nouveau_software_context_new(struct nouveau_software_chan *pch)</div><div class='add'>+{</div><div class='add'>+	INIT_LIST_HEAD(&amp;pch-&gt;flip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+nouveau_software_create(struct nouveau_software_priv *psw)</div><div class='add'>+{</div><div class='add'>+	INIT_LIST_HEAD(&amp;psw-&gt;vblank);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16</div><div class='add'>+nouveau_software_class(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	if (dev_priv-&gt;card_type &lt;= NV_04)</div><div class='add'>+		return 0x006e;</div><div class='add'>+	if (dev_priv-&gt;card_type &lt;= NV_40)</div><div class='add'>+		return 0x016e;</div><div class='add'>+	if (dev_priv-&gt;card_type &lt;= NV_50)</div><div class='add'>+		return 0x506e;</div><div class='add'>+	if (dev_priv-&gt;card_type &lt;= NV_E0)</div><div class='add'>+		return 0x906e;</div><div class='add'>+	return 0x0000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int nv04_software_create(struct drm_device *);</div><div class='add'>+int nv50_software_create(struct drm_device *);</div><div class='add'>+int nvc0_software_create(struct drm_device *);</div><div class='add'>+u64 nvc0_software_crtc(struct nouveau_channel *, int crtc);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c<br/>index c2a8511e855a..19706f0532ea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_state.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_state.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_state.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_state.c</a></div><div class='hunk'>@@ -39,6 +39,9 @@</div><div class='ctx'> #include "nouveau_gpio.h"</div><div class='ctx'> #include "nouveau_pm.h"</div><div class='ctx'> #include "nv50_display.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='add'>+#include "nouveau_fence.h"</div><div class='add'>+#include "nouveau_software.h"</div><div class='ctx'> </div><div class='ctx'> static void nouveau_stub_takedown(struct drm_device *dev) {}</div><div class='ctx'> static int nouveau_stub_init(struct drm_device *dev) { return 0; }</div><div class='hunk'>@@ -66,18 +69,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)</div><div class='ctx'> 		engine-&gt;timer.takedown		= nv04_timer_takedown;</div><div class='ctx'> 		engine-&gt;fb.init			= nv04_fb_init;</div><div class='ctx'> 		engine-&gt;fb.takedown		= nv04_fb_takedown;</div><div class='del'>-		engine-&gt;fifo.channels		= 16;</div><div class='del'>-		engine-&gt;fifo.init		= nv04_fifo_init;</div><div class='del'>-		engine-&gt;fifo.takedown		= nv04_fifo_fini;</div><div class='del'>-		engine-&gt;fifo.disable		= nv04_fifo_disable;</div><div class='del'>-		engine-&gt;fifo.enable		= nv04_fifo_enable;</div><div class='del'>-		engine-&gt;fifo.reassign		= nv04_fifo_reassign;</div><div class='del'>-		engine-&gt;fifo.cache_pull		= nv04_fifo_cache_pull;</div><div class='del'>-		engine-&gt;fifo.channel_id		= nv04_fifo_channel_id;</div><div class='del'>-		engine-&gt;fifo.create_context	= nv04_fifo_create_context;</div><div class='del'>-		engine-&gt;fifo.destroy_context	= nv04_fifo_destroy_context;</div><div class='del'>-		engine-&gt;fifo.load_context	= nv04_fifo_load_context;</div><div class='del'>-		engine-&gt;fifo.unload_context	= nv04_fifo_unload_context;</div><div class='ctx'> 		engine-&gt;display.early_init	= nv04_display_early_init;</div><div class='ctx'> 		engine-&gt;display.late_takedown	= nv04_display_late_takedown;</div><div class='ctx'> 		engine-&gt;display.create		= nv04_display_create;</div><div class='hunk'>@@ -111,18 +102,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)</div><div class='ctx'> 		engine-&gt;fb.init_tile_region	= nv10_fb_init_tile_region;</div><div class='ctx'> 		engine-&gt;fb.set_tile_region	= nv10_fb_set_tile_region;</div><div class='ctx'> 		engine-&gt;fb.free_tile_region	= nv10_fb_free_tile_region;</div><div class='del'>-		engine-&gt;fifo.channels		= 32;</div><div class='del'>-		engine-&gt;fifo.init		= nv10_fifo_init;</div><div class='del'>-		engine-&gt;fifo.takedown		= nv04_fifo_fini;</div><div class='del'>-		engine-&gt;fifo.disable		= nv04_fifo_disable;</div><div class='del'>-		engine-&gt;fifo.enable		= nv04_fifo_enable;</div><div class='del'>-		engine-&gt;fifo.reassign		= nv04_fifo_reassign;</div><div class='del'>-		engine-&gt;fifo.cache_pull		= nv04_fifo_cache_pull;</div><div class='del'>-		engine-&gt;fifo.channel_id		= nv10_fifo_channel_id;</div><div class='del'>-		engine-&gt;fifo.create_context	= nv10_fifo_create_context;</div><div class='del'>-		engine-&gt;fifo.destroy_context	= nv04_fifo_destroy_context;</div><div class='del'>-		engine-&gt;fifo.load_context	= nv10_fifo_load_context;</div><div class='del'>-		engine-&gt;fifo.unload_context	= nv10_fifo_unload_context;</div><div class='ctx'> 		engine-&gt;display.early_init	= nv04_display_early_init;</div><div class='ctx'> 		engine-&gt;display.late_takedown	= nv04_display_late_takedown;</div><div class='ctx'> 		engine-&gt;display.create		= nv04_display_create;</div><div class='hunk'>@@ -162,18 +141,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)</div><div class='ctx'> 		engine-&gt;fb.init_tile_region	= nv20_fb_init_tile_region;</div><div class='ctx'> 		engine-&gt;fb.set_tile_region	= nv20_fb_set_tile_region;</div><div class='ctx'> 		engine-&gt;fb.free_tile_region	= nv20_fb_free_tile_region;</div><div class='del'>-		engine-&gt;fifo.channels		= 32;</div><div class='del'>-		engine-&gt;fifo.init		= nv10_fifo_init;</div><div class='del'>-		engine-&gt;fifo.takedown		= nv04_fifo_fini;</div><div class='del'>-		engine-&gt;fifo.disable		= nv04_fifo_disable;</div><div class='del'>-		engine-&gt;fifo.enable		= nv04_fifo_enable;</div><div class='del'>-		engine-&gt;fifo.reassign		= nv04_fifo_reassign;</div><div class='del'>-		engine-&gt;fifo.cache_pull		= nv04_fifo_cache_pull;</div><div class='del'>-		engine-&gt;fifo.channel_id		= nv10_fifo_channel_id;</div><div class='del'>-		engine-&gt;fifo.create_context	= nv10_fifo_create_context;</div><div class='del'>-		engine-&gt;fifo.destroy_context	= nv04_fifo_destroy_context;</div><div class='del'>-		engine-&gt;fifo.load_context	= nv10_fifo_load_context;</div><div class='del'>-		engine-&gt;fifo.unload_context	= nv10_fifo_unload_context;</div><div class='ctx'> 		engine-&gt;display.early_init	= nv04_display_early_init;</div><div class='ctx'> 		engine-&gt;display.late_takedown	= nv04_display_late_takedown;</div><div class='ctx'> 		engine-&gt;display.create		= nv04_display_create;</div><div class='hunk'>@@ -209,18 +176,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)</div><div class='ctx'> 		engine-&gt;fb.init_tile_region	= nv30_fb_init_tile_region;</div><div class='ctx'> 		engine-&gt;fb.set_tile_region	= nv10_fb_set_tile_region;</div><div class='ctx'> 		engine-&gt;fb.free_tile_region	= nv30_fb_free_tile_region;</div><div class='del'>-		engine-&gt;fifo.channels		= 32;</div><div class='del'>-		engine-&gt;fifo.init		= nv10_fifo_init;</div><div class='del'>-		engine-&gt;fifo.takedown		= nv04_fifo_fini;</div><div class='del'>-		engine-&gt;fifo.disable		= nv04_fifo_disable;</div><div class='del'>-		engine-&gt;fifo.enable		= nv04_fifo_enable;</div><div class='del'>-		engine-&gt;fifo.reassign		= nv04_fifo_reassign;</div><div class='del'>-		engine-&gt;fifo.cache_pull		= nv04_fifo_cache_pull;</div><div class='del'>-		engine-&gt;fifo.channel_id		= nv10_fifo_channel_id;</div><div class='del'>-		engine-&gt;fifo.create_context	= nv10_fifo_create_context;</div><div class='del'>-		engine-&gt;fifo.destroy_context	= nv04_fifo_destroy_context;</div><div class='del'>-		engine-&gt;fifo.load_context	= nv10_fifo_load_context;</div><div class='del'>-		engine-&gt;fifo.unload_context	= nv10_fifo_unload_context;</div><div class='ctx'> 		engine-&gt;display.early_init	= nv04_display_early_init;</div><div class='ctx'> 		engine-&gt;display.late_takedown	= nv04_display_late_takedown;</div><div class='ctx'> 		engine-&gt;display.create		= nv04_display_create;</div><div class='hunk'>@@ -259,18 +214,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)</div><div class='ctx'> 		engine-&gt;fb.init_tile_region	= nv30_fb_init_tile_region;</div><div class='ctx'> 		engine-&gt;fb.set_tile_region	= nv40_fb_set_tile_region;</div><div class='ctx'> 		engine-&gt;fb.free_tile_region	= nv30_fb_free_tile_region;</div><div class='del'>-		engine-&gt;fifo.channels		= 32;</div><div class='del'>-		engine-&gt;fifo.init		= nv40_fifo_init;</div><div class='del'>-		engine-&gt;fifo.takedown		= nv04_fifo_fini;</div><div class='del'>-		engine-&gt;fifo.disable		= nv04_fifo_disable;</div><div class='del'>-		engine-&gt;fifo.enable		= nv04_fifo_enable;</div><div class='del'>-		engine-&gt;fifo.reassign		= nv04_fifo_reassign;</div><div class='del'>-		engine-&gt;fifo.cache_pull		= nv04_fifo_cache_pull;</div><div class='del'>-		engine-&gt;fifo.channel_id		= nv10_fifo_channel_id;</div><div class='del'>-		engine-&gt;fifo.create_context	= nv40_fifo_create_context;</div><div class='del'>-		engine-&gt;fifo.destroy_context	= nv04_fifo_destroy_context;</div><div class='del'>-		engine-&gt;fifo.load_context	= nv40_fifo_load_context;</div><div class='del'>-		engine-&gt;fifo.unload_context	= nv40_fifo_unload_context;</div><div class='ctx'> 		engine-&gt;display.early_init	= nv04_display_early_init;</div><div class='ctx'> 		engine-&gt;display.late_takedown	= nv04_display_late_takedown;</div><div class='ctx'> 		engine-&gt;display.create		= nv04_display_create;</div><div class='hunk'>@@ -317,18 +260,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)</div><div class='ctx'> 		engine-&gt;timer.takedown		= nv04_timer_takedown;</div><div class='ctx'> 		engine-&gt;fb.init			= nv50_fb_init;</div><div class='ctx'> 		engine-&gt;fb.takedown		= nv50_fb_takedown;</div><div class='del'>-		engine-&gt;fifo.channels		= 128;</div><div class='del'>-		engine-&gt;fifo.init		= nv50_fifo_init;</div><div class='del'>-		engine-&gt;fifo.takedown		= nv50_fifo_takedown;</div><div class='del'>-		engine-&gt;fifo.disable		= nv04_fifo_disable;</div><div class='del'>-		engine-&gt;fifo.enable		= nv04_fifo_enable;</div><div class='del'>-		engine-&gt;fifo.reassign		= nv04_fifo_reassign;</div><div class='del'>-		engine-&gt;fifo.channel_id		= nv50_fifo_channel_id;</div><div class='del'>-		engine-&gt;fifo.create_context	= nv50_fifo_create_context;</div><div class='del'>-		engine-&gt;fifo.destroy_context	= nv50_fifo_destroy_context;</div><div class='del'>-		engine-&gt;fifo.load_context	= nv50_fifo_load_context;</div><div class='del'>-		engine-&gt;fifo.unload_context	= nv50_fifo_unload_context;</div><div class='del'>-		engine-&gt;fifo.tlb_flush		= nv50_fifo_tlb_flush;</div><div class='ctx'> 		engine-&gt;display.early_init	= nv50_display_early_init;</div><div class='ctx'> 		engine-&gt;display.late_takedown	= nv50_display_late_takedown;</div><div class='ctx'> 		engine-&gt;display.create		= nv50_display_create;</div><div class='hunk'>@@ -392,17 +323,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)</div><div class='ctx'> 		engine-&gt;timer.takedown		= nv04_timer_takedown;</div><div class='ctx'> 		engine-&gt;fb.init			= nvc0_fb_init;</div><div class='ctx'> 		engine-&gt;fb.takedown		= nvc0_fb_takedown;</div><div class='del'>-		engine-&gt;fifo.channels		= 128;</div><div class='del'>-		engine-&gt;fifo.init		= nvc0_fifo_init;</div><div class='del'>-		engine-&gt;fifo.takedown		= nvc0_fifo_takedown;</div><div class='del'>-		engine-&gt;fifo.disable		= nvc0_fifo_disable;</div><div class='del'>-		engine-&gt;fifo.enable		= nvc0_fifo_enable;</div><div class='del'>-		engine-&gt;fifo.reassign		= nvc0_fifo_reassign;</div><div class='del'>-		engine-&gt;fifo.channel_id		= nvc0_fifo_channel_id;</div><div class='del'>-		engine-&gt;fifo.create_context	= nvc0_fifo_create_context;</div><div class='del'>-		engine-&gt;fifo.destroy_context	= nvc0_fifo_destroy_context;</div><div class='del'>-		engine-&gt;fifo.load_context	= nvc0_fifo_load_context;</div><div class='del'>-		engine-&gt;fifo.unload_context	= nvc0_fifo_unload_context;</div><div class='ctx'> 		engine-&gt;display.early_init	= nv50_display_early_init;</div><div class='ctx'> 		engine-&gt;display.late_takedown	= nv50_display_late_takedown;</div><div class='ctx'> 		engine-&gt;display.create		= nv50_display_create;</div><div class='hunk'>@@ -445,17 +365,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)</div><div class='ctx'> 		engine-&gt;timer.takedown		= nv04_timer_takedown;</div><div class='ctx'> 		engine-&gt;fb.init			= nvc0_fb_init;</div><div class='ctx'> 		engine-&gt;fb.takedown		= nvc0_fb_takedown;</div><div class='del'>-		engine-&gt;fifo.channels		= 128;</div><div class='del'>-		engine-&gt;fifo.init		= nvc0_fifo_init;</div><div class='del'>-		engine-&gt;fifo.takedown		= nvc0_fifo_takedown;</div><div class='del'>-		engine-&gt;fifo.disable		= nvc0_fifo_disable;</div><div class='del'>-		engine-&gt;fifo.enable		= nvc0_fifo_enable;</div><div class='del'>-		engine-&gt;fifo.reassign		= nvc0_fifo_reassign;</div><div class='del'>-		engine-&gt;fifo.channel_id		= nvc0_fifo_channel_id;</div><div class='del'>-		engine-&gt;fifo.create_context	= nvc0_fifo_create_context;</div><div class='del'>-		engine-&gt;fifo.destroy_context	= nvc0_fifo_destroy_context;</div><div class='del'>-		engine-&gt;fifo.load_context	= nvc0_fifo_load_context;</div><div class='del'>-		engine-&gt;fifo.unload_context	= nvc0_fifo_unload_context;</div><div class='ctx'> 		engine-&gt;display.early_init	= nouveau_stub_init;</div><div class='ctx'> 		engine-&gt;display.late_takedown	= nouveau_stub_takedown;</div><div class='ctx'> 		engine-&gt;display.create		= nvd0_display_create;</div><div class='hunk'>@@ -496,13 +405,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)</div><div class='ctx'> 		engine-&gt;timer.takedown		= nv04_timer_takedown;</div><div class='ctx'> 		engine-&gt;fb.init			= nvc0_fb_init;</div><div class='ctx'> 		engine-&gt;fb.takedown		= nvc0_fb_takedown;</div><div class='del'>-		engine-&gt;fifo.channels		= 0;</div><div class='del'>-		engine-&gt;fifo.init		= nouveau_stub_init;</div><div class='del'>-		engine-&gt;fifo.takedown		= nouveau_stub_takedown;</div><div class='del'>-		engine-&gt;fifo.disable		= nvc0_fifo_disable;</div><div class='del'>-		engine-&gt;fifo.enable		= nvc0_fifo_enable;</div><div class='del'>-		engine-&gt;fifo.reassign		= nvc0_fifo_reassign;</div><div class='del'>-		engine-&gt;fifo.unload_context	= nouveau_stub_init;</div><div class='ctx'> 		engine-&gt;display.early_init	= nouveau_stub_init;</div><div class='ctx'> 		engine-&gt;display.late_takedown	= nouveau_stub_takedown;</div><div class='ctx'> 		engine-&gt;display.create		= nvd0_display_create;</div><div class='hunk'>@@ -607,61 +509,24 @@ nouveau_card_channel_init(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_channel *chan;</div><div class='del'>-	int ret, oclass;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = nouveau_channel_alloc(dev, &amp;chan, NULL, NvDmaFB, NvDmaTT);</div><div class='ctx'> 	dev_priv-&gt;channel = chan;</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-</div><div class='ctx'> 	mutex_unlock(&amp;dev_priv-&gt;channel-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	if (dev_priv-&gt;card_type &lt;= NV_50) {</div><div class='del'>-		if (dev_priv-&gt;card_type &lt; NV_50)</div><div class='del'>-			oclass = 0x0039;</div><div class='del'>-		else</div><div class='del'>-			oclass = 0x5039;</div><div class='del'>-</div><div class='del'>-		ret = nouveau_gpuobj_gr_new(chan, NvM2MF, oclass);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto error;</div><div class='del'>-</div><div class='del'>-		ret = nouveau_notifier_alloc(chan, NvNotify0, 32, 0xfe0, 0x1000,</div><div class='del'>-					     &amp;chan-&gt;m2mf_ntfy);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto error;</div><div class='del'>-</div><div class='del'>-		ret = RING_SPACE(chan, 6);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto error;</div><div class='del'>-</div><div class='del'>-		BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NAME, 1);</div><div class='del'>-		OUT_RING  (chan, NvM2MF);</div><div class='del'>-		BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 3);</div><div class='del'>-		OUT_RING  (chan, NvNotify0);</div><div class='del'>-		OUT_RING  (chan, chan-&gt;vram_handle);</div><div class='del'>-		OUT_RING  (chan, chan-&gt;gart_handle);</div><div class='del'>-	} else</div><div class='del'>-	if (dev_priv-&gt;card_type &lt;= NV_D0) {</div><div class='del'>-		ret = nouveau_gpuobj_gr_new(chan, 0x9039, 0x9039);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto error;</div><div class='del'>-</div><div class='del'>-		ret = RING_SPACE(chan, 2);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto error;</div><div class='del'>-</div><div class='del'>-		BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0000, 1);</div><div class='del'>-		OUT_RING  (chan, 0x00009039);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	FIRE_RING (chan);</div><div class='del'>-error:</div><div class='del'>-	if (ret)</div><div class='del'>-		nouveau_card_channel_fini(dev);</div><div class='del'>-	return ret;</div><div class='add'>+	nouveau_bo_move_init(chan);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct vga_switcheroo_client_ops nouveau_switcheroo_ops = {</div><div class='add'>+	.set_gpu_state = nouveau_switcheroo_set_state,</div><div class='add'>+	.reprobe = nouveau_switcheroo_reprobe,</div><div class='add'>+	.can_switch = nouveau_switcheroo_can_switch,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int</div><div class='ctx'> nouveau_card_init(struct drm_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -670,9 +535,7 @@ nouveau_card_init(struct drm_device *dev)</div><div class='ctx'> 	int ret, e = 0;</div><div class='ctx'> </div><div class='ctx'> 	vga_client_register(dev-&gt;pdev, dev, NULL, nouveau_vga_set_decode);</div><div class='del'>-	vga_switcheroo_register_client(dev-&gt;pdev, nouveau_switcheroo_set_state,</div><div class='del'>-				       nouveau_switcheroo_reprobe,</div><div class='del'>-				       nouveau_switcheroo_can_switch);</div><div class='add'>+	vga_switcheroo_register_client(dev-&gt;pdev, &amp;nouveau_switcheroo_ops);</div><div class='ctx'> </div><div class='ctx'> 	/* Initialise internal driver API hooks */</div><div class='ctx'> 	ret = nouveau_init_engine_ptrs(dev);</div><div class='hunk'>@@ -745,6 +608,81 @@ nouveau_card_init(struct drm_device *dev)</div><div class='ctx'> 	if (!dev_priv-&gt;noaccel) {</div><div class='ctx'> 		switch (dev_priv-&gt;card_type) {</div><div class='ctx'> 		case NV_04:</div><div class='add'>+			nv04_fifo_create(dev);</div><div class='add'>+			break;</div><div class='add'>+		case NV_10:</div><div class='add'>+		case NV_20:</div><div class='add'>+		case NV_30:</div><div class='add'>+			if (dev_priv-&gt;chipset &lt; 0x17)</div><div class='add'>+				nv10_fifo_create(dev);</div><div class='add'>+			else</div><div class='add'>+				nv17_fifo_create(dev);</div><div class='add'>+			break;</div><div class='add'>+		case NV_40:</div><div class='add'>+			nv40_fifo_create(dev);</div><div class='add'>+			break;</div><div class='add'>+		case NV_50:</div><div class='add'>+			if (dev_priv-&gt;chipset == 0x50)</div><div class='add'>+				nv50_fifo_create(dev);</div><div class='add'>+			else</div><div class='add'>+				nv84_fifo_create(dev);</div><div class='add'>+			break;</div><div class='add'>+		case NV_C0:</div><div class='add'>+		case NV_D0:</div><div class='add'>+			nvc0_fifo_create(dev);</div><div class='add'>+			break;</div><div class='add'>+		case NV_E0:</div><div class='add'>+			nve0_fifo_create(dev);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (dev_priv-&gt;card_type) {</div><div class='add'>+		case NV_04:</div><div class='add'>+			nv04_fence_create(dev);</div><div class='add'>+			break;</div><div class='add'>+		case NV_10:</div><div class='add'>+		case NV_20:</div><div class='add'>+		case NV_30:</div><div class='add'>+		case NV_40:</div><div class='add'>+		case NV_50:</div><div class='add'>+			if (dev_priv-&gt;chipset &lt; 0x84)</div><div class='add'>+				nv10_fence_create(dev);</div><div class='add'>+			else</div><div class='add'>+				nv84_fence_create(dev);</div><div class='add'>+			break;</div><div class='add'>+		case NV_C0:</div><div class='add'>+		case NV_D0:</div><div class='add'>+		case NV_E0:</div><div class='add'>+			nvc0_fence_create(dev);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (dev_priv-&gt;card_type) {</div><div class='add'>+		case NV_04:</div><div class='add'>+		case NV_10:</div><div class='add'>+		case NV_20:</div><div class='add'>+		case NV_30:</div><div class='add'>+		case NV_40:</div><div class='add'>+			nv04_software_create(dev);</div><div class='add'>+			break;</div><div class='add'>+		case NV_50:</div><div class='add'>+			nv50_software_create(dev);</div><div class='add'>+			break;</div><div class='add'>+		case NV_C0:</div><div class='add'>+		case NV_D0:</div><div class='add'>+		case NV_E0:</div><div class='add'>+			nvc0_software_create(dev);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (dev_priv-&gt;card_type) {</div><div class='add'>+		case NV_04:</div><div class='ctx'> 			nv04_graph_create(dev);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case NV_10:</div><div class='hunk'>@@ -764,6 +702,9 @@ nouveau_card_init(struct drm_device *dev)</div><div class='ctx'> 		case NV_D0:</div><div class='ctx'> 			nvc0_graph_create(dev);</div><div class='ctx'> 			break;</div><div class='add'>+		case NV_E0:</div><div class='add'>+			nve0_graph_create(dev);</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -796,8 +737,9 @@ nouveau_card_init(struct drm_device *dev)</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case NV_C0:</div><div class='del'>-			nvc0_copy_create(dev, 0);</div><div class='ctx'> 			nvc0_copy_create(dev, 1);</div><div class='add'>+		case NV_D0:</div><div class='add'>+			nvc0_copy_create(dev, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -830,16 +772,11 @@ nouveau_card_init(struct drm_device *dev)</div><div class='ctx'> 					goto out_engine;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		/* PFIFO */</div><div class='del'>-		ret = engine-&gt;fifo.init(dev);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_engine;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = nouveau_irq_init(dev);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out_fifo;</div><div class='add'>+		goto out_engine;</div><div class='ctx'> </div><div class='ctx'> 	ret = nouveau_display_create(dev);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -848,14 +785,10 @@ nouveau_card_init(struct drm_device *dev)</div><div class='ctx'> 	nouveau_backlight_init(dev);</div><div class='ctx'> 	nouveau_pm_init(dev);</div><div class='ctx'> </div><div class='del'>-	ret = nouveau_fence_init(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_pm;</div><div class='del'>-</div><div class='ctx'> 	if (dev_priv-&gt;eng[NVOBJ_ENGINE_GR]) {</div><div class='ctx'> 		ret = nouveau_card_channel_init(dev);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto out_fence;</div><div class='add'>+			goto out_pm;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;mode_config.num_crtc) {</div><div class='hunk'>@@ -870,17 +803,12 @@ nouveau_card_init(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> out_chan:</div><div class='ctx'> 	nouveau_card_channel_fini(dev);</div><div class='del'>-out_fence:</div><div class='del'>-	nouveau_fence_fini(dev);</div><div class='ctx'> out_pm:</div><div class='ctx'> 	nouveau_pm_fini(dev);</div><div class='ctx'> 	nouveau_backlight_exit(dev);</div><div class='ctx'> 	nouveau_display_destroy(dev);</div><div class='ctx'> out_irq:</div><div class='ctx'> 	nouveau_irq_fini(dev);</div><div class='del'>-out_fifo:</div><div class='del'>-	if (!dev_priv-&gt;noaccel)</div><div class='del'>-		engine-&gt;fifo.takedown(dev);</div><div class='ctx'> out_engine:</div><div class='ctx'> 	if (!dev_priv-&gt;noaccel) {</div><div class='ctx'> 		for (e = e - 1; e &gt;= 0; e--) {</div><div class='hunk'>@@ -912,6 +840,7 @@ out_bios:</div><div class='ctx'> out_display_early:</div><div class='ctx'> 	engine-&gt;display.late_takedown(dev);</div><div class='ctx'> out:</div><div class='add'>+	vga_switcheroo_unregister_client(dev-&gt;pdev);</div><div class='ctx'> 	vga_client_register(dev-&gt;pdev, NULL, NULL, NULL);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -928,13 +857,11 @@ static void nouveau_card_takedown(struct drm_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	nouveau_card_channel_fini(dev);</div><div class='del'>-	nouveau_fence_fini(dev);</div><div class='ctx'> 	nouveau_pm_fini(dev);</div><div class='ctx'> 	nouveau_backlight_exit(dev);</div><div class='ctx'> 	nouveau_display_destroy(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!dev_priv-&gt;noaccel) {</div><div class='del'>-		engine-&gt;fifo.takedown(dev);</div><div class='ctx'> 		for (e = NVOBJ_ENGINE_NR - 1; e &gt;= 0; e--) {</div><div class='ctx'> 			if (dev_priv-&gt;eng[e]) {</div><div class='ctx'> 				dev_priv-&gt;eng[e]-&gt;fini(dev, e, false);</div><div class='hunk'>@@ -969,6 +896,7 @@ static void nouveau_card_takedown(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	nouveau_irq_fini(dev);</div><div class='ctx'> </div><div class='add'>+	vga_switcheroo_unregister_client(dev-&gt;pdev);</div><div class='ctx'> 	vga_client_register(dev-&gt;pdev, NULL, NULL, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1176,7 +1104,7 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)</div><div class='ctx'> 		goto err_priv;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	NV_INFO(dev, "Detected an NV%2x generation card (0x%08x)\n",</div><div class='add'>+	NV_INFO(dev, "Detected an NV%02x generation card (0x%08x)\n",</div><div class='ctx'> 		     dev_priv-&gt;card_type, reg0);</div><div class='ctx'> </div><div class='ctx'> 	/* map the mmio regs, limiting the amount to preserve vmap space */</div><div class='hunk'>@@ -1219,6 +1147,8 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)</div><div class='ctx'> 	if (nouveau_noaccel == -1) {</div><div class='ctx'> 		switch (dev_priv-&gt;chipset) {</div><div class='ctx'> 		case 0xd9: /* known broken */</div><div class='add'>+		case 0xe4: /* needs binary driver firmware */</div><div class='add'>+		case 0xe7: /* needs binary driver firmware */</div><div class='ctx'> 			NV_INFO(dev, "acceleration disabled by default, pass "</div><div class='ctx'> 				     "noaccel=0 to force enable\n");</div><div class='ctx'> 			dev_priv-&gt;noaccel = true;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_vm.c b/drivers/gpu/drm/nouveau/nouveau_vm.c<br/>index 2bf6c0350b4b..11edd5e91a0a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_vm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_vm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_vm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_vm.c</a></div><div class='hunk'>@@ -77,6 +77,63 @@ nouveau_vm_map(struct nouveau_vma *vma, struct nouveau_mem *node)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void</div><div class='add'>+nouveau_vm_map_sg_table(struct nouveau_vma *vma, u64 delta, u64 length,</div><div class='add'>+			struct nouveau_mem *mem)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_vm *vm = vma-&gt;vm;</div><div class='add'>+	int big = vma-&gt;node-&gt;type != vm-&gt;spg_shift;</div><div class='add'>+	u32 offset = vma-&gt;node-&gt;offset + (delta &gt;&gt; 12);</div><div class='add'>+	u32 bits = vma-&gt;node-&gt;type - 12;</div><div class='add'>+	u32 num  = length &gt;&gt; vma-&gt;node-&gt;type;</div><div class='add'>+	u32 pde  = (offset &gt;&gt; vm-&gt;pgt_bits) - vm-&gt;fpde;</div><div class='add'>+	u32 pte  = (offset &amp; ((1 &lt;&lt; vm-&gt;pgt_bits) - 1)) &gt;&gt; bits;</div><div class='add'>+	u32 max  = 1 &lt;&lt; (vm-&gt;pgt_bits - bits);</div><div class='add'>+	unsigned m, sglen;</div><div class='add'>+	u32 end, len;</div><div class='add'>+	int i;</div><div class='add'>+	struct scatterlist *sg;</div><div class='add'>+</div><div class='add'>+	for_each_sg(mem-&gt;sg-&gt;sgl, sg, mem-&gt;sg-&gt;nents, i) {</div><div class='add'>+		struct nouveau_gpuobj *pgt = vm-&gt;pgt[pde].obj[big];</div><div class='add'>+		sglen = sg_dma_len(sg) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+		end = pte + sglen;</div><div class='add'>+		if (unlikely(end &gt;= max))</div><div class='add'>+			end = max;</div><div class='add'>+		len = end - pte;</div><div class='add'>+</div><div class='add'>+		for (m = 0; m &lt; len; m++) {</div><div class='add'>+			dma_addr_t addr = sg_dma_address(sg) + (m &lt;&lt; PAGE_SHIFT);</div><div class='add'>+</div><div class='add'>+			vm-&gt;map_sg(vma, pgt, mem, pte, 1, &amp;addr);</div><div class='add'>+			num--;</div><div class='add'>+			pte++;</div><div class='add'>+</div><div class='add'>+			if (num == 0)</div><div class='add'>+				goto finish;</div><div class='add'>+		}</div><div class='add'>+		if (unlikely(end &gt;= max)) {</div><div class='add'>+			pde++;</div><div class='add'>+			pte = 0;</div><div class='add'>+		}</div><div class='add'>+		if (m &lt; sglen) {</div><div class='add'>+			for (; m &lt; sglen; m++) {</div><div class='add'>+				dma_addr_t addr = sg_dma_address(sg) + (m &lt;&lt; PAGE_SHIFT);</div><div class='add'>+</div><div class='add'>+				vm-&gt;map_sg(vma, pgt, mem, pte, 1, &amp;addr);</div><div class='add'>+				num--;</div><div class='add'>+				pte++;</div><div class='add'>+				if (num == 0)</div><div class='add'>+					goto finish;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+finish:</div><div class='add'>+	vm-&gt;flush(vm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='ctx'> nouveau_vm_map_sg(struct nouveau_vma *vma, u64 delta, u64 length,</div><div class='ctx'> 		  struct nouveau_mem *mem)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nouveau_vm.h b/drivers/gpu/drm/nouveau/nouveau_vm.h<br/>index 4fb6e728734d..a8246e7e4a89 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_vm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nouveau_vm.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nouveau_vm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nouveau_vm.h</a></div><div class='hunk'>@@ -72,6 +72,9 @@ struct nouveau_vm {</div><div class='ctx'> 		    u64 phys, u64 delta);</div><div class='ctx'> 	void (*map_sg)(struct nouveau_vma *, struct nouveau_gpuobj *,</div><div class='ctx'> 		       struct nouveau_mem *, u32 pte, u32 cnt, dma_addr_t *);</div><div class='add'>+</div><div class='add'>+	void (*map_sg_table)(struct nouveau_vma *, struct nouveau_gpuobj *,</div><div class='add'>+			     struct nouveau_mem *, u32 pte, u32 cnt, dma_addr_t *);</div><div class='ctx'> 	void (*unmap)(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt);</div><div class='ctx'> 	void (*flush)(struct nouveau_vm *);</div><div class='ctx'> };</div><div class='hunk'>@@ -90,7 +93,8 @@ void nouveau_vm_unmap(struct nouveau_vma *);</div><div class='ctx'> void nouveau_vm_unmap_at(struct nouveau_vma *, u64 offset, u64 length);</div><div class='ctx'> void nouveau_vm_map_sg(struct nouveau_vma *, u64 offset, u64 length,</div><div class='ctx'> 		       struct nouveau_mem *);</div><div class='del'>-</div><div class='add'>+void nouveau_vm_map_sg_table(struct nouveau_vma *vma, u64 delta, u64 length,</div><div class='add'>+			     struct nouveau_mem *mem);</div><div class='ctx'> /* nv50_vm.c */</div><div class='ctx'> void nv50_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 pde,</div><div class='ctx'> 		     struct nouveau_gpuobj *pgt[2]);</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c<br/>index 728d07584d39..4c31c63e5528 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_crtc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv04_crtc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_crtc.c</a></div><div class='hunk'>@@ -1047,7 +1047,7 @@ nv04_crtc_create(struct drm_device *dev, int crtc_num)</div><div class='ctx'> 	drm_mode_crtc_set_gamma_size(&amp;nv_crtc-&gt;base, 256);</div><div class='ctx'> </div><div class='ctx'> 	ret = nouveau_bo_new(dev, 64*64*4, 0x100, TTM_PL_FLAG_VRAM,</div><div class='del'>-			     0, 0x0000, &amp;nv_crtc-&gt;cursor.nvbo);</div><div class='add'>+			     0, 0x0000, NULL, &amp;nv_crtc-&gt;cursor.nvbo);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		ret = nouveau_bo_pin(nv_crtc-&gt;cursor.nvbo, TTM_PL_FLAG_VRAM);</div><div class='ctx'> 		if (!ret)</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv04_display.c b/drivers/gpu/drm/nouveau/nv04_display.c<br/>index 7047d37e8dab..44488e3a257d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv04_display.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_display.c</a></div><div class='hunk'>@@ -98,6 +98,13 @@ nv04_display_early_init(struct drm_device *dev)</div><div class='ctx'> 		NVSetOwner(dev, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* ensure vblank interrupts are off, they can't be enabled until</div><div class='add'>+	 * drm_vblank has been initialised</div><div class='add'>+	 */</div><div class='add'>+	NVWriteCRTC(dev, 0, NV_PCRTC_INTR_EN_0, 0);</div><div class='add'>+	if (nv_two_heads(dev))</div><div class='add'>+		NVWriteCRTC(dev, 1, NV_PCRTC_INTR_EN_0, 0);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -246,6 +253,10 @@ nv04_display_init(struct drm_device *dev)</div><div class='ctx'> void</div><div class='ctx'> nv04_display_fini(struct drm_device *dev)</div><div class='ctx'> {</div><div class='add'>+	/* disable vblank interrupts */</div><div class='add'>+	NVWriteCRTC(dev, 0, NV_PCRTC_INTR_EN_0, 0);</div><div class='add'>+	if (nv_two_heads(dev))</div><div class='add'>+		NVWriteCRTC(dev, 1, NV_PCRTC_INTR_EN_0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c<br/>index 7a1189371096..7cd7857347ef 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_fbcon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv04_fbcon.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_fbcon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_fbcon.c</a></div><div class='hunk'>@@ -41,7 +41,7 @@ nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, NvSubImageBlit, 0x0300, 3);</div><div class='add'>+	BEGIN_NV04(chan, NvSubImageBlit, 0x0300, 3);</div><div class='ctx'> 	OUT_RING(chan, (region-&gt;sy &lt;&lt; 16) | region-&gt;sx);</div><div class='ctx'> 	OUT_RING(chan, (region-&gt;dy &lt;&lt; 16) | region-&gt;dx);</div><div class='ctx'> 	OUT_RING(chan, (region-&gt;height &lt;&lt; 16) | region-&gt;width);</div><div class='hunk'>@@ -62,15 +62,15 @@ nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, NvSubGdiRect, 0x02fc, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSubGdiRect, 0x02fc, 1);</div><div class='ctx'> 	OUT_RING(chan, (rect-&gt;rop != ROP_COPY) ? 1 : 3);</div><div class='del'>-	BEGIN_RING(chan, NvSubGdiRect, 0x03fc, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSubGdiRect, 0x03fc, 1);</div><div class='ctx'> 	if (info-&gt;fix.visual == FB_VISUAL_TRUECOLOR ||</div><div class='ctx'> 	    info-&gt;fix.visual == FB_VISUAL_DIRECTCOLOR)</div><div class='ctx'> 		OUT_RING(chan, ((uint32_t *)info-&gt;pseudo_palette)[rect-&gt;color]);</div><div class='ctx'> 	else</div><div class='ctx'> 		OUT_RING(chan, rect-&gt;color);</div><div class='del'>-	BEGIN_RING(chan, NvSubGdiRect, 0x0400, 2);</div><div class='add'>+	BEGIN_NV04(chan, NvSubGdiRect, 0x0400, 2);</div><div class='ctx'> 	OUT_RING(chan, (rect-&gt;dx &lt;&lt; 16) | rect-&gt;dy);</div><div class='ctx'> 	OUT_RING(chan, (rect-&gt;width &lt;&lt; 16) | rect-&gt;height);</div><div class='ctx'> 	FIRE_RING(chan);</div><div class='hunk'>@@ -110,7 +110,7 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)</div><div class='ctx'> 		bg = image-&gt;bg_color;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, NvSubGdiRect, 0x0be4, 7);</div><div class='add'>+	BEGIN_NV04(chan, NvSubGdiRect, 0x0be4, 7);</div><div class='ctx'> 	OUT_RING(chan, (image-&gt;dy &lt;&lt; 16) | (image-&gt;dx &amp; 0xffff));</div><div class='ctx'> 	OUT_RING(chan, ((image-&gt;dy + image-&gt;height) &lt;&lt; 16) |</div><div class='ctx'> 			 ((image-&gt;dx + image-&gt;width) &amp; 0xffff));</div><div class='hunk'>@@ -127,7 +127,7 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		BEGIN_RING(chan, NvSubGdiRect, 0x0c00, iter_len);</div><div class='add'>+		BEGIN_NV04(chan, NvSubGdiRect, 0x0c00, iter_len);</div><div class='ctx'> 		OUT_RINGp(chan, data, iter_len);</div><div class='ctx'> 		data += iter_len;</div><div class='ctx'> 		dsize -= iter_len;</div><div class='hunk'>@@ -209,25 +209,25 @@ nv04_fbcon_accel_init(struct fb_info *info)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, sub, 0x0000, 1);</div><div class='add'>+	BEGIN_NV04(chan, sub, 0x0000, 1);</div><div class='ctx'> 	OUT_RING(chan, NvCtxSurf2D);</div><div class='del'>-	BEGIN_RING(chan, sub, 0x0184, 2);</div><div class='add'>+	BEGIN_NV04(chan, sub, 0x0184, 2);</div><div class='ctx'> 	OUT_RING(chan, NvDmaFB);</div><div class='ctx'> 	OUT_RING(chan, NvDmaFB);</div><div class='del'>-	BEGIN_RING(chan, sub, 0x0300, 4);</div><div class='add'>+	BEGIN_NV04(chan, sub, 0x0300, 4);</div><div class='ctx'> 	OUT_RING(chan, surface_fmt);</div><div class='ctx'> 	OUT_RING(chan, info-&gt;fix.line_length | (info-&gt;fix.line_length &lt;&lt; 16));</div><div class='ctx'> 	OUT_RING(chan, info-&gt;fix.smem_start - dev-&gt;mode_config.fb_base);</div><div class='ctx'> 	OUT_RING(chan, info-&gt;fix.smem_start - dev-&gt;mode_config.fb_base);</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, sub, 0x0000, 1);</div><div class='add'>+	BEGIN_NV04(chan, sub, 0x0000, 1);</div><div class='ctx'> 	OUT_RING(chan, NvRop);</div><div class='del'>-	BEGIN_RING(chan, sub, 0x0300, 1);</div><div class='add'>+	BEGIN_NV04(chan, sub, 0x0300, 1);</div><div class='ctx'> 	OUT_RING(chan, 0x55);</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, sub, 0x0000, 1);</div><div class='add'>+	BEGIN_NV04(chan, sub, 0x0000, 1);</div><div class='ctx'> 	OUT_RING(chan, NvImagePatt);</div><div class='del'>-	BEGIN_RING(chan, sub, 0x0300, 8);</div><div class='add'>+	BEGIN_NV04(chan, sub, 0x0300, 8);</div><div class='ctx'> 	OUT_RING(chan, pattern_fmt);</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='ctx'> 	OUT_RING(chan, 2);</div><div class='hunk'>@@ -241,31 +241,31 @@ nv04_fbcon_accel_init(struct fb_info *info)</div><div class='ctx'> 	OUT_RING(chan, ~0);</div><div class='ctx'> 	OUT_RING(chan, ~0);</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, sub, 0x0000, 1);</div><div class='add'>+	BEGIN_NV04(chan, sub, 0x0000, 1);</div><div class='ctx'> 	OUT_RING(chan, NvClipRect);</div><div class='del'>-	BEGIN_RING(chan, sub, 0x0300, 2);</div><div class='add'>+	BEGIN_NV04(chan, sub, 0x0300, 2);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='ctx'> 	OUT_RING(chan, (info-&gt;var.yres_virtual &lt;&lt; 16) | info-&gt;var.xres_virtual);</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, NvSubImageBlit, 0x0000, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSubImageBlit, 0x0000, 1);</div><div class='ctx'> 	OUT_RING(chan, NvImageBlit);</div><div class='del'>-	BEGIN_RING(chan, NvSubImageBlit, 0x019c, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSubImageBlit, 0x019c, 1);</div><div class='ctx'> 	OUT_RING(chan, NvCtxSurf2D);</div><div class='del'>-	BEGIN_RING(chan, NvSubImageBlit, 0x02fc, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSubImageBlit, 0x02fc, 1);</div><div class='ctx'> 	OUT_RING(chan, 3);</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, NvSubGdiRect, 0x0000, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSubGdiRect, 0x0000, 1);</div><div class='ctx'> 	OUT_RING(chan, NvGdiRect);</div><div class='del'>-	BEGIN_RING(chan, NvSubGdiRect, 0x0198, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSubGdiRect, 0x0198, 1);</div><div class='ctx'> 	OUT_RING(chan, NvCtxSurf2D);</div><div class='del'>-	BEGIN_RING(chan, NvSubGdiRect, 0x0188, 2);</div><div class='add'>+	BEGIN_NV04(chan, NvSubGdiRect, 0x0188, 2);</div><div class='ctx'> 	OUT_RING(chan, NvImagePatt);</div><div class='ctx'> 	OUT_RING(chan, NvRop);</div><div class='del'>-	BEGIN_RING(chan, NvSubGdiRect, 0x0304, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSubGdiRect, 0x0304, 1);</div><div class='ctx'> 	OUT_RING(chan, 1);</div><div class='del'>-	BEGIN_RING(chan, NvSubGdiRect, 0x0300, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSubGdiRect, 0x0300, 1);</div><div class='ctx'> 	OUT_RING(chan, rect_fmt);</div><div class='del'>-	BEGIN_RING(chan, NvSubGdiRect, 0x02fc, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSubGdiRect, 0x02fc, 1);</div><div class='ctx'> 	OUT_RING(chan, 3);</div><div class='ctx'> </div><div class='ctx'> 	FIRE_RING(chan);</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv04_fence.c b/drivers/gpu/drm/nouveau/nv04_fence.c<br/>new file mode 100644<br/>index 000000000000..abe89db6de24<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_fence.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_fence.c</a></div><div class='hunk'>@@ -0,0 +1,140 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ben Skeggs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_dma.h"</div><div class='add'>+#include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_fence.h"</div><div class='add'>+</div><div class='add'>+struct nv04_fence_chan {</div><div class='add'>+	struct nouveau_fence_chan base;</div><div class='add'>+	atomic_t sequence;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv04_fence_priv {</div><div class='add'>+	struct nouveau_fence_priv base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv04_fence_emit(struct nouveau_fence *fence)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_channel *chan = fence-&gt;channel;</div><div class='add'>+	int ret = RING_SPACE(chan, 2);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		BEGIN_NV04(chan, NvSubSw, 0x0150, 1);</div><div class='add'>+		OUT_RING  (chan, fence-&gt;sequence);</div><div class='add'>+		FIRE_RING (chan);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv04_fence_sync(struct nouveau_fence *fence,</div><div class='add'>+		struct nouveau_channel *prev, struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nv04_fence_mthd(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)</div><div class='add'>+{</div><div class='add'>+	struct nv04_fence_chan *fctx = chan-&gt;engctx[NVOBJ_ENGINE_FENCE];</div><div class='add'>+	atomic_set(&amp;fctx-&gt;sequence, data);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+nv04_fence_read(struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	struct nv04_fence_chan *fctx = chan-&gt;engctx[NVOBJ_ENGINE_FENCE];</div><div class='add'>+	return atomic_read(&amp;fctx-&gt;sequence);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv04_fence_context_del(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv04_fence_chan *fctx = chan-&gt;engctx[engine];</div><div class='add'>+	nouveau_fence_context_del(&amp;fctx-&gt;base);</div><div class='add'>+	chan-&gt;engctx[engine] = NULL;</div><div class='add'>+	kfree(fctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv04_fence_context_new(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv04_fence_chan *fctx = kzalloc(sizeof(*fctx), GFP_KERNEL);</div><div class='add'>+	if (fctx) {</div><div class='add'>+		nouveau_fence_context_new(&amp;fctx-&gt;base);</div><div class='add'>+		atomic_set(&amp;fctx-&gt;sequence, 0);</div><div class='add'>+		chan-&gt;engctx[engine] = fctx;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv04_fence_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv04_fence_init(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv04_fence_destroy(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv04_fence_priv *priv = nv_engine(dev, engine);</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;eng[engine] = NULL;</div><div class='add'>+	kfree(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nv04_fence_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv04_fence_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;base.engine.destroy = nv04_fence_destroy;</div><div class='add'>+	priv-&gt;base.engine.init = nv04_fence_init;</div><div class='add'>+	priv-&gt;base.engine.fini = nv04_fence_fini;</div><div class='add'>+	priv-&gt;base.engine.context_new = nv04_fence_context_new;</div><div class='add'>+	priv-&gt;base.engine.context_del = nv04_fence_context_del;</div><div class='add'>+	priv-&gt;base.emit = nv04_fence_emit;</div><div class='add'>+	priv-&gt;base.sync = nv04_fence_sync;</div><div class='add'>+	priv-&gt;base.read = nv04_fence_read;</div><div class='add'>+	dev_priv-&gt;eng[NVOBJ_ENGINE_FENCE] = &amp;priv-&gt;base.engine;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv04_fifo.c b/drivers/gpu/drm/nouveau/nv04_fifo.c<br/>index db465a3ee1b2..a6295cd00ec7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_fifo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv04_fifo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_fifo.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2007 Ben Skeggs.</div><div class='add'>+ * Copyright (C) 2012 Ben Skeggs.</div><div class='ctx'>  * All Rights Reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * Permission is hereby granted, free of charge, to any person obtaining</div><div class='hunk'>@@ -27,49 +27,38 @@</div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "drm.h"</div><div class='ctx'> #include "nouveau_drv.h"</div><div class='del'>-#include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> #include "nouveau_util.h"</div><div class='del'>-</div><div class='del'>-#define NV04_RAMFC(c) (dev_priv-&gt;ramfc-&gt;pinst + ((c) * NV04_RAMFC__SIZE))</div><div class='del'>-#define NV04_RAMFC__SIZE 32</div><div class='del'>-#define NV04_RAMFC_DMA_PUT                                       0x00</div><div class='del'>-#define NV04_RAMFC_DMA_GET                                       0x04</div><div class='del'>-#define NV04_RAMFC_DMA_INSTANCE                                  0x08</div><div class='del'>-#define NV04_RAMFC_DMA_STATE                                     0x0C</div><div class='del'>-#define NV04_RAMFC_DMA_FETCH                                     0x10</div><div class='del'>-#define NV04_RAMFC_ENGINE                                        0x14</div><div class='del'>-#define NV04_RAMFC_PULL1_ENGINE                                  0x18</div><div class='del'>-</div><div class='del'>-#define RAMFC_WR(offset, val) nv_wo32(chan-&gt;ramfc, NV04_RAMFC_##offset, (val))</div><div class='del'>-#define RAMFC_RD(offset)      nv_ro32(chan-&gt;ramfc, NV04_RAMFC_##offset)</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-nv04_fifo_disable(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	uint32_t tmp;</div><div class='del'>-</div><div class='del'>-	tmp = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUSH);</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUSH, tmp &amp; ~1);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 0);</div><div class='del'>-	tmp = nv_rd32(dev, NV03_PFIFO_CACHE1_PULL1);</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, tmp &amp; ~1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-nv04_fifo_enable(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 1);</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool</div><div class='del'>-nv04_fifo_reassign(struct drm_device *dev, bool enable)</div><div class='del'>-{</div><div class='del'>-	uint32_t reassign = nv_rd32(dev, NV03_PFIFO_CACHES);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHES, enable ? 1 : 0);</div><div class='del'>-	return (reassign == 1);</div><div class='del'>-}</div><div class='add'>+#include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_software.h"</div><div class='add'>+</div><div class='add'>+static struct ramfc_desc {</div><div class='add'>+	unsigned bits:6;</div><div class='add'>+	unsigned ctxs:5;</div><div class='add'>+	unsigned ctxp:8;</div><div class='add'>+	unsigned regs:5;</div><div class='add'>+	unsigned regp;</div><div class='add'>+} nv04_ramfc[] = {</div><div class='add'>+	{ 32,  0, 0x00,  0, NV04_PFIFO_CACHE1_DMA_PUT },</div><div class='add'>+	{ 32,  0, 0x04,  0, NV04_PFIFO_CACHE1_DMA_GET },</div><div class='add'>+	{ 16,  0, 0x08,  0, NV04_PFIFO_CACHE1_DMA_INSTANCE },</div><div class='add'>+	{ 16, 16, 0x08,  0, NV04_PFIFO_CACHE1_DMA_DCOUNT },</div><div class='add'>+	{ 32,  0, 0x0c,  0, NV04_PFIFO_CACHE1_DMA_STATE },</div><div class='add'>+	{ 32,  0, 0x10,  0, NV04_PFIFO_CACHE1_DMA_FETCH },</div><div class='add'>+	{ 32,  0, 0x14,  0, NV04_PFIFO_CACHE1_ENGINE },</div><div class='add'>+	{ 32,  0, 0x18,  0, NV04_PFIFO_CACHE1_PULL1 },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv04_fifo_priv {</div><div class='add'>+	struct nouveau_fifo_priv base;</div><div class='add'>+	struct ramfc_desc *ramfc_desc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv04_fifo_chan {</div><div class='add'>+	struct nouveau_fifo_chan base;</div><div class='add'>+	struct nouveau_gpuobj *ramfc;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> bool</div><div class='ctx'> nv04_fifo_cache_pull(struct drm_device *dev, bool enable)</div><div class='hunk'>@@ -86,13 +75,13 @@ nv04_fifo_cache_pull(struct drm_device *dev, bool enable)</div><div class='ctx'> 		 * invalidate the most recently calculated instance.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!nv_wait(dev, NV04_PFIFO_CACHE1_PULL0,</div><div class='del'>-			     NV04_PFIFO_CACHE1_PULL0_HASH_BUSY, 0))</div><div class='add'>+				  NV04_PFIFO_CACHE1_PULL0_HASH_BUSY, 0))</div><div class='ctx'> 			NV_ERROR(dev, "Timeout idling the PFIFO puller.\n");</div><div class='ctx'> </div><div class='ctx'> 		if (nv_rd32(dev, NV04_PFIFO_CACHE1_PULL0) &amp;</div><div class='del'>-		    NV04_PFIFO_CACHE1_PULL0_HASH_FAILED)</div><div class='add'>+				 NV04_PFIFO_CACHE1_PULL0_HASH_FAILED)</div><div class='ctx'> 			nv_wr32(dev, NV03_PFIFO_INTR_0,</div><div class='del'>-				NV_PFIFO_INTR_CACHE_ERROR);</div><div class='add'>+				     NV_PFIFO_INTR_CACHE_ERROR);</div><div class='ctx'> </div><div class='ctx'> 		nv_wr32(dev, NV04_PFIFO_CACHE1_HASH, 0);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -100,242 +89,182 @@ nv04_fifo_cache_pull(struct drm_device *dev, bool enable)</div><div class='ctx'> 	return pull &amp; 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int</div><div class='del'>-nv04_fifo_channel_id(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	return nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) &amp;</div><div class='del'>-			NV03_PFIFO_CACHE1_PUSH1_CHID_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef __BIG_ENDIAN</div><div class='del'>-#define DMA_FETCH_ENDIANNESS NV_PFIFO_CACHE1_BIG_ENDIAN</div><div class='del'>-#else</div><div class='del'>-#define DMA_FETCH_ENDIANNESS 0</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nv04_fifo_create_context(struct nouveau_channel *chan)</div><div class='add'>+static int</div><div class='add'>+nv04_fifo_context_new(struct nouveau_channel *chan, int engine)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv04_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	struct nv04_fifo_chan *fctx;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = nouveau_gpuobj_new_fake(dev, NV04_RAMFC(chan-&gt;id), ~0,</div><div class='del'>-						NV04_RAMFC__SIZE,</div><div class='del'>-						NVOBJ_FLAG_ZERO_ALLOC |</div><div class='del'>-						NVOBJ_FLAG_ZERO_FREE,</div><div class='del'>-						&amp;chan-&gt;ramfc);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	fctx = chan-&gt;engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL);</div><div class='add'>+	if (!fctx)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	/* map channel control registers */</div><div class='ctx'> 	chan-&gt;user = ioremap(pci_resource_start(dev-&gt;pdev, 0) +</div><div class='ctx'> 			     NV03_USER(chan-&gt;id), PAGE_SIZE);</div><div class='del'>-	if (!chan-&gt;user)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* Setup initial state */</div><div class='del'>-	RAMFC_WR(DMA_PUT, chan-&gt;pushbuf_base);</div><div class='del'>-	RAMFC_WR(DMA_GET, chan-&gt;pushbuf_base);</div><div class='del'>-	RAMFC_WR(DMA_INSTANCE, chan-&gt;pushbuf-&gt;pinst &gt;&gt; 4);</div><div class='del'>-	RAMFC_WR(DMA_FETCH, (NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |</div><div class='del'>-			     NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |</div><div class='del'>-			     NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 |</div><div class='del'>-			     DMA_FETCH_ENDIANNESS));</div><div class='add'>+	if (!chan-&gt;user) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* enable the fifo dma operation */</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_MODE,</div><div class='del'>-		nv_rd32(dev, NV04_PFIFO_MODE) | (1 &lt;&lt; chan-&gt;id));</div><div class='add'>+	/* initialise default fifo context */</div><div class='add'>+	ret = nouveau_gpuobj_new_fake(dev, dev_priv-&gt;ramfc-&gt;pinst +</div><div class='add'>+				      chan-&gt;id * 32, ~0, 32,</div><div class='add'>+				      NVOBJ_FLAG_ZERO_FREE, &amp;fctx-&gt;ramfc);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x00, chan-&gt;pushbuf_base);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x04, chan-&gt;pushbuf_base);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x08, chan-&gt;pushbuf-&gt;pinst &gt;&gt; 4);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x0c, 0x00000000);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x10, NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |</div><div class='add'>+				   NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |</div><div class='add'>+#ifdef __BIG_ENDIAN</div><div class='add'>+				   NV_PFIFO_CACHE1_BIG_ENDIAN |</div><div class='add'>+#endif</div><div class='add'>+				   NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x14, 0x00000000);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x18, 0x00000000);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x1c, 0x00000000);</div><div class='ctx'> </div><div class='add'>+	/* enable dma mode on the channel */</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+	nv_mask(dev, NV04_PFIFO_MODE, (1 &lt;&lt; chan-&gt;id), (1 &lt;&lt; chan-&gt;id));</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='del'>-	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.base.context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void</div><div class='del'>-nv04_fifo_destroy_context(struct nouveau_channel *chan)</div><div class='add'>+nv04_fifo_context_del(struct nouveau_channel *chan, int engine)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='add'>+	struct nv04_fifo_priv *priv = nv_engine(chan-&gt;dev, engine);</div><div class='add'>+	struct nv04_fifo_chan *fctx = chan-&gt;engctx[engine];</div><div class='add'>+	struct ramfc_desc *c = priv-&gt;ramfc_desc;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	int chid;</div><div class='ctx'> </div><div class='add'>+	/* prevent fifo context switches */</div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='del'>-	pfifo-&gt;reassign(dev, false);</div><div class='del'>-</div><div class='del'>-	/* Unload the context if it's the currently active one */</div><div class='del'>-	if (pfifo-&gt;channel_id(dev) == chan-&gt;id) {</div><div class='del'>-		pfifo-&gt;disable(dev);</div><div class='del'>-		pfifo-&gt;unload_context(dev);</div><div class='del'>-		pfifo-&gt;enable(dev);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHES, 0);</div><div class='add'>+</div><div class='add'>+	/* if this channel is active, replace it with a null context */</div><div class='add'>+	chid = nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) &amp; priv-&gt;base.channels;</div><div class='add'>+	if (chid == chan-&gt;id) {</div><div class='add'>+		nv_mask(dev, NV04_PFIFO_CACHE1_DMA_PUSH, 0x00000001, 0);</div><div class='add'>+		nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 0);</div><div class='add'>+		nv_mask(dev, NV04_PFIFO_CACHE1_PULL0, 0x00000001, 0);</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			u32 mask = ((1ULL &lt;&lt; c-&gt;bits) - 1) &lt;&lt; c-&gt;regs;</div><div class='add'>+			nv_mask(dev, c-&gt;regp, mask, 0x00000000);</div><div class='add'>+		} while ((++c)-&gt;bits);</div><div class='add'>+</div><div class='add'>+		nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);</div><div class='add'>+		nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);</div><div class='add'>+		nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, priv-&gt;base.channels);</div><div class='add'>+		nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 1);</div><div class='add'>+		nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Keep it from being rescheduled */</div><div class='add'>+	/* restore normal operation, after disabling dma mode */</div><div class='ctx'> 	nv_mask(dev, NV04_PFIFO_MODE, 1 &lt;&lt; chan-&gt;id, 0);</div><div class='del'>-</div><div class='del'>-	pfifo-&gt;reassign(dev, true);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHES, 1);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='ctx'> </div><div class='del'>-	/* Free the channel resources */</div><div class='add'>+	/* clean up */</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;fctx-&gt;ramfc);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;chan-&gt;ramfc); /*XXX: nv40 */</div><div class='ctx'> 	if (chan-&gt;user) {</div><div class='ctx'> 		iounmap(chan-&gt;user);</div><div class='ctx'> 		chan-&gt;user = NULL;</div><div class='ctx'> 	}</div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;chan-&gt;ramfc);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-nv04_fifo_do_load_context(struct drm_device *dev, int chid)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t fc = NV04_RAMFC(chid), tmp;</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUT, nv_ri32(dev, fc + 0));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET, nv_ri32(dev, fc + 4));</div><div class='del'>-	tmp = nv_ri32(dev, fc + 8);</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE, tmp &amp; 0xFFFF);</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT, tmp &gt;&gt; 16);</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_STATE, nv_ri32(dev, fc + 12));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_FETCH, nv_ri32(dev, fc + 16));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_ENGINE, nv_ri32(dev, fc + 20));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL1, nv_ri32(dev, fc + 24));</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nv04_fifo_load_context(struct nouveau_channel *chan)</div><div class='del'>-{</div><div class='del'>-	uint32_t tmp;</div><div class='del'>-</div><div class='del'>-	nv_wr32(chan-&gt;dev, NV03_PFIFO_CACHE1_PUSH1,</div><div class='del'>-			   NV03_PFIFO_CACHE1_PUSH1_DMA | chan-&gt;id);</div><div class='del'>-	nv04_fifo_do_load_context(chan-&gt;dev, chan-&gt;id);</div><div class='del'>-	nv_wr32(chan-&gt;dev, NV04_PFIFO_CACHE1_DMA_PUSH, 1);</div><div class='del'>-</div><div class='del'>-	/* Reset NV04_PFIFO_CACHE1_DMA_CTL_AT_INFO to INVALID */</div><div class='del'>-	tmp = nv_rd32(chan-&gt;dev, NV04_PFIFO_CACHE1_DMA_CTL) &amp; ~(1 &lt;&lt; 31);</div><div class='del'>-	nv_wr32(chan-&gt;dev, NV04_PFIFO_CACHE1_DMA_CTL, tmp);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='del'>-nv04_fifo_unload_context(struct drm_device *dev)</div><div class='add'>+nv04_fifo_init(struct drm_device *dev, int engine)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	struct nouveau_channel *chan = NULL;</div><div class='del'>-	uint32_t tmp;</div><div class='del'>-	int chid;</div><div class='del'>-</div><div class='del'>-	chid = pfifo-&gt;channel_id(dev);</div><div class='del'>-	if (chid &lt; 0 || chid &gt;= dev_priv-&gt;engine.fifo.channels)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	chan = dev_priv-&gt;channels.ptr[chid];</div><div class='del'>-	if (!chan) {</div><div class='del'>-		NV_ERROR(dev, "Inactive channel on PFIFO: %d\n", chid);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	RAMFC_WR(DMA_PUT, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));</div><div class='del'>-	RAMFC_WR(DMA_GET, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));</div><div class='del'>-	tmp  = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT) &lt;&lt; 16;</div><div class='del'>-	tmp |= nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE);</div><div class='del'>-	RAMFC_WR(DMA_INSTANCE, tmp);</div><div class='del'>-	RAMFC_WR(DMA_STATE, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_STATE));</div><div class='del'>-	RAMFC_WR(DMA_FETCH, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_FETCH));</div><div class='del'>-	RAMFC_WR(ENGINE, nv_rd32(dev, NV04_PFIFO_CACHE1_ENGINE));</div><div class='del'>-	RAMFC_WR(PULL1_ENGINE, nv_rd32(dev, NV04_PFIFO_CACHE1_PULL1));</div><div class='del'>-</div><div class='del'>-	nv04_fifo_do_load_context(dev, pfifo-&gt;channels - 1);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo-&gt;channels - 1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	struct nv04_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nv04_fifo_init_reset(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	nv_wr32(dev, NV03_PMC_ENABLE,</div><div class='del'>-		nv_rd32(dev, NV03_PMC_ENABLE) &amp; ~NV_PMC_ENABLE_PFIFO);</div><div class='del'>-	nv_wr32(dev, NV03_PMC_ENABLE,</div><div class='del'>-		nv_rd32(dev, NV03_PMC_ENABLE) |  NV_PMC_ENABLE_PFIFO);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, 0x003224, 0x000f0078);</div><div class='del'>-	nv_wr32(dev, 0x002044, 0x0101ffff);</div><div class='del'>-	nv_wr32(dev, 0x002040, 0x000000ff);</div><div class='del'>-	nv_wr32(dev, 0x002500, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003000, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003050, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003200, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003250, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003220, 0x00000000);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, 0x003250, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003270, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003210, 0x00000000);</div><div class='del'>-}</div><div class='add'>+	nv_mask(dev, NV03_PMC_ENABLE, NV_PMC_ENABLE_PFIFO, 0);</div><div class='add'>+	nv_mask(dev, NV03_PMC_ENABLE, NV_PMC_ENABLE_PFIFO, NV_PMC_ENABLE_PFIFO);</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nv04_fifo_init_ramxx(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	nv_wr32(dev, NV04_PFIFO_DELAY_0, 0x000000ff);</div><div class='add'>+	nv_wr32(dev, NV04_PFIFO_DMA_TIMESLICE, 0x0101ffff);</div><div class='ctx'> </div><div class='ctx'> 	nv_wr32(dev, NV03_PFIFO_RAMHT, (0x03 &lt;&lt; 24) /* search 128 */ |</div><div class='ctx'> 				       ((dev_priv-&gt;ramht-&gt;bits - 9) &lt;&lt; 16) |</div><div class='ctx'> 				       (dev_priv-&gt;ramht-&gt;gpuobj-&gt;pinst &gt;&gt; 8));</div><div class='ctx'> 	nv_wr32(dev, NV03_PFIFO_RAMRO, dev_priv-&gt;ramro-&gt;pinst &gt;&gt; 8);</div><div class='ctx'> 	nv_wr32(dev, NV03_PFIFO_RAMFC, dev_priv-&gt;ramfc-&gt;pinst &gt;&gt; 8);</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nv04_fifo_init_intr(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	nouveau_irq_register(dev, 8, nv04_fifo_isr);</div><div class='del'>-	nv_wr32(dev, 0x002100, 0xffffffff);</div><div class='del'>-	nv_wr32(dev, 0x002140, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, priv-&gt;base.channels);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_INTR_0, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_INTR_EN_0, 0xffffffff);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 1);</div><div class='add'>+	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHES, 1);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;base.channels; i++) {</div><div class='add'>+		if (dev_priv-&gt;channels.ptr[i])</div><div class='add'>+			nv_mask(dev, NV04_PFIFO_MODE, (1 &lt;&lt; i), (1 &lt;&lt; i));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='del'>-nv04_fifo_init(struct drm_device *dev)</div><div class='add'>+nv04_fifo_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	nv04_fifo_init_reset(dev);</div><div class='del'>-	nv04_fifo_init_ramxx(dev);</div><div class='del'>-</div><div class='del'>-	nv04_fifo_do_load_context(dev, pfifo-&gt;channels - 1);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo-&gt;channels - 1);</div><div class='add'>+	struct nv04_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	struct nouveau_channel *chan;</div><div class='add'>+	int chid;</div><div class='ctx'> </div><div class='del'>-	nv04_fifo_init_intr(dev);</div><div class='del'>-	pfifo-&gt;enable(dev);</div><div class='del'>-	pfifo-&gt;reassign(dev, true);</div><div class='add'>+	/* prevent context switches and halt fifo operation */</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHES, 0);</div><div class='add'>+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUSH, 0);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 0);</div><div class='add'>+	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 0);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; dev_priv-&gt;engine.fifo.channels; i++) {</div><div class='del'>-		if (dev_priv-&gt;channels.ptr[i]) {</div><div class='del'>-			uint32_t mode = nv_rd32(dev, NV04_PFIFO_MODE);</div><div class='del'>-			nv_wr32(dev, NV04_PFIFO_MODE, mode | (1 &lt;&lt; i));</div><div class='del'>-		}</div><div class='add'>+	/* store current fifo context in ramfc */</div><div class='add'>+	chid = nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) &amp; priv-&gt;base.channels;</div><div class='add'>+	chan = dev_priv-&gt;channels.ptr[chid];</div><div class='add'>+	if (suspend &amp;&amp; chid != priv-&gt;base.channels &amp;&amp; chan) {</div><div class='add'>+		struct nv04_fifo_chan *fctx = chan-&gt;engctx[engine];</div><div class='add'>+		struct nouveau_gpuobj *ctx = fctx-&gt;ramfc;</div><div class='add'>+		struct ramfc_desc *c = priv-&gt;ramfc_desc;</div><div class='add'>+		do {</div><div class='add'>+			u32 rm = ((1ULL &lt;&lt; c-&gt;bits) - 1) &lt;&lt; c-&gt;regs;</div><div class='add'>+			u32 cm = ((1ULL &lt;&lt; c-&gt;bits) - 1) &lt;&lt; c-&gt;ctxs;</div><div class='add'>+			u32 rv = (nv_rd32(dev, c-&gt;regp) &amp;  rm) &gt;&gt; c-&gt;regs;</div><div class='add'>+			u32 cv = (nv_ro32(ctx, c-&gt;ctxp) &amp; ~cm);</div><div class='add'>+			nv_wo32(ctx, c-&gt;ctxp, cv | (rv &lt;&lt; c-&gt;ctxs));</div><div class='add'>+		} while ((++c)-&gt;bits);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_INTR_EN_0, 0x00000000);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void</div><div class='del'>-nv04_fifo_fini(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	nv_wr32(dev, 0x2140, 0x00000000);</div><div class='del'>-	nouveau_irq_unregister(dev, 8);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static bool</div><div class='ctx'> nouveau_fifo_swmthd(struct drm_device *dev, u32 chid, u32 addr, u32 data)</div><div class='ctx'> {</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_channel *chan = NULL;</div><div class='ctx'> 	struct nouveau_gpuobj *obj;</div><div class='hunk'>@@ -346,7 +275,7 @@ nouveau_fifo_swmthd(struct drm_device *dev, u32 chid, u32 addr, u32 data)</div><div class='ctx'> 	u32 engine;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;channels.lock, flags);</div><div class='del'>-	if (likely(chid &gt;= 0 &amp;&amp; chid &lt; dev_priv-&gt;engine.fifo.channels))</div><div class='add'>+	if (likely(chid &gt;= 0 &amp;&amp; chid &lt; pfifo-&gt;channels))</div><div class='ctx'> 		chan = dev_priv-&gt;channels.ptr[chid];</div><div class='ctx'> 	if (unlikely(!chan))</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -357,7 +286,6 @@ nouveau_fifo_swmthd(struct drm_device *dev, u32 chid, u32 addr, u32 data)</div><div class='ctx'> 		if (unlikely(!obj || obj-&gt;engine != NVOBJ_ENGINE_SW))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		chan-&gt;sw_subchannel[subc] = obj-&gt;class;</div><div class='ctx'> 		engine = 0x0000000f &lt;&lt; (subc * 4);</div><div class='ctx'> </div><div class='ctx'> 		nv_mask(dev, NV04_PFIFO_CACHE1_ENGINE, engine, 0x00000000);</div><div class='hunk'>@@ -368,7 +296,7 @@ nouveau_fifo_swmthd(struct drm_device *dev, u32 chid, u32 addr, u32 data)</div><div class='ctx'> 		if (unlikely(((engine &gt;&gt; (subc * 4)) &amp; 0xf) != 0))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		if (!nouveau_gpuobj_mthd_call(chan, chan-&gt;sw_subchannel[subc],</div><div class='add'>+		if (!nouveau_gpuobj_mthd_call(chan, nouveau_software_class(dev),</div><div class='ctx'> 					      mthd, data))</div><div class='ctx'> 			handled = true;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -391,8 +319,8 @@ static const char *nv_dma_state_err(u32 state)</div><div class='ctx'> void</div><div class='ctx'> nv04_fifo_isr(struct drm_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_engine *engine = &amp;dev_priv-&gt;engine;</div><div class='ctx'> 	uint32_t status, reassign;</div><div class='ctx'> 	int cnt = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -402,7 +330,7 @@ nv04_fifo_isr(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 		nv_wr32(dev, NV03_PFIFO_CACHES, 0);</div><div class='ctx'> </div><div class='del'>-		chid = engine-&gt;fifo.channel_id(dev);</div><div class='add'>+		chid = nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) &amp; pfifo-&gt;channels;</div><div class='ctx'> 		get  = nv_rd32(dev, NV03_PFIFO_CACHE1_GET);</div><div class='ctx'> </div><div class='ctx'> 		if (status &amp; NV_PFIFO_INTR_CACHE_ERROR) {</div><div class='hunk'>@@ -541,3 +469,38 @@ nv04_fifo_isr(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	nv_wr32(dev, NV03_PMC_INTR_0, NV_PMC_INTR_0_PFIFO_PENDING);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+nv04_fifo_destroy(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv04_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+</div><div class='add'>+	nouveau_irq_unregister(dev, 8);</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;eng[engine] = NULL;</div><div class='add'>+	kfree(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nv04_fifo_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv04_fifo_priv *priv;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;base.base.destroy = nv04_fifo_destroy;</div><div class='add'>+	priv-&gt;base.base.init = nv04_fifo_init;</div><div class='add'>+	priv-&gt;base.base.fini = nv04_fifo_fini;</div><div class='add'>+	priv-&gt;base.base.context_new = nv04_fifo_context_new;</div><div class='add'>+	priv-&gt;base.base.context_del = nv04_fifo_context_del;</div><div class='add'>+	priv-&gt;base.channels = 15;</div><div class='add'>+	priv-&gt;ramfc_desc = nv04_ramfc;</div><div class='add'>+	dev_priv-&gt;eng[NVOBJ_ENGINE_FIFO] = &amp;priv-&gt;base.base;</div><div class='add'>+</div><div class='add'>+	nouveau_irq_register(dev, 8, nv04_fifo_isr);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c b/drivers/gpu/drm/nouveau/nv04_graph.c<br/>index dbdea8ed3925..72f1a62903b3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_graph.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv04_graph.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_graph.c</a></div><div class='hunk'>@@ -356,12 +356,12 @@ static struct nouveau_channel *</div><div class='ctx'> nv04_graph_channel(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int chid = dev_priv-&gt;engine.fifo.channels;</div><div class='add'>+	int chid = 15;</div><div class='ctx'> </div><div class='ctx'> 	if (nv_rd32(dev, NV04_PGRAPH_CTX_CONTROL) &amp; 0x00010000)</div><div class='ctx'> 		chid = nv_rd32(dev, NV04_PGRAPH_CTX_USER) &gt;&gt; 24;</div><div class='ctx'> </div><div class='del'>-	if (chid &gt;= dev_priv-&gt;engine.fifo.channels)</div><div class='add'>+	if (chid &gt; 15)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	return dev_priv-&gt;channels.ptr[chid];</div><div class='hunk'>@@ -404,7 +404,6 @@ nv04_graph_load_context(struct nouveau_channel *chan)</div><div class='ctx'> static int</div><div class='ctx'> nv04_graph_unload_context(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_channel *chan = NULL;</div><div class='ctx'> 	struct graph_state *ctx;</div><div class='ctx'> 	uint32_t tmp;</div><div class='hunk'>@@ -420,7 +419,7 @@ nv04_graph_unload_context(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL, 0x10000000);</div><div class='ctx'> 	tmp  = nv_rd32(dev, NV04_PGRAPH_CTX_USER) &amp; 0x00ffffff;</div><div class='del'>-	tmp |= (dev_priv-&gt;engine.fifo.channels - 1) &lt;&lt; 24;</div><div class='add'>+	tmp |= 15 &lt;&lt; 24;</div><div class='ctx'> 	nv_wr32(dev, NV04_PGRAPH_CTX_USER, tmp);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -495,7 +494,6 @@ nv04_graph_object_new(struct nouveau_channel *chan, int engine,</div><div class='ctx'> static int</div><div class='ctx'> nv04_graph_init(struct drm_device *dev, int engine)</div><div class='ctx'> {</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	uint32_t tmp;</div><div class='ctx'> </div><div class='ctx'> 	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) &amp;</div><div class='hunk'>@@ -527,7 +525,7 @@ nv04_graph_init(struct drm_device *dev, int engine)</div><div class='ctx'> 	nv_wr32(dev, NV04_PGRAPH_STATE        , 0xFFFFFFFF);</div><div class='ctx'> 	nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL  , 0x10000100);</div><div class='ctx'> 	tmp  = nv_rd32(dev, NV04_PGRAPH_CTX_USER) &amp; 0x00ffffff;</div><div class='del'>-	tmp |= (dev_priv-&gt;engine.fifo.channels - 1) &lt;&lt; 24;</div><div class='add'>+	tmp |= 15 &lt;&lt; 24;</div><div class='ctx'> 	nv_wr32(dev, NV04_PGRAPH_CTX_USER, tmp);</div><div class='ctx'> </div><div class='ctx'> 	/* These don't belong here, they're part of a per-channel context */</div><div class='hunk'>@@ -550,28 +548,6 @@ nv04_graph_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-nv04_graph_mthd_set_ref(struct nouveau_channel *chan,</div><div class='del'>-			u32 class, u32 mthd, u32 data)</div><div class='del'>-{</div><div class='del'>-	atomic_set(&amp;chan-&gt;fence.last_sequence_irq, data);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nv04_graph_mthd_page_flip(struct nouveau_channel *chan,</div><div class='del'>-			  u32 class, u32 mthd, u32 data)</div><div class='del'>-{</div><div class='del'>-	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	struct nouveau_page_flip_state s;</div><div class='del'>-</div><div class='del'>-	if (!nouveau_finish_page_flip(chan, &amp;s))</div><div class='del'>-		nv_set_crtc_base(dev, s.crtc,</div><div class='del'>-				 s.offset + s.y * s.pitch + s.x * s.bpp / 8);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Software methods, why they are needed, and how they all work:</div><div class='ctx'>  *</div><div class='hunk'>@@ -1020,7 +996,8 @@ nv04_graph_context_switch(struct drm_device *dev)</div><div class='ctx'> 	nv04_graph_unload_context(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Load context for next channel */</div><div class='del'>-	chid = dev_priv-&gt;engine.fifo.channel_id(dev);</div><div class='add'>+	chid = nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) &amp;</div><div class='add'>+			    NV03_PFIFO_CACHE1_PUSH1_CHID_MASK;</div><div class='ctx'> 	chan = dev_priv-&gt;channels.ptr[chid];</div><div class='ctx'> 	if (chan)</div><div class='ctx'> 		nv04_graph_load_context(chan);</div><div class='hunk'>@@ -1345,9 +1322,5 @@ nv04_graph_create(struct drm_device *dev)</div><div class='ctx'> 	NVOBJ_MTHD (dev, 0x005e, 0x0198, nv04_graph_mthd_bind_surf2d);</div><div class='ctx'> 	NVOBJ_MTHD (dev, 0x005e, 0x02fc, nv04_graph_mthd_set_operation);</div><div class='ctx'> </div><div class='del'>-	/* nvsw */</div><div class='del'>-	NVOBJ_CLASS(dev, 0x506e, SW);</div><div class='del'>-	NVOBJ_MTHD (dev, 0x506e, 0x0150, nv04_graph_mthd_set_ref);</div><div class='del'>-	NVOBJ_MTHD (dev, 0x506e, 0x0500, nv04_graph_mthd_page_flip);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv04_instmem.c b/drivers/gpu/drm/nouveau/nv04_instmem.c<br/>index c1248e0740a3..ef7a934a499a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_instmem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv04_instmem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_instmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_instmem.c</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "drm.h"</div><div class='add'>+</div><div class='ctx'> #include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> #include "nouveau_ramht.h"</div><div class='ctx'> </div><div class='ctx'> /* returns the size of fifo context */</div><div class='hunk'>@@ -10,12 +12,15 @@ nouveau_fifo_ctx_size(struct drm_device *dev)</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> </div><div class='ctx'> 	if (dev_priv-&gt;chipset &gt;= 0x40)</div><div class='del'>-		return 128;</div><div class='add'>+		return 128 * 32;</div><div class='ctx'> 	else</div><div class='ctx'> 	if (dev_priv-&gt;chipset &gt;= 0x17)</div><div class='del'>-		return 64;</div><div class='add'>+		return 64 * 32;</div><div class='add'>+	else</div><div class='add'>+	if (dev_priv-&gt;chipset &gt;= 0x10)</div><div class='add'>+		return 32 * 32;</div><div class='ctx'> </div><div class='del'>-	return 32;</div><div class='add'>+	return 32 * 16;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int nv04_instmem_init(struct drm_device *dev)</div><div class='hunk'>@@ -39,14 +44,10 @@ int nv04_instmem_init(struct drm_device *dev)</div><div class='ctx'> 		else if (nv44_graph_class(dev))	    rsvd = 0x4980 * vs;</div><div class='ctx'> 		else				    rsvd = 0x4a40 * vs;</div><div class='ctx'> 		rsvd += 16 * 1024;</div><div class='del'>-		rsvd *= dev_priv-&gt;engine.fifo.channels;</div><div class='del'>-</div><div class='del'>-		/* pciegart table */</div><div class='del'>-		if (pci_is_pcie(dev-&gt;pdev))</div><div class='del'>-			rsvd += 512 * 1024;</div><div class='add'>+		rsvd *= 32; /* per-channel */</div><div class='ctx'> </div><div class='del'>-		/* object storage */</div><div class='del'>-		rsvd += 512 * 1024;</div><div class='add'>+		rsvd += 512 * 1024; /* pci(e)gart table */</div><div class='add'>+		rsvd += 512 * 1024; /* object storage */</div><div class='ctx'> </div><div class='ctx'> 		dev_priv-&gt;ramin_rsvd_vram = round_up(rsvd, 4096);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -71,7 +72,7 @@ int nv04_instmem_init(struct drm_device *dev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* And RAMFC */</div><div class='del'>-	length = dev_priv-&gt;engine.fifo.channels * nouveau_fifo_ctx_size(dev);</div><div class='add'>+	length = nouveau_fifo_ctx_size(dev);</div><div class='ctx'> 	switch (dev_priv-&gt;card_type) {</div><div class='ctx'> 	case NV_40:</div><div class='ctx'> 		offset = 0x20000;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv04_software.c b/drivers/gpu/drm/nouveau/nv04_software.c<br/>new file mode 100644<br/>index 000000000000..0c41abf48774<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv04_software.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv04_software.c</a></div><div class='hunk'>@@ -0,0 +1,147 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ben Skeggs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_fence.h"</div><div class='add'>+#include "nouveau_software.h"</div><div class='add'>+#include "nouveau_hw.h"</div><div class='add'>+</div><div class='add'>+struct nv04_software_priv {</div><div class='add'>+	struct nouveau_software_priv base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv04_software_chan {</div><div class='add'>+	struct nouveau_software_chan base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mthd_flip(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	struct nouveau_page_flip_state state;</div><div class='add'>+</div><div class='add'>+	if (!nouveau_finish_page_flip(chan, &amp;state)) {</div><div class='add'>+		nv_set_crtc_base(chan-&gt;dev, state.crtc, state.offset +</div><div class='add'>+				 state.y * state.pitch +</div><div class='add'>+				 state.x * state.bpp / 8);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv04_software_context_new(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv04_software_chan *pch;</div><div class='add'>+</div><div class='add'>+	pch = kzalloc(sizeof(*pch), GFP_KERNEL);</div><div class='add'>+	if (!pch)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	nouveau_software_context_new(&amp;pch-&gt;base);</div><div class='add'>+	chan-&gt;engctx[engine] = pch;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv04_software_context_del(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv04_software_chan *pch = chan-&gt;engctx[engine];</div><div class='add'>+	chan-&gt;engctx[engine] = NULL;</div><div class='add'>+	kfree(pch);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv04_software_object_new(struct nouveau_channel *chan, int engine,</div><div class='add'>+			 u32 handle, u16 class)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	struct nouveau_gpuobj *obj = NULL;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, chan, 16, 16, 0, &amp;obj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	obj-&gt;engine = 0;</div><div class='add'>+	obj-&gt;class  = class;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_ramht_insert(chan, handle, obj);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;obj);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv04_software_init(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv04_software_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv04_software_destroy(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv04_software_priv *psw = nv_engine(dev, engine);</div><div class='add'>+</div><div class='add'>+	NVOBJ_ENGINE_DEL(dev, SW);</div><div class='add'>+	kfree(psw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nv04_software_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv04_software_priv *psw;</div><div class='add'>+</div><div class='add'>+	psw = kzalloc(sizeof(*psw), GFP_KERNEL);</div><div class='add'>+	if (!psw)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	psw-&gt;base.base.destroy = nv04_software_destroy;</div><div class='add'>+	psw-&gt;base.base.init = nv04_software_init;</div><div class='add'>+	psw-&gt;base.base.fini = nv04_software_fini;</div><div class='add'>+	psw-&gt;base.base.context_new = nv04_software_context_new;</div><div class='add'>+	psw-&gt;base.base.context_del = nv04_software_context_del;</div><div class='add'>+	psw-&gt;base.base.object_new = nv04_software_object_new;</div><div class='add'>+	nouveau_software_create(&amp;psw-&gt;base);</div><div class='add'>+</div><div class='add'>+	NVOBJ_ENGINE_ADD(dev, SW, &amp;psw-&gt;base.base);</div><div class='add'>+	if (dev_priv-&gt;card_type &lt;= NV_04) {</div><div class='add'>+		NVOBJ_CLASS(dev, 0x006e, SW);</div><div class='add'>+		NVOBJ_MTHD (dev, 0x006e, 0x0150, nv04_fence_mthd);</div><div class='add'>+		NVOBJ_MTHD (dev, 0x006e, 0x0500, mthd_flip);</div><div class='add'>+	} else {</div><div class='add'>+		NVOBJ_CLASS(dev, 0x016e, SW);</div><div class='add'>+		NVOBJ_MTHD (dev, 0x016e, 0x0500, mthd_flip);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv10_fence.c b/drivers/gpu/drm/nouveau/nv10_fence.c<br/>new file mode 100644<br/>index 000000000000..8a1b75009185<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv10_fence.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv10_fence.c</a></div><div class='hunk'>@@ -0,0 +1,214 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ben Skeggs &lt;bskeggs@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_dma.h"</div><div class='add'>+#include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_fence.h"</div><div class='add'>+</div><div class='add'>+struct nv10_fence_chan {</div><div class='add'>+	struct nouveau_fence_chan base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv10_fence_priv {</div><div class='add'>+	struct nouveau_fence_priv base;</div><div class='add'>+	struct nouveau_bo *bo;</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	u32 sequence;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv10_fence_emit(struct nouveau_fence *fence)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_channel *chan = fence-&gt;channel;</div><div class='add'>+	int ret = RING_SPACE(chan, 2);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		BEGIN_NV04(chan, 0, NV10_SUBCHAN_REF_CNT, 1);</div><div class='add'>+		OUT_RING  (chan, fence-&gt;sequence);</div><div class='add'>+		FIRE_RING (chan);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv10_fence_sync(struct nouveau_fence *fence,</div><div class='add'>+		struct nouveau_channel *prev, struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv17_fence_sync(struct nouveau_fence *fence,</div><div class='add'>+		struct nouveau_channel *prev, struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	struct nv10_fence_priv *priv = nv_engine(chan-&gt;dev, NVOBJ_ENGINE_FENCE);</div><div class='add'>+	u32 value;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!mutex_trylock(&amp;prev-&gt;mutex))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;priv-&gt;lock);</div><div class='add'>+	value = priv-&gt;sequence;</div><div class='add'>+	priv-&gt;sequence += 2;</div><div class='add'>+	spin_unlock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	ret = RING_SPACE(prev, 5);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		BEGIN_NV04(prev, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);</div><div class='add'>+		OUT_RING  (prev, NvSema);</div><div class='add'>+		OUT_RING  (prev, 0);</div><div class='add'>+		OUT_RING  (prev, value + 0);</div><div class='add'>+		OUT_RING  (prev, value + 1);</div><div class='add'>+		FIRE_RING (prev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ret &amp;&amp; !(ret = RING_SPACE(chan, 5))) {</div><div class='add'>+		BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);</div><div class='add'>+		OUT_RING  (chan, NvSema);</div><div class='add'>+		OUT_RING  (chan, 0);</div><div class='add'>+		OUT_RING  (chan, value + 1);</div><div class='add'>+		OUT_RING  (chan, value + 2);</div><div class='add'>+		FIRE_RING (chan);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;prev-&gt;mutex);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+nv10_fence_read(struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	return nvchan_rd32(chan, 0x0048);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv10_fence_context_del(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv10_fence_chan *fctx = chan-&gt;engctx[engine];</div><div class='add'>+	nouveau_fence_context_del(&amp;fctx-&gt;base);</div><div class='add'>+	chan-&gt;engctx[engine] = NULL;</div><div class='add'>+	kfree(fctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv10_fence_context_new(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv10_fence_priv *priv = nv_engine(chan-&gt;dev, engine);</div><div class='add'>+	struct nv10_fence_chan *fctx;</div><div class='add'>+	struct nouveau_gpuobj *obj;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	fctx = chan-&gt;engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL);</div><div class='add'>+	if (!fctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	nouveau_fence_context_new(&amp;fctx-&gt;base);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;bo) {</div><div class='add'>+		struct ttm_mem_reg *mem = &amp;priv-&gt;bo-&gt;bo.mem;</div><div class='add'>+</div><div class='add'>+		ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_FROM_MEMORY,</div><div class='add'>+					     mem-&gt;start * PAGE_SIZE, mem-&gt;size,</div><div class='add'>+					     NV_MEM_ACCESS_RW,</div><div class='add'>+					     NV_MEM_TARGET_VRAM, &amp;obj);</div><div class='add'>+		if (!ret) {</div><div class='add'>+			ret = nouveau_ramht_insert(chan, NvSema, obj);</div><div class='add'>+			nouveau_gpuobj_ref(NULL, &amp;obj);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		nv10_fence_context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv10_fence_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv10_fence_init(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv10_fence_destroy(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv10_fence_priv *priv = nv_engine(dev, engine);</div><div class='add'>+</div><div class='add'>+	nouveau_bo_ref(NULL, &amp;priv-&gt;bo);</div><div class='add'>+	dev_priv-&gt;eng[engine] = NULL;</div><div class='add'>+	kfree(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nv10_fence_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv10_fence_priv *priv;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;base.engine.destroy = nv10_fence_destroy;</div><div class='add'>+	priv-&gt;base.engine.init = nv10_fence_init;</div><div class='add'>+	priv-&gt;base.engine.fini = nv10_fence_fini;</div><div class='add'>+	priv-&gt;base.engine.context_new = nv10_fence_context_new;</div><div class='add'>+	priv-&gt;base.engine.context_del = nv10_fence_context_del;</div><div class='add'>+	priv-&gt;base.emit = nv10_fence_emit;</div><div class='add'>+	priv-&gt;base.read = nv10_fence_read;</div><div class='add'>+	priv-&gt;base.sync = nv10_fence_sync;</div><div class='add'>+	dev_priv-&gt;eng[NVOBJ_ENGINE_FENCE] = &amp;priv-&gt;base.engine;</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;chipset &gt;= 0x17) {</div><div class='add'>+		ret = nouveau_bo_new(dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,</div><div class='add'>+				     0, 0x0000, NULL, &amp;priv-&gt;bo);</div><div class='add'>+		if (!ret) {</div><div class='add'>+			ret = nouveau_bo_pin(priv-&gt;bo, TTM_PL_FLAG_VRAM);</div><div class='add'>+			if (!ret)</div><div class='add'>+				ret = nouveau_bo_map(priv-&gt;bo);</div><div class='add'>+			if (ret)</div><div class='add'>+				nouveau_bo_ref(NULL, &amp;priv-&gt;bo);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ret == 0) {</div><div class='add'>+			nouveau_bo_wr32(priv-&gt;bo, 0x000, 0x00000000);</div><div class='add'>+			priv-&gt;base.sync = nv17_fence_sync;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		nv10_fence_destroy(dev, NVOBJ_ENGINE_FENCE);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv10_fifo.c b/drivers/gpu/drm/nouveau/nv10_fifo.c<br/>index d2ecbff4bee1..f1fe7d758241 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv10_fifo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv10_fifo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv10_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv10_fifo.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2007 Ben Skeggs.</div><div class='add'>+ * Copyright (C) 2012 Ben Skeggs.</div><div class='ctx'>  * All Rights Reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * Permission is hereby granted, free of charge, to any person obtaining</div><div class='hunk'>@@ -27,220 +27,112 @@</div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "drm.h"</div><div class='ctx'> #include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='add'>+#include "nouveau_util.h"</div><div class='ctx'> #include "nouveau_ramht.h"</div><div class='ctx'> </div><div class='del'>-#define NV10_RAMFC(c) (dev_priv-&gt;ramfc-&gt;pinst + ((c) * NV10_RAMFC__SIZE))</div><div class='del'>-#define NV10_RAMFC__SIZE ((dev_priv-&gt;chipset) &gt;= 0x17 ? 64 : 32)</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nv10_fifo_channel_id(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	return nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) &amp;</div><div class='del'>-			NV10_PFIFO_CACHE1_PUSH1_CHID_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nv10_fifo_create_context(struct nouveau_channel *chan)</div><div class='add'>+static struct ramfc_desc {</div><div class='add'>+	unsigned bits:6;</div><div class='add'>+	unsigned ctxs:5;</div><div class='add'>+	unsigned ctxp:8;</div><div class='add'>+	unsigned regs:5;</div><div class='add'>+	unsigned regp;</div><div class='add'>+} nv10_ramfc[] = {</div><div class='add'>+	{ 32,  0, 0x00,  0, NV04_PFIFO_CACHE1_DMA_PUT },</div><div class='add'>+	{ 32,  0, 0x04,  0, NV04_PFIFO_CACHE1_DMA_GET },</div><div class='add'>+	{ 32,  0, 0x08,  0, NV10_PFIFO_CACHE1_REF_CNT },</div><div class='add'>+	{ 16,  0, 0x0c,  0, NV04_PFIFO_CACHE1_DMA_INSTANCE },</div><div class='add'>+	{ 16, 16, 0x0c,  0, NV04_PFIFO_CACHE1_DMA_DCOUNT },</div><div class='add'>+	{ 32,  0, 0x10,  0, NV04_PFIFO_CACHE1_DMA_STATE },</div><div class='add'>+	{ 32,  0, 0x14,  0, NV04_PFIFO_CACHE1_DMA_FETCH },</div><div class='add'>+	{ 32,  0, 0x18,  0, NV04_PFIFO_CACHE1_ENGINE },</div><div class='add'>+	{ 32,  0, 0x1c,  0, NV04_PFIFO_CACHE1_PULL1 },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv10_fifo_priv {</div><div class='add'>+	struct nouveau_fifo_priv base;</div><div class='add'>+	struct ramfc_desc *ramfc_desc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv10_fifo_chan {</div><div class='add'>+	struct nouveau_fifo_chan base;</div><div class='add'>+	struct nouveau_gpuobj *ramfc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv10_fifo_context_new(struct nouveau_channel *chan, int engine)</div><div class='ctx'> {</div><div class='del'>-	struct drm_nouveau_private *dev_priv = chan-&gt;dev-&gt;dev_private;</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	uint32_t fc = NV10_RAMFC(chan-&gt;id);</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv10_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	struct nv10_fifo_chan *fctx;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = nouveau_gpuobj_new_fake(dev, NV10_RAMFC(chan-&gt;id), ~0,</div><div class='del'>-				      NV10_RAMFC__SIZE, NVOBJ_FLAG_ZERO_ALLOC |</div><div class='del'>-				      NVOBJ_FLAG_ZERO_FREE, &amp;chan-&gt;ramfc);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	fctx = chan-&gt;engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL);</div><div class='add'>+	if (!fctx)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	/* map channel control registers */</div><div class='ctx'> 	chan-&gt;user = ioremap(pci_resource_start(dev-&gt;pdev, 0) +</div><div class='ctx'> 			     NV03_USER(chan-&gt;id), PAGE_SIZE);</div><div class='del'>-	if (!chan-&gt;user)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (!chan-&gt;user) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* Fill entries that are seen filled in dumps of nvidia driver just</div><div class='del'>-	 * after channel's is put into DMA mode</div><div class='del'>-	 */</div><div class='del'>-	nv_wi32(dev, fc +  0, chan-&gt;pushbuf_base);</div><div class='del'>-	nv_wi32(dev, fc +  4, chan-&gt;pushbuf_base);</div><div class='del'>-	nv_wi32(dev, fc + 12, chan-&gt;pushbuf-&gt;pinst &gt;&gt; 4);</div><div class='del'>-	nv_wi32(dev, fc + 20, NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |</div><div class='del'>-			      NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |</div><div class='del'>-			      NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 |</div><div class='add'>+	/* initialise default fifo context */</div><div class='add'>+	ret = nouveau_gpuobj_new_fake(dev, dev_priv-&gt;ramfc-&gt;pinst +</div><div class='add'>+				      chan-&gt;id * 32, ~0, 32,</div><div class='add'>+				      NVOBJ_FLAG_ZERO_FREE, &amp;fctx-&gt;ramfc);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x00, chan-&gt;pushbuf_base);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x04, chan-&gt;pushbuf_base);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x08, 0x00000000);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x0c, chan-&gt;pushbuf-&gt;pinst &gt;&gt; 4);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x10, 0x00000000);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x14, NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |</div><div class='add'>+				   NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-			      NV_PFIFO_CACHE1_BIG_ENDIAN |</div><div class='add'>+				   NV_PFIFO_CACHE1_BIG_ENDIAN |</div><div class='ctx'> #endif</div><div class='del'>-			      0);</div><div class='del'>-</div><div class='del'>-	/* enable the fifo dma operation */</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_MODE,</div><div class='del'>-		nv_rd32(dev, NV04_PFIFO_MODE) | (1 &lt;&lt; chan-&gt;id));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-nv10_fifo_do_load_context(struct drm_device *dev, int chid)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t fc = NV10_RAMFC(chid), tmp;</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUT, nv_ri32(dev, fc + 0));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET, nv_ri32(dev, fc + 4));</div><div class='del'>-	nv_wr32(dev, NV10_PFIFO_CACHE1_REF_CNT, nv_ri32(dev, fc + 8));</div><div class='del'>-</div><div class='del'>-	tmp = nv_ri32(dev, fc + 12);</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE, tmp &amp; 0xFFFF);</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT, tmp &gt;&gt; 16);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_STATE, nv_ri32(dev, fc + 16));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_FETCH, nv_ri32(dev, fc + 20));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_ENGINE, nv_ri32(dev, fc + 24));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL1, nv_ri32(dev, fc + 28));</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;chipset &lt; 0x17)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, NV10_PFIFO_CACHE1_ACQUIRE_VALUE, nv_ri32(dev, fc + 32));</div><div class='del'>-	tmp = nv_ri32(dev, fc + 36);</div><div class='del'>-	nv_wr32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP, tmp);</div><div class='del'>-	nv_wr32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT, nv_ri32(dev, fc + 40));</div><div class='del'>-	nv_wr32(dev, NV10_PFIFO_CACHE1_SEMAPHORE, nv_ri32(dev, fc + 44));</div><div class='del'>-	nv_wr32(dev, NV10_PFIFO_CACHE1_DMA_SUBROUTINE, nv_ri32(dev, fc + 48));</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nv10_fifo_load_context(struct nouveau_channel *chan)</div><div class='del'>-{</div><div class='del'>-	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	uint32_t tmp;</div><div class='del'>-</div><div class='del'>-	nv10_fifo_do_load_context(dev, chan-&gt;id);</div><div class='add'>+				   NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x18, 0x00000000);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x1c, 0x00000000);</div><div class='ctx'> </div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1,</div><div class='del'>-		     NV03_PFIFO_CACHE1_PUSH1_DMA | chan-&gt;id);</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUSH, 1);</div><div class='add'>+	/* enable dma mode on the channel */</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+	nv_mask(dev, NV04_PFIFO_MODE, (1 &lt;&lt; chan-&gt;id), (1 &lt;&lt; chan-&gt;id));</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='ctx'> </div><div class='del'>-	/* Reset NV04_PFIFO_CACHE1_DMA_CTL_AT_INFO to INVALID */</div><div class='del'>-	tmp = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_CTL) &amp; ~(1 &lt;&lt; 31);</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_CTL, tmp);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+error:</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.base.context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='del'>-nv10_fifo_unload_context(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	uint32_t fc, tmp;</div><div class='del'>-	int chid;</div><div class='del'>-</div><div class='del'>-	chid = pfifo-&gt;channel_id(dev);</div><div class='del'>-	if (chid &lt; 0 || chid &gt;= dev_priv-&gt;engine.fifo.channels)</div><div class='del'>-		return 0;</div><div class='del'>-	fc = NV10_RAMFC(chid);</div><div class='del'>-</div><div class='del'>-	nv_wi32(dev, fc +  0, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));</div><div class='del'>-	nv_wi32(dev, fc +  4, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));</div><div class='del'>-	nv_wi32(dev, fc +  8, nv_rd32(dev, NV10_PFIFO_CACHE1_REF_CNT));</div><div class='del'>-	tmp  = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE) &amp; 0xFFFF;</div><div class='del'>-	tmp |= (nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT) &lt;&lt; 16);</div><div class='del'>-	nv_wi32(dev, fc + 12, tmp);</div><div class='del'>-	nv_wi32(dev, fc + 16, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_STATE));</div><div class='del'>-	nv_wi32(dev, fc + 20, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_FETCH));</div><div class='del'>-	nv_wi32(dev, fc + 24, nv_rd32(dev, NV04_PFIFO_CACHE1_ENGINE));</div><div class='del'>-	nv_wi32(dev, fc + 28, nv_rd32(dev, NV04_PFIFO_CACHE1_PULL1));</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;chipset &lt; 0x17)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	nv_wi32(dev, fc + 32, nv_rd32(dev, NV10_PFIFO_CACHE1_ACQUIRE_VALUE));</div><div class='del'>-	tmp = nv_rd32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP);</div><div class='del'>-	nv_wi32(dev, fc + 36, tmp);</div><div class='del'>-	nv_wi32(dev, fc + 40, nv_rd32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT));</div><div class='del'>-	nv_wi32(dev, fc + 44, nv_rd32(dev, NV10_PFIFO_CACHE1_SEMAPHORE));</div><div class='del'>-	nv_wi32(dev, fc + 48, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	nv10_fifo_do_load_context(dev, pfifo-&gt;channels - 1);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo-&gt;channels - 1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-nv10_fifo_init_reset(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	nv_wr32(dev, NV03_PMC_ENABLE,</div><div class='del'>-		nv_rd32(dev, NV03_PMC_ENABLE) &amp; ~NV_PMC_ENABLE_PFIFO);</div><div class='del'>-	nv_wr32(dev, NV03_PMC_ENABLE,</div><div class='del'>-		nv_rd32(dev, NV03_PMC_ENABLE) |  NV_PMC_ENABLE_PFIFO);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, 0x003224, 0x000f0078);</div><div class='del'>-	nv_wr32(dev, 0x002044, 0x0101ffff);</div><div class='del'>-	nv_wr32(dev, 0x002040, 0x000000ff);</div><div class='del'>-	nv_wr32(dev, 0x002500, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003000, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003050, 0x00000000);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, 0x003258, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003210, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003270, 0x00000000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-nv10_fifo_init_ramxx(struct drm_device *dev)</div><div class='add'>+nv10_fifo_create(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv10_fifo_priv *priv;</div><div class='ctx'> </div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_RAMHT, (0x03 &lt;&lt; 24) /* search 128 */ |</div><div class='del'>-				       ((dev_priv-&gt;ramht-&gt;bits - 9) &lt;&lt; 16) |</div><div class='del'>-				       (dev_priv-&gt;ramht-&gt;gpuobj-&gt;pinst &gt;&gt; 8));</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_RAMRO, dev_priv-&gt;ramro-&gt;pinst &gt;&gt; 8);</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (dev_priv-&gt;chipset &lt; 0x17) {</div><div class='del'>-		nv_wr32(dev, NV03_PFIFO_RAMFC, dev_priv-&gt;ramfc-&gt;pinst &gt;&gt; 8);</div><div class='del'>-	} else {</div><div class='del'>-		nv_wr32(dev, NV03_PFIFO_RAMFC, (dev_priv-&gt;ramfc-&gt;pinst &gt;&gt; 8) |</div><div class='del'>-					       (1 &lt;&lt; 16) /* 64 Bytes entry*/);</div><div class='del'>-		/* XXX nvidia blob set bit 18, 21,23 for nv20 &amp; nv30 */</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+	priv-&gt;base.base.destroy = nv04_fifo_destroy;</div><div class='add'>+	priv-&gt;base.base.init = nv04_fifo_init;</div><div class='add'>+	priv-&gt;base.base.fini = nv04_fifo_fini;</div><div class='add'>+	priv-&gt;base.base.context_new = nv10_fifo_context_new;</div><div class='add'>+	priv-&gt;base.base.context_del = nv04_fifo_context_del;</div><div class='add'>+	priv-&gt;base.channels = 31;</div><div class='add'>+	priv-&gt;ramfc_desc = nv10_ramfc;</div><div class='add'>+	dev_priv-&gt;eng[NVOBJ_ENGINE_FIFO] = &amp;priv-&gt;base.base;</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nv10_fifo_init_intr(struct drm_device *dev)</div><div class='del'>-{</div><div class='ctx'> 	nouveau_irq_register(dev, 8, nv04_fifo_isr);</div><div class='del'>-	nv_wr32(dev, 0x002100, 0xffffffff);</div><div class='del'>-	nv_wr32(dev, 0x002140, 0xffffffff);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nv10_fifo_init(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	nv10_fifo_init_reset(dev);</div><div class='del'>-	nv10_fifo_init_ramxx(dev);</div><div class='del'>-</div><div class='del'>-	nv10_fifo_do_load_context(dev, pfifo-&gt;channels - 1);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo-&gt;channels - 1);</div><div class='del'>-</div><div class='del'>-	nv10_fifo_init_intr(dev);</div><div class='del'>-	pfifo-&gt;enable(dev);</div><div class='del'>-	pfifo-&gt;reassign(dev, true);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; dev_priv-&gt;engine.fifo.channels; i++) {</div><div class='del'>-		if (dev_priv-&gt;channels.ptr[i]) {</div><div class='del'>-			uint32_t mode = nv_rd32(dev, NV04_PFIFO_MODE);</div><div class='del'>-			nv_wr32(dev, NV04_PFIFO_MODE, mode | (1 &lt;&lt; i));</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv10_gpio.c b/drivers/gpu/drm/nouveau/nv10_gpio.c<br/>index 550ad3fcf0af..9d79180069df 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv10_gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv10_gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv10_gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv10_gpio.c</a></div><div class='hunk'>@@ -65,7 +65,7 @@ nv10_gpio_drive(struct drm_device *dev, int line, int dir, int out)</div><div class='ctx'> 	if (line &lt; 10) {</div><div class='ctx'> 		line = (line - 2) * 4;</div><div class='ctx'> 		reg  = NV_PCRTC_GPIO_EXT;</div><div class='del'>-		mask = 0x00000003 &lt;&lt; ((line - 2) * 4);</div><div class='add'>+		mask = 0x00000003;</div><div class='ctx'> 		data = (dir &lt;&lt; 1) | out;</div><div class='ctx'> 	} else</div><div class='ctx'> 	if (line &lt; 14) {</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv10_graph.c b/drivers/gpu/drm/nouveau/nv10_graph.c<br/>index 7255e4a4d3f3..fb1d88a951de 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv10_graph.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv10_graph.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv10_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv10_graph.c</a></div><div class='hunk'>@@ -759,7 +759,6 @@ static int</div><div class='ctx'> nv10_graph_unload_context(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='ctx'> 	struct nouveau_channel *chan;</div><div class='ctx'> 	struct graph_state *ctx;</div><div class='ctx'> 	uint32_t tmp;</div><div class='hunk'>@@ -782,7 +781,7 @@ nv10_graph_unload_context(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000000);</div><div class='ctx'> 	tmp  = nv_rd32(dev, NV10_PGRAPH_CTX_USER) &amp; 0x00ffffff;</div><div class='del'>-	tmp |= (pfifo-&gt;channels - 1) &lt;&lt; 24;</div><div class='add'>+	tmp |= 31 &lt;&lt; 24;</div><div class='ctx'> 	nv_wr32(dev, NV10_PGRAPH_CTX_USER, tmp);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -822,12 +821,12 @@ struct nouveau_channel *</div><div class='ctx'> nv10_graph_channel(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int chid = dev_priv-&gt;engine.fifo.channels;</div><div class='add'>+	int chid = 31;</div><div class='ctx'> </div><div class='ctx'> 	if (nv_rd32(dev, NV10_PGRAPH_CTX_CONTROL) &amp; 0x00010000)</div><div class='ctx'> 		chid = nv_rd32(dev, NV10_PGRAPH_CTX_USER) &gt;&gt; 24;</div><div class='ctx'> </div><div class='del'>-	if (chid &gt;= dev_priv-&gt;engine.fifo.channels)</div><div class='add'>+	if (chid &gt;= 31)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	return dev_priv-&gt;channels.ptr[chid];</div><div class='hunk'>@@ -948,7 +947,7 @@ nv10_graph_init(struct drm_device *dev, int engine)</div><div class='ctx'> 	nv_wr32(dev, NV10_PGRAPH_STATE, 0xFFFFFFFF);</div><div class='ctx'> </div><div class='ctx'> 	tmp  = nv_rd32(dev, NV10_PGRAPH_CTX_USER) &amp; 0x00ffffff;</div><div class='del'>-	tmp |= (dev_priv-&gt;engine.fifo.channels - 1) &lt;&lt; 24;</div><div class='add'>+	tmp |= 31 &lt;&lt; 24;</div><div class='ctx'> 	nv_wr32(dev, NV10_PGRAPH_CTX_USER, tmp);</div><div class='ctx'> 	nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000100);</div><div class='ctx'> 	nv_wr32(dev, NV10_PGRAPH_FFINTFC_ST2, 0x08000000);</div><div class='hunk'>@@ -1153,10 +1152,6 @@ nv10_graph_create(struct drm_device *dev)</div><div class='ctx'> 	NVOBJ_ENGINE_ADD(dev, GR, &amp;pgraph-&gt;base);</div><div class='ctx'> 	nouveau_irq_register(dev, 12, nv10_graph_isr);</div><div class='ctx'> </div><div class='del'>-	/* nvsw */</div><div class='del'>-	NVOBJ_CLASS(dev, 0x506e, SW);</div><div class='del'>-	NVOBJ_MTHD (dev, 0x506e, 0x0500, nv04_graph_mthd_page_flip);</div><div class='del'>-</div><div class='ctx'> 	NVOBJ_CLASS(dev, 0x0030, GR); /* null */</div><div class='ctx'> 	NVOBJ_CLASS(dev, 0x0039, GR); /* m2mf */</div><div class='ctx'> 	NVOBJ_CLASS(dev, 0x004a, GR); /* gdirect */</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv17_fifo.c b/drivers/gpu/drm/nouveau/nv17_fifo.c<br/>new file mode 100644<br/>index 000000000000..d9e482e4abee<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv17_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv17_fifo.c</a></div><div class='hunk'>@@ -0,0 +1,177 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 Ben Skeggs.</div><div class='add'>+ * All Rights Reserved.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining</div><div class='add'>+ * a copy of this software and associated documentation files (the</div><div class='add'>+ * "Software"), to deal in the Software without restriction, including</div><div class='add'>+ * without limitation the rights to use, copy, modify, merge, publish,</div><div class='add'>+ * distribute, sublicense, and/or sell copies of the Software, and to</div><div class='add'>+ * permit persons to whom the Software is furnished to do so, subject to</div><div class='add'>+ * the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the</div><div class='add'>+ * next paragraph) shall be included in all copies or substantial</div><div class='add'>+ * portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.</div><div class='add'>+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE</div><div class='add'>+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION</div><div class='add'>+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION</div><div class='add'>+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='add'>+#include "nouveau_util.h"</div><div class='add'>+#include "nouveau_ramht.h"</div><div class='add'>+</div><div class='add'>+static struct ramfc_desc {</div><div class='add'>+	unsigned bits:6;</div><div class='add'>+	unsigned ctxs:5;</div><div class='add'>+	unsigned ctxp:8;</div><div class='add'>+	unsigned regs:5;</div><div class='add'>+	unsigned regp;</div><div class='add'>+} nv17_ramfc[] = {</div><div class='add'>+	{ 32,  0, 0x00,  0, NV04_PFIFO_CACHE1_DMA_PUT },</div><div class='add'>+	{ 32,  0, 0x04,  0, NV04_PFIFO_CACHE1_DMA_GET },</div><div class='add'>+	{ 32,  0, 0x08,  0, NV10_PFIFO_CACHE1_REF_CNT },</div><div class='add'>+	{ 16,  0, 0x0c,  0, NV04_PFIFO_CACHE1_DMA_INSTANCE },</div><div class='add'>+	{ 16, 16, 0x0c,  0, NV04_PFIFO_CACHE1_DMA_DCOUNT },</div><div class='add'>+	{ 32,  0, 0x10,  0, NV04_PFIFO_CACHE1_DMA_STATE },</div><div class='add'>+	{ 32,  0, 0x14,  0, NV04_PFIFO_CACHE1_DMA_FETCH },</div><div class='add'>+	{ 32,  0, 0x18,  0, NV04_PFIFO_CACHE1_ENGINE },</div><div class='add'>+	{ 32,  0, 0x1c,  0, NV04_PFIFO_CACHE1_PULL1 },</div><div class='add'>+	{ 32,  0, 0x20,  0, NV10_PFIFO_CACHE1_ACQUIRE_VALUE },</div><div class='add'>+	{ 32,  0, 0x24,  0, NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP },</div><div class='add'>+	{ 32,  0, 0x28,  0, NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT },</div><div class='add'>+	{ 32,  0, 0x2c,  0, NV10_PFIFO_CACHE1_SEMAPHORE },</div><div class='add'>+	{ 32,  0, 0x30,  0, NV10_PFIFO_CACHE1_DMA_SUBROUTINE },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv17_fifo_priv {</div><div class='add'>+	struct nouveau_fifo_priv base;</div><div class='add'>+	struct ramfc_desc *ramfc_desc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv17_fifo_chan {</div><div class='add'>+	struct nouveau_fifo_chan base;</div><div class='add'>+	struct nouveau_gpuobj *ramfc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv17_fifo_context_new(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv17_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	struct nv17_fifo_chan *fctx;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	fctx = chan-&gt;engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL);</div><div class='add'>+	if (!fctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* map channel control registers */</div><div class='add'>+	chan-&gt;user = ioremap(pci_resource_start(dev-&gt;pdev, 0) +</div><div class='add'>+			     NV03_USER(chan-&gt;id), PAGE_SIZE);</div><div class='add'>+	if (!chan-&gt;user) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* initialise default fifo context */</div><div class='add'>+	ret = nouveau_gpuobj_new_fake(dev, dev_priv-&gt;ramfc-&gt;pinst +</div><div class='add'>+				      chan-&gt;id * 64, ~0, 64,</div><div class='add'>+				      NVOBJ_FLAG_ZERO_ALLOC |</div><div class='add'>+				      NVOBJ_FLAG_ZERO_FREE, &amp;fctx-&gt;ramfc);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x00, chan-&gt;pushbuf_base);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x04, chan-&gt;pushbuf_base);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x0c, chan-&gt;pushbuf-&gt;pinst &gt;&gt; 4);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x14, NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |</div><div class='add'>+				   NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |</div><div class='add'>+#ifdef __BIG_ENDIAN</div><div class='add'>+				   NV_PFIFO_CACHE1_BIG_ENDIAN |</div><div class='add'>+#endif</div><div class='add'>+				   NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8);</div><div class='add'>+</div><div class='add'>+	/* enable dma mode on the channel */</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+	nv_mask(dev, NV04_PFIFO_MODE, (1 &lt;&lt; chan-&gt;id), (1 &lt;&lt; chan-&gt;id));</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.base.context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv17_fifo_init(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv17_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	nv_mask(dev, NV03_PMC_ENABLE, NV_PMC_ENABLE_PFIFO, 0);</div><div class='add'>+	nv_mask(dev, NV03_PMC_ENABLE, NV_PMC_ENABLE_PFIFO, NV_PMC_ENABLE_PFIFO);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, NV04_PFIFO_DELAY_0, 0x000000ff);</div><div class='add'>+	nv_wr32(dev, NV04_PFIFO_DMA_TIMESLICE, 0x0101ffff);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_RAMHT, (0x03 &lt;&lt; 24) /* search 128 */ |</div><div class='add'>+				       ((dev_priv-&gt;ramht-&gt;bits - 9) &lt;&lt; 16) |</div><div class='add'>+				       (dev_priv-&gt;ramht-&gt;gpuobj-&gt;pinst &gt;&gt; 8));</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_RAMRO, dev_priv-&gt;ramro-&gt;pinst &gt;&gt; 8);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_RAMFC, 0x00010000 |</div><div class='add'>+				       dev_priv-&gt;ramfc-&gt;pinst &gt;&gt; 8);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, priv-&gt;base.channels);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_INTR_0, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_INTR_EN_0, 0xffffffff);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 1);</div><div class='add'>+	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHES, 1);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;base.channels; i++) {</div><div class='add'>+		if (dev_priv-&gt;channels.ptr[i])</div><div class='add'>+			nv_mask(dev, NV04_PFIFO_MODE, (1 &lt;&lt; i), (1 &lt;&lt; i));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nv17_fifo_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv17_fifo_priv *priv;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;base.base.destroy = nv04_fifo_destroy;</div><div class='add'>+	priv-&gt;base.base.init = nv17_fifo_init;</div><div class='add'>+	priv-&gt;base.base.fini = nv04_fifo_fini;</div><div class='add'>+	priv-&gt;base.base.context_new = nv17_fifo_context_new;</div><div class='add'>+	priv-&gt;base.base.context_del = nv04_fifo_context_del;</div><div class='add'>+	priv-&gt;base.channels = 31;</div><div class='add'>+	priv-&gt;ramfc_desc = nv17_ramfc;</div><div class='add'>+	dev_priv-&gt;eng[NVOBJ_ENGINE_FIFO] = &amp;priv-&gt;base.base;</div><div class='add'>+</div><div class='add'>+	nouveau_irq_register(dev, 8, nv04_fifo_isr);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c<br/>index 183e37512ef9..e34ea30758f6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv20_graph.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv20_graph.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv20_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv20_graph.c</a></div><div class='hunk'>@@ -43,8 +43,6 @@ struct nv20_graph_engine {</div><div class='ctx'> int</div><div class='ctx'> nv20_graph_unload_context(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='ctx'> 	struct nouveau_channel *chan;</div><div class='ctx'> 	struct nouveau_gpuobj *grctx;</div><div class='ctx'> 	u32 tmp;</div><div class='hunk'>@@ -62,7 +60,7 @@ nv20_graph_unload_context(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000000);</div><div class='ctx'> 	tmp  = nv_rd32(dev, NV10_PGRAPH_CTX_USER) &amp; 0x00ffffff;</div><div class='del'>-	tmp |= (pfifo-&gt;channels - 1) &lt;&lt; 24;</div><div class='add'>+	tmp |= 31 &lt;&lt; 24;</div><div class='ctx'> 	nv_wr32(dev, NV10_PGRAPH_CTX_USER, tmp);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -796,10 +794,6 @@ nv20_graph_create(struct drm_device *dev)</div><div class='ctx'> 	NVOBJ_ENGINE_ADD(dev, GR, &amp;pgraph-&gt;base);</div><div class='ctx'> 	nouveau_irq_register(dev, 12, nv20_graph_isr);</div><div class='ctx'> </div><div class='del'>-	/* nvsw */</div><div class='del'>-	NVOBJ_CLASS(dev, 0x506e, SW);</div><div class='del'>-	NVOBJ_MTHD (dev, 0x506e, 0x0500, nv04_graph_mthd_page_flip);</div><div class='del'>-</div><div class='ctx'> 	NVOBJ_CLASS(dev, 0x0030, GR); /* null */</div><div class='ctx'> 	NVOBJ_CLASS(dev, 0x0039, GR); /* m2mf */</div><div class='ctx'> 	NVOBJ_CLASS(dev, 0x004a, GR); /* gdirect */</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv31_mpeg.c b/drivers/gpu/drm/nouveau/nv31_mpeg.c<br/>index 6f06a0713f00..5f239bf658c4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv31_mpeg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv31_mpeg.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv31_mpeg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv31_mpeg.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> #include "nouveau_ramht.h"</div><div class='ctx'> </div><div class='ctx'> struct nv31_mpeg_engine {</div><div class='hunk'>@@ -208,6 +209,7 @@ nv31_mpeg_mthd_dma(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)</div><div class='ctx'> static int</div><div class='ctx'> nv31_mpeg_isr_chid(struct drm_device *dev, u32 inst)</div><div class='ctx'> {</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_gpuobj *ctx;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -218,7 +220,7 @@ nv31_mpeg_isr_chid(struct drm_device *dev, u32 inst)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;channels.lock, flags);</div><div class='del'>-	for (i = 0; i &lt; dev_priv-&gt;engine.fifo.channels; i++) {</div><div class='add'>+	for (i = 0; i &lt; pfifo-&gt;channels; i++) {</div><div class='ctx'> 		if (!dev_priv-&gt;channels.ptr[i])</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv40_fifo.c b/drivers/gpu/drm/nouveau/nv40_fifo.c<br/>index 68cb2d991c88..cdc818479b0a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv40_fifo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv40_fifo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv40_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv40_fifo.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2007 Ben Skeggs.</div><div class='add'>+ * Copyright (C) 2012 Ben Skeggs.</div><div class='ctx'>  * All Rights Reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * Permission is hereby granted, free of charge, to any person obtaining</div><div class='hunk'>@@ -25,215 +25,123 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='ctx'> #include "nouveau_drv.h"</div><div class='del'>-#include "nouveau_drm.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='add'>+#include "nouveau_util.h"</div><div class='ctx'> #include "nouveau_ramht.h"</div><div class='ctx'> </div><div class='del'>-#define NV40_RAMFC(c) (dev_priv-&gt;ramfc-&gt;pinst + ((c) * NV40_RAMFC__SIZE))</div><div class='del'>-#define NV40_RAMFC__SIZE 128</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nv40_fifo_create_context(struct nouveau_channel *chan)</div><div class='add'>+static struct ramfc_desc {</div><div class='add'>+	unsigned bits:6;</div><div class='add'>+	unsigned ctxs:5;</div><div class='add'>+	unsigned ctxp:8;</div><div class='add'>+	unsigned regs:5;</div><div class='add'>+	unsigned regp;</div><div class='add'>+} nv40_ramfc[] = {</div><div class='add'>+	{ 32,  0, 0x00,  0, NV04_PFIFO_CACHE1_DMA_PUT },</div><div class='add'>+	{ 32,  0, 0x04,  0, NV04_PFIFO_CACHE1_DMA_GET },</div><div class='add'>+	{ 32,  0, 0x08,  0, NV10_PFIFO_CACHE1_REF_CNT },</div><div class='add'>+	{ 32,  0, 0x0c,  0, NV04_PFIFO_CACHE1_DMA_INSTANCE },</div><div class='add'>+	{ 32,  0, 0x10,  0, NV04_PFIFO_CACHE1_DMA_DCOUNT },</div><div class='add'>+	{ 32,  0, 0x14,  0, NV04_PFIFO_CACHE1_DMA_STATE },</div><div class='add'>+	{ 28,  0, 0x18,  0, NV04_PFIFO_CACHE1_DMA_FETCH },</div><div class='add'>+	{  2, 28, 0x18, 28, 0x002058 },</div><div class='add'>+	{ 32,  0, 0x1c,  0, NV04_PFIFO_CACHE1_ENGINE },</div><div class='add'>+	{ 32,  0, 0x20,  0, NV04_PFIFO_CACHE1_PULL1 },</div><div class='add'>+	{ 32,  0, 0x24,  0, NV10_PFIFO_CACHE1_ACQUIRE_VALUE },</div><div class='add'>+	{ 32,  0, 0x28,  0, NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP },</div><div class='add'>+	{ 32,  0, 0x2c,  0, NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT },</div><div class='add'>+	{ 32,  0, 0x30,  0, NV10_PFIFO_CACHE1_SEMAPHORE },</div><div class='add'>+	{ 32,  0, 0x34,  0, NV10_PFIFO_CACHE1_DMA_SUBROUTINE },</div><div class='add'>+	{ 32,  0, 0x38,  0, NV40_PFIFO_GRCTX_INSTANCE },</div><div class='add'>+	{ 17,  0, 0x3c,  0, NV04_PFIFO_DMA_TIMESLICE },</div><div class='add'>+	{ 32,  0, 0x40,  0, 0x0032e4 },</div><div class='add'>+	{ 32,  0, 0x44,  0, 0x0032e8 },</div><div class='add'>+	{ 32,  0, 0x4c,  0, 0x002088 },</div><div class='add'>+	{ 32,  0, 0x50,  0, 0x003300 },</div><div class='add'>+	{ 32,  0, 0x54,  0, 0x00330c },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv40_fifo_priv {</div><div class='add'>+	struct nouveau_fifo_priv base;</div><div class='add'>+	struct ramfc_desc *ramfc_desc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv40_fifo_chan {</div><div class='add'>+	struct nouveau_fifo_chan base;</div><div class='add'>+	struct nouveau_gpuobj *ramfc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv40_fifo_context_new(struct nouveau_channel *chan, int engine)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t fc = NV40_RAMFC(chan-&gt;id);</div><div class='add'>+	struct nv40_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	struct nv40_fifo_chan *fctx;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = nouveau_gpuobj_new_fake(dev, NV40_RAMFC(chan-&gt;id), ~0,</div><div class='del'>-				      NV40_RAMFC__SIZE, NVOBJ_FLAG_ZERO_ALLOC |</div><div class='del'>-				      NVOBJ_FLAG_ZERO_FREE, &amp;chan-&gt;ramfc);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	chan-&gt;user = ioremap(pci_resource_start(dev-&gt;pdev, 0) +</div><div class='del'>-			     NV40_USER(chan-&gt;id), PAGE_SIZE);</div><div class='del'>-	if (!chan-&gt;user)</div><div class='add'>+	fctx = chan-&gt;engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL);</div><div class='add'>+	if (!fctx)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+	/* map channel control registers */</div><div class='add'>+	chan-&gt;user = ioremap(pci_resource_start(dev-&gt;pdev, 0) +</div><div class='add'>+			     NV03_USER(chan-&gt;id), PAGE_SIZE);</div><div class='add'>+	if (!chan-&gt;user) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	nv_wi32(dev, fc +  0, chan-&gt;pushbuf_base);</div><div class='del'>-	nv_wi32(dev, fc +  4, chan-&gt;pushbuf_base);</div><div class='del'>-	nv_wi32(dev, fc + 12, chan-&gt;pushbuf-&gt;pinst &gt;&gt; 4);</div><div class='del'>-	nv_wi32(dev, fc + 24, NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |</div><div class='del'>-			      NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |</div><div class='del'>-			      NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 |</div><div class='add'>+	/* initialise default fifo context */</div><div class='add'>+	ret = nouveau_gpuobj_new_fake(dev, dev_priv-&gt;ramfc-&gt;pinst +</div><div class='add'>+				      chan-&gt;id * 128, ~0, 128,</div><div class='add'>+				      NVOBJ_FLAG_ZERO_ALLOC |</div><div class='add'>+				      NVOBJ_FLAG_ZERO_FREE, &amp;fctx-&gt;ramfc);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x00, chan-&gt;pushbuf_base);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x04, chan-&gt;pushbuf_base);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x0c, chan-&gt;pushbuf-&gt;pinst &gt;&gt; 4);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x18, 0x30000000 |</div><div class='add'>+				   NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |</div><div class='add'>+				   NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-			      NV_PFIFO_CACHE1_BIG_ENDIAN |</div><div class='add'>+				   NV_PFIFO_CACHE1_BIG_ENDIAN |</div><div class='ctx'> #endif</div><div class='del'>-			      0x30000000 /* no idea.. */);</div><div class='del'>-	nv_wi32(dev, fc + 60, 0x0001FFFF);</div><div class='del'>-</div><div class='del'>-	/* enable the fifo dma operation */</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_MODE,</div><div class='del'>-		nv_rd32(dev, NV04_PFIFO_MODE) | (1 &lt;&lt; chan-&gt;id));</div><div class='add'>+				   NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x3c, 0x0001ffff);</div><div class='ctx'> </div><div class='add'>+	/* enable dma mode on the channel */</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+	nv_mask(dev, NV04_PFIFO_MODE, (1 &lt;&lt; chan-&gt;id), (1 &lt;&lt; chan-&gt;id));</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-nv40_fifo_do_load_context(struct drm_device *dev, int chid)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t fc = NV40_RAMFC(chid), tmp, tmp2;</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUT, nv_ri32(dev, fc + 0));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET, nv_ri32(dev, fc + 4));</div><div class='del'>-	nv_wr32(dev, NV10_PFIFO_CACHE1_REF_CNT, nv_ri32(dev, fc + 8));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE, nv_ri32(dev, fc + 12));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT, nv_ri32(dev, fc + 16));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_STATE, nv_ri32(dev, fc + 20));</div><div class='del'>-</div><div class='del'>-	/* No idea what 0x2058 is.. */</div><div class='del'>-	tmp   = nv_ri32(dev, fc + 24);</div><div class='del'>-	tmp2  = nv_rd32(dev, 0x2058) &amp; 0xFFF;</div><div class='del'>-	tmp2 |= (tmp &amp; 0x30000000);</div><div class='del'>-	nv_wr32(dev, 0x2058, tmp2);</div><div class='del'>-	tmp  &amp;= ~0x30000000;</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_FETCH, tmp);</div><div class='ctx'> </div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_ENGINE, nv_ri32(dev, fc + 28));</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL1, nv_ri32(dev, fc + 32));</div><div class='del'>-	nv_wr32(dev, NV10_PFIFO_CACHE1_ACQUIRE_VALUE, nv_ri32(dev, fc + 36));</div><div class='del'>-	tmp = nv_ri32(dev, fc + 40);</div><div class='del'>-	nv_wr32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP, tmp);</div><div class='del'>-	nv_wr32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT, nv_ri32(dev, fc + 44));</div><div class='del'>-	nv_wr32(dev, NV10_PFIFO_CACHE1_SEMAPHORE, nv_ri32(dev, fc + 48));</div><div class='del'>-	nv_wr32(dev, NV10_PFIFO_CACHE1_DMA_SUBROUTINE, nv_ri32(dev, fc + 52));</div><div class='del'>-	nv_wr32(dev, NV40_PFIFO_GRCTX_INSTANCE, nv_ri32(dev, fc + 56));</div><div class='add'>+	/*XXX: remove this later, need fifo engine context commit hook */</div><div class='add'>+	nouveau_gpuobj_ref(fctx-&gt;ramfc, &amp;chan-&gt;ramfc);</div><div class='ctx'> </div><div class='del'>-	/* Don't clobber the TIMEOUT_ENABLED flag when restoring from RAMFC */</div><div class='del'>-	tmp  = nv_rd32(dev, NV04_PFIFO_DMA_TIMESLICE) &amp; ~0x1FFFF;</div><div class='del'>-	tmp |= nv_ri32(dev, fc + 60) &amp; 0x1FFFF;</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_DMA_TIMESLICE, tmp);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, 0x32e4, nv_ri32(dev, fc + 64));</div><div class='del'>-	/* NVIDIA does this next line twice... */</div><div class='del'>-	nv_wr32(dev, 0x32e8, nv_ri32(dev, fc + 68));</div><div class='del'>-	nv_wr32(dev, 0x2088, nv_ri32(dev, fc + 76));</div><div class='del'>-	nv_wr32(dev, 0x3300, nv_ri32(dev, fc + 80));</div><div class='del'>-	nv_wr32(dev, 0x330c, nv_ri32(dev, fc + 84));</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nv40_fifo_load_context(struct nouveau_channel *chan)</div><div class='del'>-{</div><div class='del'>-	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	uint32_t tmp;</div><div class='del'>-</div><div class='del'>-	nv40_fifo_do_load_context(dev, chan-&gt;id);</div><div class='del'>-</div><div class='del'>-	/* Set channel active, and in DMA mode */</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1,</div><div class='del'>-		     NV40_PFIFO_CACHE1_PUSH1_DMA | chan-&gt;id);</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUSH, 1);</div><div class='del'>-</div><div class='del'>-	/* Reset DMA_CTL_AT_INFO to INVALID */</div><div class='del'>-	tmp = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_CTL) &amp; ~(1 &lt;&lt; 31);</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_CTL, tmp);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+error:</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.base.context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int</div><div class='del'>-nv40_fifo_unload_context(struct drm_device *dev)</div><div class='add'>+static int</div><div class='add'>+nv40_fifo_init(struct drm_device *dev, int engine)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	uint32_t fc, tmp;</div><div class='del'>-	int chid;</div><div class='del'>-</div><div class='del'>-	chid = pfifo-&gt;channel_id(dev);</div><div class='del'>-	if (chid &lt; 0 || chid &gt;= dev_priv-&gt;engine.fifo.channels)</div><div class='del'>-		return 0;</div><div class='del'>-	fc = NV40_RAMFC(chid);</div><div class='del'>-</div><div class='del'>-	nv_wi32(dev, fc + 0, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));</div><div class='del'>-	nv_wi32(dev, fc + 4, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));</div><div class='del'>-	nv_wi32(dev, fc + 8, nv_rd32(dev, NV10_PFIFO_CACHE1_REF_CNT));</div><div class='del'>-	nv_wi32(dev, fc + 12, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE));</div><div class='del'>-	nv_wi32(dev, fc + 16, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT));</div><div class='del'>-	nv_wi32(dev, fc + 20, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_STATE));</div><div class='del'>-	tmp  = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_FETCH);</div><div class='del'>-	tmp |= nv_rd32(dev, 0x2058) &amp; 0x30000000;</div><div class='del'>-	nv_wi32(dev, fc + 24, tmp);</div><div class='del'>-	nv_wi32(dev, fc + 28, nv_rd32(dev, NV04_PFIFO_CACHE1_ENGINE));</div><div class='del'>-	nv_wi32(dev, fc + 32, nv_rd32(dev, NV04_PFIFO_CACHE1_PULL1));</div><div class='del'>-	nv_wi32(dev, fc + 36, nv_rd32(dev, NV10_PFIFO_CACHE1_ACQUIRE_VALUE));</div><div class='del'>-	tmp = nv_rd32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP);</div><div class='del'>-	nv_wi32(dev, fc + 40, tmp);</div><div class='del'>-	nv_wi32(dev, fc + 44, nv_rd32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT));</div><div class='del'>-	nv_wi32(dev, fc + 48, nv_rd32(dev, NV10_PFIFO_CACHE1_SEMAPHORE));</div><div class='del'>-	/* NVIDIA read 0x3228 first, then write DMA_GET here.. maybe something</div><div class='del'>-	 * more involved depending on the value of 0x3228?</div><div class='del'>-	 */</div><div class='del'>-	nv_wi32(dev, fc + 52, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));</div><div class='del'>-	nv_wi32(dev, fc + 56, nv_rd32(dev, NV40_PFIFO_GRCTX_INSTANCE));</div><div class='del'>-	nv_wi32(dev, fc + 60, nv_rd32(dev, NV04_PFIFO_DMA_TIMESLICE) &amp; 0x1ffff);</div><div class='del'>-	/* No idea what the below is for exactly, ripped from a mmio-trace */</div><div class='del'>-	nv_wi32(dev, fc + 64, nv_rd32(dev, NV40_PFIFO_UNK32E4));</div><div class='del'>-	/* NVIDIA do this next line twice.. bug? */</div><div class='del'>-	nv_wi32(dev, fc + 68, nv_rd32(dev, 0x32e8));</div><div class='del'>-	nv_wi32(dev, fc + 76, nv_rd32(dev, 0x2088));</div><div class='del'>-	nv_wi32(dev, fc + 80, nv_rd32(dev, 0x3300));</div><div class='del'>-#if 0 /* no real idea which is PUT/GET in UNK_48.. */</div><div class='del'>-	tmp  = nv_rd32(dev, NV04_PFIFO_CACHE1_GET);</div><div class='del'>-	tmp |= (nv_rd32(dev, NV04_PFIFO_CACHE1_PUT) &lt;&lt; 16);</div><div class='del'>-	nv_wi32(dev, fc + 72, tmp);</div><div class='del'>-#endif</div><div class='del'>-	nv_wi32(dev, fc + 84, nv_rd32(dev, 0x330c));</div><div class='del'>-</div><div class='del'>-	nv40_fifo_do_load_context(dev, pfifo-&gt;channels - 1);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1,</div><div class='del'>-		     NV40_PFIFO_CACHE1_PUSH1_DMA | (pfifo-&gt;channels - 1));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-nv40_fifo_init_reset(struct drm_device *dev)</div><div class='del'>-{</div><div class='add'>+	struct nv40_fifo_priv *priv = nv_engine(dev, engine);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	nv_wr32(dev, NV03_PMC_ENABLE,</div><div class='del'>-		nv_rd32(dev, NV03_PMC_ENABLE) &amp; ~NV_PMC_ENABLE_PFIFO);</div><div class='del'>-	nv_wr32(dev, NV03_PMC_ENABLE,</div><div class='del'>-		nv_rd32(dev, NV03_PMC_ENABLE) |  NV_PMC_ENABLE_PFIFO);</div><div class='add'>+	nv_mask(dev, NV03_PMC_ENABLE, NV_PMC_ENABLE_PFIFO, 0);</div><div class='add'>+	nv_mask(dev, NV03_PMC_ENABLE, NV_PMC_ENABLE_PFIFO, NV_PMC_ENABLE_PFIFO);</div><div class='ctx'> </div><div class='del'>-	nv_wr32(dev, 0x003224, 0x000f0078);</div><div class='del'>-	nv_wr32(dev, 0x003210, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003270, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003240, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003244, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003258, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x002504, 0x00000000);</div><div class='del'>-	for (i = 0; i &lt; 16; i++)</div><div class='del'>-		nv_wr32(dev, 0x002510 + (i * 4), 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x00250c, 0x0000ffff);</div><div class='del'>-	nv_wr32(dev, 0x002048, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003228, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x0032e8, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x002410, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x002420, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x002058, 0x00000001);</div><div class='del'>-	nv_wr32(dev, 0x00221c, 0x00000000);</div><div class='del'>-	/* something with 0x2084, read/modify/write, no change */</div><div class='ctx'> 	nv_wr32(dev, 0x002040, 0x000000ff);</div><div class='del'>-	nv_wr32(dev, 0x002500, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x003200, 0x00000000);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, NV04_PFIFO_DMA_TIMESLICE, 0x2101ffff);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-nv40_fifo_init_ramxx(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	nv_wr32(dev, 0x002044, 0x2101ffff);</div><div class='add'>+	nv_wr32(dev, 0x002058, 0x00000001);</div><div class='ctx'> </div><div class='ctx'> 	nv_wr32(dev, NV03_PFIFO_RAMHT, (0x03 &lt;&lt; 24) /* search 128 */ |</div><div class='ctx'> 				       ((dev_priv-&gt;ramht-&gt;bits - 9) &lt;&lt; 16) |</div><div class='hunk'>@@ -244,64 +152,59 @@ nv40_fifo_init_ramxx(struct drm_device *dev)</div><div class='ctx'> 	case 0x47:</div><div class='ctx'> 	case 0x49:</div><div class='ctx'> 	case 0x4b:</div><div class='del'>-		nv_wr32(dev, 0x2230, 1);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (dev_priv-&gt;chipset) {</div><div class='add'>+		nv_wr32(dev, 0x002230, 0x00000001);</div><div class='ctx'> 	case 0x40:</div><div class='ctx'> 	case 0x41:</div><div class='ctx'> 	case 0x42:</div><div class='ctx'> 	case 0x43:</div><div class='ctx'> 	case 0x45:</div><div class='del'>-	case 0x47:</div><div class='ctx'> 	case 0x48:</div><div class='del'>-	case 0x49:</div><div class='del'>-	case 0x4b:</div><div class='del'>-		nv_wr32(dev, NV40_PFIFO_RAMFC, 0x30002);</div><div class='add'>+		nv_wr32(dev, 0x002220, 0x00030002);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		nv_wr32(dev, 0x2230, 0);</div><div class='del'>-		nv_wr32(dev, NV40_PFIFO_RAMFC,</div><div class='del'>-			((dev_priv-&gt;vram_size - 512 * 1024 +</div><div class='del'>-			  dev_priv-&gt;ramfc-&gt;pinst) &gt;&gt; 16) | (3 &lt;&lt; 16));</div><div class='add'>+		nv_wr32(dev, 0x002230, 0x00000000);</div><div class='add'>+		nv_wr32(dev, 0x002220, ((dev_priv-&gt;vram_size - 512 * 1024 +</div><div class='add'>+					 dev_priv-&gt;ramfc-&gt;pinst) &gt;&gt; 16) |</div><div class='add'>+				       0x00030000);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nv40_fifo_init_intr(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	nouveau_irq_register(dev, 8, nv04_fifo_isr);</div><div class='del'>-	nv_wr32(dev, 0x002100, 0xffffffff);</div><div class='del'>-	nv_wr32(dev, 0x002140, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, priv-&gt;base.channels);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_INTR_0, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_INTR_EN_0, 0xffffffff);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 1);</div><div class='add'>+	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);</div><div class='add'>+	nv_wr32(dev, NV03_PFIFO_CACHES, 1);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;base.channels; i++) {</div><div class='add'>+		if (dev_priv-&gt;channels.ptr[i])</div><div class='add'>+			nv_mask(dev, NV04_PFIFO_MODE, (1 &lt;&lt; i), (1 &lt;&lt; i));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='del'>-nv40_fifo_init(struct drm_device *dev)</div><div class='add'>+nv40_fifo_create(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	nv40_fifo_init_reset(dev);</div><div class='del'>-	nv40_fifo_init_ramxx(dev);</div><div class='add'>+	struct nv40_fifo_priv *priv;</div><div class='ctx'> </div><div class='del'>-	nv40_fifo_do_load_context(dev, pfifo-&gt;channels - 1);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo-&gt;channels - 1);</div><div class='del'>-</div><div class='del'>-	nv40_fifo_init_intr(dev);</div><div class='del'>-	pfifo-&gt;enable(dev);</div><div class='del'>-	pfifo-&gt;reassign(dev, true);</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; dev_priv-&gt;engine.fifo.channels; i++) {</div><div class='del'>-		if (dev_priv-&gt;channels.ptr[i]) {</div><div class='del'>-			uint32_t mode = nv_rd32(dev, NV04_PFIFO_MODE);</div><div class='del'>-			nv_wr32(dev, NV04_PFIFO_MODE, mode | (1 &lt;&lt; i));</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	priv-&gt;base.base.destroy = nv04_fifo_destroy;</div><div class='add'>+	priv-&gt;base.base.init = nv40_fifo_init;</div><div class='add'>+	priv-&gt;base.base.fini = nv04_fifo_fini;</div><div class='add'>+	priv-&gt;base.base.context_new = nv40_fifo_context_new;</div><div class='add'>+	priv-&gt;base.base.context_del = nv04_fifo_context_del;</div><div class='add'>+	priv-&gt;base.channels = 31;</div><div class='add'>+	priv-&gt;ramfc_desc = nv40_ramfc;</div><div class='add'>+	dev_priv-&gt;eng[NVOBJ_ENGINE_FIFO] = &amp;priv-&gt;base.base;</div><div class='ctx'> </div><div class='add'>+	nouveau_irq_register(dev, 8, nv04_fifo_isr);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c<br/>index ba14a93d8afa..aa9e2df64a26 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv40_graph.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv40_graph.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv40_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv40_graph.c</a></div><div class='hunk'>@@ -27,7 +27,7 @@</div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "drm.h"</div><div class='ctx'> #include "nouveau_drv.h"</div><div class='del'>-#include "nouveau_grctx.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> #include "nouveau_ramht.h"</div><div class='ctx'> </div><div class='ctx'> struct nv40_graph_engine {</div><div class='hunk'>@@ -42,7 +42,6 @@ nv40_graph_context_new(struct nouveau_channel *chan, int engine)</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_gpuobj *grctx = NULL;</div><div class='del'>-	struct nouveau_grctx ctx = {};</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -52,11 +51,7 @@ nv40_graph_context_new(struct nouveau_channel *chan, int engine)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialise default context values */</div><div class='del'>-	ctx.dev = chan-&gt;dev;</div><div class='del'>-	ctx.mode = NOUVEAU_GRCTX_VALS;</div><div class='del'>-	ctx.data = grctx;</div><div class='del'>-	nv40_grctx_init(&amp;ctx);</div><div class='del'>-</div><div class='add'>+	nv40_grctx_fill(dev, grctx);</div><div class='ctx'> 	nv_wo32(grctx, 0, grctx-&gt;vinst);</div><div class='ctx'> </div><div class='ctx'> 	/* init grctx pointer in ramfc, and on PFIFO if channel is</div><div class='hunk'>@@ -184,8 +179,7 @@ nv40_graph_init(struct drm_device *dev, int engine)</div><div class='ctx'> 	struct nv40_graph_engine *pgraph = nv_engine(dev, engine);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_fb_engine *pfb = &amp;dev_priv-&gt;engine.fb;</div><div class='del'>-	struct nouveau_grctx ctx = {};</div><div class='del'>-	uint32_t vramsz, *cp;</div><div class='add'>+	uint32_t vramsz;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='ctx'> 	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) &amp;</div><div class='hunk'>@@ -193,22 +187,8 @@ nv40_graph_init(struct drm_device *dev, int engine)</div><div class='ctx'> 	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) |</div><div class='ctx'> 			 NV_PMC_ENABLE_PGRAPH);</div><div class='ctx'> </div><div class='del'>-	cp = kmalloc(sizeof(*cp) * 256, GFP_KERNEL);</div><div class='del'>-	if (!cp)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ctx.dev = dev;</div><div class='del'>-	ctx.mode = NOUVEAU_GRCTX_PROG;</div><div class='del'>-	ctx.data = cp;</div><div class='del'>-	ctx.ctxprog_max = 256;</div><div class='del'>-	nv40_grctx_init(&amp;ctx);</div><div class='del'>-	pgraph-&gt;grctx_size = ctx.ctxvals_pos * 4;</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);</div><div class='del'>-	for (i = 0; i &lt; ctx.ctxprog_len; i++)</div><div class='del'>-		nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, cp[i]);</div><div class='del'>-</div><div class='del'>-	kfree(cp);</div><div class='add'>+	/* generate and upload context program */</div><div class='add'>+	nv40_grctx_init(dev, &amp;pgraph-&gt;grctx_size);</div><div class='ctx'> </div><div class='ctx'> 	/* No context present currently */</div><div class='ctx'> 	nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0x00000000);</div><div class='hunk'>@@ -366,13 +346,14 @@ nv40_graph_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='ctx'> static int</div><div class='ctx'> nv40_graph_isr_chid(struct drm_device *dev, u32 inst)</div><div class='ctx'> {</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_gpuobj *grctx;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;channels.lock, flags);</div><div class='del'>-	for (i = 0; i &lt; dev_priv-&gt;engine.fifo.channels; i++) {</div><div class='add'>+	for (i = 0; i &lt; pfifo-&gt;channels; i++) {</div><div class='ctx'> 		if (!dev_priv-&gt;channels.ptr[i])</div><div class='ctx'> 			continue;</div><div class='ctx'> 		grctx = dev_priv-&gt;channels.ptr[i]-&gt;engctx[NVOBJ_ENGINE_GR];</div><div class='hunk'>@@ -460,7 +441,6 @@ nv40_graph_create(struct drm_device *dev)</div><div class='ctx'> 	NVOBJ_ENGINE_ADD(dev, GR, &amp;pgraph-&gt;base);</div><div class='ctx'> 	nouveau_irq_register(dev, 12, nv40_graph_isr);</div><div class='ctx'> </div><div class='del'>-	NVOBJ_CLASS(dev, 0x506e, SW); /* nvsw */</div><div class='ctx'> 	NVOBJ_CLASS(dev, 0x0030, GR); /* null */</div><div class='ctx'> 	NVOBJ_CLASS(dev, 0x0039, GR); /* m2mf */</div><div class='ctx'> 	NVOBJ_CLASS(dev, 0x004a, GR); /* gdirect */</div><div class='hunk'>@@ -483,8 +463,5 @@ nv40_graph_create(struct drm_device *dev)</div><div class='ctx'> 	else</div><div class='ctx'> 		NVOBJ_CLASS(dev, 0x4097, GR);</div><div class='ctx'> </div><div class='del'>-	/* nvsw */</div><div class='del'>-	NVOBJ_CLASS(dev, 0x506e, SW);</div><div class='del'>-	NVOBJ_MTHD (dev, 0x506e, 0x0500, nv04_graph_mthd_page_flip);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv40_grctx.c b/drivers/gpu/drm/nouveau/nv40_grctx.c<br/>index f70447d131d7..be0a74750fb1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv40_grctx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv40_grctx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv40_grctx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv40_grctx.c</a></div><div class='hunk'>@@ -595,8 +595,8 @@ nv40_graph_construct_shader(struct nouveau_grctx *ctx)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void</div><div class='del'>-nv40_grctx_init(struct nouveau_grctx *ctx)</div><div class='add'>+static void</div><div class='add'>+nv40_grctx_generate(struct nouveau_grctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	/* decide whether we're loading/unloading the context */</div><div class='ctx'> 	cp_bra (ctx, AUTO_SAVE, PENDING, cp_setup_save);</div><div class='hunk'>@@ -660,3 +660,31 @@ nv40_grctx_init(struct nouveau_grctx *ctx)</div><div class='ctx'> 	cp_out (ctx, CP_END);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void</div><div class='add'>+nv40_grctx_fill(struct drm_device *dev, struct nouveau_gpuobj *mem)</div><div class='add'>+{</div><div class='add'>+	nv40_grctx_generate(&amp;(struct nouveau_grctx) {</div><div class='add'>+			     .dev = dev,</div><div class='add'>+			     .mode = NOUVEAU_GRCTX_VALS,</div><div class='add'>+			     .data = mem,</div><div class='add'>+			   });</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+nv40_grctx_init(struct drm_device *dev, u32 *size)</div><div class='add'>+{</div><div class='add'>+	u32 ctxprog[256], i;</div><div class='add'>+	struct nouveau_grctx ctx = {</div><div class='add'>+		.dev = dev,</div><div class='add'>+		.mode = NOUVEAU_GRCTX_PROG,</div><div class='add'>+		.data = ctxprog,</div><div class='add'>+		.ctxprog_max = ARRAY_SIZE(ctxprog)</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	nv40_grctx_generate(&amp;ctx);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);</div><div class='add'>+	for (i = 0; i &lt; ctx.ctxprog_len; i++)</div><div class='add'>+		nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, ctxprog[i]);</div><div class='add'>+	*size = ctx.ctxvals_pos * 4;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv40_pm.c b/drivers/gpu/drm/nouveau/nv40_pm.c<br/>index c7615381c5d9..e66273aff493 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv40_pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv40_pm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv40_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv40_pm.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include "nouveau_bios.h"</div><div class='ctx'> #include "nouveau_pm.h"</div><div class='ctx'> #include "nouveau_hw.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> </div><div class='ctx'> #define min2(a,b) ((a) &lt; (b) ? (a) : (b))</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c<br/>index 701b927998bf..97a477b3d52d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_crtc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_crtc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_crtc.c</a></div><div class='hunk'>@@ -79,15 +79,15 @@ nv50_crtc_blank(struct nouveau_crtc *nv_crtc, bool blanked)</div><div class='ctx'> 			NV_ERROR(dev, "no space while blanking crtc\n");</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='del'>-		BEGIN_RING(evo, 0, NV50_EVO_CRTC(index, CLUT_MODE), 2);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV50_EVO_CRTC(index, CLUT_MODE), 2);</div><div class='ctx'> 		OUT_RING(evo, NV50_EVO_CRTC_CLUT_MODE_BLANK);</div><div class='ctx'> 		OUT_RING(evo, 0);</div><div class='ctx'> 		if (dev_priv-&gt;chipset != 0x50) {</div><div class='del'>-			BEGIN_RING(evo, 0, NV84_EVO_CRTC(index, CLUT_DMA), 1);</div><div class='add'>+			BEGIN_NV04(evo, 0, NV84_EVO_CRTC(index, CLUT_DMA), 1);</div><div class='ctx'> 			OUT_RING(evo, NV84_EVO_CRTC_CLUT_DMA_HANDLE_NONE);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		BEGIN_RING(evo, 0, NV50_EVO_CRTC(index, FB_DMA), 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV50_EVO_CRTC(index, FB_DMA), 1);</div><div class='ctx'> 		OUT_RING(evo, NV50_EVO_CRTC_FB_DMA_HANDLE_NONE);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (nv_crtc-&gt;cursor.visible)</div><div class='hunk'>@@ -100,20 +100,20 @@ nv50_crtc_blank(struct nouveau_crtc *nv_crtc, bool blanked)</div><div class='ctx'> 			NV_ERROR(dev, "no space while unblanking crtc\n");</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='del'>-		BEGIN_RING(evo, 0, NV50_EVO_CRTC(index, CLUT_MODE), 2);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV50_EVO_CRTC(index, CLUT_MODE), 2);</div><div class='ctx'> 		OUT_RING(evo, nv_crtc-&gt;lut.depth == 8 ?</div><div class='ctx'> 				NV50_EVO_CRTC_CLUT_MODE_OFF :</div><div class='ctx'> 				NV50_EVO_CRTC_CLUT_MODE_ON);</div><div class='ctx'> 		OUT_RING(evo, nv_crtc-&gt;lut.nvbo-&gt;bo.offset &gt;&gt; 8);</div><div class='ctx'> 		if (dev_priv-&gt;chipset != 0x50) {</div><div class='del'>-			BEGIN_RING(evo, 0, NV84_EVO_CRTC(index, CLUT_DMA), 1);</div><div class='add'>+			BEGIN_NV04(evo, 0, NV84_EVO_CRTC(index, CLUT_DMA), 1);</div><div class='ctx'> 			OUT_RING(evo, NvEvoVRAM);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		BEGIN_RING(evo, 0, NV50_EVO_CRTC(index, FB_OFFSET), 2);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV50_EVO_CRTC(index, FB_OFFSET), 2);</div><div class='ctx'> 		OUT_RING(evo, nv_crtc-&gt;fb.offset &gt;&gt; 8);</div><div class='ctx'> 		OUT_RING(evo, 0);</div><div class='del'>-		BEGIN_RING(evo, 0, NV50_EVO_CRTC(index, FB_DMA), 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV50_EVO_CRTC(index, FB_DMA), 1);</div><div class='ctx'> 		if (dev_priv-&gt;chipset != 0x50)</div><div class='ctx'> 			if (nv_crtc-&gt;fb.tile_flags == 0x7a00 ||</div><div class='ctx'> 			    nv_crtc-&gt;fb.tile_flags == 0xfe00)</div><div class='hunk'>@@ -158,10 +158,10 @@ nv50_crtc_set_dither(struct nouveau_crtc *nv_crtc, bool update)</div><div class='ctx'> </div><div class='ctx'> 	ret = RING_SPACE(evo, 2 + (update ? 2 : 0));</div><div class='ctx'> 	if (ret == 0) {</div><div class='del'>-		BEGIN_RING(evo, 0, NV50_EVO_CRTC(head, DITHER_CTRL), 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV50_EVO_CRTC(head, DITHER_CTRL), 1);</div><div class='ctx'> 		OUT_RING  (evo, mode);</div><div class='ctx'> 		if (update) {</div><div class='del'>-			BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='add'>+			BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='ctx'> 			OUT_RING  (evo, 0);</div><div class='ctx'> 			FIRE_RING (evo);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -193,11 +193,11 @@ nv50_crtc_set_color_vibrance(struct nouveau_crtc *nv_crtc, bool update)</div><div class='ctx'> </div><div class='ctx'> 	hue = ((nv_crtc-&gt;vibrant_hue * 2047) / 100) &amp; 0xfff;</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, COLOR_CTRL), 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, COLOR_CTRL), 1);</div><div class='ctx'> 	OUT_RING  (evo, (hue &lt;&lt; 20) | (vib &lt;&lt; 8));</div><div class='ctx'> </div><div class='ctx'> 	if (update) {</div><div class='del'>-		BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='ctx'> 		OUT_RING  (evo, 0);</div><div class='ctx'> 		FIRE_RING (evo);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -311,9 +311,9 @@ nv50_crtc_set_scale(struct nouveau_crtc *nv_crtc, bool update)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, SCALE_CTRL), 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, SCALE_CTRL), 1);</div><div class='ctx'> 	OUT_RING  (evo, ctrl);</div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, SCALE_RES1), 2);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, SCALE_RES1), 2);</div><div class='ctx'> 	OUT_RING  (evo, oY &lt;&lt; 16 | oX);</div><div class='ctx'> 	OUT_RING  (evo, oY &lt;&lt; 16 | oX);</div><div class='ctx'> </div><div class='hunk'>@@ -383,23 +383,15 @@ nv50_crtc_set_clock(struct drm_device *dev, int head, int pclk)</div><div class='ctx'> static void</div><div class='ctx'> nv50_crtc_destroy(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev;</div><div class='del'>-	struct nouveau_crtc *nv_crtc;</div><div class='del'>-</div><div class='del'>-	if (!crtc)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	dev = crtc-&gt;dev;</div><div class='del'>-	nv_crtc = nouveau_crtc(crtc);</div><div class='del'>-</div><div class='del'>-	NV_DEBUG_KMS(dev, "\n");</div><div class='add'>+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);</div><div class='ctx'> </div><div class='del'>-	drm_crtc_cleanup(&amp;nv_crtc-&gt;base);</div><div class='add'>+	NV_DEBUG_KMS(crtc-&gt;dev, "\n");</div><div class='ctx'> </div><div class='ctx'> 	nouveau_bo_unmap(nv_crtc-&gt;lut.nvbo);</div><div class='ctx'> 	nouveau_bo_ref(NULL, &amp;nv_crtc-&gt;lut.nvbo);</div><div class='ctx'> 	nouveau_bo_unmap(nv_crtc-&gt;cursor.nvbo);</div><div class='ctx'> 	nouveau_bo_ref(NULL, &amp;nv_crtc-&gt;cursor.nvbo);</div><div class='add'>+	drm_crtc_cleanup(&amp;nv_crtc-&gt;base);</div><div class='ctx'> 	kfree(nv_crtc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -593,7 +585,7 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, FB_DMA), 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, FB_DMA), 1);</div><div class='ctx'> 		OUT_RING  (evo, fb-&gt;r_dma);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -601,18 +593,18 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, FB_OFFSET), 5);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, FB_OFFSET), 5);</div><div class='ctx'> 	OUT_RING  (evo, nv_crtc-&gt;fb.offset &gt;&gt; 8);</div><div class='ctx'> 	OUT_RING  (evo, 0);</div><div class='ctx'> 	OUT_RING  (evo, (drm_fb-&gt;height &lt;&lt; 16) | drm_fb-&gt;width);</div><div class='ctx'> 	OUT_RING  (evo, fb-&gt;r_pitch);</div><div class='ctx'> 	OUT_RING  (evo, fb-&gt;r_format);</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, CLUT_MODE), 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, CLUT_MODE), 1);</div><div class='ctx'> 	OUT_RING  (evo, fb-&gt;base.depth == 8 ?</div><div class='ctx'> 		   NV50_EVO_CRTC_CLUT_MODE_OFF : NV50_EVO_CRTC_CLUT_MODE_ON);</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, FB_POS), 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, FB_POS), 1);</div><div class='ctx'> 	OUT_RING  (evo, (y &lt;&lt; 16) | x);</div><div class='ctx'> </div><div class='ctx'> 	if (nv_crtc-&gt;lut.depth != fb-&gt;base.depth) {</div><div class='hunk'>@@ -672,23 +664,23 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,</div><div class='ctx'> </div><div class='ctx'> 	ret = RING_SPACE(evo, 18);</div><div class='ctx'> 	if (ret == 0) {</div><div class='del'>-		BEGIN_RING(evo, 0, 0x0804 + head, 2);</div><div class='add'>+		BEGIN_NV04(evo, 0, 0x0804 + head, 2);</div><div class='ctx'> 		OUT_RING  (evo, 0x00800000 | mode-&gt;clock);</div><div class='ctx'> 		OUT_RING  (evo, (ilace == 2) ? 2 : 0);</div><div class='del'>-		BEGIN_RING(evo, 0, 0x0810 + head, 6);</div><div class='add'>+		BEGIN_NV04(evo, 0, 0x0810 + head, 6);</div><div class='ctx'> 		OUT_RING  (evo, 0x00000000); /* border colour */</div><div class='ctx'> 		OUT_RING  (evo, (vactive &lt;&lt; 16) | hactive);</div><div class='ctx'> 		OUT_RING  (evo, ( vsynce &lt;&lt; 16) | hsynce);</div><div class='ctx'> 		OUT_RING  (evo, (vblanke &lt;&lt; 16) | hblanke);</div><div class='ctx'> 		OUT_RING  (evo, (vblanks &lt;&lt; 16) | hblanks);</div><div class='ctx'> 		OUT_RING  (evo, (vblan2e &lt;&lt; 16) | vblan2s);</div><div class='del'>-		BEGIN_RING(evo, 0, 0x082c + head, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, 0x082c + head, 1);</div><div class='ctx'> 		OUT_RING  (evo, 0x00000000);</div><div class='del'>-		BEGIN_RING(evo, 0, 0x0900 + head, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, 0x0900 + head, 1);</div><div class='ctx'> 		OUT_RING  (evo, 0x00000311); /* makes sync channel work */</div><div class='del'>-		BEGIN_RING(evo, 0, 0x08c8 + head, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, 0x08c8 + head, 1);</div><div class='ctx'> 		OUT_RING  (evo, (umode-&gt;vdisplay &lt;&lt; 16) | umode-&gt;hdisplay);</div><div class='del'>-		BEGIN_RING(evo, 0, 0x08d4 + head, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, 0x08d4 + head, 1);</div><div class='ctx'> 		OUT_RING  (evo, 0x00000000); /* screen position */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -755,21 +747,25 @@ nv50_crtc_create(struct drm_device *dev, int index)</div><div class='ctx'> 	if (!nv_crtc)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	nv_crtc-&gt;index = index;</div><div class='add'>+	nv_crtc-&gt;set_dither = nv50_crtc_set_dither;</div><div class='add'>+	nv_crtc-&gt;set_scale = nv50_crtc_set_scale;</div><div class='add'>+	nv_crtc-&gt;set_color_vibrance = nv50_crtc_set_color_vibrance;</div><div class='ctx'> 	nv_crtc-&gt;color_vibrance = 50;</div><div class='ctx'> 	nv_crtc-&gt;vibrant_hue = 0;</div><div class='del'>-</div><div class='del'>-	/* Default CLUT parameters, will be activated on the hw upon</div><div class='del'>-	 * first mode set.</div><div class='del'>-	 */</div><div class='add'>+	nv_crtc-&gt;lut.depth = 0;</div><div class='ctx'> 	for (i = 0; i &lt; 256; i++) {</div><div class='ctx'> 		nv_crtc-&gt;lut.r[i] = i &lt;&lt; 8;</div><div class='ctx'> 		nv_crtc-&gt;lut.g[i] = i &lt;&lt; 8;</div><div class='ctx'> 		nv_crtc-&gt;lut.b[i] = i &lt;&lt; 8;</div><div class='ctx'> 	}</div><div class='del'>-	nv_crtc-&gt;lut.depth = 0;</div><div class='add'>+</div><div class='add'>+	drm_crtc_init(dev, &amp;nv_crtc-&gt;base, &amp;nv50_crtc_funcs);</div><div class='add'>+	drm_crtc_helper_add(&amp;nv_crtc-&gt;base, &amp;nv50_crtc_helper_funcs);</div><div class='add'>+	drm_mode_crtc_set_gamma_size(&amp;nv_crtc-&gt;base, 256);</div><div class='ctx'> </div><div class='ctx'> 	ret = nouveau_bo_new(dev, 4096, 0x100, TTM_PL_FLAG_VRAM,</div><div class='del'>-			     0, 0x0000, &amp;nv_crtc-&gt;lut.nvbo);</div><div class='add'>+			     0, 0x0000, NULL, &amp;nv_crtc-&gt;lut.nvbo);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		ret = nouveau_bo_pin(nv_crtc-&gt;lut.nvbo, TTM_PL_FLAG_VRAM);</div><div class='ctx'> 		if (!ret)</div><div class='hunk'>@@ -778,24 +774,12 @@ nv50_crtc_create(struct drm_device *dev, int index)</div><div class='ctx'> 			nouveau_bo_ref(NULL, &amp;nv_crtc-&gt;lut.nvbo);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ret) {</div><div class='del'>-		kfree(nv_crtc);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	nv_crtc-&gt;index = index;</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	/* set function pointers */</div><div class='del'>-	nv_crtc-&gt;set_dither = nv50_crtc_set_dither;</div><div class='del'>-	nv_crtc-&gt;set_scale = nv50_crtc_set_scale;</div><div class='del'>-	nv_crtc-&gt;set_color_vibrance = nv50_crtc_set_color_vibrance;</div><div class='del'>-</div><div class='del'>-	drm_crtc_init(dev, &amp;nv_crtc-&gt;base, &amp;nv50_crtc_funcs);</div><div class='del'>-	drm_crtc_helper_add(&amp;nv_crtc-&gt;base, &amp;nv50_crtc_helper_funcs);</div><div class='del'>-	drm_mode_crtc_set_gamma_size(&amp;nv_crtc-&gt;base, 256);</div><div class='ctx'> </div><div class='ctx'> 	ret = nouveau_bo_new(dev, 64*64*4, 0x100, TTM_PL_FLAG_VRAM,</div><div class='del'>-			     0, 0x0000, &amp;nv_crtc-&gt;cursor.nvbo);</div><div class='add'>+			     0, 0x0000, NULL, &amp;nv_crtc-&gt;cursor.nvbo);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		ret = nouveau_bo_pin(nv_crtc-&gt;cursor.nvbo, TTM_PL_FLAG_VRAM);</div><div class='ctx'> 		if (!ret)</div><div class='hunk'>@@ -804,6 +788,12 @@ nv50_crtc_create(struct drm_device *dev, int index)</div><div class='ctx'> 			nouveau_bo_ref(NULL, &amp;nv_crtc-&gt;cursor.nvbo);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	nv50_cursor_init(nv_crtc);</div><div class='del'>-	return 0;</div><div class='add'>+out:</div><div class='add'>+	if (ret)</div><div class='add'>+		nv50_crtc_destroy(&amp;nv_crtc-&gt;base);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_cursor.c b/drivers/gpu/drm/nouveau/nv50_cursor.c<br/>index adfc9b607a50..af4ec7bf3670 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_cursor.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_cursor.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_cursor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_cursor.c</a></div><div class='hunk'>@@ -53,15 +53,15 @@ nv50_cursor_show(struct nouveau_crtc *nv_crtc, bool update)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (dev_priv-&gt;chipset != 0x50) {</div><div class='del'>-		BEGIN_RING(evo, 0, NV84_EVO_CRTC(nv_crtc-&gt;index, CURSOR_DMA), 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV84_EVO_CRTC(nv_crtc-&gt;index, CURSOR_DMA), 1);</div><div class='ctx'> 		OUT_RING(evo, NvEvoVRAM);</div><div class='ctx'> 	}</div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, CURSOR_CTRL), 2);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, CURSOR_CTRL), 2);</div><div class='ctx'> 	OUT_RING(evo, NV50_EVO_CRTC_CURSOR_CTRL_SHOW);</div><div class='ctx'> 	OUT_RING(evo, nv_crtc-&gt;cursor.offset &gt;&gt; 8);</div><div class='ctx'> </div><div class='ctx'> 	if (update) {</div><div class='del'>-		BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='ctx'> 		OUT_RING(evo, 0);</div><div class='ctx'> 		FIRE_RING(evo);</div><div class='ctx'> 		nv_crtc-&gt;cursor.visible = true;</div><div class='hunk'>@@ -86,16 +86,16 @@ nv50_cursor_hide(struct nouveau_crtc *nv_crtc, bool update)</div><div class='ctx'> 		NV_ERROR(dev, "no space while hiding cursor\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, CURSOR_CTRL), 2);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc-&gt;index, CURSOR_CTRL), 2);</div><div class='ctx'> 	OUT_RING(evo, NV50_EVO_CRTC_CURSOR_CTRL_HIDE);</div><div class='ctx'> 	OUT_RING(evo, 0);</div><div class='ctx'> 	if (dev_priv-&gt;chipset != 0x50) {</div><div class='del'>-		BEGIN_RING(evo, 0, NV84_EVO_CRTC(nv_crtc-&gt;index, CURSOR_DMA), 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV84_EVO_CRTC(nv_crtc-&gt;index, CURSOR_DMA), 1);</div><div class='ctx'> 		OUT_RING(evo, NV84_EVO_CRTC_CURSOR_DMA_HANDLE_NONE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (update) {</div><div class='del'>-		BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='ctx'> 		OUT_RING(evo, 0);</div><div class='ctx'> 		FIRE_RING(evo);</div><div class='ctx'> 		nv_crtc-&gt;cursor.visible = false;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_dac.c b/drivers/gpu/drm/nouveau/nv50_dac.c<br/>index 55c56330be6d..eb216a446b89 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_dac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_dac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_dac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_dac.c</a></div><div class='hunk'>@@ -55,9 +55,9 @@ nv50_dac_disconnect(struct drm_encoder *encoder)</div><div class='ctx'> 		NV_ERROR(dev, "no space while disconnecting DAC\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_DAC(nv_encoder-&gt;or, MODE_CTRL), 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_DAC(nv_encoder-&gt;or, MODE_CTRL), 1);</div><div class='ctx'> 	OUT_RING  (evo, 0);</div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='ctx'> 	OUT_RING  (evo, 0);</div><div class='ctx'> </div><div class='ctx'> 	nv_encoder-&gt;crtc = NULL;</div><div class='hunk'>@@ -240,7 +240,7 @@ nv50_dac_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,</div><div class='ctx'> 		NV_ERROR(dev, "no space while connecting DAC\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_DAC(nv_encoder-&gt;or, MODE_CTRL), 2);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_DAC(nv_encoder-&gt;or, MODE_CTRL), 2);</div><div class='ctx'> 	OUT_RING(evo, mode_ctl);</div><div class='ctx'> 	OUT_RING(evo, mode_ctl2);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c<br/>index 8b78b9cfa383..5c41612723b4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_display.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_display.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> #include "nouveau_fb.h"</div><div class='ctx'> #include "nouveau_fbcon.h"</div><div class='ctx'> #include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_software.h"</div><div class='ctx'> #include "drm_crtc_helper.h"</div><div class='ctx'> </div><div class='ctx'> static void nv50_display_isr(struct drm_device *);</div><div class='hunk'>@@ -140,11 +141,11 @@ nv50_display_sync(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	ret = RING_SPACE(evo, 6);</div><div class='ctx'> 	if (ret == 0) {</div><div class='del'>-		BEGIN_RING(evo, 0, 0x0084, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, 0x0084, 1);</div><div class='ctx'> 		OUT_RING  (evo, 0x80000000);</div><div class='del'>-		BEGIN_RING(evo, 0, 0x0080, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, 0x0080, 1);</div><div class='ctx'> 		OUT_RING  (evo, 0);</div><div class='del'>-		BEGIN_RING(evo, 0, 0x0084, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, 0x0084, 1);</div><div class='ctx'> 		OUT_RING  (evo, 0x00000000);</div><div class='ctx'> </div><div class='ctx'> 		nv_wo32(disp-&gt;ntfy, 0x000, 0x00000000);</div><div class='hunk'>@@ -267,7 +268,7 @@ nv50_display_init(struct drm_device *dev)</div><div class='ctx'> 	ret = RING_SPACE(evo, 3);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_UNK84, 2);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_UNK84, 2);</div><div class='ctx'> 	OUT_RING  (evo, NV50_EVO_UNK84_NOTIFY_DISABLED);</div><div class='ctx'> 	OUT_RING  (evo, NvEvoSync);</div><div class='ctx'> </div><div class='hunk'>@@ -292,7 +293,7 @@ nv50_display_fini(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	ret = RING_SPACE(evo, 2);</div><div class='ctx'> 	if (ret == 0) {</div><div class='del'>-		BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='ctx'> 		OUT_RING(evo, 0);</div><div class='ctx'> 	}</div><div class='ctx'> 	FIRE_RING(evo);</div><div class='hunk'>@@ -358,8 +359,11 @@ nv50_display_create(struct drm_device *dev)</div><div class='ctx'> 	dev_priv-&gt;engine.display.priv = priv;</div><div class='ctx'> </div><div class='ctx'> 	/* Create CRTC objects */</div><div class='del'>-	for (i = 0; i &lt; 2; i++)</div><div class='del'>-		nv50_crtc_create(dev, i);</div><div class='add'>+	for (i = 0; i &lt; 2; i++) {</div><div class='add'>+		ret = nv50_crtc_create(dev, i);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* We setup the encoders from the BIOS table */</div><div class='ctx'> 	for (i = 0 ; i &lt; dcb-&gt;entries; i++) {</div><div class='hunk'>@@ -438,13 +442,13 @@ nv50_display_flip_stop(struct drm_crtc *crtc)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(evo, 0, 0x0084, 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, 0x0084, 1);</div><div class='ctx'> 	OUT_RING  (evo, 0x00000000);</div><div class='del'>-	BEGIN_RING(evo, 0, 0x0094, 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, 0x0094, 1);</div><div class='ctx'> 	OUT_RING  (evo, 0x00000000);</div><div class='del'>-	BEGIN_RING(evo, 0, 0x00c0, 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, 0x00c0, 1);</div><div class='ctx'> 	OUT_RING  (evo, 0x00000000);</div><div class='del'>-	BEGIN_RING(evo, 0, 0x0080, 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, 0x0080, 1);</div><div class='ctx'> 	OUT_RING  (evo, 0x00000000);</div><div class='ctx'> 	FIRE_RING (evo);</div><div class='ctx'> }</div><div class='hunk'>@@ -474,28 +478,28 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (dev_priv-&gt;chipset &lt; 0xc0) {</div><div class='del'>-			BEGIN_RING(chan, 0, 0x0060, 2);</div><div class='add'>+			BEGIN_NV04(chan, 0, 0x0060, 2);</div><div class='ctx'> 			OUT_RING  (chan, NvEvoSema0 + nv_crtc-&gt;index);</div><div class='ctx'> 			OUT_RING  (chan, dispc-&gt;sem.offset);</div><div class='del'>-			BEGIN_RING(chan, 0, 0x006c, 1);</div><div class='add'>+			BEGIN_NV04(chan, 0, 0x006c, 1);</div><div class='ctx'> 			OUT_RING  (chan, 0xf00d0000 | dispc-&gt;sem.value);</div><div class='del'>-			BEGIN_RING(chan, 0, 0x0064, 2);</div><div class='add'>+			BEGIN_NV04(chan, 0, 0x0064, 2);</div><div class='ctx'> 			OUT_RING  (chan, dispc-&gt;sem.offset ^ 0x10);</div><div class='ctx'> 			OUT_RING  (chan, 0x74b1e000);</div><div class='del'>-			BEGIN_RING(chan, 0, 0x0060, 1);</div><div class='add'>+			BEGIN_NV04(chan, 0, 0x0060, 1);</div><div class='ctx'> 			if (dev_priv-&gt;chipset &lt; 0x84)</div><div class='ctx'> 				OUT_RING  (chan, NvSema);</div><div class='ctx'> 			else</div><div class='ctx'> 				OUT_RING  (chan, chan-&gt;vram_handle);</div><div class='ctx'> 		} else {</div><div class='del'>-			u64 offset = chan-&gt;dispc_vma[nv_crtc-&gt;index].offset;</div><div class='add'>+			u64 offset = nvc0_software_crtc(chan, nv_crtc-&gt;index);</div><div class='ctx'> 			offset += dispc-&gt;sem.offset;</div><div class='del'>-			BEGIN_NVC0(chan, 2, 0, 0x0010, 4);</div><div class='add'>+			BEGIN_NVC0(chan, 0, 0x0010, 4);</div><div class='ctx'> 			OUT_RING  (chan, upper_32_bits(offset));</div><div class='ctx'> 			OUT_RING  (chan, lower_32_bits(offset));</div><div class='ctx'> 			OUT_RING  (chan, 0xf00d0000 | dispc-&gt;sem.value);</div><div class='ctx'> 			OUT_RING  (chan, 0x1002);</div><div class='del'>-			BEGIN_NVC0(chan, 2, 0, 0x0010, 4);</div><div class='add'>+			BEGIN_NVC0(chan, 0, 0x0010, 4);</div><div class='ctx'> 			OUT_RING  (chan, upper_32_bits(offset));</div><div class='ctx'> 			OUT_RING  (chan, lower_32_bits(offset ^ 0x10));</div><div class='ctx'> 			OUT_RING  (chan, 0x74b1e000);</div><div class='hunk'>@@ -508,40 +512,40 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* queue the flip on the crtc's "display sync" channel */</div><div class='del'>-	BEGIN_RING(evo, 0, 0x0100, 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, 0x0100, 1);</div><div class='ctx'> 	OUT_RING  (evo, 0xfffe0000);</div><div class='ctx'> 	if (chan) {</div><div class='del'>-		BEGIN_RING(evo, 0, 0x0084, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, 0x0084, 1);</div><div class='ctx'> 		OUT_RING  (evo, 0x00000100);</div><div class='ctx'> 	} else {</div><div class='del'>-		BEGIN_RING(evo, 0, 0x0084, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, 0x0084, 1);</div><div class='ctx'> 		OUT_RING  (evo, 0x00000010);</div><div class='ctx'> 		/* allows gamma somehow, PDISP will bitch at you if</div><div class='ctx'> 		 * you don't wait for vblank before changing this..</div><div class='ctx'> 		 */</div><div class='del'>-		BEGIN_RING(evo, 0, 0x00e0, 1);</div><div class='add'>+		BEGIN_NV04(evo, 0, 0x00e0, 1);</div><div class='ctx'> 		OUT_RING  (evo, 0x40000000);</div><div class='ctx'> 	}</div><div class='del'>-	BEGIN_RING(evo, 0, 0x0088, 4);</div><div class='add'>+	BEGIN_NV04(evo, 0, 0x0088, 4);</div><div class='ctx'> 	OUT_RING  (evo, dispc-&gt;sem.offset);</div><div class='ctx'> 	OUT_RING  (evo, 0xf00d0000 | dispc-&gt;sem.value);</div><div class='ctx'> 	OUT_RING  (evo, 0x74b1e000);</div><div class='ctx'> 	OUT_RING  (evo, NvEvoSync);</div><div class='del'>-	BEGIN_RING(evo, 0, 0x00a0, 2);</div><div class='add'>+	BEGIN_NV04(evo, 0, 0x00a0, 2);</div><div class='ctx'> 	OUT_RING  (evo, 0x00000000);</div><div class='ctx'> 	OUT_RING  (evo, 0x00000000);</div><div class='del'>-	BEGIN_RING(evo, 0, 0x00c0, 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, 0x00c0, 1);</div><div class='ctx'> 	OUT_RING  (evo, nv_fb-&gt;r_dma);</div><div class='del'>-	BEGIN_RING(evo, 0, 0x0110, 2);</div><div class='add'>+	BEGIN_NV04(evo, 0, 0x0110, 2);</div><div class='ctx'> 	OUT_RING  (evo, 0x00000000);</div><div class='ctx'> 	OUT_RING  (evo, 0x00000000);</div><div class='del'>-	BEGIN_RING(evo, 0, 0x0800, 5);</div><div class='add'>+	BEGIN_NV04(evo, 0, 0x0800, 5);</div><div class='ctx'> 	OUT_RING  (evo, nv_fb-&gt;nvbo-&gt;bo.offset &gt;&gt; 8);</div><div class='ctx'> 	OUT_RING  (evo, 0);</div><div class='ctx'> 	OUT_RING  (evo, (fb-&gt;height &lt;&lt; 16) | fb-&gt;width);</div><div class='ctx'> 	OUT_RING  (evo, nv_fb-&gt;r_pitch);</div><div class='ctx'> 	OUT_RING  (evo, nv_fb-&gt;r_format);</div><div class='del'>-	BEGIN_RING(evo, 0, 0x0080, 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, 0x0080, 1);</div><div class='ctx'> 	OUT_RING  (evo, 0x00000000);</div><div class='ctx'> 	FIRE_RING (evo);</div><div class='ctx'> </div><div class='hunk'>@@ -642,20 +646,7 @@ nv50_display_script_select(struct drm_device *dev, struct dcb_entry *dcb,</div><div class='ctx'> static void</div><div class='ctx'> nv50_display_vblank_crtc_handler(struct drm_device *dev, int crtc)</div><div class='ctx'> {</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_channel *chan, *tmp;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(chan, tmp, &amp;dev_priv-&gt;vbl_waiting,</div><div class='del'>-				 nvsw.vbl_wait) {</div><div class='del'>-		if (chan-&gt;nvsw.vblsem_head != crtc)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		nouveau_bo_wr32(chan-&gt;notifier_bo, chan-&gt;nvsw.vblsem_offset,</div><div class='del'>-						chan-&gt;nvsw.vblsem_rval);</div><div class='del'>-		list_del(&amp;chan-&gt;nvsw.vbl_wait);</div><div class='del'>-		drm_vblank_put(dev, crtc);</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	nouveau_software_vblank(dev, crtc);</div><div class='ctx'> 	drm_handle_vblank(dev, crtc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_display.h b/drivers/gpu/drm/nouveau/nv50_display.h<br/>index 5d3dd14d2837..e9db9b97f041 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_display.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_display.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_display.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_display.h</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> #include "nouveau_dma.h"</div><div class='ctx'> #include "nouveau_reg.h"</div><div class='ctx'> #include "nouveau_crtc.h"</div><div class='add'>+#include "nouveau_software.h"</div><div class='ctx'> #include "nv50_evo.h"</div><div class='ctx'> </div><div class='ctx'> struct nv50_display_crtc {</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_evo.c b/drivers/gpu/drm/nouveau/nv50_evo.c<br/>index 9b962e989d7c..ddcd55595824 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_evo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_evo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_evo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_evo.c</a></div><div class='hunk'>@@ -117,7 +117,7 @@ nv50_evo_channel_new(struct drm_device *dev, int chid,</div><div class='ctx'> 	evo-&gt;user_get = 4;</div><div class='ctx'> 	evo-&gt;user_put = 0;</div><div class='ctx'> </div><div class='del'>-	ret = nouveau_bo_new(dev, 4096, 0, TTM_PL_FLAG_VRAM, 0, 0,</div><div class='add'>+	ret = nouveau_bo_new(dev, 4096, 0, TTM_PL_FLAG_VRAM, 0, 0, NULL,</div><div class='ctx'> 			     &amp;evo-&gt;pushbuf_bo);</div><div class='ctx'> 	if (ret == 0)</div><div class='ctx'> 		ret = nouveau_bo_pin(evo-&gt;pushbuf_bo, TTM_PL_FLAG_VRAM);</div><div class='hunk'>@@ -333,7 +333,7 @@ nv50_evo_create(struct drm_device *dev)</div><div class='ctx'> 			goto err;</div><div class='ctx'> </div><div class='ctx'> 		ret = nouveau_bo_new(dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,</div><div class='del'>-				     0, 0x0000, &amp;dispc-&gt;sem.bo);</div><div class='add'>+				     0, 0x0000, NULL, &amp;dispc-&gt;sem.bo);</div><div class='ctx'> 		if (!ret) {</div><div class='ctx'> 			ret = nouveau_bo_pin(dispc-&gt;sem.bo, TTM_PL_FLAG_VRAM);</div><div class='ctx'> 			if (!ret)</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_fb.c b/drivers/gpu/drm/nouveau/nv50_fb.c<br/>index bdd2afe29205..f1e4b9e07d14 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_fb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_fb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_fb.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #include "drm.h"</div><div class='ctx'> #include "nouveau_drv.h"</div><div class='ctx'> #include "nouveau_drm.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> </div><div class='ctx'> struct nv50_fb_priv {</div><div class='ctx'> 	struct page *r100c08_page;</div><div class='hunk'>@@ -212,6 +213,7 @@ static struct nouveau_enum vm_fault[] = {</div><div class='ctx'> void</div><div class='ctx'> nv50_fb_vm_trap(struct drm_device *dev, int display)</div><div class='ctx'> {</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	const struct nouveau_enum *en, *cl;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -236,7 +238,7 @@ nv50_fb_vm_trap(struct drm_device *dev, int display)</div><div class='ctx'> 	/* lookup channel id */</div><div class='ctx'> 	chinst = (trap[2] &lt;&lt; 16) | trap[1];</div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;channels.lock, flags);</div><div class='del'>-	for (ch = 0; ch &lt; dev_priv-&gt;engine.fifo.channels; ch++) {</div><div class='add'>+	for (ch = 0; ch &lt; pfifo-&gt;channels; ch++) {</div><div class='ctx'> 		struct nouveau_channel *chan = dev_priv-&gt;channels.ptr[ch];</div><div class='ctx'> </div><div class='ctx'> 		if (!chan || !chan-&gt;ramin)</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c<br/>index dc75a7206524..e3c8b05dcae4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_fbcon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_fbcon.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_fbcon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_fbcon.c</a></div><div class='hunk'>@@ -43,22 +43,22 @@ nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (rect-&gt;rop != ROP_COPY) {</div><div class='del'>-		BEGIN_RING(chan, NvSub2D, 0x02ac, 1);</div><div class='add'>+		BEGIN_NV04(chan, NvSub2D, 0x02ac, 1);</div><div class='ctx'> 		OUT_RING(chan, 1);</div><div class='ctx'> 	}</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0588, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0588, 1);</div><div class='ctx'> 	if (info-&gt;fix.visual == FB_VISUAL_TRUECOLOR ||</div><div class='ctx'> 	    info-&gt;fix.visual == FB_VISUAL_DIRECTCOLOR)</div><div class='ctx'> 		OUT_RING(chan, ((uint32_t *)info-&gt;pseudo_palette)[rect-&gt;color]);</div><div class='ctx'> 	else</div><div class='ctx'> 		OUT_RING(chan, rect-&gt;color);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0600, 4);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0600, 4);</div><div class='ctx'> 	OUT_RING(chan, rect-&gt;dx);</div><div class='ctx'> 	OUT_RING(chan, rect-&gt;dy);</div><div class='ctx'> 	OUT_RING(chan, rect-&gt;dx + rect-&gt;width);</div><div class='ctx'> 	OUT_RING(chan, rect-&gt;dy + rect-&gt;height);</div><div class='ctx'> 	if (rect-&gt;rop != ROP_COPY) {</div><div class='del'>-		BEGIN_RING(chan, NvSub2D, 0x02ac, 1);</div><div class='add'>+		BEGIN_NV04(chan, NvSub2D, 0x02ac, 1);</div><div class='ctx'> 		OUT_RING(chan, 3);</div><div class='ctx'> 	}</div><div class='ctx'> 	FIRE_RING(chan);</div><div class='hunk'>@@ -78,14 +78,14 @@ nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0110, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0110, 1);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x08b0, 4);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x08b0, 4);</div><div class='ctx'> 	OUT_RING(chan, region-&gt;dx);</div><div class='ctx'> 	OUT_RING(chan, region-&gt;dy);</div><div class='ctx'> 	OUT_RING(chan, region-&gt;width);</div><div class='ctx'> 	OUT_RING(chan, region-&gt;height);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x08d0, 4);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x08d0, 4);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='ctx'> 	OUT_RING(chan, region-&gt;sx);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='hunk'>@@ -116,7 +116,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)</div><div class='ctx'> 	width = ALIGN(image-&gt;width, 32);</div><div class='ctx'> 	dwords = (width * image-&gt;height) &gt;&gt; 5;</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0814, 2);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0814, 2);</div><div class='ctx'> 	if (info-&gt;fix.visual == FB_VISUAL_TRUECOLOR ||</div><div class='ctx'> 	    info-&gt;fix.visual == FB_VISUAL_DIRECTCOLOR) {</div><div class='ctx'> 		OUT_RING(chan, palette[image-&gt;bg_color] | mask);</div><div class='hunk'>@@ -125,10 +125,10 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)</div><div class='ctx'> 		OUT_RING(chan, image-&gt;bg_color);</div><div class='ctx'> 		OUT_RING(chan, image-&gt;fg_color);</div><div class='ctx'> 	}</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0838, 2);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0838, 2);</div><div class='ctx'> 	OUT_RING(chan, image-&gt;width);</div><div class='ctx'> 	OUT_RING(chan, image-&gt;height);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0850, 4);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0850, 4);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='ctx'> 	OUT_RING(chan, image-&gt;dx);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='hunk'>@@ -143,7 +143,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)</div><div class='ctx'> </div><div class='ctx'> 		dwords -= push;</div><div class='ctx'> </div><div class='del'>-		BEGIN_RING(chan, NvSub2D, 0x40000860, push);</div><div class='add'>+		BEGIN_NI04(chan, NvSub2D, 0x0860, push);</div><div class='ctx'> 		OUT_RINGp(chan, data, push);</div><div class='ctx'> 		data += push;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -199,60 +199,59 @@ nv50_fbcon_accel_init(struct fb_info *info)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0000, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0000, 1);</div><div class='ctx'> 	OUT_RING(chan, Nv2D);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0180, 4);</div><div class='del'>-	OUT_RING(chan, NvNotify0);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0184, 3);</div><div class='ctx'> 	OUT_RING(chan, chan-&gt;vram_handle);</div><div class='ctx'> 	OUT_RING(chan, chan-&gt;vram_handle);</div><div class='ctx'> 	OUT_RING(chan, chan-&gt;vram_handle);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0290, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0290, 1);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0888, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0888, 1);</div><div class='ctx'> 	OUT_RING(chan, 1);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x02ac, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x02ac, 1);</div><div class='ctx'> 	OUT_RING(chan, 3);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x02a0, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x02a0, 1);</div><div class='ctx'> 	OUT_RING(chan, 0x55);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x08c0, 4);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x08c0, 4);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='ctx'> 	OUT_RING(chan, 1);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='ctx'> 	OUT_RING(chan, 1);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0580, 2);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0580, 2);</div><div class='ctx'> 	OUT_RING(chan, 4);</div><div class='ctx'> 	OUT_RING(chan, format);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x02e8, 2);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x02e8, 2);</div><div class='ctx'> 	OUT_RING(chan, 2);</div><div class='ctx'> 	OUT_RING(chan, 1);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0804, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0804, 1);</div><div class='ctx'> 	OUT_RING(chan, format);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0800, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0800, 1);</div><div class='ctx'> 	OUT_RING(chan, 1);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0808, 3);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0808, 3);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='ctx'> 	OUT_RING(chan, 1);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x081c, 1);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x081c, 1);</div><div class='ctx'> 	OUT_RING(chan, 1);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0840, 4);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0840, 4);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='ctx'> 	OUT_RING(chan, 1);</div><div class='ctx'> 	OUT_RING(chan, 0);</div><div class='ctx'> 	OUT_RING(chan, 1);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0200, 2);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0200, 2);</div><div class='ctx'> 	OUT_RING(chan, format);</div><div class='ctx'> 	OUT_RING(chan, 1);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0214, 5);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0214, 5);</div><div class='ctx'> 	OUT_RING(chan, info-&gt;fix.line_length);</div><div class='ctx'> 	OUT_RING(chan, info-&gt;var.xres_virtual);</div><div class='ctx'> 	OUT_RING(chan, info-&gt;var.yres_virtual);</div><div class='ctx'> 	OUT_RING(chan, upper_32_bits(fb-&gt;vma.offset));</div><div class='ctx'> 	OUT_RING(chan, lower_32_bits(fb-&gt;vma.offset));</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0230, 2);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0230, 2);</div><div class='ctx'> 	OUT_RING(chan, format);</div><div class='ctx'> 	OUT_RING(chan, 1);</div><div class='del'>-	BEGIN_RING(chan, NvSub2D, 0x0244, 5);</div><div class='add'>+	BEGIN_NV04(chan, NvSub2D, 0x0244, 5);</div><div class='ctx'> 	OUT_RING(chan, info-&gt;fix.line_length);</div><div class='ctx'> 	OUT_RING(chan, info-&gt;var.xres_virtual);</div><div class='ctx'> 	OUT_RING(chan, info-&gt;var.yres_virtual);</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_fifo.c b/drivers/gpu/drm/nouveau/nv50_fifo.c<br/>index 3bc2a565c20b..55383b85db0b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_fifo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_fifo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_fifo.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2007 Ben Skeggs.</div><div class='add'>+ * Copyright (C) 2012 Ben Skeggs.</div><div class='ctx'>  * All Rights Reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * Permission is hereby granted, free of charge, to any person obtaining</div><div class='hunk'>@@ -27,480 +27,268 @@</div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "drm.h"</div><div class='ctx'> #include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> #include "nouveau_ramht.h"</div><div class='ctx'> #include "nouveau_vm.h"</div><div class='ctx'> </div><div class='del'>-static void</div><div class='add'>+struct nv50_fifo_priv {</div><div class='add'>+	struct nouveau_fifo_priv base;</div><div class='add'>+	struct nouveau_gpuobj *playlist[2];</div><div class='add'>+	int cur_playlist;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv50_fifo_chan {</div><div class='add'>+	struct nouveau_fifo_chan base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void</div><div class='ctx'> nv50_fifo_playlist_update(struct drm_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct nv50_fifo_priv *priv = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='ctx'> 	struct nouveau_gpuobj *cur;</div><div class='del'>-	int i, nr;</div><div class='del'>-</div><div class='del'>-	NV_DEBUG(dev, "\n");</div><div class='add'>+	int i, p;</div><div class='ctx'> </div><div class='del'>-	cur = pfifo-&gt;playlist[pfifo-&gt;cur_playlist];</div><div class='del'>-	pfifo-&gt;cur_playlist = !pfifo-&gt;cur_playlist;</div><div class='add'>+	cur = priv-&gt;playlist[priv-&gt;cur_playlist];</div><div class='add'>+	priv-&gt;cur_playlist = !priv-&gt;cur_playlist;</div><div class='ctx'> </div><div class='del'>-	/* We never schedule channel 0 or 127 */</div><div class='del'>-	for (i = 1, nr = 0; i &lt; 127; i++) {</div><div class='del'>-		if (dev_priv-&gt;channels.ptr[i] &amp;&amp;</div><div class='del'>-		    dev_priv-&gt;channels.ptr[i]-&gt;ramfc) {</div><div class='del'>-			nv_wo32(cur, (nr * 4), i);</div><div class='del'>-			nr++;</div><div class='del'>-		}</div><div class='add'>+	for (i = 0, p = 0; i &lt; priv-&gt;base.channels; i++) {</div><div class='add'>+		if (nv_rd32(dev, 0x002600 + (i * 4)) &amp; 0x80000000)</div><div class='add'>+			nv_wo32(cur, p++ * 4, i);</div><div class='ctx'> 	}</div><div class='del'>-	dev_priv-&gt;engine.instmem.flush(dev);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, 0x32f4, cur-&gt;vinst &gt;&gt; 12);</div><div class='del'>-	nv_wr32(dev, 0x32ec, nr);</div><div class='del'>-	nv_wr32(dev, 0x2500, 0x101);</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nv50_fifo_channel_enable(struct drm_device *dev, int channel)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_channel *chan = dev_priv-&gt;channels.ptr[channel];</div><div class='del'>-	uint32_t inst;</div><div class='del'>-</div><div class='del'>-	NV_DEBUG(dev, "ch%d\n", channel);</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;chipset == 0x50)</div><div class='del'>-		inst = chan-&gt;ramfc-&gt;vinst &gt;&gt; 12;</div><div class='del'>-	else</div><div class='del'>-		inst = chan-&gt;ramfc-&gt;vinst &gt;&gt; 8;</div><div class='add'>+	dev_priv-&gt;engine.instmem.flush(dev);</div><div class='ctx'> </div><div class='del'>-	nv_wr32(dev, NV50_PFIFO_CTX_TABLE(channel), inst |</div><div class='del'>-		     NV50_PFIFO_CTX_TABLE_CHANNEL_ENABLED);</div><div class='add'>+	nv_wr32(dev, 0x0032f4, cur-&gt;vinst &gt;&gt; 12);</div><div class='add'>+	nv_wr32(dev, 0x0032ec, p);</div><div class='add'>+	nv_wr32(dev, 0x002500, 0x00000101);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nv50_fifo_channel_disable(struct drm_device *dev, int channel)</div><div class='add'>+static int</div><div class='add'>+nv50_fifo_context_new(struct nouveau_channel *chan, int engine)</div><div class='ctx'> {</div><div class='add'>+	struct nv50_fifo_priv *priv = nv_engine(chan-&gt;dev, engine);</div><div class='add'>+	struct nv50_fifo_chan *fctx;</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t inst;</div><div class='del'>-</div><div class='del'>-	NV_DEBUG(dev, "ch%d\n", channel);</div><div class='add'>+	u64 ib_offset = chan-&gt;pushbuf_base + chan-&gt;dma.ib_base * 4;</div><div class='add'>+	u64 instance = chan-&gt;ramin-&gt;vinst &gt;&gt; 12;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret = 0, i;</div><div class='ctx'> </div><div class='del'>-	if (dev_priv-&gt;chipset == 0x50)</div><div class='del'>-		inst = NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G80;</div><div class='del'>-	else</div><div class='del'>-		inst = NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G84;</div><div class='del'>-	nv_wr32(dev, NV50_PFIFO_CTX_TABLE(channel), inst);</div><div class='del'>-}</div><div class='add'>+	fctx = chan-&gt;engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL);</div><div class='add'>+	if (!fctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	atomic_inc(&amp;chan-&gt;vm-&gt;engref[engine]);</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nv50_fifo_init_reset(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	uint32_t pmc_e = NV_PMC_ENABLE_PFIFO;</div><div class='add'>+	chan-&gt;user = ioremap(pci_resource_start(dev-&gt;pdev, 0) +</div><div class='add'>+			     NV50_USER(chan-&gt;id), PAGE_SIZE);</div><div class='add'>+	if (!chan-&gt;user) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	NV_DEBUG(dev, "\n");</div><div class='add'>+	for (i = 0; i &lt; 0x100; i += 4)</div><div class='add'>+		nv_wo32(chan-&gt;ramin, i, 0x00000000);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x3c, 0x403f6078);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x40, 0x00000000);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x44, 0x01003fff);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x48, chan-&gt;pushbuf-&gt;cinst &gt;&gt; 4);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x50, lower_32_bits(ib_offset));</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x54, upper_32_bits(ib_offset) |</div><div class='add'>+				   drm_order(chan-&gt;dma.ib_max + 1) &lt;&lt; 16);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x60, 0x7fffffff);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x78, 0x00000000);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x7c, 0x30000001);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x80, ((chan-&gt;ramht-&gt;bits - 9) &lt;&lt; 27) |</div><div class='add'>+				   (4 &lt;&lt; 24) /* SEARCH_FULL */ |</div><div class='add'>+				   (chan-&gt;ramht-&gt;gpuobj-&gt;cinst &gt;&gt; 4));</div><div class='ctx'> </div><div class='del'>-	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) &amp; ~pmc_e);</div><div class='del'>-	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) |  pmc_e);</div><div class='del'>-}</div><div class='add'>+	dev_priv-&gt;engine.instmem.flush(dev);</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nv50_fifo_init_intr(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	NV_DEBUG(dev, "\n");</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+	nv_wr32(dev, 0x002600 + (chan-&gt;id * 4), 0x80000000 | instance);</div><div class='add'>+	nv50_fifo_playlist_update(dev);</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='ctx'> </div><div class='del'>-	nouveau_irq_register(dev, 8, nv04_fifo_isr);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_INTR_0, 0xFFFFFFFF);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_INTR_EN_0, 0xFFFFFFFF);</div><div class='add'>+error:</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.base.context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nv50_fifo_init_context_table(struct drm_device *dev)</div><div class='add'>+static bool</div><div class='add'>+nv50_fifo_kickoff(struct nouveau_channel *chan)</div><div class='ctx'> {</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	NV_DEBUG(dev, "\n");</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; NV50_PFIFO_CTX_TABLE__SIZE; i++) {</div><div class='del'>-		if (dev_priv-&gt;channels.ptr[i])</div><div class='del'>-			nv50_fifo_channel_enable(dev, i);</div><div class='del'>-		else</div><div class='del'>-			nv50_fifo_channel_disable(dev, i);</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	bool done = true;</div><div class='add'>+	u32 me;</div><div class='add'>+</div><div class='add'>+	/* HW bug workaround:</div><div class='add'>+	 *</div><div class='add'>+	 * PFIFO will hang forever if the connected engines don't report</div><div class='add'>+	 * that they've processed the context switch request.</div><div class='add'>+	 *</div><div class='add'>+	 * In order for the kickoff to work, we need to ensure all the</div><div class='add'>+	 * connected engines are in a state where they can answer.</div><div class='add'>+	 *</div><div class='add'>+	 * Newer chipsets don't seem to suffer from this issue, and well,</div><div class='add'>+	 * there's also a "ignore these engines" bitmask reg we can use</div><div class='add'>+	 * if we hit the issue there..</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* PME: make sure engine is enabled */</div><div class='add'>+	me = nv_mask(dev, 0x00b860, 0x00000001, 0x00000001);</div><div class='add'>+</div><div class='add'>+	/* do the kickoff... */</div><div class='add'>+	nv_wr32(dev, 0x0032fc, chan-&gt;ramin-&gt;vinst &gt;&gt; 12);</div><div class='add'>+	if (!nv_wait_ne(dev, 0x0032fc, 0xffffffff, 0xffffffff)) {</div><div class='add'>+		NV_INFO(dev, "PFIFO: channel %d unload timeout\n", chan-&gt;id);</div><div class='add'>+		done = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	nv50_fifo_playlist_update(dev);</div><div class='add'>+	/* restore any engine states we changed, and exit */</div><div class='add'>+	nv_wr32(dev, 0x00b860, me);</div><div class='add'>+	return done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-nv50_fifo_init_regs__nv(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	NV_DEBUG(dev, "\n");</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, 0x250c, 0x6f3cfc34);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-nv50_fifo_init_regs(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	NV_DEBUG(dev, "\n");</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, 0x2500, 0);</div><div class='del'>-	nv_wr32(dev, 0x3250, 0);</div><div class='del'>-	nv_wr32(dev, 0x3220, 0);</div><div class='del'>-	nv_wr32(dev, 0x3204, 0);</div><div class='del'>-	nv_wr32(dev, 0x3210, 0);</div><div class='del'>-	nv_wr32(dev, 0x3270, 0);</div><div class='del'>-	nv_wr32(dev, 0x2044, 0x01003fff);</div><div class='del'>-</div><div class='del'>-	/* Enable dummy channels setup by nv50_instmem.c */</div><div class='del'>-	nv50_fifo_channel_enable(dev, 0);</div><div class='del'>-	nv50_fifo_channel_enable(dev, 127);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nv50_fifo_init(struct drm_device *dev)</div><div class='add'>+nv50_fifo_context_del(struct nouveau_channel *chan, int engine)</div><div class='ctx'> {</div><div class='add'>+	struct nv50_fifo_chan *fctx = chan-&gt;engctx[engine];</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	int ret;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	NV_DEBUG(dev, "\n");</div><div class='add'>+	/* remove channel from playlist, will context switch if active */</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+	nv_mask(dev, 0x002600 + (chan-&gt;id * 4), 0x80000000, 0x00000000);</div><div class='add'>+	nv50_fifo_playlist_update(dev);</div><div class='ctx'> </div><div class='del'>-	if (pfifo-&gt;playlist[0]) {</div><div class='del'>-		pfifo-&gt;cur_playlist = !pfifo-&gt;cur_playlist;</div><div class='del'>-		goto just_reset;</div><div class='del'>-	}</div><div class='add'>+	/* tell any engines on this channel to unload their contexts */</div><div class='add'>+	nv50_fifo_kickoff(chan);</div><div class='ctx'> </div><div class='del'>-	ret = nouveau_gpuobj_new(dev, NULL, 128*4, 0x1000,</div><div class='del'>-				 NVOBJ_FLAG_ZERO_ALLOC,</div><div class='del'>-				 &amp;pfifo-&gt;playlist[0]);</div><div class='del'>-	if (ret) {</div><div class='del'>-		NV_ERROR(dev, "error creating playlist 0: %d\n", ret);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='add'>+	nv_wr32(dev, 0x002600 + (chan-&gt;id * 4), 0x00000000);</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='ctx'> </div><div class='del'>-	ret = nouveau_gpuobj_new(dev, NULL, 128*4, 0x1000,</div><div class='del'>-				 NVOBJ_FLAG_ZERO_ALLOC,</div><div class='del'>-				 &amp;pfifo-&gt;playlist[1]);</div><div class='del'>-	if (ret) {</div><div class='del'>-		nouveau_gpuobj_ref(NULL, &amp;pfifo-&gt;playlist[0]);</div><div class='del'>-		NV_ERROR(dev, "error creating playlist 1: %d\n", ret);</div><div class='del'>-		return ret;</div><div class='add'>+	/* clean up */</div><div class='add'>+	if (chan-&gt;user) {</div><div class='add'>+		iounmap(chan-&gt;user);</div><div class='add'>+		chan-&gt;user = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-just_reset:</div><div class='del'>-	nv50_fifo_init_reset(dev);</div><div class='del'>-	nv50_fifo_init_intr(dev);</div><div class='del'>-	nv50_fifo_init_context_table(dev);</div><div class='del'>-	nv50_fifo_init_regs__nv(dev);</div><div class='del'>-	nv50_fifo_init_regs(dev);</div><div class='del'>-	dev_priv-&gt;engine.fifo.enable(dev);</div><div class='del'>-	dev_priv-&gt;engine.fifo.reassign(dev, true);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	atomic_dec(&amp;chan-&gt;vm-&gt;engref[engine]);</div><div class='add'>+	chan-&gt;engctx[engine] = NULL;</div><div class='add'>+	kfree(fctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void</div><div class='del'>-nv50_fifo_takedown(struct drm_device *dev)</div><div class='add'>+static int</div><div class='add'>+nv50_fifo_init(struct drm_device *dev, int engine)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='add'>+	u32 instance;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	NV_DEBUG(dev, "\n");</div><div class='add'>+	nv_mask(dev, 0x000200, 0x00000100, 0x00000000);</div><div class='add'>+	nv_mask(dev, 0x000200, 0x00000100, 0x00000100);</div><div class='add'>+	nv_wr32(dev, 0x00250c, 0x6f3cfc34);</div><div class='add'>+	nv_wr32(dev, 0x002044, 0x01003fff);</div><div class='ctx'> </div><div class='del'>-	if (!pfifo-&gt;playlist[0])</div><div class='del'>-		return;</div><div class='add'>+	nv_wr32(dev, 0x002100, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x002140, 0xffffffff);</div><div class='ctx'> </div><div class='del'>-	nv_wr32(dev, 0x2140, 0x00000000);</div><div class='del'>-	nouveau_irq_unregister(dev, 8);</div><div class='add'>+	for (i = 0; i &lt; 128; i++) {</div><div class='add'>+		struct nouveau_channel *chan = dev_priv-&gt;channels.ptr[i];</div><div class='add'>+		if (chan &amp;&amp; chan-&gt;engctx[engine])</div><div class='add'>+			instance = 0x80000000 | chan-&gt;ramin-&gt;vinst &gt;&gt; 12;</div><div class='add'>+		else</div><div class='add'>+			instance = 0x00000000;</div><div class='add'>+		nv_wr32(dev, 0x002600 + (i * 4), instance);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;pfifo-&gt;playlist[0]);</div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;pfifo-&gt;playlist[1]);</div><div class='del'>-}</div><div class='add'>+	nv50_fifo_playlist_update(dev);</div><div class='ctx'> </div><div class='del'>-int</div><div class='del'>-nv50_fifo_channel_id(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	return nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) &amp;</div><div class='del'>-			NV50_PFIFO_CACHE1_PUSH1_CHID_MASK;</div><div class='add'>+	nv_wr32(dev, 0x003200, 1);</div><div class='add'>+	nv_wr32(dev, 0x003250, 1);</div><div class='add'>+	nv_wr32(dev, 0x002500, 1);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int</div><div class='del'>-nv50_fifo_create_context(struct nouveau_channel *chan)</div><div class='add'>+static int</div><div class='add'>+nv50_fifo_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_gpuobj *ramfc = NULL;</div><div class='del'>-        uint64_t ib_offset = chan-&gt;pushbuf_base + chan-&gt;dma.ib_base * 4;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	NV_DEBUG(dev, "ch%d\n", chan-&gt;id);</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;chipset == 0x50) {</div><div class='del'>-		ret = nouveau_gpuobj_new_fake(dev, chan-&gt;ramin-&gt;pinst,</div><div class='del'>-					      chan-&gt;ramin-&gt;vinst, 0x100,</div><div class='del'>-					      NVOBJ_FLAG_ZERO_ALLOC |</div><div class='del'>-					      NVOBJ_FLAG_ZERO_FREE,</div><div class='del'>-					      &amp;chan-&gt;ramfc);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ret = nouveau_gpuobj_new_fake(dev, chan-&gt;ramin-&gt;pinst + 0x0400,</div><div class='del'>-					      chan-&gt;ramin-&gt;vinst + 0x0400,</div><div class='del'>-					      4096, 0, &amp;chan-&gt;cache);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	} else {</div><div class='del'>-		ret = nouveau_gpuobj_new(dev, chan, 0x100, 256,</div><div class='del'>-					 NVOBJ_FLAG_ZERO_ALLOC |</div><div class='del'>-					 NVOBJ_FLAG_ZERO_FREE, &amp;chan-&gt;ramfc);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ret = nouveau_gpuobj_new(dev, chan, 4096, 1024,</div><div class='del'>-					 0, &amp;chan-&gt;cache);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-	ramfc = chan-&gt;ramfc;</div><div class='add'>+	struct nv50_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	chan-&gt;user = ioremap(pci_resource_start(dev-&gt;pdev, 0) +</div><div class='del'>-			     NV50_USER(chan-&gt;id), PAGE_SIZE);</div><div class='del'>-	if (!chan-&gt;user)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	/* set playlist length to zero, fifo will unload context */</div><div class='add'>+	nv_wr32(dev, 0x0032ec, 0);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='del'>-</div><div class='del'>-	nv_wo32(ramfc, 0x48, chan-&gt;pushbuf-&gt;cinst &gt;&gt; 4);</div><div class='del'>-	nv_wo32(ramfc, 0x80, ((chan-&gt;ramht-&gt;bits - 9) &lt;&lt; 27) |</div><div class='del'>-			     (4 &lt;&lt; 24) /* SEARCH_FULL */ |</div><div class='del'>-			     (chan-&gt;ramht-&gt;gpuobj-&gt;cinst &gt;&gt; 4));</div><div class='del'>-	nv_wo32(ramfc, 0x44, 0x01003fff);</div><div class='del'>-	nv_wo32(ramfc, 0x60, 0x7fffffff);</div><div class='del'>-	nv_wo32(ramfc, 0x40, 0x00000000);</div><div class='del'>-	nv_wo32(ramfc, 0x7c, 0x30000001);</div><div class='del'>-	nv_wo32(ramfc, 0x78, 0x00000000);</div><div class='del'>-	nv_wo32(ramfc, 0x3c, 0x403f6078);</div><div class='del'>-	nv_wo32(ramfc, 0x50, lower_32_bits(ib_offset));</div><div class='del'>-	nv_wo32(ramfc, 0x54, upper_32_bits(ib_offset) |</div><div class='del'>-                drm_order(chan-&gt;dma.ib_max + 1) &lt;&lt; 16);</div><div class='del'>-</div><div class='del'>-	if (dev_priv-&gt;chipset != 0x50) {</div><div class='del'>-		nv_wo32(chan-&gt;ramin, 0, chan-&gt;id);</div><div class='del'>-		nv_wo32(chan-&gt;ramin, 4, chan-&gt;ramfc-&gt;vinst &gt;&gt; 8);</div><div class='del'>-</div><div class='del'>-		nv_wo32(ramfc, 0x88, chan-&gt;cache-&gt;vinst &gt;&gt; 10);</div><div class='del'>-		nv_wo32(ramfc, 0x98, chan-&gt;ramin-&gt;vinst &gt;&gt; 12);</div><div class='add'>+	/* tell all connected engines to unload their contexts */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;base.channels; i++) {</div><div class='add'>+		struct nouveau_channel *chan = dev_priv-&gt;channels.ptr[i];</div><div class='add'>+		if (chan &amp;&amp; !nv50_fifo_kickoff(chan))</div><div class='add'>+			return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;engine.instmem.flush(dev);</div><div class='del'>-</div><div class='del'>-	nv50_fifo_channel_enable(dev, chan-&gt;id);</div><div class='del'>-	nv50_fifo_playlist_update(dev);</div><div class='del'>-	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+	nv_wr32(dev, 0x002140, 0);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void</div><div class='del'>-nv50_fifo_destroy_context(struct nouveau_channel *chan)</div><div class='add'>+nv50_fifo_tlb_flush(struct drm_device *dev, int engine)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	struct nouveau_gpuobj *ramfc = NULL;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	NV_DEBUG(dev, "ch%d\n", chan-&gt;id);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='del'>-	pfifo-&gt;reassign(dev, false);</div><div class='del'>-</div><div class='del'>-	/* Unload the context if it's the currently active one */</div><div class='del'>-	if (pfifo-&gt;channel_id(dev) == chan-&gt;id) {</div><div class='del'>-		pfifo-&gt;disable(dev);</div><div class='del'>-		pfifo-&gt;unload_context(dev);</div><div class='del'>-		pfifo-&gt;enable(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* This will ensure the channel is seen as disabled. */</div><div class='del'>-	nouveau_gpuobj_ref(chan-&gt;ramfc, &amp;ramfc);</div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;chan-&gt;ramfc);</div><div class='del'>-	nv50_fifo_channel_disable(dev, chan-&gt;id);</div><div class='del'>-</div><div class='del'>-	/* Dummy channel, also used on ch 127 */</div><div class='del'>-	if (chan-&gt;id == 0)</div><div class='del'>-		nv50_fifo_channel_disable(dev, 127);</div><div class='del'>-	nv50_fifo_playlist_update(dev);</div><div class='del'>-</div><div class='del'>-	pfifo-&gt;reassign(dev, true);</div><div class='del'>-	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* Free the channel resources */</div><div class='del'>-	if (chan-&gt;user) {</div><div class='del'>-		iounmap(chan-&gt;user);</div><div class='del'>-		chan-&gt;user = NULL;</div><div class='del'>-	}</div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;ramfc);</div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;chan-&gt;cache);</div><div class='add'>+	nv50_vm_flush_engine(dev, 5);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int</div><div class='del'>-nv50_fifo_load_context(struct nouveau_channel *chan)</div><div class='add'>+void</div><div class='add'>+nv50_fifo_destroy(struct drm_device *dev, int engine)</div><div class='ctx'> {</div><div class='del'>-	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_gpuobj *ramfc = chan-&gt;ramfc;</div><div class='del'>-	struct nouveau_gpuobj *cache = chan-&gt;cache;</div><div class='del'>-	int ptr, cnt;</div><div class='del'>-</div><div class='del'>-	NV_DEBUG(dev, "ch%d\n", chan-&gt;id);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, 0x3330, nv_ro32(ramfc, 0x00));</div><div class='del'>-	nv_wr32(dev, 0x3334, nv_ro32(ramfc, 0x04));</div><div class='del'>-	nv_wr32(dev, 0x3240, nv_ro32(ramfc, 0x08));</div><div class='del'>-	nv_wr32(dev, 0x3320, nv_ro32(ramfc, 0x0c));</div><div class='del'>-	nv_wr32(dev, 0x3244, nv_ro32(ramfc, 0x10));</div><div class='del'>-	nv_wr32(dev, 0x3328, nv_ro32(ramfc, 0x14));</div><div class='del'>-	nv_wr32(dev, 0x3368, nv_ro32(ramfc, 0x18));</div><div class='del'>-	nv_wr32(dev, 0x336c, nv_ro32(ramfc, 0x1c));</div><div class='del'>-	nv_wr32(dev, 0x3370, nv_ro32(ramfc, 0x20));</div><div class='del'>-	nv_wr32(dev, 0x3374, nv_ro32(ramfc, 0x24));</div><div class='del'>-	nv_wr32(dev, 0x3378, nv_ro32(ramfc, 0x28));</div><div class='del'>-	nv_wr32(dev, 0x337c, nv_ro32(ramfc, 0x2c));</div><div class='del'>-	nv_wr32(dev, 0x3228, nv_ro32(ramfc, 0x30));</div><div class='del'>-	nv_wr32(dev, 0x3364, nv_ro32(ramfc, 0x34));</div><div class='del'>-	nv_wr32(dev, 0x32a0, nv_ro32(ramfc, 0x38));</div><div class='del'>-	nv_wr32(dev, 0x3224, nv_ro32(ramfc, 0x3c));</div><div class='del'>-	nv_wr32(dev, 0x324c, nv_ro32(ramfc, 0x40));</div><div class='del'>-	nv_wr32(dev, 0x2044, nv_ro32(ramfc, 0x44));</div><div class='del'>-	nv_wr32(dev, 0x322c, nv_ro32(ramfc, 0x48));</div><div class='del'>-	nv_wr32(dev, 0x3234, nv_ro32(ramfc, 0x4c));</div><div class='del'>-	nv_wr32(dev, 0x3340, nv_ro32(ramfc, 0x50));</div><div class='del'>-	nv_wr32(dev, 0x3344, nv_ro32(ramfc, 0x54));</div><div class='del'>-	nv_wr32(dev, 0x3280, nv_ro32(ramfc, 0x58));</div><div class='del'>-	nv_wr32(dev, 0x3254, nv_ro32(ramfc, 0x5c));</div><div class='del'>-	nv_wr32(dev, 0x3260, nv_ro32(ramfc, 0x60));</div><div class='del'>-	nv_wr32(dev, 0x3264, nv_ro32(ramfc, 0x64));</div><div class='del'>-	nv_wr32(dev, 0x3268, nv_ro32(ramfc, 0x68));</div><div class='del'>-	nv_wr32(dev, 0x326c, nv_ro32(ramfc, 0x6c));</div><div class='del'>-	nv_wr32(dev, 0x32e4, nv_ro32(ramfc, 0x70));</div><div class='del'>-	nv_wr32(dev, 0x3248, nv_ro32(ramfc, 0x74));</div><div class='del'>-	nv_wr32(dev, 0x2088, nv_ro32(ramfc, 0x78));</div><div class='del'>-	nv_wr32(dev, 0x2058, nv_ro32(ramfc, 0x7c));</div><div class='del'>-	nv_wr32(dev, 0x2210, nv_ro32(ramfc, 0x80));</div><div class='del'>-</div><div class='del'>-	cnt = nv_ro32(ramfc, 0x84);</div><div class='del'>-	for (ptr = 0; ptr &lt; cnt; ptr++) {</div><div class='del'>-		nv_wr32(dev, NV40_PFIFO_CACHE1_METHOD(ptr),</div><div class='del'>-			nv_ro32(cache, (ptr * 8) + 0));</div><div class='del'>-		nv_wr32(dev, NV40_PFIFO_CACHE1_DATA(ptr),</div><div class='del'>-			nv_ro32(cache, (ptr * 8) + 4));</div><div class='del'>-	}</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, cnt &lt;&lt; 2);</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);</div><div class='del'>-</div><div class='del'>-	/* guessing that all the 0x34xx regs aren't on NV50 */</div><div class='del'>-	if (dev_priv-&gt;chipset != 0x50) {</div><div class='del'>-		nv_wr32(dev, 0x340c, nv_ro32(ramfc, 0x88));</div><div class='del'>-		nv_wr32(dev, 0x3400, nv_ro32(ramfc, 0x8c));</div><div class='del'>-		nv_wr32(dev, 0x3404, nv_ro32(ramfc, 0x90));</div><div class='del'>-		nv_wr32(dev, 0x3408, nv_ro32(ramfc, 0x94));</div><div class='del'>-		nv_wr32(dev, 0x3410, nv_ro32(ramfc, 0x98));</div><div class='del'>-	}</div><div class='add'>+	struct nv50_fifo_priv *priv = nv_engine(dev, engine);</div><div class='ctx'> </div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, chan-&gt;id | (1&lt;&lt;16));</div><div class='del'>-	return 0;</div><div class='add'>+	nouveau_irq_unregister(dev, 8);</div><div class='add'>+</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;priv-&gt;playlist[0]);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;priv-&gt;playlist[1]);</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;eng[engine] = NULL;</div><div class='add'>+	kfree(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='del'>-nv50_fifo_unload_context(struct drm_device *dev)</div><div class='add'>+nv50_fifo_create(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	struct nouveau_gpuobj *ramfc, *cache;</div><div class='del'>-	struct nouveau_channel *chan = NULL;</div><div class='del'>-	int chid, get, put, ptr;</div><div class='del'>-</div><div class='del'>-	NV_DEBUG(dev, "\n");</div><div class='del'>-</div><div class='del'>-	chid = pfifo-&gt;channel_id(dev);</div><div class='del'>-	if (chid &lt; 1 || chid &gt;= dev_priv-&gt;engine.fifo.channels - 1)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	chan = dev_priv-&gt;channels.ptr[chid];</div><div class='del'>-	if (!chan) {</div><div class='del'>-		NV_ERROR(dev, "Inactive channel on PFIFO: %d\n", chid);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	NV_DEBUG(dev, "ch%d\n", chan-&gt;id);</div><div class='del'>-	ramfc = chan-&gt;ramfc;</div><div class='del'>-	cache = chan-&gt;cache;</div><div class='del'>-</div><div class='del'>-	nv_wo32(ramfc, 0x00, nv_rd32(dev, 0x3330));</div><div class='del'>-	nv_wo32(ramfc, 0x04, nv_rd32(dev, 0x3334));</div><div class='del'>-	nv_wo32(ramfc, 0x08, nv_rd32(dev, 0x3240));</div><div class='del'>-	nv_wo32(ramfc, 0x0c, nv_rd32(dev, 0x3320));</div><div class='del'>-	nv_wo32(ramfc, 0x10, nv_rd32(dev, 0x3244));</div><div class='del'>-	nv_wo32(ramfc, 0x14, nv_rd32(dev, 0x3328));</div><div class='del'>-	nv_wo32(ramfc, 0x18, nv_rd32(dev, 0x3368));</div><div class='del'>-	nv_wo32(ramfc, 0x1c, nv_rd32(dev, 0x336c));</div><div class='del'>-	nv_wo32(ramfc, 0x20, nv_rd32(dev, 0x3370));</div><div class='del'>-	nv_wo32(ramfc, 0x24, nv_rd32(dev, 0x3374));</div><div class='del'>-	nv_wo32(ramfc, 0x28, nv_rd32(dev, 0x3378));</div><div class='del'>-	nv_wo32(ramfc, 0x2c, nv_rd32(dev, 0x337c));</div><div class='del'>-	nv_wo32(ramfc, 0x30, nv_rd32(dev, 0x3228));</div><div class='del'>-	nv_wo32(ramfc, 0x34, nv_rd32(dev, 0x3364));</div><div class='del'>-	nv_wo32(ramfc, 0x38, nv_rd32(dev, 0x32a0));</div><div class='del'>-	nv_wo32(ramfc, 0x3c, nv_rd32(dev, 0x3224));</div><div class='del'>-	nv_wo32(ramfc, 0x40, nv_rd32(dev, 0x324c));</div><div class='del'>-	nv_wo32(ramfc, 0x44, nv_rd32(dev, 0x2044));</div><div class='del'>-	nv_wo32(ramfc, 0x48, nv_rd32(dev, 0x322c));</div><div class='del'>-	nv_wo32(ramfc, 0x4c, nv_rd32(dev, 0x3234));</div><div class='del'>-	nv_wo32(ramfc, 0x50, nv_rd32(dev, 0x3340));</div><div class='del'>-	nv_wo32(ramfc, 0x54, nv_rd32(dev, 0x3344));</div><div class='del'>-	nv_wo32(ramfc, 0x58, nv_rd32(dev, 0x3280));</div><div class='del'>-	nv_wo32(ramfc, 0x5c, nv_rd32(dev, 0x3254));</div><div class='del'>-	nv_wo32(ramfc, 0x60, nv_rd32(dev, 0x3260));</div><div class='del'>-	nv_wo32(ramfc, 0x64, nv_rd32(dev, 0x3264));</div><div class='del'>-	nv_wo32(ramfc, 0x68, nv_rd32(dev, 0x3268));</div><div class='del'>-	nv_wo32(ramfc, 0x6c, nv_rd32(dev, 0x326c));</div><div class='del'>-	nv_wo32(ramfc, 0x70, nv_rd32(dev, 0x32e4));</div><div class='del'>-	nv_wo32(ramfc, 0x74, nv_rd32(dev, 0x3248));</div><div class='del'>-	nv_wo32(ramfc, 0x78, nv_rd32(dev, 0x2088));</div><div class='del'>-	nv_wo32(ramfc, 0x7c, nv_rd32(dev, 0x2058));</div><div class='del'>-	nv_wo32(ramfc, 0x80, nv_rd32(dev, 0x2210));</div><div class='del'>-</div><div class='del'>-	put = (nv_rd32(dev, NV03_PFIFO_CACHE1_PUT) &amp; 0x7ff) &gt;&gt; 2;</div><div class='del'>-	get = (nv_rd32(dev, NV03_PFIFO_CACHE1_GET) &amp; 0x7ff) &gt;&gt; 2;</div><div class='del'>-	ptr = 0;</div><div class='del'>-	while (put != get) {</div><div class='del'>-		nv_wo32(cache, ptr + 0,</div><div class='del'>-			nv_rd32(dev, NV40_PFIFO_CACHE1_METHOD(get)));</div><div class='del'>-		nv_wo32(cache, ptr + 4,</div><div class='del'>-			nv_rd32(dev, NV40_PFIFO_CACHE1_DATA(get)));</div><div class='del'>-		get = (get + 1) &amp; 0x1ff;</div><div class='del'>-		ptr += 8;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* guessing that all the 0x34xx regs aren't on NV50 */</div><div class='del'>-	if (dev_priv-&gt;chipset != 0x50) {</div><div class='del'>-		nv_wo32(ramfc, 0x84, ptr &gt;&gt; 3);</div><div class='del'>-		nv_wo32(ramfc, 0x88, nv_rd32(dev, 0x340c));</div><div class='del'>-		nv_wo32(ramfc, 0x8c, nv_rd32(dev, 0x3400));</div><div class='del'>-		nv_wo32(ramfc, 0x90, nv_rd32(dev, 0x3404));</div><div class='del'>-		nv_wo32(ramfc, 0x94, nv_rd32(dev, 0x3408));</div><div class='del'>-		nv_wo32(ramfc, 0x98, nv_rd32(dev, 0x3410));</div><div class='del'>-	}</div><div class='add'>+	struct nv50_fifo_priv *priv;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	dev_priv-&gt;engine.instmem.flush(dev);</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	/*XXX: probably reload ch127 (NULL) state back too */</div><div class='del'>-	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, 127);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	priv-&gt;base.base.destroy = nv50_fifo_destroy;</div><div class='add'>+	priv-&gt;base.base.init = nv50_fifo_init;</div><div class='add'>+	priv-&gt;base.base.fini = nv50_fifo_fini;</div><div class='add'>+	priv-&gt;base.base.context_new = nv50_fifo_context_new;</div><div class='add'>+	priv-&gt;base.base.context_del = nv50_fifo_context_del;</div><div class='add'>+	priv-&gt;base.base.tlb_flush = nv50_fifo_tlb_flush;</div><div class='add'>+	priv-&gt;base.channels = 127;</div><div class='add'>+	dev_priv-&gt;eng[NVOBJ_ENGINE_FIFO] = &amp;priv-&gt;base.base;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, NULL, priv-&gt;base.channels * 4, 0x1000,</div><div class='add'>+				 NVOBJ_FLAG_ZERO_ALLOC, &amp;priv-&gt;playlist[0]);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, NULL, priv-&gt;base.channels * 4, 0x1000,</div><div class='add'>+				 NVOBJ_FLAG_ZERO_ALLOC, &amp;priv-&gt;playlist[1]);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='ctx'> </div><div class='del'>-void</div><div class='del'>-nv50_fifo_tlb_flush(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	nv50_vm_flush_engine(dev, 5);</div><div class='add'>+	nouveau_irq_register(dev, 8, nv04_fifo_isr);</div><div class='add'>+error:</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.base.destroy(dev, NVOBJ_ENGINE_FIFO);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c<br/>index 33d5711a918d..d9cc2f2638d6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_graph.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_graph.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_graph.c</a></div><div class='hunk'>@@ -27,8 +27,8 @@</div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "drm.h"</div><div class='ctx'> #include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> #include "nouveau_ramht.h"</div><div class='del'>-#include "nouveau_grctx.h"</div><div class='ctx'> #include "nouveau_dma.h"</div><div class='ctx'> #include "nouveau_vm.h"</div><div class='ctx'> #include "nv50_evo.h"</div><div class='hunk'>@@ -40,86 +40,6 @@ struct nv50_graph_engine {</div><div class='ctx'> 	u32 grctx_size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nv50_graph_fifo_access(struct drm_device *dev, bool enabled)</div><div class='del'>-{</div><div class='del'>-	const uint32_t mask = 0x00010001;</div><div class='del'>-</div><div class='del'>-	if (enabled)</div><div class='del'>-		nv_wr32(dev, 0x400500, nv_rd32(dev, 0x400500) | mask);</div><div class='del'>-	else</div><div class='del'>-		nv_wr32(dev, 0x400500, nv_rd32(dev, 0x400500) &amp; ~mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct nouveau_channel *</div><div class='del'>-nv50_graph_channel(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	uint32_t inst;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Be sure we're not in the middle of a context switch or bad things</div><div class='del'>-	 * will happen, such as unloading the wrong pgraph context.</div><div class='del'>-	 */</div><div class='del'>-	if (!nv_wait(dev, 0x400300, 0x00000001, 0x00000000))</div><div class='del'>-		NV_ERROR(dev, "Ctxprog is still running\n");</div><div class='del'>-</div><div class='del'>-	inst = nv_rd32(dev, NV50_PGRAPH_CTXCTL_CUR);</div><div class='del'>-	if (!(inst &amp; NV50_PGRAPH_CTXCTL_CUR_LOADED))</div><div class='del'>-		return NULL;</div><div class='del'>-	inst = (inst &amp; NV50_PGRAPH_CTXCTL_CUR_INSTANCE) &lt;&lt; 12;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; dev_priv-&gt;engine.fifo.channels; i++) {</div><div class='del'>-		struct nouveau_channel *chan = dev_priv-&gt;channels.ptr[i];</div><div class='del'>-</div><div class='del'>-		if (chan &amp;&amp; chan-&gt;ramin &amp;&amp; chan-&gt;ramin-&gt;vinst == inst)</div><div class='del'>-			return chan;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-nv50_graph_do_load_context(struct drm_device *dev, uint32_t inst)</div><div class='del'>-{</div><div class='del'>-	uint32_t fifo = nv_rd32(dev, 0x400500);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, 0x400500, fifo &amp; ~1);</div><div class='del'>-	nv_wr32(dev, 0x400784, inst);</div><div class='del'>-	nv_wr32(dev, 0x400824, nv_rd32(dev, 0x400824) | 0x40);</div><div class='del'>-	nv_wr32(dev, 0x400320, nv_rd32(dev, 0x400320) | 0x11);</div><div class='del'>-	nv_wr32(dev, 0x400040, 0xffffffff);</div><div class='del'>-	(void)nv_rd32(dev, 0x400040);</div><div class='del'>-	nv_wr32(dev, 0x400040, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x400304, nv_rd32(dev, 0x400304) | 1);</div><div class='del'>-</div><div class='del'>-	if (nouveau_wait_for_idle(dev))</div><div class='del'>-		nv_wr32(dev, 0x40032c, inst | (1&lt;&lt;31));</div><div class='del'>-	nv_wr32(dev, 0x400500, fifo);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-nv50_graph_unload_context(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	uint32_t inst;</div><div class='del'>-</div><div class='del'>-	inst  = nv_rd32(dev, NV50_PGRAPH_CTXCTL_CUR);</div><div class='del'>-	if (!(inst &amp; NV50_PGRAPH_CTXCTL_CUR_LOADED))</div><div class='del'>-		return 0;</div><div class='del'>-	inst &amp;= NV50_PGRAPH_CTXCTL_CUR_INSTANCE;</div><div class='del'>-</div><div class='del'>-	nouveau_wait_for_idle(dev);</div><div class='del'>-	nv_wr32(dev, 0x400784, inst);</div><div class='del'>-	nv_wr32(dev, 0x400824, nv_rd32(dev, 0x400824) | 0x20);</div><div class='del'>-	nv_wr32(dev, 0x400304, nv_rd32(dev, 0x400304) | 0x01);</div><div class='del'>-	nouveau_wait_for_idle(dev);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, NV50_PGRAPH_CTXCTL_CUR, inst);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int</div><div class='ctx'> nv50_graph_init(struct drm_device *dev, int engine)</div><div class='ctx'> {</div><div class='hunk'>@@ -211,12 +131,6 @@ nv50_graph_init(struct drm_device *dev, int engine)</div><div class='ctx'> static int</div><div class='ctx'> nv50_graph_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='ctx'> {</div><div class='del'>-	nv_mask(dev, 0x400500, 0x00010001, 0x00000000);</div><div class='del'>-	if (!nv_wait(dev, 0x400700, ~0, 0) &amp;&amp; suspend) {</div><div class='del'>-		nv_mask(dev, 0x400500, 0x00010001, 0x00010001);</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-	nv50_graph_unload_context(dev);</div><div class='ctx'> 	nv_wr32(dev, 0x40013c, 0x00000000);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -229,7 +143,6 @@ nv50_graph_context_new(struct nouveau_channel *chan, int engine)</div><div class='ctx'> 	struct nouveau_gpuobj *ramin = chan-&gt;ramin;</div><div class='ctx'> 	struct nouveau_gpuobj *grctx = NULL;</div><div class='ctx'> 	struct nv50_graph_engine *pgraph = nv_engine(dev, engine);</div><div class='del'>-	struct nouveau_grctx ctx = {};</div><div class='ctx'> 	int hdr, ret;</div><div class='ctx'> </div><div class='ctx'> 	NV_DEBUG(dev, "ch%d\n", chan-&gt;id);</div><div class='hunk'>@@ -248,11 +161,7 @@ nv50_graph_context_new(struct nouveau_channel *chan, int engine)</div><div class='ctx'> 	nv_wo32(ramin, hdr + 0x10, 0);</div><div class='ctx'> 	nv_wo32(ramin, hdr + 0x14, 0x00010000);</div><div class='ctx'> </div><div class='del'>-	ctx.dev = chan-&gt;dev;</div><div class='del'>-	ctx.mode = NOUVEAU_GRCTX_VALS;</div><div class='del'>-	ctx.data = grctx;</div><div class='del'>-	nv50_grctx_init(&amp;ctx);</div><div class='del'>-</div><div class='add'>+	nv50_grctx_fill(dev, grctx);</div><div class='ctx'> 	nv_wo32(grctx, 0x00000, chan-&gt;ramin-&gt;vinst &gt;&gt; 12);</div><div class='ctx'> </div><div class='ctx'> 	dev_priv-&gt;engine.instmem.flush(dev);</div><div class='hunk'>@@ -268,33 +177,14 @@ nv50_graph_context_del(struct nouveau_channel *chan, int engine)</div><div class='ctx'> 	struct nouveau_gpuobj *grctx = chan-&gt;engctx[engine];</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='ctx'> 	int i, hdr = (dev_priv-&gt;chipset == 0x50) ? 0x200 : 0x20;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	NV_DEBUG(dev, "ch%d\n", chan-&gt;id);</div><div class='del'>-</div><div class='del'>-	if (!chan-&gt;ramin)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='del'>-	pfifo-&gt;reassign(dev, false);</div><div class='del'>-	nv50_graph_fifo_access(dev, false);</div><div class='del'>-</div><div class='del'>-	if (nv50_graph_channel(dev) == chan)</div><div class='del'>-		nv50_graph_unload_context(dev);</div><div class='ctx'> </div><div class='ctx'> 	for (i = hdr; i &lt; hdr + 24; i += 4)</div><div class='ctx'> 		nv_wo32(chan-&gt;ramin, i, 0);</div><div class='ctx'> 	dev_priv-&gt;engine.instmem.flush(dev);</div><div class='ctx'> </div><div class='del'>-	nv50_graph_fifo_access(dev, true);</div><div class='del'>-	pfifo-&gt;reassign(dev, true);</div><div class='del'>-	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='del'>-</div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;grctx);</div><div class='del'>-</div><div class='ctx'> 	atomic_dec(&amp;chan-&gt;vm-&gt;engref[engine]);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;grctx);</div><div class='ctx'> 	chan-&gt;engctx[engine] = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -325,85 +215,6 @@ nv50_graph_object_new(struct nouveau_channel *chan, int engine,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-nv50_graph_context_switch(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	uint32_t inst;</div><div class='del'>-</div><div class='del'>-	nv50_graph_unload_context(dev);</div><div class='del'>-</div><div class='del'>-	inst  = nv_rd32(dev, NV50_PGRAPH_CTXCTL_NEXT);</div><div class='del'>-	inst &amp;= NV50_PGRAPH_CTXCTL_NEXT_INSTANCE;</div><div class='del'>-	nv50_graph_do_load_context(dev, inst);</div><div class='del'>-</div><div class='del'>-	nv_wr32(dev, NV40_PGRAPH_INTR_EN, nv_rd32(dev,</div><div class='del'>-		NV40_PGRAPH_INTR_EN) | NV_PGRAPH_INTR_CONTEXT_SWITCH);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-nv50_graph_nvsw_dma_vblsem(struct nouveau_channel *chan,</div><div class='del'>-			   u32 class, u32 mthd, u32 data)</div><div class='del'>-{</div><div class='del'>-	struct nouveau_gpuobj *gpuobj;</div><div class='del'>-</div><div class='del'>-	gpuobj = nouveau_ramht_find(chan, data);</div><div class='del'>-	if (!gpuobj)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	if (nouveau_notifier_offset(gpuobj, NULL))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	chan-&gt;nvsw.vblsem = gpuobj;</div><div class='del'>-	chan-&gt;nvsw.vblsem_offset = ~0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-nv50_graph_nvsw_vblsem_offset(struct nouveau_channel *chan,</div><div class='del'>-			      u32 class, u32 mthd, u32 data)</div><div class='del'>-{</div><div class='del'>-	if (nouveau_notifier_offset(chan-&gt;nvsw.vblsem, &amp;data))</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	chan-&gt;nvsw.vblsem_offset = data &gt;&gt; 2;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-nv50_graph_nvsw_vblsem_release_val(struct nouveau_channel *chan,</div><div class='del'>-				   u32 class, u32 mthd, u32 data)</div><div class='del'>-{</div><div class='del'>-	chan-&gt;nvsw.vblsem_rval = data;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-nv50_graph_nvsw_vblsem_release(struct nouveau_channel *chan,</div><div class='del'>-			       u32 class, u32 mthd, u32 data)</div><div class='del'>-{</div><div class='del'>-	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-</div><div class='del'>-	if (!chan-&gt;nvsw.vblsem || chan-&gt;nvsw.vblsem_offset == ~0 || data &gt; 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	drm_vblank_get(dev, data);</div><div class='del'>-</div><div class='del'>-	chan-&gt;nvsw.vblsem_head = data;</div><div class='del'>-	list_add(&amp;chan-&gt;nvsw.vbl_wait, &amp;dev_priv-&gt;vbl_waiting);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-nv50_graph_nvsw_mthd_page_flip(struct nouveau_channel *chan,</div><div class='del'>-			       u32 class, u32 mthd, u32 data)</div><div class='del'>-{</div><div class='del'>-	nouveau_finish_page_flip(chan, NULL);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void</div><div class='ctx'> nv50_graph_tlb_flush(struct drm_device *dev, int engine)</div><div class='ctx'> {</div><div class='ctx'> 	nv50_vm_flush_engine(dev, 0);</div><div class='hunk'>@@ -514,6 +325,7 @@ struct nouveau_enum nv50_data_error_names[] = {</div><div class='ctx'> 	{ 0x0000001f, "RT_BPP128_WITH_MS8", NULL },</div><div class='ctx'> 	{ 0x00000021, "Z_OUT_OF_BOUNDS", NULL },</div><div class='ctx'> 	{ 0x00000023, "XY_OUT_OF_BOUNDS", NULL },</div><div class='add'>+	{ 0x00000024, "VP_ZERO_INPUTS", NULL },</div><div class='ctx'> 	{ 0x00000027, "CP_MORE_PARAMS_THAN_SHARED", NULL },</div><div class='ctx'> 	{ 0x00000028, "CP_NO_REG_SPACE_STRIPED", NULL },</div><div class='ctx'> 	{ 0x00000029, "CP_NO_REG_SPACE_PACKED", NULL },</div><div class='hunk'>@@ -900,13 +712,14 @@ nv50_pgraph_trap_handler(struct drm_device *dev, u32 display, u64 inst, u32 chid</div><div class='ctx'> int</div><div class='ctx'> nv50_graph_isr_chid(struct drm_device *dev, u64 inst)</div><div class='ctx'> {</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_channel *chan;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;channels.lock, flags);</div><div class='del'>-	for (i = 0; i &lt; dev_priv-&gt;engine.fifo.channels; i++) {</div><div class='add'>+	for (i = 0; i &lt; pfifo-&gt;channels; i++) {</div><div class='ctx'> 		chan = dev_priv-&gt;channels.ptr[i];</div><div class='ctx'> 		if (!chan || !chan-&gt;ramin)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -939,15 +752,6 @@ nv50_graph_isr(struct drm_device *dev)</div><div class='ctx'> 				show &amp;= ~0x00000010;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (stat &amp; 0x00001000) {</div><div class='del'>-			nv_wr32(dev, 0x400500, 0x00000000);</div><div class='del'>-			nv_wr32(dev, 0x400100, 0x00001000);</div><div class='del'>-			nv_mask(dev, 0x40013c, 0x00001000, 0x00000000);</div><div class='del'>-			nv50_graph_context_switch(dev);</div><div class='del'>-			stat &amp;= ~0x00001000;</div><div class='del'>-			show &amp;= ~0x00001000;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		show = (show &amp;&amp; nouveau_ratelimit()) ? show : 0;</div><div class='ctx'> </div><div class='ctx'> 		if (show &amp; 0x00100000) {</div><div class='hunk'>@@ -996,28 +800,21 @@ nv50_graph_create(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nv50_graph_engine *pgraph;</div><div class='del'>-	struct nouveau_grctx ctx = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	pgraph = kzalloc(sizeof(*pgraph),GFP_KERNEL);</div><div class='ctx'> 	if (!pgraph)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ctx.dev = dev;</div><div class='del'>-	ctx.mode = NOUVEAU_GRCTX_PROG;</div><div class='del'>-	ctx.data = pgraph-&gt;ctxprog;</div><div class='del'>-	ctx.ctxprog_max = ARRAY_SIZE(pgraph-&gt;ctxprog);</div><div class='del'>-</div><div class='del'>-	ret = nv50_grctx_init(&amp;ctx);</div><div class='add'>+	ret = nv50_grctx_init(dev, pgraph-&gt;ctxprog, ARRAY_SIZE(pgraph-&gt;ctxprog),</div><div class='add'>+				  &amp;pgraph-&gt;ctxprog_size,</div><div class='add'>+				  &amp;pgraph-&gt;grctx_size);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		NV_ERROR(dev, "PGRAPH: ctxprog build failed\n");</div><div class='ctx'> 		kfree(pgraph);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pgraph-&gt;grctx_size = ctx.ctxvals_pos * 4;</div><div class='del'>-	pgraph-&gt;ctxprog_size = ctx.ctxprog_len;</div><div class='del'>-</div><div class='ctx'> 	pgraph-&gt;base.destroy = nv50_graph_destroy;</div><div class='ctx'> 	pgraph-&gt;base.init = nv50_graph_init;</div><div class='ctx'> 	pgraph-&gt;base.fini = nv50_graph_fini;</div><div class='hunk'>@@ -1031,14 +828,6 @@ nv50_graph_create(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	nouveau_irq_register(dev, 12, nv50_graph_isr);</div><div class='ctx'> </div><div class='del'>-	/* NVSW really doesn't live here... */</div><div class='del'>-	NVOBJ_CLASS(dev, 0x506e, SW); /* nvsw */</div><div class='del'>-	NVOBJ_MTHD (dev, 0x506e, 0x018c, nv50_graph_nvsw_dma_vblsem);</div><div class='del'>-	NVOBJ_MTHD (dev, 0x506e, 0x0400, nv50_graph_nvsw_vblsem_offset);</div><div class='del'>-	NVOBJ_MTHD (dev, 0x506e, 0x0404, nv50_graph_nvsw_vblsem_release_val);</div><div class='del'>-	NVOBJ_MTHD (dev, 0x506e, 0x0408, nv50_graph_nvsw_vblsem_release);</div><div class='del'>-	NVOBJ_MTHD (dev, 0x506e, 0x0500, nv50_graph_nvsw_mthd_page_flip);</div><div class='del'>-</div><div class='ctx'> 	NVOBJ_ENGINE_ADD(dev, GR, &amp;pgraph-&gt;base);</div><div class='ctx'> 	NVOBJ_CLASS(dev, 0x0030, GR); /* null */</div><div class='ctx'> 	NVOBJ_CLASS(dev, 0x5039, GR); /* m2mf */</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_grctx.c b/drivers/gpu/drm/nouveau/nv50_grctx.c<br/>index 4b46d6968566..881e22b249fc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_grctx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_grctx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_grctx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_grctx.c</a></div><div class='hunk'>@@ -172,8 +172,8 @@ static void nv50_graph_construct_xfer2(struct nouveau_grctx *ctx);</div><div class='ctx'> </div><div class='ctx'> /* Main function: construct the ctxprog skeleton, call the other functions. */</div><div class='ctx'> </div><div class='del'>-int</div><div class='del'>-nv50_grctx_init(struct nouveau_grctx *ctx)</div><div class='add'>+static int</div><div class='add'>+nv50_grctx_generate(struct nouveau_grctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = ctx-&gt;dev-&gt;dev_private;</div><div class='ctx'> </div><div class='hunk'>@@ -210,7 +210,7 @@ nv50_grctx_init(struct nouveau_grctx *ctx)</div><div class='ctx'> 	cp_name(ctx, cp_check_load);</div><div class='ctx'> 	cp_bra (ctx, AUTO_LOAD, PENDING, cp_setup_auto_load);</div><div class='ctx'> 	cp_bra (ctx, USER_LOAD, PENDING, cp_setup_load);</div><div class='del'>-	cp_bra (ctx, ALWAYS, TRUE, cp_exit);</div><div class='add'>+	cp_bra (ctx, ALWAYS, TRUE, cp_prepare_exit);</div><div class='ctx'> </div><div class='ctx'> 	/* setup for context load */</div><div class='ctx'> 	cp_name(ctx, cp_setup_auto_load);</div><div class='hunk'>@@ -277,6 +277,33 @@ nv50_grctx_init(struct nouveau_grctx *ctx)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void</div><div class='add'>+nv50_grctx_fill(struct drm_device *dev, struct nouveau_gpuobj *mem)</div><div class='add'>+{</div><div class='add'>+	nv50_grctx_generate(&amp;(struct nouveau_grctx) {</div><div class='add'>+			     .dev = dev,</div><div class='add'>+			     .mode = NOUVEAU_GRCTX_VALS,</div><div class='add'>+			     .data = mem,</div><div class='add'>+			   });</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nv50_grctx_init(struct drm_device *dev, u32 *data, u32 max, u32 *len, u32 *cnt)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_grctx ctx = {</div><div class='add'>+		.dev = dev,</div><div class='add'>+		.mode = NOUVEAU_GRCTX_PROG,</div><div class='add'>+		.data = data,</div><div class='add'>+		.ctxprog_max = max</div><div class='add'>+	};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = nv50_grctx_generate(&amp;ctx);</div><div class='add'>+	*cnt = ctx.ctxvals_pos * 4;</div><div class='add'>+	*len = ctx.ctxprog_len;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Constructs MMIO part of ctxprog and ctxvals. Just a matter of knowing which</div><div class='ctx'>  * registers to save/restore and the default values for them.</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c<br/>index a7c12c94a5a6..0bba54f11800 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_instmem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_instmem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_instmem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_instmem.c</a></div><div class='hunk'>@@ -83,7 +83,7 @@ nv50_channel_new(struct drm_device *dev, u32 size, struct nouveau_vm *vm,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = drm_mm_init(&amp;chan-&gt;ramin_heap, 0x6000, chan-&gt;ramin-&gt;size);</div><div class='add'>+	ret = drm_mm_init(&amp;chan-&gt;ramin_heap, 0x6000, chan-&gt;ramin-&gt;size - 0x6000);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		nv50_channel_del(&amp;chan);</div><div class='ctx'> 		return ret;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_mpeg.c b/drivers/gpu/drm/nouveau/nv50_mpeg.c<br/>index b57a2d180ad2..90e8ed22cfcb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_mpeg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_mpeg.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_mpeg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_mpeg.c</a></div><div class='hunk'>@@ -77,27 +77,13 @@ nv50_mpeg_context_new(struct nouveau_channel *chan, int engine)</div><div class='ctx'> static void</div><div class='ctx'> nv50_mpeg_context_del(struct nouveau_channel *chan, int engine)</div><div class='ctx'> {</div><div class='del'>-	struct drm_nouveau_private *dev_priv = chan-&gt;dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_gpuobj *ctx = chan-&gt;engctx[engine];</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 inst, i;</div><div class='del'>-</div><div class='del'>-	if (!chan-&gt;ramin)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	inst  = chan-&gt;ramin-&gt;vinst &gt;&gt; 12;</div><div class='del'>-	inst |= 0x80000000;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='del'>-	nv_mask(dev, 0x00b32c, 0x00000001, 0x00000000);</div><div class='del'>-	if (nv_rd32(dev, 0x00b318) == inst)</div><div class='del'>-		nv_mask(dev, 0x00b318, 0x80000000, 0x00000000);</div><div class='del'>-	nv_mask(dev, 0x00b32c, 0x00000001, 0x00000001);</div><div class='del'>-	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0x00; i &lt;= 0x14; i += 4)</div><div class='ctx'> 		nv_wo32(chan-&gt;ramin, CTX_PTR(dev, i), 0x00000000);</div><div class='add'>+</div><div class='ctx'> 	nouveau_gpuobj_ref(NULL, &amp;ctx);</div><div class='ctx'> 	chan-&gt;engctx[engine] = NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -162,7 +148,6 @@ nv50_mpeg_init(struct drm_device *dev, int engine)</div><div class='ctx'> static int</div><div class='ctx'> nv50_mpeg_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='ctx'> {</div><div class='del'>-	/*XXX: context save for s/r */</div><div class='ctx'> 	nv_mask(dev, 0x00b32c, 0x00000001, 0x00000000);</div><div class='ctx'> 	nv_wr32(dev, 0x00b140, 0x00000000);</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_software.c b/drivers/gpu/drm/nouveau/nv50_software.c<br/>new file mode 100644<br/>index 000000000000..114d2517d4a8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_software.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_software.c</a></div><div class='hunk'>@@ -0,0 +1,214 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ben Skeggs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_software.h"</div><div class='add'>+</div><div class='add'>+#include "nv50_display.h"</div><div class='add'>+</div><div class='add'>+struct nv50_software_priv {</div><div class='add'>+	struct nouveau_software_priv base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv50_software_chan {</div><div class='add'>+	struct nouveau_software_chan base;</div><div class='add'>+	struct {</div><div class='add'>+		struct nouveau_gpuobj *object;</div><div class='add'>+	} vblank;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mthd_dma_vblsem(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)</div><div class='add'>+{</div><div class='add'>+	struct nv50_software_chan *pch = chan-&gt;engctx[NVOBJ_ENGINE_SW];</div><div class='add'>+	struct nouveau_gpuobj *gpuobj;</div><div class='add'>+</div><div class='add'>+	gpuobj = nouveau_ramht_find(chan, data);</div><div class='add'>+	if (!gpuobj)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (nouveau_notifier_offset(gpuobj, NULL))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	pch-&gt;vblank.object = gpuobj;</div><div class='add'>+	pch-&gt;base.vblank.offset = ~0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mthd_vblsem_offset(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)</div><div class='add'>+{</div><div class='add'>+	struct nv50_software_chan *pch = chan-&gt;engctx[NVOBJ_ENGINE_SW];</div><div class='add'>+</div><div class='add'>+	if (nouveau_notifier_offset(pch-&gt;vblank.object, &amp;data))</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	pch-&gt;base.vblank.offset = data &gt;&gt; 2;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mthd_vblsem_value(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)</div><div class='add'>+{</div><div class='add'>+	struct nv50_software_chan *pch = chan-&gt;engctx[NVOBJ_ENGINE_SW];</div><div class='add'>+	pch-&gt;base.vblank.value = data;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mthd_vblsem_release(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)</div><div class='add'>+{</div><div class='add'>+	struct nv50_software_priv *psw = nv_engine(chan-&gt;dev, NVOBJ_ENGINE_SW);</div><div class='add'>+	struct nv50_software_chan *pch = chan-&gt;engctx[NVOBJ_ENGINE_SW];</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (!pch-&gt;vblank.object || pch-&gt;base.vblank.offset == ~0 || data &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	drm_vblank_get(dev, data);</div><div class='add'>+</div><div class='add'>+	pch-&gt;base.vblank.head = data;</div><div class='add'>+	list_add(&amp;pch-&gt;base.vblank.list, &amp;psw-&gt;base.vblank);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mthd_flip(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)</div><div class='add'>+{</div><div class='add'>+	nouveau_finish_page_flip(chan, NULL);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv50_software_context_new(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv50_software_priv *psw = nv_engine(chan-&gt;dev, NVOBJ_ENGINE_SW);</div><div class='add'>+	struct nv50_display *pdisp = nv50_display(chan-&gt;dev);</div><div class='add'>+	struct nv50_software_chan *pch;</div><div class='add'>+	int ret = 0, i;</div><div class='add'>+</div><div class='add'>+	pch = kzalloc(sizeof(*pch), GFP_KERNEL);</div><div class='add'>+	if (!pch)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	nouveau_software_context_new(&amp;pch-&gt;base);</div><div class='add'>+	pch-&gt;base.vblank.bo = chan-&gt;notifier_bo;</div><div class='add'>+	chan-&gt;engctx[engine] = pch;</div><div class='add'>+</div><div class='add'>+	/* dma objects for display sync channel semaphore blocks */</div><div class='add'>+	for (i = 0; i &lt; chan-&gt;dev-&gt;mode_config.num_crtc; i++) {</div><div class='add'>+		struct nv50_display_crtc *dispc = &amp;pdisp-&gt;crtc[i];</div><div class='add'>+		struct nouveau_gpuobj *obj = NULL;</div><div class='add'>+</div><div class='add'>+		ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,</div><div class='add'>+					     dispc-&gt;sem.bo-&gt;bo.offset, 0x1000,</div><div class='add'>+					     NV_MEM_ACCESS_RW,</div><div class='add'>+					     NV_MEM_TARGET_VRAM, &amp;obj);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		ret = nouveau_ramht_insert(chan, NvEvoSema0 + i, obj);</div><div class='add'>+		nouveau_gpuobj_ref(NULL, &amp;obj);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		psw-&gt;base.base.context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv50_software_context_del(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv50_software_chan *pch = chan-&gt;engctx[engine];</div><div class='add'>+	chan-&gt;engctx[engine] = NULL;</div><div class='add'>+	kfree(pch);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv50_software_object_new(struct nouveau_channel *chan, int engine,</div><div class='add'>+			 u32 handle, u16 class)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	struct nouveau_gpuobj *obj = NULL;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, chan, 16, 16, 0, &amp;obj);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	obj-&gt;engine = 0;</div><div class='add'>+	obj-&gt;class  = class;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_ramht_insert(chan, handle, obj);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;obj);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv50_software_init(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv50_software_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv50_software_destroy(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv50_software_priv *psw = nv_engine(dev, engine);</div><div class='add'>+</div><div class='add'>+	NVOBJ_ENGINE_DEL(dev, SW);</div><div class='add'>+	kfree(psw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nv50_software_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct nv50_software_priv *psw = kzalloc(sizeof(*psw), GFP_KERNEL);</div><div class='add'>+	if (!psw)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	psw-&gt;base.base.destroy = nv50_software_destroy;</div><div class='add'>+	psw-&gt;base.base.init = nv50_software_init;</div><div class='add'>+	psw-&gt;base.base.fini = nv50_software_fini;</div><div class='add'>+	psw-&gt;base.base.context_new = nv50_software_context_new;</div><div class='add'>+	psw-&gt;base.base.context_del = nv50_software_context_del;</div><div class='add'>+	psw-&gt;base.base.object_new = nv50_software_object_new;</div><div class='add'>+	nouveau_software_create(&amp;psw-&gt;base);</div><div class='add'>+</div><div class='add'>+	NVOBJ_ENGINE_ADD(dev, SW, &amp;psw-&gt;base.base);</div><div class='add'>+	NVOBJ_CLASS(dev, 0x506e, SW);</div><div class='add'>+	NVOBJ_MTHD (dev, 0x506e, 0x018c, mthd_dma_vblsem);</div><div class='add'>+	NVOBJ_MTHD (dev, 0x506e, 0x0400, mthd_vblsem_offset);</div><div class='add'>+	NVOBJ_MTHD (dev, 0x506e, 0x0404, mthd_vblsem_value);</div><div class='add'>+	NVOBJ_MTHD (dev, 0x506e, 0x0408, mthd_vblsem_release);</div><div class='add'>+	NVOBJ_MTHD (dev, 0x506e, 0x0500, mthd_flip);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c<br/>index 274640212475..a9514eaa74c1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_sor.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_sor.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_sor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_sor.c</a></div><div class='hunk'>@@ -242,9 +242,9 @@ nv50_sor_disconnect(struct drm_encoder *encoder)</div><div class='ctx'> 		NV_ERROR(dev, "no space while disconnecting SOR\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder-&gt;or, MODE_CTRL), 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_SOR(nv_encoder-&gt;or, MODE_CTRL), 1);</div><div class='ctx'> 	OUT_RING  (evo, 0);</div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1);</div><div class='ctx'> 	OUT_RING  (evo, 0);</div><div class='ctx'> </div><div class='ctx'> 	nouveau_hdmi_mode_set(encoder, NULL);</div><div class='hunk'>@@ -430,7 +430,7 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,</div><div class='ctx'> 		nv_encoder-&gt;crtc = NULL;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder-&gt;or, MODE_CTRL), 1);</div><div class='add'>+	BEGIN_NV04(evo, 0, NV50_EVO_SOR(nv_encoder-&gt;or, MODE_CTRL), 1);</div><div class='ctx'> 	OUT_RING(evo, mode_ctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv50_vm.c b/drivers/gpu/drm/nouveau/nv50_vm.c<br/>index 44fbac9c7d93..179bb42a635c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_vm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv50_vm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv50_vm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv50_vm.c</a></div><div class='hunk'>@@ -147,7 +147,6 @@ nv50_vm_flush(struct nouveau_vm *vm)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = vm-&gt;dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_instmem_engine *pinstmem = &amp;dev_priv-&gt;engine.instmem;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	pinstmem-&gt;flush(vm-&gt;dev);</div><div class='hunk'>@@ -158,7 +157,6 @@ nv50_vm_flush(struct nouveau_vm *vm)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pfifo-&gt;tlb_flush(vm-&gt;dev);</div><div class='ctx'> 	for (i = 0; i &lt; NVOBJ_ENGINE_NR; i++) {</div><div class='ctx'> 		if (atomic_read(&amp;vm-&gt;engref[i]))</div><div class='ctx'> 			dev_priv-&gt;eng[i]-&gt;tlb_flush(vm-&gt;dev, i);</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv84_fence.c b/drivers/gpu/drm/nouveau/nv84_fence.c<br/>new file mode 100644<br/>index 000000000000..c2f889b0d340<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv84_fence.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv84_fence.c</a></div><div class='hunk'>@@ -0,0 +1,177 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ben Skeggs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_dma.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='add'>+#include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_fence.h"</div><div class='add'>+</div><div class='add'>+struct nv84_fence_chan {</div><div class='add'>+	struct nouveau_fence_chan base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv84_fence_priv {</div><div class='add'>+	struct nouveau_fence_priv base;</div><div class='add'>+	struct nouveau_gpuobj *mem;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv84_fence_emit(struct nouveau_fence *fence)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_channel *chan = fence-&gt;channel;</div><div class='add'>+	int ret = RING_SPACE(chan, 7);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);</div><div class='add'>+		OUT_RING  (chan, NvSema);</div><div class='add'>+		BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(chan-&gt;id * 16));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(chan-&gt;id * 16));</div><div class='add'>+		OUT_RING  (chan, fence-&gt;sequence);</div><div class='add'>+		OUT_RING  (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG);</div><div class='add'>+		FIRE_RING (chan);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv84_fence_sync(struct nouveau_fence *fence,</div><div class='add'>+		struct nouveau_channel *prev, struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	int ret = RING_SPACE(chan, 7);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);</div><div class='add'>+		OUT_RING  (chan, NvSema);</div><div class='add'>+		BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(prev-&gt;id * 16));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(prev-&gt;id * 16));</div><div class='add'>+		OUT_RING  (chan, fence-&gt;sequence);</div><div class='add'>+		OUT_RING  (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL);</div><div class='add'>+		FIRE_RING (chan);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+nv84_fence_read(struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	struct nv84_fence_priv *priv = nv_engine(chan-&gt;dev, NVOBJ_ENGINE_FENCE);</div><div class='add'>+	return nv_ro32(priv-&gt;mem, chan-&gt;id * 16);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv84_fence_context_del(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv84_fence_chan *fctx = chan-&gt;engctx[engine];</div><div class='add'>+	nouveau_fence_context_del(&amp;fctx-&gt;base);</div><div class='add'>+	chan-&gt;engctx[engine] = NULL;</div><div class='add'>+	kfree(fctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv84_fence_context_new(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv84_fence_priv *priv = nv_engine(chan-&gt;dev, engine);</div><div class='add'>+	struct nv84_fence_chan *fctx;</div><div class='add'>+	struct nouveau_gpuobj *obj;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	fctx = chan-&gt;engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL);</div><div class='add'>+	if (!fctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	nouveau_fence_context_new(&amp;fctx-&gt;base);</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_FROM_MEMORY,</div><div class='add'>+				     priv-&gt;mem-&gt;vinst, priv-&gt;mem-&gt;size,</div><div class='add'>+				     NV_MEM_ACCESS_RW,</div><div class='add'>+				     NV_MEM_TARGET_VRAM, &amp;obj);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		ret = nouveau_ramht_insert(chan, NvSema, obj);</div><div class='add'>+		nouveau_gpuobj_ref(NULL, &amp;obj);</div><div class='add'>+		nv_wo32(priv-&gt;mem, chan-&gt;id * 16, 0x00000000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		nv84_fence_context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv84_fence_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv84_fence_init(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv84_fence_destroy(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv84_fence_priv *priv = nv_engine(dev, engine);</div><div class='add'>+</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;priv-&gt;mem);</div><div class='add'>+	dev_priv-&gt;eng[engine] = NULL;</div><div class='add'>+	kfree(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nv84_fence_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv84_fence_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;base.engine.destroy = nv84_fence_destroy;</div><div class='add'>+	priv-&gt;base.engine.init = nv84_fence_init;</div><div class='add'>+	priv-&gt;base.engine.fini = nv84_fence_fini;</div><div class='add'>+	priv-&gt;base.engine.context_new = nv84_fence_context_new;</div><div class='add'>+	priv-&gt;base.engine.context_del = nv84_fence_context_del;</div><div class='add'>+	priv-&gt;base.emit = nv84_fence_emit;</div><div class='add'>+	priv-&gt;base.sync = nv84_fence_sync;</div><div class='add'>+	priv-&gt;base.read = nv84_fence_read;</div><div class='add'>+	dev_priv-&gt;eng[NVOBJ_ENGINE_FENCE] = &amp;priv-&gt;base.engine;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, NULL, 16 * pfifo-&gt;channels,</div><div class='add'>+				 0x1000, 0, &amp;priv-&gt;mem);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (ret)</div><div class='add'>+		nv84_fence_destroy(dev, NVOBJ_ENGINE_FENCE);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv84_fifo.c b/drivers/gpu/drm/nouveau/nv84_fifo.c<br/>new file mode 100644<br/>index 000000000000..cc82d799fc3b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv84_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv84_fifo.c</a></div><div class='hunk'>@@ -0,0 +1,241 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 Ben Skeggs.</div><div class='add'>+ * All Rights Reserved.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining</div><div class='add'>+ * a copy of this software and associated documentation files (the</div><div class='add'>+ * "Software"), to deal in the Software without restriction, including</div><div class='add'>+ * without limitation the rights to use, copy, modify, merge, publish,</div><div class='add'>+ * distribute, sublicense, and/or sell copies of the Software, and to</div><div class='add'>+ * permit persons to whom the Software is furnished to do so, subject to</div><div class='add'>+ * the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice (including the</div><div class='add'>+ * next paragraph) shall be included in all copies or substantial</div><div class='add'>+ * portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.</div><div class='add'>+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE</div><div class='add'>+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION</div><div class='add'>+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION</div><div class='add'>+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='add'>+#include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_vm.h"</div><div class='add'>+</div><div class='add'>+struct nv84_fifo_priv {</div><div class='add'>+	struct nouveau_fifo_priv base;</div><div class='add'>+	struct nouveau_gpuobj *playlist[2];</div><div class='add'>+	int cur_playlist;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nv84_fifo_chan {</div><div class='add'>+	struct nouveau_fifo_chan base;</div><div class='add'>+	struct nouveau_gpuobj *ramfc;</div><div class='add'>+	struct nouveau_gpuobj *cache;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv84_fifo_context_new(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv84_fifo_priv *priv = nv_engine(chan-&gt;dev, engine);</div><div class='add'>+	struct nv84_fifo_chan *fctx;</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+        u64 ib_offset = chan-&gt;pushbuf_base + chan-&gt;dma.ib_base * 4;</div><div class='add'>+	u64 instance;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	fctx = chan-&gt;engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL);</div><div class='add'>+	if (!fctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	atomic_inc(&amp;chan-&gt;vm-&gt;engref[engine]);</div><div class='add'>+</div><div class='add'>+	chan-&gt;user = ioremap(pci_resource_start(dev-&gt;pdev, 0) +</div><div class='add'>+			     NV50_USER(chan-&gt;id), PAGE_SIZE);</div><div class='add'>+	if (!chan-&gt;user) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, chan, 256, 256, NVOBJ_FLAG_ZERO_ALLOC |</div><div class='add'>+				 NVOBJ_FLAG_ZERO_FREE, &amp;fctx-&gt;ramfc);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	instance = fctx-&gt;ramfc-&gt;vinst &gt;&gt; 8;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, chan, 4096, 1024, 0, &amp;fctx-&gt;cache);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x3c, 0x403f6078);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x40, 0x00000000);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x44, 0x01003fff);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x48, chan-&gt;pushbuf-&gt;cinst &gt;&gt; 4);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x50, lower_32_bits(ib_offset));</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x54, upper_32_bits(ib_offset) |</div><div class='add'>+				   drm_order(chan-&gt;dma.ib_max + 1) &lt;&lt; 16);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x60, 0x7fffffff);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x78, 0x00000000);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x7c, 0x30000001);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x80, ((chan-&gt;ramht-&gt;bits - 9) &lt;&lt; 27) |</div><div class='add'>+				   (4 &lt;&lt; 24) /* SEARCH_FULL */ |</div><div class='add'>+				   (chan-&gt;ramht-&gt;gpuobj-&gt;cinst &gt;&gt; 4));</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x88, fctx-&gt;cache-&gt;vinst &gt;&gt; 10);</div><div class='add'>+	nv_wo32(fctx-&gt;ramfc, 0x98, chan-&gt;ramin-&gt;vinst &gt;&gt; 12);</div><div class='add'>+</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x00, chan-&gt;id);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x04, fctx-&gt;ramfc-&gt;vinst &gt;&gt; 8);</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;engine.instmem.flush(dev);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+	nv_wr32(dev, 0x002600 + (chan-&gt;id * 4), 0x80000000 | instance);</div><div class='add'>+	nv50_fifo_playlist_update(dev);</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.base.context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv84_fifo_context_del(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv84_fifo_chan *fctx = chan-&gt;engctx[engine];</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* remove channel from playlist, will context switch if active */</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+	nv_mask(dev, 0x002600 + (chan-&gt;id * 4), 0x80000000, 0x00000000);</div><div class='add'>+	nv50_fifo_playlist_update(dev);</div><div class='add'>+</div><div class='add'>+	/* tell any engines on this channel to unload their contexts */</div><div class='add'>+	nv_wr32(dev, 0x0032fc, chan-&gt;ramin-&gt;vinst &gt;&gt; 12);</div><div class='add'>+	if (!nv_wait_ne(dev, 0x0032fc, 0xffffffff, 0xffffffff))</div><div class='add'>+		NV_INFO(dev, "PFIFO: channel %d unload timeout\n", chan-&gt;id);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x002600 + (chan-&gt;id * 4), 0x00000000);</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;context_switch_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* clean up */</div><div class='add'>+	if (chan-&gt;user) {</div><div class='add'>+		iounmap(chan-&gt;user);</div><div class='add'>+		chan-&gt;user = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;fctx-&gt;ramfc);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;fctx-&gt;cache);</div><div class='add'>+</div><div class='add'>+	atomic_dec(&amp;chan-&gt;vm-&gt;engref[engine]);</div><div class='add'>+	chan-&gt;engctx[engine] = NULL;</div><div class='add'>+	kfree(fctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv84_fifo_init(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv84_fifo_chan *fctx;</div><div class='add'>+	u32 instance;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	nv_mask(dev, 0x000200, 0x00000100, 0x00000000);</div><div class='add'>+	nv_mask(dev, 0x000200, 0x00000100, 0x00000100);</div><div class='add'>+	nv_wr32(dev, 0x00250c, 0x6f3cfc34);</div><div class='add'>+	nv_wr32(dev, 0x002044, 0x01003fff);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x002100, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x002140, 0xffffffff);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 128; i++) {</div><div class='add'>+		struct nouveau_channel *chan = dev_priv-&gt;channels.ptr[i];</div><div class='add'>+		if (chan &amp;&amp; (fctx = chan-&gt;engctx[engine]))</div><div class='add'>+			instance = 0x80000000 | fctx-&gt;ramfc-&gt;vinst &gt;&gt; 8;</div><div class='add'>+		else</div><div class='add'>+			instance = 0x00000000;</div><div class='add'>+		nv_wr32(dev, 0x002600 + (i * 4), instance);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv50_fifo_playlist_update(dev);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x003200, 1);</div><div class='add'>+	nv_wr32(dev, 0x003250, 1);</div><div class='add'>+	nv_wr32(dev, 0x002500, 1);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv84_fifo_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv84_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* set playlist length to zero, fifo will unload context */</div><div class='add'>+	nv_wr32(dev, 0x0032ec, 0);</div><div class='add'>+</div><div class='add'>+	/* tell all connected engines to unload their contexts */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;base.channels; i++) {</div><div class='add'>+		struct nouveau_channel *chan = dev_priv-&gt;channels.ptr[i];</div><div class='add'>+		if (chan)</div><div class='add'>+			nv_wr32(dev, 0x0032fc, chan-&gt;ramin-&gt;vinst &gt;&gt; 12);</div><div class='add'>+		if (!nv_wait_ne(dev, 0x0032fc, 0xffffffff, 0xffffffff)) {</div><div class='add'>+			NV_INFO(dev, "PFIFO: channel %d unload timeout\n", i);</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x002140, 0);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nv84_fifo_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv84_fifo_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;base.base.destroy = nv50_fifo_destroy;</div><div class='add'>+	priv-&gt;base.base.init = nv84_fifo_init;</div><div class='add'>+	priv-&gt;base.base.fini = nv84_fifo_fini;</div><div class='add'>+	priv-&gt;base.base.context_new = nv84_fifo_context_new;</div><div class='add'>+	priv-&gt;base.base.context_del = nv84_fifo_context_del;</div><div class='add'>+	priv-&gt;base.base.tlb_flush = nv50_fifo_tlb_flush;</div><div class='add'>+	priv-&gt;base.channels = 127;</div><div class='add'>+	dev_priv-&gt;eng[NVOBJ_ENGINE_FIFO] = &amp;priv-&gt;base.base;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, NULL, priv-&gt;base.channels * 4, 0x1000,</div><div class='add'>+				 NVOBJ_FLAG_ZERO_ALLOC, &amp;priv-&gt;playlist[0]);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, NULL, priv-&gt;base.channels * 4, 0x1000,</div><div class='add'>+				 NVOBJ_FLAG_ZERO_ALLOC, &amp;priv-&gt;playlist[1]);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	nouveau_irq_register(dev, 8, nv04_fifo_isr);</div><div class='add'>+error:</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.base.destroy(dev, NVOBJ_ENGINE_FIFO);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv98_crypt.c b/drivers/gpu/drm/nouveau/nv98_crypt.c<br/>index db94ff0a9fab..e25e13fb894e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv98_crypt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nv98_crypt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv98_crypt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv98_crypt.c</a></div><div class='hunk'>@@ -23,21 +23,93 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "drmP.h"</div><div class='add'>+</div><div class='ctx'> #include "nouveau_drv.h"</div><div class='ctx'> #include "nouveau_util.h"</div><div class='ctx'> #include "nouveau_vm.h"</div><div class='ctx'> #include "nouveau_ramht.h"</div><div class='ctx'> </div><div class='del'>-struct nv98_crypt_engine {</div><div class='add'>+#include "nv98_crypt.fuc.h"</div><div class='add'>+</div><div class='add'>+struct nv98_crypt_priv {</div><div class='ctx'> 	struct nouveau_exec_engine base;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct nv98_crypt_chan {</div><div class='add'>+	struct nouveau_gpuobj *mem;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int</div><div class='del'>-nv98_crypt_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+nv98_crypt_context_new(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nv98_crypt_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	struct nv98_crypt_chan *cctx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cctx = chan-&gt;engctx[engine] = kzalloc(sizeof(*cctx), GFP_KERNEL);</div><div class='add'>+	if (!cctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;chan-&gt;vm-&gt;engref[engine]);</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, chan, 256, 0, NVOBJ_FLAG_ZERO_ALLOC |</div><div class='add'>+				 NVOBJ_FLAG_ZERO_FREE, &amp;cctx-&gt;mem);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xa0, 0x00190000);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xa4, cctx-&gt;mem-&gt;vinst + cctx-&gt;mem-&gt;size - 1);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xa8, cctx-&gt;mem-&gt;vinst);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xac, 0x00000000);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xb0, 0x00000000);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xb4, 0x00000000);</div><div class='add'>+	dev_priv-&gt;engine.instmem.flush(dev);</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv98_crypt_context_del(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nv98_crypt_chan *cctx = chan-&gt;engctx[engine];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0xa0; i &lt; 0xb4; i += 4)</div><div class='add'>+		nv_wo32(chan-&gt;ramin, i, 0x00000000);</div><div class='add'>+</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;cctx-&gt;mem);</div><div class='add'>+</div><div class='add'>+	atomic_dec(&amp;chan-&gt;vm-&gt;engref[engine]);</div><div class='add'>+	chan-&gt;engctx[engine] = NULL;</div><div class='add'>+	kfree(cctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv98_crypt_object_new(struct nouveau_channel *chan, int engine,</div><div class='add'>+		     u32 handle, u16 class)</div><div class='ctx'> {</div><div class='del'>-	if (!(nv_rd32(dev, 0x000200) &amp; 0x00004000))</div><div class='del'>-		return 0;</div><div class='add'>+	struct nv98_crypt_chan *cctx = chan-&gt;engctx[engine];</div><div class='add'>+</div><div class='add'>+	/* fuc engine doesn't need an object, our ramht code does.. */</div><div class='add'>+	cctx-&gt;mem-&gt;engine = 5;</div><div class='add'>+	cctx-&gt;mem-&gt;class  = class;</div><div class='add'>+	return nouveau_ramht_insert(chan, handle, cctx-&gt;mem);</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+nv98_crypt_tlb_flush(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	nv50_vm_flush_engine(dev, 0x0a);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nv98_crypt_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+{</div><div class='ctx'> 	nv_mask(dev, 0x000200, 0x00004000, 0x00000000);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -45,34 +117,100 @@ nv98_crypt_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='ctx'> static int</div><div class='ctx'> nv98_crypt_init(struct drm_device *dev, int engine)</div><div class='ctx'> {</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* reset! */</div><div class='ctx'> 	nv_mask(dev, 0x000200, 0x00004000, 0x00000000);</div><div class='ctx'> 	nv_mask(dev, 0x000200, 0x00004000, 0x00004000);</div><div class='add'>+</div><div class='add'>+	/* wait for exit interrupt to signal */</div><div class='add'>+	nv_wait(dev, 0x087008, 0x00000010, 0x00000010);</div><div class='add'>+	nv_wr32(dev, 0x087004, 0x00000010);</div><div class='add'>+</div><div class='add'>+	/* upload microcode code and data segments */</div><div class='add'>+	nv_wr32(dev, 0x087ff8, 0x00100000);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(nv98_pcrypt_code); i++)</div><div class='add'>+		nv_wr32(dev, 0x087ff4, nv98_pcrypt_code[i]);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x087ff8, 0x00000000);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(nv98_pcrypt_data); i++)</div><div class='add'>+		nv_wr32(dev, 0x087ff4, nv98_pcrypt_data[i]);</div><div class='add'>+</div><div class='add'>+	/* start it running */</div><div class='add'>+	nv_wr32(dev, 0x08710c, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x087104, 0x00000000); /* ENTRY */</div><div class='add'>+	nv_wr32(dev, 0x087100, 0x00000002); /* TRIGGER */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct nouveau_enum nv98_crypt_isr_error_name[] = {</div><div class='add'>+	{ 0x0000, "ILLEGAL_MTHD" },</div><div class='add'>+	{ 0x0001, "INVALID_BITFIELD" },</div><div class='add'>+	{ 0x0002, "INVALID_ENUM" },</div><div class='add'>+	{ 0x0003, "QUERY" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv98_crypt_isr(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 disp = nv_rd32(dev, 0x08701c);</div><div class='add'>+	u32 stat = nv_rd32(dev, 0x087008) &amp; disp &amp; ~(disp &gt;&gt; 16);</div><div class='add'>+	u32 inst = nv_rd32(dev, 0x087050) &amp; 0x3fffffff;</div><div class='add'>+	u32 ssta = nv_rd32(dev, 0x087040) &amp; 0x0000ffff;</div><div class='add'>+	u32 addr = nv_rd32(dev, 0x087040) &gt;&gt; 16;</div><div class='add'>+	u32 mthd = (addr &amp; 0x07ff) &lt;&lt; 2;</div><div class='add'>+	u32 subc = (addr &amp; 0x3800) &gt;&gt; 11;</div><div class='add'>+	u32 data = nv_rd32(dev, 0x087044);</div><div class='add'>+	int chid = nv50_graph_isr_chid(dev, inst);</div><div class='add'>+</div><div class='add'>+	if (stat &amp; 0x00000040) {</div><div class='add'>+		NV_INFO(dev, "PCRYPT: DISPATCH_ERROR [");</div><div class='add'>+		nouveau_enum_print(nv98_crypt_isr_error_name, ssta);</div><div class='add'>+		printk("] ch %d [0x%08x] subc %d mthd 0x%04x data 0x%08x\n",</div><div class='add'>+			chid, inst, subc, mthd, data);</div><div class='add'>+		nv_wr32(dev, 0x087004, 0x00000040);</div><div class='add'>+		stat &amp;= ~0x00000040;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stat) {</div><div class='add'>+		NV_INFO(dev, "PCRYPT: unhandled intr 0x%08x\n", stat);</div><div class='add'>+		nv_wr32(dev, 0x087004, stat);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv50_fb_vm_trap(dev, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> nv98_crypt_destroy(struct drm_device *dev, int engine)</div><div class='ctx'> {</div><div class='del'>-	struct nv98_crypt_engine *pcrypt = nv_engine(dev, engine);</div><div class='add'>+	struct nv98_crypt_priv *priv = nv_engine(dev, engine);</div><div class='ctx'> </div><div class='add'>+	nouveau_irq_unregister(dev, 14);</div><div class='ctx'> 	NVOBJ_ENGINE_DEL(dev, CRYPT);</div><div class='del'>-</div><div class='del'>-	kfree(pcrypt);</div><div class='add'>+	kfree(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='ctx'> nv98_crypt_create(struct drm_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct nv98_crypt_engine *pcrypt;</div><div class='add'>+	struct nv98_crypt_priv *priv;</div><div class='ctx'> </div><div class='del'>-	pcrypt = kzalloc(sizeof(*pcrypt), GFP_KERNEL);</div><div class='del'>-	if (!pcrypt)</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	pcrypt-&gt;base.destroy = nv98_crypt_destroy;</div><div class='del'>-	pcrypt-&gt;base.init = nv98_crypt_init;</div><div class='del'>-	pcrypt-&gt;base.fini = nv98_crypt_fini;</div><div class='add'>+	priv-&gt;base.destroy = nv98_crypt_destroy;</div><div class='add'>+	priv-&gt;base.init = nv98_crypt_init;</div><div class='add'>+	priv-&gt;base.fini = nv98_crypt_fini;</div><div class='add'>+	priv-&gt;base.context_new = nv98_crypt_context_new;</div><div class='add'>+	priv-&gt;base.context_del = nv98_crypt_context_del;</div><div class='add'>+	priv-&gt;base.object_new = nv98_crypt_object_new;</div><div class='add'>+	priv-&gt;base.tlb_flush = nv98_crypt_tlb_flush;</div><div class='add'>+</div><div class='add'>+	nouveau_irq_register(dev, 14, nv98_crypt_isr);</div><div class='ctx'> </div><div class='del'>-	NVOBJ_ENGINE_ADD(dev, CRYPT, &amp;pcrypt-&gt;base);</div><div class='add'>+	NVOBJ_ENGINE_ADD(dev, CRYPT, &amp;priv-&gt;base);</div><div class='add'>+	NVOBJ_CLASS(dev, 0x88b4, CRYPT);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv98_crypt.fuc b/drivers/gpu/drm/nouveau/nv98_crypt.fuc<br/>new file mode 100644<br/>index 000000000000..7393813044de<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv98_crypt.fuc?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv98_crypt.fuc</a></div><div class='hunk'>@@ -0,0 +1,698 @@</div><div class='add'>+/*</div><div class='add'>+ *  fuc microcode for nv98 pcrypt engine</div><div class='add'>+ *  Copyright (C) 2010  Marcin Kościelnicki</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *  it under the terms of the GNU General Public License as published by</div><div class='add'>+ *  the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *  (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *  This program is distributed in the hope that it will be useful,</div><div class='add'>+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *  GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *  You should have received a copy of the GNU General Public License</div><div class='add'>+ *  along with this program; if not, write to the Free Software</div><div class='add'>+ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+.section #nv98_pcrypt_data</div><div class='add'>+</div><div class='add'>+ctx_dma:</div><div class='add'>+ctx_dma_query:		.b32 0</div><div class='add'>+ctx_dma_src:		.b32 0</div><div class='add'>+ctx_dma_dst:		.b32 0</div><div class='add'>+.equ #dma_count 3</div><div class='add'>+ctx_query_address_high:	.b32 0</div><div class='add'>+ctx_query_address_low:	.b32 0</div><div class='add'>+ctx_query_counter:	.b32 0</div><div class='add'>+ctx_cond_address_high:	.b32 0</div><div class='add'>+ctx_cond_address_low:	.b32 0</div><div class='add'>+ctx_cond_off:		.b32 0</div><div class='add'>+ctx_src_address_high:	.b32 0</div><div class='add'>+ctx_src_address_low:	.b32 0</div><div class='add'>+ctx_dst_address_high:	.b32 0</div><div class='add'>+ctx_dst_address_low:	.b32 0</div><div class='add'>+ctx_mode:		.b32 0</div><div class='add'>+.align 16</div><div class='add'>+ctx_key:		.skip 16</div><div class='add'>+ctx_iv:			.skip 16</div><div class='add'>+</div><div class='add'>+.align 0x80</div><div class='add'>+swap:</div><div class='add'>+.skip 32</div><div class='add'>+</div><div class='add'>+.align 8</div><div class='add'>+common_cmd_dtable:</div><div class='add'>+.b32 #ctx_query_address_high + 0x20000 ~0xff</div><div class='add'>+.b32 #ctx_query_address_low + 0x20000 ~0xfffffff0</div><div class='add'>+.b32 #ctx_query_counter + 0x20000 ~0xffffffff</div><div class='add'>+.b32 #cmd_query_get + 0x00000 ~1</div><div class='add'>+.b32 #ctx_cond_address_high + 0x20000 ~0xff</div><div class='add'>+.b32 #ctx_cond_address_low + 0x20000 ~0xfffffff0</div><div class='add'>+.b32 #cmd_cond_mode + 0x00000 ~7</div><div class='add'>+.b32 #cmd_wrcache_flush + 0x00000 ~0</div><div class='add'>+.equ #common_cmd_max 0x88</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+.align 8</div><div class='add'>+engine_cmd_dtable:</div><div class='add'>+.b32 #ctx_key + 0x0 + 0x20000 ~0xffffffff</div><div class='add'>+.b32 #ctx_key + 0x4 + 0x20000 ~0xffffffff</div><div class='add'>+.b32 #ctx_key + 0x8 + 0x20000 ~0xffffffff</div><div class='add'>+.b32 #ctx_key + 0xc + 0x20000 ~0xffffffff</div><div class='add'>+.b32 #ctx_iv + 0x0 + 0x20000 ~0xffffffff</div><div class='add'>+.b32 #ctx_iv + 0x4 + 0x20000 ~0xffffffff</div><div class='add'>+.b32 #ctx_iv + 0x8 + 0x20000 ~0xffffffff</div><div class='add'>+.b32 #ctx_iv + 0xc + 0x20000 ~0xffffffff</div><div class='add'>+.b32 #ctx_src_address_high + 0x20000 ~0xff</div><div class='add'>+.b32 #ctx_src_address_low + 0x20000 ~0xfffffff0</div><div class='add'>+.b32 #ctx_dst_address_high + 0x20000 ~0xff</div><div class='add'>+.b32 #ctx_dst_address_low + 0x20000 ~0xfffffff0</div><div class='add'>+.b32 #crypt_cmd_mode + 0x00000 ~0xf</div><div class='add'>+.b32 #crypt_cmd_length + 0x10000 ~0x0ffffff0</div><div class='add'>+.equ #engine_cmd_max 0xce</div><div class='add'>+</div><div class='add'>+.align 4</div><div class='add'>+crypt_dtable:</div><div class='add'>+.b16 #crypt_copy_prep #crypt_do_inout</div><div class='add'>+.b16 #crypt_store_prep #crypt_do_out</div><div class='add'>+.b16 #crypt_ecb_e_prep #crypt_do_inout</div><div class='add'>+.b16 #crypt_ecb_d_prep #crypt_do_inout</div><div class='add'>+.b16 #crypt_cbc_e_prep #crypt_do_inout</div><div class='add'>+.b16 #crypt_cbc_d_prep #crypt_do_inout</div><div class='add'>+.b16 #crypt_pcbc_e_prep #crypt_do_inout</div><div class='add'>+.b16 #crypt_pcbc_d_prep #crypt_do_inout</div><div class='add'>+.b16 #crypt_cfb_e_prep #crypt_do_inout</div><div class='add'>+.b16 #crypt_cfb_d_prep #crypt_do_inout</div><div class='add'>+.b16 #crypt_ofb_prep #crypt_do_inout</div><div class='add'>+.b16 #crypt_ctr_prep #crypt_do_inout</div><div class='add'>+.b16 #crypt_cbc_mac_prep #crypt_do_in</div><div class='add'>+.b16 #crypt_cmac_finish_complete_prep #crypt_do_in</div><div class='add'>+.b16 #crypt_cmac_finish_partial_prep #crypt_do_in</div><div class='add'>+</div><div class='add'>+.align 0x100</div><div class='add'>+</div><div class='add'>+.section #nv98_pcrypt_code</div><div class='add'>+</div><div class='add'>+	// $r0 is always set to 0 in our code - this allows some space savings.</div><div class='add'>+	clear b32 $r0</div><div class='add'>+</div><div class='add'>+	// set up the interrupt handler</div><div class='add'>+	mov $r1 #ih</div><div class='add'>+	mov $iv0 $r1</div><div class='add'>+</div><div class='add'>+	// init stack pointer</div><div class='add'>+	mov $sp $r0</div><div class='add'>+</div><div class='add'>+	// set interrupt dispatch - route timer, fifo, ctxswitch to i0, others to host</div><div class='add'>+	movw $r1 0xfff0</div><div class='add'>+	sethi $r1 0</div><div class='add'>+	mov $r2 0x400</div><div class='add'>+	iowr I[$r2 + 0x300] $r1</div><div class='add'>+</div><div class='add'>+	// enable the interrupts</div><div class='add'>+	or $r1 0xc</div><div class='add'>+	iowr I[$r2] $r1</div><div class='add'>+</div><div class='add'>+	// enable fifo access and context switching</div><div class='add'>+	mov $r1 3</div><div class='add'>+	mov $r2 0x1200</div><div class='add'>+	iowr I[$r2] $r1</div><div class='add'>+</div><div class='add'>+	// enable i0 delivery</div><div class='add'>+	bset $flags ie0</div><div class='add'>+</div><div class='add'>+	// sleep forver, waking only for interrupts.</div><div class='add'>+	bset $flags $p0</div><div class='add'>+	spin:</div><div class='add'>+	sleep $p0</div><div class='add'>+	bra #spin</div><div class='add'>+</div><div class='add'>+// i0 handler</div><div class='add'>+ih:</div><div class='add'>+	// see which interrupts we got</div><div class='add'>+	iord $r1 I[$r0 + 0x200]</div><div class='add'>+</div><div class='add'>+	and $r2 $r1 0x8</div><div class='add'>+	cmpu b32 $r2 0</div><div class='add'>+	bra e #noctx</div><div class='add'>+</div><div class='add'>+		// context switch... prepare the regs for xfer</div><div class='add'>+		mov $r2 0x7700</div><div class='add'>+		mov $xtargets $r2</div><div class='add'>+		mov $xdbase $r0</div><div class='add'>+		// 128-byte context.</div><div class='add'>+		mov $r2 0</div><div class='add'>+		sethi $r2 0x50000</div><div class='add'>+</div><div class='add'>+		// read current channel</div><div class='add'>+		mov $r3 0x1400</div><div class='add'>+		iord $r4 I[$r3]</div><div class='add'>+		// if bit 30 set, it's active, so we have to unload it first.</div><div class='add'>+		shl b32 $r5 $r4 1</div><div class='add'>+		cmps b32 $r5 0</div><div class='add'>+		bra nc #ctxload</div><div class='add'>+</div><div class='add'>+			// unload the current channel - save the context</div><div class='add'>+			xdst $r0 $r2</div><div class='add'>+			xdwait</div><div class='add'>+			// and clear bit 30, then write back</div><div class='add'>+			bclr $r4 0x1e</div><div class='add'>+			iowr I[$r3] $r4</div><div class='add'>+			// tell PFIFO we unloaded</div><div class='add'>+			mov $r4 1</div><div class='add'>+			iowr I[$r3 + 0x200] $r4</div><div class='add'>+</div><div class='add'>+		bra #noctx</div><div class='add'>+</div><div class='add'>+		ctxload:</div><div class='add'>+			// no channel loaded - perhaps we're requested to load one</div><div class='add'>+			iord $r4 I[$r3 + 0x100]</div><div class='add'>+			shl b32 $r15 $r4 1</div><div class='add'>+			cmps b32 $r15 0</div><div class='add'>+			// if bit 30 of next channel not set, probably PFIFO is just</div><div class='add'>+			// killing a context. do a faux load, without the active bit.</div><div class='add'>+			bra nc #dummyload</div><div class='add'>+</div><div class='add'>+				// ok, do a real context load.</div><div class='add'>+				xdld $r0 $r2</div><div class='add'>+				xdwait</div><div class='add'>+				mov $r5 #ctx_dma</div><div class='add'>+				mov $r6 #dma_count - 1</div><div class='add'>+				ctxload_dma_loop:</div><div class='add'>+					ld b32 $r7 D[$r5 + $r6 * 4]</div><div class='add'>+					add b32 $r8 $r6 0x180</div><div class='add'>+					shl b32 $r8 8</div><div class='add'>+					iowr I[$r8] $r7</div><div class='add'>+					sub b32 $r6 1</div><div class='add'>+				bra nc #ctxload_dma_loop</div><div class='add'>+</div><div class='add'>+			dummyload:</div><div class='add'>+			// tell PFIFO we're done</div><div class='add'>+			mov $r5 2</div><div class='add'>+			iowr I[$r3 + 0x200] $r5</div><div class='add'>+</div><div class='add'>+	noctx:</div><div class='add'>+	and $r2 $r1 0x4</div><div class='add'>+	cmpu b32 $r2 0</div><div class='add'>+	bra e #nocmd</div><div class='add'>+</div><div class='add'>+		// incoming fifo command.</div><div class='add'>+		mov $r3 0x1900</div><div class='add'>+		iord $r2 I[$r3 + 0x100]</div><div class='add'>+		iord $r3 I[$r3]</div><div class='add'>+		// extract the method</div><div class='add'>+		and $r4 $r2 0x7ff</div><div class='add'>+		// shift the addr to proper position if we need to interrupt later</div><div class='add'>+		shl b32 $r2 0x10</div><div class='add'>+</div><div class='add'>+		// mthd 0 and 0x100 [NAME, NOP]: ignore</div><div class='add'>+		and $r5 $r4 0x7bf</div><div class='add'>+		cmpu b32 $r5 0</div><div class='add'>+		bra e #cmddone</div><div class='add'>+</div><div class='add'>+		mov $r5 #engine_cmd_dtable - 0xc0 * 8</div><div class='add'>+		mov $r6 #engine_cmd_max</div><div class='add'>+		cmpu b32 $r4 0xc0</div><div class='add'>+		bra nc #dtable_cmd</div><div class='add'>+		mov $r5 #common_cmd_dtable - 0x80 * 8</div><div class='add'>+		mov $r6 #common_cmd_max</div><div class='add'>+		cmpu b32 $r4 0x80</div><div class='add'>+		bra nc #dtable_cmd</div><div class='add'>+		cmpu b32 $r4 0x60</div><div class='add'>+		bra nc #dma_cmd</div><div class='add'>+		cmpu b32 $r4 0x50</div><div class='add'>+		bra ne #illegal_mthd</div><div class='add'>+</div><div class='add'>+			// mthd 0x140: PM_TRIGGER</div><div class='add'>+			mov $r2 0x2200</div><div class='add'>+			clear b32 $r3</div><div class='add'>+			sethi $r3 0x20000</div><div class='add'>+			iowr I[$r2] $r3</div><div class='add'>+			bra #cmddone</div><div class='add'>+</div><div class='add'>+		dma_cmd:</div><div class='add'>+			// mthd 0x180...: DMA_*</div><div class='add'>+			cmpu b32 $r4 0x60+#dma_count</div><div class='add'>+			bra nc #illegal_mthd</div><div class='add'>+			shl b32 $r5 $r4 2</div><div class='add'>+			add b32 $r5 (#ctx_dma - 0x60 * 4) &amp; 0xffff</div><div class='add'>+			bset $r3 0x1e</div><div class='add'>+			st b32 D[$r5] $r3</div><div class='add'>+			add b32 $r4 0x180 - 0x60</div><div class='add'>+			shl b32 $r4 8</div><div class='add'>+			iowr I[$r4] $r3</div><div class='add'>+			bra #cmddone</div><div class='add'>+</div><div class='add'>+		dtable_cmd:</div><div class='add'>+			cmpu b32 $r4 $r6</div><div class='add'>+			bra nc #illegal_mthd</div><div class='add'>+			shl b32 $r4 3</div><div class='add'>+			add b32 $r4 $r5</div><div class='add'>+			ld b32 $r5 D[$r4 + 4]</div><div class='add'>+			and $r5 $r3</div><div class='add'>+			cmpu b32 $r5 0</div><div class='add'>+			bra ne #invalid_bitfield</div><div class='add'>+			ld b16 $r5 D[$r4]</div><div class='add'>+			ld b16 $r6 D[$r4 + 2]</div><div class='add'>+			cmpu b32 $r6 2</div><div class='add'>+			bra e #cmd_setctx</div><div class='add'>+			ld b32 $r7 D[$r0 + #ctx_cond_off]</div><div class='add'>+			and $r6 $r7</div><div class='add'>+			cmpu b32 $r6 1</div><div class='add'>+			bra e #cmddone</div><div class='add'>+			call $r5</div><div class='add'>+			bra $p1 #dispatch_error</div><div class='add'>+			bra #cmddone</div><div class='add'>+</div><div class='add'>+		cmd_setctx:</div><div class='add'>+			st b32 D[$r5] $r3</div><div class='add'>+			bra #cmddone</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		invalid_bitfield:</div><div class='add'>+			or $r2 1</div><div class='add'>+		dispatch_error:</div><div class='add'>+		illegal_mthd:</div><div class='add'>+			mov $r4 0x1000</div><div class='add'>+			iowr I[$r4] $r2</div><div class='add'>+			iowr I[$r4 + 0x100] $r3</div><div class='add'>+			mov $r4 0x40</div><div class='add'>+			iowr I[$r0] $r4</div><div class='add'>+</div><div class='add'>+			im_loop:</div><div class='add'>+				iord $r4 I[$r0 + 0x200]</div><div class='add'>+				and $r4 0x40</div><div class='add'>+				cmpu b32 $r4 0</div><div class='add'>+			bra ne #im_loop</div><div class='add'>+</div><div class='add'>+		cmddone:</div><div class='add'>+		// remove the command from FIFO</div><div class='add'>+		mov $r3 0x1d00</div><div class='add'>+		mov $r4 1</div><div class='add'>+		iowr I[$r3] $r4</div><div class='add'>+</div><div class='add'>+	nocmd:</div><div class='add'>+	// ack the processed interrupts</div><div class='add'>+	and $r1 $r1 0xc</div><div class='add'>+	iowr I[$r0 + 0x100] $r1</div><div class='add'>+iret</div><div class='add'>+</div><div class='add'>+cmd_query_get:</div><div class='add'>+	// if bit 0 of param set, trigger interrupt afterwards.</div><div class='add'>+	setp $p1 $r3</div><div class='add'>+	or $r2 3</div><div class='add'>+</div><div class='add'>+	// read PTIMER, beware of races...</div><div class='add'>+	mov $r4 0xb00</div><div class='add'>+	ptimer_retry:</div><div class='add'>+		iord $r6 I[$r4 + 0x100]</div><div class='add'>+		iord $r5 I[$r4]</div><div class='add'>+		iord $r7 I[$r4 + 0x100]</div><div class='add'>+		cmpu b32 $r6 $r7</div><div class='add'>+	bra ne #ptimer_retry</div><div class='add'>+</div><div class='add'>+	// prepare the query structure</div><div class='add'>+	ld b32 $r4 D[$r0 + #ctx_query_counter]</div><div class='add'>+	st b32 D[$r0 + #swap + 0x0] $r4</div><div class='add'>+	st b32 D[$r0 + #swap + 0x4] $r0</div><div class='add'>+	st b32 D[$r0 + #swap + 0x8] $r5</div><div class='add'>+	st b32 D[$r0 + #swap + 0xc] $r6</div><div class='add'>+</div><div class='add'>+	// will use target 0, DMA_QUERY.</div><div class='add'>+	mov $xtargets $r0</div><div class='add'>+</div><div class='add'>+	ld b32 $r4 D[$r0 + #ctx_query_address_high]</div><div class='add'>+	shl b32 $r4 0x18</div><div class='add'>+	mov $xdbase $r4</div><div class='add'>+</div><div class='add'>+	ld b32 $r4 D[$r0 + #ctx_query_address_low]</div><div class='add'>+	mov $r5 #swap</div><div class='add'>+	sethi $r5 0x20000</div><div class='add'>+	xdst $r4 $r5</div><div class='add'>+	xdwait</div><div class='add'>+</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+cmd_cond_mode:</div><div class='add'>+	// if &gt;= 5, INVALID_ENUM</div><div class='add'>+	bset $flags $p1</div><div class='add'>+	or $r2 2</div><div class='add'>+	cmpu b32 $r3 5</div><div class='add'>+	bra nc #return</div><div class='add'>+</div><div class='add'>+	// otherwise, no error.</div><div class='add'>+	bclr $flags $p1</div><div class='add'>+</div><div class='add'>+	// if &lt; 2, no QUERY object is involved</div><div class='add'>+	cmpu b32 $r3 2</div><div class='add'>+	bra nc #cmd_cond_mode_queryful</div><div class='add'>+</div><div class='add'>+		xor $r3 1</div><div class='add'>+		st b32 D[$r0 + #ctx_cond_off] $r3</div><div class='add'>+	return:</div><div class='add'>+		ret</div><div class='add'>+</div><div class='add'>+	cmd_cond_mode_queryful:</div><div class='add'>+	// ok, will need to pull a QUERY object, prepare offsets</div><div class='add'>+	ld b32 $r4 D[$r0 + #ctx_cond_address_high]</div><div class='add'>+	ld b32 $r5 D[$r0 + #ctx_cond_address_low]</div><div class='add'>+	and $r6 $r5 0xff</div><div class='add'>+	shr b32 $r5 8</div><div class='add'>+	shl b32 $r4 0x18</div><div class='add'>+	or $r4 $r5</div><div class='add'>+	mov $xdbase $r4</div><div class='add'>+	mov $xtargets $r0</div><div class='add'>+</div><div class='add'>+	// pull the first one</div><div class='add'>+	mov $r5 #swap</div><div class='add'>+	sethi $r5 0x20000</div><div class='add'>+	xdld $r6 $r5</div><div class='add'>+</div><div class='add'>+	// if == 2, only a single QUERY is involved...</div><div class='add'>+	cmpu b32 $r3 2</div><div class='add'>+	bra ne #cmd_cond_mode_double</div><div class='add'>+</div><div class='add'>+		xdwait</div><div class='add'>+		ld b32 $r4 D[$r0 + #swap + 4]</div><div class='add'>+		cmpu b32 $r4 0</div><div class='add'>+		xbit $r4 $flags z</div><div class='add'>+		st b32 D[$r0 + #ctx_cond_off] $r4</div><div class='add'>+		ret</div><div class='add'>+</div><div class='add'>+	// ok, we'll need to pull second one too</div><div class='add'>+	cmd_cond_mode_double:</div><div class='add'>+	add b32 $r6 0x10</div><div class='add'>+	add b32 $r5 0x10</div><div class='add'>+	xdld $r6 $r5</div><div class='add'>+	xdwait</div><div class='add'>+</div><div class='add'>+	// compare COUNTERs</div><div class='add'>+	ld b32 $r5 D[$r0 + #swap + 0x00]</div><div class='add'>+	ld b32 $r6 D[$r0 + #swap + 0x10]</div><div class='add'>+	cmpu b32 $r5 $r6</div><div class='add'>+	xbit $r4 $flags z</div><div class='add'>+</div><div class='add'>+	// compare RESen</div><div class='add'>+	ld b32 $r5 D[$r0 + #swap + 0x04]</div><div class='add'>+	ld b32 $r6 D[$r0 + #swap + 0x14]</div><div class='add'>+	cmpu b32 $r5 $r6</div><div class='add'>+	xbit $r5 $flags z</div><div class='add'>+	and $r4 $r5</div><div class='add'>+</div><div class='add'>+	// and negate or not, depending on mode</div><div class='add'>+	cmpu b32 $r3 3</div><div class='add'>+	xbit $r5 $flags z</div><div class='add'>+	xor $r4 $r5</div><div class='add'>+	st b32 D[$r0 + #ctx_cond_off] $r4</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+cmd_wrcache_flush:</div><div class='add'>+	bclr $flags $p1</div><div class='add'>+	mov $r2 0x2200</div><div class='add'>+	clear b32 $r3</div><div class='add'>+	sethi $r3 0x10000</div><div class='add'>+	iowr I[$r2] $r3</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_cmd_mode:</div><div class='add'>+	// if &gt;= 0xf, INVALID_ENUM</div><div class='add'>+	bset $flags $p1</div><div class='add'>+	or $r2 2</div><div class='add'>+	cmpu b32 $r3 0xf</div><div class='add'>+	bra nc #crypt_cmd_mode_return</div><div class='add'>+</div><div class='add'>+		bclr $flags $p1</div><div class='add'>+		st b32 D[$r0 + #ctx_mode] $r3</div><div class='add'>+</div><div class='add'>+	crypt_cmd_mode_return:</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_cmd_length:</div><div class='add'>+	// nop if length == 0</div><div class='add'>+	cmpu b32 $r3 0</div><div class='add'>+	bra e #crypt_cmd_mode_return</div><div class='add'>+</div><div class='add'>+	// init key, IV</div><div class='add'>+	cxset 3</div><div class='add'>+	mov $r4 #ctx_key</div><div class='add'>+	sethi $r4 0x70000</div><div class='add'>+	xdst $r0 $r4</div><div class='add'>+	mov $r4 #ctx_iv</div><div class='add'>+	sethi $r4 0x60000</div><div class='add'>+	xdst $r0 $r4</div><div class='add'>+	xdwait</div><div class='add'>+	ckeyreg $c7</div><div class='add'>+</div><div class='add'>+	// prepare the targets</div><div class='add'>+	mov $r4 0x2100</div><div class='add'>+	mov $xtargets $r4</div><div class='add'>+</div><div class='add'>+	// prepare src address</div><div class='add'>+	ld b32 $r4 D[$r0 + #ctx_src_address_high]</div><div class='add'>+	ld b32 $r5 D[$r0 + #ctx_src_address_low]</div><div class='add'>+	shr b32 $r8 $r5 8</div><div class='add'>+	shl b32 $r4 0x18</div><div class='add'>+	or $r4 $r8</div><div class='add'>+	and $r5 $r5 0xff</div><div class='add'>+</div><div class='add'>+	// prepare dst address</div><div class='add'>+	ld b32 $r6 D[$r0 + #ctx_dst_address_high]</div><div class='add'>+	ld b32 $r7 D[$r0 + #ctx_dst_address_low]</div><div class='add'>+	shr b32 $r8 $r7 8</div><div class='add'>+	shl b32 $r6 0x18</div><div class='add'>+	or $r6 $r8</div><div class='add'>+	and $r7 $r7 0xff</div><div class='add'>+</div><div class='add'>+	// find the proper prep &amp; do functions</div><div class='add'>+	ld b32 $r8 D[$r0 + #ctx_mode]</div><div class='add'>+	shl b32 $r8 2</div><div class='add'>+</div><div class='add'>+	// run prep</div><div class='add'>+	ld b16 $r9 D[$r8 + #crypt_dtable]</div><div class='add'>+	call $r9</div><div class='add'>+</div><div class='add'>+	// do it</div><div class='add'>+	ld b16 $r9 D[$r8 + #crypt_dtable + 2]</div><div class='add'>+	call $r9</div><div class='add'>+	cxset 1</div><div class='add'>+	xdwait</div><div class='add'>+	cxset 0x61</div><div class='add'>+	xdwait</div><div class='add'>+	xdwait</div><div class='add'>+</div><div class='add'>+	// update src address</div><div class='add'>+	shr b32 $r8 $r4 0x18</div><div class='add'>+	shl b32 $r9 $r4 8</div><div class='add'>+	add b32 $r9 $r5</div><div class='add'>+	adc b32 $r8 0</div><div class='add'>+	st b32 D[$r0 + #ctx_src_address_high] $r8</div><div class='add'>+	st b32 D[$r0 + #ctx_src_address_low] $r9</div><div class='add'>+</div><div class='add'>+	// update dst address</div><div class='add'>+	shr b32 $r8 $r6 0x18</div><div class='add'>+	shl b32 $r9 $r6 8</div><div class='add'>+	add b32 $r9 $r7</div><div class='add'>+	adc b32 $r8 0</div><div class='add'>+	st b32 D[$r0 + #ctx_dst_address_high] $r8</div><div class='add'>+	st b32 D[$r0 + #ctx_dst_address_low] $r9</div><div class='add'>+</div><div class='add'>+	// pull updated IV</div><div class='add'>+	cxset 2</div><div class='add'>+	mov $r4 #ctx_iv</div><div class='add'>+	sethi $r4 0x60000</div><div class='add'>+	xdld $r0 $r4</div><div class='add'>+	xdwait</div><div class='add'>+</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+crypt_copy_prep:</div><div class='add'>+	cs0begin 2</div><div class='add'>+		cxsin $c0</div><div class='add'>+		cxsout $c0</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_store_prep:</div><div class='add'>+	cs0begin 1</div><div class='add'>+		cxsout $c6</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_ecb_e_prep:</div><div class='add'>+	cs0begin 3</div><div class='add'>+		cxsin $c0</div><div class='add'>+		cenc $c0 $c0</div><div class='add'>+		cxsout $c0</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_ecb_d_prep:</div><div class='add'>+	ckexp $c7 $c7</div><div class='add'>+	cs0begin 3</div><div class='add'>+		cxsin $c0</div><div class='add'>+		cdec $c0 $c0</div><div class='add'>+		cxsout $c0</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_cbc_e_prep:</div><div class='add'>+	cs0begin 4</div><div class='add'>+		cxsin $c0</div><div class='add'>+		cxor $c6 $c0</div><div class='add'>+		cenc $c6 $c6</div><div class='add'>+		cxsout $c6</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_cbc_d_prep:</div><div class='add'>+	ckexp $c7 $c7</div><div class='add'>+	cs0begin 5</div><div class='add'>+		cmov $c2 $c6</div><div class='add'>+		cxsin $c6</div><div class='add'>+		cdec $c0 $c6</div><div class='add'>+		cxor $c0 $c2</div><div class='add'>+		cxsout $c0</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_pcbc_e_prep:</div><div class='add'>+	cs0begin 5</div><div class='add'>+		cxsin $c0</div><div class='add'>+		cxor $c6 $c0</div><div class='add'>+		cenc $c6 $c6</div><div class='add'>+		cxsout $c6</div><div class='add'>+		cxor $c6 $c0</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_pcbc_d_prep:</div><div class='add'>+	ckexp $c7 $c7</div><div class='add'>+	cs0begin 5</div><div class='add'>+		cxsin $c0</div><div class='add'>+		cdec $c1 $c0</div><div class='add'>+		cxor $c6 $c1</div><div class='add'>+		cxsout $c6</div><div class='add'>+		cxor $c6 $c0</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_cfb_e_prep:</div><div class='add'>+	cs0begin 4</div><div class='add'>+		cenc $c6 $c6</div><div class='add'>+		cxsin $c0</div><div class='add'>+		cxor $c6 $c0</div><div class='add'>+		cxsout $c6</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_cfb_d_prep:</div><div class='add'>+	cs0begin 4</div><div class='add'>+		cenc $c0 $c6</div><div class='add'>+		cxsin $c6</div><div class='add'>+		cxor $c0 $c6</div><div class='add'>+		cxsout $c0</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_ofb_prep:</div><div class='add'>+	cs0begin 4</div><div class='add'>+		cenc $c6 $c6</div><div class='add'>+		cxsin $c0</div><div class='add'>+		cxor $c0 $c6</div><div class='add'>+		cxsout $c0</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_ctr_prep:</div><div class='add'>+	cs0begin 5</div><div class='add'>+		cenc $c1 $c6</div><div class='add'>+		cadd $c6 1</div><div class='add'>+		cxsin $c0</div><div class='add'>+		cxor $c0 $c1</div><div class='add'>+		cxsout $c0</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_cbc_mac_prep:</div><div class='add'>+	cs0begin 3</div><div class='add'>+		cxsin $c0</div><div class='add'>+		cxor $c6 $c0</div><div class='add'>+		cenc $c6 $c6</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_cmac_finish_complete_prep:</div><div class='add'>+	cs0begin 7</div><div class='add'>+		cxsin $c0</div><div class='add'>+		cxor $c6 $c0</div><div class='add'>+		cxor $c0 $c0</div><div class='add'>+		cenc $c0 $c0</div><div class='add'>+		cprecmac $c0 $c0</div><div class='add'>+		cxor $c6 $c0</div><div class='add'>+		cenc $c6 $c6</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_cmac_finish_partial_prep:</div><div class='add'>+	cs0begin 8</div><div class='add'>+		cxsin $c0</div><div class='add'>+		cxor $c6 $c0</div><div class='add'>+		cxor $c0 $c0</div><div class='add'>+		cenc $c0 $c0</div><div class='add'>+		cprecmac $c0 $c0</div><div class='add'>+		cprecmac $c0 $c0</div><div class='add'>+		cxor $c6 $c0</div><div class='add'>+		cenc $c6 $c6</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+// TODO</div><div class='add'>+crypt_do_in:</div><div class='add'>+	add b32 $r3 $r5</div><div class='add'>+	mov $xdbase $r4</div><div class='add'>+	mov $r9 #swap</div><div class='add'>+	sethi $r9 0x20000</div><div class='add'>+	crypt_do_in_loop:</div><div class='add'>+		xdld $r5 $r9</div><div class='add'>+		xdwait</div><div class='add'>+		cxset 0x22</div><div class='add'>+		xdst $r0 $r9</div><div class='add'>+		cs0exec 1</div><div class='add'>+		xdwait</div><div class='add'>+		add b32 $r5 0x10</div><div class='add'>+		cmpu b32 $r5 $r3</div><div class='add'>+	bra ne #crypt_do_in_loop</div><div class='add'>+	cxset 1</div><div class='add'>+	xdwait</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_do_out:</div><div class='add'>+	add b32 $r3 $r7</div><div class='add'>+	mov $xdbase $r6</div><div class='add'>+	mov $r9 #swap</div><div class='add'>+	sethi $r9 0x20000</div><div class='add'>+	crypt_do_out_loop:</div><div class='add'>+		cs0exec 1</div><div class='add'>+		cxset 0x61</div><div class='add'>+		xdld $r7 $r9</div><div class='add'>+		xdst $r7 $r9</div><div class='add'>+		cxset 1</div><div class='add'>+		xdwait</div><div class='add'>+		add b32 $r7 0x10</div><div class='add'>+		cmpu b32 $r7 $r3</div><div class='add'>+	bra ne #crypt_do_out_loop</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+crypt_do_inout:</div><div class='add'>+	add b32 $r3 $r5</div><div class='add'>+	mov $r9 #swap</div><div class='add'>+	sethi $r9 0x20000</div><div class='add'>+	crypt_do_inout_loop:</div><div class='add'>+		mov $xdbase $r4</div><div class='add'>+		xdld $r5 $r9</div><div class='add'>+		xdwait</div><div class='add'>+		cxset 0x21</div><div class='add'>+		xdst $r0 $r9</div><div class='add'>+		cs0exec 1</div><div class='add'>+		cxset 0x61</div><div class='add'>+		mov $xdbase $r6</div><div class='add'>+		xdld $r7 $r9</div><div class='add'>+		xdst $r7 $r9</div><div class='add'>+		cxset 1</div><div class='add'>+		xdwait</div><div class='add'>+		add b32 $r5 0x10</div><div class='add'>+		add b32 $r7 0x10</div><div class='add'>+		cmpu b32 $r5 $r3</div><div class='add'>+	bra ne #crypt_do_inout_loop</div><div class='add'>+	ret</div><div class='add'>+</div><div class='add'>+.align 0x100</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nv98_crypt.fuc.h b/drivers/gpu/drm/nouveau/nv98_crypt.fuc.h<br/>new file mode 100644<br/>index 000000000000..38676c74e6e0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nv98_crypt.fuc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nv98_crypt.fuc.h</a></div><div class='hunk'>@@ -0,0 +1,584 @@</div><div class='add'>+uint32_t nv98_pcrypt_data[] = {</div><div class='add'>+/* 0x0000: ctx_dma */</div><div class='add'>+/* 0x0000: ctx_dma_query */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0004: ctx_dma_src */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0008: ctx_dma_dst */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x000c: ctx_query_address_high */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0010: ctx_query_address_low */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0014: ctx_query_counter */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0018: ctx_cond_address_high */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x001c: ctx_cond_address_low */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0020: ctx_cond_off */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0024: ctx_src_address_high */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0028: ctx_src_address_low */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x002c: ctx_dst_address_high */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0030: ctx_dst_address_low */</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0034: ctx_mode */</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0040: ctx_key */</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0050: ctx_iv */</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x0080: swap */</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+/* 0x00a0: common_cmd_dtable */</div><div class='add'>+	0x0002000c,</div><div class='add'>+	0xffffff00,</div><div class='add'>+	0x00020010,</div><div class='add'>+	0x0000000f,</div><div class='add'>+	0x00020014,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000192,</div><div class='add'>+	0xfffffffe,</div><div class='add'>+	0x00020018,</div><div class='add'>+	0xffffff00,</div><div class='add'>+	0x0002001c,</div><div class='add'>+	0x0000000f,</div><div class='add'>+	0x000001d7,</div><div class='add'>+	0xfffffff8,</div><div class='add'>+	0x00000260,</div><div class='add'>+	0xffffffff,</div><div class='add'>+/* 0x00e0: engine_cmd_dtable */</div><div class='add'>+	0x00020040,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00020044,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00020048,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x0002004c,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00020050,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00020054,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00020058,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x0002005c,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00020024,</div><div class='add'>+	0xffffff00,</div><div class='add'>+	0x00020028,</div><div class='add'>+	0x0000000f,</div><div class='add'>+	0x0002002c,</div><div class='add'>+	0xffffff00,</div><div class='add'>+	0x00020030,</div><div class='add'>+	0x0000000f,</div><div class='add'>+	0x00000271,</div><div class='add'>+	0xfffffff0,</div><div class='add'>+	0x00010285,</div><div class='add'>+	0xf000000f,</div><div class='add'>+/* 0x0150: crypt_dtable */</div><div class='add'>+	0x04db0321,</div><div class='add'>+	0x04b1032f,</div><div class='add'>+	0x04db0339,</div><div class='add'>+	0x04db034b,</div><div class='add'>+	0x04db0361,</div><div class='add'>+	0x04db0377,</div><div class='add'>+	0x04db0395,</div><div class='add'>+	0x04db03af,</div><div class='add'>+	0x04db03cd,</div><div class='add'>+	0x04db03e3,</div><div class='add'>+	0x04db03f9,</div><div class='add'>+	0x04db040f,</div><div class='add'>+	0x04830429,</div><div class='add'>+	0x0483043b,</div><div class='add'>+	0x0483045d,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+uint32_t nv98_pcrypt_code[] = {</div><div class='add'>+	0x17f004bd,</div><div class='add'>+	0x0010fe35,</div><div class='add'>+	0xf10004fe,</div><div class='add'>+	0xf0fff017,</div><div class='add'>+	0x27f10013,</div><div class='add'>+	0x21d00400,</div><div class='add'>+	0x0c15f0c0,</div><div class='add'>+	0xf00021d0,</div><div class='add'>+	0x27f10317,</div><div class='add'>+	0x21d01200,</div><div class='add'>+	0x1031f400,</div><div class='add'>+/* 0x002f: spin */</div><div class='add'>+	0xf40031f4,</div><div class='add'>+	0x0ef40028,</div><div class='add'>+/* 0x0035: ih */</div><div class='add'>+	0x8001cffd,</div><div class='add'>+	0xb00812c4,</div><div class='add'>+	0x0bf40024,</div><div class='add'>+	0x0027f167,</div><div class='add'>+	0x002bfe77,</div><div class='add'>+	0xf00007fe,</div><div class='add'>+	0x23f00027,</div><div class='add'>+	0x0037f105,</div><div class='add'>+	0x0034cf14,</div><div class='add'>+	0xb0014594,</div><div class='add'>+	0x18f40055,</div><div class='add'>+	0x0602fa17,</div><div class='add'>+	0x4af003f8,</div><div class='add'>+	0x0034d01e,</div><div class='add'>+	0xd00147f0,</div><div class='add'>+	0x0ef48034,</div><div class='add'>+/* 0x0075: ctxload */</div><div class='add'>+	0x4034cf33,</div><div class='add'>+	0xb0014f94,</div><div class='add'>+	0x18f400f5,</div><div class='add'>+	0x0502fa21,</div><div class='add'>+	0x57f003f8,</div><div class='add'>+	0x0267f000,</div><div class='add'>+/* 0x008c: ctxload_dma_loop */</div><div class='add'>+	0xa07856bc,</div><div class='add'>+	0xb6018068,</div><div class='add'>+	0x87d00884,</div><div class='add'>+	0x0162b600,</div><div class='add'>+/* 0x009f: dummyload */</div><div class='add'>+	0xf0f018f4,</div><div class='add'>+	0x35d00257,</div><div class='add'>+/* 0x00a5: noctx */</div><div class='add'>+	0x0412c480,</div><div class='add'>+	0xf50024b0,</div><div class='add'>+	0xf100df0b,</div><div class='add'>+	0xcf190037,</div><div class='add'>+	0x33cf4032,</div><div class='add'>+	0xff24e400,</div><div class='add'>+	0x1024b607,</div><div class='add'>+	0x07bf45e4,</div><div class='add'>+	0xf50054b0,</div><div class='add'>+	0xf100b90b,</div><div class='add'>+	0xf1fae057,</div><div class='add'>+	0xb000ce67,</div><div class='add'>+	0x18f4c044,</div><div class='add'>+	0xa057f14d,</div><div class='add'>+	0x8867f1fc,</div><div class='add'>+	0x8044b000,</div><div class='add'>+	0xb03f18f4,</div><div class='add'>+	0x18f46044,</div><div class='add'>+	0x5044b019,</div><div class='add'>+	0xf1741bf4,</div><div class='add'>+	0xbd220027,</div><div class='add'>+	0x0233f034,</div><div class='add'>+	0xf50023d0,</div><div class='add'>+/* 0x0103: dma_cmd */</div><div class='add'>+	0xb000810e,</div><div class='add'>+	0x18f46344,</div><div class='add'>+	0x0245945e,</div><div class='add'>+	0xfe8050b7,</div><div class='add'>+	0x801e39f0,</div><div class='add'>+	0x40b70053,</div><div class='add'>+	0x44b60120,</div><div class='add'>+	0x0043d008,</div><div class='add'>+/* 0x0123: dtable_cmd */</div><div class='add'>+	0xb8600ef4,</div><div class='add'>+	0x18f40446,</div><div class='add'>+	0x0344b63e,</div><div class='add'>+	0x980045bb,</div><div class='add'>+	0x53fd0145,</div><div class='add'>+	0x0054b004,</div><div class='add'>+	0x58291bf4,</div><div class='add'>+	0x46580045,</div><div class='add'>+	0x0264b001,</div><div class='add'>+	0x98170bf4,</div><div class='add'>+	0x67fd0807,</div><div class='add'>+	0x0164b004,</div><div class='add'>+	0xf9300bf4,</div><div class='add'>+	0x0f01f455,</div><div class='add'>+/* 0x015b: cmd_setctx */</div><div class='add'>+	0x80280ef4,</div><div class='add'>+	0x0ef40053,</div><div class='add'>+/* 0x0161: invalid_bitfield */</div><div class='add'>+	0x0125f022,</div><div class='add'>+/* 0x0164: dispatch_error */</div><div class='add'>+/* 0x0164: illegal_mthd */</div><div class='add'>+	0x100047f1,</div><div class='add'>+	0xd00042d0,</div><div class='add'>+	0x47f04043,</div><div class='add'>+	0x0004d040,</div><div class='add'>+/* 0x0174: im_loop */</div><div class='add'>+	0xf08004cf,</div><div class='add'>+	0x44b04044,</div><div class='add'>+	0xf71bf400,</div><div class='add'>+/* 0x0180: cmddone */</div><div class='add'>+	0x1d0037f1,</div><div class='add'>+	0xd00147f0,</div><div class='add'>+/* 0x018a: nocmd */</div><div class='add'>+	0x11c40034,</div><div class='add'>+	0x4001d00c,</div><div class='add'>+/* 0x0192: cmd_query_get */</div><div class='add'>+	0x38f201f8,</div><div class='add'>+	0x0325f001,</div><div class='add'>+	0x0b0047f1,</div><div class='add'>+/* 0x019c: ptimer_retry */</div><div class='add'>+	0xcf4046cf,</div><div class='add'>+	0x47cf0045,</div><div class='add'>+	0x0467b840,</div><div class='add'>+	0x98f41bf4,</div><div class='add'>+	0x04800504,</div><div class='add'>+	0x21008020,</div><div class='add'>+	0x80220580,</div><div class='add'>+	0x0bfe2306,</div><div class='add'>+	0x03049800,</div><div class='add'>+	0xfe1844b6,</div><div class='add'>+	0x04980047,</div><div class='add'>+	0x8057f104,</div><div class='add'>+	0x0253f000,</div><div class='add'>+	0xf80645fa,</div><div class='add'>+/* 0x01d7: cmd_cond_mode */</div><div class='add'>+	0xf400f803,</div><div class='add'>+	0x25f00131,</div><div class='add'>+	0x0534b002,</div><div class='add'>+	0xf41218f4,</div><div class='add'>+	0x34b00132,</div><div class='add'>+	0x0b18f402,</div><div class='add'>+	0x800136f0,</div><div class='add'>+/* 0x01f2: return */</div><div class='add'>+	0x00f80803,</div><div class='add'>+/* 0x01f4: cmd_cond_mode_queryful */</div><div class='add'>+	0x98060498,</div><div class='add'>+	0x56c40705,</div><div class='add'>+	0x0855b6ff,</div><div class='add'>+	0xfd1844b6,</div><div class='add'>+	0x47fe0545,</div><div class='add'>+	0x000bfe00,</div><div class='add'>+	0x008057f1,</div><div class='add'>+	0xfa0253f0,</div><div class='add'>+	0x34b00565,</div><div class='add'>+	0x131bf402,</div><div class='add'>+	0x049803f8,</div><div class='add'>+	0x0044b021,</div><div class='add'>+	0x800b4cf0,</div><div class='add'>+	0x00f80804,</div><div class='add'>+/* 0x022c: cmd_cond_mode_double */</div><div class='add'>+	0xb61060b6,</div><div class='add'>+	0x65fa1050,</div><div class='add'>+	0x9803f805,</div><div class='add'>+	0x06982005,</div><div class='add'>+	0x0456b824,</div><div class='add'>+	0x980b4cf0,</div><div class='add'>+	0x06982105,</div><div class='add'>+	0x0456b825,</div><div class='add'>+	0xfd0b5cf0,</div><div class='add'>+	0x34b00445,</div><div class='add'>+	0x0b5cf003,</div><div class='add'>+	0x800645fd,</div><div class='add'>+	0x00f80804,</div><div class='add'>+/* 0x0260: cmd_wrcache_flush */</div><div class='add'>+	0xf10132f4,</div><div class='add'>+	0xbd220027,</div><div class='add'>+	0x0133f034,</div><div class='add'>+	0xf80023d0,</div><div class='add'>+/* 0x0271: crypt_cmd_mode */</div><div class='add'>+	0x0131f400,</div><div class='add'>+	0xb00225f0,</div><div class='add'>+	0x18f40f34,</div><div class='add'>+	0x0132f409,</div><div class='add'>+/* 0x0283: crypt_cmd_mode_return */</div><div class='add'>+	0xf80d0380,</div><div class='add'>+/* 0x0285: crypt_cmd_length */</div><div class='add'>+	0x0034b000,</div><div class='add'>+	0xf4fb0bf4,</div><div class='add'>+	0x47f0033c,</div><div class='add'>+	0x0743f040,</div><div class='add'>+	0xf00604fa,</div><div class='add'>+	0x43f05047,</div><div class='add'>+	0x0604fa06,</div><div class='add'>+	0x3cf503f8,</div><div class='add'>+	0x47f1c407,</div><div class='add'>+	0x4bfe2100,</div><div class='add'>+	0x09049800,</div><div class='add'>+	0x950a0598,</div><div class='add'>+	0x44b60858,</div><div class='add'>+	0x0548fd18,</div><div class='add'>+	0x98ff55c4,</div><div class='add'>+	0x07980b06,</div><div class='add'>+	0x0878950c,</div><div class='add'>+	0xfd1864b6,</div><div class='add'>+	0x77c40568,</div><div class='add'>+	0x0d0898ff,</div><div class='add'>+	0x580284b6,</div><div class='add'>+	0x95f9a889,</div><div class='add'>+	0xf9a98958,</div><div class='add'>+	0x013cf495,</div><div class='add'>+	0x3cf403f8,</div><div class='add'>+	0xf803f861,</div><div class='add'>+	0x18489503,</div><div class='add'>+	0xbb084994,</div><div class='add'>+	0x81b60095,</div><div class='add'>+	0x09088000,</div><div class='add'>+	0x950a0980,</div><div class='add'>+	0x69941868,</div><div class='add'>+	0x0097bb08,</div><div class='add'>+	0x800081b6,</div><div class='add'>+	0x09800b08,</div><div class='add'>+	0x023cf40c,</div><div class='add'>+	0xf05047f0,</div><div class='add'>+	0x04fa0643,</div><div class='add'>+	0xf803f805,</div><div class='add'>+/* 0x0321: crypt_copy_prep */</div><div class='add'>+	0x203cf500,</div><div class='add'>+	0x003cf594,</div><div class='add'>+	0x003cf588,</div><div class='add'>+/* 0x032f: crypt_store_prep */</div><div class='add'>+	0xf500f88c,</div><div class='add'>+	0xf594103c,</div><div class='add'>+	0xf88c063c,</div><div class='add'>+/* 0x0339: crypt_ecb_e_prep */</div><div class='add'>+	0x303cf500,</div><div class='add'>+	0x003cf594,</div><div class='add'>+	0x003cf588,</div><div class='add'>+	0x003cf5d0,</div><div class='add'>+/* 0x034b: crypt_ecb_d_prep */</div><div class='add'>+	0xf500f88c,</div><div class='add'>+	0xf5c8773c,</div><div class='add'>+	0xf594303c,</div><div class='add'>+	0xf588003c,</div><div class='add'>+	0xf5d4003c,</div><div class='add'>+	0xf88c003c,</div><div class='add'>+/* 0x0361: crypt_cbc_e_prep */</div><div class='add'>+	0x403cf500,</div><div class='add'>+	0x003cf594,</div><div class='add'>+	0x063cf588,</div><div class='add'>+	0x663cf5ac,</div><div class='add'>+	0x063cf5d0,</div><div class='add'>+/* 0x0377: crypt_cbc_d_prep */</div><div class='add'>+	0xf500f88c,</div><div class='add'>+	0xf5c8773c,</div><div class='add'>+	0xf594503c,</div><div class='add'>+	0xf584623c,</div><div class='add'>+	0xf588063c,</div><div class='add'>+	0xf5d4603c,</div><div class='add'>+	0xf5ac203c,</div><div class='add'>+	0xf88c003c,</div><div class='add'>+/* 0x0395: crypt_pcbc_e_prep */</div><div class='add'>+	0x503cf500,</div><div class='add'>+	0x003cf594,</div><div class='add'>+	0x063cf588,</div><div class='add'>+	0x663cf5ac,</div><div class='add'>+	0x063cf5d0,</div><div class='add'>+	0x063cf58c,</div><div class='add'>+/* 0x03af: crypt_pcbc_d_prep */</div><div class='add'>+	0xf500f8ac,</div><div class='add'>+	0xf5c8773c,</div><div class='add'>+	0xf594503c,</div><div class='add'>+	0xf588003c,</div><div class='add'>+	0xf5d4013c,</div><div class='add'>+	0xf5ac163c,</div><div class='add'>+	0xf58c063c,</div><div class='add'>+	0xf8ac063c,</div><div class='add'>+/* 0x03cd: crypt_cfb_e_prep */</div><div class='add'>+	0x403cf500,</div><div class='add'>+	0x663cf594,</div><div class='add'>+	0x003cf5d0,</div><div class='add'>+	0x063cf588,</div><div class='add'>+	0x063cf5ac,</div><div class='add'>+/* 0x03e3: crypt_cfb_d_prep */</div><div class='add'>+	0xf500f88c,</div><div class='add'>+	0xf594403c,</div><div class='add'>+	0xf5d0603c,</div><div class='add'>+	0xf588063c,</div><div class='add'>+	0xf5ac603c,</div><div class='add'>+	0xf88c003c,</div><div class='add'>+/* 0x03f9: crypt_ofb_prep */</div><div class='add'>+	0x403cf500,</div><div class='add'>+	0x663cf594,</div><div class='add'>+	0x003cf5d0,</div><div class='add'>+	0x603cf588,</div><div class='add'>+	0x003cf5ac,</div><div class='add'>+/* 0x040f: crypt_ctr_prep */</div><div class='add'>+	0xf500f88c,</div><div class='add'>+	0xf594503c,</div><div class='add'>+	0xf5d0613c,</div><div class='add'>+	0xf5b0163c,</div><div class='add'>+	0xf588003c,</div><div class='add'>+	0xf5ac103c,</div><div class='add'>+	0xf88c003c,</div><div class='add'>+/* 0x0429: crypt_cbc_mac_prep */</div><div class='add'>+	0x303cf500,</div><div class='add'>+	0x003cf594,</div><div class='add'>+	0x063cf588,</div><div class='add'>+	0x663cf5ac,</div><div class='add'>+/* 0x043b: crypt_cmac_finish_complete_prep */</div><div class='add'>+	0xf500f8d0,</div><div class='add'>+	0xf594703c,</div><div class='add'>+	0xf588003c,</div><div class='add'>+	0xf5ac063c,</div><div class='add'>+	0xf5ac003c,</div><div class='add'>+	0xf5d0003c,</div><div class='add'>+	0xf5bc003c,</div><div class='add'>+	0xf5ac063c,</div><div class='add'>+	0xf8d0663c,</div><div class='add'>+/* 0x045d: crypt_cmac_finish_partial_prep */</div><div class='add'>+	0x803cf500,</div><div class='add'>+	0x003cf594,</div><div class='add'>+	0x063cf588,</div><div class='add'>+	0x003cf5ac,</div><div class='add'>+	0x003cf5ac,</div><div class='add'>+	0x003cf5d0,</div><div class='add'>+	0x003cf5bc,</div><div class='add'>+	0x063cf5bc,</div><div class='add'>+	0x663cf5ac,</div><div class='add'>+/* 0x0483: crypt_do_in */</div><div class='add'>+	0xbb00f8d0,</div><div class='add'>+	0x47fe0035,</div><div class='add'>+	0x8097f100,</div><div class='add'>+	0x0293f000,</div><div class='add'>+/* 0x0490: crypt_do_in_loop */</div><div class='add'>+	0xf80559fa,</div><div class='add'>+	0x223cf403,</div><div class='add'>+	0xf50609fa,</div><div class='add'>+	0xf898103c,</div><div class='add'>+	0x1050b603,</div><div class='add'>+	0xf40453b8,</div><div class='add'>+	0x3cf4e91b,</div><div class='add'>+	0xf803f801,</div><div class='add'>+/* 0x04b1: crypt_do_out */</div><div class='add'>+	0x0037bb00,</div><div class='add'>+	0xf10067fe,</div><div class='add'>+	0xf0008097,</div><div class='add'>+/* 0x04be: crypt_do_out_loop */</div><div class='add'>+	0x3cf50293,</div><div class='add'>+	0x3cf49810,</div><div class='add'>+	0x0579fa61,</div><div class='add'>+	0xf40679fa,</div><div class='add'>+	0x03f8013c,</div><div class='add'>+	0xb81070b6,</div><div class='add'>+	0x1bf40473,</div><div class='add'>+/* 0x04db: crypt_do_inout */</div><div class='add'>+	0xbb00f8e8,</div><div class='add'>+	0x97f10035,</div><div class='add'>+	0x93f00080,</div><div class='add'>+/* 0x04e5: crypt_do_inout_loop */</div><div class='add'>+	0x0047fe02,</div><div class='add'>+	0xf80559fa,</div><div class='add'>+	0x213cf403,</div><div class='add'>+	0xf50609fa,</div><div class='add'>+	0xf498103c,</div><div class='add'>+	0x67fe613c,</div><div class='add'>+	0x0579fa00,</div><div class='add'>+	0xf40679fa,</div><div class='add'>+	0x03f8013c,</div><div class='add'>+	0xb61050b6,</div><div class='add'>+	0x53b81070,</div><div class='add'>+	0xd41bf404,</div><div class='add'>+	0x000000f8,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+	0x00000000,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nva3_copy.c b/drivers/gpu/drm/nouveau/nva3_copy.c<br/>index 8f356d58e409..0387dc7f4f42 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nva3_copy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nva3_copy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nva3_copy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nva3_copy.c</a></div><div class='hunk'>@@ -79,29 +79,13 @@ static void</div><div class='ctx'> nva3_copy_context_del(struct nouveau_channel *chan, int engine)</div><div class='ctx'> {</div><div class='ctx'> 	struct nouveau_gpuobj *ctx = chan-&gt;engctx[engine];</div><div class='del'>-	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	u32 inst;</div><div class='del'>-</div><div class='del'>-	inst  = (chan-&gt;ramin-&gt;vinst &gt;&gt; 12);</div><div class='del'>-	inst |= 0x40000000;</div><div class='del'>-</div><div class='del'>-	/* disable fifo access */</div><div class='del'>-	nv_wr32(dev, 0x104048, 0x00000000);</div><div class='del'>-	/* mark channel as unloaded if it's currently active */</div><div class='del'>-	if (nv_rd32(dev, 0x104050) == inst)</div><div class='del'>-		nv_mask(dev, 0x104050, 0x40000000, 0x00000000);</div><div class='del'>-	/* mark next channel as invalid if it's about to be loaded */</div><div class='del'>-	if (nv_rd32(dev, 0x104054) == inst)</div><div class='del'>-		nv_mask(dev, 0x104054, 0x40000000, 0x00000000);</div><div class='del'>-	/* restore fifo access */</div><div class='del'>-	nv_wr32(dev, 0x104048, 0x00000003);</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	for (inst = 0xc0; inst &lt;= 0xd4; inst += 4)</div><div class='del'>-		nv_wo32(chan-&gt;ramin, inst, 0x00000000);</div><div class='del'>-</div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;ctx);</div><div class='add'>+	for (i = 0xc0; i &lt;= 0xd4; i += 4)</div><div class='add'>+		nv_wo32(chan-&gt;ramin, i, 0x00000000);</div><div class='ctx'> </div><div class='ctx'> 	atomic_dec(&amp;chan-&gt;vm-&gt;engref[engine]);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;ctx);</div><div class='ctx'> 	chan-&gt;engctx[engine] = ctx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -143,13 +127,6 @@ static int</div><div class='ctx'> nva3_copy_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='ctx'> {</div><div class='ctx'> 	nv_mask(dev, 0x104048, 0x00000003, 0x00000000);</div><div class='del'>-</div><div class='del'>-	/* trigger fuc context unload */</div><div class='del'>-	nv_wait(dev, 0x104008, 0x0000000c, 0x00000000);</div><div class='del'>-	nv_mask(dev, 0x104054, 0x40000000, 0x00000000);</div><div class='del'>-	nv_wr32(dev, 0x104000, 0x00000008);</div><div class='del'>-	nv_wait(dev, 0x104008, 0x00000008, 0x00000000);</div><div class='del'>-</div><div class='ctx'> 	nv_wr32(dev, 0x104014, 0xffffffff);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nva3_pm.c b/drivers/gpu/drm/nouveau/nva3_pm.c<br/>index 9e636e6ef6d7..798829353fb6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nva3_pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nva3_pm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nva3_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nva3_pm.c</a></div><div class='hunk'>@@ -98,7 +98,9 @@ read_pll(struct drm_device *dev, int clk, u32 pll)</div><div class='ctx'> 		sclk = read_clk(dev, 0x10 + clk, false);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return sclk * N / (M * P);</div><div class='add'>+	if (M * P)</div><div class='add'>+		return sclk * N / (M * P);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct creg {</div><div class='hunk'>@@ -182,23 +184,26 @@ prog_pll(struct drm_device *dev, int clk, u32 pll, struct creg *reg)</div><div class='ctx'> 	const u32 src1 = 0x004160 + (clk * 4);</div><div class='ctx'> 	const u32 ctrl = pll + 0;</div><div class='ctx'> 	const u32 coef = pll + 4;</div><div class='del'>-	u32 cntl;</div><div class='ctx'> </div><div class='ctx'> 	if (!reg-&gt;clk &amp;&amp; !reg-&gt;pll) {</div><div class='ctx'> 		NV_DEBUG(dev, "no clock for %02x\n", clk);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cntl = nv_rd32(dev, ctrl) &amp; 0xfffffff2;</div><div class='ctx'> 	if (reg-&gt;pll) {</div><div class='ctx'> 		nv_mask(dev, src0, 0x00000101, 0x00000101);</div><div class='ctx'> 		nv_wr32(dev, coef, reg-&gt;pll);</div><div class='del'>-		nv_wr32(dev, ctrl, cntl | 0x00000015);</div><div class='add'>+		nv_mask(dev, ctrl, 0x00000015, 0x00000015);</div><div class='add'>+		nv_mask(dev, ctrl, 0x00000010, 0x00000000);</div><div class='add'>+		nv_wait(dev, ctrl, 0x00020000, 0x00020000);</div><div class='add'>+		nv_mask(dev, ctrl, 0x00000010, 0x00000010);</div><div class='add'>+		nv_mask(dev, ctrl, 0x00000008, 0x00000000);</div><div class='ctx'> 		nv_mask(dev, src1, 0x00000100, 0x00000000);</div><div class='ctx'> 		nv_mask(dev, src1, 0x00000001, 0x00000000);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		nv_mask(dev, src1, 0x003f3141, 0x00000101 | reg-&gt;clk);</div><div class='del'>-		nv_wr32(dev, ctrl, cntl | 0x0000001d);</div><div class='add'>+		nv_mask(dev, ctrl, 0x00000018, 0x00000018);</div><div class='add'>+		udelay(20);</div><div class='ctx'> 		nv_mask(dev, ctrl, 0x00000001, 0x00000000);</div><div class='ctx'> 		nv_mask(dev, src0, 0x00000100, 0x00000000);</div><div class='ctx'> 		nv_mask(dev, src0, 0x00000001, 0x00000000);</div><div class='hunk'>@@ -230,17 +235,28 @@ nva3_pm_clocks_get(struct drm_device *dev, struct nouveau_pm_level *perflvl)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct nva3_pm_state {</div><div class='add'>+	struct nouveau_pm_level *perflvl;</div><div class='add'>+</div><div class='ctx'> 	struct creg nclk;</div><div class='ctx'> 	struct creg sclk;</div><div class='del'>-	struct creg mclk;</div><div class='ctx'> 	struct creg vdec;</div><div class='ctx'> 	struct creg unka0;</div><div class='add'>+</div><div class='add'>+	struct creg mclk;</div><div class='add'>+	u8 *rammap;</div><div class='add'>+	u8  rammap_ver;</div><div class='add'>+	u8  rammap_len;</div><div class='add'>+	u8 *ramcfg;</div><div class='add'>+	u8  ramcfg_len;</div><div class='add'>+	u32 r004018;</div><div class='add'>+	u32 r100760;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void *</div><div class='ctx'> nva3_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl)</div><div class='ctx'> {</div><div class='ctx'> 	struct nva3_pm_state *info;</div><div class='add'>+	u8 ramcfg_cnt;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	info = kzalloc(sizeof(*info), GFP_KERNEL);</div><div class='hunk'>@@ -267,6 +283,20 @@ nva3_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl)</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='add'>+	info-&gt;rammap = nouveau_perf_rammap(dev, perflvl-&gt;memory,</div><div class='add'>+					   &amp;info-&gt;rammap_ver,</div><div class='add'>+					   &amp;info-&gt;rammap_len,</div><div class='add'>+					   &amp;ramcfg_cnt, &amp;info-&gt;ramcfg_len);</div><div class='add'>+	if (info-&gt;rammap_ver != 0x10 || info-&gt;rammap_len &lt; 5)</div><div class='add'>+		info-&gt;rammap = NULL;</div><div class='add'>+</div><div class='add'>+	info-&gt;ramcfg = nouveau_perf_ramcfg(dev, perflvl-&gt;memory,</div><div class='add'>+					   &amp;info-&gt;rammap_ver,</div><div class='add'>+					   &amp;info-&gt;ramcfg_len);</div><div class='add'>+	if (info-&gt;rammap_ver != 0x10)</div><div class='add'>+		info-&gt;ramcfg = NULL;</div><div class='add'>+</div><div class='add'>+	info-&gt;perflvl = perflvl;</div><div class='ctx'> out:</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		kfree(info);</div><div class='hunk'>@@ -287,6 +317,240 @@ nva3_pm_grcp_idle(void *data)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+mclk_precharge(struct nouveau_mem_exec_func *exec)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(exec-&gt;dev, 0x1002d4, 0x00000001);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_refresh(struct nouveau_mem_exec_func *exec)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(exec-&gt;dev, 0x1002d0, 0x00000001);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_refresh_auto(struct nouveau_mem_exec_func *exec, bool enable)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(exec-&gt;dev, 0x100210, enable ? 0x80000000 : 0x00000000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_refresh_self(struct nouveau_mem_exec_func *exec, bool enable)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(exec-&gt;dev, 0x1002dc, enable ? 0x00000001 : 0x00000000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_wait(struct nouveau_mem_exec_func *exec, u32 nsec)</div><div class='add'>+{</div><div class='add'>+	volatile u32 post = nv_rd32(exec-&gt;dev, 0); (void)post;</div><div class='add'>+	udelay((nsec + 500) / 1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+mclk_mrg(struct nouveau_mem_exec_func *exec, int mr)</div><div class='add'>+{</div><div class='add'>+	if (mr &lt;= 1)</div><div class='add'>+		return nv_rd32(exec-&gt;dev, 0x1002c0 + ((mr - 0) * 4));</div><div class='add'>+	if (mr &lt;= 3)</div><div class='add'>+		return nv_rd32(exec-&gt;dev, 0x1002e0 + ((mr - 2) * 4));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_mrs(struct nouveau_mem_exec_func *exec, int mr, u32 data)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = exec-&gt;dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	if (mr &lt;= 1) {</div><div class='add'>+		if (dev_priv-&gt;vram_rank_B)</div><div class='add'>+			nv_wr32(exec-&gt;dev, 0x1002c8 + ((mr - 0) * 4), data);</div><div class='add'>+		nv_wr32(exec-&gt;dev, 0x1002c0 + ((mr - 0) * 4), data);</div><div class='add'>+	} else</div><div class='add'>+	if (mr &lt;= 3) {</div><div class='add'>+		if (dev_priv-&gt;vram_rank_B)</div><div class='add'>+			nv_wr32(exec-&gt;dev, 0x1002e8 + ((mr - 2) * 4), data);</div><div class='add'>+		nv_wr32(exec-&gt;dev, 0x1002e0 + ((mr - 2) * 4), data);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_clock_set(struct nouveau_mem_exec_func *exec)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = exec-&gt;dev;</div><div class='add'>+	struct nva3_pm_state *info = exec-&gt;priv;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+</div><div class='add'>+	ctrl = nv_rd32(dev, 0x004000);</div><div class='add'>+	if (!(ctrl &amp; 0x00000008) &amp;&amp; info-&gt;mclk.pll) {</div><div class='add'>+		nv_wr32(dev, 0x004000, (ctrl |=  0x00000008));</div><div class='add'>+		nv_mask(dev, 0x1110e0, 0x00088000, 0x00088000);</div><div class='add'>+		nv_wr32(dev, 0x004018, 0x00001000);</div><div class='add'>+		nv_wr32(dev, 0x004000, (ctrl &amp;= ~0x00000001));</div><div class='add'>+		nv_wr32(dev, 0x004004, info-&gt;mclk.pll);</div><div class='add'>+		nv_wr32(dev, 0x004000, (ctrl |=  0x00000001));</div><div class='add'>+		udelay(64);</div><div class='add'>+		nv_wr32(dev, 0x004018, 0x00005000 | info-&gt;r004018);</div><div class='add'>+		udelay(20);</div><div class='add'>+	} else</div><div class='add'>+	if (!info-&gt;mclk.pll) {</div><div class='add'>+		nv_mask(dev, 0x004168, 0x003f3040, info-&gt;mclk.clk);</div><div class='add'>+		nv_wr32(dev, 0x004000, (ctrl |= 0x00000008));</div><div class='add'>+		nv_mask(dev, 0x1110e0, 0x00088000, 0x00088000);</div><div class='add'>+		nv_wr32(dev, 0x004018, 0x0000d000 | info-&gt;r004018);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (info-&gt;rammap) {</div><div class='add'>+		if (info-&gt;ramcfg &amp;&amp; (info-&gt;rammap[4] &amp; 0x08)) {</div><div class='add'>+			u32 unk5a0 = (ROM16(info-&gt;ramcfg[5]) &lt;&lt; 8) |</div><div class='add'>+				      info-&gt;ramcfg[5];</div><div class='add'>+			u32 unk5a4 = ROM16(info-&gt;ramcfg[7]);</div><div class='add'>+			u32 unk804 = (info-&gt;ramcfg[9] &amp; 0xf0) &lt;&lt; 16 |</div><div class='add'>+				     (info-&gt;ramcfg[3] &amp; 0x0f) &lt;&lt; 16 |</div><div class='add'>+				     (info-&gt;ramcfg[9] &amp; 0x0f) |</div><div class='add'>+				     0x80000000;</div><div class='add'>+			nv_wr32(dev, 0x1005a0, unk5a0);</div><div class='add'>+			nv_wr32(dev, 0x1005a4, unk5a4);</div><div class='add'>+			nv_wr32(dev, 0x10f804, unk804);</div><div class='add'>+			nv_mask(dev, 0x10053c, 0x00001000, 0x00000000);</div><div class='add'>+		} else {</div><div class='add'>+			nv_mask(dev, 0x10053c, 0x00001000, 0x00001000);</div><div class='add'>+			nv_mask(dev, 0x10f804, 0x80000000, 0x00000000);</div><div class='add'>+			nv_mask(dev, 0x100760, 0x22222222, info-&gt;r100760);</div><div class='add'>+			nv_mask(dev, 0x1007a0, 0x22222222, info-&gt;r100760);</div><div class='add'>+			nv_mask(dev, 0x1007e0, 0x22222222, info-&gt;r100760);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (info-&gt;mclk.pll) {</div><div class='add'>+		nv_mask(dev, 0x1110e0, 0x00088000, 0x00011000);</div><div class='add'>+		nv_wr32(dev, 0x004000, (ctrl &amp;= ~0x00000008));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_timing_set(struct nouveau_mem_exec_func *exec)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = exec-&gt;dev;</div><div class='add'>+	struct nva3_pm_state *info = exec-&gt;priv;</div><div class='add'>+	struct nouveau_pm_level *perflvl = info-&gt;perflvl;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 9; i++)</div><div class='add'>+		nv_wr32(dev, 0x100220 + (i * 4), perflvl-&gt;timing.reg[i]);</div><div class='add'>+</div><div class='add'>+	if (info-&gt;ramcfg) {</div><div class='add'>+		u32 data = (info-&gt;ramcfg[2] &amp; 0x08) ? 0x00000000 : 0x00001000;</div><div class='add'>+		nv_mask(dev, 0x100200, 0x00001000, data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (info-&gt;ramcfg) {</div><div class='add'>+		u32 unk714 = nv_rd32(dev, 0x100714) &amp; ~0xf0000010;</div><div class='add'>+		u32 unk718 = nv_rd32(dev, 0x100718) &amp; ~0x00000100;</div><div class='add'>+		u32 unk71c = nv_rd32(dev, 0x10071c) &amp; ~0x00000100;</div><div class='add'>+		if ( (info-&gt;ramcfg[2] &amp; 0x20))</div><div class='add'>+			unk714 |= 0xf0000000;</div><div class='add'>+		if (!(info-&gt;ramcfg[2] &amp; 0x04))</div><div class='add'>+			unk714 |= 0x00000010;</div><div class='add'>+		nv_wr32(dev, 0x100714, unk714);</div><div class='add'>+</div><div class='add'>+		if (info-&gt;ramcfg[2] &amp; 0x01)</div><div class='add'>+			unk71c |= 0x00000100;</div><div class='add'>+		nv_wr32(dev, 0x10071c, unk71c);</div><div class='add'>+</div><div class='add'>+		if (info-&gt;ramcfg[2] &amp; 0x02)</div><div class='add'>+			unk718 |= 0x00000100;</div><div class='add'>+		nv_wr32(dev, 0x100718, unk718);</div><div class='add'>+</div><div class='add'>+		if (info-&gt;ramcfg[2] &amp; 0x10)</div><div class='add'>+			nv_wr32(dev, 0x111100, 0x48000000); /*XXX*/</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+prog_mem(struct drm_device *dev, struct nva3_pm_state *info)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_mem_exec_func exec = {</div><div class='add'>+		.dev = dev,</div><div class='add'>+		.precharge = mclk_precharge,</div><div class='add'>+		.refresh = mclk_refresh,</div><div class='add'>+		.refresh_auto = mclk_refresh_auto,</div><div class='add'>+		.refresh_self = mclk_refresh_self,</div><div class='add'>+		.wait = mclk_wait,</div><div class='add'>+		.mrg = mclk_mrg,</div><div class='add'>+		.mrs = mclk_mrs,</div><div class='add'>+		.clock_set = mclk_clock_set,</div><div class='add'>+		.timing_set = mclk_timing_set,</div><div class='add'>+		.priv = info</div><div class='add'>+	};</div><div class='add'>+	u32 ctrl;</div><div class='add'>+</div><div class='add'>+	/* XXX: where the fuck does 750MHz come from? */</div><div class='add'>+	if (info-&gt;perflvl-&gt;memory &lt;= 750000) {</div><div class='add'>+		info-&gt;r004018 = 0x10000000;</div><div class='add'>+		info-&gt;r100760 = 0x22222222;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctrl = nv_rd32(dev, 0x004000);</div><div class='add'>+	if (ctrl &amp; 0x00000008) {</div><div class='add'>+		if (info-&gt;mclk.pll) {</div><div class='add'>+			nv_mask(dev, 0x004128, 0x00000101, 0x00000101);</div><div class='add'>+			nv_wr32(dev, 0x004004, info-&gt;mclk.pll);</div><div class='add'>+			nv_wr32(dev, 0x004000, (ctrl |= 0x00000001));</div><div class='add'>+			nv_wr32(dev, 0x004000, (ctrl &amp;= 0xffffffef));</div><div class='add'>+			nv_wait(dev, 0x004000, 0x00020000, 0x00020000);</div><div class='add'>+			nv_wr32(dev, 0x004000, (ctrl |= 0x00000010));</div><div class='add'>+			nv_wr32(dev, 0x004018, 0x00005000 | info-&gt;r004018);</div><div class='add'>+			nv_wr32(dev, 0x004000, (ctrl |= 0x00000004));</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		u32 ssel = 0x00000101;</div><div class='add'>+		if (info-&gt;mclk.clk)</div><div class='add'>+			ssel |= info-&gt;mclk.clk;</div><div class='add'>+		else</div><div class='add'>+			ssel |= 0x00080000; /* 324MHz, shouldn't matter... */</div><div class='add'>+		nv_mask(dev, 0x004168, 0x003f3141, ctrl);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (info-&gt;ramcfg) {</div><div class='add'>+		if (info-&gt;ramcfg[2] &amp; 0x10) {</div><div class='add'>+			nv_mask(dev, 0x111104, 0x00000600, 0x00000000);</div><div class='add'>+		} else {</div><div class='add'>+			nv_mask(dev, 0x111100, 0x40000000, 0x40000000);</div><div class='add'>+			nv_mask(dev, 0x111104, 0x00000180, 0x00000000);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (info-&gt;rammap &amp;&amp; !(info-&gt;rammap[4] &amp; 0x02))</div><div class='add'>+		nv_mask(dev, 0x100200, 0x00000800, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x611200, 0x00003300);</div><div class='add'>+	if (!(info-&gt;ramcfg[2] &amp; 0x10))</div><div class='add'>+		nv_wr32(dev, 0x111100, 0x4c020000); /*XXX*/</div><div class='add'>+</div><div class='add'>+	nouveau_mem_exec(&amp;exec, info-&gt;perflvl);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x611200, 0x00003330);</div><div class='add'>+	if (info-&gt;rammap &amp;&amp; (info-&gt;rammap[4] &amp; 0x02))</div><div class='add'>+		nv_mask(dev, 0x100200, 0x00000800, 0x00000800);</div><div class='add'>+	if (info-&gt;ramcfg) {</div><div class='add'>+		if (info-&gt;ramcfg[2] &amp; 0x10) {</div><div class='add'>+			nv_mask(dev, 0x111104, 0x00000180, 0x00000180);</div><div class='add'>+			nv_mask(dev, 0x111100, 0x40000000, 0x00000000);</div><div class='add'>+		} else {</div><div class='add'>+			nv_mask(dev, 0x111104, 0x00000600, 0x00000600);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (info-&gt;mclk.pll) {</div><div class='add'>+		nv_mask(dev, 0x004168, 0x00000001, 0x00000000);</div><div class='add'>+		nv_mask(dev, 0x004168, 0x00000100, 0x00000000);</div><div class='add'>+	} else {</div><div class='add'>+		nv_mask(dev, 0x004000, 0x00000001, 0x00000000);</div><div class='add'>+		nv_mask(dev, 0x004128, 0x00000001, 0x00000000);</div><div class='add'>+		nv_mask(dev, 0x004128, 0x00000100, 0x00000000);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int</div><div class='ctx'> nva3_pm_clocks_set(struct drm_device *dev, void *pre_state)</div><div class='ctx'> {</div><div class='hunk'>@@ -316,18 +580,8 @@ nva3_pm_clocks_set(struct drm_device *dev, void *pre_state)</div><div class='ctx'> 	prog_clk(dev, 0x20, &amp;info-&gt;unka0);</div><div class='ctx'> 	prog_clk(dev, 0x21, &amp;info-&gt;vdec);</div><div class='ctx'> </div><div class='del'>-	if (info-&gt;mclk.clk || info-&gt;mclk.pll) {</div><div class='del'>-		nv_wr32(dev, 0x100210, 0);</div><div class='del'>-		nv_wr32(dev, 0x1002dc, 1);</div><div class='del'>-		nv_wr32(dev, 0x004018, 0x00001000);</div><div class='del'>-		prog_pll(dev, 0x02, 0x004000, &amp;info-&gt;mclk);</div><div class='del'>-		if (nv_rd32(dev, 0x4000) &amp; 0x00000008)</div><div class='del'>-			nv_wr32(dev, 0x004018, 0x1000d000);</div><div class='del'>-		else</div><div class='del'>-			nv_wr32(dev, 0x004018, 0x10005000);</div><div class='del'>-		nv_wr32(dev, 0x1002dc, 0);</div><div class='del'>-		nv_wr32(dev, 0x100210, 0x80000000);</div><div class='del'>-	}</div><div class='add'>+	if (info-&gt;mclk.clk || info-&gt;mclk.pll)</div><div class='add'>+		prog_mem(dev, info);</div><div class='ctx'> </div><div class='ctx'> 	ret = 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nvc0_fb.c b/drivers/gpu/drm/nouveau/nvc0_fb.c<br/>index 5bf55038fd92..f704e942372e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvc0_fb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nvc0_fb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvc0_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_fb.c</a></div><div class='hunk'>@@ -54,6 +54,11 @@ nvc0_mfb_isr(struct drm_device *dev)</div><div class='ctx'> 			nvc0_mfb_subp_isr(dev, unit, subp);</div><div class='ctx'> 		units &amp;= ~(1 &lt;&lt; unit);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* we do something horribly wrong and upset PMFB a lot, so mask off</div><div class='add'>+	 * interrupts from it after the first one until it's fixed</div><div class='add'>+	 */</div><div class='add'>+	nv_mask(dev, 0x000640, 0x02000000, 0x00000000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nvc0_fbcon.c b/drivers/gpu/drm/nouveau/nvc0_fbcon.c<br/>index a495e48197ca..797159e7b7a6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvc0_fbcon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nvc0_fbcon.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvc0_fbcon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_fbcon.c</a></div><div class='hunk'>@@ -43,22 +43,22 @@ nvc0_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (rect-&gt;rop != ROP_COPY) {</div><div class='del'>-		BEGIN_NVC0(chan, 2, NvSub2D, 0x02ac, 1);</div><div class='add'>+		BEGIN_NVC0(chan, NvSub2D, 0x02ac, 1);</div><div class='ctx'> 		OUT_RING  (chan, 1);</div><div class='ctx'> 	}</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0588, 1);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0588, 1);</div><div class='ctx'> 	if (info-&gt;fix.visual == FB_VISUAL_TRUECOLOR ||</div><div class='ctx'> 	    info-&gt;fix.visual == FB_VISUAL_DIRECTCOLOR)</div><div class='ctx'> 		OUT_RING  (chan, ((uint32_t *)info-&gt;pseudo_palette)[rect-&gt;color]);</div><div class='ctx'> 	else</div><div class='ctx'> 		OUT_RING  (chan, rect-&gt;color);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0600, 4);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0600, 4);</div><div class='ctx'> 	OUT_RING  (chan, rect-&gt;dx);</div><div class='ctx'> 	OUT_RING  (chan, rect-&gt;dy);</div><div class='ctx'> 	OUT_RING  (chan, rect-&gt;dx + rect-&gt;width);</div><div class='ctx'> 	OUT_RING  (chan, rect-&gt;dy + rect-&gt;height);</div><div class='ctx'> 	if (rect-&gt;rop != ROP_COPY) {</div><div class='del'>-		BEGIN_NVC0(chan, 2, NvSub2D, 0x02ac, 1);</div><div class='add'>+		BEGIN_NVC0(chan, NvSub2D, 0x02ac, 1);</div><div class='ctx'> 		OUT_RING  (chan, 3);</div><div class='ctx'> 	}</div><div class='ctx'> 	FIRE_RING(chan);</div><div class='hunk'>@@ -78,14 +78,14 @@ nvc0_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0110, 1);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0110, 1);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x08b0, 4);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x08b0, 4);</div><div class='ctx'> 	OUT_RING  (chan, region-&gt;dx);</div><div class='ctx'> 	OUT_RING  (chan, region-&gt;dy);</div><div class='ctx'> 	OUT_RING  (chan, region-&gt;width);</div><div class='ctx'> 	OUT_RING  (chan, region-&gt;height);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x08d0, 4);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x08d0, 4);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='ctx'> 	OUT_RING  (chan, region-&gt;sx);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='hunk'>@@ -116,7 +116,7 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)</div><div class='ctx'> 	width = ALIGN(image-&gt;width, 32);</div><div class='ctx'> 	dwords = (width * image-&gt;height) &gt;&gt; 5;</div><div class='ctx'> </div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0814, 2);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0814, 2);</div><div class='ctx'> 	if (info-&gt;fix.visual == FB_VISUAL_TRUECOLOR ||</div><div class='ctx'> 	    info-&gt;fix.visual == FB_VISUAL_DIRECTCOLOR) {</div><div class='ctx'> 		OUT_RING  (chan, palette[image-&gt;bg_color] | mask);</div><div class='hunk'>@@ -125,10 +125,10 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)</div><div class='ctx'> 		OUT_RING  (chan, image-&gt;bg_color);</div><div class='ctx'> 		OUT_RING  (chan, image-&gt;fg_color);</div><div class='ctx'> 	}</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0838, 2);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0838, 2);</div><div class='ctx'> 	OUT_RING  (chan, image-&gt;width);</div><div class='ctx'> 	OUT_RING  (chan, image-&gt;height);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0850, 4);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0850, 4);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='ctx'> 	OUT_RING  (chan, image-&gt;dx);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='hunk'>@@ -143,7 +143,7 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)</div><div class='ctx'> </div><div class='ctx'> 		dwords -= push;</div><div class='ctx'> </div><div class='del'>-		BEGIN_NVC0(chan, 6, NvSub2D, 0x0860, push);</div><div class='add'>+		BEGIN_NIC0(chan, NvSub2D, 0x0860, push);</div><div class='ctx'> 		OUT_RINGp(chan, data, push);</div><div class='ctx'> 		data += push;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -200,47 +200,47 @@ nvc0_fbcon_accel_init(struct fb_info *info)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0000, 1);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0000, 1);</div><div class='ctx'> 	OUT_RING  (chan, 0x0000902d);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0104, 2);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0104, 2);</div><div class='ctx'> 	OUT_RING  (chan, upper_32_bits(chan-&gt;notifier_vma.offset));</div><div class='ctx'> 	OUT_RING  (chan, lower_32_bits(chan-&gt;notifier_vma.offset));</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0290, 1);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0290, 1);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0888, 1);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0888, 1);</div><div class='ctx'> 	OUT_RING  (chan, 1);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x02ac, 1);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x02ac, 1);</div><div class='ctx'> 	OUT_RING  (chan, 3);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x02a0, 1);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x02a0, 1);</div><div class='ctx'> 	OUT_RING  (chan, 0x55);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x08c0, 4);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x08c0, 4);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='ctx'> 	OUT_RING  (chan, 1);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='ctx'> 	OUT_RING  (chan, 1);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0580, 2);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0580, 2);</div><div class='ctx'> 	OUT_RING  (chan, 4);</div><div class='ctx'> 	OUT_RING  (chan, format);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x02e8, 2);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x02e8, 2);</div><div class='ctx'> 	OUT_RING  (chan, 2);</div><div class='ctx'> 	OUT_RING  (chan, 1);</div><div class='ctx'> </div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0804, 1);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0804, 1);</div><div class='ctx'> 	OUT_RING  (chan, format);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0800, 1);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0800, 1);</div><div class='ctx'> 	OUT_RING  (chan, 1);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0808, 3);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0808, 3);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='ctx'> 	OUT_RING  (chan, 1);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x081c, 1);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x081c, 1);</div><div class='ctx'> 	OUT_RING  (chan, 1);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0840, 4);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0840, 4);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='ctx'> 	OUT_RING  (chan, 1);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='ctx'> 	OUT_RING  (chan, 1);</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0200, 10);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0200, 10);</div><div class='ctx'> 	OUT_RING  (chan, format);</div><div class='ctx'> 	OUT_RING  (chan, 1);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='hunk'>@@ -251,7 +251,7 @@ nvc0_fbcon_accel_init(struct fb_info *info)</div><div class='ctx'> 	OUT_RING  (chan, info-&gt;var.yres_virtual);</div><div class='ctx'> 	OUT_RING  (chan, upper_32_bits(fb-&gt;vma.offset));</div><div class='ctx'> 	OUT_RING  (chan, lower_32_bits(fb-&gt;vma.offset));</div><div class='del'>-	BEGIN_NVC0(chan, 2, NvSub2D, 0x0230, 10);</div><div class='add'>+	BEGIN_NVC0(chan, NvSub2D, 0x0230, 10);</div><div class='ctx'> 	OUT_RING  (chan, format);</div><div class='ctx'> 	OUT_RING  (chan, 1);</div><div class='ctx'> 	OUT_RING  (chan, 0);</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nvc0_fence.c b/drivers/gpu/drm/nouveau/nvc0_fence.c<br/>new file mode 100644<br/>index 000000000000..47ab388a606e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvc0_fence.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_fence.c</a></div><div class='hunk'>@@ -0,0 +1,184 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ben Skeggs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_dma.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='add'>+#include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_fence.h"</div><div class='add'>+</div><div class='add'>+struct nvc0_fence_priv {</div><div class='add'>+	struct nouveau_fence_priv base;</div><div class='add'>+	struct nouveau_bo *bo;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nvc0_fence_chan {</div><div class='add'>+	struct nouveau_fence_chan base;</div><div class='add'>+	struct nouveau_vma vma;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nvc0_fence_emit(struct nouveau_fence *fence)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_channel *chan = fence-&gt;channel;</div><div class='add'>+	struct nvc0_fence_chan *fctx = chan-&gt;engctx[NVOBJ_ENGINE_FENCE];</div><div class='add'>+	u64 addr = fctx-&gt;vma.offset + chan-&gt;id * 16;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = RING_SPACE(chan, 5);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(addr));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(addr));</div><div class='add'>+		OUT_RING  (chan, fence-&gt;sequence);</div><div class='add'>+		OUT_RING  (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG);</div><div class='add'>+		FIRE_RING (chan);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nvc0_fence_sync(struct nouveau_fence *fence,</div><div class='add'>+		struct nouveau_channel *prev, struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	struct nvc0_fence_chan *fctx = chan-&gt;engctx[NVOBJ_ENGINE_FENCE];</div><div class='add'>+	u64 addr = fctx-&gt;vma.offset + prev-&gt;id * 16;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = RING_SPACE(chan, 5);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);</div><div class='add'>+		OUT_RING  (chan, upper_32_bits(addr));</div><div class='add'>+		OUT_RING  (chan, lower_32_bits(addr));</div><div class='add'>+		OUT_RING  (chan, fence-&gt;sequence);</div><div class='add'>+		OUT_RING  (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL |</div><div class='add'>+				 NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD);</div><div class='add'>+		FIRE_RING (chan);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+nvc0_fence_read(struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	struct nvc0_fence_priv *priv = nv_engine(chan-&gt;dev, NVOBJ_ENGINE_FENCE);</div><div class='add'>+	return nouveau_bo_rd32(priv-&gt;bo, chan-&gt;id * 16/4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nvc0_fence_context_del(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nvc0_fence_priv *priv = nv_engine(chan-&gt;dev, engine);</div><div class='add'>+	struct nvc0_fence_chan *fctx = chan-&gt;engctx[engine];</div><div class='add'>+</div><div class='add'>+	nouveau_bo_vma_del(priv-&gt;bo, &amp;fctx-&gt;vma);</div><div class='add'>+	nouveau_fence_context_del(&amp;fctx-&gt;base);</div><div class='add'>+	chan-&gt;engctx[engine] = NULL;</div><div class='add'>+	kfree(fctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nvc0_fence_context_new(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nvc0_fence_priv *priv = nv_engine(chan-&gt;dev, engine);</div><div class='add'>+	struct nvc0_fence_chan *fctx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	fctx = chan-&gt;engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL);</div><div class='add'>+	if (!fctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	nouveau_fence_context_new(&amp;fctx-&gt;base);</div><div class='add'>+</div><div class='add'>+	ret = nouveau_bo_vma_add(priv-&gt;bo, chan-&gt;vm, &amp;fctx-&gt;vma);</div><div class='add'>+	if (ret)</div><div class='add'>+		nvc0_fence_context_del(chan, engine);</div><div class='add'>+</div><div class='add'>+	nouveau_bo_wr32(priv-&gt;bo, chan-&gt;id * 16/4, 0x00000000);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nvc0_fence_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nvc0_fence_init(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nvc0_fence_destroy(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nvc0_fence_priv *priv = nv_engine(dev, engine);</div><div class='add'>+</div><div class='add'>+	nouveau_bo_unmap(priv-&gt;bo);</div><div class='add'>+	nouveau_bo_ref(NULL, &amp;priv-&gt;bo);</div><div class='add'>+	dev_priv-&gt;eng[engine] = NULL;</div><div class='add'>+	kfree(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nvc0_fence_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nvc0_fence_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;base.engine.destroy = nvc0_fence_destroy;</div><div class='add'>+	priv-&gt;base.engine.init = nvc0_fence_init;</div><div class='add'>+	priv-&gt;base.engine.fini = nvc0_fence_fini;</div><div class='add'>+	priv-&gt;base.engine.context_new = nvc0_fence_context_new;</div><div class='add'>+	priv-&gt;base.engine.context_del = nvc0_fence_context_del;</div><div class='add'>+	priv-&gt;base.emit = nvc0_fence_emit;</div><div class='add'>+	priv-&gt;base.sync = nvc0_fence_sync;</div><div class='add'>+	priv-&gt;base.read = nvc0_fence_read;</div><div class='add'>+	dev_priv-&gt;eng[NVOBJ_ENGINE_FENCE] = &amp;priv-&gt;base.engine;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_bo_new(dev, 16 * pfifo-&gt;channels, 0, TTM_PL_FLAG_VRAM,</div><div class='add'>+			     0, 0, NULL, &amp;priv-&gt;bo);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		ret = nouveau_bo_pin(priv-&gt;bo, TTM_PL_FLAG_VRAM);</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			ret = nouveau_bo_map(priv-&gt;bo);</div><div class='add'>+		if (ret)</div><div class='add'>+			nouveau_bo_ref(NULL, &amp;priv-&gt;bo);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		nvc0_fence_destroy(dev, NVOBJ_ENGINE_FENCE);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nvc0_fifo.c b/drivers/gpu/drm/nouveau/nvc0_fifo.c<br/>index 50d68a7a1379..7d85553d518c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvc0_fifo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nvc0_fifo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvc0_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_fifo.c</a></div><div class='hunk'>@@ -26,10 +26,12 @@</div><div class='ctx'> </div><div class='ctx'> #include "nouveau_drv.h"</div><div class='ctx'> #include "nouveau_mm.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> </div><div class='ctx'> static void nvc0_fifo_isr(struct drm_device *);</div><div class='ctx'> </div><div class='ctx'> struct nvc0_fifo_priv {</div><div class='add'>+	struct nouveau_fifo_priv base;</div><div class='ctx'> 	struct nouveau_gpuobj *playlist[2];</div><div class='ctx'> 	int cur_playlist;</div><div class='ctx'> 	struct nouveau_vma user_vma;</div><div class='hunk'>@@ -37,8 +39,8 @@ struct nvc0_fifo_priv {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct nvc0_fifo_chan {</div><div class='add'>+	struct nouveau_fifo_chan base;</div><div class='ctx'> 	struct nouveau_gpuobj *user;</div><div class='del'>-	struct nouveau_gpuobj *ramfc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -46,8 +48,7 @@ nvc0_fifo_playlist_update(struct drm_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_instmem_engine *pinstmem = &amp;dev_priv-&gt;engine.instmem;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	struct nvc0_fifo_priv *priv = pfifo-&gt;priv;</div><div class='add'>+	struct nvc0_fifo_priv *priv = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct nouveau_gpuobj *cur;</div><div class='ctx'> 	int i, p;</div><div class='ctx'> </div><div class='hunk'>@@ -69,59 +70,20 @@ nvc0_fifo_playlist_update(struct drm_device *dev)</div><div class='ctx'> 		NV_ERROR(dev, "PFIFO - playlist update failed\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void</div><div class='del'>-nvc0_fifo_disable(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-nvc0_fifo_enable(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool</div><div class='del'>-nvc0_fifo_reassign(struct drm_device *dev, bool enable)</div><div class='del'>-{</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool</div><div class='del'>-nvc0_fifo_cache_pull(struct drm_device *dev, bool enable)</div><div class='del'>-{</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nvc0_fifo_channel_id(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	return 127;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nvc0_fifo_create_context(struct nouveau_channel *chan)</div><div class='add'>+static int</div><div class='add'>+nvc0_fifo_context_new(struct nouveau_channel *chan, int engine)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_instmem_engine *pinstmem = &amp;dev_priv-&gt;engine.instmem;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	struct nvc0_fifo_priv *priv = pfifo-&gt;priv;</div><div class='del'>-	struct nvc0_fifo_chan *fifoch;</div><div class='add'>+	struct nvc0_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	struct nvc0_fifo_chan *fctx;</div><div class='ctx'> 	u64 ib_virt = chan-&gt;pushbuf_base + chan-&gt;dma.ib_base * 4;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, i;</div><div class='ctx'> </div><div class='del'>-	chan-&gt;fifo_priv = kzalloc(sizeof(*fifoch), GFP_KERNEL);</div><div class='del'>-	if (!chan-&gt;fifo_priv)</div><div class='add'>+	fctx = chan-&gt;engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL);</div><div class='add'>+	if (!fctx)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	fifoch = chan-&gt;fifo_priv;</div><div class='del'>-</div><div class='del'>-	/* allocate vram for control regs, map into polling area */</div><div class='del'>-	ret = nouveau_gpuobj_new(dev, NULL, 0x1000, 0x1000,</div><div class='del'>-				 NVOBJ_FLAG_ZERO_ALLOC, &amp;fifoch-&gt;user);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	nouveau_vm_map_at(&amp;priv-&gt;user_vma, chan-&gt;id * 0x1000,</div><div class='del'>-			  *(struct nouveau_mem **)fifoch-&gt;user-&gt;node);</div><div class='ctx'> </div><div class='ctx'> 	chan-&gt;user = ioremap_wc(pci_resource_start(dev-&gt;pdev, 1) +</div><div class='ctx'> 				priv-&gt;user_vma.offset + (chan-&gt;id * 0x1000),</div><div class='hunk'>@@ -131,176 +93,77 @@ nvc0_fifo_create_context(struct nouveau_channel *chan)</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* ramfc */</div><div class='del'>-	ret = nouveau_gpuobj_new_fake(dev, chan-&gt;ramin-&gt;pinst,</div><div class='del'>-				      chan-&gt;ramin-&gt;vinst, 0x100,</div><div class='del'>-				      NVOBJ_FLAG_ZERO_ALLOC, &amp;fifoch-&gt;ramfc);</div><div class='add'>+	/* allocate vram for control regs, map into polling area */</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, NULL, 0x1000, 0x1000,</div><div class='add'>+				 NVOBJ_FLAG_ZERO_ALLOC, &amp;fctx-&gt;user);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0x08, lower_32_bits(fifoch-&gt;user-&gt;vinst));</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0x0c, upper_32_bits(fifoch-&gt;user-&gt;vinst));</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0x10, 0x0000face);</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0x30, 0xfffff902);</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0x48, lower_32_bits(ib_virt));</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0x4c, drm_order(chan-&gt;dma.ib_max + 1) &lt;&lt; 16 |</div><div class='add'>+	nouveau_vm_map_at(&amp;priv-&gt;user_vma, chan-&gt;id * 0x1000,</div><div class='add'>+			  *(struct nouveau_mem **)fctx-&gt;user-&gt;node);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 0x100; i += 4)</div><div class='add'>+		nv_wo32(chan-&gt;ramin, i, 0x00000000);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x08, lower_32_bits(fctx-&gt;user-&gt;vinst));</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x0c, upper_32_bits(fctx-&gt;user-&gt;vinst));</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x10, 0x0000face);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x30, 0xfffff902);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x48, lower_32_bits(ib_virt));</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x4c, drm_order(chan-&gt;dma.ib_max + 1) &lt;&lt; 16 |</div><div class='ctx'> 				   upper_32_bits(ib_virt));</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0x54, 0x00000002);</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0x84, 0x20400000);</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0x94, 0x30000001);</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0x9c, 0x00000100);</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0xa4, 0x1f1f1f1f);</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0xa8, 0x1f1f1f1f);</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0xac, 0x0000001f);</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0xb8, 0xf8000000);</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0xf8, 0x10003080); /* 0x002310 */</div><div class='del'>-	nv_wo32(fifoch-&gt;ramfc, 0xfc, 0x10000010); /* 0x002350 */</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x54, 0x00000002);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x84, 0x20400000);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x94, 0x30000001);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x9c, 0x00000100);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xa4, 0x1f1f1f1f);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xa8, 0x1f1f1f1f);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xac, 0x0000001f);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xb8, 0xf8000000);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xf8, 0x10003080); /* 0x002310 */</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xfc, 0x10000010); /* 0x002350 */</div><div class='ctx'> 	pinstmem-&gt;flush(dev);</div><div class='ctx'> </div><div class='ctx'> 	nv_wr32(dev, 0x003000 + (chan-&gt;id * 8), 0xc0000000 |</div><div class='ctx'> 						(chan-&gt;ramin-&gt;vinst &gt;&gt; 12));</div><div class='ctx'> 	nv_wr32(dev, 0x003004 + (chan-&gt;id * 8), 0x001f0001);</div><div class='ctx'> 	nvc0_fifo_playlist_update(dev);</div><div class='del'>-	return 0;</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='del'>-	pfifo-&gt;destroy_context(chan);</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.base.context_del(chan, engine);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void</div><div class='del'>-nvc0_fifo_destroy_context(struct nouveau_channel *chan)</div><div class='add'>+static void</div><div class='add'>+nvc0_fifo_context_del(struct nouveau_channel *chan, int engine)</div><div class='ctx'> {</div><div class='add'>+	struct nvc0_fifo_chan *fctx = chan-&gt;engctx[engine];</div><div class='ctx'> 	struct drm_device *dev = chan-&gt;dev;</div><div class='del'>-	struct nvc0_fifo_chan *fifoch;</div><div class='ctx'> </div><div class='ctx'> 	nv_mask(dev, 0x003004 + (chan-&gt;id * 8), 0x00000001, 0x00000000);</div><div class='ctx'> 	nv_wr32(dev, 0x002634, chan-&gt;id);</div><div class='ctx'> 	if (!nv_wait(dev, 0x0002634, 0xffffffff, chan-&gt;id))</div><div class='ctx'> 		NV_WARN(dev, "0x2634 != chid: 0x%08x\n", nv_rd32(dev, 0x2634));</div><div class='del'>-</div><div class='ctx'> 	nvc0_fifo_playlist_update(dev);</div><div class='del'>-</div><div class='ctx'> 	nv_wr32(dev, 0x003000 + (chan-&gt;id * 8), 0x00000000);</div><div class='ctx'> </div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;fctx-&gt;user);</div><div class='ctx'> 	if (chan-&gt;user) {</div><div class='ctx'> 		iounmap(chan-&gt;user);</div><div class='ctx'> 		chan-&gt;user = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fifoch = chan-&gt;fifo_priv;</div><div class='del'>-	chan-&gt;fifo_priv = NULL;</div><div class='del'>-	if (!fifoch)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;fifoch-&gt;ramfc);</div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;fifoch-&gt;user);</div><div class='del'>-	kfree(fifoch);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nvc0_fifo_load_context(struct nouveau_channel *chan)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nvc0_fifo_unload_context(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 128; i++) {</div><div class='del'>-		if (!(nv_rd32(dev, 0x003004 + (i * 8)) &amp; 1))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		nv_mask(dev, 0x003004 + (i * 8), 0x00000001, 0x00000000);</div><div class='del'>-		nv_wr32(dev, 0x002634, i);</div><div class='del'>-		if (!nv_wait(dev, 0x002634, 0xffffffff, i)) {</div><div class='del'>-			NV_INFO(dev, "PFIFO: kick ch %d failed: 0x%08x\n",</div><div class='del'>-				i, nv_rd32(dev, 0x002634));</div><div class='del'>-			return -EBUSY;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-nvc0_fifo_destroy(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	struct nvc0_fifo_priv *priv;</div><div class='del'>-</div><div class='del'>-	priv = pfifo-&gt;priv;</div><div class='del'>-	if (!priv)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	nouveau_vm_put(&amp;priv-&gt;user_vma);</div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;priv-&gt;playlist[1]);</div><div class='del'>-	nouveau_gpuobj_ref(NULL, &amp;priv-&gt;playlist[0]);</div><div class='del'>-	kfree(priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-nvc0_fifo_takedown(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	nv_wr32(dev, 0x002140, 0x00000000);</div><div class='del'>-	nvc0_fifo_destroy(dev);</div><div class='add'>+	chan-&gt;engctx[engine] = NULL;</div><div class='add'>+	kfree(fctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-nvc0_fifo_create(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='del'>-	struct nvc0_fifo_priv *priv;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='del'>-	if (!priv)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	pfifo-&gt;priv = priv;</div><div class='del'>-</div><div class='del'>-	ret = nouveau_gpuobj_new(dev, NULL, 0x1000, 0x1000, 0,</div><div class='del'>-				 &amp;priv-&gt;playlist[0]);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	ret = nouveau_gpuobj_new(dev, NULL, 0x1000, 0x1000, 0,</div><div class='del'>-				 &amp;priv-&gt;playlist[1]);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	ret = nouveau_vm_get(dev_priv-&gt;bar1_vm, pfifo-&gt;channels * 0x1000,</div><div class='del'>-			     12, NV_MEM_ACCESS_RW, &amp;priv-&gt;user_vma);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	nouveau_irq_register(dev, 8, nvc0_fifo_isr);</div><div class='del'>-	NVOBJ_CLASS(dev, 0x506e, SW); /* nvsw */</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	nvc0_fifo_destroy(dev);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-nvc0_fifo_init(struct drm_device *dev)</div><div class='add'>+nvc0_fifo_init(struct drm_device *dev, int engine)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='del'>-	struct nouveau_fifo_engine *pfifo = &amp;dev_priv-&gt;engine.fifo;</div><div class='add'>+	struct nvc0_fifo_priv *priv = nv_engine(dev, engine);</div><div class='ctx'> 	struct nouveau_channel *chan;</div><div class='del'>-	struct nvc0_fifo_priv *priv;</div><div class='del'>-	int ret, i;</div><div class='del'>-</div><div class='del'>-	if (!pfifo-&gt;priv) {</div><div class='del'>-		ret = nvc0_fifo_create(dev);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-	priv = pfifo-&gt;priv;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* reset PFIFO, enable all available PSUBFIFO areas */</div><div class='ctx'> 	nv_mask(dev, 0x000200, 0x00000100, 0x00000000);</div><div class='hunk'>@@ -338,7 +201,7 @@ nvc0_fifo_init(struct drm_device *dev)</div><div class='ctx'> 	/* restore PFIFO context table */</div><div class='ctx'> 	for (i = 0; i &lt; 128; i++) {</div><div class='ctx'> 		chan = dev_priv-&gt;channels.ptr[i];</div><div class='del'>-		if (!chan || !chan-&gt;fifo_priv)</div><div class='add'>+		if (!chan || !chan-&gt;engctx[engine])</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		nv_wr32(dev, 0x003000 + (i * 8), 0xc0000000 |</div><div class='hunk'>@@ -350,6 +213,29 @@ nvc0_fifo_init(struct drm_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+nvc0_fifo_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 128; i++) {</div><div class='add'>+		if (!(nv_rd32(dev, 0x003004 + (i * 8)) &amp; 1))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		nv_mask(dev, 0x003004 + (i * 8), 0x00000001, 0x00000000);</div><div class='add'>+		nv_wr32(dev, 0x002634, i);</div><div class='add'>+		if (!nv_wait(dev, 0x002634, 0xffffffff, i)) {</div><div class='add'>+			NV_INFO(dev, "PFIFO: kick ch %d failed: 0x%08x\n",</div><div class='add'>+				i, nv_rd32(dev, 0x002634));</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x002140, 0x00000000);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> struct nouveau_enum nvc0_fifo_fault_unit[] = {</div><div class='ctx'> 	{ 0x00, "PGRAPH" },</div><div class='ctx'> 	{ 0x03, "PEEPHOLE" },</div><div class='hunk'>@@ -439,13 +325,14 @@ nvc0_fifo_isr_vm_fault(struct drm_device *dev, int unit)</div><div class='ctx'> static int</div><div class='ctx'> nvc0_fifo_page_flip(struct drm_device *dev, u32 chid)</div><div class='ctx'> {</div><div class='add'>+	struct nvc0_fifo_priv *priv = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_channel *chan = NULL;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;channels.lock, flags);</div><div class='del'>-	if (likely(chid &gt;= 0 &amp;&amp; chid &lt; dev_priv-&gt;engine.fifo.channels)) {</div><div class='add'>+	if (likely(chid &gt;= 0 &amp;&amp; chid &lt; priv-&gt;base.channels)) {</div><div class='ctx'> 		chan = dev_priv-&gt;channels.ptr[chid];</div><div class='ctx'> 		if (likely(chan))</div><div class='ctx'> 			ret = nouveau_finish_page_flip(chan, NULL);</div><div class='hunk'>@@ -534,3 +421,56 @@ nvc0_fifo_isr(struct drm_device *dev)</div><div class='ctx'> 		nv_wr32(dev, 0x002140, 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nvc0_fifo_destroy(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nvc0_fifo_priv *priv = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	nouveau_vm_put(&amp;priv-&gt;user_vma);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;priv-&gt;playlist[1]);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;priv-&gt;playlist[0]);</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;eng[engine] = NULL;</div><div class='add'>+	kfree(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nvc0_fifo_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nvc0_fifo_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;base.base.destroy = nvc0_fifo_destroy;</div><div class='add'>+	priv-&gt;base.base.init = nvc0_fifo_init;</div><div class='add'>+	priv-&gt;base.base.fini = nvc0_fifo_fini;</div><div class='add'>+	priv-&gt;base.base.context_new = nvc0_fifo_context_new;</div><div class='add'>+	priv-&gt;base.base.context_del = nvc0_fifo_context_del;</div><div class='add'>+	priv-&gt;base.channels = 128;</div><div class='add'>+	dev_priv-&gt;eng[NVOBJ_ENGINE_FIFO] = &amp;priv-&gt;base.base;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, NULL, 4096, 4096, 0, &amp;priv-&gt;playlist[0]);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, NULL, 4096, 4096, 0, &amp;priv-&gt;playlist[1]);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_vm_get(dev_priv-&gt;bar1_vm, priv-&gt;base.channels * 0x1000,</div><div class='add'>+			     12, NV_MEM_ACCESS_RW, &amp;priv-&gt;user_vma);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	nouveau_irq_register(dev, 8, nvc0_fifo_isr);</div><div class='add'>+error:</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.base.destroy(dev, NVOBJ_ENGINE_FIFO);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c<br/>index 9066102d1159..2a01e6e47724 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvc0_graph.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nvc0_graph.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvc0_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_graph.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "nouveau_drv.h"</div><div class='ctx'> #include "nouveau_mm.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='ctx'> </div><div class='ctx'> #include "nvc0_graph.h"</div><div class='ctx'> #include "nvc0_grhub.fuc.h"</div><div class='hunk'>@@ -620,13 +621,14 @@ nvc0_graph_init(struct drm_device *dev, int engine)</div><div class='ctx'> int</div><div class='ctx'> nvc0_graph_isr_chid(struct drm_device *dev, u64 inst)</div><div class='ctx'> {</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='ctx'> 	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='ctx'> 	struct nouveau_channel *chan;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;dev_priv-&gt;channels.lock, flags);</div><div class='del'>-	for (i = 0; i &lt; dev_priv-&gt;engine.fifo.channels; i++) {</div><div class='add'>+	for (i = 0; i &lt; pfifo-&gt;channels; i++) {</div><div class='ctx'> 		chan = dev_priv-&gt;channels.ptr[i];</div><div class='ctx'> 		if (!chan || !chan-&gt;ramin)</div><div class='ctx'> 			continue;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nvc0_pm.c b/drivers/gpu/drm/nouveau/nvc0_pm.c<br/>index ce65f81bb871..7c95c44e2887 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvc0_pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nvc0_pm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvc0_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_pm.c</a></div><div class='hunk'>@@ -164,7 +164,9 @@ struct nvc0_pm_clock {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct nvc0_pm_state {</div><div class='add'>+	struct nouveau_pm_level *perflvl;</div><div class='ctx'> 	struct nvc0_pm_clock eng[16];</div><div class='add'>+	struct nvc0_pm_clock mem;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u32</div><div class='hunk'>@@ -303,6 +305,48 @@ calc_clk(struct drm_device *dev, int clk, struct nvc0_pm_clock *info, u32 freq)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+calc_mem(struct drm_device *dev, struct nvc0_pm_clock *info, u32 freq)</div><div class='add'>+{</div><div class='add'>+	struct pll_lims pll;</div><div class='add'>+	int N, M, P, ret;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+</div><div class='add'>+	/* mclk pll input freq comes from another pll, make sure it's on */</div><div class='add'>+	ctrl = nv_rd32(dev, 0x132020);</div><div class='add'>+	if (!(ctrl &amp; 0x00000001)) {</div><div class='add'>+		/* if not, program it to 567MHz.  nfi where this value comes</div><div class='add'>+		 * from - it looks like it's in the pll limits table for</div><div class='add'>+		 * 132000 but the binary driver ignores all my attempts to</div><div class='add'>+		 * change this value.</div><div class='add'>+		 */</div><div class='add'>+		nv_wr32(dev, 0x137320, 0x00000103);</div><div class='add'>+		nv_wr32(dev, 0x137330, 0x81200606);</div><div class='add'>+		nv_wait(dev, 0x132020, 0x00010000, 0x00010000);</div><div class='add'>+		nv_wr32(dev, 0x132024, 0x0001150f);</div><div class='add'>+		nv_mask(dev, 0x132020, 0x00000001, 0x00000001);</div><div class='add'>+		nv_wait(dev, 0x137390, 0x00020000, 0x00020000);</div><div class='add'>+		nv_mask(dev, 0x132020, 0x00000004, 0x00000004);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* for the moment, until the clock tree is better understood, use</div><div class='add'>+	 * pll mode for all clock frequencies</div><div class='add'>+	 */</div><div class='add'>+	ret = get_pll_limits(dev, 0x132000, &amp;pll);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		pll.refclk = read_pll(dev, 0x132020);</div><div class='add'>+		if (pll.refclk) {</div><div class='add'>+			ret = nva3_calc_pll(dev, &amp;pll, freq, &amp;N, NULL, &amp;M, &amp;P);</div><div class='add'>+			if (ret &gt; 0) {</div><div class='add'>+				info-&gt;coef = (P &lt;&lt; 16) | (N &lt;&lt; 8) | M;</div><div class='add'>+				return 0;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void *</div><div class='ctx'> nvc0_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl)</div><div class='ctx'> {</div><div class='hunk'>@@ -335,6 +379,15 @@ nvc0_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl)</div><div class='ctx'> 		return ERR_PTR(ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (perflvl-&gt;memory) {</div><div class='add'>+		ret = calc_mem(dev, &amp;info-&gt;mem, perflvl-&gt;memory);</div><div class='add'>+		if (ret) {</div><div class='add'>+			kfree(info);</div><div class='add'>+			return ERR_PTR(ret);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info-&gt;perflvl = perflvl;</div><div class='ctx'> 	return info;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -375,12 +428,148 @@ prog_clk(struct drm_device *dev, int clk, struct nvc0_pm_clock *info)</div><div class='ctx'> 	nv_mask(dev, 0x137250 + (clk * 0x04), 0x00003f3f, info-&gt;mdiv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+mclk_precharge(struct nouveau_mem_exec_func *exec)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_refresh(struct nouveau_mem_exec_func *exec)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_refresh_auto(struct nouveau_mem_exec_func *exec, bool enable)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(exec-&gt;dev, 0x10f210, enable ? 0x80000000 : 0x00000000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_refresh_self(struct nouveau_mem_exec_func *exec, bool enable)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_wait(struct nouveau_mem_exec_func *exec, u32 nsec)</div><div class='add'>+{</div><div class='add'>+	udelay((nsec + 500) / 1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+mclk_mrg(struct nouveau_mem_exec_func *exec, int mr)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = exec-&gt;dev;</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	if (dev_priv-&gt;vram_type != NV_MEM_TYPE_GDDR5) {</div><div class='add'>+		if (mr &lt;= 1)</div><div class='add'>+			return nv_rd32(dev, 0x10f300 + ((mr - 0) * 4));</div><div class='add'>+		return nv_rd32(dev, 0x10f320 + ((mr - 2) * 4));</div><div class='add'>+	} else {</div><div class='add'>+		if (mr == 0)</div><div class='add'>+			return nv_rd32(dev, 0x10f300 + (mr * 4));</div><div class='add'>+		else</div><div class='add'>+		if (mr &lt;= 7)</div><div class='add'>+			return nv_rd32(dev, 0x10f32c + (mr * 4));</div><div class='add'>+		return nv_rd32(dev, 0x10f34c);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_mrs(struct nouveau_mem_exec_func *exec, int mr, u32 data)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = exec-&gt;dev;</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	if (dev_priv-&gt;vram_type != NV_MEM_TYPE_GDDR5) {</div><div class='add'>+		if (mr &lt;= 1) {</div><div class='add'>+			nv_wr32(dev, 0x10f300 + ((mr - 0) * 4), data);</div><div class='add'>+			if (dev_priv-&gt;vram_rank_B)</div><div class='add'>+				nv_wr32(dev, 0x10f308 + ((mr - 0) * 4), data);</div><div class='add'>+		} else</div><div class='add'>+		if (mr &lt;= 3) {</div><div class='add'>+			nv_wr32(dev, 0x10f320 + ((mr - 2) * 4), data);</div><div class='add'>+			if (dev_priv-&gt;vram_rank_B)</div><div class='add'>+				nv_wr32(dev, 0x10f328 + ((mr - 2) * 4), data);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if      (mr ==  0) nv_wr32(dev, 0x10f300 + (mr * 4), data);</div><div class='add'>+		else if (mr &lt;=  7) nv_wr32(dev, 0x10f32c + (mr * 4), data);</div><div class='add'>+		else if (mr == 15) nv_wr32(dev, 0x10f34c, data);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_clock_set(struct nouveau_mem_exec_func *exec)</div><div class='add'>+{</div><div class='add'>+	struct nvc0_pm_state *info = exec-&gt;priv;</div><div class='add'>+	struct drm_device *dev = exec-&gt;dev;</div><div class='add'>+	u32 ctrl = nv_rd32(dev, 0x132000);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x137360, 0x00000001);</div><div class='add'>+	nv_wr32(dev, 0x137370, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x137380, 0x00000000);</div><div class='add'>+	if (ctrl &amp; 0x00000001)</div><div class='add'>+		nv_wr32(dev, 0x132000, (ctrl &amp;= ~0x00000001));</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x132004, info-&gt;mem.coef);</div><div class='add'>+	nv_wr32(dev, 0x132000, (ctrl |= 0x00000001));</div><div class='add'>+	nv_wait(dev, 0x137390, 0x00000002, 0x00000002);</div><div class='add'>+	nv_wr32(dev, 0x132018, 0x00005000);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x137370, 0x00000001);</div><div class='add'>+	nv_wr32(dev, 0x137380, 0x00000001);</div><div class='add'>+	nv_wr32(dev, 0x137360, 0x00000000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mclk_timing_set(struct nouveau_mem_exec_func *exec)</div><div class='add'>+{</div><div class='add'>+	struct nvc0_pm_state *info = exec-&gt;priv;</div><div class='add'>+	struct nouveau_pm_level *perflvl = info-&gt;perflvl;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 5; i++)</div><div class='add'>+		nv_wr32(exec-&gt;dev, 0x10f290 + (i * 4), perflvl-&gt;timing.reg[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+prog_mem(struct drm_device *dev, struct nvc0_pm_state *info)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nouveau_mem_exec_func exec = {</div><div class='add'>+		.dev = dev,</div><div class='add'>+		.precharge = mclk_precharge,</div><div class='add'>+		.refresh = mclk_refresh,</div><div class='add'>+		.refresh_auto = mclk_refresh_auto,</div><div class='add'>+		.refresh_self = mclk_refresh_self,</div><div class='add'>+		.wait = mclk_wait,</div><div class='add'>+		.mrg = mclk_mrg,</div><div class='add'>+		.mrs = mclk_mrs,</div><div class='add'>+		.clock_set = mclk_clock_set,</div><div class='add'>+		.timing_set = mclk_timing_set,</div><div class='add'>+		.priv = info</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;chipset &lt; 0xd0)</div><div class='add'>+		nv_wr32(dev, 0x611200, 0x00003300);</div><div class='add'>+	else</div><div class='add'>+		nv_wr32(dev, 0x62c000, 0x03030000);</div><div class='add'>+</div><div class='add'>+	nouveau_mem_exec(&amp;exec, info-&gt;perflvl);</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;chipset &lt; 0xd0)</div><div class='add'>+		nv_wr32(dev, 0x611200, 0x00003300);</div><div class='add'>+	else</div><div class='add'>+		nv_wr32(dev, 0x62c000, 0x03030300);</div><div class='add'>+}</div><div class='ctx'> int</div><div class='ctx'> nvc0_pm_clocks_set(struct drm_device *dev, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct nvc0_pm_state *info = data;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (info-&gt;mem.coef)</div><div class='add'>+		prog_mem(dev, info);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; 16; i++) {</div><div class='ctx'> 		if (!info-&gt;eng[i].freq)</div><div class='ctx'> 			continue;</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nvc0_software.c b/drivers/gpu/drm/nouveau/nvc0_software.c<br/>new file mode 100644<br/>index 000000000000..93e8c164fec6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvc0_software.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvc0_software.c</a></div><div class='hunk'>@@ -0,0 +1,153 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ben Skeggs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_ramht.h"</div><div class='add'>+#include "nouveau_software.h"</div><div class='add'>+</div><div class='add'>+#include "nv50_display.h"</div><div class='add'>+</div><div class='add'>+struct nvc0_software_priv {</div><div class='add'>+	struct nouveau_software_priv base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nvc0_software_chan {</div><div class='add'>+	struct nouveau_software_chan base;</div><div class='add'>+	struct nouveau_vma dispc_vma[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u64</div><div class='add'>+nvc0_software_crtc(struct nouveau_channel *chan, int crtc)</div><div class='add'>+{</div><div class='add'>+	struct nvc0_software_chan *pch = chan-&gt;engctx[NVOBJ_ENGINE_SW];</div><div class='add'>+	return pch-&gt;dispc_vma[crtc].offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nvc0_software_context_new(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nvc0_software_priv *psw = nv_engine(dev, NVOBJ_ENGINE_SW);</div><div class='add'>+	struct nvc0_software_chan *pch;</div><div class='add'>+	int ret = 0, i;</div><div class='add'>+</div><div class='add'>+	pch = kzalloc(sizeof(*pch), GFP_KERNEL);</div><div class='add'>+	if (!pch)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	nouveau_software_context_new(&amp;pch-&gt;base);</div><div class='add'>+	chan-&gt;engctx[engine] = pch;</div><div class='add'>+</div><div class='add'>+	/* map display semaphore buffers into channel's vm */</div><div class='add'>+	for (i = 0; !ret &amp;&amp; i &lt; dev-&gt;mode_config.num_crtc; i++) {</div><div class='add'>+		struct nouveau_bo *bo;</div><div class='add'>+		if (dev_priv-&gt;card_type &gt;= NV_D0)</div><div class='add'>+			bo = nvd0_display_crtc_sema(dev, i);</div><div class='add'>+		else</div><div class='add'>+			bo = nv50_display(dev)-&gt;crtc[i].sem.bo;</div><div class='add'>+</div><div class='add'>+		ret = nouveau_bo_vma_add(bo, chan-&gt;vm, &amp;pch-&gt;dispc_vma[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		psw-&gt;base.base.context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nvc0_software_context_del(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nvc0_software_chan *pch = chan-&gt;engctx[engine];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (dev_priv-&gt;card_type &gt;= NV_D0) {</div><div class='add'>+		for (i = 0; i &lt; dev-&gt;mode_config.num_crtc; i++) {</div><div class='add'>+			struct nouveau_bo *bo = nvd0_display_crtc_sema(dev, i);</div><div class='add'>+			nouveau_bo_vma_del(bo, &amp;pch-&gt;dispc_vma[i]);</div><div class='add'>+		}</div><div class='add'>+	} else</div><div class='add'>+	if (dev_priv-&gt;card_type &gt;= NV_50) {</div><div class='add'>+		struct nv50_display *disp = nv50_display(dev);</div><div class='add'>+		for (i = 0; i &lt; dev-&gt;mode_config.num_crtc; i++) {</div><div class='add'>+			struct nv50_display_crtc *dispc = &amp;disp-&gt;crtc[i];</div><div class='add'>+			nouveau_bo_vma_del(dispc-&gt;sem.bo, &amp;pch-&gt;dispc_vma[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chan-&gt;engctx[engine] = NULL;</div><div class='add'>+	kfree(pch);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nvc0_software_object_new(struct nouveau_channel *chan, int engine,</div><div class='add'>+			 u32 handle, u16 class)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nvc0_software_init(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nvc0_software_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nvc0_software_destroy(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nvc0_software_priv *psw = nv_engine(dev, engine);</div><div class='add'>+</div><div class='add'>+	NVOBJ_ENGINE_DEL(dev, SW);</div><div class='add'>+	kfree(psw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nvc0_software_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct nvc0_software_priv *psw = kzalloc(sizeof(*psw), GFP_KERNEL);</div><div class='add'>+	if (!psw)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	psw-&gt;base.base.destroy = nvc0_software_destroy;</div><div class='add'>+	psw-&gt;base.base.init = nvc0_software_init;</div><div class='add'>+	psw-&gt;base.base.fini = nvc0_software_fini;</div><div class='add'>+	psw-&gt;base.base.context_new = nvc0_software_context_new;</div><div class='add'>+	psw-&gt;base.base.context_del = nvc0_software_context_del;</div><div class='add'>+	psw-&gt;base.base.object_new = nvc0_software_object_new;</div><div class='add'>+	nouveau_software_create(&amp;psw-&gt;base);</div><div class='add'>+</div><div class='add'>+	NVOBJ_ENGINE_ADD(dev, SW, &amp;psw-&gt;base.base);</div><div class='add'>+	NVOBJ_CLASS(dev, 0x906e, SW);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c<br/>index 0247250939e8..c486d3ce3c2c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvd0_display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/nouveau/nvd0_display.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nvd0_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nvd0_display.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> #include "nouveau_crtc.h"</div><div class='ctx'> #include "nouveau_dma.h"</div><div class='ctx'> #include "nouveau_fb.h"</div><div class='add'>+#include "nouveau_software.h"</div><div class='ctx'> #include "nv50_display.h"</div><div class='ctx'> </div><div class='ctx'> #define EVO_DMA_NR 9</div><div class='hunk'>@@ -284,8 +285,6 @@ nvd0_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,</div><div class='ctx'> 	u32 *push;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	evo_sync(crtc-&gt;dev, EVO_MASTER);</div><div class='del'>-</div><div class='ctx'> 	swap_interval &lt;&lt;= 4;</div><div class='ctx'> 	if (swap_interval == 0)</div><div class='ctx'> 		swap_interval |= 0x100;</div><div class='hunk'>@@ -300,15 +299,16 @@ nvd0_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		offset  = chan-&gt;dispc_vma[nv_crtc-&gt;index].offset;</div><div class='add'>+</div><div class='add'>+		offset  = nvc0_software_crtc(chan, nv_crtc-&gt;index);</div><div class='ctx'> 		offset += evo-&gt;sem.offset;</div><div class='ctx'> </div><div class='del'>-		BEGIN_NVC0(chan, 2, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);</div><div class='add'>+		BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);</div><div class='ctx'> 		OUT_RING  (chan, upper_32_bits(offset));</div><div class='ctx'> 		OUT_RING  (chan, lower_32_bits(offset));</div><div class='ctx'> 		OUT_RING  (chan, 0xf00d0000 | evo-&gt;sem.value);</div><div class='ctx'> 		OUT_RING  (chan, 0x1002);</div><div class='del'>-		BEGIN_NVC0(chan, 2, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);</div><div class='add'>+		BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);</div><div class='ctx'> 		OUT_RING  (chan, upper_32_bits(offset));</div><div class='ctx'> 		OUT_RING  (chan, lower_32_bits(offset ^ 0x10));</div><div class='ctx'> 		OUT_RING  (chan, 0x74b1e000);</div><div class='hunk'>@@ -882,7 +882,7 @@ nvd0_crtc_create(struct drm_device *dev, int index)</div><div class='ctx'> 	drm_mode_crtc_set_gamma_size(crtc, 256);</div><div class='ctx'> </div><div class='ctx'> 	ret = nouveau_bo_new(dev, 64 * 64 * 4, 0x100, TTM_PL_FLAG_VRAM,</div><div class='del'>-			     0, 0x0000, &amp;nv_crtc-&gt;cursor.nvbo);</div><div class='add'>+			     0, 0x0000, NULL, &amp;nv_crtc-&gt;cursor.nvbo);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		ret = nouveau_bo_pin(nv_crtc-&gt;cursor.nvbo, TTM_PL_FLAG_VRAM);</div><div class='ctx'> 		if (!ret)</div><div class='hunk'>@@ -895,7 +895,7 @@ nvd0_crtc_create(struct drm_device *dev, int index)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ret = nouveau_bo_new(dev, 8192, 0x100, TTM_PL_FLAG_VRAM,</div><div class='del'>-			     0, 0x0000, &amp;nv_crtc-&gt;lut.nvbo);</div><div class='add'>+			     0, 0x0000, NULL, &amp;nv_crtc-&gt;lut.nvbo);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		ret = nouveau_bo_pin(nv_crtc-&gt;lut.nvbo, TTM_PL_FLAG_VRAM);</div><div class='ctx'> 		if (!ret)</div><div class='hunk'>@@ -2030,7 +2030,7 @@ nvd0_display_create(struct drm_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* small shared memory area we use for notifiers and semaphores */</div><div class='ctx'> 	ret = nouveau_bo_new(dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,</div><div class='del'>-			     0, 0x0000, &amp;disp-&gt;sync);</div><div class='add'>+			     0, 0x0000, NULL, &amp;disp-&gt;sync);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		ret = nouveau_bo_pin(disp-&gt;sync, TTM_PL_FLAG_VRAM);</div><div class='ctx'> 		if (!ret)</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nve0_fifo.c b/drivers/gpu/drm/nouveau/nve0_fifo.c<br/>new file mode 100644<br/>index 000000000000..1855ecbd843b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nve0_fifo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nve0_fifo.c</a></div><div class='hunk'>@@ -0,0 +1,423 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2010 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ben Skeggs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_mm.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='add'>+</div><div class='add'>+#define NVE0_FIFO_ENGINE_NUM 32</div><div class='add'>+</div><div class='add'>+static void nve0_fifo_isr(struct drm_device *);</div><div class='add'>+</div><div class='add'>+struct nve0_fifo_engine {</div><div class='add'>+	struct nouveau_gpuobj *playlist[2];</div><div class='add'>+	int cur_playlist;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nve0_fifo_priv {</div><div class='add'>+	struct nouveau_fifo_priv base;</div><div class='add'>+	struct nve0_fifo_engine engine[NVE0_FIFO_ENGINE_NUM];</div><div class='add'>+	struct {</div><div class='add'>+		struct nouveau_gpuobj *mem;</div><div class='add'>+		struct nouveau_vma bar;</div><div class='add'>+	} user;</div><div class='add'>+	int spoon_nr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nve0_fifo_chan {</div><div class='add'>+	struct nouveau_fifo_chan base;</div><div class='add'>+	u32 engine;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_fifo_playlist_update(struct drm_device *dev, u32 engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nouveau_instmem_engine *pinstmem = &amp;dev_priv-&gt;engine.instmem;</div><div class='add'>+	struct nve0_fifo_priv *priv = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='add'>+	struct nve0_fifo_engine *peng = &amp;priv-&gt;engine[engine];</div><div class='add'>+	struct nouveau_gpuobj *cur;</div><div class='add'>+	u32 match = (engine &lt;&lt; 16) | 0x00000001;</div><div class='add'>+	int ret, i, p;</div><div class='add'>+</div><div class='add'>+	cur = peng-&gt;playlist[peng-&gt;cur_playlist];</div><div class='add'>+	if (unlikely(cur == NULL)) {</div><div class='add'>+		ret = nouveau_gpuobj_new(dev, NULL, 0x8000, 0x1000, 0, &amp;cur);</div><div class='add'>+		if (ret) {</div><div class='add'>+			NV_ERROR(dev, "PFIFO: playlist alloc failed\n");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		peng-&gt;playlist[peng-&gt;cur_playlist] = cur;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	peng-&gt;cur_playlist = !peng-&gt;cur_playlist;</div><div class='add'>+</div><div class='add'>+	for (i = 0, p = 0; i &lt; priv-&gt;base.channels; i++) {</div><div class='add'>+		u32 ctrl = nv_rd32(dev, 0x800004 + (i * 8)) &amp; 0x001f0001;</div><div class='add'>+		if (ctrl != match)</div><div class='add'>+			continue;</div><div class='add'>+		nv_wo32(cur, p + 0, i);</div><div class='add'>+		nv_wo32(cur, p + 4, 0x00000000);</div><div class='add'>+		p += 8;</div><div class='add'>+	}</div><div class='add'>+	pinstmem-&gt;flush(dev);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x002270, cur-&gt;vinst &gt;&gt; 12);</div><div class='add'>+	nv_wr32(dev, 0x002274, (engine &lt;&lt; 20) | (p &gt;&gt; 3));</div><div class='add'>+	if (!nv_wait(dev, 0x002284 + (engine * 4), 0x00100000, 0x00000000))</div><div class='add'>+		NV_ERROR(dev, "PFIFO: playlist %d update timeout\n", engine);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_fifo_context_new(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nouveau_instmem_engine *pinstmem = &amp;dev_priv-&gt;engine.instmem;</div><div class='add'>+	struct nve0_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	struct nve0_fifo_chan *fctx;</div><div class='add'>+	u64 usermem = priv-&gt;user.mem-&gt;vinst + chan-&gt;id * 512;</div><div class='add'>+	u64 ib_virt = chan-&gt;pushbuf_base + chan-&gt;dma.ib_base * 4;</div><div class='add'>+	int ret = 0, i;</div><div class='add'>+</div><div class='add'>+	fctx = chan-&gt;engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL);</div><div class='add'>+	if (!fctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	fctx-&gt;engine = 0; /* PGRAPH */</div><div class='add'>+</div><div class='add'>+	/* allocate vram for control regs, map into polling area */</div><div class='add'>+	chan-&gt;user = ioremap_wc(pci_resource_start(dev-&gt;pdev, 1) +</div><div class='add'>+				priv-&gt;user.bar.offset + (chan-&gt;id * 512), 512);</div><div class='add'>+	if (!chan-&gt;user) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 0x100; i += 4)</div><div class='add'>+		nv_wo32(chan-&gt;ramin, i, 0x00000000);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x08, lower_32_bits(usermem));</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x0c, upper_32_bits(usermem));</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x10, 0x0000face);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x30, 0xfffff902);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x48, lower_32_bits(ib_virt));</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x4c, drm_order(chan-&gt;dma.ib_max + 1) &lt;&lt; 16 |</div><div class='add'>+				     upper_32_bits(ib_virt));</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x84, 0x20400000);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x94, 0x30000001);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x9c, 0x00000100);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xac, 0x0000001f);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xe4, 0x00000000);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xe8, chan-&gt;id);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xf8, 0x10003080); /* 0x002310 */</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0xfc, 0x10000010); /* 0x002350 */</div><div class='add'>+	pinstmem-&gt;flush(dev);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x800000 + (chan-&gt;id * 8), 0x80000000 |</div><div class='add'>+						(chan-&gt;ramin-&gt;vinst &gt;&gt; 12));</div><div class='add'>+	nv_mask(dev, 0x800004 + (chan-&gt;id * 8), 0x00000400, 0x00000400);</div><div class='add'>+	nve0_fifo_playlist_update(dev, fctx-&gt;engine);</div><div class='add'>+	nv_mask(dev, 0x800004 + (chan-&gt;id * 8), 0x00000400, 0x00000400);</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.base.context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_fifo_context_del(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nve0_fifo_chan *fctx = chan-&gt;engctx[engine];</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+</div><div class='add'>+	nv_mask(dev, 0x800004 + (chan-&gt;id * 8), 0x00000800, 0x00000800);</div><div class='add'>+	nv_wr32(dev, 0x002634, chan-&gt;id);</div><div class='add'>+	if (!nv_wait(dev, 0x0002634, 0xffffffff, chan-&gt;id))</div><div class='add'>+		NV_WARN(dev, "0x2634 != chid: 0x%08x\n", nv_rd32(dev, 0x2634));</div><div class='add'>+	nve0_fifo_playlist_update(dev, fctx-&gt;engine);</div><div class='add'>+	nv_wr32(dev, 0x800000 + (chan-&gt;id * 8), 0x00000000);</div><div class='add'>+</div><div class='add'>+	if (chan-&gt;user) {</div><div class='add'>+		iounmap(chan-&gt;user);</div><div class='add'>+		chan-&gt;user = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chan-&gt;engctx[NVOBJ_ENGINE_FIFO] = NULL;</div><div class='add'>+	kfree(fctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_fifo_init(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nve0_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	struct nve0_fifo_chan *fctx;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* reset PFIFO, enable all available PSUBFIFO areas */</div><div class='add'>+	nv_mask(dev, 0x000200, 0x00000100, 0x00000000);</div><div class='add'>+	nv_mask(dev, 0x000200, 0x00000100, 0x00000100);</div><div class='add'>+	nv_wr32(dev, 0x000204, 0xffffffff);</div><div class='add'>+</div><div class='add'>+	priv-&gt;spoon_nr = hweight32(nv_rd32(dev, 0x000204));</div><div class='add'>+	NV_DEBUG(dev, "PFIFO: %d subfifo(s)\n", priv-&gt;spoon_nr);</div><div class='add'>+</div><div class='add'>+	/* PSUBFIFO[n] */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;spoon_nr; i++) {</div><div class='add'>+		nv_mask(dev, 0x04013c + (i * 0x2000), 0x10000100, 0x00000000);</div><div class='add'>+		nv_wr32(dev, 0x040108 + (i * 0x2000), 0xffffffff); /* INTR */</div><div class='add'>+		nv_wr32(dev, 0x04010c + (i * 0x2000), 0xfffffeff); /* INTR_EN */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x002254, 0x10000000 | priv-&gt;user.bar.offset &gt;&gt; 12);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x002a00, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x002100, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x002140, 0xbfffffff);</div><div class='add'>+</div><div class='add'>+	/* restore PFIFO context table */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;base.channels; i++) {</div><div class='add'>+		struct nouveau_channel *chan = dev_priv-&gt;channels.ptr[i];</div><div class='add'>+		if (!chan || !(fctx = chan-&gt;engctx[engine]))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		nv_wr32(dev, 0x800000 + (i * 8), 0x80000000 |</div><div class='add'>+						 (chan-&gt;ramin-&gt;vinst &gt;&gt; 12));</div><div class='add'>+		nv_mask(dev, 0x800004 + (i * 8), 0x00000400, 0x00000400);</div><div class='add'>+		nve0_fifo_playlist_update(dev, fctx-&gt;engine);</div><div class='add'>+		nv_mask(dev, 0x800004 + (i * 8), 0x00000400, 0x00000400);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_fifo_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+{</div><div class='add'>+	struct nve0_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;base.channels; i++) {</div><div class='add'>+		if (!(nv_rd32(dev, 0x800004 + (i * 8)) &amp; 1))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		nv_mask(dev, 0x800004 + (i * 8), 0x00000800, 0x00000800);</div><div class='add'>+		nv_wr32(dev, 0x002634, i);</div><div class='add'>+		if (!nv_wait(dev, 0x002634, 0xffffffff, i)) {</div><div class='add'>+			NV_INFO(dev, "PFIFO: kick ch %d failed: 0x%08x\n",</div><div class='add'>+				i, nv_rd32(dev, 0x002634));</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x002140, 0x00000000);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct nouveau_enum nve0_fifo_fault_unit[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nouveau_enum nve0_fifo_fault_reason[] = {</div><div class='add'>+	{ 0x00, "PT_NOT_PRESENT" },</div><div class='add'>+	{ 0x01, "PT_TOO_SHORT" },</div><div class='add'>+	{ 0x02, "PAGE_NOT_PRESENT" },</div><div class='add'>+	{ 0x03, "VM_LIMIT_EXCEEDED" },</div><div class='add'>+	{ 0x04, "NO_CHANNEL" },</div><div class='add'>+	{ 0x05, "PAGE_SYSTEM_ONLY" },</div><div class='add'>+	{ 0x06, "PAGE_READ_ONLY" },</div><div class='add'>+	{ 0x0a, "COMPRESSED_SYSRAM" },</div><div class='add'>+	{ 0x0c, "INVALID_STORAGE_TYPE" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nouveau_enum nve0_fifo_fault_hubclient[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nouveau_enum nve0_fifo_fault_gpcclient[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nouveau_bitfield nve0_fifo_subfifo_intr[] = {</div><div class='add'>+	{ 0x00200000, "ILLEGAL_MTHD" },</div><div class='add'>+	{ 0x00800000, "EMPTY_SUBC" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_fifo_isr_vm_fault(struct drm_device *dev, int unit)</div><div class='add'>+{</div><div class='add'>+	u32 inst = nv_rd32(dev, 0x2800 + (unit * 0x10));</div><div class='add'>+	u32 valo = nv_rd32(dev, 0x2804 + (unit * 0x10));</div><div class='add'>+	u32 vahi = nv_rd32(dev, 0x2808 + (unit * 0x10));</div><div class='add'>+	u32 stat = nv_rd32(dev, 0x280c + (unit * 0x10));</div><div class='add'>+	u32 client = (stat &amp; 0x00001f00) &gt;&gt; 8;</div><div class='add'>+</div><div class='add'>+	NV_INFO(dev, "PFIFO: %s fault at 0x%010llx [",</div><div class='add'>+		(stat &amp; 0x00000080) ? "write" : "read", (u64)vahi &lt;&lt; 32 | valo);</div><div class='add'>+	nouveau_enum_print(nve0_fifo_fault_reason, stat &amp; 0x0000000f);</div><div class='add'>+	printk("] from ");</div><div class='add'>+	nouveau_enum_print(nve0_fifo_fault_unit, unit);</div><div class='add'>+	if (stat &amp; 0x00000040) {</div><div class='add'>+		printk("/");</div><div class='add'>+		nouveau_enum_print(nve0_fifo_fault_hubclient, client);</div><div class='add'>+	} else {</div><div class='add'>+		printk("/GPC%d/", (stat &amp; 0x1f000000) &gt;&gt; 24);</div><div class='add'>+		nouveau_enum_print(nve0_fifo_fault_gpcclient, client);</div><div class='add'>+	}</div><div class='add'>+	printk(" on channel 0x%010llx\n", (u64)inst &lt;&lt; 12);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_fifo_isr_subfifo_intr(struct drm_device *dev, int unit)</div><div class='add'>+{</div><div class='add'>+	u32 stat = nv_rd32(dev, 0x040108 + (unit * 0x2000));</div><div class='add'>+	u32 addr = nv_rd32(dev, 0x0400c0 + (unit * 0x2000));</div><div class='add'>+	u32 data = nv_rd32(dev, 0x0400c4 + (unit * 0x2000));</div><div class='add'>+	u32 chid = nv_rd32(dev, 0x040120 + (unit * 0x2000)) &amp; 0x7f;</div><div class='add'>+	u32 subc = (addr &amp; 0x00070000);</div><div class='add'>+	u32 mthd = (addr &amp; 0x00003ffc);</div><div class='add'>+</div><div class='add'>+	NV_INFO(dev, "PSUBFIFO %d:", unit);</div><div class='add'>+	nouveau_bitfield_print(nve0_fifo_subfifo_intr, stat);</div><div class='add'>+	NV_INFO(dev, "PSUBFIFO %d: ch %d subc %d mthd 0x%04x data 0x%08x\n",</div><div class='add'>+		unit, chid, subc, mthd, data);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x0400c0 + (unit * 0x2000), 0x80600008);</div><div class='add'>+	nv_wr32(dev, 0x040108 + (unit * 0x2000), stat);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_fifo_isr(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 stat = nv_rd32(dev, 0x002100);</div><div class='add'>+</div><div class='add'>+	if (stat &amp; 0x00000100) {</div><div class='add'>+		NV_INFO(dev, "PFIFO: unknown status 0x00000100\n");</div><div class='add'>+		nv_wr32(dev, 0x002100, 0x00000100);</div><div class='add'>+		stat &amp;= ~0x00000100;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stat &amp; 0x10000000) {</div><div class='add'>+		u32 units = nv_rd32(dev, 0x00259c);</div><div class='add'>+		u32 u = units;</div><div class='add'>+</div><div class='add'>+		while (u) {</div><div class='add'>+			int i = ffs(u) - 1;</div><div class='add'>+			nve0_fifo_isr_vm_fault(dev, i);</div><div class='add'>+			u &amp;= ~(1 &lt;&lt; i);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		nv_wr32(dev, 0x00259c, units);</div><div class='add'>+		stat &amp;= ~0x10000000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stat &amp; 0x20000000) {</div><div class='add'>+		u32 units = nv_rd32(dev, 0x0025a0);</div><div class='add'>+		u32 u = units;</div><div class='add'>+</div><div class='add'>+		while (u) {</div><div class='add'>+			int i = ffs(u) - 1;</div><div class='add'>+			nve0_fifo_isr_subfifo_intr(dev, i);</div><div class='add'>+			u &amp;= ~(1 &lt;&lt; i);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		nv_wr32(dev, 0x0025a0, units);</div><div class='add'>+		stat &amp;= ~0x20000000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stat &amp; 0x40000000) {</div><div class='add'>+		NV_INFO(dev, "PFIFO: unknown status 0x40000000\n");</div><div class='add'>+		nv_mask(dev, 0x002a00, 0x00000000, 0x00000000);</div><div class='add'>+		stat &amp;= ~0x40000000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stat) {</div><div class='add'>+		NV_INFO(dev, "PFIFO: unhandled status 0x%08x\n", stat);</div><div class='add'>+		nv_wr32(dev, 0x002100, stat);</div><div class='add'>+		nv_wr32(dev, 0x002140, 0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_fifo_destroy(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nve0_fifo_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	nouveau_vm_put(&amp;priv-&gt;user.bar);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;priv-&gt;user.mem);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; NVE0_FIFO_ENGINE_NUM; i++) {</div><div class='add'>+		nouveau_gpuobj_ref(NULL, &amp;priv-&gt;engine[i].playlist[0]);</div><div class='add'>+		nouveau_gpuobj_ref(NULL, &amp;priv-&gt;engine[i].playlist[1]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_priv-&gt;eng[engine] = NULL;</div><div class='add'>+	kfree(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nve0_fifo_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nve0_fifo_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;base.base.destroy = nve0_fifo_destroy;</div><div class='add'>+	priv-&gt;base.base.init = nve0_fifo_init;</div><div class='add'>+	priv-&gt;base.base.fini = nve0_fifo_fini;</div><div class='add'>+	priv-&gt;base.base.context_new = nve0_fifo_context_new;</div><div class='add'>+	priv-&gt;base.base.context_del = nve0_fifo_context_del;</div><div class='add'>+	priv-&gt;base.channels = 4096;</div><div class='add'>+	dev_priv-&gt;eng[NVOBJ_ENGINE_FIFO] = &amp;priv-&gt;base.base;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, NULL, priv-&gt;base.channels * 512, 0x1000,</div><div class='add'>+				 NVOBJ_FLAG_ZERO_ALLOC, &amp;priv-&gt;user.mem);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_vm_get(dev_priv-&gt;bar1_vm, priv-&gt;user.mem-&gt;size,</div><div class='add'>+			     12, NV_MEM_ACCESS_RW, &amp;priv-&gt;user.bar);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	nouveau_vm_map(&amp;priv-&gt;user.bar, *(struct nouveau_mem **)priv-&gt;user.mem-&gt;node);</div><div class='add'>+</div><div class='add'>+	nouveau_irq_register(dev, 8, nve0_fifo_isr);</div><div class='add'>+error:</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;base.base.destroy(dev, NVOBJ_ENGINE_FIFO);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nve0_graph.c b/drivers/gpu/drm/nouveau/nve0_graph.c<br/>new file mode 100644<br/>index 000000000000..8a8051b68f10<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nve0_graph.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nve0_graph.c</a></div><div class='hunk'>@@ -0,0 +1,831 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2010 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ben Skeggs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_mm.h"</div><div class='add'>+#include "nouveau_fifo.h"</div><div class='add'>+</div><div class='add'>+#include "nve0_graph.h"</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_ctxctl_debug_unit(struct drm_device *dev, u32 base)</div><div class='add'>+{</div><div class='add'>+	NV_INFO(dev, "PGRAPH: %06x - done 0x%08x\n", base,</div><div class='add'>+		nv_rd32(dev, base + 0x400));</div><div class='add'>+	NV_INFO(dev, "PGRAPH: %06x - stat 0x%08x 0x%08x 0x%08x 0x%08x\n", base,</div><div class='add'>+		nv_rd32(dev, base + 0x800), nv_rd32(dev, base + 0x804),</div><div class='add'>+		nv_rd32(dev, base + 0x808), nv_rd32(dev, base + 0x80c));</div><div class='add'>+	NV_INFO(dev, "PGRAPH: %06x - stat 0x%08x 0x%08x 0x%08x 0x%08x\n", base,</div><div class='add'>+		nv_rd32(dev, base + 0x810), nv_rd32(dev, base + 0x814),</div><div class='add'>+		nv_rd32(dev, base + 0x818), nv_rd32(dev, base + 0x81c));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_ctxctl_debug(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 gpcnr = nv_rd32(dev, 0x409604) &amp; 0xffff;</div><div class='add'>+	u32 gpc;</div><div class='add'>+</div><div class='add'>+	nve0_graph_ctxctl_debug_unit(dev, 0x409000);</div><div class='add'>+	for (gpc = 0; gpc &lt; gpcnr; gpc++)</div><div class='add'>+		nve0_graph_ctxctl_debug_unit(dev, 0x502000 + (gpc * 0x8000));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_graph_load_context(struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x409840, 0x00000030);</div><div class='add'>+	nv_wr32(dev, 0x409500, 0x80000000 | chan-&gt;ramin-&gt;vinst &gt;&gt; 12);</div><div class='add'>+	nv_wr32(dev, 0x409504, 0x00000003);</div><div class='add'>+	if (!nv_wait(dev, 0x409800, 0x00000010, 0x00000010))</div><div class='add'>+		NV_ERROR(dev, "PGRAPH: load_ctx timeout\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_graph_unload_context_to(struct drm_device *dev, u64 chan)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x409840, 0x00000003);</div><div class='add'>+	nv_wr32(dev, 0x409500, 0x80000000 | chan &gt;&gt; 12);</div><div class='add'>+	nv_wr32(dev, 0x409504, 0x00000009);</div><div class='add'>+	if (!nv_wait(dev, 0x409800, 0x00000001, 0x00000000)) {</div><div class='add'>+		NV_ERROR(dev, "PGRAPH: unload_ctx timeout\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_graph_construct_context(struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = chan-&gt;dev-&gt;dev_private;</div><div class='add'>+	struct nve0_graph_priv *priv = nv_engine(chan-&gt;dev, NVOBJ_ENGINE_GR);</div><div class='add'>+	struct nve0_graph_chan *grch = chan-&gt;engctx[NVOBJ_ENGINE_GR];</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	int ret, i;</div><div class='add'>+	u32 *ctx;</div><div class='add'>+</div><div class='add'>+	ctx = kmalloc(priv-&gt;grctx_size, GFP_KERNEL);</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	nve0_graph_load_context(chan);</div><div class='add'>+</div><div class='add'>+	nv_wo32(grch-&gt;grctx, 0x1c, 1);</div><div class='add'>+	nv_wo32(grch-&gt;grctx, 0x20, 0);</div><div class='add'>+	nv_wo32(grch-&gt;grctx, 0x28, 0);</div><div class='add'>+	nv_wo32(grch-&gt;grctx, 0x2c, 0);</div><div class='add'>+	dev_priv-&gt;engine.instmem.flush(dev);</div><div class='add'>+</div><div class='add'>+	ret = nve0_grctx_generate(chan);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = nve0_graph_unload_context_to(dev, chan-&gt;ramin-&gt;vinst);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;grctx_size; i += 4)</div><div class='add'>+		ctx[i / 4] = nv_ro32(grch-&gt;grctx, i);</div><div class='add'>+</div><div class='add'>+	priv-&gt;grctx_vals = ctx;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	kfree(ctx);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_graph_create_context_mmio_list(struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	struct nve0_graph_priv *priv = nv_engine(chan-&gt;dev, NVOBJ_ENGINE_GR);</div><div class='add'>+	struct nve0_graph_chan *grch = chan-&gt;engctx[NVOBJ_ENGINE_GR];</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	u32 magic[GPC_MAX][2];</div><div class='add'>+	u16 offset = 0x0000;</div><div class='add'>+	int gpc;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, chan, 0x3000, 256, NVOBJ_FLAG_VM,</div><div class='add'>+				 &amp;grch-&gt;unk408004);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, chan, 0x8000, 256, NVOBJ_FLAG_VM,</div><div class='add'>+				 &amp;grch-&gt;unk40800c);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, chan, 384 * 1024, 4096,</div><div class='add'>+				 NVOBJ_FLAG_VM | NVOBJ_FLAG_VM_USER,</div><div class='add'>+				 &amp;grch-&gt;unk418810);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, chan, 0x1000, 0, NVOBJ_FLAG_VM,</div><div class='add'>+				 &amp;grch-&gt;mmio);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+#define mmio(r,v) do {                                                         \</div><div class='add'>+	nv_wo32(grch-&gt;mmio, (grch-&gt;mmio_nr * 8) + 0, (r));                     \</div><div class='add'>+	nv_wo32(grch-&gt;mmio, (grch-&gt;mmio_nr * 8) + 4, (v));                     \</div><div class='add'>+	grch-&gt;mmio_nr++;                                                       \</div><div class='add'>+} while (0)</div><div class='add'>+	mmio(0x40800c, grch-&gt;unk40800c-&gt;linst &gt;&gt; 8);</div><div class='add'>+	mmio(0x408010, 0x80000000);</div><div class='add'>+	mmio(0x419004, grch-&gt;unk40800c-&gt;linst &gt;&gt; 8);</div><div class='add'>+	mmio(0x419008, 0x00000000);</div><div class='add'>+	mmio(0x4064cc, 0x80000000);</div><div class='add'>+	mmio(0x408004, grch-&gt;unk408004-&gt;linst &gt;&gt; 8);</div><div class='add'>+	mmio(0x408008, 0x80000030);</div><div class='add'>+	mmio(0x418808, grch-&gt;unk408004-&gt;linst &gt;&gt; 8);</div><div class='add'>+	mmio(0x41880c, 0x80000030);</div><div class='add'>+	mmio(0x4064c8, 0x01800600);</div><div class='add'>+	mmio(0x418810, 0x80000000 | grch-&gt;unk418810-&gt;linst &gt;&gt; 12);</div><div class='add'>+	mmio(0x419848, 0x10000000 | grch-&gt;unk418810-&gt;linst &gt;&gt; 12);</div><div class='add'>+	mmio(0x405830, 0x02180648);</div><div class='add'>+	mmio(0x4064c4, 0x0192ffff);</div><div class='add'>+</div><div class='add'>+	for (gpc = 0; gpc &lt; priv-&gt;gpc_nr; gpc++) {</div><div class='add'>+		u16 magic0 = 0x0218 * priv-&gt;tpc_nr[gpc];</div><div class='add'>+		u16 magic1 = 0x0648 * priv-&gt;tpc_nr[gpc];</div><div class='add'>+		magic[gpc][0]  = 0x10000000 | (magic0 &lt;&lt; 16) | offset;</div><div class='add'>+		magic[gpc][1]  = 0x00000000 | (magic1 &lt;&lt; 16);</div><div class='add'>+		offset += 0x0324 * priv-&gt;tpc_nr[gpc];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (gpc = 0; gpc &lt; priv-&gt;gpc_nr; gpc++) {</div><div class='add'>+		mmio(GPC_UNIT(gpc, 0x30c0), magic[gpc][0]);</div><div class='add'>+		mmio(GPC_UNIT(gpc, 0x30e4), magic[gpc][1] | offset);</div><div class='add'>+		offset += 0x07ff * priv-&gt;tpc_nr[gpc];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mmio(0x17e91c, 0x06060609);</div><div class='add'>+	mmio(0x17e920, 0x00090a05);</div><div class='add'>+#undef mmio</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_graph_context_new(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nouveau_instmem_engine *pinstmem = &amp;dev_priv-&gt;engine.instmem;</div><div class='add'>+	struct nve0_graph_priv *priv = nv_engine(dev, engine);</div><div class='add'>+	struct nve0_graph_chan *grch;</div><div class='add'>+	struct nouveau_gpuobj *grctx;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	grch = kzalloc(sizeof(*grch), GFP_KERNEL);</div><div class='add'>+	if (!grch)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	chan-&gt;engctx[NVOBJ_ENGINE_GR] = grch;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, chan, priv-&gt;grctx_size, 256,</div><div class='add'>+				 NVOBJ_FLAG_VM | NVOBJ_FLAG_ZERO_ALLOC,</div><div class='add'>+				 &amp;grch-&gt;grctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+	grctx = grch-&gt;grctx;</div><div class='add'>+</div><div class='add'>+	ret = nve0_graph_create_context_mmio_list(chan);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x0210, lower_32_bits(grctx-&gt;linst) | 4);</div><div class='add'>+	nv_wo32(chan-&gt;ramin, 0x0214, upper_32_bits(grctx-&gt;linst));</div><div class='add'>+	pinstmem-&gt;flush(dev);</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;grctx_vals) {</div><div class='add'>+		ret = nve0_graph_construct_context(chan);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;grctx_size; i += 4)</div><div class='add'>+		nv_wo32(grctx, i, priv-&gt;grctx_vals[i / 4]);</div><div class='add'>+	nv_wo32(grctx, 0xf4, 0);</div><div class='add'>+	nv_wo32(grctx, 0xf8, 0);</div><div class='add'>+	nv_wo32(grctx, 0x10, grch-&gt;mmio_nr);</div><div class='add'>+	nv_wo32(grctx, 0x14, lower_32_bits(grch-&gt;mmio-&gt;linst));</div><div class='add'>+	nv_wo32(grctx, 0x18, upper_32_bits(grch-&gt;mmio-&gt;linst));</div><div class='add'>+	nv_wo32(grctx, 0x1c, 1);</div><div class='add'>+	nv_wo32(grctx, 0x20, 0);</div><div class='add'>+	nv_wo32(grctx, 0x28, 0);</div><div class='add'>+	nv_wo32(grctx, 0x2c, 0);</div><div class='add'>+</div><div class='add'>+	pinstmem-&gt;flush(dev);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	priv-&gt;base.context_del(chan, engine);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_context_del(struct nouveau_channel *chan, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nve0_graph_chan *grch = chan-&gt;engctx[engine];</div><div class='add'>+</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;grch-&gt;mmio);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;grch-&gt;unk418810);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;grch-&gt;unk40800c);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;grch-&gt;unk408004);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;grch-&gt;grctx);</div><div class='add'>+	chan-&gt;engctx[engine] = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_graph_object_new(struct nouveau_channel *chan, int engine,</div><div class='add'>+		      u32 handle, u16 class)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_graph_fini(struct drm_device *dev, int engine, bool suspend)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_init_obj418880(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct nve0_graph_priv *priv = nv_engine(dev, NVOBJ_ENGINE_GR);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, GPC_BCAST(0x0880), 0x00000000);</div><div class='add'>+	nv_wr32(dev, GPC_BCAST(0x08a4), 0x00000000);</div><div class='add'>+	for (i = 0; i &lt; 4; i++)</div><div class='add'>+		nv_wr32(dev, GPC_BCAST(0x0888) + (i * 4), 0x00000000);</div><div class='add'>+	nv_wr32(dev, GPC_BCAST(0x08b4), priv-&gt;unk4188b4-&gt;vinst &gt;&gt; 8);</div><div class='add'>+	nv_wr32(dev, GPC_BCAST(0x08b8), priv-&gt;unk4188b8-&gt;vinst &gt;&gt; 8);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_init_regs(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x400080, 0x003083c2);</div><div class='add'>+	nv_wr32(dev, 0x400088, 0x0001ffe7);</div><div class='add'>+	nv_wr32(dev, 0x40008c, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x400090, 0x00000030);</div><div class='add'>+	nv_wr32(dev, 0x40013c, 0x003901f7);</div><div class='add'>+	nv_wr32(dev, 0x400140, 0x00000100);</div><div class='add'>+	nv_wr32(dev, 0x400144, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x400148, 0x00000110);</div><div class='add'>+	nv_wr32(dev, 0x400138, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x400130, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x400134, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x400124, 0x00000002);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_init_units(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x409ffc, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x409c14, 0x00003e3e);</div><div class='add'>+	nv_wr32(dev, 0x409c24, 0x000f0000);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x404000, 0xc0000000);</div><div class='add'>+	nv_wr32(dev, 0x404600, 0xc0000000);</div><div class='add'>+	nv_wr32(dev, 0x408030, 0xc0000000);</div><div class='add'>+	nv_wr32(dev, 0x404490, 0xc0000000);</div><div class='add'>+	nv_wr32(dev, 0x406018, 0xc0000000);</div><div class='add'>+	nv_wr32(dev, 0x407020, 0xc0000000);</div><div class='add'>+	nv_wr32(dev, 0x405840, 0xc0000000);</div><div class='add'>+	nv_wr32(dev, 0x405844, 0x00ffffff);</div><div class='add'>+</div><div class='add'>+	nv_mask(dev, 0x419cc0, 0x00000008, 0x00000008);</div><div class='add'>+	nv_mask(dev, 0x419eb4, 0x00001000, 0x00001000);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_init_gpc_0(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct nve0_graph_priv *priv = nv_engine(dev, NVOBJ_ENGINE_GR);</div><div class='add'>+	const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, priv-&gt;tpc_total);</div><div class='add'>+	u32 data[TPC_MAX / 8];</div><div class='add'>+	u8  tpcnr[GPC_MAX];</div><div class='add'>+	int i, gpc, tpc;</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, GPC_UNIT(0, 0x3018), 0x00000001);</div><div class='add'>+</div><div class='add'>+	memset(data, 0x00, sizeof(data));</div><div class='add'>+	memcpy(tpcnr, priv-&gt;tpc_nr, sizeof(priv-&gt;tpc_nr));</div><div class='add'>+	for (i = 0, gpc = -1; i &lt; priv-&gt;tpc_total; i++) {</div><div class='add'>+		do {</div><div class='add'>+			gpc = (gpc + 1) % priv-&gt;gpc_nr;</div><div class='add'>+		} while (!tpcnr[gpc]);</div><div class='add'>+		tpc = priv-&gt;tpc_nr[gpc] - tpcnr[gpc]--;</div><div class='add'>+</div><div class='add'>+		data[i / 8] |= tpc &lt;&lt; ((i % 8) * 4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, GPC_BCAST(0x0980), data[0]);</div><div class='add'>+	nv_wr32(dev, GPC_BCAST(0x0984), data[1]);</div><div class='add'>+	nv_wr32(dev, GPC_BCAST(0x0988), data[2]);</div><div class='add'>+	nv_wr32(dev, GPC_BCAST(0x098c), data[3]);</div><div class='add'>+</div><div class='add'>+	for (gpc = 0; gpc &lt; priv-&gt;gpc_nr; gpc++) {</div><div class='add'>+		nv_wr32(dev, GPC_UNIT(gpc, 0x0914), priv-&gt;magic_not_rop_nr &lt;&lt; 8 |</div><div class='add'>+						  priv-&gt;tpc_nr[gpc]);</div><div class='add'>+		nv_wr32(dev, GPC_UNIT(gpc, 0x0910), 0x00040000 | priv-&gt;tpc_total);</div><div class='add'>+		nv_wr32(dev, GPC_UNIT(gpc, 0x0918), magicgpc918);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, GPC_BCAST(0x1bd4), magicgpc918);</div><div class='add'>+	nv_wr32(dev, GPC_BCAST(0x08ac), nv_rd32(dev, 0x100800));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_init_gpc_1(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct nve0_graph_priv *priv = nv_engine(dev, NVOBJ_ENGINE_GR);</div><div class='add'>+	int gpc, tpc;</div><div class='add'>+</div><div class='add'>+	for (gpc = 0; gpc &lt; priv-&gt;gpc_nr; gpc++) {</div><div class='add'>+		nv_wr32(dev, GPC_UNIT(gpc, 0x3038), 0xc0000000);</div><div class='add'>+		nv_wr32(dev, GPC_UNIT(gpc, 0x0420), 0xc0000000);</div><div class='add'>+		nv_wr32(dev, GPC_UNIT(gpc, 0x0900), 0xc0000000);</div><div class='add'>+		nv_wr32(dev, GPC_UNIT(gpc, 0x1028), 0xc0000000);</div><div class='add'>+		nv_wr32(dev, GPC_UNIT(gpc, 0x0824), 0xc0000000);</div><div class='add'>+		for (tpc = 0; tpc &lt; priv-&gt;tpc_nr[gpc]; tpc++) {</div><div class='add'>+			nv_wr32(dev, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);</div><div class='add'>+			nv_wr32(dev, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);</div><div class='add'>+			nv_wr32(dev, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);</div><div class='add'>+			nv_wr32(dev, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);</div><div class='add'>+			nv_wr32(dev, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);</div><div class='add'>+			nv_wr32(dev, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe);</div><div class='add'>+			nv_wr32(dev, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f);</div><div class='add'>+		}</div><div class='add'>+		nv_wr32(dev, GPC_UNIT(gpc, 0x2c90), 0xffffffff);</div><div class='add'>+		nv_wr32(dev, GPC_UNIT(gpc, 0x2c94), 0xffffffff);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_init_rop(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct nve0_graph_priv *priv = nv_engine(dev, NVOBJ_ENGINE_GR);</div><div class='add'>+	int rop;</div><div class='add'>+</div><div class='add'>+	for (rop = 0; rop &lt; priv-&gt;rop_nr; rop++) {</div><div class='add'>+		nv_wr32(dev, ROP_UNIT(rop, 0x144), 0xc0000000);</div><div class='add'>+		nv_wr32(dev, ROP_UNIT(rop, 0x070), 0xc0000000);</div><div class='add'>+		nv_wr32(dev, ROP_UNIT(rop, 0x204), 0xffffffff);</div><div class='add'>+		nv_wr32(dev, ROP_UNIT(rop, 0x208), 0xffffffff);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_init_fuc(struct drm_device *dev, u32 fuc_base,</div><div class='add'>+		    struct nve0_graph_fuc *code, struct nve0_graph_fuc *data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, fuc_base + 0x01c0, 0x01000000);</div><div class='add'>+	for (i = 0; i &lt; data-&gt;size / 4; i++)</div><div class='add'>+		nv_wr32(dev, fuc_base + 0x01c4, data-&gt;data[i]);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, fuc_base + 0x0180, 0x01000000);</div><div class='add'>+	for (i = 0; i &lt; code-&gt;size / 4; i++) {</div><div class='add'>+		if ((i &amp; 0x3f) == 0)</div><div class='add'>+			nv_wr32(dev, fuc_base + 0x0188, i &gt;&gt; 6);</div><div class='add'>+		nv_wr32(dev, fuc_base + 0x0184, code-&gt;data[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_graph_init_ctxctl(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct nve0_graph_priv *priv = nv_engine(dev, NVOBJ_ENGINE_GR);</div><div class='add'>+	u32 r000260;</div><div class='add'>+</div><div class='add'>+	/* load fuc microcode */</div><div class='add'>+	r000260 = nv_mask(dev, 0x000260, 0x00000001, 0x00000000);</div><div class='add'>+	nve0_graph_init_fuc(dev, 0x409000, &amp;priv-&gt;fuc409c, &amp;priv-&gt;fuc409d);</div><div class='add'>+	nve0_graph_init_fuc(dev, 0x41a000, &amp;priv-&gt;fuc41ac, &amp;priv-&gt;fuc41ad);</div><div class='add'>+	nv_wr32(dev, 0x000260, r000260);</div><div class='add'>+</div><div class='add'>+	/* start both of them running */</div><div class='add'>+	nv_wr32(dev, 0x409840, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x41a10c, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x40910c, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x41a100, 0x00000002);</div><div class='add'>+	nv_wr32(dev, 0x409100, 0x00000002);</div><div class='add'>+	if (!nv_wait(dev, 0x409800, 0x00000001, 0x00000001))</div><div class='add'>+		NV_INFO(dev, "0x409800 wait failed\n");</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x409840, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x409500, 0x7fffffff);</div><div class='add'>+	nv_wr32(dev, 0x409504, 0x00000021);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x409840, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x409500, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x409504, 0x00000010);</div><div class='add'>+	if (!nv_wait_ne(dev, 0x409800, 0xffffffff, 0x00000000)) {</div><div class='add'>+		NV_ERROR(dev, "fuc09 req 0x10 timeout\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;grctx_size = nv_rd32(dev, 0x409800);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x409840, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x409500, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x409504, 0x00000016);</div><div class='add'>+	if (!nv_wait_ne(dev, 0x409800, 0xffffffff, 0x00000000)) {</div><div class='add'>+		NV_ERROR(dev, "fuc09 req 0x16 timeout\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x409840, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x409500, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x409504, 0x00000025);</div><div class='add'>+	if (!nv_wait_ne(dev, 0x409800, 0xffffffff, 0x00000000)) {</div><div class='add'>+		NV_ERROR(dev, "fuc09 req 0x25 timeout\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x409800, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x409500, 0x00000001);</div><div class='add'>+	nv_wr32(dev, 0x409504, 0x00000030);</div><div class='add'>+	if (!nv_wait_ne(dev, 0x409800, 0xffffffff, 0x00000000)) {</div><div class='add'>+		NV_ERROR(dev, "fuc09 req 0x30 timeout\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x409810, 0xb00095c8);</div><div class='add'>+	nv_wr32(dev, 0x409800, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x409500, 0x00000001);</div><div class='add'>+	nv_wr32(dev, 0x409504, 0x00000031);</div><div class='add'>+	if (!nv_wait_ne(dev, 0x409800, 0xffffffff, 0x00000000)) {</div><div class='add'>+		NV_ERROR(dev, "fuc09 req 0x31 timeout\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x409810, 0x00080420);</div><div class='add'>+	nv_wr32(dev, 0x409800, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x409500, 0x00000001);</div><div class='add'>+	nv_wr32(dev, 0x409504, 0x00000032);</div><div class='add'>+	if (!nv_wait_ne(dev, 0x409800, 0xffffffff, 0x00000000)) {</div><div class='add'>+		NV_ERROR(dev, "fuc09 req 0x32 timeout\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x409614, 0x00000070);</div><div class='add'>+	nv_wr32(dev, 0x409614, 0x00000770);</div><div class='add'>+	nv_wr32(dev, 0x40802c, 0x00000001);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_graph_init(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	nv_mask(dev, 0x000200, 0x18001000, 0x00000000);</div><div class='add'>+	nv_mask(dev, 0x000200, 0x18001000, 0x18001000);</div><div class='add'>+</div><div class='add'>+	nve0_graph_init_obj418880(dev);</div><div class='add'>+	nve0_graph_init_regs(dev);</div><div class='add'>+	nve0_graph_init_gpc_0(dev);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x400500, 0x00010001);</div><div class='add'>+	nv_wr32(dev, 0x400100, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x40013c, 0xffffffff);</div><div class='add'>+</div><div class='add'>+	nve0_graph_init_units(dev);</div><div class='add'>+	nve0_graph_init_gpc_1(dev);</div><div class='add'>+	nve0_graph_init_rop(dev);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x400108, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x400138, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x400118, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x400130, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x40011c, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x400134, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x400054, 0x34ce3464);</div><div class='add'>+</div><div class='add'>+	ret = nve0_graph_init_ctxctl(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nve0_graph_isr_chid(struct drm_device *dev, u64 inst)</div><div class='add'>+{</div><div class='add'>+	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nouveau_channel *chan;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev_priv-&gt;channels.lock, flags);</div><div class='add'>+	for (i = 0; i &lt; pfifo-&gt;channels; i++) {</div><div class='add'>+		chan = dev_priv-&gt;channels.ptr[i];</div><div class='add'>+		if (!chan || !chan-&gt;ramin)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (inst == chan-&gt;ramin-&gt;vinst)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev_priv-&gt;channels.lock, flags);</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_ctxctl_isr(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 ustat = nv_rd32(dev, 0x409c18);</div><div class='add'>+</div><div class='add'>+	if (ustat &amp; 0x00000001)</div><div class='add'>+		NV_INFO(dev, "PGRAPH: CTXCTRL ucode error\n");</div><div class='add'>+	if (ustat &amp; 0x00080000)</div><div class='add'>+		NV_INFO(dev, "PGRAPH: CTXCTRL watchdog timeout\n");</div><div class='add'>+	if (ustat &amp; ~0x00080001)</div><div class='add'>+		NV_INFO(dev, "PGRAPH: CTXCTRL 0x%08x\n", ustat);</div><div class='add'>+</div><div class='add'>+	nve0_graph_ctxctl_debug(dev);</div><div class='add'>+	nv_wr32(dev, 0x409c20, ustat);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_trap_isr(struct drm_device *dev, int chid)</div><div class='add'>+{</div><div class='add'>+	struct nve0_graph_priv *priv = nv_engine(dev, NVOBJ_ENGINE_GR);</div><div class='add'>+	u32 trap = nv_rd32(dev, 0x400108);</div><div class='add'>+	int rop;</div><div class='add'>+</div><div class='add'>+	if (trap &amp; 0x00000001) {</div><div class='add'>+		u32 stat = nv_rd32(dev, 0x404000);</div><div class='add'>+		NV_INFO(dev, "PGRAPH: DISPATCH ch %d 0x%08x\n", chid, stat);</div><div class='add'>+		nv_wr32(dev, 0x404000, 0xc0000000);</div><div class='add'>+		nv_wr32(dev, 0x400108, 0x00000001);</div><div class='add'>+		trap &amp;= ~0x00000001;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (trap &amp; 0x00000010) {</div><div class='add'>+		u32 stat = nv_rd32(dev, 0x405840);</div><div class='add'>+		NV_INFO(dev, "PGRAPH: SHADER ch %d 0x%08x\n", chid, stat);</div><div class='add'>+		nv_wr32(dev, 0x405840, 0xc0000000);</div><div class='add'>+		nv_wr32(dev, 0x400108, 0x00000010);</div><div class='add'>+		trap &amp;= ~0x00000010;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (trap &amp; 0x02000000) {</div><div class='add'>+		for (rop = 0; rop &lt; priv-&gt;rop_nr; rop++) {</div><div class='add'>+			u32 statz = nv_rd32(dev, ROP_UNIT(rop, 0x070));</div><div class='add'>+			u32 statc = nv_rd32(dev, ROP_UNIT(rop, 0x144));</div><div class='add'>+			NV_INFO(dev, "PGRAPH: ROP%d ch %d 0x%08x 0x%08x\n",</div><div class='add'>+				     rop, chid, statz, statc);</div><div class='add'>+			nv_wr32(dev, ROP_UNIT(rop, 0x070), 0xc0000000);</div><div class='add'>+			nv_wr32(dev, ROP_UNIT(rop, 0x144), 0xc0000000);</div><div class='add'>+		}</div><div class='add'>+		nv_wr32(dev, 0x400108, 0x02000000);</div><div class='add'>+		trap &amp;= ~0x02000000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (trap) {</div><div class='add'>+		NV_INFO(dev, "PGRAPH: TRAP ch %d 0x%08x\n", chid, trap);</div><div class='add'>+		nv_wr32(dev, 0x400108, trap);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_isr(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	u64 inst = (u64)(nv_rd32(dev, 0x409b00) &amp; 0x0fffffff) &lt;&lt; 12;</div><div class='add'>+	u32 chid = nve0_graph_isr_chid(dev, inst);</div><div class='add'>+	u32 stat = nv_rd32(dev, 0x400100);</div><div class='add'>+	u32 addr = nv_rd32(dev, 0x400704);</div><div class='add'>+	u32 mthd = (addr &amp; 0x00003ffc);</div><div class='add'>+	u32 subc = (addr &amp; 0x00070000) &gt;&gt; 16;</div><div class='add'>+	u32 data = nv_rd32(dev, 0x400708);</div><div class='add'>+	u32 code = nv_rd32(dev, 0x400110);</div><div class='add'>+	u32 class = nv_rd32(dev, 0x404200 + (subc * 4));</div><div class='add'>+</div><div class='add'>+	if (stat &amp; 0x00000010) {</div><div class='add'>+		if (nouveau_gpuobj_mthd_call2(dev, chid, class, mthd, data)) {</div><div class='add'>+			NV_INFO(dev, "PGRAPH: ILLEGAL_MTHD ch %d [0x%010llx] "</div><div class='add'>+				     "subc %d class 0x%04x mthd 0x%04x "</div><div class='add'>+				     "data 0x%08x\n",</div><div class='add'>+				chid, inst, subc, class, mthd, data);</div><div class='add'>+		}</div><div class='add'>+		nv_wr32(dev, 0x400100, 0x00000010);</div><div class='add'>+		stat &amp;= ~0x00000010;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stat &amp; 0x00000020) {</div><div class='add'>+		NV_INFO(dev, "PGRAPH: ILLEGAL_CLASS ch %d [0x%010llx] subc %d "</div><div class='add'>+			     "class 0x%04x mthd 0x%04x data 0x%08x\n",</div><div class='add'>+			chid, inst, subc, class, mthd, data);</div><div class='add'>+		nv_wr32(dev, 0x400100, 0x00000020);</div><div class='add'>+		stat &amp;= ~0x00000020;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stat &amp; 0x00100000) {</div><div class='add'>+		NV_INFO(dev, "PGRAPH: DATA_ERROR [");</div><div class='add'>+		nouveau_enum_print(nv50_data_error_names, code);</div><div class='add'>+		printk("] ch %d [0x%010llx] subc %d class 0x%04x "</div><div class='add'>+		       "mthd 0x%04x data 0x%08x\n",</div><div class='add'>+		       chid, inst, subc, class, mthd, data);</div><div class='add'>+		nv_wr32(dev, 0x400100, 0x00100000);</div><div class='add'>+		stat &amp;= ~0x00100000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stat &amp; 0x00200000) {</div><div class='add'>+		nve0_graph_trap_isr(dev, chid);</div><div class='add'>+		nv_wr32(dev, 0x400100, 0x00200000);</div><div class='add'>+		stat &amp;= ~0x00200000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stat &amp; 0x00080000) {</div><div class='add'>+		nve0_graph_ctxctl_isr(dev);</div><div class='add'>+		nv_wr32(dev, 0x400100, 0x00080000);</div><div class='add'>+		stat &amp;= ~0x00080000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stat) {</div><div class='add'>+		NV_INFO(dev, "PGRAPH: unknown stat 0x%08x\n", stat);</div><div class='add'>+		nv_wr32(dev, 0x400100, stat);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x400500, 0x00010001);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nve0_graph_create_fw(struct drm_device *dev, const char *fwname,</div><div class='add'>+		     struct nve0_graph_fuc *fuc)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	const struct firmware *fw;</div><div class='add'>+	char f[32];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	snprintf(f, sizeof(f), "nouveau/nv%02x_%s", dev_priv-&gt;chipset, fwname);</div><div class='add'>+	ret = request_firmware(&amp;fw, f, &amp;dev-&gt;pdev-&gt;dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	fuc-&gt;size = fw-&gt;size;</div><div class='add'>+	fuc-&gt;data = kmemdup(fw-&gt;data, fuc-&gt;size, GFP_KERNEL);</div><div class='add'>+	release_firmware(fw);</div><div class='add'>+	return (fuc-&gt;data != NULL) ? 0 : -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_destroy_fw(struct nve0_graph_fuc *fuc)</div><div class='add'>+{</div><div class='add'>+	if (fuc-&gt;data) {</div><div class='add'>+		kfree(fuc-&gt;data);</div><div class='add'>+		fuc-&gt;data = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_destroy(struct drm_device *dev, int engine)</div><div class='add'>+{</div><div class='add'>+	struct nve0_graph_priv *priv = nv_engine(dev, engine);</div><div class='add'>+</div><div class='add'>+	nve0_graph_destroy_fw(&amp;priv-&gt;fuc409c);</div><div class='add'>+	nve0_graph_destroy_fw(&amp;priv-&gt;fuc409d);</div><div class='add'>+	nve0_graph_destroy_fw(&amp;priv-&gt;fuc41ac);</div><div class='add'>+	nve0_graph_destroy_fw(&amp;priv-&gt;fuc41ad);</div><div class='add'>+</div><div class='add'>+	nouveau_irq_unregister(dev, 12);</div><div class='add'>+</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;priv-&gt;unk4188b8);</div><div class='add'>+	nouveau_gpuobj_ref(NULL, &amp;priv-&gt;unk4188b4);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;grctx_vals)</div><div class='add'>+		kfree(priv-&gt;grctx_vals);</div><div class='add'>+</div><div class='add'>+	NVOBJ_ENGINE_DEL(dev, GR);</div><div class='add'>+	kfree(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nve0_graph_create(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+	struct nve0_graph_priv *priv;</div><div class='add'>+	int ret, gpc, i;</div><div class='add'>+	u32 kepler;</div><div class='add'>+</div><div class='add'>+	kepler = nve0_graph_class(dev);</div><div class='add'>+	if (!kepler) {</div><div class='add'>+		NV_ERROR(dev, "PGRAPH: unsupported chipset, please report!\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;base.destroy = nve0_graph_destroy;</div><div class='add'>+	priv-&gt;base.init = nve0_graph_init;</div><div class='add'>+	priv-&gt;base.fini = nve0_graph_fini;</div><div class='add'>+	priv-&gt;base.context_new = nve0_graph_context_new;</div><div class='add'>+	priv-&gt;base.context_del = nve0_graph_context_del;</div><div class='add'>+	priv-&gt;base.object_new = nve0_graph_object_new;</div><div class='add'>+</div><div class='add'>+	NVOBJ_ENGINE_ADD(dev, GR, &amp;priv-&gt;base);</div><div class='add'>+	nouveau_irq_register(dev, 12, nve0_graph_isr);</div><div class='add'>+</div><div class='add'>+	NV_INFO(dev, "PGRAPH: using external firmware\n");</div><div class='add'>+	if (nve0_graph_create_fw(dev, "fuc409c", &amp;priv-&gt;fuc409c) ||</div><div class='add'>+	    nve0_graph_create_fw(dev, "fuc409d", &amp;priv-&gt;fuc409d) ||</div><div class='add'>+	    nve0_graph_create_fw(dev, "fuc41ac", &amp;priv-&gt;fuc41ac) ||</div><div class='add'>+	    nve0_graph_create_fw(dev, "fuc41ad", &amp;priv-&gt;fuc41ad)) {</div><div class='add'>+		ret = 0;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, NULL, 0x1000, 256, 0, &amp;priv-&gt;unk4188b4);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = nouveau_gpuobj_new(dev, NULL, 0x1000, 256, 0, &amp;priv-&gt;unk4188b8);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 0x1000; i += 4) {</div><div class='add'>+		nv_wo32(priv-&gt;unk4188b4, i, 0x00000010);</div><div class='add'>+		nv_wo32(priv-&gt;unk4188b8, i, 0x00000010);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;gpc_nr  =  nv_rd32(dev, 0x409604) &amp; 0x0000001f;</div><div class='add'>+	priv-&gt;rop_nr = (nv_rd32(dev, 0x409604) &amp; 0x001f0000) &gt;&gt; 16;</div><div class='add'>+	for (gpc = 0; gpc &lt; priv-&gt;gpc_nr; gpc++) {</div><div class='add'>+		priv-&gt;tpc_nr[gpc] = nv_rd32(dev, GPC_UNIT(gpc, 0x2608));</div><div class='add'>+		priv-&gt;tpc_total += priv-&gt;tpc_nr[gpc];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (dev_priv-&gt;chipset) {</div><div class='add'>+	case 0xe4:</div><div class='add'>+		if (priv-&gt;tpc_total == 8)</div><div class='add'>+			priv-&gt;magic_not_rop_nr = 3;</div><div class='add'>+		else</div><div class='add'>+		if (priv-&gt;tpc_total == 7)</div><div class='add'>+			priv-&gt;magic_not_rop_nr = 1;</div><div class='add'>+		break;</div><div class='add'>+	case 0xe7:</div><div class='add'>+		priv-&gt;magic_not_rop_nr = 1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;magic_not_rop_nr) {</div><div class='add'>+		NV_ERROR(dev, "PGRAPH: unknown config: %d/%d/%d/%d, %d\n",</div><div class='add'>+			 priv-&gt;tpc_nr[0], priv-&gt;tpc_nr[1], priv-&gt;tpc_nr[2],</div><div class='add'>+			 priv-&gt;tpc_nr[3], priv-&gt;rop_nr);</div><div class='add'>+		priv-&gt;magic_not_rop_nr = 0x00;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	NVOBJ_CLASS(dev, 0xa097, GR); /* subc 0: 3D */</div><div class='add'>+	NVOBJ_CLASS(dev, 0xa0c0, GR); /* subc 1: COMPUTE */</div><div class='add'>+	NVOBJ_CLASS(dev, 0xa040, GR); /* subc 2: P2MF */</div><div class='add'>+	NVOBJ_CLASS(dev, 0x902d, GR); /* subc 3: 2D */</div><div class='add'>+	NVOBJ_CLASS(dev, 0xa0b5, GR); /* subc 4: COPY */</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	nve0_graph_destroy(dev, NVOBJ_ENGINE_GR);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nve0_graph.h b/drivers/gpu/drm/nouveau/nve0_graph.h<br/>new file mode 100644<br/>index 000000000000..2ba70449ba01<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nve0_graph.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nve0_graph.h</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ben Skeggs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __NVE0_GRAPH_H__</div><div class='add'>+#define __NVE0_GRAPH_H__</div><div class='add'>+</div><div class='add'>+#define GPC_MAX 4</div><div class='add'>+#define TPC_MAX 32</div><div class='add'>+</div><div class='add'>+#define ROP_BCAST(r)     (0x408800 + (r))</div><div class='add'>+#define ROP_UNIT(u, r)   (0x410000 + (u) * 0x400 + (r))</div><div class='add'>+#define GPC_BCAST(r)     (0x418000 + (r))</div><div class='add'>+#define GPC_UNIT(t, r)   (0x500000 + (t) * 0x8000 + (r))</div><div class='add'>+#define TPC_UNIT(t, m, r) (0x504000 + (t) * 0x8000 + (m) * 0x800 + (r))</div><div class='add'>+</div><div class='add'>+struct nve0_graph_fuc {</div><div class='add'>+	u32 *data;</div><div class='add'>+	u32  size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nve0_graph_priv {</div><div class='add'>+	struct nouveau_exec_engine base;</div><div class='add'>+</div><div class='add'>+	struct nve0_graph_fuc fuc409c;</div><div class='add'>+	struct nve0_graph_fuc fuc409d;</div><div class='add'>+	struct nve0_graph_fuc fuc41ac;</div><div class='add'>+	struct nve0_graph_fuc fuc41ad;</div><div class='add'>+</div><div class='add'>+	u8 gpc_nr;</div><div class='add'>+	u8 rop_nr;</div><div class='add'>+	u8 tpc_nr[GPC_MAX];</div><div class='add'>+	u8 tpc_total;</div><div class='add'>+</div><div class='add'>+	u32  grctx_size;</div><div class='add'>+	u32 *grctx_vals;</div><div class='add'>+	struct nouveau_gpuobj *unk4188b4;</div><div class='add'>+	struct nouveau_gpuobj *unk4188b8;</div><div class='add'>+</div><div class='add'>+	u8 magic_not_rop_nr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nve0_graph_chan {</div><div class='add'>+	struct nouveau_gpuobj *grctx;</div><div class='add'>+	struct nouveau_gpuobj *unk408004; /* 0x418810 too */</div><div class='add'>+	struct nouveau_gpuobj *unk40800c; /* 0x419004 too */</div><div class='add'>+	struct nouveau_gpuobj *unk418810; /* 0x419848 too */</div><div class='add'>+	struct nouveau_gpuobj *mmio;</div><div class='add'>+	int mmio_nr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int nve0_grctx_generate(struct nouveau_channel *);</div><div class='add'>+</div><div class='add'>+/* nve0_graph.c uses this also to determine supported chipsets */</div><div class='add'>+static inline u32</div><div class='add'>+nve0_graph_class(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct drm_nouveau_private *dev_priv = dev-&gt;dev_private;</div><div class='add'>+</div><div class='add'>+	switch (dev_priv-&gt;chipset) {</div><div class='add'>+	case 0xe4:</div><div class='add'>+	case 0xe7:</div><div class='add'>+		return 0xa097;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nve0_grctx.c b/drivers/gpu/drm/nouveau/nve0_grctx.c<br/>new file mode 100644<br/>index 000000000000..d8cb360e92c1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/nouveau/nve0_grctx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/nouveau/nve0_grctx.c</a></div><div class='hunk'>@@ -0,0 +1,2777 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2010 Red Hat Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Ben Skeggs</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "nouveau_drv.h"</div><div class='add'>+#include "nouveau_mm.h"</div><div class='add'>+#include "nve0_graph.h"</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv_icmd(struct drm_device *dev, u32 icmd, u32 data)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x400204, data);</div><div class='add'>+	nv_wr32(dev, 0x400200, icmd);</div><div class='add'>+	while (nv_rd32(dev, 0x400700) &amp; 0x00000002) {}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_grctx_generate_icmd(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x400208, 0x80000000);</div><div class='add'>+	nv_icmd(dev, 0x001000, 0x00000004);</div><div class='add'>+	nv_icmd(dev, 0x000039, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00003a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00003b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0000a9, 0x0000ffff);</div><div class='add'>+	nv_icmd(dev, 0x000038, 0x0fac6881);</div><div class='add'>+	nv_icmd(dev, 0x00003d, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0000e8, 0x00000400);</div><div class='add'>+	nv_icmd(dev, 0x0000e9, 0x00000400);</div><div class='add'>+	nv_icmd(dev, 0x0000ea, 0x00000400);</div><div class='add'>+	nv_icmd(dev, 0x0000eb, 0x00000400);</div><div class='add'>+	nv_icmd(dev, 0x0000ec, 0x00000400);</div><div class='add'>+	nv_icmd(dev, 0x0000ed, 0x00000400);</div><div class='add'>+	nv_icmd(dev, 0x0000ee, 0x00000400);</div><div class='add'>+	nv_icmd(dev, 0x0000ef, 0x00000400);</div><div class='add'>+	nv_icmd(dev, 0x000078, 0x00000300);</div><div class='add'>+	nv_icmd(dev, 0x000079, 0x00000300);</div><div class='add'>+	nv_icmd(dev, 0x00007a, 0x00000300);</div><div class='add'>+	nv_icmd(dev, 0x00007b, 0x00000300);</div><div class='add'>+	nv_icmd(dev, 0x00007c, 0x00000300);</div><div class='add'>+	nv_icmd(dev, 0x00007d, 0x00000300);</div><div class='add'>+	nv_icmd(dev, 0x00007e, 0x00000300);</div><div class='add'>+	nv_icmd(dev, 0x00007f, 0x00000300);</div><div class='add'>+	nv_icmd(dev, 0x000050, 0x00000011);</div><div class='add'>+	nv_icmd(dev, 0x000058, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x000059, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x00005a, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x00005b, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x00005c, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x00005d, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x00005e, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x00005f, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x000208, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000209, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00020a, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00020b, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00020c, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00020d, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00020e, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00020f, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000081, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000085, 0x00000004);</div><div class='add'>+	nv_icmd(dev, 0x000088, 0x00000400);</div><div class='add'>+	nv_icmd(dev, 0x000090, 0x00000300);</div><div class='add'>+	nv_icmd(dev, 0x000098, 0x00001001);</div><div class='add'>+	nv_icmd(dev, 0x0000e3, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0000da, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0000f8, 0x00000003);</div><div class='add'>+	nv_icmd(dev, 0x0000fa, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00009f, 0x0000ffff);</div><div class='add'>+	nv_icmd(dev, 0x0000a0, 0x0000ffff);</div><div class='add'>+	nv_icmd(dev, 0x0000a1, 0x0000ffff);</div><div class='add'>+	nv_icmd(dev, 0x0000a2, 0x0000ffff);</div><div class='add'>+	nv_icmd(dev, 0x0000b1, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0000ad, 0x0000013e);</div><div class='add'>+	nv_icmd(dev, 0x0000e1, 0x00000010);</div><div class='add'>+	nv_icmd(dev, 0x000290, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000291, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000292, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000293, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000294, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000295, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000296, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000297, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000298, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000299, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00029a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00029b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00029c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00029d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00029e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00029f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003b0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003b1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003b2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003b3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003b4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003b5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003b6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003b7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003b8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003b9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003ba, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003bb, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003bc, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003bd, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003be, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0003bf, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002a0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002a1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002a2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002a3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002a4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002a5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002a6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002a7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002a8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002a9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002aa, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002ab, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002ac, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002ad, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002ae, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002af, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000420, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000421, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000422, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000423, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000424, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000425, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000426, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000427, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000428, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000429, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00042a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00042b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00042c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00042d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00042e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00042f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002b0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002b1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002b2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002b3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002b4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002b5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002b6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002b7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002b8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002b9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002ba, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002bb, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002bc, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002bd, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002be, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002bf, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000430, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000431, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000432, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000433, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000434, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000435, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000436, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000437, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000438, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000439, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00043a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00043b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00043c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00043d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00043e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00043f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002c0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002c1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002c2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002c3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002c4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002c5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002c6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002c7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002c8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002c9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002ca, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002cb, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002cc, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002cd, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002ce, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0002cf, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004d0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004d1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004d2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004d3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004d4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004d5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004d6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004d7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004d8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004d9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004da, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004db, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004dc, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004dd, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004de, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004df, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000720, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000721, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000722, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000723, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000724, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000725, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000726, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000727, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000728, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000729, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00072a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00072b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00072c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00072d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00072e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00072f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008c0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008c1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008c2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008c3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008c4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008c5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008c6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008c7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008c8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008c9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008ca, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008cb, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008cc, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008cd, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008ce, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008cf, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000890, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000891, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000892, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000893, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000894, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000895, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000896, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000897, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000898, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000899, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00089a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00089b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00089c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00089d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00089e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00089f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008e0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008e1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008e2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008e3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008e4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008e5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008e6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008e7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008e8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008e9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008ea, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008eb, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008ec, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008ed, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008ee, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008ef, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008a0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008a1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008a2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008a3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008a4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008a5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008a6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008a7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008a8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008a9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008aa, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008ab, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008ac, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008ad, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008ae, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008af, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008f0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008f1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008f2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008f3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008f4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008f5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008f6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008f7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008f8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008f9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008fa, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008fb, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008fc, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008fd, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008fe, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0008ff, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00094c, 0x000000ff);</div><div class='add'>+	nv_icmd(dev, 0x00094d, 0xffffffff);</div><div class='add'>+	nv_icmd(dev, 0x00094e, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x0002ec, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000303, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0002e6, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000466, 0x00000052);</div><div class='add'>+	nv_icmd(dev, 0x000301, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000304, 0x30201000);</div><div class='add'>+	nv_icmd(dev, 0x000305, 0x70605040);</div><div class='add'>+	nv_icmd(dev, 0x000306, 0xb8a89888);</div><div class='add'>+	nv_icmd(dev, 0x000307, 0xf8e8d8c8);</div><div class='add'>+	nv_icmd(dev, 0x00030a, 0x00ffff00);</div><div class='add'>+	nv_icmd(dev, 0x00030b, 0x0000001a);</div><div class='add'>+	nv_icmd(dev, 0x00030c, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000318, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000340, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000375, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00037d, 0x00000006);</div><div class='add'>+	nv_icmd(dev, 0x0003a0, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x0003aa, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0003a9, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000380, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000383, 0x00000011);</div><div class='add'>+	nv_icmd(dev, 0x000360, 0x00000040);</div><div class='add'>+	nv_icmd(dev, 0x000366, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000367, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000368, 0x00000fff);</div><div class='add'>+	nv_icmd(dev, 0x000370, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000371, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000372, 0x000fffff);</div><div class='add'>+	nv_icmd(dev, 0x00037a, 0x00000012);</div><div class='add'>+	nv_icmd(dev, 0x000619, 0x00000003);</div><div class='add'>+	nv_icmd(dev, 0x000811, 0x00000003);</div><div class='add'>+	nv_icmd(dev, 0x000812, 0x00000004);</div><div class='add'>+	nv_icmd(dev, 0x000813, 0x00000006);</div><div class='add'>+	nv_icmd(dev, 0x000814, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x000815, 0x0000000b);</div><div class='add'>+	nv_icmd(dev, 0x000800, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000801, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000802, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000803, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000804, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000805, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000632, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000633, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000634, 0x00000003);</div><div class='add'>+	nv_icmd(dev, 0x000635, 0x00000004);</div><div class='add'>+	nv_icmd(dev, 0x000654, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000657, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000655, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000656, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x0006cd, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x0007f5, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x0007dc, 0x39291909);</div><div class='add'>+	nv_icmd(dev, 0x0007dd, 0x79695949);</div><div class='add'>+	nv_icmd(dev, 0x0007de, 0xb9a99989);</div><div class='add'>+	nv_icmd(dev, 0x0007df, 0xf9e9d9c9);</div><div class='add'>+	nv_icmd(dev, 0x0007e8, 0x00003210);</div><div class='add'>+	nv_icmd(dev, 0x0007e9, 0x00007654);</div><div class='add'>+	nv_icmd(dev, 0x0007ea, 0x00000098);</div><div class='add'>+	nv_icmd(dev, 0x0007ec, 0x39291909);</div><div class='add'>+	nv_icmd(dev, 0x0007ed, 0x79695949);</div><div class='add'>+	nv_icmd(dev, 0x0007ee, 0xb9a99989);</div><div class='add'>+	nv_icmd(dev, 0x0007ef, 0xf9e9d9c9);</div><div class='add'>+	nv_icmd(dev, 0x0007f0, 0x00003210);</div><div class='add'>+	nv_icmd(dev, 0x0007f1, 0x00007654);</div><div class='add'>+	nv_icmd(dev, 0x0007f2, 0x00000098);</div><div class='add'>+	nv_icmd(dev, 0x0005a5, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000980, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000981, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000982, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000983, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000984, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000985, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000986, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000987, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000988, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000989, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00098a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00098b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00098c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00098d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00098e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00098f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000990, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000991, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000992, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000993, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000994, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000995, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000996, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000997, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000998, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000999, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00099a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00099b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00099c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00099d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00099e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00099f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009a0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009a1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009a2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009a3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009a4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009a5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009a6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009a7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009a8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009a9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009aa, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ab, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ac, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ad, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ae, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009af, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009b0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009b1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009b2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009b3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009b4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009b5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009b6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009b7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009b8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009b9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ba, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009bb, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009bc, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009bd, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009be, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009bf, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009c0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009c1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009c2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009c3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009c4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009c5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009c6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009c7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009c8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009c9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ca, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009cb, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009cc, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009cd, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ce, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009cf, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009d0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009d1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009d2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009d3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009d4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009d5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009d6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009d7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009d8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009d9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009da, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009db, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009dc, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009dd, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009de, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009df, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009e0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009e1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009e2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009e3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009e4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009e5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009e6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009e7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009e8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009e9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ea, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009eb, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ec, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ed, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ee, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ef, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009f0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009f1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009f2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009f3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009f4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009f5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009f6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009f7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009f8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009f9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009fa, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009fb, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009fc, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009fd, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009fe, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0009ff, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000468, 0x00000004);</div><div class='add'>+	nv_icmd(dev, 0x00046c, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000470, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000471, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000472, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000473, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000474, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000475, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000476, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000477, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000478, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000479, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00047a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00047b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00047c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00047d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00047e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00047f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000480, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000481, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000482, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000483, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000484, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000485, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000486, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000487, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000488, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000489, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00048a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00048b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00048c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00048d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00048e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00048f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000490, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000491, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000492, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000493, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000494, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000495, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000496, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000497, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000498, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000499, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00049a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00049b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00049c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00049d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00049e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00049f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004a0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004a1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004a2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004a3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004a4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004a5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004a6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004a7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004a8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004a9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004aa, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004ab, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004ac, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004ad, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004ae, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004af, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004b0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004b1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004b2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004b3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004b4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004b5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004b6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004b7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004b8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004b9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004ba, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004bb, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004bc, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004bd, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004be, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004bf, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004c0, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004c1, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004c2, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004c3, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004c4, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004c5, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004c6, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004c7, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004c8, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004c9, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004ca, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004cb, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004cc, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004cd, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004ce, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0004cf, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000510, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000511, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000512, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000513, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000514, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000515, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000516, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000517, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000518, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000519, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x00051a, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x00051b, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x00051c, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x00051d, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x00051e, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x00051f, 0x3f800000);</div><div class='add'>+	nv_icmd(dev, 0x000520, 0x000002b6);</div><div class='add'>+	nv_icmd(dev, 0x000529, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000530, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x000531, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x000532, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x000533, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x000534, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x000535, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x000536, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x000537, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x000538, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x000539, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x00053a, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x00053b, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x00053c, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x00053d, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x00053e, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x00053f, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x000585, 0x0000003f);</div><div class='add'>+	nv_icmd(dev, 0x000576, 0x00000003);</div><div class='add'>+	nv_icmd(dev, 0x00057b, 0x00000059);</div><div class='add'>+	nv_icmd(dev, 0x000586, 0x00000040);</div><div class='add'>+	nv_icmd(dev, 0x000582, 0x00000080);</div><div class='add'>+	nv_icmd(dev, 0x000583, 0x00000080);</div><div class='add'>+	nv_icmd(dev, 0x0005c2, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000638, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000639, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00063a, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x00063b, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00063c, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00063d, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x00063e, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0008b8, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0008b9, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0008ba, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0008bb, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0008bc, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0008bd, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0008be, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0008bf, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000900, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000901, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000902, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000903, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000904, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000905, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000906, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000907, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000908, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000909, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x00090a, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x00090b, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x00090c, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x00090d, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x00090e, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x00090f, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000910, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000911, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000912, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000913, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000914, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000915, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000916, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000917, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000918, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000919, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00091a, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00091b, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00091c, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00091d, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00091e, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00091f, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000920, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000921, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000922, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000923, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000924, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000925, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000926, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000927, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000928, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000929, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00092a, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00092b, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00092c, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00092d, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00092e, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00092f, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000648, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000649, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00064a, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00064b, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00064c, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00064d, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00064e, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00064f, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000650, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000658, 0x0000000f);</div><div class='add'>+	nv_icmd(dev, 0x0007ff, 0x0000000a);</div><div class='add'>+	nv_icmd(dev, 0x00066a, 0x40000000);</div><div class='add'>+	nv_icmd(dev, 0x00066b, 0x10000000);</div><div class='add'>+	nv_icmd(dev, 0x00066c, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x00066d, 0xffff0000);</div><div class='add'>+	nv_icmd(dev, 0x0007af, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x0007b0, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x0007f6, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0006b2, 0x00000055);</div><div class='add'>+	nv_icmd(dev, 0x0007ad, 0x00000003);</div><div class='add'>+	nv_icmd(dev, 0x000937, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000971, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x000972, 0x00000040);</div><div class='add'>+	nv_icmd(dev, 0x000973, 0x0000012c);</div><div class='add'>+	nv_icmd(dev, 0x00097c, 0x00000040);</div><div class='add'>+	nv_icmd(dev, 0x000979, 0x00000003);</div><div class='add'>+	nv_icmd(dev, 0x000975, 0x00000020);</div><div class='add'>+	nv_icmd(dev, 0x000976, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000977, 0x00000020);</div><div class='add'>+	nv_icmd(dev, 0x000978, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000957, 0x00000003);</div><div class='add'>+	nv_icmd(dev, 0x00095e, 0x20164010);</div><div class='add'>+	nv_icmd(dev, 0x00095f, 0x00000020);</div><div class='add'>+	nv_icmd(dev, 0x00097d, 0x00000020);</div><div class='add'>+	nv_icmd(dev, 0x000683, 0x00000006);</div><div class='add'>+	nv_icmd(dev, 0x000685, 0x003fffff);</div><div class='add'>+	nv_icmd(dev, 0x000687, 0x003fffff);</div><div class='add'>+	nv_icmd(dev, 0x0006a0, 0x00000005);</div><div class='add'>+	nv_icmd(dev, 0x000840, 0x00400008);</div><div class='add'>+	nv_icmd(dev, 0x000841, 0x08000080);</div><div class='add'>+	nv_icmd(dev, 0x000842, 0x00400008);</div><div class='add'>+	nv_icmd(dev, 0x000843, 0x08000080);</div><div class='add'>+	nv_icmd(dev, 0x000818, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000819, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00081a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00081b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00081c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00081d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00081e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00081f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000848, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000849, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00084a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00084b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00084c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00084d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00084e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00084f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000850, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000851, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000852, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000853, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000854, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000855, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000856, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000857, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000738, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x0006aa, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0006ab, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x0006ac, 0x00000080);</div><div class='add'>+	nv_icmd(dev, 0x0006ad, 0x00000100);</div><div class='add'>+	nv_icmd(dev, 0x0006ae, 0x00000100);</div><div class='add'>+	nv_icmd(dev, 0x0006b1, 0x00000011);</div><div class='add'>+	nv_icmd(dev, 0x0006bb, 0x000000cf);</div><div class='add'>+	nv_icmd(dev, 0x0006ce, 0x2a712488);</div><div class='add'>+	nv_icmd(dev, 0x000739, 0x4085c000);</div><div class='add'>+	nv_icmd(dev, 0x00073a, 0x00000080);</div><div class='add'>+	nv_icmd(dev, 0x000786, 0x80000100);</div><div class='add'>+	nv_icmd(dev, 0x00073c, 0x00010100);</div><div class='add'>+	nv_icmd(dev, 0x00073d, 0x02800000);</div><div class='add'>+	nv_icmd(dev, 0x000787, 0x000000cf);</div><div class='add'>+	nv_icmd(dev, 0x00078c, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x000792, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000794, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000795, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000796, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000797, 0x000000cf);</div><div class='add'>+	nv_icmd(dev, 0x000836, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00079a, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000833, 0x04444480);</div><div class='add'>+	nv_icmd(dev, 0x0007a1, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0007a3, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0007a4, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0007a5, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000831, 0x00000004);</div><div class='add'>+	nv_icmd(dev, 0x000b07, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000b08, 0x00000100);</div><div class='add'>+	nv_icmd(dev, 0x000b09, 0x00000100);</div><div class='add'>+	nv_icmd(dev, 0x000b0a, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000a04, 0x000000ff);</div><div class='add'>+	nv_icmd(dev, 0x000a0b, 0x00000040);</div><div class='add'>+	nv_icmd(dev, 0x00097f, 0x00000100);</div><div class='add'>+	nv_icmd(dev, 0x000a02, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000809, 0x00000007);</div><div class='add'>+	nv_icmd(dev, 0x00c221, 0x00000040);</div><div class='add'>+	nv_icmd(dev, 0x00c1b0, 0x0000000f);</div><div class='add'>+	nv_icmd(dev, 0x00c1b1, 0x0000000f);</div><div class='add'>+	nv_icmd(dev, 0x00c1b2, 0x0000000f);</div><div class='add'>+	nv_icmd(dev, 0x00c1b3, 0x0000000f);</div><div class='add'>+	nv_icmd(dev, 0x00c1b4, 0x0000000f);</div><div class='add'>+	nv_icmd(dev, 0x00c1b5, 0x0000000f);</div><div class='add'>+	nv_icmd(dev, 0x00c1b6, 0x0000000f);</div><div class='add'>+	nv_icmd(dev, 0x00c1b7, 0x0000000f);</div><div class='add'>+	nv_icmd(dev, 0x00c1b8, 0x0fac6881);</div><div class='add'>+	nv_icmd(dev, 0x00c1b9, 0x00fac688);</div><div class='add'>+	nv_icmd(dev, 0x00c401, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00c402, 0x00010001);</div><div class='add'>+	nv_icmd(dev, 0x00c403, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00c404, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00c40e, 0x00000020);</div><div class='add'>+	nv_icmd(dev, 0x00c500, 0x00000003);</div><div class='add'>+	nv_icmd(dev, 0x01e100, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x001000, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x0006aa, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0006ad, 0x00000100);</div><div class='add'>+	nv_icmd(dev, 0x0006ae, 0x00000100);</div><div class='add'>+	nv_icmd(dev, 0x0006b1, 0x00000011);</div><div class='add'>+	nv_icmd(dev, 0x00078c, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x000792, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000794, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000795, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000796, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000797, 0x000000cf);</div><div class='add'>+	nv_icmd(dev, 0x00079a, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000833, 0x04444480);</div><div class='add'>+	nv_icmd(dev, 0x0007a1, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0007a3, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0007a4, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x0007a5, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000831, 0x00000004);</div><div class='add'>+	nv_icmd(dev, 0x01e100, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x001000, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x000039, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00003a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00003b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000380, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000366, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000367, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000368, 0x00000fff);</div><div class='add'>+	nv_icmd(dev, 0x000370, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000371, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000372, 0x000fffff);</div><div class='add'>+	nv_icmd(dev, 0x000813, 0x00000006);</div><div class='add'>+	nv_icmd(dev, 0x000814, 0x00000008);</div><div class='add'>+	nv_icmd(dev, 0x000957, 0x00000003);</div><div class='add'>+	nv_icmd(dev, 0x000818, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000819, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00081a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00081b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00081c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00081d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00081e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00081f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000848, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000849, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00084a, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00084b, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00084c, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00084d, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00084e, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x00084f, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000850, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000851, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000852, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000853, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000854, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000855, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000856, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000857, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000738, 0x00000000);</div><div class='add'>+	nv_icmd(dev, 0x000b07, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000b08, 0x00000100);</div><div class='add'>+	nv_icmd(dev, 0x000b09, 0x00000100);</div><div class='add'>+	nv_icmd(dev, 0x000b0a, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000a04, 0x000000ff);</div><div class='add'>+	nv_icmd(dev, 0x00097f, 0x00000100);</div><div class='add'>+	nv_icmd(dev, 0x000a02, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000809, 0x00000007);</div><div class='add'>+	nv_icmd(dev, 0x00c221, 0x00000040);</div><div class='add'>+	nv_icmd(dev, 0x00c401, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00c402, 0x00010001);</div><div class='add'>+	nv_icmd(dev, 0x00c403, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00c404, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x00c40e, 0x00000020);</div><div class='add'>+	nv_icmd(dev, 0x00c500, 0x00000003);</div><div class='add'>+	nv_icmd(dev, 0x01e100, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x001000, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x000b07, 0x00000002);</div><div class='add'>+	nv_icmd(dev, 0x000b08, 0x00000100);</div><div class='add'>+	nv_icmd(dev, 0x000b09, 0x00000100);</div><div class='add'>+	nv_icmd(dev, 0x000b0a, 0x00000001);</div><div class='add'>+	nv_icmd(dev, 0x01e100, 0x00000001);</div><div class='add'>+	nv_wr32(dev, 0x400208, 0x00000000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nv_mthd(struct drm_device *dev, u32 class, u32 mthd, u32 data)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x40448c, data);</div><div class='add'>+	nv_wr32(dev, 0x404488, 0x80000000 | (mthd &lt;&lt; 14) | class);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_grctx_generate_a097(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0800, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0840, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0880, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x08c0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0900, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0940, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0980, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x09c0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0804, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0844, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0884, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x08c4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0904, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0944, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0984, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x09c4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0808, 0x00000400);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0848, 0x00000400);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0888, 0x00000400);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x08c8, 0x00000400);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0908, 0x00000400);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0948, 0x00000400);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0988, 0x00000400);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x09c8, 0x00000400);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x080c, 0x00000300);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x084c, 0x00000300);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x088c, 0x00000300);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x08cc, 0x00000300);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x090c, 0x00000300);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x094c, 0x00000300);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x098c, 0x00000300);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x09cc, 0x00000300);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0810, 0x000000cf);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0850, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0890, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x08d0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0910, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0950, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0990, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x09d0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0814, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0854, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0894, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x08d4, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0914, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0954, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0994, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x09d4, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0818, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0858, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0898, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x08d8, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0918, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0958, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0998, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x09d8, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x081c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x085c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x089c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x08dc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x091c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x095c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x099c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x09dc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0820, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0860, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x08a0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x08e0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0920, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0960, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x09a0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x09e0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c00, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c10, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c20, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c30, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c40, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c50, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c60, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c70, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c80, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c90, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ca0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cb0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cc0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cd0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ce0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cf0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c04, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c14, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c24, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c34, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c44, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c54, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c64, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c74, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c84, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c94, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ca4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cb4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cc4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cd4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ce4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cf4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c08, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c18, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c28, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c38, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c48, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c58, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c68, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c78, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c88, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c98, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ca8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cb8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cc8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cd8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ce8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cf8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c0c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c1c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c2c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c3c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c4c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c5c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c6c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c7c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c8c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1c9c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cbc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ccc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cdc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1cfc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d00, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d10, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d20, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d30, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d40, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d50, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d60, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d70, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d80, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d90, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1da0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1db0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1dc0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1dd0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1de0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1df0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d04, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d14, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d24, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d34, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d44, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d54, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d64, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d74, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d84, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d94, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1da4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1db4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1dc4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1dd4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1de4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1df4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d08, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d18, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d28, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d38, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d48, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d58, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d68, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d78, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d88, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d98, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1da8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1db8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1dc8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1dd8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1de8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1df8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d0c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d1c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d2c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d3c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d4c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d5c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d6c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d7c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d8c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1d9c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1dac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1dbc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1dcc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ddc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1dec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1dfc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f00, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f08, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f10, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f18, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f20, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f28, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f30, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f38, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f40, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f48, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f50, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f58, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f60, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f68, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f70, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f78, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f04, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f0c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f14, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f1c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f24, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f2c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f34, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f3c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f44, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f4c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f54, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f5c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f64, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f6c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f74, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f7c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f80, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f88, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f90, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f98, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fa0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fa8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fb0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fb8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fc0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fc8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fd0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fd8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fe0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fe8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ff0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ff8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f84, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f8c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f94, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1f9c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fa4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fb4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fbc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fc4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fcc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fd4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fdc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fe4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1fec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ff4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ffc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2000, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2040, 0x00000011);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2080, 0x00000020);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x20c0, 0x00000030);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2100, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2140, 0x00000051);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x200c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x204c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x208c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x20cc, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x210c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x214c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2010, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2050, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2090, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x20d0, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2110, 0x00000003);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2150, 0x00000004);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0380, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x03a0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x03c0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x03e0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0384, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x03a4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x03c4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x03e4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0388, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x03a8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x03c8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x03e8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x038c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x03ac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x03cc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x03ec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0700, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0710, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0720, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0730, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0704, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0714, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0724, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0734, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0708, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0718, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0728, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0738, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2800, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2804, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2808, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x280c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2810, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2814, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2818, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x281c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2820, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2824, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2828, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x282c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2830, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2834, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2838, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x283c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2840, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2844, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2848, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x284c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2850, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2854, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2858, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x285c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2860, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2864, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2868, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x286c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2870, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2874, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2878, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x287c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2880, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2884, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2888, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x288c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2890, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2894, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2898, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x289c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28a0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28a4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28a8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28ac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28b0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28b4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28b8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28bc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28c0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28c4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28c8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28cc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28d0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28d4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28d8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28dc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28e0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28e4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28e8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28ec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28f0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28f4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28f8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x28fc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2900, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2904, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2908, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x290c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2910, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2914, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2918, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x291c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2920, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2924, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2928, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x292c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2930, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2934, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2938, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x293c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2940, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2944, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2948, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x294c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2950, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2954, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2958, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x295c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2960, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2964, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2968, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x296c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2970, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2974, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2978, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x297c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2980, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2984, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2988, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x298c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2990, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2994, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2998, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x299c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29a0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29a4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29a8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29ac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29b0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29b4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29b8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29bc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29c0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29c4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29c8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29cc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29d0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29d4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29d8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29dc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29e0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29e4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29e8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29ec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29f0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29f4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29f8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x29fc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a00, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a20, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a40, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a60, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a80, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0aa0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ac0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ae0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b00, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b20, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b40, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b60, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b80, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ba0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0bc0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0be0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a04, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a24, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a44, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a64, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a84, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0aa4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ac4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ae4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b04, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b24, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b44, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b64, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b84, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ba4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0bc4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0be4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a08, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a28, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a48, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a68, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a88, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0aa8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ac8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ae8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b08, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b28, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b48, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b68, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b88, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ba8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0bc8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0be8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a0c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a2c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a4c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a6c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a8c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0aac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0acc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0aec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b0c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b2c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b4c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b6c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b8c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0bac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0bcc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0bec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a10, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a30, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a50, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a70, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a90, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ab0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ad0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0af0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b10, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b30, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b50, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b70, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b90, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0bb0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0bd0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0bf0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a14, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a34, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a54, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a74, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0a94, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ab4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ad4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0af4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b14, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b34, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b54, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b74, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0b94, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0bb4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0bd4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0bf4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c00, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c10, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c20, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c30, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c40, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c50, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c60, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c70, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c80, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c90, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ca0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cb0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cc0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cd0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ce0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cf0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c04, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c14, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c24, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c34, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c44, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c54, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c64, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c74, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c84, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c94, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ca4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cb4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cc4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cd4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ce4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cf4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c08, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c18, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c28, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c38, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c48, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c58, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c68, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c78, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c88, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c98, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ca8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cb8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cc8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cd8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ce8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cf8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c0c, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c1c, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c2c, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c3c, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c4c, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c5c, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c6c, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c7c, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c8c, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0c9c, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cac, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cbc, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ccc, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cdc, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cec, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0cfc, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d00, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d08, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d10, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d18, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d20, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d28, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d30, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d38, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d04, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d0c, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d14, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d1c, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d24, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d2c, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d34, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d3c, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e00, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e10, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e20, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e30, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e40, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e50, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e60, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e70, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e80, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e90, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ea0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0eb0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ec0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ed0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ee0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ef0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e04, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e14, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e24, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e34, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e44, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e54, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e64, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e74, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e84, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e94, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ea4, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0eb4, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ec4, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ed4, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ee4, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ef4, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e08, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e18, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e28, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e38, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e48, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e58, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e68, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e78, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e88, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0e98, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ea8, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0eb8, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ec8, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ed8, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ee8, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ef8, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d40, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d48, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d50, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d58, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d44, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d4c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d54, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d5c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e00, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e20, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e40, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e60, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e80, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ea0, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ec0, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ee0, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e04, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e24, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e44, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e64, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e84, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ea4, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ec4, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ee4, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e08, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e28, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e48, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e68, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e88, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ea8, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ec8, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ee8, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e0c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e2c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e4c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e6c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e8c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1eac, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ecc, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1eec, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e10, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e30, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e50, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e70, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e90, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1eb0, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ed0, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ef0, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e14, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e34, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e54, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e74, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e94, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1eb4, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ed4, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ef4, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e18, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e38, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e58, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e78, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1e98, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1eb8, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ed8, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1ef8, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3400, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3404, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3408, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x340c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3410, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3414, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3418, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x341c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3420, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3424, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3428, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x342c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3430, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3434, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3438, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x343c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3440, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3444, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3448, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x344c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3450, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3454, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3458, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x345c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3460, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3464, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3468, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x346c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3470, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3474, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3478, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x347c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3480, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3484, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3488, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x348c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3490, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3494, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3498, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x349c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34a0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34a4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34a8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34ac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34b0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34b4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34b8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34bc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34c0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34c4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34c8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34cc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34d0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34d4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34d8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34dc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34e0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34e4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34e8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34ec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34f0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34f4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34f8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x34fc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3500, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3504, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3508, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x350c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3510, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3514, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3518, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x351c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3520, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3524, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3528, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x352c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3530, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3534, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3538, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x353c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3540, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3544, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3548, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x354c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3550, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3554, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3558, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x355c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3560, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3564, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3568, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x356c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3570, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3574, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3578, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x357c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3580, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3584, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3588, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x358c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3590, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3594, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x3598, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x359c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35a0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35a4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35a8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35ac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35b0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35b4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35b8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35bc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35c0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35c4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35c8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35cc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35d0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35d4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35d8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35dc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35e0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35e4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35e8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35ec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35f0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35f4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35f8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x35fc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x030c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1944, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1514, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d68, 0x0000ffff);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x121c, 0x0fac6881);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fac, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1538, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fe0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fe4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fe8, 0x00000014);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fec, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ff0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x179c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1228, 0x00000400);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x122c, 0x00000300);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1230, 0x00010001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07f8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x15b4, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x15cc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1534, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fb0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x15d0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x153c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x16b4, 0x00000003);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fbc, 0x0000ffff);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fc0, 0x0000ffff);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fc4, 0x0000ffff);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fc8, 0x0000ffff);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0df8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0dfc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1948, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1970, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x161c, 0x000009f0);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0dcc, 0x00000010);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x163c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x15e4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1160, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1164, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1168, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x116c, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1170, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1174, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1178, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x117c, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1180, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1184, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1188, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x118c, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1190, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1194, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1198, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x119c, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11a0, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11a4, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11a8, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11ac, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11b0, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11b4, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11b8, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11bc, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11c0, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11c4, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11c8, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11cc, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11d0, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11d4, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11d8, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x11dc, 0x25e00040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1880, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1884, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1888, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x188c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1890, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1894, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1898, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x189c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18a0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18a4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18a8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18ac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18b0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18b4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18b8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18bc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18c0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18c4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18c8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18cc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18d0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18d4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18d8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18dc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18e0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18e4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18e8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18ec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18f0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18f4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18f8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x18fc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0f84, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0f88, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x17c8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x17cc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x17d0, 0x000000ff);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x17d4, 0xffffffff);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x17d8, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x17dc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x15f4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x15f8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1434, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1438, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d74, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0dec, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x13a4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1318, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1644, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0748, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0de8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1648, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x12a4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1120, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1124, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1128, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x112c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1118, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x164c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1658, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1910, 0x00000290);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1518, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x165c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1520, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1604, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1570, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x13b0, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x13b4, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x020c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1670, 0x30201000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1674, 0x70605040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1678, 0xb8a89888);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x167c, 0xf8e8d8c8);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x166c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1680, 0x00ffff00);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x12d0, 0x00000003);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x12d4, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1684, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1688, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0dac, 0x00001b02);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0db0, 0x00001b02);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0db4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x168c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x15bc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x156c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x187c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1110, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0dc0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0dc4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0dc8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1234, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1690, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x12ac, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0790, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0794, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0798, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x079c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07a0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x077c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1000, 0x00000010);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x10fc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1290, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0218, 0x00000010);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x12d8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x12dc, 0x00000010);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d94, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x155c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1560, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1564, 0x00000fff);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1574, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1578, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x157c, 0x000fffff);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1354, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1610, 0x00000012);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1608, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x160c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x260c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07ac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x162c, 0x00000003);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0210, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0320, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0324, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0328, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x032c, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0330, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0334, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0338, 0x3f800000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0750, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0760, 0x39291909);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0764, 0x79695949);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0768, 0xb9a99989);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x076c, 0xf9e9d9c9);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0770, 0x30201000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0774, 0x70605040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0778, 0x00009080);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0780, 0x39291909);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0784, 0x79695949);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0788, 0xb9a99989);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x078c, 0xf9e9d9c9);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07d0, 0x30201000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07d4, 0x70605040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07d8, 0x00009080);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x037c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0740, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0744, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x2600, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1918, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x191c, 0x00000900);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1920, 0x00000405);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1308, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1924, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x13ac, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x192c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x193c, 0x00002c1c);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d7c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0f8c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x02c0, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1510, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1940, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ff4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0ff8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x194c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1950, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1968, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1590, 0x0000003f);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07e8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07ec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07f0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07f4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x196c, 0x00000011);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x02e4, 0x0000b001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x036c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0370, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x197c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fcc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fd0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x02d8, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1980, 0x00000080);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1504, 0x00000080);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1984, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0300, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x13a8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x12ec, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1310, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1314, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1380, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1384, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1388, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x138c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1390, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1394, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x139c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1398, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1594, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1598, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x159c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x15a0, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x15a4, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0f54, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0f58, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0f5c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19bc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0f9c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fa0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x12cc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x12e8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x130c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1360, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1364, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1368, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x136c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1370, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1374, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1378, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x137c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x133c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1340, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1344, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1348, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x134c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1350, 0x00000002);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1358, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x12e4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x131c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1320, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1324, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1328, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19c0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1140, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19c4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19c8, 0x00001500);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x135c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0f90, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19e0, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19e4, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19e8, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19ec, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19f0, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19f4, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19f8, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19fc, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x19cc, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x15b8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1a00, 0x00001111);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1a04, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1a08, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1a0c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1a10, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1a14, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1a18, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1a1c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d6c, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d70, 0xffff0000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x10f8, 0x00001010);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d80, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d84, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d88, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d8c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d90, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0da0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07a4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07a8, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1508, 0x80000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x150c, 0x40000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1668, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0318, 0x00000008);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x031c, 0x00000008);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d9c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0374, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0378, 0x00000020);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x07dc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x074c, 0x00000055);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1420, 0x00000003);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x17bc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x17c0, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x17c4, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1008, 0x00000008);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x100c, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1010, 0x0000012c);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0d60, 0x00000040);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x075c, 0x00000003);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1018, 0x00000020);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x101c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1020, 0x00000020);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1024, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1444, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1448, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x144c, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0360, 0x20164010);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0364, 0x00000020);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0368, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0de4, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0204, 0x00000006);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0208, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x02cc, 0x003fffff);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x02d0, 0x003fffff);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1220, 0x00000005);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0fdc, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0f98, 0x00400008);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1284, 0x08000080);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1450, 0x00400008);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x1454, 0x08000080);</div><div class='add'>+	nv_mthd(dev, 0xa097, 0x0214, 0x00000000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_grctx_generate_902d(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0200, 0x000000cf);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0204, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0208, 0x00000020);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x020c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0210, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0214, 0x00000080);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0218, 0x00000100);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x021c, 0x00000100);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0220, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0224, 0x00000000);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0230, 0x000000cf);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0234, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0238, 0x00000020);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x023c, 0x00000001);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0244, 0x00000080);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x0248, 0x00000100);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x024c, 0x00000100);</div><div class='add'>+	nv_mthd(dev, 0x902d, 0x3410, 0x00000000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_unk40xx(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x404010, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404014, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404018, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40401c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404020, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404024, 0xe000);</div><div class='add'>+	nv_wr32(dev, 0x404028, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040a8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040ac, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040b0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040b4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040b8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040bc, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040c0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040c4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040c8, 0xf800008f);</div><div class='add'>+	nv_wr32(dev, 0x4040d0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040d4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040d8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040dc, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040e0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040e4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4040e8, 0x1000);</div><div class='add'>+	nv_wr32(dev, 0x4040f8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404130, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404134, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404138, 0x20000040);</div><div class='add'>+	nv_wr32(dev, 0x404150, 0x2e);</div><div class='add'>+	nv_wr32(dev, 0x404154, 0x400);</div><div class='add'>+	nv_wr32(dev, 0x404158, 0x200);</div><div class='add'>+	nv_wr32(dev, 0x404164, 0x55);</div><div class='add'>+	nv_wr32(dev, 0x4041a0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4041a4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4041a8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4041ac, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404200, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404204, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404208, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40420c, 0x0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_unk44xx(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x404404, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404408, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40440c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404410, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404414, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404418, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40441c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404420, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404424, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404428, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40442c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404430, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404434, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404438, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404460, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404464, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404468, 0xffffff);</div><div class='add'>+	nv_wr32(dev, 0x40446c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404480, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x404498, 0x1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_unk46xx(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x404604, 0x14);</div><div class='add'>+	nv_wr32(dev, 0x404608, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40460c, 0x3fff);</div><div class='add'>+	nv_wr32(dev, 0x404610, 0x100);</div><div class='add'>+	nv_wr32(dev, 0x404618, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40461c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404620, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404624, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40462c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404630, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404640, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404654, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404660, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404678, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40467c, 0x2);</div><div class='add'>+	nv_wr32(dev, 0x404680, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404684, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404688, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40468c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404690, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404694, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404698, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40469c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4046a0, 0x7f0080);</div><div class='add'>+	nv_wr32(dev, 0x4046a4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4046a8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4046ac, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4046b0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4046b4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4046b8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4046bc, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4046c0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4046c8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4046cc, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4046d0, 0x0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_unk47xx(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x404700, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404704, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404708, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404718, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40471c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404720, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404724, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404728, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40472c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404730, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404734, 0x100);</div><div class='add'>+	nv_wr32(dev, 0x404738, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40473c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404744, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404748, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x404754, 0x0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_unk58xx(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x405800, 0xf8000bf);</div><div class='add'>+	nv_wr32(dev, 0x405830, 0x2180648);</div><div class='add'>+	nv_wr32(dev, 0x405834, 0x8000000);</div><div class='add'>+	nv_wr32(dev, 0x405838, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x405854, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x405870, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x405874, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x405878, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x40587c, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x405a00, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x405a04, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x405a18, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x405b00, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x405b10, 0x1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_unk60xx(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x406020, 0x4103c1);</div><div class='add'>+	nv_wr32(dev, 0x406028, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x40602c, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x406030, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x406034, 0x1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_unk64xx(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x4064a8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4064ac, 0x3fff);</div><div class='add'>+	nv_wr32(dev, 0x4064b4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4064b8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4064c0, 0x801a00f0);</div><div class='add'>+	nv_wr32(dev, 0x4064c4, 0x192ffff);</div><div class='add'>+	nv_wr32(dev, 0x4064c8, 0x1800600);</div><div class='add'>+	nv_wr32(dev, 0x4064cc, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4064d0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4064d4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4064d8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4064dc, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4064e0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4064e4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4064e8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4064ec, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4064fc, 0x22a);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_unk70xx(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x407040, 0x0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_unk78xx(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x407804, 0x23);</div><div class='add'>+	nv_wr32(dev, 0x40780c, 0xa418820);</div><div class='add'>+	nv_wr32(dev, 0x407810, 0x62080e6);</div><div class='add'>+	nv_wr32(dev, 0x407814, 0x20398a4);</div><div class='add'>+	nv_wr32(dev, 0x407818, 0xe629062);</div><div class='add'>+	nv_wr32(dev, 0x40781c, 0xa418820);</div><div class='add'>+	nv_wr32(dev, 0x407820, 0xe6);</div><div class='add'>+	nv_wr32(dev, 0x4078bc, 0x103);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_unk80xx(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x408000, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x408004, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x408008, 0x30);</div><div class='add'>+	nv_wr32(dev, 0x40800c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x408010, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x408014, 0x69);</div><div class='add'>+	nv_wr32(dev, 0x408018, 0xe100e100);</div><div class='add'>+	nv_wr32(dev, 0x408064, 0x0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_unk88xx(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x408800, 0x2802a3c);</div><div class='add'>+	nv_wr32(dev, 0x408804, 0x40);</div><div class='add'>+	nv_wr32(dev, 0x408808, 0x1043e005);</div><div class='add'>+	nv_wr32(dev, 0x408840, 0xb);</div><div class='add'>+	nv_wr32(dev, 0x408900, 0x3080b801);</div><div class='add'>+	nv_wr32(dev, 0x408904, 0x62000001);</div><div class='add'>+	nv_wr32(dev, 0x408908, 0xc8102f);</div><div class='add'>+	nv_wr32(dev, 0x408980, 0x11d);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_gpc(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x418380, 0x16);</div><div class='add'>+	nv_wr32(dev, 0x418400, 0x38004e00);</div><div class='add'>+	nv_wr32(dev, 0x418404, 0x71e0ffff);</div><div class='add'>+	nv_wr32(dev, 0x41840c, 0x1008);</div><div class='add'>+	nv_wr32(dev, 0x418410, 0xfff0fff);</div><div class='add'>+	nv_wr32(dev, 0x418414, 0x2200fff);</div><div class='add'>+	nv_wr32(dev, 0x418450, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418454, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418458, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x41845c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418460, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418464, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418468, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x41846c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418470, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418600, 0x1f);</div><div class='add'>+	nv_wr32(dev, 0x418684, 0xf);</div><div class='add'>+	nv_wr32(dev, 0x418700, 0x2);</div><div class='add'>+	nv_wr32(dev, 0x418704, 0x80);</div><div class='add'>+	nv_wr32(dev, 0x418708, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x41870c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418710, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418800, 0x7006860a);</div><div class='add'>+	nv_wr32(dev, 0x418808, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x41880c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418810, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418828, 0x44);</div><div class='add'>+	nv_wr32(dev, 0x418830, 0x10000001);</div><div class='add'>+	nv_wr32(dev, 0x4188d8, 0x8);</div><div class='add'>+	nv_wr32(dev, 0x4188e0, 0x1000000);</div><div class='add'>+	nv_wr32(dev, 0x4188e8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4188ec, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4188f0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4188f4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4188f8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x4188fc, 0x20100018);</div><div class='add'>+	nv_wr32(dev, 0x41891c, 0xff00ff);</div><div class='add'>+	nv_wr32(dev, 0x418924, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418928, 0xffff00);</div><div class='add'>+	nv_wr32(dev, 0x41892c, 0xff00);</div><div class='add'>+	nv_wr32(dev, 0x418a00, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a04, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a08, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a0c, 0x10000);</div><div class='add'>+	nv_wr32(dev, 0x418a10, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a14, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a18, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a20, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a24, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a28, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a2c, 0x10000);</div><div class='add'>+	nv_wr32(dev, 0x418a30, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a34, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a38, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a40, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a44, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a48, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a4c, 0x10000);</div><div class='add'>+	nv_wr32(dev, 0x418a50, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a54, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a58, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a60, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a64, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a68, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a6c, 0x10000);</div><div class='add'>+	nv_wr32(dev, 0x418a70, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a74, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a78, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a80, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a84, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a88, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a8c, 0x10000);</div><div class='add'>+	nv_wr32(dev, 0x418a90, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a94, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418a98, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418aa0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418aa4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418aa8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418aac, 0x10000);</div><div class='add'>+	nv_wr32(dev, 0x418ab0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418ab4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418ab8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418ac0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418ac4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418ac8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418acc, 0x10000);</div><div class='add'>+	nv_wr32(dev, 0x418ad0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418ad4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418ad8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418ae0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418ae4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418ae8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418aec, 0x10000);</div><div class='add'>+	nv_wr32(dev, 0x418af0, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418af4, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418af8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418b00, 0x6);</div><div class='add'>+	nv_wr32(dev, 0x418b08, 0xa418820);</div><div class='add'>+	nv_wr32(dev, 0x418b0c, 0x62080e6);</div><div class='add'>+	nv_wr32(dev, 0x418b10, 0x20398a4);</div><div class='add'>+	nv_wr32(dev, 0x418b14, 0xe629062);</div><div class='add'>+	nv_wr32(dev, 0x418b18, 0xa418820);</div><div class='add'>+	nv_wr32(dev, 0x418b1c, 0xe6);</div><div class='add'>+	nv_wr32(dev, 0x418bb8, 0x103);</div><div class='add'>+	nv_wr32(dev, 0x418c08, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x418c10, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418c14, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418c18, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418c1c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418c20, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418c24, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418c28, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418c2c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x418c40, 0xffffffff);</div><div class='add'>+	nv_wr32(dev, 0x418c6c, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x418c80, 0x20200004);</div><div class='add'>+	nv_wr32(dev, 0x418c8c, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x419000, 0x780);</div><div class='add'>+	nv_wr32(dev, 0x419004, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419008, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419014, 0x4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_tpc(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x419848, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419864, 0x129);</div><div class='add'>+	nv_wr32(dev, 0x419888, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419a00, 0xf0);</div><div class='add'>+	nv_wr32(dev, 0x419a04, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x419a08, 0x21);</div><div class='add'>+	nv_wr32(dev, 0x419a0c, 0x20000);</div><div class='add'>+	nv_wr32(dev, 0x419a10, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419a14, 0x200);</div><div class='add'>+	nv_wr32(dev, 0x419a1c, 0xc000);</div><div class='add'>+	nv_wr32(dev, 0x419a20, 0x800);</div><div class='add'>+	nv_wr32(dev, 0x419a30, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x419ac4, 0x37f440);</div><div class='add'>+	nv_wr32(dev, 0x419c00, 0xa);</div><div class='add'>+	nv_wr32(dev, 0x419c04, 0x80000006);</div><div class='add'>+	nv_wr32(dev, 0x419c08, 0x2);</div><div class='add'>+	nv_wr32(dev, 0x419c20, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419c24, 0x84210);</div><div class='add'>+	nv_wr32(dev, 0x419c28, 0x3efbefbe);</div><div class='add'>+	nv_wr32(dev, 0x419ce8, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419cf4, 0x3203);</div><div class='add'>+	nv_wr32(dev, 0x419e04, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e08, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e0c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e10, 0x402);</div><div class='add'>+	nv_wr32(dev, 0x419e44, 0x13eff2);</div><div class='add'>+	nv_wr32(dev, 0x419e48, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e4c, 0x7f);</div><div class='add'>+	nv_wr32(dev, 0x419e50, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e54, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e58, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e5c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e60, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e64, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e68, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e6c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e70, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e74, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e78, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e7c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e80, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e84, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e88, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e8c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e90, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e94, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419e98, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419eac, 0x1fcf);</div><div class='add'>+	nv_wr32(dev, 0x419eb0, 0xd3f);</div><div class='add'>+	nv_wr32(dev, 0x419ec8, 0x1304f);</div><div class='add'>+	nv_wr32(dev, 0x419f30, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419f34, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419f38, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419f3c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419f40, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419f44, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419f48, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419f4c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419f58, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x419f78, 0xb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+nve0_graph_generate_tpcunk(struct drm_device *dev)</div><div class='add'>+{</div><div class='add'>+	nv_wr32(dev, 0x41be24, 0x6);</div><div class='add'>+	nv_wr32(dev, 0x41bec0, 0x12180000);</div><div class='add'>+	nv_wr32(dev, 0x41bec4, 0x37f7f);</div><div class='add'>+	nv_wr32(dev, 0x41bee4, 0x6480430);</div><div class='add'>+	nv_wr32(dev, 0x41bf00, 0xa418820);</div><div class='add'>+	nv_wr32(dev, 0x41bf04, 0x62080e6);</div><div class='add'>+	nv_wr32(dev, 0x41bf08, 0x20398a4);</div><div class='add'>+	nv_wr32(dev, 0x41bf0c, 0xe629062);</div><div class='add'>+	nv_wr32(dev, 0x41bf10, 0xa418820);</div><div class='add'>+	nv_wr32(dev, 0x41bf14, 0xe6);</div><div class='add'>+	nv_wr32(dev, 0x41bfd0, 0x900103);</div><div class='add'>+	nv_wr32(dev, 0x41bfe0, 0x400001);</div><div class='add'>+	nv_wr32(dev, 0x41bfe4, 0x0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+nve0_grctx_generate(struct nouveau_channel *chan)</div><div class='add'>+{</div><div class='add'>+	struct nve0_graph_priv *priv = nv_engine(chan-&gt;dev, NVOBJ_ENGINE_GR);</div><div class='add'>+	struct nve0_graph_chan *grch = chan-&gt;engctx[NVOBJ_ENGINE_GR];</div><div class='add'>+	struct drm_device *dev = chan-&gt;dev;</div><div class='add'>+	u32 data[6] = {}, data2[2] = {}, tmp;</div><div class='add'>+	u32 tpc_set = 0, tpc_mask = 0;</div><div class='add'>+	u8 tpcnr[GPC_MAX], a, b;</div><div class='add'>+	u8 shift, ntpcv;</div><div class='add'>+	int i, gpc, tpc, id;</div><div class='add'>+</div><div class='add'>+	nv_mask(dev, 0x000260, 0x00000001, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x400204, 0x00000000);</div><div class='add'>+	nv_wr32(dev, 0x400208, 0x00000000);</div><div class='add'>+</div><div class='add'>+	nve0_graph_generate_unk40xx(dev);</div><div class='add'>+	nve0_graph_generate_unk44xx(dev);</div><div class='add'>+	nve0_graph_generate_unk46xx(dev);</div><div class='add'>+	nve0_graph_generate_unk47xx(dev);</div><div class='add'>+	nve0_graph_generate_unk58xx(dev);</div><div class='add'>+	nve0_graph_generate_unk60xx(dev);</div><div class='add'>+	nve0_graph_generate_unk64xx(dev);</div><div class='add'>+	nve0_graph_generate_unk70xx(dev);</div><div class='add'>+	nve0_graph_generate_unk78xx(dev);</div><div class='add'>+	nve0_graph_generate_unk80xx(dev);</div><div class='add'>+	nve0_graph_generate_unk88xx(dev);</div><div class='add'>+	nve0_graph_generate_gpc(dev);</div><div class='add'>+	nve0_graph_generate_tpc(dev);</div><div class='add'>+	nve0_graph_generate_tpcunk(dev);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x404154, 0x0);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; grch-&gt;mmio_nr * 8; i += 8) {</div><div class='add'>+		u32 reg = nv_ro32(grch-&gt;mmio, i + 0);</div><div class='add'>+		u32 val = nv_ro32(grch-&gt;mmio, i + 4);</div><div class='add'>+		nv_wr32(dev, reg, val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x418c6c, 0x1);</div><div class='add'>+	nv_wr32(dev, 0x41980c, 0x10);</div><div class='add'>+	nv_wr32(dev, 0x41be08, 0x4);</div><div class='add'>+	nv_wr32(dev, 0x4064c0, 0x801a00f0);</div><div class='add'>+	nv_wr32(dev, 0x405800, 0xf8000bf);</div><div class='add'>+	nv_wr32(dev, 0x419c00, 0xa);</div><div class='add'>+</div><div class='add'>+	for (tpc = 0, id = 0; tpc &lt; 4; tpc++) {</div><div class='add'>+		for (gpc = 0; gpc &lt; priv-&gt;gpc_nr; gpc++) {</div><div class='add'>+			if (tpc &lt; priv-&gt;tpc_nr[gpc]) {</div><div class='add'>+				nv_wr32(dev, TPC_UNIT(gpc, tpc, 0x0698), id);</div><div class='add'>+				nv_wr32(dev, TPC_UNIT(gpc, tpc, 0x04e8), id);</div><div class='add'>+				nv_wr32(dev, GPC_UNIT(gpc, 0x0c10 + tpc * 4), id);</div><div class='add'>+				nv_wr32(dev, TPC_UNIT(gpc, tpc, 0x0088), id++);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			nv_wr32(dev, GPC_UNIT(gpc, 0x0c08), priv-&gt;tpc_nr[gpc]);</div><div class='add'>+			nv_wr32(dev, GPC_UNIT(gpc, 0x0c8c), priv-&gt;tpc_nr[gpc]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tmp = 0;</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;gpc_nr; i++)</div><div class='add'>+		tmp |= priv-&gt;tpc_nr[i] &lt;&lt; (i * 4);</div><div class='add'>+	nv_wr32(dev, 0x406028, tmp);</div><div class='add'>+	nv_wr32(dev, 0x405870, tmp);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x40602c, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x405874, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x406030, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x405878, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x406034, 0x0);</div><div class='add'>+	nv_wr32(dev, 0x40587c, 0x0);</div><div class='add'>+</div><div class='add'>+	/* calculate first set of magics */</div><div class='add'>+	memcpy(tpcnr, priv-&gt;tpc_nr, sizeof(priv-&gt;tpc_nr));</div><div class='add'>+</div><div class='add'>+	gpc = -1;</div><div class='add'>+	for (tpc = 0; tpc &lt; priv-&gt;tpc_total; tpc++) {</div><div class='add'>+		do {</div><div class='add'>+			gpc = (gpc + 1) % priv-&gt;gpc_nr;</div><div class='add'>+		} while (!tpcnr[gpc]);</div><div class='add'>+		tpcnr[gpc]--;</div><div class='add'>+</div><div class='add'>+		data[tpc / 6] |= gpc &lt;&lt; ((tpc % 6) * 5);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (; tpc &lt; 32; tpc++)</div><div class='add'>+		data[tpc / 6] |= 7 &lt;&lt; ((tpc % 6) * 5);</div><div class='add'>+</div><div class='add'>+	/* and the second... */</div><div class='add'>+	shift = 0;</div><div class='add'>+	ntpcv = priv-&gt;tpc_total;</div><div class='add'>+	while (!(ntpcv &amp; (1 &lt;&lt; 4))) {</div><div class='add'>+		ntpcv &lt;&lt;= 1;</div><div class='add'>+		shift++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data2[0]  = ntpcv &lt;&lt; 16;</div><div class='add'>+	data2[0] |= shift &lt;&lt; 21;</div><div class='add'>+	data2[0] |= (((1 &lt;&lt; (0 + 5)) % ntpcv) &lt;&lt; 24);</div><div class='add'>+	data2[0] |= priv-&gt;tpc_total &lt;&lt; 8;</div><div class='add'>+	data2[0] |= priv-&gt;magic_not_rop_nr;</div><div class='add'>+	for (i = 1; i &lt; 7; i++)</div><div class='add'>+		data2[1] |= ((1 &lt;&lt; (i + 5)) % ntpcv) &lt;&lt; ((i - 1) * 5);</div><div class='add'>+</div><div class='add'>+	/* and write it all the various parts of PGRAPH */</div><div class='add'>+	nv_wr32(dev, 0x418bb8, (priv-&gt;tpc_total &lt;&lt; 8) | priv-&gt;magic_not_rop_nr);</div><div class='add'>+	for (i = 0; i &lt; 6; i++)</div><div class='add'>+		nv_wr32(dev, 0x418b08 + (i * 4), data[i]);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x41bfd0, data2[0]);</div><div class='add'>+	nv_wr32(dev, 0x41bfe4, data2[1]);</div><div class='add'>+	for (i = 0; i &lt; 6; i++)</div><div class='add'>+		nv_wr32(dev, 0x41bf00 + (i * 4), data[i]);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x4078bc, (priv-&gt;tpc_total &lt;&lt; 8) | priv-&gt;magic_not_rop_nr);</div><div class='add'>+	for (i = 0; i &lt; 6; i++)</div><div class='add'>+		nv_wr32(dev, 0x40780c + (i * 4), data[i]);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	memcpy(tpcnr, priv-&gt;tpc_nr, sizeof(priv-&gt;tpc_nr));</div><div class='add'>+	for (gpc = 0; gpc &lt; priv-&gt;gpc_nr; gpc++)</div><div class='add'>+		tpc_mask |= ((1 &lt;&lt; priv-&gt;tpc_nr[gpc]) - 1) &lt;&lt; (gpc * 8);</div><div class='add'>+</div><div class='add'>+	for (i = 0, gpc = -1, b = -1; i &lt; 32; i++) {</div><div class='add'>+		a = (i * (priv-&gt;tpc_total - 1)) / 32;</div><div class='add'>+		if (a != b) {</div><div class='add'>+			b = a;</div><div class='add'>+			do {</div><div class='add'>+				gpc = (gpc + 1) % priv-&gt;gpc_nr;</div><div class='add'>+			} while (!tpcnr[gpc]);</div><div class='add'>+			tpc = priv-&gt;tpc_nr[gpc] - tpcnr[gpc]--;</div><div class='add'>+</div><div class='add'>+			tpc_set |= 1 &lt;&lt; ((gpc * 8) + tpc);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		nv_wr32(dev, 0x406800 + (i * 0x20), tpc_set);</div><div class='add'>+		nv_wr32(dev, 0x406c00 + (i * 0x20), tpc_set ^ tpc_mask);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++)</div><div class='add'>+		nv_wr32(dev, 0x4064d0 + (i * 0x04), 0x00000000);</div><div class='add'>+</div><div class='add'>+	nv_wr32(dev, 0x405b00, 0x201);</div><div class='add'>+	nv_wr32(dev, 0x408850, 0x2);</div><div class='add'>+	nv_wr32(dev, 0x408958, 0x2);</div><div class='add'>+	nv_wr32(dev, 0x419f78, 0xa);</div><div class='add'>+</div><div class='add'>+	nve0_grctx_generate_icmd(dev);</div><div class='add'>+	nve0_grctx_generate_a097(dev);</div><div class='add'>+	nve0_grctx_generate_902d(dev);</div><div class='add'>+</div><div class='add'>+	nv_mask(dev, 0x000260, 0x00000001, 0x00000001);</div><div class='add'>+	nv_wr32(dev, 0x418800, 0x7026860a); //XXX</div><div class='add'>+	nv_wr32(dev, 0x41be10, 0x00bb8bc7); //XXX</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile<br/>index 9d83729956ff..a6598fd66423 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/Makefile</a></div><div class='hunk'>@@ -70,8 +70,9 @@ radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \</div><div class='ctx'> 	r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \</div><div class='ctx'> 	r600_blit_kms.o radeon_pm.o atombios_dp.o r600_audio.o r600_hdmi.o \</div><div class='ctx'> 	evergreen.o evergreen_cs.o evergreen_blit_shaders.o evergreen_blit_kms.o \</div><div class='del'>-	radeon_trace_points.o ni.o cayman_blit_shaders.o atombios_encoders.o \</div><div class='del'>-	radeon_semaphore.o radeon_sa.o atombios_i2c.o si.o si_blit_shaders.o</div><div class='add'>+	evergreen_hdmi.o radeon_trace_points.o ni.o cayman_blit_shaders.o \</div><div class='add'>+	atombios_encoders.o radeon_semaphore.o radeon_sa.o atombios_i2c.o si.o \</div><div class='add'>+	si_blit_shaders.o radeon_prime.o</div><div class='ctx'> </div><div class='ctx'> radeon-$(CONFIG_COMPAT) += radeon_ioc32.o</div><div class='ctx'> radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c<br/>index af1054f8202a..01d77d1554f4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/atombios_crtc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/atombios_crtc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/atombios_crtc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/atombios_crtc.c</a></div><div class='hunk'>@@ -591,8 +591,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,</div><div class='ctx'> 		if (encoder-&gt;crtc == crtc) {</div><div class='ctx'> 			radeon_encoder = to_radeon_encoder(encoder);</div><div class='ctx'> 			connector = radeon_get_connector_for_encoder(encoder);</div><div class='del'>-			/* if (connector &amp;&amp; connector-&gt;display_info.bpc)</div><div class='del'>-				bpc = connector-&gt;display_info.bpc; */</div><div class='add'>+			bpc = radeon_get_monitor_bpc(connector);</div><div class='ctx'> 			encoder_mode = atombios_get_encoder_mode(encoder);</div><div class='ctx'> 			is_duallink = radeon_dig_monitor_is_duallink(encoder, mode-&gt;clock);</div><div class='ctx'> 			if ((radeon_encoder-&gt;devices &amp; (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) ||</div><div class='hunk'>@@ -968,9 +967,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode</div><div class='ctx'> 		struct radeon_connector_atom_dig *dig_connector =</div><div class='ctx'> 			radeon_connector-&gt;con_priv;</div><div class='ctx'> 		int dp_clock;</div><div class='del'>-</div><div class='del'>-		/* if (connector-&gt;display_info.bpc)</div><div class='del'>-			bpc = connector-&gt;display_info.bpc; */</div><div class='add'>+		bpc = radeon_get_monitor_bpc(connector);</div><div class='ctx'> </div><div class='ctx'> 		switch (encoder_mode) {</div><div class='ctx'> 		case ATOM_ENCODER_MODE_DP_MST:</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c<br/>index c57d85664e77..5131b3b0f7d2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/atombios_dp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/atombios_dp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/atombios_dp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/atombios_dp.c</a></div><div class='hunk'>@@ -405,13 +405,10 @@ static void dp_get_adjust_train(u8 link_status[DP_LINK_STATUS_SIZE],</div><div class='ctx'> /* get bpc from the EDID */</div><div class='ctx'> static int convert_bpc_to_bpp(int bpc)</div><div class='ctx'> {</div><div class='del'>-#if 0</div><div class='ctx'> 	if (bpc == 0)</div><div class='ctx'> 		return 24;</div><div class='ctx'> 	else</div><div class='ctx'> 		return bpc * 3;</div><div class='del'>-#endif</div><div class='del'>-	return 24;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* get the max pix clock supported by the link rate and lane num */</div><div class='hunk'>@@ -463,7 +460,7 @@ static int radeon_dp_get_dp_lane_number(struct drm_connector *connector,</div><div class='ctx'> 					u8 dpcd[DP_DPCD_SIZE],</div><div class='ctx'> 					int pix_clock)</div><div class='ctx'> {</div><div class='del'>-	int bpp = convert_bpc_to_bpp(connector-&gt;display_info.bpc);</div><div class='add'>+	int bpp = convert_bpc_to_bpp(radeon_get_monitor_bpc(connector));</div><div class='ctx'> 	int max_link_rate = dp_get_max_link_rate(dpcd);</div><div class='ctx'> 	int max_lane_num = dp_get_max_lane_number(dpcd);</div><div class='ctx'> 	int lane_num;</div><div class='hunk'>@@ -482,7 +479,7 @@ static int radeon_dp_get_dp_link_clock(struct drm_connector *connector,</div><div class='ctx'> 				       u8 dpcd[DP_DPCD_SIZE],</div><div class='ctx'> 				       int pix_clock)</div><div class='ctx'> {</div><div class='del'>-	int bpp = convert_bpc_to_bpp(connector-&gt;display_info.bpc);</div><div class='add'>+	int bpp = convert_bpc_to_bpp(radeon_get_monitor_bpc(connector));</div><div class='ctx'> 	int lane_num, max_pix_clock;</div><div class='ctx'> </div><div class='ctx'> 	if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) ==</div><div class='hunk'>@@ -533,6 +530,23 @@ u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector)</div><div class='ctx'> 					 dig_connector-&gt;dp_i2c_bus-&gt;rec.i2c_id, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void radeon_dp_probe_oui(struct radeon_connector *radeon_connector)</div><div class='add'>+{</div><div class='add'>+	struct radeon_connector_atom_dig *dig_connector = radeon_connector-&gt;con_priv;</div><div class='add'>+	u8 buf[3];</div><div class='add'>+</div><div class='add'>+	if (!(dig_connector-&gt;dpcd[DP_DOWN_STREAM_PORT_COUNT] &amp; DP_OUI_SUPPORT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (radeon_dp_aux_native_read(radeon_connector, DP_SINK_OUI, buf, 3, 0))</div><div class='add'>+		DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n",</div><div class='add'>+			      buf[0], buf[1], buf[2]);</div><div class='add'>+</div><div class='add'>+	if (radeon_dp_aux_native_read(radeon_connector, DP_BRANCH_OUI, buf, 3, 0))</div><div class='add'>+		DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n",</div><div class='add'>+			      buf[0], buf[1], buf[2]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector)</div><div class='ctx'> {</div><div class='ctx'> 	struct radeon_connector_atom_dig *dig_connector = radeon_connector-&gt;con_priv;</div><div class='hunk'>@@ -546,6 +560,9 @@ bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector)</div><div class='ctx'> 		for (i = 0; i &lt; 8; i++)</div><div class='ctx'> 			DRM_DEBUG_KMS("%02x ", msg[i]);</div><div class='ctx'> 		DRM_DEBUG_KMS("\n");</div><div class='add'>+</div><div class='add'>+		radeon_dp_probe_oui(radeon_connector);</div><div class='add'>+</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> 	dig_connector-&gt;dpcd[0] = 0;</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c<br/>index 2d39f9977e00..e7b1ec5ae8c6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/atombios_encoders.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/atombios_encoders.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/atombios_encoders.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/atombios_encoders.c</a></div><div class='hunk'>@@ -545,7 +545,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mo</div><div class='ctx'> 		dp_clock = dig_connector-&gt;dp_clock;</div><div class='ctx'> 		dp_lane_count = dig_connector-&gt;dp_lane_count;</div><div class='ctx'> 		hpd_id = radeon_connector-&gt;hpd.hpd;</div><div class='del'>-		/* bpc = connector-&gt;display_info.bpc; */</div><div class='add'>+		bpc = radeon_get_monitor_bpc(connector);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* no dig encoder assigned */</div><div class='hunk'>@@ -1163,7 +1163,7 @@ atombios_external_encoder_setup(struct drm_encoder *encoder,</div><div class='ctx'> 		dp_lane_count = dig_connector-&gt;dp_lane_count;</div><div class='ctx'> 		connector_object_id =</div><div class='ctx'> 			(radeon_connector-&gt;connector_object_id &amp; OBJECT_ID_MASK) &gt;&gt; OBJECT_ID_SHIFT;</div><div class='del'>-		/* bpc = connector-&gt;display_info.bpc; */</div><div class='add'>+		bpc = radeon_get_monitor_bpc(connector);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;args, 0, sizeof(args));</div><div class='hunk'>@@ -1926,7 +1926,10 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> 	if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) {</div><div class='ctx'> 		r600_hdmi_enable(encoder);</div><div class='del'>-		r600_hdmi_setmode(encoder, adjusted_mode);</div><div class='add'>+		if (ASIC_IS_DCE4(rdev))</div><div class='add'>+			evergreen_hdmi_setmode(encoder, adjusted_mode);</div><div class='add'>+		else</div><div class='add'>+			r600_hdmi_setmode(encoder, adjusted_mode);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2081,6 +2084,7 @@ radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder)</div><div class='ctx'> </div><div class='ctx'> static void radeon_atom_encoder_prepare(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='add'>+	struct radeon_device *rdev = encoder-&gt;dev-&gt;dev_private;</div><div class='ctx'> 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='ctx'> 	struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);</div><div class='ctx'> </div><div class='hunk'>@@ -2089,8 +2093,16 @@ static void radeon_atom_encoder_prepare(struct drm_encoder *encoder)</div><div class='ctx'> 	    (radeon_encoder_get_dp_bridge_encoder_id(encoder) !=</div><div class='ctx'> 	     ENCODER_OBJECT_ID_NONE)) {</div><div class='ctx'> 		struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='del'>-		if (dig)</div><div class='add'>+		if (dig) {</div><div class='ctx'> 			dig-&gt;dig_encoder = radeon_atom_pick_dig_encoder(encoder);</div><div class='add'>+			if (radeon_encoder-&gt;active_device &amp; ATOM_DEVICE_DFP_SUPPORT) {</div><div class='add'>+				if (rdev-&gt;family &gt;= CHIP_R600)</div><div class='add'>+					dig-&gt;afmt = rdev-&gt;mode_info.afmt[dig-&gt;dig_encoder];</div><div class='add'>+				else</div><div class='add'>+					/* RS600/690/740 have only 1 afmt block */</div><div class='add'>+					dig-&gt;afmt = rdev-&gt;mode_info.afmt[0];</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	radeon_atom_output_lock(encoder, true);</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c<br/>index cfa372cb1cb3..01550d05e273 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/evergreen.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/evergreen.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/evergreen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/evergreen.c</a></div><div class='hunk'>@@ -1029,6 +1029,11 @@ int evergreen_pcie_gart_enable(struct radeon_device *rdev)</div><div class='ctx'> 		WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp);</div><div class='ctx'> 		WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp);</div><div class='ctx'> 		WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp);</div><div class='add'>+		if ((rdev-&gt;family == CHIP_JUNIPER) ||</div><div class='add'>+		    (rdev-&gt;family == CHIP_CYPRESS) ||</div><div class='add'>+		    (rdev-&gt;family == CHIP_HEMLOCK) ||</div><div class='add'>+		    (rdev-&gt;family == CHIP_BARTS))</div><div class='add'>+			WREG32(MC_VM_MD_L1_TLB3_CNTL, tmp);</div><div class='ctx'> 	}</div><div class='ctx'> 	WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp);</div><div class='ctx'> 	WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp);</div><div class='hunk'>@@ -1553,163 +1558,10 @@ int evergreen_cp_resume(struct radeon_device *rdev)</div><div class='ctx'> /*</div><div class='ctx'>  * Core functions</div><div class='ctx'>  */</div><div class='del'>-static u32 evergreen_get_tile_pipe_to_backend_map(struct radeon_device *rdev,</div><div class='del'>-						  u32 num_tile_pipes,</div><div class='del'>-						  u32 num_backends,</div><div class='del'>-						  u32 backend_disable_mask)</div><div class='del'>-{</div><div class='del'>-	u32 backend_map = 0;</div><div class='del'>-	u32 enabled_backends_mask = 0;</div><div class='del'>-	u32 enabled_backends_count = 0;</div><div class='del'>-	u32 cur_pipe;</div><div class='del'>-	u32 swizzle_pipe[EVERGREEN_MAX_PIPES];</div><div class='del'>-	u32 cur_backend = 0;</div><div class='del'>-	u32 i;</div><div class='del'>-	bool force_no_swizzle;</div><div class='del'>-</div><div class='del'>-	if (num_tile_pipes &gt; EVERGREEN_MAX_PIPES)</div><div class='del'>-		num_tile_pipes = EVERGREEN_MAX_PIPES;</div><div class='del'>-	if (num_tile_pipes &lt; 1)</div><div class='del'>-		num_tile_pipes = 1;</div><div class='del'>-	if (num_backends &gt; EVERGREEN_MAX_BACKENDS)</div><div class='del'>-		num_backends = EVERGREEN_MAX_BACKENDS;</div><div class='del'>-	if (num_backends &lt; 1)</div><div class='del'>-		num_backends = 1;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; EVERGREEN_MAX_BACKENDS; ++i) {</div><div class='del'>-		if (((backend_disable_mask &gt;&gt; i) &amp; 1) == 0) {</div><div class='del'>-			enabled_backends_mask |= (1 &lt;&lt; i);</div><div class='del'>-			++enabled_backends_count;</div><div class='del'>-		}</div><div class='del'>-		if (enabled_backends_count == num_backends)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (enabled_backends_count == 0) {</div><div class='del'>-		enabled_backends_mask = 1;</div><div class='del'>-		enabled_backends_count = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (enabled_backends_count != num_backends)</div><div class='del'>-		num_backends = enabled_backends_count;</div><div class='del'>-</div><div class='del'>-	memset((uint8_t *)&amp;swizzle_pipe[0], 0, sizeof(u32) * EVERGREEN_MAX_PIPES);</div><div class='del'>-	switch (rdev-&gt;family) {</div><div class='del'>-	case CHIP_CEDAR:</div><div class='del'>-	case CHIP_REDWOOD:</div><div class='del'>-	case CHIP_PALM:</div><div class='del'>-	case CHIP_SUMO:</div><div class='del'>-	case CHIP_SUMO2:</div><div class='del'>-	case CHIP_TURKS:</div><div class='del'>-	case CHIP_CAICOS:</div><div class='del'>-		force_no_swizzle = false;</div><div class='del'>-		break;</div><div class='del'>-	case CHIP_CYPRESS:</div><div class='del'>-	case CHIP_HEMLOCK:</div><div class='del'>-	case CHIP_JUNIPER:</div><div class='del'>-	case CHIP_BARTS:</div><div class='del'>-	default:</div><div class='del'>-		force_no_swizzle = true;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	if (force_no_swizzle) {</div><div class='del'>-		bool last_backend_enabled = false;</div><div class='del'>-</div><div class='del'>-		force_no_swizzle = false;</div><div class='del'>-		for (i = 0; i &lt; EVERGREEN_MAX_BACKENDS; ++i) {</div><div class='del'>-			if (((enabled_backends_mask &gt;&gt; i) &amp; 1) == 1) {</div><div class='del'>-				if (last_backend_enabled)</div><div class='del'>-					force_no_swizzle = true;</div><div class='del'>-				last_backend_enabled = true;</div><div class='del'>-			} else</div><div class='del'>-				last_backend_enabled = false;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (num_tile_pipes) {</div><div class='del'>-	case 1:</div><div class='del'>-	case 3:</div><div class='del'>-	case 5:</div><div class='del'>-	case 7:</div><div class='del'>-		DRM_ERROR("odd number of pipes!\n");</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		swizzle_pipe[1] = 1;</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 1;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 6:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-			swizzle_pipe[4] = 4;</div><div class='del'>-			swizzle_pipe[5] = 5;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 4;</div><div class='del'>-			swizzle_pipe[3] = 1;</div><div class='del'>-			swizzle_pipe[4] = 3;</div><div class='del'>-			swizzle_pipe[5] = 5;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 8:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-			swizzle_pipe[4] = 4;</div><div class='del'>-			swizzle_pipe[5] = 5;</div><div class='del'>-			swizzle_pipe[6] = 6;</div><div class='del'>-			swizzle_pipe[7] = 7;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 4;</div><div class='del'>-			swizzle_pipe[3] = 6;</div><div class='del'>-			swizzle_pipe[4] = 1;</div><div class='del'>-			swizzle_pipe[5] = 3;</div><div class='del'>-			swizzle_pipe[6] = 5;</div><div class='del'>-			swizzle_pipe[7] = 7;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (cur_pipe = 0; cur_pipe &lt; num_tile_pipes; ++cur_pipe) {</div><div class='del'>-		while (((1 &lt;&lt; cur_backend) &amp; enabled_backends_mask) == 0)</div><div class='del'>-			cur_backend = (cur_backend + 1) % EVERGREEN_MAX_BACKENDS;</div><div class='del'>-</div><div class='del'>-		backend_map |= (((cur_backend &amp; 0xf) &lt;&lt; (swizzle_pipe[cur_pipe] * 4)));</div><div class='del'>-</div><div class='del'>-		cur_backend = (cur_backend + 1) % EVERGREEN_MAX_BACKENDS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return backend_map;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='del'>-	u32 cc_rb_backend_disable = 0;</div><div class='del'>-	u32 cc_gc_shader_pipe_config;</div><div class='del'>-	u32 gb_addr_config = 0;</div><div class='add'>+	u32 gb_addr_config;</div><div class='ctx'> 	u32 mc_shared_chmap, mc_arb_ramcfg;</div><div class='del'>-	u32 gb_backend_map;</div><div class='del'>-	u32 grbm_gfx_index;</div><div class='ctx'> 	u32 sx_debug_1;</div><div class='ctx'> 	u32 smx_dc_ctl0;</div><div class='ctx'> 	u32 sq_config;</div><div class='hunk'>@@ -1724,6 +1576,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	u32 sq_stack_resource_mgmt_3;</div><div class='ctx'> 	u32 vgt_cache_invalidation;</div><div class='ctx'> 	u32 hdp_host_path_cntl, tmp;</div><div class='add'>+	u32 disabled_rb_mask;</div><div class='ctx'> 	int i, j, num_shader_engines, ps_thread_count;</div><div class='ctx'> </div><div class='ctx'> 	switch (rdev-&gt;family) {</div><div class='hunk'>@@ -1748,6 +1601,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_prim_fifo_size = 0x100;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = CYPRESS_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CHIP_JUNIPER:</div><div class='ctx'> 		rdev-&gt;config.evergreen.num_ses = 1;</div><div class='hunk'>@@ -1769,6 +1623,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_prim_fifo_size = 0x100;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = JUNIPER_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CHIP_REDWOOD:</div><div class='ctx'> 		rdev-&gt;config.evergreen.num_ses = 1;</div><div class='hunk'>@@ -1790,6 +1645,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_prim_fifo_size = 0x100;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = REDWOOD_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CHIP_CEDAR:</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1812,6 +1668,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_prim_fifo_size = 0x40;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = CEDAR_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CHIP_PALM:</div><div class='ctx'> 		rdev-&gt;config.evergreen.num_ses = 1;</div><div class='hunk'>@@ -1833,6 +1690,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_prim_fifo_size = 0x40;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = CEDAR_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CHIP_SUMO:</div><div class='ctx'> 		rdev-&gt;config.evergreen.num_ses = 1;</div><div class='hunk'>@@ -1860,6 +1718,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_prim_fifo_size = 0x40;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = REDWOOD_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CHIP_SUMO2:</div><div class='ctx'> 		rdev-&gt;config.evergreen.num_ses = 1;</div><div class='hunk'>@@ -1881,6 +1740,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_prim_fifo_size = 0x40;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = REDWOOD_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CHIP_BARTS:</div><div class='ctx'> 		rdev-&gt;config.evergreen.num_ses = 2;</div><div class='hunk'>@@ -1902,6 +1762,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_prim_fifo_size = 0x100;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = BARTS_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CHIP_TURKS:</div><div class='ctx'> 		rdev-&gt;config.evergreen.num_ses = 1;</div><div class='hunk'>@@ -1923,6 +1784,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_prim_fifo_size = 0x100;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = TURKS_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CHIP_CAICOS:</div><div class='ctx'> 		rdev-&gt;config.evergreen.num_ses = 1;</div><div class='hunk'>@@ -1944,6 +1806,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_prim_fifo_size = 0x40;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.evergreen.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = CAICOS_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1960,20 +1823,6 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> </div><div class='ctx'> 	evergreen_fix_pci_max_read_req_size(rdev);</div><div class='ctx'> </div><div class='del'>-	cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) &amp; ~2;</div><div class='del'>-</div><div class='del'>-	cc_gc_shader_pipe_config |=</div><div class='del'>-		INACTIVE_QD_PIPES((EVERGREEN_MAX_PIPES_MASK &lt;&lt; rdev-&gt;config.evergreen.max_pipes)</div><div class='del'>-				  &amp; EVERGREEN_MAX_PIPES_MASK);</div><div class='del'>-	cc_gc_shader_pipe_config |=</div><div class='del'>-		INACTIVE_SIMDS((EVERGREEN_MAX_SIMDS_MASK &lt;&lt; rdev-&gt;config.evergreen.max_simds)</div><div class='del'>-			       &amp; EVERGREEN_MAX_SIMDS_MASK);</div><div class='del'>-</div><div class='del'>-	cc_rb_backend_disable =</div><div class='del'>-		BACKEND_DISABLE((EVERGREEN_MAX_BACKENDS_MASK &lt;&lt; rdev-&gt;config.evergreen.max_backends)</div><div class='del'>-				&amp; EVERGREEN_MAX_BACKENDS_MASK);</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> 	mc_shared_chmap = RREG32(MC_SHARED_CHMAP);</div><div class='ctx'> 	if ((rdev-&gt;family == CHIP_PALM) ||</div><div class='ctx'> 	    (rdev-&gt;family == CHIP_SUMO) ||</div><div class='hunk'>@@ -1982,134 +1831,6 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	else</div><div class='ctx'> 		mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG);</div><div class='ctx'> </div><div class='del'>-	switch (rdev-&gt;config.evergreen.max_tile_pipes) {</div><div class='del'>-	case 1:</div><div class='del'>-	default:</div><div class='del'>-		gb_addr_config |= NUM_PIPES(0);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		gb_addr_config |= NUM_PIPES(1);</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		gb_addr_config |= NUM_PIPES(2);</div><div class='del'>-		break;</div><div class='del'>-	case 8:</div><div class='del'>-		gb_addr_config |= NUM_PIPES(3);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gb_addr_config |= PIPE_INTERLEAVE_SIZE((mc_arb_ramcfg &amp; BURSTLENGTH_MASK) &gt;&gt; BURSTLENGTH_SHIFT);</div><div class='del'>-	gb_addr_config |= BANK_INTERLEAVE_SIZE(0);</div><div class='del'>-	gb_addr_config |= NUM_SHADER_ENGINES(rdev-&gt;config.evergreen.num_ses - 1);</div><div class='del'>-	gb_addr_config |= SHADER_ENGINE_TILE_SIZE(1);</div><div class='del'>-	gb_addr_config |= NUM_GPUS(0); /* Hemlock? */</div><div class='del'>-	gb_addr_config |= MULTI_GPU_TILE_SIZE(2);</div><div class='del'>-</div><div class='del'>-	if (((mc_arb_ramcfg &amp; NOOFCOLS_MASK) &gt;&gt; NOOFCOLS_SHIFT) &gt; 2)</div><div class='del'>-		gb_addr_config |= ROW_SIZE(2);</div><div class='del'>-	else</div><div class='del'>-		gb_addr_config |= ROW_SIZE((mc_arb_ramcfg &amp; NOOFCOLS_MASK) &gt;&gt; NOOFCOLS_SHIFT);</div><div class='del'>-</div><div class='del'>-	if (rdev-&gt;ddev-&gt;pdev-&gt;device == 0x689e) {</div><div class='del'>-		u32 efuse_straps_4;</div><div class='del'>-		u32 efuse_straps_3;</div><div class='del'>-		u8 efuse_box_bit_131_124;</div><div class='del'>-</div><div class='del'>-		WREG32(RCU_IND_INDEX, 0x204);</div><div class='del'>-		efuse_straps_4 = RREG32(RCU_IND_DATA);</div><div class='del'>-		WREG32(RCU_IND_INDEX, 0x203);</div><div class='del'>-		efuse_straps_3 = RREG32(RCU_IND_DATA);</div><div class='del'>-		efuse_box_bit_131_124 = (u8)(((efuse_straps_4 &amp; 0xf) &lt;&lt; 4) | ((efuse_straps_3 &amp; 0xf0000000) &gt;&gt; 28));</div><div class='del'>-</div><div class='del'>-		switch(efuse_box_bit_131_124) {</div><div class='del'>-		case 0x00:</div><div class='del'>-			gb_backend_map = 0x76543210;</div><div class='del'>-			break;</div><div class='del'>-		case 0x55:</div><div class='del'>-			gb_backend_map = 0x77553311;</div><div class='del'>-			break;</div><div class='del'>-		case 0x56:</div><div class='del'>-			gb_backend_map = 0x77553300;</div><div class='del'>-			break;</div><div class='del'>-		case 0x59:</div><div class='del'>-			gb_backend_map = 0x77552211;</div><div class='del'>-			break;</div><div class='del'>-		case 0x66:</div><div class='del'>-			gb_backend_map = 0x77443300;</div><div class='del'>-			break;</div><div class='del'>-		case 0x99:</div><div class='del'>-			gb_backend_map = 0x66552211;</div><div class='del'>-			break;</div><div class='del'>-		case 0x5a:</div><div class='del'>-			gb_backend_map = 0x77552200;</div><div class='del'>-			break;</div><div class='del'>-		case 0xaa:</div><div class='del'>-			gb_backend_map = 0x66442200;</div><div class='del'>-			break;</div><div class='del'>-		case 0x95:</div><div class='del'>-			gb_backend_map = 0x66553311;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			DRM_ERROR("bad backend map, using default\n");</div><div class='del'>-			gb_backend_map =</div><div class='del'>-				evergreen_get_tile_pipe_to_backend_map(rdev,</div><div class='del'>-								       rdev-&gt;config.evergreen.max_tile_pipes,</div><div class='del'>-								       rdev-&gt;config.evergreen.max_backends,</div><div class='del'>-								       ((EVERGREEN_MAX_BACKENDS_MASK &lt;&lt;</div><div class='del'>-								   rdev-&gt;config.evergreen.max_backends) &amp;</div><div class='del'>-									EVERGREEN_MAX_BACKENDS_MASK));</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	} else if (rdev-&gt;ddev-&gt;pdev-&gt;device == 0x68b9) {</div><div class='del'>-		u32 efuse_straps_3;</div><div class='del'>-		u8 efuse_box_bit_127_124;</div><div class='del'>-</div><div class='del'>-		WREG32(RCU_IND_INDEX, 0x203);</div><div class='del'>-		efuse_straps_3 = RREG32(RCU_IND_DATA);</div><div class='del'>-		efuse_box_bit_127_124 = (u8)((efuse_straps_3 &amp; 0xF0000000) &gt;&gt; 28);</div><div class='del'>-</div><div class='del'>-		switch(efuse_box_bit_127_124) {</div><div class='del'>-		case 0x0:</div><div class='del'>-			gb_backend_map = 0x00003210;</div><div class='del'>-			break;</div><div class='del'>-		case 0x5:</div><div class='del'>-		case 0x6:</div><div class='del'>-		case 0x9:</div><div class='del'>-		case 0xa:</div><div class='del'>-			gb_backend_map = 0x00003311;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			DRM_ERROR("bad backend map, using default\n");</div><div class='del'>-			gb_backend_map =</div><div class='del'>-				evergreen_get_tile_pipe_to_backend_map(rdev,</div><div class='del'>-								       rdev-&gt;config.evergreen.max_tile_pipes,</div><div class='del'>-								       rdev-&gt;config.evergreen.max_backends,</div><div class='del'>-								       ((EVERGREEN_MAX_BACKENDS_MASK &lt;&lt;</div><div class='del'>-								   rdev-&gt;config.evergreen.max_backends) &amp;</div><div class='del'>-									EVERGREEN_MAX_BACKENDS_MASK));</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		switch (rdev-&gt;family) {</div><div class='del'>-		case CHIP_CYPRESS:</div><div class='del'>-		case CHIP_HEMLOCK:</div><div class='del'>-		case CHIP_BARTS:</div><div class='del'>-			gb_backend_map = 0x66442200;</div><div class='del'>-			break;</div><div class='del'>-		case CHIP_JUNIPER:</div><div class='del'>-			gb_backend_map = 0x00002200;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			gb_backend_map =</div><div class='del'>-				evergreen_get_tile_pipe_to_backend_map(rdev,</div><div class='del'>-								       rdev-&gt;config.evergreen.max_tile_pipes,</div><div class='del'>-								       rdev-&gt;config.evergreen.max_backends,</div><div class='del'>-								       ((EVERGREEN_MAX_BACKENDS_MASK &lt;&lt;</div><div class='del'>-									 rdev-&gt;config.evergreen.max_backends) &amp;</div><div class='del'>-									EVERGREEN_MAX_BACKENDS_MASK));</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* setup tiling info dword.  gb_addr_config is not adequate since it does</div><div class='ctx'> 	 * not have bank info, so create a custom tiling dword.</div><div class='ctx'> 	 * bits 3:0   num_pipes</div><div class='hunk'>@@ -2136,45 +1857,54 @@ static void evergreen_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	/* num banks is 8 on all fusion asics. 0 = 4, 1 = 8, 2 = 16 */</div><div class='ctx'> 	if (rdev-&gt;flags &amp; RADEON_IS_IGP)</div><div class='ctx'> 		rdev-&gt;config.evergreen.tile_config |= 1 &lt;&lt; 4;</div><div class='del'>-	else</div><div class='del'>-		rdev-&gt;config.evergreen.tile_config |=</div><div class='del'>-			((mc_arb_ramcfg &amp; NOOFBANK_MASK) &gt;&gt; NOOFBANK_SHIFT) &lt;&lt; 4;</div><div class='del'>-	rdev-&gt;config.evergreen.tile_config |=</div><div class='del'>-		((mc_arb_ramcfg &amp; BURSTLENGTH_MASK) &gt;&gt; BURSTLENGTH_SHIFT) &lt;&lt; 8;</div><div class='add'>+	else {</div><div class='add'>+		if ((mc_arb_ramcfg &amp; NOOFBANK_MASK) &gt;&gt; NOOFBANK_SHIFT)</div><div class='add'>+			rdev-&gt;config.evergreen.tile_config |= 1 &lt;&lt; 4;</div><div class='add'>+		else</div><div class='add'>+			rdev-&gt;config.evergreen.tile_config |= 0 &lt;&lt; 4;</div><div class='add'>+	}</div><div class='add'>+	rdev-&gt;config.evergreen.tile_config |= 0 &lt;&lt; 8;</div><div class='ctx'> 	rdev-&gt;config.evergreen.tile_config |=</div><div class='ctx'> 		((gb_addr_config &amp; 0x30000000) &gt;&gt; 28) &lt;&lt; 12;</div><div class='ctx'> </div><div class='del'>-	rdev-&gt;config.evergreen.backend_map = gb_backend_map;</div><div class='del'>-	WREG32(GB_BACKEND_MAP, gb_backend_map);</div><div class='del'>-	WREG32(GB_ADDR_CONFIG, gb_addr_config);</div><div class='del'>-	WREG32(DMIF_ADDR_CONFIG, gb_addr_config);</div><div class='del'>-	WREG32(HDP_ADDR_CONFIG, gb_addr_config);</div><div class='add'>+	num_shader_engines = (gb_addr_config &amp; NUM_SHADER_ENGINES(3) &gt;&gt; 12) + 1;</div><div class='ctx'> </div><div class='del'>-	num_shader_engines = ((RREG32(GB_ADDR_CONFIG) &amp; NUM_SHADER_ENGINES(3)) &gt;&gt; 12) + 1;</div><div class='del'>-	grbm_gfx_index = INSTANCE_BROADCAST_WRITES;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; rdev-&gt;config.evergreen.num_ses; i++) {</div><div class='del'>-		u32 rb = cc_rb_backend_disable | (0xf0 &lt;&lt; 16);</div><div class='del'>-		u32 sp = cc_gc_shader_pipe_config;</div><div class='del'>-		u32 gfx = grbm_gfx_index | SE_INDEX(i);</div><div class='add'>+	if ((rdev-&gt;family &gt;= CHIP_CEDAR) &amp;&amp; (rdev-&gt;family &lt;= CHIP_HEMLOCK)) {</div><div class='add'>+		u32 efuse_straps_4;</div><div class='add'>+		u32 efuse_straps_3;</div><div class='ctx'> </div><div class='del'>-		if (i == num_shader_engines) {</div><div class='del'>-			rb |= BACKEND_DISABLE(EVERGREEN_MAX_BACKENDS_MASK);</div><div class='del'>-			sp |= INACTIVE_SIMDS(EVERGREEN_MAX_SIMDS_MASK);</div><div class='add'>+		WREG32(RCU_IND_INDEX, 0x204);</div><div class='add'>+		efuse_straps_4 = RREG32(RCU_IND_DATA);</div><div class='add'>+		WREG32(RCU_IND_INDEX, 0x203);</div><div class='add'>+		efuse_straps_3 = RREG32(RCU_IND_DATA);</div><div class='add'>+		tmp = (((efuse_straps_4 &amp; 0xf) &lt;&lt; 4) |</div><div class='add'>+		      ((efuse_straps_3 &amp; 0xf0000000) &gt;&gt; 28));</div><div class='add'>+	} else {</div><div class='add'>+		tmp = 0;</div><div class='add'>+		for (i = (rdev-&gt;config.evergreen.num_ses - 1); i &gt;= 0; i--) {</div><div class='add'>+			u32 rb_disable_bitmap;</div><div class='add'>+</div><div class='add'>+			WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i));</div><div class='add'>+			WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i));</div><div class='add'>+			rb_disable_bitmap = (RREG32(CC_RB_BACKEND_DISABLE) &amp; 0x00ff0000) &gt;&gt; 16;</div><div class='add'>+			tmp &lt;&lt;= 4;</div><div class='add'>+			tmp |= rb_disable_bitmap;</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='add'>+	/* enabled rb are just the one not disabled :) */</div><div class='add'>+	disabled_rb_mask = tmp;</div><div class='ctx'> </div><div class='del'>-		WREG32(GRBM_GFX_INDEX, gfx);</div><div class='del'>-		WREG32(RLC_GFX_INDEX, gfx);</div><div class='add'>+	WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);</div><div class='add'>+	WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);</div><div class='ctx'> </div><div class='del'>-		WREG32(CC_RB_BACKEND_DISABLE, rb);</div><div class='del'>-		WREG32(CC_SYS_RB_BACKEND_DISABLE, rb);</div><div class='del'>-		WREG32(GC_USER_RB_BACKEND_DISABLE, rb);</div><div class='del'>-		WREG32(CC_GC_SHADER_PIPE_CONFIG, sp);</div><div class='del'>-        }</div><div class='add'>+	WREG32(GB_ADDR_CONFIG, gb_addr_config);</div><div class='add'>+	WREG32(DMIF_ADDR_CONFIG, gb_addr_config);</div><div class='add'>+	WREG32(HDP_ADDR_CONFIG, gb_addr_config);</div><div class='ctx'> </div><div class='del'>-	grbm_gfx_index |= SE_BROADCAST_WRITES;</div><div class='del'>-	WREG32(GRBM_GFX_INDEX, grbm_gfx_index);</div><div class='del'>-	WREG32(RLC_GFX_INDEX, grbm_gfx_index);</div><div class='add'>+	tmp = gb_addr_config &amp; NUM_PIPES_MASK;</div><div class='add'>+	tmp = r6xx_remap_render_backend(rdev, tmp, rdev-&gt;config.evergreen.max_backends,</div><div class='add'>+					EVERGREEN_MAX_BACKENDS, disabled_rb_mask);</div><div class='add'>+	WREG32(GB_BACKEND_MAP, tmp);</div><div class='ctx'> </div><div class='ctx'> 	WREG32(CGTS_SYS_TCC_DISABLE, 0);</div><div class='ctx'> 	WREG32(CGTS_TCC_DISABLE, 0);</div><div class='hunk'>@@ -2424,27 +2154,18 @@ bool evergreen_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *rin</div><div class='ctx'> 	u32 srbm_status;</div><div class='ctx'> 	u32 grbm_status;</div><div class='ctx'> 	u32 grbm_status_se0, grbm_status_se1;</div><div class='del'>-	struct r100_gpu_lockup *lockup = &amp;rdev-&gt;config.evergreen.lockup;</div><div class='del'>-	int r;</div><div class='ctx'> </div><div class='ctx'> 	srbm_status = RREG32(SRBM_STATUS);</div><div class='ctx'> 	grbm_status = RREG32(GRBM_STATUS);</div><div class='ctx'> 	grbm_status_se0 = RREG32(GRBM_STATUS_SE0);</div><div class='ctx'> 	grbm_status_se1 = RREG32(GRBM_STATUS_SE1);</div><div class='ctx'> 	if (!(grbm_status &amp; GUI_ACTIVE)) {</div><div class='del'>-		r100_gpu_lockup_update(lockup, ring);</div><div class='add'>+		radeon_ring_lockup_update(ring);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* force CP activities */</div><div class='del'>-	r = radeon_ring_lock(rdev, ring, 2);</div><div class='del'>-	if (!r) {</div><div class='del'>-		/* PACKET2 NOP */</div><div class='del'>-		radeon_ring_write(ring, 0x80000000);</div><div class='del'>-		radeon_ring_write(ring, 0x80000000);</div><div class='del'>-		radeon_ring_unlock_commit(rdev, ring);</div><div class='del'>-	}</div><div class='del'>-	ring-&gt;rptr = RREG32(CP_RB_RPTR);</div><div class='del'>-	return r100_gpu_cp_is_lockup(rdev, lockup, ring);</div><div class='add'>+	radeon_ring_force_activity(rdev, ring);</div><div class='add'>+	return radeon_ring_test_lockup(rdev, ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int evergreen_gpu_soft_reset(struct radeon_device *rdev)</div><div class='hunk'>@@ -2594,6 +2315,7 @@ int evergreen_irq_set(struct radeon_device *rdev)</div><div class='ctx'> 	u32 hpd1, hpd2, hpd3, hpd4, hpd5, hpd6;</div><div class='ctx'> 	u32 grbm_int_cntl = 0;</div><div class='ctx'> 	u32 grph1 = 0, grph2 = 0, grph3 = 0, grph4 = 0, grph5 = 0, grph6 = 0;</div><div class='add'>+	u32 afmt1 = 0, afmt2 = 0, afmt3 = 0, afmt4 = 0, afmt5 = 0, afmt6 = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!rdev-&gt;irq.installed) {</div><div class='ctx'> 		WARN(1, "Can't enable IRQ/MSI because no handler is installed\n");</div><div class='hunk'>@@ -2614,6 +2336,13 @@ int evergreen_irq_set(struct radeon_device *rdev)</div><div class='ctx'> 	hpd5 = RREG32(DC_HPD5_INT_CONTROL) &amp; ~DC_HPDx_INT_EN;</div><div class='ctx'> 	hpd6 = RREG32(DC_HPD6_INT_CONTROL) &amp; ~DC_HPDx_INT_EN;</div><div class='ctx'> </div><div class='add'>+	afmt1 = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) &amp; ~AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+	afmt2 = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET) &amp; ~AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+	afmt3 = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET) &amp; ~AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+	afmt4 = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET) &amp; ~AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+	afmt5 = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) &amp; ~AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+	afmt6 = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET) &amp; ~AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+</div><div class='ctx'> 	if (rdev-&gt;family &gt;= CHIP_CAYMAN) {</div><div class='ctx'> 		/* enable CP interrupts on all rings */</div><div class='ctx'> 		if (rdev-&gt;irq.sw_int[RADEON_RING_TYPE_GFX_INDEX]) {</div><div class='hunk'>@@ -2690,6 +2419,30 @@ int evergreen_irq_set(struct radeon_device *rdev)</div><div class='ctx'> 		DRM_DEBUG("evergreen_irq_set: hpd 6\n");</div><div class='ctx'> 		hpd6 |= DC_HPDx_INT_EN;</div><div class='ctx'> 	}</div><div class='add'>+	if (rdev-&gt;irq.afmt[0]) {</div><div class='add'>+		DRM_DEBUG("evergreen_irq_set: hdmi 0\n");</div><div class='add'>+		afmt1 |= AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+	}</div><div class='add'>+	if (rdev-&gt;irq.afmt[1]) {</div><div class='add'>+		DRM_DEBUG("evergreen_irq_set: hdmi 1\n");</div><div class='add'>+		afmt2 |= AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+	}</div><div class='add'>+	if (rdev-&gt;irq.afmt[2]) {</div><div class='add'>+		DRM_DEBUG("evergreen_irq_set: hdmi 2\n");</div><div class='add'>+		afmt3 |= AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+	}</div><div class='add'>+	if (rdev-&gt;irq.afmt[3]) {</div><div class='add'>+		DRM_DEBUG("evergreen_irq_set: hdmi 3\n");</div><div class='add'>+		afmt4 |= AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+	}</div><div class='add'>+	if (rdev-&gt;irq.afmt[4]) {</div><div class='add'>+		DRM_DEBUG("evergreen_irq_set: hdmi 4\n");</div><div class='add'>+		afmt5 |= AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+	}</div><div class='add'>+	if (rdev-&gt;irq.afmt[5]) {</div><div class='add'>+		DRM_DEBUG("evergreen_irq_set: hdmi 5\n");</div><div class='add'>+		afmt6 |= AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+	}</div><div class='ctx'> 	if (rdev-&gt;irq.gui_idle) {</div><div class='ctx'> 		DRM_DEBUG("gui idle\n");</div><div class='ctx'> 		grbm_int_cntl |= GUI_IDLE_INT_ENABLE;</div><div class='hunk'>@@ -2732,6 +2485,13 @@ int evergreen_irq_set(struct radeon_device *rdev)</div><div class='ctx'> 	WREG32(DC_HPD5_INT_CONTROL, hpd5);</div><div class='ctx'> 	WREG32(DC_HPD6_INT_CONTROL, hpd6);</div><div class='ctx'> </div><div class='add'>+	WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, afmt1);</div><div class='add'>+	WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, afmt2);</div><div class='add'>+	WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, afmt3);</div><div class='add'>+	WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, afmt4);</div><div class='add'>+	WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, afmt5);</div><div class='add'>+	WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, afmt6);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2756,6 +2516,13 @@ static void evergreen_irq_ack(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;irq.stat_regs.evergreen.d6grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	rdev-&gt;irq.stat_regs.evergreen.afmt_status1 = RREG32(AFMT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET);</div><div class='add'>+	rdev-&gt;irq.stat_regs.evergreen.afmt_status2 = RREG32(AFMT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET);</div><div class='add'>+	rdev-&gt;irq.stat_regs.evergreen.afmt_status3 = RREG32(AFMT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET);</div><div class='add'>+	rdev-&gt;irq.stat_regs.evergreen.afmt_status4 = RREG32(AFMT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET);</div><div class='add'>+	rdev-&gt;irq.stat_regs.evergreen.afmt_status5 = RREG32(AFMT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET);</div><div class='add'>+	rdev-&gt;irq.stat_regs.evergreen.afmt_status6 = RREG32(AFMT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET);</div><div class='add'>+</div><div class='ctx'> 	if (rdev-&gt;irq.stat_regs.evergreen.d1grph_int &amp; GRPH_PFLIP_INT_OCCURRED)</div><div class='ctx'> 		WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR);</div><div class='ctx'> 	if (rdev-&gt;irq.stat_regs.evergreen.d2grph_int &amp; GRPH_PFLIP_INT_OCCURRED)</div><div class='hunk'>@@ -2829,6 +2596,36 @@ static void evergreen_irq_ack(struct radeon_device *rdev)</div><div class='ctx'> 		tmp |= DC_HPDx_INT_ACK;</div><div class='ctx'> 		WREG32(DC_HPD6_INT_CONTROL, tmp);</div><div class='ctx'> 	}</div><div class='add'>+	if (rdev-&gt;irq.stat_regs.evergreen.afmt_status1 &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+		tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET);</div><div class='add'>+		tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;</div><div class='add'>+		WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, tmp);</div><div class='add'>+	}</div><div class='add'>+	if (rdev-&gt;irq.stat_regs.evergreen.afmt_status2 &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+		tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET);</div><div class='add'>+		tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;</div><div class='add'>+		WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, tmp);</div><div class='add'>+	}</div><div class='add'>+	if (rdev-&gt;irq.stat_regs.evergreen.afmt_status3 &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+		tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET);</div><div class='add'>+		tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;</div><div class='add'>+		WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, tmp);</div><div class='add'>+	}</div><div class='add'>+	if (rdev-&gt;irq.stat_regs.evergreen.afmt_status4 &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+		tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET);</div><div class='add'>+		tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;</div><div class='add'>+		WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, tmp);</div><div class='add'>+	}</div><div class='add'>+	if (rdev-&gt;irq.stat_regs.evergreen.afmt_status5 &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+		tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET);</div><div class='add'>+		tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;</div><div class='add'>+		WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, tmp);</div><div class='add'>+	}</div><div class='add'>+	if (rdev-&gt;irq.stat_regs.evergreen.afmt_status6 &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+		tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET);</div><div class='add'>+		tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;</div><div class='add'>+		WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, tmp);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void evergreen_irq_disable(struct radeon_device *rdev)</div><div class='hunk'>@@ -2878,6 +2675,7 @@ int evergreen_irq_process(struct radeon_device *rdev)</div><div class='ctx'> 	u32 ring_index;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	bool queue_hotplug = false;</div><div class='add'>+	bool queue_hdmi = false;</div><div class='ctx'> </div><div class='ctx'> 	if (!rdev-&gt;ih.enabled || rdev-&gt;shutdown)</div><div class='ctx'> 		return IRQ_NONE;</div><div class='hunk'>@@ -3111,6 +2909,55 @@ restart_ih:</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='add'>+		case 44: /* hdmi */</div><div class='add'>+			switch (src_data) {</div><div class='add'>+			case 0:</div><div class='add'>+				if (rdev-&gt;irq.stat_regs.evergreen.afmt_status1 &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+					rdev-&gt;irq.stat_regs.evergreen.afmt_status1 &amp;= ~AFMT_AZ_FORMAT_WTRIG;</div><div class='add'>+					queue_hdmi = true;</div><div class='add'>+					DRM_DEBUG("IH: HDMI0\n");</div><div class='add'>+				}</div><div class='add'>+				break;</div><div class='add'>+			case 1:</div><div class='add'>+				if (rdev-&gt;irq.stat_regs.evergreen.afmt_status2 &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+					rdev-&gt;irq.stat_regs.evergreen.afmt_status2 &amp;= ~AFMT_AZ_FORMAT_WTRIG;</div><div class='add'>+					queue_hdmi = true;</div><div class='add'>+					DRM_DEBUG("IH: HDMI1\n");</div><div class='add'>+				}</div><div class='add'>+				break;</div><div class='add'>+			case 2:</div><div class='add'>+				if (rdev-&gt;irq.stat_regs.evergreen.afmt_status3 &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+					rdev-&gt;irq.stat_regs.evergreen.afmt_status3 &amp;= ~AFMT_AZ_FORMAT_WTRIG;</div><div class='add'>+					queue_hdmi = true;</div><div class='add'>+					DRM_DEBUG("IH: HDMI2\n");</div><div class='add'>+				}</div><div class='add'>+				break;</div><div class='add'>+			case 3:</div><div class='add'>+				if (rdev-&gt;irq.stat_regs.evergreen.afmt_status4 &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+					rdev-&gt;irq.stat_regs.evergreen.afmt_status4 &amp;= ~AFMT_AZ_FORMAT_WTRIG;</div><div class='add'>+					queue_hdmi = true;</div><div class='add'>+					DRM_DEBUG("IH: HDMI3\n");</div><div class='add'>+				}</div><div class='add'>+				break;</div><div class='add'>+			case 4:</div><div class='add'>+				if (rdev-&gt;irq.stat_regs.evergreen.afmt_status5 &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+					rdev-&gt;irq.stat_regs.evergreen.afmt_status5 &amp;= ~AFMT_AZ_FORMAT_WTRIG;</div><div class='add'>+					queue_hdmi = true;</div><div class='add'>+					DRM_DEBUG("IH: HDMI4\n");</div><div class='add'>+				}</div><div class='add'>+				break;</div><div class='add'>+			case 5:</div><div class='add'>+				if (rdev-&gt;irq.stat_regs.evergreen.afmt_status6 &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+					rdev-&gt;irq.stat_regs.evergreen.afmt_status6 &amp;= ~AFMT_AZ_FORMAT_WTRIG;</div><div class='add'>+					queue_hdmi = true;</div><div class='add'>+					DRM_DEBUG("IH: HDMI5\n");</div><div class='add'>+				}</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='ctx'> 		case 176: /* CP_INT in ring buffer */</div><div class='ctx'> 		case 177: /* CP_INT in IB1 */</div><div class='ctx'> 		case 178: /* CP_INT in IB2 */</div><div class='hunk'>@@ -3154,6 +3001,8 @@ restart_ih:</div><div class='ctx'> 		goto restart_ih;</div><div class='ctx'> 	if (queue_hotplug)</div><div class='ctx'> 		schedule_work(&amp;rdev-&gt;hotplug_work);</div><div class='add'>+	if (queue_hdmi)</div><div class='add'>+		schedule_work(&amp;rdev-&gt;audio_work);</div><div class='ctx'> 	rdev-&gt;ih.rptr = rptr;</div><div class='ctx'> 	WREG32(IH_RB_RPTR, rdev-&gt;ih.rptr);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;rdev-&gt;ih.lock, flags);</div><div class='hunk'>@@ -3248,12 +3097,9 @@ static int evergreen_startup(struct radeon_device *rdev)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("radeon: failed testing IB (%d).\n", r);</div><div class='del'>-		rdev-&gt;accel_working = false;</div><div class='add'>+	r = radeon_ib_ring_tests(rdev);</div><div class='add'>+	if (r)</div><div class='ctx'> 		return r;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	r = r600_audio_init(rdev);</div><div class='ctx'> 	if (r) {</div><div class='hunk'>@@ -3319,10 +3165,6 @@ int evergreen_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	/* This don't do much */</div><div class='del'>-	r = radeon_gem_init(rdev);</div><div class='del'>-	if (r)</div><div class='del'>-		return r;</div><div class='ctx'> 	/* Read BIOS */</div><div class='ctx'> 	if (!radeon_get_bios(rdev)) {</div><div class='ctx'> 		if (ASIC_IS_AVIVO(rdev))</div><div class='hunk'>@@ -3434,7 +3276,6 @@ void evergreen_fini(struct radeon_device *rdev)</div><div class='ctx'> 	evergreen_pcie_gart_fini(rdev);</div><div class='ctx'> 	r600_vram_scratch_fini(rdev);</div><div class='ctx'> 	radeon_gem_fini(rdev);</div><div class='del'>-	radeon_semaphore_driver_fini(rdev);</div><div class='ctx'> 	radeon_fence_driver_fini(rdev);</div><div class='ctx'> 	radeon_agp_fini(rdev);</div><div class='ctx'> 	radeon_bo_fini(rdev);</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/evergreen_blit_kms.c b/drivers/gpu/drm/radeon/evergreen_blit_kms.c<br/>index 222acd2d33df..1e96bd458cfd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/evergreen_blit_kms.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/evergreen_blit_kms.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/evergreen_blit_kms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/evergreen_blit_kms.c</a></div><div class='hunk'>@@ -637,7 +637,6 @@ int evergreen_blit_init(struct radeon_device *rdev)</div><div class='ctx'> 	if (rdev-&gt;r600_blit.shader_obj)</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='del'>-	mutex_init(&amp;rdev-&gt;r600_blit.mutex);</div><div class='ctx'> 	rdev-&gt;r600_blit.state_offset = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (rdev-&gt;family &lt; CHIP_CAYMAN)</div><div class='hunk'>@@ -669,7 +668,7 @@ int evergreen_blit_init(struct radeon_device *rdev)</div><div class='ctx'> 	obj_size = ALIGN(obj_size, 256);</div><div class='ctx'> </div><div class='ctx'> 	r = radeon_bo_create(rdev, obj_size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,</div><div class='del'>-				&amp;rdev-&gt;r600_blit.shader_obj);</div><div class='add'>+			     NULL, &amp;rdev-&gt;r600_blit.shader_obj);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("evergreen failed to allocate shader\n");</div><div class='ctx'> 		return r;</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c<br/>index 70089d32b80f..4e7dd2b4843d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/evergreen_cs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/evergreen_cs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/evergreen_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/evergreen_cs.c</a></div><div class='hunk'>@@ -1057,7 +1057,7 @@ static int evergreen_cs_packet_parse_vline(struct radeon_cs_parser *p)</div><div class='ctx'> 	uint32_t header, h_idx, reg, wait_reg_mem_info;</div><div class='ctx'> 	volatile uint32_t *ib;</div><div class='ctx'> </div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> </div><div class='ctx'> 	/* parse the WAIT_REG_MEM */</div><div class='ctx'> 	r = evergreen_cs_packet_parse(p, &amp;wait_reg_mem, p-&gt;idx);</div><div class='hunk'>@@ -1215,7 +1215,7 @@ static int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)</div><div class='ctx'> 		if (!(evergreen_reg_safe_bm[i] &amp; m))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> 	switch (reg) {</div><div class='ctx'> 	/* force following reg to 0 in an attempt to disable out buffer</div><div class='ctx'> 	 * which will need us to better understand how it works to perform</div><div class='hunk'>@@ -1896,7 +1896,7 @@ static int evergreen_packet3_check(struct radeon_cs_parser *p,</div><div class='ctx'> 	u32 idx_value;</div><div class='ctx'> </div><div class='ctx'> 	track = (struct evergreen_cs_track *)p-&gt;track;</div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> 	idx = pkt-&gt;idx + 1;</div><div class='ctx'> 	idx_value = radeon_get_ib_value(p, idx);</div><div class='ctx'> </div><div class='hunk'>@@ -2610,8 +2610,8 @@ int evergreen_cs_parse(struct radeon_cs_parser *p)</div><div class='ctx'> 		}</div><div class='ctx'> 	} while (p-&gt;idx &lt; p-&gt;chunks[p-&gt;chunk_ib_idx].length_dw);</div><div class='ctx'> #if 0</div><div class='del'>-	for (r = 0; r &lt; p-&gt;ib-&gt;length_dw; r++) {</div><div class='del'>-		printk(KERN_INFO "%05d  0x%08X\n", r, p-&gt;ib-&gt;ptr[r]);</div><div class='add'>+	for (r = 0; r &lt; p-&gt;ib.length_dw; r++) {</div><div class='add'>+		printk(KERN_INFO "%05d  0x%08X\n", r, p-&gt;ib.ptr[r]);</div><div class='ctx'> 		mdelay(1);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c<br/>new file mode 100644<br/>index 000000000000..a51f880985f8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/evergreen_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/evergreen_hdmi.c</a></div><div class='hunk'>@@ -0,0 +1,216 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2008 Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright 2008 Red Hat Inc.</div><div class='add'>+ * Copyright 2009 Christian König.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: Christian König</div><div class='add'>+ *          Rafał Miłecki</div><div class='add'>+ */</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "radeon_drm.h"</div><div class='add'>+#include "radeon.h"</div><div class='add'>+#include "radeon_asic.h"</div><div class='add'>+#include "evergreend.h"</div><div class='add'>+#include "atom.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * update the N and CTS parameters for a given pixel clock rate</div><div class='add'>+ */</div><div class='add'>+static void evergreen_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = encoder-&gt;dev;</div><div class='add'>+	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='add'>+	struct radeon_hdmi_acr acr = r600_hdmi_acr(clock);</div><div class='add'>+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='add'>+	uint32_t offset = dig-&gt;afmt-&gt;offset;</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr.cts_32khz));</div><div class='add'>+	WREG32(HDMI_ACR_32_1 + offset, acr.n_32khz);</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr.cts_44_1khz));</div><div class='add'>+	WREG32(HDMI_ACR_44_1 + offset, acr.n_44_1khz);</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr.cts_48khz));</div><div class='add'>+	WREG32(HDMI_ACR_48_1 + offset, acr.n_48khz);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * calculate the crc for a given info frame</div><div class='add'>+ */</div><div class='add'>+static void evergreen_hdmi_infoframe_checksum(uint8_t packetType,</div><div class='add'>+					 uint8_t versionNumber,</div><div class='add'>+					 uint8_t length,</div><div class='add'>+					 uint8_t *frame)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	frame[0] = packetType + versionNumber + length;</div><div class='add'>+	for (i = 1; i &lt;= length; i++)</div><div class='add'>+		frame[0] += frame[i];</div><div class='add'>+	frame[0] = 0x100 - frame[0];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * build a HDMI Video Info Frame</div><div class='add'>+ */</div><div class='add'>+static void evergreen_hdmi_videoinfoframe(</div><div class='add'>+	struct drm_encoder *encoder,</div><div class='add'>+	uint8_t color_format,</div><div class='add'>+	int active_information_present,</div><div class='add'>+	uint8_t active_format_aspect_ratio,</div><div class='add'>+	uint8_t scan_information,</div><div class='add'>+	uint8_t colorimetry,</div><div class='add'>+	uint8_t ex_colorimetry,</div><div class='add'>+	uint8_t quantization,</div><div class='add'>+	int ITC,</div><div class='add'>+	uint8_t picture_aspect_ratio,</div><div class='add'>+	uint8_t video_format_identification,</div><div class='add'>+	uint8_t pixel_repetition,</div><div class='add'>+	uint8_t non_uniform_picture_scaling,</div><div class='add'>+	uint8_t bar_info_data_valid,</div><div class='add'>+	uint16_t top_bar,</div><div class='add'>+	uint16_t bottom_bar,</div><div class='add'>+	uint16_t left_bar,</div><div class='add'>+	uint16_t right_bar</div><div class='add'>+)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = encoder-&gt;dev;</div><div class='add'>+	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='add'>+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='add'>+	uint32_t offset = dig-&gt;afmt-&gt;offset;</div><div class='add'>+</div><div class='add'>+	uint8_t frame[14];</div><div class='add'>+</div><div class='add'>+	frame[0x0] = 0;</div><div class='add'>+	frame[0x1] =</div><div class='add'>+		(scan_information &amp; 0x3) |</div><div class='add'>+		((bar_info_data_valid &amp; 0x3) &lt;&lt; 2) |</div><div class='add'>+		((active_information_present &amp; 0x1) &lt;&lt; 4) |</div><div class='add'>+		((color_format &amp; 0x3) &lt;&lt; 5);</div><div class='add'>+	frame[0x2] =</div><div class='add'>+		(active_format_aspect_ratio &amp; 0xF) |</div><div class='add'>+		((picture_aspect_ratio &amp; 0x3) &lt;&lt; 4) |</div><div class='add'>+		((colorimetry &amp; 0x3) &lt;&lt; 6);</div><div class='add'>+	frame[0x3] =</div><div class='add'>+		(non_uniform_picture_scaling &amp; 0x3) |</div><div class='add'>+		((quantization &amp; 0x3) &lt;&lt; 2) |</div><div class='add'>+		((ex_colorimetry &amp; 0x7) &lt;&lt; 4) |</div><div class='add'>+		((ITC &amp; 0x1) &lt;&lt; 7);</div><div class='add'>+	frame[0x4] = (video_format_identification &amp; 0x7F);</div><div class='add'>+	frame[0x5] = (pixel_repetition &amp; 0xF);</div><div class='add'>+	frame[0x6] = (top_bar &amp; 0xFF);</div><div class='add'>+	frame[0x7] = (top_bar &gt;&gt; 8);</div><div class='add'>+	frame[0x8] = (bottom_bar &amp; 0xFF);</div><div class='add'>+	frame[0x9] = (bottom_bar &gt;&gt; 8);</div><div class='add'>+	frame[0xA] = (left_bar &amp; 0xFF);</div><div class='add'>+	frame[0xB] = (left_bar &gt;&gt; 8);</div><div class='add'>+	frame[0xC] = (right_bar &amp; 0xFF);</div><div class='add'>+	frame[0xD] = (right_bar &gt;&gt; 8);</div><div class='add'>+</div><div class='add'>+	evergreen_hdmi_infoframe_checksum(0x82, 0x02, 0x0D, frame);</div><div class='add'>+	/* Our header values (type, version, length) should be alright, Intel</div><div class='add'>+	 * is using the same. Checksum function also seems to be OK, it works</div><div class='add'>+	 * fine for audio infoframe. However calculated value is always lower</div><div class='add'>+	 * by 2 in comparison to fglrx. It breaks displaying anything in case</div><div class='add'>+	 * of TVs that strictly check the checksum. Hack it manually here to</div><div class='add'>+	 * workaround this issue. */</div><div class='add'>+	frame[0x0] += 2;</div><div class='add'>+</div><div class='add'>+	WREG32(AFMT_AVI_INFO0 + offset,</div><div class='add'>+		frame[0x0] | (frame[0x1] &lt;&lt; 8) | (frame[0x2] &lt;&lt; 16) | (frame[0x3] &lt;&lt; 24));</div><div class='add'>+	WREG32(AFMT_AVI_INFO1 + offset,</div><div class='add'>+		frame[0x4] | (frame[0x5] &lt;&lt; 8) | (frame[0x6] &lt;&lt; 16) | (frame[0x7] &lt;&lt; 24));</div><div class='add'>+	WREG32(AFMT_AVI_INFO2 + offset,</div><div class='add'>+		frame[0x8] | (frame[0x9] &lt;&lt; 8) | (frame[0xA] &lt;&lt; 16) | (frame[0xB] &lt;&lt; 24));</div><div class='add'>+	WREG32(AFMT_AVI_INFO3 + offset,</div><div class='add'>+		frame[0xC] | (frame[0xD] &lt;&lt; 8));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * update the info frames with the data from the current display mode</div><div class='add'>+ */</div><div class='add'>+void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = encoder-&gt;dev;</div><div class='add'>+	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='add'>+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='add'>+	uint32_t offset;</div><div class='add'>+</div><div class='add'>+	if (ASIC_IS_DCE5(rdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Silent, r600_hdmi_enable will raise WARN for us */</div><div class='add'>+	if (!dig-&gt;afmt-&gt;enabled)</div><div class='add'>+		return;</div><div class='add'>+	offset = dig-&gt;afmt-&gt;offset;</div><div class='add'>+</div><div class='add'>+	r600_audio_set_clock(encoder, mode-&gt;clock);</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI_VBI_PACKET_CONTROL + offset,</div><div class='add'>+	       HDMI_NULL_SEND); /* send null packets when required */</div><div class='add'>+</div><div class='add'>+	WREG32(AFMT_AUDIO_CRC_CONTROL + offset, 0x1000);</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI_AUDIO_PACKET_CONTROL + offset,</div><div class='add'>+	       HDMI_AUDIO_DELAY_EN(1) | /* set the default audio delay */</div><div class='add'>+	       HDMI_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */</div><div class='add'>+</div><div class='add'>+	WREG32(AFMT_AUDIO_PACKET_CONTROL + offset,</div><div class='add'>+	       AFMT_AUDIO_SAMPLE_SEND | /* send audio packets */</div><div class='add'>+	       AFMT_60958_CS_UPDATE); /* allow 60958 channel status fields to be updated */</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI_ACR_PACKET_CONTROL + offset,</div><div class='add'>+	       HDMI_ACR_AUTO_SEND | /* allow hw to sent ACR packets when required */</div><div class='add'>+	       HDMI_ACR_SOURCE); /* select SW CTS value */</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI_VBI_PACKET_CONTROL + offset,</div><div class='add'>+	       HDMI_NULL_SEND | /* send null packets when required */</div><div class='add'>+	       HDMI_GC_SEND | /* send general control packets */</div><div class='add'>+	       HDMI_GC_CONT); /* send general control packets every frame */</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI_INFOFRAME_CONTROL0 + offset,</div><div class='add'>+	       HDMI_AVI_INFO_SEND | /* enable AVI info frames */</div><div class='add'>+	       HDMI_AVI_INFO_CONT | /* send AVI info frames every frame/field */</div><div class='add'>+	       HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */</div><div class='add'>+	       HDMI_AUDIO_INFO_CONT); /* required for audio info values to be updated */</div><div class='add'>+</div><div class='add'>+	WREG32(AFMT_INFOFRAME_CONTROL0 + offset,</div><div class='add'>+	       AFMT_AUDIO_INFO_UPDATE); /* required for audio info values to be updated */</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI_INFOFRAME_CONTROL1 + offset,</div><div class='add'>+	       HDMI_AVI_INFO_LINE(2) | /* anything other than 0 */</div><div class='add'>+	       HDMI_AUDIO_INFO_LINE(2)); /* anything other than 0 */</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI_GC + offset, 0); /* unset HDMI_GC_AVMUTE */</div><div class='add'>+</div><div class='add'>+	evergreen_hdmi_videoinfoframe(encoder, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='add'>+				      0, 0, 0, 0, 0, 0);</div><div class='add'>+</div><div class='add'>+	evergreen_hdmi_update_ACR(encoder, mode-&gt;clock);</div><div class='add'>+</div><div class='add'>+	/* it's unknown what these bits do excatly, but it's indeed quite useful for debugging */</div><div class='add'>+	WREG32(AFMT_RAMP_CONTROL0 + offset, 0x00FFFFFF);</div><div class='add'>+	WREG32(AFMT_RAMP_CONTROL1 + offset, 0x007FFFFF);</div><div class='add'>+	WREG32(AFMT_RAMP_CONTROL2 + offset, 0x00000001);</div><div class='add'>+	WREG32(AFMT_RAMP_CONTROL3 + offset, 0x00000001);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h<br/>index 96c10b3991aa..8beac1065025 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/evergreen_reg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/evergreen_reg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/evergreen_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/evergreen_reg.h</a></div><div class='hunk'>@@ -232,6 +232,4 @@</div><div class='ctx'> /* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */</div><div class='ctx'> #define EVERGREEN_HDMI_BASE				0x7030</div><div class='ctx'> </div><div class='del'>-#define EVERGREEN_HDMI_CONFIG_OFFSET			0xf0</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h<br/>index b4eefc355f16..2773039b4902 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/evergreend.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/evergreend.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/evergreend.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/evergreend.h</a></div><div class='hunk'>@@ -37,6 +37,15 @@</div><div class='ctx'> #define EVERGREEN_MAX_PIPES_MASK        0xFF</div><div class='ctx'> #define EVERGREEN_MAX_LDS_NUM           0xFFFF</div><div class='ctx'> </div><div class='add'>+#define CYPRESS_GB_ADDR_CONFIG_GOLDEN        0x02011003</div><div class='add'>+#define BARTS_GB_ADDR_CONFIG_GOLDEN          0x02011003</div><div class='add'>+#define CAYMAN_GB_ADDR_CONFIG_GOLDEN         0x02011003</div><div class='add'>+#define JUNIPER_GB_ADDR_CONFIG_GOLDEN        0x02010002</div><div class='add'>+#define REDWOOD_GB_ADDR_CONFIG_GOLDEN        0x02010002</div><div class='add'>+#define TURKS_GB_ADDR_CONFIG_GOLDEN          0x02010002</div><div class='add'>+#define CEDAR_GB_ADDR_CONFIG_GOLDEN          0x02010001</div><div class='add'>+#define CAICOS_GB_ADDR_CONFIG_GOLDEN         0x02010001</div><div class='add'>+</div><div class='ctx'> /* Registers */</div><div class='ctx'> </div><div class='ctx'> #define RCU_IND_INDEX           			0x100</div><div class='hunk'>@@ -54,6 +63,7 @@</div><div class='ctx'> #define		BACKEND_DISABLE(x)     			((x) &lt;&lt; 16)</div><div class='ctx'> #define GB_ADDR_CONFIG  				0x98F8</div><div class='ctx'> #define		NUM_PIPES(x)				((x) &lt;&lt; 0)</div><div class='add'>+#define		NUM_PIPES_MASK				0x0000000f</div><div class='ctx'> #define		PIPE_INTERLEAVE_SIZE(x)			((x) &lt;&lt; 4)</div><div class='ctx'> #define		BANK_INTERLEAVE_SIZE(x)			((x) &lt;&lt; 8)</div><div class='ctx'> #define		NUM_SHADER_ENGINES(x)			((x) &lt;&lt; 12)</div><div class='hunk'>@@ -112,6 +122,226 @@</div><div class='ctx'> #define	CP_SEM_INCOMPLETE_TIMER_CNTL			0x85C8</div><div class='ctx'> #define	CP_DEBUG					0xC1FC</div><div class='ctx'> </div><div class='add'>+/* Audio clocks */</div><div class='add'>+#define DCCG_AUDIO_DTO_SOURCE             0x05ac</div><div class='add'>+#       define DCCG_AUDIO_DTO0_SOURCE_SEL(x) ((x) &lt;&lt; 0) /* crtc0 - crtc5 */</div><div class='add'>+#       define DCCG_AUDIO_DTO_SEL         (1 &lt;&lt; 4) /* 0=dto0 1=dto1 */</div><div class='add'>+</div><div class='add'>+#define DCCG_AUDIO_DTO0_PHASE             0x05b0</div><div class='add'>+#define DCCG_AUDIO_DTO0_MODULE            0x05b4</div><div class='add'>+#define DCCG_AUDIO_DTO0_LOAD              0x05b8</div><div class='add'>+#define DCCG_AUDIO_DTO0_CNTL              0x05bc</div><div class='add'>+</div><div class='add'>+#define DCCG_AUDIO_DTO1_PHASE             0x05c0</div><div class='add'>+#define DCCG_AUDIO_DTO1_MODULE            0x05c4</div><div class='add'>+#define DCCG_AUDIO_DTO1_LOAD              0x05c8</div><div class='add'>+#define DCCG_AUDIO_DTO1_CNTL              0x05cc</div><div class='add'>+</div><div class='add'>+/* DCE 4.0 AFMT */</div><div class='add'>+#define HDMI_CONTROL                         0x7030</div><div class='add'>+#       define HDMI_KEEPOUT_MODE             (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_PACKET_GEN_VERSION       (1 &lt;&lt; 4) /* 0 = r6xx compat */</div><div class='add'>+#       define HDMI_ERROR_ACK                (1 &lt;&lt; 8)</div><div class='add'>+#       define HDMI_ERROR_MASK               (1 &lt;&lt; 9)</div><div class='add'>+#       define HDMI_DEEP_COLOR_ENABLE        (1 &lt;&lt; 24)</div><div class='add'>+#       define HDMI_DEEP_COLOR_DEPTH         (((x) &amp; 3) &lt;&lt; 28)</div><div class='add'>+#       define HDMI_24BIT_DEEP_COLOR         0</div><div class='add'>+#       define HDMI_30BIT_DEEP_COLOR         1</div><div class='add'>+#       define HDMI_36BIT_DEEP_COLOR         2</div><div class='add'>+#define HDMI_STATUS                          0x7034</div><div class='add'>+#       define HDMI_ACTIVE_AVMUTE            (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_AUDIO_PACKET_ERROR       (1 &lt;&lt; 16)</div><div class='add'>+#       define HDMI_VBI_PACKET_ERROR         (1 &lt;&lt; 20)</div><div class='add'>+#define HDMI_AUDIO_PACKET_CONTROL            0x7038</div><div class='add'>+#       define HDMI_AUDIO_DELAY_EN(x)        (((x) &amp; 3) &lt;&lt; 4)</div><div class='add'>+#       define HDMI_AUDIO_PACKETS_PER_LINE(x)  (((x) &amp; 0x1f) &lt;&lt; 16)</div><div class='add'>+#define HDMI_ACR_PACKET_CONTROL              0x703c</div><div class='add'>+#       define HDMI_ACR_SEND                 (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_ACR_CONT                 (1 &lt;&lt; 1)</div><div class='add'>+#       define HDMI_ACR_SELECT(x)            (((x) &amp; 3) &lt;&lt; 4)</div><div class='add'>+#       define HDMI_ACR_HW                   0</div><div class='add'>+#       define HDMI_ACR_32                   1</div><div class='add'>+#       define HDMI_ACR_44                   2</div><div class='add'>+#       define HDMI_ACR_48                   3</div><div class='add'>+#       define HDMI_ACR_SOURCE               (1 &lt;&lt; 8) /* 0 - hw; 1 - cts value */</div><div class='add'>+#       define HDMI_ACR_AUTO_SEND            (1 &lt;&lt; 12)</div><div class='add'>+#       define HDMI_ACR_N_MULTIPLE(x)        (((x) &amp; 7) &lt;&lt; 16)</div><div class='add'>+#       define HDMI_ACR_X1                   1</div><div class='add'>+#       define HDMI_ACR_X2                   2</div><div class='add'>+#       define HDMI_ACR_X4                   4</div><div class='add'>+#       define HDMI_ACR_AUDIO_PRIORITY       (1 &lt;&lt; 31)</div><div class='add'>+#define HDMI_VBI_PACKET_CONTROL              0x7040</div><div class='add'>+#       define HDMI_NULL_SEND                (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_GC_SEND                  (1 &lt;&lt; 4)</div><div class='add'>+#       define HDMI_GC_CONT                  (1 &lt;&lt; 5) /* 0 - once; 1 - every frame */</div><div class='add'>+#define HDMI_INFOFRAME_CONTROL0              0x7044</div><div class='add'>+#       define HDMI_AVI_INFO_SEND            (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_AVI_INFO_CONT            (1 &lt;&lt; 1)</div><div class='add'>+#       define HDMI_AUDIO_INFO_SEND          (1 &lt;&lt; 4)</div><div class='add'>+#       define HDMI_AUDIO_INFO_CONT          (1 &lt;&lt; 5)</div><div class='add'>+#       define HDMI_MPEG_INFO_SEND           (1 &lt;&lt; 8)</div><div class='add'>+#       define HDMI_MPEG_INFO_CONT           (1 &lt;&lt; 9)</div><div class='add'>+#define HDMI_INFOFRAME_CONTROL1              0x7048</div><div class='add'>+#       define HDMI_AVI_INFO_LINE(x)         (((x) &amp; 0x3f) &lt;&lt; 0)</div><div class='add'>+#       define HDMI_AUDIO_INFO_LINE(x)       (((x) &amp; 0x3f) &lt;&lt; 8)</div><div class='add'>+#       define HDMI_MPEG_INFO_LINE(x)        (((x) &amp; 0x3f) &lt;&lt; 16)</div><div class='add'>+#define HDMI_GENERIC_PACKET_CONTROL          0x704c</div><div class='add'>+#       define HDMI_GENERIC0_SEND            (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_GENERIC0_CONT            (1 &lt;&lt; 1)</div><div class='add'>+#       define HDMI_GENERIC1_SEND            (1 &lt;&lt; 4)</div><div class='add'>+#       define HDMI_GENERIC1_CONT            (1 &lt;&lt; 5)</div><div class='add'>+#       define HDMI_GENERIC0_LINE(x)         (((x) &amp; 0x3f) &lt;&lt; 16)</div><div class='add'>+#       define HDMI_GENERIC1_LINE(x)         (((x) &amp; 0x3f) &lt;&lt; 24)</div><div class='add'>+#define HDMI_GC                              0x7058</div><div class='add'>+#       define HDMI_GC_AVMUTE                (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_GC_AVMUTE_CONT           (1 &lt;&lt; 2)</div><div class='add'>+#define AFMT_AUDIO_PACKET_CONTROL2           0x705c</div><div class='add'>+#       define AFMT_AUDIO_LAYOUT_OVRD        (1 &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AUDIO_LAYOUT_SELECT      (1 &lt;&lt; 1)</div><div class='add'>+#       define AFMT_60958_CS_SOURCE          (1 &lt;&lt; 4)</div><div class='add'>+#       define AFMT_AUDIO_CHANNEL_ENABLE(x)  (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_DP_AUDIO_STREAM_ID(x)    (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='add'>+#define AFMT_AVI_INFO0                       0x7084</div><div class='add'>+#       define AFMT_AVI_INFO_CHECKSUM(x)     (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AVI_INFO_S(x)            (((x) &amp; 3) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_AVI_INFO_B(x)            (((x) &amp; 3) &lt;&lt; 10)</div><div class='add'>+#       define AFMT_AVI_INFO_A(x)            (((x) &amp; 1) &lt;&lt; 12)</div><div class='add'>+#       define AFMT_AVI_INFO_Y(x)            (((x) &amp; 3) &lt;&lt; 13)</div><div class='add'>+#       define AFMT_AVI_INFO_Y_RGB           0</div><div class='add'>+#       define AFMT_AVI_INFO_Y_YCBCR422      1</div><div class='add'>+#       define AFMT_AVI_INFO_Y_YCBCR444      2</div><div class='add'>+#       define AFMT_AVI_INFO_Y_A_B_S(x)      (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_AVI_INFO_R(x)            (((x) &amp; 0xf) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_AVI_INFO_M(x)            (((x) &amp; 0x3) &lt;&lt; 20)</div><div class='add'>+#       define AFMT_AVI_INFO_C(x)            (((x) &amp; 0x3) &lt;&lt; 22)</div><div class='add'>+#       define AFMT_AVI_INFO_C_M_R(x)        (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_AVI_INFO_SC(x)           (((x) &amp; 0x3) &lt;&lt; 24)</div><div class='add'>+#       define AFMT_AVI_INFO_Q(x)            (((x) &amp; 0x3) &lt;&lt; 26)</div><div class='add'>+#       define AFMT_AVI_INFO_EC(x)           (((x) &amp; 0x3) &lt;&lt; 28)</div><div class='add'>+#       define AFMT_AVI_INFO_ITC(x)          (((x) &amp; 0x1) &lt;&lt; 31)</div><div class='add'>+#       define AFMT_AVI_INFO_ITC_EC_Q_SC(x)  (((x) &amp; 0xff) &lt;&lt; 24)</div><div class='add'>+#define AFMT_AVI_INFO1                       0x7088</div><div class='add'>+#       define AFMT_AVI_INFO_VIC(x)          (((x) &amp; 0x7f) &lt;&lt; 0) /* don't use avi infoframe v1 */</div><div class='add'>+#       define AFMT_AVI_INFO_PR(x)           (((x) &amp; 0xf) &lt;&lt; 8) /* don't use avi infoframe v1 */</div><div class='add'>+#       define AFMT_AVI_INFO_CN(x)           (((x) &amp; 0x3) &lt;&lt; 12)</div><div class='add'>+#       define AFMT_AVI_INFO_YQ(x)           (((x) &amp; 0x3) &lt;&lt; 14)</div><div class='add'>+#       define AFMT_AVI_INFO_TOP(x)          (((x) &amp; 0xffff) &lt;&lt; 16)</div><div class='add'>+#define AFMT_AVI_INFO2                       0x708c</div><div class='add'>+#       define AFMT_AVI_INFO_BOTTOM(x)       (((x) &amp; 0xffff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AVI_INFO_LEFT(x)         (((x) &amp; 0xffff) &lt;&lt; 16)</div><div class='add'>+#define AFMT_AVI_INFO3                       0x7090</div><div class='add'>+#       define AFMT_AVI_INFO_RIGHT(x)        (((x) &amp; 0xffff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AVI_INFO_VERSION(x)      (((x) &amp; 3) &lt;&lt; 24)</div><div class='add'>+#define AFMT_MPEG_INFO0                      0x7094</div><div class='add'>+#       define AFMT_MPEG_INFO_CHECKSUM(x)    (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_MPEG_INFO_MB0(x)         (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_MPEG_INFO_MB1(x)         (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_MPEG_INFO_MB2(x)         (((x) &amp; 0xff) &lt;&lt; 24)</div><div class='add'>+#define AFMT_MPEG_INFO1                      0x7098</div><div class='add'>+#       define AFMT_MPEG_INFO_MB3(x)         (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_MPEG_INFO_MF(x)          (((x) &amp; 3) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_MPEG_INFO_FR(x)          (((x) &amp; 1) &lt;&lt; 12)</div><div class='add'>+#define AFMT_GENERIC0_HDR                    0x709c</div><div class='add'>+#define AFMT_GENERIC0_0                      0x70a0</div><div class='add'>+#define AFMT_GENERIC0_1                      0x70a4</div><div class='add'>+#define AFMT_GENERIC0_2                      0x70a8</div><div class='add'>+#define AFMT_GENERIC0_3                      0x70ac</div><div class='add'>+#define AFMT_GENERIC0_4                      0x70b0</div><div class='add'>+#define AFMT_GENERIC0_5                      0x70b4</div><div class='add'>+#define AFMT_GENERIC0_6                      0x70b8</div><div class='add'>+#define AFMT_GENERIC1_HDR                    0x70bc</div><div class='add'>+#define AFMT_GENERIC1_0                      0x70c0</div><div class='add'>+#define AFMT_GENERIC1_1                      0x70c4</div><div class='add'>+#define AFMT_GENERIC1_2                      0x70c8</div><div class='add'>+#define AFMT_GENERIC1_3                      0x70cc</div><div class='add'>+#define AFMT_GENERIC1_4                      0x70d0</div><div class='add'>+#define AFMT_GENERIC1_5                      0x70d4</div><div class='add'>+#define AFMT_GENERIC1_6                      0x70d8</div><div class='add'>+#define HDMI_ACR_32_0                        0x70dc</div><div class='add'>+#       define HDMI_ACR_CTS_32(x)            (((x) &amp; 0xfffff) &lt;&lt; 12)</div><div class='add'>+#define HDMI_ACR_32_1                        0x70e0</div><div class='add'>+#       define HDMI_ACR_N_32(x)              (((x) &amp; 0xfffff) &lt;&lt; 0)</div><div class='add'>+#define HDMI_ACR_44_0                        0x70e4</div><div class='add'>+#       define HDMI_ACR_CTS_44(x)            (((x) &amp; 0xfffff) &lt;&lt; 12)</div><div class='add'>+#define HDMI_ACR_44_1                        0x70e8</div><div class='add'>+#       define HDMI_ACR_N_44(x)              (((x) &amp; 0xfffff) &lt;&lt; 0)</div><div class='add'>+#define HDMI_ACR_48_0                        0x70ec</div><div class='add'>+#       define HDMI_ACR_CTS_48(x)            (((x) &amp; 0xfffff) &lt;&lt; 12)</div><div class='add'>+#define HDMI_ACR_48_1                        0x70f0</div><div class='add'>+#       define HDMI_ACR_N_48(x)              (((x) &amp; 0xfffff) &lt;&lt; 0)</div><div class='add'>+#define HDMI_ACR_STATUS_0                    0x70f4</div><div class='add'>+#define HDMI_ACR_STATUS_1                    0x70f8</div><div class='add'>+#define AFMT_AUDIO_INFO0                     0x70fc</div><div class='add'>+#       define AFMT_AUDIO_INFO_CHECKSUM(x)   (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AUDIO_INFO_CC(x)         (((x) &amp; 7) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_AUDIO_INFO_CT(x)         (((x) &amp; 0xf) &lt;&lt; 11)</div><div class='add'>+#       define AFMT_AUDIO_INFO_CHECKSUM_OFFSET(x)   (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_AUDIO_INFO_CXT(x)        (((x) &amp; 0x1f) &lt;&lt; 24)</div><div class='add'>+#define AFMT_AUDIO_INFO1                     0x7100</div><div class='add'>+#       define AFMT_AUDIO_INFO_CA(x)         (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AUDIO_INFO_LSV(x)        (((x) &amp; 0xf) &lt;&lt; 11)</div><div class='add'>+#       define AFMT_AUDIO_INFO_DM_INH(x)     (((x) &amp; 1) &lt;&lt; 15)</div><div class='add'>+#       define AFMT_AUDIO_INFO_DM_INH_LSV(x) (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_AUDIO_INFO_LFEBPL(x)     (((x) &amp; 3) &lt;&lt; 16)</div><div class='add'>+#define AFMT_60958_0                         0x7104</div><div class='add'>+#       define AFMT_60958_CS_A(x)            (((x) &amp; 1) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_60958_CS_B(x)            (((x) &amp; 1) &lt;&lt; 1)</div><div class='add'>+#       define AFMT_60958_CS_C(x)            (((x) &amp; 1) &lt;&lt; 2)</div><div class='add'>+#       define AFMT_60958_CS_D(x)            (((x) &amp; 3) &lt;&lt; 3)</div><div class='add'>+#       define AFMT_60958_CS_MODE(x)         (((x) &amp; 3) &lt;&lt; 6)</div><div class='add'>+#       define AFMT_60958_CS_CATEGORY_CODE(x)      (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_60958_CS_SOURCE_NUMBER(x)      (((x) &amp; 0xf) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_L(x)   (((x) &amp; 0xf) &lt;&lt; 20)</div><div class='add'>+#       define AFMT_60958_CS_SAMPLING_FREQUENCY(x) (((x) &amp; 0xf) &lt;&lt; 24)</div><div class='add'>+#       define AFMT_60958_CS_CLOCK_ACCURACY(x)     (((x) &amp; 3) &lt;&lt; 28)</div><div class='add'>+#define AFMT_60958_1                         0x7108</div><div class='add'>+#       define AFMT_60958_CS_WORD_LENGTH(x)  (((x) &amp; 0xf) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_60958_CS_ORIGINAL_SAMPLING_FREQUENCY(x)   (((x) &amp; 0xf) &lt;&lt; 4)</div><div class='add'>+#       define AFMT_60958_CS_VALID_L(x)      (((x) &amp; 1) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_60958_CS_VALID_R(x)      (((x) &amp; 1) &lt;&lt; 18)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_R(x)   (((x) &amp; 0xf) &lt;&lt; 20)</div><div class='add'>+#define AFMT_AUDIO_CRC_CONTROL               0x710c</div><div class='add'>+#       define AFMT_AUDIO_CRC_EN             (1 &lt;&lt; 0)</div><div class='add'>+#define AFMT_RAMP_CONTROL0                   0x7110</div><div class='add'>+#       define AFMT_RAMP_MAX_COUNT(x)        (((x) &amp; 0xffffff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_RAMP_DATA_SIGN           (1 &lt;&lt; 31)</div><div class='add'>+#define AFMT_RAMP_CONTROL1                   0x7114</div><div class='add'>+#       define AFMT_RAMP_MIN_COUNT(x)        (((x) &amp; 0xffffff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AUDIO_TEST_CH_DISABLE(x) (((x) &amp; 0xff) &lt;&lt; 24)</div><div class='add'>+#define AFMT_RAMP_CONTROL2                   0x7118</div><div class='add'>+#       define AFMT_RAMP_INC_COUNT(x)        (((x) &amp; 0xffffff) &lt;&lt; 0)</div><div class='add'>+#define AFMT_RAMP_CONTROL3                   0x711c</div><div class='add'>+#       define AFMT_RAMP_DEC_COUNT(x)        (((x) &amp; 0xffffff) &lt;&lt; 0)</div><div class='add'>+#define AFMT_60958_2                         0x7120</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_2(x)   (((x) &amp; 0xf) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_3(x)   (((x) &amp; 0xf) &lt;&lt; 4)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_4(x)   (((x) &amp; 0xf) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_5(x)   (((x) &amp; 0xf) &lt;&lt; 12)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_6(x)   (((x) &amp; 0xf) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_7(x)   (((x) &amp; 0xf) &lt;&lt; 20)</div><div class='add'>+#define AFMT_STATUS                          0x7128</div><div class='add'>+#       define AFMT_AUDIO_ENABLE             (1 &lt;&lt; 4)</div><div class='add'>+#       define AFMT_AUDIO_HBR_ENABLE         (1 &lt;&lt; 8)</div><div class='add'>+#       define AFMT_AZ_FORMAT_WTRIG          (1 &lt;&lt; 28)</div><div class='add'>+#       define AFMT_AZ_FORMAT_WTRIG_INT      (1 &lt;&lt; 29)</div><div class='add'>+#       define AFMT_AZ_AUDIO_ENABLE_CHG      (1 &lt;&lt; 30)</div><div class='add'>+#define AFMT_AUDIO_PACKET_CONTROL            0x712c</div><div class='add'>+#       define AFMT_AUDIO_SAMPLE_SEND        (1 &lt;&lt; 0)</div><div class='add'>+#       define AFMT_RESET_FIFO_WHEN_AUDIO_DIS (1 &lt;&lt; 11) /* set to 1 */</div><div class='add'>+#       define AFMT_AUDIO_TEST_EN            (1 &lt;&lt; 12)</div><div class='add'>+#       define AFMT_AUDIO_CHANNEL_SWAP       (1 &lt;&lt; 24)</div><div class='add'>+#       define AFMT_60958_CS_UPDATE          (1 &lt;&lt; 26)</div><div class='add'>+#       define AFMT_AZ_AUDIO_ENABLE_CHG_MASK (1 &lt;&lt; 27)</div><div class='add'>+#       define AFMT_AZ_FORMAT_WTRIG_MASK     (1 &lt;&lt; 28)</div><div class='add'>+#       define AFMT_AZ_FORMAT_WTRIG_ACK      (1 &lt;&lt; 29)</div><div class='add'>+#       define AFMT_AZ_AUDIO_ENABLE_CHG_ACK  (1 &lt;&lt; 30)</div><div class='add'>+#define AFMT_VBI_PACKET_CONTROL              0x7130</div><div class='add'>+#       define AFMT_GENERIC0_UPDATE          (1 &lt;&lt; 2)</div><div class='add'>+#define AFMT_INFOFRAME_CONTROL0              0x7134</div><div class='add'>+#       define AFMT_AUDIO_INFO_SOURCE        (1 &lt;&lt; 6) /* 0 - sound block; 1 - afmt regs */</div><div class='add'>+#       define AFMT_AUDIO_INFO_UPDATE        (1 &lt;&lt; 7)</div><div class='add'>+#       define AFMT_MPEG_INFO_UPDATE         (1 &lt;&lt; 10)</div><div class='add'>+#define AFMT_GENERIC0_7                      0x7138</div><div class='ctx'> </div><div class='ctx'> #define	GC_USER_SHADER_PIPE_CONFIG			0x8954</div><div class='ctx'> #define		INACTIVE_QD_PIPES(x)				((x) &lt;&lt; 8)</div><div class='hunk'>@@ -232,6 +462,7 @@</div><div class='ctx'> #define	MC_VM_MD_L1_TLB0_CNTL				0x2654</div><div class='ctx'> #define	MC_VM_MD_L1_TLB1_CNTL				0x2658</div><div class='ctx'> #define	MC_VM_MD_L1_TLB2_CNTL				0x265C</div><div class='add'>+#define	MC_VM_MD_L1_TLB3_CNTL				0x2698</div><div class='ctx'> </div><div class='ctx'> #define	FUS_MC_VM_MD_L1_TLB0_CNTL			0x265C</div><div class='ctx'> #define	FUS_MC_VM_MD_L1_TLB1_CNTL			0x2660</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c<br/>index a48ca53fcd6a..3186522a4458 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/ni.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/ni.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/ni.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/ni.c</a></div><div class='hunk'>@@ -417,215 +417,17 @@ out:</div><div class='ctx'> /*</div><div class='ctx'>  * Core functions</div><div class='ctx'>  */</div><div class='del'>-static u32 cayman_get_tile_pipe_to_backend_map(struct radeon_device *rdev,</div><div class='del'>-					       u32 num_tile_pipes,</div><div class='del'>-					       u32 num_backends_per_asic,</div><div class='del'>-					       u32 *backend_disable_mask_per_asic,</div><div class='del'>-					       u32 num_shader_engines)</div><div class='del'>-{</div><div class='del'>-	u32 backend_map = 0;</div><div class='del'>-	u32 enabled_backends_mask = 0;</div><div class='del'>-	u32 enabled_backends_count = 0;</div><div class='del'>-	u32 num_backends_per_se;</div><div class='del'>-	u32 cur_pipe;</div><div class='del'>-	u32 swizzle_pipe[CAYMAN_MAX_PIPES];</div><div class='del'>-	u32 cur_backend = 0;</div><div class='del'>-	u32 i;</div><div class='del'>-	bool force_no_swizzle;</div><div class='del'>-</div><div class='del'>-	/* force legal values */</div><div class='del'>-	if (num_tile_pipes &lt; 1)</div><div class='del'>-		num_tile_pipes = 1;</div><div class='del'>-	if (num_tile_pipes &gt; rdev-&gt;config.cayman.max_tile_pipes)</div><div class='del'>-		num_tile_pipes = rdev-&gt;config.cayman.max_tile_pipes;</div><div class='del'>-	if (num_shader_engines &lt; 1)</div><div class='del'>-		num_shader_engines = 1;</div><div class='del'>-	if (num_shader_engines &gt; rdev-&gt;config.cayman.max_shader_engines)</div><div class='del'>-		num_shader_engines = rdev-&gt;config.cayman.max_shader_engines;</div><div class='del'>-	if (num_backends_per_asic &lt; num_shader_engines)</div><div class='del'>-		num_backends_per_asic = num_shader_engines;</div><div class='del'>-	if (num_backends_per_asic &gt; (rdev-&gt;config.cayman.max_backends_per_se * num_shader_engines))</div><div class='del'>-		num_backends_per_asic = rdev-&gt;config.cayman.max_backends_per_se * num_shader_engines;</div><div class='del'>-</div><div class='del'>-	/* make sure we have the same number of backends per se */</div><div class='del'>-	num_backends_per_asic = ALIGN(num_backends_per_asic, num_shader_engines);</div><div class='del'>-	/* set up the number of backends per se */</div><div class='del'>-	num_backends_per_se = num_backends_per_asic / num_shader_engines;</div><div class='del'>-	if (num_backends_per_se &gt; rdev-&gt;config.cayman.max_backends_per_se) {</div><div class='del'>-		num_backends_per_se = rdev-&gt;config.cayman.max_backends_per_se;</div><div class='del'>-		num_backends_per_asic = num_backends_per_se * num_shader_engines;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* create enable mask and count for enabled backends */</div><div class='del'>-	for (i = 0; i &lt; CAYMAN_MAX_BACKENDS; ++i) {</div><div class='del'>-		if (((*backend_disable_mask_per_asic &gt;&gt; i) &amp; 1) == 0) {</div><div class='del'>-			enabled_backends_mask |= (1 &lt;&lt; i);</div><div class='del'>-			++enabled_backends_count;</div><div class='del'>-		}</div><div class='del'>-		if (enabled_backends_count == num_backends_per_asic)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* force the backends mask to match the current number of backends */</div><div class='del'>-	if (enabled_backends_count != num_backends_per_asic) {</div><div class='del'>-		u32 this_backend_enabled;</div><div class='del'>-		u32 shader_engine;</div><div class='del'>-		u32 backend_per_se;</div><div class='del'>-</div><div class='del'>-		enabled_backends_mask = 0;</div><div class='del'>-		enabled_backends_count = 0;</div><div class='del'>-		*backend_disable_mask_per_asic = CAYMAN_MAX_BACKENDS_MASK;</div><div class='del'>-		for (i = 0; i &lt; CAYMAN_MAX_BACKENDS; ++i) {</div><div class='del'>-			/* calc the current se */</div><div class='del'>-			shader_engine = i / rdev-&gt;config.cayman.max_backends_per_se;</div><div class='del'>-			/* calc the backend per se */</div><div class='del'>-			backend_per_se = i % rdev-&gt;config.cayman.max_backends_per_se;</div><div class='del'>-			/* default to not enabled */</div><div class='del'>-			this_backend_enabled = 0;</div><div class='del'>-			if ((shader_engine &lt; num_shader_engines) &amp;&amp;</div><div class='del'>-			    (backend_per_se &lt; num_backends_per_se))</div><div class='del'>-				this_backend_enabled = 1;</div><div class='del'>-			if (this_backend_enabled) {</div><div class='del'>-				enabled_backends_mask |= (1 &lt;&lt; i);</div><div class='del'>-				*backend_disable_mask_per_asic &amp;= ~(1 &lt;&lt; i);</div><div class='del'>-				++enabled_backends_count;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	memset((uint8_t *)&amp;swizzle_pipe[0], 0, sizeof(u32) * CAYMAN_MAX_PIPES);</div><div class='del'>-	switch (rdev-&gt;family) {</div><div class='del'>-	case CHIP_CAYMAN:</div><div class='del'>-	case CHIP_ARUBA:</div><div class='del'>-		force_no_swizzle = true;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		force_no_swizzle = false;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	if (force_no_swizzle) {</div><div class='del'>-		bool last_backend_enabled = false;</div><div class='del'>-</div><div class='del'>-		force_no_swizzle = false;</div><div class='del'>-		for (i = 0; i &lt; CAYMAN_MAX_BACKENDS; ++i) {</div><div class='del'>-			if (((enabled_backends_mask &gt;&gt; i) &amp; 1) == 1) {</div><div class='del'>-				if (last_backend_enabled)</div><div class='del'>-					force_no_swizzle = true;</div><div class='del'>-				last_backend_enabled = true;</div><div class='del'>-			} else</div><div class='del'>-				last_backend_enabled = false;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (num_tile_pipes) {</div><div class='del'>-	case 1:</div><div class='del'>-	case 3:</div><div class='del'>-	case 5:</div><div class='del'>-	case 7:</div><div class='del'>-		DRM_ERROR("odd number of pipes!\n");</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		swizzle_pipe[1] = 1;</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 1;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 6:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-			swizzle_pipe[4] = 4;</div><div class='del'>-			swizzle_pipe[5] = 5;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 4;</div><div class='del'>-			swizzle_pipe[3] = 1;</div><div class='del'>-			swizzle_pipe[4] = 3;</div><div class='del'>-			swizzle_pipe[5] = 5;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 8:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-			swizzle_pipe[4] = 4;</div><div class='del'>-			swizzle_pipe[5] = 5;</div><div class='del'>-			swizzle_pipe[6] = 6;</div><div class='del'>-			swizzle_pipe[7] = 7;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 4;</div><div class='del'>-			swizzle_pipe[3] = 6;</div><div class='del'>-			swizzle_pipe[4] = 1;</div><div class='del'>-			swizzle_pipe[5] = 3;</div><div class='del'>-			swizzle_pipe[6] = 5;</div><div class='del'>-			swizzle_pipe[7] = 7;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (cur_pipe = 0; cur_pipe &lt; num_tile_pipes; ++cur_pipe) {</div><div class='del'>-		while (((1 &lt;&lt; cur_backend) &amp; enabled_backends_mask) == 0)</div><div class='del'>-			cur_backend = (cur_backend + 1) % CAYMAN_MAX_BACKENDS;</div><div class='del'>-</div><div class='del'>-		backend_map |= (((cur_backend &amp; 0xf) &lt;&lt; (swizzle_pipe[cur_pipe] * 4)));</div><div class='del'>-</div><div class='del'>-		cur_backend = (cur_backend + 1) % CAYMAN_MAX_BACKENDS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return backend_map;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 cayman_get_disable_mask_per_asic(struct radeon_device *rdev,</div><div class='del'>-					    u32 disable_mask_per_se,</div><div class='del'>-					    u32 max_disable_mask_per_se,</div><div class='del'>-					    u32 num_shader_engines)</div><div class='del'>-{</div><div class='del'>-	u32 disable_field_width_per_se = r600_count_pipe_bits(disable_mask_per_se);</div><div class='del'>-	u32 disable_mask_per_asic = disable_mask_per_se &amp; max_disable_mask_per_se;</div><div class='del'>-</div><div class='del'>-	if (num_shader_engines == 1)</div><div class='del'>-		return disable_mask_per_asic;</div><div class='del'>-	else if (num_shader_engines == 2)</div><div class='del'>-		return disable_mask_per_asic | (disable_mask_per_asic &lt;&lt; disable_field_width_per_se);</div><div class='del'>-	else</div><div class='del'>-		return 0xffffffff;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void cayman_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='del'>-	u32 cc_rb_backend_disable = 0;</div><div class='del'>-	u32 cc_gc_shader_pipe_config;</div><div class='ctx'> 	u32 gb_addr_config = 0;</div><div class='ctx'> 	u32 mc_shared_chmap, mc_arb_ramcfg;</div><div class='del'>-	u32 gb_backend_map;</div><div class='ctx'> 	u32 cgts_tcc_disable;</div><div class='ctx'> 	u32 sx_debug_1;</div><div class='ctx'> 	u32 smx_dc_ctl0;</div><div class='del'>-	u32 gc_user_shader_pipe_config;</div><div class='del'>-	u32 gc_user_rb_backend_disable;</div><div class='del'>-	u32 cgts_user_tcc_disable;</div><div class='ctx'> 	u32 cgts_sm_ctrl_reg;</div><div class='ctx'> 	u32 hdp_host_path_cntl;</div><div class='ctx'> 	u32 tmp;</div><div class='add'>+	u32 disabled_rb_mask;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='ctx'> 	switch (rdev-&gt;family) {</div><div class='hunk'>@@ -650,6 +452,7 @@ static void cayman_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.cayman.sc_prim_fifo_size = 0x100;</div><div class='ctx'> 		rdev-&gt;config.cayman.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.cayman.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = CAYMAN_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CHIP_ARUBA:</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -657,15 +460,28 @@ static void cayman_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.cayman.max_pipes_per_simd = 4;</div><div class='ctx'> 		rdev-&gt;config.cayman.max_tile_pipes = 2;</div><div class='ctx'> 		if ((rdev-&gt;pdev-&gt;device == 0x9900) ||</div><div class='del'>-		    (rdev-&gt;pdev-&gt;device == 0x9901)) {</div><div class='add'>+		    (rdev-&gt;pdev-&gt;device == 0x9901) ||</div><div class='add'>+		    (rdev-&gt;pdev-&gt;device == 0x9905) ||</div><div class='add'>+		    (rdev-&gt;pdev-&gt;device == 0x9906) ||</div><div class='add'>+		    (rdev-&gt;pdev-&gt;device == 0x9907) ||</div><div class='add'>+		    (rdev-&gt;pdev-&gt;device == 0x9908) ||</div><div class='add'>+		    (rdev-&gt;pdev-&gt;device == 0x9909) ||</div><div class='add'>+		    (rdev-&gt;pdev-&gt;device == 0x9910) ||</div><div class='add'>+		    (rdev-&gt;pdev-&gt;device == 0x9917)) {</div><div class='ctx'> 			rdev-&gt;config.cayman.max_simds_per_se = 6;</div><div class='ctx'> 			rdev-&gt;config.cayman.max_backends_per_se = 2;</div><div class='ctx'> 		} else if ((rdev-&gt;pdev-&gt;device == 0x9903) ||</div><div class='del'>-			   (rdev-&gt;pdev-&gt;device == 0x9904)) {</div><div class='add'>+			   (rdev-&gt;pdev-&gt;device == 0x9904) ||</div><div class='add'>+			   (rdev-&gt;pdev-&gt;device == 0x990A) ||</div><div class='add'>+			   (rdev-&gt;pdev-&gt;device == 0x9913) ||</div><div class='add'>+			   (rdev-&gt;pdev-&gt;device == 0x9918)) {</div><div class='ctx'> 			rdev-&gt;config.cayman.max_simds_per_se = 4;</div><div class='ctx'> 			rdev-&gt;config.cayman.max_backends_per_se = 2;</div><div class='del'>-		} else if ((rdev-&gt;pdev-&gt;device == 0x9990) ||</div><div class='del'>-			   (rdev-&gt;pdev-&gt;device == 0x9991)) {</div><div class='add'>+		} else if ((rdev-&gt;pdev-&gt;device == 0x9919) ||</div><div class='add'>+			   (rdev-&gt;pdev-&gt;device == 0x9990) ||</div><div class='add'>+			   (rdev-&gt;pdev-&gt;device == 0x9991) ||</div><div class='add'>+			   (rdev-&gt;pdev-&gt;device == 0x9994) ||</div><div class='add'>+			   (rdev-&gt;pdev-&gt;device == 0x99A0)) {</div><div class='ctx'> 			rdev-&gt;config.cayman.max_simds_per_se = 3;</div><div class='ctx'> 			rdev-&gt;config.cayman.max_backends_per_se = 1;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -687,6 +503,7 @@ static void cayman_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.cayman.sc_prim_fifo_size = 0x40;</div><div class='ctx'> 		rdev-&gt;config.cayman.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.cayman.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = ARUBA_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -706,39 +523,6 @@ static void cayman_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	mc_shared_chmap = RREG32(MC_SHARED_CHMAP);</div><div class='ctx'> 	mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG);</div><div class='ctx'> </div><div class='del'>-	cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE);</div><div class='del'>-	cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG);</div><div class='del'>-	cgts_tcc_disable = 0xffff0000;</div><div class='del'>-	for (i = 0; i &lt; rdev-&gt;config.cayman.max_texture_channel_caches; i++)</div><div class='del'>-		cgts_tcc_disable &amp;= ~(1 &lt;&lt; (16 + i));</div><div class='del'>-	gc_user_rb_backend_disable = RREG32(GC_USER_RB_BACKEND_DISABLE);</div><div class='del'>-	gc_user_shader_pipe_config = RREG32(GC_USER_SHADER_PIPE_CONFIG);</div><div class='del'>-	cgts_user_tcc_disable = RREG32(CGTS_USER_TCC_DISABLE);</div><div class='del'>-</div><div class='del'>-	rdev-&gt;config.cayman.num_shader_engines = rdev-&gt;config.cayman.max_shader_engines;</div><div class='del'>-	tmp = ((~gc_user_shader_pipe_config) &amp; INACTIVE_QD_PIPES_MASK) &gt;&gt; INACTIVE_QD_PIPES_SHIFT;</div><div class='del'>-	rdev-&gt;config.cayman.num_shader_pipes_per_simd = r600_count_pipe_bits(tmp);</div><div class='del'>-	rdev-&gt;config.cayman.num_tile_pipes = rdev-&gt;config.cayman.max_tile_pipes;</div><div class='del'>-	tmp = ((~gc_user_shader_pipe_config) &amp; INACTIVE_SIMDS_MASK) &gt;&gt; INACTIVE_SIMDS_SHIFT;</div><div class='del'>-	rdev-&gt;config.cayman.num_simds_per_se = r600_count_pipe_bits(tmp);</div><div class='del'>-	tmp = ((~gc_user_rb_backend_disable) &amp; BACKEND_DISABLE_MASK) &gt;&gt; BACKEND_DISABLE_SHIFT;</div><div class='del'>-	rdev-&gt;config.cayman.num_backends_per_se = r600_count_pipe_bits(tmp);</div><div class='del'>-	tmp = (gc_user_rb_backend_disable &amp; BACKEND_DISABLE_MASK) &gt;&gt; BACKEND_DISABLE_SHIFT;</div><div class='del'>-	rdev-&gt;config.cayman.backend_disable_mask_per_asic =</div><div class='del'>-		cayman_get_disable_mask_per_asic(rdev, tmp, CAYMAN_MAX_BACKENDS_PER_SE_MASK,</div><div class='del'>-						 rdev-&gt;config.cayman.num_shader_engines);</div><div class='del'>-	rdev-&gt;config.cayman.backend_map =</div><div class='del'>-		cayman_get_tile_pipe_to_backend_map(rdev, rdev-&gt;config.cayman.num_tile_pipes,</div><div class='del'>-						    rdev-&gt;config.cayman.num_backends_per_se *</div><div class='del'>-						    rdev-&gt;config.cayman.num_shader_engines,</div><div class='del'>-						    &amp;rdev-&gt;config.cayman.backend_disable_mask_per_asic,</div><div class='del'>-						    rdev-&gt;config.cayman.num_shader_engines);</div><div class='del'>-	tmp = ((~cgts_user_tcc_disable) &amp; TCC_DISABLE_MASK) &gt;&gt; TCC_DISABLE_SHIFT;</div><div class='del'>-	rdev-&gt;config.cayman.num_texture_channel_caches = r600_count_pipe_bits(tmp);</div><div class='del'>-	tmp = (mc_arb_ramcfg &amp; BURSTLENGTH_MASK) &gt;&gt; BURSTLENGTH_SHIFT;</div><div class='del'>-	rdev-&gt;config.cayman.mem_max_burst_length_bytes = (tmp + 1) * 256;</div><div class='del'>-	if (rdev-&gt;config.cayman.mem_max_burst_length_bytes &gt; 512)</div><div class='del'>-		rdev-&gt;config.cayman.mem_max_burst_length_bytes = 512;</div><div class='ctx'> 	tmp = (mc_arb_ramcfg &amp; NOOFCOLS_MASK) &gt;&gt; NOOFCOLS_SHIFT;</div><div class='ctx'> 	rdev-&gt;config.cayman.mem_row_size_in_kb = (4 * (1 &lt;&lt; (8 + tmp))) / 1024;</div><div class='ctx'> 	if (rdev-&gt;config.cayman.mem_row_size_in_kb &gt; 4)</div><div class='hunk'>@@ -748,73 +532,6 @@ static void cayman_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	rdev-&gt;config.cayman.num_gpus = 1;</div><div class='ctx'> 	rdev-&gt;config.cayman.multi_gpu_tile_size = 64;</div><div class='ctx'> </div><div class='del'>-	//gb_addr_config = 0x02011003</div><div class='del'>-#if 0</div><div class='del'>-	gb_addr_config = RREG32(GB_ADDR_CONFIG);</div><div class='del'>-#else</div><div class='del'>-	gb_addr_config = 0;</div><div class='del'>-	switch (rdev-&gt;config.cayman.num_tile_pipes) {</div><div class='del'>-	case 1:</div><div class='del'>-	default:</div><div class='del'>-		gb_addr_config |= NUM_PIPES(0);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		gb_addr_config |= NUM_PIPES(1);</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		gb_addr_config |= NUM_PIPES(2);</div><div class='del'>-		break;</div><div class='del'>-	case 8:</div><div class='del'>-		gb_addr_config |= NUM_PIPES(3);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tmp = (rdev-&gt;config.cayman.mem_max_burst_length_bytes / 256) - 1;</div><div class='del'>-	gb_addr_config |= PIPE_INTERLEAVE_SIZE(tmp);</div><div class='del'>-	gb_addr_config |= NUM_SHADER_ENGINES(rdev-&gt;config.cayman.num_shader_engines - 1);</div><div class='del'>-	tmp = (rdev-&gt;config.cayman.shader_engine_tile_size / 16) - 1;</div><div class='del'>-	gb_addr_config |= SHADER_ENGINE_TILE_SIZE(tmp);</div><div class='del'>-	switch (rdev-&gt;config.cayman.num_gpus) {</div><div class='del'>-	case 1:</div><div class='del'>-	default:</div><div class='del'>-		gb_addr_config |= NUM_GPUS(0);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		gb_addr_config |= NUM_GPUS(1);</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		gb_addr_config |= NUM_GPUS(2);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	switch (rdev-&gt;config.cayman.multi_gpu_tile_size) {</div><div class='del'>-	case 16:</div><div class='del'>-		gb_addr_config |= MULTI_GPU_TILE_SIZE(0);</div><div class='del'>-		break;</div><div class='del'>-	case 32:</div><div class='del'>-	default:</div><div class='del'>-		gb_addr_config |= MULTI_GPU_TILE_SIZE(1);</div><div class='del'>-		break;</div><div class='del'>-	case 64:</div><div class='del'>-		gb_addr_config |= MULTI_GPU_TILE_SIZE(2);</div><div class='del'>-		break;</div><div class='del'>-	case 128:</div><div class='del'>-		gb_addr_config |= MULTI_GPU_TILE_SIZE(3);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	switch (rdev-&gt;config.cayman.mem_row_size_in_kb) {</div><div class='del'>-	case 1:</div><div class='del'>-	default:</div><div class='del'>-		gb_addr_config |= ROW_SIZE(0);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		gb_addr_config |= ROW_SIZE(1);</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		gb_addr_config |= ROW_SIZE(2);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	tmp = (gb_addr_config &amp; NUM_PIPES_MASK) &gt;&gt; NUM_PIPES_SHIFT;</div><div class='ctx'> 	rdev-&gt;config.cayman.num_tile_pipes = (1 &lt;&lt; tmp);</div><div class='ctx'> 	tmp = (gb_addr_config &amp; PIPE_INTERLEAVE_SIZE_MASK) &gt;&gt; PIPE_INTERLEAVE_SIZE_SHIFT;</div><div class='hunk'>@@ -828,17 +545,7 @@ static void cayman_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	tmp = (gb_addr_config &amp; ROW_SIZE_MASK) &gt;&gt; ROW_SIZE_SHIFT;</div><div class='ctx'> 	rdev-&gt;config.cayman.mem_row_size_in_kb = 1 &lt;&lt; tmp;</div><div class='ctx'> </div><div class='del'>-	//gb_backend_map = 0x76541032;</div><div class='del'>-#if 0</div><div class='del'>-	gb_backend_map = RREG32(GB_BACKEND_MAP);</div><div class='del'>-#else</div><div class='del'>-	gb_backend_map =</div><div class='del'>-		cayman_get_tile_pipe_to_backend_map(rdev, rdev-&gt;config.cayman.num_tile_pipes,</div><div class='del'>-						    rdev-&gt;config.cayman.num_backends_per_se *</div><div class='del'>-						    rdev-&gt;config.cayman.num_shader_engines,</div><div class='del'>-						    &amp;rdev-&gt;config.cayman.backend_disable_mask_per_asic,</div><div class='del'>-						    rdev-&gt;config.cayman.num_shader_engines);</div><div class='del'>-#endif</div><div class='add'>+</div><div class='ctx'> 	/* setup tiling info dword.  gb_addr_config is not adequate since it does</div><div class='ctx'> 	 * not have bank info, so create a custom tiling dword.</div><div class='ctx'> 	 * bits 3:0   num_pipes</div><div class='hunk'>@@ -865,34 +572,50 @@ static void cayman_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> </div><div class='ctx'> 	/* num banks is 8 on all fusion asics. 0 = 4, 1 = 8, 2 = 16 */</div><div class='ctx'> 	if (rdev-&gt;flags &amp; RADEON_IS_IGP)</div><div class='del'>-		rdev-&gt;config.evergreen.tile_config |= 1 &lt;&lt; 4;</div><div class='del'>-	else</div><div class='del'>-		rdev-&gt;config.cayman.tile_config |=</div><div class='del'>-			((mc_arb_ramcfg &amp; NOOFBANK_MASK) &gt;&gt; NOOFBANK_SHIFT) &lt;&lt; 4;</div><div class='add'>+		rdev-&gt;config.cayman.tile_config |= 1 &lt;&lt; 4;</div><div class='add'>+	else {</div><div class='add'>+		if ((mc_arb_ramcfg &amp; NOOFBANK_MASK) &gt;&gt; NOOFBANK_SHIFT)</div><div class='add'>+			rdev-&gt;config.cayman.tile_config |= 1 &lt;&lt; 4;</div><div class='add'>+		else</div><div class='add'>+			rdev-&gt;config.cayman.tile_config |= 0 &lt;&lt; 4;</div><div class='add'>+	}</div><div class='ctx'> 	rdev-&gt;config.cayman.tile_config |=</div><div class='ctx'> 		((gb_addr_config &amp; PIPE_INTERLEAVE_SIZE_MASK) &gt;&gt; PIPE_INTERLEAVE_SIZE_SHIFT) &lt;&lt; 8;</div><div class='ctx'> 	rdev-&gt;config.cayman.tile_config |=</div><div class='ctx'> 		((gb_addr_config &amp; ROW_SIZE_MASK) &gt;&gt; ROW_SIZE_SHIFT) &lt;&lt; 12;</div><div class='ctx'> </div><div class='del'>-	rdev-&gt;config.cayman.backend_map = gb_backend_map;</div><div class='del'>-	WREG32(GB_BACKEND_MAP, gb_backend_map);</div><div class='add'>+	tmp = 0;</div><div class='add'>+	for (i = (rdev-&gt;config.cayman.max_shader_engines - 1); i &gt;= 0; i--) {</div><div class='add'>+		u32 rb_disable_bitmap;</div><div class='add'>+</div><div class='add'>+		WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i));</div><div class='add'>+		WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i));</div><div class='add'>+		rb_disable_bitmap = (RREG32(CC_RB_BACKEND_DISABLE) &amp; 0x00ff0000) &gt;&gt; 16;</div><div class='add'>+		tmp &lt;&lt;= 4;</div><div class='add'>+		tmp |= rb_disable_bitmap;</div><div class='add'>+	}</div><div class='add'>+	/* enabled rb are just the one not disabled :) */</div><div class='add'>+	disabled_rb_mask = tmp;</div><div class='add'>+</div><div class='add'>+	WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);</div><div class='add'>+	WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);</div><div class='add'>+</div><div class='ctx'> 	WREG32(GB_ADDR_CONFIG, gb_addr_config);</div><div class='ctx'> 	WREG32(DMIF_ADDR_CONFIG, gb_addr_config);</div><div class='ctx'> 	WREG32(HDP_ADDR_CONFIG, gb_addr_config);</div><div class='ctx'> </div><div class='del'>-	/* primary versions */</div><div class='del'>-	WREG32(CC_RB_BACKEND_DISABLE, cc_rb_backend_disable);</div><div class='del'>-	WREG32(CC_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable);</div><div class='del'>-	WREG32(CC_GC_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);</div><div class='add'>+	tmp = gb_addr_config &amp; NUM_PIPES_MASK;</div><div class='add'>+	tmp = r6xx_remap_render_backend(rdev, tmp,</div><div class='add'>+					rdev-&gt;config.cayman.max_backends_per_se *</div><div class='add'>+					rdev-&gt;config.cayman.max_shader_engines,</div><div class='add'>+					CAYMAN_MAX_BACKENDS, disabled_rb_mask);</div><div class='add'>+	WREG32(GB_BACKEND_MAP, tmp);</div><div class='ctx'> </div><div class='add'>+	cgts_tcc_disable = 0xffff0000;</div><div class='add'>+	for (i = 0; i &lt; rdev-&gt;config.cayman.max_texture_channel_caches; i++)</div><div class='add'>+		cgts_tcc_disable &amp;= ~(1 &lt;&lt; (16 + i));</div><div class='ctx'> 	WREG32(CGTS_TCC_DISABLE, cgts_tcc_disable);</div><div class='ctx'> 	WREG32(CGTS_SYS_TCC_DISABLE, cgts_tcc_disable);</div><div class='del'>-</div><div class='del'>-	/* user versions */</div><div class='del'>-	WREG32(GC_USER_RB_BACKEND_DISABLE, cc_rb_backend_disable);</div><div class='del'>-	WREG32(GC_USER_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable);</div><div class='del'>-	WREG32(GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);</div><div class='del'>-</div><div class='ctx'> 	WREG32(CGTS_USER_SYS_TCC_DISABLE, cgts_tcc_disable);</div><div class='ctx'> 	WREG32(CGTS_USER_TCC_DISABLE, cgts_tcc_disable);</div><div class='ctx'> </div><div class='hunk'>@@ -1392,35 +1115,6 @@ int cayman_cp_resume(struct radeon_device *rdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool cayman_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='del'>-{</div><div class='del'>-	u32 srbm_status;</div><div class='del'>-	u32 grbm_status;</div><div class='del'>-	u32 grbm_status_se0, grbm_status_se1;</div><div class='del'>-	struct r100_gpu_lockup *lockup = &amp;rdev-&gt;config.cayman.lockup;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	srbm_status = RREG32(SRBM_STATUS);</div><div class='del'>-	grbm_status = RREG32(GRBM_STATUS);</div><div class='del'>-	grbm_status_se0 = RREG32(GRBM_STATUS_SE0);</div><div class='del'>-	grbm_status_se1 = RREG32(GRBM_STATUS_SE1);</div><div class='del'>-	if (!(grbm_status &amp; GUI_ACTIVE)) {</div><div class='del'>-		r100_gpu_lockup_update(lockup, ring);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-	/* force CP activities */</div><div class='del'>-	r = radeon_ring_lock(rdev, ring, 2);</div><div class='del'>-	if (!r) {</div><div class='del'>-		/* PACKET2 NOP */</div><div class='del'>-		radeon_ring_write(ring, 0x80000000);</div><div class='del'>-		radeon_ring_write(ring, 0x80000000);</div><div class='del'>-		radeon_ring_unlock_commit(rdev, ring);</div><div class='del'>-	}</div><div class='del'>-	/* XXX deal with CP0,1,2 */</div><div class='del'>-	ring-&gt;rptr = RREG32(ring-&gt;rptr_reg);</div><div class='del'>-	return r100_gpu_cp_is_lockup(rdev, lockup, ring);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int cayman_gpu_soft_reset(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct evergreen_mc_save save;</div><div class='hunk'>@@ -1601,12 +1295,9 @@ static int cayman_startup(struct radeon_device *rdev)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("radeon: failed testing IB (%d).\n", r);</div><div class='del'>-		rdev-&gt;accel_working = false;</div><div class='add'>+	r = radeon_ib_ring_tests(rdev);</div><div class='add'>+	if (r)</div><div class='ctx'> 		return r;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	r = radeon_vm_manager_start(rdev);</div><div class='ctx'> 	if (r)</div><div class='hunk'>@@ -1661,10 +1352,6 @@ int cayman_init(struct radeon_device *rdev)</div><div class='ctx'> 	struct radeon_ring *ring = &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX];</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	/* This don't do much */</div><div class='del'>-	r = radeon_gem_init(rdev);</div><div class='del'>-	if (r)</div><div class='del'>-		return r;</div><div class='ctx'> 	/* Read BIOS */</div><div class='ctx'> 	if (!radeon_get_bios(rdev)) {</div><div class='ctx'> 		if (ASIC_IS_AVIVO(rdev))</div><div class='hunk'>@@ -1776,7 +1463,6 @@ void cayman_fini(struct radeon_device *rdev)</div><div class='ctx'> 	cayman_pcie_gart_fini(rdev);</div><div class='ctx'> 	r600_vram_scratch_fini(rdev);</div><div class='ctx'> 	radeon_gem_fini(rdev);</div><div class='del'>-	radeon_semaphore_driver_fini(rdev);</div><div class='ctx'> 	radeon_fence_driver_fini(rdev);</div><div class='ctx'> 	radeon_bo_fini(rdev);</div><div class='ctx'> 	radeon_atombios_fini(rdev);</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h<br/>index 2aa7046ada56..a0b98066e207 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/nid.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/nid.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/nid.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/nid.h</a></div><div class='hunk'>@@ -41,6 +41,9 @@</div><div class='ctx'> #define CAYMAN_MAX_TCC               16</div><div class='ctx'> #define CAYMAN_MAX_TCC_MASK          0xFF</div><div class='ctx'> </div><div class='add'>+#define CAYMAN_GB_ADDR_CONFIG_GOLDEN       0x02011003</div><div class='add'>+#define ARUBA_GB_ADDR_CONFIG_GOLDEN        0x12010001</div><div class='add'>+</div><div class='ctx'> #define DMIF_ADDR_CONFIG  				0xBD4</div><div class='ctx'> #define	SRBM_GFX_CNTL				        0x0E44</div><div class='ctx'> #define		RINGID(x)					(((x) &amp; 0x3) &lt;&lt; 0)</div><div class='hunk'>@@ -148,6 +151,8 @@</div><div class='ctx'> #define	CGTS_SYS_TCC_DISABLE				0x3F90</div><div class='ctx'> #define	CGTS_USER_SYS_TCC_DISABLE			0x3F94</div><div class='ctx'> </div><div class='add'>+#define RLC_GFX_INDEX           			0x3FC4</div><div class='add'>+</div><div class='ctx'> #define	CONFIG_MEMSIZE					0x5428</div><div class='ctx'> </div><div class='ctx'> #define HDP_MEM_COHERENCY_FLUSH_CNTL			0x5480</div><div class='hunk'>@@ -212,6 +217,12 @@</div><div class='ctx'> #define		SOFT_RESET_VGT					(1 &lt;&lt; 14)</div><div class='ctx'> #define		SOFT_RESET_IA					(1 &lt;&lt; 15)</div><div class='ctx'> </div><div class='add'>+#define GRBM_GFX_INDEX          			0x802C</div><div class='add'>+#define		INSTANCE_INDEX(x)			((x) &lt;&lt; 0)</div><div class='add'>+#define		SE_INDEX(x)     			((x) &lt;&lt; 16)</div><div class='add'>+#define		INSTANCE_BROADCAST_WRITES      		(1 &lt;&lt; 30)</div><div class='add'>+#define		SE_BROADCAST_WRITES      		(1 &lt;&lt; 31)</div><div class='add'>+</div><div class='ctx'> #define	SCRATCH_REG0					0x8500</div><div class='ctx'> #define	SCRATCH_REG1					0x8504</div><div class='ctx'> #define	SCRATCH_REG2					0x8508</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c<br/>index fe33d35dae8c..fb44e7e49083 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r100.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/r100.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r100.c</a></div><div class='hunk'>@@ -139,9 +139,9 @@ int r100_reloc_pitch_offset(struct radeon_cs_parser *p,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		tmp |= tile_flags;</div><div class='del'>-		p-&gt;ib-&gt;ptr[idx] = (value &amp; 0x3fc00000) | tmp;</div><div class='add'>+		p-&gt;ib.ptr[idx] = (value &amp; 0x3fc00000) | tmp;</div><div class='ctx'> 	} else</div><div class='del'>-		p-&gt;ib-&gt;ptr[idx] = (value &amp; 0xffc00000) | tmp;</div><div class='add'>+		p-&gt;ib.ptr[idx] = (value &amp; 0xffc00000) | tmp;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -156,7 +156,7 @@ int r100_packet3_load_vbpntr(struct radeon_cs_parser *p,</div><div class='ctx'> 	volatile uint32_t *ib;</div><div class='ctx'> 	u32 idx_value;</div><div class='ctx'> </div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> 	track = (struct r100_cs_track *)p-&gt;track;</div><div class='ctx'> 	c = radeon_get_ib_value(p, idx++) &amp; 0x1F;</div><div class='ctx'> 	if (c &gt; 16) {</div><div class='hunk'>@@ -660,7 +660,7 @@ int r100_pci_gart_enable(struct radeon_device *rdev)</div><div class='ctx'> 	tmp = RREG32(RADEON_AIC_CNTL) | RADEON_PCIGART_TRANSLATE_EN;</div><div class='ctx'> 	WREG32(RADEON_AIC_CNTL, tmp);</div><div class='ctx'> 	r100_pci_gart_tlb_flush(rdev);</div><div class='del'>-	DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",</div><div class='add'>+	DRM_INFO("PCI GART of %uM enabled (table at 0x%016llX).\n",</div><div class='ctx'> 		 (unsigned)(rdev-&gt;mc.gtt_size &gt;&gt; 20),</div><div class='ctx'> 		 (unsigned long long)rdev-&gt;gart.table_addr);</div><div class='ctx'> 	rdev-&gt;gart.ready = true;</div><div class='hunk'>@@ -1180,6 +1180,10 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size)</div><div class='ctx'> 	WREG32(RADEON_CP_RB_WPTR_DELAY, 0);</div><div class='ctx'> 	WREG32(RADEON_CP_CSQ_MODE, 0x00004D4D);</div><div class='ctx'> 	WREG32(RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIBM_INDBM);</div><div class='add'>+</div><div class='add'>+	/* at this point everything should be setup correctly to enable master */</div><div class='add'>+	pci_set_master(rdev-&gt;pdev);</div><div class='add'>+</div><div class='ctx'> 	radeon_ring_start(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='ctx'> 	r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, ring);</div><div class='ctx'> 	if (r) {</div><div class='hunk'>@@ -1271,7 +1275,7 @@ void r100_cs_dump_packet(struct radeon_cs_parser *p,</div><div class='ctx'> 	unsigned i;</div><div class='ctx'> 	unsigned idx;</div><div class='ctx'> </div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> 	idx = pkt-&gt;idx;</div><div class='ctx'> 	for (i = 0; i &lt;= (pkt-&gt;count + 1); i++, idx++) {</div><div class='ctx'> 		DRM_INFO("ib[%d]=0x%08X\n", idx, ib[idx]);</div><div class='hunk'>@@ -1350,7 +1354,7 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p)</div><div class='ctx'> 	uint32_t header, h_idx, reg;</div><div class='ctx'> 	volatile uint32_t *ib;</div><div class='ctx'> </div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> </div><div class='ctx'> 	/* parse the wait until */</div><div class='ctx'> 	r = r100_cs_packet_parse(p, &amp;waitreloc, p-&gt;idx);</div><div class='hunk'>@@ -1529,7 +1533,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p,</div><div class='ctx'> 	u32 tile_flags = 0;</div><div class='ctx'> 	u32 idx_value;</div><div class='ctx'> </div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> 	track = (struct r100_cs_track *)p-&gt;track;</div><div class='ctx'> </div><div class='ctx'> 	idx_value = radeon_get_ib_value(p, idx);</div><div class='hunk'>@@ -1885,7 +1889,7 @@ static int r100_packet3_check(struct radeon_cs_parser *p,</div><div class='ctx'> 	volatile uint32_t *ib;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> 	idx = pkt-&gt;idx + 1;</div><div class='ctx'> 	track = (struct r100_cs_track *)p-&gt;track;</div><div class='ctx'> 	switch (pkt-&gt;opcode) {</div><div class='hunk'>@@ -2004,6 +2008,8 @@ int r100_cs_parse(struct radeon_cs_parser *p)</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='ctx'> 	track = kzalloc(sizeof(*track), GFP_KERNEL);</div><div class='add'>+	if (!track)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	r100_cs_track_clear(p-&gt;rdev, track);</div><div class='ctx'> 	p-&gt;track = track;</div><div class='ctx'> 	do {</div><div class='hunk'>@@ -2155,79 +2161,18 @@ int r100_mc_wait_for_idle(struct radeon_device *rdev)</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void r100_gpu_lockup_update(struct r100_gpu_lockup *lockup, struct radeon_ring *ring)</div><div class='del'>-{</div><div class='del'>-	lockup-&gt;last_cp_rptr = ring-&gt;rptr;</div><div class='del'>-	lockup-&gt;last_jiffies = jiffies;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * r100_gpu_cp_is_lockup() - check if CP is lockup by recording information</div><div class='del'>- * @rdev:	radeon device structure</div><div class='del'>- * @lockup:	r100_gpu_lockup structure holding CP lockup tracking informations</div><div class='del'>- * @cp:		radeon_cp structure holding CP information</div><div class='del'>- *</div><div class='del'>- * We don't need to initialize the lockup tracking information as we will either</div><div class='del'>- * have CP rptr to a different value of jiffies wrap around which will force</div><div class='del'>- * initialization of the lockup tracking informations.</div><div class='del'>- *</div><div class='del'>- * A possible false positivie is if we get call after while and last_cp_rptr ==</div><div class='del'>- * the current CP rptr, even if it's unlikely it might happen. To avoid this</div><div class='del'>- * if the elapsed time since last call is bigger than 2 second than we return</div><div class='del'>- * false and update the tracking information. Due to this the caller must call</div><div class='del'>- * r100_gpu_cp_is_lockup several time in less than 2sec for lockup to be reported</div><div class='del'>- * the fencing code should be cautious about that.</div><div class='del'>- *</div><div class='del'>- * Caller should write to the ring to force CP to do something so we don't get</div><div class='del'>- * false positive when CP is just gived nothing to do.</div><div class='del'>- *</div><div class='del'>- **/</div><div class='del'>-bool r100_gpu_cp_is_lockup(struct radeon_device *rdev, struct r100_gpu_lockup *lockup, struct radeon_ring *ring)</div><div class='del'>-{</div><div class='del'>-	unsigned long cjiffies, elapsed;</div><div class='del'>-</div><div class='del'>-	cjiffies = jiffies;</div><div class='del'>-	if (!time_after(cjiffies, lockup-&gt;last_jiffies)) {</div><div class='del'>-		/* likely a wrap around */</div><div class='del'>-		lockup-&gt;last_cp_rptr = ring-&gt;rptr;</div><div class='del'>-		lockup-&gt;last_jiffies = jiffies;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-	if (ring-&gt;rptr != lockup-&gt;last_cp_rptr) {</div><div class='del'>-		/* CP is still working no lockup */</div><div class='del'>-		lockup-&gt;last_cp_rptr = ring-&gt;rptr;</div><div class='del'>-		lockup-&gt;last_jiffies = jiffies;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-	elapsed = jiffies_to_msecs(cjiffies - lockup-&gt;last_jiffies);</div><div class='del'>-	if (elapsed &gt;= 10000) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "GPU lockup CP stall for more than %lumsec\n", elapsed);</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-	/* give a chance to the GPU ... */</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	u32 rbbm_status;</div><div class='del'>-	int r;</div><div class='ctx'> </div><div class='ctx'> 	rbbm_status = RREG32(R_000E40_RBBM_STATUS);</div><div class='ctx'> 	if (!G_000E40_GUI_ACTIVE(rbbm_status)) {</div><div class='del'>-		r100_gpu_lockup_update(&amp;rdev-&gt;config.r100.lockup, ring);</div><div class='add'>+		radeon_ring_lockup_update(ring);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* force CP activities */</div><div class='del'>-	r = radeon_ring_lock(rdev, ring, 2);</div><div class='del'>-	if (!r) {</div><div class='del'>-		/* PACKET2 NOP */</div><div class='del'>-		radeon_ring_write(ring, 0x80000000);</div><div class='del'>-		radeon_ring_write(ring, 0x80000000);</div><div class='del'>-		radeon_ring_unlock_commit(rdev, ring);</div><div class='del'>-	}</div><div class='del'>-	ring-&gt;rptr = RREG32(ring-&gt;rptr_reg);</div><div class='del'>-	return r100_gpu_cp_is_lockup(rdev, &amp;rdev-&gt;config.r100.lockup, ring);</div><div class='add'>+	radeon_ring_force_activity(rdev, ring);</div><div class='add'>+	return radeon_ring_test_lockup(rdev, ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void r100_bm_disable(struct radeon_device *rdev)</div><div class='hunk'>@@ -2296,7 +2241,6 @@ int r100_asic_reset(struct radeon_device *rdev)</div><div class='ctx'> 	if (G_000E40_SE_BUSY(status) || G_000E40_RE_BUSY(status) ||</div><div class='ctx'> 		G_000E40_TAM_BUSY(status) || G_000E40_PB_BUSY(status)) {</div><div class='ctx'> 		dev_err(rdev-&gt;dev, "failed to reset GPU\n");</div><div class='del'>-		rdev-&gt;gpu_lockup = true;</div><div class='ctx'> 		ret = -1;</div><div class='ctx'> 	} else</div><div class='ctx'> 		dev_info(rdev-&gt;dev, "GPU reset succeed\n");</div><div class='hunk'>@@ -3742,7 +3686,7 @@ void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)</div><div class='ctx'> </div><div class='ctx'> int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> {</div><div class='del'>-	struct radeon_ib *ib;</div><div class='add'>+	struct radeon_ib ib;</div><div class='ctx'> 	uint32_t scratch;</div><div class='ctx'> 	uint32_t tmp = 0;</div><div class='ctx'> 	unsigned i;</div><div class='hunk'>@@ -3758,22 +3702,22 @@ int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='del'>-	ib-&gt;ptr[0] = PACKET0(scratch, 0);</div><div class='del'>-	ib-&gt;ptr[1] = 0xDEADBEEF;</div><div class='del'>-	ib-&gt;ptr[2] = PACKET2(0);</div><div class='del'>-	ib-&gt;ptr[3] = PACKET2(0);</div><div class='del'>-	ib-&gt;ptr[4] = PACKET2(0);</div><div class='del'>-	ib-&gt;ptr[5] = PACKET2(0);</div><div class='del'>-	ib-&gt;ptr[6] = PACKET2(0);</div><div class='del'>-	ib-&gt;ptr[7] = PACKET2(0);</div><div class='del'>-	ib-&gt;length_dw = 8;</div><div class='del'>-	r = radeon_ib_schedule(rdev, ib);</div><div class='add'>+	ib.ptr[0] = PACKET0(scratch, 0);</div><div class='add'>+	ib.ptr[1] = 0xDEADBEEF;</div><div class='add'>+	ib.ptr[2] = PACKET2(0);</div><div class='add'>+	ib.ptr[3] = PACKET2(0);</div><div class='add'>+	ib.ptr[4] = PACKET2(0);</div><div class='add'>+	ib.ptr[5] = PACKET2(0);</div><div class='add'>+	ib.ptr[6] = PACKET2(0);</div><div class='add'>+	ib.ptr[7] = PACKET2(0);</div><div class='add'>+	ib.length_dw = 8;</div><div class='add'>+	r = radeon_ib_schedule(rdev, &amp;ib);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		radeon_scratch_free(rdev, scratch);</div><div class='ctx'> 		radeon_ib_free(rdev, &amp;ib);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='del'>-	r = radeon_fence_wait(ib-&gt;fence, false);</div><div class='add'>+	r = radeon_fence_wait(ib.fence, false);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3965,12 +3909,9 @@ static int r100_startup(struct radeon_device *rdev)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed testing IB (%d).\n", r);</div><div class='del'>-		rdev-&gt;accel_working = false;</div><div class='add'>+	r = radeon_ib_ring_tests(rdev);</div><div class='add'>+	if (r)</div><div class='ctx'> 		return r;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c<br/>index a59cc474d537..a26144d01207 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r200.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/r200.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r200.c</a></div><div class='hunk'>@@ -154,7 +154,7 @@ int r200_packet0_check(struct radeon_cs_parser *p,</div><div class='ctx'> 	u32 tile_flags = 0;</div><div class='ctx'> 	u32 idx_value;</div><div class='ctx'> </div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> 	track = (struct r100_cs_track *)p-&gt;track;</div><div class='ctx'> 	idx_value = radeon_get_ib_value(p, idx);</div><div class='ctx'> 	switch (reg) {</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c<br/>index fa14383f9ca0..97722a33e513 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r300.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/r300.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r300.c</a></div><div class='hunk'>@@ -377,28 +377,6 @@ void r300_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		 rdev-&gt;num_gb_pipes, rdev-&gt;num_z_pipes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool r300_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='del'>-{</div><div class='del'>-	u32 rbbm_status;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	rbbm_status = RREG32(R_000E40_RBBM_STATUS);</div><div class='del'>-	if (!G_000E40_GUI_ACTIVE(rbbm_status)) {</div><div class='del'>-		r100_gpu_lockup_update(&amp;rdev-&gt;config.r300.lockup, ring);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-	/* force CP activities */</div><div class='del'>-	r = radeon_ring_lock(rdev, ring, 2);</div><div class='del'>-	if (!r) {</div><div class='del'>-		/* PACKET2 NOP */</div><div class='del'>-		radeon_ring_write(ring, 0x80000000);</div><div class='del'>-		radeon_ring_write(ring, 0x80000000);</div><div class='del'>-		radeon_ring_unlock_commit(rdev, ring);</div><div class='del'>-	}</div><div class='del'>-	ring-&gt;rptr = RREG32(RADEON_CP_RB_RPTR);</div><div class='del'>-	return r100_gpu_cp_is_lockup(rdev, &amp;rdev-&gt;config.r300.lockup, ring);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int r300_asic_reset(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct r100_mc_save save;</div><div class='hunk'>@@ -449,7 +427,6 @@ int r300_asic_reset(struct radeon_device *rdev)</div><div class='ctx'> 	/* Check if GPU is idle */</div><div class='ctx'> 	if (G_000E40_GA_BUSY(status) || G_000E40_VAP_BUSY(status)) {</div><div class='ctx'> 		dev_err(rdev-&gt;dev, "failed to reset GPU\n");</div><div class='del'>-		rdev-&gt;gpu_lockup = true;</div><div class='ctx'> 		ret = -1;</div><div class='ctx'> 	} else</div><div class='ctx'> 		dev_info(rdev-&gt;dev, "GPU reset succeed\n");</div><div class='hunk'>@@ -627,7 +604,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p,</div><div class='ctx'> 	int r;</div><div class='ctx'> 	u32 idx_value;</div><div class='ctx'> </div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> 	track = (struct r100_cs_track *)p-&gt;track;</div><div class='ctx'> 	idx_value = radeon_get_ib_value(p, idx);</div><div class='ctx'> </div><div class='hunk'>@@ -1169,7 +1146,7 @@ static int r300_packet3_check(struct radeon_cs_parser *p,</div><div class='ctx'> 	unsigned idx;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> 	idx = pkt-&gt;idx + 1;</div><div class='ctx'> 	track = (struct r100_cs_track *)p-&gt;track;</div><div class='ctx'> 	switch(pkt-&gt;opcode) {</div><div class='hunk'>@@ -1418,12 +1395,9 @@ static int r300_startup(struct radeon_device *rdev)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed testing IB (%d).\n", r);</div><div class='del'>-		rdev-&gt;accel_working = false;</div><div class='add'>+	r = radeon_ib_ring_tests(rdev);</div><div class='add'>+	if (r)</div><div class='ctx'> 		return r;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c<br/>index f3fcaacfea01..99137be7a300 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r420.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/r420.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r420.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r420.c</a></div><div class='hunk'>@@ -279,12 +279,9 @@ static int r420_startup(struct radeon_device *rdev)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed testing IB (%d).\n", r);</div><div class='del'>-		rdev-&gt;accel_working = false;</div><div class='add'>+	r = radeon_ib_ring_tests(rdev);</div><div class='add'>+	if (r)</div><div class='ctx'> 		return r;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c<br/>index ebcc15b03c9f..b5cf8375cd25 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r520.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/r520.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r520.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r520.c</a></div><div class='hunk'>@@ -207,12 +207,10 @@ static int r520_startup(struct radeon_device *rdev)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed testing IB (%d).\n", r);</div><div class='del'>-		rdev-&gt;accel_working = false;</div><div class='add'>+	r = radeon_ib_ring_tests(rdev);</div><div class='add'>+	if (r)</div><div class='ctx'> 		return r;</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c<br/>index c8187c4b6ae8..f30dc95f83b1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/r600.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600.c</a></div><div class='hunk'>@@ -713,6 +713,14 @@ void r600_hpd_init(struct radeon_device *rdev)</div><div class='ctx'> 	list_for_each_entry(connector, &amp;dev-&gt;mode_config.connector_list, head) {</div><div class='ctx'> 		struct radeon_connector *radeon_connector = to_radeon_connector(connector);</div><div class='ctx'> </div><div class='add'>+		if (connector-&gt;connector_type == DRM_MODE_CONNECTOR_eDP ||</div><div class='add'>+		    connector-&gt;connector_type == DRM_MODE_CONNECTOR_LVDS) {</div><div class='add'>+			/* don't try to enable hpd on eDP or LVDS avoid breaking the</div><div class='add'>+			 * aux dp channel on imac and help (but not completely fix)</div><div class='add'>+			 * https://bugzilla.redhat.com/show_bug.cgi?id=726143</div><div class='add'>+			 */</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='ctx'> 		if (ASIC_IS_DCE3(rdev)) {</div><div class='ctx'> 			u32 tmp = DC_HPDx_CONNECTION_TIMER(0x9c4) | DC_HPDx_RX_INT_TIMER(0xfa);</div><div class='ctx'> 			if (ASIC_IS_DCE32(rdev))</div><div class='hunk'>@@ -1223,7 +1231,7 @@ int r600_vram_scratch_init(struct radeon_device *rdev)</div><div class='ctx'> 	if (rdev-&gt;vram_scratch.robj == NULL) {</div><div class='ctx'> 		r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE,</div><div class='ctx'> 				     PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,</div><div class='del'>-				     &amp;rdev-&gt;vram_scratch.robj);</div><div class='add'>+				     NULL, &amp;rdev-&gt;vram_scratch.robj);</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1350,31 +1358,17 @@ bool r600_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> 	u32 srbm_status;</div><div class='ctx'> 	u32 grbm_status;</div><div class='ctx'> 	u32 grbm_status2;</div><div class='del'>-	struct r100_gpu_lockup *lockup;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	if (rdev-&gt;family &gt;= CHIP_RV770)</div><div class='del'>-		lockup = &amp;rdev-&gt;config.rv770.lockup;</div><div class='del'>-	else</div><div class='del'>-		lockup = &amp;rdev-&gt;config.r600.lockup;</div><div class='ctx'> </div><div class='ctx'> 	srbm_status = RREG32(R_000E50_SRBM_STATUS);</div><div class='ctx'> 	grbm_status = RREG32(R_008010_GRBM_STATUS);</div><div class='ctx'> 	grbm_status2 = RREG32(R_008014_GRBM_STATUS2);</div><div class='ctx'> 	if (!G_008010_GUI_ACTIVE(grbm_status)) {</div><div class='del'>-		r100_gpu_lockup_update(lockup, ring);</div><div class='add'>+		radeon_ring_lockup_update(ring);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* force CP activities */</div><div class='del'>-	r = radeon_ring_lock(rdev, ring, 2);</div><div class='del'>-	if (!r) {</div><div class='del'>-		/* PACKET2 NOP */</div><div class='del'>-		radeon_ring_write(ring, 0x80000000);</div><div class='del'>-		radeon_ring_write(ring, 0x80000000);</div><div class='del'>-		radeon_ring_unlock_commit(rdev, ring);</div><div class='del'>-	}</div><div class='del'>-	ring-&gt;rptr = RREG32(ring-&gt;rptr_reg);</div><div class='del'>-	return r100_gpu_cp_is_lockup(rdev, lockup, ring);</div><div class='add'>+	radeon_ring_force_activity(rdev, ring);</div><div class='add'>+	return radeon_ring_test_lockup(rdev, ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int r600_asic_reset(struct radeon_device *rdev)</div><div class='hunk'>@@ -1382,113 +1376,51 @@ int r600_asic_reset(struct radeon_device *rdev)</div><div class='ctx'> 	return r600_gpu_soft_reset(rdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 r600_get_tile_pipe_to_backend_map(u32 num_tile_pipes,</div><div class='del'>-					     u32 num_backends,</div><div class='del'>-					     u32 backend_disable_mask)</div><div class='add'>+u32 r6xx_remap_render_backend(struct radeon_device *rdev,</div><div class='add'>+			      u32 tiling_pipe_num,</div><div class='add'>+			      u32 max_rb_num,</div><div class='add'>+			      u32 total_max_rb_num,</div><div class='add'>+			      u32 disabled_rb_mask)</div><div class='ctx'> {</div><div class='del'>-	u32 backend_map = 0;</div><div class='del'>-	u32 enabled_backends_mask;</div><div class='del'>-	u32 enabled_backends_count;</div><div class='del'>-	u32 cur_pipe;</div><div class='del'>-	u32 swizzle_pipe[R6XX_MAX_PIPES];</div><div class='del'>-	u32 cur_backend;</div><div class='del'>-	u32 i;</div><div class='add'>+	u32 rendering_pipe_num, rb_num_width, req_rb_num;</div><div class='add'>+	u32 pipe_rb_ratio, pipe_rb_remain;</div><div class='add'>+	u32 data = 0, mask = 1 &lt;&lt; (max_rb_num - 1);</div><div class='add'>+	unsigned i, j;</div><div class='ctx'> </div><div class='del'>-	if (num_tile_pipes &gt; R6XX_MAX_PIPES)</div><div class='del'>-		num_tile_pipes = R6XX_MAX_PIPES;</div><div class='del'>-	if (num_tile_pipes &lt; 1)</div><div class='del'>-		num_tile_pipes = 1;</div><div class='del'>-	if (num_backends &gt; R6XX_MAX_BACKENDS)</div><div class='del'>-		num_backends = R6XX_MAX_BACKENDS;</div><div class='del'>-	if (num_backends &lt; 1)</div><div class='del'>-		num_backends = 1;</div><div class='del'>-</div><div class='del'>-	enabled_backends_mask = 0;</div><div class='del'>-	enabled_backends_count = 0;</div><div class='del'>-	for (i = 0; i &lt; R6XX_MAX_BACKENDS; ++i) {</div><div class='del'>-		if (((backend_disable_mask &gt;&gt; i) &amp; 1) == 0) {</div><div class='del'>-			enabled_backends_mask |= (1 &lt;&lt; i);</div><div class='del'>-			++enabled_backends_count;</div><div class='del'>-		}</div><div class='del'>-		if (enabled_backends_count == num_backends)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='add'>+	/* mask out the RBs that don't exist on that asic */</div><div class='add'>+	disabled_rb_mask |= (0xff &lt;&lt; max_rb_num) &amp; 0xff;</div><div class='ctx'> </div><div class='del'>-	if (enabled_backends_count == 0) {</div><div class='del'>-		enabled_backends_mask = 1;</div><div class='del'>-		enabled_backends_count = 1;</div><div class='del'>-	}</div><div class='add'>+	rendering_pipe_num = 1 &lt;&lt; tiling_pipe_num;</div><div class='add'>+	req_rb_num = total_max_rb_num - r600_count_pipe_bits(disabled_rb_mask);</div><div class='add'>+	BUG_ON(rendering_pipe_num &lt; req_rb_num);</div><div class='ctx'> </div><div class='del'>-	if (enabled_backends_count != num_backends)</div><div class='del'>-		num_backends = enabled_backends_count;</div><div class='add'>+	pipe_rb_ratio = rendering_pipe_num / req_rb_num;</div><div class='add'>+	pipe_rb_remain = rendering_pipe_num - pipe_rb_ratio * req_rb_num;</div><div class='ctx'> </div><div class='del'>-	memset((uint8_t *)&amp;swizzle_pipe[0], 0, sizeof(u32) * R6XX_MAX_PIPES);</div><div class='del'>-	switch (num_tile_pipes) {</div><div class='del'>-	case 1:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		swizzle_pipe[1] = 1;</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		swizzle_pipe[1] = 1;</div><div class='del'>-		swizzle_pipe[2] = 2;</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		swizzle_pipe[1] = 1;</div><div class='del'>-		swizzle_pipe[2] = 2;</div><div class='del'>-		swizzle_pipe[3] = 3;</div><div class='del'>-		break;</div><div class='del'>-	case 5:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		swizzle_pipe[1] = 1;</div><div class='del'>-		swizzle_pipe[2] = 2;</div><div class='del'>-		swizzle_pipe[3] = 3;</div><div class='del'>-		swizzle_pipe[4] = 4;</div><div class='del'>-		break;</div><div class='del'>-	case 6:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		swizzle_pipe[1] = 2;</div><div class='del'>-		swizzle_pipe[2] = 4;</div><div class='del'>-		swizzle_pipe[3] = 5;</div><div class='del'>-		swizzle_pipe[4] = 1;</div><div class='del'>-		swizzle_pipe[5] = 3;</div><div class='del'>-		break;</div><div class='del'>-	case 7:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		swizzle_pipe[1] = 2;</div><div class='del'>-		swizzle_pipe[2] = 4;</div><div class='del'>-		swizzle_pipe[3] = 6;</div><div class='del'>-		swizzle_pipe[4] = 1;</div><div class='del'>-		swizzle_pipe[5] = 3;</div><div class='del'>-		swizzle_pipe[6] = 5;</div><div class='del'>-		break;</div><div class='del'>-	case 8:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		swizzle_pipe[1] = 2;</div><div class='del'>-		swizzle_pipe[2] = 4;</div><div class='del'>-		swizzle_pipe[3] = 6;</div><div class='del'>-		swizzle_pipe[4] = 1;</div><div class='del'>-		swizzle_pipe[5] = 3;</div><div class='del'>-		swizzle_pipe[6] = 5;</div><div class='del'>-		swizzle_pipe[7] = 7;</div><div class='del'>-		break;</div><div class='add'>+	if (rdev-&gt;family &lt;= CHIP_RV740) {</div><div class='add'>+		/* r6xx/r7xx */</div><div class='add'>+		rb_num_width = 2;</div><div class='add'>+	} else {</div><div class='add'>+		/* eg+ */</div><div class='add'>+		rb_num_width = 4;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cur_backend = 0;</div><div class='del'>-	for (cur_pipe = 0; cur_pipe &lt; num_tile_pipes; ++cur_pipe) {</div><div class='del'>-		while (((1 &lt;&lt; cur_backend) &amp; enabled_backends_mask) == 0)</div><div class='del'>-			cur_backend = (cur_backend + 1) % R6XX_MAX_BACKENDS;</div><div class='del'>-</div><div class='del'>-		backend_map |= (u32)(((cur_backend &amp; 3) &lt;&lt; (swizzle_pipe[cur_pipe] * 2)));</div><div class='del'>-</div><div class='del'>-		cur_backend = (cur_backend + 1) % R6XX_MAX_BACKENDS;</div><div class='add'>+	for (i = 0; i &lt; max_rb_num; i++) {</div><div class='add'>+		if (!(mask &amp; disabled_rb_mask)) {</div><div class='add'>+			for (j = 0; j &lt; pipe_rb_ratio; j++) {</div><div class='add'>+				data &lt;&lt;= rb_num_width;</div><div class='add'>+				data |= max_rb_num - i - 1;</div><div class='add'>+			}</div><div class='add'>+			if (pipe_rb_remain) {</div><div class='add'>+				data &lt;&lt;= rb_num_width;</div><div class='add'>+				data |= max_rb_num - i - 1;</div><div class='add'>+				pipe_rb_remain--;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		mask &gt;&gt;= 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return backend_map;</div><div class='add'>+	return data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int r600_count_pipe_bits(uint32_t val)</div><div class='hunk'>@@ -1506,7 +1438,6 @@ void r600_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tiling_config;</div><div class='ctx'> 	u32 ramcfg;</div><div class='del'>-	u32 backend_map;</div><div class='ctx'> 	u32 cc_rb_backend_disable;</div><div class='ctx'> 	u32 cc_gc_shader_pipe_config;</div><div class='ctx'> 	u32 tmp;</div><div class='hunk'>@@ -1517,8 +1448,9 @@ void r600_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	u32 sq_thread_resource_mgmt = 0;</div><div class='ctx'> 	u32 sq_stack_resource_mgmt_1 = 0;</div><div class='ctx'> 	u32 sq_stack_resource_mgmt_2 = 0;</div><div class='add'>+	u32 disabled_rb_mask;</div><div class='ctx'> </div><div class='del'>-	/* FIXME: implement */</div><div class='add'>+	rdev-&gt;config.r600.tiling_group_size = 256;</div><div class='ctx'> 	switch (rdev-&gt;family) {</div><div class='ctx'> 	case CHIP_R600:</div><div class='ctx'> 		rdev-&gt;config.r600.max_pipes = 4;</div><div class='hunk'>@@ -1622,10 +1554,7 @@ void r600_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	rdev-&gt;config.r600.tiling_nbanks = 4 &lt;&lt; ((ramcfg &amp; NOOFBANK_MASK) &gt;&gt; NOOFBANK_SHIFT);</div><div class='ctx'> 	tiling_config |= BANK_TILING((ramcfg &amp; NOOFBANK_MASK) &gt;&gt; NOOFBANK_SHIFT);</div><div class='ctx'> 	tiling_config |= GROUP_SIZE((ramcfg &amp; BURSTLENGTH_MASK) &gt;&gt; BURSTLENGTH_SHIFT);</div><div class='del'>-	if ((ramcfg &amp; BURSTLENGTH_MASK) &gt;&gt; BURSTLENGTH_SHIFT)</div><div class='del'>-		rdev-&gt;config.r600.tiling_group_size = 512;</div><div class='del'>-	else</div><div class='del'>-		rdev-&gt;config.r600.tiling_group_size = 256;</div><div class='add'>+</div><div class='ctx'> 	tmp = (ramcfg &amp; NOOFROWS_MASK) &gt;&gt; NOOFROWS_SHIFT;</div><div class='ctx'> 	if (tmp &gt; 3) {</div><div class='ctx'> 		tiling_config |= ROW_TILING(3);</div><div class='hunk'>@@ -1637,32 +1566,36 @@ void r600_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	tiling_config |= BANK_SWAPS(1);</div><div class='ctx'> </div><div class='ctx'> 	cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE) &amp; 0x00ff0000;</div><div class='del'>-	cc_rb_backend_disable |=</div><div class='del'>-		BACKEND_DISABLE((R6XX_MAX_BACKENDS_MASK &lt;&lt; rdev-&gt;config.r600.max_backends) &amp; R6XX_MAX_BACKENDS_MASK);</div><div class='del'>-</div><div class='del'>-	cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) &amp; 0xffffff00;</div><div class='del'>-	cc_gc_shader_pipe_config |=</div><div class='del'>-		INACTIVE_QD_PIPES((R6XX_MAX_PIPES_MASK &lt;&lt; rdev-&gt;config.r600.max_pipes) &amp; R6XX_MAX_PIPES_MASK);</div><div class='del'>-	cc_gc_shader_pipe_config |=</div><div class='del'>-		INACTIVE_SIMDS((R6XX_MAX_SIMDS_MASK &lt;&lt; rdev-&gt;config.r600.max_simds) &amp; R6XX_MAX_SIMDS_MASK);</div><div class='del'>-</div><div class='del'>-	backend_map = r600_get_tile_pipe_to_backend_map(rdev-&gt;config.r600.max_tile_pipes,</div><div class='del'>-							(R6XX_MAX_BACKENDS -</div><div class='del'>-							 r600_count_pipe_bits((cc_rb_backend_disable &amp;</div><div class='del'>-									       R6XX_MAX_BACKENDS_MASK) &gt;&gt; 16)),</div><div class='del'>-							(cc_rb_backend_disable &gt;&gt; 16));</div><div class='add'>+	tmp = R6XX_MAX_BACKENDS -</div><div class='add'>+		r600_count_pipe_bits((cc_rb_backend_disable &gt;&gt; 16) &amp; R6XX_MAX_BACKENDS_MASK);</div><div class='add'>+	if (tmp &lt; rdev-&gt;config.r600.max_backends) {</div><div class='add'>+		rdev-&gt;config.r600.max_backends = tmp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) &amp; 0x00ffff00;</div><div class='add'>+	tmp = R6XX_MAX_PIPES -</div><div class='add'>+		r600_count_pipe_bits((cc_gc_shader_pipe_config &gt;&gt; 8) &amp; R6XX_MAX_PIPES_MASK);</div><div class='add'>+	if (tmp &lt; rdev-&gt;config.r600.max_pipes) {</div><div class='add'>+		rdev-&gt;config.r600.max_pipes = tmp;</div><div class='add'>+	}</div><div class='add'>+	tmp = R6XX_MAX_SIMDS -</div><div class='add'>+		r600_count_pipe_bits((cc_gc_shader_pipe_config &gt;&gt; 16) &amp; R6XX_MAX_SIMDS_MASK);</div><div class='add'>+	if (tmp &lt; rdev-&gt;config.r600.max_simds) {</div><div class='add'>+		rdev-&gt;config.r600.max_simds = tmp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	disabled_rb_mask = (RREG32(CC_RB_BACKEND_DISABLE) &gt;&gt; 16) &amp; R6XX_MAX_BACKENDS_MASK;</div><div class='add'>+	tmp = (tiling_config &amp; PIPE_TILING__MASK) &gt;&gt; PIPE_TILING__SHIFT;</div><div class='add'>+	tmp = r6xx_remap_render_backend(rdev, tmp, rdev-&gt;config.r600.max_backends,</div><div class='add'>+					R6XX_MAX_BACKENDS, disabled_rb_mask);</div><div class='add'>+	tiling_config |= tmp &lt;&lt; 16;</div><div class='add'>+	rdev-&gt;config.r600.backend_map = tmp;</div><div class='add'>+</div><div class='ctx'> 	rdev-&gt;config.r600.tile_config = tiling_config;</div><div class='del'>-	rdev-&gt;config.r600.backend_map = backend_map;</div><div class='del'>-	tiling_config |= BACKEND_MAP(backend_map);</div><div class='ctx'> 	WREG32(GB_TILING_CONFIG, tiling_config);</div><div class='ctx'> 	WREG32(DCP_TILING_CONFIG, tiling_config &amp; 0xffff);</div><div class='ctx'> 	WREG32(HDP_TILING_CONFIG, tiling_config &amp; 0xffff);</div><div class='ctx'> </div><div class='del'>-	/* Setup pipes */</div><div class='del'>-	WREG32(CC_RB_BACKEND_DISABLE, cc_rb_backend_disable);</div><div class='del'>-	WREG32(CC_GC_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);</div><div class='del'>-	WREG32(GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);</div><div class='del'>-</div><div class='ctx'> 	tmp = R6XX_MAX_PIPES - r600_count_pipe_bits((cc_gc_shader_pipe_config &amp; INACTIVE_QD_PIPES_MASK) &gt;&gt; 8);</div><div class='ctx'> 	WREG32(VGT_OUT_DEALLOC_CNTL, (tmp * 4) &amp; DEALLOC_DIST_MASK);</div><div class='ctx'> 	WREG32(VGT_VERTEX_REUSE_BLOCK_CNTL, ((tmp * 4) - 2) &amp; VTX_REUSE_DEPTH_MASK);</div><div class='hunk'>@@ -2377,20 +2310,15 @@ int r600_copy_blit(struct radeon_device *rdev,</div><div class='ctx'> 		   unsigned num_gpu_pages,</div><div class='ctx'> 		   struct radeon_fence *fence)</div><div class='ctx'> {</div><div class='add'>+	struct radeon_sa_bo *vb = NULL;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;rdev-&gt;r600_blit.mutex);</div><div class='del'>-	rdev-&gt;r600_blit.vb_ib = NULL;</div><div class='del'>-	r = r600_blit_prepare_copy(rdev, num_gpu_pages);</div><div class='add'>+	r = r600_blit_prepare_copy(rdev, num_gpu_pages, &amp;vb);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		if (rdev-&gt;r600_blit.vb_ib)</div><div class='del'>-			radeon_ib_free(rdev, &amp;rdev-&gt;r600_blit.vb_ib);</div><div class='del'>-		mutex_unlock(&amp;rdev-&gt;r600_blit.mutex);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='del'>-	r600_kms_blit_copy(rdev, src_offset, dst_offset, num_gpu_pages);</div><div class='del'>-	r600_blit_done_copy(rdev, fence);</div><div class='del'>-	mutex_unlock(&amp;rdev-&gt;r600_blit.mutex);</div><div class='add'>+	r600_kms_blit_copy(rdev, src_offset, dst_offset, num_gpu_pages, vb);</div><div class='add'>+	r600_blit_done_copy(rdev, fence, vb);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2494,10 +2422,13 @@ int r600_startup(struct radeon_device *rdev)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='add'>+	r = radeon_ib_ring_tests(rdev);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	r = r600_audio_init(rdev);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		DRM_ERROR("radeon: failed testing IB (%d).\n", r);</div><div class='del'>-		rdev-&gt;accel_working = false;</div><div class='add'>+		DRM_ERROR("radeon: audio init failed\n");</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2537,12 +2468,6 @@ int r600_resume(struct radeon_device *rdev)</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	r = r600_audio_init(rdev);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("radeon: audio resume failed\n");</div><div class='del'>-		return r;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2574,10 +2499,6 @@ int r600_init(struct radeon_device *rdev)</div><div class='ctx'> 	if (r600_debugfs_mc_info_init(rdev)) {</div><div class='ctx'> 		DRM_ERROR("Failed to register debugfs file for mc !\n");</div><div class='ctx'> 	}</div><div class='del'>-	/* This don't do much */</div><div class='del'>-	r = radeon_gem_init(rdev);</div><div class='del'>-	if (r)</div><div class='del'>-		return r;</div><div class='ctx'> 	/* Read BIOS */</div><div class='ctx'> 	if (!radeon_get_bios(rdev)) {</div><div class='ctx'> 		if (ASIC_IS_AVIVO(rdev))</div><div class='hunk'>@@ -2656,9 +2577,6 @@ int r600_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;accel_working = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	r = r600_audio_init(rdev);</div><div class='del'>-	if (r)</div><div class='del'>-		return r; /* TODO error handling */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2675,7 +2593,6 @@ void r600_fini(struct radeon_device *rdev)</div><div class='ctx'> 	r600_vram_scratch_fini(rdev);</div><div class='ctx'> 	radeon_agp_fini(rdev);</div><div class='ctx'> 	radeon_gem_fini(rdev);</div><div class='del'>-	radeon_semaphore_driver_fini(rdev);</div><div class='ctx'> 	radeon_fence_driver_fini(rdev);</div><div class='ctx'> 	radeon_bo_fini(rdev);</div><div class='ctx'> 	radeon_atombios_fini(rdev);</div><div class='hunk'>@@ -2704,7 +2621,7 @@ void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)</div><div class='ctx'> </div><div class='ctx'> int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> {</div><div class='del'>-	struct radeon_ib *ib;</div><div class='add'>+	struct radeon_ib ib;</div><div class='ctx'> 	uint32_t scratch;</div><div class='ctx'> 	uint32_t tmp = 0;</div><div class='ctx'> 	unsigned i;</div><div class='hunk'>@@ -2722,18 +2639,18 @@ int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> 		DRM_ERROR("radeon: failed to get ib (%d).\n", r);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='del'>-	ib-&gt;ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);</div><div class='del'>-	ib-&gt;ptr[1] = ((scratch - PACKET3_SET_CONFIG_REG_OFFSET) &gt;&gt; 2);</div><div class='del'>-	ib-&gt;ptr[2] = 0xDEADBEEF;</div><div class='del'>-	ib-&gt;length_dw = 3;</div><div class='del'>-	r = radeon_ib_schedule(rdev, ib);</div><div class='add'>+	ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);</div><div class='add'>+	ib.ptr[1] = ((scratch - PACKET3_SET_CONFIG_REG_OFFSET) &gt;&gt; 2);</div><div class='add'>+	ib.ptr[2] = 0xDEADBEEF;</div><div class='add'>+	ib.length_dw = 3;</div><div class='add'>+	r = radeon_ib_schedule(rdev, &amp;ib);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		radeon_scratch_free(rdev, scratch);</div><div class='ctx'> 		radeon_ib_free(rdev, &amp;ib);</div><div class='ctx'> 		DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='del'>-	r = radeon_fence_wait(ib-&gt;fence, false);</div><div class='add'>+	r = radeon_fence_wait(ib.fence, false);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("radeon: fence wait failed (%d).\n", r);</div><div class='ctx'> 		return r;</div><div class='hunk'>@@ -2745,7 +2662,7 @@ int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> 		DRM_UDELAY(1);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (i &lt; rdev-&gt;usec_timeout) {</div><div class='del'>-		DRM_INFO("ib test on ring %d succeeded in %u usecs\n", ib-&gt;fence-&gt;ring, i);</div><div class='add'>+		DRM_INFO("ib test on ring %d succeeded in %u usecs\n", ib.fence-&gt;ring, i);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		DRM_ERROR("radeon: ib test failed (scratch(0x%04X)=0x%08X)\n",</div><div class='ctx'> 			  scratch, tmp);</div><div class='hunk'>@@ -2788,7 +2705,7 @@ int r600_ih_ring_alloc(struct radeon_device *rdev)</div><div class='ctx'> 		r = radeon_bo_create(rdev, rdev-&gt;ih.ring_size,</div><div class='ctx'> 				     PAGE_SIZE, true,</div><div class='ctx'> 				     RADEON_GEM_DOMAIN_GTT,</div><div class='del'>-				     &amp;rdev-&gt;ih.ring_obj);</div><div class='add'>+				     NULL, &amp;rdev-&gt;ih.ring_obj);</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			DRM_ERROR("radeon: failed to create ih ring buffer (%d).\n", r);</div><div class='ctx'> 			return r;</div><div class='hunk'>@@ -2968,6 +2885,15 @@ static void r600_disable_interrupt_state(struct radeon_device *rdev)</div><div class='ctx'> 			WREG32(DC_HPD5_INT_CONTROL, tmp);</div><div class='ctx'> 			tmp = RREG32(DC_HPD6_INT_CONTROL) &amp; DC_HPDx_INT_POLARITY;</div><div class='ctx'> 			WREG32(DC_HPD6_INT_CONTROL, tmp);</div><div class='add'>+			tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0) &amp; ~HDMI0_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+			WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, tmp);</div><div class='add'>+			tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1) &amp; ~HDMI0_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+			WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, tmp);</div><div class='add'>+		} else {</div><div class='add'>+			tmp = RREG32(HDMI0_AUDIO_PACKET_CONTROL) &amp; ~HDMI0_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+			WREG32(HDMI0_AUDIO_PACKET_CONTROL, tmp);</div><div class='add'>+			tmp = RREG32(DCE3_HDMI1_AUDIO_PACKET_CONTROL) &amp; ~HDMI0_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+			WREG32(DCE3_HDMI1_AUDIO_PACKET_CONTROL, tmp);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		WREG32(DACA_AUTODETECT_INT_CONTROL, 0);</div><div class='hunk'>@@ -2978,6 +2904,10 @@ static void r600_disable_interrupt_state(struct radeon_device *rdev)</div><div class='ctx'> 		WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, tmp);</div><div class='ctx'> 		tmp = RREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL) &amp; DC_HOT_PLUG_DETECTx_INT_POLARITY;</div><div class='ctx'> 		WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, tmp);</div><div class='add'>+		tmp = RREG32(HDMI0_AUDIO_PACKET_CONTROL) &amp; ~HDMI0_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+		WREG32(HDMI0_AUDIO_PACKET_CONTROL, tmp);</div><div class='add'>+		tmp = RREG32(HDMI1_AUDIO_PACKET_CONTROL) &amp; ~HDMI0_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+		WREG32(HDMI1_AUDIO_PACKET_CONTROL, tmp);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3047,6 +2977,9 @@ int r600_irq_init(struct radeon_device *rdev)</div><div class='ctx'> 	else</div><div class='ctx'> 		r600_disable_interrupt_state(rdev);</div><div class='ctx'> </div><div class='add'>+	/* at this point everything should be setup correctly to enable master */</div><div class='add'>+	pci_set_master(rdev-&gt;pdev);</div><div class='add'>+</div><div class='ctx'> 	/* enable irqs */</div><div class='ctx'> 	r600_enable_interrupts(rdev);</div><div class='ctx'> </div><div class='hunk'>@@ -3071,7 +3004,7 @@ int r600_irq_set(struct radeon_device *rdev)</div><div class='ctx'> 	u32 mode_int = 0;</div><div class='ctx'> 	u32 hpd1, hpd2, hpd3, hpd4 = 0, hpd5 = 0, hpd6 = 0;</div><div class='ctx'> 	u32 grbm_int_cntl = 0;</div><div class='del'>-	u32 hdmi1, hdmi2;</div><div class='add'>+	u32 hdmi0, hdmi1;</div><div class='ctx'> 	u32 d1grph = 0, d2grph = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!rdev-&gt;irq.installed) {</div><div class='hunk'>@@ -3086,9 +3019,7 @@ int r600_irq_set(struct radeon_device *rdev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hdmi1 = RREG32(R600_HDMI_BLOCK1 + R600_HDMI_CNTL) &amp; ~R600_HDMI_INT_EN;</div><div class='ctx'> 	if (ASIC_IS_DCE3(rdev)) {</div><div class='del'>-		hdmi2 = RREG32(R600_HDMI_BLOCK3 + R600_HDMI_CNTL) &amp; ~R600_HDMI_INT_EN;</div><div class='ctx'> 		hpd1 = RREG32(DC_HPD1_INT_CONTROL) &amp; ~DC_HPDx_INT_EN;</div><div class='ctx'> 		hpd2 = RREG32(DC_HPD2_INT_CONTROL) &amp; ~DC_HPDx_INT_EN;</div><div class='ctx'> 		hpd3 = RREG32(DC_HPD3_INT_CONTROL) &amp; ~DC_HPDx_INT_EN;</div><div class='hunk'>@@ -3096,12 +3027,18 @@ int r600_irq_set(struct radeon_device *rdev)</div><div class='ctx'> 		if (ASIC_IS_DCE32(rdev)) {</div><div class='ctx'> 			hpd5 = RREG32(DC_HPD5_INT_CONTROL) &amp; ~DC_HPDx_INT_EN;</div><div class='ctx'> 			hpd6 = RREG32(DC_HPD6_INT_CONTROL) &amp; ~DC_HPDx_INT_EN;</div><div class='add'>+			hdmi0 = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0) &amp; ~AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+			hdmi1 = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1) &amp; ~AFMT_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+		} else {</div><div class='add'>+			hdmi0 = RREG32(HDMI0_AUDIO_PACKET_CONTROL) &amp; ~HDMI0_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+			hdmi1 = RREG32(DCE3_HDMI1_AUDIO_PACKET_CONTROL) &amp; ~HDMI0_AZ_FORMAT_WTRIG_MASK;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		hdmi2 = RREG32(R600_HDMI_BLOCK2 + R600_HDMI_CNTL) &amp; ~R600_HDMI_INT_EN;</div><div class='ctx'> 		hpd1 = RREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL) &amp; ~DC_HPDx_INT_EN;</div><div class='ctx'> 		hpd2 = RREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL) &amp; ~DC_HPDx_INT_EN;</div><div class='ctx'> 		hpd3 = RREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL) &amp; ~DC_HPDx_INT_EN;</div><div class='add'>+		hdmi0 = RREG32(HDMI0_AUDIO_PACKET_CONTROL) &amp; ~HDMI0_AZ_FORMAT_WTRIG_MASK;</div><div class='add'>+		hdmi1 = RREG32(HDMI1_AUDIO_PACKET_CONTROL) &amp; ~HDMI0_AZ_FORMAT_WTRIG_MASK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rdev-&gt;irq.sw_int[RADEON_RING_TYPE_GFX_INDEX]) {</div><div class='hunk'>@@ -3143,13 +3080,13 @@ int r600_irq_set(struct radeon_device *rdev)</div><div class='ctx'> 		DRM_DEBUG("r600_irq_set: hpd 6\n");</div><div class='ctx'> 		hpd6 |= DC_HPDx_INT_EN;</div><div class='ctx'> 	}</div><div class='del'>-	if (rdev-&gt;irq.hdmi[0]) {</div><div class='del'>-		DRM_DEBUG("r600_irq_set: hdmi 1\n");</div><div class='del'>-		hdmi1 |= R600_HDMI_INT_EN;</div><div class='add'>+	if (rdev-&gt;irq.afmt[0]) {</div><div class='add'>+		DRM_DEBUG("r600_irq_set: hdmi 0\n");</div><div class='add'>+		hdmi0 |= HDMI0_AZ_FORMAT_WTRIG_MASK;</div><div class='ctx'> 	}</div><div class='del'>-	if (rdev-&gt;irq.hdmi[1]) {</div><div class='del'>-		DRM_DEBUG("r600_irq_set: hdmi 2\n");</div><div class='del'>-		hdmi2 |= R600_HDMI_INT_EN;</div><div class='add'>+	if (rdev-&gt;irq.afmt[1]) {</div><div class='add'>+		DRM_DEBUG("r600_irq_set: hdmi 0\n");</div><div class='add'>+		hdmi1 |= HDMI0_AZ_FORMAT_WTRIG_MASK;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (rdev-&gt;irq.gui_idle) {</div><div class='ctx'> 		DRM_DEBUG("gui idle\n");</div><div class='hunk'>@@ -3161,9 +3098,7 @@ int r600_irq_set(struct radeon_device *rdev)</div><div class='ctx'> 	WREG32(D1GRPH_INTERRUPT_CONTROL, d1grph);</div><div class='ctx'> 	WREG32(D2GRPH_INTERRUPT_CONTROL, d2grph);</div><div class='ctx'> 	WREG32(GRBM_INT_CNTL, grbm_int_cntl);</div><div class='del'>-	WREG32(R600_HDMI_BLOCK1 + R600_HDMI_CNTL, hdmi1);</div><div class='ctx'> 	if (ASIC_IS_DCE3(rdev)) {</div><div class='del'>-		WREG32(R600_HDMI_BLOCK3 + R600_HDMI_CNTL, hdmi2);</div><div class='ctx'> 		WREG32(DC_HPD1_INT_CONTROL, hpd1);</div><div class='ctx'> 		WREG32(DC_HPD2_INT_CONTROL, hpd2);</div><div class='ctx'> 		WREG32(DC_HPD3_INT_CONTROL, hpd3);</div><div class='hunk'>@@ -3171,12 +3106,18 @@ int r600_irq_set(struct radeon_device *rdev)</div><div class='ctx'> 		if (ASIC_IS_DCE32(rdev)) {</div><div class='ctx'> 			WREG32(DC_HPD5_INT_CONTROL, hpd5);</div><div class='ctx'> 			WREG32(DC_HPD6_INT_CONTROL, hpd6);</div><div class='add'>+			WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, hdmi0);</div><div class='add'>+			WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, hdmi1);</div><div class='add'>+		} else {</div><div class='add'>+			WREG32(HDMI0_AUDIO_PACKET_CONTROL, hdmi0);</div><div class='add'>+			WREG32(DCE3_HDMI1_AUDIO_PACKET_CONTROL, hdmi1);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		WREG32(R600_HDMI_BLOCK2 + R600_HDMI_CNTL, hdmi2);</div><div class='ctx'> 		WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, hpd1);</div><div class='ctx'> 		WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, hpd2);</div><div class='ctx'> 		WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, hpd3);</div><div class='add'>+		WREG32(HDMI0_AUDIO_PACKET_CONTROL, hdmi0);</div><div class='add'>+		WREG32(HDMI1_AUDIO_PACKET_CONTROL, hdmi1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3190,10 +3131,19 @@ static void r600_irq_ack(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;irq.stat_regs.r600.disp_int = RREG32(DCE3_DISP_INTERRUPT_STATUS);</div><div class='ctx'> 		rdev-&gt;irq.stat_regs.r600.disp_int_cont = RREG32(DCE3_DISP_INTERRUPT_STATUS_CONTINUE);</div><div class='ctx'> 		rdev-&gt;irq.stat_regs.r600.disp_int_cont2 = RREG32(DCE3_DISP_INTERRUPT_STATUS_CONTINUE2);</div><div class='add'>+		if (ASIC_IS_DCE32(rdev)) {</div><div class='add'>+			rdev-&gt;irq.stat_regs.r600.hdmi0_status = RREG32(AFMT_STATUS + DCE3_HDMI_OFFSET0);</div><div class='add'>+			rdev-&gt;irq.stat_regs.r600.hdmi1_status = RREG32(AFMT_STATUS + DCE3_HDMI_OFFSET1);</div><div class='add'>+		} else {</div><div class='add'>+			rdev-&gt;irq.stat_regs.r600.hdmi0_status = RREG32(HDMI0_STATUS);</div><div class='add'>+			rdev-&gt;irq.stat_regs.r600.hdmi1_status = RREG32(DCE3_HDMI1_STATUS);</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		rdev-&gt;irq.stat_regs.r600.disp_int = RREG32(DISP_INTERRUPT_STATUS);</div><div class='ctx'> 		rdev-&gt;irq.stat_regs.r600.disp_int_cont = RREG32(DISP_INTERRUPT_STATUS_CONTINUE);</div><div class='ctx'> 		rdev-&gt;irq.stat_regs.r600.disp_int_cont2 = 0;</div><div class='add'>+		rdev-&gt;irq.stat_regs.r600.hdmi0_status = RREG32(HDMI0_STATUS);</div><div class='add'>+		rdev-&gt;irq.stat_regs.r600.hdmi1_status = RREG32(HDMI1_STATUS);</div><div class='ctx'> 	}</div><div class='ctx'> 	rdev-&gt;irq.stat_regs.r600.d1grph_int = RREG32(D1GRPH_INTERRUPT_STATUS);</div><div class='ctx'> 	rdev-&gt;irq.stat_regs.r600.d2grph_int = RREG32(D2GRPH_INTERRUPT_STATUS);</div><div class='hunk'>@@ -3259,17 +3209,32 @@ static void r600_irq_ack(struct radeon_device *rdev)</div><div class='ctx'> 			tmp |= DC_HPDx_INT_ACK;</div><div class='ctx'> 			WREG32(DC_HPD6_INT_CONTROL, tmp);</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='del'>-	if (RREG32(R600_HDMI_BLOCK1 + R600_HDMI_STATUS) &amp; R600_HDMI_INT_PENDING) {</div><div class='del'>-		WREG32_P(R600_HDMI_BLOCK1 + R600_HDMI_CNTL, R600_HDMI_INT_ACK, ~R600_HDMI_INT_ACK);</div><div class='del'>-	}</div><div class='del'>-	if (ASIC_IS_DCE3(rdev)) {</div><div class='del'>-		if (RREG32(R600_HDMI_BLOCK3 + R600_HDMI_STATUS) &amp; R600_HDMI_INT_PENDING) {</div><div class='del'>-			WREG32_P(R600_HDMI_BLOCK3 + R600_HDMI_CNTL, R600_HDMI_INT_ACK, ~R600_HDMI_INT_ACK);</div><div class='add'>+		if (rdev-&gt;irq.stat_regs.r600.hdmi0_status &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+			tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0);</div><div class='add'>+			tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;</div><div class='add'>+			WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, tmp);</div><div class='add'>+		}</div><div class='add'>+		if (rdev-&gt;irq.stat_regs.r600.hdmi1_status &amp; AFMT_AZ_FORMAT_WTRIG) {</div><div class='add'>+			tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1);</div><div class='add'>+			tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;</div><div class='add'>+			WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, tmp);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		if (RREG32(R600_HDMI_BLOCK2 + R600_HDMI_STATUS) &amp; R600_HDMI_INT_PENDING) {</div><div class='del'>-			WREG32_P(R600_HDMI_BLOCK2 + R600_HDMI_CNTL, R600_HDMI_INT_ACK, ~R600_HDMI_INT_ACK);</div><div class='add'>+		if (rdev-&gt;irq.stat_regs.r600.hdmi0_status &amp; HDMI0_AZ_FORMAT_WTRIG) {</div><div class='add'>+			tmp = RREG32(HDMI0_AUDIO_PACKET_CONTROL);</div><div class='add'>+			tmp |= HDMI0_AZ_FORMAT_WTRIG_ACK;</div><div class='add'>+			WREG32(HDMI0_AUDIO_PACKET_CONTROL, tmp);</div><div class='add'>+		}</div><div class='add'>+		if (rdev-&gt;irq.stat_regs.r600.hdmi1_status &amp; HDMI0_AZ_FORMAT_WTRIG) {</div><div class='add'>+			if (ASIC_IS_DCE3(rdev)) {</div><div class='add'>+				tmp = RREG32(DCE3_HDMI1_AUDIO_PACKET_CONTROL);</div><div class='add'>+				tmp |= HDMI0_AZ_FORMAT_WTRIG_ACK;</div><div class='add'>+				WREG32(DCE3_HDMI1_AUDIO_PACKET_CONTROL, tmp);</div><div class='add'>+			} else {</div><div class='add'>+				tmp = RREG32(HDMI1_AUDIO_PACKET_CONTROL);</div><div class='add'>+				tmp |= HDMI0_AZ_FORMAT_WTRIG_ACK;</div><div class='add'>+				WREG32(HDMI1_AUDIO_PACKET_CONTROL, tmp);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -3345,6 +3310,7 @@ int r600_irq_process(struct radeon_device *rdev)</div><div class='ctx'> 	u32 ring_index;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	bool queue_hotplug = false;</div><div class='add'>+	bool queue_hdmi = false;</div><div class='ctx'> </div><div class='ctx'> 	if (!rdev-&gt;ih.enabled || rdev-&gt;shutdown)</div><div class='ctx'> 		return IRQ_NONE;</div><div class='hunk'>@@ -3480,9 +3446,26 @@ restart_ih:</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='del'>-		case 21: /* HDMI */</div><div class='del'>-			DRM_DEBUG("IH: HDMI: 0x%x\n", src_data);</div><div class='del'>-			r600_audio_schedule_polling(rdev);</div><div class='add'>+		case 21: /* hdmi */</div><div class='add'>+			switch (src_data) {</div><div class='add'>+			case 4:</div><div class='add'>+				if (rdev-&gt;irq.stat_regs.r600.hdmi0_status &amp; HDMI0_AZ_FORMAT_WTRIG) {</div><div class='add'>+					rdev-&gt;irq.stat_regs.r600.hdmi0_status &amp;= ~HDMI0_AZ_FORMAT_WTRIG;</div><div class='add'>+					queue_hdmi = true;</div><div class='add'>+					DRM_DEBUG("IH: HDMI0\n");</div><div class='add'>+				}</div><div class='add'>+				break;</div><div class='add'>+			case 5:</div><div class='add'>+				if (rdev-&gt;irq.stat_regs.r600.hdmi1_status &amp; HDMI0_AZ_FORMAT_WTRIG) {</div><div class='add'>+					rdev-&gt;irq.stat_regs.r600.hdmi1_status &amp;= ~HDMI0_AZ_FORMAT_WTRIG;</div><div class='add'>+					queue_hdmi = true;</div><div class='add'>+					DRM_DEBUG("IH: HDMI1\n");</div><div class='add'>+				}</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 176: /* CP_INT in ring buffer */</div><div class='ctx'> 		case 177: /* CP_INT in IB1 */</div><div class='hunk'>@@ -3514,6 +3497,8 @@ restart_ih:</div><div class='ctx'> 		goto restart_ih;</div><div class='ctx'> 	if (queue_hotplug)</div><div class='ctx'> 		schedule_work(&amp;rdev-&gt;hotplug_work);</div><div class='add'>+	if (queue_hdmi)</div><div class='add'>+		schedule_work(&amp;rdev-&gt;audio_work);</div><div class='ctx'> 	rdev-&gt;ih.rptr = rptr;</div><div class='ctx'> 	WREG32(IH_RB_RPTR, rdev-&gt;ih.rptr);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;rdev-&gt;ih.lock, flags);</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c<br/>index ba66f3093d46..7479a5c503e4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600_audio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/r600_audio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600_audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600_audio.c</a></div><div class='hunk'>@@ -29,7 +29,28 @@</div><div class='ctx'> #include "radeon_asic.h"</div><div class='ctx'> #include "atom.h"</div><div class='ctx'> </div><div class='del'>-#define AUDIO_TIMER_INTERVALL 100 /* 1/10 sekund should be enough */</div><div class='add'>+/*</div><div class='add'>+ * check if enc_priv stores radeon_encoder_atom_dig</div><div class='add'>+ */</div><div class='add'>+static bool radeon_dig_encoder(struct drm_encoder *encoder)</div><div class='add'>+{</div><div class='add'>+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	switch (radeon_encoder-&gt;encoder_id) {</div><div class='add'>+	case ENCODER_OBJECT_ID_INTERNAL_LVDS:</div><div class='add'>+	case ENCODER_OBJECT_ID_INTERNAL_TMDS1:</div><div class='add'>+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:</div><div class='add'>+	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:</div><div class='add'>+	case ENCODER_OBJECT_ID_INTERNAL_DVO1:</div><div class='add'>+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:</div><div class='add'>+	case ENCODER_OBJECT_ID_INTERNAL_DDI:</div><div class='add'>+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:</div><div class='add'>+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:</div><div class='add'>+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:</div><div class='add'>+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * check if the chipset is supported</div><div class='hunk'>@@ -42,118 +63,85 @@ static int r600_audio_chipset_supported(struct radeon_device *rdev)</div><div class='ctx'> 		|| rdev-&gt;family == CHIP_RS740;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * current number of channels</div><div class='del'>- */</div><div class='del'>-int r600_audio_channels(struct radeon_device *rdev)</div><div class='add'>+struct r600_audio r600_audio_status(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='del'>-	return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) &amp; 0x7) + 1;</div><div class='del'>-}</div><div class='add'>+	struct r600_audio status;</div><div class='add'>+	uint32_t value;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * current bits per sample</div><div class='del'>- */</div><div class='del'>-int r600_audio_bits_per_sample(struct radeon_device *rdev)</div><div class='del'>-{</div><div class='del'>-	uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) &amp; 0xF0) &gt;&gt; 4;</div><div class='del'>-	switch (value) {</div><div class='del'>-	case 0x0: return  8;</div><div class='del'>-	case 0x1: return 16;</div><div class='del'>-	case 0x2: return 20;</div><div class='del'>-	case 0x3: return 24;</div><div class='del'>-	case 0x4: return 32;</div><div class='del'>-	}</div><div class='add'>+	value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);</div><div class='ctx'> </div><div class='del'>-	dev_err(rdev-&gt;dev, "Unknown bits per sample 0x%x using 16 instead\n",</div><div class='del'>-		(int)value);</div><div class='add'>+	/* number of channels */</div><div class='add'>+	status.channels = (value &amp; 0x7) + 1;</div><div class='ctx'> </div><div class='del'>-	return 16;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * current sampling rate in HZ</div><div class='del'>- */</div><div class='del'>-int r600_audio_rate(struct radeon_device *rdev)</div><div class='del'>-{</div><div class='del'>-	uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);</div><div class='del'>-	uint32_t result;</div><div class='add'>+	/* bits per sample */</div><div class='add'>+	switch ((value &amp; 0xF0) &gt;&gt; 4) {</div><div class='add'>+	case 0x0:</div><div class='add'>+		status.bits_per_sample = 8;</div><div class='add'>+		break;</div><div class='add'>+	case 0x1:</div><div class='add'>+		status.bits_per_sample = 16;</div><div class='add'>+		break;</div><div class='add'>+	case 0x2:</div><div class='add'>+		status.bits_per_sample = 20;</div><div class='add'>+		break;</div><div class='add'>+	case 0x3:</div><div class='add'>+		status.bits_per_sample = 24;</div><div class='add'>+		break;</div><div class='add'>+	case 0x4:</div><div class='add'>+		status.bits_per_sample = 32;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(rdev-&gt;dev, "Unknown bits per sample 0x%x, using 16\n",</div><div class='add'>+			(int)value);</div><div class='add'>+		status.bits_per_sample = 16;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	/* current sampling rate in HZ */</div><div class='ctx'> 	if (value &amp; 0x4000)</div><div class='del'>-		result = 44100;</div><div class='add'>+		status.rate = 44100;</div><div class='ctx'> 	else</div><div class='del'>-		result = 48000;</div><div class='add'>+		status.rate = 48000;</div><div class='add'>+	status.rate *= ((value &gt;&gt; 11) &amp; 0x7) + 1;</div><div class='add'>+	status.rate /= ((value &gt;&gt; 8) &amp; 0x7) + 1;</div><div class='ctx'> </div><div class='del'>-	result *= ((value &gt;&gt; 11) &amp; 0x7) + 1;</div><div class='del'>-	result /= ((value &gt;&gt; 8) &amp; 0x7) + 1;</div><div class='add'>+	value = RREG32(R600_AUDIO_STATUS_BITS);</div><div class='ctx'> </div><div class='del'>-	return result;</div><div class='del'>-}</div><div class='add'>+	/* iec 60958 status bits */</div><div class='add'>+	status.status_bits = value &amp; 0xff;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * iec 60958 status bits</div><div class='del'>- */</div><div class='del'>-uint8_t r600_audio_status_bits(struct radeon_device *rdev)</div><div class='del'>-{</div><div class='del'>-	return RREG32(R600_AUDIO_STATUS_BITS) &amp; 0xff;</div><div class='del'>-}</div><div class='add'>+	/* iec 60958 category code */</div><div class='add'>+	status.category_code = (value &gt;&gt; 8) &amp; 0xff;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * iec 60958 category code</div><div class='del'>- */</div><div class='del'>-uint8_t r600_audio_category_code(struct radeon_device *rdev)</div><div class='del'>-{</div><div class='del'>-	return (RREG32(R600_AUDIO_STATUS_BITS) &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * schedule next audio update event</div><div class='del'>- */</div><div class='del'>-void r600_audio_schedule_polling(struct radeon_device *rdev)</div><div class='del'>-{</div><div class='del'>-	mod_timer(&amp;rdev-&gt;audio_timer,</div><div class='del'>-		jiffies + msecs_to_jiffies(AUDIO_TIMER_INTERVALL));</div><div class='add'>+	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * update all hdmi interfaces with current audio parameters</div><div class='ctx'>  */</div><div class='del'>-static void r600_audio_update_hdmi(unsigned long param)</div><div class='add'>+void r600_audio_update_hdmi(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct radeon_device *rdev = (struct radeon_device *)param;</div><div class='add'>+	struct radeon_device *rdev = container_of(work, struct radeon_device,</div><div class='add'>+						  audio_work);</div><div class='ctx'> 	struct drm_device *dev = rdev-&gt;ddev;</div><div class='del'>-</div><div class='del'>-	int channels = r600_audio_channels(rdev);</div><div class='del'>-	int rate = r600_audio_rate(rdev);</div><div class='del'>-	int bps = r600_audio_bits_per_sample(rdev);</div><div class='del'>-	uint8_t status_bits = r600_audio_status_bits(rdev);</div><div class='del'>-	uint8_t category_code = r600_audio_category_code(rdev);</div><div class='del'>-</div><div class='add'>+	struct r600_audio audio_status = r600_audio_status(rdev);</div><div class='ctx'> 	struct drm_encoder *encoder;</div><div class='del'>-	int changes = 0, still_going = 0;</div><div class='del'>-</div><div class='del'>-	changes |= channels != rdev-&gt;audio_channels;</div><div class='del'>-	changes |= rate != rdev-&gt;audio_rate;</div><div class='del'>-	changes |= bps != rdev-&gt;audio_bits_per_sample;</div><div class='del'>-	changes |= status_bits != rdev-&gt;audio_status_bits;</div><div class='del'>-	changes |= category_code != rdev-&gt;audio_category_code;</div><div class='del'>-</div><div class='del'>-	if (changes) {</div><div class='del'>-		rdev-&gt;audio_channels = channels;</div><div class='del'>-		rdev-&gt;audio_rate = rate;</div><div class='del'>-		rdev-&gt;audio_bits_per_sample = bps;</div><div class='del'>-		rdev-&gt;audio_status_bits = status_bits;</div><div class='del'>-		rdev-&gt;audio_category_code = category_code;</div><div class='add'>+	bool changed = false;</div><div class='add'>+</div><div class='add'>+	if (rdev-&gt;audio_status.channels != audio_status.channels ||</div><div class='add'>+	    rdev-&gt;audio_status.rate != audio_status.rate ||</div><div class='add'>+	    rdev-&gt;audio_status.bits_per_sample != audio_status.bits_per_sample ||</div><div class='add'>+	    rdev-&gt;audio_status.status_bits != audio_status.status_bits ||</div><div class='add'>+	    rdev-&gt;audio_status.category_code != audio_status.category_code) {</div><div class='add'>+		rdev-&gt;audio_status = audio_status;</div><div class='add'>+		changed = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(encoder, &amp;dev-&gt;mode_config.encoder_list, head) {</div><div class='del'>-		struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='del'>-		still_going |= radeon_encoder-&gt;audio_polling_active;</div><div class='del'>-		if (changes || r600_hdmi_buffer_status_changed(encoder))</div><div class='add'>+		if (!radeon_dig_encoder(encoder))</div><div class='add'>+			continue;</div><div class='add'>+		if (changed || r600_hdmi_buffer_status_changed(encoder))</div><div class='ctx'> 			r600_hdmi_update_audio_settings(encoder);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (still_going)</div><div class='del'>-		r600_audio_schedule_polling(rdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -177,7 +165,7 @@ static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * initialize the audio vars and register the update timer</div><div class='add'>+ * initialize the audio vars</div><div class='ctx'>  */</div><div class='ctx'> int r600_audio_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -186,51 +174,16 @@ int r600_audio_init(struct radeon_device *rdev)</div><div class='ctx'> </div><div class='ctx'> 	r600_audio_engine_enable(rdev, true);</div><div class='ctx'> </div><div class='del'>-	rdev-&gt;audio_channels = -1;</div><div class='del'>-	rdev-&gt;audio_rate = -1;</div><div class='del'>-	rdev-&gt;audio_bits_per_sample = -1;</div><div class='del'>-	rdev-&gt;audio_status_bits = 0;</div><div class='del'>-	rdev-&gt;audio_category_code = 0;</div><div class='del'>-</div><div class='del'>-	setup_timer(</div><div class='del'>-		&amp;rdev-&gt;audio_timer,</div><div class='del'>-		r600_audio_update_hdmi,</div><div class='del'>-		(unsigned long)rdev);</div><div class='add'>+	rdev-&gt;audio_status.channels = -1;</div><div class='add'>+	rdev-&gt;audio_status.rate = -1;</div><div class='add'>+	rdev-&gt;audio_status.bits_per_sample = -1;</div><div class='add'>+	rdev-&gt;audio_status.status_bits = 0;</div><div class='add'>+	rdev-&gt;audio_status.category_code = 0;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * enable the polling timer, to check for status changes</div><div class='del'>- */</div><div class='del'>-void r600_audio_enable_polling(struct drm_encoder *encoder)</div><div class='del'>-{</div><div class='del'>-	struct drm_device *dev = encoder-&gt;dev;</div><div class='del'>-	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='del'>-	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG("r600_audio_enable_polling: %d\n",</div><div class='del'>-		radeon_encoder-&gt;audio_polling_active);</div><div class='del'>-	if (radeon_encoder-&gt;audio_polling_active)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	radeon_encoder-&gt;audio_polling_active = 1;</div><div class='del'>-	if (rdev-&gt;audio_enabled)</div><div class='del'>-		mod_timer(&amp;rdev-&gt;audio_timer, jiffies + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * disable the polling timer, so we get no more status updates</div><div class='del'>- */</div><div class='del'>-void r600_audio_disable_polling(struct drm_encoder *encoder)</div><div class='del'>-{</div><div class='del'>-	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='del'>-	DRM_DEBUG("r600_audio_disable_polling: %d\n",</div><div class='del'>-		radeon_encoder-&gt;audio_polling_active);</div><div class='del'>-	radeon_encoder-&gt;audio_polling_active = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * atach the audio codec to the clock source of the encoder</div><div class='ctx'>  */</div><div class='ctx'> void r600_audio_set_clock(struct drm_encoder *encoder, int clock)</div><div class='hunk'>@@ -239,6 +192,7 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='ctx'> 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='ctx'> 	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='add'>+	struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder-&gt;crtc);</div><div class='ctx'> 	int base_rate = 48000;</div><div class='ctx'> </div><div class='ctx'> 	switch (radeon_encoder-&gt;encoder_id) {</div><div class='hunk'>@@ -264,8 +218,8 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)</div><div class='ctx'> 		WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10);</div><div class='ctx'> 		WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071);</div><div class='ctx'> </div><div class='del'>-		/* Some magic trigger or src sel? */</div><div class='del'>-		WREG32_P(0x5ac, 0x01, ~0x77);</div><div class='add'>+		/* Select DTO source */</div><div class='add'>+		WREG32(0x5ac, radeon_crtc-&gt;crtc_id);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		switch (dig-&gt;dig_encoder) {</div><div class='ctx'> 		case 0:</div><div class='hunk'>@@ -297,7 +251,5 @@ void r600_audio_fini(struct radeon_device *rdev)</div><div class='ctx'> 	if (!rdev-&gt;audio_enabled)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;rdev-&gt;audio_timer);</div><div class='del'>-</div><div class='ctx'> 	r600_audio_engine_enable(rdev, false);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c<br/>index db38f587f27a..03b6e0d3d503 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600_blit_kms.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/r600_blit_kms.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600_blit_kms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600_blit_kms.c</a></div><div class='hunk'>@@ -513,7 +513,6 @@ int r600_blit_init(struct radeon_device *rdev)</div><div class='ctx'> 	rdev-&gt;r600_blit.primitives.set_default_state = set_default_state;</div><div class='ctx'> </div><div class='ctx'> 	rdev-&gt;r600_blit.ring_size_common = 40; /* shaders + def state */</div><div class='del'>-	rdev-&gt;r600_blit.ring_size_common += 16; /* fence emit for VB IB */</div><div class='ctx'> 	rdev-&gt;r600_blit.ring_size_common += 5; /* done copy */</div><div class='ctx'> 	rdev-&gt;r600_blit.ring_size_common += 16; /* fence emit for done copy */</div><div class='ctx'> </div><div class='hunk'>@@ -528,7 +527,6 @@ int r600_blit_init(struct radeon_device *rdev)</div><div class='ctx'> 	if (rdev-&gt;r600_blit.shader_obj)</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='del'>-	mutex_init(&amp;rdev-&gt;r600_blit.mutex);</div><div class='ctx'> 	rdev-&gt;r600_blit.state_offset = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (rdev-&gt;family &gt;= CHIP_RV770)</div><div class='hunk'>@@ -554,7 +552,7 @@ int r600_blit_init(struct radeon_device *rdev)</div><div class='ctx'> 	obj_size = ALIGN(obj_size, 256);</div><div class='ctx'> </div><div class='ctx'> 	r = radeon_bo_create(rdev, obj_size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,</div><div class='del'>-				&amp;rdev-&gt;r600_blit.shader_obj);</div><div class='add'>+			     NULL, &amp;rdev-&gt;r600_blit.shader_obj);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("r600 failed to allocate shader\n");</div><div class='ctx'> 		return r;</div><div class='hunk'>@@ -621,27 +619,6 @@ void r600_blit_fini(struct radeon_device *rdev)</div><div class='ctx'> 	radeon_bo_unref(&amp;rdev-&gt;r600_blit.shader_obj);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int r600_vb_ib_get(struct radeon_device *rdev, unsigned size)</div><div class='del'>-{</div><div class='del'>-	int r;</div><div class='del'>-	r = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX,</div><div class='del'>-			  &amp;rdev-&gt;r600_blit.vb_ib, size);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("failed to get IB for vertex buffer\n");</div><div class='del'>-		return r;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rdev-&gt;r600_blit.vb_total = size;</div><div class='del'>-	rdev-&gt;r600_blit.vb_used = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void r600_vb_ib_put(struct radeon_device *rdev)</div><div class='del'>-{</div><div class='del'>-	radeon_fence_emit(rdev, rdev-&gt;r600_blit.vb_ib-&gt;fence);</div><div class='del'>-	radeon_ib_free(rdev, &amp;rdev-&gt;r600_blit.vb_ib);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static unsigned r600_blit_create_rect(unsigned num_gpu_pages,</div><div class='ctx'> 				      int *width, int *height, int max_dim)</div><div class='ctx'> {</div><div class='hunk'>@@ -688,7 +665,8 @@ static unsigned r600_blit_create_rect(unsigned num_gpu_pages,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-int r600_blit_prepare_copy(struct radeon_device *rdev, unsigned num_gpu_pages)</div><div class='add'>+int r600_blit_prepare_copy(struct radeon_device *rdev, unsigned num_gpu_pages,</div><div class='add'>+			   struct radeon_sa_bo **vb)</div><div class='ctx'> {</div><div class='ctx'> 	struct radeon_ring *ring = &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX];</div><div class='ctx'> 	int r;</div><div class='hunk'>@@ -705,46 +683,54 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, unsigned num_gpu_pages)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* 48 bytes for vertex per loop */</div><div class='del'>-	r = r600_vb_ib_get(rdev, (num_loops*48)+256);</div><div class='del'>-	if (r)</div><div class='add'>+	r = radeon_sa_bo_new(rdev, &amp;rdev-&gt;ring_tmp_bo, vb,</div><div class='add'>+			     (num_loops*48)+256, 256, true);</div><div class='add'>+	if (r) {</div><div class='ctx'> 		return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* calculate number of loops correctly */</div><div class='ctx'> 	ring_size = num_loops * dwords_per_loop;</div><div class='ctx'> 	ring_size += rdev-&gt;r600_blit.ring_size_common;</div><div class='ctx'> 	r = radeon_ring_lock(rdev, ring, ring_size);</div><div class='del'>-	if (r)</div><div class='add'>+	if (r) {</div><div class='add'>+		radeon_sa_bo_free(rdev, vb, NULL);</div><div class='ctx'> 		return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	rdev-&gt;r600_blit.primitives.set_default_state(rdev);</div><div class='ctx'> 	rdev-&gt;r600_blit.primitives.set_shaders(rdev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence)</div><div class='add'>+void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence,</div><div class='add'>+			 struct radeon_sa_bo *vb)</div><div class='ctx'> {</div><div class='add'>+	struct radeon_ring *ring = &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX];</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	if (rdev-&gt;r600_blit.vb_ib)</div><div class='del'>-		r600_vb_ib_put(rdev);</div><div class='del'>-</div><div class='del'>-	if (fence)</div><div class='del'>-		r = radeon_fence_emit(rdev, fence);</div><div class='add'>+	r = radeon_fence_emit(rdev, fence);</div><div class='add'>+	if (r) {</div><div class='add'>+		radeon_ring_unlock_undo(rdev, ring);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	radeon_ring_unlock_commit(rdev, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='add'>+	radeon_ring_unlock_commit(rdev, ring);</div><div class='add'>+	radeon_sa_bo_free(rdev, &amp;vb, fence);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void r600_kms_blit_copy(struct radeon_device *rdev,</div><div class='ctx'> 			u64 src_gpu_addr, u64 dst_gpu_addr,</div><div class='del'>-			unsigned num_gpu_pages)</div><div class='add'>+			unsigned num_gpu_pages,</div><div class='add'>+			struct radeon_sa_bo *vb)</div><div class='ctx'> {</div><div class='ctx'> 	u64 vb_gpu_addr;</div><div class='del'>-	u32 *vb;</div><div class='add'>+	u32 *vb_cpu_addr;</div><div class='ctx'> </div><div class='del'>-	DRM_DEBUG("emitting copy %16llx %16llx %d %d\n",</div><div class='del'>-		  src_gpu_addr, dst_gpu_addr,</div><div class='del'>-		  num_gpu_pages, rdev-&gt;r600_blit.vb_used);</div><div class='del'>-	vb = (u32 *)(rdev-&gt;r600_blit.vb_ib-&gt;ptr + rdev-&gt;r600_blit.vb_used);</div><div class='add'>+	DRM_DEBUG("emitting copy %16llx %16llx %d\n",</div><div class='add'>+		  src_gpu_addr, dst_gpu_addr, num_gpu_pages);</div><div class='add'>+	vb_cpu_addr = (u32 *)radeon_sa_bo_cpu_addr(vb);</div><div class='add'>+	vb_gpu_addr = radeon_sa_bo_gpu_addr(vb);</div><div class='ctx'> </div><div class='ctx'> 	while (num_gpu_pages) {</div><div class='ctx'> 		int w, h;</div><div class='hunk'>@@ -756,39 +742,34 @@ void r600_kms_blit_copy(struct radeon_device *rdev,</div><div class='ctx'> 		size_in_bytes = pages_per_loop * RADEON_GPU_PAGE_SIZE;</div><div class='ctx'> 		DRM_DEBUG("rectangle w=%d h=%d\n", w, h);</div><div class='ctx'> </div><div class='del'>-		if ((rdev-&gt;r600_blit.vb_used + 48) &gt; rdev-&gt;r600_blit.vb_total) {</div><div class='del'>-			WARN_ON(1);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		vb[0] = 0;</div><div class='del'>-		vb[1] = 0;</div><div class='del'>-		vb[2] = 0;</div><div class='del'>-		vb[3] = 0;</div><div class='add'>+		vb_cpu_addr[0] = 0;</div><div class='add'>+		vb_cpu_addr[1] = 0;</div><div class='add'>+		vb_cpu_addr[2] = 0;</div><div class='add'>+		vb_cpu_addr[3] = 0;</div><div class='ctx'> </div><div class='del'>-		vb[4] = 0;</div><div class='del'>-		vb[5] = i2f(h);</div><div class='del'>-		vb[6] = 0;</div><div class='del'>-		vb[7] = i2f(h);</div><div class='add'>+		vb_cpu_addr[4] = 0;</div><div class='add'>+		vb_cpu_addr[5] = i2f(h);</div><div class='add'>+		vb_cpu_addr[6] = 0;</div><div class='add'>+		vb_cpu_addr[7] = i2f(h);</div><div class='ctx'> </div><div class='del'>-		vb[8] = i2f(w);</div><div class='del'>-		vb[9] = i2f(h);</div><div class='del'>-		vb[10] = i2f(w);</div><div class='del'>-		vb[11] = i2f(h);</div><div class='add'>+		vb_cpu_addr[8] = i2f(w);</div><div class='add'>+		vb_cpu_addr[9] = i2f(h);</div><div class='add'>+		vb_cpu_addr[10] = i2f(w);</div><div class='add'>+		vb_cpu_addr[11] = i2f(h);</div><div class='ctx'> </div><div class='ctx'> 		rdev-&gt;r600_blit.primitives.set_tex_resource(rdev, FMT_8_8_8_8,</div><div class='ctx'> 							    w, h, w, src_gpu_addr, size_in_bytes);</div><div class='ctx'> 		rdev-&gt;r600_blit.primitives.set_render_target(rdev, COLOR_8_8_8_8,</div><div class='ctx'> 							     w, h, dst_gpu_addr);</div><div class='ctx'> 		rdev-&gt;r600_blit.primitives.set_scissors(rdev, 0, 0, w, h);</div><div class='del'>-		vb_gpu_addr = rdev-&gt;r600_blit.vb_ib-&gt;gpu_addr + rdev-&gt;r600_blit.vb_used;</div><div class='ctx'> 		rdev-&gt;r600_blit.primitives.set_vtx_resource(rdev, vb_gpu_addr);</div><div class='ctx'> 		rdev-&gt;r600_blit.primitives.draw_auto(rdev);</div><div class='ctx'> 		rdev-&gt;r600_blit.primitives.cp_set_surface_sync(rdev,</div><div class='ctx'> 				    PACKET3_CB_ACTION_ENA | PACKET3_CB0_DEST_BASE_ENA,</div><div class='ctx'> 				    size_in_bytes, dst_gpu_addr);</div><div class='ctx'> </div><div class='del'>-		vb += 12;</div><div class='del'>-		rdev-&gt;r600_blit.vb_used += 4*12;</div><div class='add'>+		vb_cpu_addr += 12;</div><div class='add'>+		vb_gpu_addr += 4*12;</div><div class='ctx'> 		src_gpu_addr += size_in_bytes;</div><div class='ctx'> 		dst_gpu_addr += size_in_bytes;</div><div class='ctx'> 		num_gpu_pages -= pages_per_loop;</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c<br/>index b8e12af304a9..0133f5f09bd6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600_cs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/r600_cs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600_cs.c</a></div><div class='hunk'>@@ -345,7 +345,7 @@ static int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i)</div><div class='ctx'> 	u32 height, height_align, pitch, pitch_align, depth_align;</div><div class='ctx'> 	u64 base_offset, base_align;</div><div class='ctx'> 	struct array_mode_checker array_check;</div><div class='del'>-	volatile u32 *ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	volatile u32 *ib = p-&gt;ib.ptr;</div><div class='ctx'> 	unsigned array_mode;</div><div class='ctx'> 	u32 format;</div><div class='ctx'> </div><div class='hunk'>@@ -471,7 +471,7 @@ static int r600_cs_track_validate_db(struct radeon_cs_parser *p)</div><div class='ctx'> 	u64 base_offset, base_align;</div><div class='ctx'> 	struct array_mode_checker array_check;</div><div class='ctx'> 	int array_mode;</div><div class='del'>-	volatile u32 *ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	volatile u32 *ib = p-&gt;ib.ptr;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	if (track-&gt;db_bo == NULL) {</div><div class='hunk'>@@ -961,7 +961,7 @@ static int r600_cs_packet_parse_vline(struct radeon_cs_parser *p)</div><div class='ctx'> 	uint32_t header, h_idx, reg, wait_reg_mem_info;</div><div class='ctx'> 	volatile uint32_t *ib;</div><div class='ctx'> </div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> </div><div class='ctx'> 	/* parse the WAIT_REG_MEM */</div><div class='ctx'> 	r = r600_cs_packet_parse(p, &amp;wait_reg_mem, p-&gt;idx);</div><div class='hunk'>@@ -1110,7 +1110,7 @@ static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)</div><div class='ctx'> 	m = 1 &lt;&lt; ((reg &gt;&gt; 2) &amp; 31);</div><div class='ctx'> 	if (!(r600_reg_safe_bm[i] &amp; m))</div><div class='ctx'> 		return 0;</div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> 	switch (reg) {</div><div class='ctx'> 	/* force following reg to 0 in an attempt to disable out buffer</div><div class='ctx'> 	 * which will need us to better understand how it works to perform</div><div class='hunk'>@@ -1714,7 +1714,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p,</div><div class='ctx'> 	u32 idx_value;</div><div class='ctx'> </div><div class='ctx'> 	track = (struct r600_cs_track *)p-&gt;track;</div><div class='del'>-	ib = p-&gt;ib-&gt;ptr;</div><div class='add'>+	ib = p-&gt;ib.ptr;</div><div class='ctx'> 	idx = pkt-&gt;idx + 1;</div><div class='ctx'> 	idx_value = radeon_get_ib_value(p, idx);</div><div class='ctx'> </div><div class='hunk'>@@ -2249,8 +2249,8 @@ int r600_cs_parse(struct radeon_cs_parser *p)</div><div class='ctx'> 		}</div><div class='ctx'> 	} while (p-&gt;idx &lt; p-&gt;chunks[p-&gt;chunk_ib_idx].length_dw);</div><div class='ctx'> #if 0</div><div class='del'>-	for (r = 0; r &lt; p-&gt;ib-&gt;length_dw; r++) {</div><div class='del'>-		printk(KERN_INFO "%05d  0x%08X\n", r, p-&gt;ib-&gt;ptr[r]);</div><div class='add'>+	for (r = 0; r &lt; p-&gt;ib.length_dw; r++) {</div><div class='add'>+		printk(KERN_INFO "%05d  0x%08X\n", r, p-&gt;ib.ptr[r]);</div><div class='ctx'> 		mdelay(1);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='hunk'>@@ -2298,7 +2298,6 @@ int r600_cs_legacy(struct drm_device *dev, void *data, struct drm_file *filp,</div><div class='ctx'> {</div><div class='ctx'> 	struct radeon_cs_parser parser;</div><div class='ctx'> 	struct radeon_cs_chunk *ib_chunk;</div><div class='del'>-	struct radeon_ib fake_ib;</div><div class='ctx'> 	struct r600_cs_track *track;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='hunk'>@@ -2314,9 +2313,8 @@ int r600_cs_legacy(struct drm_device *dev, void *data, struct drm_file *filp,</div><div class='ctx'> 	parser.dev = &amp;dev-&gt;pdev-&gt;dev;</div><div class='ctx'> 	parser.rdev = NULL;</div><div class='ctx'> 	parser.family = family;</div><div class='del'>-	parser.ib = &amp;fake_ib;</div><div class='ctx'> 	parser.track = track;</div><div class='del'>-	fake_ib.ptr = ib;</div><div class='add'>+	parser.ib.ptr = ib;</div><div class='ctx'> 	r = radeon_cs_parser_init(&amp;parser, data);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("Failed to initialize parser !\n");</div><div class='hunk'>@@ -2333,8 +2331,8 @@ int r600_cs_legacy(struct drm_device *dev, void *data, struct drm_file *filp,</div><div class='ctx'> 	 * input memory (cached) and write to the IB (which can be</div><div class='ctx'> 	 * uncached). */</div><div class='ctx'> 	ib_chunk = &amp;parser.chunks[parser.chunk_ib_idx];</div><div class='del'>-	parser.ib-&gt;length_dw = ib_chunk-&gt;length_dw;</div><div class='del'>-	*l = parser.ib-&gt;length_dw;</div><div class='add'>+	parser.ib.length_dw = ib_chunk-&gt;length_dw;</div><div class='add'>+	*l = parser.ib.length_dw;</div><div class='ctx'> 	r = r600_cs_parse(&amp;parser);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("Invalid command stream !\n");</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c<br/>index 0b5920671450..969c27529dfe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600_hdmi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/r600_hdmi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600_hdmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600_hdmi.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include "radeon_drm.h"</div><div class='ctx'> #include "radeon.h"</div><div class='ctx'> #include "radeon_asic.h"</div><div class='add'>+#include "r600d.h"</div><div class='ctx'> #include "atom.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -52,19 +53,7 @@ enum r600_hdmi_iec_status_bits {</div><div class='ctx'> 	AUDIO_STATUS_LEVEL        = 0x80</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct {</div><div class='del'>-	uint32_t Clock;</div><div class='del'>-</div><div class='del'>-	int N_32kHz;</div><div class='del'>-	int CTS_32kHz;</div><div class='del'>-</div><div class='del'>-	int N_44_1kHz;</div><div class='del'>-	int CTS_44_1kHz;</div><div class='del'>-</div><div class='del'>-	int N_48kHz;</div><div class='del'>-	int CTS_48kHz;</div><div class='del'>-</div><div class='del'>-} r600_hdmi_ACR[] = {</div><div class='add'>+struct radeon_hdmi_acr r600_hdmi_predefined_acr[] = {</div><div class='ctx'>     /*	     32kHz	  44.1kHz	48kHz    */</div><div class='ctx'>     /* Clock      N     CTS      N     CTS      N     CTS */</div><div class='ctx'>     {  25174,  4576,  28125,  7007,  31250,  6864,  28125 }, /*  25,20/1.001 MHz */</div><div class='hunk'>@@ -83,7 +72,7 @@ struct {</div><div class='ctx'> /*</div><div class='ctx'>  * calculate CTS value if it's not found in the table</div><div class='ctx'>  */</div><div class='del'>-static void r600_hdmi_calc_CTS(uint32_t clock, int *CTS, int N, int freq)</div><div class='add'>+static void r600_hdmi_calc_cts(uint32_t clock, int *CTS, int N, int freq)</div><div class='ctx'> {</div><div class='ctx'> 	if (*CTS == 0)</div><div class='ctx'> 		*CTS = clock * N / (128 * freq) * 1000;</div><div class='hunk'>@@ -91,6 +80,24 @@ static void r600_hdmi_calc_CTS(uint32_t clock, int *CTS, int N, int freq)</div><div class='ctx'> 		  N, *CTS, freq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct radeon_hdmi_acr r600_hdmi_acr(uint32_t clock)</div><div class='add'>+{</div><div class='add'>+	struct radeon_hdmi_acr res;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; r600_hdmi_predefined_acr[i].clock != clock &amp;&amp;</div><div class='add'>+	     r600_hdmi_predefined_acr[i].clock != 0; i++)</div><div class='add'>+		;</div><div class='add'>+	res = r600_hdmi_predefined_acr[i];</div><div class='add'>+</div><div class='add'>+	/* In case some CTS are missing */</div><div class='add'>+	r600_hdmi_calc_cts(clock, &amp;res.cts_32khz, res.n_32khz, 32000);</div><div class='add'>+	r600_hdmi_calc_cts(clock, &amp;res.cts_44_1khz, res.n_44_1khz, 44100);</div><div class='add'>+	r600_hdmi_calc_cts(clock, &amp;res.cts_48khz, res.n_48khz, 48000);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * update the N and CTS parameters for a given pixel clock rate</div><div class='ctx'>  */</div><div class='hunk'>@@ -98,30 +105,19 @@ static void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='del'>-	uint32_t offset = to_radeon_encoder(encoder)-&gt;hdmi_offset;</div><div class='del'>-	int CTS;</div><div class='del'>-	int N;</div><div class='del'>-	int i;</div><div class='add'>+	struct radeon_hdmi_acr acr = r600_hdmi_acr(clock);</div><div class='add'>+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='add'>+	uint32_t offset = dig-&gt;afmt-&gt;offset;</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI0_ACR_32_0 + offset, HDMI0_ACR_CTS_32(acr.cts_32khz));</div><div class='add'>+	WREG32(HDMI0_ACR_32_1 + offset, acr.n_32khz);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; r600_hdmi_ACR[i].Clock != clock &amp;&amp; r600_hdmi_ACR[i].Clock != 0; i++);</div><div class='del'>-</div><div class='del'>-	CTS = r600_hdmi_ACR[i].CTS_32kHz;</div><div class='del'>-	N = r600_hdmi_ACR[i].N_32kHz;</div><div class='del'>-	r600_hdmi_calc_CTS(clock, &amp;CTS, N, 32000);</div><div class='del'>-	WREG32(offset+R600_HDMI_32kHz_CTS, CTS &lt;&lt; 12);</div><div class='del'>-	WREG32(offset+R600_HDMI_32kHz_N, N);</div><div class='del'>-</div><div class='del'>-	CTS = r600_hdmi_ACR[i].CTS_44_1kHz;</div><div class='del'>-	N = r600_hdmi_ACR[i].N_44_1kHz;</div><div class='del'>-	r600_hdmi_calc_CTS(clock, &amp;CTS, N, 44100);</div><div class='del'>-	WREG32(offset+R600_HDMI_44_1kHz_CTS, CTS &lt;&lt; 12);</div><div class='del'>-	WREG32(offset+R600_HDMI_44_1kHz_N, N);</div><div class='del'>-</div><div class='del'>-	CTS = r600_hdmi_ACR[i].CTS_48kHz;</div><div class='del'>-	N = r600_hdmi_ACR[i].N_48kHz;</div><div class='del'>-	r600_hdmi_calc_CTS(clock, &amp;CTS, N, 48000);</div><div class='del'>-	WREG32(offset+R600_HDMI_48kHz_CTS, CTS &lt;&lt; 12);</div><div class='del'>-	WREG32(offset+R600_HDMI_48kHz_N, N);</div><div class='add'>+	WREG32(HDMI0_ACR_44_0 + offset, HDMI0_ACR_CTS_44(acr.cts_44_1khz));</div><div class='add'>+	WREG32(HDMI0_ACR_44_1 + offset, acr.n_44_1khz);</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI0_ACR_48_0 + offset, HDMI0_ACR_CTS_48(acr.cts_48khz));</div><div class='add'>+	WREG32(HDMI0_ACR_48_1 + offset, acr.n_48khz);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -165,7 +161,9 @@ static void r600_hdmi_videoinfoframe(</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='del'>-	uint32_t offset = to_radeon_encoder(encoder)-&gt;hdmi_offset;</div><div class='add'>+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='add'>+	uint32_t offset = dig-&gt;afmt-&gt;offset;</div><div class='ctx'> </div><div class='ctx'> 	uint8_t frame[14];</div><div class='ctx'> </div><div class='hunk'>@@ -204,13 +202,13 @@ static void r600_hdmi_videoinfoframe(</div><div class='ctx'> 	 * workaround this issue. */</div><div class='ctx'> 	frame[0x0] += 2;</div><div class='ctx'> </div><div class='del'>-	WREG32(offset+R600_HDMI_VIDEOINFOFRAME_0,</div><div class='add'>+	WREG32(HDMI0_AVI_INFO0 + offset,</div><div class='ctx'> 		frame[0x0] | (frame[0x1] &lt;&lt; 8) | (frame[0x2] &lt;&lt; 16) | (frame[0x3] &lt;&lt; 24));</div><div class='del'>-	WREG32(offset+R600_HDMI_VIDEOINFOFRAME_1,</div><div class='add'>+	WREG32(HDMI0_AVI_INFO1 + offset,</div><div class='ctx'> 		frame[0x4] | (frame[0x5] &lt;&lt; 8) | (frame[0x6] &lt;&lt; 16) | (frame[0x7] &lt;&lt; 24));</div><div class='del'>-	WREG32(offset+R600_HDMI_VIDEOINFOFRAME_2,</div><div class='add'>+	WREG32(HDMI0_AVI_INFO2 + offset,</div><div class='ctx'> 		frame[0x8] | (frame[0x9] &lt;&lt; 8) | (frame[0xA] &lt;&lt; 16) | (frame[0xB] &lt;&lt; 24));</div><div class='del'>-	WREG32(offset+R600_HDMI_VIDEOINFOFRAME_3,</div><div class='add'>+	WREG32(HDMI0_AVI_INFO3 + offset,</div><div class='ctx'> 		frame[0xC] | (frame[0xD] &lt;&lt; 8));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -231,7 +229,9 @@ static void r600_hdmi_audioinfoframe(</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='del'>-	uint32_t offset = to_radeon_encoder(encoder)-&gt;hdmi_offset;</div><div class='add'>+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='add'>+	uint32_t offset = dig-&gt;afmt-&gt;offset;</div><div class='ctx'> </div><div class='ctx'> 	uint8_t frame[11];</div><div class='ctx'> </div><div class='hunk'>@@ -249,22 +249,24 @@ static void r600_hdmi_audioinfoframe(</div><div class='ctx'> </div><div class='ctx'> 	r600_hdmi_infoframe_checksum(0x84, 0x01, 0x0A, frame);</div><div class='ctx'> </div><div class='del'>-	WREG32(offset+R600_HDMI_AUDIOINFOFRAME_0,</div><div class='add'>+	WREG32(HDMI0_AUDIO_INFO0 + offset,</div><div class='ctx'> 		frame[0x0] | (frame[0x1] &lt;&lt; 8) | (frame[0x2] &lt;&lt; 16) | (frame[0x3] &lt;&lt; 24));</div><div class='del'>-	WREG32(offset+R600_HDMI_AUDIOINFOFRAME_1,</div><div class='add'>+	WREG32(HDMI0_AUDIO_INFO1 + offset,</div><div class='ctx'> 		frame[0x4] | (frame[0x5] &lt;&lt; 8) | (frame[0x6] &lt;&lt; 16) | (frame[0x8] &lt;&lt; 24));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * test if audio buffer is filled enough to start playing</div><div class='ctx'>  */</div><div class='del'>-static int r600_hdmi_is_audio_buffer_filled(struct drm_encoder *encoder)</div><div class='add'>+static bool r600_hdmi_is_audio_buffer_filled(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='del'>-	uint32_t offset = to_radeon_encoder(encoder)-&gt;hdmi_offset;</div><div class='add'>+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='add'>+	uint32_t offset = dig-&gt;afmt-&gt;offset;</div><div class='ctx'> </div><div class='del'>-	return (RREG32(offset+R600_HDMI_STATUS) &amp; 0x10) != 0;</div><div class='add'>+	return (RREG32(HDMI0_STATUS + offset) &amp; 0x10) != 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -273,14 +275,15 @@ static int r600_hdmi_is_audio_buffer_filled(struct drm_encoder *encoder)</div><div class='ctx'> int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='ctx'> 	int status, result;</div><div class='ctx'> </div><div class='del'>-	if (!radeon_encoder-&gt;hdmi_offset)</div><div class='add'>+	if (!dig-&gt;afmt || !dig-&gt;afmt-&gt;enabled)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	status = r600_hdmi_is_audio_buffer_filled(encoder);</div><div class='del'>-	result = radeon_encoder-&gt;hdmi_buffer_status != status;</div><div class='del'>-	radeon_encoder-&gt;hdmi_buffer_status = status;</div><div class='add'>+	result = dig-&gt;afmt-&gt;last_buffer_filled_status != status;</div><div class='add'>+	dig-&gt;afmt-&gt;last_buffer_filled_status = status;</div><div class='ctx'> </div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='hunk'>@@ -288,26 +291,23 @@ int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder)</div><div class='ctx'> /*</div><div class='ctx'>  * write the audio workaround status to the hardware</div><div class='ctx'>  */</div><div class='del'>-void r600_hdmi_audio_workaround(struct drm_encoder *encoder)</div><div class='add'>+static void r600_hdmi_audio_workaround(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='ctx'> 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='del'>-	uint32_t offset = radeon_encoder-&gt;hdmi_offset;</div><div class='del'>-</div><div class='del'>-	if (!offset)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (!radeon_encoder-&gt;hdmi_audio_workaround ||</div><div class='del'>-		r600_hdmi_is_audio_buffer_filled(encoder)) {</div><div class='del'>-</div><div class='del'>-		/* disable audio workaround */</div><div class='del'>-		WREG32_P(offset+R600_HDMI_CNTL, 0x00000001, ~0x00001001);</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-		/* enable audio workaround */</div><div class='del'>-		WREG32_P(offset+R600_HDMI_CNTL, 0x00001001, ~0x00001001);</div><div class='del'>-	}</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='add'>+	uint32_t offset = dig-&gt;afmt-&gt;offset;</div><div class='add'>+	bool hdmi_audio_workaround = false; /* FIXME */</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	if (!hdmi_audio_workaround ||</div><div class='add'>+	    r600_hdmi_is_audio_buffer_filled(encoder))</div><div class='add'>+		value = 0; /* disable workaround */</div><div class='add'>+	else</div><div class='add'>+		value = HDMI0_AUDIO_TEST_EN; /* enable workaround */</div><div class='add'>+	WREG32_P(HDMI0_AUDIO_PACKET_CONTROL + offset,</div><div class='add'>+		 value, ~HDMI0_AUDIO_TEST_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -318,39 +318,74 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='del'>-	uint32_t offset = to_radeon_encoder(encoder)-&gt;hdmi_offset;</div><div class='add'>+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='add'>+	uint32_t offset;</div><div class='ctx'> </div><div class='ctx'> 	if (ASIC_IS_DCE5(rdev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (!offset)</div><div class='add'>+	/* Silent, r600_hdmi_enable will raise WARN for us */</div><div class='add'>+	if (!dig-&gt;afmt-&gt;enabled)</div><div class='ctx'> 		return;</div><div class='add'>+	offset = dig-&gt;afmt-&gt;offset;</div><div class='ctx'> </div><div class='ctx'> 	r600_audio_set_clock(encoder, mode-&gt;clock);</div><div class='ctx'> </div><div class='del'>-	WREG32(offset+R600_HDMI_UNKNOWN_0, 0x1000);</div><div class='del'>-	WREG32(offset+R600_HDMI_UNKNOWN_1, 0x0);</div><div class='del'>-	WREG32(offset+R600_HDMI_UNKNOWN_2, 0x1000);</div><div class='add'>+	WREG32(HDMI0_VBI_PACKET_CONTROL + offset,</div><div class='add'>+	       HDMI0_NULL_SEND); /* send null packets when required */</div><div class='ctx'> </div><div class='del'>-	r600_hdmi_update_ACR(encoder, mode-&gt;clock);</div><div class='add'>+	WREG32(HDMI0_AUDIO_CRC_CONTROL + offset, 0x1000);</div><div class='add'>+</div><div class='add'>+	if (ASIC_IS_DCE32(rdev)) {</div><div class='add'>+		WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset,</div><div class='add'>+		       HDMI0_AUDIO_DELAY_EN(1) | /* default audio delay */</div><div class='add'>+		       HDMI0_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */</div><div class='add'>+		WREG32(AFMT_AUDIO_PACKET_CONTROL + offset,</div><div class='add'>+		       AFMT_AUDIO_SAMPLE_SEND | /* send audio packets */</div><div class='add'>+		       AFMT_60958_CS_UPDATE); /* allow 60958 channel status fields to be updated */</div><div class='add'>+	} else {</div><div class='add'>+		WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset,</div><div class='add'>+		       HDMI0_AUDIO_SAMPLE_SEND | /* send audio packets */</div><div class='add'>+		       HDMI0_AUDIO_DELAY_EN(1) | /* default audio delay */</div><div class='add'>+		       HDMI0_AUDIO_PACKETS_PER_LINE(3) | /* should be suffient for all audio modes and small enough for all hblanks */</div><div class='add'>+		       HDMI0_60958_CS_UPDATE); /* allow 60958 channel status fields to be updated */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI0_ACR_PACKET_CONTROL + offset,</div><div class='add'>+	       HDMI0_ACR_AUTO_SEND | /* allow hw to sent ACR packets when required */</div><div class='add'>+	       HDMI0_ACR_SOURCE); /* select SW CTS value */</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI0_VBI_PACKET_CONTROL + offset,</div><div class='add'>+	       HDMI0_NULL_SEND | /* send null packets when required */</div><div class='add'>+	       HDMI0_GC_SEND | /* send general control packets */</div><div class='add'>+	       HDMI0_GC_CONT); /* send general control packets every frame */</div><div class='ctx'> </div><div class='del'>-	WREG32(offset+R600_HDMI_VIDEOCNTL, 0x13);</div><div class='add'>+	/* TODO: HDMI0_AUDIO_INFO_UPDATE */</div><div class='add'>+	WREG32(HDMI0_INFOFRAME_CONTROL0 + offset,</div><div class='add'>+	       HDMI0_AVI_INFO_SEND | /* enable AVI info frames */</div><div class='add'>+	       HDMI0_AVI_INFO_CONT | /* send AVI info frames every frame/field */</div><div class='add'>+	       HDMI0_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */</div><div class='add'>+	       HDMI0_AUDIO_INFO_CONT); /* send audio info frames every frame/field */</div><div class='ctx'> </div><div class='del'>-	WREG32(offset+R600_HDMI_VERSION, 0x202);</div><div class='add'>+	WREG32(HDMI0_INFOFRAME_CONTROL1 + offset,</div><div class='add'>+	       HDMI0_AVI_INFO_LINE(2) | /* anything other than 0 */</div><div class='add'>+	       HDMI0_AUDIO_INFO_LINE(2)); /* anything other than 0 */</div><div class='add'>+</div><div class='add'>+	WREG32(HDMI0_GC + offset, 0); /* unset HDMI0_GC_AVMUTE */</div><div class='ctx'> </div><div class='ctx'> 	r600_hdmi_videoinfoframe(encoder, RGB, 0, 0, 0, 0,</div><div class='ctx'> 		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);</div><div class='ctx'> </div><div class='add'>+	r600_hdmi_update_ACR(encoder, mode-&gt;clock);</div><div class='add'>+</div><div class='ctx'> 	/* it's unknown what these bits do excatly, but it's indeed quite useful for debugging */</div><div class='del'>-	WREG32(offset+R600_HDMI_AUDIO_DEBUG_0, 0x00FFFFFF);</div><div class='del'>-	WREG32(offset+R600_HDMI_AUDIO_DEBUG_1, 0x007FFFFF);</div><div class='del'>-	WREG32(offset+R600_HDMI_AUDIO_DEBUG_2, 0x00000001);</div><div class='del'>-	WREG32(offset+R600_HDMI_AUDIO_DEBUG_3, 0x00000001);</div><div class='add'>+	WREG32(HDMI0_RAMP_CONTROL0 + offset, 0x00FFFFFF);</div><div class='add'>+	WREG32(HDMI0_RAMP_CONTROL1 + offset, 0x007FFFFF);</div><div class='add'>+	WREG32(HDMI0_RAMP_CONTROL2 + offset, 0x00000001);</div><div class='add'>+	WREG32(HDMI0_RAMP_CONTROL3 + offset, 0x00000001);</div><div class='ctx'> </div><div class='ctx'> 	r600_hdmi_audio_workaround(encoder);</div><div class='del'>-</div><div class='del'>-	/* audio packets per line, does anyone know how to calc this ? */</div><div class='del'>-	WREG32_P(offset+R600_HDMI_CNTL, 0x00040000, ~0x001F0000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -360,145 +395,82 @@ void r600_hdmi_update_audio_settings(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='del'>-	uint32_t offset = to_radeon_encoder(encoder)-&gt;hdmi_offset;</div><div class='del'>-</div><div class='del'>-	int channels = r600_audio_channels(rdev);</div><div class='del'>-	int rate = r600_audio_rate(rdev);</div><div class='del'>-	int bps = r600_audio_bits_per_sample(rdev);</div><div class='del'>-	uint8_t status_bits = r600_audio_status_bits(rdev);</div><div class='del'>-	uint8_t category_code = r600_audio_category_code(rdev);</div><div class='del'>-</div><div class='add'>+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='add'>+	struct r600_audio audio = r600_audio_status(rdev);</div><div class='add'>+	uint32_t offset;</div><div class='ctx'> 	uint32_t iec;</div><div class='ctx'> </div><div class='del'>-	if (!offset)</div><div class='add'>+	if (!dig-&gt;afmt || !dig-&gt;afmt-&gt;enabled)</div><div class='ctx'> 		return;</div><div class='add'>+	offset = dig-&gt;afmt-&gt;offset;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG("%s with %d channels, %d Hz sampling rate, %d bits per sample,\n",</div><div class='ctx'> 		 r600_hdmi_is_audio_buffer_filled(encoder) ? "playing" : "stopped",</div><div class='del'>-		channels, rate, bps);</div><div class='add'>+		  audio.channels, audio.rate, audio.bits_per_sample);</div><div class='ctx'> 	DRM_DEBUG("0x%02X IEC60958 status bits and 0x%02X category code\n",</div><div class='del'>-		  (int)status_bits, (int)category_code);</div><div class='add'>+		  (int)audio.status_bits, (int)audio.category_code);</div><div class='ctx'> </div><div class='ctx'> 	iec = 0;</div><div class='del'>-	if (status_bits &amp; AUDIO_STATUS_PROFESSIONAL)</div><div class='add'>+	if (audio.status_bits &amp; AUDIO_STATUS_PROFESSIONAL)</div><div class='ctx'> 		iec |= 1 &lt;&lt; 0;</div><div class='del'>-	if (status_bits &amp; AUDIO_STATUS_NONAUDIO)</div><div class='add'>+	if (audio.status_bits &amp; AUDIO_STATUS_NONAUDIO)</div><div class='ctx'> 		iec |= 1 &lt;&lt; 1;</div><div class='del'>-	if (status_bits &amp; AUDIO_STATUS_COPYRIGHT)</div><div class='add'>+	if (audio.status_bits &amp; AUDIO_STATUS_COPYRIGHT)</div><div class='ctx'> 		iec |= 1 &lt;&lt; 2;</div><div class='del'>-	if (status_bits &amp; AUDIO_STATUS_EMPHASIS)</div><div class='add'>+	if (audio.status_bits &amp; AUDIO_STATUS_EMPHASIS)</div><div class='ctx'> 		iec |= 1 &lt;&lt; 3;</div><div class='ctx'> </div><div class='del'>-	iec |= category_code &lt;&lt; 8;</div><div class='del'>-</div><div class='del'>-	switch (rate) {</div><div class='del'>-	case  32000: iec |= 0x3 &lt;&lt; 24; break;</div><div class='del'>-	case  44100: iec |= 0x0 &lt;&lt; 24; break;</div><div class='del'>-	case  88200: iec |= 0x8 &lt;&lt; 24; break;</div><div class='del'>-	case 176400: iec |= 0xc &lt;&lt; 24; break;</div><div class='del'>-	case  48000: iec |= 0x2 &lt;&lt; 24; break;</div><div class='del'>-	case  96000: iec |= 0xa &lt;&lt; 24; break;</div><div class='del'>-	case 192000: iec |= 0xe &lt;&lt; 24; break;</div><div class='add'>+	iec |= HDMI0_60958_CS_CATEGORY_CODE(audio.category_code);</div><div class='add'>+</div><div class='add'>+	switch (audio.rate) {</div><div class='add'>+	case 32000:</div><div class='add'>+		iec |= HDMI0_60958_CS_SAMPLING_FREQUENCY(0x3);</div><div class='add'>+		break;</div><div class='add'>+	case 44100:</div><div class='add'>+		iec |= HDMI0_60958_CS_SAMPLING_FREQUENCY(0x0);</div><div class='add'>+		break;</div><div class='add'>+	case 48000:</div><div class='add'>+		iec |= HDMI0_60958_CS_SAMPLING_FREQUENCY(0x2);</div><div class='add'>+		break;</div><div class='add'>+	case 88200:</div><div class='add'>+		iec |= HDMI0_60958_CS_SAMPLING_FREQUENCY(0x8);</div><div class='add'>+		break;</div><div class='add'>+	case 96000:</div><div class='add'>+		iec |= HDMI0_60958_CS_SAMPLING_FREQUENCY(0xa);</div><div class='add'>+		break;</div><div class='add'>+	case 176400:</div><div class='add'>+		iec |= HDMI0_60958_CS_SAMPLING_FREQUENCY(0xc);</div><div class='add'>+		break;</div><div class='add'>+	case 192000:</div><div class='add'>+		iec |= HDMI0_60958_CS_SAMPLING_FREQUENCY(0xe);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	WREG32(offset+R600_HDMI_IEC60958_1, iec);</div><div class='add'>+	WREG32(HDMI0_60958_0 + offset, iec);</div><div class='ctx'> </div><div class='ctx'> 	iec = 0;</div><div class='del'>-	switch (bps) {</div><div class='del'>-	case 16: iec |= 0x2; break;</div><div class='del'>-	case 20: iec |= 0x3; break;</div><div class='del'>-	case 24: iec |= 0xb; break;</div><div class='add'>+	switch (audio.bits_per_sample) {</div><div class='add'>+	case 16:</div><div class='add'>+		iec |= HDMI0_60958_CS_WORD_LENGTH(0x2);</div><div class='add'>+		break;</div><div class='add'>+	case 20:</div><div class='add'>+		iec |= HDMI0_60958_CS_WORD_LENGTH(0x3);</div><div class='add'>+		break;</div><div class='add'>+	case 24:</div><div class='add'>+		iec |= HDMI0_60958_CS_WORD_LENGTH(0xb);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='del'>-	if (status_bits &amp; AUDIO_STATUS_V)</div><div class='add'>+	if (audio.status_bits &amp; AUDIO_STATUS_V)</div><div class='ctx'> 		iec |= 0x5 &lt;&lt; 16;</div><div class='add'>+	WREG32_P(HDMI0_60958_1 + offset, iec, ~0x5000f);</div><div class='ctx'> </div><div class='del'>-	WREG32_P(offset+R600_HDMI_IEC60958_2, iec, ~0x5000f);</div><div class='del'>-</div><div class='del'>-	/* 0x021 or 0x031 sets the audio frame length */</div><div class='del'>-	WREG32(offset+R600_HDMI_AUDIOCNTL, 0x31);</div><div class='del'>-	r600_hdmi_audioinfoframe(encoder, channels-1, 0, 0, 0, 0, 0, 0, 0);</div><div class='add'>+	r600_hdmi_audioinfoframe(encoder, audio.channels - 1, 0, 0, 0, 0, 0, 0,</div><div class='add'>+				 0);</div><div class='ctx'> </div><div class='ctx'> 	r600_hdmi_audio_workaround(encoder);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int r600_hdmi_find_free_block(struct drm_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='del'>-	struct drm_encoder *encoder;</div><div class='del'>-	struct radeon_encoder *radeon_encoder;</div><div class='del'>-	bool free_blocks[3] = { true, true, true };</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(encoder, &amp;dev-&gt;mode_config.encoder_list, head) {</div><div class='del'>-		radeon_encoder = to_radeon_encoder(encoder);</div><div class='del'>-		switch (radeon_encoder-&gt;hdmi_offset) {</div><div class='del'>-		case R600_HDMI_BLOCK1:</div><div class='del'>-			free_blocks[0] = false;</div><div class='del'>-			break;</div><div class='del'>-		case R600_HDMI_BLOCK2:</div><div class='del'>-			free_blocks[1] = false;</div><div class='del'>-			break;</div><div class='del'>-		case R600_HDMI_BLOCK3:</div><div class='del'>-			free_blocks[2] = false;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rdev-&gt;family == CHIP_RS600 || rdev-&gt;family == CHIP_RS690 ||</div><div class='del'>-	    rdev-&gt;family == CHIP_RS740) {</div><div class='del'>-		return free_blocks[0] ? R600_HDMI_BLOCK1 : 0;</div><div class='del'>-	} else if (rdev-&gt;family &gt;= CHIP_R600) {</div><div class='del'>-		if (free_blocks[0])</div><div class='del'>-			return R600_HDMI_BLOCK1;</div><div class='del'>-		else if (free_blocks[1])</div><div class='del'>-			return R600_HDMI_BLOCK2;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void r600_hdmi_assign_block(struct drm_encoder *encoder)</div><div class='del'>-{</div><div class='del'>-	struct drm_device *dev = encoder-&gt;dev;</div><div class='del'>-	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='del'>-	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='del'>-	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='del'>-</div><div class='del'>-	u16 eg_offsets[] = {</div><div class='del'>-		EVERGREEN_CRTC0_REGISTER_OFFSET,</div><div class='del'>-		EVERGREEN_CRTC1_REGISTER_OFFSET,</div><div class='del'>-		EVERGREEN_CRTC2_REGISTER_OFFSET,</div><div class='del'>-		EVERGREEN_CRTC3_REGISTER_OFFSET,</div><div class='del'>-		EVERGREEN_CRTC4_REGISTER_OFFSET,</div><div class='del'>-		EVERGREEN_CRTC5_REGISTER_OFFSET,</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	if (!dig) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "Enabling HDMI on non-dig encoder\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ASIC_IS_DCE5(rdev)) {</div><div class='del'>-		/* TODO */</div><div class='del'>-	} else if (ASIC_IS_DCE4(rdev)) {</div><div class='del'>-		if (dig-&gt;dig_encoder &gt;= ARRAY_SIZE(eg_offsets)) {</div><div class='del'>-			dev_err(rdev-&gt;dev, "Enabling HDMI on unknown dig\n");</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		radeon_encoder-&gt;hdmi_offset = EVERGREEN_HDMI_BASE +</div><div class='del'>-						eg_offsets[dig-&gt;dig_encoder];</div><div class='del'>-		radeon_encoder-&gt;hdmi_config_offset = radeon_encoder-&gt;hdmi_offset</div><div class='del'>-						+ EVERGREEN_HDMI_CONFIG_OFFSET;</div><div class='del'>-	} else if (ASIC_IS_DCE3(rdev)) {</div><div class='del'>-		radeon_encoder-&gt;hdmi_offset = dig-&gt;dig_encoder ?</div><div class='del'>-			R600_HDMI_BLOCK3 : R600_HDMI_BLOCK1;</div><div class='del'>-		if (ASIC_IS_DCE32(rdev))</div><div class='del'>-			radeon_encoder-&gt;hdmi_config_offset = dig-&gt;dig_encoder ?</div><div class='del'>-				R600_HDMI_CONFIG2 : R600_HDMI_CONFIG1;</div><div class='del'>-	} else if (rdev-&gt;family &gt;= CHIP_R600 || rdev-&gt;family == CHIP_RS600 ||</div><div class='del'>-		   rdev-&gt;family == CHIP_RS690 || rdev-&gt;family == CHIP_RS740) {</div><div class='del'>-		radeon_encoder-&gt;hdmi_offset = r600_hdmi_find_free_block(dev);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * enable the HDMI engine</div><div class='ctx'>  */</div><div class='hunk'>@@ -507,64 +479,57 @@ void r600_hdmi_enable(struct drm_encoder *encoder)</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='ctx'> 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='ctx'> 	uint32_t offset;</div><div class='add'>+	u32 hdmi;</div><div class='ctx'> </div><div class='ctx'> 	if (ASIC_IS_DCE5(rdev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (!radeon_encoder-&gt;hdmi_offset) {</div><div class='del'>-		r600_hdmi_assign_block(encoder);</div><div class='del'>-		if (!radeon_encoder-&gt;hdmi_offset) {</div><div class='del'>-			dev_warn(rdev-&gt;dev, "Could not find HDMI block for "</div><div class='del'>-				"0x%x encoder\n", radeon_encoder-&gt;encoder_id);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	/* Silent, r600_hdmi_enable will raise WARN for us */</div><div class='add'>+	if (dig-&gt;afmt-&gt;enabled)</div><div class='add'>+		return;</div><div class='add'>+	offset = dig-&gt;afmt-&gt;offset;</div><div class='ctx'> </div><div class='del'>-	offset = radeon_encoder-&gt;hdmi_offset;</div><div class='del'>-	if (ASIC_IS_DCE5(rdev)) {</div><div class='del'>-		/* TODO */</div><div class='del'>-	} else if (ASIC_IS_DCE4(rdev)) {</div><div class='del'>-		WREG32_P(radeon_encoder-&gt;hdmi_config_offset + 0xc, 0x1, ~0x1);</div><div class='del'>-	} else if (ASIC_IS_DCE32(rdev)) {</div><div class='del'>-		WREG32_P(radeon_encoder-&gt;hdmi_config_offset + 0x4, 0x1, ~0x1);</div><div class='del'>-	} else if (ASIC_IS_DCE3(rdev)) {</div><div class='del'>-		/* TODO */</div><div class='del'>-	} else if (rdev-&gt;family &gt;= CHIP_R600) {</div><div class='add'>+	/* Older chipsets require setting HDMI and routing manually */</div><div class='add'>+	if (rdev-&gt;family &gt;= CHIP_R600 &amp;&amp; !ASIC_IS_DCE3(rdev)) {</div><div class='add'>+		hdmi = HDMI0_ERROR_ACK | HDMI0_ENABLE;</div><div class='ctx'> 		switch (radeon_encoder-&gt;encoder_id) {</div><div class='ctx'> 		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:</div><div class='ctx'> 			WREG32_P(AVIVO_TMDSA_CNTL, AVIVO_TMDSA_CNTL_HDMI_EN,</div><div class='ctx'> 				 ~AVIVO_TMDSA_CNTL_HDMI_EN);</div><div class='del'>-			WREG32(offset + R600_HDMI_ENABLE, 0x101);</div><div class='add'>+			hdmi |= HDMI0_STREAM(HDMI0_STREAM_TMDSA);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ENCODER_OBJECT_ID_INTERNAL_LVTM1:</div><div class='ctx'> 			WREG32_P(AVIVO_LVTMA_CNTL, AVIVO_LVTMA_CNTL_HDMI_EN,</div><div class='ctx'> 				 ~AVIVO_LVTMA_CNTL_HDMI_EN);</div><div class='del'>-			WREG32(offset + R600_HDMI_ENABLE, 0x105);</div><div class='add'>+			hdmi |= HDMI0_STREAM(HDMI0_STREAM_LVTMA);</div><div class='add'>+			break;</div><div class='add'>+		case ENCODER_OBJECT_ID_INTERNAL_DDI:</div><div class='add'>+			WREG32_P(DDIA_CNTL, DDIA_HDMI_EN, ~DDIA_HDMI_EN);</div><div class='add'>+			hdmi |= HDMI0_STREAM(HDMI0_STREAM_DDIA);</div><div class='add'>+			break;</div><div class='add'>+		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:</div><div class='add'>+			hdmi |= HDMI0_STREAM(HDMI0_STREAM_DVOA);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			dev_err(rdev-&gt;dev, "Unknown HDMI output type\n");</div><div class='add'>+			dev_err(rdev-&gt;dev, "Invalid encoder for HDMI: 0x%X\n",</div><div class='add'>+				radeon_encoder-&gt;encoder_id);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='add'>+		WREG32(HDMI0_CONTROL + offset, hdmi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (rdev-&gt;irq.installed</div><div class='del'>-	    &amp;&amp; rdev-&gt;family != CHIP_RS600</div><div class='del'>-	    &amp;&amp; rdev-&gt;family != CHIP_RS690</div><div class='del'>-	    &amp;&amp; rdev-&gt;family != CHIP_RS740</div><div class='del'>-	    &amp;&amp; !ASIC_IS_DCE4(rdev)) {</div><div class='add'>+	if (rdev-&gt;irq.installed) {</div><div class='ctx'> 		/* if irq is available use it */</div><div class='del'>-		rdev-&gt;irq.hdmi[offset == R600_HDMI_BLOCK1 ? 0 : 1] = true;</div><div class='add'>+		rdev-&gt;irq.afmt[dig-&gt;afmt-&gt;id] = true;</div><div class='ctx'> 		radeon_irq_set(rdev);</div><div class='del'>-</div><div class='del'>-		r600_audio_disable_polling(encoder);</div><div class='del'>-	} else {</div><div class='del'>-		/* if not fallback to polling */</div><div class='del'>-		r600_audio_enable_polling(encoder);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	dig-&gt;afmt-&gt;enabled = true;</div><div class='add'>+</div><div class='ctx'> 	DRM_DEBUG("Enabling HDMI interface @ 0x%04X for encoder 0x%x\n",</div><div class='del'>-		radeon_encoder-&gt;hdmi_offset, radeon_encoder-&gt;encoder_id);</div><div class='add'>+		  offset, radeon_encoder-&gt;encoder_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -575,51 +540,51 @@ void r600_hdmi_disable(struct drm_encoder *encoder)</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='ctx'> 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+	struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='ctx'> 	uint32_t offset;</div><div class='ctx'> </div><div class='ctx'> 	if (ASIC_IS_DCE5(rdev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	offset = radeon_encoder-&gt;hdmi_offset;</div><div class='del'>-	if (!offset) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "Disabling not enabled HDMI\n");</div><div class='add'>+	/* Called for ATOM_ENCODER_MODE_HDMI only */</div><div class='add'>+	if (!dig || !dig-&gt;afmt) {</div><div class='add'>+		WARN_ON(1);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+	if (!dig-&gt;afmt-&gt;enabled)</div><div class='add'>+		return;</div><div class='add'>+	offset = dig-&gt;afmt-&gt;offset;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG("Disabling HDMI interface @ 0x%04X for encoder 0x%x\n",</div><div class='del'>-		offset, radeon_encoder-&gt;encoder_id);</div><div class='add'>+		  offset, radeon_encoder-&gt;encoder_id);</div><div class='ctx'> </div><div class='ctx'> 	/* disable irq */</div><div class='del'>-	rdev-&gt;irq.hdmi[offset == R600_HDMI_BLOCK1 ? 0 : 1] = false;</div><div class='add'>+	rdev-&gt;irq.afmt[dig-&gt;afmt-&gt;id] = false;</div><div class='ctx'> 	radeon_irq_set(rdev);</div><div class='ctx'> </div><div class='del'>-	/* disable polling */</div><div class='del'>-	r600_audio_disable_polling(encoder);</div><div class='del'>-</div><div class='del'>-	if (ASIC_IS_DCE5(rdev)) {</div><div class='del'>-		/* TODO */</div><div class='del'>-	} else if (ASIC_IS_DCE4(rdev)) {</div><div class='del'>-		WREG32_P(radeon_encoder-&gt;hdmi_config_offset + 0xc, 0, ~0x1);</div><div class='del'>-	} else if (ASIC_IS_DCE32(rdev)) {</div><div class='del'>-		WREG32_P(radeon_encoder-&gt;hdmi_config_offset + 0x4, 0, ~0x1);</div><div class='del'>-	} else if (rdev-&gt;family &gt;= CHIP_R600 &amp;&amp; !ASIC_IS_DCE3(rdev)) {</div><div class='add'>+	/* Older chipsets not handled by AtomBIOS */</div><div class='add'>+	if (rdev-&gt;family &gt;= CHIP_R600 &amp;&amp; !ASIC_IS_DCE3(rdev)) {</div><div class='ctx'> 		switch (radeon_encoder-&gt;encoder_id) {</div><div class='ctx'> 		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:</div><div class='ctx'> 			WREG32_P(AVIVO_TMDSA_CNTL, 0,</div><div class='ctx'> 				 ~AVIVO_TMDSA_CNTL_HDMI_EN);</div><div class='del'>-			WREG32(offset + R600_HDMI_ENABLE, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ENCODER_OBJECT_ID_INTERNAL_LVTM1:</div><div class='ctx'> 			WREG32_P(AVIVO_LVTMA_CNTL, 0,</div><div class='ctx'> 				 ~AVIVO_LVTMA_CNTL_HDMI_EN);</div><div class='del'>-			WREG32(offset + R600_HDMI_ENABLE, 0);</div><div class='add'>+			break;</div><div class='add'>+		case ENCODER_OBJECT_ID_INTERNAL_DDI:</div><div class='add'>+			WREG32_P(DDIA_CNTL, 0, ~DDIA_HDMI_EN);</div><div class='add'>+			break;</div><div class='add'>+		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			dev_err(rdev-&gt;dev, "Unknown HDMI output type\n");</div><div class='add'>+			dev_err(rdev-&gt;dev, "Invalid encoder for HDMI: 0x%X\n",</div><div class='add'>+				radeon_encoder-&gt;encoder_id);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='add'>+		WREG32(HDMI0_CONTROL + offset, HDMI0_ERROR_ACK);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	radeon_encoder-&gt;hdmi_offset = 0;</div><div class='del'>-	radeon_encoder-&gt;hdmi_config_offset = 0;</div><div class='add'>+	dig-&gt;afmt-&gt;enabled = false;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/r600_reg.h b/drivers/gpu/drm/radeon/r600_reg.h<br/>index f869897c7456..2b960cb5c18a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600_reg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/r600_reg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600_reg.h</a></div><div class='hunk'>@@ -156,45 +156,10 @@</div><div class='ctx'> #define R600_AUDIO_PIN_WIDGET_CNTL        0x73d4</div><div class='ctx'> #define R600_AUDIO_STATUS_BITS            0x73d8</div><div class='ctx'> </div><div class='del'>-/* HDMI base register addresses */</div><div class='del'>-#define R600_HDMI_BLOCK1                  0x7400</div><div class='del'>-#define R600_HDMI_BLOCK2                  0x7700</div><div class='del'>-#define R600_HDMI_BLOCK3                  0x7800</div><div class='del'>-</div><div class='del'>-/* HDMI registers */</div><div class='del'>-#define R600_HDMI_ENABLE                0x00</div><div class='del'>-#define R600_HDMI_STATUS                0x04</div><div class='del'>-#       define R600_HDMI_INT_PENDING    (1 &lt;&lt; 29)</div><div class='del'>-#define R600_HDMI_CNTL                  0x08</div><div class='del'>-#       define R600_HDMI_INT_EN         (1 &lt;&lt; 28)</div><div class='del'>-#       define R600_HDMI_INT_ACK        (1 &lt;&lt; 29)</div><div class='del'>-#define R600_HDMI_UNKNOWN_0             0x0C</div><div class='del'>-#define R600_HDMI_AUDIOCNTL             0x10</div><div class='del'>-#define R600_HDMI_VIDEOCNTL             0x14</div><div class='del'>-#define R600_HDMI_VERSION               0x18</div><div class='del'>-#define R600_HDMI_UNKNOWN_1             0x28</div><div class='del'>-#define R600_HDMI_VIDEOINFOFRAME_0      0x54</div><div class='del'>-#define R600_HDMI_VIDEOINFOFRAME_1      0x58</div><div class='del'>-#define R600_HDMI_VIDEOINFOFRAME_2      0x5c</div><div class='del'>-#define R600_HDMI_VIDEOINFOFRAME_3      0x60</div><div class='del'>-#define R600_HDMI_32kHz_CTS             0xac</div><div class='del'>-#define R600_HDMI_32kHz_N               0xb0</div><div class='del'>-#define R600_HDMI_44_1kHz_CTS           0xb4</div><div class='del'>-#define R600_HDMI_44_1kHz_N             0xb8</div><div class='del'>-#define R600_HDMI_48kHz_CTS             0xbc</div><div class='del'>-#define R600_HDMI_48kHz_N               0xc0</div><div class='del'>-#define R600_HDMI_AUDIOINFOFRAME_0      0xcc</div><div class='del'>-#define R600_HDMI_AUDIOINFOFRAME_1      0xd0</div><div class='del'>-#define R600_HDMI_IEC60958_1            0xd4</div><div class='del'>-#define R600_HDMI_IEC60958_2            0xd8</div><div class='del'>-#define R600_HDMI_UNKNOWN_2             0xdc</div><div class='del'>-#define R600_HDMI_AUDIO_DEBUG_0         0xe0</div><div class='del'>-#define R600_HDMI_AUDIO_DEBUG_1         0xe4</div><div class='del'>-#define R600_HDMI_AUDIO_DEBUG_2         0xe8</div><div class='del'>-#define R600_HDMI_AUDIO_DEBUG_3         0xec</div><div class='del'>-</div><div class='del'>-/* HDMI additional config base register addresses */</div><div class='del'>-#define R600_HDMI_CONFIG1                 0x7600</div><div class='del'>-#define R600_HDMI_CONFIG2                 0x7a00</div><div class='add'>+#define DCE2_HDMI_OFFSET0		(0x7400 - 0x7400)</div><div class='add'>+#define DCE2_HDMI_OFFSET1		(0x7700 - 0x7400)</div><div class='add'>+/* DCE3.2 second instance starts at 0x7800 */</div><div class='add'>+#define DCE3_HDMI_OFFSET0		(0x7400 - 0x7400)</div><div class='add'>+#define DCE3_HDMI_OFFSET1		(0x7800 - 0x7400)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h<br/>index 59f9c993cc31..a0dbf1fe6a40 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600d.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/r600d.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/r600d.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/r600d.h</a></div><div class='hunk'>@@ -219,6 +219,8 @@</div><div class='ctx'> #define		BACKEND_MAP(x)					((x) &lt;&lt; 16)</div><div class='ctx'> </div><div class='ctx'> #define GB_TILING_CONFIG				0x98F0</div><div class='add'>+#define     PIPE_TILING__SHIFT              1</div><div class='add'>+#define     PIPE_TILING__MASK               0x0000000e</div><div class='ctx'> </div><div class='ctx'> #define	GC_USER_SHADER_PIPE_CONFIG			0x8954</div><div class='ctx'> #define		INACTIVE_QD_PIPES(x)				((x) &lt;&lt; 8)</div><div class='hunk'>@@ -824,6 +826,239 @@</div><div class='ctx'> #       define TARGET_LINK_SPEED_MASK                     (0xf &lt;&lt; 0)</div><div class='ctx'> #       define SELECTABLE_DEEMPHASIS                      (1 &lt;&lt; 6)</div><div class='ctx'> </div><div class='add'>+/* Audio clocks */</div><div class='add'>+#define DCCG_AUDIO_DTO0_PHASE             0x0514</div><div class='add'>+#define DCCG_AUDIO_DTO0_MODULE            0x0518</div><div class='add'>+#define DCCG_AUDIO_DTO0_LOAD              0x051c</div><div class='add'>+#       define DTO_LOAD                   (1 &lt;&lt; 31)</div><div class='add'>+#define DCCG_AUDIO_DTO0_CNTL              0x0520</div><div class='add'>+</div><div class='add'>+#define DCCG_AUDIO_DTO1_PHASE             0x0524</div><div class='add'>+#define DCCG_AUDIO_DTO1_MODULE            0x0528</div><div class='add'>+#define DCCG_AUDIO_DTO1_LOAD              0x052c</div><div class='add'>+#define DCCG_AUDIO_DTO1_CNTL              0x0530</div><div class='add'>+</div><div class='add'>+#define DCCG_AUDIO_DTO_SELECT             0x0534</div><div class='add'>+</div><div class='add'>+/* digital blocks */</div><div class='add'>+#define TMDSA_CNTL                       0x7880</div><div class='add'>+#       define TMDSA_HDMI_EN             (1 &lt;&lt; 2)</div><div class='add'>+#define LVTMA_CNTL                       0x7a80</div><div class='add'>+#       define LVTMA_HDMI_EN             (1 &lt;&lt; 2)</div><div class='add'>+#define DDIA_CNTL                        0x7200</div><div class='add'>+#       define DDIA_HDMI_EN              (1 &lt;&lt; 2)</div><div class='add'>+#define DIG0_CNTL                        0x75a0</div><div class='add'>+#       define DIG_MODE(x)               (((x) &amp; 7) &lt;&lt; 8)</div><div class='add'>+#       define DIG_MODE_DP               0</div><div class='add'>+#       define DIG_MODE_LVDS             1</div><div class='add'>+#       define DIG_MODE_TMDS_DVI         2</div><div class='add'>+#       define DIG_MODE_TMDS_HDMI        3</div><div class='add'>+#       define DIG_MODE_SDVO             4</div><div class='add'>+#define DIG1_CNTL                        0x79a0</div><div class='add'>+</div><div class='add'>+/* rs6xx/rs740 and r6xx share the same HDMI blocks, however, rs6xx has only one</div><div class='add'>+ * instance of the blocks while r6xx has 2.  DCE 3.0 cards are slightly</div><div class='add'>+ * different due to the new DIG blocks, but also have 2 instances.</div><div class='add'>+ * DCE 3.0 HDMI blocks are part of each DIG encoder.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* rs6xx/rs740/r6xx/dce3 */</div><div class='add'>+#define HDMI0_CONTROL                0x7400</div><div class='add'>+/* rs6xx/rs740/r6xx */</div><div class='add'>+#       define HDMI0_ENABLE          (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_STREAM(x)       (((x) &amp; 3) &lt;&lt; 2)</div><div class='add'>+#       define HDMI0_STREAM_TMDSA    0</div><div class='add'>+#       define HDMI0_STREAM_LVTMA    1</div><div class='add'>+#       define HDMI0_STREAM_DVOA     2</div><div class='add'>+#       define HDMI0_STREAM_DDIA     3</div><div class='add'>+/* rs6xx/r6xx/dce3 */</div><div class='add'>+#       define HDMI0_ERROR_ACK       (1 &lt;&lt; 8)</div><div class='add'>+#       define HDMI0_ERROR_MASK      (1 &lt;&lt; 9)</div><div class='add'>+#define HDMI0_STATUS                 0x7404</div><div class='add'>+#       define HDMI0_ACTIVE_AVMUTE   (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_AUDIO_ENABLE    (1 &lt;&lt; 4)</div><div class='add'>+#       define HDMI0_AZ_FORMAT_WTRIG     (1 &lt;&lt; 28)</div><div class='add'>+#       define HDMI0_AZ_FORMAT_WTRIG_INT (1 &lt;&lt; 29)</div><div class='add'>+#define HDMI0_AUDIO_PACKET_CONTROL   0x7408</div><div class='add'>+#       define HDMI0_AUDIO_SAMPLE_SEND  (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_AUDIO_DELAY_EN(x)  (((x) &amp; 3) &lt;&lt; 4)</div><div class='add'>+#       define HDMI0_AUDIO_SEND_MAX_PACKETS  (1 &lt;&lt; 8)</div><div class='add'>+#       define HDMI0_AUDIO_TEST_EN         (1 &lt;&lt; 12)</div><div class='add'>+#       define HDMI0_AUDIO_PACKETS_PER_LINE(x)  (((x) &amp; 0x1f) &lt;&lt; 16)</div><div class='add'>+#       define HDMI0_AUDIO_CHANNEL_SWAP    (1 &lt;&lt; 24)</div><div class='add'>+#       define HDMI0_60958_CS_UPDATE       (1 &lt;&lt; 26)</div><div class='add'>+#       define HDMI0_AZ_FORMAT_WTRIG_MASK  (1 &lt;&lt; 28)</div><div class='add'>+#       define HDMI0_AZ_FORMAT_WTRIG_ACK   (1 &lt;&lt; 29)</div><div class='add'>+#define HDMI0_AUDIO_CRC_CONTROL      0x740c</div><div class='add'>+#       define HDMI0_AUDIO_CRC_EN    (1 &lt;&lt; 0)</div><div class='add'>+#define HDMI0_VBI_PACKET_CONTROL     0x7410</div><div class='add'>+#       define HDMI0_NULL_SEND       (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_GC_SEND         (1 &lt;&lt; 4)</div><div class='add'>+#       define HDMI0_GC_CONT         (1 &lt;&lt; 5) /* 0 - once; 1 - every frame */</div><div class='add'>+#define HDMI0_INFOFRAME_CONTROL0     0x7414</div><div class='add'>+#       define HDMI0_AVI_INFO_SEND   (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_AVI_INFO_CONT   (1 &lt;&lt; 1)</div><div class='add'>+#       define HDMI0_AUDIO_INFO_SEND (1 &lt;&lt; 4)</div><div class='add'>+#       define HDMI0_AUDIO_INFO_CONT (1 &lt;&lt; 5)</div><div class='add'>+#       define HDMI0_AUDIO_INFO_SOURCE (1 &lt;&lt; 6) /* 0 - sound block; 1 - hmdi regs */</div><div class='add'>+#       define HDMI0_AUDIO_INFO_UPDATE (1 &lt;&lt; 7)</div><div class='add'>+#       define HDMI0_MPEG_INFO_SEND  (1 &lt;&lt; 8)</div><div class='add'>+#       define HDMI0_MPEG_INFO_CONT  (1 &lt;&lt; 9)</div><div class='add'>+#       define HDMI0_MPEG_INFO_UPDATE  (1 &lt;&lt; 10)</div><div class='add'>+#define HDMI0_INFOFRAME_CONTROL1     0x7418</div><div class='add'>+#       define HDMI0_AVI_INFO_LINE(x)  (((x) &amp; 0x3f) &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_AUDIO_INFO_LINE(x)  (((x) &amp; 0x3f) &lt;&lt; 8)</div><div class='add'>+#       define HDMI0_MPEG_INFO_LINE(x)  (((x) &amp; 0x3f) &lt;&lt; 16)</div><div class='add'>+#define HDMI0_GENERIC_PACKET_CONTROL 0x741c</div><div class='add'>+#       define HDMI0_GENERIC0_SEND   (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_GENERIC0_CONT   (1 &lt;&lt; 1)</div><div class='add'>+#       define HDMI0_GENERIC0_UPDATE (1 &lt;&lt; 2)</div><div class='add'>+#       define HDMI0_GENERIC1_SEND   (1 &lt;&lt; 4)</div><div class='add'>+#       define HDMI0_GENERIC1_CONT   (1 &lt;&lt; 5)</div><div class='add'>+#       define HDMI0_GENERIC0_LINE(x)  (((x) &amp; 0x3f) &lt;&lt; 16)</div><div class='add'>+#       define HDMI0_GENERIC1_LINE(x)  (((x) &amp; 0x3f) &lt;&lt; 24)</div><div class='add'>+#define HDMI0_GC                     0x7428</div><div class='add'>+#       define HDMI0_GC_AVMUTE       (1 &lt;&lt; 0)</div><div class='add'>+#define HDMI0_AVI_INFO0              0x7454</div><div class='add'>+#       define HDMI0_AVI_INFO_CHECKSUM(x)  (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_AVI_INFO_S(x)   (((x) &amp; 3) &lt;&lt; 8)</div><div class='add'>+#       define HDMI0_AVI_INFO_B(x)   (((x) &amp; 3) &lt;&lt; 10)</div><div class='add'>+#       define HDMI0_AVI_INFO_A(x)   (((x) &amp; 1) &lt;&lt; 12)</div><div class='add'>+#       define HDMI0_AVI_INFO_Y(x)   (((x) &amp; 3) &lt;&lt; 13)</div><div class='add'>+#       define HDMI0_AVI_INFO_Y_RGB       0</div><div class='add'>+#       define HDMI0_AVI_INFO_Y_YCBCR422  1</div><div class='add'>+#       define HDMI0_AVI_INFO_Y_YCBCR444  2</div><div class='add'>+#       define HDMI0_AVI_INFO_Y_A_B_S(x)   (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#       define HDMI0_AVI_INFO_R(x)   (((x) &amp; 0xf) &lt;&lt; 16)</div><div class='add'>+#       define HDMI0_AVI_INFO_M(x)   (((x) &amp; 0x3) &lt;&lt; 20)</div><div class='add'>+#       define HDMI0_AVI_INFO_C(x)   (((x) &amp; 0x3) &lt;&lt; 22)</div><div class='add'>+#       define HDMI0_AVI_INFO_C_M_R(x)   (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='add'>+#       define HDMI0_AVI_INFO_SC(x)  (((x) &amp; 0x3) &lt;&lt; 24)</div><div class='add'>+#       define HDMI0_AVI_INFO_ITC_EC_Q_SC(x)  (((x) &amp; 0xff) &lt;&lt; 24)</div><div class='add'>+#define HDMI0_AVI_INFO1              0x7458</div><div class='add'>+#       define HDMI0_AVI_INFO_VIC(x) (((x) &amp; 0x7f) &lt;&lt; 0) /* don't use avi infoframe v1 */</div><div class='add'>+#       define HDMI0_AVI_INFO_PR(x)  (((x) &amp; 0xf) &lt;&lt; 8) /* don't use avi infoframe v1 */</div><div class='add'>+#       define HDMI0_AVI_INFO_TOP(x) (((x) &amp; 0xffff) &lt;&lt; 16)</div><div class='add'>+#define HDMI0_AVI_INFO2              0x745c</div><div class='add'>+#       define HDMI0_AVI_INFO_BOTTOM(x)  (((x) &amp; 0xffff) &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_AVI_INFO_LEFT(x)    (((x) &amp; 0xffff) &lt;&lt; 16)</div><div class='add'>+#define HDMI0_AVI_INFO3              0x7460</div><div class='add'>+#       define HDMI0_AVI_INFO_RIGHT(x)    (((x) &amp; 0xffff) &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_AVI_INFO_VERSION(x)  (((x) &amp; 3) &lt;&lt; 24)</div><div class='add'>+#define HDMI0_MPEG_INFO0             0x7464</div><div class='add'>+#       define HDMI0_MPEG_INFO_CHECKSUM(x)  (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_MPEG_INFO_MB0(x)  (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#       define HDMI0_MPEG_INFO_MB1(x)  (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='add'>+#       define HDMI0_MPEG_INFO_MB2(x)  (((x) &amp; 0xff) &lt;&lt; 24)</div><div class='add'>+#define HDMI0_MPEG_INFO1             0x7468</div><div class='add'>+#       define HDMI0_MPEG_INFO_MB3(x)  (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_MPEG_INFO_MF(x)   (((x) &amp; 3) &lt;&lt; 8)</div><div class='add'>+#       define HDMI0_MPEG_INFO_FR(x)   (((x) &amp; 1) &lt;&lt; 12)</div><div class='add'>+#define HDMI0_GENERIC0_HDR           0x746c</div><div class='add'>+#define HDMI0_GENERIC0_0             0x7470</div><div class='add'>+#define HDMI0_GENERIC0_1             0x7474</div><div class='add'>+#define HDMI0_GENERIC0_2             0x7478</div><div class='add'>+#define HDMI0_GENERIC0_3             0x747c</div><div class='add'>+#define HDMI0_GENERIC0_4             0x7480</div><div class='add'>+#define HDMI0_GENERIC0_5             0x7484</div><div class='add'>+#define HDMI0_GENERIC0_6             0x7488</div><div class='add'>+#define HDMI0_GENERIC1_HDR           0x748c</div><div class='add'>+#define HDMI0_GENERIC1_0             0x7490</div><div class='add'>+#define HDMI0_GENERIC1_1             0x7494</div><div class='add'>+#define HDMI0_GENERIC1_2             0x7498</div><div class='add'>+#define HDMI0_GENERIC1_3             0x749c</div><div class='add'>+#define HDMI0_GENERIC1_4             0x74a0</div><div class='add'>+#define HDMI0_GENERIC1_5             0x74a4</div><div class='add'>+#define HDMI0_GENERIC1_6             0x74a8</div><div class='add'>+#define HDMI0_ACR_32_0               0x74ac</div><div class='add'>+#       define HDMI0_ACR_CTS_32(x)   (((x) &amp; 0xfffff) &lt;&lt; 12)</div><div class='add'>+#define HDMI0_ACR_32_1               0x74b0</div><div class='add'>+#       define HDMI0_ACR_N_32(x)   (((x) &amp; 0xfffff) &lt;&lt; 0)</div><div class='add'>+#define HDMI0_ACR_44_0               0x74b4</div><div class='add'>+#       define HDMI0_ACR_CTS_44(x)   (((x) &amp; 0xfffff) &lt;&lt; 12)</div><div class='add'>+#define HDMI0_ACR_44_1               0x74b8</div><div class='add'>+#       define HDMI0_ACR_N_44(x)   (((x) &amp; 0xfffff) &lt;&lt; 0)</div><div class='add'>+#define HDMI0_ACR_48_0               0x74bc</div><div class='add'>+#       define HDMI0_ACR_CTS_48(x)   (((x) &amp; 0xfffff) &lt;&lt; 12)</div><div class='add'>+#define HDMI0_ACR_48_1               0x74c0</div><div class='add'>+#       define HDMI0_ACR_N_48(x)   (((x) &amp; 0xfffff) &lt;&lt; 0)</div><div class='add'>+#define HDMI0_ACR_STATUS_0           0x74c4</div><div class='add'>+#define HDMI0_ACR_STATUS_1           0x74c8</div><div class='add'>+#define HDMI0_AUDIO_INFO0            0x74cc</div><div class='add'>+#       define HDMI0_AUDIO_INFO_CHECKSUM(x)  (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_AUDIO_INFO_CC(x)  (((x) &amp; 7) &lt;&lt; 8)</div><div class='add'>+#define HDMI0_AUDIO_INFO1            0x74d0</div><div class='add'>+#       define HDMI0_AUDIO_INFO_CA(x)  (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_AUDIO_INFO_LSV(x)  (((x) &amp; 0xf) &lt;&lt; 11)</div><div class='add'>+#       define HDMI0_AUDIO_INFO_DM_INH(x)  (((x) &amp; 1) &lt;&lt; 15)</div><div class='add'>+#       define HDMI0_AUDIO_INFO_DM_INH_LSV(x)  (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#define HDMI0_60958_0                0x74d4</div><div class='add'>+#       define HDMI0_60958_CS_A(x)   (((x) &amp; 1) &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_60958_CS_B(x)   (((x) &amp; 1) &lt;&lt; 1)</div><div class='add'>+#       define HDMI0_60958_CS_C(x)   (((x) &amp; 1) &lt;&lt; 2)</div><div class='add'>+#       define HDMI0_60958_CS_D(x)   (((x) &amp; 3) &lt;&lt; 3)</div><div class='add'>+#       define HDMI0_60958_CS_MODE(x)   (((x) &amp; 3) &lt;&lt; 6)</div><div class='add'>+#       define HDMI0_60958_CS_CATEGORY_CODE(x)      (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#       define HDMI0_60958_CS_SOURCE_NUMBER(x)      (((x) &amp; 0xf) &lt;&lt; 16)</div><div class='add'>+#       define HDMI0_60958_CS_CHANNEL_NUMBER_L(x)   (((x) &amp; 0xf) &lt;&lt; 20)</div><div class='add'>+#       define HDMI0_60958_CS_SAMPLING_FREQUENCY(x) (((x) &amp; 0xf) &lt;&lt; 24)</div><div class='add'>+#       define HDMI0_60958_CS_CLOCK_ACCURACY(x)     (((x) &amp; 3) &lt;&lt; 28)</div><div class='add'>+#define HDMI0_60958_1                0x74d8</div><div class='add'>+#       define HDMI0_60958_CS_WORD_LENGTH(x)        (((x) &amp; 0xf) &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_60958_CS_ORIGINAL_SAMPLING_FREQUENCY(x)   (((x) &amp; 0xf) &lt;&lt; 4)</div><div class='add'>+#       define HDMI0_60958_CS_VALID_L(x)   (((x) &amp; 1) &lt;&lt; 16)</div><div class='add'>+#       define HDMI0_60958_CS_VALID_R(x)   (((x) &amp; 1) &lt;&lt; 18)</div><div class='add'>+#       define HDMI0_60958_CS_CHANNEL_NUMBER_R(x)   (((x) &amp; 0xf) &lt;&lt; 20)</div><div class='add'>+#define HDMI0_ACR_PACKET_CONTROL     0x74dc</div><div class='add'>+#       define HDMI0_ACR_SEND        (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_ACR_CONT        (1 &lt;&lt; 1)</div><div class='add'>+#       define HDMI0_ACR_SELECT(x)   (((x) &amp; 3) &lt;&lt; 4)</div><div class='add'>+#       define HDMI0_ACR_HW          0</div><div class='add'>+#       define HDMI0_ACR_32          1</div><div class='add'>+#       define HDMI0_ACR_44          2</div><div class='add'>+#       define HDMI0_ACR_48          3</div><div class='add'>+#       define HDMI0_ACR_SOURCE      (1 &lt;&lt; 8) /* 0 - hw; 1 - cts value */</div><div class='add'>+#       define HDMI0_ACR_AUTO_SEND   (1 &lt;&lt; 12)</div><div class='add'>+#define HDMI0_RAMP_CONTROL0          0x74e0</div><div class='add'>+#       define HDMI0_RAMP_MAX_COUNT(x)   (((x) &amp; 0xffffff) &lt;&lt; 0)</div><div class='add'>+#define HDMI0_RAMP_CONTROL1          0x74e4</div><div class='add'>+#       define HDMI0_RAMP_MIN_COUNT(x)   (((x) &amp; 0xffffff) &lt;&lt; 0)</div><div class='add'>+#define HDMI0_RAMP_CONTROL2          0x74e8</div><div class='add'>+#       define HDMI0_RAMP_INC_COUNT(x)   (((x) &amp; 0xffffff) &lt;&lt; 0)</div><div class='add'>+#define HDMI0_RAMP_CONTROL3          0x74ec</div><div class='add'>+#       define HDMI0_RAMP_DEC_COUNT(x)   (((x) &amp; 0xffffff) &lt;&lt; 0)</div><div class='add'>+/* HDMI0_60958_2 is r7xx only */</div><div class='add'>+#define HDMI0_60958_2                0x74f0</div><div class='add'>+#       define HDMI0_60958_CS_CHANNEL_NUMBER_2(x)   (((x) &amp; 0xf) &lt;&lt; 0)</div><div class='add'>+#       define HDMI0_60958_CS_CHANNEL_NUMBER_3(x)   (((x) &amp; 0xf) &lt;&lt; 4)</div><div class='add'>+#       define HDMI0_60958_CS_CHANNEL_NUMBER_4(x)   (((x) &amp; 0xf) &lt;&lt; 8)</div><div class='add'>+#       define HDMI0_60958_CS_CHANNEL_NUMBER_5(x)   (((x) &amp; 0xf) &lt;&lt; 12)</div><div class='add'>+#       define HDMI0_60958_CS_CHANNEL_NUMBER_6(x)   (((x) &amp; 0xf) &lt;&lt; 16)</div><div class='add'>+#       define HDMI0_60958_CS_CHANNEL_NUMBER_7(x)   (((x) &amp; 0xf) &lt;&lt; 20)</div><div class='add'>+/* r6xx only; second instance starts at 0x7700 */</div><div class='add'>+#define HDMI1_CONTROL                0x7700</div><div class='add'>+#define HDMI1_STATUS                 0x7704</div><div class='add'>+#define HDMI1_AUDIO_PACKET_CONTROL   0x7708</div><div class='add'>+/* DCE3; second instance starts at 0x7800 NOT 0x7700 */</div><div class='add'>+#define DCE3_HDMI1_CONTROL                0x7800</div><div class='add'>+#define DCE3_HDMI1_STATUS                 0x7804</div><div class='add'>+#define DCE3_HDMI1_AUDIO_PACKET_CONTROL   0x7808</div><div class='add'>+/* DCE3.2 (for interrupts) */</div><div class='add'>+#define AFMT_STATUS                          0x7600</div><div class='add'>+#       define AFMT_AUDIO_ENABLE             (1 &lt;&lt; 4)</div><div class='add'>+#       define AFMT_AZ_FORMAT_WTRIG          (1 &lt;&lt; 28)</div><div class='add'>+#       define AFMT_AZ_FORMAT_WTRIG_INT      (1 &lt;&lt; 29)</div><div class='add'>+#       define AFMT_AZ_AUDIO_ENABLE_CHG      (1 &lt;&lt; 30)</div><div class='add'>+#define AFMT_AUDIO_PACKET_CONTROL            0x7604</div><div class='add'>+#       define AFMT_AUDIO_SAMPLE_SEND        (1 &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AUDIO_TEST_EN            (1 &lt;&lt; 12)</div><div class='add'>+#       define AFMT_AUDIO_CHANNEL_SWAP       (1 &lt;&lt; 24)</div><div class='add'>+#       define AFMT_60958_CS_UPDATE          (1 &lt;&lt; 26)</div><div class='add'>+#       define AFMT_AZ_AUDIO_ENABLE_CHG_MASK (1 &lt;&lt; 27)</div><div class='add'>+#       define AFMT_AZ_FORMAT_WTRIG_MASK     (1 &lt;&lt; 28)</div><div class='add'>+#       define AFMT_AZ_FORMAT_WTRIG_ACK      (1 &lt;&lt; 29)</div><div class='add'>+#       define AFMT_AZ_AUDIO_ENABLE_CHG_ACK  (1 &lt;&lt; 30)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * PM4</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h<br/>index 138b95216d8d..fefcca55c1eb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon.h</a></div><div class='hunk'>@@ -94,33 +94,38 @@ extern int radeon_disp_priority;</div><div class='ctx'> extern int radeon_hw_i2c;</div><div class='ctx'> extern int radeon_pcie_gen2;</div><div class='ctx'> extern int radeon_msi;</div><div class='add'>+extern int radeon_lockup_timeout;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Copy from radeon_drv.h so we don't have to include both and have conflicting</div><div class='ctx'>  * symbol;</div><div class='ctx'>  */</div><div class='del'>-#define RADEON_MAX_USEC_TIMEOUT		100000	/* 100 ms */</div><div class='del'>-#define RADEON_FENCE_JIFFIES_TIMEOUT	(HZ / 2)</div><div class='add'>+#define RADEON_MAX_USEC_TIMEOUT			100000	/* 100 ms */</div><div class='add'>+#define RADEON_FENCE_JIFFIES_TIMEOUT		(HZ / 2)</div><div class='ctx'> /* RADEON_IB_POOL_SIZE must be a power of 2 */</div><div class='del'>-#define RADEON_IB_POOL_SIZE		16</div><div class='del'>-#define RADEON_DEBUGFS_MAX_COMPONENTS	32</div><div class='del'>-#define RADEONFB_CONN_LIMIT		4</div><div class='del'>-#define RADEON_BIOS_NUM_SCRATCH		8</div><div class='add'>+#define RADEON_IB_POOL_SIZE			16</div><div class='add'>+#define RADEON_DEBUGFS_MAX_COMPONENTS		32</div><div class='add'>+#define RADEONFB_CONN_LIMIT			4</div><div class='add'>+#define RADEON_BIOS_NUM_SCRATCH			8</div><div class='ctx'> </div><div class='ctx'> /* max number of rings */</div><div class='del'>-#define RADEON_NUM_RINGS 3</div><div class='add'>+#define RADEON_NUM_RINGS			3</div><div class='add'>+</div><div class='add'>+/* fence seq are set to this number when signaled */</div><div class='add'>+#define RADEON_FENCE_SIGNALED_SEQ		0LL</div><div class='add'>+#define RADEON_FENCE_NOTEMITED_SEQ		(~0LL)</div><div class='ctx'> </div><div class='ctx'> /* internal ring indices */</div><div class='ctx'> /* r1xx+ has gfx CP ring */</div><div class='del'>-#define RADEON_RING_TYPE_GFX_INDEX  0</div><div class='add'>+#define RADEON_RING_TYPE_GFX_INDEX		0</div><div class='ctx'> </div><div class='ctx'> /* cayman has 2 compute CP rings */</div><div class='del'>-#define CAYMAN_RING_TYPE_CP1_INDEX 1</div><div class='del'>-#define CAYMAN_RING_TYPE_CP2_INDEX 2</div><div class='add'>+#define CAYMAN_RING_TYPE_CP1_INDEX		1</div><div class='add'>+#define CAYMAN_RING_TYPE_CP2_INDEX		2</div><div class='ctx'> </div><div class='ctx'> /* hardcode those limit for now */</div><div class='del'>-#define RADEON_VA_RESERVED_SIZE		(8 &lt;&lt; 20)</div><div class='del'>-#define RADEON_IB_VM_MAX_SIZE		(64 &lt;&lt; 10)</div><div class='add'>+#define RADEON_VA_RESERVED_SIZE			(8 &lt;&lt; 20)</div><div class='add'>+#define RADEON_IB_VM_MAX_SIZE			(64 &lt;&lt; 10)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Errata workarounds.</div><div class='hunk'>@@ -253,28 +258,20 @@ struct radeon_fence_driver {</div><div class='ctx'> 	uint32_t			scratch_reg;</div><div class='ctx'> 	uint64_t			gpu_addr;</div><div class='ctx'> 	volatile uint32_t		*cpu_addr;</div><div class='del'>-	atomic_t			seq;</div><div class='del'>-	uint32_t			last_seq;</div><div class='del'>-	unsigned long			last_jiffies;</div><div class='del'>-	unsigned long			last_timeout;</div><div class='del'>-	wait_queue_head_t		queue;</div><div class='del'>-	struct list_head		created;</div><div class='del'>-	struct list_head		emitted;</div><div class='del'>-	struct list_head		signaled;</div><div class='add'>+	/* seq is protected by ring emission lock */</div><div class='add'>+	uint64_t			seq;</div><div class='add'>+	atomic64_t			last_seq;</div><div class='add'>+	unsigned long			last_activity;</div><div class='ctx'> 	bool				initialized;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct radeon_fence {</div><div class='ctx'> 	struct radeon_device		*rdev;</div><div class='ctx'> 	struct kref			kref;</div><div class='del'>-	struct list_head		list;</div><div class='ctx'> 	/* protected by radeon_fence.lock */</div><div class='del'>-	uint32_t			seq;</div><div class='del'>-	bool				emitted;</div><div class='del'>-	bool				signaled;</div><div class='add'>+	uint64_t			seq;</div><div class='ctx'> 	/* RB, DMA, etc. */</div><div class='del'>-	int				ring;</div><div class='del'>-	struct radeon_semaphore		*semaphore;</div><div class='add'>+	unsigned			ring;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring);</div><div class='hunk'>@@ -285,11 +282,14 @@ int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence);</div><div class='ctx'> void radeon_fence_process(struct radeon_device *rdev, int ring);</div><div class='ctx'> bool radeon_fence_signaled(struct radeon_fence *fence);</div><div class='ctx'> int radeon_fence_wait(struct radeon_fence *fence, bool interruptible);</div><div class='del'>-int radeon_fence_wait_next(struct radeon_device *rdev, int ring);</div><div class='del'>-int radeon_fence_wait_last(struct radeon_device *rdev, int ring);</div><div class='add'>+int radeon_fence_wait_next_locked(struct radeon_device *rdev, int ring);</div><div class='add'>+int radeon_fence_wait_empty_locked(struct radeon_device *rdev, int ring);</div><div class='add'>+int radeon_fence_wait_any(struct radeon_device *rdev,</div><div class='add'>+			  struct radeon_fence **fences,</div><div class='add'>+			  bool intr);</div><div class='ctx'> struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence);</div><div class='ctx'> void radeon_fence_unref(struct radeon_fence **fence);</div><div class='del'>-int radeon_fence_count_emitted(struct radeon_device *rdev, int ring);</div><div class='add'>+unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Tiling registers</div><div class='hunk'>@@ -346,6 +346,9 @@ struct radeon_bo {</div><div class='ctx'> 	/* Constant after initialization */</div><div class='ctx'> 	struct radeon_device		*rdev;</div><div class='ctx'> 	struct drm_gem_object		gem_base;</div><div class='add'>+</div><div class='add'>+	struct ttm_bo_kmap_obj dma_buf_vmap;</div><div class='add'>+	int vmapping_count;</div><div class='ctx'> };</div><div class='ctx'> #define gem_to_radeon_bo(gobj) container_of((gobj), struct radeon_bo, gem_base)</div><div class='ctx'> </div><div class='hunk'>@@ -382,8 +385,11 @@ struct radeon_bo_list {</div><div class='ctx'>  * alignment).</div><div class='ctx'>  */</div><div class='ctx'> struct radeon_sa_manager {</div><div class='add'>+	spinlock_t		lock;</div><div class='ctx'> 	struct radeon_bo	*bo;</div><div class='del'>-	struct list_head	sa_bo;</div><div class='add'>+	struct list_head	*hole;</div><div class='add'>+	struct list_head	flist[RADEON_NUM_RINGS];</div><div class='add'>+	struct list_head	olist;</div><div class='ctx'> 	unsigned		size;</div><div class='ctx'> 	uint64_t		gpu_addr;</div><div class='ctx'> 	void			*cpu_ptr;</div><div class='hunk'>@@ -394,10 +400,12 @@ struct radeon_sa_bo;</div><div class='ctx'> </div><div class='ctx'> /* sub-allocation buffer */</div><div class='ctx'> struct radeon_sa_bo {</div><div class='del'>-	struct list_head		list;</div><div class='add'>+	struct list_head		olist;</div><div class='add'>+	struct list_head		flist;</div><div class='ctx'> 	struct radeon_sa_manager	*manager;</div><div class='del'>-	unsigned			offset;</div><div class='del'>-	unsigned			size;</div><div class='add'>+	unsigned			soffset;</div><div class='add'>+	unsigned			eoffset;</div><div class='add'>+	struct radeon_fence		*fence;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -428,42 +436,26 @@ int radeon_mode_dumb_destroy(struct drm_file *file_priv,</div><div class='ctx'> /*</div><div class='ctx'>  * Semaphores.</div><div class='ctx'>  */</div><div class='del'>-struct radeon_ring;</div><div class='del'>-</div><div class='del'>-#define	RADEON_SEMAPHORE_BO_SIZE	256</div><div class='del'>-</div><div class='del'>-struct radeon_semaphore_driver {</div><div class='del'>-	rwlock_t			lock;</div><div class='del'>-	struct list_head		bo;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct radeon_semaphore_bo;</div><div class='del'>-</div><div class='ctx'> /* everything here is constant */</div><div class='ctx'> struct radeon_semaphore {</div><div class='del'>-	struct list_head		list;</div><div class='add'>+	struct radeon_sa_bo		*sa_bo;</div><div class='add'>+	signed				waiters;</div><div class='ctx'> 	uint64_t			gpu_addr;</div><div class='del'>-	uint32_t			*cpu_ptr;</div><div class='del'>-	struct radeon_semaphore_bo	*bo;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct radeon_semaphore_bo {</div><div class='del'>-	struct list_head		list;</div><div class='del'>-	struct radeon_ib		*ib;</div><div class='del'>-	struct list_head		free;</div><div class='del'>-	struct radeon_semaphore		semaphores[RADEON_SEMAPHORE_BO_SIZE/8];</div><div class='del'>-	unsigned			nused;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void radeon_semaphore_driver_fini(struct radeon_device *rdev);</div><div class='ctx'> int radeon_semaphore_create(struct radeon_device *rdev,</div><div class='ctx'> 			    struct radeon_semaphore **semaphore);</div><div class='ctx'> void radeon_semaphore_emit_signal(struct radeon_device *rdev, int ring,</div><div class='ctx'> 				  struct radeon_semaphore *semaphore);</div><div class='ctx'> void radeon_semaphore_emit_wait(struct radeon_device *rdev, int ring,</div><div class='ctx'> 				struct radeon_semaphore *semaphore);</div><div class='add'>+int radeon_semaphore_sync_rings(struct radeon_device *rdev,</div><div class='add'>+				struct radeon_semaphore *semaphore,</div><div class='add'>+				bool sync_to[RADEON_NUM_RINGS],</div><div class='add'>+				int dst_ring);</div><div class='ctx'> void radeon_semaphore_free(struct radeon_device *rdev,</div><div class='del'>-			   struct radeon_semaphore *semaphore);</div><div class='add'>+			   struct radeon_semaphore *semaphore,</div><div class='add'>+			   struct radeon_fence *fence);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * GART structures, functions &amp; helpers</div><div class='hunk'>@@ -560,6 +552,7 @@ struct radeon_unpin_work {</div><div class='ctx'> </div><div class='ctx'> struct r500_irq_stat_regs {</div><div class='ctx'> 	u32 disp_int;</div><div class='add'>+	u32 hdmi0_status;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct r600_irq_stat_regs {</div><div class='hunk'>@@ -568,6 +561,8 @@ struct r600_irq_stat_regs {</div><div class='ctx'> 	u32 disp_int_cont2;</div><div class='ctx'> 	u32 d1grph_int;</div><div class='ctx'> 	u32 d2grph_int;</div><div class='add'>+	u32 hdmi0_status;</div><div class='add'>+	u32 hdmi1_status;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct evergreen_irq_stat_regs {</div><div class='hunk'>@@ -583,6 +578,12 @@ struct evergreen_irq_stat_regs {</div><div class='ctx'> 	u32 d4grph_int;</div><div class='ctx'> 	u32 d5grph_int;</div><div class='ctx'> 	u32 d6grph_int;</div><div class='add'>+	u32 afmt_status1;</div><div class='add'>+	u32 afmt_status2;</div><div class='add'>+	u32 afmt_status3;</div><div class='add'>+	u32 afmt_status4;</div><div class='add'>+	u32 afmt_status5;</div><div class='add'>+	u32 afmt_status6;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> union radeon_irq_stat_regs {</div><div class='hunk'>@@ -593,7 +594,7 @@ union radeon_irq_stat_regs {</div><div class='ctx'> </div><div class='ctx'> #define RADEON_MAX_HPD_PINS 6</div><div class='ctx'> #define RADEON_MAX_CRTCS 6</div><div class='del'>-#define RADEON_MAX_HDMI_BLOCKS 2</div><div class='add'>+#define RADEON_MAX_AFMT_BLOCKS 6</div><div class='ctx'> </div><div class='ctx'> struct radeon_irq {</div><div class='ctx'> 	bool		installed;</div><div class='hunk'>@@ -605,7 +606,7 @@ struct radeon_irq {</div><div class='ctx'> 	bool            gui_idle;</div><div class='ctx'> 	bool            gui_idle_acked;</div><div class='ctx'> 	wait_queue_head_t	idle_queue;</div><div class='del'>-	bool		hdmi[RADEON_MAX_HDMI_BLOCKS];</div><div class='add'>+	bool		afmt[RADEON_MAX_AFMT_BLOCKS];</div><div class='ctx'> 	spinlock_t sw_lock;</div><div class='ctx'> 	int sw_refcount[RADEON_NUM_RINGS];</div><div class='ctx'> 	union radeon_irq_stat_regs stat_regs;</div><div class='hunk'>@@ -625,26 +626,14 @@ void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc);</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> struct radeon_ib {</div><div class='del'>-	struct radeon_sa_bo	sa_bo;</div><div class='del'>-	unsigned		idx;</div><div class='del'>-	uint32_t		length_dw;</div><div class='del'>-	uint64_t		gpu_addr;</div><div class='del'>-	uint32_t		*ptr;</div><div class='del'>-	struct radeon_fence	*fence;</div><div class='del'>-	unsigned		vm_id;</div><div class='del'>-	bool			is_const_ib;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * locking -</div><div class='del'>- * mutex protects scheduled_ibs, ready, alloc_bm</div><div class='del'>- */</div><div class='del'>-struct radeon_ib_pool {</div><div class='del'>-	struct radeon_mutex		mutex;</div><div class='del'>-	struct radeon_sa_manager	sa_manager;</div><div class='del'>-	struct radeon_ib		ibs[RADEON_IB_POOL_SIZE];</div><div class='del'>-	bool				ready;</div><div class='del'>-	unsigned			head_id;</div><div class='add'>+	struct radeon_sa_bo		*sa_bo;</div><div class='add'>+	uint32_t			length_dw;</div><div class='add'>+	uint64_t			gpu_addr;</div><div class='add'>+	uint32_t			*ptr;</div><div class='add'>+	struct radeon_fence		*fence;</div><div class='add'>+	unsigned			vm_id;</div><div class='add'>+	bool				is_const_ib;</div><div class='add'>+	struct radeon_semaphore		*semaphore;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct radeon_ring {</div><div class='hunk'>@@ -659,10 +648,11 @@ struct radeon_ring {</div><div class='ctx'> 	unsigned		ring_size;</div><div class='ctx'> 	unsigned		ring_free_dw;</div><div class='ctx'> 	int			count_dw;</div><div class='add'>+	unsigned long		last_activity;</div><div class='add'>+	unsigned		last_rptr;</div><div class='ctx'> 	uint64_t		gpu_addr;</div><div class='ctx'> 	uint32_t		align_mask;</div><div class='ctx'> 	uint32_t		ptr_mask;</div><div class='del'>-	struct mutex		mutex;</div><div class='ctx'> 	bool			ready;</div><div class='ctx'> 	u32			ptr_reg_shift;</div><div class='ctx'> 	u32			ptr_reg_mask;</div><div class='hunk'>@@ -679,7 +669,7 @@ struct radeon_vm {</div><div class='ctx'> 	unsigned			last_pfn;</div><div class='ctx'> 	u64				pt_gpu_addr;</div><div class='ctx'> 	u64				*pt;</div><div class='del'>-	struct radeon_sa_bo		sa_bo;</div><div class='add'>+	struct radeon_sa_bo		*sa_bo;</div><div class='ctx'> 	struct mutex			mutex;</div><div class='ctx'> 	/* last fence for cs using this vm */</div><div class='ctx'> 	struct radeon_fence		*fence;</div><div class='hunk'>@@ -756,7 +746,6 @@ struct r600_blit_cp_primitives {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct r600_blit {</div><div class='del'>-	struct mutex		mutex;</div><div class='ctx'> 	struct radeon_bo	*shader_obj;</div><div class='ctx'> 	struct r600_blit_cp_primitives primitives;</div><div class='ctx'> 	int max_dim;</div><div class='hunk'>@@ -766,8 +755,6 @@ struct r600_blit {</div><div class='ctx'> 	u32 vs_offset, ps_offset;</div><div class='ctx'> 	u32 state_offset;</div><div class='ctx'> 	u32 state_len;</div><div class='del'>-	u32 vb_used, vb_total;</div><div class='del'>-	struct radeon_ib *vb_ib;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void r600_blit_suspend(struct radeon_device *rdev);</div><div class='hunk'>@@ -785,14 +772,14 @@ struct si_rlc {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int radeon_ib_get(struct radeon_device *rdev, int ring,</div><div class='del'>-		  struct radeon_ib **ib, unsigned size);</div><div class='del'>-void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib);</div><div class='del'>-bool radeon_ib_try_free(struct radeon_device *rdev, struct radeon_ib *ib);</div><div class='add'>+		  struct radeon_ib *ib, unsigned size);</div><div class='add'>+void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib);</div><div class='ctx'> int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib);</div><div class='ctx'> int radeon_ib_pool_init(struct radeon_device *rdev);</div><div class='ctx'> void radeon_ib_pool_fini(struct radeon_device *rdev);</div><div class='ctx'> int radeon_ib_pool_start(struct radeon_device *rdev);</div><div class='ctx'> int radeon_ib_pool_suspend(struct radeon_device *rdev);</div><div class='add'>+int radeon_ib_ring_tests(struct radeon_device *rdev);</div><div class='ctx'> /* Ring access between begin &amp; end cannot sleep */</div><div class='ctx'> int radeon_ring_index(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='ctx'> void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='hunk'>@@ -800,8 +787,12 @@ int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *cp, unsign</div><div class='ctx'> int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ndw);</div><div class='ctx'> void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='ctx'> void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='add'>+void radeon_ring_undo(struct radeon_ring *ring);</div><div class='ctx'> void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='ctx'> int radeon_ring_test(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='add'>+void radeon_ring_force_activity(struct radeon_device *rdev, struct radeon_ring *ring);</div><div class='add'>+void radeon_ring_lockup_update(struct radeon_ring *ring);</div><div class='add'>+bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring);</div><div class='ctx'> int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size,</div><div class='ctx'> 		     unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg,</div><div class='ctx'> 		     u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop);</div><div class='hunk'>@@ -850,8 +841,8 @@ struct radeon_cs_parser {</div><div class='ctx'> 	int			chunk_relocs_idx;</div><div class='ctx'> 	int			chunk_flags_idx;</div><div class='ctx'> 	int			chunk_const_ib_idx;</div><div class='del'>-	struct radeon_ib	*ib;</div><div class='del'>-	struct radeon_ib	*const_ib;</div><div class='add'>+	struct radeon_ib	ib;</div><div class='add'>+	struct radeon_ib	const_ib;</div><div class='ctx'> 	void			*track;</div><div class='ctx'> 	unsigned		family;</div><div class='ctx'> 	int			parser_error;</div><div class='hunk'>@@ -860,7 +851,6 @@ struct radeon_cs_parser {</div><div class='ctx'> 	s32			priority;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-extern int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx);</div><div class='ctx'> extern int radeon_cs_finish_pages(struct radeon_cs_parser *p);</div><div class='ctx'> extern u32 radeon_get_ib_value(struct radeon_cs_parser *p, int idx);</div><div class='ctx'> </div><div class='hunk'>@@ -1105,6 +1095,14 @@ int radeon_pm_get_type_index(struct radeon_device *rdev,</div><div class='ctx'> 			     enum radeon_pm_state_type ps_type,</div><div class='ctx'> 			     int instance);</div><div class='ctx'> </div><div class='add'>+struct r600_audio {</div><div class='add'>+	int			channels;</div><div class='add'>+	int			rate;</div><div class='add'>+	int			bits_per_sample;</div><div class='add'>+	u8			status_bits;</div><div class='add'>+	u8			category_code;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Benchmarking</div><div class='ctx'>  */</div><div class='hunk'>@@ -1144,7 +1142,6 @@ struct radeon_asic {</div><div class='ctx'> 	int (*resume)(struct radeon_device *rdev);</div><div class='ctx'> 	int (*suspend)(struct radeon_device *rdev);</div><div class='ctx'> 	void (*vga_set_state)(struct radeon_device *rdev, bool state);</div><div class='del'>-	bool (*gpu_is_lockup)(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='ctx'> 	int (*asic_reset)(struct radeon_device *rdev);</div><div class='ctx'> 	/* ioctl hw specific callback. Some hw might want to perform special</div><div class='ctx'> 	 * operation on specific ioctl. For instance on wait idle some hw</div><div class='hunk'>@@ -1173,6 +1170,7 @@ struct radeon_asic {</div><div class='ctx'> 		void (*ring_start)(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='ctx'> 		int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='ctx'> 		int (*ib_test)(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='add'>+		bool (*is_lockup)(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='ctx'> 	} ring[RADEON_NUM_RINGS];</div><div class='ctx'> 	/* irqs */</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -1251,16 +1249,10 @@ struct radeon_asic {</div><div class='ctx'> /*</div><div class='ctx'>  * Asic structures</div><div class='ctx'>  */</div><div class='del'>-struct r100_gpu_lockup {</div><div class='del'>-	unsigned long	last_jiffies;</div><div class='del'>-	u32		last_cp_rptr;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct r100_asic {</div><div class='ctx'> 	const unsigned		*reg_safe_bm;</div><div class='ctx'> 	unsigned		reg_safe_bm_size;</div><div class='ctx'> 	u32			hdp_cntl;</div><div class='del'>-	struct r100_gpu_lockup	lockup;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct r300_asic {</div><div class='hunk'>@@ -1268,7 +1260,6 @@ struct r300_asic {</div><div class='ctx'> 	unsigned		reg_safe_bm_size;</div><div class='ctx'> 	u32			resync_scratch;</div><div class='ctx'> 	u32			hdp_cntl;</div><div class='del'>-	struct r100_gpu_lockup	lockup;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct r600_asic {</div><div class='hunk'>@@ -1290,7 +1281,6 @@ struct r600_asic {</div><div class='ctx'> 	unsigned		tiling_group_size;</div><div class='ctx'> 	unsigned		tile_config;</div><div class='ctx'> 	unsigned		backend_map;</div><div class='del'>-	struct r100_gpu_lockup	lockup;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct rv770_asic {</div><div class='hunk'>@@ -1316,7 +1306,6 @@ struct rv770_asic {</div><div class='ctx'> 	unsigned		tiling_group_size;</div><div class='ctx'> 	unsigned		tile_config;</div><div class='ctx'> 	unsigned		backend_map;</div><div class='del'>-	struct r100_gpu_lockup	lockup;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct evergreen_asic {</div><div class='hunk'>@@ -1343,7 +1332,6 @@ struct evergreen_asic {</div><div class='ctx'> 	unsigned tiling_group_size;</div><div class='ctx'> 	unsigned tile_config;</div><div class='ctx'> 	unsigned backend_map;</div><div class='del'>-	struct r100_gpu_lockup	lockup;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct cayman_asic {</div><div class='hunk'>@@ -1382,14 +1370,13 @@ struct cayman_asic {</div><div class='ctx'> 	unsigned multi_gpu_tile_size;</div><div class='ctx'> </div><div class='ctx'> 	unsigned tile_config;</div><div class='del'>-	struct r100_gpu_lockup	lockup;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct si_asic {</div><div class='ctx'> 	unsigned max_shader_engines;</div><div class='del'>-	unsigned max_pipes_per_simd;</div><div class='ctx'> 	unsigned max_tile_pipes;</div><div class='del'>-	unsigned max_simds_per_se;</div><div class='add'>+	unsigned max_cu_per_sh;</div><div class='add'>+	unsigned max_sh_per_se;</div><div class='ctx'> 	unsigned max_backends_per_se;</div><div class='ctx'> 	unsigned max_texture_channel_caches;</div><div class='ctx'> 	unsigned max_gprs;</div><div class='hunk'>@@ -1400,7 +1387,6 @@ struct si_asic {</div><div class='ctx'> 	unsigned sc_hiz_tile_fifo_size;</div><div class='ctx'> 	unsigned sc_earlyz_tile_fifo_size;</div><div class='ctx'> </div><div class='del'>-	unsigned num_shader_engines;</div><div class='ctx'> 	unsigned num_tile_pipes;</div><div class='ctx'> 	unsigned num_backends_per_se;</div><div class='ctx'> 	unsigned backend_disable_mask_per_asic;</div><div class='hunk'>@@ -1413,7 +1399,6 @@ struct si_asic {</div><div class='ctx'> 	unsigned multi_gpu_tile_size;</div><div class='ctx'> </div><div class='ctx'> 	unsigned tile_config;</div><div class='del'>-	struct r100_gpu_lockup	lockup;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> union radeon_asic_config {</div><div class='hunk'>@@ -1516,11 +1501,12 @@ struct radeon_device {</div><div class='ctx'> 	struct radeon_mode_info		mode_info;</div><div class='ctx'> 	struct radeon_scratch		scratch;</div><div class='ctx'> 	struct radeon_mman		mman;</div><div class='del'>-	rwlock_t			fence_lock;</div><div class='ctx'> 	struct radeon_fence_driver	fence_drv[RADEON_NUM_RINGS];</div><div class='del'>-	struct radeon_semaphore_driver	semaphore_drv;</div><div class='add'>+	wait_queue_head_t		fence_queue;</div><div class='add'>+	struct mutex			ring_lock;</div><div class='ctx'> 	struct radeon_ring		ring[RADEON_NUM_RINGS];</div><div class='del'>-	struct radeon_ib_pool		ib_pool;</div><div class='add'>+	bool				ib_pool_ready;</div><div class='add'>+	struct radeon_sa_manager	ring_tmp_bo;</div><div class='ctx'> 	struct radeon_irq		irq;</div><div class='ctx'> 	struct radeon_asic		*asic;</div><div class='ctx'> 	struct radeon_gem		gem;</div><div class='hunk'>@@ -1529,7 +1515,6 @@ struct radeon_device {</div><div class='ctx'> 	struct radeon_mutex		cs_mutex;</div><div class='ctx'> 	struct radeon_wb		wb;</div><div class='ctx'> 	struct radeon_dummy_page	dummy_page;</div><div class='del'>-	bool				gpu_lockup;</div><div class='ctx'> 	bool				shutdown;</div><div class='ctx'> 	bool				suspend;</div><div class='ctx'> 	bool				need_dma32;</div><div class='hunk'>@@ -1546,19 +1531,12 @@ struct radeon_device {</div><div class='ctx'> 	struct r600_ih ih; /* r6/700 interrupt ring */</div><div class='ctx'> 	struct si_rlc rlc;</div><div class='ctx'> 	struct work_struct hotplug_work;</div><div class='add'>+	struct work_struct audio_work;</div><div class='ctx'> 	int num_crtc; /* number of crtcs */</div><div class='ctx'> 	struct mutex dc_hw_i2c_mutex; /* display controller hw i2c mutex */</div><div class='ctx'> 	struct mutex vram_mutex;</div><div class='del'>-</div><div class='del'>-	/* audio stuff */</div><div class='del'>-	bool			audio_enabled;</div><div class='del'>-	struct timer_list	audio_timer;</div><div class='del'>-	int			audio_channels;</div><div class='del'>-	int			audio_rate;</div><div class='del'>-	int			audio_bits_per_sample;</div><div class='del'>-	uint8_t			audio_status_bits;</div><div class='del'>-	uint8_t			audio_category_code;</div><div class='del'>-</div><div class='add'>+	bool audio_enabled;</div><div class='add'>+	struct r600_audio audio_status; /* audio stuff */</div><div class='ctx'> 	struct notifier_block acpi_nb;</div><div class='ctx'> 	/* only one userspace can use Hyperz features or CMASK at a time */</div><div class='ctx'> 	struct drm_file *hyperz_filp;</div><div class='hunk'>@@ -1730,7 +1708,6 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);</div><div class='ctx'> #define radeon_suspend(rdev) (rdev)-&gt;asic-&gt;suspend((rdev))</div><div class='ctx'> #define radeon_cs_parse(rdev, r, p) (rdev)-&gt;asic-&gt;ring[(r)].cs_parse((p))</div><div class='ctx'> #define radeon_vga_set_state(rdev, state) (rdev)-&gt;asic-&gt;vga_set_state((rdev), (state))</div><div class='del'>-#define radeon_gpu_is_lockup(rdev, cp) (rdev)-&gt;asic-&gt;gpu_is_lockup((rdev), (cp))</div><div class='ctx'> #define radeon_asic_reset(rdev) (rdev)-&gt;asic-&gt;asic_reset((rdev))</div><div class='ctx'> #define radeon_gart_tlb_flush(rdev) (rdev)-&gt;asic-&gt;gart.tlb_flush((rdev))</div><div class='ctx'> #define radeon_gart_set_page(rdev, i, p) (rdev)-&gt;asic-&gt;gart.set_page((rdev), (i), (p))</div><div class='hunk'>@@ -1739,6 +1716,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);</div><div class='ctx'> #define radeon_ib_test(rdev, r, cp) (rdev)-&gt;asic-&gt;ring[(r)].ib_test((rdev), (cp))</div><div class='ctx'> #define radeon_ring_ib_execute(rdev, r, ib) (rdev)-&gt;asic-&gt;ring[(r)].ib_execute((rdev), (ib))</div><div class='ctx'> #define radeon_ring_ib_parse(rdev, r, ib) (rdev)-&gt;asic-&gt;ring[(r)].ib_parse((rdev), (ib))</div><div class='add'>+#define radeon_ring_is_lockup(rdev, r, cp) (rdev)-&gt;asic-&gt;ring[(r)].is_lockup((rdev), (cp))</div><div class='ctx'> #define radeon_irq_set(rdev) (rdev)-&gt;asic-&gt;irq.set((rdev))</div><div class='ctx'> #define radeon_irq_process(rdev) (rdev)-&gt;asic-&gt;irq.process((rdev))</div><div class='ctx'> #define radeon_get_vblank_counter(rdev, crtc) (rdev)-&gt;asic-&gt;display.get_vblank_counter((rdev), (crtc))</div><div class='hunk'>@@ -1828,6 +1806,8 @@ int radeon_vm_bo_rmv(struct radeon_device *rdev,</div><div class='ctx'> 		     struct radeon_vm *vm,</div><div class='ctx'> 		     struct radeon_bo *bo);</div><div class='ctx'> </div><div class='add'>+/* audio */</div><div class='add'>+void r600_audio_update_hdmi(struct work_struct *work);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * R600 vram scratch functions</div><div class='hunk'>@@ -1848,9 +1828,36 @@ int r600_fmt_get_nblocksy(u32 format, u32 h);</div><div class='ctx'> /*</div><div class='ctx'>  * r600 functions used by radeon_encoder.c</div><div class='ctx'>  */</div><div class='add'>+struct radeon_hdmi_acr {</div><div class='add'>+	u32 clock;</div><div class='add'>+</div><div class='add'>+	int n_32khz;</div><div class='add'>+	int cts_32khz;</div><div class='add'>+</div><div class='add'>+	int n_44_1khz;</div><div class='add'>+	int cts_44_1khz;</div><div class='add'>+</div><div class='add'>+	int n_48khz;</div><div class='add'>+	int cts_48khz;</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct radeon_hdmi_acr r600_hdmi_acr(uint32_t clock);</div><div class='add'>+</div><div class='ctx'> extern void r600_hdmi_enable(struct drm_encoder *encoder);</div><div class='ctx'> extern void r600_hdmi_disable(struct drm_encoder *encoder);</div><div class='ctx'> extern void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode);</div><div class='add'>+extern u32 r6xx_remap_render_backend(struct radeon_device *rdev,</div><div class='add'>+				     u32 tiling_pipe_num,</div><div class='add'>+				     u32 max_rb_num,</div><div class='add'>+				     u32 total_max_rb_num,</div><div class='add'>+				     u32 enabled_rb_mask);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * evergreen functions used by radeon_encoder.c</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+extern void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode);</div><div class='ctx'> </div><div class='ctx'> extern int ni_init_microcode(struct radeon_device *rdev);</div><div class='ctx'> extern int ni_mc_load_microcode(struct radeon_device *rdev);</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c<br/>index be4dc2ff0e40..f533df5f7d50 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_asic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_asic.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_asic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_asic.c</a></div><div class='hunk'>@@ -134,7 +134,6 @@ static struct radeon_asic r100_asic = {</div><div class='ctx'> 	.suspend = &amp;r100_suspend,</div><div class='ctx'> 	.resume = &amp;r100_resume,</div><div class='ctx'> 	.vga_set_state = &amp;r100_vga_set_state,</div><div class='del'>-	.gpu_is_lockup = &amp;r100_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;r100_asic_reset,</div><div class='ctx'> 	.ioctl_wait_idle = NULL,</div><div class='ctx'> 	.gui_idle = &amp;r100_gui_idle,</div><div class='hunk'>@@ -152,6 +151,7 @@ static struct radeon_asic r100_asic = {</div><div class='ctx'> 			.ring_start = &amp;r100_ring_start,</div><div class='ctx'> 			.ring_test = &amp;r100_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r100_ib_test,</div><div class='add'>+			.is_lockup = &amp;r100_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -208,7 +208,6 @@ static struct radeon_asic r200_asic = {</div><div class='ctx'> 	.suspend = &amp;r100_suspend,</div><div class='ctx'> 	.resume = &amp;r100_resume,</div><div class='ctx'> 	.vga_set_state = &amp;r100_vga_set_state,</div><div class='del'>-	.gpu_is_lockup = &amp;r100_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;r100_asic_reset,</div><div class='ctx'> 	.ioctl_wait_idle = NULL,</div><div class='ctx'> 	.gui_idle = &amp;r100_gui_idle,</div><div class='hunk'>@@ -226,6 +225,7 @@ static struct radeon_asic r200_asic = {</div><div class='ctx'> 			.ring_start = &amp;r100_ring_start,</div><div class='ctx'> 			.ring_test = &amp;r100_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r100_ib_test,</div><div class='add'>+			.is_lockup = &amp;r100_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -282,7 +282,6 @@ static struct radeon_asic r300_asic = {</div><div class='ctx'> 	.suspend = &amp;r300_suspend,</div><div class='ctx'> 	.resume = &amp;r300_resume,</div><div class='ctx'> 	.vga_set_state = &amp;r100_vga_set_state,</div><div class='del'>-	.gpu_is_lockup = &amp;r300_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;r300_asic_reset,</div><div class='ctx'> 	.ioctl_wait_idle = NULL,</div><div class='ctx'> 	.gui_idle = &amp;r100_gui_idle,</div><div class='hunk'>@@ -300,6 +299,7 @@ static struct radeon_asic r300_asic = {</div><div class='ctx'> 			.ring_start = &amp;r300_ring_start,</div><div class='ctx'> 			.ring_test = &amp;r100_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r100_ib_test,</div><div class='add'>+			.is_lockup = &amp;r100_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -356,7 +356,6 @@ static struct radeon_asic r300_asic_pcie = {</div><div class='ctx'> 	.suspend = &amp;r300_suspend,</div><div class='ctx'> 	.resume = &amp;r300_resume,</div><div class='ctx'> 	.vga_set_state = &amp;r100_vga_set_state,</div><div class='del'>-	.gpu_is_lockup = &amp;r300_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;r300_asic_reset,</div><div class='ctx'> 	.ioctl_wait_idle = NULL,</div><div class='ctx'> 	.gui_idle = &amp;r100_gui_idle,</div><div class='hunk'>@@ -374,6 +373,7 @@ static struct radeon_asic r300_asic_pcie = {</div><div class='ctx'> 			.ring_start = &amp;r300_ring_start,</div><div class='ctx'> 			.ring_test = &amp;r100_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r100_ib_test,</div><div class='add'>+			.is_lockup = &amp;r100_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -430,7 +430,6 @@ static struct radeon_asic r420_asic = {</div><div class='ctx'> 	.suspend = &amp;r420_suspend,</div><div class='ctx'> 	.resume = &amp;r420_resume,</div><div class='ctx'> 	.vga_set_state = &amp;r100_vga_set_state,</div><div class='del'>-	.gpu_is_lockup = &amp;r300_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;r300_asic_reset,</div><div class='ctx'> 	.ioctl_wait_idle = NULL,</div><div class='ctx'> 	.gui_idle = &amp;r100_gui_idle,</div><div class='hunk'>@@ -448,6 +447,7 @@ static struct radeon_asic r420_asic = {</div><div class='ctx'> 			.ring_start = &amp;r300_ring_start,</div><div class='ctx'> 			.ring_test = &amp;r100_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r100_ib_test,</div><div class='add'>+			.is_lockup = &amp;r100_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -504,7 +504,6 @@ static struct radeon_asic rs400_asic = {</div><div class='ctx'> 	.suspend = &amp;rs400_suspend,</div><div class='ctx'> 	.resume = &amp;rs400_resume,</div><div class='ctx'> 	.vga_set_state = &amp;r100_vga_set_state,</div><div class='del'>-	.gpu_is_lockup = &amp;r300_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;r300_asic_reset,</div><div class='ctx'> 	.ioctl_wait_idle = NULL,</div><div class='ctx'> 	.gui_idle = &amp;r100_gui_idle,</div><div class='hunk'>@@ -522,6 +521,7 @@ static struct radeon_asic rs400_asic = {</div><div class='ctx'> 			.ring_start = &amp;r300_ring_start,</div><div class='ctx'> 			.ring_test = &amp;r100_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r100_ib_test,</div><div class='add'>+			.is_lockup = &amp;r100_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -578,7 +578,6 @@ static struct radeon_asic rs600_asic = {</div><div class='ctx'> 	.suspend = &amp;rs600_suspend,</div><div class='ctx'> 	.resume = &amp;rs600_resume,</div><div class='ctx'> 	.vga_set_state = &amp;r100_vga_set_state,</div><div class='del'>-	.gpu_is_lockup = &amp;r300_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;rs600_asic_reset,</div><div class='ctx'> 	.ioctl_wait_idle = NULL,</div><div class='ctx'> 	.gui_idle = &amp;r100_gui_idle,</div><div class='hunk'>@@ -596,6 +595,7 @@ static struct radeon_asic rs600_asic = {</div><div class='ctx'> 			.ring_start = &amp;r300_ring_start,</div><div class='ctx'> 			.ring_test = &amp;r100_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r100_ib_test,</div><div class='add'>+			.is_lockup = &amp;r100_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -652,7 +652,6 @@ static struct radeon_asic rs690_asic = {</div><div class='ctx'> 	.suspend = &amp;rs690_suspend,</div><div class='ctx'> 	.resume = &amp;rs690_resume,</div><div class='ctx'> 	.vga_set_state = &amp;r100_vga_set_state,</div><div class='del'>-	.gpu_is_lockup = &amp;r300_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;rs600_asic_reset,</div><div class='ctx'> 	.ioctl_wait_idle = NULL,</div><div class='ctx'> 	.gui_idle = &amp;r100_gui_idle,</div><div class='hunk'>@@ -670,6 +669,7 @@ static struct radeon_asic rs690_asic = {</div><div class='ctx'> 			.ring_start = &amp;r300_ring_start,</div><div class='ctx'> 			.ring_test = &amp;r100_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r100_ib_test,</div><div class='add'>+			.is_lockup = &amp;r100_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -726,7 +726,6 @@ static struct radeon_asic rv515_asic = {</div><div class='ctx'> 	.suspend = &amp;rv515_suspend,</div><div class='ctx'> 	.resume = &amp;rv515_resume,</div><div class='ctx'> 	.vga_set_state = &amp;r100_vga_set_state,</div><div class='del'>-	.gpu_is_lockup = &amp;r300_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;rs600_asic_reset,</div><div class='ctx'> 	.ioctl_wait_idle = NULL,</div><div class='ctx'> 	.gui_idle = &amp;r100_gui_idle,</div><div class='hunk'>@@ -744,6 +743,7 @@ static struct radeon_asic rv515_asic = {</div><div class='ctx'> 			.ring_start = &amp;rv515_ring_start,</div><div class='ctx'> 			.ring_test = &amp;r100_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r100_ib_test,</div><div class='add'>+			.is_lockup = &amp;r100_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -800,7 +800,6 @@ static struct radeon_asic r520_asic = {</div><div class='ctx'> 	.suspend = &amp;rv515_suspend,</div><div class='ctx'> 	.resume = &amp;r520_resume,</div><div class='ctx'> 	.vga_set_state = &amp;r100_vga_set_state,</div><div class='del'>-	.gpu_is_lockup = &amp;r300_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;rs600_asic_reset,</div><div class='ctx'> 	.ioctl_wait_idle = NULL,</div><div class='ctx'> 	.gui_idle = &amp;r100_gui_idle,</div><div class='hunk'>@@ -818,6 +817,7 @@ static struct radeon_asic r520_asic = {</div><div class='ctx'> 			.ring_start = &amp;rv515_ring_start,</div><div class='ctx'> 			.ring_test = &amp;r100_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r100_ib_test,</div><div class='add'>+			.is_lockup = &amp;r100_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -874,7 +874,6 @@ static struct radeon_asic r600_asic = {</div><div class='ctx'> 	.suspend = &amp;r600_suspend,</div><div class='ctx'> 	.resume = &amp;r600_resume,</div><div class='ctx'> 	.vga_set_state = &amp;r600_vga_set_state,</div><div class='del'>-	.gpu_is_lockup = &amp;r600_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;r600_asic_reset,</div><div class='ctx'> 	.ioctl_wait_idle = r600_ioctl_wait_idle,</div><div class='ctx'> 	.gui_idle = &amp;r600_gui_idle,</div><div class='hunk'>@@ -891,6 +890,7 @@ static struct radeon_asic r600_asic = {</div><div class='ctx'> 			.cs_parse = &amp;r600_cs_parse,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;r600_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -946,7 +946,6 @@ static struct radeon_asic rs780_asic = {</div><div class='ctx'> 	.fini = &amp;r600_fini,</div><div class='ctx'> 	.suspend = &amp;r600_suspend,</div><div class='ctx'> 	.resume = &amp;r600_resume,</div><div class='del'>-	.gpu_is_lockup = &amp;r600_gpu_is_lockup,</div><div class='ctx'> 	.vga_set_state = &amp;r600_vga_set_state,</div><div class='ctx'> 	.asic_reset = &amp;r600_asic_reset,</div><div class='ctx'> 	.ioctl_wait_idle = r600_ioctl_wait_idle,</div><div class='hunk'>@@ -964,6 +963,7 @@ static struct radeon_asic rs780_asic = {</div><div class='ctx'> 			.cs_parse = &amp;r600_cs_parse,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;r600_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -1020,7 +1020,6 @@ static struct radeon_asic rv770_asic = {</div><div class='ctx'> 	.suspend = &amp;rv770_suspend,</div><div class='ctx'> 	.resume = &amp;rv770_resume,</div><div class='ctx'> 	.asic_reset = &amp;r600_asic_reset,</div><div class='del'>-	.gpu_is_lockup = &amp;r600_gpu_is_lockup,</div><div class='ctx'> 	.vga_set_state = &amp;r600_vga_set_state,</div><div class='ctx'> 	.ioctl_wait_idle = r600_ioctl_wait_idle,</div><div class='ctx'> 	.gui_idle = &amp;r600_gui_idle,</div><div class='hunk'>@@ -1037,6 +1036,7 @@ static struct radeon_asic rv770_asic = {</div><div class='ctx'> 			.cs_parse = &amp;r600_cs_parse,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;r600_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -1092,7 +1092,6 @@ static struct radeon_asic evergreen_asic = {</div><div class='ctx'> 	.fini = &amp;evergreen_fini,</div><div class='ctx'> 	.suspend = &amp;evergreen_suspend,</div><div class='ctx'> 	.resume = &amp;evergreen_resume,</div><div class='del'>-	.gpu_is_lockup = &amp;evergreen_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;evergreen_asic_reset,</div><div class='ctx'> 	.vga_set_state = &amp;r600_vga_set_state,</div><div class='ctx'> 	.ioctl_wait_idle = r600_ioctl_wait_idle,</div><div class='hunk'>@@ -1110,6 +1109,7 @@ static struct radeon_asic evergreen_asic = {</div><div class='ctx'> 			.cs_parse = &amp;evergreen_cs_parse,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;evergreen_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -1165,7 +1165,6 @@ static struct radeon_asic sumo_asic = {</div><div class='ctx'> 	.fini = &amp;evergreen_fini,</div><div class='ctx'> 	.suspend = &amp;evergreen_suspend,</div><div class='ctx'> 	.resume = &amp;evergreen_resume,</div><div class='del'>-	.gpu_is_lockup = &amp;evergreen_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;evergreen_asic_reset,</div><div class='ctx'> 	.vga_set_state = &amp;r600_vga_set_state,</div><div class='ctx'> 	.ioctl_wait_idle = r600_ioctl_wait_idle,</div><div class='hunk'>@@ -1183,6 +1182,7 @@ static struct radeon_asic sumo_asic = {</div><div class='ctx'> 			.cs_parse = &amp;evergreen_cs_parse,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;evergreen_gpu_is_lockup,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -1238,7 +1238,6 @@ static struct radeon_asic btc_asic = {</div><div class='ctx'> 	.fini = &amp;evergreen_fini,</div><div class='ctx'> 	.suspend = &amp;evergreen_suspend,</div><div class='ctx'> 	.resume = &amp;evergreen_resume,</div><div class='del'>-	.gpu_is_lockup = &amp;evergreen_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;evergreen_asic_reset,</div><div class='ctx'> 	.vga_set_state = &amp;r600_vga_set_state,</div><div class='ctx'> 	.ioctl_wait_idle = r600_ioctl_wait_idle,</div><div class='hunk'>@@ -1256,6 +1255,7 @@ static struct radeon_asic btc_asic = {</div><div class='ctx'> 			.cs_parse = &amp;evergreen_cs_parse,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;evergreen_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -1321,7 +1321,6 @@ static struct radeon_asic cayman_asic = {</div><div class='ctx'> 	.fini = &amp;cayman_fini,</div><div class='ctx'> 	.suspend = &amp;cayman_suspend,</div><div class='ctx'> 	.resume = &amp;cayman_resume,</div><div class='del'>-	.gpu_is_lockup = &amp;cayman_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;cayman_asic_reset,</div><div class='ctx'> 	.vga_set_state = &amp;r600_vga_set_state,</div><div class='ctx'> 	.ioctl_wait_idle = r600_ioctl_wait_idle,</div><div class='hunk'>@@ -1340,6 +1339,7 @@ static struct radeon_asic cayman_asic = {</div><div class='ctx'> 			.cs_parse = &amp;evergreen_cs_parse,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;evergreen_gpu_is_lockup,</div><div class='ctx'> 		},</div><div class='ctx'> 		[CAYMAN_RING_TYPE_CP1_INDEX] = {</div><div class='ctx'> 			.ib_execute = &amp;cayman_ring_ib_execute,</div><div class='hunk'>@@ -1349,6 +1349,7 @@ static struct radeon_asic cayman_asic = {</div><div class='ctx'> 			.cs_parse = &amp;evergreen_cs_parse,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;evergreen_gpu_is_lockup,</div><div class='ctx'> 		},</div><div class='ctx'> 		[CAYMAN_RING_TYPE_CP2_INDEX] = {</div><div class='ctx'> 			.ib_execute = &amp;cayman_ring_ib_execute,</div><div class='hunk'>@@ -1358,6 +1359,7 @@ static struct radeon_asic cayman_asic = {</div><div class='ctx'> 			.cs_parse = &amp;evergreen_cs_parse,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;evergreen_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -1413,7 +1415,6 @@ static struct radeon_asic trinity_asic = {</div><div class='ctx'> 	.fini = &amp;cayman_fini,</div><div class='ctx'> 	.suspend = &amp;cayman_suspend,</div><div class='ctx'> 	.resume = &amp;cayman_resume,</div><div class='del'>-	.gpu_is_lockup = &amp;cayman_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;cayman_asic_reset,</div><div class='ctx'> 	.vga_set_state = &amp;r600_vga_set_state,</div><div class='ctx'> 	.ioctl_wait_idle = r600_ioctl_wait_idle,</div><div class='hunk'>@@ -1432,6 +1433,7 @@ static struct radeon_asic trinity_asic = {</div><div class='ctx'> 			.cs_parse = &amp;evergreen_cs_parse,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;evergreen_gpu_is_lockup,</div><div class='ctx'> 		},</div><div class='ctx'> 		[CAYMAN_RING_TYPE_CP1_INDEX] = {</div><div class='ctx'> 			.ib_execute = &amp;cayman_ring_ib_execute,</div><div class='hunk'>@@ -1441,6 +1443,7 @@ static struct radeon_asic trinity_asic = {</div><div class='ctx'> 			.cs_parse = &amp;evergreen_cs_parse,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;evergreen_gpu_is_lockup,</div><div class='ctx'> 		},</div><div class='ctx'> 		[CAYMAN_RING_TYPE_CP2_INDEX] = {</div><div class='ctx'> 			.ib_execute = &amp;cayman_ring_ib_execute,</div><div class='hunk'>@@ -1450,6 +1453,7 @@ static struct radeon_asic trinity_asic = {</div><div class='ctx'> 			.cs_parse = &amp;evergreen_cs_parse,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;evergreen_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='hunk'>@@ -1515,7 +1519,6 @@ static struct radeon_asic si_asic = {</div><div class='ctx'> 	.fini = &amp;si_fini,</div><div class='ctx'> 	.suspend = &amp;si_suspend,</div><div class='ctx'> 	.resume = &amp;si_resume,</div><div class='del'>-	.gpu_is_lockup = &amp;si_gpu_is_lockup,</div><div class='ctx'> 	.asic_reset = &amp;si_asic_reset,</div><div class='ctx'> 	.vga_set_state = &amp;r600_vga_set_state,</div><div class='ctx'> 	.ioctl_wait_idle = r600_ioctl_wait_idle,</div><div class='hunk'>@@ -1534,6 +1537,7 @@ static struct radeon_asic si_asic = {</div><div class='ctx'> 			.cs_parse = NULL,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;si_gpu_is_lockup,</div><div class='ctx'> 		},</div><div class='ctx'> 		[CAYMAN_RING_TYPE_CP1_INDEX] = {</div><div class='ctx'> 			.ib_execute = &amp;si_ring_ib_execute,</div><div class='hunk'>@@ -1543,6 +1547,7 @@ static struct radeon_asic si_asic = {</div><div class='ctx'> 			.cs_parse = NULL,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;si_gpu_is_lockup,</div><div class='ctx'> 		},</div><div class='ctx'> 		[CAYMAN_RING_TYPE_CP2_INDEX] = {</div><div class='ctx'> 			.ib_execute = &amp;si_ring_ib_execute,</div><div class='hunk'>@@ -1552,6 +1557,7 @@ static struct radeon_asic si_asic = {</div><div class='ctx'> 			.cs_parse = NULL,</div><div class='ctx'> 			.ring_test = &amp;r600_ring_test,</div><div class='ctx'> 			.ib_test = &amp;r600_ib_test,</div><div class='add'>+			.is_lockup = &amp;si_gpu_is_lockup,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='ctx'> 	.irq = {</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h<br/>index 3d9f9f1d8f90..e76a941ef14e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_asic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_asic.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_asic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_asic.h</a></div><div class='hunk'>@@ -103,11 +103,6 @@ int r100_pci_gart_enable(struct radeon_device *rdev);</div><div class='ctx'> void r100_pci_gart_disable(struct radeon_device *rdev);</div><div class='ctx'> int r100_debugfs_mc_info_init(struct radeon_device *rdev);</div><div class='ctx'> int r100_gui_wait_for_idle(struct radeon_device *rdev);</div><div class='del'>-void r100_gpu_lockup_update(struct r100_gpu_lockup *lockup,</div><div class='del'>-			    struct radeon_ring *cp);</div><div class='del'>-bool r100_gpu_cp_is_lockup(struct radeon_device *rdev,</div><div class='del'>-			   struct r100_gpu_lockup *lockup,</div><div class='del'>-			   struct radeon_ring *cp);</div><div class='ctx'> void r100_ib_fini(struct radeon_device *rdev);</div><div class='ctx'> int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);</div><div class='ctx'> void r100_irq_disable(struct radeon_device *rdev);</div><div class='hunk'>@@ -159,7 +154,6 @@ extern int r300_init(struct radeon_device *rdev);</div><div class='ctx'> extern void r300_fini(struct radeon_device *rdev);</div><div class='ctx'> extern int r300_suspend(struct radeon_device *rdev);</div><div class='ctx'> extern int r300_resume(struct radeon_device *rdev);</div><div class='del'>-extern bool r300_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='ctx'> extern int r300_asic_reset(struct radeon_device *rdev);</div><div class='ctx'> extern void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);</div><div class='ctx'> extern void r300_fence_ring_emit(struct radeon_device *rdev,</div><div class='hunk'>@@ -362,26 +356,20 @@ void r600_disable_interrupts(struct radeon_device *rdev);</div><div class='ctx'> void r600_rlc_stop(struct radeon_device *rdev);</div><div class='ctx'> /* r600 audio */</div><div class='ctx'> int r600_audio_init(struct radeon_device *rdev);</div><div class='del'>-int r600_audio_tmds_index(struct drm_encoder *encoder);</div><div class='ctx'> void r600_audio_set_clock(struct drm_encoder *encoder, int clock);</div><div class='del'>-int r600_audio_channels(struct radeon_device *rdev);</div><div class='del'>-int r600_audio_bits_per_sample(struct radeon_device *rdev);</div><div class='del'>-int r600_audio_rate(struct radeon_device *rdev);</div><div class='del'>-uint8_t r600_audio_status_bits(struct radeon_device *rdev);</div><div class='del'>-uint8_t r600_audio_category_code(struct radeon_device *rdev);</div><div class='del'>-void r600_audio_schedule_polling(struct radeon_device *rdev);</div><div class='del'>-void r600_audio_enable_polling(struct drm_encoder *encoder);</div><div class='del'>-void r600_audio_disable_polling(struct drm_encoder *encoder);</div><div class='add'>+struct r600_audio r600_audio_status(struct radeon_device *rdev);</div><div class='ctx'> void r600_audio_fini(struct radeon_device *rdev);</div><div class='del'>-void r600_hdmi_init(struct drm_encoder *encoder);</div><div class='ctx'> int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder);</div><div class='ctx'> void r600_hdmi_update_audio_settings(struct drm_encoder *encoder);</div><div class='ctx'> /* r600 blit */</div><div class='del'>-int r600_blit_prepare_copy(struct radeon_device *rdev, unsigned num_gpu_pages);</div><div class='del'>-void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence);</div><div class='add'>+int r600_blit_prepare_copy(struct radeon_device *rdev, unsigned num_gpu_pages,</div><div class='add'>+			   struct radeon_sa_bo **vb);</div><div class='add'>+void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence,</div><div class='add'>+			 struct radeon_sa_bo *vb);</div><div class='ctx'> void r600_kms_blit_copy(struct radeon_device *rdev,</div><div class='ctx'> 			u64 src_gpu_addr, u64 dst_gpu_addr,</div><div class='del'>-			unsigned num_gpu_pages);</div><div class='add'>+			unsigned num_gpu_pages,</div><div class='add'>+			struct radeon_sa_bo *vb);</div><div class='ctx'> int r600_mc_wait_for_idle(struct radeon_device *rdev);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -446,7 +434,6 @@ int cayman_init(struct radeon_device *rdev);</div><div class='ctx'> void cayman_fini(struct radeon_device *rdev);</div><div class='ctx'> int cayman_suspend(struct radeon_device *rdev);</div><div class='ctx'> int cayman_resume(struct radeon_device *rdev);</div><div class='del'>-bool cayman_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);</div><div class='ctx'> int cayman_asic_reset(struct radeon_device *rdev);</div><div class='ctx'> void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);</div><div class='ctx'> int cayman_vm_init(struct radeon_device *rdev);</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c<br/>index f6e69b8c06c6..b1e3820df363 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_atombios.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_atombios.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_atombios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_atombios.c</a></div><div class='hunk'>@@ -444,7 +444,9 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((dev-&gt;pdev-&gt;device == 0x9498) &amp;&amp;</div><div class='ctx'> 	    (dev-&gt;pdev-&gt;subsystem_vendor == 0x1682) &amp;&amp;</div><div class='del'>-	    (dev-&gt;pdev-&gt;subsystem_device == 0x2452)) {</div><div class='add'>+	    (dev-&gt;pdev-&gt;subsystem_device == 0x2452) &amp;&amp;</div><div class='add'>+	    (i2c_bus-&gt;valid == false) &amp;&amp;</div><div class='add'>+	    !(supported_device &amp; (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT))) {</div><div class='ctx'> 		struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='ctx'> 		*i2c_bus = radeon_lookup_i2c_gpio(rdev, 0x93);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c b/drivers/gpu/drm/radeon/radeon_benchmark.c<br/>index fef7b722b05d..364f5b1a04b9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_benchmark.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_benchmark.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_benchmark.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_benchmark.c</a></div><div class='hunk'>@@ -103,7 +103,7 @@ static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size,</div><div class='ctx'> 	int time;</div><div class='ctx'> </div><div class='ctx'> 	n = RADEON_BENCHMARK_ITERATIONS;</div><div class='del'>-	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, &amp;sobj);</div><div class='add'>+	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, NULL, &amp;sobj);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		goto out_cleanup;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -115,7 +115,7 @@ static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size,</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		goto out_cleanup;</div><div class='ctx'> 	}</div><div class='del'>-	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, &amp;dobj);</div><div class='add'>+	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, NULL, &amp;dobj);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		goto out_cleanup;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c<br/>index 2cad9fde92fc..576f4f6919f2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_combios.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_combios.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_combios.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_combios.c</a></div><div class='hunk'>@@ -1561,6 +1561,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)</div><div class='ctx'> 			   (rdev-&gt;pdev-&gt;subsystem_device == 0x4150)) {</div><div class='ctx'> 			/* Mac G5 tower 9600 */</div><div class='ctx'> 			rdev-&gt;mode_info.connector_table = CT_MAC_G5_9600;</div><div class='add'>+		} else if ((rdev-&gt;pdev-&gt;device == 0x4c66) &amp;&amp;</div><div class='add'>+			   (rdev-&gt;pdev-&gt;subsystem_vendor == 0x1002) &amp;&amp;</div><div class='add'>+			   (rdev-&gt;pdev-&gt;subsystem_device == 0x4c66)) {</div><div class='add'>+			/* SAM440ep RV250 embedded board */</div><div class='add'>+			rdev-&gt;mode_info.connector_table = CT_SAM440EP;</div><div class='ctx'> 		} else</div><div class='ctx'> #endif /* CONFIG_PPC_PMAC */</div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='hunk'>@@ -2134,6 +2139,67 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)</div><div class='ctx'> 					    CONNECTOR_OBJECT_ID_SVIDEO,</div><div class='ctx'> 					    &amp;hpd);</div><div class='ctx'> 		break;</div><div class='add'>+	case CT_SAM440EP:</div><div class='add'>+		DRM_INFO("Connector Table: %d (SAM440ep embedded board)\n",</div><div class='add'>+			 rdev-&gt;mode_info.connector_table);</div><div class='add'>+		/* LVDS */</div><div class='add'>+		ddc_i2c = combios_setup_i2c_bus(rdev, DDC_NONE_DETECTED, 0, 0);</div><div class='add'>+		hpd.hpd = RADEON_HPD_NONE;</div><div class='add'>+		radeon_add_legacy_encoder(dev,</div><div class='add'>+					  radeon_get_encoder_enum(dev,</div><div class='add'>+								ATOM_DEVICE_LCD1_SUPPORT,</div><div class='add'>+								0),</div><div class='add'>+					  ATOM_DEVICE_LCD1_SUPPORT);</div><div class='add'>+		radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,</div><div class='add'>+					    DRM_MODE_CONNECTOR_LVDS, &amp;ddc_i2c,</div><div class='add'>+					    CONNECTOR_OBJECT_ID_LVDS,</div><div class='add'>+					    &amp;hpd);</div><div class='add'>+		/* DVI-I - secondary dac, int tmds */</div><div class='add'>+		ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);</div><div class='add'>+		hpd.hpd = RADEON_HPD_1; /* ??? */</div><div class='add'>+		radeon_add_legacy_encoder(dev,</div><div class='add'>+					  radeon_get_encoder_enum(dev,</div><div class='add'>+								ATOM_DEVICE_DFP1_SUPPORT,</div><div class='add'>+								0),</div><div class='add'>+					  ATOM_DEVICE_DFP1_SUPPORT);</div><div class='add'>+		radeon_add_legacy_encoder(dev,</div><div class='add'>+					  radeon_get_encoder_enum(dev,</div><div class='add'>+								ATOM_DEVICE_CRT2_SUPPORT,</div><div class='add'>+								2),</div><div class='add'>+					  ATOM_DEVICE_CRT2_SUPPORT);</div><div class='add'>+		radeon_add_legacy_connector(dev, 1,</div><div class='add'>+					    ATOM_DEVICE_DFP1_SUPPORT |</div><div class='add'>+					    ATOM_DEVICE_CRT2_SUPPORT,</div><div class='add'>+					    DRM_MODE_CONNECTOR_DVII, &amp;ddc_i2c,</div><div class='add'>+					    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,</div><div class='add'>+					    &amp;hpd);</div><div class='add'>+		/* VGA - primary dac */</div><div class='add'>+		ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);</div><div class='add'>+		hpd.hpd = RADEON_HPD_NONE;</div><div class='add'>+		radeon_add_legacy_encoder(dev,</div><div class='add'>+					  radeon_get_encoder_enum(dev,</div><div class='add'>+								ATOM_DEVICE_CRT1_SUPPORT,</div><div class='add'>+								1),</div><div class='add'>+					  ATOM_DEVICE_CRT1_SUPPORT);</div><div class='add'>+		radeon_add_legacy_connector(dev, 2,</div><div class='add'>+					    ATOM_DEVICE_CRT1_SUPPORT,</div><div class='add'>+					    DRM_MODE_CONNECTOR_VGA, &amp;ddc_i2c,</div><div class='add'>+					    CONNECTOR_OBJECT_ID_VGA,</div><div class='add'>+					    &amp;hpd);</div><div class='add'>+		/* TV - TV DAC */</div><div class='add'>+		ddc_i2c.valid = false;</div><div class='add'>+		hpd.hpd = RADEON_HPD_NONE;</div><div class='add'>+		radeon_add_legacy_encoder(dev,</div><div class='add'>+					  radeon_get_encoder_enum(dev,</div><div class='add'>+								ATOM_DEVICE_TV1_SUPPORT,</div><div class='add'>+								2),</div><div class='add'>+					  ATOM_DEVICE_TV1_SUPPORT);</div><div class='add'>+		radeon_add_legacy_connector(dev, 3, ATOM_DEVICE_TV1_SUPPORT,</div><div class='add'>+					    DRM_MODE_CONNECTOR_SVIDEO,</div><div class='add'>+					    &amp;ddc_i2c,</div><div class='add'>+					    CONNECTOR_OBJECT_ID_SVIDEO,</div><div class='add'>+					    &amp;hpd);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		DRM_INFO("Connector table: %d (invalid)\n",</div><div class='ctx'> 			 rdev-&gt;mode_info.connector_table);</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c<br/>index 3c2e7a000a2a..2914c5761cfc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_connectors.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_connectors.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_connectors.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_connectors.c</a></div><div class='hunk'>@@ -84,6 +84,62 @@ static void radeon_property_change_mode(struct drm_encoder *encoder)</div><div class='ctx'> 					 crtc-&gt;x, crtc-&gt;y, crtc-&gt;fb);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int radeon_get_monitor_bpc(struct drm_connector *connector)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = connector-&gt;dev;</div><div class='add'>+	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='add'>+	struct radeon_connector *radeon_connector = to_radeon_connector(connector);</div><div class='add'>+	struct radeon_connector_atom_dig *dig_connector;</div><div class='add'>+	int bpc = 8;</div><div class='add'>+</div><div class='add'>+	switch (connector-&gt;connector_type) {</div><div class='add'>+	case DRM_MODE_CONNECTOR_DVII:</div><div class='add'>+	case DRM_MODE_CONNECTOR_HDMIB:</div><div class='add'>+		if (radeon_connector-&gt;use_digital) {</div><div class='add'>+			if (drm_detect_hdmi_monitor(radeon_connector-&gt;edid)) {</div><div class='add'>+				if (connector-&gt;display_info.bpc)</div><div class='add'>+					bpc = connector-&gt;display_info.bpc;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_CONNECTOR_DVID:</div><div class='add'>+	case DRM_MODE_CONNECTOR_HDMIA:</div><div class='add'>+		if (drm_detect_hdmi_monitor(radeon_connector-&gt;edid)) {</div><div class='add'>+			if (connector-&gt;display_info.bpc)</div><div class='add'>+				bpc = connector-&gt;display_info.bpc;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_CONNECTOR_DisplayPort:</div><div class='add'>+		dig_connector = radeon_connector-&gt;con_priv;</div><div class='add'>+		if ((dig_connector-&gt;dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||</div><div class='add'>+		    (dig_connector-&gt;dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||</div><div class='add'>+		    drm_detect_hdmi_monitor(radeon_connector-&gt;edid)) {</div><div class='add'>+			if (connector-&gt;display_info.bpc)</div><div class='add'>+				bpc = connector-&gt;display_info.bpc;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case DRM_MODE_CONNECTOR_eDP:</div><div class='add'>+	case DRM_MODE_CONNECTOR_LVDS:</div><div class='add'>+		if (connector-&gt;display_info.bpc)</div><div class='add'>+			bpc = connector-&gt;display_info.bpc;</div><div class='add'>+		else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {</div><div class='add'>+			struct drm_connector_helper_funcs *connector_funcs =</div><div class='add'>+				connector-&gt;helper_private;</div><div class='add'>+			struct drm_encoder *encoder = connector_funcs-&gt;best_encoder(connector);</div><div class='add'>+			struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);</div><div class='add'>+			struct radeon_encoder_atom_dig *dig = radeon_encoder-&gt;enc_priv;</div><div class='add'>+</div><div class='add'>+			if (dig-&gt;lcd_misc &amp; ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)</div><div class='add'>+				bpc = 6;</div><div class='add'>+			else if (dig-&gt;lcd_misc &amp; ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)</div><div class='add'>+				bpc = 8;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return bpc;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c<br/>index 0ebb7d4796fa..ef67e181377b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_cp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_cp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_cp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_cp.c</a></div><div class='hunk'>@@ -1827,14 +1827,10 @@ void radeon_do_release(struct drm_device * dev)</div><div class='ctx'> 			r600_do_cleanup_cp(dev);</div><div class='ctx'> 		else</div><div class='ctx'> 			radeon_do_cleanup_cp(dev);</div><div class='del'>-		if (dev_priv-&gt;me_fw) {</div><div class='del'>-			release_firmware(dev_priv-&gt;me_fw);</div><div class='del'>-			dev_priv-&gt;me_fw = NULL;</div><div class='del'>-		}</div><div class='del'>-		if (dev_priv-&gt;pfp_fw) {</div><div class='del'>-			release_firmware(dev_priv-&gt;pfp_fw);</div><div class='del'>-			dev_priv-&gt;pfp_fw = NULL;</div><div class='del'>-		}</div><div class='add'>+		release_firmware(dev_priv-&gt;me_fw);</div><div class='add'>+		dev_priv-&gt;me_fw = NULL;</div><div class='add'>+		release_firmware(dev_priv-&gt;pfp_fw);</div><div class='add'>+		dev_priv-&gt;pfp_fw = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c<br/>index 5cac83278338..142f89462aa4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_cs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_cs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_cs.c</a></div><div class='hunk'>@@ -118,46 +118,36 @@ static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority</div><div class='ctx'> static int radeon_cs_sync_rings(struct radeon_cs_parser *p)</div><div class='ctx'> {</div><div class='ctx'> 	bool sync_to_ring[RADEON_NUM_RINGS] = { };</div><div class='add'>+	bool need_sync = false;</div><div class='ctx'> 	int i, r;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; p-&gt;nrelocs; i++) {</div><div class='add'>+		struct radeon_fence *fence;</div><div class='add'>+</div><div class='ctx'> 		if (!p-&gt;relocs[i].robj || !p-&gt;relocs[i].robj-&gt;tbo.sync_obj)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (!(p-&gt;relocs[i].flags &amp; RADEON_RELOC_DONT_SYNC)) {</div><div class='del'>-			struct radeon_fence *fence = p-&gt;relocs[i].robj-&gt;tbo.sync_obj;</div><div class='del'>-			if (!radeon_fence_signaled(fence)) {</div><div class='del'>-				sync_to_ring[fence-&gt;ring] = true;</div><div class='del'>-			}</div><div class='add'>+		fence = p-&gt;relocs[i].robj-&gt;tbo.sync_obj;</div><div class='add'>+		if (fence-&gt;ring != p-&gt;ring &amp;&amp; !radeon_fence_signaled(fence)) {</div><div class='add'>+			sync_to_ring[fence-&gt;ring] = true;</div><div class='add'>+			need_sync = true;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='del'>-		/* no need to sync to our own or unused rings */</div><div class='del'>-		if (i == p-&gt;ring || !sync_to_ring[i] || !p-&gt;rdev-&gt;ring[i].ready)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (!p-&gt;ib-&gt;fence-&gt;semaphore) {</div><div class='del'>-			r = radeon_semaphore_create(p-&gt;rdev, &amp;p-&gt;ib-&gt;fence-&gt;semaphore);</div><div class='del'>-			if (r)</div><div class='del'>-				return r;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		r = radeon_ring_lock(p-&gt;rdev, &amp;p-&gt;rdev-&gt;ring[i], 3);</div><div class='del'>-		if (r)</div><div class='del'>-			return r;</div><div class='del'>-		radeon_semaphore_emit_signal(p-&gt;rdev, i, p-&gt;ib-&gt;fence-&gt;semaphore);</div><div class='del'>-		radeon_ring_unlock_commit(p-&gt;rdev, &amp;p-&gt;rdev-&gt;ring[i]);</div><div class='add'>+	if (!need_sync) {</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		r = radeon_ring_lock(p-&gt;rdev, &amp;p-&gt;rdev-&gt;ring[p-&gt;ring], 3);</div><div class='del'>-		if (r)</div><div class='del'>-			return r;</div><div class='del'>-		radeon_semaphore_emit_wait(p-&gt;rdev, p-&gt;ring, p-&gt;ib-&gt;fence-&gt;semaphore);</div><div class='del'>-		radeon_ring_unlock_commit(p-&gt;rdev, &amp;p-&gt;rdev-&gt;ring[p-&gt;ring]);</div><div class='add'>+	r = radeon_semaphore_create(p-&gt;rdev, &amp;p-&gt;ib.semaphore);</div><div class='add'>+	if (r) {</div><div class='add'>+		return r;</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+</div><div class='add'>+	return radeon_semaphore_sync_rings(p-&gt;rdev, p-&gt;ib.semaphore,</div><div class='add'>+					   sync_to_ring, p-&gt;ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* XXX: note that this is called from the legacy UMS CS ioctl as well */</div><div class='ctx'> int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_radeon_cs *cs = data;</div><div class='hunk'>@@ -172,6 +162,10 @@ int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)</div><div class='ctx'> 	/* get chunks */</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;p-&gt;validated);</div><div class='ctx'> 	p-&gt;idx = 0;</div><div class='add'>+	p-&gt;ib.sa_bo = NULL;</div><div class='add'>+	p-&gt;ib.semaphore = NULL;</div><div class='add'>+	p-&gt;const_ib.sa_bo = NULL;</div><div class='add'>+	p-&gt;const_ib.semaphore = NULL;</div><div class='ctx'> 	p-&gt;chunk_ib_idx = -1;</div><div class='ctx'> 	p-&gt;chunk_relocs_idx = -1;</div><div class='ctx'> 	p-&gt;chunk_flags_idx = -1;</div><div class='hunk'>@@ -252,22 +246,24 @@ int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((p-&gt;cs_flags &amp; RADEON_CS_USE_VM) &amp;&amp;</div><div class='del'>-	    !p-&gt;rdev-&gt;vm_manager.enabled) {</div><div class='del'>-		DRM_ERROR("VM not active on asic!\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* we only support VM on SI+ */</div><div class='del'>-	if ((p-&gt;rdev-&gt;family &gt;= CHIP_TAHITI) &amp;&amp;</div><div class='del'>-	    ((p-&gt;cs_flags &amp; RADEON_CS_USE_VM) == 0)) {</div><div class='del'>-		DRM_ERROR("VM required on SI+!\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	/* these are KMS only */</div><div class='add'>+	if (p-&gt;rdev) {</div><div class='add'>+		if ((p-&gt;cs_flags &amp; RADEON_CS_USE_VM) &amp;&amp;</div><div class='add'>+		    !p-&gt;rdev-&gt;vm_manager.enabled) {</div><div class='add'>+			DRM_ERROR("VM not active on asic!\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (radeon_cs_get_ring(p, ring, priority))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		/* we only support VM on SI+ */</div><div class='add'>+		if ((p-&gt;rdev-&gt;family &gt;= CHIP_TAHITI) &amp;&amp;</div><div class='add'>+		    ((p-&gt;cs_flags &amp; RADEON_CS_USE_VM) == 0)) {</div><div class='add'>+			DRM_ERROR("VM required on SI+!\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='add'>+		if (radeon_cs_get_ring(p, ring, priority))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* deal with non-vm */</div><div class='ctx'> 	if ((p-&gt;chunk_ib_idx != -1) &amp;&amp;</div><div class='hunk'>@@ -278,11 +274,16 @@ int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)</div><div class='ctx'> 				  p-&gt;chunks[p-&gt;chunk_ib_idx].length_dw);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-		p-&gt;chunks[p-&gt;chunk_ib_idx].kpage[0] = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='del'>-		p-&gt;chunks[p-&gt;chunk_ib_idx].kpage[1] = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='del'>-		if (p-&gt;chunks[p-&gt;chunk_ib_idx].kpage[0] == NULL ||</div><div class='del'>-		    p-&gt;chunks[p-&gt;chunk_ib_idx].kpage[1] == NULL)</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+		if ((p-&gt;rdev-&gt;flags &amp; RADEON_IS_AGP)) {</div><div class='add'>+			p-&gt;chunks[p-&gt;chunk_ib_idx].kpage[0] = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='add'>+			p-&gt;chunks[p-&gt;chunk_ib_idx].kpage[1] = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='add'>+			if (p-&gt;chunks[p-&gt;chunk_ib_idx].kpage[0] == NULL ||</div><div class='add'>+			    p-&gt;chunks[p-&gt;chunk_ib_idx].kpage[1] == NULL) {</div><div class='add'>+				kfree(p-&gt;chunks[i].kpage[0]);</div><div class='add'>+				kfree(p-&gt;chunks[i].kpage[1]);</div><div class='add'>+				return -ENOMEM;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 		p-&gt;chunks[p-&gt;chunk_ib_idx].kpage_idx[0] = -1;</div><div class='ctx'> 		p-&gt;chunks[p-&gt;chunk_ib_idx].kpage_idx[1] = -1;</div><div class='ctx'> 		p-&gt;chunks[p-&gt;chunk_ib_idx].last_copied_page = -1;</div><div class='hunk'>@@ -305,10 +306,9 @@ static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned i;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	if (!error &amp;&amp; parser-&gt;ib)</div><div class='add'>+	if (!error)</div><div class='ctx'> 		ttm_eu_fence_buffer_objects(&amp;parser-&gt;validated,</div><div class='del'>-					    parser-&gt;ib-&gt;fence);</div><div class='add'>+					    parser-&gt;ib.fence);</div><div class='ctx'> 	else</div><div class='ctx'> 		ttm_eu_backoff_reservation(&amp;parser-&gt;validated);</div><div class='ctx'> </div><div class='hunk'>@@ -323,12 +323,15 @@ static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)</div><div class='ctx'> 	kfree(parser-&gt;relocs_ptr);</div><div class='ctx'> 	for (i = 0; i &lt; parser-&gt;nchunks; i++) {</div><div class='ctx'> 		kfree(parser-&gt;chunks[i].kdata);</div><div class='del'>-		kfree(parser-&gt;chunks[i].kpage[0]);</div><div class='del'>-		kfree(parser-&gt;chunks[i].kpage[1]);</div><div class='add'>+		if ((parser-&gt;rdev-&gt;flags &amp; RADEON_IS_AGP)) {</div><div class='add'>+			kfree(parser-&gt;chunks[i].kpage[0]);</div><div class='add'>+			kfree(parser-&gt;chunks[i].kpage[1]);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	kfree(parser-&gt;chunks);</div><div class='ctx'> 	kfree(parser-&gt;chunks_array);</div><div class='ctx'> 	radeon_ib_free(parser-&gt;rdev, &amp;parser-&gt;ib);</div><div class='add'>+	radeon_ib_free(parser-&gt;rdev, &amp;parser-&gt;const_ib);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int radeon_cs_ib_chunk(struct radeon_device *rdev,</div><div class='hunk'>@@ -354,7 +357,7 @@ static int radeon_cs_ib_chunk(struct radeon_device *rdev,</div><div class='ctx'> 		DRM_ERROR("Failed to get ib !\n");</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='del'>-	parser-&gt;ib-&gt;length_dw = ib_chunk-&gt;length_dw;</div><div class='add'>+	parser-&gt;ib.length_dw = ib_chunk-&gt;length_dw;</div><div class='ctx'> 	r = radeon_cs_parse(rdev, parser-&gt;ring, parser);</div><div class='ctx'> 	if (r || parser-&gt;parser_error) {</div><div class='ctx'> 		DRM_ERROR("Invalid command stream !\n");</div><div class='hunk'>@@ -369,8 +372,8 @@ static int radeon_cs_ib_chunk(struct radeon_device *rdev,</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("Failed to synchronize rings !\n");</div><div class='ctx'> 	}</div><div class='del'>-	parser-&gt;ib-&gt;vm_id = 0;</div><div class='del'>-	r = radeon_ib_schedule(rdev, parser-&gt;ib);</div><div class='add'>+	parser-&gt;ib.vm_id = 0;</div><div class='add'>+	r = radeon_ib_schedule(rdev, &amp;parser-&gt;ib);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("Failed to schedule IB !\n");</div><div class='ctx'> 	}</div><div class='hunk'>@@ -421,14 +424,14 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,</div><div class='ctx'> 			DRM_ERROR("Failed to get const ib !\n");</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='del'>-		parser-&gt;const_ib-&gt;is_const_ib = true;</div><div class='del'>-		parser-&gt;const_ib-&gt;length_dw = ib_chunk-&gt;length_dw;</div><div class='add'>+		parser-&gt;const_ib.is_const_ib = true;</div><div class='add'>+		parser-&gt;const_ib.length_dw = ib_chunk-&gt;length_dw;</div><div class='ctx'> 		/* Copy the packet into the IB */</div><div class='del'>-		if (DRM_COPY_FROM_USER(parser-&gt;const_ib-&gt;ptr, ib_chunk-&gt;user_ptr,</div><div class='add'>+		if (DRM_COPY_FROM_USER(parser-&gt;const_ib.ptr, ib_chunk-&gt;user_ptr,</div><div class='ctx'> 				       ib_chunk-&gt;length_dw * 4)) {</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> 		}</div><div class='del'>-		r = radeon_ring_ib_parse(rdev, parser-&gt;ring, parser-&gt;const_ib);</div><div class='add'>+		r = radeon_ring_ib_parse(rdev, parser-&gt;ring, &amp;parser-&gt;const_ib);</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -445,13 +448,13 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,</div><div class='ctx'> 		DRM_ERROR("Failed to get ib !\n");</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='del'>-	parser-&gt;ib-&gt;length_dw = ib_chunk-&gt;length_dw;</div><div class='add'>+	parser-&gt;ib.length_dw = ib_chunk-&gt;length_dw;</div><div class='ctx'> 	/* Copy the packet into the IB */</div><div class='del'>-	if (DRM_COPY_FROM_USER(parser-&gt;ib-&gt;ptr, ib_chunk-&gt;user_ptr,</div><div class='add'>+	if (DRM_COPY_FROM_USER(parser-&gt;ib.ptr, ib_chunk-&gt;user_ptr,</div><div class='ctx'> 			       ib_chunk-&gt;length_dw * 4)) {</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-	r = radeon_ring_ib_parse(rdev, parser-&gt;ring, parser-&gt;ib);</div><div class='add'>+	r = radeon_ring_ib_parse(rdev, parser-&gt;ring, &amp;parser-&gt;ib);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -472,34 +475,44 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,</div><div class='ctx'> </div><div class='ctx'> 	if ((rdev-&gt;family &gt;= CHIP_TAHITI) &amp;&amp;</div><div class='ctx'> 	    (parser-&gt;chunk_const_ib_idx != -1)) {</div><div class='del'>-		parser-&gt;const_ib-&gt;vm_id = vm-&gt;id;</div><div class='add'>+		parser-&gt;const_ib.vm_id = vm-&gt;id;</div><div class='ctx'> 		/* ib pool is bind at 0 in virtual address space to gpu_addr is the</div><div class='ctx'> 		 * offset inside the pool bo</div><div class='ctx'> 		 */</div><div class='del'>-		parser-&gt;const_ib-&gt;gpu_addr = parser-&gt;const_ib-&gt;sa_bo.offset;</div><div class='del'>-		r = radeon_ib_schedule(rdev, parser-&gt;const_ib);</div><div class='add'>+		parser-&gt;const_ib.gpu_addr = parser-&gt;const_ib.sa_bo-&gt;soffset;</div><div class='add'>+		r = radeon_ib_schedule(rdev, &amp;parser-&gt;const_ib);</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	parser-&gt;ib-&gt;vm_id = vm-&gt;id;</div><div class='add'>+	parser-&gt;ib.vm_id = vm-&gt;id;</div><div class='ctx'> 	/* ib pool is bind at 0 in virtual address space to gpu_addr is the</div><div class='ctx'> 	 * offset inside the pool bo</div><div class='ctx'> 	 */</div><div class='del'>-	parser-&gt;ib-&gt;gpu_addr = parser-&gt;ib-&gt;sa_bo.offset;</div><div class='del'>-	parser-&gt;ib-&gt;is_const_ib = false;</div><div class='del'>-	r = radeon_ib_schedule(rdev, parser-&gt;ib);</div><div class='add'>+	parser-&gt;ib.gpu_addr = parser-&gt;ib.sa_bo-&gt;soffset;</div><div class='add'>+	parser-&gt;ib.is_const_ib = false;</div><div class='add'>+	r = radeon_ib_schedule(rdev, &amp;parser-&gt;ib);</div><div class='ctx'> out:</div><div class='ctx'> 	if (!r) {</div><div class='ctx'> 		if (vm-&gt;fence) {</div><div class='ctx'> 			radeon_fence_unref(&amp;vm-&gt;fence);</div><div class='ctx'> 		}</div><div class='del'>-		vm-&gt;fence = radeon_fence_ref(parser-&gt;ib-&gt;fence);</div><div class='add'>+		vm-&gt;fence = radeon_fence_ref(parser-&gt;ib.fence);</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;fpriv-&gt;vm.mutex);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int radeon_cs_handle_lockup(struct radeon_device *rdev, int r)</div><div class='add'>+{</div><div class='add'>+	if (r == -EDEADLK) {</div><div class='add'>+		r = radeon_gpu_reset(rdev);</div><div class='add'>+		if (!r)</div><div class='add'>+			r = -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)</div><div class='ctx'> {</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='hunk'>@@ -521,6 +534,7 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("Failed to initialize parser !\n");</div><div class='ctx'> 		radeon_cs_parser_fini(&amp;parser, r);</div><div class='add'>+		r = radeon_cs_handle_lockup(rdev, r);</div><div class='ctx'> 		radeon_mutex_unlock(&amp;rdev-&gt;cs_mutex);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -529,6 +543,7 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)</div><div class='ctx'> 		if (r != -ERESTARTSYS)</div><div class='ctx'> 			DRM_ERROR("Failed to parse relocation %d!\n", r);</div><div class='ctx'> 		radeon_cs_parser_fini(&amp;parser, r);</div><div class='add'>+		r = radeon_cs_handle_lockup(rdev, r);</div><div class='ctx'> 		radeon_mutex_unlock(&amp;rdev-&gt;cs_mutex);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -542,6 +557,7 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	radeon_cs_parser_fini(&amp;parser, r);</div><div class='add'>+	r = radeon_cs_handle_lockup(rdev, r);</div><div class='ctx'> 	radeon_mutex_unlock(&amp;rdev-&gt;cs_mutex);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='hunk'>@@ -559,7 +575,7 @@ int radeon_cs_finish_pages(struct radeon_cs_parser *p)</div><div class='ctx'> 				size = PAGE_SIZE;</div><div class='ctx'> 		}</div><div class='ctx'> 		</div><div class='del'>-		if (DRM_COPY_FROM_USER(p-&gt;ib-&gt;ptr + (i * (PAGE_SIZE/4)),</div><div class='add'>+		if (DRM_COPY_FROM_USER(p-&gt;ib.ptr + (i * (PAGE_SIZE/4)),</div><div class='ctx'> 				       ibc-&gt;user_ptr + (i * PAGE_SIZE),</div><div class='ctx'> 				       size))</div><div class='ctx'> 			return -EFAULT;</div><div class='hunk'>@@ -567,15 +583,16 @@ int radeon_cs_finish_pages(struct radeon_cs_parser *p)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)</div><div class='add'>+static int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)</div><div class='ctx'> {</div><div class='ctx'> 	int new_page;</div><div class='ctx'> 	struct radeon_cs_chunk *ibc = &amp;p-&gt;chunks[p-&gt;chunk_ib_idx];</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int size = PAGE_SIZE;</div><div class='add'>+	bool copy1 = (p-&gt;rdev-&gt;flags &amp; RADEON_IS_AGP) ? false : true;</div><div class='ctx'> </div><div class='ctx'> 	for (i = ibc-&gt;last_copied_page + 1; i &lt; pg_idx; i++) {</div><div class='del'>-		if (DRM_COPY_FROM_USER(p-&gt;ib-&gt;ptr + (i * (PAGE_SIZE/4)),</div><div class='add'>+		if (DRM_COPY_FROM_USER(p-&gt;ib.ptr + (i * (PAGE_SIZE/4)),</div><div class='ctx'> 				       ibc-&gt;user_ptr + (i * PAGE_SIZE),</div><div class='ctx'> 				       PAGE_SIZE)) {</div><div class='ctx'> 			p-&gt;parser_error = -EFAULT;</div><div class='hunk'>@@ -583,14 +600,16 @@ int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	new_page = ibc-&gt;kpage_idx[0] &lt; ibc-&gt;kpage_idx[1] ? 0 : 1;</div><div class='del'>-</div><div class='ctx'> 	if (pg_idx == ibc-&gt;last_page_index) {</div><div class='ctx'> 		size = (ibc-&gt;length_dw * 4) % PAGE_SIZE;</div><div class='del'>-			if (size == 0)</div><div class='del'>-				size = PAGE_SIZE;</div><div class='add'>+		if (size == 0)</div><div class='add'>+			size = PAGE_SIZE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	new_page = ibc-&gt;kpage_idx[0] &lt; ibc-&gt;kpage_idx[1] ? 0 : 1;</div><div class='add'>+	if (copy1)</div><div class='add'>+		ibc-&gt;kpage[new_page] = p-&gt;ib.ptr + (pg_idx * (PAGE_SIZE / 4));</div><div class='add'>+</div><div class='ctx'> 	if (DRM_COPY_FROM_USER(ibc-&gt;kpage[new_page],</div><div class='ctx'> 			       ibc-&gt;user_ptr + (pg_idx * PAGE_SIZE),</div><div class='ctx'> 			       size)) {</div><div class='hunk'>@@ -598,11 +617,37 @@ int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* copy to IB here */</div><div class='del'>-	memcpy((void *)(p-&gt;ib-&gt;ptr+(pg_idx*(PAGE_SIZE/4))), ibc-&gt;kpage[new_page], size);</div><div class='add'>+	/* copy to IB for non single case */</div><div class='add'>+	if (!copy1)</div><div class='add'>+		memcpy((void *)(p-&gt;ib.ptr+(pg_idx*(PAGE_SIZE/4))), ibc-&gt;kpage[new_page], size);</div><div class='ctx'> </div><div class='ctx'> 	ibc-&gt;last_copied_page = pg_idx;</div><div class='ctx'> 	ibc-&gt;kpage_idx[new_page] = pg_idx;</div><div class='ctx'> </div><div class='ctx'> 	return new_page;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+u32 radeon_get_ib_value(struct radeon_cs_parser *p, int idx)</div><div class='add'>+{</div><div class='add'>+	struct radeon_cs_chunk *ibc = &amp;p-&gt;chunks[p-&gt;chunk_ib_idx];</div><div class='add'>+	u32 pg_idx, pg_offset;</div><div class='add'>+	u32 idx_value = 0;</div><div class='add'>+	int new_page;</div><div class='add'>+</div><div class='add'>+	pg_idx = (idx * 4) / PAGE_SIZE;</div><div class='add'>+	pg_offset = (idx * 4) % PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	if (ibc-&gt;kpage_idx[0] == pg_idx)</div><div class='add'>+		return ibc-&gt;kpage[0][pg_offset/4];</div><div class='add'>+	if (ibc-&gt;kpage_idx[1] == pg_idx)</div><div class='add'>+		return ibc-&gt;kpage[1][pg_offset/4];</div><div class='add'>+</div><div class='add'>+	new_page = radeon_cs_update_pages(p, pg_idx);</div><div class='add'>+	if (new_page &lt; 0) {</div><div class='add'>+		p-&gt;parser_error = new_page;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	idx_value = ibc-&gt;kpage[new_page][pg_offset/4];</div><div class='add'>+	return idx_value;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c<br/>index ea7df16e2f84..066c98b888a5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_device.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_device.c</a></div><div class='hunk'>@@ -193,7 +193,7 @@ int radeon_wb_init(struct radeon_device *rdev)</div><div class='ctx'> </div><div class='ctx'> 	if (rdev-&gt;wb.wb_obj == NULL) {</div><div class='ctx'> 		r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true,</div><div class='del'>-				RADEON_GEM_DOMAIN_GTT, &amp;rdev-&gt;wb.wb_obj);</div><div class='add'>+				     RADEON_GEM_DOMAIN_GTT, NULL, &amp;rdev-&gt;wb.wb_obj);</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			dev_warn(rdev-&gt;dev, "(%d) create WB bo failed\n", r);</div><div class='ctx'> 			return r;</div><div class='hunk'>@@ -225,9 +225,9 @@ int radeon_wb_init(struct radeon_device *rdev)</div><div class='ctx'> 	/* disable event_write fences */</div><div class='ctx'> 	rdev-&gt;wb.use_event = false;</div><div class='ctx'> 	/* disabled via module param */</div><div class='del'>-	if (radeon_no_wb == 1)</div><div class='add'>+	if (radeon_no_wb == 1) {</div><div class='ctx'> 		rdev-&gt;wb.enabled = false;</div><div class='del'>-	else {</div><div class='add'>+	} else {</div><div class='ctx'> 		if (rdev-&gt;flags &amp; RADEON_IS_AGP) {</div><div class='ctx'> 			/* often unreliable on AGP */</div><div class='ctx'> 			rdev-&gt;wb.enabled = false;</div><div class='hunk'>@@ -237,12 +237,13 @@ int radeon_wb_init(struct radeon_device *rdev)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			rdev-&gt;wb.enabled = true;</div><div class='ctx'> 			/* event_write fences are only available on r600+ */</div><div class='del'>-			if (rdev-&gt;family &gt;= CHIP_R600)</div><div class='add'>+			if (rdev-&gt;family &gt;= CHIP_R600) {</div><div class='ctx'> 				rdev-&gt;wb.use_event = true;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	/* always use writeback/events on NI */</div><div class='del'>-	if (ASIC_IS_DCE5(rdev)) {</div><div class='add'>+	/* always use writeback/events on NI, APUs */</div><div class='add'>+	if (rdev-&gt;family &gt;= CHIP_PALM) {</div><div class='ctx'> 		rdev-&gt;wb.enabled = true;</div><div class='ctx'> 		rdev-&gt;wb.use_event = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -696,6 +697,11 @@ static bool radeon_switcheroo_can_switch(struct pci_dev *pdev)</div><div class='ctx'> 	return can_switch;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct vga_switcheroo_client_ops radeon_switcheroo_ops = {</div><div class='add'>+	.set_gpu_state = radeon_switcheroo_set_state,</div><div class='add'>+	.reprobe = NULL,</div><div class='add'>+	.can_switch = radeon_switcheroo_can_switch,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> int radeon_device_init(struct radeon_device *rdev,</div><div class='ctx'> 		       struct drm_device *ddev,</div><div class='hunk'>@@ -714,7 +720,6 @@ int radeon_device_init(struct radeon_device *rdev,</div><div class='ctx'> 	rdev-&gt;is_atom_bios = false;</div><div class='ctx'> 	rdev-&gt;usec_timeout = RADEON_MAX_USEC_TIMEOUT;</div><div class='ctx'> 	rdev-&gt;mc.gtt_size = radeon_gart_size * 1024 * 1024;</div><div class='del'>-	rdev-&gt;gpu_lockup = false;</div><div class='ctx'> 	rdev-&gt;accel_working = false;</div><div class='ctx'> </div><div class='ctx'> 	DRM_INFO("initializing kernel modesetting (%s 0x%04X:0x%04X 0x%04X:0x%04X).\n",</div><div class='hunk'>@@ -724,21 +729,18 @@ int radeon_device_init(struct radeon_device *rdev,</div><div class='ctx'> 	/* mutex initialization are all done here so we</div><div class='ctx'> 	 * can recall function without having locking issues */</div><div class='ctx'> 	radeon_mutex_init(&amp;rdev-&gt;cs_mutex);</div><div class='del'>-	radeon_mutex_init(&amp;rdev-&gt;ib_pool.mutex);</div><div class='del'>-	for (i = 0; i &lt; RADEON_NUM_RINGS; ++i)</div><div class='del'>-		mutex_init(&amp;rdev-&gt;ring[i].mutex);</div><div class='add'>+	mutex_init(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> 	mutex_init(&amp;rdev-&gt;dc_hw_i2c_mutex);</div><div class='ctx'> 	if (rdev-&gt;family &gt;= CHIP_R600)</div><div class='ctx'> 		spin_lock_init(&amp;rdev-&gt;ih.lock);</div><div class='ctx'> 	mutex_init(&amp;rdev-&gt;gem.mutex);</div><div class='ctx'> 	mutex_init(&amp;rdev-&gt;pm.mutex);</div><div class='ctx'> 	mutex_init(&amp;rdev-&gt;vram_mutex);</div><div class='del'>-	rwlock_init(&amp;rdev-&gt;fence_lock);</div><div class='del'>-	rwlock_init(&amp;rdev-&gt;semaphore_drv.lock);</div><div class='del'>-	INIT_LIST_HEAD(&amp;rdev-&gt;gem.objects);</div><div class='ctx'> 	init_waitqueue_head(&amp;rdev-&gt;irq.vblank_queue);</div><div class='ctx'> 	init_waitqueue_head(&amp;rdev-&gt;irq.idle_queue);</div><div class='del'>-	INIT_LIST_HEAD(&amp;rdev-&gt;semaphore_drv.bo);</div><div class='add'>+	r = radeon_gem_init(rdev);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='ctx'> 	/* initialize vm here */</div><div class='ctx'> 	rdev-&gt;vm_manager.use_bitmap = 1;</div><div class='ctx'> 	rdev-&gt;vm_manager.max_pfn = 1 &lt;&lt; 20;</div><div class='hunk'>@@ -814,10 +816,7 @@ int radeon_device_init(struct radeon_device *rdev,</div><div class='ctx'> 	/* this will fail for cards that aren't VGA class devices, just</div><div class='ctx'> 	 * ignore it */</div><div class='ctx'> 	vga_client_register(rdev-&gt;pdev, rdev, NULL, radeon_vga_set_decode);</div><div class='del'>-	vga_switcheroo_register_client(rdev-&gt;pdev,</div><div class='del'>-				       radeon_switcheroo_set_state,</div><div class='del'>-				       NULL,</div><div class='del'>-				       radeon_switcheroo_can_switch);</div><div class='add'>+	vga_switcheroo_register_client(rdev-&gt;pdev, &amp;radeon_switcheroo_ops);</div><div class='ctx'> </div><div class='ctx'> 	r = radeon_init(rdev);</div><div class='ctx'> 	if (r)</div><div class='hunk'>@@ -914,9 +913,12 @@ int radeon_suspend_kms(struct drm_device *dev, pm_message_t state)</div><div class='ctx'> 	}</div><div class='ctx'> 	/* evict vram memory */</div><div class='ctx'> 	radeon_bo_evict_vram(rdev);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> 	/* wait for gpu to finish processing current batch */</div><div class='ctx'> 	for (i = 0; i &lt; RADEON_NUM_RINGS; i++)</div><div class='del'>-		radeon_fence_wait_last(rdev, i);</div><div class='add'>+		radeon_fence_wait_empty_locked(rdev, i);</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> </div><div class='ctx'> 	radeon_save_bios_scratch_regs(rdev);</div><div class='ctx'> </div><div class='hunk'>@@ -955,7 +957,6 @@ int radeon_resume_kms(struct drm_device *dev)</div><div class='ctx'> 		console_unlock();</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='del'>-	pci_set_master(dev-&gt;pdev);</div><div class='ctx'> 	/* resume AGP if in use */</div><div class='ctx'> 	radeon_agp_resume(rdev);</div><div class='ctx'> 	radeon_resume(rdev);</div><div class='hunk'>@@ -988,9 +989,6 @@ int radeon_gpu_reset(struct radeon_device *rdev)</div><div class='ctx'> 	int r;</div><div class='ctx'> 	int resched;</div><div class='ctx'> </div><div class='del'>-	/* Prevent CS ioctl from interfering */</div><div class='del'>-	radeon_mutex_lock(&amp;rdev-&gt;cs_mutex);</div><div class='del'>-</div><div class='ctx'> 	radeon_save_bios_scratch_regs(rdev);</div><div class='ctx'> 	/* block TTM */</div><div class='ctx'> 	resched = ttm_bo_lock_delayed_workqueue(&amp;rdev-&gt;mman.bdev);</div><div class='hunk'>@@ -1005,8 +1003,6 @@ int radeon_gpu_reset(struct radeon_device *rdev)</div><div class='ctx'> 		ttm_bo_unlock_delayed_workqueue(&amp;rdev-&gt;mman.bdev, resched);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	radeon_mutex_unlock(&amp;rdev-&gt;cs_mutex);</div><div class='del'>-</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		/* bad news, how to tell it to userspace ? */</div><div class='ctx'> 		dev_info(rdev-&gt;dev, "GPU reset failed\n");</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c<br/>index 0a1d4bd65edc..64a008d14493 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_display.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_display.c</a></div><div class='hunk'>@@ -573,24 +573,6 @@ static const char *encoder_names[37] = {</div><div class='ctx'> 	"INTERNAL_VCE"</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char *connector_names[15] = {</div><div class='del'>-	"Unknown",</div><div class='del'>-	"VGA",</div><div class='del'>-	"DVI-I",</div><div class='del'>-	"DVI-D",</div><div class='del'>-	"DVI-A",</div><div class='del'>-	"Composite",</div><div class='del'>-	"S-video",</div><div class='del'>-	"LVDS",</div><div class='del'>-	"Component",</div><div class='del'>-	"DIN",</div><div class='del'>-	"DisplayPort",</div><div class='del'>-	"HDMI-A",</div><div class='del'>-	"HDMI-B",</div><div class='del'>-	"TV",</div><div class='del'>-	"eDP",</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const char *hpd_names[6] = {</div><div class='ctx'> 	"HPD1",</div><div class='ctx'> 	"HPD2",</div><div class='hunk'>@@ -613,7 +595,7 @@ static void radeon_print_display_setup(struct drm_device *dev)</div><div class='ctx'> 	list_for_each_entry(connector, &amp;dev-&gt;mode_config.connector_list, head) {</div><div class='ctx'> 		radeon_connector = to_radeon_connector(connector);</div><div class='ctx'> 		DRM_INFO("Connector %d:\n", i);</div><div class='del'>-		DRM_INFO("  %s\n", connector_names[connector-&gt;connector_type]);</div><div class='add'>+		DRM_INFO("  %s\n", drm_get_connector_name(connector));</div><div class='ctx'> 		if (radeon_connector-&gt;hpd.hpd != RADEON_HPD_NONE)</div><div class='ctx'> 			DRM_INFO("  %s\n", hpd_names[radeon_connector-&gt;hpd.hpd]);</div><div class='ctx'> 		if (radeon_connector-&gt;ddc_bus) {</div><div class='hunk'>@@ -1243,6 +1225,93 @@ void radeon_update_display_priority(struct radeon_device *rdev)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Allocate hdmi structs and determine register offsets</div><div class='add'>+ */</div><div class='add'>+static void radeon_afmt_init(struct radeon_device *rdev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; RADEON_MAX_AFMT_BLOCKS; i++)</div><div class='add'>+		rdev-&gt;mode_info.afmt[i] = NULL;</div><div class='add'>+</div><div class='add'>+	if (ASIC_IS_DCE6(rdev)) {</div><div class='add'>+		/* todo */</div><div class='add'>+	} else if (ASIC_IS_DCE4(rdev)) {</div><div class='add'>+		/* DCE4/5 has 6 audio blocks tied to DIG encoders */</div><div class='add'>+		/* DCE4.1 has 2 audio blocks tied to DIG encoders */</div><div class='add'>+		rdev-&gt;mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);</div><div class='add'>+		if (rdev-&gt;mode_info.afmt[0]) {</div><div class='add'>+			rdev-&gt;mode_info.afmt[0]-&gt;offset = EVERGREEN_CRTC0_REGISTER_OFFSET;</div><div class='add'>+			rdev-&gt;mode_info.afmt[0]-&gt;id = 0;</div><div class='add'>+		}</div><div class='add'>+		rdev-&gt;mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);</div><div class='add'>+		if (rdev-&gt;mode_info.afmt[1]) {</div><div class='add'>+			rdev-&gt;mode_info.afmt[1]-&gt;offset = EVERGREEN_CRTC1_REGISTER_OFFSET;</div><div class='add'>+			rdev-&gt;mode_info.afmt[1]-&gt;id = 1;</div><div class='add'>+		}</div><div class='add'>+		if (!ASIC_IS_DCE41(rdev)) {</div><div class='add'>+			rdev-&gt;mode_info.afmt[2] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);</div><div class='add'>+			if (rdev-&gt;mode_info.afmt[2]) {</div><div class='add'>+				rdev-&gt;mode_info.afmt[2]-&gt;offset = EVERGREEN_CRTC2_REGISTER_OFFSET;</div><div class='add'>+				rdev-&gt;mode_info.afmt[2]-&gt;id = 2;</div><div class='add'>+			}</div><div class='add'>+			rdev-&gt;mode_info.afmt[3] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);</div><div class='add'>+			if (rdev-&gt;mode_info.afmt[3]) {</div><div class='add'>+				rdev-&gt;mode_info.afmt[3]-&gt;offset = EVERGREEN_CRTC3_REGISTER_OFFSET;</div><div class='add'>+				rdev-&gt;mode_info.afmt[3]-&gt;id = 3;</div><div class='add'>+			}</div><div class='add'>+			rdev-&gt;mode_info.afmt[4] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);</div><div class='add'>+			if (rdev-&gt;mode_info.afmt[4]) {</div><div class='add'>+				rdev-&gt;mode_info.afmt[4]-&gt;offset = EVERGREEN_CRTC4_REGISTER_OFFSET;</div><div class='add'>+				rdev-&gt;mode_info.afmt[4]-&gt;id = 4;</div><div class='add'>+			}</div><div class='add'>+			rdev-&gt;mode_info.afmt[5] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);</div><div class='add'>+			if (rdev-&gt;mode_info.afmt[5]) {</div><div class='add'>+				rdev-&gt;mode_info.afmt[5]-&gt;offset = EVERGREEN_CRTC5_REGISTER_OFFSET;</div><div class='add'>+				rdev-&gt;mode_info.afmt[5]-&gt;id = 5;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else if (ASIC_IS_DCE3(rdev)) {</div><div class='add'>+		/* DCE3.x has 2 audio blocks tied to DIG encoders */</div><div class='add'>+		rdev-&gt;mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);</div><div class='add'>+		if (rdev-&gt;mode_info.afmt[0]) {</div><div class='add'>+			rdev-&gt;mode_info.afmt[0]-&gt;offset = DCE3_HDMI_OFFSET0;</div><div class='add'>+			rdev-&gt;mode_info.afmt[0]-&gt;id = 0;</div><div class='add'>+		}</div><div class='add'>+		rdev-&gt;mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);</div><div class='add'>+		if (rdev-&gt;mode_info.afmt[1]) {</div><div class='add'>+			rdev-&gt;mode_info.afmt[1]-&gt;offset = DCE3_HDMI_OFFSET1;</div><div class='add'>+			rdev-&gt;mode_info.afmt[1]-&gt;id = 1;</div><div class='add'>+		}</div><div class='add'>+	} else if (ASIC_IS_DCE2(rdev)) {</div><div class='add'>+		/* DCE2 has at least 1 routable audio block */</div><div class='add'>+		rdev-&gt;mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);</div><div class='add'>+		if (rdev-&gt;mode_info.afmt[0]) {</div><div class='add'>+			rdev-&gt;mode_info.afmt[0]-&gt;offset = DCE2_HDMI_OFFSET0;</div><div class='add'>+			rdev-&gt;mode_info.afmt[0]-&gt;id = 0;</div><div class='add'>+		}</div><div class='add'>+		/* r6xx has 2 routable audio blocks */</div><div class='add'>+		if (rdev-&gt;family &gt;= CHIP_R600) {</div><div class='add'>+			rdev-&gt;mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);</div><div class='add'>+			if (rdev-&gt;mode_info.afmt[1]) {</div><div class='add'>+				rdev-&gt;mode_info.afmt[1]-&gt;offset = DCE2_HDMI_OFFSET1;</div><div class='add'>+				rdev-&gt;mode_info.afmt[1]-&gt;id = 1;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void radeon_afmt_fini(struct radeon_device *rdev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; RADEON_MAX_AFMT_BLOCKS; i++) {</div><div class='add'>+		kfree(rdev-&gt;mode_info.afmt[i]);</div><div class='add'>+		rdev-&gt;mode_info.afmt[i] = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int radeon_modeset_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1251,7 +1320,7 @@ int radeon_modeset_init(struct radeon_device *rdev)</div><div class='ctx'> 	drm_mode_config_init(rdev-&gt;ddev);</div><div class='ctx'> 	rdev-&gt;mode_info.mode_config_initialized = true;</div><div class='ctx'> </div><div class='del'>-	rdev-&gt;ddev-&gt;mode_config.funcs = (void *)&amp;radeon_mode_funcs;</div><div class='add'>+	rdev-&gt;ddev-&gt;mode_config.funcs = &amp;radeon_mode_funcs;</div><div class='ctx'> </div><div class='ctx'> 	if (ASIC_IS_DCE5(rdev)) {</div><div class='ctx'> 		rdev-&gt;ddev-&gt;mode_config.max_width = 16384;</div><div class='hunk'>@@ -1303,6 +1372,9 @@ int radeon_modeset_init(struct radeon_device *rdev)</div><div class='ctx'> 	/* initialize hpd */</div><div class='ctx'> 	radeon_hpd_init(rdev);</div><div class='ctx'> </div><div class='add'>+	/* setup afmt */</div><div class='add'>+	radeon_afmt_init(rdev);</div><div class='add'>+</div><div class='ctx'> 	/* Initialize power management */</div><div class='ctx'> 	radeon_pm_init(rdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1319,6 +1391,7 @@ void radeon_modeset_fini(struct radeon_device *rdev)</div><div class='ctx'> 	radeon_pm_fini(rdev);</div><div class='ctx'> </div><div class='ctx'> 	if (rdev-&gt;mode_info.mode_config_initialized) {</div><div class='add'>+		radeon_afmt_fini(rdev);</div><div class='ctx'> 		drm_kms_helper_poll_fini(rdev-&gt;ddev);</div><div class='ctx'> 		radeon_hpd_fini(rdev);</div><div class='ctx'> 		drm_mode_config_cleanup(rdev-&gt;ddev);</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c<br/>index ef7bb3f6ecae..f0bb2b543b13 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_drv.c</a></div><div class='hunk'>@@ -105,6 +105,11 @@ int radeon_mode_dumb_create(struct drm_file *file_priv,</div><div class='ctx'> int radeon_mode_dumb_destroy(struct drm_file *file_priv,</div><div class='ctx'> 			     struct drm_device *dev,</div><div class='ctx'> 			     uint32_t handle);</div><div class='add'>+struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,</div><div class='add'>+					struct drm_gem_object *obj,</div><div class='add'>+					int flags);</div><div class='add'>+struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,</div><div class='add'>+					       struct dma_buf *dma_buf);</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_DEBUG_FS)</div><div class='ctx'> int radeon_debugfs_init(struct drm_minor *minor);</div><div class='hunk'>@@ -128,6 +133,7 @@ int radeon_disp_priority = 0;</div><div class='ctx'> int radeon_hw_i2c = 0;</div><div class='ctx'> int radeon_pcie_gen2 = 0;</div><div class='ctx'> int radeon_msi = -1;</div><div class='add'>+int radeon_lockup_timeout = 10000;</div><div class='ctx'> </div><div class='ctx'> MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");</div><div class='ctx'> module_param_named(no_wb, radeon_no_wb, int, 0444);</div><div class='hunk'>@@ -177,6 +183,9 @@ module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);</div><div class='ctx'> MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");</div><div class='ctx'> module_param_named(msi, radeon_msi, int, 0444);</div><div class='ctx'> </div><div class='add'>+MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");</div><div class='add'>+module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);</div><div class='add'>+</div><div class='ctx'> static int radeon_suspend(struct drm_device *dev, pm_message_t state)</div><div class='ctx'> {</div><div class='ctx'> 	drm_radeon_private_t *dev_priv = dev-&gt;dev_private;</div><div class='hunk'>@@ -329,7 +338,8 @@ static const struct file_operations radeon_driver_kms_fops = {</div><div class='ctx'> static struct drm_driver kms_driver = {</div><div class='ctx'> 	.driver_features =</div><div class='ctx'> 	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |</div><div class='del'>-	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM,</div><div class='add'>+	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |</div><div class='add'>+	    DRIVER_PRIME,</div><div class='ctx'> 	.dev_priv_size = 0,</div><div class='ctx'> 	.load = radeon_driver_load_kms,</div><div class='ctx'> 	.firstopen = radeon_driver_firstopen_kms,</div><div class='hunk'>@@ -364,6 +374,12 @@ static struct drm_driver kms_driver = {</div><div class='ctx'> 	.dumb_map_offset = radeon_mode_dumb_mmap,</div><div class='ctx'> 	.dumb_destroy = radeon_mode_dumb_destroy,</div><div class='ctx'> 	.fops = &amp;radeon_driver_kms_fops,</div><div class='add'>+</div><div class='add'>+	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,</div><div class='add'>+	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,</div><div class='add'>+	.gem_prime_export = radeon_gem_prime_export,</div><div class='add'>+	.gem_prime_import = radeon_gem_prime_import,</div><div class='add'>+</div><div class='ctx'> 	.name = DRIVER_NAME,</div><div class='ctx'> 	.desc = DRIVER_DESC,</div><div class='ctx'> 	.date = DRIVER_DATE,</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c<br/>index 4bd36a354fbe..11f5f402d22c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_fence.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_fence.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_fence.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_fence.c</a></div><div class='hunk'>@@ -63,98 +63,82 @@ static u32 radeon_fence_read(struct radeon_device *rdev, int ring)</div><div class='ctx'> </div><div class='ctx'> int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)</div><div class='ctx'> {</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-</div><div class='del'>-	write_lock_irqsave(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	if (fence-&gt;emitted) {</div><div class='del'>-		write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='add'>+	/* we are protected by the ring emission mutex */</div><div class='add'>+	if (fence-&gt;seq &amp;&amp; fence-&gt;seq &lt; RADEON_FENCE_NOTEMITED_SEQ) {</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	fence-&gt;seq = atomic_add_return(1, &amp;rdev-&gt;fence_drv[fence-&gt;ring].seq);</div><div class='del'>-	if (!rdev-&gt;ring[fence-&gt;ring].ready)</div><div class='del'>-		/* FIXME: cp is not running assume everythings is done right</div><div class='del'>-		 * away</div><div class='del'>-		 */</div><div class='del'>-		radeon_fence_write(rdev, fence-&gt;seq, fence-&gt;ring);</div><div class='del'>-	else</div><div class='del'>-		radeon_fence_ring_emit(rdev, fence-&gt;ring, fence);</div><div class='del'>-</div><div class='add'>+	fence-&gt;seq = ++rdev-&gt;fence_drv[fence-&gt;ring].seq;</div><div class='add'>+	radeon_fence_ring_emit(rdev, fence-&gt;ring, fence);</div><div class='ctx'> 	trace_radeon_fence_emit(rdev-&gt;ddev, fence-&gt;seq);</div><div class='del'>-	fence-&gt;emitted = true;</div><div class='del'>-	list_move_tail(&amp;fence-&gt;list, &amp;rdev-&gt;fence_drv[fence-&gt;ring].emitted);</div><div class='del'>-	write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool radeon_fence_poll_locked(struct radeon_device *rdev, int ring)</div><div class='add'>+void radeon_fence_process(struct radeon_device *rdev, int ring)</div><div class='ctx'> {</div><div class='del'>-	struct radeon_fence *fence;</div><div class='del'>-	struct list_head *i, *n;</div><div class='del'>-	uint32_t seq;</div><div class='add'>+	uint64_t seq, last_seq;</div><div class='add'>+	unsigned count_loop = 0;</div><div class='ctx'> 	bool wake = false;</div><div class='del'>-	unsigned long cjiffies;</div><div class='ctx'> </div><div class='del'>-	seq = radeon_fence_read(rdev, ring);</div><div class='del'>-	if (seq != rdev-&gt;fence_drv[ring].last_seq) {</div><div class='del'>-		rdev-&gt;fence_drv[ring].last_seq = seq;</div><div class='del'>-		rdev-&gt;fence_drv[ring].last_jiffies = jiffies;</div><div class='del'>-		rdev-&gt;fence_drv[ring].last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;</div><div class='del'>-	} else {</div><div class='del'>-		cjiffies = jiffies;</div><div class='del'>-		if (time_after(cjiffies, rdev-&gt;fence_drv[ring].last_jiffies)) {</div><div class='del'>-			cjiffies -= rdev-&gt;fence_drv[ring].last_jiffies;</div><div class='del'>-			if (time_after(rdev-&gt;fence_drv[ring].last_timeout, cjiffies)) {</div><div class='del'>-				/* update the timeout */</div><div class='del'>-				rdev-&gt;fence_drv[ring].last_timeout -= cjiffies;</div><div class='del'>-			} else {</div><div class='del'>-				/* the 500ms timeout is elapsed we should test</div><div class='del'>-				 * for GPU lockup</div><div class='del'>-				 */</div><div class='del'>-				rdev-&gt;fence_drv[ring].last_timeout = 1;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			/* wrap around update last jiffies, we will just wait</div><div class='del'>-			 * a little longer</div><div class='del'>-			 */</div><div class='del'>-			rdev-&gt;fence_drv[ring].last_jiffies = cjiffies;</div><div class='add'>+	/* Note there is a scenario here for an infinite loop but it's</div><div class='add'>+	 * very unlikely to happen. For it to happen, the current polling</div><div class='add'>+	 * process need to be interrupted by another process and another</div><div class='add'>+	 * process needs to update the last_seq btw the atomic read and</div><div class='add'>+	 * xchg of the current process.</div><div class='add'>+	 *</div><div class='add'>+	 * More over for this to go in infinite loop there need to be</div><div class='add'>+	 * continuously new fence signaled ie radeon_fence_read needs</div><div class='add'>+	 * to return a different value each time for both the currently</div><div class='add'>+	 * polling process and the other process that xchg the last_seq</div><div class='add'>+	 * btw atomic read and xchg of the current process. And the</div><div class='add'>+	 * value the other process set as last seq must be higher than</div><div class='add'>+	 * the seq value we just read. Which means that current process</div><div class='add'>+	 * need to be interrupted after radeon_fence_read and before</div><div class='add'>+	 * atomic xchg.</div><div class='add'>+	 *</div><div class='add'>+	 * To be even more safe we count the number of time we loop and</div><div class='add'>+	 * we bail after 10 loop just accepting the fact that we might</div><div class='add'>+	 * have temporarly set the last_seq not to the true real last</div><div class='add'>+	 * seq but to an older one.</div><div class='add'>+	 */</div><div class='add'>+	last_seq = atomic64_read(&amp;rdev-&gt;fence_drv[ring].last_seq);</div><div class='add'>+	do {</div><div class='add'>+		seq = radeon_fence_read(rdev, ring);</div><div class='add'>+		seq |= last_seq &amp; 0xffffffff00000000LL;</div><div class='add'>+		if (seq &lt; last_seq) {</div><div class='add'>+			seq += 0x100000000LL;</div><div class='ctx'> 		}</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-	n = NULL;</div><div class='del'>-	list_for_each(i, &amp;rdev-&gt;fence_drv[ring].emitted) {</div><div class='del'>-		fence = list_entry(i, struct radeon_fence, list);</div><div class='del'>-		if (fence-&gt;seq == seq) {</div><div class='del'>-			n = i;</div><div class='add'>+</div><div class='add'>+		if (seq == last_seq) {</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='del'>-	/* all fence previous to this one are considered as signaled */</div><div class='del'>-	if (n) {</div><div class='del'>-		i = n;</div><div class='del'>-		do {</div><div class='del'>-			n = i-&gt;prev;</div><div class='del'>-			list_move_tail(i, &amp;rdev-&gt;fence_drv[ring].signaled);</div><div class='del'>-			fence = list_entry(i, struct radeon_fence, list);</div><div class='del'>-			fence-&gt;signaled = true;</div><div class='del'>-			i = n;</div><div class='del'>-		} while (i != &amp;rdev-&gt;fence_drv[ring].emitted);</div><div class='add'>+		/* If we loop over we don't want to return without</div><div class='add'>+		 * checking if a fence is signaled as it means that the</div><div class='add'>+		 * seq we just read is different from the previous on.</div><div class='add'>+		 */</div><div class='ctx'> 		wake = true;</div><div class='add'>+		last_seq = seq;</div><div class='add'>+		if ((count_loop++) &gt; 10) {</div><div class='add'>+			/* We looped over too many time leave with the</div><div class='add'>+			 * fact that we might have set an older fence</div><div class='add'>+			 * seq then the current real last seq as signaled</div><div class='add'>+			 * by the hw.</div><div class='add'>+			 */</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} while (atomic64_xchg(&amp;rdev-&gt;fence_drv[ring].last_seq, seq) &gt; seq);</div><div class='add'>+</div><div class='add'>+	if (wake) {</div><div class='add'>+		rdev-&gt;fence_drv[ring].last_activity = jiffies;</div><div class='add'>+		wake_up_all(&amp;rdev-&gt;fence_queue);</div><div class='ctx'> 	}</div><div class='del'>-	return wake;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void radeon_fence_destroy(struct kref *kref)</div><div class='ctx'> {</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-        struct radeon_fence *fence;</div><div class='add'>+	struct radeon_fence *fence;</div><div class='ctx'> </div><div class='ctx'> 	fence = container_of(kref, struct radeon_fence, kref);</div><div class='del'>-	write_lock_irqsave(&amp;fence-&gt;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	list_del(&amp;fence-&gt;list);</div><div class='del'>-	fence-&gt;emitted = false;</div><div class='del'>-	write_unlock_irqrestore(&amp;fence-&gt;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	if (fence-&gt;semaphore)</div><div class='del'>-		radeon_semaphore_free(fence-&gt;rdev, fence-&gt;semaphore);</div><div class='add'>+	fence-&gt;seq = RADEON_FENCE_NOTEMITED_SEQ;</div><div class='ctx'> 	kfree(fence);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -162,171 +146,342 @@ int radeon_fence_create(struct radeon_device *rdev,</div><div class='ctx'> 			struct radeon_fence **fence,</div><div class='ctx'> 			int ring)</div><div class='ctx'> {</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-</div><div class='ctx'> 	*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);</div><div class='ctx'> 	if ((*fence) == NULL) {</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	kref_init(&amp;((*fence)-&gt;kref));</div><div class='ctx'> 	(*fence)-&gt;rdev = rdev;</div><div class='del'>-	(*fence)-&gt;emitted = false;</div><div class='del'>-	(*fence)-&gt;signaled = false;</div><div class='del'>-	(*fence)-&gt;seq = 0;</div><div class='add'>+	(*fence)-&gt;seq = RADEON_FENCE_NOTEMITED_SEQ;</div><div class='ctx'> 	(*fence)-&gt;ring = ring;</div><div class='del'>-	(*fence)-&gt;semaphore = NULL;</div><div class='del'>-	INIT_LIST_HEAD(&amp;(*fence)-&gt;list);</div><div class='del'>-</div><div class='del'>-	write_lock_irqsave(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	list_add_tail(&amp;(*fence)-&gt;list, &amp;rdev-&gt;fence_drv[ring].created);</div><div class='del'>-	write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool radeon_fence_signaled(struct radeon_fence *fence)</div><div class='add'>+static bool radeon_fence_seq_signaled(struct radeon_device *rdev,</div><div class='add'>+				      u64 seq, unsigned ring)</div><div class='ctx'> {</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-	bool signaled = false;</div><div class='del'>-</div><div class='del'>-	if (!fence)</div><div class='add'>+	if (atomic64_read(&amp;rdev-&gt;fence_drv[ring].last_seq) &gt;= seq) {</div><div class='ctx'> 		return true;</div><div class='del'>-</div><div class='del'>-	if (fence-&gt;rdev-&gt;gpu_lockup)</div><div class='add'>+	}</div><div class='add'>+	/* poll new last sequence at least once */</div><div class='add'>+	radeon_fence_process(rdev, ring);</div><div class='add'>+	if (atomic64_read(&amp;rdev-&gt;fence_drv[ring].last_seq) &gt;= seq) {</div><div class='ctx'> 		return true;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	write_lock_irqsave(&amp;fence-&gt;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	signaled = fence-&gt;signaled;</div><div class='del'>-	/* if we are shuting down report all fence as signaled */</div><div class='del'>-	if (fence-&gt;rdev-&gt;shutdown) {</div><div class='del'>-		signaled = true;</div><div class='add'>+bool radeon_fence_signaled(struct radeon_fence *fence)</div><div class='add'>+{</div><div class='add'>+	if (!fence) {</div><div class='add'>+		return true;</div><div class='ctx'> 	}</div><div class='del'>-	if (!fence-&gt;emitted) {</div><div class='add'>+	if (fence-&gt;seq == RADEON_FENCE_NOTEMITED_SEQ) {</div><div class='ctx'> 		WARN(1, "Querying an unemitted fence : %p !\n", fence);</div><div class='del'>-		signaled = true;</div><div class='add'>+		return true;</div><div class='ctx'> 	}</div><div class='del'>-	if (!signaled) {</div><div class='del'>-		radeon_fence_poll_locked(fence-&gt;rdev, fence-&gt;ring);</div><div class='del'>-		signaled = fence-&gt;signaled;</div><div class='add'>+	if (fence-&gt;seq == RADEON_FENCE_SIGNALED_SEQ) {</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+	if (radeon_fence_seq_signaled(fence-&gt;rdev, fence-&gt;seq, fence-&gt;ring)) {</div><div class='add'>+		fence-&gt;seq = RADEON_FENCE_SIGNALED_SEQ;</div><div class='add'>+		return true;</div><div class='ctx'> 	}</div><div class='del'>-	write_unlock_irqrestore(&amp;fence-&gt;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	return signaled;</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int radeon_fence_wait_seq(struct radeon_device *rdev, u64 target_seq,</div><div class='add'>+				 unsigned ring, bool intr, bool lock_ring)</div><div class='add'>+{</div><div class='add'>+	unsigned long timeout, last_activity;</div><div class='add'>+	uint64_t seq;</div><div class='add'>+	unsigned i;</div><div class='add'>+	bool signaled;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	while (target_seq &gt; atomic64_read(&amp;rdev-&gt;fence_drv[ring].last_seq)) {</div><div class='add'>+		if (!rdev-&gt;ring[ring].ready) {</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;</div><div class='add'>+		if (time_after(rdev-&gt;fence_drv[ring].last_activity, timeout)) {</div><div class='add'>+			/* the normal case, timeout is somewhere before last_activity */</div><div class='add'>+			timeout = rdev-&gt;fence_drv[ring].last_activity - timeout;</div><div class='add'>+		} else {</div><div class='add'>+			/* either jiffies wrapped around, or no fence was signaled in the last 500ms</div><div class='add'>+			 * anyway we will just wait for the minimum amount and then check for a lockup</div><div class='add'>+			 */</div><div class='add'>+			timeout = 1;</div><div class='add'>+		}</div><div class='add'>+		seq = atomic64_read(&amp;rdev-&gt;fence_drv[ring].last_seq);</div><div class='add'>+		/* Save current last activity valuee, used to check for GPU lockups */</div><div class='add'>+		last_activity = rdev-&gt;fence_drv[ring].last_activity;</div><div class='add'>+</div><div class='add'>+		trace_radeon_fence_wait_begin(rdev-&gt;ddev, seq);</div><div class='add'>+		radeon_irq_kms_sw_irq_get(rdev, ring);</div><div class='add'>+		if (intr) {</div><div class='add'>+			r = wait_event_interruptible_timeout(rdev-&gt;fence_queue,</div><div class='add'>+				(signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),</div><div class='add'>+				timeout);</div><div class='add'>+                } else {</div><div class='add'>+			r = wait_event_timeout(rdev-&gt;fence_queue,</div><div class='add'>+				(signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),</div><div class='add'>+				timeout);</div><div class='add'>+		}</div><div class='add'>+		radeon_irq_kms_sw_irq_put(rdev, ring);</div><div class='add'>+		if (unlikely(r &lt; 0)) {</div><div class='add'>+			return r;</div><div class='add'>+		}</div><div class='add'>+		trace_radeon_fence_wait_end(rdev-&gt;ddev, seq);</div><div class='add'>+</div><div class='add'>+		if (unlikely(!signaled)) {</div><div class='add'>+			/* we were interrupted for some reason and fence</div><div class='add'>+			 * isn't signaled yet, resume waiting */</div><div class='add'>+			if (r) {</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* check if sequence value has changed since last_activity */</div><div class='add'>+			if (seq != atomic64_read(&amp;rdev-&gt;fence_drv[ring].last_seq)) {</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (lock_ring) {</div><div class='add'>+				mutex_lock(&amp;rdev-&gt;ring_lock);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* test if somebody else has already decided that this is a lockup */</div><div class='add'>+			if (last_activity != rdev-&gt;fence_drv[ring].last_activity) {</div><div class='add'>+				if (lock_ring) {</div><div class='add'>+					mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='add'>+				}</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (radeon_ring_is_lockup(rdev, ring, &amp;rdev-&gt;ring[ring])) {</div><div class='add'>+				/* good news we believe it's a lockup */</div><div class='add'>+				dev_warn(rdev-&gt;dev, "GPU lockup (waiting for 0x%016llx last fence id 0x%016llx)\n",</div><div class='add'>+					 target_seq, seq);</div><div class='add'>+</div><div class='add'>+				/* change last activity so nobody else think there is a lockup */</div><div class='add'>+				for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+					rdev-&gt;fence_drv[i].last_activity = jiffies;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				/* mark the ring as not ready any more */</div><div class='add'>+				rdev-&gt;ring[ring].ready = false;</div><div class='add'>+				if (lock_ring) {</div><div class='add'>+					mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='add'>+				}</div><div class='add'>+				return -EDEADLK;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (lock_ring) {</div><div class='add'>+				mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int radeon_fence_wait(struct radeon_fence *fence, bool intr)</div><div class='ctx'> {</div><div class='del'>-	struct radeon_device *rdev;</div><div class='del'>-	unsigned long irq_flags, timeout;</div><div class='del'>-	u32 seq;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='ctx'> 	if (fence == NULL) {</div><div class='ctx'> 		WARN(1, "Querying an invalid fence : %p !\n", fence);</div><div class='del'>-		return 0;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	rdev = fence-&gt;rdev;</div><div class='del'>-	if (radeon_fence_signaled(fence)) {</div><div class='del'>-		return 0;</div><div class='add'>+</div><div class='add'>+	r = radeon_fence_wait_seq(fence-&gt;rdev, fence-&gt;seq,</div><div class='add'>+				  fence-&gt;ring, intr, true);</div><div class='add'>+	if (r) {</div><div class='add'>+		return r;</div><div class='ctx'> 	}</div><div class='del'>-	timeout = rdev-&gt;fence_drv[fence-&gt;ring].last_timeout;</div><div class='del'>-retry:</div><div class='del'>-	/* save current sequence used to check for GPU lockup */</div><div class='del'>-	seq = rdev-&gt;fence_drv[fence-&gt;ring].last_seq;</div><div class='del'>-	trace_radeon_fence_wait_begin(rdev-&gt;ddev, seq);</div><div class='del'>-	if (intr) {</div><div class='del'>-		radeon_irq_kms_sw_irq_get(rdev, fence-&gt;ring);</div><div class='del'>-		r = wait_event_interruptible_timeout(rdev-&gt;fence_drv[fence-&gt;ring].queue,</div><div class='del'>-				radeon_fence_signaled(fence), timeout);</div><div class='del'>-		radeon_irq_kms_sw_irq_put(rdev, fence-&gt;ring);</div><div class='del'>-		if (unlikely(r &lt; 0)) {</div><div class='del'>-			return r;</div><div class='add'>+	fence-&gt;seq = RADEON_FENCE_SIGNALED_SEQ;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool radeon_fence_any_seq_signaled(struct radeon_device *rdev, u64 *seq)</div><div class='add'>+{</div><div class='add'>+	unsigned i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+		if (seq[i] &amp;&amp; radeon_fence_seq_signaled(rdev, seq[i], i)) {</div><div class='add'>+			return true;</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		radeon_irq_kms_sw_irq_get(rdev, fence-&gt;ring);</div><div class='del'>-		r = wait_event_timeout(rdev-&gt;fence_drv[fence-&gt;ring].queue,</div><div class='del'>-			 radeon_fence_signaled(fence), timeout);</div><div class='del'>-		radeon_irq_kms_sw_irq_put(rdev, fence-&gt;ring);</div><div class='ctx'> 	}</div><div class='del'>-	trace_radeon_fence_wait_end(rdev-&gt;ddev, seq);</div><div class='del'>-	if (unlikely(!radeon_fence_signaled(fence))) {</div><div class='del'>-		/* we were interrupted for some reason and fence isn't</div><div class='del'>-		 * isn't signaled yet, resume wait</div><div class='del'>-		 */</div><div class='del'>-		if (r) {</div><div class='del'>-			timeout = r;</div><div class='del'>-			goto retry;</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int radeon_fence_wait_any_seq(struct radeon_device *rdev,</div><div class='add'>+				     u64 *target_seq, bool intr)</div><div class='add'>+{</div><div class='add'>+	unsigned long timeout, last_activity, tmp;</div><div class='add'>+	unsigned i, ring = RADEON_NUM_RINGS;</div><div class='add'>+	bool signaled;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	for (i = 0, last_activity = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+		if (!target_seq[i]) {</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* use the most recent one as indicator */</div><div class='add'>+		if (time_after(rdev-&gt;fence_drv[i].last_activity, last_activity)) {</div><div class='add'>+			last_activity = rdev-&gt;fence_drv[i].last_activity;</div><div class='ctx'> 		}</div><div class='del'>-		/* don't protect read access to rdev-&gt;fence_drv[t].last_seq</div><div class='del'>-		 * if we experiencing a lockup the value doesn't change</div><div class='add'>+</div><div class='add'>+		/* For lockup detection just pick the lowest ring we are</div><div class='add'>+		 * actively waiting for</div><div class='ctx'> 		 */</div><div class='del'>-		if (seq == rdev-&gt;fence_drv[fence-&gt;ring].last_seq &amp;&amp;</div><div class='del'>-		    radeon_gpu_is_lockup(rdev, &amp;rdev-&gt;ring[fence-&gt;ring])) {</div><div class='del'>-			/* good news we believe it's a lockup */</div><div class='del'>-			printk(KERN_WARNING "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n",</div><div class='del'>-			     fence-&gt;seq, seq);</div><div class='del'>-			/* FIXME: what should we do ? marking everyone</div><div class='del'>-			 * as signaled for now</div><div class='add'>+		if (i &lt; ring) {</div><div class='add'>+			ring = i;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* nothing to wait for ? */</div><div class='add'>+	if (ring == RADEON_NUM_RINGS) {</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (!radeon_fence_any_seq_signaled(rdev, target_seq)) {</div><div class='add'>+		timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;</div><div class='add'>+		if (time_after(last_activity, timeout)) {</div><div class='add'>+			/* the normal case, timeout is somewhere before last_activity */</div><div class='add'>+			timeout = last_activity - timeout;</div><div class='add'>+		} else {</div><div class='add'>+			/* either jiffies wrapped around, or no fence was signaled in the last 500ms</div><div class='add'>+			 * anyway we will just wait for the minimum amount and then check for a lockup</div><div class='ctx'> 			 */</div><div class='del'>-			rdev-&gt;gpu_lockup = true;</div><div class='del'>-			r = radeon_gpu_reset(rdev);</div><div class='del'>-			if (r)</div><div class='del'>-				return r;</div><div class='del'>-			radeon_fence_write(rdev, fence-&gt;seq, fence-&gt;ring);</div><div class='del'>-			rdev-&gt;gpu_lockup = false;</div><div class='add'>+			timeout = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		trace_radeon_fence_wait_begin(rdev-&gt;ddev, target_seq[ring]);</div><div class='add'>+		for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+			if (target_seq[i]) {</div><div class='add'>+				radeon_irq_kms_sw_irq_get(rdev, i);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (intr) {</div><div class='add'>+			r = wait_event_interruptible_timeout(rdev-&gt;fence_queue,</div><div class='add'>+				(signaled = radeon_fence_any_seq_signaled(rdev, target_seq)),</div><div class='add'>+				timeout);</div><div class='add'>+		} else {</div><div class='add'>+			r = wait_event_timeout(rdev-&gt;fence_queue,</div><div class='add'>+				(signaled = radeon_fence_any_seq_signaled(rdev, target_seq)),</div><div class='add'>+				timeout);</div><div class='add'>+		}</div><div class='add'>+		for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+			if (target_seq[i]) {</div><div class='add'>+				radeon_irq_kms_sw_irq_put(rdev, i);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (unlikely(r &lt; 0)) {</div><div class='add'>+			return r;</div><div class='add'>+		}</div><div class='add'>+		trace_radeon_fence_wait_end(rdev-&gt;ddev, target_seq[ring]);</div><div class='add'>+</div><div class='add'>+		if (unlikely(!signaled)) {</div><div class='add'>+			/* we were interrupted for some reason and fence</div><div class='add'>+			 * isn't signaled yet, resume waiting */</div><div class='add'>+			if (r) {</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			mutex_lock(&amp;rdev-&gt;ring_lock);</div><div class='add'>+			for (i = 0, tmp = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+				if (time_after(rdev-&gt;fence_drv[i].last_activity, tmp)) {</div><div class='add'>+					tmp = rdev-&gt;fence_drv[i].last_activity;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			/* test if somebody else has already decided that this is a lockup */</div><div class='add'>+			if (last_activity != tmp) {</div><div class='add'>+				last_activity = tmp;</div><div class='add'>+				mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (radeon_ring_is_lockup(rdev, ring, &amp;rdev-&gt;ring[ring])) {</div><div class='add'>+				/* good news we believe it's a lockup */</div><div class='add'>+				dev_warn(rdev-&gt;dev, "GPU lockup (waiting for 0x%016llx)\n",</div><div class='add'>+					 target_seq[ring]);</div><div class='add'>+</div><div class='add'>+				/* change last activity so nobody else think there is a lockup */</div><div class='add'>+				for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+					rdev-&gt;fence_drv[i].last_activity = jiffies;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				/* mark the ring as not ready any more */</div><div class='add'>+				rdev-&gt;ring[ring].ready = false;</div><div class='add'>+				mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='add'>+				return -EDEADLK;</div><div class='add'>+			}</div><div class='add'>+			mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> 		}</div><div class='del'>-		timeout = RADEON_FENCE_JIFFIES_TIMEOUT;</div><div class='del'>-		write_lock_irqsave(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-		rdev-&gt;fence_drv[fence-&gt;ring].last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;</div><div class='del'>-		rdev-&gt;fence_drv[fence-&gt;ring].last_jiffies = jiffies;</div><div class='del'>-		write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-		goto retry;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int radeon_fence_wait_next(struct radeon_device *rdev, int ring)</div><div class='add'>+int radeon_fence_wait_any(struct radeon_device *rdev,</div><div class='add'>+			  struct radeon_fence **fences,</div><div class='add'>+			  bool intr)</div><div class='ctx'> {</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-	struct radeon_fence *fence;</div><div class='add'>+	uint64_t seq[RADEON_NUM_RINGS];</div><div class='add'>+	unsigned i;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	if (rdev-&gt;gpu_lockup) {</div><div class='del'>-		return 0;</div><div class='add'>+	for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+		seq[i] = 0;</div><div class='add'>+</div><div class='add'>+		if (!fences[i]) {</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (fences[i]-&gt;seq == RADEON_FENCE_SIGNALED_SEQ) {</div><div class='add'>+			/* something was allready signaled */</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (fences[i]-&gt;seq &lt; RADEON_FENCE_NOTEMITED_SEQ) {</div><div class='add'>+			seq[i] = fences[i]-&gt;seq;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	write_lock_irqsave(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	if (list_empty(&amp;rdev-&gt;fence_drv[ring].emitted)) {</div><div class='del'>-		write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-		return 0;</div><div class='add'>+</div><div class='add'>+	r = radeon_fence_wait_any_seq(rdev, seq, intr);</div><div class='add'>+	if (r) {</div><div class='add'>+		return r;</div><div class='ctx'> 	}</div><div class='del'>-	fence = list_entry(rdev-&gt;fence_drv[ring].emitted.next,</div><div class='del'>-			   struct radeon_fence, list);</div><div class='del'>-	radeon_fence_ref(fence);</div><div class='del'>-	write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	r = radeon_fence_wait(fence, false);</div><div class='del'>-	radeon_fence_unref(&amp;fence);</div><div class='del'>-	return r;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int radeon_fence_wait_last(struct radeon_device *rdev, int ring)</div><div class='add'>+int radeon_fence_wait_next_locked(struct radeon_device *rdev, int ring)</div><div class='ctx'> {</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-	struct radeon_fence *fence;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	if (rdev-&gt;gpu_lockup) {</div><div class='del'>-		return 0;</div><div class='add'>+	uint64_t seq;</div><div class='add'>+</div><div class='add'>+	/* We are not protected by ring lock when reading current seq but</div><div class='add'>+	 * it's ok as worst case is we return to early while we could have</div><div class='add'>+	 * wait.</div><div class='add'>+	 */</div><div class='add'>+	seq = atomic64_read(&amp;rdev-&gt;fence_drv[ring].last_seq) + 1ULL;</div><div class='add'>+	if (seq &gt;= rdev-&gt;fence_drv[ring].seq) {</div><div class='add'>+		/* nothing to wait for, last_seq is</div><div class='add'>+		   already the last emited fence */</div><div class='add'>+		return -ENOENT;</div><div class='ctx'> 	}</div><div class='del'>-	write_lock_irqsave(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	if (list_empty(&amp;rdev-&gt;fence_drv[ring].emitted)) {</div><div class='del'>-		write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	fence = list_entry(rdev-&gt;fence_drv[ring].emitted.prev,</div><div class='del'>-			   struct radeon_fence, list);</div><div class='del'>-	radeon_fence_ref(fence);</div><div class='del'>-	write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	r = radeon_fence_wait(fence, false);</div><div class='del'>-	radeon_fence_unref(&amp;fence);</div><div class='del'>-	return r;</div><div class='add'>+	return radeon_fence_wait_seq(rdev, seq, ring, false, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int radeon_fence_wait_empty_locked(struct radeon_device *rdev, int ring)</div><div class='add'>+{</div><div class='add'>+	/* We are not protected by ring lock when reading current seq</div><div class='add'>+	 * but it's ok as wait empty is call from place where no more</div><div class='add'>+	 * activity can be scheduled so there won't be concurrent access</div><div class='add'>+	 * to seq value.</div><div class='add'>+	 */</div><div class='add'>+	return radeon_fence_wait_seq(rdev, rdev-&gt;fence_drv[ring].seq,</div><div class='add'>+				     ring, false, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)</div><div class='hunk'>@@ -345,49 +500,27 @@ void radeon_fence_unref(struct radeon_fence **fence)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void radeon_fence_process(struct radeon_device *rdev, int ring)</div><div class='del'>-{</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-	bool wake;</div><div class='del'>-</div><div class='del'>-	write_lock_irqsave(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	wake = radeon_fence_poll_locked(rdev, ring);</div><div class='del'>-	write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	if (wake) {</div><div class='del'>-		wake_up_all(&amp;rdev-&gt;fence_drv[ring].queue);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int radeon_fence_count_emitted(struct radeon_device *rdev, int ring)</div><div class='add'>+unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring)</div><div class='ctx'> {</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-	int not_processed = 0;</div><div class='del'>-</div><div class='del'>-	read_lock_irqsave(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	if (!rdev-&gt;fence_drv[ring].initialized) {</div><div class='del'>-		read_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-		return 0;</div><div class='add'>+	uint64_t emitted;</div><div class='add'>+</div><div class='add'>+	/* We are not protected by ring lock when reading the last sequence</div><div class='add'>+	 * but it's ok to report slightly wrong fence count here.</div><div class='add'>+	 */</div><div class='add'>+	radeon_fence_process(rdev, ring);</div><div class='add'>+	emitted = rdev-&gt;fence_drv[ring].seq - atomic64_read(&amp;rdev-&gt;fence_drv[ring].last_seq);</div><div class='add'>+	/* to avoid 32bits warp around */</div><div class='add'>+	if (emitted &gt; 0x10000000) {</div><div class='add'>+		emitted = 0x10000000;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (!list_empty(&amp;rdev-&gt;fence_drv[ring].emitted)) {</div><div class='del'>-		struct list_head *ptr;</div><div class='del'>-		list_for_each(ptr, &amp;rdev-&gt;fence_drv[ring].emitted) {</div><div class='del'>-			/* count up to 3, that's enought info */</div><div class='del'>-			if (++not_processed &gt;= 3)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	read_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='del'>-	return not_processed;</div><div class='add'>+	return (unsigned)emitted;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)</div><div class='ctx'> {</div><div class='del'>-	unsigned long irq_flags;</div><div class='ctx'> 	uint64_t index;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	write_lock_irqsave(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='ctx'> 	radeon_scratch_free(rdev, rdev-&gt;fence_drv[ring].scratch_reg);</div><div class='ctx'> 	if (rdev-&gt;wb.use_event) {</div><div class='ctx'> 		rdev-&gt;fence_drv[ring].scratch_reg = 0;</div><div class='hunk'>@@ -396,7 +529,6 @@ int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)</div><div class='ctx'> 		r = radeon_scratch_get(rdev, &amp;rdev-&gt;fence_drv[ring].scratch_reg);</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			dev_err(rdev-&gt;dev, "fence failed to get scratch register\n");</div><div class='del'>-			write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='ctx'> 		index = RADEON_WB_SCRATCH_OFFSET +</div><div class='hunk'>@@ -405,11 +537,10 @@ int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)</div><div class='ctx'> 	}</div><div class='ctx'> 	rdev-&gt;fence_drv[ring].cpu_addr = &amp;rdev-&gt;wb.wb[index/4];</div><div class='ctx'> 	rdev-&gt;fence_drv[ring].gpu_addr = rdev-&gt;wb.gpu_addr + index;</div><div class='del'>-	radeon_fence_write(rdev, atomic_read(&amp;rdev-&gt;fence_drv[ring].seq), ring);</div><div class='add'>+	radeon_fence_write(rdev, rdev-&gt;fence_drv[ring].seq, ring);</div><div class='ctx'> 	rdev-&gt;fence_drv[ring].initialized = true;</div><div class='del'>-	DRM_INFO("fence driver on ring %d use gpu addr 0x%08Lx and cpu addr 0x%p\n",</div><div class='add'>+	dev_info(rdev-&gt;dev, "fence driver on ring %d use gpu addr 0x%016llx and cpu addr 0x%p\n",</div><div class='ctx'> 		 ring, rdev-&gt;fence_drv[ring].gpu_addr, rdev-&gt;fence_drv[ring].cpu_addr);</div><div class='del'>-	write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -418,24 +549,20 @@ static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring)</div><div class='ctx'> 	rdev-&gt;fence_drv[ring].scratch_reg = -1;</div><div class='ctx'> 	rdev-&gt;fence_drv[ring].cpu_addr = NULL;</div><div class='ctx'> 	rdev-&gt;fence_drv[ring].gpu_addr = 0;</div><div class='del'>-	atomic_set(&amp;rdev-&gt;fence_drv[ring].seq, 0);</div><div class='del'>-	INIT_LIST_HEAD(&amp;rdev-&gt;fence_drv[ring].created);</div><div class='del'>-	INIT_LIST_HEAD(&amp;rdev-&gt;fence_drv[ring].emitted);</div><div class='del'>-	INIT_LIST_HEAD(&amp;rdev-&gt;fence_drv[ring].signaled);</div><div class='del'>-	init_waitqueue_head(&amp;rdev-&gt;fence_drv[ring].queue);</div><div class='add'>+	rdev-&gt;fence_drv[ring].seq = 0;</div><div class='add'>+	atomic64_set(&amp;rdev-&gt;fence_drv[ring].last_seq, 0);</div><div class='add'>+	rdev-&gt;fence_drv[ring].last_activity = jiffies;</div><div class='ctx'> 	rdev-&gt;fence_drv[ring].initialized = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int radeon_fence_driver_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='del'>-	unsigned long irq_flags;</div><div class='ctx'> 	int ring;</div><div class='ctx'> </div><div class='del'>-	write_lock_irqsave(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='add'>+	init_waitqueue_head(&amp;rdev-&gt;fence_queue);</div><div class='ctx'> 	for (ring = 0; ring &lt; RADEON_NUM_RINGS; ring++) {</div><div class='ctx'> 		radeon_fence_driver_init_ring(rdev, ring);</div><div class='ctx'> 	}</div><div class='del'>-	write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='ctx'> 	if (radeon_debugfs_fence_init(rdev)) {</div><div class='ctx'> 		dev_err(rdev-&gt;dev, "fence debugfs file creation failed\n");</div><div class='ctx'> 	}</div><div class='hunk'>@@ -444,19 +571,18 @@ int radeon_fence_driver_init(struct radeon_device *rdev)</div><div class='ctx'> </div><div class='ctx'> void radeon_fence_driver_fini(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='del'>-	unsigned long irq_flags;</div><div class='ctx'> 	int ring;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> 	for (ring = 0; ring &lt; RADEON_NUM_RINGS; ring++) {</div><div class='ctx'> 		if (!rdev-&gt;fence_drv[ring].initialized)</div><div class='ctx'> 			continue;</div><div class='del'>-		radeon_fence_wait_last(rdev, ring);</div><div class='del'>-		wake_up_all(&amp;rdev-&gt;fence_drv[ring].queue);</div><div class='del'>-		write_lock_irqsave(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='add'>+		radeon_fence_wait_empty_locked(rdev, ring);</div><div class='add'>+		wake_up_all(&amp;rdev-&gt;fence_queue);</div><div class='ctx'> 		radeon_scratch_free(rdev, rdev-&gt;fence_drv[ring].scratch_reg);</div><div class='del'>-		write_unlock_irqrestore(&amp;rdev-&gt;fence_lock, irq_flags);</div><div class='ctx'> 		rdev-&gt;fence_drv[ring].initialized = false;</div><div class='ctx'> 	}</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -469,7 +595,6 @@ static int radeon_debugfs_fence_info(struct seq_file *m, void *data)</div><div class='ctx'> 	struct drm_info_node *node = (struct drm_info_node *)m-&gt;private;</div><div class='ctx'> 	struct drm_device *dev = node-&gt;minor-&gt;dev;</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='del'>-	struct radeon_fence *fence;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='hunk'>@@ -477,14 +602,10 @@ static int radeon_debugfs_fence_info(struct seq_file *m, void *data)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		seq_printf(m, "--- ring %d ---\n", i);</div><div class='del'>-		seq_printf(m, "Last signaled fence 0x%08X\n",</div><div class='del'>-			   radeon_fence_read(rdev, i));</div><div class='del'>-		if (!list_empty(&amp;rdev-&gt;fence_drv[i].emitted)) {</div><div class='del'>-			fence = list_entry(rdev-&gt;fence_drv[i].emitted.prev,</div><div class='del'>-					   struct radeon_fence, list);</div><div class='del'>-			seq_printf(m, "Last emitted fence %p with 0x%08X\n",</div><div class='del'>-				   fence,  fence-&gt;seq);</div><div class='del'>-		}</div><div class='add'>+		seq_printf(m, "Last signaled fence 0x%016llx\n",</div><div class='add'>+			   (unsigned long long)atomic64_read(&amp;rdev-&gt;fence_drv[i].last_seq));</div><div class='add'>+		seq_printf(m, "Last emitted  0x%016llx\n",</div><div class='add'>+			   rdev-&gt;fence_drv[i].seq);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c<br/>index c58a036233fb..59d44937dd9f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_gart.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_gart.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_gart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_gart.c</a></div><div class='hunk'>@@ -80,7 +80,7 @@ int radeon_gart_table_vram_alloc(struct radeon_device *rdev)</div><div class='ctx'> 	if (rdev-&gt;gart.robj == NULL) {</div><div class='ctx'> 		r = radeon_bo_create(rdev, rdev-&gt;gart.table_size,</div><div class='ctx'> 				     PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,</div><div class='del'>-				     &amp;rdev-&gt;gart.robj);</div><div class='add'>+				     NULL, &amp;rdev-&gt;gart.robj);</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -326,7 +326,7 @@ static void radeon_vm_unbind_locked(struct radeon_device *rdev,</div><div class='ctx'> 	rdev-&gt;vm_manager.use_bitmap &amp;= ~(1 &lt;&lt; vm-&gt;id);</div><div class='ctx'> 	list_del_init(&amp;vm-&gt;list);</div><div class='ctx'> 	vm-&gt;id = -1;</div><div class='del'>-	radeon_sa_bo_free(rdev, &amp;vm-&gt;sa_bo);</div><div class='add'>+	radeon_sa_bo_free(rdev, &amp;vm-&gt;sa_bo, NULL);</div><div class='ctx'> 	vm-&gt;pt = NULL;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(bo_va, &amp;vm-&gt;va, vm_list) {</div><div class='hunk'>@@ -395,7 +395,7 @@ int radeon_vm_bind(struct radeon_device *rdev, struct radeon_vm *vm)</div><div class='ctx'> retry:</div><div class='ctx'> 	r = radeon_sa_bo_new(rdev, &amp;rdev-&gt;vm_manager.sa_manager, &amp;vm-&gt;sa_bo,</div><div class='ctx'> 			     RADEON_GPU_PAGE_ALIGN(vm-&gt;last_pfn * 8),</div><div class='del'>-			     RADEON_GPU_PAGE_SIZE);</div><div class='add'>+			     RADEON_GPU_PAGE_SIZE, false);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		if (list_empty(&amp;rdev-&gt;vm_manager.lru_vm)) {</div><div class='ctx'> 			return r;</div><div class='hunk'>@@ -404,10 +404,8 @@ retry:</div><div class='ctx'> 		radeon_vm_unbind(rdev, vm_evict);</div><div class='ctx'> 		goto retry;</div><div class='ctx'> 	}</div><div class='del'>-	vm-&gt;pt = rdev-&gt;vm_manager.sa_manager.cpu_ptr;</div><div class='del'>-	vm-&gt;pt += (vm-&gt;sa_bo.offset &gt;&gt; 3);</div><div class='del'>-	vm-&gt;pt_gpu_addr = rdev-&gt;vm_manager.sa_manager.gpu_addr;</div><div class='del'>-	vm-&gt;pt_gpu_addr += vm-&gt;sa_bo.offset;</div><div class='add'>+	vm-&gt;pt = radeon_sa_bo_cpu_addr(vm-&gt;sa_bo);</div><div class='add'>+	vm-&gt;pt_gpu_addr = radeon_sa_bo_gpu_addr(vm-&gt;sa_bo);</div><div class='ctx'> 	memset(vm-&gt;pt, 0, RADEON_GPU_PAGE_ALIGN(vm-&gt;last_pfn * 8));</div><div class='ctx'> </div><div class='ctx'> retry_id:</div><div class='hunk'>@@ -428,14 +426,14 @@ retry_id:</div><div class='ctx'> 	/* do hw bind */</div><div class='ctx'> 	r = rdev-&gt;vm_manager.funcs-&gt;bind(rdev, vm, id);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		radeon_sa_bo_free(rdev, &amp;vm-&gt;sa_bo);</div><div class='add'>+		radeon_sa_bo_free(rdev, &amp;vm-&gt;sa_bo, NULL);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> 	rdev-&gt;vm_manager.use_bitmap |= 1 &lt;&lt; id;</div><div class='ctx'> 	vm-&gt;id = id;</div><div class='ctx'> 	list_add_tail(&amp;vm-&gt;list, &amp;rdev-&gt;vm_manager.lru_vm);</div><div class='del'>-	return radeon_vm_bo_update_pte(rdev, vm, rdev-&gt;ib_pool.sa_manager.bo,</div><div class='del'>-				       &amp;rdev-&gt;ib_pool.sa_manager.bo-&gt;tbo.mem);</div><div class='add'>+	return radeon_vm_bo_update_pte(rdev, vm, rdev-&gt;ring_tmp_bo.bo,</div><div class='add'>+				       &amp;rdev-&gt;ring_tmp_bo.bo-&gt;tbo.mem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* object have to be reserved */</div><div class='hunk'>@@ -478,12 +476,18 @@ int radeon_vm_bo_add(struct radeon_device *rdev,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;vm-&gt;mutex);</div><div class='ctx'> 	if (last_pfn &gt; vm-&gt;last_pfn) {</div><div class='del'>-		/* grow va space 32M by 32M */</div><div class='del'>-		unsigned align = ((32 &lt;&lt; 20) &gt;&gt; 12) - 1;</div><div class='add'>+		/* release mutex and lock in right order */</div><div class='add'>+		mutex_unlock(&amp;vm-&gt;mutex);</div><div class='ctx'> 		radeon_mutex_lock(&amp;rdev-&gt;cs_mutex);</div><div class='del'>-		radeon_vm_unbind_locked(rdev, vm);</div><div class='add'>+		mutex_lock(&amp;vm-&gt;mutex);</div><div class='add'>+		/* and check again */</div><div class='add'>+		if (last_pfn &gt; vm-&gt;last_pfn) {</div><div class='add'>+			/* grow va space 32M by 32M */</div><div class='add'>+			unsigned align = ((32 &lt;&lt; 20) &gt;&gt; 12) - 1;</div><div class='add'>+			radeon_vm_unbind_locked(rdev, vm);</div><div class='add'>+			vm-&gt;last_pfn = (last_pfn + align) &amp; ~align;</div><div class='add'>+		}</div><div class='ctx'> 		radeon_mutex_unlock(&amp;rdev-&gt;cs_mutex);</div><div class='del'>-		vm-&gt;last_pfn = (last_pfn + align) &amp; ~align;</div><div class='ctx'> 	}</div><div class='ctx'> 	head = &amp;vm-&gt;va;</div><div class='ctx'> 	last_offset = 0;</div><div class='hunk'>@@ -551,7 +555,7 @@ int radeon_vm_bo_update_pte(struct radeon_device *rdev,</div><div class='ctx'> </div><div class='ctx'> 	/* nothing to do if vm isn't bound */</div><div class='ctx'> 	if (vm-&gt;id == -1)</div><div class='del'>-		return 0;;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	bo_va = radeon_bo_va(bo, vm);</div><div class='ctx'> 	if (bo_va == NULL) {</div><div class='hunk'>@@ -597,8 +601,8 @@ int radeon_vm_bo_rmv(struct radeon_device *rdev,</div><div class='ctx'> 	if (bo_va == NULL)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;vm-&gt;mutex);</div><div class='ctx'> 	radeon_mutex_lock(&amp;rdev-&gt;cs_mutex);</div><div class='add'>+	mutex_lock(&amp;vm-&gt;mutex);</div><div class='ctx'> 	radeon_vm_bo_update_pte(rdev, vm, bo, NULL);</div><div class='ctx'> 	radeon_mutex_unlock(&amp;rdev-&gt;cs_mutex);</div><div class='ctx'> 	list_del(&amp;bo_va-&gt;vm_list);</div><div class='hunk'>@@ -633,7 +637,7 @@ int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm)</div><div class='ctx'> 	/* map the ib pool buffer at 0 in virtual address space, set</div><div class='ctx'> 	 * read only</div><div class='ctx'> 	 */</div><div class='del'>-	r = radeon_vm_bo_add(rdev, vm, rdev-&gt;ib_pool.sa_manager.bo, 0,</div><div class='add'>+	r = radeon_vm_bo_add(rdev, vm, rdev-&gt;ring_tmp_bo.bo, 0,</div><div class='ctx'> 			     RADEON_VM_PAGE_READABLE | RADEON_VM_PAGE_SNOOPED);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='hunk'>@@ -643,19 +647,18 @@ void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm)</div><div class='ctx'> 	struct radeon_bo_va *bo_va, *tmp;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;vm-&gt;mutex);</div><div class='del'>-</div><div class='ctx'> 	radeon_mutex_lock(&amp;rdev-&gt;cs_mutex);</div><div class='add'>+	mutex_lock(&amp;vm-&gt;mutex);</div><div class='ctx'> 	radeon_vm_unbind_locked(rdev, vm);</div><div class='ctx'> 	radeon_mutex_unlock(&amp;rdev-&gt;cs_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* remove all bo */</div><div class='del'>-	r = radeon_bo_reserve(rdev-&gt;ib_pool.sa_manager.bo, false);</div><div class='add'>+	r = radeon_bo_reserve(rdev-&gt;ring_tmp_bo.bo, false);</div><div class='ctx'> 	if (!r) {</div><div class='del'>-		bo_va = radeon_bo_va(rdev-&gt;ib_pool.sa_manager.bo, vm);</div><div class='add'>+		bo_va = radeon_bo_va(rdev-&gt;ring_tmp_bo.bo, vm);</div><div class='ctx'> 		list_del_init(&amp;bo_va-&gt;bo_list);</div><div class='ctx'> 		list_del_init(&amp;bo_va-&gt;vm_list);</div><div class='del'>-		radeon_bo_unreserve(rdev-&gt;ib_pool.sa_manager.bo);</div><div class='add'>+		radeon_bo_unreserve(rdev-&gt;ring_tmp_bo.bo);</div><div class='ctx'> 		kfree(bo_va);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!list_empty(&amp;vm-&gt;va)) {</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c<br/>index c7008b5210f7..f28bd4b7ef98 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_gem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_gem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_gem.c</a></div><div class='hunk'>@@ -42,6 +42,8 @@ void radeon_gem_object_free(struct drm_gem_object *gobj)</div><div class='ctx'> 	struct radeon_bo *robj = gem_to_radeon_bo(gobj);</div><div class='ctx'> </div><div class='ctx'> 	if (robj) {</div><div class='add'>+		if (robj-&gt;gem_base.import_attach)</div><div class='add'>+			drm_prime_gem_destroy(&amp;robj-&gt;gem_base, robj-&gt;tbo.sg);</div><div class='ctx'> 		radeon_bo_unref(&amp;robj);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -59,7 +61,7 @@ int radeon_gem_object_create(struct radeon_device *rdev, int size,</div><div class='ctx'> 	if (alignment &lt; PAGE_SIZE) {</div><div class='ctx'> 		alignment = PAGE_SIZE;</div><div class='ctx'> 	}</div><div class='del'>-	r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, &amp;robj);</div><div class='add'>+	r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &amp;robj);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		if (r != -ERESTARTSYS)</div><div class='ctx'> 			DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",</div><div class='hunk'>@@ -91,7 +93,7 @@ int radeon_gem_set_domain(struct drm_gem_object *gobj,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!domain) {</div><div class='ctx'> 		/* Do nothings */</div><div class='del'>-		printk(KERN_WARNING "Set domain withou domain !\n");</div><div class='add'>+		printk(KERN_WARNING "Set domain without domain !\n");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (domain == RADEON_GEM_DOMAIN_CPU) {</div><div class='hunk'>@@ -154,6 +156,17 @@ void radeon_gem_object_close(struct drm_gem_object *obj,</div><div class='ctx'> 	radeon_bo_unreserve(rbo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)</div><div class='add'>+{</div><div class='add'>+	if (r == -EDEADLK) {</div><div class='add'>+		radeon_mutex_lock(&amp;rdev-&gt;cs_mutex);</div><div class='add'>+		r = radeon_gpu_reset(rdev);</div><div class='add'>+		if (!r)</div><div class='add'>+			r = -EAGAIN;</div><div class='add'>+		radeon_mutex_unlock(&amp;rdev-&gt;cs_mutex);</div><div class='add'>+	}</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * GEM ioctls.</div><div class='hunk'>@@ -210,12 +223,14 @@ int radeon_gem_create_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 					args-&gt;initial_domain, false,</div><div class='ctx'> 					false, &amp;gobj);</div><div class='ctx'> 	if (r) {</div><div class='add'>+		r = radeon_gem_handle_lockup(rdev, r);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> 	r = drm_gem_handle_create(filp, gobj, &amp;handle);</div><div class='ctx'> 	/* drop reference from allocate - handle holds it now */</div><div class='ctx'> 	drm_gem_object_unreference_unlocked(gobj);</div><div class='ctx'> 	if (r) {</div><div class='add'>+		r = radeon_gem_handle_lockup(rdev, r);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> 	args-&gt;handle = handle;</div><div class='hunk'>@@ -245,6 +260,7 @@ int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	r = radeon_gem_set_domain(gobj, args-&gt;read_domains, args-&gt;write_domain);</div><div class='ctx'> </div><div class='ctx'> 	drm_gem_object_unreference_unlocked(gobj);</div><div class='add'>+	r = radeon_gem_handle_lockup(robj-&gt;rdev, r);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -301,6 +317,7 @@ int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	drm_gem_object_unreference_unlocked(gobj);</div><div class='add'>+	r = radeon_gem_handle_lockup(robj-&gt;rdev, r);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -322,6 +339,7 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	if (robj-&gt;rdev-&gt;asic-&gt;ioctl_wait_idle)</div><div class='ctx'> 		robj-&gt;rdev-&gt;asic-&gt;ioctl_wait_idle(robj-&gt;rdev, robj);</div><div class='ctx'> 	drm_gem_object_unreference_unlocked(gobj);</div><div class='add'>+	r = radeon_gem_handle_lockup(robj-&gt;rdev, r);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c<br/>index 65060b77c805..5df58d1aba06 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_irq_kms.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_irq_kms.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_irq_kms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_irq_kms.c</a></div><div class='hunk'>@@ -73,6 +73,7 @@ void radeon_driver_irq_preinstall_kms(struct drm_device *dev)</div><div class='ctx'> 	for (i = 0; i &lt; RADEON_MAX_CRTCS; i++) {</div><div class='ctx'> 		rdev-&gt;irq.crtc_vblank_int[i] = false;</div><div class='ctx'> 		rdev-&gt;irq.pflip[i] = false;</div><div class='add'>+		rdev-&gt;irq.afmt[i] = false;</div><div class='ctx'> 	}</div><div class='ctx'> 	radeon_irq_set(rdev);</div><div class='ctx'> 	/* Clear bits */</div><div class='hunk'>@@ -108,6 +109,7 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev)</div><div class='ctx'> 	for (i = 0; i &lt; RADEON_MAX_CRTCS; i++) {</div><div class='ctx'> 		rdev-&gt;irq.crtc_vblank_int[i] = false;</div><div class='ctx'> 		rdev-&gt;irq.pflip[i] = false;</div><div class='add'>+		rdev-&gt;irq.afmt[i] = false;</div><div class='ctx'> 	}</div><div class='ctx'> 	radeon_irq_set(rdev);</div><div class='ctx'> }</div><div class='hunk'>@@ -170,6 +172,7 @@ int radeon_irq_kms_init(struct radeon_device *rdev)</div><div class='ctx'> 	int r = 0;</div><div class='ctx'> </div><div class='ctx'> 	INIT_WORK(&amp;rdev-&gt;hotplug_work, radeon_hotplug_work_func);</div><div class='add'>+	INIT_WORK(&amp;rdev-&gt;audio_work, r600_audio_update_hdmi);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;rdev-&gt;irq.sw_lock);</div><div class='ctx'> 	for (i = 0; i &lt; rdev-&gt;num_crtc; i++)</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c<br/>index 3c2628b14d56..5c58d7d90cb2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_kms.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_kms.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_kms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_kms.c</a></div><div class='hunk'>@@ -57,8 +57,6 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)</div><div class='ctx'> 	}</div><div class='ctx'> 	dev-&gt;dev_private = (void *)rdev;</div><div class='ctx'> </div><div class='del'>-	pci_set_master(dev-&gt;pdev);</div><div class='del'>-</div><div class='ctx'> 	/* update BUS flag */</div><div class='ctx'> 	if (drm_pci_device_is_agp(dev)) {</div><div class='ctx'> 		flags |= RADEON_IS_AGP;</div><div class='hunk'>@@ -275,7 +273,7 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case RADEON_INFO_MAX_PIPES:</div><div class='ctx'> 		if (rdev-&gt;family &gt;= CHIP_TAHITI)</div><div class='del'>-			value = rdev-&gt;config.si.max_pipes_per_simd;</div><div class='add'>+			value = rdev-&gt;config.si.max_cu_per_sh;</div><div class='ctx'> 		else if (rdev-&gt;family &gt;= CHIP_CAYMAN)</div><div class='ctx'> 			value = rdev-&gt;config.cayman.max_pipes_per_simd;</div><div class='ctx'> 		else if (rdev-&gt;family &gt;= CHIP_CEDAR)</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c<br/>index 42db254f6bb0..a0c82229e8f0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_legacy_encoders.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_legacy_encoders.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_legacy_encoders.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_legacy_encoders.c</a></div><div class='hunk'>@@ -369,6 +369,7 @@ void radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder,</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	memset(&amp;props, 0, sizeof(props));</div><div class='ctx'> 	props.max_brightness = MAX_RADEON_LEVEL;</div><div class='ctx'> 	props.type = BACKLIGHT_RAW;</div><div class='ctx'> 	bd = backlight_device_register("radeon_bl", &amp;drm_connector-&gt;kdev,</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h<br/>index f7eb5d8b9fd3..5b10ffd7bb2f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_mode.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_mode.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_mode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_mode.h</a></div><div class='hunk'>@@ -210,6 +210,7 @@ enum radeon_connector_table {</div><div class='ctx'> 	CT_RN50_POWER,</div><div class='ctx'> 	CT_MAC_X800,</div><div class='ctx'> 	CT_MAC_G5_9600,</div><div class='add'>+	CT_SAM440EP</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum radeon_dvo_chip {</div><div class='hunk'>@@ -219,12 +220,20 @@ enum radeon_dvo_chip {</div><div class='ctx'> </div><div class='ctx'> struct radeon_fbdev;</div><div class='ctx'> </div><div class='add'>+struct radeon_afmt {</div><div class='add'>+	bool enabled;</div><div class='add'>+	int offset;</div><div class='add'>+	bool last_buffer_filled_status;</div><div class='add'>+	int id;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct radeon_mode_info {</div><div class='ctx'> 	struct atom_context *atom_context;</div><div class='ctx'> 	struct card_info *atom_card_info;</div><div class='ctx'> 	enum radeon_connector_table connector_table;</div><div class='ctx'> 	bool mode_config_initialized;</div><div class='ctx'> 	struct radeon_crtc *crtcs[6];</div><div class='add'>+	struct radeon_afmt *afmt[6];</div><div class='ctx'> 	/* DVI-I properties */</div><div class='ctx'> 	struct drm_property *coherent_mode_property;</div><div class='ctx'> 	/* DAC enable load detect */</div><div class='hunk'>@@ -363,6 +372,7 @@ struct radeon_encoder_atom_dig {</div><div class='ctx'> 	int dpms_mode;</div><div class='ctx'> 	uint8_t backlight_level;</div><div class='ctx'> 	int panel_mode;</div><div class='add'>+	struct radeon_afmt *afmt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct radeon_encoder_atom_dac {</div><div class='hunk'>@@ -384,10 +394,6 @@ struct radeon_encoder {</div><div class='ctx'> 	struct drm_display_mode native_mode;</div><div class='ctx'> 	void *enc_priv;</div><div class='ctx'> 	int audio_polling_active;</div><div class='del'>-	int hdmi_offset;</div><div class='del'>-	int hdmi_config_offset;</div><div class='del'>-	int hdmi_audio_workaround;</div><div class='del'>-	int hdmi_buffer_status;</div><div class='ctx'> 	bool is_ext_encoder;</div><div class='ctx'> 	u16 caps;</div><div class='ctx'> };</div><div class='hunk'>@@ -476,6 +482,7 @@ extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);</div><div class='ctx'> extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);</div><div class='ctx'> extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector);</div><div class='ctx'> extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);</div><div class='add'>+extern int radeon_get_monitor_bpc(struct drm_connector *connector);</div><div class='ctx'> </div><div class='ctx'> extern void radeon_connector_hotplug(struct drm_connector *connector);</div><div class='ctx'> extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c<br/>index df6a4dbd93f8..830f1a7b486f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_object.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_object.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_object.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_object.c</a></div><div class='hunk'>@@ -104,7 +104,7 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)</div><div class='ctx'> </div><div class='ctx'> int radeon_bo_create(struct radeon_device *rdev,</div><div class='ctx'> 		     unsigned long size, int byte_align, bool kernel, u32 domain,</div><div class='del'>-		     struct radeon_bo **bo_ptr)</div><div class='add'>+		     struct sg_table *sg, struct radeon_bo **bo_ptr)</div><div class='ctx'> {</div><div class='ctx'> 	struct radeon_bo *bo;</div><div class='ctx'> 	enum ttm_bo_type type;</div><div class='hunk'>@@ -120,6 +120,8 @@ int radeon_bo_create(struct radeon_device *rdev,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (kernel) {</div><div class='ctx'> 		type = ttm_bo_type_kernel;</div><div class='add'>+	} else if (sg) {</div><div class='add'>+		type = ttm_bo_type_sg;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		type = ttm_bo_type_device;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -155,7 +157,7 @@ retry:</div><div class='ctx'> 	mutex_lock(&amp;rdev-&gt;vram_mutex);</div><div class='ctx'> 	r = ttm_bo_init(&amp;rdev-&gt;mman.bdev, &amp;bo-&gt;tbo, size, type,</div><div class='ctx'> 			&amp;bo-&gt;placement, page_align, 0, !kernel, NULL,</div><div class='del'>-			acc_size, &amp;radeon_ttm_bo_destroy);</div><div class='add'>+			acc_size, sg, &amp;radeon_ttm_bo_destroy);</div><div class='ctx'> 	mutex_unlock(&amp;rdev-&gt;vram_mutex);</div><div class='ctx'> 	if (unlikely(r != 0)) {</div><div class='ctx'> 		if (r != -ERESTARTSYS) {</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h<br/>index f9104be88d7c..17fb99f177cf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_object.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_object.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_object.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_object.h</a></div><div class='hunk'>@@ -111,9 +111,10 @@ extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,</div><div class='ctx'> 			  bool no_wait);</div><div class='ctx'> </div><div class='ctx'> extern int radeon_bo_create(struct radeon_device *rdev,</div><div class='del'>-				unsigned long size, int byte_align,</div><div class='del'>-				bool kernel, u32 domain,</div><div class='del'>-				struct radeon_bo **bo_ptr);</div><div class='add'>+			    unsigned long size, int byte_align,</div><div class='add'>+			    bool kernel, u32 domain,</div><div class='add'>+			    struct sg_table *sg,</div><div class='add'>+			    struct radeon_bo **bo_ptr);</div><div class='ctx'> extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr);</div><div class='ctx'> extern void radeon_bo_kunmap(struct radeon_bo *bo);</div><div class='ctx'> extern void radeon_bo_unref(struct radeon_bo **bo);</div><div class='hunk'>@@ -146,6 +147,17 @@ extern struct radeon_bo_va *radeon_bo_va(struct radeon_bo *rbo,</div><div class='ctx'> /*</div><div class='ctx'>  * sub allocation</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo)</div><div class='add'>+{</div><div class='add'>+	return sa_bo-&gt;manager-&gt;gpu_addr + sa_bo-&gt;soffset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo)</div><div class='add'>+{</div><div class='add'>+	return sa_bo-&gt;manager-&gt;cpu_ptr + sa_bo-&gt;soffset;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,</div><div class='ctx'> 				     struct radeon_sa_manager *sa_manager,</div><div class='ctx'> 				     unsigned size, u32 domain);</div><div class='hunk'>@@ -157,9 +169,15 @@ extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,</div><div class='ctx'> 					struct radeon_sa_manager *sa_manager);</div><div class='ctx'> extern int radeon_sa_bo_new(struct radeon_device *rdev,</div><div class='ctx'> 			    struct radeon_sa_manager *sa_manager,</div><div class='del'>-			    struct radeon_sa_bo *sa_bo,</div><div class='del'>-			    unsigned size, unsigned align);</div><div class='add'>+			    struct radeon_sa_bo **sa_bo,</div><div class='add'>+			    unsigned size, unsigned align, bool block);</div><div class='ctx'> extern void radeon_sa_bo_free(struct radeon_device *rdev,</div><div class='del'>-			      struct radeon_sa_bo *sa_bo);</div><div class='add'>+			      struct radeon_sa_bo **sa_bo,</div><div class='add'>+			      struct radeon_fence *fence);</div><div class='add'>+#if defined(CONFIG_DEBUG_FS)</div><div class='add'>+extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,</div><div class='add'>+					 struct seq_file *m);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c<br/>index caa55d68f319..08825548ee69 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_pm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_pm.c</a></div><div class='hunk'>@@ -252,10 +252,7 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;rdev-&gt;ddev-&gt;struct_mutex);</div><div class='ctx'> 	mutex_lock(&amp;rdev-&gt;vram_mutex);</div><div class='del'>-	for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='del'>-		if (rdev-&gt;ring[i].ring_obj)</div><div class='del'>-			mutex_lock(&amp;rdev-&gt;ring[i].mutex);</div><div class='del'>-	}</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* gui idle int has issues on older chips it seems */</div><div class='ctx'> 	if (rdev-&gt;family &gt;= CHIP_R600) {</div><div class='hunk'>@@ -273,13 +270,7 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		struct radeon_ring *ring = &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX];</div><div class='ctx'> 		if (ring-&gt;ready) {</div><div class='del'>-			struct radeon_fence *fence;</div><div class='del'>-			radeon_ring_alloc(rdev, ring, 64);</div><div class='del'>-			radeon_fence_create(rdev, &amp;fence, radeon_ring_index(rdev, ring));</div><div class='del'>-			radeon_fence_emit(rdev, fence);</div><div class='del'>-			radeon_ring_commit(rdev, ring);</div><div class='del'>-			radeon_fence_wait(fence, false);</div><div class='del'>-			radeon_fence_unref(&amp;fence);</div><div class='add'>+			radeon_fence_wait_empty_locked(rdev, RADEON_RING_TYPE_GFX_INDEX);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	radeon_unmap_vram_bos(rdev);</div><div class='hunk'>@@ -311,10 +302,7 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev)</div><div class='ctx'> </div><div class='ctx'> 	rdev-&gt;pm.dynpm_planned_action = DYNPM_ACTION_NONE;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='del'>-		if (rdev-&gt;ring[i].ring_obj)</div><div class='del'>-			mutex_unlock(&amp;rdev-&gt;ring[i].mutex);</div><div class='del'>-	}</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> 	mutex_unlock(&amp;rdev-&gt;vram_mutex);</div><div class='ctx'> 	mutex_unlock(&amp;rdev-&gt;ddev-&gt;struct_mutex);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_prime.c b/drivers/gpu/drm/radeon/radeon_prime.c<br/>new file mode 100644<br/>index 000000000000..8ddab4c76710<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_prime.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_prime.c</a></div><div class='hunk'>@@ -0,0 +1,220 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * based on nouveau_prime.c</div><div class='add'>+ *</div><div class='add'>+ * Authors: Alex Deucher</div><div class='add'>+ */</div><div class='add'>+#include "drmP.h"</div><div class='add'>+#include "drm.h"</div><div class='add'>+</div><div class='add'>+#include "radeon.h"</div><div class='add'>+#include "radeon_drm.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dma-buf.h&gt;</div><div class='add'>+</div><div class='add'>+static struct sg_table *radeon_gem_map_dma_buf(struct dma_buf_attachment *attachment,</div><div class='add'>+					       enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	struct radeon_bo *bo = attachment-&gt;dmabuf-&gt;priv;</div><div class='add'>+	struct drm_device *dev = bo-&gt;rdev-&gt;ddev;</div><div class='add'>+	int npages = bo-&gt;tbo.num_pages;</div><div class='add'>+	struct sg_table *sg;</div><div class='add'>+	int nents;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	sg = drm_prime_pages_to_sg(bo-&gt;tbo.ttm-&gt;pages, npages);</div><div class='add'>+	nents = dma_map_sg(attachment-&gt;dev, sg-&gt;sgl, sg-&gt;nents, dir);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	return sg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void radeon_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,</div><div class='add'>+				     struct sg_table *sg, enum dma_data_direction dir)</div><div class='add'>+{</div><div class='add'>+	dma_unmap_sg(attachment-&gt;dev, sg-&gt;sgl, sg-&gt;nents, dir);</div><div class='add'>+	sg_free_table(sg);</div><div class='add'>+	kfree(sg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void radeon_gem_dmabuf_release(struct dma_buf *dma_buf)</div><div class='add'>+{</div><div class='add'>+	struct radeon_bo *bo = dma_buf-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (bo-&gt;gem_base.export_dma_buf == dma_buf) {</div><div class='add'>+		DRM_ERROR("unreference dmabuf %p\n", &amp;bo-&gt;gem_base);</div><div class='add'>+		bo-&gt;gem_base.export_dma_buf = NULL;</div><div class='add'>+		drm_gem_object_unreference_unlocked(&amp;bo-&gt;gem_base);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *radeon_gem_kmap_atomic(struct dma_buf *dma_buf, unsigned long page_num)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void radeon_gem_kunmap_atomic(struct dma_buf *dma_buf, unsigned long page_num, void *addr)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+static void *radeon_gem_kmap(struct dma_buf *dma_buf, unsigned long page_num)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void radeon_gem_kunmap(struct dma_buf *dma_buf, unsigned long page_num, void *addr)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int radeon_gem_prime_mmap(struct dma_buf *dma_buf, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *radeon_gem_prime_vmap(struct dma_buf *dma_buf)</div><div class='add'>+{</div><div class='add'>+	struct radeon_bo *bo = dma_buf-&gt;priv;</div><div class='add'>+	struct drm_device *dev = bo-&gt;rdev-&gt;ddev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	if (bo-&gt;vmapping_count) {</div><div class='add'>+		bo-&gt;vmapping_count++;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_kmap(&amp;bo-&gt;tbo, 0, bo-&gt;tbo.num_pages,</div><div class='add'>+			  &amp;bo-&gt;dma_buf_vmap);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+	}</div><div class='add'>+	bo-&gt;vmapping_count = 1;</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	return bo-&gt;dma_buf_vmap.virtual;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void radeon_gem_prime_vunmap(struct dma_buf *dma_buf, void *vaddr)</div><div class='add'>+{</div><div class='add'>+	struct radeon_bo *bo = dma_buf-&gt;priv;</div><div class='add'>+	struct drm_device *dev = bo-&gt;rdev-&gt;ddev;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+	bo-&gt;vmapping_count--;</div><div class='add'>+	if (bo-&gt;vmapping_count == 0) {</div><div class='add'>+		ttm_bo_kunmap(&amp;bo-&gt;dma_buf_vmap);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='add'>+}</div><div class='add'>+const static struct dma_buf_ops radeon_dmabuf_ops =  {</div><div class='add'>+	.map_dma_buf = radeon_gem_map_dma_buf,</div><div class='add'>+	.unmap_dma_buf = radeon_gem_unmap_dma_buf,</div><div class='add'>+	.release = radeon_gem_dmabuf_release,</div><div class='add'>+	.kmap = radeon_gem_kmap,</div><div class='add'>+	.kmap_atomic = radeon_gem_kmap_atomic,</div><div class='add'>+	.kunmap = radeon_gem_kunmap,</div><div class='add'>+	.kunmap_atomic = radeon_gem_kunmap_atomic,</div><div class='add'>+	.mmap = radeon_gem_prime_mmap,</div><div class='add'>+	.vmap = radeon_gem_prime_vmap,</div><div class='add'>+	.vunmap = radeon_gem_prime_vunmap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int radeon_prime_create(struct drm_device *dev,</div><div class='add'>+			       size_t size,</div><div class='add'>+			       struct sg_table *sg,</div><div class='add'>+			       struct radeon_bo **pbo)</div><div class='add'>+{</div><div class='add'>+	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='add'>+	struct radeon_bo *bo;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = radeon_bo_create(rdev, size, PAGE_SIZE, false,</div><div class='add'>+			       RADEON_GEM_DOMAIN_GTT, sg, pbo);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	bo = *pbo;</div><div class='add'>+	bo-&gt;gem_base.driver_private = bo;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;gem.mutex);</div><div class='add'>+	list_add_tail(&amp;bo-&gt;list, &amp;rdev-&gt;gem.objects);</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;gem.mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,</div><div class='add'>+					struct drm_gem_object *obj,</div><div class='add'>+					int flags)</div><div class='add'>+{</div><div class='add'>+	struct radeon_bo *bo = gem_to_radeon_bo(obj);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* pin buffer into GTT */</div><div class='add'>+	ret = radeon_bo_pin(bo, RADEON_GEM_DOMAIN_GTT, NULL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+</div><div class='add'>+	return dma_buf_export(bo, &amp;radeon_dmabuf_ops, obj-&gt;size, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,</div><div class='add'>+					       struct dma_buf *dma_buf)</div><div class='add'>+{</div><div class='add'>+	struct dma_buf_attachment *attach;</div><div class='add'>+	struct sg_table *sg;</div><div class='add'>+	struct radeon_bo *bo;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (dma_buf-&gt;ops == &amp;radeon_dmabuf_ops) {</div><div class='add'>+		bo = dma_buf-&gt;priv;</div><div class='add'>+		if (bo-&gt;gem_base.dev == dev) {</div><div class='add'>+			drm_gem_object_reference(&amp;bo-&gt;gem_base);</div><div class='add'>+			return &amp;bo-&gt;gem_base;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* need to attach */</div><div class='add'>+	attach = dma_buf_attach(dma_buf, dev-&gt;dev);</div><div class='add'>+	if (IS_ERR(attach))</div><div class='add'>+		return ERR_CAST(attach);</div><div class='add'>+</div><div class='add'>+	sg = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);</div><div class='add'>+	if (IS_ERR(sg)) {</div><div class='add'>+		ret = PTR_ERR(sg);</div><div class='add'>+		goto fail_detach;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = radeon_prime_create(dev, dma_buf-&gt;size, sg, &amp;bo);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto fail_unmap;</div><div class='add'>+</div><div class='add'>+	bo-&gt;gem_base.import_attach = attach;</div><div class='add'>+</div><div class='add'>+	return &amp;bo-&gt;gem_base;</div><div class='add'>+</div><div class='add'>+fail_unmap:</div><div class='add'>+	dma_buf_unmap_attachment(attach, sg, DMA_BIDIRECTIONAL);</div><div class='add'>+fail_detach:</div><div class='add'>+	dma_buf_detach(dma_buf, attach);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c<br/>index cc33b3d7c33b..983658c91358 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_ring.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_ring.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_ring.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_ring.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'>  * Authors: Dave Airlie</div><div class='ctx'>  *          Alex Deucher</div><div class='ctx'>  *          Jerome Glisse</div><div class='add'>+ *          Christian König</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -33,151 +34,42 @@</div><div class='ctx'> #include "radeon.h"</div><div class='ctx'> #include "atom.h"</div><div class='ctx'> </div><div class='del'>-int radeon_debugfs_ib_init(struct radeon_device *rdev);</div><div class='del'>-int radeon_debugfs_ring_init(struct radeon_device *rdev);</div><div class='del'>-</div><div class='del'>-u32 radeon_get_ib_value(struct radeon_cs_parser *p, int idx)</div><div class='del'>-{</div><div class='del'>-	struct radeon_cs_chunk *ibc = &amp;p-&gt;chunks[p-&gt;chunk_ib_idx];</div><div class='del'>-	u32 pg_idx, pg_offset;</div><div class='del'>-	u32 idx_value = 0;</div><div class='del'>-	int new_page;</div><div class='del'>-</div><div class='del'>-	pg_idx = (idx * 4) / PAGE_SIZE;</div><div class='del'>-	pg_offset = (idx * 4) % PAGE_SIZE;</div><div class='del'>-</div><div class='del'>-	if (ibc-&gt;kpage_idx[0] == pg_idx)</div><div class='del'>-		return ibc-&gt;kpage[0][pg_offset/4];</div><div class='del'>-	if (ibc-&gt;kpage_idx[1] == pg_idx)</div><div class='del'>-		return ibc-&gt;kpage[1][pg_offset/4];</div><div class='del'>-</div><div class='del'>-	new_page = radeon_cs_update_pages(p, pg_idx);</div><div class='del'>-	if (new_page &lt; 0) {</div><div class='del'>-		p-&gt;parser_error = new_page;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	idx_value = ibc-&gt;kpage[new_page][pg_offset/4];</div><div class='del'>-	return idx_value;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void radeon_ring_write(struct radeon_ring *ring, uint32_t v)</div><div class='del'>-{</div><div class='del'>-#if DRM_DEBUG_CODE</div><div class='del'>-	if (ring-&gt;count_dw &lt;= 0) {</div><div class='del'>-		DRM_ERROR("radeon: writting more dword to ring than expected !\n");</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	ring-&gt;ring[ring-&gt;wptr++] = v;</div><div class='del'>-	ring-&gt;wptr &amp;= ring-&gt;ptr_mask;</div><div class='del'>-	ring-&gt;count_dw--;</div><div class='del'>-	ring-&gt;ring_free_dw--;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * IB.</div><div class='ctx'>  */</div><div class='del'>-bool radeon_ib_try_free(struct radeon_device *rdev, struct radeon_ib *ib)</div><div class='del'>-{</div><div class='del'>-	bool done = false;</div><div class='del'>-</div><div class='del'>-	/* only free ib which have been emited */</div><div class='del'>-	if (ib-&gt;fence &amp;&amp; ib-&gt;fence-&gt;emitted) {</div><div class='del'>-		if (radeon_fence_signaled(ib-&gt;fence)) {</div><div class='del'>-			radeon_fence_unref(&amp;ib-&gt;fence);</div><div class='del'>-			radeon_sa_bo_free(rdev, &amp;ib-&gt;sa_bo);</div><div class='del'>-			done = true;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return done;</div><div class='del'>-}</div><div class='add'>+int radeon_debugfs_sa_init(struct radeon_device *rdev);</div><div class='ctx'> </div><div class='ctx'> int radeon_ib_get(struct radeon_device *rdev, int ring,</div><div class='del'>-		  struct radeon_ib **ib, unsigned size)</div><div class='add'>+		  struct radeon_ib *ib, unsigned size)</div><div class='ctx'> {</div><div class='del'>-	struct radeon_fence *fence;</div><div class='del'>-	unsigned cretry = 0;</div><div class='del'>-	int r = 0, i, idx;</div><div class='del'>-</div><div class='del'>-	*ib = NULL;</div><div class='del'>-	/* align size on 256 bytes */</div><div class='del'>-	size = ALIGN(size, 256);</div><div class='add'>+	int r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_fence_create(rdev, &amp;fence, ring);</div><div class='add'>+	r = radeon_sa_bo_new(rdev, &amp;rdev-&gt;ring_tmp_bo, &amp;ib-&gt;sa_bo, size, 256, true);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed to create fence for new IB\n");</div><div class='add'>+		dev_err(rdev-&gt;dev, "failed to get a new IB (%d)\n", r);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	radeon_mutex_lock(&amp;rdev-&gt;ib_pool.mutex);</div><div class='del'>-	idx = rdev-&gt;ib_pool.head_id;</div><div class='del'>-retry:</div><div class='del'>-	if (cretry &gt; 5) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed to get an ib after 5 retry\n");</div><div class='del'>-		radeon_mutex_unlock(&amp;rdev-&gt;ib_pool.mutex);</div><div class='del'>-		radeon_fence_unref(&amp;fence);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	cretry++;</div><div class='del'>-	for (i = 0; i &lt; RADEON_IB_POOL_SIZE; i++) {</div><div class='del'>-		radeon_ib_try_free(rdev, &amp;rdev-&gt;ib_pool.ibs[idx]);</div><div class='del'>-		if (rdev-&gt;ib_pool.ibs[idx].fence == NULL) {</div><div class='del'>-			r = radeon_sa_bo_new(rdev, &amp;rdev-&gt;ib_pool.sa_manager,</div><div class='del'>-					     &amp;rdev-&gt;ib_pool.ibs[idx].sa_bo,</div><div class='del'>-					     size, 256);</div><div class='del'>-			if (!r) {</div><div class='del'>-				*ib = &amp;rdev-&gt;ib_pool.ibs[idx];</div><div class='del'>-				(*ib)-&gt;ptr = rdev-&gt;ib_pool.sa_manager.cpu_ptr;</div><div class='del'>-				(*ib)-&gt;ptr += ((*ib)-&gt;sa_bo.offset &gt;&gt; 2);</div><div class='del'>-				(*ib)-&gt;gpu_addr = rdev-&gt;ib_pool.sa_manager.gpu_addr;</div><div class='del'>-				(*ib)-&gt;gpu_addr += (*ib)-&gt;sa_bo.offset;</div><div class='del'>-				(*ib)-&gt;fence = fence;</div><div class='del'>-				(*ib)-&gt;vm_id = 0;</div><div class='del'>-				(*ib)-&gt;is_const_ib = false;</div><div class='del'>-				/* ib are most likely to be allocated in a ring fashion</div><div class='del'>-				 * thus rdev-&gt;ib_pool.head_id should be the id of the</div><div class='del'>-				 * oldest ib</div><div class='del'>-				 */</div><div class='del'>-				rdev-&gt;ib_pool.head_id = (1 + idx);</div><div class='del'>-				rdev-&gt;ib_pool.head_id &amp;= (RADEON_IB_POOL_SIZE - 1);</div><div class='del'>-				radeon_mutex_unlock(&amp;rdev-&gt;ib_pool.mutex);</div><div class='del'>-				return 0;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		idx = (idx + 1) &amp; (RADEON_IB_POOL_SIZE - 1);</div><div class='del'>-	}</div><div class='del'>-	/* this should be rare event, ie all ib scheduled none signaled yet.</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; RADEON_IB_POOL_SIZE; i++) {</div><div class='del'>-		if (rdev-&gt;ib_pool.ibs[idx].fence &amp;&amp; rdev-&gt;ib_pool.ibs[idx].fence-&gt;emitted) {</div><div class='del'>-			r = radeon_fence_wait(rdev-&gt;ib_pool.ibs[idx].fence, false);</div><div class='del'>-			if (!r) {</div><div class='del'>-				goto retry;</div><div class='del'>-			}</div><div class='del'>-			/* an error happened */</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		idx = (idx + 1) &amp; (RADEON_IB_POOL_SIZE - 1);</div><div class='add'>+	r = radeon_fence_create(rdev, &amp;ib-&gt;fence, ring);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(rdev-&gt;dev, "failed to create fence for new IB (%d)\n", r);</div><div class='add'>+		radeon_sa_bo_free(rdev, &amp;ib-&gt;sa_bo, NULL);</div><div class='add'>+		return r;</div><div class='ctx'> 	}</div><div class='del'>-	radeon_mutex_unlock(&amp;rdev-&gt;ib_pool.mutex);</div><div class='del'>-	radeon_fence_unref(&amp;fence);</div><div class='del'>-	return r;</div><div class='add'>+</div><div class='add'>+	ib-&gt;ptr = radeon_sa_bo_cpu_addr(ib-&gt;sa_bo);</div><div class='add'>+	ib-&gt;gpu_addr = radeon_sa_bo_gpu_addr(ib-&gt;sa_bo);</div><div class='add'>+	ib-&gt;vm_id = 0;</div><div class='add'>+	ib-&gt;is_const_ib = false;</div><div class='add'>+	ib-&gt;semaphore = NULL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)</div><div class='add'>+void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib)</div><div class='ctx'> {</div><div class='del'>-	struct radeon_ib *tmp = *ib;</div><div class='del'>-</div><div class='del'>-	*ib = NULL;</div><div class='del'>-	if (tmp == NULL) {</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	radeon_mutex_lock(&amp;rdev-&gt;ib_pool.mutex);</div><div class='del'>-	if (tmp-&gt;fence &amp;&amp; !tmp-&gt;fence-&gt;emitted) {</div><div class='del'>-		radeon_sa_bo_free(rdev, &amp;tmp-&gt;sa_bo);</div><div class='del'>-		radeon_fence_unref(&amp;tmp-&gt;fence);</div><div class='del'>-	}</div><div class='del'>-	radeon_mutex_unlock(&amp;rdev-&gt;ib_pool.mutex);</div><div class='add'>+	radeon_semaphore_free(rdev, ib-&gt;semaphore, ib-&gt;fence);</div><div class='add'>+	radeon_sa_bo_free(rdev, &amp;ib-&gt;sa_bo, ib-&gt;fence);</div><div class='add'>+	radeon_fence_unref(&amp;ib-&gt;fence);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)</div><div class='hunk'>@@ -187,14 +79,14 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)</div><div class='ctx'> </div><div class='ctx'> 	if (!ib-&gt;length_dw || !ring-&gt;ready) {</div><div class='ctx'> 		/* TODO: Nothings in the ib we should report. */</div><div class='del'>-		DRM_ERROR("radeon: couldn't schedule IB(%u).\n", ib-&gt;idx);</div><div class='add'>+		dev_err(rdev-&gt;dev, "couldn't schedule ib\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* 64 dwords should be enough for fence too */</div><div class='ctx'> 	r = radeon_ring_lock(rdev, ring, 64);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		DRM_ERROR("radeon: scheduling IB failed (%d).\n", r);</div><div class='add'>+		dev_err(rdev-&gt;dev, "scheduling IB failed (%d).\n", r);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> 	radeon_ring_ib_execute(rdev, ib-&gt;fence-&gt;ring, ib);</div><div class='hunk'>@@ -205,74 +97,90 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)</div><div class='ctx'> </div><div class='ctx'> int radeon_ib_pool_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='del'>-	struct radeon_sa_manager tmp;</div><div class='del'>-	int i, r;</div><div class='add'>+	int r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_sa_bo_manager_init(rdev, &amp;tmp,</div><div class='add'>+	if (rdev-&gt;ib_pool_ready) {</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	r = radeon_sa_bo_manager_init(rdev, &amp;rdev-&gt;ring_tmp_bo,</div><div class='ctx'> 				      RADEON_IB_POOL_SIZE*64*1024,</div><div class='ctx'> 				      RADEON_GEM_DOMAIN_GTT);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	radeon_mutex_lock(&amp;rdev-&gt;ib_pool.mutex);</div><div class='del'>-	if (rdev-&gt;ib_pool.ready) {</div><div class='del'>-		radeon_mutex_unlock(&amp;rdev-&gt;ib_pool.mutex);</div><div class='del'>-		radeon_sa_bo_manager_fini(rdev, &amp;tmp);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rdev-&gt;ib_pool.sa_manager = tmp;</div><div class='del'>-	INIT_LIST_HEAD(&amp;rdev-&gt;ib_pool.sa_manager.sa_bo);</div><div class='del'>-	for (i = 0; i &lt; RADEON_IB_POOL_SIZE; i++) {</div><div class='del'>-		rdev-&gt;ib_pool.ibs[i].fence = NULL;</div><div class='del'>-		rdev-&gt;ib_pool.ibs[i].idx = i;</div><div class='del'>-		rdev-&gt;ib_pool.ibs[i].length_dw = 0;</div><div class='del'>-		INIT_LIST_HEAD(&amp;rdev-&gt;ib_pool.ibs[i].sa_bo.list);</div><div class='del'>-	}</div><div class='del'>-	rdev-&gt;ib_pool.head_id = 0;</div><div class='del'>-	rdev-&gt;ib_pool.ready = true;</div><div class='del'>-	DRM_INFO("radeon: ib pool ready.\n");</div><div class='del'>-</div><div class='del'>-	if (radeon_debugfs_ib_init(rdev)) {</div><div class='del'>-		DRM_ERROR("Failed to register debugfs file for IB !\n");</div><div class='del'>-	}</div><div class='del'>-	if (radeon_debugfs_ring_init(rdev)) {</div><div class='del'>-		DRM_ERROR("Failed to register debugfs file for rings !\n");</div><div class='add'>+	rdev-&gt;ib_pool_ready = true;</div><div class='add'>+	if (radeon_debugfs_sa_init(rdev)) {</div><div class='add'>+		dev_err(rdev-&gt;dev, "failed to register debugfs file for SA\n");</div><div class='ctx'> 	}</div><div class='del'>-	radeon_mutex_unlock(&amp;rdev-&gt;ib_pool.mutex);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void radeon_ib_pool_fini(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='del'>-	unsigned i;</div><div class='del'>-</div><div class='del'>-	radeon_mutex_lock(&amp;rdev-&gt;ib_pool.mutex);</div><div class='del'>-	if (rdev-&gt;ib_pool.ready) {</div><div class='del'>-		for (i = 0; i &lt; RADEON_IB_POOL_SIZE; i++) {</div><div class='del'>-			radeon_sa_bo_free(rdev, &amp;rdev-&gt;ib_pool.ibs[i].sa_bo);</div><div class='del'>-			radeon_fence_unref(&amp;rdev-&gt;ib_pool.ibs[i].fence);</div><div class='del'>-		}</div><div class='del'>-		radeon_sa_bo_manager_fini(rdev, &amp;rdev-&gt;ib_pool.sa_manager);</div><div class='del'>-		rdev-&gt;ib_pool.ready = false;</div><div class='add'>+	if (rdev-&gt;ib_pool_ready) {</div><div class='add'>+		radeon_sa_bo_manager_fini(rdev, &amp;rdev-&gt;ring_tmp_bo);</div><div class='add'>+		rdev-&gt;ib_pool_ready = false;</div><div class='ctx'> 	}</div><div class='del'>-	radeon_mutex_unlock(&amp;rdev-&gt;ib_pool.mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int radeon_ib_pool_start(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='del'>-	return radeon_sa_bo_manager_start(rdev, &amp;rdev-&gt;ib_pool.sa_manager);</div><div class='add'>+	return radeon_sa_bo_manager_start(rdev, &amp;rdev-&gt;ring_tmp_bo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int radeon_ib_pool_suspend(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='del'>-	return radeon_sa_bo_manager_suspend(rdev, &amp;rdev-&gt;ib_pool.sa_manager);</div><div class='add'>+	return radeon_sa_bo_manager_suspend(rdev, &amp;rdev-&gt;ring_tmp_bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int radeon_ib_ring_tests(struct radeon_device *rdev)</div><div class='add'>+{</div><div class='add'>+	unsigned i;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+		struct radeon_ring *ring = &amp;rdev-&gt;ring[i];</div><div class='add'>+</div><div class='add'>+		if (!ring-&gt;ready)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		r = radeon_ib_test(rdev, i, ring);</div><div class='add'>+		if (r) {</div><div class='add'>+			ring-&gt;ready = false;</div><div class='add'>+</div><div class='add'>+			if (i == RADEON_RING_TYPE_GFX_INDEX) {</div><div class='add'>+				/* oh, oh, that's really bad */</div><div class='add'>+				DRM_ERROR("radeon: failed testing IB on GFX ring (%d).\n", r);</div><div class='add'>+		                rdev-&gt;accel_working = false;</div><div class='add'>+				return r;</div><div class='add'>+</div><div class='add'>+			} else {</div><div class='add'>+				/* still not good, but we can live with it */</div><div class='add'>+				DRM_ERROR("radeon: failed testing IB on ring %d (%d).\n", i, r);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Ring.</div><div class='ctx'>  */</div><div class='add'>+int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);</div><div class='add'>+</div><div class='add'>+void radeon_ring_write(struct radeon_ring *ring, uint32_t v)</div><div class='add'>+{</div><div class='add'>+#if DRM_DEBUG_CODE</div><div class='add'>+	if (ring-&gt;count_dw &lt;= 0) {</div><div class='add'>+		DRM_ERROR("radeon: writting more dword to ring than expected !\n");</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	ring-&gt;ring[ring-&gt;wptr++] = v;</div><div class='add'>+	ring-&gt;wptr &amp;= ring-&gt;ptr_mask;</div><div class='add'>+	ring-&gt;count_dw--;</div><div class='add'>+	ring-&gt;ring_free_dw--;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int radeon_ring_index(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	/* r1xx-r5xx only has CP ring */</div><div class='hunk'>@@ -319,7 +227,7 @@ int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *ring, unsi</div><div class='ctx'> 		if (ndw &lt; ring-&gt;ring_free_dw) {</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		r = radeon_fence_wait_next(rdev, radeon_ring_index(rdev, ring));</div><div class='add'>+		r = radeon_fence_wait_next_locked(rdev, radeon_ring_index(rdev, ring));</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			return r;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -332,10 +240,10 @@ int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsig</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;ring-&gt;mutex);</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> 	r = radeon_ring_alloc(rdev, ring, ndw);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		mutex_unlock(&amp;ring-&gt;mutex);</div><div class='add'>+		mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -360,13 +268,85 @@ void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	radeon_ring_commit(rdev, ring);</div><div class='del'>-	mutex_unlock(&amp;ring-&gt;mutex);</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='add'>+void radeon_ring_undo(struct radeon_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	ring-&gt;wptr = ring-&gt;wptr_old;</div><div class='del'>-	mutex_unlock(&amp;ring-&gt;mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='add'>+{</div><div class='add'>+	radeon_ring_undo(ring);</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void radeon_ring_force_activity(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	radeon_ring_free_size(rdev, ring);</div><div class='add'>+	if (ring-&gt;rptr == ring-&gt;wptr) {</div><div class='add'>+		r = radeon_ring_alloc(rdev, ring, 1);</div><div class='add'>+		if (!r) {</div><div class='add'>+			radeon_ring_write(ring, ring-&gt;nop);</div><div class='add'>+			radeon_ring_commit(rdev, ring);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void radeon_ring_lockup_update(struct radeon_ring *ring)</div><div class='add'>+{</div><div class='add'>+	ring-&gt;last_rptr = ring-&gt;rptr;</div><div class='add'>+	ring-&gt;last_activity = jiffies;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * radeon_ring_test_lockup() - check if ring is lockedup by recording information</div><div class='add'>+ * @rdev:       radeon device structure</div><div class='add'>+ * @ring:       radeon_ring structure holding ring information</div><div class='add'>+ *</div><div class='add'>+ * We don't need to initialize the lockup tracking information as we will either</div><div class='add'>+ * have CP rptr to a different value of jiffies wrap around which will force</div><div class='add'>+ * initialization of the lockup tracking informations.</div><div class='add'>+ *</div><div class='add'>+ * A possible false positivie is if we get call after while and last_cp_rptr ==</div><div class='add'>+ * the current CP rptr, even if it's unlikely it might happen. To avoid this</div><div class='add'>+ * if the elapsed time since last call is bigger than 2 second than we return</div><div class='add'>+ * false and update the tracking information. Due to this the caller must call</div><div class='add'>+ * radeon_ring_test_lockup several time in less than 2sec for lockup to be reported</div><div class='add'>+ * the fencing code should be cautious about that.</div><div class='add'>+ *</div><div class='add'>+ * Caller should write to the ring to force CP to do something so we don't get</div><div class='add'>+ * false positive when CP is just gived nothing to do.</div><div class='add'>+ *</div><div class='add'>+ **/</div><div class='add'>+bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='add'>+{</div><div class='add'>+	unsigned long cjiffies, elapsed;</div><div class='add'>+	uint32_t rptr;</div><div class='add'>+</div><div class='add'>+	cjiffies = jiffies;</div><div class='add'>+	if (!time_after(cjiffies, ring-&gt;last_activity)) {</div><div class='add'>+		/* likely a wrap around */</div><div class='add'>+		radeon_ring_lockup_update(ring);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+	rptr = RREG32(ring-&gt;rptr_reg);</div><div class='add'>+	ring-&gt;rptr = (rptr &amp; ring-&gt;ptr_reg_mask) &gt;&gt; ring-&gt;ptr_reg_shift;</div><div class='add'>+	if (ring-&gt;rptr != ring-&gt;last_rptr) {</div><div class='add'>+		/* CP is still working no lockup */</div><div class='add'>+		radeon_ring_lockup_update(ring);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+	elapsed = jiffies_to_msecs(cjiffies - ring-&gt;last_activity);</div><div class='add'>+	if (radeon_lockup_timeout &amp;&amp; elapsed &gt;= radeon_lockup_timeout) {</div><div class='add'>+		dev_err(rdev-&gt;dev, "GPU lockup CP stall for more than %lumsec\n", elapsed);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+	/* give a chance to the GPU ... */</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size,</div><div class='hunk'>@@ -385,8 +365,8 @@ int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsig</div><div class='ctx'> 	/* Allocate ring buffer */</div><div class='ctx'> 	if (ring-&gt;ring_obj == NULL) {</div><div class='ctx'> 		r = radeon_bo_create(rdev, ring-&gt;ring_size, PAGE_SIZE, true,</div><div class='del'>-					RADEON_GEM_DOMAIN_GTT,</div><div class='del'>-					&amp;ring-&gt;ring_obj);</div><div class='add'>+				     RADEON_GEM_DOMAIN_GTT,</div><div class='add'>+				     NULL, &amp;ring-&gt;ring_obj);</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			dev_err(rdev-&gt;dev, "(%d) ring create failed\n", r);</div><div class='ctx'> 			return r;</div><div class='hunk'>@@ -411,6 +391,9 @@ int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsig</div><div class='ctx'> 	}</div><div class='ctx'> 	ring-&gt;ptr_mask = (ring-&gt;ring_size / 4) - 1;</div><div class='ctx'> 	ring-&gt;ring_free_dw = ring-&gt;ring_size / 4;</div><div class='add'>+	if (radeon_debugfs_ring_init(rdev, ring)) {</div><div class='add'>+		DRM_ERROR("Failed to register debugfs file for rings !\n");</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -419,11 +402,12 @@ void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> 	int r;</div><div class='ctx'> 	struct radeon_bo *ring_obj;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;ring-&gt;mutex);</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> 	ring_obj = ring-&gt;ring_obj;</div><div class='add'>+	ring-&gt;ready = false;</div><div class='ctx'> 	ring-&gt;ring = NULL;</div><div class='ctx'> 	ring-&gt;ring_obj = NULL;</div><div class='del'>-	mutex_unlock(&amp;ring-&gt;mutex);</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (ring_obj) {</div><div class='ctx'> 		r = radeon_bo_reserve(ring_obj, false);</div><div class='hunk'>@@ -476,59 +460,48 @@ static struct drm_info_list radeon_debugfs_ring_info_list[] = {</div><div class='ctx'> 	{"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &amp;cayman_ring_type_cp2_index},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int radeon_debugfs_ib_info(struct seq_file *m, void *data)</div><div class='add'>+static int radeon_debugfs_sa_info(struct seq_file *m, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_info_node *node = (struct drm_info_node *) m-&gt;private;</div><div class='ctx'> 	struct drm_device *dev = node-&gt;minor-&gt;dev;</div><div class='ctx'> 	struct radeon_device *rdev = dev-&gt;dev_private;</div><div class='del'>-	struct radeon_ib *ib = &amp;rdev-&gt;ib_pool.ibs[*((unsigned*)node-&gt;info_ent-&gt;data)];</div><div class='del'>-	unsigned i;</div><div class='ctx'> </div><div class='del'>-	if (ib == NULL) {</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	seq_printf(m, "IB %04u\n", ib-&gt;idx);</div><div class='del'>-	seq_printf(m, "IB fence %p\n", ib-&gt;fence);</div><div class='del'>-	seq_printf(m, "IB size %05u dwords\n", ib-&gt;length_dw);</div><div class='del'>-	for (i = 0; i &lt; ib-&gt;length_dw; i++) {</div><div class='del'>-		seq_printf(m, "[%05u]=0x%08X\n", i, ib-&gt;ptr[i]);</div><div class='del'>-	}</div><div class='add'>+	radeon_sa_bo_dump_debug_info(&amp;rdev-&gt;ring_tmp_bo, m);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct drm_info_list radeon_debugfs_ib_list[RADEON_IB_POOL_SIZE];</div><div class='del'>-static char radeon_debugfs_ib_names[RADEON_IB_POOL_SIZE][32];</div><div class='del'>-static unsigned radeon_debugfs_ib_idx[RADEON_IB_POOL_SIZE];</div><div class='add'>+static struct drm_info_list radeon_debugfs_sa_list[] = {</div><div class='add'>+        {"radeon_sa_info", &amp;radeon_debugfs_sa_info, 0, NULL},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-int radeon_debugfs_ring_init(struct radeon_device *rdev)</div><div class='add'>+int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> #if defined(CONFIG_DEBUG_FS)</div><div class='del'>-	if (rdev-&gt;family &gt;= CHIP_CAYMAN)</div><div class='del'>-		return radeon_debugfs_add_files(rdev, radeon_debugfs_ring_info_list,</div><div class='del'>-						ARRAY_SIZE(radeon_debugfs_ring_info_list));</div><div class='del'>-	else</div><div class='del'>-		return radeon_debugfs_add_files(rdev, radeon_debugfs_ring_info_list, 1);</div><div class='del'>-#else</div><div class='del'>-	return 0;</div><div class='add'>+	unsigned i;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(radeon_debugfs_ring_info_list); ++i) {</div><div class='add'>+		struct drm_info_list *info = &amp;radeon_debugfs_ring_info_list[i];</div><div class='add'>+		int ridx = *(int*)radeon_debugfs_ring_info_list[i].data;</div><div class='add'>+		unsigned r;</div><div class='add'>+</div><div class='add'>+		if (&amp;rdev-&gt;ring[ridx] != ring)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		r = radeon_debugfs_add_files(rdev, info, 1);</div><div class='add'>+		if (r)</div><div class='add'>+			return r;</div><div class='add'>+	}</div><div class='ctx'> #endif</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int radeon_debugfs_ib_init(struct radeon_device *rdev)</div><div class='add'>+int radeon_debugfs_sa_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='ctx'> #if defined(CONFIG_DEBUG_FS)</div><div class='del'>-	unsigned i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; RADEON_IB_POOL_SIZE; i++) {</div><div class='del'>-		sprintf(radeon_debugfs_ib_names[i], "radeon_ib_%04u", i);</div><div class='del'>-		radeon_debugfs_ib_idx[i] = i;</div><div class='del'>-		radeon_debugfs_ib_list[i].name = radeon_debugfs_ib_names[i];</div><div class='del'>-		radeon_debugfs_ib_list[i].show = &amp;radeon_debugfs_ib_info;</div><div class='del'>-		radeon_debugfs_ib_list[i].driver_features = 0;</div><div class='del'>-		radeon_debugfs_ib_list[i].data = &amp;radeon_debugfs_ib_idx[i];</div><div class='del'>-	}</div><div class='del'>-	return radeon_debugfs_add_files(rdev, radeon_debugfs_ib_list,</div><div class='del'>-					RADEON_IB_POOL_SIZE);</div><div class='add'>+	return radeon_debugfs_add_files(rdev, radeon_debugfs_sa_list, 1);</div><div class='ctx'> #else</div><div class='ctx'> 	return 0;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_sa.c b/drivers/gpu/drm/radeon/radeon_sa.c<br/>index 4cce47e7dc0d..32059b745728 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_sa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_sa.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_sa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_sa.c</a></div><div class='hunk'>@@ -27,23 +27,45 @@</div><div class='ctx'>  * Authors:</div><div class='ctx'>  *    Jerome Glisse &lt;glisse@freedesktop.org&gt;</div><div class='ctx'>  */</div><div class='add'>+/* Algorithm:</div><div class='add'>+ *</div><div class='add'>+ * We store the last allocated bo in "hole", we always try to allocate</div><div class='add'>+ * after the last allocated bo. Principle is that in a linear GPU ring</div><div class='add'>+ * progression was is after last is the oldest bo we allocated and thus</div><div class='add'>+ * the first one that should no longer be in use by the GPU.</div><div class='add'>+ *</div><div class='add'>+ * If it's not the case we skip over the bo after last to the closest</div><div class='add'>+ * done bo if such one exist. If none exist and we are not asked to</div><div class='add'>+ * block we report failure to allocate.</div><div class='add'>+ *</div><div class='add'>+ * If we are asked to block we wait on all the oldest fence of all</div><div class='add'>+ * rings. We just wait for any of those fence to complete.</div><div class='add'>+ */</div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "drm.h"</div><div class='ctx'> #include "radeon.h"</div><div class='ctx'> </div><div class='add'>+static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo);</div><div class='add'>+static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager);</div><div class='add'>+</div><div class='ctx'> int radeon_sa_bo_manager_init(struct radeon_device *rdev,</div><div class='ctx'> 			      struct radeon_sa_manager *sa_manager,</div><div class='ctx'> 			      unsigned size, u32 domain)</div><div class='ctx'> {</div><div class='del'>-	int r;</div><div class='add'>+	int i, r;</div><div class='ctx'> </div><div class='add'>+	spin_lock_init(&amp;sa_manager-&gt;lock);</div><div class='ctx'> 	sa_manager-&gt;bo = NULL;</div><div class='ctx'> 	sa_manager-&gt;size = size;</div><div class='ctx'> 	sa_manager-&gt;domain = domain;</div><div class='del'>-	INIT_LIST_HEAD(&amp;sa_manager-&gt;sa_bo);</div><div class='add'>+	sa_manager-&gt;hole = &amp;sa_manager-&gt;olist;</div><div class='add'>+	INIT_LIST_HEAD(&amp;sa_manager-&gt;olist);</div><div class='add'>+	for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+		INIT_LIST_HEAD(&amp;sa_manager-&gt;flist[i]);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	r = radeon_bo_create(rdev, size, RADEON_GPU_PAGE_SIZE, true,</div><div class='del'>-			     RADEON_GEM_DOMAIN_CPU, &amp;sa_manager-&gt;bo);</div><div class='add'>+			     RADEON_GEM_DOMAIN_CPU, NULL, &amp;sa_manager-&gt;bo);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		dev_err(rdev-&gt;dev, "(%d) failed to allocate bo for manager\n", r);</div><div class='ctx'> 		return r;</div><div class='hunk'>@@ -57,11 +79,15 @@ void radeon_sa_bo_manager_fini(struct radeon_device *rdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct radeon_sa_bo *sa_bo, *tmp;</div><div class='ctx'> </div><div class='del'>-	if (!list_empty(&amp;sa_manager-&gt;sa_bo)) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "sa_manager is not empty, clearing anyway\n");</div><div class='add'>+	if (!list_empty(&amp;sa_manager-&gt;olist)) {</div><div class='add'>+		sa_manager-&gt;hole = &amp;sa_manager-&gt;olist,</div><div class='add'>+		radeon_sa_bo_try_free(sa_manager);</div><div class='add'>+		if (!list_empty(&amp;sa_manager-&gt;olist)) {</div><div class='add'>+			dev_err(rdev-&gt;dev, "sa_manager is not empty, clearing anyway\n");</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	list_for_each_entry_safe(sa_bo, tmp, &amp;sa_manager-&gt;sa_bo, list) {</div><div class='del'>-		list_del_init(&amp;sa_bo-&gt;list);</div><div class='add'>+	list_for_each_entry_safe(sa_bo, tmp, &amp;sa_manager-&gt;olist, olist) {</div><div class='add'>+		radeon_sa_bo_remove_locked(sa_bo);</div><div class='ctx'> 	}</div><div class='ctx'> 	radeon_bo_unref(&amp;sa_manager-&gt;bo);</div><div class='ctx'> 	sa_manager-&gt;size = 0;</div><div class='hunk'>@@ -113,77 +139,248 @@ int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Principe is simple, we keep a list of sub allocation in offset</div><div class='del'>- * order (first entry has offset == 0, last entry has the highest</div><div class='del'>- * offset).</div><div class='del'>- *</div><div class='del'>- * When allocating new object we first check if there is room at</div><div class='del'>- * the end total_size - (last_object_offset + last_object_size) &gt;=</div><div class='del'>- * alloc_size. If so we allocate new object there.</div><div class='del'>- *</div><div class='del'>- * When there is not enough room at the end, we start waiting for</div><div class='del'>- * each sub object until we reach object_offset+object_size &gt;=</div><div class='del'>- * alloc_size, this object then become the sub object we return.</div><div class='del'>- *</div><div class='del'>- * Alignment can't be bigger than page size</div><div class='del'>- */</div><div class='add'>+static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo)</div><div class='add'>+{</div><div class='add'>+	struct radeon_sa_manager *sa_manager = sa_bo-&gt;manager;</div><div class='add'>+	if (sa_manager-&gt;hole == &amp;sa_bo-&gt;olist) {</div><div class='add'>+		sa_manager-&gt;hole = sa_bo-&gt;olist.prev;</div><div class='add'>+	}</div><div class='add'>+	list_del_init(&amp;sa_bo-&gt;olist);</div><div class='add'>+	list_del_init(&amp;sa_bo-&gt;flist);</div><div class='add'>+	radeon_fence_unref(&amp;sa_bo-&gt;fence);</div><div class='add'>+	kfree(sa_bo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager)</div><div class='add'>+{</div><div class='add'>+	struct radeon_sa_bo *sa_bo, *tmp;</div><div class='add'>+</div><div class='add'>+	if (sa_manager-&gt;hole-&gt;next == &amp;sa_manager-&gt;olist)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	sa_bo = list_entry(sa_manager-&gt;hole-&gt;next, struct radeon_sa_bo, olist);</div><div class='add'>+	list_for_each_entry_safe_from(sa_bo, tmp, &amp;sa_manager-&gt;olist, olist) {</div><div class='add'>+		if (sa_bo-&gt;fence == NULL || !radeon_fence_signaled(sa_bo-&gt;fence)) {</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		radeon_sa_bo_remove_locked(sa_bo);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned radeon_sa_bo_hole_soffset(struct radeon_sa_manager *sa_manager)</div><div class='add'>+{</div><div class='add'>+	struct list_head *hole = sa_manager-&gt;hole;</div><div class='add'>+</div><div class='add'>+	if (hole != &amp;sa_manager-&gt;olist) {</div><div class='add'>+		return list_entry(hole, struct radeon_sa_bo, olist)-&gt;eoffset;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned radeon_sa_bo_hole_eoffset(struct radeon_sa_manager *sa_manager)</div><div class='add'>+{</div><div class='add'>+	struct list_head *hole = sa_manager-&gt;hole;</div><div class='add'>+</div><div class='add'>+	if (hole-&gt;next != &amp;sa_manager-&gt;olist) {</div><div class='add'>+		return list_entry(hole-&gt;next, struct radeon_sa_bo, olist)-&gt;soffset;</div><div class='add'>+	}</div><div class='add'>+	return sa_manager-&gt;size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool radeon_sa_bo_try_alloc(struct radeon_sa_manager *sa_manager,</div><div class='add'>+				   struct radeon_sa_bo *sa_bo,</div><div class='add'>+				   unsigned size, unsigned align)</div><div class='add'>+{</div><div class='add'>+	unsigned soffset, eoffset, wasted;</div><div class='add'>+</div><div class='add'>+	soffset = radeon_sa_bo_hole_soffset(sa_manager);</div><div class='add'>+	eoffset = radeon_sa_bo_hole_eoffset(sa_manager);</div><div class='add'>+	wasted = (align - (soffset % align)) % align;</div><div class='add'>+</div><div class='add'>+	if ((eoffset - soffset) &gt;= (size + wasted)) {</div><div class='add'>+		soffset += wasted;</div><div class='add'>+</div><div class='add'>+		sa_bo-&gt;manager = sa_manager;</div><div class='add'>+		sa_bo-&gt;soffset = soffset;</div><div class='add'>+		sa_bo-&gt;eoffset = soffset + size;</div><div class='add'>+		list_add(&amp;sa_bo-&gt;olist, sa_manager-&gt;hole);</div><div class='add'>+		INIT_LIST_HEAD(&amp;sa_bo-&gt;flist);</div><div class='add'>+		sa_manager-&gt;hole = &amp;sa_bo-&gt;olist;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool radeon_sa_bo_next_hole(struct radeon_sa_manager *sa_manager,</div><div class='add'>+				   struct radeon_fence **fences,</div><div class='add'>+				   unsigned *tries)</div><div class='add'>+{</div><div class='add'>+	struct radeon_sa_bo *best_bo = NULL;</div><div class='add'>+	unsigned i, soffset, best, tmp;</div><div class='add'>+</div><div class='add'>+	/* if hole points to the end of the buffer */</div><div class='add'>+	if (sa_manager-&gt;hole-&gt;next == &amp;sa_manager-&gt;olist) {</div><div class='add'>+		/* try again with its beginning */</div><div class='add'>+		sa_manager-&gt;hole = &amp;sa_manager-&gt;olist;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	soffset = radeon_sa_bo_hole_soffset(sa_manager);</div><div class='add'>+	/* to handle wrap around we add sa_manager-&gt;size */</div><div class='add'>+	best = sa_manager-&gt;size * 2;</div><div class='add'>+	/* go over all fence list and try to find the closest sa_bo</div><div class='add'>+	 * of the current last</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+		struct radeon_sa_bo *sa_bo;</div><div class='add'>+</div><div class='add'>+		if (list_empty(&amp;sa_manager-&gt;flist[i])) {</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		sa_bo = list_first_entry(&amp;sa_manager-&gt;flist[i],</div><div class='add'>+					 struct radeon_sa_bo, flist);</div><div class='add'>+</div><div class='add'>+		if (!radeon_fence_signaled(sa_bo-&gt;fence)) {</div><div class='add'>+			fences[i] = sa_bo-&gt;fence;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* limit the number of tries each ring gets */</div><div class='add'>+		if (tries[i] &gt; 2) {</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		tmp = sa_bo-&gt;soffset;</div><div class='add'>+		if (tmp &lt; soffset) {</div><div class='add'>+			/* wrap around, pretend it's after */</div><div class='add'>+			tmp += sa_manager-&gt;size;</div><div class='add'>+		}</div><div class='add'>+		tmp -= soffset;</div><div class='add'>+		if (tmp &lt; best) {</div><div class='add'>+			/* this sa bo is the closest one */</div><div class='add'>+			best = tmp;</div><div class='add'>+			best_bo = sa_bo;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (best_bo) {</div><div class='add'>+		++tries[best_bo-&gt;fence-&gt;ring];</div><div class='add'>+		sa_manager-&gt;hole = best_bo-&gt;olist.prev;</div><div class='add'>+</div><div class='add'>+		/* we knew that this one is signaled,</div><div class='add'>+		   so it's save to remote it */</div><div class='add'>+		radeon_sa_bo_remove_locked(best_bo);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int radeon_sa_bo_new(struct radeon_device *rdev,</div><div class='ctx'> 		     struct radeon_sa_manager *sa_manager,</div><div class='del'>-		     struct radeon_sa_bo *sa_bo,</div><div class='del'>-		     unsigned size, unsigned align)</div><div class='add'>+		     struct radeon_sa_bo **sa_bo,</div><div class='add'>+		     unsigned size, unsigned align, bool block)</div><div class='ctx'> {</div><div class='del'>-	struct radeon_sa_bo *tmp;</div><div class='del'>-	struct list_head *head;</div><div class='del'>-	unsigned offset = 0, wasted = 0;</div><div class='add'>+	struct radeon_fence *fences[RADEON_NUM_RINGS];</div><div class='add'>+	unsigned tries[RADEON_NUM_RINGS];</div><div class='add'>+	int i, r = -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(align &gt; RADEON_GPU_PAGE_SIZE);</div><div class='ctx'> 	BUG_ON(size &gt; sa_manager-&gt;size);</div><div class='ctx'> </div><div class='del'>-	/* no one ? */</div><div class='del'>-	head = sa_manager-&gt;sa_bo.prev;</div><div class='del'>-	if (list_empty(&amp;sa_manager-&gt;sa_bo)) {</div><div class='del'>-		goto out;</div><div class='add'>+	*sa_bo = kmalloc(sizeof(struct radeon_sa_bo), GFP_KERNEL);</div><div class='add'>+	if ((*sa_bo) == NULL) {</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='add'>+	(*sa_bo)-&gt;manager = sa_manager;</div><div class='add'>+	(*sa_bo)-&gt;fence = NULL;</div><div class='add'>+	INIT_LIST_HEAD(&amp;(*sa_bo)-&gt;olist);</div><div class='add'>+	INIT_LIST_HEAD(&amp;(*sa_bo)-&gt;flist);</div><div class='ctx'> </div><div class='del'>-	/* look for a hole big enough */</div><div class='del'>-	offset = 0;</div><div class='del'>-	list_for_each_entry(tmp, &amp;sa_manager-&gt;sa_bo, list) {</div><div class='del'>-		/* room before this object ? */</div><div class='del'>-		if ((tmp-&gt;offset - offset) &gt;= size) {</div><div class='del'>-			head = tmp-&gt;list.prev;</div><div class='del'>-			goto out;</div><div class='add'>+	spin_lock(&amp;sa_manager-&gt;lock);</div><div class='add'>+	do {</div><div class='add'>+		for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+			fences[i] = NULL;</div><div class='add'>+			tries[i] = 0;</div><div class='ctx'> 		}</div><div class='del'>-		offset = tmp-&gt;offset + tmp-&gt;size;</div><div class='del'>-		wasted = offset % align;</div><div class='del'>-		if (wasted) {</div><div class='del'>-			wasted = align - wasted;</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			radeon_sa_bo_try_free(sa_manager);</div><div class='add'>+</div><div class='add'>+			if (radeon_sa_bo_try_alloc(sa_manager, *sa_bo,</div><div class='add'>+						   size, align)) {</div><div class='add'>+				spin_unlock(&amp;sa_manager-&gt;lock);</div><div class='add'>+				return 0;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* see if we can skip over some allocations */</div><div class='add'>+		} while (radeon_sa_bo_next_hole(sa_manager, fences, tries));</div><div class='add'>+</div><div class='add'>+		if (block) {</div><div class='add'>+			spin_unlock(&amp;sa_manager-&gt;lock);</div><div class='add'>+			r = radeon_fence_wait_any(rdev, fences, false);</div><div class='add'>+			spin_lock(&amp;sa_manager-&gt;lock);</div><div class='add'>+			if (r) {</div><div class='add'>+				/* if we have nothing to wait for we</div><div class='add'>+				   are practically out of memory */</div><div class='add'>+				if (r == -ENOENT) {</div><div class='add'>+					r = -ENOMEM;</div><div class='add'>+				}</div><div class='add'>+				goto out_err;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='del'>-		offset += wasted;</div><div class='del'>-	}</div><div class='del'>-	/* room at the end ? */</div><div class='del'>-	head = sa_manager-&gt;sa_bo.prev;</div><div class='del'>-	tmp = list_entry(head, struct radeon_sa_bo, list);</div><div class='del'>-	offset = tmp-&gt;offset + tmp-&gt;size;</div><div class='del'>-	wasted = offset % align;</div><div class='del'>-	if (wasted) {</div><div class='del'>-		wasted = align - wasted;</div><div class='del'>-	}</div><div class='del'>-	offset += wasted;</div><div class='del'>-	if ((sa_manager-&gt;size - offset) &lt; size) {</div><div class='del'>-		/* failed to find somethings big enough */</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	} while (block);</div><div class='add'>+</div><div class='add'>+out_err:</div><div class='add'>+	spin_unlock(&amp;sa_manager-&gt;lock);</div><div class='add'>+	kfree(*sa_bo);</div><div class='add'>+	*sa_bo = NULL;</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void radeon_sa_bo_free(struct radeon_device *rdev, struct radeon_sa_bo **sa_bo,</div><div class='add'>+		       struct radeon_fence *fence)</div><div class='add'>+{</div><div class='add'>+	struct radeon_sa_manager *sa_manager;</div><div class='add'>+</div><div class='add'>+	if (sa_bo == NULL || *sa_bo == NULL) {</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	sa_bo-&gt;manager = sa_manager;</div><div class='del'>-	sa_bo-&gt;offset = offset;</div><div class='del'>-	sa_bo-&gt;size = size;</div><div class='del'>-	list_add(&amp;sa_bo-&gt;list, head);</div><div class='del'>-	return 0;</div><div class='add'>+	sa_manager = (*sa_bo)-&gt;manager;</div><div class='add'>+	spin_lock(&amp;sa_manager-&gt;lock);</div><div class='add'>+	if (fence &amp;&amp; fence-&gt;seq &amp;&amp; fence-&gt;seq &lt; RADEON_FENCE_NOTEMITED_SEQ) {</div><div class='add'>+		(*sa_bo)-&gt;fence = radeon_fence_ref(fence);</div><div class='add'>+		list_add_tail(&amp;(*sa_bo)-&gt;flist,</div><div class='add'>+			      &amp;sa_manager-&gt;flist[fence-&gt;ring]);</div><div class='add'>+	} else {</div><div class='add'>+		radeon_sa_bo_remove_locked(*sa_bo);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;sa_manager-&gt;lock);</div><div class='add'>+	*sa_bo = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void radeon_sa_bo_free(struct radeon_device *rdev, struct radeon_sa_bo *sa_bo)</div><div class='add'>+#if defined(CONFIG_DEBUG_FS)</div><div class='add'>+void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,</div><div class='add'>+				  struct seq_file *m)</div><div class='ctx'> {</div><div class='del'>-	list_del_init(&amp;sa_bo-&gt;list);</div><div class='add'>+	struct radeon_sa_bo *i;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;sa_manager-&gt;lock);</div><div class='add'>+	list_for_each_entry(i, &amp;sa_manager-&gt;olist, olist) {</div><div class='add'>+		if (&amp;i-&gt;olist == sa_manager-&gt;hole) {</div><div class='add'>+			seq_printf(m, "&gt;");</div><div class='add'>+		} else {</div><div class='add'>+			seq_printf(m, " ");</div><div class='add'>+		}</div><div class='add'>+		seq_printf(m, "[0x%08x 0x%08x] size %8d",</div><div class='add'>+			   i-&gt;soffset, i-&gt;eoffset, i-&gt;eoffset - i-&gt;soffset);</div><div class='add'>+		if (i-&gt;fence) {</div><div class='add'>+			seq_printf(m, " protected by 0x%016llx on ring %d",</div><div class='add'>+				   i-&gt;fence-&gt;seq, i-&gt;fence-&gt;ring);</div><div class='add'>+		}</div><div class='add'>+		seq_printf(m, "\n");</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;sa_manager-&gt;lock);</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_semaphore.c b/drivers/gpu/drm/radeon/radeon_semaphore.c<br/>index 61dd4e3c9209..e2ace5dce117 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_semaphore.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_semaphore.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_semaphore.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_semaphore.c</a></div><div class='hunk'>@@ -31,148 +31,107 @@</div><div class='ctx'> #include "drm.h"</div><div class='ctx'> #include "radeon.h"</div><div class='ctx'> </div><div class='del'>-static int radeon_semaphore_add_bo(struct radeon_device *rdev)</div><div class='del'>-{</div><div class='del'>-	struct radeon_semaphore_bo *bo;</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-	uint64_t gpu_addr;</div><div class='del'>-	uint32_t *cpu_ptr;</div><div class='del'>-	int r, i;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	bo = kmalloc(sizeof(struct radeon_semaphore_bo), GFP_KERNEL);</div><div class='del'>-	if (bo == NULL) {</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	INIT_LIST_HEAD(&amp;bo-&gt;free);</div><div class='del'>-	INIT_LIST_HEAD(&amp;bo-&gt;list);</div><div class='del'>-	bo-&gt;nused = 0;</div><div class='del'>-</div><div class='del'>-	r = radeon_ib_get(rdev, 0, &amp;bo-&gt;ib, RADEON_SEMAPHORE_BO_SIZE);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed to get a bo after 5 retry\n");</div><div class='del'>-		kfree(bo);</div><div class='del'>-		return r;</div><div class='del'>-	}</div><div class='del'>-	gpu_addr = rdev-&gt;ib_pool.sa_manager.gpu_addr;</div><div class='del'>-	gpu_addr += bo-&gt;ib-&gt;sa_bo.offset;</div><div class='del'>-	cpu_ptr = rdev-&gt;ib_pool.sa_manager.cpu_ptr;</div><div class='del'>-	cpu_ptr += (bo-&gt;ib-&gt;sa_bo.offset &gt;&gt; 2);</div><div class='del'>-	for (i = 0; i &lt; (RADEON_SEMAPHORE_BO_SIZE/8); i++) {</div><div class='del'>-		bo-&gt;semaphores[i].gpu_addr = gpu_addr;</div><div class='del'>-		bo-&gt;semaphores[i].cpu_ptr = cpu_ptr;</div><div class='del'>-		bo-&gt;semaphores[i].bo = bo;</div><div class='del'>-		list_add_tail(&amp;bo-&gt;semaphores[i].list, &amp;bo-&gt;free);</div><div class='del'>-		gpu_addr += 8;</div><div class='del'>-		cpu_ptr += 2;</div><div class='del'>-	}</div><div class='del'>-	write_lock_irqsave(&amp;rdev-&gt;semaphore_drv.lock, irq_flags);</div><div class='del'>-	list_add_tail(&amp;bo-&gt;list, &amp;rdev-&gt;semaphore_drv.bo);</div><div class='del'>-	write_unlock_irqrestore(&amp;rdev-&gt;semaphore_drv.lock, irq_flags);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void radeon_semaphore_del_bo_locked(struct radeon_device *rdev,</div><div class='del'>-					   struct radeon_semaphore_bo *bo)</div><div class='del'>-{</div><div class='del'>-	radeon_sa_bo_free(rdev, &amp;bo-&gt;ib-&gt;sa_bo);</div><div class='del'>-	radeon_fence_unref(&amp;bo-&gt;ib-&gt;fence);</div><div class='del'>-	list_del(&amp;bo-&gt;list);</div><div class='del'>-	kfree(bo);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void radeon_semaphore_shrink_locked(struct radeon_device *rdev)</div><div class='del'>-{</div><div class='del'>-	struct radeon_semaphore_bo *bo, *n;</div><div class='del'>-</div><div class='del'>-	if (list_empty(&amp;rdev-&gt;semaphore_drv.bo)) {</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	/* only shrink if first bo has free semaphore */</div><div class='del'>-	bo = list_first_entry(&amp;rdev-&gt;semaphore_drv.bo, struct radeon_semaphore_bo, list);</div><div class='del'>-	if (list_empty(&amp;bo-&gt;free)) {</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	list_for_each_entry_safe_continue(bo, n, &amp;rdev-&gt;semaphore_drv.bo, list) {</div><div class='del'>-		if (bo-&gt;nused)</div><div class='del'>-			continue;</div><div class='del'>-		radeon_semaphore_del_bo_locked(rdev, bo);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> int radeon_semaphore_create(struct radeon_device *rdev,</div><div class='ctx'> 			    struct radeon_semaphore **semaphore)</div><div class='ctx'> {</div><div class='del'>-	struct radeon_semaphore_bo *bo;</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-	bool do_retry = true;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-retry:</div><div class='del'>-	*semaphore = NULL;</div><div class='del'>-	write_lock_irqsave(&amp;rdev-&gt;semaphore_drv.lock, irq_flags);</div><div class='del'>-	list_for_each_entry(bo, &amp;rdev-&gt;semaphore_drv.bo, list) {</div><div class='del'>-		if (list_empty(&amp;bo-&gt;free))</div><div class='del'>-			continue;</div><div class='del'>-		*semaphore = list_first_entry(&amp;bo-&gt;free, struct radeon_semaphore, list);</div><div class='del'>-		(*semaphore)-&gt;cpu_ptr[0] = 0;</div><div class='del'>-		(*semaphore)-&gt;cpu_ptr[1] = 0;</div><div class='del'>-		list_del(&amp;(*semaphore)-&gt;list);</div><div class='del'>-		bo-&gt;nused++;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	write_unlock_irqrestore(&amp;rdev-&gt;semaphore_drv.lock, irq_flags);</div><div class='del'>-</div><div class='add'>+	*semaphore = kmalloc(sizeof(struct radeon_semaphore), GFP_KERNEL);</div><div class='ctx'> 	if (*semaphore == NULL) {</div><div class='del'>-		if (do_retry) {</div><div class='del'>-			do_retry = false;</div><div class='del'>-			r = radeon_semaphore_add_bo(rdev);</div><div class='del'>-			if (r)</div><div class='del'>-				return r;</div><div class='del'>-			goto retry;</div><div class='del'>-		}</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+	r = radeon_sa_bo_new(rdev, &amp;rdev-&gt;ring_tmp_bo,</div><div class='add'>+			     &amp;(*semaphore)-&gt;sa_bo, 8, 8, true);</div><div class='add'>+	if (r) {</div><div class='add'>+		kfree(*semaphore);</div><div class='add'>+		*semaphore = NULL;</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+	(*semaphore)-&gt;waiters = 0;</div><div class='add'>+	(*semaphore)-&gt;gpu_addr = radeon_sa_bo_gpu_addr((*semaphore)-&gt;sa_bo);</div><div class='add'>+	*((uint64_t*)radeon_sa_bo_cpu_addr((*semaphore)-&gt;sa_bo)) = 0;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void radeon_semaphore_emit_signal(struct radeon_device *rdev, int ring,</div><div class='ctx'> 			          struct radeon_semaphore *semaphore)</div><div class='ctx'> {</div><div class='add'>+	--semaphore-&gt;waiters;</div><div class='ctx'> 	radeon_semaphore_ring_emit(rdev, ring, &amp;rdev-&gt;ring[ring], semaphore, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void radeon_semaphore_emit_wait(struct radeon_device *rdev, int ring,</div><div class='ctx'> 			        struct radeon_semaphore *semaphore)</div><div class='ctx'> {</div><div class='add'>+	++semaphore-&gt;waiters;</div><div class='ctx'> 	radeon_semaphore_ring_emit(rdev, ring, &amp;rdev-&gt;ring[ring], semaphore, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void radeon_semaphore_free(struct radeon_device *rdev,</div><div class='del'>-			   struct radeon_semaphore *semaphore)</div><div class='add'>+int radeon_semaphore_sync_rings(struct radeon_device *rdev,</div><div class='add'>+				struct radeon_semaphore *semaphore,</div><div class='add'>+				bool sync_to[RADEON_NUM_RINGS],</div><div class='add'>+				int dst_ring)</div><div class='ctx'> {</div><div class='del'>-	unsigned long irq_flags;</div><div class='add'>+	int i = 0, r;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;ring_lock);</div><div class='add'>+	r = radeon_ring_alloc(rdev, &amp;rdev-&gt;ring[dst_ring], RADEON_NUM_RINGS * 8);</div><div class='add'>+	if (r) {</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='add'>+		/* no need to sync to our own or unused rings */</div><div class='add'>+		if (!sync_to[i] || i == dst_ring)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-	write_lock_irqsave(&amp;rdev-&gt;semaphore_drv.lock, irq_flags);</div><div class='del'>-	semaphore-&gt;bo-&gt;nused--;</div><div class='del'>-	list_add_tail(&amp;semaphore-&gt;list, &amp;semaphore-&gt;bo-&gt;free);</div><div class='del'>-	radeon_semaphore_shrink_locked(rdev);</div><div class='del'>-	write_unlock_irqrestore(&amp;rdev-&gt;semaphore_drv.lock, irq_flags);</div><div class='add'>+		/* prevent GPU deadlocks */</div><div class='add'>+		if (!rdev-&gt;ring[i].ready) {</div><div class='add'>+			dev_err(rdev-&gt;dev, "Trying to sync to a disabled ring!");</div><div class='add'>+			r = -EINVAL;</div><div class='add'>+			goto error;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		r = radeon_ring_alloc(rdev, &amp;rdev-&gt;ring[i], 8);</div><div class='add'>+		if (r) {</div><div class='add'>+			goto error;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		radeon_semaphore_emit_signal(rdev, i, semaphore);</div><div class='add'>+		radeon_semaphore_emit_wait(rdev, dst_ring, semaphore);</div><div class='add'>+</div><div class='add'>+		radeon_ring_commit(rdev, &amp;rdev-&gt;ring[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	radeon_ring_commit(rdev, &amp;rdev-&gt;ring[dst_ring]);</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	/* unlock all locks taken so far */</div><div class='add'>+	for (--i; i &gt;= 0; --i) {</div><div class='add'>+		if (sync_to[i] || i == dst_ring) {</div><div class='add'>+			radeon_ring_undo(&amp;rdev-&gt;ring[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	radeon_ring_undo(&amp;rdev-&gt;ring[dst_ring]);</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;ring_lock);</div><div class='add'>+	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void radeon_semaphore_driver_fini(struct radeon_device *rdev)</div><div class='add'>+void radeon_semaphore_free(struct radeon_device *rdev,</div><div class='add'>+			   struct radeon_semaphore *semaphore,</div><div class='add'>+			   struct radeon_fence *fence)</div><div class='ctx'> {</div><div class='del'>-	struct radeon_semaphore_bo *bo, *n;</div><div class='del'>-	unsigned long irq_flags;</div><div class='del'>-</div><div class='del'>-	write_lock_irqsave(&amp;rdev-&gt;semaphore_drv.lock, irq_flags);</div><div class='del'>-	/* we force to free everything */</div><div class='del'>-	list_for_each_entry_safe(bo, n, &amp;rdev-&gt;semaphore_drv.bo, list) {</div><div class='del'>-		if (!list_empty(&amp;bo-&gt;free)) {</div><div class='del'>-			dev_err(rdev-&gt;dev, "still in use semaphore\n");</div><div class='del'>-		}</div><div class='del'>-		radeon_semaphore_del_bo_locked(rdev, bo);</div><div class='add'>+	if (semaphore == NULL) {</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (semaphore-&gt;waiters &gt; 0) {</div><div class='add'>+		dev_err(rdev-&gt;dev, "semaphore %p has more waiters than signalers,"</div><div class='add'>+			" hardware lockup imminent!\n", semaphore);</div><div class='ctx'> 	}</div><div class='del'>-	write_unlock_irqrestore(&amp;rdev-&gt;semaphore_drv.lock, irq_flags);</div><div class='add'>+	radeon_sa_bo_free(rdev, &amp;semaphore-&gt;sa_bo, fence);</div><div class='add'>+	kfree(semaphore);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_test.c b/drivers/gpu/drm/radeon/radeon_test.c<br/>index dc5dcf483aa3..efff929ea49d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_test.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_test.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_test.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_test.c</a></div><div class='hunk'>@@ -59,7 +59,7 @@ void radeon_test_moves(struct radeon_device *rdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,</div><div class='del'>-				&amp;vram_obj);</div><div class='add'>+			     NULL, &amp;vram_obj);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("Failed to create VRAM object\n");</div><div class='ctx'> 		goto out_cleanup;</div><div class='hunk'>@@ -78,7 +78,7 @@ void radeon_test_moves(struct radeon_device *rdev)</div><div class='ctx'> 		void **vram_start, **vram_end;</div><div class='ctx'> </div><div class='ctx'> 		r = radeon_bo_create(rdev, size, PAGE_SIZE, true,</div><div class='del'>-					 RADEON_GEM_DOMAIN_GTT, gtt_obj + i);</div><div class='add'>+				     RADEON_GEM_DOMAIN_GTT, NULL, gtt_obj + i);</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			DRM_ERROR("Failed to create GTT object %d\n", i);</div><div class='ctx'> 			goto out_cleanup;</div><div class='hunk'>@@ -317,7 +317,7 @@ void radeon_test_ring_sync(struct radeon_device *rdev,</div><div class='ctx'> </div><div class='ctx'> out_cleanup:</div><div class='ctx'> 	if (semaphore)</div><div class='del'>-		radeon_semaphore_free(rdev, semaphore);</div><div class='add'>+		radeon_semaphore_free(rdev, semaphore, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (fence1)</div><div class='ctx'> 		radeon_fence_unref(&amp;fence1);</div><div class='hunk'>@@ -437,7 +437,7 @@ void radeon_test_ring_sync2(struct radeon_device *rdev,</div><div class='ctx'> </div><div class='ctx'> out_cleanup:</div><div class='ctx'> 	if (semaphore)</div><div class='del'>-		radeon_semaphore_free(rdev, semaphore);</div><div class='add'>+		radeon_semaphore_free(rdev, semaphore, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (fenceA)</div><div class='ctx'> 		radeon_fence_unref(&amp;fenceA);</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c<br/>index f493c6403af5..c94a2257761f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_ttm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/radeon_ttm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/radeon_ttm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/radeon_ttm.c</a></div><div class='hunk'>@@ -222,8 +222,9 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,</div><div class='ctx'> {</div><div class='ctx'> 	struct radeon_device *rdev;</div><div class='ctx'> 	uint64_t old_start, new_start;</div><div class='del'>-	struct radeon_fence *fence;</div><div class='del'>-	int r, i;</div><div class='add'>+	struct radeon_fence *fence, *old_fence;</div><div class='add'>+	struct radeon_semaphore *sem = NULL;</div><div class='add'>+	int r;</div><div class='ctx'> </div><div class='ctx'> 	rdev = radeon_get_rdev(bo-&gt;bdev);</div><div class='ctx'> 	r = radeon_fence_create(rdev, &amp;fence, radeon_copy_ring_index(rdev));</div><div class='hunk'>@@ -242,6 +243,7 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		DRM_ERROR("Unknown placement %d\n", old_mem-&gt;mem_type);</div><div class='add'>+		radeon_fence_unref(&amp;fence);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	switch (new_mem-&gt;mem_type) {</div><div class='hunk'>@@ -253,42 +255,36 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		DRM_ERROR("Unknown placement %d\n", old_mem-&gt;mem_type);</div><div class='add'>+		radeon_fence_unref(&amp;fence);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!rdev-&gt;ring[radeon_copy_ring_index(rdev)].ready) {</div><div class='ctx'> 		DRM_ERROR("Trying to move memory with ring turned off.\n");</div><div class='add'>+		radeon_fence_unref(&amp;fence);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);</div><div class='ctx'> </div><div class='ctx'> 	/* sync other rings */</div><div class='del'>-	if (rdev-&gt;family &gt;= CHIP_R600) {</div><div class='del'>-		for (i = 0; i &lt; RADEON_NUM_RINGS; ++i) {</div><div class='del'>-			/* no need to sync to our own or unused rings */</div><div class='del'>-			if (i == radeon_copy_ring_index(rdev) || !rdev-&gt;ring[i].ready)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			if (!fence-&gt;semaphore) {</div><div class='del'>-				r = radeon_semaphore_create(rdev, &amp;fence-&gt;semaphore);</div><div class='del'>-				/* FIXME: handle semaphore error */</div><div class='del'>-				if (r)</div><div class='del'>-					continue;</div><div class='del'>-			}</div><div class='add'>+	old_fence = bo-&gt;sync_obj;</div><div class='add'>+	if (old_fence &amp;&amp; old_fence-&gt;ring != fence-&gt;ring</div><div class='add'>+	    &amp;&amp; !radeon_fence_signaled(old_fence)) {</div><div class='add'>+		bool sync_to_ring[RADEON_NUM_RINGS] = { };</div><div class='add'>+		sync_to_ring[old_fence-&gt;ring] = true;</div><div class='add'>+</div><div class='add'>+		r = radeon_semaphore_create(rdev, &amp;sem);</div><div class='add'>+		if (r) {</div><div class='add'>+			radeon_fence_unref(&amp;fence);</div><div class='add'>+			return r;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			r = radeon_ring_lock(rdev, &amp;rdev-&gt;ring[i], 3);</div><div class='del'>-			/* FIXME: handle ring lock error */</div><div class='del'>-			if (r)</div><div class='del'>-				continue;</div><div class='del'>-			radeon_semaphore_emit_signal(rdev, i, fence-&gt;semaphore);</div><div class='del'>-			radeon_ring_unlock_commit(rdev, &amp;rdev-&gt;ring[i]);</div><div class='del'>-</div><div class='del'>-			r = radeon_ring_lock(rdev, &amp;rdev-&gt;ring[radeon_copy_ring_index(rdev)], 3);</div><div class='del'>-			/* FIXME: handle ring lock error */</div><div class='del'>-			if (r)</div><div class='del'>-				continue;</div><div class='del'>-			radeon_semaphore_emit_wait(rdev, radeon_copy_ring_index(rdev), fence-&gt;semaphore);</div><div class='del'>-			radeon_ring_unlock_commit(rdev, &amp;rdev-&gt;ring[radeon_copy_ring_index(rdev)]);</div><div class='add'>+		r = radeon_semaphore_sync_rings(rdev, sem,</div><div class='add'>+						sync_to_ring, fence-&gt;ring);</div><div class='add'>+		if (r) {</div><div class='add'>+			radeon_semaphore_free(rdev, sem, NULL);</div><div class='add'>+			radeon_fence_unref(&amp;fence);</div><div class='add'>+			return r;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -298,6 +294,7 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,</div><div class='ctx'> 	/* FIXME: handle copy error */</div><div class='ctx'> 	r = ttm_bo_move_accel_cleanup(bo, (void *)fence, NULL,</div><div class='ctx'> 				      evict, no_wait_reserve, no_wait_gpu, new_mem);</div><div class='add'>+	radeon_semaphore_free(rdev, sem, fence);</div><div class='ctx'> 	radeon_fence_unref(&amp;fence);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='hunk'>@@ -614,10 +611,18 @@ static int radeon_ttm_tt_populate(struct ttm_tt *ttm)</div><div class='ctx'> 	struct radeon_ttm_tt *gtt = (void *)ttm;</div><div class='ctx'> 	unsigned i;</div><div class='ctx'> 	int r;</div><div class='add'>+	bool slave = !!(ttm-&gt;page_flags &amp; TTM_PAGE_FLAG_SG);</div><div class='ctx'> </div><div class='ctx'> 	if (ttm-&gt;state != tt_unpopulated)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (slave &amp;&amp; ttm-&gt;sg) {</div><div class='add'>+		drm_prime_sg_to_page_addr_arrays(ttm-&gt;sg, ttm-&gt;pages,</div><div class='add'>+						 gtt-&gt;ttm.dma_address, ttm-&gt;num_pages);</div><div class='add'>+		ttm-&gt;state = tt_unbound;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	rdev = radeon_get_rdev(ttm-&gt;bdev);</div><div class='ctx'> #if __OS_HAS_AGP</div><div class='ctx'> 	if (rdev-&gt;flags &amp; RADEON_IS_AGP) {</div><div class='hunk'>@@ -658,6 +663,10 @@ static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm)</div><div class='ctx'> 	struct radeon_device *rdev;</div><div class='ctx'> 	struct radeon_ttm_tt *gtt = (void *)ttm;</div><div class='ctx'> 	unsigned i;</div><div class='add'>+	bool slave = !!(ttm-&gt;page_flags &amp; TTM_PAGE_FLAG_SG);</div><div class='add'>+</div><div class='add'>+	if (slave)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	rdev = radeon_get_rdev(ttm-&gt;bdev);</div><div class='ctx'> #if __OS_HAS_AGP</div><div class='hunk'>@@ -729,8 +738,8 @@ int radeon_ttm_init(struct radeon_device *rdev)</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> 	r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,</div><div class='del'>-				RADEON_GEM_DOMAIN_VRAM,</div><div class='del'>-				&amp;rdev-&gt;stollen_vga_memory);</div><div class='add'>+			     RADEON_GEM_DOMAIN_VRAM,</div><div class='add'>+			     NULL, &amp;rdev-&gt;stollen_vga_memory);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c<br/>index 4cf381b3a6d8..a464eb5e2df2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rs400.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/rs400.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rs400.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rs400.c</a></div><div class='hunk'>@@ -430,12 +430,9 @@ static int rs400_startup(struct radeon_device *rdev)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed testing IB (%d).\n", r);</div><div class='del'>-		rdev-&gt;accel_working = false;</div><div class='add'>+	r = radeon_ib_ring_tests(rdev);</div><div class='add'>+	if (r)</div><div class='ctx'> 		return r;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c<br/>index d25cf869d08d..e95c5e61d4e2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rs600.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/rs600.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rs600.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rs600.c</a></div><div class='hunk'>@@ -396,7 +396,6 @@ int rs600_asic_reset(struct radeon_device *rdev)</div><div class='ctx'> 	/* Check if GPU is idle */</div><div class='ctx'> 	if (G_000E40_GA_BUSY(status) || G_000E40_VAP_BUSY(status)) {</div><div class='ctx'> 		dev_err(rdev-&gt;dev, "failed to reset GPU\n");</div><div class='del'>-		rdev-&gt;gpu_lockup = true;</div><div class='ctx'> 		ret = -1;</div><div class='ctx'> 	} else</div><div class='ctx'> 		dev_info(rdev-&gt;dev, "GPU reset succeed\n");</div><div class='hunk'>@@ -553,6 +552,12 @@ int rs600_irq_set(struct radeon_device *rdev)</div><div class='ctx'> 		~S_007D08_DC_HOT_PLUG_DETECT1_INT_EN(1);</div><div class='ctx'> 	u32 hpd2 = RREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL) &amp;</div><div class='ctx'> 		~S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1);</div><div class='add'>+	u32 hdmi0;</div><div class='add'>+	if (ASIC_IS_DCE2(rdev))</div><div class='add'>+		hdmi0 = RREG32(R_007408_HDMI0_AUDIO_PACKET_CONTROL) &amp;</div><div class='add'>+			~S_007408_HDMI0_AZ_FORMAT_WTRIG_MASK(1);</div><div class='add'>+	else</div><div class='add'>+		hdmi0 = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!rdev-&gt;irq.installed) {</div><div class='ctx'> 		WARN(1, "Can't enable IRQ/MSI because no handler is installed\n");</div><div class='hunk'>@@ -579,10 +584,15 @@ int rs600_irq_set(struct radeon_device *rdev)</div><div class='ctx'> 	if (rdev-&gt;irq.hpd[1]) {</div><div class='ctx'> 		hpd2 |= S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1);</div><div class='ctx'> 	}</div><div class='add'>+	if (rdev-&gt;irq.afmt[0]) {</div><div class='add'>+		hdmi0 |= S_007408_HDMI0_AZ_FORMAT_WTRIG_MASK(1);</div><div class='add'>+	}</div><div class='ctx'> 	WREG32(R_000040_GEN_INT_CNTL, tmp);</div><div class='ctx'> 	WREG32(R_006540_DxMODE_INT_MASK, mode_int);</div><div class='ctx'> 	WREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL, hpd1);</div><div class='ctx'> 	WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, hpd2);</div><div class='add'>+	if (ASIC_IS_DCE2(rdev))</div><div class='add'>+		WREG32(R_007408_HDMI0_AUDIO_PACKET_CONTROL, hdmi0);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -622,6 +632,17 @@ static inline u32 rs600_irq_ack(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;irq.stat_regs.r500.disp_int = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ASIC_IS_DCE2(rdev)) {</div><div class='add'>+		rdev-&gt;irq.stat_regs.r500.hdmi0_status = RREG32(R_007404_HDMI0_STATUS) &amp;</div><div class='add'>+			S_007404_HDMI0_AZ_FORMAT_WTRIG(1);</div><div class='add'>+		if (G_007404_HDMI0_AZ_FORMAT_WTRIG(rdev-&gt;irq.stat_regs.r500.hdmi0_status)) {</div><div class='add'>+			tmp = RREG32(R_007408_HDMI0_AUDIO_PACKET_CONTROL);</div><div class='add'>+			tmp |= S_007408_HDMI0_AZ_FORMAT_WTRIG_ACK(1);</div><div class='add'>+			WREG32(R_007408_HDMI0_AUDIO_PACKET_CONTROL, tmp);</div><div class='add'>+		}</div><div class='add'>+	} else</div><div class='add'>+		rdev-&gt;irq.stat_regs.r500.hdmi0_status = 0;</div><div class='add'>+</div><div class='ctx'> 	if (irqs) {</div><div class='ctx'> 		WREG32(R_000044_GEN_INT_STATUS, irqs);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -630,6 +651,9 @@ static inline u32 rs600_irq_ack(struct radeon_device *rdev)</div><div class='ctx'> </div><div class='ctx'> void rs600_irq_disable(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='add'>+	u32 hdmi0 = RREG32(R_007408_HDMI0_AUDIO_PACKET_CONTROL) &amp;</div><div class='add'>+		~S_007408_HDMI0_AZ_FORMAT_WTRIG_MASK(1);</div><div class='add'>+	WREG32(R_007408_HDMI0_AUDIO_PACKET_CONTROL, hdmi0);</div><div class='ctx'> 	WREG32(R_000040_GEN_INT_CNTL, 0);</div><div class='ctx'> 	WREG32(R_006540_DxMODE_INT_MASK, 0);</div><div class='ctx'> 	/* Wait and acknowledge irq */</div><div class='hunk'>@@ -641,15 +665,20 @@ int rs600_irq_process(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	u32 status, msi_rearm;</div><div class='ctx'> 	bool queue_hotplug = false;</div><div class='add'>+	bool queue_hdmi = false;</div><div class='ctx'> </div><div class='ctx'> 	/* reset gui idle ack.  the status bit is broken */</div><div class='ctx'> 	rdev-&gt;irq.gui_idle_acked = false;</div><div class='ctx'> </div><div class='ctx'> 	status = rs600_irq_ack(rdev);</div><div class='del'>-	if (!status &amp;&amp; !rdev-&gt;irq.stat_regs.r500.disp_int) {</div><div class='add'>+	if (!status &amp;&amp;</div><div class='add'>+	    !rdev-&gt;irq.stat_regs.r500.disp_int &amp;&amp;</div><div class='add'>+	    !rdev-&gt;irq.stat_regs.r500.hdmi0_status) {</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> 	}</div><div class='del'>-	while (status || rdev-&gt;irq.stat_regs.r500.disp_int) {</div><div class='add'>+	while (status ||</div><div class='add'>+	       rdev-&gt;irq.stat_regs.r500.disp_int ||</div><div class='add'>+	       rdev-&gt;irq.stat_regs.r500.hdmi0_status) {</div><div class='ctx'> 		/* SW interrupt */</div><div class='ctx'> 		if (G_000044_SW_INT(status)) {</div><div class='ctx'> 			radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX);</div><div class='hunk'>@@ -687,12 +716,18 @@ int rs600_irq_process(struct radeon_device *rdev)</div><div class='ctx'> 			queue_hotplug = true;</div><div class='ctx'> 			DRM_DEBUG("HPD2\n");</div><div class='ctx'> 		}</div><div class='add'>+		if (G_007404_HDMI0_AZ_FORMAT_WTRIG(rdev-&gt;irq.stat_regs.r500.hdmi0_status)) {</div><div class='add'>+			queue_hdmi = true;</div><div class='add'>+			DRM_DEBUG("HDMI0\n");</div><div class='add'>+		}</div><div class='ctx'> 		status = rs600_irq_ack(rdev);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* reset gui idle ack.  the status bit is broken */</div><div class='ctx'> 	rdev-&gt;irq.gui_idle_acked = false;</div><div class='ctx'> 	if (queue_hotplug)</div><div class='ctx'> 		schedule_work(&amp;rdev-&gt;hotplug_work);</div><div class='add'>+	if (queue_hdmi)</div><div class='add'>+		schedule_work(&amp;rdev-&gt;audio_work);</div><div class='ctx'> 	if (rdev-&gt;msi_enabled) {</div><div class='ctx'> 		switch (rdev-&gt;family) {</div><div class='ctx'> 		case CHIP_RS600:</div><div class='hunk'>@@ -873,20 +908,17 @@ static int rs600_startup(struct radeon_device *rdev)</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	r = r600_audio_init(rdev);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed initializing audio\n");</div><div class='add'>+	r = radeon_ib_pool_start(rdev);</div><div class='add'>+	if (r)</div><div class='ctx'> 		return r;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_pool_start(rdev);</div><div class='add'>+	r = radeon_ib_ring_tests(rdev);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='add'>+	r = r600_audio_init(rdev);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed testing IB (%d).\n", r);</div><div class='del'>-		rdev-&gt;accel_working = false;</div><div class='add'>+		dev_err(rdev-&gt;dev, "failed initializing audio\n");</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/radeon/rs600d.h b/drivers/gpu/drm/radeon/rs600d.h<br/>index a27c13ac47c3..f1f89414dc63 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rs600d.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/rs600d.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rs600d.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rs600d.h</a></div><div class='hunk'>@@ -485,6 +485,20 @@</div><div class='ctx'> #define   S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(x)       (((x) &amp; 0x1) &lt;&lt; 16)</div><div class='ctx'> #define   G_007D18_DC_HOT_PLUG_DETECT2_INT_EN(x)       (((x) &gt;&gt; 16) &amp; 0x1)</div><div class='ctx'> #define   C_007D18_DC_HOT_PLUG_DETECT2_INT_EN          0xFFFEFFFF</div><div class='add'>+#define R_007404_HDMI0_STATUS                          0x007404</div><div class='add'>+#define   S_007404_HDMI0_AZ_FORMAT_WTRIG(x)            (((x) &amp; 0x1) &lt;&lt; 28)</div><div class='add'>+#define   G_007404_HDMI0_AZ_FORMAT_WTRIG(x)            (((x) &gt;&gt; 28) &amp; 0x1)</div><div class='add'>+#define   C_007404_HDMI0_AZ_FORMAT_WTRIG               0xEFFFFFFF</div><div class='add'>+#define   S_007404_HDMI0_AZ_FORMAT_WTRIG_INT(x)        (((x) &amp; 0x1) &lt;&lt; 29)</div><div class='add'>+#define   G_007404_HDMI0_AZ_FORMAT_WTRIG_INT(x)        (((x) &gt;&gt; 29) &amp; 0x1)</div><div class='add'>+#define   C_007404_HDMI0_AZ_FORMAT_WTRIG_INT           0xDFFFFFFF</div><div class='add'>+#define R_007408_HDMI0_AUDIO_PACKET_CONTROL            0x007408</div><div class='add'>+#define   S_007408_HDMI0_AZ_FORMAT_WTRIG_MASK(x)       (((x) &amp; 0x1) &lt;&lt; 28)</div><div class='add'>+#define   G_007408_HDMI0_AZ_FORMAT_WTRIG_MASK(x)       (((x) &gt;&gt; 28) &amp; 0x1)</div><div class='add'>+#define   C_007408_HDMI0_AZ_FORMAT_WTRIG_MASK          0xEFFFFFFF</div><div class='add'>+#define   S_007408_HDMI0_AZ_FORMAT_WTRIG_ACK(x)        (((x) &amp; 0x1) &lt;&lt; 29)</div><div class='add'>+#define   G_007408_HDMI0_AZ_FORMAT_WTRIG_ACK(x)        (((x) &gt;&gt; 29) &amp; 0x1)</div><div class='add'>+#define   C_007408_HDMI0_AZ_FORMAT_WTRIG_ACK           0xDFFFFFFF</div><div class='ctx'> </div><div class='ctx'> /* MC registers */</div><div class='ctx'> #define R_000000_MC_STATUS                           0x000000</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c<br/>index f2c3b9d75f18..159b6a43fda0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rs690.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/rs690.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rs690.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rs690.c</a></div><div class='hunk'>@@ -637,20 +637,17 @@ static int rs690_startup(struct radeon_device *rdev)</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	r = r600_audio_init(rdev);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed initializing audio\n");</div><div class='add'>+	r = radeon_ib_pool_start(rdev);</div><div class='add'>+	if (r)</div><div class='ctx'> 		return r;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_pool_start(rdev);</div><div class='add'>+	r = radeon_ib_ring_tests(rdev);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='add'>+	r = r600_audio_init(rdev);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed testing IB (%d).\n", r);</div><div class='del'>-		rdev-&gt;accel_working = false;</div><div class='add'>+		dev_err(rdev-&gt;dev, "failed initializing audio\n");</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c<br/>index d8d78fe17946..7f08cedb5333 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rv515.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/rv515.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rv515.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rv515.c</a></div><div class='hunk'>@@ -412,12 +412,10 @@ static int rv515_startup(struct radeon_device *rdev)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "failed testing IB (%d).\n", r);</div><div class='del'>-		rdev-&gt;accel_working = false;</div><div class='add'>+	r = radeon_ib_ring_tests(rdev);</div><div class='add'>+	if (r)</div><div class='ctx'> 		return r;</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c<br/>index cdab1aeaed6e..4ad0281fdc37 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rv770.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/rv770.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rv770.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rv770.c</a></div><div class='hunk'>@@ -151,6 +151,8 @@ int rv770_pcie_gart_enable(struct radeon_device *rdev)</div><div class='ctx'> 	WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp);</div><div class='ctx'> 	WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp);</div><div class='ctx'> 	WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp);</div><div class='add'>+	if (rdev-&gt;family == CHIP_RV740)</div><div class='add'>+		WREG32(MC_VM_MD_L1_TLB3_CNTL, tmp);</div><div class='ctx'> 	WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp);</div><div class='ctx'> 	WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp);</div><div class='ctx'> 	WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);</div><div class='hunk'>@@ -363,180 +365,6 @@ void r700_cp_fini(struct radeon_device *rdev)</div><div class='ctx'> /*</div><div class='ctx'>  * Core functions</div><div class='ctx'>  */</div><div class='del'>-static u32 r700_get_tile_pipe_to_backend_map(struct radeon_device *rdev,</div><div class='del'>-					     u32 num_tile_pipes,</div><div class='del'>-					     u32 num_backends,</div><div class='del'>-					     u32 backend_disable_mask)</div><div class='del'>-{</div><div class='del'>-	u32 backend_map = 0;</div><div class='del'>-	u32 enabled_backends_mask;</div><div class='del'>-	u32 enabled_backends_count;</div><div class='del'>-	u32 cur_pipe;</div><div class='del'>-	u32 swizzle_pipe[R7XX_MAX_PIPES];</div><div class='del'>-	u32 cur_backend;</div><div class='del'>-	u32 i;</div><div class='del'>-	bool force_no_swizzle;</div><div class='del'>-</div><div class='del'>-	if (num_tile_pipes &gt; R7XX_MAX_PIPES)</div><div class='del'>-		num_tile_pipes = R7XX_MAX_PIPES;</div><div class='del'>-	if (num_tile_pipes &lt; 1)</div><div class='del'>-		num_tile_pipes = 1;</div><div class='del'>-	if (num_backends &gt; R7XX_MAX_BACKENDS)</div><div class='del'>-		num_backends = R7XX_MAX_BACKENDS;</div><div class='del'>-	if (num_backends &lt; 1)</div><div class='del'>-		num_backends = 1;</div><div class='del'>-</div><div class='del'>-	enabled_backends_mask = 0;</div><div class='del'>-	enabled_backends_count = 0;</div><div class='del'>-	for (i = 0; i &lt; R7XX_MAX_BACKENDS; ++i) {</div><div class='del'>-		if (((backend_disable_mask &gt;&gt; i) &amp; 1) == 0) {</div><div class='del'>-			enabled_backends_mask |= (1 &lt;&lt; i);</div><div class='del'>-			++enabled_backends_count;</div><div class='del'>-		}</div><div class='del'>-		if (enabled_backends_count == num_backends)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (enabled_backends_count == 0) {</div><div class='del'>-		enabled_backends_mask = 1;</div><div class='del'>-		enabled_backends_count = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (enabled_backends_count != num_backends)</div><div class='del'>-		num_backends = enabled_backends_count;</div><div class='del'>-</div><div class='del'>-	switch (rdev-&gt;family) {</div><div class='del'>-	case CHIP_RV770:</div><div class='del'>-	case CHIP_RV730:</div><div class='del'>-		force_no_swizzle = false;</div><div class='del'>-		break;</div><div class='del'>-	case CHIP_RV710:</div><div class='del'>-	case CHIP_RV740:</div><div class='del'>-	default:</div><div class='del'>-		force_no_swizzle = true;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset((uint8_t *)&amp;swizzle_pipe[0], 0, sizeof(u32) * R7XX_MAX_PIPES);</div><div class='del'>-	switch (num_tile_pipes) {</div><div class='del'>-	case 1:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		swizzle_pipe[1] = 1;</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 1;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 3;</div><div class='del'>-			swizzle_pipe[3] = 1;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 5:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-			swizzle_pipe[4] = 4;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 4;</div><div class='del'>-			swizzle_pipe[3] = 1;</div><div class='del'>-			swizzle_pipe[4] = 3;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 6:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-			swizzle_pipe[4] = 4;</div><div class='del'>-			swizzle_pipe[5] = 5;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 4;</div><div class='del'>-			swizzle_pipe[3] = 5;</div><div class='del'>-			swizzle_pipe[4] = 3;</div><div class='del'>-			swizzle_pipe[5] = 1;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 7:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-			swizzle_pipe[4] = 4;</div><div class='del'>-			swizzle_pipe[5] = 5;</div><div class='del'>-			swizzle_pipe[6] = 6;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 4;</div><div class='del'>-			swizzle_pipe[3] = 6;</div><div class='del'>-			swizzle_pipe[4] = 3;</div><div class='del'>-			swizzle_pipe[5] = 1;</div><div class='del'>-			swizzle_pipe[6] = 5;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 8:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-			swizzle_pipe[4] = 4;</div><div class='del'>-			swizzle_pipe[5] = 5;</div><div class='del'>-			swizzle_pipe[6] = 6;</div><div class='del'>-			swizzle_pipe[7] = 7;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 4;</div><div class='del'>-			swizzle_pipe[3] = 6;</div><div class='del'>-			swizzle_pipe[4] = 3;</div><div class='del'>-			swizzle_pipe[5] = 1;</div><div class='del'>-			swizzle_pipe[6] = 7;</div><div class='del'>-			swizzle_pipe[7] = 5;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cur_backend = 0;</div><div class='del'>-	for (cur_pipe = 0; cur_pipe &lt; num_tile_pipes; ++cur_pipe) {</div><div class='del'>-		while (((1 &lt;&lt; cur_backend) &amp; enabled_backends_mask) == 0)</div><div class='del'>-			cur_backend = (cur_backend + 1) % R7XX_MAX_BACKENDS;</div><div class='del'>-</div><div class='del'>-		backend_map |= (u32)(((cur_backend &amp; 3) &lt;&lt; (swizzle_pipe[cur_pipe] * 2)));</div><div class='del'>-</div><div class='del'>-		cur_backend = (cur_backend + 1) % R7XX_MAX_BACKENDS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return backend_map;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void rv770_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	int i, j, num_qd_pipes;</div><div class='hunk'>@@ -552,14 +380,17 @@ static void rv770_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	u32 sq_thread_resource_mgmt;</div><div class='ctx'> 	u32 hdp_host_path_cntl;</div><div class='ctx'> 	u32 sq_dyn_gpr_size_simd_ab_0;</div><div class='del'>-	u32 backend_map;</div><div class='ctx'> 	u32 gb_tiling_config = 0;</div><div class='ctx'> 	u32 cc_rb_backend_disable = 0;</div><div class='ctx'> 	u32 cc_gc_shader_pipe_config = 0;</div><div class='ctx'> 	u32 mc_arb_ramcfg;</div><div class='del'>-	u32 db_debug4;</div><div class='add'>+	u32 db_debug4, tmp;</div><div class='add'>+	u32 inactive_pipes, shader_pipe_config;</div><div class='add'>+	u32 disabled_rb_mask;</div><div class='add'>+	unsigned active_number;</div><div class='ctx'> </div><div class='ctx'> 	/* setup chip specs */</div><div class='add'>+	rdev-&gt;config.rv770.tiling_group_size = 256;</div><div class='ctx'> 	switch (rdev-&gt;family) {</div><div class='ctx'> 	case CHIP_RV770:</div><div class='ctx'> 		rdev-&gt;config.rv770.max_pipes = 4;</div><div class='hunk'>@@ -670,33 +501,70 @@ static void rv770_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	/* setup tiling, simd, pipe config */</div><div class='ctx'> 	mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG);</div><div class='ctx'> </div><div class='add'>+	shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG);</div><div class='add'>+	inactive_pipes = (shader_pipe_config &amp; INACTIVE_QD_PIPES_MASK) &gt;&gt; INACTIVE_QD_PIPES_SHIFT;</div><div class='add'>+	for (i = 0, tmp = 1, active_number = 0; i &lt; R7XX_MAX_PIPES; i++) {</div><div class='add'>+		if (!(inactive_pipes &amp; tmp)) {</div><div class='add'>+			active_number++;</div><div class='add'>+		}</div><div class='add'>+		tmp &lt;&lt;= 1;</div><div class='add'>+	}</div><div class='add'>+	if (active_number == 1) {</div><div class='add'>+		WREG32(SPI_CONFIG_CNTL, DISABLE_INTERP_1);</div><div class='add'>+	} else {</div><div class='add'>+		WREG32(SPI_CONFIG_CNTL, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE) &amp; 0x00ff0000;</div><div class='add'>+	tmp = R7XX_MAX_BACKENDS - r600_count_pipe_bits(cc_rb_backend_disable &gt;&gt; 16);</div><div class='add'>+	if (tmp &lt; rdev-&gt;config.rv770.max_backends) {</div><div class='add'>+		rdev-&gt;config.rv770.max_backends = tmp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) &amp; 0xffffff00;</div><div class='add'>+	tmp = R7XX_MAX_PIPES - r600_count_pipe_bits((cc_gc_shader_pipe_config &gt;&gt; 8) &amp; R7XX_MAX_PIPES_MASK);</div><div class='add'>+	if (tmp &lt; rdev-&gt;config.rv770.max_pipes) {</div><div class='add'>+		rdev-&gt;config.rv770.max_pipes = tmp;</div><div class='add'>+	}</div><div class='add'>+	tmp = R7XX_MAX_SIMDS - r600_count_pipe_bits((cc_gc_shader_pipe_config &gt;&gt; 16) &amp; R7XX_MAX_SIMDS_MASK);</div><div class='add'>+	if (tmp &lt; rdev-&gt;config.rv770.max_simds) {</div><div class='add'>+		rdev-&gt;config.rv770.max_simds = tmp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (rdev-&gt;config.rv770.max_tile_pipes) {</div><div class='ctx'> 	case 1:</div><div class='ctx'> 	default:</div><div class='del'>-		gb_tiling_config |= PIPE_TILING(0);</div><div class='add'>+		gb_tiling_config = PIPE_TILING(0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='del'>-		gb_tiling_config |= PIPE_TILING(1);</div><div class='add'>+		gb_tiling_config = PIPE_TILING(1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 4:</div><div class='del'>-		gb_tiling_config |= PIPE_TILING(2);</div><div class='add'>+		gb_tiling_config = PIPE_TILING(2);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 8:</div><div class='del'>-		gb_tiling_config |= PIPE_TILING(3);</div><div class='add'>+		gb_tiling_config = PIPE_TILING(3);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	rdev-&gt;config.rv770.tiling_npipes = rdev-&gt;config.rv770.max_tile_pipes;</div><div class='ctx'> </div><div class='add'>+	disabled_rb_mask = (RREG32(CC_RB_BACKEND_DISABLE) &gt;&gt; 16) &amp; R7XX_MAX_BACKENDS_MASK;</div><div class='add'>+	tmp = (gb_tiling_config &amp; PIPE_TILING__MASK) &gt;&gt; PIPE_TILING__SHIFT;</div><div class='add'>+	tmp = r6xx_remap_render_backend(rdev, tmp, rdev-&gt;config.rv770.max_backends,</div><div class='add'>+					R7XX_MAX_BACKENDS, disabled_rb_mask);</div><div class='add'>+	gb_tiling_config |= tmp &lt;&lt; 16;</div><div class='add'>+	rdev-&gt;config.rv770.backend_map = tmp;</div><div class='add'>+</div><div class='ctx'> 	if (rdev-&gt;family == CHIP_RV770)</div><div class='ctx'> 		gb_tiling_config |= BANK_TILING(1);</div><div class='del'>-	else</div><div class='del'>-		gb_tiling_config |= BANK_TILING((mc_arb_ramcfg &amp; NOOFBANK_MASK) &gt;&gt; NOOFBANK_SHIFT);</div><div class='add'>+	else {</div><div class='add'>+		if ((mc_arb_ramcfg &amp; NOOFBANK_MASK) &gt;&gt; NOOFBANK_SHIFT)</div><div class='add'>+			gb_tiling_config |= BANK_TILING(1);</div><div class='add'>+		else</div><div class='add'>+			gb_tiling_config |= BANK_TILING(0);</div><div class='add'>+	}</div><div class='ctx'> 	rdev-&gt;config.rv770.tiling_nbanks = 4 &lt;&lt; ((gb_tiling_config &gt;&gt; 4) &amp; 0x3);</div><div class='ctx'> 	gb_tiling_config |= GROUP_SIZE((mc_arb_ramcfg &amp; BURSTLENGTH_MASK) &gt;&gt; BURSTLENGTH_SHIFT);</div><div class='del'>-	if ((mc_arb_ramcfg &amp; BURSTLENGTH_MASK) &gt;&gt; BURSTLENGTH_SHIFT)</div><div class='del'>-		rdev-&gt;config.rv770.tiling_group_size = 512;</div><div class='del'>-	else</div><div class='del'>-		rdev-&gt;config.rv770.tiling_group_size = 256;</div><div class='ctx'> 	if (((mc_arb_ramcfg &amp; NOOFROWS_MASK) &gt;&gt; NOOFROWS_SHIFT) &gt; 3) {</div><div class='ctx'> 		gb_tiling_config |= ROW_TILING(3);</div><div class='ctx'> 		gb_tiling_config |= SAMPLE_SPLIT(3);</div><div class='hunk'>@@ -708,47 +576,19 @@ static void rv770_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	gb_tiling_config |= BANK_SWAPS(1);</div><div class='del'>-</div><div class='del'>-	cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE) &amp; 0x00ff0000;</div><div class='del'>-	cc_rb_backend_disable |=</div><div class='del'>-		BACKEND_DISABLE((R7XX_MAX_BACKENDS_MASK &lt;&lt; rdev-&gt;config.rv770.max_backends) &amp; R7XX_MAX_BACKENDS_MASK);</div><div class='del'>-</div><div class='del'>-	cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) &amp; 0xffffff00;</div><div class='del'>-	cc_gc_shader_pipe_config |=</div><div class='del'>-		INACTIVE_QD_PIPES((R7XX_MAX_PIPES_MASK &lt;&lt; rdev-&gt;config.rv770.max_pipes) &amp; R7XX_MAX_PIPES_MASK);</div><div class='del'>-	cc_gc_shader_pipe_config |=</div><div class='del'>-		INACTIVE_SIMDS((R7XX_MAX_SIMDS_MASK &lt;&lt; rdev-&gt;config.rv770.max_simds) &amp; R7XX_MAX_SIMDS_MASK);</div><div class='del'>-</div><div class='del'>-	if (rdev-&gt;family == CHIP_RV740)</div><div class='del'>-		backend_map = 0x28;</div><div class='del'>-	else</div><div class='del'>-		backend_map = r700_get_tile_pipe_to_backend_map(rdev,</div><div class='del'>-								rdev-&gt;config.rv770.max_tile_pipes,</div><div class='del'>-								(R7XX_MAX_BACKENDS -</div><div class='del'>-								 r600_count_pipe_bits((cc_rb_backend_disable &amp;</div><div class='del'>-										       R7XX_MAX_BACKENDS_MASK) &gt;&gt; 16)),</div><div class='del'>-								(cc_rb_backend_disable &gt;&gt; 16));</div><div class='del'>-</div><div class='ctx'> 	rdev-&gt;config.rv770.tile_config = gb_tiling_config;</div><div class='del'>-	rdev-&gt;config.rv770.backend_map = backend_map;</div><div class='del'>-	gb_tiling_config |= BACKEND_MAP(backend_map);</div><div class='ctx'> </div><div class='ctx'> 	WREG32(GB_TILING_CONFIG, gb_tiling_config);</div><div class='ctx'> 	WREG32(DCP_TILING_CONFIG, (gb_tiling_config &amp; 0xffff));</div><div class='ctx'> 	WREG32(HDP_TILING_CONFIG, (gb_tiling_config &amp; 0xffff));</div><div class='ctx'> </div><div class='del'>-	WREG32(CC_RB_BACKEND_DISABLE,      cc_rb_backend_disable);</div><div class='del'>-	WREG32(CC_GC_SHADER_PIPE_CONFIG,   cc_gc_shader_pipe_config);</div><div class='del'>-	WREG32(GC_USER_SHADER_PIPE_CONFIG, cc_gc_shader_pipe_config);</div><div class='del'>-	WREG32(CC_SYS_RB_BACKEND_DISABLE,  cc_rb_backend_disable);</div><div class='del'>-</div><div class='ctx'> 	WREG32(CGTS_SYS_TCC_DISABLE, 0);</div><div class='ctx'> 	WREG32(CGTS_TCC_DISABLE, 0);</div><div class='ctx'> 	WREG32(CGTS_USER_SYS_TCC_DISABLE, 0);</div><div class='ctx'> 	WREG32(CGTS_USER_TCC_DISABLE, 0);</div><div class='ctx'> </div><div class='del'>-	num_qd_pipes =</div><div class='del'>-		R7XX_MAX_PIPES - r600_count_pipe_bits((cc_gc_shader_pipe_config &amp; INACTIVE_QD_PIPES_MASK) &gt;&gt; 8);</div><div class='add'>+</div><div class='add'>+	num_qd_pipes = R7XX_MAX_PIPES - r600_count_pipe_bits((cc_gc_shader_pipe_config &amp; INACTIVE_QD_PIPES_MASK) &gt;&gt; 8);</div><div class='ctx'> 	WREG32(VGT_OUT_DEALLOC_CNTL, (num_qd_pipes * 4) &amp; DEALLOC_DIST_MASK);</div><div class='ctx'> 	WREG32(VGT_VERTEX_REUSE_BLOCK_CNTL, ((num_qd_pipes * 4) - 2) &amp; VTX_REUSE_DEPTH_MASK);</div><div class='ctx'> </div><div class='hunk'>@@ -809,8 +649,6 @@ static void rv770_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> </div><div class='ctx'> 	WREG32(VGT_NUM_INSTANCES, 1);</div><div class='ctx'> </div><div class='del'>-	WREG32(SPI_CONFIG_CNTL, GPR_WRITE_PRIORITY(0));</div><div class='del'>-</div><div class='ctx'> 	WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4));</div><div class='ctx'> </div><div class='ctx'> 	WREG32(CP_PERFMON_CNTL, 0);</div><div class='hunk'>@@ -1114,10 +952,13 @@ static int rv770_startup(struct radeon_device *rdev)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX]);</div><div class='add'>+	r = radeon_ib_ring_tests(rdev);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	r = r600_audio_init(rdev);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "IB test failed (%d).\n", r);</div><div class='del'>-		rdev-&gt;accel_working = false;</div><div class='add'>+		DRM_ERROR("radeon: audio init failed\n");</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1143,12 +984,6 @@ int rv770_resume(struct radeon_device *rdev)</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	r = r600_audio_init(rdev);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "radeon: audio init failed\n");</div><div class='del'>-		return r;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return r;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -1178,10 +1013,6 @@ int rv770_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	/* This don't do much */</div><div class='del'>-	r = radeon_gem_init(rdev);</div><div class='del'>-	if (r)</div><div class='del'>-		return r;</div><div class='ctx'> 	/* Read BIOS */</div><div class='ctx'> 	if (!radeon_get_bios(rdev)) {</div><div class='ctx'> 		if (ASIC_IS_AVIVO(rdev))</div><div class='hunk'>@@ -1261,12 +1092,6 @@ int rv770_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;accel_working = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	r = r600_audio_init(rdev);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_err(rdev-&gt;dev, "radeon: audio init failed\n");</div><div class='del'>-		return r;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1281,7 +1106,6 @@ void rv770_fini(struct radeon_device *rdev)</div><div class='ctx'> 	rv770_pcie_gart_fini(rdev);</div><div class='ctx'> 	r600_vram_scratch_fini(rdev);</div><div class='ctx'> 	radeon_gem_fini(rdev);</div><div class='del'>-	radeon_semaphore_driver_fini(rdev);</div><div class='ctx'> 	radeon_fence_driver_fini(rdev);</div><div class='ctx'> 	radeon_agp_fini(rdev);</div><div class='ctx'> 	radeon_bo_fini(rdev);</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h<br/>index 79fa588e9ed5..fdc089896011 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rv770d.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/rv770d.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/rv770d.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/rv770d.h</a></div><div class='hunk'>@@ -106,10 +106,13 @@</div><div class='ctx'> #define		BACKEND_MAP(x)					((x) &lt;&lt; 16)</div><div class='ctx'> </div><div class='ctx'> #define GB_TILING_CONFIG				0x98F0</div><div class='add'>+#define     PIPE_TILING__SHIFT              1</div><div class='add'>+#define     PIPE_TILING__MASK               0x0000000e</div><div class='ctx'> </div><div class='ctx'> #define	GC_USER_SHADER_PIPE_CONFIG			0x8954</div><div class='ctx'> #define		INACTIVE_QD_PIPES(x)				((x) &lt;&lt; 8)</div><div class='ctx'> #define		INACTIVE_QD_PIPES_MASK				0x0000FF00</div><div class='add'>+#define		INACTIVE_QD_PIPES_SHIFT			    8</div><div class='ctx'> #define		INACTIVE_SIMDS(x)				((x) &lt;&lt; 16)</div><div class='ctx'> #define		INACTIVE_SIMDS_MASK				0x00FF0000</div><div class='ctx'> </div><div class='hunk'>@@ -174,6 +177,7 @@</div><div class='ctx'> #define	MC_VM_MD_L1_TLB0_CNTL				0x2654</div><div class='ctx'> #define	MC_VM_MD_L1_TLB1_CNTL				0x2658</div><div class='ctx'> #define	MC_VM_MD_L1_TLB2_CNTL				0x265C</div><div class='add'>+#define	MC_VM_MD_L1_TLB3_CNTL				0x2698</div><div class='ctx'> #define	MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR		0x203C</div><div class='ctx'> #define	MC_VM_SYSTEM_APERTURE_HIGH_ADDR			0x2038</div><div class='ctx'> #define	MC_VM_SYSTEM_APERTURE_LOW_ADDR			0x2034</div><div class='hunk'>@@ -353,6 +357,197 @@</div><div class='ctx'> </div><div class='ctx'> #define	SRBM_STATUS				        0x0E50</div><div class='ctx'> </div><div class='add'>+/* DCE 3.2 HDMI */</div><div class='add'>+#define HDMI_CONTROL                         0x7400</div><div class='add'>+#       define HDMI_KEEPOUT_MODE             (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_PACKET_GEN_VERSION       (1 &lt;&lt; 4) /* 0 = r6xx compat */</div><div class='add'>+#       define HDMI_ERROR_ACK                (1 &lt;&lt; 8)</div><div class='add'>+#       define HDMI_ERROR_MASK               (1 &lt;&lt; 9)</div><div class='add'>+#define HDMI_STATUS                          0x7404</div><div class='add'>+#       define HDMI_ACTIVE_AVMUTE            (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_AUDIO_PACKET_ERROR       (1 &lt;&lt; 16)</div><div class='add'>+#       define HDMI_VBI_PACKET_ERROR         (1 &lt;&lt; 20)</div><div class='add'>+#define HDMI_AUDIO_PACKET_CONTROL            0x7408</div><div class='add'>+#       define HDMI_AUDIO_DELAY_EN(x)        (((x) &amp; 3) &lt;&lt; 4)</div><div class='add'>+#       define HDMI_AUDIO_PACKETS_PER_LINE(x)  (((x) &amp; 0x1f) &lt;&lt; 16)</div><div class='add'>+#define HDMI_ACR_PACKET_CONTROL              0x740c</div><div class='add'>+#       define HDMI_ACR_SEND                 (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_ACR_CONT                 (1 &lt;&lt; 1)</div><div class='add'>+#       define HDMI_ACR_SELECT(x)            (((x) &amp; 3) &lt;&lt; 4)</div><div class='add'>+#       define HDMI_ACR_HW                   0</div><div class='add'>+#       define HDMI_ACR_32                   1</div><div class='add'>+#       define HDMI_ACR_44                   2</div><div class='add'>+#       define HDMI_ACR_48                   3</div><div class='add'>+#       define HDMI_ACR_SOURCE               (1 &lt;&lt; 8) /* 0 - hw; 1 - cts value */</div><div class='add'>+#       define HDMI_ACR_AUTO_SEND            (1 &lt;&lt; 12)</div><div class='add'>+#define HDMI_VBI_PACKET_CONTROL              0x7410</div><div class='add'>+#       define HDMI_NULL_SEND                (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_GC_SEND                  (1 &lt;&lt; 4)</div><div class='add'>+#       define HDMI_GC_CONT                  (1 &lt;&lt; 5) /* 0 - once; 1 - every frame */</div><div class='add'>+#define HDMI_INFOFRAME_CONTROL0              0x7414</div><div class='add'>+#       define HDMI_AVI_INFO_SEND            (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_AVI_INFO_CONT            (1 &lt;&lt; 1)</div><div class='add'>+#       define HDMI_AUDIO_INFO_SEND          (1 &lt;&lt; 4)</div><div class='add'>+#       define HDMI_AUDIO_INFO_CONT          (1 &lt;&lt; 5)</div><div class='add'>+#       define HDMI_MPEG_INFO_SEND           (1 &lt;&lt; 8)</div><div class='add'>+#       define HDMI_MPEG_INFO_CONT           (1 &lt;&lt; 9)</div><div class='add'>+#define HDMI_INFOFRAME_CONTROL1              0x7418</div><div class='add'>+#       define HDMI_AVI_INFO_LINE(x)         (((x) &amp; 0x3f) &lt;&lt; 0)</div><div class='add'>+#       define HDMI_AUDIO_INFO_LINE(x)       (((x) &amp; 0x3f) &lt;&lt; 8)</div><div class='add'>+#       define HDMI_MPEG_INFO_LINE(x)        (((x) &amp; 0x3f) &lt;&lt; 16)</div><div class='add'>+#define HDMI_GENERIC_PACKET_CONTROL          0x741c</div><div class='add'>+#       define HDMI_GENERIC0_SEND            (1 &lt;&lt; 0)</div><div class='add'>+#       define HDMI_GENERIC0_CONT            (1 &lt;&lt; 1)</div><div class='add'>+#       define HDMI_GENERIC1_SEND            (1 &lt;&lt; 4)</div><div class='add'>+#       define HDMI_GENERIC1_CONT            (1 &lt;&lt; 5)</div><div class='add'>+#       define HDMI_GENERIC0_LINE(x)         (((x) &amp; 0x3f) &lt;&lt; 16)</div><div class='add'>+#       define HDMI_GENERIC1_LINE(x)         (((x) &amp; 0x3f) &lt;&lt; 24)</div><div class='add'>+#define HDMI_GC                              0x7428</div><div class='add'>+#       define HDMI_GC_AVMUTE                (1 &lt;&lt; 0)</div><div class='add'>+#define AFMT_AUDIO_PACKET_CONTROL2           0x742c</div><div class='add'>+#       define AFMT_AUDIO_LAYOUT_OVRD        (1 &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AUDIO_LAYOUT_SELECT      (1 &lt;&lt; 1)</div><div class='add'>+#       define AFMT_60958_CS_SOURCE          (1 &lt;&lt; 4)</div><div class='add'>+#       define AFMT_AUDIO_CHANNEL_ENABLE(x)  (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_DP_AUDIO_STREAM_ID(x)    (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='add'>+#define AFMT_AVI_INFO0                       0x7454</div><div class='add'>+#       define AFMT_AVI_INFO_CHECKSUM(x)     (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AVI_INFO_S(x)            (((x) &amp; 3) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_AVI_INFO_B(x)            (((x) &amp; 3) &lt;&lt; 10)</div><div class='add'>+#       define AFMT_AVI_INFO_A(x)            (((x) &amp; 1) &lt;&lt; 12)</div><div class='add'>+#       define AFMT_AVI_INFO_Y(x)            (((x) &amp; 3) &lt;&lt; 13)</div><div class='add'>+#       define AFMT_AVI_INFO_Y_RGB           0</div><div class='add'>+#       define AFMT_AVI_INFO_Y_YCBCR422      1</div><div class='add'>+#       define AFMT_AVI_INFO_Y_YCBCR444      2</div><div class='add'>+#       define AFMT_AVI_INFO_Y_A_B_S(x)      (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_AVI_INFO_R(x)            (((x) &amp; 0xf) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_AVI_INFO_M(x)            (((x) &amp; 0x3) &lt;&lt; 20)</div><div class='add'>+#       define AFMT_AVI_INFO_C(x)            (((x) &amp; 0x3) &lt;&lt; 22)</div><div class='add'>+#       define AFMT_AVI_INFO_C_M_R(x)        (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_AVI_INFO_SC(x)           (((x) &amp; 0x3) &lt;&lt; 24)</div><div class='add'>+#       define AFMT_AVI_INFO_Q(x)            (((x) &amp; 0x3) &lt;&lt; 26)</div><div class='add'>+#       define AFMT_AVI_INFO_EC(x)           (((x) &amp; 0x3) &lt;&lt; 28)</div><div class='add'>+#       define AFMT_AVI_INFO_ITC(x)          (((x) &amp; 0x1) &lt;&lt; 31)</div><div class='add'>+#       define AFMT_AVI_INFO_ITC_EC_Q_SC(x)  (((x) &amp; 0xff) &lt;&lt; 24)</div><div class='add'>+#define AFMT_AVI_INFO1                       0x7458</div><div class='add'>+#       define AFMT_AVI_INFO_VIC(x)          (((x) &amp; 0x7f) &lt;&lt; 0) /* don't use avi infoframe v1 */</div><div class='add'>+#       define AFMT_AVI_INFO_PR(x)           (((x) &amp; 0xf) &lt;&lt; 8) /* don't use avi infoframe v1 */</div><div class='add'>+#       define AFMT_AVI_INFO_TOP(x)          (((x) &amp; 0xffff) &lt;&lt; 16)</div><div class='add'>+#define AFMT_AVI_INFO2                       0x745c</div><div class='add'>+#       define AFMT_AVI_INFO_BOTTOM(x)       (((x) &amp; 0xffff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AVI_INFO_LEFT(x)         (((x) &amp; 0xffff) &lt;&lt; 16)</div><div class='add'>+#define AFMT_AVI_INFO3                       0x7460</div><div class='add'>+#       define AFMT_AVI_INFO_RIGHT(x)        (((x) &amp; 0xffff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AVI_INFO_VERSION(x)      (((x) &amp; 3) &lt;&lt; 24)</div><div class='add'>+#define AFMT_MPEG_INFO0                      0x7464</div><div class='add'>+#       define AFMT_MPEG_INFO_CHECKSUM(x)    (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_MPEG_INFO_MB0(x)         (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_MPEG_INFO_MB1(x)         (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_MPEG_INFO_MB2(x)         (((x) &amp; 0xff) &lt;&lt; 24)</div><div class='add'>+#define AFMT_MPEG_INFO1                      0x7468</div><div class='add'>+#       define AFMT_MPEG_INFO_MB3(x)         (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_MPEG_INFO_MF(x)          (((x) &amp; 3) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_MPEG_INFO_FR(x)          (((x) &amp; 1) &lt;&lt; 12)</div><div class='add'>+#define AFMT_GENERIC0_HDR                    0x746c</div><div class='add'>+#define AFMT_GENERIC0_0                      0x7470</div><div class='add'>+#define AFMT_GENERIC0_1                      0x7474</div><div class='add'>+#define AFMT_GENERIC0_2                      0x7478</div><div class='add'>+#define AFMT_GENERIC0_3                      0x747c</div><div class='add'>+#define AFMT_GENERIC0_4                      0x7480</div><div class='add'>+#define AFMT_GENERIC0_5                      0x7484</div><div class='add'>+#define AFMT_GENERIC0_6                      0x7488</div><div class='add'>+#define AFMT_GENERIC1_HDR                    0x748c</div><div class='add'>+#define AFMT_GENERIC1_0                      0x7490</div><div class='add'>+#define AFMT_GENERIC1_1                      0x7494</div><div class='add'>+#define AFMT_GENERIC1_2                      0x7498</div><div class='add'>+#define AFMT_GENERIC1_3                      0x749c</div><div class='add'>+#define AFMT_GENERIC1_4                      0x74a0</div><div class='add'>+#define AFMT_GENERIC1_5                      0x74a4</div><div class='add'>+#define AFMT_GENERIC1_6                      0x74a8</div><div class='add'>+#define HDMI_ACR_32_0                        0x74ac</div><div class='add'>+#       define HDMI_ACR_CTS_32(x)            (((x) &amp; 0xfffff) &lt;&lt; 12)</div><div class='add'>+#define HDMI_ACR_32_1                        0x74b0</div><div class='add'>+#       define HDMI_ACR_N_32(x)              (((x) &amp; 0xfffff) &lt;&lt; 0)</div><div class='add'>+#define HDMI_ACR_44_0                        0x74b4</div><div class='add'>+#       define HDMI_ACR_CTS_44(x)            (((x) &amp; 0xfffff) &lt;&lt; 12)</div><div class='add'>+#define HDMI_ACR_44_1                        0x74b8</div><div class='add'>+#       define HDMI_ACR_N_44(x)              (((x) &amp; 0xfffff) &lt;&lt; 0)</div><div class='add'>+#define HDMI_ACR_48_0                        0x74bc</div><div class='add'>+#       define HDMI_ACR_CTS_48(x)            (((x) &amp; 0xfffff) &lt;&lt; 12)</div><div class='add'>+#define HDMI_ACR_48_1                        0x74c0</div><div class='add'>+#       define HDMI_ACR_N_48(x)              (((x) &amp; 0xfffff) &lt;&lt; 0)</div><div class='add'>+#define HDMI_ACR_STATUS_0                    0x74c4</div><div class='add'>+#define HDMI_ACR_STATUS_1                    0x74c8</div><div class='add'>+#define AFMT_AUDIO_INFO0                     0x74cc</div><div class='add'>+#       define AFMT_AUDIO_INFO_CHECKSUM(x)   (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AUDIO_INFO_CC(x)         (((x) &amp; 7) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_AUDIO_INFO_CHECKSUM_OFFSET(x)   (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='add'>+#define AFMT_AUDIO_INFO1                     0x74d0</div><div class='add'>+#       define AFMT_AUDIO_INFO_CA(x)         (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AUDIO_INFO_LSV(x)        (((x) &amp; 0xf) &lt;&lt; 11)</div><div class='add'>+#       define AFMT_AUDIO_INFO_DM_INH(x)     (((x) &amp; 1) &lt;&lt; 15)</div><div class='add'>+#       define AFMT_AUDIO_INFO_DM_INH_LSV(x) (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#define AFMT_60958_0                         0x74d4</div><div class='add'>+#       define AFMT_60958_CS_A(x)            (((x) &amp; 1) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_60958_CS_B(x)            (((x) &amp; 1) &lt;&lt; 1)</div><div class='add'>+#       define AFMT_60958_CS_C(x)            (((x) &amp; 1) &lt;&lt; 2)</div><div class='add'>+#       define AFMT_60958_CS_D(x)            (((x) &amp; 3) &lt;&lt; 3)</div><div class='add'>+#       define AFMT_60958_CS_MODE(x)         (((x) &amp; 3) &lt;&lt; 6)</div><div class='add'>+#       define AFMT_60958_CS_CATEGORY_CODE(x)      (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_60958_CS_SOURCE_NUMBER(x)      (((x) &amp; 0xf) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_L(x)   (((x) &amp; 0xf) &lt;&lt; 20)</div><div class='add'>+#       define AFMT_60958_CS_SAMPLING_FREQUENCY(x) (((x) &amp; 0xf) &lt;&lt; 24)</div><div class='add'>+#       define AFMT_60958_CS_CLOCK_ACCURACY(x)     (((x) &amp; 3) &lt;&lt; 28)</div><div class='add'>+#define AFMT_60958_1                         0x74d8</div><div class='add'>+#       define AFMT_60958_CS_WORD_LENGTH(x)  (((x) &amp; 0xf) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_60958_CS_ORIGINAL_SAMPLING_FREQUENCY(x)   (((x) &amp; 0xf) &lt;&lt; 4)</div><div class='add'>+#       define AFMT_60958_CS_VALID_L(x)      (((x) &amp; 1) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_60958_CS_VALID_R(x)      (((x) &amp; 1) &lt;&lt; 18)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_R(x)   (((x) &amp; 0xf) &lt;&lt; 20)</div><div class='add'>+#define AFMT_AUDIO_CRC_CONTROL               0x74dc</div><div class='add'>+#       define AFMT_AUDIO_CRC_EN             (1 &lt;&lt; 0)</div><div class='add'>+#define AFMT_RAMP_CONTROL0                   0x74e0</div><div class='add'>+#       define AFMT_RAMP_MAX_COUNT(x)        (((x) &amp; 0xffffff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_RAMP_DATA_SIGN           (1 &lt;&lt; 31)</div><div class='add'>+#define AFMT_RAMP_CONTROL1                   0x74e4</div><div class='add'>+#       define AFMT_RAMP_MIN_COUNT(x)        (((x) &amp; 0xffffff) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AUDIO_TEST_CH_DISABLE(x) (((x) &amp; 0xff) &lt;&lt; 24)</div><div class='add'>+#define AFMT_RAMP_CONTROL2                   0x74e8</div><div class='add'>+#       define AFMT_RAMP_INC_COUNT(x)        (((x) &amp; 0xffffff) &lt;&lt; 0)</div><div class='add'>+#define AFMT_RAMP_CONTROL3                   0x74ec</div><div class='add'>+#       define AFMT_RAMP_DEC_COUNT(x)        (((x) &amp; 0xffffff) &lt;&lt; 0)</div><div class='add'>+#define AFMT_60958_2                         0x74f0</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_2(x)   (((x) &amp; 0xf) &lt;&lt; 0)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_3(x)   (((x) &amp; 0xf) &lt;&lt; 4)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_4(x)   (((x) &amp; 0xf) &lt;&lt; 8)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_5(x)   (((x) &amp; 0xf) &lt;&lt; 12)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_6(x)   (((x) &amp; 0xf) &lt;&lt; 16)</div><div class='add'>+#       define AFMT_60958_CS_CHANNEL_NUMBER_7(x)   (((x) &amp; 0xf) &lt;&lt; 20)</div><div class='add'>+#define AFMT_STATUS                          0x7600</div><div class='add'>+#       define AFMT_AUDIO_ENABLE             (1 &lt;&lt; 4)</div><div class='add'>+#       define AFMT_AZ_FORMAT_WTRIG          (1 &lt;&lt; 28)</div><div class='add'>+#       define AFMT_AZ_FORMAT_WTRIG_INT      (1 &lt;&lt; 29)</div><div class='add'>+#       define AFMT_AZ_AUDIO_ENABLE_CHG      (1 &lt;&lt; 30)</div><div class='add'>+#define AFMT_AUDIO_PACKET_CONTROL            0x7604</div><div class='add'>+#       define AFMT_AUDIO_SAMPLE_SEND        (1 &lt;&lt; 0)</div><div class='add'>+#       define AFMT_AUDIO_TEST_EN            (1 &lt;&lt; 12)</div><div class='add'>+#       define AFMT_AUDIO_CHANNEL_SWAP       (1 &lt;&lt; 24)</div><div class='add'>+#       define AFMT_60958_CS_UPDATE          (1 &lt;&lt; 26)</div><div class='add'>+#       define AFMT_AZ_AUDIO_ENABLE_CHG_MASK (1 &lt;&lt; 27)</div><div class='add'>+#       define AFMT_AZ_FORMAT_WTRIG_MASK     (1 &lt;&lt; 28)</div><div class='add'>+#       define AFMT_AZ_FORMAT_WTRIG_ACK      (1 &lt;&lt; 29)</div><div class='add'>+#       define AFMT_AZ_AUDIO_ENABLE_CHG_ACK  (1 &lt;&lt; 30)</div><div class='add'>+#define AFMT_VBI_PACKET_CONTROL              0x7608</div><div class='add'>+#       define AFMT_GENERIC0_UPDATE          (1 &lt;&lt; 2)</div><div class='add'>+#define AFMT_INFOFRAME_CONTROL0              0x760c</div><div class='add'>+#       define AFMT_AUDIO_INFO_SOURCE        (1 &lt;&lt; 6) /* 0 - sound block; 1 - hmdi regs */</div><div class='add'>+#       define AFMT_AUDIO_INFO_UPDATE        (1 &lt;&lt; 7)</div><div class='add'>+#       define AFMT_MPEG_INFO_UPDATE         (1 &lt;&lt; 10)</div><div class='add'>+#define AFMT_GENERIC0_7                      0x7610</div><div class='add'>+/* second instance starts at 0x7800 */</div><div class='add'>+#define HDMI_OFFSET0                      (0x7400 - 0x7400)</div><div class='add'>+#define HDMI_OFFSET1                      (0x7800 - 0x7400)</div><div class='add'>+</div><div class='ctx'> #define D1GRPH_PRIMARY_SURFACE_ADDRESS                    0x6110</div><div class='ctx'> #define D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH               0x6914</div><div class='ctx'> #define D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH               0x6114</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c<br/>index 27bda986fc2b..c7b61f16ecfd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/si.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/si.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/si.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/si.c</a></div><div class='hunk'>@@ -867,200 +867,6 @@ void dce6_bandwidth_update(struct radeon_device *rdev)</div><div class='ctx'> /*</div><div class='ctx'>  * Core functions</div><div class='ctx'>  */</div><div class='del'>-static u32 si_get_tile_pipe_to_backend_map(struct radeon_device *rdev,</div><div class='del'>-					   u32 num_tile_pipes,</div><div class='del'>-					   u32 num_backends_per_asic,</div><div class='del'>-					   u32 *backend_disable_mask_per_asic,</div><div class='del'>-					   u32 num_shader_engines)</div><div class='del'>-{</div><div class='del'>-	u32 backend_map = 0;</div><div class='del'>-	u32 enabled_backends_mask = 0;</div><div class='del'>-	u32 enabled_backends_count = 0;</div><div class='del'>-	u32 num_backends_per_se;</div><div class='del'>-	u32 cur_pipe;</div><div class='del'>-	u32 swizzle_pipe[SI_MAX_PIPES];</div><div class='del'>-	u32 cur_backend = 0;</div><div class='del'>-	u32 i;</div><div class='del'>-	bool force_no_swizzle;</div><div class='del'>-</div><div class='del'>-	/* force legal values */</div><div class='del'>-	if (num_tile_pipes &lt; 1)</div><div class='del'>-		num_tile_pipes = 1;</div><div class='del'>-	if (num_tile_pipes &gt; rdev-&gt;config.si.max_tile_pipes)</div><div class='del'>-		num_tile_pipes = rdev-&gt;config.si.max_tile_pipes;</div><div class='del'>-	if (num_shader_engines &lt; 1)</div><div class='del'>-		num_shader_engines = 1;</div><div class='del'>-	if (num_shader_engines &gt; rdev-&gt;config.si.max_shader_engines)</div><div class='del'>-		num_shader_engines = rdev-&gt;config.si.max_shader_engines;</div><div class='del'>-	if (num_backends_per_asic &lt; num_shader_engines)</div><div class='del'>-		num_backends_per_asic = num_shader_engines;</div><div class='del'>-	if (num_backends_per_asic &gt; (rdev-&gt;config.si.max_backends_per_se * num_shader_engines))</div><div class='del'>-		num_backends_per_asic = rdev-&gt;config.si.max_backends_per_se * num_shader_engines;</div><div class='del'>-</div><div class='del'>-	/* make sure we have the same number of backends per se */</div><div class='del'>-	num_backends_per_asic = ALIGN(num_backends_per_asic, num_shader_engines);</div><div class='del'>-	/* set up the number of backends per se */</div><div class='del'>-	num_backends_per_se = num_backends_per_asic / num_shader_engines;</div><div class='del'>-	if (num_backends_per_se &gt; rdev-&gt;config.si.max_backends_per_se) {</div><div class='del'>-		num_backends_per_se = rdev-&gt;config.si.max_backends_per_se;</div><div class='del'>-		num_backends_per_asic = num_backends_per_se * num_shader_engines;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* create enable mask and count for enabled backends */</div><div class='del'>-	for (i = 0; i &lt; SI_MAX_BACKENDS; ++i) {</div><div class='del'>-		if (((*backend_disable_mask_per_asic &gt;&gt; i) &amp; 1) == 0) {</div><div class='del'>-			enabled_backends_mask |= (1 &lt;&lt; i);</div><div class='del'>-			++enabled_backends_count;</div><div class='del'>-		}</div><div class='del'>-		if (enabled_backends_count == num_backends_per_asic)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* force the backends mask to match the current number of backends */</div><div class='del'>-	if (enabled_backends_count != num_backends_per_asic) {</div><div class='del'>-		u32 this_backend_enabled;</div><div class='del'>-		u32 shader_engine;</div><div class='del'>-		u32 backend_per_se;</div><div class='del'>-</div><div class='del'>-		enabled_backends_mask = 0;</div><div class='del'>-		enabled_backends_count = 0;</div><div class='del'>-		*backend_disable_mask_per_asic = SI_MAX_BACKENDS_MASK;</div><div class='del'>-		for (i = 0; i &lt; SI_MAX_BACKENDS; ++i) {</div><div class='del'>-			/* calc the current se */</div><div class='del'>-			shader_engine = i / rdev-&gt;config.si.max_backends_per_se;</div><div class='del'>-			/* calc the backend per se */</div><div class='del'>-			backend_per_se = i % rdev-&gt;config.si.max_backends_per_se;</div><div class='del'>-			/* default to not enabled */</div><div class='del'>-			this_backend_enabled = 0;</div><div class='del'>-			if ((shader_engine &lt; num_shader_engines) &amp;&amp;</div><div class='del'>-			    (backend_per_se &lt; num_backends_per_se))</div><div class='del'>-				this_backend_enabled = 1;</div><div class='del'>-			if (this_backend_enabled) {</div><div class='del'>-				enabled_backends_mask |= (1 &lt;&lt; i);</div><div class='del'>-				*backend_disable_mask_per_asic &amp;= ~(1 &lt;&lt; i);</div><div class='del'>-				++enabled_backends_count;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	memset((uint8_t *)&amp;swizzle_pipe[0], 0, sizeof(u32) * SI_MAX_PIPES);</div><div class='del'>-	switch (rdev-&gt;family) {</div><div class='del'>-	case CHIP_TAHITI:</div><div class='del'>-	case CHIP_PITCAIRN:</div><div class='del'>-	case CHIP_VERDE:</div><div class='del'>-		force_no_swizzle = true;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		force_no_swizzle = false;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	if (force_no_swizzle) {</div><div class='del'>-		bool last_backend_enabled = false;</div><div class='del'>-</div><div class='del'>-		force_no_swizzle = false;</div><div class='del'>-		for (i = 0; i &lt; SI_MAX_BACKENDS; ++i) {</div><div class='del'>-			if (((enabled_backends_mask &gt;&gt; i) &amp; 1) == 1) {</div><div class='del'>-				if (last_backend_enabled)</div><div class='del'>-					force_no_swizzle = true;</div><div class='del'>-				last_backend_enabled = true;</div><div class='del'>-			} else</div><div class='del'>-				last_backend_enabled = false;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (num_tile_pipes) {</div><div class='del'>-	case 1:</div><div class='del'>-	case 3:</div><div class='del'>-	case 5:</div><div class='del'>-	case 7:</div><div class='del'>-		DRM_ERROR("odd number of pipes!\n");</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		swizzle_pipe[0] = 0;</div><div class='del'>-		swizzle_pipe[1] = 1;</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 1;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 6:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-			swizzle_pipe[4] = 4;</div><div class='del'>-			swizzle_pipe[5] = 5;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 4;</div><div class='del'>-			swizzle_pipe[3] = 1;</div><div class='del'>-			swizzle_pipe[4] = 3;</div><div class='del'>-			swizzle_pipe[5] = 5;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 8:</div><div class='del'>-		if (force_no_swizzle) {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 1;</div><div class='del'>-			swizzle_pipe[2] = 2;</div><div class='del'>-			swizzle_pipe[3] = 3;</div><div class='del'>-			swizzle_pipe[4] = 4;</div><div class='del'>-			swizzle_pipe[5] = 5;</div><div class='del'>-			swizzle_pipe[6] = 6;</div><div class='del'>-			swizzle_pipe[7] = 7;</div><div class='del'>-		} else {</div><div class='del'>-			swizzle_pipe[0] = 0;</div><div class='del'>-			swizzle_pipe[1] = 2;</div><div class='del'>-			swizzle_pipe[2] = 4;</div><div class='del'>-			swizzle_pipe[3] = 6;</div><div class='del'>-			swizzle_pipe[4] = 1;</div><div class='del'>-			swizzle_pipe[5] = 3;</div><div class='del'>-			swizzle_pipe[6] = 5;</div><div class='del'>-			swizzle_pipe[7] = 7;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (cur_pipe = 0; cur_pipe &lt; num_tile_pipes; ++cur_pipe) {</div><div class='del'>-		while (((1 &lt;&lt; cur_backend) &amp; enabled_backends_mask) == 0)</div><div class='del'>-			cur_backend = (cur_backend + 1) % SI_MAX_BACKENDS;</div><div class='del'>-</div><div class='del'>-		backend_map |= (((cur_backend &amp; 0xf) &lt;&lt; (swizzle_pipe[cur_pipe] * 4)));</div><div class='del'>-</div><div class='del'>-		cur_backend = (cur_backend + 1) % SI_MAX_BACKENDS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return backend_map;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 si_get_disable_mask_per_asic(struct radeon_device *rdev,</div><div class='del'>-					u32 disable_mask_per_se,</div><div class='del'>-					u32 max_disable_mask_per_se,</div><div class='del'>-					u32 num_shader_engines)</div><div class='del'>-{</div><div class='del'>-	u32 disable_field_width_per_se = r600_count_pipe_bits(disable_mask_per_se);</div><div class='del'>-	u32 disable_mask_per_asic = disable_mask_per_se &amp; max_disable_mask_per_se;</div><div class='del'>-</div><div class='del'>-	if (num_shader_engines == 1)</div><div class='del'>-		return disable_mask_per_asic;</div><div class='del'>-	else if (num_shader_engines == 2)</div><div class='del'>-		return disable_mask_per_asic | (disable_mask_per_asic &lt;&lt; disable_field_width_per_se);</div><div class='del'>-	else</div><div class='del'>-		return 0xffffffff;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void si_tiling_mode_table_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	const u32 num_tile_mode_states = 32;</div><div class='hunk'>@@ -1562,18 +1368,151 @@ static void si_tiling_mode_table_init(struct radeon_device *rdev)</div><div class='ctx'> 		DRM_ERROR("unknown asic: 0x%x\n", rdev-&gt;family);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void si_select_se_sh(struct radeon_device *rdev,</div><div class='add'>+			    u32 se_num, u32 sh_num)</div><div class='add'>+{</div><div class='add'>+	u32 data = INSTANCE_BROADCAST_WRITES;</div><div class='add'>+</div><div class='add'>+	if ((se_num == 0xffffffff) &amp;&amp; (sh_num == 0xffffffff))</div><div class='add'>+		data = SH_BROADCAST_WRITES | SE_BROADCAST_WRITES;</div><div class='add'>+	else if (se_num == 0xffffffff)</div><div class='add'>+		data |= SE_BROADCAST_WRITES | SH_INDEX(sh_num);</div><div class='add'>+	else if (sh_num == 0xffffffff)</div><div class='add'>+		data |= SH_BROADCAST_WRITES | SE_INDEX(se_num);</div><div class='add'>+	else</div><div class='add'>+		data |= SH_INDEX(sh_num) | SE_INDEX(se_num);</div><div class='add'>+	WREG32(GRBM_GFX_INDEX, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 si_create_bitmask(u32 bit_width)</div><div class='add'>+{</div><div class='add'>+	u32 i, mask = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bit_width; i++) {</div><div class='add'>+		mask &lt;&lt;= 1;</div><div class='add'>+		mask |= 1;</div><div class='add'>+	}</div><div class='add'>+	return mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 si_get_cu_enabled(struct radeon_device *rdev, u32 cu_per_sh)</div><div class='add'>+{</div><div class='add'>+	u32 data, mask;</div><div class='add'>+</div><div class='add'>+	data = RREG32(CC_GC_SHADER_ARRAY_CONFIG);</div><div class='add'>+	if (data &amp; 1)</div><div class='add'>+		data &amp;= INACTIVE_CUS_MASK;</div><div class='add'>+	else</div><div class='add'>+		data = 0;</div><div class='add'>+	data |= RREG32(GC_USER_SHADER_ARRAY_CONFIG);</div><div class='add'>+</div><div class='add'>+	data &gt;&gt;= INACTIVE_CUS_SHIFT;</div><div class='add'>+</div><div class='add'>+	mask = si_create_bitmask(cu_per_sh);</div><div class='add'>+</div><div class='add'>+	return ~data &amp; mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void si_setup_spi(struct radeon_device *rdev,</div><div class='add'>+			 u32 se_num, u32 sh_per_se,</div><div class='add'>+			 u32 cu_per_sh)</div><div class='add'>+{</div><div class='add'>+	int i, j, k;</div><div class='add'>+	u32 data, mask, active_cu;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; se_num; i++) {</div><div class='add'>+		for (j = 0; j &lt; sh_per_se; j++) {</div><div class='add'>+			si_select_se_sh(rdev, i, j);</div><div class='add'>+			data = RREG32(SPI_STATIC_THREAD_MGMT_3);</div><div class='add'>+			active_cu = si_get_cu_enabled(rdev, cu_per_sh);</div><div class='add'>+</div><div class='add'>+			mask = 1;</div><div class='add'>+			for (k = 0; k &lt; 16; k++) {</div><div class='add'>+				mask &lt;&lt;= k;</div><div class='add'>+				if (active_cu &amp; mask) {</div><div class='add'>+					data &amp;= ~mask;</div><div class='add'>+					WREG32(SPI_STATIC_THREAD_MGMT_3, data);</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	si_select_se_sh(rdev, 0xffffffff, 0xffffffff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 si_get_rb_disabled(struct radeon_device *rdev,</div><div class='add'>+			      u32 max_rb_num, u32 se_num,</div><div class='add'>+			      u32 sh_per_se)</div><div class='add'>+{</div><div class='add'>+	u32 data, mask;</div><div class='add'>+</div><div class='add'>+	data = RREG32(CC_RB_BACKEND_DISABLE);</div><div class='add'>+	if (data &amp; 1)</div><div class='add'>+		data &amp;= BACKEND_DISABLE_MASK;</div><div class='add'>+	else</div><div class='add'>+		data = 0;</div><div class='add'>+	data |= RREG32(GC_USER_RB_BACKEND_DISABLE);</div><div class='add'>+</div><div class='add'>+	data &gt;&gt;= BACKEND_DISABLE_SHIFT;</div><div class='add'>+</div><div class='add'>+	mask = si_create_bitmask(max_rb_num / se_num / sh_per_se);</div><div class='add'>+</div><div class='add'>+	return data &amp; mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void si_setup_rb(struct radeon_device *rdev,</div><div class='add'>+			u32 se_num, u32 sh_per_se,</div><div class='add'>+			u32 max_rb_num)</div><div class='add'>+{</div><div class='add'>+	int i, j;</div><div class='add'>+	u32 data, mask;</div><div class='add'>+	u32 disabled_rbs = 0;</div><div class='add'>+	u32 enabled_rbs = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; se_num; i++) {</div><div class='add'>+		for (j = 0; j &lt; sh_per_se; j++) {</div><div class='add'>+			si_select_se_sh(rdev, i, j);</div><div class='add'>+			data = si_get_rb_disabled(rdev, max_rb_num, se_num, sh_per_se);</div><div class='add'>+			disabled_rbs |= data &lt;&lt; ((i * sh_per_se + j) * TAHITI_RB_BITMAP_WIDTH_PER_SH);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	si_select_se_sh(rdev, 0xffffffff, 0xffffffff);</div><div class='add'>+</div><div class='add'>+	mask = 1;</div><div class='add'>+	for (i = 0; i &lt; max_rb_num; i++) {</div><div class='add'>+		if (!(disabled_rbs &amp; mask))</div><div class='add'>+			enabled_rbs |= mask;</div><div class='add'>+		mask &lt;&lt;= 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; se_num; i++) {</div><div class='add'>+		si_select_se_sh(rdev, i, 0xffffffff);</div><div class='add'>+		data = 0;</div><div class='add'>+		for (j = 0; j &lt; sh_per_se; j++) {</div><div class='add'>+			switch (enabled_rbs &amp; 3) {</div><div class='add'>+			case 1:</div><div class='add'>+				data |= (RASTER_CONFIG_RB_MAP_0 &lt;&lt; (i * sh_per_se + j) * 2);</div><div class='add'>+				break;</div><div class='add'>+			case 2:</div><div class='add'>+				data |= (RASTER_CONFIG_RB_MAP_3 &lt;&lt; (i * sh_per_se + j) * 2);</div><div class='add'>+				break;</div><div class='add'>+			case 3:</div><div class='add'>+			default:</div><div class='add'>+				data |= (RASTER_CONFIG_RB_MAP_2 &lt;&lt; (i * sh_per_se + j) * 2);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			enabled_rbs &gt;&gt;= 2;</div><div class='add'>+		}</div><div class='add'>+		WREG32(PA_SC_RASTER_CONFIG, data);</div><div class='add'>+	}</div><div class='add'>+	si_select_se_sh(rdev, 0xffffffff, 0xffffffff);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void si_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> {</div><div class='del'>-	u32 cc_rb_backend_disable = 0;</div><div class='del'>-	u32 cc_gc_shader_array_config;</div><div class='ctx'> 	u32 gb_addr_config = 0;</div><div class='ctx'> 	u32 mc_shared_chmap, mc_arb_ramcfg;</div><div class='del'>-	u32 gb_backend_map;</div><div class='del'>-	u32 cgts_tcc_disable;</div><div class='ctx'> 	u32 sx_debug_1;</div><div class='del'>-	u32 gc_user_shader_array_config;</div><div class='del'>-	u32 gc_user_rb_backend_disable;</div><div class='del'>-	u32 cgts_user_tcc_disable;</div><div class='ctx'> 	u32 hdp_host_path_cntl;</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> 	int i, j;</div><div class='hunk'>@@ -1581,9 +1520,9 @@ static void si_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	switch (rdev-&gt;family) {</div><div class='ctx'> 	case CHIP_TAHITI:</div><div class='ctx'> 		rdev-&gt;config.si.max_shader_engines = 2;</div><div class='del'>-		rdev-&gt;config.si.max_pipes_per_simd = 4;</div><div class='ctx'> 		rdev-&gt;config.si.max_tile_pipes = 12;</div><div class='del'>-		rdev-&gt;config.si.max_simds_per_se = 8;</div><div class='add'>+		rdev-&gt;config.si.max_cu_per_sh = 8;</div><div class='add'>+		rdev-&gt;config.si.max_sh_per_se = 2;</div><div class='ctx'> 		rdev-&gt;config.si.max_backends_per_se = 4;</div><div class='ctx'> 		rdev-&gt;config.si.max_texture_channel_caches = 12;</div><div class='ctx'> 		rdev-&gt;config.si.max_gprs = 256;</div><div class='hunk'>@@ -1594,12 +1533,13 @@ static void si_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.si.sc_prim_fifo_size_backend = 0x100;</div><div class='ctx'> 		rdev-&gt;config.si.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.si.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CHIP_PITCAIRN:</div><div class='ctx'> 		rdev-&gt;config.si.max_shader_engines = 2;</div><div class='del'>-		rdev-&gt;config.si.max_pipes_per_simd = 4;</div><div class='ctx'> 		rdev-&gt;config.si.max_tile_pipes = 8;</div><div class='del'>-		rdev-&gt;config.si.max_simds_per_se = 5;</div><div class='add'>+		rdev-&gt;config.si.max_cu_per_sh = 5;</div><div class='add'>+		rdev-&gt;config.si.max_sh_per_se = 2;</div><div class='ctx'> 		rdev-&gt;config.si.max_backends_per_se = 4;</div><div class='ctx'> 		rdev-&gt;config.si.max_texture_channel_caches = 8;</div><div class='ctx'> 		rdev-&gt;config.si.max_gprs = 256;</div><div class='hunk'>@@ -1610,13 +1550,14 @@ static void si_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.si.sc_prim_fifo_size_backend = 0x100;</div><div class='ctx'> 		rdev-&gt;config.si.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.si.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CHIP_VERDE:</div><div class='ctx'> 	default:</div><div class='ctx'> 		rdev-&gt;config.si.max_shader_engines = 1;</div><div class='del'>-		rdev-&gt;config.si.max_pipes_per_simd = 4;</div><div class='ctx'> 		rdev-&gt;config.si.max_tile_pipes = 4;</div><div class='del'>-		rdev-&gt;config.si.max_simds_per_se = 2;</div><div class='add'>+		rdev-&gt;config.si.max_cu_per_sh = 2;</div><div class='add'>+		rdev-&gt;config.si.max_sh_per_se = 2;</div><div class='ctx'> 		rdev-&gt;config.si.max_backends_per_se = 4;</div><div class='ctx'> 		rdev-&gt;config.si.max_texture_channel_caches = 4;</div><div class='ctx'> 		rdev-&gt;config.si.max_gprs = 256;</div><div class='hunk'>@@ -1627,6 +1568,7 @@ static void si_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.si.sc_prim_fifo_size_backend = 0x40;</div><div class='ctx'> 		rdev-&gt;config.si.sc_hiz_tile_fifo_size = 0x30;</div><div class='ctx'> 		rdev-&gt;config.si.sc_earlyz_tile_fifo_size = 0x130;</div><div class='add'>+		gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1648,31 +1590,7 @@ static void si_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	mc_shared_chmap = RREG32(MC_SHARED_CHMAP);</div><div class='ctx'> 	mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG);</div><div class='ctx'> </div><div class='del'>-	cc_rb_backend_disable = RREG32(CC_RB_BACKEND_DISABLE);</div><div class='del'>-	cc_gc_shader_array_config = RREG32(CC_GC_SHADER_ARRAY_CONFIG);</div><div class='del'>-	cgts_tcc_disable = 0xffff0000;</div><div class='del'>-	for (i = 0; i &lt; rdev-&gt;config.si.max_texture_channel_caches; i++)</div><div class='del'>-		cgts_tcc_disable &amp;= ~(1 &lt;&lt; (16 + i));</div><div class='del'>-	gc_user_rb_backend_disable = RREG32(GC_USER_RB_BACKEND_DISABLE);</div><div class='del'>-	gc_user_shader_array_config = RREG32(GC_USER_SHADER_ARRAY_CONFIG);</div><div class='del'>-	cgts_user_tcc_disable = RREG32(CGTS_USER_TCC_DISABLE);</div><div class='del'>-</div><div class='del'>-	rdev-&gt;config.si.num_shader_engines = rdev-&gt;config.si.max_shader_engines;</div><div class='ctx'> 	rdev-&gt;config.si.num_tile_pipes = rdev-&gt;config.si.max_tile_pipes;</div><div class='del'>-	tmp = ((~gc_user_rb_backend_disable) &amp; BACKEND_DISABLE_MASK) &gt;&gt; BACKEND_DISABLE_SHIFT;</div><div class='del'>-	rdev-&gt;config.si.num_backends_per_se = r600_count_pipe_bits(tmp);</div><div class='del'>-	tmp = (gc_user_rb_backend_disable &amp; BACKEND_DISABLE_MASK) &gt;&gt; BACKEND_DISABLE_SHIFT;</div><div class='del'>-	rdev-&gt;config.si.backend_disable_mask_per_asic =</div><div class='del'>-		si_get_disable_mask_per_asic(rdev, tmp, SI_MAX_BACKENDS_PER_SE_MASK,</div><div class='del'>-					     rdev-&gt;config.si.num_shader_engines);</div><div class='del'>-	rdev-&gt;config.si.backend_map =</div><div class='del'>-		si_get_tile_pipe_to_backend_map(rdev, rdev-&gt;config.si.num_tile_pipes,</div><div class='del'>-						rdev-&gt;config.si.num_backends_per_se *</div><div class='del'>-						rdev-&gt;config.si.num_shader_engines,</div><div class='del'>-						&amp;rdev-&gt;config.si.backend_disable_mask_per_asic,</div><div class='del'>-						rdev-&gt;config.si.num_shader_engines);</div><div class='del'>-	tmp = ((~cgts_user_tcc_disable) &amp; TCC_DISABLE_MASK) &gt;&gt; TCC_DISABLE_SHIFT;</div><div class='del'>-	rdev-&gt;config.si.num_texture_channel_caches = r600_count_pipe_bits(tmp);</div><div class='ctx'> 	rdev-&gt;config.si.mem_max_burst_length_bytes = 256;</div><div class='ctx'> 	tmp = (mc_arb_ramcfg &amp; NOOFCOLS_MASK) &gt;&gt; NOOFCOLS_SHIFT;</div><div class='ctx'> 	rdev-&gt;config.si.mem_row_size_in_kb = (4 * (1 &lt;&lt; (8 + tmp))) / 1024;</div><div class='hunk'>@@ -1683,55 +1601,8 @@ static void si_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 	rdev-&gt;config.si.num_gpus = 1;</div><div class='ctx'> 	rdev-&gt;config.si.multi_gpu_tile_size = 64;</div><div class='ctx'> </div><div class='del'>-	gb_addr_config = 0;</div><div class='del'>-	switch (rdev-&gt;config.si.num_tile_pipes) {</div><div class='del'>-	case 1:</div><div class='del'>-		gb_addr_config |= NUM_PIPES(0);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		gb_addr_config |= NUM_PIPES(1);</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		gb_addr_config |= NUM_PIPES(2);</div><div class='del'>-		break;</div><div class='del'>-	case 8:</div><div class='del'>-	default:</div><div class='del'>-		gb_addr_config |= NUM_PIPES(3);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tmp = (rdev-&gt;config.si.mem_max_burst_length_bytes / 256) - 1;</div><div class='del'>-	gb_addr_config |= PIPE_INTERLEAVE_SIZE(tmp);</div><div class='del'>-	gb_addr_config |= NUM_SHADER_ENGINES(rdev-&gt;config.si.num_shader_engines - 1);</div><div class='del'>-	tmp = (rdev-&gt;config.si.shader_engine_tile_size / 16) - 1;</div><div class='del'>-	gb_addr_config |= SHADER_ENGINE_TILE_SIZE(tmp);</div><div class='del'>-	switch (rdev-&gt;config.si.num_gpus) {</div><div class='del'>-	case 1:</div><div class='del'>-	default:</div><div class='del'>-		gb_addr_config |= NUM_GPUS(0);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		gb_addr_config |= NUM_GPUS(1);</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		gb_addr_config |= NUM_GPUS(2);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	switch (rdev-&gt;config.si.multi_gpu_tile_size) {</div><div class='del'>-	case 16:</div><div class='del'>-		gb_addr_config |= MULTI_GPU_TILE_SIZE(0);</div><div class='del'>-		break;</div><div class='del'>-	case 32:</div><div class='del'>-	default:</div><div class='del'>-		gb_addr_config |= MULTI_GPU_TILE_SIZE(1);</div><div class='del'>-		break;</div><div class='del'>-	case 64:</div><div class='del'>-		gb_addr_config |= MULTI_GPU_TILE_SIZE(2);</div><div class='del'>-		break;</div><div class='del'>-	case 128:</div><div class='del'>-		gb_addr_config |= MULTI_GPU_TILE_SIZE(3);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	/* fix up row size */</div><div class='add'>+	gb_addr_config &amp;= ~ROW_SIZE_MASK;</div><div class='ctx'> 	switch (rdev-&gt;config.si.mem_row_size_in_kb) {</div><div class='ctx'> 	case 1:</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1745,26 +1616,6 @@ static void si_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tmp = (gb_addr_config &amp; NUM_PIPES_MASK) &gt;&gt; NUM_PIPES_SHIFT;</div><div class='del'>-	rdev-&gt;config.si.num_tile_pipes = (1 &lt;&lt; tmp);</div><div class='del'>-	tmp = (gb_addr_config &amp; PIPE_INTERLEAVE_SIZE_MASK) &gt;&gt; PIPE_INTERLEAVE_SIZE_SHIFT;</div><div class='del'>-	rdev-&gt;config.si.mem_max_burst_length_bytes = (tmp + 1) * 256;</div><div class='del'>-	tmp = (gb_addr_config &amp; NUM_SHADER_ENGINES_MASK) &gt;&gt; NUM_SHADER_ENGINES_SHIFT;</div><div class='del'>-	rdev-&gt;config.si.num_shader_engines = tmp + 1;</div><div class='del'>-	tmp = (gb_addr_config &amp; NUM_GPUS_MASK) &gt;&gt; NUM_GPUS_SHIFT;</div><div class='del'>-	rdev-&gt;config.si.num_gpus = tmp + 1;</div><div class='del'>-	tmp = (gb_addr_config &amp; MULTI_GPU_TILE_SIZE_MASK) &gt;&gt; MULTI_GPU_TILE_SIZE_SHIFT;</div><div class='del'>-	rdev-&gt;config.si.multi_gpu_tile_size = 1 &lt;&lt; tmp;</div><div class='del'>-	tmp = (gb_addr_config &amp; ROW_SIZE_MASK) &gt;&gt; ROW_SIZE_SHIFT;</div><div class='del'>-	rdev-&gt;config.si.mem_row_size_in_kb = 1 &lt;&lt; tmp;</div><div class='del'>-</div><div class='del'>-	gb_backend_map =</div><div class='del'>-		si_get_tile_pipe_to_backend_map(rdev, rdev-&gt;config.si.num_tile_pipes,</div><div class='del'>-						rdev-&gt;config.si.num_backends_per_se *</div><div class='del'>-						rdev-&gt;config.si.num_shader_engines,</div><div class='del'>-						&amp;rdev-&gt;config.si.backend_disable_mask_per_asic,</div><div class='del'>-						rdev-&gt;config.si.num_shader_engines);</div><div class='del'>-</div><div class='ctx'> 	/* setup tiling info dword.  gb_addr_config is not adequate since it does</div><div class='ctx'> 	 * not have bank info, so create a custom tiling dword.</div><div class='ctx'> 	 * bits 3:0   num_pipes</div><div class='hunk'>@@ -1789,33 +1640,29 @@ static void si_gpu_init(struct radeon_device *rdev)</div><div class='ctx'> 		rdev-&gt;config.si.tile_config |= (3 &lt;&lt; 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	rdev-&gt;config.si.tile_config |=</div><div class='del'>-		((mc_arb_ramcfg &amp; NOOFBANK_MASK) &gt;&gt; NOOFBANK_SHIFT) &lt;&lt; 4;</div><div class='add'>+	if ((mc_arb_ramcfg &amp; NOOFBANK_MASK) &gt;&gt; NOOFBANK_SHIFT)</div><div class='add'>+		rdev-&gt;config.si.tile_config |= 1 &lt;&lt; 4;</div><div class='add'>+	else</div><div class='add'>+		rdev-&gt;config.si.tile_config |= 0 &lt;&lt; 4;</div><div class='ctx'> 	rdev-&gt;config.si.tile_config |=</div><div class='ctx'> 		((gb_addr_config &amp; PIPE_INTERLEAVE_SIZE_MASK) &gt;&gt; PIPE_INTERLEAVE_SIZE_SHIFT) &lt;&lt; 8;</div><div class='ctx'> 	rdev-&gt;config.si.tile_config |=</div><div class='ctx'> 		((gb_addr_config &amp; ROW_SIZE_MASK) &gt;&gt; ROW_SIZE_SHIFT) &lt;&lt; 12;</div><div class='ctx'> </div><div class='del'>-	rdev-&gt;config.si.backend_map = gb_backend_map;</div><div class='ctx'> 	WREG32(GB_ADDR_CONFIG, gb_addr_config);</div><div class='ctx'> 	WREG32(DMIF_ADDR_CONFIG, gb_addr_config);</div><div class='ctx'> 	WREG32(HDP_ADDR_CONFIG, gb_addr_config);</div><div class='ctx'> </div><div class='del'>-	/* primary versions */</div><div class='del'>-	WREG32(CC_RB_BACKEND_DISABLE, cc_rb_backend_disable);</div><div class='del'>-	WREG32(CC_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable);</div><div class='del'>-	WREG32(CC_GC_SHADER_ARRAY_CONFIG, cc_gc_shader_array_config);</div><div class='del'>-</div><div class='del'>-	WREG32(CGTS_TCC_DISABLE, cgts_tcc_disable);</div><div class='add'>+	si_tiling_mode_table_init(rdev);</div><div class='ctx'> </div><div class='del'>-	/* user versions */</div><div class='del'>-	WREG32(GC_USER_RB_BACKEND_DISABLE, cc_rb_backend_disable);</div><div class='del'>-	WREG32(GC_USER_SYS_RB_BACKEND_DISABLE, cc_rb_backend_disable);</div><div class='del'>-	WREG32(GC_USER_SHADER_ARRAY_CONFIG, cc_gc_shader_array_config);</div><div class='add'>+	si_setup_rb(rdev, rdev-&gt;config.si.max_shader_engines,</div><div class='add'>+		    rdev-&gt;config.si.max_sh_per_se,</div><div class='add'>+		    rdev-&gt;config.si.max_backends_per_se);</div><div class='ctx'> </div><div class='del'>-	WREG32(CGTS_USER_TCC_DISABLE, cgts_tcc_disable);</div><div class='add'>+	si_setup_spi(rdev, rdev-&gt;config.si.max_shader_engines,</div><div class='add'>+		     rdev-&gt;config.si.max_sh_per_se,</div><div class='add'>+		     rdev-&gt;config.si.max_cu_per_sh);</div><div class='ctx'> </div><div class='del'>-	si_tiling_mode_table_init(rdev);</div><div class='ctx'> </div><div class='ctx'> 	/* set HW defaults for 3D engine */</div><div class='ctx'> 	WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) |</div><div class='hunk'>@@ -2217,8 +2064,6 @@ bool si_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> 	u32 srbm_status;</div><div class='ctx'> 	u32 grbm_status, grbm_status2;</div><div class='ctx'> 	u32 grbm_status_se0, grbm_status_se1;</div><div class='del'>-	struct r100_gpu_lockup *lockup = &amp;rdev-&gt;config.si.lockup;</div><div class='del'>-	int r;</div><div class='ctx'> </div><div class='ctx'> 	srbm_status = RREG32(SRBM_STATUS);</div><div class='ctx'> 	grbm_status = RREG32(GRBM_STATUS);</div><div class='hunk'>@@ -2226,20 +2071,12 @@ bool si_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)</div><div class='ctx'> 	grbm_status_se0 = RREG32(GRBM_STATUS_SE0);</div><div class='ctx'> 	grbm_status_se1 = RREG32(GRBM_STATUS_SE1);</div><div class='ctx'> 	if (!(grbm_status &amp; GUI_ACTIVE)) {</div><div class='del'>-		r100_gpu_lockup_update(lockup, ring);</div><div class='add'>+		radeon_ring_lockup_update(ring);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* force CP activities */</div><div class='del'>-	r = radeon_ring_lock(rdev, ring, 2);</div><div class='del'>-	if (!r) {</div><div class='del'>-		/* PACKET2 NOP */</div><div class='del'>-		radeon_ring_write(ring, 0x80000000);</div><div class='del'>-		radeon_ring_write(ring, 0x80000000);</div><div class='del'>-		radeon_ring_unlock_commit(rdev, ring);</div><div class='del'>-	}</div><div class='del'>-	/* XXX deal with CP0,1,2 */</div><div class='del'>-	ring-&gt;rptr = RREG32(ring-&gt;rptr_reg);</div><div class='del'>-	return r100_gpu_cp_is_lockup(rdev, lockup, ring);</div><div class='add'>+	radeon_ring_force_activity(rdev, ring);</div><div class='add'>+	return radeon_ring_test_lockup(rdev, ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int si_gpu_soft_reset(struct radeon_device *rdev)</div><div class='hunk'>@@ -2275,6 +2112,7 @@ static int si_gpu_soft_reset(struct radeon_device *rdev)</div><div class='ctx'> 		      SOFT_RESET_GDS |</div><div class='ctx'> 		      SOFT_RESET_PA |</div><div class='ctx'> 		      SOFT_RESET_SC |</div><div class='add'>+		      SOFT_RESET_BCI |</div><div class='ctx'> 		      SOFT_RESET_SPI |</div><div class='ctx'> 		      SOFT_RESET_SX |</div><div class='ctx'> 		      SOFT_RESET_TC |</div><div class='hunk'>@@ -2985,7 +2823,8 @@ int si_rlc_init(struct radeon_device *rdev)</div><div class='ctx'> 	/* save restore block */</div><div class='ctx'> 	if (rdev-&gt;rlc.save_restore_obj == NULL) {</div><div class='ctx'> 		r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true,</div><div class='del'>-				RADEON_GEM_DOMAIN_VRAM, &amp;rdev-&gt;rlc.save_restore_obj);</div><div class='add'>+				     RADEON_GEM_DOMAIN_VRAM, NULL,</div><div class='add'>+				     &amp;rdev-&gt;rlc.save_restore_obj);</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			dev_warn(rdev-&gt;dev, "(%d) create RLC sr bo failed\n", r);</div><div class='ctx'> 			return r;</div><div class='hunk'>@@ -3009,7 +2848,8 @@ int si_rlc_init(struct radeon_device *rdev)</div><div class='ctx'> 	/* clear state block */</div><div class='ctx'> 	if (rdev-&gt;rlc.clear_state_obj == NULL) {</div><div class='ctx'> 		r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true,</div><div class='del'>-				RADEON_GEM_DOMAIN_VRAM, &amp;rdev-&gt;rlc.clear_state_obj);</div><div class='add'>+				     RADEON_GEM_DOMAIN_VRAM, NULL,</div><div class='add'>+				     &amp;rdev-&gt;rlc.clear_state_obj);</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			dev_warn(rdev-&gt;dev, "(%d) create RLC c bo failed\n", r);</div><div class='ctx'> 			si_rlc_fini(rdev);</div><div class='hunk'>@@ -3216,6 +3056,8 @@ static int si_irq_init(struct radeon_device *rdev)</div><div class='ctx'> 	/* force the active interrupt state to all disabled */</div><div class='ctx'> 	si_disable_interrupt_state(rdev);</div><div class='ctx'> </div><div class='add'>+	pci_set_master(rdev-&gt;pdev);</div><div class='add'>+</div><div class='ctx'> 	/* enable irqs */</div><div class='ctx'> 	si_enable_interrupts(rdev);</div><div class='ctx'> </div><div class='hunk'>@@ -3994,10 +3836,6 @@ int si_init(struct radeon_device *rdev)</div><div class='ctx'> 	struct radeon_ring *ring = &amp;rdev-&gt;ring[RADEON_RING_TYPE_GFX_INDEX];</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	/* This don't do much */</div><div class='del'>-	r = radeon_gem_init(rdev);</div><div class='del'>-	if (r)</div><div class='del'>-		return r;</div><div class='ctx'> 	/* Read BIOS */</div><div class='ctx'> 	if (!radeon_get_bios(rdev)) {</div><div class='ctx'> 		if (ASIC_IS_AVIVO(rdev))</div><div class='hunk'>@@ -4117,7 +3955,6 @@ void si_fini(struct radeon_device *rdev)</div><div class='ctx'> 	si_pcie_gart_fini(rdev);</div><div class='ctx'> 	r600_vram_scratch_fini(rdev);</div><div class='ctx'> 	radeon_gem_fini(rdev);</div><div class='del'>-	radeon_semaphore_driver_fini(rdev);</div><div class='ctx'> 	radeon_fence_driver_fini(rdev);</div><div class='ctx'> 	radeon_bo_fini(rdev);</div><div class='ctx'> 	radeon_atombios_fini(rdev);</div><div class='head'>diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h<br/>index 53ea2c42dbd6..db4067962868 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/sid.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/radeon/sid.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/radeon/sid.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/radeon/sid.h</a></div><div class='hunk'>@@ -24,6 +24,11 @@</div><div class='ctx'> #ifndef SI_H</div><div class='ctx'> #define SI_H</div><div class='ctx'> </div><div class='add'>+#define TAHITI_RB_BITMAP_WIDTH_PER_SH  2</div><div class='add'>+</div><div class='add'>+#define TAHITI_GB_ADDR_CONFIG_GOLDEN        0x12011003</div><div class='add'>+#define VERDE_GB_ADDR_CONFIG_GOLDEN         0x12010002</div><div class='add'>+</div><div class='ctx'> #define	CG_MULT_THERMAL_STATUS					0x714</div><div class='ctx'> #define		ASIC_MAX_TEMP(x)				((x) &lt;&lt; 0)</div><div class='ctx'> #define		ASIC_MAX_TEMP_MASK				0x000001ff</div><div class='hunk'>@@ -408,6 +413,12 @@</div><div class='ctx'> #define		SOFT_RESET_IA					(1 &lt;&lt; 15)</div><div class='ctx'> </div><div class='ctx'> #define GRBM_GFX_INDEX          			0x802C</div><div class='add'>+#define		INSTANCE_INDEX(x)			((x) &lt;&lt; 0)</div><div class='add'>+#define		SH_INDEX(x)     			((x) &lt;&lt; 8)</div><div class='add'>+#define		SE_INDEX(x)     			((x) &lt;&lt; 16)</div><div class='add'>+#define		SH_BROADCAST_WRITES      		(1 &lt;&lt; 29)</div><div class='add'>+#define		INSTANCE_BROADCAST_WRITES      		(1 &lt;&lt; 30)</div><div class='add'>+#define		SE_BROADCAST_WRITES      		(1 &lt;&lt; 31)</div><div class='ctx'> </div><div class='ctx'> #define GRBM_INT_CNTL                                   0x8060</div><div class='ctx'> #       define RDERR_INT_ENABLE                         (1 &lt;&lt; 0)</div><div class='hunk'>@@ -480,6 +491,8 @@</div><div class='ctx'> #define	VGT_TF_MEMORY_BASE				0x89B8</div><div class='ctx'> </div><div class='ctx'> #define CC_GC_SHADER_ARRAY_CONFIG			0x89bc</div><div class='add'>+#define		INACTIVE_CUS_MASK			0xFFFF0000</div><div class='add'>+#define		INACTIVE_CUS_SHIFT			16</div><div class='ctx'> #define GC_USER_SHADER_ARRAY_CONFIG			0x89c0</div><div class='ctx'> </div><div class='ctx'> #define	PA_CL_ENHANCE					0x8A14</div><div class='hunk'>@@ -688,6 +701,12 @@</div><div class='ctx'> #define RLC_MC_CNTL                                       0xC344</div><div class='ctx'> #define RLC_UCODE_CNTL                                    0xC348</div><div class='ctx'> </div><div class='add'>+#define PA_SC_RASTER_CONFIG                             0x28350</div><div class='add'>+#       define RASTER_CONFIG_RB_MAP_0                   0</div><div class='add'>+#       define RASTER_CONFIG_RB_MAP_1                   1</div><div class='add'>+#       define RASTER_CONFIG_RB_MAP_2                   2</div><div class='add'>+#       define RASTER_CONFIG_RB_MAP_3                   3</div><div class='add'>+</div><div class='ctx'> #define VGT_EVENT_INITIATOR                             0x28a90</div><div class='ctx'> #       define SAMPLE_STREAMOUTSTATS1                   (1 &lt;&lt; 0)</div><div class='ctx'> #       define SAMPLE_STREAMOUTSTATS2                   (2 &lt;&lt; 0)</div><div class='head'>diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c<br/>index cb1ee4e0050a..6eb507a5d130 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/savage/savage_bci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/savage/savage_bci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/savage/savage_bci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/savage/savage_bci.c</a></div><div class='hunk'>@@ -735,7 +735,7 @@ static int savage_do_init_bci(struct drm_device * dev, drm_savage_init_t * init)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 		drm_core_ioremap(dev-&gt;agp_buffer_map, dev);</div><div class='del'>-		if (!dev-&gt;agp_buffer_map) {</div><div class='add'>+		if (!dev-&gt;agp_buffer_map-&gt;handle) {</div><div class='ctx'> 			DRM_ERROR("failed to ioremap DMA buffer region!\n");</div><div class='ctx'> 			savage_do_cleanup_bci(dev);</div><div class='ctx'> 			return -ENOMEM;</div><div class='head'>diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c<br/>index 1f5c67c579cf..b67cfcaa661f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/ttm/ttm_bo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/ttm/ttm_bo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/ttm/ttm_bo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/ttm/ttm_bo.c</a></div><div class='hunk'>@@ -343,6 +343,16 @@ static int ttm_bo_add_ttm(struct ttm_buffer_object *bo, bool zero_alloc)</div><div class='ctx'> 		if (unlikely(bo-&gt;ttm == NULL))</div><div class='ctx'> 			ret = -ENOMEM;</div><div class='ctx'> 		break;</div><div class='add'>+	case ttm_bo_type_sg:</div><div class='add'>+		bo-&gt;ttm = bdev-&gt;driver-&gt;ttm_tt_create(bdev, bo-&gt;num_pages &lt;&lt; PAGE_SHIFT,</div><div class='add'>+						      page_flags | TTM_PAGE_FLAG_SG,</div><div class='add'>+						      glob-&gt;dummy_read_page);</div><div class='add'>+		if (unlikely(bo-&gt;ttm == NULL)) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		bo-&gt;ttm-&gt;sg = bo-&gt;sg;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_err("Illegal buffer object type\n");</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -1169,6 +1179,7 @@ int ttm_bo_init(struct ttm_bo_device *bdev,</div><div class='ctx'> 		bool interruptible,</div><div class='ctx'> 		struct file *persistent_swap_storage,</div><div class='ctx'> 		size_t acc_size,</div><div class='add'>+		struct sg_table *sg,</div><div class='ctx'> 		void (*destroy) (struct ttm_buffer_object *))</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -1223,6 +1234,7 @@ int ttm_bo_init(struct ttm_bo_device *bdev,</div><div class='ctx'> 	bo-&gt;seq_valid = false;</div><div class='ctx'> 	bo-&gt;persistent_swap_storage = persistent_swap_storage;</div><div class='ctx'> 	bo-&gt;acc_size = acc_size;</div><div class='add'>+	bo-&gt;sg = sg;</div><div class='ctx'> 	atomic_inc(&amp;bo-&gt;glob-&gt;bo_count);</div><div class='ctx'> </div><div class='ctx'> 	ret = ttm_bo_check_placement(bo, placement);</div><div class='hunk'>@@ -1233,7 +1245,8 @@ int ttm_bo_init(struct ttm_bo_device *bdev,</div><div class='ctx'> 	 * For ttm_bo_type_device buffers, allocate</div><div class='ctx'> 	 * address space from the device.</div><div class='ctx'> 	 */</div><div class='del'>-	if (bo-&gt;type == ttm_bo_type_device) {</div><div class='add'>+	if (bo-&gt;type == ttm_bo_type_device ||</div><div class='add'>+	    bo-&gt;type == ttm_bo_type_sg) {</div><div class='ctx'> 		ret = ttm_bo_setup_vm(bo);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out_err;</div><div class='hunk'>@@ -1312,7 +1325,7 @@ int ttm_bo_create(struct ttm_bo_device *bdev,</div><div class='ctx'> </div><div class='ctx'> 	ret = ttm_bo_init(bdev, bo, size, type, placement, page_alignment,</div><div class='ctx'> 				buffer_start, interruptible,</div><div class='del'>-				persistent_swap_storage, acc_size, NULL);</div><div class='add'>+			  persistent_swap_storage, acc_size, NULL, NULL);</div><div class='ctx'> 	if (likely(ret == 0))</div><div class='ctx'> 		*p_bo = bo;</div><div class='ctx'> </div><div class='hunk'>@@ -1821,6 +1834,7 @@ static int ttm_bo_swapout(struct ttm_mem_shrink *shrink)</div><div class='ctx'> 			spin_unlock(&amp;glob-&gt;lru_lock);</div><div class='ctx'> 			(void) ttm_bo_cleanup_refs(bo, false, false, false);</div><div class='ctx'> 			kref_put(&amp;bo-&gt;list_kref, ttm_bo_release_list);</div><div class='add'>+			spin_lock(&amp;glob-&gt;lru_lock);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/udl/udl_drv.c b/drivers/gpu/drm/udl/udl_drv.c<br/>index 53673907a6a0..4d02c46a9420 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/udl/udl_drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/udl/udl_drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/udl/udl_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/udl/udl_drv.c</a></div><div class='hunk'>@@ -38,7 +38,7 @@ static void udl_usb_disconnect(struct usb_interface *interface)</div><div class='ctx'> 	drm_unplug_dev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct vm_operations_struct udl_gem_vm_ops = {</div><div class='add'>+static const struct vm_operations_struct udl_gem_vm_ops = {</div><div class='ctx'> 	.fault = udl_gem_fault,</div><div class='ctx'> 	.open = drm_gem_vm_open,</div><div class='ctx'> 	.close = drm_gem_vm_close,</div><div class='hunk'>@@ -57,7 +57,7 @@ static const struct file_operations udl_driver_fops = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct drm_driver driver = {</div><div class='del'>-	.driver_features = DRIVER_MODESET | DRIVER_GEM,</div><div class='add'>+	.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,</div><div class='ctx'> 	.load = udl_driver_load,</div><div class='ctx'> 	.unload = udl_driver_unload,</div><div class='ctx'> </div><div class='hunk'>@@ -70,6 +70,10 @@ static struct drm_driver driver = {</div><div class='ctx'> 	.dumb_map_offset = udl_gem_mmap,</div><div class='ctx'> 	.dumb_destroy = udl_dumb_destroy,</div><div class='ctx'> 	.fops = &amp;udl_driver_fops,</div><div class='add'>+</div><div class='add'>+	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,</div><div class='add'>+	.gem_prime_import = udl_gem_prime_import,</div><div class='add'>+</div><div class='ctx'> 	.name = DRIVER_NAME,</div><div class='ctx'> 	.desc = DRIVER_DESC,</div><div class='ctx'> 	.date = DRIVER_DATE,</div><div class='head'>diff --git a/drivers/gpu/drm/udl/udl_drv.h b/drivers/gpu/drm/udl/udl_drv.h<br/>index 96820d03a303..fccd361f7b50 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/udl/udl_drv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/udl/udl_drv.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/udl/udl_drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/udl/udl_drv.h</a></div><div class='hunk'>@@ -66,6 +66,7 @@ struct udl_gem_object {</div><div class='ctx'> 	struct drm_gem_object base;</div><div class='ctx'> 	struct page **pages;</div><div class='ctx'> 	void *vmapping;</div><div class='add'>+	struct sg_table *sg;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define to_udl_bo(x) container_of(x, struct udl_gem_object, base)</div><div class='hunk'>@@ -118,6 +119,8 @@ int udl_gem_init_object(struct drm_gem_object *obj);</div><div class='ctx'> void udl_gem_free_object(struct drm_gem_object *gem_obj);</div><div class='ctx'> struct udl_gem_object *udl_gem_alloc_object(struct drm_device *dev,</div><div class='ctx'> 					    size_t size);</div><div class='add'>+struct drm_gem_object *udl_gem_prime_import(struct drm_device *dev,</div><div class='add'>+				struct dma_buf *dma_buf);</div><div class='ctx'> </div><div class='ctx'> int udl_gem_vmap(struct udl_gem_object *obj);</div><div class='ctx'> void udl_gem_vunmap(struct udl_gem_object *obj);</div><div class='head'>diff --git a/drivers/gpu/drm/udl/udl_fb.c b/drivers/gpu/drm/udl/udl_fb.c<br/>index 4d9c3a5d8a45..ce9a61179925 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/udl/udl_fb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/udl/udl_fb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/udl/udl_fb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/udl/udl_fb.c</a></div><div class='hunk'>@@ -156,8 +156,17 @@ int udl_handle_damage(struct udl_framebuffer *fb, int x, int y,</div><div class='ctx'> 	if (!fb-&gt;active_16)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (!fb-&gt;obj-&gt;vmapping)</div><div class='del'>-		udl_gem_vmap(fb-&gt;obj);</div><div class='add'>+	if (!fb-&gt;obj-&gt;vmapping) {</div><div class='add'>+		ret = udl_gem_vmap(fb-&gt;obj);</div><div class='add'>+		if (ret == -ENOMEM) {</div><div class='add'>+			DRM_ERROR("failed to vmap fb\n");</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		if (!fb-&gt;obj-&gt;vmapping) {</div><div class='add'>+			DRM_ERROR("failed to vmapping\n");</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	start_cycles = get_cycles();</div><div class='ctx'> </div><div class='hunk'>@@ -593,11 +602,20 @@ udl_fb_user_fb_create(struct drm_device *dev,</div><div class='ctx'> 	struct drm_gem_object *obj;</div><div class='ctx'> 	struct udl_framebuffer *ufb;</div><div class='ctx'> 	int ret;</div><div class='add'>+	uint32_t size;</div><div class='ctx'> </div><div class='ctx'> 	obj = drm_gem_object_lookup(dev, file, mode_cmd-&gt;handles[0]);</div><div class='ctx'> 	if (obj == NULL)</div><div class='ctx'> 		return ERR_PTR(-ENOENT);</div><div class='ctx'> </div><div class='add'>+	size = mode_cmd-&gt;pitches[0] * mode_cmd-&gt;height;</div><div class='add'>+	size = ALIGN(size, PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	if (size &gt; obj-&gt;size) {</div><div class='add'>+		DRM_ERROR("object size not sufficient for fb %d %zu %d %d\n", size, obj-&gt;size, mode_cmd-&gt;pitches[0], mode_cmd-&gt;height);</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ufb = kzalloc(sizeof(*ufb), GFP_KERNEL);</div><div class='ctx'> 	if (ufb == NULL)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='head'>diff --git a/drivers/gpu/drm/udl/udl_gem.c b/drivers/gpu/drm/udl/udl_gem.c<br/>index 92f19ef329b0..7bd65bdd15a8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/udl/udl_gem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/udl/udl_gem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/udl/udl_gem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/udl/udl_gem.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include "drmP.h"</div><div class='ctx'> #include "udl_drv.h"</div><div class='ctx'> #include &lt;linux/shmem_fs.h&gt;</div><div class='add'>+#include &lt;linux/dma-buf.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct udl_gem_object *udl_gem_alloc_object(struct drm_device *dev,</div><div class='ctx'> 					    size_t size)</div><div class='hunk'>@@ -161,6 +162,12 @@ static void udl_gem_put_pages(struct udl_gem_object *obj)</div><div class='ctx'> 	int page_count = obj-&gt;base.size / PAGE_SIZE;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (obj-&gt;base.import_attach) {</div><div class='add'>+		drm_free_large(obj-&gt;pages);</div><div class='add'>+		obj-&gt;pages = NULL;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; page_count; i++)</div><div class='ctx'> 		page_cache_release(obj-&gt;pages[i]);</div><div class='ctx'> </div><div class='hunk'>@@ -173,6 +180,18 @@ int udl_gem_vmap(struct udl_gem_object *obj)</div><div class='ctx'> 	int page_count = obj-&gt;base.size / PAGE_SIZE;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (obj-&gt;base.import_attach) {</div><div class='add'>+		ret = dma_buf_begin_cpu_access(obj-&gt;base.import_attach-&gt;dmabuf,</div><div class='add'>+					       0, obj-&gt;base.size, DMA_BIDIRECTIONAL);</div><div class='add'>+		if (ret)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		obj-&gt;vmapping = dma_buf_vmap(obj-&gt;base.import_attach-&gt;dmabuf);</div><div class='add'>+		if (!obj-&gt;vmapping)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+		</div><div class='ctx'> 	ret = udl_gem_get_pages(obj, GFP_KERNEL);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -185,6 +204,13 @@ int udl_gem_vmap(struct udl_gem_object *obj)</div><div class='ctx'> </div><div class='ctx'> void udl_gem_vunmap(struct udl_gem_object *obj)</div><div class='ctx'> {</div><div class='add'>+	if (obj-&gt;base.import_attach) {</div><div class='add'>+		dma_buf_vunmap(obj-&gt;base.import_attach-&gt;dmabuf, obj-&gt;vmapping);</div><div class='add'>+		dma_buf_end_cpu_access(obj-&gt;base.import_attach-&gt;dmabuf, 0,</div><div class='add'>+				       obj-&gt;base.size, DMA_BIDIRECTIONAL);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (obj-&gt;vmapping)</div><div class='ctx'> 		vunmap(obj-&gt;vmapping);</div><div class='ctx'> </div><div class='hunk'>@@ -198,6 +224,9 @@ void udl_gem_free_object(struct drm_gem_object *gem_obj)</div><div class='ctx'> 	if (obj-&gt;vmapping)</div><div class='ctx'> 		udl_gem_vunmap(obj);</div><div class='ctx'> </div><div class='add'>+	if (gem_obj-&gt;import_attach)</div><div class='add'>+		drm_prime_gem_destroy(gem_obj, obj-&gt;sg);</div><div class='add'>+</div><div class='ctx'> 	if (obj-&gt;pages)</div><div class='ctx'> 		udl_gem_put_pages(obj);</div><div class='ctx'> </div><div class='hunk'>@@ -224,7 +253,7 @@ int udl_gem_mmap(struct drm_file *file, struct drm_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	ret = udl_gem_get_pages(gobj, GFP_KERNEL);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto out;</div><div class='ctx'> 	if (!gobj-&gt;base.map_list.map) {</div><div class='ctx'> 		ret = drm_gem_create_mmap_offset(obj);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -239,3 +268,66 @@ unlock:</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;struct_mutex);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static int udl_prime_create(struct drm_device *dev,</div><div class='add'>+			    size_t size,</div><div class='add'>+			    struct sg_table *sg,</div><div class='add'>+			    struct udl_gem_object **obj_p)</div><div class='add'>+{</div><div class='add'>+	struct udl_gem_object *obj;</div><div class='add'>+	int npages;</div><div class='add'>+</div><div class='add'>+	npages = size / PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	*obj_p = NULL;</div><div class='add'>+	obj = udl_gem_alloc_object(dev, npages * PAGE_SIZE);</div><div class='add'>+	if (!obj)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	obj-&gt;sg = sg;</div><div class='add'>+	obj-&gt;pages = drm_malloc_ab(npages, sizeof(struct page *));</div><div class='add'>+	if (obj-&gt;pages == NULL) {</div><div class='add'>+		DRM_ERROR("obj pages is NULL %d\n", npages);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_prime_sg_to_page_addr_arrays(sg, obj-&gt;pages, NULL, npages);</div><div class='add'>+</div><div class='add'>+	*obj_p = obj;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct drm_gem_object *udl_gem_prime_import(struct drm_device *dev,</div><div class='add'>+				struct dma_buf *dma_buf)</div><div class='add'>+{</div><div class='add'>+	struct dma_buf_attachment *attach;</div><div class='add'>+	struct sg_table *sg;</div><div class='add'>+	struct udl_gem_object *uobj;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* need to attach */</div><div class='add'>+	attach = dma_buf_attach(dma_buf, dev-&gt;dev);</div><div class='add'>+	if (IS_ERR(attach))</div><div class='add'>+		return ERR_PTR(PTR_ERR(attach));</div><div class='add'>+</div><div class='add'>+	sg = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);</div><div class='add'>+	if (IS_ERR(sg)) {</div><div class='add'>+		ret = PTR_ERR(sg);</div><div class='add'>+		goto fail_detach;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = udl_prime_create(dev, dma_buf-&gt;size, sg, &amp;uobj);</div><div class='add'>+	if (ret) {</div><div class='add'>+		goto fail_unmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	uobj-&gt;base.import_attach = attach;</div><div class='add'>+</div><div class='add'>+	return &amp;uobj-&gt;base;</div><div class='add'>+</div><div class='add'>+fail_unmap:</div><div class='add'>+	dma_buf_unmap_attachment(attach, sg, DMA_BIDIRECTIONAL);</div><div class='add'>+fail_detach:</div><div class='add'>+	dma_buf_detach(dma_buf, attach);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/udl/udl_modeset.c b/drivers/gpu/drm/udl/udl_modeset.c<br/>index b3ecb3d12a1d..0d7816789da1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/udl/udl_modeset.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/udl/udl_modeset.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/udl/udl_modeset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/udl/udl_modeset.c</a></div><div class='hunk'>@@ -395,7 +395,7 @@ int udl_modeset_init(struct drm_device *dev)</div><div class='ctx'> 	dev-&gt;mode_config.prefer_shadow = 0;</div><div class='ctx'> 	dev-&gt;mode_config.preferred_depth = 24;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;mode_config.funcs = (void *)&amp;udl_mode_funcs;</div><div class='add'>+	dev-&gt;mode_config.funcs = &amp;udl_mode_funcs;</div><div class='ctx'> </div><div class='ctx'> 	drm_mode_create_dirty_info_property(dev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c b/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c<br/>index 51c9ba5cd2fb..21ee78226560 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c</a></div><div class='hunk'>@@ -66,7 +66,7 @@ static int vmw_gmr2_bind(struct vmw_private *dev_priv,</div><div class='ctx'> 	cmd += sizeof(remap_cmd) / sizeof(uint32);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_pages; ++i) {</div><div class='del'>-		if (VMW_PPN_SIZE &gt; 4)</div><div class='add'>+		if (VMW_PPN_SIZE &lt;= 4)</div><div class='ctx'> 			*cmd = page_to_pfn(*pages++);</div><div class='ctx'> 		else</div><div class='ctx'> 			*((uint64_t *)cmd) = page_to_pfn(*pages++);</div><div class='head'>diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c<br/>index 2286d47e5022..6b0078ffa763 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/vmwgfx/vmwgfx_kms.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/vmwgfx/vmwgfx_kms.c</a></div><div class='hunk'>@@ -1178,7 +1178,7 @@ err_out:</div><div class='ctx'> 	return &amp;vfb-&gt;base;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct drm_mode_config_funcs vmw_kms_funcs = {</div><div class='add'>+static const struct drm_mode_config_funcs vmw_kms_funcs = {</div><div class='ctx'> 	.fb_create = vmw_kms_fb_create,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c<br/>index a37abb581cbb..22bf9a21ec71 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/drm/vmwgfx/vmwgfx_resource.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/drm/vmwgfx/vmwgfx_resource.c</a></div><div class='hunk'>@@ -1567,7 +1567,7 @@ int vmw_dmabuf_init(struct vmw_private *dev_priv,</div><div class='ctx'> 	ret = ttm_bo_init(bdev, &amp;vmw_bo-&gt;base, size,</div><div class='ctx'> 			  ttm_bo_type_device, placement,</div><div class='ctx'> 			  0, 0, interruptible,</div><div class='del'>-			  NULL, acc_size, bo_free);</div><div class='add'>+			  NULL, acc_size, NULL, bo_free);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/vga/Kconfig b/drivers/gpu/vga/Kconfig<br/>index 96c83a9a76bb..f34838839b08 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/vga/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/vga/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/vga/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/vga/Kconfig</a></div><div class='hunk'>@@ -21,6 +21,7 @@ config VGA_SWITCHEROO</div><div class='ctx'> 	bool "Laptop Hybrid Graphics - GPU switching support"</div><div class='ctx'> 	depends on X86</div><div class='ctx'> 	depends on ACPI</div><div class='add'>+	select VGA_ARB</div><div class='ctx'> 	help</div><div class='ctx'> 	  Many laptops released in 2008/9/10 have two GPUs with a multiplexer</div><div class='ctx'> 	  to switch between them. This adds support for dynamic switching when</div><div class='head'>diff --git a/drivers/gpu/vga/vga_switcheroo.c b/drivers/gpu/vga/vga_switcheroo.c<br/>index 58434e804d91..38f9534ac513 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/vga/vga_switcheroo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/vga/vga_switcheroo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/vga/vga_switcheroo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/vga/vga_switcheroo.c</a></div><div class='hunk'>@@ -28,15 +28,16 @@</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/vga_switcheroo.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/vgaarb.h&gt;</div><div class='add'>+</div><div class='ctx'> struct vga_switcheroo_client {</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> 	struct fb_info *fb_info;</div><div class='ctx'> 	int pwr_state;</div><div class='del'>-	void (*set_gpu_state)(struct pci_dev *pdev, enum vga_switcheroo_state);</div><div class='del'>-	void (*reprobe)(struct pci_dev *pdev);</div><div class='del'>-	bool (*can_switch)(struct pci_dev *pdev);</div><div class='add'>+	const struct vga_switcheroo_client_ops *ops;</div><div class='ctx'> 	int id;</div><div class='ctx'> 	bool active;</div><div class='add'>+	struct list_head list;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static DEFINE_MUTEX(vgasr_mutex);</div><div class='hunk'>@@ -51,16 +52,23 @@ struct vgasr_priv {</div><div class='ctx'> 	struct dentry *switch_file;</div><div class='ctx'> </div><div class='ctx'> 	int registered_clients;</div><div class='del'>-	struct vga_switcheroo_client clients[VGA_SWITCHEROO_MAX_CLIENTS];</div><div class='add'>+	struct list_head clients;</div><div class='ctx'> </div><div class='ctx'> 	struct vga_switcheroo_handler *handler;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define ID_BIT_AUDIO		0x100</div><div class='add'>+#define client_is_audio(c)	((c)-&gt;id &amp; ID_BIT_AUDIO)</div><div class='add'>+#define client_is_vga(c)	((c)-&gt;id == -1 || !client_is_audio(c))</div><div class='add'>+#define client_id(c)		((c)-&gt;id &amp; ~ID_BIT_AUDIO)</div><div class='add'>+</div><div class='ctx'> static int vga_switcheroo_debugfs_init(struct vgasr_priv *priv);</div><div class='ctx'> static void vga_switcheroo_debugfs_fini(struct vgasr_priv *priv);</div><div class='ctx'> </div><div class='ctx'> /* only one switcheroo per system */</div><div class='del'>-static struct vgasr_priv vgasr_priv;</div><div class='add'>+static struct vgasr_priv vgasr_priv = {</div><div class='add'>+	.clients = LIST_HEAD_INIT(vgasr_priv.clients),</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> int vga_switcheroo_register_handler(struct vga_switcheroo_handler *handler)</div><div class='ctx'> {</div><div class='hunk'>@@ -86,72 +94,119 @@ EXPORT_SYMBOL(vga_switcheroo_unregister_handler);</div><div class='ctx'> </div><div class='ctx'> static void vga_switcheroo_enable(void)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='ctx'> 	int ret;</div><div class='add'>+	struct vga_switcheroo_client *client;</div><div class='add'>+</div><div class='ctx'> 	/* call the handler to init */</div><div class='ctx'> 	vgasr_priv.handler-&gt;init();</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; VGA_SWITCHEROO_MAX_CLIENTS; i++) {</div><div class='del'>-		ret = vgasr_priv.handler-&gt;get_client_id(vgasr_priv.clients[i].pdev);</div><div class='add'>+	list_for_each_entry(client, &amp;vgasr_priv.clients, list) {</div><div class='add'>+		if (client-&gt;id != -1)</div><div class='add'>+			continue;</div><div class='add'>+		ret = vgasr_priv.handler-&gt;get_client_id(client-&gt;pdev);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		vgasr_priv.clients[i].id = ret;</div><div class='add'>+		client-&gt;id = ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	vga_switcheroo_debugfs_init(&amp;vgasr_priv);</div><div class='ctx'> 	vgasr_priv.active = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int vga_switcheroo_register_client(struct pci_dev *pdev,</div><div class='del'>-				   void (*set_gpu_state)(struct pci_dev *pdev, enum vga_switcheroo_state),</div><div class='del'>-				   void (*reprobe)(struct pci_dev *pdev),</div><div class='del'>-				   bool (*can_switch)(struct pci_dev *pdev))</div><div class='add'>+static int register_client(struct pci_dev *pdev,</div><div class='add'>+			   const struct vga_switcheroo_client_ops *ops,</div><div class='add'>+			   int id, bool active)</div><div class='ctx'> {</div><div class='del'>-	int index;</div><div class='add'>+	struct vga_switcheroo_client *client;</div><div class='add'>+</div><div class='add'>+	client = kzalloc(sizeof(*client), GFP_KERNEL);</div><div class='add'>+	if (!client)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	client-&gt;pwr_state = VGA_SWITCHEROO_ON;</div><div class='add'>+	client-&gt;pdev = pdev;</div><div class='add'>+	client-&gt;ops = ops;</div><div class='add'>+	client-&gt;id = id;</div><div class='add'>+	client-&gt;active = active;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;vgasr_mutex);</div><div class='del'>-	/* don't do IGD vs DIS here */</div><div class='del'>-	if (vgasr_priv.registered_clients &amp; 1)</div><div class='del'>-		index = 1;</div><div class='del'>-	else</div><div class='del'>-		index = 0;</div><div class='del'>-</div><div class='del'>-	vgasr_priv.clients[index].pwr_state = VGA_SWITCHEROO_ON;</div><div class='del'>-	vgasr_priv.clients[index].pdev = pdev;</div><div class='del'>-	vgasr_priv.clients[index].set_gpu_state = set_gpu_state;</div><div class='del'>-	vgasr_priv.clients[index].reprobe = reprobe;</div><div class='del'>-	vgasr_priv.clients[index].can_switch = can_switch;</div><div class='del'>-	vgasr_priv.clients[index].id = -1;</div><div class='del'>-	if (pdev-&gt;resource[PCI_ROM_RESOURCE].flags &amp; IORESOURCE_ROM_SHADOW)</div><div class='del'>-		vgasr_priv.clients[index].active = true;</div><div class='del'>-</div><div class='del'>-	vgasr_priv.registered_clients |= (1 &lt;&lt; index);</div><div class='add'>+	list_add_tail(&amp;client-&gt;list, &amp;vgasr_priv.clients);</div><div class='add'>+	if (client_is_vga(client))</div><div class='add'>+		vgasr_priv.registered_clients++;</div><div class='ctx'> </div><div class='ctx'> 	/* if we get two clients + handler */</div><div class='del'>-	if (vgasr_priv.registered_clients == 0x3 &amp;&amp; vgasr_priv.handler) {</div><div class='add'>+	if (!vgasr_priv.active &amp;&amp;</div><div class='add'>+	    vgasr_priv.registered_clients == 2 &amp;&amp; vgasr_priv.handler) {</div><div class='ctx'> 		printk(KERN_INFO "vga_switcheroo: enabled\n");</div><div class='ctx'> 		vga_switcheroo_enable();</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;vgasr_mutex);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int vga_switcheroo_register_client(struct pci_dev *pdev,</div><div class='add'>+				   const struct vga_switcheroo_client_ops *ops)</div><div class='add'>+{</div><div class='add'>+	return register_client(pdev, ops, -1,</div><div class='add'>+			       pdev == vga_default_device());</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL(vga_switcheroo_register_client);</div><div class='ctx'> </div><div class='add'>+int vga_switcheroo_register_audio_client(struct pci_dev *pdev,</div><div class='add'>+					 const struct vga_switcheroo_client_ops *ops,</div><div class='add'>+					 int id, bool active)</div><div class='add'>+{</div><div class='add'>+	return register_client(pdev, ops, id | ID_BIT_AUDIO, active);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(vga_switcheroo_register_audio_client);</div><div class='add'>+</div><div class='add'>+static struct vga_switcheroo_client *</div><div class='add'>+find_client_from_pci(struct list_head *head, struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct vga_switcheroo_client *client;</div><div class='add'>+	list_for_each_entry(client, head, list)</div><div class='add'>+		if (client-&gt;pdev == pdev)</div><div class='add'>+			return client;</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct vga_switcheroo_client *</div><div class='add'>+find_client_from_id(struct list_head *head, int client_id)</div><div class='add'>+{</div><div class='add'>+	struct vga_switcheroo_client *client;</div><div class='add'>+	list_for_each_entry(client, head, list)</div><div class='add'>+		if (client-&gt;id == client_id)</div><div class='add'>+			return client;</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct vga_switcheroo_client *</div><div class='add'>+find_active_client(struct list_head *head)</div><div class='add'>+{</div><div class='add'>+	struct vga_switcheroo_client *client;</div><div class='add'>+	list_for_each_entry(client, head, list)</div><div class='add'>+		if (client-&gt;active &amp;&amp; client_is_vga(client))</div><div class='add'>+			return client;</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void vga_switcheroo_unregister_client(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	struct vga_switcheroo_client *client;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;vgasr_mutex);</div><div class='del'>-	for (i = 0; i &lt; VGA_SWITCHEROO_MAX_CLIENTS; i++) {</div><div class='del'>-		if (vgasr_priv.clients[i].pdev == pdev) {</div><div class='del'>-			vgasr_priv.registered_clients &amp;= ~(1 &lt;&lt; i);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+	client = find_client_from_pci(&amp;vgasr_priv.clients, pdev);</div><div class='add'>+	if (client) {</div><div class='add'>+		if (client_is_vga(client))</div><div class='add'>+			vgasr_priv.registered_clients--;</div><div class='add'>+		list_del(&amp;client-&gt;list);</div><div class='add'>+		kfree(client);</div><div class='add'>+	}</div><div class='add'>+	if (vgasr_priv.active &amp;&amp; vgasr_priv.registered_clients &lt; 2) {</div><div class='add'>+		printk(KERN_INFO "vga_switcheroo: disabled\n");</div><div class='add'>+		vga_switcheroo_debugfs_fini(&amp;vgasr_priv);</div><div class='add'>+		vgasr_priv.active = false;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "vga_switcheroo: disabled\n");</div><div class='del'>-	vga_switcheroo_debugfs_fini(&amp;vgasr_priv);</div><div class='del'>-	vgasr_priv.active = false;</div><div class='ctx'> 	mutex_unlock(&amp;vgasr_mutex);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(vga_switcheroo_unregister_client);</div><div class='hunk'>@@ -159,29 +214,29 @@ EXPORT_SYMBOL(vga_switcheroo_unregister_client);</div><div class='ctx'> void vga_switcheroo_client_fb_set(struct pci_dev *pdev,</div><div class='ctx'> 				 struct fb_info *info)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	struct vga_switcheroo_client *client;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;vgasr_mutex);</div><div class='del'>-	for (i = 0; i &lt; VGA_SWITCHEROO_MAX_CLIENTS; i++) {</div><div class='del'>-		if (vgasr_priv.clients[i].pdev == pdev) {</div><div class='del'>-			vgasr_priv.clients[i].fb_info = info;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	client = find_client_from_pci(&amp;vgasr_priv.clients, pdev);</div><div class='add'>+	if (client)</div><div class='add'>+		client-&gt;fb_info = info;</div><div class='ctx'> 	mutex_unlock(&amp;vgasr_mutex);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(vga_switcheroo_client_fb_set);</div><div class='ctx'> </div><div class='ctx'> static int vga_switcheroo_show(struct seq_file *m, void *v)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	struct vga_switcheroo_client *client;</div><div class='add'>+	int i = 0;</div><div class='ctx'> 	mutex_lock(&amp;vgasr_mutex);</div><div class='del'>-	for (i = 0; i &lt; VGA_SWITCHEROO_MAX_CLIENTS; i++) {</div><div class='del'>-		seq_printf(m, "%d:%s:%c:%s:%s\n", i,</div><div class='del'>-			   vgasr_priv.clients[i].id == VGA_SWITCHEROO_DIS ? "DIS" : "IGD",</div><div class='del'>-			   vgasr_priv.clients[i].active ? '+' : ' ',</div><div class='del'>-			   vgasr_priv.clients[i].pwr_state ? "Pwr" : "Off",</div><div class='del'>-			   pci_name(vgasr_priv.clients[i].pdev));</div><div class='add'>+	list_for_each_entry(client, &amp;vgasr_priv.clients, list) {</div><div class='add'>+		seq_printf(m, "%d:%s%s:%c:%s:%s\n", i,</div><div class='add'>+			   client_id(client) == VGA_SWITCHEROO_DIS ? "DIS" : "IGD",</div><div class='add'>+			   client_is_vga(client) ? "" : "-Audio",</div><div class='add'>+			   client-&gt;active ? '+' : ' ',</div><div class='add'>+			   client-&gt;pwr_state ? "Pwr" : "Off",</div><div class='add'>+			   pci_name(client-&gt;pdev));</div><div class='add'>+		i++;</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;vgasr_mutex);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -197,7 +252,7 @@ static int vga_switchon(struct vga_switcheroo_client *client)</div><div class='ctx'> 	if (vgasr_priv.handler-&gt;power_state)</div><div class='ctx'> 		vgasr_priv.handler-&gt;power_state(client-&gt;id, VGA_SWITCHEROO_ON);</div><div class='ctx'> 	/* call the driver callback to turn on device */</div><div class='del'>-	client-&gt;set_gpu_state(client-&gt;pdev, VGA_SWITCHEROO_ON);</div><div class='add'>+	client-&gt;ops-&gt;set_gpu_state(client-&gt;pdev, VGA_SWITCHEROO_ON);</div><div class='ctx'> 	client-&gt;pwr_state = VGA_SWITCHEROO_ON;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -205,34 +260,39 @@ static int vga_switchon(struct vga_switcheroo_client *client)</div><div class='ctx'> static int vga_switchoff(struct vga_switcheroo_client *client)</div><div class='ctx'> {</div><div class='ctx'> 	/* call the driver callback to turn off device */</div><div class='del'>-	client-&gt;set_gpu_state(client-&gt;pdev, VGA_SWITCHEROO_OFF);</div><div class='add'>+	client-&gt;ops-&gt;set_gpu_state(client-&gt;pdev, VGA_SWITCHEROO_OFF);</div><div class='ctx'> 	if (vgasr_priv.handler-&gt;power_state)</div><div class='ctx'> 		vgasr_priv.handler-&gt;power_state(client-&gt;id, VGA_SWITCHEROO_OFF);</div><div class='ctx'> 	client-&gt;pwr_state = VGA_SWITCHEROO_OFF;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void set_audio_state(int id, int state)</div><div class='add'>+{</div><div class='add'>+	struct vga_switcheroo_client *client;</div><div class='add'>+</div><div class='add'>+	client = find_client_from_id(&amp;vgasr_priv.clients, id | ID_BIT_AUDIO);</div><div class='add'>+	if (client &amp;&amp; client-&gt;pwr_state != state) {</div><div class='add'>+		client-&gt;ops-&gt;set_gpu_state(client-&gt;pdev, state);</div><div class='add'>+		client-&gt;pwr_state = state;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* stage one happens before delay */</div><div class='ctx'> static int vga_switchto_stage1(struct vga_switcheroo_client *new_client)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	struct vga_switcheroo_client *active = NULL;</div><div class='add'>+	struct vga_switcheroo_client *active;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; VGA_SWITCHEROO_MAX_CLIENTS; i++) {</div><div class='del'>-		if (vgasr_priv.clients[i].active == true) {</div><div class='del'>-			active = &amp;vgasr_priv.clients[i];</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	active = find_active_client(&amp;vgasr_priv.clients);</div><div class='ctx'> 	if (!active)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (new_client-&gt;pwr_state == VGA_SWITCHEROO_OFF)</div><div class='ctx'> 		vga_switchon(new_client);</div><div class='ctx'> </div><div class='del'>-	/* swap shadow resource to denote boot VGA device has changed so X starts on new device */</div><div class='del'>-	active-&gt;pdev-&gt;resource[PCI_ROM_RESOURCE].flags &amp;= ~IORESOURCE_ROM_SHADOW;</div><div class='del'>-	new_client-&gt;pdev-&gt;resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_SHADOW;</div><div class='add'>+	vga_set_default_device(new_client-&gt;pdev);</div><div class='add'>+	set_audio_state(new_client-&gt;id, VGA_SWITCHEROO_ON);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -240,15 +300,9 @@ static int vga_switchto_stage1(struct vga_switcheroo_client *new_client)</div><div class='ctx'> static int vga_switchto_stage2(struct vga_switcheroo_client *new_client)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	int i;</div><div class='del'>-	struct vga_switcheroo_client *active = NULL;</div><div class='add'>+	struct vga_switcheroo_client *active;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; VGA_SWITCHEROO_MAX_CLIENTS; i++) {</div><div class='del'>-		if (vgasr_priv.clients[i].active == true) {</div><div class='del'>-			active = &amp;vgasr_priv.clients[i];</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	active = find_active_client(&amp;vgasr_priv.clients);</div><div class='ctx'> 	if (!active)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -264,8 +318,10 @@ static int vga_switchto_stage2(struct vga_switcheroo_client *new_client)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (new_client-&gt;reprobe)</div><div class='del'>-		new_client-&gt;reprobe(new_client-&gt;pdev);</div><div class='add'>+	if (new_client-&gt;ops-&gt;reprobe)</div><div class='add'>+		new_client-&gt;ops-&gt;reprobe(new_client-&gt;pdev);</div><div class='add'>+</div><div class='add'>+	set_audio_state(active-&gt;id, VGA_SWITCHEROO_OFF);</div><div class='ctx'> </div><div class='ctx'> 	if (active-&gt;pwr_state == VGA_SWITCHEROO_ON)</div><div class='ctx'> 		vga_switchoff(active);</div><div class='hunk'>@@ -274,13 +330,26 @@ static int vga_switchto_stage2(struct vga_switcheroo_client *new_client)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool check_can_switch(void)</div><div class='add'>+{</div><div class='add'>+	struct vga_switcheroo_client *client;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(client, &amp;vgasr_priv.clients, list) {</div><div class='add'>+		if (!client-&gt;ops-&gt;can_switch(client-&gt;pdev)) {</div><div class='add'>+			printk(KERN_ERR "vga_switcheroo: client %x refused switch\n", client-&gt;id);</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static ssize_t</div><div class='ctx'> vga_switcheroo_debugfs_write(struct file *filp, const char __user *ubuf,</div><div class='ctx'> 			     size_t cnt, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	char usercmd[64];</div><div class='ctx'> 	const char *pdev_name;</div><div class='del'>-	int i, ret;</div><div class='add'>+	int ret;</div><div class='ctx'> 	bool delay = false, can_switch;</div><div class='ctx'> 	bool just_mux = false;</div><div class='ctx'> 	int client_id = -1;</div><div class='hunk'>@@ -301,21 +370,21 @@ vga_switcheroo_debugfs_write(struct file *filp, const char __user *ubuf,</div><div class='ctx'> </div><div class='ctx'> 	/* pwr off the device not in use */</div><div class='ctx'> 	if (strncmp(usercmd, "OFF", 3) == 0) {</div><div class='del'>-		for (i = 0; i &lt; VGA_SWITCHEROO_MAX_CLIENTS; i++) {</div><div class='del'>-			if (vgasr_priv.clients[i].active)</div><div class='add'>+		list_for_each_entry(client, &amp;vgasr_priv.clients, list) {</div><div class='add'>+			if (client-&gt;active)</div><div class='ctx'> 				continue;</div><div class='del'>-			if (vgasr_priv.clients[i].pwr_state == VGA_SWITCHEROO_ON)</div><div class='del'>-				vga_switchoff(&amp;vgasr_priv.clients[i]);</div><div class='add'>+			if (client-&gt;pwr_state == VGA_SWITCHEROO_ON)</div><div class='add'>+				vga_switchoff(client);</div><div class='ctx'> 		}</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* pwr on the device not in use */</div><div class='ctx'> 	if (strncmp(usercmd, "ON", 2) == 0) {</div><div class='del'>-		for (i = 0; i &lt; VGA_SWITCHEROO_MAX_CLIENTS; i++) {</div><div class='del'>-			if (vgasr_priv.clients[i].active)</div><div class='add'>+		list_for_each_entry(client, &amp;vgasr_priv.clients, list) {</div><div class='add'>+			if (client-&gt;active)</div><div class='ctx'> 				continue;</div><div class='del'>-			if (vgasr_priv.clients[i].pwr_state == VGA_SWITCHEROO_OFF)</div><div class='del'>-				vga_switchon(&amp;vgasr_priv.clients[i]);</div><div class='add'>+			if (client-&gt;pwr_state == VGA_SWITCHEROO_OFF)</div><div class='add'>+				vga_switchon(client);</div><div class='ctx'> 		}</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -348,13 +417,9 @@ vga_switcheroo_debugfs_write(struct file *filp, const char __user *ubuf,</div><div class='ctx'> </div><div class='ctx'> 	if (client_id == -1)</div><div class='ctx'> 		goto out;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; VGA_SWITCHEROO_MAX_CLIENTS; i++) {</div><div class='del'>-		if (vgasr_priv.clients[i].id == client_id) {</div><div class='del'>-			client = &amp;vgasr_priv.clients[i];</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	client = find_client_from_id(&amp;vgasr_priv.clients, client_id);</div><div class='add'>+	if (!client)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	vgasr_priv.delayed_switch_active = false;</div><div class='ctx'> </div><div class='hunk'>@@ -363,23 +428,16 @@ vga_switcheroo_debugfs_write(struct file *filp, const char __user *ubuf,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (client-&gt;active == true)</div><div class='add'>+	if (client-&gt;active)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/* okay we want a switch - test if devices are willing to switch */</div><div class='del'>-	can_switch = true;</div><div class='del'>-	for (i = 0; i &lt; VGA_SWITCHEROO_MAX_CLIENTS; i++) {</div><div class='del'>-		can_switch = vgasr_priv.clients[i].can_switch(vgasr_priv.clients[i].pdev);</div><div class='del'>-		if (can_switch == false) {</div><div class='del'>-			printk(KERN_ERR "vga_switcheroo: client %d refused switch\n", i);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	can_switch = check_can_switch();</div><div class='ctx'> </div><div class='ctx'> 	if (can_switch == false &amp;&amp; delay == false)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	if (can_switch == true) {</div><div class='add'>+	if (can_switch) {</div><div class='ctx'> 		pdev_name = pci_name(client-&gt;pdev);</div><div class='ctx'> 		ret = vga_switchto_stage1(client);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -451,10 +509,8 @@ fail:</div><div class='ctx'> </div><div class='ctx'> int vga_switcheroo_process_delayed_switch(void)</div><div class='ctx'> {</div><div class='del'>-	struct vga_switcheroo_client *client = NULL;</div><div class='add'>+	struct vga_switcheroo_client *client;</div><div class='ctx'> 	const char *pdev_name;</div><div class='del'>-	bool can_switch = true;</div><div class='del'>-	int i;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int err = -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -464,17 +520,9 @@ int vga_switcheroo_process_delayed_switch(void)</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO "vga_switcheroo: processing delayed switch to %d\n", vgasr_priv.delayed_client_id);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; VGA_SWITCHEROO_MAX_CLIENTS; i++) {</div><div class='del'>-		if (vgasr_priv.clients[i].id == vgasr_priv.delayed_client_id)</div><div class='del'>-			client = &amp;vgasr_priv.clients[i];</div><div class='del'>-		can_switch = vgasr_priv.clients[i].can_switch(vgasr_priv.clients[i].pdev);</div><div class='del'>-		if (can_switch == false) {</div><div class='del'>-			printk(KERN_ERR "vga_switcheroo: client %d refused switch\n", i);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (can_switch == false || client == NULL)</div><div class='add'>+	client = find_client_from_id(&amp;vgasr_priv.clients,</div><div class='add'>+				     vgasr_priv.delayed_client_id);</div><div class='add'>+	if (!client || !check_can_switch())</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='ctx'> 	pdev_name = pci_name(client-&gt;pdev);</div><div class='head'>diff --git a/drivers/gpu/vga/vgaarb.c b/drivers/gpu/vga/vgaarb.c<br/>index 111d956d8e7d..3df8fc0ec01a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpu/vga/vgaarb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpu/vga/vgaarb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/gpu/vga/vgaarb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/gpu/vga/vgaarb.c</a></div><div class='hunk'>@@ -136,6 +136,13 @@ struct pci_dev *vga_default_device(void)</div><div class='ctx'> {</div><div class='ctx'> 	return vga_default;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+EXPORT_SYMBOL_GPL(vga_default_device);</div><div class='add'>+</div><div class='add'>+void vga_set_default_device(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	vga_default = pdev;</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static inline void vga_irq_set_state(struct vga_device *vgadev, bool state)</div><div class='hunk'>@@ -605,10 +612,12 @@ static bool vga_arbiter_del_pci_device(struct pci_dev *pdev)</div><div class='ctx'> 		goto bail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifndef __ARCH_HAS_VGA_DEFAULT_DEVICE</div><div class='ctx'> 	if (vga_default == pdev) {</div><div class='ctx'> 		pci_dev_put(vga_default);</div><div class='ctx'> 		vga_default = NULL;</div><div class='ctx'> 	}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	if (vgadev-&gt;decodes &amp; (VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM))</div><div class='ctx'> 		vga_decode_count--;</div><div class='head'>diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig<br/>index ffddcba32af6..034c80a10f1f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/Kconfig</a></div><div class='hunk'>@@ -32,9 +32,13 @@ config HID</div><div class='ctx'> 	  If unsure, say Y.</div><div class='ctx'> </div><div class='ctx'> config HID_BATTERY_STRENGTH</div><div class='del'>-	bool</div><div class='add'>+	bool "Battery level reporting for HID devices"</div><div class='ctx'> 	depends on HID &amp;&amp; POWER_SUPPLY &amp;&amp; HID = POWER_SUPPLY</div><div class='ctx'> 	default n</div><div class='add'>+	---help---</div><div class='add'>+	This option adds support of reporting battery strength (for HID devices</div><div class='add'>+	that support this feature) through power_supply class so that userspace</div><div class='add'>+	tools, such as upower, can display it.</div><div class='ctx'> </div><div class='ctx'> config HIDRAW</div><div class='ctx'> 	bool "/dev/hidraw raw HID device support"</div><div class='hunk'>@@ -60,6 +64,18 @@ source "drivers/hid/usbhid/Kconfig"</div><div class='ctx'> menu "Special HID drivers"</div><div class='ctx'> 	depends on HID</div><div class='ctx'> </div><div class='add'>+config HID_GENERIC</div><div class='add'>+	tristate "Generic HID driver"</div><div class='add'>+	depends on HID</div><div class='add'>+	default y</div><div class='add'>+	---help---</div><div class='add'>+	Support for generic HID devices.</div><div class='add'>+</div><div class='add'>+	To compile this driver as a module, choose M here: the module</div><div class='add'>+	will be called hid-generic.</div><div class='add'>+</div><div class='add'>+	If unsure, say Y.</div><div class='add'>+</div><div class='ctx'> config HID_A4TECH</div><div class='ctx'> 	tristate "A4 tech mice" if EXPERT</div><div class='ctx'> 	depends on USB_HID</div><div class='hunk'>@@ -92,6 +108,12 @@ config HID_APPLE</div><div class='ctx'> 	Say Y here if you want support for keyboards of	Apple iBooks, PowerBooks,</div><div class='ctx'> 	MacBooks, MacBook Pros and Apple Aluminum.</div><div class='ctx'> </div><div class='add'>+config HID_AUREAL</div><div class='add'>+	tristate "Aureal"</div><div class='add'>+	depends on USB_HID</div><div class='add'>+	---help---</div><div class='add'>+	Support for Aureal Cy se W-01RN Remote Controller and other Aureal derived remotes.</div><div class='add'>+</div><div class='ctx'> config HID_BELKIN</div><div class='ctx'> 	tristate "Belkin Flip KVM and Wireless keyboard" if EXPERT</div><div class='ctx'> 	depends on USB_HID</div><div class='hunk'>@@ -448,7 +470,7 @@ config HID_PICOLCD_FB</div><div class='ctx'> 	select FB_SYS_FOPS</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Provide access to PicoLCD's 256x64 monochrome display via a</div><div class='del'>-	  frambuffer device.</div><div class='add'>+	  framebuffer device.</div><div class='ctx'> </div><div class='ctx'> config HID_PICOLCD_BACKLIGHT</div><div class='ctx'> 	bool "Backlight control" if EXPERT</div><div class='hunk'>@@ -595,16 +617,10 @@ config THRUSTMASTER_FF</div><div class='ctx'> config HID_WACOM</div><div class='ctx'> 	tristate "Wacom Bluetooth devices support"</div><div class='ctx'> 	depends on BT_HIDP</div><div class='del'>-	---help---</div><div class='del'>-	Support for Wacom Graphire Bluetooth tablet.</div><div class='del'>-</div><div class='del'>-config HID_WACOM_POWER_SUPPLY</div><div class='del'>-	bool "Wacom Bluetooth devices power supply status support"</div><div class='del'>-	depends on HID_WACOM</div><div class='add'>+	depends on LEDS_CLASS</div><div class='ctx'> 	select POWER_SUPPLY</div><div class='ctx'> 	---help---</div><div class='del'>-	  Say Y here if you want to enable power supply status monitoring for</div><div class='del'>-	  Wacom Bluetooth devices.</div><div class='add'>+	Support for Wacom Graphire Bluetooth and Intuos4 WL tablets.</div><div class='ctx'> </div><div class='ctx'> config HID_WIIMOTE</div><div class='ctx'> 	tristate "Nintendo Wii Remote support"</div><div class='head'>diff --git a/drivers/hid/Makefile b/drivers/hid/Makefile<br/>index 22f1d16cd79c..ca6cc9f0485c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/Makefile</a></div><div class='hunk'>@@ -9,6 +9,8 @@ endif</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_HID)		+= hid.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_HID_GENERIC)	+= hid-generic.o</div><div class='add'>+</div><div class='ctx'> hid-$(CONFIG_HIDRAW)		+= hidraw.o</div><div class='ctx'> </div><div class='ctx'> hid-logitech-y		:= hid-lg.o</div><div class='hunk'>@@ -36,6 +38,7 @@ endif</div><div class='ctx'> obj-$(CONFIG_HID_A4TECH)	+= hid-a4tech.o</div><div class='ctx'> obj-$(CONFIG_HID_ACRUX)		+= hid-axff.o</div><div class='ctx'> obj-$(CONFIG_HID_APPLE)		+= hid-apple.o</div><div class='add'>+obj-$(CONFIG_HID_AUREAL)        += hid-aureal.o</div><div class='ctx'> obj-$(CONFIG_HID_BELKIN)	+= hid-belkin.o</div><div class='ctx'> obj-$(CONFIG_HID_CHERRY)	+= hid-cherry.o</div><div class='ctx'> obj-$(CONFIG_HID_CHICONY)	+= hid-chicony.o</div><div class='head'>diff --git a/drivers/hid/hid-apple.c b/drivers/hid/hid-apple.c<br/>index 299d23871122..fa10f847f7db 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-apple.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-apple.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-apple.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-apple.c</a></div><div class='hunk'>@@ -234,7 +234,7 @@ static int hidinput_apple_event(struct hid_device *hid, struct input_dev *input,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-        if (iso_layout) {</div><div class='add'>+	if (iso_layout) {</div><div class='ctx'> 		if (asc-&gt;quirks &amp; APPLE_ISO_KEYBOARD) {</div><div class='ctx'> 			trans = apple_find_translation(apple_iso_keyboard, usage-&gt;code);</div><div class='ctx'> 			if (trans) {</div><div class='hunk'>@@ -458,6 +458,9 @@ static const struct hid_device_id apple_devices[] = {</div><div class='ctx'> 	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2011_ISO),</div><div class='ctx'> 		.driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN |</div><div class='ctx'> 			APPLE_ISO_KEYBOARD },</div><div class='add'>+	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE,</div><div class='add'>+				USB_DEVICE_ID_APPLE_ALU_WIRELESS_2011_ANSI),</div><div class='add'>+		.driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },</div><div class='ctx'> 	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_JIS),</div><div class='ctx'> 		.driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING_ANSI),</div><div class='head'>diff --git a/drivers/hid/hid-aureal.c b/drivers/hid/hid-aureal.c<br/>new file mode 100644<br/>index 000000000000..ba64b041b8bf<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-aureal.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-aureal.c</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+/*</div><div class='add'>+ *  HID driver for Aureal Cy se W-01RN USB_V3.1 devices</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (c) 2010 Franco Catrin &lt;fcatrin@gmail.com&gt;</div><div class='add'>+ *  Copyright (c) 2010 Ben Cropley &lt;bcropley@internode.on.net&gt;</div><div class='add'>+ *</div><div class='add'>+ *  Based on HID sunplus driver by</div><div class='add'>+ *  Copyright (c) 1999 Andreas Gal</div><div class='add'>+ *  Copyright (c) 2000-2005 Vojtech Pavlik &lt;vojtech@suse.cz&gt;</div><div class='add'>+ *  Copyright (c) 2005 Michael Haboustak &lt;mike-@cinci.rr.com&gt; for Concept2, Inc</div><div class='add'>+ *  Copyright (c) 2006-2007 Jiri Kosina</div><div class='add'>+ *  Copyright (c) 2007 Paul Walmsley</div><div class='add'>+ *  Copyright (c) 2008 Jiri Slaby</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/hid.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hid-ids.h"</div><div class='add'>+</div><div class='add'>+static __u8 *aureal_report_fixup(struct hid_device *hdev, __u8 *rdesc,</div><div class='add'>+		unsigned int *rsize)</div><div class='add'>+{</div><div class='add'>+	if (*rsize &gt;= 54 &amp;&amp; rdesc[52] == 0x25 &amp;&amp; rdesc[53] == 0x01) {</div><div class='add'>+		dev_info(&amp;hdev-&gt;dev, "fixing Aureal Cy se W-01RN USB_V3.1 report descriptor.\n");</div><div class='add'>+		rdesc[53] = 0x65;</div><div class='add'>+	} return rdesc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct hid_device_id aureal_devices[] = {</div><div class='add'>+	{ HID_USB_DEVICE(USB_VENDOR_ID_AUREAL, USB_DEVICE_ID_AUREAL_W01RN) },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(hid, aureal_devices);</div><div class='add'>+</div><div class='add'>+static struct hid_driver aureal_driver = {</div><div class='add'>+	.name = "aureal",</div><div class='add'>+	.id_table = aureal_devices,</div><div class='add'>+	.report_fixup = aureal_report_fixup,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init aureal_init(void)</div><div class='add'>+{</div><div class='add'>+	return hid_register_driver(&amp;aureal_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit aureal_exit(void)</div><div class='add'>+{</div><div class='add'>+	hid_unregister_driver(&amp;aureal_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(aureal_init);</div><div class='add'>+module_exit(aureal_exit);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c<br/>index 4da66b4b977c..8e3a6b261477 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-core.c</a></div><div class='hunk'>@@ -230,9 +230,16 @@ static int hid_add_field(struct hid_parser *parser, unsigned report_type, unsign</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (parser-&gt;global.logical_maximum &lt; parser-&gt;global.logical_minimum) {</div><div class='del'>-		hid_err(parser-&gt;device, "logical range invalid %d %d\n",</div><div class='del'>-				parser-&gt;global.logical_minimum, parser-&gt;global.logical_maximum);</div><div class='add'>+	/* Handle both signed and unsigned cases properly */</div><div class='add'>+	if ((parser-&gt;global.logical_minimum &lt; 0 &amp;&amp;</div><div class='add'>+		parser-&gt;global.logical_maximum &lt;</div><div class='add'>+		parser-&gt;global.logical_minimum) ||</div><div class='add'>+		(parser-&gt;global.logical_minimum &gt;= 0 &amp;&amp;</div><div class='add'>+		(__u32)parser-&gt;global.logical_maximum &lt;</div><div class='add'>+		(__u32)parser-&gt;global.logical_minimum)) {</div><div class='add'>+		dbg_hid("logical range invalid 0x%x 0x%x\n",</div><div class='add'>+			parser-&gt;global.logical_minimum,</div><div class='add'>+			parser-&gt;global.logical_maximum);</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -546,12 +553,11 @@ static void hid_free_report(struct hid_report *report)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Free a device structure, all reports, and all fields.</div><div class='add'>+ * Close report. This function returns the device</div><div class='add'>+ * state to the point prior to hid_open_report().</div><div class='ctx'>  */</div><div class='del'>-</div><div class='del'>-static void hid_device_release(struct device *dev)</div><div class='add'>+static void hid_close_report(struct hid_device *device)</div><div class='ctx'> {</div><div class='del'>-	struct hid_device *device = container_of(dev, struct hid_device, dev);</div><div class='ctx'> 	unsigned i, j;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; HID_REPORT_TYPES; i++) {</div><div class='hunk'>@@ -562,11 +568,34 @@ static void hid_device_release(struct device *dev)</div><div class='ctx'> 			if (report)</div><div class='ctx'> 				hid_free_report(report);</div><div class='ctx'> 		}</div><div class='add'>+		memset(report_enum, 0, sizeof(*report_enum));</div><div class='add'>+		INIT_LIST_HEAD(&amp;report_enum-&gt;report_list);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(device-&gt;rdesc);</div><div class='add'>+	device-&gt;rdesc = NULL;</div><div class='add'>+	device-&gt;rsize = 0;</div><div class='add'>+</div><div class='ctx'> 	kfree(device-&gt;collection);</div><div class='del'>-	kfree(device);</div><div class='add'>+	device-&gt;collection = NULL;</div><div class='add'>+	device-&gt;collection_size = 0;</div><div class='add'>+	device-&gt;maxcollection = 0;</div><div class='add'>+	device-&gt;maxapplication = 0;</div><div class='add'>+</div><div class='add'>+	device-&gt;status &amp;= ~HID_STAT_PARSED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Free a device structure, all reports, and all fields.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void hid_device_release(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct hid_device *hid = container_of(dev, struct hid_device, dev);</div><div class='add'>+</div><div class='add'>+	hid_close_report(hid);</div><div class='add'>+	kfree(hid-&gt;dev_rdesc);</div><div class='add'>+	kfree(hid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -636,6 +665,60 @@ static u8 *fetch_item(__u8 *start, __u8 *end, struct hid_item *item)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void hid_scan_usage(struct hid_device *hid, u32 usage)</div><div class='add'>+{</div><div class='add'>+	if (usage == HID_DG_CONTACTID)</div><div class='add'>+		hid-&gt;group = HID_GROUP_MULTITOUCH;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Scan a report descriptor before the device is added to the bus.</div><div class='add'>+ * Sets device groups and other properties that determine what driver</div><div class='add'>+ * to load.</div><div class='add'>+ */</div><div class='add'>+static int hid_scan_report(struct hid_device *hid)</div><div class='add'>+{</div><div class='add'>+	unsigned int page = 0, delim = 0;</div><div class='add'>+	__u8 *start = hid-&gt;dev_rdesc;</div><div class='add'>+	__u8 *end = start + hid-&gt;dev_rsize;</div><div class='add'>+	unsigned int u, u_min = 0, u_max = 0;</div><div class='add'>+	struct hid_item item;</div><div class='add'>+</div><div class='add'>+	hid-&gt;group = HID_GROUP_GENERIC;</div><div class='add'>+	while ((start = fetch_item(start, end, &amp;item)) != NULL) {</div><div class='add'>+		if (item.format != HID_ITEM_FORMAT_SHORT)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		if (item.type == HID_ITEM_TYPE_GLOBAL) {</div><div class='add'>+			if (item.tag == HID_GLOBAL_ITEM_TAG_USAGE_PAGE)</div><div class='add'>+				page = item_udata(&amp;item) &lt;&lt; 16;</div><div class='add'>+		} else if (item.type == HID_ITEM_TYPE_LOCAL) {</div><div class='add'>+			if (delim &gt; 1)</div><div class='add'>+				break;</div><div class='add'>+			u = item_udata(&amp;item);</div><div class='add'>+			if (item.size &lt;= 2)</div><div class='add'>+				u += page;</div><div class='add'>+			switch (item.tag) {</div><div class='add'>+			case HID_LOCAL_ITEM_TAG_DELIMITER:</div><div class='add'>+				delim += !!u;</div><div class='add'>+				break;</div><div class='add'>+			case HID_LOCAL_ITEM_TAG_USAGE:</div><div class='add'>+				hid_scan_usage(hid, u);</div><div class='add'>+				break;</div><div class='add'>+			case HID_LOCAL_ITEM_TAG_USAGE_MINIMUM:</div><div class='add'>+				u_min = u;</div><div class='add'>+				break;</div><div class='add'>+			case HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM:</div><div class='add'>+				u_max = u;</div><div class='add'>+				for (u = u_min; u &lt;= u_max; u++)</div><div class='add'>+					hid_scan_usage(hid, u);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * hid_parse_report - parse device report</div><div class='ctx'>  *</div><div class='hunk'>@@ -643,15 +726,37 @@ static u8 *fetch_item(__u8 *start, __u8 *end, struct hid_item *item)</div><div class='ctx'>  * @start: report start</div><div class='ctx'>  * @size: report size</div><div class='ctx'>  *</div><div class='add'>+ * Allocate the device report as read by the bus driver. This function should</div><div class='add'>+ * only be called from parse() in ll drivers.</div><div class='add'>+ */</div><div class='add'>+int hid_parse_report(struct hid_device *hid, __u8 *start, unsigned size)</div><div class='add'>+{</div><div class='add'>+	hid-&gt;dev_rdesc = kmemdup(start, size, GFP_KERNEL);</div><div class='add'>+	if (!hid-&gt;dev_rdesc)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	hid-&gt;dev_rsize = size;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(hid_parse_report);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * hid_open_report - open a driver-specific device report</div><div class='add'>+ *</div><div class='add'>+ * @device: hid device</div><div class='add'>+ *</div><div class='ctx'>  * Parse a report description into a hid_device structure. Reports are</div><div class='ctx'>  * enumerated, fields are attached to these reports.</div><div class='ctx'>  * 0 returned on success, otherwise nonzero error value.</div><div class='add'>+ *</div><div class='add'>+ * This function (or the equivalent hid_parse() macro) should only be</div><div class='add'>+ * called from probe() in drivers, before starting the device.</div><div class='ctx'>  */</div><div class='del'>-int hid_parse_report(struct hid_device *device, __u8 *start,</div><div class='del'>-		unsigned size)</div><div class='add'>+int hid_open_report(struct hid_device *device)</div><div class='ctx'> {</div><div class='ctx'> 	struct hid_parser *parser;</div><div class='ctx'> 	struct hid_item item;</div><div class='add'>+	unsigned int size;</div><div class='add'>+	__u8 *start;</div><div class='ctx'> 	__u8 *end;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	static int (*dispatch_type[])(struct hid_parser *parser,</div><div class='hunk'>@@ -662,6 +767,14 @@ int hid_parse_report(struct hid_device *device, __u8 *start,</div><div class='ctx'> 		hid_parser_reserved</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	if (WARN_ON(device-&gt;status &amp; HID_STAT_PARSED))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	start = device-&gt;dev_rdesc;</div><div class='add'>+	if (WARN_ON(!start))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	size = device-&gt;dev_rsize;</div><div class='add'>+</div><div class='ctx'> 	if (device-&gt;driver-&gt;report_fixup)</div><div class='ctx'> 		start = device-&gt;driver-&gt;report_fixup(device, start, &amp;size);</div><div class='ctx'> </div><div class='hunk'>@@ -679,6 +792,15 @@ int hid_parse_report(struct hid_device *device, __u8 *start,</div><div class='ctx'> 	parser-&gt;device = device;</div><div class='ctx'> </div><div class='ctx'> 	end = start + size;</div><div class='add'>+</div><div class='add'>+	device-&gt;collection = kcalloc(HID_DEFAULT_NUM_COLLECTIONS,</div><div class='add'>+				     sizeof(struct hid_collection), GFP_KERNEL);</div><div class='add'>+	if (!device-&gt;collection) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	device-&gt;collection_size = HID_DEFAULT_NUM_COLLECTIONS;</div><div class='add'>+</div><div class='ctx'> 	ret = -EINVAL;</div><div class='ctx'> 	while ((start = fetch_item(start, end, &amp;item)) != NULL) {</div><div class='ctx'> </div><div class='hunk'>@@ -704,6 +826,7 @@ int hid_parse_report(struct hid_device *device, __u8 *start,</div><div class='ctx'> 				goto err;</div><div class='ctx'> 			}</div><div class='ctx'> 			vfree(parser);</div><div class='add'>+			device-&gt;status |= HID_STAT_PARSED;</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -711,9 +834,10 @@ int hid_parse_report(struct hid_device *device, __u8 *start,</div><div class='ctx'> 	hid_err(device, "item fetching failed at offset %d\n", (int)(end - start));</div><div class='ctx'> err:</div><div class='ctx'> 	vfree(parser);</div><div class='add'>+	hid_close_report(device);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(hid_parse_report);</div><div class='add'>+EXPORT_SYMBOL_GPL(hid_open_report);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Convert a signed n-bit integer to signed 32-bit integer. Common</div><div class='hunk'>@@ -1032,7 +1156,7 @@ static struct hid_report *hid_get_report(struct hid_report_enum *report_enum,</div><div class='ctx'> 	return report;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void hid_report_raw_event(struct hid_device *hid, int type, u8 *data, int size,</div><div class='add'>+int hid_report_raw_event(struct hid_device *hid, int type, u8 *data, int size,</div><div class='ctx'> 		int interrupt)</div><div class='ctx'> {</div><div class='ctx'> 	struct hid_report_enum *report_enum = hid-&gt;report_enum + type;</div><div class='hunk'>@@ -1040,10 +1164,11 @@ void hid_report_raw_event(struct hid_device *hid, int type, u8 *data, int size,</div><div class='ctx'> 	unsigned int a;</div><div class='ctx'> 	int rsize, csize = size;</div><div class='ctx'> 	u8 *cdata = data;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	report = hid_get_report(report_enum, data);</div><div class='ctx'> 	if (!report)</div><div class='del'>-		return;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (report_enum-&gt;numbered) {</div><div class='ctx'> 		cdata++;</div><div class='hunk'>@@ -1063,14 +1188,19 @@ void hid_report_raw_event(struct hid_device *hid, int type, u8 *data, int size,</div><div class='ctx'> </div><div class='ctx'> 	if ((hid-&gt;claimed &amp; HID_CLAIMED_HIDDEV) &amp;&amp; hid-&gt;hiddev_report_event)</div><div class='ctx'> 		hid-&gt;hiddev_report_event(hid, report);</div><div class='del'>-	if (hid-&gt;claimed &amp; HID_CLAIMED_HIDRAW)</div><div class='del'>-		hidraw_report_event(hid, data, size);</div><div class='add'>+	if (hid-&gt;claimed &amp; HID_CLAIMED_HIDRAW) {</div><div class='add'>+		ret = hidraw_report_event(hid, data, size);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	for (a = 0; a &lt; report-&gt;maxfield; a++)</div><div class='ctx'> 		hid_input_field(hid, report-&gt;field[a], cdata, interrupt);</div><div class='ctx'> </div><div class='ctx'> 	if (hid-&gt;claimed &amp; HID_CLAIMED_INPUT)</div><div class='ctx'> 		hidinput_report_event(hid, report);</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(hid_report_raw_event);</div><div class='ctx'> </div><div class='hunk'>@@ -1147,7 +1277,7 @@ nomem:</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hid_report_raw_event(hid, type, data, size, interrupt);</div><div class='add'>+	ret = hid_report_raw_event(hid, type, data, size, interrupt);</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='ctx'> 	up(&amp;hid-&gt;driver_lock);</div><div class='hunk'>@@ -1158,7 +1288,8 @@ EXPORT_SYMBOL_GPL(hid_input_report);</div><div class='ctx'> static bool hid_match_one_id(struct hid_device *hdev,</div><div class='ctx'> 		const struct hid_device_id *id)</div><div class='ctx'> {</div><div class='del'>-	return id-&gt;bus == hdev-&gt;bus &amp;&amp;</div><div class='add'>+	return (id-&gt;bus == HID_BUS_ANY || id-&gt;bus == hdev-&gt;bus) &amp;&amp;</div><div class='add'>+		(id-&gt;group == HID_GROUP_ANY || id-&gt;group == hdev-&gt;group) &amp;&amp;</div><div class='ctx'> 		(id-&gt;vendor == HID_ANY_ID || id-&gt;vendor == hdev-&gt;vendor) &amp;&amp;</div><div class='ctx'> 		(id-&gt;product == HID_ANY_ID || id-&gt;product == hdev-&gt;product);</div><div class='ctx'> }</div><div class='hunk'>@@ -1234,10 +1365,6 @@ int hid_connect(struct hid_device *hdev, unsigned int connect_mask)</div><div class='ctx'> 	if ((connect_mask &amp; HID_CONNECT_HIDINPUT) &amp;&amp; !hidinput_connect(hdev,</div><div class='ctx'> 				connect_mask &amp; HID_CONNECT_HIDINPUT_FORCE))</div><div class='ctx'> 		hdev-&gt;claimed |= HID_CLAIMED_INPUT;</div><div class='del'>-	if (hdev-&gt;quirks &amp; HID_QUIRK_MULTITOUCH) {</div><div class='del'>-		/* this device should be handled by hid-multitouch, skip it */</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if ((connect_mask &amp; HID_CONNECT_HIDDEV) &amp;&amp; hdev-&gt;hiddev_connect &amp;&amp;</div><div class='ctx'> 			!hdev-&gt;hiddev_connect(hdev,</div><div class='hunk'>@@ -1314,13 +1441,10 @@ EXPORT_SYMBOL_GPL(hid_disconnect);</div><div class='ctx'> </div><div class='ctx'> /* a list of devices for which there is a specialized driver on HID bus */</div><div class='ctx'> static const struct hid_device_id hid_have_special_driver[] = {</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_3M, USB_DEVICE_ID_3M1968) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_3M, USB_DEVICE_ID_3M2256) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_WCP32PU) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_X5_005D) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_RP_649) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_ACRUX, 0x0802) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_ACTIONSTAR, USB_DEVICE_ID_ACTIONSTAR_1011) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ATV_IRCONTROL) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL4) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MIGHTYMOUSE) },</div><div class='hunk'>@@ -1385,60 +1509,33 @@ static const struct hid_device_id hid_have_special_driver[] = {</div><div class='ctx'> 	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2011_ISO) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUS_T91MT) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUSTEK_MULTITOUCH_YFO) },</div><div class='add'>+	{ HID_USB_DEVICE(USB_VENDOR_ID_AUREAL, USB_DEVICE_ID_AUREAL_W01RN) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_BELKIN, USB_DEVICE_ID_FLIP_KVM) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_BTC, USB_DEVICE_ID_BTC_EMPREX_REMOTE) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_BTC, USB_DEVICE_ID_BTC_EMPREX_REMOTE_2) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_CANDO, USB_DEVICE_ID_CANDO_PIXCIR_MULTI_TOUCH) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_CANDO, USB_DEVICE_ID_CANDO_MULTI_TOUCH) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_CANDO, USB_DEVICE_ID_CANDO_MULTI_TOUCH_10_1) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_CANDO, USB_DEVICE_ID_CANDO_MULTI_TOUCH_11_6) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_CANDO, USB_DEVICE_ID_CANDO_MULTI_TOUCH_15_6) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_CHERRY, USB_DEVICE_ID_CHERRY_CYMOTION) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_CHERRY, USB_DEVICE_ID_CHERRY_CYMOTION_SOLAR) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_TACTICAL_PAD) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_WIRELESS) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_WIRELESS2) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_CHUNGHWAT, USB_DEVICE_ID_CHUNGHWAT_MULTITOUCH) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_CREATIVELABS, USB_DEVICE_ID_PRODIKEYS_PCMIDI) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_CVTOUCH, USB_DEVICE_ID_CVTOUCH_SCREEN) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_1) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_2) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_3) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_MOUSE) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_TRUETOUCH) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, 0x0006) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, 0x0011) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_480D) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_480E) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_720C) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_7224) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_725E) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_726B) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_72A1) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_7302) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_A001) },</div><div class='ctx'> 	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_ELECOM, USB_DEVICE_ID_ELECOM_BM084) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_ELO, USB_DEVICE_ID_ELO_TS2515) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_EMS, USB_DEVICE_ID_EMS_TRIO_LINKER_PLUS_II) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_EZKEY, USB_DEVICE_ID_BTC_8193) },</div><div class='del'>-	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_FRUCTEL, USB_DEVICE_ID_GAMETEL_MT_MODE) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_GAMERON, USB_DEVICE_ID_GAMERON_DUAL_PSX_ADAPTOR) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_GAMERON, USB_DEVICE_ID_GAMERON_DUAL_PCS_ADAPTOR) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, USB_DEVICE_ID_GENERAL_TOUCH_WIN7_TWOFINGERS) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_GOODTOUCH, USB_DEVICE_ID_GOODTOUCH_000f) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_GREENASIA, 0x0003) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_GREENASIA, 0x0012) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_GYRATION, USB_DEVICE_ID_GYRATION_REMOTE) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_GYRATION, USB_DEVICE_ID_GYRATION_REMOTE_2) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_GYRATION, USB_DEVICE_ID_GYRATION_REMOTE_3) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_HANVON, USB_DEVICE_ID_HANVON_MULTITOUCH) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_HANVON_ALT, USB_DEVICE_ID_HANVON_ALT_MULTITOUCH) },</div><div class='del'>- 	{ HID_USB_DEVICE(USB_VENDOR_ID_IDEACOM, USB_DEVICE_ID_IDEACOM_IDC6650) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK, USB_DEVICE_ID_HOLTEK_ON_LINE_GRIP) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_ILITEK, USB_DEVICE_ID_ILITEK_MULTITOUCH) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_IRTOUCHSYSTEMS, USB_DEVICE_ID_IRTOUCH_INFRARED_USB) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_KENSINGTON, USB_DEVICE_ID_KS_SLIMBLADE) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_KEYTOUCH, USB_DEVICE_ID_KEYTOUCH_IEC) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_ERGO_525V) },</div><div class='hunk'>@@ -1447,7 +1544,6 @@ static const struct hid_device_id hid_have_special_driver[] = {</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_EASYPEN_M610X) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_LABTEC, USB_DEVICE_ID_LABTEC_WIRELESS_KEYBOARD) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_LCPOWER, USB_DEVICE_ID_LCPOWER_LC1000 ) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_LG, USB_DEVICE_ID_LG_MULTITOUCH) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_MX3000_RECEIVER) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_S510_RECEIVER) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_S510_RECEIVER_2) },</div><div class='hunk'>@@ -1480,8 +1576,6 @@ static const struct hid_device_id hid_have_special_driver[] = {</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_RUMBLEPAD2) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_SPACETRAVELLER) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_SPACENAVIGATOR) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_LUMIO, USB_DEVICE_ID_CRYSTALTOUCH) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_LUMIO, USB_DEVICE_ID_CRYSTALTOUCH_DUAL) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_PICOLCD) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_PICOLCD_BOOTLOADER) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_MOUSE_4500) },</div><div class='hunk'>@@ -1513,15 +1607,8 @@ static const struct hid_device_id hid_have_special_driver[] = {</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_18) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_PKB1700) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_WKB2000) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_PANASONIC, USB_DEVICE_ID_PANABOARD_UBT780) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_PANASONIC, USB_DEVICE_ID_PANABOARD_UBT880) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_PENMOUNT, USB_DEVICE_ID_PENMOUNT_PCI) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_PETALYNX, USB_DEVICE_ID_PETALYNX_MAXTER_REMOTE) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN1) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN2) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_PRIMAX, USB_DEVICE_ID_PRIMAX_KEYBOARD) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_PIXART_IMAGING_INC_OPTICAL_TOUCH_SCREEN) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_KONE) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_ARVO) },</div><div class='hunk'>@@ -1538,9 +1625,6 @@ static const struct hid_device_id hid_have_special_driver[] = {</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_NAVIGATION_CONTROLLER) },</div><div class='ctx'> 	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_PS3_CONTROLLER) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_VAIO_VGX_MOUSE) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_STANTUM, USB_DEVICE_ID_MTP) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_STANTUM_STM, USB_DEVICE_ID_MTP_STM) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_STANTUM_SITRONIX, USB_DEVICE_ID_MTP_SITRONIX) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_SUNPLUS, USB_DEVICE_ID_SUNPLUS_WDESKTOP) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb300) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb304) },</div><div class='hunk'>@@ -1554,16 +1638,13 @@ static const struct hid_device_id hid_have_special_driver[] = {</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED, USB_DEVICE_ID_TOPSEED_CYBERLINK) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED2, USB_DEVICE_ID_TOPSEED2_RF_COMBO) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_TOUCH_INTL, USB_DEVICE_ID_TOUCH_INTL_MULTI_TOUCH) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_TWINHAN, USB_DEVICE_ID_TWINHAN_IR_REMOTE) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_TURBOX, USB_DEVICE_ID_TURBOX_TOUCHSCREEN_MOSART) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_PF1209) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_WP4030U) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_WP5540U) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_WP8060U) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_WP1062) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_UNITEC, USB_DEVICE_ID_UNITEC_USB_TOUCH_0709) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_UNITEC, USB_DEVICE_ID_UNITEC_USB_TOUCH_0A19) },</div><div class='add'>+	{ HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_WIRELESS_TABLET_TWHL850) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_SMARTJOY_PLUS) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_SUPER_JOY_BOX_3) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_DUAL_USB_JOYPAD) },</div><div class='hunk'>@@ -1578,16 +1659,7 @@ static const struct hid_device_id hid_have_special_driver[] = {</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_PID_0038) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_MEDIA_TABLET_10_6_INCH) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_MEDIA_TABLET_14_1_INCH) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_XAT, USB_DEVICE_ID_XAT_CSR) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_XIROKU, USB_DEVICE_ID_XIROKU_SPX) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_XIROKU, USB_DEVICE_ID_XIROKU_MPX) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_XIROKU, USB_DEVICE_ID_XIROKU_CSR) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_XIROKU, USB_DEVICE_ID_XIROKU_SPX1) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_XIROKU, USB_DEVICE_ID_XIROKU_MPX1) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_XIROKU, USB_DEVICE_ID_XIROKU_CSR1) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_XIROKU, USB_DEVICE_ID_XIROKU_SPX2) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_XIROKU, USB_DEVICE_ID_XIROKU_MPX2) },</div><div class='del'>-	{ HID_USB_DEVICE(USB_VENDOR_ID_XIROKU, USB_DEVICE_ID_XIROKU_CSR2) },</div><div class='add'>+	{ HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_SIRIUS_BATTERY_FREE_TABLET) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_X_TENSIONS, USB_DEVICE_ID_SPEEDLINK_VAD_CEZANNE) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_ZEROPLUS, 0x0005) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_ZEROPLUS, 0x0030) },</div><div class='hunk'>@@ -1631,6 +1703,7 @@ static ssize_t store_new_id(struct device_driver *drv, const char *buf,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	dynid-&gt;id.bus = bus;</div><div class='add'>+	dynid-&gt;id.group = HID_GROUP_ANY;</div><div class='ctx'> 	dynid-&gt;id.vendor = vendor;</div><div class='ctx'> 	dynid-&gt;id.product = product;</div><div class='ctx'> 	dynid-&gt;id.driver_data = driver_data;</div><div class='hunk'>@@ -1679,18 +1752,7 @@ static int hid_bus_match(struct device *dev, struct device_driver *drv)</div><div class='ctx'> 	struct hid_driver *hdrv = container_of(drv, struct hid_driver, driver);</div><div class='ctx'> 	struct hid_device *hdev = container_of(dev, struct hid_device, dev);</div><div class='ctx'> </div><div class='del'>-	if ((hdev-&gt;quirks &amp; HID_QUIRK_MULTITOUCH) &amp;&amp;</div><div class='del'>-		!strncmp(hdrv-&gt;name, "hid-multitouch", 14))</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	if (!hid_match_device(hdev, hdrv))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* generic wants all that don't have specialized driver */</div><div class='del'>-	if (!strncmp(hdrv-&gt;name, "generic-", 8) &amp;&amp; !hid_ignore_special_drivers)</div><div class='del'>-		return !hid_match_id(hdev, hid_have_special_driver);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='add'>+	return hid_match_device(hdev, hdrv) != NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hid_device_probe(struct device *dev)</div><div class='hunk'>@@ -1707,23 +1769,22 @@ static int hid_device_probe(struct device *dev)</div><div class='ctx'> 	if (!hdev-&gt;driver) {</div><div class='ctx'> 		id = hid_match_device(hdev, hdrv);</div><div class='ctx'> 		if (id == NULL) {</div><div class='del'>-			if (!((hdev-&gt;quirks &amp; HID_QUIRK_MULTITOUCH) &amp;&amp;</div><div class='del'>-				!strncmp(hdrv-&gt;name, "hid-multitouch", 14))) {</div><div class='del'>-				ret = -ENODEV;</div><div class='del'>-				goto unlock;</div><div class='del'>-			}</div><div class='add'>+			ret = -ENODEV;</div><div class='add'>+			goto unlock;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		hdev-&gt;driver = hdrv;</div><div class='ctx'> 		if (hdrv-&gt;probe) {</div><div class='ctx'> 			ret = hdrv-&gt;probe(hdev, id);</div><div class='ctx'> 		} else { /* default probe */</div><div class='del'>-			ret = hid_parse(hdev);</div><div class='add'>+			ret = hid_open_report(hdev);</div><div class='ctx'> 			if (!ret)</div><div class='ctx'> 				ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT);</div><div class='ctx'> 		}</div><div class='del'>-		if (ret)</div><div class='add'>+		if (ret) {</div><div class='add'>+			hid_close_report(hdev);</div><div class='ctx'> 			hdev-&gt;driver = NULL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> unlock:</div><div class='ctx'> 	up(&amp;hdev-&gt;driver_lock);</div><div class='hunk'>@@ -1744,6 +1805,7 @@ static int hid_device_remove(struct device *dev)</div><div class='ctx'> 			hdrv-&gt;remove(hdev);</div><div class='ctx'> 		else /* default remove */</div><div class='ctx'> 			hid_hw_stop(hdev);</div><div class='add'>+		hid_close_report(hdev);</div><div class='ctx'> 		hdev-&gt;driver = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1751,6 +1813,23 @@ static int hid_device_remove(struct device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static ssize_t modalias_show(struct device *dev, struct device_attribute *a,</div><div class='add'>+			     char *buf)</div><div class='add'>+{</div><div class='add'>+	struct hid_device *hdev = container_of(dev, struct hid_device, dev);</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	len = snprintf(buf, PAGE_SIZE, "hid:b%04Xg%04Xv%08Xp%08X\n",</div><div class='add'>+		       hdev-&gt;bus, hdev-&gt;group, hdev-&gt;vendor, hdev-&gt;product);</div><div class='add'>+</div><div class='add'>+	return (len &gt;= PAGE_SIZE) ? (PAGE_SIZE - 1) : len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct device_attribute hid_dev_attrs[] = {</div><div class='add'>+	__ATTR_RO(modalias),</div><div class='add'>+	__ATTR_NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int hid_uevent(struct device *dev, struct kobj_uevent_env *env)</div><div class='ctx'> {</div><div class='ctx'> 	struct hid_device *hdev = container_of(dev, struct hid_device, dev);</div><div class='hunk'>@@ -1768,8 +1847,8 @@ static int hid_uevent(struct device *dev, struct kobj_uevent_env *env)</div><div class='ctx'> 	if (add_uevent_var(env, "HID_UNIQ=%s", hdev-&gt;uniq))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (add_uevent_var(env, "MODALIAS=hid:b%04Xv%08Xp%08X",</div><div class='del'>-			hdev-&gt;bus, hdev-&gt;vendor, hdev-&gt;product))</div><div class='add'>+	if (add_uevent_var(env, "MODALIAS=hid:b%04Xg%04Xv%08Xp%08X",</div><div class='add'>+			   hdev-&gt;bus, hdev-&gt;group, hdev-&gt;vendor, hdev-&gt;product))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1777,6 +1856,7 @@ static int hid_uevent(struct device *dev, struct kobj_uevent_env *env)</div><div class='ctx'> </div><div class='ctx'> static struct bus_type hid_bus_type = {</div><div class='ctx'> 	.name		= "hid",</div><div class='add'>+	.dev_attrs	= hid_dev_attrs,</div><div class='ctx'> 	.match		= hid_bus_match,</div><div class='ctx'> 	.probe		= hid_device_probe,</div><div class='ctx'> 	.remove		= hid_device_remove,</div><div class='hunk'>@@ -2075,6 +2155,26 @@ int hid_add_device(struct hid_device *hdev)</div><div class='ctx'>             &amp;&amp; (hid_ignore(hdev) || (hdev-&gt;quirks &amp; HID_QUIRK_IGNORE)))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Read the device report descriptor once and use as template</div><div class='add'>+	 * for the driver-specific modifications.</div><div class='add'>+	 */</div><div class='add'>+	ret = hdev-&gt;ll_driver-&gt;parse(hdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	if (!hdev-&gt;dev_rdesc)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Scan generic devices for group information</div><div class='add'>+	 */</div><div class='add'>+	if (hid_ignore_special_drivers ||</div><div class='add'>+	    !hid_match_id(hdev, hid_have_special_driver)) {</div><div class='add'>+		ret = hid_scan_report(hdev);</div><div class='add'>+		if (ret)</div><div class='add'>+			hid_warn(hdev, "bad device descriptor (%d)\n", ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* XXX hack, any other cleaner solution after the driver core</div><div class='ctx'> 	 * is converted to allow more than 20 bytes as the device name? */</div><div class='ctx'> 	dev_set_name(&amp;hdev-&gt;dev, "%04X:%04X:%04X.%04X", hdev-&gt;bus,</div><div class='hunk'>@@ -2103,7 +2203,6 @@ EXPORT_SYMBOL_GPL(hid_add_device);</div><div class='ctx'> struct hid_device *hid_allocate_device(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct hid_device *hdev;</div><div class='del'>-	unsigned int i;</div><div class='ctx'> 	int ret = -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	hdev = kzalloc(sizeof(*hdev), GFP_KERNEL);</div><div class='hunk'>@@ -2114,23 +2213,13 @@ struct hid_device *hid_allocate_device(void)</div><div class='ctx'> 	hdev-&gt;dev.release = hid_device_release;</div><div class='ctx'> 	hdev-&gt;dev.bus = &amp;hid_bus_type;</div><div class='ctx'> </div><div class='del'>-	hdev-&gt;collection = kcalloc(HID_DEFAULT_NUM_COLLECTIONS,</div><div class='del'>-			sizeof(struct hid_collection), GFP_KERNEL);</div><div class='del'>-	if (hdev-&gt;collection == NULL)</div><div class='del'>-		goto err;</div><div class='del'>-	hdev-&gt;collection_size = HID_DEFAULT_NUM_COLLECTIONS;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; HID_REPORT_TYPES; i++)</div><div class='del'>-		INIT_LIST_HEAD(&amp;hdev-&gt;report_enum[i].report_list);</div><div class='add'>+	hid_close_report(hdev);</div><div class='ctx'> </div><div class='ctx'> 	init_waitqueue_head(&amp;hdev-&gt;debug_wait);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;hdev-&gt;debug_list);</div><div class='ctx'> 	sema_init(&amp;hdev-&gt;driver_lock, 1);</div><div class='ctx'> </div><div class='ctx'> 	return hdev;</div><div class='del'>-err:</div><div class='del'>-	put_device(&amp;hdev-&gt;dev);</div><div class='del'>-	return ERR_PTR(ret);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(hid_allocate_device);</div><div class='ctx'> </div><div class='hunk'>@@ -2141,6 +2230,9 @@ static void hid_remove_device(struct hid_device *hdev)</div><div class='ctx'> 		hid_debug_unregister(hdev);</div><div class='ctx'> 		hdev-&gt;status &amp;= ~HID_STAT_ADDED;</div><div class='ctx'> 	}</div><div class='add'>+	kfree(hdev-&gt;dev_rdesc);</div><div class='add'>+	hdev-&gt;dev_rdesc = NULL;</div><div class='add'>+	hdev-&gt;dev_rsize = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/hid/hid-generic.c b/drivers/hid/hid-generic.c<br/>new file mode 100644<br/>index 000000000000..a8b3148e03a2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-generic.c</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+/*</div><div class='add'>+ *  HID support for Linux</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (c) 1999 Andreas Gal</div><div class='add'>+ *  Copyright (c) 2000-2005 Vojtech Pavlik &lt;vojtech@suse.cz&gt;</div><div class='add'>+ *  Copyright (c) 2005 Michael Haboustak &lt;mike-@cinci.rr.com&gt; for Concept2, Inc</div><div class='add'>+ *  Copyright (c) 2007-2008 Oliver Neukum</div><div class='add'>+ *  Copyright (c) 2006-2012 Jiri Kosina</div><div class='add'>+ *  Copyright (c) 2012 Henrik Rydberg</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License as published by the Free</div><div class='add'>+ * Software Foundation; either version 2 of the License, or (at your option)</div><div class='add'>+ * any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;asm/unaligned.h&gt;</div><div class='add'>+#include &lt;asm/byteorder.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/hid.h&gt;</div><div class='add'>+</div><div class='add'>+static const struct hid_device_id hid_table[] = {</div><div class='add'>+	{ HID_DEVICE(HID_BUS_ANY, HID_GROUP_GENERIC, HID_ANY_ID, HID_ANY_ID) },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(hid, hid_table);</div><div class='add'>+</div><div class='add'>+static struct hid_driver hid_generic = {</div><div class='add'>+	.name = "hid-generic",</div><div class='add'>+	.id_table = hid_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init hid_init(void)</div><div class='add'>+{</div><div class='add'>+	return hid_register_driver(&amp;hid_generic);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit hid_exit(void)</div><div class='add'>+{</div><div class='add'>+	hid_unregister_driver(&amp;hid_generic);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(hid_init);</div><div class='add'>+module_exit(hid_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Henrik Rydberg");</div><div class='add'>+MODULE_DESCRIPTION("HID generic driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/hid/hid-hyperv.c b/drivers/hid/hid-hyperv.c<br/>index 406632472c1b..3d62781b8993 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-hyperv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-hyperv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-hyperv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-hyperv.c</a></div><div class='hunk'>@@ -430,6 +430,15 @@ cleanup:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mousevsc_hid_parse(struct hid_device *hid)</div><div class='add'>+{</div><div class='add'>+	struct hv_device *dev = hid_get_drvdata(hid);</div><div class='add'>+	struct mousevsc_dev *input_dev = hv_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return hid_parse_report(hid, input_dev-&gt;report_desc,</div><div class='add'>+				input_dev-&gt;report_desc_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mousevsc_hid_open(struct hid_device *hid)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -449,6 +458,7 @@ static void mousevsc_hid_stop(struct hid_device *hid)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct hid_ll_driver mousevsc_ll_driver = {</div><div class='add'>+	.parse = mousevsc_hid_parse,</div><div class='ctx'> 	.open = mousevsc_hid_open,</div><div class='ctx'> 	.close = mousevsc_hid_close,</div><div class='ctx'> 	.start = mousevsc_hid_start,</div><div class='hunk'>@@ -506,13 +516,14 @@ static int mousevsc_probe(struct hv_device *device,</div><div class='ctx'> </div><div class='ctx'> 	sprintf(hid_dev-&gt;name, "%s", "Microsoft Vmbus HID-compliant Mouse");</div><div class='ctx'> </div><div class='add'>+	hid_set_drvdata(hid_dev, device);</div><div class='add'>+</div><div class='ctx'> 	ret = hid_add_device(hid_dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto probe_err1;</div><div class='ctx'> </div><div class='del'>-	ret = hid_parse_report(hid_dev, input_dev-&gt;report_desc,</div><div class='del'>-				input_dev-&gt;report_desc_size);</div><div class='ctx'> </div><div class='add'>+	ret = hid_parse(hid_dev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		hid_err(hid_dev, "parse failed\n");</div><div class='ctx'> 		goto probe_err2;</div><div class='head'>diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h<br/>index e39aecb1f9f2..9373f535dfe9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-ids.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-ids.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-ids.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-ids.h</a></div><div class='hunk'>@@ -154,9 +154,15 @@</div><div class='ctx'> #define USB_DEVICE_ID_ATMEL_MULTITOUCH	0x211c</div><div class='ctx'> #define USB_DEVICE_ID_ATMEL_MXT_DIGITIZER	0x2118</div><div class='ctx'> </div><div class='add'>+#define USB_VENDOR_ID_AUREAL		0x0755</div><div class='add'>+#define USB_DEVICE_ID_AUREAL_W01RN	0x2626</div><div class='add'>+</div><div class='ctx'> #define USB_VENDOR_ID_AVERMEDIA		0x07ca</div><div class='ctx'> #define USB_DEVICE_ID_AVER_FM_MR800	0xb800</div><div class='ctx'> </div><div class='add'>+#define USB_VENDOR_ID_BAANTO		0x2453</div><div class='add'>+#define USB_DEVICE_ID_BAANTO_MT_190W2	0x0100</div><div class='add'>+</div><div class='ctx'> #define USB_VENDOR_ID_BELKIN		0x050d</div><div class='ctx'> #define USB_DEVICE_ID_FLIP_KVM		0x3201</div><div class='ctx'> </div><div class='hunk'>@@ -726,6 +732,7 @@</div><div class='ctx'> #define USB_DEVICE_ID_UCLOGIC_TABLET_WP5540U	0x0004</div><div class='ctx'> #define USB_DEVICE_ID_UCLOGIC_TABLET_WP8060U	0x0005</div><div class='ctx'> #define USB_DEVICE_ID_UCLOGIC_TABLET_WP1062	0x0064</div><div class='add'>+#define USB_DEVICE_ID_UCLOGIC_WIRELESS_TABLET_TWHL850	0x0522</div><div class='ctx'> </div><div class='ctx'> #define USB_VENDOR_ID_UNITEC	0x227d</div><div class='ctx'> #define USB_DEVICE_ID_UNITEC_USB_TOUCH_0709	0x0709</div><div class='hunk'>@@ -749,6 +756,7 @@</div><div class='ctx'> #define USB_DEVICE_ID_WALTOP_PID_0038			0x0038</div><div class='ctx'> #define USB_DEVICE_ID_WALTOP_MEDIA_TABLET_10_6_INCH	0x0501</div><div class='ctx'> #define USB_DEVICE_ID_WALTOP_MEDIA_TABLET_14_1_INCH	0x0500</div><div class='add'>+#define USB_DEVICE_ID_WALTOP_SIRIUS_BATTERY_FREE_TABLET	0x0502</div><div class='ctx'> </div><div class='ctx'> #define USB_VENDOR_ID_WISEGROUP		0x0925</div><div class='ctx'> #define USB_DEVICE_ID_SMARTJOY_PLUS	0x0005</div><div class='head'>diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c<br/>index 002781c5a616..132b0019365e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-input.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-input.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-input.c</a></div><div class='hunk'>@@ -225,7 +225,10 @@ static __s32 hidinput_calc_abs_res(const struct hid_field *field, __u16 code)</div><div class='ctx'> 	 * Verify and convert units.</div><div class='ctx'> 	 * See HID specification v1.11 6.2.2.7 Global Items for unit decoding</div><div class='ctx'> 	 */</div><div class='del'>-	if (code == ABS_X || code == ABS_Y || code == ABS_Z) {</div><div class='add'>+	switch (code) {</div><div class='add'>+	case ABS_X:</div><div class='add'>+	case ABS_Y:</div><div class='add'>+	case ABS_Z:</div><div class='ctx'> 		if (field-&gt;unit == 0x11) {		/* If centimeters */</div><div class='ctx'> 			/* Convert to millimeters */</div><div class='ctx'> 			unit_exponent += 1;</div><div class='hunk'>@@ -239,7 +242,13 @@ static __s32 hidinput_calc_abs_res(const struct hid_field *field, __u16 code)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='del'>-	} else if (code == ABS_RX || code == ABS_RY || code == ABS_RZ) {</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ABS_RX:</div><div class='add'>+	case ABS_RY:</div><div class='add'>+	case ABS_RZ:</div><div class='add'>+	case ABS_TILT_X:</div><div class='add'>+	case ABS_TILT_Y:</div><div class='ctx'> 		if (field-&gt;unit == 0x14) {		/* If degrees */</div><div class='ctx'> 			/* Convert to radians */</div><div class='ctx'> 			prev = logical_extents;</div><div class='hunk'>@@ -250,7 +259,9 @@ static __s32 hidinput_calc_abs_res(const struct hid_field *field, __u16 code)</div><div class='ctx'> 		} else if (field-&gt;unit != 0x12) {	/* If not radians */</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -623,6 +634,14 @@ static void hidinput_configure_usage(struct hid_input *hidinput, struct hid_fiel</div><div class='ctx'> 			map_key_clear(BTN_TOOL_RUBBER);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case 0x3d: /* X Tilt */</div><div class='add'>+			map_abs_clear(ABS_TILT_X);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case 0x3e: /* Y Tilt */</div><div class='add'>+			map_abs_clear(ABS_TILT_Y);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		case 0x33: /* Touch */</div><div class='ctx'> 		case 0x42: /* TipSwitch */</div><div class='ctx'> 		case 0x43: /* TipSwitch2 */</div><div class='hunk'>@@ -638,10 +657,6 @@ static void hidinput_configure_usage(struct hid_input *hidinput, struct hid_fiel</div><div class='ctx'> 			map_key_clear(BTN_STYLUS2);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		case 0x51: /* ContactID */</div><div class='del'>-			device-&gt;quirks |= HID_QUIRK_MULTITOUCH;</div><div class='del'>-			goto unknown;</div><div class='del'>-</div><div class='ctx'> 		default:  goto unknown;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1208,13 +1223,6 @@ int hidinput_connect(struct hid_device *hid, unsigned int force)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (hid-&gt;quirks &amp; HID_QUIRK_MULTITOUCH) {</div><div class='del'>-		/* generic hid does not know how to handle multitouch devices */</div><div class='del'>-		if (hidinput)</div><div class='del'>-			goto out_cleanup;</div><div class='del'>-		goto out_unwind;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (hidinput &amp;&amp; input_register_device(hidinput-&gt;input))</div><div class='ctx'> 		goto out_cleanup;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/hid/hid-lg.c b/drivers/hid/hid-lg.c<br/>index e7a7bd1eb34a..fc37ed6b108c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-lg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-lg.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-lg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-lg.c</a></div><div class='hunk'>@@ -109,23 +109,23 @@ static __u8 dfp_rdesc_fixed[] = {</div><div class='ctx'> static __u8 *lg_report_fixup(struct hid_device *hdev, __u8 *rdesc,</div><div class='ctx'> 		unsigned int *rsize)</div><div class='ctx'> {</div><div class='del'>-	unsigned long quirks = (unsigned long)hid_get_drvdata(hdev);</div><div class='add'>+	struct lg_drv_data *drv_data = (struct lg_drv_data *)hid_get_drvdata(hdev);</div><div class='ctx'> </div><div class='del'>-	if ((quirks &amp; LG_RDESC) &amp;&amp; *rsize &gt;= 90 &amp;&amp; rdesc[83] == 0x26 &amp;&amp;</div><div class='add'>+	if ((drv_data-&gt;quirks &amp; LG_RDESC) &amp;&amp; *rsize &gt;= 90 &amp;&amp; rdesc[83] == 0x26 &amp;&amp;</div><div class='ctx'> 			rdesc[84] == 0x8c &amp;&amp; rdesc[85] == 0x02) {</div><div class='ctx'> 		hid_info(hdev,</div><div class='ctx'> 			 "fixing up Logitech keyboard report descriptor\n");</div><div class='ctx'> 		rdesc[84] = rdesc[89] = 0x4d;</div><div class='ctx'> 		rdesc[85] = rdesc[90] = 0x10;</div><div class='ctx'> 	}</div><div class='del'>-	if ((quirks &amp; LG_RDESC_REL_ABS) &amp;&amp; *rsize &gt;= 50 &amp;&amp;</div><div class='add'>+	if ((drv_data-&gt;quirks &amp; LG_RDESC_REL_ABS) &amp;&amp; *rsize &gt;= 50 &amp;&amp;</div><div class='ctx'> 			rdesc[32] == 0x81 &amp;&amp; rdesc[33] == 0x06 &amp;&amp;</div><div class='ctx'> 			rdesc[49] == 0x81 &amp;&amp; rdesc[50] == 0x06) {</div><div class='ctx'> 		hid_info(hdev,</div><div class='ctx'> 			 "fixing up rel/abs in Logitech report descriptor\n");</div><div class='ctx'> 		rdesc[33] = rdesc[50] = 0x02;</div><div class='ctx'> 	}</div><div class='del'>-	if ((quirks &amp; LG_FF4) &amp;&amp; *rsize &gt;= 101 &amp;&amp;</div><div class='add'>+	if ((drv_data-&gt;quirks &amp; LG_FF4) &amp;&amp; *rsize &gt;= 101 &amp;&amp;</div><div class='ctx'> 			rdesc[41] == 0x95 &amp;&amp; rdesc[42] == 0x0B &amp;&amp;</div><div class='ctx'> 			rdesc[47] == 0x05 &amp;&amp; rdesc[48] == 0x09) {</div><div class='ctx'> 		hid_info(hdev, "fixing up Logitech Speed Force Wireless button descriptor\n");</div><div class='hunk'>@@ -278,7 +278,7 @@ static int lg_input_mapping(struct hid_device *hdev, struct hid_input *hi,</div><div class='ctx'> 		  0,  0,  0,  0,  0,183,184,185,186,187,</div><div class='ctx'> 		188,189,190,191,192,193,194,  0,  0,  0</div><div class='ctx'> 	};</div><div class='del'>-	unsigned long quirks = (unsigned long)hid_get_drvdata(hdev);</div><div class='add'>+	struct lg_drv_data *drv_data = (struct lg_drv_data *)hid_get_drvdata(hdev);</div><div class='ctx'> 	unsigned int hid = usage-&gt;hid;</div><div class='ctx'> </div><div class='ctx'> 	if (hdev-&gt;product == USB_DEVICE_ID_LOGITECH_RECEIVER &amp;&amp;</div><div class='hunk'>@@ -289,7 +289,7 @@ static int lg_input_mapping(struct hid_device *hdev, struct hid_input *hi,</div><div class='ctx'> 			lg_dinovo_mapping(hi, usage, bit, max))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='del'>-	if ((quirks &amp; LG_WIRELESS) &amp;&amp; lg_wireless_mapping(hi, usage, bit, max))</div><div class='add'>+	if ((drv_data-&gt;quirks &amp; LG_WIRELESS) &amp;&amp; lg_wireless_mapping(hi, usage, bit, max))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	if ((hid &amp; HID_USAGE_PAGE) != HID_UP_BUTTON)</div><div class='hunk'>@@ -299,11 +299,11 @@ static int lg_input_mapping(struct hid_device *hdev, struct hid_input *hi,</div><div class='ctx'> </div><div class='ctx'> 	/* Special handling for Logitech Cordless Desktop */</div><div class='ctx'> 	if (field-&gt;application == HID_GD_MOUSE) {</div><div class='del'>-		if ((quirks &amp; LG_IGNORE_DOUBLED_WHEEL) &amp;&amp;</div><div class='add'>+		if ((drv_data-&gt;quirks &amp; LG_IGNORE_DOUBLED_WHEEL) &amp;&amp;</div><div class='ctx'> 				(hid == 7 || hid == 8))</div><div class='ctx'> 			return -1;</div><div class='ctx'> 	} else {</div><div class='del'>-		if ((quirks &amp; LG_EXPANDED_KEYMAP) &amp;&amp;</div><div class='add'>+		if ((drv_data-&gt;quirks &amp; LG_EXPANDED_KEYMAP) &amp;&amp;</div><div class='ctx'> 				hid &lt; ARRAY_SIZE(e_keymap) &amp;&amp;</div><div class='ctx'> 				e_keymap[hid] != 0) {</div><div class='ctx'> 			hid_map_usage(hi, usage, bit, max, EV_KEY,</div><div class='hunk'>@@ -319,13 +319,13 @@ static int lg_input_mapped(struct hid_device *hdev, struct hid_input *hi,</div><div class='ctx'> 		struct hid_field *field, struct hid_usage *usage,</div><div class='ctx'> 		unsigned long **bit, int *max)</div><div class='ctx'> {</div><div class='del'>-	unsigned long quirks = (unsigned long)hid_get_drvdata(hdev);</div><div class='add'>+	struct lg_drv_data *drv_data = (struct lg_drv_data *)hid_get_drvdata(hdev);</div><div class='ctx'> </div><div class='del'>-	if ((quirks &amp; LG_BAD_RELATIVE_KEYS) &amp;&amp; usage-&gt;type == EV_KEY &amp;&amp;</div><div class='add'>+	if ((drv_data-&gt;quirks &amp; LG_BAD_RELATIVE_KEYS) &amp;&amp; usage-&gt;type == EV_KEY &amp;&amp;</div><div class='ctx'> 			(field-&gt;flags &amp; HID_MAIN_ITEM_RELATIVE))</div><div class='ctx'> 		field-&gt;flags &amp;= ~HID_MAIN_ITEM_RELATIVE;</div><div class='ctx'> </div><div class='del'>-	if ((quirks &amp; LG_DUPLICATE_USAGES) &amp;&amp; (usage-&gt;type == EV_KEY ||</div><div class='add'>+	if ((drv_data-&gt;quirks &amp; LG_DUPLICATE_USAGES) &amp;&amp; (usage-&gt;type == EV_KEY ||</div><div class='ctx'> 			 usage-&gt;type == EV_REL || usage-&gt;type == EV_ABS))</div><div class='ctx'> 		clear_bit(usage-&gt;code, *bit);</div><div class='ctx'> </div><div class='hunk'>@@ -335,9 +335,9 @@ static int lg_input_mapped(struct hid_device *hdev, struct hid_input *hi,</div><div class='ctx'> static int lg_event(struct hid_device *hdev, struct hid_field *field,</div><div class='ctx'> 		struct hid_usage *usage, __s32 value)</div><div class='ctx'> {</div><div class='del'>-	unsigned long quirks = (unsigned long)hid_get_drvdata(hdev);</div><div class='add'>+	struct lg_drv_data *drv_data = (struct lg_drv_data *)hid_get_drvdata(hdev);</div><div class='ctx'> </div><div class='del'>-	if ((quirks &amp; LG_INVERT_HWHEEL) &amp;&amp; usage-&gt;code == REL_HWHEEL) {</div><div class='add'>+	if ((drv_data-&gt;quirks &amp; LG_INVERT_HWHEEL) &amp;&amp; usage-&gt;code == REL_HWHEEL) {</div><div class='ctx'> 		input_event(field-&gt;hidinput-&gt;input, usage-&gt;type, usage-&gt;code,</div><div class='ctx'> 				-value);</div><div class='ctx'> 		return 1;</div><div class='hunk'>@@ -348,13 +348,20 @@ static int lg_event(struct hid_device *hdev, struct hid_field *field,</div><div class='ctx'> </div><div class='ctx'> static int lg_probe(struct hid_device *hdev, const struct hid_device_id *id)</div><div class='ctx'> {</div><div class='del'>-	unsigned long quirks = id-&gt;driver_data;</div><div class='ctx'> 	unsigned int connect_mask = HID_CONNECT_DEFAULT;</div><div class='add'>+	struct lg_drv_data *drv_data;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	hid_set_drvdata(hdev, (void *)quirks);</div><div class='add'>+	drv_data = kzalloc(sizeof(struct lg_drv_data), GFP_KERNEL);</div><div class='add'>+	if (!drv_data) {</div><div class='add'>+		hid_err(hdev, "Insufficient memory, cannot allocate driver data\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	drv_data-&gt;quirks = id-&gt;driver_data;</div><div class='add'>+	</div><div class='add'>+	hid_set_drvdata(hdev, (void *)drv_data);</div><div class='ctx'> </div><div class='del'>-	if (quirks &amp; LG_NOGET)</div><div class='add'>+	if (drv_data-&gt;quirks &amp; LG_NOGET)</div><div class='ctx'> 		hdev-&gt;quirks |= HID_QUIRK_NOGET;</div><div class='ctx'> </div><div class='ctx'> 	ret = hid_parse(hdev);</div><div class='hunk'>@@ -363,7 +370,7 @@ static int lg_probe(struct hid_device *hdev, const struct hid_device_id *id)</div><div class='ctx'> 		goto err_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (quirks &amp; (LG_FF | LG_FF2 | LG_FF3 | LG_FF4))</div><div class='add'>+	if (drv_data-&gt;quirks &amp; (LG_FF | LG_FF2 | LG_FF3 | LG_FF4))</div><div class='ctx'> 		connect_mask &amp;= ~HID_CONNECT_FF;</div><div class='ctx'> </div><div class='ctx'> 	ret = hid_hw_start(hdev, connect_mask);</div><div class='hunk'>@@ -392,27 +399,29 @@ static int lg_probe(struct hid_device *hdev, const struct hid_device_id *id)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (quirks &amp; LG_FF)</div><div class='add'>+	if (drv_data-&gt;quirks &amp; LG_FF)</div><div class='ctx'> 		lgff_init(hdev);</div><div class='del'>-	if (quirks &amp; LG_FF2)</div><div class='add'>+	if (drv_data-&gt;quirks &amp; LG_FF2)</div><div class='ctx'> 		lg2ff_init(hdev);</div><div class='del'>-	if (quirks &amp; LG_FF3)</div><div class='add'>+	if (drv_data-&gt;quirks &amp; LG_FF3)</div><div class='ctx'> 		lg3ff_init(hdev);</div><div class='del'>-	if (quirks &amp; LG_FF4)</div><div class='add'>+	if (drv_data-&gt;quirks &amp; LG_FF4)</div><div class='ctx'> 		lg4ff_init(hdev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> err_free:</div><div class='add'>+	kfree(drv_data);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lg_remove(struct hid_device *hdev)</div><div class='ctx'> {</div><div class='del'>-	unsigned long quirks = (unsigned long)hid_get_drvdata(hdev);</div><div class='del'>-	if(quirks &amp; LG_FF4)</div><div class='add'>+	struct lg_drv_data *drv_data = (struct lg_drv_data *)hid_get_drvdata(hdev);</div><div class='add'>+	if (drv_data-&gt;quirks &amp; LG_FF4)</div><div class='ctx'> 		lg4ff_deinit(hdev);</div><div class='ctx'> </div><div class='ctx'> 	hid_hw_stop(hdev);</div><div class='add'>+	kfree(drv_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct hid_device_id lg_devices[] = {</div><div class='head'>diff --git a/drivers/hid/hid-lg.h b/drivers/hid/hid-lg.h<br/>index 4b097286dc78..d64cf8d2751e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-lg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-lg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-lg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-lg.h</a></div><div class='hunk'>@@ -1,6 +1,11 @@</div><div class='ctx'> #ifndef __HID_LG_H</div><div class='ctx'> #define __HID_LG_H</div><div class='ctx'> </div><div class='add'>+struct lg_drv_data {</div><div class='add'>+	unsigned long quirks;</div><div class='add'>+	void *device_props;	/* Device specific properties */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_LOGITECH_FF</div><div class='ctx'> int lgff_init(struct hid_device *hdev);</div><div class='ctx'> #else</div><div class='head'>diff --git a/drivers/hid/hid-lg4ff.c b/drivers/hid/hid-lg4ff.c<br/>index 6ecc9e220440..f3390ee6105c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-lg4ff.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-lg4ff.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-lg4ff.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-lg4ff.c</a></div><div class='hunk'>@@ -1,7 +1,8 @@</div><div class='ctx'> /*</div><div class='del'>- *  Force feedback support for Logitech Speed Force Wireless</div><div class='add'>+ *  Force feedback support for Logitech Gaming Wheels</div><div class='ctx'>  *</div><div class='del'>- *  http://wiibrew.org/wiki/Logitech_USB_steering_wheel</div><div class='add'>+ *  Including G27, G25, DFP, DFGT, FFEX, Momo, Momo2 &amp;</div><div class='add'>+ *  Speed Force Wireless (WiiWheel)</div><div class='ctx'>  *</div><div class='ctx'>  *  Copyright (c) 2010 Simon Wood &lt;simon@mungewell.org&gt;</div><div class='ctx'>  */</div><div class='hunk'>@@ -51,20 +52,18 @@ static ssize_t lg4ff_range_store(struct device *dev, struct device_attribute *at</div><div class='ctx'> </div><div class='ctx'> static DEVICE_ATTR(range, S_IRWXU | S_IRWXG | S_IRWXO, lg4ff_range_show, lg4ff_range_store);</div><div class='ctx'> </div><div class='del'>-static bool list_inited;</div><div class='del'>-</div><div class='ctx'> struct lg4ff_device_entry {</div><div class='del'>-	char  *device_id;	/* Use name in respective kobject structure's address as the ID */</div><div class='ctx'> 	__u16 range;</div><div class='ctx'> 	__u16 min_range;</div><div class='ctx'> 	__u16 max_range;</div><div class='del'>-	__u8  leds;</div><div class='add'>+#ifdef CONFIG_LEDS_CLASS</div><div class='add'>+	__u8  led_state;</div><div class='add'>+	struct led_classdev *led[5];</div><div class='add'>+#endif</div><div class='ctx'> 	struct list_head list;</div><div class='ctx'> 	void (*set_range)(struct hid_device *hid, u16 range);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct lg4ff_device_entry device_list;</div><div class='del'>-</div><div class='ctx'> static const signed short lg4ff_wheel_effects[] = {</div><div class='ctx'> 	FF_CONSTANT,</div><div class='ctx'> 	FF_AUTOCENTER,</div><div class='hunk'>@@ -285,18 +284,20 @@ static void hid_lg4ff_switch_native(struct hid_device *hid, const struct lg4ff_n</div><div class='ctx'> /* Read current range and display it in terminal */</div><div class='ctx'> static ssize_t lg4ff_range_show(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct lg4ff_device_entry *uninitialized_var(entry);</div><div class='del'>-	struct list_head *h;</div><div class='ctx'> 	struct hid_device *hid = to_hid_device(dev);</div><div class='add'>+	struct lg4ff_device_entry *entry;</div><div class='add'>+	struct lg_drv_data *drv_data;</div><div class='ctx'> 	size_t count;</div><div class='ctx'> </div><div class='del'>-	list_for_each(h, &amp;device_list.list) {</div><div class='del'>-		entry = list_entry(h, struct lg4ff_device_entry, list);</div><div class='del'>-		if (strcmp(entry-&gt;device_id, (&amp;hid-&gt;dev)-&gt;kobj.name) == 0)</div><div class='del'>-			break;</div><div class='add'>+	drv_data = hid_get_drvdata(hid);</div><div class='add'>+	if (!drv_data) {</div><div class='add'>+		hid_err(hid, "Private driver data not found!\n");</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	if (h == &amp;device_list.list) {</div><div class='del'>-		dbg_hid("Device not found!");</div><div class='add'>+</div><div class='add'>+	entry = drv_data-&gt;device_props;</div><div class='add'>+	if (!entry) {</div><div class='add'>+		hid_err(hid, "Device properties not found!\n");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -308,19 +309,21 @@ static ssize_t lg4ff_range_show(struct device *dev, struct device_attribute *att</div><div class='ctx'>  * according to the type of the wheel */</div><div class='ctx'> static ssize_t lg4ff_range_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)</div><div class='ctx'> {</div><div class='del'>-	struct lg4ff_device_entry *uninitialized_var(entry);</div><div class='del'>-	struct list_head *h;</div><div class='ctx'> 	struct hid_device *hid = to_hid_device(dev);</div><div class='add'>+	struct lg4ff_device_entry *entry;</div><div class='add'>+	struct lg_drv_data *drv_data;</div><div class='ctx'> 	__u16 range = simple_strtoul(buf, NULL, 10);</div><div class='ctx'> </div><div class='del'>-	list_for_each(h, &amp;device_list.list) {</div><div class='del'>-		entry = list_entry(h, struct lg4ff_device_entry, list);</div><div class='del'>-		if (strcmp(entry-&gt;device_id, (&amp;hid-&gt;dev)-&gt;kobj.name) == 0)</div><div class='del'>-			break;</div><div class='add'>+	drv_data = hid_get_drvdata(hid);</div><div class='add'>+	if (!drv_data) {</div><div class='add'>+		hid_err(hid, "Private driver data not found!\n");</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	if (h == &amp;device_list.list) {</div><div class='del'>-		dbg_hid("Device not found!");</div><div class='del'>-		return count;</div><div class='add'>+</div><div class='add'>+	entry = drv_data-&gt;device_props;</div><div class='add'>+	if (!entry) {</div><div class='add'>+		hid_err(hid, "Device properties not found!\n");</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (range == 0)</div><div class='hunk'>@@ -336,6 +339,88 @@ static ssize_t lg4ff_range_store(struct device *dev, struct device_attribute *at</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_LEDS_CLASS</div><div class='add'>+static void lg4ff_set_leds(struct hid_device *hid, __u8 leds)</div><div class='add'>+{</div><div class='add'>+	struct list_head *report_list = &amp;hid-&gt;report_enum[HID_OUTPUT_REPORT].report_list;</div><div class='add'>+	struct hid_report *report = list_entry(report_list-&gt;next, struct hid_report, list);</div><div class='add'>+</div><div class='add'>+	report-&gt;field[0]-&gt;value[0] = 0xf8;</div><div class='add'>+	report-&gt;field[0]-&gt;value[1] = 0x12;</div><div class='add'>+	report-&gt;field[0]-&gt;value[2] = leds;</div><div class='add'>+	report-&gt;field[0]-&gt;value[3] = 0x00;</div><div class='add'>+	report-&gt;field[0]-&gt;value[4] = 0x00;</div><div class='add'>+	report-&gt;field[0]-&gt;value[5] = 0x00;</div><div class='add'>+	report-&gt;field[0]-&gt;value[6] = 0x00;</div><div class='add'>+	usbhid_submit_report(hid, report, USB_DIR_OUT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lg4ff_led_set_brightness(struct led_classdev *led_cdev,</div><div class='add'>+			enum led_brightness value)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = led_cdev-&gt;dev-&gt;parent;</div><div class='add'>+	struct hid_device *hid = container_of(dev, struct hid_device, dev);</div><div class='add'>+	struct lg_drv_data *drv_data = (struct lg_drv_data *)hid_get_drvdata(hid);</div><div class='add'>+	struct lg4ff_device_entry *entry;</div><div class='add'>+	int i, state = 0;</div><div class='add'>+</div><div class='add'>+	if (!drv_data) {</div><div class='add'>+		hid_err(hid, "Device data not found.");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	entry = (struct lg4ff_device_entry *)drv_data-&gt;device_props;</div><div class='add'>+</div><div class='add'>+	if (!entry) {</div><div class='add'>+		hid_err(hid, "Device properties not found.");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 5; i++) {</div><div class='add'>+		if (led_cdev != entry-&gt;led[i])</div><div class='add'>+			continue;</div><div class='add'>+		state = (entry-&gt;led_state &gt;&gt; i) &amp; 1;</div><div class='add'>+		if (value == LED_OFF &amp;&amp; state) {</div><div class='add'>+			entry-&gt;led_state &amp;= ~(1 &lt;&lt; i);</div><div class='add'>+			lg4ff_set_leds(hid, entry-&gt;led_state);</div><div class='add'>+		} else if (value != LED_OFF &amp;&amp; !state) {</div><div class='add'>+			entry-&gt;led_state |= 1 &lt;&lt; i;</div><div class='add'>+			lg4ff_set_leds(hid, entry-&gt;led_state);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum led_brightness lg4ff_led_get_brightness(struct led_classdev *led_cdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = led_cdev-&gt;dev-&gt;parent;</div><div class='add'>+	struct hid_device *hid = container_of(dev, struct hid_device, dev);</div><div class='add'>+	struct lg_drv_data *drv_data = (struct lg_drv_data *)hid_get_drvdata(hid);</div><div class='add'>+	struct lg4ff_device_entry *entry;</div><div class='add'>+	int i, value = 0;</div><div class='add'>+</div><div class='add'>+	if (!drv_data) {</div><div class='add'>+		hid_err(hid, "Device data not found.");</div><div class='add'>+		return LED_OFF;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	entry = (struct lg4ff_device_entry *)drv_data-&gt;device_props;</div><div class='add'>+</div><div class='add'>+	if (!entry) {</div><div class='add'>+		hid_err(hid, "Device properties not found.");</div><div class='add'>+		return LED_OFF;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 5; i++)</div><div class='add'>+		if (led_cdev == entry-&gt;led[i]) {</div><div class='add'>+			value = (entry-&gt;led_state &gt;&gt; i) &amp; 1;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	return value ? LED_FULL : LED_OFF;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> int lg4ff_init(struct hid_device *hid)</div><div class='ctx'> {</div><div class='ctx'> 	struct hid_input *hidinput = list_entry(hid-&gt;inputs.next, struct hid_input, list);</div><div class='hunk'>@@ -344,6 +429,7 @@ int lg4ff_init(struct hid_device *hid)</div><div class='ctx'> 	struct hid_report *report;</div><div class='ctx'> 	struct hid_field *field;</div><div class='ctx'> 	struct lg4ff_device_entry *entry;</div><div class='add'>+	struct lg_drv_data *drv_data;</div><div class='ctx'> 	struct usb_device_descriptor *udesc;</div><div class='ctx'> 	int error, i, j;</div><div class='ctx'> 	__u16 bcdDevice, rev_maj, rev_min;</div><div class='hunk'>@@ -423,28 +509,24 @@ int lg4ff_init(struct hid_device *hid)</div><div class='ctx'> 		dev-&gt;ff-&gt;set_autocenter(dev, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-		/* Initialize device_list if this is the first device to handle by lg4ff */</div><div class='del'>-	if (!list_inited) {</div><div class='del'>-		INIT_LIST_HEAD(&amp;device_list.list);</div><div class='del'>-		list_inited = 1;</div><div class='add'>+	/* Get private driver data */</div><div class='add'>+	drv_data = hid_get_drvdata(hid);</div><div class='add'>+	if (!drv_data) {</div><div class='add'>+		hid_err(hid, "Cannot add device, private driver data not allocated\n");</div><div class='add'>+		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Add the device to device_list */</div><div class='add'>+	/* Initialize device properties */</div><div class='ctx'> 	entry = kzalloc(sizeof(struct lg4ff_device_entry), GFP_KERNEL);</div><div class='ctx'> 	if (!entry) {</div><div class='del'>-		hid_err(hid, "Cannot add device, insufficient memory.\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	entry-&gt;device_id = kstrdup((&amp;hid-&gt;dev)-&gt;kobj.name, GFP_KERNEL);</div><div class='del'>-	if (!entry-&gt;device_id) {</div><div class='del'>-		hid_err(hid, "Cannot set device_id, insufficient memory.\n");</div><div class='del'>-		kfree(entry);</div><div class='add'>+		hid_err(hid, "Cannot add device, insufficient memory to allocate device properties.\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='add'>+	drv_data-&gt;device_props = entry;</div><div class='add'>+</div><div class='ctx'> 	entry-&gt;min_range = lg4ff_devices[i].min_range;</div><div class='ctx'> 	entry-&gt;max_range = lg4ff_devices[i].max_range;</div><div class='ctx'> 	entry-&gt;set_range = lg4ff_devices[i].set_range;</div><div class='del'>-	list_add(&amp;entry-&gt;list, &amp;device_list.list);</div><div class='ctx'> </div><div class='ctx'> 	/* Create sysfs interface */</div><div class='ctx'> 	error = device_create_file(&amp;hid-&gt;dev, &amp;dev_attr_range);</div><div class='hunk'>@@ -457,32 +539,100 @@ int lg4ff_init(struct hid_device *hid)</div><div class='ctx'> 	if (entry-&gt;set_range != NULL)</div><div class='ctx'> 		entry-&gt;set_range(hid, entry-&gt;range);</div><div class='ctx'> </div><div class='del'>-	hid_info(hid, "Force feedback for Logitech Speed Force Wireless by Simon Wood &lt;simon@mungewell.org&gt;\n");</div><div class='add'>+#ifdef CONFIG_LEDS_CLASS</div><div class='add'>+	/* register led subsystem - G27 only */</div><div class='add'>+	entry-&gt;led_state = 0;</div><div class='add'>+	for (j = 0; j &lt; 5; j++)</div><div class='add'>+		entry-&gt;led[j] = NULL;</div><div class='add'>+</div><div class='add'>+	if (lg4ff_devices[i].product_id == USB_DEVICE_ID_LOGITECH_G27_WHEEL) {</div><div class='add'>+		struct led_classdev *led;</div><div class='add'>+		size_t name_sz;</div><div class='add'>+		char *name;</div><div class='add'>+</div><div class='add'>+		lg4ff_set_leds(hid, 0);</div><div class='add'>+</div><div class='add'>+		name_sz = strlen(dev_name(&amp;hid-&gt;dev)) + 8;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; 5; j++) {</div><div class='add'>+			led = kzalloc(sizeof(struct led_classdev)+name_sz, GFP_KERNEL);</div><div class='add'>+			if (!led) {</div><div class='add'>+				hid_err(hid, "can't allocate memory for LED %d\n", j);</div><div class='add'>+				goto err;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			name = (void *)(&amp;led[1]);</div><div class='add'>+			snprintf(name, name_sz, "%s::RPM%d", dev_name(&amp;hid-&gt;dev), j+1);</div><div class='add'>+			led-&gt;name = name;</div><div class='add'>+			led-&gt;brightness = 0;</div><div class='add'>+			led-&gt;max_brightness = 1;</div><div class='add'>+			led-&gt;brightness_get = lg4ff_led_get_brightness;</div><div class='add'>+			led-&gt;brightness_set = lg4ff_led_set_brightness;</div><div class='add'>+</div><div class='add'>+			entry-&gt;led[j] = led;</div><div class='add'>+			error = led_classdev_register(&amp;hid-&gt;dev, led);</div><div class='add'>+</div><div class='add'>+			if (error) {</div><div class='add'>+				hid_err(hid, "failed to register LED %d. Aborting.\n", j);</div><div class='add'>+err:</div><div class='add'>+				/* Deregister LEDs (if any) */</div><div class='add'>+				for (j = 0; j &lt; 5; j++) {</div><div class='add'>+					led = entry-&gt;led[j];</div><div class='add'>+					entry-&gt;led[j] = NULL;</div><div class='add'>+					if (!led)</div><div class='add'>+						continue;</div><div class='add'>+					led_classdev_unregister(led);</div><div class='add'>+					kfree(led);</div><div class='add'>+				}</div><div class='add'>+				goto out;	/* Let the driver continue without LEDs */</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+#endif</div><div class='add'>+	hid_info(hid, "Force feedback support for Logitech Gaming Wheels\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int lg4ff_deinit(struct hid_device *hid)</div><div class='ctx'> {</div><div class='del'>-	bool found = 0;</div><div class='ctx'> 	struct lg4ff_device_entry *entry;</div><div class='del'>-	struct list_head *h, *g;</div><div class='del'>-	list_for_each_safe(h, g, &amp;device_list.list) {</div><div class='del'>-		entry = list_entry(h, struct lg4ff_device_entry, list);</div><div class='del'>-		if (strcmp(entry-&gt;device_id, (&amp;hid-&gt;dev)-&gt;kobj.name) == 0) {</div><div class='del'>-			list_del(h);</div><div class='del'>-			kfree(entry-&gt;device_id);</div><div class='del'>-			kfree(entry);</div><div class='del'>-			found = 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	struct lg_drv_data *drv_data;</div><div class='add'>+</div><div class='add'>+	device_remove_file(&amp;hid-&gt;dev, &amp;dev_attr_range);</div><div class='ctx'> </div><div class='del'>-	if (!found) {</div><div class='del'>-		dbg_hid("Device entry not found!\n");</div><div class='add'>+	drv_data = hid_get_drvdata(hid);</div><div class='add'>+	if (!drv_data) {</div><div class='add'>+		hid_err(hid, "Error while deinitializing device, no private driver data.\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	entry = drv_data-&gt;device_props;</div><div class='add'>+	if (!entry) {</div><div class='add'>+		hid_err(hid, "Error while deinitializing device, no device properties data.\n");</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	device_remove_file(&amp;hid-&gt;dev, &amp;dev_attr_range);</div><div class='add'>+#ifdef CONFIG_LEDS_CLASS</div><div class='add'>+	{</div><div class='add'>+		int j;</div><div class='add'>+		struct led_classdev *led;</div><div class='add'>+</div><div class='add'>+		/* Deregister LEDs (if any) */</div><div class='add'>+		for (j = 0; j &lt; 5; j++) {</div><div class='add'>+</div><div class='add'>+			led = entry-&gt;led[j];</div><div class='add'>+			entry-&gt;led[j] = NULL;</div><div class='add'>+			if (!led)</div><div class='add'>+				continue;</div><div class='add'>+			led_classdev_unregister(led);</div><div class='add'>+			kfree(led);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* Deallocate memory */</div><div class='add'>+	kfree(entry);</div><div class='add'>+</div><div class='ctx'> 	dbg_hid("Device successfully unregistered\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/hid/hid-logitech-dj.c b/drivers/hid/hid-logitech-dj.c<br/>index 2b56efcbdf61..5e8a7ed42344 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-logitech-dj.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-logitech-dj.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-logitech-dj.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-logitech-dj.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include &lt;linux/hid.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='add'>+#include &lt;asm/unaligned.h&gt;</div><div class='ctx'> #include "usbhid/usbhid.h"</div><div class='ctx'> #include "hid-ids.h"</div><div class='ctx'> #include "hid-logitech-dj.h"</div><div class='hunk'>@@ -155,6 +156,14 @@ static const char media_descriptor[] = {</div><div class='ctx'> /* Maximum size of all defined hid reports in bytes (including report id) */</div><div class='ctx'> #define MAX_REPORT_SIZE 8</div><div class='ctx'> </div><div class='add'>+/* Make sure all descriptors are present here */</div><div class='add'>+#define MAX_RDESC_SIZE				\</div><div class='add'>+	(sizeof(kbd_descriptor) +		\</div><div class='add'>+	 sizeof(mse_descriptor) +		\</div><div class='add'>+	 sizeof(consumer_descriptor) +		\</div><div class='add'>+	 sizeof(syscontrol_descriptor) +	\</div><div class='add'>+	 sizeof(media_descriptor))</div><div class='add'>+</div><div class='ctx'> /* Number of possible hid report types that can be created by this driver.</div><div class='ctx'>  *</div><div class='ctx'>  * Right now, RF report types have the same report types (or report id's)</div><div class='hunk'>@@ -265,8 +274,8 @@ static void logi_dj_recv_add_djhid_device(struct dj_receiver_dev *djrcv_dev,</div><div class='ctx'> 		goto dj_device_allocate_fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dj_dev-&gt;reports_supported = le32_to_cpu(</div><div class='del'>-		dj_report-&gt;report_params[DEVICE_PAIRED_RF_REPORT_TYPE]);</div><div class='add'>+	dj_dev-&gt;reports_supported = get_unaligned_le32(</div><div class='add'>+		dj_report-&gt;report_params + DEVICE_PAIRED_RF_REPORT_TYPE);</div><div class='ctx'> 	dj_dev-&gt;hdev = dj_hiddev;</div><div class='ctx'> 	dj_dev-&gt;dj_receiver_dev = djrcv_dev;</div><div class='ctx'> 	dj_dev-&gt;device_index = dj_report-&gt;device_index;</div><div class='hunk'>@@ -473,9 +482,17 @@ static int logi_dj_output_hidraw_report(struct hid_device *hid, u8 * buf,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rdcat(char **rdesc, unsigned int *rsize, const char *data, unsigned int size)</div><div class='add'>+{</div><div class='add'>+	memcpy(*rdesc + *rsize, data, size);</div><div class='add'>+	*rsize += size;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int logi_dj_ll_parse(struct hid_device *hid)</div><div class='ctx'> {</div><div class='ctx'> 	struct dj_device *djdev = hid-&gt;driver_data;</div><div class='add'>+	unsigned int rsize = 0;</div><div class='add'>+	char *rdesc;</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='ctx'> 	dbg_hid("%s\n", __func__);</div><div class='hunk'>@@ -483,70 +500,38 @@ static int logi_dj_ll_parse(struct hid_device *hid)</div><div class='ctx'> 	djdev-&gt;hdev-&gt;version = 0x0111;</div><div class='ctx'> 	djdev-&gt;hdev-&gt;country = 0x00;</div><div class='ctx'> </div><div class='add'>+	rdesc = kmalloc(MAX_RDESC_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!rdesc)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	if (djdev-&gt;reports_supported &amp; STD_KEYBOARD) {</div><div class='ctx'> 		dbg_hid("%s: sending a kbd descriptor, reports_supported: %x\n",</div><div class='ctx'> 			__func__, djdev-&gt;reports_supported);</div><div class='del'>-		retval = hid_parse_report(hid,</div><div class='del'>-					  (u8 *) kbd_descriptor,</div><div class='del'>-					  sizeof(kbd_descriptor));</div><div class='del'>-		if (retval) {</div><div class='del'>-			dbg_hid("%s: sending a kbd descriptor, hid_parse failed"</div><div class='del'>-				" error: %d\n", __func__, retval);</div><div class='del'>-			return retval;</div><div class='del'>-		}</div><div class='add'>+		rdcat(&amp;rdesc, &amp;rsize, kbd_descriptor, sizeof(kbd_descriptor));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (djdev-&gt;reports_supported &amp; STD_MOUSE) {</div><div class='ctx'> 		dbg_hid("%s: sending a mouse descriptor, reports_supported: "</div><div class='ctx'> 			"%x\n", __func__, djdev-&gt;reports_supported);</div><div class='del'>-		retval = hid_parse_report(hid,</div><div class='del'>-					  (u8 *) mse_descriptor,</div><div class='del'>-					  sizeof(mse_descriptor));</div><div class='del'>-		if (retval) {</div><div class='del'>-			dbg_hid("%s: sending a mouse descriptor, hid_parse "</div><div class='del'>-				"failed error: %d\n", __func__, retval);</div><div class='del'>-			return retval;</div><div class='del'>-		}</div><div class='add'>+		rdcat(&amp;rdesc, &amp;rsize, mse_descriptor, sizeof(mse_descriptor));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (djdev-&gt;reports_supported &amp; MULTIMEDIA) {</div><div class='ctx'> 		dbg_hid("%s: sending a multimedia report descriptor: %x\n",</div><div class='ctx'> 			__func__, djdev-&gt;reports_supported);</div><div class='del'>-		retval = hid_parse_report(hid,</div><div class='del'>-					  (u8 *) consumer_descriptor,</div><div class='del'>-					  sizeof(consumer_descriptor));</div><div class='del'>-		if (retval) {</div><div class='del'>-			dbg_hid("%s: sending a consumer_descriptor, hid_parse "</div><div class='del'>-				"failed error: %d\n", __func__, retval);</div><div class='del'>-			return retval;</div><div class='del'>-		}</div><div class='add'>+		rdcat(&amp;rdesc, &amp;rsize, consumer_descriptor, sizeof(consumer_descriptor));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (djdev-&gt;reports_supported &amp; POWER_KEYS) {</div><div class='ctx'> 		dbg_hid("%s: sending a power keys report descriptor: %x\n",</div><div class='ctx'> 			__func__, djdev-&gt;reports_supported);</div><div class='del'>-		retval = hid_parse_report(hid,</div><div class='del'>-					  (u8 *) syscontrol_descriptor,</div><div class='del'>-					  sizeof(syscontrol_descriptor));</div><div class='del'>-		if (retval) {</div><div class='del'>-			dbg_hid("%s: sending a syscontrol_descriptor, "</div><div class='del'>-				"hid_parse failed error: %d\n",</div><div class='del'>-				__func__, retval);</div><div class='del'>-			return retval;</div><div class='del'>-		}</div><div class='add'>+		rdcat(&amp;rdesc, &amp;rsize, syscontrol_descriptor, sizeof(syscontrol_descriptor));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (djdev-&gt;reports_supported &amp; MEDIA_CENTER) {</div><div class='ctx'> 		dbg_hid("%s: sending a media center report descriptor: %x\n",</div><div class='ctx'> 			__func__, djdev-&gt;reports_supported);</div><div class='del'>-		retval = hid_parse_report(hid,</div><div class='del'>-					  (u8 *) media_descriptor,</div><div class='del'>-					  sizeof(media_descriptor));</div><div class='del'>-		if (retval) {</div><div class='del'>-			dbg_hid("%s: sending a media_descriptor, hid_parse "</div><div class='del'>-				"failed error: %d\n", __func__, retval);</div><div class='del'>-			return retval;</div><div class='del'>-		}</div><div class='add'>+		rdcat(&amp;rdesc, &amp;rsize, media_descriptor, sizeof(media_descriptor));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (djdev-&gt;reports_supported &amp; KBD_LEDS) {</div><div class='hunk'>@@ -554,7 +539,10 @@ static int logi_dj_ll_parse(struct hid_device *hid)</div><div class='ctx'> 			__func__, djdev-&gt;reports_supported);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	retval = hid_parse_report(hid, rdesc, rsize);</div><div class='add'>+	kfree(rdesc);</div><div class='add'>+</div><div class='add'>+	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int logi_dj_ll_input_event(struct input_dev *dev, unsigned int type,</div><div class='head'>diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c<br/>index 1d5b94167b52..6e3332a99976 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-multitouch.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-multitouch.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-multitouch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-multitouch.c</a></div><div class='hunk'>@@ -70,9 +70,16 @@ struct mt_class {</div><div class='ctx'> 	bool is_indirect;	/* true for touchpads */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mt_fields {</div><div class='add'>+	unsigned usages[HID_MAX_FIELDS];</div><div class='add'>+	unsigned int length;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mt_device {</div><div class='ctx'> 	struct mt_slot curdata;	/* placeholder of incoming data */</div><div class='ctx'> 	struct mt_class mtclass;	/* our mt device class */</div><div class='add'>+	struct mt_fields *fields;	/* temporary placeholder for storing the</div><div class='add'>+					   multitouch fields */</div><div class='ctx'> 	unsigned last_field_index;	/* last field index of the report */</div><div class='ctx'> 	unsigned last_slot_field;	/* the last field of a slot */</div><div class='ctx'> 	__s8 inputmode;		/* InputMode HID feature, -1 if non-existent */</div><div class='hunk'>@@ -110,6 +117,9 @@ struct mt_device {</div><div class='ctx'> </div><div class='ctx'> #define MT_DEFAULT_MAXCONTACT	10</div><div class='ctx'> </div><div class='add'>+#define MT_USB_DEVICE(v, p)	HID_DEVICE(BUS_USB, HID_GROUP_MULTITOUCH, v, p)</div><div class='add'>+#define MT_BT_DEVICE(v, p)	HID_DEVICE(BUS_BLUETOOTH, HID_GROUP_MULTITOUCH, v, p)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * these device-dependent functions determine what slot corresponds</div><div class='ctx'>  * to a valid contact that was just read.</div><div class='hunk'>@@ -275,11 +285,15 @@ static void set_abs(struct input_dev *input, unsigned int code,</div><div class='ctx'> 	input_set_abs_params(input, code, fmin, fmax, fuzz, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void set_last_slot_field(struct hid_usage *usage, struct mt_device *td,</div><div class='add'>+static void mt_store_field(struct hid_usage *usage, struct mt_device *td,</div><div class='ctx'> 		struct hid_input *hi)</div><div class='ctx'> {</div><div class='del'>-	if (!test_bit(usage-&gt;hid, hi-&gt;input-&gt;absbit))</div><div class='del'>-		td-&gt;last_slot_field = usage-&gt;hid;</div><div class='add'>+	struct mt_fields *f = td-&gt;fields;</div><div class='add'>+</div><div class='add'>+	if (f-&gt;length &gt;= HID_MAX_FIELDS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	f-&gt;usages[f-&gt;length++] = usage-&gt;hid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi,</div><div class='hunk'>@@ -330,7 +344,7 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi,</div><div class='ctx'> 				cls-&gt;sn_move);</div><div class='ctx'> 			/* touchscreen emulation */</div><div class='ctx'> 			set_abs(hi-&gt;input, ABS_X, field, cls-&gt;sn_move);</div><div class='del'>-			set_last_slot_field(usage, td, hi);</div><div class='add'>+			mt_store_field(usage, td, hi);</div><div class='ctx'> 			td-&gt;last_field_index = field-&gt;index;</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		case HID_GD_Y:</div><div class='hunk'>@@ -340,7 +354,7 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi,</div><div class='ctx'> 				cls-&gt;sn_move);</div><div class='ctx'> 			/* touchscreen emulation */</div><div class='ctx'> 			set_abs(hi-&gt;input, ABS_Y, field, cls-&gt;sn_move);</div><div class='del'>-			set_last_slot_field(usage, td, hi);</div><div class='add'>+			mt_store_field(usage, td, hi);</div><div class='ctx'> 			td-&gt;last_field_index = field-&gt;index;</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -349,24 +363,24 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi,</div><div class='ctx'> 	case HID_UP_DIGITIZER:</div><div class='ctx'> 		switch (usage-&gt;hid) {</div><div class='ctx'> 		case HID_DG_INRANGE:</div><div class='del'>-			set_last_slot_field(usage, td, hi);</div><div class='add'>+			mt_store_field(usage, td, hi);</div><div class='ctx'> 			td-&gt;last_field_index = field-&gt;index;</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		case HID_DG_CONFIDENCE:</div><div class='del'>-			set_last_slot_field(usage, td, hi);</div><div class='add'>+			mt_store_field(usage, td, hi);</div><div class='ctx'> 			td-&gt;last_field_index = field-&gt;index;</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		case HID_DG_TIPSWITCH:</div><div class='ctx'> 			hid_map_usage(hi, usage, bit, max, EV_KEY, BTN_TOUCH);</div><div class='ctx'> 			input_set_capability(hi-&gt;input, EV_KEY, BTN_TOUCH);</div><div class='del'>-			set_last_slot_field(usage, td, hi);</div><div class='add'>+			mt_store_field(usage, td, hi);</div><div class='ctx'> 			td-&gt;last_field_index = field-&gt;index;</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		case HID_DG_CONTACTID:</div><div class='ctx'> 			if (!td-&gt;maxcontacts)</div><div class='ctx'> 				td-&gt;maxcontacts = MT_DEFAULT_MAXCONTACT;</div><div class='ctx'> 			input_mt_init_slots(hi-&gt;input, td-&gt;maxcontacts);</div><div class='del'>-			td-&gt;last_slot_field = usage-&gt;hid;</div><div class='add'>+			mt_store_field(usage, td, hi);</div><div class='ctx'> 			td-&gt;last_field_index = field-&gt;index;</div><div class='ctx'> 			td-&gt;touches_by_report++;</div><div class='ctx'> 			return 1;</div><div class='hunk'>@@ -375,7 +389,7 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi,</div><div class='ctx'> 					EV_ABS, ABS_MT_TOUCH_MAJOR);</div><div class='ctx'> 			set_abs(hi-&gt;input, ABS_MT_TOUCH_MAJOR, field,</div><div class='ctx'> 				cls-&gt;sn_width);</div><div class='del'>-			set_last_slot_field(usage, td, hi);</div><div class='add'>+			mt_store_field(usage, td, hi);</div><div class='ctx'> 			td-&gt;last_field_index = field-&gt;index;</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		case HID_DG_HEIGHT:</div><div class='hunk'>@@ -385,7 +399,7 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi,</div><div class='ctx'> 				cls-&gt;sn_height);</div><div class='ctx'> 			input_set_abs_params(hi-&gt;input,</div><div class='ctx'> 					ABS_MT_ORIENTATION, 0, 1, 0, 0);</div><div class='del'>-			set_last_slot_field(usage, td, hi);</div><div class='add'>+			mt_store_field(usage, td, hi);</div><div class='ctx'> 			td-&gt;last_field_index = field-&gt;index;</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		case HID_DG_TIPPRESSURE:</div><div class='hunk'>@@ -396,7 +410,7 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi,</div><div class='ctx'> 			/* touchscreen emulation */</div><div class='ctx'> 			set_abs(hi-&gt;input, ABS_PRESSURE, field,</div><div class='ctx'> 				cls-&gt;sn_pressure);</div><div class='del'>-			set_last_slot_field(usage, td, hi);</div><div class='add'>+			mt_store_field(usage, td, hi);</div><div class='ctx'> 			td-&gt;last_field_index = field-&gt;index;</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		case HID_DG_CONTACTCOUNT:</div><div class='hunk'>@@ -635,6 +649,31 @@ static void mt_set_maxcontacts(struct hid_device *hdev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mt_post_parse_default_settings(struct mt_device *td)</div><div class='add'>+{</div><div class='add'>+	__s32 quirks = td-&gt;mtclass.quirks;</div><div class='add'>+</div><div class='add'>+	/* unknown serial device needs special quirks */</div><div class='add'>+	if (td-&gt;touches_by_report == 1) {</div><div class='add'>+		quirks |= MT_QUIRK_ALWAYS_VALID;</div><div class='add'>+		quirks &amp;= ~MT_QUIRK_NOT_SEEN_MEANS_UP;</div><div class='add'>+		quirks &amp;= ~MT_QUIRK_VALID_IS_INRANGE;</div><div class='add'>+		quirks &amp;= ~MT_QUIRK_VALID_IS_CONFIDENCE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	td-&gt;mtclass.quirks = quirks;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt_post_parse(struct mt_device *td)</div><div class='add'>+{</div><div class='add'>+	struct mt_fields *f = td-&gt;fields;</div><div class='add'>+</div><div class='add'>+	if (td-&gt;touches_by_report &gt; 0) {</div><div class='add'>+		int field_count_per_touch = f-&gt;length / td-&gt;touches_by_report;</div><div class='add'>+		td-&gt;last_slot_field = f-&gt;usages[field_count_per_touch - 1];</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	int ret, i;</div><div class='hunk'>@@ -654,7 +693,6 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)</div><div class='ctx'> 	 * that emit events over several HID messages.</div><div class='ctx'> 	 */</div><div class='ctx'> 	hdev-&gt;quirks |= HID_QUIRK_NO_INPUT_SYNC;</div><div class='del'>-	hdev-&gt;quirks &amp;= ~HID_QUIRK_MULTITOUCH;</div><div class='ctx'> </div><div class='ctx'> 	td = kzalloc(sizeof(struct mt_device), GFP_KERNEL);</div><div class='ctx'> 	if (!td) {</div><div class='hunk'>@@ -666,6 +704,13 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)</div><div class='ctx'> 	td-&gt;maxcontact_report_id = -1;</div><div class='ctx'> 	hid_set_drvdata(hdev, td);</div><div class='ctx'> </div><div class='add'>+	td-&gt;fields = kzalloc(sizeof(struct mt_fields), GFP_KERNEL);</div><div class='add'>+	if (!td-&gt;fields) {</div><div class='add'>+		dev_err(&amp;hdev-&gt;dev, "cannot allocate multitouch fields data\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = hid_parse(hdev);</div><div class='ctx'> 	if (ret != 0)</div><div class='ctx'> 		goto fail;</div><div class='hunk'>@@ -674,14 +719,10 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='del'>-	if (!id &amp;&amp; td-&gt;touches_by_report == 1) {</div><div class='del'>-		/* the device has been sent by hid-generic */</div><div class='del'>-		mtclass = &amp;td-&gt;mtclass;</div><div class='del'>-		mtclass-&gt;quirks |= MT_QUIRK_ALWAYS_VALID;</div><div class='del'>-		mtclass-&gt;quirks &amp;= ~MT_QUIRK_NOT_SEEN_MEANS_UP;</div><div class='del'>-		mtclass-&gt;quirks &amp;= ~MT_QUIRK_VALID_IS_INRANGE;</div><div class='del'>-		mtclass-&gt;quirks &amp;= ~MT_QUIRK_VALID_IS_CONFIDENCE;</div><div class='del'>-	}</div><div class='add'>+	mt_post_parse(td);</div><div class='add'>+</div><div class='add'>+	if (id-&gt;vendor == HID_ANY_ID &amp;&amp; id-&gt;product == HID_ANY_ID)</div><div class='add'>+		mt_post_parse_default_settings(td);</div><div class='ctx'> </div><div class='ctx'> 	td-&gt;slots = kzalloc(td-&gt;maxcontacts * sizeof(struct mt_slot),</div><div class='ctx'> 				GFP_KERNEL);</div><div class='hunk'>@@ -697,9 +738,13 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)</div><div class='ctx'> 	mt_set_maxcontacts(hdev);</div><div class='ctx'> 	mt_set_input_mode(hdev);</div><div class='ctx'> </div><div class='add'>+	kfree(td-&gt;fields);</div><div class='add'>+	td-&gt;fields = NULL;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='add'>+	kfree(td-&gt;fields);</div><div class='ctx'> 	kfree(td);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -727,50 +772,54 @@ static const struct hid_device_id mt_devices[] = {</div><div class='ctx'> </div><div class='ctx'> 	/* 3M panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_3M,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_3M,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_3M,</div><div class='ctx'> 			USB_DEVICE_ID_3M1968) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_3M,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_3M,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_3M,</div><div class='ctx'> 			USB_DEVICE_ID_3M2256) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_3M,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_3M,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_3M,</div><div class='ctx'> 			USB_DEVICE_ID_3M3266) },</div><div class='ctx'> </div><div class='ctx'> 	/* ActionStar panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_ACTIONSTAR,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_ACTIONSTAR,</div><div class='ctx'> 			USB_DEVICE_ID_ACTIONSTAR_1011) },</div><div class='ctx'> </div><div class='ctx'> 	/* Atmel panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_SERIAL,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_ATMEL,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_ATMEL,</div><div class='ctx'> 			USB_DEVICE_ID_ATMEL_MULTITOUCH) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_SERIAL,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_ATMEL,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_ATMEL,</div><div class='ctx'> 			USB_DEVICE_ID_ATMEL_MXT_DIGITIZER) },</div><div class='ctx'> </div><div class='add'>+	/* Baanto multitouch devices */</div><div class='add'>+	{ .driver_data = MT_CLS_DEFAULT,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_BAANTO,</div><div class='add'>+			USB_DEVICE_ID_BAANTO_MT_190W2) },</div><div class='ctx'> 	/* Cando panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DUAL_INRANGE_CONTACTNUMBER,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_CANDO,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_CANDO,</div><div class='ctx'> 			USB_DEVICE_ID_CANDO_MULTI_TOUCH) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DUAL_INRANGE_CONTACTNUMBER,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_CANDO,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_CANDO,</div><div class='ctx'> 			USB_DEVICE_ID_CANDO_MULTI_TOUCH_10_1) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DUAL_INRANGE_CONTACTNUMBER,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_CANDO,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_CANDO,</div><div class='ctx'> 			USB_DEVICE_ID_CANDO_MULTI_TOUCH_11_6) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DUAL_INRANGE_CONTACTNUMBER,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_CANDO,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_CANDO,</div><div class='ctx'> 			USB_DEVICE_ID_CANDO_MULTI_TOUCH_15_6) },</div><div class='ctx'> </div><div class='ctx'> 	/* Chunghwa Telecom touch panels */</div><div class='ctx'> 	{  .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_CHUNGHWAT,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_CHUNGHWAT,</div><div class='ctx'> 			USB_DEVICE_ID_CHUNGHWAT_MULTITOUCH) },</div><div class='ctx'> </div><div class='ctx'> 	/* CVTouch panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_CVTOUCH,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_CVTOUCH,</div><div class='ctx'> 			USB_DEVICE_ID_CVTOUCH_SCREEN) },</div><div class='ctx'> </div><div class='ctx'> 	/* Cypress panel */</div><div class='hunk'>@@ -780,225 +829,227 @@ static const struct hid_device_id mt_devices[] = {</div><div class='ctx'> </div><div class='ctx'> 	/* eGalax devices (resistive) */</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_480D) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_480E) },</div><div class='ctx'> </div><div class='ctx'> 	/* eGalax devices (capacitive) */</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_720C) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX_SERIAL,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_7207) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX_SERIAL,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_725E) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX_SERIAL,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_7224) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX_SERIAL,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_722A) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_726B) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX_SERIAL,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_7262) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_72A1) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX_SERIAL,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_72AA) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_72FA) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_7302) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX_SERIAL,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_7349) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_EGALAX_SERIAL,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,</div><div class='ctx'> 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_A001) },</div><div class='ctx'> </div><div class='ctx'> 	/* Elo TouchSystems IntelliTouch Plus panel */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DUAL_NSMU_CONTACTID,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_ELO,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_ELO,</div><div class='ctx'> 			USB_DEVICE_ID_ELO_TS2515) },</div><div class='ctx'> </div><div class='ctx'> 	/* GeneralTouch panel */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DUAL_INRANGE_CONTACTNUMBER,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH,</div><div class='ctx'> 			USB_DEVICE_ID_GENERAL_TOUCH_WIN7_TWOFINGERS) },</div><div class='ctx'> </div><div class='ctx'> 	/* Gametel game controller */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_FRUCTEL,</div><div class='add'>+		MT_BT_DEVICE(USB_VENDOR_ID_FRUCTEL,</div><div class='ctx'> 			USB_DEVICE_ID_GAMETEL_MT_MODE) },</div><div class='ctx'> </div><div class='ctx'> 	/* GoodTouch panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_GOODTOUCH,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_GOODTOUCH,</div><div class='ctx'> 			USB_DEVICE_ID_GOODTOUCH_000f) },</div><div class='ctx'> </div><div class='ctx'> 	/* Hanvon panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DUAL_INRANGE_CONTACTID,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_HANVON_ALT,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_HANVON_ALT,</div><div class='ctx'> 			USB_DEVICE_ID_HANVON_ALT_MULTITOUCH) },</div><div class='ctx'> </div><div class='ctx'> 	/* Ideacom panel */</div><div class='ctx'> 	{ .driver_data = MT_CLS_SERIAL,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_IDEACOM,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_IDEACOM,</div><div class='ctx'> 			USB_DEVICE_ID_IDEACOM_IDC6650) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_SERIAL,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_IDEACOM,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_IDEACOM,</div><div class='ctx'> 			USB_DEVICE_ID_IDEACOM_IDC6651) },</div><div class='ctx'> </div><div class='ctx'> 	/* Ilitek dual touch panel */</div><div class='ctx'> 	{  .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_ILITEK,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_ILITEK,</div><div class='ctx'> 			USB_DEVICE_ID_ILITEK_MULTITOUCH) },</div><div class='ctx'> </div><div class='ctx'> 	/* IRTOUCH panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DUAL_INRANGE_CONTACTID,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_IRTOUCHSYSTEMS,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_IRTOUCHSYSTEMS,</div><div class='ctx'> 			USB_DEVICE_ID_IRTOUCH_INFRARED_USB) },</div><div class='ctx'> </div><div class='ctx'> 	/* LG Display panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_LG,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_LG,</div><div class='ctx'> 			USB_DEVICE_ID_LG_MULTITOUCH) },</div><div class='ctx'> </div><div class='ctx'> 	/* Lumio panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_CONFIDENCE_MINUS_ONE,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_LUMIO,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_LUMIO,</div><div class='ctx'> 			USB_DEVICE_ID_CRYSTALTOUCH) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_CONFIDENCE_MINUS_ONE,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_LUMIO,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_LUMIO,</div><div class='ctx'> 			USB_DEVICE_ID_CRYSTALTOUCH_DUAL) },</div><div class='ctx'> </div><div class='ctx'> 	/* MosArt panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_CONFIDENCE_MINUS_ONE,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_ASUS,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_ASUS,</div><div class='ctx'> 			USB_DEVICE_ID_ASUS_T91MT)},</div><div class='ctx'> 	{ .driver_data = MT_CLS_CONFIDENCE_MINUS_ONE,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_ASUS,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_ASUS,</div><div class='ctx'> 			USB_DEVICE_ID_ASUSTEK_MULTITOUCH_YFO) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_CONFIDENCE_MINUS_ONE,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_TURBOX,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_TURBOX,</div><div class='ctx'> 			USB_DEVICE_ID_TURBOX_TOUCHSCREEN_MOSART) },</div><div class='ctx'> </div><div class='ctx'> 	/* Panasonic panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_PANASONIC,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_PANASONIC,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_PANASONIC,</div><div class='ctx'> 			USB_DEVICE_ID_PANABOARD_UBT780) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_PANASONIC,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_PANASONIC,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_PANASONIC,</div><div class='ctx'> 			USB_DEVICE_ID_PANABOARD_UBT880) },</div><div class='ctx'> </div><div class='ctx'> 	/* PenMount panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_CONFIDENCE,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_PENMOUNT,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_PENMOUNT,</div><div class='ctx'> 			USB_DEVICE_ID_PENMOUNT_PCI) },</div><div class='ctx'> </div><div class='ctx'> 	/* PixArt optical touch screen */</div><div class='ctx'> 	{ .driver_data = MT_CLS_INRANGE_CONTACTNUMBER,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_PIXART,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_PIXART,</div><div class='ctx'> 			USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_INRANGE_CONTACTNUMBER,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_PIXART,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_PIXART,</div><div class='ctx'> 			USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN1) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_INRANGE_CONTACTNUMBER,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_PIXART,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_PIXART,</div><div class='ctx'> 			USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN2) },</div><div class='ctx'> </div><div class='ctx'> 	/* PixCir-based panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DUAL_INRANGE_CONTACTID,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_HANVON,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_HANVON,</div><div class='ctx'> 			USB_DEVICE_ID_HANVON_MULTITOUCH) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DUAL_INRANGE_CONTACTID,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_CANDO,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_CANDO,</div><div class='ctx'> 			USB_DEVICE_ID_CANDO_PIXCIR_MULTI_TOUCH) },</div><div class='ctx'> </div><div class='ctx'> 	/* Quanta-based panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_CONFIDENCE_CONTACT_ID,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_QUANTA,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_QUANTA,</div><div class='ctx'> 			USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_CONFIDENCE_CONTACT_ID,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_QUANTA,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_QUANTA,</div><div class='ctx'> 			USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3001) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_CONFIDENCE_CONTACT_ID,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_QUANTA,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_QUANTA,</div><div class='ctx'> 			USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3008) },</div><div class='ctx'> </div><div class='ctx'> 	/* Stantum panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_CONFIDENCE,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_STANTUM,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_STANTUM,</div><div class='ctx'> 			USB_DEVICE_ID_MTP)},</div><div class='ctx'> 	{ .driver_data = MT_CLS_CONFIDENCE,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_STANTUM_STM,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_STANTUM_STM,</div><div class='ctx'> 			USB_DEVICE_ID_MTP_STM)},</div><div class='ctx'> 	{ .driver_data = MT_CLS_CONFIDENCE,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_STANTUM_SITRONIX,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_STANTUM_SITRONIX,</div><div class='ctx'> 			USB_DEVICE_ID_MTP_SITRONIX)},</div><div class='ctx'> </div><div class='ctx'> 	/* TopSeed panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_TOPSEED,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED2,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_TOPSEED2,</div><div class='ctx'> 			USB_DEVICE_ID_TOPSEED2_PERIPAD_701) },</div><div class='ctx'> </div><div class='ctx'> 	/* Touch International panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_TOUCH_INTL,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_TOUCH_INTL,</div><div class='ctx'> 			USB_DEVICE_ID_TOUCH_INTL_MULTI_TOUCH) },</div><div class='ctx'> </div><div class='ctx'> 	/* Unitec panels */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_UNITEC,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_UNITEC,</div><div class='ctx'> 			USB_DEVICE_ID_UNITEC_USB_TOUCH_0709) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_UNITEC,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_UNITEC,</div><div class='ctx'> 			USB_DEVICE_ID_UNITEC_USB_TOUCH_0A19) },</div><div class='ctx'> 	/* XAT */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_XAT,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_XAT,</div><div class='ctx'> 			USB_DEVICE_ID_XAT_CSR) },</div><div class='ctx'> </div><div class='ctx'> 	/* Xiroku */</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='ctx'> 			USB_DEVICE_ID_XIROKU_SPX) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='ctx'> 			USB_DEVICE_ID_XIROKU_MPX) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='ctx'> 			USB_DEVICE_ID_XIROKU_CSR) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='ctx'> 			USB_DEVICE_ID_XIROKU_SPX1) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='ctx'> 			USB_DEVICE_ID_XIROKU_MPX1) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='ctx'> 			USB_DEVICE_ID_XIROKU_CSR1) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='ctx'> 			USB_DEVICE_ID_XIROKU_SPX2) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='ctx'> 			USB_DEVICE_ID_XIROKU_MPX2) },</div><div class='ctx'> 	{ .driver_data = MT_CLS_DEFAULT,</div><div class='del'>-		HID_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='add'>+		MT_USB_DEVICE(USB_VENDOR_ID_XIROKU,</div><div class='ctx'> 			USB_DEVICE_ID_XIROKU_CSR2) },</div><div class='ctx'> </div><div class='add'>+	/* Generic MT device */</div><div class='add'>+	{ HID_DEVICE(HID_BUS_ANY, HID_GROUP_MULTITOUCH, HID_ANY_ID, HID_ANY_ID) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(hid, mt_devices);</div><div class='head'>diff --git a/drivers/hid/hid-uclogic.c b/drivers/hid/hid-uclogic.c<br/>index 1f1128910337..3aba02be1f26 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-uclogic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-uclogic.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-uclogic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-uclogic.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/hid.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "hid-ids.h"</div><div class='ctx'> </div><div class='hunk'>@@ -352,9 +353,125 @@ static __u8 pf1209_rdesc_fixed[] = {</div><div class='ctx'> 	0xC0                /*  End Collection                      */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * See TWHL850 description, device and HID report descriptors at</div><div class='add'>+ * http://sf.net/apps/mediawiki/digimend/?title=UC-Logic_Wireless_Tablet_TWHL850</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Size of the original descriptors of TWHL850 tablet */</div><div class='add'>+#define TWHL850_RDESC_ORIG_SIZE0	182</div><div class='add'>+#define TWHL850_RDESC_ORIG_SIZE1	161</div><div class='add'>+#define TWHL850_RDESC_ORIG_SIZE2	92</div><div class='add'>+</div><div class='add'>+/* Fixed PID 0522 tablet report descriptor, interface 0 (stylus) */</div><div class='add'>+static __u8 twhl850_rdesc_fixed0[] = {</div><div class='add'>+	0x05, 0x0D,         /*  Usage Page (Digitizer),             */</div><div class='add'>+	0x09, 0x02,         /*  Usage (Pen),                        */</div><div class='add'>+	0xA1, 0x01,         /*  Collection (Application),           */</div><div class='add'>+	0x85, 0x09,         /*      Report ID (9),                  */</div><div class='add'>+	0x09, 0x20,         /*      Usage (Stylus),                 */</div><div class='add'>+	0xA0,               /*      Collection (Physical),          */</div><div class='add'>+	0x14,               /*          Logical Minimum (0),        */</div><div class='add'>+	0x25, 0x01,         /*          Logical Maximum (1),        */</div><div class='add'>+	0x75, 0x01,         /*          Report Size (1),            */</div><div class='add'>+	0x95, 0x03,         /*          Report Count (3),           */</div><div class='add'>+	0x09, 0x42,         /*          Usage (Tip Switch),         */</div><div class='add'>+	0x09, 0x44,         /*          Usage (Barrel Switch),      */</div><div class='add'>+	0x09, 0x46,         /*          Usage (Tablet Pick),        */</div><div class='add'>+	0x81, 0x02,         /*          Input (Variable),           */</div><div class='add'>+	0x81, 0x03,         /*          Input (Constant, Variable), */</div><div class='add'>+	0x95, 0x01,         /*          Report Count (1),           */</div><div class='add'>+	0x09, 0x32,         /*          Usage (In Range),           */</div><div class='add'>+	0x81, 0x02,         /*          Input (Variable),           */</div><div class='add'>+	0x81, 0x03,         /*          Input (Constant, Variable), */</div><div class='add'>+	0x75, 0x10,         /*          Report Size (16),           */</div><div class='add'>+	0xA4,               /*          Push,                       */</div><div class='add'>+	0x05, 0x01,         /*          Usage Page (Desktop),       */</div><div class='add'>+	0x65, 0x13,         /*          Unit (Inch),                */</div><div class='add'>+	0x55, 0xFD,         /*          Unit Exponent (-3),         */</div><div class='add'>+	0x34,               /*          Physical Minimum (0),       */</div><div class='add'>+	0x09, 0x30,         /*          Usage (X),                  */</div><div class='add'>+	0x46, 0x40, 0x1F,   /*          Physical Maximum (8000),    */</div><div class='add'>+	0x26, 0x00, 0x7D,   /*          Logical Maximum (32000),    */</div><div class='add'>+	0x81, 0x02,         /*          Input (Variable),           */</div><div class='add'>+	0x09, 0x31,         /*          Usage (Y),                  */</div><div class='add'>+	0x46, 0x88, 0x13,   /*          Physical Maximum (5000),    */</div><div class='add'>+	0x26, 0x20, 0x4E,   /*          Logical Maximum (20000),    */</div><div class='add'>+	0x81, 0x02,         /*          Input (Variable),           */</div><div class='add'>+	0xB4,               /*          Pop,                        */</div><div class='add'>+	0x09, 0x30,         /*          Usage (Tip Pressure),       */</div><div class='add'>+	0x26, 0xFF, 0x03,   /*          Logical Maximum (1023),     */</div><div class='add'>+	0x81, 0x02,         /*          Input (Variable),           */</div><div class='add'>+	0xC0,               /*      End Collection,                 */</div><div class='add'>+	0xC0                /*  End Collection                      */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Fixed PID 0522 tablet report descriptor, interface 1 (mouse) */</div><div class='add'>+static __u8 twhl850_rdesc_fixed1[] = {</div><div class='add'>+	0x05, 0x01,         /*  Usage Page (Desktop),               */</div><div class='add'>+	0x09, 0x02,         /*  Usage (Mouse),                      */</div><div class='add'>+	0xA1, 0x01,         /*  Collection (Application),           */</div><div class='add'>+	0x85, 0x01,         /*      Report ID (1),                  */</div><div class='add'>+	0x09, 0x01,         /*      Usage (Pointer),                */</div><div class='add'>+	0xA0,               /*      Collection (Physical),          */</div><div class='add'>+	0x05, 0x09,         /*          Usage Page (Button),        */</div><div class='add'>+	0x75, 0x01,         /*          Report Size (1),            */</div><div class='add'>+	0x95, 0x03,         /*          Report Count (3),           */</div><div class='add'>+	0x19, 0x01,         /*          Usage Minimum (01h),        */</div><div class='add'>+	0x29, 0x03,         /*          Usage Maximum (03h),        */</div><div class='add'>+	0x14,               /*          Logical Minimum (0),        */</div><div class='add'>+	0x25, 0x01,         /*          Logical Maximum (1),        */</div><div class='add'>+	0x81, 0x02,         /*          Input (Variable),           */</div><div class='add'>+	0x95, 0x05,         /*          Report Count (5),           */</div><div class='add'>+	0x81, 0x03,         /*          Input (Constant, Variable), */</div><div class='add'>+	0x05, 0x01,         /*          Usage Page (Desktop),       */</div><div class='add'>+	0x09, 0x30,         /*          Usage (X),                  */</div><div class='add'>+	0x09, 0x31,         /*          Usage (Y),                  */</div><div class='add'>+	0x16, 0x00, 0x80,   /*          Logical Minimum (-32768),   */</div><div class='add'>+	0x26, 0xFF, 0x7F,   /*          Logical Maximum (32767),    */</div><div class='add'>+	0x75, 0x10,         /*          Report Size (16),           */</div><div class='add'>+	0x95, 0x02,         /*          Report Count (2),           */</div><div class='add'>+	0x81, 0x06,         /*          Input (Variable, Relative), */</div><div class='add'>+	0x09, 0x38,         /*          Usage (Wheel),              */</div><div class='add'>+	0x15, 0xFF,         /*          Logical Minimum (-1),       */</div><div class='add'>+	0x25, 0x01,         /*          Logical Maximum (1),        */</div><div class='add'>+	0x95, 0x01,         /*          Report Count (1),           */</div><div class='add'>+	0x75, 0x08,         /*          Report Size (8),            */</div><div class='add'>+	0x81, 0x06,         /*          Input (Variable, Relative), */</div><div class='add'>+	0x81, 0x03,         /*          Input (Constant, Variable), */</div><div class='add'>+	0xC0,               /*      End Collection,                 */</div><div class='add'>+	0xC0                /*  End Collection                      */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Fixed PID 0522 tablet report descriptor, interface 2 (frame buttons) */</div><div class='add'>+static __u8 twhl850_rdesc_fixed2[] = {</div><div class='add'>+	0x05, 0x01,         /*  Usage Page (Desktop),               */</div><div class='add'>+	0x09, 0x06,         /*  Usage (Keyboard),                   */</div><div class='add'>+	0xA1, 0x01,         /*  Collection (Application),           */</div><div class='add'>+	0x85, 0x03,         /*      Report ID (3),                  */</div><div class='add'>+	0x05, 0x07,         /*      Usage Page (Keyboard),          */</div><div class='add'>+	0x14,               /*      Logical Minimum (0),            */</div><div class='add'>+	0x19, 0xE0,         /*      Usage Minimum (KB Leftcontrol), */</div><div class='add'>+	0x29, 0xE7,         /*      Usage Maximum (KB Right GUI),   */</div><div class='add'>+	0x25, 0x01,         /*      Logical Maximum (1),            */</div><div class='add'>+	0x75, 0x01,         /*      Report Size (1),                */</div><div class='add'>+	0x95, 0x08,         /*      Report Count (8),               */</div><div class='add'>+	0x81, 0x02,         /*      Input (Variable),               */</div><div class='add'>+	0x18,               /*      Usage Minimum (None),           */</div><div class='add'>+	0x29, 0xFF,         /*      Usage Maximum (FFh),            */</div><div class='add'>+	0x26, 0xFF, 0x00,   /*      Logical Maximum (255),          */</div><div class='add'>+	0x75, 0x08,         /*      Report Size (8),                */</div><div class='add'>+	0x95, 0x06,         /*      Report Count (6),               */</div><div class='add'>+	0x80,               /*      Input,                          */</div><div class='add'>+	0xC0                /*  End Collection                      */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static __u8 *uclogic_report_fixup(struct hid_device *hdev, __u8 *rdesc,</div><div class='ctx'> 					unsigned int *rsize)</div><div class='ctx'> {</div><div class='add'>+	struct usb_interface *iface = to_usb_interface(hdev-&gt;dev.parent);</div><div class='add'>+	__u8 iface_num = iface-&gt;cur_altsetting-&gt;desc.bInterfaceNumber;</div><div class='add'>+</div><div class='ctx'> 	switch (hdev-&gt;product) {</div><div class='ctx'> 	case USB_DEVICE_ID_UCLOGIC_TABLET_PF1209:</div><div class='ctx'> 		if (*rsize == PF1209_RDESC_ORIG_SIZE) {</div><div class='hunk'>@@ -386,6 +503,28 @@ static __u8 *uclogic_report_fixup(struct hid_device *hdev, __u8 *rdesc,</div><div class='ctx'> 			*rsize = sizeof(wp1062_rdesc_fixed);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case USB_DEVICE_ID_UCLOGIC_WIRELESS_TABLET_TWHL850:</div><div class='add'>+		switch (iface_num) {</div><div class='add'>+		case 0:</div><div class='add'>+			if (*rsize == TWHL850_RDESC_ORIG_SIZE0) {</div><div class='add'>+				rdesc = twhl850_rdesc_fixed0;</div><div class='add'>+				*rsize = sizeof(twhl850_rdesc_fixed0);</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+			if (*rsize == TWHL850_RDESC_ORIG_SIZE1) {</div><div class='add'>+				rdesc = twhl850_rdesc_fixed1;</div><div class='add'>+				*rsize = sizeof(twhl850_rdesc_fixed1);</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			if (*rsize == TWHL850_RDESC_ORIG_SIZE2) {</div><div class='add'>+				rdesc = twhl850_rdesc_fixed2;</div><div class='add'>+				*rsize = sizeof(twhl850_rdesc_fixed2);</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rdesc;</div><div class='hunk'>@@ -402,6 +541,8 @@ static const struct hid_device_id uclogic_devices[] = {</div><div class='ctx'> 				USB_DEVICE_ID_UCLOGIC_TABLET_WP8060U) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC,</div><div class='ctx'> 				USB_DEVICE_ID_UCLOGIC_TABLET_WP1062) },</div><div class='add'>+	{ HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC,</div><div class='add'>+				USB_DEVICE_ID_UCLOGIC_WIRELESS_TABLET_TWHL850) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(hid, uclogic_devices);</div><div class='head'>diff --git a/drivers/hid/hid-wacom.c b/drivers/hid/hid-wacom.c<br/>index 067e2963314c..fe23a1eb586b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-wacom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-wacom.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-wacom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-wacom.c</a></div><div class='hunk'>@@ -24,15 +24,16 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/hid.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#ifdef CONFIG_HID_WACOM_POWER_SUPPLY</div><div class='ctx'> #include &lt;linux/power_supply.h&gt;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #include "hid-ids.h"</div><div class='ctx'> </div><div class='ctx'> #define PAD_DEVICE_ID	0x0F</div><div class='ctx'> </div><div class='add'>+#define WAC_CMD_LED_CONTROL     0x20</div><div class='add'>+</div><div class='ctx'> struct wacom_data {</div><div class='ctx'> 	__u16 tool;</div><div class='ctx'> 	__u16 butstate;</div><div class='hunk'>@@ -41,16 +42,20 @@ struct wacom_data {</div><div class='ctx'> 	__u32 id;</div><div class='ctx'> 	__u32 serial;</div><div class='ctx'> 	unsigned char high_speed;</div><div class='del'>-#ifdef CONFIG_HID_WACOM_POWER_SUPPLY</div><div class='del'>-	int battery_capacity;</div><div class='add'>+	__u8 battery_capacity;</div><div class='add'>+	__u8 power_raw;</div><div class='add'>+	__u8 ps_connected;</div><div class='ctx'> 	struct power_supply battery;</div><div class='ctx'> 	struct power_supply ac;</div><div class='del'>-#endif</div><div class='add'>+	__u8 led_selector;</div><div class='add'>+	struct led_classdev *leds[4];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_HID_WACOM_POWER_SUPPLY</div><div class='del'>-/*percent of battery capacity, 0 means AC online*/</div><div class='del'>-static unsigned short batcap[8] = { 1, 15, 25, 35, 50, 70, 100, 0 };</div><div class='add'>+/*percent of battery capacity for Graphire</div><div class='add'>+  8th value means AC online and show 100% capacity */</div><div class='add'>+static unsigned short batcap_gr[8] = { 1, 15, 25, 35, 50, 70, 100, 100 };</div><div class='add'>+/*percent of battery capacity for Intuos4 WL, AC has a separate bit*/</div><div class='add'>+static unsigned short batcap_i4[8] = { 1, 15, 30, 45, 60, 70, 85, 100 };</div><div class='ctx'> </div><div class='ctx'> static enum power_supply_property wacom_battery_props[] = {</div><div class='ctx'> 	POWER_SUPPLY_PROP_PRESENT,</div><div class='hunk'>@@ -64,13 +69,123 @@ static enum power_supply_property wacom_ac_props[] = {</div><div class='ctx'> 	POWER_SUPPLY_PROP_SCOPE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void wacom_leds_set_brightness(struct led_classdev *led_dev,</div><div class='add'>+						enum led_brightness value)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = led_dev-&gt;dev-&gt;parent;</div><div class='add'>+	struct hid_device *hdev;</div><div class='add'>+	struct wacom_data *wdata;</div><div class='add'>+	unsigned char *buf;</div><div class='add'>+	__u8 led = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	hdev = container_of(dev, struct hid_device, dev);</div><div class='add'>+	wdata = hid_get_drvdata(hdev);</div><div class='add'>+	for (i = 0; i &lt; 4; ++i) {</div><div class='add'>+		if (wdata-&gt;leds[i] == led_dev)</div><div class='add'>+			wdata-&gt;led_selector = i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	led = wdata-&gt;led_selector | 0x04;</div><div class='add'>+	buf = kzalloc(9, GFP_KERNEL);</div><div class='add'>+	if (buf) {</div><div class='add'>+		buf[0] = WAC_CMD_LED_CONTROL;</div><div class='add'>+		buf[1] = led;</div><div class='add'>+		buf[2] = value;</div><div class='add'>+		hdev-&gt;hid_output_raw_report(hdev, buf, 9, HID_FEATURE_REPORT);</div><div class='add'>+		kfree(buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum led_brightness wacom_leds_get_brightness(struct led_classdev *led_dev)</div><div class='add'>+{</div><div class='add'>+	struct wacom_data *wdata;</div><div class='add'>+	struct device *dev = led_dev-&gt;dev-&gt;parent;</div><div class='add'>+	int value = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	wdata = hid_get_drvdata(container_of(dev, struct hid_device, dev));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; ++i) {</div><div class='add'>+		if (wdata-&gt;leds[i] == led_dev) {</div><div class='add'>+			value = wdata-&gt;leds[i]-&gt;brightness;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int wacom_initialize_leds(struct hid_device *hdev)</div><div class='add'>+{</div><div class='add'>+	struct wacom_data *wdata = hid_get_drvdata(hdev);</div><div class='add'>+	struct led_classdev *led;</div><div class='add'>+	struct device *dev = &amp;hdev-&gt;dev;</div><div class='add'>+	size_t namesz = strlen(dev_name(dev)) + 12;</div><div class='add'>+	char *name;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	wdata-&gt;led_selector = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		led = kzalloc(sizeof(struct led_classdev) + namesz, GFP_KERNEL);</div><div class='add'>+		if (!led) {</div><div class='add'>+			hid_warn(hdev,</div><div class='add'>+				 "can't allocate memory for LED selector\n");</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		name = (void *)&amp;led[1];</div><div class='add'>+		snprintf(name, namesz, "%s:selector:%d", dev_name(dev), i);</div><div class='add'>+		led-&gt;name = name;</div><div class='add'>+		led-&gt;brightness = 0;</div><div class='add'>+		led-&gt;max_brightness = 127;</div><div class='add'>+		led-&gt;brightness_get = wacom_leds_get_brightness;</div><div class='add'>+		led-&gt;brightness_set = wacom_leds_set_brightness;</div><div class='add'>+</div><div class='add'>+		wdata-&gt;leds[i] = led;</div><div class='add'>+</div><div class='add'>+		ret = led_classdev_register(dev, wdata-&gt;leds[i]);</div><div class='add'>+</div><div class='add'>+		if (ret) {</div><div class='add'>+			wdata-&gt;leds[i] = NULL;</div><div class='add'>+			kfree(led);</div><div class='add'>+			hid_warn(hdev, "can't register LED\n");</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wacom_destroy_leds(struct hid_device *hdev)</div><div class='add'>+{</div><div class='add'>+	struct wacom_data *wdata = hid_get_drvdata(hdev);</div><div class='add'>+	struct led_classdev *led;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; ++i) {</div><div class='add'>+		if (wdata-&gt;leds[i]) {</div><div class='add'>+			led = wdata-&gt;leds[i];</div><div class='add'>+			wdata-&gt;leds[i] = NULL;</div><div class='add'>+			led_classdev_unregister(led);</div><div class='add'>+			kfree(led);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int wacom_battery_get_property(struct power_supply *psy,</div><div class='ctx'> 				enum power_supply_property psp,</div><div class='ctx'> 				union power_supply_propval *val)</div><div class='ctx'> {</div><div class='ctx'> 	struct wacom_data *wdata = container_of(psy,</div><div class='ctx'> 					struct wacom_data, battery);</div><div class='del'>-	int power_state = batcap[wdata-&gt;battery_capacity];</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (psp) {</div><div class='hunk'>@@ -81,11 +196,7 @@ static int wacom_battery_get_property(struct power_supply *psy,</div><div class='ctx'> 		val-&gt;intval = POWER_SUPPLY_SCOPE_DEVICE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case POWER_SUPPLY_PROP_CAPACITY:</div><div class='del'>-		/* show 100% battery capacity when charging */</div><div class='del'>-		if (power_state == 0)</div><div class='del'>-			val-&gt;intval = 100;</div><div class='del'>-		else</div><div class='del'>-			val-&gt;intval = power_state;</div><div class='add'>+		val-&gt;intval = wdata-&gt;battery_capacity;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -99,17 +210,13 @@ static int wacom_ac_get_property(struct power_supply *psy,</div><div class='ctx'> 				union power_supply_propval *val)</div><div class='ctx'> {</div><div class='ctx'> 	struct wacom_data *wdata = container_of(psy, struct wacom_data, ac);</div><div class='del'>-	int power_state = batcap[wdata-&gt;battery_capacity];</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (psp) {</div><div class='ctx'> 	case POWER_SUPPLY_PROP_PRESENT:</div><div class='ctx'> 		/* fall through */</div><div class='ctx'> 	case POWER_SUPPLY_PROP_ONLINE:</div><div class='del'>-		if (power_state == 0)</div><div class='del'>-			val-&gt;intval = 1;</div><div class='del'>-		else</div><div class='del'>-			val-&gt;intval = 0;</div><div class='add'>+		val-&gt;intval = wdata-&gt;ps_connected;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case POWER_SUPPLY_PROP_SCOPE:</div><div class='ctx'> 		val-&gt;intval = POWER_SUPPLY_SCOPE_DEVICE;</div><div class='hunk'>@@ -120,41 +227,16 @@ static int wacom_ac_get_property(struct power_supply *psy,</div><div class='ctx'> 	}</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void wacom_set_features(struct hid_device *hdev)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	__u8 rep_data[2];</div><div class='del'>-</div><div class='del'>-	/*set high speed, tablet mode*/</div><div class='del'>-	rep_data[0] = 0x03;</div><div class='del'>-	rep_data[1] = 0x20;</div><div class='del'>-	ret = hdev-&gt;hid_output_raw_report(hdev, rep_data, 2,</div><div class='del'>-				HID_FEATURE_REPORT);</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static void wacom_poke(struct hid_device *hdev, u8 speed)</div><div class='add'>+static void wacom_set_features(struct hid_device *hdev, u8 speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct wacom_data *wdata = hid_get_drvdata(hdev);</div><div class='ctx'> 	int limit, ret;</div><div class='del'>-	char rep_data[2];</div><div class='del'>-</div><div class='del'>-	rep_data[0] = 0x03 ; rep_data[1] = 0x00;</div><div class='del'>-	limit = 3;</div><div class='del'>-	do {</div><div class='del'>-		ret = hdev-&gt;hid_output_raw_report(hdev, rep_data, 2,</div><div class='del'>-				HID_FEATURE_REPORT);</div><div class='del'>-	} while (ret &lt; 0 &amp;&amp; limit-- &gt; 0);</div><div class='del'>-</div><div class='del'>-	if (ret &gt;= 0) {</div><div class='del'>-		if (speed == 0)</div><div class='del'>-			rep_data[0] = 0x05;</div><div class='del'>-		else</div><div class='del'>-			rep_data[0] = 0x06;</div><div class='add'>+	__u8 rep_data[2];</div><div class='ctx'> </div><div class='del'>-		rep_data[1] = 0x00;</div><div class='add'>+	switch (hdev-&gt;product) {</div><div class='add'>+	case USB_DEVICE_ID_WACOM_GRAPHIRE_BLUETOOTH:</div><div class='add'>+		rep_data[0] = 0x03 ; rep_data[1] = 0x00;</div><div class='ctx'> 		limit = 3;</div><div class='ctx'> 		do {</div><div class='ctx'> 			ret = hdev-&gt;hid_output_raw_report(hdev, rep_data, 2,</div><div class='hunk'>@@ -162,17 +244,47 @@ static void wacom_poke(struct hid_device *hdev, u8 speed)</div><div class='ctx'> 		} while (ret &lt; 0 &amp;&amp; limit-- &gt; 0);</div><div class='ctx'> </div><div class='ctx'> 		if (ret &gt;= 0) {</div><div class='del'>-			wdata-&gt;high_speed = speed;</div><div class='del'>-			return;</div><div class='add'>+			if (speed == 0)</div><div class='add'>+				rep_data[0] = 0x05;</div><div class='add'>+			else</div><div class='add'>+				rep_data[0] = 0x06;</div><div class='add'>+</div><div class='add'>+			rep_data[1] = 0x00;</div><div class='add'>+			limit = 3;</div><div class='add'>+			do {</div><div class='add'>+				ret = hdev-&gt;hid_output_raw_report(hdev,</div><div class='add'>+					rep_data, 2, HID_FEATURE_REPORT);</div><div class='add'>+			} while (ret &lt; 0 &amp;&amp; limit-- &gt; 0);</div><div class='add'>+</div><div class='add'>+			if (ret &gt;= 0) {</div><div class='add'>+				wdata-&gt;high_speed = speed;</div><div class='add'>+				return;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Note that if the raw queries fail, it's not a hard failure</div><div class='add'>+		 * and it is safe to continue</div><div class='add'>+		 */</div><div class='add'>+		hid_warn(hdev, "failed to poke device, command %d, err %d\n",</div><div class='add'>+			 rep_data[0], ret);</div><div class='add'>+		break;</div><div class='add'>+	case USB_DEVICE_ID_WACOM_INTUOS4_BLUETOOTH:</div><div class='add'>+		if (speed == 1)</div><div class='add'>+			wdata-&gt;features &amp;= ~0x20;</div><div class='add'>+		else</div><div class='add'>+			wdata-&gt;features |= 0x20;</div><div class='add'>+</div><div class='add'>+		rep_data[0] = 0x03;</div><div class='add'>+		rep_data[1] = wdata-&gt;features;</div><div class='add'>+</div><div class='add'>+		ret = hdev-&gt;hid_output_raw_report(hdev, rep_data, 2,</div><div class='add'>+					HID_FEATURE_REPORT);</div><div class='add'>+		if (ret &gt;= 0)</div><div class='add'>+			wdata-&gt;high_speed = speed;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Note that if the raw queries fail, it's not a hard failure and it</div><div class='del'>-	 * is safe to continue</div><div class='del'>-	 */</div><div class='del'>-	hid_warn(hdev, "failed to poke device, command %d, err %d\n",</div><div class='del'>-		 rep_data[0], ret);</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -196,7 +308,7 @@ static ssize_t wacom_store_speed(struct device *dev,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (new_speed == 0 || new_speed == 1) {</div><div class='del'>-		wacom_poke(hdev, new_speed);</div><div class='add'>+		wacom_set_features(hdev, new_speed);</div><div class='ctx'> 		return strnlen(buf, PAGE_SIZE);</div><div class='ctx'> 	} else</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -310,12 +422,16 @@ static int wacom_gr_parse_report(struct hid_device *hdev,</div><div class='ctx'> 		input_sync(input);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_HID_WACOM_POWER_SUPPLY</div><div class='del'>-	/* Store current battery capacity */</div><div class='add'>+	/* Store current battery capacity and power supply state*/</div><div class='ctx'> 	rw = (data[7] &gt;&gt; 2 &amp; 0x07);</div><div class='del'>-	if (rw != wdata-&gt;battery_capacity)</div><div class='del'>-		wdata-&gt;battery_capacity = rw;</div><div class='del'>-#endif</div><div class='add'>+	if (rw != wdata-&gt;power_raw) {</div><div class='add'>+		wdata-&gt;power_raw = rw;</div><div class='add'>+		wdata-&gt;battery_capacity = batcap_gr[rw];</div><div class='add'>+		if (rw == 7)</div><div class='add'>+			wdata-&gt;ps_connected = 1;</div><div class='add'>+		else</div><div class='add'>+			wdata-&gt;ps_connected = 0;</div><div class='add'>+	}</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -369,6 +485,7 @@ static void wacom_i4_parse_pen_report(struct wacom_data *wdata,</div><div class='ctx'> {</div><div class='ctx'> 	__u16 x, y, pressure;</div><div class='ctx'> 	__u8 distance;</div><div class='add'>+	__u8 tilt_x, tilt_y;</div><div class='ctx'> </div><div class='ctx'> 	switch (data[1]) {</div><div class='ctx'> 	case 0x80: /* Out of proximity report */</div><div class='hunk'>@@ -405,6 +522,8 @@ static void wacom_i4_parse_pen_report(struct wacom_data *wdata,</div><div class='ctx'> 		pressure = (data[6] &lt;&lt; 3) | ((data[7] &amp; 0xC0) &gt;&gt; 5)</div><div class='ctx'> 			| (data[1] &amp; 0x01);</div><div class='ctx'> 		distance = (data[9] &gt;&gt; 2) &amp; 0x3f;</div><div class='add'>+		tilt_x = ((data[7] &lt;&lt; 1) &amp; 0x7e) | (data[8] &gt;&gt; 7);</div><div class='add'>+		tilt_y = data[8] &amp; 0x7f;</div><div class='ctx'> </div><div class='ctx'> 		input_report_key(input, BTN_TOUCH, pressure &gt; 1);</div><div class='ctx'> </div><div class='hunk'>@@ -415,6 +534,8 @@ static void wacom_i4_parse_pen_report(struct wacom_data *wdata,</div><div class='ctx'> 		input_report_abs(input, ABS_Y, y);</div><div class='ctx'> 		input_report_abs(input, ABS_PRESSURE, pressure);</div><div class='ctx'> 		input_report_abs(input, ABS_DISTANCE, distance);</div><div class='add'>+		input_report_abs(input, ABS_TILT_X, tilt_x);</div><div class='add'>+		input_report_abs(input, ABS_TILT_Y, tilt_y);</div><div class='ctx'> 		input_report_abs(input, ABS_MISC, wdata-&gt;id);</div><div class='ctx'> 		input_event(input, EV_MSC, MSC_SERIAL, wdata-&gt;serial);</div><div class='ctx'> 		input_report_key(input, wdata-&gt;tool, 1);</div><div class='hunk'>@@ -455,6 +576,7 @@ static int wacom_raw_event(struct hid_device *hdev, struct hid_report *report,</div><div class='ctx'> 	struct input_dev *input;</div><div class='ctx'> 	unsigned char *data = (unsigned char *) raw_data;</div><div class='ctx'> 	int i;</div><div class='add'>+	__u8 power_raw;</div><div class='ctx'> </div><div class='ctx'> 	if (!(hdev-&gt;claimed &amp; HID_CLAIMED_INPUT))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -462,13 +584,15 @@ static int wacom_raw_event(struct hid_device *hdev, struct hid_report *report,</div><div class='ctx'> 	hidinput = list_entry(hdev-&gt;inputs.next, struct hid_input, list);</div><div class='ctx'> 	input = hidinput-&gt;input;</div><div class='ctx'> </div><div class='del'>-	/* Check if this is a tablet report */</div><div class='del'>-	if (data[0] != 0x03)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	switch (hdev-&gt;product) {</div><div class='ctx'> 	case USB_DEVICE_ID_WACOM_GRAPHIRE_BLUETOOTH:</div><div class='del'>-		return wacom_gr_parse_report(hdev, wdata, input, data);</div><div class='add'>+		if (data[0] == 0x03) {</div><div class='add'>+			return wacom_gr_parse_report(hdev, wdata, input, data);</div><div class='add'>+		} else {</div><div class='add'>+			hid_err(hdev, "Unknown report: %d,%d size:%d\n",</div><div class='add'>+					data[0], data[1], size);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case USB_DEVICE_ID_WACOM_INTUOS4_BLUETOOTH:</div><div class='ctx'> 		i = 1;</div><div class='hunk'>@@ -482,6 +606,13 @@ static int wacom_raw_event(struct hid_device *hdev, struct hid_report *report,</div><div class='ctx'> 			wacom_i4_parse_report(hdev, wdata, input, data + i);</div><div class='ctx'> 			i += 10;</div><div class='ctx'> 			wacom_i4_parse_report(hdev, wdata, input, data + i);</div><div class='add'>+			power_raw = data[i+10];</div><div class='add'>+			if (power_raw != wdata-&gt;power_raw) {</div><div class='add'>+				wdata-&gt;power_raw = power_raw;</div><div class='add'>+				wdata-&gt;battery_capacity = batcap_i4[power_raw &amp; 0x07];</div><div class='add'>+				wdata-&gt;ps_connected = power_raw &amp; 0x08;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			hid_err(hdev, "Unknown report: %d,%d size:%d\n",</div><div class='hunk'>@@ -546,6 +677,8 @@ static int wacom_input_mapped(struct hid_device *hdev, struct hid_input *hi,</div><div class='ctx'> 		input_set_abs_params(input, ABS_Y, 0, 25400, 4, 0);</div><div class='ctx'> 		input_set_abs_params(input, ABS_PRESSURE, 0, 2047, 0, 0);</div><div class='ctx'> 		input_set_abs_params(input, ABS_DISTANCE, 0, 63, 0, 0);</div><div class='add'>+		input_set_abs_params(input, ABS_TILT_X, 0, 127, 0, 0);</div><div class='add'>+		input_set_abs_params(input, ABS_TILT_Y, 0, 127, 0, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -584,19 +717,19 @@ static int wacom_probe(struct hid_device *hdev,</div><div class='ctx'> 		hid_warn(hdev,</div><div class='ctx'> 			 "can't create sysfs speed attribute err: %d\n", ret);</div><div class='ctx'> </div><div class='del'>-	switch (hdev-&gt;product) {</div><div class='del'>-	case USB_DEVICE_ID_WACOM_GRAPHIRE_BLUETOOTH:</div><div class='del'>-		/* Set Wacom mode 2 with high reporting speed */</div><div class='del'>-		wacom_poke(hdev, 1);</div><div class='del'>-		break;</div><div class='del'>-	case USB_DEVICE_ID_WACOM_INTUOS4_BLUETOOTH:</div><div class='add'>+	wdata-&gt;features = 0;</div><div class='add'>+	wacom_set_features(hdev, 1);</div><div class='add'>+</div><div class='add'>+	if (hdev-&gt;product == USB_DEVICE_ID_WACOM_INTUOS4_BLUETOOTH) {</div><div class='ctx'> 		sprintf(hdev-&gt;name, "%s", "Wacom Intuos4 WL");</div><div class='del'>-		wdata-&gt;features = 0;</div><div class='del'>-		wacom_set_features(hdev);</div><div class='del'>-		break;</div><div class='add'>+		ret = wacom_initialize_leds(hdev);</div><div class='add'>+		if (ret) {</div><div class='add'>+			hid_warn(hdev,</div><div class='add'>+				 "can't create led attribute, err: %d\n", ret);</div><div class='add'>+			goto destroy_leds;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_HID_WACOM_POWER_SUPPLY</div><div class='ctx'> 	wdata-&gt;battery.properties = wacom_battery_props;</div><div class='ctx'> 	wdata-&gt;battery.num_properties = ARRAY_SIZE(wacom_battery_props);</div><div class='ctx'> 	wdata-&gt;battery.get_property = wacom_battery_get_property;</div><div class='hunk'>@@ -629,16 +762,15 @@ static int wacom_probe(struct hid_device *hdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	power_supply_powers(&amp;wdata-&gt;ac, &amp;hdev-&gt;dev);</div><div class='del'>-#endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_HID_WACOM_POWER_SUPPLY</div><div class='ctx'> err_ac:</div><div class='ctx'> 	power_supply_unregister(&amp;wdata-&gt;battery);</div><div class='ctx'> err_battery:</div><div class='ctx'> 	device_remove_file(&amp;hdev-&gt;dev, &amp;dev_attr_speed);</div><div class='ctx'> 	hid_hw_stop(hdev);</div><div class='del'>-#endif</div><div class='add'>+destroy_leds:</div><div class='add'>+	wacom_destroy_leds(hdev);</div><div class='ctx'> err_free:</div><div class='ctx'> 	kfree(wdata);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -646,16 +778,14 @@ err_free:</div><div class='ctx'> </div><div class='ctx'> static void wacom_remove(struct hid_device *hdev)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_HID_WACOM_POWER_SUPPLY</div><div class='ctx'> 	struct wacom_data *wdata = hid_get_drvdata(hdev);</div><div class='del'>-#endif</div><div class='add'>+</div><div class='add'>+	wacom_destroy_leds(hdev);</div><div class='ctx'> 	device_remove_file(&amp;hdev-&gt;dev, &amp;dev_attr_speed);</div><div class='ctx'> 	hid_hw_stop(hdev);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_HID_WACOM_POWER_SUPPLY</div><div class='ctx'> 	power_supply_unregister(&amp;wdata-&gt;battery);</div><div class='ctx'> 	power_supply_unregister(&amp;wdata-&gt;ac);</div><div class='del'>-#endif</div><div class='ctx'> 	kfree(hid_get_drvdata(hdev));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -693,5 +823,5 @@ static void __exit wacom_exit(void)</div><div class='ctx'> </div><div class='ctx'> module_init(wacom_init);</div><div class='ctx'> module_exit(wacom_exit);</div><div class='add'>+MODULE_DESCRIPTION("Driver for Wacom Graphire Bluetooth and Wacom Intuos4 WL");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='head'>diff --git a/drivers/hid/hid-waltop.c b/drivers/hid/hid-waltop.c<br/>index 2cfd95c4467b..745e4e9a8cf2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-waltop.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-waltop.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-waltop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-waltop.c</a></div><div class='hunk'>@@ -502,28 +502,146 @@ static __u8 media_tablet_14_1_inch_rdesc_fixed[] = {</div><div class='ctx'> 	0xC0                /*  End Collection                      */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct waltop_state {</div><div class='del'>-	u8 pressure0;</div><div class='del'>-	u8 pressure1;</div><div class='add'>+/*</div><div class='add'>+ * See Sirius Battery Free Tablet description, device and HID report descriptors</div><div class='add'>+ * at</div><div class='add'>+ * http://sf.net/apps/mediawiki/digimend/?title=Waltop_Sirius_Battery_Free_Tablet</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Size of the original report descriptor of Sirius Battery Free Tablet */</div><div class='add'>+#define SIRIUS_BATTERY_FREE_TABLET_RDESC_ORIG_SIZE	335</div><div class='add'>+</div><div class='add'>+/* Fixed Sirius Battery Free Tablet descriptor */</div><div class='add'>+static __u8 sirius_battery_free_tablet_rdesc_fixed[] = {</div><div class='add'>+	0x05, 0x0D,         /*  Usage Page (Digitizer),             */</div><div class='add'>+	0x09, 0x02,         /*  Usage (Pen),                        */</div><div class='add'>+	0xA1, 0x01,         /*  Collection (Application),           */</div><div class='add'>+	0x85, 0x10,         /*      Report ID (16),                 */</div><div class='add'>+	0x09, 0x20,         /*      Usage (Stylus),                 */</div><div class='add'>+	0xA0,               /*      Collection (Physical),          */</div><div class='add'>+	0x95, 0x01,         /*          Report Count (1),           */</div><div class='add'>+	0x15, 0x01,         /*          Logical Minimum (1),        */</div><div class='add'>+	0x25, 0x03,         /*          Logical Maximum (3),        */</div><div class='add'>+	0x75, 0x02,         /*          Report Size (2),            */</div><div class='add'>+	0x09, 0x42,         /*          Usage (Tip Switch),         */</div><div class='add'>+	0x09, 0x44,         /*          Usage (Barrel Switch),      */</div><div class='add'>+	0x09, 0x46,         /*          Usage (Tablet Pick),        */</div><div class='add'>+	0x80,               /*          Input,                      */</div><div class='add'>+	0x14,               /*          Logical Minimum (0),        */</div><div class='add'>+	0x25, 0x01,         /*          Logical Maximum (1),        */</div><div class='add'>+	0x75, 0x01,         /*          Report Size (1),            */</div><div class='add'>+	0x09, 0x3C,         /*          Usage (Invert),             */</div><div class='add'>+	0x81, 0x02,         /*          Input (Variable),           */</div><div class='add'>+	0x81, 0x03,         /*          Input (Constant, Variable), */</div><div class='add'>+	0x09, 0x32,         /*          Usage (In Range),           */</div><div class='add'>+	0x81, 0x02,         /*          Input (Variable),           */</div><div class='add'>+	0x95, 0x03,         /*          Report Count (3),           */</div><div class='add'>+	0x81, 0x03,         /*          Input (Constant, Variable), */</div><div class='add'>+	0xA4,               /*          Push,                       */</div><div class='add'>+	0x05, 0x01,         /*          Usage Page (Desktop),       */</div><div class='add'>+	0x55, 0xFD,         /*          Unit Exponent (-3),         */</div><div class='add'>+	0x65, 0x13,         /*          Unit (Inch),                */</div><div class='add'>+	0x34,               /*          Physical Minimum (0),       */</div><div class='add'>+	0x14,               /*          Logical Minimum (0),        */</div><div class='add'>+	0x75, 0x10,         /*          Report Size (16),           */</div><div class='add'>+	0x95, 0x01,         /*          Report Count (1),           */</div><div class='add'>+	0x46, 0x10, 0x27,   /*          Physical Maximum (10000),   */</div><div class='add'>+	0x26, 0x20, 0x4E,   /*          Logical Maximum (20000),    */</div><div class='add'>+	0x09, 0x30,         /*          Usage (X),                  */</div><div class='add'>+	0x81, 0x02,         /*          Input (Variable),           */</div><div class='add'>+	0x46, 0x70, 0x17,   /*          Physical Maximum (6000),    */</div><div class='add'>+	0x26, 0xE0, 0x2E,   /*          Logical Maximum (12000),    */</div><div class='add'>+	0x09, 0x31,         /*          Usage (Y),                  */</div><div class='add'>+	0x81, 0x02,         /*          Input (Variable),           */</div><div class='add'>+	0xB4,               /*          Pop,                        */</div><div class='add'>+	0x75, 0x10,         /*          Report Size (16),           */</div><div class='add'>+	0x95, 0x01,         /*          Report Count (1),           */</div><div class='add'>+	0x14,               /*          Logical Minimum (0),        */</div><div class='add'>+	0x26, 0xFF, 0x03,   /*          Logical Maximum (1023),     */</div><div class='add'>+	0x09, 0x30,         /*          Usage (Tip Pressure),       */</div><div class='add'>+	0x81, 0x02,         /*          Input (Variable),           */</div><div class='add'>+	0xA4,               /*          Push,                       */</div><div class='add'>+	0x55, 0xFE,         /*          Unit Exponent (-2),         */</div><div class='add'>+	0x65, 0x12,         /*          Unit (Radians),             */</div><div class='add'>+	0x35, 0x97,         /*          Physical Minimum (-105),    */</div><div class='add'>+	0x45, 0x69,         /*          Physical Maximum (105),     */</div><div class='add'>+	0x15, 0x97,         /*          Logical Minimum (-105),     */</div><div class='add'>+	0x25, 0x69,         /*          Logical Maximum (105),      */</div><div class='add'>+	0x75, 0x08,         /*          Report Size (8),            */</div><div class='add'>+	0x95, 0x02,         /*          Report Count (2),           */</div><div class='add'>+	0x09, 0x3D,         /*          Usage (X Tilt),             */</div><div class='add'>+	0x09, 0x3E,         /*          Usage (Y Tilt),             */</div><div class='add'>+	0x81, 0x02,         /*          Input (Variable),           */</div><div class='add'>+	0xB4,               /*          Pop,                        */</div><div class='add'>+	0xC0,               /*      End Collection,                 */</div><div class='add'>+	0xC0,               /*  End Collection,                     */</div><div class='add'>+	0x05, 0x01,         /*  Usage Page (Desktop),               */</div><div class='add'>+	0x09, 0x02,         /*  Usage (Mouse),                      */</div><div class='add'>+	0xA1, 0x01,         /*  Collection (Application),           */</div><div class='add'>+	0x85, 0x01,         /*      Report ID (1),                  */</div><div class='add'>+	0x09, 0x01,         /*      Usage (Pointer),                */</div><div class='add'>+	0xA0,               /*      Collection (Physical),          */</div><div class='add'>+	0x75, 0x08,         /*          Report Size (8),            */</div><div class='add'>+	0x95, 0x03,         /*          Report Count (3),           */</div><div class='add'>+	0x81, 0x03,         /*          Input (Constant, Variable), */</div><div class='add'>+	0x09, 0x38,         /*          Usage (Wheel),              */</div><div class='add'>+	0x15, 0xFF,         /*          Logical Minimum (-1),       */</div><div class='add'>+	0x25, 0x01,         /*          Logical Maximum (1),        */</div><div class='add'>+	0x75, 0x08,         /*          Report Size (8),            */</div><div class='add'>+	0x95, 0x01,         /*          Report Count (1),           */</div><div class='add'>+	0x81, 0x06,         /*          Input (Variable, Relative), */</div><div class='add'>+	0x75, 0x08,         /*          Report Size (8),            */</div><div class='add'>+	0x95, 0x03,         /*          Report Count (3),           */</div><div class='add'>+	0x81, 0x03,         /*          Input (Constant, Variable), */</div><div class='add'>+	0xC0,               /*      End Collection,                 */</div><div class='add'>+	0xC0,               /*  End Collection,                     */</div><div class='add'>+	0x05, 0x01,         /*  Usage Page (Desktop),               */</div><div class='add'>+	0x09, 0x06,         /*  Usage (Keyboard),                   */</div><div class='add'>+	0xA1, 0x01,         /*  Collection (Application),           */</div><div class='add'>+	0x85, 0x0D,         /*      Report ID (13),                 */</div><div class='add'>+	0x05, 0x07,         /*      Usage Page (Keyboard),          */</div><div class='add'>+	0x19, 0xE0,         /*      Usage Minimum (KB Leftcontrol), */</div><div class='add'>+	0x29, 0xE7,         /*      Usage Maximum (KB Right GUI),   */</div><div class='add'>+	0x14,               /*      Logical Minimum (0),            */</div><div class='add'>+	0x25, 0x01,         /*      Logical Maximum (1),            */</div><div class='add'>+	0x75, 0x01,         /*      Report Size (1),                */</div><div class='add'>+	0x95, 0x08,         /*      Report Count (8),               */</div><div class='add'>+	0x81, 0x02,         /*      Input (Variable),               */</div><div class='add'>+	0x75, 0x08,         /*      Report Size (8),                */</div><div class='add'>+	0x95, 0x01,         /*      Report Count (1),               */</div><div class='add'>+	0x81, 0x01,         /*      Input (Constant),               */</div><div class='add'>+	0x18,               /*      Usage Minimum (None),           */</div><div class='add'>+	0x29, 0x65,         /*      Usage Maximum (KB Application), */</div><div class='add'>+	0x14,               /*      Logical Minimum (0),            */</div><div class='add'>+	0x25, 0x65,         /*      Logical Maximum (101),          */</div><div class='add'>+	0x75, 0x08,         /*      Report Size (8),                */</div><div class='add'>+	0x95, 0x05,         /*      Report Count (5),               */</div><div class='add'>+	0x80,               /*      Input,                          */</div><div class='add'>+	0xC0,               /*  End Collection,                     */</div><div class='add'>+	0x05, 0x0C,         /*  Usage Page (Consumer),              */</div><div class='add'>+	0x09, 0x01,         /*  Usage (Consumer Control),           */</div><div class='add'>+	0xA1, 0x01,         /*  Collection (Application),           */</div><div class='add'>+	0x85, 0x0C,         /*      Report ID (12),                 */</div><div class='add'>+	0x09, 0xE9,         /*      Usage (Volume Inc),             */</div><div class='add'>+	0x09, 0xEA,         /*      Usage (Volume Dec),             */</div><div class='add'>+	0x14,               /*      Logical Minimum (0),            */</div><div class='add'>+	0x25, 0x01,         /*      Logical Maximum (1),            */</div><div class='add'>+	0x75, 0x01,         /*      Report Size (1),                */</div><div class='add'>+	0x95, 0x02,         /*      Report Count (2),               */</div><div class='add'>+	0x81, 0x02,         /*      Input (Variable),               */</div><div class='add'>+	0x75, 0x06,         /*      Report Size (6),                */</div><div class='add'>+	0x95, 0x01,         /*      Report Count (1),               */</div><div class='add'>+	0x81, 0x03,         /*      Input (Constant, Variable),     */</div><div class='add'>+	0x75, 0x10,         /*      Report Size (16),               */</div><div class='add'>+	0x95, 0x03,         /*      Report Count (3),               */</div><div class='add'>+	0x81, 0x03,         /*      Input (Constant, Variable),     */</div><div class='add'>+	0xC0                /*  End Collection                      */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int waltop_probe(struct hid_device *hdev,</div><div class='ctx'> 			const struct hid_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct waltop_state *s;</div><div class='del'>-</div><div class='del'>-	s = kzalloc(sizeof(*s), GFP_KERNEL);</div><div class='del'>-	if (s == NULL) {</div><div class='del'>-		hid_err(hdev, "can't allocate device state\n");</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	s-&gt;pressure0 = 0;</div><div class='del'>-	s-&gt;pressure1 = 0;</div><div class='del'>-</div><div class='del'>-	hid_set_drvdata(hdev, s);</div><div class='ctx'> </div><div class='ctx'> 	ret = hid_parse(hdev);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -539,7 +657,6 @@ static int waltop_probe(struct hid_device *hdev,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> err:</div><div class='del'>-	kfree(s);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -583,6 +700,12 @@ static __u8 *waltop_report_fixup(struct hid_device *hdev, __u8 *rdesc,</div><div class='ctx'> 			*rsize = sizeof(media_tablet_14_1_inch_rdesc_fixed);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case USB_DEVICE_ID_WALTOP_SIRIUS_BATTERY_FREE_TABLET:</div><div class='add'>+		if (*rsize == SIRIUS_BATTERY_FREE_TABLET_RDESC_ORIG_SIZE) {</div><div class='add'>+			rdesc = sirius_battery_free_tablet_rdesc_fixed;</div><div class='add'>+			*rsize = sizeof(sirius_battery_free_tablet_rdesc_fixed);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	return rdesc;</div><div class='ctx'> }</div><div class='hunk'>@@ -590,39 +713,72 @@ static __u8 *waltop_report_fixup(struct hid_device *hdev, __u8 *rdesc,</div><div class='ctx'> static int waltop_raw_event(struct hid_device *hdev, struct hid_report *report,</div><div class='ctx'> 		     u8 *data, int size)</div><div class='ctx'> {</div><div class='del'>-	/* If this is a pen input report of a tablet with PID 0038 */</div><div class='del'>-	if (hdev-&gt;product == USB_DEVICE_ID_WALTOP_PID_0038 &amp;&amp;</div><div class='del'>-	    report-&gt;type == HID_INPUT_REPORT &amp;&amp;</div><div class='del'>-	    report-&gt;id == 16 &amp;&amp;</div><div class='del'>-	    size == 8) {</div><div class='del'>-		struct waltop_state *s = hid_get_drvdata(hdev);</div><div class='del'>-</div><div class='add'>+	/* If this is a pen input report */</div><div class='add'>+	if (report-&gt;type == HID_INPUT_REPORT &amp;&amp; report-&gt;id == 16 &amp;&amp; size &gt;= 8) {</div><div class='ctx'> 		/*</div><div class='del'>-		 * Ignore maximum pressure reported when a barrel button is</div><div class='del'>-		 * pressed.</div><div class='add'>+		 * Ignore reported pressure when a barrel button is pressed,</div><div class='add'>+		 * because it is rarely correct.</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='ctx'> 		/* If a barrel button is pressed */</div><div class='ctx'> 		if ((data[1] &amp; 0xF) &gt; 1) {</div><div class='del'>-			/* Use the last known pressure */</div><div class='del'>-			data[6] = s-&gt;pressure0;</div><div class='del'>-			data[7] = s-&gt;pressure1;</div><div class='del'>-		} else {</div><div class='del'>-			/* Remember reported pressure */</div><div class='del'>-			s-&gt;pressure0 = data[6];</div><div class='del'>-			s-&gt;pressure1 = data[7];</div><div class='add'>+			/* Report zero pressure */</div><div class='add'>+			data[6] = 0;</div><div class='add'>+			data[7] = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* If this is a pen input report of Sirius Battery Free Tablet */</div><div class='add'>+	if (hdev-&gt;product == USB_DEVICE_ID_WALTOP_SIRIUS_BATTERY_FREE_TABLET &amp;&amp;</div><div class='add'>+	    report-&gt;type == HID_INPUT_REPORT &amp;&amp;</div><div class='add'>+	    report-&gt;id == 16 &amp;&amp;</div><div class='add'>+	    size == 10) {</div><div class='add'>+		/*</div><div class='add'>+		 * The tablet reports tilt as roughly sin(a)*21 (18 means 60</div><div class='add'>+		 * degrees).</div><div class='add'>+		 *</div><div class='add'>+		 * This array stores angles as radians * 100, corresponding to</div><div class='add'>+		 * reported values up to 60 degrees, as expected by userspace.</div><div class='add'>+		 */</div><div class='add'>+		static const s8 tilt_to_radians[] = {</div><div class='add'>+			0, 5, 10, 14, 19, 24, 29, 34, 40, 45,</div><div class='add'>+			50, 56, 62, 68, 74, 81, 88, 96, 105</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		s8 tilt_x = (s8)data[8];</div><div class='add'>+		s8 tilt_y = (s8)data[9];</div><div class='add'>+		s8 sign_x = tilt_x &gt;= 0 ? 1 : -1;</div><div class='add'>+		s8 sign_y = tilt_y &gt;= 0 ? 1 : -1;</div><div class='add'>+</div><div class='add'>+		tilt_x *= sign_x;</div><div class='add'>+		tilt_y *= sign_y;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Reverse the Y Tilt direction to match the HID standard and</div><div class='add'>+		 * userspace expectations. See HID Usage Tables v1.12 16.3.2</div><div class='add'>+		 * Tilt Orientation.</div><div class='add'>+		 */</div><div class='add'>+		sign_y *= -1;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * This effectively clamps reported tilt to 60 degrees - the</div><div class='add'>+		 * range expected by userspace</div><div class='add'>+		 */</div><div class='add'>+		if (tilt_x &gt; ARRAY_SIZE(tilt_to_radians) - 1)</div><div class='add'>+			tilt_x = ARRAY_SIZE(tilt_to_radians) - 1;</div><div class='add'>+		if (tilt_y &gt; ARRAY_SIZE(tilt_to_radians) - 1)</div><div class='add'>+			tilt_y = ARRAY_SIZE(tilt_to_radians) - 1;</div><div class='add'>+</div><div class='add'>+		data[8] = tilt_to_radians[tilt_x] * sign_x;</div><div class='add'>+		data[9] = tilt_to_radians[tilt_y] * sign_y;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void waltop_remove(struct hid_device *hdev)</div><div class='ctx'> {</div><div class='del'>-	struct waltop_state *s = hid_get_drvdata(hdev);</div><div class='del'>-</div><div class='ctx'> 	hid_hw_stop(hdev);</div><div class='del'>-	kfree(s);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct hid_device_id waltop_devices[] = {</div><div class='hunk'>@@ -638,6 +794,8 @@ static const struct hid_device_id waltop_devices[] = {</div><div class='ctx'> 				USB_DEVICE_ID_WALTOP_MEDIA_TABLET_10_6_INCH) },</div><div class='ctx'> 	{ HID_USB_DEVICE(USB_VENDOR_ID_WALTOP,</div><div class='ctx'> 				USB_DEVICE_ID_WALTOP_MEDIA_TABLET_14_1_INCH) },</div><div class='add'>+	{ HID_USB_DEVICE(USB_VENDOR_ID_WALTOP,</div><div class='add'>+			 USB_DEVICE_ID_WALTOP_SIRIUS_BATTERY_FREE_TABLET) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(hid, waltop_devices);</div><div class='head'>diff --git a/drivers/hid/hid-wiimote-core.c b/drivers/hid/hid-wiimote-core.c<br/>index cac3589b1ed5..84e2fbec5fbb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hid-wiimote-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hid-wiimote-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hid-wiimote-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hid-wiimote-core.c</a></div><div class='hunk'>@@ -769,7 +769,7 @@ static void __ir_to_input(struct wiimote_data *wdata, const __u8 *ir,</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Basic IR data is encoded into 3 bytes. The first two bytes are the</div><div class='del'>-	 * upper 8 bit of the X/Y data, the 3rd byte contains the lower 2 bits</div><div class='add'>+	 * lower 8 bit of the X/Y data, the 3rd byte contains the upper 2 bits</div><div class='ctx'> 	 * of both.</div><div class='ctx'> 	 * If data is packed, then the 3rd byte is put first and slightly</div><div class='ctx'> 	 * reordered. This allows to interleave packed and non-packed data to</div><div class='hunk'>@@ -778,17 +778,11 @@ static void __ir_to_input(struct wiimote_data *wdata, const __u8 *ir,</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	if (packed) {</div><div class='del'>-		x = ir[1] &lt;&lt; 2;</div><div class='del'>-		y = ir[2] &lt;&lt; 2;</div><div class='del'>-</div><div class='del'>-		x |= ir[0] &amp; 0x3;</div><div class='del'>-		y |= (ir[0] &gt;&gt; 2) &amp; 0x3;</div><div class='add'>+		x = ir[1] | ((ir[0] &amp; 0x03) &lt;&lt; 8);</div><div class='add'>+		y = ir[2] | ((ir[0] &amp; 0x0c) &lt;&lt; 6);</div><div class='ctx'> 	} else {</div><div class='del'>-		x = ir[0] &lt;&lt; 2;</div><div class='del'>-		y = ir[1] &lt;&lt; 2;</div><div class='del'>-</div><div class='del'>-		x |= (ir[2] &gt;&gt; 4) &amp; 0x3;</div><div class='del'>-		y |= (ir[2] &gt;&gt; 6) &amp; 0x3;</div><div class='add'>+		x = ir[0] | ((ir[2] &amp; 0x30) &lt;&lt; 4);</div><div class='add'>+		y = ir[1] | ((ir[2] &amp; 0xc0) &lt;&lt; 2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	input_report_abs(wdata-&gt;ir, xid, x);</div><div class='head'>diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c<br/>index cf7d6d58e79f..36fa77b40ffb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/hidraw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/hidraw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/hidraw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/hidraw.c</a></div><div class='hunk'>@@ -87,11 +87,13 @@ static ssize_t hidraw_read(struct file *file, char __user *buffer, size_t count,</div><div class='ctx'> 		len = list-&gt;buffer[list-&gt;tail].len &gt; count ?</div><div class='ctx'> 			count : list-&gt;buffer[list-&gt;tail].len;</div><div class='ctx'> </div><div class='del'>-		if (copy_to_user(buffer, list-&gt;buffer[list-&gt;tail].value, len)) {</div><div class='del'>-			ret = -EFAULT;</div><div class='del'>-			goto out;</div><div class='add'>+		if (list-&gt;buffer[list-&gt;tail].value) {</div><div class='add'>+			if (copy_to_user(buffer, list-&gt;buffer[list-&gt;tail].value, len)) {</div><div class='add'>+				ret = -EFAULT;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			ret = len;</div><div class='ctx'> 		}</div><div class='del'>-		ret = len;</div><div class='ctx'> </div><div class='ctx'> 		kfree(list-&gt;buffer[list-&gt;tail].value);</div><div class='ctx'> 		list-&gt;tail = (list-&gt;tail + 1) &amp; (HIDRAW_BUFFER_SIZE - 1);</div><div class='hunk'>@@ -437,19 +439,24 @@ static const struct file_operations hidraw_ops = {</div><div class='ctx'> 	.llseek =	noop_llseek,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void hidraw_report_event(struct hid_device *hid, u8 *data, int len)</div><div class='add'>+int hidraw_report_event(struct hid_device *hid, u8 *data, int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct hidraw *dev = hid-&gt;hidraw;</div><div class='ctx'> 	struct hidraw_list *list;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(list, &amp;dev-&gt;list, node) {</div><div class='del'>-		list-&gt;buffer[list-&gt;head].value = kmemdup(data, len, GFP_ATOMIC);</div><div class='add'>+		if (!(list-&gt;buffer[list-&gt;head].value = kmemdup(data, len, GFP_ATOMIC))) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 		list-&gt;buffer[list-&gt;head].len = len;</div><div class='ctx'> 		list-&gt;head = (list-&gt;head + 1) &amp; (HIDRAW_BUFFER_SIZE - 1);</div><div class='ctx'> 		kill_fasync(&amp;list-&gt;fasync, SIGIO, POLL_IN);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	wake_up_interruptible(&amp;dev-&gt;wait);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(hidraw_report_event);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/hid/usbhid/hid-core.c b/drivers/hid/usbhid/hid-core.c<br/>index 5bf91dbad59d..482f936fc29b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/usbhid/hid-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/usbhid/hid-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/usbhid/hid-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/usbhid/hid-core.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='ctx'> #include &lt;linux/wait.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -86,8 +87,13 @@ static int hid_start_in(struct hid_device *hid)</div><div class='ctx'> 			!test_bit(HID_REPORTED_IDLE, &amp;usbhid-&gt;iofl) &amp;&amp;</div><div class='ctx'> 			!test_and_set_bit(HID_IN_RUNNING, &amp;usbhid-&gt;iofl)) {</div><div class='ctx'> 		rc = usb_submit_urb(usbhid-&gt;urbin, GFP_ATOMIC);</div><div class='del'>-		if (rc != 0)</div><div class='add'>+		if (rc != 0) {</div><div class='ctx'> 			clear_bit(HID_IN_RUNNING, &amp;usbhid-&gt;iofl);</div><div class='add'>+			if (rc == -ENOSPC)</div><div class='add'>+				set_bit(HID_NO_BANDWIDTH, &amp;usbhid-&gt;iofl);</div><div class='add'>+		} else {</div><div class='add'>+			clear_bit(HID_NO_BANDWIDTH, &amp;usbhid-&gt;iofl);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;usbhid-&gt;lock, flags);</div><div class='ctx'> 	return rc;</div><div class='hunk'>@@ -173,8 +179,10 @@ static void hid_io_error(struct hid_device *hid)</div><div class='ctx'> </div><div class='ctx'> 	if (time_after(jiffies, usbhid-&gt;stop_retry)) {</div><div class='ctx'> </div><div class='del'>-		/* Retries failed, so do a port reset */</div><div class='del'>-		if (!test_and_set_bit(HID_RESET_PENDING, &amp;usbhid-&gt;iofl)) {</div><div class='add'>+		/* Retries failed, so do a port reset unless we lack bandwidth*/</div><div class='add'>+		if (test_bit(HID_NO_BANDWIDTH, &amp;usbhid-&gt;iofl)</div><div class='add'>+		     &amp;&amp; !test_and_set_bit(HID_RESET_PENDING, &amp;usbhid-&gt;iofl)) {</div><div class='add'>+</div><div class='ctx'> 			schedule_work(&amp;usbhid-&gt;reset_work);</div><div class='ctx'> 			goto done;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -203,7 +211,7 @@ static int usbhid_restart_out_queue(struct usbhid_device *usbhid)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if ((kicked = (usbhid-&gt;outhead != usbhid-&gt;outtail))) {</div><div class='del'>-		dbg("Kicking head %d tail %d", usbhid-&gt;outhead, usbhid-&gt;outtail);</div><div class='add'>+		hid_dbg(hid, "Kicking head %d tail %d", usbhid-&gt;outhead, usbhid-&gt;outtail);</div><div class='ctx'> </div><div class='ctx'> 		r = usb_autopm_get_interface_async(usbhid-&gt;intf);</div><div class='ctx'> 		if (r &lt; 0)</div><div class='hunk'>@@ -230,7 +238,7 @@ static int usbhid_restart_ctrl_queue(struct usbhid_device *usbhid)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if ((kicked = (usbhid-&gt;ctrlhead != usbhid-&gt;ctrltail))) {</div><div class='del'>-		dbg("Kicking head %d tail %d", usbhid-&gt;ctrlhead, usbhid-&gt;ctrltail);</div><div class='add'>+		hid_dbg(hid, "Kicking head %d tail %d", usbhid-&gt;ctrlhead, usbhid-&gt;ctrltail);</div><div class='ctx'> </div><div class='ctx'> 		r = usb_autopm_get_interface_async(usbhid-&gt;intf);</div><div class='ctx'> 		if (r &lt; 0)</div><div class='hunk'>@@ -399,6 +407,16 @@ static int hid_submit_ctrl(struct hid_device *hid)</div><div class='ctx'>  * Output interrupt completion handler.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+static int irq_out_pump_restart(struct hid_device *hid)</div><div class='add'>+{</div><div class='add'>+	struct usbhid_device *usbhid = hid-&gt;driver_data;</div><div class='add'>+</div><div class='add'>+	if (usbhid-&gt;outhead != usbhid-&gt;outtail)</div><div class='add'>+		return hid_submit_out(hid);</div><div class='add'>+	else</div><div class='add'>+		return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void hid_irq_out(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct hid_device *hid = urb-&gt;context;</div><div class='hunk'>@@ -428,7 +446,7 @@ static void hid_irq_out(struct urb *urb)</div><div class='ctx'> 	else</div><div class='ctx'> 		usbhid-&gt;outtail = (usbhid-&gt;outtail + 1) &amp; (HID_OUTPUT_FIFO_SIZE - 1);</div><div class='ctx'> </div><div class='del'>-	if (usbhid-&gt;outhead != usbhid-&gt;outtail &amp;&amp; !hid_submit_out(hid)) {</div><div class='add'>+	if (!irq_out_pump_restart(hid)) {</div><div class='ctx'> 		/* Successfully submitted next urb in queue */</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;usbhid-&gt;lock, flags);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -443,6 +461,15 @@ static void hid_irq_out(struct urb *urb)</div><div class='ctx'> /*</div><div class='ctx'>  * Control pipe completion handler.</div><div class='ctx'>  */</div><div class='add'>+static int ctrl_pump_restart(struct hid_device *hid)</div><div class='add'>+{</div><div class='add'>+	struct usbhid_device *usbhid = hid-&gt;driver_data;</div><div class='add'>+</div><div class='add'>+	if (usbhid-&gt;ctrlhead != usbhid-&gt;ctrltail)</div><div class='add'>+		return hid_submit_ctrl(hid);</div><div class='add'>+	else</div><div class='add'>+		return -1;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static void hid_ctrl(struct urb *urb)</div><div class='ctx'> {</div><div class='hunk'>@@ -476,7 +503,7 @@ static void hid_ctrl(struct urb *urb)</div><div class='ctx'> 	else</div><div class='ctx'> 		usbhid-&gt;ctrltail = (usbhid-&gt;ctrltail + 1) &amp; (HID_CONTROL_FIFO_SIZE - 1);</div><div class='ctx'> </div><div class='del'>-	if (usbhid-&gt;ctrlhead != usbhid-&gt;ctrltail &amp;&amp; !hid_submit_ctrl(hid)) {</div><div class='add'>+	if (!ctrl_pump_restart(hid)) {</div><div class='ctx'> 		/* Successfully submitted next urb in queue */</div><div class='ctx'> 		spin_unlock(&amp;usbhid-&gt;lock);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -535,11 +562,27 @@ static void __usbhid_submit_report(struct hid_device *hid, struct hid_report *re</div><div class='ctx'> 			 * the queue is known to run</div><div class='ctx'> 			 * but an earlier request may be stuck</div><div class='ctx'> 			 * we may need to time out</div><div class='del'>-			 * no race because this is called under</div><div class='add'>+			 * no race because the URB is blocked under</div><div class='ctx'> 			 * spinlock</div><div class='ctx'> 			 */</div><div class='del'>-			if (time_after(jiffies, usbhid-&gt;last_out + HZ * 5))</div><div class='add'>+			if (time_after(jiffies, usbhid-&gt;last_out + HZ * 5)) {</div><div class='add'>+				usb_block_urb(usbhid-&gt;urbout);</div><div class='add'>+				/* drop lock to not deadlock if the callback is called */</div><div class='add'>+				spin_unlock(&amp;usbhid-&gt;lock);</div><div class='ctx'> 				usb_unlink_urb(usbhid-&gt;urbout);</div><div class='add'>+				spin_lock(&amp;usbhid-&gt;lock);</div><div class='add'>+				usb_unblock_urb(usbhid-&gt;urbout);</div><div class='add'>+				/*</div><div class='add'>+				 * if the unlinking has already completed</div><div class='add'>+				 * the pump will have been stopped</div><div class='add'>+				 * it must be restarted now</div><div class='add'>+				 */</div><div class='add'>+				if (!test_bit(HID_OUT_RUNNING, &amp;usbhid-&gt;iofl))</div><div class='add'>+					if (!irq_out_pump_restart(hid))</div><div class='add'>+						set_bit(HID_OUT_RUNNING, &amp;usbhid-&gt;iofl);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -583,11 +626,25 @@ static void __usbhid_submit_report(struct hid_device *hid, struct hid_report *re</div><div class='ctx'> 		 * the queue is known to run</div><div class='ctx'> 		 * but an earlier request may be stuck</div><div class='ctx'> 		 * we may need to time out</div><div class='del'>-		 * no race because this is called under</div><div class='add'>+		 * no race because the URB is blocked under</div><div class='ctx'> 		 * spinlock</div><div class='ctx'> 		 */</div><div class='del'>-		if (time_after(jiffies, usbhid-&gt;last_ctrl + HZ * 5))</div><div class='add'>+		if (time_after(jiffies, usbhid-&gt;last_ctrl + HZ * 5)) {</div><div class='add'>+			usb_block_urb(usbhid-&gt;urbctrl);</div><div class='add'>+			/* drop lock to not deadlock if the callback is called */</div><div class='add'>+			spin_unlock(&amp;usbhid-&gt;lock);</div><div class='ctx'> 			usb_unlink_urb(usbhid-&gt;urbctrl);</div><div class='add'>+			spin_lock(&amp;usbhid-&gt;lock);</div><div class='add'>+			usb_unblock_urb(usbhid-&gt;urbctrl);</div><div class='add'>+			/*</div><div class='add'>+			 * if the unlinking has already completed</div><div class='add'>+			 * the pump will have been stopped</div><div class='add'>+			 * it must be restarted now</div><div class='add'>+			 */</div><div class='add'>+			if (!test_bit(HID_CTRL_RUNNING, &amp;usbhid-&gt;iofl))</div><div class='add'>+				if (!ctrl_pump_restart(hid))</div><div class='add'>+					set_bit(HID_CTRL_RUNNING, &amp;usbhid-&gt;iofl);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -700,7 +757,7 @@ static int hid_get_class_descriptor(struct usb_device *dev, int ifnum,</div><div class='ctx'> int usbhid_open(struct hid_device *hid)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbhid_device *usbhid = hid-&gt;driver_data;</div><div class='del'>-	int res;</div><div class='add'>+	int res = 0;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;hid_open_mut);</div><div class='ctx'> 	if (!hid-&gt;open++) {</div><div class='hunk'>@@ -708,17 +765,27 @@ int usbhid_open(struct hid_device *hid)</div><div class='ctx'> 		/* the device must be awake to reliably request remote wakeup */</div><div class='ctx'> 		if (res &lt; 0) {</div><div class='ctx'> 			hid-&gt;open--;</div><div class='del'>-			mutex_unlock(&amp;hid_open_mut);</div><div class='del'>-			return -EIO;</div><div class='add'>+			res = -EIO;</div><div class='add'>+			goto done;</div><div class='ctx'> 		}</div><div class='ctx'> 		usbhid-&gt;intf-&gt;needs_remote_wakeup = 1;</div><div class='del'>-		if (hid_start_in(hid))</div><div class='del'>-			hid_io_error(hid);</div><div class='del'>- </div><div class='add'>+		res = hid_start_in(hid);</div><div class='add'>+		if (res) {</div><div class='add'>+			if (res != -ENOSPC) {</div><div class='add'>+				hid_io_error(hid);</div><div class='add'>+				res = 0;</div><div class='add'>+			} else {</div><div class='add'>+				/* no use opening if resources are insufficient */</div><div class='add'>+				hid-&gt;open--;</div><div class='add'>+				res = -EBUSY;</div><div class='add'>+				usbhid-&gt;intf-&gt;needs_remote_wakeup = 0;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 		usb_autopm_put_interface(usbhid-&gt;intf);</div><div class='ctx'> 	}</div><div class='add'>+done:</div><div class='ctx'> 	mutex_unlock(&amp;hid_open_mut);</div><div class='del'>-	return 0;</div><div class='add'>+	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void usbhid_close(struct hid_device *hid)</div><div class='hunk'>@@ -1347,7 +1414,34 @@ static int hid_post_reset(struct usb_interface *intf)</div><div class='ctx'> 	struct usb_device *dev = interface_to_usbdev (intf);</div><div class='ctx'> 	struct hid_device *hid = usb_get_intfdata(intf);</div><div class='ctx'> 	struct usbhid_device *usbhid = hid-&gt;driver_data;</div><div class='add'>+	struct usb_host_interface *interface = intf-&gt;cur_altsetting;</div><div class='ctx'> 	int status;</div><div class='add'>+	char *rdesc;</div><div class='add'>+</div><div class='add'>+	/* Fetch and examine the HID report descriptor. If this</div><div class='add'>+	 * has changed, then rebind. Since usbcore's check of the</div><div class='add'>+	 * configuration descriptors passed, we already know that</div><div class='add'>+	 * the size of the HID report descriptor has not changed.</div><div class='add'>+	 */</div><div class='add'>+	rdesc = kmalloc(hid-&gt;rsize, GFP_KERNEL);</div><div class='add'>+	if (!rdesc) {</div><div class='add'>+		dbg_hid("couldn't allocate rdesc memory (post_reset)\n");</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	status = hid_get_class_descriptor(dev,</div><div class='add'>+				interface-&gt;desc.bInterfaceNumber,</div><div class='add'>+				HID_DT_REPORT, rdesc, hid-&gt;rsize);</div><div class='add'>+	if (status &lt; 0) {</div><div class='add'>+		dbg_hid("reading report descriptor failed (post_reset)\n");</div><div class='add'>+		kfree(rdesc);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	status = memcmp(rdesc, hid-&gt;rdesc, hid-&gt;rsize);</div><div class='add'>+	kfree(rdesc);</div><div class='add'>+	if (status != 0) {</div><div class='add'>+		dbg_hid("report descriptor changed\n");</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;usbhid-&gt;lock);</div><div class='ctx'> 	clear_bit(HID_RESET_PENDING, &amp;usbhid-&gt;iofl);</div><div class='hunk'>@@ -1504,28 +1598,15 @@ static struct usb_driver hid_driver = {</div><div class='ctx'> 	.supports_autosuspend = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct hid_device_id hid_usb_table[] = {</div><div class='del'>-	{ HID_USB_DEVICE(HID_ANY_ID, HID_ANY_ID) },</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct usb_interface *usbhid_find_interface(int minor)</div><div class='ctx'> {</div><div class='ctx'> 	return usb_find_interface(&amp;hid_driver, minor);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct hid_driver hid_usb_driver = {</div><div class='del'>-	.name = "generic-usb",</div><div class='del'>-	.id_table = hid_usb_table,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int __init hid_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int retval = -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	retval = hid_register_driver(&amp;hid_usb_driver);</div><div class='del'>-	if (retval)</div><div class='del'>-		goto hid_register_fail;</div><div class='ctx'> 	retval = usbhid_quirks_init(quirks_param);</div><div class='ctx'> 	if (retval)</div><div class='ctx'> 		goto usbhid_quirks_init_fail;</div><div class='hunk'>@@ -1538,8 +1619,6 @@ static int __init hid_init(void)</div><div class='ctx'> usb_register_fail:</div><div class='ctx'> 	usbhid_quirks_exit();</div><div class='ctx'> usbhid_quirks_init_fail:</div><div class='del'>-	hid_unregister_driver(&amp;hid_usb_driver);</div><div class='del'>-hid_register_fail:</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1547,7 +1626,6 @@ static void __exit hid_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	usb_deregister(&amp;hid_driver);</div><div class='ctx'> 	usbhid_quirks_exit();</div><div class='del'>-	hid_unregister_driver(&amp;hid_usb_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(hid_init);</div><div class='head'>diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c<br/>index 782c63955f29..0597ee604f6e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/usbhid/hid-quirks.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/usbhid/hid-quirks.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/usbhid/hid-quirks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/usbhid/hid-quirks.c</a></div><div class='hunk'>@@ -88,6 +88,7 @@ static const struct hid_blacklist {</div><div class='ctx'> 	{ USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_WP8060U, HID_QUIRK_MULTI_INPUT },</div><div class='ctx'> 	{ USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_MEDIA_TABLET_10_6_INCH, HID_QUIRK_MULTI_INPUT },</div><div class='ctx'> 	{ USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_MEDIA_TABLET_14_1_INCH, HID_QUIRK_MULTI_INPUT },</div><div class='add'>+	{ USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_SIRIUS_BATTERY_FREE_TABLET, HID_QUIRK_MULTI_INPUT },</div><div class='ctx'> 	{ USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_QUAD_USB_JOYPAD, HID_QUIRK_NOGET | HID_QUIRK_MULTI_INPUT },</div><div class='ctx'> </div><div class='ctx'> 	{ USB_VENDOR_ID_WISEGROUP_LTD2, USB_DEVICE_ID_SMARTJOY_DUAL_PLUS, HID_QUIRK_NOGET | HID_QUIRK_MULTI_INPUT },</div><div class='head'>diff --git a/drivers/hid/usbhid/hiddev.c b/drivers/hid/usbhid/hiddev.c<br/>index b1ec0e2aeb57..14599e256791 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/usbhid/hiddev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/usbhid/hiddev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/usbhid/hiddev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/usbhid/hiddev.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #include &lt;linux/hid.h&gt;</div><div class='ctx'> #include &lt;linux/hiddev.h&gt;</div><div class='ctx'> #include &lt;linux/compat.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include "usbhid.h"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_USB_DYNAMIC_MINORS</div><div class='hunk'>@@ -250,13 +251,13 @@ static int hiddev_release(struct inode * inode, struct file * file)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			mutex_unlock(&amp;list-&gt;hiddev-&gt;existancelock);</div><div class='ctx'> 			kfree(list-&gt;hiddev);</div><div class='del'>-			kfree(list);</div><div class='add'>+			vfree(list);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;list-&gt;hiddev-&gt;existancelock);</div><div class='del'>-	kfree(list);</div><div class='add'>+	vfree(list);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -278,7 +279,7 @@ static int hiddev_open(struct inode *inode, struct file *file)</div><div class='ctx'> 	hid = usb_get_intfdata(intf);</div><div class='ctx'> 	hiddev = hid-&gt;hiddev;</div><div class='ctx'> </div><div class='del'>-	if (!(list = kzalloc(sizeof(struct hiddev_list), GFP_KERNEL)))</div><div class='add'>+	if (!(list = vzalloc(sizeof(struct hiddev_list))))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	mutex_init(&amp;list-&gt;thread_lock);</div><div class='ctx'> 	list-&gt;hiddev = hiddev;</div><div class='hunk'>@@ -322,7 +323,7 @@ bail_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;hiddev-&gt;existancelock);</div><div class='ctx'> bail:</div><div class='ctx'> 	file-&gt;private_data = NULL;</div><div class='del'>-	kfree(list);</div><div class='add'>+	vfree(list);</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/hid/usbhid/usbhid.h b/drivers/hid/usbhid/usbhid.h<br/>index cb8f703efde5..1883d7b94870 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/usbhid/usbhid.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/usbhid/usbhid.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/usbhid/usbhid.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/usbhid/usbhid.h</a></div><div class='hunk'>@@ -55,6 +55,7 @@ struct usb_interface *usbhid_find_interface(int minor);</div><div class='ctx'> #define HID_STARTED		8</div><div class='ctx'> #define HID_REPORTED_IDLE	9</div><div class='ctx'> #define HID_KEYS_PRESSED	10</div><div class='add'>+#define HID_NO_BANDWIDTH	11</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * USB-specific HID struct, to be pointed to</div><div class='head'>diff --git a/drivers/hid/usbhid/usbmouse.c b/drivers/hid/usbhid/usbmouse.c<br/>index 0f6be45d43d5..bf16d72dc370 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hid/usbhid/usbmouse.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hid/usbhid/usbmouse.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hid/usbhid/usbmouse.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hid/usbhid/usbmouse.c</a></div><div class='hunk'>@@ -92,9 +92,10 @@ static void usb_mouse_irq(struct urb *urb)</div><div class='ctx'> resubmit:</div><div class='ctx'> 	status = usb_submit_urb (urb, GFP_ATOMIC);</div><div class='ctx'> 	if (status)</div><div class='del'>-		err ("can't resubmit intr, %s-%s/input0, status %d",</div><div class='del'>-				mouse-&gt;usbdev-&gt;bus-&gt;bus_name,</div><div class='del'>-				mouse-&gt;usbdev-&gt;devpath, status);</div><div class='add'>+		dev_err(&amp;mouse-&gt;usbdev-&gt;dev,</div><div class='add'>+			"can't resubmit intr, %s-%s/input0, status %d\n",</div><div class='add'>+			mouse-&gt;usbdev-&gt;bus-&gt;bus_name,</div><div class='add'>+			mouse-&gt;usbdev-&gt;devpath, status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int usb_mouse_open(struct input_dev *dev)</div><div class='head'>diff --git a/drivers/hv/channel_mgmt.c b/drivers/hv/channel_mgmt.c<br/>index 9ffbfc575a0c..2b8b8d4558d2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hv/channel_mgmt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hv/channel_mgmt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hv/channel_mgmt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hv/channel_mgmt.c</a></div><div class='hunk'>@@ -46,40 +46,61 @@ struct vmbus_channel_message_table_entry {</div><div class='ctx'>  *</div><div class='ctx'>  * @icmsghdrp is of type &amp;struct icmsg_hdr.</div><div class='ctx'>  * @negop is of type &amp;struct icmsg_negotiate.</div><div class='del'>- * Set up and fill in default negotiate response message. This response can</div><div class='del'>- * come from both the vmbus driver and the hv_utils driver. The current api</div><div class='del'>- * will respond properly to both Windows 2008 and Windows 2008-R2 operating</div><div class='del'>- * systems.</div><div class='add'>+ * Set up and fill in default negotiate response message.</div><div class='add'>+ *</div><div class='add'>+ * The max_fw_version specifies the maximum framework version that</div><div class='add'>+ * we can support and max _srv_version specifies the maximum service</div><div class='add'>+ * version we can support. A special value MAX_SRV_VER can be</div><div class='add'>+ * specified to indicate that we can handle the maximum version</div><div class='add'>+ * exposed by the host.</div><div class='ctx'>  *</div><div class='ctx'>  * Mainly used by Hyper-V drivers.</div><div class='ctx'>  */</div><div class='ctx'> void vmbus_prep_negotiate_resp(struct icmsg_hdr *icmsghdrp,</div><div class='del'>-			       struct icmsg_negotiate *negop, u8 *buf)</div><div class='add'>+				struct icmsg_negotiate *negop, u8 *buf,</div><div class='add'>+				int max_fw_version, int max_srv_version)</div><div class='ctx'> {</div><div class='del'>-	if (icmsghdrp-&gt;icmsgtype == ICMSGTYPE_NEGOTIATE) {</div><div class='del'>-		icmsghdrp-&gt;icmsgsize = 0x10;</div><div class='del'>-</div><div class='del'>-		negop = (struct icmsg_negotiate *)&amp;buf[</div><div class='del'>-			sizeof(struct vmbuspipe_hdr) +</div><div class='del'>-			sizeof(struct icmsg_hdr)];</div><div class='del'>-</div><div class='del'>-		if (negop-&gt;icframe_vercnt == 2 &amp;&amp;</div><div class='del'>-		   negop-&gt;icversion_data[1].major == 3) {</div><div class='del'>-			negop-&gt;icversion_data[0].major = 3;</div><div class='del'>-			negop-&gt;icversion_data[0].minor = 0;</div><div class='del'>-			negop-&gt;icversion_data[1].major = 3;</div><div class='del'>-			negop-&gt;icversion_data[1].minor = 0;</div><div class='del'>-		} else {</div><div class='del'>-			negop-&gt;icversion_data[0].major = 1;</div><div class='del'>-			negop-&gt;icversion_data[0].minor = 0;</div><div class='del'>-			negop-&gt;icversion_data[1].major = 1;</div><div class='del'>-			negop-&gt;icversion_data[1].minor = 0;</div><div class='del'>-		}</div><div class='add'>+	int icframe_vercnt;</div><div class='add'>+	int icmsg_vercnt;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	icmsghdrp-&gt;icmsgsize = 0x10;</div><div class='add'>+</div><div class='add'>+	negop = (struct icmsg_negotiate *)&amp;buf[</div><div class='add'>+		sizeof(struct vmbuspipe_hdr) +</div><div class='add'>+		sizeof(struct icmsg_hdr)];</div><div class='add'>+</div><div class='add'>+	icframe_vercnt = negop-&gt;icframe_vercnt;</div><div class='add'>+	icmsg_vercnt = negop-&gt;icmsg_vercnt;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Select the framework version number we will</div><div class='add'>+	 * support.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; negop-&gt;icframe_vercnt; i++) {</div><div class='add'>+		if (negop-&gt;icversion_data[i].major &lt;= max_fw_version)</div><div class='add'>+			icframe_vercnt = negop-&gt;icversion_data[i].major;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		negop-&gt;icframe_vercnt = 1;</div><div class='del'>-		negop-&gt;icmsg_vercnt = 1;</div><div class='add'>+	for (i = negop-&gt;icframe_vercnt;</div><div class='add'>+		 (i &lt; negop-&gt;icframe_vercnt + negop-&gt;icmsg_vercnt); i++) {</div><div class='add'>+		if (negop-&gt;icversion_data[i].major &lt;= max_srv_version)</div><div class='add'>+			icmsg_vercnt = negop-&gt;icversion_data[i].major;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Respond with the maximum framework and service</div><div class='add'>+	 * version numbers we can support.</div><div class='add'>+	 */</div><div class='add'>+	negop-&gt;icframe_vercnt = 1;</div><div class='add'>+	negop-&gt;icmsg_vercnt = 1;</div><div class='add'>+	negop-&gt;icversion_data[0].major = icframe_vercnt;</div><div class='add'>+	negop-&gt;icversion_data[0].minor = 0;</div><div class='add'>+	negop-&gt;icversion_data[1].major = icmsg_vercnt;</div><div class='add'>+	negop-&gt;icversion_data[1].minor = 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='ctx'> EXPORT_SYMBOL_GPL(vmbus_prep_negotiate_resp);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/hv/hv.c b/drivers/hv/hv.c<br/>index 15956bd48b48..86f8885aeb45 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hv/hv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hv/hv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hv/hv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hv/hv.c</a></div><div class='hunk'>@@ -252,7 +252,7 @@ void hv_cleanup(void)</div><div class='ctx'>  *</div><div class='ctx'>  * This involves a hypercall.</div><div class='ctx'>  */</div><div class='del'>-u16 hv_post_message(union hv_connection_id connection_id,</div><div class='add'>+int hv_post_message(union hv_connection_id connection_id,</div><div class='ctx'> 		  enum hv_message_type message_type,</div><div class='ctx'> 		  void *payload, size_t payload_size)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/hv/hv_kvp.c b/drivers/hv/hv_kvp.c<br/>index 6186025209ce..0012eed6d872 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hv/hv_kvp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hv/hv_kvp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hv/hv_kvp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hv/hv_kvp.c</a></div><div class='hunk'>@@ -394,7 +394,8 @@ void hv_kvp_onchannelcallback(void *context)</div><div class='ctx'> 			sizeof(struct vmbuspipe_hdr)];</div><div class='ctx'> </div><div class='ctx'> 		if (icmsghdrp-&gt;icmsgtype == ICMSGTYPE_NEGOTIATE) {</div><div class='del'>-			vmbus_prep_negotiate_resp(icmsghdrp, negop, recv_buffer);</div><div class='add'>+			vmbus_prep_negotiate_resp(icmsghdrp, negop,</div><div class='add'>+				 recv_buffer, MAX_SRV_VER, MAX_SRV_VER);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			kvp_msg = (struct hv_kvp_msg *)&amp;recv_buffer[</div><div class='ctx'> 				sizeof(struct vmbuspipe_hdr) +</div><div class='head'>diff --git a/drivers/hv/hv_util.c b/drivers/hv/hv_util.c<br/>index dbb8b8eec210..d3ac6a40118b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hv/hv_util.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hv/hv_util.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hv/hv_util.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hv/hv_util.c</a></div><div class='hunk'>@@ -70,7 +70,8 @@ static void shutdown_onchannelcallback(void *context)</div><div class='ctx'> 			sizeof(struct vmbuspipe_hdr)];</div><div class='ctx'> </div><div class='ctx'> 		if (icmsghdrp-&gt;icmsgtype == ICMSGTYPE_NEGOTIATE) {</div><div class='del'>-			vmbus_prep_negotiate_resp(icmsghdrp, negop, shut_txf_buf);</div><div class='add'>+			vmbus_prep_negotiate_resp(icmsghdrp, negop,</div><div class='add'>+					shut_txf_buf, MAX_SRV_VER, MAX_SRV_VER);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			shutdown_msg =</div><div class='ctx'> 				(struct shutdown_msg_data *)&amp;shut_txf_buf[</div><div class='hunk'>@@ -195,7 +196,8 @@ static void timesync_onchannelcallback(void *context)</div><div class='ctx'> 				sizeof(struct vmbuspipe_hdr)];</div><div class='ctx'> </div><div class='ctx'> 		if (icmsghdrp-&gt;icmsgtype == ICMSGTYPE_NEGOTIATE) {</div><div class='del'>-			vmbus_prep_negotiate_resp(icmsghdrp, NULL, time_txf_buf);</div><div class='add'>+			vmbus_prep_negotiate_resp(icmsghdrp, NULL, time_txf_buf,</div><div class='add'>+						MAX_SRV_VER, MAX_SRV_VER);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			timedatap = (struct ictimesync_data *)&amp;time_txf_buf[</div><div class='ctx'> 				sizeof(struct vmbuspipe_hdr) +</div><div class='hunk'>@@ -234,7 +236,8 @@ static void heartbeat_onchannelcallback(void *context)</div><div class='ctx'> 				sizeof(struct vmbuspipe_hdr)];</div><div class='ctx'> </div><div class='ctx'> 		if (icmsghdrp-&gt;icmsgtype == ICMSGTYPE_NEGOTIATE) {</div><div class='del'>-			vmbus_prep_negotiate_resp(icmsghdrp, NULL, hbeat_txf_buf);</div><div class='add'>+			vmbus_prep_negotiate_resp(icmsghdrp, NULL,</div><div class='add'>+				hbeat_txf_buf, MAX_SRV_VER, MAX_SRV_VER);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			heartbeat_msg =</div><div class='ctx'> 				(struct heartbeat_msg_data *)&amp;hbeat_txf_buf[</div><div class='head'>diff --git a/drivers/hv/hyperv_vmbus.h b/drivers/hv/hyperv_vmbus.h<br/>index 699f0d8e59ed..b9426a6592ee 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hv/hyperv_vmbus.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hv/hyperv_vmbus.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hv/hyperv_vmbus.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hv/hyperv_vmbus.h</a></div><div class='hunk'>@@ -495,7 +495,7 @@ extern int hv_init(void);</div><div class='ctx'> </div><div class='ctx'> extern void hv_cleanup(void);</div><div class='ctx'> </div><div class='del'>-extern u16 hv_post_message(union hv_connection_id connection_id,</div><div class='add'>+extern int hv_post_message(union hv_connection_id connection_id,</div><div class='ctx'> 			 enum hv_message_type message_type,</div><div class='ctx'> 			 void *payload, size_t payload_size);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/hv/ring_buffer.c b/drivers/hv/ring_buffer.c<br/>index 8af25a097d75..7233c88f01b8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hv/ring_buffer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hv/ring_buffer.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hv/ring_buffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hv/ring_buffer.c</a></div><div class='hunk'>@@ -30,37 +30,6 @@</div><div class='ctx'> #include "hyperv_vmbus.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/* #defines */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Amount of space to write to */</div><div class='del'>-#define BYTES_AVAIL_TO_WRITE(r, w, z) \</div><div class='del'>-	((w) &gt;= (r)) ? ((z) - ((w) - (r))) : ((r) - (w))</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *</div><div class='del'>- * hv_get_ringbuffer_availbytes()</div><div class='del'>- *</div><div class='del'>- * Get number of bytes available to read and to write to</div><div class='del'>- * for the specified ring buffer</div><div class='del'>- */</div><div class='del'>-static inline void</div><div class='del'>-hv_get_ringbuffer_availbytes(struct hv_ring_buffer_info *rbi,</div><div class='del'>-			  u32 *read, u32 *write)</div><div class='del'>-{</div><div class='del'>-	u32 read_loc, write_loc;</div><div class='del'>-</div><div class='del'>-	smp_read_barrier_depends();</div><div class='del'>-</div><div class='del'>-	/* Capture the read/write indices before they changed */</div><div class='del'>-	read_loc = rbi-&gt;ring_buffer-&gt;read_index;</div><div class='del'>-	write_loc = rbi-&gt;ring_buffer-&gt;write_index;</div><div class='del'>-</div><div class='del'>-	*write = BYTES_AVAIL_TO_WRITE(read_loc, write_loc, rbi-&gt;ring_datasize);</div><div class='del'>-	*read = rbi-&gt;ring_datasize - *write;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * hv_get_next_write_location()</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig<br/>index 8deedc1b9840..6f1d167cb1ea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/Kconfig</a></div><div class='hunk'>@@ -318,7 +318,7 @@ config SENSORS_EXYNOS4_TMU</div><div class='ctx'> 	tristate "Temperature sensor on Samsung EXYNOS4"</div><div class='ctx'> 	depends on ARCH_EXYNOS4</div><div class='ctx'> 	help</div><div class='del'>-	  If you say yes here you get support for TMU (Thermal Managment</div><div class='add'>+	  If you say yes here you get support for TMU (Thermal Management</div><div class='ctx'> 	  Unit) on SAMSUNG EXYNOS4 series of SoC.</div><div class='ctx'> </div><div class='ctx'> 	  This driver can also be built as a module. If so, the module</div><div class='hunk'>@@ -1036,8 +1036,9 @@ config SENSORS_SCH56XX_COMMON</div><div class='ctx'> </div><div class='ctx'> config SENSORS_SCH5627</div><div class='ctx'> 	tristate "SMSC SCH5627"</div><div class='del'>-	depends on !PPC</div><div class='add'>+	depends on !PPC &amp;&amp; WATCHDOG</div><div class='ctx'> 	select SENSORS_SCH56XX_COMMON</div><div class='add'>+	select WATCHDOG_CORE</div><div class='ctx'> 	help</div><div class='ctx'> 	  If you say yes here you get support for the hardware monitoring</div><div class='ctx'> 	  features of the SMSC SCH5627 Super-I/O chip including support for</div><div class='hunk'>@@ -1048,8 +1049,9 @@ config SENSORS_SCH5627</div><div class='ctx'> </div><div class='ctx'> config SENSORS_SCH5636</div><div class='ctx'> 	tristate "SMSC SCH5636"</div><div class='del'>-	depends on !PPC</div><div class='add'>+	depends on !PPC &amp;&amp; WATCHDOG</div><div class='ctx'> 	select SENSORS_SCH56XX_COMMON</div><div class='add'>+	select WATCHDOG_CORE</div><div class='ctx'> 	help</div><div class='ctx'> 	  SMSC SCH5636 Super I/O chips include an embedded microcontroller for</div><div class='ctx'> 	  hardware monitoring solutions, allowing motherboard manufacturers to</div><div class='hunk'>@@ -1102,6 +1104,19 @@ config SENSORS_AMC6821</div><div class='ctx'> 	  This driver can also be build as a module.  If so, the module</div><div class='ctx'> 	  will be called amc6821.</div><div class='ctx'> </div><div class='add'>+config SENSORS_INA2XX</div><div class='add'>+	tristate "Texas Instruments INA219, INA226"</div><div class='add'>+	depends on I2C &amp;&amp; EXPERIMENTAL</div><div class='add'>+	help</div><div class='add'>+	  If you say yes here you get support for INA219 and INA226 power</div><div class='add'>+	  monitor chips.</div><div class='add'>+</div><div class='add'>+	  The INA2xx driver is configured for the default configuration of</div><div class='add'>+	  the part as described in the datasheet.</div><div class='add'>+	  Default value for Rshunt is 10 mOhms.</div><div class='add'>+	  This driver can also be built as a module.  If so, the module</div><div class='add'>+	  will be called ina2xx.</div><div class='add'>+</div><div class='ctx'> config SENSORS_THMC50</div><div class='ctx'> 	tristate "Texas Instruments THMC50 / Analog Devices ADM1022"</div><div class='ctx'> 	depends on I2C</div><div class='head'>diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile<br/>index 6d3f11f71815..e1eeac13b851 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/Makefile</a></div><div class='hunk'>@@ -62,6 +62,7 @@ obj-$(CONFIG_SENSORS_ULTRA45)	+= ultra45_env.o</div><div class='ctx'> obj-$(CONFIG_SENSORS_I5K_AMB)	+= i5k_amb.o</div><div class='ctx'> obj-$(CONFIG_SENSORS_IBMAEM)	+= ibmaem.o</div><div class='ctx'> obj-$(CONFIG_SENSORS_IBMPEX)	+= ibmpex.o</div><div class='add'>+obj-$(CONFIG_SENSORS_INA2XX)	+= ina2xx.o</div><div class='ctx'> obj-$(CONFIG_SENSORS_IT87)	+= it87.o</div><div class='ctx'> obj-$(CONFIG_SENSORS_JC42)	+= jc42.o</div><div class='ctx'> obj-$(CONFIG_SENSORS_JZ4740)	+= jz4740-hwmon.o</div><div class='head'>diff --git a/drivers/hwmon/acpi_power_meter.c b/drivers/hwmon/acpi_power_meter.c<br/>index 9140236a0182..34ad5a27a7e9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/acpi_power_meter.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/acpi_power_meter.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/acpi_power_meter.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/acpi_power_meter.c</a></div><div class='hunk'>@@ -107,15 +107,7 @@ struct acpi_power_meter_resource {</div><div class='ctx'> 	struct kobject		*holders_dir;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ro_sensor_template {</div><div class='del'>-	char *label;</div><div class='del'>-	ssize_t (*show)(struct device *dev,</div><div class='del'>-			struct device_attribute *devattr,</div><div class='del'>-			char *buf);</div><div class='del'>-	int index;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct rw_sensor_template {</div><div class='add'>+struct sensor_template {</div><div class='ctx'> 	char *label;</div><div class='ctx'> 	ssize_t (*show)(struct device *dev,</div><div class='ctx'> 			struct device_attribute *devattr,</div><div class='hunk'>@@ -469,52 +461,67 @@ static ssize_t show_name(struct device *dev,</div><div class='ctx'> 	return sprintf(buf, "%s\n", ACPI_POWER_METER_NAME);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define RO_SENSOR_TEMPLATE(_label, _show, _index)	\</div><div class='add'>+	{						\</div><div class='add'>+		.label = _label,			\</div><div class='add'>+		.show  = _show,				\</div><div class='add'>+		.index = _index,			\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define RW_SENSOR_TEMPLATE(_label, _show, _set, _index)	\</div><div class='add'>+	{						\</div><div class='add'>+		.label = _label,			\</div><div class='add'>+		.show  = _show,				\</div><div class='add'>+		.set   = _set,				\</div><div class='add'>+		.index = _index,			\</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> /* Sensor descriptions.  If you add a sensor, update NUM_SENSORS above! */</div><div class='del'>-static struct ro_sensor_template meter_ro_attrs[] = {</div><div class='del'>-{POWER_AVERAGE_NAME, show_power, 0},</div><div class='del'>-{"power1_accuracy", show_accuracy, 0},</div><div class='del'>-{"power1_average_interval_min", show_val, 0},</div><div class='del'>-{"power1_average_interval_max", show_val, 1},</div><div class='del'>-{"power1_is_battery", show_val, 5},</div><div class='del'>-{NULL, NULL, 0},</div><div class='add'>+static struct sensor_template meter_attrs[] = {</div><div class='add'>+	RO_SENSOR_TEMPLATE(POWER_AVERAGE_NAME, show_power, 0),</div><div class='add'>+	RO_SENSOR_TEMPLATE("power1_accuracy", show_accuracy, 0),</div><div class='add'>+	RO_SENSOR_TEMPLATE("power1_average_interval_min", show_val, 0),</div><div class='add'>+	RO_SENSOR_TEMPLATE("power1_average_interval_max", show_val, 1),</div><div class='add'>+	RO_SENSOR_TEMPLATE("power1_is_battery", show_val, 5),</div><div class='add'>+	RW_SENSOR_TEMPLATE(POWER_AVG_INTERVAL_NAME, show_avg_interval,</div><div class='add'>+		set_avg_interval, 0),</div><div class='add'>+	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct rw_sensor_template meter_rw_attrs[] = {</div><div class='del'>-{POWER_AVG_INTERVAL_NAME, show_avg_interval, set_avg_interval, 0},</div><div class='del'>-{NULL, NULL, NULL, 0},</div><div class='add'>+static struct sensor_template misc_cap_attrs[] = {</div><div class='add'>+	RO_SENSOR_TEMPLATE("power1_cap_min", show_val, 2),</div><div class='add'>+	RO_SENSOR_TEMPLATE("power1_cap_max", show_val, 3),</div><div class='add'>+	RO_SENSOR_TEMPLATE("power1_cap_hyst", show_val, 4),</div><div class='add'>+	RO_SENSOR_TEMPLATE(POWER_ALARM_NAME, show_val, 6),</div><div class='add'>+	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ro_sensor_template misc_cap_attrs[] = {</div><div class='del'>-{"power1_cap_min", show_val, 2},</div><div class='del'>-{"power1_cap_max", show_val, 3},</div><div class='del'>-{"power1_cap_hyst", show_val, 4},</div><div class='del'>-{POWER_ALARM_NAME, show_val, 6},</div><div class='del'>-{NULL, NULL, 0},</div><div class='add'>+static struct sensor_template ro_cap_attrs[] = {</div><div class='add'>+	RO_SENSOR_TEMPLATE(POWER_CAP_NAME, show_cap, 0),</div><div class='add'>+	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ro_sensor_template ro_cap_attrs[] = {</div><div class='del'>-{POWER_CAP_NAME, show_cap, 0},</div><div class='del'>-{NULL, NULL, 0},</div><div class='add'>+static struct sensor_template rw_cap_attrs[] = {</div><div class='add'>+	RW_SENSOR_TEMPLATE(POWER_CAP_NAME, show_cap, set_cap, 0),</div><div class='add'>+	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct rw_sensor_template rw_cap_attrs[] = {</div><div class='del'>-{POWER_CAP_NAME, show_cap, set_cap, 0},</div><div class='del'>-{NULL, NULL, NULL, 0},</div><div class='add'>+static struct sensor_template trip_attrs[] = {</div><div class='add'>+	RW_SENSOR_TEMPLATE("power1_average_min", show_val, set_trip, 7),</div><div class='add'>+	RW_SENSOR_TEMPLATE("power1_average_max", show_val, set_trip, 8),</div><div class='add'>+	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct rw_sensor_template trip_attrs[] = {</div><div class='del'>-{"power1_average_min", show_val, set_trip, 7},</div><div class='del'>-{"power1_average_max", show_val, set_trip, 8},</div><div class='del'>-{NULL, NULL, NULL, 0},</div><div class='add'>+static struct sensor_template misc_attrs[] = {</div><div class='add'>+	RO_SENSOR_TEMPLATE("name", show_name, 0),</div><div class='add'>+	RO_SENSOR_TEMPLATE("power1_model_number", show_str, 0),</div><div class='add'>+	RO_SENSOR_TEMPLATE("power1_oem_info", show_str, 2),</div><div class='add'>+	RO_SENSOR_TEMPLATE("power1_serial_number", show_str, 1),</div><div class='add'>+	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ro_sensor_template misc_attrs[] = {</div><div class='del'>-{"name", show_name, 0},</div><div class='del'>-{"power1_model_number", show_str, 0},</div><div class='del'>-{"power1_oem_info", show_str, 2},</div><div class='del'>-{"power1_serial_number", show_str, 1},</div><div class='del'>-{NULL, NULL, 0},</div><div class='del'>-};</div><div class='add'>+#undef RO_SENSOR_TEMPLATE</div><div class='add'>+#undef RW_SENSOR_TEMPLATE</div><div class='ctx'> </div><div class='ctx'> /* Read power domain data */</div><div class='ctx'> static void remove_domain_devices(struct acpi_power_meter_resource *resource)</div><div class='hunk'>@@ -619,49 +626,24 @@ end:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Registration and deregistration */</div><div class='del'>-static int register_ro_attrs(struct acpi_power_meter_resource *resource,</div><div class='del'>-			     struct ro_sensor_template *ro)</div><div class='add'>+static int register_attrs(struct acpi_power_meter_resource *resource,</div><div class='add'>+			  struct sensor_template *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;resource-&gt;acpi_dev-&gt;dev;</div><div class='ctx'> 	struct sensor_device_attribute *sensors =</div><div class='ctx'> 		&amp;resource-&gt;sensors[resource-&gt;num_sensors];</div><div class='ctx'> 	int res = 0;</div><div class='ctx'> </div><div class='del'>-	while (ro-&gt;label) {</div><div class='del'>-		sensors-&gt;dev_attr.attr.name = ro-&gt;label;</div><div class='add'>+	while (attrs-&gt;label) {</div><div class='add'>+		sensors-&gt;dev_attr.attr.name = attrs-&gt;label;</div><div class='ctx'> 		sensors-&gt;dev_attr.attr.mode = S_IRUGO;</div><div class='del'>-		sensors-&gt;dev_attr.show = ro-&gt;show;</div><div class='del'>-		sensors-&gt;index = ro-&gt;index;</div><div class='add'>+		sensors-&gt;dev_attr.show = attrs-&gt;show;</div><div class='add'>+		sensors-&gt;index = attrs-&gt;index;</div><div class='ctx'> </div><div class='del'>-		sysfs_attr_init(&amp;sensors-&gt;dev_attr.attr);</div><div class='del'>-		res = device_create_file(dev, &amp;sensors-&gt;dev_attr);</div><div class='del'>-		if (res) {</div><div class='del'>-			sensors-&gt;dev_attr.attr.name = NULL;</div><div class='del'>-			goto error;</div><div class='add'>+		if (attrs-&gt;set) {</div><div class='add'>+			sensors-&gt;dev_attr.attr.mode |= S_IWUSR;</div><div class='add'>+			sensors-&gt;dev_attr.store = attrs-&gt;set;</div><div class='ctx'> 		}</div><div class='del'>-		sensors++;</div><div class='del'>-		resource-&gt;num_sensors++;</div><div class='del'>-		ro++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int register_rw_attrs(struct acpi_power_meter_resource *resource,</div><div class='del'>-			     struct rw_sensor_template *rw)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;resource-&gt;acpi_dev-&gt;dev;</div><div class='del'>-	struct sensor_device_attribute *sensors =</div><div class='del'>-		&amp;resource-&gt;sensors[resource-&gt;num_sensors];</div><div class='del'>-	int res = 0;</div><div class='del'>-</div><div class='del'>-	while (rw-&gt;label) {</div><div class='del'>-		sensors-&gt;dev_attr.attr.name = rw-&gt;label;</div><div class='del'>-		sensors-&gt;dev_attr.attr.mode = S_IRUGO | S_IWUSR;</div><div class='del'>-		sensors-&gt;dev_attr.show = rw-&gt;show;</div><div class='del'>-		sensors-&gt;dev_attr.store = rw-&gt;set;</div><div class='del'>-		sensors-&gt;index = rw-&gt;index;</div><div class='ctx'> </div><div class='ctx'> 		sysfs_attr_init(&amp;sensors-&gt;dev_attr.attr);</div><div class='ctx'> 		res = device_create_file(dev, &amp;sensors-&gt;dev_attr);</div><div class='hunk'>@@ -671,7 +653,7 @@ static int register_rw_attrs(struct acpi_power_meter_resource *resource,</div><div class='ctx'> 		}</div><div class='ctx'> 		sensors++;</div><div class='ctx'> 		resource-&gt;num_sensors++;</div><div class='del'>-		rw++;</div><div class='add'>+		attrs++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='hunk'>@@ -703,10 +685,7 @@ static int setup_attrs(struct acpi_power_meter_resource *resource)</div><div class='ctx'> 		return res;</div><div class='ctx'> </div><div class='ctx'> 	if (resource-&gt;caps.flags &amp; POWER_METER_CAN_MEASURE) {</div><div class='del'>-		res = register_ro_attrs(resource, meter_ro_attrs);</div><div class='del'>-		if (res)</div><div class='del'>-			goto error;</div><div class='del'>-		res = register_rw_attrs(resource, meter_rw_attrs);</div><div class='add'>+		res = register_attrs(resource, meter_attrs);</div><div class='ctx'> 		if (res)</div><div class='ctx'> 			goto error;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -718,28 +697,27 @@ static int setup_attrs(struct acpi_power_meter_resource *resource)</div><div class='ctx'> 			goto skip_unsafe_cap;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (resource-&gt;caps.configurable_cap) {</div><div class='del'>-			res = register_rw_attrs(resource, rw_cap_attrs);</div><div class='del'>-			if (res)</div><div class='del'>-				goto error;</div><div class='del'>-		} else {</div><div class='del'>-			res = register_ro_attrs(resource, ro_cap_attrs);</div><div class='del'>-			if (res)</div><div class='del'>-				goto error;</div><div class='del'>-		}</div><div class='del'>-		res = register_ro_attrs(resource, misc_cap_attrs);</div><div class='add'>+		if (resource-&gt;caps.configurable_cap)</div><div class='add'>+			res = register_attrs(resource, rw_cap_attrs);</div><div class='add'>+		else</div><div class='add'>+			res = register_attrs(resource, ro_cap_attrs);</div><div class='add'>+</div><div class='add'>+		if (res)</div><div class='add'>+			goto error;</div><div class='add'>+</div><div class='add'>+		res = register_attrs(resource, misc_cap_attrs);</div><div class='ctx'> 		if (res)</div><div class='ctx'> 			goto error;</div><div class='ctx'> 	}</div><div class='del'>-skip_unsafe_cap:</div><div class='ctx'> </div><div class='add'>+skip_unsafe_cap:</div><div class='ctx'> 	if (resource-&gt;caps.flags &amp; POWER_METER_CAN_TRIP) {</div><div class='del'>-		res = register_rw_attrs(resource, trip_attrs);</div><div class='add'>+		res = register_attrs(resource, trip_attrs);</div><div class='ctx'> 		if (res)</div><div class='ctx'> 			goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	res = register_ro_attrs(resource, misc_attrs);</div><div class='add'>+	res = register_attrs(resource, misc_attrs);</div><div class='ctx'> 	if (res)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/hwmon/ad7314.c b/drivers/hwmon/ad7314.c<br/>index f85ce70d9677..cfec802cf9ca 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/ad7314.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/ad7314.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/ad7314.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/ad7314.c</a></div><div class='hunk'>@@ -18,21 +18,14 @@</div><div class='ctx'> #include &lt;linux/hwmon-sysfs.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * AD7314 power mode</div><div class='del'>- */</div><div class='del'>-#define AD7314_PD		0x2000</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * AD7314 temperature masks</div><div class='ctx'>  */</div><div class='del'>-#define AD7314_TEMP_SIGN		0x200</div><div class='ctx'> #define AD7314_TEMP_MASK		0x7FE0</div><div class='del'>-#define AD7314_TEMP_OFFSET		5</div><div class='add'>+#define AD7314_TEMP_SHIFT		5</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * ADT7301 and ADT7302 temperature masks</div><div class='ctx'>  */</div><div class='del'>-#define ADT7301_TEMP_SIGN		0x2000</div><div class='ctx'> #define ADT7301_TEMP_MASK		0x3FFF</div><div class='ctx'> </div><div class='ctx'> enum ad7314_variant {</div><div class='hunk'>@@ -73,7 +66,7 @@ static ssize_t ad7314_show_temperature(struct device *dev,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	switch (spi_get_device_id(chip-&gt;spi_dev)-&gt;driver_data) {</div><div class='ctx'> 	case ad7314:</div><div class='del'>-		data = (ret &amp; AD7314_TEMP_MASK) &gt;&gt; AD7314_TEMP_OFFSET;</div><div class='add'>+		data = (ret &amp; AD7314_TEMP_MASK) &gt;&gt; AD7314_TEMP_SHIFT;</div><div class='ctx'> 		data = (data &lt;&lt; 6) &gt;&gt; 6;</div><div class='ctx'> </div><div class='ctx'> 		return sprintf(buf, "%d\n", 250 * data);</div><div class='head'>diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c<br/>index 0d3141fbbc20..b9d512331ed4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/coretemp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/coretemp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/coretemp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/coretemp.c</a></div><div class='hunk'>@@ -52,7 +52,7 @@ module_param_named(tjmax, force_tjmax, int, 0444);</div><div class='ctx'> MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");</div><div class='ctx'> </div><div class='ctx'> #define BASE_SYSFS_ATTR_NO	2	/* Sysfs Base attr no for coretemp */</div><div class='del'>-#define NUM_REAL_CORES		16	/* Number of Real cores per cpu */</div><div class='add'>+#define NUM_REAL_CORES		32	/* Number of Real cores per cpu */</div><div class='ctx'> #define CORETEMP_NAME_LENGTH	17	/* String Length of attrs */</div><div class='ctx'> #define MAX_CORE_ATTRS		4	/* Maximum no of basic attrs */</div><div class='ctx'> #define TOTAL_ATTRS		(MAX_CORE_ATTRS + 1)</div><div class='hunk'>@@ -709,6 +709,10 @@ static void __cpuinit put_core_offline(unsigned int cpu)</div><div class='ctx'> </div><div class='ctx'> 	indx = TO_ATTR_NO(cpu);</div><div class='ctx'> </div><div class='add'>+	/* The core id is too big, just return */</div><div class='add'>+	if (indx &gt; MAX_CORE_DATA - 1)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (pdata-&gt;core_data[indx] &amp;&amp; pdata-&gt;core_data[indx]-&gt;cpu == cpu)</div><div class='ctx'> 		coretemp_remove_core(pdata, &amp;pdev-&gt;dev, indx);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c<br/>index e8e18cab1fb8..6b13f1a4dc27 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/fam15h_power.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/fam15h_power.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/fam15h_power.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/fam15h_power.c</a></div><div class='hunk'>@@ -257,15 +257,4 @@ static struct pci_driver fam15h_power_driver = {</div><div class='ctx'> 	.remove = __devexit_p(fam15h_power_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init fam15h_power_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;fam15h_power_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit fam15h_power_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;fam15h_power_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(fam15h_power_init)</div><div class='del'>-module_exit(fam15h_power_exit)</div><div class='add'>+module_pci_driver(fam15h_power_driver);</div><div class='head'>diff --git a/drivers/hwmon/ina2xx.c b/drivers/hwmon/ina2xx.c<br/>new file mode 100644<br/>index 000000000000..7f3f4a385729<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/ina2xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/ina2xx.c</a></div><div class='hunk'>@@ -0,0 +1,368 @@</div><div class='add'>+/*</div><div class='add'>+ * Driver for Texas Instruments INA219, INA226 power monitor chips</div><div class='add'>+ *</div><div class='add'>+ * INA219:</div><div class='add'>+ * Zero Drift Bi-Directional Current/Power Monitor with I2C Interface</div><div class='add'>+ * Datasheet: http://www.ti.com/product/ina219</div><div class='add'>+ *</div><div class='add'>+ * INA226:</div><div class='add'>+ * Bi-Directional Current/Power Monitor with I2C Interface</div><div class='add'>+ * Datasheet: http://www.ti.com/product/ina226</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Lothar Felten &lt;l-felten@ti.com&gt;</div><div class='add'>+ * Thanks to Jan Volkering</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; version 2 of the License.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/hwmon.h&gt;</div><div class='add'>+#include &lt;linux/hwmon-sysfs.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/platform_data/ina2xx.h&gt;</div><div class='add'>+</div><div class='add'>+/* common register definitions */</div><div class='add'>+#define INA2XX_CONFIG			0x00</div><div class='add'>+#define INA2XX_SHUNT_VOLTAGE		0x01 /* readonly */</div><div class='add'>+#define INA2XX_BUS_VOLTAGE		0x02 /* readonly */</div><div class='add'>+#define INA2XX_POWER			0x03 /* readonly */</div><div class='add'>+#define INA2XX_CURRENT			0x04 /* readonly */</div><div class='add'>+#define INA2XX_CALIBRATION		0x05</div><div class='add'>+</div><div class='add'>+/* INA226 register definitions */</div><div class='add'>+#define INA226_MASK_ENABLE		0x06</div><div class='add'>+#define INA226_ALERT_LIMIT		0x07</div><div class='add'>+#define INA226_DIE_ID			0xFF</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* register count */</div><div class='add'>+#define INA219_REGISTERS		6</div><div class='add'>+#define INA226_REGISTERS		8</div><div class='add'>+</div><div class='add'>+#define INA2XX_MAX_REGISTERS		8</div><div class='add'>+</div><div class='add'>+/* settings - depend on use case */</div><div class='add'>+#define INA219_CONFIG_DEFAULT		0x399F	/* PGA=8 */</div><div class='add'>+#define INA226_CONFIG_DEFAULT		0x4527	/* averages=16 */</div><div class='add'>+</div><div class='add'>+/* worst case is 68.10 ms (~14.6Hz, ina219) */</div><div class='add'>+#define INA2XX_CONVERSION_RATE		15</div><div class='add'>+</div><div class='add'>+enum ina2xx_ids { ina219, ina226 };</div><div class='add'>+</div><div class='add'>+struct ina2xx_data {</div><div class='add'>+	struct device *hwmon_dev;</div><div class='add'>+</div><div class='add'>+	struct mutex update_lock;</div><div class='add'>+	bool valid;</div><div class='add'>+	unsigned long last_updated;</div><div class='add'>+</div><div class='add'>+	int kind;</div><div class='add'>+	int registers;</div><div class='add'>+	u16 regs[INA2XX_MAX_REGISTERS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int ina2xx_read_word(struct i2c_client *client, int reg)</div><div class='add'>+{</div><div class='add'>+	int val = i2c_smbus_read_word_data(client, reg);</div><div class='add'>+	if (unlikely(val &lt; 0)) {</div><div class='add'>+		dev_dbg(&amp;client-&gt;dev,</div><div class='add'>+			"Failed to read register: %d\n", reg);</div><div class='add'>+		return val;</div><div class='add'>+	}</div><div class='add'>+	return be16_to_cpu(val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ina2xx_write_word(struct i2c_client *client, int reg, int data)</div><div class='add'>+{</div><div class='add'>+	i2c_smbus_write_word_data(client, reg, cpu_to_be16(data));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ina2xx_data *ina2xx_update_device(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = to_i2c_client(dev);</div><div class='add'>+	struct ina2xx_data *data = i2c_get_clientdata(client);</div><div class='add'>+	struct ina2xx_data *ret = data;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;data-&gt;update_lock);</div><div class='add'>+</div><div class='add'>+	if (time_after(jiffies, data-&gt;last_updated +</div><div class='add'>+		       HZ / INA2XX_CONVERSION_RATE) || !data-&gt;valid) {</div><div class='add'>+</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		dev_dbg(&amp;client-&gt;dev, "Starting ina2xx update\n");</div><div class='add'>+</div><div class='add'>+		/* Read all registers */</div><div class='add'>+		for (i = 0; i &lt; data-&gt;registers; i++) {</div><div class='add'>+			int rv = ina2xx_read_word(client, i);</div><div class='add'>+			if (rv &lt; 0) {</div><div class='add'>+				ret = ERR_PTR(rv);</div><div class='add'>+				goto abort;</div><div class='add'>+			}</div><div class='add'>+			data-&gt;regs[i] = rv;</div><div class='add'>+		}</div><div class='add'>+		data-&gt;last_updated = jiffies;</div><div class='add'>+		data-&gt;valid = 1;</div><div class='add'>+	}</div><div class='add'>+abort:</div><div class='add'>+	mutex_unlock(&amp;data-&gt;update_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ina219_get_value(struct ina2xx_data *data, u8 reg)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * calculate exact value for the given register</div><div class='add'>+	 * we assume default power-on reset settings:</div><div class='add'>+	 * bus voltage range 32V</div><div class='add'>+	 * gain = /8</div><div class='add'>+	 * adc 1 &amp; 2 -&gt; conversion time 532uS</div><div class='add'>+	 * mode is continuous shunt and bus</div><div class='add'>+	 * calibration value is INA219_CALIBRATION_VALUE</div><div class='add'>+	 */</div><div class='add'>+	int val = data-&gt;regs[reg];</div><div class='add'>+</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case INA2XX_SHUNT_VOLTAGE:</div><div class='add'>+		/* LSB=10uV. Convert to mV. */</div><div class='add'>+		val = DIV_ROUND_CLOSEST(val, 100);</div><div class='add'>+		break;</div><div class='add'>+	case INA2XX_BUS_VOLTAGE:</div><div class='add'>+		/* LSB=4mV. Register is not right aligned, convert to mV. */</div><div class='add'>+		val = (val &gt;&gt; 3) * 4;</div><div class='add'>+		break;</div><div class='add'>+	case INA2XX_POWER:</div><div class='add'>+		/* LSB=20mW. Convert to uW */</div><div class='add'>+		val = val * 20 * 1000;</div><div class='add'>+		break;</div><div class='add'>+	case INA2XX_CURRENT:</div><div class='add'>+		/* LSB=1mA (selected). Is in mA */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* programmer goofed */</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		val = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ina226_get_value(struct ina2xx_data *data, u8 reg)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * calculate exact value for the given register</div><div class='add'>+	 * we assume default power-on reset settings:</div><div class='add'>+	 * bus voltage range 32V</div><div class='add'>+	 * gain = /8</div><div class='add'>+	 * adc 1 &amp; 2 -&gt; conversion time 532uS</div><div class='add'>+	 * mode is continuous shunt and bus</div><div class='add'>+	 * calibration value is INA226_CALIBRATION_VALUE</div><div class='add'>+	 */</div><div class='add'>+	int val = data-&gt;regs[reg];</div><div class='add'>+</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case INA2XX_SHUNT_VOLTAGE:</div><div class='add'>+		/* LSB=2.5uV. Convert to mV. */</div><div class='add'>+		val = DIV_ROUND_CLOSEST(val, 400);</div><div class='add'>+		break;</div><div class='add'>+	case INA2XX_BUS_VOLTAGE:</div><div class='add'>+		/* LSB=1.25mV. Convert to mV. */</div><div class='add'>+		val = val + DIV_ROUND_CLOSEST(val, 4);</div><div class='add'>+		break;</div><div class='add'>+	case INA2XX_POWER:</div><div class='add'>+		/* LSB=25mW. Convert to uW */</div><div class='add'>+		val = val * 25 * 1000;</div><div class='add'>+		break;</div><div class='add'>+	case INA2XX_CURRENT:</div><div class='add'>+		/* LSB=1mA (selected). Is in mA */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* programmer goofed */</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		val = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t ina2xx_show_value(struct device *dev,</div><div class='add'>+				 struct device_attribute *da, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);</div><div class='add'>+	struct ina2xx_data *data = ina2xx_update_device(dev);</div><div class='add'>+	int value = 0;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(data))</div><div class='add'>+		return PTR_ERR(data);</div><div class='add'>+</div><div class='add'>+	switch (data-&gt;kind) {</div><div class='add'>+	case ina219:</div><div class='add'>+		value = ina219_get_value(data, attr-&gt;index);</div><div class='add'>+		break;</div><div class='add'>+	case ina226:</div><div class='add'>+		value = ina226_get_value(data, attr-&gt;index);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return snprintf(buf, PAGE_SIZE, "%d\n", value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* shunt voltage */</div><div class='add'>+static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, \</div><div class='add'>+	ina2xx_show_value, NULL, INA2XX_SHUNT_VOLTAGE);</div><div class='add'>+</div><div class='add'>+/* bus voltage */</div><div class='add'>+static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, \</div><div class='add'>+	ina2xx_show_value, NULL, INA2XX_BUS_VOLTAGE);</div><div class='add'>+</div><div class='add'>+/* calculated current */</div><div class='add'>+static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, \</div><div class='add'>+	ina2xx_show_value, NULL, INA2XX_CURRENT);</div><div class='add'>+</div><div class='add'>+/* calculated power */</div><div class='add'>+static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, \</div><div class='add'>+	ina2xx_show_value, NULL, INA2XX_POWER);</div><div class='add'>+</div><div class='add'>+/* pointers to created device attributes */</div><div class='add'>+static struct attribute *ina2xx_attributes[] = {</div><div class='add'>+	&amp;sensor_dev_attr_in0_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in1_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_curr1_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_power1_input.dev_attr.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group ina2xx_group = {</div><div class='add'>+	.attrs = ina2xx_attributes,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ina2xx_probe(struct i2c_client *client,</div><div class='add'>+			const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct i2c_adapter *adapter = client-&gt;adapter;</div><div class='add'>+	struct ina2xx_data *data;</div><div class='add'>+	struct ina2xx_platform_data *pdata;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	long shunt = 10000; /* default shunt value 10mOhms */</div><div class='add'>+</div><div class='add'>+	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	data = devm_kzalloc(&amp;client-&gt;dev, sizeof(*data), GFP_KERNEL);</div><div class='add'>+	if (!data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (client-&gt;dev.platform_data) {</div><div class='add'>+		pdata =</div><div class='add'>+		  (struct ina2xx_platform_data *)client-&gt;dev.platform_data;</div><div class='add'>+		shunt = pdata-&gt;shunt_uohms;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (shunt &lt;= 0)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* set the device type */</div><div class='add'>+	data-&gt;kind = id-&gt;driver_data;</div><div class='add'>+</div><div class='add'>+	switch (data-&gt;kind) {</div><div class='add'>+	case ina219:</div><div class='add'>+		/* device configuration */</div><div class='add'>+		ina2xx_write_word(client, INA2XX_CONFIG, INA219_CONFIG_DEFAULT);</div><div class='add'>+</div><div class='add'>+		/* set current LSB to 1mA, shunt is in uOhms */</div><div class='add'>+		/* (equation 13 in datasheet) */</div><div class='add'>+		ina2xx_write_word(client, INA2XX_CALIBRATION, 40960000 / shunt);</div><div class='add'>+		dev_info(&amp;client-&gt;dev,</div><div class='add'>+			 "power monitor INA219 (Rshunt = %li uOhm)\n", shunt);</div><div class='add'>+		data-&gt;registers = INA219_REGISTERS;</div><div class='add'>+		break;</div><div class='add'>+	case ina226:</div><div class='add'>+		/* device configuration */</div><div class='add'>+		ina2xx_write_word(client, INA2XX_CONFIG, INA226_CONFIG_DEFAULT);</div><div class='add'>+</div><div class='add'>+		/* set current LSB to 1mA, shunt is in uOhms */</div><div class='add'>+		/* (equation 1 in datasheet)*/</div><div class='add'>+		ina2xx_write_word(client, INA2XX_CALIBRATION, 5120000 / shunt);</div><div class='add'>+		dev_info(&amp;client-&gt;dev,</div><div class='add'>+			 "power monitor INA226 (Rshunt = %li uOhm)\n", shunt);</div><div class='add'>+		data-&gt;registers = INA226_REGISTERS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* unknown device id */</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i2c_set_clientdata(client, data);</div><div class='add'>+	mutex_init(&amp;data-&gt;update_lock);</div><div class='add'>+</div><div class='add'>+	ret = sysfs_create_group(&amp;client-&gt;dev.kobj, &amp;ina2xx_group);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	data-&gt;hwmon_dev = hwmon_device_register(&amp;client-&gt;dev);</div><div class='add'>+	if (IS_ERR(data-&gt;hwmon_dev)) {</div><div class='add'>+		ret = PTR_ERR(data-&gt;hwmon_dev);</div><div class='add'>+		goto out_err_hwmon;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_err_hwmon:</div><div class='add'>+	sysfs_remove_group(&amp;client-&gt;dev.kobj, &amp;ina2xx_group);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ina2xx_remove(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct ina2xx_data *data = i2c_get_clientdata(client);</div><div class='add'>+</div><div class='add'>+	hwmon_device_unregister(data-&gt;hwmon_dev);</div><div class='add'>+	sysfs_remove_group(&amp;client-&gt;dev.kobj, &amp;ina2xx_group);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id ina2xx_id[] = {</div><div class='add'>+	{ "ina219", ina219 },</div><div class='add'>+	{ "ina226", ina226 },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, ina2xx_id);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver ina2xx_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "ina2xx",</div><div class='add'>+	},</div><div class='add'>+	.probe		= ina2xx_probe,</div><div class='add'>+	.remove		= ina2xx_remove,</div><div class='add'>+	.id_table	= ina2xx_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init ina2xx_init(void)</div><div class='add'>+{</div><div class='add'>+	return i2c_add_driver(&amp;ina2xx_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit ina2xx_exit(void)</div><div class='add'>+{</div><div class='add'>+	i2c_del_driver(&amp;ina2xx_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Lothar Felten &lt;l-felten@ti.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("ina2xx driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+module_init(ina2xx_init);</div><div class='add'>+module_exit(ina2xx_exit);</div><div class='head'>diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c<br/>index 0b204e4cf51c..e7701d99f8e8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/it87.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/it87.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/it87.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/it87.c</a></div><div class='hunk'>@@ -19,6 +19,8 @@</div><div class='ctx'>  *            IT8726F  Super I/O chip w/LPC interface</div><div class='ctx'>  *            IT8728F  Super I/O chip w/LPC interface</div><div class='ctx'>  *            IT8758E  Super I/O chip w/LPC interface</div><div class='add'>+ *            IT8782F  Super I/O chip w/LPC interface</div><div class='add'>+ *            IT8783E/F Super I/O chip w/LPC interface</div><div class='ctx'>  *            Sis950   A clone of the IT8705F</div><div class='ctx'>  *</div><div class='ctx'>  *  Copyright (C) 2001 Chris Gauthron</div><div class='hunk'>@@ -59,7 +61,8 @@</div><div class='ctx'> </div><div class='ctx'> #define DRVNAME "it87"</div><div class='ctx'> </div><div class='del'>-enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728 };</div><div class='add'>+enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8782,</div><div class='add'>+	     it8783 };</div><div class='ctx'> </div><div class='ctx'> static unsigned short force_id;</div><div class='ctx'> module_param(force_id, ushort, 0);</div><div class='hunk'>@@ -137,13 +140,18 @@ static inline void superio_exit(void)</div><div class='ctx'> #define IT8721F_DEVID 0x8721</div><div class='ctx'> #define IT8726F_DEVID 0x8726</div><div class='ctx'> #define IT8728F_DEVID 0x8728</div><div class='add'>+#define IT8782F_DEVID 0x8782</div><div class='add'>+#define IT8783E_DEVID 0x8783</div><div class='ctx'> #define IT87_ACT_REG  0x30</div><div class='ctx'> #define IT87_BASE_REG 0x60</div><div class='ctx'> </div><div class='ctx'> /* Logical device 7 registers (IT8712F and later) */</div><div class='add'>+#define IT87_SIO_GPIO1_REG	0x25</div><div class='ctx'> #define IT87_SIO_GPIO3_REG	0x27</div><div class='ctx'> #define IT87_SIO_GPIO5_REG	0x29</div><div class='add'>+#define IT87_SIO_PINX1_REG	0x2a	/* Pin selection */</div><div class='ctx'> #define IT87_SIO_PINX2_REG	0x2c	/* Pin selection */</div><div class='add'>+#define IT87_SIO_SPI_REG	0xef	/* SPI function pin select */</div><div class='ctx'> #define IT87_SIO_VID_REG	0xfc	/* VID value */</div><div class='ctx'> #define IT87_SIO_BEEP_PIN_REG	0xf6	/* Beep pin mapping */</div><div class='ctx'> </div><div class='hunk'>@@ -210,6 +218,7 @@ static const u8 IT87_REG_FANX_MIN[]	= { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };</div><div class='ctx'> </div><div class='ctx'> #define IT87_REG_VIN_ENABLE    0x50</div><div class='ctx'> #define IT87_REG_TEMP_ENABLE   0x51</div><div class='add'>+#define IT87_REG_TEMP_EXTRA    0x55</div><div class='ctx'> #define IT87_REG_BEEP_ENABLE   0x5c</div><div class='ctx'> </div><div class='ctx'> #define IT87_REG_CHIPID        0x58</div><div class='hunk'>@@ -226,9 +235,11 @@ struct it87_sio_data {</div><div class='ctx'> 	u8 beep_pin;</div><div class='ctx'> 	u8 internal;	/* Internal sensors can be labeled */</div><div class='ctx'> 	/* Features skipped based on config or DMI */</div><div class='add'>+	u16 skip_in;</div><div class='ctx'> 	u8 skip_vid;</div><div class='ctx'> 	u8 skip_fan;</div><div class='ctx'> 	u8 skip_pwm;</div><div class='add'>+	u8 skip_temp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -253,6 +264,7 @@ struct it87_data {</div><div class='ctx'> 	u8 has_fan;		/* Bitfield, fans enabled */</div><div class='ctx'> 	u16 fan[5];		/* Register values, possibly combined */</div><div class='ctx'> 	u16 fan_min[5];		/* Register values, possibly combined */</div><div class='add'>+	u8 has_temp;		/* Bitfield, temp sensors enabled */</div><div class='ctx'> 	s8 temp[3];		/* Register value */</div><div class='ctx'> 	s8 temp_high[3];	/* Register value */</div><div class='ctx'> 	s8 temp_low[3];		/* Register value */</div><div class='hunk'>@@ -304,31 +316,23 @@ static inline int has_newer_autopwm(const struct it87_data *data)</div><div class='ctx'> 	    || data-&gt;type == it8728;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 in_to_reg(const struct it87_data *data, int nr, long val)</div><div class='add'>+static int adc_lsb(const struct it87_data *data, int nr)</div><div class='ctx'> {</div><div class='del'>-	long lsb;</div><div class='del'>-</div><div class='del'>-	if (has_12mv_adc(data)) {</div><div class='del'>-		if (data-&gt;in_scaled &amp; (1 &lt;&lt; nr))</div><div class='del'>-			lsb = 24;</div><div class='del'>-		else</div><div class='del'>-			lsb = 12;</div><div class='del'>-	} else</div><div class='del'>-		lsb = 16;</div><div class='add'>+	int lsb = has_12mv_adc(data) ? 12 : 16;</div><div class='add'>+	if (data-&gt;in_scaled &amp; (1 &lt;&lt; nr))</div><div class='add'>+		lsb &lt;&lt;= 1;</div><div class='add'>+	return lsb;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	val = DIV_ROUND_CLOSEST(val, lsb);</div><div class='add'>+static u8 in_to_reg(const struct it87_data *data, int nr, long val)</div><div class='add'>+{</div><div class='add'>+	val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));</div><div class='ctx'> 	return SENSORS_LIMIT(val, 0, 255);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int in_from_reg(const struct it87_data *data, int nr, int val)</div><div class='ctx'> {</div><div class='del'>-	if (has_12mv_adc(data)) {</div><div class='del'>-		if (data-&gt;in_scaled &amp; (1 &lt;&lt; nr))</div><div class='del'>-			return val * 24;</div><div class='del'>-		else</div><div class='del'>-			return val * 12;</div><div class='del'>-	} else</div><div class='del'>-		return val * 16;</div><div class='add'>+	return val * adc_lsb(data, nr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u8 FAN_TO_REG(long rpm, int div)</div><div class='hunk'>@@ -407,7 +411,9 @@ static inline int has_16bit_fans(const struct it87_data *data)</div><div class='ctx'> 	    || data-&gt;type == it8718</div><div class='ctx'> 	    || data-&gt;type == it8720</div><div class='ctx'> 	    || data-&gt;type == it8721</div><div class='del'>-	    || data-&gt;type == it8728;</div><div class='add'>+	    || data-&gt;type == it8728</div><div class='add'>+	    || data-&gt;type == it8782</div><div class='add'>+	    || data-&gt;type == it8783;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int has_old_autopwm(const struct it87_data *data)</div><div class='hunk'>@@ -1369,57 +1375,103 @@ static ssize_t show_name(struct device *dev, struct device_attribute</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);</div><div class='ctx'> </div><div class='del'>-static struct attribute *it87_attributes[] = {</div><div class='add'>+static struct attribute *it87_attributes_in[9][5] = {</div><div class='add'>+{</div><div class='ctx'> 	&amp;sensor_dev_attr_in0_input.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in1_input.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in2_input.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in3_input.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in4_input.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in5_input.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in6_input.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in7_input.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in8_input.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in0_min.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in1_min.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in2_min.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in3_min.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in4_min.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in5_min.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in6_min.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in7_min.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in0_max.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in1_max.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in2_max.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in3_max.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in4_max.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in5_max.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in6_max.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_in7_max.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in0_alarm.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+}, {</div><div class='add'>+	&amp;sensor_dev_attr_in1_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in1_min.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in1_max.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in1_alarm.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+}, {</div><div class='add'>+	&amp;sensor_dev_attr_in2_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in2_min.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in2_max.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in2_alarm.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+}, {</div><div class='add'>+	&amp;sensor_dev_attr_in3_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in3_min.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in3_max.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in3_alarm.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+}, {</div><div class='add'>+	&amp;sensor_dev_attr_in4_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in4_min.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in4_max.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in4_alarm.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+}, {</div><div class='add'>+	&amp;sensor_dev_attr_in5_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in5_min.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in5_max.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in5_alarm.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+}, {</div><div class='add'>+	&amp;sensor_dev_attr_in6_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in6_min.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in6_max.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in6_alarm.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+}, {</div><div class='add'>+	&amp;sensor_dev_attr_in7_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in7_min.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in7_max.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in7_alarm.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+}, {</div><div class='add'>+	&amp;sensor_dev_attr_in8_input.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+} };</div><div class='ctx'> </div><div class='add'>+static const struct attribute_group it87_group_in[9] = {</div><div class='add'>+	{ .attrs = it87_attributes_in[0] },</div><div class='add'>+	{ .attrs = it87_attributes_in[1] },</div><div class='add'>+	{ .attrs = it87_attributes_in[2] },</div><div class='add'>+	{ .attrs = it87_attributes_in[3] },</div><div class='add'>+	{ .attrs = it87_attributes_in[4] },</div><div class='add'>+	{ .attrs = it87_attributes_in[5] },</div><div class='add'>+	{ .attrs = it87_attributes_in[6] },</div><div class='add'>+	{ .attrs = it87_attributes_in[7] },</div><div class='add'>+	{ .attrs = it87_attributes_in[8] },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute *it87_attributes_temp[3][6] = {</div><div class='add'>+{</div><div class='ctx'> 	&amp;sensor_dev_attr_temp1_input.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_temp2_input.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_temp3_input.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_temp1_max.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_temp2_max.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_temp3_max.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_temp1_min.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_temp2_min.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_temp3_min.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_temp1_type.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_temp2_type.dev_attr.attr,</div><div class='del'>-	&amp;sensor_dev_attr_temp3_type.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_temp1_alarm.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+} , {</div><div class='add'>+	&amp;sensor_dev_attr_temp2_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_temp2_max.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_temp2_min.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_temp2_type.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_temp2_alarm.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+} , {</div><div class='add'>+	&amp;sensor_dev_attr_temp3_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_temp3_max.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_temp3_min.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_temp3_type.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_temp3_alarm.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+} };</div><div class='add'>+</div><div class='add'>+static const struct attribute_group it87_group_temp[3] = {</div><div class='add'>+	{ .attrs = it87_attributes_temp[0] },</div><div class='add'>+	{ .attrs = it87_attributes_temp[1] },</div><div class='add'>+	{ .attrs = it87_attributes_temp[2] },</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+static struct attribute *it87_attributes[] = {</div><div class='ctx'> 	&amp;dev_attr_alarms.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_intrusion0_alarm.dev_attr.attr,</div><div class='ctx'> 	&amp;dev_attr_name.attr,</div><div class='hunk'>@@ -1430,7 +1482,7 @@ static const struct attribute_group it87_group = {</div><div class='ctx'> 	.attrs = it87_attributes,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct attribute *it87_attributes_beep[] = {</div><div class='add'>+static struct attribute *it87_attributes_in_beep[] = {</div><div class='ctx'> 	&amp;sensor_dev_attr_in0_beep.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in1_beep.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in2_beep.dev_attr.attr,</div><div class='hunk'>@@ -1439,15 +1491,13 @@ static struct attribute *it87_attributes_beep[] = {</div><div class='ctx'> 	&amp;sensor_dev_attr_in5_beep.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in6_beep.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in7_beep.dev_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+static struct attribute *it87_attributes_temp_beep[] = {</div><div class='ctx'> 	&amp;sensor_dev_attr_temp1_beep.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_temp2_beep.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_temp3_beep.dev_attr.attr,</div><div class='del'>-	NULL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct attribute_group it87_group_beep = {</div><div class='del'>-	.attrs = it87_attributes_beep,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct attribute *it87_attributes_fan16[5][3+1] = { {</div><div class='hunk'>@@ -1651,6 +1701,12 @@ static int __init it87_find(unsigned short *address,</div><div class='ctx'> 	case IT8728F_DEVID:</div><div class='ctx'> 		sio_data-&gt;type = it8728;</div><div class='ctx'> 		break;</div><div class='add'>+	case IT8782F_DEVID:</div><div class='add'>+		sio_data-&gt;type = it8782;</div><div class='add'>+		break;</div><div class='add'>+	case IT8783E_DEVID:</div><div class='add'>+		sio_data-&gt;type = it8783;</div><div class='add'>+		break;</div><div class='ctx'> 	case 0xffff:	/* No device at all */</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1686,16 +1742,86 @@ static int __init it87_find(unsigned short *address,</div><div class='ctx'> 		/* The IT8705F has a different LD number for GPIO */</div><div class='ctx'> 		superio_select(5);</div><div class='ctx'> 		sio_data-&gt;beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) &amp; 0x3f;</div><div class='add'>+	} else if (sio_data-&gt;type == it8783) {</div><div class='add'>+		int reg25, reg27, reg2A, reg2C, regEF;</div><div class='add'>+</div><div class='add'>+		sio_data-&gt;skip_vid = 1;	/* No VID */</div><div class='add'>+</div><div class='add'>+		superio_select(GPIO);</div><div class='add'>+</div><div class='add'>+		reg25 = superio_inb(IT87_SIO_GPIO1_REG);</div><div class='add'>+		reg27 = superio_inb(IT87_SIO_GPIO3_REG);</div><div class='add'>+		reg2A = superio_inb(IT87_SIO_PINX1_REG);</div><div class='add'>+		reg2C = superio_inb(IT87_SIO_PINX2_REG);</div><div class='add'>+		regEF = superio_inb(IT87_SIO_SPI_REG);</div><div class='add'>+</div><div class='add'>+		/* Check if fan3 is there or not */</div><div class='add'>+		if ((reg27 &amp; (1 &lt;&lt; 0)) || !(reg2C &amp; (1 &lt;&lt; 2)))</div><div class='add'>+			sio_data-&gt;skip_fan |= (1 &lt;&lt; 2);</div><div class='add'>+		if ((reg25 &amp; (1 &lt;&lt; 4))</div><div class='add'>+		    || (!(reg2A &amp; (1 &lt;&lt; 1)) &amp;&amp; (regEF &amp; (1 &lt;&lt; 0))))</div><div class='add'>+			sio_data-&gt;skip_pwm |= (1 &lt;&lt; 2);</div><div class='add'>+</div><div class='add'>+		/* Check if fan2 is there or not */</div><div class='add'>+		if (reg27 &amp; (1 &lt;&lt; 7))</div><div class='add'>+			sio_data-&gt;skip_fan |= (1 &lt;&lt; 1);</div><div class='add'>+		if (reg27 &amp; (1 &lt;&lt; 3))</div><div class='add'>+			sio_data-&gt;skip_pwm |= (1 &lt;&lt; 1);</div><div class='add'>+</div><div class='add'>+		/* VIN5 */</div><div class='add'>+		if ((reg27 &amp; (1 &lt;&lt; 0)) || (reg2C &amp; (1 &lt;&lt; 2)))</div><div class='add'>+			sio_data-&gt;skip_in |= (1 &lt;&lt; 5); /* No VIN5 */</div><div class='add'>+</div><div class='add'>+		/* VIN6 */</div><div class='add'>+		if (reg27 &amp; (1 &lt;&lt; 1))</div><div class='add'>+			sio_data-&gt;skip_in |= (1 &lt;&lt; 6); /* No VIN6 */</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * VIN7</div><div class='add'>+		 * Does not depend on bit 2 of Reg2C, contrary to datasheet.</div><div class='add'>+		 */</div><div class='add'>+		if (reg27 &amp; (1 &lt;&lt; 2)) {</div><div class='add'>+			/*</div><div class='add'>+			 * The data sheet is a bit unclear regarding the</div><div class='add'>+			 * internal voltage divider for VCCH5V. It says</div><div class='add'>+			 * "This bit enables and switches VIN7 (pin 91) to the</div><div class='add'>+			 * internal voltage divider for VCCH5V".</div><div class='add'>+			 * This is different to other chips, where the internal</div><div class='add'>+			 * voltage divider would connect VIN7 to an internal</div><div class='add'>+			 * voltage source. Maybe that is the case here as well.</div><div class='add'>+			 *</div><div class='add'>+			 * Since we don't know for sure, re-route it if that is</div><div class='add'>+			 * not the case, and ask the user to report if the</div><div class='add'>+			 * resulting voltage is sane.</div><div class='add'>+			 */</div><div class='add'>+			if (!(reg2C &amp; (1 &lt;&lt; 1))) {</div><div class='add'>+				reg2C |= (1 &lt;&lt; 1);</div><div class='add'>+				superio_outb(IT87_SIO_PINX2_REG, reg2C);</div><div class='add'>+				pr_notice("Routing internal VCCH5V to in7.\n");</div><div class='add'>+			}</div><div class='add'>+			pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");</div><div class='add'>+			pr_notice("Please report if it displays a reasonable voltage.\n");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (reg2C &amp; (1 &lt;&lt; 0))</div><div class='add'>+			sio_data-&gt;internal |= (1 &lt;&lt; 0);</div><div class='add'>+		if (reg2C &amp; (1 &lt;&lt; 1))</div><div class='add'>+			sio_data-&gt;internal |= (1 &lt;&lt; 1);</div><div class='add'>+</div><div class='add'>+		sio_data-&gt;beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) &amp; 0x3f;</div><div class='add'>+</div><div class='ctx'> 	} else {</div><div class='ctx'> 		int reg;</div><div class='add'>+		bool uart6;</div><div class='ctx'> </div><div class='ctx'> 		superio_select(GPIO);</div><div class='ctx'> </div><div class='ctx'> 		reg = superio_inb(IT87_SIO_GPIO3_REG);</div><div class='del'>-		if (sio_data-&gt;type == it8721 || sio_data-&gt;type == it8728) {</div><div class='add'>+		if (sio_data-&gt;type == it8721 || sio_data-&gt;type == it8728 ||</div><div class='add'>+		    sio_data-&gt;type == it8782) {</div><div class='ctx'> 			/*</div><div class='del'>-			 * The IT8721F/IT8758E doesn't have VID pins at all,</div><div class='del'>-			 * not sure about the IT8728F.</div><div class='add'>+			 * IT8721F/IT8758E, and IT8782F don't have VID pins</div><div class='add'>+			 * at all, not sure about the IT8728F.</div><div class='ctx'> 			 */</div><div class='ctx'> 			sio_data-&gt;skip_vid = 1;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1724,6 +1850,9 @@ static int __init it87_find(unsigned short *address,</div><div class='ctx'> 			sio_data-&gt;vid_value = superio_inb(IT87_SIO_VID_REG);</div><div class='ctx'> </div><div class='ctx'> 		reg = superio_inb(IT87_SIO_PINX2_REG);</div><div class='add'>+</div><div class='add'>+		uart6 = sio_data-&gt;type == it8782 &amp;&amp; (reg &amp; (1 &lt;&lt; 2));</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The IT8720F has no VIN7 pin, so VCCH should always be</div><div class='ctx'> 		 * routed internally to VIN7 with an internal divider.</div><div class='hunk'>@@ -1733,8 +1862,12 @@ static int __init it87_find(unsigned short *address,</div><div class='ctx'> 		 * configured, even though the IT8720F datasheet claims</div><div class='ctx'> 		 * that the internal routing of VCCH to VIN7 is the default</div><div class='ctx'> 		 * setting. So we force the internal routing in this case.</div><div class='add'>+		 *</div><div class='add'>+		 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.</div><div class='add'>+		 * If UART6 is enabled, re-route VIN7 to the internal divider</div><div class='add'>+		 * if that is not already the case.</div><div class='ctx'> 		 */</div><div class='del'>-		if (sio_data-&gt;type == it8720 &amp;&amp; !(reg &amp; (1 &lt;&lt; 1))) {</div><div class='add'>+		if ((sio_data-&gt;type == it8720 || uart6) &amp;&amp; !(reg &amp; (1 &lt;&lt; 1))) {</div><div class='ctx'> 			reg |= (1 &lt;&lt; 1);</div><div class='ctx'> 			superio_outb(IT87_SIO_PINX2_REG, reg);</div><div class='ctx'> 			pr_notice("Routing internal VCCH to in7\n");</div><div class='hunk'>@@ -1745,6 +1878,20 @@ static int __init it87_find(unsigned short *address,</div><div class='ctx'> 		    sio_data-&gt;type == it8728)</div><div class='ctx'> 			sio_data-&gt;internal |= (1 &lt;&lt; 1);</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.</div><div class='add'>+		 * While VIN7 can be routed to the internal voltage divider,</div><div class='add'>+		 * VIN5 and VIN6 are not available if UART6 is enabled.</div><div class='add'>+		 *</div><div class='add'>+		 * Also, temp3 is not available if UART6 is enabled and TEMPIN3</div><div class='add'>+		 * is the temperature source. Since we can not read the</div><div class='add'>+		 * temperature source here, skip_temp is preliminary.</div><div class='add'>+		 */</div><div class='add'>+		if (uart6) {</div><div class='add'>+			sio_data-&gt;skip_in |= (1 &lt;&lt; 5) | (1 &lt;&lt; 6);</div><div class='add'>+			sio_data-&gt;skip_temp |= (1 &lt;&lt; 2);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		sio_data-&gt;beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) &amp; 0x3f;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (sio_data-&gt;beep_pin)</div><div class='hunk'>@@ -1782,8 +1929,22 @@ static void it87_remove_files(struct device *dev)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	sysfs_remove_group(&amp;dev-&gt;kobj, &amp;it87_group);</div><div class='del'>-	if (sio_data-&gt;beep_pin)</div><div class='del'>-		sysfs_remove_group(&amp;dev-&gt;kobj, &amp;it87_group_beep);</div><div class='add'>+	for (i = 0; i &lt; 9; i++) {</div><div class='add'>+		if (sio_data-&gt;skip_in &amp; (1 &lt;&lt; i))</div><div class='add'>+			continue;</div><div class='add'>+		sysfs_remove_group(&amp;dev-&gt;kobj, &amp;it87_group_in[i]);</div><div class='add'>+		if (it87_attributes_in_beep[i])</div><div class='add'>+			sysfs_remove_file(&amp;dev-&gt;kobj,</div><div class='add'>+					  it87_attributes_in_beep[i]);</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		if (!(data-&gt;has_temp &amp; (1 &lt;&lt; i)))</div><div class='add'>+			continue;</div><div class='add'>+		sysfs_remove_group(&amp;dev-&gt;kobj, &amp;it87_group_temp[i]);</div><div class='add'>+		if (sio_data-&gt;beep_pin)</div><div class='add'>+			sysfs_remove_file(&amp;dev-&gt;kobj,</div><div class='add'>+					  it87_attributes_temp_beep[i]);</div><div class='add'>+	}</div><div class='ctx'> 	for (i = 0; i &lt; 5; i++) {</div><div class='ctx'> 		if (!(data-&gt;has_fan &amp; (1 &lt;&lt; i)))</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -1823,22 +1984,22 @@ static int __devinit it87_probe(struct platform_device *pdev)</div><div class='ctx'> 		"it8720",</div><div class='ctx'> 		"it8721",</div><div class='ctx'> 		"it8728",</div><div class='add'>+		"it8782",</div><div class='add'>+		"it8783",</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	res = platform_get_resource(pdev, IORESOURCE_IO, 0);</div><div class='del'>-	if (!request_region(res-&gt;start, IT87_EC_EXTENT, DRVNAME)) {</div><div class='add'>+	if (!devm_request_region(&amp;pdev-&gt;dev, res-&gt;start, IT87_EC_EXTENT,</div><div class='add'>+				 DRVNAME)) {</div><div class='ctx'> 		dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",</div><div class='ctx'> 			(unsigned long)res-&gt;start,</div><div class='ctx'> 			(unsigned long)(res-&gt;start + IT87_EC_EXTENT - 1));</div><div class='del'>-		err = -EBUSY;</div><div class='del'>-		goto ERROR0;</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	data = kzalloc(sizeof(struct it87_data), GFP_KERNEL);</div><div class='del'>-	if (!data) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto ERROR1;</div><div class='del'>-	}</div><div class='add'>+	data = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct it87_data), GFP_KERNEL);</div><div class='add'>+	if (!data)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	data-&gt;addr = res-&gt;start;</div><div class='ctx'> 	data-&gt;type = sio_data-&gt;type;</div><div class='hunk'>@@ -1847,10 +2008,8 @@ static int __devinit it87_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	/* Now, we do the remaining detection. */</div><div class='ctx'> 	if ((it87_read_value(data, IT87_REG_CONFIG) &amp; 0x80)</div><div class='del'>-	 || it87_read_value(data, IT87_REG_CHIPID) != 0x90) {</div><div class='del'>-		err = -ENODEV;</div><div class='del'>-		goto ERROR2;</div><div class='del'>-	}</div><div class='add'>+	 || it87_read_value(data, IT87_REG_CHIPID) != 0x90)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, data);</div><div class='ctx'> </div><div class='hunk'>@@ -1867,6 +2026,18 @@ static int __devinit it87_probe(struct platform_device *pdev)</div><div class='ctx'> 			data-&gt;in_scaled |= (1 &lt;&lt; 7);	/* in7 is VSB */</div><div class='ctx'> 		if (sio_data-&gt;internal &amp; (1 &lt;&lt; 2))</div><div class='ctx'> 			data-&gt;in_scaled |= (1 &lt;&lt; 8);	/* in8 is Vbat */</div><div class='add'>+	} else if (sio_data-&gt;type == it8782 || sio_data-&gt;type == it8783) {</div><div class='add'>+		if (sio_data-&gt;internal &amp; (1 &lt;&lt; 0))</div><div class='add'>+			data-&gt;in_scaled |= (1 &lt;&lt; 3);	/* in3 is VCC5V */</div><div class='add'>+		if (sio_data-&gt;internal &amp; (1 &lt;&lt; 1))</div><div class='add'>+			data-&gt;in_scaled |= (1 &lt;&lt; 7);	/* in7 is VCCH5V */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data-&gt;has_temp = 0x07;</div><div class='add'>+	if (sio_data-&gt;skip_temp &amp; (1 &lt;&lt; 2)) {</div><div class='add'>+		if (sio_data-&gt;type == it8782</div><div class='add'>+		    &amp;&amp; !(it87_read_value(data, IT87_REG_TEMP_EXTRA) &amp; 0x80))</div><div class='add'>+			data-&gt;has_temp &amp;= ~(1 &lt;&lt; 2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize the IT87 chip */</div><div class='hunk'>@@ -1875,12 +2046,34 @@ static int __devinit it87_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* Register sysfs hooks */</div><div class='ctx'> 	err = sysfs_create_group(&amp;dev-&gt;kobj, &amp;it87_group);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto ERROR2;</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	if (sio_data-&gt;beep_pin) {</div><div class='del'>-		err = sysfs_create_group(&amp;dev-&gt;kobj, &amp;it87_group_beep);</div><div class='add'>+	for (i = 0; i &lt; 9; i++) {</div><div class='add'>+		if (sio_data-&gt;skip_in &amp; (1 &lt;&lt; i))</div><div class='add'>+			continue;</div><div class='add'>+		err = sysfs_create_group(&amp;dev-&gt;kobj, &amp;it87_group_in[i]);</div><div class='ctx'> 		if (err)</div><div class='del'>-			goto ERROR4;</div><div class='add'>+			goto error;</div><div class='add'>+		if (sio_data-&gt;beep_pin &amp;&amp; it87_attributes_in_beep[i]) {</div><div class='add'>+			err = sysfs_create_file(&amp;dev-&gt;kobj,</div><div class='add'>+						it87_attributes_in_beep[i]);</div><div class='add'>+			if (err)</div><div class='add'>+				goto error;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		if (!(data-&gt;has_temp &amp; (1 &lt;&lt; i)))</div><div class='add'>+			continue;</div><div class='add'>+		err = sysfs_create_group(&amp;dev-&gt;kobj, &amp;it87_group_temp[i]);</div><div class='add'>+		if (err)</div><div class='add'>+			goto error;</div><div class='add'>+		if (sio_data-&gt;beep_pin) {</div><div class='add'>+			err = sysfs_create_file(&amp;dev-&gt;kobj,</div><div class='add'>+						it87_attributes_temp_beep[i]);</div><div class='add'>+			if (err)</div><div class='add'>+				goto error;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Do not create fan files for disabled fans */</div><div class='hunk'>@@ -1891,13 +2084,13 @@ static int __devinit it87_probe(struct platform_device *pdev)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		err = sysfs_create_group(&amp;dev-&gt;kobj, &amp;fan_group[i]);</div><div class='ctx'> 		if (err)</div><div class='del'>-			goto ERROR4;</div><div class='add'>+			goto error;</div><div class='ctx'> </div><div class='ctx'> 		if (sio_data-&gt;beep_pin) {</div><div class='ctx'> 			err = sysfs_create_file(&amp;dev-&gt;kobj,</div><div class='ctx'> 						it87_attributes_fan_beep[i]);</div><div class='ctx'> 			if (err)</div><div class='del'>-				goto ERROR4;</div><div class='add'>+				goto error;</div><div class='ctx'> 			if (!fan_beep_need_rw)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='hunk'>@@ -1922,14 +2115,14 @@ static int __devinit it87_probe(struct platform_device *pdev)</div><div class='ctx'> 			err = sysfs_create_group(&amp;dev-&gt;kobj,</div><div class='ctx'> 						 &amp;it87_group_pwm[i]);</div><div class='ctx'> 			if (err)</div><div class='del'>-				goto ERROR4;</div><div class='add'>+				goto error;</div><div class='ctx'> </div><div class='ctx'> 			if (!has_old_autopwm(data))</div><div class='ctx'> 				continue;</div><div class='ctx'> 			err = sysfs_create_group(&amp;dev-&gt;kobj,</div><div class='ctx'> 						 &amp;it87_group_autopwm[i]);</div><div class='ctx'> 			if (err)</div><div class='del'>-				goto ERROR4;</div><div class='add'>+				goto error;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1939,7 +2132,7 @@ static int __devinit it87_probe(struct platform_device *pdev)</div><div class='ctx'> 		data-&gt;vid = sio_data-&gt;vid_value;</div><div class='ctx'> 		err = sysfs_create_group(&amp;dev-&gt;kobj, &amp;it87_group_vid);</div><div class='ctx'> 		if (err)</div><div class='del'>-			goto ERROR4;</div><div class='add'>+			goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Export labels for internal sensors */</div><div class='hunk'>@@ -1949,25 +2142,19 @@ static int __devinit it87_probe(struct platform_device *pdev)</div><div class='ctx'> 		err = sysfs_create_file(&amp;dev-&gt;kobj,</div><div class='ctx'> 					it87_attributes_label[i]);</div><div class='ctx'> 		if (err)</div><div class='del'>-			goto ERROR4;</div><div class='add'>+			goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	data-&gt;hwmon_dev = hwmon_device_register(dev);</div><div class='ctx'> 	if (IS_ERR(data-&gt;hwmon_dev)) {</div><div class='ctx'> 		err = PTR_ERR(data-&gt;hwmon_dev);</div><div class='del'>-		goto ERROR4;</div><div class='add'>+		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-ERROR4:</div><div class='add'>+error:</div><div class='ctx'> 	it87_remove_files(dev);</div><div class='del'>-ERROR2:</div><div class='del'>-	platform_set_drvdata(pdev, NULL);</div><div class='del'>-	kfree(data);</div><div class='del'>-ERROR1:</div><div class='del'>-	release_region(res-&gt;start, IT87_EC_EXTENT);</div><div class='del'>-ERROR0:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1978,10 +2165,6 @@ static int __devexit it87_remove(struct platform_device *pdev)</div><div class='ctx'> 	hwmon_device_unregister(data-&gt;hwmon_dev);</div><div class='ctx'> 	it87_remove_files(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	release_region(data-&gt;addr, IT87_EC_EXTENT);</div><div class='del'>-	platform_set_drvdata(pdev, NULL);</div><div class='del'>-	kfree(data);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2143,8 +2326,9 @@ static void __devinit it87_init_device(struct platform_device *pdev)</div><div class='ctx'> 			it87_write_value(data, IT87_REG_FAN_16BIT,</div><div class='ctx'> 					 tmp | 0x07);</div><div class='ctx'> 		}</div><div class='del'>-		/* IT8705F only supports three fans. */</div><div class='del'>-		if (data-&gt;type != it87) {</div><div class='add'>+		/* IT8705F, IT8782F, and IT8783E/F only support three fans. */</div><div class='add'>+		if (data-&gt;type != it87 &amp;&amp; data-&gt;type != it8782 &amp;&amp;</div><div class='add'>+		    data-&gt;type != it8783) {</div><div class='ctx'> 			if (tmp &amp; (1 &lt;&lt; 4))</div><div class='ctx'> 				data-&gt;has_fan |= (1 &lt;&lt; 3); /* fan4 enabled */</div><div class='ctx'> 			if (tmp &amp; (1 &lt;&lt; 5))</div><div class='hunk'>@@ -2233,6 +2417,8 @@ static struct it87_data *it87_update_device(struct device *dev)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		for (i = 0; i &lt; 3; i++) {</div><div class='add'>+			if (!(data-&gt;has_temp &amp; (1 &lt;&lt; i)))</div><div class='add'>+				continue;</div><div class='ctx'> 			data-&gt;temp[i] =</div><div class='ctx'> 				it87_read_value(data, IT87_REG_TEMP(i));</div><div class='ctx'> 			data-&gt;temp_high[i] =</div><div class='head'>diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c<br/>index 307bb325dde9..7356b5ec8f67 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/k10temp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/k10temp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/k10temp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/k10temp.c</a></div><div class='hunk'>@@ -225,15 +225,4 @@ static struct pci_driver k10temp_driver = {</div><div class='ctx'> 	.remove = __devexit_p(k10temp_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init k10temp_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;k10temp_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit k10temp_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;k10temp_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(k10temp_init)</div><div class='del'>-module_exit(k10temp_exit)</div><div class='add'>+module_pci_driver(k10temp_driver);</div><div class='head'>diff --git a/drivers/hwmon/k8temp.c b/drivers/hwmon/k8temp.c<br/>index 575101988751..35aac82ee8eb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/k8temp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/k8temp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/k8temp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/k8temp.c</a></div><div class='hunk'>@@ -339,19 +339,8 @@ static struct pci_driver k8temp_driver = {</div><div class='ctx'> 	.remove = __devexit_p(k8temp_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init k8temp_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;k8temp_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit k8temp_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;k8temp_driver);</div><div class='del'>-}</div><div class='add'>+module_pci_driver(k8temp_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Rudolf Marek &lt;r.marek@assembler.cz&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("AMD K8 core temperature monitor");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-module_init(k8temp_init)</div><div class='del'>-module_exit(k8temp_exit)</div><div class='head'>diff --git a/drivers/hwmon/ntc_thermistor.c b/drivers/hwmon/ntc_thermistor.c<br/>index 9b382ec2c3bd..6da9696e1827 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/ntc_thermistor.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/ntc_thermistor.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/ntc_thermistor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/ntc_thermistor.c</a></div><div class='hunk'>@@ -134,8 +134,7 @@ static inline u64 div64_u64_safe(u64 dividend, u64 divisor)</div><div class='ctx'> 	return div64_u64(dividend, divisor);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int get_ohm_of_thermistor(struct ntc_data *data,</div><div class='del'>-		unsigned int uV)</div><div class='add'>+static int get_ohm_of_thermistor(struct ntc_data *data, unsigned int uV)</div><div class='ctx'> {</div><div class='ctx'> 	struct ntc_thermistor_platform_data *pdata = data-&gt;pdata;</div><div class='ctx'> 	u64 mV = uV / 1000;</div><div class='hunk'>@@ -146,12 +145,12 @@ static unsigned int get_ohm_of_thermistor(struct ntc_data *data,</div><div class='ctx'> </div><div class='ctx'> 	if (mV == 0) {</div><div class='ctx'> 		if (pdata-&gt;connect == NTC_CONNECTED_POSITIVE)</div><div class='del'>-			return UINT_MAX;</div><div class='add'>+			return INT_MAX;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (mV &gt;= pmV)</div><div class='ctx'> 		return (pdata-&gt;connect == NTC_CONNECTED_POSITIVE) ?</div><div class='del'>-			0 : UINT_MAX;</div><div class='add'>+			0 : INT_MAX;</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;connect == NTC_CONNECTED_POSITIVE &amp;&amp; puO == 0)</div><div class='ctx'> 		N = div64_u64_safe(pdO * (pmV - mV), mV);</div><div class='hunk'>@@ -163,113 +162,109 @@ static unsigned int get_ohm_of_thermistor(struct ntc_data *data,</div><div class='ctx'> 	else</div><div class='ctx'> 		N = div64_u64_safe(pdO * puO * mV, pdO * (pmV - mV) - puO * mV);</div><div class='ctx'> </div><div class='del'>-	return (unsigned int) N;</div><div class='add'>+	if (N &gt; INT_MAX)</div><div class='add'>+		N = INT_MAX;</div><div class='add'>+	return N;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lookup_comp(struct ntc_data *data,</div><div class='del'>-		unsigned int ohm, int *i_low, int *i_high)</div><div class='add'>+static void lookup_comp(struct ntc_data *data, unsigned int ohm,</div><div class='add'>+			int *i_low, int *i_high)</div><div class='ctx'> {</div><div class='del'>-	int start, end, mid = -1;</div><div class='add'>+	int start, end, mid;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Handle special cases: Resistance is higher than or equal to</div><div class='add'>+	 * resistance in first table entry, or resistance is lower or equal</div><div class='add'>+	 * to resistance in last table entry.</div><div class='add'>+	 * In these cases, return i_low == i_high, either pointing to the</div><div class='add'>+	 * beginning or to the end of the table depending on the condition.</div><div class='add'>+	 */</div><div class='add'>+	if (ohm &gt;= data-&gt;comp[0].ohm) {</div><div class='add'>+		*i_low = 0;</div><div class='add'>+		*i_high = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (ohm &lt;= data-&gt;comp[data-&gt;n_comp - 1].ohm) {</div><div class='add'>+		*i_low = data-&gt;n_comp - 1;</div><div class='add'>+		*i_high = data-&gt;n_comp - 1;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Do a binary search on compensation table */</div><div class='ctx'> 	start = 0;</div><div class='ctx'> 	end = data-&gt;n_comp;</div><div class='del'>-</div><div class='del'>-	while (end &gt; start) {</div><div class='add'>+	while (start &lt; end) {</div><div class='ctx'> 		mid = start + (end - start) / 2;</div><div class='del'>-		if (data-&gt;comp[mid].ohm &lt; ohm)</div><div class='add'>+		/*</div><div class='add'>+		 * start &lt;= mid &lt; end</div><div class='add'>+		 * data-&gt;comp[start].ohm &gt; ohm &gt;= data-&gt;comp[end].ohm</div><div class='add'>+		 *</div><div class='add'>+		 * We could check for "ohm == data-&gt;comp[mid].ohm" here, but</div><div class='add'>+		 * that is a quite unlikely condition, and we would have to</div><div class='add'>+		 * check again after updating start. Check it at the end instead</div><div class='add'>+		 * for simplicity.</div><div class='add'>+		 */</div><div class='add'>+		if (ohm &gt;= data-&gt;comp[mid].ohm) {</div><div class='ctx'> 			end = mid;</div><div class='del'>-		else if (data-&gt;comp[mid].ohm &gt; ohm)</div><div class='del'>-			start = mid + 1;</div><div class='del'>-		else</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (mid == 0) {</div><div class='del'>-		if (data-&gt;comp[mid].ohm &gt; ohm) {</div><div class='del'>-			*i_high = mid;</div><div class='del'>-			*i_low = mid + 1;</div><div class='del'>-			return 0;</div><div class='del'>-		} else {</div><div class='del'>-			*i_low = mid;</div><div class='del'>-			*i_high = -1;</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (mid == (data-&gt;n_comp - 1)) {</div><div class='del'>-		if (data-&gt;comp[mid].ohm &lt;= ohm) {</div><div class='del'>-			*i_low = mid;</div><div class='del'>-			*i_high = mid - 1;</div><div class='del'>-			return 0;</div><div class='ctx'> 		} else {</div><div class='del'>-			*i_low = -1;</div><div class='del'>-			*i_high = mid;</div><div class='del'>-			return -EINVAL;</div><div class='add'>+			start = mid + 1;</div><div class='add'>+			/*</div><div class='add'>+			 * ohm &gt;= data-&gt;comp[start].ohm might be true here,</div><div class='add'>+			 * since we set start to mid + 1. In that case, we are</div><div class='add'>+			 * done. We could keep going, but the condition is quite</div><div class='add'>+			 * likely to occur, so it is worth checking for it.</div><div class='add'>+			 */</div><div class='add'>+			if (ohm &gt;= data-&gt;comp[start].ohm)</div><div class='add'>+				end = start;</div><div class='ctx'> 		}</div><div class='add'>+		/*</div><div class='add'>+		 * start &lt;= end</div><div class='add'>+		 * data-&gt;comp[start].ohm &gt;= ohm &gt;= data-&gt;comp[end].ohm</div><div class='add'>+		 */</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (data-&gt;comp[mid].ohm &lt;= ohm) {</div><div class='del'>-		*i_low = mid;</div><div class='del'>-		*i_high = mid - 1;</div><div class='del'>-	} else {</div><div class='del'>-		*i_low = mid + 1;</div><div class='del'>-		*i_high = mid;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	/*</div><div class='add'>+	 * start == end</div><div class='add'>+	 * ohm &gt;= data-&gt;comp[end].ohm</div><div class='add'>+	 */</div><div class='add'>+	*i_low = end;</div><div class='add'>+	if (ohm == data-&gt;comp[end].ohm)</div><div class='add'>+		*i_high = end;</div><div class='add'>+	else</div><div class='add'>+		*i_high = end - 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int get_temp_mC(struct ntc_data *data, unsigned int ohm, int *temp)</div><div class='add'>+static int get_temp_mC(struct ntc_data *data, unsigned int ohm)</div><div class='ctx'> {</div><div class='ctx'> 	int low, high;</div><div class='del'>-	int ret;</div><div class='add'>+	int temp;</div><div class='ctx'> </div><div class='del'>-	ret = lookup_comp(data, ohm, &amp;low, &amp;high);</div><div class='del'>-	if (ret) {</div><div class='add'>+	lookup_comp(data, ohm, &amp;low, &amp;high);</div><div class='add'>+	if (low == high) {</div><div class='ctx'> 		/* Unable to use linear approximation */</div><div class='del'>-		if (low != -1)</div><div class='del'>-			*temp = data-&gt;comp[low].temp_C * 1000;</div><div class='del'>-		else if (high != -1)</div><div class='del'>-			*temp = data-&gt;comp[high].temp_C * 1000;</div><div class='del'>-		else</div><div class='del'>-			return ret;</div><div class='add'>+		temp = data-&gt;comp[low].temp_C * 1000;</div><div class='ctx'> 	} else {</div><div class='del'>-		*temp = data-&gt;comp[low].temp_C * 1000 +</div><div class='add'>+		temp = data-&gt;comp[low].temp_C * 1000 +</div><div class='ctx'> 			((data-&gt;comp[high].temp_C - data-&gt;comp[low].temp_C) *</div><div class='ctx'> 			 1000 * ((int)ohm - (int)data-&gt;comp[low].ohm)) /</div><div class='ctx'> 			((int)data-&gt;comp[high].ohm - (int)data-&gt;comp[low].ohm);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return temp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ntc_thermistor_read(struct ntc_data *data, int *temp)</div><div class='add'>+static int ntc_thermistor_get_ohm(struct ntc_data *data)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	int read_ohm, read_uV;</div><div class='del'>-	unsigned int ohm = 0;</div><div class='del'>-</div><div class='del'>-	if (data-&gt;pdata-&gt;read_ohm) {</div><div class='del'>-		read_ohm = data-&gt;pdata-&gt;read_ohm();</div><div class='del'>-		if (read_ohm &lt; 0)</div><div class='del'>-			return read_ohm;</div><div class='del'>-		ohm = (unsigned int)read_ohm;</div><div class='del'>-	}</div><div class='add'>+	int read_uV;</div><div class='add'>+</div><div class='add'>+	if (data-&gt;pdata-&gt;read_ohm)</div><div class='add'>+		return data-&gt;pdata-&gt;read_ohm();</div><div class='ctx'> </div><div class='ctx'> 	if (data-&gt;pdata-&gt;read_uV) {</div><div class='ctx'> 		read_uV = data-&gt;pdata-&gt;read_uV();</div><div class='ctx'> 		if (read_uV &lt; 0)</div><div class='ctx'> 			return read_uV;</div><div class='del'>-		ohm = get_ohm_of_thermistor(data, (unsigned int)read_uV);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = get_temp_mC(data, ohm, temp);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_dbg(data-&gt;dev, "Sensor reading function not available.\n");</div><div class='del'>-		return ret;</div><div class='add'>+		return get_ohm_of_thermistor(data, read_uV);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t ntc_show_name(struct device *dev,</div><div class='hunk'>@@ -290,12 +285,13 @@ static ssize_t ntc_show_temp(struct device *dev,</div><div class='ctx'> 		struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct ntc_data *data = dev_get_drvdata(dev);</div><div class='del'>-	int temp, ret;</div><div class='add'>+	int ohm;</div><div class='ctx'> </div><div class='del'>-	ret = ntc_thermistor_read(data, &amp;temp);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-	return sprintf(buf, "%d\n", temp);</div><div class='add'>+	ohm = ntc_thermistor_get_ohm(data);</div><div class='add'>+	if (ohm &lt; 0)</div><div class='add'>+		return ohm;</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%d\n", get_temp_mC(data, ohm));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, ntc_show_type, NULL, 0);</div><div class='hunk'>@@ -326,14 +322,14 @@ static int __devinit ntc_thermistor_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	/* Either one of the two is required. */</div><div class='ctx'> 	if (!pdata-&gt;read_uV &amp;&amp; !pdata-&gt;read_ohm) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Both read_uV and read_ohm missing."</div><div class='del'>-				"Need either one of the two.\n");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"Both read_uV and read_ohm missing. Need either one of the two.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;read_uV &amp;&amp; pdata-&gt;read_ohm) {</div><div class='del'>-		dev_warn(&amp;pdev-&gt;dev, "Only one of read_uV and read_ohm "</div><div class='del'>-				"is needed; ignoring read_uV.\n");</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev,</div><div class='add'>+			 "Only one of read_uV and read_ohm is needed; ignoring read_uV.\n");</div><div class='ctx'> 		pdata-&gt;read_uV = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -344,12 +340,12 @@ static int __devinit ntc_thermistor_probe(struct platform_device *pdev)</div><div class='ctx'> 				 NTC_CONNECTED_POSITIVE) ||</div><div class='ctx'> 				(pdata-&gt;connect != NTC_CONNECTED_POSITIVE &amp;&amp;</div><div class='ctx'> 				 pdata-&gt;connect != NTC_CONNECTED_GROUND))) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Required data to use read_uV not "</div><div class='del'>-				"supplied.\n");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"Required data to use read_uV not supplied.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	data = kzalloc(sizeof(struct ntc_data), GFP_KERNEL);</div><div class='add'>+	data = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct ntc_data), GFP_KERNEL);</div><div class='ctx'> 	if (!data)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -370,8 +366,7 @@ static int __devinit ntc_thermistor_probe(struct platform_device *pdev)</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unknown device type: %lu(%s)\n",</div><div class='ctx'> 				pdev-&gt;id_entry-&gt;driver_data,</div><div class='ctx'> 				pdev-&gt;id_entry-&gt;name);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto err;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, data);</div><div class='hunk'>@@ -379,13 +374,13 @@ static int __devinit ntc_thermistor_probe(struct platform_device *pdev)</div><div class='ctx'> 	ret = sysfs_create_group(&amp;data-&gt;dev-&gt;kobj, &amp;ntc_attr_group);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(data-&gt;dev, "unable to create sysfs files\n");</div><div class='del'>-		goto err;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	data-&gt;hwmon_dev = hwmon_device_register(data-&gt;dev);</div><div class='del'>-	if (IS_ERR_OR_NULL(data-&gt;hwmon_dev)) {</div><div class='add'>+	if (IS_ERR(data-&gt;hwmon_dev)) {</div><div class='ctx'> 		dev_err(data-&gt;dev, "unable to register as hwmon device.\n");</div><div class='del'>-		ret = -EINVAL;</div><div class='add'>+		ret = PTR_ERR(data-&gt;hwmon_dev);</div><div class='ctx'> 		goto err_after_sysfs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -395,8 +390,6 @@ static int __devinit ntc_thermistor_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> err_after_sysfs:</div><div class='ctx'> 	sysfs_remove_group(&amp;data-&gt;dev-&gt;kobj, &amp;ntc_attr_group);</div><div class='del'>-err:</div><div class='del'>-	kfree(data);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -408,8 +401,6 @@ static int __devexit ntc_thermistor_remove(struct platform_device *pdev)</div><div class='ctx'> 	sysfs_remove_group(&amp;data-&gt;dev-&gt;kobj, &amp;ntc_attr_group);</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='del'>-	kfree(data);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/hwmon/sch5627.c b/drivers/hwmon/sch5627.c<br/>index 8ec6dfbccb64..8342275378b8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/sch5627.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/sch5627.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/sch5627.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/sch5627.c</a></div><div class='hunk'>@@ -579,7 +579,7 @@ static int __devinit sch5627_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Note failing to register the watchdog is not a fatal error */</div><div class='del'>-	data-&gt;watchdog = sch56xx_watchdog_register(data-&gt;addr,</div><div class='add'>+	data-&gt;watchdog = sch56xx_watchdog_register(&amp;pdev-&gt;dev, data-&gt;addr,</div><div class='ctx'> 			(build_code &lt;&lt; 24) | (build_id &lt;&lt; 8) | hwmon_rev,</div><div class='ctx'> 			&amp;data-&gt;update_lock, 1);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/hwmon/sch5636.c b/drivers/hwmon/sch5636.c<br/>index 906d4ed32d81..96a7e68718ca 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/sch5636.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/sch5636.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/sch5636.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/sch5636.c</a></div><div class='hunk'>@@ -510,7 +510,7 @@ static int __devinit sch5636_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Note failing to register the watchdog is not a fatal error */</div><div class='del'>-	data-&gt;watchdog = sch56xx_watchdog_register(data-&gt;addr,</div><div class='add'>+	data-&gt;watchdog = sch56xx_watchdog_register(&amp;pdev-&gt;dev, data-&gt;addr,</div><div class='ctx'> 					(revision[0] &lt;&lt; 8) | revision[1],</div><div class='ctx'> 					&amp;data-&gt;update_lock, 0);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/hwmon/sch56xx-common.c b/drivers/hwmon/sch56xx-common.c<br/>index ce52fc57d41d..4380f5d07be2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/sch56xx-common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/sch56xx-common.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/sch56xx-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/sch56xx-common.c</a></div><div class='hunk'>@@ -66,15 +66,10 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="</div><div class='ctx'> </div><div class='ctx'> struct sch56xx_watchdog_data {</div><div class='ctx'> 	u16 addr;</div><div class='del'>-	u32 revision;</div><div class='ctx'> 	struct mutex *io_lock;</div><div class='del'>-	struct mutex watchdog_lock;</div><div class='del'>-	struct list_head list; /* member of the watchdog_data_list */</div><div class='ctx'> 	struct kref kref;</div><div class='del'>-	struct miscdevice watchdog_miscdev;</div><div class='del'>-	unsigned long watchdog_is_open;</div><div class='del'>-	char watchdog_name[10]; /* must be unique to avoid sysfs conflict */</div><div class='del'>-	char watchdog_expect_close;</div><div class='add'>+	struct watchdog_info wdinfo;</div><div class='add'>+	struct watchdog_device wddev;</div><div class='ctx'> 	u8 watchdog_preset;</div><div class='ctx'> 	u8 watchdog_control;</div><div class='ctx'> 	u8 watchdog_output_enable;</div><div class='hunk'>@@ -82,15 +77,6 @@ struct sch56xx_watchdog_data {</div><div class='ctx'> </div><div class='ctx'> static struct platform_device *sch56xx_pdev;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Somewhat ugly :( global data pointer list with all sch56xx devices, so that</div><div class='del'>- * we can find our device data as when using misc_register there is no other</div><div class='del'>- * method to get to ones device data from the open fop.</div><div class='del'>- */</div><div class='del'>-static LIST_HEAD(watchdog_data_list);</div><div class='del'>-/* Note this lock not only protect list access, but also data.kref access */</div><div class='del'>-static DEFINE_MUTEX(watchdog_data_mutex);</div><div class='del'>-</div><div class='ctx'> /* Super I/O functions */</div><div class='ctx'> static inline int superio_inb(int base, int reg)</div><div class='ctx'> {</div><div class='hunk'>@@ -272,22 +258,22 @@ EXPORT_SYMBOL(sch56xx_read_virtual_reg12);</div><div class='ctx'>  * Watchdog routines</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Release our data struct when the platform device has been released *and*</div><div class='del'>- * all references to our watchdog device are released.</div><div class='del'>- */</div><div class='del'>-static void sch56xx_watchdog_release_resources(struct kref *r)</div><div class='add'>+/* Release our data struct when we're unregistered *and*</div><div class='add'>+   all references to our watchdog device are released */</div><div class='add'>+static void watchdog_release_resources(struct kref *r)</div><div class='ctx'> {</div><div class='ctx'> 	struct sch56xx_watchdog_data *data =</div><div class='ctx'> 		container_of(r, struct sch56xx_watchdog_data, kref);</div><div class='ctx'> 	kfree(data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int watchdog_set_timeout(struct sch56xx_watchdog_data *data,</div><div class='del'>-				int timeout)</div><div class='add'>+static int watchdog_set_timeout(struct watchdog_device *wddev,</div><div class='add'>+				unsigned int timeout)</div><div class='ctx'> {</div><div class='del'>-	int ret, resolution;</div><div class='add'>+	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);</div><div class='add'>+	unsigned int resolution;</div><div class='ctx'> 	u8 control;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* 1 second or 60 second resolution? */</div><div class='ctx'> 	if (timeout &lt;= 255)</div><div class='hunk'>@@ -298,12 +284,6 @@ static int watchdog_set_timeout(struct sch56xx_watchdog_data *data,</div><div class='ctx'> 	if (timeout &lt; resolution || timeout &gt; (resolution * 255))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;data-&gt;watchdog_lock);</div><div class='del'>-	if (!data-&gt;addr) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto leave;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (resolution == 1)</div><div class='ctx'> 		control = data-&gt;watchdog_control | SCH56XX_WDOG_TIME_BASE_SEC;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -316,7 +296,7 @@ static int watchdog_set_timeout(struct sch56xx_watchdog_data *data,</div><div class='ctx'> 						control);</div><div class='ctx'> 		mutex_unlock(data-&gt;io_lock);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto leave;</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		data-&gt;watchdog_control = control;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -326,38 +306,17 @@ static int watchdog_set_timeout(struct sch56xx_watchdog_data *data,</div><div class='ctx'> 	 * the watchdog countdown.</div><div class='ctx'> 	 */</div><div class='ctx'> 	data-&gt;watchdog_preset = DIV_ROUND_UP(timeout, resolution);</div><div class='add'>+	wddev-&gt;timeout = data-&gt;watchdog_preset * resolution;</div><div class='ctx'> </div><div class='del'>-	ret = data-&gt;watchdog_preset * resolution;</div><div class='del'>-leave:</div><div class='del'>-	mutex_unlock(&amp;data-&gt;watchdog_lock);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int watchdog_get_timeout(struct sch56xx_watchdog_data *data)</div><div class='del'>-{</div><div class='del'>-	int timeout;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;data-&gt;watchdog_lock);</div><div class='del'>-	if (data-&gt;watchdog_control &amp; SCH56XX_WDOG_TIME_BASE_SEC)</div><div class='del'>-		timeout = data-&gt;watchdog_preset;</div><div class='del'>-	else</div><div class='del'>-		timeout = data-&gt;watchdog_preset * 60;</div><div class='del'>-	mutex_unlock(&amp;data-&gt;watchdog_lock);</div><div class='del'>-</div><div class='del'>-	return timeout;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int watchdog_start(struct sch56xx_watchdog_data *data)</div><div class='add'>+static int watchdog_start(struct watchdog_device *wddev)</div><div class='ctx'> {</div><div class='add'>+	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u8 val;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;data-&gt;watchdog_lock);</div><div class='del'>-	if (!data-&gt;addr) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto leave_unlock_watchdog;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The sch56xx's watchdog cannot really be started / stopped</div><div class='ctx'> 	 * it is always running, but we can avoid the timer expiring</div><div class='hunk'>@@ -385,18 +344,14 @@ static int watchdog_start(struct sch56xx_watchdog_data *data)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto leave;</div><div class='ctx'> </div><div class='del'>-	/* 2. Enable output (if not already enabled) */</div><div class='del'>-	if (!(data-&gt;watchdog_output_enable &amp; SCH56XX_WDOG_OUTPUT_ENABLE)) {</div><div class='del'>-		val = data-&gt;watchdog_output_enable |</div><div class='del'>-		      SCH56XX_WDOG_OUTPUT_ENABLE;</div><div class='del'>-		ret = sch56xx_write_virtual_reg(data-&gt;addr,</div><div class='del'>-						SCH56XX_REG_WDOG_OUTPUT_ENABLE,</div><div class='del'>-						val);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto leave;</div><div class='add'>+	/* 2. Enable output */</div><div class='add'>+	val = data-&gt;watchdog_output_enable | SCH56XX_WDOG_OUTPUT_ENABLE;</div><div class='add'>+	ret = sch56xx_write_virtual_reg(data-&gt;addr,</div><div class='add'>+					SCH56XX_REG_WDOG_OUTPUT_ENABLE, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto leave;</div><div class='ctx'> </div><div class='del'>-		data-&gt;watchdog_output_enable = val;</div><div class='del'>-	}</div><div class='add'>+	data-&gt;watchdog_output_enable = val;</div><div class='ctx'> </div><div class='ctx'> 	/* 3. Clear the watchdog event bit if set */</div><div class='ctx'> 	val = inb(data-&gt;addr + 9);</div><div class='hunk'>@@ -405,234 +360,70 @@ static int watchdog_start(struct sch56xx_watchdog_data *data)</div><div class='ctx'> </div><div class='ctx'> leave:</div><div class='ctx'> 	mutex_unlock(data-&gt;io_lock);</div><div class='del'>-leave_unlock_watchdog:</div><div class='del'>-	mutex_unlock(&amp;data-&gt;watchdog_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int watchdog_trigger(struct sch56xx_watchdog_data *data)</div><div class='add'>+static int watchdog_trigger(struct watchdog_device *wddev)</div><div class='ctx'> {</div><div class='add'>+	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;data-&gt;watchdog_lock);</div><div class='del'>-	if (!data-&gt;addr) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto leave;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Reset the watchdog countdown counter */</div><div class='ctx'> 	mutex_lock(data-&gt;io_lock);</div><div class='ctx'> 	ret = sch56xx_write_virtual_reg(data-&gt;addr, SCH56XX_REG_WDOG_PRESET,</div><div class='ctx'> 					data-&gt;watchdog_preset);</div><div class='ctx'> 	mutex_unlock(data-&gt;io_lock);</div><div class='del'>-leave:</div><div class='del'>-	mutex_unlock(&amp;data-&gt;watchdog_lock);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int watchdog_stop_unlocked(struct sch56xx_watchdog_data *data)</div><div class='add'>+static int watchdog_stop(struct watchdog_device *wddev)</div><div class='ctx'> {</div><div class='add'>+	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	u8 val;</div><div class='ctx'> </div><div class='del'>-	if (!data-&gt;addr)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	if (data-&gt;watchdog_output_enable &amp; SCH56XX_WDOG_OUTPUT_ENABLE) {</div><div class='del'>-		val = data-&gt;watchdog_output_enable &amp;</div><div class='del'>-		      ~SCH56XX_WDOG_OUTPUT_ENABLE;</div><div class='del'>-		mutex_lock(data-&gt;io_lock);</div><div class='del'>-		ret = sch56xx_write_virtual_reg(data-&gt;addr,</div><div class='del'>-						SCH56XX_REG_WDOG_OUTPUT_ENABLE,</div><div class='del'>-						val);</div><div class='del'>-		mutex_unlock(data-&gt;io_lock);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		data-&gt;watchdog_output_enable = val;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int watchdog_stop(struct sch56xx_watchdog_data *data)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;data-&gt;watchdog_lock);</div><div class='del'>-	ret = watchdog_stop_unlocked(data);</div><div class='del'>-	mutex_unlock(&amp;data-&gt;watchdog_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int watchdog_release(struct inode *inode, struct file *filp)</div><div class='del'>-{</div><div class='del'>-	struct sch56xx_watchdog_data *data = filp-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	if (data-&gt;watchdog_expect_close) {</div><div class='del'>-		watchdog_stop(data);</div><div class='del'>-		data-&gt;watchdog_expect_close = 0;</div><div class='del'>-	} else {</div><div class='del'>-		watchdog_trigger(data);</div><div class='del'>-		pr_crit("unexpected close, not stopping watchdog!\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	clear_bit(0, &amp;data-&gt;watchdog_is_open);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;watchdog_data_mutex);</div><div class='del'>-	kref_put(&amp;data-&gt;kref, sch56xx_watchdog_release_resources);</div><div class='del'>-	mutex_unlock(&amp;watchdog_data_mutex);</div><div class='add'>+	val = data-&gt;watchdog_output_enable &amp; ~SCH56XX_WDOG_OUTPUT_ENABLE;</div><div class='add'>+	mutex_lock(data-&gt;io_lock);</div><div class='add'>+	ret = sch56xx_write_virtual_reg(data-&gt;addr,</div><div class='add'>+					SCH56XX_REG_WDOG_OUTPUT_ENABLE, val);</div><div class='add'>+	mutex_unlock(data-&gt;io_lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='add'>+	data-&gt;watchdog_output_enable = val;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int watchdog_open(struct inode *inode, struct file *filp)</div><div class='add'>+static void watchdog_ref(struct watchdog_device *wddev)</div><div class='ctx'> {</div><div class='del'>-	struct sch56xx_watchdog_data *pos, *data = NULL;</div><div class='del'>-	int ret, watchdog_is_open;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We get called from drivers/char/misc.c with misc_mtx hold, and we</div><div class='del'>-	 * call misc_register() from sch56xx_watchdog_probe() with</div><div class='del'>-	 * watchdog_data_mutex hold, as misc_register() takes the misc_mtx</div><div class='del'>-	 * lock, this is a possible deadlock, so we use mutex_trylock here.</div><div class='del'>-	 */</div><div class='del'>-	if (!mutex_trylock(&amp;watchdog_data_mutex))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-	list_for_each_entry(pos, &amp;watchdog_data_list, list) {</div><div class='del'>-		if (pos-&gt;watchdog_miscdev.minor == iminor(inode)) {</div><div class='del'>-			data = pos;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	/* Note we can never not have found data, so we don't check for this */</div><div class='del'>-	watchdog_is_open = test_and_set_bit(0, &amp;data-&gt;watchdog_is_open);</div><div class='del'>-	if (!watchdog_is_open)</div><div class='del'>-		kref_get(&amp;data-&gt;kref);</div><div class='del'>-	mutex_unlock(&amp;watchdog_data_mutex);</div><div class='del'>-</div><div class='del'>-	if (watchdog_is_open)</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	filp-&gt;private_data = data;</div><div class='del'>-</div><div class='del'>-	/* Start the watchdog */</div><div class='del'>-	ret = watchdog_start(data);</div><div class='del'>-	if (ret) {</div><div class='del'>-		watchdog_release(inode, filp);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='add'>+	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);</div><div class='ctx'> </div><div class='del'>-	return nonseekable_open(inode, filp);</div><div class='add'>+	kref_get(&amp;data-&gt;kref);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t watchdog_write(struct file *filp, const char __user *buf,</div><div class='del'>-	size_t count, loff_t *offset)</div><div class='add'>+static void watchdog_unref(struct watchdog_device *wddev)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	struct sch56xx_watchdog_data *data = filp-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	if (count) {</div><div class='del'>-		if (!nowayout) {</div><div class='del'>-			size_t i;</div><div class='del'>-</div><div class='del'>-			/* Clear it in case it was set with a previous write */</div><div class='del'>-			data-&gt;watchdog_expect_close = 0;</div><div class='del'>-</div><div class='del'>-			for (i = 0; i != count; i++) {</div><div class='del'>-				char c;</div><div class='del'>-				if (get_user(c, buf + i))</div><div class='del'>-					return -EFAULT;</div><div class='del'>-				if (c == 'V')</div><div class='del'>-					data-&gt;watchdog_expect_close = 1;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		ret = watchdog_trigger(data);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static long watchdog_ioctl(struct file *filp, unsigned int cmd,</div><div class='del'>-			   unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	struct watchdog_info ident = {</div><div class='del'>-		.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,</div><div class='del'>-		.identity = "sch56xx watchdog"</div><div class='del'>-	};</div><div class='del'>-	int i, ret = 0;</div><div class='del'>-	struct sch56xx_watchdog_data *data = filp-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case WDIOC_GETSUPPORT:</div><div class='del'>-		ident.firmware_version = data-&gt;revision;</div><div class='del'>-		if (!nowayout)</div><div class='del'>-			ident.options |= WDIOF_MAGICCLOSE;</div><div class='del'>-		if (copy_to_user((void __user *)arg, &amp;ident, sizeof(ident)))</div><div class='del'>-			ret = -EFAULT;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case WDIOC_GETSTATUS:</div><div class='del'>-	case WDIOC_GETBOOTSTATUS:</div><div class='del'>-		ret = put_user(0, (int __user *)arg);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case WDIOC_KEEPALIVE:</div><div class='del'>-		ret = watchdog_trigger(data);</div><div class='del'>-		break;</div><div class='add'>+	struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);</div><div class='ctx'> </div><div class='del'>-	case WDIOC_GETTIMEOUT:</div><div class='del'>-		i = watchdog_get_timeout(data);</div><div class='del'>-		ret = put_user(i, (int __user *)arg);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case WDIOC_SETTIMEOUT:</div><div class='del'>-		if (get_user(i, (int __user *)arg)) {</div><div class='del'>-			ret = -EFAULT;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		ret = watchdog_set_timeout(data, i);</div><div class='del'>-		if (ret &gt;= 0)</div><div class='del'>-			ret = put_user(ret, (int __user *)arg);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case WDIOC_SETOPTIONS:</div><div class='del'>-		if (get_user(i, (int __user *)arg)) {</div><div class='del'>-			ret = -EFAULT;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (i &amp; WDIOS_DISABLECARD)</div><div class='del'>-			ret = watchdog_stop(data);</div><div class='del'>-		else if (i &amp; WDIOS_ENABLECARD)</div><div class='del'>-			ret = watchdog_trigger(data);</div><div class='del'>-		else</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		ret = -ENOTTY;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	kref_put(&amp;data-&gt;kref, watchdog_release_resources);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct file_operations watchdog_fops = {</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-	.llseek = no_llseek,</div><div class='del'>-	.open = watchdog_open,</div><div class='del'>-	.release = watchdog_release,</div><div class='del'>-	.write = watchdog_write,</div><div class='del'>-	.unlocked_ioctl = watchdog_ioctl,</div><div class='add'>+static const struct watchdog_ops watchdog_ops = {</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+	.start		= watchdog_start,</div><div class='add'>+	.stop		= watchdog_stop,</div><div class='add'>+	.ping		= watchdog_trigger,</div><div class='add'>+	.set_timeout	= watchdog_set_timeout,</div><div class='add'>+	.ref		= watchdog_ref,</div><div class='add'>+	.unref		= watchdog_unref,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct sch56xx_watchdog_data *sch56xx_watchdog_register(</div><div class='add'>+struct sch56xx_watchdog_data *sch56xx_watchdog_register(struct device *parent,</div><div class='ctx'> 	u16 addr, u32 revision, struct mutex *io_lock, int check_enabled)</div><div class='ctx'> {</div><div class='ctx'> 	struct sch56xx_watchdog_data *data;</div><div class='del'>-	int i, err, control, output_enable;</div><div class='del'>-	const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 };</div><div class='add'>+	int err, control, output_enable;</div><div class='ctx'> </div><div class='ctx'> 	/* Cache the watchdog registers */</div><div class='ctx'> 	mutex_lock(io_lock);</div><div class='hunk'>@@ -656,82 +447,55 @@ struct sch56xx_watchdog_data *sch56xx_watchdog_register(</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	data-&gt;addr = addr;</div><div class='del'>-	data-&gt;revision = revision;</div><div class='ctx'> 	data-&gt;io_lock = io_lock;</div><div class='del'>-	data-&gt;watchdog_control = control;</div><div class='del'>-	data-&gt;watchdog_output_enable = output_enable;</div><div class='del'>-	mutex_init(&amp;data-&gt;watchdog_lock);</div><div class='del'>-	INIT_LIST_HEAD(&amp;data-&gt;list);</div><div class='ctx'> 	kref_init(&amp;data-&gt;kref);</div><div class='ctx'> </div><div class='del'>-	err = watchdog_set_timeout(data, 60);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We take the data_mutex lock early so that watchdog_open() cannot</div><div class='del'>-	 * run when misc_register() has completed, but we've not yet added</div><div class='del'>-	 * our data to the watchdog_data_list.</div><div class='del'>-	 */</div><div class='del'>-	mutex_lock(&amp;watchdog_data_mutex);</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(watchdog_minors); i++) {</div><div class='del'>-		/* Register our watchdog part */</div><div class='del'>-		snprintf(data-&gt;watchdog_name, sizeof(data-&gt;watchdog_name),</div><div class='del'>-			"watchdog%c", (i == 0) ? '\0' : ('0' + i));</div><div class='del'>-		data-&gt;watchdog_miscdev.name = data-&gt;watchdog_name;</div><div class='del'>-		data-&gt;watchdog_miscdev.fops = &amp;watchdog_fops;</div><div class='del'>-		data-&gt;watchdog_miscdev.minor = watchdog_minors[i];</div><div class='del'>-		err = misc_register(&amp;data-&gt;watchdog_miscdev);</div><div class='del'>-		if (err == -EBUSY)</div><div class='del'>-			continue;</div><div class='del'>-		if (err)</div><div class='del'>-			break;</div><div class='add'>+	strlcpy(data-&gt;wdinfo.identity, "sch56xx watchdog",</div><div class='add'>+		sizeof(data-&gt;wdinfo.identity));</div><div class='add'>+	data-&gt;wdinfo.firmware_version = revision;</div><div class='add'>+	data-&gt;wdinfo.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT;</div><div class='add'>+	if (!nowayout)</div><div class='add'>+		data-&gt;wdinfo.options |= WDIOF_MAGICCLOSE;</div><div class='add'>+</div><div class='add'>+	data-&gt;wddev.info = &amp;data-&gt;wdinfo;</div><div class='add'>+	data-&gt;wddev.ops = &amp;watchdog_ops;</div><div class='add'>+	data-&gt;wddev.parent = parent;</div><div class='add'>+	data-&gt;wddev.timeout = 60;</div><div class='add'>+	data-&gt;wddev.min_timeout = 1;</div><div class='add'>+	data-&gt;wddev.max_timeout = 255 * 60;</div><div class='add'>+	if (nowayout)</div><div class='add'>+		set_bit(WDOG_NO_WAY_OUT, &amp;data-&gt;wddev.status);</div><div class='add'>+	if (output_enable &amp; SCH56XX_WDOG_OUTPUT_ENABLE)</div><div class='add'>+		set_bit(WDOG_ACTIVE, &amp;data-&gt;wddev.status);</div><div class='add'>+</div><div class='add'>+	/* Since the watchdog uses a downcounter there is no register to read</div><div class='add'>+	   the BIOS set timeout from (if any was set at all) -&gt;</div><div class='add'>+	   Choose a preset which will give us a 1 minute timeout */</div><div class='add'>+	if (control &amp; SCH56XX_WDOG_TIME_BASE_SEC)</div><div class='add'>+		data-&gt;watchdog_preset = 60; /* seconds */</div><div class='add'>+	else</div><div class='add'>+		data-&gt;watchdog_preset = 1; /* minute */</div><div class='ctx'> </div><div class='del'>-		list_add(&amp;data-&gt;list, &amp;watchdog_data_list);</div><div class='del'>-		pr_info("Registered /dev/%s chardev major 10, minor: %d\n",</div><div class='del'>-			data-&gt;watchdog_name, watchdog_minors[i]);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	mutex_unlock(&amp;watchdog_data_mutex);</div><div class='add'>+	data-&gt;watchdog_control = control;</div><div class='add'>+	data-&gt;watchdog_output_enable = output_enable;</div><div class='ctx'> </div><div class='add'>+	watchdog_set_drvdata(&amp;data-&gt;wddev, data);</div><div class='add'>+	err = watchdog_register_device(&amp;data-&gt;wddev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		pr_err("Registering watchdog chardev: %d\n", err);</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-	if (i == ARRAY_SIZE(watchdog_minors)) {</div><div class='del'>-		pr_warn("Couldn't register watchdog (no free minor)\n");</div><div class='del'>-		goto error;</div><div class='add'>+		kfree(data);</div><div class='add'>+		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return data;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	kfree(data);</div><div class='del'>-	return NULL;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(sch56xx_watchdog_register);</div><div class='ctx'> </div><div class='ctx'> void sch56xx_watchdog_unregister(struct sch56xx_watchdog_data *data)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;watchdog_data_mutex);</div><div class='del'>-	misc_deregister(&amp;data-&gt;watchdog_miscdev);</div><div class='del'>-	list_del(&amp;data-&gt;list);</div><div class='del'>-	mutex_unlock(&amp;watchdog_data_mutex);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;data-&gt;watchdog_lock);</div><div class='del'>-	if (data-&gt;watchdog_is_open) {</div><div class='del'>-		pr_warn("platform device unregistered with watchdog "</div><div class='del'>-			"open! Stopping watchdog.\n");</div><div class='del'>-		watchdog_stop_unlocked(data);</div><div class='del'>-	}</div><div class='del'>-	/* Tell the wdog start/stop/trigger functions our dev is gone */</div><div class='del'>-	data-&gt;addr = 0;</div><div class='del'>-	data-&gt;io_lock = NULL;</div><div class='del'>-	mutex_unlock(&amp;data-&gt;watchdog_lock);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;watchdog_data_mutex);</div><div class='del'>-	kref_put(&amp;data-&gt;kref, sch56xx_watchdog_release_resources);</div><div class='del'>-	mutex_unlock(&amp;watchdog_data_mutex);</div><div class='add'>+	watchdog_unregister_device(&amp;data-&gt;wddev);</div><div class='add'>+	kref_put(&amp;data-&gt;kref, watchdog_release_resources);</div><div class='add'>+	/* Don't touch data after this it may have been free-ed! */</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(sch56xx_watchdog_unregister);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/hwmon/sch56xx-common.h b/drivers/hwmon/sch56xx-common.h<br/>index 7475086eb978..704ea2c6d28a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/hwmon/sch56xx-common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/hwmon/sch56xx-common.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/hwmon/sch56xx-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/hwmon/sch56xx-common.h</a></div><div class='hunk'>@@ -27,6 +27,6 @@ int sch56xx_read_virtual_reg16(u16 addr, u16 reg);</div><div class='ctx'> int sch56xx_read_virtual_reg12(u16 addr, u16 msb_reg, u16 lsn_reg,</div><div class='ctx'> 			       int high_nibble);</div><div class='ctx'> </div><div class='del'>-struct sch56xx_watchdog_data *sch56xx_watchdog_register(</div><div class='add'>+struct sch56xx_watchdog_data *sch56xx_watchdog_register(struct device *parent,</div><div class='ctx'> 	u16 addr, u32 revision, struct mutex *io_lock, int check_enabled);</div><div class='ctx'> void sch56xx_watchdog_unregister(struct sch56xx_watchdog_data *data);</div><div class='head'>diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig<br/>index 5f13c62e64b4..5a3bb3d738d8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/Kconfig</a></div><div class='hunk'>@@ -49,7 +49,6 @@ config I2C_CHARDEV</div><div class='ctx'> </div><div class='ctx'> config I2C_MUX</div><div class='ctx'> 	tristate "I2C bus multiplexing support"</div><div class='del'>-	depends on EXPERIMENTAL</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want the I2C core to support the ability to</div><div class='ctx'> 	  handle multiplexed I2C bus topologies, by presenting each</div><div class='head'>diff --git a/drivers/i2c/algos/i2c-algo-bit.c b/drivers/i2c/algos/i2c-algo-bit.c<br/>index 7f0b83219744..fad22b0bb5b0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/algos/i2c-algo-bit.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/algos/i2c-algo-bit.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/algos/i2c-algo-bit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/algos/i2c-algo-bit.c</a></div><div class='hunk'>@@ -608,7 +608,7 @@ bailout:</div><div class='ctx'> </div><div class='ctx'> static u32 bit_func(struct i2c_adapter *adap)</div><div class='ctx'> {</div><div class='del'>-	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |</div><div class='add'>+	return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL |</div><div class='ctx'> 	       I2C_FUNC_SMBUS_READ_BLOCK_DATA |</div><div class='ctx'> 	       I2C_FUNC_SMBUS_BLOCK_PROC_CALL |</div><div class='ctx'> 	       I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;</div><div class='head'>diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig<br/>index d2c5095deeac..7244c8be6063 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/Kconfig</a></div><div class='hunk'>@@ -351,7 +351,7 @@ config I2C_DAVINCI</div><div class='ctx'> 	  For details please see http://www.ti.com/davinci</div><div class='ctx'> </div><div class='ctx'> config I2C_DESIGNWARE_PLATFORM</div><div class='del'>-	tristate "Synopsys DesignWare Platfrom"</div><div class='add'>+	tristate "Synopsys DesignWare Platform"</div><div class='ctx'> 	depends on HAVE_CLK</div><div class='ctx'> 	help</div><div class='ctx'> 	  If you say yes to this option, support will be included for the</div><div class='hunk'>@@ -445,20 +445,6 @@ config I2C_IOP3XX</div><div class='ctx'> 	  This driver can also be built as a module.  If so, the module</div><div class='ctx'> 	  will be called i2c-iop3xx.</div><div class='ctx'> </div><div class='del'>-config I2C_IXP2000</div><div class='del'>-	tristate "IXP2000 GPIO-Based I2C Interface (DEPRECATED)"</div><div class='del'>-	depends on ARCH_IXP2000</div><div class='del'>-	select I2C_ALGOBIT</div><div class='del'>-	help</div><div class='del'>-	  Say Y here if you have an Intel IXP2000 (2400, 2800, 2850) based</div><div class='del'>-	  system and are using GPIO lines for an I2C bus.</div><div class='del'>-</div><div class='del'>-	  This support is also available as a module. If so, the module</div><div class='del'>-	  will be called i2c-ixp2000.</div><div class='del'>-</div><div class='del'>-	  This driver is deprecated and will be dropped soon. Use i2c-gpio</div><div class='del'>-	  instead.</div><div class='del'>-</div><div class='ctx'> config I2C_MPC</div><div class='ctx'> 	tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx"</div><div class='ctx'> 	depends on PPC</div><div class='hunk'>@@ -483,6 +469,7 @@ config I2C_MV64XXX</div><div class='ctx'> config I2C_MXS</div><div class='ctx'> 	tristate "Freescale i.MX28 I2C interface"</div><div class='ctx'> 	depends on SOC_IMX28</div><div class='add'>+	select STMP_DEVICE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to use the I2C bus controller on</div><div class='ctx'> 	  the Freescale i.MX28 processors.</div><div class='head'>diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile<br/>index 569567b0d027..ce3c2be7fb40 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/Makefile</a></div><div class='hunk'>@@ -44,7 +44,6 @@ obj-$(CONFIG_I2C_IBM_IIC)	+= i2c-ibm_iic.o</div><div class='ctx'> obj-$(CONFIG_I2C_IMX)		+= i2c-imx.o</div><div class='ctx'> obj-$(CONFIG_I2C_INTEL_MID)	+= i2c-intel-mid.o</div><div class='ctx'> obj-$(CONFIG_I2C_IOP3XX)	+= i2c-iop3xx.o</div><div class='del'>-obj-$(CONFIG_I2C_IXP2000)	+= i2c-ixp2000.o</div><div class='ctx'> obj-$(CONFIG_I2C_MPC)		+= i2c-mpc.o</div><div class='ctx'> obj-$(CONFIG_I2C_MV64XXX)	+= i2c-mv64xxx.o</div><div class='ctx'> obj-$(CONFIG_I2C_MXS)		+= i2c-mxs.o</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c<br/>index a76d85fa3ad7..79b4bcb3b85c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-davinci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-davinci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-davinci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-davinci.c</a></div><div class='hunk'>@@ -755,7 +755,7 @@ static int davinci_i2c_remove(struct platform_device *pdev)</div><div class='ctx'> 	dev-&gt;clk = NULL;</div><div class='ctx'> </div><div class='ctx'> 	davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0);</div><div class='del'>-	free_irq(IRQ_I2C, dev);</div><div class='add'>+	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 	iounmap(dev-&gt;base);</div><div class='ctx'> 	kfree(dev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c<br/>index df8799241009..1e48bec80edf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-designware-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-designware-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-designware-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-designware-core.c</a></div><div class='hunk'>@@ -164,9 +164,15 @@ static char *abort_sources[] = {</div><div class='ctx'> </div><div class='ctx'> u32 dw_readl(struct dw_i2c_dev *dev, int offset)</div><div class='ctx'> {</div><div class='del'>-	u32 value = readl(dev-&gt;base + offset);</div><div class='add'>+	u32 value;</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;swab)</div><div class='add'>+	if (dev-&gt;accessor_flags &amp; ACCESS_16BIT)</div><div class='add'>+		value = readw(dev-&gt;base + offset) |</div><div class='add'>+			(readw(dev-&gt;base + offset + 2) &lt;&lt; 16);</div><div class='add'>+	else</div><div class='add'>+		value = readl(dev-&gt;base + offset);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;accessor_flags &amp; ACCESS_SWAP)</div><div class='ctx'> 		return swab32(value);</div><div class='ctx'> 	else</div><div class='ctx'> 		return value;</div><div class='hunk'>@@ -174,10 +180,15 @@ u32 dw_readl(struct dw_i2c_dev *dev, int offset)</div><div class='ctx'> </div><div class='ctx'> void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset)</div><div class='ctx'> {</div><div class='del'>-	if (dev-&gt;swab)</div><div class='add'>+	if (dev-&gt;accessor_flags &amp; ACCESS_SWAP)</div><div class='ctx'> 		b = swab32(b);</div><div class='ctx'> </div><div class='del'>-	writel(b, dev-&gt;base + offset);</div><div class='add'>+	if (dev-&gt;accessor_flags &amp; ACCESS_16BIT) {</div><div class='add'>+		writew((u16)b, dev-&gt;base + offset);</div><div class='add'>+		writew((u16)(b &gt;&gt; 16), dev-&gt;base + offset + 2);</div><div class='add'>+	} else {</div><div class='add'>+		writel(b, dev-&gt;base + offset);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32</div><div class='hunk'>@@ -251,14 +262,14 @@ int i2c_dw_init(struct dw_i2c_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	input_clock_khz = dev-&gt;get_clk_rate_khz(dev);</div><div class='ctx'> </div><div class='del'>-	/* Configure register endianess access */</div><div class='ctx'> 	reg = dw_readl(dev, DW_IC_COMP_TYPE);</div><div class='ctx'> 	if (reg == ___constant_swab32(DW_IC_COMP_TYPE_VALUE)) {</div><div class='del'>-		dev-&gt;swab = 1;</div><div class='del'>-		reg = DW_IC_COMP_TYPE_VALUE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (reg != DW_IC_COMP_TYPE_VALUE) {</div><div class='add'>+		/* Configure register endianess access */</div><div class='add'>+		dev-&gt;accessor_flags |= ACCESS_SWAP;</div><div class='add'>+	} else if (reg == (DW_IC_COMP_TYPE_VALUE &amp; 0x0000ffff)) {</div><div class='add'>+		/* Configure register access mode 16bit */</div><div class='add'>+		dev-&gt;accessor_flags |= ACCESS_16BIT;</div><div class='add'>+	} else if (reg != DW_IC_COMP_TYPE_VALUE) {</div><div class='ctx'> 		dev_err(dev-&gt;dev, "Unknown Synopsys component type: "</div><div class='ctx'> 			"0x%08x\n", reg);</div><div class='ctx'> 		return -ENODEV;</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h<br/>index 02d1a2ddd853..9c1840ee09c7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-designware-core.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-designware-core.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-designware-core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-designware-core.h</a></div><div class='hunk'>@@ -82,7 +82,7 @@ struct dw_i2c_dev {</div><div class='ctx'> 	unsigned int		status;</div><div class='ctx'> 	u32			abort_source;</div><div class='ctx'> 	int			irq;</div><div class='del'>-	int			swab;</div><div class='add'>+	u32			accessor_flags;</div><div class='ctx'> 	struct i2c_adapter	adapter;</div><div class='ctx'> 	u32			functionality;</div><div class='ctx'> 	u32			master_cfg;</div><div class='hunk'>@@ -90,6 +90,9 @@ struct dw_i2c_dev {</div><div class='ctx'> 	unsigned int		rx_fifo_depth;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define ACCESS_SWAP		0x00000001</div><div class='add'>+#define ACCESS_16BIT		0x00000002</div><div class='add'>+</div><div class='ctx'> extern u32 dw_readl(struct dw_i2c_dev *dev, int offset);</div><div class='ctx'> extern void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset);</div><div class='ctx'> extern int i2c_dw_init(struct dw_i2c_dev *dev);</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c<br/>index 4ba589ab8614..0506fef8dc00 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-designware-platdrv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-designware-platdrv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-designware-platdrv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-designware-platdrv.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/of_i2c.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include "i2c-designware-core.h"</div><div class='hunk'>@@ -95,7 +96,7 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev)</div><div class='ctx'> 		r = -ENODEV;</div><div class='ctx'> 		goto err_free_mem;</div><div class='ctx'> 	}</div><div class='del'>-	clk_enable(dev-&gt;clk);</div><div class='add'>+	clk_prepare_enable(dev-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;functionality =</div><div class='ctx'> 		I2C_FUNC_I2C |</div><div class='hunk'>@@ -155,7 +156,7 @@ err_free_irq:</div><div class='ctx'> err_iounmap:</div><div class='ctx'> 	iounmap(dev-&gt;base);</div><div class='ctx'> err_unuse_clocks:</div><div class='del'>-	clk_disable(dev-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(dev-&gt;clk);</div><div class='ctx'> 	clk_put(dev-&gt;clk);</div><div class='ctx'> 	dev-&gt;clk = NULL;</div><div class='ctx'> err_free_mem:</div><div class='hunk'>@@ -177,7 +178,7 @@ static int __devexit dw_i2c_remove(struct platform_device *pdev)</div><div class='ctx'> 	i2c_del_adapter(&amp;dev-&gt;adapter);</div><div class='ctx'> 	put_device(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	clk_disable(dev-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(dev-&gt;clk);</div><div class='ctx'> 	clk_put(dev-&gt;clk);</div><div class='ctx'> 	dev-&gt;clk = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -198,6 +199,31 @@ static const struct of_device_id dw_i2c_of_match[] = {</div><div class='ctx'> MODULE_DEVICE_TABLE(of, dw_i2c_of_match);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+static int dw_i2c_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev);</div><div class='add'>+	struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(i_dev-&gt;clk);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dw_i2c_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev);</div><div class='add'>+	struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	clk_prepare_enable(i_dev-&gt;clk);</div><div class='add'>+	i2c_dw_init(i_dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(dw_i2c_dev_pm_ops, dw_i2c_suspend, dw_i2c_resume);</div><div class='add'>+</div><div class='ctx'> /* work with hotplug and coldplug */</div><div class='ctx'> MODULE_ALIAS("platform:i2c_designware");</div><div class='ctx'> </div><div class='hunk'>@@ -207,6 +233,7 @@ static struct platform_driver dw_i2c_driver = {</div><div class='ctx'> 		.name	= "i2c_designware",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 		.of_match_table = of_match_ptr(dw_i2c_of_match),</div><div class='add'>+		.pm	= &amp;dw_i2c_dev_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c<br/>index f086131cb1c7..2f74ae872e1e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-eg20t.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-eg20t.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-eg20t.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-eg20t.c</a></div><div class='hunk'>@@ -263,11 +263,6 @@ static void pch_i2c_init(struct i2c_algo_pch_data *adap)</div><div class='ctx'> 	init_waitqueue_head(&amp;pch_event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool ktime_lt(const ktime_t cmp1, const ktime_t cmp2)</div><div class='del'>-{</div><div class='del'>-	return cmp1.tv64 &lt; cmp2.tv64;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * pch_i2c_wait_for_bus_idle() - check the status of bus.</div><div class='ctx'>  * @adap:	Pointer to struct i2c_algo_pch_data.</div><div class='hunk'>@@ -317,33 +312,6 @@ static void pch_i2c_start(struct i2c_algo_pch_data *adap)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * pch_i2c_wait_for_xfer_complete() - initiates a wait for the tx complete event</div><div class='del'>- * @adap:	Pointer to struct i2c_algo_pch_data.</div><div class='del'>- */</div><div class='del'>-static s32 pch_i2c_wait_for_xfer_complete(struct i2c_algo_pch_data *adap)</div><div class='del'>-{</div><div class='del'>-	long ret;</div><div class='del'>-	ret = wait_event_timeout(pch_event,</div><div class='del'>-			(adap-&gt;pch_event_flag != 0), msecs_to_jiffies(50));</div><div class='del'>-</div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		pch_err(adap, "timeout: %x\n", adap-&gt;pch_event_flag);</div><div class='del'>-		adap-&gt;pch_event_flag = 0;</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (adap-&gt;pch_event_flag &amp; I2C_ERROR_MASK) {</div><div class='del'>-		pch_err(adap, "error bits set: %x\n", adap-&gt;pch_event_flag);</div><div class='del'>-		adap-&gt;pch_event_flag = 0;</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	adap-&gt;pch_event_flag = 0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * pch_i2c_getack() - to confirm ACK/NACK</div><div class='ctx'>  * @adap:	Pointer to struct i2c_algo_pch_data.</div><div class='ctx'>  */</div><div class='hunk'>@@ -373,6 +341,40 @@ static void pch_i2c_stop(struct i2c_algo_pch_data *adap)</div><div class='ctx'> 	pch_clrbit(adap-&gt;pch_base_address, PCH_I2CCTL, PCH_START);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int pch_i2c_wait_for_check_xfer(struct i2c_algo_pch_data *adap)</div><div class='add'>+{</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	ret = wait_event_timeout(pch_event,</div><div class='add'>+			(adap-&gt;pch_event_flag != 0), msecs_to_jiffies(1000));</div><div class='add'>+	if (!ret) {</div><div class='add'>+		pch_err(adap, "%s:wait-event timeout\n", __func__);</div><div class='add'>+		adap-&gt;pch_event_flag = 0;</div><div class='add'>+		pch_i2c_stop(adap);</div><div class='add'>+		pch_i2c_init(adap);</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (adap-&gt;pch_event_flag &amp; I2C_ERROR_MASK) {</div><div class='add'>+		pch_err(adap, "Lost Arbitration\n");</div><div class='add'>+		adap-&gt;pch_event_flag = 0;</div><div class='add'>+		pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR, I2CMAL_BIT);</div><div class='add'>+		pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR, I2CMIF_BIT);</div><div class='add'>+		pch_i2c_init(adap);</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adap-&gt;pch_event_flag = 0;</div><div class='add'>+</div><div class='add'>+	if (pch_i2c_getack(adap)) {</div><div class='add'>+		pch_dbg(adap, "Receive NACK for slave address"</div><div class='add'>+			"setting\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * pch_i2c_repstart() - generate repeated start condition in normal mode</div><div class='ctx'>  * @adap:	Pointer to struct i2c_algo_pch_data.</div><div class='hunk'>@@ -427,27 +429,12 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,</div><div class='ctx'> 		if (first)</div><div class='ctx'> 			pch_i2c_start(adap);</div><div class='ctx'> </div><div class='del'>-		rtn = pch_i2c_wait_for_xfer_complete(adap);</div><div class='del'>-		if (rtn == 0) {</div><div class='del'>-			if (pch_i2c_getack(adap)) {</div><div class='del'>-				pch_dbg(adap, "Receive NACK for slave address"</div><div class='del'>-					"setting\n");</div><div class='del'>-				return -EIO;</div><div class='del'>-			}</div><div class='del'>-			addr_8_lsb = (addr &amp; I2C_ADDR_MSK);</div><div class='del'>-			iowrite32(addr_8_lsb, p + PCH_I2CDR);</div><div class='del'>-		} else if (rtn == -EIO) { /* Arbitration Lost */</div><div class='del'>-			pch_err(adap, "Lost Arbitration\n");</div><div class='del'>-			pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR,</div><div class='del'>-				   I2CMAL_BIT);</div><div class='del'>-			pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR,</div><div class='del'>-				   I2CMIF_BIT);</div><div class='del'>-			pch_i2c_init(adap);</div><div class='del'>-			return -EAGAIN;</div><div class='del'>-		} else { /* wait-event timeout */</div><div class='del'>-			pch_i2c_stop(adap);</div><div class='del'>-			return -ETIME;</div><div class='del'>-		}</div><div class='add'>+		rtn = pch_i2c_wait_for_check_xfer(adap);</div><div class='add'>+		if (rtn)</div><div class='add'>+			return rtn;</div><div class='add'>+</div><div class='add'>+		addr_8_lsb = (addr &amp; I2C_ADDR_MSK);</div><div class='add'>+		iowrite32(addr_8_lsb, p + PCH_I2CDR);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* set 7 bit slave address and R/W bit as 0 */</div><div class='ctx'> 		iowrite32(addr &lt;&lt; 1, p + PCH_I2CDR);</div><div class='hunk'>@@ -455,44 +442,21 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,</div><div class='ctx'> 			pch_i2c_start(adap);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rtn = pch_i2c_wait_for_xfer_complete(adap);</div><div class='del'>-	if (rtn == 0) {</div><div class='del'>-		if (pch_i2c_getack(adap)) {</div><div class='del'>-			pch_dbg(adap, "Receive NACK for slave address"</div><div class='del'>-				"setting\n");</div><div class='del'>-			return -EIO;</div><div class='del'>-		}</div><div class='del'>-	} else if (rtn == -EIO) { /* Arbitration Lost */</div><div class='del'>-		pch_err(adap, "Lost Arbitration\n");</div><div class='del'>-		pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR, I2CMAL_BIT);</div><div class='del'>-		pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR, I2CMIF_BIT);</div><div class='del'>-		pch_i2c_init(adap);</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	} else { /* wait-event timeout */</div><div class='del'>-		pch_i2c_stop(adap);</div><div class='del'>-		return -ETIME;</div><div class='del'>-	}</div><div class='add'>+	rtn = pch_i2c_wait_for_check_xfer(adap);</div><div class='add'>+	if (rtn)</div><div class='add'>+		return rtn;</div><div class='ctx'> </div><div class='ctx'> 	for (wrcount = 0; wrcount &lt; length; ++wrcount) {</div><div class='ctx'> 		/* write buffer value to I2C data register */</div><div class='ctx'> 		iowrite32(buf[wrcount], p + PCH_I2CDR);</div><div class='ctx'> 		pch_dbg(adap, "writing %x to Data register\n", buf[wrcount]);</div><div class='ctx'> </div><div class='del'>-		rtn = pch_i2c_wait_for_xfer_complete(adap);</div><div class='del'>-		if (rtn == 0) {</div><div class='del'>-			if (pch_i2c_getack(adap)) {</div><div class='del'>-				pch_dbg(adap, "Receive NACK for slave address"</div><div class='del'>-					"setting\n");</div><div class='del'>-				return -EIO;</div><div class='del'>-			}</div><div class='del'>-			pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR,</div><div class='del'>-				   I2CMCF_BIT);</div><div class='del'>-			pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR,</div><div class='del'>-				   I2CMIF_BIT);</div><div class='del'>-		} else { /* wait-event timeout */</div><div class='del'>-			pch_i2c_stop(adap);</div><div class='del'>-			return -ETIME;</div><div class='del'>-		}</div><div class='add'>+		rtn = pch_i2c_wait_for_check_xfer(adap);</div><div class='add'>+		if (rtn)</div><div class='add'>+			return rtn;</div><div class='add'>+</div><div class='add'>+		pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR, I2CMCF_BIT);</div><div class='add'>+		pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR, I2CMIF_BIT);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* check if this is the last message */</div><div class='hunk'>@@ -580,50 +544,21 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,</div><div class='ctx'> 		if (first)</div><div class='ctx'> 			pch_i2c_start(adap);</div><div class='ctx'> </div><div class='del'>-		rtn = pch_i2c_wait_for_xfer_complete(adap);</div><div class='del'>-		if (rtn == 0) {</div><div class='del'>-			if (pch_i2c_getack(adap)) {</div><div class='del'>-				pch_dbg(adap, "Receive NACK for slave address"</div><div class='del'>-					"setting\n");</div><div class='del'>-				return -EIO;</div><div class='del'>-			}</div><div class='del'>-			addr_8_lsb = (addr &amp; I2C_ADDR_MSK);</div><div class='del'>-			iowrite32(addr_8_lsb, p + PCH_I2CDR);</div><div class='del'>-		} else if (rtn == -EIO) { /* Arbitration Lost */</div><div class='del'>-			pch_err(adap, "Lost Arbitration\n");</div><div class='del'>-			pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR,</div><div class='del'>-				   I2CMAL_BIT);</div><div class='del'>-			pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR,</div><div class='del'>-				   I2CMIF_BIT);</div><div class='del'>-			pch_i2c_init(adap);</div><div class='del'>-			return -EAGAIN;</div><div class='del'>-		} else { /* wait-event timeout */</div><div class='del'>-			pch_i2c_stop(adap);</div><div class='del'>-			return -ETIME;</div><div class='del'>-		}</div><div class='add'>+		rtn = pch_i2c_wait_for_check_xfer(adap);</div><div class='add'>+		if (rtn)</div><div class='add'>+			return rtn;</div><div class='add'>+</div><div class='add'>+		addr_8_lsb = (addr &amp; I2C_ADDR_MSK);</div><div class='add'>+		iowrite32(addr_8_lsb, p + PCH_I2CDR);</div><div class='add'>+</div><div class='ctx'> 		pch_i2c_restart(adap);</div><div class='del'>-		rtn = pch_i2c_wait_for_xfer_complete(adap);</div><div class='del'>-		if (rtn == 0) {</div><div class='del'>-			if (pch_i2c_getack(adap)) {</div><div class='del'>-				pch_dbg(adap, "Receive NACK for slave address"</div><div class='del'>-					"setting\n");</div><div class='del'>-				return -EIO;</div><div class='del'>-			}</div><div class='del'>-			addr_2_msb |= I2C_RD;</div><div class='del'>-			iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK,</div><div class='del'>-				  p + PCH_I2CDR);</div><div class='del'>-		} else if (rtn == -EIO) { /* Arbitration Lost */</div><div class='del'>-			pch_err(adap, "Lost Arbitration\n");</div><div class='del'>-			pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR,</div><div class='del'>-				   I2CMAL_BIT);</div><div class='del'>-			pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR,</div><div class='del'>-				   I2CMIF_BIT);</div><div class='del'>-			pch_i2c_init(adap);</div><div class='del'>-			return -EAGAIN;</div><div class='del'>-		} else { /* wait-event timeout */</div><div class='del'>-			pch_i2c_stop(adap);</div><div class='del'>-			return -ETIME;</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+		rtn = pch_i2c_wait_for_check_xfer(adap);</div><div class='add'>+		if (rtn)</div><div class='add'>+			return rtn;</div><div class='add'>+</div><div class='add'>+		addr_2_msb |= I2C_RD;</div><div class='add'>+		iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* 7 address bits + R/W bit */</div><div class='ctx'> 		addr = (((addr) &lt;&lt; 1) | (I2C_RD));</div><div class='hunk'>@@ -634,23 +569,9 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,</div><div class='ctx'> 	if (first)</div><div class='ctx'> 		pch_i2c_start(adap);</div><div class='ctx'> </div><div class='del'>-	rtn = pch_i2c_wait_for_xfer_complete(adap);</div><div class='del'>-	if (rtn == 0) {</div><div class='del'>-		if (pch_i2c_getack(adap)) {</div><div class='del'>-			pch_dbg(adap, "Receive NACK for slave address"</div><div class='del'>-				"setting\n");</div><div class='del'>-			return -EIO;</div><div class='del'>-		}</div><div class='del'>-	} else if (rtn == -EIO) { /* Arbitration Lost */</div><div class='del'>-		pch_err(adap, "Lost Arbitration\n");</div><div class='del'>-		pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR, I2CMAL_BIT);</div><div class='del'>-		pch_clrbit(adap-&gt;pch_base_address, PCH_I2CSR, I2CMIF_BIT);</div><div class='del'>-		pch_i2c_init(adap);</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	} else { /* wait-event timeout */</div><div class='del'>-		pch_i2c_stop(adap);</div><div class='del'>-		return -ETIME;</div><div class='del'>-	}</div><div class='add'>+	rtn = pch_i2c_wait_for_check_xfer(adap);</div><div class='add'>+	if (rtn)</div><div class='add'>+		return rtn;</div><div class='ctx'> </div><div class='ctx'> 	if (length == 0) {</div><div class='ctx'> 		pch_i2c_stop(adap);</div><div class='hunk'>@@ -669,18 +590,9 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,</div><div class='ctx'> 			if (loop != 1)</div><div class='ctx'> 				read_index++;</div><div class='ctx'> </div><div class='del'>-			rtn = pch_i2c_wait_for_xfer_complete(adap);</div><div class='del'>-			if (rtn == 0) {</div><div class='del'>-				if (pch_i2c_getack(adap)) {</div><div class='del'>-					pch_dbg(adap, "Receive NACK for slave"</div><div class='del'>-						"address setting\n");</div><div class='del'>-					return -EIO;</div><div class='del'>-				}</div><div class='del'>-			} else { /* wait-event timeout */</div><div class='del'>-				pch_i2c_stop(adap);</div><div class='del'>-				return -ETIME;</div><div class='del'>-			}</div><div class='del'>-</div><div class='add'>+			rtn = pch_i2c_wait_for_check_xfer(adap);</div><div class='add'>+			if (rtn)</div><div class='add'>+				return rtn;</div><div class='ctx'> 		}	/* end for */</div><div class='ctx'> </div><div class='ctx'> 		pch_i2c_sendnack(adap);</div><div class='hunk'>@@ -690,17 +602,9 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,</div><div class='ctx'> 		if (length != 1)</div><div class='ctx'> 			read_index++;</div><div class='ctx'> </div><div class='del'>-		rtn = pch_i2c_wait_for_xfer_complete(adap);</div><div class='del'>-		if (rtn == 0) {</div><div class='del'>-			if (pch_i2c_getack(adap)) {</div><div class='del'>-				pch_dbg(adap, "Receive NACK for slave"</div><div class='del'>-					"address setting\n");</div><div class='del'>-				return -EIO;</div><div class='del'>-			}</div><div class='del'>-		} else { /* wait-event timeout */</div><div class='del'>-			pch_i2c_stop(adap);</div><div class='del'>-			return -ETIME;</div><div class='del'>-		}</div><div class='add'>+		rtn = pch_i2c_wait_for_check_xfer(adap);</div><div class='add'>+		if (rtn)</div><div class='add'>+			return rtn;</div><div class='ctx'> </div><div class='ctx'> 		if (last)</div><div class='ctx'> 			pch_i2c_stop(adap);</div><div class='hunk'>@@ -790,7 +694,7 @@ static s32 pch_i2c_xfer(struct i2c_adapter *i2c_adap,</div><div class='ctx'> </div><div class='ctx'> 	ret = mutex_lock_interruptible(&amp;pch_mutex);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return -ERESTARTSYS;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (adap-&gt;p_adapter_info-&gt;pch_i2c_suspended) {</div><div class='ctx'> 		mutex_unlock(&amp;pch_mutex);</div><div class='hunk'>@@ -909,7 +813,7 @@ static int __devinit pch_i2c_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 		pch_adap-&gt;owner = THIS_MODULE;</div><div class='ctx'> 		pch_adap-&gt;class = I2C_CLASS_HWMON;</div><div class='del'>-		strcpy(pch_adap-&gt;name, KBUILD_MODNAME);</div><div class='add'>+		strlcpy(pch_adap-&gt;name, KBUILD_MODNAME, sizeof(pch_adap-&gt;name));</div><div class='ctx'> 		pch_adap-&gt;algo = &amp;pch_algorithm;</div><div class='ctx'> 		pch_adap-&gt;algo_data = &amp;adap_info-&gt;pch_data[i];</div><div class='ctx'> </div><div class='hunk'>@@ -963,7 +867,7 @@ static void __devexit pch_i2c_remove(struct pci_dev *pdev)</div><div class='ctx'> 		pci_iounmap(pdev, adap_info-&gt;pch_data[0].pch_base_address);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adap_info-&gt;ch_num; i++)</div><div class='del'>-		adap_info-&gt;pch_data[i].pch_base_address = 0;</div><div class='add'>+		adap_info-&gt;pch_data[i].pch_base_address = NULL;</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='hunk'>@@ -1063,6 +967,6 @@ module_exit(pch_pci_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Intel EG20T PCH/LAPIS Semico ML7213/ML7223/ML7831 IOH I2C");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Tomoya MORINAGA. &lt;tomoya-linux@dsn.lapis-semi.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Tomoya MORINAGA. &lt;tomoya.rohm@gmail.com&gt;");</div><div class='ctx'> module_param(pch_i2c_speed, int, (S_IRUSR | S_IWUSR));</div><div class='ctx'> module_param(pch_clk, int, (S_IRUSR | S_IWUSR));</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c<br/>index c0330a41db03..e62d2d938628 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-gpio.c</a></div><div class='hunk'>@@ -190,12 +190,7 @@ static int __devinit i2c_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	adap-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='ctx'> 	adap-&gt;dev.of_node = pdev-&gt;dev.of_node;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If "dev-&gt;id" is negative we consider it as zero.</div><div class='del'>-	 * The reason to do so is to avoid sysfs names that only make</div><div class='del'>-	 * sense when there are multiple adapters.</div><div class='del'>-	 */</div><div class='del'>-	adap-&gt;nr = (pdev-&gt;id != -1) ? pdev-&gt;id : 0;</div><div class='add'>+	adap-&gt;nr = pdev-&gt;id;</div><div class='ctx'> 	ret = i2c_bit_add_numbered_bus(adap);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_add_bus;</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c<br/>index dfb84b7ee550..8d6b504d65c4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-imx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-imx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-imx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-imx.c</a></div><div class='hunk'>@@ -51,6 +51,7 @@</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_device.h&gt;</div><div class='ctx'> #include &lt;linux/of_i2c.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/irqs.h&gt;</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='hunk'>@@ -470,6 +471,7 @@ static int __init i2c_imx_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct imx_i2c_struct *i2c_imx;</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	struct imxi2c_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> 	resource_size_t res_size;</div><div class='ctx'> 	int irq, bitrate;</div><div class='hunk'>@@ -510,7 +512,7 @@ static int __init i2c_imx_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Setup i2c_imx driver structure */</div><div class='del'>-	strcpy(i2c_imx-&gt;adapter.name, pdev-&gt;name);</div><div class='add'>+	strlcpy(i2c_imx-&gt;adapter.name, pdev-&gt;name, sizeof(i2c_imx-&gt;adapter.name));</div><div class='ctx'> 	i2c_imx-&gt;adapter.owner		= THIS_MODULE;</div><div class='ctx'> 	i2c_imx-&gt;adapter.algo		= &amp;i2c_imx_algo;</div><div class='ctx'> 	i2c_imx-&gt;adapter.dev.parent	= &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -520,6 +522,12 @@ static int __init i2c_imx_probe(struct platform_device *pdev)</div><div class='ctx'> 	i2c_imx-&gt;base			= base;</div><div class='ctx'> 	i2c_imx-&gt;res			= res;</div><div class='ctx'> </div><div class='add'>+	pinctrl = devm_pinctrl_get_select_default(&amp;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(pinctrl)) {</div><div class='add'>+		ret = PTR_ERR(pinctrl);</div><div class='add'>+		goto fail3;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Get I2C clock */</div><div class='ctx'> 	i2c_imx-&gt;clk = clk_get(&amp;pdev-&gt;dev, "i2c_clk");</div><div class='ctx'> 	if (IS_ERR(i2c_imx-&gt;clk)) {</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-ixp2000.c b/drivers/i2c/busses/i2c-ixp2000.c<br/>deleted file mode 100644<br/>index 5d263f9014d6..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-ixp2000.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-ixp2000.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,157 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * drivers/i2c/busses/i2c-ixp2000.c</div><div class='del'>- *</div><div class='del'>- * I2C adapter for IXP2000 systems using GPIOs for I2C bus</div><div class='del'>- *</div><div class='del'>- * Author: Deepak Saxena &lt;dsaxena@plexity.net&gt;</div><div class='del'>- * Based on IXDP2400 code by: Naeem M. Afzal &lt;naeem.m.afzal@intel.com&gt;</div><div class='del'>- * Made generic by: Jeff Daly &lt;jeffrey.daly@intel.com&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2003-2004 MontaVista Software Inc.</div><div class='del'>- *</div><div class='del'>- * This file is licensed under  the terms of the GNU General Public </div><div class='del'>- * License version 2. This program is licensed "as is" without any </div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- *</div><div class='del'>- * From Jeff Daly:</div><div class='del'>- *</div><div class='del'>- * I2C adapter driver for Intel IXDP2xxx platforms. This should work for any</div><div class='del'>- * IXP2000 platform if it uses the HW GPIO in the same manner.  Basically, </div><div class='del'>- * SDA and SCL GPIOs have external pullups.  Setting the respective GPIO to </div><div class='del'>- * an input will make the signal a '1' via the pullup.  Setting them to </div><div class='del'>- * outputs will pull them down. </div><div class='del'>- *</div><div class='del'>- * The GPIOs are open drain signals and are used as configuration strap inputs</div><div class='del'>- * during power-up so there's generally a buffer on the board that needs to be </div><div class='del'>- * 'enabled' to drive the GPIOs.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/i2c.h&gt;</div><div class='del'>-#include &lt;linux/i2c-algo-bit.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/hardware.h&gt;	/* Pick up IXP2000-specific bits */</div><div class='del'>-#include &lt;mach/gpio-ixp2000.h&gt;</div><div class='del'>-</div><div class='del'>-static inline int ixp2000_scl_pin(void *data)</div><div class='del'>-{</div><div class='del'>-	return ((struct ixp2000_i2c_pins*)data)-&gt;scl_pin;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int ixp2000_sda_pin(void *data)</div><div class='del'>-{</div><div class='del'>-	return ((struct ixp2000_i2c_pins*)data)-&gt;sda_pin;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void ixp2000_bit_setscl(void *data, int val)</div><div class='del'>-{</div><div class='del'>-	int i = 5000;</div><div class='del'>-</div><div class='del'>-	if (val) {</div><div class='del'>-		gpio_line_config(ixp2000_scl_pin(data), GPIO_IN);</div><div class='del'>-		while(!gpio_line_get(ixp2000_scl_pin(data)) &amp;&amp; i--);</div><div class='del'>-	} else {</div><div class='del'>-		gpio_line_config(ixp2000_scl_pin(data), GPIO_OUT);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp2000_bit_setsda(void *data, int val)</div><div class='del'>-{</div><div class='del'>-	if (val) {</div><div class='del'>-		gpio_line_config(ixp2000_sda_pin(data), GPIO_IN);</div><div class='del'>-	} else {</div><div class='del'>-		gpio_line_config(ixp2000_sda_pin(data), GPIO_OUT);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ixp2000_bit_getscl(void *data)</div><div class='del'>-{</div><div class='del'>-	return gpio_line_get(ixp2000_scl_pin(data));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ixp2000_bit_getsda(void *data)</div><div class='del'>-{</div><div class='del'>-	return gpio_line_get(ixp2000_sda_pin(data));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct ixp2000_i2c_data {</div><div class='del'>-	struct ixp2000_i2c_pins *gpio_pins;</div><div class='del'>-	struct i2c_adapter adapter;</div><div class='del'>-	struct i2c_algo_bit_data algo_data;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int ixp2000_i2c_remove(struct platform_device *plat_dev)</div><div class='del'>-{</div><div class='del'>-	struct ixp2000_i2c_data *drv_data = platform_get_drvdata(plat_dev);</div><div class='del'>-</div><div class='del'>-	platform_set_drvdata(plat_dev, NULL);</div><div class='del'>-</div><div class='del'>-	i2c_del_adapter(&amp;drv_data-&gt;adapter);</div><div class='del'>-</div><div class='del'>-	kfree(drv_data);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ixp2000_i2c_probe(struct platform_device *plat_dev)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	struct ixp2000_i2c_pins *gpio = plat_dev-&gt;dev.platform_data;</div><div class='del'>-	struct ixp2000_i2c_data *drv_data = </div><div class='del'>-		kzalloc(sizeof(struct ixp2000_i2c_data), GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-	if (!drv_data)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	drv_data-&gt;gpio_pins = gpio;</div><div class='del'>-</div><div class='del'>-	drv_data-&gt;algo_data.data = gpio;</div><div class='del'>-	drv_data-&gt;algo_data.setsda = ixp2000_bit_setsda;</div><div class='del'>-	drv_data-&gt;algo_data.setscl = ixp2000_bit_setscl;</div><div class='del'>-	drv_data-&gt;algo_data.getsda = ixp2000_bit_getsda;</div><div class='del'>-	drv_data-&gt;algo_data.getscl = ixp2000_bit_getscl;</div><div class='del'>-	drv_data-&gt;algo_data.udelay = 6;</div><div class='del'>-	drv_data-&gt;algo_data.timeout = HZ;</div><div class='del'>-</div><div class='del'>-	strlcpy(drv_data-&gt;adapter.name, plat_dev-&gt;dev.driver-&gt;name,</div><div class='del'>-		sizeof(drv_data-&gt;adapter.name));</div><div class='del'>-	drv_data-&gt;adapter.algo_data = &amp;drv_data-&gt;algo_data,</div><div class='del'>-</div><div class='del'>-	drv_data-&gt;adapter.dev.parent = &amp;plat_dev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	gpio_line_config(gpio-&gt;sda_pin, GPIO_IN);</div><div class='del'>-	gpio_line_config(gpio-&gt;scl_pin, GPIO_IN);</div><div class='del'>-	gpio_line_set(gpio-&gt;scl_pin, 0);</div><div class='del'>-	gpio_line_set(gpio-&gt;sda_pin, 0);</div><div class='del'>-</div><div class='del'>-	if ((err = i2c_bit_add_bus(&amp;drv_data-&gt;adapter)) != 0) {</div><div class='del'>-		dev_err(&amp;plat_dev-&gt;dev, "Could not install, error %d\n", err);</div><div class='del'>-		kfree(drv_data);</div><div class='del'>-		return err;</div><div class='del'>-	} </div><div class='del'>-</div><div class='del'>-	platform_set_drvdata(plat_dev, drv_data);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_driver ixp2000_i2c_driver = {</div><div class='del'>-	.probe		= ixp2000_i2c_probe,</div><div class='del'>-	.remove		= ixp2000_i2c_remove,</div><div class='del'>-	.driver		= {</div><div class='del'>-		.name	= "IXP2000-I2C",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-module_platform_driver(ixp2000_i2c_driver);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR ("Deepak Saxena &lt;dsaxena@plexity.net&gt;");</div><div class='del'>-MODULE_DESCRIPTION("IXP2000 GPIO-based I2C bus driver");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_ALIAS("platform:IXP2000-I2C");</div><div class='del'>-</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c<br/>index 206caacd30d7..b76731edbf10 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-mpc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-mpc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-mpc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-mpc.c</a></div><div class='hunk'>@@ -64,6 +64,9 @@ struct mpc_i2c {</div><div class='ctx'> 	struct i2c_adapter adap;</div><div class='ctx'> 	int irq;</div><div class='ctx'> 	u32 real_clk;</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+	u8 fdr, dfsrr;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mpc_i2c_divider {</div><div class='hunk'>@@ -703,6 +706,30 @@ static int __devexit fsl_i2c_remove(struct platform_device *op)</div><div class='ctx'> 	return 0;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+static int mpc_i2c_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mpc_i2c *i2c = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	i2c-&gt;fdr = readb(i2c-&gt;base + MPC_I2C_FDR);</div><div class='add'>+	i2c-&gt;dfsrr = readb(i2c-&gt;base + MPC_I2C_DFSRR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mpc_i2c_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mpc_i2c *i2c = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	writeb(i2c-&gt;fdr, i2c-&gt;base + MPC_I2C_FDR);</div><div class='add'>+	writeb(i2c-&gt;dfsrr, i2c-&gt;base + MPC_I2C_DFSRR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+SIMPLE_DEV_PM_OPS(mpc_i2c_pm_ops, mpc_i2c_suspend, mpc_i2c_resume);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct mpc_i2c_data mpc_i2c_data_512x __devinitdata = {</div><div class='ctx'> 	.setup = mpc_i2c_setup_512x,</div><div class='ctx'> };</div><div class='hunk'>@@ -747,6 +774,9 @@ static struct platform_driver mpc_i2c_driver = {</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 		.name = DRV_NAME,</div><div class='ctx'> 		.of_match_table = mpc_i2c_of_match,</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+		.pm = &amp;mpc_i2c_pm_ops,</div><div class='add'>+#endif</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c<br/>index 3d471d56bf15..04eb441b6ce1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-mxs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-mxs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-mxs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-mxs.c</a></div><div class='hunk'>@@ -26,8 +26,11 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='add'>+#include &lt;linux/stmp_device.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of_i2c.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DRIVER_NAME "mxs-i2c"</div><div class='ctx'> </div><div class='hunk'>@@ -111,13 +114,9 @@ struct mxs_i2c_dev {</div><div class='ctx'> 	struct i2c_adapter adapter;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * TODO: check if calls to here are really needed. If not, we could get rid of</div><div class='del'>- * mxs_reset_block and the mach-dependency. Needs an I2C analyzer, probably.</div><div class='del'>- */</div><div class='ctx'> static void mxs_i2c_reset(struct mxs_i2c_dev *i2c)</div><div class='ctx'> {</div><div class='del'>-	mxs_reset_block(i2c-&gt;regs);</div><div class='add'>+	stmp_reset_block(i2c-&gt;regs);</div><div class='ctx'> 	writel(MXS_I2C_IRQ_MASK &lt;&lt; 8, i2c-&gt;regs + MXS_I2C_CTRL1_SET);</div><div class='ctx'> 	writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE,</div><div class='ctx'> 			i2c-&gt;regs + MXS_I2C_QUEUECTRL_SET);</div><div class='hunk'>@@ -227,6 +226,7 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	init_completion(&amp;i2c-&gt;cmd_complete);</div><div class='add'>+	i2c-&gt;cmd_err = 0;</div><div class='ctx'> </div><div class='ctx'> 	flags = stop ? MXS_I2C_CTRL0_POST_SEND_STOP : 0;</div><div class='ctx'> </div><div class='hunk'>@@ -252,6 +252,9 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg,</div><div class='ctx'> </div><div class='ctx'> 	if (i2c-&gt;cmd_err == -ENXIO)</div><div class='ctx'> 		mxs_i2c_reset(i2c);</div><div class='add'>+	else</div><div class='add'>+		writel(MXS_I2C_QUEUECTRL_QUEUE_RUN,</div><div class='add'>+				i2c-&gt;regs + MXS_I2C_QUEUECTRL_CLR);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(i2c-&gt;dev, "Done with err=%d\n", i2c-&gt;cmd_err);</div><div class='ctx'> </div><div class='hunk'>@@ -299,8 +302,6 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)</div><div class='ctx'> 		    MXS_I2C_CTRL1_SLAVE_STOP_IRQ | MXS_I2C_CTRL1_SLAVE_IRQ))</div><div class='ctx'> 		/* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */</div><div class='ctx'> 		i2c-&gt;cmd_err = -EIO;</div><div class='del'>-	else</div><div class='del'>-		i2c-&gt;cmd_err = 0;</div><div class='ctx'> </div><div class='ctx'> 	is_last_cmd = (readl(i2c-&gt;regs + MXS_I2C_QUEUESTAT) &amp;</div><div class='ctx'> 		MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK) == 0;</div><div class='hunk'>@@ -323,10 +324,15 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	struct mxs_i2c_dev *i2c;</div><div class='ctx'> 	struct i2c_adapter *adap;</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	resource_size_t res_size;</div><div class='ctx'> 	int err, irq;</div><div class='ctx'> </div><div class='add'>+	pinctrl = devm_pinctrl_get_select_default(dev);</div><div class='add'>+	if (IS_ERR(pinctrl))</div><div class='add'>+		return PTR_ERR(pinctrl);</div><div class='add'>+</div><div class='ctx'> 	i2c = devm_kzalloc(dev, sizeof(struct mxs_i2c_dev), GFP_KERNEL);</div><div class='ctx'> 	if (!i2c)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -363,6 +369,7 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev)</div><div class='ctx'> 	adap-&gt;algo = &amp;mxs_i2c_algo;</div><div class='ctx'> 	adap-&gt;dev.parent = dev;</div><div class='ctx'> 	adap-&gt;nr = pdev-&gt;id;</div><div class='add'>+	adap-&gt;dev.of_node = pdev-&gt;dev.of_node;</div><div class='ctx'> 	i2c_set_adapdata(adap, i2c);</div><div class='ctx'> 	err = i2c_add_numbered_adapter(adap);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -372,6 +379,8 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	of_i2c_register_devices(adap);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -384,8 +393,6 @@ static int __devexit mxs_i2c_remove(struct platform_device *pdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	writel(MXS_I2C_QUEUECTRL_QUEUE_RUN,</div><div class='del'>-			i2c-&gt;regs + MXS_I2C_QUEUECTRL_CLR);</div><div class='ctx'> 	writel(MXS_I2C_CTRL0_SFTRST, i2c-&gt;regs + MXS_I2C_CTRL0_SET);</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='hunk'>@@ -393,10 +400,17 @@ static int __devexit mxs_i2c_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct of_device_id mxs_i2c_dt_ids[] = {</div><div class='add'>+	{ .compatible = "fsl,imx28-i2c", },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, mxs_i2c_dt_ids);</div><div class='add'>+</div><div class='ctx'> static struct platform_driver mxs_i2c_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		   .name = DRIVER_NAME,</div><div class='ctx'> 		   .owner = THIS_MODULE,</div><div class='add'>+		   .of_match_table = mxs_i2c_dt_ids,</div><div class='ctx'> 		   },</div><div class='ctx'> 	.remove = __devexit_p(mxs_i2c_remove),</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-nuc900.c b/drivers/i2c/busses/i2c-nuc900.c<br/>index 03b615778887..a26dfb8cd586 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-nuc900.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-nuc900.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-nuc900.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-nuc900.c</a></div><div class='hunk'>@@ -502,7 +502,8 @@ static int nuc900_i2c_xfer(struct i2c_adapter *adap,</div><div class='ctx'> /* declare our i2c functionality */</div><div class='ctx'> static u32 nuc900_i2c_func(struct i2c_adapter *adap)</div><div class='ctx'> {</div><div class='del'>-	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;</div><div class='add'>+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_NOSTART |</div><div class='add'>+		I2C_FUNC_PROTOCOL_MANGLING;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* i2c bus registration info */</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c<br/>index 18068dee48f1..75194c579b6d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-ocores.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-ocores.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-ocores.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-ocores.c</a></div><div class='hunk'>@@ -55,6 +55,7 @@</div><div class='ctx'> #include &lt;linux/i2c-ocores.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of_i2c.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct ocores_i2c {</div><div class='ctx'> 	void __iomem *base;</div><div class='hunk'>@@ -343,6 +344,8 @@ static int __devinit ocores_i2c_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (pdata) {</div><div class='ctx'> 		for (i = 0; i &lt; pdata-&gt;num_devices; i++)</div><div class='ctx'> 			i2c_new_device(&amp;i2c-&gt;adap, pdata-&gt;devices + i);</div><div class='add'>+	} else {</div><div class='add'>+		of_i2c_register_devices(&amp;i2c-&gt;adap);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-pca-platform.c b/drivers/i2c/busses/i2c-pca-platform.c<br/>index 2adbf1a8fdea..675878f49f76 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-pca-platform.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-pca-platform.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-pca-platform.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-pca-platform.c</a></div><div class='hunk'>@@ -171,7 +171,7 @@ static int __devinit i2c_pca_pf_probe(struct platform_device *pdev)</div><div class='ctx'> 	i2c-&gt;io_size = resource_size(res);</div><div class='ctx'> 	i2c-&gt;irq = irq;</div><div class='ctx'> </div><div class='del'>-	i2c-&gt;adap.nr = pdev-&gt;id &gt;= 0 ? pdev-&gt;id : 0;</div><div class='add'>+	i2c-&gt;adap.nr = pdev-&gt;id;</div><div class='ctx'> 	i2c-&gt;adap.owner = THIS_MODULE;</div><div class='ctx'> 	snprintf(i2c-&gt;adap.name, sizeof(i2c-&gt;adap.name),</div><div class='ctx'> 		 "PCA9564/PCA9665 at 0x%08lx",</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c<br/>index 04be9f82e14b..99389d2eae51 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-pnx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-pnx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-pnx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-pnx.c</a></div><div class='hunk'>@@ -23,16 +23,61 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/of_i2c.h&gt;</div><div class='add'>+</div><div class='add'>+#define I2C_PNX_TIMEOUT_DEFAULT		10 /* msec */</div><div class='add'>+#define I2C_PNX_SPEED_KHZ_DEFAULT	100</div><div class='add'>+#define I2C_PNX_REGION_SIZE		0x100</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	mstatus_tdi = 0x00000001,</div><div class='add'>+	mstatus_afi = 0x00000002,</div><div class='add'>+	mstatus_nai = 0x00000004,</div><div class='add'>+	mstatus_drmi = 0x00000008,</div><div class='add'>+	mstatus_active = 0x00000020,</div><div class='add'>+	mstatus_scl = 0x00000040,</div><div class='add'>+	mstatus_sda = 0x00000080,</div><div class='add'>+	mstatus_rff = 0x00000100,</div><div class='add'>+	mstatus_rfe = 0x00000200,</div><div class='add'>+	mstatus_tff = 0x00000400,</div><div class='add'>+	mstatus_tfe = 0x00000800,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/i2c.h&gt;</div><div class='add'>+enum {</div><div class='add'>+	mcntrl_tdie = 0x00000001,</div><div class='add'>+	mcntrl_afie = 0x00000002,</div><div class='add'>+	mcntrl_naie = 0x00000004,</div><div class='add'>+	mcntrl_drmie = 0x00000008,</div><div class='add'>+	mcntrl_daie = 0x00000020,</div><div class='add'>+	mcntrl_rffie = 0x00000040,</div><div class='add'>+	mcntrl_tffie = 0x00000080,</div><div class='add'>+	mcntrl_reset = 0x00000100,</div><div class='add'>+	mcntrl_cdbmode = 0x00000400,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-#define I2C_PNX_TIMEOUT		10 /* msec */</div><div class='del'>-#define I2C_PNX_SPEED_KHZ	100</div><div class='del'>-#define I2C_PNX_REGION_SIZE	0x100</div><div class='add'>+enum {</div><div class='add'>+	rw_bit = 1 &lt;&lt; 0,</div><div class='add'>+	start_bit = 1 &lt;&lt; 8,</div><div class='add'>+	stop_bit = 1 &lt;&lt; 9,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)</div><div class='add'>+#define I2C_REG_RX(a)	((a)-&gt;ioaddr)		/* Rx FIFO reg (RO) */</div><div class='add'>+#define I2C_REG_TX(a)	((a)-&gt;ioaddr)		/* Tx FIFO reg (WO) */</div><div class='add'>+#define I2C_REG_STS(a)	((a)-&gt;ioaddr + 0x04)	/* Status reg (RO) */</div><div class='add'>+#define I2C_REG_CTL(a)	((a)-&gt;ioaddr + 0x08)	/* Ctl reg */</div><div class='add'>+#define I2C_REG_CKL(a)	((a)-&gt;ioaddr + 0x0c)	/* Clock divider low */</div><div class='add'>+#define I2C_REG_CKH(a)	((a)-&gt;ioaddr + 0x10)	/* Clock divider high */</div><div class='add'>+#define I2C_REG_ADR(a)	((a)-&gt;ioaddr + 0x14)	/* I2C address */</div><div class='add'>+#define I2C_REG_RFL(a)	((a)-&gt;ioaddr + 0x18)	/* Rx FIFO level (RO) */</div><div class='add'>+#define I2C_REG_TFL(a)	((a)-&gt;ioaddr + 0x1c)	/* Tx FIFO level (RO) */</div><div class='add'>+#define I2C_REG_RXB(a)	((a)-&gt;ioaddr + 0x20)	/* Num of bytes Rx-ed (RO) */</div><div class='add'>+#define I2C_REG_TXB(a)	((a)-&gt;ioaddr + 0x24)	/* Num of bytes Tx-ed (RO) */</div><div class='add'>+#define I2C_REG_TXS(a)	((a)-&gt;ioaddr + 0x28)	/* Tx slave FIFO (RO) */</div><div class='add'>+#define I2C_REG_STFL(a)	((a)-&gt;ioaddr + 0x2c)	/* Tx slave FIFO level (RO) */</div><div class='add'>+</div><div class='add'>+static inline int wait_timeout(struct i2c_pnx_algo_data *data)</div><div class='ctx'> {</div><div class='add'>+	long timeout = data-&gt;timeout;</div><div class='ctx'> 	while (timeout &gt; 0 &amp;&amp;</div><div class='ctx'> 			(ioread32(I2C_REG_STS(data)) &amp; mstatus_active)) {</div><div class='ctx'> 		mdelay(1);</div><div class='hunk'>@@ -41,8 +86,9 @@ static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)</div><div class='ctx'> 	return (timeout &lt;= 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)</div><div class='add'>+static inline int wait_reset(struct i2c_pnx_algo_data *data)</div><div class='ctx'> {</div><div class='add'>+	long timeout = data-&gt;timeout;</div><div class='ctx'> 	while (timeout &gt; 0 &amp;&amp;</div><div class='ctx'> 			(ioread32(I2C_REG_CTL(data)) &amp; mcntrl_reset)) {</div><div class='ctx'> 		mdelay(1);</div><div class='hunk'>@@ -54,7 +100,7 @@ static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)</div><div class='ctx'> static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data)</div><div class='ctx'> {</div><div class='ctx'> 	struct timer_list *timer = &amp;alg_data-&gt;mif.timer;</div><div class='del'>-	unsigned long expires = msecs_to_jiffies(I2C_PNX_TIMEOUT);</div><div class='add'>+	unsigned long expires = msecs_to_jiffies(alg_data-&gt;timeout);</div><div class='ctx'> </div><div class='ctx'> 	if (expires &lt;= 1)</div><div class='ctx'> 		expires = 2;</div><div class='hunk'>@@ -92,7 +138,7 @@ static int i2c_pnx_start(unsigned char slave_addr,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* First, make sure bus is idle */</div><div class='del'>-	if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {</div><div class='add'>+	if (wait_timeout(alg_data)) {</div><div class='ctx'> 		/* Somebody else is monopolizing the bus */</div><div class='ctx'> 		dev_err(&amp;alg_data-&gt;adapter.dev,</div><div class='ctx'> 			"%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x\n",</div><div class='hunk'>@@ -185,7 +231,7 @@ static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data)</div><div class='ctx'> 		if (alg_data-&gt;mif.len == 0) {</div><div class='ctx'> 			if (alg_data-&gt;last) {</div><div class='ctx'> 				/* Wait until the STOP is seen. */</div><div class='del'>-				if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))</div><div class='add'>+				if (wait_timeout(alg_data))</div><div class='ctx'> 					dev_err(&amp;alg_data-&gt;adapter.dev,</div><div class='ctx'> 						"The bus is still active after timeout\n");</div><div class='ctx'> 			}</div><div class='hunk'>@@ -283,7 +329,7 @@ static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data)</div><div class='ctx'> 		if (alg_data-&gt;mif.len == 0) {</div><div class='ctx'> 			if (alg_data-&gt;last)</div><div class='ctx'> 				/* Wait until the STOP is seen. */</div><div class='del'>-				if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))</div><div class='add'>+				if (wait_timeout(alg_data))</div><div class='ctx'> 					dev_err(&amp;alg_data-&gt;adapter.dev,</div><div class='ctx'> 						"The bus is still active after timeout\n");</div><div class='ctx'> </div><div class='hunk'>@@ -399,7 +445,7 @@ static void i2c_pnx_timeout(unsigned long data)</div><div class='ctx'> </div><div class='ctx'> 	ctl |= mcntrl_reset;</div><div class='ctx'> 	iowrite32(ctl, I2C_REG_CTL(alg_data));</div><div class='del'>-	wait_reset(I2C_PNX_TIMEOUT, alg_data);</div><div class='add'>+	wait_reset(alg_data);</div><div class='ctx'> 	alg_data-&gt;mif.ret = -EIO;</div><div class='ctx'> 	complete(&amp;alg_data-&gt;mif.complete);</div><div class='ctx'> }</div><div class='hunk'>@@ -414,18 +460,18 @@ static inline void bus_reset_if_active(struct i2c_pnx_algo_data *alg_data)</div><div class='ctx'> 			alg_data-&gt;adapter.name);</div><div class='ctx'> 		iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,</div><div class='ctx'> 			  I2C_REG_CTL(alg_data));</div><div class='del'>-		wait_reset(I2C_PNX_TIMEOUT, alg_data);</div><div class='add'>+		wait_reset(alg_data);</div><div class='ctx'> 	} else if (!(stat &amp; mstatus_rfe) || !(stat &amp; mstatus_tfe)) {</div><div class='ctx'> 		/* If there is data in the fifo's after transfer,</div><div class='ctx'> 		 * flush fifo's by reset.</div><div class='ctx'> 		 */</div><div class='ctx'> 		iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,</div><div class='ctx'> 			  I2C_REG_CTL(alg_data));</div><div class='del'>-		wait_reset(I2C_PNX_TIMEOUT, alg_data);</div><div class='add'>+		wait_reset(alg_data);</div><div class='ctx'> 	} else if (stat &amp; mstatus_nai) {</div><div class='ctx'> 		iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,</div><div class='ctx'> 			  I2C_REG_CTL(alg_data));</div><div class='del'>-		wait_reset(I2C_PNX_TIMEOUT, alg_data);</div><div class='add'>+		wait_reset(alg_data);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -546,8 +592,7 @@ static int i2c_pnx_controller_suspend(struct platform_device *pdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='del'>-	/* FIXME: shouldn't this be clk_disable? */</div><div class='del'>-	clk_enable(alg_data-&gt;clk);</div><div class='add'>+	clk_disable(alg_data-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -569,14 +614,8 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	struct i2c_pnx_algo_data *alg_data;</div><div class='ctx'> 	unsigned long freq;</div><div class='del'>-	struct i2c_pnx_data *i2c_pnx = pdev-&gt;dev.platform_data;</div><div class='del'>-</div><div class='del'>-	if (!i2c_pnx || !i2c_pnx-&gt;name) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "%s: no platform data supplied\n",</div><div class='del'>-		       __func__);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	struct resource *res;</div><div class='add'>+	u32 speed = I2C_PNX_SPEED_KHZ_DEFAULT * 1000;</div><div class='ctx'> </div><div class='ctx'> 	alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);</div><div class='ctx'> 	if (!alg_data) {</div><div class='hunk'>@@ -586,14 +625,27 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, alg_data);</div><div class='ctx'> </div><div class='del'>-	strlcpy(alg_data-&gt;adapter.name, i2c_pnx-&gt;name,</div><div class='del'>-		sizeof(alg_data-&gt;adapter.name));</div><div class='ctx'> 	alg_data-&gt;adapter.dev.parent = &amp;pdev-&gt;dev;</div><div class='ctx'> 	alg_data-&gt;adapter.algo = &amp;pnx_algorithm;</div><div class='ctx'> 	alg_data-&gt;adapter.algo_data = alg_data;</div><div class='ctx'> 	alg_data-&gt;adapter.nr = pdev-&gt;id;</div><div class='del'>-	alg_data-&gt;i2c_pnx = i2c_pnx;</div><div class='ctx'> </div><div class='add'>+	alg_data-&gt;timeout = I2C_PNX_TIMEOUT_DEFAULT;</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+	alg_data-&gt;adapter.dev.of_node = of_node_get(pdev-&gt;dev.of_node);</div><div class='add'>+	if (pdev-&gt;dev.of_node) {</div><div class='add'>+		of_property_read_u32(pdev-&gt;dev.of_node, "clock-frequency",</div><div class='add'>+				     &amp;speed);</div><div class='add'>+		/*</div><div class='add'>+		 * At this point, it is planned to add an OF timeout property.</div><div class='add'>+		 * As soon as there is a consensus about how to call and handle</div><div class='add'>+		 * this, sth. like the following can be put here:</div><div class='add'>+		 *</div><div class='add'>+		 * of_property_read_u32(pdev-&gt;dev.of_node, "timeout",</div><div class='add'>+		 *                      &amp;alg_data-&gt;timeout);</div><div class='add'>+		 */</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='ctx'> 	alg_data-&gt;clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='ctx'> 	if (IS_ERR(alg_data-&gt;clk)) {</div><div class='ctx'> 		ret = PTR_ERR(alg_data-&gt;clk);</div><div class='hunk'>@@ -604,17 +656,27 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)</div><div class='ctx'> 	alg_data-&gt;mif.timer.function = i2c_pnx_timeout;</div><div class='ctx'> 	alg_data-&gt;mif.timer.data = (unsigned long)alg_data;</div><div class='ctx'> </div><div class='add'>+	snprintf(alg_data-&gt;adapter.name, sizeof(alg_data-&gt;adapter.name),</div><div class='add'>+		 "%s", pdev-&gt;name);</div><div class='add'>+</div><div class='ctx'> 	/* Register I/O resource */</div><div class='del'>-	if (!request_mem_region(i2c_pnx-&gt;base, I2C_PNX_REGION_SIZE,</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Unable to get mem resource.\n");</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto out_clkget;</div><div class='add'>+	}</div><div class='add'>+	if (!request_mem_region(res-&gt;start, I2C_PNX_REGION_SIZE,</div><div class='ctx'> 				pdev-&gt;name)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='ctx'> 		       "I/O region 0x%08x for I2C already in use.\n",</div><div class='del'>-		       i2c_pnx-&gt;base);</div><div class='del'>-		ret = -ENODEV;</div><div class='add'>+		       res-&gt;start);</div><div class='add'>+		ret = -ENOMEM;</div><div class='ctx'> 		goto out_clkget;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	alg_data-&gt;ioaddr = ioremap(i2c_pnx-&gt;base, I2C_PNX_REGION_SIZE);</div><div class='add'>+	alg_data-&gt;base = res-&gt;start;</div><div class='add'>+	alg_data-&gt;ioaddr = ioremap(res-&gt;start, I2C_PNX_REGION_SIZE);</div><div class='ctx'> 	if (!alg_data-&gt;ioaddr) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Couldn't ioremap I2C I/O region\n");</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -638,20 +700,25 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)</div><div class='ctx'> 	 * the deglitching filter length.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;</div><div class='add'>+	tmp = (freq / speed) / 2 - 2;</div><div class='ctx'> 	if (tmp &gt; 0x3FF)</div><div class='ctx'> 		tmp = 0x3FF;</div><div class='ctx'> 	iowrite32(tmp, I2C_REG_CKH(alg_data));</div><div class='ctx'> 	iowrite32(tmp, I2C_REG_CKL(alg_data));</div><div class='ctx'> </div><div class='ctx'> 	iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));</div><div class='del'>-	if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {</div><div class='add'>+	if (wait_reset(alg_data)) {</div><div class='ctx'> 		ret = -ENODEV;</div><div class='ctx'> 		goto out_clock;</div><div class='ctx'> 	}</div><div class='ctx'> 	init_completion(&amp;alg_data-&gt;mif.complete);</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(i2c_pnx-&gt;irq, i2c_pnx_interrupt,</div><div class='add'>+	alg_data-&gt;irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (alg_data-&gt;irq &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to get IRQ from platform resource\n");</div><div class='add'>+		goto out_irq;</div><div class='add'>+	}</div><div class='add'>+	ret = request_irq(alg_data-&gt;irq, i2c_pnx_interrupt,</div><div class='ctx'> 			0, pdev-&gt;name, alg_data);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_clock;</div><div class='hunk'>@@ -663,39 +730,39 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto out_irq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	of_i2c_register_devices(&amp;alg_data-&gt;adapter);</div><div class='add'>+</div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "%s: Master at %#8x, irq %d.\n",</div><div class='del'>-	       alg_data-&gt;adapter.name, i2c_pnx-&gt;base, i2c_pnx-&gt;irq);</div><div class='add'>+		alg_data-&gt;adapter.name, res-&gt;start, alg_data-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_irq:</div><div class='del'>-	free_irq(i2c_pnx-&gt;irq, alg_data);</div><div class='add'>+	free_irq(alg_data-&gt;irq, alg_data);</div><div class='ctx'> out_clock:</div><div class='ctx'> 	clk_disable(alg_data-&gt;clk);</div><div class='ctx'> out_unmap:</div><div class='ctx'> 	iounmap(alg_data-&gt;ioaddr);</div><div class='ctx'> out_release:</div><div class='del'>-	release_mem_region(i2c_pnx-&gt;base, I2C_PNX_REGION_SIZE);</div><div class='add'>+	release_mem_region(res-&gt;start, I2C_PNX_REGION_SIZE);</div><div class='ctx'> out_clkget:</div><div class='ctx'> 	clk_put(alg_data-&gt;clk);</div><div class='ctx'> out_drvdata:</div><div class='ctx'> 	kfree(alg_data);</div><div class='ctx'> err_kzalloc:</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='del'>-out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit i2c_pnx_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);</div><div class='del'>-	struct i2c_pnx_data *i2c_pnx = alg_data-&gt;i2c_pnx;</div><div class='ctx'> </div><div class='del'>-	free_irq(i2c_pnx-&gt;irq, alg_data);</div><div class='add'>+	free_irq(alg_data-&gt;irq, alg_data);</div><div class='ctx'> 	i2c_del_adapter(&amp;alg_data-&gt;adapter);</div><div class='ctx'> 	clk_disable(alg_data-&gt;clk);</div><div class='ctx'> 	iounmap(alg_data-&gt;ioaddr);</div><div class='del'>-	release_mem_region(i2c_pnx-&gt;base, I2C_PNX_REGION_SIZE);</div><div class='add'>+	release_mem_region(alg_data-&gt;base, I2C_PNX_REGION_SIZE);</div><div class='ctx'> 	clk_put(alg_data-&gt;clk);</div><div class='ctx'> 	kfree(alg_data);</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='hunk'>@@ -703,10 +770,19 @@ static int __devexit i2c_pnx_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static const struct of_device_id i2c_pnx_of_match[] = {</div><div class='add'>+	{ .compatible = "nxp,pnx-i2c" },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, i2c_pnx_of_match);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct platform_driver i2c_pnx_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "pnx-i2c",</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = of_match_ptr(i2c_pnx_of_match),</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = i2c_pnx_probe,</div><div class='ctx'> 	.remove = __devexit_p(i2c_pnx_remove),</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c<br/>index 7b397c6f607e..31c47e18d83c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-powermac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-powermac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-powermac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-powermac.c</a></div><div class='hunk'>@@ -227,6 +227,72 @@ static int __devexit i2c_powermac_remove(struct platform_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __devinit i2c_powermac_register_devices(struct i2c_adapter *adap,</div><div class='add'>+						    struct pmac_i2c_bus *bus)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *newdev;</div><div class='add'>+	struct device_node *node;</div><div class='add'>+</div><div class='add'>+	for_each_child_of_node(adap-&gt;dev.of_node, node) {</div><div class='add'>+		struct i2c_board_info info = {};</div><div class='add'>+		struct dev_archdata dev_ad = {};</div><div class='add'>+		const __be32 *reg;</div><div class='add'>+		char tmp[16];</div><div class='add'>+		u32 addr;</div><div class='add'>+		int len;</div><div class='add'>+</div><div class='add'>+		/* Get address &amp; channel */</div><div class='add'>+		reg = of_get_property(node, "reg", &amp;len);</div><div class='add'>+		if (!reg || (len &lt; sizeof(int))) {</div><div class='add'>+			dev_err(&amp;adap-&gt;dev, "i2c-powermac: invalid reg on %s\n",</div><div class='add'>+				node-&gt;full_name);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		addr = be32_to_cpup(reg);</div><div class='add'>+</div><div class='add'>+		/* Multibus setup, check channel */</div><div class='add'>+		if (!pmac_i2c_match_adapter(node, adap))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dev_dbg(&amp;adap-&gt;dev, "i2c-powermac: register %s\n",</div><div class='add'>+			node-&gt;full_name);</div><div class='add'>+</div><div class='add'>+		/* Make up a modalias. Note: we to _NOT_ want the standard</div><div class='add'>+		 * i2c drivers to match with any of our powermac stuff</div><div class='add'>+		 * unless they have been specifically modified to handle</div><div class='add'>+		 * it on a case by case basis. For example, for thermal</div><div class='add'>+		 * control, things like lm75 etc... shall match with their</div><div class='add'>+		 * corresponding windfarm drivers, _NOT_ the generic ones,</div><div class='add'>+		 * so we force a prefix of AAPL, onto the modalias to</div><div class='add'>+		 * make that happen</div><div class='add'>+		 */</div><div class='add'>+		if (of_modalias_node(node, tmp, sizeof(tmp)) &lt; 0) {</div><div class='add'>+			dev_err(&amp;adap-&gt;dev, "i2c-powermac: modalias failure"</div><div class='add'>+				" on %s\n", node-&gt;full_name);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		snprintf(info.type, sizeof(info.type), "MAC,%s", tmp);</div><div class='add'>+</div><div class='add'>+		/* Fill out the rest of the info structure */</div><div class='add'>+		info.addr = (addr &amp; 0xff) &gt;&gt; 1;</div><div class='add'>+		info.irq = irq_of_parse_and_map(node, 0);</div><div class='add'>+		info.of_node = of_node_get(node);</div><div class='add'>+		info.archdata = &amp;dev_ad;</div><div class='add'>+</div><div class='add'>+		newdev = i2c_new_device(adap, &amp;info);</div><div class='add'>+		if (!newdev) {</div><div class='add'>+			dev_err(&amp;adap-&gt;dev, "i2c-powermac: Failure to register"</div><div class='add'>+				" %s\n", node-&gt;full_name);</div><div class='add'>+			of_node_put(node);</div><div class='add'>+			/* We do not dispose of the interrupt mapping on</div><div class='add'>+			 * purpose. It's not necessary (interrupt cannot be</div><div class='add'>+			 * re-used) and somebody else might have grabbed it</div><div class='add'>+			 * via direct DT lookup so let's not bother</div><div class='add'>+			 */</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int __devinit i2c_powermac_probe(struct platform_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -272,6 +338,7 @@ static int __devinit i2c_powermac_probe(struct platform_device *dev)</div><div class='ctx'> 	adapter-&gt;algo = &amp;i2c_powermac_algorithm;</div><div class='ctx'> 	i2c_set_adapdata(adapter, bus);</div><div class='ctx'> 	adapter-&gt;dev.parent = &amp;dev-&gt;dev;</div><div class='add'>+	adapter-&gt;dev.of_node = dev-&gt;dev.of_node;</div><div class='ctx'> 	rc = i2c_add_adapter(adapter);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		printk(KERN_ERR "i2c-powermac: Adapter %s registration "</div><div class='hunk'>@@ -281,33 +348,10 @@ static int __devinit i2c_powermac_probe(struct platform_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO "PowerMac i2c bus %s registered\n", adapter-&gt;name);</div><div class='ctx'> </div><div class='del'>-	if (!strncmp(basename, "uni-n", 5)) {</div><div class='del'>-		struct device_node *np;</div><div class='del'>-		const u32 *prop;</div><div class='del'>-		struct i2c_board_info info;</div><div class='del'>-</div><div class='del'>-		/* Instantiate I2C motion sensor if present */</div><div class='del'>-		np = of_find_node_by_name(NULL, "accelerometer");</div><div class='del'>-		if (np &amp;&amp; of_device_is_compatible(np, "AAPL,accelerometer_1") &amp;&amp;</div><div class='del'>-		    (prop = of_get_property(np, "reg", NULL))) {</div><div class='del'>-			int i2c_bus;</div><div class='del'>-			const char *tmp_bus;</div><div class='del'>-</div><div class='del'>-			/* look for bus either using "reg" or by path */</div><div class='del'>-			tmp_bus = strstr(np-&gt;full_name, "/i2c-bus@");</div><div class='del'>-			if (tmp_bus)</div><div class='del'>-				i2c_bus = *(tmp_bus + 9) - '0';</div><div class='del'>-			else</div><div class='del'>-				i2c_bus = ((*prop) &gt;&gt; 8) &amp; 0x0f;</div><div class='del'>-</div><div class='del'>-			if (pmac_i2c_get_channel(bus) == i2c_bus) {</div><div class='del'>-				memset(&amp;info, 0, sizeof(struct i2c_board_info));</div><div class='del'>-				info.addr = ((*prop) &amp; 0xff) &gt;&gt; 1;</div><div class='del'>-				strlcpy(info.type, "ams", I2C_NAME_SIZE);</div><div class='del'>-				i2c_new_device(adapter, &amp;info);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	/* Cannot use of_i2c_register_devices() due to Apple device-tree</div><div class='add'>+	 * funkyness</div><div class='add'>+	 */</div><div class='add'>+	i2c_powermac_register_devices(adapter, bus);</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c<br/>index f6733267fa9c..a997c7d3f95d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-pxa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-pxa.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-pxa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-pxa.c</a></div><div class='hunk'>@@ -1131,11 +1131,6 @@ static int i2c_pxa_probe(struct platform_device *dev)</div><div class='ctx'> 	spin_lock_init(&amp;i2c-&gt;lock);</div><div class='ctx'> 	init_waitqueue_head(&amp;i2c-&gt;wait);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If "dev-&gt;id" is negative we consider it as zero.</div><div class='del'>-	 * The reason to do so is to avoid sysfs names that only make</div><div class='del'>-	 * sense when there are multiple adapters.</div><div class='del'>-	 */</div><div class='ctx'> 	i2c-&gt;adap.nr = dev-&gt;id;</div><div class='ctx'> 	snprintf(i2c-&gt;adap.name, sizeof(i2c-&gt;adap.name), "pxa_i2c-i2c.%u",</div><div class='ctx'> 		 i2c-&gt;adap.nr);</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c<br/>index 737f7218a32c..01959154572d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-s3c2410.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-s3c2410.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-s3c2410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-s3c2410.c</a></div><div class='hunk'>@@ -44,8 +44,12 @@</div><div class='ctx'> #include &lt;plat/regs-iic.h&gt;</div><div class='ctx'> #include &lt;plat/iic.h&gt;</div><div class='ctx'> </div><div class='del'>-/* i2c controller state */</div><div class='add'>+/* Treat S3C2410 as baseline hardware, anything else is supported via quirks */</div><div class='add'>+#define QUIRK_S3C2440		(1 &lt;&lt; 0)</div><div class='add'>+#define QUIRK_HDMIPHY		(1 &lt;&lt; 1)</div><div class='add'>+#define QUIRK_NO_GPIO		(1 &lt;&lt; 2)</div><div class='ctx'> </div><div class='add'>+/* i2c controller state */</div><div class='ctx'> enum s3c24xx_i2c_state {</div><div class='ctx'> 	STATE_IDLE,</div><div class='ctx'> 	STATE_START,</div><div class='hunk'>@@ -54,14 +58,10 @@ enum s3c24xx_i2c_state {</div><div class='ctx'> 	STATE_STOP</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum s3c24xx_i2c_type {</div><div class='del'>-	TYPE_S3C2410,</div><div class='del'>-	TYPE_S3C2440,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct s3c24xx_i2c {</div><div class='ctx'> 	spinlock_t		lock;</div><div class='ctx'> 	wait_queue_head_t	wait;</div><div class='add'>+	unsigned int            quirks;</div><div class='ctx'> 	unsigned int		suspended:1;</div><div class='ctx'> </div><div class='ctx'> 	struct i2c_msg		*msg;</div><div class='hunk'>@@ -88,26 +88,45 @@ struct s3c24xx_i2c {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* default platform data removed, dev should always carry data. */</div><div class='add'>+static struct platform_device_id s3c24xx_driver_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "s3c2410-i2c",</div><div class='add'>+		.driver_data	= 0,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "s3c2440-i2c",</div><div class='add'>+		.driver_data	= QUIRK_S3C2440,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "s3c2440-hdmiphy-i2c",</div><div class='add'>+		.driver_data	= QUIRK_S3C2440 | QUIRK_HDMIPHY | QUIRK_NO_GPIO,</div><div class='add'>+	}, { },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static const struct of_device_id s3c24xx_i2c_match[] = {</div><div class='add'>+	{ .compatible = "samsung,s3c2410-i2c", .data = (void *)0 },</div><div class='add'>+	{ .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 },</div><div class='add'>+	{ .compatible = "samsung,s3c2440-hdmiphy-i2c",</div><div class='add'>+	  .data = (void *)(QUIRK_S3C2440 | QUIRK_HDMIPHY | QUIRK_NO_GPIO) },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-/* s3c24xx_i2c_is2440()</div><div class='add'>+/* s3c24xx_get_device_quirks</div><div class='ctx'>  *</div><div class='del'>- * return true is this is an s3c2440</div><div class='add'>+ * Get controller type either from device tree or platform device variant.</div><div class='ctx'> */</div><div class='ctx'> </div><div class='del'>-static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)</div><div class='add'>+static inline unsigned int s3c24xx_get_device_quirks(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct platform_device *pdev = to_platform_device(i2c-&gt;dev);</div><div class='del'>-	enum s3c24xx_i2c_type type;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_OF</div><div class='del'>-	if (i2c-&gt;dev-&gt;of_node)</div><div class='del'>-		return of_device_is_compatible(i2c-&gt;dev-&gt;of_node,</div><div class='del'>-				"samsung,s3c2440-i2c");</div><div class='del'>-#endif</div><div class='add'>+	if (pdev-&gt;dev.of_node) {</div><div class='add'>+		const struct of_device_id *match;</div><div class='add'>+		match = of_match_node(&amp;s3c24xx_i2c_match, pdev-&gt;dev.of_node);</div><div class='add'>+		return (unsigned int)match-&gt;data;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	type = platform_get_device_id(pdev)-&gt;driver_data;</div><div class='del'>-	return type == TYPE_S3C2440;</div><div class='add'>+	return platform_get_device_id(pdev)-&gt;driver_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* s3c24xx_i2c_master_complete</div><div class='hunk'>@@ -471,6 +490,13 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)</div><div class='ctx'> 	unsigned long iicstat;</div><div class='ctx'> 	int timeout = 400;</div><div class='ctx'> </div><div class='add'>+	/* the timeout for HDMIPHY is reduced to 10 ms because</div><div class='add'>+	 * the hangup is expected to happen, so waiting 400 ms</div><div class='add'>+	 * causes only unnecessary system hangup</div><div class='add'>+	 */</div><div class='add'>+	if (i2c-&gt;quirks &amp; QUIRK_HDMIPHY)</div><div class='add'>+		timeout = 10;</div><div class='add'>+</div><div class='ctx'> 	while (timeout-- &gt; 0) {</div><div class='ctx'> 		iicstat = readl(i2c-&gt;regs + S3C2410_IICSTAT);</div><div class='ctx'> </div><div class='hunk'>@@ -480,6 +506,15 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)</div><div class='ctx'> 		msleep(1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* hang-up of bus dedicated for HDMIPHY occurred, resetting */</div><div class='add'>+	if (i2c-&gt;quirks &amp; QUIRK_HDMIPHY) {</div><div class='add'>+		writel(0, i2c-&gt;regs + S3C2410_IICCON);</div><div class='add'>+		writel(0, i2c-&gt;regs + S3C2410_IICSTAT);</div><div class='add'>+		writel(0, i2c-&gt;regs + S3C2410_IICDS);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return -ETIMEDOUT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -591,7 +626,8 @@ static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,</div><div class='ctx'> /* declare our i2c functionality */</div><div class='ctx'> static u32 s3c24xx_i2c_func(struct i2c_adapter *adap)</div><div class='ctx'> {</div><div class='del'>-	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;</div><div class='add'>+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_NOSTART |</div><div class='add'>+		I2C_FUNC_PROTOCOL_MANGLING;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* i2c bus registration info */</div><div class='hunk'>@@ -676,7 +712,7 @@ static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)</div><div class='ctx'> </div><div class='ctx'> 	writel(iiccon, i2c-&gt;regs + S3C2410_IICCON);</div><div class='ctx'> </div><div class='del'>-	if (s3c24xx_i2c_is2440(i2c)) {</div><div class='add'>+	if (i2c-&gt;quirks &amp; QUIRK_S3C2440) {</div><div class='ctx'> 		unsigned long sda_delay;</div><div class='ctx'> </div><div class='ctx'> 		if (pdata-&gt;sda_delay) {</div><div class='hunk'>@@ -761,6 +797,9 @@ static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)</div><div class='ctx'> {</div><div class='ctx'> 	int idx, gpio, ret;</div><div class='ctx'> </div><div class='add'>+	if (i2c-&gt;quirks &amp; QUIRK_NO_GPIO)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	for (idx = 0; idx &lt; 2; idx++) {</div><div class='ctx'> 		gpio = of_get_gpio(i2c-&gt;dev-&gt;of_node, idx);</div><div class='ctx'> 		if (!gpio_is_valid(gpio)) {</div><div class='hunk'>@@ -785,6 +824,10 @@ free_gpio:</div><div class='ctx'> static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int idx;</div><div class='add'>+</div><div class='add'>+	if (i2c-&gt;quirks &amp; QUIRK_NO_GPIO)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	for (idx = 0; idx &lt; 2; idx++)</div><div class='ctx'> 		gpio_free(i2c-&gt;gpios[idx]);</div><div class='ctx'> }</div><div class='hunk'>@@ -906,6 +949,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_noclk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	i2c-&gt;quirks = s3c24xx_get_device_quirks(pdev);</div><div class='ctx'> 	if (pdata)</div><div class='ctx'> 		memcpy(i2c-&gt;pdata, pdata, sizeof(*pdata));</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1110,28 +1154,6 @@ static const struct dev_pm_ops s3c24xx_i2c_dev_pm_ops = {</div><div class='ctx'> </div><div class='ctx'> /* device driver for platform bus bits */</div><div class='ctx'> </div><div class='del'>-static struct platform_device_id s3c24xx_driver_ids[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "s3c2410-i2c",</div><div class='del'>-		.driver_data	= TYPE_S3C2410,</div><div class='del'>-	}, {</div><div class='del'>-		.name		= "s3c2440-i2c",</div><div class='del'>-		.driver_data	= TYPE_S3C2440,</div><div class='del'>-	}, { },</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_OF</div><div class='del'>-static const struct of_device_id s3c24xx_i2c_match[] = {</div><div class='del'>-	{ .compatible = "samsung,s3c2410-i2c" },</div><div class='del'>-	{ .compatible = "samsung,s3c2440-i2c" },</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match);</div><div class='del'>-#else</div><div class='del'>-#define s3c24xx_i2c_match NULL</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static struct platform_driver s3c24xx_i2c_driver = {</div><div class='ctx'> 	.probe		= s3c24xx_i2c_probe,</div><div class='ctx'> 	.remove		= s3c24xx_i2c_remove,</div><div class='hunk'>@@ -1140,7 +1162,7 @@ static struct platform_driver s3c24xx_i2c_driver = {</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 		.name	= "s3c-i2c",</div><div class='ctx'> 		.pm	= S3C24XX_DEV_PM_OPS,</div><div class='del'>-		.of_match_table = s3c24xx_i2c_match,</div><div class='add'>+		.of_match_table = of_match_ptr(s3c24xx_i2c_match),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/i2c/busses/i2c-s6000.c b/drivers/i2c/busses/i2c-s6000.c<br/>index c64ba736f480..b76a29d1f8e4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-s6000.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-s6000.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-s6000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-s6000.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Description: Driver for S6000 Family I2C Interface</div><div class='ctx'>  * Copyright (c) 2008 emlix GmbH</div><div class='del'>- * Author:	Oskar Schirmer &lt;os@emlix.com&gt;</div><div class='add'>+ * Author:	Oskar Schirmer &lt;oskar@scara.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Partially based on i2c-bfin-twi.c driver by &lt;sonic.zhang@analog.com&gt;</div><div class='ctx'>  * Copyright (c) 2005-2007 Analog Devices, Inc.</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-s6000.h b/drivers/i2c/busses/i2c-s6000.h<br/>index ff23b81ded44..4936f9f2256f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-s6000.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-s6000.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-s6000.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-s6000.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'>  * for more details.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2008 Emlix GmbH &lt;info@emlix.com&gt;</div><div class='del'>- * Author:	Oskar Schirmer &lt;os@emlix.com&gt;</div><div class='add'>+ * Author:	Oskar Schirmer &lt;oskar@scara.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __DRIVERS_I2C_BUSSES_I2C_S6000_H</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c<br/>index 675c9692d148..8110ca45f342 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-sh_mobile.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-sh_mobile.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-sh_mobile.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-sh_mobile.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/of_i2c.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='hunk'>@@ -653,6 +654,7 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)</div><div class='ctx'> 	adap-&gt;dev.parent = &amp;dev-&gt;dev;</div><div class='ctx'> 	adap-&gt;retries = 5;</div><div class='ctx'> 	adap-&gt;nr = dev-&gt;id;</div><div class='add'>+	adap-&gt;dev.of_node = dev-&gt;dev.of_node;</div><div class='ctx'> </div><div class='ctx'> 	strlcpy(adap-&gt;name, dev-&gt;name, sizeof(adap-&gt;name));</div><div class='ctx'> </div><div class='hunk'>@@ -667,6 +669,8 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;dev-&gt;dev, "I2C adapter %d with bus speed %lu Hz\n",</div><div class='ctx'> 		 adap-&gt;nr, pd-&gt;bus_speed);</div><div class='add'>+</div><div class='add'>+	of_i2c_register_devices(adap);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'>  err_all:</div><div class='hunk'>@@ -710,11 +714,18 @@ static const struct dev_pm_ops sh_mobile_i2c_dev_pm_ops = {</div><div class='ctx'> 	.runtime_resume = sh_mobile_i2c_runtime_nop,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct of_device_id sh_mobile_i2c_dt_ids[] __devinitconst = {</div><div class='add'>+	{ .compatible = "renesas,rmobile-iic", },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids);</div><div class='add'>+</div><div class='ctx'> static struct platform_driver sh_mobile_i2c_driver = {</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name		= "i2c-sh_mobile",</div><div class='ctx'> 		.owner		= THIS_MODULE,</div><div class='ctx'> 		.pm		= &amp;sh_mobile_i2c_dev_pm_ops,</div><div class='add'>+		.of_match_table = sh_mobile_i2c_dt_ids,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= sh_mobile_i2c_probe,</div><div class='ctx'> 	.remove		= sh_mobile_i2c_remove,</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c<br/>index e978635e60f0..8b2e555a9563 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-tegra.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-tegra.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-tegra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-tegra.c</a></div><div class='hunk'>@@ -401,8 +401,6 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)</div><div class='ctx'> 			disable_irq_nosync(i2c_dev-&gt;irq);</div><div class='ctx'> 			i2c_dev-&gt;irq_disabled = 1;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		complete(&amp;i2c_dev-&gt;msg_complete);</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -411,7 +409,6 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)</div><div class='ctx'> 			i2c_dev-&gt;msg_err |= I2C_ERR_NO_ACK;</div><div class='ctx'> 		if (status &amp; I2C_INT_ARBITRATION_LOST)</div><div class='ctx'> 			i2c_dev-&gt;msg_err |= I2C_ERR_ARBITRATION_LOST;</div><div class='del'>-		complete(&amp;i2c_dev-&gt;msg_complete);</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -429,14 +426,14 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)</div><div class='ctx'> 			tegra_i2c_mask_irq(i2c_dev, I2C_INT_TX_FIFO_DATA_REQ);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	i2c_writel(i2c_dev, status, I2C_INT_STATUS);</div><div class='add'>+	if (i2c_dev-&gt;is_dvc)</div><div class='add'>+		dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);</div><div class='add'>+</div><div class='ctx'> 	if (status &amp; I2C_INT_PACKET_XFER_COMPLETE) {</div><div class='ctx'> 		BUG_ON(i2c_dev-&gt;msg_buf_remaining);</div><div class='ctx'> 		complete(&amp;i2c_dev-&gt;msg_complete);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	i2c_writel(i2c_dev, status, I2C_INT_STATUS);</div><div class='del'>-	if (i2c_dev-&gt;is_dvc)</div><div class='del'>-		dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> err:</div><div class='ctx'> 	/* An error occurred, mask all interrupts */</div><div class='hunk'>@@ -446,6 +443,8 @@ err:</div><div class='ctx'> 	i2c_writel(i2c_dev, status, I2C_INT_STATUS);</div><div class='ctx'> 	if (i2c_dev-&gt;is_dvc)</div><div class='ctx'> 		dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);</div><div class='add'>+</div><div class='add'>+	complete(&amp;i2c_dev-&gt;msg_complete);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -476,12 +475,15 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,</div><div class='ctx'> 	packet_header = msg-&gt;len - 1;</div><div class='ctx'> 	i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);</div><div class='ctx'> </div><div class='del'>-	packet_header = msg-&gt;addr &lt;&lt; I2C_HEADER_SLAVE_ADDR_SHIFT;</div><div class='del'>-	packet_header |= I2C_HEADER_IE_ENABLE;</div><div class='add'>+	packet_header = I2C_HEADER_IE_ENABLE;</div><div class='ctx'> 	if (!stop)</div><div class='ctx'> 		packet_header |= I2C_HEADER_REPEAT_START;</div><div class='del'>-	if (msg-&gt;flags &amp; I2C_M_TEN)</div><div class='add'>+	if (msg-&gt;flags &amp; I2C_M_TEN) {</div><div class='add'>+		packet_header |= msg-&gt;addr;</div><div class='ctx'> 		packet_header |= I2C_HEADER_10BIT_ADDR;</div><div class='add'>+	} else {</div><div class='add'>+		packet_header |= msg-&gt;addr &lt;&lt; I2C_HEADER_SLAVE_ADDR_SHIFT;</div><div class='add'>+	}</div><div class='ctx'> 	if (msg-&gt;flags &amp; I2C_M_IGNORE_NAK)</div><div class='ctx'> 		packet_header |= I2C_HEADER_CONT_ON_NAK;</div><div class='ctx'> 	if (msg-&gt;flags &amp; I2C_M_RD)</div><div class='hunk'>@@ -516,6 +518,14 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,</div><div class='ctx'> 	if (likely(i2c_dev-&gt;msg_err == I2C_ERR_NONE))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * NACK interrupt is generated before the I2C controller generates the</div><div class='add'>+	 * STOP condition on the bus. So wait for 2 clock periods before resetting</div><div class='add'>+	 * the controller so that STOP condition has been delivered properly.</div><div class='add'>+	 */</div><div class='add'>+	if (i2c_dev-&gt;msg_err == I2C_ERR_NO_ACK)</div><div class='add'>+		udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev-&gt;bus_clk_rate));</div><div class='add'>+</div><div class='ctx'> 	tegra_i2c_init(i2c_dev);</div><div class='ctx'> 	if (i2c_dev-&gt;msg_err == I2C_ERR_NO_ACK) {</div><div class='ctx'> 		if (msg-&gt;flags &amp; I2C_M_IGNORE_NAK)</div><div class='hunk'>@@ -549,7 +559,7 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],</div><div class='ctx'> </div><div class='ctx'> static u32 tegra_i2c_func(struct i2c_adapter *adap)</div><div class='ctx'> {</div><div class='del'>-	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;</div><div class='add'>+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct i2c_algorithm tegra_i2c_algo = {</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-versatile.c b/drivers/i2c/busses/i2c-versatile.c<br/>index f585aead50cc..eec20db6246f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-versatile.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-versatile.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-versatile.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-versatile.c</a></div><div class='hunk'>@@ -104,13 +104,8 @@ static int i2c_versatile_probe(struct platform_device *dev)</div><div class='ctx'> 	i2c-&gt;algo = i2c_versatile_algo;</div><div class='ctx'> 	i2c-&gt;algo.data = i2c;</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;id &gt;= 0) {</div><div class='del'>-		/* static bus numbering */</div><div class='del'>-		i2c-&gt;adap.nr = dev-&gt;id;</div><div class='del'>-		ret = i2c_bit_add_numbered_bus(&amp;i2c-&gt;adap);</div><div class='del'>-	} else</div><div class='del'>-		/* dynamic bus numbering */</div><div class='del'>-		ret = i2c_bit_add_bus(&amp;i2c-&gt;adap);</div><div class='add'>+	i2c-&gt;adap.nr = dev-&gt;id;</div><div class='add'>+	ret = i2c_bit_add_numbered_bus(&amp;i2c-&gt;adap);</div><div class='ctx'> 	if (ret &gt;= 0) {</div><div class='ctx'> 		platform_set_drvdata(dev, i2c);</div><div class='ctx'> 		of_i2c_register_devices(&amp;i2c-&gt;adap);</div><div class='head'>diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c<br/>index 2bded7647ef2..641d0e5e3303 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-xiic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/busses/i2c-xiic.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/busses/i2c-xiic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/busses/i2c-xiic.c</a></div><div class='hunk'>@@ -40,6 +40,7 @@</div><div class='ctx'> #include &lt;linux/i2c-xiic.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/of_i2c.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DRIVER_NAME "xiic-i2c"</div><div class='ctx'> </div><div class='hunk'>@@ -705,8 +706,6 @@ static int __devinit xiic_i2c_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto resource_missing;</div><div class='ctx'> </div><div class='ctx'> 	pdata = (struct xiic_i2c_platform_data *) pdev-&gt;dev.platform_data;</div><div class='del'>-	if (!pdata)</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);</div><div class='ctx'> 	if (!i2c)</div><div class='hunk'>@@ -730,6 +729,7 @@ static int __devinit xiic_i2c_probe(struct platform_device *pdev)</div><div class='ctx'> 	i2c-&gt;adap = xiic_adapter;</div><div class='ctx'> 	i2c_set_adapdata(&amp;i2c-&gt;adap, i2c);</div><div class='ctx'> 	i2c-&gt;adap.dev.parent = &amp;pdev-&gt;dev;</div><div class='add'>+	i2c-&gt;adap.dev.of_node = pdev-&gt;dev.of_node;</div><div class='ctx'> </div><div class='ctx'> 	xiic_reinit(i2c);</div><div class='ctx'> </div><div class='hunk'>@@ -748,9 +748,13 @@ static int __devinit xiic_i2c_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto add_adapter_failed;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* add in known devices to the bus */</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;num_devices; i++)</div><div class='del'>-		i2c_new_device(&amp;i2c-&gt;adap, pdata-&gt;devices + i);</div><div class='add'>+	if (pdata) {</div><div class='add'>+		/* add in known devices to the bus */</div><div class='add'>+		for (i = 0; i &lt; pdata-&gt;num_devices; i++)</div><div class='add'>+			i2c_new_device(&amp;i2c-&gt;adap, pdata-&gt;devices + i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	of_i2c_register_devices(&amp;i2c-&gt;adap);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -795,12 +799,21 @@ static int __devexit xiic_i2c_remove(struct platform_device* pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_OF)</div><div class='add'>+static const struct of_device_id xiic_of_match[] __devinitconst = {</div><div class='add'>+	{ .compatible = "xlnx,xps-iic-2.00.a", },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, xiic_of_match);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct platform_driver xiic_i2c_driver = {</div><div class='ctx'> 	.probe   = xiic_i2c_probe,</div><div class='ctx'> 	.remove  = __devexit_p(xiic_i2c_remove),</div><div class='ctx'> 	.driver  = {</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 		.name = DRIVER_NAME,</div><div class='add'>+		.of_match_table = of_match_ptr(xiic_of_match),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c<br/>index feb7dc359186..a6ad32bc0a96 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/i2c-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/i2c-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/i2c-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/i2c-core.c</a></div><div class='hunk'>@@ -772,6 +772,23 @@ struct device_type i2c_adapter_type = {</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL_GPL(i2c_adapter_type);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * i2c_verify_adapter - return parameter as i2c_adapter or NULL</div><div class='add'>+ * @dev: device, probably from some driver model iterator</div><div class='add'>+ *</div><div class='add'>+ * When traversing the driver model tree, perhaps using driver model</div><div class='add'>+ * iterators like @device_for_each_child(), you can't assume very much</div><div class='add'>+ * about the nodes you find.  Use this function to avoid oopses caused</div><div class='add'>+ * by wrongly treating some non-I2C device as an i2c_adapter.</div><div class='add'>+ */</div><div class='add'>+struct i2c_adapter *i2c_verify_adapter(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return (dev-&gt;type == &amp;i2c_adapter_type)</div><div class='add'>+			? to_i2c_adapter(dev)</div><div class='add'>+			: NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(i2c_verify_adapter);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_I2C_COMPAT</div><div class='ctx'> static struct class_compat *i2c_adapter_compat_class;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c<br/>index 45048323b75e..5ec2261574ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/i2c-dev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/i2c-dev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/i2c-dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/i2c-dev.c</a></div><div class='hunk'>@@ -265,19 +265,41 @@ static noinline int i2cdev_ioctl_rdrw(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> 	res = 0;</div><div class='ctx'> 	for (i = 0; i &lt; rdwr_arg.nmsgs; i++) {</div><div class='del'>-		/* Limit the size of the message to a sane amount;</div><div class='del'>-		 * and don't let length change either. */</div><div class='del'>-		if ((rdwr_pa[i].len &gt; 8192) ||</div><div class='del'>-		    (rdwr_pa[i].flags &amp; I2C_M_RECV_LEN)) {</div><div class='add'>+		/* Limit the size of the message to a sane amount */</div><div class='add'>+		if (rdwr_pa[i].len &gt; 8192) {</div><div class='ctx'> 			res = -EINVAL;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		data_ptrs[i] = (u8 __user *)rdwr_pa[i].buf;</div><div class='ctx'> 		rdwr_pa[i].buf = memdup_user(data_ptrs[i], rdwr_pa[i].len);</div><div class='ctx'> 		if (IS_ERR(rdwr_pa[i].buf)) {</div><div class='ctx'> 			res = PTR_ERR(rdwr_pa[i].buf);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If the message length is received from the slave (similar</div><div class='add'>+		 * to SMBus block read), we must ensure that the buffer will</div><div class='add'>+		 * be large enough to cope with a message length of</div><div class='add'>+		 * I2C_SMBUS_BLOCK_MAX as this is the maximum underlying bus</div><div class='add'>+		 * drivers allow. The first byte in the buffer must be</div><div class='add'>+		 * pre-filled with the number of extra bytes, which must be</div><div class='add'>+		 * at least one to hold the message length, but can be</div><div class='add'>+		 * greater (for example to account for a checksum byte at</div><div class='add'>+		 * the end of the message.)</div><div class='add'>+		 */</div><div class='add'>+		if (rdwr_pa[i].flags &amp; I2C_M_RECV_LEN) {</div><div class='add'>+			if (!(rdwr_pa[i].flags &amp; I2C_M_RD) ||</div><div class='add'>+			    rdwr_pa[i].buf[0] &lt; 1 ||</div><div class='add'>+			    rdwr_pa[i].len &lt; rdwr_pa[i].buf[0] +</div><div class='add'>+					     I2C_SMBUS_BLOCK_MAX) {</div><div class='add'>+				res = -EINVAL;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			rdwr_pa[i].len = rdwr_pa[i].buf[0];</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (res &lt; 0) {</div><div class='ctx'> 		int j;</div><div class='head'>diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c<br/>index d7a4833be416..1038c381aea5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/i2c-mux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/i2c-mux.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/i2c-mux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/i2c-mux.c</a></div><div class='hunk'>@@ -24,6 +24,8 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/i2c-mux.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_i2c.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* multiplexer per channel data */</div><div class='ctx'> struct i2c_mux_priv {</div><div class='hunk'>@@ -31,11 +33,11 @@ struct i2c_mux_priv {</div><div class='ctx'> 	struct i2c_algorithm algo;</div><div class='ctx'> </div><div class='ctx'> 	struct i2c_adapter *parent;</div><div class='del'>-	void *mux_dev;	/* the mux chip/device */</div><div class='add'>+	void *mux_priv;	/* the mux chip/device */</div><div class='ctx'> 	u32  chan_id;	/* the channel id */</div><div class='ctx'> </div><div class='del'>-	int (*select)(struct i2c_adapter *, void *mux_dev, u32 chan_id);</div><div class='del'>-	int (*deselect)(struct i2c_adapter *, void *mux_dev, u32 chan_id);</div><div class='add'>+	int (*select)(struct i2c_adapter *, void *mux_priv, u32 chan_id);</div><div class='add'>+	int (*deselect)(struct i2c_adapter *, void *mux_priv, u32 chan_id);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int i2c_mux_master_xfer(struct i2c_adapter *adap,</div><div class='hunk'>@@ -47,11 +49,11 @@ static int i2c_mux_master_xfer(struct i2c_adapter *adap,</div><div class='ctx'> </div><div class='ctx'> 	/* Switch to the right mux port and perform the transfer. */</div><div class='ctx'> </div><div class='del'>-	ret = priv-&gt;select(parent, priv-&gt;mux_dev, priv-&gt;chan_id);</div><div class='add'>+	ret = priv-&gt;select(parent, priv-&gt;mux_priv, priv-&gt;chan_id);</div><div class='ctx'> 	if (ret &gt;= 0)</div><div class='ctx'> 		ret = parent-&gt;algo-&gt;master_xfer(parent, msgs, num);</div><div class='ctx'> 	if (priv-&gt;deselect)</div><div class='del'>-		priv-&gt;deselect(parent, priv-&gt;mux_dev, priv-&gt;chan_id);</div><div class='add'>+		priv-&gt;deselect(parent, priv-&gt;mux_priv, priv-&gt;chan_id);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -67,12 +69,12 @@ static int i2c_mux_smbus_xfer(struct i2c_adapter *adap,</div><div class='ctx'> </div><div class='ctx'> 	/* Select the right mux port and perform the transfer. */</div><div class='ctx'> </div><div class='del'>-	ret = priv-&gt;select(parent, priv-&gt;mux_dev, priv-&gt;chan_id);</div><div class='add'>+	ret = priv-&gt;select(parent, priv-&gt;mux_priv, priv-&gt;chan_id);</div><div class='ctx'> 	if (ret &gt;= 0)</div><div class='ctx'> 		ret = parent-&gt;algo-&gt;smbus_xfer(parent, addr, flags,</div><div class='ctx'> 					read_write, command, size, data);</div><div class='ctx'> 	if (priv-&gt;deselect)</div><div class='del'>-		priv-&gt;deselect(parent, priv-&gt;mux_dev, priv-&gt;chan_id);</div><div class='add'>+		priv-&gt;deselect(parent, priv-&gt;mux_priv, priv-&gt;chan_id);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -87,7 +89,8 @@ static u32 i2c_mux_functionality(struct i2c_adapter *adap)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent,</div><div class='del'>-				void *mux_dev, u32 force_nr, u32 chan_id,</div><div class='add'>+				struct device *mux_dev,</div><div class='add'>+				void *mux_priv, u32 force_nr, u32 chan_id,</div><div class='ctx'> 				int (*select) (struct i2c_adapter *,</div><div class='ctx'> 					       void *, u32),</div><div class='ctx'> 				int (*deselect) (struct i2c_adapter *,</div><div class='hunk'>@@ -102,7 +105,7 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent,</div><div class='ctx'> </div><div class='ctx'> 	/* Set up private adapter data */</div><div class='ctx'> 	priv-&gt;parent = parent;</div><div class='del'>-	priv-&gt;mux_dev = mux_dev;</div><div class='add'>+	priv-&gt;mux_priv = mux_priv;</div><div class='ctx'> 	priv-&gt;chan_id = chan_id;</div><div class='ctx'> 	priv-&gt;select = select;</div><div class='ctx'> 	priv-&gt;deselect = deselect;</div><div class='hunk'>@@ -124,6 +127,25 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent,</div><div class='ctx'> 	priv-&gt;adap.algo_data = priv;</div><div class='ctx'> 	priv-&gt;adap.dev.parent = &amp;parent-&gt;dev;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Try to populate the mux adapter's of_node, expands to</div><div class='add'>+	 * nothing if !CONFIG_OF.</div><div class='add'>+	 */</div><div class='add'>+	if (mux_dev-&gt;of_node) {</div><div class='add'>+		struct device_node *child;</div><div class='add'>+		u32 reg;</div><div class='add'>+</div><div class='add'>+		for_each_child_of_node(mux_dev-&gt;of_node, child) {</div><div class='add'>+			ret = of_property_read_u32(child, "reg", &amp;reg);</div><div class='add'>+			if (ret)</div><div class='add'>+				continue;</div><div class='add'>+			if (chan_id == reg) {</div><div class='add'>+				priv-&gt;adap.dev.of_node = child;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (force_nr) {</div><div class='ctx'> 		priv-&gt;adap.nr = force_nr;</div><div class='ctx'> 		ret = i2c_add_numbered_adapter(&amp;priv-&gt;adap);</div><div class='hunk'>@@ -141,6 +163,8 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent,</div><div class='ctx'> 	dev_info(&amp;parent-&gt;dev, "Added multiplexed i2c bus %d\n",</div><div class='ctx'> 		 i2c_adapter_id(&amp;priv-&gt;adap));</div><div class='ctx'> </div><div class='add'>+	of_i2c_register_devices(&amp;priv-&gt;adap);</div><div class='add'>+</div><div class='ctx'> 	return &amp;priv-&gt;adap;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(i2c_add_mux_adapter);</div><div class='head'>diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig<br/>index 90b7a0163899..a0edd9854218 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/muxes/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/muxes/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/muxes/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/muxes/Kconfig</a></div><div class='hunk'>@@ -15,7 +15,7 @@ config I2C_MUX_GPIO</div><div class='ctx'> 	  through GPIO pins.</div><div class='ctx'> </div><div class='ctx'> 	  This driver can also be built as a module.  If so, the module</div><div class='del'>-	  will be called gpio-i2cmux.</div><div class='add'>+	  will be called i2c-mux-gpio.</div><div class='ctx'> </div><div class='ctx'> config I2C_MUX_PCA9541</div><div class='ctx'> 	tristate "NXP PCA9541 I2C Master Selector"</div><div class='hunk'>@@ -25,7 +25,7 @@ config I2C_MUX_PCA9541</div><div class='ctx'> 	  I2C Master Selector.</div><div class='ctx'> </div><div class='ctx'> 	  This driver can also be built as a module.  If so, the module</div><div class='del'>-	  will be called pca9541.</div><div class='add'>+	  will be called i2c-mux-pca9541.</div><div class='ctx'> </div><div class='ctx'> config I2C_MUX_PCA954x</div><div class='ctx'> 	tristate "Philips PCA954x I2C Mux/switches"</div><div class='hunk'>@@ -35,6 +35,18 @@ config I2C_MUX_PCA954x</div><div class='ctx'> 	  I2C mux/switch devices.</div><div class='ctx'> </div><div class='ctx'> 	  This driver can also be built as a module.  If so, the module</div><div class='del'>-	  will be called pca954x.</div><div class='add'>+	  will be called i2c-mux-pca954x.</div><div class='add'>+</div><div class='add'>+config I2C_MUX_PINCTRL</div><div class='add'>+	tristate "pinctrl-based I2C multiplexer"</div><div class='add'>+	depends on PINCTRL</div><div class='add'>+	help</div><div class='add'>+	  If you say yes to this option, support will be included for an I2C</div><div class='add'>+	  multiplexer that uses the pinctrl subsystem, i.e. pin multiplexing.</div><div class='add'>+	  This is useful for SoCs whose I2C module's signals can be routed to</div><div class='add'>+	  different sets of pins at run-time.</div><div class='add'>+</div><div class='add'>+	  This driver can also be built as a module. If so, the module will be</div><div class='add'>+	  called pinctrl-i2cmux.</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='head'>diff --git a/drivers/i2c/muxes/Makefile b/drivers/i2c/muxes/Makefile<br/>index 4640436ea61f..76da8692afff 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/muxes/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/muxes/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/muxes/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/muxes/Makefile</a></div><div class='hunk'>@@ -1,8 +1,9 @@</div><div class='ctx'> #</div><div class='ctx'> # Makefile for multiplexer I2C chip drivers.</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_I2C_MUX_GPIO)	+= gpio-i2cmux.o</div><div class='del'>-obj-$(CONFIG_I2C_MUX_PCA9541)	+= pca9541.o</div><div class='del'>-obj-$(CONFIG_I2C_MUX_PCA954x)	+= pca954x.o</div><div class='add'>+obj-$(CONFIG_I2C_MUX_GPIO)	+= i2c-mux-gpio.o</div><div class='add'>+obj-$(CONFIG_I2C_MUX_PCA9541)	+= i2c-mux-pca9541.o</div><div class='add'>+obj-$(CONFIG_I2C_MUX_PCA954x)	+= i2c-mux-pca954x.o</div><div class='add'>+obj-$(CONFIG_I2C_MUX_PINCTRL)	+= i2c-mux-pinctrl.o</div><div class='ctx'> </div><div class='ctx'> ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG</div><div class='head'>diff --git a/drivers/i2c/muxes/gpio-i2cmux.c b/drivers/i2c/muxes/i2c-mux-gpio.c<br/>index e5fa695eb0fa..68b1f8ec3436 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/muxes/gpio-i2cmux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/muxes/gpio-i2cmux.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/muxes/i2c-mux-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/muxes/i2c-mux-gpio.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/i2c-mux.h&gt;</div><div class='del'>-#include &lt;linux/gpio-i2cmux.h&gt;</div><div class='add'>+#include &lt;linux/i2c-mux-gpio.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -20,10 +20,10 @@</div><div class='ctx'> struct gpiomux {</div><div class='ctx'> 	struct i2c_adapter *parent;</div><div class='ctx'> 	struct i2c_adapter **adap; /* child busses */</div><div class='del'>-	struct gpio_i2cmux_platform_data data;</div><div class='add'>+	struct i2c_mux_gpio_platform_data data;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void gpiomux_set(const struct gpiomux *mux, unsigned val)</div><div class='add'>+static void i2c_mux_gpio_set(const struct gpiomux *mux, unsigned val)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -31,28 +31,28 @@ static void gpiomux_set(const struct gpiomux *mux, unsigned val)</div><div class='ctx'> 		gpio_set_value(mux-&gt;data.gpios[i], val &amp; (1 &lt;&lt; i));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gpiomux_select(struct i2c_adapter *adap, void *data, u32 chan)</div><div class='add'>+static int i2c_mux_gpio_select(struct i2c_adapter *adap, void *data, u32 chan)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpiomux *mux = data;</div><div class='ctx'> </div><div class='del'>-	gpiomux_set(mux, mux-&gt;data.values[chan]);</div><div class='add'>+	i2c_mux_gpio_set(mux, mux-&gt;data.values[chan]);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gpiomux_deselect(struct i2c_adapter *adap, void *data, u32 chan)</div><div class='add'>+static int i2c_mux_gpio_deselect(struct i2c_adapter *adap, void *data, u32 chan)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpiomux *mux = data;</div><div class='ctx'> </div><div class='del'>-	gpiomux_set(mux, mux-&gt;data.idle);</div><div class='add'>+	i2c_mux_gpio_set(mux, mux-&gt;data.idle);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __devinit gpiomux_probe(struct platform_device *pdev)</div><div class='add'>+static int __devinit i2c_mux_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpiomux *mux;</div><div class='del'>-	struct gpio_i2cmux_platform_data *pdata;</div><div class='add'>+	struct i2c_mux_gpio_platform_data *pdata;</div><div class='ctx'> 	struct i2c_adapter *parent;</div><div class='ctx'> 	int (*deselect) (struct i2c_adapter *, void *, u32);</div><div class='ctx'> 	unsigned initial_state;</div><div class='hunk'>@@ -86,16 +86,16 @@ static int __devinit gpiomux_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto alloc_failed2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;idle != GPIO_I2CMUX_NO_IDLE) {</div><div class='add'>+	if (pdata-&gt;idle != I2C_MUX_GPIO_NO_IDLE) {</div><div class='ctx'> 		initial_state = pdata-&gt;idle;</div><div class='del'>-		deselect = gpiomux_deselect;</div><div class='add'>+		deselect = i2c_mux_gpio_deselect;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		initial_state = pdata-&gt;values[0];</div><div class='ctx'> 		deselect = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;n_gpios; i++) {</div><div class='del'>-		ret = gpio_request(pdata-&gt;gpios[i], "gpio-i2cmux");</div><div class='add'>+		ret = gpio_request(pdata-&gt;gpios[i], "i2c-mux-gpio");</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto err_request_gpio;</div><div class='ctx'> 		gpio_direction_output(pdata-&gt;gpios[i],</div><div class='hunk'>@@ -105,8 +105,8 @@ static int __devinit gpiomux_probe(struct platform_device *pdev)</div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;n_values; i++) {</div><div class='ctx'> 		u32 nr = pdata-&gt;base_nr ? (pdata-&gt;base_nr + i) : 0;</div><div class='ctx'> </div><div class='del'>-		mux-&gt;adap[i] = i2c_add_mux_adapter(parent, mux, nr, i,</div><div class='del'>-						   gpiomux_select, deselect);</div><div class='add'>+		mux-&gt;adap[i] = i2c_add_mux_adapter(parent, &amp;pdev-&gt;dev, mux, nr, i,</div><div class='add'>+						   i2c_mux_gpio_select, deselect);</div><div class='ctx'> 		if (!mux-&gt;adap[i]) {</div><div class='ctx'> 			ret = -ENODEV;</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev, "Failed to add adapter %d\n", i);</div><div class='hunk'>@@ -137,7 +137,7 @@ alloc_failed:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __devexit gpiomux_remove(struct platform_device *pdev)</div><div class='add'>+static int __devexit i2c_mux_gpio_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpiomux *mux = platform_get_drvdata(pdev);</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -156,18 +156,18 @@ static int __devexit gpiomux_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct platform_driver gpiomux_driver = {</div><div class='del'>-	.probe	= gpiomux_probe,</div><div class='del'>-	.remove	= __devexit_p(gpiomux_remove),</div><div class='add'>+static struct platform_driver i2c_mux_gpio_driver = {</div><div class='add'>+	.probe	= i2c_mux_gpio_probe,</div><div class='add'>+	.remove	= __devexit_p(i2c_mux_gpio_remove),</div><div class='ctx'> 	.driver	= {</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='del'>-		.name	= "gpio-i2cmux",</div><div class='add'>+		.name	= "i2c-mux-gpio",</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-module_platform_driver(gpiomux_driver);</div><div class='add'>+module_platform_driver(i2c_mux_gpio_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("GPIO-based I2C multiplexer driver");</div><div class='ctx'> MODULE_AUTHOR("Peter Korsgaard &lt;peter.korsgaard@barco.com&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_ALIAS("platform:gpio-i2cmux");</div><div class='add'>+MODULE_ALIAS("platform:i2c-mux-gpio");</div><div class='head'>diff --git a/drivers/i2c/muxes/pca9541.c b/drivers/i2c/muxes/i2c-mux-pca9541.c<br/>index e0df9b6c66b3..8aacde1516ac 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/muxes/pca9541.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/muxes/pca9541.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/muxes/i2c-mux-pca9541.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/muxes/i2c-mux-pca9541.c</a></div><div class='hunk'>@@ -353,7 +353,8 @@ static int pca9541_probe(struct i2c_client *client,</div><div class='ctx'> 	force = 0;</div><div class='ctx'> 	if (pdata)</div><div class='ctx'> 		force = pdata-&gt;modes[0].adap_id;</div><div class='del'>-	data-&gt;mux_adap = i2c_add_mux_adapter(adap, client, force, 0,</div><div class='add'>+	data-&gt;mux_adap = i2c_add_mux_adapter(adap, &amp;client-&gt;dev, client,</div><div class='add'>+					     force, 0,</div><div class='ctx'> 					     pca9541_select_chan,</div><div class='ctx'> 					     pca9541_release_chan);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c<br/>index 0e37ef27aa12..f2dfe0d8fcce 100644<br/>--- a/<a href='/drm-misc/tree/drivers/i2c/muxes/pca954x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/i2c/muxes/pca954x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/muxes/i2c-mux-pca954x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/muxes/i2c-mux-pca954x.c</a></div><div class='hunk'>@@ -226,7 +226,7 @@ static int pca954x_probe(struct i2c_client *client,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		data-&gt;virt_adaps[num] =</div><div class='del'>-			i2c_add_mux_adapter(adap, client,</div><div class='add'>+			i2c_add_mux_adapter(adap, &amp;client-&gt;dev, client,</div><div class='ctx'> 				force, num, pca954x_select_chan,</div><div class='ctx'> 				(pdata &amp;&amp; pdata-&gt;modes[num].deselect_on_exit)</div><div class='ctx'> 					? pca954x_deselect_mux : NULL);</div><div class='head'>diff --git a/drivers/i2c/muxes/i2c-mux-pinctrl.c b/drivers/i2c/muxes/i2c-mux-pinctrl.c<br/>new file mode 100644<br/>index 000000000000..46a669763476<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/i2c/muxes/i2c-mux-pinctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/i2c/muxes/i2c-mux-pinctrl.c</a></div><div class='hunk'>@@ -0,0 +1,279 @@</div><div class='add'>+/*</div><div class='add'>+ * I2C multiplexer using pinctrl API</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/i2c-mux.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_i2c.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='add'>+#include &lt;linux/i2c-mux-pinctrl.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+struct i2c_mux_pinctrl {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct i2c_mux_pinctrl_platform_data *pdata;</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='add'>+	struct pinctrl_state **states;</div><div class='add'>+	struct pinctrl_state *state_idle;</div><div class='add'>+	struct i2c_adapter *parent;</div><div class='add'>+	struct i2c_adapter **busses;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int i2c_mux_pinctrl_select(struct i2c_adapter *adap, void *data,</div><div class='add'>+				  u32 chan)</div><div class='add'>+{</div><div class='add'>+	struct i2c_mux_pinctrl *mux = data;</div><div class='add'>+</div><div class='add'>+	return pinctrl_select_state(mux-&gt;pinctrl, mux-&gt;states[chan]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int i2c_mux_pinctrl_deselect(struct i2c_adapter *adap, void *data,</div><div class='add'>+				    u32 chan)</div><div class='add'>+{</div><div class='add'>+	struct i2c_mux_pinctrl *mux = data;</div><div class='add'>+</div><div class='add'>+	return pinctrl_select_state(mux-&gt;pinctrl, mux-&gt;state_idle);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static int i2c_mux_pinctrl_parse_dt(struct i2c_mux_pinctrl *mux,</div><div class='add'>+				struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	int num_names, i, ret;</div><div class='add'>+	struct device_node *adapter_np;</div><div class='add'>+	struct i2c_adapter *adapter;</div><div class='add'>+</div><div class='add'>+	if (!np)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mux-&gt;pdata = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*mux-&gt;pdata), GFP_KERNEL);</div><div class='add'>+	if (!mux-&gt;pdata) {</div><div class='add'>+		dev_err(mux-&gt;dev,</div><div class='add'>+			"Cannot allocate i2c_mux_pinctrl_platform_data\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_names = of_property_count_strings(np, "pinctrl-names");</div><div class='add'>+	if (num_names &lt; 0) {</div><div class='add'>+		dev_err(mux-&gt;dev, "Cannot parse pinctrl-names: %d\n",</div><div class='add'>+			num_names);</div><div class='add'>+		return num_names;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mux-&gt;pdata-&gt;pinctrl_states = devm_kzalloc(&amp;pdev-&gt;dev,</div><div class='add'>+		sizeof(*mux-&gt;pdata-&gt;pinctrl_states) * num_names,</div><div class='add'>+		GFP_KERNEL);</div><div class='add'>+	if (!mux-&gt;pdata-&gt;pinctrl_states) {</div><div class='add'>+		dev_err(mux-&gt;dev, "Cannot allocate pinctrl_states\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_names; i++) {</div><div class='add'>+		ret = of_property_read_string_index(np, "pinctrl-names", i,</div><div class='add'>+			&amp;mux-&gt;pdata-&gt;pinctrl_states[mux-&gt;pdata-&gt;bus_count]);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(mux-&gt;dev, "Cannot parse pinctrl-names: %d\n",</div><div class='add'>+				ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		if (!strcmp(mux-&gt;pdata-&gt;pinctrl_states[mux-&gt;pdata-&gt;bus_count],</div><div class='add'>+			    "idle")) {</div><div class='add'>+			if (i != num_names - 1) {</div><div class='add'>+				dev_err(mux-&gt;dev, "idle state must be last\n");</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+			mux-&gt;pdata-&gt;pinctrl_state_idle = "idle";</div><div class='add'>+		} else {</div><div class='add'>+			mux-&gt;pdata-&gt;bus_count++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adapter_np = of_parse_phandle(np, "i2c-parent", 0);</div><div class='add'>+	if (!adapter_np) {</div><div class='add'>+		dev_err(mux-&gt;dev, "Cannot parse i2c-parent\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+	adapter = of_find_i2c_adapter_by_node(adapter_np);</div><div class='add'>+	if (!adapter) {</div><div class='add'>+		dev_err(mux-&gt;dev, "Cannot find parent bus\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+	mux-&gt;pdata-&gt;parent_bus_num = i2c_adapter_id(adapter);</div><div class='add'>+	put_device(&amp;adapter-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline int i2c_mux_pinctrl_parse_dt(struct i2c_mux_pinctrl *mux,</div><div class='add'>+					   struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int __devinit i2c_mux_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct i2c_mux_pinctrl *mux;</div><div class='add'>+	int (*deselect)(struct i2c_adapter *, void *, u32);</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	mux = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*mux), GFP_KERNEL);</div><div class='add'>+	if (!mux) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Cannot allocate i2c_mux_pinctrl\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	platform_set_drvdata(pdev, mux);</div><div class='add'>+</div><div class='add'>+	mux-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	mux-&gt;pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	if (!mux-&gt;pdata) {</div><div class='add'>+		ret = i2c_mux_pinctrl_parse_dt(mux, pdev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+	if (!mux-&gt;pdata) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Missing platform data\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mux-&gt;states = devm_kzalloc(&amp;pdev-&gt;dev,</div><div class='add'>+				   sizeof(*mux-&gt;states) * mux-&gt;pdata-&gt;bus_count,</div><div class='add'>+				   GFP_KERNEL);</div><div class='add'>+	if (!mux-&gt;states) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Cannot allocate states\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mux-&gt;busses = devm_kzalloc(&amp;pdev-&gt;dev,</div><div class='add'>+				   sizeof(mux-&gt;busses) * mux-&gt;pdata-&gt;bus_count,</div><div class='add'>+				   GFP_KERNEL);</div><div class='add'>+	if (!mux-&gt;states) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Cannot allocate busses\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mux-&gt;pinctrl = devm_pinctrl_get(&amp;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(mux-&gt;pinctrl)) {</div><div class='add'>+		ret = PTR_ERR(mux-&gt;pinctrl);</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Cannot get pinctrl: %d\n", ret);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; mux-&gt;pdata-&gt;bus_count; i++) {</div><div class='add'>+		mux-&gt;states[i] = pinctrl_lookup_state(mux-&gt;pinctrl,</div><div class='add'>+						mux-&gt;pdata-&gt;pinctrl_states[i]);</div><div class='add'>+			if (IS_ERR(mux-&gt;states[i])) {</div><div class='add'>+				ret = PTR_ERR(mux-&gt;states[i]);</div><div class='add'>+				dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+					"Cannot look up pinctrl state %s: %d\n",</div><div class='add'>+					mux-&gt;pdata-&gt;pinctrl_states[i], ret);</div><div class='add'>+				goto err;</div><div class='add'>+			}</div><div class='add'>+	}</div><div class='add'>+	if (mux-&gt;pdata-&gt;pinctrl_state_idle) {</div><div class='add'>+		mux-&gt;state_idle = pinctrl_lookup_state(mux-&gt;pinctrl,</div><div class='add'>+						mux-&gt;pdata-&gt;pinctrl_state_idle);</div><div class='add'>+		if (IS_ERR(mux-&gt;state_idle)) {</div><div class='add'>+			ret = PTR_ERR(mux-&gt;state_idle);</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+				"Cannot look up pinctrl state %s: %d\n",</div><div class='add'>+				mux-&gt;pdata-&gt;pinctrl_state_idle, ret);</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		deselect = i2c_mux_pinctrl_deselect;</div><div class='add'>+	} else {</div><div class='add'>+		deselect = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mux-&gt;parent = i2c_get_adapter(mux-&gt;pdata-&gt;parent_bus_num);</div><div class='add'>+	if (!mux-&gt;parent) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Parent adapter (%d) not found\n",</div><div class='add'>+			mux-&gt;pdata-&gt;parent_bus_num);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; mux-&gt;pdata-&gt;bus_count; i++) {</div><div class='add'>+		u32 bus = mux-&gt;pdata-&gt;base_bus_num ?</div><div class='add'>+				(mux-&gt;pdata-&gt;base_bus_num + i) : 0;</div><div class='add'>+</div><div class='add'>+		mux-&gt;busses[i] = i2c_add_mux_adapter(mux-&gt;parent, &amp;pdev-&gt;dev,</div><div class='add'>+						     mux, bus, i,</div><div class='add'>+						     i2c_mux_pinctrl_select,</div><div class='add'>+						     deselect);</div><div class='add'>+		if (!mux-&gt;busses[i]) {</div><div class='add'>+			ret = -ENODEV;</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "Failed to add adapter %d\n", i);</div><div class='add'>+			goto err_del_adapter;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_del_adapter:</div><div class='add'>+	for (; i &gt; 0; i--)</div><div class='add'>+		i2c_del_mux_adapter(mux-&gt;busses[i - 1]);</div><div class='add'>+	i2c_put_adapter(mux-&gt;parent);</div><div class='add'>+err:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit i2c_mux_pinctrl_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct i2c_mux_pinctrl *mux = platform_get_drvdata(pdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; mux-&gt;pdata-&gt;bus_count; i++)</div><div class='add'>+		i2c_del_mux_adapter(mux-&gt;busses[i]);</div><div class='add'>+</div><div class='add'>+	i2c_put_adapter(mux-&gt;parent);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static const struct of_device_id i2c_mux_pinctrl_of_match[] __devinitconst = {</div><div class='add'>+	{ .compatible = "i2c-mux-pinctrl", },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, i2c_mux_pinctrl_of_match);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static struct platform_driver i2c_mux_pinctrl_driver = {</div><div class='add'>+	.driver	= {</div><div class='add'>+		.name	= "i2c-mux-pinctrl",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+		.of_match_table = of_match_ptr(i2c_mux_pinctrl_of_match),</div><div class='add'>+	},</div><div class='add'>+	.probe	= i2c_mux_pinctrl_probe,</div><div class='add'>+	.remove	= __devexit_p(i2c_mux_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+module_platform_driver(i2c_mux_pinctrl_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("pinctrl-based I2C multiplexer driver");</div><div class='add'>+MODULE_AUTHOR("Stephen Warren &lt;swarren@nvidia.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_ALIAS("platform:i2c-mux-pinctrl");</div><div class='head'>diff --git a/drivers/ieee802154/Kconfig b/drivers/ieee802154/Kconfig<br/>index 9b9f43aa2f85..15c064073701 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ieee802154/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ieee802154/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ieee802154/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ieee802154/Kconfig</a></div><div class='hunk'>@@ -19,4 +19,12 @@ config IEEE802154_FAKEHARD</div><div class='ctx'> </div><div class='ctx'>           This driver can also be built as a module. To do so say M here.</div><div class='ctx'> 	  The module will be called 'fakehard'.</div><div class='add'>+config IEEE802154_FAKELB</div><div class='add'>+	depends on IEEE802154_DRIVERS &amp;&amp; MAC802154</div><div class='add'>+	tristate "IEEE 802.15.4 loopback driver"</div><div class='add'>+	---help---</div><div class='add'>+	  Say Y here to enable the fake driver that can emulate a net</div><div class='add'>+	  of several interconnected radio devices.</div><div class='ctx'> </div><div class='add'>+	  This driver can also be built as a module. To do so say M here.</div><div class='add'>+	  The module will be called 'fakelb'.</div><div class='head'>diff --git a/drivers/ieee802154/Makefile b/drivers/ieee802154/Makefile<br/>index 800a3894af0d..ea784ea6f0f8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ieee802154/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ieee802154/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ieee802154/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ieee802154/Makefile</a></div><div class='hunk'>@@ -1 +1,2 @@</div><div class='ctx'> obj-$(CONFIG_IEEE802154_FAKEHARD) += fakehard.o</div><div class='add'>+obj-$(CONFIG_IEEE802154_FAKELB) += fakelb.o</div><div class='head'>diff --git a/drivers/ieee802154/fakelb.c b/drivers/ieee802154/fakelb.c<br/>new file mode 100644<br/>index 000000000000..e7456fcd0913<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/ieee802154/fakelb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ieee802154/fakelb.c</a></div><div class='hunk'>@@ -0,0 +1,294 @@</div><div class='add'>+/*</div><div class='add'>+ * Loopback IEEE 802.15.4 interface</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2007-2012 Siemens AG</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2</div><div class='add'>+ * as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along</div><div class='add'>+ * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ *</div><div class='add'>+ * Written by:</div><div class='add'>+ * Sergey Lapin &lt;slapin@ossfans.org&gt;</div><div class='add'>+ * Dmitry Eremin-Solenikov &lt;dbaryshkov@gmail.com&gt;</div><div class='add'>+ * Alexander Smirnov &lt;alex.bluesman.smirnov@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/timer.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;net/mac802154.h&gt;</div><div class='add'>+#include &lt;net/wpan-phy.h&gt;</div><div class='add'>+</div><div class='add'>+static int numlbs = 1;</div><div class='add'>+</div><div class='add'>+struct fakelb_dev_priv {</div><div class='add'>+	struct ieee802154_dev *dev;</div><div class='add'>+</div><div class='add'>+	struct list_head list;</div><div class='add'>+	struct fakelb_priv *fake;</div><div class='add'>+</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	bool working;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fakelb_priv {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	rwlock_t lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fakelb_hw_ed(struct ieee802154_dev *dev, u8 *level)</div><div class='add'>+{</div><div class='add'>+	might_sleep();</div><div class='add'>+	BUG_ON(!level);</div><div class='add'>+	*level = 0xbe;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fakelb_hw_channel(struct ieee802154_dev *dev, int page, int channel)</div><div class='add'>+{</div><div class='add'>+	pr_debug("set channel to %d\n", channel);</div><div class='add'>+</div><div class='add'>+	might_sleep();</div><div class='add'>+	dev-&gt;phy-&gt;current_page = page;</div><div class='add'>+	dev-&gt;phy-&gt;current_channel = channel;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fakelb_hw_deliver(struct fakelb_dev_priv *priv, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *newskb;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;priv-&gt;lock);</div><div class='add'>+	if (priv-&gt;working) {</div><div class='add'>+		newskb = pskb_copy(skb, GFP_ATOMIC);</div><div class='add'>+		ieee802154_rx_irqsafe(priv-&gt;dev, newskb, 0xcc);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;priv-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fakelb_hw_xmit(struct ieee802154_dev *dev, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct fakelb_dev_priv *priv = dev-&gt;priv;</div><div class='add'>+	struct fakelb_priv *fake = priv-&gt;fake;</div><div class='add'>+</div><div class='add'>+	might_sleep();</div><div class='add'>+</div><div class='add'>+	read_lock_bh(&amp;fake-&gt;lock);</div><div class='add'>+	if (priv-&gt;list.next == priv-&gt;list.prev) {</div><div class='add'>+		/* we are the only one device */</div><div class='add'>+		fakelb_hw_deliver(priv, skb);</div><div class='add'>+	} else {</div><div class='add'>+		struct fakelb_dev_priv *dp;</div><div class='add'>+		list_for_each_entry(dp, &amp;priv-&gt;fake-&gt;list, list) {</div><div class='add'>+			if (dp != priv &amp;&amp;</div><div class='add'>+			    (dp-&gt;dev-&gt;phy-&gt;current_channel ==</div><div class='add'>+			     priv-&gt;dev-&gt;phy-&gt;current_channel))</div><div class='add'>+				fakelb_hw_deliver(dp, skb);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	read_unlock_bh(&amp;fake-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fakelb_hw_start(struct ieee802154_dev *dev) {</div><div class='add'>+	struct fakelb_dev_priv *priv = dev-&gt;priv;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;priv-&gt;lock);</div><div class='add'>+	if (priv-&gt;working)</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;working = 1;</div><div class='add'>+	spin_unlock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fakelb_hw_stop(struct ieee802154_dev *dev) {</div><div class='add'>+	struct fakelb_dev_priv *priv = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;priv-&gt;lock);</div><div class='add'>+	priv-&gt;working = 0;</div><div class='add'>+	spin_unlock(&amp;priv-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ieee802154_ops fakelb_ops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.xmit = fakelb_hw_xmit,</div><div class='add'>+	.ed = fakelb_hw_ed,</div><div class='add'>+	.set_channel = fakelb_hw_channel,</div><div class='add'>+	.start = fakelb_hw_start,</div><div class='add'>+	.stop = fakelb_hw_stop,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Number of dummy devices to be set up by this module. */</div><div class='add'>+module_param(numlbs, int, 0);</div><div class='add'>+MODULE_PARM_DESC(numlbs, " number of pseudo devices");</div><div class='add'>+</div><div class='add'>+static int fakelb_add_one(struct device *dev, struct fakelb_priv *fake)</div><div class='add'>+{</div><div class='add'>+	struct fakelb_dev_priv *priv;</div><div class='add'>+	int err;</div><div class='add'>+	struct ieee802154_dev *ieee;</div><div class='add'>+</div><div class='add'>+	ieee = ieee802154_alloc_device(sizeof(*priv), &amp;fakelb_ops);</div><div class='add'>+	if (!ieee)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv = ieee-&gt;priv;</div><div class='add'>+	priv-&gt;dev = ieee;</div><div class='add'>+</div><div class='add'>+	/* 868 MHz BPSK	802.15.4-2003 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[0] |= 1;</div><div class='add'>+	/* 915 MHz BPSK	802.15.4-2003 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[0] |= 0x7fe;</div><div class='add'>+	/* 2.4 GHz O-QPSK 802.15.4-2003 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[0] |= 0x7FFF800;</div><div class='add'>+	/* 868 MHz ASK 802.15.4-2006 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[1] |= 1;</div><div class='add'>+	/* 915 MHz ASK 802.15.4-2006 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[1] |= 0x7fe;</div><div class='add'>+	/* 868 MHz O-QPSK 802.15.4-2006 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[2] |= 1;</div><div class='add'>+	/* 915 MHz O-QPSK 802.15.4-2006 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[2] |= 0x7fe;</div><div class='add'>+	/* 2.4 GHz CSS 802.15.4a-2007 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[3] |= 0x3fff;</div><div class='add'>+	/* UWB Sub-gigahertz 802.15.4a-2007 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[4] |= 1;</div><div class='add'>+	/* UWB Low band 802.15.4a-2007 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[4] |= 0x1e;</div><div class='add'>+	/* UWB High band 802.15.4a-2007 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[4] |= 0xffe0;</div><div class='add'>+	/* 750 MHz O-QPSK 802.15.4c-2009 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[5] |= 0xf;</div><div class='add'>+	/* 750 MHz MPSK 802.15.4c-2009 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[5] |= 0xf0;</div><div class='add'>+	/* 950 MHz BPSK 802.15.4d-2009 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[6] |= 0x3ff;</div><div class='add'>+	/* 950 MHz GFSK 802.15.4d-2009 */</div><div class='add'>+	ieee-&gt;phy-&gt;channels_supported[6] |= 0x3ffc00;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;priv-&gt;list);</div><div class='add'>+	priv-&gt;fake = fake;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	ieee-&gt;parent = dev;</div><div class='add'>+</div><div class='add'>+	err = ieee802154_register_device(ieee);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_reg;</div><div class='add'>+</div><div class='add'>+	write_lock_bh(&amp;fake-&gt;lock);</div><div class='add'>+	list_add_tail(&amp;priv-&gt;list, &amp;fake-&gt;list);</div><div class='add'>+	write_unlock_bh(&amp;fake-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_reg:</div><div class='add'>+	ieee802154_free_device(priv-&gt;dev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fakelb_del(struct fakelb_dev_priv *priv)</div><div class='add'>+{</div><div class='add'>+	write_lock_bh(&amp;priv-&gt;fake-&gt;lock);</div><div class='add'>+	list_del(&amp;priv-&gt;list);</div><div class='add'>+	write_unlock_bh(&amp;priv-&gt;fake-&gt;lock);</div><div class='add'>+</div><div class='add'>+	ieee802154_unregister_device(priv-&gt;dev);</div><div class='add'>+	ieee802154_free_device(priv-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit fakelb_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct fakelb_priv *priv;</div><div class='add'>+	struct fakelb_dev_priv *dp;</div><div class='add'>+	int err = -ENOMEM;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(struct fakelb_priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		goto err_alloc;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;priv-&gt;list);</div><div class='add'>+	rwlock_init(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; numlbs; i++) {</div><div class='add'>+		err = fakelb_add_one(&amp;pdev-&gt;dev, priv);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_slave;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, priv);</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev, "added ieee802154 hardware\n");</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_slave:</div><div class='add'>+	list_for_each_entry(dp, &amp;priv-&gt;list, list)</div><div class='add'>+		fakelb_del(dp);</div><div class='add'>+	kfree(priv);</div><div class='add'>+err_alloc:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit fakelb_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct fakelb_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+	struct fakelb_dev_priv *dp, *temp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(dp, temp, &amp;priv-&gt;list, list)</div><div class='add'>+		fakelb_del(dp);</div><div class='add'>+	kfree(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_device *ieee802154fake_dev;</div><div class='add'>+</div><div class='add'>+static struct platform_driver ieee802154fake_driver = {</div><div class='add'>+	.probe = fakelb_probe,</div><div class='add'>+	.remove = __devexit_p(fakelb_remove),</div><div class='add'>+	.driver = {</div><div class='add'>+			.name = "ieee802154fakelb",</div><div class='add'>+			.owner = THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __init int fakelb_init_module(void)</div><div class='add'>+{</div><div class='add'>+	ieee802154fake_dev = platform_device_register_simple(</div><div class='add'>+			     "ieee802154fakelb", -1, NULL, 0);</div><div class='add'>+	return platform_driver_register(&amp;ieee802154fake_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __exit void fake_remove_module(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;ieee802154fake_driver);</div><div class='add'>+	platform_device_unregister(ieee802154fake_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(fakelb_init_module);</div><div class='add'>+module_exit(fake_remove_module);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/iio/Kconfig b/drivers/iio/Kconfig<br/>new file mode 100644<br/>index 000000000000..56eecefcec75<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/iio/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+#</div><div class='add'>+# Industrial I/O subsytem configuration</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+menuconfig IIO</div><div class='add'>+	tristate "Industrial I/O support"</div><div class='add'>+	depends on GENERIC_HARDIRQS</div><div class='add'>+	help</div><div class='add'>+	  The industrial I/O subsystem provides a unified framework for</div><div class='add'>+	  drivers for many different types of embedded sensors using a</div><div class='add'>+	  number of different physical interfaces (i2c, spi, etc). See</div><div class='add'>+	  Documentation/iio for more information.</div><div class='add'>+</div><div class='add'>+if IIO</div><div class='add'>+</div><div class='add'>+config IIO_BUFFER</div><div class='add'>+	bool "Enable buffer support within IIO"</div><div class='add'>+	help</div><div class='add'>+	  Provide core support for various buffer based data</div><div class='add'>+	  acquisition methods.</div><div class='add'>+</div><div class='add'>+if IIO_BUFFER</div><div class='add'>+</div><div class='add'>+config IIO_KFIFO_BUF</div><div class='add'>+	select IIO_TRIGGER</div><div class='add'>+	tristate "Industrial I/O buffering based on kfifo"</div><div class='add'>+	help</div><div class='add'>+	  A simple fifo based on kfifo.  Use this if you want a fifo</div><div class='add'>+	  rather than a ring buffer. Note that this currently provides</div><div class='add'>+	  no buffer events so it is up to userspace to work out how</div><div class='add'>+	  often to read from the buffer.</div><div class='add'>+</div><div class='add'>+endif # IIO_BUFFER</div><div class='add'>+</div><div class='add'>+config IIO_TRIGGER</div><div class='add'>+	boolean "Enable triggered sampling support"</div><div class='add'>+	help</div><div class='add'>+	  Provides IIO core support for triggers.  Currently these</div><div class='add'>+	  are used to initialize capture of samples to push into</div><div class='add'>+	  ring buffers.  The triggers are effectively a 'capture</div><div class='add'>+	  data now' interrupt.</div><div class='add'>+</div><div class='add'>+config IIO_CONSUMERS_PER_TRIGGER</div><div class='add'>+       int "Maximum number of consumers per trigger"</div><div class='add'>+       depends on IIO_TRIGGER</div><div class='add'>+       default "2"</div><div class='add'>+       help</div><div class='add'>+	This value controls the maximum number of consumers that a</div><div class='add'>+	given trigger may handle. Default is 2.</div><div class='add'>+</div><div class='add'>+source "drivers/iio/adc/Kconfig"</div><div class='add'>+source "drivers/iio/amplifiers/Kconfig"</div><div class='add'>+</div><div class='add'>+endif # IIO</div><div class='head'>diff --git a/drivers/iio/Makefile b/drivers/iio/Makefile<br/>new file mode 100644<br/>index 000000000000..e425afd1480c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/iio/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/Makefile</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+#</div><div class='add'>+# Makefile for the industrial I/O core.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_IIO) += industrialio.o</div><div class='add'>+industrialio-y := industrialio-core.o industrialio-event.o inkern.o</div><div class='add'>+industrialio-$(CONFIG_IIO_BUFFER) += industrialio-buffer.o</div><div class='add'>+industrialio-$(CONFIG_IIO_TRIGGER) += industrialio-trigger.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_IIO_KFIFO_BUF) += kfifo_buf.o</div><div class='add'>+</div><div class='add'>+obj-y += adc/</div><div class='add'>+obj-y += amplifiers/</div><div class='head'>diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig<br/>new file mode 100644<br/>index 000000000000..9a0df8123cc4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/iio/adc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/adc/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+#</div><div class='add'>+# ADC drivers</div><div class='add'>+#</div><div class='add'>+menu "Analog to digital converters"</div><div class='add'>+</div><div class='add'>+config AT91_ADC</div><div class='add'>+	tristate "Atmel AT91 ADC"</div><div class='add'>+	depends on ARCH_AT91</div><div class='add'>+	select IIO_BUFFER</div><div class='add'>+	select IIO_KFIFO_BUF</div><div class='add'>+	select IIO_TRIGGER</div><div class='add'>+	select SYSFS</div><div class='add'>+	help</div><div class='add'>+	  Say yes here to build support for Atmel AT91 ADC.</div><div class='add'>+</div><div class='add'>+endmenu</div><div class='head'>diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile<br/>new file mode 100644<br/>index 000000000000..175c8d41ea99<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/iio/adc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/adc/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+#</div><div class='add'>+# Makefile for IIO ADC drivers</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_AT91_ADC) += at91_adc.o</div><div class='head'>diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c<br/>new file mode 100644<br/>index 000000000000..f18a95d80255<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/iio/adc/at91_adc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/adc/at91_adc.c</a></div><div class='hunk'>@@ -0,0 +1,802 @@</div><div class='add'>+/*</div><div class='add'>+ * Driver for the ADC present in the Atmel AT91 evaluation boards.</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2011 Free Electrons</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPLv2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitmap.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/wait.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/platform_data/at91_adc.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/iio/iio.h&gt;</div><div class='add'>+#include &lt;linux/iio/buffer.h&gt;</div><div class='add'>+#include &lt;linux/iio/kfifo_buf.h&gt;</div><div class='add'>+#include &lt;linux/iio/trigger.h&gt;</div><div class='add'>+#include &lt;linux/iio/trigger_consumer.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/at91_adc.h&gt;</div><div class='add'>+</div><div class='add'>+#define AT91_ADC_CHAN(st, ch) \</div><div class='add'>+	(st-&gt;registers-&gt;channel_base + (ch * 4))</div><div class='add'>+#define at91_adc_readl(st, reg) \</div><div class='add'>+	(readl_relaxed(st-&gt;reg_base + reg))</div><div class='add'>+#define at91_adc_writel(st, reg, val) \</div><div class='add'>+	(writel_relaxed(val, st-&gt;reg_base + reg))</div><div class='add'>+</div><div class='add'>+struct at91_adc_state {</div><div class='add'>+	struct clk		*adc_clk;</div><div class='add'>+	u16			*buffer;</div><div class='add'>+	unsigned long		channels_mask;</div><div class='add'>+	struct clk		*clk;</div><div class='add'>+	bool			done;</div><div class='add'>+	int			irq;</div><div class='add'>+	bool			irq_enabled;</div><div class='add'>+	u16			last_value;</div><div class='add'>+	struct mutex		lock;</div><div class='add'>+	u8			num_channels;</div><div class='add'>+	void __iomem		*reg_base;</div><div class='add'>+	struct at91_adc_reg_desc *registers;</div><div class='add'>+	u8			startup_time;</div><div class='add'>+	struct iio_trigger	**trig;</div><div class='add'>+	struct at91_adc_trigger	*trigger_list;</div><div class='add'>+	u32			trigger_number;</div><div class='add'>+	bool			use_external;</div><div class='add'>+	u32			vref_mv;</div><div class='add'>+	wait_queue_head_t	wq_data_avail;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static irqreturn_t at91_adc_trigger_handler(int irq, void *p)</div><div class='add'>+{</div><div class='add'>+	struct iio_poll_func *pf = p;</div><div class='add'>+	struct iio_dev *idev = pf-&gt;indio_dev;</div><div class='add'>+	struct at91_adc_state *st = iio_priv(idev);</div><div class='add'>+	struct iio_buffer *buffer = idev-&gt;buffer;</div><div class='add'>+	int i, j = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; idev-&gt;masklength; i++) {</div><div class='add'>+		if (!test_bit(i, idev-&gt;active_scan_mask))</div><div class='add'>+			continue;</div><div class='add'>+		st-&gt;buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, i));</div><div class='add'>+		j++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (idev-&gt;scan_timestamp) {</div><div class='add'>+		s64 *timestamp = (s64 *)((u8 *)st-&gt;buffer +</div><div class='add'>+					ALIGN(j, sizeof(s64)));</div><div class='add'>+		*timestamp = pf-&gt;timestamp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buffer-&gt;access-&gt;store_to(buffer, (u8 *)st-&gt;buffer, pf-&gt;timestamp);</div><div class='add'>+</div><div class='add'>+	iio_trigger_notify_done(idev-&gt;trig);</div><div class='add'>+	st-&gt;irq_enabled = true;</div><div class='add'>+</div><div class='add'>+	/* Needed to ACK the DRDY interruption */</div><div class='add'>+	at91_adc_readl(st, AT91_ADC_LCDR);</div><div class='add'>+</div><div class='add'>+	enable_irq(st-&gt;irq);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t at91_adc_eoc_trigger(int irq, void *private)</div><div class='add'>+{</div><div class='add'>+	struct iio_dev *idev = private;</div><div class='add'>+	struct at91_adc_state *st = iio_priv(idev);</div><div class='add'>+	u32 status = at91_adc_readl(st, st-&gt;registers-&gt;status_register);</div><div class='add'>+</div><div class='add'>+	if (!(status &amp; st-&gt;registers-&gt;drdy_mask))</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+	if (iio_buffer_enabled(idev)) {</div><div class='add'>+		disable_irq_nosync(irq);</div><div class='add'>+		st-&gt;irq_enabled = false;</div><div class='add'>+		iio_trigger_poll(idev-&gt;trig, iio_get_time_ns());</div><div class='add'>+	} else {</div><div class='add'>+		st-&gt;last_value = at91_adc_readl(st, AT91_ADC_LCDR);</div><div class='add'>+		st-&gt;done = true;</div><div class='add'>+		wake_up_interruptible(&amp;st-&gt;wq_data_avail);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int at91_adc_channel_init(struct iio_dev *idev)</div><div class='add'>+{</div><div class='add'>+	struct at91_adc_state *st = iio_priv(idev);</div><div class='add'>+	struct iio_chan_spec *chan_array, *timestamp;</div><div class='add'>+	int bit, idx = 0;</div><div class='add'>+</div><div class='add'>+	idev-&gt;num_channels = bitmap_weight(&amp;st-&gt;channels_mask,</div><div class='add'>+					   st-&gt;num_channels) + 1;</div><div class='add'>+</div><div class='add'>+	chan_array = devm_kzalloc(&amp;idev-&gt;dev,</div><div class='add'>+				  ((idev-&gt;num_channels + 1) *</div><div class='add'>+					sizeof(struct iio_chan_spec)),</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!chan_array)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(bit, &amp;st-&gt;channels_mask, st-&gt;num_channels) {</div><div class='add'>+		struct iio_chan_spec *chan = chan_array + idx;</div><div class='add'>+</div><div class='add'>+		chan-&gt;type = IIO_VOLTAGE;</div><div class='add'>+		chan-&gt;indexed = 1;</div><div class='add'>+		chan-&gt;channel = bit;</div><div class='add'>+		chan-&gt;scan_index = idx;</div><div class='add'>+		chan-&gt;scan_type.sign = 'u';</div><div class='add'>+		chan-&gt;scan_type.realbits = 10;</div><div class='add'>+		chan-&gt;scan_type.storagebits = 16;</div><div class='add'>+		chan-&gt;info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT |</div><div class='add'>+			IIO_CHAN_INFO_RAW_SEPARATE_BIT;</div><div class='add'>+		idx++;</div><div class='add'>+	}</div><div class='add'>+	timestamp = chan_array + idx;</div><div class='add'>+</div><div class='add'>+	timestamp-&gt;type = IIO_TIMESTAMP;</div><div class='add'>+	timestamp-&gt;channel = -1;</div><div class='add'>+	timestamp-&gt;scan_index = idx;</div><div class='add'>+	timestamp-&gt;scan_type.sign = 's';</div><div class='add'>+	timestamp-&gt;scan_type.realbits = 64;</div><div class='add'>+	timestamp-&gt;scan_type.storagebits = 64;</div><div class='add'>+</div><div class='add'>+	idev-&gt;channels = chan_array;</div><div class='add'>+	return idev-&gt;num_channels;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 at91_adc_get_trigger_value_by_name(struct iio_dev *idev,</div><div class='add'>+					     struct at91_adc_trigger *triggers,</div><div class='add'>+					     const char *trigger_name)</div><div class='add'>+{</div><div class='add'>+	struct at91_adc_state *st = iio_priv(idev);</div><div class='add'>+	u8 value = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; st-&gt;trigger_number; i++) {</div><div class='add'>+		char *name = kasprintf(GFP_KERNEL,</div><div class='add'>+				"%s-dev%d-%s",</div><div class='add'>+				idev-&gt;name,</div><div class='add'>+				idev-&gt;id,</div><div class='add'>+				triggers[i].name);</div><div class='add'>+		if (!name)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		if (strcmp(trigger_name, name) == 0) {</div><div class='add'>+			value = triggers[i].value;</div><div class='add'>+			kfree(name);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		kfree(name);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)</div><div class='add'>+{</div><div class='add'>+	struct iio_dev *idev = trig-&gt;private_data;</div><div class='add'>+	struct at91_adc_state *st = iio_priv(idev);</div><div class='add'>+	struct iio_buffer *buffer = idev-&gt;buffer;</div><div class='add'>+	struct at91_adc_reg_desc *reg = st-&gt;registers;</div><div class='add'>+	u32 status = at91_adc_readl(st, reg-&gt;trigger_register);</div><div class='add'>+	u8 value;</div><div class='add'>+	u8 bit;</div><div class='add'>+</div><div class='add'>+	value = at91_adc_get_trigger_value_by_name(idev,</div><div class='add'>+						   st-&gt;trigger_list,</div><div class='add'>+						   idev-&gt;trig-&gt;name);</div><div class='add'>+	if (value == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (state) {</div><div class='add'>+		st-&gt;buffer = kmalloc(idev-&gt;scan_bytes, GFP_KERNEL);</div><div class='add'>+		if (st-&gt;buffer == NULL)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		at91_adc_writel(st, reg-&gt;trigger_register,</div><div class='add'>+				status | value);</div><div class='add'>+</div><div class='add'>+		for_each_set_bit(bit, buffer-&gt;scan_mask,</div><div class='add'>+				 st-&gt;num_channels) {</div><div class='add'>+			struct iio_chan_spec const *chan = idev-&gt;channels + bit;</div><div class='add'>+			at91_adc_writel(st, AT91_ADC_CHER,</div><div class='add'>+					AT91_ADC_CH(chan-&gt;channel));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		at91_adc_writel(st, AT91_ADC_IER, reg-&gt;drdy_mask);</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		at91_adc_writel(st, AT91_ADC_IDR, reg-&gt;drdy_mask);</div><div class='add'>+</div><div class='add'>+		at91_adc_writel(st, reg-&gt;trigger_register,</div><div class='add'>+				status &amp; ~value);</div><div class='add'>+</div><div class='add'>+		for_each_set_bit(bit, buffer-&gt;scan_mask,</div><div class='add'>+				 st-&gt;num_channels) {</div><div class='add'>+			struct iio_chan_spec const *chan = idev-&gt;channels + bit;</div><div class='add'>+			at91_adc_writel(st, AT91_ADC_CHDR,</div><div class='add'>+					AT91_ADC_CH(chan-&gt;channel));</div><div class='add'>+		}</div><div class='add'>+		kfree(st-&gt;buffer);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct iio_trigger_ops at91_adc_trigger_ops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.set_trigger_state = &amp;at91_adc_configure_trigger,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev,</div><div class='add'>+						     struct at91_adc_trigger *trigger)</div><div class='add'>+{</div><div class='add'>+	struct iio_trigger *trig;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	trig = iio_trigger_alloc("%s-dev%d-%s", idev-&gt;name,</div><div class='add'>+				 idev-&gt;id, trigger-&gt;name);</div><div class='add'>+	if (trig == NULL)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	trig-&gt;dev.parent = idev-&gt;dev.parent;</div><div class='add'>+	trig-&gt;private_data = idev;</div><div class='add'>+	trig-&gt;ops = &amp;at91_adc_trigger_ops;</div><div class='add'>+</div><div class='add'>+	ret = iio_trigger_register(trig);</div><div class='add'>+	if (ret)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return trig;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int at91_adc_trigger_init(struct iio_dev *idev)</div><div class='add'>+{</div><div class='add'>+	struct at91_adc_state *st = iio_priv(idev);</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	st-&gt;trig = devm_kzalloc(&amp;idev-&gt;dev,</div><div class='add'>+				st-&gt;trigger_number * sizeof(st-&gt;trig),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (st-&gt;trig == NULL) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; st-&gt;trigger_number; i++) {</div><div class='add'>+		if (st-&gt;trigger_list[i].is_external &amp;&amp; !(st-&gt;use_external))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		st-&gt;trig[i] = at91_adc_allocate_trigger(idev,</div><div class='add'>+							st-&gt;trigger_list + i);</div><div class='add'>+		if (st-&gt;trig[i] == NULL) {</div><div class='add'>+			dev_err(&amp;idev-&gt;dev,</div><div class='add'>+				"Could not allocate trigger %d\n", i);</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto error_trigger;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_trigger:</div><div class='add'>+	for (i--; i &gt;= 0; i--) {</div><div class='add'>+		iio_trigger_unregister(st-&gt;trig[i]);</div><div class='add'>+		iio_trigger_free(st-&gt;trig[i]);</div><div class='add'>+	}</div><div class='add'>+error_ret:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void at91_adc_trigger_remove(struct iio_dev *idev)</div><div class='add'>+{</div><div class='add'>+	struct at91_adc_state *st = iio_priv(idev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; st-&gt;trigger_number; i++) {</div><div class='add'>+		iio_trigger_unregister(st-&gt;trig[i]);</div><div class='add'>+		iio_trigger_free(st-&gt;trig[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct iio_buffer_setup_ops at91_adc_buffer_ops = {</div><div class='add'>+	.preenable = &amp;iio_sw_buffer_preenable,</div><div class='add'>+	.postenable = &amp;iio_triggered_buffer_postenable,</div><div class='add'>+	.predisable = &amp;iio_triggered_buffer_predisable,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int at91_adc_buffer_init(struct iio_dev *idev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	idev-&gt;buffer = iio_kfifo_allocate(idev);</div><div class='add'>+	if (!idev-&gt;buffer) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	idev-&gt;pollfunc = iio_alloc_pollfunc(&amp;iio_pollfunc_store_time,</div><div class='add'>+					    &amp;at91_adc_trigger_handler,</div><div class='add'>+					    IRQF_ONESHOT,</div><div class='add'>+					    idev,</div><div class='add'>+					    "%s-consumer%d",</div><div class='add'>+					    idev-&gt;name,</div><div class='add'>+					    idev-&gt;id);</div><div class='add'>+	if (idev-&gt;pollfunc == NULL) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error_pollfunc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	idev-&gt;setup_ops = &amp;at91_adc_buffer_ops;</div><div class='add'>+	idev-&gt;modes |= INDIO_BUFFER_TRIGGERED;</div><div class='add'>+</div><div class='add'>+	ret = iio_buffer_register(idev,</div><div class='add'>+				  idev-&gt;channels,</div><div class='add'>+				  idev-&gt;num_channels);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error_register;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_register:</div><div class='add'>+	iio_dealloc_pollfunc(idev-&gt;pollfunc);</div><div class='add'>+error_pollfunc:</div><div class='add'>+	iio_kfifo_free(idev-&gt;buffer);</div><div class='add'>+error_ret:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void at91_adc_buffer_remove(struct iio_dev *idev)</div><div class='add'>+{</div><div class='add'>+	iio_buffer_unregister(idev);</div><div class='add'>+	iio_dealloc_pollfunc(idev-&gt;pollfunc);</div><div class='add'>+	iio_kfifo_free(idev-&gt;buffer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int at91_adc_read_raw(struct iio_dev *idev,</div><div class='add'>+			     struct iio_chan_spec const *chan,</div><div class='add'>+			     int *val, int *val2, long mask)</div><div class='add'>+{</div><div class='add'>+	struct at91_adc_state *st = iio_priv(idev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (mask) {</div><div class='add'>+	case IIO_CHAN_INFO_RAW:</div><div class='add'>+		mutex_lock(&amp;st-&gt;lock);</div><div class='add'>+</div><div class='add'>+		at91_adc_writel(st, AT91_ADC_CHER,</div><div class='add'>+				AT91_ADC_CH(chan-&gt;channel));</div><div class='add'>+		at91_adc_writel(st, AT91_ADC_IER, st-&gt;registers-&gt;drdy_mask);</div><div class='add'>+		at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);</div><div class='add'>+</div><div class='add'>+		ret = wait_event_interruptible_timeout(st-&gt;wq_data_avail,</div><div class='add'>+						       st-&gt;done,</div><div class='add'>+						       msecs_to_jiffies(1000));</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+		else if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		*val = st-&gt;last_value;</div><div class='add'>+</div><div class='add'>+		at91_adc_writel(st, AT91_ADC_CHDR,</div><div class='add'>+				AT91_ADC_CH(chan-&gt;channel));</div><div class='add'>+		at91_adc_writel(st, AT91_ADC_IDR, st-&gt;registers-&gt;drdy_mask);</div><div class='add'>+</div><div class='add'>+		st-&gt;last_value = 0;</div><div class='add'>+		st-&gt;done = false;</div><div class='add'>+		mutex_unlock(&amp;st-&gt;lock);</div><div class='add'>+		return IIO_VAL_INT;</div><div class='add'>+</div><div class='add'>+	case IIO_CHAN_INFO_SCALE:</div><div class='add'>+		*val = (st-&gt;vref_mv * 1000) &gt;&gt; chan-&gt;scan_type.realbits;</div><div class='add'>+		*val2 = 0;</div><div class='add'>+		return IIO_VAL_INT_PLUS_MICRO;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int at91_adc_probe_dt(struct at91_adc_state *st,</div><div class='add'>+			     struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct iio_dev *idev = iio_priv_to_dev(st);</div><div class='add'>+	struct device_node *node = pdev-&gt;dev.of_node;</div><div class='add'>+	struct device_node *trig_node;</div><div class='add'>+	int i = 0, ret;</div><div class='add'>+	u32 prop;</div><div class='add'>+</div><div class='add'>+	if (!node)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	st-&gt;use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");</div><div class='add'>+</div><div class='add'>+	if (of_property_read_u32(node, "atmel,adc-channels-used", &amp;prop)) {</div><div class='add'>+		dev_err(&amp;idev-&gt;dev, "Missing adc-channels-used property in the DT.\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+	st-&gt;channels_mask = prop;</div><div class='add'>+</div><div class='add'>+	if (of_property_read_u32(node, "atmel,adc-num-channels", &amp;prop)) {</div><div class='add'>+		dev_err(&amp;idev-&gt;dev, "Missing adc-num-channels property in the DT.\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+	st-&gt;num_channels = prop;</div><div class='add'>+</div><div class='add'>+	if (of_property_read_u32(node, "atmel,adc-startup-time", &amp;prop)) {</div><div class='add'>+		dev_err(&amp;idev-&gt;dev, "Missing adc-startup-time property in the DT.\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+	st-&gt;startup_time = prop;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	if (of_property_read_u32(node, "atmel,adc-vref", &amp;prop)) {</div><div class='add'>+		dev_err(&amp;idev-&gt;dev, "Missing adc-vref property in the DT.\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+	st-&gt;vref_mv = prop;</div><div class='add'>+</div><div class='add'>+	st-&gt;registers = devm_kzalloc(&amp;idev-&gt;dev,</div><div class='add'>+				     sizeof(struct at91_adc_reg_desc),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+	if (!st-&gt;registers) {</div><div class='add'>+		dev_err(&amp;idev-&gt;dev, "Could not allocate register memory.\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (of_property_read_u32(node, "atmel,adc-channel-base", &amp;prop)) {</div><div class='add'>+		dev_err(&amp;idev-&gt;dev, "Missing adc-channel-base property in the DT.\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+	st-&gt;registers-&gt;channel_base = prop;</div><div class='add'>+</div><div class='add'>+	if (of_property_read_u32(node, "atmel,adc-drdy-mask", &amp;prop)) {</div><div class='add'>+		dev_err(&amp;idev-&gt;dev, "Missing adc-drdy-mask property in the DT.\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+	st-&gt;registers-&gt;drdy_mask = prop;</div><div class='add'>+</div><div class='add'>+	if (of_property_read_u32(node, "atmel,adc-status-register", &amp;prop)) {</div><div class='add'>+		dev_err(&amp;idev-&gt;dev, "Missing adc-status-register property in the DT.\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+	st-&gt;registers-&gt;status_register = prop;</div><div class='add'>+</div><div class='add'>+	if (of_property_read_u32(node, "atmel,adc-trigger-register", &amp;prop)) {</div><div class='add'>+		dev_err(&amp;idev-&gt;dev, "Missing adc-trigger-register property in the DT.\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+	st-&gt;registers-&gt;trigger_register = prop;</div><div class='add'>+</div><div class='add'>+	st-&gt;trigger_number = of_get_child_count(node);</div><div class='add'>+	st-&gt;trigger_list = devm_kzalloc(&amp;idev-&gt;dev, st-&gt;trigger_number *</div><div class='add'>+					sizeof(struct at91_adc_trigger),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!st-&gt;trigger_list) {</div><div class='add'>+		dev_err(&amp;idev-&gt;dev, "Could not allocate trigger list memory.\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_child_of_node(node, trig_node) {</div><div class='add'>+		struct at91_adc_trigger *trig = st-&gt;trigger_list + i;</div><div class='add'>+		const char *name;</div><div class='add'>+</div><div class='add'>+		if (of_property_read_string(trig_node, "trigger-name", &amp;name)) {</div><div class='add'>+			dev_err(&amp;idev-&gt;dev, "Missing trigger-name property in the DT.\n");</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto error_ret;</div><div class='add'>+		}</div><div class='add'>+	        trig-&gt;name = name;</div><div class='add'>+</div><div class='add'>+		if (of_property_read_u32(trig_node, "trigger-value", &amp;prop)) {</div><div class='add'>+			dev_err(&amp;idev-&gt;dev, "Missing trigger-value property in the DT.\n");</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto error_ret;</div><div class='add'>+		}</div><div class='add'>+	        trig-&gt;value = prop;</div><div class='add'>+		trig-&gt;is_external = of_property_read_bool(trig_node, "trigger-external");</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_ret:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int at91_adc_probe_pdata(struct at91_adc_state *st,</div><div class='add'>+				struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct at91_adc_data *pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	st-&gt;use_external = pdata-&gt;use_external_triggers;</div><div class='add'>+	st-&gt;vref_mv = pdata-&gt;vref;</div><div class='add'>+	st-&gt;channels_mask = pdata-&gt;channels_used;</div><div class='add'>+	st-&gt;num_channels = pdata-&gt;num_channels;</div><div class='add'>+	st-&gt;startup_time = pdata-&gt;startup_time;</div><div class='add'>+	st-&gt;trigger_number = pdata-&gt;trigger_number;</div><div class='add'>+	st-&gt;trigger_list = pdata-&gt;trigger_list;</div><div class='add'>+	st-&gt;registers = pdata-&gt;registers;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct iio_info at91_adc_info = {</div><div class='add'>+	.driver_module = THIS_MODULE,</div><div class='add'>+	.read_raw = &amp;at91_adc_read_raw,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit at91_adc_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	unsigned int prsc, mstrclk, ticks, adc_clk;</div><div class='add'>+	int ret;</div><div class='add'>+	struct iio_dev *idev;</div><div class='add'>+	struct at91_adc_state *st;</div><div class='add'>+	struct resource *res;</div><div class='add'>+</div><div class='add'>+	idev = iio_device_alloc(sizeof(struct at91_adc_state));</div><div class='add'>+	if (idev == NULL) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	st = iio_priv(idev);</div><div class='add'>+</div><div class='add'>+	if (pdev-&gt;dev.of_node)</div><div class='add'>+		ret = at91_adc_probe_dt(st, pdev);</div><div class='add'>+	else</div><div class='add'>+		ret = at91_adc_probe_pdata(st, pdev);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "No platform data available.\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error_free_device;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "No resource defined\n");</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+		goto error_ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, idev);</div><div class='add'>+</div><div class='add'>+	idev-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='add'>+	idev-&gt;name = dev_name(&amp;pdev-&gt;dev);</div><div class='add'>+	idev-&gt;modes = INDIO_DIRECT_MODE;</div><div class='add'>+	idev-&gt;info = &amp;at91_adc_info;</div><div class='add'>+</div><div class='add'>+	st-&gt;irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (st-&gt;irq &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "No IRQ ID is designated\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto error_free_device;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!request_mem_region(res-&gt;start, resource_size(res),</div><div class='add'>+				"AT91 adc registers")) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Resources are unavailable.\n");</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto error_free_device;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	st-&gt;reg_base = ioremap(res-&gt;start, resource_size(res));</div><div class='add'>+	if (!st-&gt;reg_base) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to map registers.\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error_release_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable all IRQs before setting up the handler</div><div class='add'>+	 */</div><div class='add'>+	at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);</div><div class='add'>+	at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);</div><div class='add'>+	ret = request_irq(st-&gt;irq,</div><div class='add'>+			  at91_adc_eoc_trigger,</div><div class='add'>+			  0,</div><div class='add'>+			  pdev-&gt;dev.driver-&gt;name,</div><div class='add'>+			  idev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to allocate IRQ.\n");</div><div class='add'>+		goto error_unmap_reg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	st-&gt;clk = clk_get(&amp;pdev-&gt;dev, "adc_clk");</div><div class='add'>+	if (IS_ERR(st-&gt;clk)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to get the clock.\n");</div><div class='add'>+		ret = PTR_ERR(st-&gt;clk);</div><div class='add'>+		goto error_free_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = clk_prepare(st-&gt;clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Could not prepare the clock.\n");</div><div class='add'>+		goto error_free_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = clk_enable(st-&gt;clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Could not enable the clock.\n");</div><div class='add'>+		goto error_unprepare_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	st-&gt;adc_clk = clk_get(&amp;pdev-&gt;dev, "adc_op_clk");</div><div class='add'>+	if (IS_ERR(st-&gt;adc_clk)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to get the ADC clock.\n");</div><div class='add'>+		ret = PTR_ERR(st-&gt;clk);</div><div class='add'>+		goto error_disable_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = clk_prepare(st-&gt;adc_clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Could not prepare the ADC clock.\n");</div><div class='add'>+		goto error_free_adc_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = clk_enable(st-&gt;adc_clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Could not enable the ADC clock.\n");</div><div class='add'>+		goto error_unprepare_adc_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Prescaler rate computation using the formula from the Atmel's</div><div class='add'>+	 * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being</div><div class='add'>+	 * specified by the electrical characteristics of the board.</div><div class='add'>+	 */</div><div class='add'>+	mstrclk = clk_get_rate(st-&gt;clk);</div><div class='add'>+	adc_clk = clk_get_rate(st-&gt;adc_clk);</div><div class='add'>+	prsc = (mstrclk / (2 * adc_clk)) - 1;</div><div class='add'>+</div><div class='add'>+	if (!st-&gt;startup_time) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "No startup time available.\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error_disable_adc_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Number of ticks needed to cover the startup time of the ADC as</div><div class='add'>+	 * defined in the electrical characteristics of the board, divided by 8.</div><div class='add'>+	 * The formula thus is : Startup Time = (ticks + 1) * 8 / ADC Clock</div><div class='add'>+	 */</div><div class='add'>+	ticks = round_up((st-&gt;startup_time * adc_clk /</div><div class='add'>+			  1000000) - 1, 8) / 8;</div><div class='add'>+	at91_adc_writel(st, AT91_ADC_MR,</div><div class='add'>+			(AT91_ADC_PRESCAL_(prsc) &amp; AT91_ADC_PRESCAL) |</div><div class='add'>+			(AT91_ADC_STARTUP_(ticks) &amp; AT91_ADC_STARTUP));</div><div class='add'>+</div><div class='add'>+	/* Setup the ADC channels available on the board */</div><div class='add'>+	ret = at91_adc_channel_init(idev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Couldn't initialize the channels.\n");</div><div class='add'>+		goto error_disable_adc_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	init_waitqueue_head(&amp;st-&gt;wq_data_avail);</div><div class='add'>+	mutex_init(&amp;st-&gt;lock);</div><div class='add'>+</div><div class='add'>+	ret = at91_adc_buffer_init(idev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Couldn't initialize the buffer.\n");</div><div class='add'>+		goto error_disable_adc_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = at91_adc_trigger_init(idev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Couldn't setup the triggers.\n");</div><div class='add'>+		goto error_unregister_buffer;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = iio_device_register(idev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Couldn't register the device.\n");</div><div class='add'>+		goto error_remove_triggers;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_remove_triggers:</div><div class='add'>+	at91_adc_trigger_remove(idev);</div><div class='add'>+error_unregister_buffer:</div><div class='add'>+	at91_adc_buffer_remove(idev);</div><div class='add'>+error_disable_adc_clk:</div><div class='add'>+	clk_disable(st-&gt;adc_clk);</div><div class='add'>+error_unprepare_adc_clk:</div><div class='add'>+	clk_unprepare(st-&gt;adc_clk);</div><div class='add'>+error_free_adc_clk:</div><div class='add'>+	clk_put(st-&gt;adc_clk);</div><div class='add'>+error_disable_clk:</div><div class='add'>+	clk_disable(st-&gt;clk);</div><div class='add'>+error_unprepare_clk:</div><div class='add'>+	clk_unprepare(st-&gt;clk);</div><div class='add'>+error_free_clk:</div><div class='add'>+	clk_put(st-&gt;clk);</div><div class='add'>+error_free_irq:</div><div class='add'>+	free_irq(st-&gt;irq, idev);</div><div class='add'>+error_unmap_reg:</div><div class='add'>+	iounmap(st-&gt;reg_base);</div><div class='add'>+error_release_mem:</div><div class='add'>+	release_mem_region(res-&gt;start, resource_size(res));</div><div class='add'>+error_free_device:</div><div class='add'>+	iio_device_free(idev);</div><div class='add'>+error_ret:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit at91_adc_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct iio_dev *idev = platform_get_drvdata(pdev);</div><div class='add'>+	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	struct at91_adc_state *st = iio_priv(idev);</div><div class='add'>+</div><div class='add'>+	iio_device_unregister(idev);</div><div class='add'>+	at91_adc_trigger_remove(idev);</div><div class='add'>+	at91_adc_buffer_remove(idev);</div><div class='add'>+	clk_disable_unprepare(st-&gt;adc_clk);</div><div class='add'>+	clk_put(st-&gt;adc_clk);</div><div class='add'>+	clk_disable(st-&gt;clk);</div><div class='add'>+	clk_unprepare(st-&gt;clk);</div><div class='add'>+	clk_put(st-&gt;clk);</div><div class='add'>+	free_irq(st-&gt;irq, idev);</div><div class='add'>+	iounmap(st-&gt;reg_base);</div><div class='add'>+	release_mem_region(res-&gt;start, resource_size(res));</div><div class='add'>+	iio_device_free(idev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id at91_adc_dt_ids[] = {</div><div class='add'>+	{ .compatible = "atmel,at91sam9260-adc" },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);</div><div class='add'>+</div><div class='add'>+static struct platform_driver at91_adc_driver = {</div><div class='add'>+	.probe = at91_adc_probe,</div><div class='add'>+	.remove = __devexit_p(at91_adc_remove),</div><div class='add'>+	.driver = {</div><div class='add'>+		   .name = "at91_adc",</div><div class='add'>+		   .of_match_table = of_match_ptr(at91_adc_dt_ids),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(at91_adc_driver);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("Atmel AT91 ADC Driver");</div><div class='add'>+MODULE_AUTHOR("Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;");</div><div class='head'>diff --git a/drivers/iio/amplifiers/Kconfig b/drivers/iio/amplifiers/Kconfig<br/>new file mode 100644<br/>index 000000000000..05d707ed7d4f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/iio/amplifiers/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/amplifiers/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+#</div><div class='add'>+# Gain Amplifiers, etc.</div><div class='add'>+#</div><div class='add'>+menu "Amplifiers"</div><div class='add'>+</div><div class='add'>+config AD8366</div><div class='add'>+	tristate "Analog Devices AD8366 VGA"</div><div class='add'>+	depends on SPI</div><div class='add'>+	select BITREVERSE</div><div class='add'>+	help</div><div class='add'>+	  Say yes here to build support for Analog Devices AD8366</div><div class='add'>+	  SPI Dual-Digital Variable Gain Amplifier (VGA).</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called ad8366.</div><div class='add'>+</div><div class='add'>+endmenu</div><div class='head'>diff --git a/drivers/iio/amplifiers/Makefile b/drivers/iio/amplifiers/Makefile<br/>new file mode 100644<br/>index 000000000000..a6ca366908e0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/iio/amplifiers/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/amplifiers/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+#</div><div class='add'>+# Makefile iio/amplifiers</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_AD8366) += ad8366.o</div><div class='head'>diff --git a/drivers/iio/amplifiers/ad8366.c b/drivers/iio/amplifiers/ad8366.c<br/>new file mode 100644<br/>index 000000000000..d8281cdbfc4a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/iio/amplifiers/ad8366.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/amplifiers/ad8366.c</a></div><div class='hunk'>@@ -0,0 +1,222 @@</div><div class='add'>+/*</div><div class='add'>+ * AD8366 SPI Dual-Digital Variable Gain Amplifier (VGA)</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Analog Devices Inc.</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/sysfs.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/bitrev.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/iio/iio.h&gt;</div><div class='add'>+#include &lt;linux/iio/sysfs.h&gt;</div><div class='add'>+</div><div class='add'>+struct ad8366_state {</div><div class='add'>+	struct spi_device	*spi;</div><div class='add'>+	struct regulator	*reg;</div><div class='add'>+	unsigned char		ch[2];</div><div class='add'>+	/*</div><div class='add'>+	 * DMA (thus cache coherency maintenance) requires the</div><div class='add'>+	 * transfer buffers to live in their own cache lines.</div><div class='add'>+	 */</div><div class='add'>+	unsigned char		data[2] ____cacheline_aligned;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ad8366_write(struct iio_dev *indio_dev,</div><div class='add'>+			unsigned char ch_a, char unsigned ch_b)</div><div class='add'>+{</div><div class='add'>+	struct ad8366_state *st = iio_priv(indio_dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ch_a = bitrev8(ch_a &amp; 0x3F);</div><div class='add'>+	ch_b = bitrev8(ch_b &amp; 0x3F);</div><div class='add'>+</div><div class='add'>+	st-&gt;data[0] = ch_b &gt;&gt; 4;</div><div class='add'>+	st-&gt;data[1] = (ch_b &lt;&lt; 4) | (ch_a &gt;&gt; 2);</div><div class='add'>+</div><div class='add'>+	ret = spi_write(st-&gt;spi, st-&gt;data, ARRAY_SIZE(st-&gt;data));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err(&amp;indio_dev-&gt;dev, "write failed (%d)", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ad8366_read_raw(struct iio_dev *indio_dev,</div><div class='add'>+			   struct iio_chan_spec const *chan,</div><div class='add'>+			   int *val,</div><div class='add'>+			   int *val2,</div><div class='add'>+			   long m)</div><div class='add'>+{</div><div class='add'>+	struct ad8366_state *st = iio_priv(indio_dev);</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned code;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;indio_dev-&gt;mlock);</div><div class='add'>+	switch (m) {</div><div class='add'>+	case IIO_CHAN_INFO_HARDWAREGAIN:</div><div class='add'>+		code = st-&gt;ch[chan-&gt;channel];</div><div class='add'>+</div><div class='add'>+		/* Values in dB */</div><div class='add'>+		code = code * 253 + 4500;</div><div class='add'>+		*val = code / 1000;</div><div class='add'>+		*val2 = (code % 1000) * 1000;</div><div class='add'>+</div><div class='add'>+		ret = IIO_VAL_INT_PLUS_MICRO_DB;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;indio_dev-&gt;mlock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ad8366_write_raw(struct iio_dev *indio_dev,</div><div class='add'>+			    struct iio_chan_spec const *chan,</div><div class='add'>+			    int val,</div><div class='add'>+			    int val2,</div><div class='add'>+			    long mask)</div><div class='add'>+{</div><div class='add'>+	struct ad8366_state *st = iio_priv(indio_dev);</div><div class='add'>+	unsigned code;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (val &lt; 0 || val2 &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Values in dB */</div><div class='add'>+	code = (((u8)val * 1000) + ((u32)val2 / 1000));</div><div class='add'>+</div><div class='add'>+	if (code &gt; 20500 || code &lt; 4500)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	code = (code - 4500) / 253;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;indio_dev-&gt;mlock);</div><div class='add'>+	switch (mask) {</div><div class='add'>+	case IIO_CHAN_INFO_HARDWAREGAIN:</div><div class='add'>+		st-&gt;ch[chan-&gt;channel] = code;</div><div class='add'>+		ret = ad8366_write(indio_dev, st-&gt;ch[0], st-&gt;ch[1]);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;indio_dev-&gt;mlock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct iio_info ad8366_info = {</div><div class='add'>+	.read_raw = &amp;ad8366_read_raw,</div><div class='add'>+	.write_raw = &amp;ad8366_write_raw,</div><div class='add'>+	.driver_module = THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AD8366_CHAN(_channel) {				\</div><div class='add'>+	.type = IIO_VOLTAGE,				\</div><div class='add'>+	.output = 1,					\</div><div class='add'>+	.indexed = 1,					\</div><div class='add'>+	.channel = _channel,				\</div><div class='add'>+	.info_mask = IIO_CHAN_INFO_HARDWAREGAIN_SEPARATE_BIT,\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct iio_chan_spec ad8366_channels[] = {</div><div class='add'>+	AD8366_CHAN(0),</div><div class='add'>+	AD8366_CHAN(1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit ad8366_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct iio_dev *indio_dev;</div><div class='add'>+	struct ad8366_state *st;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	indio_dev = iio_device_alloc(sizeof(*st));</div><div class='add'>+	if (indio_dev == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	st = iio_priv(indio_dev);</div><div class='add'>+</div><div class='add'>+	st-&gt;reg = regulator_get(&amp;spi-&gt;dev, "vcc");</div><div class='add'>+	if (!IS_ERR(st-&gt;reg)) {</div><div class='add'>+		ret = regulator_enable(st-&gt;reg);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto error_put_reg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spi_set_drvdata(spi, indio_dev);</div><div class='add'>+	st-&gt;spi = spi;</div><div class='add'>+</div><div class='add'>+	indio_dev-&gt;dev.parent = &amp;spi-&gt;dev;</div><div class='add'>+	indio_dev-&gt;name = spi_get_device_id(spi)-&gt;name;</div><div class='add'>+	indio_dev-&gt;info = &amp;ad8366_info;</div><div class='add'>+	indio_dev-&gt;modes = INDIO_DIRECT_MODE;</div><div class='add'>+	indio_dev-&gt;channels = ad8366_channels;</div><div class='add'>+	indio_dev-&gt;num_channels = ARRAY_SIZE(ad8366_channels);</div><div class='add'>+</div><div class='add'>+	ret = iio_device_register(indio_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error_disable_reg;</div><div class='add'>+</div><div class='add'>+	ad8366_write(indio_dev, 0 , 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_disable_reg:</div><div class='add'>+	if (!IS_ERR(st-&gt;reg))</div><div class='add'>+		regulator_disable(st-&gt;reg);</div><div class='add'>+error_put_reg:</div><div class='add'>+	if (!IS_ERR(st-&gt;reg))</div><div class='add'>+		regulator_put(st-&gt;reg);</div><div class='add'>+</div><div class='add'>+	iio_device_free(indio_dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit ad8366_remove(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct iio_dev *indio_dev = spi_get_drvdata(spi);</div><div class='add'>+	struct ad8366_state *st = iio_priv(indio_dev);</div><div class='add'>+	struct regulator *reg = st-&gt;reg;</div><div class='add'>+</div><div class='add'>+	iio_device_unregister(indio_dev);</div><div class='add'>+</div><div class='add'>+	if (!IS_ERR(reg)) {</div><div class='add'>+		regulator_disable(reg);</div><div class='add'>+		regulator_put(reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iio_device_free(indio_dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id ad8366_id[] = {</div><div class='add'>+	{"ad8366", 0},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spi_driver ad8366_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= KBUILD_MODNAME,</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe		= ad8366_probe,</div><div class='add'>+	.remove		= __devexit_p(ad8366_remove),</div><div class='add'>+	.id_table	= ad8366_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_spi_driver(ad8366_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Michael Hennerich &lt;hennerich@blackfin.uclinux.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Analog Devices AD8366 VGA");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/staging/iio/iio_core.h b/drivers/iio/iio_core.h<br/>index c9dfcba0bac8..f652e6ae5a35 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/iio/iio_core.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/iio/iio_core.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iio/iio_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/iio_core.h</a></div><div class='hunk'>@@ -12,6 +12,12 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef _IIO_CORE_H_</div><div class='ctx'> #define _IIO_CORE_H_</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+</div><div class='add'>+struct iio_chan_spec;</div><div class='add'>+struct iio_dev;</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> int __iio_add_chan_devattr(const char *postfix,</div><div class='ctx'> 			   struct iio_chan_spec const *chan,</div><div class='head'>diff --git a/drivers/staging/iio/iio_core_trigger.h b/drivers/iio/iio_core_trigger.h<br/>index 6f7c56fcbe78..6f7c56fcbe78 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/iio/iio_core_trigger.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/iio/iio_core_trigger.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iio/iio_core_trigger.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/iio_core_trigger.h</a></div><div class='head'>diff --git a/drivers/staging/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c<br/>index 386ba760f3f1..ac185b8694bd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/iio/industrialio-buffer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/iio/industrialio-buffer.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iio/industrialio-buffer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/industrialio-buffer.c</a></div><div class='hunk'>@@ -21,10 +21,10 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/poll.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "iio.h"</div><div class='add'>+#include &lt;linux/iio/iio.h&gt;</div><div class='ctx'> #include "iio_core.h"</div><div class='del'>-#include "sysfs.h"</div><div class='del'>-#include "buffer.h"</div><div class='add'>+#include &lt;linux/iio/sysfs.h&gt;</div><div class='add'>+#include &lt;linux/iio/buffer.h&gt;</div><div class='ctx'> </div><div class='ctx'> static const char * const iio_endian_prefix[] = {</div><div class='ctx'> 	[IIO_BE] = "be",</div><div class='hunk'>@@ -105,7 +105,7 @@ static ssize_t iio_scan_el_show(struct device *dev,</div><div class='ctx'> 				char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> </div><div class='ctx'> 	ret = test_bit(to_iio_dev_attr(attr)-&gt;address,</div><div class='ctx'> 		       indio_dev-&gt;buffer-&gt;scan_mask);</div><div class='hunk'>@@ -124,13 +124,15 @@ static ssize_t iio_scan_el_store(struct device *dev,</div><div class='ctx'> 				 const char *buf,</div><div class='ctx'> 				 size_t len)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> 	bool state;</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_buffer *buffer = indio_dev-&gt;buffer;</div><div class='ctx'> 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);</div><div class='ctx'> </div><div class='del'>-	state = !(buf[0] == '0');</div><div class='add'>+	ret = strtobool(buf, &amp;state);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> 	mutex_lock(&amp;indio_dev-&gt;mlock);</div><div class='ctx'> 	if (iio_buffer_enabled(indio_dev)) {</div><div class='ctx'> 		ret = -EBUSY;</div><div class='hunk'>@@ -160,7 +162,7 @@ static ssize_t iio_scan_el_ts_show(struct device *dev,</div><div class='ctx'> 				   struct device_attribute *attr,</div><div class='ctx'> 				   char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	return sprintf(buf, "%d\n", indio_dev-&gt;buffer-&gt;scan_timestamp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -169,17 +171,21 @@ static ssize_t iio_scan_el_ts_store(struct device *dev,</div><div class='ctx'> 				    const char *buf,</div><div class='ctx'> 				    size_t len)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	int ret;</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	bool state;</div><div class='ctx'> </div><div class='del'>-	state = !(buf[0] == '0');</div><div class='add'>+	ret = strtobool(buf, &amp;state);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;indio_dev-&gt;mlock);</div><div class='ctx'> 	if (iio_buffer_enabled(indio_dev)) {</div><div class='ctx'> 		ret = -EBUSY;</div><div class='ctx'> 		goto error_ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	indio_dev-&gt;buffer-&gt;scan_timestamp = state;</div><div class='add'>+	indio_dev-&gt;scan_timestamp = state;</div><div class='ctx'> error_ret:</div><div class='ctx'> 	mutex_unlock(&amp;indio_dev-&gt;mlock);</div><div class='ctx'> </div><div class='hunk'>@@ -291,7 +297,7 @@ int iio_buffer_register(struct iio_dev *indio_dev,</div><div class='ctx'> 				goto error_cleanup_dynamic;</div><div class='ctx'> 			attrcount += ret;</div><div class='ctx'> 			if (channels[i].type == IIO_TIMESTAMP)</div><div class='del'>-				buffer-&gt;scan_index_timestamp =</div><div class='add'>+				indio_dev-&gt;scan_index_timestamp =</div><div class='ctx'> 					channels[i].scan_index;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (indio_dev-&gt;masklength &amp;&amp; buffer-&gt;scan_mask == NULL) {</div><div class='hunk'>@@ -346,7 +352,7 @@ ssize_t iio_buffer_read_length(struct device *dev,</div><div class='ctx'> 			       struct device_attribute *attr,</div><div class='ctx'> 			       char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_buffer *buffer = indio_dev-&gt;buffer;</div><div class='ctx'> </div><div class='ctx'> 	if (buffer-&gt;access-&gt;get_length)</div><div class='hunk'>@@ -364,7 +370,7 @@ ssize_t iio_buffer_write_length(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	ulong val;</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_buffer *buffer = indio_dev-&gt;buffer;</div><div class='ctx'> </div><div class='ctx'> 	ret = strict_strtoul(buf, 10, &amp;val);</div><div class='hunk'>@@ -397,7 +403,7 @@ ssize_t iio_buffer_store_enable(struct device *dev,</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	bool requested_state, current_state;</div><div class='ctx'> 	int previous_mode;</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_buffer *buffer = indio_dev-&gt;buffer;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;indio_dev-&gt;mlock);</div><div class='hunk'>@@ -483,7 +489,7 @@ ssize_t iio_buffer_show_enable(struct device *dev,</div><div class='ctx'> 			       struct device_attribute *attr,</div><div class='ctx'> 			       char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	return sprintf(buf, "%d\n", iio_buffer_enabled(indio_dev));</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(iio_buffer_show_enable);</div><div class='hunk'>@@ -503,30 +509,41 @@ static const unsigned long *iio_scan_mask_match(const unsigned long *av_masks,</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int iio_sw_buffer_preenable(struct iio_dev *indio_dev)</div><div class='add'>+static int iio_compute_scan_bytes(struct iio_dev *indio_dev, const long *mask,</div><div class='add'>+				  bool timestamp)</div><div class='ctx'> {</div><div class='del'>-	struct iio_buffer *buffer = indio_dev-&gt;buffer;</div><div class='ctx'> 	const struct iio_chan_spec *ch;</div><div class='ctx'> 	unsigned bytes = 0;</div><div class='ctx'> 	int length, i;</div><div class='del'>-	dev_dbg(&amp;indio_dev-&gt;dev, "%s\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	/* How much space will the demuxed element take? */</div><div class='del'>-	for_each_set_bit(i, buffer-&gt;scan_mask,</div><div class='add'>+	for_each_set_bit(i, mask,</div><div class='ctx'> 			 indio_dev-&gt;masklength) {</div><div class='ctx'> 		ch = iio_find_channel_from_si(indio_dev, i);</div><div class='del'>-		length = ch-&gt;scan_type.storagebits/8;</div><div class='add'>+		length = ch-&gt;scan_type.storagebits / 8;</div><div class='ctx'> 		bytes = ALIGN(bytes, length);</div><div class='ctx'> 		bytes += length;</div><div class='ctx'> 	}</div><div class='del'>-	if (buffer-&gt;scan_timestamp) {</div><div class='add'>+	if (timestamp) {</div><div class='ctx'> 		ch = iio_find_channel_from_si(indio_dev,</div><div class='del'>-					      buffer-&gt;scan_index_timestamp);</div><div class='del'>-		length = ch-&gt;scan_type.storagebits/8;</div><div class='add'>+					      indio_dev-&gt;scan_index_timestamp);</div><div class='add'>+		length = ch-&gt;scan_type.storagebits / 8;</div><div class='ctx'> 		bytes = ALIGN(bytes, length);</div><div class='ctx'> 		bytes += length;</div><div class='ctx'> 	}</div><div class='del'>-	buffer-&gt;access-&gt;set_bytes_per_datum(buffer, bytes);</div><div class='add'>+	return bytes;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int iio_sw_buffer_preenable(struct iio_dev *indio_dev)</div><div class='add'>+{</div><div class='add'>+	struct iio_buffer *buffer = indio_dev-&gt;buffer;</div><div class='add'>+	dev_dbg(&amp;indio_dev-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	/* How much space will the demuxed element take? */</div><div class='add'>+	indio_dev-&gt;scan_bytes =</div><div class='add'>+		iio_compute_scan_bytes(indio_dev, buffer-&gt;scan_mask,</div><div class='add'>+				       buffer-&gt;scan_timestamp);</div><div class='add'>+	buffer-&gt;access-&gt;set_bytes_per_datum(buffer, indio_dev-&gt;scan_bytes);</div><div class='ctx'> </div><div class='ctx'> 	/* What scan mask do we actually have ?*/</div><div class='ctx'> 	if (indio_dev-&gt;available_scan_masks)</div><div class='hunk'>@@ -638,19 +655,25 @@ int iio_push_to_buffer(struct iio_buffer *buffer, unsigned char *data,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(iio_push_to_buffer);</div><div class='ctx'> </div><div class='add'>+static void iio_buffer_demux_free(struct iio_buffer *buffer)</div><div class='add'>+{</div><div class='add'>+	struct iio_demux_table *p, *q;</div><div class='add'>+	list_for_each_entry_safe(p, q, &amp;buffer-&gt;demux_list, l) {</div><div class='add'>+		list_del(&amp;p-&gt;l);</div><div class='add'>+		kfree(p);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int iio_update_demux(struct iio_dev *indio_dev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct iio_chan_spec *ch;</div><div class='ctx'> 	struct iio_buffer *buffer = indio_dev-&gt;buffer;</div><div class='ctx'> 	int ret, in_ind = -1, out_ind, length;</div><div class='ctx'> 	unsigned in_loc = 0, out_loc = 0;</div><div class='del'>-	struct iio_demux_table *p, *q;</div><div class='add'>+	struct iio_demux_table *p;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear out any old demux */</div><div class='del'>-	list_for_each_entry_safe(p, q, &amp;buffer-&gt;demux_list, l) {</div><div class='del'>-		list_del(&amp;p-&gt;l);</div><div class='del'>-		kfree(p);</div><div class='del'>-	}</div><div class='add'>+	iio_buffer_demux_free(buffer);</div><div class='ctx'> 	kfree(buffer-&gt;demux_bounce);</div><div class='ctx'> 	buffer-&gt;demux_bounce = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -704,7 +727,7 @@ int iio_update_demux(struct iio_dev *indio_dev)</div><div class='ctx'> 			goto error_clear_mux_table;</div><div class='ctx'> 		}</div><div class='ctx'> 		ch = iio_find_channel_from_si(indio_dev,</div><div class='del'>-			buffer-&gt;scan_index_timestamp);</div><div class='add'>+			indio_dev-&gt;scan_index_timestamp);</div><div class='ctx'> 		length = ch-&gt;scan_type.storagebits/8;</div><div class='ctx'> 		if (out_loc % length)</div><div class='ctx'> 			out_loc += length - out_loc % length;</div><div class='hunk'>@@ -725,10 +748,8 @@ int iio_update_demux(struct iio_dev *indio_dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> error_clear_mux_table:</div><div class='del'>-	list_for_each_entry_safe(p, q, &amp;buffer-&gt;demux_list, l) {</div><div class='del'>-		list_del(&amp;p-&gt;l);</div><div class='del'>-		kfree(p);</div><div class='del'>-	}</div><div class='add'>+	iio_buffer_demux_free(buffer);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(iio_update_demux);</div><div class='head'>diff --git a/drivers/staging/iio/industrialio-core.c b/drivers/iio/industrialio-core.c<br/>index d303bfbff27f..1ddd8861c71b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/iio/industrialio-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/iio/industrialio-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iio/industrialio-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/industrialio-core.c</a></div><div class='hunk'>@@ -23,11 +23,11 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/anon_inodes.h&gt;</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include "iio.h"</div><div class='add'>+#include &lt;linux/iio/iio.h&gt;</div><div class='ctx'> #include "iio_core.h"</div><div class='ctx'> #include "iio_core_trigger.h"</div><div class='del'>-#include "sysfs.h"</div><div class='del'>-#include "events.h"</div><div class='add'>+#include &lt;linux/iio/sysfs.h&gt;</div><div class='add'>+#include &lt;linux/iio/events.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* IDA to assign each registered device a unique id*/</div><div class='ctx'> static DEFINE_IDA(iio_ida);</div><div class='hunk'>@@ -42,11 +42,6 @@ EXPORT_SYMBOL(iio_bus_type);</div><div class='ctx'> </div><div class='ctx'> static struct dentry *iio_debugfs_dentry;</div><div class='ctx'> </div><div class='del'>-static const char * const iio_data_type_name[] = {</div><div class='del'>-	[IIO_RAW] = "raw",</div><div class='del'>-	[IIO_PROCESSED] = "input",</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const char * const iio_direction[] = {</div><div class='ctx'> 	[0] = "in",</div><div class='ctx'> 	[1] = "out",</div><div class='hunk'>@@ -68,6 +63,7 @@ static const char * const iio_chan_type_name_spec[] = {</div><div class='ctx'> 	[IIO_ANGL] = "angl",</div><div class='ctx'> 	[IIO_TIMESTAMP] = "timestamp",</div><div class='ctx'> 	[IIO_CAPACITANCE] = "capacitance",</div><div class='add'>+	[IIO_ALTVOLTAGE] = "altvoltage",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const char * const iio_modifier_names[] = {</div><div class='hunk'>@@ -80,6 +76,8 @@ static const char * const iio_modifier_names[] = {</div><div class='ctx'> </div><div class='ctx'> /* relies on pairs of these shared then separate */</div><div class='ctx'> static const char * const iio_chan_info_postfix[] = {</div><div class='add'>+	[IIO_CHAN_INFO_RAW] = "raw",</div><div class='add'>+	[IIO_CHAN_INFO_PROCESSED] = "input",</div><div class='ctx'> 	[IIO_CHAN_INFO_SCALE] = "scale",</div><div class='ctx'> 	[IIO_CHAN_INFO_OFFSET] = "offset",</div><div class='ctx'> 	[IIO_CHAN_INFO_CALIBSCALE] = "calibscale",</div><div class='hunk'>@@ -90,6 +88,10 @@ static const char * const iio_chan_info_postfix[] = {</div><div class='ctx'> 	[IIO_CHAN_INFO_AVERAGE_RAW] = "mean_raw",</div><div class='ctx'> 	[IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY]</div><div class='ctx'> 	= "filter_low_pass_3db_frequency",</div><div class='add'>+	[IIO_CHAN_INFO_SAMP_FREQ] = "sampling_frequency",</div><div class='add'>+	[IIO_CHAN_INFO_FREQUENCY] = "frequency",</div><div class='add'>+	[IIO_CHAN_INFO_PHASE] = "phase",</div><div class='add'>+	[IIO_CHAN_INFO_HARDWAREGAIN] = "hardwaregain",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct iio_chan_spec</div><div class='hunk'>@@ -151,14 +153,6 @@ static void __exit iio_exit(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_DEBUG_FS)</div><div class='del'>-static int iio_debugfs_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	if (inode-&gt;i_private)</div><div class='del'>-		file-&gt;private_data = inode-&gt;i_private;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static ssize_t iio_debugfs_read_reg(struct file *file, char __user *userbuf,</div><div class='ctx'> 			      size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='hunk'>@@ -217,7 +211,7 @@ static ssize_t iio_debugfs_write_reg(struct file *file,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct file_operations iio_debugfs_reg_fops = {</div><div class='del'>-	.open = iio_debugfs_open,</div><div class='add'>+	.open = simple_open,</div><div class='ctx'> 	.read = iio_debugfs_read_reg,</div><div class='ctx'> 	.write = iio_debugfs_write_reg,</div><div class='ctx'> };</div><div class='hunk'>@@ -234,15 +228,12 @@ static int iio_device_register_debugfs(struct iio_dev *indio_dev)</div><div class='ctx'> 	if (indio_dev-&gt;info-&gt;debugfs_reg_access == NULL)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(iio_debugfs_dentry))</div><div class='add'>+	if (!iio_debugfs_dentry)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	indio_dev-&gt;debugfs_dentry =</div><div class='ctx'> 		debugfs_create_dir(dev_name(&amp;indio_dev-&gt;dev),</div><div class='ctx'> 				   iio_debugfs_dentry);</div><div class='del'>-	if (IS_ERR(indio_dev-&gt;debugfs_dentry))</div><div class='del'>-		return PTR_ERR(indio_dev-&gt;debugfs_dentry);</div><div class='del'>-</div><div class='ctx'> 	if (indio_dev-&gt;debugfs_dentry == NULL) {</div><div class='ctx'> 		dev_warn(indio_dev-&gt;dev.parent,</div><div class='ctx'> 			 "Failed to create debugfs directory\n");</div><div class='hunk'>@@ -274,13 +265,13 @@ static ssize_t iio_read_channel_ext_info(struct device *dev,</div><div class='ctx'> 				     struct device_attribute *attr,</div><div class='ctx'> 				     char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);</div><div class='ctx'> 	const struct iio_chan_spec_ext_info *ext_info;</div><div class='ctx'> </div><div class='ctx'> 	ext_info = &amp;this_attr-&gt;c-&gt;ext_info[this_attr-&gt;address];</div><div class='ctx'> </div><div class='del'>-	return ext_info-&gt;read(indio_dev, this_attr-&gt;c, buf);</div><div class='add'>+	return ext_info-&gt;read(indio_dev, ext_info-&gt;private, this_attr-&gt;c, buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t iio_write_channel_ext_info(struct device *dev,</div><div class='hunk'>@@ -288,42 +279,50 @@ static ssize_t iio_write_channel_ext_info(struct device *dev,</div><div class='ctx'> 				     const char *buf,</div><div class='ctx'> 					 size_t len)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);</div><div class='ctx'> 	const struct iio_chan_spec_ext_info *ext_info;</div><div class='ctx'> </div><div class='ctx'> 	ext_info = &amp;this_attr-&gt;c-&gt;ext_info[this_attr-&gt;address];</div><div class='ctx'> </div><div class='del'>-	return ext_info-&gt;write(indio_dev, this_attr-&gt;c, buf, len);</div><div class='add'>+	return ext_info-&gt;write(indio_dev, ext_info-&gt;private,</div><div class='add'>+			       this_attr-&gt;c, buf, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t iio_read_channel_info(struct device *dev,</div><div class='ctx'> 				     struct device_attribute *attr,</div><div class='ctx'> 				     char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);</div><div class='ctx'> 	int val, val2;</div><div class='add'>+	bool scale_db = false;</div><div class='ctx'> 	int ret = indio_dev-&gt;info-&gt;read_raw(indio_dev, this_attr-&gt;c,</div><div class='ctx'> 					    &amp;val, &amp;val2, this_attr-&gt;address);</div><div class='ctx'> </div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (ret == IIO_VAL_INT)</div><div class='add'>+	switch (ret) {</div><div class='add'>+	case IIO_VAL_INT:</div><div class='ctx'> 		return sprintf(buf, "%d\n", val);</div><div class='del'>-	else if (ret == IIO_VAL_INT_PLUS_MICRO) {</div><div class='add'>+	case IIO_VAL_INT_PLUS_MICRO_DB:</div><div class='add'>+		scale_db = true;</div><div class='add'>+	case IIO_VAL_INT_PLUS_MICRO:</div><div class='ctx'> 		if (val2 &lt; 0)</div><div class='del'>-			return sprintf(buf, "-%d.%06u\n", val, -val2);</div><div class='add'>+			return sprintf(buf, "-%d.%06u%s\n", val, -val2,</div><div class='add'>+				scale_db ? " dB" : "");</div><div class='ctx'> 		else</div><div class='del'>-			return sprintf(buf, "%d.%06u\n", val, val2);</div><div class='del'>-	} else if (ret == IIO_VAL_INT_PLUS_NANO) {</div><div class='add'>+			return sprintf(buf, "%d.%06u%s\n", val, val2,</div><div class='add'>+				scale_db ? " dB" : "");</div><div class='add'>+	case IIO_VAL_INT_PLUS_NANO:</div><div class='ctx'> 		if (val2 &lt; 0)</div><div class='ctx'> 			return sprintf(buf, "-%d.%09u\n", val, -val2);</div><div class='ctx'> 		else</div><div class='ctx'> 			return sprintf(buf, "%d.%09u\n", val, val2);</div><div class='del'>-	} else</div><div class='add'>+	default:</div><div class='ctx'> 		return 0;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t iio_write_channel_info(struct device *dev,</div><div class='hunk'>@@ -331,7 +330,7 @@ static ssize_t iio_write_channel_info(struct device *dev,</div><div class='ctx'> 				      const char *buf,</div><div class='ctx'> 				      size_t len)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);</div><div class='ctx'> 	int ret, integer = 0, fract = 0, fract_mult = 100000;</div><div class='ctx'> 	bool integer_part = true, negative = false;</div><div class='hunk'>@@ -575,25 +574,12 @@ error_ret:</div><div class='ctx'> static int iio_device_add_channel_sysfs(struct iio_dev *indio_dev,</div><div class='ctx'> 					struct iio_chan_spec const *chan)</div><div class='ctx'> {</div><div class='del'>-	int ret, i, attrcount = 0;</div><div class='add'>+	int ret, attrcount = 0;</div><div class='add'>+	int i;</div><div class='ctx'> 	const struct iio_chan_spec_ext_info *ext_info;</div><div class='ctx'> </div><div class='ctx'> 	if (chan-&gt;channel &lt; 0)</div><div class='ctx'> 		return 0;</div><div class='del'>-</div><div class='del'>-	ret = __iio_add_chan_devattr(iio_data_type_name[chan-&gt;processed_val],</div><div class='del'>-				     chan,</div><div class='del'>-				     &amp;iio_read_channel_info,</div><div class='del'>-				     (chan-&gt;output ?</div><div class='del'>-				      &amp;iio_write_channel_info : NULL),</div><div class='del'>-				     0,</div><div class='del'>-				     0,</div><div class='del'>-				     &amp;indio_dev-&gt;dev,</div><div class='del'>-				     &amp;indio_dev-&gt;channel_attr_list);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto error_ret;</div><div class='del'>-	attrcount++;</div><div class='del'>-</div><div class='ctx'> 	for_each_set_bit(i, &amp;chan-&gt;info_mask, sizeof(long)*8) {</div><div class='ctx'> 		ret = __iio_add_chan_devattr(iio_chan_info_postfix[i/2],</div><div class='ctx'> 					     chan,</div><div class='hunk'>@@ -652,7 +638,7 @@ static ssize_t iio_show_dev_name(struct device *dev,</div><div class='ctx'> 				 struct device_attribute *attr,</div><div class='ctx'> 				 char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	return sprintf(buf, "%s\n", indio_dev-&gt;name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -738,7 +724,7 @@ static void iio_device_unregister_sysfs(struct iio_dev *indio_dev)</div><div class='ctx'> </div><div class='ctx'> static void iio_dev_release(struct device *device)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = container_of(device, struct iio_dev, dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(device);</div><div class='ctx'> 	cdev_del(&amp;indio_dev-&gt;chrdev);</div><div class='ctx'> 	if (indio_dev-&gt;modes &amp; INDIO_BUFFER_TRIGGERED)</div><div class='ctx'> 		iio_device_unregister_trigger_consumer(indio_dev);</div><div class='hunk'>@@ -752,7 +738,7 @@ static struct device_type iio_dev_type = {</div><div class='ctx'> 	.release = iio_dev_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct iio_dev *iio_allocate_device(int sizeof_priv)</div><div class='add'>+struct iio_dev *iio_device_alloc(int sizeof_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct iio_dev *dev;</div><div class='ctx'> 	size_t alloc_size;</div><div class='hunk'>@@ -788,16 +774,16 @@ struct iio_dev *iio_allocate_device(int sizeof_priv)</div><div class='ctx'> </div><div class='ctx'> 	return dev;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(iio_allocate_device);</div><div class='add'>+EXPORT_SYMBOL(iio_device_alloc);</div><div class='ctx'> </div><div class='del'>-void iio_free_device(struct iio_dev *dev)</div><div class='add'>+void iio_device_free(struct iio_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	if (dev) {</div><div class='ctx'> 		ida_simple_remove(&amp;iio_ida, dev-&gt;id);</div><div class='ctx'> 		kfree(dev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(iio_free_device);</div><div class='add'>+EXPORT_SYMBOL(iio_device_free);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * iio_chrdev_open() - chrdev file open for buffer access and ioctls</div><div class='head'>diff --git a/drivers/staging/iio/industrialio-event.c b/drivers/iio/industrialio-event.c<br/>index 5fdf739e38f9..b49059de5d02 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/iio/industrialio-event.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/iio/industrialio-event.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iio/industrialio-event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/industrialio-event.c</a></div><div class='hunk'>@@ -20,10 +20,10 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/wait.h&gt;</div><div class='del'>-#include "iio.h"</div><div class='add'>+#include &lt;linux/iio/iio.h&gt;</div><div class='ctx'> #include "iio_core.h"</div><div class='del'>-#include "sysfs.h"</div><div class='del'>-#include "events.h"</div><div class='add'>+#include &lt;linux/iio/sysfs.h&gt;</div><div class='add'>+#include &lt;linux/iio/events.h&gt;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct iio_event_interface - chrdev interface for an event line</div><div class='hunk'>@@ -186,7 +186,7 @@ static ssize_t iio_ev_state_store(struct device *dev,</div><div class='ctx'> 				  const char *buf,</div><div class='ctx'> 				  size_t len)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	bool val;</div><div class='hunk'>@@ -205,7 +205,7 @@ static ssize_t iio_ev_state_show(struct device *dev,</div><div class='ctx'> 				 struct device_attribute *attr,</div><div class='ctx'> 				 char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);</div><div class='ctx'> 	int val = indio_dev-&gt;info-&gt;read_event_config(indio_dev,</div><div class='ctx'> 						     this_attr-&gt;address);</div><div class='hunk'>@@ -220,7 +220,7 @@ static ssize_t iio_ev_value_show(struct device *dev,</div><div class='ctx'> 				 struct device_attribute *attr,</div><div class='ctx'> 				 char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);</div><div class='ctx'> 	int val, ret;</div><div class='ctx'> </div><div class='hunk'>@@ -237,7 +237,7 @@ static ssize_t iio_ev_value_store(struct device *dev,</div><div class='ctx'> 				  const char *buf,</div><div class='ctx'> 				  size_t len)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);</div><div class='ctx'> 	unsigned long val;</div><div class='ctx'> 	int ret;</div><div class='head'>diff --git a/drivers/staging/iio/industrialio-trigger.c b/drivers/iio/industrialio-trigger.c<br/>index 47ecadd4818d..0f582df75a19 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/iio/industrialio-trigger.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/iio/industrialio-trigger.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iio/industrialio-trigger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/industrialio-trigger.c</a></div><div class='hunk'>@@ -15,11 +15,11 @@</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "iio.h"</div><div class='del'>-#include "trigger.h"</div><div class='add'>+#include &lt;linux/iio/iio.h&gt;</div><div class='add'>+#include &lt;linux/iio/trigger.h&gt;</div><div class='ctx'> #include "iio_core.h"</div><div class='ctx'> #include "iio_core_trigger.h"</div><div class='del'>-#include "trigger_consumer.h"</div><div class='add'>+#include &lt;linux/iio/trigger_consumer.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* RFC - Question of approach</div><div class='ctx'>  * Make the common case (single sensor single trigger)</div><div class='hunk'>@@ -310,7 +310,7 @@ static ssize_t iio_trigger_read_current(struct device *dev,</div><div class='ctx'> 					struct device_attribute *attr,</div><div class='ctx'> 					char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (indio_dev-&gt;trig)</div><div class='ctx'> 		return sprintf(buf, "%s\n", indio_dev-&gt;trig-&gt;name);</div><div class='hunk'>@@ -329,7 +329,7 @@ static ssize_t iio_trigger_write_current(struct device *dev,</div><div class='ctx'> 					 const char *buf,</div><div class='ctx'> 					 size_t len)</div><div class='ctx'> {</div><div class='del'>-	struct iio_dev *indio_dev = dev_get_drvdata(dev);</div><div class='add'>+	struct iio_dev *indio_dev = dev_to_iio_dev(dev);</div><div class='ctx'> 	struct iio_trigger *oldtrig = indio_dev-&gt;trig;</div><div class='ctx'> 	struct iio_trigger *trig;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -360,9 +360,9 @@ static ssize_t iio_trigger_write_current(struct device *dev,</div><div class='ctx'> 	indio_dev-&gt;trig = trig;</div><div class='ctx'> </div><div class='ctx'> 	if (oldtrig &amp;&amp; indio_dev-&gt;trig != oldtrig)</div><div class='del'>-		iio_put_trigger(oldtrig);</div><div class='add'>+		iio_trigger_put(oldtrig);</div><div class='ctx'> 	if (indio_dev-&gt;trig)</div><div class='del'>-		iio_get_trigger(indio_dev-&gt;trig);</div><div class='add'>+		iio_trigger_get(indio_dev-&gt;trig);</div><div class='ctx'> </div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='hunk'>@@ -426,7 +426,7 @@ static void iio_trig_subirqunmask(struct irq_data *d)</div><div class='ctx'> 	trig-&gt;subirqs[d-&gt;irq - trig-&gt;subirq_base].enabled = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct iio_trigger *iio_allocate_trigger(const char *fmt, ...)</div><div class='add'>+struct iio_trigger *iio_trigger_alloc(const char *fmt, ...)</div><div class='ctx'> {</div><div class='ctx'> 	va_list vargs;</div><div class='ctx'> 	struct iio_trigger *trig;</div><div class='hunk'>@@ -472,14 +472,14 @@ struct iio_trigger *iio_allocate_trigger(const char *fmt, ...)</div><div class='ctx'> 	}</div><div class='ctx'> 	return trig;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(iio_allocate_trigger);</div><div class='add'>+EXPORT_SYMBOL(iio_trigger_alloc);</div><div class='ctx'> </div><div class='del'>-void iio_free_trigger(struct iio_trigger *trig)</div><div class='add'>+void iio_trigger_free(struct iio_trigger *trig)</div><div class='ctx'> {</div><div class='ctx'> 	if (trig)</div><div class='ctx'> 		put_device(&amp;trig-&gt;dev);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(iio_free_trigger);</div><div class='add'>+EXPORT_SYMBOL(iio_trigger_free);</div><div class='ctx'> </div><div class='ctx'> void iio_device_register_trigger_consumer(struct iio_dev *indio_dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -491,7 +491,7 @@ void iio_device_unregister_trigger_consumer(struct iio_dev *indio_dev)</div><div class='ctx'> {</div><div class='ctx'> 	/* Clean up and associated but not attached triggers references */</div><div class='ctx'> 	if (indio_dev-&gt;trig)</div><div class='del'>-		iio_put_trigger(indio_dev-&gt;trig);</div><div class='add'>+		iio_trigger_put(indio_dev-&gt;trig);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int iio_triggered_buffer_postenable(struct iio_dev *indio_dev)</div><div class='head'>diff --git a/drivers/staging/iio/inkern.c b/drivers/iio/inkern.c<br/>index ef07a02bf542..922645893dc8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/iio/inkern.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/iio/inkern.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iio/inkern.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/inkern.c</a></div><div class='hunk'>@@ -11,11 +11,11 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "iio.h"</div><div class='add'>+#include &lt;linux/iio/iio.h&gt;</div><div class='ctx'> #include "iio_core.h"</div><div class='del'>-#include "machine.h"</div><div class='del'>-#include "driver.h"</div><div class='del'>-#include "consumer.h"</div><div class='add'>+#include &lt;linux/iio/machine.h&gt;</div><div class='add'>+#include &lt;linux/iio/driver.h&gt;</div><div class='add'>+#include &lt;linux/iio/consumer.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct iio_map_internal {</div><div class='ctx'> 	struct iio_dev *indio_dev;</div><div class='head'>diff --git a/drivers/staging/iio/kfifo_buf.c b/drivers/iio/kfifo_buf.c<br/>index 9f3bd59c0e72..6bf9d05f4841 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/iio/kfifo_buf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/iio/kfifo_buf.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iio/kfifo_buf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iio/kfifo_buf.c</a></div><div class='hunk'>@@ -5,8 +5,7 @@</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> #include &lt;linux/kfifo.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='del'>-</div><div class='del'>-#include "kfifo_buf.h"</div><div class='add'>+#include &lt;linux/iio/kfifo_buf.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct iio_kfifo {</div><div class='ctx'> 	struct iio_buffer buffer;</div><div class='head'>diff --git a/drivers/infiniband/Kconfig b/drivers/infiniband/Kconfig<br/>index eb0add311dc8..a0f29c1d03bc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/Kconfig</a></div><div class='hunk'>@@ -51,6 +51,7 @@ source "drivers/infiniband/hw/cxgb3/Kconfig"</div><div class='ctx'> source "drivers/infiniband/hw/cxgb4/Kconfig"</div><div class='ctx'> source "drivers/infiniband/hw/mlx4/Kconfig"</div><div class='ctx'> source "drivers/infiniband/hw/nes/Kconfig"</div><div class='add'>+source "drivers/infiniband/hw/ocrdma/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/infiniband/ulp/ipoib/Kconfig"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/infiniband/Makefile b/drivers/infiniband/Makefile<br/>index a3b2d8eac86e..bf846a14b9d3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/Makefile</a></div><div class='hunk'>@@ -8,6 +8,7 @@ obj-$(CONFIG_INFINIBAND_CXGB3)		+= hw/cxgb3/</div><div class='ctx'> obj-$(CONFIG_INFINIBAND_CXGB4)		+= hw/cxgb4/</div><div class='ctx'> obj-$(CONFIG_MLX4_INFINIBAND)		+= hw/mlx4/</div><div class='ctx'> obj-$(CONFIG_INFINIBAND_NES)		+= hw/nes/</div><div class='add'>+obj-$(CONFIG_INFINIBAND_OCRDMA)		+= hw/ocrdma/</div><div class='ctx'> obj-$(CONFIG_INFINIBAND_IPOIB)		+= ulp/ipoib/</div><div class='ctx'> obj-$(CONFIG_INFINIBAND_SRP)		+= ulp/srp/</div><div class='ctx'> obj-$(CONFIG_INFINIBAND_SRPT)		+= ulp/srpt/</div><div class='head'>diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c<br/>index e3e470fecaa9..55d5642eb10a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/core/cma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/core/cma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/core/cma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/core/cma.c</a></div><div class='hunk'>@@ -42,6 +42,7 @@</div><div class='ctx'> #include &lt;linux/inetdevice.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;net/route.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/tcp.h&gt;</div><div class='ctx'> #include &lt;net/ipv6.h&gt;</div><div class='hunk'>@@ -1218,13 +1219,13 @@ static int cma_req_handler(struct ib_cm_id *cm_id, struct ib_cm_event *ib_event)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!conn_id) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='del'>-		goto out;</div><div class='add'>+		goto err1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock_nested(&amp;conn_id-&gt;handler_mutex, SINGLE_DEPTH_NESTING);</div><div class='ctx'> 	ret = cma_acquire_dev(conn_id);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto release_conn_id;</div><div class='add'>+		goto err2;</div><div class='ctx'> </div><div class='ctx'> 	conn_id-&gt;cm_id.ib = cm_id;</div><div class='ctx'> 	cm_id-&gt;context = conn_id;</div><div class='hunk'>@@ -1236,31 +1237,33 @@ static int cma_req_handler(struct ib_cm_id *cm_id, struct ib_cm_event *ib_event)</div><div class='ctx'> 	 */</div><div class='ctx'> 	atomic_inc(&amp;conn_id-&gt;refcount);</div><div class='ctx'> 	ret = conn_id-&gt;id.event_handler(&amp;conn_id-&gt;id, &amp;event);</div><div class='del'>-	if (!ret) {</div><div class='del'>-		/*</div><div class='del'>-		 * Acquire mutex to prevent user executing rdma_destroy_id()</div><div class='del'>-		 * while we're accessing the cm_id.</div><div class='del'>-		 */</div><div class='del'>-		mutex_lock(&amp;lock);</div><div class='del'>-		if (cma_comp(conn_id, RDMA_CM_CONNECT) &amp;&amp; (conn_id-&gt;id.qp_type != IB_QPT_UD))</div><div class='del'>-			ib_send_cm_mra(cm_id, CMA_CM_MRA_SETTING, NULL, 0);</div><div class='del'>-		mutex_unlock(&amp;lock);</div><div class='del'>-		mutex_unlock(&amp;conn_id-&gt;handler_mutex);</div><div class='del'>-		cma_deref_id(conn_id);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err3;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Acquire mutex to prevent user executing rdma_destroy_id()</div><div class='add'>+	 * while we're accessing the cm_id.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;lock);</div><div class='add'>+	if (cma_comp(conn_id, RDMA_CM_CONNECT) &amp;&amp; (conn_id-&gt;id.qp_type != IB_QPT_UD))</div><div class='add'>+		ib_send_cm_mra(cm_id, CMA_CM_MRA_SETTING, NULL, 0);</div><div class='add'>+	mutex_unlock(&amp;lock);</div><div class='add'>+	mutex_unlock(&amp;conn_id-&gt;handler_mutex);</div><div class='add'>+	mutex_unlock(&amp;listen_id-&gt;handler_mutex);</div><div class='ctx'> 	cma_deref_id(conn_id);</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='add'>+err3:</div><div class='add'>+	cma_deref_id(conn_id);</div><div class='ctx'> 	/* Destroy the CM ID by returning a non-zero value. */</div><div class='ctx'> 	conn_id-&gt;cm_id.ib = NULL;</div><div class='del'>-</div><div class='del'>-release_conn_id:</div><div class='add'>+err2:</div><div class='ctx'> 	cma_exch(conn_id, RDMA_CM_DESTROYING);</div><div class='ctx'> 	mutex_unlock(&amp;conn_id-&gt;handler_mutex);</div><div class='del'>-	rdma_destroy_id(&amp;conn_id-&gt;id);</div><div class='del'>-</div><div class='del'>-out:</div><div class='add'>+err1:</div><div class='ctx'> 	mutex_unlock(&amp;listen_id-&gt;handler_mutex);</div><div class='add'>+	if (conn_id)</div><div class='add'>+		rdma_destroy_id(&amp;conn_id-&gt;id);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1826,7 +1829,10 @@ static int cma_resolve_iboe_route(struct rdma_id_private *id_priv)</div><div class='ctx'> 	route-&gt;path_rec-&gt;reversible = 1;</div><div class='ctx'> 	route-&gt;path_rec-&gt;pkey = cpu_to_be16(0xffff);</div><div class='ctx'> 	route-&gt;path_rec-&gt;mtu_selector = IB_SA_EQ;</div><div class='del'>-	route-&gt;path_rec-&gt;sl = id_priv-&gt;tos &gt;&gt; 5;</div><div class='add'>+	route-&gt;path_rec-&gt;sl = netdev_get_prio_tc_map(</div><div class='add'>+			ndev-&gt;priv_flags &amp; IFF_802_1Q_VLAN ?</div><div class='add'>+				vlan_dev_real_dev(ndev) : ndev,</div><div class='add'>+			rt_tos2priority(id_priv-&gt;tos));</div><div class='ctx'> </div><div class='ctx'> 	route-&gt;path_rec-&gt;mtu = iboe_get_mtu(ndev-&gt;mtu);</div><div class='ctx'> 	route-&gt;path_rec-&gt;rate_selector = IB_SA_EQ;</div><div class='head'>diff --git a/drivers/infiniband/core/netlink.c b/drivers/infiniband/core/netlink.c<br/>index 396e29370304..e497dfbee435 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/core/netlink.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/core/netlink.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/core/netlink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/core/netlink.c</a></div><div class='hunk'>@@ -125,7 +125,8 @@ int ibnl_put_attr(struct sk_buff *skb, struct nlmsghdr *nlh,</div><div class='ctx'> 	unsigned char *prev_tail;</div><div class='ctx'> </div><div class='ctx'> 	prev_tail = skb_tail_pointer(skb);</div><div class='del'>-	NLA_PUT(skb, type, len, data);</div><div class='add'>+	if (nla_put(skb, type, len, data))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	nlh-&gt;nlmsg_len += skb_tail_pointer(skb) - prev_tail;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/infiniband/core/ucma.c b/drivers/infiniband/core/ucma.c<br/>index 5861cdb22b7c..8002ae642cfe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/core/ucma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/core/ucma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/core/ucma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/core/ucma.c</a></div><div class='hunk'>@@ -66,12 +66,6 @@ static ctl_table ucma_ctl_table[] = {</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ctl_path ucma_ctl_path[] = {</div><div class='del'>-	{ .procname = "net" },</div><div class='del'>-	{ .procname = "rdma_ucm" },</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct ucma_file {</div><div class='ctx'> 	struct mutex		mut;</div><div class='ctx'> 	struct file		*filp;</div><div class='hunk'>@@ -1392,7 +1386,7 @@ static int __init ucma_init(void)</div><div class='ctx'> 		goto err1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ucma_ctl_table_hdr = register_sysctl_paths(ucma_ctl_path, ucma_ctl_table);</div><div class='add'>+	ucma_ctl_table_hdr = register_net_sysctl(&amp;init_net, "net/rdma_ucm", ucma_ctl_table);</div><div class='ctx'> 	if (!ucma_ctl_table_hdr) {</div><div class='ctx'> 		printk(KERN_ERR "rdma_ucm: couldn't register sysctl paths\n");</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -1408,7 +1402,7 @@ err1:</div><div class='ctx'> </div><div class='ctx'> static void __exit ucma_cleanup(void)</div><div class='ctx'> {</div><div class='del'>-	unregister_sysctl_table(ucma_ctl_table_hdr);</div><div class='add'>+	unregister_net_sysctl_table(ucma_ctl_table_hdr);</div><div class='ctx'> 	device_remove_file(ucma_misc.this_device, &amp;dev_attr_abi_version);</div><div class='ctx'> 	misc_deregister(&amp;ucma_misc);</div><div class='ctx'> 	idr_destroy(&amp;ctx_idr);</div><div class='head'>diff --git a/drivers/infiniband/core/umem.c b/drivers/infiniband/core/umem.c<br/>index 71f0c0f7df94..a84112322071 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/core/umem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/core/umem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/core/umem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/core/umem.c</a></div><div class='hunk'>@@ -269,7 +269,7 @@ void ib_umem_release(struct ib_umem *umem)</div><div class='ctx'> 	} else</div><div class='ctx'> 		down_write(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> </div><div class='del'>-	current-&gt;mm-&gt;locked_vm -= diff;</div><div class='add'>+	current-&gt;mm-&gt;pinned_vm -= diff;</div><div class='ctx'> 	up_write(&amp;mm-&gt;mmap_sem);</div><div class='ctx'> 	mmput(mm);</div><div class='ctx'> 	kfree(umem);</div><div class='head'>diff --git a/drivers/infiniband/core/uverbs_cmd.c b/drivers/infiniband/core/uverbs_cmd.c<br/>index 4d27e4c3fe34..f9d0d7c413a2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/core/uverbs_cmd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/core/uverbs_cmd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/core/uverbs_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/core/uverbs_cmd.c</a></div><div class='hunk'>@@ -41,13 +41,18 @@</div><div class='ctx'> </div><div class='ctx'> #include "uverbs.h"</div><div class='ctx'> </div><div class='del'>-static struct lock_class_key pd_lock_key;</div><div class='del'>-static struct lock_class_key mr_lock_key;</div><div class='del'>-static struct lock_class_key cq_lock_key;</div><div class='del'>-static struct lock_class_key qp_lock_key;</div><div class='del'>-static struct lock_class_key ah_lock_key;</div><div class='del'>-static struct lock_class_key srq_lock_key;</div><div class='del'>-static struct lock_class_key xrcd_lock_key;</div><div class='add'>+struct uverbs_lock_class {</div><div class='add'>+	struct lock_class_key	key;</div><div class='add'>+	char			name[16];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct uverbs_lock_class pd_lock_class	= { .name = "PD-uobj" };</div><div class='add'>+static struct uverbs_lock_class mr_lock_class	= { .name = "MR-uobj" };</div><div class='add'>+static struct uverbs_lock_class cq_lock_class	= { .name = "CQ-uobj" };</div><div class='add'>+static struct uverbs_lock_class qp_lock_class	= { .name = "QP-uobj" };</div><div class='add'>+static struct uverbs_lock_class ah_lock_class	= { .name = "AH-uobj" };</div><div class='add'>+static struct uverbs_lock_class srq_lock_class	= { .name = "SRQ-uobj" };</div><div class='add'>+static struct uverbs_lock_class xrcd_lock_class = { .name = "XRCD-uobj" };</div><div class='ctx'> </div><div class='ctx'> #define INIT_UDATA(udata, ibuf, obuf, ilen, olen)			\</div><div class='ctx'> 	do {								\</div><div class='hunk'>@@ -83,13 +88,13 @@ static struct lock_class_key xrcd_lock_key;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static void init_uobj(struct ib_uobject *uobj, u64 user_handle,</div><div class='del'>-		      struct ib_ucontext *context, struct lock_class_key *key)</div><div class='add'>+		      struct ib_ucontext *context, struct uverbs_lock_class *c)</div><div class='ctx'> {</div><div class='ctx'> 	uobj-&gt;user_handle = user_handle;</div><div class='ctx'> 	uobj-&gt;context     = context;</div><div class='ctx'> 	kref_init(&amp;uobj-&gt;ref);</div><div class='ctx'> 	init_rwsem(&amp;uobj-&gt;mutex);</div><div class='del'>-	lockdep_set_class(&amp;uobj-&gt;mutex, key);</div><div class='add'>+	lockdep_set_class_and_name(&amp;uobj-&gt;mutex, &amp;c-&gt;key, c-&gt;name);</div><div class='ctx'> 	uobj-&gt;live        = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -522,7 +527,7 @@ ssize_t ib_uverbs_alloc_pd(struct ib_uverbs_file *file,</div><div class='ctx'> 	if (!uobj)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	init_uobj(uobj, 0, file-&gt;ucontext, &amp;pd_lock_key);</div><div class='add'>+	init_uobj(uobj, 0, file-&gt;ucontext, &amp;pd_lock_class);</div><div class='ctx'> 	down_write(&amp;uobj-&gt;mutex);</div><div class='ctx'> </div><div class='ctx'> 	pd = file-&gt;device-&gt;ib_dev-&gt;alloc_pd(file-&gt;device-&gt;ib_dev,</div><div class='hunk'>@@ -750,7 +755,7 @@ ssize_t ib_uverbs_open_xrcd(struct ib_uverbs_file *file,</div><div class='ctx'> 		goto err_tree_mutex_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	init_uobj(&amp;obj-&gt;uobject, 0, file-&gt;ucontext, &amp;xrcd_lock_key);</div><div class='add'>+	init_uobj(&amp;obj-&gt;uobject, 0, file-&gt;ucontext, &amp;xrcd_lock_class);</div><div class='ctx'> </div><div class='ctx'> 	down_write(&amp;obj-&gt;uobject.mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -947,7 +952,7 @@ ssize_t ib_uverbs_reg_mr(struct ib_uverbs_file *file,</div><div class='ctx'> 	if (!uobj)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	init_uobj(uobj, 0, file-&gt;ucontext, &amp;mr_lock_key);</div><div class='add'>+	init_uobj(uobj, 0, file-&gt;ucontext, &amp;mr_lock_class);</div><div class='ctx'> 	down_write(&amp;uobj-&gt;mutex);</div><div class='ctx'> </div><div class='ctx'> 	pd = idr_read_pd(cmd.pd_handle, file-&gt;ucontext);</div><div class='hunk'>@@ -1115,7 +1120,7 @@ ssize_t ib_uverbs_create_cq(struct ib_uverbs_file *file,</div><div class='ctx'> 	if (!obj)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	init_uobj(&amp;obj-&gt;uobject, cmd.user_handle, file-&gt;ucontext, &amp;cq_lock_key);</div><div class='add'>+	init_uobj(&amp;obj-&gt;uobject, cmd.user_handle, file-&gt;ucontext, &amp;cq_lock_class);</div><div class='ctx'> 	down_write(&amp;obj-&gt;uobject.mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (cmd.comp_channel &gt;= 0) {</div><div class='hunk'>@@ -1399,6 +1404,9 @@ ssize_t ib_uverbs_create_qp(struct ib_uverbs_file *file,</div><div class='ctx'> 	if (copy_from_user(&amp;cmd, buf, sizeof cmd))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='add'>+	if (cmd.qp_type == IB_QPT_RAW_PACKET &amp;&amp; !capable(CAP_NET_RAW))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='ctx'> 	INIT_UDATA(&amp;udata, buf + sizeof cmd,</div><div class='ctx'> 		   (unsigned long) cmd.response + sizeof resp,</div><div class='ctx'> 		   in_len - sizeof cmd, out_len - sizeof resp);</div><div class='hunk'>@@ -1407,7 +1415,7 @@ ssize_t ib_uverbs_create_qp(struct ib_uverbs_file *file,</div><div class='ctx'> 	if (!obj)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	init_uobj(&amp;obj-&gt;uevent.uobject, cmd.user_handle, file-&gt;ucontext, &amp;qp_lock_key);</div><div class='add'>+	init_uobj(&amp;obj-&gt;uevent.uobject, cmd.user_handle, file-&gt;ucontext, &amp;qp_lock_class);</div><div class='ctx'> 	down_write(&amp;obj-&gt;uevent.uobject.mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (cmd.qp_type == IB_QPT_XRC_TGT) {</div><div class='hunk'>@@ -1418,13 +1426,6 @@ ssize_t ib_uverbs_create_qp(struct ib_uverbs_file *file,</div><div class='ctx'> 		}</div><div class='ctx'> 		device = xrcd-&gt;device;</div><div class='ctx'> 	} else {</div><div class='del'>-		pd  = idr_read_pd(cmd.pd_handle, file-&gt;ucontext);</div><div class='del'>-		scq = idr_read_cq(cmd.send_cq_handle, file-&gt;ucontext, 0);</div><div class='del'>-		if (!pd || !scq) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			goto err_put;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		if (cmd.qp_type == IB_QPT_XRC_INI) {</div><div class='ctx'> 			cmd.max_recv_wr = cmd.max_recv_sge = 0;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1435,13 +1436,24 @@ ssize_t ib_uverbs_create_qp(struct ib_uverbs_file *file,</div><div class='ctx'> 					goto err_put;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='del'>-			rcq = (cmd.recv_cq_handle == cmd.send_cq_handle) ?</div><div class='del'>-			       scq : idr_read_cq(cmd.recv_cq_handle, file-&gt;ucontext, 1);</div><div class='del'>-			if (!rcq) {</div><div class='del'>-				ret = -EINVAL;</div><div class='del'>-				goto err_put;</div><div class='add'>+</div><div class='add'>+			if (cmd.recv_cq_handle != cmd.send_cq_handle) {</div><div class='add'>+				rcq = idr_read_cq(cmd.recv_cq_handle, file-&gt;ucontext, 0);</div><div class='add'>+				if (!rcq) {</div><div class='add'>+					ret = -EINVAL;</div><div class='add'>+					goto err_put;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		scq = idr_read_cq(cmd.send_cq_handle, file-&gt;ucontext, !!rcq);</div><div class='add'>+		rcq = rcq ?: scq;</div><div class='add'>+		pd  = idr_read_pd(cmd.pd_handle, file-&gt;ucontext);</div><div class='add'>+		if (!pd || !scq) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto err_put;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		device = pd-&gt;device;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1585,7 +1597,7 @@ ssize_t ib_uverbs_open_qp(struct ib_uverbs_file *file,</div><div class='ctx'> 	if (!obj)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	init_uobj(&amp;obj-&gt;uevent.uobject, cmd.user_handle, file-&gt;ucontext, &amp;qp_lock_key);</div><div class='add'>+	init_uobj(&amp;obj-&gt;uevent.uobject, cmd.user_handle, file-&gt;ucontext, &amp;qp_lock_class);</div><div class='ctx'> 	down_write(&amp;obj-&gt;uevent.uobject.mutex);</div><div class='ctx'> </div><div class='ctx'> 	xrcd = idr_read_xrcd(cmd.pd_handle, file-&gt;ucontext, &amp;xrcd_uobj);</div><div class='hunk'>@@ -2272,7 +2284,7 @@ ssize_t ib_uverbs_create_ah(struct ib_uverbs_file *file,</div><div class='ctx'> 	if (!uobj)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	init_uobj(uobj, cmd.user_handle, file-&gt;ucontext, &amp;ah_lock_key);</div><div class='add'>+	init_uobj(uobj, cmd.user_handle, file-&gt;ucontext, &amp;ah_lock_class);</div><div class='ctx'> 	down_write(&amp;uobj-&gt;mutex);</div><div class='ctx'> </div><div class='ctx'> 	pd = idr_read_pd(cmd.pd_handle, file-&gt;ucontext);</div><div class='hunk'>@@ -2476,30 +2488,30 @@ static int __uverbs_create_xsrq(struct ib_uverbs_file *file,</div><div class='ctx'> 	if (!obj)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	init_uobj(&amp;obj-&gt;uevent.uobject, cmd-&gt;user_handle, file-&gt;ucontext, &amp;srq_lock_key);</div><div class='add'>+	init_uobj(&amp;obj-&gt;uevent.uobject, cmd-&gt;user_handle, file-&gt;ucontext, &amp;srq_lock_class);</div><div class='ctx'> 	down_write(&amp;obj-&gt;uevent.uobject.mutex);</div><div class='ctx'> </div><div class='del'>-	pd  = idr_read_pd(cmd-&gt;pd_handle, file-&gt;ucontext);</div><div class='del'>-	if (!pd) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (cmd-&gt;srq_type == IB_SRQT_XRC) {</div><div class='del'>-		attr.ext.xrc.cq  = idr_read_cq(cmd-&gt;cq_handle, file-&gt;ucontext, 0);</div><div class='del'>-		if (!attr.ext.xrc.cq) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			goto err_put_pd;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		attr.ext.xrc.xrcd  = idr_read_xrcd(cmd-&gt;xrcd_handle, file-&gt;ucontext, &amp;xrcd_uobj);</div><div class='ctx'> 		if (!attr.ext.xrc.xrcd) {</div><div class='ctx'> 			ret = -EINVAL;</div><div class='del'>-			goto err_put_cq;</div><div class='add'>+			goto err;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		obj-&gt;uxrcd = container_of(xrcd_uobj, struct ib_uxrcd_object, uobject);</div><div class='ctx'> 		atomic_inc(&amp;obj-&gt;uxrcd-&gt;refcnt);</div><div class='add'>+</div><div class='add'>+		attr.ext.xrc.cq  = idr_read_cq(cmd-&gt;cq_handle, file-&gt;ucontext, 0);</div><div class='add'>+		if (!attr.ext.xrc.cq) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto err_put_xrcd;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pd  = idr_read_pd(cmd-&gt;pd_handle, file-&gt;ucontext);</div><div class='add'>+	if (!pd) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_put_cq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	attr.event_handler  = ib_uverbs_srq_event_handler;</div><div class='hunk'>@@ -2576,17 +2588,17 @@ err_destroy:</div><div class='ctx'> 	ib_destroy_srq(srq);</div><div class='ctx'> </div><div class='ctx'> err_put:</div><div class='del'>-	if (cmd-&gt;srq_type == IB_SRQT_XRC) {</div><div class='del'>-		atomic_dec(&amp;obj-&gt;uxrcd-&gt;refcnt);</div><div class='del'>-		put_uobj_read(xrcd_uobj);</div><div class='del'>-	}</div><div class='add'>+	put_pd_read(pd);</div><div class='ctx'> </div><div class='ctx'> err_put_cq:</div><div class='ctx'> 	if (cmd-&gt;srq_type == IB_SRQT_XRC)</div><div class='ctx'> 		put_cq_read(attr.ext.xrc.cq);</div><div class='ctx'> </div><div class='del'>-err_put_pd:</div><div class='del'>-	put_pd_read(pd);</div><div class='add'>+err_put_xrcd:</div><div class='add'>+	if (cmd-&gt;srq_type == IB_SRQT_XRC) {</div><div class='add'>+		atomic_dec(&amp;obj-&gt;uxrcd-&gt;refcnt);</div><div class='add'>+		put_uobj_read(xrcd_uobj);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='ctx'> 	put_uobj_write(&amp;obj-&gt;uevent.uobject);</div><div class='head'>diff --git a/drivers/infiniband/core/verbs.c b/drivers/infiniband/core/verbs.c<br/>index 575b78045aaf..30f199e8579f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/core/verbs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/core/verbs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/core/verbs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/core/verbs.c</a></div><div class='hunk'>@@ -479,6 +479,7 @@ static const struct {</div><div class='ctx'> 				[IB_QPT_UD]  = (IB_QP_PKEY_INDEX		|</div><div class='ctx'> 						IB_QP_PORT			|</div><div class='ctx'> 						IB_QP_QKEY),</div><div class='add'>+				[IB_QPT_RAW_PACKET] = IB_QP_PORT,</div><div class='ctx'> 				[IB_QPT_UC]  = (IB_QP_PKEY_INDEX		|</div><div class='ctx'> 						IB_QP_PORT			|</div><div class='ctx'> 						IB_QP_ACCESS_FLAGS),</div><div class='hunk'>@@ -1183,23 +1184,33 @@ EXPORT_SYMBOL(ib_dealloc_fmr);</div><div class='ctx'> </div><div class='ctx'> int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	if (!qp-&gt;device-&gt;attach_mcast)</div><div class='ctx'> 		return -ENOSYS;</div><div class='ctx'> 	if (gid-&gt;raw[0] != 0xff || qp-&gt;qp_type != IB_QPT_UD)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return qp-&gt;device-&gt;attach_mcast(qp, gid, lid);</div><div class='add'>+	ret = qp-&gt;device-&gt;attach_mcast(qp, gid, lid);</div><div class='add'>+	if (!ret)</div><div class='add'>+		atomic_inc(&amp;qp-&gt;usecnt);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ib_attach_mcast);</div><div class='ctx'> </div><div class='ctx'> int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	if (!qp-&gt;device-&gt;detach_mcast)</div><div class='ctx'> 		return -ENOSYS;</div><div class='ctx'> 	if (gid-&gt;raw[0] != 0xff || qp-&gt;qp_type != IB_QPT_UD)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return qp-&gt;device-&gt;detach_mcast(qp, gid, lid);</div><div class='add'>+	ret = qp-&gt;device-&gt;detach_mcast(qp, gid, lid);</div><div class='add'>+	if (!ret)</div><div class='add'>+		atomic_dec(&amp;qp-&gt;usecnt);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ib_detach_mcast);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/infiniband/hw/cxgb4/Makefile b/drivers/infiniband/hw/cxgb4/Makefile<br/>index 46b878ca2c3b..e11cf7299945 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/cxgb4/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/Makefile</a></div><div class='hunk'>@@ -2,4 +2,4 @@ ccflags-y := -Idrivers/net/ethernet/chelsio/cxgb4</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_INFINIBAND_CXGB4) += iw_cxgb4.o</div><div class='ctx'> </div><div class='del'>-iw_cxgb4-y :=  device.o cm.o provider.o mem.o cq.o qp.o resource.o ev.o</div><div class='add'>+iw_cxgb4-y :=  device.o cm.o provider.o mem.o cq.o qp.o resource.o ev.o id_table.o</div><div class='head'>diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c<br/>index 92b4c2b0308b..b18870c455ad 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/cm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/cxgb4/cm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/cm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/cm.c</a></div><div class='hunk'>@@ -1362,7 +1362,10 @@ static int abort_rpl(struct c4iw_dev *dev, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	ep = lookup_tid(t, tid);</div><div class='ctx'> 	PDBG("%s ep %p tid %u\n", __func__, ep, ep-&gt;hwtid);</div><div class='del'>-	BUG_ON(!ep);</div><div class='add'>+	if (!ep) {</div><div class='add'>+		printk(KERN_WARNING MOD "Abort rpl to freed endpoint\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> 	mutex_lock(&amp;ep-&gt;com.mutex);</div><div class='ctx'> 	switch (ep-&gt;com.state) {</div><div class='ctx'> 	case ABORTING:</div><div class='hunk'>@@ -1410,6 +1413,24 @@ static int act_open_rpl(struct c4iw_dev *dev, struct sk_buff *skb)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Log interesting failures.</div><div class='add'>+	 */</div><div class='add'>+	switch (status) {</div><div class='add'>+	case CPL_ERR_CONN_RESET:</div><div class='add'>+	case CPL_ERR_CONN_TIMEDOUT:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		printk(KERN_INFO MOD "Active open failure - "</div><div class='add'>+		       "atid %u status %u errno %d %pI4:%u-&gt;%pI4:%u\n",</div><div class='add'>+		       atid, status, status2errno(status),</div><div class='add'>+		       &amp;ep-&gt;com.local_addr.sin_addr.s_addr,</div><div class='add'>+		       ntohs(ep-&gt;com.local_addr.sin_port),</div><div class='add'>+		       &amp;ep-&gt;com.remote_addr.sin_addr.s_addr,</div><div class='add'>+		       ntohs(ep-&gt;com.remote_addr.sin_port));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	connect_reply_upcall(ep, status2errno(status));</div><div class='ctx'> 	state_set(&amp;ep-&gt;com, DEAD);</div><div class='ctx'> </div><div class='hunk'>@@ -1572,6 +1593,10 @@ static int import_ep(struct c4iw_ep *ep, __be32 peer_ip, struct dst_entry *dst,</div><div class='ctx'> 		struct net_device *pdev;</div><div class='ctx'> </div><div class='ctx'> 		pdev = ip_dev_find(&amp;init_net, peer_ip);</div><div class='add'>+		if (!pdev) {</div><div class='add'>+			err = -ENODEV;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='ctx'> 		ep-&gt;l2t = cxgb4_l2t_get(cdev-&gt;rdev.lldi.l2t,</div><div class='ctx'> 					n, pdev, 0);</div><div class='ctx'> 		if (!ep-&gt;l2t)</div><div class='hunk'>@@ -1593,7 +1618,7 @@ static int import_ep(struct c4iw_ep *ep, __be32 peer_ip, struct dst_entry *dst,</div><div class='ctx'> 					n, n-&gt;dev, 0);</div><div class='ctx'> 		if (!ep-&gt;l2t)</div><div class='ctx'> 			goto out;</div><div class='del'>-		ep-&gt;mtu = dst_mtu(ep-&gt;dst);</div><div class='add'>+		ep-&gt;mtu = dst_mtu(dst);</div><div class='ctx'> 		ep-&gt;tx_chan = cxgb4_port_chan(n-&gt;dev);</div><div class='ctx'> 		ep-&gt;smac_idx = (cxgb4_port_viid(n-&gt;dev) &amp; 0x7F) &lt;&lt; 1;</div><div class='ctx'> 		step = cdev-&gt;rdev.lldi.ntxq /</div><div class='hunk'>@@ -2656,6 +2681,12 @@ static int peer_abort_intr(struct c4iw_dev *dev, struct sk_buff *skb)</div><div class='ctx'> 	unsigned int tid = GET_TID(req);</div><div class='ctx'> </div><div class='ctx'> 	ep = lookup_tid(t, tid);</div><div class='add'>+	if (!ep) {</div><div class='add'>+		printk(KERN_WARNING MOD</div><div class='add'>+		       "Abort on non-existent endpoint, tid %d\n", tid);</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> 	if (is_neg_adv_abort(req-&gt;status)) {</div><div class='ctx'> 		PDBG("%s neg_adv_abort ep %p tid %u\n", __func__, ep,</div><div class='ctx'> 		     ep-&gt;hwtid);</div><div class='hunk'>@@ -2667,11 +2698,8 @@ static int peer_abort_intr(struct c4iw_dev *dev, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Wake up any threads in rdma_init() or rdma_fini().</div><div class='del'>-	 * However, this is not needed if com state is just</div><div class='del'>-	 * MPA_REQ_SENT</div><div class='ctx'> 	 */</div><div class='del'>-	if (ep-&gt;com.state != MPA_REQ_SENT)</div><div class='del'>-		c4iw_wake_up(&amp;ep-&gt;com.wr_wait, -ECONNRESET);</div><div class='add'>+	c4iw_wake_up(&amp;ep-&gt;com.wr_wait, -ECONNRESET);</div><div class='ctx'> 	sched(dev, skb);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/infiniband/hw/cxgb4/device.c b/drivers/infiniband/hw/cxgb4/device.c<br/>index 6d0df6ec161b..cb4ecd783700 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/cxgb4/device.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/device.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;rdma/ib_verbs.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -44,6 +45,12 @@ MODULE_DESCRIPTION("Chelsio T4 RDMA Driver");</div><div class='ctx'> MODULE_LICENSE("Dual BSD/GPL");</div><div class='ctx'> MODULE_VERSION(DRV_VERSION);</div><div class='ctx'> </div><div class='add'>+struct uld_ctx {</div><div class='add'>+	struct list_head entry;</div><div class='add'>+	struct cxgb4_lld_info lldi;</div><div class='add'>+	struct c4iw_dev *dev;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static LIST_HEAD(uld_ctx_list);</div><div class='ctx'> static DEFINE_MUTEX(dev_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -115,7 +122,7 @@ static int qp_release(struct inode *inode, struct file *file)</div><div class='ctx'> 		printk(KERN_INFO "%s null qpd?\n", __func__);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	kfree(qpd-&gt;buf);</div><div class='add'>+	vfree(qpd-&gt;buf);</div><div class='ctx'> 	kfree(qpd);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -139,7 +146,7 @@ static int qp_open(struct inode *inode, struct file *file)</div><div class='ctx'> 	spin_unlock_irq(&amp;qpd-&gt;devp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	qpd-&gt;bufsize = count * 128;</div><div class='del'>-	qpd-&gt;buf = kmalloc(qpd-&gt;bufsize, GFP_KERNEL);</div><div class='add'>+	qpd-&gt;buf = vmalloc(qpd-&gt;bufsize);</div><div class='ctx'> 	if (!qpd-&gt;buf) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto err1;</div><div class='hunk'>@@ -240,6 +247,81 @@ static const struct file_operations stag_debugfs_fops = {</div><div class='ctx'> 	.llseek  = default_llseek,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static char *db_state_str[] = {"NORMAL", "FLOW_CONTROL", "RECOVERY"};</div><div class='add'>+</div><div class='add'>+static int stats_show(struct seq_file *seq, void *v)</div><div class='add'>+{</div><div class='add'>+	struct c4iw_dev *dev = seq-&gt;private;</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "   Object: %10s %10s %10s %10s\n", "Total", "Current",</div><div class='add'>+		   "Max", "Fail");</div><div class='add'>+	seq_printf(seq, "     PDID: %10llu %10llu %10llu %10llu\n",</div><div class='add'>+			dev-&gt;rdev.stats.pd.total, dev-&gt;rdev.stats.pd.cur,</div><div class='add'>+			dev-&gt;rdev.stats.pd.max, dev-&gt;rdev.stats.pd.fail);</div><div class='add'>+	seq_printf(seq, "      QID: %10llu %10llu %10llu %10llu\n",</div><div class='add'>+			dev-&gt;rdev.stats.qid.total, dev-&gt;rdev.stats.qid.cur,</div><div class='add'>+			dev-&gt;rdev.stats.qid.max, dev-&gt;rdev.stats.qid.fail);</div><div class='add'>+	seq_printf(seq, "   TPTMEM: %10llu %10llu %10llu %10llu\n",</div><div class='add'>+			dev-&gt;rdev.stats.stag.total, dev-&gt;rdev.stats.stag.cur,</div><div class='add'>+			dev-&gt;rdev.stats.stag.max, dev-&gt;rdev.stats.stag.fail);</div><div class='add'>+	seq_printf(seq, "   PBLMEM: %10llu %10llu %10llu %10llu\n",</div><div class='add'>+			dev-&gt;rdev.stats.pbl.total, dev-&gt;rdev.stats.pbl.cur,</div><div class='add'>+			dev-&gt;rdev.stats.pbl.max, dev-&gt;rdev.stats.pbl.fail);</div><div class='add'>+	seq_printf(seq, "   RQTMEM: %10llu %10llu %10llu %10llu\n",</div><div class='add'>+			dev-&gt;rdev.stats.rqt.total, dev-&gt;rdev.stats.rqt.cur,</div><div class='add'>+			dev-&gt;rdev.stats.rqt.max, dev-&gt;rdev.stats.rqt.fail);</div><div class='add'>+	seq_printf(seq, "  OCQPMEM: %10llu %10llu %10llu %10llu\n",</div><div class='add'>+			dev-&gt;rdev.stats.ocqp.total, dev-&gt;rdev.stats.ocqp.cur,</div><div class='add'>+			dev-&gt;rdev.stats.ocqp.max, dev-&gt;rdev.stats.ocqp.fail);</div><div class='add'>+	seq_printf(seq, "  DB FULL: %10llu\n", dev-&gt;rdev.stats.db_full);</div><div class='add'>+	seq_printf(seq, " DB EMPTY: %10llu\n", dev-&gt;rdev.stats.db_empty);</div><div class='add'>+	seq_printf(seq, "  DB DROP: %10llu\n", dev-&gt;rdev.stats.db_drop);</div><div class='add'>+	seq_printf(seq, " DB State: %s Transitions %llu\n",</div><div class='add'>+		   db_state_str[dev-&gt;db_state],</div><div class='add'>+		   dev-&gt;rdev.stats.db_state_transitions);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stats_open(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	return single_open(file, stats_show, inode-&gt;i_private);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t stats_clear(struct file *file, const char __user *buf,</div><div class='add'>+		size_t count, loff_t *pos)</div><div class='add'>+{</div><div class='add'>+	struct c4iw_dev *dev = ((struct seq_file *)file-&gt;private_data)-&gt;private;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;rdev.stats.lock);</div><div class='add'>+	dev-&gt;rdev.stats.pd.max = 0;</div><div class='add'>+	dev-&gt;rdev.stats.pd.fail = 0;</div><div class='add'>+	dev-&gt;rdev.stats.qid.max = 0;</div><div class='add'>+	dev-&gt;rdev.stats.qid.fail = 0;</div><div class='add'>+	dev-&gt;rdev.stats.stag.max = 0;</div><div class='add'>+	dev-&gt;rdev.stats.stag.fail = 0;</div><div class='add'>+	dev-&gt;rdev.stats.pbl.max = 0;</div><div class='add'>+	dev-&gt;rdev.stats.pbl.fail = 0;</div><div class='add'>+	dev-&gt;rdev.stats.rqt.max = 0;</div><div class='add'>+	dev-&gt;rdev.stats.rqt.fail = 0;</div><div class='add'>+	dev-&gt;rdev.stats.ocqp.max = 0;</div><div class='add'>+	dev-&gt;rdev.stats.ocqp.fail = 0;</div><div class='add'>+	dev-&gt;rdev.stats.db_full = 0;</div><div class='add'>+	dev-&gt;rdev.stats.db_empty = 0;</div><div class='add'>+	dev-&gt;rdev.stats.db_drop = 0;</div><div class='add'>+	dev-&gt;rdev.stats.db_state_transitions = 0;</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;rdev.stats.lock);</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations stats_debugfs_fops = {</div><div class='add'>+	.owner   = THIS_MODULE,</div><div class='add'>+	.open    = stats_open,</div><div class='add'>+	.release = single_release,</div><div class='add'>+	.read    = seq_read,</div><div class='add'>+	.llseek  = seq_lseek,</div><div class='add'>+	.write   = stats_clear,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int setup_debugfs(struct c4iw_dev *devp)</div><div class='ctx'> {</div><div class='ctx'> 	struct dentry *de;</div><div class='hunk'>@@ -256,6 +338,12 @@ static int setup_debugfs(struct c4iw_dev *devp)</div><div class='ctx'> 				 (void *)devp, &amp;stag_debugfs_fops);</div><div class='ctx'> 	if (de &amp;&amp; de-&gt;d_inode)</div><div class='ctx'> 		de-&gt;d_inode-&gt;i_size = 4096;</div><div class='add'>+</div><div class='add'>+	de = debugfs_create_file("stats", S_IWUSR, devp-&gt;debugfs_root,</div><div class='add'>+			(void *)devp, &amp;stats_debugfs_fops);</div><div class='add'>+	if (de &amp;&amp; de-&gt;d_inode)</div><div class='add'>+		de-&gt;d_inode-&gt;i_size = 4096;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -269,9 +357,13 @@ void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,</div><div class='ctx'> 	list_for_each_safe(pos, nxt, &amp;uctx-&gt;qpids) {</div><div class='ctx'> 		entry = list_entry(pos, struct c4iw_qid_list, entry);</div><div class='ctx'> 		list_del_init(&amp;entry-&gt;entry);</div><div class='del'>-		if (!(entry-&gt;qid &amp; rdev-&gt;qpmask))</div><div class='del'>-			c4iw_put_resource(&amp;rdev-&gt;resource.qid_fifo, entry-&gt;qid,</div><div class='del'>-					  &amp;rdev-&gt;resource.qid_fifo_lock);</div><div class='add'>+		if (!(entry-&gt;qid &amp; rdev-&gt;qpmask)) {</div><div class='add'>+			c4iw_put_resource(&amp;rdev-&gt;resource.qid_table,</div><div class='add'>+					  entry-&gt;qid);</div><div class='add'>+			mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+			rdev-&gt;stats.qid.cur -= rdev-&gt;qpmask + 1;</div><div class='add'>+			mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+		}</div><div class='ctx'> 		kfree(entry);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -332,6 +424,13 @@ static int c4iw_rdev_open(struct c4iw_rdev *rdev)</div><div class='ctx'> 		goto err1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	rdev-&gt;stats.pd.total = T4_MAX_NUM_PD;</div><div class='add'>+	rdev-&gt;stats.stag.total = rdev-&gt;lldi.vr-&gt;stag.size;</div><div class='add'>+	rdev-&gt;stats.pbl.total = rdev-&gt;lldi.vr-&gt;pbl.size;</div><div class='add'>+	rdev-&gt;stats.rqt.total = rdev-&gt;lldi.vr-&gt;rq.size;</div><div class='add'>+	rdev-&gt;stats.ocqp.total = rdev-&gt;lldi.vr-&gt;ocq.size;</div><div class='add'>+	rdev-&gt;stats.qid.total = rdev-&gt;lldi.vr-&gt;qp.size;</div><div class='add'>+</div><div class='ctx'> 	err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		printk(KERN_ERR MOD "error %d initializing resources\n", err);</div><div class='hunk'>@@ -370,12 +469,6 @@ static void c4iw_rdev_close(struct c4iw_rdev *rdev)</div><div class='ctx'> 	c4iw_destroy_resource(&amp;rdev-&gt;resource);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct uld_ctx {</div><div class='del'>-	struct list_head entry;</div><div class='del'>-	struct cxgb4_lld_info lldi;</div><div class='del'>-	struct c4iw_dev *dev;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void c4iw_dealloc(struct uld_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	c4iw_rdev_close(&amp;ctx-&gt;dev-&gt;rdev);</div><div class='hunk'>@@ -440,6 +533,8 @@ static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)</div><div class='ctx'> 	idr_init(&amp;devp-&gt;qpidr);</div><div class='ctx'> 	idr_init(&amp;devp-&gt;mmidr);</div><div class='ctx'> 	spin_lock_init(&amp;devp-&gt;lock);</div><div class='add'>+	mutex_init(&amp;devp-&gt;rdev.stats.lock);</div><div class='add'>+	mutex_init(&amp;devp-&gt;db_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (c4iw_debugfs_root) {</div><div class='ctx'> 		devp-&gt;debugfs_root = debugfs_create_dir(</div><div class='hunk'>@@ -585,11 +680,234 @@ static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int disable_qp_db(int id, void *p, void *data)</div><div class='add'>+{</div><div class='add'>+	struct c4iw_qp *qp = p;</div><div class='add'>+</div><div class='add'>+	t4_disable_wq_db(&amp;qp-&gt;wq);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void stop_queues(struct uld_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	spin_lock_irq(&amp;ctx-&gt;dev-&gt;lock);</div><div class='add'>+	if (ctx-&gt;dev-&gt;db_state == NORMAL) {</div><div class='add'>+		ctx-&gt;dev-&gt;rdev.stats.db_state_transitions++;</div><div class='add'>+		ctx-&gt;dev-&gt;db_state = FLOW_CONTROL;</div><div class='add'>+		idr_for_each(&amp;ctx-&gt;dev-&gt;qpidr, disable_qp_db, NULL);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(&amp;ctx-&gt;dev-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enable_qp_db(int id, void *p, void *data)</div><div class='add'>+{</div><div class='add'>+	struct c4iw_qp *qp = p;</div><div class='add'>+</div><div class='add'>+	t4_enable_wq_db(&amp;qp-&gt;wq);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void resume_queues(struct uld_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	spin_lock_irq(&amp;ctx-&gt;dev-&gt;lock);</div><div class='add'>+	if (ctx-&gt;dev-&gt;qpcnt &lt;= db_fc_threshold &amp;&amp;</div><div class='add'>+	    ctx-&gt;dev-&gt;db_state == FLOW_CONTROL) {</div><div class='add'>+		ctx-&gt;dev-&gt;db_state = NORMAL;</div><div class='add'>+		ctx-&gt;dev-&gt;rdev.stats.db_state_transitions++;</div><div class='add'>+		idr_for_each(&amp;ctx-&gt;dev-&gt;qpidr, enable_qp_db, NULL);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(&amp;ctx-&gt;dev-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct qp_list {</div><div class='add'>+	unsigned idx;</div><div class='add'>+	struct c4iw_qp **qps;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int add_and_ref_qp(int id, void *p, void *data)</div><div class='add'>+{</div><div class='add'>+	struct qp_list *qp_listp = data;</div><div class='add'>+	struct c4iw_qp *qp = p;</div><div class='add'>+</div><div class='add'>+	c4iw_qp_add_ref(&amp;qp-&gt;ibqp);</div><div class='add'>+	qp_listp-&gt;qps[qp_listp-&gt;idx++] = qp;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int count_qps(int id, void *p, void *data)</div><div class='add'>+{</div><div class='add'>+	unsigned *countp = data;</div><div class='add'>+	(*countp)++;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void deref_qps(struct qp_list qp_list)</div><div class='add'>+{</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	for (idx = 0; idx &lt; qp_list.idx; idx++)</div><div class='add'>+		c4iw_qp_rem_ref(&amp;qp_list.qps[idx]-&gt;ibqp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void recover_lost_dbs(struct uld_ctx *ctx, struct qp_list *qp_list)</div><div class='add'>+{</div><div class='add'>+	int idx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	for (idx = 0; idx &lt; qp_list-&gt;idx; idx++) {</div><div class='add'>+		struct c4iw_qp *qp = qp_list-&gt;qps[idx];</div><div class='add'>+</div><div class='add'>+		ret = cxgb4_sync_txq_pidx(qp-&gt;rhp-&gt;rdev.lldi.ports[0],</div><div class='add'>+					  qp-&gt;wq.sq.qid,</div><div class='add'>+					  t4_sq_host_wq_pidx(&amp;qp-&gt;wq),</div><div class='add'>+					  t4_sq_wq_size(&amp;qp-&gt;wq));</div><div class='add'>+		if (ret) {</div><div class='add'>+			printk(KERN_ERR MOD "%s: Fatal error - "</div><div class='add'>+			       "DB overflow recovery failed - "</div><div class='add'>+			       "error syncing SQ qid %u\n",</div><div class='add'>+			       pci_name(ctx-&gt;lldi.pdev), qp-&gt;wq.sq.qid);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = cxgb4_sync_txq_pidx(qp-&gt;rhp-&gt;rdev.lldi.ports[0],</div><div class='add'>+					  qp-&gt;wq.rq.qid,</div><div class='add'>+					  t4_rq_host_wq_pidx(&amp;qp-&gt;wq),</div><div class='add'>+					  t4_rq_wq_size(&amp;qp-&gt;wq));</div><div class='add'>+</div><div class='add'>+		if (ret) {</div><div class='add'>+			printk(KERN_ERR MOD "%s: Fatal error - "</div><div class='add'>+			       "DB overflow recovery failed - "</div><div class='add'>+			       "error syncing RQ qid %u\n",</div><div class='add'>+			       pci_name(ctx-&gt;lldi.pdev), qp-&gt;wq.rq.qid);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Wait for the dbfifo to drain */</div><div class='add'>+		while (cxgb4_dbfifo_count(qp-&gt;rhp-&gt;rdev.lldi.ports[0], 1) &gt; 0) {</div><div class='add'>+			set_current_state(TASK_UNINTERRUPTIBLE);</div><div class='add'>+			schedule_timeout(usecs_to_jiffies(10));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void recover_queues(struct uld_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	int count = 0;</div><div class='add'>+	struct qp_list qp_list;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* lock out kernel db ringers */</div><div class='add'>+	mutex_lock(&amp;ctx-&gt;dev-&gt;db_mutex);</div><div class='add'>+</div><div class='add'>+	/* put all queues in to recovery mode */</div><div class='add'>+	spin_lock_irq(&amp;ctx-&gt;dev-&gt;lock);</div><div class='add'>+	ctx-&gt;dev-&gt;db_state = RECOVERY;</div><div class='add'>+	ctx-&gt;dev-&gt;rdev.stats.db_state_transitions++;</div><div class='add'>+	idr_for_each(&amp;ctx-&gt;dev-&gt;qpidr, disable_qp_db, NULL);</div><div class='add'>+	spin_unlock_irq(&amp;ctx-&gt;dev-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* slow everybody down */</div><div class='add'>+	set_current_state(TASK_UNINTERRUPTIBLE);</div><div class='add'>+	schedule_timeout(usecs_to_jiffies(1000));</div><div class='add'>+</div><div class='add'>+	/* Wait for the dbfifo to completely drain. */</div><div class='add'>+	while (cxgb4_dbfifo_count(ctx-&gt;dev-&gt;rdev.lldi.ports[0], 1) &gt; 0) {</div><div class='add'>+		set_current_state(TASK_UNINTERRUPTIBLE);</div><div class='add'>+		schedule_timeout(usecs_to_jiffies(10));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* flush the SGE contexts */</div><div class='add'>+	ret = cxgb4_flush_eq_cache(ctx-&gt;dev-&gt;rdev.lldi.ports[0]);</div><div class='add'>+	if (ret) {</div><div class='add'>+		printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",</div><div class='add'>+		       pci_name(ctx-&gt;lldi.pdev));</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Count active queues so we can build a list of queues to recover */</div><div class='add'>+	spin_lock_irq(&amp;ctx-&gt;dev-&gt;lock);</div><div class='add'>+	idr_for_each(&amp;ctx-&gt;dev-&gt;qpidr, count_qps, &amp;count);</div><div class='add'>+</div><div class='add'>+	qp_list.qps = kzalloc(count * sizeof *qp_list.qps, GFP_ATOMIC);</div><div class='add'>+	if (!qp_list.qps) {</div><div class='add'>+		printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",</div><div class='add'>+		       pci_name(ctx-&gt;lldi.pdev));</div><div class='add'>+		spin_unlock_irq(&amp;ctx-&gt;dev-&gt;lock);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	qp_list.idx = 0;</div><div class='add'>+</div><div class='add'>+	/* add and ref each qp so it doesn't get freed */</div><div class='add'>+	idr_for_each(&amp;ctx-&gt;dev-&gt;qpidr, add_and_ref_qp, &amp;qp_list);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;ctx-&gt;dev-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* now traverse the list in a safe context to recover the db state*/</div><div class='add'>+	recover_lost_dbs(ctx, &amp;qp_list);</div><div class='add'>+</div><div class='add'>+	/* we're almost done!  deref the qps and clean up */</div><div class='add'>+	deref_qps(qp_list);</div><div class='add'>+	kfree(qp_list.qps);</div><div class='add'>+</div><div class='add'>+	/* Wait for the dbfifo to completely drain again */</div><div class='add'>+	while (cxgb4_dbfifo_count(ctx-&gt;dev-&gt;rdev.lldi.ports[0], 1) &gt; 0) {</div><div class='add'>+		set_current_state(TASK_UNINTERRUPTIBLE);</div><div class='add'>+		schedule_timeout(usecs_to_jiffies(10));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* resume the queues */</div><div class='add'>+	spin_lock_irq(&amp;ctx-&gt;dev-&gt;lock);</div><div class='add'>+	if (ctx-&gt;dev-&gt;qpcnt &gt; db_fc_threshold)</div><div class='add'>+		ctx-&gt;dev-&gt;db_state = FLOW_CONTROL;</div><div class='add'>+	else {</div><div class='add'>+		ctx-&gt;dev-&gt;db_state = NORMAL;</div><div class='add'>+		idr_for_each(&amp;ctx-&gt;dev-&gt;qpidr, enable_qp_db, NULL);</div><div class='add'>+	}</div><div class='add'>+	ctx-&gt;dev-&gt;rdev.stats.db_state_transitions++;</div><div class='add'>+	spin_unlock_irq(&amp;ctx-&gt;dev-&gt;lock);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	/* start up kernel db ringers again */</div><div class='add'>+	mutex_unlock(&amp;ctx-&gt;dev-&gt;db_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c4iw_uld_control(void *handle, enum cxgb4_control control, ...)</div><div class='add'>+{</div><div class='add'>+	struct uld_ctx *ctx = handle;</div><div class='add'>+</div><div class='add'>+	switch (control) {</div><div class='add'>+	case CXGB4_CONTROL_DB_FULL:</div><div class='add'>+		stop_queues(ctx);</div><div class='add'>+		mutex_lock(&amp;ctx-&gt;dev-&gt;rdev.stats.lock);</div><div class='add'>+		ctx-&gt;dev-&gt;rdev.stats.db_full++;</div><div class='add'>+		mutex_unlock(&amp;ctx-&gt;dev-&gt;rdev.stats.lock);</div><div class='add'>+		break;</div><div class='add'>+	case CXGB4_CONTROL_DB_EMPTY:</div><div class='add'>+		resume_queues(ctx);</div><div class='add'>+		mutex_lock(&amp;ctx-&gt;dev-&gt;rdev.stats.lock);</div><div class='add'>+		ctx-&gt;dev-&gt;rdev.stats.db_empty++;</div><div class='add'>+		mutex_unlock(&amp;ctx-&gt;dev-&gt;rdev.stats.lock);</div><div class='add'>+		break;</div><div class='add'>+	case CXGB4_CONTROL_DB_DROP:</div><div class='add'>+		recover_queues(ctx);</div><div class='add'>+		mutex_lock(&amp;ctx-&gt;dev-&gt;rdev.stats.lock);</div><div class='add'>+		ctx-&gt;dev-&gt;rdev.stats.db_drop++;</div><div class='add'>+		mutex_unlock(&amp;ctx-&gt;dev-&gt;rdev.stats.lock);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		printk(KERN_WARNING MOD "%s: unknown control cmd %u\n",</div><div class='add'>+		       pci_name(ctx-&gt;lldi.pdev), control);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct cxgb4_uld_info c4iw_uld_info = {</div><div class='ctx'> 	.name = DRV_NAME,</div><div class='ctx'> 	.add = c4iw_uld_add,</div><div class='ctx'> 	.rx_handler = c4iw_uld_rx_handler,</div><div class='ctx'> 	.state_change = c4iw_uld_state_change,</div><div class='add'>+	.control = c4iw_uld_control,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init c4iw_init_module(void)</div><div class='head'>diff --git a/drivers/infiniband/hw/cxgb4/ev.c b/drivers/infiniband/hw/cxgb4/ev.c<br/>index 397cb36cf103..cf2f6b47617a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/ev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/cxgb4/ev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/ev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/ev.c</a></div><div class='hunk'>@@ -84,7 +84,7 @@ void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe)</div><div class='ctx'> 	struct c4iw_qp *qhp;</div><div class='ctx'> 	u32 cqid;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;dev-&gt;lock);</div><div class='add'>+	spin_lock_irq(&amp;dev-&gt;lock);</div><div class='ctx'> 	qhp = get_qhp(dev, CQE_QPID(err_cqe));</div><div class='ctx'> 	if (!qhp) {</div><div class='ctx'> 		printk(KERN_ERR MOD "BAD AE qpid 0x%x opcode %d "</div><div class='hunk'>@@ -93,7 +93,7 @@ void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe)</div><div class='ctx'> 		       CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),</div><div class='ctx'> 		       CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),</div><div class='ctx'> 		       CQE_WRID_LOW(err_cqe));</div><div class='del'>-		spin_unlock(&amp;dev-&gt;lock);</div><div class='add'>+		spin_unlock_irq(&amp;dev-&gt;lock);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -109,13 +109,13 @@ void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe)</div><div class='ctx'> 		       CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),</div><div class='ctx'> 		       CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),</div><div class='ctx'> 		       CQE_WRID_LOW(err_cqe));</div><div class='del'>-		spin_unlock(&amp;dev-&gt;lock);</div><div class='add'>+		spin_unlock_irq(&amp;dev-&gt;lock);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	c4iw_qp_add_ref(&amp;qhp-&gt;ibqp);</div><div class='ctx'> 	atomic_inc(&amp;chp-&gt;refcnt);</div><div class='del'>-	spin_unlock(&amp;dev-&gt;lock);</div><div class='add'>+	spin_unlock_irq(&amp;dev-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Bad incoming write */</div><div class='ctx'> 	if (RQ_TYPE(err_cqe) &amp;&amp;</div><div class='head'>diff --git a/drivers/infiniband/hw/cxgb4/id_table.c b/drivers/infiniband/hw/cxgb4/id_table.c<br/>new file mode 100644<br/>index 000000000000..f95e5df30db2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/id_table.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/id_table.c</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2011 Chelsio Communications.  All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This software is available to you under a choice of one of two</div><div class='add'>+ * licenses.  You may choose to be licensed under the terms of the GNU</div><div class='add'>+ * General Public License (GPL) Version 2, available from the file</div><div class='add'>+ * COPYING in the main directory of this source tree, or the</div><div class='add'>+ * OpenIB.org BSD license below:</div><div class='add'>+ *</div><div class='add'>+ *     Redistribution and use in source and binary forms, with or</div><div class='add'>+ *     without modification, are permitted provided that the following</div><div class='add'>+ *     conditions are met:</div><div class='add'>+ *</div><div class='add'>+ *      - Redistributions of source code must retain the above</div><div class='add'>+ *        copyright notice, this list of conditions and the following</div><div class='add'>+ *        disclaimer.</div><div class='add'>+ *</div><div class='add'>+ *      - Redistributions in binary form must reproduce the above</div><div class='add'>+ *        copyright notice, this list of conditions and the following</div><div class='add'>+ *        disclaimer in the documentation and/or other materials</div><div class='add'>+ *        provided with the distribution.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS</div><div class='add'>+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN</div><div class='add'>+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE</div><div class='add'>+ * SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/random.h&gt;</div><div class='add'>+#include "iw_cxgb4.h"</div><div class='add'>+</div><div class='add'>+#define RANDOM_SKIP 16</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Trivial bitmap-based allocator. If the random flag is set, the</div><div class='add'>+ * allocator is designed to:</div><div class='add'>+ * - pseudo-randomize the id returned such that it is not trivially predictable.</div><div class='add'>+ * - avoid reuse of recently used id (at the expense of predictability)</div><div class='add'>+ */</div><div class='add'>+u32 c4iw_id_alloc(struct c4iw_id_table *alloc)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 obj;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;alloc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	obj = find_next_zero_bit(alloc-&gt;table, alloc-&gt;max, alloc-&gt;last);</div><div class='add'>+	if (obj &gt;= alloc-&gt;max)</div><div class='add'>+		obj = find_first_zero_bit(alloc-&gt;table, alloc-&gt;max);</div><div class='add'>+</div><div class='add'>+	if (obj &lt; alloc-&gt;max) {</div><div class='add'>+		if (alloc-&gt;flags &amp; C4IW_ID_TABLE_F_RANDOM)</div><div class='add'>+			alloc-&gt;last += random32() % RANDOM_SKIP;</div><div class='add'>+		else</div><div class='add'>+			alloc-&gt;last = obj + 1;</div><div class='add'>+		if (alloc-&gt;last &gt;= alloc-&gt;max)</div><div class='add'>+			alloc-&gt;last = 0;</div><div class='add'>+		set_bit(obj, alloc-&gt;table);</div><div class='add'>+		obj += alloc-&gt;start;</div><div class='add'>+	} else</div><div class='add'>+		obj = -1;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;alloc-&gt;lock, flags);</div><div class='add'>+	return obj;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void c4iw_id_free(struct c4iw_id_table *alloc, u32 obj)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	obj -= alloc-&gt;start;</div><div class='add'>+	BUG_ON((int)obj &lt; 0);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;alloc-&gt;lock, flags);</div><div class='add'>+	clear_bit(obj, alloc-&gt;table);</div><div class='add'>+	spin_unlock_irqrestore(&amp;alloc-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int c4iw_id_table_alloc(struct c4iw_id_table *alloc, u32 start, u32 num,</div><div class='add'>+			u32 reserved, u32 flags)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	alloc-&gt;start = start;</div><div class='add'>+	alloc-&gt;flags = flags;</div><div class='add'>+	if (flags &amp; C4IW_ID_TABLE_F_RANDOM)</div><div class='add'>+		alloc-&gt;last = random32() % RANDOM_SKIP;</div><div class='add'>+	else</div><div class='add'>+		alloc-&gt;last = 0;</div><div class='add'>+	alloc-&gt;max  = num;</div><div class='add'>+	spin_lock_init(&amp;alloc-&gt;lock);</div><div class='add'>+	alloc-&gt;table = kmalloc(BITS_TO_LONGS(num) * sizeof(long),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!alloc-&gt;table)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bitmap_zero(alloc-&gt;table, num);</div><div class='add'>+	if (!(alloc-&gt;flags &amp; C4IW_ID_TABLE_F_EMPTY))</div><div class='add'>+		for (i = 0; i &lt; reserved; ++i)</div><div class='add'>+			set_bit(i, alloc-&gt;table);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void c4iw_id_table_free(struct c4iw_id_table *alloc)</div><div class='add'>+{</div><div class='add'>+	kfree(alloc-&gt;table);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h<br/>index 1357c5bf209b..9beb3a9f0336 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/iw_cxgb4.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/cxgb4/iw_cxgb4.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/iw_cxgb4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/iw_cxgb4.h</a></div><div class='hunk'>@@ -45,7 +45,6 @@</div><div class='ctx'> #include &lt;linux/kref.h&gt;</div><div class='ctx'> #include &lt;linux/timer.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/kfifo.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -79,13 +78,22 @@ static inline void *cplhdr(struct sk_buff *skb)</div><div class='ctx'> 	return skb-&gt;data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define C4IW_ID_TABLE_F_RANDOM 1       /* Pseudo-randomize the id's returned */</div><div class='add'>+#define C4IW_ID_TABLE_F_EMPTY  2       /* Table is initially empty */</div><div class='add'>+</div><div class='add'>+struct c4iw_id_table {</div><div class='add'>+	u32 flags;</div><div class='add'>+	u32 start;              /* logical minimal id */</div><div class='add'>+	u32 last;               /* hint for find */</div><div class='add'>+	u32 max;</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	unsigned long *table;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct c4iw_resource {</div><div class='del'>-	struct kfifo tpt_fifo;</div><div class='del'>-	spinlock_t tpt_fifo_lock;</div><div class='del'>-	struct kfifo qid_fifo;</div><div class='del'>-	spinlock_t qid_fifo_lock;</div><div class='del'>-	struct kfifo pdid_fifo;</div><div class='del'>-	spinlock_t pdid_fifo_lock;</div><div class='add'>+	struct c4iw_id_table tpt_table;</div><div class='add'>+	struct c4iw_id_table qid_table;</div><div class='add'>+	struct c4iw_id_table pdid_table;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct c4iw_qid_list {</div><div class='hunk'>@@ -103,6 +111,27 @@ enum c4iw_rdev_flags {</div><div class='ctx'> 	T4_FATAL_ERROR = (1&lt;&lt;0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct c4iw_stat {</div><div class='add'>+	u64 total;</div><div class='add'>+	u64 cur;</div><div class='add'>+	u64 max;</div><div class='add'>+	u64 fail;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct c4iw_stats {</div><div class='add'>+	struct mutex lock;</div><div class='add'>+	struct c4iw_stat qid;</div><div class='add'>+	struct c4iw_stat pd;</div><div class='add'>+	struct c4iw_stat stag;</div><div class='add'>+	struct c4iw_stat pbl;</div><div class='add'>+	struct c4iw_stat rqt;</div><div class='add'>+	struct c4iw_stat ocqp;</div><div class='add'>+	u64  db_full;</div><div class='add'>+	u64  db_empty;</div><div class='add'>+	u64  db_drop;</div><div class='add'>+	u64  db_state_transitions;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct c4iw_rdev {</div><div class='ctx'> 	struct c4iw_resource resource;</div><div class='ctx'> 	unsigned long qpshift;</div><div class='hunk'>@@ -117,6 +146,7 @@ struct c4iw_rdev {</div><div class='ctx'> 	struct cxgb4_lld_info lldi;</div><div class='ctx'> 	unsigned long oc_mw_pa;</div><div class='ctx'> 	void __iomem *oc_mw_kva;</div><div class='add'>+	struct c4iw_stats stats;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline int c4iw_fatal_error(struct c4iw_rdev *rdev)</div><div class='hunk'>@@ -175,6 +205,12 @@ static inline int c4iw_wait_for_reply(struct c4iw_rdev *rdev,</div><div class='ctx'> 	return wr_waitp-&gt;ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+enum db_state {</div><div class='add'>+	NORMAL = 0,</div><div class='add'>+	FLOW_CONTROL = 1,</div><div class='add'>+	RECOVERY = 2</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct c4iw_dev {</div><div class='ctx'> 	struct ib_device ibdev;</div><div class='ctx'> 	struct c4iw_rdev rdev;</div><div class='hunk'>@@ -183,7 +219,10 @@ struct c4iw_dev {</div><div class='ctx'> 	struct idr qpidr;</div><div class='ctx'> 	struct idr mmidr;</div><div class='ctx'> 	spinlock_t lock;</div><div class='add'>+	struct mutex db_mutex;</div><div class='ctx'> 	struct dentry *debugfs_root;</div><div class='add'>+	enum db_state db_state;</div><div class='add'>+	int qpcnt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline struct c4iw_dev *to_c4iw_dev(struct ib_device *ibdev)</div><div class='hunk'>@@ -211,29 +250,57 @@ static inline struct c4iw_mr *get_mhp(struct c4iw_dev *rhp, u32 mmid)</div><div class='ctx'> 	return idr_find(&amp;rhp-&gt;mmidr, mmid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int insert_handle(struct c4iw_dev *rhp, struct idr *idr,</div><div class='del'>-				void *handle, u32 id)</div><div class='add'>+static inline int _insert_handle(struct c4iw_dev *rhp, struct idr *idr,</div><div class='add'>+				 void *handle, u32 id, int lock)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int newid;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		if (!idr_pre_get(idr, GFP_KERNEL))</div><div class='add'>+		if (!idr_pre_get(idr, lock ? GFP_KERNEL : GFP_ATOMIC))</div><div class='ctx'> 			return -ENOMEM;</div><div class='del'>-		spin_lock_irq(&amp;rhp-&gt;lock);</div><div class='add'>+		if (lock)</div><div class='add'>+			spin_lock_irq(&amp;rhp-&gt;lock);</div><div class='ctx'> 		ret = idr_get_new_above(idr, handle, id, &amp;newid);</div><div class='del'>-		BUG_ON(newid != id);</div><div class='del'>-		spin_unlock_irq(&amp;rhp-&gt;lock);</div><div class='add'>+		BUG_ON(!ret &amp;&amp; newid != id);</div><div class='add'>+		if (lock)</div><div class='add'>+			spin_unlock_irq(&amp;rhp-&gt;lock);</div><div class='ctx'> 	} while (ret == -EAGAIN);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void remove_handle(struct c4iw_dev *rhp, struct idr *idr, u32 id)</div><div class='add'>+static inline int insert_handle(struct c4iw_dev *rhp, struct idr *idr,</div><div class='add'>+				void *handle, u32 id)</div><div class='add'>+{</div><div class='add'>+	return _insert_handle(rhp, idr, handle, id, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int insert_handle_nolock(struct c4iw_dev *rhp, struct idr *idr,</div><div class='add'>+				       void *handle, u32 id)</div><div class='add'>+{</div><div class='add'>+	return _insert_handle(rhp, idr, handle, id, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void _remove_handle(struct c4iw_dev *rhp, struct idr *idr,</div><div class='add'>+				   u32 id, int lock)</div><div class='ctx'> {</div><div class='del'>-	spin_lock_irq(&amp;rhp-&gt;lock);</div><div class='add'>+	if (lock)</div><div class='add'>+		spin_lock_irq(&amp;rhp-&gt;lock);</div><div class='ctx'> 	idr_remove(idr, id);</div><div class='del'>-	spin_unlock_irq(&amp;rhp-&gt;lock);</div><div class='add'>+	if (lock)</div><div class='add'>+		spin_unlock_irq(&amp;rhp-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void remove_handle(struct c4iw_dev *rhp, struct idr *idr, u32 id)</div><div class='add'>+{</div><div class='add'>+	_remove_handle(rhp, idr, id, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void remove_handle_nolock(struct c4iw_dev *rhp,</div><div class='add'>+					 struct idr *idr, u32 id)</div><div class='add'>+{</div><div class='add'>+	_remove_handle(rhp, idr, id, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct c4iw_pd {</div><div class='hunk'>@@ -353,6 +420,8 @@ struct c4iw_qp_attributes {</div><div class='ctx'> 	struct c4iw_ep *llp_stream_handle;</div><div class='ctx'> 	u8 layer_etype;</div><div class='ctx'> 	u8 ecode;</div><div class='add'>+	u16 sq_db_inc;</div><div class='add'>+	u16 rq_db_inc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct c4iw_qp {</div><div class='hunk'>@@ -427,6 +496,8 @@ static inline void insert_mmap(struct c4iw_ucontext *ucontext,</div><div class='ctx'> </div><div class='ctx'> enum c4iw_qp_attr_mask {</div><div class='ctx'> 	C4IW_QP_ATTR_NEXT_STATE = 1 &lt;&lt; 0,</div><div class='add'>+	C4IW_QP_ATTR_SQ_DB = 1&lt;&lt;1,</div><div class='add'>+	C4IW_QP_ATTR_RQ_DB = 1&lt;&lt;2,</div><div class='ctx'> 	C4IW_QP_ATTR_ENABLE_RDMA_READ = 1 &lt;&lt; 7,</div><div class='ctx'> 	C4IW_QP_ATTR_ENABLE_RDMA_WRITE = 1 &lt;&lt; 8,</div><div class='ctx'> 	C4IW_QP_ATTR_ENABLE_RDMA_BIND = 1 &lt;&lt; 9,</div><div class='hunk'>@@ -480,6 +551,23 @@ static inline int c4iw_convert_state(enum ib_qp_state ib_state)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int to_ib_qp_state(int c4iw_qp_state)</div><div class='add'>+{</div><div class='add'>+	switch (c4iw_qp_state) {</div><div class='add'>+	case C4IW_QP_STATE_IDLE:</div><div class='add'>+		return IB_QPS_INIT;</div><div class='add'>+	case C4IW_QP_STATE_RTS:</div><div class='add'>+		return IB_QPS_RTS;</div><div class='add'>+	case C4IW_QP_STATE_CLOSING:</div><div class='add'>+		return IB_QPS_SQD;</div><div class='add'>+	case C4IW_QP_STATE_TERMINATE:</div><div class='add'>+		return IB_QPS_SQE;</div><div class='add'>+	case C4IW_QP_STATE_ERROR:</div><div class='add'>+		return IB_QPS_ERR;</div><div class='add'>+	}</div><div class='add'>+	return IB_QPS_ERR;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u32 c4iw_ib_to_tpt_access(int a)</div><div class='ctx'> {</div><div class='ctx'> 	return (a &amp; IB_ACCESS_REMOTE_WRITE ? FW_RI_MEM_ACCESS_REM_WRITE : 0) |</div><div class='hunk'>@@ -693,14 +781,20 @@ static inline int compute_wscale(int win)</div><div class='ctx'> 	return wscale;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+u32 c4iw_id_alloc(struct c4iw_id_table *alloc);</div><div class='add'>+void c4iw_id_free(struct c4iw_id_table *alloc, u32 obj);</div><div class='add'>+int c4iw_id_table_alloc(struct c4iw_id_table *alloc, u32 start, u32 num,</div><div class='add'>+			u32 reserved, u32 flags);</div><div class='add'>+void c4iw_id_table_free(struct c4iw_id_table *alloc);</div><div class='add'>+</div><div class='ctx'> typedef int (*c4iw_handler_func)(struct c4iw_dev *dev, struct sk_buff *skb);</div><div class='ctx'> </div><div class='ctx'> int c4iw_ep_redirect(void *ctx, struct dst_entry *old, struct dst_entry *new,</div><div class='ctx'> 		     struct l2t_entry *l2t);</div><div class='ctx'> void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qpid,</div><div class='ctx'> 		   struct c4iw_dev_ucontext *uctx);</div><div class='del'>-u32 c4iw_get_resource(struct kfifo *fifo, spinlock_t *lock);</div><div class='del'>-void c4iw_put_resource(struct kfifo *fifo, u32 entry, spinlock_t *lock);</div><div class='add'>+u32 c4iw_get_resource(struct c4iw_id_table *id_table);</div><div class='add'>+void c4iw_put_resource(struct c4iw_id_table *id_table, u32 entry);</div><div class='ctx'> int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_tpt, u32 nr_pdid);</div><div class='ctx'> int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev);</div><div class='ctx'> int c4iw_pblpool_create(struct c4iw_rdev *rdev);</div><div class='hunk'>@@ -769,6 +863,8 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd,</div><div class='ctx'> 			     struct ib_udata *udata);</div><div class='ctx'> int c4iw_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,</div><div class='ctx'> 				 int attr_mask, struct ib_udata *udata);</div><div class='add'>+int c4iw_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,</div><div class='add'>+		     int attr_mask, struct ib_qp_init_attr *init_attr);</div><div class='ctx'> struct ib_qp *c4iw_get_qp(struct ib_device *dev, int qpn);</div><div class='ctx'> u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size);</div><div class='ctx'> void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size);</div><div class='hunk'>@@ -797,5 +893,7 @@ void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe);</div><div class='ctx'> extern struct cxgb4_client t4c_client;</div><div class='ctx'> extern c4iw_handler_func c4iw_handlers[NUM_CPL_CMDS];</div><div class='ctx'> extern int c4iw_max_read_depth;</div><div class='add'>+extern int db_fc_threshold;</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c<br/>index 40c835309e49..57e07c61ace2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/mem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/cxgb4/mem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/mem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/mem.c</a></div><div class='hunk'>@@ -131,10 +131,14 @@ static int write_tpt_entry(struct c4iw_rdev *rdev, u32 reset_tpt_entry,</div><div class='ctx'> 	stag_idx = (*stag) &gt;&gt; 8;</div><div class='ctx'> </div><div class='ctx'> 	if ((!reset_tpt_entry) &amp;&amp; (*stag == T4_STAG_UNSET)) {</div><div class='del'>-		stag_idx = c4iw_get_resource(&amp;rdev-&gt;resource.tpt_fifo,</div><div class='del'>-					     &amp;rdev-&gt;resource.tpt_fifo_lock);</div><div class='add'>+		stag_idx = c4iw_get_resource(&amp;rdev-&gt;resource.tpt_table);</div><div class='ctx'> 		if (!stag_idx)</div><div class='ctx'> 			return -ENOMEM;</div><div class='add'>+		mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+		rdev-&gt;stats.stag.cur += 32;</div><div class='add'>+		if (rdev-&gt;stats.stag.cur &gt; rdev-&gt;stats.stag.max)</div><div class='add'>+			rdev-&gt;stats.stag.max = rdev-&gt;stats.stag.cur;</div><div class='add'>+		mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='ctx'> 		*stag = (stag_idx &lt;&lt; 8) | (atomic_inc_return(&amp;key) &amp; 0xff);</div><div class='ctx'> 	}</div><div class='ctx'> 	PDBG("%s stag_state 0x%0x type 0x%0x pdid 0x%0x, stag_idx 0x%x\n",</div><div class='hunk'>@@ -165,9 +169,12 @@ static int write_tpt_entry(struct c4iw_rdev *rdev, u32 reset_tpt_entry,</div><div class='ctx'> 				(rdev-&gt;lldi.vr-&gt;stag.start &gt;&gt; 5),</div><div class='ctx'> 				sizeof(tpt), &amp;tpt);</div><div class='ctx'> </div><div class='del'>-	if (reset_tpt_entry)</div><div class='del'>-		c4iw_put_resource(&amp;rdev-&gt;resource.tpt_fifo, stag_idx,</div><div class='del'>-				  &amp;rdev-&gt;resource.tpt_fifo_lock);</div><div class='add'>+	if (reset_tpt_entry) {</div><div class='add'>+		c4iw_put_resource(&amp;rdev-&gt;resource.tpt_table, stag_idx);</div><div class='add'>+		mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+		rdev-&gt;stats.stag.cur -= 32;</div><div class='add'>+		mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+	}</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -686,8 +693,8 @@ int c4iw_dealloc_mw(struct ib_mw *mw)</div><div class='ctx'> 	mhp = to_c4iw_mw(mw);</div><div class='ctx'> 	rhp = mhp-&gt;rhp;</div><div class='ctx'> 	mmid = (mw-&gt;rkey) &gt;&gt; 8;</div><div class='del'>-	deallocate_window(&amp;rhp-&gt;rdev, mhp-&gt;attr.stag);</div><div class='ctx'> 	remove_handle(rhp, &amp;rhp-&gt;mmidr, mmid);</div><div class='add'>+	deallocate_window(&amp;rhp-&gt;rdev, mhp-&gt;attr.stag);</div><div class='ctx'> 	kfree(mhp);</div><div class='ctx'> 	PDBG("%s ib_mw %p mmid 0x%x ptr %p\n", __func__, mw, mmid, mhp);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -789,12 +796,12 @@ int c4iw_dereg_mr(struct ib_mr *ib_mr)</div><div class='ctx'> 	mhp = to_c4iw_mr(ib_mr);</div><div class='ctx'> 	rhp = mhp-&gt;rhp;</div><div class='ctx'> 	mmid = mhp-&gt;attr.stag &gt;&gt; 8;</div><div class='add'>+	remove_handle(rhp, &amp;rhp-&gt;mmidr, mmid);</div><div class='ctx'> 	dereg_mem(&amp;rhp-&gt;rdev, mhp-&gt;attr.stag, mhp-&gt;attr.pbl_size,</div><div class='ctx'> 		       mhp-&gt;attr.pbl_addr);</div><div class='ctx'> 	if (mhp-&gt;attr.pbl_size)</div><div class='ctx'> 		c4iw_pblpool_free(&amp;mhp-&gt;rhp-&gt;rdev, mhp-&gt;attr.pbl_addr,</div><div class='ctx'> 				  mhp-&gt;attr.pbl_size &lt;&lt; 3);</div><div class='del'>-	remove_handle(rhp, &amp;rhp-&gt;mmidr, mmid);</div><div class='ctx'> 	if (mhp-&gt;kva)</div><div class='ctx'> 		kfree((void *) (unsigned long) mhp-&gt;kva);</div><div class='ctx'> 	if (mhp-&gt;umem)</div><div class='head'>diff --git a/drivers/infiniband/hw/cxgb4/provider.c b/drivers/infiniband/hw/cxgb4/provider.c<br/>index be1c18f44400..e084fdc6da7f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/provider.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/cxgb4/provider.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/provider.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/provider.c</a></div><div class='hunk'>@@ -188,8 +188,10 @@ static int c4iw_deallocate_pd(struct ib_pd *pd)</div><div class='ctx'> 	php = to_c4iw_pd(pd);</div><div class='ctx'> 	rhp = php-&gt;rhp;</div><div class='ctx'> 	PDBG("%s ibpd %p pdid 0x%x\n", __func__, pd, php-&gt;pdid);</div><div class='del'>-	c4iw_put_resource(&amp;rhp-&gt;rdev.resource.pdid_fifo, php-&gt;pdid,</div><div class='del'>-			  &amp;rhp-&gt;rdev.resource.pdid_fifo_lock);</div><div class='add'>+	c4iw_put_resource(&amp;rhp-&gt;rdev.resource.pdid_table, php-&gt;pdid);</div><div class='add'>+	mutex_lock(&amp;rhp-&gt;rdev.stats.lock);</div><div class='add'>+	rhp-&gt;rdev.stats.pd.cur--;</div><div class='add'>+	mutex_unlock(&amp;rhp-&gt;rdev.stats.lock);</div><div class='ctx'> 	kfree(php);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -204,14 +206,12 @@ static struct ib_pd *c4iw_allocate_pd(struct ib_device *ibdev,</div><div class='ctx'> </div><div class='ctx'> 	PDBG("%s ibdev %p\n", __func__, ibdev);</div><div class='ctx'> 	rhp = (struct c4iw_dev *) ibdev;</div><div class='del'>-	pdid =  c4iw_get_resource(&amp;rhp-&gt;rdev.resource.pdid_fifo,</div><div class='del'>-				  &amp;rhp-&gt;rdev.resource.pdid_fifo_lock);</div><div class='add'>+	pdid =  c4iw_get_resource(&amp;rhp-&gt;rdev.resource.pdid_table);</div><div class='ctx'> 	if (!pdid)</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> 	php = kzalloc(sizeof(*php), GFP_KERNEL);</div><div class='ctx'> 	if (!php) {</div><div class='del'>-		c4iw_put_resource(&amp;rhp-&gt;rdev.resource.pdid_fifo, pdid,</div><div class='del'>-				  &amp;rhp-&gt;rdev.resource.pdid_fifo_lock);</div><div class='add'>+		c4iw_put_resource(&amp;rhp-&gt;rdev.resource.pdid_table, pdid);</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	}</div><div class='ctx'> 	php-&gt;pdid = pdid;</div><div class='hunk'>@@ -222,6 +222,11 @@ static struct ib_pd *c4iw_allocate_pd(struct ib_device *ibdev,</div><div class='ctx'> 			return ERR_PTR(-EFAULT);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	mutex_lock(&amp;rhp-&gt;rdev.stats.lock);</div><div class='add'>+	rhp-&gt;rdev.stats.pd.cur++;</div><div class='add'>+	if (rhp-&gt;rdev.stats.pd.cur &gt; rhp-&gt;rdev.stats.pd.max)</div><div class='add'>+		rhp-&gt;rdev.stats.pd.max = rhp-&gt;rdev.stats.pd.cur;</div><div class='add'>+	mutex_unlock(&amp;rhp-&gt;rdev.stats.lock);</div><div class='ctx'> 	PDBG("%s pdid 0x%0x ptr 0x%p\n", __func__, pdid, php);</div><div class='ctx'> 	return &amp;php-&gt;ibpd;</div><div class='ctx'> }</div><div class='hunk'>@@ -438,6 +443,7 @@ int c4iw_register_device(struct c4iw_dev *dev)</div><div class='ctx'> 	    (1ull &lt;&lt; IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |</div><div class='ctx'> 	    (1ull &lt;&lt; IB_USER_VERBS_CMD_CREATE_QP) |</div><div class='ctx'> 	    (1ull &lt;&lt; IB_USER_VERBS_CMD_MODIFY_QP) |</div><div class='add'>+	    (1ull &lt;&lt; IB_USER_VERBS_CMD_QUERY_QP) |</div><div class='ctx'> 	    (1ull &lt;&lt; IB_USER_VERBS_CMD_POLL_CQ) |</div><div class='ctx'> 	    (1ull &lt;&lt; IB_USER_VERBS_CMD_DESTROY_QP) |</div><div class='ctx'> 	    (1ull &lt;&lt; IB_USER_VERBS_CMD_POST_SEND) |</div><div class='hunk'>@@ -460,6 +466,7 @@ int c4iw_register_device(struct c4iw_dev *dev)</div><div class='ctx'> 	dev-&gt;ibdev.destroy_ah = c4iw_ah_destroy;</div><div class='ctx'> 	dev-&gt;ibdev.create_qp = c4iw_create_qp;</div><div class='ctx'> 	dev-&gt;ibdev.modify_qp = c4iw_ib_modify_qp;</div><div class='add'>+	dev-&gt;ibdev.query_qp = c4iw_ib_query_qp;</div><div class='ctx'> 	dev-&gt;ibdev.destroy_qp = c4iw_destroy_qp;</div><div class='ctx'> 	dev-&gt;ibdev.create_cq = c4iw_create_cq;</div><div class='ctx'> 	dev-&gt;ibdev.destroy_cq = c4iw_destroy_cq;</div><div class='head'>diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c<br/>index 5f940aeaab1e..45aedf1d9338 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/qp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/cxgb4/qp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/qp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/qp.c</a></div><div class='hunk'>@@ -34,10 +34,19 @@</div><div class='ctx'> </div><div class='ctx'> #include "iw_cxgb4.h"</div><div class='ctx'> </div><div class='add'>+static int db_delay_usecs = 1;</div><div class='add'>+module_param(db_delay_usecs, int, 0644);</div><div class='add'>+MODULE_PARM_DESC(db_delay_usecs, "Usecs to delay awaiting db fifo to drain");</div><div class='add'>+</div><div class='ctx'> static int ocqp_support = 1;</div><div class='ctx'> module_param(ocqp_support, int, 0644);</div><div class='ctx'> MODULE_PARM_DESC(ocqp_support, "Support on-chip SQs (default=1)");</div><div class='ctx'> </div><div class='add'>+int db_fc_threshold = 2000;</div><div class='add'>+module_param(db_fc_threshold, int, 0644);</div><div class='add'>+MODULE_PARM_DESC(db_fc_threshold, "QP count/threshold that triggers automatic "</div><div class='add'>+		 "db flow control mode (default = 2000)");</div><div class='add'>+</div><div class='ctx'> static void set_state(struct c4iw_qp *qhp, enum c4iw_qp_state state)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flag;</div><div class='hunk'>@@ -1128,6 +1137,35 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Called by the library when the qp has user dbs disabled due to</div><div class='add'>+ * a DB_FULL condition.  This function will single-thread all user</div><div class='add'>+ * DB rings to avoid overflowing the hw db-fifo.</div><div class='add'>+ */</div><div class='add'>+static int ring_kernel_db(struct c4iw_qp *qhp, u32 qid, u16 inc)</div><div class='add'>+{</div><div class='add'>+	int delay = db_delay_usecs;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;qhp-&gt;rhp-&gt;db_mutex);</div><div class='add'>+	do {</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The interrupt threshold is dbfifo_int_thresh &lt;&lt; 6. So</div><div class='add'>+		 * make sure we don't cross that and generate an interrupt.</div><div class='add'>+		 */</div><div class='add'>+		if (cxgb4_dbfifo_count(qhp-&gt;rhp-&gt;rdev.lldi.ports[0], 1) &lt;</div><div class='add'>+		    (qhp-&gt;rhp-&gt;rdev.lldi.dbfifo_int_thresh &lt;&lt; 5)) {</div><div class='add'>+			writel(V_QID(qid) | V_PIDX(inc), qhp-&gt;wq.db);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		set_current_state(TASK_UNINTERRUPTIBLE);</div><div class='add'>+		schedule_timeout(usecs_to_jiffies(delay));</div><div class='add'>+		delay = min(delay &lt;&lt; 1, 2000);</div><div class='add'>+	} while (1);</div><div class='add'>+	mutex_unlock(&amp;qhp-&gt;rhp-&gt;db_mutex);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp,</div><div class='ctx'> 		   enum c4iw_qp_attr_mask mask,</div><div class='ctx'> 		   struct c4iw_qp_attributes *attrs,</div><div class='hunk'>@@ -1176,6 +1214,15 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp,</div><div class='ctx'> 		qhp-&gt;attr = newattr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (mask &amp; C4IW_QP_ATTR_SQ_DB) {</div><div class='add'>+		ret = ring_kernel_db(qhp, qhp-&gt;wq.sq.qid, attrs-&gt;sq_db_inc);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	if (mask &amp; C4IW_QP_ATTR_RQ_DB) {</div><div class='add'>+		ret = ring_kernel_db(qhp, qhp-&gt;wq.rq.qid, attrs-&gt;rq_db_inc);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!(mask &amp; C4IW_QP_ATTR_NEXT_STATE))</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	if (qhp-&gt;attr.state == attrs-&gt;next_state)</div><div class='hunk'>@@ -1352,6 +1399,14 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int enable_qp_db(int id, void *p, void *data)</div><div class='add'>+{</div><div class='add'>+	struct c4iw_qp *qp = p;</div><div class='add'>+</div><div class='add'>+	t4_enable_wq_db(&amp;qp-&gt;wq);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int c4iw_destroy_qp(struct ib_qp *ib_qp)</div><div class='ctx'> {</div><div class='ctx'> 	struct c4iw_dev *rhp;</div><div class='hunk'>@@ -1369,7 +1424,16 @@ int c4iw_destroy_qp(struct ib_qp *ib_qp)</div><div class='ctx'> 		c4iw_modify_qp(rhp, qhp, C4IW_QP_ATTR_NEXT_STATE, &amp;attrs, 0);</div><div class='ctx'> 	wait_event(qhp-&gt;wait, !qhp-&gt;ep);</div><div class='ctx'> </div><div class='del'>-	remove_handle(rhp, &amp;rhp-&gt;qpidr, qhp-&gt;wq.sq.qid);</div><div class='add'>+	spin_lock_irq(&amp;rhp-&gt;lock);</div><div class='add'>+	remove_handle_nolock(rhp, &amp;rhp-&gt;qpidr, qhp-&gt;wq.sq.qid);</div><div class='add'>+	rhp-&gt;qpcnt--;</div><div class='add'>+	BUG_ON(rhp-&gt;qpcnt &lt; 0);</div><div class='add'>+	if (rhp-&gt;qpcnt &lt;= db_fc_threshold &amp;&amp; rhp-&gt;db_state == FLOW_CONTROL) {</div><div class='add'>+		rhp-&gt;rdev.stats.db_state_transitions++;</div><div class='add'>+		rhp-&gt;db_state = NORMAL;</div><div class='add'>+		idr_for_each(&amp;rhp-&gt;qpidr, enable_qp_db, NULL);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(&amp;rhp-&gt;lock);</div><div class='ctx'> 	atomic_dec(&amp;qhp-&gt;refcnt);</div><div class='ctx'> 	wait_event(qhp-&gt;wait, !atomic_read(&amp;qhp-&gt;refcnt));</div><div class='ctx'> </div><div class='hunk'>@@ -1383,6 +1447,14 @@ int c4iw_destroy_qp(struct ib_qp *ib_qp)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int disable_qp_db(int id, void *p, void *data)</div><div class='add'>+{</div><div class='add'>+	struct c4iw_qp *qp = p;</div><div class='add'>+</div><div class='add'>+	t4_disable_wq_db(&amp;qp-&gt;wq);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs,</div><div class='ctx'> 			     struct ib_udata *udata)</div><div class='ctx'> {</div><div class='hunk'>@@ -1469,7 +1541,16 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs,</div><div class='ctx'> 	init_waitqueue_head(&amp;qhp-&gt;wait);</div><div class='ctx'> 	atomic_set(&amp;qhp-&gt;refcnt, 1);</div><div class='ctx'> </div><div class='del'>-	ret = insert_handle(rhp, &amp;rhp-&gt;qpidr, qhp, qhp-&gt;wq.sq.qid);</div><div class='add'>+	spin_lock_irq(&amp;rhp-&gt;lock);</div><div class='add'>+	if (rhp-&gt;db_state != NORMAL)</div><div class='add'>+		t4_disable_wq_db(&amp;qhp-&gt;wq);</div><div class='add'>+	if (++rhp-&gt;qpcnt &gt; db_fc_threshold &amp;&amp; rhp-&gt;db_state == NORMAL) {</div><div class='add'>+		rhp-&gt;rdev.stats.db_state_transitions++;</div><div class='add'>+		rhp-&gt;db_state = FLOW_CONTROL;</div><div class='add'>+		idr_for_each(&amp;rhp-&gt;qpidr, disable_qp_db, NULL);</div><div class='add'>+	}</div><div class='add'>+	ret = insert_handle_nolock(rhp, &amp;rhp-&gt;qpidr, qhp, qhp-&gt;wq.sq.qid);</div><div class='add'>+	spin_unlock_irq(&amp;rhp-&gt;lock);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err2;</div><div class='ctx'> </div><div class='hunk'>@@ -1613,6 +1694,15 @@ int c4iw_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,</div><div class='ctx'> 			 C4IW_QP_ATTR_ENABLE_RDMA_WRITE |</div><div class='ctx'> 			 C4IW_QP_ATTR_ENABLE_RDMA_BIND) : 0;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Use SQ_PSN and RQ_PSN to pass in IDX_INC values for</div><div class='add'>+	 * ringing the queue db when we're in DB_FULL mode.</div><div class='add'>+	 */</div><div class='add'>+	attrs.sq_db_inc = attr-&gt;sq_psn;</div><div class='add'>+	attrs.rq_db_inc = attr-&gt;rq_psn;</div><div class='add'>+	mask |= (attr_mask &amp; IB_QP_SQ_PSN) ? C4IW_QP_ATTR_SQ_DB : 0;</div><div class='add'>+	mask |= (attr_mask &amp; IB_QP_RQ_PSN) ? C4IW_QP_ATTR_RQ_DB : 0;</div><div class='add'>+</div><div class='ctx'> 	return c4iw_modify_qp(rhp, qhp, mask, &amp;attrs, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1621,3 +1711,14 @@ struct ib_qp *c4iw_get_qp(struct ib_device *dev, int qpn)</div><div class='ctx'> 	PDBG("%s ib_dev %p qpn 0x%x\n", __func__, dev, qpn);</div><div class='ctx'> 	return (struct ib_qp *)get_qhp(to_c4iw_dev(dev), qpn);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int c4iw_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,</div><div class='add'>+		     int attr_mask, struct ib_qp_init_attr *init_attr)</div><div class='add'>+{</div><div class='add'>+	struct c4iw_qp *qhp = to_c4iw_qp(ibqp);</div><div class='add'>+</div><div class='add'>+	memset(attr, 0, sizeof *attr);</div><div class='add'>+	memset(init_attr, 0, sizeof *init_attr);</div><div class='add'>+	attr-&gt;qp_state = to_ib_qp_state(qhp-&gt;attr.state);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/infiniband/hw/cxgb4/resource.c b/drivers/infiniband/hw/cxgb4/resource.c<br/>index 407ff3924150..cdef4d7fb6d8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/resource.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/cxgb4/resource.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/resource.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/resource.c</a></div><div class='hunk'>@@ -30,96 +30,25 @@</div><div class='ctx'>  * SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> /* Crude resource management */</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/random.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/kfifo.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/genalloc.h&gt;</div><div class='ctx'> #include &lt;linux/ratelimit.h&gt;</div><div class='ctx'> #include "iw_cxgb4.h"</div><div class='ctx'> </div><div class='del'>-#define RANDOM_SIZE 16</div><div class='del'>-</div><div class='del'>-static int __c4iw_init_resource_fifo(struct kfifo *fifo,</div><div class='del'>-				   spinlock_t *fifo_lock,</div><div class='del'>-				   u32 nr, u32 skip_low,</div><div class='del'>-				   u32 skip_high,</div><div class='del'>-				   int random)</div><div class='del'>-{</div><div class='del'>-	u32 i, j, entry = 0, idx;</div><div class='del'>-	u32 random_bytes;</div><div class='del'>-	u32 rarray[16];</div><div class='del'>-	spin_lock_init(fifo_lock);</div><div class='del'>-</div><div class='del'>-	if (kfifo_alloc(fifo, nr * sizeof(u32), GFP_KERNEL))</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; skip_low + skip_high; i++)</div><div class='del'>-		kfifo_in(fifo, (unsigned char *) &amp;entry, sizeof(u32));</div><div class='del'>-	if (random) {</div><div class='del'>-		j = 0;</div><div class='del'>-		random_bytes = random32();</div><div class='del'>-		for (i = 0; i &lt; RANDOM_SIZE; i++)</div><div class='del'>-			rarray[i] = i + skip_low;</div><div class='del'>-		for (i = skip_low + RANDOM_SIZE; i &lt; nr - skip_high; i++) {</div><div class='del'>-			if (j &gt;= RANDOM_SIZE) {</div><div class='del'>-				j = 0;</div><div class='del'>-				random_bytes = random32();</div><div class='del'>-			}</div><div class='del'>-			idx = (random_bytes &gt;&gt; (j * 2)) &amp; 0xF;</div><div class='del'>-			kfifo_in(fifo,</div><div class='del'>-				(unsigned char *) &amp;rarray[idx],</div><div class='del'>-				sizeof(u32));</div><div class='del'>-			rarray[idx] = i;</div><div class='del'>-			j++;</div><div class='del'>-		}</div><div class='del'>-		for (i = 0; i &lt; RANDOM_SIZE; i++)</div><div class='del'>-			kfifo_in(fifo,</div><div class='del'>-				(unsigned char *) &amp;rarray[i],</div><div class='del'>-				sizeof(u32));</div><div class='del'>-	} else</div><div class='del'>-		for (i = skip_low; i &lt; nr - skip_high; i++)</div><div class='del'>-			kfifo_in(fifo, (unsigned char *) &amp;i, sizeof(u32));</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; skip_low + skip_high; i++)</div><div class='del'>-		if (kfifo_out_locked(fifo, (unsigned char *) &amp;entry,</div><div class='del'>-				     sizeof(u32), fifo_lock))</div><div class='del'>-			break;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c4iw_init_resource_fifo(struct kfifo *fifo, spinlock_t * fifo_lock,</div><div class='del'>-				   u32 nr, u32 skip_low, u32 skip_high)</div><div class='del'>-{</div><div class='del'>-	return __c4iw_init_resource_fifo(fifo, fifo_lock, nr, skip_low,</div><div class='del'>-					  skip_high, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c4iw_init_resource_fifo_random(struct kfifo *fifo,</div><div class='del'>-				   spinlock_t *fifo_lock,</div><div class='del'>-				   u32 nr, u32 skip_low, u32 skip_high)</div><div class='del'>-{</div><div class='del'>-	return __c4iw_init_resource_fifo(fifo, fifo_lock, nr, skip_low,</div><div class='del'>-					  skip_high, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c4iw_init_qid_fifo(struct c4iw_rdev *rdev)</div><div class='add'>+static int c4iw_init_qid_table(struct c4iw_rdev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;rdev-&gt;resource.qid_fifo_lock);</div><div class='del'>-</div><div class='del'>-	if (kfifo_alloc(&amp;rdev-&gt;resource.qid_fifo, rdev-&gt;lldi.vr-&gt;qp.size *</div><div class='del'>-			sizeof(u32), GFP_KERNEL))</div><div class='add'>+	if (c4iw_id_table_alloc(&amp;rdev-&gt;resource.qid_table,</div><div class='add'>+				rdev-&gt;lldi.vr-&gt;qp.start,</div><div class='add'>+				rdev-&gt;lldi.vr-&gt;qp.size,</div><div class='add'>+				rdev-&gt;lldi.vr-&gt;qp.size, 0))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	for (i = rdev-&gt;lldi.vr-&gt;qp.start;</div><div class='del'>-	     i &lt; rdev-&gt;lldi.vr-&gt;qp.start + rdev-&gt;lldi.vr-&gt;qp.size; i++)</div><div class='add'>+		i &lt; rdev-&gt;lldi.vr-&gt;qp.start + rdev-&gt;lldi.vr-&gt;qp.size; i++)</div><div class='ctx'> 		if (!(i &amp; rdev-&gt;qpmask))</div><div class='del'>-			kfifo_in(&amp;rdev-&gt;resource.qid_fifo,</div><div class='del'>-				    (unsigned char *) &amp;i, sizeof(u32));</div><div class='add'>+			c4iw_id_free(&amp;rdev-&gt;resource.qid_table, i);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -127,44 +56,42 @@ static int c4iw_init_qid_fifo(struct c4iw_rdev *rdev)</div><div class='ctx'> int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_tpt, u32 nr_pdid)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='del'>-	err = c4iw_init_resource_fifo_random(&amp;rdev-&gt;resource.tpt_fifo,</div><div class='del'>-					     &amp;rdev-&gt;resource.tpt_fifo_lock,</div><div class='del'>-					     nr_tpt, 1, 0);</div><div class='add'>+	err = c4iw_id_table_alloc(&amp;rdev-&gt;resource.tpt_table, 0, nr_tpt, 1,</div><div class='add'>+					C4IW_ID_TABLE_F_RANDOM);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto tpt_err;</div><div class='del'>-	err = c4iw_init_qid_fifo(rdev);</div><div class='add'>+	err = c4iw_init_qid_table(rdev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto qid_err;</div><div class='del'>-	err = c4iw_init_resource_fifo(&amp;rdev-&gt;resource.pdid_fifo,</div><div class='del'>-				      &amp;rdev-&gt;resource.pdid_fifo_lock,</div><div class='del'>-				      nr_pdid, 1, 0);</div><div class='add'>+	err = c4iw_id_table_alloc(&amp;rdev-&gt;resource.pdid_table, 0,</div><div class='add'>+					nr_pdid, 1, 0);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto pdid_err;</div><div class='ctx'> 	return 0;</div><div class='del'>-pdid_err:</div><div class='del'>-	kfifo_free(&amp;rdev-&gt;resource.qid_fifo);</div><div class='del'>-qid_err:</div><div class='del'>-	kfifo_free(&amp;rdev-&gt;resource.tpt_fifo);</div><div class='del'>-tpt_err:</div><div class='add'>+ pdid_err:</div><div class='add'>+	c4iw_id_table_free(&amp;rdev-&gt;resource.qid_table);</div><div class='add'>+ qid_err:</div><div class='add'>+	c4iw_id_table_free(&amp;rdev-&gt;resource.tpt_table);</div><div class='add'>+ tpt_err:</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * returns 0 if no resource available</div><div class='ctx'>  */</div><div class='del'>-u32 c4iw_get_resource(struct kfifo *fifo, spinlock_t *lock)</div><div class='add'>+u32 c4iw_get_resource(struct c4iw_id_table *id_table)</div><div class='ctx'> {</div><div class='ctx'> 	u32 entry;</div><div class='del'>-	if (kfifo_out_locked(fifo, (unsigned char *) &amp;entry, sizeof(u32), lock))</div><div class='del'>-		return entry;</div><div class='del'>-	else</div><div class='add'>+	entry = c4iw_id_alloc(id_table);</div><div class='add'>+	if (entry == (u32)(-1))</div><div class='ctx'> 		return 0;</div><div class='add'>+	return entry;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void c4iw_put_resource(struct kfifo *fifo, u32 entry, spinlock_t *lock)</div><div class='add'>+void c4iw_put_resource(struct c4iw_id_table *id_table, u32 entry)</div><div class='ctx'> {</div><div class='ctx'> 	PDBG("%s entry 0x%x\n", __func__, entry);</div><div class='del'>-	kfifo_in_locked(fifo, (unsigned char *) &amp;entry, sizeof(u32), lock);</div><div class='add'>+	c4iw_id_free(id_table, entry);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx)</div><div class='hunk'>@@ -181,10 +108,12 @@ u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx)</div><div class='ctx'> 		qid = entry-&gt;qid;</div><div class='ctx'> 		kfree(entry);</div><div class='ctx'> 	} else {</div><div class='del'>-		qid = c4iw_get_resource(&amp;rdev-&gt;resource.qid_fifo,</div><div class='del'>-					&amp;rdev-&gt;resource.qid_fifo_lock);</div><div class='add'>+		qid = c4iw_get_resource(&amp;rdev-&gt;resource.qid_table);</div><div class='ctx'> 		if (!qid)</div><div class='ctx'> 			goto out;</div><div class='add'>+		mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+		rdev-&gt;stats.qid.cur += rdev-&gt;qpmask + 1;</div><div class='add'>+		mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='ctx'> 		for (i = qid+1; i &amp; rdev-&gt;qpmask; i++) {</div><div class='ctx'> 			entry = kmalloc(sizeof *entry, GFP_KERNEL);</div><div class='ctx'> 			if (!entry)</div><div class='hunk'>@@ -213,6 +142,10 @@ u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx)</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;uctx-&gt;lock);</div><div class='ctx'> 	PDBG("%s qid 0x%x\n", __func__, qid);</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+	if (rdev-&gt;stats.qid.cur &gt; rdev-&gt;stats.qid.max)</div><div class='add'>+		rdev-&gt;stats.qid.max = rdev-&gt;stats.qid.cur;</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='ctx'> 	return qid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -245,10 +178,12 @@ u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx)</div><div class='ctx'> 		qid = entry-&gt;qid;</div><div class='ctx'> 		kfree(entry);</div><div class='ctx'> 	} else {</div><div class='del'>-		qid = c4iw_get_resource(&amp;rdev-&gt;resource.qid_fifo,</div><div class='del'>-					&amp;rdev-&gt;resource.qid_fifo_lock);</div><div class='add'>+		qid = c4iw_get_resource(&amp;rdev-&gt;resource.qid_table);</div><div class='ctx'> 		if (!qid)</div><div class='ctx'> 			goto out;</div><div class='add'>+		mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+		rdev-&gt;stats.qid.cur += rdev-&gt;qpmask + 1;</div><div class='add'>+		mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='ctx'> 		for (i = qid+1; i &amp; rdev-&gt;qpmask; i++) {</div><div class='ctx'> 			entry = kmalloc(sizeof *entry, GFP_KERNEL);</div><div class='ctx'> 			if (!entry)</div><div class='hunk'>@@ -277,6 +212,10 @@ u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx)</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;uctx-&gt;lock);</div><div class='ctx'> 	PDBG("%s qid 0x%x\n", __func__, qid);</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+	if (rdev-&gt;stats.qid.cur &gt; rdev-&gt;stats.qid.max)</div><div class='add'>+		rdev-&gt;stats.qid.max = rdev-&gt;stats.qid.cur;</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='ctx'> 	return qid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -297,9 +236,9 @@ void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qid,</div><div class='ctx'> </div><div class='ctx'> void c4iw_destroy_resource(struct c4iw_resource *rscp)</div><div class='ctx'> {</div><div class='del'>-	kfifo_free(&amp;rscp-&gt;tpt_fifo);</div><div class='del'>-	kfifo_free(&amp;rscp-&gt;qid_fifo);</div><div class='del'>-	kfifo_free(&amp;rscp-&gt;pdid_fifo);</div><div class='add'>+	c4iw_id_table_free(&amp;rscp-&gt;tpt_table);</div><div class='add'>+	c4iw_id_table_free(&amp;rscp-&gt;qid_table);</div><div class='add'>+	c4iw_id_table_free(&amp;rscp-&gt;pdid_table);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -312,15 +251,23 @@ u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long addr = gen_pool_alloc(rdev-&gt;pbl_pool, size);</div><div class='ctx'> 	PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size);</div><div class='del'>-	if (!addr)</div><div class='del'>-		printk_ratelimited(KERN_WARNING MOD "%s: Out of PBL memory\n",</div><div class='del'>-		       pci_name(rdev-&gt;lldi.pdev));</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+	if (addr) {</div><div class='add'>+		rdev-&gt;stats.pbl.cur += roundup(size, 1 &lt;&lt; MIN_PBL_SHIFT);</div><div class='add'>+		if (rdev-&gt;stats.pbl.cur &gt; rdev-&gt;stats.pbl.max)</div><div class='add'>+			rdev-&gt;stats.pbl.max = rdev-&gt;stats.pbl.cur;</div><div class='add'>+	} else</div><div class='add'>+		rdev-&gt;stats.pbl.fail++;</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='ctx'> 	return (u32)addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size)</div><div class='ctx'> {</div><div class='ctx'> 	PDBG("%s addr 0x%x size %d\n", __func__, addr, size);</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+	rdev-&gt;stats.pbl.cur -= roundup(size, 1 &lt;&lt; MIN_PBL_SHIFT);</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='ctx'> 	gen_pool_free(rdev-&gt;pbl_pool, (unsigned long)addr, size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -377,12 +324,23 @@ u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size)</div><div class='ctx'> 	if (!addr)</div><div class='ctx'> 		printk_ratelimited(KERN_WARNING MOD "%s: Out of RQT memory\n",</div><div class='ctx'> 		       pci_name(rdev-&gt;lldi.pdev));</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+	if (addr) {</div><div class='add'>+		rdev-&gt;stats.rqt.cur += roundup(size &lt;&lt; 6, 1 &lt;&lt; MIN_RQT_SHIFT);</div><div class='add'>+		if (rdev-&gt;stats.rqt.cur &gt; rdev-&gt;stats.rqt.max)</div><div class='add'>+			rdev-&gt;stats.rqt.max = rdev-&gt;stats.rqt.cur;</div><div class='add'>+	} else</div><div class='add'>+		rdev-&gt;stats.rqt.fail++;</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='ctx'> 	return (u32)addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size)</div><div class='ctx'> {</div><div class='ctx'> 	PDBG("%s addr 0x%x size %d\n", __func__, addr, size &lt;&lt; 6);</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+	rdev-&gt;stats.rqt.cur -= roundup(size &lt;&lt; 6, 1 &lt;&lt; MIN_RQT_SHIFT);</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='ctx'> 	gen_pool_free(rdev-&gt;rqt_pool, (unsigned long)addr, size &lt;&lt; 6);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -433,12 +391,22 @@ u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long addr = gen_pool_alloc(rdev-&gt;ocqp_pool, size);</div><div class='ctx'> 	PDBG("%s addr 0x%x size %d\n", __func__, (u32)addr, size);</div><div class='add'>+	if (addr) {</div><div class='add'>+		mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+		rdev-&gt;stats.ocqp.cur += roundup(size, 1 &lt;&lt; MIN_OCQP_SHIFT);</div><div class='add'>+		if (rdev-&gt;stats.ocqp.cur &gt; rdev-&gt;stats.ocqp.max)</div><div class='add'>+			rdev-&gt;stats.ocqp.max = rdev-&gt;stats.ocqp.cur;</div><div class='add'>+		mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+	}</div><div class='ctx'> 	return (u32)addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size)</div><div class='ctx'> {</div><div class='ctx'> 	PDBG("%s addr 0x%x size %d\n", __func__, addr, size);</div><div class='add'>+	mutex_lock(&amp;rdev-&gt;stats.lock);</div><div class='add'>+	rdev-&gt;stats.ocqp.cur -= roundup(size, 1 &lt;&lt; MIN_OCQP_SHIFT);</div><div class='add'>+	mutex_unlock(&amp;rdev-&gt;stats.lock);</div><div class='ctx'> 	gen_pool_free(rdev-&gt;ocqp_pool, (unsigned long)addr, size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/infiniband/hw/cxgb4/t4.h b/drivers/infiniband/hw/cxgb4/t4.h<br/>index c0221eec8817..16f26ab29302 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/t4.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/cxgb4/t4.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/t4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/t4.h</a></div><div class='hunk'>@@ -62,6 +62,10 @@ struct t4_status_page {</div><div class='ctx'> 	__be16 pidx;</div><div class='ctx'> 	u8 qp_err;	/* flit 1 - sw owns */</div><div class='ctx'> 	u8 db_off;</div><div class='add'>+	u8 pad;</div><div class='add'>+	u16 host_wq_pidx;</div><div class='add'>+	u16 host_cidx;</div><div class='add'>+	u16 host_pidx;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define T4_EQ_ENTRY_SIZE 64</div><div class='hunk'>@@ -375,6 +379,16 @@ static inline void t4_rq_consume(struct t4_wq *wq)</div><div class='ctx'> 		wq-&gt;rq.cidx = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline u16 t4_rq_host_wq_pidx(struct t4_wq *wq)</div><div class='add'>+{</div><div class='add'>+	return wq-&gt;rq.queue[wq-&gt;rq.size].status.host_wq_pidx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16 t4_rq_wq_size(struct t4_wq *wq)</div><div class='add'>+{</div><div class='add'>+		return wq-&gt;rq.size * T4_RQ_NUM_SLOTS;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int t4_sq_onchip(struct t4_sq *sq)</div><div class='ctx'> {</div><div class='ctx'> 	return sq-&gt;flags &amp; T4_SQ_ONCHIP;</div><div class='hunk'>@@ -412,6 +426,16 @@ static inline void t4_sq_consume(struct t4_wq *wq)</div><div class='ctx'> 		wq-&gt;sq.cidx = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline u16 t4_sq_host_wq_pidx(struct t4_wq *wq)</div><div class='add'>+{</div><div class='add'>+	return wq-&gt;sq.queue[wq-&gt;sq.size].status.host_wq_pidx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16 t4_sq_wq_size(struct t4_wq *wq)</div><div class='add'>+{</div><div class='add'>+		return wq-&gt;sq.size * T4_SQ_NUM_SLOTS;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void t4_ring_sq_db(struct t4_wq *wq, u16 inc)</div><div class='ctx'> {</div><div class='ctx'> 	wmb();</div><div class='head'>diff --git a/drivers/infiniband/hw/cxgb4/user.h b/drivers/infiniband/hw/cxgb4/user.h<br/>index e6669d54770e..32b754c35ab7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/user.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/cxgb4/user.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/cxgb4/user.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/cxgb4/user.h</a></div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> #ifndef __C4IW_USER_H__</div><div class='ctx'> #define __C4IW_USER_H__</div><div class='ctx'> </div><div class='del'>-#define C4IW_UVERBS_ABI_VERSION	1</div><div class='add'>+#define C4IW_UVERBS_ABI_VERSION	2</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Make sure that all structs defined in this file remain laid out so</div><div class='head'>diff --git a/drivers/infiniband/hw/ipath/ipath_iba6110.c b/drivers/infiniband/hw/ipath/ipath_iba6110.c<br/>index 1d7aea132a09..7cc305488a3d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/ipath/ipath_iba6110.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/ipath/ipath_iba6110.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ipath/ipath_iba6110.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ipath/ipath_iba6110.c</a></div><div class='hunk'>@@ -596,8 +596,7 @@ static void ipath_ht_handle_hwerrors(struct ipath_devdata *dd, char *msg,</div><div class='ctx'> </div><div class='ctx'> 	ipath_format_hwerrors(hwerrs,</div><div class='ctx'> 			      ipath_6110_hwerror_msgs,</div><div class='del'>-			      sizeof(ipath_6110_hwerror_msgs) /</div><div class='del'>-			      sizeof(ipath_6110_hwerror_msgs[0]),</div><div class='add'>+			      ARRAY_SIZE(ipath_6110_hwerror_msgs),</div><div class='ctx'> 			      msg, msgl);</div><div class='ctx'> </div><div class='ctx'> 	if (hwerrs &amp; (_IPATH_HTLINK0_CRCBITS | _IPATH_HTLINK1_CRCBITS))</div><div class='head'>diff --git a/drivers/infiniband/hw/ipath/ipath_intr.c b/drivers/infiniband/hw/ipath/ipath_intr.c<br/>index c0a03ac03ee7..26dfbc8ee0f1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/ipath/ipath_intr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/ipath/ipath_intr.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ipath/ipath_intr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ipath/ipath_intr.c</a></div><div class='hunk'>@@ -209,8 +209,7 @@ void ipath_format_hwerrors(u64 hwerrs,</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	const int glen =</div><div class='del'>-	    sizeof(ipath_generic_hwerror_msgs) /</div><div class='del'>-	    sizeof(ipath_generic_hwerror_msgs[0]);</div><div class='add'>+	    ARRAY_SIZE(ipath_generic_hwerror_msgs);</div><div class='ctx'> </div><div class='ctx'> 	for (i=0; i&lt;glen; i++) {</div><div class='ctx'> 		if (hwerrs &amp; ipath_generic_hwerror_msgs[i].mask) {</div><div class='head'>diff --git a/drivers/infiniband/hw/mlx4/cq.c b/drivers/infiniband/hw/mlx4/cq.c<br/>index 77c8cb4c5073..6d4ef71cbcdf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/mlx4/cq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/mlx4/cq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/mlx4/cq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/mlx4/cq.c</a></div><div class='hunk'>@@ -50,7 +50,7 @@ static void mlx4_ib_cq_event(struct mlx4_cq *cq, enum mlx4_event type)</div><div class='ctx'> 	struct ib_cq *ibcq;</div><div class='ctx'> </div><div class='ctx'> 	if (type != MLX4_EVENT_TYPE_CQ_ERROR) {</div><div class='del'>-		printk(KERN_WARNING "mlx4_ib: Unexpected event type %d "</div><div class='add'>+		pr_warn("Unexpected event type %d "</div><div class='ctx'> 		       "on CQ %06x\n", type, cq-&gt;cqn);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -222,6 +222,9 @@ struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev, int entries, int vector</div><div class='ctx'> 		uar = &amp;dev-&gt;priv_uar;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (dev-&gt;eq_table)</div><div class='add'>+		vector = dev-&gt;eq_table[vector % ibdev-&gt;num_comp_vectors];</div><div class='add'>+</div><div class='ctx'> 	err = mlx4_cq_alloc(dev-&gt;dev, entries, &amp;cq-&gt;buf.mtt, uar,</div><div class='ctx'> 			    cq-&gt;db.dma, &amp;cq-&gt;mcq, vector, 0);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -463,7 +466,7 @@ static void dump_cqe(void *cqe)</div><div class='ctx'> {</div><div class='ctx'> 	__be32 *buf = cqe;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_DEBUG "CQE contents %08x %08x %08x %08x %08x %08x %08x %08x\n",</div><div class='add'>+	pr_debug("CQE contents %08x %08x %08x %08x %08x %08x %08x %08x\n",</div><div class='ctx'> 	       be32_to_cpu(buf[0]), be32_to_cpu(buf[1]), be32_to_cpu(buf[2]),</div><div class='ctx'> 	       be32_to_cpu(buf[3]), be32_to_cpu(buf[4]), be32_to_cpu(buf[5]),</div><div class='ctx'> 	       be32_to_cpu(buf[6]), be32_to_cpu(buf[7]));</div><div class='hunk'>@@ -473,7 +476,7 @@ static void mlx4_ib_handle_error_cqe(struct mlx4_err_cqe *cqe,</div><div class='ctx'> 				     struct ib_wc *wc)</div><div class='ctx'> {</div><div class='ctx'> 	if (cqe-&gt;syndrome == MLX4_CQE_SYNDROME_LOCAL_QP_OP_ERR) {</div><div class='del'>-		printk(KERN_DEBUG "local QP operation err "</div><div class='add'>+		pr_debug("local QP operation err "</div><div class='ctx'> 		       "(QPN %06x, WQE index %x, vendor syndrome %02x, "</div><div class='ctx'> 		       "opcode = %02x)\n",</div><div class='ctx'> 		       be32_to_cpu(cqe-&gt;my_qpn), be16_to_cpu(cqe-&gt;wqe_index),</div><div class='hunk'>@@ -576,7 +579,7 @@ repoll:</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely((cqe-&gt;owner_sr_opcode &amp; MLX4_CQE_OPCODE_MASK) == MLX4_OPCODE_NOP &amp;&amp;</div><div class='ctx'> 		     is_send)) {</div><div class='del'>-		printk(KERN_WARNING "Completion for NOP opcode detected!\n");</div><div class='add'>+		pr_warn("Completion for NOP opcode detected!\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -606,7 +609,7 @@ repoll:</div><div class='ctx'> 		mqp = __mlx4_qp_lookup(to_mdev(cq-&gt;ibcq.device)-&gt;dev,</div><div class='ctx'> 				       be32_to_cpu(cqe-&gt;vlan_my_qpn));</div><div class='ctx'> 		if (unlikely(!mqp)) {</div><div class='del'>-			printk(KERN_WARNING "CQ %06x with entry for unknown QPN %06x\n",</div><div class='add'>+			pr_warn("CQ %06x with entry for unknown QPN %06x\n",</div><div class='ctx'> 			       cq-&gt;mcq.cqn, be32_to_cpu(cqe-&gt;vlan_my_qpn) &amp; MLX4_CQE_QPN_MASK);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c<br/>index b948b6dd5d55..3530c41fcd1f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/mlx4/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/mlx4/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/mlx4/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/mlx4/main.c</a></div><div class='hunk'>@@ -140,7 +140,7 @@ static int mlx4_ib_query_device(struct ib_device *ibdev,</div><div class='ctx'> 	props-&gt;max_mr_size	   = ~0ull;</div><div class='ctx'> 	props-&gt;page_size_cap	   = dev-&gt;dev-&gt;caps.page_size_cap;</div><div class='ctx'> 	props-&gt;max_qp		   = dev-&gt;dev-&gt;caps.num_qps - dev-&gt;dev-&gt;caps.reserved_qps;</div><div class='del'>-	props-&gt;max_qp_wr	   = dev-&gt;dev-&gt;caps.max_wqes;</div><div class='add'>+	props-&gt;max_qp_wr	   = dev-&gt;dev-&gt;caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;</div><div class='ctx'> 	props-&gt;max_sge		   = min(dev-&gt;dev-&gt;caps.max_sq_sg,</div><div class='ctx'> 					 dev-&gt;dev-&gt;caps.max_rq_sg);</div><div class='ctx'> 	props-&gt;max_cq		   = dev-&gt;dev-&gt;caps.num_cqs - dev-&gt;dev-&gt;caps.reserved_cqs;</div><div class='hunk'>@@ -789,7 +789,7 @@ static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)</div><div class='ctx'> 		list_del(&amp;ge-&gt;list);</div><div class='ctx'> 		kfree(ge);</div><div class='ctx'> 	} else</div><div class='del'>-		printk(KERN_WARNING "could not find mgid entry\n");</div><div class='add'>+		pr_warn("could not find mgid entry\n");</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;mqp-&gt;mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -902,7 +902,7 @@ static void update_gids_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	mailbox = mlx4_alloc_cmd_mailbox(dev);</div><div class='ctx'> 	if (IS_ERR(mailbox)) {</div><div class='del'>-		printk(KERN_WARNING "update gid table failed %ld\n", PTR_ERR(mailbox));</div><div class='add'>+		pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -913,7 +913,7 @@ static void update_gids_task(struct work_struct *work)</div><div class='ctx'> 		       1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,</div><div class='ctx'> 		       MLX4_CMD_NATIVE);</div><div class='ctx'> 	if (err)</div><div class='del'>-		printk(KERN_WARNING "set port command failed\n");</div><div class='add'>+		pr_warn("set port command failed\n");</div><div class='ctx'> 	else {</div><div class='ctx'> 		memcpy(gw-&gt;dev-&gt;iboe.gid_table[gw-&gt;port - 1], gw-&gt;gids, sizeof gw-&gt;gids);</div><div class='ctx'> 		event.device = &amp;gw-&gt;dev-&gt;ib_dev;</div><div class='hunk'>@@ -1076,18 +1076,93 @@ static int mlx4_ib_netdev_event(struct notifier_block *this, unsigned long event</div><div class='ctx'> 	return NOTIFY_DONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)</div><div class='add'>+{</div><div class='add'>+	char name[32];</div><div class='add'>+	int eq_per_port = 0;</div><div class='add'>+	int added_eqs = 0;</div><div class='add'>+	int total_eqs = 0;</div><div class='add'>+	int i, j, eq;</div><div class='add'>+</div><div class='add'>+	/* Legacy mode or comp_pool is not large enough */</div><div class='add'>+	if (dev-&gt;caps.comp_pool == 0 ||</div><div class='add'>+	    dev-&gt;caps.num_ports &gt; dev-&gt;caps.comp_pool)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	eq_per_port = rounddown_pow_of_two(dev-&gt;caps.comp_pool/</div><div class='add'>+					dev-&gt;caps.num_ports);</div><div class='add'>+</div><div class='add'>+	/* Init eq table */</div><div class='add'>+	added_eqs = 0;</div><div class='add'>+	mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)</div><div class='add'>+		added_eqs += eq_per_port;</div><div class='add'>+</div><div class='add'>+	total_eqs = dev-&gt;caps.num_comp_vectors + added_eqs;</div><div class='add'>+</div><div class='add'>+	ibdev-&gt;eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);</div><div class='add'>+	if (!ibdev-&gt;eq_table)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ibdev-&gt;eq_added = added_eqs;</div><div class='add'>+</div><div class='add'>+	eq = 0;</div><div class='add'>+	mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {</div><div class='add'>+		for (j = 0; j &lt; eq_per_port; j++) {</div><div class='add'>+			sprintf(name, "mlx4-ib-%d-%d@%s",</div><div class='add'>+				i, j, dev-&gt;pdev-&gt;bus-&gt;name);</div><div class='add'>+			/* Set IRQ for specific name (per ring) */</div><div class='add'>+			if (mlx4_assign_eq(dev, name, &amp;ibdev-&gt;eq_table[eq])) {</div><div class='add'>+				/* Use legacy (same as mlx4_en driver) */</div><div class='add'>+				pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);</div><div class='add'>+				ibdev-&gt;eq_table[eq] =</div><div class='add'>+					(eq % dev-&gt;caps.num_comp_vectors);</div><div class='add'>+			}</div><div class='add'>+			eq++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Fill the reset of the vector with legacy EQ */</div><div class='add'>+	for (i = 0, eq = added_eqs; i &lt; dev-&gt;caps.num_comp_vectors; i++)</div><div class='add'>+		ibdev-&gt;eq_table[eq++] = i;</div><div class='add'>+</div><div class='add'>+	/* Advertise the new number of EQs to clients */</div><div class='add'>+	ibdev-&gt;ib_dev.num_comp_vectors = total_eqs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* no additional eqs were added */</div><div class='add'>+	if (!ibdev-&gt;eq_table)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Reset the advertised EQ number */</div><div class='add'>+	ibdev-&gt;ib_dev.num_comp_vectors = dev-&gt;caps.num_comp_vectors;</div><div class='add'>+</div><div class='add'>+	/* Free only the added eqs */</div><div class='add'>+	for (i = 0; i &lt; ibdev-&gt;eq_added; i++) {</div><div class='add'>+		/* Don't free legacy eqs if used */</div><div class='add'>+		if (ibdev-&gt;eq_table[i] &lt;= dev-&gt;caps.num_comp_vectors)</div><div class='add'>+			continue;</div><div class='add'>+		mlx4_release_eq(dev, ibdev-&gt;eq_table[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(ibdev-&gt;eq_table);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void *mlx4_ib_add(struct mlx4_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_ib_dev *ibdev;</div><div class='ctx'> 	int num_ports = 0;</div><div class='del'>-	int i;</div><div class='add'>+	int i, j;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct mlx4_ib_iboe *iboe;</div><div class='ctx'> </div><div class='del'>-	printk_once(KERN_INFO "%s", mlx4_ib_version);</div><div class='add'>+	pr_info_once("%s", mlx4_ib_version);</div><div class='ctx'> </div><div class='ctx'> 	if (mlx4_is_mfunc(dev)) {</div><div class='del'>-		printk(KERN_WARNING "IB not yet supported in SRIOV\n");</div><div class='add'>+		pr_warn("IB not yet supported in SRIOV\n");</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1210,6 +1285,8 @@ static void *mlx4_ib_add(struct mlx4_dev *dev)</div><div class='ctx'> 			(1ull &lt;&lt; IB_USER_VERBS_CMD_CLOSE_XRCD);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mlx4_ib_alloc_eqs(dev, ibdev);</div><div class='add'>+</div><div class='ctx'> 	spin_lock_init(&amp;iboe-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (init_node_data(ibdev))</div><div class='hunk'>@@ -1241,9 +1318,9 @@ static void *mlx4_ib_add(struct mlx4_dev *dev)</div><div class='ctx'> 			goto err_reg;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(mlx4_class_attributes); ++i) {</div><div class='add'>+	for (j = 0; j &lt; ARRAY_SIZE(mlx4_class_attributes); ++j) {</div><div class='ctx'> 		if (device_create_file(&amp;ibdev-&gt;ib_dev.dev,</div><div class='del'>-				       mlx4_class_attributes[i]))</div><div class='add'>+				       mlx4_class_attributes[j]))</div><div class='ctx'> 			goto err_notif;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1253,7 +1330,7 @@ static void *mlx4_ib_add(struct mlx4_dev *dev)</div><div class='ctx'> </div><div class='ctx'> err_notif:</div><div class='ctx'> 	if (unregister_netdevice_notifier(&amp;ibdev-&gt;iboe.nb))</div><div class='del'>-		printk(KERN_WARNING "failure unregistering notifier\n");</div><div class='add'>+		pr_warn("failure unregistering notifier\n");</div><div class='ctx'> 	flush_workqueue(wq);</div><div class='ctx'> </div><div class='ctx'> err_reg:</div><div class='hunk'>@@ -1288,7 +1365,7 @@ static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)</div><div class='ctx'> 	ib_unregister_device(&amp;ibdev-&gt;ib_dev);</div><div class='ctx'> 	if (ibdev-&gt;iboe.nb.notifier_call) {</div><div class='ctx'> 		if (unregister_netdevice_notifier(&amp;ibdev-&gt;iboe.nb))</div><div class='del'>-			printk(KERN_WARNING "failure unregistering notifier\n");</div><div class='add'>+			pr_warn("failure unregistering notifier\n");</div><div class='ctx'> 		ibdev-&gt;iboe.nb.notifier_call = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	iounmap(ibdev-&gt;uar_map);</div><div class='hunk'>@@ -1298,6 +1375,8 @@ static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)</div><div class='ctx'> 	mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)</div><div class='ctx'> 		mlx4_CLOSE_PORT(dev, p);</div><div class='ctx'> </div><div class='add'>+	mlx4_ib_free_eqs(dev, ibdev);</div><div class='add'>+</div><div class='ctx'> 	mlx4_uar_free(dev, &amp;ibdev-&gt;priv_uar);</div><div class='ctx'> 	mlx4_pd_free(dev, ibdev-&gt;priv_pdn);</div><div class='ctx'> 	ib_dealloc_device(&amp;ibdev-&gt;ib_dev);</div><div class='head'>diff --git a/drivers/infiniband/hw/mlx4/mlx4_ib.h b/drivers/infiniband/hw/mlx4/mlx4_ib.h<br/>index ed80345c99ae..ff36655d23d3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/mlx4/mlx4_ib.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/mlx4/mlx4_ib.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/mlx4/mlx4_ib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/mlx4/mlx4_ib.h</a></div><div class='hunk'>@@ -44,6 +44,14 @@</div><div class='ctx'> #include &lt;linux/mlx4/device.h&gt;</div><div class='ctx'> #include &lt;linux/mlx4/doorbell.h&gt;</div><div class='ctx'> </div><div class='add'>+enum {</div><div class='add'>+	MLX4_IB_SQ_MIN_WQE_SHIFT = 6,</div><div class='add'>+	MLX4_IB_MAX_HEADROOM	 = 2048</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MLX4_IB_SQ_HEADROOM(shift)	((MLX4_IB_MAX_HEADROOM &gt;&gt; (shift)) + 1)</div><div class='add'>+#define MLX4_IB_SQ_MAX_SPARE		(MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))</div><div class='add'>+</div><div class='ctx'> struct mlx4_ib_ucontext {</div><div class='ctx'> 	struct ib_ucontext	ibucontext;</div><div class='ctx'> 	struct mlx4_uar		uar;</div><div class='hunk'>@@ -202,6 +210,8 @@ struct mlx4_ib_dev {</div><div class='ctx'> 	bool			ib_active;</div><div class='ctx'> 	struct mlx4_ib_iboe	iboe;</div><div class='ctx'> 	int			counters[MLX4_MAX_PORTS];</div><div class='add'>+	int		       *eq_table;</div><div class='add'>+	int			eq_added;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)</div><div class='head'>diff --git a/drivers/infiniband/hw/mlx4/mr.c b/drivers/infiniband/hw/mlx4/mr.c<br/>index dca55b19a6f1..bbaf6176f207 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/mlx4/mr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/mlx4/mr.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/mlx4/mr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/mlx4/mr.c</a></div><div class='hunk'>@@ -338,7 +338,7 @@ int mlx4_ib_unmap_fmr(struct list_head *fmr_list)</div><div class='ctx'> </div><div class='ctx'> 	err = mlx4_SYNC_TPT(mdev);</div><div class='ctx'> 	if (err)</div><div class='del'>-		printk(KERN_WARNING "mlx4_ib: SYNC_TPT error %d when "</div><div class='add'>+		pr_warn("SYNC_TPT error %d when "</div><div class='ctx'> 		       "unmapping FMRs\n", err);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/infiniband/hw/mlx4/qp.c b/drivers/infiniband/hw/mlx4/qp.c<br/>index 3a7848966627..8d4ed24aef93 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/mlx4/qp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/mlx4/qp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/mlx4/qp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/mlx4/qp.c</a></div><div class='hunk'>@@ -84,6 +84,11 @@ enum {</div><div class='ctx'> 	MLX4_IB_CACHE_LINE_SIZE	= 64,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum {</div><div class='add'>+	MLX4_RAW_QP_MTU		= 7,</div><div class='add'>+	MLX4_RAW_QP_MSGMAX	= 31,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const __be32 mlx4_ib_opcode[] = {</div><div class='ctx'> 	[IB_WR_SEND]				= cpu_to_be32(MLX4_OPCODE_SEND),</div><div class='ctx'> 	[IB_WR_LSO]				= cpu_to_be32(MLX4_OPCODE_LSO),</div><div class='hunk'>@@ -256,7 +261,7 @@ static void mlx4_ib_qp_event(struct mlx4_qp *qp, enum mlx4_event type)</div><div class='ctx'> 			event.event = IB_EVENT_QP_ACCESS_ERR;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			printk(KERN_WARNING "mlx4_ib: Unexpected event type %d "</div><div class='add'>+			pr_warn("Unexpected event type %d "</div><div class='ctx'> 			       "on QP %06x\n", type, qp-&gt;qpn);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -305,8 +310,8 @@ static int set_rq_size(struct mlx4_ib_dev *dev, struct ib_qp_cap *cap,</div><div class='ctx'> 		       int is_user, int has_rq, struct mlx4_ib_qp *qp)</div><div class='ctx'> {</div><div class='ctx'> 	/* Sanity check RQ size before proceeding */</div><div class='del'>-	if (cap-&gt;max_recv_wr  &gt; dev-&gt;dev-&gt;caps.max_wqes  ||</div><div class='del'>-	    cap-&gt;max_recv_sge &gt; dev-&gt;dev-&gt;caps.max_rq_sg)</div><div class='add'>+	if (cap-&gt;max_recv_wr &gt; dev-&gt;dev-&gt;caps.max_wqes - MLX4_IB_SQ_MAX_SPARE ||</div><div class='add'>+	    cap-&gt;max_recv_sge &gt; min(dev-&gt;dev-&gt;caps.max_sq_sg, dev-&gt;dev-&gt;caps.max_rq_sg))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (!has_rq) {</div><div class='hunk'>@@ -324,8 +329,17 @@ static int set_rq_size(struct mlx4_ib_dev *dev, struct ib_qp_cap *cap,</div><div class='ctx'> 		qp-&gt;rq.wqe_shift = ilog2(qp-&gt;rq.max_gs * sizeof (struct mlx4_wqe_data_seg));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cap-&gt;max_recv_wr  = qp-&gt;rq.max_post = qp-&gt;rq.wqe_cnt;</div><div class='del'>-	cap-&gt;max_recv_sge = qp-&gt;rq.max_gs;</div><div class='add'>+	/* leave userspace return values as they were, so as not to break ABI */</div><div class='add'>+	if (is_user) {</div><div class='add'>+		cap-&gt;max_recv_wr  = qp-&gt;rq.max_post = qp-&gt;rq.wqe_cnt;</div><div class='add'>+		cap-&gt;max_recv_sge = qp-&gt;rq.max_gs;</div><div class='add'>+	} else {</div><div class='add'>+		cap-&gt;max_recv_wr  = qp-&gt;rq.max_post =</div><div class='add'>+			min(dev-&gt;dev-&gt;caps.max_wqes - MLX4_IB_SQ_MAX_SPARE, qp-&gt;rq.wqe_cnt);</div><div class='add'>+		cap-&gt;max_recv_sge = min(qp-&gt;rq.max_gs,</div><div class='add'>+					min(dev-&gt;dev-&gt;caps.max_sq_sg,</div><div class='add'>+					    dev-&gt;dev-&gt;caps.max_rq_sg));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -336,8 +350,8 @@ static int set_kernel_sq_size(struct mlx4_ib_dev *dev, struct ib_qp_cap *cap,</div><div class='ctx'> 	int s;</div><div class='ctx'> </div><div class='ctx'> 	/* Sanity check SQ size before proceeding */</div><div class='del'>-	if (cap-&gt;max_send_wr	 &gt; dev-&gt;dev-&gt;caps.max_wqes  ||</div><div class='del'>-	    cap-&gt;max_send_sge	 &gt; dev-&gt;dev-&gt;caps.max_sq_sg ||</div><div class='add'>+	if (cap-&gt;max_send_wr  &gt; (dev-&gt;dev-&gt;caps.max_wqes - MLX4_IB_SQ_MAX_SPARE) ||</div><div class='add'>+	    cap-&gt;max_send_sge &gt; min(dev-&gt;dev-&gt;caps.max_sq_sg, dev-&gt;dev-&gt;caps.max_rq_sg) ||</div><div class='ctx'> 	    cap-&gt;max_inline_data + send_wqe_overhead(type, qp-&gt;flags) +</div><div class='ctx'> 	    sizeof (struct mlx4_wqe_inline_seg) &gt; dev-&gt;dev-&gt;caps.max_sq_desc_sz)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -573,7 +587,12 @@ static int create_qp_common(struct mlx4_ib_dev *dev, struct ib_pd *pd,</div><div class='ctx'> 	if (sqpn) {</div><div class='ctx'> 		qpn = sqpn;</div><div class='ctx'> 	} else {</div><div class='del'>-		err = mlx4_qp_reserve_range(dev-&gt;dev, 1, 1, &amp;qpn);</div><div class='add'>+		/* Raw packet QPNs must be aligned to 8 bits. If not, the WQE</div><div class='add'>+		 * BlueFlame setup flow wrongly causes VLAN insertion. */</div><div class='add'>+		if (init_attr-&gt;qp_type == IB_QPT_RAW_PACKET)</div><div class='add'>+			err = mlx4_qp_reserve_range(dev-&gt;dev, 1, 1 &lt;&lt; 8, &amp;qpn);</div><div class='add'>+		else</div><div class='add'>+			err = mlx4_qp_reserve_range(dev-&gt;dev, 1, 1, &amp;qpn);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_wrid;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -715,7 +734,7 @@ static void destroy_qp_common(struct mlx4_ib_dev *dev, struct mlx4_ib_qp *qp,</div><div class='ctx'> 	if (qp-&gt;state != IB_QPS_RESET)</div><div class='ctx'> 		if (mlx4_qp_modify(dev-&gt;dev, NULL, to_mlx4_state(qp-&gt;state),</div><div class='ctx'> 				   MLX4_QP_STATE_RST, NULL, 0, 0, &amp;qp-&gt;mqp))</div><div class='del'>-			printk(KERN_WARNING "mlx4_ib: modify QP %06x to RESET failed.\n",</div><div class='add'>+			pr_warn("modify QP %06x to RESET failed.\n",</div><div class='ctx'> 			       qp-&gt;mqp.qpn);</div><div class='ctx'> </div><div class='ctx'> 	get_cqs(qp, &amp;send_cq, &amp;recv_cq);</div><div class='hunk'>@@ -791,6 +810,7 @@ struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,</div><div class='ctx'> 	case IB_QPT_RC:</div><div class='ctx'> 	case IB_QPT_UC:</div><div class='ctx'> 	case IB_QPT_UD:</div><div class='add'>+	case IB_QPT_RAW_PACKET:</div><div class='ctx'> 	{</div><div class='ctx'> 		qp = kzalloc(sizeof *qp, GFP_KERNEL);</div><div class='ctx'> 		if (!qp)</div><div class='hunk'>@@ -872,7 +892,8 @@ static int to_mlx4_st(enum ib_qp_type type)</div><div class='ctx'> 	case IB_QPT_XRC_INI:</div><div class='ctx'> 	case IB_QPT_XRC_TGT:	return MLX4_QP_ST_XRC;</div><div class='ctx'> 	case IB_QPT_SMI:</div><div class='del'>-	case IB_QPT_GSI:	return MLX4_QP_ST_MLX;</div><div class='add'>+	case IB_QPT_GSI:</div><div class='add'>+	case IB_QPT_RAW_PACKET:	return MLX4_QP_ST_MLX;</div><div class='ctx'> 	default:		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -946,7 +967,7 @@ static int mlx4_set_path(struct mlx4_ib_dev *dev, const struct ib_ah_attr *ah,</div><div class='ctx'> </div><div class='ctx'> 	if (ah-&gt;ah_flags &amp; IB_AH_GRH) {</div><div class='ctx'> 		if (ah-&gt;grh.sgid_index &gt;= dev-&gt;dev-&gt;caps.gid_table_len[port]) {</div><div class='del'>-			printk(KERN_ERR "sgid_index (%u) too large. max is %d\n",</div><div class='add'>+			pr_err("sgid_index (%u) too large. max is %d\n",</div><div class='ctx'> 			       ah-&gt;grh.sgid_index, dev-&gt;dev-&gt;caps.gid_table_len[port] - 1);</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1042,6 +1063,8 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp,</div><div class='ctx'> </div><div class='ctx'> 	if (ibqp-&gt;qp_type == IB_QPT_GSI || ibqp-&gt;qp_type == IB_QPT_SMI)</div><div class='ctx'> 		context-&gt;mtu_msgmax = (IB_MTU_4096 &lt;&lt; 5) | 11;</div><div class='add'>+	else if (ibqp-&gt;qp_type == IB_QPT_RAW_PACKET)</div><div class='add'>+		context-&gt;mtu_msgmax = (MLX4_RAW_QP_MTU &lt;&lt; 5) | MLX4_RAW_QP_MSGMAX;</div><div class='ctx'> 	else if (ibqp-&gt;qp_type == IB_QPT_UD) {</div><div class='ctx'> 		if (qp-&gt;flags &amp; MLX4_IB_QP_LSO)</div><div class='ctx'> 			context-&gt;mtu_msgmax = (IB_MTU_4096 &lt;&lt; 5) |</div><div class='hunk'>@@ -1050,7 +1073,7 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp,</div><div class='ctx'> 			context-&gt;mtu_msgmax = (IB_MTU_4096 &lt;&lt; 5) | 12;</div><div class='ctx'> 	} else if (attr_mask &amp; IB_QP_PATH_MTU) {</div><div class='ctx'> 		if (attr-&gt;path_mtu &lt; IB_MTU_256 || attr-&gt;path_mtu &gt; IB_MTU_4096) {</div><div class='del'>-			printk(KERN_ERR "path MTU (%u) is invalid\n",</div><div class='add'>+			pr_err("path MTU (%u) is invalid\n",</div><div class='ctx'> 			       attr-&gt;path_mtu);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1200,7 +1223,8 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp,</div><div class='ctx'> 	if (cur_state == IB_QPS_INIT &amp;&amp;</div><div class='ctx'> 	    new_state == IB_QPS_RTR  &amp;&amp;</div><div class='ctx'> 	    (ibqp-&gt;qp_type == IB_QPT_GSI || ibqp-&gt;qp_type == IB_QPT_SMI ||</div><div class='del'>-	     ibqp-&gt;qp_type == IB_QPT_UD)) {</div><div class='add'>+	     ibqp-&gt;qp_type == IB_QPT_UD ||</div><div class='add'>+	     ibqp-&gt;qp_type == IB_QPT_RAW_PACKET)) {</div><div class='ctx'> 		context-&gt;pri_path.sched_queue = (qp-&gt;port - 1) &lt;&lt; 6;</div><div class='ctx'> 		if (is_qp0(dev, qp))</div><div class='ctx'> 			context-&gt;pri_path.sched_queue |= MLX4_IB_DEFAULT_QP0_SCHED_QUEUE;</div><div class='hunk'>@@ -1266,7 +1290,7 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp,</div><div class='ctx'> 	if (is_qp0(dev, qp)) {</div><div class='ctx'> 		if (cur_state != IB_QPS_RTR &amp;&amp; new_state == IB_QPS_RTR)</div><div class='ctx'> 			if (mlx4_INIT_PORT(dev-&gt;dev, qp-&gt;port))</div><div class='del'>-				printk(KERN_WARNING "INIT_PORT failed for port %d\n",</div><div class='add'>+				pr_warn("INIT_PORT failed for port %d\n",</div><div class='ctx'> 				       qp-&gt;port);</div><div class='ctx'> </div><div class='ctx'> 		if (cur_state != IB_QPS_RESET &amp;&amp; cur_state != IB_QPS_ERR &amp;&amp;</div><div class='hunk'>@@ -1319,6 +1343,11 @@ int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if ((attr_mask &amp; IB_QP_PORT) &amp;&amp; (ibqp-&gt;qp_type == IB_QPT_RAW_PACKET) &amp;&amp;</div><div class='add'>+	    (rdma_port_get_link_layer(&amp;dev-&gt;ib_dev, attr-&gt;port_num) !=</div><div class='add'>+	     IB_LINK_LAYER_ETHERNET))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	if (attr_mask &amp; IB_QP_PKEY_INDEX) {</div><div class='ctx'> 		int p = attr_mask &amp; IB_QP_PORT ? attr-&gt;port_num : qp-&gt;port;</div><div class='ctx'> 		if (attr-&gt;pkey_index &gt;= dev-&gt;dev-&gt;caps.pkey_table_len[p])</div><div class='hunk'>@@ -1424,6 +1453,9 @@ static int build_mlx_header(struct mlx4_ib_sqp *sqp, struct ib_send_wr *wr,</div><div class='ctx'> </div><div class='ctx'> 	if (is_eth) {</div><div class='ctx'> 		u8 *smac;</div><div class='add'>+		u16 pcp = (be32_to_cpu(ah-&gt;av.ib.sl_tclass_flowlabel) &gt;&gt; 29) &lt;&lt; 13;</div><div class='add'>+</div><div class='add'>+		mlx-&gt;sched_prio = cpu_to_be16(pcp);</div><div class='ctx'> </div><div class='ctx'> 		memcpy(sqp-&gt;ud_header.eth.dmac_h, ah-&gt;av.eth.mac, 6);</div><div class='ctx'> 		/* FIXME: cache smac value? */</div><div class='hunk'>@@ -1434,10 +1466,7 @@ static int build_mlx_header(struct mlx4_ib_sqp *sqp, struct ib_send_wr *wr,</div><div class='ctx'> 		if (!is_vlan) {</div><div class='ctx'> 			sqp-&gt;ud_header.eth.type = cpu_to_be16(MLX4_IB_IBOE_ETHERTYPE);</div><div class='ctx'> 		} else {</div><div class='del'>-			u16 pcp;</div><div class='del'>-</div><div class='ctx'> 			sqp-&gt;ud_header.vlan.type = cpu_to_be16(MLX4_IB_IBOE_ETHERTYPE);</div><div class='del'>-			pcp = (be32_to_cpu(ah-&gt;av.ib.sl_tclass_flowlabel) &gt;&gt; 29) &lt;&lt; 13;</div><div class='ctx'> 			sqp-&gt;ud_header.vlan.tag = cpu_to_be16(vlan | pcp);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1460,16 +1489,16 @@ static int build_mlx_header(struct mlx4_ib_sqp *sqp, struct ib_send_wr *wr,</div><div class='ctx'> 	header_size = ib_ud_header_pack(&amp;sqp-&gt;ud_header, sqp-&gt;header_buf);</div><div class='ctx'> </div><div class='ctx'> 	if (0) {</div><div class='del'>-		printk(KERN_ERR "built UD header of size %d:\n", header_size);</div><div class='add'>+		pr_err("built UD header of size %d:\n", header_size);</div><div class='ctx'> 		for (i = 0; i &lt; header_size / 4; ++i) {</div><div class='ctx'> 			if (i % 8 == 0)</div><div class='del'>-				printk("  [%02x] ", i * 4);</div><div class='del'>-			printk(" %08x",</div><div class='del'>-			       be32_to_cpu(((__be32 *) sqp-&gt;header_buf)[i]));</div><div class='add'>+				pr_err("  [%02x] ", i * 4);</div><div class='add'>+			pr_cont(" %08x",</div><div class='add'>+				be32_to_cpu(((__be32 *) sqp-&gt;header_buf)[i]));</div><div class='ctx'> 			if ((i + 1) % 8 == 0)</div><div class='del'>-				printk("\n");</div><div class='add'>+				pr_cont("\n");</div><div class='ctx'> 		}</div><div class='del'>-		printk("\n");</div><div class='add'>+		pr_err("\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/drivers/infiniband/hw/mlx4/srq.c b/drivers/infiniband/hw/mlx4/srq.c<br/>index 39542f3703b8..60c5fb025fc7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/mlx4/srq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/mlx4/srq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/mlx4/srq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/mlx4/srq.c</a></div><div class='hunk'>@@ -59,7 +59,7 @@ static void mlx4_ib_srq_event(struct mlx4_srq *srq, enum mlx4_event type)</div><div class='ctx'> 			event.event = IB_EVENT_SRQ_ERR;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			printk(KERN_WARNING "mlx4_ib: Unexpected event type %d "</div><div class='add'>+			pr_warn("Unexpected event type %d "</div><div class='ctx'> 			       "on SRQ %06x\n", type, srq-&gt;srqn);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c<br/>index 71edfbbcce1c..020e95c4c4b9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/nes/nes_cm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/nes/nes_cm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/nes/nes_cm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/nes/nes_cm.c</a></div><div class='hunk'>@@ -2884,7 +2884,8 @@ static int nes_cm_disconn_true(struct nes_qp *nesqp)</div><div class='ctx'> 			ibevent.device = nesqp-&gt;ibqp.device;</div><div class='ctx'> 			ibevent.event = nesqp-&gt;terminate_eventtype;</div><div class='ctx'> 			ibevent.element.qp = &amp;nesqp-&gt;ibqp;</div><div class='del'>-			nesqp-&gt;ibqp.event_handler(&amp;ibevent, nesqp-&gt;ibqp.qp_context);</div><div class='add'>+			if (nesqp-&gt;ibqp.event_handler)</div><div class='add'>+				nesqp-&gt;ibqp.event_handler(&amp;ibevent, nesqp-&gt;ibqp.qp_context);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3320,6 +3321,10 @@ int nes_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)</div><div class='ctx'> </div><div class='ctx'> 	nesqp-&gt;private_data_len = conn_param-&gt;private_data_len;</div><div class='ctx'> 	nesqp-&gt;nesqp_context-&gt;ird_ord_sizes |= cpu_to_le32((u32)conn_param-&gt;ord);</div><div class='add'>+	/* space for rdma0 read msg */</div><div class='add'>+	if (conn_param-&gt;ord == 0)</div><div class='add'>+		nesqp-&gt;nesqp_context-&gt;ird_ord_sizes |= cpu_to_le32(1);</div><div class='add'>+</div><div class='ctx'> 	nes_debug(NES_DBG_CM, "requested ord = 0x%08X.\n", (u32)conn_param-&gt;ord);</div><div class='ctx'> 	nes_debug(NES_DBG_CM, "mpa private data len =%u\n",</div><div class='ctx'> 		  conn_param-&gt;private_data_len);</div><div class='head'>diff --git a/drivers/infiniband/hw/ocrdma/Kconfig b/drivers/infiniband/hw/ocrdma/Kconfig<br/>new file mode 100644<br/>index 000000000000..b5b6056c8518<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ocrdma/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+config INFINIBAND_OCRDMA</div><div class='add'>+	tristate "Emulex One Connect HCA support"</div><div class='add'>+	depends on ETHERNET &amp;&amp; NETDEVICES &amp;&amp; PCI &amp;&amp; (IPV6 || IPV6=n)</div><div class='add'>+	select NET_VENDOR_EMULEX</div><div class='add'>+	select BE2NET</div><div class='add'>+	---help---</div><div class='add'>+	  This driver provides low-level InfiniBand over Ethernet</div><div class='add'>+	  support for Emulex One Connect host channel adapters (HCAs).</div><div class='head'>diff --git a/drivers/infiniband/hw/ocrdma/Makefile b/drivers/infiniband/hw/ocrdma/Makefile<br/>new file mode 100644<br/>index 000000000000..06a5bed12e43<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ocrdma/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+ccflags-y := -Idrivers/net/ethernet/emulex/benet</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_INFINIBAND_OCRDMA)	+= ocrdma.o</div><div class='add'>+</div><div class='add'>+ocrdma-y :=	ocrdma_main.o ocrdma_verbs.o ocrdma_hw.o ocrdma_ah.o</div><div class='head'>diff --git a/drivers/infiniband/hw/ocrdma/ocrdma.h b/drivers/infiniband/hw/ocrdma/ocrdma.h<br/>new file mode 100644<br/>index 000000000000..037f5cea85bd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ocrdma/ocrdma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma.h</a></div><div class='hunk'>@@ -0,0 +1,392 @@</div><div class='add'>+/*******************************************************************</div><div class='add'>+ * This file is part of the Emulex RoCE Device Driver for          *</div><div class='add'>+ * RoCE (RDMA over Converged Ethernet) adapters.                   *</div><div class='add'>+ * Copyright (C) 2008-2012 Emulex. All rights reserved.            *</div><div class='add'>+ * EMULEX and SLI are trademarks of Emulex.                        *</div><div class='add'>+ * www.emulex.com                                                  *</div><div class='add'>+ *                                                                 *</div><div class='add'>+ * This program is free software; you can redistribute it and/or   *</div><div class='add'>+ * modify it under the terms of version 2 of the GNU General       *</div><div class='add'>+ * Public License as published by the Free Software Foundation.    *</div><div class='add'>+ * This program is distributed in the hope that it will be useful. *</div><div class='add'>+ * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *</div><div class='add'>+ * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *</div><div class='add'>+ * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *</div><div class='add'>+ * TO BE LEGALLY INVALID.  See the GNU General Public License for  *</div><div class='add'>+ * more details, a copy of which can be found in the file COPYING  *</div><div class='add'>+ * included with this package.                                     *</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ * linux-drivers@emulex.com</div><div class='add'>+ *</div><div class='add'>+ * Emulex</div><div class='add'>+ * 3333 Susan Street</div><div class='add'>+ * Costa Mesa, CA 92626</div><div class='add'>+ *******************************************************************/</div><div class='add'>+</div><div class='add'>+#ifndef __OCRDMA_H__</div><div class='add'>+#define __OCRDMA_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;rdma/ib_verbs.h&gt;</div><div class='add'>+#include &lt;rdma/ib_user_verbs.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;be_roce.h&gt;</div><div class='add'>+#include "ocrdma_sli.h"</div><div class='add'>+</div><div class='add'>+#define OCRDMA_ROCE_DEV_VERSION "1.0.0"</div><div class='add'>+#define OCRDMA_NODE_DESC "Emulex OneConnect RoCE HCA"</div><div class='add'>+</div><div class='add'>+#define ocrdma_err(format, arg...) printk(KERN_ERR format, ##arg)</div><div class='add'>+</div><div class='add'>+#define OCRDMA_MAX_AH 512</div><div class='add'>+</div><div class='add'>+#define OCRDMA_UVERBS(CMD_NAME) (1ull &lt;&lt; IB_USER_VERBS_CMD_##CMD_NAME)</div><div class='add'>+</div><div class='add'>+struct ocrdma_dev_attr {</div><div class='add'>+	u8 fw_ver[32];</div><div class='add'>+	u32 vendor_id;</div><div class='add'>+	u32 device_id;</div><div class='add'>+	u16 max_pd;</div><div class='add'>+	u16 max_cq;</div><div class='add'>+	u16 max_cqe;</div><div class='add'>+	u16 max_qp;</div><div class='add'>+	u16 max_wqe;</div><div class='add'>+	u16 max_rqe;</div><div class='add'>+	u32 max_inline_data;</div><div class='add'>+	int max_send_sge;</div><div class='add'>+	int max_recv_sge;</div><div class='add'>+	int max_mr;</div><div class='add'>+	u64 max_mr_size;</div><div class='add'>+	u32 max_num_mr_pbl;</div><div class='add'>+	int max_fmr;</div><div class='add'>+	int max_map_per_fmr;</div><div class='add'>+	int max_pages_per_frmr;</div><div class='add'>+	u16 max_ord_per_qp;</div><div class='add'>+	u16 max_ird_per_qp;</div><div class='add'>+</div><div class='add'>+	int device_cap_flags;</div><div class='add'>+	u8 cq_overflow_detect;</div><div class='add'>+	u8 srq_supported;</div><div class='add'>+</div><div class='add'>+	u32 wqe_size;</div><div class='add'>+	u32 rqe_size;</div><div class='add'>+	u32 ird_page_size;</div><div class='add'>+	u8 local_ca_ack_delay;</div><div class='add'>+	u8 ird;</div><div class='add'>+	u8 num_ird_pages;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_pbl {</div><div class='add'>+	void *va;</div><div class='add'>+	dma_addr_t pa;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_queue_info {</div><div class='add'>+	void *va;</div><div class='add'>+	dma_addr_t dma;</div><div class='add'>+	u32 size;</div><div class='add'>+	u16 len;</div><div class='add'>+	u16 entry_size;		/* Size of an element in the queue */</div><div class='add'>+	u16 id;			/* qid, where to ring the doorbell. */</div><div class='add'>+	u16 head, tail;</div><div class='add'>+	bool created;</div><div class='add'>+	atomic_t used;		/* Number of valid elements in the queue */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_eq {</div><div class='add'>+	struct ocrdma_queue_info q;</div><div class='add'>+	u32 vector;</div><div class='add'>+	int cq_cnt;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	char irq_name[32];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_mq {</div><div class='add'>+	struct ocrdma_queue_info sq;</div><div class='add'>+	struct ocrdma_queue_info cq;</div><div class='add'>+	bool rearm_cq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mqe_ctx {</div><div class='add'>+	struct mutex lock; /* for serializing mailbox commands on MQ */</div><div class='add'>+	wait_queue_head_t cmd_wait;</div><div class='add'>+	u32 tag;</div><div class='add'>+	u16 cqe_status;</div><div class='add'>+	u16 ext_status;</div><div class='add'>+	bool cmd_done;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_dev {</div><div class='add'>+	struct ib_device ibdev;</div><div class='add'>+	struct ocrdma_dev_attr attr;</div><div class='add'>+</div><div class='add'>+	struct mutex dev_lock; /* provides syncronise access to device data */</div><div class='add'>+	spinlock_t flush_q_lock ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+	struct ocrdma_cq **cq_tbl;</div><div class='add'>+	struct ocrdma_qp **qp_tbl;</div><div class='add'>+</div><div class='add'>+	struct ocrdma_eq meq;</div><div class='add'>+	struct ocrdma_eq *qp_eq_tbl;</div><div class='add'>+	int eq_cnt;</div><div class='add'>+	u16 base_eqid;</div><div class='add'>+	u16 max_eq;</div><div class='add'>+</div><div class='add'>+	union ib_gid *sgid_tbl;</div><div class='add'>+	/* provided synchronization to sgid table for</div><div class='add'>+	 * updating gid entries triggered by notifier.</div><div class='add'>+	 */</div><div class='add'>+	spinlock_t sgid_lock;</div><div class='add'>+</div><div class='add'>+	int gsi_qp_created;</div><div class='add'>+	struct ocrdma_cq *gsi_sqcq;</div><div class='add'>+	struct ocrdma_cq *gsi_rqcq;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		struct ocrdma_av *va;</div><div class='add'>+		dma_addr_t pa;</div><div class='add'>+		u32 size;</div><div class='add'>+		u32 num_ah;</div><div class='add'>+		/* provide synchronization for av</div><div class='add'>+		 * entry allocations.</div><div class='add'>+		 */</div><div class='add'>+		spinlock_t lock;</div><div class='add'>+		u32 ahid;</div><div class='add'>+		struct ocrdma_pbl pbl;</div><div class='add'>+	} av_tbl;</div><div class='add'>+</div><div class='add'>+	void *mbx_cmd;</div><div class='add'>+	struct ocrdma_mq mq;</div><div class='add'>+	struct mqe_ctx mqe_ctx;</div><div class='add'>+</div><div class='add'>+	struct be_dev_info nic_info;</div><div class='add'>+</div><div class='add'>+	struct list_head entry;</div><div class='add'>+	struct rcu_head rcu;</div><div class='add'>+	int id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_cq {</div><div class='add'>+	struct ib_cq ibcq;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	struct ocrdma_cqe *va;</div><div class='add'>+	u32 phase;</div><div class='add'>+	u32 getp;	/* pointer to pending wrs to</div><div class='add'>+			 * return to stack, wrap arounds</div><div class='add'>+			 * at max_hw_cqe</div><div class='add'>+			 */</div><div class='add'>+	u32 max_hw_cqe;</div><div class='add'>+	bool phase_change;</div><div class='add'>+	bool armed, solicited;</div><div class='add'>+	bool arm_needed;</div><div class='add'>+</div><div class='add'>+	spinlock_t cq_lock ____cacheline_aligned; /* provide synchronization</div><div class='add'>+						   * to cq polling</div><div class='add'>+						   */</div><div class='add'>+	/* syncronizes cq completion handler invoked from multiple context */</div><div class='add'>+	spinlock_t comp_handler_lock ____cacheline_aligned;</div><div class='add'>+	u16 id;</div><div class='add'>+	u16 eqn;</div><div class='add'>+</div><div class='add'>+	struct ocrdma_ucontext *ucontext;</div><div class='add'>+	dma_addr_t pa;</div><div class='add'>+	u32 len;</div><div class='add'>+	atomic_t use_cnt;</div><div class='add'>+</div><div class='add'>+	/* head of all qp's sq and rq for which cqes need to be flushed</div><div class='add'>+	 * by the software.</div><div class='add'>+	 */</div><div class='add'>+	struct list_head sq_head, rq_head;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_pd {</div><div class='add'>+	struct ib_pd ibpd;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	struct ocrdma_ucontext *uctx;</div><div class='add'>+	atomic_t use_cnt;</div><div class='add'>+	u32 id;</div><div class='add'>+	int num_dpp_qp;</div><div class='add'>+	u32 dpp_page;</div><div class='add'>+	bool dpp_enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_ah {</div><div class='add'>+	struct ib_ah ibah;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	struct ocrdma_av *av;</div><div class='add'>+	u16 sgid_index;</div><div class='add'>+	u32 id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_qp_hwq_info {</div><div class='add'>+	u8 *va;			/* virtual address */</div><div class='add'>+	u32 max_sges;</div><div class='add'>+	u32 head, tail;</div><div class='add'>+	u32 entry_size;</div><div class='add'>+	u32 max_cnt;</div><div class='add'>+	u32 max_wqe_idx;</div><div class='add'>+	u16 dbid;		/* qid, where to ring the doorbell. */</div><div class='add'>+	u32 len;</div><div class='add'>+	dma_addr_t pa;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_srq {</div><div class='add'>+	struct ib_srq ibsrq;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	u8 __iomem *db;</div><div class='add'>+	/* provide synchronization to multiple context(s) posting rqe */</div><div class='add'>+	spinlock_t q_lock ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+	struct ocrdma_qp_hwq_info rq;</div><div class='add'>+	struct ocrdma_pd *pd;</div><div class='add'>+	atomic_t use_cnt;</div><div class='add'>+	u32 id;</div><div class='add'>+	u64 *rqe_wr_id_tbl;</div><div class='add'>+	u32 *idx_bit_fields;</div><div class='add'>+	u32 bit_fields_len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_qp {</div><div class='add'>+	struct ib_qp ibqp;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+</div><div class='add'>+	u8 __iomem *sq_db;</div><div class='add'>+	/* provide synchronization to multiple context(s) posting wqe, rqe */</div><div class='add'>+	spinlock_t q_lock ____cacheline_aligned;</div><div class='add'>+	struct ocrdma_qp_hwq_info sq;</div><div class='add'>+	struct {</div><div class='add'>+		uint64_t wrid;</div><div class='add'>+		uint16_t dpp_wqe_idx;</div><div class='add'>+		uint16_t dpp_wqe;</div><div class='add'>+		uint8_t  signaled;</div><div class='add'>+		uint8_t  rsvd[3];</div><div class='add'>+	} *wqe_wr_id_tbl;</div><div class='add'>+	u32 max_inline_data;</div><div class='add'>+	struct ocrdma_cq *sq_cq;</div><div class='add'>+	/* list maintained per CQ to flush SQ errors */</div><div class='add'>+	struct list_head sq_entry;</div><div class='add'>+</div><div class='add'>+	u8 __iomem *rq_db;</div><div class='add'>+	struct ocrdma_qp_hwq_info rq;</div><div class='add'>+	u64 *rqe_wr_id_tbl;</div><div class='add'>+	struct ocrdma_cq *rq_cq;</div><div class='add'>+	struct ocrdma_srq *srq;</div><div class='add'>+	/* list maintained per CQ to flush RQ errors */</div><div class='add'>+	struct list_head rq_entry;</div><div class='add'>+</div><div class='add'>+	enum ocrdma_qp_state state;	/*  QP state */</div><div class='add'>+	int cap_flags;</div><div class='add'>+	u32 max_ord, max_ird;</div><div class='add'>+</div><div class='add'>+	u32 id;</div><div class='add'>+	struct ocrdma_pd *pd;</div><div class='add'>+</div><div class='add'>+	enum ib_qp_type qp_type;</div><div class='add'>+</div><div class='add'>+	int sgid_idx;</div><div class='add'>+	u32 qkey;</div><div class='add'>+	bool dpp_enabled;</div><div class='add'>+	u8 *ird_q_va;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define OCRDMA_GET_NUM_POSTED_SHIFT_VAL(qp) \</div><div class='add'>+	(((qp-&gt;dev-&gt;nic_info.dev_family == OCRDMA_GEN2_FAMILY) &amp;&amp; \</div><div class='add'>+		(qp-&gt;id &lt; 64)) ? 24 : 16)</div><div class='add'>+</div><div class='add'>+struct ocrdma_hw_mr {</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	u32 lkey;</div><div class='add'>+	u8 fr_mr;</div><div class='add'>+	u8 remote_atomic;</div><div class='add'>+	u8 remote_rd;</div><div class='add'>+	u8 remote_wr;</div><div class='add'>+	u8 local_rd;</div><div class='add'>+	u8 local_wr;</div><div class='add'>+	u8 mw_bind;</div><div class='add'>+	u8 rsvd;</div><div class='add'>+	u64 len;</div><div class='add'>+	struct ocrdma_pbl *pbl_table;</div><div class='add'>+	u32 num_pbls;</div><div class='add'>+	u32 num_pbes;</div><div class='add'>+	u32 pbl_size;</div><div class='add'>+	u32 pbe_size;</div><div class='add'>+	u64 fbo;</div><div class='add'>+	u64 va;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_mr {</div><div class='add'>+	struct ib_mr ibmr;</div><div class='add'>+	struct ib_umem *umem;</div><div class='add'>+	struct ocrdma_hw_mr hwmr;</div><div class='add'>+	struct ocrdma_pd *pd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_ucontext {</div><div class='add'>+	struct ib_ucontext ibucontext;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+</div><div class='add'>+	struct list_head mm_head;</div><div class='add'>+	struct mutex mm_list_lock; /* protects list entries of mm type */</div><div class='add'>+	struct {</div><div class='add'>+		u32 *va;</div><div class='add'>+		dma_addr_t pa;</div><div class='add'>+		u32 len;</div><div class='add'>+	} ah_tbl;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_mm {</div><div class='add'>+	struct {</div><div class='add'>+		u64 phy_addr;</div><div class='add'>+		unsigned long len;</div><div class='add'>+	} key;</div><div class='add'>+	struct list_head entry;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct ocrdma_dev *get_ocrdma_dev(struct ib_device *ibdev)</div><div class='add'>+{</div><div class='add'>+	return container_of(ibdev, struct ocrdma_dev, ibdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ocrdma_ucontext *get_ocrdma_ucontext(struct ib_ucontext</div><div class='add'>+							  *ibucontext)</div><div class='add'>+{</div><div class='add'>+	return container_of(ibucontext, struct ocrdma_ucontext, ibucontext);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ocrdma_pd *get_ocrdma_pd(struct ib_pd *ibpd)</div><div class='add'>+{</div><div class='add'>+	return container_of(ibpd, struct ocrdma_pd, ibpd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ocrdma_cq *get_ocrdma_cq(struct ib_cq *ibcq)</div><div class='add'>+{</div><div class='add'>+	return container_of(ibcq, struct ocrdma_cq, ibcq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ocrdma_qp *get_ocrdma_qp(struct ib_qp *ibqp)</div><div class='add'>+{</div><div class='add'>+	return container_of(ibqp, struct ocrdma_qp, ibqp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ocrdma_mr *get_ocrdma_mr(struct ib_mr *ibmr)</div><div class='add'>+{</div><div class='add'>+	return container_of(ibmr, struct ocrdma_mr, ibmr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ocrdma_ah *get_ocrdma_ah(struct ib_ah *ibah)</div><div class='add'>+{</div><div class='add'>+	return container_of(ibah, struct ocrdma_ah, ibah);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ocrdma_srq *get_ocrdma_srq(struct ib_srq *ibsrq)</div><div class='add'>+{</div><div class='add'>+	return container_of(ibsrq, struct ocrdma_srq, ibsrq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_abi.h b/drivers/infiniband/hw/ocrdma/ocrdma_abi.h<br/>new file mode 100644<br/>index 000000000000..517ab20b727c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ocrdma/ocrdma_abi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_abi.h</a></div><div class='hunk'>@@ -0,0 +1,131 @@</div><div class='add'>+/*******************************************************************</div><div class='add'>+ * This file is part of the Emulex RoCE Device Driver for          *</div><div class='add'>+ * RoCE (RDMA over Converged Ethernet) adapters.                   *</div><div class='add'>+ * Copyright (C) 2008-2012 Emulex. All rights reserved.            *</div><div class='add'>+ * EMULEX and SLI are trademarks of Emulex.                        *</div><div class='add'>+ * www.emulex.com                                                  *</div><div class='add'>+ *                                                                 *</div><div class='add'>+ * This program is free software; you can redistribute it and/or   *</div><div class='add'>+ * modify it under the terms of version 2 of the GNU General       *</div><div class='add'>+ * Public License as published by the Free Software Foundation.    *</div><div class='add'>+ * This program is distributed in the hope that it will be useful. *</div><div class='add'>+ * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *</div><div class='add'>+ * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *</div><div class='add'>+ * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *</div><div class='add'>+ * TO BE LEGALLY INVALID.  See the GNU General Public License for  *</div><div class='add'>+ * more details, a copy of which can be found in the file COPYING  *</div><div class='add'>+ * included with this package.                                     *</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ * linux-drivers@emulex.com</div><div class='add'>+ *</div><div class='add'>+ * Emulex</div><div class='add'>+ * 3333 Susan Street</div><div class='add'>+ * Costa Mesa, CA 92626</div><div class='add'>+ *******************************************************************/</div><div class='add'>+</div><div class='add'>+#ifndef __OCRDMA_ABI_H__</div><div class='add'>+#define __OCRDMA_ABI_H__</div><div class='add'>+</div><div class='add'>+struct ocrdma_alloc_ucontext_resp {</div><div class='add'>+	u32 dev_id;</div><div class='add'>+	u32 wqe_size;</div><div class='add'>+	u32 max_inline_data;</div><div class='add'>+	u32 dpp_wqe_size;</div><div class='add'>+	u64 ah_tbl_page;</div><div class='add'>+	u32 ah_tbl_len;</div><div class='add'>+	u32 rsvd;</div><div class='add'>+	u8 fw_ver[32];</div><div class='add'>+	u32 rqe_size;</div><div class='add'>+	u64 rsvd1;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* user kernel communication data structures. */</div><div class='add'>+struct ocrdma_alloc_pd_ureq {</div><div class='add'>+	u64 rsvd1;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_alloc_pd_uresp {</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 dpp_enabled;</div><div class='add'>+	u32 dpp_page_addr_hi;</div><div class='add'>+	u32 dpp_page_addr_lo;</div><div class='add'>+	u64 rsvd1;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_cq_ureq {</div><div class='add'>+	u32 dpp_cq;</div><div class='add'>+	u32 rsvd;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define MAX_CQ_PAGES 8</div><div class='add'>+struct ocrdma_create_cq_uresp {</div><div class='add'>+	u32 cq_id;</div><div class='add'>+	u32 page_size;</div><div class='add'>+	u32 num_pages;</div><div class='add'>+	u32 max_hw_cqe;</div><div class='add'>+	u64 page_addr[MAX_CQ_PAGES];</div><div class='add'>+	u64 db_page_addr;</div><div class='add'>+	u32 db_page_size;</div><div class='add'>+	u32 phase_change;</div><div class='add'>+	u64 rsvd1;</div><div class='add'>+	u64 rsvd2;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define MAX_QP_PAGES 8</div><div class='add'>+#define MAX_UD_AV_PAGES 8</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_qp_ureq {</div><div class='add'>+	u8 enable_dpp_cq;</div><div class='add'>+	u8 rsvd;</div><div class='add'>+	u16 dpp_cq_id;</div><div class='add'>+	u32 rsvd1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_qp_uresp {</div><div class='add'>+	u16 qp_id;</div><div class='add'>+	u16 sq_dbid;</div><div class='add'>+	u16 rq_dbid;</div><div class='add'>+	u16 resv0;</div><div class='add'>+	u32 sq_page_size;</div><div class='add'>+	u32 rq_page_size;</div><div class='add'>+	u32 num_sq_pages;</div><div class='add'>+	u32 num_rq_pages;</div><div class='add'>+	u64 sq_page_addr[MAX_QP_PAGES];</div><div class='add'>+	u64 rq_page_addr[MAX_QP_PAGES];</div><div class='add'>+	u64 db_page_addr;</div><div class='add'>+	u32 db_page_size;</div><div class='add'>+	u32 dpp_credit;</div><div class='add'>+	u32 dpp_offset;</div><div class='add'>+	u32 rsvd1;</div><div class='add'>+	u32 num_wqe_allocated;</div><div class='add'>+	u32 num_rqe_allocated;</div><div class='add'>+	u32 db_sq_offset;</div><div class='add'>+	u32 db_rq_offset;</div><div class='add'>+	u32 db_shift;</div><div class='add'>+	u64 rsvd2;</div><div class='add'>+	u64 rsvd3;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_srq_uresp {</div><div class='add'>+	u16 rq_dbid;</div><div class='add'>+	u16 resv0;</div><div class='add'>+	u32 resv1;</div><div class='add'>+</div><div class='add'>+	u32 rq_page_size;</div><div class='add'>+	u32 num_rq_pages;</div><div class='add'>+</div><div class='add'>+	u64 rq_page_addr[MAX_QP_PAGES];</div><div class='add'>+	u64 db_page_addr;</div><div class='add'>+</div><div class='add'>+	u32 db_page_size;</div><div class='add'>+	u32 num_rqe_allocated;</div><div class='add'>+	u32 db_rq_offset;</div><div class='add'>+	u32 db_shift;</div><div class='add'>+</div><div class='add'>+	u64 rsvd2;</div><div class='add'>+	u64 rsvd3;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#endif				/* __OCRDMA_ABI_H__ */</div><div class='head'>diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_ah.c b/drivers/infiniband/hw/ocrdma/ocrdma_ah.c<br/>new file mode 100644<br/>index 000000000000..a877a8ed7907<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ocrdma/ocrdma_ah.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_ah.c</a></div><div class='hunk'>@@ -0,0 +1,172 @@</div><div class='add'>+/*******************************************************************</div><div class='add'>+ * This file is part of the Emulex RoCE Device Driver for          *</div><div class='add'>+ * RoCE (RDMA over Converged Ethernet) adapters.                   *</div><div class='add'>+ * Copyright (C) 2008-2012 Emulex. All rights reserved.            *</div><div class='add'>+ * EMULEX and SLI are trademarks of Emulex.                        *</div><div class='add'>+ * www.emulex.com                                                  *</div><div class='add'>+ *                                                                 *</div><div class='add'>+ * This program is free software; you can redistribute it and/or   *</div><div class='add'>+ * modify it under the terms of version 2 of the GNU General       *</div><div class='add'>+ * Public License as published by the Free Software Foundation.    *</div><div class='add'>+ * This program is distributed in the hope that it will be useful. *</div><div class='add'>+ * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *</div><div class='add'>+ * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *</div><div class='add'>+ * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *</div><div class='add'>+ * TO BE LEGALLY INVALID.  See the GNU General Public License for  *</div><div class='add'>+ * more details, a copy of which can be found in the file COPYING  *</div><div class='add'>+ * included with this package.                                     *</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ * linux-drivers@emulex.com</div><div class='add'>+ *</div><div class='add'>+ * Emulex</div><div class='add'>+ * 3333 Susan Street</div><div class='add'>+ * Costa Mesa, CA 92626</div><div class='add'>+ *******************************************************************/</div><div class='add'>+</div><div class='add'>+#include &lt;net/neighbour.h&gt;</div><div class='add'>+#include &lt;net/netevent.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;rdma/ib_addr.h&gt;</div><div class='add'>+#include &lt;rdma/ib_cache.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ocrdma.h"</div><div class='add'>+#include "ocrdma_verbs.h"</div><div class='add'>+#include "ocrdma_ah.h"</div><div class='add'>+#include "ocrdma_hw.h"</div><div class='add'>+</div><div class='add'>+static inline int set_av_attr(struct ocrdma_ah *ah,</div><div class='add'>+				struct ib_ah_attr *attr, int pdid)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	u16 vlan_tag; bool vlan_enabled = false;</div><div class='add'>+	struct ocrdma_dev *dev = ah-&gt;dev;</div><div class='add'>+	struct ocrdma_eth_vlan eth;</div><div class='add'>+	struct ocrdma_grh grh;</div><div class='add'>+	int eth_sz;</div><div class='add'>+</div><div class='add'>+	memset(&amp;eth, 0, sizeof(eth));</div><div class='add'>+	memset(&amp;grh, 0, sizeof(grh));</div><div class='add'>+</div><div class='add'>+	ah-&gt;sgid_index = attr-&gt;grh.sgid_index;</div><div class='add'>+</div><div class='add'>+	vlan_tag = rdma_get_vlan_id(&amp;attr-&gt;grh.dgid);</div><div class='add'>+	if (vlan_tag &amp;&amp; (vlan_tag &lt; 0x1000)) {</div><div class='add'>+		eth.eth_type = cpu_to_be16(0x8100);</div><div class='add'>+		eth.roce_eth_type = cpu_to_be16(OCRDMA_ROCE_ETH_TYPE);</div><div class='add'>+		vlan_tag |= (attr-&gt;sl &amp; 7) &lt;&lt; 13;</div><div class='add'>+		eth.vlan_tag = cpu_to_be16(vlan_tag);</div><div class='add'>+		eth_sz = sizeof(struct ocrdma_eth_vlan);</div><div class='add'>+		vlan_enabled = true;</div><div class='add'>+	} else {</div><div class='add'>+		eth.eth_type = cpu_to_be16(OCRDMA_ROCE_ETH_TYPE);</div><div class='add'>+		eth_sz = sizeof(struct ocrdma_eth_basic);</div><div class='add'>+	}</div><div class='add'>+	memcpy(&amp;eth.smac[0], &amp;dev-&gt;nic_info.mac_addr[0], ETH_ALEN);</div><div class='add'>+	status = ocrdma_resolve_dgid(dev, &amp;attr-&gt;grh.dgid, &amp;eth.dmac[0]);</div><div class='add'>+	if (status)</div><div class='add'>+		return status;</div><div class='add'>+	status = ocrdma_query_gid(&amp;dev-&gt;ibdev, 1, attr-&gt;grh.sgid_index,</div><div class='add'>+			(union ib_gid *)&amp;grh.sgid[0]);</div><div class='add'>+	if (status)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='add'>+	grh.tclass_flow = cpu_to_be32((6 &lt;&lt; 28) |</div><div class='add'>+			(attr-&gt;grh.traffic_class &lt;&lt; 24) |</div><div class='add'>+			attr-&gt;grh.flow_label);</div><div class='add'>+	/* 0x1b is next header value in GRH */</div><div class='add'>+	grh.pdid_hoplimit = cpu_to_be32((pdid &lt;&lt; 16) |</div><div class='add'>+			(0x1b &lt;&lt; 8) | attr-&gt;grh.hop_limit);</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;grh.dgid[0], attr-&gt;grh.dgid.raw, sizeof(attr-&gt;grh.dgid.raw));</div><div class='add'>+	memcpy(&amp;ah-&gt;av-&gt;eth_hdr, &amp;eth, eth_sz);</div><div class='add'>+	memcpy((u8 *)ah-&gt;av + eth_sz, &amp;grh, sizeof(struct ocrdma_grh));</div><div class='add'>+	if (vlan_enabled)</div><div class='add'>+		ah-&gt;av-&gt;valid |= OCRDMA_AV_VLAN_VALID;</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ib_ah *ocrdma_create_ah(struct ib_pd *ibpd, struct ib_ah_attr *attr)</div><div class='add'>+{</div><div class='add'>+	u32 *ahid_addr;</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_ah *ah;</div><div class='add'>+	struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);</div><div class='add'>+	struct ocrdma_dev *dev = pd-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (!(attr-&gt;ah_flags &amp; IB_AH_GRH))</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	ah = kzalloc(sizeof *ah, GFP_ATOMIC);</div><div class='add'>+	if (!ah)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	ah-&gt;dev = pd-&gt;dev;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_alloc_av(dev, ah);</div><div class='add'>+	if (status)</div><div class='add'>+		goto av_err;</div><div class='add'>+	status = set_av_attr(ah, attr, pd-&gt;id);</div><div class='add'>+	if (status)</div><div class='add'>+		goto av_conf_err;</div><div class='add'>+</div><div class='add'>+	/* if pd is for the user process, pass the ah_id to user space */</div><div class='add'>+	if ((pd-&gt;uctx) &amp;&amp; (pd-&gt;uctx-&gt;ah_tbl.va)) {</div><div class='add'>+		ahid_addr = pd-&gt;uctx-&gt;ah_tbl.va + attr-&gt;dlid;</div><div class='add'>+		*ahid_addr = ah-&gt;id;</div><div class='add'>+	}</div><div class='add'>+	return &amp;ah-&gt;ibah;</div><div class='add'>+</div><div class='add'>+av_conf_err:</div><div class='add'>+	ocrdma_free_av(dev, ah);</div><div class='add'>+av_err:</div><div class='add'>+	kfree(ah);</div><div class='add'>+	return ERR_PTR(status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_destroy_ah(struct ib_ah *ibah)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_ah *ah = get_ocrdma_ah(ibah);</div><div class='add'>+	ocrdma_free_av(ah-&gt;dev, ah);</div><div class='add'>+	kfree(ah);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_query_ah(struct ib_ah *ibah, struct ib_ah_attr *attr)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_ah *ah = get_ocrdma_ah(ibah);</div><div class='add'>+	struct ocrdma_av *av = ah-&gt;av;</div><div class='add'>+	struct ocrdma_grh *grh;</div><div class='add'>+	attr-&gt;ah_flags |= IB_AH_GRH;</div><div class='add'>+	if (ah-&gt;av-&gt;valid &amp; Bit(1)) {</div><div class='add'>+		grh = (struct ocrdma_grh *)((u8 *)ah-&gt;av +</div><div class='add'>+				sizeof(struct ocrdma_eth_vlan));</div><div class='add'>+		attr-&gt;sl = be16_to_cpu(av-&gt;eth_hdr.vlan_tag) &gt;&gt; 13;</div><div class='add'>+	} else {</div><div class='add'>+		grh = (struct ocrdma_grh *)((u8 *)ah-&gt;av +</div><div class='add'>+					sizeof(struct ocrdma_eth_basic));</div><div class='add'>+		attr-&gt;sl = 0;</div><div class='add'>+	}</div><div class='add'>+	memcpy(&amp;attr-&gt;grh.dgid.raw[0], &amp;grh-&gt;dgid[0], sizeof(grh-&gt;dgid));</div><div class='add'>+	attr-&gt;grh.sgid_index = ah-&gt;sgid_index;</div><div class='add'>+	attr-&gt;grh.hop_limit = be32_to_cpu(grh-&gt;pdid_hoplimit) &amp; 0xff;</div><div class='add'>+	attr-&gt;grh.traffic_class = be32_to_cpu(grh-&gt;tclass_flow) &gt;&gt; 24;</div><div class='add'>+	attr-&gt;grh.flow_label = be32_to_cpu(grh-&gt;tclass_flow) &amp; 0x00ffffffff;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_modify_ah(struct ib_ah *ibah, struct ib_ah_attr *attr)</div><div class='add'>+{</div><div class='add'>+	/* modify_ah is unsupported */</div><div class='add'>+	return -ENOSYS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_process_mad(struct ib_device *ibdev,</div><div class='add'>+		       int process_mad_flags,</div><div class='add'>+		       u8 port_num,</div><div class='add'>+		       struct ib_wc *in_wc,</div><div class='add'>+		       struct ib_grh *in_grh,</div><div class='add'>+		       struct ib_mad *in_mad, struct ib_mad *out_mad)</div><div class='add'>+{</div><div class='add'>+	return IB_MAD_RESULT_SUCCESS;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_ah.h b/drivers/infiniband/hw/ocrdma/ocrdma_ah.h<br/>new file mode 100644<br/>index 000000000000..8ac49e7f96d1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ocrdma/ocrdma_ah.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_ah.h</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+/*******************************************************************</div><div class='add'>+ * This file is part of the Emulex RoCE Device Driver for          *</div><div class='add'>+ * RoCE (RDMA over Converged Ethernet) adapters.                   *</div><div class='add'>+ * Copyright (C) 2008-2012 Emulex. All rights reserved.            *</div><div class='add'>+ * EMULEX and SLI are trademarks of Emulex.                        *</div><div class='add'>+ * www.emulex.com                                                  *</div><div class='add'>+ *                                                                 *</div><div class='add'>+ * This program is free software; you can redistribute it and/or   *</div><div class='add'>+ * modify it under the terms of version 2 of the GNU General       *</div><div class='add'>+ * Public License as published by the Free Software Foundation.    *</div><div class='add'>+ * This program is distributed in the hope that it will be useful. *</div><div class='add'>+ * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *</div><div class='add'>+ * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *</div><div class='add'>+ * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *</div><div class='add'>+ * TO BE LEGALLY INVALID.  See the GNU General Public License for  *</div><div class='add'>+ * more details, a copy of which can be found in the file COPYING  *</div><div class='add'>+ * included with this package.                                     *</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ * linux-drivers@emulex.com</div><div class='add'>+ *</div><div class='add'>+ * Emulex</div><div class='add'>+ * 3333 Susan Street</div><div class='add'>+ * Costa Mesa, CA 92626</div><div class='add'>+ *******************************************************************/</div><div class='add'>+</div><div class='add'>+#ifndef __OCRDMA_AH_H__</div><div class='add'>+#define __OCRDMA_AH_H__</div><div class='add'>+</div><div class='add'>+struct ib_ah *ocrdma_create_ah(struct ib_pd *, struct ib_ah_attr *);</div><div class='add'>+int ocrdma_destroy_ah(struct ib_ah *);</div><div class='add'>+int ocrdma_query_ah(struct ib_ah *, struct ib_ah_attr *);</div><div class='add'>+int ocrdma_modify_ah(struct ib_ah *, struct ib_ah_attr *);</div><div class='add'>+</div><div class='add'>+int ocrdma_process_mad(struct ib_device *,</div><div class='add'>+		       int process_mad_flags,</div><div class='add'>+		       u8 port_num,</div><div class='add'>+		       struct ib_wc *in_wc,</div><div class='add'>+		       struct ib_grh *in_grh,</div><div class='add'>+		       struct ib_mad *in_mad, struct ib_mad *out_mad);</div><div class='add'>+#endif				/* __OCRDMA_AH_H__ */</div><div class='head'>diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_hw.c b/drivers/infiniband/hw/ocrdma/ocrdma_hw.c<br/>new file mode 100644<br/>index 000000000000..9343a1522977<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ocrdma/ocrdma_hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_hw.c</a></div><div class='hunk'>@@ -0,0 +1,2633 @@</div><div class='add'>+/*******************************************************************</div><div class='add'>+ * This file is part of the Emulex RoCE Device Driver for          *</div><div class='add'>+ * RoCE (RDMA over Converged Ethernet) CNA Adapters.              *</div><div class='add'>+ * Copyright (C) 2008-2012 Emulex. All rights reserved.            *</div><div class='add'>+ * EMULEX and SLI are trademarks of Emulex.                        *</div><div class='add'>+ * www.emulex.com                                                  *</div><div class='add'>+ *                                                                 *</div><div class='add'>+ * This program is free software; you can redistribute it and/or   *</div><div class='add'>+ * modify it under the terms of version 2 of the GNU General       *</div><div class='add'>+ * Public License as published by the Free Software Foundation.    *</div><div class='add'>+ * This program is distributed in the hope that it will be useful. *</div><div class='add'>+ * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *</div><div class='add'>+ * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *</div><div class='add'>+ * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *</div><div class='add'>+ * TO BE LEGALLY INVALID.  See the GNU General Public License for  *</div><div class='add'>+ * more details, a copy of which can be found in the file COPYING  *</div><div class='add'>+ * included with this package.                                     *</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ * linux-drivers@emulex.com</div><div class='add'>+ *</div><div class='add'>+ * Emulex</div><div class='add'>+ * 3333 Susan Street</div><div class='add'>+ * Costa Mesa, CA 92626</div><div class='add'>+ *******************************************************************/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/log2.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;rdma/ib_verbs.h&gt;</div><div class='add'>+#include &lt;rdma/ib_user_verbs.h&gt;</div><div class='add'>+#include &lt;rdma/ib_addr.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ocrdma.h"</div><div class='add'>+#include "ocrdma_hw.h"</div><div class='add'>+#include "ocrdma_verbs.h"</div><div class='add'>+#include "ocrdma_ah.h"</div><div class='add'>+</div><div class='add'>+enum mbx_status {</div><div class='add'>+	OCRDMA_MBX_STATUS_FAILED		= 1,</div><div class='add'>+	OCRDMA_MBX_STATUS_ILLEGAL_FIELD		= 3,</div><div class='add'>+	OCRDMA_MBX_STATUS_OOR			= 100,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_PD		= 101,</div><div class='add'>+	OCRDMA_MBX_STATUS_PD_INUSE		= 102,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_CQ		= 103,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_QP		= 104,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_LKEY		= 105,</div><div class='add'>+	OCRDMA_MBX_STATUS_ORD_EXCEEDS		= 106,</div><div class='add'>+	OCRDMA_MBX_STATUS_IRD_EXCEEDS		= 107,</div><div class='add'>+	OCRDMA_MBX_STATUS_SENDQ_WQE_EXCEEDS	= 108,</div><div class='add'>+	OCRDMA_MBX_STATUS_RECVQ_RQE_EXCEEDS	= 109,</div><div class='add'>+	OCRDMA_MBX_STATUS_SGE_SEND_EXCEEDS	= 110,</div><div class='add'>+	OCRDMA_MBX_STATUS_SGE_WRITE_EXCEEDS	= 111,</div><div class='add'>+	OCRDMA_MBX_STATUS_SGE_RECV_EXCEEDS	= 112,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_STATE_CHANGE	= 113,</div><div class='add'>+	OCRDMA_MBX_STATUS_MW_BOUND		= 114,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_VA		= 115,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_LENGTH	= 116,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_FBO		= 117,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_ACC_RIGHTS	= 118,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_PBE_SIZE	= 119,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_PBL_ENTRY	= 120,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_PBL_SHIFT	= 121,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_SRQ_ID	= 129,</div><div class='add'>+	OCRDMA_MBX_STATUS_SRQ_ERROR		= 133,</div><div class='add'>+	OCRDMA_MBX_STATUS_RQE_EXCEEDS		= 134,</div><div class='add'>+	OCRDMA_MBX_STATUS_MTU_EXCEEDS		= 135,</div><div class='add'>+	OCRDMA_MBX_STATUS_MAX_QP_EXCEEDS	= 136,</div><div class='add'>+	OCRDMA_MBX_STATUS_SRQ_LIMIT_EXCEEDS	= 137,</div><div class='add'>+	OCRDMA_MBX_STATUS_SRQ_SIZE_UNDERUNS	= 138,</div><div class='add'>+	OCRDMA_MBX_STATUS_QP_BOUND		= 130,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_CHANGE	= 139,</div><div class='add'>+	OCRDMA_MBX_STATUS_ATOMIC_OPS_UNSUP	= 140,</div><div class='add'>+	OCRDMA_MBX_STATUS_INVALID_RNR_NAK_TIMER	= 141,</div><div class='add'>+	OCRDMA_MBX_STATUS_MW_STILL_BOUND	= 142,</div><div class='add'>+	OCRDMA_MBX_STATUS_PKEY_INDEX_INVALID	= 143,</div><div class='add'>+	OCRDMA_MBX_STATUS_PKEY_INDEX_EXCEEDS	= 144</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum additional_status {</div><div class='add'>+	OCRDMA_MBX_ADDI_STATUS_INSUFFICIENT_RESOURCES = 22</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum cqe_status {</div><div class='add'>+	OCRDMA_MBX_CQE_STATUS_INSUFFICIENT_PRIVILEDGES	= 1,</div><div class='add'>+	OCRDMA_MBX_CQE_STATUS_INVALID_PARAMETER		= 2,</div><div class='add'>+	OCRDMA_MBX_CQE_STATUS_INSUFFICIENT_RESOURCES	= 3,</div><div class='add'>+	OCRDMA_MBX_CQE_STATUS_QUEUE_FLUSHING		= 4,</div><div class='add'>+	OCRDMA_MBX_CQE_STATUS_DMA_FAILED		= 5</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void *ocrdma_get_eqe(struct ocrdma_eq *eq)</div><div class='add'>+{</div><div class='add'>+	return (u8 *)eq-&gt;q.va + (eq-&gt;q.tail * sizeof(struct ocrdma_eqe));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ocrdma_eq_inc_tail(struct ocrdma_eq *eq)</div><div class='add'>+{</div><div class='add'>+	eq-&gt;q.tail = (eq-&gt;q.tail + 1) &amp; (OCRDMA_EQ_LEN - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void *ocrdma_get_mcqe(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_mcqe *cqe = (struct ocrdma_mcqe *)</div><div class='add'>+	    ((u8 *) dev-&gt;mq.cq.va +</div><div class='add'>+	     (dev-&gt;mq.cq.tail * sizeof(struct ocrdma_mcqe)));</div><div class='add'>+</div><div class='add'>+	if (!(le32_to_cpu(cqe-&gt;valid_ae_cmpl_cons) &amp; OCRDMA_MCQE_VALID_MASK))</div><div class='add'>+		return NULL;</div><div class='add'>+	return cqe;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ocrdma_mcq_inc_tail(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;mq.cq.tail = (dev-&gt;mq.cq.tail + 1) &amp; (OCRDMA_MQ_CQ_LEN - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ocrdma_mqe *ocrdma_get_mqe(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	return (struct ocrdma_mqe *)((u8 *) dev-&gt;mq.sq.va +</div><div class='add'>+				     (dev-&gt;mq.sq.head *</div><div class='add'>+				      sizeof(struct ocrdma_mqe)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ocrdma_mq_inc_head(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;mq.sq.head = (dev-&gt;mq.sq.head + 1) &amp; (OCRDMA_MQ_LEN - 1);</div><div class='add'>+	atomic_inc(&amp;dev-&gt;mq.sq.used);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void *ocrdma_get_mqe_rsp(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	return (void *)((u8 *) dev-&gt;mq.sq.va +</div><div class='add'>+			(dev-&gt;mqe_ctx.tag * sizeof(struct ocrdma_mqe)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum ib_qp_state get_ibqp_state(enum ocrdma_qp_state qps)</div><div class='add'>+{</div><div class='add'>+	switch (qps) {</div><div class='add'>+	case OCRDMA_QPS_RST:</div><div class='add'>+		return IB_QPS_RESET;</div><div class='add'>+	case OCRDMA_QPS_INIT:</div><div class='add'>+		return IB_QPS_INIT;</div><div class='add'>+	case OCRDMA_QPS_RTR:</div><div class='add'>+		return IB_QPS_RTR;</div><div class='add'>+	case OCRDMA_QPS_RTS:</div><div class='add'>+		return IB_QPS_RTS;</div><div class='add'>+	case OCRDMA_QPS_SQD:</div><div class='add'>+	case OCRDMA_QPS_SQ_DRAINING:</div><div class='add'>+		return IB_QPS_SQD;</div><div class='add'>+	case OCRDMA_QPS_SQE:</div><div class='add'>+		return IB_QPS_SQE;</div><div class='add'>+	case OCRDMA_QPS_ERR:</div><div class='add'>+		return IB_QPS_ERR;</div><div class='add'>+	};</div><div class='add'>+	return IB_QPS_ERR;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum ocrdma_qp_state get_ocrdma_qp_state(enum ib_qp_state qps)</div><div class='add'>+{</div><div class='add'>+	switch (qps) {</div><div class='add'>+	case IB_QPS_RESET:</div><div class='add'>+		return OCRDMA_QPS_RST;</div><div class='add'>+	case IB_QPS_INIT:</div><div class='add'>+		return OCRDMA_QPS_INIT;</div><div class='add'>+	case IB_QPS_RTR:</div><div class='add'>+		return OCRDMA_QPS_RTR;</div><div class='add'>+	case IB_QPS_RTS:</div><div class='add'>+		return OCRDMA_QPS_RTS;</div><div class='add'>+	case IB_QPS_SQD:</div><div class='add'>+		return OCRDMA_QPS_SQD;</div><div class='add'>+	case IB_QPS_SQE:</div><div class='add'>+		return OCRDMA_QPS_SQE;</div><div class='add'>+	case IB_QPS_ERR:</div><div class='add'>+		return OCRDMA_QPS_ERR;</div><div class='add'>+	};</div><div class='add'>+	return OCRDMA_QPS_ERR;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_get_mbx_errno(u32 status)</div><div class='add'>+{</div><div class='add'>+	int err_num = -EFAULT;</div><div class='add'>+	u8 mbox_status = (status &amp; OCRDMA_MBX_RSP_STATUS_MASK) &gt;&gt;</div><div class='add'>+					OCRDMA_MBX_RSP_STATUS_SHIFT;</div><div class='add'>+	u8 add_status = (status &amp; OCRDMA_MBX_RSP_ASTATUS_MASK) &gt;&gt;</div><div class='add'>+					OCRDMA_MBX_RSP_ASTATUS_SHIFT;</div><div class='add'>+</div><div class='add'>+	switch (mbox_status) {</div><div class='add'>+	case OCRDMA_MBX_STATUS_OOR:</div><div class='add'>+	case OCRDMA_MBX_STATUS_MAX_QP_EXCEEDS:</div><div class='add'>+		err_num = -EAGAIN;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_PD:</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_CQ:</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_SRQ_ID:</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_QP:</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_CHANGE:</div><div class='add'>+	case OCRDMA_MBX_STATUS_MTU_EXCEEDS:</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_RNR_NAK_TIMER:</div><div class='add'>+	case OCRDMA_MBX_STATUS_PKEY_INDEX_INVALID:</div><div class='add'>+	case OCRDMA_MBX_STATUS_PKEY_INDEX_EXCEEDS:</div><div class='add'>+	case OCRDMA_MBX_STATUS_ILLEGAL_FIELD:</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_PBL_ENTRY:</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_LKEY:</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_VA:</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_LENGTH:</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_FBO:</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_ACC_RIGHTS:</div><div class='add'>+	case OCRDMA_MBX_STATUS_INVALID_PBE_SIZE:</div><div class='add'>+	case OCRDMA_MBX_STATUS_ATOMIC_OPS_UNSUP:</div><div class='add'>+	case OCRDMA_MBX_STATUS_SRQ_ERROR:</div><div class='add'>+	case OCRDMA_MBX_STATUS_SRQ_SIZE_UNDERUNS:</div><div class='add'>+		err_num = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case OCRDMA_MBX_STATUS_PD_INUSE:</div><div class='add'>+	case OCRDMA_MBX_STATUS_QP_BOUND:</div><div class='add'>+	case OCRDMA_MBX_STATUS_MW_STILL_BOUND:</div><div class='add'>+	case OCRDMA_MBX_STATUS_MW_BOUND:</div><div class='add'>+		err_num = -EBUSY;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case OCRDMA_MBX_STATUS_RECVQ_RQE_EXCEEDS:</div><div class='add'>+	case OCRDMA_MBX_STATUS_SGE_RECV_EXCEEDS:</div><div class='add'>+	case OCRDMA_MBX_STATUS_RQE_EXCEEDS:</div><div class='add'>+	case OCRDMA_MBX_STATUS_SRQ_LIMIT_EXCEEDS:</div><div class='add'>+	case OCRDMA_MBX_STATUS_ORD_EXCEEDS:</div><div class='add'>+	case OCRDMA_MBX_STATUS_IRD_EXCEEDS:</div><div class='add'>+	case OCRDMA_MBX_STATUS_SENDQ_WQE_EXCEEDS:</div><div class='add'>+	case OCRDMA_MBX_STATUS_SGE_SEND_EXCEEDS:</div><div class='add'>+	case OCRDMA_MBX_STATUS_SGE_WRITE_EXCEEDS:</div><div class='add'>+		err_num = -ENOBUFS;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case OCRDMA_MBX_STATUS_FAILED:</div><div class='add'>+		switch (add_status) {</div><div class='add'>+		case OCRDMA_MBX_ADDI_STATUS_INSUFFICIENT_RESOURCES:</div><div class='add'>+			err_num = -EAGAIN;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	default:</div><div class='add'>+		err_num = -EFAULT;</div><div class='add'>+	}</div><div class='add'>+	return err_num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_get_mbx_cqe_errno(u16 cqe_status)</div><div class='add'>+{</div><div class='add'>+	int err_num = -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (cqe_status) {</div><div class='add'>+	case OCRDMA_MBX_CQE_STATUS_INSUFFICIENT_PRIVILEDGES:</div><div class='add'>+		err_num = -EPERM;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_MBX_CQE_STATUS_INVALID_PARAMETER:</div><div class='add'>+		err_num = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_MBX_CQE_STATUS_INSUFFICIENT_RESOURCES:</div><div class='add'>+	case OCRDMA_MBX_CQE_STATUS_QUEUE_FLUSHING:</div><div class='add'>+		err_num = -EAGAIN;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_MBX_CQE_STATUS_DMA_FAILED:</div><div class='add'>+		err_num = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return err_num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ocrdma_ring_cq_db(struct ocrdma_dev *dev, u16 cq_id, bool armed,</div><div class='add'>+		       bool solicited, u16 cqe_popped)</div><div class='add'>+{</div><div class='add'>+	u32 val = cq_id &amp; OCRDMA_DB_CQ_RING_ID_MASK;</div><div class='add'>+</div><div class='add'>+	val |= ((cq_id &amp; OCRDMA_DB_CQ_RING_ID_EXT_MASK) &lt;&lt;</div><div class='add'>+	     OCRDMA_DB_CQ_RING_ID_EXT_MASK_SHIFT);</div><div class='add'>+</div><div class='add'>+	if (armed)</div><div class='add'>+		val |= (1 &lt;&lt; OCRDMA_DB_CQ_REARM_SHIFT);</div><div class='add'>+	if (solicited)</div><div class='add'>+		val |= (1 &lt;&lt; OCRDMA_DB_CQ_SOLICIT_SHIFT);</div><div class='add'>+	val |= (cqe_popped &lt;&lt; OCRDMA_DB_CQ_NUM_POPPED_SHIFT);</div><div class='add'>+	iowrite32(val, dev-&gt;nic_info.db + OCRDMA_DB_CQ_OFFSET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_ring_mq_db(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	val |= dev-&gt;mq.sq.id &amp; OCRDMA_MQ_ID_MASK;</div><div class='add'>+	val |= 1 &lt;&lt; OCRDMA_MQ_NUM_MQE_SHIFT;</div><div class='add'>+	iowrite32(val, dev-&gt;nic_info.db + OCRDMA_DB_MQ_OFFSET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_ring_eq_db(struct ocrdma_dev *dev, u16 eq_id,</div><div class='add'>+			      bool arm, bool clear_int, u16 num_eqe)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	val |= eq_id &amp; OCRDMA_EQ_ID_MASK;</div><div class='add'>+	val |= ((eq_id &amp; OCRDMA_EQ_ID_EXT_MASK) &lt;&lt; OCRDMA_EQ_ID_EXT_MASK_SHIFT);</div><div class='add'>+	if (arm)</div><div class='add'>+		val |= (1 &lt;&lt; OCRDMA_REARM_SHIFT);</div><div class='add'>+	if (clear_int)</div><div class='add'>+		val |= (1 &lt;&lt; OCRDMA_EQ_CLR_SHIFT);</div><div class='add'>+	val |= (1 &lt;&lt; OCRDMA_EQ_TYPE_SHIFT);</div><div class='add'>+	val |= (num_eqe &lt;&lt; OCRDMA_NUM_EQE_SHIFT);</div><div class='add'>+	iowrite32(val, dev-&gt;nic_info.db + OCRDMA_DB_EQ_OFFSET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_init_mch(struct ocrdma_mbx_hdr *cmd_hdr,</div><div class='add'>+			    u8 opcode, u8 subsys, u32 cmd_len)</div><div class='add'>+{</div><div class='add'>+	cmd_hdr-&gt;subsys_op = (opcode | (subsys &lt;&lt; OCRDMA_MCH_SUBSYS_SHIFT));</div><div class='add'>+	cmd_hdr-&gt;timeout = 20; /* seconds */</div><div class='add'>+	cmd_hdr-&gt;cmd_len = cmd_len - sizeof(struct ocrdma_mbx_hdr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *ocrdma_init_emb_mqe(u8 opcode, u32 cmd_len)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_mqe *mqe;</div><div class='add'>+</div><div class='add'>+	mqe = kzalloc(sizeof(struct ocrdma_mqe), GFP_KERNEL);</div><div class='add'>+	if (!mqe)</div><div class='add'>+		return NULL;</div><div class='add'>+	mqe-&gt;hdr.spcl_sge_cnt_emb |=</div><div class='add'>+		(OCRDMA_MQE_EMBEDDED &lt;&lt; OCRDMA_MQE_HDR_EMB_SHIFT) &amp;</div><div class='add'>+					OCRDMA_MQE_HDR_EMB_MASK;</div><div class='add'>+	mqe-&gt;hdr.pyld_len = cmd_len - sizeof(struct ocrdma_mqe_hdr);</div><div class='add'>+</div><div class='add'>+	ocrdma_init_mch(&amp;mqe-&gt;u.emb_req.mch, opcode, OCRDMA_SUBSYS_ROCE,</div><div class='add'>+			mqe-&gt;hdr.pyld_len);</div><div class='add'>+	return mqe;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_free_q(struct ocrdma_dev *dev, struct ocrdma_queue_info *q)</div><div class='add'>+{</div><div class='add'>+	dma_free_coherent(&amp;dev-&gt;nic_info.pdev-&gt;dev, q-&gt;size, q-&gt;va, q-&gt;dma);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_alloc_q(struct ocrdma_dev *dev,</div><div class='add'>+			  struct ocrdma_queue_info *q, u16 len, u16 entry_size)</div><div class='add'>+{</div><div class='add'>+	memset(q, 0, sizeof(*q));</div><div class='add'>+	q-&gt;len = len;</div><div class='add'>+	q-&gt;entry_size = entry_size;</div><div class='add'>+	q-&gt;size = len * entry_size;</div><div class='add'>+	q-&gt;va = dma_alloc_coherent(&amp;dev-&gt;nic_info.pdev-&gt;dev, q-&gt;size,</div><div class='add'>+				   &amp;q-&gt;dma, GFP_KERNEL);</div><div class='add'>+	if (!q-&gt;va)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	memset(q-&gt;va, 0, q-&gt;size);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_build_q_pages(struct ocrdma_pa *q_pa, int cnt,</div><div class='add'>+					dma_addr_t host_pa, int hw_page_size)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; cnt; i++) {</div><div class='add'>+		q_pa[i].lo = (u32) (host_pa &amp; 0xffffffff);</div><div class='add'>+		q_pa[i].hi = (u32) upper_32_bits(host_pa);</div><div class='add'>+		host_pa += hw_page_size;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_assign_eq_vect_gen2(struct ocrdma_dev *dev,</div><div class='add'>+				       struct ocrdma_eq *eq)</div><div class='add'>+{</div><div class='add'>+	/* assign vector and update vector id for next EQ */</div><div class='add'>+	eq-&gt;vector = dev-&gt;nic_info.msix.start_vector;</div><div class='add'>+	dev-&gt;nic_info.msix.start_vector += 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_free_eq_vect_gen2(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	/* this assumes that EQs are freed in exactly reverse order</div><div class='add'>+	 * as its allocation.</div><div class='add'>+	 */</div><div class='add'>+	dev-&gt;nic_info.msix.start_vector -= 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_mbx_delete_q(struct ocrdma_dev *dev, struct ocrdma_queue_info *q,</div><div class='add'>+			       int queue_type)</div><div class='add'>+{</div><div class='add'>+	u8 opcode = 0;</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_delete_q_req *cmd = dev-&gt;mbx_cmd;</div><div class='add'>+</div><div class='add'>+	switch (queue_type) {</div><div class='add'>+	case QTYPE_MCCQ:</div><div class='add'>+		opcode = OCRDMA_CMD_DELETE_MQ;</div><div class='add'>+		break;</div><div class='add'>+	case QTYPE_CQ:</div><div class='add'>+		opcode = OCRDMA_CMD_DELETE_CQ;</div><div class='add'>+		break;</div><div class='add'>+	case QTYPE_EQ:</div><div class='add'>+		opcode = OCRDMA_CMD_DELETE_EQ;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+	memset(cmd, 0, sizeof(*cmd));</div><div class='add'>+	ocrdma_init_mch(&amp;cmd-&gt;req, opcode, OCRDMA_SUBSYS_COMMON, sizeof(*cmd));</div><div class='add'>+	cmd-&gt;id = q-&gt;id;</div><div class='add'>+</div><div class='add'>+	status = be_roce_mcc_cmd(dev-&gt;nic_info.netdev,</div><div class='add'>+				 cmd, sizeof(*cmd), NULL, NULL);</div><div class='add'>+	if (!status)</div><div class='add'>+		q-&gt;created = false;</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_mbx_create_eq(struct ocrdma_dev *dev, struct ocrdma_eq *eq)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_create_eq_req *cmd = dev-&gt;mbx_cmd;</div><div class='add'>+	struct ocrdma_create_eq_rsp *rsp = dev-&gt;mbx_cmd;</div><div class='add'>+</div><div class='add'>+	memset(cmd, 0, sizeof(*cmd));</div><div class='add'>+	ocrdma_init_mch(&amp;cmd-&gt;req, OCRDMA_CMD_CREATE_EQ, OCRDMA_SUBSYS_COMMON,</div><div class='add'>+			sizeof(*cmd));</div><div class='add'>+	if (dev-&gt;nic_info.dev_family == OCRDMA_GEN2_FAMILY)</div><div class='add'>+		cmd-&gt;req.rsvd_version = 0;</div><div class='add'>+	else</div><div class='add'>+		cmd-&gt;req.rsvd_version = 2;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;num_pages = 4;</div><div class='add'>+	cmd-&gt;valid = OCRDMA_CREATE_EQ_VALID;</div><div class='add'>+	cmd-&gt;cnt = 4 &lt;&lt; OCRDMA_CREATE_EQ_CNT_SHIFT;</div><div class='add'>+</div><div class='add'>+	ocrdma_build_q_pages(&amp;cmd-&gt;pa[0], cmd-&gt;num_pages, eq-&gt;q.dma,</div><div class='add'>+			     PAGE_SIZE_4K);</div><div class='add'>+	status = be_roce_mcc_cmd(dev-&gt;nic_info.netdev, cmd, sizeof(*cmd), NULL,</div><div class='add'>+				 NULL);</div><div class='add'>+	if (!status) {</div><div class='add'>+		eq-&gt;q.id = rsp-&gt;vector_eqid &amp; 0xffff;</div><div class='add'>+		if (dev-&gt;nic_info.dev_family == OCRDMA_GEN2_FAMILY)</div><div class='add'>+			ocrdma_assign_eq_vect_gen2(dev, eq);</div><div class='add'>+		else {</div><div class='add'>+			eq-&gt;vector = (rsp-&gt;vector_eqid &gt;&gt; 16) &amp; 0xffff;</div><div class='add'>+			dev-&gt;nic_info.msix.start_vector += 1;</div><div class='add'>+		}</div><div class='add'>+		eq-&gt;q.created = true;</div><div class='add'>+	}</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_create_eq(struct ocrdma_dev *dev,</div><div class='add'>+			    struct ocrdma_eq *eq, u16 q_len)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_alloc_q(dev, &amp;eq-&gt;q, OCRDMA_EQ_LEN,</div><div class='add'>+				sizeof(struct ocrdma_eqe));</div><div class='add'>+	if (status)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_mbx_create_eq(dev, eq);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	eq-&gt;dev = dev;</div><div class='add'>+	ocrdma_ring_eq_db(dev, eq-&gt;q.id, true, true, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+mbx_err:</div><div class='add'>+	ocrdma_free_q(dev, &amp;eq-&gt;q);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_get_irq(struct ocrdma_dev *dev, struct ocrdma_eq *eq)</div><div class='add'>+{</div><div class='add'>+	int irq;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;nic_info.intr_mode == BE_INTERRUPT_MODE_INTX)</div><div class='add'>+		irq = dev-&gt;nic_info.pdev-&gt;irq;</div><div class='add'>+	else</div><div class='add'>+		irq = dev-&gt;nic_info.msix.vector_list[eq-&gt;vector];</div><div class='add'>+	return irq;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void _ocrdma_destroy_eq(struct ocrdma_dev *dev, struct ocrdma_eq *eq)</div><div class='add'>+{</div><div class='add'>+	if (eq-&gt;q.created) {</div><div class='add'>+		ocrdma_mbx_delete_q(dev, &amp;eq-&gt;q, QTYPE_EQ);</div><div class='add'>+		if (dev-&gt;nic_info.dev_family == OCRDMA_GEN2_FAMILY)</div><div class='add'>+			ocrdma_free_eq_vect_gen2(dev);</div><div class='add'>+		ocrdma_free_q(dev, &amp;eq-&gt;q);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_destroy_eq(struct ocrdma_dev *dev, struct ocrdma_eq *eq)</div><div class='add'>+{</div><div class='add'>+	int irq;</div><div class='add'>+</div><div class='add'>+	/* disarm EQ so that interrupts are not generated</div><div class='add'>+	 * during freeing and EQ delete is in progress.</div><div class='add'>+	 */</div><div class='add'>+	ocrdma_ring_eq_db(dev, eq-&gt;q.id, false, false, 0);</div><div class='add'>+</div><div class='add'>+	irq = ocrdma_get_irq(dev, eq);</div><div class='add'>+	free_irq(irq, eq);</div><div class='add'>+	_ocrdma_destroy_eq(dev, eq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_destroy_qp_eqs(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* deallocate the data path eqs */</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;eq_cnt; i++)</div><div class='add'>+		ocrdma_destroy_eq(dev, &amp;dev-&gt;qp_eq_tbl[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_mbx_mq_cq_create(struct ocrdma_dev *dev,</div><div class='add'>+				   struct ocrdma_queue_info *cq,</div><div class='add'>+				   struct ocrdma_queue_info *eq)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_create_cq_cmd *cmd = dev-&gt;mbx_cmd;</div><div class='add'>+	struct ocrdma_create_cq_cmd_rsp *rsp = dev-&gt;mbx_cmd;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	memset(cmd, 0, sizeof(*cmd));</div><div class='add'>+	ocrdma_init_mch(&amp;cmd-&gt;req, OCRDMA_CMD_CREATE_CQ,</div><div class='add'>+			OCRDMA_SUBSYS_COMMON, sizeof(*cmd));</div><div class='add'>+</div><div class='add'>+	cmd-&gt;pgsz_pgcnt = PAGES_4K_SPANNED(cq-&gt;va, cq-&gt;size);</div><div class='add'>+	cmd-&gt;ev_cnt_flags = OCRDMA_CREATE_CQ_DEF_FLAGS;</div><div class='add'>+	cmd-&gt;eqn = (eq-&gt;id &lt;&lt; OCRDMA_CREATE_CQ_EQID_SHIFT);</div><div class='add'>+</div><div class='add'>+	ocrdma_build_q_pages(&amp;cmd-&gt;pa[0], cmd-&gt;pgsz_pgcnt,</div><div class='add'>+			     cq-&gt;dma, PAGE_SIZE_4K);</div><div class='add'>+	status = be_roce_mcc_cmd(dev-&gt;nic_info.netdev,</div><div class='add'>+				 cmd, sizeof(*cmd), NULL, NULL);</div><div class='add'>+	if (!status) {</div><div class='add'>+		cq-&gt;id = (rsp-&gt;cq_id &amp; OCRDMA_CREATE_CQ_RSP_CQ_ID_MASK);</div><div class='add'>+		cq-&gt;created = true;</div><div class='add'>+	}</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 ocrdma_encoded_q_len(int q_len)</div><div class='add'>+{</div><div class='add'>+	u32 len_encoded = fls(q_len);	/* log2(len) + 1 */</div><div class='add'>+</div><div class='add'>+	if (len_encoded == 16)</div><div class='add'>+		len_encoded = 0;</div><div class='add'>+	return len_encoded;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_mbx_create_mq(struct ocrdma_dev *dev,</div><div class='add'>+				struct ocrdma_queue_info *mq,</div><div class='add'>+				struct ocrdma_queue_info *cq)</div><div class='add'>+{</div><div class='add'>+	int num_pages, status;</div><div class='add'>+	struct ocrdma_create_mq_req *cmd = dev-&gt;mbx_cmd;</div><div class='add'>+	struct ocrdma_create_mq_rsp *rsp = dev-&gt;mbx_cmd;</div><div class='add'>+	struct ocrdma_pa *pa;</div><div class='add'>+</div><div class='add'>+	memset(cmd, 0, sizeof(*cmd));</div><div class='add'>+	num_pages = PAGES_4K_SPANNED(mq-&gt;va, mq-&gt;size);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;nic_info.dev_family == OCRDMA_GEN2_FAMILY) {</div><div class='add'>+		ocrdma_init_mch(&amp;cmd-&gt;req, OCRDMA_CMD_CREATE_MQ,</div><div class='add'>+				OCRDMA_SUBSYS_COMMON, sizeof(*cmd));</div><div class='add'>+		cmd-&gt;v0.pages = num_pages;</div><div class='add'>+		cmd-&gt;v0.async_cqid_valid = OCRDMA_CREATE_MQ_ASYNC_CQ_VALID;</div><div class='add'>+		cmd-&gt;v0.async_cqid_valid = (cq-&gt;id &lt;&lt; 1);</div><div class='add'>+		cmd-&gt;v0.cqid_ringsize |= (ocrdma_encoded_q_len(mq-&gt;len) &lt;&lt;</div><div class='add'>+					     OCRDMA_CREATE_MQ_RING_SIZE_SHIFT);</div><div class='add'>+		cmd-&gt;v0.cqid_ringsize |=</div><div class='add'>+			(cq-&gt;id &lt;&lt; OCRDMA_CREATE_MQ_V0_CQ_ID_SHIFT);</div><div class='add'>+		cmd-&gt;v0.valid = OCRDMA_CREATE_MQ_VALID;</div><div class='add'>+		pa = &amp;cmd-&gt;v0.pa[0];</div><div class='add'>+	} else {</div><div class='add'>+		ocrdma_init_mch(&amp;cmd-&gt;req, OCRDMA_CMD_CREATE_MQ_EXT,</div><div class='add'>+				OCRDMA_SUBSYS_COMMON, sizeof(*cmd));</div><div class='add'>+		cmd-&gt;req.rsvd_version = 1;</div><div class='add'>+		cmd-&gt;v1.cqid_pages = num_pages;</div><div class='add'>+		cmd-&gt;v1.cqid_pages |= (cq-&gt;id &lt;&lt; OCRDMA_CREATE_MQ_CQ_ID_SHIFT);</div><div class='add'>+		cmd-&gt;v1.async_cqid_valid = OCRDMA_CREATE_MQ_ASYNC_CQ_VALID;</div><div class='add'>+		cmd-&gt;v1.async_event_bitmap = Bit(20);</div><div class='add'>+		cmd-&gt;v1.async_cqid_ringsize = cq-&gt;id;</div><div class='add'>+		cmd-&gt;v1.async_cqid_ringsize |= (ocrdma_encoded_q_len(mq-&gt;len) &lt;&lt;</div><div class='add'>+					     OCRDMA_CREATE_MQ_RING_SIZE_SHIFT);</div><div class='add'>+		cmd-&gt;v1.valid = OCRDMA_CREATE_MQ_VALID;</div><div class='add'>+		pa = &amp;cmd-&gt;v1.pa[0];</div><div class='add'>+	}</div><div class='add'>+	ocrdma_build_q_pages(pa, num_pages, mq-&gt;dma, PAGE_SIZE_4K);</div><div class='add'>+	status = be_roce_mcc_cmd(dev-&gt;nic_info.netdev,</div><div class='add'>+				 cmd, sizeof(*cmd), NULL, NULL);</div><div class='add'>+	if (!status) {</div><div class='add'>+		mq-&gt;id = rsp-&gt;id;</div><div class='add'>+		mq-&gt;created = true;</div><div class='add'>+	}</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_create_mq(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	/* Alloc completion queue for Mailbox queue */</div><div class='add'>+	status = ocrdma_alloc_q(dev, &amp;dev-&gt;mq.cq, OCRDMA_MQ_CQ_LEN,</div><div class='add'>+				sizeof(struct ocrdma_mcqe));</div><div class='add'>+	if (status)</div><div class='add'>+		goto alloc_err;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_mbx_mq_cq_create(dev, &amp;dev-&gt;mq.cq, &amp;dev-&gt;meq.q);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_cq_free;</div><div class='add'>+</div><div class='add'>+	memset(&amp;dev-&gt;mqe_ctx, 0, sizeof(dev-&gt;mqe_ctx));</div><div class='add'>+	init_waitqueue_head(&amp;dev-&gt;mqe_ctx.cmd_wait);</div><div class='add'>+	mutex_init(&amp;dev-&gt;mqe_ctx.lock);</div><div class='add'>+</div><div class='add'>+	/* Alloc Mailbox queue */</div><div class='add'>+	status = ocrdma_alloc_q(dev, &amp;dev-&gt;mq.sq, OCRDMA_MQ_LEN,</div><div class='add'>+				sizeof(struct ocrdma_mqe));</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_cq_destroy;</div><div class='add'>+	status = ocrdma_mbx_create_mq(dev, &amp;dev-&gt;mq.sq, &amp;dev-&gt;mq.cq);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_q_free;</div><div class='add'>+	ocrdma_ring_cq_db(dev, dev-&gt;mq.cq.id, true, false, 0);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+mbx_q_free:</div><div class='add'>+	ocrdma_free_q(dev, &amp;dev-&gt;mq.sq);</div><div class='add'>+mbx_cq_destroy:</div><div class='add'>+	ocrdma_mbx_delete_q(dev, &amp;dev-&gt;mq.cq, QTYPE_CQ);</div><div class='add'>+mbx_cq_free:</div><div class='add'>+	ocrdma_free_q(dev, &amp;dev-&gt;mq.cq);</div><div class='add'>+alloc_err:</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_destroy_mq(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_queue_info *mbxq, *cq;</div><div class='add'>+</div><div class='add'>+	/* mqe_ctx lock synchronizes with any other pending cmds. */</div><div class='add'>+	mutex_lock(&amp;dev-&gt;mqe_ctx.lock);</div><div class='add'>+	mbxq = &amp;dev-&gt;mq.sq;</div><div class='add'>+	if (mbxq-&gt;created) {</div><div class='add'>+		ocrdma_mbx_delete_q(dev, mbxq, QTYPE_MCCQ);</div><div class='add'>+		ocrdma_free_q(dev, mbxq);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;mqe_ctx.lock);</div><div class='add'>+</div><div class='add'>+	cq = &amp;dev-&gt;mq.cq;</div><div class='add'>+	if (cq-&gt;created) {</div><div class='add'>+		ocrdma_mbx_delete_q(dev, cq, QTYPE_CQ);</div><div class='add'>+		ocrdma_free_q(dev, cq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_process_qpcat_error(struct ocrdma_dev *dev,</div><div class='add'>+				       struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	enum ib_qp_state new_ib_qps = IB_QPS_ERR;</div><div class='add'>+	enum ib_qp_state old_ib_qps;</div><div class='add'>+</div><div class='add'>+	if (qp == NULL)</div><div class='add'>+		BUG();</div><div class='add'>+	ocrdma_qp_state_machine(qp, new_ib_qps, &amp;old_ib_qps);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_dispatch_ibevent(struct ocrdma_dev *dev,</div><div class='add'>+				    struct ocrdma_ae_mcqe *cqe)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_qp *qp = NULL;</div><div class='add'>+	struct ocrdma_cq *cq = NULL;</div><div class='add'>+	struct ib_event ib_evt;</div><div class='add'>+	int cq_event = 0;</div><div class='add'>+	int qp_event = 1;</div><div class='add'>+	int srq_event = 0;</div><div class='add'>+	int dev_event = 0;</div><div class='add'>+	int type = (cqe-&gt;valid_ae_event &amp; OCRDMA_AE_MCQE_EVENT_TYPE_MASK) &gt;&gt;</div><div class='add'>+	    OCRDMA_AE_MCQE_EVENT_TYPE_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (cqe-&gt;qpvalid_qpid &amp; OCRDMA_AE_MCQE_QPVALID)</div><div class='add'>+		qp = dev-&gt;qp_tbl[cqe-&gt;qpvalid_qpid &amp; OCRDMA_AE_MCQE_QPID_MASK];</div><div class='add'>+	if (cqe-&gt;cqvalid_cqid &amp; OCRDMA_AE_MCQE_CQVALID)</div><div class='add'>+		cq = dev-&gt;cq_tbl[cqe-&gt;cqvalid_cqid &amp; OCRDMA_AE_MCQE_CQID_MASK];</div><div class='add'>+</div><div class='add'>+	ib_evt.device = &amp;dev-&gt;ibdev;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case OCRDMA_CQ_ERROR:</div><div class='add'>+		ib_evt.element.cq = &amp;cq-&gt;ibcq;</div><div class='add'>+		ib_evt.event = IB_EVENT_CQ_ERR;</div><div class='add'>+		cq_event = 1;</div><div class='add'>+		qp_event = 0;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQ_OVERRUN_ERROR:</div><div class='add'>+		ib_evt.element.cq = &amp;cq-&gt;ibcq;</div><div class='add'>+		ib_evt.event = IB_EVENT_CQ_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQ_QPCAT_ERROR:</div><div class='add'>+		ib_evt.element.qp = &amp;qp-&gt;ibqp;</div><div class='add'>+		ib_evt.event = IB_EVENT_QP_FATAL;</div><div class='add'>+		ocrdma_process_qpcat_error(dev, qp);</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_QP_ACCESS_ERROR:</div><div class='add'>+		ib_evt.element.qp = &amp;qp-&gt;ibqp;</div><div class='add'>+		ib_evt.event = IB_EVENT_QP_ACCESS_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_QP_COMM_EST_EVENT:</div><div class='add'>+		ib_evt.element.qp = &amp;qp-&gt;ibqp;</div><div class='add'>+		ib_evt.event = IB_EVENT_COMM_EST;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_SQ_DRAINED_EVENT:</div><div class='add'>+		ib_evt.element.qp = &amp;qp-&gt;ibqp;</div><div class='add'>+		ib_evt.event = IB_EVENT_SQ_DRAINED;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_DEVICE_FATAL_EVENT:</div><div class='add'>+		ib_evt.element.port_num = 1;</div><div class='add'>+		ib_evt.event = IB_EVENT_DEVICE_FATAL;</div><div class='add'>+		qp_event = 0;</div><div class='add'>+		dev_event = 1;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_SRQCAT_ERROR:</div><div class='add'>+		ib_evt.element.srq = &amp;qp-&gt;srq-&gt;ibsrq;</div><div class='add'>+		ib_evt.event = IB_EVENT_SRQ_ERR;</div><div class='add'>+		srq_event = 1;</div><div class='add'>+		qp_event = 0;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_SRQ_LIMIT_EVENT:</div><div class='add'>+		ib_evt.element.srq = &amp;qp-&gt;srq-&gt;ibsrq;</div><div class='add'>+		ib_evt.event = IB_EVENT_SRQ_LIMIT_REACHED;</div><div class='add'>+		srq_event = 1;</div><div class='add'>+		qp_event = 0;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_QP_LAST_WQE_EVENT:</div><div class='add'>+		ib_evt.element.qp = &amp;qp-&gt;ibqp;</div><div class='add'>+		ib_evt.event = IB_EVENT_QP_LAST_WQE_REACHED;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		cq_event = 0;</div><div class='add'>+		qp_event = 0;</div><div class='add'>+		srq_event = 0;</div><div class='add'>+		dev_event = 0;</div><div class='add'>+		ocrdma_err("%s() unknown type=0x%x\n", __func__, type);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (qp_event) {</div><div class='add'>+		if (qp-&gt;ibqp.event_handler)</div><div class='add'>+			qp-&gt;ibqp.event_handler(&amp;ib_evt, qp-&gt;ibqp.qp_context);</div><div class='add'>+	} else if (cq_event) {</div><div class='add'>+		if (cq-&gt;ibcq.event_handler)</div><div class='add'>+			cq-&gt;ibcq.event_handler(&amp;ib_evt, cq-&gt;ibcq.cq_context);</div><div class='add'>+	} else if (srq_event) {</div><div class='add'>+		if (qp-&gt;srq-&gt;ibsrq.event_handler)</div><div class='add'>+			qp-&gt;srq-&gt;ibsrq.event_handler(&amp;ib_evt,</div><div class='add'>+						     qp-&gt;srq-&gt;ibsrq.</div><div class='add'>+						     srq_context);</div><div class='add'>+	} else if (dev_event)</div><div class='add'>+		ib_dispatch_event(&amp;ib_evt);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_process_acqe(struct ocrdma_dev *dev, void *ae_cqe)</div><div class='add'>+{</div><div class='add'>+	/* async CQE processing */</div><div class='add'>+	struct ocrdma_ae_mcqe *cqe = ae_cqe;</div><div class='add'>+	u32 evt_code = (cqe-&gt;valid_ae_event &amp; OCRDMA_AE_MCQE_EVENT_CODE_MASK) &gt;&gt;</div><div class='add'>+			OCRDMA_AE_MCQE_EVENT_CODE_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (evt_code == OCRDMA_ASYNC_EVE_CODE)</div><div class='add'>+		ocrdma_dispatch_ibevent(dev, cqe);</div><div class='add'>+	else</div><div class='add'>+		ocrdma_err("%s(%d) invalid evt code=0x%x\n",</div><div class='add'>+			   __func__, dev-&gt;id, evt_code);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_process_mcqe(struct ocrdma_dev *dev, struct ocrdma_mcqe *cqe)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;mqe_ctx.tag == cqe-&gt;tag_lo &amp;&amp; dev-&gt;mqe_ctx.cmd_done == false) {</div><div class='add'>+		dev-&gt;mqe_ctx.cqe_status = (cqe-&gt;status &amp;</div><div class='add'>+		     OCRDMA_MCQE_STATUS_MASK) &gt;&gt; OCRDMA_MCQE_STATUS_SHIFT;</div><div class='add'>+		dev-&gt;mqe_ctx.ext_status =</div><div class='add'>+		    (cqe-&gt;status &amp; OCRDMA_MCQE_ESTATUS_MASK)</div><div class='add'>+		    &gt;&gt; OCRDMA_MCQE_ESTATUS_SHIFT;</div><div class='add'>+		dev-&gt;mqe_ctx.cmd_done = true;</div><div class='add'>+		wake_up(&amp;dev-&gt;mqe_ctx.cmd_wait);</div><div class='add'>+	} else</div><div class='add'>+		ocrdma_err("%s() cqe for invalid tag0x%x.expected=0x%x\n",</div><div class='add'>+			   __func__, cqe-&gt;tag_lo, dev-&gt;mqe_ctx.tag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_mq_cq_handler(struct ocrdma_dev *dev, u16 cq_id)</div><div class='add'>+{</div><div class='add'>+	u16 cqe_popped = 0;</div><div class='add'>+	struct ocrdma_mcqe *cqe;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		cqe = ocrdma_get_mcqe(dev);</div><div class='add'>+		if (cqe == NULL)</div><div class='add'>+			break;</div><div class='add'>+		ocrdma_le32_to_cpu(cqe, sizeof(*cqe));</div><div class='add'>+		cqe_popped += 1;</div><div class='add'>+		if (cqe-&gt;valid_ae_cmpl_cons &amp; OCRDMA_MCQE_AE_MASK)</div><div class='add'>+			ocrdma_process_acqe(dev, cqe);</div><div class='add'>+		else if (cqe-&gt;valid_ae_cmpl_cons &amp; OCRDMA_MCQE_CMPL_MASK)</div><div class='add'>+			ocrdma_process_mcqe(dev, cqe);</div><div class='add'>+		else</div><div class='add'>+			ocrdma_err("%s() cqe-&gt;compl is not set.\n", __func__);</div><div class='add'>+		memset(cqe, 0, sizeof(struct ocrdma_mcqe));</div><div class='add'>+		ocrdma_mcq_inc_tail(dev);</div><div class='add'>+	}</div><div class='add'>+	ocrdma_ring_cq_db(dev, dev-&gt;mq.cq.id, true, false, cqe_popped);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_qp_buddy_cq_handler(struct ocrdma_dev *dev,</div><div class='add'>+				       struct ocrdma_cq *cq)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ocrdma_qp *qp;</div><div class='add'>+	bool buddy_cq_found = false;</div><div class='add'>+	/* Go through list of QPs in error state which are using this CQ</div><div class='add'>+	 * and invoke its callback handler to trigger CQE processing for</div><div class='add'>+	 * error/flushed CQE. It is rare to find more than few entries in</div><div class='add'>+	 * this list as most consumers stops after getting error CQE.</div><div class='add'>+	 * List is traversed only once when a matching buddy cq found for a QP.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;dev-&gt;flush_q_lock, flags);</div><div class='add'>+	list_for_each_entry(qp, &amp;cq-&gt;sq_head, sq_entry) {</div><div class='add'>+		if (qp-&gt;srq)</div><div class='add'>+			continue;</div><div class='add'>+		/* if wq and rq share the same cq, than comp_handler</div><div class='add'>+		 * is already invoked.</div><div class='add'>+		 */</div><div class='add'>+		if (qp-&gt;sq_cq == qp-&gt;rq_cq)</div><div class='add'>+			continue;</div><div class='add'>+		/* if completion came on sq, rq's cq is buddy cq.</div><div class='add'>+		 * if completion came on rq, sq's cq is buddy cq.</div><div class='add'>+		 */</div><div class='add'>+		if (qp-&gt;sq_cq == cq)</div><div class='add'>+			cq = qp-&gt;rq_cq;</div><div class='add'>+		else</div><div class='add'>+			cq = qp-&gt;sq_cq;</div><div class='add'>+		buddy_cq_found = true;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev-&gt;flush_q_lock, flags);</div><div class='add'>+	if (buddy_cq_found == false)</div><div class='add'>+		return;</div><div class='add'>+	if (cq-&gt;ibcq.comp_handler) {</div><div class='add'>+		spin_lock_irqsave(&amp;cq-&gt;comp_handler_lock, flags);</div><div class='add'>+		(*cq-&gt;ibcq.comp_handler) (&amp;cq-&gt;ibcq, cq-&gt;ibcq.cq_context);</div><div class='add'>+		spin_unlock_irqrestore(&amp;cq-&gt;comp_handler_lock, flags);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_qp_cq_handler(struct ocrdma_dev *dev, u16 cq_idx)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ocrdma_cq *cq;</div><div class='add'>+</div><div class='add'>+	if (cq_idx &gt;= OCRDMA_MAX_CQ)</div><div class='add'>+		BUG();</div><div class='add'>+</div><div class='add'>+	cq = dev-&gt;cq_tbl[cq_idx];</div><div class='add'>+	if (cq == NULL) {</div><div class='add'>+		ocrdma_err("%s%d invalid id=0x%x\n", __func__, dev-&gt;id, cq_idx);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	spin_lock_irqsave(&amp;cq-&gt;cq_lock, flags);</div><div class='add'>+	cq-&gt;armed = false;</div><div class='add'>+	cq-&gt;solicited = false;</div><div class='add'>+	spin_unlock_irqrestore(&amp;cq-&gt;cq_lock, flags);</div><div class='add'>+</div><div class='add'>+	ocrdma_ring_cq_db(dev, cq-&gt;id, false, false, 0);</div><div class='add'>+</div><div class='add'>+	if (cq-&gt;ibcq.comp_handler) {</div><div class='add'>+		spin_lock_irqsave(&amp;cq-&gt;comp_handler_lock, flags);</div><div class='add'>+		(*cq-&gt;ibcq.comp_handler) (&amp;cq-&gt;ibcq, cq-&gt;ibcq.cq_context);</div><div class='add'>+		spin_unlock_irqrestore(&amp;cq-&gt;comp_handler_lock, flags);</div><div class='add'>+	}</div><div class='add'>+	ocrdma_qp_buddy_cq_handler(dev, cq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_cq_handler(struct ocrdma_dev *dev, u16 cq_id)</div><div class='add'>+{</div><div class='add'>+	/* process the MQ-CQE. */</div><div class='add'>+	if (cq_id == dev-&gt;mq.cq.id)</div><div class='add'>+		ocrdma_mq_cq_handler(dev, cq_id);</div><div class='add'>+	else</div><div class='add'>+		ocrdma_qp_cq_handler(dev, cq_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t ocrdma_irq_handler(int irq, void *handle)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_eq *eq = handle;</div><div class='add'>+	struct ocrdma_dev *dev = eq-&gt;dev;</div><div class='add'>+	struct ocrdma_eqe eqe;</div><div class='add'>+	struct ocrdma_eqe *ptr;</div><div class='add'>+	u16 eqe_popped = 0;</div><div class='add'>+	u16 cq_id;</div><div class='add'>+	while (1) {</div><div class='add'>+		ptr = ocrdma_get_eqe(eq);</div><div class='add'>+		eqe = *ptr;</div><div class='add'>+		ocrdma_le32_to_cpu(&amp;eqe, sizeof(eqe));</div><div class='add'>+		if ((eqe.id_valid &amp; OCRDMA_EQE_VALID_MASK) == 0)</div><div class='add'>+			break;</div><div class='add'>+		eqe_popped += 1;</div><div class='add'>+		ptr-&gt;id_valid = 0;</div><div class='add'>+		/* check whether its CQE or not. */</div><div class='add'>+		if ((eqe.id_valid &amp; OCRDMA_EQE_FOR_CQE_MASK) == 0) {</div><div class='add'>+			cq_id = eqe.id_valid &gt;&gt; OCRDMA_EQE_RESOURCE_ID_SHIFT;</div><div class='add'>+			ocrdma_cq_handler(dev, cq_id);</div><div class='add'>+		}</div><div class='add'>+		ocrdma_eq_inc_tail(eq);</div><div class='add'>+	}</div><div class='add'>+	ocrdma_ring_eq_db(dev, eq-&gt;q.id, true, true, eqe_popped);</div><div class='add'>+	/* Ring EQ doorbell with num_popped to 0 to enable interrupts again. */</div><div class='add'>+	if (dev-&gt;nic_info.intr_mode == BE_INTERRUPT_MODE_INTX)</div><div class='add'>+		ocrdma_ring_eq_db(dev, eq-&gt;q.id, true, true, 0);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_post_mqe(struct ocrdma_dev *dev, struct ocrdma_mqe *cmd)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_mqe *mqe;</div><div class='add'>+</div><div class='add'>+	dev-&gt;mqe_ctx.tag = dev-&gt;mq.sq.head;</div><div class='add'>+	dev-&gt;mqe_ctx.cmd_done = false;</div><div class='add'>+	mqe = ocrdma_get_mqe(dev);</div><div class='add'>+	cmd-&gt;hdr.tag_lo = dev-&gt;mq.sq.head;</div><div class='add'>+	ocrdma_copy_cpu_to_le32(mqe, cmd, sizeof(*mqe));</div><div class='add'>+	/* make sure descriptor is written before ringing doorbell */</div><div class='add'>+	wmb();</div><div class='add'>+	ocrdma_mq_inc_head(dev);</div><div class='add'>+	ocrdma_ring_mq_db(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_wait_mqe_cmpl(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	long status;</div><div class='add'>+	/* 30 sec timeout */</div><div class='add'>+	status = wait_event_timeout(dev-&gt;mqe_ctx.cmd_wait,</div><div class='add'>+				    (dev-&gt;mqe_ctx.cmd_done != false),</div><div class='add'>+				    msecs_to_jiffies(30000));</div><div class='add'>+	if (status)</div><div class='add'>+		return 0;</div><div class='add'>+	else</div><div class='add'>+		return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* issue a mailbox command on the MQ */</div><div class='add'>+static int ocrdma_mbx_cmd(struct ocrdma_dev *dev, struct ocrdma_mqe *mqe)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	u16 cqe_status, ext_status;</div><div class='add'>+	struct ocrdma_mqe *rsp;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;mqe_ctx.lock);</div><div class='add'>+	ocrdma_post_mqe(dev, mqe);</div><div class='add'>+	status = ocrdma_wait_mqe_cmpl(dev);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	cqe_status = dev-&gt;mqe_ctx.cqe_status;</div><div class='add'>+	ext_status = dev-&gt;mqe_ctx.ext_status;</div><div class='add'>+	rsp = ocrdma_get_mqe_rsp(dev);</div><div class='add'>+	ocrdma_copy_le32_to_cpu(mqe, rsp, (sizeof(*mqe)));</div><div class='add'>+	if (cqe_status || ext_status) {</div><div class='add'>+		ocrdma_err</div><div class='add'>+		    ("%s() opcode=0x%x, cqe_status=0x%x, ext_status=0x%x\n",</div><div class='add'>+		     __func__,</div><div class='add'>+		     (rsp-&gt;u.rsp.subsys_op &amp; OCRDMA_MBX_RSP_OPCODE_MASK) &gt;&gt;</div><div class='add'>+		     OCRDMA_MBX_RSP_OPCODE_SHIFT, cqe_status, ext_status);</div><div class='add'>+		status = ocrdma_get_mbx_cqe_errno(cqe_status);</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	}</div><div class='add'>+	if (mqe-&gt;u.rsp.status &amp; OCRDMA_MBX_RSP_STATUS_MASK)</div><div class='add'>+		status = ocrdma_get_mbx_errno(mqe-&gt;u.rsp.status);</div><div class='add'>+mbx_err:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;mqe_ctx.lock);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_get_attr(struct ocrdma_dev *dev,</div><div class='add'>+			      struct ocrdma_dev_attr *attr,</div><div class='add'>+			      struct ocrdma_mbx_query_config *rsp)</div><div class='add'>+{</div><div class='add'>+	int max_q_mem;</div><div class='add'>+</div><div class='add'>+	attr-&gt;max_pd =</div><div class='add'>+	    (rsp-&gt;max_pd_ca_ack_delay &amp; OCRDMA_MBX_QUERY_CFG_MAX_PD_MASK) &gt;&gt;</div><div class='add'>+	    OCRDMA_MBX_QUERY_CFG_MAX_PD_SHIFT;</div><div class='add'>+	attr-&gt;max_qp =</div><div class='add'>+	    (rsp-&gt;qp_srq_cq_ird_ord &amp; OCRDMA_MBX_QUERY_CFG_MAX_QP_MASK) &gt;&gt;</div><div class='add'>+	    OCRDMA_MBX_QUERY_CFG_MAX_QP_SHIFT;</div><div class='add'>+	attr-&gt;max_send_sge = ((rsp-&gt;max_write_send_sge &amp;</div><div class='add'>+			       OCRDMA_MBX_QUERY_CFG_MAX_SEND_SGE_MASK) &gt;&gt;</div><div class='add'>+			      OCRDMA_MBX_QUERY_CFG_MAX_SEND_SGE_SHIFT);</div><div class='add'>+	attr-&gt;max_recv_sge = (rsp-&gt;max_write_send_sge &amp;</div><div class='add'>+			      OCRDMA_MBX_QUERY_CFG_MAX_SEND_SGE_MASK) &gt;&gt;</div><div class='add'>+	    OCRDMA_MBX_QUERY_CFG_MAX_SEND_SGE_SHIFT;</div><div class='add'>+	attr-&gt;max_ord_per_qp = (rsp-&gt;max_ird_ord_per_qp &amp;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_ORD_PER_QP_MASK) &gt;&gt;</div><div class='add'>+	    OCRDMA_MBX_QUERY_CFG_MAX_ORD_PER_QP_SHIFT;</div><div class='add'>+	attr-&gt;max_ird_per_qp = (rsp-&gt;max_ird_ord_per_qp &amp;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_IRD_PER_QP_MASK) &gt;&gt;</div><div class='add'>+	    OCRDMA_MBX_QUERY_CFG_MAX_IRD_PER_QP_SHIFT;</div><div class='add'>+	attr-&gt;cq_overflow_detect = (rsp-&gt;qp_srq_cq_ird_ord &amp;</div><div class='add'>+				    OCRDMA_MBX_QUERY_CFG_CQ_OVERFLOW_MASK) &gt;&gt;</div><div class='add'>+	    OCRDMA_MBX_QUERY_CFG_CQ_OVERFLOW_SHIFT;</div><div class='add'>+	attr-&gt;srq_supported = (rsp-&gt;qp_srq_cq_ird_ord &amp;</div><div class='add'>+			       OCRDMA_MBX_QUERY_CFG_SRQ_SUPPORTED_MASK) &gt;&gt;</div><div class='add'>+	    OCRDMA_MBX_QUERY_CFG_SRQ_SUPPORTED_SHIFT;</div><div class='add'>+	attr-&gt;local_ca_ack_delay = (rsp-&gt;max_pd_ca_ack_delay &amp;</div><div class='add'>+				    OCRDMA_MBX_QUERY_CFG_CA_ACK_DELAY_MASK) &gt;&gt;</div><div class='add'>+	    OCRDMA_MBX_QUERY_CFG_CA_ACK_DELAY_SHIFT;</div><div class='add'>+	attr-&gt;max_mr = rsp-&gt;max_mr;</div><div class='add'>+	attr-&gt;max_mr_size = ~0ull;</div><div class='add'>+	attr-&gt;max_fmr = 0;</div><div class='add'>+	attr-&gt;max_pages_per_frmr = rsp-&gt;max_pages_per_frmr;</div><div class='add'>+	attr-&gt;max_num_mr_pbl = rsp-&gt;max_num_mr_pbl;</div><div class='add'>+	attr-&gt;max_cqe = rsp-&gt;max_cq_cqes_per_cq &amp;</div><div class='add'>+			OCRDMA_MBX_QUERY_CFG_MAX_CQES_PER_CQ_MASK;</div><div class='add'>+	attr-&gt;wqe_size = ((rsp-&gt;wqe_rqe_stride_max_dpp_cqs &amp;</div><div class='add'>+		OCRDMA_MBX_QUERY_CFG_MAX_WQE_SIZE_MASK) &gt;&gt;</div><div class='add'>+		OCRDMA_MBX_QUERY_CFG_MAX_WQE_SIZE_OFFSET) *</div><div class='add'>+		OCRDMA_WQE_STRIDE;</div><div class='add'>+	attr-&gt;rqe_size = ((rsp-&gt;wqe_rqe_stride_max_dpp_cqs &amp;</div><div class='add'>+		OCRDMA_MBX_QUERY_CFG_MAX_RQE_SIZE_MASK) &gt;&gt;</div><div class='add'>+		OCRDMA_MBX_QUERY_CFG_MAX_RQE_SIZE_OFFSET) *</div><div class='add'>+		OCRDMA_WQE_STRIDE;</div><div class='add'>+	attr-&gt;max_inline_data =</div><div class='add'>+	    attr-&gt;wqe_size - (sizeof(struct ocrdma_hdr_wqe) +</div><div class='add'>+			      sizeof(struct ocrdma_sge));</div><div class='add'>+	max_q_mem = OCRDMA_Q_PAGE_BASE_SIZE &lt;&lt; (OCRDMA_MAX_Q_PAGE_SIZE_CNT - 1);</div><div class='add'>+	/* hw can queue one less then the configured size,</div><div class='add'>+	 * so publish less by one to stack.</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;nic_info.dev_family == OCRDMA_GEN2_FAMILY) {</div><div class='add'>+		dev-&gt;attr.max_wqe = max_q_mem / dev-&gt;attr.wqe_size;</div><div class='add'>+		attr-&gt;ird = 1;</div><div class='add'>+		attr-&gt;ird_page_size = OCRDMA_MIN_Q_PAGE_SIZE;</div><div class='add'>+		attr-&gt;num_ird_pages = MAX_OCRDMA_IRD_PAGES;</div><div class='add'>+	} else</div><div class='add'>+		dev-&gt;attr.max_wqe = (max_q_mem / dev-&gt;attr.wqe_size) - 1;</div><div class='add'>+	dev-&gt;attr.max_rqe = (max_q_mem / dev-&gt;attr.rqe_size) - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_check_fw_config(struct ocrdma_dev *dev,</div><div class='add'>+				   struct ocrdma_fw_conf_rsp *conf)</div><div class='add'>+{</div><div class='add'>+	u32 fn_mode;</div><div class='add'>+</div><div class='add'>+	fn_mode = conf-&gt;fn_mode &amp; OCRDMA_FN_MODE_RDMA;</div><div class='add'>+	if (fn_mode != OCRDMA_FN_MODE_RDMA)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	dev-&gt;base_eqid = conf-&gt;base_eqid;</div><div class='add'>+	dev-&gt;max_eq = conf-&gt;max_eq;</div><div class='add'>+	dev-&gt;attr.max_cq = OCRDMA_MAX_CQ - 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* can be issued only during init time. */</div><div class='add'>+static int ocrdma_mbx_query_fw_ver(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_mqe *cmd;</div><div class='add'>+	struct ocrdma_fw_ver_rsp *rsp;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_GET_FW_VER, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	ocrdma_init_mch((struct ocrdma_mbx_hdr *)&amp;cmd-&gt;u.cmd[0],</div><div class='add'>+			OCRDMA_CMD_GET_FW_VER,</div><div class='add'>+			OCRDMA_SUBSYS_COMMON, sizeof(*cmd));</div><div class='add'>+</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	rsp = (struct ocrdma_fw_ver_rsp *)cmd;</div><div class='add'>+	memset(&amp;dev-&gt;attr.fw_ver[0], 0, sizeof(dev-&gt;attr.fw_ver));</div><div class='add'>+	memcpy(&amp;dev-&gt;attr.fw_ver[0], &amp;rsp-&gt;running_ver[0],</div><div class='add'>+	       sizeof(rsp-&gt;running_ver));</div><div class='add'>+	ocrdma_le32_to_cpu(dev-&gt;attr.fw_ver, sizeof(rsp-&gt;running_ver));</div><div class='add'>+mbx_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* can be issued only during init time. */</div><div class='add'>+static int ocrdma_mbx_query_fw_config(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_mqe *cmd;</div><div class='add'>+	struct ocrdma_fw_conf_rsp *rsp;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_GET_FW_CONFIG, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	ocrdma_init_mch((struct ocrdma_mbx_hdr *)&amp;cmd-&gt;u.cmd[0],</div><div class='add'>+			OCRDMA_CMD_GET_FW_CONFIG,</div><div class='add'>+			OCRDMA_SUBSYS_COMMON, sizeof(*cmd));</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	rsp = (struct ocrdma_fw_conf_rsp *)cmd;</div><div class='add'>+	status = ocrdma_check_fw_config(dev, rsp);</div><div class='add'>+mbx_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_mbx_query_dev(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_mbx_query_config *rsp;</div><div class='add'>+	struct ocrdma_mqe *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_QUERY_CONFIG, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	rsp = (struct ocrdma_mbx_query_config *)cmd;</div><div class='add'>+	ocrdma_get_attr(dev, &amp;dev-&gt;attr, rsp);</div><div class='add'>+mbx_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_alloc_pd(struct ocrdma_dev *dev, struct ocrdma_pd *pd)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_alloc_pd *cmd;</div><div class='add'>+	struct ocrdma_alloc_pd_rsp *rsp;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_ALLOC_PD, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+	if (pd-&gt;dpp_enabled)</div><div class='add'>+		cmd-&gt;enable_dpp_rsvd |= OCRDMA_ALLOC_PD_ENABLE_DPP;</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	rsp = (struct ocrdma_alloc_pd_rsp *)cmd;</div><div class='add'>+	pd-&gt;id = rsp-&gt;dpp_page_pdid &amp; OCRDMA_ALLOC_PD_RSP_PDID_MASK;</div><div class='add'>+	if (rsp-&gt;dpp_page_pdid &amp; OCRDMA_ALLOC_PD_RSP_DPP) {</div><div class='add'>+		pd-&gt;dpp_enabled = true;</div><div class='add'>+		pd-&gt;dpp_page = rsp-&gt;dpp_page_pdid &gt;&gt;</div><div class='add'>+				OCRDMA_ALLOC_PD_RSP_DPP_PAGE_SHIFT;</div><div class='add'>+	} else {</div><div class='add'>+		pd-&gt;dpp_enabled = false;</div><div class='add'>+		pd-&gt;num_dpp_qp = 0;</div><div class='add'>+	}</div><div class='add'>+mbx_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_dealloc_pd(struct ocrdma_dev *dev, struct ocrdma_pd *pd)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_dealloc_pd *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_DEALLOC_PD, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+	cmd-&gt;id = pd-&gt;id;</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_build_q_conf(u32 *num_entries, int entry_size,</div><div class='add'>+			       int *num_pages, int *page_size)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int mem_size;</div><div class='add'>+</div><div class='add'>+	*num_entries = roundup_pow_of_two(*num_entries);</div><div class='add'>+	mem_size = *num_entries * entry_size;</div><div class='add'>+	/* find the possible lowest possible multiplier */</div><div class='add'>+	for (i = 0; i &lt; OCRDMA_MAX_Q_PAGE_SIZE_CNT; i++) {</div><div class='add'>+		if (mem_size &lt;= (OCRDMA_Q_PAGE_BASE_SIZE &lt;&lt; i))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	if (i &gt;= OCRDMA_MAX_Q_PAGE_SIZE_CNT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	mem_size = roundup(mem_size,</div><div class='add'>+		       ((OCRDMA_Q_PAGE_BASE_SIZE &lt;&lt; i) / OCRDMA_MAX_Q_PAGES));</div><div class='add'>+	*num_pages =</div><div class='add'>+	    mem_size / ((OCRDMA_Q_PAGE_BASE_SIZE &lt;&lt; i) / OCRDMA_MAX_Q_PAGES);</div><div class='add'>+	*page_size = ((OCRDMA_Q_PAGE_BASE_SIZE &lt;&lt; i) / OCRDMA_MAX_Q_PAGES);</div><div class='add'>+	*num_entries = mem_size / entry_size;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_mbx_create_ah_tbl(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int i ;</div><div class='add'>+	int status = 0;</div><div class='add'>+	int max_ah;</div><div class='add'>+	struct ocrdma_create_ah_tbl *cmd;</div><div class='add'>+	struct ocrdma_create_ah_tbl_rsp *rsp;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+	dma_addr_t pa;</div><div class='add'>+	struct ocrdma_pbe *pbes;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_CREATE_AH_TBL, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='add'>+	max_ah = OCRDMA_MAX_AH;</div><div class='add'>+	dev-&gt;av_tbl.size = sizeof(struct ocrdma_av) * max_ah;</div><div class='add'>+</div><div class='add'>+	/* number of PBEs in PBL */</div><div class='add'>+	cmd-&gt;ah_conf = (OCRDMA_AH_TBL_PAGES &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_AH_NUM_PAGES_SHIFT) &amp;</div><div class='add'>+				OCRDMA_CREATE_AH_NUM_PAGES_MASK;</div><div class='add'>+</div><div class='add'>+	/* page size */</div><div class='add'>+	for (i = 0; i &lt; OCRDMA_MAX_Q_PAGE_SIZE_CNT; i++) {</div><div class='add'>+		if (PAGE_SIZE == (OCRDMA_MIN_Q_PAGE_SIZE &lt;&lt; i))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	cmd-&gt;ah_conf |= (i &lt;&lt; OCRDMA_CREATE_AH_PAGE_SIZE_SHIFT) &amp;</div><div class='add'>+				OCRDMA_CREATE_AH_PAGE_SIZE_MASK;</div><div class='add'>+</div><div class='add'>+	/* ah_entry size */</div><div class='add'>+	cmd-&gt;ah_conf |= (sizeof(struct ocrdma_av) &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_AH_ENTRY_SIZE_SHIFT) &amp;</div><div class='add'>+				OCRDMA_CREATE_AH_ENTRY_SIZE_MASK;</div><div class='add'>+</div><div class='add'>+	dev-&gt;av_tbl.pbl.va = dma_alloc_coherent(&amp;pdev-&gt;dev, PAGE_SIZE,</div><div class='add'>+						&amp;dev-&gt;av_tbl.pbl.pa,</div><div class='add'>+						GFP_KERNEL);</div><div class='add'>+	if (dev-&gt;av_tbl.pbl.va == NULL)</div><div class='add'>+		goto mem_err;</div><div class='add'>+</div><div class='add'>+	dev-&gt;av_tbl.va = dma_alloc_coherent(&amp;pdev-&gt;dev, dev-&gt;av_tbl.size,</div><div class='add'>+					    &amp;pa, GFP_KERNEL);</div><div class='add'>+	if (dev-&gt;av_tbl.va == NULL)</div><div class='add'>+		goto mem_err_ah;</div><div class='add'>+	dev-&gt;av_tbl.pa = pa;</div><div class='add'>+	dev-&gt;av_tbl.num_ah = max_ah;</div><div class='add'>+	memset(dev-&gt;av_tbl.va, 0, dev-&gt;av_tbl.size);</div><div class='add'>+</div><div class='add'>+	pbes = (struct ocrdma_pbe *)dev-&gt;av_tbl.pbl.va;</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;av_tbl.size / OCRDMA_MIN_Q_PAGE_SIZE; i++) {</div><div class='add'>+		pbes[i].pa_lo = (u32) (pa &amp; 0xffffffff);</div><div class='add'>+		pbes[i].pa_hi = (u32) upper_32_bits(pa);</div><div class='add'>+		pa += PAGE_SIZE;</div><div class='add'>+	}</div><div class='add'>+	cmd-&gt;tbl_addr[0].lo = (u32)(dev-&gt;av_tbl.pbl.pa &amp; 0xFFFFFFFF);</div><div class='add'>+	cmd-&gt;tbl_addr[0].hi = (u32)upper_32_bits(dev-&gt;av_tbl.pbl.pa);</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	rsp = (struct ocrdma_create_ah_tbl_rsp *)cmd;</div><div class='add'>+	dev-&gt;av_tbl.ahid = rsp-&gt;ahid &amp; 0xFFFF;</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+mbx_err:</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, dev-&gt;av_tbl.size, dev-&gt;av_tbl.va,</div><div class='add'>+			  dev-&gt;av_tbl.pa);</div><div class='add'>+	dev-&gt;av_tbl.va = NULL;</div><div class='add'>+mem_err_ah:</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, PAGE_SIZE, dev-&gt;av_tbl.pbl.va,</div><div class='add'>+			  dev-&gt;av_tbl.pbl.pa);</div><div class='add'>+	dev-&gt;av_tbl.pbl.va = NULL;</div><div class='add'>+	dev-&gt;av_tbl.size = 0;</div><div class='add'>+mem_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_mbx_delete_ah_tbl(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_delete_ah_tbl *cmd;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;av_tbl.va == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_DELETE_AH_TBL, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return;</div><div class='add'>+	cmd-&gt;ahid = dev-&gt;av_tbl.ahid;</div><div class='add'>+</div><div class='add'>+	ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, dev-&gt;av_tbl.size, dev-&gt;av_tbl.va,</div><div class='add'>+			  dev-&gt;av_tbl.pa);</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, PAGE_SIZE, dev-&gt;av_tbl.pbl.va,</div><div class='add'>+			  dev-&gt;av_tbl.pbl.pa);</div><div class='add'>+	kfree(cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Multiple CQs uses the EQ. This routine returns least used</div><div class='add'>+ * EQ to associate with CQ. This will distributes the interrupt</div><div class='add'>+ * processing and CPU load to associated EQ, vector and so to that CPU.</div><div class='add'>+ */</div><div class='add'>+static u16 ocrdma_bind_eq(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int i, selected_eq = 0, cq_cnt = 0;</div><div class='add'>+	u16 eq_id;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	cq_cnt = dev-&gt;qp_eq_tbl[0].cq_cnt;</div><div class='add'>+	eq_id = dev-&gt;qp_eq_tbl[0].q.id;</div><div class='add'>+	/* find the EQ which is has the least number of</div><div class='add'>+	 * CQs associated with it.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;eq_cnt; i++) {</div><div class='add'>+		if (dev-&gt;qp_eq_tbl[i].cq_cnt &lt; cq_cnt) {</div><div class='add'>+			cq_cnt = dev-&gt;qp_eq_tbl[i].cq_cnt;</div><div class='add'>+			eq_id = dev-&gt;qp_eq_tbl[i].q.id;</div><div class='add'>+			selected_eq = i;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	dev-&gt;qp_eq_tbl[selected_eq].cq_cnt += 1;</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	return eq_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_unbind_eq(struct ocrdma_dev *dev, u16 eq_id)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;eq_cnt; i++) {</div><div class='add'>+		if (dev-&gt;qp_eq_tbl[i].q.id != eq_id)</div><div class='add'>+			continue;</div><div class='add'>+		dev-&gt;qp_eq_tbl[i].cq_cnt -= 1;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;dev_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_create_cq(struct ocrdma_dev *dev, struct ocrdma_cq *cq,</div><div class='add'>+			 int entries, int dpp_cq)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM; int max_hw_cqe;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+	struct ocrdma_create_cq *cmd;</div><div class='add'>+	struct ocrdma_create_cq_rsp *rsp;</div><div class='add'>+	u32 hw_pages, cqe_size, page_size, cqe_count;</div><div class='add'>+</div><div class='add'>+	if (dpp_cq)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (entries &gt; dev-&gt;attr.max_cqe) {</div><div class='add'>+		ocrdma_err("%s(%d) max_cqe=0x%x, requester_cqe=0x%x\n",</div><div class='add'>+			   __func__, dev-&gt;id, dev-&gt;attr.max_cqe, entries);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (dpp_cq &amp;&amp; (dev-&gt;nic_info.dev_family != OCRDMA_GEN2_FAMILY))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (dpp_cq) {</div><div class='add'>+		cq-&gt;max_hw_cqe = 1;</div><div class='add'>+		max_hw_cqe = 1;</div><div class='add'>+		cqe_size = OCRDMA_DPP_CQE_SIZE;</div><div class='add'>+		hw_pages = 1;</div><div class='add'>+	} else {</div><div class='add'>+		cq-&gt;max_hw_cqe = dev-&gt;attr.max_cqe;</div><div class='add'>+		max_hw_cqe = dev-&gt;attr.max_cqe;</div><div class='add'>+		cqe_size = sizeof(struct ocrdma_cqe);</div><div class='add'>+		hw_pages = OCRDMA_CREATE_CQ_MAX_PAGES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cq-&gt;len = roundup(max_hw_cqe * cqe_size, OCRDMA_MIN_Q_PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_CREATE_CQ, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	ocrdma_init_mch(&amp;cmd-&gt;cmd.req, OCRDMA_CMD_CREATE_CQ,</div><div class='add'>+			OCRDMA_SUBSYS_COMMON, sizeof(*cmd));</div><div class='add'>+	cq-&gt;va = dma_alloc_coherent(&amp;pdev-&gt;dev, cq-&gt;len, &amp;cq-&gt;pa, GFP_KERNEL);</div><div class='add'>+	if (!cq-&gt;va) {</div><div class='add'>+		status = -ENOMEM;</div><div class='add'>+		goto mem_err;</div><div class='add'>+	}</div><div class='add'>+	memset(cq-&gt;va, 0, cq-&gt;len);</div><div class='add'>+	page_size = cq-&gt;len / hw_pages;</div><div class='add'>+	cmd-&gt;cmd.pgsz_pgcnt = (page_size / OCRDMA_MIN_Q_PAGE_SIZE) &lt;&lt;</div><div class='add'>+					OCRDMA_CREATE_CQ_PAGE_SIZE_SHIFT;</div><div class='add'>+	cmd-&gt;cmd.pgsz_pgcnt |= hw_pages;</div><div class='add'>+	cmd-&gt;cmd.ev_cnt_flags = OCRDMA_CREATE_CQ_DEF_FLAGS;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;eq_cnt &lt; 0)</div><div class='add'>+		goto eq_err;</div><div class='add'>+	cq-&gt;eqn = ocrdma_bind_eq(dev);</div><div class='add'>+	cmd-&gt;cmd.req.rsvd_version = OCRDMA_CREATE_CQ_VER2;</div><div class='add'>+	cqe_count = cq-&gt;len / cqe_size;</div><div class='add'>+	if (cqe_count &gt; 1024)</div><div class='add'>+		/* Set cnt to 3 to indicate more than 1024 cq entries */</div><div class='add'>+		cmd-&gt;cmd.ev_cnt_flags |= (0x3 &lt;&lt; OCRDMA_CREATE_CQ_CNT_SHIFT);</div><div class='add'>+	else {</div><div class='add'>+		u8 count = 0;</div><div class='add'>+		switch (cqe_count) {</div><div class='add'>+		case 256:</div><div class='add'>+			count = 0;</div><div class='add'>+			break;</div><div class='add'>+		case 512:</div><div class='add'>+			count = 1;</div><div class='add'>+			break;</div><div class='add'>+		case 1024:</div><div class='add'>+			count = 2;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			goto mbx_err;</div><div class='add'>+		}</div><div class='add'>+		cmd-&gt;cmd.ev_cnt_flags |= (count &lt;&lt; OCRDMA_CREATE_CQ_CNT_SHIFT);</div><div class='add'>+	}</div><div class='add'>+	/* shared eq between all the consumer cqs. */</div><div class='add'>+	cmd-&gt;cmd.eqn = cq-&gt;eqn;</div><div class='add'>+	if (dev-&gt;nic_info.dev_family == OCRDMA_GEN2_FAMILY) {</div><div class='add'>+		if (dpp_cq)</div><div class='add'>+			cmd-&gt;cmd.pgsz_pgcnt |= OCRDMA_CREATE_CQ_DPP &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_CQ_TYPE_SHIFT;</div><div class='add'>+		cq-&gt;phase_change = false;</div><div class='add'>+		cmd-&gt;cmd.cqe_count = (cq-&gt;len / cqe_size);</div><div class='add'>+	} else {</div><div class='add'>+		cmd-&gt;cmd.cqe_count = (cq-&gt;len / cqe_size) - 1;</div><div class='add'>+		cmd-&gt;cmd.ev_cnt_flags |= OCRDMA_CREATE_CQ_FLAGS_AUTO_VALID;</div><div class='add'>+		cq-&gt;phase_change = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocrdma_build_q_pages(&amp;cmd-&gt;cmd.pa[0], hw_pages, cq-&gt;pa, page_size);</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+</div><div class='add'>+	rsp = (struct ocrdma_create_cq_rsp *)cmd;</div><div class='add'>+	cq-&gt;id = (u16) (rsp-&gt;rsp.cq_id &amp; OCRDMA_CREATE_CQ_RSP_CQ_ID_MASK);</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return 0;</div><div class='add'>+mbx_err:</div><div class='add'>+	ocrdma_unbind_eq(dev, cq-&gt;eqn);</div><div class='add'>+eq_err:</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, cq-&gt;len, cq-&gt;va, cq-&gt;pa);</div><div class='add'>+mem_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_destroy_cq(struct ocrdma_dev *dev, struct ocrdma_cq *cq)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_destroy_cq *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_DELETE_CQ, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+	ocrdma_init_mch(&amp;cmd-&gt;req, OCRDMA_CMD_DELETE_CQ,</div><div class='add'>+			OCRDMA_SUBSYS_COMMON, sizeof(*cmd));</div><div class='add'>+</div><div class='add'>+	cmd-&gt;bypass_flush_qid |=</div><div class='add'>+	    (cq-&gt;id &lt;&lt; OCRDMA_DESTROY_CQ_QID_SHIFT) &amp;</div><div class='add'>+	    OCRDMA_DESTROY_CQ_QID_MASK;</div><div class='add'>+</div><div class='add'>+	ocrdma_unbind_eq(dev, cq-&gt;eqn);</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	dma_free_coherent(&amp;dev-&gt;nic_info.pdev-&gt;dev, cq-&gt;len, cq-&gt;va, cq-&gt;pa);</div><div class='add'>+mbx_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_hw_mr *hwmr,</div><div class='add'>+			  u32 pdid, int addr_check)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_alloc_lkey *cmd;</div><div class='add'>+	struct ocrdma_alloc_lkey_rsp *rsp;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_ALLOC_LKEY, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+	cmd-&gt;pdid = pdid;</div><div class='add'>+	cmd-&gt;pbl_sz_flags |= addr_check;</div><div class='add'>+	cmd-&gt;pbl_sz_flags |= (hwmr-&gt;fr_mr &lt;&lt; OCRDMA_ALLOC_LKEY_FMR_SHIFT);</div><div class='add'>+	cmd-&gt;pbl_sz_flags |=</div><div class='add'>+	    (hwmr-&gt;remote_wr &lt;&lt; OCRDMA_ALLOC_LKEY_REMOTE_WR_SHIFT);</div><div class='add'>+	cmd-&gt;pbl_sz_flags |=</div><div class='add'>+	    (hwmr-&gt;remote_rd &lt;&lt; OCRDMA_ALLOC_LKEY_REMOTE_RD_SHIFT);</div><div class='add'>+	cmd-&gt;pbl_sz_flags |=</div><div class='add'>+	    (hwmr-&gt;local_wr &lt;&lt; OCRDMA_ALLOC_LKEY_LOCAL_WR_SHIFT);</div><div class='add'>+	cmd-&gt;pbl_sz_flags |=</div><div class='add'>+	    (hwmr-&gt;remote_atomic &lt;&lt; OCRDMA_ALLOC_LKEY_REMOTE_ATOMIC_SHIFT);</div><div class='add'>+	cmd-&gt;pbl_sz_flags |=</div><div class='add'>+	    (hwmr-&gt;num_pbls &lt;&lt; OCRDMA_ALLOC_LKEY_PBL_SIZE_SHIFT);</div><div class='add'>+</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	rsp = (struct ocrdma_alloc_lkey_rsp *)cmd;</div><div class='add'>+	hwmr-&gt;lkey = rsp-&gt;lrkey;</div><div class='add'>+mbx_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_dealloc_lkey(struct ocrdma_dev *dev, int fr_mr, u32 lkey)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_dealloc_lkey *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_DEALLOC_LKEY, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	cmd-&gt;lkey = lkey;</div><div class='add'>+	cmd-&gt;rsvd_frmr = fr_mr ? 1 : 0;</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+mbx_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_mbx_reg_mr(struct ocrdma_dev *dev, struct ocrdma_hw_mr *hwmr,</div><div class='add'>+			     u32 pdid, u32 pbl_cnt, u32 pbe_size, u32 last)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	int i;</div><div class='add'>+	struct ocrdma_reg_nsmr *cmd;</div><div class='add'>+	struct ocrdma_reg_nsmr_rsp *rsp;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_REGISTER_NSMR, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	cmd-&gt;num_pbl_pdid =</div><div class='add'>+	    pdid | (hwmr-&gt;num_pbls &lt;&lt; OCRDMA_REG_NSMR_NUM_PBL_SHIFT);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;flags_hpage_pbe_sz |= (hwmr-&gt;remote_wr &lt;&lt;</div><div class='add'>+				    OCRDMA_REG_NSMR_REMOTE_WR_SHIFT);</div><div class='add'>+	cmd-&gt;flags_hpage_pbe_sz |= (hwmr-&gt;remote_rd &lt;&lt;</div><div class='add'>+				    OCRDMA_REG_NSMR_REMOTE_RD_SHIFT);</div><div class='add'>+	cmd-&gt;flags_hpage_pbe_sz |= (hwmr-&gt;local_wr &lt;&lt;</div><div class='add'>+				    OCRDMA_REG_NSMR_LOCAL_WR_SHIFT);</div><div class='add'>+	cmd-&gt;flags_hpage_pbe_sz |= (hwmr-&gt;remote_atomic &lt;&lt;</div><div class='add'>+				    OCRDMA_REG_NSMR_REMOTE_ATOMIC_SHIFT);</div><div class='add'>+	cmd-&gt;flags_hpage_pbe_sz |= (hwmr-&gt;mw_bind &lt;&lt;</div><div class='add'>+				    OCRDMA_REG_NSMR_BIND_MEMWIN_SHIFT);</div><div class='add'>+	cmd-&gt;flags_hpage_pbe_sz |= (last &lt;&lt; OCRDMA_REG_NSMR_LAST_SHIFT);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;flags_hpage_pbe_sz |= (hwmr-&gt;pbe_size / OCRDMA_MIN_HPAGE_SIZE);</div><div class='add'>+	cmd-&gt;flags_hpage_pbe_sz |= (hwmr-&gt;pbl_size / OCRDMA_MIN_HPAGE_SIZE) &lt;&lt;</div><div class='add'>+					OCRDMA_REG_NSMR_HPAGE_SIZE_SHIFT;</div><div class='add'>+	cmd-&gt;totlen_low = hwmr-&gt;len;</div><div class='add'>+	cmd-&gt;totlen_high = upper_32_bits(hwmr-&gt;len);</div><div class='add'>+	cmd-&gt;fbo_low = (u32) (hwmr-&gt;fbo &amp; 0xffffffff);</div><div class='add'>+	cmd-&gt;fbo_high = (u32) upper_32_bits(hwmr-&gt;fbo);</div><div class='add'>+	cmd-&gt;va_loaddr = (u32) hwmr-&gt;va;</div><div class='add'>+	cmd-&gt;va_hiaddr = (u32) upper_32_bits(hwmr-&gt;va);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pbl_cnt; i++) {</div><div class='add'>+		cmd-&gt;pbl[i].lo = (u32) (hwmr-&gt;pbl_table[i].pa &amp; 0xffffffff);</div><div class='add'>+		cmd-&gt;pbl[i].hi = upper_32_bits(hwmr-&gt;pbl_table[i].pa);</div><div class='add'>+	}</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	rsp = (struct ocrdma_reg_nsmr_rsp *)cmd;</div><div class='add'>+	hwmr-&gt;lkey = rsp-&gt;lrkey;</div><div class='add'>+mbx_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_mbx_reg_mr_cont(struct ocrdma_dev *dev,</div><div class='add'>+				  struct ocrdma_hw_mr *hwmr, u32 pbl_cnt,</div><div class='add'>+				  u32 pbl_offset, u32 last)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	int i;</div><div class='add'>+	struct ocrdma_reg_nsmr_cont *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_REGISTER_NSMR_CONT, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	cmd-&gt;lrkey = hwmr-&gt;lkey;</div><div class='add'>+	cmd-&gt;num_pbl_offset = (pbl_cnt &lt;&lt; OCRDMA_REG_NSMR_CONT_NUM_PBL_SHIFT) |</div><div class='add'>+	    (pbl_offset &amp; OCRDMA_REG_NSMR_CONT_PBL_SHIFT_MASK);</div><div class='add'>+	cmd-&gt;last = last &lt;&lt; OCRDMA_REG_NSMR_CONT_LAST_SHIFT;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pbl_cnt; i++) {</div><div class='add'>+		cmd-&gt;pbl[i].lo =</div><div class='add'>+		    (u32) (hwmr-&gt;pbl_table[i + pbl_offset].pa &amp; 0xffffffff);</div><div class='add'>+		cmd-&gt;pbl[i].hi =</div><div class='add'>+		    upper_32_bits(hwmr-&gt;pbl_table[i + pbl_offset].pa);</div><div class='add'>+	}</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+mbx_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_reg_mr(struct ocrdma_dev *dev,</div><div class='add'>+		  struct ocrdma_hw_mr *hwmr, u32 pdid, int acc)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	u32 last = 0;</div><div class='add'>+	u32 cur_pbl_cnt, pbl_offset;</div><div class='add'>+	u32 pending_pbl_cnt = hwmr-&gt;num_pbls;</div><div class='add'>+</div><div class='add'>+	pbl_offset = 0;</div><div class='add'>+	cur_pbl_cnt = min(pending_pbl_cnt, MAX_OCRDMA_NSMR_PBL);</div><div class='add'>+	if (cur_pbl_cnt == pending_pbl_cnt)</div><div class='add'>+		last = 1;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_mbx_reg_mr(dev, hwmr, pdid,</div><div class='add'>+				   cur_pbl_cnt, hwmr-&gt;pbe_size, last);</div><div class='add'>+	if (status) {</div><div class='add'>+		ocrdma_err("%s() status=%d\n", __func__, status);</div><div class='add'>+		return status;</div><div class='add'>+	}</div><div class='add'>+	/* if there is no more pbls to register then exit. */</div><div class='add'>+	if (last)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	while (!last) {</div><div class='add'>+		pbl_offset += cur_pbl_cnt;</div><div class='add'>+		pending_pbl_cnt -= cur_pbl_cnt;</div><div class='add'>+		cur_pbl_cnt = min(pending_pbl_cnt, MAX_OCRDMA_NSMR_PBL);</div><div class='add'>+		/* if we reach the end of the pbls, then need to set the last</div><div class='add'>+		 * bit, indicating no more pbls to register for this memory key.</div><div class='add'>+		 */</div><div class='add'>+		if (cur_pbl_cnt == pending_pbl_cnt)</div><div class='add'>+			last = 1;</div><div class='add'>+</div><div class='add'>+		status = ocrdma_mbx_reg_mr_cont(dev, hwmr, cur_pbl_cnt,</div><div class='add'>+						pbl_offset, last);</div><div class='add'>+		if (status)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	if (status)</div><div class='add'>+		ocrdma_err("%s() err. status=%d\n", __func__, status);</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool ocrdma_is_qp_in_sq_flushlist(struct ocrdma_cq *cq, struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_qp *tmp;</div><div class='add'>+	bool found = false;</div><div class='add'>+	list_for_each_entry(tmp, &amp;cq-&gt;sq_head, sq_entry) {</div><div class='add'>+		if (qp == tmp) {</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return found;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool ocrdma_is_qp_in_rq_flushlist(struct ocrdma_cq *cq, struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_qp *tmp;</div><div class='add'>+	bool found = false;</div><div class='add'>+	list_for_each_entry(tmp, &amp;cq-&gt;rq_head, rq_entry) {</div><div class='add'>+		if (qp == tmp) {</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return found;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ocrdma_flush_qp(struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	bool found;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;qp-&gt;dev-&gt;flush_q_lock, flags);</div><div class='add'>+	found = ocrdma_is_qp_in_sq_flushlist(qp-&gt;sq_cq, qp);</div><div class='add'>+	if (!found)</div><div class='add'>+		list_add_tail(&amp;qp-&gt;sq_entry, &amp;qp-&gt;sq_cq-&gt;sq_head);</div><div class='add'>+	if (!qp-&gt;srq) {</div><div class='add'>+		found = ocrdma_is_qp_in_rq_flushlist(qp-&gt;rq_cq, qp);</div><div class='add'>+		if (!found)</div><div class='add'>+			list_add_tail(&amp;qp-&gt;rq_entry, &amp;qp-&gt;rq_cq-&gt;rq_head);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;qp-&gt;dev-&gt;flush_q_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_qp_state_machine(struct ocrdma_qp *qp, enum ib_qp_state new_ib_state,</div><div class='add'>+			    enum ib_qp_state *old_ib_state)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int status = 0;</div><div class='add'>+	enum ocrdma_qp_state new_state;</div><div class='add'>+	new_state = get_ocrdma_qp_state(new_ib_state);</div><div class='add'>+</div><div class='add'>+	/* sync with wqe and rqe posting */</div><div class='add'>+	spin_lock_irqsave(&amp;qp-&gt;q_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (old_ib_state)</div><div class='add'>+		*old_ib_state = get_ibqp_state(qp-&gt;state);</div><div class='add'>+	if (new_state == qp-&gt;state) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;qp-&gt;q_lock, flags);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (qp-&gt;state) {</div><div class='add'>+	case OCRDMA_QPS_RST:</div><div class='add'>+		switch (new_state) {</div><div class='add'>+		case OCRDMA_QPS_RST:</div><div class='add'>+		case OCRDMA_QPS_INIT:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		};</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_QPS_INIT:</div><div class='add'>+		/* qps: INIT-&gt;XXX */</div><div class='add'>+		switch (new_state) {</div><div class='add'>+		case OCRDMA_QPS_INIT:</div><div class='add'>+		case OCRDMA_QPS_RTR:</div><div class='add'>+			break;</div><div class='add'>+		case OCRDMA_QPS_ERR:</div><div class='add'>+			ocrdma_flush_qp(qp);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		};</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_QPS_RTR:</div><div class='add'>+		/* qps: RTS-&gt;XXX */</div><div class='add'>+		switch (new_state) {</div><div class='add'>+		case OCRDMA_QPS_RTS:</div><div class='add'>+			break;</div><div class='add'>+		case OCRDMA_QPS_ERR:</div><div class='add'>+			ocrdma_flush_qp(qp);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		};</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_QPS_RTS:</div><div class='add'>+		/* qps: RTS-&gt;XXX */</div><div class='add'>+		switch (new_state) {</div><div class='add'>+		case OCRDMA_QPS_SQD:</div><div class='add'>+		case OCRDMA_QPS_SQE:</div><div class='add'>+			break;</div><div class='add'>+		case OCRDMA_QPS_ERR:</div><div class='add'>+			ocrdma_flush_qp(qp);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		};</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_QPS_SQD:</div><div class='add'>+		/* qps: SQD-&gt;XXX */</div><div class='add'>+		switch (new_state) {</div><div class='add'>+		case OCRDMA_QPS_RTS:</div><div class='add'>+		case OCRDMA_QPS_SQE:</div><div class='add'>+		case OCRDMA_QPS_ERR:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		};</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_QPS_SQE:</div><div class='add'>+		switch (new_state) {</div><div class='add'>+		case OCRDMA_QPS_RTS:</div><div class='add'>+		case OCRDMA_QPS_ERR:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		};</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_QPS_ERR:</div><div class='add'>+		/* qps: ERR-&gt;XXX */</div><div class='add'>+		switch (new_state) {</div><div class='add'>+		case OCRDMA_QPS_RST:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		};</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		status = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	};</div><div class='add'>+	if (!status)</div><div class='add'>+		qp-&gt;state = new_state;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;qp-&gt;q_lock, flags);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 ocrdma_set_create_qp_mbx_access_flags(struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	u32 flags = 0;</div><div class='add'>+	if (qp-&gt;cap_flags &amp; OCRDMA_QP_INB_RD)</div><div class='add'>+		flags |= OCRDMA_CREATE_QP_REQ_INB_RDEN_MASK;</div><div class='add'>+	if (qp-&gt;cap_flags &amp; OCRDMA_QP_INB_WR)</div><div class='add'>+		flags |= OCRDMA_CREATE_QP_REQ_INB_WREN_MASK;</div><div class='add'>+	if (qp-&gt;cap_flags &amp; OCRDMA_QP_MW_BIND)</div><div class='add'>+		flags |= OCRDMA_CREATE_QP_REQ_BIND_MEMWIN_MASK;</div><div class='add'>+	if (qp-&gt;cap_flags &amp; OCRDMA_QP_LKEY0)</div><div class='add'>+		flags |= OCRDMA_CREATE_QP_REQ_ZERO_LKEYEN_MASK;</div><div class='add'>+	if (qp-&gt;cap_flags &amp; OCRDMA_QP_FAST_REG)</div><div class='add'>+		flags |= OCRDMA_CREATE_QP_REQ_FMR_EN_MASK;</div><div class='add'>+	return flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_set_create_qp_sq_cmd(struct ocrdma_create_qp_req *cmd,</div><div class='add'>+					struct ib_qp_init_attr *attrs,</div><div class='add'>+					struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	u32 len, hw_pages, hw_page_size;</div><div class='add'>+	dma_addr_t pa;</div><div class='add'>+	struct ocrdma_dev *dev = qp-&gt;dev;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+	u32 max_wqe_allocated;</div><div class='add'>+	u32 max_sges = attrs-&gt;cap.max_send_sge;</div><div class='add'>+</div><div class='add'>+	max_wqe_allocated = attrs-&gt;cap.max_send_wr;</div><div class='add'>+	/* need to allocate one extra to for GEN1 family */</div><div class='add'>+	if (dev-&gt;nic_info.dev_family != OCRDMA_GEN2_FAMILY)</div><div class='add'>+		max_wqe_allocated += 1;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_build_q_conf(&amp;max_wqe_allocated,</div><div class='add'>+		dev-&gt;attr.wqe_size, &amp;hw_pages, &amp;hw_page_size);</div><div class='add'>+	if (status) {</div><div class='add'>+		ocrdma_err("%s() req. max_send_wr=0x%x\n", __func__,</div><div class='add'>+			   max_wqe_allocated);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	qp-&gt;sq.max_cnt = max_wqe_allocated;</div><div class='add'>+	len = (hw_pages * hw_page_size);</div><div class='add'>+</div><div class='add'>+	qp-&gt;sq.va = dma_alloc_coherent(&amp;pdev-&gt;dev, len, &amp;pa, GFP_KERNEL);</div><div class='add'>+	if (!qp-&gt;sq.va)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	memset(qp-&gt;sq.va, 0, len);</div><div class='add'>+	qp-&gt;sq.len = len;</div><div class='add'>+	qp-&gt;sq.pa = pa;</div><div class='add'>+	qp-&gt;sq.entry_size = dev-&gt;attr.wqe_size;</div><div class='add'>+	ocrdma_build_q_pages(&amp;cmd-&gt;wq_addr[0], hw_pages, pa, hw_page_size);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;type_pgsz_pdn |= (ilog2(hw_page_size / OCRDMA_MIN_Q_PAGE_SIZE)</div><div class='add'>+				&lt;&lt; OCRDMA_CREATE_QP_REQ_SQ_PAGE_SIZE_SHIFT);</div><div class='add'>+	cmd-&gt;num_wq_rq_pages |= (hw_pages &lt;&lt;</div><div class='add'>+				 OCRDMA_CREATE_QP_REQ_NUM_WQ_PAGES_SHIFT) &amp;</div><div class='add'>+	    OCRDMA_CREATE_QP_REQ_NUM_WQ_PAGES_MASK;</div><div class='add'>+	cmd-&gt;max_sge_send_write |= (max_sges &lt;&lt;</div><div class='add'>+				    OCRDMA_CREATE_QP_REQ_MAX_SGE_SEND_SHIFT) &amp;</div><div class='add'>+	    OCRDMA_CREATE_QP_REQ_MAX_SGE_SEND_MASK;</div><div class='add'>+	cmd-&gt;max_sge_send_write |= (max_sges &lt;&lt;</div><div class='add'>+				    OCRDMA_CREATE_QP_REQ_MAX_SGE_WRITE_SHIFT) &amp;</div><div class='add'>+					OCRDMA_CREATE_QP_REQ_MAX_SGE_WRITE_MASK;</div><div class='add'>+	cmd-&gt;max_wqe_rqe |= (ilog2(qp-&gt;sq.max_cnt) &lt;&lt;</div><div class='add'>+			     OCRDMA_CREATE_QP_REQ_MAX_WQE_SHIFT) &amp;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_MAX_WQE_MASK;</div><div class='add'>+	cmd-&gt;wqe_rqe_size |= (dev-&gt;attr.wqe_size &lt;&lt;</div><div class='add'>+			      OCRDMA_CREATE_QP_REQ_WQE_SIZE_SHIFT) &amp;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_WQE_SIZE_MASK;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_set_create_qp_rq_cmd(struct ocrdma_create_qp_req *cmd,</div><div class='add'>+					struct ib_qp_init_attr *attrs,</div><div class='add'>+					struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	u32 len, hw_pages, hw_page_size;</div><div class='add'>+	dma_addr_t pa = 0;</div><div class='add'>+	struct ocrdma_dev *dev = qp-&gt;dev;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+	u32 max_rqe_allocated = attrs-&gt;cap.max_recv_wr + 1;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_build_q_conf(&amp;max_rqe_allocated, dev-&gt;attr.rqe_size,</div><div class='add'>+				     &amp;hw_pages, &amp;hw_page_size);</div><div class='add'>+	if (status) {</div><div class='add'>+		ocrdma_err("%s() req. max_recv_wr=0x%x\n", __func__,</div><div class='add'>+			   attrs-&gt;cap.max_recv_wr + 1);</div><div class='add'>+		return status;</div><div class='add'>+	}</div><div class='add'>+	qp-&gt;rq.max_cnt = max_rqe_allocated;</div><div class='add'>+	len = (hw_pages * hw_page_size);</div><div class='add'>+</div><div class='add'>+	qp-&gt;rq.va = dma_alloc_coherent(&amp;pdev-&gt;dev, len, &amp;pa, GFP_KERNEL);</div><div class='add'>+	if (!qp-&gt;rq.va)</div><div class='add'>+		return status;</div><div class='add'>+	memset(qp-&gt;rq.va, 0, len);</div><div class='add'>+	qp-&gt;rq.pa = pa;</div><div class='add'>+	qp-&gt;rq.len = len;</div><div class='add'>+	qp-&gt;rq.entry_size = dev-&gt;attr.rqe_size;</div><div class='add'>+</div><div class='add'>+	ocrdma_build_q_pages(&amp;cmd-&gt;rq_addr[0], hw_pages, pa, hw_page_size);</div><div class='add'>+	cmd-&gt;type_pgsz_pdn |= (ilog2(hw_page_size / OCRDMA_MIN_Q_PAGE_SIZE) &lt;&lt;</div><div class='add'>+		OCRDMA_CREATE_QP_REQ_RQ_PAGE_SIZE_SHIFT);</div><div class='add'>+	cmd-&gt;num_wq_rq_pages |=</div><div class='add'>+	    (hw_pages &lt;&lt; OCRDMA_CREATE_QP_REQ_NUM_RQ_PAGES_SHIFT) &amp;</div><div class='add'>+	    OCRDMA_CREATE_QP_REQ_NUM_RQ_PAGES_MASK;</div><div class='add'>+	cmd-&gt;max_sge_recv_flags |= (attrs-&gt;cap.max_recv_sge &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_MAX_SGE_RECV_SHIFT) &amp;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_MAX_SGE_RECV_MASK;</div><div class='add'>+	cmd-&gt;max_wqe_rqe |= (ilog2(qp-&gt;rq.max_cnt) &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_MAX_RQE_SHIFT) &amp;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_MAX_RQE_MASK;</div><div class='add'>+	cmd-&gt;wqe_rqe_size |= (dev-&gt;attr.rqe_size &lt;&lt;</div><div class='add'>+			OCRDMA_CREATE_QP_REQ_RQE_SIZE_SHIFT) &amp;</div><div class='add'>+			OCRDMA_CREATE_QP_REQ_RQE_SIZE_MASK;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_set_create_qp_dpp_cmd(struct ocrdma_create_qp_req *cmd,</div><div class='add'>+					 struct ocrdma_pd *pd,</div><div class='add'>+					 struct ocrdma_qp *qp,</div><div class='add'>+					 u8 enable_dpp_cq, u16 dpp_cq_id)</div><div class='add'>+{</div><div class='add'>+	pd-&gt;num_dpp_qp--;</div><div class='add'>+	qp-&gt;dpp_enabled = true;</div><div class='add'>+	cmd-&gt;max_sge_recv_flags |= OCRDMA_CREATE_QP_REQ_ENABLE_DPP_MASK;</div><div class='add'>+	if (!enable_dpp_cq)</div><div class='add'>+		return;</div><div class='add'>+	cmd-&gt;max_sge_recv_flags |= OCRDMA_CREATE_QP_REQ_ENABLE_DPP_MASK;</div><div class='add'>+	cmd-&gt;dpp_credits_cqid = dpp_cq_id;</div><div class='add'>+	cmd-&gt;dpp_credits_cqid |= OCRDMA_CREATE_QP_REQ_DPP_CREDIT_LIMIT &lt;&lt;</div><div class='add'>+					OCRDMA_CREATE_QP_REQ_DPP_CREDIT_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_set_create_qp_ird_cmd(struct ocrdma_create_qp_req *cmd,</div><div class='add'>+					struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_dev *dev = qp-&gt;dev;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+	dma_addr_t pa = 0;</div><div class='add'>+	int ird_page_size = dev-&gt;attr.ird_page_size;</div><div class='add'>+	int ird_q_len = dev-&gt;attr.num_ird_pages * ird_page_size;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;attr.ird == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	qp-&gt;ird_q_va = dma_alloc_coherent(&amp;pdev-&gt;dev, ird_q_len,</div><div class='add'>+					&amp;pa, GFP_KERNEL);</div><div class='add'>+	if (!qp-&gt;ird_q_va)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	memset(qp-&gt;ird_q_va, 0, ird_q_len);</div><div class='add'>+	ocrdma_build_q_pages(&amp;cmd-&gt;ird_addr[0], dev-&gt;attr.num_ird_pages,</div><div class='add'>+			     pa, ird_page_size);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_get_create_qp_rsp(struct ocrdma_create_qp_rsp *rsp,</div><div class='add'>+				     struct ocrdma_qp *qp,</div><div class='add'>+				     struct ib_qp_init_attr *attrs,</div><div class='add'>+				     u16 *dpp_offset, u16 *dpp_credit_lmt)</div><div class='add'>+{</div><div class='add'>+	u32 max_wqe_allocated, max_rqe_allocated;</div><div class='add'>+	qp-&gt;id = rsp-&gt;qp_id &amp; OCRDMA_CREATE_QP_RSP_QP_ID_MASK;</div><div class='add'>+	qp-&gt;rq.dbid = rsp-&gt;sq_rq_id &amp; OCRDMA_CREATE_QP_RSP_RQ_ID_MASK;</div><div class='add'>+	qp-&gt;sq.dbid = rsp-&gt;sq_rq_id &gt;&gt; OCRDMA_CREATE_QP_RSP_SQ_ID_SHIFT;</div><div class='add'>+	qp-&gt;max_ird = rsp-&gt;max_ord_ird &amp; OCRDMA_CREATE_QP_RSP_MAX_IRD_MASK;</div><div class='add'>+	qp-&gt;max_ord = (rsp-&gt;max_ord_ird &gt;&gt; OCRDMA_CREATE_QP_RSP_MAX_ORD_SHIFT);</div><div class='add'>+	qp-&gt;dpp_enabled = false;</div><div class='add'>+	if (rsp-&gt;dpp_response &amp; OCRDMA_CREATE_QP_RSP_DPP_ENABLED_MASK) {</div><div class='add'>+		qp-&gt;dpp_enabled = true;</div><div class='add'>+		*dpp_credit_lmt = (rsp-&gt;dpp_response &amp;</div><div class='add'>+				OCRDMA_CREATE_QP_RSP_DPP_CREDITS_MASK) &gt;&gt;</div><div class='add'>+				OCRDMA_CREATE_QP_RSP_DPP_CREDITS_SHIFT;</div><div class='add'>+		*dpp_offset = (rsp-&gt;dpp_response &amp;</div><div class='add'>+				OCRDMA_CREATE_QP_RSP_DPP_PAGE_OFFSET_MASK) &gt;&gt;</div><div class='add'>+				OCRDMA_CREATE_QP_RSP_DPP_PAGE_OFFSET_SHIFT;</div><div class='add'>+	}</div><div class='add'>+	max_wqe_allocated =</div><div class='add'>+		rsp-&gt;max_wqe_rqe &gt;&gt; OCRDMA_CREATE_QP_RSP_MAX_WQE_SHIFT;</div><div class='add'>+	max_wqe_allocated = 1 &lt;&lt; max_wqe_allocated;</div><div class='add'>+	max_rqe_allocated = 1 &lt;&lt; ((u16)rsp-&gt;max_wqe_rqe);</div><div class='add'>+</div><div class='add'>+	qp-&gt;sq.max_cnt = max_wqe_allocated;</div><div class='add'>+	qp-&gt;sq.max_wqe_idx = max_wqe_allocated - 1;</div><div class='add'>+</div><div class='add'>+	if (!attrs-&gt;srq) {</div><div class='add'>+		qp-&gt;rq.max_cnt = max_rqe_allocated;</div><div class='add'>+		qp-&gt;rq.max_wqe_idx = max_rqe_allocated - 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_create_qp(struct ocrdma_qp *qp, struct ib_qp_init_attr *attrs,</div><div class='add'>+			 u8 enable_dpp_cq, u16 dpp_cq_id, u16 *dpp_offset,</div><div class='add'>+			 u16 *dpp_credit_lmt)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	u32 flags = 0;</div><div class='add'>+	struct ocrdma_dev *dev = qp-&gt;dev;</div><div class='add'>+	struct ocrdma_pd *pd = qp-&gt;pd;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+	struct ocrdma_cq *cq;</div><div class='add'>+	struct ocrdma_create_qp_req *cmd;</div><div class='add'>+	struct ocrdma_create_qp_rsp *rsp;</div><div class='add'>+	int qptype;</div><div class='add'>+</div><div class='add'>+	switch (attrs-&gt;qp_type) {</div><div class='add'>+	case IB_QPT_GSI:</div><div class='add'>+		qptype = OCRDMA_QPT_GSI;</div><div class='add'>+		break;</div><div class='add'>+	case IB_QPT_RC:</div><div class='add'>+		qptype = OCRDMA_QPT_RC;</div><div class='add'>+		break;</div><div class='add'>+	case IB_QPT_UD:</div><div class='add'>+		qptype = OCRDMA_QPT_UD;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_CREATE_QP, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+	cmd-&gt;type_pgsz_pdn |= (qptype &lt;&lt; OCRDMA_CREATE_QP_REQ_QPT_SHIFT) &amp;</div><div class='add'>+						OCRDMA_CREATE_QP_REQ_QPT_MASK;</div><div class='add'>+	status = ocrdma_set_create_qp_sq_cmd(cmd, attrs, qp);</div><div class='add'>+	if (status)</div><div class='add'>+		goto sq_err;</div><div class='add'>+</div><div class='add'>+	if (attrs-&gt;srq) {</div><div class='add'>+		struct ocrdma_srq *srq = get_ocrdma_srq(attrs-&gt;srq);</div><div class='add'>+		cmd-&gt;max_sge_recv_flags |= OCRDMA_CREATE_QP_REQ_USE_SRQ_MASK;</div><div class='add'>+		cmd-&gt;rq_addr[0].lo = srq-&gt;id;</div><div class='add'>+		qp-&gt;srq = srq;</div><div class='add'>+	} else {</div><div class='add'>+		status = ocrdma_set_create_qp_rq_cmd(cmd, attrs, qp);</div><div class='add'>+		if (status)</div><div class='add'>+			goto rq_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = ocrdma_set_create_qp_ird_cmd(cmd, qp);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;type_pgsz_pdn |= (pd-&gt;id &lt;&lt; OCRDMA_CREATE_QP_REQ_PD_ID_SHIFT) &amp;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_PD_ID_MASK;</div><div class='add'>+</div><div class='add'>+	flags = ocrdma_set_create_qp_mbx_access_flags(qp);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;max_sge_recv_flags |= flags;</div><div class='add'>+	cmd-&gt;max_ord_ird |= (dev-&gt;attr.max_ord_per_qp &lt;&lt;</div><div class='add'>+			     OCRDMA_CREATE_QP_REQ_MAX_ORD_SHIFT) &amp;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_MAX_ORD_MASK;</div><div class='add'>+	cmd-&gt;max_ord_ird |= (dev-&gt;attr.max_ird_per_qp &lt;&lt;</div><div class='add'>+			     OCRDMA_CREATE_QP_REQ_MAX_IRD_SHIFT) &amp;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_MAX_IRD_MASK;</div><div class='add'>+	cq = get_ocrdma_cq(attrs-&gt;send_cq);</div><div class='add'>+	cmd-&gt;wq_rq_cqid |= (cq-&gt;id &lt;&lt; OCRDMA_CREATE_QP_REQ_WQ_CQID_SHIFT) &amp;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_WQ_CQID_MASK;</div><div class='add'>+	qp-&gt;sq_cq = cq;</div><div class='add'>+	cq = get_ocrdma_cq(attrs-&gt;recv_cq);</div><div class='add'>+	cmd-&gt;wq_rq_cqid |= (cq-&gt;id &lt;&lt; OCRDMA_CREATE_QP_REQ_RQ_CQID_SHIFT) &amp;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_RQ_CQID_MASK;</div><div class='add'>+	qp-&gt;rq_cq = cq;</div><div class='add'>+</div><div class='add'>+	if (pd-&gt;dpp_enabled &amp;&amp; attrs-&gt;cap.max_inline_data &amp;&amp; pd-&gt;num_dpp_qp &amp;&amp;</div><div class='add'>+	    (attrs-&gt;cap.max_inline_data &lt;= dev-&gt;attr.max_inline_data))</div><div class='add'>+		ocrdma_set_create_qp_dpp_cmd(cmd, pd, qp, enable_dpp_cq,</div><div class='add'>+					     dpp_cq_id);</div><div class='add'>+</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	rsp = (struct ocrdma_create_qp_rsp *)cmd;</div><div class='add'>+	ocrdma_get_create_qp_rsp(rsp, qp, attrs, dpp_offset, dpp_credit_lmt);</div><div class='add'>+	qp-&gt;state = OCRDMA_QPS_RST;</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return 0;</div><div class='add'>+mbx_err:</div><div class='add'>+	if (qp-&gt;rq.va)</div><div class='add'>+		dma_free_coherent(&amp;pdev-&gt;dev, qp-&gt;rq.len, qp-&gt;rq.va, qp-&gt;rq.pa);</div><div class='add'>+rq_err:</div><div class='add'>+	ocrdma_err("%s(%d) rq_err\n", __func__, dev-&gt;id);</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, qp-&gt;sq.len, qp-&gt;sq.va, qp-&gt;sq.pa);</div><div class='add'>+sq_err:</div><div class='add'>+	ocrdma_err("%s(%d) sq_err\n", __func__, dev-&gt;id);</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_query_qp(struct ocrdma_dev *dev, struct ocrdma_qp *qp,</div><div class='add'>+			struct ocrdma_qp_params *param)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_query_qp *cmd;</div><div class='add'>+	struct ocrdma_query_qp_rsp *rsp;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_QUERY_QP, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+	cmd-&gt;qp_id = qp-&gt;id;</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	rsp = (struct ocrdma_query_qp_rsp *)cmd;</div><div class='add'>+	memcpy(param, &amp;rsp-&gt;params, sizeof(struct ocrdma_qp_params));</div><div class='add'>+mbx_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_resolve_dgid(struct ocrdma_dev *dev, union ib_gid *dgid,</div><div class='add'>+			u8 *mac_addr)</div><div class='add'>+{</div><div class='add'>+	struct in6_addr in6;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;in6, dgid, sizeof in6);</div><div class='add'>+	if (rdma_is_multicast_addr(&amp;in6))</div><div class='add'>+		rdma_get_mcast_mac(&amp;in6, mac_addr);</div><div class='add'>+	else if (rdma_link_local_addr(&amp;in6))</div><div class='add'>+		rdma_get_ll_mac(&amp;in6, mac_addr);</div><div class='add'>+	else {</div><div class='add'>+		ocrdma_err("%s() fail to resolve mac_addr.\n", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_set_av_params(struct ocrdma_qp *qp,</div><div class='add'>+				struct ocrdma_modify_qp *cmd,</div><div class='add'>+				struct ib_qp_attr *attrs)</div><div class='add'>+{</div><div class='add'>+	struct ib_ah_attr *ah_attr = &amp;attrs-&gt;ah_attr;</div><div class='add'>+	union ib_gid sgid;</div><div class='add'>+	u32 vlan_id;</div><div class='add'>+	u8 mac_addr[6];</div><div class='add'>+	if ((ah_attr-&gt;ah_flags &amp; IB_AH_GRH) == 0)</div><div class='add'>+		return;</div><div class='add'>+	cmd-&gt;params.tclass_sq_psn |=</div><div class='add'>+	    (ah_attr-&gt;grh.traffic_class &lt;&lt; OCRDMA_QP_PARAMS_TCLASS_SHIFT);</div><div class='add'>+	cmd-&gt;params.rnt_rc_sl_fl |=</div><div class='add'>+	    (ah_attr-&gt;grh.flow_label &amp; OCRDMA_QP_PARAMS_FLOW_LABEL_MASK);</div><div class='add'>+	cmd-&gt;params.hop_lmt_rq_psn |=</div><div class='add'>+	    (ah_attr-&gt;grh.hop_limit &lt;&lt; OCRDMA_QP_PARAMS_HOP_LMT_SHIFT);</div><div class='add'>+	cmd-&gt;flags |= OCRDMA_QP_PARA_FLOW_LBL_VALID;</div><div class='add'>+	memcpy(&amp;cmd-&gt;params.dgid[0], &amp;ah_attr-&gt;grh.dgid.raw[0],</div><div class='add'>+	       sizeof(cmd-&gt;params.dgid));</div><div class='add'>+	ocrdma_query_gid(&amp;qp-&gt;dev-&gt;ibdev, 1,</div><div class='add'>+			 ah_attr-&gt;grh.sgid_index, &amp;sgid);</div><div class='add'>+	qp-&gt;sgid_idx = ah_attr-&gt;grh.sgid_index;</div><div class='add'>+	memcpy(&amp;cmd-&gt;params.sgid[0], &amp;sgid.raw[0], sizeof(cmd-&gt;params.sgid));</div><div class='add'>+	ocrdma_resolve_dgid(qp-&gt;dev, &amp;ah_attr-&gt;grh.dgid, &amp;mac_addr[0]);</div><div class='add'>+	cmd-&gt;params.dmac_b0_to_b3 = mac_addr[0] | (mac_addr[1] &lt;&lt; 8) |</div><div class='add'>+				(mac_addr[2] &lt;&lt; 16) | (mac_addr[3] &lt;&lt; 24);</div><div class='add'>+	/* convert them to LE format. */</div><div class='add'>+	ocrdma_cpu_to_le32(&amp;cmd-&gt;params.dgid[0], sizeof(cmd-&gt;params.dgid));</div><div class='add'>+	ocrdma_cpu_to_le32(&amp;cmd-&gt;params.sgid[0], sizeof(cmd-&gt;params.sgid));</div><div class='add'>+	cmd-&gt;params.vlan_dmac_b4_to_b5 = mac_addr[4] | (mac_addr[5] &lt;&lt; 8);</div><div class='add'>+	vlan_id = rdma_get_vlan_id(&amp;sgid);</div><div class='add'>+	if (vlan_id &amp;&amp; (vlan_id &lt; 0x1000)) {</div><div class='add'>+		cmd-&gt;params.vlan_dmac_b4_to_b5 |=</div><div class='add'>+		    vlan_id &lt;&lt; OCRDMA_QP_PARAMS_VLAN_SHIFT;</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_VLAN_EN_VALID;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_set_qp_params(struct ocrdma_qp *qp,</div><div class='add'>+				struct ocrdma_modify_qp *cmd,</div><div class='add'>+				struct ib_qp_attr *attrs, int attr_mask,</div><div class='add'>+				enum ib_qp_state old_qps)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	struct net_device *netdev = qp-&gt;dev-&gt;nic_info.netdev;</div><div class='add'>+	int eth_mtu = iboe_get_mtu(netdev-&gt;mtu);</div><div class='add'>+</div><div class='add'>+	if (attr_mask &amp; IB_QP_PKEY_INDEX) {</div><div class='add'>+		cmd-&gt;params.path_mtu_pkey_indx |= (attrs-&gt;pkey_index &amp;</div><div class='add'>+					    OCRDMA_QP_PARAMS_PKEY_INDEX_MASK);</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_PKEY_VALID;</div><div class='add'>+	}</div><div class='add'>+	if (attr_mask &amp; IB_QP_QKEY) {</div><div class='add'>+		qp-&gt;qkey = attrs-&gt;qkey;</div><div class='add'>+		cmd-&gt;params.qkey = attrs-&gt;qkey;</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_QKEY_VALID;</div><div class='add'>+	}</div><div class='add'>+	if (attr_mask &amp; IB_QP_AV)</div><div class='add'>+		ocrdma_set_av_params(qp, cmd, attrs);</div><div class='add'>+	else if (qp-&gt;qp_type == IB_QPT_GSI || qp-&gt;qp_type == IB_QPT_UD) {</div><div class='add'>+		/* set the default mac address for UD, GSI QPs */</div><div class='add'>+		cmd-&gt;params.dmac_b0_to_b3 = qp-&gt;dev-&gt;nic_info.mac_addr[0] |</div><div class='add'>+			(qp-&gt;dev-&gt;nic_info.mac_addr[1] &lt;&lt; 8) |</div><div class='add'>+			(qp-&gt;dev-&gt;nic_info.mac_addr[2] &lt;&lt; 16) |</div><div class='add'>+			(qp-&gt;dev-&gt;nic_info.mac_addr[3] &lt;&lt; 24);</div><div class='add'>+		cmd-&gt;params.vlan_dmac_b4_to_b5 = qp-&gt;dev-&gt;nic_info.mac_addr[4] |</div><div class='add'>+					(qp-&gt;dev-&gt;nic_info.mac_addr[5] &lt;&lt; 8);</div><div class='add'>+	}</div><div class='add'>+	if ((attr_mask &amp; IB_QP_EN_SQD_ASYNC_NOTIFY) &amp;&amp;</div><div class='add'>+	    attrs-&gt;en_sqd_async_notify) {</div><div class='add'>+		cmd-&gt;params.max_sge_recv_flags |=</div><div class='add'>+			OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC;</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_DST_QPN_VALID;</div><div class='add'>+	}</div><div class='add'>+	if (attr_mask &amp; IB_QP_DEST_QPN) {</div><div class='add'>+		cmd-&gt;params.ack_to_rnr_rtc_dest_qpn |= (attrs-&gt;dest_qp_num &amp;</div><div class='add'>+				OCRDMA_QP_PARAMS_DEST_QPN_MASK);</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_DST_QPN_VALID;</div><div class='add'>+	}</div><div class='add'>+	if (attr_mask &amp; IB_QP_PATH_MTU) {</div><div class='add'>+		if (ib_mtu_enum_to_int(eth_mtu) &lt;</div><div class='add'>+		    ib_mtu_enum_to_int(attrs-&gt;path_mtu)) {</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			goto pmtu_err;</div><div class='add'>+		}</div><div class='add'>+		cmd-&gt;params.path_mtu_pkey_indx |=</div><div class='add'>+		    (ib_mtu_enum_to_int(attrs-&gt;path_mtu) &lt;&lt;</div><div class='add'>+		     OCRDMA_QP_PARAMS_PATH_MTU_SHIFT) &amp;</div><div class='add'>+		    OCRDMA_QP_PARAMS_PATH_MTU_MASK;</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_PMTU_VALID;</div><div class='add'>+	}</div><div class='add'>+	if (attr_mask &amp; IB_QP_TIMEOUT) {</div><div class='add'>+		cmd-&gt;params.ack_to_rnr_rtc_dest_qpn |= attrs-&gt;timeout &lt;&lt;</div><div class='add'>+		    OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_ACK_TO_VALID;</div><div class='add'>+	}</div><div class='add'>+	if (attr_mask &amp; IB_QP_RETRY_CNT) {</div><div class='add'>+		cmd-&gt;params.rnt_rc_sl_fl |= (attrs-&gt;retry_cnt &lt;&lt;</div><div class='add'>+				      OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT) &amp;</div><div class='add'>+		    OCRDMA_QP_PARAMS_RETRY_CNT_MASK;</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_RETRY_CNT_VALID;</div><div class='add'>+	}</div><div class='add'>+	if (attr_mask &amp; IB_QP_MIN_RNR_TIMER) {</div><div class='add'>+		cmd-&gt;params.rnt_rc_sl_fl |= (attrs-&gt;min_rnr_timer &lt;&lt;</div><div class='add'>+				      OCRDMA_QP_PARAMS_RNR_NAK_TIMER_SHIFT) &amp;</div><div class='add'>+		    OCRDMA_QP_PARAMS_RNR_NAK_TIMER_MASK;</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_RNT_VALID;</div><div class='add'>+	}</div><div class='add'>+	if (attr_mask &amp; IB_QP_RNR_RETRY) {</div><div class='add'>+		cmd-&gt;params.ack_to_rnr_rtc_dest_qpn |= (attrs-&gt;rnr_retry &lt;&lt;</div><div class='add'>+			OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT)</div><div class='add'>+			&amp; OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK;</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_RRC_VALID;</div><div class='add'>+	}</div><div class='add'>+	if (attr_mask &amp; IB_QP_SQ_PSN) {</div><div class='add'>+		cmd-&gt;params.tclass_sq_psn |= (attrs-&gt;sq_psn &amp; 0x00ffffff);</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_SQPSN_VALID;</div><div class='add'>+	}</div><div class='add'>+	if (attr_mask &amp; IB_QP_RQ_PSN) {</div><div class='add'>+		cmd-&gt;params.hop_lmt_rq_psn |= (attrs-&gt;rq_psn &amp; 0x00ffffff);</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_RQPSN_VALID;</div><div class='add'>+	}</div><div class='add'>+	if (attr_mask &amp; IB_QP_MAX_QP_RD_ATOMIC) {</div><div class='add'>+		if (attrs-&gt;max_rd_atomic &gt; qp-&gt;dev-&gt;attr.max_ord_per_qp) {</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			goto pmtu_err;</div><div class='add'>+		}</div><div class='add'>+		qp-&gt;max_ord = attrs-&gt;max_rd_atomic;</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_MAX_ORD_VALID;</div><div class='add'>+	}</div><div class='add'>+	if (attr_mask &amp; IB_QP_MAX_DEST_RD_ATOMIC) {</div><div class='add'>+		if (attrs-&gt;max_dest_rd_atomic &gt; qp-&gt;dev-&gt;attr.max_ird_per_qp) {</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			goto pmtu_err;</div><div class='add'>+		}</div><div class='add'>+		qp-&gt;max_ird = attrs-&gt;max_dest_rd_atomic;</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_MAX_IRD_VALID;</div><div class='add'>+	}</div><div class='add'>+	cmd-&gt;params.max_ord_ird = (qp-&gt;max_ord &lt;&lt;</div><div class='add'>+				OCRDMA_QP_PARAMS_MAX_ORD_SHIFT) |</div><div class='add'>+				(qp-&gt;max_ird &amp; OCRDMA_QP_PARAMS_MAX_IRD_MASK);</div><div class='add'>+pmtu_err:</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_modify_qp(struct ocrdma_dev *dev, struct ocrdma_qp *qp,</div><div class='add'>+			 struct ib_qp_attr *attrs, int attr_mask,</div><div class='add'>+			 enum ib_qp_state old_qps)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_modify_qp *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_MODIFY_QP, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;params.id = qp-&gt;id;</div><div class='add'>+	cmd-&gt;flags = 0;</div><div class='add'>+	if (attr_mask &amp; IB_QP_STATE) {</div><div class='add'>+		cmd-&gt;params.max_sge_recv_flags |=</div><div class='add'>+		    (get_ocrdma_qp_state(attrs-&gt;qp_state) &lt;&lt;</div><div class='add'>+		     OCRDMA_QP_PARAMS_STATE_SHIFT) &amp;</div><div class='add'>+		    OCRDMA_QP_PARAMS_STATE_MASK;</div><div class='add'>+		cmd-&gt;flags |= OCRDMA_QP_PARA_QPS_VALID;</div><div class='add'>+	} else</div><div class='add'>+		cmd-&gt;params.max_sge_recv_flags |=</div><div class='add'>+		    (qp-&gt;state &lt;&lt; OCRDMA_QP_PARAMS_STATE_SHIFT) &amp;</div><div class='add'>+		    OCRDMA_QP_PARAMS_STATE_MASK;</div><div class='add'>+	status = ocrdma_set_qp_params(qp, cmd, attrs, attr_mask, old_qps);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+</div><div class='add'>+mbx_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_destroy_qp(struct ocrdma_dev *dev, struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_destroy_qp *cmd;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_DELETE_QP, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+	cmd-&gt;qp_id = qp-&gt;id;</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+</div><div class='add'>+mbx_err:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	if (qp-&gt;sq.va)</div><div class='add'>+		dma_free_coherent(&amp;pdev-&gt;dev, qp-&gt;sq.len, qp-&gt;sq.va, qp-&gt;sq.pa);</div><div class='add'>+	if (!qp-&gt;srq &amp;&amp; qp-&gt;rq.va)</div><div class='add'>+		dma_free_coherent(&amp;pdev-&gt;dev, qp-&gt;rq.len, qp-&gt;rq.va, qp-&gt;rq.pa);</div><div class='add'>+	if (qp-&gt;dpp_enabled)</div><div class='add'>+		qp-&gt;pd-&gt;num_dpp_qp++;</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_create_srq(struct ocrdma_srq *srq,</div><div class='add'>+			  struct ib_srq_init_attr *srq_attr,</div><div class='add'>+			  struct ocrdma_pd *pd)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	int hw_pages, hw_page_size;</div><div class='add'>+	int len;</div><div class='add'>+	struct ocrdma_create_srq_rsp *rsp;</div><div class='add'>+	struct ocrdma_create_srq *cmd;</div><div class='add'>+	dma_addr_t pa;</div><div class='add'>+	struct ocrdma_dev *dev = srq-&gt;dev;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+	u32 max_rqe_allocated;</div><div class='add'>+</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_CREATE_SRQ, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;pgsz_pdid = pd-&gt;id &amp; OCRDMA_CREATE_SRQ_PD_ID_MASK;</div><div class='add'>+	max_rqe_allocated = srq_attr-&gt;attr.max_wr + 1;</div><div class='add'>+	status = ocrdma_build_q_conf(&amp;max_rqe_allocated,</div><div class='add'>+				dev-&gt;attr.rqe_size,</div><div class='add'>+				&amp;hw_pages, &amp;hw_page_size);</div><div class='add'>+	if (status) {</div><div class='add'>+		ocrdma_err("%s() req. max_wr=0x%x\n", __func__,</div><div class='add'>+			   srq_attr-&gt;attr.max_wr);</div><div class='add'>+		status = -EINVAL;</div><div class='add'>+		goto ret;</div><div class='add'>+	}</div><div class='add'>+	len = hw_pages * hw_page_size;</div><div class='add'>+	srq-&gt;rq.va = dma_alloc_coherent(&amp;pdev-&gt;dev, len, &amp;pa, GFP_KERNEL);</div><div class='add'>+	if (!srq-&gt;rq.va) {</div><div class='add'>+		status = -ENOMEM;</div><div class='add'>+		goto ret;</div><div class='add'>+	}</div><div class='add'>+	ocrdma_build_q_pages(&amp;cmd-&gt;rq_addr[0], hw_pages, pa, hw_page_size);</div><div class='add'>+</div><div class='add'>+	srq-&gt;rq.entry_size = dev-&gt;attr.rqe_size;</div><div class='add'>+	srq-&gt;rq.pa = pa;</div><div class='add'>+	srq-&gt;rq.len = len;</div><div class='add'>+	srq-&gt;rq.max_cnt = max_rqe_allocated;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;max_sge_rqe = ilog2(max_rqe_allocated);</div><div class='add'>+	cmd-&gt;max_sge_rqe |= srq_attr-&gt;attr.max_sge &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_SRQ_MAX_SGE_RECV_SHIFT;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;pgsz_pdid |= (ilog2(hw_page_size / OCRDMA_MIN_Q_PAGE_SIZE)</div><div class='add'>+		&lt;&lt; OCRDMA_CREATE_SRQ_PG_SZ_SHIFT);</div><div class='add'>+	cmd-&gt;pages_rqe_sz |= (dev-&gt;attr.rqe_size</div><div class='add'>+		&lt;&lt; OCRDMA_CREATE_SRQ_RQE_SIZE_SHIFT)</div><div class='add'>+		&amp; OCRDMA_CREATE_SRQ_RQE_SIZE_MASK;</div><div class='add'>+	cmd-&gt;pages_rqe_sz |= hw_pages &lt;&lt; OCRDMA_CREATE_SRQ_NUM_RQ_PAGES_SHIFT;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	rsp = (struct ocrdma_create_srq_rsp *)cmd;</div><div class='add'>+	srq-&gt;id = rsp-&gt;id;</div><div class='add'>+	srq-&gt;rq.dbid = rsp-&gt;id;</div><div class='add'>+	max_rqe_allocated = ((rsp-&gt;max_sge_rqe_allocated &amp;</div><div class='add'>+		OCRDMA_CREATE_SRQ_RSP_MAX_RQE_ALLOCATED_MASK) &gt;&gt;</div><div class='add'>+		OCRDMA_CREATE_SRQ_RSP_MAX_RQE_ALLOCATED_SHIFT);</div><div class='add'>+	max_rqe_allocated = (1 &lt;&lt; max_rqe_allocated);</div><div class='add'>+	srq-&gt;rq.max_cnt = max_rqe_allocated;</div><div class='add'>+	srq-&gt;rq.max_wqe_idx = max_rqe_allocated - 1;</div><div class='add'>+	srq-&gt;rq.max_sges = (rsp-&gt;max_sge_rqe_allocated &amp;</div><div class='add'>+		OCRDMA_CREATE_SRQ_RSP_MAX_SGE_RECV_ALLOCATED_MASK) &gt;&gt;</div><div class='add'>+		OCRDMA_CREATE_SRQ_RSP_MAX_SGE_RECV_ALLOCATED_SHIFT;</div><div class='add'>+	goto ret;</div><div class='add'>+mbx_err:</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, srq-&gt;rq.len, srq-&gt;rq.va, pa);</div><div class='add'>+ret:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_modify_srq(struct ocrdma_srq *srq, struct ib_srq_attr *srq_attr)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_modify_srq *cmd;</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_CREATE_SRQ, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+	cmd-&gt;id = srq-&gt;id;</div><div class='add'>+	cmd-&gt;limit_max_rqe |= srq_attr-&gt;srq_limit &lt;&lt;</div><div class='add'>+	    OCRDMA_MODIFY_SRQ_LIMIT_SHIFT;</div><div class='add'>+	status = ocrdma_mbx_cmd(srq-&gt;dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_query_srq(struct ocrdma_srq *srq, struct ib_srq_attr *srq_attr)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_query_srq *cmd;</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_CREATE_SRQ, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+	cmd-&gt;id = srq-&gt;rq.dbid;</div><div class='add'>+	status = ocrdma_mbx_cmd(srq-&gt;dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (status == 0) {</div><div class='add'>+		struct ocrdma_query_srq_rsp *rsp =</div><div class='add'>+		    (struct ocrdma_query_srq_rsp *)cmd;</div><div class='add'>+		srq_attr-&gt;max_sge =</div><div class='add'>+		    rsp-&gt;srq_lmt_max_sge &amp;</div><div class='add'>+		    OCRDMA_QUERY_SRQ_RSP_MAX_SGE_RECV_MASK;</div><div class='add'>+		srq_attr-&gt;max_wr =</div><div class='add'>+		    rsp-&gt;max_rqe_pdid &gt;&gt; OCRDMA_QUERY_SRQ_RSP_MAX_RQE_SHIFT;</div><div class='add'>+		srq_attr-&gt;srq_limit = rsp-&gt;srq_lmt_max_sge &gt;&gt;</div><div class='add'>+		    OCRDMA_QUERY_SRQ_RSP_SRQ_LIMIT_SHIFT;</div><div class='add'>+	}</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_destroy_srq(struct ocrdma_dev *dev, struct ocrdma_srq *srq)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_destroy_srq *cmd;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+	cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_DELETE_SRQ, sizeof(*cmd));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return status;</div><div class='add'>+	cmd-&gt;id = srq-&gt;id;</div><div class='add'>+	status = ocrdma_mbx_cmd(srq-&gt;dev, (struct ocrdma_mqe *)cmd);</div><div class='add'>+	if (srq-&gt;rq.va)</div><div class='add'>+		dma_free_coherent(&amp;pdev-&gt;dev, srq-&gt;rq.len,</div><div class='add'>+				  srq-&gt;rq.va, srq-&gt;rq.pa);</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_alloc_av(struct ocrdma_dev *dev, struct ocrdma_ah *ah)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int status = -EINVAL;</div><div class='add'>+	struct ocrdma_av *av;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	av = dev-&gt;av_tbl.va;</div><div class='add'>+	spin_lock_irqsave(&amp;dev-&gt;av_tbl.lock, flags);</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;av_tbl.num_ah; i++) {</div><div class='add'>+		if (av-&gt;valid == 0) {</div><div class='add'>+			av-&gt;valid = OCRDMA_AV_VALID;</div><div class='add'>+			ah-&gt;av = av;</div><div class='add'>+			ah-&gt;id = i;</div><div class='add'>+			status = 0;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		av++;</div><div class='add'>+	}</div><div class='add'>+	if (i == dev-&gt;av_tbl.num_ah)</div><div class='add'>+		status = -EAGAIN;</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev-&gt;av_tbl.lock, flags);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_free_av(struct ocrdma_dev *dev, struct ocrdma_ah *ah)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	spin_lock_irqsave(&amp;dev-&gt;av_tbl.lock, flags);</div><div class='add'>+	ah-&gt;av-&gt;valid = 0;</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev-&gt;av_tbl.lock, flags);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_create_mq_eq(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	int irq;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	int num_eq = 0;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;nic_info.intr_mode == BE_INTERRUPT_MODE_INTX)</div><div class='add'>+		flags = IRQF_SHARED;</div><div class='add'>+	else {</div><div class='add'>+		num_eq = dev-&gt;nic_info.msix.num_vectors -</div><div class='add'>+				dev-&gt;nic_info.msix.start_vector;</div><div class='add'>+		/* minimum two vectors/eq are required for rdma to work.</div><div class='add'>+		 * one for control path and one for data path.</div><div class='add'>+		 */</div><div class='add'>+		if (num_eq &lt; 2)</div><div class='add'>+			return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = ocrdma_create_eq(dev, &amp;dev-&gt;meq, OCRDMA_EQ_LEN);</div><div class='add'>+	if (status)</div><div class='add'>+		return status;</div><div class='add'>+	sprintf(dev-&gt;meq.irq_name, "ocrdma_mq%d", dev-&gt;id);</div><div class='add'>+	irq = ocrdma_get_irq(dev, &amp;dev-&gt;meq);</div><div class='add'>+	status = request_irq(irq, ocrdma_irq_handler, flags, dev-&gt;meq.irq_name,</div><div class='add'>+			     &amp;dev-&gt;meq);</div><div class='add'>+	if (status)</div><div class='add'>+		_ocrdma_destroy_eq(dev, &amp;dev-&gt;meq);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_create_qp_eqs(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int num_eq, i, status = 0;</div><div class='add'>+	int irq;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+</div><div class='add'>+	num_eq = dev-&gt;nic_info.msix.num_vectors -</div><div class='add'>+			dev-&gt;nic_info.msix.start_vector;</div><div class='add'>+	if (dev-&gt;nic_info.intr_mode == BE_INTERRUPT_MODE_INTX) {</div><div class='add'>+		num_eq = 1;</div><div class='add'>+		flags = IRQF_SHARED;</div><div class='add'>+	} else</div><div class='add'>+		num_eq = min_t(u32, num_eq, num_online_cpus());</div><div class='add'>+	dev-&gt;qp_eq_tbl = kzalloc(sizeof(struct ocrdma_eq) * num_eq, GFP_KERNEL);</div><div class='add'>+	if (!dev-&gt;qp_eq_tbl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_eq; i++) {</div><div class='add'>+		status = ocrdma_create_eq(dev, &amp;dev-&gt;qp_eq_tbl[i],</div><div class='add'>+					  OCRDMA_EQ_LEN);</div><div class='add'>+		if (status) {</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		sprintf(dev-&gt;qp_eq_tbl[i].irq_name, "ocrdma_qp%d-%d",</div><div class='add'>+			dev-&gt;id, i);</div><div class='add'>+		irq = ocrdma_get_irq(dev, &amp;dev-&gt;qp_eq_tbl[i]);</div><div class='add'>+		status = request_irq(irq, ocrdma_irq_handler, flags,</div><div class='add'>+				     dev-&gt;qp_eq_tbl[i].irq_name,</div><div class='add'>+				     &amp;dev-&gt;qp_eq_tbl[i]);</div><div class='add'>+		if (status) {</div><div class='add'>+			_ocrdma_destroy_eq(dev, &amp;dev-&gt;qp_eq_tbl[i]);</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		dev-&gt;eq_cnt += 1;</div><div class='add'>+	}</div><div class='add'>+	/* one eq is sufficient for data path to work */</div><div class='add'>+	if (dev-&gt;eq_cnt &gt;= 1)</div><div class='add'>+		return 0;</div><div class='add'>+	if (status)</div><div class='add'>+		ocrdma_destroy_qp_eqs(dev);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_init_hw(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	/* set up control path eq */</div><div class='add'>+	status = ocrdma_create_mq_eq(dev);</div><div class='add'>+	if (status)</div><div class='add'>+		return status;</div><div class='add'>+	/* set up data path eq */</div><div class='add'>+	status = ocrdma_create_qp_eqs(dev);</div><div class='add'>+	if (status)</div><div class='add'>+		goto qpeq_err;</div><div class='add'>+	status = ocrdma_create_mq(dev);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mq_err;</div><div class='add'>+	status = ocrdma_mbx_query_fw_config(dev);</div><div class='add'>+	if (status)</div><div class='add'>+		goto conf_err;</div><div class='add'>+	status = ocrdma_mbx_query_dev(dev);</div><div class='add'>+	if (status)</div><div class='add'>+		goto conf_err;</div><div class='add'>+	status = ocrdma_mbx_query_fw_ver(dev);</div><div class='add'>+	if (status)</div><div class='add'>+		goto conf_err;</div><div class='add'>+	status = ocrdma_mbx_create_ah_tbl(dev);</div><div class='add'>+	if (status)</div><div class='add'>+		goto conf_err;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+conf_err:</div><div class='add'>+	ocrdma_destroy_mq(dev);</div><div class='add'>+mq_err:</div><div class='add'>+	ocrdma_destroy_qp_eqs(dev);</div><div class='add'>+qpeq_err:</div><div class='add'>+	ocrdma_destroy_eq(dev, &amp;dev-&gt;meq);</div><div class='add'>+	ocrdma_err("%s() status=%d\n", __func__, status);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ocrdma_cleanup_hw(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	ocrdma_mbx_delete_ah_tbl(dev);</div><div class='add'>+</div><div class='add'>+	/* cleanup the data path eqs */</div><div class='add'>+	ocrdma_destroy_qp_eqs(dev);</div><div class='add'>+</div><div class='add'>+	/* cleanup the control path */</div><div class='add'>+	ocrdma_destroy_mq(dev);</div><div class='add'>+	ocrdma_destroy_eq(dev, &amp;dev-&gt;meq);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_hw.h b/drivers/infiniband/hw/ocrdma/ocrdma_hw.h<br/>new file mode 100644<br/>index 000000000000..be5db77404db<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ocrdma/ocrdma_hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_hw.h</a></div><div class='hunk'>@@ -0,0 +1,132 @@</div><div class='add'>+/*******************************************************************</div><div class='add'>+ * This file is part of the Emulex RoCE Device Driver for          *</div><div class='add'>+ * RoCE (RDMA over Converged Ethernet) CNA Adapters.              *</div><div class='add'>+ * Copyright (C) 2008-2012 Emulex. All rights reserved.            *</div><div class='add'>+ * EMULEX and SLI are trademarks of Emulex.                        *</div><div class='add'>+ * www.emulex.com                                                  *</div><div class='add'>+ *                                                                 *</div><div class='add'>+ * This program is free software; you can redistribute it and/or   *</div><div class='add'>+ * modify it under the terms of version 2 of the GNU General       *</div><div class='add'>+ * Public License as published by the Free Software Foundation.    *</div><div class='add'>+ * This program is distributed in the hope that it will be useful. *</div><div class='add'>+ * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *</div><div class='add'>+ * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *</div><div class='add'>+ * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *</div><div class='add'>+ * TO BE LEGALLY INVALID.  See the GNU General Public License for  *</div><div class='add'>+ * more details, a copy of which can be found in the file COPYING  *</div><div class='add'>+ * included with this package.                                     *</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ * linux-drivers@emulex.com</div><div class='add'>+ *</div><div class='add'>+ * Emulex</div><div class='add'>+ * 3333 Susan Street</div><div class='add'>+ * Costa Mesa, CA 92626</div><div class='add'>+ *******************************************************************/</div><div class='add'>+</div><div class='add'>+#ifndef __OCRDMA_HW_H__</div><div class='add'>+#define __OCRDMA_HW_H__</div><div class='add'>+</div><div class='add'>+#include "ocrdma_sli.h"</div><div class='add'>+</div><div class='add'>+static inline void ocrdma_cpu_to_le32(void *dst, u32 len)</div><div class='add'>+{</div><div class='add'>+#ifdef __BIG_ENDIAN</div><div class='add'>+	int i = 0;</div><div class='add'>+	u32 *src_ptr = dst;</div><div class='add'>+	u32 *dst_ptr = dst;</div><div class='add'>+	for (; i &lt; (len / 4); i++)</div><div class='add'>+		*(dst_ptr + i) = cpu_to_le32p(src_ptr + i);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ocrdma_le32_to_cpu(void *dst, u32 len)</div><div class='add'>+{</div><div class='add'>+#ifdef __BIG_ENDIAN</div><div class='add'>+	int i = 0;</div><div class='add'>+	u32 *src_ptr = dst;</div><div class='add'>+	u32 *dst_ptr = dst;</div><div class='add'>+	for (; i &lt; (len / sizeof(u32)); i++)</div><div class='add'>+		*(dst_ptr + i) = le32_to_cpu(*(src_ptr + i));</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ocrdma_copy_cpu_to_le32(void *dst, void *src, u32 len)</div><div class='add'>+{</div><div class='add'>+#ifdef __BIG_ENDIAN</div><div class='add'>+	int i = 0;</div><div class='add'>+	u32 *src_ptr = src;</div><div class='add'>+	u32 *dst_ptr = dst;</div><div class='add'>+	for (; i &lt; (len / sizeof(u32)); i++)</div><div class='add'>+		*(dst_ptr + i) = cpu_to_le32p(src_ptr + i);</div><div class='add'>+#else</div><div class='add'>+	memcpy(dst, src, len);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ocrdma_copy_le32_to_cpu(void *dst, void *src, u32 len)</div><div class='add'>+{</div><div class='add'>+#ifdef __BIG_ENDIAN</div><div class='add'>+	int i = 0;</div><div class='add'>+	u32 *src_ptr = src;</div><div class='add'>+	u32 *dst_ptr = dst;</div><div class='add'>+	for (; i &lt; len / sizeof(u32); i++)</div><div class='add'>+		*(dst_ptr + i) = le32_to_cpu(*(src_ptr + i));</div><div class='add'>+#else</div><div class='add'>+	memcpy(dst, src, len);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_init_hw(struct ocrdma_dev *);</div><div class='add'>+void ocrdma_cleanup_hw(struct ocrdma_dev *);</div><div class='add'>+</div><div class='add'>+enum ib_qp_state get_ibqp_state(enum ocrdma_qp_state qps);</div><div class='add'>+void ocrdma_ring_cq_db(struct ocrdma_dev *, u16 cq_id, bool armed,</div><div class='add'>+		       bool solicited, u16 cqe_popped);</div><div class='add'>+</div><div class='add'>+/* verbs specific mailbox commands */</div><div class='add'>+int ocrdma_query_config(struct ocrdma_dev *,</div><div class='add'>+			struct ocrdma_mbx_query_config *config);</div><div class='add'>+int ocrdma_resolve_dgid(struct ocrdma_dev *, union ib_gid *dgid, u8 *mac_addr);</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_alloc_pd(struct ocrdma_dev *, struct ocrdma_pd *);</div><div class='add'>+int ocrdma_mbx_dealloc_pd(struct ocrdma_dev *, struct ocrdma_pd *);</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_alloc_lkey(struct ocrdma_dev *, struct ocrdma_hw_mr *hwmr,</div><div class='add'>+			  u32 pd_id, int addr_check);</div><div class='add'>+int ocrdma_mbx_dealloc_lkey(struct ocrdma_dev *, int fmr, u32 lkey);</div><div class='add'>+</div><div class='add'>+int ocrdma_reg_mr(struct ocrdma_dev *, struct ocrdma_hw_mr *hwmr,</div><div class='add'>+			u32 pd_id, int acc);</div><div class='add'>+int ocrdma_mbx_create_cq(struct ocrdma_dev *, struct ocrdma_cq *,</div><div class='add'>+				int entries, int dpp_cq);</div><div class='add'>+int ocrdma_mbx_destroy_cq(struct ocrdma_dev *, struct ocrdma_cq *);</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_create_qp(struct ocrdma_qp *, struct ib_qp_init_attr *attrs,</div><div class='add'>+			 u8 enable_dpp_cq, u16 dpp_cq_id, u16 *dpp_offset,</div><div class='add'>+			 u16 *dpp_credit_lmt);</div><div class='add'>+int ocrdma_mbx_modify_qp(struct ocrdma_dev *, struct ocrdma_qp *,</div><div class='add'>+			 struct ib_qp_attr *attrs, int attr_mask,</div><div class='add'>+			 enum ib_qp_state old_qps);</div><div class='add'>+int ocrdma_mbx_query_qp(struct ocrdma_dev *, struct ocrdma_qp *,</div><div class='add'>+			struct ocrdma_qp_params *param);</div><div class='add'>+int ocrdma_mbx_destroy_qp(struct ocrdma_dev *, struct ocrdma_qp *);</div><div class='add'>+</div><div class='add'>+int ocrdma_mbx_create_srq(struct ocrdma_srq *,</div><div class='add'>+			  struct ib_srq_init_attr *,</div><div class='add'>+			  struct ocrdma_pd *);</div><div class='add'>+int ocrdma_mbx_modify_srq(struct ocrdma_srq *, struct ib_srq_attr *);</div><div class='add'>+int ocrdma_mbx_query_srq(struct ocrdma_srq *, struct ib_srq_attr *);</div><div class='add'>+int ocrdma_mbx_destroy_srq(struct ocrdma_dev *, struct ocrdma_srq *);</div><div class='add'>+</div><div class='add'>+int ocrdma_alloc_av(struct ocrdma_dev *, struct ocrdma_ah *);</div><div class='add'>+int ocrdma_free_av(struct ocrdma_dev *, struct ocrdma_ah *);</div><div class='add'>+</div><div class='add'>+int ocrdma_qp_state_machine(struct ocrdma_qp *, enum ib_qp_state new_state,</div><div class='add'>+			    enum ib_qp_state *old_ib_state);</div><div class='add'>+bool ocrdma_is_qp_in_sq_flushlist(struct ocrdma_cq *, struct ocrdma_qp *);</div><div class='add'>+bool ocrdma_is_qp_in_rq_flushlist(struct ocrdma_cq *, struct ocrdma_qp *);</div><div class='add'>+void ocrdma_flush_qp(struct ocrdma_qp *);</div><div class='add'>+</div><div class='add'>+#endif				/* __OCRDMA_HW_H__ */</div><div class='head'>diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_main.c b/drivers/infiniband/hw/ocrdma/ocrdma_main.c<br/>new file mode 100644<br/>index 000000000000..04fef3de6d75<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ocrdma/ocrdma_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_main.c</a></div><div class='hunk'>@@ -0,0 +1,576 @@</div><div class='add'>+/*******************************************************************</div><div class='add'>+ * This file is part of the Emulex RoCE Device Driver for          *</div><div class='add'>+ * RoCE (RDMA over Converged Ethernet) adapters.                   *</div><div class='add'>+ * Copyright (C) 2008-2012 Emulex. All rights reserved.            *</div><div class='add'>+ * EMULEX and SLI are trademarks of Emulex.                        *</div><div class='add'>+ * www.emulex.com                                                  *</div><div class='add'>+ *                                                                 *</div><div class='add'>+ * This program is free software; you can redistribute it and/or   *</div><div class='add'>+ * modify it under the terms of version 2 of the GNU General       *</div><div class='add'>+ * Public License as published by the Free Software Foundation.    *</div><div class='add'>+ * This program is distributed in the hope that it will be useful. *</div><div class='add'>+ * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *</div><div class='add'>+ * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *</div><div class='add'>+ * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *</div><div class='add'>+ * TO BE LEGALLY INVALID.  See the GNU General Public License for  *</div><div class='add'>+ * more details, a copy of which can be found in the file COPYING  *</div><div class='add'>+ * included with this package.                                     *</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ * linux-drivers@emulex.com</div><div class='add'>+ *</div><div class='add'>+ * Emulex</div><div class='add'>+ * 3333 Susan Street</div><div class='add'>+ * Costa Mesa, CA 92626</div><div class='add'>+ *******************************************************************/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/idr.h&gt;</div><div class='add'>+#include &lt;rdma/ib_verbs.h&gt;</div><div class='add'>+#include &lt;rdma/ib_user_verbs.h&gt;</div><div class='add'>+#include &lt;rdma/ib_addr.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;net/addrconf.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ocrdma.h"</div><div class='add'>+#include "ocrdma_verbs.h"</div><div class='add'>+#include "ocrdma_ah.h"</div><div class='add'>+#include "be_roce.h"</div><div class='add'>+#include "ocrdma_hw.h"</div><div class='add'>+</div><div class='add'>+MODULE_VERSION(OCRDMA_ROCE_DEV_VERSION);</div><div class='add'>+MODULE_DESCRIPTION("Emulex RoCE HCA Driver");</div><div class='add'>+MODULE_AUTHOR("Emulex Corporation");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+static LIST_HEAD(ocrdma_dev_list);</div><div class='add'>+static DEFINE_SPINLOCK(ocrdma_devlist_lock);</div><div class='add'>+static DEFINE_IDR(ocrdma_dev_id);</div><div class='add'>+</div><div class='add'>+static union ib_gid ocrdma_zero_sgid;</div><div class='add'>+</div><div class='add'>+static int ocrdma_get_instance(void)</div><div class='add'>+{</div><div class='add'>+	int instance = 0;</div><div class='add'>+</div><div class='add'>+	/* Assign an unused number */</div><div class='add'>+	if (!idr_pre_get(&amp;ocrdma_dev_id, GFP_KERNEL))</div><div class='add'>+		return -1;</div><div class='add'>+	if (idr_get_new(&amp;ocrdma_dev_id, NULL, &amp;instance))</div><div class='add'>+		return -1;</div><div class='add'>+	return instance;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ocrdma_get_guid(struct ocrdma_dev *dev, u8 *guid)</div><div class='add'>+{</div><div class='add'>+	u8 mac_addr[6];</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;mac_addr[0], &amp;dev-&gt;nic_info.mac_addr[0], ETH_ALEN);</div><div class='add'>+	guid[0] = mac_addr[0] ^ 2;</div><div class='add'>+	guid[1] = mac_addr[1];</div><div class='add'>+	guid[2] = mac_addr[2];</div><div class='add'>+	guid[3] = 0xff;</div><div class='add'>+	guid[4] = 0xfe;</div><div class='add'>+	guid[5] = mac_addr[3];</div><div class='add'>+	guid[6] = mac_addr[4];</div><div class='add'>+	guid[7] = mac_addr[5];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_build_sgid_mac(union ib_gid *sgid, unsigned char *mac_addr,</div><div class='add'>+				  bool is_vlan, u16 vlan_id)</div><div class='add'>+{</div><div class='add'>+	sgid-&gt;global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);</div><div class='add'>+	sgid-&gt;raw[8] = mac_addr[0] ^ 2;</div><div class='add'>+	sgid-&gt;raw[9] = mac_addr[1];</div><div class='add'>+	sgid-&gt;raw[10] = mac_addr[2];</div><div class='add'>+	if (is_vlan) {</div><div class='add'>+		sgid-&gt;raw[11] = vlan_id &gt;&gt; 8;</div><div class='add'>+		sgid-&gt;raw[12] = vlan_id &amp; 0xff;</div><div class='add'>+	} else {</div><div class='add'>+		sgid-&gt;raw[11] = 0xff;</div><div class='add'>+		sgid-&gt;raw[12] = 0xfe;</div><div class='add'>+	}</div><div class='add'>+	sgid-&gt;raw[13] = mac_addr[3];</div><div class='add'>+	sgid-&gt;raw[14] = mac_addr[4];</div><div class='add'>+	sgid-&gt;raw[15] = mac_addr[5];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_add_sgid(struct ocrdma_dev *dev, unsigned char *mac_addr,</div><div class='add'>+			    bool is_vlan, u16 vlan_id)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	bool found = false;</div><div class='add'>+	union ib_gid new_sgid;</div><div class='add'>+	int free_idx = OCRDMA_MAX_SGID;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	memset(&amp;ocrdma_zero_sgid, 0, sizeof(union ib_gid));</div><div class='add'>+</div><div class='add'>+	ocrdma_build_sgid_mac(&amp;new_sgid, mac_addr, is_vlan, vlan_id);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev-&gt;sgid_lock, flags);</div><div class='add'>+	for (i = 0; i &lt; OCRDMA_MAX_SGID; i++) {</div><div class='add'>+		if (!memcmp(&amp;dev-&gt;sgid_tbl[i], &amp;ocrdma_zero_sgid,</div><div class='add'>+			    sizeof(union ib_gid))) {</div><div class='add'>+			/* found free entry */</div><div class='add'>+			if (!found) {</div><div class='add'>+				free_idx = i;</div><div class='add'>+				found = true;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		} else if (!memcmp(&amp;dev-&gt;sgid_tbl[i], &amp;new_sgid,</div><div class='add'>+				   sizeof(union ib_gid))) {</div><div class='add'>+			/* entry already present, no addition is required. */</div><div class='add'>+			spin_unlock_irqrestore(&amp;dev-&gt;sgid_lock, flags);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/* if entry doesn't exist and if table has some space, add entry */</div><div class='add'>+	if (found)</div><div class='add'>+		memcpy(&amp;dev-&gt;sgid_tbl[free_idx], &amp;new_sgid,</div><div class='add'>+		       sizeof(union ib_gid));</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev-&gt;sgid_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ocrdma_del_sgid(struct ocrdma_dev *dev, unsigned char *mac_addr,</div><div class='add'>+			    bool is_vlan, u16 vlan_id)</div><div class='add'>+{</div><div class='add'>+	int found = false;</div><div class='add'>+	int i;</div><div class='add'>+	union ib_gid sgid;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	ocrdma_build_sgid_mac(&amp;sgid, mac_addr, is_vlan, vlan_id);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev-&gt;sgid_lock, flags);</div><div class='add'>+	/* first is default sgid, which cannot be deleted. */</div><div class='add'>+	for (i = 1; i &lt; OCRDMA_MAX_SGID; i++) {</div><div class='add'>+		if (!memcmp(&amp;dev-&gt;sgid_tbl[i], &amp;sgid, sizeof(union ib_gid))) {</div><div class='add'>+			/* found matching entry */</div><div class='add'>+			memset(&amp;dev-&gt;sgid_tbl[i], 0, sizeof(union ib_gid));</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev-&gt;sgid_lock, flags);</div><div class='add'>+	return found;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_add_default_sgid(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	/* GID Index 0 - Invariant manufacturer-assigned EUI-64 */</div><div class='add'>+	union ib_gid *sgid = &amp;dev-&gt;sgid_tbl[0];</div><div class='add'>+</div><div class='add'>+	sgid-&gt;global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);</div><div class='add'>+	ocrdma_get_guid(dev, &amp;sgid-&gt;raw[8]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_build_sgid_tbl(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev, *tmp;</div><div class='add'>+	u16 vlan_id;</div><div class='add'>+	bool is_vlan;</div><div class='add'>+</div><div class='add'>+	netdev = dev-&gt;nic_info.netdev;</div><div class='add'>+</div><div class='add'>+	ocrdma_add_default_sgid(dev);</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	for_each_netdev_rcu(&amp;init_net, tmp) {</div><div class='add'>+		if (netdev == tmp || vlan_dev_real_dev(tmp) == netdev) {</div><div class='add'>+			if (!netif_running(tmp) || !netif_oper_up(tmp))</div><div class='add'>+				continue;</div><div class='add'>+			if (netdev != tmp) {</div><div class='add'>+				vlan_id = vlan_dev_vlan_id(tmp);</div><div class='add'>+				is_vlan = true;</div><div class='add'>+			} else {</div><div class='add'>+				is_vlan = false;</div><div class='add'>+				vlan_id = 0;</div><div class='add'>+				tmp = netdev;</div><div class='add'>+			}</div><div class='add'>+			ocrdma_add_sgid(dev, tmp-&gt;dev_addr, is_vlan, vlan_id);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)</div><div class='add'>+</div><div class='add'>+static int ocrdma_inet6addr_event(struct notifier_block *notifier,</div><div class='add'>+				  unsigned long event, void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct inet6_ifaddr *ifa = (struct inet6_ifaddr *)ptr;</div><div class='add'>+	struct net_device *event_netdev = ifa-&gt;idev-&gt;dev;</div><div class='add'>+	struct net_device *netdev = NULL;</div><div class='add'>+	struct ib_event gid_event;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	bool found = false;</div><div class='add'>+	bool is_vlan = false;</div><div class='add'>+	u16 vid = 0;</div><div class='add'>+</div><div class='add'>+	netdev = vlan_dev_real_dev(event_netdev);</div><div class='add'>+	if (netdev != event_netdev) {</div><div class='add'>+		is_vlan = true;</div><div class='add'>+		vid = vlan_dev_vlan_id(event_netdev);</div><div class='add'>+	}</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	list_for_each_entry_rcu(dev, &amp;ocrdma_dev_list, entry) {</div><div class='add'>+		if (dev-&gt;nic_info.netdev == netdev) {</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	if (!found)</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+	if (!rdma_link_local_addr((struct in6_addr *)&amp;ifa-&gt;addr))</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	switch (event) {</div><div class='add'>+	case NETDEV_UP:</div><div class='add'>+		ocrdma_add_sgid(dev, netdev-&gt;dev_addr, is_vlan, vid);</div><div class='add'>+		break;</div><div class='add'>+	case NETDEV_DOWN:</div><div class='add'>+		found = ocrdma_del_sgid(dev, netdev-&gt;dev_addr, is_vlan, vid);</div><div class='add'>+		if (found) {</div><div class='add'>+			/* found the matching entry, notify</div><div class='add'>+			 * the consumers about it</div><div class='add'>+			 */</div><div class='add'>+			gid_event.device = &amp;dev-&gt;ibdev;</div><div class='add'>+			gid_event.element.port_num = 1;</div><div class='add'>+			gid_event.event = IB_EVENT_GID_CHANGE;</div><div class='add'>+			ib_dispatch_event(&amp;gid_event);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	return NOTIFY_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block ocrdma_inet6addr_notifier = {</div><div class='add'>+	.notifier_call = ocrdma_inet6addr_event</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* IPV6 */</div><div class='add'>+</div><div class='add'>+static enum rdma_link_layer ocrdma_link_layer(struct ib_device *device,</div><div class='add'>+					      u8 port_num)</div><div class='add'>+{</div><div class='add'>+	return IB_LINK_LAYER_ETHERNET;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_register_device(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	strlcpy(dev-&gt;ibdev.name, "ocrdma%d", IB_DEVICE_NAME_MAX);</div><div class='add'>+	ocrdma_get_guid(dev, (u8 *)&amp;dev-&gt;ibdev.node_guid);</div><div class='add'>+	memcpy(dev-&gt;ibdev.node_desc, OCRDMA_NODE_DESC,</div><div class='add'>+	       sizeof(OCRDMA_NODE_DESC));</div><div class='add'>+	dev-&gt;ibdev.owner = THIS_MODULE;</div><div class='add'>+	dev-&gt;ibdev.uverbs_cmd_mask =</div><div class='add'>+	    OCRDMA_UVERBS(GET_CONTEXT) |</div><div class='add'>+	    OCRDMA_UVERBS(QUERY_DEVICE) |</div><div class='add'>+	    OCRDMA_UVERBS(QUERY_PORT) |</div><div class='add'>+	    OCRDMA_UVERBS(ALLOC_PD) |</div><div class='add'>+	    OCRDMA_UVERBS(DEALLOC_PD) |</div><div class='add'>+	    OCRDMA_UVERBS(REG_MR) |</div><div class='add'>+	    OCRDMA_UVERBS(DEREG_MR) |</div><div class='add'>+	    OCRDMA_UVERBS(CREATE_COMP_CHANNEL) |</div><div class='add'>+	    OCRDMA_UVERBS(CREATE_CQ) |</div><div class='add'>+	    OCRDMA_UVERBS(RESIZE_CQ) |</div><div class='add'>+	    OCRDMA_UVERBS(DESTROY_CQ) |</div><div class='add'>+	    OCRDMA_UVERBS(REQ_NOTIFY_CQ) |</div><div class='add'>+	    OCRDMA_UVERBS(CREATE_QP) |</div><div class='add'>+	    OCRDMA_UVERBS(MODIFY_QP) |</div><div class='add'>+	    OCRDMA_UVERBS(QUERY_QP) |</div><div class='add'>+	    OCRDMA_UVERBS(DESTROY_QP) |</div><div class='add'>+	    OCRDMA_UVERBS(POLL_CQ) |</div><div class='add'>+	    OCRDMA_UVERBS(POST_SEND) |</div><div class='add'>+	    OCRDMA_UVERBS(POST_RECV);</div><div class='add'>+</div><div class='add'>+	dev-&gt;ibdev.uverbs_cmd_mask |=</div><div class='add'>+	    OCRDMA_UVERBS(CREATE_AH) |</div><div class='add'>+	     OCRDMA_UVERBS(MODIFY_AH) |</div><div class='add'>+	     OCRDMA_UVERBS(QUERY_AH) |</div><div class='add'>+	     OCRDMA_UVERBS(DESTROY_AH);</div><div class='add'>+</div><div class='add'>+	dev-&gt;ibdev.node_type = RDMA_NODE_IB_CA;</div><div class='add'>+	dev-&gt;ibdev.phys_port_cnt = 1;</div><div class='add'>+	dev-&gt;ibdev.num_comp_vectors = 1;</div><div class='add'>+</div><div class='add'>+	/* mandatory verbs. */</div><div class='add'>+	dev-&gt;ibdev.query_device = ocrdma_query_device;</div><div class='add'>+	dev-&gt;ibdev.query_port = ocrdma_query_port;</div><div class='add'>+	dev-&gt;ibdev.modify_port = ocrdma_modify_port;</div><div class='add'>+	dev-&gt;ibdev.query_gid = ocrdma_query_gid;</div><div class='add'>+	dev-&gt;ibdev.get_link_layer = ocrdma_link_layer;</div><div class='add'>+	dev-&gt;ibdev.alloc_pd = ocrdma_alloc_pd;</div><div class='add'>+	dev-&gt;ibdev.dealloc_pd = ocrdma_dealloc_pd;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ibdev.create_cq = ocrdma_create_cq;</div><div class='add'>+	dev-&gt;ibdev.destroy_cq = ocrdma_destroy_cq;</div><div class='add'>+	dev-&gt;ibdev.resize_cq = ocrdma_resize_cq;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ibdev.create_qp = ocrdma_create_qp;</div><div class='add'>+	dev-&gt;ibdev.modify_qp = ocrdma_modify_qp;</div><div class='add'>+	dev-&gt;ibdev.query_qp = ocrdma_query_qp;</div><div class='add'>+	dev-&gt;ibdev.destroy_qp = ocrdma_destroy_qp;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ibdev.query_pkey = ocrdma_query_pkey;</div><div class='add'>+	dev-&gt;ibdev.create_ah = ocrdma_create_ah;</div><div class='add'>+	dev-&gt;ibdev.destroy_ah = ocrdma_destroy_ah;</div><div class='add'>+	dev-&gt;ibdev.query_ah = ocrdma_query_ah;</div><div class='add'>+	dev-&gt;ibdev.modify_ah = ocrdma_modify_ah;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ibdev.poll_cq = ocrdma_poll_cq;</div><div class='add'>+	dev-&gt;ibdev.post_send = ocrdma_post_send;</div><div class='add'>+	dev-&gt;ibdev.post_recv = ocrdma_post_recv;</div><div class='add'>+	dev-&gt;ibdev.req_notify_cq = ocrdma_arm_cq;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ibdev.get_dma_mr = ocrdma_get_dma_mr;</div><div class='add'>+	dev-&gt;ibdev.dereg_mr = ocrdma_dereg_mr;</div><div class='add'>+	dev-&gt;ibdev.reg_user_mr = ocrdma_reg_user_mr;</div><div class='add'>+</div><div class='add'>+	/* mandatory to support user space verbs consumer. */</div><div class='add'>+	dev-&gt;ibdev.alloc_ucontext = ocrdma_alloc_ucontext;</div><div class='add'>+	dev-&gt;ibdev.dealloc_ucontext = ocrdma_dealloc_ucontext;</div><div class='add'>+	dev-&gt;ibdev.mmap = ocrdma_mmap;</div><div class='add'>+	dev-&gt;ibdev.dma_device = &amp;dev-&gt;nic_info.pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ibdev.process_mad = ocrdma_process_mad;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;nic_info.dev_family == OCRDMA_GEN2_FAMILY) {</div><div class='add'>+		dev-&gt;ibdev.uverbs_cmd_mask |=</div><div class='add'>+		     OCRDMA_UVERBS(CREATE_SRQ) |</div><div class='add'>+		     OCRDMA_UVERBS(MODIFY_SRQ) |</div><div class='add'>+		     OCRDMA_UVERBS(QUERY_SRQ) |</div><div class='add'>+		     OCRDMA_UVERBS(DESTROY_SRQ) |</div><div class='add'>+		     OCRDMA_UVERBS(POST_SRQ_RECV);</div><div class='add'>+</div><div class='add'>+		dev-&gt;ibdev.create_srq = ocrdma_create_srq;</div><div class='add'>+		dev-&gt;ibdev.modify_srq = ocrdma_modify_srq;</div><div class='add'>+		dev-&gt;ibdev.query_srq = ocrdma_query_srq;</div><div class='add'>+		dev-&gt;ibdev.destroy_srq = ocrdma_destroy_srq;</div><div class='add'>+		dev-&gt;ibdev.post_srq_recv = ocrdma_post_srq_recv;</div><div class='add'>+	}</div><div class='add'>+	return ib_register_device(&amp;dev-&gt;ibdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_alloc_resources(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	mutex_init(&amp;dev-&gt;dev_lock);</div><div class='add'>+	dev-&gt;sgid_tbl = kzalloc(sizeof(union ib_gid) *</div><div class='add'>+				OCRDMA_MAX_SGID, GFP_KERNEL);</div><div class='add'>+	if (!dev-&gt;sgid_tbl)</div><div class='add'>+		goto alloc_err;</div><div class='add'>+	spin_lock_init(&amp;dev-&gt;sgid_lock);</div><div class='add'>+</div><div class='add'>+	dev-&gt;cq_tbl = kzalloc(sizeof(struct ocrdma_cq *) *</div><div class='add'>+			      OCRDMA_MAX_CQ, GFP_KERNEL);</div><div class='add'>+	if (!dev-&gt;cq_tbl)</div><div class='add'>+		goto alloc_err;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;attr.max_qp) {</div><div class='add'>+		dev-&gt;qp_tbl = kzalloc(sizeof(struct ocrdma_qp *) *</div><div class='add'>+				      OCRDMA_MAX_QP, GFP_KERNEL);</div><div class='add'>+		if (!dev-&gt;qp_tbl)</div><div class='add'>+			goto alloc_err;</div><div class='add'>+	}</div><div class='add'>+	spin_lock_init(&amp;dev-&gt;av_tbl.lock);</div><div class='add'>+	spin_lock_init(&amp;dev-&gt;flush_q_lock);</div><div class='add'>+	return 0;</div><div class='add'>+alloc_err:</div><div class='add'>+	ocrdma_err("%s(%d) error.\n", __func__, dev-&gt;id);</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_free_resources(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	kfree(dev-&gt;qp_tbl);</div><div class='add'>+	kfree(dev-&gt;cq_tbl);</div><div class='add'>+	kfree(dev-&gt;sgid_tbl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ocrdma_dev *ocrdma_add(struct be_dev_info *dev_info)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+</div><div class='add'>+	dev = (struct ocrdma_dev *)ib_alloc_device(sizeof(struct ocrdma_dev));</div><div class='add'>+	if (!dev) {</div><div class='add'>+		ocrdma_err("Unable to allocate ib device\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	dev-&gt;mbx_cmd = kzalloc(sizeof(struct ocrdma_mqe_emb_cmd), GFP_KERNEL);</div><div class='add'>+	if (!dev-&gt;mbx_cmd)</div><div class='add'>+		goto idr_err;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;dev-&gt;nic_info, dev_info, sizeof(*dev_info));</div><div class='add'>+	dev-&gt;id = ocrdma_get_instance();</div><div class='add'>+	if (dev-&gt;id &lt; 0)</div><div class='add'>+		goto idr_err;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_init_hw(dev);</div><div class='add'>+	if (status)</div><div class='add'>+		goto init_err;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_alloc_resources(dev);</div><div class='add'>+	if (status)</div><div class='add'>+		goto alloc_err;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_build_sgid_tbl(dev);</div><div class='add'>+	if (status)</div><div class='add'>+		goto alloc_err;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_register_device(dev);</div><div class='add'>+	if (status)</div><div class='add'>+		goto alloc_err;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;ocrdma_devlist_lock);</div><div class='add'>+	list_add_tail_rcu(&amp;dev-&gt;entry, &amp;ocrdma_dev_list);</div><div class='add'>+	spin_unlock(&amp;ocrdma_devlist_lock);</div><div class='add'>+	return dev;</div><div class='add'>+</div><div class='add'>+alloc_err:</div><div class='add'>+	ocrdma_free_resources(dev);</div><div class='add'>+	ocrdma_cleanup_hw(dev);</div><div class='add'>+init_err:</div><div class='add'>+	idr_remove(&amp;ocrdma_dev_id, dev-&gt;id);</div><div class='add'>+idr_err:</div><div class='add'>+	kfree(dev-&gt;mbx_cmd);</div><div class='add'>+	ib_dealloc_device(&amp;dev-&gt;ibdev);</div><div class='add'>+	ocrdma_err("%s() leaving. ret=%d\n", __func__, status);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_remove_free(struct rcu_head *rcu)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_dev *dev = container_of(rcu, struct ocrdma_dev, rcu);</div><div class='add'>+</div><div class='add'>+	ocrdma_free_resources(dev);</div><div class='add'>+	ocrdma_cleanup_hw(dev);</div><div class='add'>+</div><div class='add'>+	idr_remove(&amp;ocrdma_dev_id, dev-&gt;id);</div><div class='add'>+	kfree(dev-&gt;mbx_cmd);</div><div class='add'>+	ib_dealloc_device(&amp;dev-&gt;ibdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_remove(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	/* first unregister with stack to stop all the active traffic</div><div class='add'>+	 * of the registered clients.</div><div class='add'>+	 */</div><div class='add'>+	ib_unregister_device(&amp;dev-&gt;ibdev);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;ocrdma_devlist_lock);</div><div class='add'>+	list_del_rcu(&amp;dev-&gt;entry);</div><div class='add'>+	spin_unlock(&amp;ocrdma_devlist_lock);</div><div class='add'>+	call_rcu(&amp;dev-&gt;rcu, ocrdma_remove_free);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_open(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct ib_event port_event;</div><div class='add'>+</div><div class='add'>+	port_event.event = IB_EVENT_PORT_ACTIVE;</div><div class='add'>+	port_event.element.port_num = 1;</div><div class='add'>+	port_event.device = &amp;dev-&gt;ibdev;</div><div class='add'>+	ib_dispatch_event(&amp;port_event);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_close(struct ocrdma_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct ocrdma_qp *qp, **cur_qp;</div><div class='add'>+	struct ib_event err_event;</div><div class='add'>+	struct ib_qp_attr attrs;</div><div class='add'>+	int attr_mask = IB_QP_STATE;</div><div class='add'>+</div><div class='add'>+	attrs.qp_state = IB_QPS_ERR;</div><div class='add'>+	mutex_lock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	if (dev-&gt;qp_tbl) {</div><div class='add'>+		cur_qp = dev-&gt;qp_tbl;</div><div class='add'>+		for (i = 0; i &lt; OCRDMA_MAX_QP; i++) {</div><div class='add'>+			qp = cur_qp[i];</div><div class='add'>+			if (qp) {</div><div class='add'>+				/* change the QP state to ERROR */</div><div class='add'>+				_ocrdma_modify_qp(&amp;qp-&gt;ibqp, &amp;attrs, attr_mask);</div><div class='add'>+</div><div class='add'>+				err_event.event = IB_EVENT_QP_FATAL;</div><div class='add'>+				err_event.element.qp = &amp;qp-&gt;ibqp;</div><div class='add'>+				err_event.device = &amp;dev-&gt;ibdev;</div><div class='add'>+				ib_dispatch_event(&amp;err_event);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;dev_lock);</div><div class='add'>+</div><div class='add'>+	err_event.event = IB_EVENT_PORT_ERR;</div><div class='add'>+	err_event.element.port_num = 1;</div><div class='add'>+	err_event.device = &amp;dev-&gt;ibdev;</div><div class='add'>+	ib_dispatch_event(&amp;err_event);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* event handling via NIC driver ensures that all the NIC specific</div><div class='add'>+ * initialization done before RoCE driver notifies</div><div class='add'>+ * event to stack.</div><div class='add'>+ */</div><div class='add'>+static void ocrdma_event_handler(struct ocrdma_dev *dev, u32 event)</div><div class='add'>+{</div><div class='add'>+	switch (event) {</div><div class='add'>+	case BE_DEV_UP:</div><div class='add'>+		ocrdma_open(dev);</div><div class='add'>+		break;</div><div class='add'>+	case BE_DEV_DOWN:</div><div class='add'>+		ocrdma_close(dev);</div><div class='add'>+		break;</div><div class='add'>+	};</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ocrdma_driver ocrdma_drv = {</div><div class='add'>+	.name			= "ocrdma_driver",</div><div class='add'>+	.add			= ocrdma_add,</div><div class='add'>+	.remove			= ocrdma_remove,</div><div class='add'>+	.state_change_handler	= ocrdma_event_handler,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ocrdma_unregister_inet6addr_notifier(void)</div><div class='add'>+{</div><div class='add'>+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)</div><div class='add'>+	unregister_inet6addr_notifier(&amp;ocrdma_inet6addr_notifier);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init ocrdma_init_module(void)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)</div><div class='add'>+	status = register_inet6addr_notifier(&amp;ocrdma_inet6addr_notifier);</div><div class='add'>+	if (status)</div><div class='add'>+		return status;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	status = be_roce_register_driver(&amp;ocrdma_drv);</div><div class='add'>+	if (status)</div><div class='add'>+		ocrdma_unregister_inet6addr_notifier();</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit ocrdma_exit_module(void)</div><div class='add'>+{</div><div class='add'>+	be_roce_unregister_driver(&amp;ocrdma_drv);</div><div class='add'>+	ocrdma_unregister_inet6addr_notifier();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(ocrdma_init_module);</div><div class='add'>+module_exit(ocrdma_exit_module);</div><div class='head'>diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h<br/>new file mode 100644<br/>index 000000000000..7fd80cc0f037<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ocrdma/ocrdma_sli.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_sli.h</a></div><div class='hunk'>@@ -0,0 +1,1672 @@</div><div class='add'>+/*******************************************************************</div><div class='add'>+ * This file is part of the Emulex RoCE Device Driver for          *</div><div class='add'>+ * RoCE (RDMA over Converged Ethernet) adapters.                   *</div><div class='add'>+ * Copyright (C) 2008-2012 Emulex. All rights reserved.            *</div><div class='add'>+ * EMULEX and SLI are trademarks of Emulex.                        *</div><div class='add'>+ * www.emulex.com                                                  *</div><div class='add'>+ *                                                                 *</div><div class='add'>+ * This program is free software; you can redistribute it and/or   *</div><div class='add'>+ * modify it under the terms of version 2 of the GNU General       *</div><div class='add'>+ * Public License as published by the Free Software Foundation.    *</div><div class='add'>+ * This program is distributed in the hope that it will be useful. *</div><div class='add'>+ * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *</div><div class='add'>+ * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *</div><div class='add'>+ * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *</div><div class='add'>+ * TO BE LEGALLY INVALID.  See the GNU General Public License for  *</div><div class='add'>+ * more details, a copy of which can be found in the file COPYING  *</div><div class='add'>+ * included with this package.                                     *</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ * linux-drivers@emulex.com</div><div class='add'>+ *</div><div class='add'>+ * Emulex</div><div class='add'>+ * 3333 Susan Street</div><div class='add'>+ * Costa Mesa, CA 92626</div><div class='add'>+ *******************************************************************/</div><div class='add'>+</div><div class='add'>+#ifndef __OCRDMA_SLI_H__</div><div class='add'>+#define __OCRDMA_SLI_H__</div><div class='add'>+</div><div class='add'>+#define Bit(_b) (1 &lt;&lt; (_b))</div><div class='add'>+</div><div class='add'>+#define OCRDMA_GEN1_FAMILY	0xB</div><div class='add'>+#define OCRDMA_GEN2_FAMILY	0x2</div><div class='add'>+</div><div class='add'>+#define OCRDMA_SUBSYS_ROCE 10</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CMD_QUERY_CONFIG = 1,</div><div class='add'>+	OCRDMA_CMD_ALLOC_PD,</div><div class='add'>+	OCRDMA_CMD_DEALLOC_PD,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CMD_CREATE_AH_TBL,</div><div class='add'>+	OCRDMA_CMD_DELETE_AH_TBL,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CMD_CREATE_QP,</div><div class='add'>+	OCRDMA_CMD_QUERY_QP,</div><div class='add'>+	OCRDMA_CMD_MODIFY_QP,</div><div class='add'>+	OCRDMA_CMD_DELETE_QP,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CMD_RSVD1,</div><div class='add'>+	OCRDMA_CMD_ALLOC_LKEY,</div><div class='add'>+	OCRDMA_CMD_DEALLOC_LKEY,</div><div class='add'>+	OCRDMA_CMD_REGISTER_NSMR,</div><div class='add'>+	OCRDMA_CMD_REREGISTER_NSMR,</div><div class='add'>+	OCRDMA_CMD_REGISTER_NSMR_CONT,</div><div class='add'>+	OCRDMA_CMD_QUERY_NSMR,</div><div class='add'>+	OCRDMA_CMD_ALLOC_MW,</div><div class='add'>+	OCRDMA_CMD_QUERY_MW,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CMD_CREATE_SRQ,</div><div class='add'>+	OCRDMA_CMD_QUERY_SRQ,</div><div class='add'>+	OCRDMA_CMD_MODIFY_SRQ,</div><div class='add'>+	OCRDMA_CMD_DELETE_SRQ,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CMD_ATTACH_MCAST,</div><div class='add'>+	OCRDMA_CMD_DETACH_MCAST,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CMD_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define OCRDMA_SUBSYS_COMMON 1</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CMD_CREATE_CQ		= 12,</div><div class='add'>+	OCRDMA_CMD_CREATE_EQ		= 13,</div><div class='add'>+	OCRDMA_CMD_CREATE_MQ		= 21,</div><div class='add'>+	OCRDMA_CMD_GET_FW_VER		= 35,</div><div class='add'>+	OCRDMA_CMD_DELETE_MQ		= 53,</div><div class='add'>+	OCRDMA_CMD_DELETE_CQ		= 54,</div><div class='add'>+	OCRDMA_CMD_DELETE_EQ		= 55,</div><div class='add'>+	OCRDMA_CMD_GET_FW_CONFIG	= 58,</div><div class='add'>+	OCRDMA_CMD_CREATE_MQ_EXT	= 90</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	QTYPE_EQ	= 1,</div><div class='add'>+	QTYPE_CQ	= 2,</div><div class='add'>+	QTYPE_MCCQ	= 3</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define OCRDMA_MAX_SGID (8)</div><div class='add'>+</div><div class='add'>+#define OCRDMA_MAX_QP    2048</div><div class='add'>+#define OCRDMA_MAX_CQ    2048</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_DB_RQ_OFFSET		= 0xE0,</div><div class='add'>+	OCRDMA_DB_GEN2_RQ1_OFFSET	= 0x100,</div><div class='add'>+	OCRDMA_DB_GEN2_RQ2_OFFSET	= 0xC0,</div><div class='add'>+	OCRDMA_DB_SQ_OFFSET		= 0x60,</div><div class='add'>+	OCRDMA_DB_GEN2_SQ_OFFSET	= 0x1C0,</div><div class='add'>+	OCRDMA_DB_SRQ_OFFSET		= OCRDMA_DB_RQ_OFFSET,</div><div class='add'>+	OCRDMA_DB_GEN2_SRQ_OFFSET	= OCRDMA_DB_GEN2_RQ1_OFFSET,</div><div class='add'>+	OCRDMA_DB_CQ_OFFSET		= 0x120,</div><div class='add'>+	OCRDMA_DB_EQ_OFFSET		= OCRDMA_DB_CQ_OFFSET,</div><div class='add'>+	OCRDMA_DB_MQ_OFFSET		= 0x140</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define OCRDMA_DB_CQ_RING_ID_MASK       0x3FF	/* bits 0 - 9 */</div><div class='add'>+#define OCRDMA_DB_CQ_RING_ID_EXT_MASK  0x0C00	/* bits 10-11 of qid at 12-11 */</div><div class='add'>+/* qid #2 msbits at 12-11 */</div><div class='add'>+#define OCRDMA_DB_CQ_RING_ID_EXT_MASK_SHIFT  0x1</div><div class='add'>+#define OCRDMA_DB_CQ_NUM_POPPED_SHIFT       (16)	/* bits 16 - 28 */</div><div class='add'>+/* Rearm bit */</div><div class='add'>+#define OCRDMA_DB_CQ_REARM_SHIFT        (29)	/* bit 29 */</div><div class='add'>+/* solicited bit */</div><div class='add'>+#define OCRDMA_DB_CQ_SOLICIT_SHIFT   (31)	/* bit 31 */</div><div class='add'>+</div><div class='add'>+#define OCRDMA_EQ_ID_MASK		0x1FF	/* bits 0 - 8 */</div><div class='add'>+#define OCRDMA_EQ_ID_EXT_MASK		0x3e00	/* bits 9-13 */</div><div class='add'>+#define OCRDMA_EQ_ID_EXT_MASK_SHIFT	(2)	/* qid bits 9-13 at 11-15 */</div><div class='add'>+</div><div class='add'>+/* Clear the interrupt for this eq */</div><div class='add'>+#define OCRDMA_EQ_CLR_SHIFT			(9)	/* bit 9 */</div><div class='add'>+/* Must be 1 */</div><div class='add'>+#define OCRDMA_EQ_TYPE_SHIFT		(10)	/* bit 10 */</div><div class='add'>+/* Number of event entries processed */</div><div class='add'>+#define OCRDMA_NUM_EQE_SHIFT		(16)	/* bits 16 - 28 */</div><div class='add'>+/* Rearm bit */</div><div class='add'>+#define OCRDMA_REARM_SHIFT		(29)	/* bit 29 */</div><div class='add'>+</div><div class='add'>+#define OCRDMA_MQ_ID_MASK		0x7FF	/* bits 0 - 10 */</div><div class='add'>+/* Number of entries posted */</div><div class='add'>+#define OCRDMA_MQ_NUM_MQE_SHIFT	(16)	/* bits 16 - 29 */</div><div class='add'>+</div><div class='add'>+#define OCRDMA_MIN_HPAGE_SIZE (4096)</div><div class='add'>+</div><div class='add'>+#define OCRDMA_MIN_Q_PAGE_SIZE (4096)</div><div class='add'>+#define OCRDMA_MAX_Q_PAGES     (8)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+# 0: 4K Bytes</div><div class='add'>+# 1: 8K Bytes</div><div class='add'>+# 2: 16K Bytes</div><div class='add'>+# 3: 32K Bytes</div><div class='add'>+# 4: 64K Bytes</div><div class='add'>+*/</div><div class='add'>+#define OCRDMA_MAX_Q_PAGE_SIZE_CNT (5)</div><div class='add'>+#define OCRDMA_Q_PAGE_BASE_SIZE (OCRDMA_MIN_Q_PAGE_SIZE * OCRDMA_MAX_Q_PAGES)</div><div class='add'>+</div><div class='add'>+#define MAX_OCRDMA_QP_PAGES      (8)</div><div class='add'>+#define OCRDMA_MAX_WQE_MEM_SIZE (MAX_OCRDMA_QP_PAGES * OCRDMA_MIN_HQ_PAGE_SIZE)</div><div class='add'>+</div><div class='add'>+#define OCRDMA_CREATE_CQ_MAX_PAGES (4)</div><div class='add'>+#define OCRDMA_DPP_CQE_SIZE (4)</div><div class='add'>+</div><div class='add'>+#define OCRDMA_GEN2_MAX_CQE 1024</div><div class='add'>+#define OCRDMA_GEN2_CQ_PAGE_SIZE 4096</div><div class='add'>+#define OCRDMA_GEN2_WQE_SIZE 256</div><div class='add'>+#define OCRDMA_MAX_CQE  4095</div><div class='add'>+#define OCRDMA_CQ_PAGE_SIZE 16384</div><div class='add'>+#define OCRDMA_WQE_SIZE 128</div><div class='add'>+#define OCRDMA_WQE_STRIDE 8</div><div class='add'>+#define OCRDMA_WQE_ALIGN_BYTES 16</div><div class='add'>+</div><div class='add'>+#define MAX_OCRDMA_SRQ_PAGES MAX_OCRDMA_QP_PAGES</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_MCH_OPCODE_SHIFT	= 0,</div><div class='add'>+	OCRDMA_MCH_OPCODE_MASK	= 0xFF,</div><div class='add'>+	OCRDMA_MCH_SUBSYS_SHIFT	= 8,</div><div class='add'>+	OCRDMA_MCH_SUBSYS_MASK	= 0xFF00</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mailbox cmd header */</div><div class='add'>+struct ocrdma_mbx_hdr {</div><div class='add'>+	u32 subsys_op;</div><div class='add'>+	u32 timeout;		/* in seconds */</div><div class='add'>+	u32 cmd_len;</div><div class='add'>+	u32 rsvd_version;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_MBX_RSP_OPCODE_SHIFT	= 0,</div><div class='add'>+	OCRDMA_MBX_RSP_OPCODE_MASK	= 0xFF,</div><div class='add'>+	OCRDMA_MBX_RSP_SUBSYS_SHIFT	= 8,</div><div class='add'>+	OCRDMA_MBX_RSP_SUBSYS_MASK	= 0xFF &lt;&lt; OCRDMA_MBX_RSP_SUBSYS_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MBX_RSP_STATUS_SHIFT	= 0,</div><div class='add'>+	OCRDMA_MBX_RSP_STATUS_MASK	= 0xFF,</div><div class='add'>+	OCRDMA_MBX_RSP_ASTATUS_SHIFT	= 8,</div><div class='add'>+	OCRDMA_MBX_RSP_ASTATUS_MASK	= 0xFF &lt;&lt; OCRDMA_MBX_RSP_ASTATUS_SHIFT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mailbox cmd response */</div><div class='add'>+struct ocrdma_mbx_rsp {</div><div class='add'>+	u32 subsys_op;</div><div class='add'>+	u32 status;</div><div class='add'>+	u32 rsp_len;</div><div class='add'>+	u32 add_rsp_len;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_MQE_EMBEDDED	= 1,</div><div class='add'>+	OCRDMA_MQE_NONEMBEDDED	= 0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_mqe_sge {</div><div class='add'>+	u32 pa_lo;</div><div class='add'>+	u32 pa_hi;</div><div class='add'>+	u32 len;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_MQE_HDR_EMB_SHIFT	= 0,</div><div class='add'>+	OCRDMA_MQE_HDR_EMB_MASK		= Bit(0),</div><div class='add'>+	OCRDMA_MQE_HDR_SGE_CNT_SHIFT	= 3,</div><div class='add'>+	OCRDMA_MQE_HDR_SGE_CNT_MASK	= 0x1F &lt;&lt; OCRDMA_MQE_HDR_SGE_CNT_SHIFT,</div><div class='add'>+	OCRDMA_MQE_HDR_SPECIAL_SHIFT	= 24,</div><div class='add'>+	OCRDMA_MQE_HDR_SPECIAL_MASK	= 0xFF &lt;&lt; OCRDMA_MQE_HDR_SPECIAL_SHIFT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_mqe_hdr {</div><div class='add'>+	u32 spcl_sge_cnt_emb;</div><div class='add'>+	u32 pyld_len;</div><div class='add'>+	u32 tag_lo;</div><div class='add'>+	u32 tag_hi;</div><div class='add'>+	u32 rsvd3;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_mqe_emb_cmd {</div><div class='add'>+	struct ocrdma_mbx_hdr mch;</div><div class='add'>+	u8 pyld[220];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_mqe {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	union {</div><div class='add'>+		struct ocrdma_mqe_emb_cmd emb_req;</div><div class='add'>+		struct {</div><div class='add'>+			struct ocrdma_mqe_sge sge[19];</div><div class='add'>+		} nonemb_req;</div><div class='add'>+		u8 cmd[236];</div><div class='add'>+		struct ocrdma_mbx_rsp rsp;</div><div class='add'>+	} u;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define OCRDMA_EQ_LEN       4096</div><div class='add'>+#define OCRDMA_MQ_CQ_LEN    256</div><div class='add'>+#define OCRDMA_MQ_LEN       128</div><div class='add'>+</div><div class='add'>+#define PAGE_SHIFT_4K		12</div><div class='add'>+#define PAGE_SIZE_4K		(1 &lt;&lt; PAGE_SHIFT_4K)</div><div class='add'>+</div><div class='add'>+/* Returns number of pages spanned by the data starting at the given addr */</div><div class='add'>+#define PAGES_4K_SPANNED(_address, size) \</div><div class='add'>+	((u32)((((size_t)(_address) &amp; (PAGE_SIZE_4K - 1)) +	\</div><div class='add'>+			(size) + (PAGE_SIZE_4K - 1)) &gt;&gt; PAGE_SHIFT_4K))</div><div class='add'>+</div><div class='add'>+struct ocrdma_delete_q_req {</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+	u32 id;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_pa {</div><div class='add'>+	u32 lo;</div><div class='add'>+	u32 hi;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define MAX_OCRDMA_EQ_PAGES (8)</div><div class='add'>+struct ocrdma_create_eq_req {</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+	u32 num_pages;</div><div class='add'>+	u32 valid;</div><div class='add'>+	u32 cnt;</div><div class='add'>+	u32 delay;</div><div class='add'>+	u32 rsvd;</div><div class='add'>+	struct ocrdma_pa pa[MAX_OCRDMA_EQ_PAGES];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CREATE_EQ_VALID	= Bit(29),</div><div class='add'>+	OCRDMA_CREATE_EQ_CNT_SHIFT	= 26,</div><div class='add'>+	OCRDMA_CREATE_CQ_DELAY_SHIFT	= 13,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_eq_rsp {</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+	u32 vector_eqid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define OCRDMA_EQ_MINOR_OTHER (0x1)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_MCQE_STATUS_SHIFT	= 0,</div><div class='add'>+	OCRDMA_MCQE_STATUS_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_MCQE_ESTATUS_SHIFT	= 16,</div><div class='add'>+	OCRDMA_MCQE_ESTATUS_MASK	= 0xFFFF &lt;&lt; OCRDMA_MCQE_ESTATUS_SHIFT,</div><div class='add'>+	OCRDMA_MCQE_CONS_SHIFT		= 27,</div><div class='add'>+	OCRDMA_MCQE_CONS_MASK		= Bit(27),</div><div class='add'>+	OCRDMA_MCQE_CMPL_SHIFT		= 28,</div><div class='add'>+	OCRDMA_MCQE_CMPL_MASK		= Bit(28),</div><div class='add'>+	OCRDMA_MCQE_AE_SHIFT		= 30,</div><div class='add'>+	OCRDMA_MCQE_AE_MASK		= Bit(30),</div><div class='add'>+	OCRDMA_MCQE_VALID_SHIFT		= 31,</div><div class='add'>+	OCRDMA_MCQE_VALID_MASK		= Bit(31)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_mcqe {</div><div class='add'>+	u32 status;</div><div class='add'>+	u32 tag_lo;</div><div class='add'>+	u32 tag_hi;</div><div class='add'>+	u32 valid_ae_cmpl_cons;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_AE_MCQE_QPVALID		= Bit(31),</div><div class='add'>+	OCRDMA_AE_MCQE_QPID_MASK	= 0xFFFF,</div><div class='add'>+</div><div class='add'>+	OCRDMA_AE_MCQE_CQVALID		= Bit(31),</div><div class='add'>+	OCRDMA_AE_MCQE_CQID_MASK	= 0xFFFF,</div><div class='add'>+	OCRDMA_AE_MCQE_VALID		= Bit(31),</div><div class='add'>+	OCRDMA_AE_MCQE_AE		= Bit(30),</div><div class='add'>+	OCRDMA_AE_MCQE_EVENT_TYPE_SHIFT	= 16,</div><div class='add'>+	OCRDMA_AE_MCQE_EVENT_TYPE_MASK	=</div><div class='add'>+					0xFF &lt;&lt; OCRDMA_AE_MCQE_EVENT_TYPE_SHIFT,</div><div class='add'>+	OCRDMA_AE_MCQE_EVENT_CODE_SHIFT	= 8,</div><div class='add'>+	OCRDMA_AE_MCQE_EVENT_CODE_MASK	=</div><div class='add'>+					0xFF &lt;&lt; OCRDMA_AE_MCQE_EVENT_CODE_SHIFT</div><div class='add'>+};</div><div class='add'>+struct ocrdma_ae_mcqe {</div><div class='add'>+	u32 qpvalid_qpid;</div><div class='add'>+	u32 cqvalid_cqid;</div><div class='add'>+	u32 evt_tag;</div><div class='add'>+	u32 valid_ae_event;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_AE_MPA_MCQE_REQ_ID_SHIFT		= 16,</div><div class='add'>+	OCRDMA_AE_MPA_MCQE_REQ_ID_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_AE_MPA_MCQE_REQ_ID_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_AE_MPA_MCQE_EVENT_CODE_SHIFT	= 8,</div><div class='add'>+	OCRDMA_AE_MPA_MCQE_EVENT_CODE_MASK	= 0xFF &lt;&lt;</div><div class='add'>+					OCRDMA_AE_MPA_MCQE_EVENT_CODE_SHIFT,</div><div class='add'>+	OCRDMA_AE_MPA_MCQE_EVENT_TYPE_SHIFT	= 16,</div><div class='add'>+	OCRDMA_AE_MPA_MCQE_EVENT_TYPE_MASK	= 0xFF &lt;&lt;</div><div class='add'>+					OCRDMA_AE_MPA_MCQE_EVENT_TYPE_SHIFT,</div><div class='add'>+	OCRDMA_AE_MPA_MCQE_EVENT_AE_SHIFT	= 30,</div><div class='add'>+	OCRDMA_AE_MPA_MCQE_EVENT_AE_MASK	= Bit(30),</div><div class='add'>+	OCRDMA_AE_MPA_MCQE_EVENT_VALID_SHIFT	= 31,</div><div class='add'>+	OCRDMA_AE_MPA_MCQE_EVENT_VALID_MASK	= Bit(31)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_ae_mpa_mcqe {</div><div class='add'>+	u32 req_id;</div><div class='add'>+	u32 w1;</div><div class='add'>+	u32 w2;</div><div class='add'>+	u32 valid_ae_event;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_AE_QP_MCQE_NEW_QP_STATE_SHIFT	= 0,</div><div class='add'>+	OCRDMA_AE_QP_MCQE_NEW_QP_STATE_MASK	= 0xFFFF,</div><div class='add'>+	OCRDMA_AE_QP_MCQE_QP_ID_SHIFT		= 16,</div><div class='add'>+	OCRDMA_AE_QP_MCQE_QP_ID_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+						OCRDMA_AE_QP_MCQE_QP_ID_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_AE_QP_MCQE_EVENT_CODE_SHIFT	= 8,</div><div class='add'>+	OCRDMA_AE_QP_MCQE_EVENT_CODE_MASK	= 0xFF &lt;&lt;</div><div class='add'>+				OCRDMA_AE_QP_MCQE_EVENT_CODE_SHIFT,</div><div class='add'>+	OCRDMA_AE_QP_MCQE_EVENT_TYPE_SHIFT	= 16,</div><div class='add'>+	OCRDMA_AE_QP_MCQE_EVENT_TYPE_MASK	= 0xFF &lt;&lt;</div><div class='add'>+				OCRDMA_AE_QP_MCQE_EVENT_TYPE_SHIFT,</div><div class='add'>+	OCRDMA_AE_QP_MCQE_EVENT_AE_SHIFT	= 30,</div><div class='add'>+	OCRDMA_AE_QP_MCQE_EVENT_AE_MASK		= Bit(30),</div><div class='add'>+	OCRDMA_AE_QP_MCQE_EVENT_VALID_SHIFT	= 31,</div><div class='add'>+	OCRDMA_AE_QP_MCQE_EVENT_VALID_MASK	= Bit(31)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_ae_qp_mcqe {</div><div class='add'>+	u32 qp_id_state;</div><div class='add'>+	u32 w1;</div><div class='add'>+	u32 w2;</div><div class='add'>+	u32 valid_ae_event;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define OCRDMA_ASYNC_EVE_CODE 0x14</div><div class='add'>+</div><div class='add'>+enum OCRDMA_ASYNC_EVENT_TYPE {</div><div class='add'>+	OCRDMA_CQ_ERROR			= 0x00,</div><div class='add'>+	OCRDMA_CQ_OVERRUN_ERROR		= 0x01,</div><div class='add'>+	OCRDMA_CQ_QPCAT_ERROR		= 0x02,</div><div class='add'>+	OCRDMA_QP_ACCESS_ERROR		= 0x03,</div><div class='add'>+	OCRDMA_QP_COMM_EST_EVENT	= 0x04,</div><div class='add'>+	OCRDMA_SQ_DRAINED_EVENT		= 0x05,</div><div class='add'>+	OCRDMA_DEVICE_FATAL_EVENT	= 0x08,</div><div class='add'>+	OCRDMA_SRQCAT_ERROR		= 0x0E,</div><div class='add'>+	OCRDMA_SRQ_LIMIT_EVENT		= 0x0F,</div><div class='add'>+	OCRDMA_QP_LAST_WQE_EVENT	= 0x10</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mailbox command request and responses */</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_CQ_OVERFLOW_SHIFT		= 2,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_CQ_OVERFLOW_MASK		= Bit(2),</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_SRQ_SUPPORTED_SHIFT	= 3,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_SRQ_SUPPORTED_MASK		= Bit(3),</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_QP_SHIFT		= 8,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_QP_MASK		= 0xFFFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_QP_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_PD_SHIFT		= 16,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_PD_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_MBX_QUERY_CFG_MAX_PD_SHIFT,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_CA_ACK_DELAY_SHIFT		= 8,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_CA_ACK_DELAY_MASK		= 0xFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_CA_ACK_DELAY_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_SEND_SGE_SHIFT		= 0,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_SEND_SGE_MASK		= 0xFFFF,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_ORD_PER_QP_SHIFT	= 0,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_ORD_PER_QP_MASK	= 0xFFFF,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_IRD_PER_QP_SHIFT	= 16,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_IRD_PER_QP_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_IRD_PER_QP_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_WQE_SIZE_OFFSET	= 24,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_WQE_SIZE_MASK		= 0xFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_WQE_SIZE_OFFSET,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_RQE_SIZE_OFFSET	= 16,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_RQE_SIZE_MASK		= 0xFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_RQE_SIZE_OFFSET,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_DPP_CQES_OFFSET	= 0,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_DPP_CQES_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_DPP_CQES_OFFSET,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_SRQ_OFFSET		= 16,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_SRQ_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_SRQ_OFFSET,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_RPIR_QPS_OFFSET	= 0,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_RPIR_QPS_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_RPIR_QPS_OFFSET,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_DPP_PDS_OFFSET		= 16,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_DPP_PDS_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_DPP_PDS_OFFSET,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_DPP_CREDITS_OFFSET	= 0,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_DPP_CREDITS_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_DPP_CREDITS_OFFSET,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_DPP_QPS_OFFSET		= 0,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_DPP_QPS_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_DPP_QPS_OFFSET,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_WQES_PER_WQ_OFFSET	= 16,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_WQES_PER_WQ_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_WQES_PER_WQ_OFFSET,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_RQES_PER_RQ_OFFSET	= 0,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_RQES_PER_RQ_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_WQES_PER_WQ_OFFSET,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_CQ_OFFSET		= 16,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_CQ_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_CQ_OFFSET,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_CQES_PER_CQ_OFFSET	= 0,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_CQES_PER_CQ_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_CQES_PER_CQ_OFFSET,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_SRQ_RQE_OFFSET		= 16,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_SRQ_RQE_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_SRQ_RQE_OFFSET,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_SRQ_SGE_OFFSET		= 0,</div><div class='add'>+	OCRDMA_MBX_QUERY_CFG_MAX_SRQ_SGE_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_MBX_QUERY_CFG_MAX_SRQ_SGE_OFFSET,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_mbx_query_config {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+	u32 qp_srq_cq_ird_ord;</div><div class='add'>+	u32 max_pd_ca_ack_delay;</div><div class='add'>+	u32 max_write_send_sge;</div><div class='add'>+	u32 max_ird_ord_per_qp;</div><div class='add'>+	u32 max_shared_ird_ord;</div><div class='add'>+	u32 max_mr;</div><div class='add'>+	u64 max_mr_size;</div><div class='add'>+	u32 max_num_mr_pbl;</div><div class='add'>+	u32 max_mw;</div><div class='add'>+	u32 max_fmr;</div><div class='add'>+	u32 max_pages_per_frmr;</div><div class='add'>+	u32 max_mcast_group;</div><div class='add'>+	u32 max_mcast_qp_attach;</div><div class='add'>+	u32 max_total_mcast_qp_attach;</div><div class='add'>+	u32 wqe_rqe_stride_max_dpp_cqs;</div><div class='add'>+	u32 max_srq_rpir_qps;</div><div class='add'>+	u32 max_dpp_pds_credits;</div><div class='add'>+	u32 max_dpp_credits_pds_per_pd;</div><div class='add'>+	u32 max_wqes_rqes_per_q;</div><div class='add'>+	u32 max_cq_cqes_per_cq;</div><div class='add'>+	u32 max_srq_rqe_sge;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_fw_ver_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+</div><div class='add'>+	u8 running_ver[32];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_fw_conf_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+</div><div class='add'>+	u32 config_num;</div><div class='add'>+	u32 asic_revision;</div><div class='add'>+	u32 phy_port;</div><div class='add'>+	u32 fn_mode;</div><div class='add'>+	struct {</div><div class='add'>+		u32 mode;</div><div class='add'>+		u32 nic_wqid_base;</div><div class='add'>+		u32 nic_wq_tot;</div><div class='add'>+		u32 prot_wqid_base;</div><div class='add'>+		u32 prot_wq_tot;</div><div class='add'>+		u32 prot_rqid_base;</div><div class='add'>+		u32 prot_rqid_tot;</div><div class='add'>+		u32 rsvd[6];</div><div class='add'>+	} ulp[2];</div><div class='add'>+	u32 fn_capabilities;</div><div class='add'>+	u32 rsvd1;</div><div class='add'>+	u32 rsvd2;</div><div class='add'>+	u32 base_eqid;</div><div class='add'>+	u32 max_eq;</div><div class='add'>+</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_FN_MODE_RDMA	= 0x4</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CREATE_CQ_VER2			= 2,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_CQ_PAGE_CNT_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_CQ_PAGE_SIZE_SHIFT	= 16,</div><div class='add'>+	OCRDMA_CREATE_CQ_PAGE_SIZE_MASK		= 0xFF,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_CQ_COALESCWM_SHIFT	= 12,</div><div class='add'>+	OCRDMA_CREATE_CQ_COALESCWM_MASK		= Bit(13) | Bit(12),</div><div class='add'>+	OCRDMA_CREATE_CQ_FLAGS_NODELAY		= Bit(14),</div><div class='add'>+	OCRDMA_CREATE_CQ_FLAGS_AUTO_VALID	= Bit(15),</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_CQ_EQ_ID_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_CQ_CQE_COUNT_MASK		= 0xFFFF</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CREATE_CQ_VER0			= 0,</div><div class='add'>+	OCRDMA_CREATE_CQ_DPP			= 1,</div><div class='add'>+	OCRDMA_CREATE_CQ_TYPE_SHIFT		= 24,</div><div class='add'>+	OCRDMA_CREATE_CQ_EQID_SHIFT		= 22,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_CQ_CNT_SHIFT		= 27,</div><div class='add'>+	OCRDMA_CREATE_CQ_FLAGS_VALID		= Bit(29),</div><div class='add'>+	OCRDMA_CREATE_CQ_FLAGS_EVENTABLE	= Bit(31),</div><div class='add'>+	OCRDMA_CREATE_CQ_DEF_FLAGS		= OCRDMA_CREATE_CQ_FLAGS_VALID |</div><div class='add'>+					OCRDMA_CREATE_CQ_FLAGS_EVENTABLE |</div><div class='add'>+					OCRDMA_CREATE_CQ_FLAGS_NODELAY</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_cq_cmd {</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+	u32 pgsz_pgcnt;</div><div class='add'>+	u32 ev_cnt_flags;</div><div class='add'>+	u32 eqn;</div><div class='add'>+	u32 cqe_count;</div><div class='add'>+	u32 rsvd6;</div><div class='add'>+	struct ocrdma_pa pa[OCRDMA_CREATE_CQ_MAX_PAGES];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_cq {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_create_cq_cmd cmd;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CREATE_CQ_RSP_CQ_ID_MASK	= 0xFFFF</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_cq_cmd_rsp {</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+	u32 cq_id;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_cq_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_create_cq_cmd_rsp rsp;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CREATE_MQ_V0_CQ_ID_SHIFT		= 22,</div><div class='add'>+	OCRDMA_CREATE_MQ_CQ_ID_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_MQ_RING_SIZE_SHIFT	= 16,</div><div class='add'>+	OCRDMA_CREATE_MQ_VALID			= Bit(31),</div><div class='add'>+	OCRDMA_CREATE_MQ_ASYNC_CQ_VALID		= Bit(0)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_mq_v0 {</div><div class='add'>+	u32 pages;</div><div class='add'>+	u32 cqid_ringsize;</div><div class='add'>+	u32 valid;</div><div class='add'>+	u32 async_cqid_valid;</div><div class='add'>+	u32 rsvd;</div><div class='add'>+	struct ocrdma_pa pa[8];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_mq_v1 {</div><div class='add'>+	u32 cqid_pages;</div><div class='add'>+	u32 async_event_bitmap;</div><div class='add'>+	u32 async_cqid_ringsize;</div><div class='add'>+	u32 valid;</div><div class='add'>+	u32 async_cqid_valid;</div><div class='add'>+	u32 rsvd;</div><div class='add'>+	struct ocrdma_pa pa[8];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_mq_req {</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+	union {</div><div class='add'>+		struct ocrdma_create_mq_v0 v0;</div><div class='add'>+		struct ocrdma_create_mq_v1 v1;</div><div class='add'>+	};</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_mq_rsp {</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+	u32 id;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_DESTROY_CQ_QID_SHIFT			= 0,</div><div class='add'>+	OCRDMA_DESTROY_CQ_QID_MASK			= 0xFFFF,</div><div class='add'>+	OCRDMA_DESTROY_CQ_QID_BYPASS_FLUSH_SHIFT	= 16,</div><div class='add'>+	OCRDMA_DESTROY_CQ_QID_BYPASS_FLUSH_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_DESTROY_CQ_QID_BYPASS_FLUSH_SHIFT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_destroy_cq {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+</div><div class='add'>+	u32 bypass_flush_qid;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_destroy_cq_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_QPT_GSI	= 1,</div><div class='add'>+	OCRDMA_QPT_RC	= 2,</div><div class='add'>+	OCRDMA_QPT_UD	= 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_PD_ID_SHIFT	= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_PD_ID_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_SQ_PAGE_SIZE_SHIFT	= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_RQ_PAGE_SIZE_SHIFT	= 19,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_QPT_SHIFT		= 29,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_QPT_MASK		= Bit(31) | Bit(30) | Bit(29),</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_RQE_SHIFT	= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_RQE_MASK	= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_WQE_SHIFT	= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_WQE_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_CREATE_QP_REQ_MAX_WQE_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_SGE_WRITE_SHIFT	= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_SGE_WRITE_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_SGE_SEND_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_SGE_SEND_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_CREATE_QP_REQ_MAX_SGE_SEND_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_FMR_EN_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_FMR_EN_MASK		= Bit(0),</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_ZERO_LKEYEN_SHIFT		= 1,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_ZERO_LKEYEN_MASK		= Bit(1),</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_BIND_MEMWIN_SHIFT		= 2,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_BIND_MEMWIN_MASK		= Bit(2),</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_INB_WREN_SHIFT		= 3,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_INB_WREN_MASK		= Bit(3),</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_INB_RDEN_SHIFT		= 4,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_INB_RDEN_MASK		= Bit(4),</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_USE_SRQ_SHIFT		= 5,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_USE_SRQ_MASK		= Bit(5),</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_ENABLE_RPIR_SHIFT		= 6,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_ENABLE_RPIR_MASK		= Bit(6),</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_ENABLE_DPP_SHIFT		= 7,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_ENABLE_DPP_MASK		= Bit(7),</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_ENABLE_DPP_CQ_SHIFT	= 8,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_ENABLE_DPP_CQ_MASK		= Bit(8),</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_SGE_RECV_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_SGE_RECV_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_MAX_SGE_RECV_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_IRD_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_IRD_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_ORD_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_MAX_ORD_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_MAX_ORD_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_NUM_RQ_PAGES_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_NUM_RQ_PAGES_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_NUM_WQ_PAGES_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_NUM_WQ_PAGES_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_NUM_WQ_PAGES_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_RQE_SIZE_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_RQE_SIZE_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_WQE_SIZE_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_WQE_SIZE_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_WQE_SIZE_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_RQ_CQID_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_RQ_CQID_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_WQ_CQID_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_WQ_CQID_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_WQ_CQID_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_DPP_CQPID_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_DPP_CQPID_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_DPP_CREDIT_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_DPP_CREDIT_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_REQ_DPP_CREDIT_SHIFT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CREATE_QP_REQ_DPP_CREDIT_LIMIT	= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_DPP_PAGE_SHIFT	= 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MAX_OCRDMA_IRD_PAGES 4</div><div class='add'>+</div><div class='add'>+enum ocrdma_qp_flags {</div><div class='add'>+	OCRDMA_QP_MW_BIND	= 1,</div><div class='add'>+	OCRDMA_QP_LKEY0		= (1 &lt;&lt; 1),</div><div class='add'>+	OCRDMA_QP_FAST_REG	= (1 &lt;&lt; 2),</div><div class='add'>+	OCRDMA_QP_INB_RD	= (1 &lt;&lt; 6),</div><div class='add'>+	OCRDMA_QP_INB_WR	= (1 &lt;&lt; 7),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ocrdma_qp_state {</div><div class='add'>+	OCRDMA_QPS_RST		= 0,</div><div class='add'>+	OCRDMA_QPS_INIT		= 1,</div><div class='add'>+	OCRDMA_QPS_RTR		= 2,</div><div class='add'>+	OCRDMA_QPS_RTS		= 3,</div><div class='add'>+	OCRDMA_QPS_SQE		= 4,</div><div class='add'>+	OCRDMA_QPS_SQ_DRAINING	= 5,</div><div class='add'>+	OCRDMA_QPS_ERR		= 6,</div><div class='add'>+	OCRDMA_QPS_SQD		= 7</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_qp_req {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+</div><div class='add'>+	u32 type_pgsz_pdn;</div><div class='add'>+	u32 max_wqe_rqe;</div><div class='add'>+	u32 max_sge_send_write;</div><div class='add'>+	u32 max_sge_recv_flags;</div><div class='add'>+	u32 max_ord_ird;</div><div class='add'>+	u32 num_wq_rq_pages;</div><div class='add'>+	u32 wqe_rqe_size;</div><div class='add'>+	u32 wq_rq_cqid;</div><div class='add'>+	struct ocrdma_pa wq_addr[MAX_OCRDMA_QP_PAGES];</div><div class='add'>+	struct ocrdma_pa rq_addr[MAX_OCRDMA_QP_PAGES];</div><div class='add'>+	u32 dpp_credits_cqid;</div><div class='add'>+	u32 rpir_lkey;</div><div class='add'>+	struct ocrdma_pa ird_addr[MAX_OCRDMA_IRD_PAGES];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_QP_ID_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_QP_ID_MASK			= 0xFFFF,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_RQE_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_RQE_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_WQE_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_WQE_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_RSP_MAX_WQE_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_SGE_WRITE_SHIFT	= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_SGE_WRITE_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_SGE_SEND_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_SGE_SEND_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_RSP_MAX_SGE_SEND_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_SGE_RECV_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_SGE_RECV_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_RSP_MAX_SGE_RECV_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_IRD_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_IRD_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_ORD_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_MAX_ORD_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_RSP_MAX_ORD_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_RQ_ID_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_RQ_ID_MASK			= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_SQ_ID_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_SQ_ID_MASK			= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_RSP_SQ_ID_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_DPP_ENABLED_MASK		= Bit(0),</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_DPP_PAGE_OFFSET_SHIFT	= 1,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_DPP_PAGE_OFFSET_MASK	= 0x7FFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_RSP_DPP_PAGE_OFFSET_SHIFT,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_DPP_CREDITS_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_QP_RSP_DPP_CREDITS_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_CREATE_QP_RSP_DPP_CREDITS_SHIFT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_qp_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+</div><div class='add'>+	u32 qp_id;</div><div class='add'>+	u32 max_wqe_rqe;</div><div class='add'>+	u32 max_sge_send_write;</div><div class='add'>+	u32 max_sge_recv;</div><div class='add'>+	u32 max_ord_ird;</div><div class='add'>+	u32 sq_rq_id;</div><div class='add'>+	u32 dpp_response;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_destroy_qp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+	u32 qp_id;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_destroy_qp_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_MODIFY_QP_ID_SHIFT	= 0,</div><div class='add'>+	OCRDMA_MODIFY_QP_ID_MASK	= 0xFFFF,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QP_PARA_QPS_VALID	= Bit(0),</div><div class='add'>+	OCRDMA_QP_PARA_SQD_ASYNC_VALID	= Bit(1),</div><div class='add'>+	OCRDMA_QP_PARA_PKEY_VALID	= Bit(2),</div><div class='add'>+	OCRDMA_QP_PARA_QKEY_VALID	= Bit(3),</div><div class='add'>+	OCRDMA_QP_PARA_PMTU_VALID	= Bit(4),</div><div class='add'>+	OCRDMA_QP_PARA_ACK_TO_VALID	= Bit(5),</div><div class='add'>+	OCRDMA_QP_PARA_RETRY_CNT_VALID	= Bit(6),</div><div class='add'>+	OCRDMA_QP_PARA_RRC_VALID	= Bit(7),</div><div class='add'>+	OCRDMA_QP_PARA_RQPSN_VALID	= Bit(8),</div><div class='add'>+	OCRDMA_QP_PARA_MAX_IRD_VALID	= Bit(9),</div><div class='add'>+	OCRDMA_QP_PARA_MAX_ORD_VALID	= Bit(10),</div><div class='add'>+	OCRDMA_QP_PARA_RNT_VALID	= Bit(11),</div><div class='add'>+	OCRDMA_QP_PARA_SQPSN_VALID	= Bit(12),</div><div class='add'>+	OCRDMA_QP_PARA_DST_QPN_VALID	= Bit(13),</div><div class='add'>+	OCRDMA_QP_PARA_MAX_WQE_VALID	= Bit(14),</div><div class='add'>+	OCRDMA_QP_PARA_MAX_RQE_VALID	= Bit(15),</div><div class='add'>+	OCRDMA_QP_PARA_SGE_SEND_VALID	= Bit(16),</div><div class='add'>+	OCRDMA_QP_PARA_SGE_RECV_VALID	= Bit(17),</div><div class='add'>+	OCRDMA_QP_PARA_SGE_WR_VALID	= Bit(18),</div><div class='add'>+	OCRDMA_QP_PARA_INB_RDEN_VALID	= Bit(19),</div><div class='add'>+	OCRDMA_QP_PARA_INB_WREN_VALID	= Bit(20),</div><div class='add'>+	OCRDMA_QP_PARA_FLOW_LBL_VALID	= Bit(21),</div><div class='add'>+	OCRDMA_QP_PARA_BIND_EN_VALID	= Bit(22),</div><div class='add'>+	OCRDMA_QP_PARA_ZLKEY_EN_VALID	= Bit(23),</div><div class='add'>+	OCRDMA_QP_PARA_FMR_EN_VALID	= Bit(24),</div><div class='add'>+	OCRDMA_QP_PARA_INBAT_EN_VALID	= Bit(25),</div><div class='add'>+	OCRDMA_QP_PARA_VLAN_EN_VALID	= Bit(26),</div><div class='add'>+</div><div class='add'>+	OCRDMA_MODIFY_QP_FLAGS_RD	= Bit(0),</div><div class='add'>+	OCRDMA_MODIFY_QP_FLAGS_WR	= Bit(1),</div><div class='add'>+	OCRDMA_MODIFY_QP_FLAGS_SEND	= Bit(2),</div><div class='add'>+	OCRDMA_MODIFY_QP_FLAGS_ATOMIC	= Bit(3)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_QP_PARAMS_SRQ_ID_SHIFT		= 0,</div><div class='add'>+	OCRDMA_QP_PARAMS_SRQ_ID_MASK		= 0xFFFF,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_RQE_SHIFT		= 0,</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_RQE_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_WQE_SHIFT		= 16,</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_WQE_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+	    OCRDMA_QP_PARAMS_MAX_WQE_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_SGE_WRITE_SHIFT	= 0,</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_SGE_WRITE_MASK	= 0xFFFF,</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_SGE_SEND_SHIFT	= 16,</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_SGE_SEND_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_MAX_SGE_SEND_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QP_PARAMS_FLAGS_FMR_EN		= Bit(0),</div><div class='add'>+	OCRDMA_QP_PARAMS_FLAGS_LKEY_0_EN	= Bit(1),</div><div class='add'>+	OCRDMA_QP_PARAMS_FLAGS_BIND_MW_EN	= Bit(2),</div><div class='add'>+	OCRDMA_QP_PARAMS_FLAGS_INBWR_EN		= Bit(3),</div><div class='add'>+	OCRDMA_QP_PARAMS_FLAGS_INBRD_EN		= Bit(4),</div><div class='add'>+	OCRDMA_QP_PARAMS_STATE_SHIFT		= 5,</div><div class='add'>+	OCRDMA_QP_PARAMS_STATE_MASK		= Bit(5) | Bit(6) | Bit(7),</div><div class='add'>+	OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC	= Bit(8),</div><div class='add'>+	OCRDMA_QP_PARAMS_FLAGS_INB_ATEN		= Bit(9),</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_SGE_RECV_SHIFT	= 16,</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_SGE_RECV_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_MAX_SGE_RECV_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_IRD_SHIFT		= 0,</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_IRD_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_ORD_SHIFT		= 16,</div><div class='add'>+	OCRDMA_QP_PARAMS_MAX_ORD_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_MAX_ORD_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QP_PARAMS_RQ_CQID_SHIFT		= 0,</div><div class='add'>+	OCRDMA_QP_PARAMS_RQ_CQID_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_QP_PARAMS_WQ_CQID_SHIFT		= 16,</div><div class='add'>+	OCRDMA_QP_PARAMS_WQ_CQID_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_WQ_CQID_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QP_PARAMS_RQ_PSN_SHIFT		= 0,</div><div class='add'>+	OCRDMA_QP_PARAMS_RQ_PSN_MASK		= 0xFFFFFF,</div><div class='add'>+	OCRDMA_QP_PARAMS_HOP_LMT_SHIFT		= 24,</div><div class='add'>+	OCRDMA_QP_PARAMS_HOP_LMT_MASK		= 0xFF &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_HOP_LMT_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QP_PARAMS_SQ_PSN_SHIFT		= 0,</div><div class='add'>+	OCRDMA_QP_PARAMS_SQ_PSN_MASK		= 0xFFFFFF,</div><div class='add'>+	OCRDMA_QP_PARAMS_TCLASS_SHIFT		= 24,</div><div class='add'>+	OCRDMA_QP_PARAMS_TCLASS_MASK		= 0xFF &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_TCLASS_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QP_PARAMS_DEST_QPN_SHIFT		= 0,</div><div class='add'>+	OCRDMA_QP_PARAMS_DEST_QPN_MASK		= 0xFFFFFF,</div><div class='add'>+	OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT	= 24,</div><div class='add'>+	OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK	= 0x7 &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT,</div><div class='add'>+	OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT	= 27,</div><div class='add'>+	OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK	= 0x1F &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QP_PARAMS_PKEY_IDNEX_SHIFT	= 0,</div><div class='add'>+	OCRDMA_QP_PARAMS_PKEY_INDEX_MASK	= 0xFFFF,</div><div class='add'>+	OCRDMA_QP_PARAMS_PATH_MTU_SHIFT		= 18,</div><div class='add'>+	OCRDMA_QP_PARAMS_PATH_MTU_MASK		= 0x3FFF &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_PATH_MTU_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QP_PARAMS_FLOW_LABEL_SHIFT	= 0,</div><div class='add'>+	OCRDMA_QP_PARAMS_FLOW_LABEL_MASK	= 0xFFFFF,</div><div class='add'>+	OCRDMA_QP_PARAMS_SL_SHIFT		= 20,</div><div class='add'>+	OCRDMA_QP_PARAMS_SL_MASK		= 0xF &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_SL_SHIFT,</div><div class='add'>+	OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT	= 24,</div><div class='add'>+	OCRDMA_QP_PARAMS_RETRY_CNT_MASK		= 0x7 &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT,</div><div class='add'>+	OCRDMA_QP_PARAMS_RNR_NAK_TIMER_SHIFT	= 27,</div><div class='add'>+	OCRDMA_QP_PARAMS_RNR_NAK_TIMER_MASK	= 0x1F &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_RNR_NAK_TIMER_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QP_PARAMS_DMAC_B4_TO_B5_SHIFT	= 0,</div><div class='add'>+	OCRDMA_QP_PARAMS_DMAC_B4_TO_B5_MASK	= 0xFFFF,</div><div class='add'>+	OCRDMA_QP_PARAMS_VLAN_SHIFT		= 16,</div><div class='add'>+	OCRDMA_QP_PARAMS_VLAN_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_QP_PARAMS_VLAN_SHIFT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_qp_params {</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 max_wqe_rqe;</div><div class='add'>+	u32 max_sge_send_write;</div><div class='add'>+	u32 max_sge_recv_flags;</div><div class='add'>+	u32 max_ord_ird;</div><div class='add'>+	u32 wq_rq_cqid;</div><div class='add'>+	u32 hop_lmt_rq_psn;</div><div class='add'>+	u32 tclass_sq_psn;</div><div class='add'>+	u32 ack_to_rnr_rtc_dest_qpn;</div><div class='add'>+	u32 path_mtu_pkey_indx;</div><div class='add'>+	u32 rnt_rc_sl_fl;</div><div class='add'>+	u8 sgid[16];</div><div class='add'>+	u8 dgid[16];</div><div class='add'>+	u32 dmac_b0_to_b3;</div><div class='add'>+	u32 vlan_dmac_b4_to_b5;</div><div class='add'>+	u32 qkey;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct ocrdma_modify_qp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+</div><div class='add'>+	struct ocrdma_qp_params params;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u32 rdma_flags;</div><div class='add'>+	u32 num_outstanding_atomic_rd;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_MODIFY_QP_RSP_MAX_RQE_SHIFT	= 0,</div><div class='add'>+	OCRDMA_MODIFY_QP_RSP_MAX_RQE_MASK	= 0xFFFF,</div><div class='add'>+	OCRDMA_MODIFY_QP_RSP_MAX_WQE_SHIFT	= 16,</div><div class='add'>+	OCRDMA_MODIFY_QP_RSP_MAX_WQE_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_MODIFY_QP_RSP_MAX_WQE_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MODIFY_QP_RSP_MAX_IRD_SHIFT	= 0,</div><div class='add'>+	OCRDMA_MODIFY_QP_RSP_MAX_IRD_MASK	= 0xFFFF,</div><div class='add'>+	OCRDMA_MODIFY_QP_RSP_MAX_ORD_SHIFT	= 16,</div><div class='add'>+	OCRDMA_MODIFY_QP_RSP_MAX_ORD_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_MODIFY_QP_RSP_MAX_ORD_SHIFT</div><div class='add'>+};</div><div class='add'>+struct ocrdma_modify_qp_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+</div><div class='add'>+	u32 max_wqe_rqe;</div><div class='add'>+	u32 max_ord_ird;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_query_qp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+</div><div class='add'>+#define OCRDMA_QUERY_UP_QP_ID_SHIFT 0</div><div class='add'>+#define OCRDMA_QUERY_UP_QP_ID_MASK   0xFFFFFF</div><div class='add'>+	u32 qp_id;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_query_qp_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+	struct ocrdma_qp_params params;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CREATE_SRQ_PD_ID_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_SRQ_PD_ID_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_SRQ_PG_SZ_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CREATE_SRQ_PG_SZ_MASK		= 0x3 &lt;&lt;</div><div class='add'>+					OCRDMA_CREATE_SRQ_PG_SZ_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_SRQ_MAX_RQE_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_SRQ_MAX_SGE_RECV_SHIFT	= 16,</div><div class='add'>+	OCRDMA_CREATE_SRQ_MAX_SGE_RECV_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_CREATE_SRQ_MAX_SGE_RECV_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_SRQ_RQE_SIZE_SHIFT	= 0,</div><div class='add'>+	OCRDMA_CREATE_SRQ_RQE_SIZE_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_SRQ_NUM_RQ_PAGES_SHIFT	= 16,</div><div class='add'>+	OCRDMA_CREATE_SRQ_NUM_RQ_PAGES_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_CREATE_SRQ_NUM_RQ_PAGES_SHIFT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_srq {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+</div><div class='add'>+	u32 pgsz_pdid;</div><div class='add'>+	u32 max_sge_rqe;</div><div class='add'>+	u32 pages_rqe_sz;</div><div class='add'>+	struct ocrdma_pa rq_addr[MAX_OCRDMA_SRQ_PAGES];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CREATE_SRQ_RSP_SRQ_ID_SHIFT			= 0,</div><div class='add'>+	OCRDMA_CREATE_SRQ_RSP_SRQ_ID_MASK			= 0xFFFFFF,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_SRQ_RSP_MAX_RQE_ALLOCATED_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CREATE_SRQ_RSP_MAX_RQE_ALLOCATED_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_CREATE_SRQ_RSP_MAX_SGE_RECV_ALLOCATED_SHIFT	= 16,</div><div class='add'>+	OCRDMA_CREATE_SRQ_RSP_MAX_SGE_RECV_ALLOCATED_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+			OCRDMA_CREATE_SRQ_RSP_MAX_SGE_RECV_ALLOCATED_SHIFT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_srq_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 max_sge_rqe_allocated;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_MODIFY_SRQ_ID_SHIFT	= 0,</div><div class='add'>+	OCRDMA_MODIFY_SRQ_ID_MASK	= 0xFFFFFF,</div><div class='add'>+</div><div class='add'>+	OCRDMA_MODIFY_SRQ_MAX_RQE_SHIFT	= 0,</div><div class='add'>+	OCRDMA_MODIFY_SRQ_MAX_RQE_MASK	= 0xFFFF,</div><div class='add'>+	OCRDMA_MODIFY_SRQ_LIMIT_SHIFT	= 16,</div><div class='add'>+	OCRDMA_MODIFY_SRQ__LIMIT_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_MODIFY_SRQ_LIMIT_SHIFT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_modify_srq {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rep;</div><div class='add'>+</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 limit_max_rqe;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_QUERY_SRQ_ID_SHIFT	= 0,</div><div class='add'>+	OCRDMA_QUERY_SRQ_ID_MASK	= 0xFFFFFF</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_query_srq {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp req;</div><div class='add'>+</div><div class='add'>+	u32 id;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_QUERY_SRQ_RSP_PD_ID_SHIFT	= 0,</div><div class='add'>+	OCRDMA_QUERY_SRQ_RSP_PD_ID_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_QUERY_SRQ_RSP_MAX_RQE_SHIFT	= 16,</div><div class='add'>+	OCRDMA_QUERY_SRQ_RSP_MAX_RQE_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_QUERY_SRQ_RSP_MAX_RQE_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_QUERY_SRQ_RSP_MAX_SGE_RECV_SHIFT	= 0,</div><div class='add'>+	OCRDMA_QUERY_SRQ_RSP_MAX_SGE_RECV_MASK	= 0xFFFF,</div><div class='add'>+	OCRDMA_QUERY_SRQ_RSP_SRQ_LIMIT_SHIFT	= 16,</div><div class='add'>+	OCRDMA_QUERY_SRQ_RSP_SRQ_LIMIT_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_QUERY_SRQ_RSP_SRQ_LIMIT_SHIFT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_query_srq_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp req;</div><div class='add'>+</div><div class='add'>+	u32 max_rqe_pdid;</div><div class='add'>+	u32 srq_lmt_max_sge;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_DESTROY_SRQ_ID_SHIFT	= 0,</div><div class='add'>+	OCRDMA_DESTROY_SRQ_ID_MASK	= 0xFFFFFF</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_destroy_srq {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp req;</div><div class='add'>+</div><div class='add'>+	u32 id;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_ALLOC_PD_ENABLE_DPP	= BIT(16),</div><div class='add'>+	OCRDMA_PD_MAX_DPP_ENABLED_QP	= 8,</div><div class='add'>+	OCRDMA_DPP_PAGE_SIZE		= 4096</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_alloc_pd {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+	u32 enable_dpp_rsvd;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_ALLOC_PD_RSP_DPP			= Bit(16),</div><div class='add'>+	OCRDMA_ALLOC_PD_RSP_DPP_PAGE_SHIFT	= 20,</div><div class='add'>+	OCRDMA_ALLOC_PD_RSP_PDID_MASK		= 0xFFFF,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_alloc_pd_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+	u32 dpp_page_pdid;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_dealloc_pd {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+	u32 id;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_dealloc_pd_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_ADDR_CHECK_ENABLE	= 1,</div><div class='add'>+	OCRDMA_ADDR_CHECK_DISABLE	= 0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_ALLOC_LKEY_PD_ID_SHIFT		= 0,</div><div class='add'>+	OCRDMA_ALLOC_LKEY_PD_ID_MASK		= 0xFFFF,</div><div class='add'>+</div><div class='add'>+	OCRDMA_ALLOC_LKEY_ADDR_CHECK_SHIFT	= 0,</div><div class='add'>+	OCRDMA_ALLOC_LKEY_ADDR_CHECK_MASK	= Bit(0),</div><div class='add'>+	OCRDMA_ALLOC_LKEY_FMR_SHIFT		= 1,</div><div class='add'>+	OCRDMA_ALLOC_LKEY_FMR_MASK		= Bit(1),</div><div class='add'>+	OCRDMA_ALLOC_LKEY_REMOTE_INV_SHIFT	= 2,</div><div class='add'>+	OCRDMA_ALLOC_LKEY_REMOTE_INV_MASK	= Bit(2),</div><div class='add'>+	OCRDMA_ALLOC_LKEY_REMOTE_WR_SHIFT	= 3,</div><div class='add'>+	OCRDMA_ALLOC_LKEY_REMOTE_WR_MASK	= Bit(3),</div><div class='add'>+	OCRDMA_ALLOC_LKEY_REMOTE_RD_SHIFT	= 4,</div><div class='add'>+	OCRDMA_ALLOC_LKEY_REMOTE_RD_MASK	= Bit(4),</div><div class='add'>+	OCRDMA_ALLOC_LKEY_LOCAL_WR_SHIFT	= 5,</div><div class='add'>+	OCRDMA_ALLOC_LKEY_LOCAL_WR_MASK		= Bit(5),</div><div class='add'>+	OCRDMA_ALLOC_LKEY_REMOTE_ATOMIC_MASK	= Bit(6),</div><div class='add'>+	OCRDMA_ALLOC_LKEY_REMOTE_ATOMIC_SHIFT	= 6,</div><div class='add'>+	OCRDMA_ALLOC_LKEY_PBL_SIZE_SHIFT	= 16,</div><div class='add'>+	OCRDMA_ALLOC_LKEY_PBL_SIZE_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+						OCRDMA_ALLOC_LKEY_PBL_SIZE_SHIFT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_alloc_lkey {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+</div><div class='add'>+	u32 pdid;</div><div class='add'>+	u32 pbl_sz_flags;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_alloc_lkey_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+</div><div class='add'>+	u32 lrkey;</div><div class='add'>+	u32 num_pbl_rsvd;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_dealloc_lkey {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+</div><div class='add'>+	u32 lkey;</div><div class='add'>+	u32 rsvd_frmr;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_dealloc_lkey_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define MAX_OCRDMA_NSMR_PBL    (u32)22</div><div class='add'>+#define MAX_OCRDMA_PBL_SIZE     65536</div><div class='add'>+#define MAX_OCRDMA_PBL_PER_LKEY	32767</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_REG_NSMR_LRKEY_INDEX_SHIFT	= 0,</div><div class='add'>+	OCRDMA_REG_NSMR_LRKEY_INDEX_MASK	= 0xFFFFFF,</div><div class='add'>+	OCRDMA_REG_NSMR_LRKEY_SHIFT		= 24,</div><div class='add'>+	OCRDMA_REG_NSMR_LRKEY_MASK		= 0xFF &lt;&lt;</div><div class='add'>+					OCRDMA_REG_NSMR_LRKEY_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_REG_NSMR_PD_ID_SHIFT		= 0,</div><div class='add'>+	OCRDMA_REG_NSMR_PD_ID_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_REG_NSMR_NUM_PBL_SHIFT		= 16,</div><div class='add'>+	OCRDMA_REG_NSMR_NUM_PBL_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_REG_NSMR_NUM_PBL_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_REG_NSMR_PBE_SIZE_SHIFT		= 0,</div><div class='add'>+	OCRDMA_REG_NSMR_PBE_SIZE_MASK		= 0xFFFF,</div><div class='add'>+	OCRDMA_REG_NSMR_HPAGE_SIZE_SHIFT	= 16,</div><div class='add'>+	OCRDMA_REG_NSMR_HPAGE_SIZE_MASK		= 0xFF &lt;&lt;</div><div class='add'>+					OCRDMA_REG_NSMR_HPAGE_SIZE_SHIFT,</div><div class='add'>+	OCRDMA_REG_NSMR_BIND_MEMWIN_SHIFT	= 24,</div><div class='add'>+	OCRDMA_REG_NSMR_BIND_MEMWIN_MASK	= Bit(24),</div><div class='add'>+	OCRDMA_REG_NSMR_ZB_SHIFT		= 25,</div><div class='add'>+	OCRDMA_REG_NSMR_ZB_SHIFT_MASK		= Bit(25),</div><div class='add'>+	OCRDMA_REG_NSMR_REMOTE_INV_SHIFT	= 26,</div><div class='add'>+	OCRDMA_REG_NSMR_REMOTE_INV_MASK		= Bit(26),</div><div class='add'>+	OCRDMA_REG_NSMR_REMOTE_WR_SHIFT		= 27,</div><div class='add'>+	OCRDMA_REG_NSMR_REMOTE_WR_MASK		= Bit(27),</div><div class='add'>+	OCRDMA_REG_NSMR_REMOTE_RD_SHIFT		= 28,</div><div class='add'>+	OCRDMA_REG_NSMR_REMOTE_RD_MASK		= Bit(28),</div><div class='add'>+	OCRDMA_REG_NSMR_LOCAL_WR_SHIFT		= 29,</div><div class='add'>+	OCRDMA_REG_NSMR_LOCAL_WR_MASK		= Bit(29),</div><div class='add'>+	OCRDMA_REG_NSMR_REMOTE_ATOMIC_SHIFT	= 30,</div><div class='add'>+	OCRDMA_REG_NSMR_REMOTE_ATOMIC_MASK	= Bit(30),</div><div class='add'>+	OCRDMA_REG_NSMR_LAST_SHIFT		= 31,</div><div class='add'>+	OCRDMA_REG_NSMR_LAST_MASK		= Bit(31)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_reg_nsmr {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr cmd;</div><div class='add'>+</div><div class='add'>+	u32 lrkey_key_index;</div><div class='add'>+	u32 num_pbl_pdid;</div><div class='add'>+	u32 flags_hpage_pbe_sz;</div><div class='add'>+	u32 totlen_low;</div><div class='add'>+	u32 totlen_high;</div><div class='add'>+	u32 fbo_low;</div><div class='add'>+	u32 fbo_high;</div><div class='add'>+	u32 va_loaddr;</div><div class='add'>+	u32 va_hiaddr;</div><div class='add'>+	struct ocrdma_pa pbl[MAX_OCRDMA_NSMR_PBL];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_REG_NSMR_CONT_PBL_SHIFT		= 0,</div><div class='add'>+	OCRDMA_REG_NSMR_CONT_PBL_SHIFT_MASK	= 0xFFFF,</div><div class='add'>+	OCRDMA_REG_NSMR_CONT_NUM_PBL_SHIFT	= 16,</div><div class='add'>+	OCRDMA_REG_NSMR_CONT_NUM_PBL_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_REG_NSMR_CONT_NUM_PBL_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_REG_NSMR_CONT_LAST_SHIFT		= 31,</div><div class='add'>+	OCRDMA_REG_NSMR_CONT_LAST_MASK		= Bit(31)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_reg_nsmr_cont {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr cmd;</div><div class='add'>+</div><div class='add'>+	u32 lrkey;</div><div class='add'>+	u32 num_pbl_offset;</div><div class='add'>+	u32 last;</div><div class='add'>+</div><div class='add'>+	struct ocrdma_pa pbl[MAX_OCRDMA_NSMR_PBL];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_pbe {</div><div class='add'>+	u32 pa_hi;</div><div class='add'>+	u32 pa_lo;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_REG_NSMR_RSP_NUM_PBL_SHIFT	= 16,</div><div class='add'>+	OCRDMA_REG_NSMR_RSP_NUM_PBL_MASK	= 0xFFFF0000</div><div class='add'>+};</div><div class='add'>+struct ocrdma_reg_nsmr_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+</div><div class='add'>+	u32 lrkey;</div><div class='add'>+	u32 num_pbl;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_REG_NSMR_CONT_RSP_LRKEY_INDEX_SHIFT	= 0,</div><div class='add'>+	OCRDMA_REG_NSMR_CONT_RSP_LRKEY_INDEX_MASK	= 0xFFFFFF,</div><div class='add'>+	OCRDMA_REG_NSMR_CONT_RSP_LRKEY_SHIFT		= 24,</div><div class='add'>+	OCRDMA_REG_NSMR_CONT_RSP_LRKEY_MASK		= 0xFF &lt;&lt;</div><div class='add'>+					OCRDMA_REG_NSMR_CONT_RSP_LRKEY_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_REG_NSMR_CONT_RSP_NUM_PBL_SHIFT		= 16,</div><div class='add'>+	OCRDMA_REG_NSMR_CONT_RSP_NUM_PBL_MASK		= 0xFFFF &lt;&lt;</div><div class='add'>+					OCRDMA_REG_NSMR_CONT_RSP_NUM_PBL_SHIFT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_reg_nsmr_cont_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+</div><div class='add'>+	u32 lrkey_key_index;</div><div class='add'>+	u32 num_pbl;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_ALLOC_MW_PD_ID_SHIFT	= 0,</div><div class='add'>+	OCRDMA_ALLOC_MW_PD_ID_MASK	= 0xFFFF</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_alloc_mw {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+</div><div class='add'>+	u32 pdid;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_ALLOC_MW_RSP_LRKEY_INDEX_SHIFT	= 0,</div><div class='add'>+	OCRDMA_ALLOC_MW_RSP_LRKEY_INDEX_MASK	= 0xFFFFFF</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_alloc_mw_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+</div><div class='add'>+	u32 lrkey_index;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_attach_mcast {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+	u32 qp_id;</div><div class='add'>+	u8 mgid[16];</div><div class='add'>+	u32 mac_b0_to_b3;</div><div class='add'>+	u32 vlan_mac_b4_to_b5;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_attach_mcast_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_detach_mcast {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+	u32 qp_id;</div><div class='add'>+	u8 mgid[16];</div><div class='add'>+	u32 mac_b0_to_b3;</div><div class='add'>+	u32 vlan_mac_b4_to_b5;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_detach_mcast_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_CREATE_AH_NUM_PAGES_SHIFT	= 19,</div><div class='add'>+	OCRDMA_CREATE_AH_NUM_PAGES_MASK		= 0xF &lt;&lt;</div><div class='add'>+					OCRDMA_CREATE_AH_NUM_PAGES_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_AH_PAGE_SIZE_SHIFT	= 16,</div><div class='add'>+	OCRDMA_CREATE_AH_PAGE_SIZE_MASK		= 0x7 &lt;&lt;</div><div class='add'>+					OCRDMA_CREATE_AH_PAGE_SIZE_SHIFT,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CREATE_AH_ENTRY_SIZE_SHIFT	= 23,</div><div class='add'>+	OCRDMA_CREATE_AH_ENTRY_SIZE_MASK	= 0x1FF &lt;&lt;</div><div class='add'>+					OCRDMA_CREATE_AH_ENTRY_SIZE_SHIFT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define OCRDMA_AH_TBL_PAGES 8</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_ah_tbl {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+</div><div class='add'>+	u32 ah_conf;</div><div class='add'>+	struct ocrdma_pa tbl_addr[8];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_create_ah_tbl_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+	u32 ahid;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_delete_ah_tbl {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_hdr req;</div><div class='add'>+	u32 ahid;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_delete_ah_tbl_rsp {</div><div class='add'>+	struct ocrdma_mqe_hdr hdr;</div><div class='add'>+	struct ocrdma_mbx_rsp rsp;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_EQE_VALID_SHIFT		= 0,</div><div class='add'>+	OCRDMA_EQE_VALID_MASK		= Bit(0),</div><div class='add'>+	OCRDMA_EQE_FOR_CQE_MASK		= 0xFFFE,</div><div class='add'>+	OCRDMA_EQE_RESOURCE_ID_SHIFT	= 16,</div><div class='add'>+	OCRDMA_EQE_RESOURCE_ID_MASK	= 0xFFFF &lt;&lt;</div><div class='add'>+				OCRDMA_EQE_RESOURCE_ID_SHIFT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_eqe {</div><div class='add'>+	u32 id_valid;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum OCRDMA_CQE_STATUS {</div><div class='add'>+	OCRDMA_CQE_SUCCESS = 0,</div><div class='add'>+	OCRDMA_CQE_LOC_LEN_ERR,</div><div class='add'>+	OCRDMA_CQE_LOC_QP_OP_ERR,</div><div class='add'>+	OCRDMA_CQE_LOC_EEC_OP_ERR,</div><div class='add'>+	OCRDMA_CQE_LOC_PROT_ERR,</div><div class='add'>+	OCRDMA_CQE_WR_FLUSH_ERR,</div><div class='add'>+	OCRDMA_CQE_MW_BIND_ERR,</div><div class='add'>+	OCRDMA_CQE_BAD_RESP_ERR,</div><div class='add'>+	OCRDMA_CQE_LOC_ACCESS_ERR,</div><div class='add'>+	OCRDMA_CQE_REM_INV_REQ_ERR,</div><div class='add'>+	OCRDMA_CQE_REM_ACCESS_ERR,</div><div class='add'>+	OCRDMA_CQE_REM_OP_ERR,</div><div class='add'>+	OCRDMA_CQE_RETRY_EXC_ERR,</div><div class='add'>+	OCRDMA_CQE_RNR_RETRY_EXC_ERR,</div><div class='add'>+	OCRDMA_CQE_LOC_RDD_VIOL_ERR,</div><div class='add'>+	OCRDMA_CQE_REM_INV_RD_REQ_ERR,</div><div class='add'>+	OCRDMA_CQE_REM_ABORT_ERR,</div><div class='add'>+	OCRDMA_CQE_INV_EECN_ERR,</div><div class='add'>+	OCRDMA_CQE_INV_EEC_STATE_ERR,</div><div class='add'>+	OCRDMA_CQE_FATAL_ERR,</div><div class='add'>+	OCRDMA_CQE_RESP_TIMEOUT_ERR,</div><div class='add'>+	OCRDMA_CQE_GENERAL_ERR</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	/* w0 */</div><div class='add'>+	OCRDMA_CQE_WQEIDX_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CQE_WQEIDX_MASK		= 0xFFFF,</div><div class='add'>+</div><div class='add'>+	/* w1 */</div><div class='add'>+	OCRDMA_CQE_UD_XFER_LEN_SHIFT	= 16,</div><div class='add'>+	OCRDMA_CQE_PKEY_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CQE_PKEY_MASK		= 0xFFFF,</div><div class='add'>+</div><div class='add'>+	/* w2 */</div><div class='add'>+	OCRDMA_CQE_QPN_SHIFT		= 0,</div><div class='add'>+	OCRDMA_CQE_QPN_MASK		= 0x0000FFFF,</div><div class='add'>+</div><div class='add'>+	OCRDMA_CQE_BUFTAG_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CQE_BUFTAG_MASK		= 0xFFFF &lt;&lt; OCRDMA_CQE_BUFTAG_SHIFT,</div><div class='add'>+</div><div class='add'>+	/* w3 */</div><div class='add'>+	OCRDMA_CQE_UD_STATUS_SHIFT	= 24,</div><div class='add'>+	OCRDMA_CQE_UD_STATUS_MASK	= 0x7 &lt;&lt; OCRDMA_CQE_UD_STATUS_SHIFT,</div><div class='add'>+	OCRDMA_CQE_STATUS_SHIFT		= 16,</div><div class='add'>+	OCRDMA_CQE_STATUS_MASK		= 0xFF &lt;&lt; OCRDMA_CQE_STATUS_SHIFT,</div><div class='add'>+	OCRDMA_CQE_VALID		= Bit(31),</div><div class='add'>+	OCRDMA_CQE_INVALIDATE		= Bit(30),</div><div class='add'>+	OCRDMA_CQE_QTYPE		= Bit(29),</div><div class='add'>+	OCRDMA_CQE_IMM			= Bit(28),</div><div class='add'>+	OCRDMA_CQE_WRITE_IMM		= Bit(27),</div><div class='add'>+	OCRDMA_CQE_QTYPE_SQ		= 0,</div><div class='add'>+	OCRDMA_CQE_QTYPE_RQ		= 1,</div><div class='add'>+	OCRDMA_CQE_SRCQP_MASK		= 0xFFFFFF</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ocrdma_cqe {</div><div class='add'>+	union {</div><div class='add'>+		/* w0 to w2 */</div><div class='add'>+		struct {</div><div class='add'>+			u32 wqeidx;</div><div class='add'>+			u32 bytes_xfered;</div><div class='add'>+			u32 qpn;</div><div class='add'>+		} wq;</div><div class='add'>+		struct {</div><div class='add'>+			u32 lkey_immdt;</div><div class='add'>+			u32 rxlen;</div><div class='add'>+			u32 buftag_qpn;</div><div class='add'>+		} rq;</div><div class='add'>+		struct {</div><div class='add'>+			u32 lkey_immdt;</div><div class='add'>+			u32 rxlen_pkey;</div><div class='add'>+			u32 buftag_qpn;</div><div class='add'>+		} ud;</div><div class='add'>+		struct {</div><div class='add'>+			u32 word_0;</div><div class='add'>+			u32 word_1;</div><div class='add'>+			u32 qpn;</div><div class='add'>+		} cmn;</div><div class='add'>+	};</div><div class='add'>+	u32 flags_status_srcqpn;	/* w3 */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define is_cqe_valid(cq, cqe) \</div><div class='add'>+	(((le32_to_cpu(cqe-&gt;flags_status_srcqpn) &amp; OCRDMA_CQE_VALID)\</div><div class='add'>+	== cq-&gt;phase) ? 1 : 0)</div><div class='add'>+#define is_cqe_for_sq(cqe) \</div><div class='add'>+	((le32_to_cpu(cqe-&gt;flags_status_srcqpn) &amp; OCRDMA_CQE_QTYPE) ? 0 : 1)</div><div class='add'>+#define is_cqe_for_rq(cqe) \</div><div class='add'>+	((le32_to_cpu(cqe-&gt;flags_status_srcqpn) &amp; OCRDMA_CQE_QTYPE) ? 1 : 0)</div><div class='add'>+#define is_cqe_invalidated(cqe) \</div><div class='add'>+	((le32_to_cpu(cqe-&gt;flags_status_srcqpn) &amp; OCRDMA_CQE_INVALIDATE) ? \</div><div class='add'>+	1 : 0)</div><div class='add'>+#define is_cqe_imm(cqe) \</div><div class='add'>+	((le32_to_cpu(cqe-&gt;flags_status_srcqpn) &amp; OCRDMA_CQE_IMM) ? 1 : 0)</div><div class='add'>+#define is_cqe_wr_imm(cqe) \</div><div class='add'>+	((le32_to_cpu(cqe-&gt;flags_status_srcqpn) &amp; OCRDMA_CQE_WRITE_IMM) ? 1 : 0)</div><div class='add'>+</div><div class='add'>+struct ocrdma_sge {</div><div class='add'>+	u32 addr_hi;</div><div class='add'>+	u32 addr_lo;</div><div class='add'>+	u32 lrkey;</div><div class='add'>+	u32 len;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_FLAG_SIG		= 0x1,</div><div class='add'>+	OCRDMA_FLAG_INV		= 0x2,</div><div class='add'>+	OCRDMA_FLAG_FENCE_L	= 0x4,</div><div class='add'>+	OCRDMA_FLAG_FENCE_R	= 0x8,</div><div class='add'>+	OCRDMA_FLAG_SOLICIT	= 0x10,</div><div class='add'>+	OCRDMA_FLAG_IMM		= 0x20,</div><div class='add'>+</div><div class='add'>+	/* Stag flags */</div><div class='add'>+	OCRDMA_LKEY_FLAG_LOCAL_WR	= 0x1,</div><div class='add'>+	OCRDMA_LKEY_FLAG_REMOTE_RD	= 0x2,</div><div class='add'>+	OCRDMA_LKEY_FLAG_REMOTE_WR	= 0x4,</div><div class='add'>+	OCRDMA_LKEY_FLAG_VATO		= 0x8,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum OCRDMA_WQE_OPCODE {</div><div class='add'>+	OCRDMA_WRITE		= 0x06,</div><div class='add'>+	OCRDMA_READ		= 0x0C,</div><div class='add'>+	OCRDMA_RESV0		= 0x02,</div><div class='add'>+	OCRDMA_SEND		= 0x00,</div><div class='add'>+	OCRDMA_CMP_SWP		= 0x14,</div><div class='add'>+	OCRDMA_BIND_MW		= 0x10,</div><div class='add'>+	OCRDMA_RESV1		= 0x0A,</div><div class='add'>+	OCRDMA_LKEY_INV		= 0x15,</div><div class='add'>+	OCRDMA_FETCH_ADD	= 0x13,</div><div class='add'>+	OCRDMA_POST_RQ		= 0x12</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_TYPE_INLINE	= 0x0,</div><div class='add'>+	OCRDMA_TYPE_LKEY	= 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OCRDMA_WQE_OPCODE_SHIFT		= 0,</div><div class='add'>+	OCRDMA_WQE_OPCODE_MASK		= 0x0000001F,</div><div class='add'>+	OCRDMA_WQE_FLAGS_SHIFT		= 5,</div><div class='add'>+	OCRDMA_WQE_TYPE_SHIFT		= 16,</div><div class='add'>+	OCRDMA_WQE_TYPE_MASK		= 0x00030000,</div><div class='add'>+	OCRDMA_WQE_SIZE_SHIFT		= 18,</div><div class='add'>+	OCRDMA_WQE_SIZE_MASK		= 0xFF,</div><div class='add'>+	OCRDMA_WQE_NXT_WQE_SIZE_SHIFT	= 25,</div><div class='add'>+</div><div class='add'>+	OCRDMA_WQE_LKEY_FLAGS_SHIFT	= 0,</div><div class='add'>+	OCRDMA_WQE_LKEY_FLAGS_MASK	= 0xF</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* header WQE for all the SQ and RQ operations */</div><div class='add'>+struct ocrdma_hdr_wqe {</div><div class='add'>+	u32 cw;</div><div class='add'>+	union {</div><div class='add'>+		u32 rsvd_tag;</div><div class='add'>+		u32 rsvd_lkey_flags;</div><div class='add'>+	};</div><div class='add'>+	union {</div><div class='add'>+		u32 immdt;</div><div class='add'>+		u32 lkey;</div><div class='add'>+	};</div><div class='add'>+	u32 total_len;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_ewqe_ud_hdr {</div><div class='add'>+	u32 rsvd_dest_qpn;</div><div class='add'>+	u32 qkey;</div><div class='add'>+	u32 rsvd_ahid;</div><div class='add'>+	u32 rsvd;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_eth_basic {</div><div class='add'>+	u8 dmac[6];</div><div class='add'>+	u8 smac[6];</div><div class='add'>+	__be16 eth_type;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_eth_vlan {</div><div class='add'>+	u8 dmac[6];</div><div class='add'>+	u8 smac[6];</div><div class='add'>+	__be16 eth_type;</div><div class='add'>+	__be16 vlan_tag;</div><div class='add'>+#define OCRDMA_ROCE_ETH_TYPE 0x8915</div><div class='add'>+	__be16 roce_eth_type;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ocrdma_grh {</div><div class='add'>+	__be32	tclass_flow;</div><div class='add'>+	__be32	pdid_hoplimit;</div><div class='add'>+	u8	sgid[16];</div><div class='add'>+	u8	dgid[16];</div><div class='add'>+	u16	rsvd;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define OCRDMA_AV_VALID		Bit(0)</div><div class='add'>+#define OCRDMA_AV_VLAN_VALID	Bit(1)</div><div class='add'>+</div><div class='add'>+struct ocrdma_av {</div><div class='add'>+	struct ocrdma_eth_vlan eth_hdr;</div><div class='add'>+	struct ocrdma_grh grh;</div><div class='add'>+	u32 valid;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#endif				/* __OCRDMA_SLI_H__ */</div><div class='head'>diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c b/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c<br/>new file mode 100644<br/>index 000000000000..d16d172b6b6b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_verbs.c</a></div><div class='hunk'>@@ -0,0 +1,2532 @@</div><div class='add'>+/*******************************************************************</div><div class='add'>+ * This file is part of the Emulex RoCE Device Driver for          *</div><div class='add'>+ * RoCE (RDMA over Converged Ethernet) adapters.                   *</div><div class='add'>+ * Copyright (C) 2008-2012 Emulex. All rights reserved.            *</div><div class='add'>+ * EMULEX and SLI are trademarks of Emulex.                        *</div><div class='add'>+ * www.emulex.com                                                  *</div><div class='add'>+ *                                                                 *</div><div class='add'>+ * This program is free software; you can redistribute it and/or   *</div><div class='add'>+ * modify it under the terms of version 2 of the GNU General       *</div><div class='add'>+ * Public License as published by the Free Software Foundation.    *</div><div class='add'>+ * This program is distributed in the hope that it will be useful. *</div><div class='add'>+ * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *</div><div class='add'>+ * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *</div><div class='add'>+ * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *</div><div class='add'>+ * TO BE LEGALLY INVALID.  See the GNU General Public License for  *</div><div class='add'>+ * more details, a copy of which can be found in the file COPYING  *</div><div class='add'>+ * included with this package.                                     *</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ * linux-drivers@emulex.com</div><div class='add'>+ *</div><div class='add'>+ * Emulex</div><div class='add'>+ * 3333 Susan Street</div><div class='add'>+ * Costa Mesa, CA 92626</div><div class='add'>+ *******************************************************************/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;rdma/ib_verbs.h&gt;</div><div class='add'>+#include &lt;rdma/ib_user_verbs.h&gt;</div><div class='add'>+#include &lt;rdma/iw_cm.h&gt;</div><div class='add'>+#include &lt;rdma/ib_umem.h&gt;</div><div class='add'>+#include &lt;rdma/ib_addr.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ocrdma.h"</div><div class='add'>+#include "ocrdma_hw.h"</div><div class='add'>+#include "ocrdma_verbs.h"</div><div class='add'>+#include "ocrdma_abi.h"</div><div class='add'>+</div><div class='add'>+int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)</div><div class='add'>+{</div><div class='add'>+	if (index &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*pkey = 0xffff;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_query_gid(struct ib_device *ibdev, u8 port,</div><div class='add'>+		     int index, union ib_gid *sgid)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+</div><div class='add'>+	dev = get_ocrdma_dev(ibdev);</div><div class='add'>+	memset(sgid, 0, sizeof(*sgid));</div><div class='add'>+	if (index &gt; OCRDMA_MAX_SGID)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	memcpy(sgid, &amp;dev-&gt;sgid_tbl[index], sizeof(*sgid));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);</div><div class='add'>+</div><div class='add'>+	memset(attr, 0, sizeof *attr);</div><div class='add'>+	memcpy(&amp;attr-&gt;fw_ver, &amp;dev-&gt;attr.fw_ver[0],</div><div class='add'>+	       min(sizeof(dev-&gt;attr.fw_ver), sizeof(attr-&gt;fw_ver)));</div><div class='add'>+	ocrdma_get_guid(dev, (u8 *)&amp;attr-&gt;sys_image_guid);</div><div class='add'>+	attr-&gt;max_mr_size = ~0ull;</div><div class='add'>+	attr-&gt;page_size_cap = 0xffff000;</div><div class='add'>+	attr-&gt;vendor_id = dev-&gt;nic_info.pdev-&gt;vendor;</div><div class='add'>+	attr-&gt;vendor_part_id = dev-&gt;nic_info.pdev-&gt;device;</div><div class='add'>+	attr-&gt;hw_ver = 0;</div><div class='add'>+	attr-&gt;max_qp = dev-&gt;attr.max_qp;</div><div class='add'>+	attr-&gt;max_ah = dev-&gt;attr.max_qp;</div><div class='add'>+	attr-&gt;max_qp_wr = dev-&gt;attr.max_wqe;</div><div class='add'>+</div><div class='add'>+	attr-&gt;device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |</div><div class='add'>+					IB_DEVICE_RC_RNR_NAK_GEN |</div><div class='add'>+					IB_DEVICE_SHUTDOWN_PORT |</div><div class='add'>+					IB_DEVICE_SYS_IMAGE_GUID |</div><div class='add'>+					IB_DEVICE_LOCAL_DMA_LKEY;</div><div class='add'>+	attr-&gt;max_sge = dev-&gt;attr.max_send_sge;</div><div class='add'>+	attr-&gt;max_sge_rd = dev-&gt;attr.max_send_sge;</div><div class='add'>+	attr-&gt;max_cq = dev-&gt;attr.max_cq;</div><div class='add'>+	attr-&gt;max_cqe = dev-&gt;attr.max_cqe;</div><div class='add'>+	attr-&gt;max_mr = dev-&gt;attr.max_mr;</div><div class='add'>+	attr-&gt;max_mw = 0;</div><div class='add'>+	attr-&gt;max_pd = dev-&gt;attr.max_pd;</div><div class='add'>+	attr-&gt;atomic_cap = 0;</div><div class='add'>+	attr-&gt;max_fmr = 0;</div><div class='add'>+	attr-&gt;max_map_per_fmr = 0;</div><div class='add'>+	attr-&gt;max_qp_rd_atom =</div><div class='add'>+	    min(dev-&gt;attr.max_ord_per_qp, dev-&gt;attr.max_ird_per_qp);</div><div class='add'>+	attr-&gt;max_qp_init_rd_atom = dev-&gt;attr.max_ord_per_qp;</div><div class='add'>+	attr-&gt;max_srq = (dev-&gt;attr.max_qp - 1);</div><div class='add'>+	attr-&gt;max_srq_sge = attr-&gt;max_sge;</div><div class='add'>+	attr-&gt;max_srq_wr = dev-&gt;attr.max_rqe;</div><div class='add'>+	attr-&gt;local_ca_ack_delay = dev-&gt;attr.local_ca_ack_delay;</div><div class='add'>+	attr-&gt;max_fast_reg_page_list_len = 0;</div><div class='add'>+	attr-&gt;max_pkeys = 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_query_port(struct ib_device *ibdev,</div><div class='add'>+		      u8 port, struct ib_port_attr *props)</div><div class='add'>+{</div><div class='add'>+	enum ib_port_state port_state;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+</div><div class='add'>+	dev = get_ocrdma_dev(ibdev);</div><div class='add'>+	if (port &gt; 1) {</div><div class='add'>+		ocrdma_err("%s(%d) invalid_port=0x%x\n", __func__,</div><div class='add'>+			   dev-&gt;id, port);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	netdev = dev-&gt;nic_info.netdev;</div><div class='add'>+	if (netif_running(netdev) &amp;&amp; netif_oper_up(netdev)) {</div><div class='add'>+		port_state = IB_PORT_ACTIVE;</div><div class='add'>+		props-&gt;phys_state = 5;</div><div class='add'>+	} else {</div><div class='add'>+		port_state = IB_PORT_DOWN;</div><div class='add'>+		props-&gt;phys_state = 3;</div><div class='add'>+	}</div><div class='add'>+	props-&gt;max_mtu = IB_MTU_4096;</div><div class='add'>+	props-&gt;active_mtu = iboe_get_mtu(netdev-&gt;mtu);</div><div class='add'>+	props-&gt;lid = 0;</div><div class='add'>+	props-&gt;lmc = 0;</div><div class='add'>+	props-&gt;sm_lid = 0;</div><div class='add'>+	props-&gt;sm_sl = 0;</div><div class='add'>+	props-&gt;state = port_state;</div><div class='add'>+	props-&gt;port_cap_flags =</div><div class='add'>+	    IB_PORT_CM_SUP |</div><div class='add'>+	    IB_PORT_REINIT_SUP |</div><div class='add'>+	    IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP;</div><div class='add'>+	props-&gt;gid_tbl_len = OCRDMA_MAX_SGID;</div><div class='add'>+	props-&gt;pkey_tbl_len = 1;</div><div class='add'>+	props-&gt;bad_pkey_cntr = 0;</div><div class='add'>+	props-&gt;qkey_viol_cntr = 0;</div><div class='add'>+	props-&gt;active_width = IB_WIDTH_1X;</div><div class='add'>+	props-&gt;active_speed = 4;</div><div class='add'>+	props-&gt;max_msg_sz = 0x80000000;</div><div class='add'>+	props-&gt;max_vl_num = 4;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask,</div><div class='add'>+		       struct ib_port_modify *props)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+</div><div class='add'>+	dev = get_ocrdma_dev(ibdev);</div><div class='add'>+	if (port &gt; 1) {</div><div class='add'>+		ocrdma_err("%s(%d) invalid_port=0x%x\n", __func__,</div><div class='add'>+			   dev-&gt;id, port);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,</div><div class='add'>+			   unsigned long len)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_mm *mm;</div><div class='add'>+</div><div class='add'>+	mm = kzalloc(sizeof(*mm), GFP_KERNEL);</div><div class='add'>+	if (mm == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	mm-&gt;key.phy_addr = phy_addr;</div><div class='add'>+	mm-&gt;key.len = len;</div><div class='add'>+	INIT_LIST_HEAD(&amp;mm-&gt;entry);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;uctx-&gt;mm_list_lock);</div><div class='add'>+	list_add_tail(&amp;mm-&gt;entry, &amp;uctx-&gt;mm_head);</div><div class='add'>+	mutex_unlock(&amp;uctx-&gt;mm_list_lock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,</div><div class='add'>+			    unsigned long len)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_mm *mm, *tmp;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;uctx-&gt;mm_list_lock);</div><div class='add'>+	list_for_each_entry_safe(mm, tmp, &amp;uctx-&gt;mm_head, entry) {</div><div class='add'>+		if (len != mm-&gt;key.len || phy_addr != mm-&gt;key.phy_addr)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		list_del(&amp;mm-&gt;entry);</div><div class='add'>+		kfree(mm);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;uctx-&gt;mm_list_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,</div><div class='add'>+			      unsigned long len)</div><div class='add'>+{</div><div class='add'>+	bool found = false;</div><div class='add'>+	struct ocrdma_mm *mm;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;uctx-&gt;mm_list_lock);</div><div class='add'>+	list_for_each_entry(mm, &amp;uctx-&gt;mm_head, entry) {</div><div class='add'>+		if (len != mm-&gt;key.len || phy_addr != mm-&gt;key.phy_addr)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		found = true;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;uctx-&gt;mm_list_lock);</div><div class='add'>+	return found;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev,</div><div class='add'>+					  struct ib_udata *udata)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_ucontext *ctx;</div><div class='add'>+	struct ocrdma_alloc_ucontext_resp resp;</div><div class='add'>+	struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+	u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	if (!udata)</div><div class='add'>+		return ERR_PTR(-EFAULT);</div><div class='add'>+	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	ctx-&gt;dev = dev;</div><div class='add'>+	INIT_LIST_HEAD(&amp;ctx-&gt;mm_head);</div><div class='add'>+	mutex_init(&amp;ctx-&gt;mm_list_lock);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;ah_tbl.va = dma_alloc_coherent(&amp;pdev-&gt;dev, map_len,</div><div class='add'>+					    &amp;ctx-&gt;ah_tbl.pa, GFP_KERNEL);</div><div class='add'>+	if (!ctx-&gt;ah_tbl.va) {</div><div class='add'>+		kfree(ctx);</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+	memset(ctx-&gt;ah_tbl.va, 0, map_len);</div><div class='add'>+	ctx-&gt;ah_tbl.len = map_len;</div><div class='add'>+</div><div class='add'>+	resp.ah_tbl_len = ctx-&gt;ah_tbl.len;</div><div class='add'>+	resp.ah_tbl_page = ctx-&gt;ah_tbl.pa;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);</div><div class='add'>+	if (status)</div><div class='add'>+		goto map_err;</div><div class='add'>+	resp.dev_id = dev-&gt;id;</div><div class='add'>+	resp.max_inline_data = dev-&gt;attr.max_inline_data;</div><div class='add'>+	resp.wqe_size = dev-&gt;attr.wqe_size;</div><div class='add'>+	resp.rqe_size = dev-&gt;attr.rqe_size;</div><div class='add'>+	resp.dpp_wqe_size = dev-&gt;attr.wqe_size;</div><div class='add'>+	resp.rsvd = 0;</div><div class='add'>+</div><div class='add'>+	memcpy(resp.fw_ver, dev-&gt;attr.fw_ver, sizeof(resp.fw_ver));</div><div class='add'>+	status = ib_copy_to_udata(udata, &amp;resp, sizeof(resp));</div><div class='add'>+	if (status)</div><div class='add'>+		goto cpy_err;</div><div class='add'>+	return &amp;ctx-&gt;ibucontext;</div><div class='add'>+</div><div class='add'>+cpy_err:</div><div class='add'>+	ocrdma_del_mmap(ctx, ctx-&gt;ah_tbl.pa, ctx-&gt;ah_tbl.len);</div><div class='add'>+map_err:</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, ctx-&gt;ah_tbl.len, ctx-&gt;ah_tbl.va,</div><div class='add'>+			  ctx-&gt;ah_tbl.pa);</div><div class='add'>+	kfree(ctx);</div><div class='add'>+	return ERR_PTR(status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_mm *mm, *tmp;</div><div class='add'>+	struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);</div><div class='add'>+	struct pci_dev *pdev = uctx-&gt;dev-&gt;nic_info.pdev;</div><div class='add'>+</div><div class='add'>+	ocrdma_del_mmap(uctx, uctx-&gt;ah_tbl.pa, uctx-&gt;ah_tbl.len);</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, uctx-&gt;ah_tbl.len, uctx-&gt;ah_tbl.va,</div><div class='add'>+			  uctx-&gt;ah_tbl.pa);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(mm, tmp, &amp;uctx-&gt;mm_head, entry) {</div><div class='add'>+		list_del(&amp;mm-&gt;entry);</div><div class='add'>+		kfree(mm);</div><div class='add'>+	}</div><div class='add'>+	kfree(uctx);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);</div><div class='add'>+	struct ocrdma_dev *dev = ucontext-&gt;dev;</div><div class='add'>+	unsigned long vm_page = vma-&gt;vm_pgoff &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	u64 unmapped_db = (u64) dev-&gt;nic_info.unmapped_db;</div><div class='add'>+	unsigned long len = (vma-&gt;vm_end - vma-&gt;vm_start);</div><div class='add'>+	int status = 0;</div><div class='add'>+	bool found;</div><div class='add'>+</div><div class='add'>+	if (vma-&gt;vm_start &amp; (PAGE_SIZE - 1))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	found = ocrdma_search_mmap(ucontext, vma-&gt;vm_pgoff &lt;&lt; PAGE_SHIFT, len);</div><div class='add'>+	if (!found)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if ((vm_page &gt;= unmapped_db) &amp;&amp; (vm_page &lt;= (unmapped_db +</div><div class='add'>+		dev-&gt;nic_info.db_total_size)) &amp;&amp;</div><div class='add'>+		(len &lt;=	dev-&gt;nic_info.db_page_size)) {</div><div class='add'>+		/* doorbell mapping */</div><div class='add'>+		status = io_remap_pfn_range(vma, vma-&gt;vm_start, vma-&gt;vm_pgoff,</div><div class='add'>+					    len, vma-&gt;vm_page_prot);</div><div class='add'>+	} else if (dev-&gt;nic_info.dpp_unmapped_len &amp;&amp;</div><div class='add'>+		(vm_page &gt;= (u64) dev-&gt;nic_info.dpp_unmapped_addr) &amp;&amp;</div><div class='add'>+		(vm_page &lt;= (u64) (dev-&gt;nic_info.dpp_unmapped_addr +</div><div class='add'>+			dev-&gt;nic_info.dpp_unmapped_len)) &amp;&amp;</div><div class='add'>+		(len &lt;= dev-&gt;nic_info.dpp_unmapped_len)) {</div><div class='add'>+		/* dpp area mapping */</div><div class='add'>+		vma-&gt;vm_page_prot = pgprot_writecombine(vma-&gt;vm_page_prot);</div><div class='add'>+		status = io_remap_pfn_range(vma, vma-&gt;vm_start, vma-&gt;vm_pgoff,</div><div class='add'>+					    len, vma-&gt;vm_page_prot);</div><div class='add'>+	} else {</div><div class='add'>+		/* queue memory mapping */</div><div class='add'>+		status = remap_pfn_range(vma, vma-&gt;vm_start,</div><div class='add'>+					 vma-&gt;vm_pgoff, len, vma-&gt;vm_page_prot);</div><div class='add'>+	}</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_copy_pd_uresp(struct ocrdma_pd *pd,</div><div class='add'>+				struct ib_ucontext *ib_ctx,</div><div class='add'>+				struct ib_udata *udata)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	u64 db_page_addr;</div><div class='add'>+	u64 dpp_page_addr = 0;</div><div class='add'>+	u32 db_page_size;</div><div class='add'>+	struct ocrdma_alloc_pd_uresp rsp;</div><div class='add'>+	struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);</div><div class='add'>+</div><div class='add'>+	rsp.id = pd-&gt;id;</div><div class='add'>+	rsp.dpp_enabled = pd-&gt;dpp_enabled;</div><div class='add'>+	db_page_addr = pd-&gt;dev-&gt;nic_info.unmapped_db +</div><div class='add'>+			(pd-&gt;id * pd-&gt;dev-&gt;nic_info.db_page_size);</div><div class='add'>+	db_page_size = pd-&gt;dev-&gt;nic_info.db_page_size;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);</div><div class='add'>+	if (status)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='add'>+	if (pd-&gt;dpp_enabled) {</div><div class='add'>+		dpp_page_addr = pd-&gt;dev-&gt;nic_info.dpp_unmapped_addr +</div><div class='add'>+				(pd-&gt;id * OCRDMA_DPP_PAGE_SIZE);</div><div class='add'>+		status = ocrdma_add_mmap(uctx, dpp_page_addr,</div><div class='add'>+				 OCRDMA_DPP_PAGE_SIZE);</div><div class='add'>+		if (status)</div><div class='add'>+			goto dpp_map_err;</div><div class='add'>+		rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);</div><div class='add'>+		rsp.dpp_page_addr_lo = dpp_page_addr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = ib_copy_to_udata(udata, &amp;rsp, sizeof(rsp));</div><div class='add'>+	if (status)</div><div class='add'>+		goto ucopy_err;</div><div class='add'>+</div><div class='add'>+	pd-&gt;uctx = uctx;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ucopy_err:</div><div class='add'>+	if (pd-&gt;dpp_enabled)</div><div class='add'>+		ocrdma_del_mmap(pd-&gt;uctx, dpp_page_addr, OCRDMA_DPP_PAGE_SIZE);</div><div class='add'>+dpp_map_err:</div><div class='add'>+	ocrdma_del_mmap(pd-&gt;uctx, db_page_addr, db_page_size);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev,</div><div class='add'>+			      struct ib_ucontext *context,</div><div class='add'>+			      struct ib_udata *udata)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);</div><div class='add'>+	struct ocrdma_pd *pd;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	pd = kzalloc(sizeof(*pd), GFP_KERNEL);</div><div class='add'>+	if (!pd)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	pd-&gt;dev = dev;</div><div class='add'>+	if (udata &amp;&amp; context) {</div><div class='add'>+		pd-&gt;dpp_enabled = (dev-&gt;nic_info.dev_family ==</div><div class='add'>+					OCRDMA_GEN2_FAMILY) ? true : false;</div><div class='add'>+		pd-&gt;num_dpp_qp =</div><div class='add'>+			pd-&gt;dpp_enabled ? OCRDMA_PD_MAX_DPP_ENABLED_QP : 0;</div><div class='add'>+	}</div><div class='add'>+	status = ocrdma_mbx_alloc_pd(dev, pd);</div><div class='add'>+	if (status) {</div><div class='add'>+		kfree(pd);</div><div class='add'>+		return ERR_PTR(status);</div><div class='add'>+	}</div><div class='add'>+	atomic_set(&amp;pd-&gt;use_cnt, 0);</div><div class='add'>+</div><div class='add'>+	if (udata &amp;&amp; context) {</div><div class='add'>+		status = ocrdma_copy_pd_uresp(pd, context, udata);</div><div class='add'>+		if (status)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+	return &amp;pd-&gt;ibpd;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	ocrdma_dealloc_pd(&amp;pd-&gt;ibpd);</div><div class='add'>+	return ERR_PTR(status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_dealloc_pd(struct ib_pd *ibpd)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);</div><div class='add'>+	struct ocrdma_dev *dev = pd-&gt;dev;</div><div class='add'>+	int status;</div><div class='add'>+	u64 usr_db;</div><div class='add'>+</div><div class='add'>+	if (atomic_read(&amp;pd-&gt;use_cnt)) {</div><div class='add'>+		ocrdma_err("%s(%d) pd=0x%x is in use.\n",</div><div class='add'>+			   __func__, dev-&gt;id, pd-&gt;id);</div><div class='add'>+		status = -EFAULT;</div><div class='add'>+		goto dealloc_err;</div><div class='add'>+	}</div><div class='add'>+	status = ocrdma_mbx_dealloc_pd(dev, pd);</div><div class='add'>+	if (pd-&gt;uctx) {</div><div class='add'>+		u64 dpp_db = dev-&gt;nic_info.dpp_unmapped_addr +</div><div class='add'>+		    (pd-&gt;id * OCRDMA_DPP_PAGE_SIZE);</div><div class='add'>+		if (pd-&gt;dpp_enabled)</div><div class='add'>+			ocrdma_del_mmap(pd-&gt;uctx, dpp_db, OCRDMA_DPP_PAGE_SIZE);</div><div class='add'>+		usr_db = dev-&gt;nic_info.unmapped_db +</div><div class='add'>+		    (pd-&gt;id * dev-&gt;nic_info.db_page_size);</div><div class='add'>+		ocrdma_del_mmap(pd-&gt;uctx, usr_db, dev-&gt;nic_info.db_page_size);</div><div class='add'>+	}</div><div class='add'>+	kfree(pd);</div><div class='add'>+dealloc_err:</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ocrdma_mr *ocrdma_alloc_lkey(struct ib_pd *ibpd,</div><div class='add'>+					   int acc, u32 num_pbls,</div><div class='add'>+					   u32 addr_check)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_mr *mr;</div><div class='add'>+	struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);</div><div class='add'>+	struct ocrdma_dev *dev = pd-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (acc &amp; IB_ACCESS_REMOTE_WRITE &amp;&amp; !(acc &amp; IB_ACCESS_LOCAL_WRITE)) {</div><div class='add'>+		ocrdma_err("%s(%d) leaving err, invalid access rights\n",</div><div class='add'>+			   __func__, dev-&gt;id);</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mr = kzalloc(sizeof(*mr), GFP_KERNEL);</div><div class='add'>+	if (!mr)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	mr-&gt;hwmr.dev = dev;</div><div class='add'>+	mr-&gt;hwmr.fr_mr = 0;</div><div class='add'>+	mr-&gt;hwmr.local_rd = 1;</div><div class='add'>+	mr-&gt;hwmr.remote_rd = (acc &amp; IB_ACCESS_REMOTE_READ) ? 1 : 0;</div><div class='add'>+	mr-&gt;hwmr.remote_wr = (acc &amp; IB_ACCESS_REMOTE_WRITE) ? 1 : 0;</div><div class='add'>+	mr-&gt;hwmr.local_wr = (acc &amp; IB_ACCESS_LOCAL_WRITE) ? 1 : 0;</div><div class='add'>+	mr-&gt;hwmr.mw_bind = (acc &amp; IB_ACCESS_MW_BIND) ? 1 : 0;</div><div class='add'>+	mr-&gt;hwmr.remote_atomic = (acc &amp; IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;</div><div class='add'>+	mr-&gt;hwmr.num_pbls = num_pbls;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_mbx_alloc_lkey(dev, &amp;mr-&gt;hwmr, pd-&gt;id, addr_check);</div><div class='add'>+	if (status) {</div><div class='add'>+		kfree(mr);</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+	mr-&gt;pd = pd;</div><div class='add'>+	atomic_inc(&amp;pd-&gt;use_cnt);</div><div class='add'>+	mr-&gt;ibmr.lkey = mr-&gt;hwmr.lkey;</div><div class='add'>+	if (mr-&gt;hwmr.remote_wr || mr-&gt;hwmr.remote_rd)</div><div class='add'>+		mr-&gt;ibmr.rkey = mr-&gt;hwmr.lkey;</div><div class='add'>+	return mr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_mr *mr;</div><div class='add'>+</div><div class='add'>+	mr = ocrdma_alloc_lkey(ibpd, acc, 0, OCRDMA_ADDR_CHECK_DISABLE);</div><div class='add'>+	if (IS_ERR(mr))</div><div class='add'>+		return ERR_CAST(mr);</div><div class='add'>+</div><div class='add'>+	return &amp;mr-&gt;ibmr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,</div><div class='add'>+				   struct ocrdma_hw_mr *mr)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	if (mr-&gt;pbl_table) {</div><div class='add'>+		for (i = 0; i &lt; mr-&gt;num_pbls; i++) {</div><div class='add'>+			if (!mr-&gt;pbl_table[i].va)</div><div class='add'>+				continue;</div><div class='add'>+			dma_free_coherent(&amp;pdev-&gt;dev, mr-&gt;pbl_size,</div><div class='add'>+					  mr-&gt;pbl_table[i].va,</div><div class='add'>+					  mr-&gt;pbl_table[i].pa);</div><div class='add'>+		}</div><div class='add'>+		kfree(mr-&gt;pbl_table);</div><div class='add'>+		mr-&gt;pbl_table = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_get_pbl_info(struct ocrdma_mr *mr, u32 num_pbes)</div><div class='add'>+{</div><div class='add'>+	u32 num_pbls = 0;</div><div class='add'>+	u32 idx = 0;</div><div class='add'>+	int status = 0;</div><div class='add'>+	u32 pbl_size;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 &lt;&lt; idx);</div><div class='add'>+		if (pbl_size &gt; MAX_OCRDMA_PBL_SIZE) {</div><div class='add'>+			status = -EFAULT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));</div><div class='add'>+		num_pbls = num_pbls / (pbl_size / sizeof(u64));</div><div class='add'>+		idx++;</div><div class='add'>+	} while (num_pbls &gt;= mr-&gt;hwmr.dev-&gt;attr.max_num_mr_pbl);</div><div class='add'>+</div><div class='add'>+	mr-&gt;hwmr.num_pbes = num_pbes;</div><div class='add'>+	mr-&gt;hwmr.num_pbls = num_pbls;</div><div class='add'>+	mr-&gt;hwmr.pbl_size = pbl_size;</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	int i;</div><div class='add'>+	u32 dma_len = mr-&gt;pbl_size;</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;nic_info.pdev;</div><div class='add'>+	void *va;</div><div class='add'>+	dma_addr_t pa;</div><div class='add'>+</div><div class='add'>+	mr-&gt;pbl_table = kzalloc(sizeof(struct ocrdma_pbl) *</div><div class='add'>+				mr-&gt;num_pbls, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!mr-&gt;pbl_table)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; mr-&gt;num_pbls; i++) {</div><div class='add'>+		va = dma_alloc_coherent(&amp;pdev-&gt;dev, dma_len, &amp;pa, GFP_KERNEL);</div><div class='add'>+		if (!va) {</div><div class='add'>+			ocrdma_free_mr_pbl_tbl(dev, mr);</div><div class='add'>+			status = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		memset(va, 0, dma_len);</div><div class='add'>+		mr-&gt;pbl_table[i].va = va;</div><div class='add'>+		mr-&gt;pbl_table[i].pa = pa;</div><div class='add'>+	}</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,</div><div class='add'>+			    u32 num_pbes)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_pbe *pbe;</div><div class='add'>+	struct ib_umem_chunk *chunk;</div><div class='add'>+	struct ocrdma_pbl *pbl_tbl = mr-&gt;hwmr.pbl_table;</div><div class='add'>+	struct ib_umem *umem = mr-&gt;umem;</div><div class='add'>+	int i, shift, pg_cnt, pages, pbe_cnt, total_num_pbes = 0;</div><div class='add'>+</div><div class='add'>+	if (!mr-&gt;hwmr.num_pbes)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pbe = (struct ocrdma_pbe *)pbl_tbl-&gt;va;</div><div class='add'>+	pbe_cnt = 0;</div><div class='add'>+</div><div class='add'>+	shift = ilog2(umem-&gt;page_size);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(chunk, &amp;umem-&gt;chunk_list, list) {</div><div class='add'>+		/* get all the dma regions from the chunk. */</div><div class='add'>+		for (i = 0; i &lt; chunk-&gt;nmap; i++) {</div><div class='add'>+			pages = sg_dma_len(&amp;chunk-&gt;page_list[i]) &gt;&gt; shift;</div><div class='add'>+			for (pg_cnt = 0; pg_cnt &lt; pages; pg_cnt++) {</div><div class='add'>+				/* store the page address in pbe */</div><div class='add'>+				pbe-&gt;pa_lo =</div><div class='add'>+				    cpu_to_le32(sg_dma_address</div><div class='add'>+						(&amp;chunk-&gt;page_list[i]) +</div><div class='add'>+						(umem-&gt;page_size * pg_cnt));</div><div class='add'>+				pbe-&gt;pa_hi =</div><div class='add'>+				    cpu_to_le32(upper_32_bits</div><div class='add'>+						((sg_dma_address</div><div class='add'>+						  (&amp;chunk-&gt;page_list[i]) +</div><div class='add'>+						  umem-&gt;page_size * pg_cnt)));</div><div class='add'>+				pbe_cnt += 1;</div><div class='add'>+				total_num_pbes += 1;</div><div class='add'>+				pbe++;</div><div class='add'>+</div><div class='add'>+				/* if done building pbes, issue the mbx cmd. */</div><div class='add'>+				if (total_num_pbes == num_pbes)</div><div class='add'>+					return;</div><div class='add'>+</div><div class='add'>+				/* if the given pbl is full storing the pbes,</div><div class='add'>+				 * move to next pbl.</div><div class='add'>+				 */</div><div class='add'>+				if (pbe_cnt ==</div><div class='add'>+					(mr-&gt;hwmr.pbl_size / sizeof(u64))) {</div><div class='add'>+					pbl_tbl++;</div><div class='add'>+					pbe = (struct ocrdma_pbe *)pbl_tbl-&gt;va;</div><div class='add'>+					pbe_cnt = 0;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,</div><div class='add'>+				 u64 usr_addr, int acc, struct ib_udata *udata)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	struct ocrdma_mr *mr;</div><div class='add'>+	struct ocrdma_pd *pd;</div><div class='add'>+	u32 num_pbes;</div><div class='add'>+</div><div class='add'>+	pd = get_ocrdma_pd(ibpd);</div><div class='add'>+	dev = pd-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (acc &amp; IB_ACCESS_REMOTE_WRITE &amp;&amp; !(acc &amp; IB_ACCESS_LOCAL_WRITE))</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	mr = kzalloc(sizeof(*mr), GFP_KERNEL);</div><div class='add'>+	if (!mr)</div><div class='add'>+		return ERR_PTR(status);</div><div class='add'>+	mr-&gt;hwmr.dev = dev;</div><div class='add'>+	mr-&gt;umem = ib_umem_get(ibpd-&gt;uobject-&gt;context, start, len, acc, 0);</div><div class='add'>+	if (IS_ERR(mr-&gt;umem)) {</div><div class='add'>+		status = -EFAULT;</div><div class='add'>+		goto umem_err;</div><div class='add'>+	}</div><div class='add'>+	num_pbes = ib_umem_page_count(mr-&gt;umem);</div><div class='add'>+	status = ocrdma_get_pbl_info(mr, num_pbes);</div><div class='add'>+	if (status)</div><div class='add'>+		goto umem_err;</div><div class='add'>+</div><div class='add'>+	mr-&gt;hwmr.pbe_size = mr-&gt;umem-&gt;page_size;</div><div class='add'>+	mr-&gt;hwmr.fbo = mr-&gt;umem-&gt;offset;</div><div class='add'>+	mr-&gt;hwmr.va = usr_addr;</div><div class='add'>+	mr-&gt;hwmr.len = len;</div><div class='add'>+	mr-&gt;hwmr.remote_wr = (acc &amp; IB_ACCESS_REMOTE_WRITE) ? 1 : 0;</div><div class='add'>+	mr-&gt;hwmr.remote_rd = (acc &amp; IB_ACCESS_REMOTE_READ) ? 1 : 0;</div><div class='add'>+	mr-&gt;hwmr.local_wr = (acc &amp; IB_ACCESS_LOCAL_WRITE) ? 1 : 0;</div><div class='add'>+	mr-&gt;hwmr.local_rd = 1;</div><div class='add'>+	mr-&gt;hwmr.remote_atomic = (acc &amp; IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;</div><div class='add'>+	status = ocrdma_build_pbl_tbl(dev, &amp;mr-&gt;hwmr);</div><div class='add'>+	if (status)</div><div class='add'>+		goto umem_err;</div><div class='add'>+	build_user_pbes(dev, mr, num_pbes);</div><div class='add'>+	status = ocrdma_reg_mr(dev, &amp;mr-&gt;hwmr, pd-&gt;id, acc);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	mr-&gt;pd = pd;</div><div class='add'>+	atomic_inc(&amp;pd-&gt;use_cnt);</div><div class='add'>+	mr-&gt;ibmr.lkey = mr-&gt;hwmr.lkey;</div><div class='add'>+	if (mr-&gt;hwmr.remote_wr || mr-&gt;hwmr.remote_rd)</div><div class='add'>+		mr-&gt;ibmr.rkey = mr-&gt;hwmr.lkey;</div><div class='add'>+</div><div class='add'>+	return &amp;mr-&gt;ibmr;</div><div class='add'>+</div><div class='add'>+mbx_err:</div><div class='add'>+	ocrdma_free_mr_pbl_tbl(dev, &amp;mr-&gt;hwmr);</div><div class='add'>+umem_err:</div><div class='add'>+	kfree(mr);</div><div class='add'>+	return ERR_PTR(status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_dereg_mr(struct ib_mr *ib_mr)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);</div><div class='add'>+	struct ocrdma_dev *dev = mr-&gt;hwmr.dev;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_mbx_dealloc_lkey(dev, mr-&gt;hwmr.fr_mr, mr-&gt;hwmr.lkey);</div><div class='add'>+</div><div class='add'>+	if (mr-&gt;hwmr.fr_mr == 0)</div><div class='add'>+		ocrdma_free_mr_pbl_tbl(dev, &amp;mr-&gt;hwmr);</div><div class='add'>+</div><div class='add'>+	atomic_dec(&amp;mr-&gt;pd-&gt;use_cnt);</div><div class='add'>+	/* it could be user registered memory. */</div><div class='add'>+	if (mr-&gt;umem)</div><div class='add'>+		ib_umem_release(mr-&gt;umem);</div><div class='add'>+	kfree(mr);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_copy_cq_uresp(struct ocrdma_cq *cq, struct ib_udata *udata,</div><div class='add'>+				struct ib_ucontext *ib_ctx)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_ucontext *uctx;</div><div class='add'>+	struct ocrdma_create_cq_uresp uresp;</div><div class='add'>+</div><div class='add'>+	uresp.cq_id = cq-&gt;id;</div><div class='add'>+	uresp.page_size = cq-&gt;len;</div><div class='add'>+	uresp.num_pages = 1;</div><div class='add'>+	uresp.max_hw_cqe = cq-&gt;max_hw_cqe;</div><div class='add'>+	uresp.page_addr[0] = cq-&gt;pa;</div><div class='add'>+	uresp.db_page_addr = cq-&gt;dev-&gt;nic_info.unmapped_db;</div><div class='add'>+	uresp.db_page_size = cq-&gt;dev-&gt;nic_info.db_page_size;</div><div class='add'>+	uresp.phase_change = cq-&gt;phase_change ? 1 : 0;</div><div class='add'>+	status = ib_copy_to_udata(udata, &amp;uresp, sizeof(uresp));</div><div class='add'>+	if (status) {</div><div class='add'>+		ocrdma_err("%s(%d) copy error cqid=0x%x.\n",</div><div class='add'>+			   __func__, cq-&gt;dev-&gt;id, cq-&gt;id);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	uctx = get_ocrdma_ucontext(ib_ctx);</div><div class='add'>+	status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);</div><div class='add'>+	if (status)</div><div class='add'>+		goto err;</div><div class='add'>+	status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);</div><div class='add'>+	if (status) {</div><div class='add'>+		ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	cq-&gt;ucontext = uctx;</div><div class='add'>+err:</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev, int entries, int vector,</div><div class='add'>+			       struct ib_ucontext *ib_ctx,</div><div class='add'>+			       struct ib_udata *udata)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_cq *cq;</div><div class='add'>+	struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_create_cq_ureq ureq;</div><div class='add'>+</div><div class='add'>+	if (udata) {</div><div class='add'>+		if (ib_copy_from_udata(&amp;ureq, udata, sizeof(ureq)))</div><div class='add'>+			return ERR_PTR(-EFAULT);</div><div class='add'>+	} else</div><div class='add'>+		ureq.dpp_cq = 0;</div><div class='add'>+	cq = kzalloc(sizeof(*cq), GFP_KERNEL);</div><div class='add'>+	if (!cq)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;cq-&gt;cq_lock);</div><div class='add'>+	spin_lock_init(&amp;cq-&gt;comp_handler_lock);</div><div class='add'>+	atomic_set(&amp;cq-&gt;use_cnt, 0);</div><div class='add'>+	INIT_LIST_HEAD(&amp;cq-&gt;sq_head);</div><div class='add'>+	INIT_LIST_HEAD(&amp;cq-&gt;rq_head);</div><div class='add'>+	cq-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq);</div><div class='add'>+	if (status) {</div><div class='add'>+		kfree(cq);</div><div class='add'>+		return ERR_PTR(status);</div><div class='add'>+	}</div><div class='add'>+	if (ib_ctx) {</div><div class='add'>+		status = ocrdma_copy_cq_uresp(cq, udata, ib_ctx);</div><div class='add'>+		if (status)</div><div class='add'>+			goto ctx_err;</div><div class='add'>+	}</div><div class='add'>+	cq-&gt;phase = OCRDMA_CQE_VALID;</div><div class='add'>+	cq-&gt;arm_needed = true;</div><div class='add'>+	dev-&gt;cq_tbl[cq-&gt;id] = cq;</div><div class='add'>+</div><div class='add'>+	return &amp;cq-&gt;ibcq;</div><div class='add'>+</div><div class='add'>+ctx_err:</div><div class='add'>+	ocrdma_mbx_destroy_cq(dev, cq);</div><div class='add'>+	kfree(cq);</div><div class='add'>+	return ERR_PTR(status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,</div><div class='add'>+		     struct ib_udata *udata)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);</div><div class='add'>+</div><div class='add'>+	if (new_cnt &lt; 1 || new_cnt &gt; cq-&gt;max_hw_cqe) {</div><div class='add'>+		status = -EINVAL;</div><div class='add'>+		return status;</div><div class='add'>+	}</div><div class='add'>+	ibcq-&gt;cqe = new_cnt;</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_destroy_cq(struct ib_cq *ibcq)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);</div><div class='add'>+	struct ocrdma_dev *dev = cq-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (atomic_read(&amp;cq-&gt;use_cnt))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_mbx_destroy_cq(dev, cq);</div><div class='add'>+</div><div class='add'>+	if (cq-&gt;ucontext) {</div><div class='add'>+		ocrdma_del_mmap(cq-&gt;ucontext, (u64) cq-&gt;pa, cq-&gt;len);</div><div class='add'>+		ocrdma_del_mmap(cq-&gt;ucontext, dev-&gt;nic_info.unmapped_db,</div><div class='add'>+				dev-&gt;nic_info.db_page_size);</div><div class='add'>+	}</div><div class='add'>+	dev-&gt;cq_tbl[cq-&gt;id] = NULL;</div><div class='add'>+</div><div class='add'>+	kfree(cq);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	int status = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (qp-&gt;id &lt; OCRDMA_MAX_QP &amp;&amp; dev-&gt;qp_tbl[qp-&gt;id] == NULL) {</div><div class='add'>+		dev-&gt;qp_tbl[qp-&gt;id] = qp;</div><div class='add'>+		status = 0;</div><div class='add'>+	}</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;qp_tbl[qp-&gt;id] = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,</div><div class='add'>+				  struct ib_qp_init_attr *attrs)</div><div class='add'>+{</div><div class='add'>+	if (attrs-&gt;qp_type != IB_QPT_GSI &amp;&amp;</div><div class='add'>+	    attrs-&gt;qp_type != IB_QPT_RC &amp;&amp;</div><div class='add'>+	    attrs-&gt;qp_type != IB_QPT_UD) {</div><div class='add'>+		ocrdma_err("%s(%d) unsupported qp type=0x%x requested\n",</div><div class='add'>+			   __func__, dev-&gt;id, attrs-&gt;qp_type);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (attrs-&gt;cap.max_send_wr &gt; dev-&gt;attr.max_wqe) {</div><div class='add'>+		ocrdma_err("%s(%d) unsupported send_wr=0x%x requested\n",</div><div class='add'>+			   __func__, dev-&gt;id, attrs-&gt;cap.max_send_wr);</div><div class='add'>+		ocrdma_err("%s(%d) supported send_wr=0x%x\n",</div><div class='add'>+			   __func__, dev-&gt;id, dev-&gt;attr.max_wqe);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (!attrs-&gt;srq &amp;&amp; (attrs-&gt;cap.max_recv_wr &gt; dev-&gt;attr.max_rqe)) {</div><div class='add'>+		ocrdma_err("%s(%d) unsupported recv_wr=0x%x requested\n",</div><div class='add'>+			   __func__, dev-&gt;id, attrs-&gt;cap.max_recv_wr);</div><div class='add'>+		ocrdma_err("%s(%d) supported recv_wr=0x%x\n",</div><div class='add'>+			   __func__, dev-&gt;id, dev-&gt;attr.max_rqe);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (attrs-&gt;cap.max_inline_data &gt; dev-&gt;attr.max_inline_data) {</div><div class='add'>+		ocrdma_err("%s(%d) unsupported inline data size=0x%x"</div><div class='add'>+			   " requested\n", __func__, dev-&gt;id,</div><div class='add'>+			   attrs-&gt;cap.max_inline_data);</div><div class='add'>+		ocrdma_err("%s(%d) supported inline data size=0x%x\n",</div><div class='add'>+			   __func__, dev-&gt;id, dev-&gt;attr.max_inline_data);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (attrs-&gt;cap.max_send_sge &gt; dev-&gt;attr.max_send_sge) {</div><div class='add'>+		ocrdma_err("%s(%d) unsupported send_sge=0x%x requested\n",</div><div class='add'>+			   __func__, dev-&gt;id, attrs-&gt;cap.max_send_sge);</div><div class='add'>+		ocrdma_err("%s(%d) supported send_sge=0x%x\n",</div><div class='add'>+			   __func__, dev-&gt;id, dev-&gt;attr.max_send_sge);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (attrs-&gt;cap.max_recv_sge &gt; dev-&gt;attr.max_recv_sge) {</div><div class='add'>+		ocrdma_err("%s(%d) unsupported recv_sge=0x%x requested\n",</div><div class='add'>+			   __func__, dev-&gt;id, attrs-&gt;cap.max_recv_sge);</div><div class='add'>+		ocrdma_err("%s(%d) supported recv_sge=0x%x\n",</div><div class='add'>+			   __func__, dev-&gt;id, dev-&gt;attr.max_recv_sge);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	/* unprivileged user space cannot create special QP */</div><div class='add'>+	if (ibpd-&gt;uobject &amp;&amp; attrs-&gt;qp_type == IB_QPT_GSI) {</div><div class='add'>+		ocrdma_err</div><div class='add'>+		    ("%s(%d) Userspace can't create special QPs of type=0x%x\n",</div><div class='add'>+		     __func__, dev-&gt;id, attrs-&gt;qp_type);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	/* allow creating only one GSI type of QP */</div><div class='add'>+	if (attrs-&gt;qp_type == IB_QPT_GSI &amp;&amp; dev-&gt;gsi_qp_created) {</div><div class='add'>+		ocrdma_err("%s(%d) GSI special QPs already created.\n",</div><div class='add'>+			   __func__, dev-&gt;id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	/* verify consumer QPs are not trying to use GSI QP's CQ */</div><div class='add'>+	if ((attrs-&gt;qp_type != IB_QPT_GSI) &amp;&amp; (dev-&gt;gsi_qp_created)) {</div><div class='add'>+		if ((dev-&gt;gsi_sqcq == get_ocrdma_cq(attrs-&gt;send_cq)) ||</div><div class='add'>+		    (dev-&gt;gsi_sqcq == get_ocrdma_cq(attrs-&gt;send_cq))) {</div><div class='add'>+			ocrdma_err("%s(%d) Consumer QP cannot use GSI CQs.\n",</div><div class='add'>+				   __func__, dev-&gt;id);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,</div><div class='add'>+				struct ib_udata *udata, int dpp_offset,</div><div class='add'>+				int dpp_credit_lmt, int srq)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	u64 usr_db;</div><div class='add'>+	struct ocrdma_create_qp_uresp uresp;</div><div class='add'>+	struct ocrdma_dev *dev = qp-&gt;dev;</div><div class='add'>+	struct ocrdma_pd *pd = qp-&gt;pd;</div><div class='add'>+</div><div class='add'>+	memset(&amp;uresp, 0, sizeof(uresp));</div><div class='add'>+	usr_db = dev-&gt;nic_info.unmapped_db +</div><div class='add'>+			(pd-&gt;id * dev-&gt;nic_info.db_page_size);</div><div class='add'>+	uresp.qp_id = qp-&gt;id;</div><div class='add'>+	uresp.sq_dbid = qp-&gt;sq.dbid;</div><div class='add'>+	uresp.num_sq_pages = 1;</div><div class='add'>+	uresp.sq_page_size = qp-&gt;sq.len;</div><div class='add'>+	uresp.sq_page_addr[0] = qp-&gt;sq.pa;</div><div class='add'>+	uresp.num_wqe_allocated = qp-&gt;sq.max_cnt;</div><div class='add'>+	if (!srq) {</div><div class='add'>+		uresp.rq_dbid = qp-&gt;rq.dbid;</div><div class='add'>+		uresp.num_rq_pages = 1;</div><div class='add'>+		uresp.rq_page_size = qp-&gt;rq.len;</div><div class='add'>+		uresp.rq_page_addr[0] = qp-&gt;rq.pa;</div><div class='add'>+		uresp.num_rqe_allocated = qp-&gt;rq.max_cnt;</div><div class='add'>+	}</div><div class='add'>+	uresp.db_page_addr = usr_db;</div><div class='add'>+	uresp.db_page_size = dev-&gt;nic_info.db_page_size;</div><div class='add'>+	if (dev-&gt;nic_info.dev_family == OCRDMA_GEN2_FAMILY) {</div><div class='add'>+		uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;</div><div class='add'>+		uresp.db_rq_offset = ((qp-&gt;id &amp; 0xFFFF) &lt; 128) ?</div><div class='add'>+			OCRDMA_DB_GEN2_RQ1_OFFSET : OCRDMA_DB_GEN2_RQ2_OFFSET;</div><div class='add'>+		uresp.db_shift = (qp-&gt;id &lt; 128) ? 24 : 16;</div><div class='add'>+	} else {</div><div class='add'>+		uresp.db_sq_offset = OCRDMA_DB_SQ_OFFSET;</div><div class='add'>+		uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;</div><div class='add'>+		uresp.db_shift = 16;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (qp-&gt;dpp_enabled) {</div><div class='add'>+		uresp.dpp_credit = dpp_credit_lmt;</div><div class='add'>+		uresp.dpp_offset = dpp_offset;</div><div class='add'>+	}</div><div class='add'>+	status = ib_copy_to_udata(udata, &amp;uresp, sizeof(uresp));</div><div class='add'>+	if (status) {</div><div class='add'>+		ocrdma_err("%s(%d) user copy error.\n", __func__, dev-&gt;id);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	status = ocrdma_add_mmap(pd-&gt;uctx, uresp.sq_page_addr[0],</div><div class='add'>+				 uresp.sq_page_size);</div><div class='add'>+	if (status)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (!srq) {</div><div class='add'>+		status = ocrdma_add_mmap(pd-&gt;uctx, uresp.rq_page_addr[0],</div><div class='add'>+					 uresp.rq_page_size);</div><div class='add'>+		if (status)</div><div class='add'>+			goto rq_map_err;</div><div class='add'>+	}</div><div class='add'>+	return status;</div><div class='add'>+rq_map_err:</div><div class='add'>+	ocrdma_del_mmap(pd-&gt;uctx, uresp.sq_page_addr[0], uresp.sq_page_size);</div><div class='add'>+err:</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,</div><div class='add'>+			     struct ocrdma_pd *pd)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;nic_info.dev_family == OCRDMA_GEN2_FAMILY) {</div><div class='add'>+		qp-&gt;sq_db = dev-&gt;nic_info.db +</div><div class='add'>+			(pd-&gt;id * dev-&gt;nic_info.db_page_size) +</div><div class='add'>+			OCRDMA_DB_GEN2_SQ_OFFSET;</div><div class='add'>+		qp-&gt;rq_db = dev-&gt;nic_info.db +</div><div class='add'>+			(pd-&gt;id * dev-&gt;nic_info.db_page_size) +</div><div class='add'>+			((qp-&gt;id &lt; 128) ?</div><div class='add'>+			OCRDMA_DB_GEN2_RQ1_OFFSET : OCRDMA_DB_GEN2_RQ2_OFFSET);</div><div class='add'>+	} else {</div><div class='add'>+		qp-&gt;sq_db = dev-&gt;nic_info.db +</div><div class='add'>+			(pd-&gt;id * dev-&gt;nic_info.db_page_size) +</div><div class='add'>+			OCRDMA_DB_SQ_OFFSET;</div><div class='add'>+		qp-&gt;rq_db = dev-&gt;nic_info.db +</div><div class='add'>+			(pd-&gt;id * dev-&gt;nic_info.db_page_size) +</div><div class='add'>+			OCRDMA_DB_RQ_OFFSET;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	qp-&gt;wqe_wr_id_tbl =</div><div class='add'>+	    kzalloc(sizeof(*(qp-&gt;wqe_wr_id_tbl)) * qp-&gt;sq.max_cnt,</div><div class='add'>+		    GFP_KERNEL);</div><div class='add'>+	if (qp-&gt;wqe_wr_id_tbl == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	qp-&gt;rqe_wr_id_tbl =</div><div class='add'>+	    kzalloc(sizeof(u64) * qp-&gt;rq.max_cnt, GFP_KERNEL);</div><div class='add'>+	if (qp-&gt;rqe_wr_id_tbl == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,</div><div class='add'>+				      struct ocrdma_pd *pd,</div><div class='add'>+				      struct ib_qp_init_attr *attrs)</div><div class='add'>+{</div><div class='add'>+	qp-&gt;pd = pd;</div><div class='add'>+	spin_lock_init(&amp;qp-&gt;q_lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;qp-&gt;sq_entry);</div><div class='add'>+	INIT_LIST_HEAD(&amp;qp-&gt;rq_entry);</div><div class='add'>+</div><div class='add'>+	qp-&gt;qp_type = attrs-&gt;qp_type;</div><div class='add'>+	qp-&gt;cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;</div><div class='add'>+	qp-&gt;max_inline_data = attrs-&gt;cap.max_inline_data;</div><div class='add'>+	qp-&gt;sq.max_sges = attrs-&gt;cap.max_send_sge;</div><div class='add'>+	qp-&gt;rq.max_sges = attrs-&gt;cap.max_recv_sge;</div><div class='add'>+	qp-&gt;state = OCRDMA_QPS_RST;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_set_qp_use_cnt(struct ocrdma_qp *qp, struct ocrdma_pd *pd)</div><div class='add'>+{</div><div class='add'>+	atomic_inc(&amp;pd-&gt;use_cnt);</div><div class='add'>+	atomic_inc(&amp;qp-&gt;sq_cq-&gt;use_cnt);</div><div class='add'>+	atomic_inc(&amp;qp-&gt;rq_cq-&gt;use_cnt);</div><div class='add'>+	if (qp-&gt;srq)</div><div class='add'>+		atomic_inc(&amp;qp-&gt;srq-&gt;use_cnt);</div><div class='add'>+	qp-&gt;ibqp.qp_num = qp-&gt;id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,</div><div class='add'>+				   struct ib_qp_init_attr *attrs)</div><div class='add'>+{</div><div class='add'>+	if (attrs-&gt;qp_type == IB_QPT_GSI) {</div><div class='add'>+		dev-&gt;gsi_qp_created = 1;</div><div class='add'>+		dev-&gt;gsi_sqcq = get_ocrdma_cq(attrs-&gt;send_cq);</div><div class='add'>+		dev-&gt;gsi_rqcq = get_ocrdma_cq(attrs-&gt;recv_cq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,</div><div class='add'>+			       struct ib_qp_init_attr *attrs,</div><div class='add'>+			       struct ib_udata *udata)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);</div><div class='add'>+	struct ocrdma_qp *qp;</div><div class='add'>+	struct ocrdma_dev *dev = pd-&gt;dev;</div><div class='add'>+	struct ocrdma_create_qp_ureq ureq;</div><div class='add'>+	u16 dpp_credit_lmt, dpp_offset;</div><div class='add'>+</div><div class='add'>+	status = ocrdma_check_qp_params(ibpd, dev, attrs);</div><div class='add'>+	if (status)</div><div class='add'>+		goto gen_err;</div><div class='add'>+</div><div class='add'>+	memset(&amp;ureq, 0, sizeof(ureq));</div><div class='add'>+	if (udata) {</div><div class='add'>+		if (ib_copy_from_udata(&amp;ureq, udata, sizeof(ureq)))</div><div class='add'>+			return ERR_PTR(-EFAULT);</div><div class='add'>+	}</div><div class='add'>+	qp = kzalloc(sizeof(*qp), GFP_KERNEL);</div><div class='add'>+	if (!qp) {</div><div class='add'>+		status = -ENOMEM;</div><div class='add'>+		goto gen_err;</div><div class='add'>+	}</div><div class='add'>+	qp-&gt;dev = dev;</div><div class='add'>+	ocrdma_set_qp_init_params(qp, pd, attrs);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,</div><div class='add'>+					ureq.dpp_cq_id,</div><div class='add'>+					&amp;dpp_offset, &amp;dpp_credit_lmt);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+</div><div class='add'>+	/* user space QP's wr_id table are managed in library */</div><div class='add'>+	if (udata == NULL) {</div><div class='add'>+		qp-&gt;cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |</div><div class='add'>+				  OCRDMA_QP_FAST_REG);</div><div class='add'>+		status = ocrdma_alloc_wr_id_tbl(qp);</div><div class='add'>+		if (status)</div><div class='add'>+			goto map_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = ocrdma_add_qpn_map(dev, qp);</div><div class='add'>+	if (status)</div><div class='add'>+		goto map_err;</div><div class='add'>+	ocrdma_set_qp_db(dev, qp, pd);</div><div class='add'>+	if (udata) {</div><div class='add'>+		status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,</div><div class='add'>+					      dpp_credit_lmt,</div><div class='add'>+					      (attrs-&gt;srq != NULL));</div><div class='add'>+		if (status)</div><div class='add'>+			goto cpy_err;</div><div class='add'>+	}</div><div class='add'>+	ocrdma_store_gsi_qp_cq(dev, attrs);</div><div class='add'>+	ocrdma_set_qp_use_cnt(qp, pd);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	return &amp;qp-&gt;ibqp;</div><div class='add'>+</div><div class='add'>+cpy_err:</div><div class='add'>+	ocrdma_del_qpn_map(dev, qp);</div><div class='add'>+map_err:</div><div class='add'>+	ocrdma_mbx_destroy_qp(dev, qp);</div><div class='add'>+mbx_err:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	kfree(qp-&gt;wqe_wr_id_tbl);</div><div class='add'>+	kfree(qp-&gt;rqe_wr_id_tbl);</div><div class='add'>+	kfree(qp);</div><div class='add'>+	ocrdma_err("%s(%d) error=%d\n", __func__, dev-&gt;id, status);</div><div class='add'>+gen_err:</div><div class='add'>+	return ERR_PTR(status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,</div><div class='add'>+		      int attr_mask)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	struct ocrdma_qp *qp;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	enum ib_qp_state old_qps;</div><div class='add'>+</div><div class='add'>+	qp = get_ocrdma_qp(ibqp);</div><div class='add'>+	dev = qp-&gt;dev;</div><div class='add'>+	if (attr_mask &amp; IB_QP_STATE)</div><div class='add'>+		status = ocrdma_qp_state_machine(qp, attr-&gt;qp_state, &amp;old_qps);</div><div class='add'>+	/* if new and previous states are same hw doesn't need to</div><div class='add'>+	 * know about it.</div><div class='add'>+	 */</div><div class='add'>+	if (status &lt; 0)</div><div class='add'>+		return status;</div><div class='add'>+	status = ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask, old_qps);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,</div><div class='add'>+		     int attr_mask, struct ib_udata *udata)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int status = -EINVAL;</div><div class='add'>+	struct ocrdma_qp *qp;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	enum ib_qp_state old_qps, new_qps;</div><div class='add'>+</div><div class='add'>+	qp = get_ocrdma_qp(ibqp);</div><div class='add'>+	dev = qp-&gt;dev;</div><div class='add'>+</div><div class='add'>+	/* syncronize with multiple context trying to change, retrive qps */</div><div class='add'>+	mutex_lock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	/* syncronize with wqe, rqe posting and cqe processing contexts */</div><div class='add'>+	spin_lock_irqsave(&amp;qp-&gt;q_lock, flags);</div><div class='add'>+	old_qps = get_ibqp_state(qp-&gt;state);</div><div class='add'>+	if (attr_mask &amp; IB_QP_STATE)</div><div class='add'>+		new_qps = attr-&gt;qp_state;</div><div class='add'>+	else</div><div class='add'>+		new_qps = old_qps;</div><div class='add'>+	spin_unlock_irqrestore(&amp;qp-&gt;q_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp-&gt;qp_type, attr_mask)) {</div><div class='add'>+		ocrdma_err("%s(%d) invalid attribute mask=0x%x specified for "</div><div class='add'>+			   "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",</div><div class='add'>+			   __func__, dev-&gt;id, attr_mask, qp-&gt;id, ibqp-&gt;qp_type,</div><div class='add'>+			   old_qps, new_qps);</div><div class='add'>+		goto param_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = _ocrdma_modify_qp(ibqp, attr, attr_mask);</div><div class='add'>+	if (status &gt; 0)</div><div class='add'>+		status = 0;</div><div class='add'>+param_err:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)</div><div class='add'>+{</div><div class='add'>+	switch (mtu) {</div><div class='add'>+	case 256:</div><div class='add'>+		return IB_MTU_256;</div><div class='add'>+	case 512:</div><div class='add'>+		return IB_MTU_512;</div><div class='add'>+	case 1024:</div><div class='add'>+		return IB_MTU_1024;</div><div class='add'>+	case 2048:</div><div class='add'>+		return IB_MTU_2048;</div><div class='add'>+	case 4096:</div><div class='add'>+		return IB_MTU_4096;</div><div class='add'>+	default:</div><div class='add'>+		return IB_MTU_1024;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)</div><div class='add'>+{</div><div class='add'>+	int ib_qp_acc_flags = 0;</div><div class='add'>+</div><div class='add'>+	if (qp_cap_flags &amp; OCRDMA_QP_INB_WR)</div><div class='add'>+		ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;</div><div class='add'>+	if (qp_cap_flags &amp; OCRDMA_QP_INB_RD)</div><div class='add'>+		ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;</div><div class='add'>+	return ib_qp_acc_flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_query_qp(struct ib_qp *ibqp,</div><div class='add'>+		    struct ib_qp_attr *qp_attr,</div><div class='add'>+		    int attr_mask, struct ib_qp_init_attr *qp_init_attr)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	u32 qp_state;</div><div class='add'>+	struct ocrdma_qp_params params;</div><div class='add'>+	struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);</div><div class='add'>+	struct ocrdma_dev *dev = qp-&gt;dev;</div><div class='add'>+</div><div class='add'>+	memset(&amp;params, 0, sizeof(params));</div><div class='add'>+	mutex_lock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	status = ocrdma_mbx_query_qp(dev, qp, &amp;params);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	if (status)</div><div class='add'>+		goto mbx_err;</div><div class='add'>+	qp_attr-&gt;qp_state = get_ibqp_state(IB_QPS_INIT);</div><div class='add'>+	qp_attr-&gt;cur_qp_state = get_ibqp_state(IB_QPS_INIT);</div><div class='add'>+	qp_attr-&gt;path_mtu =</div><div class='add'>+		ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &amp;</div><div class='add'>+				OCRDMA_QP_PARAMS_PATH_MTU_MASK) &gt;&gt;</div><div class='add'>+				OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;</div><div class='add'>+	qp_attr-&gt;path_mig_state = IB_MIG_MIGRATED;</div><div class='add'>+	qp_attr-&gt;rq_psn = params.hop_lmt_rq_psn &amp; OCRDMA_QP_PARAMS_RQ_PSN_MASK;</div><div class='add'>+	qp_attr-&gt;sq_psn = params.tclass_sq_psn &amp; OCRDMA_QP_PARAMS_SQ_PSN_MASK;</div><div class='add'>+	qp_attr-&gt;dest_qp_num =</div><div class='add'>+	    params.ack_to_rnr_rtc_dest_qpn &amp; OCRDMA_QP_PARAMS_DEST_QPN_MASK;</div><div class='add'>+</div><div class='add'>+	qp_attr-&gt;qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp-&gt;cap_flags);</div><div class='add'>+	qp_attr-&gt;cap.max_send_wr = qp-&gt;sq.max_cnt - 1;</div><div class='add'>+	qp_attr-&gt;cap.max_recv_wr = qp-&gt;rq.max_cnt - 1;</div><div class='add'>+	qp_attr-&gt;cap.max_send_sge = qp-&gt;sq.max_sges;</div><div class='add'>+	qp_attr-&gt;cap.max_recv_sge = qp-&gt;rq.max_sges;</div><div class='add'>+	qp_attr-&gt;cap.max_inline_data = dev-&gt;attr.max_inline_data;</div><div class='add'>+	qp_init_attr-&gt;cap = qp_attr-&gt;cap;</div><div class='add'>+	memcpy(&amp;qp_attr-&gt;ah_attr.grh.dgid, &amp;params.dgid[0],</div><div class='add'>+	       sizeof(params.dgid));</div><div class='add'>+	qp_attr-&gt;ah_attr.grh.flow_label = params.rnt_rc_sl_fl &amp;</div><div class='add'>+	    OCRDMA_QP_PARAMS_FLOW_LABEL_MASK;</div><div class='add'>+	qp_attr-&gt;ah_attr.grh.sgid_index = qp-&gt;sgid_idx;</div><div class='add'>+	qp_attr-&gt;ah_attr.grh.hop_limit = (params.hop_lmt_rq_psn &amp;</div><div class='add'>+					  OCRDMA_QP_PARAMS_HOP_LMT_MASK) &gt;&gt;</div><div class='add'>+						OCRDMA_QP_PARAMS_HOP_LMT_SHIFT;</div><div class='add'>+	qp_attr-&gt;ah_attr.grh.traffic_class = (params.tclass_sq_psn &amp;</div><div class='add'>+					      OCRDMA_QP_PARAMS_SQ_PSN_MASK) &gt;&gt;</div><div class='add'>+						OCRDMA_QP_PARAMS_TCLASS_SHIFT;</div><div class='add'>+</div><div class='add'>+	qp_attr-&gt;ah_attr.ah_flags = IB_AH_GRH;</div><div class='add'>+	qp_attr-&gt;ah_attr.port_num = 1;</div><div class='add'>+	qp_attr-&gt;ah_attr.sl = (params.rnt_rc_sl_fl &amp;</div><div class='add'>+			       OCRDMA_QP_PARAMS_SL_MASK) &gt;&gt;</div><div class='add'>+				OCRDMA_QP_PARAMS_SL_SHIFT;</div><div class='add'>+	qp_attr-&gt;timeout = (params.ack_to_rnr_rtc_dest_qpn &amp;</div><div class='add'>+			    OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) &gt;&gt;</div><div class='add'>+				OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;</div><div class='add'>+	qp_attr-&gt;rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &amp;</div><div class='add'>+			      OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) &gt;&gt;</div><div class='add'>+				OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;</div><div class='add'>+	qp_attr-&gt;retry_cnt =</div><div class='add'>+	    (params.rnt_rc_sl_fl &amp; OCRDMA_QP_PARAMS_RETRY_CNT_MASK) &gt;&gt;</div><div class='add'>+		OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;</div><div class='add'>+	qp_attr-&gt;min_rnr_timer = 0;</div><div class='add'>+	qp_attr-&gt;pkey_index = 0;</div><div class='add'>+	qp_attr-&gt;port_num = 1;</div><div class='add'>+	qp_attr-&gt;ah_attr.src_path_bits = 0;</div><div class='add'>+	qp_attr-&gt;ah_attr.static_rate = 0;</div><div class='add'>+	qp_attr-&gt;alt_pkey_index = 0;</div><div class='add'>+	qp_attr-&gt;alt_port_num = 0;</div><div class='add'>+	qp_attr-&gt;alt_timeout = 0;</div><div class='add'>+	memset(&amp;qp_attr-&gt;alt_ah_attr, 0, sizeof(qp_attr-&gt;alt_ah_attr));</div><div class='add'>+	qp_state = (params.max_sge_recv_flags &amp; OCRDMA_QP_PARAMS_STATE_MASK) &gt;&gt;</div><div class='add'>+		    OCRDMA_QP_PARAMS_STATE_SHIFT;</div><div class='add'>+	qp_attr-&gt;sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;</div><div class='add'>+	qp_attr-&gt;max_dest_rd_atomic =</div><div class='add'>+	    params.max_ord_ird &gt;&gt; OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;</div><div class='add'>+	qp_attr-&gt;max_rd_atomic =</div><div class='add'>+	    params.max_ord_ird &amp; OCRDMA_QP_PARAMS_MAX_IRD_MASK;</div><div class='add'>+	qp_attr-&gt;en_sqd_async_notify = (params.max_sge_recv_flags &amp;</div><div class='add'>+				OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;</div><div class='add'>+mbx_err:</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, int idx)</div><div class='add'>+{</div><div class='add'>+	int i = idx / 32;</div><div class='add'>+	unsigned int mask = (1 &lt;&lt; (idx % 32));</div><div class='add'>+</div><div class='add'>+	if (srq-&gt;idx_bit_fields[i] &amp; mask)</div><div class='add'>+		srq-&gt;idx_bit_fields[i] &amp;= ~mask;</div><div class='add'>+	else</div><div class='add'>+		srq-&gt;idx_bit_fields[i] |= mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)</div><div class='add'>+{</div><div class='add'>+	int free_cnt;</div><div class='add'>+	if (q-&gt;head &gt;= q-&gt;tail)</div><div class='add'>+		free_cnt = (q-&gt;max_cnt - q-&gt;head) + q-&gt;tail;</div><div class='add'>+	else</div><div class='add'>+		free_cnt = q-&gt;tail - q-&gt;head;</div><div class='add'>+	return free_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int is_hw_sq_empty(struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	return (qp-&gt;sq.tail == qp-&gt;sq.head &amp;&amp;</div><div class='add'>+		ocrdma_hwq_free_cnt(&amp;qp-&gt;sq) ? 1 : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int is_hw_rq_empty(struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	return (qp-&gt;rq.tail == qp-&gt;rq.head) ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)</div><div class='add'>+{</div><div class='add'>+	return q-&gt;va + (q-&gt;head * q-&gt;entry_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,</div><div class='add'>+				      u32 idx)</div><div class='add'>+{</div><div class='add'>+	return q-&gt;va + (idx * q-&gt;entry_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)</div><div class='add'>+{</div><div class='add'>+	q-&gt;head = (q-&gt;head + 1) &amp; q-&gt;max_wqe_idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)</div><div class='add'>+{</div><div class='add'>+	q-&gt;tail = (q-&gt;tail + 1) &amp; q-&gt;max_wqe_idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* discard the cqe for a given QP */</div><div class='add'>+static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)</div><div class='add'>+{</div><div class='add'>+	unsigned long cq_flags;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int discard_cnt = 0;</div><div class='add'>+	u32 cur_getp, stop_getp;</div><div class='add'>+	struct ocrdma_cqe *cqe;</div><div class='add'>+	u32 qpn = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;cq-&gt;cq_lock, cq_flags);</div><div class='add'>+</div><div class='add'>+	/* traverse through the CQEs in the hw CQ,</div><div class='add'>+	 * find the matching CQE for a given qp,</div><div class='add'>+	 * mark the matching one discarded by clearing qpn.</div><div class='add'>+	 * ring the doorbell in the poll_cq() as</div><div class='add'>+	 * we don't complete out of order cqe.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	cur_getp = cq-&gt;getp;</div><div class='add'>+	/* find upto when do we reap the cq. */</div><div class='add'>+	stop_getp = cur_getp;</div><div class='add'>+	do {</div><div class='add'>+		if (is_hw_sq_empty(qp) &amp;&amp; (!qp-&gt;srq &amp;&amp; is_hw_rq_empty(qp)))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		cqe = cq-&gt;va + cur_getp;</div><div class='add'>+		/* if (a) done reaping whole hw cq, or</div><div class='add'>+		 *    (b) qp_xq becomes empty.</div><div class='add'>+		 * then exit</div><div class='add'>+		 */</div><div class='add'>+		qpn = cqe-&gt;cmn.qpn &amp; OCRDMA_CQE_QPN_MASK;</div><div class='add'>+		/* if previously discarded cqe found, skip that too. */</div><div class='add'>+		/* check for matching qp */</div><div class='add'>+		if (qpn == 0 || qpn != qp-&gt;id)</div><div class='add'>+			goto skip_cqe;</div><div class='add'>+</div><div class='add'>+		/* mark cqe discarded so that it is not picked up later</div><div class='add'>+		 * in the poll_cq().</div><div class='add'>+		 */</div><div class='add'>+		discard_cnt += 1;</div><div class='add'>+		cqe-&gt;cmn.qpn = 0;</div><div class='add'>+		if (is_cqe_for_sq(cqe))</div><div class='add'>+			ocrdma_hwq_inc_tail(&amp;qp-&gt;sq);</div><div class='add'>+		else {</div><div class='add'>+			if (qp-&gt;srq) {</div><div class='add'>+				spin_lock_irqsave(&amp;qp-&gt;srq-&gt;q_lock, flags);</div><div class='add'>+				ocrdma_hwq_inc_tail(&amp;qp-&gt;srq-&gt;rq);</div><div class='add'>+				ocrdma_srq_toggle_bit(qp-&gt;srq, cur_getp);</div><div class='add'>+				spin_unlock_irqrestore(&amp;qp-&gt;srq-&gt;q_lock, flags);</div><div class='add'>+</div><div class='add'>+			} else</div><div class='add'>+				ocrdma_hwq_inc_tail(&amp;qp-&gt;rq);</div><div class='add'>+		}</div><div class='add'>+skip_cqe:</div><div class='add'>+		cur_getp = (cur_getp + 1) % cq-&gt;max_hw_cqe;</div><div class='add'>+	} while (cur_getp != stop_getp);</div><div class='add'>+	spin_unlock_irqrestore(&amp;cq-&gt;cq_lock, cq_flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_del_flush_qp(struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	int found = false;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ocrdma_dev *dev = qp-&gt;dev;</div><div class='add'>+	/* sync with any active CQ poll */</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;dev-&gt;flush_q_lock, flags);</div><div class='add'>+	found = ocrdma_is_qp_in_sq_flushlist(qp-&gt;sq_cq, qp);</div><div class='add'>+	if (found)</div><div class='add'>+		list_del(&amp;qp-&gt;sq_entry);</div><div class='add'>+	if (!qp-&gt;srq) {</div><div class='add'>+		found = ocrdma_is_qp_in_rq_flushlist(qp-&gt;rq_cq, qp);</div><div class='add'>+		if (found)</div><div class='add'>+			list_del(&amp;qp-&gt;rq_entry);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev-&gt;flush_q_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_destroy_qp(struct ib_qp *ibqp)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_pd *pd;</div><div class='add'>+	struct ocrdma_qp *qp;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	struct ib_qp_attr attrs;</div><div class='add'>+	int attr_mask = IB_QP_STATE;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	qp = get_ocrdma_qp(ibqp);</div><div class='add'>+	dev = qp-&gt;dev;</div><div class='add'>+</div><div class='add'>+	attrs.qp_state = IB_QPS_ERR;</div><div class='add'>+	pd = qp-&gt;pd;</div><div class='add'>+</div><div class='add'>+	/* change the QP state to ERROR */</div><div class='add'>+	_ocrdma_modify_qp(ibqp, &amp;attrs, attr_mask);</div><div class='add'>+</div><div class='add'>+	/* ensure that CQEs for newly created QP (whose id may be same with</div><div class='add'>+	 * one which just getting destroyed are same), dont get</div><div class='add'>+	 * discarded until the old CQEs are discarded.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;dev-&gt;dev_lock);</div><div class='add'>+	status = ocrdma_mbx_destroy_qp(dev, qp);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * acquire CQ lock while destroy is in progress, in order to</div><div class='add'>+	 * protect against proessing in-flight CQEs for this QP.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;qp-&gt;sq_cq-&gt;cq_lock, flags);</div><div class='add'>+	if (qp-&gt;rq_cq &amp;&amp; (qp-&gt;rq_cq != qp-&gt;sq_cq))</div><div class='add'>+		spin_lock(&amp;qp-&gt;rq_cq-&gt;cq_lock);</div><div class='add'>+</div><div class='add'>+	ocrdma_del_qpn_map(dev, qp);</div><div class='add'>+</div><div class='add'>+	if (qp-&gt;rq_cq &amp;&amp; (qp-&gt;rq_cq != qp-&gt;sq_cq))</div><div class='add'>+		spin_unlock(&amp;qp-&gt;rq_cq-&gt;cq_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;qp-&gt;sq_cq-&gt;cq_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (!pd-&gt;uctx) {</div><div class='add'>+		ocrdma_discard_cqes(qp, qp-&gt;sq_cq);</div><div class='add'>+		ocrdma_discard_cqes(qp, qp-&gt;rq_cq);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;dev_lock);</div><div class='add'>+</div><div class='add'>+	if (pd-&gt;uctx) {</div><div class='add'>+		ocrdma_del_mmap(pd-&gt;uctx, (u64) qp-&gt;sq.pa, qp-&gt;sq.len);</div><div class='add'>+		if (!qp-&gt;srq)</div><div class='add'>+			ocrdma_del_mmap(pd-&gt;uctx, (u64) qp-&gt;rq.pa, qp-&gt;rq.len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocrdma_del_flush_qp(qp);</div><div class='add'>+</div><div class='add'>+	atomic_dec(&amp;qp-&gt;pd-&gt;use_cnt);</div><div class='add'>+	atomic_dec(&amp;qp-&gt;sq_cq-&gt;use_cnt);</div><div class='add'>+	atomic_dec(&amp;qp-&gt;rq_cq-&gt;use_cnt);</div><div class='add'>+	if (qp-&gt;srq)</div><div class='add'>+		atomic_dec(&amp;qp-&gt;srq-&gt;use_cnt);</div><div class='add'>+	kfree(qp-&gt;wqe_wr_id_tbl);</div><div class='add'>+	kfree(qp-&gt;rqe_wr_id_tbl);</div><div class='add'>+	kfree(qp);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_copy_srq_uresp(struct ocrdma_srq *srq, struct ib_udata *udata)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_create_srq_uresp uresp;</div><div class='add'>+</div><div class='add'>+	uresp.rq_dbid = srq-&gt;rq.dbid;</div><div class='add'>+	uresp.num_rq_pages = 1;</div><div class='add'>+	uresp.rq_page_addr[0] = srq-&gt;rq.pa;</div><div class='add'>+	uresp.rq_page_size = srq-&gt;rq.len;</div><div class='add'>+	uresp.db_page_addr = srq-&gt;dev-&gt;nic_info.unmapped_db +</div><div class='add'>+	    (srq-&gt;pd-&gt;id * srq-&gt;dev-&gt;nic_info.db_page_size);</div><div class='add'>+	uresp.db_page_size = srq-&gt;dev-&gt;nic_info.db_page_size;</div><div class='add'>+	uresp.num_rqe_allocated = srq-&gt;rq.max_cnt;</div><div class='add'>+	if (srq-&gt;dev-&gt;nic_info.dev_family == OCRDMA_GEN2_FAMILY) {</div><div class='add'>+		uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ1_OFFSET;</div><div class='add'>+		uresp.db_shift = 24;</div><div class='add'>+	} else {</div><div class='add'>+		uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;</div><div class='add'>+		uresp.db_shift = 16;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = ib_copy_to_udata(udata, &amp;uresp, sizeof(uresp));</div><div class='add'>+	if (status)</div><div class='add'>+		return status;</div><div class='add'>+	status = ocrdma_add_mmap(srq-&gt;pd-&gt;uctx, uresp.rq_page_addr[0],</div><div class='add'>+				 uresp.rq_page_size);</div><div class='add'>+	if (status)</div><div class='add'>+		return status;</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd,</div><div class='add'>+				 struct ib_srq_init_attr *init_attr,</div><div class='add'>+				 struct ib_udata *udata)</div><div class='add'>+{</div><div class='add'>+	int status = -ENOMEM;</div><div class='add'>+	struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);</div><div class='add'>+	struct ocrdma_dev *dev = pd-&gt;dev;</div><div class='add'>+	struct ocrdma_srq *srq;</div><div class='add'>+</div><div class='add'>+	if (init_attr-&gt;attr.max_sge &gt; dev-&gt;attr.max_recv_sge)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+	if (init_attr-&gt;attr.max_wr &gt; dev-&gt;attr.max_rqe)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	srq = kzalloc(sizeof(*srq), GFP_KERNEL);</div><div class='add'>+	if (!srq)</div><div class='add'>+		return ERR_PTR(status);</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;srq-&gt;q_lock);</div><div class='add'>+	srq-&gt;dev = dev;</div><div class='add'>+	srq-&gt;pd = pd;</div><div class='add'>+	srq-&gt;db = dev-&gt;nic_info.db + (pd-&gt;id * dev-&gt;nic_info.db_page_size);</div><div class='add'>+	status = ocrdma_mbx_create_srq(srq, init_attr, pd);</div><div class='add'>+	if (status)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (udata == NULL) {</div><div class='add'>+		srq-&gt;rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq-&gt;rq.max_cnt,</div><div class='add'>+			    GFP_KERNEL);</div><div class='add'>+		if (srq-&gt;rqe_wr_id_tbl == NULL)</div><div class='add'>+			goto arm_err;</div><div class='add'>+</div><div class='add'>+		srq-&gt;bit_fields_len = (srq-&gt;rq.max_cnt / 32) +</div><div class='add'>+		    (srq-&gt;rq.max_cnt % 32 ? 1 : 0);</div><div class='add'>+		srq-&gt;idx_bit_fields =</div><div class='add'>+		    kmalloc(srq-&gt;bit_fields_len * sizeof(u32), GFP_KERNEL);</div><div class='add'>+		if (srq-&gt;idx_bit_fields == NULL)</div><div class='add'>+			goto arm_err;</div><div class='add'>+		memset(srq-&gt;idx_bit_fields, 0xff,</div><div class='add'>+		       srq-&gt;bit_fields_len * sizeof(u32));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (init_attr-&gt;attr.srq_limit) {</div><div class='add'>+		status = ocrdma_mbx_modify_srq(srq, &amp;init_attr-&gt;attr);</div><div class='add'>+		if (status)</div><div class='add'>+			goto arm_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;srq-&gt;use_cnt, 0);</div><div class='add'>+	if (udata) {</div><div class='add'>+		status = ocrdma_copy_srq_uresp(srq, udata);</div><div class='add'>+		if (status)</div><div class='add'>+			goto arm_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;pd-&gt;use_cnt);</div><div class='add'>+	return &amp;srq-&gt;ibsrq;</div><div class='add'>+</div><div class='add'>+arm_err:</div><div class='add'>+	ocrdma_mbx_destroy_srq(dev, srq);</div><div class='add'>+err:</div><div class='add'>+	kfree(srq-&gt;rqe_wr_id_tbl);</div><div class='add'>+	kfree(srq-&gt;idx_bit_fields);</div><div class='add'>+	kfree(srq);</div><div class='add'>+	return ERR_PTR(status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_modify_srq(struct ib_srq *ibsrq,</div><div class='add'>+		      struct ib_srq_attr *srq_attr,</div><div class='add'>+		      enum ib_srq_attr_mask srq_attr_mask,</div><div class='add'>+		      struct ib_udata *udata)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	struct ocrdma_srq *srq;</div><div class='add'>+</div><div class='add'>+	srq = get_ocrdma_srq(ibsrq);</div><div class='add'>+	if (srq_attr_mask &amp; IB_SRQ_MAX_WR)</div><div class='add'>+		status = -EINVAL;</div><div class='add'>+	else</div><div class='add'>+		status = ocrdma_mbx_modify_srq(srq, srq_attr);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_srq *srq;</div><div class='add'>+</div><div class='add'>+	srq = get_ocrdma_srq(ibsrq);</div><div class='add'>+	status = ocrdma_mbx_query_srq(srq, srq_attr);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_destroy_srq(struct ib_srq *ibsrq)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_srq *srq;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+</div><div class='add'>+	srq = get_ocrdma_srq(ibsrq);</div><div class='add'>+	dev = srq-&gt;dev;</div><div class='add'>+	if (atomic_read(&amp;srq-&gt;use_cnt)) {</div><div class='add'>+		ocrdma_err("%s(%d) err, srq=0x%x in use\n",</div><div class='add'>+			   __func__, dev-&gt;id, srq-&gt;id);</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = ocrdma_mbx_destroy_srq(dev, srq);</div><div class='add'>+</div><div class='add'>+	if (srq-&gt;pd-&gt;uctx)</div><div class='add'>+		ocrdma_del_mmap(srq-&gt;pd-&gt;uctx, (u64) srq-&gt;rq.pa, srq-&gt;rq.len);</div><div class='add'>+</div><div class='add'>+	atomic_dec(&amp;srq-&gt;pd-&gt;use_cnt);</div><div class='add'>+	kfree(srq-&gt;idx_bit_fields);</div><div class='add'>+	kfree(srq-&gt;rqe_wr_id_tbl);</div><div class='add'>+	kfree(srq);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* unprivileged verbs and their support functions. */</div><div class='add'>+static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,</div><div class='add'>+				struct ocrdma_hdr_wqe *hdr,</div><div class='add'>+				struct ib_send_wr *wr)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_ewqe_ud_hdr *ud_hdr =</div><div class='add'>+		(struct ocrdma_ewqe_ud_hdr *)(hdr + 1);</div><div class='add'>+	struct ocrdma_ah *ah = get_ocrdma_ah(wr-&gt;wr.ud.ah);</div><div class='add'>+</div><div class='add'>+	ud_hdr-&gt;rsvd_dest_qpn = wr-&gt;wr.ud.remote_qpn;</div><div class='add'>+	if (qp-&gt;qp_type == IB_QPT_GSI)</div><div class='add'>+		ud_hdr-&gt;qkey = qp-&gt;qkey;</div><div class='add'>+	else</div><div class='add'>+		ud_hdr-&gt;qkey = wr-&gt;wr.ud.remote_qkey;</div><div class='add'>+	ud_hdr-&gt;rsvd_ahid = ah-&gt;id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,</div><div class='add'>+			      struct ocrdma_sge *sge, int num_sge,</div><div class='add'>+			      struct ib_sge *sg_list)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_sge; i++) {</div><div class='add'>+		sge[i].lrkey = sg_list[i].lkey;</div><div class='add'>+		sge[i].addr_lo = sg_list[i].addr;</div><div class='add'>+		sge[i].addr_hi = upper_32_bits(sg_list[i].addr);</div><div class='add'>+		sge[i].len = sg_list[i].length;</div><div class='add'>+		hdr-&gt;total_len += sg_list[i].length;</div><div class='add'>+	}</div><div class='add'>+	if (num_sge == 0)</div><div class='add'>+		memset(sge, 0, sizeof(*sge));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,</div><div class='add'>+				    struct ocrdma_hdr_wqe *hdr,</div><div class='add'>+				    struct ocrdma_sge *sge,</div><div class='add'>+				    struct ib_send_wr *wr, u32 wqe_size)</div><div class='add'>+{</div><div class='add'>+	if (wr-&gt;send_flags &amp; IB_SEND_INLINE) {</div><div class='add'>+		if (wr-&gt;sg_list[0].length &gt; qp-&gt;max_inline_data) {</div><div class='add'>+			ocrdma_err("%s() supported_len=0x%x,"</div><div class='add'>+				" unspported len req=0x%x\n", __func__,</div><div class='add'>+				qp-&gt;max_inline_data, wr-&gt;sg_list[0].length);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		memcpy(sge,</div><div class='add'>+		       (void *)(unsigned long)wr-&gt;sg_list[0].addr,</div><div class='add'>+		       wr-&gt;sg_list[0].length);</div><div class='add'>+		hdr-&gt;total_len = wr-&gt;sg_list[0].length;</div><div class='add'>+		wqe_size += roundup(hdr-&gt;total_len, OCRDMA_WQE_ALIGN_BYTES);</div><div class='add'>+		hdr-&gt;cw |= (OCRDMA_TYPE_INLINE &lt;&lt; OCRDMA_WQE_TYPE_SHIFT);</div><div class='add'>+	} else {</div><div class='add'>+		ocrdma_build_sges(hdr, sge, wr-&gt;num_sge, wr-&gt;sg_list);</div><div class='add'>+		if (wr-&gt;num_sge)</div><div class='add'>+			wqe_size += (wr-&gt;num_sge * sizeof(struct ocrdma_sge));</div><div class='add'>+		else</div><div class='add'>+			wqe_size += sizeof(struct ocrdma_sge);</div><div class='add'>+		hdr-&gt;cw |= (OCRDMA_TYPE_LKEY &lt;&lt; OCRDMA_WQE_TYPE_SHIFT);</div><div class='add'>+	}</div><div class='add'>+	hdr-&gt;cw |= ((wqe_size / OCRDMA_WQE_STRIDE) &lt;&lt; OCRDMA_WQE_SIZE_SHIFT);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,</div><div class='add'>+			     struct ib_send_wr *wr)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_sge *sge;</div><div class='add'>+	u32 wqe_size = sizeof(*hdr);</div><div class='add'>+</div><div class='add'>+	if (qp-&gt;qp_type == IB_QPT_UD || qp-&gt;qp_type == IB_QPT_GSI) {</div><div class='add'>+		ocrdma_build_ud_hdr(qp, hdr, wr);</div><div class='add'>+		sge = (struct ocrdma_sge *)(hdr + 2);</div><div class='add'>+		wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);</div><div class='add'>+	} else</div><div class='add'>+		sge = (struct ocrdma_sge *)(hdr + 1);</div><div class='add'>+</div><div class='add'>+	status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,</div><div class='add'>+			      struct ib_send_wr *wr)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);</div><div class='add'>+	struct ocrdma_sge *sge = ext_rw + 1;</div><div class='add'>+	u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);</div><div class='add'>+</div><div class='add'>+	status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);</div><div class='add'>+	if (status)</div><div class='add'>+		return status;</div><div class='add'>+	ext_rw-&gt;addr_lo = wr-&gt;wr.rdma.remote_addr;</div><div class='add'>+	ext_rw-&gt;addr_hi = upper_32_bits(wr-&gt;wr.rdma.remote_addr);</div><div class='add'>+	ext_rw-&gt;lrkey = wr-&gt;wr.rdma.rkey;</div><div class='add'>+	ext_rw-&gt;len = hdr-&gt;total_len;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,</div><div class='add'>+			      struct ib_send_wr *wr)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);</div><div class='add'>+	struct ocrdma_sge *sge = ext_rw + 1;</div><div class='add'>+	u32 wqe_size = ((wr-&gt;num_sge + 1) * sizeof(struct ocrdma_sge)) +</div><div class='add'>+	    sizeof(struct ocrdma_hdr_wqe);</div><div class='add'>+</div><div class='add'>+	ocrdma_build_sges(hdr, sge, wr-&gt;num_sge, wr-&gt;sg_list);</div><div class='add'>+	hdr-&gt;cw |= ((wqe_size / OCRDMA_WQE_STRIDE) &lt;&lt; OCRDMA_WQE_SIZE_SHIFT);</div><div class='add'>+	hdr-&gt;cw |= (OCRDMA_READ &lt;&lt; OCRDMA_WQE_OPCODE_SHIFT);</div><div class='add'>+	hdr-&gt;cw |= (OCRDMA_TYPE_LKEY &lt;&lt; OCRDMA_WQE_TYPE_SHIFT);</div><div class='add'>+</div><div class='add'>+	ext_rw-&gt;addr_lo = wr-&gt;wr.rdma.remote_addr;</div><div class='add'>+	ext_rw-&gt;addr_hi = upper_32_bits(wr-&gt;wr.rdma.remote_addr);</div><div class='add'>+	ext_rw-&gt;lrkey = wr-&gt;wr.rdma.rkey;</div><div class='add'>+	ext_rw-&gt;len = hdr-&gt;total_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	u32 val = qp-&gt;sq.dbid | (1 &lt;&lt; 16);</div><div class='add'>+</div><div class='add'>+	iowrite32(val, qp-&gt;sq_db);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,</div><div class='add'>+		     struct ib_send_wr **bad_wr)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);</div><div class='add'>+	struct ocrdma_hdr_wqe *hdr;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;qp-&gt;q_lock, flags);</div><div class='add'>+	if (qp-&gt;state != OCRDMA_QPS_RTS &amp;&amp; qp-&gt;state != OCRDMA_QPS_SQD) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;qp-&gt;q_lock, flags);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (wr) {</div><div class='add'>+		if (ocrdma_hwq_free_cnt(&amp;qp-&gt;sq) == 0 ||</div><div class='add'>+		    wr-&gt;num_sge &gt; qp-&gt;sq.max_sges) {</div><div class='add'>+			status = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		hdr = ocrdma_hwq_head(&amp;qp-&gt;sq);</div><div class='add'>+		hdr-&gt;cw = 0;</div><div class='add'>+		if (wr-&gt;send_flags &amp; IB_SEND_SIGNALED)</div><div class='add'>+			hdr-&gt;cw |= (OCRDMA_FLAG_SIG &lt;&lt; OCRDMA_WQE_FLAGS_SHIFT);</div><div class='add'>+		if (wr-&gt;send_flags &amp; IB_SEND_FENCE)</div><div class='add'>+			hdr-&gt;cw |=</div><div class='add'>+			    (OCRDMA_FLAG_FENCE_L &lt;&lt; OCRDMA_WQE_FLAGS_SHIFT);</div><div class='add'>+		if (wr-&gt;send_flags &amp; IB_SEND_SOLICITED)</div><div class='add'>+			hdr-&gt;cw |=</div><div class='add'>+			    (OCRDMA_FLAG_SOLICIT &lt;&lt; OCRDMA_WQE_FLAGS_SHIFT);</div><div class='add'>+		hdr-&gt;total_len = 0;</div><div class='add'>+		switch (wr-&gt;opcode) {</div><div class='add'>+		case IB_WR_SEND_WITH_IMM:</div><div class='add'>+			hdr-&gt;cw |= (OCRDMA_FLAG_IMM &lt;&lt; OCRDMA_WQE_FLAGS_SHIFT);</div><div class='add'>+			hdr-&gt;immdt = ntohl(wr-&gt;ex.imm_data);</div><div class='add'>+		case IB_WR_SEND:</div><div class='add'>+			hdr-&gt;cw |= (OCRDMA_SEND &lt;&lt; OCRDMA_WQE_OPCODE_SHIFT);</div><div class='add'>+			ocrdma_build_send(qp, hdr, wr);</div><div class='add'>+			break;</div><div class='add'>+		case IB_WR_SEND_WITH_INV:</div><div class='add'>+			hdr-&gt;cw |= (OCRDMA_FLAG_INV &lt;&lt; OCRDMA_WQE_FLAGS_SHIFT);</div><div class='add'>+			hdr-&gt;cw |= (OCRDMA_SEND &lt;&lt; OCRDMA_WQE_OPCODE_SHIFT);</div><div class='add'>+			hdr-&gt;lkey = wr-&gt;ex.invalidate_rkey;</div><div class='add'>+			status = ocrdma_build_send(qp, hdr, wr);</div><div class='add'>+			break;</div><div class='add'>+		case IB_WR_RDMA_WRITE_WITH_IMM:</div><div class='add'>+			hdr-&gt;cw |= (OCRDMA_FLAG_IMM &lt;&lt; OCRDMA_WQE_FLAGS_SHIFT);</div><div class='add'>+			hdr-&gt;immdt = ntohl(wr-&gt;ex.imm_data);</div><div class='add'>+		case IB_WR_RDMA_WRITE:</div><div class='add'>+			hdr-&gt;cw |= (OCRDMA_WRITE &lt;&lt; OCRDMA_WQE_OPCODE_SHIFT);</div><div class='add'>+			status = ocrdma_build_write(qp, hdr, wr);</div><div class='add'>+			break;</div><div class='add'>+		case IB_WR_RDMA_READ_WITH_INV:</div><div class='add'>+			hdr-&gt;cw |= (OCRDMA_FLAG_INV &lt;&lt; OCRDMA_WQE_FLAGS_SHIFT);</div><div class='add'>+		case IB_WR_RDMA_READ:</div><div class='add'>+			ocrdma_build_read(qp, hdr, wr);</div><div class='add'>+			break;</div><div class='add'>+		case IB_WR_LOCAL_INV:</div><div class='add'>+			hdr-&gt;cw |=</div><div class='add'>+			    (OCRDMA_LKEY_INV &lt;&lt; OCRDMA_WQE_OPCODE_SHIFT);</div><div class='add'>+			hdr-&gt;cw |= (sizeof(struct ocrdma_hdr_wqe) /</div><div class='add'>+				OCRDMA_WQE_STRIDE) &lt;&lt; OCRDMA_WQE_SIZE_SHIFT;</div><div class='add'>+			hdr-&gt;lkey = wr-&gt;ex.invalidate_rkey;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (status) {</div><div class='add'>+			*bad_wr = wr;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (wr-&gt;send_flags &amp; IB_SEND_SIGNALED)</div><div class='add'>+			qp-&gt;wqe_wr_id_tbl[qp-&gt;sq.head].signaled = 1;</div><div class='add'>+		else</div><div class='add'>+			qp-&gt;wqe_wr_id_tbl[qp-&gt;sq.head].signaled = 0;</div><div class='add'>+		qp-&gt;wqe_wr_id_tbl[qp-&gt;sq.head].wrid = wr-&gt;wr_id;</div><div class='add'>+		ocrdma_cpu_to_le32(hdr, ((hdr-&gt;cw &gt;&gt; OCRDMA_WQE_SIZE_SHIFT) &amp;</div><div class='add'>+				   OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);</div><div class='add'>+		/* make sure wqe is written before adapter can access it */</div><div class='add'>+		wmb();</div><div class='add'>+		/* inform hw to start processing it */</div><div class='add'>+		ocrdma_ring_sq_db(qp);</div><div class='add'>+</div><div class='add'>+		/* update pointer, counter for next wr */</div><div class='add'>+		ocrdma_hwq_inc_head(&amp;qp-&gt;sq);</div><div class='add'>+		wr = wr-&gt;next;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;qp-&gt;q_lock, flags);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	u32 val = qp-&gt;rq.dbid | (1 &lt;&lt; OCRDMA_GET_NUM_POSTED_SHIFT_VAL(qp));</div><div class='add'>+</div><div class='add'>+	iowrite32(val, qp-&gt;rq_db);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr,</div><div class='add'>+			     u16 tag)</div><div class='add'>+{</div><div class='add'>+	u32 wqe_size = 0;</div><div class='add'>+	struct ocrdma_sge *sge;</div><div class='add'>+	if (wr-&gt;num_sge)</div><div class='add'>+		wqe_size = (wr-&gt;num_sge * sizeof(*sge)) + sizeof(*rqe);</div><div class='add'>+	else</div><div class='add'>+		wqe_size = sizeof(*sge) + sizeof(*rqe);</div><div class='add'>+</div><div class='add'>+	rqe-&gt;cw = ((wqe_size / OCRDMA_WQE_STRIDE) &lt;&lt;</div><div class='add'>+				OCRDMA_WQE_SIZE_SHIFT);</div><div class='add'>+	rqe-&gt;cw |= (OCRDMA_FLAG_SIG &lt;&lt; OCRDMA_WQE_FLAGS_SHIFT);</div><div class='add'>+	rqe-&gt;cw |= (OCRDMA_TYPE_LKEY &lt;&lt; OCRDMA_WQE_TYPE_SHIFT);</div><div class='add'>+	rqe-&gt;total_len = 0;</div><div class='add'>+	rqe-&gt;rsvd_tag = tag;</div><div class='add'>+	sge = (struct ocrdma_sge *)(rqe + 1);</div><div class='add'>+	ocrdma_build_sges(rqe, sge, wr-&gt;num_sge, wr-&gt;sg_list);</div><div class='add'>+	ocrdma_cpu_to_le32(rqe, wqe_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,</div><div class='add'>+		     struct ib_recv_wr **bad_wr)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);</div><div class='add'>+	struct ocrdma_hdr_wqe *rqe;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;qp-&gt;q_lock, flags);</div><div class='add'>+	if (qp-&gt;state == OCRDMA_QPS_RST || qp-&gt;state == OCRDMA_QPS_ERR) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;qp-&gt;q_lock, flags);</div><div class='add'>+		*bad_wr = wr;</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	while (wr) {</div><div class='add'>+		if (ocrdma_hwq_free_cnt(&amp;qp-&gt;rq) == 0 ||</div><div class='add'>+		    wr-&gt;num_sge &gt; qp-&gt;rq.max_sges) {</div><div class='add'>+			*bad_wr = wr;</div><div class='add'>+			status = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		rqe = ocrdma_hwq_head(&amp;qp-&gt;rq);</div><div class='add'>+		ocrdma_build_rqe(rqe, wr, 0);</div><div class='add'>+</div><div class='add'>+		qp-&gt;rqe_wr_id_tbl[qp-&gt;rq.head] = wr-&gt;wr_id;</div><div class='add'>+		/* make sure rqe is written before adapter can access it */</div><div class='add'>+		wmb();</div><div class='add'>+</div><div class='add'>+		/* inform hw to start processing it */</div><div class='add'>+		ocrdma_ring_rq_db(qp);</div><div class='add'>+</div><div class='add'>+		/* update pointer, counter for next wr */</div><div class='add'>+		ocrdma_hwq_inc_head(&amp;qp-&gt;rq);</div><div class='add'>+		wr = wr-&gt;next;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;qp-&gt;q_lock, flags);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* cqe for srq's rqe can potentially arrive out of order.</div><div class='add'>+ * index gives the entry in the shadow table where to store</div><div class='add'>+ * the wr_id. tag/index is returned in cqe to reference back</div><div class='add'>+ * for a given rqe.</div><div class='add'>+ */</div><div class='add'>+static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)</div><div class='add'>+{</div><div class='add'>+	int row = 0;</div><div class='add'>+	int indx = 0;</div><div class='add'>+</div><div class='add'>+	for (row = 0; row &lt; srq-&gt;bit_fields_len; row++) {</div><div class='add'>+		if (srq-&gt;idx_bit_fields[row]) {</div><div class='add'>+			indx = ffs(srq-&gt;idx_bit_fields[row]);</div><div class='add'>+			indx = (row * 32) + (indx - 1);</div><div class='add'>+			if (indx &gt;= srq-&gt;rq.max_cnt)</div><div class='add'>+				BUG();</div><div class='add'>+			ocrdma_srq_toggle_bit(srq, indx);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (row == srq-&gt;bit_fields_len)</div><div class='add'>+		BUG();</div><div class='add'>+	return indx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)</div><div class='add'>+{</div><div class='add'>+	u32 val = srq-&gt;rq.dbid | (1 &lt;&lt; 16);</div><div class='add'>+</div><div class='add'>+	iowrite32(val, srq-&gt;db + OCRDMA_DB_GEN2_SRQ_OFFSET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,</div><div class='add'>+			 struct ib_recv_wr **bad_wr)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ocrdma_srq *srq;</div><div class='add'>+	struct ocrdma_hdr_wqe *rqe;</div><div class='add'>+	u16 tag;</div><div class='add'>+</div><div class='add'>+	srq = get_ocrdma_srq(ibsrq);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;srq-&gt;q_lock, flags);</div><div class='add'>+	while (wr) {</div><div class='add'>+		if (ocrdma_hwq_free_cnt(&amp;srq-&gt;rq) == 0 ||</div><div class='add'>+		    wr-&gt;num_sge &gt; srq-&gt;rq.max_sges) {</div><div class='add'>+			status = -ENOMEM;</div><div class='add'>+			*bad_wr = wr;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		tag = ocrdma_srq_get_idx(srq);</div><div class='add'>+		rqe = ocrdma_hwq_head(&amp;srq-&gt;rq);</div><div class='add'>+		ocrdma_build_rqe(rqe, wr, tag);</div><div class='add'>+</div><div class='add'>+		srq-&gt;rqe_wr_id_tbl[tag] = wr-&gt;wr_id;</div><div class='add'>+		/* make sure rqe is written before adapter can perform DMA */</div><div class='add'>+		wmb();</div><div class='add'>+		/* inform hw to start processing it */</div><div class='add'>+		ocrdma_ring_srq_db(srq);</div><div class='add'>+		/* update pointer, counter for next wr */</div><div class='add'>+		ocrdma_hwq_inc_head(&amp;srq-&gt;rq);</div><div class='add'>+		wr = wr-&gt;next;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;srq-&gt;q_lock, flags);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)</div><div class='add'>+{</div><div class='add'>+	enum ib_wc_status ibwc_status = IB_WC_GENERAL_ERR;</div><div class='add'>+</div><div class='add'>+	switch (status) {</div><div class='add'>+	case OCRDMA_CQE_GENERAL_ERR:</div><div class='add'>+		ibwc_status = IB_WC_GENERAL_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_LOC_LEN_ERR:</div><div class='add'>+		ibwc_status = IB_WC_LOC_LEN_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_LOC_QP_OP_ERR:</div><div class='add'>+		ibwc_status = IB_WC_LOC_QP_OP_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_LOC_EEC_OP_ERR:</div><div class='add'>+		ibwc_status = IB_WC_LOC_EEC_OP_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_LOC_PROT_ERR:</div><div class='add'>+		ibwc_status = IB_WC_LOC_PROT_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_WR_FLUSH_ERR:</div><div class='add'>+		ibwc_status = IB_WC_WR_FLUSH_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_MW_BIND_ERR:</div><div class='add'>+		ibwc_status = IB_WC_MW_BIND_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_BAD_RESP_ERR:</div><div class='add'>+		ibwc_status = IB_WC_BAD_RESP_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_LOC_ACCESS_ERR:</div><div class='add'>+		ibwc_status = IB_WC_LOC_ACCESS_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_REM_INV_REQ_ERR:</div><div class='add'>+		ibwc_status = IB_WC_REM_INV_REQ_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_REM_ACCESS_ERR:</div><div class='add'>+		ibwc_status = IB_WC_REM_ACCESS_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_REM_OP_ERR:</div><div class='add'>+		ibwc_status = IB_WC_REM_OP_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_RETRY_EXC_ERR:</div><div class='add'>+		ibwc_status = IB_WC_RETRY_EXC_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_RNR_RETRY_EXC_ERR:</div><div class='add'>+		ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_LOC_RDD_VIOL_ERR:</div><div class='add'>+		ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_REM_INV_RD_REQ_ERR:</div><div class='add'>+		ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_REM_ABORT_ERR:</div><div class='add'>+		ibwc_status = IB_WC_REM_ABORT_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_INV_EECN_ERR:</div><div class='add'>+		ibwc_status = IB_WC_INV_EECN_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_INV_EEC_STATE_ERR:</div><div class='add'>+		ibwc_status = IB_WC_INV_EEC_STATE_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_FATAL_ERR:</div><div class='add'>+		ibwc_status = IB_WC_FATAL_ERR;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_CQE_RESP_TIMEOUT_ERR:</div><div class='add'>+		ibwc_status = IB_WC_RESP_TIMEOUT_ERR;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ibwc_status = IB_WC_GENERAL_ERR;</div><div class='add'>+		break;</div><div class='add'>+	};</div><div class='add'>+	return ibwc_status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,</div><div class='add'>+		      u32 wqe_idx)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_hdr_wqe *hdr;</div><div class='add'>+	struct ocrdma_sge *rw;</div><div class='add'>+	int opcode;</div><div class='add'>+</div><div class='add'>+	hdr = ocrdma_hwq_head_from_idx(&amp;qp-&gt;sq, wqe_idx);</div><div class='add'>+</div><div class='add'>+	ibwc-&gt;wr_id = qp-&gt;wqe_wr_id_tbl[wqe_idx].wrid;</div><div class='add'>+	/* Undo the hdr-&gt;cw swap */</div><div class='add'>+	opcode = le32_to_cpu(hdr-&gt;cw) &amp; OCRDMA_WQE_OPCODE_MASK;</div><div class='add'>+	switch (opcode) {</div><div class='add'>+	case OCRDMA_WRITE:</div><div class='add'>+		ibwc-&gt;opcode = IB_WC_RDMA_WRITE;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_READ:</div><div class='add'>+		rw = (struct ocrdma_sge *)(hdr + 1);</div><div class='add'>+		ibwc-&gt;opcode = IB_WC_RDMA_READ;</div><div class='add'>+		ibwc-&gt;byte_len = rw-&gt;len;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_SEND:</div><div class='add'>+		ibwc-&gt;opcode = IB_WC_SEND;</div><div class='add'>+		break;</div><div class='add'>+	case OCRDMA_LKEY_INV:</div><div class='add'>+		ibwc-&gt;opcode = IB_WC_LOCAL_INV;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ibwc-&gt;status = IB_WC_GENERAL_ERR;</div><div class='add'>+		ocrdma_err("%s() invalid opcode received = 0x%x\n",</div><div class='add'>+			   __func__, hdr-&gt;cw &amp; OCRDMA_WQE_OPCODE_MASK);</div><div class='add'>+		break;</div><div class='add'>+	};</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,</div><div class='add'>+						struct ocrdma_cqe *cqe)</div><div class='add'>+{</div><div class='add'>+	if (is_cqe_for_sq(cqe)) {</div><div class='add'>+		cqe-&gt;flags_status_srcqpn = cpu_to_le32(le32_to_cpu(</div><div class='add'>+				cqe-&gt;flags_status_srcqpn) &amp;</div><div class='add'>+					~OCRDMA_CQE_STATUS_MASK);</div><div class='add'>+		cqe-&gt;flags_status_srcqpn = cpu_to_le32(le32_to_cpu(</div><div class='add'>+				cqe-&gt;flags_status_srcqpn) |</div><div class='add'>+				(OCRDMA_CQE_WR_FLUSH_ERR &lt;&lt;</div><div class='add'>+					OCRDMA_CQE_STATUS_SHIFT));</div><div class='add'>+	} else {</div><div class='add'>+		if (qp-&gt;qp_type == IB_QPT_UD || qp-&gt;qp_type == IB_QPT_GSI) {</div><div class='add'>+			cqe-&gt;flags_status_srcqpn = cpu_to_le32(le32_to_cpu(</div><div class='add'>+					cqe-&gt;flags_status_srcqpn) &amp;</div><div class='add'>+						~OCRDMA_CQE_UD_STATUS_MASK);</div><div class='add'>+			cqe-&gt;flags_status_srcqpn = cpu_to_le32(le32_to_cpu(</div><div class='add'>+					cqe-&gt;flags_status_srcqpn) |</div><div class='add'>+					(OCRDMA_CQE_WR_FLUSH_ERR &lt;&lt;</div><div class='add'>+						OCRDMA_CQE_UD_STATUS_SHIFT));</div><div class='add'>+		} else {</div><div class='add'>+			cqe-&gt;flags_status_srcqpn = cpu_to_le32(le32_to_cpu(</div><div class='add'>+					cqe-&gt;flags_status_srcqpn) &amp;</div><div class='add'>+						~OCRDMA_CQE_STATUS_MASK);</div><div class='add'>+			cqe-&gt;flags_status_srcqpn = cpu_to_le32(le32_to_cpu(</div><div class='add'>+					cqe-&gt;flags_status_srcqpn) |</div><div class='add'>+					(OCRDMA_CQE_WR_FLUSH_ERR &lt;&lt;</div><div class='add'>+						OCRDMA_CQE_STATUS_SHIFT));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,</div><div class='add'>+				  struct ocrdma_qp *qp, int status)</div><div class='add'>+{</div><div class='add'>+	bool expand = false;</div><div class='add'>+</div><div class='add'>+	ibwc-&gt;byte_len = 0;</div><div class='add'>+	ibwc-&gt;qp = &amp;qp-&gt;ibqp;</div><div class='add'>+	ibwc-&gt;status = ocrdma_to_ibwc_err(status);</div><div class='add'>+</div><div class='add'>+	ocrdma_flush_qp(qp);</div><div class='add'>+	ocrdma_qp_state_machine(qp, IB_QPS_ERR, NULL);</div><div class='add'>+</div><div class='add'>+	/* if wqe/rqe pending for which cqe needs to be returned,</div><div class='add'>+	 * trigger inflating it.</div><div class='add'>+	 */</div><div class='add'>+	if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {</div><div class='add'>+		expand = true;</div><div class='add'>+		ocrdma_set_cqe_status_flushed(qp, cqe);</div><div class='add'>+	}</div><div class='add'>+	return expand;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,</div><div class='add'>+				  struct ocrdma_qp *qp, int status)</div><div class='add'>+{</div><div class='add'>+	ibwc-&gt;opcode = IB_WC_RECV;</div><div class='add'>+	ibwc-&gt;wr_id = qp-&gt;rqe_wr_id_tbl[qp-&gt;rq.tail];</div><div class='add'>+	ocrdma_hwq_inc_tail(&amp;qp-&gt;rq);</div><div class='add'>+</div><div class='add'>+	return ocrdma_update_err_cqe(ibwc, cqe, qp, status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,</div><div class='add'>+				  struct ocrdma_qp *qp, int status)</div><div class='add'>+{</div><div class='add'>+	ocrdma_update_wc(qp, ibwc, qp-&gt;sq.tail);</div><div class='add'>+	ocrdma_hwq_inc_tail(&amp;qp-&gt;sq);</div><div class='add'>+</div><div class='add'>+	return ocrdma_update_err_cqe(ibwc, cqe, qp, status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,</div><div class='add'>+				 struct ocrdma_cqe *cqe, struct ib_wc *ibwc,</div><div class='add'>+				 bool *polled, bool *stop)</div><div class='add'>+{</div><div class='add'>+	bool expand;</div><div class='add'>+	int status = (le32_to_cpu(cqe-&gt;flags_status_srcqpn) &amp;</div><div class='add'>+		OCRDMA_CQE_STATUS_MASK) &gt;&gt; OCRDMA_CQE_STATUS_SHIFT;</div><div class='add'>+</div><div class='add'>+	/* when hw sq is empty, but rq is not empty, so we continue</div><div class='add'>+	 * to keep the cqe in order to get the cq event again.</div><div class='add'>+	 */</div><div class='add'>+	if (is_hw_sq_empty(qp) &amp;&amp; !is_hw_rq_empty(qp)) {</div><div class='add'>+		/* when cq for rq and sq is same, it is safe to return</div><div class='add'>+		 * flush cqe for RQEs.</div><div class='add'>+		 */</div><div class='add'>+		if (!qp-&gt;srq &amp;&amp; (qp-&gt;sq_cq == qp-&gt;rq_cq)) {</div><div class='add'>+			*polled = true;</div><div class='add'>+			status = OCRDMA_CQE_WR_FLUSH_ERR;</div><div class='add'>+			expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);</div><div class='add'>+		} else {</div><div class='add'>+			/* stop processing further cqe as this cqe is used for</div><div class='add'>+			 * triggering cq event on buddy cq of RQ.</div><div class='add'>+			 * When QP is destroyed, this cqe will be removed</div><div class='add'>+			 * from the cq's hardware q.</div><div class='add'>+			 */</div><div class='add'>+			*polled = false;</div><div class='add'>+			*stop = true;</div><div class='add'>+			expand = false;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		*polled = true;</div><div class='add'>+		expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);</div><div class='add'>+	}</div><div class='add'>+	return expand;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,</div><div class='add'>+				     struct ocrdma_cqe *cqe,</div><div class='add'>+				     struct ib_wc *ibwc, bool *polled)</div><div class='add'>+{</div><div class='add'>+	bool expand = false;</div><div class='add'>+	int tail = qp-&gt;sq.tail;</div><div class='add'>+	u32 wqe_idx;</div><div class='add'>+</div><div class='add'>+	if (!qp-&gt;wqe_wr_id_tbl[tail].signaled) {</div><div class='add'>+		expand = true;	/* CQE cannot be consumed yet */</div><div class='add'>+		*polled = false;    /* WC cannot be consumed yet */</div><div class='add'>+	} else {</div><div class='add'>+		ibwc-&gt;status = IB_WC_SUCCESS;</div><div class='add'>+		ibwc-&gt;wc_flags = 0;</div><div class='add'>+		ibwc-&gt;qp = &amp;qp-&gt;ibqp;</div><div class='add'>+		ocrdma_update_wc(qp, ibwc, tail);</div><div class='add'>+		*polled = true;</div><div class='add'>+		wqe_idx = le32_to_cpu(cqe-&gt;wq.wqeidx) &amp;	OCRDMA_CQE_WQEIDX_MASK;</div><div class='add'>+		if (tail != wqe_idx)</div><div class='add'>+			expand = true; /* Coalesced CQE can't be consumed yet */</div><div class='add'>+	}</div><div class='add'>+	ocrdma_hwq_inc_tail(&amp;qp-&gt;sq);</div><div class='add'>+	return expand;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,</div><div class='add'>+			     struct ib_wc *ibwc, bool *polled, bool *stop)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	bool expand;</div><div class='add'>+</div><div class='add'>+	status = (le32_to_cpu(cqe-&gt;flags_status_srcqpn) &amp;</div><div class='add'>+		OCRDMA_CQE_STATUS_MASK) &gt;&gt; OCRDMA_CQE_STATUS_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (status == OCRDMA_CQE_SUCCESS)</div><div class='add'>+		expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);</div><div class='add'>+	else</div><div class='add'>+		expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);</div><div class='add'>+	return expand;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_update_ud_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	status = (le32_to_cpu(cqe-&gt;flags_status_srcqpn) &amp;</div><div class='add'>+		OCRDMA_CQE_UD_STATUS_MASK) &gt;&gt; OCRDMA_CQE_UD_STATUS_SHIFT;</div><div class='add'>+	ibwc-&gt;src_qp = le32_to_cpu(cqe-&gt;flags_status_srcqpn) &amp;</div><div class='add'>+						OCRDMA_CQE_SRCQP_MASK;</div><div class='add'>+	ibwc-&gt;pkey_index = le32_to_cpu(cqe-&gt;ud.rxlen_pkey) &amp;</div><div class='add'>+						OCRDMA_CQE_PKEY_MASK;</div><div class='add'>+	ibwc-&gt;wc_flags = IB_WC_GRH;</div><div class='add'>+	ibwc-&gt;byte_len = (le32_to_cpu(cqe-&gt;ud.rxlen_pkey) &gt;&gt;</div><div class='add'>+					OCRDMA_CQE_UD_XFER_LEN_SHIFT);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,</div><div class='add'>+				       struct ocrdma_cqe *cqe,</div><div class='add'>+				       struct ocrdma_qp *qp)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ocrdma_srq *srq;</div><div class='add'>+	u32 wqe_idx;</div><div class='add'>+</div><div class='add'>+	srq = get_ocrdma_srq(qp-&gt;ibqp.srq);</div><div class='add'>+	wqe_idx = le32_to_cpu(cqe-&gt;rq.buftag_qpn) &gt;&gt; OCRDMA_CQE_BUFTAG_SHIFT;</div><div class='add'>+	ibwc-&gt;wr_id = srq-&gt;rqe_wr_id_tbl[wqe_idx];</div><div class='add'>+	spin_lock_irqsave(&amp;srq-&gt;q_lock, flags);</div><div class='add'>+	ocrdma_srq_toggle_bit(srq, wqe_idx);</div><div class='add'>+	spin_unlock_irqrestore(&amp;srq-&gt;q_lock, flags);</div><div class='add'>+	ocrdma_hwq_inc_tail(&amp;srq-&gt;rq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,</div><div class='add'>+				struct ib_wc *ibwc, bool *polled, bool *stop,</div><div class='add'>+				int status)</div><div class='add'>+{</div><div class='add'>+	bool expand;</div><div class='add'>+</div><div class='add'>+	/* when hw_rq is empty, but wq is not empty, so continue</div><div class='add'>+	 * to keep the cqe to get the cq event again.</div><div class='add'>+	 */</div><div class='add'>+	if (is_hw_rq_empty(qp) &amp;&amp; !is_hw_sq_empty(qp)) {</div><div class='add'>+		if (!qp-&gt;srq &amp;&amp; (qp-&gt;sq_cq == qp-&gt;rq_cq)) {</div><div class='add'>+			*polled = true;</div><div class='add'>+			status = OCRDMA_CQE_WR_FLUSH_ERR;</div><div class='add'>+			expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);</div><div class='add'>+		} else {</div><div class='add'>+			*polled = false;</div><div class='add'>+			*stop = true;</div><div class='add'>+			expand = false;</div><div class='add'>+		}</div><div class='add'>+	} else</div><div class='add'>+		expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);</div><div class='add'>+	return expand;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,</div><div class='add'>+				     struct ocrdma_cqe *cqe, struct ib_wc *ibwc)</div><div class='add'>+{</div><div class='add'>+	ibwc-&gt;opcode = IB_WC_RECV;</div><div class='add'>+	ibwc-&gt;qp = &amp;qp-&gt;ibqp;</div><div class='add'>+	ibwc-&gt;status = IB_WC_SUCCESS;</div><div class='add'>+</div><div class='add'>+	if (qp-&gt;qp_type == IB_QPT_UD || qp-&gt;qp_type == IB_QPT_GSI)</div><div class='add'>+		ocrdma_update_ud_rcqe(ibwc, cqe);</div><div class='add'>+	else</div><div class='add'>+		ibwc-&gt;byte_len = le32_to_cpu(cqe-&gt;rq.rxlen);</div><div class='add'>+</div><div class='add'>+	if (is_cqe_imm(cqe)) {</div><div class='add'>+		ibwc-&gt;ex.imm_data = htonl(le32_to_cpu(cqe-&gt;rq.lkey_immdt));</div><div class='add'>+		ibwc-&gt;wc_flags |= IB_WC_WITH_IMM;</div><div class='add'>+	} else if (is_cqe_wr_imm(cqe)) {</div><div class='add'>+		ibwc-&gt;opcode = IB_WC_RECV_RDMA_WITH_IMM;</div><div class='add'>+		ibwc-&gt;ex.imm_data = htonl(le32_to_cpu(cqe-&gt;rq.lkey_immdt));</div><div class='add'>+		ibwc-&gt;wc_flags |= IB_WC_WITH_IMM;</div><div class='add'>+	} else if (is_cqe_invalidated(cqe)) {</div><div class='add'>+		ibwc-&gt;ex.invalidate_rkey = le32_to_cpu(cqe-&gt;rq.lkey_immdt);</div><div class='add'>+		ibwc-&gt;wc_flags |= IB_WC_WITH_INVALIDATE;</div><div class='add'>+	}</div><div class='add'>+	if (qp-&gt;ibqp.srq)</div><div class='add'>+		ocrdma_update_free_srq_cqe(ibwc, cqe, qp);</div><div class='add'>+	else {</div><div class='add'>+		ibwc-&gt;wr_id = qp-&gt;rqe_wr_id_tbl[qp-&gt;rq.tail];</div><div class='add'>+		ocrdma_hwq_inc_tail(&amp;qp-&gt;rq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,</div><div class='add'>+			     struct ib_wc *ibwc, bool *polled, bool *stop)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	bool expand = false;</div><div class='add'>+</div><div class='add'>+	ibwc-&gt;wc_flags = 0;</div><div class='add'>+	if (qp-&gt;qp_type == IB_QPT_UD || qp-&gt;qp_type == IB_QPT_GSI)</div><div class='add'>+		status = (le32_to_cpu(cqe-&gt;flags_status_srcqpn) &amp;</div><div class='add'>+					OCRDMA_CQE_UD_STATUS_MASK) &gt;&gt;</div><div class='add'>+					OCRDMA_CQE_UD_STATUS_SHIFT;</div><div class='add'>+	else</div><div class='add'>+		status = (le32_to_cpu(cqe-&gt;flags_status_srcqpn) &amp;</div><div class='add'>+			     OCRDMA_CQE_STATUS_MASK) &gt;&gt; OCRDMA_CQE_STATUS_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (status == OCRDMA_CQE_SUCCESS) {</div><div class='add'>+		*polled = true;</div><div class='add'>+		ocrdma_poll_success_rcqe(qp, cqe, ibwc);</div><div class='add'>+	} else {</div><div class='add'>+		expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,</div><div class='add'>+					      status);</div><div class='add'>+	}</div><div class='add'>+	return expand;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,</div><div class='add'>+				   u16 cur_getp)</div><div class='add'>+{</div><div class='add'>+	if (cq-&gt;phase_change) {</div><div class='add'>+		if (cur_getp == 0)</div><div class='add'>+			cq-&gt;phase = (~cq-&gt;phase &amp; OCRDMA_CQE_VALID);</div><div class='add'>+	} else</div><div class='add'>+		/* clear valid bit */</div><div class='add'>+		cqe-&gt;flags_status_srcqpn = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,</div><div class='add'>+			    struct ib_wc *ibwc)</div><div class='add'>+{</div><div class='add'>+	u16 qpn = 0;</div><div class='add'>+	int i = 0;</div><div class='add'>+	bool expand = false;</div><div class='add'>+	int polled_hw_cqes = 0;</div><div class='add'>+	struct ocrdma_qp *qp = NULL;</div><div class='add'>+	struct ocrdma_dev *dev = cq-&gt;dev;</div><div class='add'>+	struct ocrdma_cqe *cqe;</div><div class='add'>+	u16 cur_getp; bool polled = false; bool stop = false;</div><div class='add'>+</div><div class='add'>+	cur_getp = cq-&gt;getp;</div><div class='add'>+	while (num_entries) {</div><div class='add'>+		cqe = cq-&gt;va + cur_getp;</div><div class='add'>+		/* check whether valid cqe or not */</div><div class='add'>+		if (!is_cqe_valid(cq, cqe))</div><div class='add'>+			break;</div><div class='add'>+		qpn = (le32_to_cpu(cqe-&gt;cmn.qpn) &amp; OCRDMA_CQE_QPN_MASK);</div><div class='add'>+		/* ignore discarded cqe */</div><div class='add'>+		if (qpn == 0)</div><div class='add'>+			goto skip_cqe;</div><div class='add'>+		qp = dev-&gt;qp_tbl[qpn];</div><div class='add'>+		BUG_ON(qp == NULL);</div><div class='add'>+</div><div class='add'>+		if (is_cqe_for_sq(cqe)) {</div><div class='add'>+			expand = ocrdma_poll_scqe(qp, cqe, ibwc, &amp;polled,</div><div class='add'>+						  &amp;stop);</div><div class='add'>+		} else {</div><div class='add'>+			expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &amp;polled,</div><div class='add'>+						  &amp;stop);</div><div class='add'>+		}</div><div class='add'>+		if (expand)</div><div class='add'>+			goto expand_cqe;</div><div class='add'>+		if (stop)</div><div class='add'>+			goto stop_cqe;</div><div class='add'>+		/* clear qpn to avoid duplicate processing by discard_cqe() */</div><div class='add'>+		cqe-&gt;cmn.qpn = 0;</div><div class='add'>+skip_cqe:</div><div class='add'>+		polled_hw_cqes += 1;</div><div class='add'>+		cur_getp = (cur_getp + 1) % cq-&gt;max_hw_cqe;</div><div class='add'>+		ocrdma_change_cq_phase(cq, cqe, cur_getp);</div><div class='add'>+expand_cqe:</div><div class='add'>+		if (polled) {</div><div class='add'>+			num_entries -= 1;</div><div class='add'>+			i += 1;</div><div class='add'>+			ibwc = ibwc + 1;</div><div class='add'>+			polled = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+stop_cqe:</div><div class='add'>+	cq-&gt;getp = cur_getp;</div><div class='add'>+	if (polled_hw_cqes || expand || stop) {</div><div class='add'>+		ocrdma_ring_cq_db(dev, cq-&gt;id, cq-&gt;armed, cq-&gt;solicited,</div><div class='add'>+				  polled_hw_cqes);</div><div class='add'>+	}</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */</div><div class='add'>+static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,</div><div class='add'>+			      struct ocrdma_qp *qp, struct ib_wc *ibwc)</div><div class='add'>+{</div><div class='add'>+	int err_cqes = 0;</div><div class='add'>+</div><div class='add'>+	while (num_entries) {</div><div class='add'>+		if (is_hw_sq_empty(qp) &amp;&amp; is_hw_rq_empty(qp))</div><div class='add'>+			break;</div><div class='add'>+		if (!is_hw_sq_empty(qp) &amp;&amp; qp-&gt;sq_cq == cq) {</div><div class='add'>+			ocrdma_update_wc(qp, ibwc, qp-&gt;sq.tail);</div><div class='add'>+			ocrdma_hwq_inc_tail(&amp;qp-&gt;sq);</div><div class='add'>+		} else if (!is_hw_rq_empty(qp) &amp;&amp; qp-&gt;rq_cq == cq) {</div><div class='add'>+			ibwc-&gt;wr_id = qp-&gt;rqe_wr_id_tbl[qp-&gt;rq.tail];</div><div class='add'>+			ocrdma_hwq_inc_tail(&amp;qp-&gt;rq);</div><div class='add'>+		} else</div><div class='add'>+			return err_cqes;</div><div class='add'>+		ibwc-&gt;byte_len = 0;</div><div class='add'>+		ibwc-&gt;status = IB_WC_WR_FLUSH_ERR;</div><div class='add'>+		ibwc = ibwc + 1;</div><div class='add'>+		err_cqes += 1;</div><div class='add'>+		num_entries -= 1;</div><div class='add'>+	}</div><div class='add'>+	return err_cqes;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)</div><div class='add'>+{</div><div class='add'>+	int cqes_to_poll = num_entries;</div><div class='add'>+	struct ocrdma_cq *cq = NULL;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	int num_os_cqe = 0, err_cqes = 0;</div><div class='add'>+	struct ocrdma_qp *qp;</div><div class='add'>+</div><div class='add'>+	cq = get_ocrdma_cq(ibcq);</div><div class='add'>+	dev = cq-&gt;dev;</div><div class='add'>+</div><div class='add'>+	/* poll cqes from adapter CQ */</div><div class='add'>+	spin_lock_irqsave(&amp;cq-&gt;cq_lock, flags);</div><div class='add'>+	num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);</div><div class='add'>+	spin_unlock_irqrestore(&amp;cq-&gt;cq_lock, flags);</div><div class='add'>+	cqes_to_poll -= num_os_cqe;</div><div class='add'>+</div><div class='add'>+	if (cqes_to_poll) {</div><div class='add'>+		wc = wc + num_os_cqe;</div><div class='add'>+		/* adapter returns single error cqe when qp moves to</div><div class='add'>+		 * error state. So insert error cqes with wc_status as</div><div class='add'>+		 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ</div><div class='add'>+		 * respectively which uses this CQ.</div><div class='add'>+		 */</div><div class='add'>+		spin_lock_irqsave(&amp;dev-&gt;flush_q_lock, flags);</div><div class='add'>+		list_for_each_entry(qp, &amp;cq-&gt;sq_head, sq_entry) {</div><div class='add'>+			if (cqes_to_poll == 0)</div><div class='add'>+				break;</div><div class='add'>+			err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);</div><div class='add'>+			cqes_to_poll -= err_cqes;</div><div class='add'>+			num_os_cqe += err_cqes;</div><div class='add'>+			wc = wc + err_cqes;</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;dev-&gt;flush_q_lock, flags);</div><div class='add'>+	}</div><div class='add'>+	return num_os_cqe;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)</div><div class='add'>+{</div><div class='add'>+	struct ocrdma_cq *cq;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ocrdma_dev *dev;</div><div class='add'>+	u16 cq_id;</div><div class='add'>+	u16 cur_getp;</div><div class='add'>+	struct ocrdma_cqe *cqe;</div><div class='add'>+</div><div class='add'>+	cq = get_ocrdma_cq(ibcq);</div><div class='add'>+	cq_id = cq-&gt;id;</div><div class='add'>+	dev = cq-&gt;dev;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;cq-&gt;cq_lock, flags);</div><div class='add'>+	if (cq_flags &amp; IB_CQ_NEXT_COMP || cq_flags &amp; IB_CQ_SOLICITED)</div><div class='add'>+		cq-&gt;armed = true;</div><div class='add'>+	if (cq_flags &amp; IB_CQ_SOLICITED)</div><div class='add'>+		cq-&gt;solicited = true;</div><div class='add'>+</div><div class='add'>+	cur_getp = cq-&gt;getp;</div><div class='add'>+	cqe = cq-&gt;va + cur_getp;</div><div class='add'>+</div><div class='add'>+	/* check whether any valid cqe exist or not, if not then safe to</div><div class='add'>+	 * arm. If cqe is not yet consumed, then let it get consumed and then</div><div class='add'>+	 * we arm it to avoid false interrupts.</div><div class='add'>+	 */</div><div class='add'>+	if (!is_cqe_valid(cq, cqe) || cq-&gt;arm_needed) {</div><div class='add'>+		cq-&gt;arm_needed = false;</div><div class='add'>+		ocrdma_ring_cq_db(dev, cq_id, cq-&gt;armed, cq-&gt;solicited, 0);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;cq-&gt;cq_lock, flags);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_verbs.h b/drivers/infiniband/hw/ocrdma/ocrdma_verbs.h<br/>new file mode 100644<br/>index 000000000000..633f03d80274<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/ocrdma/ocrdma_verbs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/ocrdma/ocrdma_verbs.h</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+/*******************************************************************</div><div class='add'>+ * This file is part of the Emulex RoCE Device Driver for          *</div><div class='add'>+ * RoCE (RDMA over Converged Ethernet) adapters.                   *</div><div class='add'>+ * Copyright (C) 2008-2012 Emulex. All rights reserved.            *</div><div class='add'>+ * EMULEX and SLI are trademarks of Emulex.                        *</div><div class='add'>+ * www.emulex.com                                                  *</div><div class='add'>+ *                                                                 *</div><div class='add'>+ * This program is free software; you can redistribute it and/or   *</div><div class='add'>+ * modify it under the terms of version 2 of the GNU General       *</div><div class='add'>+ * Public License as published by the Free Software Foundation.    *</div><div class='add'>+ * This program is distributed in the hope that it will be useful. *</div><div class='add'>+ * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *</div><div class='add'>+ * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *</div><div class='add'>+ * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *</div><div class='add'>+ * TO BE LEGALLY INVALID.  See the GNU General Public License for  *</div><div class='add'>+ * more details, a copy of which can be found in the file COPYING  *</div><div class='add'>+ * included with this package.                                     *</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ * linux-drivers@emulex.com</div><div class='add'>+ *</div><div class='add'>+ * Emulex</div><div class='add'>+ * 3333 Susan Street</div><div class='add'>+ * Costa Mesa, CA 92626</div><div class='add'>+ *******************************************************************/</div><div class='add'>+</div><div class='add'>+#ifndef __OCRDMA_VERBS_H__</div><div class='add'>+#define __OCRDMA_VERBS_H__</div><div class='add'>+</div><div class='add'>+int ocrdma_post_send(struct ib_qp *, struct ib_send_wr *,</div><div class='add'>+		     struct ib_send_wr **bad_wr);</div><div class='add'>+int ocrdma_post_recv(struct ib_qp *, struct ib_recv_wr *,</div><div class='add'>+		     struct ib_recv_wr **bad_wr);</div><div class='add'>+</div><div class='add'>+int ocrdma_poll_cq(struct ib_cq *, int num_entries, struct ib_wc *wc);</div><div class='add'>+int ocrdma_arm_cq(struct ib_cq *, enum ib_cq_notify_flags flags);</div><div class='add'>+</div><div class='add'>+int ocrdma_query_device(struct ib_device *, struct ib_device_attr *props);</div><div class='add'>+int ocrdma_query_port(struct ib_device *, u8 port, struct ib_port_attr *props);</div><div class='add'>+int ocrdma_modify_port(struct ib_device *, u8 port, int mask,</div><div class='add'>+		       struct ib_port_modify *props);</div><div class='add'>+</div><div class='add'>+void ocrdma_get_guid(struct ocrdma_dev *, u8 *guid);</div><div class='add'>+int ocrdma_query_gid(struct ib_device *, u8 port,</div><div class='add'>+		     int index, union ib_gid *gid);</div><div class='add'>+int ocrdma_query_pkey(struct ib_device *, u8 port, u16 index, u16 *pkey);</div><div class='add'>+</div><div class='add'>+struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *,</div><div class='add'>+					  struct ib_udata *);</div><div class='add'>+int ocrdma_dealloc_ucontext(struct ib_ucontext *);</div><div class='add'>+</div><div class='add'>+int ocrdma_mmap(struct ib_ucontext *, struct vm_area_struct *vma);</div><div class='add'>+</div><div class='add'>+struct ib_pd *ocrdma_alloc_pd(struct ib_device *,</div><div class='add'>+			      struct ib_ucontext *, struct ib_udata *);</div><div class='add'>+int ocrdma_dealloc_pd(struct ib_pd *pd);</div><div class='add'>+</div><div class='add'>+struct ib_cq *ocrdma_create_cq(struct ib_device *, int entries, int vector,</div><div class='add'>+			       struct ib_ucontext *, struct ib_udata *);</div><div class='add'>+int ocrdma_resize_cq(struct ib_cq *, int cqe, struct ib_udata *);</div><div class='add'>+int ocrdma_destroy_cq(struct ib_cq *);</div><div class='add'>+</div><div class='add'>+struct ib_qp *ocrdma_create_qp(struct ib_pd *,</div><div class='add'>+			       struct ib_qp_init_attr *attrs,</div><div class='add'>+			       struct ib_udata *);</div><div class='add'>+int _ocrdma_modify_qp(struct ib_qp *, struct ib_qp_attr *attr,</div><div class='add'>+		      int attr_mask);</div><div class='add'>+int ocrdma_modify_qp(struct ib_qp *, struct ib_qp_attr *attr,</div><div class='add'>+		     int attr_mask, struct ib_udata *udata);</div><div class='add'>+int ocrdma_query_qp(struct ib_qp *,</div><div class='add'>+		    struct ib_qp_attr *qp_attr,</div><div class='add'>+		    int qp_attr_mask, struct ib_qp_init_attr *);</div><div class='add'>+int ocrdma_destroy_qp(struct ib_qp *);</div><div class='add'>+</div><div class='add'>+struct ib_srq *ocrdma_create_srq(struct ib_pd *, struct ib_srq_init_attr *,</div><div class='add'>+				 struct ib_udata *);</div><div class='add'>+int ocrdma_modify_srq(struct ib_srq *, struct ib_srq_attr *,</div><div class='add'>+		      enum ib_srq_attr_mask, struct ib_udata *);</div><div class='add'>+int ocrdma_query_srq(struct ib_srq *, struct ib_srq_attr *);</div><div class='add'>+int ocrdma_destroy_srq(struct ib_srq *);</div><div class='add'>+int ocrdma_post_srq_recv(struct ib_srq *, struct ib_recv_wr *,</div><div class='add'>+			 struct ib_recv_wr **bad_recv_wr);</div><div class='add'>+</div><div class='add'>+int ocrdma_dereg_mr(struct ib_mr *);</div><div class='add'>+struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *, int acc);</div><div class='add'>+struct ib_mr *ocrdma_reg_kernel_mr(struct ib_pd *,</div><div class='add'>+				   struct ib_phys_buf *buffer_list,</div><div class='add'>+				   int num_phys_buf, int acc, u64 *iova_start);</div><div class='add'>+struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *, u64 start, u64 length,</div><div class='add'>+				 u64 virt, int acc, struct ib_udata *);</div><div class='add'>+</div><div class='add'>+#endif				/* __OCRDMA_VERBS_H__ */</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib.h b/drivers/infiniband/hw/qib/qib.h<br/>index 6b811e3e8bd1..7e62f4137148 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib.h</a></div><div class='hunk'>@@ -530,8 +530,6 @@ struct qib_pportdata {</div><div class='ctx'> 	/* qib_lflags driver is waiting for */</div><div class='ctx'> 	u32 state_wanted;</div><div class='ctx'> 	spinlock_t lflags_lock;</div><div class='del'>-	/* number of (port-specific) interrupts for this port -- saturates... */</div><div class='del'>-	u32 int_counter;</div><div class='ctx'> </div><div class='ctx'> 	/* ref count for each pkey */</div><div class='ctx'> 	atomic_t pkeyrefs[4];</div><div class='hunk'>@@ -543,24 +541,26 @@ struct qib_pportdata {</div><div class='ctx'> 	u64 *statusp;</div><div class='ctx'> </div><div class='ctx'> 	/* SendDMA related entries */</div><div class='del'>-	spinlock_t            sdma_lock;</div><div class='del'>-	struct qib_sdma_state sdma_state;</div><div class='del'>-	unsigned long         sdma_buf_jiffies;</div><div class='add'>+</div><div class='add'>+	/* read mostly */</div><div class='ctx'> 	struct qib_sdma_desc *sdma_descq;</div><div class='add'>+	struct qib_sdma_state sdma_state;</div><div class='add'>+	dma_addr_t       sdma_descq_phys;</div><div class='add'>+	volatile __le64 *sdma_head_dma; /* DMA'ed by chip */</div><div class='add'>+	dma_addr_t       sdma_head_phys;</div><div class='add'>+	u16                   sdma_descq_cnt;</div><div class='add'>+</div><div class='add'>+	/* read/write using lock */</div><div class='add'>+	spinlock_t            sdma_lock ____cacheline_aligned_in_smp;</div><div class='add'>+	struct list_head      sdma_activelist;</div><div class='ctx'> 	u64                   sdma_descq_added;</div><div class='ctx'> 	u64                   sdma_descq_removed;</div><div class='del'>-	u16                   sdma_descq_cnt;</div><div class='ctx'> 	u16                   sdma_descq_tail;</div><div class='ctx'> 	u16                   sdma_descq_head;</div><div class='del'>-	u16                   sdma_next_intr;</div><div class='del'>-	u16                   sdma_reset_wait;</div><div class='ctx'> 	u8                    sdma_generation;</div><div class='del'>-	struct tasklet_struct sdma_sw_clean_up_task;</div><div class='del'>-	struct list_head      sdma_activelist;</div><div class='ctx'> </div><div class='del'>-	dma_addr_t       sdma_descq_phys;</div><div class='del'>-	volatile __le64 *sdma_head_dma; /* DMA'ed by chip */</div><div class='del'>-	dma_addr_t       sdma_head_phys;</div><div class='add'>+	struct tasklet_struct sdma_sw_clean_up_task</div><div class='add'>+		____cacheline_aligned_in_smp;</div><div class='ctx'> </div><div class='ctx'> 	wait_queue_head_t state_wait; /* for state_wanted */</div><div class='ctx'> </div><div class='hunk'>@@ -873,7 +873,14 @@ struct qib_devdata {</div><div class='ctx'> 	 * pio_writing.</div><div class='ctx'> 	 */</div><div class='ctx'> 	spinlock_t pioavail_lock;</div><div class='del'>-</div><div class='add'>+	/*</div><div class='add'>+	 * index of last buffer to optimize search for next</div><div class='add'>+	 */</div><div class='add'>+	u32 last_pio;</div><div class='add'>+	/*</div><div class='add'>+	 * min kernel pio buffer to optimize search</div><div class='add'>+	 */</div><div class='add'>+	u32 min_kernel_pio;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Shadow copies of registers; size indicates read access size.</div><div class='ctx'> 	 * Most of them are readonly, but some are write-only register,</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_driver.c b/drivers/infiniband/hw/qib/qib_driver.c<br/>index 6fc9365ba8a6..8895cfec5019 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_driver.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_driver.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_driver.c</a></div><div class='hunk'>@@ -38,6 +38,7 @@</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/prefetch.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "qib.h"</div><div class='ctx'> </div><div class='hunk'>@@ -481,8 +482,10 @@ u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts)</div><div class='ctx'> 			etail = qib_hdrget_index(rhf_addr);</div><div class='ctx'> 			updegr = 1;</div><div class='ctx'> 			if (tlen &gt; sizeof(*hdr) ||</div><div class='del'>-			    etype &gt;= RCVHQ_RCV_TYPE_NON_KD)</div><div class='add'>+			    etype &gt;= RCVHQ_RCV_TYPE_NON_KD) {</div><div class='ctx'> 				ebuf = qib_get_egrbuf(rcd, etail);</div><div class='add'>+				prefetch_range(ebuf, tlen - sizeof(*hdr));</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!eflags) {</div><div class='ctx'> 			u16 lrh_len = be16_to_cpu(hdr-&gt;lrh[2]) &lt;&lt; 2;</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_iba6120.c b/drivers/infiniband/hw/qib/qib_iba6120.c<br/>index d0c64d514813..4d352b90750a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_iba6120.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_iba6120.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_iba6120.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_iba6120.c</a></div><div class='hunk'>@@ -3132,6 +3132,7 @@ static void get_6120_chip_params(struct qib_devdata *dd)</div><div class='ctx'> 	val = qib_read_kreg64(dd, kr_sendpiobufcnt);</div><div class='ctx'> 	dd-&gt;piobcnt2k = val &amp; ~0U;</div><div class='ctx'> 	dd-&gt;piobcnt4k = val &gt;&gt; 32;</div><div class='add'>+	dd-&gt;last_pio = dd-&gt;piobcnt4k + dd-&gt;piobcnt2k - 1;</div><div class='ctx'> 	/* these may be adjusted in init_chip_wc_pat() */</div><div class='ctx'> 	dd-&gt;pio2kbase = (u32 __iomem *)</div><div class='ctx'> 		(((char __iomem *)dd-&gt;kregbase) + dd-&gt;pio2k_bufbase);</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_iba7220.c b/drivers/infiniband/hw/qib/qib_iba7220.c<br/>index 3c722f79d6f6..86a0ba7ca0c2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_iba7220.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_iba7220.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_iba7220.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_iba7220.c</a></div><div class='hunk'>@@ -4157,6 +4157,7 @@ static int qib_init_7220_variables(struct qib_devdata *dd)</div><div class='ctx'> 		dd-&gt;cspec-&gt;sdmabufcnt;</div><div class='ctx'> 	dd-&gt;lastctxt_piobuf = dd-&gt;cspec-&gt;lastbuf_for_pio - sbufs;</div><div class='ctx'> 	dd-&gt;cspec-&gt;lastbuf_for_pio--; /* range is &lt;= , not &lt; */</div><div class='add'>+	dd-&gt;last_pio = dd-&gt;cspec-&gt;lastbuf_for_pio;</div><div class='ctx'> 	dd-&gt;pbufsctxt = dd-&gt;lastctxt_piobuf /</div><div class='ctx'> 		(dd-&gt;cfgctxts - dd-&gt;first_user_ctxt);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c<br/>index 060b96064469..c881e744c091 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_iba7322.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_iba7322.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_iba7322.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_iba7322.c</a></div><div class='hunk'>@@ -6379,6 +6379,7 @@ static int qib_init_7322_variables(struct qib_devdata *dd)</div><div class='ctx'> 		dd-&gt;cspec-&gt;sdmabufcnt;</div><div class='ctx'> 	dd-&gt;lastctxt_piobuf = dd-&gt;cspec-&gt;lastbuf_for_pio - sbufs;</div><div class='ctx'> 	dd-&gt;cspec-&gt;lastbuf_for_pio--; /* range is &lt;= , not &lt; */</div><div class='add'>+	dd-&gt;last_pio = dd-&gt;cspec-&gt;lastbuf_for_pio;</div><div class='ctx'> 	dd-&gt;pbufsctxt = (dd-&gt;cfgctxts &gt; dd-&gt;first_user_ctxt) ?</div><div class='ctx'> 		dd-&gt;lastctxt_piobuf / (dd-&gt;cfgctxts - dd-&gt;first_user_ctxt) : 0;</div><div class='ctx'> </div><div class='hunk'>@@ -7708,7 +7709,7 @@ static int serdes_7322_init_new(struct qib_pportdata *ppd)</div><div class='ctx'> 	ibsd_wr_allchans(ppd, 5, 0, BMASK(0, 0));</div><div class='ctx'> 	msleep(20);</div><div class='ctx'> 	/*       Set Frequency Loop Bandwidth */</div><div class='del'>-	ibsd_wr_allchans(ppd, 2, (7 &lt;&lt; 5), BMASK(8, 5));</div><div class='add'>+	ibsd_wr_allchans(ppd, 2, (15 &lt;&lt; 5), BMASK(8, 5));</div><div class='ctx'> 	/*       Enable Frequency Loop */</div><div class='ctx'> 	ibsd_wr_allchans(ppd, 2, (1 &lt;&lt; 4), BMASK(4, 4));</div><div class='ctx'> 	/*       Set Timing Loop Bandwidth */</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_init.c b/drivers/infiniband/hw/qib/qib_init.c<br/>index cf0cd30adc8d..dc14e100a7f1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_init.c</a></div><div class='hunk'>@@ -102,6 +102,8 @@ void qib_set_ctxtcnt(struct qib_devdata *dd)</div><div class='ctx'> 		dd-&gt;cfgctxts = qib_cfgctxts;</div><div class='ctx'> 	else</div><div class='ctx'> 		dd-&gt;cfgctxts = dd-&gt;ctxtcnt;</div><div class='add'>+	dd-&gt;freectxts = (dd-&gt;first_user_ctxt &gt; dd-&gt;cfgctxts) ? 0 :</div><div class='add'>+		dd-&gt;cfgctxts - dd-&gt;first_user_ctxt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -402,7 +404,6 @@ static void enable_chip(struct qib_devdata *dd)</div><div class='ctx'> 		if (rcd)</div><div class='ctx'> 			dd-&gt;f_rcvctrl(rcd-&gt;ppd, rcvmask, i);</div><div class='ctx'> 	}</div><div class='del'>-	dd-&gt;freectxts = dd-&gt;cfgctxts - dd-&gt;first_user_ctxt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void verify_interrupt(unsigned long opaque)</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_mad.c b/drivers/infiniband/hw/qib/qib_mad.c<br/>index c4ff788823b5..43390217a026 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_mad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_mad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_mad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_mad.c</a></div><div class='hunk'>@@ -396,6 +396,7 @@ static int get_linkdowndefaultstate(struct qib_pportdata *ppd)</div><div class='ctx'> </div><div class='ctx'> static int check_mkey(struct qib_ibport *ibp, struct ib_smp *smp, int mad_flags)</div><div class='ctx'> {</div><div class='add'>+	int valid_mkey = 0;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Is the mkey in the process of expiring? */</div><div class='hunk'>@@ -406,23 +407,36 @@ static int check_mkey(struct qib_ibport *ibp, struct ib_smp *smp, int mad_flags)</div><div class='ctx'> 		ibp-&gt;mkeyprot = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* M_Key checking depends on Portinfo:M_Key_protect_bits */</div><div class='del'>-	if ((mad_flags &amp; IB_MAD_IGNORE_MKEY) == 0 &amp;&amp; ibp-&gt;mkey != 0 &amp;&amp;</div><div class='del'>-	    ibp-&gt;mkey != smp-&gt;mkey &amp;&amp;</div><div class='del'>-	    (smp-&gt;method == IB_MGMT_METHOD_SET ||</div><div class='del'>-	     smp-&gt;method == IB_MGMT_METHOD_TRAP_REPRESS ||</div><div class='del'>-	     (smp-&gt;method == IB_MGMT_METHOD_GET &amp;&amp; ibp-&gt;mkeyprot &gt;= 2))) {</div><div class='del'>-		if (ibp-&gt;mkey_violations != 0xFFFF)</div><div class='del'>-			++ibp-&gt;mkey_violations;</div><div class='del'>-		if (!ibp-&gt;mkey_lease_timeout &amp;&amp; ibp-&gt;mkey_lease_period)</div><div class='del'>-			ibp-&gt;mkey_lease_timeout = jiffies +</div><div class='del'>-				ibp-&gt;mkey_lease_period * HZ;</div><div class='del'>-		/* Generate a trap notice. */</div><div class='del'>-		qib_bad_mkey(ibp, smp);</div><div class='del'>-		ret = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;</div><div class='del'>-	} else if (ibp-&gt;mkey_lease_timeout)</div><div class='add'>+	if ((mad_flags &amp; IB_MAD_IGNORE_MKEY) ||  ibp-&gt;mkey == 0 ||</div><div class='add'>+	    ibp-&gt;mkey == smp-&gt;mkey)</div><div class='add'>+		valid_mkey = 1;</div><div class='add'>+</div><div class='add'>+	/* Unset lease timeout on any valid Get/Set/TrapRepress */</div><div class='add'>+	if (valid_mkey &amp;&amp; ibp-&gt;mkey_lease_timeout &amp;&amp;</div><div class='add'>+	    (smp-&gt;method == IB_MGMT_METHOD_GET ||</div><div class='add'>+	     smp-&gt;method == IB_MGMT_METHOD_SET ||</div><div class='add'>+	     smp-&gt;method == IB_MGMT_METHOD_TRAP_REPRESS))</div><div class='ctx'> 		ibp-&gt;mkey_lease_timeout = 0;</div><div class='ctx'> </div><div class='add'>+	if (!valid_mkey) {</div><div class='add'>+		switch (smp-&gt;method) {</div><div class='add'>+		case IB_MGMT_METHOD_GET:</div><div class='add'>+			/* Bad mkey not a violation below level 2 */</div><div class='add'>+			if (ibp-&gt;mkeyprot &lt; 2)</div><div class='add'>+				break;</div><div class='add'>+		case IB_MGMT_METHOD_SET:</div><div class='add'>+		case IB_MGMT_METHOD_TRAP_REPRESS:</div><div class='add'>+			if (ibp-&gt;mkey_violations != 0xFFFF)</div><div class='add'>+				++ibp-&gt;mkey_violations;</div><div class='add'>+			if (!ibp-&gt;mkey_lease_timeout &amp;&amp; ibp-&gt;mkey_lease_period)</div><div class='add'>+				ibp-&gt;mkey_lease_timeout = jiffies +</div><div class='add'>+					ibp-&gt;mkey_lease_period * HZ;</div><div class='add'>+			/* Generate a trap notice. */</div><div class='add'>+			qib_bad_mkey(ibp, smp);</div><div class='add'>+			ret = 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -450,6 +464,7 @@ static int subn_get_portinfo(struct ib_smp *smp, struct ib_device *ibdev,</div><div class='ctx'> 			ibp = to_iport(ibdev, port_num);</div><div class='ctx'> 			ret = check_mkey(ibp, smp, 0);</div><div class='ctx'> 			if (ret)</div><div class='add'>+				ret = IB_MAD_RESULT_FAILURE;</div><div class='ctx'> 				goto bail;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -631,7 +646,7 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev,</div><div class='ctx'> 	struct qib_devdata *dd;</div><div class='ctx'> 	struct qib_pportdata *ppd;</div><div class='ctx'> 	struct qib_ibport *ibp;</div><div class='del'>-	char clientrereg = 0;</div><div class='add'>+	u8 clientrereg = (pip-&gt;clientrereg_resv_subnetto &amp; 0x80);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u16 lid, smlid;</div><div class='ctx'> 	u8 lwe;</div><div class='hunk'>@@ -781,12 +796,6 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev,</div><div class='ctx'> </div><div class='ctx'> 	ibp-&gt;subnet_timeout = pip-&gt;clientrereg_resv_subnetto &amp; 0x1F;</div><div class='ctx'> </div><div class='del'>-	if (pip-&gt;clientrereg_resv_subnetto &amp; 0x80) {</div><div class='del'>-		clientrereg = 1;</div><div class='del'>-		event.event = IB_EVENT_CLIENT_REREGISTER;</div><div class='del'>-		ib_dispatch_event(&amp;event);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Do the port state change now that the other link parameters</div><div class='ctx'> 	 * have been set.</div><div class='hunk'>@@ -844,10 +853,15 @@ static int subn_set_portinfo(struct ib_smp *smp, struct ib_device *ibdev,</div><div class='ctx'> 		smp-&gt;status |= IB_SMP_INVALID_FIELD;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (clientrereg) {</div><div class='add'>+		event.event = IB_EVENT_CLIENT_REREGISTER;</div><div class='add'>+		ib_dispatch_event(&amp;event);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = subn_get_portinfo(smp, ibdev, port);</div><div class='ctx'> </div><div class='del'>-	if (clientrereg)</div><div class='del'>-		pip-&gt;clientrereg_resv_subnetto |= 0x80;</div><div class='add'>+	/* restore re-reg bit per o14-12.2.1 */</div><div class='add'>+	pip-&gt;clientrereg_resv_subnetto |= clientrereg;</div><div class='ctx'> </div><div class='ctx'> 	goto get_only;</div><div class='ctx'> </div><div class='hunk'>@@ -1835,6 +1849,7 @@ static int process_subn(struct ib_device *ibdev, int mad_flags,</div><div class='ctx'> 		    port_num &amp;&amp; port_num &lt;= ibdev-&gt;phys_port_cnt &amp;&amp;</div><div class='ctx'> 		    port != port_num)</div><div class='ctx'> 			(void) check_mkey(to_iport(ibdev, port_num), smp, 0);</div><div class='add'>+		ret = IB_MAD_RESULT_FAILURE;</div><div class='ctx'> 		goto bail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_qp.c b/drivers/infiniband/hw/qib/qib_qp.c<br/>index 7e7e16fbee99..1ce56b51ab1a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_qp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_qp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_qp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_qp.c</a></div><div class='hunk'>@@ -1038,6 +1038,11 @@ struct ib_qp *qib_create_qp(struct ib_pd *ibpd,</div><div class='ctx'> 			goto bail_swq;</div><div class='ctx'> 		}</div><div class='ctx'> 		RCU_INIT_POINTER(qp-&gt;next, NULL);</div><div class='add'>+		qp-&gt;s_hdr = kzalloc(sizeof(*qp-&gt;s_hdr), GFP_KERNEL);</div><div class='add'>+		if (!qp-&gt;s_hdr) {</div><div class='add'>+			ret = ERR_PTR(-ENOMEM);</div><div class='add'>+			goto bail_qp;</div><div class='add'>+		}</div><div class='ctx'> 		qp-&gt;timeout_jiffies =</div><div class='ctx'> 			usecs_to_jiffies((4096UL * (1UL &lt;&lt; qp-&gt;timeout)) /</div><div class='ctx'> 				1000UL);</div><div class='hunk'>@@ -1159,6 +1164,7 @@ bail_ip:</div><div class='ctx'> 		vfree(qp-&gt;r_rq.wq);</div><div class='ctx'> 	free_qpn(&amp;dev-&gt;qpn_table, qp-&gt;ibqp.qp_num);</div><div class='ctx'> bail_qp:</div><div class='add'>+	kfree(qp-&gt;s_hdr);</div><div class='ctx'> 	kfree(qp);</div><div class='ctx'> bail_swq:</div><div class='ctx'> 	vfree(swq);</div><div class='hunk'>@@ -1214,6 +1220,7 @@ int qib_destroy_qp(struct ib_qp *ibqp)</div><div class='ctx'> 	else</div><div class='ctx'> 		vfree(qp-&gt;r_rq.wq);</div><div class='ctx'> 	vfree(qp-&gt;s_wq);</div><div class='add'>+	kfree(qp-&gt;s_hdr);</div><div class='ctx'> 	kfree(qp);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_rc.c b/drivers/infiniband/hw/qib/qib_rc.c<br/>index 765b4cbaa020..b641416148eb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_rc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_rc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_rc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_rc.c</a></div><div class='hunk'>@@ -244,9 +244,9 @@ int qib_make_rc_req(struct qib_qp *qp)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	int delta;</div><div class='ctx'> </div><div class='del'>-	ohdr = &amp;qp-&gt;s_hdr.u.oth;</div><div class='add'>+	ohdr = &amp;qp-&gt;s_hdr-&gt;u.oth;</div><div class='ctx'> 	if (qp-&gt;remote_ah_attr.ah_flags &amp; IB_AH_GRH)</div><div class='del'>-		ohdr = &amp;qp-&gt;s_hdr.u.l.oth;</div><div class='add'>+		ohdr = &amp;qp-&gt;s_hdr-&gt;u.l.oth;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The lock is needed to synchronize between the sending tasklet,</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_ruc.c b/drivers/infiniband/hw/qib/qib_ruc.c<br/>index b4b37e47321a..c0ee7e095d81 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_ruc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_ruc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_ruc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_ruc.c</a></div><div class='hunk'>@@ -688,17 +688,17 @@ void qib_make_ruc_header(struct qib_qp *qp, struct qib_other_headers *ohdr,</div><div class='ctx'> 	nwords = (qp-&gt;s_cur_size + extra_bytes) &gt;&gt; 2;</div><div class='ctx'> 	lrh0 = QIB_LRH_BTH;</div><div class='ctx'> 	if (unlikely(qp-&gt;remote_ah_attr.ah_flags &amp; IB_AH_GRH)) {</div><div class='del'>-		qp-&gt;s_hdrwords += qib_make_grh(ibp, &amp;qp-&gt;s_hdr.u.l.grh,</div><div class='add'>+		qp-&gt;s_hdrwords += qib_make_grh(ibp, &amp;qp-&gt;s_hdr-&gt;u.l.grh,</div><div class='ctx'> 					       &amp;qp-&gt;remote_ah_attr.grh,</div><div class='ctx'> 					       qp-&gt;s_hdrwords, nwords);</div><div class='ctx'> 		lrh0 = QIB_LRH_GRH;</div><div class='ctx'> 	}</div><div class='ctx'> 	lrh0 |= ibp-&gt;sl_to_vl[qp-&gt;remote_ah_attr.sl] &lt;&lt; 12 |</div><div class='ctx'> 		qp-&gt;remote_ah_attr.sl &lt;&lt; 4;</div><div class='del'>-	qp-&gt;s_hdr.lrh[0] = cpu_to_be16(lrh0);</div><div class='del'>-	qp-&gt;s_hdr.lrh[1] = cpu_to_be16(qp-&gt;remote_ah_attr.dlid);</div><div class='del'>-	qp-&gt;s_hdr.lrh[2] = cpu_to_be16(qp-&gt;s_hdrwords + nwords + SIZE_OF_CRC);</div><div class='del'>-	qp-&gt;s_hdr.lrh[3] = cpu_to_be16(ppd_from_ibp(ibp)-&gt;lid |</div><div class='add'>+	qp-&gt;s_hdr-&gt;lrh[0] = cpu_to_be16(lrh0);</div><div class='add'>+	qp-&gt;s_hdr-&gt;lrh[1] = cpu_to_be16(qp-&gt;remote_ah_attr.dlid);</div><div class='add'>+	qp-&gt;s_hdr-&gt;lrh[2] = cpu_to_be16(qp-&gt;s_hdrwords + nwords + SIZE_OF_CRC);</div><div class='add'>+	qp-&gt;s_hdr-&gt;lrh[3] = cpu_to_be16(ppd_from_ibp(ibp)-&gt;lid |</div><div class='ctx'> 				       qp-&gt;remote_ah_attr.src_path_bits);</div><div class='ctx'> 	bth0 |= qib_get_pkey(ibp, qp-&gt;s_pkey_index);</div><div class='ctx'> 	bth0 |= extra_bytes &lt;&lt; 20;</div><div class='hunk'>@@ -758,7 +758,7 @@ void qib_do_send(struct work_struct *work)</div><div class='ctx'> 			 * If the packet cannot be sent now, return and</div><div class='ctx'> 			 * the send tasklet will be woken up later.</div><div class='ctx'> 			 */</div><div class='del'>-			if (qib_verbs_send(qp, &amp;qp-&gt;s_hdr, qp-&gt;s_hdrwords,</div><div class='add'>+			if (qib_verbs_send(qp, qp-&gt;s_hdr, qp-&gt;s_hdrwords,</div><div class='ctx'> 					   qp-&gt;s_cur_sge, qp-&gt;s_cur_size))</div><div class='ctx'> 				break;</div><div class='ctx'> 			/* Record that s_hdr is empty. */</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_sysfs.c b/drivers/infiniband/hw/qib/qib_sysfs.c<br/>index dae51604cfcd..dd9cd49d0979 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_sysfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_sysfs.c</a></div><div class='hunk'>@@ -503,8 +503,11 @@ static ssize_t show_nctxts(struct device *device,</div><div class='ctx'> 	struct qib_devdata *dd = dd_from_dev(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Return the number of user ports (contexts) available. */</div><div class='del'>-	return scnprintf(buf, PAGE_SIZE, "%u\n", dd-&gt;cfgctxts -</div><div class='del'>-		dd-&gt;first_user_ctxt);</div><div class='add'>+	/* The calculation below deals with a special case where</div><div class='add'>+	 * cfgctxts is set to 1 on a single-port board. */</div><div class='add'>+	return scnprintf(buf, PAGE_SIZE, "%u\n",</div><div class='add'>+			(dd-&gt;first_user_ctxt &gt; dd-&gt;cfgctxts) ? 0 :</div><div class='add'>+			(dd-&gt;cfgctxts - dd-&gt;first_user_ctxt));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t show_nfreectxts(struct device *device,</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_tx.c b/drivers/infiniband/hw/qib/qib_tx.c<br/>index 1bf626c40172..31d3561400a4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_tx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_tx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_tx.c</a></div><div class='hunk'>@@ -295,6 +295,7 @@ u32 __iomem *qib_getsendbuf_range(struct qib_devdata *dd, u32 *pbufnum,</div><div class='ctx'> </div><div class='ctx'> 	nbufs = last - first + 1; /* number in range to check */</div><div class='ctx'> 	if (dd-&gt;upd_pio_shadow) {</div><div class='add'>+update_shadow:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Minor optimization.  If we had no buffers on last call,</div><div class='ctx'> 		 * start out by doing the update; continue and do scan even</div><div class='hunk'>@@ -304,37 +305,39 @@ u32 __iomem *qib_getsendbuf_range(struct qib_devdata *dd, u32 *pbufnum,</div><div class='ctx'> 		updated++;</div><div class='ctx'> 	}</div><div class='ctx'> 	i = first;</div><div class='del'>-rescan:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * While test_and_set_bit() is atomic, we do that and then the</div><div class='ctx'> 	 * change_bit(), and the pair is not.  See if this is the cause</div><div class='ctx'> 	 * of the remaining armlaunch errors.</div><div class='ctx'> 	 */</div><div class='ctx'> 	spin_lock_irqsave(&amp;dd-&gt;pioavail_lock, flags);</div><div class='add'>+	if (dd-&gt;last_pio &gt;= first &amp;&amp; dd-&gt;last_pio &lt;= last)</div><div class='add'>+		i = dd-&gt;last_pio + 1;</div><div class='add'>+	if (!first)</div><div class='add'>+		/* adjust to min possible  */</div><div class='add'>+		nbufs = last - dd-&gt;min_kernel_pio + 1;</div><div class='ctx'> 	for (j = 0; j &lt; nbufs; j++, i++) {</div><div class='ctx'> 		if (i &gt; last)</div><div class='del'>-			i = first;</div><div class='add'>+			i = !first ? dd-&gt;min_kernel_pio : first;</div><div class='ctx'> 		if (__test_and_set_bit((2 * i) + 1, shadow))</div><div class='ctx'> 			continue;</div><div class='ctx'> 		/* flip generation bit */</div><div class='ctx'> 		__change_bit(2 * i, shadow);</div><div class='ctx'> 		/* remember that the buffer can be written to now */</div><div class='ctx'> 		__set_bit(i, dd-&gt;pio_writing);</div><div class='add'>+		if (!first &amp;&amp; first != last) /* first == last on VL15, avoid */</div><div class='add'>+			dd-&gt;last_pio = i;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dd-&gt;pioavail_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (j == nbufs) {</div><div class='del'>-		if (!updated) {</div><div class='add'>+		if (!updated)</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * First time through; shadow exhausted, but may be</div><div class='ctx'> 			 * buffers available, try an update and then rescan.</div><div class='ctx'> 			 */</div><div class='del'>-			update_send_bufs(dd);</div><div class='del'>-			updated++;</div><div class='del'>-			i = first;</div><div class='del'>-			goto rescan;</div><div class='del'>-		}</div><div class='add'>+			goto update_shadow;</div><div class='ctx'> 		no_send_bufs(dd);</div><div class='ctx'> 		buf = NULL;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -422,14 +425,20 @@ void qib_chg_pioavailkernel(struct qib_devdata *dd, unsigned start,</div><div class='ctx'> 				__clear_bit(QLOGIC_IB_SENDPIOAVAIL_CHECK_SHIFT</div><div class='ctx'> 					    + start, dd-&gt;pioavailshadow);</div><div class='ctx'> 			__set_bit(start, dd-&gt;pioavailkernel);</div><div class='add'>+			if ((start &gt;&gt; 1) &lt; dd-&gt;min_kernel_pio)</div><div class='add'>+				dd-&gt;min_kernel_pio = start &gt;&gt; 1;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			__set_bit(start + QLOGIC_IB_SENDPIOAVAIL_BUSY_SHIFT,</div><div class='ctx'> 				  dd-&gt;pioavailshadow);</div><div class='ctx'> 			__clear_bit(start, dd-&gt;pioavailkernel);</div><div class='add'>+			if ((start &gt;&gt; 1) &gt; dd-&gt;min_kernel_pio)</div><div class='add'>+				dd-&gt;min_kernel_pio = start &gt;&gt; 1;</div><div class='ctx'> 		}</div><div class='ctx'> 		start += 2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (dd-&gt;min_kernel_pio &gt; 0 &amp;&amp; dd-&gt;last_pio &lt; dd-&gt;min_kernel_pio - 1)</div><div class='add'>+		dd-&gt;last_pio = dd-&gt;min_kernel_pio - 1;</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dd-&gt;pioavail_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	dd-&gt;f_txchk_change(dd, ostart, len, avail, rcd);</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_uc.c b/drivers/infiniband/hw/qib/qib_uc.c<br/>index 7ce2ac2ed219..ce7387ff5d91 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_uc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_uc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_uc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_uc.c</a></div><div class='hunk'>@@ -72,9 +72,9 @@ int qib_make_uc_req(struct qib_qp *qp)</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ohdr = &amp;qp-&gt;s_hdr.u.oth;</div><div class='add'>+	ohdr = &amp;qp-&gt;s_hdr-&gt;u.oth;</div><div class='ctx'> 	if (qp-&gt;remote_ah_attr.ah_flags &amp; IB_AH_GRH)</div><div class='del'>-		ohdr = &amp;qp-&gt;s_hdr.u.l.oth;</div><div class='add'>+		ohdr = &amp;qp-&gt;s_hdr-&gt;u.l.oth;</div><div class='ctx'> </div><div class='ctx'> 	/* header size in 32-bit words LRH+BTH = (8+12)/4. */</div><div class='ctx'> 	hwords = 5;</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_ud.c b/drivers/infiniband/hw/qib/qib_ud.c<br/>index 828609fa4d28..a468bf2d4465 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_ud.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_ud.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_ud.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_ud.c</a></div><div class='hunk'>@@ -321,11 +321,11 @@ int qib_make_ud_req(struct qib_qp *qp)</div><div class='ctx'> </div><div class='ctx'> 	if (ah_attr-&gt;ah_flags &amp; IB_AH_GRH) {</div><div class='ctx'> 		/* Header size in 32-bit words. */</div><div class='del'>-		qp-&gt;s_hdrwords += qib_make_grh(ibp, &amp;qp-&gt;s_hdr.u.l.grh,</div><div class='add'>+		qp-&gt;s_hdrwords += qib_make_grh(ibp, &amp;qp-&gt;s_hdr-&gt;u.l.grh,</div><div class='ctx'> 					       &amp;ah_attr-&gt;grh,</div><div class='ctx'> 					       qp-&gt;s_hdrwords, nwords);</div><div class='ctx'> 		lrh0 = QIB_LRH_GRH;</div><div class='del'>-		ohdr = &amp;qp-&gt;s_hdr.u.l.oth;</div><div class='add'>+		ohdr = &amp;qp-&gt;s_hdr-&gt;u.l.oth;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Don't worry about sending to locally attached multicast</div><div class='ctx'> 		 * QPs.  It is unspecified by the spec. what happens.</div><div class='hunk'>@@ -333,7 +333,7 @@ int qib_make_ud_req(struct qib_qp *qp)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Header size in 32-bit words. */</div><div class='ctx'> 		lrh0 = QIB_LRH_BTH;</div><div class='del'>-		ohdr = &amp;qp-&gt;s_hdr.u.oth;</div><div class='add'>+		ohdr = &amp;qp-&gt;s_hdr-&gt;u.oth;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (wqe-&gt;wr.opcode == IB_WR_SEND_WITH_IMM) {</div><div class='ctx'> 		qp-&gt;s_hdrwords++;</div><div class='hunk'>@@ -346,15 +346,15 @@ int qib_make_ud_req(struct qib_qp *qp)</div><div class='ctx'> 		lrh0 |= 0xF000; /* Set VL (see ch. 13.5.3.1) */</div><div class='ctx'> 	else</div><div class='ctx'> 		lrh0 |= ibp-&gt;sl_to_vl[ah_attr-&gt;sl] &lt;&lt; 12;</div><div class='del'>-	qp-&gt;s_hdr.lrh[0] = cpu_to_be16(lrh0);</div><div class='del'>-	qp-&gt;s_hdr.lrh[1] = cpu_to_be16(ah_attr-&gt;dlid);  /* DEST LID */</div><div class='del'>-	qp-&gt;s_hdr.lrh[2] = cpu_to_be16(qp-&gt;s_hdrwords + nwords + SIZE_OF_CRC);</div><div class='add'>+	qp-&gt;s_hdr-&gt;lrh[0] = cpu_to_be16(lrh0);</div><div class='add'>+	qp-&gt;s_hdr-&gt;lrh[1] = cpu_to_be16(ah_attr-&gt;dlid);  /* DEST LID */</div><div class='add'>+	qp-&gt;s_hdr-&gt;lrh[2] = cpu_to_be16(qp-&gt;s_hdrwords + nwords + SIZE_OF_CRC);</div><div class='ctx'> 	lid = ppd-&gt;lid;</div><div class='ctx'> 	if (lid) {</div><div class='ctx'> 		lid |= ah_attr-&gt;src_path_bits &amp; ((1 &lt;&lt; ppd-&gt;lmc) - 1);</div><div class='del'>-		qp-&gt;s_hdr.lrh[3] = cpu_to_be16(lid);</div><div class='add'>+		qp-&gt;s_hdr-&gt;lrh[3] = cpu_to_be16(lid);</div><div class='ctx'> 	} else</div><div class='del'>-		qp-&gt;s_hdr.lrh[3] = IB_LID_PERMISSIVE;</div><div class='add'>+		qp-&gt;s_hdr-&gt;lrh[3] = IB_LID_PERMISSIVE;</div><div class='ctx'> 	if (wqe-&gt;wr.send_flags &amp; IB_SEND_SOLICITED)</div><div class='ctx'> 		bth0 |= IB_BTH_SOLICITED;</div><div class='ctx'> 	bth0 |= extra_bytes &lt;&lt; 20;</div><div class='head'>diff --git a/drivers/infiniband/hw/qib/qib_verbs.h b/drivers/infiniband/hw/qib/qib_verbs.h<br/>index 0c19ef0c4123..487606024659 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_verbs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/hw/qib/qib_verbs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/hw/qib/qib_verbs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/hw/qib/qib_verbs.h</a></div><div class='hunk'>@@ -367,9 +367,10 @@ struct qib_rwq {</div><div class='ctx'> </div><div class='ctx'> struct qib_rq {</div><div class='ctx'> 	struct qib_rwq *wq;</div><div class='del'>-	spinlock_t lock; /* protect changes in this struct */</div><div class='ctx'> 	u32 size;               /* size of RWQE array */</div><div class='ctx'> 	u8 max_sge;</div><div class='add'>+	spinlock_t lock /* protect changes in this struct */</div><div class='add'>+		____cacheline_aligned_in_smp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct qib_srq {</div><div class='hunk'>@@ -412,31 +413,75 @@ struct qib_ack_entry {</div><div class='ctx'>  */</div><div class='ctx'> struct qib_qp {</div><div class='ctx'> 	struct ib_qp ibqp;</div><div class='del'>-	struct qib_qp *next;            /* link list for QPN hash table */</div><div class='del'>-	struct qib_qp *timer_next;      /* link list for qib_ib_timer() */</div><div class='del'>-	struct list_head iowait;        /* link for wait PIO buf */</div><div class='del'>-	struct list_head rspwait;       /* link for waititing to respond */</div><div class='add'>+	/* read mostly fields above and below */</div><div class='ctx'> 	struct ib_ah_attr remote_ah_attr;</div><div class='ctx'> 	struct ib_ah_attr alt_ah_attr;</div><div class='del'>-	struct qib_ib_header s_hdr;     /* next packet header to send */</div><div class='del'>-	atomic_t refcount;</div><div class='del'>-	wait_queue_head_t wait;</div><div class='del'>-	wait_queue_head_t wait_dma;</div><div class='del'>-	struct timer_list s_timer;</div><div class='del'>-	struct work_struct s_work;</div><div class='add'>+	struct qib_qp *next;            /* link list for QPN hash table */</div><div class='add'>+	struct qib_swqe *s_wq;  /* send work queue */</div><div class='ctx'> 	struct qib_mmap_info *ip;</div><div class='add'>+	struct qib_ib_header *s_hdr;     /* next packet header to send */</div><div class='add'>+	unsigned long timeout_jiffies;  /* computed from timeout */</div><div class='add'>+</div><div class='add'>+	enum ib_mtu path_mtu;</div><div class='add'>+	u32 remote_qpn;</div><div class='add'>+	u32 pmtu;		/* decoded from path_mtu */</div><div class='add'>+	u32 qkey;               /* QKEY for this QP (for UD or RD) */</div><div class='add'>+	u32 s_size;             /* send work queue size */</div><div class='add'>+	u32 s_rnr_timeout;      /* number of milliseconds for RNR timeout */</div><div class='add'>+</div><div class='add'>+	u8 state;               /* QP state */</div><div class='add'>+	u8 qp_access_flags;</div><div class='add'>+	u8 alt_timeout;         /* Alternate path timeout for this QP */</div><div class='add'>+	u8 timeout;             /* Timeout for this QP */</div><div class='add'>+	u8 s_srate;</div><div class='add'>+	u8 s_mig_state;</div><div class='add'>+	u8 port_num;</div><div class='add'>+	u8 s_pkey_index;        /* PKEY index to use */</div><div class='add'>+	u8 s_alt_pkey_index;    /* Alternate path PKEY index to use */</div><div class='add'>+	u8 r_max_rd_atomic;     /* max number of RDMA read/atomic to receive */</div><div class='add'>+	u8 s_max_rd_atomic;     /* max number of RDMA read/atomic to send */</div><div class='add'>+	u8 s_retry_cnt;         /* number of times to retry */</div><div class='add'>+	u8 s_rnr_retry_cnt;</div><div class='add'>+	u8 r_min_rnr_timer;     /* retry timeout value for RNR NAKs */</div><div class='add'>+	u8 s_max_sge;           /* size of s_wq-&gt;sg_list */</div><div class='add'>+	u8 s_draining;</div><div class='add'>+</div><div class='add'>+	/* start of read/write fields */</div><div class='add'>+</div><div class='add'>+	atomic_t refcount ____cacheline_aligned_in_smp;</div><div class='add'>+	wait_queue_head_t wait;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	struct qib_ack_entry s_ack_queue[QIB_MAX_RDMA_ATOMIC + 1]</div><div class='add'>+		____cacheline_aligned_in_smp;</div><div class='add'>+	struct qib_sge_state s_rdma_read_sge;</div><div class='add'>+</div><div class='add'>+	spinlock_t r_lock ____cacheline_aligned_in_smp;      /* used for APM */</div><div class='add'>+	unsigned long r_aflags;</div><div class='add'>+	u64 r_wr_id;            /* ID for current receive WQE */</div><div class='add'>+	u32 r_ack_psn;          /* PSN for next ACK or atomic ACK */</div><div class='add'>+	u32 r_len;              /* total length of r_sge */</div><div class='add'>+	u32 r_rcv_len;          /* receive data len processed */</div><div class='add'>+	u32 r_psn;              /* expected rcv packet sequence number */</div><div class='add'>+	u32 r_msn;              /* message sequence number */</div><div class='add'>+</div><div class='add'>+	u8 r_state;             /* opcode of last packet received */</div><div class='add'>+	u8 r_flags;</div><div class='add'>+	u8 r_head_ack_queue;    /* index into s_ack_queue[] */</div><div class='add'>+</div><div class='add'>+	struct list_head rspwait;       /* link for waititing to respond */</div><div class='add'>+</div><div class='add'>+	struct qib_sge_state r_sge;     /* current receive data */</div><div class='add'>+	struct qib_rq r_rq;             /* receive work queue */</div><div class='add'>+</div><div class='add'>+	spinlock_t s_lock ____cacheline_aligned_in_smp;</div><div class='ctx'> 	struct qib_sge_state *s_cur_sge;</div><div class='add'>+	u32 s_flags;</div><div class='ctx'> 	struct qib_verbs_txreq *s_tx;</div><div class='del'>-	struct qib_mregion *s_rdma_mr;</div><div class='add'>+	struct qib_swqe *s_wqe;</div><div class='ctx'> 	struct qib_sge_state s_sge;     /* current send request data */</div><div class='del'>-	struct qib_ack_entry s_ack_queue[QIB_MAX_RDMA_ATOMIC + 1];</div><div class='del'>-	struct qib_sge_state s_ack_rdma_sge;</div><div class='del'>-	struct qib_sge_state s_rdma_read_sge;</div><div class='del'>-	struct qib_sge_state r_sge;     /* current receive data */</div><div class='del'>-	spinlock_t r_lock;      /* used for APM */</div><div class='del'>-	spinlock_t s_lock;</div><div class='add'>+	struct qib_mregion *s_rdma_mr;</div><div class='ctx'> 	atomic_t s_dma_busy;</div><div class='del'>-	u32 s_flags;</div><div class='ctx'> 	u32 s_cur_size;         /* size of send packet in bytes */</div><div class='ctx'> 	u32 s_len;              /* total length of s_sge */</div><div class='ctx'> 	u32 s_rdma_read_len;    /* total length of s_rdma_read_sge */</div><div class='hunk'>@@ -447,60 +492,34 @@ struct qib_qp {</div><div class='ctx'> 	u32 s_psn;              /* current packet sequence number */</div><div class='ctx'> 	u32 s_ack_rdma_psn;     /* PSN for sending RDMA read responses */</div><div class='ctx'> 	u32 s_ack_psn;          /* PSN for acking sends and RDMA writes */</div><div class='del'>-	u32 s_rnr_timeout;      /* number of milliseconds for RNR timeout */</div><div class='del'>-	u32 r_ack_psn;          /* PSN for next ACK or atomic ACK */</div><div class='del'>-	u64 r_wr_id;            /* ID for current receive WQE */</div><div class='del'>-	unsigned long r_aflags;</div><div class='del'>-	u32 r_len;              /* total length of r_sge */</div><div class='del'>-	u32 r_rcv_len;          /* receive data len processed */</div><div class='del'>-	u32 r_psn;              /* expected rcv packet sequence number */</div><div class='del'>-	u32 r_msn;              /* message sequence number */</div><div class='add'>+	u32 s_head;             /* new entries added here */</div><div class='add'>+	u32 s_tail;             /* next entry to process */</div><div class='add'>+	u32 s_cur;              /* current work queue entry */</div><div class='add'>+	u32 s_acked;            /* last un-ACK'ed entry */</div><div class='add'>+	u32 s_last;             /* last completed entry */</div><div class='add'>+	u32 s_ssn;              /* SSN of tail entry */</div><div class='add'>+	u32 s_lsn;              /* limit sequence number (credit) */</div><div class='ctx'> 	u16 s_hdrwords;         /* size of s_hdr in 32 bit words */</div><div class='ctx'> 	u16 s_rdma_ack_cnt;</div><div class='del'>-	u8 state;               /* QP state */</div><div class='ctx'> 	u8 s_state;             /* opcode of last packet sent */</div><div class='ctx'> 	u8 s_ack_state;         /* opcode of packet to ACK */</div><div class='ctx'> 	u8 s_nak_state;         /* non-zero if NAK is pending */</div><div class='del'>-	u8 r_state;             /* opcode of last packet received */</div><div class='ctx'> 	u8 r_nak_state;         /* non-zero if NAK is pending */</div><div class='del'>-	u8 r_min_rnr_timer;     /* retry timeout value for RNR NAKs */</div><div class='del'>-	u8 r_flags;</div><div class='del'>-	u8 r_max_rd_atomic;     /* max number of RDMA read/atomic to receive */</div><div class='del'>-	u8 r_head_ack_queue;    /* index into s_ack_queue[] */</div><div class='del'>-	u8 qp_access_flags;</div><div class='del'>-	u8 s_max_sge;           /* size of s_wq-&gt;sg_list */</div><div class='del'>-	u8 s_retry_cnt;         /* number of times to retry */</div><div class='del'>-	u8 s_rnr_retry_cnt;</div><div class='ctx'> 	u8 s_retry;             /* requester retry counter */</div><div class='ctx'> 	u8 s_rnr_retry;         /* requester RNR retry counter */</div><div class='del'>-	u8 s_pkey_index;        /* PKEY index to use */</div><div class='del'>-	u8 s_alt_pkey_index;    /* Alternate path PKEY index to use */</div><div class='del'>-	u8 s_max_rd_atomic;     /* max number of RDMA read/atomic to send */</div><div class='ctx'> 	u8 s_num_rd_atomic;     /* number of RDMA read/atomic pending */</div><div class='ctx'> 	u8 s_tail_ack_queue;    /* index into s_ack_queue[] */</div><div class='del'>-	u8 s_srate;</div><div class='del'>-	u8 s_draining;</div><div class='del'>-	u8 s_mig_state;</div><div class='del'>-	u8 timeout;             /* Timeout for this QP */</div><div class='del'>-	u8 alt_timeout;         /* Alternate path timeout for this QP */</div><div class='del'>-	u8 port_num;</div><div class='del'>-	enum ib_mtu path_mtu;</div><div class='del'>-	u32 pmtu;		/* decoded from path_mtu */</div><div class='del'>-	u32 remote_qpn;</div><div class='del'>-	u32 qkey;               /* QKEY for this QP (for UD or RD) */</div><div class='del'>-	u32 s_size;             /* send work queue size */</div><div class='del'>-	u32 s_head;             /* new entries added here */</div><div class='del'>-	u32 s_tail;             /* next entry to process */</div><div class='del'>-	u32 s_cur;              /* current work queue entry */</div><div class='del'>-	u32 s_acked;            /* last un-ACK'ed entry */</div><div class='del'>-	u32 s_last;             /* last completed entry */</div><div class='del'>-	u32 s_ssn;              /* SSN of tail entry */</div><div class='del'>-	u32 s_lsn;              /* limit sequence number (credit) */</div><div class='del'>-	unsigned long timeout_jiffies;  /* computed from timeout */</div><div class='del'>-	struct qib_swqe *s_wq;  /* send work queue */</div><div class='del'>-	struct qib_swqe *s_wqe;</div><div class='del'>-	struct qib_rq r_rq;             /* receive work queue */</div><div class='del'>-	struct qib_sge r_sg_list[0];    /* verified SGEs */</div><div class='add'>+</div><div class='add'>+	struct qib_sge_state s_ack_rdma_sge;</div><div class='add'>+	struct timer_list s_timer;</div><div class='add'>+	struct list_head iowait;        /* link for wait PIO buf */</div><div class='add'>+</div><div class='add'>+	struct work_struct s_work;</div><div class='add'>+</div><div class='add'>+	wait_queue_head_t wait_dma;</div><div class='add'>+</div><div class='add'>+	struct qib_sge r_sg_list[0] /* verified SGEs */</div><div class='add'>+		____cacheline_aligned_in_smp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/infiniband/ulp/iser/iscsi_iser.c b/drivers/infiniband/ulp/iser/iscsi_iser.c<br/>index db43b3117168..0ab8c9cc3a78 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/ulp/iser/iscsi_iser.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/ulp/iser/iscsi_iser.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/ulp/iser/iscsi_iser.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/ulp/iser/iscsi_iser.c</a></div><div class='hunk'>@@ -573,10 +573,9 @@ iscsi_iser_ep_connect(struct Scsi_Host *shost, struct sockaddr *dst_addr,</div><div class='ctx'> </div><div class='ctx'> 	err = iser_connect(ib_conn, NULL, (struct sockaddr_in *)dst_addr,</div><div class='ctx'> 			   non_blocking);</div><div class='del'>-	if (err) {</div><div class='del'>-		iscsi_destroy_endpoint(ep);</div><div class='add'>+	if (err)</div><div class='ctx'> 		return ERR_PTR(err);</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	return ep;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/infiniband/ulp/iser/iser_verbs.c b/drivers/infiniband/ulp/iser/iser_verbs.c<br/>index 14224ba44fd8..2dddabd8fcf9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/ulp/iser/iser_verbs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/ulp/iser/iser_verbs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/ulp/iser/iser_verbs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/ulp/iser/iser_verbs.c</a></div><div class='hunk'>@@ -613,8 +613,9 @@ id_failure:</div><div class='ctx'> 	ib_conn-&gt;cma_id = NULL;</div><div class='ctx'> addr_failure:</div><div class='ctx'> 	ib_conn-&gt;state = ISER_CONN_DOWN;</div><div class='add'>+	iser_conn_put(ib_conn, 1); /* deref ib conn's cma id */</div><div class='ctx'> connect_failure:</div><div class='del'>-	iser_conn_release(ib_conn, 1);</div><div class='add'>+	iser_conn_put(ib_conn, 1); /* deref ib conn deallocate */</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/infiniband/ulp/srpt/ib_srpt.c b/drivers/infiniband/ulp/srpt/ib_srpt.c<br/>index daf21b899999..5f6b7f63cdef 100644<br/>--- a/<a href='/drm-misc/tree/drivers/infiniband/ulp/srpt/ib_srpt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/infiniband/ulp/srpt/ib_srpt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/infiniband/ulp/srpt/ib_srpt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/infiniband/ulp/srpt/ib_srpt.c</a></div><div class='hunk'>@@ -1099,9 +1099,8 @@ static int srpt_map_sg_to_ib_sge(struct srpt_rdma_ch *ch,</div><div class='ctx'> 	dir = cmd-&gt;data_direction;</div><div class='ctx'> 	BUG_ON(dir == DMA_NONE);</div><div class='ctx'> </div><div class='del'>-	transport_do_task_sg_chain(cmd);</div><div class='del'>-	ioctx-&gt;sg = sg = sg_orig = cmd-&gt;t_tasks_sg_chained;</div><div class='del'>-	ioctx-&gt;sg_cnt = sg_cnt = cmd-&gt;t_tasks_sg_chained_no;</div><div class='add'>+	ioctx-&gt;sg = sg = sg_orig = cmd-&gt;t_data_sg;</div><div class='add'>+	ioctx-&gt;sg_cnt = sg_cnt = cmd-&gt;t_data_nents;</div><div class='ctx'> </div><div class='ctx'> 	count = ib_dma_map_sg(ch-&gt;sport-&gt;sdev-&gt;device, sg, sg_cnt,</div><div class='ctx'> 			      opposite_dma_dir(dir));</div><div class='hunk'>@@ -1769,7 +1768,7 @@ static int srpt_handle_cmd(struct srpt_rdma_ch *ch,</div><div class='ctx'> 		kref_put(&amp;send_ioctx-&gt;kref, srpt_put_send_ioctx_kref);</div><div class='ctx'> 		goto send_sense;</div><div class='ctx'> 	}</div><div class='del'>-	ret = transport_generic_allocate_tasks(cmd, srp_cmd-&gt;cdb);</div><div class='add'>+	ret = target_setup_cmd_from_cdb(cmd, srp_cmd-&gt;cdb);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		kref_put(&amp;send_ioctx-&gt;kref, srpt_put_send_ioctx_kref);</div><div class='ctx'> 		if (cmd-&gt;se_cmd_flags &amp; SCF_SCSI_RESERVATION_CONFLICT) {</div><div class='hunk'>@@ -4004,9 +4003,6 @@ static int __init srpt_init_module(void)</div><div class='ctx'> </div><div class='ctx'> 	srpt_target-&gt;tf_ops = srpt_template;</div><div class='ctx'> </div><div class='del'>-	/* Enable SG chaining */</div><div class='del'>-	srpt_target-&gt;tf_ops.task_sg_chaining = true;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Set up default attribute lists.</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig<br/>index 332597980817..55f7e57d4e42 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/Kconfig</a></div><div class='hunk'>@@ -25,10 +25,6 @@ config INPUT</div><div class='ctx'> </div><div class='ctx'> if INPUT</div><div class='ctx'> </div><div class='del'>-config INPUT_OF_MATRIX_KEYMAP</div><div class='del'>-	depends on USE_OF</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> config INPUT_FF_MEMLESS</div><div class='ctx'> 	tristate "Support for memoryless force-feedback devices"</div><div class='ctx'> 	help</div><div class='hunk'>@@ -68,6 +64,19 @@ config INPUT_SPARSEKMAP</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='ctx'> 	  module will be called sparse-keymap.</div><div class='ctx'> </div><div class='add'>+config INPUT_MATRIXKMAP</div><div class='add'>+	tristate "Matrix keymap support library"</div><div class='add'>+	help</div><div class='add'>+	  Say Y here if you are using a driver for an input</div><div class='add'>+	  device that uses matrix keymap. This option is only</div><div class='add'>+	  useful for out-of-tree drivers since in-tree drivers</div><div class='add'>+	  select it automatically.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called matrix-keymap.</div><div class='add'>+</div><div class='ctx'> comment "Userland interfaces"</div><div class='ctx'> </div><div class='ctx'> config INPUT_MOUSEDEV</div><div class='head'>diff --git a/drivers/input/Makefile b/drivers/input/Makefile<br/>index b173a13a73ca..5ca3f631497f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/Makefile</a></div><div class='hunk'>@@ -10,6 +10,7 @@ input-core-y := input.o input-compat.o input-mt.o ff-core.o</div><div class='ctx'> obj-$(CONFIG_INPUT_FF_MEMLESS)	+= ff-memless.o</div><div class='ctx'> obj-$(CONFIG_INPUT_POLLDEV)	+= input-polldev.o</div><div class='ctx'> obj-$(CONFIG_INPUT_SPARSEKMAP)	+= sparse-keymap.o</div><div class='add'>+obj-$(CONFIG_INPUT_MATRIXKMAP)	+= matrix-keymap.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_INPUT_MOUSEDEV)	+= mousedev.o</div><div class='ctx'> obj-$(CONFIG_INPUT_JOYDEV)	+= joydev.o</div><div class='hunk'>@@ -24,4 +25,3 @@ obj-$(CONFIG_INPUT_TOUCHSCREEN)	+= touchscreen/</div><div class='ctx'> obj-$(CONFIG_INPUT_MISC)	+= misc/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_INPUT_APMPOWER)	+= apm-power.o</div><div class='del'>-obj-$(CONFIG_INPUT_OF_MATRIX_KEYMAP) += of_keymap.o</div><div class='head'>diff --git a/drivers/input/evdev.c b/drivers/input/evdev.c<br/>index 4b2e10d5d641..6c58bfff01a3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/evdev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/evdev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/evdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/evdev.c</a></div><div class='hunk'>@@ -180,7 +180,10 @@ static int evdev_grab(struct evdev *evdev, struct evdev_client *client)</div><div class='ctx'> </div><div class='ctx'> static int evdev_ungrab(struct evdev *evdev, struct evdev_client *client)</div><div class='ctx'> {</div><div class='del'>-	if (evdev-&gt;grab != client)</div><div class='add'>+	struct evdev_client *grab = rcu_dereference_protected(evdev-&gt;grab,</div><div class='add'>+					lockdep_is_held(&amp;evdev-&gt;mutex));</div><div class='add'>+</div><div class='add'>+	if (grab != client)</div><div class='ctx'> 		return  -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	rcu_assign_pointer(evdev-&gt;grab, NULL);</div><div class='hunk'>@@ -259,8 +262,7 @@ static int evdev_release(struct inode *inode, struct file *file)</div><div class='ctx'> 	struct evdev *evdev = client-&gt;evdev;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;evdev-&gt;mutex);</div><div class='del'>-	if (evdev-&gt;grab == client)</div><div class='del'>-		evdev_ungrab(evdev, client);</div><div class='add'>+	evdev_ungrab(evdev, client);</div><div class='ctx'> 	mutex_unlock(&amp;evdev-&gt;mutex);</div><div class='ctx'> </div><div class='ctx'> 	evdev_detach_client(evdev, client);</div><div class='hunk'>@@ -343,7 +345,7 @@ static ssize_t evdev_write(struct file *file, const char __user *buffer,</div><div class='ctx'> 	struct input_event event;</div><div class='ctx'> 	int retval = 0;</div><div class='ctx'> </div><div class='del'>-	if (count &lt; input_event_size())</div><div class='add'>+	if (count != 0 &amp;&amp; count &lt; input_event_size())</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	retval = mutex_lock_interruptible(&amp;evdev-&gt;mutex);</div><div class='hunk'>@@ -355,7 +357,8 @@ static ssize_t evdev_write(struct file *file, const char __user *buffer,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	do {</div><div class='add'>+	while (retval + input_event_size() &lt;= count) {</div><div class='add'>+</div><div class='ctx'> 		if (input_event_from_user(buffer + retval, &amp;event)) {</div><div class='ctx'> 			retval = -EFAULT;</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -364,7 +367,7 @@ static ssize_t evdev_write(struct file *file, const char __user *buffer,</div><div class='ctx'> </div><div class='ctx'> 		input_inject_event(&amp;evdev-&gt;handle,</div><div class='ctx'> 				   event.type, event.code, event.value);</div><div class='del'>-	} while (retval + input_event_size() &lt;= count);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='ctx'> 	mutex_unlock(&amp;evdev-&gt;mutex);</div><div class='hunk'>@@ -395,35 +398,49 @@ static ssize_t evdev_read(struct file *file, char __user *buffer,</div><div class='ctx'> 	struct evdev_client *client = file-&gt;private_data;</div><div class='ctx'> 	struct evdev *evdev = client-&gt;evdev;</div><div class='ctx'> 	struct input_event event;</div><div class='del'>-	int retval = 0;</div><div class='add'>+	size_t read = 0;</div><div class='add'>+	int error;</div><div class='ctx'> </div><div class='del'>-	if (count &lt; input_event_size())</div><div class='add'>+	if (count != 0 &amp;&amp; count &lt; input_event_size())</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!(file-&gt;f_flags &amp; O_NONBLOCK)) {</div><div class='del'>-		retval = wait_event_interruptible(evdev-&gt;wait,</div><div class='del'>-				client-&gt;packet_head != client-&gt;tail ||</div><div class='del'>-				!evdev-&gt;exist);</div><div class='del'>-		if (retval)</div><div class='del'>-			return retval;</div><div class='del'>-	}</div><div class='add'>+	for (;;) {</div><div class='add'>+		if (!evdev-&gt;exist)</div><div class='add'>+			return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (!evdev-&gt;exist)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		if (client-&gt;packet_head == client-&gt;tail &amp;&amp;</div><div class='add'>+		    (file-&gt;f_flags &amp; O_NONBLOCK))</div><div class='add'>+			return -EAGAIN;</div><div class='ctx'> </div><div class='del'>-	while (retval + input_event_size() &lt;= count &amp;&amp;</div><div class='del'>-	       evdev_fetch_next_event(client, &amp;event)) {</div><div class='add'>+		/*</div><div class='add'>+		 * count == 0 is special - no IO is done but we check</div><div class='add'>+		 * for error conditions (see above).</div><div class='add'>+		 */</div><div class='add'>+		if (count == 0)</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-		if (input_event_to_user(buffer + retval, &amp;event))</div><div class='del'>-			return -EFAULT;</div><div class='add'>+		while (read + input_event_size() &lt;= count &amp;&amp;</div><div class='add'>+		       evdev_fetch_next_event(client, &amp;event)) {</div><div class='ctx'> </div><div class='del'>-		retval += input_event_size();</div><div class='del'>-	}</div><div class='add'>+			if (input_event_to_user(buffer + read, &amp;event))</div><div class='add'>+				return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	if (retval == 0 &amp;&amp; (file-&gt;f_flags &amp; O_NONBLOCK))</div><div class='del'>-		return -EAGAIN;</div><div class='add'>+			read += input_event_size();</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	return retval;</div><div class='add'>+		if (read)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (!(file-&gt;f_flags &amp; O_NONBLOCK)) {</div><div class='add'>+			error = wait_event_interruptible(evdev-&gt;wait,</div><div class='add'>+					client-&gt;packet_head != client-&gt;tail ||</div><div class='add'>+					!evdev-&gt;exist);</div><div class='add'>+			if (error)</div><div class='add'>+				return error;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return read;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* No kernel lock - fine */</div><div class='head'>diff --git a/drivers/input/ff-memless.c b/drivers/input/ff-memless.c<br/>index 117a59aaa70e..5f558851d646 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/ff-memless.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/ff-memless.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/ff-memless.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/ff-memless.c</a></div><div class='hunk'>@@ -31,8 +31,7 @@</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;</div><div class='del'>-</div><div class='del'>-#include "fixp-arith.h"</div><div class='add'>+#include &lt;linux/fixp-arith.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Anssi Hannula &lt;anssi.hannula@gmail.com&gt;");</div><div class='head'>diff --git a/drivers/input/gameport/emu10k1-gp.c b/drivers/input/gameport/emu10k1-gp.c<br/>index 422aa0a6b77f..daceafe7ee7d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/gameport/emu10k1-gp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/gameport/emu10k1-gp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/gameport/emu10k1-gp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/gameport/emu10k1-gp.c</a></div><div class='hunk'>@@ -125,15 +125,4 @@ static struct pci_driver emu_driver = {</div><div class='ctx'>         .remove =       __devexit_p(emu_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init emu_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;emu_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit emu_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;emu_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(emu_init);</div><div class='del'>-module_exit(emu_exit);</div><div class='add'>+module_pci_driver(emu_driver);</div><div class='head'>diff --git a/drivers/input/gameport/fm801-gp.c b/drivers/input/gameport/fm801-gp.c<br/>index a3b70ff21018..48ad3829ff20 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/gameport/fm801-gp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/gameport/fm801-gp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/gameport/fm801-gp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/gameport/fm801-gp.c</a></div><div class='hunk'>@@ -144,6 +144,7 @@ static const struct pci_device_id fm801_gp_id_table[] = {</div><div class='ctx'> 	{ PCI_VENDOR_ID_FORTEMEDIA, PCI_DEVICE_ID_FM801_GP, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0  },</div><div class='ctx'> 	{ 0 }</div><div class='ctx'> };</div><div class='add'>+MODULE_DEVICE_TABLE(pci, fm801_gp_id_table);</div><div class='ctx'> </div><div class='ctx'> static struct pci_driver fm801_gp_driver = {</div><div class='ctx'> 	.name =		"FM801_gameport",</div><div class='hunk'>@@ -152,20 +153,7 @@ static struct pci_driver fm801_gp_driver = {</div><div class='ctx'> 	.remove =	__devexit_p(fm801_gp_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init fm801_gp_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;fm801_gp_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit fm801_gp_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;fm801_gp_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(fm801_gp_init);</div><div class='del'>-module_exit(fm801_gp_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DEVICE_TABLE(pci, fm801_gp_id_table);</div><div class='add'>+module_pci_driver(fm801_gp_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("FM801 gameport driver");</div><div class='ctx'> MODULE_AUTHOR("Takashi Iwai &lt;tiwai@suse.de&gt;");</div><div class='head'>diff --git a/drivers/input/joystick/a3d.c b/drivers/input/joystick/a3d.c<br/>index 1639ab2b94b7..85bc8dc07cfc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/a3d.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/a3d.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/a3d.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/a3d.c</a></div><div class='hunk'>@@ -413,15 +413,4 @@ static struct gameport_driver a3d_drv = {</div><div class='ctx'> 	.disconnect	= a3d_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init a3d_init(void)</div><div class='del'>-{</div><div class='del'>-	return gameport_register_driver(&amp;a3d_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit a3d_exit(void)</div><div class='del'>-{</div><div class='del'>-	gameport_unregister_driver(&amp;a3d_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(a3d_init);</div><div class='del'>-module_exit(a3d_exit);</div><div class='add'>+module_gameport_driver(a3d_drv);</div><div class='head'>diff --git a/drivers/input/joystick/adi.c b/drivers/input/joystick/adi.c<br/>index b992fbf91f2f..0cbfd2dfabf4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/adi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/adi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/adi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/adi.c</a></div><div class='hunk'>@@ -557,10 +557,6 @@ static void adi_disconnect(struct gameport *gameport)</div><div class='ctx'> 	kfree(port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The gameport device structure.</div><div class='del'>- */</div><div class='del'>-</div><div class='ctx'> static struct gameport_driver adi_drv = {</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "adi",</div><div class='hunk'>@@ -570,15 +566,4 @@ static struct gameport_driver adi_drv = {</div><div class='ctx'> 	.disconnect	= adi_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init adi_init(void)</div><div class='del'>-{</div><div class='del'>-	return gameport_register_driver(&amp;adi_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit adi_exit(void)</div><div class='del'>-{</div><div class='del'>-	gameport_unregister_driver(&amp;adi_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(adi_init);</div><div class='del'>-module_exit(adi_exit);</div><div class='add'>+module_gameport_driver(adi_drv);</div><div class='head'>diff --git a/drivers/input/joystick/as5011.c b/drivers/input/joystick/as5011.c<br/>index 3063464474bf..57d19d4e0a2d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/as5011.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/as5011.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/as5011.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/as5011.c</a></div><div class='hunk'>@@ -231,6 +231,7 @@ static int __devinit as5011_probe(struct i2c_client *client,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!i2c_check_functionality(client-&gt;adapter,</div><div class='add'>+				     I2C_FUNC_NOSTART |</div><div class='ctx'> 				     I2C_FUNC_PROTOCOL_MANGLING)) {</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev,</div><div class='ctx'> 			"need i2c bus that supports protocol mangling\n");</div><div class='head'>diff --git a/drivers/input/joystick/cobra.c b/drivers/input/joystick/cobra.c<br/>index 3497b87c3d05..65367e44d715 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/cobra.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/cobra.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/cobra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/cobra.c</a></div><div class='hunk'>@@ -261,15 +261,4 @@ static struct gameport_driver cobra_drv = {</div><div class='ctx'> 	.disconnect	= cobra_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init cobra_init(void)</div><div class='del'>-{</div><div class='del'>-	return gameport_register_driver(&amp;cobra_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit cobra_exit(void)</div><div class='del'>-{</div><div class='del'>-	gameport_unregister_driver(&amp;cobra_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(cobra_init);</div><div class='del'>-module_exit(cobra_exit);</div><div class='add'>+module_gameport_driver(cobra_drv);</div><div class='head'>diff --git a/drivers/input/joystick/gf2k.c b/drivers/input/joystick/gf2k.c<br/>index 0536b1b2f018..ab1cf2882004 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/gf2k.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/gf2k.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/gf2k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/gf2k.c</a></div><div class='hunk'>@@ -373,15 +373,4 @@ static struct gameport_driver gf2k_drv = {</div><div class='ctx'> 	.disconnect	= gf2k_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init gf2k_init(void)</div><div class='del'>-{</div><div class='del'>-	return gameport_register_driver(&amp;gf2k_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit gf2k_exit(void)</div><div class='del'>-{</div><div class='del'>-	gameport_unregister_driver(&amp;gf2k_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(gf2k_init);</div><div class='del'>-module_exit(gf2k_exit);</div><div class='add'>+module_gameport_driver(gf2k_drv);</div><div class='head'>diff --git a/drivers/input/joystick/grip.c b/drivers/input/joystick/grip.c<br/>index fc55899ba6c5..9e1beff57c33 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/grip.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/grip.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/grip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/grip.c</a></div><div class='hunk'>@@ -424,15 +424,4 @@ static struct gameport_driver grip_drv = {</div><div class='ctx'> 	.disconnect	= grip_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init grip_init(void)</div><div class='del'>-{</div><div class='del'>-	return gameport_register_driver(&amp;grip_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit grip_exit(void)</div><div class='del'>-{</div><div class='del'>-	gameport_unregister_driver(&amp;grip_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(grip_init);</div><div class='del'>-module_exit(grip_exit);</div><div class='add'>+module_gameport_driver(grip_drv);</div><div class='head'>diff --git a/drivers/input/joystick/grip_mp.c b/drivers/input/joystick/grip_mp.c<br/>index 2d47baf47769..c0f9c7b7eb4e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/grip_mp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/grip_mp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/grip_mp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/grip_mp.c</a></div><div class='hunk'>@@ -687,15 +687,4 @@ static struct gameport_driver grip_drv = {</div><div class='ctx'> 	.disconnect	= grip_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init grip_init(void)</div><div class='del'>-{</div><div class='del'>-	return gameport_register_driver(&amp;grip_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit grip_exit(void)</div><div class='del'>-{</div><div class='del'>-	gameport_unregister_driver(&amp;grip_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(grip_init);</div><div class='del'>-module_exit(grip_exit);</div><div class='add'>+module_gameport_driver(grip_drv);</div><div class='head'>diff --git a/drivers/input/joystick/guillemot.c b/drivers/input/joystick/guillemot.c<br/>index 4058d4b272fe..55196f730af6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/guillemot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/guillemot.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/guillemot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/guillemot.c</a></div><div class='hunk'>@@ -281,15 +281,4 @@ static struct gameport_driver guillemot_drv = {</div><div class='ctx'> 	.disconnect	= guillemot_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init guillemot_init(void)</div><div class='del'>-{</div><div class='del'>-	return gameport_register_driver(&amp;guillemot_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit guillemot_exit(void)</div><div class='del'>-{</div><div class='del'>-	gameport_unregister_driver(&amp;guillemot_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(guillemot_init);</div><div class='del'>-module_exit(guillemot_exit);</div><div class='add'>+module_gameport_driver(guillemot_drv);</div><div class='head'>diff --git a/drivers/input/joystick/iforce/iforce-main.c b/drivers/input/joystick/iforce/iforce-main.c<br/>index 405febd94f24..daeeb4c7e3b0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/iforce/iforce-main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/iforce/iforce-main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/iforce/iforce-main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/iforce/iforce-main.c</a></div><div class='hunk'>@@ -317,7 +317,8 @@ int iforce_init_device(struct iforce *iforce)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 	if (i == 20) { /* 5 seconds */</div><div class='del'>-		err("Timeout waiting for response from device.");</div><div class='add'>+		dev_err(&amp;input_dev-&gt;dev,</div><div class='add'>+			"Timeout waiting for response from device.\n");</div><div class='ctx'> 		error = -ENODEV;</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/input/joystick/iforce/iforce-packets.c b/drivers/input/joystick/iforce/iforce-packets.c<br/>index a17b50016009..08f98f2eaf88 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/iforce/iforce-packets.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/iforce/iforce-packets.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/iforce/iforce-packets.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/iforce/iforce-packets.c</a></div><div class='hunk'>@@ -257,7 +257,8 @@ int iforce_get_id_packet(struct iforce *iforce, char *packet)</div><div class='ctx'> </div><div class='ctx'> 		status = usb_submit_urb(iforce-&gt;ctrl, GFP_ATOMIC);</div><div class='ctx'> 		if (status) {</div><div class='del'>-			err("usb_submit_urb failed %d", status);</div><div class='add'>+			dev_err(&amp;iforce-&gt;intf-&gt;dev,</div><div class='add'>+				"usb_submit_urb failed %d\n", status);</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -265,12 +266,14 @@ int iforce_get_id_packet(struct iforce *iforce, char *packet)</div><div class='ctx'> 			iforce-&gt;ctrl-&gt;status != -EINPROGRESS, HZ);</div><div class='ctx'> </div><div class='ctx'> 		if (iforce-&gt;ctrl-&gt;status) {</div><div class='del'>-			dbg("iforce-&gt;ctrl-&gt;status = %d", iforce-&gt;ctrl-&gt;status);</div><div class='add'>+			dev_dbg(&amp;iforce-&gt;intf-&gt;dev,</div><div class='add'>+				"iforce-&gt;ctrl-&gt;status = %d\n",</div><div class='add'>+				iforce-&gt;ctrl-&gt;status);</div><div class='ctx'> 			usb_unlink_urb(iforce-&gt;ctrl);</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='ctx'> #else</div><div class='del'>-		dbg("iforce_get_id_packet: iforce-&gt;bus = USB!");</div><div class='add'>+		printk(KERN_DEBUG "iforce_get_id_packet: iforce-&gt;bus = USB!\n");</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -289,12 +292,15 @@ int iforce_get_id_packet(struct iforce *iforce, char *packet)</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='ctx'> #else</div><div class='del'>-		err("iforce_get_id_packet: iforce-&gt;bus = SERIO!");</div><div class='add'>+		dev_err(&amp;iforce-&gt;dev-&gt;dev,</div><div class='add'>+			"iforce_get_id_packet: iforce-&gt;bus = SERIO!\n");</div><div class='ctx'> #endif</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		err("iforce_get_id_packet: iforce-&gt;bus = %d", iforce-&gt;bus);</div><div class='add'>+		dev_err(&amp;iforce-&gt;dev-&gt;dev,</div><div class='add'>+			"iforce_get_id_packet: iforce-&gt;bus = %d\n",</div><div class='add'>+			iforce-&gt;bus);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/input/joystick/iforce/iforce-usb.c b/drivers/input/joystick/iforce/iforce-usb.c<br/>index 6c96631ae5d9..d96aa27dfcdc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/iforce/iforce-usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/iforce/iforce-usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/iforce/iforce-usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/iforce/iforce-usb.c</a></div><div class='hunk'>@@ -64,7 +64,7 @@ void iforce_usb_xmit(struct iforce *iforce)</div><div class='ctx'> </div><div class='ctx'> 	if ( (n=usb_submit_urb(iforce-&gt;out, GFP_ATOMIC)) ) {</div><div class='ctx'> 		clear_bit(IFORCE_XMIT_RUNNING, iforce-&gt;xmit_flags);</div><div class='del'>-		dev_warn(&amp;iforce-&gt;dev-&gt;dev, "usb_submit_urb failed %d\n", n);</div><div class='add'>+		dev_warn(&amp;iforce-&gt;intf-&gt;dev, "usb_submit_urb failed %d\n", n);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* The IFORCE_XMIT_RUNNING bit is not cleared here. That's intended.</div><div class='hunk'>@@ -76,6 +76,7 @@ void iforce_usb_xmit(struct iforce *iforce)</div><div class='ctx'> static void iforce_usb_irq(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct iforce *iforce = urb-&gt;context;</div><div class='add'>+	struct device *dev = &amp;iforce-&gt;intf-&gt;dev;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='hunk'>@@ -86,11 +87,12 @@ static void iforce_usb_irq(struct urb *urb)</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		/* this urb is terminated, clean up */</div><div class='del'>-		dbg("%s - urb shutting down with status: %d",</div><div class='del'>-		    __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(dev, "%s - urb shutting down with status: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='del'>-		dbg("%s - urb has status of: %d", __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(dev, "%s - urb has status of: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -100,8 +102,8 @@ static void iforce_usb_irq(struct urb *urb)</div><div class='ctx'> exit:</div><div class='ctx'> 	status = usb_submit_urb (urb, GFP_ATOMIC);</div><div class='ctx'> 	if (status)</div><div class='del'>-		err ("%s - usb_submit_urb failed with result %d",</div><div class='del'>-		     __func__, status);</div><div class='add'>+		dev_err(dev, "%s - usb_submit_urb failed with result %d\n",</div><div class='add'>+			__func__, status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void iforce_usb_out(struct urb *urb)</div><div class='hunk'>@@ -110,7 +112,8 @@ static void iforce_usb_out(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	if (urb-&gt;status) {</div><div class='ctx'> 		clear_bit(IFORCE_XMIT_RUNNING, iforce-&gt;xmit_flags);</div><div class='del'>-		dbg("urb-&gt;status %d, exiting", urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;iforce-&gt;intf-&gt;dev, "urb-&gt;status %d, exiting\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -155,6 +158,7 @@ static int iforce_usb_probe(struct usb_interface *intf,</div><div class='ctx'> </div><div class='ctx'> 	iforce-&gt;bus = IFORCE_USB;</div><div class='ctx'> 	iforce-&gt;usbdev = dev;</div><div class='add'>+	iforce-&gt;intf = intf;</div><div class='ctx'> </div><div class='ctx'> 	iforce-&gt;cr.bRequestType = USB_TYPE_VENDOR | USB_DIR_IN | USB_RECIP_INTERFACE;</div><div class='ctx'> 	iforce-&gt;cr.wIndex = 0;</div><div class='head'>diff --git a/drivers/input/joystick/iforce/iforce.h b/drivers/input/joystick/iforce/iforce.h<br/>index 9f494b75848a..b1d7d9b0eb86 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/iforce/iforce.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/iforce/iforce.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/iforce/iforce.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/iforce/iforce.h</a></div><div class='hunk'>@@ -115,6 +115,7 @@ struct iforce {</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_JOYSTICK_IFORCE_USB</div><div class='ctx'> 	struct usb_device *usbdev;	/* USB transfer */</div><div class='add'>+	struct usb_interface *intf;</div><div class='ctx'> 	struct urb *irq, *out, *ctrl;</div><div class='ctx'> 	struct usb_ctrlrequest cr;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/input/joystick/interact.c b/drivers/input/joystick/interact.c<br/>index 16fb19d1ca25..88c22623a2e8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/interact.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/interact.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/interact.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/interact.c</a></div><div class='hunk'>@@ -311,15 +311,4 @@ static struct gameport_driver interact_drv = {</div><div class='ctx'> 	.disconnect	= interact_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init interact_init(void)</div><div class='del'>-{</div><div class='del'>-	return gameport_register_driver(&amp;interact_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit interact_exit(void)</div><div class='del'>-{</div><div class='del'>-	gameport_unregister_driver(&amp;interact_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(interact_init);</div><div class='del'>-module_exit(interact_exit);</div><div class='add'>+module_gameport_driver(interact_drv);</div><div class='head'>diff --git a/drivers/input/joystick/joydump.c b/drivers/input/joystick/joydump.c<br/>index cd894a0564a2..7eb878bab968 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/joydump.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/joydump.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/joydump.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/joydump.c</a></div><div class='hunk'>@@ -159,15 +159,4 @@ static struct gameport_driver joydump_drv = {</div><div class='ctx'> 	.disconnect	= joydump_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init joydump_init(void)</div><div class='del'>-{</div><div class='del'>-	return gameport_register_driver(&amp;joydump_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit joydump_exit(void)</div><div class='del'>-{</div><div class='del'>-	gameport_unregister_driver(&amp;joydump_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(joydump_init);</div><div class='del'>-module_exit(joydump_exit);</div><div class='add'>+module_gameport_driver(joydump_drv);</div><div class='head'>diff --git a/drivers/input/joystick/magellan.c b/drivers/input/joystick/magellan.c<br/>index 40e40780747d..9fb153eef2fc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/magellan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/magellan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/magellan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/magellan.c</a></div><div class='hunk'>@@ -222,19 +222,4 @@ static struct serio_driver magellan_drv = {</div><div class='ctx'> 	.disconnect	= magellan_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init magellan_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;magellan_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit magellan_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;magellan_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(magellan_init);</div><div class='del'>-module_exit(magellan_exit);</div><div class='add'>+module_serio_driver(magellan_drv);</div><div class='head'>diff --git a/drivers/input/joystick/sidewinder.c b/drivers/input/joystick/sidewinder.c<br/>index b8d86115644b..04c69af37148 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/sidewinder.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/sidewinder.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/sidewinder.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/sidewinder.c</a></div><div class='hunk'>@@ -820,15 +820,4 @@ static struct gameport_driver sw_drv = {</div><div class='ctx'> 	.disconnect	= sw_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init sw_init(void)</div><div class='del'>-{</div><div class='del'>-	return gameport_register_driver(&amp;sw_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sw_exit(void)</div><div class='del'>-{</div><div class='del'>-	gameport_unregister_driver(&amp;sw_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sw_init);</div><div class='del'>-module_exit(sw_exit);</div><div class='add'>+module_gameport_driver(sw_drv);</div><div class='head'>diff --git a/drivers/input/joystick/spaceball.c b/drivers/input/joystick/spaceball.c<br/>index 0cd9b29356a8..80a7b27a457a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/spaceball.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/spaceball.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/spaceball.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/spaceball.c</a></div><div class='hunk'>@@ -296,19 +296,4 @@ static struct serio_driver spaceball_drv = {</div><div class='ctx'> 	.disconnect	= spaceball_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init spaceball_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;spaceball_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit spaceball_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;spaceball_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(spaceball_init);</div><div class='del'>-module_exit(spaceball_exit);</div><div class='add'>+module_serio_driver(spaceball_drv);</div><div class='head'>diff --git a/drivers/input/joystick/spaceorb.c b/drivers/input/joystick/spaceorb.c<br/>index a694bf8e557b..a41f291652e6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/spaceorb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/spaceorb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/spaceorb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/spaceorb.c</a></div><div class='hunk'>@@ -237,19 +237,4 @@ static struct serio_driver spaceorb_drv = {</div><div class='ctx'> 	.disconnect	= spaceorb_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init spaceorb_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;spaceorb_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit spaceorb_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;spaceorb_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(spaceorb_init);</div><div class='del'>-module_exit(spaceorb_exit);</div><div class='add'>+module_serio_driver(spaceorb_drv);</div><div class='head'>diff --git a/drivers/input/joystick/stinger.c b/drivers/input/joystick/stinger.c<br/>index e0db9f5e4b41..0f51a60e14a7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/stinger.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/stinger.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/stinger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/stinger.c</a></div><div class='hunk'>@@ -208,19 +208,4 @@ static struct serio_driver stinger_drv = {</div><div class='ctx'> 	.disconnect	= stinger_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init stinger_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;stinger_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit stinger_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;stinger_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(stinger_init);</div><div class='del'>-module_exit(stinger_exit);</div><div class='add'>+module_serio_driver(stinger_drv);</div><div class='head'>diff --git a/drivers/input/joystick/tmdc.c b/drivers/input/joystick/tmdc.c<br/>index d6c609807115..5ef9bcdb0345 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/tmdc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/tmdc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/tmdc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/tmdc.c</a></div><div class='hunk'>@@ -436,15 +436,4 @@ static struct gameport_driver tmdc_drv = {</div><div class='ctx'> 	.disconnect	= tmdc_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init tmdc_init(void)</div><div class='del'>-{</div><div class='del'>-	return gameport_register_driver(&amp;tmdc_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit tmdc_exit(void)</div><div class='del'>-{</div><div class='del'>-	gameport_unregister_driver(&amp;tmdc_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(tmdc_init);</div><div class='del'>-module_exit(tmdc_exit);</div><div class='add'>+module_gameport_driver(tmdc_drv);</div><div class='head'>diff --git a/drivers/input/joystick/twidjoy.c b/drivers/input/joystick/twidjoy.c<br/>index 3f4ec73c9553..2556a8193579 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/twidjoy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/twidjoy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/twidjoy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/twidjoy.c</a></div><div class='hunk'>@@ -257,19 +257,4 @@ static struct serio_driver twidjoy_drv = {</div><div class='ctx'> 	.disconnect	= twidjoy_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init twidjoy_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;twidjoy_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit twidjoy_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;twidjoy_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(twidjoy_init);</div><div class='del'>-module_exit(twidjoy_exit);</div><div class='add'>+module_serio_driver(twidjoy_drv);</div><div class='head'>diff --git a/drivers/input/joystick/warrior.c b/drivers/input/joystick/warrior.c<br/>index f72c83e15e60..23b3071abb6e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/warrior.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/warrior.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/warrior.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/warrior.c</a></div><div class='hunk'>@@ -217,19 +217,4 @@ static struct serio_driver warrior_drv = {</div><div class='ctx'> 	.disconnect	= warrior_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init warrior_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;warrior_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit warrior_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;warrior_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(warrior_init);</div><div class='del'>-module_exit(warrior_exit);</div><div class='add'>+module_serio_driver(warrior_drv);</div><div class='head'>diff --git a/drivers/input/joystick/xpad.c b/drivers/input/joystick/xpad.c<br/>index fd7a0d5bc94d..ee16fb67b7ae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/xpad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/xpad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/xpad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/xpad.c</a></div><div class='hunk'>@@ -252,6 +252,7 @@ MODULE_DEVICE_TABLE (usb, xpad_table);</div><div class='ctx'> struct usb_xpad {</div><div class='ctx'> 	struct input_dev *dev;		/* input device interface */</div><div class='ctx'> 	struct usb_device *udev;	/* usb device */</div><div class='add'>+	struct usb_interface *intf;	/* usb interface */</div><div class='ctx'> </div><div class='ctx'> 	int pad_present;</div><div class='ctx'> </div><div class='hunk'>@@ -457,6 +458,7 @@ static void xpad360w_process_packet(struct usb_xpad *xpad, u16 cmd, unsigned cha</div><div class='ctx'> static void xpad_irq_in(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct usb_xpad *xpad = urb-&gt;context;</div><div class='add'>+	struct device *dev = &amp;xpad-&gt;intf-&gt;dev;</div><div class='ctx'> 	int retval, status;</div><div class='ctx'> </div><div class='ctx'> 	status = urb-&gt;status;</div><div class='hunk'>@@ -469,11 +471,11 @@ static void xpad_irq_in(struct urb *urb)</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		/* this urb is terminated, clean up */</div><div class='del'>-		dbg("%s - urb shutting down with status: %d",</div><div class='add'>+		dev_dbg(dev, "%s - urb shutting down with status: %d\n",</div><div class='ctx'> 			__func__, status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='del'>-		dbg("%s - nonzero urb status received: %d",</div><div class='add'>+		dev_dbg(dev, "%s - nonzero urb status received: %d\n",</div><div class='ctx'> 			__func__, status);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -492,12 +494,15 @@ static void xpad_irq_in(struct urb *urb)</div><div class='ctx'> exit:</div><div class='ctx'> 	retval = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		err ("%s - usb_submit_urb failed with result %d",</div><div class='del'>-		     __func__, retval);</div><div class='add'>+		dev_err(dev, "%s - usb_submit_urb failed with result %d\n",</div><div class='add'>+			__func__, retval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xpad_bulk_out(struct urb *urb)</div><div class='ctx'> {</div><div class='add'>+	struct usb_xpad *xpad = urb-&gt;context;</div><div class='add'>+	struct device *dev = &amp;xpad-&gt;intf-&gt;dev;</div><div class='add'>+</div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		/* success */</div><div class='hunk'>@@ -506,16 +511,20 @@ static void xpad_bulk_out(struct urb *urb)</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		/* this urb is terminated, clean up */</div><div class='del'>-		dbg("%s - urb shutting down with status: %d", __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(dev, "%s - urb shutting down with status: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		dbg("%s - nonzero urb status received: %d", __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(dev, "%s - nonzero urb status received: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_JOYSTICK_XPAD_FF) || defined(CONFIG_JOYSTICK_XPAD_LEDS)</div><div class='ctx'> static void xpad_irq_out(struct urb *urb)</div><div class='ctx'> {</div><div class='add'>+	struct usb_xpad *xpad = urb-&gt;context;</div><div class='add'>+	struct device *dev = &amp;xpad-&gt;intf-&gt;dev;</div><div class='ctx'> 	int retval, status;</div><div class='ctx'> </div><div class='ctx'> 	status = urb-&gt;status;</div><div class='hunk'>@@ -529,19 +538,21 @@ static void xpad_irq_out(struct urb *urb)</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		/* this urb is terminated, clean up */</div><div class='del'>-		dbg("%s - urb shutting down with status: %d", __func__, status);</div><div class='add'>+		dev_dbg(dev, "%s - urb shutting down with status: %d\n",</div><div class='add'>+			__func__, status);</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		dbg("%s - nonzero urb status received: %d", __func__, status);</div><div class='add'>+		dev_dbg(dev, "%s - nonzero urb status received: %d\n",</div><div class='add'>+			__func__, status);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> exit:</div><div class='ctx'> 	retval = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		err("%s - usb_submit_urb failed with result %d",</div><div class='del'>-		    __func__, retval);</div><div class='add'>+		dev_err(dev, "%s - usb_submit_urb failed with result %d\n",</div><div class='add'>+			__func__, retval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xpad_init_output(struct usb_interface *intf, struct usb_xpad *xpad)</div><div class='hunk'>@@ -654,7 +665,8 @@ static int xpad_play_effect(struct input_dev *dev, void *data, struct ff_effect</div><div class='ctx'> 			return usb_submit_urb(xpad-&gt;irq_out, GFP_ATOMIC);</div><div class='ctx'> </div><div class='ctx'> 		default:</div><div class='del'>-			dbg("%s - rumble command sent to unsupported xpad type: %d",</div><div class='add'>+			dev_dbg(&amp;xpad-&gt;dev-&gt;dev,</div><div class='add'>+				"%s - rumble command sent to unsupported xpad type: %d\n",</div><div class='ctx'> 				__func__, xpad-&gt;xtype);</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -844,6 +856,7 @@ static int xpad_probe(struct usb_interface *intf, const struct usb_device_id *id</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	xpad-&gt;udev = udev;</div><div class='add'>+	xpad-&gt;intf = intf;</div><div class='ctx'> 	xpad-&gt;mapping = xpad_device[i].mapping;</div><div class='ctx'> 	xpad-&gt;xtype = xpad_device[i].xtype;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/input/joystick/zhenhua.c b/drivers/input/joystick/zhenhua.c<br/>index b5853125c898..c4de4388fd7f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/joystick/zhenhua.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/joystick/zhenhua.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/joystick/zhenhua.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/joystick/zhenhua.c</a></div><div class='hunk'>@@ -225,19 +225,4 @@ static struct serio_driver zhenhua_drv = {</div><div class='ctx'> 	.disconnect	= zhenhua_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init zhenhua_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;zhenhua_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit zhenhua_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;zhenhua_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(zhenhua_init);</div><div class='del'>-module_exit(zhenhua_exit);</div><div class='add'>+module_serio_driver(zhenhua_drv);</div><div class='head'>diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig<br/>index f354813a13e8..c0e11ecc646f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/Kconfig</a></div><div class='hunk'>@@ -166,6 +166,7 @@ config KEYBOARD_LKKBD</div><div class='ctx'> config KEYBOARD_EP93XX</div><div class='ctx'> 	tristate "EP93xx Matrix Keypad support"</div><div class='ctx'> 	depends on ARCH_EP93XX</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here to enable the matrix keypad on the Cirrus EP93XX.</div><div class='ctx'> </div><div class='hunk'>@@ -224,6 +225,7 @@ config KEYBOARD_TCA6416</div><div class='ctx'> config KEYBOARD_TCA8418</div><div class='ctx'> 	tristate "TCA8418 Keypad Support"</div><div class='ctx'> 	depends on I2C</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver implements basic keypad functionality</div><div class='ctx'> 	  for keys connected through TCA8418 keypad decoder.</div><div class='hunk'>@@ -240,6 +242,7 @@ config KEYBOARD_TCA8418</div><div class='ctx'> config KEYBOARD_MATRIX</div><div class='ctx'> 	tristate "GPIO driven matrix keypad support"</div><div class='ctx'> 	depends on GENERIC_GPIO</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enable support for GPIO driven matrix keypad.</div><div class='ctx'> </div><div class='hunk'>@@ -309,6 +312,17 @@ config KEYBOARD_LM8323</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='ctx'> 	  module will be called lm8323.</div><div class='ctx'> </div><div class='add'>+config KEYBOARD_LM8333</div><div class='add'>+	tristate "LM8333 keypad chip"</div><div class='add'>+	depends on I2C</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='add'>+	help</div><div class='add'>+	  If you say yes here you get support for the National Semiconductor</div><div class='add'>+	  LM8333 keypad controller.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called lm8333.</div><div class='add'>+</div><div class='ctx'> config KEYBOARD_LOCOMO</div><div class='ctx'> 	tristate "LoCoMo Keyboard Support"</div><div class='ctx'> 	depends on SHARP_LOCOMO</div><div class='hunk'>@@ -366,6 +380,7 @@ config KEYBOARD_MPR121</div><div class='ctx'> config KEYBOARD_IMX</div><div class='ctx'> 	tristate "IMX keypad support"</div><div class='ctx'> 	depends on ARCH_MXC</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enable support for IMX keypad port.</div><div class='ctx'> </div><div class='hunk'>@@ -384,6 +399,7 @@ config KEYBOARD_NEWTON</div><div class='ctx'> config KEYBOARD_NOMADIK</div><div class='ctx'> 	tristate "ST-Ericsson Nomadik SKE keyboard"</div><div class='ctx'> 	depends on PLAT_NOMADIK</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to use a keypad provided on the SKE controller</div><div class='ctx'> 	  used on the Ux500 and Nomadik platforms</div><div class='hunk'>@@ -394,7 +410,7 @@ config KEYBOARD_NOMADIK</div><div class='ctx'> config KEYBOARD_TEGRA</div><div class='ctx'> 	tristate "NVIDIA Tegra internal matrix keyboard controller support"</div><div class='ctx'> 	depends on ARCH_TEGRA</div><div class='del'>-	select INPUT_OF_MATRIX_KEYMAP if USE_OF</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to use a matrix keyboard connected directly</div><div class='ctx'> 	  to the internal keyboard controller on Tegra SoCs.</div><div class='hunk'>@@ -432,6 +448,7 @@ config KEYBOARD_PXA930_ROTARY</div><div class='ctx'> config KEYBOARD_PMIC8XXX</div><div class='ctx'> 	tristate "Qualcomm PMIC8XXX keypad support"</div><div class='ctx'> 	depends on MFD_PM8XXX</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to enable the driver for the PMIC8XXX</div><div class='ctx'> 	  keypad provided as a reference design from Qualcomm. This is intended</div><div class='hunk'>@@ -443,6 +460,7 @@ config KEYBOARD_PMIC8XXX</div><div class='ctx'> config KEYBOARD_SAMSUNG</div><div class='ctx'> 	tristate "Samsung keypad support"</div><div class='ctx'> 	depends on HAVE_CLK</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to use the keypad on your Samsung mobile</div><div class='ctx'> 	  device.</div><div class='hunk'>@@ -485,6 +503,7 @@ config KEYBOARD_SH_KEYSC</div><div class='ctx'> config KEYBOARD_STMPE</div><div class='ctx'> 	tristate "STMPE keypad support"</div><div class='ctx'> 	depends on MFD_STMPE</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to use the keypad controller on STMPE I/O</div><div class='ctx'> 	  expanders.</div><div class='hunk'>@@ -505,6 +524,7 @@ config KEYBOARD_DAVINCI</div><div class='ctx'> config KEYBOARD_OMAP</div><div class='ctx'> 	tristate "TI OMAP keypad support"</div><div class='ctx'> 	depends on (ARCH_OMAP1 || ARCH_OMAP2)</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to use the OMAP keypad.</div><div class='ctx'> </div><div class='hunk'>@@ -512,9 +532,10 @@ config KEYBOARD_OMAP</div><div class='ctx'> 	  module will be called omap-keypad.</div><div class='ctx'> </div><div class='ctx'> config KEYBOARD_OMAP4</div><div class='del'>-	tristate "TI OMAP4 keypad support"</div><div class='add'>+	tristate "TI OMAP4+ keypad support"</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='del'>-	  Say Y here if you want to use the OMAP4 keypad.</div><div class='add'>+	  Say Y here if you want to use the OMAP4+ keypad.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='ctx'> 	  module will be called omap4-keypad.</div><div class='hunk'>@@ -522,6 +543,7 @@ config KEYBOARD_OMAP4</div><div class='ctx'> config KEYBOARD_SPEAR</div><div class='ctx'> 	tristate "ST SPEAR keyboard support"</div><div class='ctx'> 	depends on PLAT_SPEAR</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to use the SPEAR keyboard.</div><div class='ctx'> </div><div class='hunk'>@@ -531,6 +553,7 @@ config KEYBOARD_SPEAR</div><div class='ctx'> config KEYBOARD_TC3589X</div><div class='ctx'> 	tristate "TC3589X Keypad support"</div><div class='ctx'> 	depends on MFD_TC3589X</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to use the keypad controller on</div><div class='ctx'> 	  TC35892/3 I/O expander.</div><div class='hunk'>@@ -541,6 +564,7 @@ config KEYBOARD_TC3589X</div><div class='ctx'> config KEYBOARD_TNETV107X</div><div class='ctx'> 	tristate "TI TNETV107X keypad support"</div><div class='ctx'> 	depends on ARCH_DAVINCI_TNETV107X</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to use the TNETV107X keypad.</div><div class='ctx'> </div><div class='hunk'>@@ -550,6 +574,7 @@ config KEYBOARD_TNETV107X</div><div class='ctx'> config KEYBOARD_TWL4030</div><div class='ctx'> 	tristate "TI TWL4030/TWL5030/TPS659x0 keypad support"</div><div class='ctx'> 	depends on TWL4030_CORE</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if your board use the keypad controller on</div><div class='ctx'> 	  TWL4030 family chips.  It's safe to say enable this</div><div class='hunk'>@@ -573,6 +598,7 @@ config KEYBOARD_XTKBD</div><div class='ctx'> config KEYBOARD_W90P910</div><div class='ctx'> 	tristate "W90P910 Matrix Keypad support"</div><div class='ctx'> 	depends on ARCH_W90X900</div><div class='add'>+	select INPUT_MATRIXKMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here to enable the matrix keypad on evaluation board</div><div class='ctx'> 	  based on W90P910.</div><div class='head'>diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile<br/>index df7061f12918..b03b02456a82 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/Makefile</a></div><div class='hunk'>@@ -24,6 +24,7 @@ obj-$(CONFIG_KEYBOARD_HP6XX)		+= jornada680_kbd.o</div><div class='ctx'> obj-$(CONFIG_KEYBOARD_HP7XX)		+= jornada720_kbd.o</div><div class='ctx'> obj-$(CONFIG_KEYBOARD_LKKBD)		+= lkkbd.o</div><div class='ctx'> obj-$(CONFIG_KEYBOARD_LM8323)		+= lm8323.o</div><div class='add'>+obj-$(CONFIG_KEYBOARD_LM8333)		+= lm8333.o</div><div class='ctx'> obj-$(CONFIG_KEYBOARD_LOCOMO)		+= locomokbd.o</div><div class='ctx'> obj-$(CONFIG_KEYBOARD_MAPLE)		+= maple_keyb.o</div><div class='ctx'> obj-$(CONFIG_KEYBOARD_MATRIX)		+= matrix_keypad.o</div><div class='head'>diff --git a/drivers/input/keyboard/adp5588-keys.c b/drivers/input/keyboard/adp5588-keys.c<br/>index 39ebffac207e..b083bf10f139 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/adp5588-keys.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/adp5588-keys.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/adp5588-keys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/adp5588-keys.c</a></div><div class='hunk'>@@ -197,6 +197,7 @@ static int __devinit adp5588_gpio_add(struct adp5588_kpad *kpad)</div><div class='ctx'> 	kpad-&gt;gc.base = gpio_data-&gt;gpio_start;</div><div class='ctx'> 	kpad-&gt;gc.label = kpad-&gt;client-&gt;name;</div><div class='ctx'> 	kpad-&gt;gc.owner = THIS_MODULE;</div><div class='add'>+	kpad-&gt;gc.names = gpio_data-&gt;names;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;kpad-&gt;gpio_lock);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/input/keyboard/atkbd.c b/drivers/input/keyboard/atkbd.c<br/>index e05a2e7073c6..add5ffd9fe26 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/atkbd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/atkbd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/atkbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/atkbd.c</a></div><div class='hunk'>@@ -433,7 +433,7 @@ static irqreturn_t atkbd_interrupt(struct serio *serio, unsigned char data,</div><div class='ctx'> 		if (printk_ratelimit())</div><div class='ctx'> 			dev_warn(&amp;serio-&gt;dev,</div><div class='ctx'> 				 "Spurious %s on %s. "</div><div class='del'>-				 "Some program might be trying access hardware directly.\n",</div><div class='add'>+				 "Some program might be trying to access hardware directly.\n",</div><div class='ctx'> 				 data == ATKBD_RET_ACK ? "ACK" : "NAK", serio-&gt;phys);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	case ATKBD_RET_ERR:</div><div class='head'>diff --git a/drivers/input/keyboard/ep93xx_keypad.c b/drivers/input/keyboard/ep93xx_keypad.c<br/>index 0ba69f3fcb52..c46fc8185469 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/ep93xx_keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/ep93xx_keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/ep93xx_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/ep93xx_keypad.c</a></div><div class='hunk'>@@ -182,16 +182,10 @@ static void ep93xx_keypad_close(struct input_dev *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-/*</div><div class='del'>- * NOTE: I don't know if this is correct, or will work on the ep93xx.</div><div class='del'>- *</div><div class='del'>- * None of the existing ep93xx drivers have power management support.</div><div class='del'>- * But, this is basically what the pxa27x_keypad driver does.</div><div class='del'>- */</div><div class='del'>-static int ep93xx_keypad_suspend(struct platform_device *pdev,</div><div class='del'>-				 pm_message_t state)</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int ep93xx_keypad_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev);</div><div class='ctx'> 	struct ep93xx_keypad *keypad = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct input_dev *input_dev = keypad-&gt;input_dev;</div><div class='ctx'> </div><div class='hunk'>@@ -210,8 +204,9 @@ static int ep93xx_keypad_suspend(struct platform_device *pdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ep93xx_keypad_resume(struct platform_device *pdev)</div><div class='add'>+static int ep93xx_keypad_resume(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev);</div><div class='ctx'> 	struct ep93xx_keypad *keypad = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct input_dev *input_dev = keypad-&gt;input_dev;</div><div class='ctx'> </div><div class='hunk'>@@ -232,10 +227,10 @@ static int ep93xx_keypad_resume(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-#else	/* !CONFIG_PM */</div><div class='del'>-#define ep93xx_keypad_suspend	NULL</div><div class='del'>-#define ep93xx_keypad_resume	NULL</div><div class='del'>-#endif	/* !CONFIG_PM */</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(ep93xx_keypad_pm_ops,</div><div class='add'>+			 ep93xx_keypad_suspend, ep93xx_keypad_resume);</div><div class='ctx'> </div><div class='ctx'> static int __devinit ep93xx_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -308,19 +303,16 @@ static int __devinit ep93xx_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	input_dev-&gt;open = ep93xx_keypad_open;</div><div class='ctx'> 	input_dev-&gt;close = ep93xx_keypad_close;</div><div class='ctx'> 	input_dev-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='del'>-	input_dev-&gt;keycode = keypad-&gt;keycodes;</div><div class='del'>-	input_dev-&gt;keycodesize = sizeof(keypad-&gt;keycodes[0]);</div><div class='del'>-	input_dev-&gt;keycodemax = ARRAY_SIZE(keypad-&gt;keycodes);</div><div class='ctx'> </div><div class='del'>-	input_set_drvdata(input_dev, keypad);</div><div class='add'>+	err = matrix_keypad_build_keymap(keymap_data, NULL,</div><div class='add'>+					 EP93XX_MATRIX_ROWS, EP93XX_MATRIX_COLS,</div><div class='add'>+					 keypad-&gt;keycodes, input_dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto failed_free_dev;</div><div class='ctx'> </div><div class='del'>-	input_dev-&gt;evbit[0] = BIT_MASK(EV_KEY);</div><div class='ctx'> 	if (keypad-&gt;pdata-&gt;flags &amp; EP93XX_KEYPAD_AUTOREPEAT)</div><div class='del'>-		input_dev-&gt;evbit[0] |= BIT_MASK(EV_REP);</div><div class='del'>-</div><div class='del'>-	matrix_keypad_build_keymap(keymap_data, 3,</div><div class='del'>-				   input_dev-&gt;keycode, input_dev-&gt;keybit);</div><div class='del'>-	platform_set_drvdata(pdev, keypad);</div><div class='add'>+		__set_bit(EV_REP, input_dev-&gt;evbit);</div><div class='add'>+	input_set_drvdata(input_dev, keypad);</div><div class='ctx'> </div><div class='ctx'> 	err = request_irq(keypad-&gt;irq, ep93xx_keypad_irq_handler,</div><div class='ctx'> 			  0, pdev-&gt;name, keypad);</div><div class='hunk'>@@ -331,6 +323,7 @@ static int __devinit ep93xx_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto failed_free_irq;</div><div class='ctx'> </div><div class='add'>+	platform_set_drvdata(pdev, keypad);</div><div class='ctx'> 	device_init_wakeup(&amp;pdev-&gt;dev, 1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -384,11 +377,10 @@ static struct platform_driver ep93xx_keypad_driver = {</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "ep93xx-keypad",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='add'>+		.pm	= &amp;ep93xx_keypad_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= ep93xx_keypad_probe,</div><div class='ctx'> 	.remove		= __devexit_p(ep93xx_keypad_remove),</div><div class='del'>-	.suspend	= ep93xx_keypad_suspend,</div><div class='del'>-	.resume		= ep93xx_keypad_resume,</div><div class='ctx'> };</div><div class='ctx'> module_platform_driver(ep93xx_keypad_driver);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/input/keyboard/hil_kbd.c b/drivers/input/keyboard/hil_kbd.c<br/>index fed31e0947a1..589e3c258f3f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/hil_kbd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/hil_kbd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/hil_kbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/hil_kbd.c</a></div><div class='hunk'>@@ -583,15 +583,4 @@ static struct serio_driver hil_serio_drv = {</div><div class='ctx'> 	.interrupt	= hil_dev_interrupt</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init hil_dev_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;hil_serio_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit hil_dev_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;hil_serio_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(hil_dev_init);</div><div class='del'>-module_exit(hil_dev_exit);</div><div class='add'>+module_serio_driver(hil_serio_drv);</div><div class='head'>diff --git a/drivers/input/keyboard/imx_keypad.c b/drivers/input/keyboard/imx_keypad.c<br/>index fb87b3bcadb9..6ee7421e2321 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/imx_keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/imx_keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/imx_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/imx_keypad.c</a></div><div class='hunk'>@@ -481,7 +481,7 @@ static int __devinit imx_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (keypad-&gt;rows_en_mask &gt; ((1 &lt;&lt; MAX_MATRIX_KEY_ROWS) - 1) ||</div><div class='del'>-	   keypad-&gt;cols_en_mask &gt; ((1 &lt;&lt; MAX_MATRIX_KEY_COLS) - 1)) {</div><div class='add'>+	    keypad-&gt;cols_en_mask &gt; ((1 &lt;&lt; MAX_MATRIX_KEY_COLS) - 1)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='ctx'> 			"invalid key data (too many rows or colums)\n");</div><div class='ctx'> 		error = -EINVAL;</div><div class='hunk'>@@ -496,14 +496,17 @@ static int __devinit imx_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	input_dev-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='ctx'> 	input_dev-&gt;open = imx_keypad_open;</div><div class='ctx'> 	input_dev-&gt;close = imx_keypad_close;</div><div class='del'>-	input_dev-&gt;evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);</div><div class='del'>-	input_dev-&gt;keycode = keypad-&gt;keycodes;</div><div class='del'>-	input_dev-&gt;keycodesize = sizeof(keypad-&gt;keycodes[0]);</div><div class='del'>-	input_dev-&gt;keycodemax = ARRAY_SIZE(keypad-&gt;keycodes);</div><div class='ctx'> </div><div class='del'>-	matrix_keypad_build_keymap(keymap_data, MATRIX_ROW_SHIFT,</div><div class='del'>-				keypad-&gt;keycodes, input_dev-&gt;keybit);</div><div class='add'>+	error = matrix_keypad_build_keymap(keymap_data, NULL,</div><div class='add'>+					   MAX_MATRIX_KEY_ROWS,</div><div class='add'>+					   MAX_MATRIX_KEY_COLS,</div><div class='add'>+					   keypad-&gt;keycodes, input_dev);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to build keymap\n");</div><div class='add'>+		goto failed_clock_put;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	__set_bit(EV_REP, input_dev-&gt;evbit);</div><div class='ctx'> 	input_set_capability(input_dev, EV_MSC, MSC_SCAN);</div><div class='ctx'> 	input_set_drvdata(input_dev, keypad);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/input/keyboard/lkkbd.c b/drivers/input/keyboard/lkkbd.c<br/>index fa9bb6d235e2..fc0a63c2f278 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/lkkbd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/lkkbd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/lkkbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/lkkbd.c</a></div><div class='hunk'>@@ -731,19 +731,4 @@ static struct serio_driver lkkbd_drv = {</div><div class='ctx'> 	.interrupt	= lkkbd_interrupt,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for insering/removing us as a module.</div><div class='del'>- */</div><div class='del'>-static int __init lkkbd_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;lkkbd_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit lkkbd_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;lkkbd_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(lkkbd_init);</div><div class='del'>-module_exit(lkkbd_exit);</div><div class='del'>-</div><div class='add'>+module_serio_driver(lkkbd_drv);</div><div class='head'>diff --git a/drivers/input/keyboard/lm8333.c b/drivers/input/keyboard/lm8333.c<br/>new file mode 100644<br/>index 000000000000..ca168a6679de<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/lm8333.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/lm8333.c</a></div><div class='hunk'>@@ -0,0 +1,235 @@</div><div class='add'>+/*</div><div class='add'>+ * LM8333 keypad driver</div><div class='add'>+ * Copyright (C) 2012 Wolfram Sang, Pengutronix &lt;w.sang@pengutronix.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/input/matrix_keypad.h&gt;</div><div class='add'>+#include &lt;linux/input/lm8333.h&gt;</div><div class='add'>+</div><div class='add'>+#define LM8333_FIFO_READ		0x20</div><div class='add'>+#define LM8333_DEBOUNCE			0x22</div><div class='add'>+#define LM8333_READ_INT			0xD0</div><div class='add'>+#define LM8333_ACTIVE			0xE4</div><div class='add'>+#define LM8333_READ_ERROR		0xF0</div><div class='add'>+</div><div class='add'>+#define LM8333_KEYPAD_IRQ		(1 &lt;&lt; 0)</div><div class='add'>+#define LM8333_ERROR_IRQ		(1 &lt;&lt; 3)</div><div class='add'>+</div><div class='add'>+#define LM8333_ERROR_KEYOVR		0x04</div><div class='add'>+#define LM8333_ERROR_FIFOOVR		0x40</div><div class='add'>+</div><div class='add'>+#define LM8333_FIFO_TRANSFER_SIZE	16</div><div class='add'>+</div><div class='add'>+#define LM8333_NUM_ROWS		8</div><div class='add'>+#define LM8333_NUM_COLS		16</div><div class='add'>+#define LM8333_ROW_SHIFT	4</div><div class='add'>+</div><div class='add'>+struct lm8333 {</div><div class='add'>+	struct i2c_client *client;</div><div class='add'>+	struct input_dev *input;</div><div class='add'>+	unsigned short keycodes[LM8333_NUM_ROWS &lt;&lt; LM8333_ROW_SHIFT];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The accessors try twice because the first access may be needed for wakeup */</div><div class='add'>+#define LM8333_READ_RETRIES 2</div><div class='add'>+</div><div class='add'>+int lm8333_read8(struct lm8333 *lm8333, u8 cmd)</div><div class='add'>+{</div><div class='add'>+	int retries = 0, ret;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		ret = i2c_smbus_read_byte_data(lm8333-&gt;client, cmd);</div><div class='add'>+	} while (ret &lt; 0 &amp;&amp; retries++ &lt; LM8333_READ_RETRIES);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lm8333_write8(struct lm8333 *lm8333, u8 cmd, u8 val)</div><div class='add'>+{</div><div class='add'>+	int retries = 0, ret;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		ret = i2c_smbus_write_byte_data(lm8333-&gt;client, cmd, val);</div><div class='add'>+	} while (ret &lt; 0 &amp;&amp; retries++ &lt; LM8333_READ_RETRIES);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lm8333_read_block(struct lm8333 *lm8333, u8 cmd, u8 len, u8 *buf)</div><div class='add'>+{</div><div class='add'>+	int retries = 0, ret;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		ret = i2c_smbus_read_i2c_block_data(lm8333-&gt;client,</div><div class='add'>+						    cmd, len, buf);</div><div class='add'>+	} while (ret &lt; 0 &amp;&amp; retries++ &lt; LM8333_READ_RETRIES);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lm8333_key_handler(struct lm8333 *lm8333)</div><div class='add'>+{</div><div class='add'>+	struct input_dev *input = lm8333-&gt;input;</div><div class='add'>+	u8 keys[LM8333_FIFO_TRANSFER_SIZE];</div><div class='add'>+	u8 code, pressed;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	ret = lm8333_read_block(lm8333, LM8333_FIFO_READ,</div><div class='add'>+				LM8333_FIFO_TRANSFER_SIZE, keys);</div><div class='add'>+	if (ret != LM8333_FIFO_TRANSFER_SIZE) {</div><div class='add'>+		dev_err(&amp;lm8333-&gt;client-&gt;dev,</div><div class='add'>+			"Error %d while reading FIFO\n", ret);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; keys[i] &amp;&amp; i &lt; LM8333_FIFO_TRANSFER_SIZE; i++) {</div><div class='add'>+		pressed = keys[i] &amp; 0x80;</div><div class='add'>+		code = keys[i] &amp; 0x7f;</div><div class='add'>+</div><div class='add'>+		input_event(input, EV_MSC, MSC_SCAN, code);</div><div class='add'>+		input_report_key(input, lm8333-&gt;keycodes[code], pressed);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	input_sync(input);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t lm8333_irq_thread(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct lm8333 *lm8333 = data;</div><div class='add'>+	u8 status = lm8333_read8(lm8333, LM8333_READ_INT);</div><div class='add'>+</div><div class='add'>+	if (!status)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	if (status &amp; LM8333_ERROR_IRQ) {</div><div class='add'>+		u8 err = lm8333_read8(lm8333, LM8333_READ_ERROR);</div><div class='add'>+</div><div class='add'>+		if (err &amp; (LM8333_ERROR_KEYOVR | LM8333_ERROR_FIFOOVR)) {</div><div class='add'>+			u8 dummy[LM8333_FIFO_TRANSFER_SIZE];</div><div class='add'>+</div><div class='add'>+			lm8333_read_block(lm8333, LM8333_FIFO_READ,</div><div class='add'>+					LM8333_FIFO_TRANSFER_SIZE, dummy);</div><div class='add'>+		}</div><div class='add'>+		dev_err(&amp;lm8333-&gt;client-&gt;dev, "Got error %02x\n", err);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (status &amp; LM8333_KEYPAD_IRQ)</div><div class='add'>+		lm8333_key_handler(lm8333);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit lm8333_probe(struct i2c_client *client,</div><div class='add'>+				  const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	const struct lm8333_platform_data *pdata = client-&gt;dev.platform_data;</div><div class='add'>+	struct lm8333 *lm8333;</div><div class='add'>+	struct input_dev *input;</div><div class='add'>+	int err, active_time;</div><div class='add'>+</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	active_time = pdata-&gt;active_time ?: 500;</div><div class='add'>+	if (active_time / 3 &lt;= pdata-&gt;debounce_time / 3) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Active time not big enough!\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lm8333 = kzalloc(sizeof(*lm8333), GFP_KERNEL);</div><div class='add'>+	input = input_allocate_device();</div><div class='add'>+	if (!lm8333 || !input) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto free_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lm8333-&gt;client = client;</div><div class='add'>+	lm8333-&gt;input = input;</div><div class='add'>+</div><div class='add'>+	input-&gt;name = client-&gt;name;</div><div class='add'>+	input-&gt;dev.parent = &amp;client-&gt;dev;</div><div class='add'>+	input-&gt;id.bustype = BUS_I2C;</div><div class='add'>+</div><div class='add'>+	input_set_capability(input, EV_MSC, MSC_SCAN);</div><div class='add'>+</div><div class='add'>+	err = matrix_keypad_build_keymap(pdata-&gt;matrix_data, NULL,</div><div class='add'>+					 LM8333_NUM_ROWS, LM8333_NUM_COLS,</div><div class='add'>+					 lm8333-&gt;keycodes, input);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_mem;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;debounce_time) {</div><div class='add'>+		err = lm8333_write8(lm8333, LM8333_DEBOUNCE,</div><div class='add'>+				    pdata-&gt;debounce_time / 3);</div><div class='add'>+		if (err)</div><div class='add'>+			dev_warn(&amp;client-&gt;dev, "Unable to set debounce time\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;active_time) {</div><div class='add'>+		err = lm8333_write8(lm8333, LM8333_ACTIVE,</div><div class='add'>+				    pdata-&gt;active_time / 3);</div><div class='add'>+		if (err)</div><div class='add'>+			dev_warn(&amp;client-&gt;dev, "Unable to set active time\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = request_threaded_irq(client-&gt;irq, NULL, lm8333_irq_thread,</div><div class='add'>+				   IRQF_TRIGGER_FALLING | IRQF_ONESHOT,</div><div class='add'>+				   "lm8333", lm8333);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_mem;</div><div class='add'>+</div><div class='add'>+	err = input_register_device(input);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_irq;</div><div class='add'>+</div><div class='add'>+	i2c_set_clientdata(client, lm8333);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ free_irq:</div><div class='add'>+	free_irq(client-&gt;irq, lm8333);</div><div class='add'>+ free_mem:</div><div class='add'>+	input_free_device(input);</div><div class='add'>+	kfree(lm8333);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit lm8333_remove(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct lm8333 *lm8333 = i2c_get_clientdata(client);</div><div class='add'>+</div><div class='add'>+	free_irq(client-&gt;irq, lm8333);</div><div class='add'>+	input_unregister_device(lm8333-&gt;input);</div><div class='add'>+	kfree(lm8333);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id lm8333_id[] = {</div><div class='add'>+	{ "lm8333", 0 },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, lm8333_id);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver lm8333_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name		= "lm8333",</div><div class='add'>+		.owner		= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe		= lm8333_probe,</div><div class='add'>+	.remove		= __devexit_p(lm8333_remove),</div><div class='add'>+	.id_table	= lm8333_id,</div><div class='add'>+};</div><div class='add'>+module_i2c_driver(lm8333_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Wolfram Sang &lt;w.sang@pengutronix.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("LM8333 keyboard driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/input/keyboard/matrix_keypad.c b/drivers/input/keyboard/matrix_keypad.c<br/>index 9b223d73de32..18b72372028a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/matrix_keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/matrix_keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/matrix_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/matrix_keypad.c</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> struct matrix_keypad {</div><div class='ctx'> 	const struct matrix_keypad_platform_data *pdata;</div><div class='ctx'> 	struct input_dev *input_dev;</div><div class='del'>-	unsigned short *keycodes;</div><div class='ctx'> 	unsigned int row_shift;</div><div class='ctx'> </div><div class='ctx'> 	DECLARE_BITMAP(disabled_gpios, MATRIX_MAX_ROWS);</div><div class='hunk'>@@ -38,6 +37,8 @@ struct matrix_keypad {</div><div class='ctx'> 	bool scan_pending;</div><div class='ctx'> 	bool stopped;</div><div class='ctx'> 	bool gpio_all_disabled;</div><div class='add'>+</div><div class='add'>+	unsigned short keycodes[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -224,7 +225,7 @@ static void matrix_keypad_stop(struct input_dev *dev)</div><div class='ctx'> 	disable_row_irqs(keypad);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='ctx'> static void matrix_keypad_enable_wakeup(struct matrix_keypad *keypad)</div><div class='ctx'> {</div><div class='ctx'> 	const struct matrix_keypad_platform_data *pdata = keypad-&gt;pdata;</div><div class='hunk'>@@ -293,16 +294,16 @@ static int matrix_keypad_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static const SIMPLE_DEV_PM_OPS(matrix_keypad_pm_ops,</div><div class='del'>-				matrix_keypad_suspend, matrix_keypad_resume);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static int __devinit init_matrix_gpio(struct platform_device *pdev,</div><div class='del'>-					struct matrix_keypad *keypad)</div><div class='add'>+static SIMPLE_DEV_PM_OPS(matrix_keypad_pm_ops,</div><div class='add'>+			 matrix_keypad_suspend, matrix_keypad_resume);</div><div class='add'>+</div><div class='add'>+static int __devinit matrix_keypad_init_gpio(struct platform_device *pdev,</div><div class='add'>+					     struct matrix_keypad *keypad)</div><div class='ctx'> {</div><div class='ctx'> 	const struct matrix_keypad_platform_data *pdata = keypad-&gt;pdata;</div><div class='del'>-	int i, err = -EINVAL;</div><div class='add'>+	int i, err;</div><div class='ctx'> </div><div class='ctx'> 	/* initialized strobe lines as outputs, activated */</div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;num_col_gpios; i++) {</div><div class='hunk'>@@ -348,8 +349,7 @@ static int __devinit init_matrix_gpio(struct platform_device *pdev,</div><div class='ctx'> 					"matrix-keypad", keypad);</div><div class='ctx'> 			if (err) {</div><div class='ctx'> 				dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-					"Unable to acquire interrupt "</div><div class='del'>-					"for GPIO line %i\n",</div><div class='add'>+					"Unable to acquire interrupt for GPIO line %i\n",</div><div class='ctx'> 					pdata-&gt;row_gpios[i]);</div><div class='ctx'> 				goto err_free_irqs;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -375,14 +375,33 @@ err_free_cols:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void matrix_keypad_free_gpio(struct matrix_keypad *keypad)</div><div class='add'>+{</div><div class='add'>+	const struct matrix_keypad_platform_data *pdata = keypad-&gt;pdata;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;clustered_irq &gt; 0) {</div><div class='add'>+		free_irq(pdata-&gt;clustered_irq, keypad);</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; pdata-&gt;num_row_gpios; i++)</div><div class='add'>+			free_irq(gpio_to_irq(pdata-&gt;row_gpios[i]), keypad);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;num_row_gpios; i++)</div><div class='add'>+		gpio_free(pdata-&gt;row_gpios[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;num_col_gpios; i++)</div><div class='add'>+		gpio_free(pdata-&gt;col_gpios[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __devinit matrix_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct matrix_keypad_platform_data *pdata;</div><div class='ctx'> 	const struct matrix_keymap_data *keymap_data;</div><div class='ctx'> 	struct matrix_keypad *keypad;</div><div class='ctx'> 	struct input_dev *input_dev;</div><div class='del'>-	unsigned short *keycodes;</div><div class='ctx'> 	unsigned int row_shift;</div><div class='add'>+	size_t keymap_size;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	pdata = pdev-&gt;dev.platform_data;</div><div class='hunk'>@@ -398,20 +417,18 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	row_shift = get_count_order(pdata-&gt;num_col_gpios);</div><div class='del'>-</div><div class='del'>-	keypad = kzalloc(sizeof(struct matrix_keypad), GFP_KERNEL);</div><div class='del'>-	keycodes = kzalloc((pdata-&gt;num_row_gpios &lt;&lt; row_shift) *</div><div class='del'>-				sizeof(*keycodes),</div><div class='del'>-			   GFP_KERNEL);</div><div class='add'>+	keymap_size = (pdata-&gt;num_row_gpios &lt;&lt; row_shift) *</div><div class='add'>+			sizeof(keypad-&gt;keycodes[0]);</div><div class='add'>+	keypad = kzalloc(sizeof(struct matrix_keypad) + keymap_size,</div><div class='add'>+			 GFP_KERNEL);</div><div class='ctx'> 	input_dev = input_allocate_device();</div><div class='del'>-	if (!keypad || !keycodes || !input_dev) {</div><div class='add'>+	if (!keypad || !input_dev) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto err_free_mem;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	keypad-&gt;input_dev = input_dev;</div><div class='ctx'> 	keypad-&gt;pdata = pdata;</div><div class='del'>-	keypad-&gt;keycodes = keycodes;</div><div class='ctx'> 	keypad-&gt;row_shift = row_shift;</div><div class='ctx'> 	keypad-&gt;stopped = true;</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;keypad-&gt;work, matrix_keypad_scan);</div><div class='hunk'>@@ -420,38 +437,38 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	input_dev-&gt;name		= pdev-&gt;name;</div><div class='ctx'> 	input_dev-&gt;id.bustype	= BUS_HOST;</div><div class='ctx'> 	input_dev-&gt;dev.parent	= &amp;pdev-&gt;dev;</div><div class='del'>-	input_dev-&gt;evbit[0]	= BIT_MASK(EV_KEY);</div><div class='del'>-	if (!pdata-&gt;no_autorepeat)</div><div class='del'>-		input_dev-&gt;evbit[0] |= BIT_MASK(EV_REP);</div><div class='ctx'> 	input_dev-&gt;open		= matrix_keypad_start;</div><div class='ctx'> 	input_dev-&gt;close	= matrix_keypad_stop;</div><div class='ctx'> </div><div class='del'>-	input_dev-&gt;keycode	= keycodes;</div><div class='del'>-	input_dev-&gt;keycodesize	= sizeof(*keycodes);</div><div class='del'>-	input_dev-&gt;keycodemax	= pdata-&gt;num_row_gpios &lt;&lt; row_shift;</div><div class='del'>-</div><div class='del'>-	matrix_keypad_build_keymap(keymap_data, row_shift,</div><div class='del'>-				   input_dev-&gt;keycode, input_dev-&gt;keybit);</div><div class='add'>+	err = matrix_keypad_build_keymap(keymap_data, NULL,</div><div class='add'>+					 pdata-&gt;num_row_gpios,</div><div class='add'>+					 pdata-&gt;num_col_gpios,</div><div class='add'>+					 keypad-&gt;keycodes, input_dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_mem;</div><div class='ctx'> </div><div class='add'>+	if (!pdata-&gt;no_autorepeat)</div><div class='add'>+		__set_bit(EV_REP, input_dev-&gt;evbit);</div><div class='ctx'> 	input_set_capability(input_dev, EV_MSC, MSC_SCAN);</div><div class='ctx'> 	input_set_drvdata(input_dev, keypad);</div><div class='ctx'> </div><div class='del'>-	err = init_matrix_gpio(pdev, keypad);</div><div class='add'>+	err = matrix_keypad_init_gpio(pdev, keypad);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_mem;</div><div class='ctx'> </div><div class='ctx'> 	err = input_register_device(keypad-&gt;input_dev);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_free_mem;</div><div class='add'>+		goto err_free_gpio;</div><div class='ctx'> </div><div class='ctx'> 	device_init_wakeup(&amp;pdev-&gt;dev, pdata-&gt;wakeup);</div><div class='ctx'> 	platform_set_drvdata(pdev, keypad);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_free_gpio:</div><div class='add'>+	matrix_keypad_free_gpio(keypad);</div><div class='ctx'> err_free_mem:</div><div class='ctx'> 	input_free_device(input_dev);</div><div class='del'>-	kfree(keycodes);</div><div class='ctx'> 	kfree(keypad);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -459,29 +476,15 @@ err_free_mem:</div><div class='ctx'> static int __devexit matrix_keypad_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct matrix_keypad *keypad = platform_get_drvdata(pdev);</div><div class='del'>-	const struct matrix_keypad_platform_data *pdata = keypad-&gt;pdata;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	device_init_wakeup(&amp;pdev-&gt;dev, 0);</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;clustered_irq &gt; 0) {</div><div class='del'>-		free_irq(pdata-&gt;clustered_irq, keypad);</div><div class='del'>-	} else {</div><div class='del'>-		for (i = 0; i &lt; pdata-&gt;num_row_gpios; i++)</div><div class='del'>-			free_irq(gpio_to_irq(pdata-&gt;row_gpios[i]), keypad);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;num_row_gpios; i++)</div><div class='del'>-		gpio_free(pdata-&gt;row_gpios[i]);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;num_col_gpios; i++)</div><div class='del'>-		gpio_free(pdata-&gt;col_gpios[i]);</div><div class='del'>-</div><div class='add'>+	matrix_keypad_free_gpio(keypad);</div><div class='ctx'> 	input_unregister_device(keypad-&gt;input_dev);</div><div class='del'>-	platform_set_drvdata(pdev, NULL);</div><div class='del'>-	kfree(keypad-&gt;keycodes);</div><div class='ctx'> 	kfree(keypad);</div><div class='ctx'> </div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -491,9 +494,7 @@ static struct platform_driver matrix_keypad_driver = {</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "matrix-keypad",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='del'>-#ifdef CONFIG_PM</div><div class='ctx'> 		.pm	= &amp;matrix_keypad_pm_ops,</div><div class='del'>-#endif</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> module_platform_driver(matrix_keypad_driver);</div><div class='head'>diff --git a/drivers/input/keyboard/newtonkbd.c b/drivers/input/keyboard/newtonkbd.c<br/>index 48d1cab0aa1c..f971898ad591 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/newtonkbd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/newtonkbd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/newtonkbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/newtonkbd.c</a></div><div class='hunk'>@@ -166,15 +166,4 @@ static struct serio_driver nkbd_drv = {</div><div class='ctx'> 	.disconnect	= nkbd_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init nkbd_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;nkbd_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit nkbd_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;nkbd_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(nkbd_init);</div><div class='del'>-module_exit(nkbd_exit);</div><div class='add'>+module_serio_driver(nkbd_drv);</div><div class='head'>diff --git a/drivers/input/keyboard/nomadik-ske-keypad.c b/drivers/input/keyboard/nomadik-ske-keypad.c<br/>index 101e245944e7..4ea4341a68c5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/nomadik-ske-keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/nomadik-ske-keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/nomadik-ske-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/nomadik-ske-keypad.c</a></div><div class='hunk'>@@ -39,7 +39,8 @@</div><div class='ctx'> #define SKE_KPRISA	(0x1 &lt;&lt; 2)</div><div class='ctx'> </div><div class='ctx'> #define SKE_KEYPAD_ROW_SHIFT	3</div><div class='del'>-#define SKE_KPD_KEYMAP_SIZE	(8 * 8)</div><div class='add'>+#define SKE_KPD_NUM_ROWS	8</div><div class='add'>+#define SKE_KPD_NUM_COLS	8</div><div class='ctx'> </div><div class='ctx'> /* keypad auto scan registers */</div><div class='ctx'> #define SKE_ASR0	0x20</div><div class='hunk'>@@ -63,7 +64,7 @@ struct ske_keypad {</div><div class='ctx'> 	void __iomem *reg_base;</div><div class='ctx'> 	struct input_dev *input;</div><div class='ctx'> 	const struct ske_keypad_platform_data *board;</div><div class='del'>-	unsigned short keymap[SKE_KPD_KEYMAP_SIZE];</div><div class='add'>+	unsigned short keymap[SKE_KPD_NUM_ROWS * SKE_KPD_NUM_COLS];</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	spinlock_t ske_keypad_lock;</div><div class='ctx'> };</div><div class='hunk'>@@ -261,19 +262,18 @@ static int __init ske_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	input-&gt;name = "ux500-ske-keypad";</div><div class='ctx'> 	input-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	input-&gt;keycode = keypad-&gt;keymap;</div><div class='del'>-	input-&gt;keycodesize = sizeof(keypad-&gt;keymap[0]);</div><div class='del'>-	input-&gt;keycodemax = ARRAY_SIZE(keypad-&gt;keymap);</div><div class='add'>+	error = matrix_keypad_build_keymap(plat-&gt;keymap_data, NULL,</div><div class='add'>+					   SKE_KPD_NUM_ROWS, SKE_KPD_NUM_COLS,</div><div class='add'>+					   keypad-&gt;keymap, input);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to build keymap\n");</div><div class='add'>+		goto err_iounmap;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	input_set_capability(input, EV_MSC, MSC_SCAN);</div><div class='del'>-</div><div class='del'>-	__set_bit(EV_KEY, input-&gt;evbit);</div><div class='ctx'> 	if (!plat-&gt;no_autorepeat)</div><div class='ctx'> 		__set_bit(EV_REP, input-&gt;evbit);</div><div class='ctx'> </div><div class='del'>-	matrix_keypad_build_keymap(plat-&gt;keymap_data, SKE_KEYPAD_ROW_SHIFT,</div><div class='del'>-			input-&gt;keycode, input-&gt;keybit);</div><div class='del'>-</div><div class='ctx'> 	clk_enable(keypad-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	/* go through board initialization helpers */</div><div class='head'>diff --git a/drivers/input/keyboard/omap-keypad.c b/drivers/input/keyboard/omap-keypad.c<br/>index 6b630d9d3dff..a0222db4dc86 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/omap-keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/omap-keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/omap-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/omap-keypad.c</a></div><div class='hunk'>@@ -61,6 +61,7 @@ struct omap_kp {</div><div class='ctx'> 	unsigned int cols;</div><div class='ctx'> 	unsigned long delay;</div><div class='ctx'> 	unsigned int debounce;</div><div class='add'>+	unsigned short keymap[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static DECLARE_TASKLET_DISABLED(kp_tasklet, omap_kp_tasklet, 0);</div><div class='hunk'>@@ -316,13 +317,6 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!cpu_is_omap24xx())</div><div class='ctx'> 		omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);</div><div class='ctx'> </div><div class='del'>-	input_dev-&gt;keycode      = &amp;omap_kp[1];</div><div class='del'>-	input_dev-&gt;keycodesize  = sizeof(unsigned short);</div><div class='del'>-	input_dev-&gt;keycodemax   = keycodemax;</div><div class='del'>-</div><div class='del'>-	if (pdata-&gt;rep)</div><div class='del'>-		__set_bit(EV_REP, input_dev-&gt;evbit);</div><div class='del'>-</div><div class='ctx'> 	if (pdata-&gt;delay)</div><div class='ctx'> 		omap_kp-&gt;delay = pdata-&gt;delay;</div><div class='ctx'> </div><div class='hunk'>@@ -371,9 +365,6 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err2;</div><div class='ctx'> </div><div class='ctx'> 	/* setup input device */</div><div class='del'>-	__set_bit(EV_KEY, input_dev-&gt;evbit);</div><div class='del'>-	matrix_keypad_build_keymap(pdata-&gt;keymap_data, row_shift,</div><div class='del'>-			input_dev-&gt;keycode, input_dev-&gt;keybit);</div><div class='ctx'> 	input_dev-&gt;name = "omap-keypad";</div><div class='ctx'> 	input_dev-&gt;phys = "omap-keypad/input0";</div><div class='ctx'> 	input_dev-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -383,6 +374,15 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)</div><div class='ctx'> 	input_dev-&gt;id.product = 0x0001;</div><div class='ctx'> 	input_dev-&gt;id.version = 0x0100;</div><div class='ctx'> </div><div class='add'>+	if (pdata-&gt;rep)</div><div class='add'>+		__set_bit(EV_REP, input_dev-&gt;evbit);</div><div class='add'>+</div><div class='add'>+	ret = matrix_keypad_build_keymap(pdata-&gt;keymap_data, NULL,</div><div class='add'>+					 pdata-&gt;rows, pdata-&gt;cols,</div><div class='add'>+					 omap_kp-&gt;keymap, input_dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err3;</div><div class='add'>+</div><div class='ctx'> 	ret = input_register_device(omap_kp-&gt;input);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		printk(KERN_ERR "Unable to register omap-keypad input device\n");</div><div class='head'>diff --git a/drivers/input/keyboard/omap4-keypad.c b/drivers/input/keyboard/omap4-keypad.c<br/>index e809ac095a38..aed5f6999ce2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/omap4-keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/omap4-keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/omap4-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/omap4-keypad.c</a></div><div class='hunk'>@@ -68,19 +68,52 @@</div><div class='ctx'> </div><div class='ctx'> #define OMAP4_MASK_IRQSTATUSDISABLE	0xFFFF</div><div class='ctx'> </div><div class='add'>+enum {</div><div class='add'>+	KBD_REVISION_OMAP4 = 0,</div><div class='add'>+	KBD_REVISION_OMAP5,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct omap4_keypad {</div><div class='ctx'> 	struct input_dev *input;</div><div class='ctx'> </div><div class='ctx'> 	void __iomem *base;</div><div class='del'>-	int irq;</div><div class='add'>+	unsigned int irq;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int rows;</div><div class='ctx'> 	unsigned int cols;</div><div class='add'>+	u32 reg_offset;</div><div class='add'>+	u32 irqreg_offset;</div><div class='ctx'> 	unsigned int row_shift;</div><div class='ctx'> 	unsigned char key_state[8];</div><div class='ctx'> 	unsigned short keymap[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int kbd_readl(struct omap4_keypad *keypad_data, u32 offset)</div><div class='add'>+{</div><div class='add'>+	return __raw_readl(keypad_data-&gt;base +</div><div class='add'>+				keypad_data-&gt;reg_offset + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kbd_writel(struct omap4_keypad *keypad_data, u32 offset, u32 value)</div><div class='add'>+{</div><div class='add'>+	__raw_writel(value,</div><div class='add'>+		     keypad_data-&gt;base + keypad_data-&gt;reg_offset + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kbd_read_irqreg(struct omap4_keypad *keypad_data, u32 offset)</div><div class='add'>+{</div><div class='add'>+	return __raw_readl(keypad_data-&gt;base +</div><div class='add'>+				keypad_data-&gt;irqreg_offset + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kbd_write_irqreg(struct omap4_keypad *keypad_data,</div><div class='add'>+			     u32 offset, u32 value)</div><div class='add'>+{</div><div class='add'>+	__raw_writel(value,</div><div class='add'>+		     keypad_data-&gt;base + keypad_data-&gt;irqreg_offset + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /* Interrupt handler */</div><div class='ctx'> static irqreturn_t omap4_keypad_interrupt(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='hunk'>@@ -91,12 +124,11 @@ static irqreturn_t omap4_keypad_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	u32 *new_state = (u32 *) key_state;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable interrupts */</div><div class='del'>-	__raw_writel(OMAP4_VAL_IRQDISABLE,</div><div class='del'>-		     keypad_data-&gt;base + OMAP4_KBD_IRQENABLE);</div><div class='add'>+	kbd_write_irqreg(keypad_data, OMAP4_KBD_IRQENABLE,</div><div class='add'>+			 OMAP4_VAL_IRQDISABLE);</div><div class='ctx'> </div><div class='del'>-	*new_state = __raw_readl(keypad_data-&gt;base + OMAP4_KBD_FULLCODE31_0);</div><div class='del'>-	*(new_state + 1) = __raw_readl(keypad_data-&gt;base</div><div class='del'>-						+ OMAP4_KBD_FULLCODE63_32);</div><div class='add'>+	*new_state = kbd_readl(keypad_data, OMAP4_KBD_FULLCODE31_0);</div><div class='add'>+	*(new_state + 1) = kbd_readl(keypad_data, OMAP4_KBD_FULLCODE63_32);</div><div class='ctx'> </div><div class='ctx'> 	for (row = 0; row &lt; keypad_data-&gt;rows; row++) {</div><div class='ctx'> 		changed = key_state[row] ^ keypad_data-&gt;key_state[row];</div><div class='hunk'>@@ -121,12 +153,13 @@ static irqreturn_t omap4_keypad_interrupt(int irq, void *dev_id)</div><div class='ctx'> 		sizeof(keypad_data-&gt;key_state));</div><div class='ctx'> </div><div class='ctx'> 	/* clear pending interrupts */</div><div class='del'>-	__raw_writel(__raw_readl(keypad_data-&gt;base + OMAP4_KBD_IRQSTATUS),</div><div class='del'>-			keypad_data-&gt;base + OMAP4_KBD_IRQSTATUS);</div><div class='add'>+	kbd_write_irqreg(keypad_data, OMAP4_KBD_IRQSTATUS,</div><div class='add'>+			 kbd_read_irqreg(keypad_data, OMAP4_KBD_IRQSTATUS));</div><div class='ctx'> </div><div class='ctx'> 	/* enable interrupts */</div><div class='del'>-	__raw_writel(OMAP4_DEF_IRQENABLE_EVENTEN | OMAP4_DEF_IRQENABLE_LONGKEY,</div><div class='del'>-			keypad_data-&gt;base + OMAP4_KBD_IRQENABLE);</div><div class='add'>+	kbd_write_irqreg(keypad_data, OMAP4_KBD_IRQENABLE,</div><div class='add'>+		OMAP4_DEF_IRQENABLE_EVENTEN |</div><div class='add'>+				OMAP4_DEF_IRQENABLE_LONGKEY);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -139,16 +172,17 @@ static int omap4_keypad_open(struct input_dev *input)</div><div class='ctx'> </div><div class='ctx'> 	disable_irq(keypad_data-&gt;irq);</div><div class='ctx'> </div><div class='del'>-	__raw_writel(OMAP4_VAL_FUNCTIONALCFG,</div><div class='del'>-			keypad_data-&gt;base + OMAP4_KBD_CTRL);</div><div class='del'>-	__raw_writel(OMAP4_VAL_DEBOUNCINGTIME,</div><div class='del'>-			keypad_data-&gt;base + OMAP4_KBD_DEBOUNCINGTIME);</div><div class='del'>-	__raw_writel(OMAP4_VAL_IRQDISABLE,</div><div class='del'>-			keypad_data-&gt;base + OMAP4_KBD_IRQSTATUS);</div><div class='del'>-	__raw_writel(OMAP4_DEF_IRQENABLE_EVENTEN | OMAP4_DEF_IRQENABLE_LONGKEY,</div><div class='del'>-			keypad_data-&gt;base + OMAP4_KBD_IRQENABLE);</div><div class='del'>-	__raw_writel(OMAP4_DEF_WUP_EVENT_ENA | OMAP4_DEF_WUP_LONG_KEY_ENA,</div><div class='del'>-			keypad_data-&gt;base + OMAP4_KBD_WAKEUPENABLE);</div><div class='add'>+	kbd_writel(keypad_data, OMAP4_KBD_CTRL,</div><div class='add'>+			OMAP4_VAL_FUNCTIONALCFG);</div><div class='add'>+	kbd_writel(keypad_data, OMAP4_KBD_DEBOUNCINGTIME,</div><div class='add'>+			OMAP4_VAL_DEBOUNCINGTIME);</div><div class='add'>+	kbd_write_irqreg(keypad_data, OMAP4_KBD_IRQSTATUS,</div><div class='add'>+			OMAP4_VAL_IRQDISABLE);</div><div class='add'>+	kbd_write_irqreg(keypad_data, OMAP4_KBD_IRQENABLE,</div><div class='add'>+			OMAP4_DEF_IRQENABLE_EVENTEN |</div><div class='add'>+				OMAP4_DEF_IRQENABLE_LONGKEY);</div><div class='add'>+	kbd_writel(keypad_data, OMAP4_KBD_WAKEUPENABLE,</div><div class='add'>+			OMAP4_DEF_WUP_EVENT_ENA | OMAP4_DEF_WUP_LONG_KEY_ENA);</div><div class='ctx'> </div><div class='ctx'> 	enable_irq(keypad_data-&gt;irq);</div><div class='ctx'> </div><div class='hunk'>@@ -162,12 +196,12 @@ static void omap4_keypad_close(struct input_dev *input)</div><div class='ctx'> 	disable_irq(keypad_data-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable interrupts */</div><div class='del'>-	__raw_writel(OMAP4_VAL_IRQDISABLE,</div><div class='del'>-		     keypad_data-&gt;base + OMAP4_KBD_IRQENABLE);</div><div class='add'>+	kbd_write_irqreg(keypad_data, OMAP4_KBD_IRQENABLE,</div><div class='add'>+			 OMAP4_VAL_IRQDISABLE);</div><div class='ctx'> </div><div class='ctx'> 	/* clear pending interrupts */</div><div class='del'>-	__raw_writel(__raw_readl(keypad_data-&gt;base + OMAP4_KBD_IRQSTATUS),</div><div class='del'>-			keypad_data-&gt;base + OMAP4_KBD_IRQSTATUS);</div><div class='add'>+	kbd_write_irqreg(keypad_data, OMAP4_KBD_IRQSTATUS,</div><div class='add'>+			 kbd_read_irqreg(keypad_data, OMAP4_KBD_IRQSTATUS));</div><div class='ctx'> </div><div class='ctx'> 	enable_irq(keypad_data-&gt;irq);</div><div class='ctx'> </div><div class='hunk'>@@ -182,6 +216,7 @@ static int __devinit omap4_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	resource_size_t size;</div><div class='ctx'> 	unsigned int row_shift, max_keys;</div><div class='add'>+	int rev;</div><div class='ctx'> 	int irq;</div><div class='ctx'> 	int error;</div><div class='ctx'> </div><div class='hunk'>@@ -241,11 +276,40 @@ static int __devinit omap4_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	keypad_data-&gt;rows = pdata-&gt;rows;</div><div class='ctx'> 	keypad_data-&gt;cols = pdata-&gt;cols;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	* Enable clocks for the keypad module so that we can read</div><div class='add'>+	* revision register.</div><div class='add'>+	*/</div><div class='add'>+	pm_runtime_enable(&amp;pdev-&gt;dev);</div><div class='add'>+	error = pm_runtime_get_sync(&amp;pdev-&gt;dev);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "pm_runtime_get_sync() failed\n");</div><div class='add'>+		goto err_unmap;</div><div class='add'>+	}</div><div class='add'>+	rev = __raw_readl(keypad_data-&gt;base + OMAP4_KBD_REVISION);</div><div class='add'>+	rev &amp;= 0x03 &lt;&lt; 30;</div><div class='add'>+	rev &gt;&gt;= 30;</div><div class='add'>+	switch (rev) {</div><div class='add'>+	case KBD_REVISION_OMAP4:</div><div class='add'>+		keypad_data-&gt;reg_offset = 0x00;</div><div class='add'>+		keypad_data-&gt;irqreg_offset = 0x00;</div><div class='add'>+		break;</div><div class='add'>+	case KBD_REVISION_OMAP5:</div><div class='add'>+		keypad_data-&gt;reg_offset = 0x10;</div><div class='add'>+		keypad_data-&gt;irqreg_offset = 0x0c;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"Keypad reports unsupported revision %d", rev);</div><div class='add'>+		error = -EINVAL;</div><div class='add'>+		goto err_pm_put_sync;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* input device allocation */</div><div class='ctx'> 	keypad_data-&gt;input = input_dev = input_allocate_device();</div><div class='ctx'> 	if (!input_dev) {</div><div class='ctx'> 		error = -ENOMEM;</div><div class='del'>-		goto err_unmap;</div><div class='add'>+		goto err_pm_put_sync;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	input_dev-&gt;name = pdev-&gt;name;</div><div class='hunk'>@@ -258,20 +322,19 @@ static int __devinit omap4_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	input_dev-&gt;open = omap4_keypad_open;</div><div class='ctx'> 	input_dev-&gt;close = omap4_keypad_close;</div><div class='ctx'> </div><div class='del'>-	input_dev-&gt;keycode	= keypad_data-&gt;keymap;</div><div class='del'>-	input_dev-&gt;keycodesize	= sizeof(keypad_data-&gt;keymap[0]);</div><div class='del'>-	input_dev-&gt;keycodemax	= max_keys;</div><div class='add'>+	error = matrix_keypad_build_keymap(pdata-&gt;keymap_data, NULL,</div><div class='add'>+					   pdata-&gt;rows, pdata-&gt;cols,</div><div class='add'>+					   keypad_data-&gt;keymap, input_dev);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to build keymap\n");</div><div class='add'>+		goto err_free_input;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	__set_bit(EV_KEY, input_dev-&gt;evbit);</div><div class='ctx'> 	__set_bit(EV_REP, input_dev-&gt;evbit);</div><div class='del'>-</div><div class='ctx'> 	input_set_capability(input_dev, EV_MSC, MSC_SCAN);</div><div class='ctx'> </div><div class='ctx'> 	input_set_drvdata(input_dev, keypad_data);</div><div class='ctx'> </div><div class='del'>-	matrix_keypad_build_keymap(pdata-&gt;keymap_data, row_shift,</div><div class='del'>-			input_dev-&gt;keycode, input_dev-&gt;keybit);</div><div class='del'>-</div><div class='ctx'> 	error = request_irq(keypad_data-&gt;irq, omap4_keypad_interrupt,</div><div class='ctx'> 			     IRQF_TRIGGER_RISING,</div><div class='ctx'> 			     "omap4-keypad", keypad_data);</div><div class='hunk'>@@ -280,7 +343,7 @@ static int __devinit omap4_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_free_input;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pm_runtime_enable(&amp;pdev-&gt;dev);</div><div class='add'>+	pm_runtime_put_sync(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	error = input_register_device(keypad_data-&gt;input);</div><div class='ctx'> 	if (error &lt; 0) {</div><div class='hunk'>@@ -296,6 +359,8 @@ err_pm_disable:</div><div class='ctx'> 	free_irq(keypad_data-&gt;irq, keypad_data);</div><div class='ctx'> err_free_input:</div><div class='ctx'> 	input_free_device(input_dev);</div><div class='add'>+err_pm_put_sync:</div><div class='add'>+	pm_runtime_put_sync(&amp;pdev-&gt;dev);</div><div class='ctx'> err_unmap:</div><div class='ctx'> 	iounmap(keypad_data-&gt;base);</div><div class='ctx'> err_release_mem:</div><div class='head'>diff --git a/drivers/input/keyboard/pmic8xxx-keypad.c b/drivers/input/keyboard/pmic8xxx-keypad.c<br/>index 01a1c9f8a383..52c34657d301 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/pmic8xxx-keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/pmic8xxx-keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/pmic8xxx-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/pmic8xxx-keypad.c</a></div><div class='hunk'>@@ -626,21 +626,21 @@ static int __devinit pmic8xxx_kp_probe(struct platform_device *pdev)</div><div class='ctx'> 	kp-&gt;input-&gt;id.product	= 0x0001;</div><div class='ctx'> 	kp-&gt;input-&gt;id.vendor	= 0x0001;</div><div class='ctx'> </div><div class='del'>-	kp-&gt;input-&gt;evbit[0]	= BIT_MASK(EV_KEY);</div><div class='del'>-</div><div class='del'>-	if (pdata-&gt;rep)</div><div class='del'>-		__set_bit(EV_REP, kp-&gt;input-&gt;evbit);</div><div class='del'>-</div><div class='del'>-	kp-&gt;input-&gt;keycode	= kp-&gt;keycodes;</div><div class='del'>-	kp-&gt;input-&gt;keycodemax	= PM8XXX_MATRIX_MAX_SIZE;</div><div class='del'>-	kp-&gt;input-&gt;keycodesize	= sizeof(kp-&gt;keycodes);</div><div class='ctx'> 	kp-&gt;input-&gt;open		= pmic8xxx_kp_open;</div><div class='ctx'> 	kp-&gt;input-&gt;close	= pmic8xxx_kp_close;</div><div class='ctx'> </div><div class='del'>-	matrix_keypad_build_keymap(keymap_data, PM8XXX_ROW_SHIFT,</div><div class='del'>-					kp-&gt;input-&gt;keycode, kp-&gt;input-&gt;keybit);</div><div class='add'>+	rc = matrix_keypad_build_keymap(keymap_data, NULL,</div><div class='add'>+					PM8XXX_MAX_ROWS, PM8XXX_MAX_COLS,</div><div class='add'>+					kp-&gt;keycodes, kp-&gt;input);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to build keymap\n");</div><div class='add'>+		goto err_get_irq;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	if (pdata-&gt;rep)</div><div class='add'>+		__set_bit(EV_REP, kp-&gt;input-&gt;evbit);</div><div class='ctx'> 	input_set_capability(kp-&gt;input, EV_MSC, MSC_SCAN);</div><div class='add'>+</div><div class='ctx'> 	input_set_drvdata(kp-&gt;input, kp);</div><div class='ctx'> </div><div class='ctx'> 	/* initialize keypad state */</div><div class='head'>diff --git a/drivers/input/keyboard/pxa27x_keypad.c b/drivers/input/keyboard/pxa27x_keypad.c<br/>index 29fe1b2be1c1..7f7b72464a37 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/pxa27x_keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/pxa27x_keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/pxa27x_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/pxa27x_keypad.c</a></div><div class='hunk'>@@ -311,7 +311,15 @@ static void pxa27x_keypad_scan_direct(struct pxa27x_keypad *keypad)</div><div class='ctx'> 	if (pdata-&gt;enable_rotary0 || pdata-&gt;enable_rotary1)</div><div class='ctx'> 		pxa27x_keypad_scan_rotary(keypad);</div><div class='ctx'> </div><div class='del'>-	new_state = KPDK_DK(kpdk) &amp; keypad-&gt;direct_key_mask;</div><div class='add'>+	/*</div><div class='add'>+	 * The KPDR_DK only output the key pin level, so it relates to board,</div><div class='add'>+	 * and low level may be active.</div><div class='add'>+	 */</div><div class='add'>+	if (pdata-&gt;direct_key_low_active)</div><div class='add'>+		new_state = ~KPDK_DK(kpdk) &amp; keypad-&gt;direct_key_mask;</div><div class='add'>+	else</div><div class='add'>+		new_state = KPDK_DK(kpdk) &amp; keypad-&gt;direct_key_mask;</div><div class='add'>+</div><div class='ctx'> 	bits_changed = keypad-&gt;direct_key_state ^ new_state;</div><div class='ctx'> </div><div class='ctx'> 	if (bits_changed == 0)</div><div class='hunk'>@@ -383,7 +391,14 @@ static void pxa27x_keypad_config(struct pxa27x_keypad *keypad)</div><div class='ctx'> 	if (pdata-&gt;direct_key_num &gt; direct_key_num)</div><div class='ctx'> 		direct_key_num = pdata-&gt;direct_key_num;</div><div class='ctx'> </div><div class='del'>-	keypad-&gt;direct_key_mask = ((2 &lt;&lt; direct_key_num) - 1) &amp; ~mask;</div><div class='add'>+	/*</div><div class='add'>+	 * Direct keys usage may not start from KP_DKIN0, check the platfrom</div><div class='add'>+	 * mask data to config the specific.</div><div class='add'>+	 */</div><div class='add'>+	if (pdata-&gt;direct_key_mask)</div><div class='add'>+		keypad-&gt;direct_key_mask = pdata-&gt;direct_key_mask;</div><div class='add'>+	else</div><div class='add'>+		keypad-&gt;direct_key_mask = ((1 &lt;&lt; direct_key_num) - 1) &amp; ~mask;</div><div class='ctx'> </div><div class='ctx'> 	/* enable direct key */</div><div class='ctx'> 	if (direct_key_num)</div><div class='hunk'>@@ -399,7 +414,7 @@ static int pxa27x_keypad_open(struct input_dev *dev)</div><div class='ctx'> 	struct pxa27x_keypad *keypad = input_get_drvdata(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable unit clock */</div><div class='del'>-	clk_enable(keypad-&gt;clk);</div><div class='add'>+	clk_prepare_enable(keypad-&gt;clk);</div><div class='ctx'> 	pxa27x_keypad_config(keypad);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -410,7 +425,7 @@ static void pxa27x_keypad_close(struct input_dev *dev)</div><div class='ctx'> 	struct pxa27x_keypad *keypad = input_get_drvdata(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable clock unit */</div><div class='del'>-	clk_disable(keypad-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(keypad-&gt;clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM</div><div class='hunk'>@@ -419,10 +434,14 @@ static int pxa27x_keypad_suspend(struct device *dev)</div><div class='ctx'> 	struct platform_device *pdev = to_platform_device(dev);</div><div class='ctx'> 	struct pxa27x_keypad *keypad = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='del'>-	clk_disable(keypad-&gt;clk);</div><div class='del'>-</div><div class='add'>+	/*</div><div class='add'>+	 * If the keypad is used a wake up source, clock can not be disabled.</div><div class='add'>+	 * Or it can not detect the key pressing.</div><div class='add'>+	 */</div><div class='ctx'> 	if (device_may_wakeup(&amp;pdev-&gt;dev))</div><div class='ctx'> 		enable_irq_wake(keypad-&gt;irq);</div><div class='add'>+	else</div><div class='add'>+		clk_disable_unprepare(keypad-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -433,19 +452,24 @@ static int pxa27x_keypad_resume(struct device *dev)</div><div class='ctx'> 	struct pxa27x_keypad *keypad = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct input_dev *input_dev = keypad-&gt;input_dev;</div><div class='ctx'> </div><div class='del'>-	if (device_may_wakeup(&amp;pdev-&gt;dev))</div><div class='add'>+	/*</div><div class='add'>+	 * If the keypad is used as wake up source, the clock is not turned</div><div class='add'>+	 * off. So do not need configure it again.</div><div class='add'>+	 */</div><div class='add'>+	if (device_may_wakeup(&amp;pdev-&gt;dev)) {</div><div class='ctx'> 		disable_irq_wake(keypad-&gt;irq);</div><div class='add'>+	} else {</div><div class='add'>+		mutex_lock(&amp;input_dev-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;input_dev-&gt;mutex);</div><div class='add'>+		if (input_dev-&gt;users) {</div><div class='add'>+			/* Enable unit clock */</div><div class='add'>+			clk_prepare_enable(keypad-&gt;clk);</div><div class='add'>+			pxa27x_keypad_config(keypad);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (input_dev-&gt;users) {</div><div class='del'>-		/* Enable unit clock */</div><div class='del'>-		clk_enable(keypad-&gt;clk);</div><div class='del'>-		pxa27x_keypad_config(keypad);</div><div class='add'>+		mutex_unlock(&amp;input_dev-&gt;mutex);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;input_dev-&gt;mutex);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/input/keyboard/samsung-keypad.c b/drivers/input/keyboard/samsung-keypad.c<br/>index 2391ae884fee..a061ba603a29 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/samsung-keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/samsung-keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/samsung-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/samsung-keypad.c</a></div><div class='hunk'>@@ -454,23 +454,23 @@ static int __devinit samsung_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	input_dev-&gt;name = pdev-&gt;name;</div><div class='ctx'> 	input_dev-&gt;id.bustype = BUS_HOST;</div><div class='ctx'> 	input_dev-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='del'>-	input_set_drvdata(input_dev, keypad);</div><div class='ctx'> </div><div class='ctx'> 	input_dev-&gt;open = samsung_keypad_open;</div><div class='ctx'> 	input_dev-&gt;close = samsung_keypad_close;</div><div class='ctx'> </div><div class='del'>-	input_dev-&gt;evbit[0] = BIT_MASK(EV_KEY);</div><div class='del'>-	if (!pdata-&gt;no_autorepeat)</div><div class='del'>-		input_dev-&gt;evbit[0] |= BIT_MASK(EV_REP);</div><div class='add'>+	error = matrix_keypad_build_keymap(keymap_data, NULL,</div><div class='add'>+					   pdata-&gt;rows, pdata-&gt;cols,</div><div class='add'>+					   keypad-&gt;keycodes, input_dev);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to build keymap\n");</div><div class='add'>+		goto err_put_clk;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	input_set_capability(input_dev, EV_MSC, MSC_SCAN);</div><div class='add'>+	if (!pdata-&gt;no_autorepeat)</div><div class='add'>+		__set_bit(EV_REP, input_dev-&gt;evbit);</div><div class='ctx'> </div><div class='del'>-	input_dev-&gt;keycode = keypad-&gt;keycodes;</div><div class='del'>-	input_dev-&gt;keycodesize = sizeof(keypad-&gt;keycodes[0]);</div><div class='del'>-	input_dev-&gt;keycodemax = pdata-&gt;rows &lt;&lt; row_shift;</div><div class='del'>-</div><div class='del'>-	matrix_keypad_build_keymap(keymap_data, row_shift,</div><div class='del'>-			input_dev-&gt;keycode, input_dev-&gt;keybit);</div><div class='add'>+	input_set_drvdata(input_dev, keypad);</div><div class='ctx'> </div><div class='ctx'> 	keypad-&gt;irq = platform_get_irq(pdev, 0);</div><div class='ctx'> 	if (keypad-&gt;irq &lt; 0) {</div><div class='head'>diff --git a/drivers/input/keyboard/spear-keyboard.c b/drivers/input/keyboard/spear-keyboard.c<br/>index 3b6b528f02fd..6f287f7e1538 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/spear-keyboard.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/spear-keyboard.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/spear-keyboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/spear-keyboard.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/pm_wakeup.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -49,7 +50,9 @@</div><div class='ctx'> #define KEY_VALUE	0x00FFFFFF</div><div class='ctx'> #define ROW_MASK	0xF0</div><div class='ctx'> #define COLUMN_MASK	0x0F</div><div class='del'>-#define ROW_SHIFT	4</div><div class='add'>+#define NUM_ROWS	16</div><div class='add'>+#define NUM_COLS	16</div><div class='add'>+</div><div class='ctx'> #define KEY_MATRIX_SHIFT	6</div><div class='ctx'> </div><div class='ctx'> struct spear_kbd {</div><div class='hunk'>@@ -60,7 +63,8 @@ struct spear_kbd {</div><div class='ctx'> 	unsigned int irq;</div><div class='ctx'> 	unsigned int mode;</div><div class='ctx'> 	unsigned short last_key;</div><div class='del'>-	unsigned short keycodes[256];</div><div class='add'>+	unsigned short keycodes[NUM_ROWS * NUM_COLS];</div><div class='add'>+	bool rep;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t spear_kbd_interrupt(int irq, void *dev_id)</div><div class='hunk'>@@ -136,27 +140,49 @@ static void spear_kbd_close(struct input_dev *dev)</div><div class='ctx'> 	kbd-&gt;last_key = KEY_RESERVED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __devinit spear_kbd_probe(struct platform_device *pdev)</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static int __devinit spear_kbd_parse_dt(struct platform_device *pdev,</div><div class='add'>+                                        struct spear_kbd *kbd)</div><div class='ctx'> {</div><div class='del'>-	const struct kbd_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='del'>-	const struct matrix_keymap_data *keymap;</div><div class='del'>-	struct spear_kbd *kbd;</div><div class='del'>-	struct input_dev *input_dev;</div><div class='del'>-	struct resource *res;</div><div class='del'>-	int irq;</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='ctx'> 	int error;</div><div class='add'>+	u32 val;</div><div class='ctx'> </div><div class='del'>-	if (!pdata) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Invalid platform data\n");</div><div class='add'>+	if (!np) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Missing DT data\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	keymap = pdata-&gt;keymap;</div><div class='del'>-	if (!keymap) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "no keymap defined\n");</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (of_property_read_bool(np, "autorepeat"))</div><div class='add'>+		kbd-&gt;rep = true;</div><div class='add'>+</div><div class='add'>+	error = of_property_read_u32(np, "st,mode", &amp;val);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "DT: Invalid or missing mode\n");</div><div class='add'>+		return error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	kbd-&gt;mode = val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline int spear_kbd_parse_dt(struct platform_device *pdev,</div><div class='add'>+				     struct spear_kbd *kbd)</div><div class='add'>+{</div><div class='add'>+	return -ENOSYS;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int __devinit spear_kbd_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct kbd_platform_data *pdata = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+	const struct matrix_keymap_data *keymap = pdata ? pdata-&gt;keymap : NULL;</div><div class='add'>+	struct spear_kbd *kbd;</div><div class='add'>+	struct input_dev *input_dev;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	int irq;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='ctx'> 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	if (!res) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "no keyboard resource defined\n");</div><div class='hunk'>@@ -179,7 +205,15 @@ static int __devinit spear_kbd_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	kbd-&gt;input = input_dev;</div><div class='ctx'> 	kbd-&gt;irq = irq;</div><div class='del'>-	kbd-&gt;mode = pdata-&gt;mode;</div><div class='add'>+</div><div class='add'>+	if (!pdata) {</div><div class='add'>+		error = spear_kbd_parse_dt(pdev, kbd);</div><div class='add'>+		if (error)</div><div class='add'>+			goto err_free_mem;</div><div class='add'>+	} else {</div><div class='add'>+		kbd-&gt;mode = pdata-&gt;mode;</div><div class='add'>+		kbd-&gt;rep = pdata-&gt;rep;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	kbd-&gt;res = request_mem_region(res-&gt;start, resource_size(res),</div><div class='ctx'> 				      pdev-&gt;name);</div><div class='hunk'>@@ -212,18 +246,17 @@ static int __devinit spear_kbd_probe(struct platform_device *pdev)</div><div class='ctx'> 	input_dev-&gt;open = spear_kbd_open;</div><div class='ctx'> 	input_dev-&gt;close = spear_kbd_close;</div><div class='ctx'> </div><div class='del'>-	__set_bit(EV_KEY, input_dev-&gt;evbit);</div><div class='del'>-	if (pdata-&gt;rep)</div><div class='add'>+	error = matrix_keypad_build_keymap(keymap, NULL, NUM_ROWS, NUM_COLS,</div><div class='add'>+					   kbd-&gt;keycodes, input_dev);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to build keymap\n");</div><div class='add'>+		goto err_put_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (kbd-&gt;rep)</div><div class='ctx'> 		__set_bit(EV_REP, input_dev-&gt;evbit);</div><div class='ctx'> 	input_set_capability(input_dev, EV_MSC, MSC_SCAN);</div><div class='ctx'> </div><div class='del'>-	input_dev-&gt;keycode = kbd-&gt;keycodes;</div><div class='del'>-	input_dev-&gt;keycodesize = sizeof(kbd-&gt;keycodes[0]);</div><div class='del'>-	input_dev-&gt;keycodemax = ARRAY_SIZE(kbd-&gt;keycodes);</div><div class='del'>-</div><div class='del'>-	matrix_keypad_build_keymap(keymap, ROW_SHIFT,</div><div class='del'>-			input_dev-&gt;keycode, input_dev-&gt;keybit);</div><div class='del'>-</div><div class='ctx'> 	input_set_drvdata(input_dev, kbd);</div><div class='ctx'> </div><div class='ctx'> 	error = request_irq(irq, spear_kbd_interrupt, 0, "keyboard", kbd);</div><div class='hunk'>@@ -317,6 +350,14 @@ static int spear_kbd_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> static SIMPLE_DEV_PM_OPS(spear_kbd_pm_ops, spear_kbd_suspend, spear_kbd_resume);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static const struct of_device_id spear_kbd_id_table[] = {</div><div class='add'>+	{ .compatible = "st,spear300-kbd" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, spear_kbd_id_table);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct platform_driver spear_kbd_driver = {</div><div class='ctx'> 	.probe		= spear_kbd_probe,</div><div class='ctx'> 	.remove		= __devexit_p(spear_kbd_remove),</div><div class='hunk'>@@ -324,6 +365,7 @@ static struct platform_driver spear_kbd_driver = {</div><div class='ctx'> 		.name	= "keyboard",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 		.pm	= &amp;spear_kbd_pm_ops,</div><div class='add'>+		.of_match_table = of_match_ptr(spear_kbd_id_table),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> module_platform_driver(spear_kbd_driver);</div><div class='head'>diff --git a/drivers/input/keyboard/stmpe-keypad.c b/drivers/input/keyboard/stmpe-keypad.c<br/>index 9397cf9c625c..470a8778dec1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/stmpe-keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/stmpe-keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/stmpe-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/stmpe-keypad.c</a></div><div class='hunk'>@@ -289,19 +289,17 @@ static int __devinit stmpe_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	input-&gt;id.bustype = BUS_I2C;</div><div class='ctx'> 	input-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	input_set_capability(input, EV_MSC, MSC_SCAN);</div><div class='add'>+	ret = matrix_keypad_build_keymap(plat-&gt;keymap_data, NULL,</div><div class='add'>+					 STMPE_KEYPAD_MAX_ROWS,</div><div class='add'>+					 STMPE_KEYPAD_MAX_COLS,</div><div class='add'>+					 keypad-&gt;keymap, input);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_freeinput;</div><div class='ctx'> </div><div class='del'>-	__set_bit(EV_KEY, input-&gt;evbit);</div><div class='add'>+	input_set_capability(input, EV_MSC, MSC_SCAN);</div><div class='ctx'> 	if (!plat-&gt;no_autorepeat)</div><div class='ctx'> 		__set_bit(EV_REP, input-&gt;evbit);</div><div class='ctx'> </div><div class='del'>-	input-&gt;keycode = keypad-&gt;keymap;</div><div class='del'>-	input-&gt;keycodesize = sizeof(keypad-&gt;keymap[0]);</div><div class='del'>-	input-&gt;keycodemax = ARRAY_SIZE(keypad-&gt;keymap);</div><div class='del'>-</div><div class='del'>-	matrix_keypad_build_keymap(plat-&gt;keymap_data, STMPE_KEYPAD_ROW_SHIFT,</div><div class='del'>-				   input-&gt;keycode, input-&gt;keybit);</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; plat-&gt;keymap_data-&gt;keymap_size; i++) {</div><div class='ctx'> 		unsigned int key = plat-&gt;keymap_data-&gt;keymap[i];</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/input/keyboard/stowaway.c b/drivers/input/keyboard/stowaway.c<br/>index 7437219370b1..cc612c5d5427 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/stowaway.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/stowaway.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/stowaway.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/stowaway.c</a></div><div class='hunk'>@@ -170,15 +170,4 @@ static struct serio_driver skbd_drv = {</div><div class='ctx'> 	.disconnect	= skbd_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init skbd_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;skbd_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit skbd_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;skbd_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(skbd_init);</div><div class='del'>-module_exit(skbd_exit);</div><div class='add'>+module_serio_driver(skbd_drv);</div><div class='head'>diff --git a/drivers/input/keyboard/sunkbd.c b/drivers/input/keyboard/sunkbd.c<br/>index a99a04b03ee4..5f836b1638c1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/sunkbd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/sunkbd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/sunkbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/sunkbd.c</a></div><div class='hunk'>@@ -369,19 +369,4 @@ static struct serio_driver sunkbd_drv = {</div><div class='ctx'> 	.disconnect	= sunkbd_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for insering/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init sunkbd_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;sunkbd_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sunkbd_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;sunkbd_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sunkbd_init);</div><div class='del'>-module_exit(sunkbd_exit);</div><div class='add'>+module_serio_driver(sunkbd_drv);</div><div class='head'>diff --git a/drivers/input/keyboard/tc3589x-keypad.c b/drivers/input/keyboard/tc3589x-keypad.c<br/>index 2dee3e4e7c6f..7d498e698508 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/tc3589x-keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/tc3589x-keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/tc3589x-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/tc3589x-keypad.c</a></div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'>  * @input:      pointer to input device object</div><div class='ctx'>  * @board:      keypad platform device</div><div class='ctx'>  * @krow:	number of rows</div><div class='del'>- * @kcol:	number of coloumns</div><div class='add'>+ * @kcol:	number of columns</div><div class='ctx'>  * @keymap:     matrix scan code table for keycodes</div><div class='ctx'>  * @keypad_stopped: holds keypad status</div><div class='ctx'>  */</div><div class='hunk'>@@ -96,21 +96,15 @@ static int tc3589x_keypad_init_key_hardware(struct tc_keypad *keypad)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct tc3589x *tc3589x = keypad-&gt;tc3589x;</div><div class='del'>-	u8 settle_time = keypad-&gt;board-&gt;settle_time;</div><div class='del'>-	u8 dbounce_period = keypad-&gt;board-&gt;debounce_period;</div><div class='del'>-	u8 rows = keypad-&gt;board-&gt;krow &amp; 0xf;	/* mask out the nibble */</div><div class='del'>-	u8 column = keypad-&gt;board-&gt;kcol &amp; 0xf;	/* mask out the nibble */</div><div class='del'>-</div><div class='del'>-	/* validate platform configurations */</div><div class='del'>-	if (keypad-&gt;board-&gt;kcol &gt; TC3589x_MAX_KPCOL ||</div><div class='del'>-	    keypad-&gt;board-&gt;krow &gt; TC3589x_MAX_KPROW ||</div><div class='del'>-	    keypad-&gt;board-&gt;debounce_period &gt; TC3589x_MAX_DEBOUNCE_SETTLE ||</div><div class='del'>-	    keypad-&gt;board-&gt;settle_time &gt; TC3589x_MAX_DEBOUNCE_SETTLE)</div><div class='add'>+	const struct tc3589x_keypad_platform_data *board = keypad-&gt;board;</div><div class='add'>+</div><div class='add'>+	/* validate platform configuration */</div><div class='add'>+	if (board-&gt;kcol &gt; TC3589x_MAX_KPCOL || board-&gt;krow &gt; TC3589x_MAX_KPROW)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* configure KBDSIZE 4 LSbits for cols and 4 MSbits for rows */</div><div class='ctx'> 	ret = tc3589x_reg_write(tc3589x, TC3589x_KBDSIZE,</div><div class='del'>-			(rows &lt;&lt; KP_ROW_SHIFT) | column);</div><div class='add'>+			(board-&gt;krow &lt;&lt; KP_ROW_SHIFT) | board-&gt;kcol);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -124,12 +118,14 @@ static int tc3589x_keypad_init_key_hardware(struct tc_keypad *keypad)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Configure settle time */</div><div class='del'>-	ret = tc3589x_reg_write(tc3589x, TC3589x_KBDSETTLE_REG, settle_time);</div><div class='add'>+	ret = tc3589x_reg_write(tc3589x, TC3589x_KBDSETTLE_REG,</div><div class='add'>+				board-&gt;settle_time);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Configure debounce time */</div><div class='del'>-	ret = tc3589x_reg_write(tc3589x, TC3589x_KBDBOUNCE, dbounce_period);</div><div class='add'>+	ret = tc3589x_reg_write(tc3589x, TC3589x_KBDBOUNCE,</div><div class='add'>+				board-&gt;debounce_period);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -337,23 +333,22 @@ static int __devinit tc3589x_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	input-&gt;name = pdev-&gt;name;</div><div class='ctx'> 	input-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	input-&gt;keycode = keypad-&gt;keymap;</div><div class='del'>-	input-&gt;keycodesize = sizeof(keypad-&gt;keymap[0]);</div><div class='del'>-	input-&gt;keycodemax = ARRAY_SIZE(keypad-&gt;keymap);</div><div class='del'>-</div><div class='ctx'> 	input-&gt;open = tc3589x_keypad_open;</div><div class='ctx'> 	input-&gt;close = tc3589x_keypad_close;</div><div class='ctx'> </div><div class='del'>-	input_set_drvdata(input, keypad);</div><div class='add'>+	error = matrix_keypad_build_keymap(plat-&gt;keymap_data, NULL,</div><div class='add'>+					   TC3589x_MAX_KPROW, TC3589x_MAX_KPCOL,</div><div class='add'>+					   keypad-&gt;keymap, input);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to build keymap\n");</div><div class='add'>+		goto err_free_mem;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	input_set_capability(input, EV_MSC, MSC_SCAN);</div><div class='del'>-</div><div class='del'>-	__set_bit(EV_KEY, input-&gt;evbit);</div><div class='ctx'> 	if (!plat-&gt;no_autorepeat)</div><div class='ctx'> 		__set_bit(EV_REP, input-&gt;evbit);</div><div class='ctx'> </div><div class='del'>-	matrix_keypad_build_keymap(plat-&gt;keymap_data, 0x3,</div><div class='del'>-			input-&gt;keycode, input-&gt;keybit);</div><div class='add'>+	input_set_drvdata(input, keypad);</div><div class='ctx'> </div><div class='ctx'> 	error = request_threaded_irq(irq, NULL,</div><div class='ctx'> 			tc3589x_keypad_irq, plat-&gt;irqtype,</div><div class='head'>diff --git a/drivers/input/keyboard/tca8418_keypad.c b/drivers/input/keyboard/tca8418_keypad.c<br/>index 958ec107bfbc..5f87b28b3192 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/tca8418_keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/tca8418_keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/tca8418_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/tca8418_keypad.c</a></div><div class='hunk'>@@ -342,21 +342,20 @@ static int __devinit tca8418_keypad_probe(struct i2c_client *client,</div><div class='ctx'> 	input-&gt;id.product = 0x001;</div><div class='ctx'> 	input-&gt;id.version = 0x0001;</div><div class='ctx'> </div><div class='del'>-	input-&gt;keycode     = keypad_data-&gt;keymap;</div><div class='del'>-	input-&gt;keycodesize = sizeof(keypad_data-&gt;keymap[0]);</div><div class='del'>-	input-&gt;keycodemax  = max_keys;</div><div class='add'>+	error = matrix_keypad_build_keymap(pdata-&gt;keymap_data, NULL,</div><div class='add'>+					   pdata-&gt;rows, pdata-&gt;cols,</div><div class='add'>+					   keypad_data-&gt;keymap, input);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_dbg(&amp;client-&gt;dev, "Failed to build keymap\n");</div><div class='add'>+		goto fail2;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	__set_bit(EV_KEY, input-&gt;evbit);</div><div class='ctx'> 	if (pdata-&gt;rep)</div><div class='ctx'> 		__set_bit(EV_REP, input-&gt;evbit);</div><div class='del'>-</div><div class='ctx'> 	input_set_capability(input, EV_MSC, MSC_SCAN);</div><div class='ctx'> </div><div class='ctx'> 	input_set_drvdata(input, keypad_data);</div><div class='ctx'> </div><div class='del'>-	matrix_keypad_build_keymap(pdata-&gt;keymap_data, row_shift,</div><div class='del'>-			input-&gt;keycode, input-&gt;keybit);</div><div class='del'>-</div><div class='ctx'> 	if (pdata-&gt;irq_is_gpio)</div><div class='ctx'> 		client-&gt;irq = gpio_to_irq(client-&gt;irq);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/input/keyboard/tegra-kbc.c b/drivers/input/keyboard/tegra-kbc.c<br/>index fe4ac95ca6c8..4ffe64d53107 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/tegra-kbc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/tegra-kbc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/tegra-kbc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/tegra-kbc.c</a></div><div class='hunk'>@@ -619,8 +619,8 @@ tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OF</div><div class='del'>-static struct tegra_kbc_platform_data * __devinit</div><div class='del'>-tegra_kbc_dt_parse_pdata(struct platform_device *pdev)</div><div class='add'>+static struct tegra_kbc_platform_data * __devinit tegra_kbc_dt_parse_pdata(</div><div class='add'>+	struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tegra_kbc_platform_data *pdata;</div><div class='ctx'> 	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='hunk'>@@ -660,10 +660,6 @@ tegra_kbc_dt_parse_pdata(struct platform_device *pdev)</div><div class='ctx'> 		pdata-&gt;pin_cfg[KBC_MAX_ROW + i].type = PIN_CFG_COL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;keymap_data = matrix_keyboard_of_fill_keymap(np, "linux,keymap");</div><div class='del'>-</div><div class='del'>-	/* FIXME: Add handling of linux,fn-keymap here */</div><div class='del'>-</div><div class='ctx'> 	return pdata;</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='hunk'>@@ -674,10 +670,36 @@ static inline struct tegra_kbc_platform_data *tegra_kbc_dt_parse_pdata(</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static int __devinit tegra_kbd_setup_keymap(struct tegra_kbc *kbc)</div><div class='add'>+{</div><div class='add'>+	const struct tegra_kbc_platform_data *pdata = kbc-&gt;pdata;</div><div class='add'>+	const struct matrix_keymap_data *keymap_data = pdata-&gt;keymap_data;</div><div class='add'>+	unsigned int keymap_rows = KBC_MAX_KEY;</div><div class='add'>+	int retval;</div><div class='add'>+</div><div class='add'>+	if (keymap_data &amp;&amp; pdata-&gt;use_fn_map)</div><div class='add'>+		keymap_rows *= 2;</div><div class='add'>+</div><div class='add'>+	retval = matrix_keypad_build_keymap(keymap_data, NULL,</div><div class='add'>+					    keymap_rows, KBC_MAX_COL,</div><div class='add'>+					    kbc-&gt;keycode, kbc-&gt;idev);</div><div class='add'>+	if (retval == -ENOSYS || retval == -ENOENT) {</div><div class='add'>+		/*</div><div class='add'>+		 * If there is no OF support in kernel or keymap</div><div class='add'>+		 * property is missing, use default keymap.</div><div class='add'>+		 */</div><div class='add'>+		retval = matrix_keypad_build_keymap(</div><div class='add'>+					&amp;tegra_kbc_default_keymap_data, NULL,</div><div class='add'>+					keymap_rows, KBC_MAX_COL,</div><div class='add'>+					kbc-&gt;keycode, kbc-&gt;idev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return retval;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __devinit tegra_kbc_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct tegra_kbc_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='del'>-	const struct matrix_keymap_data *keymap_data;</div><div class='ctx'> 	struct tegra_kbc *kbc;</div><div class='ctx'> 	struct input_dev *input_dev;</div><div class='ctx'> 	struct resource *res;</div><div class='hunk'>@@ -757,29 +779,26 @@ static int __devinit tegra_kbc_probe(struct platform_device *pdev)</div><div class='ctx'> 	kbc-&gt;repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata-&gt;repeat_cnt;</div><div class='ctx'> 	kbc-&gt;repoll_dly = DIV_ROUND_UP(kbc-&gt;repoll_dly, KBC_CYCLE_MS);</div><div class='ctx'> </div><div class='add'>+	kbc-&gt;wakeup_key = pdata-&gt;wakeup_key;</div><div class='add'>+	kbc-&gt;use_fn_map = pdata-&gt;use_fn_map;</div><div class='add'>+	kbc-&gt;use_ghost_filter = pdata-&gt;use_ghost_filter;</div><div class='add'>+</div><div class='ctx'> 	input_dev-&gt;name = pdev-&gt;name;</div><div class='ctx'> 	input_dev-&gt;id.bustype = BUS_HOST;</div><div class='ctx'> 	input_dev-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='ctx'> 	input_dev-&gt;open = tegra_kbc_open;</div><div class='ctx'> 	input_dev-&gt;close = tegra_kbc_close;</div><div class='ctx'> </div><div class='del'>-	input_set_drvdata(input_dev, kbc);</div><div class='add'>+	err = tegra_kbd_setup_keymap(kbc);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to setup keymap\n");</div><div class='add'>+		goto err_put_clk;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	input_dev-&gt;evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);</div><div class='add'>+	__set_bit(EV_REP, input_dev-&gt;evbit);</div><div class='ctx'> 	input_set_capability(input_dev, EV_MSC, MSC_SCAN);</div><div class='ctx'> </div><div class='del'>-	input_dev-&gt;keycode = kbc-&gt;keycode;</div><div class='del'>-	input_dev-&gt;keycodesize = sizeof(kbc-&gt;keycode[0]);</div><div class='del'>-	input_dev-&gt;keycodemax = KBC_MAX_KEY;</div><div class='del'>-	if (pdata-&gt;use_fn_map)</div><div class='del'>-		input_dev-&gt;keycodemax *= 2;</div><div class='del'>-</div><div class='del'>-	kbc-&gt;use_fn_map = pdata-&gt;use_fn_map;</div><div class='del'>-	kbc-&gt;use_ghost_filter = pdata-&gt;use_ghost_filter;</div><div class='del'>-	keymap_data = pdata-&gt;keymap_data ?: &amp;tegra_kbc_default_keymap_data;</div><div class='del'>-	matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT,</div><div class='del'>-				   input_dev-&gt;keycode, input_dev-&gt;keybit);</div><div class='del'>-	kbc-&gt;wakeup_key = pdata-&gt;wakeup_key;</div><div class='add'>+	input_set_drvdata(input_dev, kbc);</div><div class='ctx'> </div><div class='ctx'> 	err = request_irq(kbc-&gt;irq, tegra_kbc_isr,</div><div class='ctx'> 			  IRQF_NO_SUSPEND | IRQF_TRIGGER_HIGH, pdev-&gt;name, kbc);</div><div class='hunk'>@@ -799,9 +818,6 @@ static int __devinit tegra_kbc_probe(struct platform_device *pdev)</div><div class='ctx'> 	platform_set_drvdata(pdev, kbc);</div><div class='ctx'> 	device_init_wakeup(&amp;pdev-&gt;dev, pdata-&gt;wakeup);</div><div class='ctx'> </div><div class='del'>-	if (!pdev-&gt;dev.platform_data)</div><div class='del'>-		matrix_keyboard_of_free_keymap(pdata-&gt;keymap_data);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_free_irq:</div><div class='hunk'>@@ -816,10 +832,8 @@ err_free_mem:</div><div class='ctx'> 	input_free_device(input_dev);</div><div class='ctx'> 	kfree(kbc);</div><div class='ctx'> err_free_pdata:</div><div class='del'>-	if (!pdev-&gt;dev.platform_data) {</div><div class='del'>-		matrix_keyboard_of_free_keymap(pdata-&gt;keymap_data);</div><div class='add'>+	if (!pdev-&gt;dev.platform_data)</div><div class='ctx'> 		kfree(pdata);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/input/keyboard/tnetv107x-keypad.c b/drivers/input/keyboard/tnetv107x-keypad.c<br/>index fb39c94b6fdd..a4a445fb7020 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/tnetv107x-keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/tnetv107x-keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/tnetv107x-keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/tnetv107x-keypad.c</a></div><div class='hunk'>@@ -247,15 +247,11 @@ static int __devinit keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 		error = -ENOMEM;</div><div class='ctx'> 		goto error_input;</div><div class='ctx'> 	}</div><div class='del'>-	input_set_drvdata(kp-&gt;input_dev, kp);</div><div class='ctx'> </div><div class='ctx'> 	kp-&gt;input_dev-&gt;name	  = pdev-&gt;name;</div><div class='ctx'> 	kp-&gt;input_dev-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='ctx'> 	kp-&gt;input_dev-&gt;open	  = keypad_start;</div><div class='ctx'> 	kp-&gt;input_dev-&gt;close	  = keypad_stop;</div><div class='del'>-	kp-&gt;input_dev-&gt;evbit[0]	  = BIT_MASK(EV_KEY);</div><div class='del'>-	if (!pdata-&gt;no_autorepeat)</div><div class='del'>-		kp-&gt;input_dev-&gt;evbit[0] |= BIT_MASK(EV_REP);</div><div class='ctx'> </div><div class='ctx'> 	clk_enable(kp-&gt;clk);</div><div class='ctx'> 	rev = keypad_read(kp, rev);</div><div class='hunk'>@@ -264,15 +260,20 @@ static int __devinit keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	kp-&gt;input_dev-&gt;id.version = ((rev &gt;&gt; 16) &amp; 0xfff);</div><div class='ctx'> 	clk_disable(kp-&gt;clk);</div><div class='ctx'> </div><div class='del'>-	kp-&gt;input_dev-&gt;keycode     = kp-&gt;keycodes;</div><div class='del'>-	kp-&gt;input_dev-&gt;keycodesize = sizeof(kp-&gt;keycodes[0]);</div><div class='del'>-	kp-&gt;input_dev-&gt;keycodemax  = kp-&gt;rows &lt;&lt; kp-&gt;row_shift;</div><div class='del'>-</div><div class='del'>-	matrix_keypad_build_keymap(keymap_data, kp-&gt;row_shift, kp-&gt;keycodes,</div><div class='del'>-				   kp-&gt;input_dev-&gt;keybit);</div><div class='add'>+	error = matrix_keypad_build_keymap(keymap_data, NULL,</div><div class='add'>+					   kp-&gt;rows, kp-&gt;cols,</div><div class='add'>+					   kp-&gt;keycodes, kp-&gt;input_dev);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(dev, "Failed to build keymap\n");</div><div class='add'>+		goto error_reg;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	if (!pdata-&gt;no_autorepeat)</div><div class='add'>+		kp-&gt;input_dev-&gt;evbit[0] |= BIT_MASK(EV_REP);</div><div class='ctx'> 	input_set_capability(kp-&gt;input_dev, EV_MSC, MSC_SCAN);</div><div class='ctx'> </div><div class='add'>+	input_set_drvdata(kp-&gt;input_dev, kp);</div><div class='add'>+</div><div class='ctx'> 	error = input_register_device(kp-&gt;input_dev);</div><div class='ctx'> 	if (error &lt; 0) {</div><div class='ctx'> 		dev_err(dev, "Could not register input device\n");</div><div class='head'>diff --git a/drivers/input/keyboard/twl4030_keypad.c b/drivers/input/keyboard/twl4030_keypad.c<br/>index 67bec14e8b96..a2c6f79aa101 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/twl4030_keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/twl4030_keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/twl4030_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/twl4030_keypad.c</a></div><div class='hunk'>@@ -361,14 +361,6 @@ static int __devinit twl4030_kp_probe(struct platform_device *pdev)</div><div class='ctx'> 	kp-&gt;irq = platform_get_irq(pdev, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* setup input device */</div><div class='del'>-	__set_bit(EV_KEY, input-&gt;evbit);</div><div class='del'>-</div><div class='del'>-	/* Enable auto repeat feature of Linux input subsystem */</div><div class='del'>-	if (pdata-&gt;rep)</div><div class='del'>-		__set_bit(EV_REP, input-&gt;evbit);</div><div class='del'>-</div><div class='del'>-	input_set_capability(input, EV_MSC, MSC_SCAN);</div><div class='del'>-</div><div class='ctx'> 	input-&gt;name		= "TWL4030 Keypad";</div><div class='ctx'> 	input-&gt;phys		= "twl4030_keypad/input0";</div><div class='ctx'> 	input-&gt;dev.parent	= &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -378,12 +370,19 @@ static int __devinit twl4030_kp_probe(struct platform_device *pdev)</div><div class='ctx'> 	input-&gt;id.product	= 0x0001;</div><div class='ctx'> 	input-&gt;id.version	= 0x0003;</div><div class='ctx'> </div><div class='del'>-	input-&gt;keycode		= kp-&gt;keymap;</div><div class='del'>-	input-&gt;keycodesize	= sizeof(kp-&gt;keymap[0]);</div><div class='del'>-	input-&gt;keycodemax	= ARRAY_SIZE(kp-&gt;keymap);</div><div class='add'>+	error = matrix_keypad_build_keymap(keymap_data, NULL,</div><div class='add'>+					   TWL4030_MAX_ROWS,</div><div class='add'>+					   1 &lt;&lt; TWL4030_ROW_SHIFT,</div><div class='add'>+					   kp-&gt;keymap, input);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(kp-&gt;dbg_dev, "Failed to build keymap\n");</div><div class='add'>+		goto err1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	matrix_keypad_build_keymap(keymap_data, TWL4030_ROW_SHIFT,</div><div class='del'>-				   input-&gt;keycode, input-&gt;keybit);</div><div class='add'>+	input_set_capability(input, EV_MSC, MSC_SCAN);</div><div class='add'>+	/* Enable auto repeat feature of Linux input subsystem */</div><div class='add'>+	if (pdata-&gt;rep)</div><div class='add'>+		__set_bit(EV_REP, input-&gt;evbit);</div><div class='ctx'> </div><div class='ctx'> 	error = input_register_device(input);</div><div class='ctx'> 	if (error) {</div><div class='head'>diff --git a/drivers/input/keyboard/w90p910_keypad.c b/drivers/input/keyboard/w90p910_keypad.c<br/>index 99bbb7e775ae..085ede4d972d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/w90p910_keypad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/w90p910_keypad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/w90p910_keypad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/w90p910_keypad.c</a></div><div class='hunk'>@@ -42,7 +42,8 @@</div><div class='ctx'> #define KGET_RAW(n)		(((n) &amp; KEY0R) &gt;&gt; 3)</div><div class='ctx'> #define KGET_COLUMN(n)		((n) &amp; KEY0C)</div><div class='ctx'> </div><div class='del'>-#define W90P910_MAX_KEY_NUM	(8 * 8)</div><div class='add'>+#define W90P910_NUM_ROWS	8</div><div class='add'>+#define W90P910_NUM_COLS	8</div><div class='ctx'> #define W90P910_ROW_SHIFT	3</div><div class='ctx'> </div><div class='ctx'> struct w90p910_keypad {</div><div class='hunk'>@@ -51,7 +52,7 @@ struct w90p910_keypad {</div><div class='ctx'> 	struct input_dev *input_dev;</div><div class='ctx'> 	void __iomem *mmio_base;</div><div class='ctx'> 	int irq;</div><div class='del'>-	unsigned short keymap[W90P910_MAX_KEY_NUM];</div><div class='add'>+	unsigned short keymap[W90P910_NUM_ROWS * W90P910_NUM_COLS];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void w90p910_keypad_scan_matrix(struct w90p910_keypad *keypad,</div><div class='hunk'>@@ -190,17 +191,13 @@ static int __devinit w90p910_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 	input_dev-&gt;close = w90p910_keypad_close;</div><div class='ctx'> 	input_dev-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	input_dev-&gt;keycode = keypad-&gt;keymap;</div><div class='del'>-	input_dev-&gt;keycodesize = sizeof(keypad-&gt;keymap[0]);</div><div class='del'>-	input_dev-&gt;keycodemax = ARRAY_SIZE(keypad-&gt;keymap);</div><div class='del'>-</div><div class='del'>-	input_set_drvdata(input_dev, keypad);</div><div class='del'>-</div><div class='del'>-	input_dev-&gt;evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);</div><div class='del'>-	input_set_capability(input_dev, EV_MSC, MSC_SCAN);</div><div class='del'>-</div><div class='del'>-	matrix_keypad_build_keymap(keymap_data, W90P910_ROW_SHIFT,</div><div class='del'>-				   input_dev-&gt;keycode, input_dev-&gt;keybit);</div><div class='add'>+	error = matrix_keypad_build_keymap(keymap_data, NULL,</div><div class='add'>+					   W90P910_NUM_ROWS, W90P910_NUM_COLS,</div><div class='add'>+					   keypad-&gt;keymap, input_dev);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to build keymap\n");</div><div class='add'>+		goto failed_put_clk;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	error = request_irq(keypad-&gt;irq, w90p910_keypad_irq_handler,</div><div class='ctx'> 			    0, pdev-&gt;name, keypad);</div><div class='hunk'>@@ -209,6 +206,10 @@ static int __devinit w90p910_keypad_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto failed_put_clk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	__set_bit(EV_REP, input_dev-&gt;evbit);</div><div class='add'>+	input_set_capability(input_dev, EV_MSC, MSC_SCAN);</div><div class='add'>+	input_set_drvdata(input_dev, keypad);</div><div class='add'>+</div><div class='ctx'> 	/* Register the input device */</div><div class='ctx'> 	error = input_register_device(input_dev);</div><div class='ctx'> 	if (error) {</div><div class='head'>diff --git a/drivers/input/keyboard/xtkbd.c b/drivers/input/keyboard/xtkbd.c<br/>index 37b01d777a4a..d050d9d0011b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/keyboard/xtkbd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/keyboard/xtkbd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/keyboard/xtkbd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/keyboard/xtkbd.c</a></div><div class='hunk'>@@ -169,15 +169,4 @@ static struct serio_driver xtkbd_drv = {</div><div class='ctx'> 	.disconnect	= xtkbd_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init xtkbd_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;xtkbd_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit xtkbd_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;xtkbd_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(xtkbd_init);</div><div class='del'>-module_exit(xtkbd_exit);</div><div class='add'>+module_serio_driver(xtkbd_drv);</div><div class='head'>diff --git a/drivers/input/matrix-keymap.c b/drivers/input/matrix-keymap.c<br/>new file mode 100644<br/>index 000000000000..443ad64b7f2a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/input/matrix-keymap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/matrix-keymap.c</a></div><div class='hunk'>@@ -0,0 +1,163 @@</div><div class='add'>+/*</div><div class='add'>+ * Helpers for matrix keyboard bindings</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Google, Inc</div><div class='add'>+ *</div><div class='add'>+ * Author:</div><div class='add'>+ *	Olof Johansson &lt;olof@lixom.net&gt;</div><div class='add'>+ *</div><div class='add'>+ * This software is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2, as published by the Free Software Foundation, and</div><div class='add'>+ * may be copied, distributed, and modified under those terms.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/input/matrix_keypad.h&gt;</div><div class='add'>+</div><div class='add'>+static bool matrix_keypad_map_key(struct input_dev *input_dev,</div><div class='add'>+				  unsigned int rows, unsigned int cols,</div><div class='add'>+				  unsigned int row_shift, unsigned int key)</div><div class='add'>+{</div><div class='add'>+	unsigned short *keymap = input_dev-&gt;keycode;</div><div class='add'>+	unsigned int row = KEY_ROW(key);</div><div class='add'>+	unsigned int col = KEY_COL(key);</div><div class='add'>+	unsigned short code = KEY_VAL(key);</div><div class='add'>+</div><div class='add'>+	if (row &gt;= rows || col &gt;= cols) {</div><div class='add'>+		dev_err(input_dev-&gt;dev.parent,</div><div class='add'>+			"%s: invalid keymap entry 0x%x (row: %d, col: %d, rows: %d, cols: %d)\n",</div><div class='add'>+			__func__, key, row, col, rows, cols);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	keymap[MATRIX_SCAN_CODE(row, col, row_shift)] = code;</div><div class='add'>+	__set_bit(code, input_dev-&gt;keybit);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static int matrix_keypad_parse_of_keymap(const char *propname,</div><div class='add'>+					 unsigned int rows, unsigned int cols,</div><div class='add'>+					 struct input_dev *input_dev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = input_dev-&gt;dev.parent;</div><div class='add'>+	struct device_node *np = dev-&gt;of_node;</div><div class='add'>+	unsigned int row_shift = get_count_order(cols);</div><div class='add'>+	unsigned int max_keys = rows &lt;&lt; row_shift;</div><div class='add'>+	unsigned int proplen, i, size;</div><div class='add'>+	const __be32 *prop;</div><div class='add'>+</div><div class='add'>+	if (!np)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (!propname)</div><div class='add'>+		propname = "linux,keymap";</div><div class='add'>+</div><div class='add'>+	prop = of_get_property(np, propname, &amp;proplen);</div><div class='add'>+	if (!prop) {</div><div class='add'>+		dev_err(dev, "OF: %s property not defined in %s\n",</div><div class='add'>+			propname, np-&gt;full_name);</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (proplen % sizeof(u32)) {</div><div class='add'>+		dev_err(dev, "OF: Malformed keycode property %s in %s\n",</div><div class='add'>+			propname, np-&gt;full_name);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = proplen / sizeof(u32);</div><div class='add'>+	if (size &gt; max_keys) {</div><div class='add'>+		dev_err(dev, "OF: %s size overflow\n", propname);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; size; i++) {</div><div class='add'>+		unsigned int key = be32_to_cpup(prop + i);</div><div class='add'>+</div><div class='add'>+		if (!matrix_keypad_map_key(input_dev, rows, cols,</div><div class='add'>+					   row_shift, key))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static int matrix_keypad_parse_of_keymap(const char *propname,</div><div class='add'>+					 unsigned int rows, unsigned int cols,</div><div class='add'>+					 struct input_dev *input_dev)</div><div class='add'>+{</div><div class='add'>+	return -ENOSYS;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * matrix_keypad_build_keymap - convert platform keymap into matrix keymap</div><div class='add'>+ * @keymap_data: keymap supplied by the platform code</div><div class='add'>+ * @keymap_name: name of device tree property containing keymap (if device</div><div class='add'>+ *	tree support is enabled).</div><div class='add'>+ * @rows: number of rows in target keymap array</div><div class='add'>+ * @cols: number of cols in target keymap array</div><div class='add'>+ * @keymap: expanded version of keymap that is suitable for use by</div><div class='add'>+ * matrix keyboard driver</div><div class='add'>+ * @input_dev: input devices for which we are setting up the keymap</div><div class='add'>+ *</div><div class='add'>+ * This function converts platform keymap (encoded with KEY() macro) into</div><div class='add'>+ * an array of keycodes that is suitable for using in a standard matrix</div><div class='add'>+ * keyboard driver that uses row and col as indices.</div><div class='add'>+ *</div><div class='add'>+ * If @keymap_data is not supplied and device tree support is enabled</div><div class='add'>+ * it will attempt load the keymap from property specified by @keymap_name</div><div class='add'>+ * argument (or "linux,keymap" if @keymap_name is %NULL).</div><div class='add'>+ *</div><div class='add'>+ * Callers are expected to set up input_dev-&gt;dev.parent before calling this</div><div class='add'>+ * function.</div><div class='add'>+ */</div><div class='add'>+int matrix_keypad_build_keymap(const struct matrix_keymap_data *keymap_data,</div><div class='add'>+			       const char *keymap_name,</div><div class='add'>+			       unsigned int rows, unsigned int cols,</div><div class='add'>+			       unsigned short *keymap,</div><div class='add'>+			       struct input_dev *input_dev)</div><div class='add'>+{</div><div class='add'>+	unsigned int row_shift = get_count_order(cols);</div><div class='add'>+	int i;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	input_dev-&gt;keycode = keymap;</div><div class='add'>+	input_dev-&gt;keycodesize = sizeof(*keymap);</div><div class='add'>+	input_dev-&gt;keycodemax = rows &lt;&lt; row_shift;</div><div class='add'>+</div><div class='add'>+	__set_bit(EV_KEY, input_dev-&gt;evbit);</div><div class='add'>+</div><div class='add'>+	if (keymap_data) {</div><div class='add'>+		for (i = 0; i &lt; keymap_data-&gt;keymap_size; i++) {</div><div class='add'>+			unsigned int key = keymap_data-&gt;keymap[i];</div><div class='add'>+</div><div class='add'>+			if (!matrix_keypad_map_key(input_dev, rows, cols,</div><div class='add'>+						   row_shift, key))</div><div class='add'>+				return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		error = matrix_keypad_parse_of_keymap(keymap_name, rows, cols,</div><div class='add'>+						      input_dev);</div><div class='add'>+		if (error)</div><div class='add'>+			return error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__clear_bit(KEY_RESERVED, input_dev-&gt;keybit);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(matrix_keypad_build_keymap);</div><div class='head'>diff --git a/drivers/input/misc/cm109.c b/drivers/input/misc/cm109.c<br/>index ab860511f016..082684e7f390 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/misc/cm109.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/misc/cm109.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/misc/cm109.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/cm109.c</a></div><div class='hunk'>@@ -327,7 +327,9 @@ static void cm109_submit_buzz_toggle(struct cm109_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	error = usb_submit_urb(dev-&gt;urb_ctl, GFP_ATOMIC);</div><div class='ctx'> 	if (error)</div><div class='del'>-		err("%s: usb_submit_urb (urb_ctl) failed %d", __func__, error);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"%s: usb_submit_urb (urb_ctl) failed %d\n",</div><div class='add'>+			__func__, error);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -339,7 +341,7 @@ static void cm109_urb_irq_callback(struct urb *urb)</div><div class='ctx'> 	const int status = urb-&gt;status;</div><div class='ctx'> 	int error;</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;urb-&gt;dev-&gt;dev, "### URB IRQ: [0x%02x 0x%02x 0x%02x 0x%02x] keybit=0x%02x\n",</div><div class='add'>+	dev_dbg(&amp;dev-&gt;intf-&gt;dev, "### URB IRQ: [0x%02x 0x%02x 0x%02x 0x%02x] keybit=0x%02x\n",</div><div class='ctx'> 	     dev-&gt;irq_data-&gt;byte[0],</div><div class='ctx'> 	     dev-&gt;irq_data-&gt;byte[1],</div><div class='ctx'> 	     dev-&gt;irq_data-&gt;byte[2],</div><div class='hunk'>@@ -349,7 +351,7 @@ static void cm109_urb_irq_callback(struct urb *urb)</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		if (status == -ESHUTDOWN)</div><div class='ctx'> 			return;</div><div class='del'>-		err("%s: urb status %d", __func__, status);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "%s: urb status %d\n", __func__, status);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Special keys */</div><div class='hunk'>@@ -396,7 +398,8 @@ static void cm109_urb_irq_callback(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 		error = usb_submit_urb(dev-&gt;urb_ctl, GFP_ATOMIC);</div><div class='ctx'> 		if (error)</div><div class='del'>-			err("%s: usb_submit_urb (urb_ctl) failed %d",</div><div class='add'>+			dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+				"%s: usb_submit_urb (urb_ctl) failed %d\n",</div><div class='ctx'> 				__func__, error);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -409,14 +412,14 @@ static void cm109_urb_ctl_callback(struct urb *urb)</div><div class='ctx'> 	const int status = urb-&gt;status;</div><div class='ctx'> 	int error;</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;urb-&gt;dev-&gt;dev, "### URB CTL: [0x%02x 0x%02x 0x%02x 0x%02x]\n",</div><div class='add'>+	dev_dbg(&amp;dev-&gt;intf-&gt;dev, "### URB CTL: [0x%02x 0x%02x 0x%02x 0x%02x]\n",</div><div class='ctx'> 	     dev-&gt;ctl_data-&gt;byte[0],</div><div class='ctx'> 	     dev-&gt;ctl_data-&gt;byte[1],</div><div class='ctx'> 	     dev-&gt;ctl_data-&gt;byte[2],</div><div class='ctx'> 	     dev-&gt;ctl_data-&gt;byte[3]);</div><div class='ctx'> </div><div class='ctx'> 	if (status)</div><div class='del'>-		err("%s: urb status %d", __func__, status);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "%s: urb status %d\n", __func__, status);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;dev-&gt;ctl_submit_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -433,7 +436,8 @@ static void cm109_urb_ctl_callback(struct urb *urb)</div><div class='ctx'> 			dev-&gt;irq_urb_pending = 1;</div><div class='ctx'> 			error = usb_submit_urb(dev-&gt;urb_irq, GFP_ATOMIC);</div><div class='ctx'> 			if (error)</div><div class='del'>-				err("%s: usb_submit_urb (urb_irq) failed %d",</div><div class='add'>+				dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+					"%s: usb_submit_urb (urb_irq) failed %d\n",</div><div class='ctx'> 					__func__, error);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -476,7 +480,8 @@ static void cm109_toggle_buzzer_sync(struct cm109_dev *dev, int on)</div><div class='ctx'> 				dev-&gt;ctl_data,</div><div class='ctx'> 				USB_PKT_LEN, USB_CTRL_SET_TIMEOUT);</div><div class='ctx'> 	if (error &lt; 0 &amp;&amp; error != -EINTR)</div><div class='del'>-		err("%s: usb_control_msg() failed %d", __func__, error);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "%s: usb_control_msg() failed %d\n",</div><div class='add'>+			__func__, error);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cm109_stop_traffic(struct cm109_dev *dev)</div><div class='hunk'>@@ -518,8 +523,8 @@ static int cm109_input_open(struct input_dev *idev)</div><div class='ctx'> </div><div class='ctx'> 	error = usb_autopm_get_interface(dev-&gt;intf);</div><div class='ctx'> 	if (error &lt; 0) {</div><div class='del'>-		err("%s - cannot autoresume, result %d",</div><div class='del'>-		    __func__, error);</div><div class='add'>+		dev_err(&amp;idev-&gt;dev, "%s - cannot autoresume, result %d\n",</div><div class='add'>+			__func__, error);</div><div class='ctx'> 		return error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -537,7 +542,8 @@ static int cm109_input_open(struct input_dev *idev)</div><div class='ctx'> </div><div class='ctx'> 	error = usb_submit_urb(dev-&gt;urb_ctl, GFP_KERNEL);</div><div class='ctx'> 	if (error)</div><div class='del'>-		err("%s: usb_submit_urb (urb_ctl) failed %d", __func__, error);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "%s: usb_submit_urb (urb_ctl) failed %d\n",</div><div class='add'>+			__func__, error);</div><div class='ctx'> 	else</div><div class='ctx'> 		dev-&gt;open = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -573,7 +579,7 @@ static int cm109_input_ev(struct input_dev *idev, unsigned int type,</div><div class='ctx'> {</div><div class='ctx'> 	struct cm109_dev *dev = input_get_drvdata(idev);</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;dev-&gt;udev-&gt;dev,</div><div class='add'>+	dev_dbg(&amp;dev-&gt;intf-&gt;dev,</div><div class='ctx'> 		"input_ev: type=%u code=%u value=%d\n", type, code, value);</div><div class='ctx'> </div><div class='ctx'> 	if (type != EV_SND)</div><div class='hunk'>@@ -710,7 +716,8 @@ static int cm109_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 	pipe = usb_rcvintpipe(udev, endpoint-&gt;bEndpointAddress);</div><div class='ctx'> 	ret = usb_maxpacket(udev, pipe, usb_pipeout(pipe));</div><div class='ctx'> 	if (ret != USB_PKT_LEN)</div><div class='del'>-		err("invalid payload size %d, expected %d", ret, USB_PKT_LEN);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "invalid payload size %d, expected %d\n",</div><div class='add'>+			ret, USB_PKT_LEN);</div><div class='ctx'> </div><div class='ctx'> 	/* initialise irq urb */</div><div class='ctx'> 	usb_fill_int_urb(dev-&gt;urb_irq, udev, pipe, dev-&gt;irq_data,</div><div class='head'>diff --git a/drivers/input/misc/cma3000_d0x.c b/drivers/input/misc/cma3000_d0x.c<br/>index 06517e60e50c..a3735a01e9fd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/misc/cma3000_d0x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/misc/cma3000_d0x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/misc/cma3000_d0x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/cma3000_d0x.c</a></div><div class='hunk'>@@ -318,7 +318,7 @@ struct cma3000_accl_data *cma3000_init(struct device *dev, int irq,</div><div class='ctx'> 	mutex_init(&amp;data-&gt;mutex);</div><div class='ctx'> </div><div class='ctx'> 	data-&gt;mode = pdata-&gt;mode;</div><div class='del'>-	if (data-&gt;mode &lt; CMAMODE_DEFAULT || data-&gt;mode &gt; CMAMODE_POFF) {</div><div class='add'>+	if (data-&gt;mode &gt; CMAMODE_POFF) {</div><div class='ctx'> 		data-&gt;mode = CMAMODE_MOTDET;</div><div class='ctx'> 		dev_warn(dev,</div><div class='ctx'> 			 "Invalid mode specified, assuming Motion Detect\n");</div><div class='head'>diff --git a/drivers/input/misc/keyspan_remote.c b/drivers/input/misc/keyspan_remote.c<br/>index d99151a8bf10..290fa5f97ded 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/misc/keyspan_remote.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/misc/keyspan_remote.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/misc/keyspan_remote.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/keyspan_remote.c</a></div><div class='hunk'>@@ -157,7 +157,7 @@ static int keyspan_load_tester(struct usb_keyspan* dev, int bits_needed)</div><div class='ctx'> 	 * though so it's not too big a deal</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (dev-&gt;data.pos &gt;= dev-&gt;data.len) {</div><div class='del'>-		dev_dbg(&amp;dev-&gt;udev-&gt;dev,</div><div class='add'>+		dev_dbg(&amp;dev-&gt;interface-&gt;dev,</div><div class='ctx'> 			"%s - Error ran out of data. pos: %d, len: %d\n",</div><div class='ctx'> 			__func__, dev-&gt;data.pos, dev-&gt;data.len);</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -267,7 +267,9 @@ static void keyspan_check_data(struct usb_keyspan *remote)</div><div class='ctx'> 				remote-&gt;data.tester = remote-&gt;data.tester &gt;&gt; 6;</div><div class='ctx'> 				remote-&gt;data.bits_left -= 6;</div><div class='ctx'> 			} else {</div><div class='del'>-				err("%s - Unknown sequence found in system data.\n", __func__);</div><div class='add'>+				dev_err(&amp;remote-&gt;interface-&gt;dev,</div><div class='add'>+					"%s - Unknown sequence found in system data.\n",</div><div class='add'>+					__func__);</div><div class='ctx'> 				remote-&gt;stage = 0;</div><div class='ctx'> 				return;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -286,7 +288,9 @@ static void keyspan_check_data(struct usb_keyspan *remote)</div><div class='ctx'> 				remote-&gt;data.tester = remote-&gt;data.tester &gt;&gt; 6;</div><div class='ctx'> 				remote-&gt;data.bits_left -= 6;</div><div class='ctx'> 			} else {</div><div class='del'>-				err("%s - Unknown sequence found in button data.\n", __func__);</div><div class='add'>+				dev_err(&amp;remote-&gt;interface-&gt;dev,</div><div class='add'>+					"%s - Unknown sequence found in button data.\n",</div><div class='add'>+					__func__);</div><div class='ctx'> 				remote-&gt;stage = 0;</div><div class='ctx'> 				return;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -302,7 +306,9 @@ static void keyspan_check_data(struct usb_keyspan *remote)</div><div class='ctx'> 			remote-&gt;data.tester = remote-&gt;data.tester &gt;&gt; 6;</div><div class='ctx'> 			remote-&gt;data.bits_left -= 6;</div><div class='ctx'> 		} else {</div><div class='del'>-			err("%s - Error in message, invalid toggle.\n", __func__);</div><div class='add'>+			dev_err(&amp;remote-&gt;interface-&gt;dev,</div><div class='add'>+				"%s - Error in message, invalid toggle.\n",</div><div class='add'>+				__func__);</div><div class='ctx'> 			remote-&gt;stage = 0;</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -312,10 +318,11 @@ static void keyspan_check_data(struct usb_keyspan *remote)</div><div class='ctx'> 			remote-&gt;data.tester = remote-&gt;data.tester &gt;&gt; 5;</div><div class='ctx'> 			remote-&gt;data.bits_left -= 5;</div><div class='ctx'> 		} else {</div><div class='del'>-			err("Bad message received, no stop bit found.\n");</div><div class='add'>+			dev_err(&amp;remote-&gt;interface-&gt;dev,</div><div class='add'>+				"Bad message received, no stop bit found.\n");</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		dev_dbg(&amp;remote-&gt;udev-&gt;dev,</div><div class='add'>+		dev_dbg(&amp;remote-&gt;interface-&gt;dev,</div><div class='ctx'> 			"%s found valid message: system: %d, button: %d, toggle: %d\n",</div><div class='ctx'> 			__func__, message.system, message.button, message.toggle);</div><div class='ctx'> </div><div class='hunk'>@@ -397,7 +404,9 @@ static void keyspan_irq_recv(struct urb *urb)</div><div class='ctx'> resubmit:</div><div class='ctx'> 	retval = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		err ("%s - usb_submit_urb failed with result: %d", __func__, retval);</div><div class='add'>+		dev_err(&amp;dev-&gt;interface-&gt;dev,</div><div class='add'>+			"%s - usb_submit_urb failed with result: %d\n",</div><div class='add'>+			__func__, retval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int keyspan_open(struct input_dev *dev)</div><div class='head'>diff --git a/drivers/input/misc/mpu3050.c b/drivers/input/misc/mpu3050.c<br/>index 5403c571b6a5..306f84c2d8fb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/misc/mpu3050.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/misc/mpu3050.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/misc/mpu3050.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/mpu3050.c</a></div><div class='hunk'>@@ -367,7 +367,7 @@ static int __devinit mpu3050_probe(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> 	error = request_threaded_irq(client-&gt;irq,</div><div class='ctx'> 				     NULL, mpu3050_interrupt_thread,</div><div class='del'>-				     IRQF_TRIGGER_RISING,</div><div class='add'>+				     IRQF_TRIGGER_RISING | IRQF_ONESHOT,</div><div class='ctx'> 				     "mpu3050", sensor);</div><div class='ctx'> 	if (error) {</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev,</div><div class='head'>diff --git a/drivers/input/misc/powermate.c b/drivers/input/misc/powermate.c<br/>index 538f7049ec64..49c0c3ebd321 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/misc/powermate.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/misc/powermate.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/misc/powermate.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/powermate.c</a></div><div class='hunk'>@@ -65,6 +65,7 @@ struct powermate_device {</div><div class='ctx'> 	struct urb *irq, *config;</div><div class='ctx'> 	struct usb_ctrlrequest *configcr;</div><div class='ctx'> 	struct usb_device *udev;</div><div class='add'>+	struct usb_interface *intf;</div><div class='ctx'> 	struct input_dev *input;</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> 	int static_brightness;</div><div class='hunk'>@@ -85,6 +86,7 @@ static void powermate_config_complete(struct urb *urb);</div><div class='ctx'> static void powermate_irq(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct powermate_device *pm = urb-&gt;context;</div><div class='add'>+	struct device *dev = &amp;pm-&gt;intf-&gt;dev;</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='hunk'>@@ -95,10 +97,12 @@ static void powermate_irq(struct urb *urb)</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		/* this urb is terminated, clean up */</div><div class='del'>-		dbg("%s - urb shutting down with status: %d", __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(dev, "%s - urb shutting down with status: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='del'>-		dbg("%s - nonzero urb status received: %d", __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(dev, "%s - nonzero urb status received: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -110,8 +114,8 @@ static void powermate_irq(struct urb *urb)</div><div class='ctx'> exit:</div><div class='ctx'> 	retval = usb_submit_urb (urb, GFP_ATOMIC);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		err ("%s - usb_submit_urb failed with result %d",</div><div class='del'>-		     __func__, retval);</div><div class='add'>+		dev_err(dev, "%s - usb_submit_urb failed with result: %d\n",</div><div class='add'>+			__func__, retval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Decide if we need to issue a control message and do so. Must be called with pm-&gt;lock taken */</div><div class='hunk'>@@ -330,6 +334,7 @@ static int powermate_probe(struct usb_interface *intf, const struct usb_device_i</div><div class='ctx'> 		goto fail3;</div><div class='ctx'> </div><div class='ctx'> 	pm-&gt;udev = udev;</div><div class='add'>+	pm-&gt;intf = intf;</div><div class='ctx'> 	pm-&gt;input = input_dev;</div><div class='ctx'> </div><div class='ctx'> 	usb_make_path(udev, pm-&gt;phys, sizeof(pm-&gt;phys));</div><div class='head'>diff --git a/drivers/input/misc/twl6040-vibra.c b/drivers/input/misc/twl6040-vibra.c<br/>index 14e94f56cb7d..c34f6c0371c4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/misc/twl6040-vibra.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/misc/twl6040-vibra.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/misc/twl6040-vibra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/twl6040-vibra.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/twl6040.h&gt;</div><div class='hunk'>@@ -258,10 +259,13 @@ static SIMPLE_DEV_PM_OPS(twl6040_vibra_pm_ops, twl6040_vibra_suspend, NULL);</div><div class='ctx'> static int __devinit twl6040_vibra_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct twl6040_vibra_data *pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct device_node *node = pdev-&gt;dev.of_node;</div><div class='ctx'> 	struct vibra_info *info;</div><div class='add'>+	int vddvibl_uV = 0;</div><div class='add'>+	int vddvibr_uV = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!pdata) {</div><div class='add'>+	if (!pdata &amp;&amp; !node) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "platform_data not available\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -273,11 +277,26 @@ static int __devinit twl6040_vibra_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='ctx'> 	info-&gt;twl6040 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='del'>-	info-&gt;vibldrv_res = pdata-&gt;vibldrv_res;</div><div class='del'>-	info-&gt;vibrdrv_res = pdata-&gt;vibrdrv_res;</div><div class='del'>-	info-&gt;viblmotor_res = pdata-&gt;viblmotor_res;</div><div class='del'>-	info-&gt;vibrmotor_res = pdata-&gt;vibrmotor_res;</div><div class='add'>+	if (pdata) {</div><div class='add'>+		info-&gt;vibldrv_res = pdata-&gt;vibldrv_res;</div><div class='add'>+		info-&gt;vibrdrv_res = pdata-&gt;vibrdrv_res;</div><div class='add'>+		info-&gt;viblmotor_res = pdata-&gt;viblmotor_res;</div><div class='add'>+		info-&gt;vibrmotor_res = pdata-&gt;vibrmotor_res;</div><div class='add'>+		vddvibl_uV = pdata-&gt;vddvibl_uV;</div><div class='add'>+		vddvibr_uV = pdata-&gt;vddvibr_uV;</div><div class='add'>+	} else {</div><div class='add'>+		of_property_read_u32(node, "vibldrv_res", &amp;info-&gt;vibldrv_res);</div><div class='add'>+		of_property_read_u32(node, "vibrdrv_res", &amp;info-&gt;vibrdrv_res);</div><div class='add'>+		of_property_read_u32(node, "viblmotor_res",</div><div class='add'>+				     &amp;info-&gt;viblmotor_res);</div><div class='add'>+		of_property_read_u32(node, "vibrmotor_res",</div><div class='add'>+				     &amp;info-&gt;vibrmotor_res);</div><div class='add'>+		of_property_read_u32(node, "vddvibl_uV", &amp;vddvibl_uV);</div><div class='add'>+		of_property_read_u32(node, "vddvibr_uV", &amp;vddvibr_uV);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if ((!info-&gt;vibldrv_res &amp;&amp; !info-&gt;viblmotor_res) ||</div><div class='ctx'> 	    (!info-&gt;vibrdrv_res &amp;&amp; !info-&gt;vibrmotor_res)) {</div><div class='ctx'> 		dev_err(info-&gt;dev, "invalid vibra driver/motor resistance\n");</div><div class='hunk'>@@ -339,10 +358,9 @@ static int __devinit twl6040_vibra_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_regulator;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;vddvibl_uV) {</div><div class='add'>+	if (vddvibl_uV) {</div><div class='ctx'> 		ret = regulator_set_voltage(info-&gt;supplies[0].consumer,</div><div class='del'>-					    pdata-&gt;vddvibl_uV,</div><div class='del'>-					    pdata-&gt;vddvibl_uV);</div><div class='add'>+					    vddvibl_uV, vddvibl_uV);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(info-&gt;dev, "failed to set VDDVIBL volt %d\n",</div><div class='ctx'> 				ret);</div><div class='hunk'>@@ -350,10 +368,9 @@ static int __devinit twl6040_vibra_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;vddvibr_uV) {</div><div class='add'>+	if (vddvibr_uV) {</div><div class='ctx'> 		ret = regulator_set_voltage(info-&gt;supplies[1].consumer,</div><div class='del'>-					    pdata-&gt;vddvibr_uV,</div><div class='del'>-					    pdata-&gt;vddvibr_uV);</div><div class='add'>+					    vddvibr_uV, vddvibr_uV);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(info-&gt;dev, "failed to set VDDVIBR volt %d\n",</div><div class='ctx'> 				ret);</div><div class='hunk'>@@ -401,6 +418,12 @@ static int __devexit twl6040_vibra_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct of_device_id twl6040_vibra_of_match[] = {</div><div class='add'>+	{.compatible = "ti,twl6040-vibra", },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, twl6040_vibra_of_match);</div><div class='add'>+</div><div class='ctx'> static struct platform_driver twl6040_vibra_driver = {</div><div class='ctx'> 	.probe		= twl6040_vibra_probe,</div><div class='ctx'> 	.remove		= __devexit_p(twl6040_vibra_remove),</div><div class='hunk'>@@ -408,6 +431,7 @@ static struct platform_driver twl6040_vibra_driver = {</div><div class='ctx'> 		.name	= "twl6040-vibra",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 		.pm	= &amp;twl6040_vibra_pm_ops,</div><div class='add'>+		.of_match_table = twl6040_vibra_of_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> module_platform_driver(twl6040_vibra_driver);</div><div class='head'>diff --git a/drivers/input/misc/wm831x-on.c b/drivers/input/misc/wm831x-on.c<br/>index 47f18d6bce46..6790a812a1db 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/misc/wm831x-on.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/misc/wm831x-on.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/misc/wm831x-on.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/wm831x-on.c</a></div><div class='hunk'>@@ -73,7 +73,7 @@ static int __devinit wm831x_on_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x *wm831x = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct wm831x_on *wm831x_on;</div><div class='del'>-	int irq = platform_get_irq(pdev, 0);</div><div class='add'>+	int irq = wm831x_irq(wm831x, platform_get_irq(pdev, 0));</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	wm831x_on = kzalloc(sizeof(struct wm831x_on), GFP_KERNEL);</div><div class='head'>diff --git a/drivers/input/misc/yealink.c b/drivers/input/misc/yealink.c<br/>index f4776e7f8c15..285a5bd6cbc9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/misc/yealink.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/misc/yealink.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/misc/yealink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/misc/yealink.c</a></div><div class='hunk'>@@ -101,6 +101,7 @@ static const struct lcd_segment_map {</div><div class='ctx'> struct yealink_dev {</div><div class='ctx'> 	struct input_dev *idev;		/* input device */</div><div class='ctx'> 	struct usb_device *udev;	/* usb device */</div><div class='add'>+	struct usb_interface *intf;	/* usb interface */</div><div class='ctx'> </div><div class='ctx'> 	/* irq input channel */</div><div class='ctx'> 	struct yld_ctl_packet	*irq_data;</div><div class='hunk'>@@ -428,7 +429,8 @@ static void urb_irq_callback(struct urb *urb)</div><div class='ctx'> 	int ret, status = urb-&gt;status;</div><div class='ctx'> </div><div class='ctx'> 	if (status)</div><div class='del'>-		err("%s - urb status %d", __func__, status);</div><div class='add'>+		dev_err(&amp;yld-&gt;intf-&gt;dev, "%s - urb status %d\n",</div><div class='add'>+			__func__, status);</div><div class='ctx'> </div><div class='ctx'> 	switch (yld-&gt;irq_data-&gt;cmd) {</div><div class='ctx'> 	case CMD_KEYPRESS:</div><div class='hunk'>@@ -437,13 +439,15 @@ static void urb_irq_callback(struct urb *urb)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case CMD_SCANCODE:</div><div class='del'>-		dbg("get scancode %x", yld-&gt;irq_data-&gt;data[0]);</div><div class='add'>+		dev_dbg(&amp;yld-&gt;intf-&gt;dev, "get scancode %x\n",</div><div class='add'>+			yld-&gt;irq_data-&gt;data[0]);</div><div class='ctx'> </div><div class='ctx'> 		report_key(yld, map_p1k_to_key(yld-&gt;irq_data-&gt;data[0]));</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		err("unexpected response %x", yld-&gt;irq_data-&gt;cmd);</div><div class='add'>+		dev_err(&amp;yld-&gt;intf-&gt;dev, "unexpected response %x\n",</div><div class='add'>+			yld-&gt;irq_data-&gt;cmd);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	yealink_do_idle_tasks(yld);</div><div class='hunk'>@@ -451,7 +455,9 @@ static void urb_irq_callback(struct urb *urb)</div><div class='ctx'> 	if (!yld-&gt;shutdown) {</div><div class='ctx'> 		ret = usb_submit_urb(yld-&gt;urb_ctl, GFP_ATOMIC);</div><div class='ctx'> 		if (ret &amp;&amp; ret != -EPERM)</div><div class='del'>-			err("%s - usb_submit_urb failed %d", __func__, ret);</div><div class='add'>+			dev_err(&amp;yld-&gt;intf-&gt;dev,</div><div class='add'>+				"%s - usb_submit_urb failed %d\n",</div><div class='add'>+				__func__, ret);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -461,7 +467,8 @@ static void urb_ctl_callback(struct urb *urb)</div><div class='ctx'> 	int ret = 0, status = urb-&gt;status;</div><div class='ctx'> </div><div class='ctx'> 	if (status)</div><div class='del'>-		err("%s - urb status %d", __func__, status);</div><div class='add'>+		dev_err(&amp;yld-&gt;intf-&gt;dev, "%s - urb status %d\n",</div><div class='add'>+			__func__, status);</div><div class='ctx'> </div><div class='ctx'> 	switch (yld-&gt;ctl_data-&gt;cmd) {</div><div class='ctx'> 	case CMD_KEYPRESS:</div><div class='hunk'>@@ -479,7 +486,8 @@ static void urb_ctl_callback(struct urb *urb)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ret &amp;&amp; ret != -EPERM)</div><div class='del'>-		err("%s - usb_submit_urb failed %d", __func__, ret);</div><div class='add'>+		dev_err(&amp;yld-&gt;intf-&gt;dev, "%s - usb_submit_urb failed %d\n",</div><div class='add'>+			__func__, ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*******************************************************************************</div><div class='hunk'>@@ -511,7 +519,7 @@ static int input_open(struct input_dev *dev)</div><div class='ctx'> 	struct yealink_dev *yld = input_get_drvdata(dev);</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='del'>-	dbg("%s", __func__);</div><div class='add'>+	dev_dbg(&amp;yld-&gt;intf-&gt;dev, "%s\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	/* force updates to device */</div><div class='ctx'> 	for (i = 0; i&lt;sizeof(yld-&gt;master); i++)</div><div class='hunk'>@@ -526,8 +534,9 @@ static int input_open(struct input_dev *dev)</div><div class='ctx'> 	yld-&gt;ctl_data-&gt;size	= 10;</div><div class='ctx'> 	yld-&gt;ctl_data-&gt;sum	= 0x100-CMD_INIT-10;</div><div class='ctx'> 	if ((ret = usb_submit_urb(yld-&gt;urb_ctl, GFP_KERNEL)) != 0) {</div><div class='del'>-		dbg("%s - usb_submit_urb failed with result %d",</div><div class='del'>-		     __func__, ret);</div><div class='add'>+		dev_dbg(&amp;yld-&gt;intf-&gt;dev,</div><div class='add'>+			"%s - usb_submit_urb failed with result %d\n",</div><div class='add'>+			__func__, ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -876,6 +885,7 @@ static int usb_probe(struct usb_interface *intf, const struct usb_device_id *id)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	yld-&gt;udev = udev;</div><div class='add'>+	yld-&gt;intf = intf;</div><div class='ctx'> </div><div class='ctx'> 	yld-&gt;idev = input_dev = input_allocate_device();</div><div class='ctx'> 	if (!input_dev)</div><div class='hunk'>@@ -909,7 +919,8 @@ static int usb_probe(struct usb_interface *intf, const struct usb_device_id *id)</div><div class='ctx'> 	pipe = usb_rcvintpipe(udev, endpoint-&gt;bEndpointAddress);</div><div class='ctx'> 	ret = usb_maxpacket(udev, pipe, usb_pipeout(pipe));</div><div class='ctx'> 	if (ret != USB_PKT_LEN)</div><div class='del'>-		err("invalid payload size %d, expected %zd", ret, USB_PKT_LEN);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "invalid payload size %d, expected %zd\n",</div><div class='add'>+			ret, USB_PKT_LEN);</div><div class='ctx'> </div><div class='ctx'> 	/* initialise irq urb */</div><div class='ctx'> 	usb_fill_int_urb(yld-&gt;urb_irq, udev, pipe, yld-&gt;irq_data,</div><div class='head'>diff --git a/drivers/input/mouse/Kconfig b/drivers/input/mouse/Kconfig<br/>index 9b8db821d5f0..cd6268cf7cd5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/mouse/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/mouse/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/mouse/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/Kconfig</a></div><div class='hunk'>@@ -339,4 +339,16 @@ config MOUSE_SYNAPTICS_USB</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='ctx'> 	  module will be called synaptics_usb.</div><div class='ctx'> </div><div class='add'>+config MOUSE_NAVPOINT_PXA27x</div><div class='add'>+	tristate "Synaptics NavPoint (PXA27x SSP/SPI)"</div><div class='add'>+	depends on PXA27x &amp;&amp; PXA_SSP</div><div class='add'>+	help</div><div class='add'>+	  This driver adds support for the Synaptics NavPoint touchpad connected</div><div class='add'>+	  to a PXA27x SSP port in SPI slave mode. The device emulates a mouse;</div><div class='add'>+	  a tap or tap-and-a-half drag gesture emulates the left mouse button.</div><div class='add'>+	  For example, use the xf86-input-evdev driver for an X pointing device.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called navpoint.</div><div class='add'>+</div><div class='ctx'> endif</div><div class='head'>diff --git a/drivers/input/mouse/Makefile b/drivers/input/mouse/Makefile<br/>index 4718effeb8d9..46ba7556fd4f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/mouse/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/mouse/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/mouse/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/Makefile</a></div><div class='hunk'>@@ -12,6 +12,7 @@ obj-$(CONFIG_MOUSE_GPIO)		+= gpio_mouse.o</div><div class='ctx'> obj-$(CONFIG_MOUSE_INPORT)		+= inport.o</div><div class='ctx'> obj-$(CONFIG_MOUSE_LOGIBM)		+= logibm.o</div><div class='ctx'> obj-$(CONFIG_MOUSE_MAPLE)		+= maplemouse.o</div><div class='add'>+obj-$(CONFIG_MOUSE_NAVPOINT_PXA27x)	+= navpoint.o</div><div class='ctx'> obj-$(CONFIG_MOUSE_PC110PAD)		+= pc110pad.o</div><div class='ctx'> obj-$(CONFIG_MOUSE_PS2)			+= psmouse.o</div><div class='ctx'> obj-$(CONFIG_MOUSE_PXA930_TRKBALL)	+= pxa930_trkball.o</div><div class='head'>diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c<br/>index 4c6a72d3d48c..4a1347e91bdc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/mouse/alps.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/mouse/alps.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/mouse/alps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/alps.c</a></div><div class='hunk'>@@ -553,10 +553,7 @@ static void alps_process_touchpad_packet_v3(struct psmouse *psmouse)</div><div class='ctx'> </div><div class='ctx'> 	alps_report_semi_mt_data(dev, fingers, x1, y1, x2, y2);</div><div class='ctx'> </div><div class='del'>-	input_report_key(dev, BTN_TOOL_FINGER, fingers == 1);</div><div class='del'>-	input_report_key(dev, BTN_TOOL_DOUBLETAP, fingers == 2);</div><div class='del'>-	input_report_key(dev, BTN_TOOL_TRIPLETAP, fingers == 3);</div><div class='del'>-	input_report_key(dev, BTN_TOOL_QUADTAP, fingers == 4);</div><div class='add'>+	input_mt_report_finger_count(dev, fingers);</div><div class='ctx'> </div><div class='ctx'> 	input_report_key(dev, BTN_LEFT, left);</div><div class='ctx'> 	input_report_key(dev, BTN_RIGHT, right);</div><div class='hunk'>@@ -604,10 +601,54 @@ static void alps_process_packet_v3(struct psmouse *psmouse)</div><div class='ctx'> </div><div class='ctx'> static void alps_process_packet_v4(struct psmouse *psmouse)</div><div class='ctx'> {</div><div class='add'>+	struct alps_data *priv = psmouse-&gt;private;</div><div class='ctx'> 	unsigned char *packet = psmouse-&gt;packet;</div><div class='ctx'> 	struct input_dev *dev = psmouse-&gt;dev;</div><div class='add'>+	int offset;</div><div class='ctx'> 	int x, y, z;</div><div class='ctx'> 	int left, right;</div><div class='add'>+	int x1, y1, x2, y2;</div><div class='add'>+	int fingers = 0;</div><div class='add'>+	unsigned int x_bitmap, y_bitmap;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * v4 has a 6-byte encoding for bitmap data, but this data is</div><div class='add'>+	 * broken up between 3 normal packets. Use priv-&gt;multi_packet to</div><div class='add'>+	 * track our position in the bitmap packet.</div><div class='add'>+	 */</div><div class='add'>+	if (packet[6] &amp; 0x40) {</div><div class='add'>+		/* sync, reset position */</div><div class='add'>+		priv-&gt;multi_packet = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(priv-&gt;multi_packet &gt; 2))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	offset = 2 * priv-&gt;multi_packet;</div><div class='add'>+	priv-&gt;multi_data[offset] = packet[6];</div><div class='add'>+	priv-&gt;multi_data[offset + 1] = packet[7];</div><div class='add'>+</div><div class='add'>+	if (++priv-&gt;multi_packet &gt; 2) {</div><div class='add'>+		priv-&gt;multi_packet = 0;</div><div class='add'>+</div><div class='add'>+		x_bitmap = ((priv-&gt;multi_data[2] &amp; 0x1f) &lt;&lt; 10) |</div><div class='add'>+			   ((priv-&gt;multi_data[3] &amp; 0x60) &lt;&lt; 3) |</div><div class='add'>+			   ((priv-&gt;multi_data[0] &amp; 0x3f) &lt;&lt; 2) |</div><div class='add'>+			   ((priv-&gt;multi_data[1] &amp; 0x60) &gt;&gt; 5);</div><div class='add'>+		y_bitmap = ((priv-&gt;multi_data[5] &amp; 0x01) &lt;&lt; 10) |</div><div class='add'>+			   ((priv-&gt;multi_data[3] &amp; 0x1f) &lt;&lt; 5) |</div><div class='add'>+			    (priv-&gt;multi_data[1] &amp; 0x1f);</div><div class='add'>+</div><div class='add'>+		fingers = alps_process_bitmap(x_bitmap, y_bitmap,</div><div class='add'>+					      &amp;x1, &amp;y1, &amp;x2, &amp;y2);</div><div class='add'>+</div><div class='add'>+		/* Store MT data.*/</div><div class='add'>+		priv-&gt;fingers = fingers;</div><div class='add'>+		priv-&gt;x1 = x1;</div><div class='add'>+		priv-&gt;x2 = x2;</div><div class='add'>+		priv-&gt;y1 = y1;</div><div class='add'>+		priv-&gt;y2 = y2;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	left = packet[4] &amp; 0x01;</div><div class='ctx'> 	right = packet[4] &amp; 0x02;</div><div class='hunk'>@@ -617,21 +658,41 @@ static void alps_process_packet_v4(struct psmouse *psmouse)</div><div class='ctx'> 	y = ((packet[2] &amp; 0x7f) &lt;&lt; 4) | (packet[3] &amp; 0x0f);</div><div class='ctx'> 	z = packet[5] &amp; 0x7f;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If there were no contacts in the bitmap, use ST</div><div class='add'>+	 * points in MT reports.</div><div class='add'>+	 * If there were two contacts or more, report MT data.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;fingers &lt; 2) {</div><div class='add'>+		x1 = x;</div><div class='add'>+		y1 = y;</div><div class='add'>+		fingers = z &gt; 0 ? 1 : 0;</div><div class='add'>+	} else {</div><div class='add'>+		fingers = priv-&gt;fingers;</div><div class='add'>+		x1 = priv-&gt;x1;</div><div class='add'>+		x2 = priv-&gt;x2;</div><div class='add'>+		y1 = priv-&gt;y1;</div><div class='add'>+		y2 = priv-&gt;y2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (z &gt;= 64)</div><div class='ctx'> 		input_report_key(dev, BTN_TOUCH, 1);</div><div class='ctx'> 	else</div><div class='ctx'> 		input_report_key(dev, BTN_TOUCH, 0);</div><div class='ctx'> </div><div class='add'>+	alps_report_semi_mt_data(dev, fingers, x1, y1, x2, y2);</div><div class='add'>+</div><div class='add'>+	input_mt_report_finger_count(dev, fingers);</div><div class='add'>+</div><div class='add'>+	input_report_key(dev, BTN_LEFT, left);</div><div class='add'>+	input_report_key(dev, BTN_RIGHT, right);</div><div class='add'>+</div><div class='ctx'> 	if (z &gt; 0) {</div><div class='ctx'> 		input_report_abs(dev, ABS_X, x);</div><div class='ctx'> 		input_report_abs(dev, ABS_Y, y);</div><div class='ctx'> 	}</div><div class='ctx'> 	input_report_abs(dev, ABS_PRESSURE, z);</div><div class='ctx'> </div><div class='del'>-	input_report_key(dev, BTN_TOOL_FINGER, z &gt; 0);</div><div class='del'>-	input_report_key(dev, BTN_LEFT, left);</div><div class='del'>-	input_report_key(dev, BTN_RIGHT, right);</div><div class='del'>-</div><div class='ctx'> 	input_sync(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1557,6 +1618,7 @@ int alps_init(struct psmouse *psmouse)</div><div class='ctx'> 		input_set_abs_params(dev1, ABS_Y, 0, 767, 0, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ALPS_PROTO_V3:</div><div class='add'>+	case ALPS_PROTO_V4:</div><div class='ctx'> 		set_bit(INPUT_PROP_SEMI_MT, dev1-&gt;propbit);</div><div class='ctx'> 		input_mt_init_slots(dev1, 2);</div><div class='ctx'> 		input_set_abs_params(dev1, ABS_MT_POSITION_X, 0, ALPS_V3_X_MAX, 0, 0);</div><div class='hunk'>@@ -1565,8 +1627,7 @@ int alps_init(struct psmouse *psmouse)</div><div class='ctx'> 		set_bit(BTN_TOOL_DOUBLETAP, dev1-&gt;keybit);</div><div class='ctx'> 		set_bit(BTN_TOOL_TRIPLETAP, dev1-&gt;keybit);</div><div class='ctx'> 		set_bit(BTN_TOOL_QUADTAP, dev1-&gt;keybit);</div><div class='del'>-		/* fall through */</div><div class='del'>-	case ALPS_PROTO_V4:</div><div class='add'>+</div><div class='ctx'> 		input_set_abs_params(dev1, ABS_X, 0, ALPS_V3_X_MAX, 0, 0);</div><div class='ctx'> 		input_set_abs_params(dev1, ABS_Y, 0, ALPS_V3_Y_MAX, 0, 0);</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/input/mouse/alps.h b/drivers/input/mouse/alps.h<br/>index a00a4ab92a0f..ae1ac354c778 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/mouse/alps.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/mouse/alps.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/mouse/alps.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/alps.h</a></div><div class='hunk'>@@ -39,6 +39,8 @@ struct alps_data {</div><div class='ctx'> 	int prev_fin;			/* Finger bit from previous packet */</div><div class='ctx'> 	int multi_packet;		/* Multi-packet data in progress */</div><div class='ctx'> 	unsigned char multi_data[6];	/* Saved multi-packet data */</div><div class='add'>+	int x1, x2, y1, y2;		/* Coordinates from last MT report */</div><div class='add'>+	int fingers;			/* Number of fingers from MT report */</div><div class='ctx'> 	u8 quirks;</div><div class='ctx'> 	struct timer_list timer;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/input/mouse/appletouch.c b/drivers/input/mouse/appletouch.c<br/>index 0acbc7d50d05..e42f1fa8cdc0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/mouse/appletouch.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/mouse/appletouch.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/mouse/appletouch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/appletouch.c</a></div><div class='hunk'>@@ -195,6 +195,7 @@ enum atp_status_bits {</div><div class='ctx'> struct atp {</div><div class='ctx'> 	char			phys[64];</div><div class='ctx'> 	struct usb_device	*udev;		/* usb device */</div><div class='add'>+	struct usb_interface	*intf;		/* usb interface */</div><div class='ctx'> 	struct urb		*urb;		/* usb request block */</div><div class='ctx'> 	u8			*data;		/* transferred data */</div><div class='ctx'> 	struct input_dev	*input;		/* input dev */</div><div class='hunk'>@@ -253,8 +254,9 @@ MODULE_PARM_DESC(debug, "Activate debugging output");</div><div class='ctx'>  * packets (Report ID 2). This code changes device mode, so it</div><div class='ctx'>  * sends raw sensor reports (Report ID 5).</div><div class='ctx'>  */</div><div class='del'>-static int atp_geyser_init(struct usb_device *udev)</div><div class='add'>+static int atp_geyser_init(struct atp *dev)</div><div class='ctx'> {</div><div class='add'>+	struct usb_device *udev = dev-&gt;udev;</div><div class='ctx'> 	char *data;</div><div class='ctx'> 	int size;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -262,7 +264,7 @@ static int atp_geyser_init(struct usb_device *udev)</div><div class='ctx'> </div><div class='ctx'> 	data = kmalloc(8, GFP_KERNEL);</div><div class='ctx'> 	if (!data) {</div><div class='del'>-		err("Out of memory");</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "Out of memory\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -277,7 +279,7 @@ static int atp_geyser_init(struct usb_device *udev)</div><div class='ctx'> 		for (i = 0; i &lt; 8; i++)</div><div class='ctx'> 			dprintk("appletouch[%d]: %d\n", i, data[i]);</div><div class='ctx'> </div><div class='del'>-		err("Failed to read mode from device.");</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "Failed to read mode from device.\n");</div><div class='ctx'> 		ret = -EIO;</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -296,7 +298,7 @@ static int atp_geyser_init(struct usb_device *udev)</div><div class='ctx'> 		for (i = 0; i &lt; 8; i++)</div><div class='ctx'> 			dprintk("appletouch[%d]: %d\n", i, data[i]);</div><div class='ctx'> </div><div class='del'>-		err("Failed to request geyser raw mode");</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "Failed to request geyser raw mode\n");</div><div class='ctx'> 		ret = -EIO;</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -313,16 +315,16 @@ out_free:</div><div class='ctx'> static void atp_reinit(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct atp *dev = container_of(work, struct atp, work);</div><div class='del'>-	struct usb_device *udev = dev-&gt;udev;</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='ctx'> 	dprintk("appletouch: putting appletouch to sleep (reinit)\n");</div><div class='del'>-	atp_geyser_init(udev);</div><div class='add'>+	atp_geyser_init(dev);</div><div class='ctx'> </div><div class='ctx'> 	retval = usb_submit_urb(dev-&gt;urb, GFP_ATOMIC);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		err("atp_reinit: usb_submit_urb failed with error %d",</div><div class='del'>-		    retval);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"atp_reinit: usb_submit_urb failed with error %d\n",</div><div class='add'>+			retval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int atp_calculate_abs(int *xy_sensors, int nb_sensors, int fact,</div><div class='hunk'>@@ -400,6 +402,7 @@ static inline void atp_report_fingers(struct input_dev *input, int fingers)</div><div class='ctx'> static int atp_status_check(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct atp *dev = urb-&gt;context;</div><div class='add'>+	struct usb_interface *intf = dev-&gt;intf;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='ctx'> 	case 0:</div><div class='hunk'>@@ -407,8 +410,8 @@ static int atp_status_check(struct urb *urb)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case -EOVERFLOW:</div><div class='ctx'> 		if (!dev-&gt;overflow_warned) {</div><div class='del'>-			printk(KERN_WARNING "appletouch: OVERFLOW with data "</div><div class='del'>-				"length %d, actual length is %d\n",</div><div class='add'>+			dev_warn(&amp;intf-&gt;dev,</div><div class='add'>+				"appletouch: OVERFLOW with data length %d, actual length is %d\n",</div><div class='ctx'> 				dev-&gt;info-&gt;datalen, dev-&gt;urb-&gt;actual_length);</div><div class='ctx'> 			dev-&gt;overflow_warned = true;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -416,13 +419,15 @@ static int atp_status_check(struct urb *urb)</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		/* This urb is terminated, clean up */</div><div class='del'>-		dbg("atp_complete: urb shutting down with status: %d",</div><div class='del'>-		    urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev,</div><div class='add'>+			"atp_complete: urb shutting down with status: %d\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> 		return ATP_URB_STATUS_ERROR_FATAL;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		dbg("atp_complete: nonzero urb status received: %d",</div><div class='del'>-		    urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev,</div><div class='add'>+			"atp_complete: nonzero urb status received: %d\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> 		return ATP_URB_STATUS_ERROR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -445,7 +450,8 @@ static void atp_detect_size(struct atp *dev)</div><div class='ctx'> 	for (i = dev-&gt;info-&gt;xsensors; i &lt; ATP_XSENSORS; i++) {</div><div class='ctx'> 		if (dev-&gt;xy_cur[i]) {</div><div class='ctx'> </div><div class='del'>-			printk(KERN_INFO "appletouch: 17\" model detected.\n");</div><div class='add'>+			dev_info(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+				"appletouch: 17\" model detected.\n");</div><div class='ctx'> </div><div class='ctx'> 			input_set_abs_params(dev-&gt;input, ABS_X, 0,</div><div class='ctx'> 					     (dev-&gt;info-&gt;xsensors_17 - 1) *</div><div class='hunk'>@@ -588,8 +594,9 @@ static void atp_complete_geyser_1_2(struct urb *urb)</div><div class='ctx'>  exit:</div><div class='ctx'> 	retval = usb_submit_urb(dev-&gt;urb, GFP_ATOMIC);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		err("atp_complete: usb_submit_urb failed with result %d",</div><div class='del'>-		    retval);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"atp_complete: usb_submit_urb failed with result %d\n",</div><div class='add'>+			retval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Interrupt function for older touchpads: GEYSER3/GEYSER4 */</div><div class='hunk'>@@ -722,8 +729,9 @@ static void atp_complete_geyser_3_4(struct urb *urb)</div><div class='ctx'>  exit:</div><div class='ctx'> 	retval = usb_submit_urb(dev-&gt;urb, GFP_ATOMIC);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		err("atp_complete: usb_submit_urb failed with result %d",</div><div class='del'>-		    retval);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"atp_complete: usb_submit_urb failed with result %d\n",</div><div class='add'>+			retval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int atp_open(struct input_dev *input)</div><div class='hunk'>@@ -748,14 +756,12 @@ static void atp_close(struct input_dev *input)</div><div class='ctx'> </div><div class='ctx'> static int atp_handle_geyser(struct atp *dev)</div><div class='ctx'> {</div><div class='del'>-	struct usb_device *udev = dev-&gt;udev;</div><div class='del'>-</div><div class='ctx'> 	if (dev-&gt;info != &amp;fountain_info) {</div><div class='ctx'> 		/* switch to raw sensor mode */</div><div class='del'>-		if (atp_geyser_init(udev))</div><div class='add'>+		if (atp_geyser_init(dev))</div><div class='ctx'> 			return -EIO;</div><div class='ctx'> </div><div class='del'>-		printk(KERN_INFO "appletouch: Geyser mode initialized.\n");</div><div class='add'>+		dev_info(&amp;dev-&gt;intf-&gt;dev, "Geyser mode initialized.\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -785,7 +791,7 @@ static int atp_probe(struct usb_interface *iface,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!int_in_endpointAddr) {</div><div class='del'>-		err("Could not find int-in endpoint");</div><div class='add'>+		dev_err(&amp;iface-&gt;dev, "Could not find int-in endpoint\n");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -793,11 +799,12 @@ static int atp_probe(struct usb_interface *iface,</div><div class='ctx'> 	dev = kzalloc(sizeof(struct atp), GFP_KERNEL);</div><div class='ctx'> 	input_dev = input_allocate_device();</div><div class='ctx'> 	if (!dev || !input_dev) {</div><div class='del'>-		err("Out of memory");</div><div class='add'>+		dev_err(&amp;iface-&gt;dev, "Out of memory\n");</div><div class='ctx'> 		goto err_free_devs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;udev = udev;</div><div class='add'>+	dev-&gt;intf = iface;</div><div class='ctx'> 	dev-&gt;input = input_dev;</div><div class='ctx'> 	dev-&gt;info = info;</div><div class='ctx'> 	dev-&gt;overflow_warned = false;</div><div class='hunk'>@@ -886,7 +893,7 @@ static void atp_disconnect(struct usb_interface *iface)</div><div class='ctx'> 		usb_free_urb(dev-&gt;urb);</div><div class='ctx'> 		kfree(dev);</div><div class='ctx'> 	}</div><div class='del'>-	printk(KERN_INFO "input: appletouch disconnected\n");</div><div class='add'>+	dev_info(&amp;iface-&gt;dev, "input: appletouch disconnected\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int atp_recover(struct atp *dev)</div><div class='head'>diff --git a/drivers/input/mouse/bcm5974.c b/drivers/input/mouse/bcm5974.c<br/>index f9e2758b9f46..2cf681d98c0d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/mouse/bcm5974.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/mouse/bcm5974.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/mouse/bcm5974.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/bcm5974.c</a></div><div class='hunk'>@@ -584,7 +584,7 @@ static int bcm5974_wellspring_mode(struct bcm5974 *dev, bool on)</div><div class='ctx'> 	int retval = 0, size;</div><div class='ctx'> </div><div class='ctx'> 	if (!data) {</div><div class='del'>-		err("bcm5974: out of memory");</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "out of memory\n");</div><div class='ctx'> 		retval = -ENOMEM;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -597,7 +597,7 @@ static int bcm5974_wellspring_mode(struct bcm5974 *dev, bool on)</div><div class='ctx'> 			BCM5974_WELLSPRING_MODE_REQUEST_INDEX, data, 8, 5000);</div><div class='ctx'> </div><div class='ctx'> 	if (size != 8) {</div><div class='del'>-		err("bcm5974: could not read from device");</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "could not read from device\n");</div><div class='ctx'> 		retval = -EIO;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -615,7 +615,7 @@ static int bcm5974_wellspring_mode(struct bcm5974 *dev, bool on)</div><div class='ctx'> 			BCM5974_WELLSPRING_MODE_REQUEST_INDEX, data, 8, 5000);</div><div class='ctx'> </div><div class='ctx'> 	if (size != 8) {</div><div class='del'>-		err("bcm5974: could not write to device");</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "could not write to device\n");</div><div class='ctx'> 		retval = -EIO;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -631,6 +631,7 @@ static int bcm5974_wellspring_mode(struct bcm5974 *dev, bool on)</div><div class='ctx'> static void bcm5974_irq_button(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcm5974 *dev = urb-&gt;context;</div><div class='add'>+	struct usb_interface *intf = dev-&gt;intf;</div><div class='ctx'> 	int error;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='hunk'>@@ -640,10 +641,11 @@ static void bcm5974_irq_button(struct urb *urb)</div><div class='ctx'> 	case -ECONNRESET:</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='del'>-		dbg("bcm5974: button urb shutting down: %d", urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "button urb shutting down: %d\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='del'>-		dbg("bcm5974: button urb status: %d", urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "button urb status: %d\n", urb-&gt;status);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -654,12 +656,13 @@ static void bcm5974_irq_button(struct urb *urb)</div><div class='ctx'> exit:</div><div class='ctx'> 	error = usb_submit_urb(dev-&gt;bt_urb, GFP_ATOMIC);</div><div class='ctx'> 	if (error)</div><div class='del'>-		err("bcm5974: button urb failed: %d", error);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "button urb failed: %d\n", error);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bcm5974_irq_trackpad(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcm5974 *dev = urb-&gt;context;</div><div class='add'>+	struct usb_interface *intf = dev-&gt;intf;</div><div class='ctx'> 	int error;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='hunk'>@@ -669,10 +672,11 @@ static void bcm5974_irq_trackpad(struct urb *urb)</div><div class='ctx'> 	case -ECONNRESET:</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='del'>-		dbg("bcm5974: trackpad urb shutting down: %d", urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "trackpad urb shutting down: %d\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='del'>-		dbg("bcm5974: trackpad urb status: %d", urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "trackpad urb status: %d\n", urb-&gt;status);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -687,7 +691,7 @@ static void bcm5974_irq_trackpad(struct urb *urb)</div><div class='ctx'> exit:</div><div class='ctx'> 	error = usb_submit_urb(dev-&gt;tp_urb, GFP_ATOMIC);</div><div class='ctx'> 	if (error)</div><div class='del'>-		err("bcm5974: trackpad urb failed: %d", error);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "trackpad urb failed: %d\n", error);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -833,7 +837,7 @@ static int bcm5974_probe(struct usb_interface *iface,</div><div class='ctx'> 	dev = kzalloc(sizeof(struct bcm5974), GFP_KERNEL);</div><div class='ctx'> 	input_dev = input_allocate_device();</div><div class='ctx'> 	if (!dev || !input_dev) {</div><div class='del'>-		err("bcm5974: out of memory");</div><div class='add'>+		dev_err(&amp;iface-&gt;dev, "out of memory\n");</div><div class='ctx'> 		goto err_free_devs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/input/mouse/navpoint.c b/drivers/input/mouse/navpoint.c<br/>new file mode 100644<br/>index 000000000000..c29ae7654d5e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/input/mouse/navpoint.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/navpoint.c</a></div><div class='hunk'>@@ -0,0 +1,369 @@</div><div class='add'>+/*</div><div class='add'>+ * Synaptics NavPoint (PXA27x SSP/SPI) driver.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Paul Parsons &lt;lost.distance@yahoo.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/input/navpoint.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/pxa2xx_ssp.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Synaptics Modular Embedded Protocol: Module Packet Format.</div><div class='add'>+ * Module header byte 2:0 = Length (# bytes that follow)</div><div class='add'>+ * Module header byte 4:3 = Control</div><div class='add'>+ * Module header byte 7:5 = Module Address</div><div class='add'>+ */</div><div class='add'>+#define HEADER_LENGTH(byte)	((byte) &amp; 0x07)</div><div class='add'>+#define HEADER_CONTROL(byte)	(((byte) &gt;&gt; 3) &amp; 0x03)</div><div class='add'>+#define HEADER_ADDRESS(byte)	((byte) &gt;&gt; 5)</div><div class='add'>+</div><div class='add'>+struct navpoint {</div><div class='add'>+	struct ssp_device	*ssp;</div><div class='add'>+	struct input_dev	*input;</div><div class='add'>+	struct device		*dev;</div><div class='add'>+	int			gpio;</div><div class='add'>+	int			index;</div><div class='add'>+	u8			data[1 + HEADER_LENGTH(0xff)];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initialization values for SSCR0_x, SSCR1_x, SSSR_x.</div><div class='add'>+ */</div><div class='add'>+static const u32 sscr0 = 0</div><div class='add'>+	| SSCR0_TUM		/* TIM = 1; No TUR interrupts */</div><div class='add'>+	| SSCR0_RIM		/* RIM = 1; No ROR interrupts */</div><div class='add'>+	| SSCR0_SSE		/* SSE = 1; SSP enabled */</div><div class='add'>+	| SSCR0_Motorola	/* FRF = 0; Motorola SPI */</div><div class='add'>+	| SSCR0_DataSize(16)	/* DSS = 15; Data size = 16-bit */</div><div class='add'>+	;</div><div class='add'>+static const u32 sscr1 = 0</div><div class='add'>+	| SSCR1_SCFR		/* SCFR = 1; SSPSCLK only during transfers */</div><div class='add'>+	| SSCR1_SCLKDIR		/* SCLKDIR = 1; Slave mode */</div><div class='add'>+	| SSCR1_SFRMDIR		/* SFRMDIR = 1; Slave mode */</div><div class='add'>+	| SSCR1_RWOT		/* RWOT = 1; Receive without transmit mode */</div><div class='add'>+	| SSCR1_RxTresh(1)	/* RFT = 0; Receive FIFO threshold = 1 */</div><div class='add'>+	| SSCR1_SPH		/* SPH = 1; SSPSCLK inactive 0.5 + 1 cycles */</div><div class='add'>+	| SSCR1_RIE		/* RIE = 1; Receive FIFO interrupt enabled */</div><div class='add'>+	;</div><div class='add'>+static const u32 sssr = 0</div><div class='add'>+	| SSSR_BCE		/* BCE = 1; Clear BCE */</div><div class='add'>+	| SSSR_TUR		/* TUR = 1; Clear TUR */</div><div class='add'>+	| SSSR_EOC		/* EOC = 1; Clear EOC */</div><div class='add'>+	| SSSR_TINT		/* TINT = 1; Clear TINT */</div><div class='add'>+	| SSSR_PINT		/* PINT = 1; Clear PINT */</div><div class='add'>+	| SSSR_ROR		/* ROR = 1; Clear ROR */</div><div class='add'>+	;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * MEP Query $22: Touchpad Coordinate Range Query is not supported by</div><div class='add'>+ * the NavPoint module, so sampled values provide the default limits.</div><div class='add'>+ */</div><div class='add'>+#define NAVPOINT_X_MIN		1278</div><div class='add'>+#define NAVPOINT_X_MAX		5340</div><div class='add'>+#define NAVPOINT_Y_MIN		1572</div><div class='add'>+#define NAVPOINT_Y_MAX		4396</div><div class='add'>+#define NAVPOINT_PRESSURE_MIN	0</div><div class='add'>+#define NAVPOINT_PRESSURE_MAX	255</div><div class='add'>+</div><div class='add'>+static void navpoint_packet(struct navpoint *navpoint)</div><div class='add'>+{</div><div class='add'>+	int finger;</div><div class='add'>+	int gesture;</div><div class='add'>+	int x, y, z;</div><div class='add'>+</div><div class='add'>+	switch (navpoint-&gt;data[0]) {</div><div class='add'>+	case 0xff:	/* Garbage (packet?) between reset and Hello packet */</div><div class='add'>+	case 0x00:	/* Module 0, NULL packet */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 0x0e:	/* Module 0, Absolute packet */</div><div class='add'>+		finger = (navpoint-&gt;data[1] &amp; 0x01);</div><div class='add'>+		gesture = (navpoint-&gt;data[1] &amp; 0x02);</div><div class='add'>+		x = ((navpoint-&gt;data[2] &amp; 0x1f) &lt;&lt; 8) | navpoint-&gt;data[3];</div><div class='add'>+		y = ((navpoint-&gt;data[4] &amp; 0x1f) &lt;&lt; 8) | navpoint-&gt;data[5];</div><div class='add'>+		z = navpoint-&gt;data[6];</div><div class='add'>+		input_report_key(navpoint-&gt;input, BTN_TOUCH, finger);</div><div class='add'>+		input_report_abs(navpoint-&gt;input, ABS_X, x);</div><div class='add'>+		input_report_abs(navpoint-&gt;input, ABS_Y, y);</div><div class='add'>+		input_report_abs(navpoint-&gt;input, ABS_PRESSURE, z);</div><div class='add'>+		input_report_key(navpoint-&gt;input, BTN_TOOL_FINGER, finger);</div><div class='add'>+		input_report_key(navpoint-&gt;input, BTN_LEFT, gesture);</div><div class='add'>+		input_sync(navpoint-&gt;input);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 0x19:	/* Module 0, Hello packet */</div><div class='add'>+		if ((navpoint-&gt;data[1] &amp; 0xf0) == 0x10)</div><div class='add'>+			break;</div><div class='add'>+		/* FALLTHROUGH */</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(navpoint-&gt;dev,</div><div class='add'>+			 "spurious packet: data=0x%02x,0x%02x,...\n",</div><div class='add'>+			 navpoint-&gt;data[0], navpoint-&gt;data[1]);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t navpoint_irq(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct navpoint *navpoint = dev_id;</div><div class='add'>+	struct ssp_device *ssp = navpoint-&gt;ssp;</div><div class='add'>+	irqreturn_t ret = IRQ_NONE;</div><div class='add'>+	u32 status;</div><div class='add'>+</div><div class='add'>+	status = pxa_ssp_read_reg(ssp, SSSR);</div><div class='add'>+	if (status &amp; sssr) {</div><div class='add'>+		dev_warn(navpoint-&gt;dev,</div><div class='add'>+			 "unexpected interrupt: status=0x%08x\n", status);</div><div class='add'>+		pxa_ssp_write_reg(ssp, SSSR, (status &amp; sssr));</div><div class='add'>+		ret = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (status &amp; SSSR_RNE) {</div><div class='add'>+		u32 data;</div><div class='add'>+</div><div class='add'>+		data = pxa_ssp_read_reg(ssp, SSDR);</div><div class='add'>+		navpoint-&gt;data[navpoint-&gt;index + 0] = (data &gt;&gt; 8);</div><div class='add'>+		navpoint-&gt;data[navpoint-&gt;index + 1] = data;</div><div class='add'>+		navpoint-&gt;index += 2;</div><div class='add'>+		if (HEADER_LENGTH(navpoint-&gt;data[0]) &lt; navpoint-&gt;index) {</div><div class='add'>+			navpoint_packet(navpoint);</div><div class='add'>+			navpoint-&gt;index = 0;</div><div class='add'>+		}</div><div class='add'>+		status = pxa_ssp_read_reg(ssp, SSSR);</div><div class='add'>+		ret = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void navpoint_up(struct navpoint *navpoint)</div><div class='add'>+{</div><div class='add'>+	struct ssp_device *ssp = navpoint-&gt;ssp;</div><div class='add'>+	int timeout;</div><div class='add'>+</div><div class='add'>+	clk_prepare_enable(ssp-&gt;clk);</div><div class='add'>+</div><div class='add'>+	pxa_ssp_write_reg(ssp, SSCR1, sscr1);</div><div class='add'>+	pxa_ssp_write_reg(ssp, SSSR, sssr);</div><div class='add'>+	pxa_ssp_write_reg(ssp, SSTO, 0);</div><div class='add'>+	pxa_ssp_write_reg(ssp, SSCR0, sscr0);	/* SSCR0_SSE written last */</div><div class='add'>+</div><div class='add'>+	/* Wait until SSP port is ready for slave clock operations */</div><div class='add'>+	for (timeout = 100; timeout != 0; --timeout) {</div><div class='add'>+		if (!(pxa_ssp_read_reg(ssp, SSSR) &amp; SSSR_CSS))</div><div class='add'>+			break;</div><div class='add'>+		msleep(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (timeout == 0)</div><div class='add'>+		dev_err(navpoint-&gt;dev,</div><div class='add'>+			"timeout waiting for SSSR[CSS] to clear\n");</div><div class='add'>+</div><div class='add'>+	if (gpio_is_valid(navpoint-&gt;gpio))</div><div class='add'>+		gpio_set_value(navpoint-&gt;gpio, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void navpoint_down(struct navpoint *navpoint)</div><div class='add'>+{</div><div class='add'>+	struct ssp_device *ssp = navpoint-&gt;ssp;</div><div class='add'>+</div><div class='add'>+	if (gpio_is_valid(navpoint-&gt;gpio))</div><div class='add'>+		gpio_set_value(navpoint-&gt;gpio, 0);</div><div class='add'>+</div><div class='add'>+	pxa_ssp_write_reg(ssp, SSCR0, 0);</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(ssp-&gt;clk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int navpoint_open(struct input_dev *input)</div><div class='add'>+{</div><div class='add'>+	struct navpoint *navpoint = input_get_drvdata(input);</div><div class='add'>+</div><div class='add'>+	navpoint_up(navpoint);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void navpoint_close(struct input_dev *input)</div><div class='add'>+{</div><div class='add'>+	struct navpoint *navpoint = input_get_drvdata(input);</div><div class='add'>+</div><div class='add'>+	navpoint_down(navpoint);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit navpoint_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	const struct navpoint_platform_data *pdata =</div><div class='add'>+					dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+	struct ssp_device *ssp;</div><div class='add'>+	struct input_dev *input;</div><div class='add'>+	struct navpoint *navpoint;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	if (!pdata) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "no platform data\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (gpio_is_valid(pdata-&gt;gpio)) {</div><div class='add'>+		error = gpio_request_one(pdata-&gt;gpio, GPIOF_OUT_INIT_LOW,</div><div class='add'>+					 "SYNAPTICS_ON");</div><div class='add'>+		if (error)</div><div class='add'>+			return error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ssp = pxa_ssp_request(pdata-&gt;port, pdev-&gt;name);</div><div class='add'>+	if (!ssp) {</div><div class='add'>+		error = -ENODEV;</div><div class='add'>+		goto err_free_gpio;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* HaRET does not disable devices before jumping into Linux */</div><div class='add'>+	if (pxa_ssp_read_reg(ssp, SSCR0) &amp; SSCR0_SSE) {</div><div class='add'>+		pxa_ssp_write_reg(ssp, SSCR0, 0);</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, "ssp%d already enabled\n", pdata-&gt;port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	navpoint = kzalloc(sizeof(*navpoint), GFP_KERNEL);</div><div class='add'>+	input = input_allocate_device();</div><div class='add'>+	if (!navpoint || !input) {</div><div class='add'>+		error = -ENOMEM;</div><div class='add'>+		goto err_free_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	navpoint-&gt;ssp = ssp;</div><div class='add'>+	navpoint-&gt;input = input;</div><div class='add'>+	navpoint-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	navpoint-&gt;gpio = pdata-&gt;gpio;</div><div class='add'>+</div><div class='add'>+	input-&gt;name = pdev-&gt;name;</div><div class='add'>+	input-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	__set_bit(EV_KEY, input-&gt;evbit);</div><div class='add'>+	__set_bit(EV_ABS, input-&gt;evbit);</div><div class='add'>+	__set_bit(BTN_LEFT, input-&gt;keybit);</div><div class='add'>+	__set_bit(BTN_TOUCH, input-&gt;keybit);</div><div class='add'>+	__set_bit(BTN_TOOL_FINGER, input-&gt;keybit);</div><div class='add'>+</div><div class='add'>+	input_set_abs_params(input, ABS_X,</div><div class='add'>+			     NAVPOINT_X_MIN, NAVPOINT_X_MAX, 0, 0);</div><div class='add'>+	input_set_abs_params(input, ABS_Y,</div><div class='add'>+			     NAVPOINT_Y_MIN, NAVPOINT_Y_MAX, 0, 0);</div><div class='add'>+	input_set_abs_params(input, ABS_PRESSURE,</div><div class='add'>+			     NAVPOINT_PRESSURE_MIN, NAVPOINT_PRESSURE_MAX,</div><div class='add'>+			     0, 0);</div><div class='add'>+</div><div class='add'>+	input-&gt;open = navpoint_open;</div><div class='add'>+	input-&gt;close = navpoint_close;</div><div class='add'>+</div><div class='add'>+	input_set_drvdata(input, navpoint);</div><div class='add'>+</div><div class='add'>+	error = request_irq(ssp-&gt;irq, navpoint_irq, 0, pdev-&gt;name, navpoint);</div><div class='add'>+	if (error)</div><div class='add'>+		goto err_free_mem;</div><div class='add'>+</div><div class='add'>+	error = input_register_device(input);</div><div class='add'>+	if (error)</div><div class='add'>+		goto err_free_irq;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, navpoint);</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "ssp%d, irq %d\n", pdata-&gt;port, ssp-&gt;irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irq:</div><div class='add'>+	free_irq(ssp-&gt;irq, &amp;pdev-&gt;dev);</div><div class='add'>+err_free_mem:</div><div class='add'>+	input_free_device(input);</div><div class='add'>+	kfree(navpoint);</div><div class='add'>+	pxa_ssp_free(ssp);</div><div class='add'>+err_free_gpio:</div><div class='add'>+	if (gpio_is_valid(pdata-&gt;gpio))</div><div class='add'>+		gpio_free(pdata-&gt;gpio);</div><div class='add'>+</div><div class='add'>+	return error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit navpoint_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	const struct navpoint_platform_data *pdata =</div><div class='add'>+					dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+	struct navpoint *navpoint = platform_get_drvdata(pdev);</div><div class='add'>+	struct ssp_device *ssp = navpoint-&gt;ssp;</div><div class='add'>+</div><div class='add'>+	free_irq(ssp-&gt;irq, navpoint);</div><div class='add'>+</div><div class='add'>+	input_unregister_device(navpoint-&gt;input);</div><div class='add'>+	kfree(navpoint);</div><div class='add'>+</div><div class='add'>+	pxa_ssp_free(ssp);</div><div class='add'>+</div><div class='add'>+	if (gpio_is_valid(pdata-&gt;gpio))</div><div class='add'>+		gpio_free(pdata-&gt;gpio);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int navpoint_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev);</div><div class='add'>+	struct navpoint *navpoint = platform_get_drvdata(pdev);</div><div class='add'>+	struct input_dev *input = navpoint-&gt;input;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;input-&gt;mutex);</div><div class='add'>+	if (input-&gt;users)</div><div class='add'>+		navpoint_down(navpoint);</div><div class='add'>+	mutex_unlock(&amp;input-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int navpoint_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev);</div><div class='add'>+	struct navpoint *navpoint = platform_get_drvdata(pdev);</div><div class='add'>+	struct input_dev *input = navpoint-&gt;input;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;input-&gt;mutex);</div><div class='add'>+	if (input-&gt;users)</div><div class='add'>+		navpoint_up(navpoint);</div><div class='add'>+	mutex_unlock(&amp;input-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(navpoint_pm_ops, navpoint_suspend, navpoint_resume);</div><div class='add'>+</div><div class='add'>+static struct platform_driver navpoint_driver = {</div><div class='add'>+	.probe		= navpoint_probe,</div><div class='add'>+	.remove		= __devexit_p(navpoint_remove),</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "navpoint",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+		.pm	= &amp;navpoint_pm_ops,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(navpoint_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Paul Parsons &lt;lost.distance@yahoo.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Synaptics NavPoint (PXA27x SSP/SPI) driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_ALIAS("platform:navpoint");</div><div class='head'>diff --git a/drivers/input/mouse/sentelic.c b/drivers/input/mouse/sentelic.c<br/>index 661a0ca3b3d6..3f5649f19082 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/mouse/sentelic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/mouse/sentelic.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/mouse/sentelic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/sentelic.c</a></div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'> #define	GET_ABS_Y(packet)	((packet[2] &lt;&lt; 2) | (packet[3] &amp; 0x03))</div><div class='ctx'> </div><div class='ctx'> /** Driver version. */</div><div class='del'>-static const char fsp_drv_ver[] = "1.0.0-K";</div><div class='add'>+static const char fsp_drv_ver[] = "1.1.0-K";</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Make sure that the value being sent to FSP will not conflict with</div><div class='hunk'>@@ -303,6 +303,27 @@ static int fsp_get_revision(struct psmouse *psmouse, int *rev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int fsp_get_sn(struct psmouse *psmouse, int *sn)</div><div class='add'>+{</div><div class='add'>+	int v0, v1, v2;</div><div class='add'>+	int rc = -EIO;</div><div class='add'>+</div><div class='add'>+	/* production number since Cx is available at: 0x0b40 ~ 0x0b42 */</div><div class='add'>+	if (fsp_page_reg_write(psmouse, FSP_PAGE_0B))</div><div class='add'>+		goto out;</div><div class='add'>+	if (fsp_reg_read(psmouse, FSP_REG_SN0, &amp;v0))</div><div class='add'>+		goto out;</div><div class='add'>+	if (fsp_reg_read(psmouse, FSP_REG_SN1, &amp;v1))</div><div class='add'>+		goto out;</div><div class='add'>+	if (fsp_reg_read(psmouse, FSP_REG_SN2, &amp;v2))</div><div class='add'>+		goto out;</div><div class='add'>+	*sn = (v0 &lt;&lt; 16) | (v1 &lt;&lt; 8) | v2;</div><div class='add'>+	rc = 0;</div><div class='add'>+out:</div><div class='add'>+	fsp_page_reg_write(psmouse, FSP_PAGE_DEFAULT);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int fsp_get_buttons(struct psmouse *psmouse, int *btn)</div><div class='ctx'> {</div><div class='ctx'> 	static const int buttons[] = {</div><div class='hunk'>@@ -1000,16 +1021,21 @@ static int fsp_reconnect(struct psmouse *psmouse)</div><div class='ctx'> int fsp_init(struct psmouse *psmouse)</div><div class='ctx'> {</div><div class='ctx'> 	struct fsp_data *priv;</div><div class='del'>-	int ver, rev;</div><div class='add'>+	int ver, rev, sn = 0;</div><div class='ctx'> 	int error;</div><div class='ctx'> </div><div class='ctx'> 	if (fsp_get_version(psmouse, &amp;ver) ||</div><div class='ctx'> 	    fsp_get_revision(psmouse, &amp;rev)) {</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='add'>+	if (ver &gt;= FSP_VER_STL3888_C0) {</div><div class='add'>+		/* firmware information is only available since C0 */</div><div class='add'>+		fsp_get_sn(psmouse, &amp;sn);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	psmouse_info(psmouse, "Finger Sensing Pad, hw: %d.%d.%d, sw: %s\n",</div><div class='del'>-		     ver &gt;&gt; 4, ver &amp; 0x0F, rev, fsp_drv_ver);</div><div class='add'>+	psmouse_info(psmouse,</div><div class='add'>+		     "Finger Sensing Pad, hw: %d.%d.%d, sn: %x, sw: %s\n",</div><div class='add'>+		     ver &gt;&gt; 4, ver &amp; 0x0F, rev, sn, fsp_drv_ver);</div><div class='ctx'> </div><div class='ctx'> 	psmouse-&gt;private = priv = kzalloc(sizeof(struct fsp_data), GFP_KERNEL);</div><div class='ctx'> 	if (!priv)</div><div class='head'>diff --git a/drivers/input/mouse/sentelic.h b/drivers/input/mouse/sentelic.h<br/>index 334de19e5ddb..aa697ece405b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/mouse/sentelic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/mouse/sentelic.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/mouse/sentelic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/sentelic.h</a></div><div class='hunk'>@@ -65,6 +65,14 @@</div><div class='ctx'> #define	FSP_BIT_SWC1_GST_GRP1	BIT(6)</div><div class='ctx'> #define	FSP_BIT_SWC1_BX_COMPAT	BIT(7)</div><div class='ctx'> </div><div class='add'>+#define	FSP_PAGE_0B		(0x0b)</div><div class='add'>+#define	FSP_PAGE_82		(0x82)</div><div class='add'>+#define	FSP_PAGE_DEFAULT	FSP_PAGE_82</div><div class='add'>+</div><div class='add'>+#define	FSP_REG_SN0		(0x40)</div><div class='add'>+#define	FSP_REG_SN1		(0x41)</div><div class='add'>+#define	FSP_REG_SN2		(0x42)</div><div class='add'>+</div><div class='ctx'> /* Finger-sensing Pad packet formating related definitions */</div><div class='ctx'> </div><div class='ctx'> /* absolute packet type */</div><div class='head'>diff --git a/drivers/input/mouse/sermouse.c b/drivers/input/mouse/sermouse.c<br/>index 17ff137b9bd5..d5928fd0c914 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/mouse/sermouse.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/mouse/sermouse.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/mouse/sermouse.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/sermouse.c</a></div><div class='hunk'>@@ -355,15 +355,4 @@ static struct serio_driver sermouse_drv = {</div><div class='ctx'> 	.disconnect	= sermouse_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init sermouse_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;sermouse_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sermouse_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;sermouse_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sermouse_init);</div><div class='del'>-module_exit(sermouse_exit);</div><div class='add'>+module_serio_driver(sermouse_drv);</div><div class='head'>diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c<br/>index 8081a0a5d602..c703d53be3a0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/mouse/synaptics.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/mouse/synaptics.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/mouse/synaptics.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/synaptics.c</a></div><div class='hunk'>@@ -45,16 +45,6 @@</div><div class='ctx'> #define YMIN_NOMINAL 1408</div><div class='ctx'> #define YMAX_NOMINAL 4448</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Synaptics touchpads report the y coordinate from bottom to top, which is</div><div class='del'>- * opposite from what userspace expects.</div><div class='del'>- * This function is used to invert y before reporting.</div><div class='del'>- */</div><div class='del'>-static int synaptics_invert_y(int y)</div><div class='del'>-{</div><div class='del'>-	return YMAX_NOMINAL + YMIN_NOMINAL - y;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='ctx'>  *	Stuff we need even when we do not want native Synaptics support</div><div class='hunk'>@@ -112,6 +102,16 @@ void synaptics_reset(struct psmouse *psmouse)</div><div class='ctx'>  ****************************************************************************/</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Synaptics touchpads report the y coordinate from bottom to top, which is</div><div class='add'>+ * opposite from what userspace expects.</div><div class='add'>+ * This function is used to invert y before reporting.</div><div class='add'>+ */</div><div class='add'>+static int synaptics_invert_y(int y)</div><div class='add'>+{</div><div class='add'>+	return YMAX_NOMINAL + YMIN_NOMINAL - y;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Send a command to the synpatics touchpad by special commands</div><div class='ctx'>  */</div><div class='ctx'> static int synaptics_send_cmd(struct psmouse *psmouse, unsigned char c, unsigned char *param)</div><div class='hunk'>@@ -274,7 +274,8 @@ static int synaptics_set_advanced_gesture_mode(struct psmouse *psmouse)</div><div class='ctx'> 	static unsigned char param = 0xc8;</div><div class='ctx'> 	struct synaptics_data *priv = psmouse-&gt;private;</div><div class='ctx'> </div><div class='del'>-	if (!SYN_CAP_ADV_GESTURE(priv-&gt;ext_cap_0c))</div><div class='add'>+	if (!(SYN_CAP_ADV_GESTURE(priv-&gt;ext_cap_0c) ||</div><div class='add'>+	      SYN_CAP_IMAGE_SENSOR(priv-&gt;ext_cap_0c)))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (psmouse_sliced_command(psmouse, SYN_QUE_MODEL))</div><div class='head'>diff --git a/drivers/input/mouse/vsxxxaa.c b/drivers/input/mouse/vsxxxaa.c<br/>index eb9a3cfbeefa..e900d465aaf6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/mouse/vsxxxaa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/mouse/vsxxxaa.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/mouse/vsxxxaa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/mouse/vsxxxaa.c</a></div><div class='hunk'>@@ -548,16 +548,4 @@ static struct serio_driver vsxxxaa_drv = {</div><div class='ctx'> 	.disconnect	= vsxxxaa_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init vsxxxaa_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;vsxxxaa_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit vsxxxaa_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;vsxxxaa_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(vsxxxaa_init);</div><div class='del'>-module_exit(vsxxxaa_exit);</div><div class='del'>-</div><div class='add'>+module_serio_driver(vsxxxaa_drv);</div><div class='head'>diff --git a/drivers/input/of_keymap.c b/drivers/input/of_keymap.c<br/>deleted file mode 100644<br/>index 061493d57682..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/input/of_keymap.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/of_keymap.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,87 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Helpers for open firmware matrix keyboard bindings</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2012 Google, Inc</div><div class='del'>- *</div><div class='del'>- * Author:</div><div class='del'>- *	Olof Johansson &lt;olof@lixom.net&gt;</div><div class='del'>- *</div><div class='del'>- * This software is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2, as published by the Free Software Foundation, and</div><div class='del'>- * may be copied, distributed, and modified under those terms.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/input.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/input/matrix_keypad.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/gfp.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-</div><div class='del'>-struct matrix_keymap_data *</div><div class='del'>-matrix_keyboard_of_fill_keymap(struct device_node *np,</div><div class='del'>-			       const char *propname)</div><div class='del'>-{</div><div class='del'>-	struct matrix_keymap_data *kd;</div><div class='del'>-	u32 *keymap;</div><div class='del'>-	int proplen, i;</div><div class='del'>-	const __be32 *prop;</div><div class='del'>-</div><div class='del'>-	if (!np)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	if (!propname)</div><div class='del'>-		propname = "linux,keymap";</div><div class='del'>-</div><div class='del'>-	prop = of_get_property(np, propname, &amp;proplen);</div><div class='del'>-	if (!prop)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	if (proplen % sizeof(u32)) {</div><div class='del'>-		pr_warn("Malformed keymap property %s in %s\n",</div><div class='del'>-			propname, np-&gt;full_name);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kd = kzalloc(sizeof(*kd), GFP_KERNEL);</div><div class='del'>-	if (!kd)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	kd-&gt;keymap = keymap = kzalloc(proplen, GFP_KERNEL);</div><div class='del'>-	if (!kd-&gt;keymap) {</div><div class='del'>-		kfree(kd);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kd-&gt;keymap_size = proplen / sizeof(u32);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; kd-&gt;keymap_size; i++) {</div><div class='del'>-		u32 tmp = be32_to_cpup(prop + i);</div><div class='del'>-		int key_code, row, col;</div><div class='del'>-</div><div class='del'>-		row = (tmp &gt;&gt; 24) &amp; 0xff;</div><div class='del'>-		col = (tmp &gt;&gt; 16) &amp; 0xff;</div><div class='del'>-		key_code = tmp &amp; 0xffff;</div><div class='del'>-		keymap[i] = KEY(row, col, key_code);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return kd;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(matrix_keyboard_of_fill_keymap);</div><div class='del'>-</div><div class='del'>-void matrix_keyboard_of_free_keymap(const struct matrix_keymap_data *kd)</div><div class='del'>-{</div><div class='del'>-	if (kd) {</div><div class='del'>-		kfree(kd-&gt;keymap);</div><div class='del'>-		kfree(kd);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(matrix_keyboard_of_free_keymap);</div><div class='head'>diff --git a/drivers/input/serio/pcips2.c b/drivers/input/serio/pcips2.c<br/>index 43494742541c..0c42497aaaf4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/serio/pcips2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/serio/pcips2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/serio/pcips2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/serio/pcips2.c</a></div><div class='hunk'>@@ -206,6 +206,7 @@ static const struct pci_device_id pcips2_ids[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{ 0, }</div><div class='ctx'> };</div><div class='add'>+MODULE_DEVICE_TABLE(pci, pcips2_ids);</div><div class='ctx'> </div><div class='ctx'> static struct pci_driver pcips2_driver = {</div><div class='ctx'> 	.name			= "pcips2",</div><div class='hunk'>@@ -214,20 +215,8 @@ static struct pci_driver pcips2_driver = {</div><div class='ctx'> 	.remove			= __devexit_p(pcips2_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init pcips2_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;pcips2_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit pcips2_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;pcips2_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(pcips2_init);</div><div class='del'>-module_exit(pcips2_exit);</div><div class='add'>+module_pci_driver(pcips2_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Russell King &lt;rmk@arm.linux.org.uk&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("PCI PS/2 keyboard/mouse driver");</div><div class='del'>-MODULE_DEVICE_TABLE(pci, pcips2_ids);</div><div class='head'>diff --git a/drivers/input/serio/ps2mult.c b/drivers/input/serio/ps2mult.c<br/>index 15aa81c9f1fb..a76fb64f03db 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/serio/ps2mult.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/serio/ps2mult.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/serio/ps2mult.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/serio/ps2mult.c</a></div><div class='hunk'>@@ -304,15 +304,4 @@ static struct serio_driver ps2mult_drv = {</div><div class='ctx'> 	.reconnect	= ps2mult_reconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init ps2mult_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;ps2mult_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ps2mult_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;ps2mult_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(ps2mult_init);</div><div class='del'>-module_exit(ps2mult_exit);</div><div class='add'>+module_serio_driver(ps2mult_drv);</div><div class='head'>diff --git a/drivers/input/serio/serio_raw.c b/drivers/input/serio/serio_raw.c<br/>index 4494233d331a..59df2e7317a3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/serio/serio_raw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/serio/serio_raw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/serio/serio_raw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/serio/serio_raw.c</a></div><div class='hunk'>@@ -165,31 +165,38 @@ static ssize_t serio_raw_read(struct file *file, char __user *buffer,</div><div class='ctx'> 	struct serio_raw *serio_raw = client-&gt;serio_raw;</div><div class='ctx'> 	char uninitialized_var(c);</div><div class='ctx'> 	ssize_t read = 0;</div><div class='del'>-	int retval;</div><div class='add'>+	int error;</div><div class='ctx'> </div><div class='del'>-	if (serio_raw-&gt;dead)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	for (;;) {</div><div class='add'>+		if (serio_raw-&gt;dead)</div><div class='add'>+			return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (serio_raw-&gt;head == serio_raw-&gt;tail &amp;&amp; (file-&gt;f_flags &amp; O_NONBLOCK))</div><div class='del'>-		return -EAGAIN;</div><div class='add'>+		if (serio_raw-&gt;head == serio_raw-&gt;tail &amp;&amp;</div><div class='add'>+		    (file-&gt;f_flags &amp; O_NONBLOCK))</div><div class='add'>+			return -EAGAIN;</div><div class='ctx'> </div><div class='del'>-	retval = wait_event_interruptible(serio_raw-&gt;wait,</div><div class='del'>-			serio_raw-&gt;head != serio_raw-&gt;tail || serio_raw-&gt;dead);</div><div class='del'>-	if (retval)</div><div class='del'>-		return retval;</div><div class='add'>+		if (count == 0)</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-	if (serio_raw-&gt;dead)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		while (read &lt; count &amp;&amp; serio_raw_fetch_byte(serio_raw, &amp;c)) {</div><div class='add'>+			if (put_user(c, buffer++))</div><div class='add'>+				return -EFAULT;</div><div class='add'>+			read++;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	while (read &lt; count &amp;&amp; serio_raw_fetch_byte(serio_raw, &amp;c)) {</div><div class='del'>-		if (put_user(c, buffer++)) {</div><div class='del'>-			retval = -EFAULT;</div><div class='add'>+		if (read)</div><div class='ctx'> 			break;</div><div class='add'>+</div><div class='add'>+		if (!(file-&gt;f_flags &amp; O_NONBLOCK)) {</div><div class='add'>+			error = wait_event_interruptible(serio_raw-&gt;wait,</div><div class='add'>+					serio_raw-&gt;head != serio_raw-&gt;tail ||</div><div class='add'>+					serio_raw-&gt;dead);</div><div class='add'>+			if (error)</div><div class='add'>+				return error;</div><div class='ctx'> 		}</div><div class='del'>-		read++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return read ?: retval;</div><div class='add'>+	return read;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t serio_raw_write(struct file *file, const char __user *buffer,</div><div class='hunk'>@@ -197,8 +204,7 @@ static ssize_t serio_raw_write(struct file *file, const char __user *buffer,</div><div class='ctx'> {</div><div class='ctx'> 	struct serio_raw_client *client = file-&gt;private_data;</div><div class='ctx'> 	struct serio_raw *serio_raw = client-&gt;serio_raw;</div><div class='del'>-	ssize_t written = 0;</div><div class='del'>-	int retval;</div><div class='add'>+	int retval = 0;</div><div class='ctx'> 	unsigned char c;</div><div class='ctx'> </div><div class='ctx'> 	retval = mutex_lock_interruptible(&amp;serio_raw_mutex);</div><div class='hunk'>@@ -218,16 +224,20 @@ static ssize_t serio_raw_write(struct file *file, const char __user *buffer,</div><div class='ctx'> 			retval = -EFAULT;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		if (serio_write(serio_raw-&gt;serio, c)) {</div><div class='del'>-			retval = -EIO;</div><div class='add'>+			/* Either signal error or partial write */</div><div class='add'>+			if (retval == 0)</div><div class='add'>+				retval = -EIO;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='del'>-		written++;</div><div class='add'>+</div><div class='add'>+		retval++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;serio_raw_mutex);</div><div class='del'>-	return written ?: retval;</div><div class='add'>+	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int serio_raw_poll(struct file *file, poll_table *wait)</div><div class='hunk'>@@ -432,15 +442,4 @@ static struct serio_driver serio_raw_drv = {</div><div class='ctx'> 	.manual_bind	= true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init serio_raw_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;serio_raw_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit serio_raw_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;serio_raw_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(serio_raw_init);</div><div class='del'>-module_exit(serio_raw_exit);</div><div class='add'>+module_serio_driver(serio_raw_drv);</div><div class='head'>diff --git a/drivers/input/serio/xilinx_ps2.c b/drivers/input/serio/xilinx_ps2.c<br/>index d96d4c2a76a9..1e983bec7d86 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/serio/xilinx_ps2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/serio/xilinx_ps2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/serio/xilinx_ps2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/serio/xilinx_ps2.c</a></div><div class='hunk'>@@ -73,7 +73,8 @@ struct xps2data {</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> 	void __iomem *base_address;	/* virt. address of control registers */</div><div class='ctx'> 	unsigned int flags;</div><div class='del'>-	struct serio serio;		/* serio */</div><div class='add'>+	struct serio *serio;		/* serio */</div><div class='add'>+	struct device *dev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /************************************/</div><div class='hunk'>@@ -119,7 +120,7 @@ static irqreturn_t xps2_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	/* Check which interrupt is active */</div><div class='ctx'> 	if (intr_sr &amp; XPS2_IPIXR_RX_OVF)</div><div class='del'>-		dev_warn(drvdata-&gt;serio.dev.parent, "receive overrun error\n");</div><div class='add'>+		dev_warn(drvdata-&gt;dev, "receive overrun error\n");</div><div class='ctx'> </div><div class='ctx'> 	if (intr_sr &amp; XPS2_IPIXR_RX_ERR)</div><div class='ctx'> 		drvdata-&gt;flags |= SERIO_PARITY;</div><div class='hunk'>@@ -132,10 +133,10 @@ static irqreturn_t xps2_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 		/* Error, if a byte is not received */</div><div class='ctx'> 		if (status) {</div><div class='del'>-			dev_err(drvdata-&gt;serio.dev.parent,</div><div class='add'>+			dev_err(drvdata-&gt;dev,</div><div class='ctx'> 				"wrong rcvd byte count (%d)\n", status);</div><div class='ctx'> 		} else {</div><div class='del'>-			serio_interrupt(&amp;drvdata-&gt;serio, c, drvdata-&gt;flags);</div><div class='add'>+			serio_interrupt(drvdata-&gt;serio, c, drvdata-&gt;flags);</div><div class='ctx'> 			drvdata-&gt;flags = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -193,7 +194,7 @@ static int sxps2_open(struct serio *pserio)</div><div class='ctx'> 	error = request_irq(drvdata-&gt;irq, &amp;xps2_interrupt, 0,</div><div class='ctx'> 				DRIVER_NAME, drvdata);</div><div class='ctx'> 	if (error) {</div><div class='del'>-		dev_err(drvdata-&gt;serio.dev.parent,</div><div class='add'>+		dev_err(drvdata-&gt;dev,</div><div class='ctx'> 			"Couldn't allocate interrupt %d\n", drvdata-&gt;irq);</div><div class='ctx'> 		return error;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -259,15 +260,16 @@ static int __devinit xps2_of_probe(struct platform_device *ofdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	drvdata = kzalloc(sizeof(struct xps2data), GFP_KERNEL);</div><div class='del'>-	if (!drvdata) {</div><div class='del'>-		dev_err(dev, "Couldn't allocate device private record\n");</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	serio = kzalloc(sizeof(struct serio), GFP_KERNEL);</div><div class='add'>+	if (!drvdata || !serio) {</div><div class='add'>+		error = -ENOMEM;</div><div class='add'>+		goto failed1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_set_drvdata(dev, drvdata);</div><div class='del'>-</div><div class='ctx'> 	spin_lock_init(&amp;drvdata-&gt;lock);</div><div class='ctx'> 	drvdata-&gt;irq = r_irq.start;</div><div class='add'>+	drvdata-&gt;serio = serio;</div><div class='add'>+	drvdata-&gt;dev = dev;</div><div class='ctx'> </div><div class='ctx'> 	phys_addr = r_mem.start;</div><div class='ctx'> 	remap_size = resource_size(&amp;r_mem);</div><div class='hunk'>@@ -298,7 +300,6 @@ static int __devinit xps2_of_probe(struct platform_device *ofdev)</div><div class='ctx'> 		 (unsigned long long)phys_addr, drvdata-&gt;base_address,</div><div class='ctx'> 		 drvdata-&gt;irq);</div><div class='ctx'> </div><div class='del'>-	serio = &amp;drvdata-&gt;serio;</div><div class='ctx'> 	serio-&gt;id.type = SERIO_8042;</div><div class='ctx'> 	serio-&gt;write = sxps2_write;</div><div class='ctx'> 	serio-&gt;open = sxps2_open;</div><div class='hunk'>@@ -312,13 +313,14 @@ static int __devinit xps2_of_probe(struct platform_device *ofdev)</div><div class='ctx'> </div><div class='ctx'> 	serio_register_port(serio);</div><div class='ctx'> </div><div class='add'>+	platform_set_drvdata(ofdev, drvdata);</div><div class='ctx'> 	return 0;		/* success */</div><div class='ctx'> </div><div class='ctx'> failed2:</div><div class='ctx'> 	release_mem_region(phys_addr, remap_size);</div><div class='ctx'> failed1:</div><div class='add'>+	kfree(serio);</div><div class='ctx'> 	kfree(drvdata);</div><div class='del'>-	dev_set_drvdata(dev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='hunk'>@@ -333,22 +335,21 @@ failed1:</div><div class='ctx'>  */</div><div class='ctx'> static int __devexit xps2_of_remove(struct platform_device *of_dev)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;of_dev-&gt;dev;</div><div class='del'>-	struct xps2data *drvdata = dev_get_drvdata(dev);</div><div class='add'>+	struct xps2data *drvdata = platform_get_drvdata(of_dev);</div><div class='ctx'> 	struct resource r_mem; /* IO mem resources */</div><div class='ctx'> </div><div class='del'>-	serio_unregister_port(&amp;drvdata-&gt;serio);</div><div class='add'>+	serio_unregister_port(drvdata-&gt;serio);</div><div class='ctx'> 	iounmap(drvdata-&gt;base_address);</div><div class='ctx'> </div><div class='ctx'> 	/* Get iospace of the device */</div><div class='ctx'> 	if (of_address_to_resource(of_dev-&gt;dev.of_node, 0, &amp;r_mem))</div><div class='del'>-		dev_err(dev, "invalid address\n");</div><div class='add'>+		dev_err(drvdata-&gt;dev, "invalid address\n");</div><div class='ctx'> 	else</div><div class='ctx'> 		release_mem_region(r_mem.start, resource_size(&amp;r_mem));</div><div class='ctx'> </div><div class='ctx'> 	kfree(drvdata);</div><div class='ctx'> </div><div class='del'>-	dev_set_drvdata(dev, NULL);</div><div class='add'>+	platform_set_drvdata(of_dev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/input/tablet/acecad.c b/drivers/input/tablet/acecad.c<br/>index f8b0b1df9138..e062ec899ca1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/tablet/acecad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/tablet/acecad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/tablet/acecad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/acecad.c</a></div><div class='hunk'>@@ -51,6 +51,7 @@ struct usb_acecad {</div><div class='ctx'> 	char name[128];</div><div class='ctx'> 	char phys[64];</div><div class='ctx'> 	struct usb_device *usbdev;</div><div class='add'>+	struct usb_interface *intf;</div><div class='ctx'> 	struct input_dev *input;</div><div class='ctx'> 	struct urb *irq;</div><div class='ctx'> </div><div class='hunk'>@@ -63,6 +64,7 @@ static void usb_acecad_irq(struct urb *urb)</div><div class='ctx'> 	struct usb_acecad *acecad = urb-&gt;context;</div><div class='ctx'> 	unsigned char *data = acecad-&gt;data;</div><div class='ctx'> 	struct input_dev *dev = acecad-&gt;input;</div><div class='add'>+	struct usb_interface *intf = acecad-&gt;intf;</div><div class='ctx'> 	int prox, status;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='hunk'>@@ -73,10 +75,12 @@ static void usb_acecad_irq(struct urb *urb)</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		/* this urb is terminated, clean up */</div><div class='del'>-		dbg("%s - urb shutting down with status: %d", __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "%s - urb shutting down with status: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='del'>-		dbg("%s - nonzero urb status received: %d", __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "%s - nonzero urb status received: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		goto resubmit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -105,8 +109,10 @@ static void usb_acecad_irq(struct urb *urb)</div><div class='ctx'> resubmit:</div><div class='ctx'> 	status = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (status)</div><div class='del'>-		err("can't resubmit intr, %s-%s/input0, status %d",</div><div class='del'>-			acecad-&gt;usbdev-&gt;bus-&gt;bus_name, acecad-&gt;usbdev-&gt;devpath, status);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"can't resubmit intr, %s-%s/input0, status %d\n",</div><div class='add'>+			acecad-&gt;usbdev-&gt;bus-&gt;bus_name,</div><div class='add'>+			acecad-&gt;usbdev-&gt;devpath, status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int usb_acecad_open(struct input_dev *dev)</div><div class='hunk'>@@ -168,6 +174,7 @@ static int usb_acecad_probe(struct usb_interface *intf, const struct usb_device_</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	acecad-&gt;usbdev = dev;</div><div class='add'>+	acecad-&gt;intf = intf;</div><div class='ctx'> 	acecad-&gt;input = input_dev;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;manufacturer)</div><div class='head'>diff --git a/drivers/input/tablet/aiptek.c b/drivers/input/tablet/aiptek.c<br/>index 205d16aab441..ee83c3904ee8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/tablet/aiptek.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/tablet/aiptek.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/tablet/aiptek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/aiptek.c</a></div><div class='hunk'>@@ -309,6 +309,7 @@ struct aiptek_settings {</div><div class='ctx'> struct aiptek {</div><div class='ctx'> 	struct input_dev *inputdev;		/* input device struct           */</div><div class='ctx'> 	struct usb_device *usbdev;		/* usb device struct             */</div><div class='add'>+	struct usb_interface *intf;		/* usb interface struct          */</div><div class='ctx'> 	struct urb *urb;			/* urb for incoming reports      */</div><div class='ctx'> 	dma_addr_t data_dma;			/* our dma stuffage              */</div><div class='ctx'> 	struct aiptek_features features;	/* tablet's array of features    */</div><div class='hunk'>@@ -435,6 +436,7 @@ static void aiptek_irq(struct urb *urb)</div><div class='ctx'> 	struct aiptek *aiptek = urb-&gt;context;</div><div class='ctx'> 	unsigned char *data = aiptek-&gt;data;</div><div class='ctx'> 	struct input_dev *inputdev = aiptek-&gt;inputdev;</div><div class='add'>+	struct usb_interface *intf = aiptek-&gt;intf;</div><div class='ctx'> 	int jitterable = 0;</div><div class='ctx'> 	int retval, macro, x, y, z, left, right, middle, p, dv, tip, bs, pck;</div><div class='ctx'> </div><div class='hunk'>@@ -447,13 +449,13 @@ static void aiptek_irq(struct urb *urb)</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		/* This urb is terminated, clean up */</div><div class='del'>-		dbg("%s - urb shutting down with status: %d",</div><div class='del'>-		    __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "%s - urb shutting down with status: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		dbg("%s - nonzero urb status received: %d",</div><div class='del'>-		    __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "%s - nonzero urb status received: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -785,7 +787,7 @@ static void aiptek_irq(struct urb *urb)</div><div class='ctx'> 				 1 | AIPTEK_REPORT_TOOL_UNKNOWN);</div><div class='ctx'> 		input_sync(inputdev);</div><div class='ctx'> 	} else {</div><div class='del'>-		dbg("Unknown report %d", data[0]);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "Unknown report %d\n", data[0]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Jitter may occur when the user presses a button on the stlyus</div><div class='hunk'>@@ -811,8 +813,9 @@ static void aiptek_irq(struct urb *urb)</div><div class='ctx'> exit:</div><div class='ctx'> 	retval = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (retval != 0) {</div><div class='del'>-		err("%s - usb_submit_urb failed with result %d",</div><div class='del'>-		    __func__, retval);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"%s - usb_submit_urb failed with result %d\n",</div><div class='add'>+			__func__, retval);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -912,8 +915,9 @@ aiptek_command(struct aiptek *aiptek, unsigned char command, unsigned char data)</div><div class='ctx'> </div><div class='ctx'> 	if ((ret =</div><div class='ctx'> 	     aiptek_set_report(aiptek, 3, 2, buf, sizeof_buf)) != sizeof_buf) {</div><div class='del'>-		dbg("aiptek_program: failed, tried to send: 0x%02x 0x%02x",</div><div class='del'>-		    command, data);</div><div class='add'>+		dev_dbg(&amp;aiptek-&gt;intf-&gt;dev,</div><div class='add'>+			"aiptek_program: failed, tried to send: 0x%02x 0x%02x\n",</div><div class='add'>+			command, data);</div><div class='ctx'> 	}</div><div class='ctx'> 	kfree(buf);</div><div class='ctx'> 	return ret &lt; 0 ? ret : 0;</div><div class='hunk'>@@ -947,8 +951,9 @@ aiptek_query(struct aiptek *aiptek, unsigned char command, unsigned char data)</div><div class='ctx'> </div><div class='ctx'> 	if ((ret =</div><div class='ctx'> 	     aiptek_get_report(aiptek, 3, 2, buf, sizeof_buf)) != sizeof_buf) {</div><div class='del'>-		dbg("aiptek_query failed: returned 0x%02x 0x%02x 0x%02x",</div><div class='del'>-		    buf[0], buf[1], buf[2]);</div><div class='add'>+		dev_dbg(&amp;aiptek-&gt;intf-&gt;dev,</div><div class='add'>+			"aiptek_query failed: returned 0x%02x 0x%02x 0x%02x\n",</div><div class='add'>+			buf[0], buf[1], buf[2]);</div><div class='ctx'> 		ret = -EIO;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ret = get_unaligned_le16(buf + 1);</div><div class='hunk'>@@ -1726,6 +1731,7 @@ aiptek_probe(struct usb_interface *intf, const struct usb_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	aiptek-&gt;inputdev = inputdev;</div><div class='ctx'> 	aiptek-&gt;usbdev = usbdev;</div><div class='add'>+	aiptek-&gt;intf = intf;</div><div class='ctx'> 	aiptek-&gt;ifnum = intf-&gt;altsetting[0].desc.bInterfaceNumber;</div><div class='ctx'> 	aiptek-&gt;inDelay = 0;</div><div class='ctx'> 	aiptek-&gt;endDelay = 0;</div><div class='hunk'>@@ -1856,7 +1862,7 @@ aiptek_probe(struct usb_interface *intf, const struct usb_device_id *id)</div><div class='ctx'> 	if (i == ARRAY_SIZE(speeds)) {</div><div class='ctx'> 		dev_info(&amp;intf-&gt;dev,</div><div class='ctx'> 			 "Aiptek tried all speeds, no sane response\n");</div><div class='del'>-		goto fail2;</div><div class='add'>+		goto fail3;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Associate this driver's struct with the usb interface.</div><div class='head'>diff --git a/drivers/input/tablet/gtco.c b/drivers/input/tablet/gtco.c<br/>index 89a297801dce..29e01ab6859f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/tablet/gtco.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/tablet/gtco.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/tablet/gtco.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/gtco.c</a></div><div class='hunk'>@@ -2,8 +2,6 @@</div><div class='ctx'> </div><div class='ctx'> GTCO digitizer USB driver</div><div class='ctx'> </div><div class='del'>-Use the err() and dbg() macros from usb.h for system logging</div><div class='del'>-</div><div class='ctx'> TO CHECK:  Is pressure done right on report 5?</div><div class='ctx'> </div><div class='ctx'> Copyright (C) 2006  GTCO CalComp</div><div class='hunk'>@@ -108,6 +106,7 @@ struct gtco {</div><div class='ctx'> </div><div class='ctx'> 	struct input_dev  *inputdevice; /* input device struct pointer  */</div><div class='ctx'> 	struct usb_device *usbdev; /* the usb device for this device */</div><div class='add'>+	struct usb_interface *intf;	/* the usb interface for this device */</div><div class='ctx'> 	struct urb        *urbinfo;	 /* urb for incoming reports      */</div><div class='ctx'> 	dma_addr_t        buf_dma;  /* dma addr of the data buffer*/</div><div class='ctx'> 	unsigned char *   buffer;   /* databuffer for reports */</div><div class='hunk'>@@ -202,6 +201,7 @@ struct hid_descriptor</div><div class='ctx'> static void parse_hid_report_descriptor(struct gtco *device, char * report,</div><div class='ctx'> 					int length)</div><div class='ctx'> {</div><div class='add'>+	struct device *ddev = &amp;device-&gt;intf-&gt;dev;</div><div class='ctx'> 	int   x, i = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Tag primitive vars */</div><div class='hunk'>@@ -228,7 +228,7 @@ static void parse_hid_report_descriptor(struct gtco *device, char * report,</div><div class='ctx'> 	char  indentstr[10] = "";</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	dbg("======&gt;&gt;&gt;&gt;&gt;&gt;PARSE&lt;&lt;&lt;&lt;&lt;&lt;======");</div><div class='add'>+	dev_dbg(ddev, "======&gt;&gt;&gt;&gt;&gt;&gt;PARSE&lt;&lt;&lt;&lt;&lt;&lt;======\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Walk  this report and pull out the info we need */</div><div class='ctx'> 	while (i &lt; length) {</div><div class='hunk'>@@ -277,11 +277,11 @@ static void parse_hid_report_descriptor(struct gtco *device, char * report,</div><div class='ctx'> 				else if (data == 3)</div><div class='ctx'> 					strcpy(globtype, "Var|Const");</div><div class='ctx'> </div><div class='del'>-				dbg("::::: Saving Report: %d input #%d Max: 0x%X(%d) Min:0x%X(%d) of %d bits",</div><div class='del'>-				    globalval[TAG_GLOB_REPORT_ID], inputnum,</div><div class='del'>-				    globalval[TAG_GLOB_LOG_MAX], globalval[TAG_GLOB_LOG_MAX],</div><div class='del'>-				    globalval[TAG_GLOB_LOG_MIN], globalval[TAG_GLOB_LOG_MIN],</div><div class='del'>-				    globalval[TAG_GLOB_REPORT_SZ] * globalval[TAG_GLOB_REPORT_CNT]);</div><div class='add'>+				dev_dbg(ddev, "::::: Saving Report: %d input #%d Max: 0x%X(%d) Min:0x%X(%d) of %d bits\n",</div><div class='add'>+					globalval[TAG_GLOB_REPORT_ID], inputnum,</div><div class='add'>+					globalval[TAG_GLOB_LOG_MAX], globalval[TAG_GLOB_LOG_MAX],</div><div class='add'>+					globalval[TAG_GLOB_LOG_MIN], globalval[TAG_GLOB_LOG_MIN],</div><div class='add'>+					globalval[TAG_GLOB_REPORT_SZ] * globalval[TAG_GLOB_REPORT_CNT]);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 				/*</div><div class='hunk'>@@ -292,7 +292,7 @@ static void parse_hid_report_descriptor(struct gtco *device, char * report,</div><div class='ctx'> 				 */</div><div class='ctx'> 				switch (inputnum) {</div><div class='ctx'> 				case 0:  /* X coord */</div><div class='del'>-					dbg("GER: X Usage: 0x%x", usage);</div><div class='add'>+					dev_dbg(ddev, "GER: X Usage: 0x%x\n", usage);</div><div class='ctx'> 					if (device-&gt;max_X == 0) {</div><div class='ctx'> 						device-&gt;max_X = globalval[TAG_GLOB_LOG_MAX];</div><div class='ctx'> 						device-&gt;min_X = globalval[TAG_GLOB_LOG_MIN];</div><div class='hunk'>@@ -300,7 +300,7 @@ static void parse_hid_report_descriptor(struct gtco *device, char * report,</div><div class='ctx'> 					break;</div><div class='ctx'> </div><div class='ctx'> 				case 1:  /* Y coord */</div><div class='del'>-					dbg("GER: Y Usage: 0x%x", usage);</div><div class='add'>+					dev_dbg(ddev, "GER: Y Usage: 0x%x\n", usage);</div><div class='ctx'> 					if (device-&gt;max_Y == 0) {</div><div class='ctx'> 						device-&gt;max_Y = globalval[TAG_GLOB_LOG_MAX];</div><div class='ctx'> 						device-&gt;min_Y = globalval[TAG_GLOB_LOG_MIN];</div><div class='hunk'>@@ -350,10 +350,10 @@ static void parse_hid_report_descriptor(struct gtco *device, char * report,</div><div class='ctx'> 				maintype = 'S';</div><div class='ctx'> </div><div class='ctx'> 				if (data == 0) {</div><div class='del'>-					dbg("======&gt;&gt;&gt;&gt;&gt;&gt; Physical");</div><div class='add'>+					dev_dbg(ddev, "======&gt;&gt;&gt;&gt;&gt;&gt; Physical\n");</div><div class='ctx'> 					strcpy(globtype, "Physical");</div><div class='ctx'> 				} else</div><div class='del'>-					dbg("======&gt;&gt;&gt;&gt;&gt;&gt;");</div><div class='add'>+					dev_dbg(ddev, "======&gt;&gt;&gt;&gt;&gt;&gt;\n");</div><div class='ctx'> </div><div class='ctx'> 				/* Indent the debug output */</div><div class='ctx'> 				indent++;</div><div class='hunk'>@@ -368,7 +368,7 @@ static void parse_hid_report_descriptor(struct gtco *device, char * report,</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			case TAG_MAIN_COL_END:</div><div class='del'>-				dbg("&lt;&lt;&lt;&lt;&lt;&lt;======");</div><div class='add'>+				dev_dbg(ddev, "&lt;&lt;&lt;&lt;&lt;&lt;======\n");</div><div class='ctx'> 				maintype = 'E';</div><div class='ctx'> 				indent--;</div><div class='ctx'> 				for (x = 0; x &lt; indent; x++)</div><div class='hunk'>@@ -384,18 +384,18 @@ static void parse_hid_report_descriptor(struct gtco *device, char * report,</div><div class='ctx'> </div><div class='ctx'> 			switch (size) {</div><div class='ctx'> 			case 1:</div><div class='del'>-				dbg("%sMAINTAG:(%d) %c SIZE: %d Data: %s 0x%x",</div><div class='del'>-				    indentstr, tag, maintype, size, globtype, data);</div><div class='add'>+				dev_dbg(ddev, "%sMAINTAG:(%d) %c SIZE: %d Data: %s 0x%x\n",</div><div class='add'>+					indentstr, tag, maintype, size, globtype, data);</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			case 2:</div><div class='del'>-				dbg("%sMAINTAG:(%d) %c SIZE: %d Data: %s 0x%x",</div><div class='del'>-				    indentstr, tag, maintype, size, globtype, data16);</div><div class='add'>+				dev_dbg(ddev, "%sMAINTAG:(%d) %c SIZE: %d Data: %s 0x%x\n",</div><div class='add'>+					indentstr, tag, maintype, size, globtype, data16);</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			case 4:</div><div class='del'>-				dbg("%sMAINTAG:(%d) %c SIZE: %d Data: %s 0x%x",</div><div class='del'>-				    indentstr, tag, maintype, size, globtype, data32);</div><div class='add'>+				dev_dbg(ddev, "%sMAINTAG:(%d) %c SIZE: %d Data: %s 0x%x\n",</div><div class='add'>+					indentstr, tag, maintype, size, globtype, data32);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -465,26 +465,26 @@ static void parse_hid_report_descriptor(struct gtco *device, char * report,</div><div class='ctx'> 			if (tag &lt; TAG_GLOB_MAX) {</div><div class='ctx'> 				switch (size) {</div><div class='ctx'> 				case 1:</div><div class='del'>-					dbg("%sGLOBALTAG:%s(%d) SIZE: %d Data: 0x%x",</div><div class='del'>-					    indentstr, globtype, tag, size, data);</div><div class='add'>+					dev_dbg(ddev, "%sGLOBALTAG:%s(%d) SIZE: %d Data: 0x%x\n",</div><div class='add'>+						indentstr, globtype, tag, size, data);</div><div class='ctx'> 					globalval[tag] = data;</div><div class='ctx'> 					break;</div><div class='ctx'> </div><div class='ctx'> 				case 2:</div><div class='del'>-					dbg("%sGLOBALTAG:%s(%d) SIZE: %d Data: 0x%x",</div><div class='del'>-					    indentstr, globtype, tag, size, data16);</div><div class='add'>+					dev_dbg(ddev, "%sGLOBALTAG:%s(%d) SIZE: %d Data: 0x%x\n",</div><div class='add'>+						indentstr, globtype, tag, size, data16);</div><div class='ctx'> 					globalval[tag] = data16;</div><div class='ctx'> 					break;</div><div class='ctx'> </div><div class='ctx'> 				case 4:</div><div class='del'>-					dbg("%sGLOBALTAG:%s(%d) SIZE: %d Data: 0x%x",</div><div class='del'>-					    indentstr, globtype, tag, size, data32);</div><div class='add'>+					dev_dbg(ddev, "%sGLOBALTAG:%s(%d) SIZE: %d Data: 0x%x\n",</div><div class='add'>+						indentstr, globtype, tag, size, data32);</div><div class='ctx'> 					globalval[tag] = data32;</div><div class='ctx'> 					break;</div><div class='ctx'> 				}</div><div class='ctx'> 			} else {</div><div class='del'>-				dbg("%sGLOBALTAG: ILLEGAL TAG:%d SIZE: %d ",</div><div class='del'>-				    indentstr, tag, size);</div><div class='add'>+				dev_dbg(ddev, "%sGLOBALTAG: ILLEGAL TAG:%d SIZE: %d\n",</div><div class='add'>+					indentstr, tag, size);</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -511,18 +511,18 @@ static void parse_hid_report_descriptor(struct gtco *device, char * report,</div><div class='ctx'> </div><div class='ctx'> 			switch (size) {</div><div class='ctx'> 			case 1:</div><div class='del'>-				dbg("%sLOCALTAG:(%d) %s SIZE: %d Data: 0x%x",</div><div class='del'>-				    indentstr, tag, globtype, size, data);</div><div class='add'>+				dev_dbg(ddev, "%sLOCALTAG:(%d) %s SIZE: %d Data: 0x%x\n",</div><div class='add'>+					indentstr, tag, globtype, size, data);</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			case 2:</div><div class='del'>-				dbg("%sLOCALTAG:(%d) %s SIZE: %d Data: 0x%x",</div><div class='del'>-				    indentstr, tag, globtype, size, data16);</div><div class='add'>+				dev_dbg(ddev, "%sLOCALTAG:(%d) %s SIZE: %d Data: 0x%x\n",</div><div class='add'>+					indentstr, tag, globtype, size, data16);</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			case 4:</div><div class='del'>-				dbg("%sLOCALTAG:(%d) %s SIZE: %d Data: 0x%x",</div><div class='del'>-				    indentstr, tag, globtype, size, data32);</div><div class='add'>+				dev_dbg(ddev, "%sLOCALTAG:(%d) %s SIZE: %d Data: 0x%x\n",</div><div class='add'>+					indentstr, tag, globtype, size, data32);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -714,8 +714,9 @@ static void gtco_urb_callback(struct urb *urbinfo)</div><div class='ctx'> 				 * the rest as 0</div><div class='ctx'> 				 */</div><div class='ctx'> 				val = device-&gt;buffer[5] &amp; MASK_BUTTON;</div><div class='del'>-				dbg("======&gt;&gt;&gt;&gt;&gt;&gt;REPORT 1: val 0x%X(%d)",</div><div class='del'>-				    val, val);</div><div class='add'>+				dev_dbg(&amp;device-&gt;intf-&gt;dev,</div><div class='add'>+					"======&gt;&gt;&gt;&gt;&gt;&gt;REPORT 1: val 0x%X(%d)\n",</div><div class='add'>+					val, val);</div><div class='ctx'> </div><div class='ctx'> 				/*</div><div class='ctx'> 				 * We don't apply any meaning to the button</div><div class='hunk'>@@ -808,7 +809,8 @@ static void gtco_urb_callback(struct urb *urbinfo)</div><div class='ctx'>  resubmit:</div><div class='ctx'> 	rc = usb_submit_urb(urbinfo, GFP_ATOMIC);</div><div class='ctx'> 	if (rc != 0)</div><div class='del'>-		err("usb_submit_urb failed rc=0x%x", rc);</div><div class='add'>+		dev_err(&amp;device-&gt;intf-&gt;dev,</div><div class='add'>+			"usb_submit_urb failed rc=0x%x\n", rc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -838,7 +840,7 @@ static int gtco_probe(struct usb_interface *usbinterface,</div><div class='ctx'> 	gtco = kzalloc(sizeof(struct gtco), GFP_KERNEL);</div><div class='ctx'> 	input_dev = input_allocate_device();</div><div class='ctx'> 	if (!gtco || !input_dev) {</div><div class='del'>-		err("No more memory");</div><div class='add'>+		dev_err(&amp;usbinterface-&gt;dev, "No more memory\n");</div><div class='ctx'> 		error = -ENOMEM;</div><div class='ctx'> 		goto err_free_devs;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -848,12 +850,13 @@ static int gtco_probe(struct usb_interface *usbinterface,</div><div class='ctx'> </div><div class='ctx'> 	/* Save interface information */</div><div class='ctx'> 	gtco-&gt;usbdev = usb_get_dev(interface_to_usbdev(usbinterface));</div><div class='add'>+	gtco-&gt;intf = usbinterface;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate some data for incoming reports */</div><div class='ctx'> 	gtco-&gt;buffer = usb_alloc_coherent(gtco-&gt;usbdev, REPORT_MAX_SIZE,</div><div class='ctx'> 					  GFP_KERNEL, &amp;gtco-&gt;buf_dma);</div><div class='ctx'> 	if (!gtco-&gt;buffer) {</div><div class='del'>-		err("No more memory for us buffers");</div><div class='add'>+		dev_err(&amp;usbinterface-&gt;dev, "No more memory for us buffers\n");</div><div class='ctx'> 		error = -ENOMEM;</div><div class='ctx'> 		goto err_free_devs;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -861,7 +864,7 @@ static int gtco_probe(struct usb_interface *usbinterface,</div><div class='ctx'> 	/* Allocate URB for reports */</div><div class='ctx'> 	gtco-&gt;urbinfo = usb_alloc_urb(0, GFP_KERNEL);</div><div class='ctx'> 	if (!gtco-&gt;urbinfo) {</div><div class='del'>-		err("Failed to allocate URB");</div><div class='add'>+		dev_err(&amp;usbinterface-&gt;dev, "Failed to allocate URB\n");</div><div class='ctx'> 		error = -ENOMEM;</div><div class='ctx'> 		goto err_free_buf;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -873,14 +876,14 @@ static int gtco_probe(struct usb_interface *usbinterface,</div><div class='ctx'> 	endpoint = &amp;usbinterface-&gt;altsetting[0].endpoint[0].desc;</div><div class='ctx'> </div><div class='ctx'> 	/* Some debug */</div><div class='del'>-	dbg("gtco # interfaces: %d", usbinterface-&gt;num_altsetting);</div><div class='del'>-	dbg("num endpoints:     %d", usbinterface-&gt;cur_altsetting-&gt;desc.bNumEndpoints);</div><div class='del'>-	dbg("interface class:   %d", usbinterface-&gt;cur_altsetting-&gt;desc.bInterfaceClass);</div><div class='del'>-	dbg("endpoint: attribute:0x%x type:0x%x", endpoint-&gt;bmAttributes, endpoint-&gt;bDescriptorType);</div><div class='add'>+	dev_dbg(&amp;usbinterface-&gt;dev, "gtco # interfaces: %d\n", usbinterface-&gt;num_altsetting);</div><div class='add'>+	dev_dbg(&amp;usbinterface-&gt;dev, "num endpoints:     %d\n", usbinterface-&gt;cur_altsetting-&gt;desc.bNumEndpoints);</div><div class='add'>+	dev_dbg(&amp;usbinterface-&gt;dev, "interface class:   %d\n", usbinterface-&gt;cur_altsetting-&gt;desc.bInterfaceClass);</div><div class='add'>+	dev_dbg(&amp;usbinterface-&gt;dev, "endpoint: attribute:0x%x type:0x%x\n", endpoint-&gt;bmAttributes, endpoint-&gt;bDescriptorType);</div><div class='ctx'> 	if (usb_endpoint_xfer_int(endpoint))</div><div class='del'>-		dbg("endpoint: we have interrupt endpoint\n");</div><div class='add'>+		dev_dbg(&amp;usbinterface-&gt;dev, "endpoint: we have interrupt endpoint\n");</div><div class='ctx'> </div><div class='del'>-	dbg("endpoint extra len:%d ", usbinterface-&gt;altsetting[0].extralen);</div><div class='add'>+	dev_dbg(&amp;usbinterface-&gt;dev, "endpoint extra len:%d\n", usbinterface-&gt;altsetting[0].extralen);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Find the HID descriptor so we can find out the size of the</div><div class='hunk'>@@ -888,17 +891,19 @@ static int gtco_probe(struct usb_interface *usbinterface,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (usb_get_extra_descriptor(usbinterface-&gt;cur_altsetting,</div><div class='ctx'> 				     HID_DEVICE_TYPE, &amp;hid_desc) != 0){</div><div class='del'>-		err("Can't retrieve exta USB descriptor to get hid report descriptor length");</div><div class='add'>+		dev_err(&amp;usbinterface-&gt;dev,</div><div class='add'>+			"Can't retrieve exta USB descriptor to get hid report descriptor length\n");</div><div class='ctx'> 		error = -EIO;</div><div class='ctx'> 		goto err_free_urb;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dbg("Extra descriptor success: type:%d  len:%d",</div><div class='del'>-	    hid_desc-&gt;bDescriptorType,  hid_desc-&gt;wDescriptorLength);</div><div class='add'>+	dev_dbg(&amp;usbinterface-&gt;dev,</div><div class='add'>+		"Extra descriptor success: type:%d  len:%d\n",</div><div class='add'>+		hid_desc-&gt;bDescriptorType,  hid_desc-&gt;wDescriptorLength);</div><div class='ctx'> </div><div class='ctx'> 	report = kzalloc(le16_to_cpu(hid_desc-&gt;wDescriptorLength), GFP_KERNEL);</div><div class='ctx'> 	if (!report) {</div><div class='del'>-		err("No more memory for report");</div><div class='add'>+		dev_err(&amp;usbinterface-&gt;dev, "No more memory for report\n");</div><div class='ctx'> 		error = -ENOMEM;</div><div class='ctx'> 		goto err_free_urb;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -915,7 +920,7 @@ static int gtco_probe(struct usb_interface *usbinterface,</div><div class='ctx'> 					 le16_to_cpu(hid_desc-&gt;wDescriptorLength),</div><div class='ctx'> 					 5000); /* 5 secs */</div><div class='ctx'> </div><div class='del'>-		dbg("usb_control_msg result: %d", result);</div><div class='add'>+		dev_dbg(&amp;usbinterface-&gt;dev, "usb_control_msg result: %d\n", result);</div><div class='ctx'> 		if (result == le16_to_cpu(hid_desc-&gt;wDescriptorLength)) {</div><div class='ctx'> 			parse_hid_report_descriptor(gtco, report, result);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -926,8 +931,9 @@ static int gtco_probe(struct usb_interface *usbinterface,</div><div class='ctx'> </div><div class='ctx'> 	/* If we didn't get the report, fail */</div><div class='ctx'> 	if (result != le16_to_cpu(hid_desc-&gt;wDescriptorLength)) {</div><div class='del'>-		err("Failed to get HID Report Descriptor of size: %d",</div><div class='del'>-		    hid_desc-&gt;wDescriptorLength);</div><div class='add'>+		dev_err(&amp;usbinterface-&gt;dev,</div><div class='add'>+			"Failed to get HID Report Descriptor of size: %d\n",</div><div class='add'>+			hid_desc-&gt;wDescriptorLength);</div><div class='ctx'> 		error = -EIO;</div><div class='ctx'> 		goto err_free_urb;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/input/tablet/kbtab.c b/drivers/input/tablet/kbtab.c<br/>index 85a5b40333ac..3fba74b9b602 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/tablet/kbtab.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/tablet/kbtab.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/tablet/kbtab.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/kbtab.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@ struct kbtab {</div><div class='ctx'> 	dma_addr_t data_dma;</div><div class='ctx'> 	struct input_dev *dev;</div><div class='ctx'> 	struct usb_device *usbdev;</div><div class='add'>+	struct usb_interface *intf;</div><div class='ctx'> 	struct urb *irq;</div><div class='ctx'> 	char phys[32];</div><div class='ctx'> };</div><div class='hunk'>@@ -53,10 +54,14 @@ static void kbtab_irq(struct urb *urb)</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		/* this urb is terminated, clean up */</div><div class='del'>-		dbg("%s - urb shutting down with status: %d", __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;kbtab-&gt;intf-&gt;dev,</div><div class='add'>+			"%s - urb shutting down with status: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='del'>-		dbg("%s - nonzero urb status received: %d", __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(&amp;kbtab-&gt;intf-&gt;dev,</div><div class='add'>+			"%s - nonzero urb status received: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -80,8 +85,9 @@ static void kbtab_irq(struct urb *urb)</div><div class='ctx'>  exit:</div><div class='ctx'> 	retval = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		err("%s - usb_submit_urb failed with result %d",</div><div class='del'>-		     __func__, retval);</div><div class='add'>+		dev_err(&amp;kbtab-&gt;intf-&gt;dev,</div><div class='add'>+			"%s - usb_submit_urb failed with result %d\n",</div><div class='add'>+			__func__, retval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct usb_device_id kbtab_ids[] = {</div><div class='hunk'>@@ -131,6 +137,7 @@ static int kbtab_probe(struct usb_interface *intf, const struct usb_device_id *i</div><div class='ctx'> 		goto fail2;</div><div class='ctx'> </div><div class='ctx'> 	kbtab-&gt;usbdev = dev;</div><div class='add'>+	kbtab-&gt;intf = intf;</div><div class='ctx'> 	kbtab-&gt;dev = input_dev;</div><div class='ctx'> </div><div class='ctx'> 	usb_make_path(dev, kbtab-&gt;phys, sizeof(kbtab-&gt;phys));</div><div class='head'>diff --git a/drivers/input/tablet/wacom.h b/drivers/input/tablet/wacom.h<br/>index b4842d0e61dd..b79d45198d82 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/tablet/wacom.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/tablet/wacom.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/tablet/wacom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/wacom.h</a></div><div class='hunk'>@@ -135,6 +135,6 @@ extern const struct usb_device_id wacom_ids[];</div><div class='ctx'> </div><div class='ctx'> void wacom_wac_irq(struct wacom_wac *wacom_wac, size_t len);</div><div class='ctx'> void wacom_setup_device_quirks(struct wacom_features *features);</div><div class='del'>-void wacom_setup_input_capabilities(struct input_dev *input_dev,</div><div class='del'>-				    struct wacom_wac *wacom_wac);</div><div class='add'>+int wacom_setup_input_capabilities(struct input_dev *input_dev,</div><div class='add'>+				   struct wacom_wac *wacom_wac);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c<br/>index 0d269212931e..cad5602d3ce4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/tablet/wacom_sys.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/tablet/wacom_sys.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/tablet/wacom_sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/wacom_sys.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #define HID_USAGE_Y_TILT		0x3e</div><div class='ctx'> #define HID_USAGE_FINGER		0x22</div><div class='ctx'> #define HID_USAGE_STYLUS		0x20</div><div class='add'>+#define HID_USAGE_CONTACTMAX		0x55</div><div class='ctx'> #define HID_COLLECTION			0xa1</div><div class='ctx'> #define HID_COLLECTION_LOGICAL		0x02</div><div class='ctx'> #define HID_COLLECTION_END		0xc0</div><div class='hunk'>@@ -99,6 +100,7 @@ static int wacom_set_report(struct usb_interface *intf, u8 type, u8 id,</div><div class='ctx'> static void wacom_sys_irq(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct wacom *wacom = urb-&gt;context;</div><div class='add'>+	struct device *dev = &amp;wacom-&gt;intf-&gt;dev;</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='hunk'>@@ -109,10 +111,12 @@ static void wacom_sys_irq(struct urb *urb)</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		/* this urb is terminated, clean up */</div><div class='del'>-		dbg("%s - urb shutting down with status: %d", __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(dev, "%s - urb shutting down with status: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='del'>-		dbg("%s - nonzero urb status received: %d", __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(dev, "%s - nonzero urb status received: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -122,8 +126,8 @@ static void wacom_sys_irq(struct urb *urb)</div><div class='ctx'> 	usb_mark_last_busy(wacom-&gt;usbdev);</div><div class='ctx'> 	retval = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		err ("%s - usb_submit_urb failed with result %d",</div><div class='del'>-		     __func__, retval);</div><div class='add'>+		dev_err(dev, "%s - usb_submit_urb failed with result %d\n",</div><div class='add'>+			__func__, retval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int wacom_open(struct input_dev *dev)</div><div class='hunk'>@@ -201,6 +205,27 @@ static int wacom_parse_logical_collection(unsigned char *report,</div><div class='ctx'> 	return length;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void wacom_retrieve_report_data(struct usb_interface *intf,</div><div class='add'>+				       struct wacom_features *features)</div><div class='add'>+{</div><div class='add'>+	int result = 0;</div><div class='add'>+	unsigned char *rep_data;</div><div class='add'>+</div><div class='add'>+	rep_data = kmalloc(2, GFP_KERNEL);</div><div class='add'>+	if (rep_data) {</div><div class='add'>+</div><div class='add'>+		rep_data[0] = 12;</div><div class='add'>+		result = wacom_get_report(intf, WAC_HID_FEATURE_REPORT,</div><div class='add'>+					  rep_data[0], &amp;rep_data, 2,</div><div class='add'>+					  WAC_MSG_RETRIES);</div><div class='add'>+</div><div class='add'>+		if (result &gt;= 0 &amp;&amp; rep_data[1] &gt; 2)</div><div class='add'>+			features-&gt;touch_max = rep_data[1];</div><div class='add'>+</div><div class='add'>+		kfree(rep_data);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Interface Descriptor of wacom devices can be incomplete and</div><div class='ctx'>  * inconsistent so wacom_features table is used to store stylus</div><div class='hunk'>@@ -233,6 +258,9 @@ static int wacom_parse_logical_collection(unsigned char *report,</div><div class='ctx'>  * 3rd gen Bamboo Touch no longer define a Digitizer-Finger Pysical</div><div class='ctx'>  * Collection. Instead they define a Logical Collection with a single</div><div class='ctx'>  * Logical Maximum for both X and Y.</div><div class='add'>+ *</div><div class='add'>+ * Intuos5 touch interface does not contain useful data. We deal with</div><div class='add'>+ * this after returning from this function.</div><div class='ctx'>  */</div><div class='ctx'> static int wacom_parse_hid(struct usb_interface *intf,</div><div class='ctx'> 			   struct hid_descriptor *hid_desc,</div><div class='hunk'>@@ -292,6 +320,10 @@ static int wacom_parse_hid(struct usb_interface *intf,</div><div class='ctx'> 							/* need to reset back */</div><div class='ctx'> 							features-&gt;pktlen = WACOM_PKGLEN_TPC2FG;</div><div class='ctx'> 						}</div><div class='add'>+</div><div class='add'>+						if (features-&gt;type == MTSCREEN)</div><div class='add'>+							features-&gt;pktlen = WACOM_PKGLEN_MTOUCH;</div><div class='add'>+</div><div class='ctx'> 						if (features-&gt;type == BAMBOO_PT) {</div><div class='ctx'> 							/* need to reset back */</div><div class='ctx'> 							features-&gt;pktlen = WACOM_PKGLEN_BBTOUCH;</div><div class='hunk'>@@ -324,18 +356,15 @@ static int wacom_parse_hid(struct usb_interface *intf,</div><div class='ctx'> 			case HID_USAGE_Y:</div><div class='ctx'> 				if (usage == WCM_DESKTOP) {</div><div class='ctx'> 					if (finger) {</div><div class='del'>-						features-&gt;device_type = BTN_TOOL_FINGER;</div><div class='del'>-						if (features-&gt;type == TABLETPC2FG) {</div><div class='del'>-							/* need to reset back */</div><div class='del'>-							features-&gt;pktlen = WACOM_PKGLEN_TPC2FG;</div><div class='add'>+						int type = features-&gt;type;</div><div class='add'>+</div><div class='add'>+						if (type == TABLETPC2FG || type == MTSCREEN) {</div><div class='ctx'> 							features-&gt;y_max =</div><div class='ctx'> 								get_unaligned_le16(&amp;report[i + 3]);</div><div class='ctx'> 							features-&gt;y_phy =</div><div class='ctx'> 								get_unaligned_le16(&amp;report[i + 6]);</div><div class='ctx'> 							i += 7;</div><div class='del'>-						} else if (features-&gt;type == BAMBOO_PT) {</div><div class='del'>-							/* need to reset back */</div><div class='del'>-							features-&gt;pktlen = WACOM_PKGLEN_BBTOUCH;</div><div class='add'>+						} else if (type == BAMBOO_PT) {</div><div class='ctx'> 							features-&gt;y_phy =</div><div class='ctx'> 								get_unaligned_le16(&amp;report[i + 3]);</div><div class='ctx'> 							features-&gt;y_max =</div><div class='hunk'>@@ -349,10 +378,6 @@ static int wacom_parse_hid(struct usb_interface *intf,</div><div class='ctx'> 							i += 4;</div><div class='ctx'> 						}</div><div class='ctx'> 					} else if (pen) {</div><div class='del'>-						/* penabled only accepts exact bytes of data */</div><div class='del'>-						if (features-&gt;type == TABLETPC2FG)</div><div class='del'>-							features-&gt;pktlen = WACOM_PKGLEN_GRAPHIRE;</div><div class='del'>-						features-&gt;device_type = BTN_TOOL_PEN;</div><div class='ctx'> 						features-&gt;y_max =</div><div class='ctx'> 							get_unaligned_le16(&amp;report[i + 3]);</div><div class='ctx'> 						i += 4;</div><div class='hunk'>@@ -374,6 +399,11 @@ static int wacom_parse_hid(struct usb_interface *intf,</div><div class='ctx'> 				pen = 1;</div><div class='ctx'> 				i++;</div><div class='ctx'> 				break;</div><div class='add'>+</div><div class='add'>+			case HID_USAGE_CONTACTMAX:</div><div class='add'>+				wacom_retrieve_report_data(intf, features);</div><div class='add'>+				i++;</div><div class='add'>+				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -410,22 +440,29 @@ static int wacom_query_tablet_data(struct usb_interface *intf, struct wacom_feat</div><div class='ctx'> 	if (!rep_data)</div><div class='ctx'> 		return error;</div><div class='ctx'> </div><div class='del'>-	/* ask to report tablet data if it is MT Tablet PC or</div><div class='del'>-	 * not a Tablet PC */</div><div class='del'>-	if (features-&gt;type == TABLETPC2FG) {</div><div class='del'>-		do {</div><div class='del'>-			rep_data[0] = 3;</div><div class='del'>-			rep_data[1] = 4;</div><div class='del'>-			rep_data[2] = 0;</div><div class='del'>-			rep_data[3] = 0;</div><div class='del'>-			report_id = 3;</div><div class='del'>-			error = wacom_set_report(intf, WAC_HID_FEATURE_REPORT,</div><div class='del'>-						 report_id, rep_data, 4, 1);</div><div class='del'>-			if (error &gt;= 0)</div><div class='del'>-				error = wacom_get_report(intf,</div><div class='del'>-						WAC_HID_FEATURE_REPORT,</div><div class='del'>-						report_id, rep_data, 4, 1);</div><div class='del'>-		} while ((error &lt; 0 || rep_data[1] != 4) &amp;&amp; limit++ &lt; WAC_MSG_RETRIES);</div><div class='add'>+	/* ask to report Wacom data */</div><div class='add'>+	if (features-&gt;device_type == BTN_TOOL_FINGER) {</div><div class='add'>+		/* if it is an MT Tablet PC touch */</div><div class='add'>+		if (features-&gt;type == TABLETPC2FG ||</div><div class='add'>+		    features-&gt;type == MTSCREEN) {</div><div class='add'>+			do {</div><div class='add'>+				rep_data[0] = 3;</div><div class='add'>+				rep_data[1] = 4;</div><div class='add'>+				rep_data[2] = 0;</div><div class='add'>+				rep_data[3] = 0;</div><div class='add'>+				report_id = 3;</div><div class='add'>+				error = wacom_set_report(intf,</div><div class='add'>+							 WAC_HID_FEATURE_REPORT,</div><div class='add'>+							 report_id,</div><div class='add'>+							 rep_data, 4, 1);</div><div class='add'>+				if (error &gt;= 0)</div><div class='add'>+					error = wacom_get_report(intf,</div><div class='add'>+							WAC_HID_FEATURE_REPORT,</div><div class='add'>+							report_id,</div><div class='add'>+							rep_data, 4, 1);</div><div class='add'>+			} while ((error &lt; 0 || rep_data[1] != 4) &amp;&amp;</div><div class='add'>+				 limit++ &lt; WAC_MSG_RETRIES);</div><div class='add'>+		}</div><div class='ctx'> 	} else if (features-&gt;type != TABLETPC &amp;&amp;</div><div class='ctx'> 		   features-&gt;type != WIRELESS &amp;&amp;</div><div class='ctx'> 		   features-&gt;device_type == BTN_TOOL_PEN) {</div><div class='hunk'>@@ -447,7 +484,7 @@ static int wacom_query_tablet_data(struct usb_interface *intf, struct wacom_feat</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int wacom_retrieve_hid_descriptor(struct usb_interface *intf,</div><div class='del'>-		struct wacom_features *features)</div><div class='add'>+					 struct wacom_features *features)</div><div class='ctx'> {</div><div class='ctx'> 	int error = 0;</div><div class='ctx'> 	struct usb_host_interface *interface = intf-&gt;cur_altsetting;</div><div class='hunk'>@@ -475,16 +512,21 @@ static int wacom_retrieve_hid_descriptor(struct usb_interface *intf,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* only Tablet PCs and Bamboo P&amp;T need to retrieve the info */</div><div class='del'>-	if ((features-&gt;type != TABLETPC) &amp;&amp; (features-&gt;type != TABLETPC2FG) &amp;&amp;</div><div class='del'>-	    (features-&gt;type != BAMBOO_PT))</div><div class='add'>+	/* only devices that support touch need to retrieve the info */</div><div class='add'>+	if (features-&gt;type != TABLETPC &amp;&amp;</div><div class='add'>+	    features-&gt;type != TABLETPC2FG &amp;&amp;</div><div class='add'>+	    features-&gt;type != BAMBOO_PT &amp;&amp;</div><div class='add'>+	    features-&gt;type != MTSCREEN) {</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (usb_get_extra_descriptor(interface, HID_DEVICET_HID, &amp;hid_desc)) {</div><div class='del'>-		if (usb_get_extra_descriptor(&amp;interface-&gt;endpoint[0],</div><div class='del'>-				HID_DEVICET_REPORT, &amp;hid_desc)) {</div><div class='del'>-			printk("wacom: can not retrieve extra class descriptor\n");</div><div class='del'>-			error = 1;</div><div class='add'>+	error = usb_get_extra_descriptor(interface, HID_DEVICET_HID, &amp;hid_desc);</div><div class='add'>+	if (error) {</div><div class='add'>+		error = usb_get_extra_descriptor(&amp;interface-&gt;endpoint[0],</div><div class='add'>+						 HID_DEVICET_REPORT, &amp;hid_desc);</div><div class='add'>+		if (error) {</div><div class='add'>+			dev_err(&amp;intf-&gt;dev,</div><div class='add'>+				"can not retrieve extra class descriptor\n");</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -574,23 +616,39 @@ static void wacom_remove_shared_data(struct wacom_wac *wacom)</div><div class='ctx'> static int wacom_led_control(struct wacom *wacom)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char *buf;</div><div class='del'>-	int retval, led = 0;</div><div class='add'>+	int retval;</div><div class='ctx'> </div><div class='ctx'> 	buf = kzalloc(9, GFP_KERNEL);</div><div class='ctx'> 	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (wacom-&gt;wacom_wac.features.type == WACOM_21UX2 ||</div><div class='del'>-	    wacom-&gt;wacom_wac.features.type == WACOM_24HD)</div><div class='del'>-		led = (wacom-&gt;led.select[1] &lt;&lt; 4) | 0x40;</div><div class='del'>-</div><div class='del'>-	led |=  wacom-&gt;led.select[0] | 0x4;</div><div class='del'>-</div><div class='del'>-	buf[0] = WAC_CMD_LED_CONTROL;</div><div class='del'>-	buf[1] = led;</div><div class='del'>-	buf[2] = wacom-&gt;led.llv;</div><div class='del'>-	buf[3] = wacom-&gt;led.hlv;</div><div class='del'>-	buf[4] = wacom-&gt;led.img_lum;</div><div class='add'>+	if (wacom-&gt;wacom_wac.features.type &gt;= INTUOS5S &amp;&amp;</div><div class='add'>+	    wacom-&gt;wacom_wac.features.type &lt;= INTUOS5L)	{</div><div class='add'>+		/*</div><div class='add'>+		 * Touch Ring and crop mark LED luminance may take on</div><div class='add'>+		 * one of four values:</div><div class='add'>+		 *    0 = Low; 1 = Medium; 2 = High; 3 = Off</div><div class='add'>+		 */</div><div class='add'>+		int ring_led = wacom-&gt;led.select[0] &amp; 0x03;</div><div class='add'>+		int ring_lum = (((wacom-&gt;led.llv &amp; 0x60) &gt;&gt; 5) - 1) &amp; 0x03;</div><div class='add'>+		int crop_lum = 0;</div><div class='add'>+</div><div class='add'>+		buf[0] = WAC_CMD_LED_CONTROL;</div><div class='add'>+		buf[1] = (crop_lum &lt;&lt; 4) | (ring_lum &lt;&lt; 2) | (ring_led);</div><div class='add'>+	}</div><div class='add'>+	else {</div><div class='add'>+		int led = wacom-&gt;led.select[0] | 0x4;</div><div class='add'>+</div><div class='add'>+		if (wacom-&gt;wacom_wac.features.type == WACOM_21UX2 ||</div><div class='add'>+		    wacom-&gt;wacom_wac.features.type == WACOM_24HD)</div><div class='add'>+			led |= (wacom-&gt;led.select[1] &lt;&lt; 4) | 0x40;</div><div class='add'>+</div><div class='add'>+		buf[0] = WAC_CMD_LED_CONTROL;</div><div class='add'>+		buf[1] = led;</div><div class='add'>+		buf[2] = wacom-&gt;led.llv;</div><div class='add'>+		buf[3] = wacom-&gt;led.hlv;</div><div class='add'>+		buf[4] = wacom-&gt;led.img_lum;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	retval = wacom_set_report(wacom-&gt;intf, 0x03, WAC_CMD_LED_CONTROL,</div><div class='ctx'> 				  buf, 9, WAC_CMD_RETRIES);</div><div class='hunk'>@@ -783,6 +841,17 @@ static struct attribute_group intuos4_led_attr_group = {</div><div class='ctx'> 	.attrs = intuos4_led_attrs,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct attribute *intuos5_led_attrs[] = {</div><div class='add'>+	&amp;dev_attr_status0_luminance.attr,</div><div class='add'>+	&amp;dev_attr_status_led0_select.attr,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute_group intuos5_led_attr_group = {</div><div class='add'>+	.name = "wacom_led",</div><div class='add'>+	.attrs = intuos5_led_attrs,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int wacom_initialize_leds(struct wacom *wacom)</div><div class='ctx'> {</div><div class='ctx'> 	int error;</div><div class='hunk'>@@ -812,6 +881,19 @@ static int wacom_initialize_leds(struct wacom *wacom)</div><div class='ctx'> 					   &amp;cintiq_led_attr_group);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case INTUOS5S:</div><div class='add'>+	case INTUOS5:</div><div class='add'>+	case INTUOS5L:</div><div class='add'>+		wacom-&gt;led.select[0] = 0;</div><div class='add'>+		wacom-&gt;led.select[1] = 0;</div><div class='add'>+		wacom-&gt;led.llv = 32;</div><div class='add'>+		wacom-&gt;led.hlv = 0;</div><div class='add'>+		wacom-&gt;led.img_lum = 0;</div><div class='add'>+</div><div class='add'>+		error = sysfs_create_group(&amp;wacom-&gt;intf-&gt;dev.kobj,</div><div class='add'>+					   &amp;intuos5_led_attr_group);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -840,6 +922,13 @@ static void wacom_destroy_leds(struct wacom *wacom)</div><div class='ctx'> 		sysfs_remove_group(&amp;wacom-&gt;intf-&gt;dev.kobj,</div><div class='ctx'> 				   &amp;cintiq_led_attr_group);</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	case INTUOS5S:</div><div class='add'>+	case INTUOS5:</div><div class='add'>+	case INTUOS5L:</div><div class='add'>+		sysfs_remove_group(&amp;wacom-&gt;intf-&gt;dev.kobj,</div><div class='add'>+				   &amp;intuos5_led_attr_group);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -901,8 +990,10 @@ static int wacom_register_input(struct wacom *wacom)</div><div class='ctx'> 	int error;</div><div class='ctx'> </div><div class='ctx'> 	input_dev = input_allocate_device();</div><div class='del'>-	if (!input_dev)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (!input_dev) {</div><div class='add'>+		error = -ENOMEM;</div><div class='add'>+		goto fail1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	input_dev-&gt;name = wacom_wac-&gt;name;</div><div class='ctx'> 	input_dev-&gt;dev.parent = &amp;intf-&gt;dev;</div><div class='hunk'>@@ -912,14 +1003,20 @@ static int wacom_register_input(struct wacom *wacom)</div><div class='ctx'> 	input_set_drvdata(input_dev, wacom);</div><div class='ctx'> </div><div class='ctx'> 	wacom_wac-&gt;input = input_dev;</div><div class='del'>-	wacom_setup_input_capabilities(input_dev, wacom_wac);</div><div class='add'>+	error = wacom_setup_input_capabilities(input_dev, wacom_wac);</div><div class='add'>+	if (error)</div><div class='add'>+		goto fail1;</div><div class='ctx'> </div><div class='ctx'> 	error = input_register_device(input_dev);</div><div class='del'>-	if (error) {</div><div class='del'>-		input_free_device(input_dev);</div><div class='del'>-		wacom_wac-&gt;input = NULL;</div><div class='del'>-	}</div><div class='add'>+	if (error)</div><div class='add'>+		goto fail2;</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+fail2:</div><div class='add'>+	input_free_device(input_dev);</div><div class='add'>+	wacom_wac-&gt;input = NULL;</div><div class='add'>+fail1:</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -938,22 +1035,22 @@ static void wacom_wireless_work(struct work_struct *work)</div><div class='ctx'> 	wacom = usb_get_intfdata(usbdev-&gt;config-&gt;interface[1]);</div><div class='ctx'> 	if (wacom-&gt;wacom_wac.input)</div><div class='ctx'> 		input_unregister_device(wacom-&gt;wacom_wac.input);</div><div class='del'>-	wacom-&gt;wacom_wac.input = 0;</div><div class='add'>+	wacom-&gt;wacom_wac.input = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* Touch interface */</div><div class='ctx'> 	wacom = usb_get_intfdata(usbdev-&gt;config-&gt;interface[2]);</div><div class='ctx'> 	if (wacom-&gt;wacom_wac.input)</div><div class='ctx'> 		input_unregister_device(wacom-&gt;wacom_wac.input);</div><div class='del'>-	wacom-&gt;wacom_wac.input = 0;</div><div class='add'>+	wacom-&gt;wacom_wac.input = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (wacom_wac-&gt;pid == 0) {</div><div class='del'>-		printk(KERN_INFO "wacom: wireless tablet disconnected\n");</div><div class='add'>+		dev_info(&amp;wacom-&gt;intf-&gt;dev, "wireless tablet disconnected\n");</div><div class='ctx'> 	} else {</div><div class='ctx'> 		const struct usb_device_id *id = wacom_ids;</div><div class='ctx'> </div><div class='del'>-		printk(KERN_INFO</div><div class='del'>-		       "wacom: wireless tablet connected with PID %x\n",</div><div class='del'>-		       wacom_wac-&gt;pid);</div><div class='add'>+		dev_info(&amp;wacom-&gt;intf-&gt;dev,</div><div class='add'>+			 "wireless tablet connected with PID %x\n",</div><div class='add'>+			 wacom_wac-&gt;pid);</div><div class='ctx'> </div><div class='ctx'> 		while (id-&gt;match_flags) {</div><div class='ctx'> 			if (id-&gt;idVendor == USB_VENDOR_ID_WACOM &amp;&amp;</div><div class='hunk'>@@ -963,8 +1060,8 @@ static void wacom_wireless_work(struct work_struct *work)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!id-&gt;match_flags) {</div><div class='del'>-			printk(KERN_INFO</div><div class='del'>-			       "wacom: ignorning unknown PID.\n");</div><div class='add'>+			dev_info(&amp;wacom-&gt;intf-&gt;dev,</div><div class='add'>+				 "ignoring unknown PID.\n");</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1035,11 +1132,33 @@ static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *i</div><div class='ctx'> </div><div class='ctx'> 	endpoint = &amp;intf-&gt;cur_altsetting-&gt;endpoint[0].desc;</div><div class='ctx'> </div><div class='del'>-	/* Retrieve the physical and logical size for OEM devices */</div><div class='add'>+	/* Retrieve the physical and logical size for touch devices */</div><div class='ctx'> 	error = wacom_retrieve_hid_descriptor(intf, features);</div><div class='ctx'> 	if (error)</div><div class='ctx'> 		goto fail3;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Intuos5 has no useful data about its touch interface in its</div><div class='add'>+	 * HID descriptor. If this is the touch interface (wMaxPacketSize</div><div class='add'>+	 * of WACOM_PKGLEN_BBTOUCH3), override the table values.</div><div class='add'>+	 */</div><div class='add'>+	if (features-&gt;type &gt;= INTUOS5S &amp;&amp; features-&gt;type &lt;= INTUOS5L) {</div><div class='add'>+		if (endpoint-&gt;wMaxPacketSize == WACOM_PKGLEN_BBTOUCH3) {</div><div class='add'>+			features-&gt;device_type = BTN_TOOL_FINGER;</div><div class='add'>+			features-&gt;pktlen = WACOM_PKGLEN_BBTOUCH3;</div><div class='add'>+</div><div class='add'>+			features-&gt;x_phy =</div><div class='add'>+				(features-&gt;x_max * 100) / features-&gt;x_resolution;</div><div class='add'>+			features-&gt;y_phy =</div><div class='add'>+				(features-&gt;y_max * 100) / features-&gt;y_resolution;</div><div class='add'>+</div><div class='add'>+			features-&gt;x_max = 4096;</div><div class='add'>+			features-&gt;y_max = 4096;</div><div class='add'>+		} else {</div><div class='add'>+			features-&gt;device_type = BTN_TOOL_PEN;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	wacom_setup_device_quirks(features);</div><div class='ctx'> </div><div class='ctx'> 	strlcpy(wacom_wac-&gt;name, features-&gt;name, sizeof(wacom_wac-&gt;name));</div><div class='head'>diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c<br/>index cecd35c8f0b3..004bc1bb1544 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/tablet/wacom_wac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/tablet/wacom_wac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/tablet/wacom_wac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/wacom_wac.c</a></div><div class='hunk'>@@ -61,7 +61,8 @@ static int wacom_penpartner_irq(struct wacom_wac *wacom)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		printk(KERN_INFO "wacom_penpartner_irq: received unknown report #%d\n", data[0]);</div><div class='add'>+		dev_dbg(input-&gt;dev.parent,</div><div class='add'>+			"%s: received unknown report #%d\n", __func__, data[0]);</div><div class='ctx'> 		return 0;</div><div class='ctx'>         }</div><div class='ctx'> </div><div class='hunk'>@@ -76,7 +77,8 @@ static int wacom_pl_irq(struct wacom_wac *wacom)</div><div class='ctx'> 	int prox, pressure;</div><div class='ctx'> </div><div class='ctx'> 	if (data[0] != WACOM_REPORT_PENABLED) {</div><div class='del'>-		dbg("wacom_pl_irq: received unknown report #%d", data[0]);</div><div class='add'>+		dev_dbg(input-&gt;dev.parent,</div><div class='add'>+			"%s: received unknown report #%d\n", __func__, data[0]);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -146,7 +148,8 @@ static int wacom_ptu_irq(struct wacom_wac *wacom)</div><div class='ctx'> 	struct input_dev *input = wacom-&gt;input;</div><div class='ctx'> </div><div class='ctx'> 	if (data[0] != WACOM_REPORT_PENABLED) {</div><div class='del'>-		printk(KERN_INFO "wacom_ptu_irq: received unknown report #%d\n", data[0]);</div><div class='add'>+		dev_dbg(input-&gt;dev.parent,</div><div class='add'>+			"%s: received unknown report #%d\n", __func__, data[0]);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -175,7 +178,8 @@ static int wacom_dtu_irq(struct wacom_wac *wacom)</div><div class='ctx'> 	struct input_dev *input = wacom-&gt;input;</div><div class='ctx'> 	int prox = data[1] &amp; 0x20, pressure;</div><div class='ctx'> </div><div class='del'>-	dbg("wacom_dtu_irq: received report #%d", data[0]);</div><div class='add'>+	dev_dbg(input-&gt;dev.parent,</div><div class='add'>+		"%s: received report #%d", __func__, data[0]);</div><div class='ctx'> </div><div class='ctx'> 	if (prox) {</div><div class='ctx'> 		/* Going into proximity select tool */</div><div class='hunk'>@@ -211,7 +215,8 @@ static int wacom_graphire_irq(struct wacom_wac *wacom)</div><div class='ctx'> 	int retval = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (data[0] != WACOM_REPORT_PENABLED) {</div><div class='del'>-		dbg("wacom_graphire_irq: received unknown report #%d", data[0]);</div><div class='add'>+		dev_dbg(input-&gt;dev.parent,</div><div class='add'>+			"%s: received unknown report #%d\n", __func__, data[0]);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -321,6 +326,9 @@ static int wacom_intuos_inout(struct wacom_wac *wacom)</div><div class='ctx'> </div><div class='ctx'> 	/* Enter report */</div><div class='ctx'> 	if ((data[1] &amp; 0xfc) == 0xc0) {</div><div class='add'>+		if (features-&gt;type &gt;= INTUOS5S &amp;&amp; features-&gt;type &lt;= INTUOS5L)</div><div class='add'>+			wacom-&gt;shared-&gt;stylus_in_proximity = true;</div><div class='add'>+</div><div class='ctx'> 		/* serial number of the tool */</div><div class='ctx'> 		wacom-&gt;serial[idx] = ((data[3] &amp; 0x0f) &lt;&lt; 28) +</div><div class='ctx'> 			(data[4] &lt;&lt; 20) + (data[5] &lt;&lt; 12) +</div><div class='hunk'>@@ -406,6 +414,9 @@ static int wacom_intuos_inout(struct wacom_wac *wacom)</div><div class='ctx'> </div><div class='ctx'> 	/* Exit report */</div><div class='ctx'> 	if ((data[1] &amp; 0xfe) == 0x80) {</div><div class='add'>+		if (features-&gt;type &gt;= INTUOS5S &amp;&amp; features-&gt;type &lt;= INTUOS5L)</div><div class='add'>+			wacom-&gt;shared-&gt;stylus_in_proximity = false;</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Reset all states otherwise we lose the initial states</div><div class='ctx'> 		 * when in-prox next time</div><div class='hunk'>@@ -452,6 +463,7 @@ static void wacom_intuos_general(struct wacom_wac *wacom)</div><div class='ctx'> 	if ((data[1] &amp; 0xb8) == 0xa0) {</div><div class='ctx'> 		t = (data[6] &lt;&lt; 2) | ((data[7] &gt;&gt; 6) &amp; 3);</div><div class='ctx'> 		if ((features-&gt;type &gt;= INTUOS4S &amp;&amp; features-&gt;type &lt;= INTUOS4L) ||</div><div class='add'>+                    (features-&gt;type &gt;= INTUOS5S &amp;&amp; features-&gt;type &lt;= INTUOS5L) ||</div><div class='ctx'> 		    features-&gt;type == WACOM_21UX2 || features-&gt;type == WACOM_24HD) {</div><div class='ctx'> 			t = (t &lt;&lt; 1) | (data[1] &amp; 1);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -482,9 +494,13 @@ static int wacom_intuos_irq(struct wacom_wac *wacom)</div><div class='ctx'> 	unsigned int t;</div><div class='ctx'> 	int idx = 0, result;</div><div class='ctx'> </div><div class='del'>-	if (data[0] != WACOM_REPORT_PENABLED &amp;&amp; data[0] != WACOM_REPORT_INTUOSREAD</div><div class='del'>-		&amp;&amp; data[0] != WACOM_REPORT_INTUOSWRITE &amp;&amp; data[0] != WACOM_REPORT_INTUOSPAD) {</div><div class='del'>-		dbg("wacom_intuos_irq: received unknown report #%d", data[0]);</div><div class='add'>+	if (data[0] != WACOM_REPORT_PENABLED &amp;&amp;</div><div class='add'>+	    data[0] != WACOM_REPORT_INTUOSREAD &amp;&amp;</div><div class='add'>+	    data[0] != WACOM_REPORT_INTUOSWRITE &amp;&amp;</div><div class='add'>+	    data[0] != WACOM_REPORT_INTUOSPAD &amp;&amp;</div><div class='add'>+	    data[0] != WACOM_REPORT_INTUOS5PAD) {</div><div class='add'>+		dev_dbg(input-&gt;dev.parent,</div><div class='add'>+			"%s: received unknown report #%d\n", __func__, data[0]);</div><div class='ctx'>                 return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -493,7 +509,7 @@ static int wacom_intuos_irq(struct wacom_wac *wacom)</div><div class='ctx'> 		idx = data[1] &amp; 0x01;</div><div class='ctx'> </div><div class='ctx'> 	/* pad packets. Works as a second tool and is always in prox */</div><div class='del'>-	if (data[0] == WACOM_REPORT_INTUOSPAD) {</div><div class='add'>+	if (data[0] == WACOM_REPORT_INTUOSPAD || data[0] == WACOM_REPORT_INTUOS5PAD) {</div><div class='ctx'> 		if (features-&gt;type &gt;= INTUOS4S &amp;&amp; features-&gt;type &lt;= INTUOS4L) {</div><div class='ctx'> 			input_report_key(input, BTN_0, (data[2] &amp; 0x01));</div><div class='ctx'> 			input_report_key(input, BTN_1, (data[3] &amp; 0x01));</div><div class='hunk'>@@ -569,6 +585,34 @@ static int wacom_intuos_irq(struct wacom_wac *wacom)</div><div class='ctx'> 				input_report_key(input, wacom-&gt;tool[1], 0);</div><div class='ctx'> 				input_report_abs(input, ABS_MISC, 0);</div><div class='ctx'> 			}</div><div class='add'>+		} else if (features-&gt;type &gt;= INTUOS5S &amp;&amp; features-&gt;type &lt;= INTUOS5L) {</div><div class='add'>+			int i;</div><div class='add'>+</div><div class='add'>+			/* Touch ring mode switch has no capacitive sensor */</div><div class='add'>+			input_report_key(input, BTN_0, (data[3] &amp; 0x01));</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * ExpressKeys on Intuos5 have a capacitive sensor in</div><div class='add'>+			 * addition to the mechanical switch. Switch data is</div><div class='add'>+			 * stored in data[4], capacitive data in data[5].</div><div class='add'>+			 */</div><div class='add'>+			for (i = 0; i &lt; 8; i++)</div><div class='add'>+				input_report_key(input, BTN_1 + i, data[4] &amp; (1 &lt;&lt; i));</div><div class='add'>+</div><div class='add'>+			if (data[2] &amp; 0x80) {</div><div class='add'>+				input_report_abs(input, ABS_WHEEL, (data[2] &amp; 0x7f));</div><div class='add'>+			} else {</div><div class='add'>+				/* Out of proximity, clear wheel value. */</div><div class='add'>+				input_report_abs(input, ABS_WHEEL, 0);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (data[2] | (data[3] &amp; 0x01) | data[4]) {</div><div class='add'>+				input_report_key(input, wacom-&gt;tool[1], 1);</div><div class='add'>+				input_report_abs(input, ABS_MISC, PAD_DEVICE_ID);</div><div class='add'>+			} else {</div><div class='add'>+				input_report_key(input, wacom-&gt;tool[1], 0);</div><div class='add'>+				input_report_abs(input, ABS_MISC, 0);</div><div class='add'>+			}</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (features-&gt;type == WACOM_21UX2) {</div><div class='ctx'> 				input_report_key(input, BTN_0, (data[5] &amp; 0x01));</div><div class='hunk'>@@ -632,7 +676,9 @@ static int wacom_intuos_irq(struct wacom_wac *wacom)</div><div class='ctx'> 	    (features-&gt;type == INTUOS3 ||</div><div class='ctx'> 	     features-&gt;type == INTUOS3S ||</div><div class='ctx'> 	     features-&gt;type == INTUOS4 ||</div><div class='del'>-	     features-&gt;type == INTUOS4S)) {</div><div class='add'>+	     features-&gt;type == INTUOS4S ||</div><div class='add'>+	     features-&gt;type == INTUOS5 ||</div><div class='add'>+	     features-&gt;type == INTUOS5S)) {</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -685,7 +731,8 @@ static int wacom_intuos_irq(struct wacom_wac *wacom)</div><div class='ctx'> </div><div class='ctx'> 		} else if (wacom-&gt;tool[idx] == BTN_TOOL_MOUSE) {</div><div class='ctx'> 			/* I4 mouse */</div><div class='del'>-			if (features-&gt;type &gt;= INTUOS4S &amp;&amp; features-&gt;type &lt;= INTUOS4L) {</div><div class='add'>+			if ((features-&gt;type &gt;= INTUOS4S &amp;&amp; features-&gt;type &lt;= INTUOS4L) ||</div><div class='add'>+			    (features-&gt;type &gt;= INTUOS5S &amp;&amp; features-&gt;type &lt;= INTUOS5L)) {</div><div class='ctx'> 				input_report_key(input, BTN_LEFT,   data[6] &amp; 0x01);</div><div class='ctx'> 				input_report_key(input, BTN_MIDDLE, data[6] &amp; 0x02);</div><div class='ctx'> 				input_report_key(input, BTN_RIGHT,  data[6] &amp; 0x04);</div><div class='hunk'>@@ -712,7 +759,7 @@ static int wacom_intuos_irq(struct wacom_wac *wacom)</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> 		} else if ((features-&gt;type &lt; INTUOS3S || features-&gt;type == INTUOS3L ||</div><div class='del'>-				features-&gt;type == INTUOS4L) &amp;&amp;</div><div class='add'>+				features-&gt;type == INTUOS4L || features-&gt;type == INTUOS5L) &amp;&amp;</div><div class='ctx'> 			   wacom-&gt;tool[idx] == BTN_TOOL_LENS) {</div><div class='ctx'> 			/* Lens cursor packets */</div><div class='ctx'> 			input_report_key(input, BTN_LEFT,   data[8] &amp; 0x01);</div><div class='hunk'>@@ -729,6 +776,72 @@ static int wacom_intuos_irq(struct wacom_wac *wacom)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int find_slot_from_contactid(struct wacom_wac *wacom, int contactid)</div><div class='add'>+{</div><div class='add'>+	int touch_max = wacom-&gt;features.touch_max;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!wacom-&gt;slots)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; touch_max; ++i) {</div><div class='add'>+		if (wacom-&gt;slots[i] == contactid)</div><div class='add'>+			return i;</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; touch_max; ++i) {</div><div class='add'>+		if (wacom-&gt;slots[i] == -1)</div><div class='add'>+			return i;</div><div class='add'>+	}</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wacom_mt_touch(struct wacom_wac *wacom)</div><div class='add'>+{</div><div class='add'>+	struct input_dev *input = wacom-&gt;input;</div><div class='add'>+	char *data = wacom-&gt;data;</div><div class='add'>+	int i;</div><div class='add'>+	int current_num_contacts = data[2];</div><div class='add'>+	int contacts_to_send = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * First packet resets the counter since only the first</div><div class='add'>+	 * packet in series will have non-zero current_num_contacts.</div><div class='add'>+	 */</div><div class='add'>+	if (current_num_contacts)</div><div class='add'>+		wacom-&gt;num_contacts_left = current_num_contacts;</div><div class='add'>+</div><div class='add'>+	/* There are at most 5 contacts per packet */</div><div class='add'>+	contacts_to_send = min(5, wacom-&gt;num_contacts_left);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; contacts_to_send; i++) {</div><div class='add'>+		int offset = (WACOM_BYTES_PER_MT_PACKET * i) + 3;</div><div class='add'>+		bool touch = data[offset] &amp; 0x1;</div><div class='add'>+		int id = le16_to_cpup((__le16 *)&amp;data[offset + 1]);</div><div class='add'>+		int slot = find_slot_from_contactid(wacom, id);</div><div class='add'>+</div><div class='add'>+		if (slot &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		input_mt_slot(input, slot);</div><div class='add'>+		input_mt_report_slot_state(input, MT_TOOL_FINGER, touch);</div><div class='add'>+		if (touch) {</div><div class='add'>+			int x = le16_to_cpup((__le16 *)&amp;data[offset + 7]);</div><div class='add'>+			int y = le16_to_cpup((__le16 *)&amp;data[offset + 9]);</div><div class='add'>+			input_report_abs(input, ABS_MT_POSITION_X, x);</div><div class='add'>+			input_report_abs(input, ABS_MT_POSITION_Y, y);</div><div class='add'>+		}</div><div class='add'>+		wacom-&gt;slots[slot] = touch ? id : -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	input_mt_report_pointer_emulation(input, true);</div><div class='add'>+</div><div class='add'>+	wacom-&gt;num_contacts_left -= contacts_to_send;</div><div class='add'>+	if (wacom-&gt;num_contacts_left &lt; 0)</div><div class='add'>+		wacom-&gt;num_contacts_left = 0;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int wacom_tpc_mt_touch(struct wacom_wac *wacom)</div><div class='ctx'> {</div><div class='ctx'> 	struct input_dev *input = wacom-&gt;input;</div><div class='hunk'>@@ -767,6 +880,9 @@ static int wacom_tpc_single_touch(struct wacom_wac *wacom, size_t len)</div><div class='ctx'> 	bool prox;</div><div class='ctx'> 	int x = 0, y = 0;</div><div class='ctx'> </div><div class='add'>+	if (wacom-&gt;features.touch_max &gt; 1 || len &gt; WACOM_PKGLEN_TPC2FG)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (!wacom-&gt;shared-&gt;stylus_in_proximity) {</div><div class='ctx'> 		if (len == WACOM_PKGLEN_TPC1FG) {</div><div class='ctx'> 			prox = data[0] &amp; 0x01;</div><div class='hunk'>@@ -830,14 +946,15 @@ static int wacom_tpc_irq(struct wacom_wac *wacom, size_t len)</div><div class='ctx'> {</div><div class='ctx'> 	char *data = wacom-&gt;data;</div><div class='ctx'> </div><div class='del'>-	dbg("wacom_tpc_irq: received report #%d", data[0]);</div><div class='add'>+	dev_dbg(wacom-&gt;input-&gt;dev.parent,</div><div class='add'>+		"%s: received report #%d\n", __func__, data[0]);</div><div class='ctx'> </div><div class='ctx'> 	switch (len) {</div><div class='ctx'> 	case WACOM_PKGLEN_TPC1FG:</div><div class='del'>-		 return wacom_tpc_single_touch(wacom, len);</div><div class='add'>+		return wacom_tpc_single_touch(wacom, len);</div><div class='ctx'> </div><div class='ctx'> 	case WACOM_PKGLEN_TPC2FG:</div><div class='del'>- 		return wacom_tpc_mt_touch(wacom);</div><div class='add'>+		return wacom_tpc_mt_touch(wacom);</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		switch (data[0]) {</div><div class='hunk'>@@ -846,6 +963,9 @@ static int wacom_tpc_irq(struct wacom_wac *wacom, size_t len)</div><div class='ctx'> 		case WACOM_REPORT_TPCST:</div><div class='ctx'> 			return wacom_tpc_single_touch(wacom, len);</div><div class='ctx'> </div><div class='add'>+		case WACOM_REPORT_TPCMT:</div><div class='add'>+			return wacom_mt_touch(wacom);</div><div class='add'>+</div><div class='ctx'> 		case WACOM_REPORT_PENABLED:</div><div class='ctx'> 			return wacom_tpc_pen(wacom);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1114,8 +1234,18 @@ void wacom_wac_irq(struct wacom_wac *wacom_wac, size_t len)</div><div class='ctx'> 		sync = wacom_intuos_irq(wacom_wac);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case INTUOS5S:</div><div class='add'>+	case INTUOS5:</div><div class='add'>+	case INTUOS5L:</div><div class='add'>+		if (len == WACOM_PKGLEN_BBTOUCH3)</div><div class='add'>+			sync = wacom_bpt3_touch(wacom_wac);</div><div class='add'>+		else</div><div class='add'>+			sync = wacom_intuos_irq(wacom_wac);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case TABLETPC:</div><div class='ctx'> 	case TABLETPC2FG:</div><div class='add'>+	case MTSCREEN:</div><div class='ctx'> 		sync = wacom_tpc_irq(wacom_wac, len);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -1188,7 +1318,9 @@ void wacom_setup_device_quirks(struct wacom_features *features)</div><div class='ctx'> </div><div class='ctx'> 	/* these device have multiple inputs */</div><div class='ctx'> 	if (features-&gt;type == TABLETPC || features-&gt;type == TABLETPC2FG ||</div><div class='del'>-	    features-&gt;type == BAMBOO_PT || features-&gt;type == WIRELESS)</div><div class='add'>+	    features-&gt;type == BAMBOO_PT || features-&gt;type == WIRELESS ||</div><div class='add'>+	    (features-&gt;type &gt;= INTUOS5S &amp;&amp; features-&gt;type &lt;= INTUOS5L) ||</div><div class='add'>+	    features-&gt;type == MTSCREEN)</div><div class='ctx'> 		features-&gt;quirks |= WACOM_QUIRK_MULTI_INPUT;</div><div class='ctx'> </div><div class='ctx'> 	/* quirk for bamboo touch with 2 low res touches */</div><div class='hunk'>@@ -1219,8 +1351,8 @@ static unsigned int wacom_calculate_touch_res(unsigned int logical_max,</div><div class='ctx'>        return (logical_max * 100) / physical_max;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void wacom_setup_input_capabilities(struct input_dev *input_dev,</div><div class='del'>-				    struct wacom_wac *wacom_wac)</div><div class='add'>+int wacom_setup_input_capabilities(struct input_dev *input_dev,</div><div class='add'>+				   struct wacom_wac *wacom_wac)</div><div class='ctx'> {</div><div class='ctx'> 	struct wacom_features *features = &amp;wacom_wac-&gt;features;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1355,6 +1487,50 @@ void wacom_setup_input_capabilities(struct input_dev *input_dev,</div><div class='ctx'> 		wacom_setup_intuos(wacom_wac);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case INTUOS5:</div><div class='add'>+	case INTUOS5L:</div><div class='add'>+		if (features-&gt;device_type == BTN_TOOL_PEN) {</div><div class='add'>+			__set_bit(BTN_7, input_dev-&gt;keybit);</div><div class='add'>+			__set_bit(BTN_8, input_dev-&gt;keybit);</div><div class='add'>+		}</div><div class='add'>+		/* fall through */</div><div class='add'>+</div><div class='add'>+	case INTUOS5S:</div><div class='add'>+		__set_bit(INPUT_PROP_POINTER, input_dev-&gt;propbit);</div><div class='add'>+</div><div class='add'>+		if (features-&gt;device_type == BTN_TOOL_PEN) {</div><div class='add'>+			for (i = 0; i &lt; 7; i++)</div><div class='add'>+				__set_bit(BTN_0 + i, input_dev-&gt;keybit);</div><div class='add'>+</div><div class='add'>+			input_set_abs_params(input_dev, ABS_DISTANCE, 0,</div><div class='add'>+					      features-&gt;distance_max,</div><div class='add'>+					      0, 0);</div><div class='add'>+</div><div class='add'>+			input_set_abs_params(input_dev, ABS_Z, -900, 899, 0, 0);</div><div class='add'>+</div><div class='add'>+			wacom_setup_intuos(wacom_wac);</div><div class='add'>+		} else if (features-&gt;device_type == BTN_TOOL_FINGER) {</div><div class='add'>+			__clear_bit(ABS_MISC, input_dev-&gt;absbit);</div><div class='add'>+</div><div class='add'>+			__set_bit(BTN_TOOL_FINGER, input_dev-&gt;keybit);</div><div class='add'>+			__set_bit(BTN_TOOL_DOUBLETAP, input_dev-&gt;keybit);</div><div class='add'>+			__set_bit(BTN_TOOL_TRIPLETAP, input_dev-&gt;keybit);</div><div class='add'>+			__set_bit(BTN_TOOL_QUADTAP, input_dev-&gt;keybit);</div><div class='add'>+</div><div class='add'>+			input_mt_init_slots(input_dev, features-&gt;touch_max);</div><div class='add'>+</div><div class='add'>+			input_set_abs_params(input_dev, ABS_MT_TOUCH_MAJOR,</div><div class='add'>+			                     0, 255, 0, 0);</div><div class='add'>+</div><div class='add'>+			input_set_abs_params(input_dev, ABS_MT_POSITION_X,</div><div class='add'>+					     0, features-&gt;x_max,</div><div class='add'>+					     features-&gt;x_fuzz, 0);</div><div class='add'>+			input_set_abs_params(input_dev, ABS_MT_POSITION_Y,</div><div class='add'>+					     0, features-&gt;y_max,</div><div class='add'>+					     features-&gt;y_fuzz, 0);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case INTUOS4:</div><div class='ctx'> 	case INTUOS4L:</div><div class='ctx'> 		__set_bit(BTN_7, input_dev-&gt;keybit);</div><div class='hunk'>@@ -1372,9 +1548,19 @@ void wacom_setup_input_capabilities(struct input_dev *input_dev,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case TABLETPC2FG:</div><div class='add'>+	case MTSCREEN:</div><div class='ctx'> 		if (features-&gt;device_type == BTN_TOOL_FINGER) {</div><div class='ctx'> </div><div class='del'>-			input_mt_init_slots(input_dev, 2);</div><div class='add'>+			wacom_wac-&gt;slots = kmalloc(features-&gt;touch_max *</div><div class='add'>+							sizeof(int),</div><div class='add'>+						   GFP_KERNEL);</div><div class='add'>+			if (!wacom_wac-&gt;slots)</div><div class='add'>+				return -ENOMEM;</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; features-&gt;touch_max; i++)</div><div class='add'>+				wacom_wac-&gt;slots[i] = -1;</div><div class='add'>+</div><div class='add'>+			input_mt_init_slots(input_dev, features-&gt;touch_max);</div><div class='ctx'> 			input_set_abs_params(input_dev, ABS_MT_TOOL_TYPE,</div><div class='ctx'> 					0, MT_TOOL_MAX, 0, 0);</div><div class='ctx'> 			input_set_abs_params(input_dev, ABS_MT_POSITION_X,</div><div class='hunk'>@@ -1429,6 +1615,7 @@ void wacom_setup_input_capabilities(struct input_dev *input_dev,</div><div class='ctx'> </div><div class='ctx'> 			__set_bit(BTN_TOOL_FINGER, input_dev-&gt;keybit);</div><div class='ctx'> 			__set_bit(BTN_TOOL_DOUBLETAP, input_dev-&gt;keybit);</div><div class='add'>+			input_mt_init_slots(input_dev, features-&gt;touch_max);</div><div class='ctx'> </div><div class='ctx'> 			if (features-&gt;pktlen == WACOM_PKGLEN_BBTOUCH3) {</div><div class='ctx'> 				__set_bit(BTN_TOOL_TRIPLETAP,</div><div class='hunk'>@@ -1436,13 +1623,9 @@ void wacom_setup_input_capabilities(struct input_dev *input_dev,</div><div class='ctx'> 				__set_bit(BTN_TOOL_QUADTAP,</div><div class='ctx'> 					  input_dev-&gt;keybit);</div><div class='ctx'> </div><div class='del'>-				input_mt_init_slots(input_dev, 16);</div><div class='del'>-</div><div class='ctx'> 				input_set_abs_params(input_dev,</div><div class='ctx'> 						     ABS_MT_TOUCH_MAJOR,</div><div class='ctx'> 						     0, 255, 0, 0);</div><div class='del'>-			} else {</div><div class='del'>-				input_mt_init_slots(input_dev, 2);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			input_set_abs_params(input_dev, ABS_MT_POSITION_X,</div><div class='hunk'>@@ -1462,6 +1645,7 @@ void wacom_setup_input_capabilities(struct input_dev *input_dev,</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct wacom_features wacom_features_0x00 =</div><div class='hunk'>@@ -1629,6 +1813,24 @@ static const struct wacom_features wacom_features_0xBB =</div><div class='ctx'> static const struct wacom_features wacom_features_0xBC =</div><div class='ctx'> 	{ "Wacom Intuos4 WL",     WACOM_PKGLEN_INTUOS,    40840, 25400, 2047,</div><div class='ctx'> 	  63, INTUOS4, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES };</div><div class='add'>+static const struct wacom_features wacom_features_0x26 =</div><div class='add'>+	{ "Wacom Intuos5 touch S", WACOM_PKGLEN_INTUOS,  31496, 19685, 2047,</div><div class='add'>+	  63, INTUOS5S, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES,</div><div class='add'>+	  .touch_max = 16 };</div><div class='add'>+static const struct wacom_features wacom_features_0x27 =</div><div class='add'>+	{ "Wacom Intuos5 touch M", WACOM_PKGLEN_INTUOS,  44704, 27940, 2047,</div><div class='add'>+	  63, INTUOS5, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES,</div><div class='add'>+	  .touch_max = 16 };</div><div class='add'>+static const struct wacom_features wacom_features_0x28 =</div><div class='add'>+	{ "Wacom Intuos5 touch L", WACOM_PKGLEN_INTUOS, 65024, 40640, 2047,</div><div class='add'>+	  63, INTUOS5L, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES,</div><div class='add'>+	  .touch_max = 16 };</div><div class='add'>+static const struct wacom_features wacom_features_0x29 =</div><div class='add'>+	{ "Wacom Intuos5 S", WACOM_PKGLEN_INTUOS,  31496, 19685, 2047,</div><div class='add'>+	  63, INTUOS5S, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES };</div><div class='add'>+static const struct wacom_features wacom_features_0x2A =</div><div class='add'>+	{ "Wacom Intuos5 M", WACOM_PKGLEN_INTUOS,  44704, 27940, 2047,</div><div class='add'>+	  63, INTUOS5, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES };</div><div class='ctx'> static const struct wacom_features wacom_features_0xF4 =</div><div class='ctx'> 	{ "Wacom Cintiq 24HD",    WACOM_PKGLEN_INTUOS,   104480, 65600, 2047,</div><div class='ctx'> 	  63, WACOM_24HD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES };</div><div class='hunk'>@@ -1670,13 +1872,19 @@ static const struct wacom_features wacom_features_0x9F =</div><div class='ctx'> 	  0, TABLETPC, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='ctx'> static const struct wacom_features wacom_features_0xE2 =</div><div class='ctx'> 	{ "Wacom ISDv4 E2",       WACOM_PKGLEN_TPC2FG,    26202, 16325,  255,</div><div class='del'>-	  0, TABLETPC2FG, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  0, TABLETPC2FG, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	  .touch_max = 2 };</div><div class='ctx'> static const struct wacom_features wacom_features_0xE3 =</div><div class='ctx'> 	{ "Wacom ISDv4 E3",       WACOM_PKGLEN_TPC2FG,    26202, 16325,  255,</div><div class='del'>-	  0, TABLETPC2FG, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  0, TABLETPC2FG, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	  .touch_max = 2 };</div><div class='add'>+static const struct wacom_features wacom_features_0xE5 =</div><div class='add'>+	{ "Wacom ISDv4 E5",       WACOM_PKGLEN_MTOUCH,    26202, 16325,  255,</div><div class='add'>+	  0, MTSCREEN, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='ctx'> static const struct wacom_features wacom_features_0xE6 =</div><div class='ctx'> 	{ "Wacom ISDv4 E6",       WACOM_PKGLEN_TPC2FG,    27760, 15694,  255,</div><div class='del'>-	  0, TABLETPC2FG, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  0, TABLETPC2FG, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	.touch_max = 2 };</div><div class='ctx'> static const struct wacom_features wacom_features_0xEC =</div><div class='ctx'> 	{ "Wacom ISDv4 EC",       WACOM_PKGLEN_GRAPHIRE,  25710, 14500,  255,</div><div class='ctx'> 	  0, TABLETPC,    WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='hunk'>@@ -1685,19 +1893,22 @@ static const struct wacom_features wacom_features_0x47 =</div><div class='ctx'> 	  31, INTUOS, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='ctx'> static const struct wacom_features wacom_features_0x84 =</div><div class='ctx'> 	{ "Wacom Wireless Receiver", WACOM_PKGLEN_WIRELESS, 0, 0, 0,</div><div class='del'>-	  0, WIRELESS, 0, 0 };</div><div class='add'>+	  0, WIRELESS, 0, 0, .touch_max = 16 };</div><div class='ctx'> static const struct wacom_features wacom_features_0xD0 =</div><div class='ctx'> 	{ "Wacom Bamboo 2FG",     WACOM_PKGLEN_BBFUN,     14720,  9200, 1023,</div><div class='del'>-	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	  .touch_max = 2 };</div><div class='ctx'> static const struct wacom_features wacom_features_0xD1 =</div><div class='ctx'> 	{ "Wacom Bamboo 2FG 4x5", WACOM_PKGLEN_BBFUN,     14720,  9200, 1023,</div><div class='del'>-	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	  .touch_max = 2 };</div><div class='ctx'> static const struct wacom_features wacom_features_0xD2 =</div><div class='ctx'> 	{ "Wacom Bamboo Craft",   WACOM_PKGLEN_BBFUN,     14720,  9200, 1023,</div><div class='ctx'> 	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='ctx'> static const struct wacom_features wacom_features_0xD3 =</div><div class='ctx'> 	{ "Wacom Bamboo 2FG 6x8", WACOM_PKGLEN_BBFUN,     21648, 13700, 1023,</div><div class='del'>-	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	  .touch_max = 2 };</div><div class='ctx'> static const struct wacom_features wacom_features_0xD4 =</div><div class='ctx'> 	{ "Wacom Bamboo Pen",     WACOM_PKGLEN_BBFUN,     14720,  9200, 1023,</div><div class='ctx'> 	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='hunk'>@@ -1706,28 +1917,35 @@ static const struct wacom_features wacom_features_0xD5 =</div><div class='ctx'> 	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='ctx'> static const struct wacom_features wacom_features_0xD6 =</div><div class='ctx'> 	{ "Wacom BambooPT 2FG 4x5", WACOM_PKGLEN_BBFUN,   14720,  9200, 1023,</div><div class='del'>-	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	  .touch_max = 2 };</div><div class='ctx'> static const struct wacom_features wacom_features_0xD7 =</div><div class='ctx'> 	{ "Wacom BambooPT 2FG Small", WACOM_PKGLEN_BBFUN, 14720,  9200, 1023,</div><div class='del'>-	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	  .touch_max = 2 };</div><div class='ctx'> static const struct wacom_features wacom_features_0xD8 =</div><div class='ctx'> 	{ "Wacom Bamboo Comic 2FG", WACOM_PKGLEN_BBFUN,   21648, 13700, 1023,</div><div class='del'>-	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	  .touch_max = 2 };</div><div class='ctx'> static const struct wacom_features wacom_features_0xDA =</div><div class='ctx'> 	{ "Wacom Bamboo 2FG 4x5 SE", WACOM_PKGLEN_BBFUN,  14720,  9200, 1023,</div><div class='del'>-	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	  .touch_max = 2 };</div><div class='ctx'> static struct wacom_features wacom_features_0xDB =</div><div class='ctx'> 	{ "Wacom Bamboo 2FG 6x8 SE", WACOM_PKGLEN_BBFUN,  21648, 13700, 1023,</div><div class='del'>-	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	  .touch_max = 2 };</div><div class='ctx'> static const struct wacom_features wacom_features_0xDD =</div><div class='ctx'>         { "Wacom Bamboo Connect", WACOM_PKGLEN_BBPEN,     14720,  9200, 1023,</div><div class='ctx'>           31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='ctx'> static const struct wacom_features wacom_features_0xDE =</div><div class='ctx'>         { "Wacom Bamboo 16FG 4x5", WACOM_PKGLEN_BBPEN,    14720,  9200, 1023,</div><div class='del'>-          31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	  .touch_max = 16 };</div><div class='ctx'> static const struct wacom_features wacom_features_0xDF =</div><div class='ctx'>         { "Wacom Bamboo 16FG 6x8", WACOM_PKGLEN_BBPEN,    21648, 13700, 1023,</div><div class='del'>-          31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='add'>+	  31, BAMBOO_PT, WACOM_INTUOS_RES, WACOM_INTUOS_RES,</div><div class='add'>+	  .touch_max = 16 };</div><div class='ctx'> static const struct wacom_features wacom_features_0x6004 =</div><div class='ctx'> 	{ "ISD-V4",               WACOM_PKGLEN_GRAPHIRE,  12800,  8000,  255,</div><div class='ctx'> 	  0, TABLETPC, WACOM_INTUOS_RES, WACOM_INTUOS_RES };</div><div class='hunk'>@@ -1801,6 +2019,11 @@ const struct usb_device_id wacom_ids[] = {</div><div class='ctx'> 	{ USB_DEVICE_WACOM(0xBA) },</div><div class='ctx'> 	{ USB_DEVICE_WACOM(0xBB) },</div><div class='ctx'> 	{ USB_DEVICE_WACOM(0xBC) },</div><div class='add'>+	{ USB_DEVICE_WACOM(0x26) },</div><div class='add'>+	{ USB_DEVICE_WACOM(0x27) },</div><div class='add'>+	{ USB_DEVICE_WACOM(0x28) },</div><div class='add'>+	{ USB_DEVICE_WACOM(0x29) },</div><div class='add'>+	{ USB_DEVICE_WACOM(0x2A) },</div><div class='ctx'> 	{ USB_DEVICE_WACOM(0x3F) },</div><div class='ctx'> 	{ USB_DEVICE_WACOM(0xC5) },</div><div class='ctx'> 	{ USB_DEVICE_WACOM(0xC6) },</div><div class='hunk'>@@ -1836,6 +2059,7 @@ const struct usb_device_id wacom_ids[] = {</div><div class='ctx'> 	{ USB_DEVICE_WACOM(0x9F) },</div><div class='ctx'> 	{ USB_DEVICE_WACOM(0xE2) },</div><div class='ctx'> 	{ USB_DEVICE_WACOM(0xE3) },</div><div class='add'>+	{ USB_DEVICE_WACOM(0xE5) },</div><div class='ctx'> 	{ USB_DEVICE_WACOM(0xE6) },</div><div class='ctx'> 	{ USB_DEVICE_WACOM(0xEC) },</div><div class='ctx'> 	{ USB_DEVICE_WACOM(0x47) },</div><div class='head'>diff --git a/drivers/input/tablet/wacom_wac.h b/drivers/input/tablet/wacom_wac.h<br/>index ba5a334e54d6..78fbd3f42009 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/tablet/wacom_wac.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/tablet/wacom_wac.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/tablet/wacom_wac.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/tablet/wacom_wac.h</a></div><div class='hunk'>@@ -25,6 +25,10 @@</div><div class='ctx'> #define WACOM_PKGLEN_BBTOUCH3	64</div><div class='ctx'> #define WACOM_PKGLEN_BBPEN	10</div><div class='ctx'> #define WACOM_PKGLEN_WIRELESS	32</div><div class='add'>+#define WACOM_PKGLEN_MTOUCH	62</div><div class='add'>+</div><div class='add'>+/* wacom data size per MT contact */</div><div class='add'>+#define WACOM_BYTES_PER_MT_PACKET	11</div><div class='ctx'> </div><div class='ctx'> /* device IDs */</div><div class='ctx'> #define STYLUS_DEVICE_ID	0x02</div><div class='hunk'>@@ -38,8 +42,10 @@</div><div class='ctx'> #define WACOM_REPORT_INTUOSREAD		5</div><div class='ctx'> #define WACOM_REPORT_INTUOSWRITE	6</div><div class='ctx'> #define WACOM_REPORT_INTUOSPAD		12</div><div class='add'>+#define WACOM_REPORT_INTUOS5PAD		3</div><div class='ctx'> #define WACOM_REPORT_TPC1FG		6</div><div class='ctx'> #define WACOM_REPORT_TPC2FG		13</div><div class='add'>+#define WACOM_REPORT_TPCMT		13</div><div class='ctx'> #define WACOM_REPORT_TPCHID		15</div><div class='ctx'> #define WACOM_REPORT_TPCST		16</div><div class='ctx'> </div><div class='hunk'>@@ -65,6 +71,9 @@ enum {</div><div class='ctx'> 	INTUOS4S,</div><div class='ctx'> 	INTUOS4,</div><div class='ctx'> 	INTUOS4L,</div><div class='add'>+	INTUOS5S,</div><div class='add'>+	INTUOS5,</div><div class='add'>+	INTUOS5L,</div><div class='ctx'> 	WACOM_24HD,</div><div class='ctx'> 	WACOM_21UX2,</div><div class='ctx'> 	CINTIQ,</div><div class='hunk'>@@ -72,6 +81,7 @@ enum {</div><div class='ctx'> 	WACOM_MO,</div><div class='ctx'> 	TABLETPC,</div><div class='ctx'> 	TABLETPC2FG,</div><div class='add'>+	MTSCREEN,</div><div class='ctx'> 	MAX_TYPE</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -95,6 +105,7 @@ struct wacom_features {</div><div class='ctx'> 	int pressure_fuzz;</div><div class='ctx'> 	int distance_fuzz;</div><div class='ctx'> 	unsigned quirks;</div><div class='add'>+	unsigned touch_max;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct wacom_shared {</div><div class='hunk'>@@ -113,6 +124,8 @@ struct wacom_wac {</div><div class='ctx'> 	struct input_dev *input;</div><div class='ctx'> 	int pid;</div><div class='ctx'> 	int battery_capacity;</div><div class='add'>+	int num_contacts_left;</div><div class='add'>+	int *slots;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig<br/>index 2a2141915aa0..98d263504eea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/Kconfig</a></div><div class='hunk'>@@ -187,6 +187,23 @@ config TOUCHSCREEN_DA9034</div><div class='ctx'> 	  Say Y here to enable the support for the touchscreen found</div><div class='ctx'> 	  on Dialog Semiconductor DA9034 PMIC.</div><div class='ctx'> </div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called da9034-ts.</div><div class='add'>+</div><div class='add'>+config TOUCHSCREEN_DA9052</div><div class='add'>+	tristate "Dialog DA9052/DA9053 TSI"</div><div class='add'>+	depends on PMIC_DA9052</div><div class='add'>+	help</div><div class='add'>+	  Say Y here to support the touchscreen found on Dialog Semiconductor</div><div class='add'>+	  DA9052-BC and DA9053-AA/Bx PMICs.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called da9052_tsi.</div><div class='add'>+</div><div class='ctx'> config TOUCHSCREEN_DYNAPRO</div><div class='ctx'> 	tristate "Dynapro serial touchscreen"</div><div class='ctx'> 	select SERIO</div><div class='hunk'>@@ -306,6 +323,18 @@ config TOUCHSCREEN_WACOM_W8001</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='ctx'> 	  module will be called wacom_w8001.</div><div class='ctx'> </div><div class='add'>+config TOUCHSCREEN_WACOM_I2C</div><div class='add'>+	tristate "Wacom Tablet support (I2C)"</div><div class='add'>+	depends on I2C</div><div class='add'>+	help</div><div class='add'>+	  Say Y here if you want to use the I2C version of the Wacom</div><div class='add'>+	  Pen Tablet.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module</div><div class='add'>+	  will be called wacom_i2c.</div><div class='add'>+</div><div class='ctx'> config TOUCHSCREEN_LPC32XX</div><div class='ctx'> 	tristate "LPC32XX touchscreen controller"</div><div class='ctx'> 	depends on ARCH_LPC32XX</div><div class='hunk'>@@ -489,10 +518,10 @@ config TOUCHSCREEN_TI_TSCADC</div><div class='ctx'> </div><div class='ctx'> config TOUCHSCREEN_ATMEL_TSADCC</div><div class='ctx'> 	tristate "Atmel Touchscreen Interface"</div><div class='del'>-	depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45</div><div class='add'>+	depends on ARCH_AT91</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you have a 4-wire touchscreen connected to the</div><div class='del'>-          ADC Controller on your Atmel SoC (such as the AT91SAM9RL).</div><div class='add'>+          ADC Controller on your Atmel SoC.</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='hunk'>@@ -635,6 +664,7 @@ config TOUCHSCREEN_USB_COMPOSITE</div><div class='ctx'> 	  - Zytronic controllers</div><div class='ctx'> 	  - Elo TouchSystems 2700 IntelliTouch</div><div class='ctx'> 	  - EasyTouch USB Touch Controller from Data Modul</div><div class='add'>+	  - e2i (Mimo monitors)</div><div class='ctx'> </div><div class='ctx'> 	  Have a look at &lt;http://linux.chapter7.ch/touchkit/&gt; for</div><div class='ctx'> 	  a usage description and the required user-space stuff.</div><div class='hunk'>@@ -721,7 +751,7 @@ config TOUCHSCREEN_USB_ELO</div><div class='ctx'> </div><div class='ctx'> config TOUCHSCREEN_USB_E2I</div><div class='ctx'> 	default y</div><div class='del'>-	bool "e2i Touchscreen controller (e.g. from Mimo 740)"</div><div class='add'>+	bool "e2i Touchscreen controller (e.g. from Mimo 740)" if EXPERT</div><div class='ctx'> 	depends on TOUCHSCREEN_USB_COMPOSITE</div><div class='ctx'> </div><div class='ctx'> config TOUCHSCREEN_USB_ZYTRONIC</div><div class='hunk'>@@ -744,7 +774,7 @@ config TOUCHSCREEN_USB_EASYTOUCH</div><div class='ctx'> 	bool "EasyTouch USB Touch controller device support" if EMBEDDED</div><div class='ctx'> 	depends on TOUCHSCREEN_USB_COMPOSITE</div><div class='ctx'> 	help</div><div class='del'>-	  Say Y here if you have a EasyTouch USB Touch controller device support.</div><div class='add'>+	  Say Y here if you have an EasyTouch USB Touch controller.</div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='ctx'> config TOUCHSCREEN_TOUCHIT213</div><div class='head'>diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile<br/>index 3d5cf8cbf89c..eb8bfe1c1a46 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/Makefile</a></div><div class='hunk'>@@ -22,6 +22,7 @@ obj-$(CONFIG_TOUCHSCREEN_CYTTSP_CORE)	+= cyttsp_core.o</div><div class='ctx'> obj-$(CONFIG_TOUCHSCREEN_CYTTSP_I2C)	+= cyttsp_i2c.o</div><div class='ctx'> obj-$(CONFIG_TOUCHSCREEN_CYTTSP_SPI)	+= cyttsp_spi.o</div><div class='ctx'> obj-$(CONFIG_TOUCHSCREEN_DA9034)	+= da9034-ts.o</div><div class='add'>+obj-$(CONFIG_TOUCHSCREEN_DA9052)	+= da9052_tsi.o</div><div class='ctx'> obj-$(CONFIG_TOUCHSCREEN_DYNAPRO)	+= dynapro.o</div><div class='ctx'> obj-$(CONFIG_TOUCHSCREEN_HAMPSHIRE)	+= hampshire.o</div><div class='ctx'> obj-$(CONFIG_TOUCHSCREEN_GUNZE)		+= gunze.o</div><div class='hunk'>@@ -59,6 +60,7 @@ obj-$(CONFIG_TOUCHSCREEN_TSC2005)	+= tsc2005.o</div><div class='ctx'> obj-$(CONFIG_TOUCHSCREEN_TSC2007)	+= tsc2007.o</div><div class='ctx'> obj-$(CONFIG_TOUCHSCREEN_UCB1400)	+= ucb1400_ts.o</div><div class='ctx'> obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001)	+= wacom_w8001.o</div><div class='add'>+obj-$(CONFIG_TOUCHSCREEN_WACOM_I2C)	+= wacom_i2c.o</div><div class='ctx'> obj-$(CONFIG_TOUCHSCREEN_WM831X)	+= wm831x-ts.o</div><div class='ctx'> obj-$(CONFIG_TOUCHSCREEN_WM97XX)	+= wm97xx-ts.o</div><div class='ctx'> wm97xx-ts-$(CONFIG_TOUCHSCREEN_WM9705)	+= wm9705.o</div><div class='head'>diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c b/drivers/input/touchscreen/atmel_mxt_ts.c<br/>index 19d4ea65ea01..42e645062c20 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/atmel_mxt_ts.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/atmel_mxt_ts.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/atmel_mxt_ts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/atmel_mxt_ts.c</a></div><div class='hunk'>@@ -236,7 +236,6 @@ struct mxt_object {</div><div class='ctx'> struct mxt_message {</div><div class='ctx'> 	u8 reportid;</div><div class='ctx'> 	u8 message[7];</div><div class='del'>-	u8 checksum;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mxt_finger {</div><div class='hunk'>@@ -326,17 +325,12 @@ static bool mxt_object_writable(unsigned int type)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mxt_dump_message(struct device *dev,</div><div class='del'>-				  struct mxt_message *message)</div><div class='add'>+			     struct mxt_message *message)</div><div class='ctx'> {</div><div class='del'>-	dev_dbg(dev, "reportid:\t0x%x\n", message-&gt;reportid);</div><div class='del'>-	dev_dbg(dev, "message1:\t0x%x\n", message-&gt;message[0]);</div><div class='del'>-	dev_dbg(dev, "message2:\t0x%x\n", message-&gt;message[1]);</div><div class='del'>-	dev_dbg(dev, "message3:\t0x%x\n", message-&gt;message[2]);</div><div class='del'>-	dev_dbg(dev, "message4:\t0x%x\n", message-&gt;message[3]);</div><div class='del'>-	dev_dbg(dev, "message5:\t0x%x\n", message-&gt;message[4]);</div><div class='del'>-	dev_dbg(dev, "message6:\t0x%x\n", message-&gt;message[5]);</div><div class='del'>-	dev_dbg(dev, "message7:\t0x%x\n", message-&gt;message[6]);</div><div class='del'>-	dev_dbg(dev, "checksum:\t0x%x\n", message-&gt;checksum);</div><div class='add'>+	dev_dbg(dev, "reportid: %u\tmessage: %02x %02x %02x %02x %02x %02x %02x\n",</div><div class='add'>+		message-&gt;reportid, message-&gt;message[0], message-&gt;message[1],</div><div class='add'>+		message-&gt;message[2], message-&gt;message[3], message-&gt;message[4],</div><div class='add'>+		message-&gt;message[5], message-&gt;message[6]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mxt_check_bootloader(struct i2c_client *client,</div><div class='hunk'>@@ -506,7 +500,7 @@ static int mxt_write_object(struct mxt_data *data,</div><div class='ctx'> 	u16 reg;</div><div class='ctx'> </div><div class='ctx'> 	object = mxt_get_object(data, type);</div><div class='del'>-	if (!object)</div><div class='add'>+	if (!object || offset &gt;= object-&gt;size + 1)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	reg = object-&gt;start_address;</div><div class='hunk'>@@ -1049,8 +1043,8 @@ static ssize_t mxt_update_fw_store(struct device *dev,</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static DEVICE_ATTR(object, 0444, mxt_object_show, NULL);</div><div class='del'>-static DEVICE_ATTR(update_fw, 0664, NULL, mxt_update_fw_store);</div><div class='add'>+static DEVICE_ATTR(object, S_IRUGO, mxt_object_show, NULL);</div><div class='add'>+static DEVICE_ATTR(update_fw, S_IWUSR, NULL, mxt_update_fw_store);</div><div class='ctx'> </div><div class='ctx'> static struct attribute *mxt_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_object.attr,</div><div class='hunk'>@@ -1201,7 +1195,7 @@ static int __devexit mxt_remove(struct i2c_client *client)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='ctx'> static int mxt_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct i2c_client *client = to_i2c_client(dev);</div><div class='hunk'>@@ -1239,13 +1233,10 @@ static int mxt_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static const struct dev_pm_ops mxt_pm_ops = {</div><div class='del'>-	.suspend	= mxt_suspend,</div><div class='del'>-	.resume		= mxt_resume,</div><div class='del'>-};</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static SIMPLE_DEV_PM_OPS(mxt_pm_ops, mxt_suspend, mxt_resume);</div><div class='add'>+</div><div class='ctx'> static const struct i2c_device_id mxt_id[] = {</div><div class='ctx'> 	{ "qt602240_ts", 0 },</div><div class='ctx'> 	{ "atmel_mxt_ts", 0 },</div><div class='hunk'>@@ -1258,9 +1249,7 @@ static struct i2c_driver mxt_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	= "atmel_mxt_ts",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='del'>-#ifdef CONFIG_PM</div><div class='ctx'> 		.pm	= &amp;mxt_pm_ops,</div><div class='del'>-#endif</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= mxt_probe,</div><div class='ctx'> 	.remove		= __devexit_p(mxt_remove),</div><div class='head'>diff --git a/drivers/input/touchscreen/da9052_tsi.c b/drivers/input/touchscreen/da9052_tsi.c<br/>new file mode 100644<br/>index 000000000000..e8df341090c0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/da9052_tsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/da9052_tsi.c</a></div><div class='hunk'>@@ -0,0 +1,370 @@</div><div class='add'>+/*</div><div class='add'>+ * TSI driver for Dialog DA9052</div><div class='add'>+ *</div><div class='add'>+ * Copyright(c) 2012 Dialog Semiconductor Ltd.</div><div class='add'>+ *</div><div class='add'>+ * Author: David Dajun Chen &lt;dchen@diasemi.com&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute  it and/or modify it</div><div class='add'>+ *  under  the terms of  the GNU General  Public License as published by the</div><div class='add'>+ *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='add'>+ *  option) any later version.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mfd/da9052/reg.h&gt;</div><div class='add'>+#include &lt;linux/mfd/da9052/da9052.h&gt;</div><div class='add'>+</div><div class='add'>+#define TSI_PEN_DOWN_STATUS 0x40</div><div class='add'>+</div><div class='add'>+struct da9052_tsi {</div><div class='add'>+	struct da9052 *da9052;</div><div class='add'>+	struct input_dev *dev;</div><div class='add'>+	struct delayed_work ts_pen_work;</div><div class='add'>+	struct mutex mutex;</div><div class='add'>+	unsigned int irq_pendwn;</div><div class='add'>+	unsigned int irq_datardy;</div><div class='add'>+	bool stopped;</div><div class='add'>+	bool adc_on;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void da9052_ts_adc_toggle(struct da9052_tsi *tsi, bool on)</div><div class='add'>+{</div><div class='add'>+	da9052_reg_update(tsi-&gt;da9052, DA9052_TSI_CONT_A_REG, 1 &lt;&lt; 0, on);</div><div class='add'>+	tsi-&gt;adc_on = on;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t da9052_ts_pendwn_irq(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct da9052_tsi *tsi = data;</div><div class='add'>+</div><div class='add'>+	if (!tsi-&gt;stopped) {</div><div class='add'>+		/* Mask PEN_DOWN event and unmask TSI_READY event */</div><div class='add'>+		disable_irq_nosync(tsi-&gt;irq_pendwn);</div><div class='add'>+		enable_irq(tsi-&gt;irq_datardy);</div><div class='add'>+</div><div class='add'>+		da9052_ts_adc_toggle(tsi, true);</div><div class='add'>+</div><div class='add'>+		schedule_delayed_work(&amp;tsi-&gt;ts_pen_work, HZ / 50);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void da9052_ts_read(struct da9052_tsi *tsi)</div><div class='add'>+{</div><div class='add'>+	struct input_dev *input = tsi-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+	u16 x, y, z;</div><div class='add'>+	u8 v;</div><div class='add'>+</div><div class='add'>+	ret = da9052_reg_read(tsi-&gt;da9052, DA9052_TSI_X_MSB_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	x = (u16) ret;</div><div class='add'>+</div><div class='add'>+	ret = da9052_reg_read(tsi-&gt;da9052, DA9052_TSI_Y_MSB_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	y = (u16) ret;</div><div class='add'>+</div><div class='add'>+	ret = da9052_reg_read(tsi-&gt;da9052, DA9052_TSI_Z_MSB_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	z = (u16) ret;</div><div class='add'>+</div><div class='add'>+	ret = da9052_reg_read(tsi-&gt;da9052, DA9052_TSI_LSB_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	v = (u8) ret;</div><div class='add'>+</div><div class='add'>+	x = ((x &lt;&lt; 2) &amp; 0x3fc) | (v &amp; 0x3);</div><div class='add'>+	y = ((y &lt;&lt; 2) &amp; 0x3fc) | ((v &amp; 0xc) &gt;&gt; 2);</div><div class='add'>+	z = ((z &lt;&lt; 2) &amp; 0x3fc) | ((v &amp; 0x30) &gt;&gt; 4);</div><div class='add'>+</div><div class='add'>+	input_report_key(input, BTN_TOUCH, 1);</div><div class='add'>+	input_report_abs(input, ABS_X, x);</div><div class='add'>+	input_report_abs(input, ABS_Y, y);</div><div class='add'>+	input_report_abs(input, ABS_PRESSURE, z);</div><div class='add'>+	input_sync(input);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t da9052_ts_datardy_irq(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct da9052_tsi *tsi = data;</div><div class='add'>+</div><div class='add'>+	da9052_ts_read(tsi);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void da9052_ts_pen_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct da9052_tsi *tsi = container_of(work, struct da9052_tsi,</div><div class='add'>+					      ts_pen_work.work);</div><div class='add'>+	if (!tsi-&gt;stopped) {</div><div class='add'>+		int ret = da9052_reg_read(tsi-&gt;da9052, DA9052_TSI_LSB_REG);</div><div class='add'>+		if (ret &lt; 0 || (ret &amp; TSI_PEN_DOWN_STATUS)) {</div><div class='add'>+			/* Pen is still DOWN (or read error) */</div><div class='add'>+			schedule_delayed_work(&amp;tsi-&gt;ts_pen_work, HZ / 50);</div><div class='add'>+		} else {</div><div class='add'>+			struct input_dev *input = tsi-&gt;dev;</div><div class='add'>+</div><div class='add'>+			/* Pen UP */</div><div class='add'>+			da9052_ts_adc_toggle(tsi, false);</div><div class='add'>+</div><div class='add'>+			/* Report Pen UP */</div><div class='add'>+			input_report_key(input, BTN_TOUCH, 0);</div><div class='add'>+			input_report_abs(input, ABS_PRESSURE, 0);</div><div class='add'>+			input_sync(input);</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * FIXME: Fixes the unhandled irq issue when quick</div><div class='add'>+			 * pen down and pen up events occurs</div><div class='add'>+			 */</div><div class='add'>+			ret = da9052_reg_update(tsi-&gt;da9052,</div><div class='add'>+						DA9052_EVENT_B_REG, 0xC0, 0xC0);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return;</div><div class='add'>+</div><div class='add'>+			/* Mask TSI_READY event and unmask PEN_DOWN event */</div><div class='add'>+			disable_irq(tsi-&gt;irq_datardy);</div><div class='add'>+			enable_irq(tsi-&gt;irq_pendwn);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit da9052_ts_configure_gpio(struct da9052 *da9052)</div><div class='add'>+{</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	error = da9052_reg_update(da9052, DA9052_GPIO_2_3_REG, 0x30, 0);</div><div class='add'>+	if (error &lt; 0)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	error = da9052_reg_update(da9052, DA9052_GPIO_4_5_REG, 0x33, 0);</div><div class='add'>+	if (error &lt; 0)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	error = da9052_reg_update(da9052, DA9052_GPIO_6_7_REG, 0x33, 0);</div><div class='add'>+	if (error &lt; 0)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit da9052_configure_tsi(struct da9052_tsi *tsi)</div><div class='add'>+{</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	error = da9052_ts_configure_gpio(tsi-&gt;da9052);</div><div class='add'>+	if (error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	/* Measure TSI sample every 1ms */</div><div class='add'>+	error = da9052_reg_update(tsi-&gt;da9052, DA9052_ADC_CONT_REG,</div><div class='add'>+				  1 &lt;&lt; 6, 1 &lt;&lt; 6);</div><div class='add'>+	if (error &lt; 0)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	/* TSI_DELAY: 3 slots, TSI_SKIP: 0 slots, TSI_MODE: XYZP */</div><div class='add'>+	error = da9052_reg_update(tsi-&gt;da9052, DA9052_TSI_CONT_A_REG, 0xFC, 0xC0);</div><div class='add'>+	if (error &lt; 0)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	/* Supply TSIRef through LD09 */</div><div class='add'>+	error = da9052_reg_write(tsi-&gt;da9052, DA9052_LDO9_REG, 0x59);</div><div class='add'>+	if (error &lt; 0)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int da9052_ts_input_open(struct input_dev *input_dev)</div><div class='add'>+{</div><div class='add'>+	struct da9052_tsi *tsi = input_get_drvdata(input_dev);</div><div class='add'>+</div><div class='add'>+	tsi-&gt;stopped = false;</div><div class='add'>+	mb();</div><div class='add'>+</div><div class='add'>+	/* Unmask PEN_DOWN event */</div><div class='add'>+	enable_irq(tsi-&gt;irq_pendwn);</div><div class='add'>+</div><div class='add'>+	/* Enable Pen Detect Circuit */</div><div class='add'>+	return da9052_reg_update(tsi-&gt;da9052, DA9052_TSI_CONT_A_REG,</div><div class='add'>+				 1 &lt;&lt; 1, 1 &lt;&lt; 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void da9052_ts_input_close(struct input_dev *input_dev)</div><div class='add'>+{</div><div class='add'>+	struct da9052_tsi *tsi = input_get_drvdata(input_dev);</div><div class='add'>+</div><div class='add'>+	tsi-&gt;stopped = true;</div><div class='add'>+	mb();</div><div class='add'>+	disable_irq(tsi-&gt;irq_pendwn);</div><div class='add'>+	cancel_delayed_work_sync(&amp;tsi-&gt;ts_pen_work);</div><div class='add'>+</div><div class='add'>+	if (tsi-&gt;adc_on) {</div><div class='add'>+		disable_irq(tsi-&gt;irq_datardy);</div><div class='add'>+		da9052_ts_adc_toggle(tsi, false);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If ADC was on that means that pendwn IRQ was disabled</div><div class='add'>+		 * twice and we need to enable it to keep enable/disable</div><div class='add'>+		 * counter balanced. IRQ is still off though.</div><div class='add'>+		 */</div><div class='add'>+		enable_irq(tsi-&gt;irq_pendwn);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable Pen Detect Circuit */</div><div class='add'>+	da9052_reg_update(tsi-&gt;da9052, DA9052_TSI_CONT_A_REG, 1 &lt;&lt; 1, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit da9052_ts_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct da9052 *da9052;</div><div class='add'>+	struct da9052_tsi *tsi;</div><div class='add'>+	struct input_dev *input_dev;</div><div class='add'>+	int irq_pendwn;</div><div class='add'>+	int irq_datardy;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	da9052 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	if (!da9052)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	irq_pendwn = platform_get_irq_byname(pdev, "PENDWN");</div><div class='add'>+	irq_datardy = platform_get_irq_byname(pdev, "TSIRDY");</div><div class='add'>+	if (irq_pendwn &lt; 0 || irq_datardy &lt; 0) {</div><div class='add'>+		dev_err(da9052-&gt;dev, "Unable to determine device interrupts\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tsi = kzalloc(sizeof(struct da9052_tsi), GFP_KERNEL);</div><div class='add'>+	input_dev = input_allocate_device();</div><div class='add'>+	if (!tsi || !input_dev) {</div><div class='add'>+		error = -ENOMEM;</div><div class='add'>+		goto err_free_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tsi-&gt;da9052 = da9052;</div><div class='add'>+	tsi-&gt;dev = input_dev;</div><div class='add'>+	tsi-&gt;irq_pendwn = da9052-&gt;irq_base + irq_pendwn;</div><div class='add'>+	tsi-&gt;irq_datardy = da9052-&gt;irq_base + irq_datardy;</div><div class='add'>+	tsi-&gt;stopped = true;</div><div class='add'>+	INIT_DELAYED_WORK(&amp;tsi-&gt;ts_pen_work, da9052_ts_pen_work);</div><div class='add'>+</div><div class='add'>+	input_dev-&gt;id.version = 0x0101;</div><div class='add'>+	input_dev-&gt;id.vendor = 0x15B6;</div><div class='add'>+	input_dev-&gt;id.product = 0x9052;</div><div class='add'>+	input_dev-&gt;name = "Dialog DA9052 TouchScreen Driver";</div><div class='add'>+	input_dev-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='add'>+	input_dev-&gt;open = da9052_ts_input_open;</div><div class='add'>+	input_dev-&gt;close = da9052_ts_input_close;</div><div class='add'>+</div><div class='add'>+	__set_bit(EV_ABS, input_dev-&gt;evbit);</div><div class='add'>+	__set_bit(EV_KEY, input_dev-&gt;evbit);</div><div class='add'>+	__set_bit(BTN_TOUCH, input_dev-&gt;keybit);</div><div class='add'>+</div><div class='add'>+	input_set_abs_params(input_dev, ABS_X, 0, 1023, 0, 0);</div><div class='add'>+	input_set_abs_params(input_dev, ABS_Y, 0, 1023, 0, 0);</div><div class='add'>+	input_set_abs_params(input_dev, ABS_PRESSURE, 0, 1023, 0, 0);</div><div class='add'>+</div><div class='add'>+	input_set_drvdata(input_dev, tsi);</div><div class='add'>+</div><div class='add'>+	/* Disable Pen Detect Circuit */</div><div class='add'>+	da9052_reg_update(tsi-&gt;da9052, DA9052_TSI_CONT_A_REG, 1 &lt;&lt; 1, 0);</div><div class='add'>+</div><div class='add'>+	/* Disable ADC */</div><div class='add'>+	da9052_ts_adc_toggle(tsi, false);</div><div class='add'>+</div><div class='add'>+	error = request_threaded_irq(tsi-&gt;irq_pendwn,</div><div class='add'>+				     NULL, da9052_ts_pendwn_irq,</div><div class='add'>+				     IRQF_TRIGGER_LOW | IRQF_ONESHOT,</div><div class='add'>+				     "PENDWN", tsi);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(tsi-&gt;da9052-&gt;dev,</div><div class='add'>+			"Failed to register PENDWN IRQ %d, error = %d\n",</div><div class='add'>+			tsi-&gt;irq_pendwn, error);</div><div class='add'>+		goto err_free_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	error = request_threaded_irq(tsi-&gt;irq_datardy,</div><div class='add'>+				     NULL, da9052_ts_datardy_irq,</div><div class='add'>+				     IRQF_TRIGGER_LOW | IRQF_ONESHOT,</div><div class='add'>+				     "TSIRDY", tsi);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(tsi-&gt;da9052-&gt;dev,</div><div class='add'>+			"Failed to register TSIRDY IRQ %d, error = %d\n",</div><div class='add'>+			tsi-&gt;irq_datardy, error);</div><div class='add'>+		goto err_free_pendwn_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Mask PEN_DOWN and TSI_READY events */</div><div class='add'>+	disable_irq(tsi-&gt;irq_pendwn);</div><div class='add'>+	disable_irq(tsi-&gt;irq_datardy);</div><div class='add'>+</div><div class='add'>+	error = da9052_configure_tsi(tsi);</div><div class='add'>+	if (error)</div><div class='add'>+		goto err_free_datardy_irq;</div><div class='add'>+</div><div class='add'>+	error = input_register_device(tsi-&gt;dev);</div><div class='add'>+	if (error)</div><div class='add'>+		goto err_free_datardy_irq;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, tsi);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_datardy_irq:</div><div class='add'>+	free_irq(tsi-&gt;irq_datardy, tsi);</div><div class='add'>+err_free_pendwn_irq:</div><div class='add'>+	free_irq(tsi-&gt;irq_pendwn, tsi);</div><div class='add'>+err_free_mem:</div><div class='add'>+	kfree(tsi);</div><div class='add'>+	input_free_device(input_dev);</div><div class='add'>+</div><div class='add'>+	return error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int  __devexit da9052_ts_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct da9052_tsi *tsi = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	da9052_reg_write(tsi-&gt;da9052, DA9052_LDO9_REG, 0x19);</div><div class='add'>+</div><div class='add'>+	free_irq(tsi-&gt;irq_pendwn, tsi);</div><div class='add'>+	free_irq(tsi-&gt;irq_datardy, tsi);</div><div class='add'>+</div><div class='add'>+	input_unregister_device(tsi-&gt;dev);</div><div class='add'>+	kfree(tsi);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver da9052_tsi_driver = {</div><div class='add'>+	.probe	= da9052_ts_probe,</div><div class='add'>+	.remove	= __devexit_p(da9052_ts_remove),</div><div class='add'>+	.driver	= {</div><div class='add'>+		.name	= "da9052-tsi",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(da9052_tsi_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Touchscreen driver for Dialog Semiconductor DA9052");</div><div class='add'>+MODULE_AUTHOR("Anthony Olech &lt;Anthony.Olech@diasemi.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_ALIAS("platform:da9052-tsi");</div><div class='head'>diff --git a/drivers/input/touchscreen/dynapro.c b/drivers/input/touchscreen/dynapro.c<br/>index 455353908bdf..1809677a6513 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/dynapro.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/dynapro.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/dynapro.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/dynapro.c</a></div><div class='hunk'>@@ -188,19 +188,4 @@ static struct serio_driver dynapro_drv = {</div><div class='ctx'> 	.disconnect	= dynapro_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init dynapro_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;dynapro_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit dynapro_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;dynapro_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(dynapro_init);</div><div class='del'>-module_exit(dynapro_exit);</div><div class='add'>+module_serio_driver(dynapro_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/elo.c b/drivers/input/touchscreen/elo.c<br/>index 486d31ba9c09..957423d1471d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/elo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/elo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/elo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/elo.c</a></div><div class='hunk'>@@ -405,19 +405,4 @@ static struct serio_driver elo_drv = {</div><div class='ctx'> 	.disconnect	= elo_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init elo_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;elo_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit elo_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;elo_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(elo_init);</div><div class='del'>-module_exit(elo_exit);</div><div class='add'>+module_serio_driver(elo_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/fujitsu_ts.c b/drivers/input/touchscreen/fujitsu_ts.c<br/>index 80b21800355f..10794ddbdf58 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/fujitsu_ts.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/fujitsu_ts.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/fujitsu_ts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/fujitsu_ts.c</a></div><div class='hunk'>@@ -175,15 +175,4 @@ static struct serio_driver fujitsu_drv = {</div><div class='ctx'> 	.disconnect	= fujitsu_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init fujitsu_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;fujitsu_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit fujitsu_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;fujitsu_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(fujitsu_init);</div><div class='del'>-module_exit(fujitsu_exit);</div><div class='add'>+module_serio_driver(fujitsu_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/gunze.c b/drivers/input/touchscreen/gunze.c<br/>index a54f90e02ab6..41c71766bf18 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/gunze.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/gunze.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/gunze.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/gunze.c</a></div><div class='hunk'>@@ -186,19 +186,4 @@ static struct serio_driver gunze_drv = {</div><div class='ctx'> 	.disconnect	= gunze_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init gunze_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;gunze_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit gunze_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;gunze_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(gunze_init);</div><div class='del'>-module_exit(gunze_exit);</div><div class='add'>+module_serio_driver(gunze_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/h3600_ts_input.c b/drivers/input/touchscreen/h3600_ts_input.c<br/>index 6107e563e681..b9e8686a6f1c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/h3600_ts_input.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/h3600_ts_input.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/h3600_ts_input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/h3600_ts_input.c</a></div><div class='hunk'>@@ -476,19 +476,4 @@ static struct serio_driver h3600ts_drv = {</div><div class='ctx'> 	.disconnect	= h3600ts_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init h3600ts_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;h3600ts_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit h3600ts_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;h3600ts_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(h3600ts_init);</div><div class='del'>-module_exit(h3600ts_exit);</div><div class='add'>+module_serio_driver(h3600ts_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/hampshire.c b/drivers/input/touchscreen/hampshire.c<br/>index 2da6cc31bb21..0cc47ea98acf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/hampshire.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/hampshire.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/hampshire.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/hampshire.c</a></div><div class='hunk'>@@ -187,19 +187,4 @@ static struct serio_driver hampshire_drv = {</div><div class='ctx'> 	.disconnect	= hampshire_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init hampshire_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;hampshire_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit hampshire_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;hampshire_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(hampshire_init);</div><div class='del'>-module_exit(hampshire_exit);</div><div class='add'>+module_serio_driver(hampshire_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/inexio.c b/drivers/input/touchscreen/inexio.c<br/>index 192ade0a0fb9..a29c99c32245 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/inexio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/inexio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/inexio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/inexio.c</a></div><div class='hunk'>@@ -189,19 +189,4 @@ static struct serio_driver inexio_drv = {</div><div class='ctx'> 	.disconnect	= inexio_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init inexio_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;inexio_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit inexio_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;inexio_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(inexio_init);</div><div class='del'>-module_exit(inexio_exit);</div><div class='add'>+module_serio_driver(inexio_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/lpc32xx_ts.c b/drivers/input/touchscreen/lpc32xx_ts.c<br/>index afcd0691ec67..4c2b8ed3bf16 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/lpc32xx_ts.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/lpc32xx_ts.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/lpc32xx_ts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/lpc32xx_ts.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Touchscreen controller register offsets</div><div class='hunk'>@@ -383,6 +384,14 @@ static const struct dev_pm_ops lpc32xx_ts_pm_ops = {</div><div class='ctx'> #define LPC32XX_TS_PM_OPS NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static struct of_device_id lpc32xx_tsc_of_match[] = {</div><div class='add'>+	{ .compatible = "nxp,lpc3220-tsc", },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, lpc32xx_tsc_of_match);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct platform_driver lpc32xx_ts_driver = {</div><div class='ctx'> 	.probe		= lpc32xx_ts_probe,</div><div class='ctx'> 	.remove		= __devexit_p(lpc32xx_ts_remove),</div><div class='hunk'>@@ -390,6 +399,7 @@ static struct platform_driver lpc32xx_ts_driver = {</div><div class='ctx'> 		.name	= MOD_NAME,</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 		.pm	= LPC32XX_TS_PM_OPS,</div><div class='add'>+		.of_match_table = of_match_ptr(lpc32xx_tsc_of_match),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> module_platform_driver(lpc32xx_ts_driver);</div><div class='head'>diff --git a/drivers/input/touchscreen/mtouch.c b/drivers/input/touchscreen/mtouch.c<br/>index 9077228418b7..eb66b7c37c2f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/mtouch.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/mtouch.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/mtouch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/mtouch.c</a></div><div class='hunk'>@@ -202,19 +202,4 @@ static struct serio_driver mtouch_drv = {</div><div class='ctx'> 	.disconnect	= mtouch_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init mtouch_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;mtouch_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit mtouch_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;mtouch_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(mtouch_init);</div><div class='del'>-module_exit(mtouch_exit);</div><div class='add'>+module_serio_driver(mtouch_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/penmount.c b/drivers/input/touchscreen/penmount.c<br/>index 4c012fb2b01e..4ccde45b9da2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/penmount.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/penmount.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/penmount.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/penmount.c</a></div><div class='hunk'>@@ -317,19 +317,4 @@ static struct serio_driver pm_drv = {</div><div class='ctx'> 	.disconnect	= pm_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init pm_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;pm_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit pm_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;pm_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(pm_init);</div><div class='del'>-module_exit(pm_exit);</div><div class='add'>+module_serio_driver(pm_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/st1232.c b/drivers/input/touchscreen/st1232.c<br/>index cbbf71b22696..6cb68a1981bf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/st1232.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/st1232.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/st1232.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/st1232.c</a></div><div class='hunk'>@@ -218,7 +218,7 @@ static int __devexit st1232_ts_remove(struct i2c_client *client)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='ctx'> static int st1232_ts_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct i2c_client *client = to_i2c_client(dev);</div><div class='hunk'>@@ -243,18 +243,25 @@ static int st1232_ts_resume(struct device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct dev_pm_ops st1232_ts_pm_ops = {</div><div class='del'>-	.suspend	= st1232_ts_suspend,</div><div class='del'>-	.resume		= st1232_ts_resume,</div><div class='del'>-};</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static SIMPLE_DEV_PM_OPS(st1232_ts_pm_ops,</div><div class='add'>+			 st1232_ts_suspend, st1232_ts_resume);</div><div class='add'>+</div><div class='ctx'> static const struct i2c_device_id st1232_ts_id[] = {</div><div class='ctx'> 	{ ST1232_TS_NAME, 0 },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(i2c, st1232_ts_id);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static const struct of_device_id st1232_ts_dt_ids[] __devinitconst = {</div><div class='add'>+	{ .compatible = "sitronix,st1232", },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, st1232_ts_dt_ids);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct i2c_driver st1232_ts_driver = {</div><div class='ctx'> 	.probe		= st1232_ts_probe,</div><div class='ctx'> 	.remove		= __devexit_p(st1232_ts_remove),</div><div class='hunk'>@@ -262,9 +269,8 @@ static struct i2c_driver st1232_ts_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	= ST1232_TS_NAME,</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='del'>-#ifdef CONFIG_PM</div><div class='add'>+		.of_match_table = of_match_ptr(st1232_ts_dt_ids),</div><div class='ctx'> 		.pm	= &amp;st1232_ts_pm_ops,</div><div class='del'>-#endif</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/input/touchscreen/touchit213.c b/drivers/input/touchscreen/touchit213.c<br/>index d1297ba19daf..5f29e5b8e1c1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/touchit213.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/touchit213.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/touchit213.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/touchit213.c</a></div><div class='hunk'>@@ -216,19 +216,4 @@ static struct serio_driver touchit213_drv = {</div><div class='ctx'> 	.disconnect	= touchit213_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init touchit213_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;touchit213_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit touchit213_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;touchit213_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(touchit213_init);</div><div class='del'>-module_exit(touchit213_exit);</div><div class='add'>+module_serio_driver(touchit213_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/touchright.c b/drivers/input/touchscreen/touchright.c<br/>index 3a5c142c2a78..8a2887daf194 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/touchright.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/touchright.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/touchright.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/touchright.c</a></div><div class='hunk'>@@ -176,19 +176,4 @@ static struct serio_driver tr_drv = {</div><div class='ctx'> 	.disconnect	= tr_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init tr_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;tr_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit tr_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;tr_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(tr_init);</div><div class='del'>-module_exit(tr_exit);</div><div class='add'>+module_serio_driver(tr_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/touchwin.c b/drivers/input/touchscreen/touchwin.c<br/>index 763a656a59f8..588cdcb839dd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/touchwin.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/touchwin.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/touchwin.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/touchwin.c</a></div><div class='hunk'>@@ -183,19 +183,4 @@ static struct serio_driver tw_drv = {</div><div class='ctx'> 	.disconnect	= tw_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The functions for inserting/removing us as a module.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init tw_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;tw_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit tw_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;tw_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(tw_init);</div><div class='del'>-module_exit(tw_exit);</div><div class='add'>+module_serio_driver(tw_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/tsc40.c b/drivers/input/touchscreen/tsc40.c<br/>index 29d5ed4dd31c..63209aaa55f0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/tsc40.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/tsc40.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/tsc40.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/tsc40.c</a></div><div class='hunk'>@@ -167,17 +167,7 @@ static struct serio_driver tsc_drv = {</div><div class='ctx'> 	.disconnect     = tsc_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init tsc_ser_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;tsc_drv);</div><div class='del'>-}</div><div class='del'>-module_init(tsc_ser_init);</div><div class='del'>-</div><div class='del'>-static void __exit tsc_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;tsc_drv);</div><div class='del'>-}</div><div class='del'>-module_exit(tsc_exit);</div><div class='add'>+module_serio_driver(tsc_drv);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Sebastian Andrzej Siewior &lt;bigeasy@linutronix.de&gt;");</div><div class='ctx'> MODULE_DESCRIPTION(DRIVER_DESC);</div><div class='head'>diff --git a/drivers/input/touchscreen/usbtouchscreen.c b/drivers/input/touchscreen/usbtouchscreen.c<br/>index 22cd96f58c99..e32709e0dd65 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/usbtouchscreen.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/usbtouchscreen.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/usbtouchscreen.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/usbtouchscreen.c</a></div><div class='hunk'>@@ -269,8 +269,9 @@ static int e2i_init(struct usbtouch_usb *usbtouch)</div><div class='ctx'> 	                      0x01, 0x02, 0x0000, 0x0081,</div><div class='ctx'> 	                      NULL, 0, USB_CTRL_SET_TIMEOUT);</div><div class='ctx'> </div><div class='del'>-	dbg("%s - usb_control_msg - E2I_RESET - bytes|err: %d",</div><div class='del'>-	    __func__, ret);</div><div class='add'>+	dev_dbg(&amp;usbtouch-&gt;interface-&gt;dev,</div><div class='add'>+		"%s - usb_control_msg - E2I_RESET - bytes|err: %d\n",</div><div class='add'>+		__func__, ret);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -425,8 +426,9 @@ static int mtouch_init(struct usbtouch_usb *usbtouch)</div><div class='ctx'> 	                      MTOUCHUSB_RESET,</div><div class='ctx'> 	                      USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,</div><div class='ctx'> 	                      1, 0, NULL, 0, USB_CTRL_SET_TIMEOUT);</div><div class='del'>-	dbg("%s - usb_control_msg - MTOUCHUSB_RESET - bytes|err: %d",</div><div class='del'>-	    __func__, ret);</div><div class='add'>+	dev_dbg(&amp;usbtouch-&gt;interface-&gt;dev,</div><div class='add'>+		"%s - usb_control_msg - MTOUCHUSB_RESET - bytes|err: %d\n",</div><div class='add'>+		__func__, ret);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	msleep(150);</div><div class='hunk'>@@ -436,8 +438,9 @@ static int mtouch_init(struct usbtouch_usb *usbtouch)</div><div class='ctx'> 				      MTOUCHUSB_ASYNC_REPORT,</div><div class='ctx'> 				      USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,</div><div class='ctx'> 				      1, 1, NULL, 0, USB_CTRL_SET_TIMEOUT);</div><div class='del'>-		dbg("%s - usb_control_msg - MTOUCHUSB_ASYNC_REPORT - bytes|err: %d",</div><div class='del'>-		    __func__, ret);</div><div class='add'>+		dev_dbg(&amp;usbtouch-&gt;interface-&gt;dev,</div><div class='add'>+			"%s - usb_control_msg - MTOUCHUSB_ASYNC_REPORT - bytes|err: %d\n",</div><div class='add'>+			__func__, ret);</div><div class='ctx'> 		if (ret &gt;= 0)</div><div class='ctx'> 			break;</div><div class='ctx'> 		if (ret != -EPIPE)</div><div class='hunk'>@@ -737,27 +740,29 @@ static int jastec_read_data(struct usbtouch_usb *dev, unsigned char *pkt)</div><div class='ctx'> #ifdef CONFIG_TOUCHSCREEN_USB_ZYTRONIC</div><div class='ctx'> static int zytronic_read_data(struct usbtouch_usb *dev, unsigned char *pkt)</div><div class='ctx'> {</div><div class='add'>+	struct usb_interface *intf = dev-&gt;interface;</div><div class='add'>+</div><div class='ctx'> 	switch (pkt[0]) {</div><div class='ctx'> 	case 0x3A: /* command response */</div><div class='del'>-		dbg("%s: Command response %d", __func__, pkt[1]);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "%s: Command response %d\n", __func__, pkt[1]);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case 0xC0: /* down */</div><div class='ctx'> 		dev-&gt;x = (pkt[1] &amp; 0x7f) | ((pkt[2] &amp; 0x07) &lt;&lt; 7);</div><div class='ctx'> 		dev-&gt;y = (pkt[3] &amp; 0x7f) | ((pkt[4] &amp; 0x07) &lt;&lt; 7);</div><div class='ctx'> 		dev-&gt;touch = 1;</div><div class='del'>-		dbg("%s: down %d,%d", __func__, dev-&gt;x, dev-&gt;y);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "%s: down %d,%d\n", __func__, dev-&gt;x, dev-&gt;y);</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	case 0x80: /* up */</div><div class='ctx'> 		dev-&gt;x = (pkt[1] &amp; 0x7f) | ((pkt[2] &amp; 0x07) &lt;&lt; 7);</div><div class='ctx'> 		dev-&gt;y = (pkt[3] &amp; 0x7f) | ((pkt[4] &amp; 0x07) &lt;&lt; 7);</div><div class='ctx'> 		dev-&gt;touch = 0;</div><div class='del'>-		dbg("%s: up %d,%d", __func__, dev-&gt;x, dev-&gt;y);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "%s: up %d,%d\n", __func__, dev-&gt;x, dev-&gt;y);</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		dbg("%s: Unknown return %d", __func__, pkt[0]);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev, "%s: Unknown return %d\n", __func__, pkt[0]);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -812,7 +817,8 @@ static int nexio_alloc(struct usbtouch_usb *usbtouch)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;ack = usb_alloc_urb(0, GFP_KERNEL);</div><div class='ctx'> 	if (!priv-&gt;ack) {</div><div class='del'>-		dbg("%s - usb_alloc_urb failed: usbtouch-&gt;ack", __func__);</div><div class='add'>+		dev_dbg(&amp;usbtouch-&gt;interface-&gt;dev,</div><div class='add'>+			"%s - usb_alloc_urb failed: usbtouch-&gt;ack\n", __func__);</div><div class='ctx'> 		goto err_ack_buf;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1349,6 +1355,7 @@ out_flush_buf:</div><div class='ctx'> static void usbtouch_irq(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbtouch_usb *usbtouch = urb-&gt;context;</div><div class='add'>+	struct device *dev = &amp;usbtouch-&gt;interface-&gt;dev;</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='hunk'>@@ -1357,20 +1364,21 @@ static void usbtouch_irq(struct urb *urb)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case -ETIME:</div><div class='ctx'> 		/* this urb is timing out */</div><div class='del'>-		dbg("%s - urb timed out - was the device unplugged?",</div><div class='del'>-		    __func__);</div><div class='add'>+		dev_dbg(dev,</div><div class='add'>+			"%s - urb timed out - was the device unplugged?\n",</div><div class='add'>+			__func__);</div><div class='ctx'> 		return;</div><div class='ctx'> 	case -ECONNRESET:</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 	case -EPIPE:</div><div class='ctx'> 		/* this urb is terminated, clean up */</div><div class='del'>-		dbg("%s - urb shutting down with status: %d",</div><div class='del'>-		    __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(dev, "%s - urb shutting down with status: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='del'>-		dbg("%s - nonzero urb status received: %d",</div><div class='del'>-		    __func__, urb-&gt;status);</div><div class='add'>+		dev_dbg(dev, "%s - nonzero urb status received: %d\n",</div><div class='add'>+			__func__, urb-&gt;status);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1380,8 +1388,8 @@ exit:</div><div class='ctx'> 	usb_mark_last_busy(interface_to_usbdev(usbtouch-&gt;interface));</div><div class='ctx'> 	retval = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		err("%s - usb_submit_urb failed with result: %d",</div><div class='del'>-		    __func__, retval);</div><div class='add'>+		dev_err(dev, "%s - usb_submit_urb failed with result: %d\n",</div><div class='add'>+			__func__, retval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int usbtouch_open(struct input_dev *input)</div><div class='hunk'>@@ -1456,8 +1464,9 @@ static int usbtouch_reset_resume(struct usb_interface *intf)</div><div class='ctx'> 	if (usbtouch-&gt;type-&gt;init) {</div><div class='ctx'> 		err = usbtouch-&gt;type-&gt;init(usbtouch);</div><div class='ctx'> 		if (err) {</div><div class='del'>-			dbg("%s - type-&gt;init() failed, err: %d",</div><div class='del'>-			    __func__, err);</div><div class='add'>+			dev_dbg(&amp;intf-&gt;dev,</div><div class='add'>+				"%s - type-&gt;init() failed, err: %d\n",</div><div class='add'>+				__func__, err);</div><div class='ctx'> 			return err;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1532,7 +1541,8 @@ static int usbtouch_probe(struct usb_interface *intf,</div><div class='ctx'> </div><div class='ctx'> 	usbtouch-&gt;irq = usb_alloc_urb(0, GFP_KERNEL);</div><div class='ctx'> 	if (!usbtouch-&gt;irq) {</div><div class='del'>-		dbg("%s - usb_alloc_urb failed: usbtouch-&gt;irq", __func__);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev,</div><div class='add'>+			"%s - usb_alloc_urb failed: usbtouch-&gt;irq\n", __func__);</div><div class='ctx'> 		goto out_free_buffers;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1594,7 +1604,9 @@ static int usbtouch_probe(struct usb_interface *intf,</div><div class='ctx'> 	if (type-&gt;alloc) {</div><div class='ctx'> 		err = type-&gt;alloc(usbtouch);</div><div class='ctx'> 		if (err) {</div><div class='del'>-			dbg("%s - type-&gt;alloc() failed, err: %d", __func__, err);</div><div class='add'>+			dev_dbg(&amp;intf-&gt;dev,</div><div class='add'>+				"%s - type-&gt;alloc() failed, err: %d\n",</div><div class='add'>+				__func__, err);</div><div class='ctx'> 			goto out_free_urb;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1603,14 +1615,18 @@ static int usbtouch_probe(struct usb_interface *intf,</div><div class='ctx'> 	if (type-&gt;init) {</div><div class='ctx'> 		err = type-&gt;init(usbtouch);</div><div class='ctx'> 		if (err) {</div><div class='del'>-			dbg("%s - type-&gt;init() failed, err: %d", __func__, err);</div><div class='add'>+			dev_dbg(&amp;intf-&gt;dev,</div><div class='add'>+				"%s - type-&gt;init() failed, err: %d\n",</div><div class='add'>+				__func__, err);</div><div class='ctx'> 			goto out_do_exit;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = input_register_device(usbtouch-&gt;input);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dbg("%s - input_register_device failed, err: %d", __func__, err);</div><div class='add'>+		dev_dbg(&amp;intf-&gt;dev,</div><div class='add'>+			"%s - input_register_device failed, err: %d\n",</div><div class='add'>+			__func__, err);</div><div class='ctx'> 		goto out_do_exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1622,8 +1638,9 @@ static int usbtouch_probe(struct usb_interface *intf,</div><div class='ctx'> 		err = usb_submit_urb(usbtouch-&gt;irq, GFP_KERNEL);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			usb_autopm_put_interface(intf);</div><div class='del'>-			err("%s - usb_submit_urb failed with result: %d",</div><div class='del'>-			    __func__, err);</div><div class='add'>+			dev_err(&amp;intf-&gt;dev,</div><div class='add'>+				"%s - usb_submit_urb failed with result: %d\n",</div><div class='add'>+				__func__, err);</div><div class='ctx'> 			goto out_unregister_input;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1650,12 +1667,12 @@ static void usbtouch_disconnect(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbtouch_usb *usbtouch = usb_get_intfdata(intf);</div><div class='ctx'> </div><div class='del'>-	dbg("%s - called", __func__);</div><div class='del'>-</div><div class='ctx'> 	if (!usbtouch)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	dbg("%s - usbtouch is initialized, cleaning up", __func__);</div><div class='add'>+	dev_dbg(&amp;intf-&gt;dev,</div><div class='add'>+		"%s - usbtouch is initialized, cleaning up\n", __func__);</div><div class='add'>+</div><div class='ctx'> 	usb_set_intfdata(intf, NULL);</div><div class='ctx'> 	/* this will stop IO via close */</div><div class='ctx'> 	input_unregister_device(usbtouch-&gt;input);</div><div class='head'>diff --git a/drivers/input/touchscreen/wacom_i2c.c b/drivers/input/touchscreen/wacom_i2c.c<br/>new file mode 100644<br/>index 000000000000..35572575d34a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/wacom_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/wacom_i2c.c</a></div><div class='hunk'>@@ -0,0 +1,282 @@</div><div class='add'>+/*</div><div class='add'>+ * Wacom Penabled Driver for I2C</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2011 Tatsunosuke Tobita, Wacom.</div><div class='add'>+ * &lt;tobita.tatsunosuke@wacom.co.jp&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it</div><div class='add'>+ * and/or modify it under the terms of the GNU General</div><div class='add'>+ * Public License as published by the Free Software</div><div class='add'>+ * Foundation; either version of 2 of the License,</div><div class='add'>+ * or (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/input.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;asm/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+#define WACOM_CMD_QUERY0	0x04</div><div class='add'>+#define WACOM_CMD_QUERY1	0x00</div><div class='add'>+#define WACOM_CMD_QUERY2	0x33</div><div class='add'>+#define WACOM_CMD_QUERY3	0x02</div><div class='add'>+#define WACOM_CMD_THROW0	0x05</div><div class='add'>+#define WACOM_CMD_THROW1	0x00</div><div class='add'>+#define WACOM_QUERY_SIZE	19</div><div class='add'>+#define WACOM_RETRY_CNT		100</div><div class='add'>+</div><div class='add'>+struct wacom_features {</div><div class='add'>+	int x_max;</div><div class='add'>+	int y_max;</div><div class='add'>+	int pressure_max;</div><div class='add'>+	char fw_version;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct wacom_i2c {</div><div class='add'>+	struct i2c_client *client;</div><div class='add'>+	struct input_dev *input;</div><div class='add'>+	u8 data[WACOM_QUERY_SIZE];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int wacom_query_device(struct i2c_client *client,</div><div class='add'>+			      struct wacom_features *features)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 cmd1[] = { WACOM_CMD_QUERY0, WACOM_CMD_QUERY1,</div><div class='add'>+			WACOM_CMD_QUERY2, WACOM_CMD_QUERY3 };</div><div class='add'>+	u8 cmd2[] = { WACOM_CMD_THROW0, WACOM_CMD_THROW1 };</div><div class='add'>+	u8 data[WACOM_QUERY_SIZE];</div><div class='add'>+	struct i2c_msg msgs[] = {</div><div class='add'>+		{</div><div class='add'>+			.addr = client-&gt;addr,</div><div class='add'>+			.flags = 0,</div><div class='add'>+			.len = sizeof(cmd1),</div><div class='add'>+			.buf = cmd1,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.addr = client-&gt;addr,</div><div class='add'>+			.flags = 0,</div><div class='add'>+			.len = sizeof(cmd2),</div><div class='add'>+			.buf = cmd2,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.addr = client-&gt;addr,</div><div class='add'>+			.flags = I2C_M_RD,</div><div class='add'>+			.len = sizeof(data),</div><div class='add'>+			.buf = data,</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ret = i2c_transfer(client-&gt;adapter, msgs, ARRAY_SIZE(msgs));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	if (ret != ARRAY_SIZE(msgs))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	features-&gt;x_max = get_unaligned_le16(&amp;data[3]);</div><div class='add'>+	features-&gt;y_max = get_unaligned_le16(&amp;data[5]);</div><div class='add'>+	features-&gt;pressure_max = get_unaligned_le16(&amp;data[11]);</div><div class='add'>+	features-&gt;fw_version = get_unaligned_le16(&amp;data[13]);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev,</div><div class='add'>+		"x_max:%d, y_max:%d, pressure:%d, fw:%d\n",</div><div class='add'>+		features-&gt;x_max, features-&gt;y_max,</div><div class='add'>+		features-&gt;pressure_max, features-&gt;fw_version);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t wacom_i2c_irq(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct wacom_i2c *wac_i2c = dev_id;</div><div class='add'>+	struct input_dev *input = wac_i2c-&gt;input;</div><div class='add'>+	u8 *data = wac_i2c-&gt;data;</div><div class='add'>+	unsigned int x, y, pressure;</div><div class='add'>+	unsigned char tsw, f1, f2, ers;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	error = i2c_master_recv(wac_i2c-&gt;client,</div><div class='add'>+				wac_i2c-&gt;data, sizeof(wac_i2c-&gt;data));</div><div class='add'>+	if (error &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	tsw = data[3] &amp; 0x01;</div><div class='add'>+	ers = data[3] &amp; 0x04;</div><div class='add'>+	f1 = data[3] &amp; 0x02;</div><div class='add'>+	f2 = data[3] &amp; 0x10;</div><div class='add'>+	x = le16_to_cpup((__le16 *)&amp;data[4]);</div><div class='add'>+	y = le16_to_cpup((__le16 *)&amp;data[6]);</div><div class='add'>+	pressure = le16_to_cpup((__le16 *)&amp;data[8]);</div><div class='add'>+</div><div class='add'>+	input_report_key(input, BTN_TOUCH, tsw || ers);</div><div class='add'>+	input_report_key(input, BTN_TOOL_PEN, tsw);</div><div class='add'>+	input_report_key(input, BTN_TOOL_RUBBER, ers);</div><div class='add'>+	input_report_key(input, BTN_STYLUS, f1);</div><div class='add'>+	input_report_key(input, BTN_STYLUS2, f2);</div><div class='add'>+	input_report_abs(input, ABS_X, x);</div><div class='add'>+	input_report_abs(input, ABS_Y, y);</div><div class='add'>+	input_report_abs(input, ABS_PRESSURE, pressure);</div><div class='add'>+	input_sync(input);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wacom_i2c_open(struct input_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct wacom_i2c *wac_i2c = input_get_drvdata(dev);</div><div class='add'>+	struct i2c_client *client = wac_i2c-&gt;client;</div><div class='add'>+</div><div class='add'>+	enable_irq(client-&gt;irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wacom_i2c_close(struct input_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct wacom_i2c *wac_i2c = input_get_drvdata(dev);</div><div class='add'>+	struct i2c_client *client = wac_i2c-&gt;client;</div><div class='add'>+</div><div class='add'>+	disable_irq(client-&gt;irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit wacom_i2c_probe(struct i2c_client *client,</div><div class='add'>+				     const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct wacom_i2c *wac_i2c;</div><div class='add'>+	struct input_dev *input;</div><div class='add'>+	struct wacom_features features;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	if (!i2c_check_functionality(client-&gt;adapter, I2C_FUNC_I2C)) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "i2c_check_functionality error\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	error = wacom_query_device(client, &amp;features);</div><div class='add'>+	if (error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	wac_i2c = kzalloc(sizeof(*wac_i2c), GFP_KERNEL);</div><div class='add'>+	input = input_allocate_device();</div><div class='add'>+	if (!wac_i2c || !input) {</div><div class='add'>+		error = -ENOMEM;</div><div class='add'>+		goto err_free_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wac_i2c-&gt;client = client;</div><div class='add'>+	wac_i2c-&gt;input = input;</div><div class='add'>+</div><div class='add'>+	input-&gt;name = "Wacom I2C Digitizer";</div><div class='add'>+	input-&gt;id.bustype = BUS_I2C;</div><div class='add'>+	input-&gt;id.vendor = 0x56a;</div><div class='add'>+	input-&gt;id.version = features.fw_version;</div><div class='add'>+	input-&gt;dev.parent = &amp;client-&gt;dev;</div><div class='add'>+	input-&gt;open = wacom_i2c_open;</div><div class='add'>+	input-&gt;close = wacom_i2c_close;</div><div class='add'>+</div><div class='add'>+	input-&gt;evbit[0] |= BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);</div><div class='add'>+</div><div class='add'>+	__set_bit(BTN_TOOL_PEN, input-&gt;keybit);</div><div class='add'>+	__set_bit(BTN_TOOL_RUBBER, input-&gt;keybit);</div><div class='add'>+	__set_bit(BTN_STYLUS, input-&gt;keybit);</div><div class='add'>+	__set_bit(BTN_STYLUS2, input-&gt;keybit);</div><div class='add'>+	__set_bit(BTN_TOUCH, input-&gt;keybit);</div><div class='add'>+</div><div class='add'>+	input_set_abs_params(input, ABS_X, 0, features.x_max, 0, 0);</div><div class='add'>+	input_set_abs_params(input, ABS_Y, 0, features.y_max, 0, 0);</div><div class='add'>+	input_set_abs_params(input, ABS_PRESSURE,</div><div class='add'>+			     0, features.pressure_max, 0, 0);</div><div class='add'>+</div><div class='add'>+	input_set_drvdata(input, wac_i2c);</div><div class='add'>+</div><div class='add'>+	error = request_threaded_irq(client-&gt;irq, NULL, wacom_i2c_irq,</div><div class='add'>+				     IRQF_TRIGGER_LOW | IRQF_ONESHOT,</div><div class='add'>+				     "wacom_i2c", wac_i2c);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev,</div><div class='add'>+			"Failed to enable IRQ, error: %d\n", error);</div><div class='add'>+		goto err_free_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable the IRQ, we'll enable it in wac_i2c_open() */</div><div class='add'>+	disable_irq(client-&gt;irq);</div><div class='add'>+</div><div class='add'>+	error = input_register_device(wac_i2c-&gt;input);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev,</div><div class='add'>+			"Failed to register input device, error: %d\n", error);</div><div class='add'>+		goto err_free_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i2c_set_clientdata(client, wac_i2c);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irq:</div><div class='add'>+	free_irq(client-&gt;irq, wac_i2c);</div><div class='add'>+err_free_mem:</div><div class='add'>+	input_free_device(input);</div><div class='add'>+	kfree(wac_i2c);</div><div class='add'>+</div><div class='add'>+	return error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit wacom_i2c_remove(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct wacom_i2c *wac_i2c = i2c_get_clientdata(client);</div><div class='add'>+</div><div class='add'>+	free_irq(client-&gt;irq, wac_i2c);</div><div class='add'>+	input_unregister_device(wac_i2c-&gt;input);</div><div class='add'>+	kfree(wac_i2c);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int wacom_i2c_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = to_i2c_client(dev);</div><div class='add'>+</div><div class='add'>+	disable_irq(client-&gt;irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wacom_i2c_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = to_i2c_client(dev);</div><div class='add'>+</div><div class='add'>+	enable_irq(client-&gt;irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(wacom_i2c_pm, wacom_i2c_suspend, wacom_i2c_resume);</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id wacom_i2c_id[] = {</div><div class='add'>+	{ "WAC_I2C_EMR", 0 },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, wacom_i2c_id);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver wacom_i2c_driver = {</div><div class='add'>+	.driver	= {</div><div class='add'>+		.name	= "wacom_i2c",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+		.pm	= &amp;wacom_i2c_pm,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	.probe		= wacom_i2c_probe,</div><div class='add'>+	.remove		= __devexit_p(wacom_i2c_remove),</div><div class='add'>+	.id_table	= wacom_i2c_id,</div><div class='add'>+};</div><div class='add'>+module_i2c_driver(wacom_i2c_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Tatsunosuke Tobita &lt;tobita.tatsunosuke@wacom.co.jp&gt;");</div><div class='add'>+MODULE_DESCRIPTION("WACOM EMR I2C Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/input/touchscreen/wacom_w8001.c b/drivers/input/touchscreen/wacom_w8001.c<br/>index 1569a3934ab2..8f9ad2f893b8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/wacom_w8001.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/wacom_w8001.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/wacom_w8001.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/wacom_w8001.c</a></div><div class='hunk'>@@ -594,15 +594,4 @@ static struct serio_driver w8001_drv = {</div><div class='ctx'> 	.disconnect	= w8001_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init w8001_init(void)</div><div class='del'>-{</div><div class='del'>-	return serio_register_driver(&amp;w8001_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit w8001_exit(void)</div><div class='del'>-{</div><div class='del'>-	serio_unregister_driver(&amp;w8001_drv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(w8001_init);</div><div class='del'>-module_exit(w8001_exit);</div><div class='add'>+module_serio_driver(w8001_drv);</div><div class='head'>diff --git a/drivers/input/touchscreen/wm831x-ts.c b/drivers/input/touchscreen/wm831x-ts.c<br/>index 4bc851a9dc3d..e83410721e38 100644<br/>--- a/<a href='/drm-misc/tree/drivers/input/touchscreen/wm831x-ts.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/input/touchscreen/wm831x-ts.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/input/touchscreen/wm831x-ts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/input/touchscreen/wm831x-ts.c</a></div><div class='hunk'>@@ -260,15 +260,16 @@ static __devinit int wm831x_ts_probe(struct platform_device *pdev)</div><div class='ctx'> 	 * If we have a direct IRQ use it, otherwise use the interrupt</div><div class='ctx'> 	 * from the WM831x IRQ controller.</div><div class='ctx'> 	 */</div><div class='add'>+	wm831x_ts-&gt;data_irq = wm831x_irq(wm831x,</div><div class='add'>+					 platform_get_irq_byname(pdev,</div><div class='add'>+								 "TCHDATA"));</div><div class='ctx'> 	if (pdata &amp;&amp; pdata-&gt;data_irq)</div><div class='ctx'> 		wm831x_ts-&gt;data_irq = pdata-&gt;data_irq;</div><div class='del'>-	else</div><div class='del'>-		wm831x_ts-&gt;data_irq = platform_get_irq_byname(pdev, "TCHDATA");</div><div class='ctx'> </div><div class='add'>+	wm831x_ts-&gt;pd_irq = wm831x_irq(wm831x,</div><div class='add'>+				       platform_get_irq_byname(pdev, "TCHPD"));</div><div class='ctx'> 	if (pdata &amp;&amp; pdata-&gt;pd_irq)</div><div class='ctx'> 		wm831x_ts-&gt;pd_irq = pdata-&gt;pd_irq;</div><div class='del'>-	else</div><div class='del'>-		wm831x_ts-&gt;pd_irq = platform_get_irq_byname(pdev, "TCHPD");</div><div class='ctx'> </div><div class='ctx'> 	if (pdata)</div><div class='ctx'> 		wm831x_ts-&gt;pressure = pdata-&gt;pressure;</div><div class='head'>diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig<br/>index 3bd9fff5c589..340893727538 100644<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/Kconfig</a></div><div class='hunk'>@@ -43,7 +43,7 @@ config AMD_IOMMU</div><div class='ctx'> 	  With this option you can enable support for AMD IOMMU hardware in</div><div class='ctx'> 	  your system. An IOMMU is a hardware component which provides</div><div class='ctx'> 	  remapping of DMA memory accesses from devices. With an AMD IOMMU you</div><div class='del'>-	  can isolate the the DMA memory of different devices and protect the</div><div class='add'>+	  can isolate the DMA memory of different devices and protect the</div><div class='ctx'> 	  system from misbehaving device drivers or hardware.</div><div class='ctx'> </div><div class='ctx'> 	  You can find out if your system has an AMD IOMMU if you look into</div><div class='hunk'>@@ -67,7 +67,7 @@ config AMD_IOMMU_V2</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  This option enables support for the AMD IOMMUv2 features of the IOMMU</div><div class='ctx'> 	  hardware. Select this option if you want to use devices that support</div><div class='del'>-	  the the PCI PRI and PASID interface.</div><div class='add'>+	  the PCI PRI and PASID interface.</div><div class='ctx'> </div><div class='ctx'> # Intel IOMMU support</div><div class='ctx'> config DMAR_TABLE</div><div class='hunk'>@@ -162,4 +162,25 @@ config TEGRA_IOMMU_SMMU</div><div class='ctx'> 	  space through the SMMU (System Memory Management Unit)</div><div class='ctx'> 	  hardware included on Tegra SoCs.</div><div class='ctx'> </div><div class='add'>+config EXYNOS_IOMMU</div><div class='add'>+	bool "Exynos IOMMU Support"</div><div class='add'>+	depends on ARCH_EXYNOS &amp;&amp; EXYNOS_DEV_SYSMMU</div><div class='add'>+	select IOMMU_API</div><div class='add'>+	help</div><div class='add'>+	  Support for the IOMMU(System MMU) of Samsung Exynos application</div><div class='add'>+	  processor family. This enables H/W multimedia accellerators to see</div><div class='add'>+	  non-linear physical memory chunks as a linear memory in their</div><div class='add'>+	  address spaces</div><div class='add'>+</div><div class='add'>+	  If unsure, say N here.</div><div class='add'>+</div><div class='add'>+config EXYNOS_IOMMU_DEBUG</div><div class='add'>+	bool "Debugging log for Exynos IOMMU"</div><div class='add'>+	depends on EXYNOS_IOMMU</div><div class='add'>+	help</div><div class='add'>+	  Select this to see the detailed log message that shows what</div><div class='add'>+	  happens in the IOMMU driver</div><div class='add'>+</div><div class='add'>+	  Say N unless you need kernel log message for IOMMU debugging</div><div class='add'>+</div><div class='ctx'> endif # IOMMU_SUPPORT</div><div class='head'>diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile<br/>index 7ad7a3bc1242..76e54ef796de 100644<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/Makefile</a></div><div class='hunk'>@@ -4,9 +4,10 @@ obj-$(CONFIG_AMD_IOMMU) += amd_iommu.o amd_iommu_init.o</div><div class='ctx'> obj-$(CONFIG_AMD_IOMMU_V2) += amd_iommu_v2.o</div><div class='ctx'> obj-$(CONFIG_DMAR_TABLE) += dmar.o</div><div class='ctx'> obj-$(CONFIG_INTEL_IOMMU) += iova.o intel-iommu.o</div><div class='del'>-obj-$(CONFIG_IRQ_REMAP) += intr_remapping.o</div><div class='add'>+obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o</div><div class='ctx'> obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o</div><div class='ctx'> obj-$(CONFIG_OMAP_IOVMM) += omap-iovmm.o</div><div class='ctx'> obj-$(CONFIG_OMAP_IOMMU_DEBUG) += omap-iommu-debug.o</div><div class='ctx'> obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o</div><div class='ctx'> obj-$(CONFIG_TEGRA_IOMMU_SMMU) += tegra-smmu.o</div><div class='add'>+obj-$(CONFIG_EXYNOS_IOMMU) += exynos-iommu.o</div><div class='head'>diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c<br/>index a5bee8e2dfce..a2e418cba0ff 100644<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/amd_iommu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/amd_iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/amd_iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/amd_iommu.c</a></div><div class='hunk'>@@ -450,12 +450,27 @@ static void dump_command(unsigned long phys_addr)</div><div class='ctx'> </div><div class='ctx'> static void iommu_print_event(struct amd_iommu *iommu, void *__evt)</div><div class='ctx'> {</div><div class='del'>-	u32 *event = __evt;</div><div class='del'>-	int type  = (event[1] &gt;&gt; EVENT_TYPE_SHIFT)  &amp; EVENT_TYPE_MASK;</div><div class='del'>-	int devid = (event[0] &gt;&gt; EVENT_DEVID_SHIFT) &amp; EVENT_DEVID_MASK;</div><div class='del'>-	int domid = (event[1] &gt;&gt; EVENT_DOMID_SHIFT) &amp; EVENT_DOMID_MASK;</div><div class='del'>-	int flags = (event[1] &gt;&gt; EVENT_FLAGS_SHIFT) &amp; EVENT_FLAGS_MASK;</div><div class='del'>-	u64 address = (u64)(((u64)event[3]) &lt;&lt; 32) | event[2];</div><div class='add'>+	int type, devid, domid, flags;</div><div class='add'>+	volatile u32 *event = __evt;</div><div class='add'>+	int count = 0;</div><div class='add'>+	u64 address;</div><div class='add'>+</div><div class='add'>+retry:</div><div class='add'>+	type    = (event[1] &gt;&gt; EVENT_TYPE_SHIFT)  &amp; EVENT_TYPE_MASK;</div><div class='add'>+	devid   = (event[0] &gt;&gt; EVENT_DEVID_SHIFT) &amp; EVENT_DEVID_MASK;</div><div class='add'>+	domid   = (event[1] &gt;&gt; EVENT_DOMID_SHIFT) &amp; EVENT_DOMID_MASK;</div><div class='add'>+	flags   = (event[1] &gt;&gt; EVENT_FLAGS_SHIFT) &amp; EVENT_FLAGS_MASK;</div><div class='add'>+	address = (u64)(((u64)event[3]) &lt;&lt; 32) | event[2];</div><div class='add'>+</div><div class='add'>+	if (type == 0) {</div><div class='add'>+		/* Did we hit the erratum? */</div><div class='add'>+		if (++count == LOOP_TIMEOUT) {</div><div class='add'>+			pr_err("AMD-Vi: No event written to event log\n");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		udelay(1);</div><div class='add'>+		goto retry;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_ERR "AMD-Vi: Event logged [");</div><div class='ctx'> </div><div class='hunk'>@@ -508,6 +523,8 @@ static void iommu_print_event(struct amd_iommu *iommu, void *__evt)</div><div class='ctx'> 	default:</div><div class='ctx'> 		printk(KERN_ERR "UNKNOWN type=0x%02x]\n", type);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	memset(__evt, 0, 4 * sizeof(u32));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void iommu_poll_events(struct amd_iommu *iommu)</div><div class='hunk'>@@ -530,26 +547,12 @@ static void iommu_poll_events(struct amd_iommu *iommu)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;iommu-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iommu_handle_ppr_entry(struct amd_iommu *iommu, u32 head)</div><div class='add'>+static void iommu_handle_ppr_entry(struct amd_iommu *iommu, u64 *raw)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd_iommu_fault fault;</div><div class='del'>-	volatile u64 *raw;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	INC_STATS_COUNTER(pri_requests);</div><div class='ctx'> </div><div class='del'>-	raw = (u64 *)(iommu-&gt;ppr_log + head);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Hardware bug: Interrupt may arrive before the entry is written to</div><div class='del'>-	 * memory. If this happens we need to wait for the entry to arrive.</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; LOOP_TIMEOUT; ++i) {</div><div class='del'>-		if (PPR_REQ_TYPE(raw[0]) != 0)</div><div class='del'>-			break;</div><div class='del'>-		udelay(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (PPR_REQ_TYPE(raw[0]) != PPR_REQ_FAULT) {</div><div class='ctx'> 		pr_err_ratelimited("AMD-Vi: Unknown PPR request received\n");</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -561,12 +564,6 @@ static void iommu_handle_ppr_entry(struct amd_iommu *iommu, u32 head)</div><div class='ctx'> 	fault.tag       = PPR_TAG(raw[0]);</div><div class='ctx'> 	fault.flags     = PPR_FLAGS(raw[0]);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * To detect the hardware bug we need to clear the entry</div><div class='del'>-	 * to back to zero.</div><div class='del'>-	 */</div><div class='del'>-	raw[0] = raw[1] = 0;</div><div class='del'>-</div><div class='ctx'> 	atomic_notifier_call_chain(&amp;ppr_notifier, 0, &amp;fault);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -578,25 +575,62 @@ static void iommu_poll_ppr_log(struct amd_iommu *iommu)</div><div class='ctx'> 	if (iommu-&gt;ppr_log == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* enable ppr interrupts again */</div><div class='add'>+	writel(MMIO_STATUS_PPR_INT_MASK, iommu-&gt;mmio_base + MMIO_STATUS_OFFSET);</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;iommu-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	head = readl(iommu-&gt;mmio_base + MMIO_PPR_HEAD_OFFSET);</div><div class='ctx'> 	tail = readl(iommu-&gt;mmio_base + MMIO_PPR_TAIL_OFFSET);</div><div class='ctx'> </div><div class='ctx'> 	while (head != tail) {</div><div class='add'>+		volatile u64 *raw;</div><div class='add'>+		u64 entry[2];</div><div class='add'>+		int i;</div><div class='ctx'> </div><div class='del'>-		/* Handle PPR entry */</div><div class='del'>-		iommu_handle_ppr_entry(iommu, head);</div><div class='add'>+		raw = (u64 *)(iommu-&gt;ppr_log + head);</div><div class='ctx'> </div><div class='del'>-		/* Update and refresh ring-buffer state*/</div><div class='add'>+		/*</div><div class='add'>+		 * Hardware bug: Interrupt may arrive before the entry is</div><div class='add'>+		 * written to memory. If this happens we need to wait for the</div><div class='add'>+		 * entry to arrive.</div><div class='add'>+		 */</div><div class='add'>+		for (i = 0; i &lt; LOOP_TIMEOUT; ++i) {</div><div class='add'>+			if (PPR_REQ_TYPE(raw[0]) != 0)</div><div class='add'>+				break;</div><div class='add'>+			udelay(1);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Avoid memcpy function-call overhead */</div><div class='add'>+		entry[0] = raw[0];</div><div class='add'>+		entry[1] = raw[1];</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * To detect the hardware bug we need to clear the entry</div><div class='add'>+		 * back to zero.</div><div class='add'>+		 */</div><div class='add'>+		raw[0] = raw[1] = 0UL;</div><div class='add'>+</div><div class='add'>+		/* Update head pointer of hardware ring-buffer */</div><div class='ctx'> 		head = (head + PPR_ENTRY_SIZE) % PPR_LOG_SIZE;</div><div class='ctx'> 		writel(head, iommu-&gt;mmio_base + MMIO_PPR_HEAD_OFFSET);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Release iommu-&gt;lock because ppr-handling might need to</div><div class='add'>+		 * re-aquire it</div><div class='add'>+		 */</div><div class='add'>+		spin_unlock_irqrestore(&amp;iommu-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+		/* Handle PPR entry */</div><div class='add'>+		iommu_handle_ppr_entry(iommu, entry);</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;iommu-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+		/* Refresh ring-buffer information */</div><div class='add'>+		head = readl(iommu-&gt;mmio_base + MMIO_PPR_HEAD_OFFSET);</div><div class='ctx'> 		tail = readl(iommu-&gt;mmio_base + MMIO_PPR_TAIL_OFFSET);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* enable ppr interrupts again */</div><div class='del'>-	writel(MMIO_STATUS_PPR_INT_MASK, iommu-&gt;mmio_base + MMIO_STATUS_OFFSET);</div><div class='del'>-</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;iommu-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2035,20 +2069,20 @@ out_err:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* FIXME: Move this to PCI code */</div><div class='del'>-#define PCI_PRI_TLP_OFF		(1 &lt;&lt; 2)</div><div class='add'>+#define PCI_PRI_TLP_OFF		(1 &lt;&lt; 15)</div><div class='ctx'> </div><div class='ctx'> bool pci_pri_tlp_required(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	u16 control;</div><div class='add'>+	u16 status;</div><div class='ctx'> 	int pos;</div><div class='ctx'> </div><div class='ctx'> 	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);</div><div class='ctx'> 	if (!pos)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &amp;control);</div><div class='add'>+	pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &amp;status);</div><div class='ctx'> </div><div class='del'>-	return (control &amp; PCI_PRI_TLP_OFF) ? true : false;</div><div class='add'>+	return (status &amp; PCI_PRI_TLP_OFF) ? true : false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c<br/>index c56790375e0f..542024ba6dba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/amd_iommu_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/amd_iommu_init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/amd_iommu_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/amd_iommu_init.c</a></div><div class='hunk'>@@ -1029,6 +1029,9 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h)</div><div class='ctx'> 	if (!iommu-&gt;dev)</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='add'>+	iommu-&gt;root_pdev = pci_get_bus_and_slot(iommu-&gt;dev-&gt;bus-&gt;number,</div><div class='add'>+						PCI_DEVFN(0, 0));</div><div class='add'>+</div><div class='ctx'> 	iommu-&gt;cap_ptr = h-&gt;cap_ptr;</div><div class='ctx'> 	iommu-&gt;pci_seg = h-&gt;pci_seg;</div><div class='ctx'> 	iommu-&gt;mmio_phys = h-&gt;mmio_phys;</div><div class='hunk'>@@ -1323,20 +1326,16 @@ static void iommu_apply_resume_quirks(struct amd_iommu *iommu)</div><div class='ctx'> {</div><div class='ctx'> 	int i, j;</div><div class='ctx'> 	u32 ioc_feature_control;</div><div class='del'>-	struct pci_dev *pdev = NULL;</div><div class='add'>+	struct pci_dev *pdev = iommu-&gt;root_pdev;</div><div class='ctx'> </div><div class='ctx'> 	/* RD890 BIOSes may not have completely reconfigured the iommu */</div><div class='del'>-	if (!is_rd890_iommu(iommu-&gt;dev))</div><div class='add'>+	if (!is_rd890_iommu(iommu-&gt;dev) || !pdev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * First, we need to ensure that the iommu is enabled. This is</div><div class='ctx'> 	 * controlled by a register in the northbridge</div><div class='ctx'> 	 */</div><div class='del'>-	pdev = pci_get_bus_and_slot(iommu-&gt;dev-&gt;bus-&gt;number, PCI_DEVFN(0, 0));</div><div class='del'>-</div><div class='del'>-	if (!pdev)</div><div class='del'>-		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Select Northbridge indirect register 0x75 and enable writing */</div><div class='ctx'> 	pci_write_config_dword(pdev, 0x60, 0x75 | (1 &lt;&lt; 7));</div><div class='hunk'>@@ -1346,8 +1345,6 @@ static void iommu_apply_resume_quirks(struct amd_iommu *iommu)</div><div class='ctx'> 	if (!(ioc_feature_control &amp; 0x1))</div><div class='ctx'> 		pci_write_config_dword(pdev, 0x64, ioc_feature_control | 1);</div><div class='ctx'> </div><div class='del'>-	pci_dev_put(pdev);</div><div class='del'>-</div><div class='ctx'> 	/* Restore the iommu BAR */</div><div class='ctx'> 	pci_write_config_dword(iommu-&gt;dev, iommu-&gt;cap_ptr + 4,</div><div class='ctx'> 			       iommu-&gt;stored_addr_lo);</div><div class='head'>diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h<br/>index 2452f3b71736..24355559a2ad 100644<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/amd_iommu_types.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/amd_iommu_types.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/amd_iommu_types.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/amd_iommu_types.h</a></div><div class='hunk'>@@ -481,6 +481,9 @@ struct amd_iommu {</div><div class='ctx'> 	/* Pointer to PCI device of this IOMMU */</div><div class='ctx'> 	struct pci_dev *dev;</div><div class='ctx'> </div><div class='add'>+	/* Cache pdev to root device for resume quirks */</div><div class='add'>+	struct pci_dev *root_pdev;</div><div class='add'>+</div><div class='ctx'> 	/* physical address of MMIO space */</div><div class='ctx'> 	u64 mmio_phys;</div><div class='ctx'> 	/* virtual address of MMIO space */</div><div class='head'>diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c<br/>index 35c1e17fce1d..3a74e4410fc0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/dmar.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/dmar.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/dmar.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/dmar.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> #include &lt;linux/tboot.h&gt;</div><div class='ctx'> #include &lt;linux/dmi.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;asm/irq_remapping.h&gt;</div><div class='ctx'> #include &lt;asm/iommu_table.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define PREFIX "DMAR: "</div><div class='hunk'>@@ -555,7 +556,7 @@ int __init detect_intel_iommu(void)</div><div class='ctx'> </div><div class='ctx'> 		dmar = (struct acpi_table_dmar *) dmar_tbl;</div><div class='ctx'> </div><div class='del'>-		if (ret &amp;&amp; intr_remapping_enabled &amp;&amp; cpu_has_x2apic &amp;&amp;</div><div class='add'>+		if (ret &amp;&amp; irq_remapping_enabled &amp;&amp; cpu_has_x2apic &amp;&amp;</div><div class='ctx'> 		    dmar-&gt;flags &amp; 0x1)</div><div class='ctx'> 			printk(KERN_INFO</div><div class='ctx'> 			       "Queued invalidation will be enabled to support x2apic and Intr-remapping.\n");</div><div class='hunk'>@@ -1041,7 +1042,7 @@ static const char *dma_remap_fault_reasons[] =</div><div class='ctx'> 	"non-zero reserved fields in PTE",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char *intr_remap_fault_reasons[] =</div><div class='add'>+static const char *irq_remap_fault_reasons[] =</div><div class='ctx'> {</div><div class='ctx'> 	"Detected reserved fields in the decoded interrupt-remapped request",</div><div class='ctx'> 	"Interrupt index exceeded the interrupt-remapping table size",</div><div class='hunk'>@@ -1056,10 +1057,10 @@ static const char *intr_remap_fault_reasons[] =</div><div class='ctx'> </div><div class='ctx'> const char *dmar_get_fault_reason(u8 fault_reason, int *fault_type)</div><div class='ctx'> {</div><div class='del'>-	if (fault_reason &gt;= 0x20 &amp;&amp; (fault_reason &lt;= 0x20 +</div><div class='del'>-				     ARRAY_SIZE(intr_remap_fault_reasons))) {</div><div class='add'>+	if (fault_reason &gt;= 0x20 &amp;&amp; (fault_reason - 0x20 &lt;</div><div class='add'>+					ARRAY_SIZE(irq_remap_fault_reasons))) {</div><div class='ctx'> 		*fault_type = INTR_REMAP;</div><div class='del'>-		return intr_remap_fault_reasons[fault_reason - 0x20];</div><div class='add'>+		return irq_remap_fault_reasons[fault_reason - 0x20];</div><div class='ctx'> 	} else if (fault_reason &lt; ARRAY_SIZE(dma_remap_fault_reasons)) {</div><div class='ctx'> 		*fault_type = DMA_REMAP;</div><div class='ctx'> 		return dma_remap_fault_reasons[fault_reason];</div><div class='head'>diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c<br/>new file mode 100644<br/>index 000000000000..9a114b9ff170<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/exynos-iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/exynos-iommu.c</a></div><div class='hunk'>@@ -0,0 +1,1076 @@</div><div class='add'>+/* linux/drivers/iommu/exynos_iommu.c</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.</div><div class='add'>+ *		http://www.samsung.com</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_EXYNOS_IOMMU_DEBUG</div><div class='add'>+#define DEBUG</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/iommu.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/pgtable.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;mach/sysmmu.h&gt;</div><div class='add'>+</div><div class='add'>+/* We does not consider super section mapping (16MB) */</div><div class='add'>+#define SECT_ORDER 20</div><div class='add'>+#define LPAGE_ORDER 16</div><div class='add'>+#define SPAGE_ORDER 12</div><div class='add'>+</div><div class='add'>+#define SECT_SIZE (1 &lt;&lt; SECT_ORDER)</div><div class='add'>+#define LPAGE_SIZE (1 &lt;&lt; LPAGE_ORDER)</div><div class='add'>+#define SPAGE_SIZE (1 &lt;&lt; SPAGE_ORDER)</div><div class='add'>+</div><div class='add'>+#define SECT_MASK (~(SECT_SIZE - 1))</div><div class='add'>+#define LPAGE_MASK (~(LPAGE_SIZE - 1))</div><div class='add'>+#define SPAGE_MASK (~(SPAGE_SIZE - 1))</div><div class='add'>+</div><div class='add'>+#define lv1ent_fault(sent) (((*(sent) &amp; 3) == 0) || ((*(sent) &amp; 3) == 3))</div><div class='add'>+#define lv1ent_page(sent) ((*(sent) &amp; 3) == 1)</div><div class='add'>+#define lv1ent_section(sent) ((*(sent) &amp; 3) == 2)</div><div class='add'>+</div><div class='add'>+#define lv2ent_fault(pent) ((*(pent) &amp; 3) == 0)</div><div class='add'>+#define lv2ent_small(pent) ((*(pent) &amp; 2) == 2)</div><div class='add'>+#define lv2ent_large(pent) ((*(pent) &amp; 3) == 1)</div><div class='add'>+</div><div class='add'>+#define section_phys(sent) (*(sent) &amp; SECT_MASK)</div><div class='add'>+#define section_offs(iova) ((iova) &amp; 0xFFFFF)</div><div class='add'>+#define lpage_phys(pent) (*(pent) &amp; LPAGE_MASK)</div><div class='add'>+#define lpage_offs(iova) ((iova) &amp; 0xFFFF)</div><div class='add'>+#define spage_phys(pent) (*(pent) &amp; SPAGE_MASK)</div><div class='add'>+#define spage_offs(iova) ((iova) &amp; 0xFFF)</div><div class='add'>+</div><div class='add'>+#define lv1ent_offset(iova) ((iova) &gt;&gt; SECT_ORDER)</div><div class='add'>+#define lv2ent_offset(iova) (((iova) &amp; 0xFF000) &gt;&gt; SPAGE_ORDER)</div><div class='add'>+</div><div class='add'>+#define NUM_LV1ENTRIES 4096</div><div class='add'>+#define NUM_LV2ENTRIES 256</div><div class='add'>+</div><div class='add'>+#define LV2TABLE_SIZE (NUM_LV2ENTRIES * sizeof(long))</div><div class='add'>+</div><div class='add'>+#define SPAGES_PER_LPAGE (LPAGE_SIZE / SPAGE_SIZE)</div><div class='add'>+</div><div class='add'>+#define lv2table_base(sent) (*(sent) &amp; 0xFFFFFC00)</div><div class='add'>+</div><div class='add'>+#define mk_lv1ent_sect(pa) ((pa) | 2)</div><div class='add'>+#define mk_lv1ent_page(pa) ((pa) | 1)</div><div class='add'>+#define mk_lv2ent_lpage(pa) ((pa) | 1)</div><div class='add'>+#define mk_lv2ent_spage(pa) ((pa) | 2)</div><div class='add'>+</div><div class='add'>+#define CTRL_ENABLE	0x5</div><div class='add'>+#define CTRL_BLOCK	0x7</div><div class='add'>+#define CTRL_DISABLE	0x0</div><div class='add'>+</div><div class='add'>+#define REG_MMU_CTRL		0x000</div><div class='add'>+#define REG_MMU_CFG		0x004</div><div class='add'>+#define REG_MMU_STATUS		0x008</div><div class='add'>+#define REG_MMU_FLUSH		0x00C</div><div class='add'>+#define REG_MMU_FLUSH_ENTRY	0x010</div><div class='add'>+#define REG_PT_BASE_ADDR	0x014</div><div class='add'>+#define REG_INT_STATUS		0x018</div><div class='add'>+#define REG_INT_CLEAR		0x01C</div><div class='add'>+</div><div class='add'>+#define REG_PAGE_FAULT_ADDR	0x024</div><div class='add'>+#define REG_AW_FAULT_ADDR	0x028</div><div class='add'>+#define REG_AR_FAULT_ADDR	0x02C</div><div class='add'>+#define REG_DEFAULT_SLAVE_ADDR	0x030</div><div class='add'>+</div><div class='add'>+#define REG_MMU_VERSION		0x034</div><div class='add'>+</div><div class='add'>+#define REG_PB0_SADDR		0x04C</div><div class='add'>+#define REG_PB0_EADDR		0x050</div><div class='add'>+#define REG_PB1_SADDR		0x054</div><div class='add'>+#define REG_PB1_EADDR		0x058</div><div class='add'>+</div><div class='add'>+static unsigned long *section_entry(unsigned long *pgtable, unsigned long iova)</div><div class='add'>+{</div><div class='add'>+	return pgtable + lv1ent_offset(iova);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long *page_entry(unsigned long *sent, unsigned long iova)</div><div class='add'>+{</div><div class='add'>+	return (unsigned long *)__va(lv2table_base(sent)) + lv2ent_offset(iova);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum exynos_sysmmu_inttype {</div><div class='add'>+	SYSMMU_PAGEFAULT,</div><div class='add'>+	SYSMMU_AR_MULTIHIT,</div><div class='add'>+	SYSMMU_AW_MULTIHIT,</div><div class='add'>+	SYSMMU_BUSERROR,</div><div class='add'>+	SYSMMU_AR_SECURITY,</div><div class='add'>+	SYSMMU_AR_ACCESS,</div><div class='add'>+	SYSMMU_AW_SECURITY,</div><div class='add'>+	SYSMMU_AW_PROTECTION, /* 7 */</div><div class='add'>+	SYSMMU_FAULT_UNKNOWN,</div><div class='add'>+	SYSMMU_FAULTS_NUM</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * @itype: type of fault.</div><div class='add'>+ * @pgtable_base: the physical address of page table base. This is 0 if @itype</div><div class='add'>+ *                is SYSMMU_BUSERROR.</div><div class='add'>+ * @fault_addr: the device (virtual) address that the System MMU tried to</div><div class='add'>+ *             translated. This is 0 if @itype is SYSMMU_BUSERROR.</div><div class='add'>+ */</div><div class='add'>+typedef int (*sysmmu_fault_handler_t)(enum exynos_sysmmu_inttype itype,</div><div class='add'>+			unsigned long pgtable_base, unsigned long fault_addr);</div><div class='add'>+</div><div class='add'>+static unsigned short fault_reg_offset[SYSMMU_FAULTS_NUM] = {</div><div class='add'>+	REG_PAGE_FAULT_ADDR,</div><div class='add'>+	REG_AR_FAULT_ADDR,</div><div class='add'>+	REG_AW_FAULT_ADDR,</div><div class='add'>+	REG_DEFAULT_SLAVE_ADDR,</div><div class='add'>+	REG_AR_FAULT_ADDR,</div><div class='add'>+	REG_AR_FAULT_ADDR,</div><div class='add'>+	REG_AW_FAULT_ADDR,</div><div class='add'>+	REG_AW_FAULT_ADDR</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = {</div><div class='add'>+	"PAGE FAULT",</div><div class='add'>+	"AR MULTI-HIT FAULT",</div><div class='add'>+	"AW MULTI-HIT FAULT",</div><div class='add'>+	"BUS ERROR",</div><div class='add'>+	"AR SECURITY PROTECTION FAULT",</div><div class='add'>+	"AR ACCESS PROTECTION FAULT",</div><div class='add'>+	"AW SECURITY PROTECTION FAULT",</div><div class='add'>+	"AW ACCESS PROTECTION FAULT",</div><div class='add'>+	"UNKNOWN FAULT"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct exynos_iommu_domain {</div><div class='add'>+	struct list_head clients; /* list of sysmmu_drvdata.node */</div><div class='add'>+	unsigned long *pgtable; /* lv1 page table, 16KB */</div><div class='add'>+	short *lv2entcnt; /* free lv2 entry counter for each section */</div><div class='add'>+	spinlock_t lock; /* lock for this structure */</div><div class='add'>+	spinlock_t pgtablelock; /* lock for modifying page table @ pgtable */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sysmmu_drvdata {</div><div class='add'>+	struct list_head node; /* entry of exynos_iommu_domain.clients */</div><div class='add'>+	struct device *sysmmu;	/* System MMU's device descriptor */</div><div class='add'>+	struct device *dev;	/* Owner of system MMU */</div><div class='add'>+	char *dbgname;</div><div class='add'>+	int nsfrs;</div><div class='add'>+	void __iomem **sfrbases;</div><div class='add'>+	struct clk *clk[2];</div><div class='add'>+	int activations;</div><div class='add'>+	rwlock_t lock;</div><div class='add'>+	struct iommu_domain *domain;</div><div class='add'>+	sysmmu_fault_handler_t fault_handler;</div><div class='add'>+	unsigned long pgtable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool set_sysmmu_active(struct sysmmu_drvdata *data)</div><div class='add'>+{</div><div class='add'>+	/* return true if the System MMU was not active previously</div><div class='add'>+	   and it needs to be initialized */</div><div class='add'>+	return ++data-&gt;activations == 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool set_sysmmu_inactive(struct sysmmu_drvdata *data)</div><div class='add'>+{</div><div class='add'>+	/* return true if the System MMU is needed to be disabled */</div><div class='add'>+	BUG_ON(data-&gt;activations &lt; 1);</div><div class='add'>+	return --data-&gt;activations == 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool is_sysmmu_active(struct sysmmu_drvdata *data)</div><div class='add'>+{</div><div class='add'>+	return data-&gt;activations &gt; 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sysmmu_unblock(void __iomem *sfrbase)</div><div class='add'>+{</div><div class='add'>+	__raw_writel(CTRL_ENABLE, sfrbase + REG_MMU_CTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool sysmmu_block(void __iomem *sfrbase)</div><div class='add'>+{</div><div class='add'>+	int i = 120;</div><div class='add'>+</div><div class='add'>+	__raw_writel(CTRL_BLOCK, sfrbase + REG_MMU_CTRL);</div><div class='add'>+	while ((i &gt; 0) &amp;&amp; !(__raw_readl(sfrbase + REG_MMU_STATUS) &amp; 1))</div><div class='add'>+		--i;</div><div class='add'>+</div><div class='add'>+	if (!(__raw_readl(sfrbase + REG_MMU_STATUS) &amp; 1)) {</div><div class='add'>+		sysmmu_unblock(sfrbase);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __sysmmu_tlb_invalidate(void __iomem *sfrbase)</div><div class='add'>+{</div><div class='add'>+	__raw_writel(0x1, sfrbase + REG_MMU_FLUSH);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __sysmmu_tlb_invalidate_entry(void __iomem *sfrbase,</div><div class='add'>+						unsigned long iova)</div><div class='add'>+{</div><div class='add'>+	__raw_writel((iova &amp; SPAGE_MASK) | 1, sfrbase + REG_MMU_FLUSH_ENTRY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __sysmmu_set_ptbase(void __iomem *sfrbase,</div><div class='add'>+				       unsigned long pgd)</div><div class='add'>+{</div><div class='add'>+	__raw_writel(0x1, sfrbase + REG_MMU_CFG); /* 16KB LV1, LRU */</div><div class='add'>+	__raw_writel(pgd, sfrbase + REG_PT_BASE_ADDR);</div><div class='add'>+</div><div class='add'>+	__sysmmu_tlb_invalidate(sfrbase);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __sysmmu_set_prefbuf(void __iomem *sfrbase, unsigned long base,</div><div class='add'>+						unsigned long size, int idx)</div><div class='add'>+{</div><div class='add'>+	__raw_writel(base, sfrbase + REG_PB0_SADDR + idx * 8);</div><div class='add'>+	__raw_writel(size - 1 + base,  sfrbase + REG_PB0_EADDR + idx * 8);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void exynos_sysmmu_set_prefbuf(struct device *dev,</div><div class='add'>+				unsigned long base0, unsigned long size0,</div><div class='add'>+				unsigned long base1, unsigned long size1)</div><div class='add'>+{</div><div class='add'>+	struct sysmmu_drvdata *data = dev_get_drvdata(dev-&gt;archdata.iommu);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	BUG_ON((base0 + size0) &lt;= base0);</div><div class='add'>+	BUG_ON((size1 &gt; 0) &amp;&amp; ((base1 + size1) &lt;= base1));</div><div class='add'>+</div><div class='add'>+	read_lock_irqsave(&amp;data-&gt;lock, flags);</div><div class='add'>+	if (!is_sysmmu_active(data))</div><div class='add'>+		goto finish;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; data-&gt;nsfrs; i++) {</div><div class='add'>+		if ((readl(data-&gt;sfrbases[i] + REG_MMU_VERSION) &gt;&gt; 28) == 3) {</div><div class='add'>+			if (!sysmmu_block(data-&gt;sfrbases[i]))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (size1 == 0) {</div><div class='add'>+				if (size0 &lt;= SZ_128K) {</div><div class='add'>+					base1 = base0;</div><div class='add'>+					size1 = size0;</div><div class='add'>+				} else {</div><div class='add'>+					size1 = size0 -</div><div class='add'>+						ALIGN(size0 / 2, SZ_64K);</div><div class='add'>+					size0 = size0 - size1;</div><div class='add'>+					base1 = base0 + size0;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			__sysmmu_set_prefbuf(</div><div class='add'>+					data-&gt;sfrbases[i], base0, size0, 0);</div><div class='add'>+			__sysmmu_set_prefbuf(</div><div class='add'>+					data-&gt;sfrbases[i], base1, size1, 1);</div><div class='add'>+</div><div class='add'>+			sysmmu_unblock(data-&gt;sfrbases[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+finish:</div><div class='add'>+	read_unlock_irqrestore(&amp;data-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __set_fault_handler(struct sysmmu_drvdata *data,</div><div class='add'>+					sysmmu_fault_handler_t handler)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	write_lock_irqsave(&amp;data-&gt;lock, flags);</div><div class='add'>+	data-&gt;fault_handler = handler;</div><div class='add'>+	write_unlock_irqrestore(&amp;data-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void exynos_sysmmu_set_fault_handler(struct device *dev,</div><div class='add'>+					sysmmu_fault_handler_t handler)</div><div class='add'>+{</div><div class='add'>+	struct sysmmu_drvdata *data = dev_get_drvdata(dev-&gt;archdata.iommu);</div><div class='add'>+</div><div class='add'>+	__set_fault_handler(data, handler);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int default_fault_handler(enum exynos_sysmmu_inttype itype,</div><div class='add'>+		     unsigned long pgtable_base, unsigned long fault_addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long *ent;</div><div class='add'>+</div><div class='add'>+	if ((itype &gt;= SYSMMU_FAULTS_NUM) || (itype &lt; SYSMMU_PAGEFAULT))</div><div class='add'>+		itype = SYSMMU_FAULT_UNKNOWN;</div><div class='add'>+</div><div class='add'>+	pr_err("%s occured at 0x%lx(Page table base: 0x%lx)\n",</div><div class='add'>+			sysmmu_fault_name[itype], fault_addr, pgtable_base);</div><div class='add'>+</div><div class='add'>+	ent = section_entry(__va(pgtable_base), fault_addr);</div><div class='add'>+	pr_err("\tLv1 entry: 0x%lx\n", *ent);</div><div class='add'>+</div><div class='add'>+	if (lv1ent_page(ent)) {</div><div class='add'>+		ent = page_entry(ent, fault_addr);</div><div class='add'>+		pr_err("\t Lv2 entry: 0x%lx\n", *ent);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_err("Generating Kernel OOPS... because it is unrecoverable.\n");</div><div class='add'>+</div><div class='add'>+	BUG();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	/* SYSMMU is in blocked when interrupt occurred. */</div><div class='add'>+	struct sysmmu_drvdata *data = dev_id;</div><div class='add'>+	struct resource *irqres;</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	enum exynos_sysmmu_inttype itype;</div><div class='add'>+	unsigned long addr = -1;</div><div class='add'>+</div><div class='add'>+	int i, ret = -ENOSYS;</div><div class='add'>+</div><div class='add'>+	read_lock(&amp;data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	WARN_ON(!is_sysmmu_active(data));</div><div class='add'>+</div><div class='add'>+	pdev = to_platform_device(data-&gt;sysmmu);</div><div class='add'>+	for (i = 0; i &lt; (pdev-&gt;num_resources / 2); i++) {</div><div class='add'>+		irqres = platform_get_resource(pdev, IORESOURCE_IRQ, i);</div><div class='add'>+		if (irqres &amp;&amp; ((int)irqres-&gt;start == irq))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == pdev-&gt;num_resources) {</div><div class='add'>+		itype = SYSMMU_FAULT_UNKNOWN;</div><div class='add'>+	} else {</div><div class='add'>+		itype = (enum exynos_sysmmu_inttype)</div><div class='add'>+			__ffs(__raw_readl(data-&gt;sfrbases[i] + REG_INT_STATUS));</div><div class='add'>+		if (WARN_ON(!((itype &gt;= 0) &amp;&amp; (itype &lt; SYSMMU_FAULT_UNKNOWN))))</div><div class='add'>+			itype = SYSMMU_FAULT_UNKNOWN;</div><div class='add'>+		else</div><div class='add'>+			addr = __raw_readl(</div><div class='add'>+				data-&gt;sfrbases[i] + fault_reg_offset[itype]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data-&gt;domain)</div><div class='add'>+		ret = report_iommu_fault(data-&gt;domain, data-&gt;dev,</div><div class='add'>+				addr, itype);</div><div class='add'>+</div><div class='add'>+	if ((ret == -ENOSYS) &amp;&amp; data-&gt;fault_handler) {</div><div class='add'>+		unsigned long base = data-&gt;pgtable;</div><div class='add'>+		if (itype != SYSMMU_FAULT_UNKNOWN)</div><div class='add'>+			base = __raw_readl(</div><div class='add'>+					data-&gt;sfrbases[i] + REG_PT_BASE_ADDR);</div><div class='add'>+		ret = data-&gt;fault_handler(itype, base, addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ret &amp;&amp; (itype != SYSMMU_FAULT_UNKNOWN))</div><div class='add'>+		__raw_writel(1 &lt;&lt; itype, data-&gt;sfrbases[i] + REG_INT_CLEAR);</div><div class='add'>+	else</div><div class='add'>+		dev_dbg(data-&gt;sysmmu, "(%s) %s is not handled.\n",</div><div class='add'>+				data-&gt;dbgname, sysmmu_fault_name[itype]);</div><div class='add'>+</div><div class='add'>+	if (itype != SYSMMU_FAULT_UNKNOWN)</div><div class='add'>+		sysmmu_unblock(data-&gt;sfrbases[i]);</div><div class='add'>+</div><div class='add'>+	read_unlock(&amp;data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool __exynos_sysmmu_disable(struct sysmmu_drvdata *data)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool disabled = false;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	write_lock_irqsave(&amp;data-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (!set_sysmmu_inactive(data))</div><div class='add'>+		goto finish;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; data-&gt;nsfrs; i++)</div><div class='add'>+		__raw_writel(CTRL_DISABLE, data-&gt;sfrbases[i] + REG_MMU_CTRL);</div><div class='add'>+</div><div class='add'>+	if (data-&gt;clk[1])</div><div class='add'>+		clk_disable(data-&gt;clk[1]);</div><div class='add'>+	if (data-&gt;clk[0])</div><div class='add'>+		clk_disable(data-&gt;clk[0]);</div><div class='add'>+</div><div class='add'>+	disabled = true;</div><div class='add'>+	data-&gt;pgtable = 0;</div><div class='add'>+	data-&gt;domain = NULL;</div><div class='add'>+finish:</div><div class='add'>+	write_unlock_irqrestore(&amp;data-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (disabled)</div><div class='add'>+		dev_dbg(data-&gt;sysmmu, "(%s) Disabled\n", data-&gt;dbgname);</div><div class='add'>+	else</div><div class='add'>+		dev_dbg(data-&gt;sysmmu, "(%s) %d times left to be disabled\n",</div><div class='add'>+					data-&gt;dbgname, data-&gt;activations);</div><div class='add'>+</div><div class='add'>+	return disabled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* __exynos_sysmmu_enable: Enables System MMU</div><div class='add'>+ *</div><div class='add'>+ * returns -error if an error occurred and System MMU is not enabled,</div><div class='add'>+ * 0 if the System MMU has been just enabled and 1 if System MMU was already</div><div class='add'>+ * enabled before.</div><div class='add'>+ */</div><div class='add'>+static int __exynos_sysmmu_enable(struct sysmmu_drvdata *data,</div><div class='add'>+			unsigned long pgtable, struct iommu_domain *domain)</div><div class='add'>+{</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	write_lock_irqsave(&amp;data-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (!set_sysmmu_active(data)) {</div><div class='add'>+		if (WARN_ON(pgtable != data-&gt;pgtable)) {</div><div class='add'>+			ret = -EBUSY;</div><div class='add'>+			set_sysmmu_inactive(data);</div><div class='add'>+		} else {</div><div class='add'>+			ret = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev_dbg(data-&gt;sysmmu, "(%s) Already enabled\n", data-&gt;dbgname);</div><div class='add'>+		goto finish;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data-&gt;clk[0])</div><div class='add'>+		clk_enable(data-&gt;clk[0]);</div><div class='add'>+	if (data-&gt;clk[1])</div><div class='add'>+		clk_enable(data-&gt;clk[1]);</div><div class='add'>+</div><div class='add'>+	data-&gt;pgtable = pgtable;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; data-&gt;nsfrs; i++) {</div><div class='add'>+		__sysmmu_set_ptbase(data-&gt;sfrbases[i], pgtable);</div><div class='add'>+</div><div class='add'>+		if ((readl(data-&gt;sfrbases[i] + REG_MMU_VERSION) &gt;&gt; 28) == 3) {</div><div class='add'>+			/* System MMU version is 3.x */</div><div class='add'>+			__raw_writel((1 &lt;&lt; 12) | (2 &lt;&lt; 28),</div><div class='add'>+					data-&gt;sfrbases[i] + REG_MMU_CFG);</div><div class='add'>+			__sysmmu_set_prefbuf(data-&gt;sfrbases[i], 0, -1, 0);</div><div class='add'>+			__sysmmu_set_prefbuf(data-&gt;sfrbases[i], 0, -1, 1);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		__raw_writel(CTRL_ENABLE, data-&gt;sfrbases[i] + REG_MMU_CTRL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data-&gt;domain = domain;</div><div class='add'>+</div><div class='add'>+	dev_dbg(data-&gt;sysmmu, "(%s) Enabled\n", data-&gt;dbgname);</div><div class='add'>+finish:</div><div class='add'>+	write_unlock_irqrestore(&amp;data-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int exynos_sysmmu_enable(struct device *dev, unsigned long pgtable)</div><div class='add'>+{</div><div class='add'>+	struct sysmmu_drvdata *data = dev_get_drvdata(dev-&gt;archdata.iommu);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	BUG_ON(!memblock_is_memory(pgtable));</div><div class='add'>+</div><div class='add'>+	ret = pm_runtime_get_sync(data-&gt;sysmmu);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_dbg(data-&gt;sysmmu, "(%s) Failed to enable\n", data-&gt;dbgname);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = __exynos_sysmmu_enable(data, pgtable, NULL);</div><div class='add'>+	if (WARN_ON(ret &lt; 0)) {</div><div class='add'>+		pm_runtime_put(data-&gt;sysmmu);</div><div class='add'>+		dev_err(data-&gt;sysmmu,</div><div class='add'>+			"(%s) Already enabled with page table %#lx\n",</div><div class='add'>+			data-&gt;dbgname, data-&gt;pgtable);</div><div class='add'>+	} else {</div><div class='add'>+		data-&gt;dev = dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool exynos_sysmmu_disable(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sysmmu_drvdata *data = dev_get_drvdata(dev-&gt;archdata.iommu);</div><div class='add'>+	bool disabled;</div><div class='add'>+</div><div class='add'>+	disabled = __exynos_sysmmu_disable(data);</div><div class='add'>+	pm_runtime_put(data-&gt;sysmmu);</div><div class='add'>+</div><div class='add'>+	return disabled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sysmmu_tlb_invalidate_entry(struct device *dev, unsigned long iova)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct sysmmu_drvdata *data = dev_get_drvdata(dev-&gt;archdata.iommu);</div><div class='add'>+</div><div class='add'>+	read_lock_irqsave(&amp;data-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (is_sysmmu_active(data)) {</div><div class='add'>+		int i;</div><div class='add'>+		for (i = 0; i &lt; data-&gt;nsfrs; i++) {</div><div class='add'>+			if (sysmmu_block(data-&gt;sfrbases[i])) {</div><div class='add'>+				__sysmmu_tlb_invalidate_entry(</div><div class='add'>+						data-&gt;sfrbases[i], iova);</div><div class='add'>+				sysmmu_unblock(data-&gt;sfrbases[i]);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(data-&gt;sysmmu,</div><div class='add'>+			"(%s) Disabled. Skipping invalidating TLB.\n",</div><div class='add'>+			data-&gt;dbgname);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	read_unlock_irqrestore(&amp;data-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void exynos_sysmmu_tlb_invalidate(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct sysmmu_drvdata *data = dev_get_drvdata(dev-&gt;archdata.iommu);</div><div class='add'>+</div><div class='add'>+	read_lock_irqsave(&amp;data-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (is_sysmmu_active(data)) {</div><div class='add'>+		int i;</div><div class='add'>+		for (i = 0; i &lt; data-&gt;nsfrs; i++) {</div><div class='add'>+			if (sysmmu_block(data-&gt;sfrbases[i])) {</div><div class='add'>+				__sysmmu_tlb_invalidate(data-&gt;sfrbases[i]);</div><div class='add'>+				sysmmu_unblock(data-&gt;sfrbases[i]);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(data-&gt;sysmmu,</div><div class='add'>+			"(%s) Disabled. Skipping invalidating TLB.\n",</div><div class='add'>+			data-&gt;dbgname);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	read_unlock_irqrestore(&amp;data-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int exynos_sysmmu_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct sysmmu_drvdata *data;</div><div class='add'>+</div><div class='add'>+	dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	data = kzalloc(sizeof(*data), GFP_KERNEL);</div><div class='add'>+	if (!data) {</div><div class='add'>+		dev_dbg(dev, "Not enough memory\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = dev_set_drvdata(dev, data);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_dbg(dev, "Unabled to initialize driver data\n");</div><div class='add'>+		goto err_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data-&gt;nsfrs = pdev-&gt;num_resources / 2;</div><div class='add'>+	data-&gt;sfrbases = kmalloc(sizeof(*data-&gt;sfrbases) * data-&gt;nsfrs,</div><div class='add'>+								GFP_KERNEL);</div><div class='add'>+	if (data-&gt;sfrbases == NULL) {</div><div class='add'>+		dev_dbg(dev, "Not enough memory\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; data-&gt;nsfrs; i++) {</div><div class='add'>+		struct resource *res;</div><div class='add'>+		res = platform_get_resource(pdev, IORESOURCE_MEM, i);</div><div class='add'>+		if (!res) {</div><div class='add'>+			dev_dbg(dev, "Unable to find IOMEM region\n");</div><div class='add'>+			ret = -ENOENT;</div><div class='add'>+			goto err_res;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		data-&gt;sfrbases[i] = ioremap(res-&gt;start, resource_size(res));</div><div class='add'>+		if (!data-&gt;sfrbases[i]) {</div><div class='add'>+			dev_dbg(dev, "Unable to map IOMEM @ PA:%#x\n",</div><div class='add'>+							res-&gt;start);</div><div class='add'>+			ret = -ENOENT;</div><div class='add'>+			goto err_res;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; data-&gt;nsfrs; i++) {</div><div class='add'>+		ret = platform_get_irq(pdev, i);</div><div class='add'>+		if (ret &lt;= 0) {</div><div class='add'>+			dev_dbg(dev, "Unable to find IRQ resource\n");</div><div class='add'>+			goto err_irq;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = request_irq(ret, exynos_sysmmu_irq, 0,</div><div class='add'>+					dev_name(dev), data);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_dbg(dev, "Unabled to register interrupt handler\n");</div><div class='add'>+			goto err_irq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev_get_platdata(dev)) {</div><div class='add'>+		char *deli, *beg;</div><div class='add'>+		struct sysmmu_platform_data *platdata = dev_get_platdata(dev);</div><div class='add'>+</div><div class='add'>+		beg = platdata-&gt;clockname;</div><div class='add'>+</div><div class='add'>+		for (deli = beg; (*deli != '\0') &amp;&amp; (*deli != ','); deli++)</div><div class='add'>+			/* NOTHING */;</div><div class='add'>+</div><div class='add'>+		if (*deli == '\0')</div><div class='add'>+			deli = NULL;</div><div class='add'>+		else</div><div class='add'>+			*deli = '\0';</div><div class='add'>+</div><div class='add'>+		data-&gt;clk[0] = clk_get(dev, beg);</div><div class='add'>+		if (IS_ERR(data-&gt;clk[0])) {</div><div class='add'>+			data-&gt;clk[0] = NULL;</div><div class='add'>+			dev_dbg(dev, "No clock descriptor registered\n");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (data-&gt;clk[0] &amp;&amp; deli) {</div><div class='add'>+			*deli = ',';</div><div class='add'>+			data-&gt;clk[1] = clk_get(dev, deli + 1);</div><div class='add'>+			if (IS_ERR(data-&gt;clk[1]))</div><div class='add'>+				data-&gt;clk[1] = NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		data-&gt;dbgname = platdata-&gt;dbgname;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data-&gt;sysmmu = dev;</div><div class='add'>+	rwlock_init(&amp;data-&gt;lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;data-&gt;node);</div><div class='add'>+</div><div class='add'>+	__set_fault_handler(data, &amp;default_fault_handler);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;parent)</div><div class='add'>+		pm_runtime_enable(dev);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "(%s) Initialized\n", data-&gt;dbgname);</div><div class='add'>+	return 0;</div><div class='add'>+err_irq:</div><div class='add'>+	while (i-- &gt; 0) {</div><div class='add'>+		int irq;</div><div class='add'>+</div><div class='add'>+		irq = platform_get_irq(pdev, i);</div><div class='add'>+		free_irq(irq, data);</div><div class='add'>+	}</div><div class='add'>+err_res:</div><div class='add'>+	while (data-&gt;nsfrs-- &gt; 0)</div><div class='add'>+		iounmap(data-&gt;sfrbases[data-&gt;nsfrs]);</div><div class='add'>+	kfree(data-&gt;sfrbases);</div><div class='add'>+err_init:</div><div class='add'>+	kfree(data);</div><div class='add'>+err_alloc:</div><div class='add'>+	dev_err(dev, "Failed to initialize\n");</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver exynos_sysmmu_driver = {</div><div class='add'>+	.probe		= exynos_sysmmu_probe,</div><div class='add'>+	.driver		= {</div><div class='add'>+		.owner		= THIS_MODULE,</div><div class='add'>+		.name		= "exynos-sysmmu",</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void pgtable_flush(void *vastart, void *vaend)</div><div class='add'>+{</div><div class='add'>+	dmac_flush_range(vastart, vaend);</div><div class='add'>+	outer_flush_range(virt_to_phys(vastart),</div><div class='add'>+				virt_to_phys(vaend));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int exynos_iommu_domain_init(struct iommu_domain *domain)</div><div class='add'>+{</div><div class='add'>+	struct exynos_iommu_domain *priv;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;pgtable = (unsigned long *)__get_free_pages(</div><div class='add'>+						GFP_KERNEL | __GFP_ZERO, 2);</div><div class='add'>+	if (!priv-&gt;pgtable)</div><div class='add'>+		goto err_pgtable;</div><div class='add'>+</div><div class='add'>+	priv-&gt;lv2entcnt = (short *)__get_free_pages(</div><div class='add'>+						GFP_KERNEL | __GFP_ZERO, 1);</div><div class='add'>+	if (!priv-&gt;lv2entcnt)</div><div class='add'>+		goto err_counter;</div><div class='add'>+</div><div class='add'>+	pgtable_flush(priv-&gt;pgtable, priv-&gt;pgtable + NUM_LV1ENTRIES);</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;lock);</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;pgtablelock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;priv-&gt;clients);</div><div class='add'>+</div><div class='add'>+	domain-&gt;priv = priv;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_counter:</div><div class='add'>+	free_pages((unsigned long)priv-&gt;pgtable, 2);</div><div class='add'>+err_pgtable:</div><div class='add'>+	kfree(priv);</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void exynos_iommu_domain_destroy(struct iommu_domain *domain)</div><div class='add'>+{</div><div class='add'>+	struct exynos_iommu_domain *priv = domain-&gt;priv;</div><div class='add'>+	struct sysmmu_drvdata *data;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	WARN_ON(!list_empty(&amp;priv-&gt;clients));</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(data, &amp;priv-&gt;clients, node) {</div><div class='add'>+		while (!exynos_sysmmu_disable(data-&gt;dev))</div><div class='add'>+			; /* until System MMU is actually disabled */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; NUM_LV1ENTRIES; i++)</div><div class='add'>+		if (lv1ent_page(priv-&gt;pgtable + i))</div><div class='add'>+			kfree(__va(lv2table_base(priv-&gt;pgtable + i)));</div><div class='add'>+</div><div class='add'>+	free_pages((unsigned long)priv-&gt;pgtable, 2);</div><div class='add'>+	free_pages((unsigned long)priv-&gt;lv2entcnt, 1);</div><div class='add'>+	kfree(domain-&gt;priv);</div><div class='add'>+	domain-&gt;priv = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int exynos_iommu_attach_device(struct iommu_domain *domain,</div><div class='add'>+				   struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sysmmu_drvdata *data = dev_get_drvdata(dev-&gt;archdata.iommu);</div><div class='add'>+	struct exynos_iommu_domain *priv = domain-&gt;priv;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pm_runtime_get_sync(data-&gt;sysmmu);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	ret = __exynos_sysmmu_enable(data, __pa(priv-&gt;pgtable), domain);</div><div class='add'>+</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		/* 'data-&gt;node' must not be appeared in priv-&gt;clients */</div><div class='add'>+		BUG_ON(!list_empty(&amp;data-&gt;node));</div><div class='add'>+		data-&gt;dev = dev;</div><div class='add'>+		list_add_tail(&amp;data-&gt;node, &amp;priv-&gt;clients);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "%s: Failed to attach IOMMU with pgtable %#lx\n",</div><div class='add'>+				__func__, __pa(priv-&gt;pgtable));</div><div class='add'>+		pm_runtime_put(data-&gt;sysmmu);</div><div class='add'>+	} else if (ret &gt; 0) {</div><div class='add'>+		dev_dbg(dev, "%s: IOMMU with pgtable 0x%lx already attached\n",</div><div class='add'>+					__func__, __pa(priv-&gt;pgtable));</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(dev, "%s: Attached new IOMMU with pgtable 0x%lx\n",</div><div class='add'>+					__func__, __pa(priv-&gt;pgtable));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void exynos_iommu_detach_device(struct iommu_domain *domain,</div><div class='add'>+				    struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sysmmu_drvdata *data = dev_get_drvdata(dev-&gt;archdata.iommu);</div><div class='add'>+	struct exynos_iommu_domain *priv = domain-&gt;priv;</div><div class='add'>+	struct list_head *pos;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool found = false;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	list_for_each(pos, &amp;priv-&gt;clients) {</div><div class='add'>+		if (list_entry(pos, struct sysmmu_drvdata, node) == data) {</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!found)</div><div class='add'>+		goto finish;</div><div class='add'>+</div><div class='add'>+	if (__exynos_sysmmu_disable(data)) {</div><div class='add'>+		dev_dbg(dev, "%s: Detached IOMMU with pgtable %#lx\n",</div><div class='add'>+					__func__, __pa(priv-&gt;pgtable));</div><div class='add'>+		list_del(&amp;data-&gt;node);</div><div class='add'>+		INIT_LIST_HEAD(&amp;data-&gt;node);</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(dev, "%s: Detaching IOMMU with pgtable %#lx delayed",</div><div class='add'>+					__func__, __pa(priv-&gt;pgtable));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+finish:</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (found)</div><div class='add'>+		pm_runtime_put(data-&gt;sysmmu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long *alloc_lv2entry(unsigned long *sent, unsigned long iova,</div><div class='add'>+					short *pgcounter)</div><div class='add'>+{</div><div class='add'>+	if (lv1ent_fault(sent)) {</div><div class='add'>+		unsigned long *pent;</div><div class='add'>+</div><div class='add'>+		pent = kzalloc(LV2TABLE_SIZE, GFP_ATOMIC);</div><div class='add'>+		BUG_ON((unsigned long)pent &amp; (LV2TABLE_SIZE - 1));</div><div class='add'>+		if (!pent)</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		*sent = mk_lv1ent_page(__pa(pent));</div><div class='add'>+		*pgcounter = NUM_LV2ENTRIES;</div><div class='add'>+		pgtable_flush(pent, pent + NUM_LV2ENTRIES);</div><div class='add'>+		pgtable_flush(sent, sent + 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return page_entry(sent, iova);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lv1set_section(unsigned long *sent, phys_addr_t paddr, short *pgcnt)</div><div class='add'>+{</div><div class='add'>+	if (lv1ent_section(sent))</div><div class='add'>+		return -EADDRINUSE;</div><div class='add'>+</div><div class='add'>+	if (lv1ent_page(sent)) {</div><div class='add'>+		if (*pgcnt != NUM_LV2ENTRIES)</div><div class='add'>+			return -EADDRINUSE;</div><div class='add'>+</div><div class='add'>+		kfree(page_entry(sent, 0));</div><div class='add'>+</div><div class='add'>+		*pgcnt = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*sent = mk_lv1ent_sect(paddr);</div><div class='add'>+</div><div class='add'>+	pgtable_flush(sent, sent + 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lv2set_page(unsigned long *pent, phys_addr_t paddr, size_t size,</div><div class='add'>+								short *pgcnt)</div><div class='add'>+{</div><div class='add'>+	if (size == SPAGE_SIZE) {</div><div class='add'>+		if (!lv2ent_fault(pent))</div><div class='add'>+			return -EADDRINUSE;</div><div class='add'>+</div><div class='add'>+		*pent = mk_lv2ent_spage(paddr);</div><div class='add'>+		pgtable_flush(pent, pent + 1);</div><div class='add'>+		*pgcnt -= 1;</div><div class='add'>+	} else { /* size == LPAGE_SIZE */</div><div class='add'>+		int i;</div><div class='add'>+		for (i = 0; i &lt; SPAGES_PER_LPAGE; i++, pent++) {</div><div class='add'>+			if (!lv2ent_fault(pent)) {</div><div class='add'>+				memset(pent, 0, sizeof(*pent) * i);</div><div class='add'>+				return -EADDRINUSE;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			*pent = mk_lv2ent_lpage(paddr);</div><div class='add'>+		}</div><div class='add'>+		pgtable_flush(pent - SPAGES_PER_LPAGE, pent);</div><div class='add'>+		*pgcnt -= SPAGES_PER_LPAGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int exynos_iommu_map(struct iommu_domain *domain, unsigned long iova,</div><div class='add'>+			 phys_addr_t paddr, size_t size, int prot)</div><div class='add'>+{</div><div class='add'>+	struct exynos_iommu_domain *priv = domain-&gt;priv;</div><div class='add'>+	unsigned long *entry;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	BUG_ON(priv-&gt;pgtable == NULL);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;pgtablelock, flags);</div><div class='add'>+</div><div class='add'>+	entry = section_entry(priv-&gt;pgtable, iova);</div><div class='add'>+</div><div class='add'>+	if (size == SECT_SIZE) {</div><div class='add'>+		ret = lv1set_section(entry, paddr,</div><div class='add'>+					&amp;priv-&gt;lv2entcnt[lv1ent_offset(iova)]);</div><div class='add'>+	} else {</div><div class='add'>+		unsigned long *pent;</div><div class='add'>+</div><div class='add'>+		pent = alloc_lv2entry(entry, iova,</div><div class='add'>+					&amp;priv-&gt;lv2entcnt[lv1ent_offset(iova)]);</div><div class='add'>+</div><div class='add'>+		if (!pent)</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+		else</div><div class='add'>+			ret = lv2set_page(pent, paddr, size,</div><div class='add'>+					&amp;priv-&gt;lv2entcnt[lv1ent_offset(iova)]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_debug("%s: Failed to map iova 0x%lx/0x%x bytes\n",</div><div class='add'>+							__func__, iova, size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;pgtablelock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t exynos_iommu_unmap(struct iommu_domain *domain,</div><div class='add'>+					       unsigned long iova, size_t size)</div><div class='add'>+{</div><div class='add'>+	struct exynos_iommu_domain *priv = domain-&gt;priv;</div><div class='add'>+	struct sysmmu_drvdata *data;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned long *ent;</div><div class='add'>+</div><div class='add'>+	BUG_ON(priv-&gt;pgtable == NULL);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;pgtablelock, flags);</div><div class='add'>+</div><div class='add'>+	ent = section_entry(priv-&gt;pgtable, iova);</div><div class='add'>+</div><div class='add'>+	if (lv1ent_section(ent)) {</div><div class='add'>+		BUG_ON(size &lt; SECT_SIZE);</div><div class='add'>+</div><div class='add'>+		*ent = 0;</div><div class='add'>+		pgtable_flush(ent, ent + 1);</div><div class='add'>+		size = SECT_SIZE;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(lv1ent_fault(ent))) {</div><div class='add'>+		if (size &gt; SECT_SIZE)</div><div class='add'>+			size = SECT_SIZE;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* lv1ent_page(sent) == true here */</div><div class='add'>+</div><div class='add'>+	ent = page_entry(ent, iova);</div><div class='add'>+</div><div class='add'>+	if (unlikely(lv2ent_fault(ent))) {</div><div class='add'>+		size = SPAGE_SIZE;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (lv2ent_small(ent)) {</div><div class='add'>+		*ent = 0;</div><div class='add'>+		size = SPAGE_SIZE;</div><div class='add'>+		priv-&gt;lv2entcnt[lv1ent_offset(iova)] += 1;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* lv1ent_large(ent) == true here */</div><div class='add'>+	BUG_ON(size &lt; LPAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	memset(ent, 0, sizeof(*ent) * SPAGES_PER_LPAGE);</div><div class='add'>+</div><div class='add'>+	size = LPAGE_SIZE;</div><div class='add'>+	priv-&gt;lv2entcnt[lv1ent_offset(iova)] += SPAGES_PER_LPAGE;</div><div class='add'>+done:</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;pgtablelock, flags);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='add'>+	list_for_each_entry(data, &amp;priv-&gt;clients, node)</div><div class='add'>+		sysmmu_tlb_invalidate_entry(data-&gt;dev, iova);</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static phys_addr_t exynos_iommu_iova_to_phys(struct iommu_domain *domain,</div><div class='add'>+					  unsigned long iova)</div><div class='add'>+{</div><div class='add'>+	struct exynos_iommu_domain *priv = domain-&gt;priv;</div><div class='add'>+	unsigned long *entry;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	phys_addr_t phys = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;pgtablelock, flags);</div><div class='add'>+</div><div class='add'>+	entry = section_entry(priv-&gt;pgtable, iova);</div><div class='add'>+</div><div class='add'>+	if (lv1ent_section(entry)) {</div><div class='add'>+		phys = section_phys(entry) + section_offs(iova);</div><div class='add'>+	} else if (lv1ent_page(entry)) {</div><div class='add'>+		entry = page_entry(entry, iova);</div><div class='add'>+</div><div class='add'>+		if (lv2ent_large(entry))</div><div class='add'>+			phys = lpage_phys(entry) + lpage_offs(iova);</div><div class='add'>+		else if (lv2ent_small(entry))</div><div class='add'>+			phys = spage_phys(entry) + spage_offs(iova);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;pgtablelock, flags);</div><div class='add'>+</div><div class='add'>+	return phys;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct iommu_ops exynos_iommu_ops = {</div><div class='add'>+	.domain_init = &amp;exynos_iommu_domain_init,</div><div class='add'>+	.domain_destroy = &amp;exynos_iommu_domain_destroy,</div><div class='add'>+	.attach_dev = &amp;exynos_iommu_attach_device,</div><div class='add'>+	.detach_dev = &amp;exynos_iommu_detach_device,</div><div class='add'>+	.map = &amp;exynos_iommu_map,</div><div class='add'>+	.unmap = &amp;exynos_iommu_unmap,</div><div class='add'>+	.iova_to_phys = &amp;exynos_iommu_iova_to_phys,</div><div class='add'>+	.pgsize_bitmap = SECT_SIZE | LPAGE_SIZE | SPAGE_SIZE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init exynos_iommu_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = platform_driver_register(&amp;exynos_sysmmu_driver);</div><div class='add'>+</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		bus_set_iommu(&amp;platform_bus_type, &amp;exynos_iommu_ops);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(exynos_iommu_init);</div><div class='head'>diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c<br/>index f93d5ac8f81c..b12af2ff8c54 100644<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/intel-iommu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/intel-iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/intel-iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/intel-iommu.c</a></div><div class='hunk'>@@ -42,6 +42,7 @@</div><div class='ctx'> #include &lt;linux/dmi.h&gt;</div><div class='ctx'> #include &lt;linux/pci-ats.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;asm/irq_remapping.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/iommu.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -1906,6 +1907,15 @@ static void iommu_detach_dev(struct intel_iommu *iommu, u8 bus, u8 devfn)</div><div class='ctx'> 	iommu-&gt;flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void unlink_domain_info(struct device_domain_info *info)</div><div class='add'>+{</div><div class='add'>+	assert_spin_locked(&amp;device_domain_lock);</div><div class='add'>+	list_del(&amp;info-&gt;link);</div><div class='add'>+	list_del(&amp;info-&gt;global);</div><div class='add'>+	if (info-&gt;dev)</div><div class='add'>+		info-&gt;dev-&gt;dev.archdata.iommu = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void domain_remove_dev_info(struct dmar_domain *domain)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_domain_info *info;</div><div class='hunk'>@@ -1916,10 +1926,7 @@ static void domain_remove_dev_info(struct dmar_domain *domain)</div><div class='ctx'> 	while (!list_empty(&amp;domain-&gt;devices)) {</div><div class='ctx'> 		info = list_entry(domain-&gt;devices.next,</div><div class='ctx'> 			struct device_domain_info, link);</div><div class='del'>-		list_del(&amp;info-&gt;link);</div><div class='del'>-		list_del(&amp;info-&gt;global);</div><div class='del'>-		if (info-&gt;dev)</div><div class='del'>-			info-&gt;dev-&gt;dev.archdata.iommu = NULL;</div><div class='add'>+		unlink_domain_info(info);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;device_domain_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 		iommu_disable_dev_iotlb(info);</div><div class='hunk'>@@ -2286,12 +2293,6 @@ static int domain_add_dev_info(struct dmar_domain *domain,</div><div class='ctx'> 	if (!info)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ret = domain_context_mapping(domain, pdev, translation);</div><div class='del'>-	if (ret) {</div><div class='del'>-		free_devinfo_mem(info);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	info-&gt;segment = pci_domain_nr(pdev-&gt;bus);</div><div class='ctx'> 	info-&gt;bus = pdev-&gt;bus-&gt;number;</div><div class='ctx'> 	info-&gt;devfn = pdev-&gt;devfn;</div><div class='hunk'>@@ -2304,6 +2305,15 @@ static int domain_add_dev_info(struct dmar_domain *domain,</div><div class='ctx'> 	pdev-&gt;dev.archdata.iommu = info;</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;device_domain_lock, flags);</div><div class='ctx'> </div><div class='add'>+	ret = domain_context_mapping(domain, pdev, translation);</div><div class='add'>+	if (ret) {</div><div class='add'>+		spin_lock_irqsave(&amp;device_domain_lock, flags);</div><div class='add'>+		unlink_domain_info(info);</div><div class='add'>+		spin_unlock_irqrestore(&amp;device_domain_lock, flags);</div><div class='add'>+		free_devinfo_mem(info);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3727,10 +3737,7 @@ static void domain_remove_one_dev_info(struct dmar_domain *domain,</div><div class='ctx'> 		if (info-&gt;segment == pci_domain_nr(pdev-&gt;bus) &amp;&amp;</div><div class='ctx'> 		    info-&gt;bus == pdev-&gt;bus-&gt;number &amp;&amp;</div><div class='ctx'> 		    info-&gt;devfn == pdev-&gt;devfn) {</div><div class='del'>-			list_del(&amp;info-&gt;link);</div><div class='del'>-			list_del(&amp;info-&gt;global);</div><div class='del'>-			if (info-&gt;dev)</div><div class='del'>-				info-&gt;dev-&gt;dev.archdata.iommu = NULL;</div><div class='add'>+			unlink_domain_info(info);</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;device_domain_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 			iommu_disable_dev_iotlb(info);</div><div class='hunk'>@@ -3785,11 +3792,7 @@ static void vm_domain_remove_all_dev_info(struct dmar_domain *domain)</div><div class='ctx'> 	while (!list_empty(&amp;domain-&gt;devices)) {</div><div class='ctx'> 		info = list_entry(domain-&gt;devices.next,</div><div class='ctx'> 			struct device_domain_info, link);</div><div class='del'>-		list_del(&amp;info-&gt;link);</div><div class='del'>-		list_del(&amp;info-&gt;global);</div><div class='del'>-		if (info-&gt;dev)</div><div class='del'>-			info-&gt;dev-&gt;dev.archdata.iommu = NULL;</div><div class='del'>-</div><div class='add'>+		unlink_domain_info(info);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;device_domain_lock, flags1);</div><div class='ctx'> </div><div class='ctx'> 		iommu_disable_dev_iotlb(info);</div><div class='hunk'>@@ -4082,7 +4085,7 @@ static int intel_iommu_domain_has_cap(struct iommu_domain *domain,</div><div class='ctx'> 	if (cap == IOMMU_CAP_CACHE_COHERENCY)</div><div class='ctx'> 		return dmar_domain-&gt;iommu_snooping;</div><div class='ctx'> 	if (cap == IOMMU_CAP_INTR_REMAP)</div><div class='del'>-		return intr_remapping_enabled;</div><div class='add'>+		return irq_remapping_enabled;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/iommu/intr_remapping.c b/drivers/iommu/intel_irq_remapping.c<br/>index 6777ca049471..6d347064b8b0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/intr_remapping.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/intr_remapping.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/intel_irq_remapping.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/intel_irq_remapping.c</a></div><div class='hunk'>@@ -10,49 +10,33 @@</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/intel-iommu.h&gt;</div><div class='del'>-#include "intr_remapping.h"</div><div class='ctx'> #include &lt;acpi/acpi.h&gt;</div><div class='add'>+#include &lt;asm/irq_remapping.h&gt;</div><div class='ctx'> #include &lt;asm/pci-direct.h&gt;</div><div class='add'>+#include &lt;asm/msidef.h&gt;</div><div class='ctx'> </div><div class='del'>-static struct ioapic_scope ir_ioapic[MAX_IO_APICS];</div><div class='del'>-static struct hpet_scope ir_hpet[MAX_HPET_TBS];</div><div class='del'>-static int ir_ioapic_num, ir_hpet_num;</div><div class='del'>-int intr_remapping_enabled;</div><div class='del'>-</div><div class='del'>-static int disable_intremap;</div><div class='del'>-static int disable_sourceid_checking;</div><div class='del'>-static int no_x2apic_optout;</div><div class='add'>+#include "irq_remapping.h"</div><div class='ctx'> </div><div class='del'>-static __init int setup_nointremap(char *str)</div><div class='del'>-{</div><div class='del'>-	disable_intremap = 1;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-early_param("nointremap", setup_nointremap);</div><div class='add'>+struct ioapic_scope {</div><div class='add'>+	struct intel_iommu *iommu;</div><div class='add'>+	unsigned int id;</div><div class='add'>+	unsigned int bus;	/* PCI bus number */</div><div class='add'>+	unsigned int devfn;	/* PCI devfn number */</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static __init int setup_intremap(char *str)</div><div class='del'>-{</div><div class='del'>-	if (!str)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+struct hpet_scope {</div><div class='add'>+	struct intel_iommu *iommu;</div><div class='add'>+	u8 id;</div><div class='add'>+	unsigned int bus;</div><div class='add'>+	unsigned int devfn;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	while (*str) {</div><div class='del'>-		if (!strncmp(str, "on", 2))</div><div class='del'>-			disable_intremap = 0;</div><div class='del'>-		else if (!strncmp(str, "off", 3))</div><div class='del'>-			disable_intremap = 1;</div><div class='del'>-		else if (!strncmp(str, "nosid", 5))</div><div class='del'>-			disable_sourceid_checking = 1;</div><div class='del'>-		else if (!strncmp(str, "no_x2apic_optout", 16))</div><div class='del'>-			no_x2apic_optout = 1;</div><div class='del'>-</div><div class='del'>-		str += strcspn(str, ",");</div><div class='del'>-		while (*str == ',')</div><div class='del'>-			str++;</div><div class='del'>-	}</div><div class='add'>+#define IR_X2APIC_MODE(mode) (mode ? (1 &lt;&lt; 11) : 0)</div><div class='add'>+#define IRTE_DEST(dest) ((x2apic_mode) ? dest : dest &lt;&lt; 8)</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-early_param("intremap", setup_intremap);</div><div class='add'>+static struct ioapic_scope ir_ioapic[MAX_IO_APICS];</div><div class='add'>+static struct hpet_scope ir_hpet[MAX_HPET_TBS];</div><div class='add'>+static int ir_ioapic_num, ir_hpet_num;</div><div class='ctx'> </div><div class='ctx'> static DEFINE_RAW_SPINLOCK(irq_2_ir_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -80,7 +64,7 @@ int get_irte(int irq, struct irte *entry)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)</div><div class='add'>+static int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)</div><div class='ctx'> {</div><div class='ctx'> 	struct ir_table *table = iommu-&gt;ir_table;</div><div class='ctx'> 	struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);</div><div class='hunk'>@@ -152,7 +136,7 @@ static int qi_flush_iec(struct intel_iommu *iommu, int index, int mask)</div><div class='ctx'> 	return qi_submit_sync(&amp;desc, iommu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int map_irq_to_irte_handle(int irq, u16 *sub_handle)</div><div class='add'>+static int map_irq_to_irte_handle(int irq, u16 *sub_handle)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -168,7 +152,7 @@ int map_irq_to_irte_handle(int irq, u16 *sub_handle)</div><div class='ctx'> 	return index;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)</div><div class='add'>+static int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -188,7 +172,7 @@ int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int modify_irte(int irq, struct irte *irte_modified)</div><div class='add'>+static int modify_irte(int irq, struct irte *irte_modified)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);</div><div class='ctx'> 	struct intel_iommu *iommu;</div><div class='hunk'>@@ -216,7 +200,7 @@ int modify_irte(int irq, struct irte *irte_modified)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct intel_iommu *map_hpet_to_ir(u8 hpet_id)</div><div class='add'>+static struct intel_iommu *map_hpet_to_ir(u8 hpet_id)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -226,7 +210,7 @@ struct intel_iommu *map_hpet_to_ir(u8 hpet_id)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct intel_iommu *map_ioapic_to_ir(int apic)</div><div class='add'>+static struct intel_iommu *map_ioapic_to_ir(int apic)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -236,7 +220,7 @@ struct intel_iommu *map_ioapic_to_ir(int apic)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct intel_iommu *map_dev_to_ir(struct pci_dev *dev)</div><div class='add'>+static struct intel_iommu *map_dev_to_ir(struct pci_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmar_drhd_unit *drhd;</div><div class='ctx'> </div><div class='hunk'>@@ -270,7 +254,7 @@ static int clear_entries(struct irq_2_iommu *irq_iommu)</div><div class='ctx'> 	return qi_flush_iec(iommu, index, irq_iommu-&gt;irte_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int free_irte(int irq)</div><div class='add'>+static int free_irte(int irq)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -328,7 +312,7 @@ static void set_irte_sid(struct irte *irte, unsigned int svt,</div><div class='ctx'> 	irte-&gt;sid = sid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int set_ioapic_sid(struct irte *irte, int apic)</div><div class='add'>+static int set_ioapic_sid(struct irte *irte, int apic)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u16 sid = 0;</div><div class='hunk'>@@ -353,7 +337,7 @@ int set_ioapic_sid(struct irte *irte, int apic)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int set_hpet_sid(struct irte *irte, u8 id)</div><div class='add'>+static int set_hpet_sid(struct irte *irte, u8 id)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u16 sid = 0;</div><div class='hunk'>@@ -383,7 +367,7 @@ int set_hpet_sid(struct irte *irte, u8 id)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int set_msi_sid(struct irte *irte, struct pci_dev *dev)</div><div class='add'>+static int set_msi_sid(struct irte *irte, struct pci_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *bridge;</div><div class='ctx'> </div><div class='hunk'>@@ -410,7 +394,7 @@ int set_msi_sid(struct irte *irte, struct pci_dev *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)</div><div class='add'>+static void iommu_set_irq_remapping(struct intel_iommu *iommu, int mode)</div><div class='ctx'> {</div><div class='ctx'> 	u64 addr;</div><div class='ctx'> 	u32 sts;</div><div class='hunk'>@@ -450,7 +434,7 @@ static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int setup_intr_remapping(struct intel_iommu *iommu, int mode)</div><div class='add'>+static int intel_setup_irq_remapping(struct intel_iommu *iommu, int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct ir_table *ir_table;</div><div class='ctx'> 	struct page *pages;</div><div class='hunk'>@@ -473,14 +457,14 @@ static int setup_intr_remapping(struct intel_iommu *iommu, int mode)</div><div class='ctx'> </div><div class='ctx'> 	ir_table-&gt;base = page_address(pages);</div><div class='ctx'> </div><div class='del'>-	iommu_set_intr_remapping(iommu, mode);</div><div class='add'>+	iommu_set_irq_remapping(iommu, mode);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Disable Interrupt Remapping.</div><div class='ctx'>  */</div><div class='del'>-static void iommu_disable_intr_remapping(struct intel_iommu *iommu)</div><div class='add'>+static void iommu_disable_irq_remapping(struct intel_iommu *iommu)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 sts;</div><div class='hunk'>@@ -519,11 +503,11 @@ static int __init dmar_x2apic_optout(void)</div><div class='ctx'> 	return dmar-&gt;flags &amp; DMAR_X2APIC_OPT_OUT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __init intr_remapping_supported(void)</div><div class='add'>+static int __init intel_irq_remapping_supported(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmar_drhd_unit *drhd;</div><div class='ctx'> </div><div class='del'>-	if (disable_intremap)</div><div class='add'>+	if (disable_irq_remap)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!dmar_ir_support())</div><div class='hunk'>@@ -539,7 +523,7 @@ int __init intr_remapping_supported(void)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __init enable_intr_remapping(void)</div><div class='add'>+static int __init intel_enable_irq_remapping(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmar_drhd_unit *drhd;</div><div class='ctx'> 	int setup = 0;</div><div class='hunk'>@@ -577,7 +561,7 @@ int __init enable_intr_remapping(void)</div><div class='ctx'> 		 * Disable intr remapping and queued invalidation, if already</div><div class='ctx'> 		 * enabled prior to OS handover.</div><div class='ctx'> 		 */</div><div class='del'>-		iommu_disable_intr_remapping(iommu);</div><div class='add'>+		iommu_disable_irq_remapping(iommu);</div><div class='ctx'> </div><div class='ctx'> 		dmar_disable_qi(iommu);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -623,7 +607,7 @@ int __init enable_intr_remapping(void)</div><div class='ctx'> 		if (!ecap_ir_support(iommu-&gt;ecap))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (setup_intr_remapping(iommu, eim))</div><div class='add'>+		if (intel_setup_irq_remapping(iommu, eim))</div><div class='ctx'> 			goto error;</div><div class='ctx'> </div><div class='ctx'> 		setup = 1;</div><div class='hunk'>@@ -632,7 +616,7 @@ int __init enable_intr_remapping(void)</div><div class='ctx'> 	if (!setup)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='del'>-	intr_remapping_enabled = 1;</div><div class='add'>+	irq_remapping_enabled = 1;</div><div class='ctx'> 	pr_info("Enabled IRQ remapping in %s mode\n", eim ? "x2apic" : "xapic");</div><div class='ctx'> </div><div class='ctx'> 	return eim ? IRQ_REMAP_X2APIC_MODE : IRQ_REMAP_XAPIC_MODE;</div><div class='hunk'>@@ -775,14 +759,14 @@ int __init parse_ioapics_under_ir(void)</div><div class='ctx'> </div><div class='ctx'> int __init ir_dev_scope_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (!intr_remapping_enabled)</div><div class='add'>+	if (!irq_remapping_enabled)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	return dmar_dev_scope_init();</div><div class='ctx'> }</div><div class='ctx'> rootfs_initcall(ir_dev_scope_init);</div><div class='ctx'> </div><div class='del'>-void disable_intr_remapping(void)</div><div class='add'>+static void disable_irq_remapping(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmar_drhd_unit *drhd;</div><div class='ctx'> 	struct intel_iommu *iommu = NULL;</div><div class='hunk'>@@ -794,11 +778,11 @@ void disable_intr_remapping(void)</div><div class='ctx'> 		if (!ecap_ir_support(iommu-&gt;ecap))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		iommu_disable_intr_remapping(iommu);</div><div class='add'>+		iommu_disable_irq_remapping(iommu);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int reenable_intr_remapping(int eim)</div><div class='add'>+static int reenable_irq_remapping(int eim)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmar_drhd_unit *drhd;</div><div class='ctx'> 	int setup = 0;</div><div class='hunk'>@@ -816,7 +800,7 @@ int reenable_intr_remapping(int eim)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		/* Set up interrupt remapping for iommu.*/</div><div class='del'>-		iommu_set_intr_remapping(iommu, eim);</div><div class='add'>+		iommu_set_irq_remapping(iommu, eim);</div><div class='ctx'> 		setup = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -832,3 +816,254 @@ error:</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void prepare_irte(struct irte *irte, int vector,</div><div class='add'>+			 unsigned int dest)</div><div class='add'>+{</div><div class='add'>+	memset(irte, 0, sizeof(*irte));</div><div class='add'>+</div><div class='add'>+	irte-&gt;present = 1;</div><div class='add'>+	irte-&gt;dst_mode = apic-&gt;irq_dest_mode;</div><div class='add'>+	/*</div><div class='add'>+	 * Trigger mode in the IRTE will always be edge, and for IO-APIC, the</div><div class='add'>+	 * actual level or edge trigger will be setup in the IO-APIC</div><div class='add'>+	 * RTE. This will help simplify level triggered irq migration.</div><div class='add'>+	 * For more details, see the comments (in io_apic.c) explainig IO-APIC</div><div class='add'>+	 * irq migration in the presence of interrupt-remapping.</div><div class='add'>+	*/</div><div class='add'>+	irte-&gt;trigger_mode = 0;</div><div class='add'>+	irte-&gt;dlvry_mode = apic-&gt;irq_delivery_mode;</div><div class='add'>+	irte-&gt;vector = vector;</div><div class='add'>+	irte-&gt;dest_id = IRTE_DEST(dest);</div><div class='add'>+	irte-&gt;redir_hint = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int intel_setup_ioapic_entry(int irq,</div><div class='add'>+				    struct IO_APIC_route_entry *route_entry,</div><div class='add'>+				    unsigned int destination, int vector,</div><div class='add'>+				    struct io_apic_irq_attr *attr)</div><div class='add'>+{</div><div class='add'>+	int ioapic_id = mpc_ioapic_id(attr-&gt;ioapic);</div><div class='add'>+	struct intel_iommu *iommu = map_ioapic_to_ir(ioapic_id);</div><div class='add'>+	struct IR_IO_APIC_route_entry *entry;</div><div class='add'>+	struct irte irte;</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	if (!iommu) {</div><div class='add'>+		pr_warn("No mapping iommu for ioapic %d\n", ioapic_id);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	entry = (struct IR_IO_APIC_route_entry *)route_entry;</div><div class='add'>+</div><div class='add'>+	index = alloc_irte(iommu, irq, 1);</div><div class='add'>+	if (index &lt; 0) {</div><div class='add'>+		pr_warn("Failed to allocate IRTE for ioapic %d\n", ioapic_id);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prepare_irte(&amp;irte, vector, destination);</div><div class='add'>+</div><div class='add'>+	/* Set source-id of interrupt request */</div><div class='add'>+	set_ioapic_sid(&amp;irte, ioapic_id);</div><div class='add'>+</div><div class='add'>+	modify_irte(irq, &amp;irte);</div><div class='add'>+</div><div class='add'>+	apic_printk(APIC_VERBOSE, KERN_DEBUG "IOAPIC[%d]: "</div><div class='add'>+		"Set IRTE entry (P:%d FPD:%d Dst_Mode:%d "</div><div class='add'>+		"Redir_hint:%d Trig_Mode:%d Dlvry_Mode:%X "</div><div class='add'>+		"Avail:%X Vector:%02X Dest:%08X "</div><div class='add'>+		"SID:%04X SQ:%X SVT:%X)\n",</div><div class='add'>+		attr-&gt;ioapic, irte.present, irte.fpd, irte.dst_mode,</div><div class='add'>+		irte.redir_hint, irte.trigger_mode, irte.dlvry_mode,</div><div class='add'>+		irte.avail, irte.vector, irte.dest_id,</div><div class='add'>+		irte.sid, irte.sq, irte.svt);</div><div class='add'>+</div><div class='add'>+	memset(entry, 0, sizeof(*entry));</div><div class='add'>+</div><div class='add'>+	entry-&gt;index2	= (index &gt;&gt; 15) &amp; 0x1;</div><div class='add'>+	entry-&gt;zero	= 0;</div><div class='add'>+	entry-&gt;format	= 1;</div><div class='add'>+	entry-&gt;index	= (index &amp; 0x7fff);</div><div class='add'>+	/*</div><div class='add'>+	 * IO-APIC RTE will be configured with virtual vector.</div><div class='add'>+	 * irq handler will do the explicit EOI to the io-apic.</div><div class='add'>+	 */</div><div class='add'>+	entry-&gt;vector	= attr-&gt;ioapic_pin;</div><div class='add'>+	entry-&gt;mask	= 0;			/* enable IRQ */</div><div class='add'>+	entry-&gt;trigger	= attr-&gt;trigger;</div><div class='add'>+	entry-&gt;polarity	= attr-&gt;polarity;</div><div class='add'>+</div><div class='add'>+	/* Mask level triggered irqs.</div><div class='add'>+	 * Use IRQ_DELAYED_DISABLE for edge triggered irqs.</div><div class='add'>+	 */</div><div class='add'>+	if (attr-&gt;trigger)</div><div class='add'>+		entry-&gt;mask = 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+/*</div><div class='add'>+ * Migrate the IO-APIC irq in the presence of intr-remapping.</div><div class='add'>+ *</div><div class='add'>+ * For both level and edge triggered, irq migration is a simple atomic</div><div class='add'>+ * update(of vector and cpu destination) of IRTE and flush the hardware cache.</div><div class='add'>+ *</div><div class='add'>+ * For level triggered, we eliminate the io-apic RTE modification (with the</div><div class='add'>+ * updated vector information), by using a virtual vector (io-apic pin number).</div><div class='add'>+ * Real vector that is used for interrupting cpu will be coming from</div><div class='add'>+ * the interrupt-remapping table entry.</div><div class='add'>+ *</div><div class='add'>+ * As the migration is a simple atomic update of IRTE, the same mechanism</div><div class='add'>+ * is used to migrate MSI irq's in the presence of interrupt-remapping.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+intel_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,</div><div class='add'>+			  bool force)</div><div class='add'>+{</div><div class='add'>+	struct irq_cfg *cfg = data-&gt;chip_data;</div><div class='add'>+	unsigned int dest, irq = data-&gt;irq;</div><div class='add'>+	struct irte irte;</div><div class='add'>+</div><div class='add'>+	if (!cpumask_intersects(mask, cpu_online_mask))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (get_irte(irq, &amp;irte))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (assign_irq_vector(irq, cfg, mask))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	dest = apic-&gt;cpu_mask_to_apicid_and(cfg-&gt;domain, mask);</div><div class='add'>+</div><div class='add'>+	irte.vector = cfg-&gt;vector;</div><div class='add'>+	irte.dest_id = IRTE_DEST(dest);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Atomically updates the IRTE with the new destination, vector</div><div class='add'>+	 * and flushes the interrupt entry cache.</div><div class='add'>+	 */</div><div class='add'>+	modify_irte(irq, &amp;irte);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * After this point, all the interrupts will start arriving</div><div class='add'>+	 * at the new destination. So, time to cleanup the previous</div><div class='add'>+	 * vector allocation.</div><div class='add'>+	 */</div><div class='add'>+	if (cfg-&gt;move_in_progress)</div><div class='add'>+		send_cleanup_vector(cfg);</div><div class='add'>+</div><div class='add'>+	cpumask_copy(data-&gt;affinity, mask);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void intel_compose_msi_msg(struct pci_dev *pdev,</div><div class='add'>+				  unsigned int irq, unsigned int dest,</div><div class='add'>+				  struct msi_msg *msg, u8 hpet_id)</div><div class='add'>+{</div><div class='add'>+	struct irq_cfg *cfg;</div><div class='add'>+	struct irte irte;</div><div class='add'>+	u16 sub_handle = 0;</div><div class='add'>+	int ir_index;</div><div class='add'>+</div><div class='add'>+	cfg = irq_get_chip_data(irq);</div><div class='add'>+</div><div class='add'>+	ir_index = map_irq_to_irte_handle(irq, &amp;sub_handle);</div><div class='add'>+	BUG_ON(ir_index == -1);</div><div class='add'>+</div><div class='add'>+	prepare_irte(&amp;irte, cfg-&gt;vector, dest);</div><div class='add'>+</div><div class='add'>+	/* Set source-id of interrupt request */</div><div class='add'>+	if (pdev)</div><div class='add'>+		set_msi_sid(&amp;irte, pdev);</div><div class='add'>+	else</div><div class='add'>+		set_hpet_sid(&amp;irte, hpet_id);</div><div class='add'>+</div><div class='add'>+	modify_irte(irq, &amp;irte);</div><div class='add'>+</div><div class='add'>+	msg-&gt;address_hi = MSI_ADDR_BASE_HI;</div><div class='add'>+	msg-&gt;data = sub_handle;</div><div class='add'>+	msg-&gt;address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT |</div><div class='add'>+			  MSI_ADDR_IR_SHV |</div><div class='add'>+			  MSI_ADDR_IR_INDEX1(ir_index) |</div><div class='add'>+			  MSI_ADDR_IR_INDEX2(ir_index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Map the PCI dev to the corresponding remapping hardware unit</div><div class='add'>+ * and allocate 'nvec' consecutive interrupt-remapping table entries</div><div class='add'>+ * in it.</div><div class='add'>+ */</div><div class='add'>+static int intel_msi_alloc_irq(struct pci_dev *dev, int irq, int nvec)</div><div class='add'>+{</div><div class='add'>+	struct intel_iommu *iommu;</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	iommu = map_dev_to_ir(dev);</div><div class='add'>+	if (!iommu) {</div><div class='add'>+		printk(KERN_ERR</div><div class='add'>+		       "Unable to map PCI %s to iommu\n", pci_name(dev));</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	index = alloc_irte(iommu, irq, nvec);</div><div class='add'>+	if (index &lt; 0) {</div><div class='add'>+		printk(KERN_ERR</div><div class='add'>+		       "Unable to allocate %d IRTE for PCI %s\n", nvec,</div><div class='add'>+		       pci_name(dev));</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+	return index;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int intel_msi_setup_irq(struct pci_dev *pdev, unsigned int irq,</div><div class='add'>+			       int index, int sub_handle)</div><div class='add'>+{</div><div class='add'>+	struct intel_iommu *iommu;</div><div class='add'>+</div><div class='add'>+	iommu = map_dev_to_ir(pdev);</div><div class='add'>+	if (!iommu)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	/*</div><div class='add'>+	 * setup the mapping between the irq and the IRTE</div><div class='add'>+	 * base index, the sub_handle pointing to the</div><div class='add'>+	 * appropriate interrupt remap table entry.</div><div class='add'>+	 */</div><div class='add'>+	set_irte_irq(irq, iommu, index, sub_handle);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int intel_setup_hpet_msi(unsigned int irq, unsigned int id)</div><div class='add'>+{</div><div class='add'>+	struct intel_iommu *iommu = map_hpet_to_ir(id);</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	if (!iommu)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	index = alloc_irte(iommu, irq, 1);</div><div class='add'>+	if (index &lt; 0)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct irq_remap_ops intel_irq_remap_ops = {</div><div class='add'>+	.supported		= intel_irq_remapping_supported,</div><div class='add'>+	.prepare		= dmar_table_init,</div><div class='add'>+	.enable			= intel_enable_irq_remapping,</div><div class='add'>+	.disable		= disable_irq_remapping,</div><div class='add'>+	.reenable		= reenable_irq_remapping,</div><div class='add'>+	.enable_faulting	= enable_drhd_fault_handling,</div><div class='add'>+	.setup_ioapic_entry	= intel_setup_ioapic_entry,</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	.set_affinity		= intel_ioapic_set_affinity,</div><div class='add'>+#endif</div><div class='add'>+	.free_irq		= free_irte,</div><div class='add'>+	.compose_msi_msg	= intel_compose_msi_msg,</div><div class='add'>+	.msi_alloc_irq		= intel_msi_alloc_irq,</div><div class='add'>+	.msi_setup_irq		= intel_msi_setup_irq,</div><div class='add'>+	.setup_hpet_msi		= intel_setup_hpet_msi,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/iommu/intr_remapping.h b/drivers/iommu/intr_remapping.h<br/>deleted file mode 100644<br/>index 5662fecfee60..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/intr_remapping.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/intr_remapping.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-#include &lt;linux/intel-iommu.h&gt;</div><div class='del'>-</div><div class='del'>-struct ioapic_scope {</div><div class='del'>-	struct intel_iommu *iommu;</div><div class='del'>-	unsigned int id;</div><div class='del'>-	unsigned int bus;	/* PCI bus number */</div><div class='del'>-	unsigned int devfn;	/* PCI devfn number */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct hpet_scope {</div><div class='del'>-	struct intel_iommu *iommu;</div><div class='del'>-	u8 id;</div><div class='del'>-	unsigned int bus;</div><div class='del'>-	unsigned int devfn;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define IR_X2APIC_MODE(mode) (mode ? (1 &lt;&lt; 11) : 0)</div><div class='head'>diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c<br/>index 2198b2dbbcd3..8b9ded88e6f5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/iommu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/iommu.c</a></div><div class='hunk'>@@ -119,6 +119,7 @@ EXPORT_SYMBOL_GPL(iommu_present);</div><div class='ctx'>  * iommu_set_fault_handler() - set a fault handler for an iommu domain</div><div class='ctx'>  * @domain: iommu domain</div><div class='ctx'>  * @handler: fault handler</div><div class='add'>+ * @token: user data, will be passed back to the fault handler</div><div class='ctx'>  *</div><div class='ctx'>  * This function should be used by IOMMU users which want to be notified</div><div class='ctx'>  * whenever an IOMMU fault happens.</div><div class='hunk'>@@ -127,11 +128,13 @@ EXPORT_SYMBOL_GPL(iommu_present);</div><div class='ctx'>  * error code otherwise.</div><div class='ctx'>  */</div><div class='ctx'> void iommu_set_fault_handler(struct iommu_domain *domain,</div><div class='del'>-					iommu_fault_handler_t handler)</div><div class='add'>+					iommu_fault_handler_t handler,</div><div class='add'>+					void *token)</div><div class='ctx'> {</div><div class='ctx'> 	BUG_ON(!domain);</div><div class='ctx'> </div><div class='ctx'> 	domain-&gt;handler = handler;</div><div class='add'>+	domain-&gt;handler_token = token;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(iommu_set_fault_handler);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c<br/>new file mode 100644<br/>index 000000000000..40cda8e98d87<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/irq_remapping.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/irq_remapping.c</a></div><div class='hunk'>@@ -0,0 +1,166 @@</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+</div><div class='add'>+#include "irq_remapping.h"</div><div class='add'>+</div><div class='add'>+int irq_remapping_enabled;</div><div class='add'>+</div><div class='add'>+int disable_irq_remap;</div><div class='add'>+int disable_sourceid_checking;</div><div class='add'>+int no_x2apic_optout;</div><div class='add'>+</div><div class='add'>+static struct irq_remap_ops *remap_ops;</div><div class='add'>+</div><div class='add'>+static __init int setup_nointremap(char *str)</div><div class='add'>+{</div><div class='add'>+	disable_irq_remap = 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+early_param("nointremap", setup_nointremap);</div><div class='add'>+</div><div class='add'>+static __init int setup_irqremap(char *str)</div><div class='add'>+{</div><div class='add'>+	if (!str)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	while (*str) {</div><div class='add'>+		if (!strncmp(str, "on", 2))</div><div class='add'>+			disable_irq_remap = 0;</div><div class='add'>+		else if (!strncmp(str, "off", 3))</div><div class='add'>+			disable_irq_remap = 1;</div><div class='add'>+		else if (!strncmp(str, "nosid", 5))</div><div class='add'>+			disable_sourceid_checking = 1;</div><div class='add'>+		else if (!strncmp(str, "no_x2apic_optout", 16))</div><div class='add'>+			no_x2apic_optout = 1;</div><div class='add'>+</div><div class='add'>+		str += strcspn(str, ",");</div><div class='add'>+		while (*str == ',')</div><div class='add'>+			str++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+early_param("intremap", setup_irqremap);</div><div class='add'>+</div><div class='add'>+void __init setup_irq_remapping_ops(void)</div><div class='add'>+{</div><div class='add'>+	remap_ops = &amp;intel_irq_remap_ops;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int irq_remapping_supported(void)</div><div class='add'>+{</div><div class='add'>+	if (disable_irq_remap)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;supported)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return remap_ops-&gt;supported();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init irq_remapping_prepare(void)</div><div class='add'>+{</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;prepare)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return remap_ops-&gt;prepare();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init irq_remapping_enable(void)</div><div class='add'>+{</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;enable)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return remap_ops-&gt;enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void irq_remapping_disable(void)</div><div class='add'>+{</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;disable)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	remap_ops-&gt;disable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int irq_remapping_reenable(int mode)</div><div class='add'>+{</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;reenable)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return remap_ops-&gt;reenable(mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init irq_remap_enable_fault_handling(void)</div><div class='add'>+{</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;enable_faulting)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return remap_ops-&gt;enable_faulting();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int setup_ioapic_remapped_entry(int irq,</div><div class='add'>+				struct IO_APIC_route_entry *entry,</div><div class='add'>+				unsigned int destination, int vector,</div><div class='add'>+				struct io_apic_irq_attr *attr)</div><div class='add'>+{</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;setup_ioapic_entry)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return remap_ops-&gt;setup_ioapic_entry(irq, entry, destination,</div><div class='add'>+					     vector, attr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+int set_remapped_irq_affinity(struct irq_data *data, const struct cpumask *mask,</div><div class='add'>+			      bool force)</div><div class='add'>+{</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;set_affinity)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return remap_ops-&gt;set_affinity(data, mask, force);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void free_remapped_irq(int irq)</div><div class='add'>+{</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;free_irq)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	remap_ops-&gt;free_irq(irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void compose_remapped_msi_msg(struct pci_dev *pdev,</div><div class='add'>+			      unsigned int irq, unsigned int dest,</div><div class='add'>+			      struct msi_msg *msg, u8 hpet_id)</div><div class='add'>+{</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;compose_msi_msg)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	remap_ops-&gt;compose_msi_msg(pdev, irq, dest, msg, hpet_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)</div><div class='add'>+{</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;msi_alloc_irq)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return remap_ops-&gt;msi_alloc_irq(pdev, irq, nvec);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,</div><div class='add'>+			   int index, int sub_handle)</div><div class='add'>+{</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;msi_setup_irq)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return remap_ops-&gt;msi_setup_irq(pdev, irq, index, sub_handle);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int setup_hpet_msi_remapped(unsigned int irq, unsigned int id)</div><div class='add'>+{</div><div class='add'>+	if (!remap_ops || !remap_ops-&gt;setup_hpet_msi)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return remap_ops-&gt;setup_hpet_msi(irq, id);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/iommu/irq_remapping.h b/drivers/iommu/irq_remapping.h<br/>new file mode 100644<br/>index 000000000000..be9d72950c51<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/irq_remapping.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/irq_remapping.h</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 Advanced Micro Devices, Inc.</div><div class='add'>+ * Author: Joerg Roedel &lt;joerg.roedel@amd.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ * by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA</div><div class='add'>+ *</div><div class='add'>+ * This header file contains stuff that is shared between different interrupt</div><div class='add'>+ * remapping drivers but with no need to be visible outside of the IOMMU layer.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __IRQ_REMAPPING_H</div><div class='add'>+#define __IRQ_REMAPPING_H</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IRQ_REMAP</div><div class='add'>+</div><div class='add'>+struct IO_APIC_route_entry;</div><div class='add'>+struct io_apic_irq_attr;</div><div class='add'>+struct irq_data;</div><div class='add'>+struct cpumask;</div><div class='add'>+struct pci_dev;</div><div class='add'>+struct msi_msg;</div><div class='add'>+</div><div class='add'>+extern int disable_irq_remap;</div><div class='add'>+extern int disable_sourceid_checking;</div><div class='add'>+extern int no_x2apic_optout;</div><div class='add'>+</div><div class='add'>+struct irq_remap_ops {</div><div class='add'>+	/* Check whether Interrupt Remapping is supported */</div><div class='add'>+	int (*supported)(void);</div><div class='add'>+</div><div class='add'>+	/* Initializes hardware and makes it ready for remapping interrupts */</div><div class='add'>+	int  (*prepare)(void);</div><div class='add'>+</div><div class='add'>+	/* Enables the remapping hardware */</div><div class='add'>+	int  (*enable)(void);</div><div class='add'>+</div><div class='add'>+	/* Disables the remapping hardware */</div><div class='add'>+	void (*disable)(void);</div><div class='add'>+</div><div class='add'>+	/* Reenables the remapping hardware */</div><div class='add'>+	int  (*reenable)(int);</div><div class='add'>+</div><div class='add'>+	/* Enable fault handling */</div><div class='add'>+	int  (*enable_faulting)(void);</div><div class='add'>+</div><div class='add'>+	/* IO-APIC setup routine */</div><div class='add'>+	int (*setup_ioapic_entry)(int irq, struct IO_APIC_route_entry *,</div><div class='add'>+				  unsigned int, int,</div><div class='add'>+				  struct io_apic_irq_attr *);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	/* Set the CPU affinity of a remapped interrupt */</div><div class='add'>+	int (*set_affinity)(struct irq_data *data, const struct cpumask *mask,</div><div class='add'>+			    bool force);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* Free an IRQ */</div><div class='add'>+	int (*free_irq)(int);</div><div class='add'>+</div><div class='add'>+	/* Create MSI msg to use for interrupt remapping */</div><div class='add'>+	void (*compose_msi_msg)(struct pci_dev *,</div><div class='add'>+				unsigned int, unsigned int,</div><div class='add'>+				struct msi_msg *, u8);</div><div class='add'>+</div><div class='add'>+	/* Allocate remapping resources for MSI */</div><div class='add'>+	int (*msi_alloc_irq)(struct pci_dev *, int, int);</div><div class='add'>+</div><div class='add'>+	/* Setup the remapped MSI irq */</div><div class='add'>+	int (*msi_setup_irq)(struct pci_dev *, unsigned int, int, int);</div><div class='add'>+</div><div class='add'>+	/* Setup interrupt remapping for an HPET MSI */</div><div class='add'>+	int (*setup_hpet_msi)(unsigned int, unsigned int);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct irq_remap_ops intel_irq_remap_ops;</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_IRQ_REMAP */</div><div class='add'>+</div><div class='add'>+#endif /* __IRQ_REMAPPING_H */</div><div class='head'>diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c<br/>index 6899dcd02dfa..e70ee2b59df9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/omap-iommu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/omap-iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/omap-iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/omap-iommu.c</a></div><div class='hunk'>@@ -41,11 +41,13 @@</div><div class='ctx'>  * @pgtable:	the page table</div><div class='ctx'>  * @iommu_dev:	an omap iommu device attached to this domain. only a single</div><div class='ctx'>  *		iommu device can be attached for now.</div><div class='add'>+ * @dev:	Device using this domain.</div><div class='ctx'>  * @lock:	domain lock, should be taken when attaching/detaching</div><div class='ctx'>  */</div><div class='ctx'> struct omap_iommu_domain {</div><div class='ctx'> 	u32 *pgtable;</div><div class='ctx'> 	struct omap_iommu *iommu_dev;</div><div class='add'>+	struct device *dev;</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1081,6 +1083,7 @@ omap_iommu_attach_dev(struct iommu_domain *domain, struct device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	omap_domain-&gt;iommu_dev = arch_data-&gt;iommu_dev = oiommu;</div><div class='add'>+	omap_domain-&gt;dev = dev;</div><div class='ctx'> 	oiommu-&gt;domain = domain;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -1088,19 +1091,16 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void omap_iommu_detach_dev(struct iommu_domain *domain,</div><div class='del'>-				 struct device *dev)</div><div class='add'>+static void _omap_iommu_detach_dev(struct omap_iommu_domain *omap_domain,</div><div class='add'>+			struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct omap_iommu_domain *omap_domain = domain-&gt;priv;</div><div class='del'>-	struct omap_iommu_arch_data *arch_data = dev-&gt;archdata.iommu;</div><div class='ctx'> 	struct omap_iommu *oiommu = dev_to_omap_iommu(dev);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;omap_domain-&gt;lock);</div><div class='add'>+	struct omap_iommu_arch_data *arch_data = dev-&gt;archdata.iommu;</div><div class='ctx'> </div><div class='ctx'> 	/* only a single device is supported per domain for now */</div><div class='ctx'> 	if (omap_domain-&gt;iommu_dev != oiommu) {</div><div class='ctx'> 		dev_err(dev, "invalid iommu device\n");</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	iopgtable_clear_entry_all(oiommu);</div><div class='hunk'>@@ -1108,8 +1108,16 @@ static void omap_iommu_detach_dev(struct iommu_domain *domain,</div><div class='ctx'> 	omap_iommu_detach(oiommu);</div><div class='ctx'> </div><div class='ctx'> 	omap_domain-&gt;iommu_dev = arch_data-&gt;iommu_dev = NULL;</div><div class='add'>+	omap_domain-&gt;dev = NULL;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='add'>+static void omap_iommu_detach_dev(struct iommu_domain *domain,</div><div class='add'>+				 struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct omap_iommu_domain *omap_domain = domain-&gt;priv;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;omap_domain-&gt;lock);</div><div class='add'>+	_omap_iommu_detach_dev(omap_domain, dev);</div><div class='ctx'> 	spin_unlock(&amp;omap_domain-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1148,13 +1156,19 @@ out:</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* assume device was already detached */</div><div class='ctx'> static void omap_iommu_domain_destroy(struct iommu_domain *domain)</div><div class='ctx'> {</div><div class='ctx'> 	struct omap_iommu_domain *omap_domain = domain-&gt;priv;</div><div class='ctx'> </div><div class='ctx'> 	domain-&gt;priv = NULL;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * An iommu device is still attached</div><div class='add'>+	 * (currently, only one device can be attached) ?</div><div class='add'>+	 */</div><div class='add'>+	if (omap_domain-&gt;iommu_dev)</div><div class='add'>+		_omap_iommu_detach_dev(omap_domain, omap_domain-&gt;dev);</div><div class='add'>+</div><div class='ctx'> 	kfree(omap_domain-&gt;pgtable);</div><div class='ctx'> 	kfree(omap_domain);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c<br/>index 779306ee7b16..0c0a37792218 100644<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/tegra-gart.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/tegra-gart.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/tegra-gart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/tegra-gart.c</a></div><div class='hunk'>@@ -29,15 +29,17 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/iommu.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* bitmap of the page sizes currently supported */</div><div class='ctx'> #define GART_IOMMU_PGSIZES	(SZ_4K)</div><div class='ctx'> </div><div class='del'>-#define GART_CONFIG		0x24</div><div class='del'>-#define GART_ENTRY_ADDR		0x28</div><div class='del'>-#define GART_ENTRY_DATA		0x2c</div><div class='add'>+#define GART_REG_BASE		0x24</div><div class='add'>+#define GART_CONFIG		(0x24 - GART_REG_BASE)</div><div class='add'>+#define GART_ENTRY_ADDR		(0x28 - GART_REG_BASE)</div><div class='add'>+#define GART_ENTRY_DATA		(0x2c - GART_REG_BASE)</div><div class='ctx'> #define GART_ENTRY_PHYS_ADDR_VALID	(1 &lt;&lt; 31)</div><div class='ctx'> </div><div class='ctx'> #define GART_PAGE_SHIFT		12</div><div class='hunk'>@@ -158,7 +160,7 @@ static int gart_iommu_attach_dev(struct iommu_domain *domain,</div><div class='ctx'> 	struct gart_client *client, *c;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	gart = dev_get_drvdata(dev-&gt;parent);</div><div class='add'>+	gart = gart_handle;</div><div class='ctx'> 	if (!gart)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	domain-&gt;priv = gart;</div><div class='hunk'>@@ -422,6 +424,14 @@ const struct dev_pm_ops tegra_gart_pm_ops = {</div><div class='ctx'> 	.resume		= tegra_gart_resume,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static struct of_device_id tegra_gart_of_match[] __devinitdata = {</div><div class='add'>+	{ .compatible = "nvidia,tegra20-gart", },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, tegra_gart_of_match);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct platform_driver tegra_gart_driver = {</div><div class='ctx'> 	.probe		= tegra_gart_probe,</div><div class='ctx'> 	.remove		= tegra_gart_remove,</div><div class='hunk'>@@ -429,6 +439,7 @@ static struct platform_driver tegra_gart_driver = {</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 		.name	= "tegra-gart",</div><div class='ctx'> 		.pm	= &amp;tegra_gart_pm_ops,</div><div class='add'>+		.of_match_table = of_match_ptr(tegra_gart_of_match),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -448,4 +459,5 @@ module_exit(tegra_gart_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("IOMMU API for GART in Tegra20");</div><div class='ctx'> MODULE_AUTHOR("Hiroshi DOYU &lt;hdoyu@nvidia.com&gt;");</div><div class='add'>+MODULE_ALIAS("platform:tegra-gart");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c<br/>index eb93c821f592..ecd679043d77 100644<br/>--- a/<a href='/drm-misc/tree/drivers/iommu/tegra-smmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/iommu/tegra-smmu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/iommu/tegra-smmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/iommu/tegra-smmu.c</a></div><div class='hunk'>@@ -733,7 +733,7 @@ static int smmu_iommu_attach_dev(struct iommu_domain *domain,</div><div class='ctx'> 		pr_info("Reserve \"page zero\" for AVP vectors using a common dummy\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_dbg(smmu-&gt;dev, "%s is attached\n", dev_name(c-&gt;dev));</div><div class='add'>+	dev_dbg(smmu-&gt;dev, "%s is attached\n", dev_name(dev));</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_client:</div><div class='head'>diff --git a/drivers/isdn/capi/capi.c b/drivers/isdn/capi/capi.c<br/>index b902794bbf07..38c4bd87b2c9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/capi/capi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/capi/capi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/capi/capi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/capi/capi.c</a></div><div class='hunk'>@@ -336,11 +336,6 @@ static inline void</div><div class='ctx'> capincci_alloc_minor(struct capidev *cdev, struct capincci *np) { }</div><div class='ctx'> static inline void capincci_free_minor(struct capincci *np) { }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int capincci_minor_opencount(struct capincci *np)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif /* !CONFIG_ISDN_CAPI_MIDDLEWARE */</div><div class='ctx'> </div><div class='ctx'> static struct capincci *capincci_alloc(struct capidev *cdev, u32 ncci)</div><div class='hunk'>@@ -372,6 +367,7 @@ static void capincci_free(struct capidev *cdev, u32 ncci)</div><div class='ctx'> 		}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ISDN_CAPI_MIDDLEWARE</div><div class='ctx'> static struct capincci *capincci_find(struct capidev *cdev, u32 ncci)</div><div class='ctx'> {</div><div class='ctx'> 	struct capincci *np;</div><div class='hunk'>@@ -382,7 +378,6 @@ static struct capincci *capincci_find(struct capidev *cdev, u32 ncci)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ISDN_CAPI_MIDDLEWARE</div><div class='ctx'> /* -------- handle data queue --------------------------------------- */</div><div class='ctx'> </div><div class='ctx'> static struct sk_buff *</div><div class='hunk'>@@ -578,8 +573,8 @@ static void capi_recv_message(struct capi20_appl *ap, struct sk_buff *skb)</div><div class='ctx'> 	struct tty_struct *tty;</div><div class='ctx'> 	struct capiminor *mp;</div><div class='ctx'> 	u16 datahandle;</div><div class='del'>-#endif /* CONFIG_ISDN_CAPI_MIDDLEWARE */</div><div class='ctx'> 	struct capincci *np;</div><div class='add'>+#endif /* CONFIG_ISDN_CAPI_MIDDLEWARE */</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;cdev-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -597,6 +592,12 @@ static void capi_recv_message(struct capi20_appl *ap, struct sk_buff *skb)</div><div class='ctx'> 		goto unlock_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_ISDN_CAPI_MIDDLEWARE</div><div class='add'>+	skb_queue_tail(&amp;cdev-&gt;recvqueue, skb);</div><div class='add'>+	wake_up_interruptible(&amp;cdev-&gt;recvwait);</div><div class='add'>+</div><div class='add'>+#else /* CONFIG_ISDN_CAPI_MIDDLEWARE */</div><div class='add'>+</div><div class='ctx'> 	np = capincci_find(cdev, CAPIMSG_CONTROL(skb-&gt;data));</div><div class='ctx'> 	if (!np) {</div><div class='ctx'> 		printk(KERN_ERR "BUG: capi_signal: ncci not found\n");</div><div class='hunk'>@@ -605,12 +606,6 @@ static void capi_recv_message(struct capi20_appl *ap, struct sk_buff *skb)</div><div class='ctx'> 		goto unlock_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_ISDN_CAPI_MIDDLEWARE</div><div class='del'>-	skb_queue_tail(&amp;cdev-&gt;recvqueue, skb);</div><div class='del'>-	wake_up_interruptible(&amp;cdev-&gt;recvwait);</div><div class='del'>-</div><div class='del'>-#else /* CONFIG_ISDN_CAPI_MIDDLEWARE */</div><div class='del'>-</div><div class='ctx'> 	mp = np-&gt;minorp;</div><div class='ctx'> 	if (!mp) {</div><div class='ctx'> 		skb_queue_tail(&amp;cdev-&gt;recvqueue, skb);</div><div class='hunk'>@@ -786,7 +781,6 @@ register_out:</div><div class='ctx'> 		return retval;</div><div class='ctx'> </div><div class='ctx'> 	case CAPI_GET_VERSION:</div><div class='del'>-	{</div><div class='ctx'> 		if (copy_from_user(&amp;data.contr, argp,</div><div class='ctx'> 				   sizeof(data.contr)))</div><div class='ctx'> 			return -EFAULT;</div><div class='hunk'>@@ -796,11 +790,9 @@ register_out:</div><div class='ctx'> 		if (copy_to_user(argp, &amp;data.version,</div><div class='ctx'> 				 sizeof(data.version)))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	case CAPI_GET_SERIAL:</div><div class='del'>-	{</div><div class='ctx'> 		if (copy_from_user(&amp;data.contr, argp,</div><div class='ctx'> 				   sizeof(data.contr)))</div><div class='ctx'> 			return -EFAULT;</div><div class='hunk'>@@ -810,10 +802,9 @@ register_out:</div><div class='ctx'> 		if (copy_to_user(argp, data.serial,</div><div class='ctx'> 				 sizeof(data.serial)))</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	case CAPI_GET_PROFILE:</div><div class='del'>-	{</div><div class='ctx'> 		if (copy_from_user(&amp;data.contr, argp,</div><div class='ctx'> 				   sizeof(data.contr)))</div><div class='ctx'> 			return -EFAULT;</div><div class='hunk'>@@ -837,11 +828,9 @@ register_out:</div><div class='ctx'> 		}</div><div class='ctx'> 		if (retval)</div><div class='ctx'> 			return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	case CAPI_GET_MANUFACTURER:</div><div class='del'>-	{</div><div class='ctx'> 		if (copy_from_user(&amp;data.contr, argp,</div><div class='ctx'> 				   sizeof(data.contr)))</div><div class='ctx'> 			return -EFAULT;</div><div class='hunk'>@@ -853,8 +842,8 @@ register_out:</div><div class='ctx'> 				 sizeof(data.manufacturer)))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	case CAPI_GET_ERRCODE:</div><div class='ctx'> 		data.errcode = cdev-&gt;errcode;</div><div class='ctx'> 		cdev-&gt;errcode = CAPI_NOERROR;</div><div class='hunk'>@@ -870,8 +859,7 @@ register_out:</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> </div><div class='del'>-	case CAPI_MANUFACTURER_CMD:</div><div class='del'>-	{</div><div class='add'>+	case CAPI_MANUFACTURER_CMD: {</div><div class='ctx'> 		struct capi_manufacturer_cmd mcmd;</div><div class='ctx'> 		if (!capable(CAP_SYS_ADMIN))</div><div class='ctx'> 			return -EPERM;</div><div class='hunk'>@@ -879,8 +867,6 @@ register_out:</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> 		return capi20_manufacturer(mcmd.cmd, mcmd.data);</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='ctx'> 	case CAPI_SET_FLAGS:</div><div class='ctx'> 	case CAPI_CLR_FLAGS: {</div><div class='ctx'> 		unsigned userflags;</div><div class='hunk'>@@ -902,6 +888,11 @@ register_out:</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_ISDN_CAPI_MIDDLEWARE</div><div class='add'>+	case CAPI_NCCI_OPENCOUNT:</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+#else /* CONFIG_ISDN_CAPI_MIDDLEWARE */</div><div class='ctx'> 	case CAPI_NCCI_OPENCOUNT: {</div><div class='ctx'> 		struct capincci *nccip;</div><div class='ctx'> 		unsigned ncci;</div><div class='hunk'>@@ -918,7 +909,6 @@ register_out:</div><div class='ctx'> 		return count;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ISDN_CAPI_MIDDLEWARE</div><div class='ctx'> 	case CAPI_NCCI_GETUNIT: {</div><div class='ctx'> 		struct capincci *nccip;</div><div class='ctx'> 		struct capiminor *mp;</div><div class='head'>diff --git a/drivers/isdn/capi/capidrv.c b/drivers/isdn/capi/capidrv.c<br/>index 6f5016b479f8..832bc807ed20 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/capi/capidrv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/capi/capidrv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/capi/capidrv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/capi/capidrv.c</a></div><div class='hunk'>@@ -1593,7 +1593,7 @@ static int capidrv_command(isdn_ctrl *c, capidrv_contr *card)</div><div class='ctx'> 		return capidrv_ioctl(c, card);</div><div class='ctx'> </div><div class='ctx'> 	switch (c-&gt;command) {</div><div class='del'>-	case ISDN_CMD_DIAL:{</div><div class='add'>+	case ISDN_CMD_DIAL: {</div><div class='ctx'> 		u8 calling[ISDN_MSNLEN + 3];</div><div class='ctx'> 		u8 called[ISDN_MSNLEN + 2];</div><div class='ctx'> </div><div class='hunk'>@@ -2072,7 +2072,8 @@ static int capidrv_addcontr(u16 contr, struct capi_profile *profp)</div><div class='ctx'> 	card-&gt;interface.writebuf_skb = if_sendbuf;</div><div class='ctx'> 	card-&gt;interface.writecmd = NULL;</div><div class='ctx'> 	card-&gt;interface.readstat = if_readstat;</div><div class='del'>-	card-&gt;interface.features = ISDN_FEATURE_L2_HDLC |</div><div class='add'>+	card-&gt;interface.features =</div><div class='add'>+		ISDN_FEATURE_L2_HDLC |</div><div class='ctx'> 		ISDN_FEATURE_L2_TRANS |</div><div class='ctx'> 		ISDN_FEATURE_L3_TRANS |</div><div class='ctx'> 		ISDN_FEATURE_P_UNKNOWN |</div><div class='hunk'>@@ -2080,7 +2081,8 @@ static int capidrv_addcontr(u16 contr, struct capi_profile *profp)</div><div class='ctx'> 		ISDN_FEATURE_L2_X75UI |</div><div class='ctx'> 		ISDN_FEATURE_L2_X75BUI;</div><div class='ctx'> 	if (profp-&gt;support1 &amp; (1 &lt;&lt; 2))</div><div class='del'>-		card-&gt;interface.features |= ISDN_FEATURE_L2_V11096 |</div><div class='add'>+		card-&gt;interface.features |=</div><div class='add'>+			ISDN_FEATURE_L2_V11096 |</div><div class='ctx'> 			ISDN_FEATURE_L2_V11019 |</div><div class='ctx'> 			ISDN_FEATURE_L2_V11038;</div><div class='ctx'> 	if (profp-&gt;support1 &amp; (1 &lt;&lt; 8))</div><div class='head'>diff --git a/drivers/isdn/gigaset/bas-gigaset.c b/drivers/isdn/gigaset/bas-gigaset.c<br/>index afa080258bfa..527588708948 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/gigaset/bas-gigaset.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/gigaset/bas-gigaset.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/gigaset/bas-gigaset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/bas-gigaset.c</a></div><div class='hunk'>@@ -148,6 +148,7 @@ static struct usb_driver gigaset_usb_driver = {</div><div class='ctx'> 	.reset_resume =	gigaset_post_reset,</div><div class='ctx'> 	.pre_reset =	gigaset_pre_reset,</div><div class='ctx'> 	.post_reset =	gigaset_post_reset,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* get message text for usb_submit_urb return code</div><div class='hunk'>@@ -410,10 +411,10 @@ static void check_pending(struct bas_cardstate *ucs)</div><div class='ctx'> 		if (!(ucs-&gt;basstate &amp; BS_RESETTING))</div><div class='ctx'> 			ucs-&gt;pending = 0;</div><div class='ctx'> 		break;</div><div class='del'>-		/*</div><div class='del'>-		 * HD_READ_ATMESSAGE and HD_WRITE_ATMESSAGE are handled separately</div><div class='del'>-		 * and should never end up here</div><div class='del'>-		 */</div><div class='add'>+	/*</div><div class='add'>+	 * HD_READ_ATMESSAGE and HD_WRITE_ATMESSAGE are handled separately</div><div class='add'>+	 * and should never end up here</div><div class='add'>+	 */</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_warn(&amp;ucs-&gt;interface-&gt;dev,</div><div class='ctx'> 			 "unknown pending request 0x%02x cleared\n",</div><div class='hunk'>@@ -877,8 +878,7 @@ static void read_iso_callback(struct urb *urb)</div><div class='ctx'> 		for (i = 0; i &lt; BAS_NUMFRAMES; i++) {</div><div class='ctx'> 			ubc-&gt;isoinlost += urb-&gt;iso_frame_desc[i].actual_length;</div><div class='ctx'> 			if (unlikely(urb-&gt;iso_frame_desc[i].status != 0 &amp;&amp;</div><div class='del'>-				     urb-&gt;iso_frame_desc[i].status !=</div><div class='del'>-				     -EINPROGRESS))</div><div class='add'>+				     urb-&gt;iso_frame_desc[i].status != -EINPROGRESS))</div><div class='ctx'> 				ubc-&gt;loststatus = urb-&gt;iso_frame_desc[i].status;</div><div class='ctx'> 			urb-&gt;iso_frame_desc[i].status = 0;</div><div class='ctx'> 			urb-&gt;iso_frame_desc[i].actual_length = 0;</div><div class='hunk'>@@ -2078,16 +2078,14 @@ static int gigaset_brkchars(struct cardstate *cs, const unsigned char buf[6])</div><div class='ctx'> /* Free hardware dependent part of the B channel structure</div><div class='ctx'>  * parameter:</div><div class='ctx'>  *	bcs	B channel structure</div><div class='del'>- * return value:</div><div class='del'>- *	!=0 on success</div><div class='ctx'>  */</div><div class='del'>-static int gigaset_freebcshw(struct bc_state *bcs)</div><div class='add'>+static void gigaset_freebcshw(struct bc_state *bcs)</div><div class='ctx'> {</div><div class='ctx'> 	struct bas_bc_state *ubc = bcs-&gt;hw.bas;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!ubc)</div><div class='del'>-		return 0;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	/* kill URBs and tasklets before freeing - better safe than sorry */</div><div class='ctx'> 	ubc-&gt;running = 0;</div><div class='hunk'>@@ -2105,14 +2103,13 @@ static int gigaset_freebcshw(struct bc_state *bcs)</div><div class='ctx'> 	kfree(ubc-&gt;isooutbuf);</div><div class='ctx'> 	kfree(ubc);</div><div class='ctx'> 	bcs-&gt;hw.bas = NULL;</div><div class='del'>-	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Initialize hardware dependent part of the B channel structure</div><div class='ctx'>  * parameter:</div><div class='ctx'>  *	bcs	B channel structure</div><div class='ctx'>  * return value:</div><div class='del'>- *	!=0 on success</div><div class='add'>+ *	0 on success, error code &lt; 0 on failure</div><div class='ctx'>  */</div><div class='ctx'> static int gigaset_initbcshw(struct bc_state *bcs)</div><div class='ctx'> {</div><div class='hunk'>@@ -2122,7 +2119,7 @@ static int gigaset_initbcshw(struct bc_state *bcs)</div><div class='ctx'> 	bcs-&gt;hw.bas = ubc = kmalloc(sizeof(struct bas_bc_state), GFP_KERNEL);</div><div class='ctx'> 	if (!ubc) {</div><div class='ctx'> 		pr_err("out of memory\n");</div><div class='del'>-		return 0;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ubc-&gt;running = 0;</div><div class='hunk'>@@ -2139,7 +2136,7 @@ static int gigaset_initbcshw(struct bc_state *bcs)</div><div class='ctx'> 		pr_err("out of memory\n");</div><div class='ctx'> 		kfree(ubc);</div><div class='ctx'> 		bcs-&gt;hw.bas = NULL;</div><div class='del'>-		return 0;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	tasklet_init(&amp;ubc-&gt;sent_tasklet,</div><div class='ctx'> 		     write_iso_tasklet, (unsigned long) bcs);</div><div class='hunk'>@@ -2164,7 +2161,7 @@ static int gigaset_initbcshw(struct bc_state *bcs)</div><div class='ctx'> 	ubc-&gt;stolen0s = 0;</div><div class='ctx'> 	tasklet_init(&amp;ubc-&gt;rcvd_tasklet,</div><div class='ctx'> 		     read_iso_tasklet, (unsigned long) bcs);</div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gigaset_reinitbcshw(struct bc_state *bcs)</div><div class='hunk'>@@ -2187,6 +2184,12 @@ static void gigaset_freecshw(struct cardstate *cs)</div><div class='ctx'> 	cs-&gt;hw.bas = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Initialize hardware dependent part of the cardstate structure</div><div class='add'>+ * parameter:</div><div class='add'>+ *	cs	cardstate structure</div><div class='add'>+ * return value:</div><div class='add'>+ *	0 on success, error code &lt; 0 on failure</div><div class='add'>+ */</div><div class='ctx'> static int gigaset_initcshw(struct cardstate *cs)</div><div class='ctx'> {</div><div class='ctx'> 	struct bas_cardstate *ucs;</div><div class='hunk'>@@ -2194,13 +2197,13 @@ static int gigaset_initcshw(struct cardstate *cs)</div><div class='ctx'> 	cs-&gt;hw.bas = ucs = kmalloc(sizeof *ucs, GFP_KERNEL);</div><div class='ctx'> 	if (!ucs) {</div><div class='ctx'> 		pr_err("out of memory\n");</div><div class='del'>-		return 0;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	ucs-&gt;int_in_buf = kmalloc(IP_MSGSIZE, GFP_KERNEL);</div><div class='ctx'> 	if (!ucs-&gt;int_in_buf) {</div><div class='ctx'> 		kfree(ucs);</div><div class='ctx'> 		pr_err("out of memory\n");</div><div class='del'>-		return 0;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ucs-&gt;urb_cmd_in = NULL;</div><div class='hunk'>@@ -2219,7 +2222,7 @@ static int gigaset_initcshw(struct cardstate *cs)</div><div class='ctx'> 	init_waitqueue_head(&amp;ucs-&gt;waitqueue);</div><div class='ctx'> 	INIT_WORK(&amp;ucs-&gt;int_in_wq, int_in_work);</div><div class='ctx'> </div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* freeurbs</div><div class='hunk'>@@ -2379,18 +2382,20 @@ static int gigaset_probe(struct usb_interface *interface,</div><div class='ctx'> 	/* save address of controller structure */</div><div class='ctx'> 	usb_set_intfdata(interface, cs);</div><div class='ctx'> </div><div class='del'>-	if (!gigaset_start(cs))</div><div class='add'>+	rc = gigaset_start(cs);</div><div class='add'>+	if (rc &lt; 0)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> allocerr:</div><div class='ctx'> 	dev_err(cs-&gt;dev, "could not allocate URBs\n");</div><div class='add'>+	rc = -ENOMEM;</div><div class='ctx'> error:</div><div class='ctx'> 	freeurbs(cs);</div><div class='ctx'> 	usb_set_intfdata(interface, NULL);</div><div class='ctx'> 	gigaset_freecs(cs);</div><div class='del'>-	return -ENODEV;</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* gigaset_disconnect</div><div class='head'>diff --git a/drivers/isdn/gigaset/capi.c b/drivers/isdn/gigaset/capi.c<br/>index 343b5c80cb7b..27e4a3e21d64 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/gigaset/capi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/gigaset/capi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/gigaset/capi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/capi.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include "gigaset.h"</div><div class='ctx'> #include &lt;linux/proc_fs.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/ratelimit.h&gt;</div><div class='ctx'> #include &lt;linux/isdn/capilli.h&gt;</div><div class='ctx'> #include &lt;linux/isdn/capicmd.h&gt;</div><div class='ctx'> #include &lt;linux/isdn/capiutil.h&gt;</div><div class='hunk'>@@ -108,51 +109,35 @@ static struct {</div><div class='ctx'> 	u8 *bc;</div><div class='ctx'> 	u8 *hlc;</div><div class='ctx'> } cip2bchlc[] = {</div><div class='del'>-	[1] = { "8090A3", NULL },</div><div class='del'>-	/* Speech (A-law) */</div><div class='del'>-	[2] = { "8890", NULL },</div><div class='del'>-	/* Unrestricted digital information */</div><div class='del'>-	[3] = { "8990", NULL },</div><div class='del'>-	/* Restricted digital information */</div><div class='del'>-	[4] = { "9090A3", NULL },</div><div class='del'>-	/* 3,1 kHz audio (A-law) */</div><div class='del'>-	[5] = { "9190", NULL },</div><div class='del'>-	/* 7 kHz audio */</div><div class='del'>-	[6] = { "9890", NULL },</div><div class='del'>-	/* Video */</div><div class='del'>-	[7] = { "88C0C6E6", NULL },</div><div class='del'>-	/* Packet mode */</div><div class='del'>-	[8] = { "8890218F", NULL },</div><div class='del'>-	/* 56 kbit/s rate adaptation */</div><div class='del'>-	[9] = { "9190A5", NULL },</div><div class='del'>-	/* Unrestricted digital information with tones/announcements */</div><div class='del'>-	[16] = { "8090A3", "9181" },</div><div class='del'>-	/* Telephony */</div><div class='del'>-	[17] = { "9090A3", "9184" },</div><div class='del'>-	/* Group 2/3 facsimile */</div><div class='del'>-	[18] = { "8890", "91A1" },</div><div class='del'>-	/* Group 4 facsimile Class 1 */</div><div class='del'>-	[19] = { "8890", "91A4" },</div><div class='del'>-	/* Teletex service basic and mixed mode</div><div class='del'>-	   and Group 4 facsimile service Classes II and III */</div><div class='del'>-	[20] = { "8890", "91A8" },</div><div class='del'>-	/* Teletex service basic and processable mode */</div><div class='del'>-	[21] = { "8890", "91B1" },</div><div class='del'>-	/* Teletex service basic mode */</div><div class='del'>-	[22] = { "8890", "91B2" },</div><div class='del'>-	/* International interworking for Videotex */</div><div class='del'>-	[23] = { "8890", "91B5" },</div><div class='del'>-	/* Telex */</div><div class='del'>-	[24] = { "8890", "91B8" },</div><div class='del'>-	/* Message Handling Systems in accordance with X.400 */</div><div class='del'>-	[25] = { "8890", "91C1" },</div><div class='del'>-	/* OSI application in accordance with X.200 */</div><div class='del'>-	[26] = { "9190A5", "9181" },</div><div class='del'>-	/* 7 kHz telephony */</div><div class='del'>-	[27] = { "9190A5", "916001" },</div><div class='del'>-	/* Video telephony, first connection */</div><div class='del'>-	[28] = { "8890", "916002" },</div><div class='del'>-	/* Video telephony, second connection */</div><div class='add'>+	[1] = { "8090A3", NULL },	/* Speech (A-law) */</div><div class='add'>+	[2] = { "8890", NULL },		/* Unrestricted digital information */</div><div class='add'>+	[3] = { "8990", NULL },		/* Restricted digital information */</div><div class='add'>+	[4] = { "9090A3", NULL },	/* 3,1 kHz audio (A-law) */</div><div class='add'>+	[5] = { "9190", NULL },		/* 7 kHz audio */</div><div class='add'>+	[6] = { "9890", NULL },		/* Video */</div><div class='add'>+	[7] = { "88C0C6E6", NULL },	/* Packet mode */</div><div class='add'>+	[8] = { "8890218F", NULL },	/* 56 kbit/s rate adaptation */</div><div class='add'>+	[9] = { "9190A5", NULL },	/* Unrestricted digital information</div><div class='add'>+					 * with tones/announcements */</div><div class='add'>+	[16] = { "8090A3", "9181" },	/* Telephony */</div><div class='add'>+	[17] = { "9090A3", "9184" },	/* Group 2/3 facsimile */</div><div class='add'>+	[18] = { "8890", "91A1" },	/* Group 4 facsimile Class 1 */</div><div class='add'>+	[19] = { "8890", "91A4" },	/* Teletex service basic and mixed mode</div><div class='add'>+					 * and Group 4 facsimile service</div><div class='add'>+					 * Classes II and III */</div><div class='add'>+	[20] = { "8890", "91A8" },	/* Teletex service basic and</div><div class='add'>+					 * processable mode */</div><div class='add'>+	[21] = { "8890", "91B1" },	/* Teletex service basic mode */</div><div class='add'>+	[22] = { "8890", "91B2" },	/* International interworking for</div><div class='add'>+					 * Videotex */</div><div class='add'>+	[23] = { "8890", "91B5" },	/* Telex */</div><div class='add'>+	[24] = { "8890", "91B8" },	/* Message Handling Systems</div><div class='add'>+					 * in accordance with X.400 */</div><div class='add'>+	[25] = { "8890", "91C1" },	/* OSI application</div><div class='add'>+					 * in accordance with X.200 */</div><div class='add'>+	[26] = { "9190A5", "9181" },	/* 7 kHz telephony */</div><div class='add'>+	[27] = { "9190A5", "916001" },	/* Video telephony, first connection */</div><div class='add'>+	[28] = { "8890", "916002" },	/* Video telephony, second connection */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -223,10 +208,14 @@ get_appl(struct gigaset_capi_ctr *iif, u16 appl)</div><div class='ctx'> static inline void dump_cmsg(enum debuglevel level, const char *tag, _cmsg *p)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_GIGASET_DEBUG</div><div class='add'>+	/* dump at most 20 messages in 20 secs */</div><div class='add'>+	static DEFINE_RATELIMIT_STATE(msg_dump_ratelimit, 20 * HZ, 20);</div><div class='ctx'> 	_cdebbuf *cdb;</div><div class='ctx'> </div><div class='ctx'> 	if (!(gigaset_debuglevel &amp; level))</div><div class='ctx'> 		return;</div><div class='add'>+	if (!___ratelimit(&amp;msg_dump_ratelimit, tag))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	cdb = capi_cmsg2str(p);</div><div class='ctx'> 	if (cdb) {</div><div class='hunk'>@@ -1192,7 +1181,9 @@ static void do_facility_req(struct gigaset_capi_ctr *iif,</div><div class='ctx'> 			confparam[3] = 2;	/* length */</div><div class='ctx'> 			capimsg_setu16(confparam, 4, CapiSuccess);</div><div class='ctx'> 			break;</div><div class='del'>-			/* ToDo: add supported services */</div><div class='add'>+</div><div class='add'>+		/* ToDo: add supported services */</div><div class='add'>+</div><div class='ctx'> 		default:</div><div class='ctx'> 			dev_notice(cs-&gt;dev,</div><div class='ctx'> 				   "%s: unsupported supplementary service function 0x%04x\n",</div><div class='hunk'>@@ -1766,7 +1757,8 @@ static void do_connect_b3_req(struct gigaset_capi_ctr *iif,</div><div class='ctx'> </div><div class='ctx'> 	/* NCPI parameter: not applicable for B3 Transparent */</div><div class='ctx'> 	ignore_cstruct_param(cs, cmsg-&gt;NCPI, "CONNECT_B3_REQ", "NCPI");</div><div class='del'>-	send_conf(iif, ap, skb, (cmsg-&gt;NCPI &amp;&amp; cmsg-&gt;NCPI[0]) ?</div><div class='add'>+	send_conf(iif, ap, skb,</div><div class='add'>+		  (cmsg-&gt;NCPI &amp;&amp; cmsg-&gt;NCPI[0]) ?</div><div class='ctx'> 		  CapiNcpiNotSupportedByProtocol : CapiSuccess);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1882,6 +1874,9 @@ static void do_disconnect_req(struct gigaset_capi_ctr *iif,</div><div class='ctx'> </div><div class='ctx'> 	/* check for active logical connection */</div><div class='ctx'> 	if (bcs-&gt;apconnstate &gt;= APCONN_ACTIVE) {</div><div class='add'>+		/* clear it */</div><div class='add'>+		bcs-&gt;apconnstate = APCONN_SETUP;</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * emit DISCONNECT_B3_IND with cause 0x3301</div><div class='ctx'> 		 * use separate cmsg structure, as the content of iif-&gt;acmsg</div><div class='hunk'>@@ -1906,6 +1901,7 @@ static void do_disconnect_req(struct gigaset_capi_ctr *iif,</div><div class='ctx'> 		}</div><div class='ctx'> 		capi_cmsg2message(b3cmsg,</div><div class='ctx'> 				  __skb_put(b3skb, CAPI_DISCONNECT_B3_IND_BASELEN));</div><div class='add'>+		dump_cmsg(DEBUG_CMD, __func__, b3cmsg);</div><div class='ctx'> 		kfree(b3cmsg);</div><div class='ctx'> 		capi_ctr_handle_message(&amp;iif-&gt;ctr, ap-&gt;id, b3skb);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1966,7 +1962,8 @@ static void do_disconnect_b3_req(struct gigaset_capi_ctr *iif,</div><div class='ctx'> 	/* NCPI parameter: not applicable for B3 Transparent */</div><div class='ctx'> 	ignore_cstruct_param(cs, cmsg-&gt;NCPI,</div><div class='ctx'> 			     "DISCONNECT_B3_REQ", "NCPI");</div><div class='del'>-	send_conf(iif, ap, skb, (cmsg-&gt;NCPI &amp;&amp; cmsg-&gt;NCPI[0]) ?</div><div class='add'>+	send_conf(iif, ap, skb,</div><div class='add'>+		  (cmsg-&gt;NCPI &amp;&amp; cmsg-&gt;NCPI[0]) ?</div><div class='ctx'> 		  CapiNcpiNotSupportedByProtocol : CapiSuccess);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2059,12 +2056,6 @@ static void do_reset_b3_req(struct gigaset_capi_ctr *iif,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * dump unsupported/ignored messages at most twice per minute,</div><div class='del'>- * some apps send those very frequently</div><div class='del'>- */</div><div class='del'>-static unsigned long ignored_msg_dump_time;</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * unsupported CAPI message handler</div><div class='ctx'>  */</div><div class='ctx'> static void do_unsupported(struct gigaset_capi_ctr *iif,</div><div class='hunk'>@@ -2073,8 +2064,7 @@ static void do_unsupported(struct gigaset_capi_ctr *iif,</div><div class='ctx'> {</div><div class='ctx'> 	/* decode message */</div><div class='ctx'> 	capi_message2cmsg(&amp;iif-&gt;acmsg, skb-&gt;data);</div><div class='del'>-	if (printk_timed_ratelimit(&amp;ignored_msg_dump_time, 30 * 1000))</div><div class='del'>-		dump_cmsg(DEBUG_CMD, __func__, &amp;iif-&gt;acmsg);</div><div class='add'>+	dump_cmsg(DEBUG_CMD, __func__, &amp;iif-&gt;acmsg);</div><div class='ctx'> 	send_conf(iif, ap, skb, CapiMessageNotSupportedInCurrentState);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2085,11 +2075,9 @@ static void do_nothing(struct gigaset_capi_ctr *iif,</div><div class='ctx'> 		       struct gigaset_capi_appl *ap,</div><div class='ctx'> 		       struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	if (printk_timed_ratelimit(&amp;ignored_msg_dump_time, 30 * 1000)) {</div><div class='del'>-		/* decode message */</div><div class='del'>-		capi_message2cmsg(&amp;iif-&gt;acmsg, skb-&gt;data);</div><div class='del'>-		dump_cmsg(DEBUG_CMD, __func__, &amp;iif-&gt;acmsg);</div><div class='del'>-	}</div><div class='add'>+	/* decode message */</div><div class='add'>+	capi_message2cmsg(&amp;iif-&gt;acmsg, skb-&gt;data);</div><div class='add'>+	dump_cmsg(DEBUG_CMD, __func__, &amp;iif-&gt;acmsg);</div><div class='ctx'> 	dev_kfree_skb_any(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2358,7 +2346,7 @@ static const struct file_operations gigaset_proc_fops = {</div><div class='ctx'>  * @cs:		device descriptor structure.</div><div class='ctx'>  * @isdnid:	device name.</div><div class='ctx'>  *</div><div class='del'>- * Return value: 1 for success, 0 for failure</div><div class='add'>+ * Return value: 0 on success, error code &lt; 0 on failure</div><div class='ctx'>  */</div><div class='ctx'> int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid)</div><div class='ctx'> {</div><div class='hunk'>@@ -2368,7 +2356,7 @@ int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid)</div><div class='ctx'> 	iif = kmalloc(sizeof(*iif), GFP_KERNEL);</div><div class='ctx'> 	if (!iif) {</div><div class='ctx'> 		pr_err("%s: out of memory\n", __func__);</div><div class='del'>-		return 0;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* prepare controller structure */</div><div class='hunk'>@@ -2392,12 +2380,12 @@ int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid)</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		pr_err("attach_capi_ctr failed (%d)\n", rc);</div><div class='ctx'> 		kfree(iif);</div><div class='del'>-		return 0;</div><div class='add'>+		return rc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cs-&gt;iif = iif;</div><div class='ctx'> 	cs-&gt;hw_hdr_len = CAPI_DATA_B3_REQ_LEN;</div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/isdn/gigaset/common.c b/drivers/isdn/gigaset/common.c<br/>index 76792707f995..aa41485bc594 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/gigaset/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/gigaset/common.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/gigaset/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/common.c</a></div><div class='hunk'>@@ -194,13 +194,13 @@ int gigaset_get_channel(struct bc_state *bcs)</div><div class='ctx'> 		gig_dbg(DEBUG_CHANNEL, "could not allocate channel %d",</div><div class='ctx'> 			bcs-&gt;channel);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;bcs-&gt;cs-&gt;lock, flags);</div><div class='del'>-		return 0;</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> 	++bcs-&gt;use_count;</div><div class='ctx'> 	bcs-&gt;busy = 1;</div><div class='ctx'> 	gig_dbg(DEBUG_CHANNEL, "allocated channel %d", bcs-&gt;channel);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bcs-&gt;cs-&gt;lock, flags);</div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct bc_state *gigaset_get_free_channel(struct cardstate *cs)</div><div class='hunk'>@@ -258,7 +258,7 @@ int gigaset_get_channels(struct cardstate *cs)</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;cs-&gt;lock, flags);</div><div class='ctx'> 			gig_dbg(DEBUG_CHANNEL,</div><div class='ctx'> 				"could not allocate all channels");</div><div class='del'>-			return 0;</div><div class='add'>+			return -EBUSY;</div><div class='ctx'> 		}</div><div class='ctx'> 	for (i = 0; i &lt; cs-&gt;channels; ++i)</div><div class='ctx'> 		++cs-&gt;bcs[i].use_count;</div><div class='hunk'>@@ -266,7 +266,7 @@ int gigaset_get_channels(struct cardstate *cs)</div><div class='ctx'> </div><div class='ctx'> 	gig_dbg(DEBUG_CHANNEL, "allocated all channels");</div><div class='ctx'> </div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void gigaset_free_channels(struct cardstate *cs)</div><div class='hunk'>@@ -362,7 +362,7 @@ struct event_t *gigaset_add_event(struct cardstate *cs,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(gigaset_add_event);</div><div class='ctx'> </div><div class='del'>-static void free_strings(struct at_state_t *at_state)</div><div class='add'>+static void clear_at_state(struct at_state_t *at_state)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -372,18 +372,13 @@ static void free_strings(struct at_state_t *at_state)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void clear_at_state(struct at_state_t *at_state)</div><div class='del'>-{</div><div class='del'>-	free_strings(at_state);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dealloc_at_states(struct cardstate *cs)</div><div class='add'>+static void dealloc_temp_at_states(struct cardstate *cs)</div><div class='ctx'> {</div><div class='ctx'> 	struct at_state_t *cur, *next;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry_safe(cur, next, &amp;cs-&gt;temp_at_states, list) {</div><div class='ctx'> 		list_del(&amp;cur-&gt;list);</div><div class='del'>-		free_strings(cur);</div><div class='add'>+		clear_at_state(cur);</div><div class='ctx'> 		kfree(cur);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -393,8 +388,7 @@ static void gigaset_freebcs(struct bc_state *bcs)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	gig_dbg(DEBUG_INIT, "freeing bcs[%d]-&gt;hw", bcs-&gt;channel);</div><div class='del'>-	if (!bcs-&gt;cs-&gt;ops-&gt;freebcshw(bcs))</div><div class='del'>-		gig_dbg(DEBUG_INIT, "failed");</div><div class='add'>+	bcs-&gt;cs-&gt;ops-&gt;freebcshw(bcs);</div><div class='ctx'> </div><div class='ctx'> 	gig_dbg(DEBUG_INIT, "clearing bcs[%d]-&gt;at_state", bcs-&gt;channel);</div><div class='ctx'> 	clear_at_state(&amp;bcs-&gt;at_state);</div><div class='hunk'>@@ -512,7 +506,7 @@ void gigaset_freecs(struct cardstate *cs)</div><div class='ctx'> 	case 1: /* error when registering to LL */</div><div class='ctx'> 		gig_dbg(DEBUG_INIT, "clearing at_state");</div><div class='ctx'> 		clear_at_state(&amp;cs-&gt;at_state);</div><div class='del'>-		dealloc_at_states(cs);</div><div class='add'>+		dealloc_temp_at_states(cs);</div><div class='ctx'> </div><div class='ctx'> 		/* fall through */</div><div class='ctx'> 	case 0:	/* error in basic setup */</div><div class='hunk'>@@ -571,6 +565,8 @@ static void gigaset_inbuf_init(struct inbuf_t *inbuf, struct cardstate *cs)</div><div class='ctx'>  * @inbuf:	buffer structure.</div><div class='ctx'>  * @src:	received data.</div><div class='ctx'>  * @numbytes:	number of bytes received.</div><div class='add'>+ *</div><div class='add'>+ * Return value: !=0 if some data was appended</div><div class='ctx'>  */</div><div class='ctx'> int gigaset_fill_inbuf(struct inbuf_t *inbuf, const unsigned char *src,</div><div class='ctx'> 		       unsigned numbytes)</div><div class='hunk'>@@ -614,8 +610,8 @@ int gigaset_fill_inbuf(struct inbuf_t *inbuf, const unsigned char *src,</div><div class='ctx'> EXPORT_SYMBOL_GPL(gigaset_fill_inbuf);</div><div class='ctx'> </div><div class='ctx'> /* Initialize the b-channel structure */</div><div class='del'>-static struct bc_state *gigaset_initbcs(struct bc_state *bcs,</div><div class='del'>-					struct cardstate *cs, int channel)</div><div class='add'>+static int gigaset_initbcs(struct bc_state *bcs, struct cardstate *cs,</div><div class='add'>+			   int channel)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -654,11 +650,7 @@ static struct bc_state *gigaset_initbcs(struct bc_state *bcs,</div><div class='ctx'> 	bcs-&gt;apconnstate = 0;</div><div class='ctx'> </div><div class='ctx'> 	gig_dbg(DEBUG_INIT, "  setting up bcs[%d]-&gt;hw", channel);</div><div class='del'>-	if (cs-&gt;ops-&gt;initbcshw(bcs))</div><div class='del'>-		return bcs;</div><div class='del'>-</div><div class='del'>-	gig_dbg(DEBUG_INIT, "  failed");</div><div class='del'>-	return NULL;</div><div class='add'>+	return cs-&gt;ops-&gt;initbcshw(bcs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -757,7 +749,7 @@ struct cardstate *gigaset_initcs(struct gigaset_driver *drv, int channels,</div><div class='ctx'> 	cs-&gt;cmdbytes = 0;</div><div class='ctx'> </div><div class='ctx'> 	gig_dbg(DEBUG_INIT, "setting up iif");</div><div class='del'>-	if (!gigaset_isdn_regdev(cs, modulename)) {</div><div class='add'>+	if (gigaset_isdn_regdev(cs, modulename) &lt; 0) {</div><div class='ctx'> 		pr_err("error registering ISDN device\n");</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -765,7 +757,7 @@ struct cardstate *gigaset_initcs(struct gigaset_driver *drv, int channels,</div><div class='ctx'> 	make_valid(cs, VALID_ID);</div><div class='ctx'> 	++cs-&gt;cs_init;</div><div class='ctx'> 	gig_dbg(DEBUG_INIT, "setting up hw");</div><div class='del'>-	if (!cs-&gt;ops-&gt;initcshw(cs))</div><div class='add'>+	if (cs-&gt;ops-&gt;initcshw(cs) &lt; 0)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='ctx'> 	++cs-&gt;cs_init;</div><div class='hunk'>@@ -779,7 +771,7 @@ struct cardstate *gigaset_initcs(struct gigaset_driver *drv, int channels,</div><div class='ctx'> 	/* set up channel data structures */</div><div class='ctx'> 	for (i = 0; i &lt; channels; ++i) {</div><div class='ctx'> 		gig_dbg(DEBUG_INIT, "setting up bcs[%d]", i);</div><div class='del'>-		if (!gigaset_initbcs(cs-&gt;bcs + i, cs, i)) {</div><div class='add'>+		if (gigaset_initbcs(cs-&gt;bcs + i, cs, i) &lt; 0) {</div><div class='ctx'> 			pr_err("could not allocate channel %d data\n", i);</div><div class='ctx'> 			goto error;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -848,8 +840,7 @@ static void cleanup_cs(struct cardstate *cs)</div><div class='ctx'> 	cs-&gt;mstate = MS_UNINITIALIZED;</div><div class='ctx'> </div><div class='ctx'> 	clear_at_state(&amp;cs-&gt;at_state);</div><div class='del'>-	dealloc_at_states(cs);</div><div class='del'>-	free_strings(&amp;cs-&gt;at_state);</div><div class='add'>+	dealloc_temp_at_states(cs);</div><div class='ctx'> 	gigaset_at_init(&amp;cs-&gt;at_state, NULL, cs, 0);</div><div class='ctx'> </div><div class='ctx'> 	cs-&gt;inbuf-&gt;inputstate = INS_command;</div><div class='hunk'>@@ -875,7 +866,7 @@ static void cleanup_cs(struct cardstate *cs)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; cs-&gt;channels; ++i) {</div><div class='ctx'> 		gigaset_freebcs(cs-&gt;bcs + i);</div><div class='del'>-		if (!gigaset_initbcs(cs-&gt;bcs + i, cs, i))</div><div class='add'>+		if (gigaset_initbcs(cs-&gt;bcs + i, cs, i) &lt; 0)</div><div class='ctx'> 			pr_err("could not allocate channel %d data\n", i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -896,14 +887,14 @@ static void cleanup_cs(struct cardstate *cs)</div><div class='ctx'>  * waiting for completion of the initialization.</div><div class='ctx'>  *</div><div class='ctx'>  * Return value:</div><div class='del'>- *	1 - success, 0 - error</div><div class='add'>+ *	0 on success, error code &lt; 0 on failure</div><div class='ctx'>  */</div><div class='ctx'> int gigaset_start(struct cardstate *cs)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;cs-&gt;mutex))</div><div class='del'>-		return 0;</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cs-&gt;lock, flags);</div><div class='ctx'> 	cs-&gt;connected = 1;</div><div class='hunk'>@@ -927,11 +918,11 @@ int gigaset_start(struct cardstate *cs)</div><div class='ctx'> 	wait_event(cs-&gt;waitqueue, !cs-&gt;waiting);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;cs-&gt;mutex);</div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='ctx'> 	mutex_unlock(&amp;cs-&gt;mutex);</div><div class='del'>-	return 0;</div><div class='add'>+	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(gigaset_start);</div><div class='ctx'> </div><div class='hunk'>@@ -943,7 +934,7 @@ EXPORT_SYMBOL_GPL(gigaset_start);</div><div class='ctx'>  * waiting for completion of the shutdown.</div><div class='ctx'>  *</div><div class='ctx'>  * Return value:</div><div class='del'>- *	0 - success, -1 - error (no device associated)</div><div class='add'>+ *	0 - success, -ENODEV - error (no device associated)</div><div class='ctx'>  */</div><div class='ctx'> int gigaset_shutdown(struct cardstate *cs)</div><div class='ctx'> {</div><div class='hunk'>@@ -951,7 +942,7 @@ int gigaset_shutdown(struct cardstate *cs)</div><div class='ctx'> </div><div class='ctx'> 	if (!(cs-&gt;flags &amp; VALID_MINOR)) {</div><div class='ctx'> 		mutex_unlock(&amp;cs-&gt;mutex);</div><div class='del'>-		return -1;</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cs-&gt;waiting = 1;</div><div class='head'>diff --git a/drivers/isdn/gigaset/dummyll.c b/drivers/isdn/gigaset/dummyll.c<br/>index 19b1c779d50f..570c2d53b84e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/gigaset/dummyll.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/gigaset/dummyll.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/gigaset/dummyll.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/dummyll.c</a></div><div class='hunk'>@@ -60,7 +60,7 @@ void gigaset_isdn_stop(struct cardstate *cs)</div><div class='ctx'> </div><div class='ctx'> int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid)</div><div class='ctx'> {</div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void gigaset_isdn_unregdev(struct cardstate *cs)</div><div class='head'>diff --git a/drivers/isdn/gigaset/ev-layer.c b/drivers/isdn/gigaset/ev-layer.c<br/>index 624a8256a77f..2e6963dc740e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/gigaset/ev-layer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/gigaset/ev-layer.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/gigaset/ev-layer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/ev-layer.c</a></div><div class='hunk'>@@ -153,103 +153,104 @@ struct reply_t gigaset_tab_nocid[] =</div><div class='ctx'>  * action, command */</div><div class='ctx'> </div><div class='ctx'> /* initialize device, set cid mode if possible */</div><div class='del'>-	{RSP_INIT,	 -1,  -1, SEQ_INIT,		100,  1, {ACT_TIMEOUT} },</div><div class='add'>+	{RSP_INIT,	 -1,  -1, SEQ_INIT,	100,  1, {ACT_TIMEOUT} },</div><div class='ctx'> </div><div class='del'>-	{EV_TIMEOUT,	100, 100, -1,			101,  3, {0},	"Z\r"},</div><div class='del'>-	{RSP_OK,	101, 103, -1,			120,  5, {ACT_GETSTRING},</div><div class='del'>-	 "+GMR\r"},</div><div class='add'>+	{EV_TIMEOUT,	100, 100, -1,		101,  3, {0},	"Z\r"},</div><div class='add'>+	{RSP_OK,	101, 103, -1,		120,  5, {ACT_GETSTRING},</div><div class='add'>+								"+GMR\r"},</div><div class='ctx'> </div><div class='del'>-	{EV_TIMEOUT,	101, 101, -1,			102,  5, {0},	"Z\r"},</div><div class='del'>-	{RSP_ERROR,	101, 101, -1,			102,  5, {0},	"Z\r"},</div><div class='add'>+	{EV_TIMEOUT,	101, 101, -1,		102,  5, {0},	"Z\r"},</div><div class='add'>+	{RSP_ERROR,	101, 101, -1,		102,  5, {0},	"Z\r"},</div><div class='ctx'> </div><div class='del'>-	{EV_TIMEOUT,	102, 102, -1,			108,  5, {ACT_SETDLE1},</div><div class='del'>-	 "^SDLE=0\r"},</div><div class='del'>-	{RSP_OK,	108, 108, -1,			104, -1},</div><div class='del'>-	{RSP_ZDLE,	104, 104,  0,			103,  5, {0},	"Z\r"},</div><div class='del'>-	{EV_TIMEOUT,	104, 104, -1,			  0,  0, {ACT_FAILINIT} },</div><div class='del'>-	{RSP_ERROR,	108, 108, -1,			  0,  0, {ACT_FAILINIT} },</div><div class='add'>+	{EV_TIMEOUT,	102, 102, -1,		108,  5, {ACT_SETDLE1},</div><div class='add'>+								"^SDLE=0\r"},</div><div class='add'>+	{RSP_OK,	108, 108, -1,		104, -1},</div><div class='add'>+	{RSP_ZDLE,	104, 104,  0,		103,  5, {0},	"Z\r"},</div><div class='add'>+	{EV_TIMEOUT,	104, 104, -1,		  0,  0, {ACT_FAILINIT} },</div><div class='add'>+	{RSP_ERROR,	108, 108, -1,		  0,  0, {ACT_FAILINIT} },</div><div class='ctx'> </div><div class='del'>-	{EV_TIMEOUT,	108, 108, -1,			105,  2, {ACT_SETDLE0,</div><div class='del'>-								  ACT_HUPMODEM,</div><div class='del'>-								  ACT_TIMEOUT} },</div><div class='del'>-	{EV_TIMEOUT,	105, 105, -1,			103,  5, {0},	"Z\r"},</div><div class='add'>+	{EV_TIMEOUT,	108, 108, -1,		105,  2, {ACT_SETDLE0,</div><div class='add'>+							  ACT_HUPMODEM,</div><div class='add'>+							  ACT_TIMEOUT} },</div><div class='add'>+	{EV_TIMEOUT,	105, 105, -1,		103,  5, {0},	"Z\r"},</div><div class='ctx'> </div><div class='del'>-	{RSP_ERROR,	102, 102, -1,			107,  5, {0},	"^GETPRE\r"},</div><div class='del'>-	{RSP_OK,	107, 107, -1,			  0,  0, {ACT_CONFIGMODE} },</div><div class='del'>-	{RSP_ERROR,	107, 107, -1,			  0,  0, {ACT_FAILINIT} },</div><div class='del'>-	{EV_TIMEOUT,	107, 107, -1,			  0,  0, {ACT_FAILINIT} },</div><div class='add'>+	{RSP_ERROR,	102, 102, -1,		107,  5, {0},	"^GETPRE\r"},</div><div class='add'>+	{RSP_OK,	107, 107, -1,		  0,  0, {ACT_CONFIGMODE} },</div><div class='add'>+	{RSP_ERROR,	107, 107, -1,		  0,  0, {ACT_FAILINIT} },</div><div class='add'>+	{EV_TIMEOUT,	107, 107, -1,		  0,  0, {ACT_FAILINIT} },</div><div class='ctx'> </div><div class='del'>-	{RSP_ERROR,	103, 103, -1,			  0,  0, {ACT_FAILINIT} },</div><div class='del'>-	{EV_TIMEOUT,	103, 103, -1,			  0,  0, {ACT_FAILINIT} },</div><div class='add'>+	{RSP_ERROR,	103, 103, -1,		  0,  0, {ACT_FAILINIT} },</div><div class='add'>+	{EV_TIMEOUT,	103, 103, -1,		  0,  0, {ACT_FAILINIT} },</div><div class='ctx'> </div><div class='del'>-	{RSP_STRING,	120, 120, -1,			121, -1, {ACT_SETVER} },</div><div class='add'>+	{RSP_STRING,	120, 120, -1,		121, -1, {ACT_SETVER} },</div><div class='ctx'> </div><div class='del'>-	{EV_TIMEOUT,	120, 121, -1,			  0,  0, {ACT_FAILVER,</div><div class='del'>-								  ACT_INIT} },</div><div class='del'>-	{RSP_ERROR,	120, 121, -1,			  0,  0, {ACT_FAILVER,</div><div class='del'>-								  ACT_INIT} },</div><div class='del'>-	{RSP_OK,	121, 121, -1,			  0,  0, {ACT_GOTVER,</div><div class='del'>-								  ACT_INIT} },</div><div class='add'>+	{EV_TIMEOUT,	120, 121, -1,		  0,  0, {ACT_FAILVER,</div><div class='add'>+							  ACT_INIT} },</div><div class='add'>+	{RSP_ERROR,	120, 121, -1,		  0,  0, {ACT_FAILVER,</div><div class='add'>+							  ACT_INIT} },</div><div class='add'>+	{RSP_OK,	121, 121, -1,		  0,  0, {ACT_GOTVER,</div><div class='add'>+							  ACT_INIT} },</div><div class='add'>+	{RSP_NONE,	121, 121, -1,		120,  0, {ACT_GETSTRING} },</div><div class='ctx'> </div><div class='ctx'> /* leave dle mode */</div><div class='del'>-	{RSP_INIT,	  0,   0, SEQ_DLE0,		201,  5, {0},	"^SDLE=0\r"},</div><div class='del'>-	{RSP_OK,	201, 201, -1,			202, -1},</div><div class='del'>-	{RSP_ZDLE,	202, 202,  0,			  0,  0, {ACT_DLE0} },</div><div class='del'>-	{RSP_NODEV,	200, 249, -1,			  0,  0, {ACT_FAKEDLE0} },</div><div class='del'>-	{RSP_ERROR,	200, 249, -1,			  0,  0, {ACT_FAILDLE0} },</div><div class='del'>-	{EV_TIMEOUT,	200, 249, -1,			  0,  0, {ACT_FAILDLE0} },</div><div class='add'>+	{RSP_INIT,	  0,   0, SEQ_DLE0,	201,  5, {0},	"^SDLE=0\r"},</div><div class='add'>+	{RSP_OK,	201, 201, -1,		202, -1},</div><div class='add'>+	{RSP_ZDLE,	202, 202,  0,		  0,  0, {ACT_DLE0} },</div><div class='add'>+	{RSP_NODEV,	200, 249, -1,		  0,  0, {ACT_FAKEDLE0} },</div><div class='add'>+	{RSP_ERROR,	200, 249, -1,		  0,  0, {ACT_FAILDLE0} },</div><div class='add'>+	{EV_TIMEOUT,	200, 249, -1,		  0,  0, {ACT_FAILDLE0} },</div><div class='ctx'> </div><div class='ctx'> /* enter dle mode */</div><div class='del'>-	{RSP_INIT,	  0,   0, SEQ_DLE1,		251,  5, {0},	"^SDLE=1\r"},</div><div class='del'>-	{RSP_OK,	251, 251, -1,			252, -1},</div><div class='del'>-	{RSP_ZDLE,	252, 252,  1,			  0,  0, {ACT_DLE1} },</div><div class='del'>-	{RSP_ERROR,	250, 299, -1,			  0,  0, {ACT_FAILDLE1} },</div><div class='del'>-	{EV_TIMEOUT,	250, 299, -1,			  0,  0, {ACT_FAILDLE1} },</div><div class='add'>+	{RSP_INIT,	  0,   0, SEQ_DLE1,	251,  5, {0},	"^SDLE=1\r"},</div><div class='add'>+	{RSP_OK,	251, 251, -1,		252, -1},</div><div class='add'>+	{RSP_ZDLE,	252, 252,  1,		  0,  0, {ACT_DLE1} },</div><div class='add'>+	{RSP_ERROR,	250, 299, -1,		  0,  0, {ACT_FAILDLE1} },</div><div class='add'>+	{EV_TIMEOUT,	250, 299, -1,		  0,  0, {ACT_FAILDLE1} },</div><div class='ctx'> </div><div class='ctx'> /* incoming call */</div><div class='del'>-	{RSP_RING,	 -1,  -1, -1,			 -1, -1, {ACT_RING} },</div><div class='add'>+	{RSP_RING,	 -1,  -1, -1,		 -1, -1, {ACT_RING} },</div><div class='ctx'> </div><div class='ctx'> /* get cid */</div><div class='del'>-	{RSP_INIT,	  0,   0, SEQ_CID,		301,  5, {0},	"^SGCI?\r"},</div><div class='del'>-	{RSP_OK,	301, 301, -1,			302, -1},</div><div class='del'>-	{RSP_ZGCI,	302, 302, -1,			  0,  0, {ACT_CID} },</div><div class='del'>-	{RSP_ERROR,	301, 349, -1,			  0,  0, {ACT_FAILCID} },</div><div class='del'>-	{EV_TIMEOUT,	301, 349, -1,			  0,  0, {ACT_FAILCID} },</div><div class='add'>+	{RSP_INIT,	  0,   0, SEQ_CID,	301,  5, {0},	"^SGCI?\r"},</div><div class='add'>+	{RSP_OK,	301, 301, -1,		302, -1},</div><div class='add'>+	{RSP_ZGCI,	302, 302, -1,		  0,  0, {ACT_CID} },</div><div class='add'>+	{RSP_ERROR,	301, 349, -1,		  0,  0, {ACT_FAILCID} },</div><div class='add'>+	{EV_TIMEOUT,	301, 349, -1,		  0,  0, {ACT_FAILCID} },</div><div class='ctx'> </div><div class='ctx'> /* enter cid mode */</div><div class='del'>-	{RSP_INIT,	  0,   0, SEQ_CIDMODE,		150,  5, {0},	"^SGCI=1\r"},</div><div class='del'>-	{RSP_OK,	150, 150, -1,			  0,  0, {ACT_CMODESET} },</div><div class='del'>-	{RSP_ERROR,	150, 150, -1,			  0,  0, {ACT_FAILCMODE} },</div><div class='del'>-	{EV_TIMEOUT,	150, 150, -1,			  0,  0, {ACT_FAILCMODE} },</div><div class='add'>+	{RSP_INIT,	  0,   0, SEQ_CIDMODE,	150,  5, {0},	"^SGCI=1\r"},</div><div class='add'>+	{RSP_OK,	150, 150, -1,		  0,  0, {ACT_CMODESET} },</div><div class='add'>+	{RSP_ERROR,	150, 150, -1,		  0,  0, {ACT_FAILCMODE} },</div><div class='add'>+	{EV_TIMEOUT,	150, 150, -1,		  0,  0, {ACT_FAILCMODE} },</div><div class='ctx'> </div><div class='ctx'> /* leave cid mode */</div><div class='del'>-	{RSP_INIT,	  0,   0, SEQ_UMMODE,		160,  5, {0},	"Z\r"},</div><div class='del'>-	{RSP_OK,	160, 160, -1,			  0,  0, {ACT_UMODESET} },</div><div class='del'>-	{RSP_ERROR,	160, 160, -1,			  0,  0, {ACT_FAILUMODE} },</div><div class='del'>-	{EV_TIMEOUT,	160, 160, -1,			  0,  0, {ACT_FAILUMODE} },</div><div class='add'>+	{RSP_INIT,	  0,   0, SEQ_UMMODE,	160,  5, {0},	"Z\r"},</div><div class='add'>+	{RSP_OK,	160, 160, -1,		  0,  0, {ACT_UMODESET} },</div><div class='add'>+	{RSP_ERROR,	160, 160, -1,		  0,  0, {ACT_FAILUMODE} },</div><div class='add'>+	{EV_TIMEOUT,	160, 160, -1,		  0,  0, {ACT_FAILUMODE} },</div><div class='ctx'> </div><div class='ctx'> /* abort getting cid */</div><div class='del'>-	{RSP_INIT,	  0,   0, SEQ_NOCID,		  0,  0, {ACT_ABORTCID} },</div><div class='add'>+	{RSP_INIT,	  0,   0, SEQ_NOCID,	  0,  0, {ACT_ABORTCID} },</div><div class='ctx'> </div><div class='ctx'> /* reset */</div><div class='del'>-	{RSP_INIT,	  0,   0, SEQ_SHUTDOWN,		504,  5, {0},	"Z\r"},</div><div class='del'>-	{RSP_OK,	504, 504, -1,			  0,  0, {ACT_SDOWN} },</div><div class='del'>-	{RSP_ERROR,	501, 599, -1,			  0,  0, {ACT_FAILSDOWN} },</div><div class='del'>-	{EV_TIMEOUT,	501, 599, -1,			  0,  0, {ACT_FAILSDOWN} },</div><div class='del'>-	{RSP_NODEV,	501, 599, -1,			  0,  0, {ACT_FAKESDOWN} },</div><div class='del'>-</div><div class='del'>-	{EV_PROC_CIDMODE, -1, -1, -1,			 -1, -1, {ACT_PROC_CIDMODE} },</div><div class='del'>-	{EV_IF_LOCK,	 -1,  -1, -1,			 -1, -1, {ACT_IF_LOCK} },</div><div class='del'>-	{EV_IF_VER,	 -1,  -1, -1,			 -1, -1, {ACT_IF_VER} },</div><div class='del'>-	{EV_START,	 -1,  -1, -1,			 -1, -1, {ACT_START} },</div><div class='del'>-	{EV_STOP,	 -1,  -1, -1,			 -1, -1, {ACT_STOP} },</div><div class='del'>-	{EV_SHUTDOWN,	 -1,  -1, -1,			 -1, -1, {ACT_SHUTDOWN} },</div><div class='add'>+	{RSP_INIT,	  0,   0, SEQ_SHUTDOWN,	504,  5, {0},	"Z\r"},</div><div class='add'>+	{RSP_OK,	504, 504, -1,		  0,  0, {ACT_SDOWN} },</div><div class='add'>+	{RSP_ERROR,	501, 599, -1,		  0,  0, {ACT_FAILSDOWN} },</div><div class='add'>+	{EV_TIMEOUT,	501, 599, -1,		  0,  0, {ACT_FAILSDOWN} },</div><div class='add'>+	{RSP_NODEV,	501, 599, -1,		  0,  0, {ACT_FAKESDOWN} },</div><div class='add'>+</div><div class='add'>+	{EV_PROC_CIDMODE, -1, -1, -1,		 -1, -1, {ACT_PROC_CIDMODE} },</div><div class='add'>+	{EV_IF_LOCK,	 -1,  -1, -1,		 -1, -1, {ACT_IF_LOCK} },</div><div class='add'>+	{EV_IF_VER,	 -1,  -1, -1,		 -1, -1, {ACT_IF_VER} },</div><div class='add'>+	{EV_START,	 -1,  -1, -1,		 -1, -1, {ACT_START} },</div><div class='add'>+	{EV_STOP,	 -1,  -1, -1,		 -1, -1, {ACT_STOP} },</div><div class='add'>+	{EV_SHUTDOWN,	 -1,  -1, -1,		 -1, -1, {ACT_SHUTDOWN} },</div><div class='ctx'> </div><div class='ctx'> /* misc. */</div><div class='del'>-	{RSP_ERROR,	 -1,  -1, -1,			 -1, -1, {ACT_ERROR} },</div><div class='del'>-	{RSP_ZCAU,	 -1,  -1, -1,			 -1, -1, {ACT_ZCAU} },</div><div class='del'>-	{RSP_NONE,	 -1,  -1, -1,			 -1, -1, {ACT_DEBUG} },</div><div class='del'>-	{RSP_ANY,	 -1,  -1, -1,			 -1, -1, {ACT_WARN} },</div><div class='add'>+	{RSP_ERROR,	 -1,  -1, -1,		 -1, -1, {ACT_ERROR} },</div><div class='add'>+	{RSP_ZCAU,	 -1,  -1, -1,		 -1, -1, {ACT_ZCAU} },</div><div class='add'>+	{RSP_NONE,	 -1,  -1, -1,		 -1, -1, {ACT_DEBUG} },</div><div class='add'>+	{RSP_ANY,	 -1,  -1, -1,		 -1, -1, {ACT_WARN} },</div><div class='ctx'> 	{RSP_LAST}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -261,90 +262,90 @@ struct reply_t gigaset_tab_cid[] =</div><div class='ctx'>  * action, command */</div><div class='ctx'> </div><div class='ctx'> /* dial */</div><div class='del'>-	{EV_DIAL,	 -1,  -1, -1,			 -1, -1, {ACT_DIAL} },</div><div class='del'>-	{RSP_INIT,	  0,   0, SEQ_DIAL,		601,  5, {ACT_CMD + AT_BC} },</div><div class='del'>-	{RSP_OK,	601, 601, -1,			603,  5, {ACT_CMD + AT_PROTO} },</div><div class='del'>-	{RSP_OK,	603, 603, -1,			604,  5, {ACT_CMD + AT_TYPE} },</div><div class='del'>-	{RSP_OK,	604, 604, -1,			605,  5, {ACT_CMD + AT_MSN} },</div><div class='del'>-	{RSP_NULL,	605, 605, -1,			606,  5, {ACT_CMD + AT_CLIP} },</div><div class='del'>-	{RSP_OK,	605, 605, -1,			606,  5, {ACT_CMD + AT_CLIP} },</div><div class='del'>-	{RSP_NULL,	606, 606, -1,			607,  5, {ACT_CMD + AT_ISO} },</div><div class='del'>-	{RSP_OK,	606, 606, -1,			607,  5, {ACT_CMD + AT_ISO} },</div><div class='del'>-	{RSP_OK,	607, 607, -1,			608,  5, {0},	"+VLS=17\r"},</div><div class='del'>-	{RSP_OK,	608, 608, -1,			609, -1},</div><div class='del'>-	{RSP_ZSAU,	609, 609, ZSAU_PROCEEDING,	610,  5, {ACT_CMD + AT_DIAL} },</div><div class='del'>-	{RSP_OK,	610, 610, -1,			650,  0, {ACT_DIALING} },</div><div class='del'>-</div><div class='del'>-	{RSP_ERROR,	601, 610, -1,			  0,  0, {ACT_ABORTDIAL} },</div><div class='del'>-	{EV_TIMEOUT,	601, 610, -1,			  0,  0, {ACT_ABORTDIAL} },</div><div class='add'>+	{EV_DIAL,	 -1,  -1, -1,		 -1, -1, {ACT_DIAL} },</div><div class='add'>+	{RSP_INIT,	  0,   0, SEQ_DIAL,	601,  5, {ACT_CMD + AT_BC} },</div><div class='add'>+	{RSP_OK,	601, 601, -1,		603,  5, {ACT_CMD + AT_PROTO} },</div><div class='add'>+	{RSP_OK,	603, 603, -1,		604,  5, {ACT_CMD + AT_TYPE} },</div><div class='add'>+	{RSP_OK,	604, 604, -1,		605,  5, {ACT_CMD + AT_MSN} },</div><div class='add'>+	{RSP_NULL,	605, 605, -1,		606,  5, {ACT_CMD + AT_CLIP} },</div><div class='add'>+	{RSP_OK,	605, 605, -1,		606,  5, {ACT_CMD + AT_CLIP} },</div><div class='add'>+	{RSP_NULL,	606, 606, -1,		607,  5, {ACT_CMD + AT_ISO} },</div><div class='add'>+	{RSP_OK,	606, 606, -1,		607,  5, {ACT_CMD + AT_ISO} },</div><div class='add'>+	{RSP_OK,	607, 607, -1,		608,  5, {0},	"+VLS=17\r"},</div><div class='add'>+	{RSP_OK,	608, 608, -1,		609, -1},</div><div class='add'>+	{RSP_ZSAU,	609, 609, ZSAU_PROCEEDING, 610, 5, {ACT_CMD + AT_DIAL} },</div><div class='add'>+	{RSP_OK,	610, 610, -1,		650,  0, {ACT_DIALING} },</div><div class='add'>+</div><div class='add'>+	{RSP_ERROR,	601, 610, -1,		  0,  0, {ACT_ABORTDIAL} },</div><div class='add'>+	{EV_TIMEOUT,	601, 610, -1,		  0,  0, {ACT_ABORTDIAL} },</div><div class='ctx'> </div><div class='ctx'> /* optional dialing responses */</div><div class='del'>-	{EV_BC_OPEN,	650, 650, -1,			651, -1},</div><div class='del'>-	{RSP_ZVLS,	609, 651, 17,			 -1, -1, {ACT_DEBUG} },</div><div class='del'>-	{RSP_ZCTP,	610, 651, -1,			 -1, -1, {ACT_DEBUG} },</div><div class='del'>-	{RSP_ZCPN,	610, 651, -1,			 -1, -1, {ACT_DEBUG} },</div><div class='del'>-	{RSP_ZSAU,	650, 651, ZSAU_CALL_DELIVERED,	 -1, -1, {ACT_DEBUG} },</div><div class='add'>+	{EV_BC_OPEN,	650, 650, -1,		651, -1},</div><div class='add'>+	{RSP_ZVLS,	609, 651, 17,		 -1, -1, {ACT_DEBUG} },</div><div class='add'>+	{RSP_ZCTP,	610, 651, -1,		 -1, -1, {ACT_DEBUG} },</div><div class='add'>+	{RSP_ZCPN,	610, 651, -1,		 -1, -1, {ACT_DEBUG} },</div><div class='add'>+	{RSP_ZSAU,	650, 651, ZSAU_CALL_DELIVERED, -1, -1, {ACT_DEBUG} },</div><div class='ctx'> </div><div class='ctx'> /* connect */</div><div class='del'>-	{RSP_ZSAU,	650, 650, ZSAU_ACTIVE,		800, -1, {ACT_CONNECT} },</div><div class='del'>-	{RSP_ZSAU,	651, 651, ZSAU_ACTIVE,		800, -1, {ACT_CONNECT,</div><div class='del'>-								  ACT_NOTIFY_BC_UP} },</div><div class='del'>-	{RSP_ZSAU,	750, 750, ZSAU_ACTIVE,		800, -1, {ACT_CONNECT} },</div><div class='del'>-	{RSP_ZSAU,	751, 751, ZSAU_ACTIVE,		800, -1, {ACT_CONNECT,</div><div class='del'>-								  ACT_NOTIFY_BC_UP} },</div><div class='del'>-	{EV_BC_OPEN,	800, 800, -1,			800, -1, {ACT_NOTIFY_BC_UP} },</div><div class='add'>+	{RSP_ZSAU,	650, 650, ZSAU_ACTIVE,	800, -1, {ACT_CONNECT} },</div><div class='add'>+	{RSP_ZSAU,	651, 651, ZSAU_ACTIVE,	800, -1, {ACT_CONNECT,</div><div class='add'>+							  ACT_NOTIFY_BC_UP} },</div><div class='add'>+	{RSP_ZSAU,	750, 750, ZSAU_ACTIVE,	800, -1, {ACT_CONNECT} },</div><div class='add'>+	{RSP_ZSAU,	751, 751, ZSAU_ACTIVE,	800, -1, {ACT_CONNECT,</div><div class='add'>+							  ACT_NOTIFY_BC_UP} },</div><div class='add'>+	{EV_BC_OPEN,	800, 800, -1,		800, -1, {ACT_NOTIFY_BC_UP} },</div><div class='ctx'> </div><div class='ctx'> /* remote hangup */</div><div class='del'>-	{RSP_ZSAU,	650, 651, ZSAU_DISCONNECT_IND,	  0,  0, {ACT_REMOTEREJECT} },</div><div class='del'>-	{RSP_ZSAU,	750, 751, ZSAU_DISCONNECT_IND,	  0,  0, {ACT_REMOTEHUP} },</div><div class='del'>-	{RSP_ZSAU,	800, 800, ZSAU_DISCONNECT_IND,	  0,  0, {ACT_REMOTEHUP} },</div><div class='add'>+	{RSP_ZSAU,	650, 651, ZSAU_DISCONNECT_IND, 0, 0, {ACT_REMOTEREJECT} },</div><div class='add'>+	{RSP_ZSAU,	750, 751, ZSAU_DISCONNECT_IND, 0, 0, {ACT_REMOTEHUP} },</div><div class='add'>+	{RSP_ZSAU,	800, 800, ZSAU_DISCONNECT_IND, 0, 0, {ACT_REMOTEHUP} },</div><div class='ctx'> </div><div class='ctx'> /* hangup */</div><div class='del'>-	{EV_HUP,	 -1,  -1, -1,			 -1, -1, {ACT_HUP} },</div><div class='del'>-	{RSP_INIT,	 -1,  -1, SEQ_HUP,		401,  5, {0},	"+VLS=0\r"},</div><div class='del'>-	{RSP_OK,	401, 401, -1,			402,  5},</div><div class='del'>-	{RSP_ZVLS,	402, 402,  0,			403,  5},</div><div class='del'>-	{RSP_ZSAU,	403, 403, ZSAU_DISCONNECT_REQ,	 -1, -1, {ACT_DEBUG} },</div><div class='del'>-	{RSP_ZSAU,	403, 403, ZSAU_NULL,		  0,  0, {ACT_DISCONNECT} },</div><div class='del'>-	{RSP_NODEV,	401, 403, -1,			  0,  0, {ACT_FAKEHUP} },</div><div class='del'>-	{RSP_ERROR,	401, 401, -1,			  0,  0, {ACT_ABORTHUP} },</div><div class='del'>-	{EV_TIMEOUT,	401, 403, -1,			  0,  0, {ACT_ABORTHUP} },</div><div class='del'>-</div><div class='del'>-	{EV_BC_CLOSED,	  0,   0, -1,			  0, -1, {ACT_NOTIFY_BC_DOWN} },</div><div class='add'>+	{EV_HUP,	 -1,  -1, -1,		 -1, -1, {ACT_HUP} },</div><div class='add'>+	{RSP_INIT,	 -1,  -1, SEQ_HUP,	401,  5, {0},	"+VLS=0\r"},</div><div class='add'>+	{RSP_OK,	401, 401, -1,		402,  5},</div><div class='add'>+	{RSP_ZVLS,	402, 402,  0,		403,  5},</div><div class='add'>+	{RSP_ZSAU,	403, 403, ZSAU_DISCONNECT_REQ, -1, -1, {ACT_DEBUG} },</div><div class='add'>+	{RSP_ZSAU,	403, 403, ZSAU_NULL,	  0,  0, {ACT_DISCONNECT} },</div><div class='add'>+	{RSP_NODEV,	401, 403, -1,		  0,  0, {ACT_FAKEHUP} },</div><div class='add'>+	{RSP_ERROR,	401, 401, -1,		  0,  0, {ACT_ABORTHUP} },</div><div class='add'>+	{EV_TIMEOUT,	401, 403, -1,		  0,  0, {ACT_ABORTHUP} },</div><div class='add'>+</div><div class='add'>+	{EV_BC_CLOSED,	  0,   0, -1,		  0, -1, {ACT_NOTIFY_BC_DOWN} },</div><div class='ctx'> </div><div class='ctx'> /* ring */</div><div class='del'>-	{RSP_ZBC,	700, 700, -1,			 -1, -1, {0} },</div><div class='del'>-	{RSP_ZHLC,	700, 700, -1,			 -1, -1, {0} },</div><div class='del'>-	{RSP_NMBR,	700, 700, -1,			 -1, -1, {0} },</div><div class='del'>-	{RSP_ZCPN,	700, 700, -1,			 -1, -1, {0} },</div><div class='del'>-	{RSP_ZCTP,	700, 700, -1,			 -1, -1, {0} },</div><div class='del'>-	{EV_TIMEOUT,	700, 700, -1,			720, 720, {ACT_ICALL} },</div><div class='del'>-	{EV_BC_CLOSED,	720, 720, -1,			  0, -1, {ACT_NOTIFY_BC_DOWN} },</div><div class='add'>+	{RSP_ZBC,	700, 700, -1,		 -1, -1, {0} },</div><div class='add'>+	{RSP_ZHLC,	700, 700, -1,		 -1, -1, {0} },</div><div class='add'>+	{RSP_NMBR,	700, 700, -1,		 -1, -1, {0} },</div><div class='add'>+	{RSP_ZCPN,	700, 700, -1,		 -1, -1, {0} },</div><div class='add'>+	{RSP_ZCTP,	700, 700, -1,		 -1, -1, {0} },</div><div class='add'>+	{EV_TIMEOUT,	700, 700, -1,		720, 720, {ACT_ICALL} },</div><div class='add'>+	{EV_BC_CLOSED,	720, 720, -1,		  0, -1, {ACT_NOTIFY_BC_DOWN} },</div><div class='ctx'> </div><div class='ctx'> /*accept icall*/</div><div class='del'>-	{EV_ACCEPT,	 -1,  -1, -1,			 -1, -1, {ACT_ACCEPT} },</div><div class='del'>-	{RSP_INIT,	720, 720, SEQ_ACCEPT,		721,  5, {ACT_CMD + AT_PROTO} },</div><div class='del'>-	{RSP_OK,	721, 721, -1,			722,  5, {ACT_CMD + AT_ISO} },</div><div class='del'>-	{RSP_OK,	722, 722, -1,			723,  5, {0},	"+VLS=17\r"},</div><div class='del'>-	{RSP_OK,	723, 723, -1,			724,  5, {0} },</div><div class='del'>-	{RSP_ZVLS,	724, 724, 17,			750, 50, {ACT_ACCEPTED} },</div><div class='del'>-	{RSP_ERROR,	721, 729, -1,			  0,  0, {ACT_ABORTACCEPT} },</div><div class='del'>-	{EV_TIMEOUT,	721, 729, -1,			  0,  0, {ACT_ABORTACCEPT} },</div><div class='del'>-	{RSP_ZSAU,	700, 729, ZSAU_NULL,		  0,  0, {ACT_ABORTACCEPT} },</div><div class='del'>-	{RSP_ZSAU,	700, 729, ZSAU_ACTIVE,		  0,  0, {ACT_ABORTACCEPT} },</div><div class='del'>-	{RSP_ZSAU,	700, 729, ZSAU_DISCONNECT_IND,	  0,  0, {ACT_ABORTACCEPT} },</div><div class='del'>-</div><div class='del'>-	{EV_BC_OPEN,	750, 750, -1,			751, -1},</div><div class='del'>-	{EV_TIMEOUT,	750, 751, -1,			  0,  0, {ACT_CONNTIMEOUT} },</div><div class='add'>+	{EV_ACCEPT,	 -1,  -1, -1,		 -1, -1, {ACT_ACCEPT} },</div><div class='add'>+	{RSP_INIT,	720, 720, SEQ_ACCEPT,	721,  5, {ACT_CMD + AT_PROTO} },</div><div class='add'>+	{RSP_OK,	721, 721, -1,		722,  5, {ACT_CMD + AT_ISO} },</div><div class='add'>+	{RSP_OK,	722, 722, -1,		723,  5, {0},	"+VLS=17\r"},</div><div class='add'>+	{RSP_OK,	723, 723, -1,		724,  5, {0} },</div><div class='add'>+	{RSP_ZVLS,	724, 724, 17,		750, 50, {ACT_ACCEPTED} },</div><div class='add'>+	{RSP_ERROR,	721, 729, -1,		  0,  0, {ACT_ABORTACCEPT} },</div><div class='add'>+	{EV_TIMEOUT,	721, 729, -1,		  0,  0, {ACT_ABORTACCEPT} },</div><div class='add'>+	{RSP_ZSAU,	700, 729, ZSAU_NULL,	  0,  0, {ACT_ABORTACCEPT} },</div><div class='add'>+	{RSP_ZSAU,	700, 729, ZSAU_ACTIVE,	  0,  0, {ACT_ABORTACCEPT} },</div><div class='add'>+	{RSP_ZSAU,	700, 729, ZSAU_DISCONNECT_IND, 0, 0, {ACT_ABORTACCEPT} },</div><div class='add'>+</div><div class='add'>+	{EV_BC_OPEN,	750, 750, -1,		751, -1},</div><div class='add'>+	{EV_TIMEOUT,	750, 751, -1,		  0,  0, {ACT_CONNTIMEOUT} },</div><div class='ctx'> </div><div class='ctx'> /* B channel closed (general case) */</div><div class='del'>-	{EV_BC_CLOSED,	 -1,  -1, -1,			 -1, -1, {ACT_NOTIFY_BC_DOWN} },</div><div class='add'>+	{EV_BC_CLOSED,	 -1,  -1, -1,		 -1, -1, {ACT_NOTIFY_BC_DOWN} },</div><div class='ctx'> </div><div class='ctx'> /* misc. */</div><div class='del'>-	{RSP_ZCON,	 -1,  -1, -1,			 -1, -1, {ACT_DEBUG} },</div><div class='del'>-	{RSP_ZCAU,	 -1,  -1, -1,			 -1, -1, {ACT_ZCAU} },</div><div class='del'>-	{RSP_NONE,	 -1,  -1, -1,			 -1, -1, {ACT_DEBUG} },</div><div class='del'>-	{RSP_ANY,	 -1,  -1, -1,			 -1, -1, {ACT_WARN} },</div><div class='add'>+	{RSP_ZCON,	 -1,  -1, -1,		 -1, -1, {ACT_DEBUG} },</div><div class='add'>+	{RSP_ZCAU,	 -1,  -1, -1,		 -1, -1, {ACT_ZCAU} },</div><div class='add'>+	{RSP_NONE,	 -1,  -1, -1,		 -1, -1, {ACT_DEBUG} },</div><div class='add'>+	{RSP_ANY,	 -1,  -1, -1,		 -1, -1, {ACT_WARN} },</div><div class='ctx'> 	{RSP_LAST}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -648,16 +649,16 @@ static void disconnect(struct at_state_t **at_state_p)</div><div class='ctx'> static inline struct at_state_t *get_free_channel(struct cardstate *cs,</div><div class='ctx'> 						  int cid)</div><div class='ctx'> /* cids: &gt;0: siemens-cid</div><div class='del'>-   0: without cid</div><div class='del'>-   -1: no cid assigned yet</div><div class='del'>-*/</div><div class='add'>+ *        0: without cid</div><div class='add'>+ *       -1: no cid assigned yet</div><div class='add'>+ */</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct at_state_t *ret;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; cs-&gt;channels; ++i)</div><div class='del'>-		if (gigaset_get_channel(cs-&gt;bcs + i)) {</div><div class='add'>+		if (gigaset_get_channel(cs-&gt;bcs + i) &gt;= 0) {</div><div class='ctx'> 			ret = &amp;cs-&gt;bcs[i].at_state;</div><div class='ctx'> 			ret-&gt;cid = cid;</div><div class='ctx'> 			return ret;</div><div class='hunk'>@@ -922,18 +923,18 @@ static void do_stop(struct cardstate *cs)</div><div class='ctx'>  * channel &gt;= 0: getting cid for the channel failed</div><div class='ctx'>  * channel &lt; 0:  entering cid mode failed</div><div class='ctx'>  *</div><div class='del'>- * returns 0 on failure</div><div class='add'>+ * returns 0 on success, &lt;0 on failure</div><div class='ctx'>  */</div><div class='ctx'> static int reinit_and_retry(struct cardstate *cs, int channel)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (--cs-&gt;retry_count &lt;= 0)</div><div class='del'>-		return 0;</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; cs-&gt;channels; ++i)</div><div class='ctx'> 		if (cs-&gt;bcs[i].at_state.cid &gt; 0)</div><div class='del'>-			return 0;</div><div class='add'>+			return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	if (channel &lt; 0)</div><div class='ctx'> 		dev_warn(cs-&gt;dev,</div><div class='hunk'>@@ -944,7 +945,7 @@ static int reinit_and_retry(struct cardstate *cs, int channel)</div><div class='ctx'> 		cs-&gt;bcs[channel].at_state.pending_commands |= PC_CID;</div><div class='ctx'> 	}</div><div class='ctx'> 	schedule_init(cs, MS_INIT);</div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int at_state_invalid(struct cardstate *cs,</div><div class='hunk'>@@ -1015,7 +1016,7 @@ static int do_lock(struct cardstate *cs)</div><div class='ctx'> 			if (cs-&gt;bcs[i].at_state.pending_commands)</div><div class='ctx'> 				return -EBUSY;</div><div class='ctx'> </div><div class='del'>-		if (!gigaset_get_channels(cs))</div><div class='add'>+		if (gigaset_get_channels(cs) &lt; 0)</div><div class='ctx'> 			return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1124,7 +1125,7 @@ static void do_action(int action, struct cardstate *cs,</div><div class='ctx'> 			init_failed(cs, M_UNKNOWN);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		if (!reinit_and_retry(cs, -1))</div><div class='add'>+		if (reinit_and_retry(cs, -1) &lt; 0)</div><div class='ctx'> 			schedule_init(cs, MS_RECOVER);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ACT_FAILUMODE:</div><div class='hunk'>@@ -1267,7 +1268,7 @@ static void do_action(int action, struct cardstate *cs,</div><div class='ctx'> 	case ACT_FAILCID:</div><div class='ctx'> 		cs-&gt;cur_at_seq = SEQ_NONE;</div><div class='ctx'> 		channel = cs-&gt;curchannel;</div><div class='del'>-		if (!reinit_and_retry(cs, channel)) {</div><div class='add'>+		if (reinit_and_retry(cs, channel) &lt; 0) {</div><div class='ctx'> 			dev_warn(cs-&gt;dev,</div><div class='ctx'> 				 "Could not get a call ID. Cannot dial.\n");</div><div class='ctx'> 			at_state2 = &amp;cs-&gt;bcs[channel].at_state;</div><div class='hunk'>@@ -1314,8 +1315,9 @@ static void do_action(int action, struct cardstate *cs,</div><div class='ctx'> 		s = ev-&gt;ptr;</div><div class='ctx'> </div><div class='ctx'> 		if (!strcmp(s, "OK")) {</div><div class='add'>+			/* OK without version string: assume old response */</div><div class='ctx'> 			*p_genresp = 1;</div><div class='del'>-			*p_resp_code = RSP_ERROR;</div><div class='add'>+			*p_resp_code = RSP_NONE;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1372,7 +1374,8 @@ static void do_action(int action, struct cardstate *cs,</div><div class='ctx'> 			 ev-&gt;parameter, at_state-&gt;ConState);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-		/* events from the LL */</div><div class='add'>+	/* events from the LL */</div><div class='add'>+</div><div class='ctx'> 	case ACT_DIAL:</div><div class='ctx'> 		start_dial(at_state, ev-&gt;ptr, ev-&gt;parameter);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1385,7 +1388,8 @@ static void do_action(int action, struct cardstate *cs,</div><div class='ctx'> 		cs-&gt;commands_pending = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-		/* hotplug events */</div><div class='add'>+	/* hotplug events */</div><div class='add'>+</div><div class='ctx'> 	case ACT_STOP:</div><div class='ctx'> 		do_stop(cs);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1393,7 +1397,8 @@ static void do_action(int action, struct cardstate *cs,</div><div class='ctx'> 		do_start(cs);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-		/* events from the interface */</div><div class='add'>+	/* events from the interface */</div><div class='add'>+</div><div class='ctx'> 	case ACT_IF_LOCK:</div><div class='ctx'> 		cs-&gt;cmd_result = ev-&gt;parameter ? do_lock(cs) : do_unlock(cs);</div><div class='ctx'> 		cs-&gt;waiting = 0;</div><div class='hunk'>@@ -1412,7 +1417,8 @@ static void do_action(int action, struct cardstate *cs,</div><div class='ctx'> 		wake_up(&amp;cs-&gt;waitqueue);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-		/* events from the proc file system */</div><div class='add'>+	/* events from the proc file system */</div><div class='add'>+</div><div class='ctx'> 	case ACT_PROC_CIDMODE:</div><div class='ctx'> 		spin_lock_irqsave(&amp;cs-&gt;lock, flags);</div><div class='ctx'> 		if (ev-&gt;parameter != cs-&gt;cidmode) {</div><div class='hunk'>@@ -1431,7 +1437,8 @@ static void do_action(int action, struct cardstate *cs,</div><div class='ctx'> 		wake_up(&amp;cs-&gt;waitqueue);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-		/* events from the hardware drivers */</div><div class='add'>+	/* events from the hardware drivers */</div><div class='add'>+</div><div class='ctx'> 	case ACT_NOTIFY_BC_DOWN:</div><div class='ctx'> 		bchannel_down(bcs);</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/isdn/gigaset/gigaset.h b/drivers/isdn/gigaset/gigaset.h<br/>index 1dc25131e670..8e2fc8f31d16 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/gigaset/gigaset.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/gigaset/gigaset.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/gigaset/gigaset.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/gigaset.h</a></div><div class='hunk'>@@ -163,8 +163,8 @@ void gigaset_dbg_buffer(enum debuglevel level, const unsigned char *msg,</div><div class='ctx'> #define BAS_LOWFRAME	5	/* "    "    with negative flow control */</div><div class='ctx'> #define BAS_CORRFRAMES	4	/* flow control multiplicator */</div><div class='ctx'> </div><div class='del'>-#define BAS_INBUFSIZE	(BAS_MAXFRAME * BAS_NUMFRAMES)</div><div class='del'>-/* size of isoc in buf per URB */</div><div class='add'>+#define BAS_INBUFSIZE	(BAS_MAXFRAME * BAS_NUMFRAMES)	/* size of isoc in buf</div><div class='add'>+							 * per URB */</div><div class='ctx'> #define BAS_OUTBUFSIZE	4096		/* size of common isoc out buffer */</div><div class='ctx'> #define BAS_OUTBUFPAD	BAS_MAXFRAME	/* size of pad area for isoc out buf */</div><div class='ctx'> </div><div class='hunk'>@@ -471,18 +471,18 @@ struct cardstate {</div><div class='ctx'> 					   for */</div><div class='ctx'> 	int commands_pending;		/* flag(s) in xxx.commands_pending have</div><div class='ctx'> 					   been set */</div><div class='del'>-	struct tasklet_struct event_tasklet;</div><div class='del'>-	/* tasklet for serializing AT commands.</div><div class='del'>-	 * Scheduled</div><div class='del'>-	 *   -&gt; for modem reponses (and</div><div class='del'>-	 *      incoming data for M10x)</div><div class='del'>-	 *   -&gt; on timeout</div><div class='del'>-	 *   -&gt; after setting bits in</div><div class='del'>-	 *      xxx.at_state.pending_command</div><div class='del'>-	 *      (e.g. command from LL) */</div><div class='del'>-	struct tasklet_struct write_tasklet;</div><div class='del'>-	/* tasklet for serial output</div><div class='del'>-	 * (not used in base driver) */</div><div class='add'>+	struct tasklet_struct</div><div class='add'>+		event_tasklet;		/* tasklet for serializing AT commands.</div><div class='add'>+					 * Scheduled</div><div class='add'>+					 *   -&gt; for modem reponses (and</div><div class='add'>+					 *      incoming data for M10x)</div><div class='add'>+					 *   -&gt; on timeout</div><div class='add'>+					 *   -&gt; after setting bits in</div><div class='add'>+					 *      xxx.at_state.pending_command</div><div class='add'>+					 *      (e.g. command from LL) */</div><div class='add'>+	struct tasklet_struct</div><div class='add'>+		write_tasklet;		/* tasklet for serial output</div><div class='add'>+					 * (not used in base driver) */</div><div class='ctx'> </div><div class='ctx'> 	/* event queue */</div><div class='ctx'> 	struct event_t events[MAX_EVENTS];</div><div class='hunk'>@@ -583,7 +583,7 @@ struct gigaset_ops {</div><div class='ctx'> 	int (*initbcshw)(struct bc_state *bcs);</div><div class='ctx'> </div><div class='ctx'> 	/* Called by gigaset_freecs() for freeing bcs-&gt;hw.xxx */</div><div class='del'>-	int (*freebcshw)(struct bc_state *bcs);</div><div class='add'>+	void (*freebcshw)(struct bc_state *bcs);</div><div class='ctx'> </div><div class='ctx'> 	/* Called by gigaset_bchannel_down() for resetting bcs-&gt;hw.xxx */</div><div class='ctx'> 	void (*reinitbcshw)(struct bc_state *bcs);</div><div class='head'>diff --git a/drivers/isdn/gigaset/i4l.c b/drivers/isdn/gigaset/i4l.c<br/>index 0f13eb1de657..2d75329007f1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/gigaset/i4l.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/gigaset/i4l.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/gigaset/i4l.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/i4l.c</a></div><div class='hunk'>@@ -229,7 +229,7 @@ static int command_from_LL(isdn_ctrl *cntrl)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 		bcs = cs-&gt;bcs + ch;</div><div class='del'>-		if (!gigaset_get_channel(bcs)) {</div><div class='add'>+		if (gigaset_get_channel(bcs) &lt; 0) {</div><div class='ctx'> 			dev_err(cs-&gt;dev, "ISDN_CMD_DIAL: channel not free\n");</div><div class='ctx'> 			return -EBUSY;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -618,7 +618,7 @@ void gigaset_isdn_stop(struct cardstate *cs)</div><div class='ctx'>  * @cs:		device descriptor structure.</div><div class='ctx'>  * @isdnid:	device name.</div><div class='ctx'>  *</div><div class='del'>- * Return value: 1 for success, 0 for failure</div><div class='add'>+ * Return value: 0 on success, error code &lt; 0 on failure</div><div class='ctx'>  */</div><div class='ctx'> int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid)</div><div class='ctx'> {</div><div class='hunk'>@@ -627,14 +627,14 @@ int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid)</div><div class='ctx'> 	iif = kmalloc(sizeof *iif, GFP_KERNEL);</div><div class='ctx'> 	if (!iif) {</div><div class='ctx'> 		pr_err("out of memory\n");</div><div class='del'>-		return 0;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (snprintf(iif-&gt;id, sizeof iif-&gt;id, "%s_%u", isdnid, cs-&gt;minor_index)</div><div class='ctx'> 	    &gt;= sizeof iif-&gt;id) {</div><div class='ctx'> 		pr_err("ID too long: %s\n", isdnid);</div><div class='ctx'> 		kfree(iif);</div><div class='del'>-		return 0;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	iif-&gt;owner = THIS_MODULE;</div><div class='hunk'>@@ -656,13 +656,13 @@ int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid)</div><div class='ctx'> 	if (!register_isdn(iif)) {</div><div class='ctx'> 		pr_err("register_isdn failed\n");</div><div class='ctx'> 		kfree(iif);</div><div class='del'>-		return 0;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cs-&gt;iif = iif;</div><div class='ctx'> 	cs-&gt;myid = iif-&gt;channels;		/* Set my device id */</div><div class='ctx'> 	cs-&gt;hw_hdr_len = HW_HDR_LEN;</div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/isdn/gigaset/isocdata.c b/drivers/isdn/gigaset/isocdata.c<br/>index a351c16705bd..bc29f1d52a2f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/gigaset/isocdata.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/gigaset/isocdata.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/gigaset/isocdata.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/isocdata.c</a></div><div class='hunk'>@@ -56,7 +56,7 @@ static inline int isowbuf_freebytes(struct isowbuf_t *iwb)</div><div class='ctx'> </div><div class='ctx'> /* start writing</div><div class='ctx'>  * acquire the write semaphore</div><div class='del'>- * return true if acquired, false if busy</div><div class='add'>+ * return 0 if acquired, &lt;0 if busy</div><div class='ctx'>  */</div><div class='ctx'> static inline int isowbuf_startwrite(struct isowbuf_t *iwb)</div><div class='ctx'> {</div><div class='hunk'>@@ -64,12 +64,12 @@ static inline int isowbuf_startwrite(struct isowbuf_t *iwb)</div><div class='ctx'> 		atomic_inc(&amp;iwb-&gt;writesem);</div><div class='ctx'> 		gig_dbg(DEBUG_ISO, "%s: couldn't acquire iso write semaphore",</div><div class='ctx'> 			__func__);</div><div class='del'>-		return 0;</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> 	gig_dbg(DEBUG_ISO,</div><div class='ctx'> 		"%s: acquired iso write semaphore, data[write]=%02x, nbits=%d",</div><div class='ctx'> 		__func__, iwb-&gt;data[iwb-&gt;write], iwb-&gt;wbits);</div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* finish writing</div><div class='hunk'>@@ -158,7 +158,7 @@ int gigaset_isowbuf_getbytes(struct isowbuf_t *iwb, int size)</div><div class='ctx'> 		/* no wraparound in valid data */</div><div class='ctx'> 		if (limit &gt;= write) {</div><div class='ctx'> 			/* append idle frame */</div><div class='del'>-			if (!isowbuf_startwrite(iwb))</div><div class='add'>+			if (isowbuf_startwrite(iwb) &lt; 0)</div><div class='ctx'> 				return -EBUSY;</div><div class='ctx'> 			/* write position could have changed */</div><div class='ctx'> 			write = iwb-&gt;write;</div><div class='hunk'>@@ -403,7 +403,7 @@ static inline int hdlc_buildframe(struct isowbuf_t *iwb,</div><div class='ctx'> 	unsigned char c;</div><div class='ctx'> </div><div class='ctx'> 	if (isowbuf_freebytes(iwb) &lt; count + count / 5 + 6 ||</div><div class='del'>-	    !isowbuf_startwrite(iwb)) {</div><div class='add'>+	    isowbuf_startwrite(iwb) &lt; 0) {</div><div class='ctx'> 		gig_dbg(DEBUG_ISO, "%s: %d bytes free -&gt; -EAGAIN",</div><div class='ctx'> 			__func__, isowbuf_freebytes(iwb));</div><div class='ctx'> 		return -EAGAIN;</div><div class='hunk'>@@ -457,7 +457,7 @@ static inline int trans_buildframe(struct isowbuf_t *iwb,</div><div class='ctx'> 		return iwb-&gt;write;</div><div class='ctx'> </div><div class='ctx'> 	if (isowbuf_freebytes(iwb) &lt; count ||</div><div class='del'>-	    !isowbuf_startwrite(iwb)) {</div><div class='add'>+	    isowbuf_startwrite(iwb) &lt; 0) {</div><div class='ctx'> 		gig_dbg(DEBUG_ISO, "can't put %d bytes", count);</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/isdn/gigaset/ser-gigaset.c b/drivers/isdn/gigaset/ser-gigaset.c<br/>index 6f3fd4cf4378..8c91fd5eb6fd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/gigaset/ser-gigaset.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/gigaset/ser-gigaset.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/gigaset/ser-gigaset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/ser-gigaset.c</a></div><div class='hunk'>@@ -340,17 +340,16 @@ static int gigaset_initbcshw(struct bc_state *bcs)</div><div class='ctx'> {</div><div class='ctx'> 	/* unused */</div><div class='ctx'> 	bcs-&gt;hw.ser = NULL;</div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Free B channel structure</div><div class='ctx'>  * Called by "gigaset_freebcs" in common.c</div><div class='ctx'>  */</div><div class='del'>-static int gigaset_freebcshw(struct bc_state *bcs)</div><div class='add'>+static void gigaset_freebcshw(struct bc_state *bcs)</div><div class='ctx'> {</div><div class='ctx'> 	/* unused */</div><div class='del'>-	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -398,7 +397,7 @@ static int gigaset_initcshw(struct cardstate *cs)</div><div class='ctx'> 	scs = kzalloc(sizeof(struct ser_cardstate), GFP_KERNEL);</div><div class='ctx'> 	if (!scs) {</div><div class='ctx'> 		pr_err("out of memory\n");</div><div class='del'>-		return 0;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	cs-&gt;hw.ser = scs;</div><div class='ctx'> </div><div class='hunk'>@@ -410,13 +409,13 @@ static int gigaset_initcshw(struct cardstate *cs)</div><div class='ctx'> 		pr_err("error %d registering platform device\n", rc);</div><div class='ctx'> 		kfree(cs-&gt;hw.ser);</div><div class='ctx'> 		cs-&gt;hw.ser = NULL;</div><div class='del'>-		return 0;</div><div class='add'>+		return rc;</div><div class='ctx'> 	}</div><div class='ctx'> 	dev_set_drvdata(&amp;cs-&gt;hw.ser-&gt;dev.dev, cs);</div><div class='ctx'> </div><div class='ctx'> 	tasklet_init(&amp;cs-&gt;write_tasklet,</div><div class='ctx'> 		     gigaset_modem_fill, (unsigned long) cs);</div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -503,6 +502,7 @@ static int</div><div class='ctx'> gigaset_tty_open(struct tty_struct *tty)</div><div class='ctx'> {</div><div class='ctx'> 	struct cardstate *cs;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	gig_dbg(DEBUG_INIT, "Starting HLL for Gigaset M101");</div><div class='ctx'> </div><div class='hunk'>@@ -515,8 +515,10 @@ gigaset_tty_open(struct tty_struct *tty)</div><div class='ctx'> </div><div class='ctx'> 	/* allocate memory for our device state and initialize it */</div><div class='ctx'> 	cs = gigaset_initcs(driver, 1, 1, 0, cidmode, GIGASET_MODULENAME);</div><div class='del'>-	if (!cs)</div><div class='add'>+	if (!cs) {</div><div class='add'>+		rc = -ENODEV;</div><div class='ctx'> 		goto error;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	cs-&gt;dev = &amp;cs-&gt;hw.ser-&gt;dev.dev;</div><div class='ctx'> 	cs-&gt;hw.ser-&gt;tty = tty;</div><div class='hunk'>@@ -530,7 +532,8 @@ gigaset_tty_open(struct tty_struct *tty)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (startmode == SM_LOCKED)</div><div class='ctx'> 		cs-&gt;mstate = MS_LOCKED;</div><div class='del'>-	if (!gigaset_start(cs)) {</div><div class='add'>+	rc = gigaset_start(cs);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='ctx'> 		tasklet_kill(&amp;cs-&gt;write_tasklet);</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -542,7 +545,7 @@ error:</div><div class='ctx'> 	gig_dbg(DEBUG_INIT, "Startup of HLL failed");</div><div class='ctx'> 	tty-&gt;disc_data = NULL;</div><div class='ctx'> 	gigaset_freecs(cs);</div><div class='del'>-	return -ENODEV;</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/isdn/gigaset/usb-gigaset.c b/drivers/isdn/gigaset/usb-gigaset.c<br/>index 049da67f6392..d0a41cb0cf62 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/gigaset/usb-gigaset.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/gigaset/usb-gigaset.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/gigaset/usb-gigaset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/gigaset/usb-gigaset.c</a></div><div class='hunk'>@@ -124,6 +124,7 @@ static struct usb_driver gigaset_usb_driver = {</div><div class='ctx'> 	.reset_resume =	gigaset_resume,</div><div class='ctx'> 	.pre_reset =	gigaset_pre_reset,</div><div class='ctx'> 	.post_reset =	gigaset_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct usb_cardstate {</div><div class='hunk'>@@ -549,10 +550,9 @@ static int gigaset_brkchars(struct cardstate *cs, const unsigned char buf[6])</div><div class='ctx'> 			       0, 0, &amp;buf, 6, 2000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gigaset_freebcshw(struct bc_state *bcs)</div><div class='add'>+static void gigaset_freebcshw(struct bc_state *bcs)</div><div class='ctx'> {</div><div class='ctx'> 	/* unused */</div><div class='del'>-	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Initialize the b-channel structure */</div><div class='hunk'>@@ -560,7 +560,7 @@ static int gigaset_initbcshw(struct bc_state *bcs)</div><div class='ctx'> {</div><div class='ctx'> 	/* unused */</div><div class='ctx'> 	bcs-&gt;hw.usb = NULL;</div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gigaset_reinitbcshw(struct bc_state *bcs)</div><div class='hunk'>@@ -582,7 +582,7 @@ static int gigaset_initcshw(struct cardstate *cs)</div><div class='ctx'> 		kmalloc(sizeof(struct usb_cardstate), GFP_KERNEL);</div><div class='ctx'> 	if (!ucs) {</div><div class='ctx'> 		pr_err("out of memory\n");</div><div class='del'>-		return 0;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ucs-&gt;bchars[0] = 0;</div><div class='hunk'>@@ -597,7 +597,7 @@ static int gigaset_initcshw(struct cardstate *cs)</div><div class='ctx'> 	tasklet_init(&amp;cs-&gt;write_tasklet,</div><div class='ctx'> 		     gigaset_modem_fill, (unsigned long) cs);</div><div class='ctx'> </div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Send data from current skb to the device. */</div><div class='hunk'>@@ -766,9 +766,9 @@ static int gigaset_probe(struct usb_interface *interface,</div><div class='ctx'> 	if (startmode == SM_LOCKED)</div><div class='ctx'> 		cs-&gt;mstate = MS_LOCKED;</div><div class='ctx'> </div><div class='del'>-	if (!gigaset_start(cs)) {</div><div class='add'>+	retval = gigaset_start(cs);</div><div class='add'>+	if (retval &lt; 0) {</div><div class='ctx'> 		tasklet_kill(&amp;cs-&gt;write_tasklet);</div><div class='del'>-		retval = -ENODEV;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -898,8 +898,10 @@ static int __init usb_gigaset_init(void)</div><div class='ctx'> 	driver = gigaset_initdriver(GIGASET_MINOR, GIGASET_MINORS,</div><div class='ctx'> 				    GIGASET_MODULENAME, GIGASET_DEVNAME,</div><div class='ctx'> 				    &amp;ops, THIS_MODULE);</div><div class='del'>-	if (driver == NULL)</div><div class='add'>+	if (driver == NULL) {</div><div class='add'>+		result = -ENOMEM;</div><div class='ctx'> 		goto error;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* register this driver with the USB subsystem */</div><div class='ctx'> 	result = usb_register(&amp;gigaset_usb_driver);</div><div class='hunk'>@@ -915,7 +917,7 @@ error:</div><div class='ctx'> 	if (driver)</div><div class='ctx'> 		gigaset_freedriver(driver);</div><div class='ctx'> 	driver = NULL;</div><div class='del'>-	return -1;</div><div class='add'>+	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/isdn/hardware/eicon/capifunc.c b/drivers/isdn/hardware/eicon/capifunc.c<br/>index a576f32e6635..7a0bdbdd87ea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/capifunc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/eicon/capifunc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/capifunc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/capifunc.c</a></div><div class='hunk'>@@ -1120,7 +1120,7 @@ int fax_head_line_time(char *buffer)</div><div class='ctx'> /*</div><div class='ctx'>  * init (alloc) main structures</div><div class='ctx'>  */</div><div class='del'>-static int DIVA_INIT_FUNCTION init_main_structs(void)</div><div class='add'>+static int __init init_main_structs(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!(mapped_msg = (CAPI_MSG *) diva_os_malloc(0, MAX_MSG_SIZE))) {</div><div class='ctx'> 		DBG_ERR(("init: failed alloc mapped_msg."))</div><div class='hunk'>@@ -1181,7 +1181,7 @@ static void do_api_remove_start(void)</div><div class='ctx'> /*</div><div class='ctx'>  * init</div><div class='ctx'>  */</div><div class='del'>-int DIVA_INIT_FUNCTION init_capifunc(void)</div><div class='add'>+int __init init_capifunc(void)</div><div class='ctx'> {</div><div class='ctx'> 	diva_os_initialize_spin_lock(&amp;api_lock, "capifunc");</div><div class='ctx'> 	memset(ControllerMap, 0, MAX_DESCRIPTORS + 1);</div><div class='hunk'>@@ -1209,7 +1209,7 @@ int DIVA_INIT_FUNCTION init_capifunc(void)</div><div class='ctx'> /*</div><div class='ctx'>  * finit</div><div class='ctx'>  */</div><div class='del'>-void DIVA_EXIT_FUNCTION finit_capifunc(void)</div><div class='add'>+void __exit finit_capifunc(void)</div><div class='ctx'> {</div><div class='ctx'> 	do_api_remove_start();</div><div class='ctx'> 	divacapi_disconnect_didd();</div><div class='head'>diff --git a/drivers/isdn/hardware/eicon/capimain.c b/drivers/isdn/hardware/eicon/capimain.c<br/>index eabe0fa1b627..997d46abf5b2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/capimain.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/eicon/capimain.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/capimain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/capimain.c</a></div><div class='hunk'>@@ -118,7 +118,7 @@ void diva_os_set_controller_struct(struct capi_ctr *ctrl)</div><div class='ctx'> /*</div><div class='ctx'>  * module init</div><div class='ctx'>  */</div><div class='del'>-static int DIVA_INIT_FUNCTION divacapi_init(void)</div><div class='add'>+static int __init divacapi_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	char tmprev[32];</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -144,7 +144,7 @@ static int DIVA_INIT_FUNCTION divacapi_init(void)</div><div class='ctx'> /*</div><div class='ctx'>  * module exit</div><div class='ctx'>  */</div><div class='del'>-static void DIVA_EXIT_FUNCTION divacapi_exit(void)</div><div class='add'>+static void __exit divacapi_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	finit_capifunc();</div><div class='ctx'> 	printk(KERN_INFO "%s: module unloaded.\n", DRIVERLNAME);</div><div class='head'>diff --git a/drivers/isdn/hardware/eicon/diddfunc.c b/drivers/isdn/hardware/eicon/diddfunc.c<br/>index c4c8220c9d72..b0b23ed8b374 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/diddfunc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/eicon/diddfunc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/diddfunc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/diddfunc.c</a></div><div class='hunk'>@@ -47,7 +47,7 @@ static void *didd_callback(void *context, DESCRIPTOR *adapter,</div><div class='ctx'> /*</div><div class='ctx'>  * connect to didd</div><div class='ctx'>  */</div><div class='del'>-static int DIVA_INIT_FUNCTION connect_didd(void)</div><div class='add'>+static int __init connect_didd(void)</div><div class='ctx'> {</div><div class='ctx'> 	int x = 0;</div><div class='ctx'> 	int dadapter = 0;</div><div class='hunk'>@@ -79,7 +79,7 @@ static int DIVA_INIT_FUNCTION connect_didd(void)</div><div class='ctx'> /*</div><div class='ctx'>  * disconnect from didd</div><div class='ctx'>  */</div><div class='del'>-static void DIVA_EXIT_FUNCTION disconnect_didd(void)</div><div class='add'>+static void __exit disconnect_didd(void)</div><div class='ctx'> {</div><div class='ctx'> 	IDI_SYNC_REQ req;</div><div class='ctx'> </div><div class='hunk'>@@ -92,7 +92,7 @@ static void DIVA_EXIT_FUNCTION disconnect_didd(void)</div><div class='ctx'> /*</div><div class='ctx'>  * init</div><div class='ctx'>  */</div><div class='del'>-int DIVA_INIT_FUNCTION diddfunc_init(void)</div><div class='add'>+int __init diddfunc_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	diva_didd_load_time_init();</div><div class='ctx'> </div><div class='hunk'>@@ -107,7 +107,7 @@ int DIVA_INIT_FUNCTION diddfunc_init(void)</div><div class='ctx'> /*</div><div class='ctx'>  * finit</div><div class='ctx'>  */</div><div class='del'>-void DIVA_EXIT_FUNCTION diddfunc_finit(void)</div><div class='add'>+void __exit diddfunc_finit(void)</div><div class='ctx'> {</div><div class='ctx'> 	DbgDeregister();</div><div class='ctx'> 	disconnect_didd();</div><div class='head'>diff --git a/drivers/isdn/hardware/eicon/diva_didd.c b/drivers/isdn/hardware/eicon/diva_didd.c<br/>index d1d3de03cced..fab6ccfb00d5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/diva_didd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/eicon/diva_didd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/diva_didd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/diva_didd.c</a></div><div class='hunk'>@@ -91,7 +91,7 @@ static const struct file_operations divadidd_proc_fops = {</div><div class='ctx'> 	.release	= single_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int DIVA_INIT_FUNCTION create_proc(void)</div><div class='add'>+static int __init create_proc(void)</div><div class='ctx'> {</div><div class='ctx'> 	proc_net_eicon = proc_mkdir("eicon", init_net.proc_net);</div><div class='ctx'> </div><div class='hunk'>@@ -109,7 +109,7 @@ static void remove_proc(void)</div><div class='ctx'> 	remove_proc_entry("eicon", init_net.proc_net);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int DIVA_INIT_FUNCTION divadidd_init(void)</div><div class='add'>+static int __init divadidd_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	char tmprev[32];</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -141,7 +141,7 @@ out:</div><div class='ctx'> 	return (ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void DIVA_EXIT_FUNCTION divadidd_exit(void)</div><div class='add'>+static void __exit divadidd_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	diddfunc_finit();</div><div class='ctx'> 	remove_proc();</div><div class='head'>diff --git a/drivers/isdn/hardware/eicon/divamnt.c b/drivers/isdn/hardware/eicon/divamnt.c<br/>index ffa0c31be745..48db08d0bb3d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/divamnt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/eicon/divamnt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/divamnt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/divamnt.c</a></div><div class='hunk'>@@ -184,7 +184,7 @@ static void divas_maint_unregister_chrdev(void)</div><div class='ctx'> 	unregister_chrdev(major, DEVNAME);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int DIVA_INIT_FUNCTION divas_maint_register_chrdev(void)</div><div class='add'>+static int __init divas_maint_register_chrdev(void)</div><div class='ctx'> {</div><div class='ctx'> 	if ((major = register_chrdev(0, DEVNAME, &amp;divas_maint_fops)) &lt; 0)</div><div class='ctx'> 	{</div><div class='hunk'>@@ -207,7 +207,7 @@ void diva_maint_wakeup_read(void)</div><div class='ctx'> /*</div><div class='ctx'>  *  Driver Load</div><div class='ctx'>  */</div><div class='del'>-static int DIVA_INIT_FUNCTION maint_init(void)</div><div class='add'>+static int __init maint_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	char tmprev[50];</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -245,7 +245,7 @@ out:</div><div class='ctx'> /*</div><div class='ctx'> **  Driver Unload</div><div class='ctx'> */</div><div class='del'>-static void DIVA_EXIT_FUNCTION maint_exit(void)</div><div class='add'>+static void __exit maint_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	divas_maint_unregister_chrdev();</div><div class='ctx'> 	mntfunc_finit();</div><div class='head'>diff --git a/drivers/isdn/hardware/eicon/divasfunc.c b/drivers/isdn/hardware/eicon/divasfunc.c<br/>index 60aaf9580956..4be5f8814777 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/divasfunc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/eicon/divasfunc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/divasfunc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/divasfunc.c</a></div><div class='hunk'>@@ -153,7 +153,7 @@ static void *didd_callback(void *context, DESCRIPTOR *adapter,</div><div class='ctx'> /*</div><div class='ctx'>  * connect to didd</div><div class='ctx'>  */</div><div class='del'>-static int DIVA_INIT_FUNCTION connect_didd(void)</div><div class='add'>+static int __init connect_didd(void)</div><div class='ctx'> {</div><div class='ctx'> 	int x = 0;</div><div class='ctx'> 	int dadapter = 0;</div><div class='hunk'>@@ -209,7 +209,7 @@ static void disconnect_didd(void)</div><div class='ctx'> /*</div><div class='ctx'>  * init</div><div class='ctx'>  */</div><div class='del'>-int DIVA_INIT_FUNCTION divasfunc_init(int dbgmask)</div><div class='add'>+int __init divasfunc_init(int dbgmask)</div><div class='ctx'> {</div><div class='ctx'> 	char *version;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/isdn/hardware/eicon/divasi.c b/drivers/isdn/hardware/eicon/divasi.c<br/>index a5c8f90b3b37..4103a8c178d7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/divasi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/eicon/divasi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/divasi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/divasi.c</a></div><div class='hunk'>@@ -114,7 +114,7 @@ static const struct file_operations um_idi_proc_fops = {</div><div class='ctx'> 	.release	= single_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int DIVA_INIT_FUNCTION create_um_idi_proc(void)</div><div class='add'>+static int __init create_um_idi_proc(void)</div><div class='ctx'> {</div><div class='ctx'> 	um_idi_proc_entry = proc_create(DRIVERLNAME, S_IRUGO, proc_net_eicon,</div><div class='ctx'> 					&amp;um_idi_proc_fops);</div><div class='hunk'>@@ -146,7 +146,7 @@ static void divas_idi_unregister_chrdev(void)</div><div class='ctx'> 	unregister_chrdev(major, DEVNAME);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int DIVA_INIT_FUNCTION divas_idi_register_chrdev(void)</div><div class='add'>+static int __init divas_idi_register_chrdev(void)</div><div class='ctx'> {</div><div class='ctx'> 	if ((major = register_chrdev(0, DEVNAME, &amp;divas_idi_fops)) &lt; 0)</div><div class='ctx'> 	{</div><div class='hunk'>@@ -161,7 +161,7 @@ static int DIVA_INIT_FUNCTION divas_idi_register_chrdev(void)</div><div class='ctx'> /*</div><div class='ctx'> ** Driver Load</div><div class='ctx'> */</div><div class='del'>-static int DIVA_INIT_FUNCTION divasi_init(void)</div><div class='add'>+static int __init divasi_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	char tmprev[50];</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -202,7 +202,7 @@ out:</div><div class='ctx'> /*</div><div class='ctx'> ** Driver Unload</div><div class='ctx'> */</div><div class='del'>-static void DIVA_EXIT_FUNCTION divasi_exit(void)</div><div class='add'>+static void __exit divasi_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	idifunc_finit();</div><div class='ctx'> 	remove_um_idi_proc();</div><div class='head'>diff --git a/drivers/isdn/hardware/eicon/divasmain.c b/drivers/isdn/hardware/eicon/divasmain.c<br/>index 7eaab06276f9..ca6d276bb256 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/divasmain.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/eicon/divasmain.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/divasmain.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/divasmain.c</a></div><div class='hunk'>@@ -673,7 +673,7 @@ static void divas_unregister_chrdev(void)</div><div class='ctx'> 	unregister_chrdev(major, DEVNAME);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int DIVA_INIT_FUNCTION divas_register_chrdev(void)</div><div class='add'>+static int __init divas_register_chrdev(void)</div><div class='ctx'> {</div><div class='ctx'> 	if ((major = register_chrdev(0, DEVNAME, &amp;divas_fops)) &lt; 0)</div><div class='ctx'> 	{</div><div class='hunk'>@@ -767,7 +767,7 @@ static void __devexit divas_remove_one(struct pci_dev *pdev)</div><div class='ctx'> /* --------------------------------------------------------------------------</div><div class='ctx'>    Driver Load / Startup</div><div class='ctx'>    -------------------------------------------------------------------------- */</div><div class='del'>-static int DIVA_INIT_FUNCTION divas_init(void)</div><div class='add'>+static int __init divas_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	char tmprev[50];</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -831,7 +831,7 @@ out:</div><div class='ctx'> /* --------------------------------------------------------------------------</div><div class='ctx'>    Driver Unload</div><div class='ctx'>    -------------------------------------------------------------------------- */</div><div class='del'>-static void DIVA_EXIT_FUNCTION divas_exit(void)</div><div class='add'>+static void __exit divas_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	pci_unregister_driver(&amp;diva_pci_driver);</div><div class='ctx'> 	remove_divas_proc();</div><div class='head'>diff --git a/drivers/isdn/hardware/eicon/idifunc.c b/drivers/isdn/hardware/eicon/idifunc.c<br/>index d153e3cdecf7..fef6586fe5ac 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/idifunc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/eicon/idifunc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/idifunc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/idifunc.c</a></div><div class='hunk'>@@ -133,7 +133,7 @@ static void um_remove_card(DESCRIPTOR *d)</div><div class='ctx'> /*</div><div class='ctx'>  * remove all adapter</div><div class='ctx'>  */</div><div class='del'>-static void DIVA_EXIT_FUNCTION remove_all_idi_proc(void)</div><div class='add'>+static void __exit remove_all_idi_proc(void)</div><div class='ctx'> {</div><div class='ctx'> 	udiva_card *card;</div><div class='ctx'> 	diva_os_spin_lock_magic_t old_irql;</div><div class='hunk'>@@ -181,7 +181,7 @@ static void *didd_callback(void *context, DESCRIPTOR *adapter,</div><div class='ctx'> /*</div><div class='ctx'>  * connect DIDD</div><div class='ctx'>  */</div><div class='del'>-static int DIVA_INIT_FUNCTION connect_didd(void)</div><div class='add'>+static int __init connect_didd(void)</div><div class='ctx'> {</div><div class='ctx'> 	int x = 0;</div><div class='ctx'> 	int dadapter = 0;</div><div class='hunk'>@@ -225,7 +225,7 @@ static int DIVA_INIT_FUNCTION connect_didd(void)</div><div class='ctx'> /*</div><div class='ctx'>  *  Disconnect from DIDD</div><div class='ctx'>  */</div><div class='del'>-static void DIVA_EXIT_FUNCTION disconnect_didd(void)</div><div class='add'>+static void __exit disconnect_didd(void)</div><div class='ctx'> {</div><div class='ctx'> 	IDI_SYNC_REQ req;</div><div class='ctx'> </div><div class='hunk'>@@ -240,7 +240,7 @@ static void DIVA_EXIT_FUNCTION disconnect_didd(void)</div><div class='ctx'> /*</div><div class='ctx'>  * init</div><div class='ctx'>  */</div><div class='del'>-int DIVA_INIT_FUNCTION idifunc_init(void)</div><div class='add'>+int __init idifunc_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	diva_os_initialize_spin_lock(&amp;ll_lock, "idifunc");</div><div class='ctx'> </div><div class='hunk'>@@ -260,7 +260,7 @@ int DIVA_INIT_FUNCTION idifunc_init(void)</div><div class='ctx'> /*</div><div class='ctx'>  * finit</div><div class='ctx'>  */</div><div class='del'>-void DIVA_EXIT_FUNCTION idifunc_finit(void)</div><div class='add'>+void __exit idifunc_finit(void)</div><div class='ctx'> {</div><div class='ctx'> 	diva_user_mode_idi_finit();</div><div class='ctx'> 	disconnect_didd();</div><div class='head'>diff --git a/drivers/isdn/hardware/eicon/mntfunc.c b/drivers/isdn/hardware/eicon/mntfunc.c<br/>index d6072607305c..1cd9affb6058 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/mntfunc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/eicon/mntfunc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/mntfunc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/mntfunc.c</a></div><div class='hunk'>@@ -72,7 +72,7 @@ static void *didd_callback(void *context, DESCRIPTOR *adapter,</div><div class='ctx'> /*</div><div class='ctx'>  * connect to didd</div><div class='ctx'>  */</div><div class='del'>-static int DIVA_INIT_FUNCTION connect_didd(void)</div><div class='add'>+static int __init connect_didd(void)</div><div class='ctx'> {</div><div class='ctx'> 	int x = 0;</div><div class='ctx'> 	int dadapter = 0;</div><div class='hunk'>@@ -114,7 +114,7 @@ static int DIVA_INIT_FUNCTION connect_didd(void)</div><div class='ctx'> /*</div><div class='ctx'>  * disconnect from didd</div><div class='ctx'>  */</div><div class='del'>-static void DIVA_EXIT_FUNCTION disconnect_didd(void)</div><div class='add'>+static void __exit disconnect_didd(void)</div><div class='ctx'> {</div><div class='ctx'> 	IDI_SYNC_REQ req;</div><div class='ctx'> </div><div class='hunk'>@@ -300,7 +300,7 @@ int maint_read_write(void __user *buf, int count)</div><div class='ctx'> /*</div><div class='ctx'>  *  init</div><div class='ctx'>  */</div><div class='del'>-int DIVA_INIT_FUNCTION mntfunc_init(int *buffer_length, void **buffer,</div><div class='add'>+int __init mntfunc_init(int *buffer_length, void **buffer,</div><div class='ctx'> 				    unsigned long diva_dbg_mem)</div><div class='ctx'> {</div><div class='ctx'> 	if (*buffer_length &lt; 64) {</div><div class='hunk'>@@ -348,7 +348,7 @@ int DIVA_INIT_FUNCTION mntfunc_init(int *buffer_length, void **buffer,</div><div class='ctx'> /*</div><div class='ctx'>  *  exit</div><div class='ctx'>  */</div><div class='del'>-void DIVA_EXIT_FUNCTION mntfunc_finit(void)</div><div class='add'>+void __exit mntfunc_finit(void)</div><div class='ctx'> {</div><div class='ctx'> 	void *buffer;</div><div class='ctx'> 	int i = 100;</div><div class='head'>diff --git a/drivers/isdn/hardware/eicon/platform.h b/drivers/isdn/hardware/eicon/platform.h<br/>index 7331c3b14a5f..b2edb7590dda 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/platform.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/eicon/platform.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/eicon/platform.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/eicon/platform.h</a></div><div class='hunk'>@@ -38,9 +38,6 @@</div><div class='ctx'> #define DIVA_NO_DEBUGLIB</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define DIVA_INIT_FUNCTION  __init</div><div class='del'>-#define DIVA_EXIT_FUNCTION  __exit</div><div class='del'>-</div><div class='ctx'> #define DIVA_USER_MODE_CARD_CONFIG 1</div><div class='ctx'> #define	USE_EXTENDED_DEBUGS 1</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/isdn/hardware/mISDN/avmfritz.c b/drivers/isdn/hardware/mISDN/avmfritz.c<br/>index c0b8c960ee3f..c08fc605e56b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/avmfritz.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/mISDN/avmfritz.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/avmfritz.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/avmfritz.c</a></div><div class='hunk'>@@ -30,7 +30,7 @@</div><div class='ctx'> #include "ipac.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#define AVMFRITZ_REV	"2.1"</div><div class='add'>+#define AVMFRITZ_REV	"2.3"</div><div class='ctx'> </div><div class='ctx'> static int AVM_cnt;</div><div class='ctx'> static int debug;</div><div class='hunk'>@@ -69,6 +69,7 @@ enum {</div><div class='ctx'> #define HDLC_MODE_TRANS		0x02</div><div class='ctx'> #define HDLC_MODE_CCR_7		0x04</div><div class='ctx'> #define HDLC_MODE_CCR_16	0x08</div><div class='add'>+#define HDLC_FIFO_SIZE_128	0x20</div><div class='ctx'> #define HDLC_MODE_TESTLOOP	0x80</div><div class='ctx'> </div><div class='ctx'> #define HDLC_INT_XPR		0x80</div><div class='hunk'>@@ -80,13 +81,16 @@ enum {</div><div class='ctx'> #define HDLC_STAT_RDO		0x10</div><div class='ctx'> #define HDLC_STAT_CRCVFRRAB	0x0E</div><div class='ctx'> #define HDLC_STAT_CRCVFR	0x06</div><div class='del'>-#define HDLC_STAT_RML_MASK	0x3f00</div><div class='add'>+#define HDLC_STAT_RML_MASK_V1	0x3f00</div><div class='add'>+#define HDLC_STAT_RML_MASK_V2	0x7f00</div><div class='ctx'> </div><div class='ctx'> #define HDLC_CMD_XRS		0x80</div><div class='ctx'> #define HDLC_CMD_XME		0x01</div><div class='ctx'> #define HDLC_CMD_RRS		0x20</div><div class='ctx'> #define HDLC_CMD_XML_MASK	0x3f00</div><div class='del'>-#define HDLC_FIFO_SIZE		32</div><div class='add'>+</div><div class='add'>+#define HDLC_FIFO_SIZE_V1	32</div><div class='add'>+#define HDLC_FIFO_SIZE_V2	128</div><div class='ctx'> </div><div class='ctx'> /* Fritz PCI v2.0 */</div><div class='ctx'> </div><div class='hunk'>@@ -346,11 +350,14 @@ modehdlc(struct bchannel *bch, int protocol)</div><div class='ctx'> {</div><div class='ctx'> 	struct fritzcard *fc = bch-&gt;hw;</div><div class='ctx'> 	struct hdlc_hw *hdlc;</div><div class='add'>+	u8 mode;</div><div class='ctx'> </div><div class='ctx'> 	hdlc = &amp;fc-&gt;hdlc[(bch-&gt;nr - 1) &amp; 1];</div><div class='ctx'> 	pr_debug("%s: hdlc %c protocol %x--&gt;%x ch %d\n", fc-&gt;name,</div><div class='ctx'> 		 '@' + bch-&gt;nr, bch-&gt;state, protocol, bch-&gt;nr);</div><div class='ctx'> 	hdlc-&gt;ctrl.ctrl = 0;</div><div class='add'>+	mode = (fc-&gt;type == AVM_FRITZ_PCIV2) ? HDLC_FIFO_SIZE_128 : 0;</div><div class='add'>+</div><div class='ctx'> 	switch (protocol) {</div><div class='ctx'> 	case -1: /* used for init */</div><div class='ctx'> 		bch-&gt;state = -1;</div><div class='hunk'>@@ -358,7 +365,7 @@ modehdlc(struct bchannel *bch, int protocol)</div><div class='ctx'> 		if (bch-&gt;state == ISDN_P_NONE)</div><div class='ctx'> 			break;</div><div class='ctx'> 		hdlc-&gt;ctrl.sr.cmd  = HDLC_CMD_XRS | HDLC_CMD_RRS;</div><div class='del'>-		hdlc-&gt;ctrl.sr.mode = HDLC_MODE_TRANS;</div><div class='add'>+		hdlc-&gt;ctrl.sr.mode = mode | HDLC_MODE_TRANS;</div><div class='ctx'> 		write_ctrl(bch, 5);</div><div class='ctx'> 		bch-&gt;state = ISDN_P_NONE;</div><div class='ctx'> 		test_and_clear_bit(FLG_HDLC, &amp;bch-&gt;Flags);</div><div class='hunk'>@@ -367,7 +374,7 @@ modehdlc(struct bchannel *bch, int protocol)</div><div class='ctx'> 	case ISDN_P_B_RAW:</div><div class='ctx'> 		bch-&gt;state = protocol;</div><div class='ctx'> 		hdlc-&gt;ctrl.sr.cmd  = HDLC_CMD_XRS | HDLC_CMD_RRS;</div><div class='del'>-		hdlc-&gt;ctrl.sr.mode = HDLC_MODE_TRANS;</div><div class='add'>+		hdlc-&gt;ctrl.sr.mode = mode | HDLC_MODE_TRANS;</div><div class='ctx'> 		write_ctrl(bch, 5);</div><div class='ctx'> 		hdlc-&gt;ctrl.sr.cmd = HDLC_CMD_XRS;</div><div class='ctx'> 		write_ctrl(bch, 1);</div><div class='hunk'>@@ -377,7 +384,7 @@ modehdlc(struct bchannel *bch, int protocol)</div><div class='ctx'> 	case ISDN_P_B_HDLC:</div><div class='ctx'> 		bch-&gt;state = protocol;</div><div class='ctx'> 		hdlc-&gt;ctrl.sr.cmd  = HDLC_CMD_XRS | HDLC_CMD_RRS;</div><div class='del'>-		hdlc-&gt;ctrl.sr.mode = HDLC_MODE_ITF_FLG;</div><div class='add'>+		hdlc-&gt;ctrl.sr.mode = mode | HDLC_MODE_ITF_FLG;</div><div class='ctx'> 		write_ctrl(bch, 5);</div><div class='ctx'> 		hdlc-&gt;ctrl.sr.cmd = HDLC_CMD_XRS;</div><div class='ctx'> 		write_ctrl(bch, 1);</div><div class='hunk'>@@ -397,39 +404,40 @@ hdlc_empty_fifo(struct bchannel *bch, int count)</div><div class='ctx'> 	u32 *ptr;</div><div class='ctx'> 	u8 *p;</div><div class='ctx'> 	u32  val, addr;</div><div class='del'>-	int cnt = 0;</div><div class='add'>+	int cnt;</div><div class='ctx'> 	struct fritzcard *fc = bch-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: %s %d\n", fc-&gt;name, __func__, count);</div><div class='del'>-	if (!bch-&gt;rx_skb) {</div><div class='del'>-		bch-&gt;rx_skb = mI_alloc_skb(bch-&gt;maxlen, GFP_ATOMIC);</div><div class='del'>-		if (!bch-&gt;rx_skb) {</div><div class='del'>-			pr_info("%s: B receive out of memory\n",</div><div class='del'>-				fc-&gt;name);</div><div class='add'>+	if (test_bit(FLG_RX_OFF, &amp;bch-&gt;Flags)) {</div><div class='add'>+		p = NULL;</div><div class='add'>+		bch-&gt;dropcnt += count;</div><div class='add'>+	} else {</div><div class='add'>+		cnt = bchannel_get_rxbuf(bch, count);</div><div class='add'>+		if (cnt &lt; 0) {</div><div class='add'>+			pr_warning("%s.B%d: No bufferspace for %d bytes\n",</div><div class='add'>+				   fc-&gt;name, bch-&gt;nr, count);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='add'>+		p = skb_put(bch-&gt;rx_skb, count);</div><div class='ctx'> 	}</div><div class='del'>-	if ((bch-&gt;rx_skb-&gt;len + count) &gt; bch-&gt;maxlen) {</div><div class='del'>-		pr_debug("%s: overrun %d\n", fc-&gt;name,</div><div class='del'>-			 bch-&gt;rx_skb-&gt;len + count);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	p = skb_put(bch-&gt;rx_skb, count);</div><div class='ctx'> 	ptr = (u32 *)p;</div><div class='del'>-	if (AVM_FRITZ_PCIV2 == fc-&gt;type)</div><div class='add'>+	if (fc-&gt;type == AVM_FRITZ_PCIV2)</div><div class='ctx'> 		addr = fc-&gt;addr + (bch-&gt;nr == 2 ?</div><div class='ctx'> 				   AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1);</div><div class='ctx'> 	else {</div><div class='ctx'> 		addr = fc-&gt;addr + CHIP_WINDOW;</div><div class='ctx'> 		outl(bch-&gt;nr == 2 ? AVM_HDLC_2 : AVM_HDLC_1, fc-&gt;addr);</div><div class='ctx'> 	}</div><div class='add'>+	cnt = 0;</div><div class='ctx'> 	while (cnt &lt; count) {</div><div class='ctx'> 		val = le32_to_cpu(inl(addr));</div><div class='del'>-		put_unaligned(val, ptr);</div><div class='del'>-		ptr++;</div><div class='add'>+		if (p) {</div><div class='add'>+			put_unaligned(val, ptr);</div><div class='add'>+			ptr++;</div><div class='add'>+		}</div><div class='ctx'> 		cnt += 4;</div><div class='ctx'> 	}</div><div class='del'>-	if (debug &amp; DEBUG_HW_BFIFO) {</div><div class='add'>+	if (p &amp;&amp; (debug &amp; DEBUG_HW_BFIFO)) {</div><div class='ctx'> 		snprintf(fc-&gt;log, LOG_SIZE, "B%1d-recv %s %d ",</div><div class='ctx'> 			 bch-&gt;nr, fc-&gt;name, count);</div><div class='ctx'> 		print_hex_dump_bytes(fc-&gt;log, DUMP_PREFIX_OFFSET, p, count);</div><div class='hunk'>@@ -441,30 +449,43 @@ hdlc_fill_fifo(struct bchannel *bch)</div><div class='ctx'> {</div><div class='ctx'> 	struct fritzcard *fc = bch-&gt;hw;</div><div class='ctx'> 	struct hdlc_hw *hdlc;</div><div class='del'>-	int count, cnt = 0;</div><div class='add'>+	int count, fs, cnt = 0, idx, fillempty = 0;</div><div class='ctx'> 	u8 *p;</div><div class='ctx'> 	u32 *ptr, val, addr;</div><div class='ctx'> </div><div class='del'>-	hdlc = &amp;fc-&gt;hdlc[(bch-&gt;nr - 1) &amp; 1];</div><div class='del'>-	if (!bch-&gt;tx_skb)</div><div class='del'>-		return;</div><div class='del'>-	count = bch-&gt;tx_skb-&gt;len - bch-&gt;tx_idx;</div><div class='del'>-	if (count &lt;= 0)</div><div class='del'>-		return;</div><div class='del'>-	p = bch-&gt;tx_skb-&gt;data + bch-&gt;tx_idx;</div><div class='add'>+	idx = (bch-&gt;nr - 1) &amp; 1;</div><div class='add'>+	hdlc = &amp;fc-&gt;hdlc[idx];</div><div class='add'>+	fs = (fc-&gt;type == AVM_FRITZ_PCIV2) ?</div><div class='add'>+		HDLC_FIFO_SIZE_V2 : HDLC_FIFO_SIZE_V1;</div><div class='add'>+	if (!bch-&gt;tx_skb) {</div><div class='add'>+		if (!test_bit(FLG_TX_EMPTY, &amp;bch-&gt;Flags))</div><div class='add'>+			return;</div><div class='add'>+		count = fs;</div><div class='add'>+		p = bch-&gt;fill;</div><div class='add'>+		fillempty = 1;</div><div class='add'>+	} else {</div><div class='add'>+		count = bch-&gt;tx_skb-&gt;len - bch-&gt;tx_idx;</div><div class='add'>+		if (count &lt;= 0)</div><div class='add'>+			return;</div><div class='add'>+		p = bch-&gt;tx_skb-&gt;data + bch-&gt;tx_idx;</div><div class='add'>+	}</div><div class='ctx'> 	hdlc-&gt;ctrl.sr.cmd &amp;= ~HDLC_CMD_XME;</div><div class='del'>-	if (count &gt; HDLC_FIFO_SIZE) {</div><div class='del'>-		count = HDLC_FIFO_SIZE;</div><div class='add'>+	if (count &gt; fs) {</div><div class='add'>+		count = fs;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (test_bit(FLG_HDLC, &amp;bch-&gt;Flags))</div><div class='ctx'> 			hdlc-&gt;ctrl.sr.cmd |= HDLC_CMD_XME;</div><div class='ctx'> 	}</div><div class='del'>-	pr_debug("%s: %s %d/%d/%d", fc-&gt;name, __func__, count,</div><div class='del'>-		 bch-&gt;tx_idx, bch-&gt;tx_skb-&gt;len);</div><div class='ctx'> 	ptr = (u32 *)p;</div><div class='del'>-	bch-&gt;tx_idx += count;</div><div class='del'>-	hdlc-&gt;ctrl.sr.xml = ((count == HDLC_FIFO_SIZE) ? 0 : count);</div><div class='del'>-	if (AVM_FRITZ_PCIV2 == fc-&gt;type) {</div><div class='add'>+	if (fillempty) {</div><div class='add'>+		pr_debug("%s.B%d: %d/%d/%d", fc-&gt;name, bch-&gt;nr, count,</div><div class='add'>+			 bch-&gt;tx_idx, bch-&gt;tx_skb-&gt;len);</div><div class='add'>+		bch-&gt;tx_idx += count;</div><div class='add'>+	} else {</div><div class='add'>+		pr_debug("%s.B%d: fillempty %d\n", fc-&gt;name, bch-&gt;nr, count);</div><div class='add'>+	}</div><div class='add'>+	hdlc-&gt;ctrl.sr.xml = ((count == fs) ? 0 : count);</div><div class='add'>+	if (fc-&gt;type == AVM_FRITZ_PCIV2) {</div><div class='ctx'> 		__write_ctrl_pciv2(fc, hdlc, bch-&gt;nr);</div><div class='ctx'> 		addr = fc-&gt;addr + (bch-&gt;nr == 2 ?</div><div class='ctx'> 				   AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1);</div><div class='hunk'>@@ -472,13 +493,21 @@ hdlc_fill_fifo(struct bchannel *bch)</div><div class='ctx'> 		__write_ctrl_pci(fc, hdlc, bch-&gt;nr);</div><div class='ctx'> 		addr = fc-&gt;addr + CHIP_WINDOW;</div><div class='ctx'> 	}</div><div class='del'>-	while (cnt &lt; count) {</div><div class='del'>-		val = get_unaligned(ptr);</div><div class='del'>-		outl(cpu_to_le32(val), addr);</div><div class='del'>-		ptr++;</div><div class='del'>-		cnt += 4;</div><div class='add'>+	if (fillempty) {</div><div class='add'>+		while (cnt &lt; count) {</div><div class='add'>+			/* all bytes the same - no worry about endian */</div><div class='add'>+			outl(*ptr, addr);</div><div class='add'>+			cnt += 4;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		while (cnt &lt; count) {</div><div class='add'>+			val = get_unaligned(ptr);</div><div class='add'>+			outl(cpu_to_le32(val), addr);</div><div class='add'>+			ptr++;</div><div class='add'>+			cnt += 4;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	if (debug &amp; DEBUG_HW_BFIFO) {</div><div class='add'>+	if ((debug &amp; DEBUG_HW_BFIFO) &amp;&amp; !fillempty) {</div><div class='ctx'> 		snprintf(fc-&gt;log, LOG_SIZE, "B%1d-send %s %d ",</div><div class='ctx'> 			 bch-&gt;nr, fc-&gt;name, count);</div><div class='ctx'> 		print_hex_dump_bytes(fc-&gt;log, DUMP_PREFIX_OFFSET, p, count);</div><div class='hunk'>@@ -488,17 +517,17 @@ hdlc_fill_fifo(struct bchannel *bch)</div><div class='ctx'> static void</div><div class='ctx'> HDLC_irq_xpr(struct bchannel *bch)</div><div class='ctx'> {</div><div class='del'>-	if (bch-&gt;tx_skb &amp;&amp; bch-&gt;tx_idx &lt; bch-&gt;tx_skb-&gt;len)</div><div class='add'>+	if (bch-&gt;tx_skb &amp;&amp; bch-&gt;tx_idx &lt; bch-&gt;tx_skb-&gt;len) {</div><div class='ctx'> 		hdlc_fill_fifo(bch);</div><div class='del'>-	else {</div><div class='del'>-		if (bch-&gt;tx_skb) {</div><div class='del'>-			/* send confirm, on trans, free on hdlc. */</div><div class='del'>-			if (test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags))</div><div class='del'>-				confirm_Bsend(bch);</div><div class='add'>+	} else {</div><div class='add'>+		if (bch-&gt;tx_skb)</div><div class='ctx'> 			dev_kfree_skb(bch-&gt;tx_skb);</div><div class='del'>-		}</div><div class='del'>-		if (get_next_bframe(bch))</div><div class='add'>+		if (get_next_bframe(bch)) {</div><div class='ctx'> 			hdlc_fill_fifo(bch);</div><div class='add'>+			test_and_clear_bit(FLG_TX_EMPTY, &amp;bch-&gt;Flags);</div><div class='add'>+		} else if (test_bit(FLG_TX_EMPTY, &amp;bch-&gt;Flags)) {</div><div class='add'>+			hdlc_fill_fifo(bch);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -506,13 +535,23 @@ static void</div><div class='ctx'> HDLC_irq(struct bchannel *bch, u32 stat)</div><div class='ctx'> {</div><div class='ctx'> 	struct fritzcard *fc = bch-&gt;hw;</div><div class='del'>-	int		len;</div><div class='add'>+	int		len, fs;</div><div class='add'>+	u32		rmlMask;</div><div class='ctx'> 	struct hdlc_hw	*hdlc;</div><div class='ctx'> </div><div class='ctx'> 	hdlc = &amp;fc-&gt;hdlc[(bch-&gt;nr - 1) &amp; 1];</div><div class='ctx'> 	pr_debug("%s: ch%d stat %#x\n", fc-&gt;name, bch-&gt;nr, stat);</div><div class='add'>+	if (fc-&gt;type == AVM_FRITZ_PCIV2) {</div><div class='add'>+		rmlMask = HDLC_STAT_RML_MASK_V2;</div><div class='add'>+		fs = HDLC_FIFO_SIZE_V2;</div><div class='add'>+	} else {</div><div class='add'>+		rmlMask = HDLC_STAT_RML_MASK_V1;</div><div class='add'>+		fs = HDLC_FIFO_SIZE_V1;</div><div class='add'>+	}</div><div class='ctx'> 	if (stat &amp; HDLC_INT_RPR) {</div><div class='ctx'> 		if (stat &amp; HDLC_STAT_RDO) {</div><div class='add'>+			pr_warning("%s: ch%d stat %x RDO\n",</div><div class='add'>+				   fc-&gt;name, bch-&gt;nr, stat);</div><div class='ctx'> 			hdlc-&gt;ctrl.sr.xml = 0;</div><div class='ctx'> 			hdlc-&gt;ctrl.sr.cmd |= HDLC_CMD_RRS;</div><div class='ctx'> 			write_ctrl(bch, 1);</div><div class='hunk'>@@ -521,21 +560,21 @@ HDLC_irq(struct bchannel *bch, u32 stat)</div><div class='ctx'> 			if (bch-&gt;rx_skb)</div><div class='ctx'> 				skb_trim(bch-&gt;rx_skb, 0);</div><div class='ctx'> 		} else {</div><div class='del'>-			len = (stat &amp; HDLC_STAT_RML_MASK) &gt;&gt; 8;</div><div class='add'>+			len = (stat &amp; rmlMask) &gt;&gt; 8;</div><div class='ctx'> 			if (!len)</div><div class='del'>-				len = 32;</div><div class='add'>+				len = fs;</div><div class='ctx'> 			hdlc_empty_fifo(bch, len);</div><div class='ctx'> 			if (!bch-&gt;rx_skb)</div><div class='ctx'> 				goto handle_tx;</div><div class='del'>-			if ((stat &amp; HDLC_STAT_RME) || test_bit(FLG_TRANSPARENT,</div><div class='del'>-							       &amp;bch-&gt;Flags)) {</div><div class='del'>-				if (((stat &amp; HDLC_STAT_CRCVFRRAB) ==</div><div class='del'>-				     HDLC_STAT_CRCVFR) ||</div><div class='del'>-				    test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags)) {</div><div class='del'>-					recv_Bchannel(bch, 0);</div><div class='add'>+			if (test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags)) {</div><div class='add'>+				recv_Bchannel(bch, 0, false);</div><div class='add'>+			} else if (stat &amp; HDLC_STAT_RME) {</div><div class='add'>+				if ((stat &amp; HDLC_STAT_CRCVFRRAB) ==</div><div class='add'>+				    HDLC_STAT_CRCVFR) {</div><div class='add'>+					recv_Bchannel(bch, 0, false);</div><div class='ctx'> 				} else {</div><div class='del'>-					pr_debug("%s: got invalid frame\n",</div><div class='del'>-						 fc-&gt;name);</div><div class='add'>+					pr_warning("%s: got invalid frame\n",</div><div class='add'>+						   fc-&gt;name);</div><div class='ctx'> 					skb_trim(bch-&gt;rx_skb, 0);</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='hunk'>@@ -547,16 +586,13 @@ handle_tx:</div><div class='ctx'> 		 * restart transmitting the whole frame on HDLC</div><div class='ctx'> 		 * in transparent mode we send the next data</div><div class='ctx'> 		 */</div><div class='del'>-		if (bch-&gt;tx_skb)</div><div class='del'>-			pr_debug("%s: ch%d XDU len(%d) idx(%d) Flags(%lx)\n",</div><div class='del'>-				 fc-&gt;name, bch-&gt;nr, bch-&gt;tx_skb-&gt;len,</div><div class='del'>-				 bch-&gt;tx_idx, bch-&gt;Flags);</div><div class='del'>-		else</div><div class='del'>-			pr_debug("%s: ch%d XDU no tx_skb Flags(%lx)\n",</div><div class='del'>-				 fc-&gt;name, bch-&gt;nr, bch-&gt;Flags);</div><div class='add'>+		pr_warning("%s: ch%d stat %x XDU %s\n", fc-&gt;name, bch-&gt;nr,</div><div class='add'>+			   stat, bch-&gt;tx_skb ? "tx_skb" : "no tx_skb");</div><div class='ctx'> 		if (bch-&gt;tx_skb &amp;&amp; bch-&gt;tx_skb-&gt;len) {</div><div class='ctx'> 			if (!test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags))</div><div class='ctx'> 				bch-&gt;tx_idx = 0;</div><div class='add'>+		} else if (test_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags)) {</div><div class='add'>+			test_and_set_bit(FLG_TX_EMPTY, &amp;bch-&gt;Flags);</div><div class='ctx'> 		}</div><div class='ctx'> 		hdlc-&gt;ctrl.sr.xml = 0;</div><div class='ctx'> 		hdlc-&gt;ctrl.sr.cmd |= HDLC_CMD_XRS;</div><div class='hunk'>@@ -659,22 +695,17 @@ avm_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 	struct fritzcard *fc = bch-&gt;hw;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> 	struct mISDNhead *hh = mISDN_HEAD_P(skb);</div><div class='del'>-	u32 id;</div><div class='del'>-	u_long flags;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	switch (hh-&gt;prim) {</div><div class='ctx'> 	case PH_DATA_REQ:</div><div class='ctx'> 		spin_lock_irqsave(&amp;fc-&gt;lock, flags);</div><div class='ctx'> 		ret = bchannel_senddata(bch, skb);</div><div class='ctx'> 		if (ret &gt; 0) { /* direct TX */</div><div class='del'>-			id = hh-&gt;id; /* skb can be freed */</div><div class='ctx'> 			hdlc_fill_fifo(bch);</div><div class='ctx'> 			ret = 0;</div><div class='del'>-			spin_unlock_irqrestore(&amp;fc-&gt;lock, flags);</div><div class='del'>-			if (!test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags))</div><div class='del'>-				queue_ch_frame(ch, PH_DATA_CNF, id, NULL);</div><div class='del'>-		} else</div><div class='del'>-			spin_unlock_irqrestore(&amp;fc-&gt;lock, flags);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;fc-&gt;lock, flags);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	case PH_ACTIVATE_REQ:</div><div class='ctx'> 		spin_lock_irqsave(&amp;fc-&gt;lock, flags);</div><div class='hunk'>@@ -783,7 +814,7 @@ init_card(struct fritzcard *fc)</div><div class='ctx'> 		inithdlc(fc);</div><div class='ctx'> 		enable_hwirq(fc);</div><div class='ctx'> 		/* RESET Receiver and Transmitter */</div><div class='del'>-		if (AVM_FRITZ_PCIV2 == fc-&gt;type) {</div><div class='add'>+		if (fc-&gt;type == AVM_FRITZ_PCIV2) {</div><div class='ctx'> 			WriteISAC_V2(fc, ISACX_MASK, 0);</div><div class='ctx'> 			WriteISAC_V2(fc, ISACX_CMDRD, 0x41);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -810,21 +841,7 @@ init_card(struct fritzcard *fc)</div><div class='ctx'> static int</div><div class='ctx'> channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct fritzcard *fc = bch-&gt;hw;</div><div class='del'>-</div><div class='del'>-	switch (cq-&gt;op) {</div><div class='del'>-	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = 0;</div><div class='del'>-		break;</div><div class='del'>-		/* Nothing implemented yet */</div><div class='del'>-	case MISDN_CTRL_FILL_EMPTY:</div><div class='del'>-	default:</div><div class='del'>-		pr_info("%s: %s unknown Op %x\n", fc-&gt;name, __func__, cq-&gt;op);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return mISDN_ctrl_bchannel(bch, cq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -839,14 +856,10 @@ avm_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)</div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case CLOSE_CHANNEL:</div><div class='ctx'> 		test_and_clear_bit(FLG_OPEN, &amp;bch-&gt;Flags);</div><div class='del'>-		if (test_bit(FLG_ACTIVE, &amp;bch-&gt;Flags)) {</div><div class='del'>-			spin_lock_irqsave(&amp;fc-&gt;lock, flags);</div><div class='del'>-			mISDN_freebchannel(bch);</div><div class='del'>-			test_and_clear_bit(FLG_TX_BUSY, &amp;bch-&gt;Flags);</div><div class='del'>-			test_and_clear_bit(FLG_ACTIVE, &amp;bch-&gt;Flags);</div><div class='del'>-			modehdlc(bch, ISDN_P_NONE);</div><div class='del'>-			spin_unlock_irqrestore(&amp;fc-&gt;lock, flags);</div><div class='del'>-		}</div><div class='add'>+		spin_lock_irqsave(&amp;fc-&gt;lock, flags);</div><div class='add'>+		mISDN_freebchannel(bch);</div><div class='add'>+		modehdlc(bch, ISDN_P_NONE);</div><div class='add'>+		spin_unlock_irqrestore(&amp;fc-&gt;lock, flags);</div><div class='ctx'> 		ch-&gt;protocol = ISDN_P_NONE;</div><div class='ctx'> 		ch-&gt;peer = NULL;</div><div class='ctx'> 		module_put(THIS_MODULE);</div><div class='hunk'>@@ -868,7 +881,7 @@ channel_ctrl(struct fritzcard  *fc, struct mISDN_ctrl_req *cq)</div><div class='ctx'> </div><div class='ctx'> 	switch (cq-&gt;op) {</div><div class='ctx'> 	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = MISDN_CTRL_LOOP;</div><div class='add'>+		cq-&gt;op = MISDN_CTRL_LOOP | MISDN_CTRL_L1_TIMER3;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MISDN_CTRL_LOOP:</div><div class='ctx'> 		/* cq-&gt;channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */</div><div class='hunk'>@@ -878,6 +891,9 @@ channel_ctrl(struct fritzcard  *fc, struct mISDN_ctrl_req *cq)</div><div class='ctx'> 		}</div><div class='ctx'> 		ret = fc-&gt;isac.ctrl(&amp;fc-&gt;isac, HW_TESTLOOP, cq-&gt;channel);</div><div class='ctx'> 		break;</div><div class='add'>+	case MISDN_CTRL_L1_TIMER3:</div><div class='add'>+		ret = fc-&gt;isac.ctrl(&amp;fc-&gt;isac, HW_TIMER3_VALUE, cq-&gt;p1);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_info("%s: %s unknown Op %x\n", fc-&gt;name, __func__, cq-&gt;op);</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -898,7 +914,6 @@ open_bchannel(struct fritzcard *fc, struct channel_req *rq)</div><div class='ctx'> 	bch = &amp;fc-&gt;bch[rq-&gt;adr.channel - 1];</div><div class='ctx'> 	if (test_and_set_bit(FLG_OPEN, &amp;bch-&gt;Flags))</div><div class='ctx'> 		return -EBUSY; /* b-channel can be only open once */</div><div class='del'>-	test_and_clear_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags);</div><div class='ctx'> 	bch-&gt;ch.protocol = rq-&gt;protocol;</div><div class='ctx'> 	rq-&gt;ch = &amp;bch-&gt;ch;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1021,6 +1036,7 @@ static int __devinit</div><div class='ctx'> setup_instance(struct fritzcard *card)</div><div class='ctx'> {</div><div class='ctx'> 	int i, err;</div><div class='add'>+	unsigned short minsize;</div><div class='ctx'> 	u_long flags;</div><div class='ctx'> </div><div class='ctx'> 	snprintf(card-&gt;name, MISDN_MAX_IDLEN - 1, "AVM.%d", AVM_cnt + 1);</div><div class='hunk'>@@ -1040,7 +1056,11 @@ setup_instance(struct fritzcard *card)</div><div class='ctx'> 	for (i = 0; i &lt; 2; i++) {</div><div class='ctx'> 		card-&gt;bch[i].nr = i + 1;</div><div class='ctx'> 		set_channelmap(i + 1, card-&gt;isac.dch.dev.channelmap);</div><div class='del'>-		mISDN_initbchannel(&amp;card-&gt;bch[i], MAX_DATA_MEM);</div><div class='add'>+		if (AVM_FRITZ_PCIV2 == card-&gt;type)</div><div class='add'>+			minsize = HDLC_FIFO_SIZE_V2;</div><div class='add'>+		else</div><div class='add'>+			minsize = HDLC_FIFO_SIZE_V1;</div><div class='add'>+		mISDN_initbchannel(&amp;card-&gt;bch[i], MAX_DATA_MEM, minsize);</div><div class='ctx'> 		card-&gt;bch[i].hw = card;</div><div class='ctx'> 		card-&gt;bch[i].ch.send = avm_l2l1B;</div><div class='ctx'> 		card-&gt;bch[i].ch.ctrl = avm_bctrl;</div><div class='head'>diff --git a/drivers/isdn/hardware/mISDN/hfc_multi.h b/drivers/isdn/hardware/mISDN/hfc_multi.h<br/>index b0588acbb47d..c601f880141e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/hfc_multi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/mISDN/hfc_multi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/hfc_multi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/hfc_multi.h</a></div><div class='hunk'>@@ -205,18 +205,22 @@ struct hfc_multi {</div><div class='ctx'> </div><div class='ctx'> 	u_int		slots;	/* number of PCM slots */</div><div class='ctx'> 	u_int		leds;	/* type of leds */</div><div class='del'>-	u_int		ledcount; /* used to animate leds */</div><div class='ctx'> 	u_long		ledstate; /* save last state of leds */</div><div class='ctx'> 	int		opticalsupport; /* has the e1 board */</div><div class='ctx'> 					/* an optical Interface */</div><div class='del'>-	int		dslot;	/* channel # of d-channel (E1) default 16 */</div><div class='add'>+</div><div class='add'>+	u_int		bmask[32]; /* bitmask of bchannels for port */</div><div class='add'>+	u_char		dnum[32]; /* array of used dchannel numbers for port */</div><div class='add'>+	u_char		created[32]; /* what port is created */</div><div class='add'>+	u_int		activity_tx; /* if there is data TX / RX */</div><div class='add'>+	u_int		activity_rx; /* bitmask according to port number */</div><div class='add'>+				     /* (will be cleared after */</div><div class='add'>+				     /* showing led-states) */</div><div class='add'>+	u_int		flash[8]; /* counter for flashing 8 leds on activity */</div><div class='ctx'> </div><div class='ctx'> 	u_long		wdcount;	/* every 500 ms we need to */</div><div class='ctx'> 					/* send the watchdog a signal */</div><div class='ctx'> 	u_char		wdbyte; /* watchdog toggle byte */</div><div class='del'>-	u_int		activity[8];	/* if there is any action on this */</div><div class='del'>-					/* port (will be cleared after */</div><div class='del'>-					/* showing led-states) */</div><div class='ctx'> 	int		e1_state; /* keep track of last state */</div><div class='ctx'> 	int		e1_getclock; /* if sync is retrieved from interface */</div><div class='ctx'> 	int		syncronized; /* keep track of existing sync interface */</div><div class='hunk'>@@ -233,7 +237,6 @@ struct hfc_multi {</div><div class='ctx'> 	 * the bch-&gt;channel is equvalent to the hfc-channel</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct hfc_chan	chan[32];</div><div class='del'>-	u_char		created[8]; /* what port is created */</div><div class='ctx'> 	signed char	slot_owner[256]; /* owner channel of slot */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/isdn/hardware/mISDN/hfcmulti.c b/drivers/isdn/hardware/mISDN/hfcmulti.c<br/>index 033223180b55..5e402cf2e795 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/hfcmulti.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/mISDN/hfcmulti.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/hfcmulti.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/hfcmulti.c</a></div><div class='hunk'>@@ -103,14 +103,26 @@</div><div class='ctx'>  *	Omit this value, if all cards are interconnected or none is connected.</div><div class='ctx'>  *	If unsure, don't give this parameter.</div><div class='ctx'>  *</div><div class='del'>- * dslot:</div><div class='del'>- *	NOTE: only one dslot value must be given for every card.</div><div class='del'>- *	Also this value must be given for non-E1 cards. If omitted, the E1</div><div class='del'>- *	card has D-channel on time slot 16, which is default.</div><div class='del'>- *	If 1..15 or 17..31, an alternate time slot is used for D-channel.</div><div class='del'>- *	In this case, the application must be able to handle this.</div><div class='del'>- *	If -1 is given, the D-channel is disabled and all 31 slots can be used</div><div class='del'>- *	for B-channel. (only for specific applications)</div><div class='add'>+ * dmask and bmask:</div><div class='add'>+ *	NOTE: One dmask value must be given for every HFC-E1 card.</div><div class='add'>+ *	If omitted, the E1 card has D-channel on time slot 16, which is default.</div><div class='add'>+ *	dmask is a 32 bit mask. The bit must be set for an alternate time slot.</div><div class='add'>+ *	If multiple bits are set, multiple virtual card fragments are created.</div><div class='add'>+ *	For each bit set, a bmask value must be given. Each bit on the bmask</div><div class='add'>+ *	value stands for a B-channel. The bmask may not overlap with dmask or</div><div class='add'>+ *	with other bmask values for that card.</div><div class='add'>+ *	Example: dmask=0x00020002 bmask=0x0000fffc,0xfffc0000</div><div class='add'>+ *		This will create one fragment with D-channel on slot 1 with</div><div class='add'>+ *		B-channels on slots 2..15, and a second fragment with D-channel</div><div class='add'>+ *		on slot 17 with B-channels on slot 18..31. Slot 16 is unused.</div><div class='add'>+ *	If bit 0 is set (dmask=0x00000001) the D-channel is on slot 0 and will</div><div class='add'>+ *	not function.</div><div class='add'>+ *	Example: dmask=0x00000001 bmask=0xfffffffe</div><div class='add'>+ *		This will create a port with all 31 usable timeslots as</div><div class='add'>+ *		B-channels.</div><div class='add'>+ *	If no bits are set on bmask, no B-channel is created for that fragment.</div><div class='add'>+ *	Example: dmask=0xfffffffe bmask=0,0,0,0.... (31 0-values for bmask)</div><div class='add'>+ *		This will create 31 ports with one D-channel only.</div><div class='ctx'>  *	If you don't know how to use it, you don't need it!</div><div class='ctx'>  *</div><div class='ctx'>  * iomode:</div><div class='hunk'>@@ -172,6 +184,7 @@</div><div class='ctx'> </div><div class='ctx'> #define	MAX_CARDS	8</div><div class='ctx'> #define	MAX_PORTS	(8 * MAX_CARDS)</div><div class='add'>+#define	MAX_FRAGS	(32 * MAX_CARDS)</div><div class='ctx'> </div><div class='ctx'> static LIST_HEAD(HFClist);</div><div class='ctx'> static spinlock_t HFClock; /* global hfc list lock */</div><div class='hunk'>@@ -203,7 +216,8 @@ static int nt_t1_count[] = { 3840, 1920, 960, 480, 240, 120, 60, 30  };</div><div class='ctx'> </div><div class='ctx'> static uint	type[MAX_CARDS];</div><div class='ctx'> static int	pcm[MAX_CARDS];</div><div class='del'>-static int	dslot[MAX_CARDS];</div><div class='add'>+static uint	dmask[MAX_CARDS];</div><div class='add'>+static uint	bmask[MAX_FRAGS];</div><div class='ctx'> static uint	iomode[MAX_CARDS];</div><div class='ctx'> static uint	port[MAX_PORTS];</div><div class='ctx'> static uint	debug;</div><div class='hunk'>@@ -218,7 +232,7 @@ static uint	clockdelay_nt = CLKDEL_NT;</div><div class='ctx'> #define HWID_MINIP16	3</div><div class='ctx'> static uint	hwid = HWID_NONE;</div><div class='ctx'> </div><div class='del'>-static int	HFC_cnt, Port_cnt, PCM_cnt = 99;</div><div class='add'>+static int	HFC_cnt, E1_cnt, bmask_cnt, Port_cnt, PCM_cnt = 99;</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Andreas Eversberg");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='hunk'>@@ -231,7 +245,8 @@ module_param(clockdelay_te, uint, S_IRUGO | S_IWUSR);</div><div class='ctx'> module_param(clockdelay_nt, uint, S_IRUGO | S_IWUSR);</div><div class='ctx'> module_param_array(type, uint, NULL, S_IRUGO | S_IWUSR);</div><div class='ctx'> module_param_array(pcm, int, NULL, S_IRUGO | S_IWUSR);</div><div class='del'>-module_param_array(dslot, int, NULL, S_IRUGO | S_IWUSR);</div><div class='add'>+module_param_array(dmask, uint, NULL, S_IRUGO | S_IWUSR);</div><div class='add'>+module_param_array(bmask, uint, NULL, S_IRUGO | S_IWUSR);</div><div class='ctx'> module_param_array(iomode, uint, NULL, S_IRUGO | S_IWUSR);</div><div class='ctx'> module_param_array(port, uint, NULL, S_IRUGO | S_IWUSR);</div><div class='ctx'> module_param(hwid, uint, S_IRUGO | S_IWUSR); /* The hardware ID */</div><div class='hunk'>@@ -1156,7 +1171,7 @@ init_chip(struct hfc_multi *hc)</div><div class='ctx'> 	hc-&gt;DTMFbase = 0x1000;</div><div class='ctx'> 	if (test_bit(HFC_CHIP_EXRAM_128, &amp;hc-&gt;chip)) {</div><div class='ctx'> 		if (debug &amp; DEBUG_HFCMULTI_INIT)</div><div class='del'>-			printk(KERN_DEBUG "%s: changing to 128K extenal RAM\n",</div><div class='add'>+			printk(KERN_DEBUG "%s: changing to 128K external RAM\n",</div><div class='ctx'> 			       __func__);</div><div class='ctx'> 		hc-&gt;hw.r_ctrl |= V_EXT_RAM;</div><div class='ctx'> 		hc-&gt;hw.r_ram_sz = 1;</div><div class='hunk'>@@ -1167,7 +1182,7 @@ init_chip(struct hfc_multi *hc)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (test_bit(HFC_CHIP_EXRAM_512, &amp;hc-&gt;chip)) {</div><div class='ctx'> 		if (debug &amp; DEBUG_HFCMULTI_INIT)</div><div class='del'>-			printk(KERN_DEBUG "%s: changing to 512K extenal RAM\n",</div><div class='add'>+			printk(KERN_DEBUG "%s: changing to 512K external RAM\n",</div><div class='ctx'> 			       __func__);</div><div class='ctx'> 		hc-&gt;hw.r_ctrl |= V_EXT_RAM;</div><div class='ctx'> 		hc-&gt;hw.r_ram_sz = 2;</div><div class='hunk'>@@ -1607,40 +1622,46 @@ hfcmulti_leds(struct hfc_multi *hc)</div><div class='ctx'> 	struct dchannel *dch;</div><div class='ctx'> 	int led[4];</div><div class='ctx'> </div><div class='del'>-	hc-&gt;ledcount += poll;</div><div class='del'>-	if (hc-&gt;ledcount &gt; 4096) {</div><div class='del'>-		hc-&gt;ledcount -= 4096;</div><div class='del'>-		hc-&gt;ledstate = 0xAFFEAFFE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	switch (hc-&gt;leds) {</div><div class='ctx'> 	case 1: /* HFC-E1 OEM */</div><div class='del'>-		/* 2 red blinking: NT mode deactivate</div><div class='del'>-		 * 2 red steady:   TE mode deactivate</div><div class='del'>-		 * left green:     L1 active</div><div class='del'>-		 * left red:       frame sync, but no L1</div><div class='del'>-		 * right green:    L2 active</div><div class='add'>+		/* 2 red steady:       LOS</div><div class='add'>+		 * 1 red steady:       L1 not active</div><div class='add'>+		 * 2 green steady:     L1 active</div><div class='add'>+		 * 1st green flashing: activity on TX</div><div class='add'>+		 * 2nd green flashing: activity on RX</div><div class='ctx'> 		 */</div><div class='del'>-		if (hc-&gt;chan[hc-&gt;dslot].sync != 2) { /* no frame sync */</div><div class='del'>-			if (hc-&gt;chan[hc-&gt;dslot].dch-&gt;dev.D.protocol</div><div class='del'>-			    != ISDN_P_NT_E1) {</div><div class='del'>-				led[0] = 1;</div><div class='add'>+		led[0] = 0;</div><div class='add'>+		led[1] = 0;</div><div class='add'>+		led[2] = 0;</div><div class='add'>+		led[3] = 0;</div><div class='add'>+		dch = hc-&gt;chan[hc-&gt;dnum[0]].dch;</div><div class='add'>+		if (dch) {</div><div class='add'>+			if (hc-&gt;chan[hc-&gt;dnum[0]].los)</div><div class='ctx'> 				led[1] = 1;</div><div class='del'>-			} else if (hc-&gt;ledcount &gt;&gt; 11) {</div><div class='add'>+			if (hc-&gt;e1_state != 1) {</div><div class='ctx'> 				led[0] = 1;</div><div class='del'>-				led[1] = 1;</div><div class='add'>+				hc-&gt;flash[2] = 0;</div><div class='add'>+				hc-&gt;flash[3] = 0;</div><div class='ctx'> 			} else {</div><div class='del'>-				led[0] = 0;</div><div class='del'>-				led[1] = 0;</div><div class='add'>+				led[2] = 1;</div><div class='add'>+				led[3] = 1;</div><div class='add'>+				if (!hc-&gt;flash[2] &amp;&amp; hc-&gt;activity_tx)</div><div class='add'>+					hc-&gt;flash[2] = poll;</div><div class='add'>+				if (!hc-&gt;flash[3] &amp;&amp; hc-&gt;activity_rx)</div><div class='add'>+					hc-&gt;flash[3] = poll;</div><div class='add'>+				if (hc-&gt;flash[2] &amp;&amp; hc-&gt;flash[2] &lt; 1024)</div><div class='add'>+					led[2] = 0;</div><div class='add'>+				if (hc-&gt;flash[3] &amp;&amp; hc-&gt;flash[3] &lt; 1024)</div><div class='add'>+					led[3] = 0;</div><div class='add'>+				if (hc-&gt;flash[2] &gt;= 2048)</div><div class='add'>+					hc-&gt;flash[2] = 0;</div><div class='add'>+				if (hc-&gt;flash[3] &gt;= 2048)</div><div class='add'>+					hc-&gt;flash[3] = 0;</div><div class='add'>+				if (hc-&gt;flash[2])</div><div class='add'>+					hc-&gt;flash[2] += poll;</div><div class='add'>+				if (hc-&gt;flash[3])</div><div class='add'>+					hc-&gt;flash[3] += poll;</div><div class='ctx'> 			}</div><div class='del'>-			led[2] = 0;</div><div class='del'>-			led[3] = 0;</div><div class='del'>-		} else { /* with frame sync */</div><div class='del'>-			/* TODO make it work */</div><div class='del'>-			led[0] = 0;</div><div class='del'>-			led[1] = 0;</div><div class='del'>-			led[2] = 0;</div><div class='del'>-			led[3] = 1;</div><div class='ctx'> 		}</div><div class='ctx'> 		leds = (led[0] | (led[1]&lt;&lt;2) | (led[2]&lt;&lt;1) | (led[3]&lt;&lt;3))^0xF;</div><div class='ctx'> 		/* leds are inverted */</div><div class='hunk'>@@ -1651,9 +1672,9 @@ hfcmulti_leds(struct hfc_multi *hc)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case 2: /* HFC-4S OEM */</div><div class='del'>-		/* red blinking = PH_DEACTIVATE NT Mode</div><div class='del'>-		 * red steady   = PH_DEACTIVATE TE Mode</div><div class='del'>-		 * green steady = PH_ACTIVATE</div><div class='add'>+		/* red steady:     PH_DEACTIVATE</div><div class='add'>+		 * green steady:   PH_ACTIVATE</div><div class='add'>+		 * green flashing: activity on TX</div><div class='ctx'> 		 */</div><div class='ctx'> 		for (i = 0; i &lt; 4; i++) {</div><div class='ctx'> 			state = 0;</div><div class='hunk'>@@ -1669,17 +1690,20 @@ hfcmulti_leds(struct hfc_multi *hc)</div><div class='ctx'> 			if (state) {</div><div class='ctx'> 				if (state == active) {</div><div class='ctx'> 					led[i] = 1; /* led green */</div><div class='del'>-				} else</div><div class='del'>-					if (dch-&gt;dev.D.protocol == ISDN_P_TE_S0)</div><div class='del'>-						/* TE mode: led red */</div><div class='del'>-						led[i] = 2;</div><div class='del'>-					else</div><div class='del'>-						if (hc-&gt;ledcount &gt;&gt; 11)</div><div class='del'>-							/* led red */</div><div class='del'>-							led[i] = 2;</div><div class='del'>-						else</div><div class='del'>-							/* led off */</div><div class='del'>-							led[i] = 0;</div><div class='add'>+					hc-&gt;activity_tx |= hc-&gt;activity_rx;</div><div class='add'>+					if (!hc-&gt;flash[i] &amp;&amp;</div><div class='add'>+						(hc-&gt;activity_tx &amp; (1 &lt;&lt; i)))</div><div class='add'>+							hc-&gt;flash[i] = poll;</div><div class='add'>+					if (hc-&gt;flash[i] &amp;&amp; hc-&gt;flash[i] &lt; 1024)</div><div class='add'>+						led[i] = 0; /* led off */</div><div class='add'>+					if (hc-&gt;flash[i] &gt;= 2048)</div><div class='add'>+						hc-&gt;flash[i] = 0;</div><div class='add'>+					if (hc-&gt;flash[i])</div><div class='add'>+						hc-&gt;flash[i] += poll;</div><div class='add'>+				} else {</div><div class='add'>+					led[i] = 2; /* led red */</div><div class='add'>+					hc-&gt;flash[i] = 0;</div><div class='add'>+				}</div><div class='ctx'> 			} else</div><div class='ctx'> 				led[i] = 0; /* led off */</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1712,9 +1736,9 @@ hfcmulti_leds(struct hfc_multi *hc)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case 3: /* HFC 1S/2S Beronet */</div><div class='del'>-		/* red blinking = PH_DEACTIVATE NT Mode</div><div class='del'>-		 * red steady   = PH_DEACTIVATE TE Mode</div><div class='del'>-		 * green steady = PH_ACTIVATE</div><div class='add'>+		/* red steady:     PH_DEACTIVATE</div><div class='add'>+		 * green steady:   PH_ACTIVATE</div><div class='add'>+		 * green flashing: activity on TX</div><div class='ctx'> 		 */</div><div class='ctx'> 		for (i = 0; i &lt; 2; i++) {</div><div class='ctx'> 			state = 0;</div><div class='hunk'>@@ -1730,22 +1754,23 @@ hfcmulti_leds(struct hfc_multi *hc)</div><div class='ctx'> 			if (state) {</div><div class='ctx'> 				if (state == active) {</div><div class='ctx'> 					led[i] = 1; /* led green */</div><div class='del'>-				} else</div><div class='del'>-					if (dch-&gt;dev.D.protocol == ISDN_P_TE_S0)</div><div class='del'>-						/* TE mode: led red */</div><div class='del'>-						led[i] = 2;</div><div class='del'>-					else</div><div class='del'>-						if (hc-&gt;ledcount &gt;&gt; 11)</div><div class='del'>-							/* led red */</div><div class='del'>-							led[i] = 2;</div><div class='del'>-						else</div><div class='del'>-							/* led off */</div><div class='del'>-							led[i] = 0;</div><div class='add'>+					hc-&gt;activity_tx |= hc-&gt;activity_rx;</div><div class='add'>+					if (!hc-&gt;flash[i] &amp;&amp;</div><div class='add'>+						(hc-&gt;activity_tx &amp; (1 &lt;&lt; i)))</div><div class='add'>+							hc-&gt;flash[i] = poll;</div><div class='add'>+					if (hc-&gt;flash[i] &lt; 1024)</div><div class='add'>+						led[i] = 0; /* led off */</div><div class='add'>+					if (hc-&gt;flash[i] &gt;= 2048)</div><div class='add'>+						hc-&gt;flash[i] = 0;</div><div class='add'>+					if (hc-&gt;flash[i])</div><div class='add'>+						hc-&gt;flash[i] += poll;</div><div class='add'>+				} else {</div><div class='add'>+					led[i] = 2; /* led red */</div><div class='add'>+					hc-&gt;flash[i] = 0;</div><div class='add'>+				}</div><div class='ctx'> 			} else</div><div class='ctx'> 				led[i] = 0; /* led off */</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> 		leds = (led[0] &gt; 0) | ((led[1] &gt; 0) &lt;&lt; 1) | ((led[0]&amp;1) &lt;&lt; 2)</div><div class='ctx'> 			| ((led[1]&amp;1) &lt;&lt; 3);</div><div class='ctx'> 		if (leds != (int)hc-&gt;ledstate) {</div><div class='hunk'>@@ -1757,8 +1782,11 @@ hfcmulti_leds(struct hfc_multi *hc)</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 8: /* HFC 8S+ Beronet */</div><div class='del'>-		lled = 0;</div><div class='del'>-</div><div class='add'>+		/* off:      PH_DEACTIVATE</div><div class='add'>+		 * steady:   PH_ACTIVATE</div><div class='add'>+		 * flashing: activity on TX</div><div class='add'>+		 */</div><div class='add'>+		lled = 0xff; /* leds off */</div><div class='ctx'> 		for (i = 0; i &lt; 8; i++) {</div><div class='ctx'> 			state = 0;</div><div class='ctx'> 			active = -1;</div><div class='hunk'>@@ -1772,14 +1800,20 @@ hfcmulti_leds(struct hfc_multi *hc)</div><div class='ctx'> 			}</div><div class='ctx'> 			if (state) {</div><div class='ctx'> 				if (state == active) {</div><div class='del'>-					lled |= 0 &lt;&lt; i;</div><div class='add'>+					lled &amp;= ~(1 &lt;&lt; i); /* led on */</div><div class='add'>+					hc-&gt;activity_tx |= hc-&gt;activity_rx;</div><div class='add'>+					if (!hc-&gt;flash[i] &amp;&amp;</div><div class='add'>+						(hc-&gt;activity_tx &amp; (1 &lt;&lt; i)))</div><div class='add'>+							hc-&gt;flash[i] = poll;</div><div class='add'>+					if (hc-&gt;flash[i] &lt; 1024)</div><div class='add'>+						lled |= 1 &lt;&lt; i; /* led off */</div><div class='add'>+					if (hc-&gt;flash[i] &gt;= 2048)</div><div class='add'>+						hc-&gt;flash[i] = 0;</div><div class='add'>+					if (hc-&gt;flash[i])</div><div class='add'>+						hc-&gt;flash[i] += poll;</div><div class='ctx'> 				} else</div><div class='del'>-					if (hc-&gt;ledcount &gt;&gt; 11)</div><div class='del'>-						lled |= 0 &lt;&lt; i;</div><div class='del'>-					else</div><div class='del'>-						lled |= 1 &lt;&lt; i;</div><div class='del'>-			} else</div><div class='del'>-				lled |= 1 &lt;&lt; i;</div><div class='add'>+					hc-&gt;flash[i] = 0;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		leddw = lled &lt;&lt; 24 | lled &lt;&lt; 16 | lled &lt;&lt; 8 | lled;</div><div class='ctx'> 		if (leddw != hc-&gt;ledstate) {</div><div class='hunk'>@@ -1794,6 +1828,8 @@ hfcmulti_leds(struct hfc_multi *hc)</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	hc-&gt;activity_tx = 0;</div><div class='add'>+	hc-&gt;activity_rx = 0;</div><div class='ctx'> }</div><div class='ctx'> /*</div><div class='ctx'>  * read dtmf coefficients</div><div class='hunk'>@@ -2093,7 +2129,8 @@ next_frame:</div><div class='ctx'> 	*txpending = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* show activity */</div><div class='del'>-	hc-&gt;activity[hc-&gt;chan[ch].port] = 1;</div><div class='add'>+	if (dch)</div><div class='add'>+		hc-&gt;activity_tx |= 1 &lt;&lt; hc-&gt;chan[ch].port;</div><div class='ctx'> </div><div class='ctx'> 	/* fill fifo to what we have left */</div><div class='ctx'> 	ii = len;</div><div class='hunk'>@@ -2129,13 +2166,9 @@ next_frame:</div><div class='ctx'> 		HFC_wait_nodebug(hc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* send confirm, since get_net_bframe will not do it with trans */</div><div class='del'>-	if (bch &amp;&amp; test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags))</div><div class='del'>-		confirm_Bsend(bch);</div><div class='del'>-</div><div class='del'>-	/* check for next frame */</div><div class='ctx'> 	dev_kfree_skb(*sp);</div><div class='del'>-	if (bch &amp;&amp; get_next_bframe(bch)) { /* hdlc is confirmed here */</div><div class='add'>+	/* check for next frame */</div><div class='add'>+	if (bch &amp;&amp; get_next_bframe(bch)) {</div><div class='ctx'> 		len = (*sp)-&gt;len;</div><div class='ctx'> 		goto next_frame;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2163,24 +2196,20 @@ hfcmulti_rx(struct hfc_multi *hc, int ch)</div><div class='ctx'> 	int f1 = 0, f2 = 0; /* = 0, to make GCC happy */</div><div class='ctx'> 	int again = 0;</div><div class='ctx'> 	struct	bchannel *bch;</div><div class='del'>-	struct  dchannel *dch;</div><div class='add'>+	struct  dchannel *dch = NULL;</div><div class='ctx'> 	struct sk_buff	*skb, **sp = NULL;</div><div class='ctx'> 	int	maxlen;</div><div class='ctx'> </div><div class='ctx'> 	bch = hc-&gt;chan[ch].bch;</div><div class='del'>-	dch = hc-&gt;chan[ch].dch;</div><div class='del'>-	if ((!dch) &amp;&amp; (!bch))</div><div class='del'>-		return;</div><div class='del'>-	if (dch) {</div><div class='add'>+	if (bch) {</div><div class='add'>+		if (!test_bit(FLG_ACTIVE, &amp;bch-&gt;Flags))</div><div class='add'>+			return;</div><div class='add'>+	} else if (hc-&gt;chan[ch].dch) {</div><div class='add'>+		dch = hc-&gt;chan[ch].dch;</div><div class='ctx'> 		if (!test_bit(FLG_ACTIVE, &amp;dch-&gt;Flags))</div><div class='ctx'> 			return;</div><div class='del'>-		sp = &amp;dch-&gt;rx_skb;</div><div class='del'>-		maxlen = dch-&gt;maxlen;</div><div class='ctx'> 	} else {</div><div class='del'>-		if (!test_bit(FLG_ACTIVE, &amp;bch-&gt;Flags))</div><div class='del'>-			return;</div><div class='del'>-		sp = &amp;bch-&gt;rx_skb;</div><div class='del'>-		maxlen = bch-&gt;maxlen;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> next_frame:</div><div class='ctx'> 	/* on first AND before getting next valid frame, R_FIFO must be written</div><div class='hunk'>@@ -2195,8 +2224,11 @@ next_frame:</div><div class='ctx'> 	HFC_wait_nodebug(hc);</div><div class='ctx'> </div><div class='ctx'> 	/* ignore if rx is off BUT change fifo (above) to start pending TX */</div><div class='del'>-	if (hc-&gt;chan[ch].rx_off)</div><div class='add'>+	if (hc-&gt;chan[ch].rx_off) {</div><div class='add'>+		if (bch)</div><div class='add'>+			bch-&gt;dropcnt += poll; /* not exact but fair enough */</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (dch || test_bit(FLG_HDLC, &amp;bch-&gt;Flags)) {</div><div class='ctx'> 		f1 = HFC_inb_nodebug(hc, A_F1);</div><div class='hunk'>@@ -2227,16 +2259,30 @@ next_frame:</div><div class='ctx'> 	if (Zsize &lt;= 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (*sp == NULL) {</div><div class='del'>-		*sp = mI_alloc_skb(maxlen + 3, GFP_ATOMIC);</div><div class='del'>-		if (*sp == NULL) {</div><div class='del'>-			printk(KERN_DEBUG "%s: No mem for rx_skb\n",</div><div class='del'>-			       __func__);</div><div class='add'>+	if (bch) {</div><div class='add'>+		maxlen = bchannel_get_rxbuf(bch, Zsize);</div><div class='add'>+		if (maxlen &lt; 0) {</div><div class='add'>+			pr_warning("card%d.B%d: No bufferspace for %d bytes\n",</div><div class='add'>+				   hc-&gt;id + 1, bch-&gt;nr, Zsize);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='add'>+		sp = &amp;bch-&gt;rx_skb;</div><div class='add'>+		maxlen = bch-&gt;maxlen;</div><div class='add'>+	} else { /* Dchannel */</div><div class='add'>+		sp = &amp;dch-&gt;rx_skb;</div><div class='add'>+		maxlen = dch-&gt;maxlen + 3;</div><div class='add'>+		if (*sp == NULL) {</div><div class='add'>+			*sp = mI_alloc_skb(maxlen, GFP_ATOMIC);</div><div class='add'>+			if (*sp == NULL) {</div><div class='add'>+				pr_warning("card%d: No mem for dch rx_skb\n",</div><div class='add'>+					   hc-&gt;id + 1);</div><div class='add'>+				return;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* show activity */</div><div class='del'>-	hc-&gt;activity[hc-&gt;chan[ch].port] = 1;</div><div class='add'>+	if (dch)</div><div class='add'>+		hc-&gt;activity_rx |= 1 &lt;&lt; hc-&gt;chan[ch].port;</div><div class='ctx'> </div><div class='ctx'> 	/* empty fifo with what we have */</div><div class='ctx'> 	if (dch || test_bit(FLG_HDLC, &amp;bch-&gt;Flags)) {</div><div class='hunk'>@@ -2247,7 +2293,7 @@ next_frame:</div><div class='ctx'> 			       Zsize, z1, z2, (f1 == f2) ? "fragment" : "COMPLETE",</div><div class='ctx'> 			       f1, f2, Zsize + (*sp)-&gt;len, again);</div><div class='ctx'> 		/* HDLC */</div><div class='del'>-		if ((Zsize + (*sp)-&gt;len) &gt; (maxlen + 3)) {</div><div class='add'>+		if ((Zsize + (*sp)-&gt;len) &gt; maxlen) {</div><div class='ctx'> 			if (debug &amp; DEBUG_HFCMULTI_FIFO)</div><div class='ctx'> 				printk(KERN_DEBUG</div><div class='ctx'> 				       "%s(card %d): hdlc-frame too large.\n",</div><div class='hunk'>@@ -2309,7 +2355,7 @@ next_frame:</div><div class='ctx'> 			if (dch)</div><div class='ctx'> 				recv_Dchannel(dch);</div><div class='ctx'> 			else</div><div class='del'>-				recv_Bchannel(bch, MISDN_ID_ANY);</div><div class='add'>+				recv_Bchannel(bch, MISDN_ID_ANY, false);</div><div class='ctx'> 			*sp = skb;</div><div class='ctx'> 			again++;</div><div class='ctx'> 			goto next_frame;</div><div class='hunk'>@@ -2317,32 +2363,14 @@ next_frame:</div><div class='ctx'> 		/* there is an incomplete frame */</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* transparent */</div><div class='del'>-		if (Zsize &gt; skb_tailroom(*sp))</div><div class='del'>-			Zsize = skb_tailroom(*sp);</div><div class='ctx'> 		hc-&gt;read_fifo(hc, skb_put(*sp, Zsize), Zsize);</div><div class='del'>-		if (((*sp)-&gt;len) &lt; MISDN_COPY_SIZE) {</div><div class='del'>-			skb = *sp;</div><div class='del'>-			*sp = mI_alloc_skb(skb-&gt;len, GFP_ATOMIC);</div><div class='del'>-			if (*sp) {</div><div class='del'>-				memcpy(skb_put(*sp, skb-&gt;len),</div><div class='del'>-				       skb-&gt;data, skb-&gt;len);</div><div class='del'>-				skb_trim(skb, 0);</div><div class='del'>-			} else {</div><div class='del'>-				printk(KERN_DEBUG "%s: No mem\n", __func__);</div><div class='del'>-				*sp = skb;</div><div class='del'>-				skb = NULL;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			skb = NULL;</div><div class='del'>-		}</div><div class='ctx'> 		if (debug &amp; DEBUG_HFCMULTI_FIFO)</div><div class='ctx'> 			printk(KERN_DEBUG</div><div class='ctx'> 			       "%s(card %d): fifo(%d) reading %d bytes "</div><div class='ctx'> 			       "(z1=%04x, z2=%04x) TRANS\n",</div><div class='ctx'> 			       __func__, hc-&gt;id + 1, ch, Zsize, z1, z2);</div><div class='ctx'> 		/* only bch is transparent */</div><div class='del'>-		recv_Bchannel(bch, hc-&gt;chan[ch].Zfill);</div><div class='del'>-		*sp = skb;</div><div class='add'>+		recv_Bchannel(bch, hc-&gt;chan[ch].Zfill, false);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2430,55 +2458,55 @@ handle_timer_irq(struct hfc_multi *hc)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	if (hc-&gt;ctype == HFC_TYPE_E1 &amp;&amp; hc-&gt;created[0]) {</div><div class='del'>-		dch = hc-&gt;chan[hc-&gt;dslot].dch;</div><div class='del'>-		if (test_bit(HFC_CFG_REPORT_LOS, &amp;hc-&gt;chan[hc-&gt;dslot].cfg)) {</div><div class='del'>-			/* LOS */</div><div class='del'>-			temp = HFC_inb_nodebug(hc, R_SYNC_STA) &amp; V_SIG_LOS;</div><div class='del'>-			if (!temp &amp;&amp; hc-&gt;chan[hc-&gt;dslot].los)</div><div class='add'>+		dch = hc-&gt;chan[hc-&gt;dnum[0]].dch;</div><div class='add'>+		/* LOS */</div><div class='add'>+		temp = HFC_inb_nodebug(hc, R_SYNC_STA) &amp; V_SIG_LOS;</div><div class='add'>+		hc-&gt;chan[hc-&gt;dnum[0]].los = temp;</div><div class='add'>+		if (test_bit(HFC_CFG_REPORT_LOS, &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg)) {</div><div class='add'>+			if (!temp &amp;&amp; hc-&gt;chan[hc-&gt;dnum[0]].los)</div><div class='ctx'> 				signal_state_up(dch, L1_SIGNAL_LOS_ON,</div><div class='ctx'> 						"LOS detected");</div><div class='del'>-			if (temp &amp;&amp; !hc-&gt;chan[hc-&gt;dslot].los)</div><div class='add'>+			if (temp &amp;&amp; !hc-&gt;chan[hc-&gt;dnum[0]].los)</div><div class='ctx'> 				signal_state_up(dch, L1_SIGNAL_LOS_OFF,</div><div class='ctx'> 						"LOS gone");</div><div class='del'>-			hc-&gt;chan[hc-&gt;dslot].los = temp;</div><div class='ctx'> 		}</div><div class='del'>-		if (test_bit(HFC_CFG_REPORT_AIS, &amp;hc-&gt;chan[hc-&gt;dslot].cfg)) {</div><div class='add'>+		if (test_bit(HFC_CFG_REPORT_AIS, &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg)) {</div><div class='ctx'> 			/* AIS */</div><div class='ctx'> 			temp = HFC_inb_nodebug(hc, R_SYNC_STA) &amp; V_AIS;</div><div class='del'>-			if (!temp &amp;&amp; hc-&gt;chan[hc-&gt;dslot].ais)</div><div class='add'>+			if (!temp &amp;&amp; hc-&gt;chan[hc-&gt;dnum[0]].ais)</div><div class='ctx'> 				signal_state_up(dch, L1_SIGNAL_AIS_ON,</div><div class='ctx'> 						"AIS detected");</div><div class='del'>-			if (temp &amp;&amp; !hc-&gt;chan[hc-&gt;dslot].ais)</div><div class='add'>+			if (temp &amp;&amp; !hc-&gt;chan[hc-&gt;dnum[0]].ais)</div><div class='ctx'> 				signal_state_up(dch, L1_SIGNAL_AIS_OFF,</div><div class='ctx'> 						"AIS gone");</div><div class='del'>-			hc-&gt;chan[hc-&gt;dslot].ais = temp;</div><div class='add'>+			hc-&gt;chan[hc-&gt;dnum[0]].ais = temp;</div><div class='ctx'> 		}</div><div class='del'>-		if (test_bit(HFC_CFG_REPORT_SLIP, &amp;hc-&gt;chan[hc-&gt;dslot].cfg)) {</div><div class='add'>+		if (test_bit(HFC_CFG_REPORT_SLIP, &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg)) {</div><div class='ctx'> 			/* SLIP */</div><div class='ctx'> 			temp = HFC_inb_nodebug(hc, R_SLIP) &amp; V_FOSLIP_RX;</div><div class='del'>-			if (!temp &amp;&amp; hc-&gt;chan[hc-&gt;dslot].slip_rx)</div><div class='add'>+			if (!temp &amp;&amp; hc-&gt;chan[hc-&gt;dnum[0]].slip_rx)</div><div class='ctx'> 				signal_state_up(dch, L1_SIGNAL_SLIP_RX,</div><div class='ctx'> 						" bit SLIP detected RX");</div><div class='del'>-			hc-&gt;chan[hc-&gt;dslot].slip_rx = temp;</div><div class='add'>+			hc-&gt;chan[hc-&gt;dnum[0]].slip_rx = temp;</div><div class='ctx'> 			temp = HFC_inb_nodebug(hc, R_SLIP) &amp; V_FOSLIP_TX;</div><div class='del'>-			if (!temp &amp;&amp; hc-&gt;chan[hc-&gt;dslot].slip_tx)</div><div class='add'>+			if (!temp &amp;&amp; hc-&gt;chan[hc-&gt;dnum[0]].slip_tx)</div><div class='ctx'> 				signal_state_up(dch, L1_SIGNAL_SLIP_TX,</div><div class='ctx'> 						" bit SLIP detected TX");</div><div class='del'>-			hc-&gt;chan[hc-&gt;dslot].slip_tx = temp;</div><div class='add'>+			hc-&gt;chan[hc-&gt;dnum[0]].slip_tx = temp;</div><div class='ctx'> 		}</div><div class='del'>-		if (test_bit(HFC_CFG_REPORT_RDI, &amp;hc-&gt;chan[hc-&gt;dslot].cfg)) {</div><div class='add'>+		if (test_bit(HFC_CFG_REPORT_RDI, &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg)) {</div><div class='ctx'> 			/* RDI */</div><div class='ctx'> 			temp = HFC_inb_nodebug(hc, R_RX_SL0_0) &amp; V_A;</div><div class='del'>-			if (!temp &amp;&amp; hc-&gt;chan[hc-&gt;dslot].rdi)</div><div class='add'>+			if (!temp &amp;&amp; hc-&gt;chan[hc-&gt;dnum[0]].rdi)</div><div class='ctx'> 				signal_state_up(dch, L1_SIGNAL_RDI_ON,</div><div class='ctx'> 						"RDI detected");</div><div class='del'>-			if (temp &amp;&amp; !hc-&gt;chan[hc-&gt;dslot].rdi)</div><div class='add'>+			if (temp &amp;&amp; !hc-&gt;chan[hc-&gt;dnum[0]].rdi)</div><div class='ctx'> 				signal_state_up(dch, L1_SIGNAL_RDI_OFF,</div><div class='ctx'> 						"RDI gone");</div><div class='del'>-			hc-&gt;chan[hc-&gt;dslot].rdi = temp;</div><div class='add'>+			hc-&gt;chan[hc-&gt;dnum[0]].rdi = temp;</div><div class='ctx'> 		}</div><div class='ctx'> 		temp = HFC_inb_nodebug(hc, R_JATT_DIR);</div><div class='del'>-		switch (hc-&gt;chan[hc-&gt;dslot].sync) {</div><div class='add'>+		switch (hc-&gt;chan[hc-&gt;dnum[0]].sync) {</div><div class='ctx'> 		case 0:</div><div class='ctx'> 			if ((temp &amp; 0x60) == 0x60) {</div><div class='ctx'> 				if (debug &amp; DEBUG_HFCMULTI_SYNC)</div><div class='hunk'>@@ -2487,10 +2515,10 @@ handle_timer_irq(struct hfc_multi *hc)</div><div class='ctx'> 					       "in clock sync\n",</div><div class='ctx'> 					       __func__, hc-&gt;id);</div><div class='ctx'> 				HFC_outb(hc, R_RX_OFF,</div><div class='del'>-					 hc-&gt;chan[hc-&gt;dslot].jitter | V_RX_INIT);</div><div class='add'>+				    hc-&gt;chan[hc-&gt;dnum[0]].jitter | V_RX_INIT);</div><div class='ctx'> 				HFC_outb(hc, R_TX_OFF,</div><div class='del'>-					 hc-&gt;chan[hc-&gt;dslot].jitter | V_RX_INIT);</div><div class='del'>-				hc-&gt;chan[hc-&gt;dslot].sync = 1;</div><div class='add'>+				    hc-&gt;chan[hc-&gt;dnum[0]].jitter | V_RX_INIT);</div><div class='add'>+				hc-&gt;chan[hc-&gt;dnum[0]].sync = 1;</div><div class='ctx'> 				goto check_framesync;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -2501,7 +2529,7 @@ handle_timer_irq(struct hfc_multi *hc)</div><div class='ctx'> 					       "%s: (id=%d) E1 "</div><div class='ctx'> 					       "lost clock sync\n",</div><div class='ctx'> 					       __func__, hc-&gt;id);</div><div class='del'>-				hc-&gt;chan[hc-&gt;dslot].sync = 0;</div><div class='add'>+				hc-&gt;chan[hc-&gt;dnum[0]].sync = 0;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		check_framesync:</div><div class='hunk'>@@ -2512,7 +2540,7 @@ handle_timer_irq(struct hfc_multi *hc)</div><div class='ctx'> 					       "%s: (id=%d) E1 "</div><div class='ctx'> 					       "now in frame sync\n",</div><div class='ctx'> 					       __func__, hc-&gt;id);</div><div class='del'>-				hc-&gt;chan[hc-&gt;dslot].sync = 2;</div><div class='add'>+				hc-&gt;chan[hc-&gt;dnum[0]].sync = 2;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 2:</div><div class='hunk'>@@ -2522,7 +2550,7 @@ handle_timer_irq(struct hfc_multi *hc)</div><div class='ctx'> 					       "%s: (id=%d) E1 lost "</div><div class='ctx'> 					       "clock &amp; frame sync\n",</div><div class='ctx'> 					       __func__, hc-&gt;id);</div><div class='del'>-				hc-&gt;chan[hc-&gt;dslot].sync = 0;</div><div class='add'>+				hc-&gt;chan[hc-&gt;dnum[0]].sync = 0;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			temp = HFC_inb_nodebug(hc, R_SYNC_STA);</div><div class='hunk'>@@ -2532,7 +2560,7 @@ handle_timer_irq(struct hfc_multi *hc)</div><div class='ctx'> 					       "%s: (id=%d) E1 "</div><div class='ctx'> 					       "lost frame sync\n",</div><div class='ctx'> 					       __func__, hc-&gt;id);</div><div class='del'>-				hc-&gt;chan[hc-&gt;dslot].sync = 1;</div><div class='add'>+				hc-&gt;chan[hc-&gt;dnum[0]].sync = 1;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2673,7 +2701,7 @@ hfcmulti_interrupt(int intno, void *dev_id)</div><div class='ctx'> 	int			i;</div><div class='ctx'> 	void __iomem		*plx_acc;</div><div class='ctx'> 	u_short			wval;</div><div class='del'>-	u_char			e1_syncsta, temp;</div><div class='add'>+	u_char			e1_syncsta, temp, temp2;</div><div class='ctx'> 	u_long			flags;</div><div class='ctx'> </div><div class='ctx'> 	if (!hc) {</div><div class='hunk'>@@ -2748,7 +2776,7 @@ hfcmulti_interrupt(int intno, void *dev_id)</div><div class='ctx'> 		if (r_irq_misc &amp; V_STA_IRQ) {</div><div class='ctx'> 			if (hc-&gt;ctype == HFC_TYPE_E1) {</div><div class='ctx'> 				/* state machine */</div><div class='del'>-				dch = hc-&gt;chan[hc-&gt;dslot].dch;</div><div class='add'>+				dch = hc-&gt;chan[hc-&gt;dnum[0]].dch;</div><div class='ctx'> 				e1_syncsta = HFC_inb_nodebug(hc, R_SYNC_STA);</div><div class='ctx'> 				if (test_bit(HFC_CHIP_PLXSD, &amp;hc-&gt;chip)</div><div class='ctx'> 				    &amp;&amp; hc-&gt;e1_getclock) {</div><div class='hunk'>@@ -2758,23 +2786,26 @@ hfcmulti_interrupt(int intno, void *dev_id)</div><div class='ctx'> 						hc-&gt;syncronized = 0;</div><div class='ctx'> 				}</div><div class='ctx'> 				/* undocumented: status changes during read */</div><div class='del'>-				dch-&gt;state = HFC_inb_nodebug(hc, R_E1_RD_STA);</div><div class='del'>-				while (dch-&gt;state != (temp =</div><div class='add'>+				temp = HFC_inb_nodebug(hc, R_E1_RD_STA);</div><div class='add'>+				while (temp != (temp2 =</div><div class='ctx'> 						      HFC_inb_nodebug(hc, R_E1_RD_STA))) {</div><div class='ctx'> 					if (debug &amp; DEBUG_HFCMULTI_STATE)</div><div class='ctx'> 						printk(KERN_DEBUG "%s: reread "</div><div class='ctx'> 						       "STATE because %d!=%d\n",</div><div class='del'>-						       __func__, temp,</div><div class='del'>-						       dch-&gt;state);</div><div class='del'>-					dch-&gt;state = temp; /* repeat */</div><div class='add'>+						    __func__, temp, temp2);</div><div class='add'>+					temp = temp2; /* repeat */</div><div class='ctx'> 				}</div><div class='del'>-				dch-&gt;state = HFC_inb_nodebug(hc, R_E1_RD_STA)</div><div class='del'>-					&amp; 0x7;</div><div class='del'>-				schedule_event(dch, FLG_PHCHANGE);</div><div class='add'>+				/* broadcast state change to all fragments */</div><div class='ctx'> 				if (debug &amp; DEBUG_HFCMULTI_STATE)</div><div class='ctx'> 					printk(KERN_DEBUG</div><div class='ctx'> 					       "%s: E1 (id=%d) newstate %x\n",</div><div class='del'>-					       __func__, hc-&gt;id, dch-&gt;state);</div><div class='add'>+					    __func__, hc-&gt;id, temp &amp; 0x7);</div><div class='add'>+				for (i = 0; i &lt; hc-&gt;ports; i++) {</div><div class='add'>+					dch = hc-&gt;chan[hc-&gt;dnum[i]].dch;</div><div class='add'>+					dch-&gt;state = temp &amp; 0x7;</div><div class='add'>+					schedule_event(dch, FLG_PHCHANGE);</div><div class='add'>+				}</div><div class='add'>+</div><div class='ctx'> 				if (test_bit(HFC_CHIP_PLXSD, &amp;hc-&gt;chip))</div><div class='ctx'> 					plxsd_checksync(hc, 0);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -3018,8 +3049,10 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,</div><div class='ctx'> 			HFC_outb(hc, A_CON_HDLC, 0x20 | V_HDLC_TRP | V_IFF);</div><div class='ctx'> 			HFC_outb(hc, A_SUBCH_CFG, 0);</div><div class='ctx'> 			HFC_outb(hc, A_IRQ_MSK, 0);</div><div class='del'>-			HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);</div><div class='del'>-			HFC_wait(hc);</div><div class='add'>+			if (hc-&gt;chan[ch].protocol != protocol) {</div><div class='add'>+				HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);</div><div class='add'>+				HFC_wait(hc);</div><div class='add'>+			}</div><div class='ctx'> 			HFC_outb(hc, R_SLOT, ((((ch / 4) * 8) +</div><div class='ctx'> 					       ((ch % 4) * 4) + 1) &lt;&lt; 1) | 1);</div><div class='ctx'> 			HFC_outb(hc, A_SL_CFG, 0x80 | 0x20 | (ch &lt;&lt; 1) | 1);</div><div class='hunk'>@@ -3039,8 +3072,10 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,</div><div class='ctx'> 			HFC_outb(hc, A_CON_HDLC, 0x20 | V_HDLC_TRP | V_IFF);</div><div class='ctx'> 			HFC_outb(hc, A_SUBCH_CFG, 0);</div><div class='ctx'> 			HFC_outb(hc, A_IRQ_MSK, 0);</div><div class='del'>-			HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);</div><div class='del'>-			HFC_wait(hc);</div><div class='add'>+			if (hc-&gt;chan[ch].protocol != protocol) {</div><div class='add'>+				HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);</div><div class='add'>+				HFC_wait(hc);</div><div class='add'>+			}</div><div class='ctx'> 			/* tx silence */</div><div class='ctx'> 			HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc-&gt;silence);</div><div class='ctx'> 			HFC_outb(hc, R_SLOT, (((ch / 4) * 8) +</div><div class='hunk'>@@ -3059,8 +3094,10 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,</div><div class='ctx'> 					 V_HDLC_TRP | V_IFF);</div><div class='ctx'> 			HFC_outb(hc, A_SUBCH_CFG, 0);</div><div class='ctx'> 			HFC_outb(hc, A_IRQ_MSK, 0);</div><div class='del'>-			HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);</div><div class='del'>-			HFC_wait(hc);</div><div class='add'>+			if (hc-&gt;chan[ch].protocol != protocol) {</div><div class='add'>+				HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);</div><div class='add'>+				HFC_wait(hc);</div><div class='add'>+			}</div><div class='ctx'> 			/* tx silence */</div><div class='ctx'> 			HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc-&gt;silence);</div><div class='ctx'> 			/* enable RX fifo */</div><div class='hunk'>@@ -3075,8 +3112,10 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,</div><div class='ctx'> 					 V_HDLC_TRP);</div><div class='ctx'> 			HFC_outb(hc, A_SUBCH_CFG, 0);</div><div class='ctx'> 			HFC_outb(hc, A_IRQ_MSK, 0);</div><div class='del'>-			HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);</div><div class='del'>-			HFC_wait(hc);</div><div class='add'>+			if (hc-&gt;chan[ch].protocol != protocol) {</div><div class='add'>+				HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);</div><div class='add'>+				HFC_wait(hc);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		if (hc-&gt;ctype != HFC_TYPE_E1) {</div><div class='ctx'> 			hc-&gt;hw.a_st_ctrl0[hc-&gt;chan[ch].port] |=</div><div class='hunk'>@@ -3433,8 +3472,7 @@ handle_bmsg(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 	struct hfc_multi	*hc = bch-&gt;hw;</div><div class='ctx'> 	int			ret = -EINVAL;</div><div class='ctx'> 	struct mISDNhead	*hh = mISDN_HEAD_P(skb);</div><div class='del'>-	unsigned int		id;</div><div class='del'>-	u_long			flags;</div><div class='add'>+	unsigned long		flags;</div><div class='ctx'> </div><div class='ctx'> 	switch (hh-&gt;prim) {</div><div class='ctx'> 	case PH_DATA_REQ:</div><div class='hunk'>@@ -3443,19 +3481,13 @@ handle_bmsg(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 		spin_lock_irqsave(&amp;hc-&gt;lock, flags);</div><div class='ctx'> 		ret = bchannel_senddata(bch, skb);</div><div class='ctx'> 		if (ret &gt; 0) { /* direct TX */</div><div class='del'>-			id = hh-&gt;id; /* skb can be freed */</div><div class='ctx'> 			hfcmulti_tx(hc, bch-&gt;slot);</div><div class='ctx'> 			ret = 0;</div><div class='ctx'> 			/* start fifo */</div><div class='ctx'> 			HFC_outb_nodebug(hc, R_FIFO, 0);</div><div class='ctx'> 			HFC_wait_nodebug(hc);</div><div class='del'>-			if (!test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags)) {</div><div class='del'>-				spin_unlock_irqrestore(&amp;hc-&gt;lock, flags);</div><div class='del'>-				queue_ch_frame(ch, PH_DATA_CNF, id, NULL);</div><div class='del'>-			} else</div><div class='del'>-				spin_unlock_irqrestore(&amp;hc-&gt;lock, flags);</div><div class='del'>-		} else</div><div class='del'>-			spin_unlock_irqrestore(&amp;hc-&gt;lock, flags);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;hc-&gt;lock, flags);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	case PH_ACTIVATE_REQ:</div><div class='ctx'> 		if (debug &amp; DEBUG_HFCMULTI_MSG)</div><div class='hunk'>@@ -3545,10 +3577,11 @@ channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)</div><div class='ctx'> </div><div class='ctx'> 	switch (cq-&gt;op) {</div><div class='ctx'> 	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = MISDN_CTRL_HFC_OP | MISDN_CTRL_HW_FEATURES_OP</div><div class='del'>-			| MISDN_CTRL_RX_OFF | MISDN_CTRL_FILL_EMPTY;</div><div class='add'>+		ret = mISDN_ctrl_bchannel(bch, cq);</div><div class='add'>+		cq-&gt;op |= MISDN_CTRL_HFC_OP | MISDN_CTRL_HW_FEATURES_OP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MISDN_CTRL_RX_OFF: /* turn off / on rx stream */</div><div class='add'>+		ret = mISDN_ctrl_bchannel(bch, cq);</div><div class='ctx'> 		hc-&gt;chan[bch-&gt;slot].rx_off = !!cq-&gt;p1;</div><div class='ctx'> 		if (!hc-&gt;chan[bch-&gt;slot].rx_off) {</div><div class='ctx'> 			/* reset fifo on rx on */</div><div class='hunk'>@@ -3561,11 +3594,10 @@ channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)</div><div class='ctx'> 			printk(KERN_DEBUG "%s: RX_OFF request (nr=%d off=%d)\n",</div><div class='ctx'> 			       __func__, bch-&gt;nr, hc-&gt;chan[bch-&gt;slot].rx_off);</div><div class='ctx'> 		break;</div><div class='del'>-	case MISDN_CTRL_FILL_EMPTY: /* fill fifo, if empty */</div><div class='del'>-		test_and_set_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags);</div><div class='del'>-		if (debug &amp; DEBUG_HFCMULTI_MSG)</div><div class='del'>-			printk(KERN_DEBUG "%s: FILL_EMPTY request (nr=%d "</div><div class='del'>-			       "off=%d)\n", __func__, bch-&gt;nr, !!cq-&gt;p1);</div><div class='add'>+	case MISDN_CTRL_FILL_EMPTY:</div><div class='add'>+		ret = mISDN_ctrl_bchannel(bch, cq);</div><div class='add'>+		hc-&gt;silence = bch-&gt;fill[0];</div><div class='add'>+		memset(hc-&gt;silence_data, hc-&gt;silence, sizeof(hc-&gt;silence_data));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MISDN_CTRL_HW_FEATURES: /* fill features structure */</div><div class='ctx'> 		if (debug &amp; DEBUG_HFCMULTI_MSG)</div><div class='hunk'>@@ -3654,9 +3686,7 @@ channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)</div><div class='ctx'> 			ret = -EINVAL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		printk(KERN_WARNING "%s: unknown Op %x\n",</div><div class='del'>-		       __func__, cq-&gt;op);</div><div class='del'>-		ret = -EINVAL;</div><div class='add'>+		ret = mISDN_ctrl_bchannel(bch, cq);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -3676,8 +3706,7 @@ hfcm_bctrl(struct mISDNchannel *ch, u_int cmd, void *arg)</div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case CLOSE_CHANNEL:</div><div class='ctx'> 		test_and_clear_bit(FLG_OPEN, &amp;bch-&gt;Flags);</div><div class='del'>-		if (test_bit(FLG_ACTIVE, &amp;bch-&gt;Flags))</div><div class='del'>-			deactivate_bchannel(bch); /* locked there */</div><div class='add'>+		deactivate_bchannel(bch); /* locked there */</div><div class='ctx'> 		ch-&gt;protocol = ISDN_P_NONE;</div><div class='ctx'> 		ch-&gt;peer = NULL;</div><div class='ctx'> 		module_put(THIS_MODULE);</div><div class='hunk'>@@ -3839,31 +3868,37 @@ hfcmulti_initmode(struct dchannel *dch)</div><div class='ctx'> 	if (debug &amp; DEBUG_HFCMULTI_INIT)</div><div class='ctx'> 		printk(KERN_DEBUG "%s: entered\n", __func__);</div><div class='ctx'> </div><div class='add'>+	i = dch-&gt;slot;</div><div class='add'>+	pt = hc-&gt;chan[i].port;</div><div class='ctx'> 	if (hc-&gt;ctype == HFC_TYPE_E1) {</div><div class='del'>-		hc-&gt;chan[hc-&gt;dslot].slot_tx = -1;</div><div class='del'>-		hc-&gt;chan[hc-&gt;dslot].slot_rx = -1;</div><div class='del'>-		hc-&gt;chan[hc-&gt;dslot].conf = -1;</div><div class='del'>-		if (hc-&gt;dslot) {</div><div class='del'>-			mode_hfcmulti(hc, hc-&gt;dslot, dch-&gt;dev.D.protocol,</div><div class='add'>+		/* E1 */</div><div class='add'>+		hc-&gt;chan[hc-&gt;dnum[pt]].slot_tx = -1;</div><div class='add'>+		hc-&gt;chan[hc-&gt;dnum[pt]].slot_rx = -1;</div><div class='add'>+		hc-&gt;chan[hc-&gt;dnum[pt]].conf = -1;</div><div class='add'>+		if (hc-&gt;dnum[pt]) {</div><div class='add'>+			mode_hfcmulti(hc, dch-&gt;slot, dch-&gt;dev.D.protocol,</div><div class='ctx'> 				      -1, 0, -1, 0);</div><div class='ctx'> 			dch-&gt;timer.function = (void *) hfcmulti_dbusy_timer;</div><div class='ctx'> 			dch-&gt;timer.data = (long) dch;</div><div class='ctx'> 			init_timer(&amp;dch-&gt;timer);</div><div class='ctx'> 		}</div><div class='ctx'> 		for (i = 1; i &lt;= 31; i++) {</div><div class='del'>-			if (i == hc-&gt;dslot)</div><div class='add'>+			if (!((1 &lt;&lt; i) &amp; hc-&gt;bmask[pt])) /* skip unused chan */</div><div class='ctx'> 				continue;</div><div class='ctx'> 			hc-&gt;chan[i].slot_tx = -1;</div><div class='ctx'> 			hc-&gt;chan[i].slot_rx = -1;</div><div class='ctx'> 			hc-&gt;chan[i].conf = -1;</div><div class='ctx'> 			mode_hfcmulti(hc, i, ISDN_P_NONE, -1, 0, -1, 0);</div><div class='ctx'> 		}</div><div class='del'>-		/* E1 */</div><div class='del'>-		if (test_bit(HFC_CFG_REPORT_LOS, &amp;hc-&gt;chan[hc-&gt;dslot].cfg)) {</div><div class='add'>+	}</div><div class='add'>+	if (hc-&gt;ctype == HFC_TYPE_E1 &amp;&amp; pt == 0) {</div><div class='add'>+		/* E1, port 0 */</div><div class='add'>+		dch = hc-&gt;chan[hc-&gt;dnum[0]].dch;</div><div class='add'>+		if (test_bit(HFC_CFG_REPORT_LOS, &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg)) {</div><div class='ctx'> 			HFC_outb(hc, R_LOS0, 255); /* 2 ms */</div><div class='ctx'> 			HFC_outb(hc, R_LOS1, 255); /* 512 ms */</div><div class='ctx'> 		}</div><div class='del'>-		if (test_bit(HFC_CFG_OPTICAL, &amp;hc-&gt;chan[hc-&gt;dslot].cfg)) {</div><div class='add'>+		if (test_bit(HFC_CFG_OPTICAL, &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg)) {</div><div class='ctx'> 			HFC_outb(hc, R_RX0, 0);</div><div class='ctx'> 			hc-&gt;hw.r_tx0 = 0 | V_OUT_EN;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -3876,12 +3911,12 @@ hfcmulti_initmode(struct dchannel *dch)</div><div class='ctx'> 		HFC_outb(hc, R_TX_FR0, 0x00);</div><div class='ctx'> 		HFC_outb(hc, R_TX_FR1, 0xf8);</div><div class='ctx'> </div><div class='del'>-		if (test_bit(HFC_CFG_CRC4, &amp;hc-&gt;chan[hc-&gt;dslot].cfg))</div><div class='add'>+		if (test_bit(HFC_CFG_CRC4, &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg))</div><div class='ctx'> 			HFC_outb(hc, R_TX_FR2, V_TX_MF | V_TX_E | V_NEG_E);</div><div class='ctx'> </div><div class='ctx'> 		HFC_outb(hc, R_RX_FR0, V_AUTO_RESYNC | V_AUTO_RECO | 0);</div><div class='ctx'> </div><div class='del'>-		if (test_bit(HFC_CFG_CRC4, &amp;hc-&gt;chan[hc-&gt;dslot].cfg))</div><div class='add'>+		if (test_bit(HFC_CFG_CRC4, &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg))</div><div class='ctx'> 			HFC_outb(hc, R_RX_FR1, V_RX_MF | V_RX_MF_SYNC);</div><div class='ctx'> </div><div class='ctx'> 		if (dch-&gt;dev.D.protocol == ISDN_P_NT_E1) {</div><div class='hunk'>@@ -3944,13 +3979,14 @@ hfcmulti_initmode(struct dchannel *dch)</div><div class='ctx'> 			hc-&gt;syncronized = 0;</div><div class='ctx'> 			plxsd_checksync(hc, 0);</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		i = dch-&gt;slot;</div><div class='add'>+	}</div><div class='add'>+	if (hc-&gt;ctype != HFC_TYPE_E1) {</div><div class='add'>+		/* ST */</div><div class='ctx'> 		hc-&gt;chan[i].slot_tx = -1;</div><div class='ctx'> 		hc-&gt;chan[i].slot_rx = -1;</div><div class='ctx'> 		hc-&gt;chan[i].conf = -1;</div><div class='ctx'> 		mode_hfcmulti(hc, i, dch-&gt;dev.D.protocol, -1, 0, -1, 0);</div><div class='del'>-		dch-&gt;timer.function = (void *)hfcmulti_dbusy_timer;</div><div class='add'>+		dch-&gt;timer.function = (void *) hfcmulti_dbusy_timer;</div><div class='ctx'> 		dch-&gt;timer.data = (long) dch;</div><div class='ctx'> 		init_timer(&amp;dch-&gt;timer);</div><div class='ctx'> 		hc-&gt;chan[i - 2].slot_tx = -1;</div><div class='hunk'>@@ -3961,8 +3997,6 @@ hfcmulti_initmode(struct dchannel *dch)</div><div class='ctx'> 		hc-&gt;chan[i - 1].slot_rx = -1;</div><div class='ctx'> 		hc-&gt;chan[i - 1].conf = -1;</div><div class='ctx'> 		mode_hfcmulti(hc, i - 1, ISDN_P_NONE, -1, 0, -1, 0);</div><div class='del'>-		/* ST */</div><div class='del'>-		pt = hc-&gt;chan[i].port;</div><div class='ctx'> 		/* select interface */</div><div class='ctx'> 		HFC_outb(hc, R_ST_SEL, pt);</div><div class='ctx'> 		/* undocumented: delay after R_ST_SEL */</div><div class='hunk'>@@ -4054,14 +4088,9 @@ open_dchannel(struct hfc_multi *hc, struct dchannel *dch,</div><div class='ctx'> 		hfcmulti_initmode(dch);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;hc-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (((rq-&gt;protocol == ISDN_P_NT_S0) &amp;&amp; (dch-&gt;state == 3)) ||</div><div class='del'>-	    ((rq-&gt;protocol == ISDN_P_TE_S0) &amp;&amp; (dch-&gt;state == 7)) ||</div><div class='del'>-	    ((rq-&gt;protocol == ISDN_P_NT_E1) &amp;&amp; (dch-&gt;state == 1)) ||</div><div class='del'>-	    ((rq-&gt;protocol == ISDN_P_TE_E1) &amp;&amp; (dch-&gt;state == 1))) {</div><div class='add'>+	if (test_bit(FLG_ACTIVE, &amp;dch-&gt;Flags))</div><div class='ctx'> 		_queue_data(&amp;dch-&gt;dev.D, PH_ACTIVATE_IND, MISDN_ID_ANY,</div><div class='ctx'> 			    0, NULL, GFP_KERNEL);</div><div class='del'>-	}</div><div class='ctx'> 	rq-&gt;ch = &amp;dch-&gt;dev.D;</div><div class='ctx'> 	if (!try_module_get(THIS_MODULE))</div><div class='ctx'> 		printk(KERN_WARNING "%s:cannot get module\n", __func__);</div><div class='hunk'>@@ -4091,7 +4120,6 @@ open_bchannel(struct hfc_multi *hc, struct dchannel *dch,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (test_and_set_bit(FLG_OPEN, &amp;bch-&gt;Flags))</div><div class='ctx'> 		return -EBUSY; /* b-channel can be only open once */</div><div class='del'>-	test_and_clear_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags);</div><div class='ctx'> 	bch-&gt;ch.protocol = rq-&gt;protocol;</div><div class='ctx'> 	hc-&gt;chan[ch].rx_off = 0;</div><div class='ctx'> 	rq-&gt;ch = &amp;bch-&gt;ch;</div><div class='hunk'>@@ -4112,7 +4140,7 @@ channel_dctrl(struct dchannel *dch, struct mISDN_ctrl_req *cq)</div><div class='ctx'> </div><div class='ctx'> 	switch (cq-&gt;op) {</div><div class='ctx'> 	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = MISDN_CTRL_HFC_OP;</div><div class='add'>+		cq-&gt;op = MISDN_CTRL_HFC_OP | MISDN_CTRL_L1_TIMER3;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MISDN_CTRL_HFC_WD_INIT: /* init the watchdog */</div><div class='ctx'> 		wd_cnt = cq-&gt;p1 &amp; 0xf;</div><div class='hunk'>@@ -4142,6 +4170,9 @@ channel_dctrl(struct dchannel *dch, struct mISDN_ctrl_req *cq)</div><div class='ctx'> 			       __func__);</div><div class='ctx'> 		HFC_outb(hc, R_BERT_WD_MD, hc-&gt;hw.r_bert_wd_md | V_WD_RES);</div><div class='ctx'> 		break;</div><div class='add'>+	case MISDN_CTRL_L1_TIMER3:</div><div class='add'>+		ret = l1_event(dch-&gt;l1, HW_TIMER3_VALUE | (cq-&gt;p1 &amp; 0xff));</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		printk(KERN_WARNING "%s: unknown Op %x\n",</div><div class='ctx'> 		       __func__, cq-&gt;op);</div><div class='hunk'>@@ -4545,6 +4576,8 @@ release_port(struct hfc_multi *hc, struct dchannel *dch)</div><div class='ctx'> 		}</div><div class='ctx'> 		/* free channels */</div><div class='ctx'> 		for (i = 0; i &lt;= 31; i++) {</div><div class='add'>+			if (!((1 &lt;&lt; i) &amp; hc-&gt;bmask[pt])) /* skip unused chan */</div><div class='add'>+				continue;</div><div class='ctx'> 			if (hc-&gt;chan[i].bch) {</div><div class='ctx'> 				if (debug &amp; DEBUG_HFCMULTI_INIT)</div><div class='ctx'> 					printk(KERN_DEBUG</div><div class='hunk'>@@ -4600,7 +4633,8 @@ release_port(struct hfc_multi *hc, struct dchannel *dch)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;hc-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (debug &amp; DEBUG_HFCMULTI_INIT)</div><div class='del'>-		printk(KERN_DEBUG "%s: free port %d channel D\n", __func__, pt);</div><div class='add'>+		printk(KERN_DEBUG "%s: free port %d channel D(%d)\n", __func__,</div><div class='add'>+			pt+1, ci);</div><div class='ctx'> 	mISDN_freedchannel(dch);</div><div class='ctx'> 	kfree(dch);</div><div class='ctx'> </div><div class='hunk'>@@ -4622,15 +4656,19 @@ release_card(struct hfc_multi *hc)</div><div class='ctx'> 	if (hc-&gt;iclock)</div><div class='ctx'> 		mISDN_unregister_clock(hc-&gt;iclock);</div><div class='ctx'> </div><div class='del'>-	/* disable irq */</div><div class='add'>+	/* disable and free irq */</div><div class='ctx'> 	spin_lock_irqsave(&amp;hc-&gt;lock, flags);</div><div class='ctx'> 	disable_hwirq(hc);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;hc-&gt;lock, flags);</div><div class='ctx'> 	udelay(1000);</div><div class='add'>+	if (hc-&gt;irq) {</div><div class='add'>+		if (debug &amp; DEBUG_HFCMULTI_INIT)</div><div class='add'>+			printk(KERN_DEBUG "%s: free irq %d (hc=%p)\n",</div><div class='add'>+			    __func__, hc-&gt;irq, hc);</div><div class='add'>+		free_irq(hc-&gt;irq, hc);</div><div class='add'>+		hc-&gt;irq = 0;</div><div class='ctx'> </div><div class='del'>-	/* dimm leds */</div><div class='del'>-	if (hc-&gt;leds)</div><div class='del'>-		hfcmulti_leds(hc);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* disable D-channels &amp; B-channels */</div><div class='ctx'> 	if (debug &amp; DEBUG_HFCMULTI_INIT)</div><div class='hunk'>@@ -4641,15 +4679,11 @@ release_card(struct hfc_multi *hc)</div><div class='ctx'> 			release_port(hc, hc-&gt;chan[ch].dch);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* release hardware &amp; irq */</div><div class='del'>-	if (hc-&gt;irq) {</div><div class='del'>-		if (debug &amp; DEBUG_HFCMULTI_INIT)</div><div class='del'>-			printk(KERN_DEBUG "%s: free irq %d\n",</div><div class='del'>-			       __func__, hc-&gt;irq);</div><div class='del'>-		free_irq(hc-&gt;irq, hc);</div><div class='del'>-		hc-&gt;irq = 0;</div><div class='add'>+	/* dimm leds */</div><div class='add'>+	if (hc-&gt;leds)</div><div class='add'>+		hfcmulti_leds(hc);</div><div class='ctx'> </div><div class='del'>-	}</div><div class='add'>+	/* release hardware */</div><div class='ctx'> 	release_io_hfcmulti(hc);</div><div class='ctx'> </div><div class='ctx'> 	if (debug &amp; DEBUG_HFCMULTI_INIT)</div><div class='hunk'>@@ -4667,61 +4701,9 @@ release_card(struct hfc_multi *hc)</div><div class='ctx'> 		       __func__);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-init_e1_port(struct hfc_multi *hc, struct hm_map *m)</div><div class='add'>+static void</div><div class='add'>+init_e1_port_hw(struct hfc_multi *hc, struct hm_map *m)</div><div class='ctx'> {</div><div class='del'>-	struct dchannel	*dch;</div><div class='del'>-	struct bchannel	*bch;</div><div class='del'>-	int		ch, ret = 0;</div><div class='del'>-	char		name[MISDN_MAX_IDLEN];</div><div class='del'>-</div><div class='del'>-	dch = kzalloc(sizeof(struct dchannel), GFP_KERNEL);</div><div class='del'>-	if (!dch)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	dch-&gt;debug = debug;</div><div class='del'>-	mISDN_initdchannel(dch, MAX_DFRAME_LEN_L1, ph_state_change);</div><div class='del'>-	dch-&gt;hw = hc;</div><div class='del'>-	dch-&gt;dev.Dprotocols = (1 &lt;&lt; ISDN_P_TE_E1) | (1 &lt;&lt; ISDN_P_NT_E1);</div><div class='del'>-	dch-&gt;dev.Bprotocols = (1 &lt;&lt; (ISDN_P_B_RAW &amp; ISDN_P_B_MASK)) |</div><div class='del'>-		(1 &lt;&lt; (ISDN_P_B_HDLC &amp; ISDN_P_B_MASK));</div><div class='del'>-	dch-&gt;dev.D.send = handle_dmsg;</div><div class='del'>-	dch-&gt;dev.D.ctrl = hfcm_dctrl;</div><div class='del'>-	dch-&gt;dev.nrbchan = (hc-&gt;dslot) ? 30 : 31;</div><div class='del'>-	dch-&gt;slot = hc-&gt;dslot;</div><div class='del'>-	hc-&gt;chan[hc-&gt;dslot].dch = dch;</div><div class='del'>-	hc-&gt;chan[hc-&gt;dslot].port = 0;</div><div class='del'>-	hc-&gt;chan[hc-&gt;dslot].nt_timer = -1;</div><div class='del'>-	for (ch = 1; ch &lt;= 31; ch++) {</div><div class='del'>-		if (ch == hc-&gt;dslot) /* skip dchannel */</div><div class='del'>-			continue;</div><div class='del'>-		bch = kzalloc(sizeof(struct bchannel), GFP_KERNEL);</div><div class='del'>-		if (!bch) {</div><div class='del'>-			printk(KERN_ERR "%s: no memory for bchannel\n",</div><div class='del'>-			       __func__);</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto free_chan;</div><div class='del'>-		}</div><div class='del'>-		hc-&gt;chan[ch].coeff = kzalloc(512, GFP_KERNEL);</div><div class='del'>-		if (!hc-&gt;chan[ch].coeff) {</div><div class='del'>-			printk(KERN_ERR "%s: no memory for coeffs\n",</div><div class='del'>-			       __func__);</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			kfree(bch);</div><div class='del'>-			goto free_chan;</div><div class='del'>-		}</div><div class='del'>-		bch-&gt;nr = ch;</div><div class='del'>-		bch-&gt;slot = ch;</div><div class='del'>-		bch-&gt;debug = debug;</div><div class='del'>-		mISDN_initbchannel(bch, MAX_DATA_MEM);</div><div class='del'>-		bch-&gt;hw = hc;</div><div class='del'>-		bch-&gt;ch.send = handle_bmsg;</div><div class='del'>-		bch-&gt;ch.ctrl = hfcm_bctrl;</div><div class='del'>-		bch-&gt;ch.nr = ch;</div><div class='del'>-		list_add(&amp;bch-&gt;ch.list, &amp;dch-&gt;dev.bchannels);</div><div class='del'>-		hc-&gt;chan[ch].bch = bch;</div><div class='del'>-		hc-&gt;chan[ch].port = 0;</div><div class='del'>-		set_channelmap(bch-&gt;nr, dch-&gt;dev.channelmap);</div><div class='del'>-	}</div><div class='ctx'> 	/* set optical line type */</div><div class='ctx'> 	if (port[Port_cnt] &amp; 0x001) {</div><div class='ctx'> 		if (!m-&gt;opticalsupport)  {</div><div class='hunk'>@@ -4737,7 +4719,7 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)</div><div class='ctx'> 				       __func__,</div><div class='ctx'> 				       HFC_cnt + 1, 1);</div><div class='ctx'> 			test_and_set_bit(HFC_CFG_OPTICAL,</div><div class='del'>-					 &amp;hc-&gt;chan[hc-&gt;dslot].cfg);</div><div class='add'>+			    &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* set LOS report */</div><div class='hunk'>@@ -4747,7 +4729,7 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)</div><div class='ctx'> 			       "LOS report: card(%d) port(%d)\n",</div><div class='ctx'> 			       __func__, HFC_cnt + 1, 1);</div><div class='ctx'> 		test_and_set_bit(HFC_CFG_REPORT_LOS,</div><div class='del'>-				 &amp;hc-&gt;chan[hc-&gt;dslot].cfg);</div><div class='add'>+		    &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* set AIS report */</div><div class='ctx'> 	if (port[Port_cnt] &amp; 0x008) {</div><div class='hunk'>@@ -4756,7 +4738,7 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)</div><div class='ctx'> 			       "AIS report: card(%d) port(%d)\n",</div><div class='ctx'> 			       __func__, HFC_cnt + 1, 1);</div><div class='ctx'> 		test_and_set_bit(HFC_CFG_REPORT_AIS,</div><div class='del'>-				 &amp;hc-&gt;chan[hc-&gt;dslot].cfg);</div><div class='add'>+		    &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* set SLIP report */</div><div class='ctx'> 	if (port[Port_cnt] &amp; 0x010) {</div><div class='hunk'>@@ -4766,7 +4748,7 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)</div><div class='ctx'> 			       "card(%d) port(%d)\n",</div><div class='ctx'> 			       __func__, HFC_cnt + 1, 1);</div><div class='ctx'> 		test_and_set_bit(HFC_CFG_REPORT_SLIP,</div><div class='del'>-				 &amp;hc-&gt;chan[hc-&gt;dslot].cfg);</div><div class='add'>+		    &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* set RDI report */</div><div class='ctx'> 	if (port[Port_cnt] &amp; 0x020) {</div><div class='hunk'>@@ -4776,7 +4758,7 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)</div><div class='ctx'> 			       "card(%d) port(%d)\n",</div><div class='ctx'> 			       __func__, HFC_cnt + 1, 1);</div><div class='ctx'> 		test_and_set_bit(HFC_CFG_REPORT_RDI,</div><div class='del'>-				 &amp;hc-&gt;chan[hc-&gt;dslot].cfg);</div><div class='add'>+		    &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* set CRC-4 Mode */</div><div class='ctx'> 	if (!(port[Port_cnt] &amp; 0x100)) {</div><div class='hunk'>@@ -4785,7 +4767,7 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)</div><div class='ctx'> 			       " card(%d) port(%d)\n",</div><div class='ctx'> 			       __func__, HFC_cnt + 1, 1);</div><div class='ctx'> 		test_and_set_bit(HFC_CFG_CRC4,</div><div class='del'>-				 &amp;hc-&gt;chan[hc-&gt;dslot].cfg);</div><div class='add'>+		    &amp;hc-&gt;chan[hc-&gt;dnum[0]].cfg);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (debug &amp; DEBUG_HFCMULTI_INIT)</div><div class='ctx'> 			printk(KERN_DEBUG "%s: PORT turn off CRC4"</div><div class='hunk'>@@ -4817,20 +4799,85 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)</div><div class='ctx'> 	}</div><div class='ctx'> 	/* set elastic jitter buffer */</div><div class='ctx'> 	if (port[Port_cnt] &amp; 0x3000) {</div><div class='del'>-		hc-&gt;chan[hc-&gt;dslot].jitter = (port[Port_cnt]&gt;&gt;12) &amp; 0x3;</div><div class='add'>+		hc-&gt;chan[hc-&gt;dnum[0]].jitter = (port[Port_cnt]&gt;&gt;12) &amp; 0x3;</div><div class='ctx'> 		if (debug &amp; DEBUG_HFCMULTI_INIT)</div><div class='ctx'> 			printk(KERN_DEBUG</div><div class='ctx'> 			       "%s: PORT set elastic "</div><div class='ctx'> 			       "buffer to %d: card(%d) port(%d)\n",</div><div class='del'>-			       __func__, hc-&gt;chan[hc-&gt;dslot].jitter,</div><div class='add'>+			    __func__, hc-&gt;chan[hc-&gt;dnum[0]].jitter,</div><div class='ctx'> 			       HFC_cnt + 1, 1);</div><div class='ctx'> 	} else</div><div class='del'>-		hc-&gt;chan[hc-&gt;dslot].jitter = 2; /* default */</div><div class='del'>-	snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-e1.%d", HFC_cnt + 1);</div><div class='add'>+		hc-&gt;chan[hc-&gt;dnum[0]].jitter = 2; /* default */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+init_e1_port(struct hfc_multi *hc, struct hm_map *m, int pt)</div><div class='add'>+{</div><div class='add'>+	struct dchannel	*dch;</div><div class='add'>+	struct bchannel	*bch;</div><div class='add'>+	int		ch, ret = 0;</div><div class='add'>+	char		name[MISDN_MAX_IDLEN];</div><div class='add'>+	int		bcount = 0;</div><div class='add'>+</div><div class='add'>+	dch = kzalloc(sizeof(struct dchannel), GFP_KERNEL);</div><div class='add'>+	if (!dch)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	dch-&gt;debug = debug;</div><div class='add'>+	mISDN_initdchannel(dch, MAX_DFRAME_LEN_L1, ph_state_change);</div><div class='add'>+	dch-&gt;hw = hc;</div><div class='add'>+	dch-&gt;dev.Dprotocols = (1 &lt;&lt; ISDN_P_TE_E1) | (1 &lt;&lt; ISDN_P_NT_E1);</div><div class='add'>+	dch-&gt;dev.Bprotocols = (1 &lt;&lt; (ISDN_P_B_RAW &amp; ISDN_P_B_MASK)) |</div><div class='add'>+	    (1 &lt;&lt; (ISDN_P_B_HDLC &amp; ISDN_P_B_MASK));</div><div class='add'>+	dch-&gt;dev.D.send = handle_dmsg;</div><div class='add'>+	dch-&gt;dev.D.ctrl = hfcm_dctrl;</div><div class='add'>+	dch-&gt;slot = hc-&gt;dnum[pt];</div><div class='add'>+	hc-&gt;chan[hc-&gt;dnum[pt]].dch = dch;</div><div class='add'>+	hc-&gt;chan[hc-&gt;dnum[pt]].port = pt;</div><div class='add'>+	hc-&gt;chan[hc-&gt;dnum[pt]].nt_timer = -1;</div><div class='add'>+	for (ch = 1; ch &lt;= 31; ch++) {</div><div class='add'>+		if (!((1 &lt;&lt; ch) &amp; hc-&gt;bmask[pt])) /* skip unused channel */</div><div class='add'>+			continue;</div><div class='add'>+		bch = kzalloc(sizeof(struct bchannel), GFP_KERNEL);</div><div class='add'>+		if (!bch) {</div><div class='add'>+			printk(KERN_ERR "%s: no memory for bchannel\n",</div><div class='add'>+			    __func__);</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto free_chan;</div><div class='add'>+		}</div><div class='add'>+		hc-&gt;chan[ch].coeff = kzalloc(512, GFP_KERNEL);</div><div class='add'>+		if (!hc-&gt;chan[ch].coeff) {</div><div class='add'>+			printk(KERN_ERR "%s: no memory for coeffs\n",</div><div class='add'>+			    __func__);</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			kfree(bch);</div><div class='add'>+			goto free_chan;</div><div class='add'>+		}</div><div class='add'>+		bch-&gt;nr = ch;</div><div class='add'>+		bch-&gt;slot = ch;</div><div class='add'>+		bch-&gt;debug = debug;</div><div class='add'>+		mISDN_initbchannel(bch, MAX_DATA_MEM, poll &gt;&gt; 1);</div><div class='add'>+		bch-&gt;hw = hc;</div><div class='add'>+		bch-&gt;ch.send = handle_bmsg;</div><div class='add'>+		bch-&gt;ch.ctrl = hfcm_bctrl;</div><div class='add'>+		bch-&gt;ch.nr = ch;</div><div class='add'>+		list_add(&amp;bch-&gt;ch.list, &amp;dch-&gt;dev.bchannels);</div><div class='add'>+		hc-&gt;chan[ch].bch = bch;</div><div class='add'>+		hc-&gt;chan[ch].port = pt;</div><div class='add'>+		set_channelmap(bch-&gt;nr, dch-&gt;dev.channelmap);</div><div class='add'>+		bcount++;</div><div class='add'>+	}</div><div class='add'>+	dch-&gt;dev.nrbchan = bcount;</div><div class='add'>+	if (pt == 0)</div><div class='add'>+		init_e1_port_hw(hc, m);</div><div class='add'>+	if (hc-&gt;ports &gt; 1)</div><div class='add'>+		snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-e1.%d-%d",</div><div class='add'>+				HFC_cnt + 1, pt+1);</div><div class='add'>+	else</div><div class='add'>+		snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-e1.%d", HFC_cnt + 1);</div><div class='ctx'> 	ret = mISDN_register_device(&amp;dch-&gt;dev, &amp;hc-&gt;pci_dev-&gt;dev, name);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto free_chan;</div><div class='del'>-	hc-&gt;created[0] = 1;</div><div class='add'>+	hc-&gt;created[pt] = 1;</div><div class='ctx'> 	return ret;</div><div class='ctx'> free_chan:</div><div class='ctx'> 	release_port(hc, dch);</div><div class='hunk'>@@ -4881,7 +4928,7 @@ init_multi_port(struct hfc_multi *hc, int pt)</div><div class='ctx'> 		bch-&gt;nr = ch + 1;</div><div class='ctx'> 		bch-&gt;slot = i + ch;</div><div class='ctx'> 		bch-&gt;debug = debug;</div><div class='del'>-		mISDN_initbchannel(bch, MAX_DATA_MEM);</div><div class='add'>+		mISDN_initbchannel(bch, MAX_DATA_MEM, poll &gt;&gt; 1);</div><div class='ctx'> 		bch-&gt;hw = hc;</div><div class='ctx'> 		bch-&gt;ch.send = handle_bmsg;</div><div class='ctx'> 		bch-&gt;ch.ctrl = hfcm_bctrl;</div><div class='hunk'>@@ -4963,7 +5010,8 @@ hfcmulti_init(struct hm_map *m, struct pci_dev *pdev,</div><div class='ctx'> 	struct hfc_multi	*hc;</div><div class='ctx'> 	u_long		flags;</div><div class='ctx'> 	u_char		dips = 0, pmj = 0; /* dip settings, port mode Jumpers */</div><div class='del'>-	int		i;</div><div class='add'>+	int		i, ch;</div><div class='add'>+	u_int		maskcheck;</div><div class='ctx'> </div><div class='ctx'> 	if (HFC_cnt &gt;= MAX_CARDS) {</div><div class='ctx'> 		printk(KERN_ERR "too many cards (max=%d).\n",</div><div class='hunk'>@@ -4997,18 +5045,36 @@ hfcmulti_init(struct hm_map *m, struct pci_dev *pdev,</div><div class='ctx'> 	hc-&gt;id = HFC_cnt;</div><div class='ctx'> 	hc-&gt;pcm = pcm[HFC_cnt];</div><div class='ctx'> 	hc-&gt;io_mode = iomode[HFC_cnt];</div><div class='del'>-	if (dslot[HFC_cnt] &lt; 0 &amp;&amp; hc-&gt;ctype == HFC_TYPE_E1) {</div><div class='del'>-		hc-&gt;dslot = 0;</div><div class='del'>-		printk(KERN_INFO "HFC-E1 card has disabled D-channel, but "</div><div class='del'>-		       "31 B-channels\n");</div><div class='del'>-	}</div><div class='del'>-	if (dslot[HFC_cnt] &gt; 0 &amp;&amp; dslot[HFC_cnt] &lt; 32</div><div class='del'>-	    &amp;&amp; hc-&gt;ctype == HFC_TYPE_E1) {</div><div class='del'>-		hc-&gt;dslot = dslot[HFC_cnt];</div><div class='del'>-		printk(KERN_INFO "HFC-E1 card has alternating D-channel on "</div><div class='del'>-		       "time slot %d\n", dslot[HFC_cnt]);</div><div class='del'>-	} else</div><div class='del'>-		hc-&gt;dslot = 16;</div><div class='add'>+	if (hc-&gt;ctype == HFC_TYPE_E1 &amp;&amp; dmask[E1_cnt]) {</div><div class='add'>+		/* fragment card */</div><div class='add'>+		pt = 0;</div><div class='add'>+		maskcheck = 0;</div><div class='add'>+		for (ch = 0; ch &lt;= 31; ch++) {</div><div class='add'>+			if (!((1 &lt;&lt; ch) &amp; dmask[E1_cnt]))</div><div class='add'>+				continue;</div><div class='add'>+			hc-&gt;dnum[pt] = ch;</div><div class='add'>+			hc-&gt;bmask[pt] = bmask[bmask_cnt++];</div><div class='add'>+			if ((maskcheck &amp; hc-&gt;bmask[pt])</div><div class='add'>+			 || (dmask[E1_cnt] &amp; hc-&gt;bmask[pt])) {</div><div class='add'>+				printk(KERN_INFO</div><div class='add'>+				       "HFC-E1 #%d has overlapping B-channels on fragment #%d\n",</div><div class='add'>+				       E1_cnt + 1, pt);</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+			maskcheck |= hc-&gt;bmask[pt];</div><div class='add'>+			printk(KERN_INFO</div><div class='add'>+			       "HFC-E1 #%d uses D-channel on slot %d and a B-channel map of 0x%08x\n",</div><div class='add'>+				E1_cnt + 1, ch, hc-&gt;bmask[pt]);</div><div class='add'>+			pt++;</div><div class='add'>+		}</div><div class='add'>+		hc-&gt;ports = pt;</div><div class='add'>+	}</div><div class='add'>+	if (hc-&gt;ctype == HFC_TYPE_E1 &amp;&amp; !dmask[E1_cnt]) {</div><div class='add'>+		/* default card layout */</div><div class='add'>+		hc-&gt;dnum[0] = 16;</div><div class='add'>+		hc-&gt;bmask[0] = 0xfffefffe;</div><div class='add'>+		hc-&gt;ports = 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* set chip specific features */</div><div class='ctx'> 	hc-&gt;masterclk = -1;</div><div class='hunk'>@@ -5091,23 +5157,33 @@ hfcmulti_init(struct hm_map *m, struct pci_dev *pdev,</div><div class='ctx'> 			goto free_card;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (hc-&gt;ctype == HFC_TYPE_E1)</div><div class='del'>-			ret_err = init_e1_port(hc, m);</div><div class='add'>+			ret_err = init_e1_port(hc, m, pt);</div><div class='ctx'> 		else</div><div class='ctx'> 			ret_err = init_multi_port(hc, pt);</div><div class='ctx'> 		if (debug &amp; DEBUG_HFCMULTI_INIT)</div><div class='ctx'> 			printk(KERN_DEBUG</div><div class='del'>-			       "%s: Registering D-channel, card(%d) port(%d)"</div><div class='add'>+			    "%s: Registering D-channel, card(%d) port(%d) "</div><div class='ctx'> 			       "result %d\n",</div><div class='del'>-			       __func__, HFC_cnt + 1, pt, ret_err);</div><div class='add'>+			    __func__, HFC_cnt + 1, pt + 1, ret_err);</div><div class='ctx'> </div><div class='ctx'> 		if (ret_err) {</div><div class='ctx'> 			while (pt) { /* release already registered ports */</div><div class='ctx'> 				pt--;</div><div class='del'>-				release_port(hc, hc-&gt;chan[(pt &lt;&lt; 2) + 2].dch);</div><div class='add'>+				if (hc-&gt;ctype == HFC_TYPE_E1)</div><div class='add'>+					release_port(hc,</div><div class='add'>+						hc-&gt;chan[hc-&gt;dnum[pt]].dch);</div><div class='add'>+				else</div><div class='add'>+					release_port(hc,</div><div class='add'>+						hc-&gt;chan[(pt &lt;&lt; 2) + 2].dch);</div><div class='ctx'> 			}</div><div class='ctx'> 			goto free_card;</div><div class='ctx'> 		}</div><div class='del'>-		Port_cnt++;</div><div class='add'>+		if (hc-&gt;ctype != HFC_TYPE_E1)</div><div class='add'>+			Port_cnt++; /* for each S0 port */</div><div class='add'>+	}</div><div class='add'>+	if (hc-&gt;ctype == HFC_TYPE_E1) {</div><div class='add'>+		Port_cnt++; /* for each E1 port */</div><div class='add'>+		E1_cnt++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* disp switches */</div><div class='head'>diff --git a/drivers/isdn/hardware/mISDN/hfcpci.c b/drivers/isdn/hardware/mISDN/hfcpci.c<br/>index e2c83a2d7691..81363ffa5357 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/hfcpci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/mISDN/hfcpci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/hfcpci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/hfcpci.c</a></div><div class='hunk'>@@ -453,7 +453,7 @@ hfcpci_empty_bfifo(struct bchannel *bch, struct bzfifo *bz,</div><div class='ctx'> 		}</div><div class='ctx'> 		bz-&gt;za[new_f2].z2 = cpu_to_le16(new_z2);</div><div class='ctx'> 		bz-&gt;f2 = new_f2;	/* next buffer */</div><div class='del'>-		recv_Bchannel(bch, MISDN_ID_ANY);</div><div class='add'>+		recv_Bchannel(bch, MISDN_ID_ANY, false);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -565,11 +565,6 @@ hfcpci_empty_fifo_trans(struct bchannel *bch, struct bzfifo *rxbz,</div><div class='ctx'> 	if (new_z2 &gt;= (B_FIFO_SIZE + B_SUB_VAL))</div><div class='ctx'> 		new_z2 -= B_FIFO_SIZE;	/* buffer wrap */</div><div class='ctx'> </div><div class='del'>-	if (fcnt_rx &gt; MAX_DATA_SIZE) {	/* flush, if oversized */</div><div class='del'>-		*z2r = cpu_to_le16(new_z2);		/* new position */</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	fcnt_tx = le16_to_cpu(*z2t) - le16_to_cpu(*z1t);</div><div class='ctx'> 	if (fcnt_tx &lt;= 0)</div><div class='ctx'> 		fcnt_tx += B_FIFO_SIZE;</div><div class='hunk'>@@ -577,8 +572,16 @@ hfcpci_empty_fifo_trans(struct bchannel *bch, struct bzfifo *rxbz,</div><div class='ctx'> 	fcnt_tx = B_FIFO_SIZE - fcnt_tx;</div><div class='ctx'> 	/* remaining bytes to send (bytes in tx-fifo) */</div><div class='ctx'> </div><div class='del'>-	bch-&gt;rx_skb = mI_alloc_skb(fcnt_rx, GFP_ATOMIC);</div><div class='del'>-	if (bch-&gt;rx_skb) {</div><div class='add'>+	if (test_bit(FLG_RX_OFF, &amp;bch-&gt;Flags)) {</div><div class='add'>+		bch-&gt;dropcnt += fcnt_rx;</div><div class='add'>+		*z2r = cpu_to_le16(new_z2);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	maxlen = bchannel_get_rxbuf(bch, fcnt_rx);</div><div class='add'>+	if (maxlen &lt; 0) {</div><div class='add'>+		pr_warning("B%d: No bufferspace for %d bytes\n",</div><div class='add'>+			   bch-&gt;nr, fcnt_rx);</div><div class='add'>+	} else {</div><div class='ctx'> 		ptr = skb_put(bch-&gt;rx_skb, fcnt_rx);</div><div class='ctx'> 		if (le16_to_cpu(*z2r) + fcnt_rx &lt;= B_FIFO_SIZE + B_SUB_VAL)</div><div class='ctx'> 			maxlen = fcnt_rx;	/* complete transfer */</div><div class='hunk'>@@ -596,10 +599,8 @@ hfcpci_empty_fifo_trans(struct bchannel *bch, struct bzfifo *rxbz,</div><div class='ctx'> 			ptr1 = bdata;	/* start of buffer */</div><div class='ctx'> 			memcpy(ptr, ptr1, fcnt_rx);	/* rest */</div><div class='ctx'> 		}</div><div class='del'>-		recv_Bchannel(bch, fcnt_tx); /* bch, id */</div><div class='del'>-	} else</div><div class='del'>-		printk(KERN_WARNING "HFCPCI: receive out of memory\n");</div><div class='del'>-</div><div class='add'>+		recv_Bchannel(bch, fcnt_tx, false); /* bch, id, !force */</div><div class='add'>+	}</div><div class='ctx'> 	*z2r = cpu_to_le16(new_z2);		/* new position */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -760,9 +761,14 @@ hfcpci_fill_fifo(struct bchannel *bch)</div><div class='ctx'> </div><div class='ctx'> 	if ((bch-&gt;debug &amp; DEBUG_HW_BCHANNEL) &amp;&amp; !(bch-&gt;debug &amp; DEBUG_HW_BFIFO))</div><div class='ctx'> 		printk(KERN_DEBUG "%s\n", __func__);</div><div class='del'>-	if ((!bch-&gt;tx_skb) || bch-&gt;tx_skb-&gt;len &lt;= 0)</div><div class='del'>-		return;</div><div class='del'>-	count = bch-&gt;tx_skb-&gt;len - bch-&gt;tx_idx;</div><div class='add'>+	if ((!bch-&gt;tx_skb) || bch-&gt;tx_skb-&gt;len == 0) {</div><div class='add'>+		if (!test_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags) &amp;&amp;</div><div class='add'>+		    !test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags))</div><div class='add'>+			return;</div><div class='add'>+		count = HFCPCI_FILLEMPTY;</div><div class='add'>+	} else {</div><div class='add'>+		count = bch-&gt;tx_skb-&gt;len - bch-&gt;tx_idx;</div><div class='add'>+	}</div><div class='ctx'> 	if ((bch-&gt;nr &amp; 2) &amp;&amp; (!hc-&gt;hw.bswapped)) {</div><div class='ctx'> 		bz = &amp;((union fifo_area *)(hc-&gt;hw.fifos))-&gt;b_chans.txbz_b2;</div><div class='ctx'> 		bdata = ((union fifo_area *)(hc-&gt;hw.fifos))-&gt;b_chans.txdat_b2;</div><div class='hunk'>@@ -781,16 +787,10 @@ hfcpci_fill_fifo(struct bchannel *bch)</div><div class='ctx'> 		fcnt = le16_to_cpu(*z2t) - le16_to_cpu(*z1t);</div><div class='ctx'> 		if (fcnt &lt;= 0)</div><div class='ctx'> 			fcnt += B_FIFO_SIZE;</div><div class='del'>-		/* fcnt contains available bytes in fifo */</div><div class='del'>-		fcnt = B_FIFO_SIZE - fcnt;</div><div class='del'>-		/* remaining bytes to send (bytes in fifo) */</div><div class='del'>-</div><div class='del'>-		/* "fill fifo if empty" feature */</div><div class='del'>-		if (test_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags) &amp;&amp; !fcnt) {</div><div class='del'>-			/* printk(KERN_DEBUG "%s: buffer empty, so we have "</div><div class='del'>-			   "underrun\n", __func__); */</div><div class='del'>-			/* fill buffer, to prevent future underrun */</div><div class='del'>-			count = HFCPCI_FILLEMPTY;</div><div class='add'>+		if (test_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags)) {</div><div class='add'>+			/* fcnt contains available bytes in fifo */</div><div class='add'>+			if (count &gt; fcnt)</div><div class='add'>+				count = fcnt;</div><div class='ctx'> 			new_z1 = le16_to_cpu(*z1t) + count;</div><div class='ctx'> 			/* new buffer Position */</div><div class='ctx'> 			if (new_z1 &gt;= (B_FIFO_SIZE + B_SUB_VAL))</div><div class='hunk'>@@ -802,17 +802,20 @@ hfcpci_fill_fifo(struct bchannel *bch)</div><div class='ctx'> 				printk(KERN_DEBUG "hfcpci_FFt fillempty "</div><div class='ctx'> 				       "fcnt(%d) maxl(%d) nz1(%x) dst(%p)\n",</div><div class='ctx'> 				       fcnt, maxlen, new_z1, dst);</div><div class='del'>-			fcnt += count;</div><div class='ctx'> 			if (maxlen &gt; count)</div><div class='ctx'> 				maxlen = count;		/* limit size */</div><div class='del'>-			memset(dst, 0x2a, maxlen);	/* first copy */</div><div class='add'>+			memset(dst, bch-&gt;fill[0], maxlen); /* first copy */</div><div class='ctx'> 			count -= maxlen;		/* remaining bytes */</div><div class='ctx'> 			if (count) {</div><div class='ctx'> 				dst = bdata;		/* start of buffer */</div><div class='del'>-				memset(dst, 0x2a, count);</div><div class='add'>+				memset(dst, bch-&gt;fill[0], count);</div><div class='ctx'> 			}</div><div class='ctx'> 			*z1t = cpu_to_le16(new_z1);	/* now send data */</div><div class='add'>+			return;</div><div class='ctx'> 		}</div><div class='add'>+		/* fcnt contains available bytes in fifo */</div><div class='add'>+		fcnt = B_FIFO_SIZE - fcnt;</div><div class='add'>+		/* remaining bytes to send (bytes in fifo) */</div><div class='ctx'> </div><div class='ctx'> 	next_t_frame:</div><div class='ctx'> 		count = bch-&gt;tx_skb-&gt;len - bch-&gt;tx_idx;</div><div class='hunk'>@@ -849,9 +852,6 @@ hfcpci_fill_fifo(struct bchannel *bch)</div><div class='ctx'> 		*z1t = cpu_to_le16(new_z1);	/* now send data */</div><div class='ctx'> 		if (bch-&gt;tx_idx &lt; bch-&gt;tx_skb-&gt;len)</div><div class='ctx'> 			return;</div><div class='del'>-		/* send confirm, on trans, free on hdlc. */</div><div class='del'>-		if (test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags))</div><div class='del'>-			confirm_Bsend(bch);</div><div class='ctx'> 		dev_kfree_skb(bch-&gt;tx_skb);</div><div class='ctx'> 		if (get_next_bframe(bch))</div><div class='ctx'> 			goto next_t_frame;</div><div class='hunk'>@@ -1533,24 +1533,7 @@ deactivate_bchannel(struct bchannel *bch)</div><div class='ctx'> static int</div><div class='ctx'> channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)</div><div class='ctx'> {</div><div class='del'>-	int	ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (cq-&gt;op) {</div><div class='del'>-	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = MISDN_CTRL_FILL_EMPTY;</div><div class='del'>-		break;</div><div class='del'>-	case MISDN_CTRL_FILL_EMPTY: /* fill fifo, if empty */</div><div class='del'>-		test_and_set_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags);</div><div class='del'>-		if (debug &amp; DEBUG_HW_OPEN)</div><div class='del'>-			printk(KERN_DEBUG "%s: FILL_EMPTY request (nr=%d "</div><div class='del'>-			       "off=%d)\n", __func__, bch-&gt;nr, !!cq-&gt;p1);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		printk(KERN_WARNING "%s: unknown Op %x\n", __func__, cq-&gt;op);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return mISDN_ctrl_bchannel(bch, cq);</div><div class='ctx'> }</div><div class='ctx'> static int</div><div class='ctx'> hfc_bctrl(struct mISDNchannel *ch, u_int cmd, void *arg)</div><div class='hunk'>@@ -1581,8 +1564,7 @@ hfc_bctrl(struct mISDNchannel *ch, u_int cmd, void *arg)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CLOSE_CHANNEL:</div><div class='ctx'> 		test_and_clear_bit(FLG_OPEN, &amp;bch-&gt;Flags);</div><div class='del'>-		if (test_bit(FLG_ACTIVE, &amp;bch-&gt;Flags))</div><div class='del'>-			deactivate_bchannel(bch);</div><div class='add'>+		deactivate_bchannel(bch);</div><div class='ctx'> 		ch-&gt;protocol = ISDN_P_NONE;</div><div class='ctx'> 		ch-&gt;peer = NULL;</div><div class='ctx'> 		module_put(THIS_MODULE);</div><div class='hunk'>@@ -1692,22 +1674,17 @@ hfcpci_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 	struct hfc_pci		*hc = bch-&gt;hw;</div><div class='ctx'> 	int			ret = -EINVAL;</div><div class='ctx'> 	struct mISDNhead	*hh = mISDN_HEAD_P(skb);</div><div class='del'>-	unsigned int		id;</div><div class='del'>-	u_long			flags;</div><div class='add'>+	unsigned long		flags;</div><div class='ctx'> </div><div class='ctx'> 	switch (hh-&gt;prim) {</div><div class='ctx'> 	case PH_DATA_REQ:</div><div class='ctx'> 		spin_lock_irqsave(&amp;hc-&gt;lock, flags);</div><div class='ctx'> 		ret = bchannel_senddata(bch, skb);</div><div class='ctx'> 		if (ret &gt; 0) { /* direct TX */</div><div class='del'>-			id = hh-&gt;id; /* skb can be freed */</div><div class='ctx'> 			hfcpci_fill_fifo(bch);</div><div class='ctx'> 			ret = 0;</div><div class='del'>-			spin_unlock_irqrestore(&amp;hc-&gt;lock, flags);</div><div class='del'>-			if (!test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags))</div><div class='del'>-				queue_ch_frame(ch, PH_DATA_CNF, id, NULL);</div><div class='del'>-		} else</div><div class='del'>-			spin_unlock_irqrestore(&amp;hc-&gt;lock, flags);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;hc-&gt;lock, flags);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	case PH_ACTIVATE_REQ:</div><div class='ctx'> 		spin_lock_irqsave(&amp;hc-&gt;lock, flags);</div><div class='hunk'>@@ -1819,7 +1796,7 @@ channel_ctrl(struct hfc_pci *hc, struct mISDN_ctrl_req *cq)</div><div class='ctx'> 	switch (cq-&gt;op) {</div><div class='ctx'> 	case MISDN_CTRL_GETOP:</div><div class='ctx'> 		cq-&gt;op = MISDN_CTRL_LOOP | MISDN_CTRL_CONNECT |</div><div class='del'>-			MISDN_CTRL_DISCONNECT;</div><div class='add'>+			 MISDN_CTRL_DISCONNECT | MISDN_CTRL_L1_TIMER3;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MISDN_CTRL_LOOP:</div><div class='ctx'> 		/* channel 0 disabled loop */</div><div class='hunk'>@@ -1896,6 +1873,9 @@ channel_ctrl(struct hfc_pci *hc, struct mISDN_ctrl_req *cq)</div><div class='ctx'> 		Write_hfc(hc, HFCPCI_CONNECT, hc-&gt;hw.conn);</div><div class='ctx'> 		hc-&gt;hw.trm &amp;= 0x7f;	/* disable IOM-loop */</div><div class='ctx'> 		break;</div><div class='add'>+	case MISDN_CTRL_L1_TIMER3:</div><div class='add'>+		ret = l1_event(hc-&gt;dch.l1, HW_TIMER3_VALUE | (cq-&gt;p1 &amp; 0xff));</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		printk(KERN_WARNING "%s: unknown Op %x\n",</div><div class='ctx'> 		       __func__, cq-&gt;op);</div><div class='hunk'>@@ -1969,7 +1949,6 @@ open_bchannel(struct hfc_pci *hc, struct channel_req *rq)</div><div class='ctx'> 	bch = &amp;hc-&gt;bch[rq-&gt;adr.channel - 1];</div><div class='ctx'> 	if (test_and_set_bit(FLG_OPEN, &amp;bch-&gt;Flags))</div><div class='ctx'> 		return -EBUSY; /* b-channel can be only open once */</div><div class='del'>-	test_and_clear_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags);</div><div class='ctx'> 	bch-&gt;ch.protocol = rq-&gt;protocol;</div><div class='ctx'> 	rq-&gt;ch = &amp;bch-&gt;ch; /* TODO: E-channel */</div><div class='ctx'> 	if (!try_module_get(THIS_MODULE))</div><div class='hunk'>@@ -2121,7 +2100,7 @@ setup_card(struct hfc_pci *card)</div><div class='ctx'> 		card-&gt;bch[i].nr = i + 1;</div><div class='ctx'> 		set_channelmap(i + 1, card-&gt;dch.dev.channelmap);</div><div class='ctx'> 		card-&gt;bch[i].debug = debug;</div><div class='del'>-		mISDN_initbchannel(&amp;card-&gt;bch[i], MAX_DATA_MEM);</div><div class='add'>+		mISDN_initbchannel(&amp;card-&gt;bch[i], MAX_DATA_MEM, poll &gt;&gt; 1);</div><div class='ctx'> 		card-&gt;bch[i].hw = card;</div><div class='ctx'> 		card-&gt;bch[i].ch.send = hfcpci_l2l1B;</div><div class='ctx'> 		card-&gt;bch[i].ch.ctrl = hfc_bctrl;</div><div class='head'>diff --git a/drivers/isdn/hardware/mISDN/hfcsusb.c b/drivers/isdn/hardware/mISDN/hfcsusb.c<br/>index 8cde2a0538ab..c65c3440cd70 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/hfcsusb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/mISDN/hfcsusb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/hfcsusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/hfcsusb.c</a></div><div class='hunk'>@@ -226,19 +226,12 @@ hfcusb_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 		if (debug &amp; DBG_HFC_CALL_TRACE)</div><div class='ctx'> 			printk(KERN_DEBUG "%s: %s PH_DATA_REQ ret(%i)\n",</div><div class='ctx'> 			       hw-&gt;name, __func__, ret);</div><div class='del'>-		if (ret &gt; 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * other l1 drivers don't send early confirms on</div><div class='del'>-			 * transp data, but hfcsusb does because tx_next</div><div class='del'>-			 * skb is needed in tx_iso_complete()</div><div class='del'>-			 */</div><div class='del'>-			queue_ch_frame(ch, PH_DATA_CNF, hh-&gt;id, NULL);</div><div class='add'>+		if (ret &gt; 0)</div><div class='ctx'> 			ret = 0;</div><div class='del'>-		}</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	case PH_ACTIVATE_REQ:</div><div class='ctx'> 		if (!test_and_set_bit(FLG_ACTIVE, &amp;bch-&gt;Flags)) {</div><div class='del'>-			hfcsusb_start_endpoint(hw, bch-&gt;nr);</div><div class='add'>+			hfcsusb_start_endpoint(hw, bch-&gt;nr - 1);</div><div class='ctx'> 			ret = hfcsusb_setup_bch(bch, ch-&gt;protocol);</div><div class='ctx'> 		} else</div><div class='ctx'> 			ret = 0;</div><div class='hunk'>@@ -498,16 +491,9 @@ open_bchannel(struct hfcsusb *hw, struct channel_req *rq)</div><div class='ctx'> 	bch = &amp;hw-&gt;bch[rq-&gt;adr.channel - 1];</div><div class='ctx'> 	if (test_and_set_bit(FLG_OPEN, &amp;bch-&gt;Flags))</div><div class='ctx'> 		return -EBUSY; /* b-channel can be only open once */</div><div class='del'>-	test_and_clear_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags);</div><div class='ctx'> 	bch-&gt;ch.protocol = rq-&gt;protocol;</div><div class='ctx'> 	rq-&gt;ch = &amp;bch-&gt;ch;</div><div class='ctx'> </div><div class='del'>-	/* start USB endpoint for bchannel */</div><div class='del'>-	if (rq-&gt;adr.channel  == 1)</div><div class='del'>-		hfcsusb_start_endpoint(hw, HFC_CHAN_B1);</div><div class='del'>-	else</div><div class='del'>-		hfcsusb_start_endpoint(hw, HFC_CHAN_B2);</div><div class='del'>-</div><div class='ctx'> 	if (!try_module_get(THIS_MODULE))</div><div class='ctx'> 		printk(KERN_WARNING "%s: %s:cannot get module\n",</div><div class='ctx'> 		       hw-&gt;name, __func__);</div><div class='hunk'>@@ -819,24 +805,7 @@ hfcsusb_ph_command(struct hfcsusb *hw, u_char command)</div><div class='ctx'> static int</div><div class='ctx'> channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)</div><div class='ctx'> {</div><div class='del'>-	int	ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (cq-&gt;op) {</div><div class='del'>-	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = MISDN_CTRL_FILL_EMPTY;</div><div class='del'>-		break;</div><div class='del'>-	case MISDN_CTRL_FILL_EMPTY: /* fill fifo, if empty */</div><div class='del'>-		test_and_set_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags);</div><div class='del'>-		if (debug &amp; DEBUG_HW_OPEN)</div><div class='del'>-			printk(KERN_DEBUG "%s: FILL_EMPTY request (nr=%d "</div><div class='del'>-			       "off=%d)\n", __func__, bch-&gt;nr, !!cq-&gt;p1);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		printk(KERN_WARNING "%s: unknown Op %x\n", __func__, cq-&gt;op);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return mISDN_ctrl_bchannel(bch, cq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* collect data from incoming interrupt or isochron USB data */</div><div class='hunk'>@@ -873,7 +842,21 @@ hfcsusb_rx_frame(struct usb_fifo *fifo, __u8 *data, unsigned int len,</div><div class='ctx'> 		hdlc = 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (fifo-&gt;bch) {</div><div class='add'>+		if (test_bit(FLG_RX_OFF, &amp;fifo-&gt;bch-&gt;Flags)) {</div><div class='add'>+			fifo-&gt;bch-&gt;dropcnt += len;</div><div class='add'>+			spin_unlock(&amp;hw-&gt;lock);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		maxlen = bchannel_get_rxbuf(fifo-&gt;bch, len);</div><div class='ctx'> 		rx_skb = fifo-&gt;bch-&gt;rx_skb;</div><div class='add'>+		if (maxlen &lt; 0) {</div><div class='add'>+			if (rx_skb)</div><div class='add'>+				skb_trim(rx_skb, 0);</div><div class='add'>+			pr_warning("%s.B%d: No bufferspace for %d bytes\n",</div><div class='add'>+				   hw-&gt;name, fifo-&gt;bch-&gt;nr, len);</div><div class='add'>+			spin_unlock(&amp;hw-&gt;lock);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='ctx'> 		maxlen = fifo-&gt;bch-&gt;maxlen;</div><div class='ctx'> 		hdlc = test_bit(FLG_HDLC, &amp;fifo-&gt;bch-&gt;Flags);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -883,25 +866,22 @@ hfcsusb_rx_frame(struct usb_fifo *fifo, __u8 *data, unsigned int len,</div><div class='ctx'> 		hdlc = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!rx_skb) {</div><div class='del'>-		rx_skb = mI_alloc_skb(maxlen, GFP_ATOMIC);</div><div class='del'>-		if (rx_skb) {</div><div class='del'>-			if (fifo-&gt;dch)</div><div class='del'>-				fifo-&gt;dch-&gt;rx_skb = rx_skb;</div><div class='del'>-			if (fifo-&gt;bch)</div><div class='del'>-				fifo-&gt;bch-&gt;rx_skb = rx_skb;</div><div class='del'>-			if (fifo-&gt;ech)</div><div class='del'>-				fifo-&gt;ech-&gt;rx_skb = rx_skb;</div><div class='del'>-			skb_trim(rx_skb, 0);</div><div class='del'>-		} else {</div><div class='del'>-			printk(KERN_DEBUG "%s: %s: No mem for rx_skb\n",</div><div class='del'>-			       hw-&gt;name, __func__);</div><div class='del'>-			spin_unlock(&amp;hw-&gt;lock);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (fifo-&gt;dch || fifo-&gt;ech) {</div><div class='add'>+		if (!rx_skb) {</div><div class='add'>+			rx_skb = mI_alloc_skb(maxlen, GFP_ATOMIC);</div><div class='add'>+			if (rx_skb) {</div><div class='add'>+				if (fifo-&gt;dch)</div><div class='add'>+					fifo-&gt;dch-&gt;rx_skb = rx_skb;</div><div class='add'>+				if (fifo-&gt;ech)</div><div class='add'>+					fifo-&gt;ech-&gt;rx_skb = rx_skb;</div><div class='add'>+				skb_trim(rx_skb, 0);</div><div class='add'>+			} else {</div><div class='add'>+				printk(KERN_DEBUG "%s: %s: No mem for rx_skb\n",</div><div class='add'>+				       hw-&gt;name, __func__);</div><div class='add'>+				spin_unlock(&amp;hw-&gt;lock);</div><div class='add'>+				return;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 		/* D/E-Channel SKB range check */</div><div class='ctx'> 		if ((rx_skb-&gt;len + len) &gt;= MAX_DFRAME_LEN_L1) {</div><div class='ctx'> 			printk(KERN_DEBUG "%s: %s: sbk mem exceeded "</div><div class='hunk'>@@ -911,16 +891,6 @@ hfcsusb_rx_frame(struct usb_fifo *fifo, __u8 *data, unsigned int len,</div><div class='ctx'> 			spin_unlock(&amp;hw-&gt;lock);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='del'>-	} else if (fifo-&gt;bch) {</div><div class='del'>-		/* B-Channel SKB range check */</div><div class='del'>-		if ((rx_skb-&gt;len + len) &gt;= (MAX_BCH_SIZE + 3)) {</div><div class='del'>-			printk(KERN_DEBUG "%s: %s: sbk mem exceeded "</div><div class='del'>-			       "for fifo(%d) HFCUSB_B_RX\n",</div><div class='del'>-			       hw-&gt;name, __func__, fifon);</div><div class='del'>-			skb_trim(rx_skb, 0);</div><div class='del'>-			spin_unlock(&amp;hw-&gt;lock);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memcpy(skb_put(rx_skb, len), data, len);</div><div class='hunk'>@@ -948,7 +918,8 @@ hfcsusb_rx_frame(struct usb_fifo *fifo, __u8 *data, unsigned int len,</div><div class='ctx'> 				if (fifo-&gt;dch)</div><div class='ctx'> 					recv_Dchannel(fifo-&gt;dch);</div><div class='ctx'> 				if (fifo-&gt;bch)</div><div class='del'>-					recv_Bchannel(fifo-&gt;bch, MISDN_ID_ANY);</div><div class='add'>+					recv_Bchannel(fifo-&gt;bch, MISDN_ID_ANY,</div><div class='add'>+						      0);</div><div class='ctx'> 				if (fifo-&gt;ech)</div><div class='ctx'> 					recv_Echannel(fifo-&gt;ech,</div><div class='ctx'> 						      &amp;hw-&gt;dch);</div><div class='hunk'>@@ -969,8 +940,7 @@ hfcsusb_rx_frame(struct usb_fifo *fifo, __u8 *data, unsigned int len,</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* deliver transparent data to layer2 */</div><div class='del'>-		if (rx_skb-&gt;len &gt;= poll)</div><div class='del'>-			recv_Bchannel(fifo-&gt;bch, MISDN_ID_ANY);</div><div class='add'>+		recv_Bchannel(fifo-&gt;bch, MISDN_ID_ANY, false);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock(&amp;hw-&gt;lock);</div><div class='ctx'> }</div><div class='hunk'>@@ -1200,8 +1170,8 @@ tx_iso_complete(struct urb *urb)</div><div class='ctx'> 	int k, tx_offset, num_isoc_packets, sink, remain, current_len,</div><div class='ctx'> 		errcode, hdlc, i;</div><div class='ctx'> 	int *tx_idx;</div><div class='del'>-	int frame_complete, fifon, status;</div><div class='del'>-	__u8 threshbit;</div><div class='add'>+	int frame_complete, fifon, status, fillempty = 0;</div><div class='add'>+	__u8 threshbit, *p;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;hw-&gt;lock);</div><div class='ctx'> 	if (fifo-&gt;stop_gracefull) {</div><div class='hunk'>@@ -1219,6 +1189,9 @@ tx_iso_complete(struct urb *urb)</div><div class='ctx'> 		tx_skb = fifo-&gt;bch-&gt;tx_skb;</div><div class='ctx'> 		tx_idx = &amp;fifo-&gt;bch-&gt;tx_idx;</div><div class='ctx'> 		hdlc = test_bit(FLG_HDLC, &amp;fifo-&gt;bch-&gt;Flags);</div><div class='add'>+		if (!tx_skb &amp;&amp; !hdlc &amp;&amp;</div><div class='add'>+		    test_bit(FLG_FILLEMPTY, &amp;fifo-&gt;bch-&gt;Flags))</div><div class='add'>+			fillempty = 1;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		printk(KERN_DEBUG "%s: %s: neither BCH nor DCH\n",</div><div class='ctx'> 		       hw-&gt;name, __func__);</div><div class='hunk'>@@ -1277,6 +1250,8 @@ tx_iso_complete(struct urb *urb)</div><div class='ctx'> 			/* Generate next ISO Packets */</div><div class='ctx'> 			if (tx_skb)</div><div class='ctx'> 				remain = tx_skb-&gt;len - *tx_idx;</div><div class='add'>+			else if (fillempty)</div><div class='add'>+				remain = 15; /* &gt; not complete */</div><div class='ctx'> 			else</div><div class='ctx'> 				remain = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1307,15 +1282,20 @@ tx_iso_complete(struct urb *urb)</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				/* copy tx data to iso-urb buffer */</div><div class='del'>-				memcpy(context_iso_urb-&gt;buffer + tx_offset + 1,</div><div class='del'>-				       (tx_skb-&gt;data + *tx_idx), current_len);</div><div class='del'>-				*tx_idx += current_len;</div><div class='del'>-</div><div class='add'>+				p = context_iso_urb-&gt;buffer + tx_offset + 1;</div><div class='add'>+				if (fillempty) {</div><div class='add'>+					memset(p, fifo-&gt;bch-&gt;fill[0],</div><div class='add'>+					       current_len);</div><div class='add'>+				} else {</div><div class='add'>+					memcpy(p, (tx_skb-&gt;data + *tx_idx),</div><div class='add'>+					       current_len);</div><div class='add'>+					*tx_idx += current_len;</div><div class='add'>+				}</div><div class='ctx'> 				urb-&gt;iso_frame_desc[k].offset = tx_offset;</div><div class='ctx'> 				urb-&gt;iso_frame_desc[k].length = current_len + 1;</div><div class='ctx'> </div><div class='ctx'> 				/* USB data log for every D ISO out */</div><div class='del'>-				if ((fifon == HFCUSB_D_RX) &amp;&amp;</div><div class='add'>+				if ((fifon == HFCUSB_D_RX) &amp;&amp; !fillempty &amp;&amp;</div><div class='ctx'> 				    (debug &amp; DBG_HFC_USB_VERBOSE)) {</div><div class='ctx'> 					printk(KERN_DEBUG</div><div class='ctx'> 					       "%s: %s (%d/%d) offs(%d) len(%d) ",</div><div class='hunk'>@@ -1365,12 +1345,8 @@ tx_iso_complete(struct urb *urb)</div><div class='ctx'> 				if (fifo-&gt;dch &amp;&amp; get_next_dframe(fifo-&gt;dch))</div><div class='ctx'> 					tx_skb = fifo-&gt;dch-&gt;tx_skb;</div><div class='ctx'> 				else if (fifo-&gt;bch &amp;&amp;</div><div class='del'>-					 get_next_bframe(fifo-&gt;bch)) {</div><div class='del'>-					if (test_bit(FLG_TRANSPARENT,</div><div class='del'>-						     &amp;fifo-&gt;bch-&gt;Flags))</div><div class='del'>-						confirm_Bsend(fifo-&gt;bch);</div><div class='add'>+					 get_next_bframe(fifo-&gt;bch))</div><div class='ctx'> 					tx_skb = fifo-&gt;bch-&gt;tx_skb;</div><div class='del'>-				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		errcode = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='hunk'>@@ -1812,7 +1788,7 @@ deactivate_bchannel(struct bchannel *bch)</div><div class='ctx'> 	mISDN_clear_bchannel(bch);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;hw-&gt;lock, flags);</div><div class='ctx'> 	hfcsusb_setup_bch(bch, ISDN_P_NONE);</div><div class='del'>-	hfcsusb_stop_endpoint(hw, bch-&gt;nr);</div><div class='add'>+	hfcsusb_stop_endpoint(hw, bch-&gt;nr - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1836,8 +1812,7 @@ hfc_bctrl(struct mISDNchannel *ch, u_int cmd, void *arg)</div><div class='ctx'> </div><div class='ctx'> 	case CLOSE_CHANNEL:</div><div class='ctx'> 		test_and_clear_bit(FLG_OPEN, &amp;bch-&gt;Flags);</div><div class='del'>-		if (test_bit(FLG_ACTIVE, &amp;bch-&gt;Flags))</div><div class='del'>-			deactivate_bchannel(bch);</div><div class='add'>+		deactivate_bchannel(bch);</div><div class='ctx'> 		ch-&gt;protocol = ISDN_P_NONE;</div><div class='ctx'> 		ch-&gt;peer = NULL;</div><div class='ctx'> 		module_put(THIS_MODULE);</div><div class='hunk'>@@ -1883,7 +1858,7 @@ setup_instance(struct hfcsusb *hw, struct device *parent)</div><div class='ctx'> 		hw-&gt;bch[i].nr = i + 1;</div><div class='ctx'> 		set_channelmap(i + 1, hw-&gt;dch.dev.channelmap);</div><div class='ctx'> 		hw-&gt;bch[i].debug = debug;</div><div class='del'>-		mISDN_initbchannel(&amp;hw-&gt;bch[i], MAX_DATA_MEM);</div><div class='add'>+		mISDN_initbchannel(&amp;hw-&gt;bch[i], MAX_DATA_MEM, poll &gt;&gt; 1);</div><div class='ctx'> 		hw-&gt;bch[i].hw = hw;</div><div class='ctx'> 		hw-&gt;bch[i].ch.send = hfcusb_l2l1B;</div><div class='ctx'> 		hw-&gt;bch[i].ch.ctrl = hfc_bctrl;</div><div class='hunk'>@@ -2151,6 +2126,7 @@ static struct usb_driver hfcsusb_drv = {</div><div class='ctx'> 	.id_table = hfcsusb_idtab,</div><div class='ctx'> 	.probe = hfcsusb_probe,</div><div class='ctx'> 	.disconnect = hfcsusb_disconnect,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(hfcsusb_drv);</div><div class='head'>diff --git a/drivers/isdn/hardware/mISDN/hfcsusb.h b/drivers/isdn/hardware/mISDN/hfcsusb.h<br/>index cb1231b08f78..4157311d569d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/hfcsusb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/mISDN/hfcsusb.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/hfcsusb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/hfcsusb.h</a></div><div class='hunk'>@@ -410,6 +410,12 @@ static struct usb_device_id hfcsusb_idtab[] = {</div><div class='ctx'> 			{LED_SCHEME1, {0x88, -64, -32, -16},</div><div class='ctx'> 					"ZyXEL OMNI.NET USB II"}),</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		USB_DEVICE(0x1ae7, 0x0525),</div><div class='add'>+		.driver_info = (unsigned long) &amp;((struct hfcsusb_vdata)</div><div class='add'>+			{LED_SCHEME1, {0x88, -64, -32, -16},</div><div class='add'>+					"X-Tensions USB ISDN TA XC-525"}),</div><div class='add'>+	},</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/isdn/hardware/mISDN/mISDNipac.c b/drivers/isdn/hardware/mISDN/mISDNipac.c<br/>index 884369f09cad..752e0825591f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/mISDNipac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/mISDN/mISDNipac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/mISDNipac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/mISDNipac.c</a></div><div class='hunk'>@@ -603,10 +603,11 @@ isac_l1hw(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-isac_ctrl(struct isac_hw *isac, u32 cmd, u_long para)</div><div class='add'>+isac_ctrl(struct isac_hw *isac, u32 cmd, unsigned long para)</div><div class='ctx'> {</div><div class='ctx'> 	u8 tl = 0;</div><div class='del'>-	u_long flags;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case HW_TESTLOOP:</div><div class='hunk'>@@ -626,12 +627,15 @@ isac_ctrl(struct isac_hw *isac, u32 cmd, u_long para)</div><div class='ctx'> 		}</div><div class='ctx'> 		spin_unlock_irqrestore(isac-&gt;hwlock, flags);</div><div class='ctx'> 		break;</div><div class='add'>+	case HW_TIMER3_VALUE:</div><div class='add'>+		ret = l1_event(isac-&gt;dch.l1, HW_TIMER3_VALUE | (para &amp; 0xff));</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_debug("%s: %s unknown command %x %lx\n", isac-&gt;name,</div><div class='ctx'> 			 __func__, cmd, para);</div><div class='del'>-		return -1;</div><div class='add'>+		ret = -1;</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -929,22 +933,21 @@ static void</div><div class='ctx'> hscx_empty_fifo(struct hscx_hw *hscx, u8 count)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *p;</div><div class='add'>+	int maxlen;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: B%1d %d\n", hscx-&gt;ip-&gt;name, hscx-&gt;bch.nr, count);</div><div class='del'>-	if (!hscx-&gt;bch.rx_skb) {</div><div class='del'>-		hscx-&gt;bch.rx_skb = mI_alloc_skb(hscx-&gt;bch.maxlen, GFP_ATOMIC);</div><div class='del'>-		if (!hscx-&gt;bch.rx_skb) {</div><div class='del'>-			pr_info("%s: B receive out of memory\n",</div><div class='del'>-				hscx-&gt;ip-&gt;name);</div><div class='del'>-			hscx_cmdr(hscx, 0x80); /* RMC */</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='add'>+	if (test_bit(FLG_RX_OFF, &amp;hscx-&gt;bch.Flags)) {</div><div class='add'>+		hscx-&gt;bch.dropcnt += count;</div><div class='add'>+		hscx_cmdr(hscx, 0x80); /* RMC */</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='del'>-	if ((hscx-&gt;bch.rx_skb-&gt;len + count) &gt; hscx-&gt;bch.maxlen) {</div><div class='del'>-		pr_debug("%s: overrun %d\n", hscx-&gt;ip-&gt;name,</div><div class='del'>-			 hscx-&gt;bch.rx_skb-&gt;len + count);</div><div class='del'>-		skb_trim(hscx-&gt;bch.rx_skb, 0);</div><div class='add'>+	maxlen = bchannel_get_rxbuf(&amp;hscx-&gt;bch, count);</div><div class='add'>+	if (maxlen &lt; 0) {</div><div class='ctx'> 		hscx_cmdr(hscx, 0x80); /* RMC */</div><div class='add'>+		if (hscx-&gt;bch.rx_skb)</div><div class='add'>+			skb_trim(hscx-&gt;bch.rx_skb, 0);</div><div class='add'>+		pr_warning("%s.B%d: No bufferspace for %d bytes\n",</div><div class='add'>+			   hscx-&gt;ip-&gt;name, hscx-&gt;bch.nr, count);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	p = skb_put(hscx-&gt;bch.rx_skb, count);</div><div class='hunk'>@@ -971,22 +974,28 @@ hscx_fill_fifo(struct hscx_hw *hscx)</div><div class='ctx'> 	int count, more;</div><div class='ctx'> 	u8 *p;</div><div class='ctx'> </div><div class='del'>-	if (!hscx-&gt;bch.tx_skb)</div><div class='del'>-		return;</div><div class='del'>-	count = hscx-&gt;bch.tx_skb-&gt;len - hscx-&gt;bch.tx_idx;</div><div class='del'>-	if (count &lt;= 0)</div><div class='del'>-		return;</div><div class='del'>-	p = hscx-&gt;bch.tx_skb-&gt;data + hscx-&gt;bch.tx_idx;</div><div class='del'>-</div><div class='del'>-	more = test_bit(FLG_TRANSPARENT, &amp;hscx-&gt;bch.Flags) ? 1 : 0;</div><div class='del'>-	if (count &gt; hscx-&gt;fifo_size) {</div><div class='add'>+	if (!hscx-&gt;bch.tx_skb) {</div><div class='add'>+		if (!test_bit(FLG_TX_EMPTY, &amp;hscx-&gt;bch.Flags))</div><div class='add'>+			return;</div><div class='ctx'> 		count = hscx-&gt;fifo_size;</div><div class='ctx'> 		more = 1;</div><div class='del'>-	}</div><div class='del'>-	pr_debug("%s: B%1d %d/%d/%d\n", hscx-&gt;ip-&gt;name, hscx-&gt;bch.nr, count,</div><div class='del'>-		 hscx-&gt;bch.tx_idx, hscx-&gt;bch.tx_skb-&gt;len);</div><div class='del'>-	hscx-&gt;bch.tx_idx += count;</div><div class='add'>+		p = hscx-&gt;log;</div><div class='add'>+		memset(p, hscx-&gt;bch.fill[0], count);</div><div class='add'>+	} else {</div><div class='add'>+		count = hscx-&gt;bch.tx_skb-&gt;len - hscx-&gt;bch.tx_idx;</div><div class='add'>+		if (count &lt;= 0)</div><div class='add'>+			return;</div><div class='add'>+		p = hscx-&gt;bch.tx_skb-&gt;data + hscx-&gt;bch.tx_idx;</div><div class='ctx'> </div><div class='add'>+		more = test_bit(FLG_TRANSPARENT, &amp;hscx-&gt;bch.Flags) ? 1 : 0;</div><div class='add'>+		if (count &gt; hscx-&gt;fifo_size) {</div><div class='add'>+			count = hscx-&gt;fifo_size;</div><div class='add'>+			more = 1;</div><div class='add'>+		}</div><div class='add'>+		pr_debug("%s: B%1d %d/%d/%d\n", hscx-&gt;ip-&gt;name, hscx-&gt;bch.nr,</div><div class='add'>+			 count, hscx-&gt;bch.tx_idx, hscx-&gt;bch.tx_skb-&gt;len);</div><div class='add'>+		hscx-&gt;bch.tx_idx += count;</div><div class='add'>+	}</div><div class='ctx'> 	if (hscx-&gt;ip-&gt;type &amp; IPAC_TYPE_IPACX)</div><div class='ctx'> 		hscx-&gt;ip-&gt;write_fifo(hscx-&gt;ip-&gt;hw,</div><div class='ctx'> 				     hscx-&gt;off + IPACX_XFIFOB, p, count);</div><div class='hunk'>@@ -997,7 +1006,7 @@ hscx_fill_fifo(struct hscx_hw *hscx)</div><div class='ctx'> 	}</div><div class='ctx'> 	hscx_cmdr(hscx, more ? 0x08 : 0x0a);</div><div class='ctx'> </div><div class='del'>-	if (hscx-&gt;bch.debug &amp; DEBUG_HW_BFIFO) {</div><div class='add'>+	if (hscx-&gt;bch.tx_skb &amp;&amp; (hscx-&gt;bch.debug &amp; DEBUG_HW_BFIFO)) {</div><div class='ctx'> 		snprintf(hscx-&gt;log, 64, "B%1d-send %s %d ",</div><div class='ctx'> 			 hscx-&gt;bch.nr, hscx-&gt;ip-&gt;name, count);</div><div class='ctx'> 		print_hex_dump_bytes(hscx-&gt;log, DUMP_PREFIX_OFFSET, p, count);</div><div class='hunk'>@@ -1007,17 +1016,17 @@ hscx_fill_fifo(struct hscx_hw *hscx)</div><div class='ctx'> static void</div><div class='ctx'> hscx_xpr(struct hscx_hw *hx)</div><div class='ctx'> {</div><div class='del'>-	if (hx-&gt;bch.tx_skb &amp;&amp; hx-&gt;bch.tx_idx &lt; hx-&gt;bch.tx_skb-&gt;len)</div><div class='add'>+	if (hx-&gt;bch.tx_skb &amp;&amp; hx-&gt;bch.tx_idx &lt; hx-&gt;bch.tx_skb-&gt;len) {</div><div class='ctx'> 		hscx_fill_fifo(hx);</div><div class='del'>-	else {</div><div class='del'>-		if (hx-&gt;bch.tx_skb) {</div><div class='del'>-			/* send confirm, on trans, free on hdlc. */</div><div class='del'>-			if (test_bit(FLG_TRANSPARENT, &amp;hx-&gt;bch.Flags))</div><div class='del'>-				confirm_Bsend(&amp;hx-&gt;bch);</div><div class='add'>+	} else {</div><div class='add'>+		if (hx-&gt;bch.tx_skb)</div><div class='ctx'> 			dev_kfree_skb(hx-&gt;bch.tx_skb);</div><div class='del'>-		}</div><div class='del'>-		if (get_next_bframe(&amp;hx-&gt;bch))</div><div class='add'>+		if (get_next_bframe(&amp;hx-&gt;bch)) {</div><div class='add'>+			hscx_fill_fifo(hx);</div><div class='add'>+			test_and_clear_bit(FLG_TX_EMPTY, &amp;hx-&gt;bch.Flags);</div><div class='add'>+		} else if (test_bit(FLG_TX_EMPTY, &amp;hx-&gt;bch.Flags)) {</div><div class='ctx'> 			hscx_fill_fifo(hx);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1069,7 +1078,7 @@ ipac_rme(struct hscx_hw *hx)</div><div class='ctx'> 		skb_trim(hx-&gt;bch.rx_skb, 0);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		skb_trim(hx-&gt;bch.rx_skb, hx-&gt;bch.rx_skb-&gt;len - 1);</div><div class='del'>-		recv_Bchannel(&amp;hx-&gt;bch, 0);</div><div class='add'>+		recv_Bchannel(&amp;hx-&gt;bch, 0, false);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1120,11 +1129,8 @@ ipac_irq(struct hscx_hw *hx, u8 ista)</div><div class='ctx'> </div><div class='ctx'> 	if (istab &amp; IPACX_B_RPF) {</div><div class='ctx'> 		hscx_empty_fifo(hx, hx-&gt;fifo_size);</div><div class='del'>-		if (test_bit(FLG_TRANSPARENT, &amp;hx-&gt;bch.Flags)) {</div><div class='del'>-			/* receive transparent audio data */</div><div class='del'>-			if (hx-&gt;bch.rx_skb)</div><div class='del'>-				recv_Bchannel(&amp;hx-&gt;bch, 0);</div><div class='del'>-		}</div><div class='add'>+		if (test_bit(FLG_TRANSPARENT, &amp;hx-&gt;bch.Flags))</div><div class='add'>+			recv_Bchannel(&amp;hx-&gt;bch, 0, false);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (istab &amp; IPACX_B_RFO) {</div><div class='hunk'>@@ -1137,7 +1143,9 @@ ipac_irq(struct hscx_hw *hx, u8 ista)</div><div class='ctx'> </div><div class='ctx'> 	if (istab &amp; IPACX_B_XDU) {</div><div class='ctx'> 		if (test_bit(FLG_TRANSPARENT, &amp;hx-&gt;bch.Flags)) {</div><div class='del'>-			hscx_fill_fifo(hx);</div><div class='add'>+			if (test_bit(FLG_FILLEMPTY, &amp;hx-&gt;bch.Flags))</div><div class='add'>+				test_and_set_bit(FLG_TX_EMPTY, &amp;hx-&gt;bch.Flags);</div><div class='add'>+			hscx_xpr(hx);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 		pr_debug("%s: B%1d XDU error at len %d\n", hx-&gt;ip-&gt;name,</div><div class='hunk'>@@ -1338,22 +1346,17 @@ hscx_l2l1(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 	struct hscx_hw	*hx = container_of(bch, struct hscx_hw, bch);</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> 	struct mISDNhead *hh = mISDN_HEAD_P(skb);</div><div class='del'>-	u32 id;</div><div class='del'>-	u_long flags;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	switch (hh-&gt;prim) {</div><div class='ctx'> 	case PH_DATA_REQ:</div><div class='ctx'> 		spin_lock_irqsave(hx-&gt;ip-&gt;hwlock, flags);</div><div class='ctx'> 		ret = bchannel_senddata(bch, skb);</div><div class='ctx'> 		if (ret &gt; 0) { /* direct TX */</div><div class='del'>-			id = hh-&gt;id; /* skb can be freed */</div><div class='ctx'> 			ret = 0;</div><div class='ctx'> 			hscx_fill_fifo(hx);</div><div class='del'>-			spin_unlock_irqrestore(hx-&gt;ip-&gt;hwlock, flags);</div><div class='del'>-			if (!test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags))</div><div class='del'>-				queue_ch_frame(ch, PH_DATA_CNF, id, NULL);</div><div class='del'>-		} else</div><div class='del'>-			spin_unlock_irqrestore(hx-&gt;ip-&gt;hwlock, flags);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(hx-&gt;ip-&gt;hwlock, flags);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	case PH_ACTIVATE_REQ:</div><div class='ctx'> 		spin_lock_irqsave(hx-&gt;ip-&gt;hwlock, flags);</div><div class='hunk'>@@ -1388,20 +1391,7 @@ hscx_l2l1(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> static int</div><div class='ctx'> channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)</div><div class='ctx'> {</div><div class='del'>-	int	ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (cq-&gt;op) {</div><div class='del'>-	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = 0;</div><div class='del'>-		break;</div><div class='del'>-		/* Nothing implemented yet */</div><div class='del'>-	case MISDN_CTRL_FILL_EMPTY:</div><div class='del'>-	default:</div><div class='del'>-		pr_info("%s: unknown Op %x\n", __func__, cq-&gt;op);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return mISDN_ctrl_bchannel(bch, cq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -1416,15 +1406,10 @@ hscx_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)</div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case CLOSE_CHANNEL:</div><div class='ctx'> 		test_and_clear_bit(FLG_OPEN, &amp;bch-&gt;Flags);</div><div class='del'>-		if (test_bit(FLG_ACTIVE, &amp;bch-&gt;Flags)) {</div><div class='del'>-			spin_lock_irqsave(hx-&gt;ip-&gt;hwlock, flags);</div><div class='del'>-			mISDN_freebchannel(bch);</div><div class='del'>-			hscx_mode(hx, ISDN_P_NONE);</div><div class='del'>-			spin_unlock_irqrestore(hx-&gt;ip-&gt;hwlock, flags);</div><div class='del'>-		} else {</div><div class='del'>-			skb_queue_purge(&amp;bch-&gt;rqueue);</div><div class='del'>-			bch-&gt;rcount = 0;</div><div class='del'>-		}</div><div class='add'>+		spin_lock_irqsave(hx-&gt;ip-&gt;hwlock, flags);</div><div class='add'>+		mISDN_freebchannel(bch);</div><div class='add'>+		hscx_mode(hx, ISDN_P_NONE);</div><div class='add'>+		spin_unlock_irqrestore(hx-&gt;ip-&gt;hwlock, flags);</div><div class='ctx'> 		ch-&gt;protocol = ISDN_P_NONE;</div><div class='ctx'> 		ch-&gt;peer = NULL;</div><div class='ctx'> 		module_put(hx-&gt;ip-&gt;owner);</div><div class='hunk'>@@ -1526,7 +1511,7 @@ channel_ctrl(struct ipac_hw *ipac, struct mISDN_ctrl_req *cq)</div><div class='ctx'> </div><div class='ctx'> 	switch (cq-&gt;op) {</div><div class='ctx'> 	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = MISDN_CTRL_LOOP;</div><div class='add'>+		cq-&gt;op = MISDN_CTRL_LOOP | MISDN_CTRL_L1_TIMER3;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MISDN_CTRL_LOOP:</div><div class='ctx'> 		/* cq-&gt;channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */</div><div class='hunk'>@@ -1536,6 +1521,9 @@ channel_ctrl(struct ipac_hw *ipac, struct mISDN_ctrl_req *cq)</div><div class='ctx'> 		}</div><div class='ctx'> 		ret = ipac-&gt;ctrl(ipac, HW_TESTLOOP, cq-&gt;channel);</div><div class='ctx'> 		break;</div><div class='add'>+	case MISDN_CTRL_L1_TIMER3:</div><div class='add'>+		ret = ipac-&gt;isac.ctrl(&amp;ipac-&gt;isac, HW_TIMER3_VALUE, cq-&gt;p1);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_info("%s: unknown CTRL OP %x\n", ipac-&gt;name, cq-&gt;op);</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -1621,7 +1609,8 @@ mISDNipac_init(struct ipac_hw *ipac, void *hw)</div><div class='ctx'> 		set_channelmap(i + 1, ipac-&gt;isac.dch.dev.channelmap);</div><div class='ctx'> 		list_add(&amp;ipac-&gt;hscx[i].bch.ch.list,</div><div class='ctx'> 			 &amp;ipac-&gt;isac.dch.dev.bchannels);</div><div class='del'>-		mISDN_initbchannel(&amp;ipac-&gt;hscx[i].bch, MAX_DATA_MEM);</div><div class='add'>+		mISDN_initbchannel(&amp;ipac-&gt;hscx[i].bch, MAX_DATA_MEM,</div><div class='add'>+				   ipac-&gt;hscx[i].fifo_size);</div><div class='ctx'> 		ipac-&gt;hscx[i].bch.ch.nr = i + 1;</div><div class='ctx'> 		ipac-&gt;hscx[i].bch.ch.send = &amp;hscx_l2l1;</div><div class='ctx'> 		ipac-&gt;hscx[i].bch.ch.ctrl = hscx_bctrl;</div><div class='head'>diff --git a/drivers/isdn/hardware/mISDN/mISDNisar.c b/drivers/isdn/hardware/mISDN/mISDNisar.c<br/>index 9a6da6edcfa8..be5973ded6d6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/mISDNisar.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/mISDN/mISDNisar.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/mISDNisar.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/mISDNisar.c</a></div><div class='hunk'>@@ -421,13 +421,19 @@ deliver_status(struct isar_ch *ch, int status)</div><div class='ctx'> static inline void</div><div class='ctx'> isar_rcv_frame(struct isar_ch *ch)</div><div class='ctx'> {</div><div class='del'>-	u8		*ptr;</div><div class='add'>+	u8	*ptr;</div><div class='add'>+	int	maxlen;</div><div class='ctx'> </div><div class='ctx'> 	if (!ch-&gt;is-&gt;clsb) {</div><div class='ctx'> 		pr_debug("%s; ISAR zero len frame\n", ch-&gt;is-&gt;name);</div><div class='ctx'> 		ch-&gt;is-&gt;write_reg(ch-&gt;is-&gt;hw, ISAR_IIA, 0);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+	if (test_bit(FLG_RX_OFF, &amp;ch-&gt;bch.Flags)) {</div><div class='add'>+		ch-&gt;bch.dropcnt += ch-&gt;is-&gt;clsb;</div><div class='add'>+		ch-&gt;is-&gt;write_reg(ch-&gt;is-&gt;hw, ISAR_IIA, 0);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> 	switch (ch-&gt;bch.state) {</div><div class='ctx'> 	case ISDN_P_NONE:</div><div class='ctx'> 		pr_debug("%s: ISAR protocol 0 spurious IIS_RDATA %x/%x/%x\n",</div><div class='hunk'>@@ -437,36 +443,22 @@ isar_rcv_frame(struct isar_ch *ch)</div><div class='ctx'> 	case ISDN_P_B_RAW:</div><div class='ctx'> 	case ISDN_P_B_L2DTMF:</div><div class='ctx'> 	case ISDN_P_B_MODEM_ASYNC:</div><div class='del'>-		if (!ch-&gt;bch.rx_skb) {</div><div class='del'>-			ch-&gt;bch.rx_skb = mI_alloc_skb(ch-&gt;bch.maxlen,</div><div class='del'>-						      GFP_ATOMIC);</div><div class='del'>-			if (unlikely(!ch-&gt;bch.rx_skb)) {</div><div class='del'>-				pr_info("%s: B receive out of memory\n",</div><div class='del'>-					ch-&gt;is-&gt;name);</div><div class='del'>-				ch-&gt;is-&gt;write_reg(ch-&gt;is-&gt;hw, ISAR_IIA, 0);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='add'>+		maxlen = bchannel_get_rxbuf(&amp;ch-&gt;bch, ch-&gt;is-&gt;clsb);</div><div class='add'>+		if (maxlen &lt; 0) {</div><div class='add'>+			pr_warning("%s.B%d: No bufferspace for %d bytes\n",</div><div class='add'>+				   ch-&gt;is-&gt;name, ch-&gt;bch.nr, ch-&gt;is-&gt;clsb);</div><div class='add'>+			ch-&gt;is-&gt;write_reg(ch-&gt;is-&gt;hw, ISAR_IIA, 0);</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		rcv_mbox(ch-&gt;is, skb_put(ch-&gt;bch.rx_skb, ch-&gt;is-&gt;clsb));</div><div class='del'>-		recv_Bchannel(&amp;ch-&gt;bch, 0);</div><div class='add'>+		recv_Bchannel(&amp;ch-&gt;bch, 0, false);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ISDN_P_B_HDLC:</div><div class='del'>-		if (!ch-&gt;bch.rx_skb) {</div><div class='del'>-			ch-&gt;bch.rx_skb = mI_alloc_skb(ch-&gt;bch.maxlen,</div><div class='del'>-						      GFP_ATOMIC);</div><div class='del'>-			if (unlikely(!ch-&gt;bch.rx_skb)) {</div><div class='del'>-				pr_info("%s: B receive out of memory\n",</div><div class='del'>-					ch-&gt;is-&gt;name);</div><div class='del'>-				ch-&gt;is-&gt;write_reg(ch-&gt;is-&gt;hw, ISAR_IIA, 0);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if ((ch-&gt;bch.rx_skb-&gt;len + ch-&gt;is-&gt;clsb) &gt;</div><div class='del'>-		    (ch-&gt;bch.maxlen + 2)) {</div><div class='del'>-			pr_debug("%s: incoming packet too large\n",</div><div class='del'>-				 ch-&gt;is-&gt;name);</div><div class='add'>+		maxlen = bchannel_get_rxbuf(&amp;ch-&gt;bch, ch-&gt;is-&gt;clsb);</div><div class='add'>+		if (maxlen &lt; 0) {</div><div class='add'>+			pr_warning("%s.B%d: No bufferspace for %d bytes\n",</div><div class='add'>+				   ch-&gt;is-&gt;name, ch-&gt;bch.nr, ch-&gt;is-&gt;clsb);</div><div class='ctx'> 			ch-&gt;is-&gt;write_reg(ch-&gt;is-&gt;hw, ISAR_IIA, 0);</div><div class='del'>-			skb_trim(ch-&gt;bch.rx_skb, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (ch-&gt;is-&gt;cmsb &amp; HDLC_ERROR) {</div><div class='hunk'>@@ -494,7 +486,7 @@ isar_rcv_frame(struct isar_ch *ch)</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			skb_trim(ch-&gt;bch.rx_skb, ch-&gt;bch.rx_skb-&gt;len - 2);</div><div class='del'>-			recv_Bchannel(&amp;ch-&gt;bch, 0);</div><div class='add'>+			recv_Bchannel(&amp;ch-&gt;bch, 0, false);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ISDN_P_B_T30_FAX:</div><div class='hunk'>@@ -530,7 +522,7 @@ isar_rcv_frame(struct isar_ch *ch)</div><div class='ctx'> 				ch-&gt;state = STFAX_ESCAPE;</div><div class='ctx'> 				/* set_skb_flag(skb, DF_NOMOREDATA); */</div><div class='ctx'> 			}</div><div class='del'>-			recv_Bchannel(&amp;ch-&gt;bch, 0);</div><div class='add'>+			recv_Bchannel(&amp;ch-&gt;bch, 0, false);</div><div class='ctx'> 			if (ch-&gt;is-&gt;cmsb &amp; SART_NMD)</div><div class='ctx'> 				deliver_status(ch, HW_MOD_NOCARR);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -570,7 +562,7 @@ isar_rcv_frame(struct isar_ch *ch)</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			skb_trim(ch-&gt;bch.rx_skb, ch-&gt;bch.rx_skb-&gt;len - 2);</div><div class='del'>-			recv_Bchannel(&amp;ch-&gt;bch, 0);</div><div class='add'>+			recv_Bchannel(&amp;ch-&gt;bch, 0, false);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (ch-&gt;is-&gt;cmsb &amp; SART_NMD) { /* ABORT */</div><div class='ctx'> 			pr_debug("%s: isar_rcv_frame: no more data\n",</div><div class='hunk'>@@ -598,16 +590,25 @@ isar_fill_fifo(struct isar_ch *ch)</div><div class='ctx'> 	u8 msb;</div><div class='ctx'> 	u8 *ptr;</div><div class='ctx'> </div><div class='del'>-	pr_debug("%s: ch%d  tx_skb %p tx_idx %d\n",</div><div class='del'>-		 ch-&gt;is-&gt;name, ch-&gt;bch.nr, ch-&gt;bch.tx_skb, ch-&gt;bch.tx_idx);</div><div class='del'>-	if (!ch-&gt;bch.tx_skb)</div><div class='add'>+	pr_debug("%s: ch%d  tx_skb %d tx_idx %d\n", ch-&gt;is-&gt;name, ch-&gt;bch.nr,</div><div class='add'>+		 ch-&gt;bch.tx_skb ? ch-&gt;bch.tx_skb-&gt;len : -1, ch-&gt;bch.tx_idx);</div><div class='add'>+	if (!(ch-&gt;is-&gt;bstat &amp;</div><div class='add'>+	      (ch-&gt;dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2)))</div><div class='add'>+		return;</div><div class='add'>+	if (!ch-&gt;bch.tx_skb) {</div><div class='add'>+		if (!test_bit(FLG_TX_EMPTY, &amp;ch-&gt;bch.Flags) ||</div><div class='add'>+		    (ch-&gt;bch.state != ISDN_P_B_RAW))</div><div class='add'>+			return;</div><div class='add'>+		count = ch-&gt;mml;</div><div class='add'>+		/* use the card buffer */</div><div class='add'>+		memset(ch-&gt;is-&gt;buf, ch-&gt;bch.fill[0], count);</div><div class='add'>+		send_mbox(ch-&gt;is, SET_DPS(ch-&gt;dpath) | ISAR_HIS_SDATA,</div><div class='add'>+			  0, count, ch-&gt;is-&gt;buf);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> 	count = ch-&gt;bch.tx_skb-&gt;len - ch-&gt;bch.tx_idx;</div><div class='ctx'> 	if (count &lt;= 0)</div><div class='ctx'> 		return;</div><div class='del'>-	if (!(ch-&gt;is-&gt;bstat &amp;</div><div class='del'>-	      (ch-&gt;dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2)))</div><div class='del'>-		return;</div><div class='ctx'> 	if (count &gt; ch-&gt;mml) {</div><div class='ctx'> 		msb = 0;</div><div class='ctx'> 		count = ch-&gt;mml;</div><div class='hunk'>@@ -686,9 +687,9 @@ sel_bch_isar(struct isar_hw *isar, u8 dpath)</div><div class='ctx'> static void</div><div class='ctx'> send_next(struct isar_ch *ch)</div><div class='ctx'> {</div><div class='del'>-	pr_debug("%s: %s ch%d tx_skb %p tx_idx %d\n",</div><div class='del'>-		 ch-&gt;is-&gt;name, __func__, ch-&gt;bch.nr,</div><div class='del'>-		 ch-&gt;bch.tx_skb, ch-&gt;bch.tx_idx);</div><div class='add'>+	pr_debug("%s: %s ch%d tx_skb %d tx_idx %d\n", ch-&gt;is-&gt;name, __func__,</div><div class='add'>+		 ch-&gt;bch.nr, ch-&gt;bch.tx_skb ? ch-&gt;bch.tx_skb-&gt;len : -1,</div><div class='add'>+		 ch-&gt;bch.tx_idx);</div><div class='ctx'> 	if (ch-&gt;bch.state == ISDN_P_B_T30_FAX) {</div><div class='ctx'> 		if (ch-&gt;cmd == PCTRL_CMD_FTH) {</div><div class='ctx'> 			if (test_bit(FLG_LASTDATA, &amp;ch-&gt;bch.Flags)) {</div><div class='hunk'>@@ -702,15 +703,14 @@ send_next(struct isar_ch *ch)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (ch-&gt;bch.tx_skb) {</div><div class='del'>-		/* send confirm, on trans, free on hdlc. */</div><div class='del'>-		if (test_bit(FLG_TRANSPARENT, &amp;ch-&gt;bch.Flags))</div><div class='del'>-			confirm_Bsend(&amp;ch-&gt;bch);</div><div class='add'>+	if (ch-&gt;bch.tx_skb)</div><div class='ctx'> 		dev_kfree_skb(ch-&gt;bch.tx_skb);</div><div class='del'>-	}</div><div class='del'>-	if (get_next_bframe(&amp;ch-&gt;bch))</div><div class='add'>+	if (get_next_bframe(&amp;ch-&gt;bch)) {</div><div class='ctx'> 		isar_fill_fifo(ch);</div><div class='del'>-	else {</div><div class='add'>+		test_and_clear_bit(FLG_TX_EMPTY, &amp;ch-&gt;bch.Flags);</div><div class='add'>+	} else if (test_bit(FLG_TX_EMPTY, &amp;ch-&gt;bch.Flags)) {</div><div class='add'>+		isar_fill_fifo(ch);</div><div class='add'>+	} else {</div><div class='ctx'> 		if (test_and_clear_bit(FLG_DLEETX, &amp;ch-&gt;bch.Flags)) {</div><div class='ctx'> 			if (test_and_clear_bit(FLG_LASTDATA,</div><div class='ctx'> 					       &amp;ch-&gt;bch.Flags)) {</div><div class='hunk'>@@ -724,6 +724,8 @@ send_next(struct isar_ch *ch)</div><div class='ctx'> 			} else {</div><div class='ctx'> 				deliver_status(ch, HW_MOD_CONNECT);</div><div class='ctx'> 			}</div><div class='add'>+		} else if (test_bit(FLG_FILLEMPTY, &amp;ch-&gt;bch.Flags)) {</div><div class='add'>+			test_and_set_bit(FLG_TX_EMPTY, &amp;ch-&gt;bch.Flags);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1487,14 +1489,10 @@ isar_l2l1(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 		spin_lock_irqsave(ich-&gt;is-&gt;hwlock, flags);</div><div class='ctx'> 		ret = bchannel_senddata(bch, skb);</div><div class='ctx'> 		if (ret &gt; 0) { /* direct TX */</div><div class='del'>-			id = hh-&gt;id; /* skb can be freed */</div><div class='ctx'> 			ret = 0;</div><div class='ctx'> 			isar_fill_fifo(ich);</div><div class='del'>-			spin_unlock_irqrestore(ich-&gt;is-&gt;hwlock, flags);</div><div class='del'>-			if (!test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags))</div><div class='del'>-				queue_ch_frame(ch, PH_DATA_CNF, id, NULL);</div><div class='del'>-		} else</div><div class='del'>-			spin_unlock_irqrestore(ich-&gt;is-&gt;hwlock, flags);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(ich-&gt;is-&gt;hwlock, flags);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	case PH_ACTIVATE_REQ:</div><div class='ctx'> 		spin_lock_irqsave(ich-&gt;is-&gt;hwlock, flags);</div><div class='hunk'>@@ -1575,20 +1573,7 @@ isar_l2l1(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> static int</div><div class='ctx'> channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)</div><div class='ctx'> {</div><div class='del'>-	int	ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (cq-&gt;op) {</div><div class='del'>-	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = 0;</div><div class='del'>-		break;</div><div class='del'>-		/* Nothing implemented yet */</div><div class='del'>-	case MISDN_CTRL_FILL_EMPTY:</div><div class='del'>-	default:</div><div class='del'>-		pr_info("%s: unknown Op %x\n", __func__, cq-&gt;op);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return mISDN_ctrl_bchannel(bch, cq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -1603,15 +1588,10 @@ isar_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)</div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case CLOSE_CHANNEL:</div><div class='ctx'> 		test_and_clear_bit(FLG_OPEN, &amp;bch-&gt;Flags);</div><div class='del'>-		if (test_bit(FLG_ACTIVE, &amp;bch-&gt;Flags)) {</div><div class='del'>-			spin_lock_irqsave(ich-&gt;is-&gt;hwlock, flags);</div><div class='del'>-			mISDN_freebchannel(bch);</div><div class='del'>-			modeisar(ich, ISDN_P_NONE);</div><div class='del'>-			spin_unlock_irqrestore(ich-&gt;is-&gt;hwlock, flags);</div><div class='del'>-		} else {</div><div class='del'>-			skb_queue_purge(&amp;bch-&gt;rqueue);</div><div class='del'>-			bch-&gt;rcount = 0;</div><div class='del'>-		}</div><div class='add'>+		spin_lock_irqsave(ich-&gt;is-&gt;hwlock, flags);</div><div class='add'>+		mISDN_freebchannel(bch);</div><div class='add'>+		modeisar(ich, ISDN_P_NONE);</div><div class='add'>+		spin_unlock_irqrestore(ich-&gt;is-&gt;hwlock, flags);</div><div class='ctx'> 		ch-&gt;protocol = ISDN_P_NONE;</div><div class='ctx'> 		ch-&gt;peer = NULL;</div><div class='ctx'> 		module_put(ich-&gt;is-&gt;owner);</div><div class='hunk'>@@ -1677,7 +1657,6 @@ isar_open(struct isar_hw *isar, struct channel_req *rq)</div><div class='ctx'> 	bch = &amp;isar-&gt;ch[rq-&gt;adr.channel - 1].bch;</div><div class='ctx'> 	if (test_and_set_bit(FLG_OPEN, &amp;bch-&gt;Flags))</div><div class='ctx'> 		return -EBUSY; /* b-channel can be only open once */</div><div class='del'>-	test_and_clear_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags);</div><div class='ctx'> 	bch-&gt;ch.protocol = rq-&gt;protocol;</div><div class='ctx'> 	rq-&gt;ch = &amp;bch-&gt;ch;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1691,7 +1670,7 @@ mISDNisar_init(struct isar_hw *isar, void *hw)</div><div class='ctx'> 	isar-&gt;hw = hw;</div><div class='ctx'> 	for (i = 0; i &lt; 2; i++) {</div><div class='ctx'> 		isar-&gt;ch[i].bch.nr = i + 1;</div><div class='del'>-		mISDN_initbchannel(&amp;isar-&gt;ch[i].bch, MAX_DATA_MEM);</div><div class='add'>+		mISDN_initbchannel(&amp;isar-&gt;ch[i].bch, MAX_DATA_MEM, 32);</div><div class='ctx'> 		isar-&gt;ch[i].bch.ch.nr = i + 1;</div><div class='ctx'> 		isar-&gt;ch[i].bch.ch.send = &amp;isar_l2l1;</div><div class='ctx'> 		isar-&gt;ch[i].bch.ch.ctrl = isar_bctrl;</div><div class='head'>diff --git a/drivers/isdn/hardware/mISDN/netjet.c b/drivers/isdn/hardware/mISDN/netjet.c<br/>index c726e09d0981..c3e3e7686273 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/netjet.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/mISDN/netjet.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/netjet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/netjet.c</a></div><div class='hunk'>@@ -386,24 +386,20 @@ read_dma(struct tiger_ch *bc, u32 idx, int cnt)</div><div class='ctx'> 			bc-&gt;bch.nr, idx);</div><div class='ctx'> 	}</div><div class='ctx'> 	bc-&gt;lastrx = idx;</div><div class='del'>-	if (!bc-&gt;bch.rx_skb) {</div><div class='del'>-		bc-&gt;bch.rx_skb = mI_alloc_skb(bc-&gt;bch.maxlen, GFP_ATOMIC);</div><div class='del'>-		if (!bc-&gt;bch.rx_skb) {</div><div class='del'>-			pr_info("%s: B%1d receive out of memory\n",</div><div class='del'>-				card-&gt;name, bc-&gt;bch.nr);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='add'>+	if (test_bit(FLG_RX_OFF, &amp;bc-&gt;bch.Flags)) {</div><div class='add'>+		bc-&gt;bch.dropcnt += cnt;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (test_bit(FLG_TRANSPARENT, &amp;bc-&gt;bch.Flags)) {</div><div class='del'>-		if ((bc-&gt;bch.rx_skb-&gt;len + cnt) &gt; bc-&gt;bch.maxlen) {</div><div class='del'>-			pr_debug("%s: B%1d overrun %d\n", card-&gt;name,</div><div class='del'>-				 bc-&gt;bch.nr, bc-&gt;bch.rx_skb-&gt;len + cnt);</div><div class='del'>-			skb_trim(bc-&gt;bch.rx_skb, 0);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='add'>+	stat = bchannel_get_rxbuf(&amp;bc-&gt;bch, cnt);</div><div class='add'>+	/* only transparent use the count here, HDLC overun is detected later */</div><div class='add'>+	if (stat == ENOMEM) {</div><div class='add'>+		pr_warning("%s.B%d: No memory for %d bytes\n",</div><div class='add'>+			   card-&gt;name, bc-&gt;bch.nr, cnt);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (test_bit(FLG_TRANSPARENT, &amp;bc-&gt;bch.Flags))</div><div class='ctx'> 		p = skb_put(bc-&gt;bch.rx_skb, cnt);</div><div class='del'>-	} else</div><div class='add'>+	else</div><div class='ctx'> 		p = bc-&gt;hrbuf;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; cnt; i++) {</div><div class='hunk'>@@ -414,48 +410,45 @@ read_dma(struct tiger_ch *bc, u32 idx, int cnt)</div><div class='ctx'> 			idx = 0;</div><div class='ctx'> 		p[i] = val &amp; 0xff;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (test_bit(FLG_TRANSPARENT, &amp;bc-&gt;bch.Flags)) {</div><div class='add'>+		recv_Bchannel(&amp;bc-&gt;bch, 0, false);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pn = bc-&gt;hrbuf;</div><div class='del'>-next_frame:</div><div class='del'>-	if (test_bit(FLG_HDLC, &amp;bc-&gt;bch.Flags)) {</div><div class='add'>+	while (cnt &gt; 0) {</div><div class='ctx'> 		stat = isdnhdlc_decode(&amp;bc-&gt;hrecv, pn, cnt, &amp;i,</div><div class='ctx'> 				       bc-&gt;bch.rx_skb-&gt;data, bc-&gt;bch.maxlen);</div><div class='del'>-		if (stat &gt; 0) /* valid frame received */</div><div class='add'>+		if (stat &gt; 0) { /* valid frame received */</div><div class='ctx'> 			p = skb_put(bc-&gt;bch.rx_skb, stat);</div><div class='del'>-		else if (stat == -HDLC_CRC_ERROR)</div><div class='add'>+			if (debug &amp; DEBUG_HW_BFIFO) {</div><div class='add'>+				snprintf(card-&gt;log, LOG_SIZE,</div><div class='add'>+					 "B%1d-recv %s %d ", bc-&gt;bch.nr,</div><div class='add'>+					 card-&gt;name, stat);</div><div class='add'>+				print_hex_dump_bytes(card-&gt;log,</div><div class='add'>+						     DUMP_PREFIX_OFFSET, p,</div><div class='add'>+						     stat);</div><div class='add'>+			}</div><div class='add'>+			recv_Bchannel(&amp;bc-&gt;bch, 0, false);</div><div class='add'>+			stat = bchannel_get_rxbuf(&amp;bc-&gt;bch, bc-&gt;bch.maxlen);</div><div class='add'>+			if (stat &lt; 0) {</div><div class='add'>+				pr_warning("%s.B%d: No memory for %d bytes\n",</div><div class='add'>+					   card-&gt;name, bc-&gt;bch.nr, cnt);</div><div class='add'>+				return;</div><div class='add'>+			}</div><div class='add'>+		} else if (stat == -HDLC_CRC_ERROR) {</div><div class='ctx'> 			pr_info("%s: B%1d receive frame CRC error\n",</div><div class='ctx'> 				card-&gt;name, bc-&gt;bch.nr);</div><div class='del'>-		else if (stat == -HDLC_FRAMING_ERROR)</div><div class='add'>+		} else if (stat == -HDLC_FRAMING_ERROR) {</div><div class='ctx'> 			pr_info("%s: B%1d receive framing error\n",</div><div class='ctx'> 				card-&gt;name, bc-&gt;bch.nr);</div><div class='del'>-		else if (stat == -HDLC_LENGTH_ERROR)</div><div class='add'>+		} else if (stat == -HDLC_LENGTH_ERROR) {</div><div class='ctx'> 			pr_info("%s: B%1d receive frame too long (&gt; %d)\n",</div><div class='ctx'> 				card-&gt;name, bc-&gt;bch.nr, bc-&gt;bch.maxlen);</div><div class='del'>-	} else</div><div class='del'>-		stat = cnt;</div><div class='del'>-</div><div class='del'>-	if (stat &gt; 0) {</div><div class='del'>-		if (debug &amp; DEBUG_HW_BFIFO) {</div><div class='del'>-			snprintf(card-&gt;log, LOG_SIZE, "B%1d-recv %s %d ",</div><div class='del'>-				 bc-&gt;bch.nr, card-&gt;name, stat);</div><div class='del'>-			print_hex_dump_bytes(card-&gt;log, DUMP_PREFIX_OFFSET,</div><div class='del'>-					     p, stat);</div><div class='ctx'> 		}</div><div class='del'>-		recv_Bchannel(&amp;bc-&gt;bch, 0);</div><div class='del'>-	}</div><div class='del'>-	if (test_bit(FLG_HDLC, &amp;bc-&gt;bch.Flags)) {</div><div class='ctx'> 		pn += i;</div><div class='ctx'> 		cnt -= i;</div><div class='del'>-		if (!bc-&gt;bch.rx_skb) {</div><div class='del'>-			bc-&gt;bch.rx_skb = mI_alloc_skb(bc-&gt;bch.maxlen,</div><div class='del'>-						      GFP_ATOMIC);</div><div class='del'>-			if (!bc-&gt;bch.rx_skb) {</div><div class='del'>-				pr_info("%s: B%1d receive out of memory\n",</div><div class='del'>-					card-&gt;name, bc-&gt;bch.nr);</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if (cnt &gt; 0)</div><div class='del'>-			goto next_frame;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -544,22 +537,31 @@ static void</div><div class='ctx'> fill_dma(struct tiger_ch *bc)</div><div class='ctx'> {</div><div class='ctx'> 	struct tiger_hw *card = bc-&gt;bch.hw;</div><div class='del'>-	int count, i;</div><div class='del'>-	u32 m, v;</div><div class='add'>+	int count, i, fillempty = 0;</div><div class='add'>+	u32 m, v, n = 0;</div><div class='ctx'> 	u8  *p;</div><div class='ctx'> </div><div class='ctx'> 	if (bc-&gt;free == 0)</div><div class='ctx'> 		return;</div><div class='del'>-	count = bc-&gt;bch.tx_skb-&gt;len - bc-&gt;bch.tx_idx;</div><div class='del'>-	if (count &lt;= 0)</div><div class='del'>-		return;</div><div class='del'>-	pr_debug("%s: %s B%1d %d/%d/%d/%d state %x idx %d/%d\n", card-&gt;name,</div><div class='del'>-		 __func__, bc-&gt;bch.nr, count, bc-&gt;free, bc-&gt;bch.tx_idx,</div><div class='del'>-		 bc-&gt;bch.tx_skb-&gt;len, bc-&gt;txstate, bc-&gt;idx, card-&gt;send.idx);</div><div class='add'>+	if (!bc-&gt;bch.tx_skb) {</div><div class='add'>+		if (!test_bit(FLG_TX_EMPTY, &amp;bc-&gt;bch.Flags))</div><div class='add'>+			return;</div><div class='add'>+		fillempty = 1;</div><div class='add'>+		count = card-&gt;send.size &gt;&gt; 1;</div><div class='add'>+		p = bc-&gt;bch.fill;</div><div class='add'>+	} else {</div><div class='add'>+		count = bc-&gt;bch.tx_skb-&gt;len - bc-&gt;bch.tx_idx;</div><div class='add'>+		if (count &lt;= 0)</div><div class='add'>+			return;</div><div class='add'>+		pr_debug("%s: %s B%1d %d/%d/%d/%d state %x idx %d/%d\n",</div><div class='add'>+			 card-&gt;name, __func__, bc-&gt;bch.nr, count, bc-&gt;free,</div><div class='add'>+			 bc-&gt;bch.tx_idx, bc-&gt;bch.tx_skb-&gt;len, bc-&gt;txstate,</div><div class='add'>+			 bc-&gt;idx, card-&gt;send.idx);</div><div class='add'>+		p = bc-&gt;bch.tx_skb-&gt;data + bc-&gt;bch.tx_idx;</div><div class='add'>+	}</div><div class='ctx'> 	if (bc-&gt;txstate &amp; (TX_IDLE | TX_INIT | TX_UNDERRUN))</div><div class='ctx'> 		resync(bc, card);</div><div class='del'>-	p = bc-&gt;bch.tx_skb-&gt;data + bc-&gt;bch.tx_idx;</div><div class='del'>-	if (test_bit(FLG_HDLC, &amp;bc-&gt;bch.Flags)) {</div><div class='add'>+	if (test_bit(FLG_HDLC, &amp;bc-&gt;bch.Flags) &amp;&amp; !fillempty) {</div><div class='ctx'> 		count = isdnhdlc_encode(&amp;bc-&gt;hsend, p, count, &amp;i,</div><div class='ctx'> 					bc-&gt;hsbuf, bc-&gt;free);</div><div class='ctx'> 		pr_debug("%s: B%1d hdlc encoded %d in %d\n", card-&gt;name,</div><div class='hunk'>@@ -570,17 +572,33 @@ fill_dma(struct tiger_ch *bc)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (count &gt; bc-&gt;free)</div><div class='ctx'> 			count = bc-&gt;free;</div><div class='del'>-		bc-&gt;bch.tx_idx += count;</div><div class='add'>+		if (!fillempty)</div><div class='add'>+			bc-&gt;bch.tx_idx += count;</div><div class='ctx'> 		bc-&gt;free -= count;</div><div class='ctx'> 	}</div><div class='ctx'> 	m = (bc-&gt;bch.nr &amp; 1) ? 0xffffff00 : 0xffff00ff;</div><div class='del'>-	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		if (bc-&gt;idx &gt;= card-&gt;send.size)</div><div class='del'>-			bc-&gt;idx = 0;</div><div class='del'>-		v = card-&gt;send.start[bc-&gt;idx];</div><div class='del'>-		v &amp;= m;</div><div class='del'>-		v |= (bc-&gt;bch.nr &amp; 1) ? (u32)(p[i]) : ((u32)(p[i])) &lt;&lt; 8;</div><div class='del'>-		card-&gt;send.start[bc-&gt;idx++] = v;</div><div class='add'>+	if (fillempty) {</div><div class='add'>+		n = p[0];</div><div class='add'>+		if (!(bc-&gt;bch.nr &amp; 1))</div><div class='add'>+			n &lt;&lt;= 8;</div><div class='add'>+		for (i = 0; i &lt; count; i++) {</div><div class='add'>+			if (bc-&gt;idx &gt;= card-&gt;send.size)</div><div class='add'>+				bc-&gt;idx = 0;</div><div class='add'>+			v = card-&gt;send.start[bc-&gt;idx];</div><div class='add'>+			v &amp;= m;</div><div class='add'>+			v |= n;</div><div class='add'>+			card-&gt;send.start[bc-&gt;idx++] = v;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; count; i++) {</div><div class='add'>+			if (bc-&gt;idx &gt;= card-&gt;send.size)</div><div class='add'>+				bc-&gt;idx = 0;</div><div class='add'>+			v = card-&gt;send.start[bc-&gt;idx];</div><div class='add'>+			v &amp;= m;</div><div class='add'>+			n = p[i];</div><div class='add'>+			v |= (bc-&gt;bch.nr &amp; 1) ? n : n &lt;&lt; 8;</div><div class='add'>+			card-&gt;send.start[bc-&gt;idx++] = v;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (debug &amp; DEBUG_HW_BFIFO) {</div><div class='ctx'> 		snprintf(card-&gt;log, LOG_SIZE, "B%1d-send %s %d ",</div><div class='hunk'>@@ -595,21 +613,26 @@ fill_dma(struct tiger_ch *bc)</div><div class='ctx'> static int</div><div class='ctx'> bc_next_frame(struct tiger_ch *bc)</div><div class='ctx'> {</div><div class='del'>-	if (bc-&gt;bch.tx_skb &amp;&amp; bc-&gt;bch.tx_idx &lt; bc-&gt;bch.tx_skb-&gt;len)</div><div class='add'>+	int ret = 1;</div><div class='add'>+</div><div class='add'>+	if (bc-&gt;bch.tx_skb &amp;&amp; bc-&gt;bch.tx_idx &lt; bc-&gt;bch.tx_skb-&gt;len) {</div><div class='ctx'> 		fill_dma(bc);</div><div class='del'>-	else {</div><div class='del'>-		if (bc-&gt;bch.tx_skb) {</div><div class='del'>-			/* send confirm, on trans, free on hdlc. */</div><div class='del'>-			if (test_bit(FLG_TRANSPARENT, &amp;bc-&gt;bch.Flags))</div><div class='del'>-				confirm_Bsend(&amp;bc-&gt;bch);</div><div class='add'>+	} else {</div><div class='add'>+		if (bc-&gt;bch.tx_skb)</div><div class='ctx'> 			dev_kfree_skb(bc-&gt;bch.tx_skb);</div><div class='del'>-		}</div><div class='del'>-		if (get_next_bframe(&amp;bc-&gt;bch))</div><div class='add'>+		if (get_next_bframe(&amp;bc-&gt;bch)) {</div><div class='ctx'> 			fill_dma(bc);</div><div class='del'>-		else</div><div class='del'>-			return 0;</div><div class='add'>+			test_and_clear_bit(FLG_TX_EMPTY, &amp;bc-&gt;bch.Flags);</div><div class='add'>+		} else if (test_bit(FLG_TX_EMPTY, &amp;bc-&gt;bch.Flags)) {</div><div class='add'>+			fill_dma(bc);</div><div class='add'>+		} else if (test_bit(FLG_FILLEMPTY, &amp;bc-&gt;bch.Flags)) {</div><div class='add'>+			test_and_set_bit(FLG_TX_EMPTY, &amp;bc-&gt;bch.Flags);</div><div class='add'>+			ret = 0;</div><div class='add'>+		} else {</div><div class='add'>+			ret = 0;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	return 1;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -732,22 +755,17 @@ nj_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 	struct tiger_ch *bc = container_of(bch, struct tiger_ch, bch);</div><div class='ctx'> 	struct tiger_hw *card = bch-&gt;hw;</div><div class='ctx'> 	struct mISDNhead *hh = mISDN_HEAD_P(skb);</div><div class='del'>-	u32 id;</div><div class='del'>-	u_long flags;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	switch (hh-&gt;prim) {</div><div class='ctx'> 	case PH_DATA_REQ:</div><div class='ctx'> 		spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='ctx'> 		ret = bchannel_senddata(bch, skb);</div><div class='ctx'> 		if (ret &gt; 0) { /* direct TX */</div><div class='del'>-			id = hh-&gt;id; /* skb can be freed */</div><div class='ctx'> 			fill_dma(bc);</div><div class='ctx'> 			ret = 0;</div><div class='del'>-			spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='del'>-			if (!test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags))</div><div class='del'>-				queue_ch_frame(ch, PH_DATA_CNF, id, NULL);</div><div class='del'>-		} else</div><div class='del'>-			spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	case PH_ACTIVATE_REQ:</div><div class='ctx'> 		spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='hunk'>@@ -778,21 +796,7 @@ nj_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> static int</div><div class='ctx'> channel_bctrl(struct tiger_ch *bc, struct mISDN_ctrl_req *cq)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct tiger_hw *card  = bc-&gt;bch.hw;</div><div class='del'>-</div><div class='del'>-	switch (cq-&gt;op) {</div><div class='del'>-	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = 0;</div><div class='del'>-		break;</div><div class='del'>-		/* Nothing implemented yet */</div><div class='del'>-	case MISDN_CTRL_FILL_EMPTY:</div><div class='del'>-	default:</div><div class='del'>-		pr_info("%s: %s unknown Op %x\n", card-&gt;name, __func__, cq-&gt;op);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return mISDN_ctrl_bchannel(&amp;bc-&gt;bch, cq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -808,14 +812,10 @@ nj_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)</div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case CLOSE_CHANNEL:</div><div class='ctx'> 		test_and_clear_bit(FLG_OPEN, &amp;bch-&gt;Flags);</div><div class='del'>-		if (test_bit(FLG_ACTIVE, &amp;bch-&gt;Flags)) {</div><div class='del'>-			spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='del'>-			mISDN_freebchannel(bch);</div><div class='del'>-			test_and_clear_bit(FLG_TX_BUSY, &amp;bch-&gt;Flags);</div><div class='del'>-			test_and_clear_bit(FLG_ACTIVE, &amp;bch-&gt;Flags);</div><div class='del'>-			mode_tiger(bc, ISDN_P_NONE);</div><div class='del'>-			spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='del'>-		}</div><div class='add'>+		spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='add'>+		mISDN_freebchannel(bch);</div><div class='add'>+		mode_tiger(bc, ISDN_P_NONE);</div><div class='add'>+		spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='ctx'> 		ch-&gt;protocol = ISDN_P_NONE;</div><div class='ctx'> 		ch-&gt;peer = NULL;</div><div class='ctx'> 		module_put(THIS_MODULE);</div><div class='hunk'>@@ -837,7 +837,7 @@ channel_ctrl(struct tiger_hw *card, struct mISDN_ctrl_req *cq)</div><div class='ctx'> </div><div class='ctx'> 	switch (cq-&gt;op) {</div><div class='ctx'> 	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = MISDN_CTRL_LOOP;</div><div class='add'>+		cq-&gt;op = MISDN_CTRL_LOOP | MISDN_CTRL_L1_TIMER3;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MISDN_CTRL_LOOP:</div><div class='ctx'> 		/* cq-&gt;channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */</div><div class='hunk'>@@ -847,6 +847,9 @@ channel_ctrl(struct tiger_hw *card, struct mISDN_ctrl_req *cq)</div><div class='ctx'> 		}</div><div class='ctx'> 		ret = card-&gt;isac.ctrl(&amp;card-&gt;isac, HW_TESTLOOP, cq-&gt;channel);</div><div class='ctx'> 		break;</div><div class='add'>+	case MISDN_CTRL_L1_TIMER3:</div><div class='add'>+		ret = card-&gt;isac.ctrl(&amp;card-&gt;isac, HW_TIMER3_VALUE, cq-&gt;p1);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_info("%s: %s unknown Op %x\n", card-&gt;name, __func__, cq-&gt;op);</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -1027,7 +1030,8 @@ setup_instance(struct tiger_hw *card)</div><div class='ctx'> 	for (i = 0; i &lt; 2; i++) {</div><div class='ctx'> 		card-&gt;bc[i].bch.nr = i + 1;</div><div class='ctx'> 		set_channelmap(i + 1, card-&gt;isac.dch.dev.channelmap);</div><div class='del'>-		mISDN_initbchannel(&amp;card-&gt;bc[i].bch, MAX_DATA_MEM);</div><div class='add'>+		mISDN_initbchannel(&amp;card-&gt;bc[i].bch, MAX_DATA_MEM,</div><div class='add'>+				   NJ_DMA_RXSIZE &gt;&gt; 1);</div><div class='ctx'> 		card-&gt;bc[i].bch.hw = card;</div><div class='ctx'> 		card-&gt;bc[i].bch.ch.send = nj_l2l1B;</div><div class='ctx'> 		card-&gt;bc[i].bch.ch.ctrl = nj_bctrl;</div><div class='head'>diff --git a/drivers/isdn/hardware/mISDN/speedfax.c b/drivers/isdn/hardware/mISDN/speedfax.c<br/>index 04689935148b..93f344d74e54 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/speedfax.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/mISDN/speedfax.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/speedfax.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/speedfax.c</a></div><div class='hunk'>@@ -224,7 +224,7 @@ channel_ctrl(struct sfax_hw  *sf, struct mISDN_ctrl_req *cq)</div><div class='ctx'> </div><div class='ctx'> 	switch (cq-&gt;op) {</div><div class='ctx'> 	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = MISDN_CTRL_LOOP;</div><div class='add'>+		cq-&gt;op = MISDN_CTRL_LOOP | MISDN_CTRL_L1_TIMER3;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MISDN_CTRL_LOOP:</div><div class='ctx'> 		/* cq-&gt;channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */</div><div class='hunk'>@@ -234,6 +234,9 @@ channel_ctrl(struct sfax_hw  *sf, struct mISDN_ctrl_req *cq)</div><div class='ctx'> 		}</div><div class='ctx'> 		ret = sf-&gt;isac.ctrl(&amp;sf-&gt;isac, HW_TESTLOOP, cq-&gt;channel);</div><div class='ctx'> 		break;</div><div class='add'>+	case MISDN_CTRL_L1_TIMER3:</div><div class='add'>+		ret = sf-&gt;isac.ctrl(&amp;sf-&gt;isac, HW_TIMER3_VALUE, cq-&gt;p1);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_info("%s: unknown Op %x\n", sf-&gt;name, cq-&gt;op);</div><div class='ctx'> 		ret = -EINVAL;</div><div class='head'>diff --git a/drivers/isdn/hardware/mISDN/w6692.c b/drivers/isdn/hardware/mISDN/w6692.c<br/>index 2183357f0799..26a86b846099 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/w6692.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hardware/mISDN/w6692.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hardware/mISDN/w6692.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hardware/mISDN/w6692.c</a></div><div class='hunk'>@@ -465,6 +465,7 @@ W6692_empty_Bfifo(struct w6692_ch *wch, int count)</div><div class='ctx'> {</div><div class='ctx'> 	struct w6692_hw *card = wch-&gt;bch.hw;</div><div class='ctx'> 	u8 *ptr;</div><div class='add'>+	int maxlen;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: empty_Bfifo %d\n", card-&gt;name, count);</div><div class='ctx'> 	if (unlikely(wch-&gt;bch.state == ISDN_P_NONE)) {</div><div class='hunk'>@@ -474,20 +475,18 @@ W6692_empty_Bfifo(struct w6692_ch *wch, int count)</div><div class='ctx'> 			skb_trim(wch-&gt;bch.rx_skb, 0);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	if (!wch-&gt;bch.rx_skb) {</div><div class='del'>-		wch-&gt;bch.rx_skb = mI_alloc_skb(wch-&gt;bch.maxlen, GFP_ATOMIC);</div><div class='del'>-		if (unlikely(!wch-&gt;bch.rx_skb)) {</div><div class='del'>-			pr_info("%s: B receive out of memory\n", card-&gt;name);</div><div class='del'>-			WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |</div><div class='del'>-				    W_B_CMDR_RACT);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='add'>+	if (test_bit(FLG_RX_OFF, &amp;wch-&gt;bch.Flags)) {</div><div class='add'>+		wch-&gt;bch.dropcnt += count;</div><div class='add'>+		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='del'>-	if (wch-&gt;bch.rx_skb-&gt;len + count &gt; wch-&gt;bch.maxlen) {</div><div class='del'>-		pr_debug("%s: empty_Bfifo incoming packet too large\n",</div><div class='del'>-			 card-&gt;name);</div><div class='add'>+	maxlen = bchannel_get_rxbuf(&amp;wch-&gt;bch, count);</div><div class='add'>+	if (maxlen &lt; 0) {</div><div class='ctx'> 		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);</div><div class='del'>-		skb_trim(wch-&gt;bch.rx_skb, 0);</div><div class='add'>+		if (wch-&gt;bch.rx_skb)</div><div class='add'>+			skb_trim(wch-&gt;bch.rx_skb, 0);</div><div class='add'>+		pr_warning("%s.B%d: No bufferspace for %d bytes\n",</div><div class='add'>+			   card-&gt;name, wch-&gt;bch.nr, count);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	ptr = skb_put(wch-&gt;bch.rx_skb, count);</div><div class='hunk'>@@ -504,16 +503,22 @@ static void</div><div class='ctx'> W6692_fill_Bfifo(struct w6692_ch *wch)</div><div class='ctx'> {</div><div class='ctx'> 	struct w6692_hw *card = wch-&gt;bch.hw;</div><div class='del'>-	int count;</div><div class='add'>+	int count, fillempty = 0;</div><div class='ctx'> 	u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: fill Bfifo\n", card-&gt;name);</div><div class='del'>-	if (!wch-&gt;bch.tx_skb)</div><div class='del'>-		return;</div><div class='del'>-	count = wch-&gt;bch.tx_skb-&gt;len - wch-&gt;bch.tx_idx;</div><div class='del'>-	if (count &lt;= 0)</div><div class='del'>-		return;</div><div class='del'>-	ptr = wch-&gt;bch.tx_skb-&gt;data + wch-&gt;bch.tx_idx;</div><div class='add'>+	if (!wch-&gt;bch.tx_skb) {</div><div class='add'>+		if (!test_bit(FLG_TX_EMPTY, &amp;wch-&gt;bch.Flags))</div><div class='add'>+			return;</div><div class='add'>+		ptr = wch-&gt;bch.fill;</div><div class='add'>+		count = W_B_FIFO_THRESH;</div><div class='add'>+		fillempty = 1;</div><div class='add'>+	} else {</div><div class='add'>+		count = wch-&gt;bch.tx_skb-&gt;len - wch-&gt;bch.tx_idx;</div><div class='add'>+		if (count &lt;= 0)</div><div class='add'>+			return;</div><div class='add'>+		ptr = wch-&gt;bch.tx_skb-&gt;data + wch-&gt;bch.tx_idx;</div><div class='add'>+	}</div><div class='ctx'> 	if (count &gt; W_B_FIFO_THRESH)</div><div class='ctx'> 		count = W_B_FIFO_THRESH;</div><div class='ctx'> 	else if (test_bit(FLG_HDLC, &amp;wch-&gt;bch.Flags))</div><div class='hunk'>@@ -522,9 +527,16 @@ W6692_fill_Bfifo(struct w6692_ch *wch)</div><div class='ctx'> 	pr_debug("%s: fill Bfifo%d/%d\n", card-&gt;name,</div><div class='ctx'> 		 count, wch-&gt;bch.tx_idx);</div><div class='ctx'> 	wch-&gt;bch.tx_idx += count;</div><div class='del'>-	outsb(wch-&gt;addr + W_B_XFIFO, ptr, count);</div><div class='add'>+	if (fillempty) {</div><div class='add'>+		while (count &gt; 0) {</div><div class='add'>+			outsb(wch-&gt;addr + W_B_XFIFO, ptr, MISDN_BCH_FILL_SIZE);</div><div class='add'>+			count -= MISDN_BCH_FILL_SIZE;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		outsb(wch-&gt;addr + W_B_XFIFO, ptr, count);</div><div class='add'>+	}</div><div class='ctx'> 	WriteW6692B(wch, W_B_CMDR, cmd);</div><div class='del'>-	if (debug &amp; DEBUG_HW_DFIFO) {</div><div class='add'>+	if ((debug &amp; DEBUG_HW_BFIFO) &amp;&amp; !fillempty) {</div><div class='ctx'> 		snprintf(card-&gt;log, 63, "B%1d-send %s %d ",</div><div class='ctx'> 			 wch-&gt;bch.nr, card-&gt;name, count);</div><div class='ctx'> 		print_hex_dump_bytes(card-&gt;log, DUMP_PREFIX_OFFSET, ptr, count);</div><div class='hunk'>@@ -638,17 +650,17 @@ w6692_mode(struct w6692_ch *wch, u32 pr)</div><div class='ctx'> static void</div><div class='ctx'> send_next(struct w6692_ch *wch)</div><div class='ctx'> {</div><div class='del'>-	if (wch-&gt;bch.tx_skb &amp;&amp; wch-&gt;bch.tx_idx &lt; wch-&gt;bch.tx_skb-&gt;len)</div><div class='add'>+	if (wch-&gt;bch.tx_skb &amp;&amp; wch-&gt;bch.tx_idx &lt; wch-&gt;bch.tx_skb-&gt;len) {</div><div class='ctx'> 		W6692_fill_Bfifo(wch);</div><div class='del'>-	else {</div><div class='del'>-		if (wch-&gt;bch.tx_skb) {</div><div class='del'>-			/* send confirm, on trans, free on hdlc. */</div><div class='del'>-			if (test_bit(FLG_TRANSPARENT, &amp;wch-&gt;bch.Flags))</div><div class='del'>-				confirm_Bsend(&amp;wch-&gt;bch);</div><div class='add'>+	} else {</div><div class='add'>+		if (wch-&gt;bch.tx_skb)</div><div class='ctx'> 			dev_kfree_skb(wch-&gt;bch.tx_skb);</div><div class='del'>-		}</div><div class='del'>-		if (get_next_bframe(&amp;wch-&gt;bch))</div><div class='add'>+		if (get_next_bframe(&amp;wch-&gt;bch)) {</div><div class='add'>+			W6692_fill_Bfifo(wch);</div><div class='add'>+			test_and_clear_bit(FLG_TX_EMPTY, &amp;wch-&gt;bch.Flags);</div><div class='add'>+		} else if (test_bit(FLG_TX_EMPTY, &amp;wch-&gt;bch.Flags)) {</div><div class='ctx'> 			W6692_fill_Bfifo(wch);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -698,7 +710,7 @@ W6692B_interrupt(struct w6692_hw *card, int ch)</div><div class='ctx'> 			if (count == 0)</div><div class='ctx'> 				count = W_B_FIFO_THRESH;</div><div class='ctx'> 			W6692_empty_Bfifo(wch, count);</div><div class='del'>-			recv_Bchannel(&amp;wch-&gt;bch, 0);</div><div class='add'>+			recv_Bchannel(&amp;wch-&gt;bch, 0, false);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (stat &amp; W_B_EXI_RMR) {</div><div class='hunk'>@@ -714,9 +726,8 @@ W6692B_interrupt(struct w6692_hw *card, int ch)</div><div class='ctx'> 				    W_B_CMDR_RRST | W_B_CMDR_RACT);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			W6692_empty_Bfifo(wch, W_B_FIFO_THRESH);</div><div class='del'>-			if (test_bit(FLG_TRANSPARENT, &amp;wch-&gt;bch.Flags) &amp;&amp;</div><div class='del'>-			    wch-&gt;bch.rx_skb &amp;&amp; (wch-&gt;bch.rx_skb-&gt;len &gt; 0))</div><div class='del'>-				recv_Bchannel(&amp;wch-&gt;bch, 0);</div><div class='add'>+			if (test_bit(FLG_TRANSPARENT, &amp;wch-&gt;bch.Flags))</div><div class='add'>+				recv_Bchannel(&amp;wch-&gt;bch, 0, false);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (stat &amp; W_B_EXI_RDOV) {</div><div class='hunk'>@@ -738,8 +749,8 @@ W6692B_interrupt(struct w6692_hw *card, int ch)</div><div class='ctx'> 				 wch-&gt;bch.nr, star);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (star &amp; W_B_STAR_XDOW) {</div><div class='del'>-			pr_debug("%s: B%d XDOW proto=%x\n", card-&gt;name,</div><div class='del'>-				 wch-&gt;bch.nr, wch-&gt;bch.state);</div><div class='add'>+			pr_warning("%s: B%d XDOW proto=%x\n", card-&gt;name,</div><div class='add'>+				   wch-&gt;bch.nr, wch-&gt;bch.state);</div><div class='ctx'> #ifdef ERROR_STATISTIC</div><div class='ctx'> 			wch-&gt;bch.err_xdu++;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -752,20 +763,21 @@ W6692B_interrupt(struct w6692_hw *card, int ch)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		send_next(wch);</div><div class='del'>-		if (stat &amp; W_B_EXI_XDUN)</div><div class='add'>+		if (star &amp; W_B_STAR_XDOW)</div><div class='ctx'> 			return; /* handle XDOW only once */</div><div class='ctx'> 	}</div><div class='ctx'> 	if (stat &amp; W_B_EXI_XDUN) {</div><div class='del'>-		pr_debug("%s: B%d XDUN proto=%x\n", card-&gt;name,</div><div class='del'>-			 wch-&gt;bch.nr, wch-&gt;bch.state);</div><div class='add'>+		pr_warning("%s: B%d XDUN proto=%x\n", card-&gt;name,</div><div class='add'>+			   wch-&gt;bch.nr, wch-&gt;bch.state);</div><div class='ctx'> #ifdef ERROR_STATISTIC</div><div class='ctx'> 		wch-&gt;bch.err_xdu++;</div><div class='ctx'> #endif</div><div class='del'>-		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);</div><div class='del'>-		/* resend */</div><div class='add'>+		/* resend - no XRST needed */</div><div class='ctx'> 		if (wch-&gt;bch.tx_skb) {</div><div class='ctx'> 			if (!test_bit(FLG_TRANSPARENT, &amp;wch-&gt;bch.Flags))</div><div class='ctx'> 				wch-&gt;bch.tx_idx = 0;</div><div class='add'>+		} else if (test_bit(FLG_FILLEMPTY, &amp;wch-&gt;bch.Flags)) {</div><div class='add'>+			test_and_set_bit(FLG_TX_EMPTY, &amp;wch-&gt;bch.Flags);</div><div class='ctx'> 		}</div><div class='ctx'> 		send_next(wch);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -944,22 +956,17 @@ w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 	struct w6692_hw *card = bch-&gt;hw;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> 	struct mISDNhead *hh = mISDN_HEAD_P(skb);</div><div class='del'>-	u32 id;</div><div class='del'>-	u_long flags;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	switch (hh-&gt;prim) {</div><div class='ctx'> 	case PH_DATA_REQ:</div><div class='ctx'> 		spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='ctx'> 		ret = bchannel_senddata(bch, skb);</div><div class='ctx'> 		if (ret &gt; 0) { /* direct TX */</div><div class='del'>-			id = hh-&gt;id; /* skb can be freed */</div><div class='ctx'> 			ret = 0;</div><div class='ctx'> 			W6692_fill_Bfifo(bc);</div><div class='del'>-			spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='del'>-			if (!test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags))</div><div class='del'>-				queue_ch_frame(ch, PH_DATA_CNF, id, NULL);</div><div class='del'>-		} else</div><div class='del'>-			spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	case PH_ACTIVATE_REQ:</div><div class='ctx'> 		spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='hunk'>@@ -994,20 +1001,7 @@ w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> static int</div><div class='ctx'> channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)</div><div class='ctx'> {</div><div class='del'>-	int	ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (cq-&gt;op) {</div><div class='del'>-	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = 0;</div><div class='del'>-		break;</div><div class='del'>-		/* Nothing implemented yet */</div><div class='del'>-	case MISDN_CTRL_FILL_EMPTY:</div><div class='del'>-	default:</div><div class='del'>-		pr_info("%s: unknown Op %x\n", __func__, cq-&gt;op);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return mISDN_ctrl_bchannel(bch, cq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -1022,7 +1016,6 @@ open_bchannel(struct w6692_hw *card, struct channel_req *rq)</div><div class='ctx'> 	bch = &amp;card-&gt;bc[rq-&gt;adr.channel - 1].bch;</div><div class='ctx'> 	if (test_and_set_bit(FLG_OPEN, &amp;bch-&gt;Flags))</div><div class='ctx'> 		return -EBUSY; /* b-channel can be only open once */</div><div class='del'>-	test_and_clear_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags);</div><div class='ctx'> 	bch-&gt;ch.protocol = rq-&gt;protocol;</div><div class='ctx'> 	rq-&gt;ch = &amp;bch-&gt;ch;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1035,7 +1028,10 @@ channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)</div><div class='ctx'> </div><div class='ctx'> 	switch (cq-&gt;op) {</div><div class='ctx'> 	case MISDN_CTRL_GETOP:</div><div class='del'>-		cq-&gt;op = 0;</div><div class='add'>+		cq-&gt;op = MISDN_CTRL_L1_TIMER3;</div><div class='add'>+		break;</div><div class='add'>+	case MISDN_CTRL_L1_TIMER3:</div><div class='add'>+		ret = l1_event(card-&gt;dch.l1, HW_TIMER3_VALUE | (cq-&gt;p1 &amp; 0xff));</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pr_info("%s: unknown CTRL OP %x\n", card-&gt;name, cq-&gt;op);</div><div class='hunk'>@@ -1058,15 +1054,10 @@ w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)</div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case CLOSE_CHANNEL:</div><div class='ctx'> 		test_and_clear_bit(FLG_OPEN, &amp;bch-&gt;Flags);</div><div class='del'>-		if (test_bit(FLG_ACTIVE, &amp;bch-&gt;Flags)) {</div><div class='del'>-			spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='del'>-			mISDN_freebchannel(bch);</div><div class='del'>-			w6692_mode(bc, ISDN_P_NONE);</div><div class='del'>-			spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='del'>-		} else {</div><div class='del'>-			skb_queue_purge(&amp;bch-&gt;rqueue);</div><div class='del'>-			bch-&gt;rcount = 0;</div><div class='del'>-		}</div><div class='add'>+		spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='add'>+		mISDN_freebchannel(bch);</div><div class='add'>+		w6692_mode(bc, ISDN_P_NONE);</div><div class='add'>+		spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='ctx'> 		ch-&gt;protocol = ISDN_P_NONE;</div><div class='ctx'> 		ch-&gt;peer = NULL;</div><div class='ctx'> 		module_put(THIS_MODULE);</div><div class='hunk'>@@ -1320,7 +1311,8 @@ setup_instance(struct w6692_hw *card)</div><div class='ctx'> 	card-&gt;dch.hw = card;</div><div class='ctx'> 	card-&gt;dch.dev.nrbchan = 2;</div><div class='ctx'> 	for (i = 0; i &lt; 2; i++) {</div><div class='del'>-		mISDN_initbchannel(&amp;card-&gt;bc[i].bch, MAX_DATA_MEM);</div><div class='add'>+		mISDN_initbchannel(&amp;card-&gt;bc[i].bch, MAX_DATA_MEM,</div><div class='add'>+				   W_B_FIFO_THRESH);</div><div class='ctx'> 		card-&gt;bc[i].bch.hw = card;</div><div class='ctx'> 		card-&gt;bc[i].bch.nr = i + 1;</div><div class='ctx'> 		card-&gt;bc[i].bch.ch.nr = i + 1;</div><div class='head'>diff --git a/drivers/isdn/hisax/hfc_usb.c b/drivers/isdn/hisax/hfc_usb.c<br/>index 62c65bdefd8a..84f9c8103078 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hisax/hfc_usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hisax/hfc_usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hisax/hfc_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hisax/hfc_usb.c</a></div><div class='hunk'>@@ -1568,6 +1568,7 @@ static struct usb_driver hfc_drv = {</div><div class='ctx'> 	.id_table = hfcusb_idtab,</div><div class='ctx'> 	.probe = hfc_usb_probe,</div><div class='ctx'> 	.disconnect = hfc_usb_disconnect,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __exit</div><div class='head'>diff --git a/drivers/isdn/hisax/st5481_init.c b/drivers/isdn/hisax/st5481_init.c<br/>index 100296e20dc0..54ef9e4f8cbc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hisax/st5481_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hisax/st5481_init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hisax/st5481_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hisax/st5481_init.c</a></div><div class='hunk'>@@ -182,6 +182,7 @@ static struct usb_driver st5481_usb_driver = {</div><div class='ctx'> 	.probe =	probe_st5481,</div><div class='ctx'> 	.disconnect =	disconnect_st5481,</div><div class='ctx'> 	.id_table =	st5481_ids,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init st5481_usb_init(void)</div><div class='head'>diff --git a/drivers/isdn/hysdn/hysdn_proclog.c b/drivers/isdn/hysdn/hysdn_proclog.c<br/>index ba91333e3e41..88e4f0ee073c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/hysdn/hysdn_proclog.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/hysdn/hysdn_proclog.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/hysdn/hysdn_proclog.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/hysdn/hysdn_proclog.c</a></div><div class='hunk'>@@ -156,17 +156,9 @@ static ssize_t</div><div class='ctx'> hysdn_log_write(struct file *file, const char __user *buf, size_t count, loff_t *off)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='del'>-	unsigned char valbuf[128];</div><div class='ctx'> 	hysdn_card *card = file-&gt;private_data;</div><div class='ctx'> </div><div class='del'>-	if (count &gt; (sizeof(valbuf) - 1))</div><div class='del'>-		count = sizeof(valbuf) - 1;	/* limit length */</div><div class='del'>-	if (copy_from_user(valbuf, buf, count))</div><div class='del'>-		return (-EFAULT);	/* copy failed */</div><div class='del'>-</div><div class='del'>-	valbuf[count] = 0;	/* terminating 0 */</div><div class='del'>-</div><div class='del'>-	rc = kstrtoul(valbuf, 0, &amp;card-&gt;debug_flags);</div><div class='add'>+	rc = kstrtoul_from_user(buf, count, 0, &amp;card-&gt;debug_flags);</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	hysdn_addlog(card, "debug set to 0x%lx", card-&gt;debug_flags);</div><div class='head'>diff --git a/drivers/isdn/i4l/isdn_bsdcomp.c b/drivers/isdn/i4l/isdn_bsdcomp.c<br/>index c59e8d2c0675..8837ac5a492d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/i4l/isdn_bsdcomp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/i4l/isdn_bsdcomp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/i4l/isdn_bsdcomp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/i4l/isdn_bsdcomp.c</a></div><div class='hunk'>@@ -612,7 +612,7 @@ static int bsd_compress(void *state, struct sk_buff *skb_in, struct sk_buff *skb</div><div class='ctx'> 		db-&gt;n_bits++;</div><div class='ctx'> </div><div class='ctx'> 	/* If output length is too large then this is an incompressible frame. */</div><div class='del'>-	if (!skb_out || (skb_out &amp;&amp; skb_out-&gt;len &gt;= skb_in-&gt;len)) {</div><div class='add'>+	if (!skb_out || skb_out-&gt;len &gt;= skb_in-&gt;len) {</div><div class='ctx'> 		++db-&gt;incomp_count;</div><div class='ctx'> 		db-&gt;incomp_bytes += isize;</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/drivers/isdn/i4l/isdn_common.c b/drivers/isdn/i4l/isdn_common.c<br/>index d9f5524593fb..8c610fa6782b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/i4l/isdn_common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/i4l/isdn_common.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/i4l/isdn_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/i4l/isdn_common.c</a></div><div class='hunk'>@@ -46,7 +46,6 @@ static DEFINE_MUTEX(isdn_mutex);</div><div class='ctx'> static char *isdn_revision = "$Revision: 1.1.2.3 $";</div><div class='ctx'> </div><div class='ctx'> extern char *isdn_net_revision;</div><div class='del'>-extern char *isdn_tty_revision;</div><div class='ctx'> #ifdef CONFIG_ISDN_PPP</div><div class='ctx'> extern char *isdn_ppp_revision;</div><div class='ctx'> #else</div><div class='hunk'>@@ -2327,8 +2326,6 @@ static int __init isdn_init(void)</div><div class='ctx'> 		dev-&gt;chanmap[i] = -1;</div><div class='ctx'> 		dev-&gt;m_idx[i] = -1;</div><div class='ctx'> 		strcpy(dev-&gt;num[i], "???");</div><div class='del'>-		init_waitqueue_head(&amp;dev-&gt;mdm.info[i].open_wait);</div><div class='del'>-		init_waitqueue_head(&amp;dev-&gt;mdm.info[i].close_wait);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (register_chrdev(ISDN_MAJOR, "isdn", &amp;isdn_fops)) {</div><div class='ctx'> 		printk(KERN_WARNING "isdn: Could not register control devices\n");</div><div class='hunk'>@@ -2353,8 +2350,6 @@ static int __init isdn_init(void)</div><div class='ctx'> </div><div class='ctx'> 	strcpy(tmprev, isdn_revision);</div><div class='ctx'> 	printk(KERN_NOTICE "ISDN subsystem Rev: %s/", isdn_getrev(tmprev));</div><div class='del'>-	strcpy(tmprev, isdn_tty_revision);</div><div class='del'>-	printk("%s/", isdn_getrev(tmprev));</div><div class='ctx'> 	strcpy(tmprev, isdn_net_revision);</div><div class='ctx'> 	printk("%s/", isdn_getrev(tmprev));</div><div class='ctx'> 	strcpy(tmprev, isdn_ppp_revision);</div><div class='head'>diff --git a/drivers/isdn/i4l/isdn_tty.c b/drivers/isdn/i4l/isdn_tty.c<br/>index 3831abdbc66f..7bc50670d7d9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/i4l/isdn_tty.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/i4l/isdn_tty.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/i4l/isdn_tty.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/i4l/isdn_tty.c</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='del'>-/* $Id: isdn_tty.c,v 1.1.2.3 2004/02/10 01:07:13 keil Exp $</div><div class='del'>- *</div><div class='add'>+/*</div><div class='ctx'>  * Linux ISDN subsystem, tty functions and AT-command emulator (linklevel).</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 1994-1999  by Fritz Elfert (fritz@isdn4linux.de)</div><div class='hunk'>@@ -12,6 +11,7 @@</div><div class='ctx'> #undef ISDN_TTY_STAT_DEBUG</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/isdn.h&gt;</div><div class='add'>+#include &lt;linux/serial.h&gt; /* ASYNC_* flags */</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='hunk'>@@ -48,9 +48,6 @@ static int bit2si[8] =</div><div class='ctx'> static int si2bit[8] =</div><div class='ctx'> {4, 1, 4, 4, 4, 4, 4, 4};</div><div class='ctx'> </div><div class='del'>-char *isdn_tty_revision = "$Revision: 1.1.2.3 $";</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /* isdn_tty_try_read() is called from within isdn_tty_rcv_skb()</div><div class='ctx'>  * to stuff incoming data directly into a tty's flip-buffer. This</div><div class='ctx'>  * is done to speed up tty-receiving if the receive-queue is empty.</div><div class='hunk'>@@ -68,49 +65,54 @@ isdn_tty_try_read(modem_info *info, struct sk_buff *skb)</div><div class='ctx'> 	struct tty_struct *tty;</div><div class='ctx'> 	char last;</div><div class='ctx'> </div><div class='del'>-	if (info-&gt;online) {</div><div class='del'>-		if ((tty = info-&gt;tty)) {</div><div class='del'>-			if (info-&gt;mcr &amp; UART_MCR_RTS) {</div><div class='del'>-				len = skb-&gt;len</div><div class='add'>+	if (!info-&gt;online)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	tty = info-&gt;port.tty;</div><div class='add'>+	if (!tty)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!(info-&gt;mcr &amp; UART_MCR_RTS))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	len = skb-&gt;len</div><div class='ctx'> #ifdef CONFIG_ISDN_AUDIO</div><div class='del'>-					+ ISDN_AUDIO_SKB_DLECOUNT(skb)</div><div class='add'>+		+ ISDN_AUDIO_SKB_DLECOUNT(skb)</div><div class='ctx'> #endif</div><div class='del'>-					;</div><div class='add'>+		;</div><div class='add'>+</div><div class='add'>+	c = tty_buffer_request_room(tty, len);</div><div class='add'>+	if (c &lt; len)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-				c = tty_buffer_request_room(tty, len);</div><div class='del'>-				if (c &gt;= len) {</div><div class='del'>-#ifdef CONFIG_ISDN_AUDIO</div><div class='del'>-					if (ISDN_AUDIO_SKB_DLECOUNT(skb)) {</div><div class='del'>-						int l = skb-&gt;len;</div><div class='del'>-						unsigned char *dp = skb-&gt;data;</div><div class='del'>-						while (--l) {</div><div class='del'>-							if (*dp == DLE)</div><div class='del'>-								tty_insert_flip_char(tty, DLE, 0);</div><div class='del'>-							tty_insert_flip_char(tty, *dp++, 0);</div><div class='del'>-						}</div><div class='del'>-						if (*dp == DLE)</div><div class='del'>-							tty_insert_flip_char(tty, DLE, 0);</div><div class='del'>-						last = *dp;</div><div class='del'>-					} else {</div><div class='del'>-#endif</div><div class='del'>-						if (len &gt; 1)</div><div class='del'>-							tty_insert_flip_string(tty, skb-&gt;data, len - 1);</div><div class='del'>-						last = skb-&gt;data[len - 1];</div><div class='ctx'> #ifdef CONFIG_ISDN_AUDIO</div><div class='del'>-					}</div><div class='add'>+	if (ISDN_AUDIO_SKB_DLECOUNT(skb)) {</div><div class='add'>+		int l = skb-&gt;len;</div><div class='add'>+		unsigned char *dp = skb-&gt;data;</div><div class='add'>+		while (--l) {</div><div class='add'>+			if (*dp == DLE)</div><div class='add'>+				tty_insert_flip_char(tty, DLE, 0);</div><div class='add'>+			tty_insert_flip_char(tty, *dp++, 0);</div><div class='add'>+		}</div><div class='add'>+		if (*dp == DLE)</div><div class='add'>+			tty_insert_flip_char(tty, DLE, 0);</div><div class='add'>+		last = *dp;</div><div class='add'>+	} else {</div><div class='ctx'> #endif</div><div class='del'>-					if (info-&gt;emu.mdmreg[REG_CPPP] &amp; BIT_CPPP)</div><div class='del'>-						tty_insert_flip_char(tty, last, 0xFF);</div><div class='del'>-					else</div><div class='del'>-						tty_insert_flip_char(tty, last, TTY_NORMAL);</div><div class='del'>-					tty_flip_buffer_push(tty);</div><div class='del'>-					kfree_skb(skb);</div><div class='del'>-					return 1;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+		if (len &gt; 1)</div><div class='add'>+			tty_insert_flip_string(tty, skb-&gt;data, len - 1);</div><div class='add'>+		last = skb-&gt;data[len - 1];</div><div class='add'>+#ifdef CONFIG_ISDN_AUDIO</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+#endif</div><div class='add'>+	if (info-&gt;emu.mdmreg[REG_CPPP] &amp; BIT_CPPP)</div><div class='add'>+		tty_insert_flip_char(tty, last, 0xFF);</div><div class='add'>+	else</div><div class='add'>+		tty_insert_flip_char(tty, last, TTY_NORMAL);</div><div class='add'>+	tty_flip_buffer_push(tty);</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* isdn_tty_readmodem() is called periodically from within timer-interrupt.</div><div class='hunk'>@@ -128,35 +130,39 @@ isdn_tty_readmodem(void)</div><div class='ctx'> 	modem_info *info;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ISDN_MAX_CHANNELS; i++) {</div><div class='del'>-		if ((midx = dev-&gt;m_idx[i]) &gt;= 0) {</div><div class='del'>-			info = &amp;dev-&gt;mdm.info[midx];</div><div class='del'>-			if (info-&gt;online) {</div><div class='del'>-				r = 0;</div><div class='add'>+		midx = dev-&gt;m_idx[i];</div><div class='add'>+		if (midx &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		info = &amp;dev-&gt;mdm.info[midx];</div><div class='add'>+		if (!info-&gt;online)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		r = 0;</div><div class='ctx'> #ifdef CONFIG_ISDN_AUDIO</div><div class='del'>-				isdn_audio_eval_dtmf(info);</div><div class='del'>-				if ((info-&gt;vonline &amp; 1) &amp;&amp; (info-&gt;emu.vpar[1]))</div><div class='del'>-					isdn_audio_eval_silence(info);</div><div class='del'>-#endif</div><div class='del'>-				if ((tty = info-&gt;tty)) {</div><div class='del'>-					if (info-&gt;mcr &amp; UART_MCR_RTS) {</div><div class='del'>-						/* CISCO AsyncPPP Hack */</div><div class='del'>-						if (!(info-&gt;emu.mdmreg[REG_CPPP] &amp; BIT_CPPP))</div><div class='del'>-							r = isdn_readbchan_tty(info-&gt;isdn_driver, info-&gt;isdn_channel, tty, 0);</div><div class='del'>-						else</div><div class='del'>-							r = isdn_readbchan_tty(info-&gt;isdn_driver, info-&gt;isdn_channel, tty, 1);</div><div class='del'>-						if (r)</div><div class='del'>-							tty_flip_buffer_push(tty);</div><div class='del'>-					} else</div><div class='del'>-						r = 1;</div><div class='del'>-				} else</div><div class='del'>-					r = 1;</div><div class='del'>-				if (r) {</div><div class='del'>-					info-&gt;rcvsched = 0;</div><div class='del'>-					resched = 1;</div><div class='del'>-				} else</div><div class='del'>-					info-&gt;rcvsched = 1;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+		isdn_audio_eval_dtmf(info);</div><div class='add'>+		if ((info-&gt;vonline &amp; 1) &amp;&amp; (info-&gt;emu.vpar[1]))</div><div class='add'>+			isdn_audio_eval_silence(info);</div><div class='add'>+#endif</div><div class='add'>+		tty = info-&gt;port.tty;</div><div class='add'>+		if (tty) {</div><div class='add'>+			if (info-&gt;mcr &amp; UART_MCR_RTS) {</div><div class='add'>+				/* CISCO AsyncPPP Hack */</div><div class='add'>+				if (!(info-&gt;emu.mdmreg[REG_CPPP] &amp; BIT_CPPP))</div><div class='add'>+					r = isdn_readbchan_tty(info-&gt;isdn_driver, info-&gt;isdn_channel, tty, 0);</div><div class='add'>+				else</div><div class='add'>+					r = isdn_readbchan_tty(info-&gt;isdn_driver, info-&gt;isdn_channel, tty, 1);</div><div class='add'>+				if (r)</div><div class='add'>+					tty_flip_buffer_push(tty);</div><div class='add'>+			} else</div><div class='add'>+				r = 1;</div><div class='add'>+		} else</div><div class='add'>+			r = 1;</div><div class='add'>+		if (r) {</div><div class='add'>+			info-&gt;rcvsched = 0;</div><div class='add'>+			resched = 1;</div><div class='add'>+		} else</div><div class='add'>+			info-&gt;rcvsched = 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!resched)</div><div class='ctx'> 		isdn_timer_ctrl(ISDN_TIMER_MODEMREAD, 0);</div><div class='hunk'>@@ -294,7 +300,7 @@ isdn_tty_tint(modem_info *info)</div><div class='ctx'> 	len = skb-&gt;len;</div><div class='ctx'> 	if ((slen = isdn_writebuf_skb_stub(info-&gt;isdn_driver,</div><div class='ctx'> 					   info-&gt;isdn_channel, 1, skb)) == len) {</div><div class='del'>-		struct tty_struct *tty = info-&gt;tty;</div><div class='add'>+		struct tty_struct *tty = info-&gt;port.tty;</div><div class='ctx'> 		info-&gt;send_outstanding++;</div><div class='ctx'> 		info-&gt;msr &amp;= ~UART_MSR_CTS;</div><div class='ctx'> 		info-&gt;lsr &amp;= ~UART_LSR_TEMT;</div><div class='hunk'>@@ -327,7 +333,7 @@ isdn_tty_countDLE(unsigned char *buf, int len)</div><div class='ctx'> static int</div><div class='ctx'> isdn_tty_handleDLEdown(modem_info *info, atemu *m, int len)</div><div class='ctx'> {</div><div class='del'>-	unsigned char *p = &amp;info-&gt;xmit_buf[info-&gt;xmit_count];</div><div class='add'>+	unsigned char *p = &amp;info-&gt;port.xmit_buf[info-&gt;xmit_count];</div><div class='ctx'> 	int count = 0;</div><div class='ctx'> </div><div class='ctx'> 	while (len &gt; 0) {</div><div class='hunk'>@@ -471,7 +477,7 @@ isdn_tty_senddown(modem_info *info)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	skb_reserve(skb, skb_res);</div><div class='del'>-	memcpy(skb_put(skb, buflen), info-&gt;xmit_buf, buflen);</div><div class='add'>+	memcpy(skb_put(skb, buflen), info-&gt;port.xmit_buf, buflen);</div><div class='ctx'> 	info-&gt;xmit_count = 0;</div><div class='ctx'> #ifdef CONFIG_ISDN_AUDIO</div><div class='ctx'> 	if (info-&gt;vonline &amp; 2) {</div><div class='hunk'>@@ -699,7 +705,7 @@ isdn_tty_modem_hup(modem_info *info, int local)</div><div class='ctx'> 	printk(KERN_DEBUG "Mhup ttyI%d\n", info-&gt;line);</div><div class='ctx'> #endif</div><div class='ctx'> 	info-&gt;rcvsched = 0;</div><div class='del'>-	isdn_tty_flush_buffer(info-&gt;tty);</div><div class='add'>+	isdn_tty_flush_buffer(info-&gt;port.tty);</div><div class='ctx'> 	if (info-&gt;online) {</div><div class='ctx'> 		info-&gt;last_lhup = local;</div><div class='ctx'> 		info-&gt;online = 0;</div><div class='hunk'>@@ -997,20 +1003,21 @@ isdn_tty_paranoia_check(modem_info *info, char *name, const char *routine)</div><div class='ctx'> static void</div><div class='ctx'> isdn_tty_change_speed(modem_info *info)</div><div class='ctx'> {</div><div class='add'>+	struct tty_port *port = &amp;info-&gt;port;</div><div class='ctx'> 	uint cflag,</div><div class='ctx'> 		cval,</div><div class='ctx'> 		quot;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!info-&gt;tty || !info-&gt;tty-&gt;termios)</div><div class='add'>+	if (!port-&gt;tty || !port-&gt;tty-&gt;termios)</div><div class='ctx'> 		return;</div><div class='del'>-	cflag = info-&gt;tty-&gt;termios-&gt;c_cflag;</div><div class='add'>+	cflag = port-&gt;tty-&gt;termios-&gt;c_cflag;</div><div class='ctx'> </div><div class='ctx'> 	quot = i = cflag &amp; CBAUD;</div><div class='ctx'> 	if (i &amp; CBAUDEX) {</div><div class='ctx'> 		i &amp;= ~CBAUDEX;</div><div class='ctx'> 		if (i &lt; 1 || i &gt; 2)</div><div class='del'>-			info-&gt;tty-&gt;termios-&gt;c_cflag &amp;= ~CBAUDEX;</div><div class='add'>+			port-&gt;tty-&gt;termios-&gt;c_cflag &amp;= ~CBAUDEX;</div><div class='ctx'> 		else</div><div class='ctx'> 			i += 15;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1040,20 +1047,20 @@ isdn_tty_change_speed(modem_info *info)</div><div class='ctx'> </div><div class='ctx'> 	/* CTS flow control flag and modem status interrupts */</div><div class='ctx'> 	if (cflag &amp; CRTSCTS) {</div><div class='del'>-		info-&gt;flags |= ISDN_ASYNC_CTS_FLOW;</div><div class='add'>+		port-&gt;flags |= ASYNC_CTS_FLOW;</div><div class='ctx'> 	} else</div><div class='del'>-		info-&gt;flags &amp;= ~ISDN_ASYNC_CTS_FLOW;</div><div class='add'>+		port-&gt;flags &amp;= ~ASYNC_CTS_FLOW;</div><div class='ctx'> 	if (cflag &amp; CLOCAL)</div><div class='del'>-		info-&gt;flags &amp;= ~ISDN_ASYNC_CHECK_CD;</div><div class='add'>+		port-&gt;flags &amp;= ~ASYNC_CHECK_CD;</div><div class='ctx'> 	else {</div><div class='del'>-		info-&gt;flags |= ISDN_ASYNC_CHECK_CD;</div><div class='add'>+		port-&gt;flags |= ASYNC_CHECK_CD;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> isdn_tty_startup(modem_info *info)</div><div class='ctx'> {</div><div class='del'>-	if (info-&gt;flags &amp; ISDN_ASYNC_INITIALIZED)</div><div class='add'>+	if (info-&gt;port.flags &amp; ASYNC_INITIALIZED)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	isdn_lock_drivers();</div><div class='ctx'> #ifdef ISDN_DEBUG_MODEM_OPEN</div><div class='hunk'>@@ -1063,14 +1070,14 @@ isdn_tty_startup(modem_info *info)</div><div class='ctx'> 	 * Now, initialize the UART</div><div class='ctx'> 	 */</div><div class='ctx'> 	info-&gt;mcr = UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2;</div><div class='del'>-	if (info-&gt;tty)</div><div class='del'>-		clear_bit(TTY_IO_ERROR, &amp;info-&gt;tty-&gt;flags);</div><div class='add'>+	if (info-&gt;port.tty)</div><div class='add'>+		clear_bit(TTY_IO_ERROR, &amp;info-&gt;port.tty-&gt;flags);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * and set the speed of the serial port</div><div class='ctx'> 	 */</div><div class='ctx'> 	isdn_tty_change_speed(info);</div><div class='ctx'> </div><div class='del'>-	info-&gt;flags |= ISDN_ASYNC_INITIALIZED;</div><div class='add'>+	info-&gt;port.flags |= ASYNC_INITIALIZED;</div><div class='ctx'> 	info-&gt;msr |= (UART_MSR_DSR | UART_MSR_CTS);</div><div class='ctx'> 	info-&gt;send_outstanding = 0;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1083,14 +1090,14 @@ isdn_tty_startup(modem_info *info)</div><div class='ctx'> static void</div><div class='ctx'> isdn_tty_shutdown(modem_info *info)</div><div class='ctx'> {</div><div class='del'>-	if (!(info-&gt;flags &amp; ISDN_ASYNC_INITIALIZED))</div><div class='add'>+	if (!(info-&gt;port.flags &amp; ASYNC_INITIALIZED))</div><div class='ctx'> 		return;</div><div class='ctx'> #ifdef ISDN_DEBUG_MODEM_OPEN</div><div class='ctx'> 	printk(KERN_DEBUG "Shutting down isdnmodem port %d ....\n", info-&gt;line);</div><div class='ctx'> #endif</div><div class='ctx'> 	isdn_unlock_drivers();</div><div class='ctx'> 	info-&gt;msr &amp;= ~UART_MSR_RI;</div><div class='del'>-	if (!info-&gt;tty || (info-&gt;tty-&gt;termios-&gt;c_cflag &amp; HUPCL)) {</div><div class='add'>+	if (!info-&gt;port.tty || (info-&gt;port.tty-&gt;termios-&gt;c_cflag &amp; HUPCL)) {</div><div class='ctx'> 		info-&gt;mcr &amp;= ~(UART_MCR_DTR | UART_MCR_RTS);</div><div class='ctx'> 		if (info-&gt;emu.mdmreg[REG_DTRHUP] &amp; BIT_DTRHUP) {</div><div class='ctx'> 			isdn_tty_modem_reset_regs(info, 0);</div><div class='hunk'>@@ -1100,10 +1107,10 @@ isdn_tty_shutdown(modem_info *info)</div><div class='ctx'> 			isdn_tty_modem_hup(info, 1);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (info-&gt;tty)</div><div class='del'>-		set_bit(TTY_IO_ERROR, &amp;info-&gt;tty-&gt;flags);</div><div class='add'>+	if (info-&gt;port.tty)</div><div class='add'>+		set_bit(TTY_IO_ERROR, &amp;info-&gt;port.tty-&gt;flags);</div><div class='ctx'> </div><div class='del'>-	info-&gt;flags &amp;= ~ISDN_ASYNC_INITIALIZED;</div><div class='add'>+	info-&gt;port.flags &amp;= ~ASYNC_INITIALIZED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* isdn_tty_write() is the main send-routine. It is called from the upper</div><div class='hunk'>@@ -1146,7 +1153,7 @@ isdn_tty_write(struct tty_struct *tty, const u_char *buf, int count)</div><div class='ctx'> 				isdn_tty_check_esc(buf, m-&gt;mdmreg[REG_ESC], c,</div><div class='ctx'> 						   &amp;(m-&gt;pluscount),</div><div class='ctx'> 						   &amp;(m-&gt;lastplus));</div><div class='del'>-			memcpy(&amp;(info-&gt;xmit_buf[info-&gt;xmit_count]), buf, c);</div><div class='add'>+			memcpy(&amp;info-&gt;port.xmit_buf[info-&gt;xmit_count], buf, c);</div><div class='ctx'> #ifdef CONFIG_ISDN_AUDIO</div><div class='ctx'> 			if (info-&gt;vonline) {</div><div class='ctx'> 				int cc = isdn_tty_handleDLEdown(info, m, c);</div><div class='hunk'>@@ -1478,107 +1485,6 @@ isdn_tty_set_termios(struct tty_struct *tty, struct ktermios *old_termios)</div><div class='ctx'>  * isdn_tty_open() and friends</div><div class='ctx'>  * ------------------------------------------------------------</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='del'>-isdn_tty_block_til_ready(struct tty_struct *tty, struct file *filp, modem_info *info)</div><div class='del'>-{</div><div class='del'>-	DECLARE_WAITQUEUE(wait, NULL);</div><div class='del'>-	int do_clocal = 0;</div><div class='del'>-	int retval;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the device is in the middle of being closed, then block</div><div class='del'>-	 * until it's done, and then try again.</div><div class='del'>-	 */</div><div class='del'>-	if (tty_hung_up_p(filp) ||</div><div class='del'>-	    (info-&gt;flags &amp; ISDN_ASYNC_CLOSING)) {</div><div class='del'>-		if (info-&gt;flags &amp; ISDN_ASYNC_CLOSING)</div><div class='del'>-			interruptible_sleep_on(&amp;info-&gt;close_wait);</div><div class='del'>-#ifdef MODEM_DO_RESTART</div><div class='del'>-		if (info-&gt;flags &amp; ISDN_ASYNC_HUP_NOTIFY)</div><div class='del'>-			return -EAGAIN;</div><div class='del'>-		else</div><div class='del'>-			return -ERESTARTSYS;</div><div class='del'>-#else</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 * If non-blocking mode is set, then make the check up front</div><div class='del'>-	 * and then exit.</div><div class='del'>-	 */</div><div class='del'>-	if ((filp-&gt;f_flags &amp; O_NONBLOCK) ||</div><div class='del'>-	    (tty-&gt;flags &amp; (1 &lt;&lt; TTY_IO_ERROR))) {</div><div class='del'>-		if (info-&gt;flags &amp; ISDN_ASYNC_CALLOUT_ACTIVE)</div><div class='del'>-			return -EBUSY;</div><div class='del'>-		info-&gt;flags |= ISDN_ASYNC_NORMAL_ACTIVE;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	if (info-&gt;flags &amp; ISDN_ASYNC_CALLOUT_ACTIVE) {</div><div class='del'>-		if (info-&gt;normal_termios.c_cflag &amp; CLOCAL)</div><div class='del'>-			do_clocal = 1;</div><div class='del'>-	} else {</div><div class='del'>-		if (tty-&gt;termios-&gt;c_cflag &amp; CLOCAL)</div><div class='del'>-			do_clocal = 1;</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 * Block waiting for the carrier detect and the line to become</div><div class='del'>-	 * free (i.e., not in use by the callout).  While we are in</div><div class='del'>-	 * this loop, info-&gt;count is dropped by one, so that</div><div class='del'>-	 * isdn_tty_close() knows when to free things.  We restore it upon</div><div class='del'>-	 * exit, either normal or abnormal.</div><div class='del'>-	 */</div><div class='del'>-	retval = 0;</div><div class='del'>-	add_wait_queue(&amp;info-&gt;open_wait, &amp;wait);</div><div class='del'>-#ifdef ISDN_DEBUG_MODEM_OPEN</div><div class='del'>-	printk(KERN_DEBUG "isdn_tty_block_til_ready before block: ttyi%d, count = %d\n",</div><div class='del'>-	       info-&gt;line, info-&gt;count);</div><div class='del'>-#endif</div><div class='del'>-	if (!(tty_hung_up_p(filp)))</div><div class='del'>-		info-&gt;count--;</div><div class='del'>-	info-&gt;blocked_open++;</div><div class='del'>-	while (1) {</div><div class='del'>-		set_current_state(TASK_INTERRUPTIBLE);</div><div class='del'>-		if (tty_hung_up_p(filp) ||</div><div class='del'>-		    !(info-&gt;flags &amp; ISDN_ASYNC_INITIALIZED)) {</div><div class='del'>-#ifdef MODEM_DO_RESTART</div><div class='del'>-			if (info-&gt;flags &amp; ISDN_ASYNC_HUP_NOTIFY)</div><div class='del'>-				retval = -EAGAIN;</div><div class='del'>-			else</div><div class='del'>-				retval = -ERESTARTSYS;</div><div class='del'>-#else</div><div class='del'>-			retval = -EAGAIN;</div><div class='del'>-#endif</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (!(info-&gt;flags &amp; ISDN_ASYNC_CALLOUT_ACTIVE) &amp;&amp;</div><div class='del'>-		    !(info-&gt;flags &amp; ISDN_ASYNC_CLOSING) &amp;&amp;</div><div class='del'>-		    (do_clocal || (info-&gt;msr &amp; UART_MSR_DCD))) {</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (signal_pending(current)) {</div><div class='del'>-			retval = -ERESTARTSYS;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-#ifdef ISDN_DEBUG_MODEM_OPEN</div><div class='del'>-		printk(KERN_DEBUG "isdn_tty_block_til_ready blocking: ttyi%d, count = %d\n",</div><div class='del'>-		       info-&gt;line, info-&gt;count);</div><div class='del'>-#endif</div><div class='del'>-		schedule();</div><div class='del'>-	}</div><div class='del'>-	current-&gt;state = TASK_RUNNING;</div><div class='del'>-	remove_wait_queue(&amp;info-&gt;open_wait, &amp;wait);</div><div class='del'>-	if (!tty_hung_up_p(filp))</div><div class='del'>-		info-&gt;count++;</div><div class='del'>-	info-&gt;blocked_open--;</div><div class='del'>-#ifdef ISDN_DEBUG_MODEM_OPEN</div><div class='del'>-	printk(KERN_DEBUG "isdn_tty_block_til_ready after blocking: ttyi%d, count = %d\n",</div><div class='del'>-	       info-&gt;line, info-&gt;count);</div><div class='del'>-#endif</div><div class='del'>-	if (retval)</div><div class='del'>-		return retval;</div><div class='del'>-	info-&gt;flags |= ISDN_ASYNC_NORMAL_ACTIVE;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This routine is called whenever a serial port is opened.  It</div><div class='hunk'>@@ -1589,23 +1495,22 @@ isdn_tty_block_til_ready(struct tty_struct *tty, struct file *filp, modem_info *</div><div class='ctx'> static int</div><div class='ctx'> isdn_tty_open(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> {</div><div class='add'>+	struct tty_port *port;</div><div class='ctx'> 	modem_info *info;</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='ctx'> 	info = &amp;dev-&gt;mdm.info[tty-&gt;index];</div><div class='ctx'> 	if (isdn_tty_paranoia_check(info, tty-&gt;name, "isdn_tty_open"))</div><div class='ctx'> 		return -ENODEV;</div><div class='del'>-	if (!try_module_get(info-&gt;owner)) {</div><div class='del'>-		printk(KERN_WARNING "%s: cannot reserve module\n", __func__);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='add'>+	port = &amp;info-&gt;port;</div><div class='ctx'> #ifdef ISDN_DEBUG_MODEM_OPEN</div><div class='ctx'> 	printk(KERN_DEBUG "isdn_tty_open %s, count = %d\n", tty-&gt;name,</div><div class='del'>-	       info-&gt;count);</div><div class='add'>+	       port-&gt;count);</div><div class='ctx'> #endif</div><div class='del'>-	info-&gt;count++;</div><div class='add'>+	port-&gt;count++;</div><div class='ctx'> 	tty-&gt;driver_data = info;</div><div class='del'>-	info-&gt;tty = tty;</div><div class='add'>+	port-&gt;tty = tty;</div><div class='add'>+	tty-&gt;port = port;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Start up serial port</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1614,15 +1519,13 @@ isdn_tty_open(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> #ifdef ISDN_DEBUG_MODEM_OPEN</div><div class='ctx'> 		printk(KERN_DEBUG "isdn_tty_open return after startup\n");</div><div class='ctx'> #endif</div><div class='del'>-		module_put(info-&gt;owner);</div><div class='ctx'> 		return retval;</div><div class='ctx'> 	}</div><div class='del'>-	retval = isdn_tty_block_til_ready(tty, filp, info);</div><div class='add'>+	retval = tty_port_block_til_ready(port, tty, filp);</div><div class='ctx'> 	if (retval) {</div><div class='ctx'> #ifdef ISDN_DEBUG_MODEM_OPEN</div><div class='ctx'> 		printk(KERN_DEBUG "isdn_tty_open return after isdn_tty_block_til_ready \n");</div><div class='ctx'> #endif</div><div class='del'>-		module_put(info-&gt;owner);</div><div class='ctx'> 		return retval;</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef ISDN_DEBUG_MODEM_OPEN</div><div class='hunk'>@@ -1639,6 +1542,7 @@ static void</div><div class='ctx'> isdn_tty_close(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> {</div><div class='ctx'> 	modem_info *info = (modem_info *) tty-&gt;driver_data;</div><div class='add'>+	struct tty_port *port = &amp;info-&gt;port;</div><div class='ctx'> 	ulong timeout;</div><div class='ctx'> </div><div class='ctx'> 	if (!info || isdn_tty_paranoia_check(info, tty-&gt;name, "isdn_tty_close"))</div><div class='hunk'>@@ -1649,7 +1553,7 @@ isdn_tty_close(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> #endif</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	if ((tty-&gt;count == 1) &amp;&amp; (info-&gt;count != 1)) {</div><div class='add'>+	if ((tty-&gt;count == 1) &amp;&amp; (port-&gt;count != 1)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Uh, oh.  tty-&gt;count is 1, which means that the tty</div><div class='ctx'> 		 * structure will be freed.  Info-&gt;count should always</div><div class='hunk'>@@ -1658,30 +1562,21 @@ isdn_tty_close(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> 		 * serial port won't be shutdown.</div><div class='ctx'> 		 */</div><div class='ctx'> 		printk(KERN_ERR "isdn_tty_close: bad port count; tty-&gt;count is 1, "</div><div class='del'>-		       "info-&gt;count is %d\n", info-&gt;count);</div><div class='del'>-		info-&gt;count = 1;</div><div class='add'>+		       "info-&gt;count is %d\n", port-&gt;count);</div><div class='add'>+		port-&gt;count = 1;</div><div class='ctx'> 	}</div><div class='del'>-	if (--info-&gt;count &lt; 0) {</div><div class='add'>+	if (--port-&gt;count &lt; 0) {</div><div class='ctx'> 		printk(KERN_ERR "isdn_tty_close: bad port count for ttyi%d: %d\n",</div><div class='del'>-		       info-&gt;line, info-&gt;count);</div><div class='del'>-		info-&gt;count = 0;</div><div class='add'>+		       info-&gt;line, port-&gt;count);</div><div class='add'>+		port-&gt;count = 0;</div><div class='ctx'> 	}</div><div class='del'>-	if (info-&gt;count) {</div><div class='add'>+	if (port-&gt;count) {</div><div class='ctx'> #ifdef ISDN_DEBUG_MODEM_OPEN</div><div class='ctx'> 		printk(KERN_DEBUG "isdn_tty_close after info-&gt;count != 0\n");</div><div class='ctx'> #endif</div><div class='del'>-		module_put(info-&gt;owner);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	info-&gt;flags |= ISDN_ASYNC_CLOSING;</div><div class='del'>-	/*</div><div class='del'>-	 * Save the termios structure, since this port may have</div><div class='del'>-	 * separate termios for callout and dialin.</div><div class='del'>-	 */</div><div class='del'>-	if (info-&gt;flags &amp; ISDN_ASYNC_NORMAL_ACTIVE)</div><div class='del'>-		info-&gt;normal_termios = *tty-&gt;termios;</div><div class='del'>-	if (info-&gt;flags &amp; ISDN_ASYNC_CALLOUT_ACTIVE)</div><div class='del'>-		info-&gt;callout_termios = *tty-&gt;termios;</div><div class='add'>+	port-&gt;flags |= ASYNC_CLOSING;</div><div class='ctx'> </div><div class='ctx'> 	tty-&gt;closing = 1;</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1690,7 +1585,7 @@ isdn_tty_close(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> 	 * interrupt driver to stop checking the data ready bit in the</div><div class='ctx'> 	 * line status register.</div><div class='ctx'> 	 */</div><div class='del'>-	if (info-&gt;flags &amp; ISDN_ASYNC_INITIALIZED) {</div><div class='add'>+	if (port-&gt;flags &amp; ASYNC_INITIALIZED) {</div><div class='ctx'> 		tty_wait_until_sent_from_close(tty, 3000);	/* 30 seconds timeout */</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Before we drop DTR, make sure the UART transmitter</div><div class='hunk'>@@ -1708,16 +1603,10 @@ isdn_tty_close(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> 	isdn_tty_shutdown(info);</div><div class='ctx'> 	isdn_tty_flush_buffer(tty);</div><div class='ctx'> 	tty_ldisc_flush(tty);</div><div class='del'>-	info-&gt;tty = NULL;</div><div class='add'>+	port-&gt;tty = NULL;</div><div class='ctx'> 	info-&gt;ncarrier = 0;</div><div class='del'>-	tty-&gt;closing = 0;</div><div class='del'>-	module_put(info-&gt;owner);</div><div class='del'>-	if (info-&gt;blocked_open) {</div><div class='del'>-		msleep_interruptible(500);</div><div class='del'>-		wake_up_interruptible(&amp;info-&gt;open_wait);</div><div class='del'>-	}</div><div class='del'>-	info-&gt;flags &amp;= ~(ISDN_ASYNC_NORMAL_ACTIVE | ISDN_ASYNC_CLOSING);</div><div class='del'>-	wake_up_interruptible(&amp;info-&gt;close_wait);</div><div class='add'>+</div><div class='add'>+	tty_port_close_end(port, tty);</div><div class='ctx'> #ifdef ISDN_DEBUG_MODEM_OPEN</div><div class='ctx'> 	printk(KERN_DEBUG "isdn_tty_close normal exit\n");</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1730,14 +1619,15 @@ static void</div><div class='ctx'> isdn_tty_hangup(struct tty_struct *tty)</div><div class='ctx'> {</div><div class='ctx'> 	modem_info *info = (modem_info *) tty-&gt;driver_data;</div><div class='add'>+	struct tty_port *port = &amp;info-&gt;port;</div><div class='ctx'> </div><div class='ctx'> 	if (isdn_tty_paranoia_check(info, tty-&gt;name, "isdn_tty_hangup"))</div><div class='ctx'> 		return;</div><div class='ctx'> 	isdn_tty_shutdown(info);</div><div class='del'>-	info-&gt;count = 0;</div><div class='del'>-	info-&gt;flags &amp;= ~(ISDN_ASYNC_NORMAL_ACTIVE | ISDN_ASYNC_CALLOUT_ACTIVE);</div><div class='del'>-	info-&gt;tty = NULL;</div><div class='del'>-	wake_up_interruptible(&amp;info-&gt;open_wait);</div><div class='add'>+	port-&gt;count = 0;</div><div class='add'>+	port-&gt;flags &amp;= ~ASYNC_NORMAL_ACTIVE;</div><div class='add'>+	port-&gt;tty = NULL;</div><div class='add'>+	wake_up_interruptible(&amp;port-&gt;open_wait);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* This routine initializes all emulator-data.</div><div class='hunk'>@@ -1864,6 +1754,16 @@ static const struct tty_operations modem_ops = {</div><div class='ctx'> 	.tiocmset = isdn_tty_tiocmset,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int isdn_tty_carrier_raised(struct tty_port *port)</div><div class='add'>+{</div><div class='add'>+	modem_info *info = container_of(port, modem_info, port);</div><div class='add'>+	return info-&gt;msr &amp; UART_MSR_DCD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct tty_port_operations isdn_tty_port_ops = {</div><div class='add'>+	.carrier_raised = isdn_tty_carrier_raised,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int</div><div class='ctx'> isdn_tty_modem_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -1899,9 +1799,8 @@ isdn_tty_modem_init(void)</div><div class='ctx'> 			goto err_unregister;</div><div class='ctx'> 		}</div><div class='ctx'> #endif</div><div class='del'>-#ifdef MODULE</div><div class='del'>-		info-&gt;owner = THIS_MODULE;</div><div class='del'>-#endif</div><div class='add'>+		tty_port_init(&amp;info-&gt;port);</div><div class='add'>+		info-&gt;port.ops = &amp;isdn_tty_port_ops;</div><div class='ctx'> 		spin_lock_init(&amp;info-&gt;readlock);</div><div class='ctx'> 		sprintf(info-&gt;last_cause, "0000");</div><div class='ctx'> 		sprintf(info-&gt;last_num, "none");</div><div class='hunk'>@@ -1913,12 +1812,7 @@ isdn_tty_modem_init(void)</div><div class='ctx'> 		isdn_tty_modem_reset_regs(info, 1);</div><div class='ctx'> 		info-&gt;magic = ISDN_ASYNC_MAGIC;</div><div class='ctx'> 		info-&gt;line = i;</div><div class='del'>-		info-&gt;tty = NULL;</div><div class='ctx'> 		info-&gt;x_char = 0;</div><div class='del'>-		info-&gt;count = 0;</div><div class='del'>-		info-&gt;blocked_open = 0;</div><div class='del'>-		init_waitqueue_head(&amp;info-&gt;open_wait);</div><div class='del'>-		init_waitqueue_head(&amp;info-&gt;close_wait);</div><div class='ctx'> 		info-&gt;isdn_driver = -1;</div><div class='ctx'> 		info-&gt;isdn_channel = -1;</div><div class='ctx'> 		info-&gt;drv_index = -1;</div><div class='hunk'>@@ -1930,13 +1824,15 @@ isdn_tty_modem_init(void)</div><div class='ctx'> #ifdef CONFIG_ISDN_AUDIO</div><div class='ctx'> 		skb_queue_head_init(&amp;info-&gt;dtmf_queue);</div><div class='ctx'> #endif</div><div class='del'>-		if (!(info-&gt;xmit_buf = kmalloc(ISDN_SERIAL_XMIT_MAX + 5, GFP_KERNEL))) {</div><div class='add'>+		info-&gt;port.xmit_buf = kmalloc(ISDN_SERIAL_XMIT_MAX + 5,</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+		if (!info-&gt;port.xmit_buf) {</div><div class='ctx'> 			printk(KERN_ERR "Could not allocate modem xmit-buffer\n");</div><div class='ctx'> 			retval = -ENOMEM;</div><div class='ctx'> 			goto err_unregister;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Make room for T.70 header */</div><div class='del'>-		info-&gt;xmit_buf += 4;</div><div class='add'>+		info-&gt;port.xmit_buf += 4;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> err_unregister:</div><div class='hunk'>@@ -1945,7 +1841,7 @@ err_unregister:</div><div class='ctx'> #ifdef CONFIG_ISDN_TTY_FAX</div><div class='ctx'> 		kfree(info-&gt;fax);</div><div class='ctx'> #endif</div><div class='del'>-		kfree(info-&gt;xmit_buf - 4);</div><div class='add'>+		kfree(info-&gt;port.xmit_buf - 4);</div><div class='ctx'> 	}</div><div class='ctx'> 	tty_unregister_driver(m-&gt;tty_modem);</div><div class='ctx'> err:</div><div class='hunk'>@@ -1966,7 +1862,7 @@ isdn_tty_exit(void)</div><div class='ctx'> #ifdef CONFIG_ISDN_TTY_FAX</div><div class='ctx'> 		kfree(info-&gt;fax);</div><div class='ctx'> #endif</div><div class='del'>-		kfree(info-&gt;xmit_buf - 4);</div><div class='add'>+		kfree(info-&gt;port.xmit_buf - 4);</div><div class='ctx'> 	}</div><div class='ctx'> 	tty_unregister_driver(dev-&gt;mdm.tty_modem);</div><div class='ctx'> 	put_tty_driver(dev-&gt;mdm.tty_modem);</div><div class='hunk'>@@ -2068,7 +1964,7 @@ isdn_tty_find_icall(int di, int ch, setup_parm *setup)</div><div class='ctx'> 	for (i = 0; i &lt; ISDN_MAX_CHANNELS; i++) {</div><div class='ctx'> 		modem_info *info = &amp;dev-&gt;mdm.info[i];</div><div class='ctx'> </div><div class='del'>-		if (info-&gt;count == 0)</div><div class='add'>+		if (info-&gt;port.count == 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if ((info-&gt;emu.mdmreg[REG_SI1] &amp; si2bit[si1]) &amp;&amp;  /* SI1 is matching */</div><div class='ctx'> 		    (info-&gt;emu.mdmreg[REG_SI2] == si2))	{         /* SI2 is matching */</div><div class='hunk'>@@ -2076,12 +1972,12 @@ isdn_tty_find_icall(int di, int ch, setup_parm *setup)</div><div class='ctx'> #ifdef ISDN_DEBUG_MODEM_ICALL</div><div class='ctx'> 			printk(KERN_DEBUG "m_fi: match1 wret=%d\n", wret);</div><div class='ctx'> 			printk(KERN_DEBUG "m_fi: idx=%d flags=%08lx drv=%d ch=%d usg=%d\n", idx,</div><div class='del'>-			       info-&gt;flags, info-&gt;isdn_driver, info-&gt;isdn_channel,</div><div class='del'>-			       dev-&gt;usage[idx]);</div><div class='add'>+			       info-&gt;port.flags, info-&gt;isdn_driver,</div><div class='add'>+			       info-&gt;isdn_channel, dev-&gt;usage[idx]);</div><div class='ctx'> #endif</div><div class='ctx'> 			if (</div><div class='ctx'> #ifndef FIX_FILE_TRANSFER</div><div class='del'>-				(info-&gt;flags &amp; ISDN_ASYNC_NORMAL_ACTIVE) &amp;&amp;</div><div class='add'>+				(info-&gt;port.flags &amp; ASYNC_NORMAL_ACTIVE) &amp;&amp;</div><div class='ctx'> #endif</div><div class='ctx'> 				(info-&gt;isdn_driver == -1) &amp;&amp;</div><div class='ctx'> 				(info-&gt;isdn_channel == -1) &amp;&amp;</div><div class='hunk'>@@ -2120,8 +2016,7 @@ isdn_tty_find_icall(int di, int ch, setup_parm *setup)</div><div class='ctx'> 	return (wret == 2) ? 3 : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define TTY_IS_ACTIVE(info)						\</div><div class='del'>-	(info-&gt;flags &amp; (ISDN_ASYNC_NORMAL_ACTIVE | ISDN_ASYNC_CALLOUT_ACTIVE))</div><div class='add'>+#define TTY_IS_ACTIVE(info)	(info-&gt;port.flags &amp; ASYNC_NORMAL_ACTIVE)</div><div class='ctx'> </div><div class='ctx'> int</div><div class='ctx'> isdn_tty_stat_callback(int i, isdn_ctrl *c)</div><div class='hunk'>@@ -2212,9 +2107,9 @@ isdn_tty_stat_callback(int i, isdn_ctrl *c)</div><div class='ctx'> 			 * for incoming call of this device when</div><div class='ctx'> 			 * DCD follow the state of incoming carrier</div><div class='ctx'> 			 */</div><div class='del'>-			if (info-&gt;blocked_open &amp;&amp;</div><div class='add'>+			if (info-&gt;port.blocked_open &amp;&amp;</div><div class='ctx'> 			    (info-&gt;emu.mdmreg[REG_DCD] &amp; BIT_DCD)) {</div><div class='del'>-				wake_up_interruptible(&amp;info-&gt;open_wait);</div><div class='add'>+				wake_up_interruptible(&amp;info-&gt;port.open_wait);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* Schedule CONNECT-Message to any tty</div><div class='hunk'>@@ -2222,7 +2117,8 @@ isdn_tty_stat_callback(int i, isdn_ctrl *c)</div><div class='ctx'> 			 * set DCD-bit of its modem-status.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (TTY_IS_ACTIVE(info) ||</div><div class='del'>-			    (info-&gt;blocked_open &amp;&amp; (info-&gt;emu.mdmreg[REG_DCD] &amp; BIT_DCD))) {</div><div class='add'>+			    (info-&gt;port.blocked_open &amp;&amp;</div><div class='add'>+			     (info-&gt;emu.mdmreg[REG_DCD] &amp; BIT_DCD))) {</div><div class='ctx'> 				info-&gt;msr |= UART_MSR_DCD;</div><div class='ctx'> 				info-&gt;emu.charge = 0;</div><div class='ctx'> 				if (info-&gt;dialing &amp; 0xf)</div><div class='hunk'>@@ -2339,8 +2235,8 @@ isdn_tty_at_cout(char *msg, modem_info *info)</div><div class='ctx'> 	l = strlen(msg);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;info-&gt;readlock, flags);</div><div class='del'>-	tty = info-&gt;tty;</div><div class='del'>-	if ((info-&gt;flags &amp; ISDN_ASYNC_CLOSING) || (!tty)) {</div><div class='add'>+	tty = info-&gt;port.tty;</div><div class='add'>+	if ((info-&gt;port.flags &amp; ASYNC_CLOSING) || (!tty)) {</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;info-&gt;readlock, flags);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2490,15 +2386,15 @@ isdn_tty_modem_result(int code, modem_info *info)</div><div class='ctx'> 	case RESULT_NO_CARRIER:</div><div class='ctx'> #ifdef ISDN_DEBUG_MODEM_HUP</div><div class='ctx'> 		printk(KERN_DEBUG "modem_result: NO CARRIER %d %d\n",</div><div class='del'>-		       (info-&gt;flags &amp; ISDN_ASYNC_CLOSING),</div><div class='del'>-		       (!info-&gt;tty));</div><div class='add'>+		       (info-&gt;port.flags &amp; ASYNC_CLOSING),</div><div class='add'>+		       (!info-&gt;port.tty));</div><div class='ctx'> #endif</div><div class='ctx'> 		m-&gt;mdmreg[REG_RINGCNT] = 0;</div><div class='ctx'> 		del_timer(&amp;info-&gt;nc_timer);</div><div class='ctx'> 		info-&gt;ncarrier = 0;</div><div class='del'>-		if ((info-&gt;flags &amp; ISDN_ASYNC_CLOSING) || (!info-&gt;tty)) {</div><div class='add'>+		if ((info-&gt;port.flags &amp; ASYNC_CLOSING) || (!info-&gt;port.tty))</div><div class='ctx'> 			return;</div><div class='del'>-		}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_ISDN_AUDIO</div><div class='ctx'> 		if (info-&gt;vonline &amp; 1) {</div><div class='ctx'> #ifdef ISDN_DEBUG_MODEM_VOICE</div><div class='hunk'>@@ -2629,14 +2525,11 @@ isdn_tty_modem_result(int code, modem_info *info)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (code == RESULT_NO_CARRIER) {</div><div class='del'>-		if ((info-&gt;flags &amp; ISDN_ASYNC_CLOSING) || (!info-&gt;tty)) {</div><div class='add'>+		if ((info-&gt;port.flags &amp; ASYNC_CLOSING) || (!info-&gt;port.tty))</div><div class='ctx'> 			return;</div><div class='del'>-		}</div><div class='del'>-		if ((info-&gt;flags &amp; ISDN_ASYNC_CHECK_CD) &amp;&amp;</div><div class='del'>-		    (!((info-&gt;flags &amp; ISDN_ASYNC_CALLOUT_ACTIVE) &amp;&amp;</div><div class='del'>-		       (info-&gt;flags &amp; ISDN_ASYNC_CALLOUT_NOHUP)))) {</div><div class='del'>-			tty_hangup(info-&gt;tty);</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+		if (info-&gt;port.flags &amp; ASYNC_CHECK_CD)</div><div class='add'>+			tty_hangup(info-&gt;port.tty);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3803,19 +3696,19 @@ isdn_tty_modem_escape(void)</div><div class='ctx'> 	int midx;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ISDN_MAX_CHANNELS; i++)</div><div class='del'>-		if (USG_MODEM(dev-&gt;usage[i]))</div><div class='del'>-			if ((midx = dev-&gt;m_idx[i]) &gt;= 0) {</div><div class='del'>-				modem_info *info = &amp;dev-&gt;mdm.info[midx];</div><div class='del'>-				if (info-&gt;online) {</div><div class='del'>-					ton = 1;</div><div class='del'>-					if ((info-&gt;emu.pluscount == 3) &amp;&amp;</div><div class='del'>-					    time_after(jiffies , info-&gt;emu.lastplus + PLUSWAIT2)) {</div><div class='del'>-						info-&gt;emu.pluscount = 0;</div><div class='del'>-						info-&gt;online = 0;</div><div class='del'>-						isdn_tty_modem_result(RESULT_OK, info);</div><div class='del'>-					}</div><div class='add'>+		if (USG_MODEM(dev-&gt;usage[i]) &amp;&amp; (midx = dev-&gt;m_idx[i]) &gt;= 0) {</div><div class='add'>+			modem_info *info = &amp;dev-&gt;mdm.info[midx];</div><div class='add'>+			if (info-&gt;online) {</div><div class='add'>+				ton = 1;</div><div class='add'>+				if ((info-&gt;emu.pluscount == 3) &amp;&amp;</div><div class='add'>+				    time_after(jiffies,</div><div class='add'>+					    info-&gt;emu.lastplus + PLUSWAIT2)) {</div><div class='add'>+					info-&gt;emu.pluscount = 0;</div><div class='add'>+					info-&gt;online = 0;</div><div class='add'>+					isdn_tty_modem_result(RESULT_OK, info);</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='add'>+		}</div><div class='ctx'> 	isdn_timer_ctrl(ISDN_TIMER_MODEMPLUS, ton);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3873,15 +3766,14 @@ isdn_tty_carrier_timeout(void)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ISDN_MAX_CHANNELS; i++) {</div><div class='ctx'> 		modem_info *info = &amp;dev-&gt;mdm.info[i];</div><div class='del'>-		if (info-&gt;dialing) {</div><div class='del'>-			if (info-&gt;emu.carrierwait++ &gt; info-&gt;emu.mdmreg[REG_WAITC]) {</div><div class='del'>-				info-&gt;dialing = 0;</div><div class='del'>-				isdn_tty_modem_result(RESULT_NO_CARRIER, info);</div><div class='del'>-				isdn_tty_modem_hup(info, 1);</div><div class='del'>-			}</div><div class='del'>-			else</div><div class='del'>-				ton = 1;</div><div class='del'>-		}</div><div class='add'>+		if (!info-&gt;dialing)</div><div class='add'>+			continue;</div><div class='add'>+		if (info-&gt;emu.carrierwait++ &gt; info-&gt;emu.mdmreg[REG_WAITC]) {</div><div class='add'>+			info-&gt;dialing = 0;</div><div class='add'>+			isdn_tty_modem_result(RESULT_NO_CARRIER, info);</div><div class='add'>+			isdn_tty_modem_hup(info, 1);</div><div class='add'>+		} else</div><div class='add'>+			ton = 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	isdn_timer_ctrl(ISDN_TIMER_CARRIER, ton);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/isdn/mISDN/core.c b/drivers/isdn/mISDN/core.c<br/>index a24530f05db0..c401634c00ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/mISDN/core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/mISDN/core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/mISDN/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/core.c</a></div><div class='hunk'>@@ -355,6 +355,22 @@ mISDN_unregister_Bprotocol(struct Bprotocol *bp)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mISDN_unregister_Bprotocol);</div><div class='ctx'> </div><div class='add'>+static const char *msg_no_channel = "&lt;no channel&gt;";</div><div class='add'>+static const char *msg_no_stack = "&lt;no stack&gt;";</div><div class='add'>+static const char *msg_no_stackdev = "&lt;no stack device&gt;";</div><div class='add'>+</div><div class='add'>+const char *mISDNDevName4ch(struct mISDNchannel *ch)</div><div class='add'>+{</div><div class='add'>+	if (!ch)</div><div class='add'>+		return msg_no_channel;</div><div class='add'>+	if (!ch-&gt;st)</div><div class='add'>+		return msg_no_stack;</div><div class='add'>+	if (!ch-&gt;st-&gt;dev)</div><div class='add'>+		return msg_no_stackdev;</div><div class='add'>+	return dev_name(&amp;ch-&gt;st-&gt;dev-&gt;dev);</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL(mISDNDevName4ch);</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> mISDNInit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/isdn/mISDN/dsp.h b/drivers/isdn/mISDN/dsp.h<br/>index afe4173ae007..fc1733a08845 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/mISDN/dsp.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/mISDN/dsp.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/mISDN/dsp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/dsp.h</a></div><div class='hunk'>@@ -76,7 +76,9 @@ extern u8 dsp_silence;</div><div class='ctx'> #define MAX_SECONDS_JITTER_CHECK 5</div><div class='ctx'> </div><div class='ctx'> extern struct timer_list dsp_spl_tl;</div><div class='del'>-extern u32 dsp_spl_jiffies;</div><div class='add'>+</div><div class='add'>+/* the datatype need to match jiffies datatype */</div><div class='add'>+extern unsigned long dsp_spl_jiffies;</div><div class='ctx'> </div><div class='ctx'> /* the structure of conferences:</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/isdn/mISDN/dsp_cmx.c b/drivers/isdn/mISDN/dsp_cmx.c<br/>index 334feab060a1..a4f05c54c32b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/mISDN/dsp_cmx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/mISDN/dsp_cmx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/mISDN/dsp_cmx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/dsp_cmx.c</a></div><div class='hunk'>@@ -742,8 +742,8 @@ dsp_cmx_hardware(struct dsp_conf *conf, struct dsp *dsp)</div><div class='ctx'> 					       member-&gt;dsp-&gt;pcm_slot_tx,</div><div class='ctx'> 					       member-&gt;dsp-&gt;pcm_bank_tx,</div><div class='ctx'> 					       member-&gt;dsp-&gt;pcm_bank_rx);</div><div class='del'>-				conf-&gt;hardware = 0;</div><div class='del'>-				conf-&gt;software = 1;</div><div class='add'>+				conf-&gt;hardware = 1;</div><div class='add'>+				conf-&gt;software = tx_data;</div><div class='ctx'> 				return;</div><div class='ctx'> 			}</div><div class='ctx'> 			/* find a new slot */</div><div class='hunk'>@@ -834,8 +834,8 @@ dsp_cmx_hardware(struct dsp_conf *conf, struct dsp *dsp)</div><div class='ctx'> 					       nextm-&gt;dsp-&gt;name,</div><div class='ctx'> 					       member-&gt;dsp-&gt;pcm_slot_tx,</div><div class='ctx'> 					       member-&gt;dsp-&gt;pcm_slot_rx);</div><div class='del'>-				conf-&gt;hardware = 0;</div><div class='del'>-				conf-&gt;software = 1;</div><div class='add'>+				conf-&gt;hardware = 1;</div><div class='add'>+				conf-&gt;software = tx_data;</div><div class='ctx'> 				return;</div><div class='ctx'> 			}</div><div class='ctx'> 			/* find two new slot */</div><div class='hunk'>@@ -939,8 +939,11 @@ dsp_cmx_hardware(struct dsp_conf *conf, struct dsp *dsp)</div><div class='ctx'> 	/* for more than two members.. */</div><div class='ctx'> </div><div class='ctx'> 	/* if all members already have the same conference */</div><div class='del'>-	if (all_conf)</div><div class='add'>+	if (all_conf) {</div><div class='add'>+		conf-&gt;hardware = 1;</div><div class='add'>+		conf-&gt;software = tx_data;</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * if there is an existing conference, but not all members have joined</div><div class='hunk'>@@ -1013,6 +1016,8 @@ dsp_cmx_hardware(struct dsp_conf *conf, struct dsp *dsp)</div><div class='ctx'> 			dsp_cmx_hw_message(member-&gt;dsp,</div><div class='ctx'> 					   MISDN_CTRL_HFC_CONF_JOIN, current_conf, 0, 0, 0);</div><div class='ctx'> 		}</div><div class='add'>+		conf-&gt;hardware = 1;</div><div class='add'>+		conf-&gt;software = tx_data;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1328,7 +1333,7 @@ dsp_cmx_send_member(struct dsp *dsp, int len, s32 *c, int members)</div><div class='ctx'> 		}</div><div class='ctx'> 		if (dsp-&gt;conf &amp;&amp; dsp-&gt;conf-&gt;software &amp;&amp; dsp-&gt;conf-&gt;hardware)</div><div class='ctx'> 			tx_data_only = 1;</div><div class='del'>-		if (dsp-&gt;conf-&gt;software &amp;&amp; dsp-&gt;echo.hardware)</div><div class='add'>+		if (dsp-&gt;echo.software &amp;&amp; dsp-&gt;echo.hardware)</div><div class='ctx'> 			tx_data_only = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1619,7 +1624,7 @@ send_packet:</div><div class='ctx'> </div><div class='ctx'> static u32	jittercount; /* counter for jitter check */</div><div class='ctx'> struct timer_list dsp_spl_tl;</div><div class='del'>-u32	dsp_spl_jiffies; /* calculate the next time to fire */</div><div class='add'>+unsigned long	dsp_spl_jiffies; /* calculate the next time to fire */</div><div class='ctx'> static u16	dsp_count; /* last sample count */</div><div class='ctx'> static int	dsp_count_valid; /* if we have last sample count */</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/isdn/mISDN/dsp_core.c b/drivers/isdn/mISDN/dsp_core.c<br/>index 2ac2d7a25a9f..28c99c623bcd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/mISDN/dsp_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/mISDN/dsp_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/mISDN/dsp_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/dsp_core.c</a></div><div class='hunk'>@@ -268,6 +268,7 @@ dsp_fill_empty(struct dsp *dsp)</div><div class='ctx'> 	}</div><div class='ctx'> 	cq.op = MISDN_CTRL_FILL_EMPTY;</div><div class='ctx'> 	cq.p1 = 1;</div><div class='add'>+	cq.p2 = dsp_silence;</div><div class='ctx'> 	if (dsp-&gt;ch.peer-&gt;ctrl(dsp-&gt;ch.peer, CONTROL_CHANNEL, &amp;cq)) {</div><div class='ctx'> 		printk(KERN_DEBUG "%s: CONTROL_CHANNEL failed\n",</div><div class='ctx'> 		       __func__);</div><div class='head'>diff --git a/drivers/isdn/mISDN/dsp_dtmf.c b/drivers/isdn/mISDN/dsp_dtmf.c<br/>index 887860bdc63b..642f30be5ce2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/mISDN/dsp_dtmf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/mISDN/dsp_dtmf.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/mISDN/dsp_dtmf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/dsp_dtmf.c</a></div><div class='hunk'>@@ -222,16 +222,25 @@ coefficients:</div><div class='ctx'> 		goto storedigit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dsp_debug &amp; DEBUG_DSP_DTMFCOEFF)</div><div class='add'>+	if (dsp_debug &amp; DEBUG_DSP_DTMFCOEFF) {</div><div class='add'>+		s32 tresh_100 = tresh/100;</div><div class='add'>+</div><div class='add'>+		if (tresh_100 == 0) {</div><div class='add'>+			tresh_100 = 1;</div><div class='add'>+			printk(KERN_DEBUG</div><div class='add'>+				"tresh(%d) too small set tresh/100 to 1\n",</div><div class='add'>+				tresh);</div><div class='add'>+		}</div><div class='ctx'> 		printk(KERN_DEBUG "a %3d %3d %3d %3d %3d %3d %3d %3d"</div><div class='ctx'> 		       " tr:%3d r %3d %3d %3d %3d %3d %3d %3d %3d\n",</div><div class='ctx'> 		       result[0] / 10000, result[1] / 10000, result[2] / 10000,</div><div class='ctx'> 		       result[3] / 10000, result[4] / 10000, result[5] / 10000,</div><div class='ctx'> 		       result[6] / 10000, result[7] / 10000, tresh / 10000,</div><div class='del'>-		       result[0] / (tresh / 100), result[1] / (tresh / 100),</div><div class='del'>-		       result[2] / (tresh / 100), result[3] / (tresh / 100),</div><div class='del'>-		       result[4] / (tresh / 100), result[5] / (tresh / 100),</div><div class='del'>-		       result[6] / (tresh / 100), result[7] / (tresh / 100));</div><div class='add'>+		       result[0] / (tresh_100), result[1] / (tresh_100),</div><div class='add'>+		       result[2] / (tresh_100), result[3] / (tresh_100),</div><div class='add'>+		       result[4] / (tresh_100), result[5] / (tresh_100),</div><div class='add'>+		       result[6] / (tresh_100), result[7] / (tresh_100));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* calc digit (lowgroup/highgroup) */</div><div class='ctx'> 	lowgroup = -1;</div><div class='head'>diff --git a/drivers/isdn/mISDN/hwchannel.c b/drivers/isdn/mISDN/hwchannel.c<br/>index c74c363554c4..ef34fd40867c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/mISDN/hwchannel.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/mISDN/hwchannel.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/mISDN/hwchannel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/hwchannel.c</a></div><div class='hunk'>@@ -81,10 +81,16 @@ mISDN_initdchannel(struct dchannel *ch, int maxlen, void *phf)</div><div class='ctx'> EXPORT_SYMBOL(mISDN_initdchannel);</div><div class='ctx'> </div><div class='ctx'> int</div><div class='del'>-mISDN_initbchannel(struct bchannel *ch, int maxlen)</div><div class='add'>+mISDN_initbchannel(struct bchannel *ch, unsigned short maxlen,</div><div class='add'>+		   unsigned short minlen)</div><div class='ctx'> {</div><div class='ctx'> 	ch-&gt;Flags = 0;</div><div class='add'>+	ch-&gt;minlen = minlen;</div><div class='add'>+	ch-&gt;next_minlen = minlen;</div><div class='add'>+	ch-&gt;init_minlen = minlen;</div><div class='ctx'> 	ch-&gt;maxlen = maxlen;</div><div class='add'>+	ch-&gt;next_maxlen = maxlen;</div><div class='add'>+	ch-&gt;init_maxlen = maxlen;</div><div class='ctx'> 	ch-&gt;hw = NULL;</div><div class='ctx'> 	ch-&gt;rx_skb = NULL;</div><div class='ctx'> 	ch-&gt;tx_skb = NULL;</div><div class='hunk'>@@ -134,6 +140,14 @@ mISDN_clear_bchannel(struct bchannel *ch)</div><div class='ctx'> 	test_and_clear_bit(FLG_TX_BUSY, &amp;ch-&gt;Flags);</div><div class='ctx'> 	test_and_clear_bit(FLG_TX_NEXT, &amp;ch-&gt;Flags);</div><div class='ctx'> 	test_and_clear_bit(FLG_ACTIVE, &amp;ch-&gt;Flags);</div><div class='add'>+	test_and_clear_bit(FLG_FILLEMPTY, &amp;ch-&gt;Flags);</div><div class='add'>+	test_and_clear_bit(FLG_TX_EMPTY, &amp;ch-&gt;Flags);</div><div class='add'>+	test_and_clear_bit(FLG_RX_OFF, &amp;ch-&gt;Flags);</div><div class='add'>+	ch-&gt;dropcnt = 0;</div><div class='add'>+	ch-&gt;minlen = ch-&gt;init_minlen;</div><div class='add'>+	ch-&gt;next_minlen = ch-&gt;init_minlen;</div><div class='add'>+	ch-&gt;maxlen = ch-&gt;init_maxlen;</div><div class='add'>+	ch-&gt;next_maxlen = ch-&gt;init_maxlen;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mISDN_clear_bchannel);</div><div class='ctx'> </div><div class='hunk'>@@ -148,6 +162,51 @@ mISDN_freebchannel(struct bchannel *ch)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mISDN_freebchannel);</div><div class='ctx'> </div><div class='add'>+int</div><div class='add'>+mISDN_ctrl_bchannel(struct bchannel *bch, struct mISDN_ctrl_req *cq)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (cq-&gt;op) {</div><div class='add'>+	case MISDN_CTRL_GETOP:</div><div class='add'>+		cq-&gt;op = MISDN_CTRL_RX_BUFFER | MISDN_CTRL_FILL_EMPTY |</div><div class='add'>+			 MISDN_CTRL_RX_OFF;</div><div class='add'>+		break;</div><div class='add'>+	case MISDN_CTRL_FILL_EMPTY:</div><div class='add'>+		if (cq-&gt;p1) {</div><div class='add'>+			memset(bch-&gt;fill, cq-&gt;p2 &amp; 0xff, MISDN_BCH_FILL_SIZE);</div><div class='add'>+			test_and_set_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags);</div><div class='add'>+		} else {</div><div class='add'>+			test_and_clear_bit(FLG_FILLEMPTY, &amp;bch-&gt;Flags);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case MISDN_CTRL_RX_OFF:</div><div class='add'>+		/* read back dropped byte count */</div><div class='add'>+		cq-&gt;p2 = bch-&gt;dropcnt;</div><div class='add'>+		if (cq-&gt;p1)</div><div class='add'>+			test_and_set_bit(FLG_RX_OFF, &amp;bch-&gt;Flags);</div><div class='add'>+		else</div><div class='add'>+			test_and_clear_bit(FLG_RX_OFF, &amp;bch-&gt;Flags);</div><div class='add'>+		bch-&gt;dropcnt = 0;</div><div class='add'>+		break;</div><div class='add'>+	case MISDN_CTRL_RX_BUFFER:</div><div class='add'>+		if (cq-&gt;p2 &gt; MISDN_CTRL_RX_SIZE_IGNORE)</div><div class='add'>+			bch-&gt;next_maxlen = cq-&gt;p2;</div><div class='add'>+		if (cq-&gt;p1 &gt; MISDN_CTRL_RX_SIZE_IGNORE)</div><div class='add'>+			bch-&gt;next_minlen = cq-&gt;p1;</div><div class='add'>+		/* we return the old values */</div><div class='add'>+		cq-&gt;p1 = bch-&gt;minlen;</div><div class='add'>+		cq-&gt;p2 = bch-&gt;maxlen;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_info("mISDN unhandled control %x operation\n", cq-&gt;op);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(mISDN_ctrl_bchannel);</div><div class='add'>+</div><div class='ctx'> static inline u_int</div><div class='ctx'> get_sapi_tei(u_char *p)</div><div class='ctx'> {</div><div class='hunk'>@@ -197,24 +256,37 @@ recv_Echannel(struct dchannel *ech, struct dchannel *dch)</div><div class='ctx'> EXPORT_SYMBOL(recv_Echannel);</div><div class='ctx'> </div><div class='ctx'> void</div><div class='del'>-recv_Bchannel(struct bchannel *bch, unsigned int id)</div><div class='add'>+recv_Bchannel(struct bchannel *bch, unsigned int id, bool force)</div><div class='ctx'> {</div><div class='ctx'> 	struct mISDNhead *hh;</div><div class='ctx'> </div><div class='del'>-	hh = mISDN_HEAD_P(bch-&gt;rx_skb);</div><div class='del'>-	hh-&gt;prim = PH_DATA_IND;</div><div class='del'>-	hh-&gt;id = id;</div><div class='del'>-	if (bch-&gt;rcount &gt;= 64) {</div><div class='del'>-		printk(KERN_WARNING "B-channel %p receive queue overflow, "</div><div class='del'>-		       "flushing!\n", bch);</div><div class='del'>-		skb_queue_purge(&amp;bch-&gt;rqueue);</div><div class='del'>-		bch-&gt;rcount = 0;</div><div class='add'>+	/* if allocation did fail upper functions still may call us */</div><div class='add'>+	if (unlikely(!bch-&gt;rx_skb))</div><div class='ctx'> 		return;</div><div class='add'>+	if (unlikely(!bch-&gt;rx_skb-&gt;len)) {</div><div class='add'>+		/* we have no data to send - this may happen after recovery</div><div class='add'>+		 * from overflow or too small allocation.</div><div class='add'>+		 * We need to free the buffer here */</div><div class='add'>+		dev_kfree_skb(bch-&gt;rx_skb);</div><div class='add'>+		bch-&gt;rx_skb = NULL;</div><div class='add'>+	} else {</div><div class='add'>+		if (test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags) &amp;&amp;</div><div class='add'>+		    (bch-&gt;rx_skb-&gt;len &lt; bch-&gt;minlen) &amp;&amp; !force)</div><div class='add'>+				return;</div><div class='add'>+		hh = mISDN_HEAD_P(bch-&gt;rx_skb);</div><div class='add'>+		hh-&gt;prim = PH_DATA_IND;</div><div class='add'>+		hh-&gt;id = id;</div><div class='add'>+		if (bch-&gt;rcount &gt;= 64) {</div><div class='add'>+			printk(KERN_WARNING</div><div class='add'>+			       "B%d receive queue overflow - flushing!\n",</div><div class='add'>+			       bch-&gt;nr);</div><div class='add'>+			skb_queue_purge(&amp;bch-&gt;rqueue);</div><div class='add'>+		}</div><div class='add'>+		bch-&gt;rcount++;</div><div class='add'>+		skb_queue_tail(&amp;bch-&gt;rqueue, bch-&gt;rx_skb);</div><div class='add'>+		bch-&gt;rx_skb = NULL;</div><div class='add'>+		schedule_event(bch, FLG_RECVQUEUE);</div><div class='ctx'> 	}</div><div class='del'>-	bch-&gt;rcount++;</div><div class='del'>-	skb_queue_tail(&amp;bch-&gt;rqueue, bch-&gt;rx_skb);</div><div class='del'>-	bch-&gt;rx_skb = NULL;</div><div class='del'>-	schedule_event(bch, FLG_RECVQUEUE);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(recv_Bchannel);</div><div class='ctx'> </div><div class='hunk'>@@ -272,7 +344,7 @@ get_next_dframe(struct dchannel *dch)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(get_next_dframe);</div><div class='ctx'> </div><div class='del'>-void</div><div class='add'>+static void</div><div class='ctx'> confirm_Bsend(struct bchannel *bch)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff	*skb;</div><div class='hunk'>@@ -294,7 +366,6 @@ confirm_Bsend(struct bchannel *bch)</div><div class='ctx'> 	skb_queue_tail(&amp;bch-&gt;rqueue, skb);</div><div class='ctx'> 	schedule_event(bch, FLG_RECVQUEUE);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(confirm_Bsend);</div><div class='ctx'> </div><div class='ctx'> int</div><div class='ctx'> get_next_bframe(struct bchannel *bch)</div><div class='hunk'>@@ -305,8 +376,8 @@ get_next_bframe(struct bchannel *bch)</div><div class='ctx'> 		if (bch-&gt;tx_skb) {</div><div class='ctx'> 			bch-&gt;next_skb = NULL;</div><div class='ctx'> 			test_and_clear_bit(FLG_TX_NEXT, &amp;bch-&gt;Flags);</div><div class='del'>-			if (!test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags))</div><div class='del'>-				confirm_Bsend(bch); /* not for transparent */</div><div class='add'>+			/* confirm imediately to allow next data */</div><div class='add'>+			confirm_Bsend(bch);</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			test_and_clear_bit(FLG_TX_NEXT, &amp;bch-&gt;Flags);</div><div class='hunk'>@@ -395,7 +466,62 @@ bchannel_senddata(struct bchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 		/* write to fifo */</div><div class='ctx'> 		ch-&gt;tx_skb = skb;</div><div class='ctx'> 		ch-&gt;tx_idx = 0;</div><div class='add'>+		confirm_Bsend(ch);</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bchannel_senddata);</div><div class='add'>+</div><div class='add'>+/* The function allocates a new receive skb on demand with a size for the</div><div class='add'>+ * requirements of the current protocol. It returns the tailroom of the</div><div class='add'>+ * receive skb or an error.</div><div class='add'>+ */</div><div class='add'>+int</div><div class='add'>+bchannel_get_rxbuf(struct bchannel *bch, int reqlen)</div><div class='add'>+{</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	if (bch-&gt;rx_skb) {</div><div class='add'>+		len = skb_tailroom(bch-&gt;rx_skb);</div><div class='add'>+		if (len &lt; reqlen) {</div><div class='add'>+			pr_warning("B%d no space for %d (only %d) bytes\n",</div><div class='add'>+				   bch-&gt;nr, reqlen, len);</div><div class='add'>+			if (test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags)) {</div><div class='add'>+				/* send what we have now and try a new buffer */</div><div class='add'>+				recv_Bchannel(bch, 0, true);</div><div class='add'>+			} else {</div><div class='add'>+				/* on HDLC we have to drop too big frames */</div><div class='add'>+				return -EMSGSIZE;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			return len;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/* update current min/max length first */</div><div class='add'>+	if (unlikely(bch-&gt;maxlen != bch-&gt;next_maxlen))</div><div class='add'>+		bch-&gt;maxlen = bch-&gt;next_maxlen;</div><div class='add'>+	if (unlikely(bch-&gt;minlen != bch-&gt;next_minlen))</div><div class='add'>+		bch-&gt;minlen = bch-&gt;next_minlen;</div><div class='add'>+	if (unlikely(reqlen &gt; bch-&gt;maxlen))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	if (test_bit(FLG_TRANSPARENT, &amp;bch-&gt;Flags)) {</div><div class='add'>+		if (reqlen &gt;= bch-&gt;minlen) {</div><div class='add'>+			len = reqlen;</div><div class='add'>+		} else {</div><div class='add'>+			len = 2 * bch-&gt;minlen;</div><div class='add'>+			if (len &gt; bch-&gt;maxlen)</div><div class='add'>+				len = bch-&gt;maxlen;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* with HDLC we do not know the length yet */</div><div class='add'>+		len = bch-&gt;maxlen;</div><div class='add'>+	}</div><div class='add'>+	bch-&gt;rx_skb = mI_alloc_skb(len, GFP_ATOMIC);</div><div class='add'>+	if (!bch-&gt;rx_skb) {</div><div class='add'>+		pr_warning("B%d receive no memory for %d bytes\n",</div><div class='add'>+			   bch-&gt;nr, len);</div><div class='add'>+		len = -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(bchannel_get_rxbuf);</div><div class='head'>diff --git a/drivers/isdn/mISDN/l1oip_core.c b/drivers/isdn/mISDN/l1oip_core.c<br/>index 0f88acf1185f..db50f788855d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/mISDN/l1oip_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/mISDN/l1oip_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/mISDN/l1oip_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/l1oip_core.c</a></div><div class='hunk'>@@ -1420,7 +1420,7 @@ init_card(struct l1oip *hc, int pri, int bundle)</div><div class='ctx'> 		bch-&gt;nr = i + ch;</div><div class='ctx'> 		bch-&gt;slot = i + ch;</div><div class='ctx'> 		bch-&gt;debug = debug;</div><div class='del'>-		mISDN_initbchannel(bch, MAX_DATA_MEM);</div><div class='add'>+		mISDN_initbchannel(bch, MAX_DATA_MEM, 0);</div><div class='ctx'> 		bch-&gt;hw = hc;</div><div class='ctx'> 		bch-&gt;ch.send = handle_bmsg;</div><div class='ctx'> 		bch-&gt;ch.ctrl = l1oip_bctrl;</div><div class='head'>diff --git a/drivers/isdn/mISDN/layer1.c b/drivers/isdn/mISDN/layer1.c<br/>index 0fc49b375514..bebc57b72138 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/mISDN/layer1.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/mISDN/layer1.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/mISDN/layer1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/layer1.c</a></div><div class='hunk'>@@ -28,13 +28,15 @@ static u_int *debug;</div><div class='ctx'> struct layer1 {</div><div class='ctx'> 	u_long Flags;</div><div class='ctx'> 	struct FsmInst l1m;</div><div class='del'>-	struct FsmTimer timer;</div><div class='add'>+	struct FsmTimer timer3;</div><div class='add'>+	struct FsmTimer timerX;</div><div class='ctx'> 	int delay;</div><div class='add'>+	int t3_value;</div><div class='ctx'> 	struct dchannel *dch;</div><div class='ctx'> 	dchannel_l1callback *dcb;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define TIMER3_VALUE 7000</div><div class='add'>+#define TIMER3_DEFAULT_VALUE	7000</div><div class='ctx'> </div><div class='ctx'> static</div><div class='ctx'> struct Fsm l1fsm_s = {NULL, 0, 0, NULL, NULL};</div><div class='hunk'>@@ -134,7 +136,7 @@ l1_deact_req_s(struct FsmInst *fi, int event, void *arg)</div><div class='ctx'> 	struct layer1 *l1 = fi-&gt;userdata;</div><div class='ctx'> </div><div class='ctx'> 	mISDN_FsmChangeState(fi, ST_L1_F3);</div><div class='del'>-	mISDN_FsmRestartTimer(&amp;l1-&gt;timer, 550, EV_TIMER_DEACT, NULL, 2);</div><div class='add'>+	mISDN_FsmRestartTimer(&amp;l1-&gt;timerX, 550, EV_TIMER_DEACT, NULL, 2);</div><div class='ctx'> 	test_and_set_bit(FLG_L1_DEACTTIMER, &amp;l1-&gt;Flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -179,11 +181,11 @@ l1_info4_ind(struct FsmInst *fi, int event, void *arg)</div><div class='ctx'> 	mISDN_FsmChangeState(fi, ST_L1_F7);</div><div class='ctx'> 	l1-&gt;dcb(l1-&gt;dch, INFO3_P8);</div><div class='ctx'> 	if (test_and_clear_bit(FLG_L1_DEACTTIMER, &amp;l1-&gt;Flags))</div><div class='del'>-		mISDN_FsmDelTimer(&amp;l1-&gt;timer, 4);</div><div class='add'>+		mISDN_FsmDelTimer(&amp;l1-&gt;timerX, 4);</div><div class='ctx'> 	if (!test_bit(FLG_L1_ACTIVATED, &amp;l1-&gt;Flags)) {</div><div class='ctx'> 		if (test_and_clear_bit(FLG_L1_T3RUN, &amp;l1-&gt;Flags))</div><div class='del'>-			mISDN_FsmDelTimer(&amp;l1-&gt;timer, 3);</div><div class='del'>-		mISDN_FsmRestartTimer(&amp;l1-&gt;timer, 110, EV_TIMER_ACT, NULL, 2);</div><div class='add'>+			mISDN_FsmDelTimer(&amp;l1-&gt;timer3, 3);</div><div class='add'>+		mISDN_FsmRestartTimer(&amp;l1-&gt;timerX, 110, EV_TIMER_ACT, NULL, 2);</div><div class='ctx'> 		test_and_set_bit(FLG_L1_ACTTIMER, &amp;l1-&gt;Flags);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -201,7 +203,7 @@ l1_timer3(struct FsmInst *fi, int event, void *arg)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (l1-&gt;l1m.state != ST_L1_F6) {</div><div class='ctx'> 		mISDN_FsmChangeState(fi, ST_L1_F3);</div><div class='del'>-		l1-&gt;dcb(l1-&gt;dch, HW_POWERUP_REQ);</div><div class='add'>+		/* do not force anything here, we need send INFO 0 */</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -233,8 +235,9 @@ l1_activate_s(struct FsmInst *fi, int event, void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct layer1 *l1 = fi-&gt;userdata;</div><div class='ctx'> </div><div class='del'>-	mISDN_FsmRestartTimer(&amp;l1-&gt;timer, TIMER3_VALUE, EV_TIMER3, NULL, 2);</div><div class='add'>+	mISDN_FsmRestartTimer(&amp;l1-&gt;timer3, l1-&gt;t3_value, EV_TIMER3, NULL, 2);</div><div class='ctx'> 	test_and_set_bit(FLG_L1_T3RUN, &amp;l1-&gt;Flags);</div><div class='add'>+	/* Tell HW to send INFO 1 */</div><div class='ctx'> 	l1-&gt;dcb(l1-&gt;dch, HW_RESET_REQ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -302,7 +305,8 @@ static struct FsmNode L1SFnList[] =</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> release_l1(struct layer1 *l1) {</div><div class='del'>-	mISDN_FsmDelTimer(&amp;l1-&gt;timer, 0);</div><div class='add'>+	mISDN_FsmDelTimer(&amp;l1-&gt;timerX, 0);</div><div class='add'>+	mISDN_FsmDelTimer(&amp;l1-&gt;timer3, 0);</div><div class='ctx'> 	if (l1-&gt;dch)</div><div class='ctx'> 		l1-&gt;dch-&gt;l1 = NULL;</div><div class='ctx'> 	module_put(THIS_MODULE);</div><div class='hunk'>@@ -356,6 +360,16 @@ l1_event(struct layer1 *l1, u_int event)</div><div class='ctx'> 		release_l1(l1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='add'>+		if ((event &amp; ~HW_TIMER3_VMASK) == HW_TIMER3_VALUE) {</div><div class='add'>+			int val = event &amp; HW_TIMER3_VMASK;</div><div class='add'>+</div><div class='add'>+			if (val &lt; 5)</div><div class='add'>+				val = 5;</div><div class='add'>+			if (val &gt; 30)</div><div class='add'>+				val = 30;</div><div class='add'>+			l1-&gt;t3_value = val;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 		if (*debug &amp; DEBUG_L1)</div><div class='ctx'> 			printk(KERN_DEBUG "%s %x unhandled\n",</div><div class='ctx'> 			       __func__, event);</div><div class='hunk'>@@ -377,13 +391,15 @@ create_l1(struct dchannel *dch, dchannel_l1callback *dcb) {</div><div class='ctx'> 	nl1-&gt;l1m.fsm = &amp;l1fsm_s;</div><div class='ctx'> 	nl1-&gt;l1m.state = ST_L1_F3;</div><div class='ctx'> 	nl1-&gt;Flags = 0;</div><div class='add'>+	nl1-&gt;t3_value = TIMER3_DEFAULT_VALUE;</div><div class='ctx'> 	nl1-&gt;l1m.debug = *debug &amp; DEBUG_L1_FSM;</div><div class='ctx'> 	nl1-&gt;l1m.userdata = nl1;</div><div class='ctx'> 	nl1-&gt;l1m.userint = 0;</div><div class='ctx'> 	nl1-&gt;l1m.printdebug = l1m_debug;</div><div class='ctx'> 	nl1-&gt;dch = dch;</div><div class='ctx'> 	nl1-&gt;dcb = dcb;</div><div class='del'>-	mISDN_FsmInitTimer(&amp;nl1-&gt;l1m, &amp;nl1-&gt;timer);</div><div class='add'>+	mISDN_FsmInitTimer(&amp;nl1-&gt;l1m, &amp;nl1-&gt;timer3);</div><div class='add'>+	mISDN_FsmInitTimer(&amp;nl1-&gt;l1m, &amp;nl1-&gt;timerX);</div><div class='ctx'> 	__module_get(THIS_MODULE);</div><div class='ctx'> 	dch-&gt;l1 = nl1;</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/isdn/mISDN/layer2.c b/drivers/isdn/mISDN/layer2.c<br/>index 39d7375fa551..0dc8abca1407 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/mISDN/layer2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/mISDN/layer2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/mISDN/layer2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/layer2.c</a></div><div class='hunk'>@@ -58,6 +58,8 @@ enum {</div><div class='ctx'> 	EV_L1_DEACTIVATE,</div><div class='ctx'> 	EV_L2_T200,</div><div class='ctx'> 	EV_L2_T203,</div><div class='add'>+	EV_L2_T200I,</div><div class='add'>+	EV_L2_T203I,</div><div class='ctx'> 	EV_L2_SET_OWN_BUSY,</div><div class='ctx'> 	EV_L2_CLEAR_OWN_BUSY,</div><div class='ctx'> 	EV_L2_FRAME_ERROR,</div><div class='hunk'>@@ -86,6 +88,8 @@ static char *strL2Event[] =</div><div class='ctx'> 	"EV_L1_DEACTIVATE",</div><div class='ctx'> 	"EV_L2_T200",</div><div class='ctx'> 	"EV_L2_T203",</div><div class='add'>+	"EV_L2_T200I",</div><div class='add'>+	"EV_L2_T203I",</div><div class='ctx'> 	"EV_L2_SET_OWN_BUSY",</div><div class='ctx'> 	"EV_L2_CLEAR_OWN_BUSY",</div><div class='ctx'> 	"EV_L2_FRAME_ERROR",</div><div class='hunk'>@@ -106,8 +110,8 @@ l2m_debug(struct FsmInst *fi, char *fmt, ...)</div><div class='ctx'> 	vaf.fmt = fmt;</div><div class='ctx'> 	vaf.va = &amp;va;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_DEBUG "l2 (sapi %d tei %d): %pV\n",</div><div class='del'>-	       l2-&gt;sapi, l2-&gt;tei, &amp;vaf);</div><div class='add'>+	printk(KERN_DEBUG "%s l2 (sapi %d tei %d): %pV\n",</div><div class='add'>+	       mISDNDevName4ch(&amp;l2-&gt;ch), l2-&gt;sapi, l2-&gt;tei, &amp;vaf);</div><div class='ctx'> </div><div class='ctx'> 	va_end(va);</div><div class='ctx'> }</div><div class='hunk'>@@ -150,7 +154,8 @@ l2up(struct layer2 *l2, u_int prim, struct sk_buff *skb)</div><div class='ctx'> 	mISDN_HEAD_ID(skb) = (l2-&gt;ch.nr &lt;&lt; 16) | l2-&gt;ch.addr;</div><div class='ctx'> 	err = l2-&gt;up-&gt;send(l2-&gt;up, skb);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		printk(KERN_WARNING "%s: err=%d\n", __func__, err);</div><div class='add'>+		printk(KERN_WARNING "%s: dev %s err=%d\n", __func__,</div><div class='add'>+		       mISDNDevName4ch(&amp;l2-&gt;ch), err);</div><div class='ctx'> 		dev_kfree_skb(skb);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -174,7 +179,8 @@ l2up_create(struct layer2 *l2, u_int prim, int len, void *arg)</div><div class='ctx'> 		memcpy(skb_put(skb, len), arg, len);</div><div class='ctx'> 	err = l2-&gt;up-&gt;send(l2-&gt;up, skb);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		printk(KERN_WARNING "%s: err=%d\n", __func__, err);</div><div class='add'>+		printk(KERN_WARNING "%s: dev %s err=%d\n", __func__,</div><div class='add'>+		       mISDNDevName4ch(&amp;l2-&gt;ch), err);</div><div class='ctx'> 		dev_kfree_skb(skb);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -185,7 +191,8 @@ l2down_skb(struct layer2 *l2, struct sk_buff *skb) {</div><div class='ctx'> </div><div class='ctx'> 	ret = l2-&gt;ch.recv(l2-&gt;ch.peer, skb);</div><div class='ctx'> 	if (ret &amp;&amp; (*debug &amp; DEBUG_L2_RECV))</div><div class='del'>-		printk(KERN_DEBUG "l2down_skb: ret(%d)\n", ret);</div><div class='add'>+		printk(KERN_DEBUG "l2down_skb: dev %s ret(%d)\n",</div><div class='add'>+		       mISDNDevName4ch(&amp;l2-&gt;ch), ret);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -276,12 +283,37 @@ ph_data_confirm(struct layer2 *l2, struct mISDNhead *hh, struct sk_buff *skb) {</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+l2_timeout(struct FsmInst *fi, int event, void *arg)</div><div class='add'>+{</div><div class='add'>+	struct layer2 *l2 = fi-&gt;userdata;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct mISDNhead *hh;</div><div class='add'>+</div><div class='add'>+	skb = mI_alloc_skb(0, GFP_ATOMIC);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		printk(KERN_WARNING "%s: L2(%d,%d) nr:%x timer %s no skb\n",</div><div class='add'>+		       mISDNDevName4ch(&amp;l2-&gt;ch), l2-&gt;sapi, l2-&gt;tei,</div><div class='add'>+		       l2-&gt;ch.nr, event == EV_L2_T200 ? "T200" : "T203");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	hh = mISDN_HEAD_P(skb);</div><div class='add'>+	hh-&gt;prim = event == EV_L2_T200 ? DL_TIMER200_IND : DL_TIMER203_IND;</div><div class='add'>+	hh-&gt;id = l2-&gt;ch.nr;</div><div class='add'>+	if (*debug &amp; DEBUG_TIMER)</div><div class='add'>+		printk(KERN_DEBUG "%s: L2(%d,%d) nr:%x timer %s expired\n",</div><div class='add'>+		       mISDNDevName4ch(&amp;l2-&gt;ch), l2-&gt;sapi, l2-&gt;tei,</div><div class='add'>+		       l2-&gt;ch.nr, event == EV_L2_T200 ? "T200" : "T203");</div><div class='add'>+	if (l2-&gt;ch.st)</div><div class='add'>+		l2-&gt;ch.st-&gt;own.recv(&amp;l2-&gt;ch.st-&gt;own, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> l2mgr(struct layer2 *l2, u_int prim, void *arg) {</div><div class='ctx'> 	long c = (long)arg;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_WARNING</div><div class='del'>-	       "l2mgr: addr:%x prim %x %c\n", l2-&gt;id, prim, (char)c);</div><div class='add'>+	printk(KERN_WARNING "l2mgr: dev %s addr:%x prim %x %c\n",</div><div class='add'>+	       mISDNDevName4ch(&amp;l2-&gt;ch), l2-&gt;id, prim, (char)c);</div><div class='ctx'> 	if (test_bit(FLG_LAPD, &amp;l2-&gt;flag) &amp;&amp;</div><div class='ctx'> 	    !test_bit(FLG_FIXED_TEI, &amp;l2-&gt;flag)) {</div><div class='ctx'> 		switch (c) {</div><div class='hunk'>@@ -603,8 +635,8 @@ send_uframe(struct layer2 *l2, struct sk_buff *skb, u_char cmd, u_char cr)</div><div class='ctx'> 	else {</div><div class='ctx'> 		skb = mI_alloc_skb(i, GFP_ATOMIC);</div><div class='ctx'> 		if (!skb) {</div><div class='del'>-			printk(KERN_WARNING "%s: can't alloc skbuff\n",</div><div class='del'>-			       __func__);</div><div class='add'>+			printk(KERN_WARNING "%s: can't alloc skbuff in %s\n",</div><div class='add'>+			       mISDNDevName4ch(&amp;l2-&gt;ch), __func__);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1089,8 +1121,8 @@ enquiry_cr(struct layer2 *l2, u_char typ, u_char cr, u_char pf)</div><div class='ctx'> 		tmp[i++] = (l2-&gt;vr &lt;&lt; 5) | typ | (pf ? 0x10 : 0);</div><div class='ctx'> 	skb = mI_alloc_skb(i, GFP_ATOMIC);</div><div class='ctx'> 	if (!skb) {</div><div class='del'>-		printk(KERN_WARNING</div><div class='del'>-		       "isdnl2 can't alloc sbbuff for enquiry_cr\n");</div><div class='add'>+		printk(KERN_WARNING "%s: isdnl2 can't alloc sbbuff in %s\n",</div><div class='add'>+		       mISDNDevName4ch(&amp;l2-&gt;ch), __func__);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	memcpy(skb_put(skb, i), tmp, i);</div><div class='hunk'>@@ -1150,7 +1182,7 @@ invoke_retransmission(struct layer2 *l2, unsigned int nr)</div><div class='ctx'> 			else</div><div class='ctx'> 				printk(KERN_WARNING</div><div class='ctx'> 				       "%s: windowar[%d] is NULL\n",</div><div class='del'>-				       __func__, p1);</div><div class='add'>+				       mISDNDevName4ch(&amp;l2-&gt;ch), p1);</div><div class='ctx'> 			l2-&gt;windowar[p1] = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> 		mISDN_FsmEvent(&amp;l2-&gt;l2m, EV_L2_ACK_PULL, NULL);</div><div class='hunk'>@@ -1461,8 +1493,8 @@ l2_pull_iqueue(struct FsmInst *fi, int event, void *arg)</div><div class='ctx'> 		p1 = (l2-&gt;vs - l2-&gt;va) % 8;</div><div class='ctx'> 	p1 = (p1 + l2-&gt;sow) % l2-&gt;window;</div><div class='ctx'> 	if (l2-&gt;windowar[p1]) {</div><div class='del'>-		printk(KERN_WARNING "isdnl2 try overwrite ack queue entry %d\n",</div><div class='del'>-		       p1);</div><div class='add'>+		printk(KERN_WARNING "%s: l2 try overwrite ack queue entry %d\n",</div><div class='add'>+		       mISDNDevName4ch(&amp;l2-&gt;ch), p1);</div><div class='ctx'> 		dev_kfree_skb(l2-&gt;windowar[p1]);</div><div class='ctx'> 	}</div><div class='ctx'> 	l2-&gt;windowar[p1] = skb;</div><div class='hunk'>@@ -1482,12 +1514,14 @@ l2_pull_iqueue(struct FsmInst *fi, int event, void *arg)</div><div class='ctx'> 		memcpy(skb_push(nskb, i), header, i);</div><div class='ctx'> 	else {</div><div class='ctx'> 		printk(KERN_WARNING</div><div class='del'>-		       "isdnl2 pull_iqueue skb header(%d/%d) too short\n", i, p1);</div><div class='add'>+		       "%s: L2 pull_iqueue skb header(%d/%d) too short\n",</div><div class='add'>+		       mISDNDevName4ch(&amp;l2-&gt;ch), i, p1);</div><div class='ctx'> 		oskb = nskb;</div><div class='ctx'> 		nskb = mI_alloc_skb(oskb-&gt;len + i, GFP_ATOMIC);</div><div class='ctx'> 		if (!nskb) {</div><div class='ctx'> 			dev_kfree_skb(oskb);</div><div class='del'>-			printk(KERN_WARNING "%s: no skb mem\n", __func__);</div><div class='add'>+			printk(KERN_WARNING "%s: no skb mem in %s\n",</div><div class='add'>+			       mISDNDevName4ch(&amp;l2-&gt;ch), __func__);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 		memcpy(skb_put(nskb, i), header, i);</div><div class='hunk'>@@ -1814,11 +1848,16 @@ static struct FsmNode L2FnList[] =</div><div class='ctx'> 	{ST_L2_8, EV_L2_SUPER, l2_st8_got_super},</div><div class='ctx'> 	{ST_L2_7, EV_L2_I, l2_got_iframe},</div><div class='ctx'> 	{ST_L2_8, EV_L2_I, l2_got_iframe},</div><div class='del'>-	{ST_L2_5, EV_L2_T200, l2_st5_tout_200},</div><div class='del'>-	{ST_L2_6, EV_L2_T200, l2_st6_tout_200},</div><div class='del'>-	{ST_L2_7, EV_L2_T200, l2_st7_tout_200},</div><div class='del'>-	{ST_L2_8, EV_L2_T200, l2_st8_tout_200},</div><div class='del'>-	{ST_L2_7, EV_L2_T203, l2_st7_tout_203},</div><div class='add'>+	{ST_L2_5, EV_L2_T200, l2_timeout},</div><div class='add'>+	{ST_L2_6, EV_L2_T200, l2_timeout},</div><div class='add'>+	{ST_L2_7, EV_L2_T200, l2_timeout},</div><div class='add'>+	{ST_L2_8, EV_L2_T200, l2_timeout},</div><div class='add'>+	{ST_L2_7, EV_L2_T203, l2_timeout},</div><div class='add'>+	{ST_L2_5, EV_L2_T200I, l2_st5_tout_200},</div><div class='add'>+	{ST_L2_6, EV_L2_T200I, l2_st6_tout_200},</div><div class='add'>+	{ST_L2_7, EV_L2_T200I, l2_st7_tout_200},</div><div class='add'>+	{ST_L2_8, EV_L2_T200I, l2_st8_tout_200},</div><div class='add'>+	{ST_L2_7, EV_L2_T203I, l2_st7_tout_203},</div><div class='ctx'> 	{ST_L2_7, EV_L2_ACK_PULL, l2_pull_iqueue},</div><div class='ctx'> 	{ST_L2_7, EV_L2_SET_OWN_BUSY, l2_set_own_busy},</div><div class='ctx'> 	{ST_L2_8, EV_L2_SET_OWN_BUSY, l2_set_own_busy},</div><div class='hunk'>@@ -1858,7 +1897,8 @@ ph_data_indication(struct layer2 *l2, struct mISDNhead *hh, struct sk_buff *skb)</div><div class='ctx'> 		ptei = *datap++;</div><div class='ctx'> 		if ((psapi &amp; 1) || !(ptei &amp; 1)) {</div><div class='ctx'> 			printk(KERN_WARNING</div><div class='del'>-			       "l2 D-channel frame wrong EA0/EA1\n");</div><div class='add'>+			       "%s l2 D-channel frame wrong EA0/EA1\n",</div><div class='add'>+			       mISDNDevName4ch(&amp;l2-&gt;ch));</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 		psapi &gt;&gt;= 2;</div><div class='hunk'>@@ -1867,7 +1907,8 @@ ph_data_indication(struct layer2 *l2, struct mISDNhead *hh, struct sk_buff *skb)</div><div class='ctx'> 			/* not our business */</div><div class='ctx'> 			if (*debug &amp; DEBUG_L2)</div><div class='ctx'> 				printk(KERN_DEBUG "%s: sapi %d/%d mismatch\n",</div><div class='del'>-				       __func__, psapi, l2-&gt;sapi);</div><div class='add'>+				       mISDNDevName4ch(&amp;l2-&gt;ch), psapi,</div><div class='add'>+				       l2-&gt;sapi);</div><div class='ctx'> 			dev_kfree_skb(skb);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1875,7 +1916,7 @@ ph_data_indication(struct layer2 *l2, struct mISDNhead *hh, struct sk_buff *skb)</div><div class='ctx'> 			/* not our business */</div><div class='ctx'> 			if (*debug &amp; DEBUG_L2)</div><div class='ctx'> 				printk(KERN_DEBUG "%s: tei %d/%d mismatch\n",</div><div class='del'>-				       __func__, ptei, l2-&gt;tei);</div><div class='add'>+				       mISDNDevName4ch(&amp;l2-&gt;ch), ptei, l2-&gt;tei);</div><div class='ctx'> 			dev_kfree_skb(skb);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1916,7 +1957,8 @@ ph_data_indication(struct layer2 *l2, struct mISDNhead *hh, struct sk_buff *skb)</div><div class='ctx'> 	} else</div><div class='ctx'> 		c = 'L';</div><div class='ctx'> 	if (c) {</div><div class='del'>-		printk(KERN_WARNING "l2 D-channel frame error %c\n", c);</div><div class='add'>+		printk(KERN_WARNING "%s:l2 D-channel frame error %c\n",</div><div class='add'>+		       mISDNDevName4ch(&amp;l2-&gt;ch), c);</div><div class='ctx'> 		mISDN_FsmEvent(&amp;l2-&gt;l2m, EV_L2_FRAME_ERROR, (void *)(long)c);</div><div class='ctx'> 	}</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1930,8 +1972,17 @@ l2_send(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 	int			ret = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (*debug &amp; DEBUG_L2_RECV)</div><div class='del'>-		printk(KERN_DEBUG "%s: prim(%x) id(%x) sapi(%d) tei(%d)\n",</div><div class='del'>-		       __func__, hh-&gt;prim, hh-&gt;id, l2-&gt;sapi, l2-&gt;tei);</div><div class='add'>+		printk(KERN_DEBUG "%s: %s prim(%x) id(%x) sapi(%d) tei(%d)\n",</div><div class='add'>+		       __func__, mISDNDevName4ch(&amp;l2-&gt;ch), hh-&gt;prim, hh-&gt;id,</div><div class='add'>+		       l2-&gt;sapi, l2-&gt;tei);</div><div class='add'>+	if (hh-&gt;prim == DL_INTERN_MSG) {</div><div class='add'>+		struct mISDNhead *chh = hh + 1; /* saved copy */</div><div class='add'>+</div><div class='add'>+		*hh = *chh;</div><div class='add'>+		if (*debug &amp; DEBUG_L2_RECV)</div><div class='add'>+			printk(KERN_DEBUG "%s: prim(%x) id(%x) internal msg\n",</div><div class='add'>+				mISDNDevName4ch(&amp;l2-&gt;ch), hh-&gt;prim, hh-&gt;id);</div><div class='add'>+	}</div><div class='ctx'> 	switch (hh-&gt;prim) {</div><div class='ctx'> 	case PH_DATA_IND:</div><div class='ctx'> 		ret = ph_data_indication(l2, hh, skb);</div><div class='hunk'>@@ -1987,6 +2038,12 @@ l2_send(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 		ret = mISDN_FsmEvent(&amp;l2-&gt;l2m, EV_L2_DL_RELEASE_REQ,</div><div class='ctx'> 				     skb);</div><div class='ctx'> 		break;</div><div class='add'>+	case DL_TIMER200_IND:</div><div class='add'>+		mISDN_FsmEvent(&amp;l2-&gt;l2m, EV_L2_T200I, NULL);</div><div class='add'>+		break;</div><div class='add'>+	case DL_TIMER203_IND:</div><div class='add'>+		mISDN_FsmEvent(&amp;l2-&gt;l2m, EV_L2_T203I, NULL);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		if (*debug &amp; DEBUG_L2)</div><div class='ctx'> 			l2m_debug(&amp;l2-&gt;l2m, "l2 unknown pr %04x",</div><div class='hunk'>@@ -2005,7 +2062,8 @@ tei_l2(struct layer2 *l2, u_int cmd, u_long arg)</div><div class='ctx'> 	int		ret = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (*debug &amp; DEBUG_L2_TEI)</div><div class='del'>-		printk(KERN_DEBUG "%s: cmd(%x)\n", __func__, cmd);</div><div class='add'>+		printk(KERN_DEBUG "%s: cmd(%x) in %s\n",</div><div class='add'>+		       mISDNDevName4ch(&amp;l2-&gt;ch), cmd, __func__);</div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case (MDL_ASSIGN_REQ):</div><div class='ctx'> 		ret = mISDN_FsmEvent(&amp;l2-&gt;l2m, EV_L2_MDL_ASSIGN, (void *)arg);</div><div class='hunk'>@@ -2018,7 +2076,8 @@ tei_l2(struct layer2 *l2, u_int cmd, u_long arg)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case (MDL_ERROR_RSP):</div><div class='ctx'> 		/* ETS 300-125 5.3.2.1 Test: TC13010 */</div><div class='del'>-		printk(KERN_NOTICE "MDL_ERROR|REQ (tei_l2)\n");</div><div class='add'>+		printk(KERN_NOTICE "%s: MDL_ERROR|REQ (tei_l2)\n",</div><div class='add'>+		       mISDNDevName4ch(&amp;l2-&gt;ch));</div><div class='ctx'> 		ret = mISDN_FsmEvent(&amp;l2-&gt;l2m, EV_L2_MDL_ERROR, NULL);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2050,7 +2109,8 @@ l2_ctrl(struct mISDNchannel *ch, u_int cmd, void *arg)</div><div class='ctx'> 	u_int			info;</div><div class='ctx'> </div><div class='ctx'> 	if (*debug &amp; DEBUG_L2_CTRL)</div><div class='del'>-		printk(KERN_DEBUG "%s:(%x)\n", __func__, cmd);</div><div class='add'>+		printk(KERN_DEBUG "%s: %s cmd(%x)\n",</div><div class='add'>+		       mISDNDevName4ch(ch), __func__, cmd);</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case OPEN_CHANNEL:</div><div class='head'>diff --git a/drivers/isdn/mISDN/tei.c b/drivers/isdn/mISDN/tei.c<br/>index ba2bc0c776e2..be88728f1106 100644<br/>--- a/<a href='/drm-misc/tree/drivers/isdn/mISDN/tei.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/isdn/mISDN/tei.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/isdn/mISDN/tei.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/isdn/mISDN/tei.c</a></div><div class='hunk'>@@ -790,18 +790,23 @@ tei_ph_data_ind(struct teimgr *tm, u_int mt, u_char *dp, int len)</div><div class='ctx'> static struct layer2 *</div><div class='ctx'> create_new_tei(struct manager *mgr, int tei, int sapi)</div><div class='ctx'> {</div><div class='del'>-	u_long		opt = 0;</div><div class='del'>-	u_long		flags;</div><div class='del'>-	int		id;</div><div class='del'>-	struct layer2	*l2;</div><div class='add'>+	unsigned long		opt = 0;</div><div class='add'>+	unsigned long		flags;</div><div class='add'>+	int			id;</div><div class='add'>+	struct layer2		*l2;</div><div class='add'>+	struct channel_req	rq;</div><div class='ctx'> </div><div class='ctx'> 	if (!mgr-&gt;up)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	if ((tei &gt;= 0) &amp;&amp; (tei &lt; 64))</div><div class='ctx'> 		test_and_set_bit(OPTION_L2_FIXEDTEI, &amp;opt);</div><div class='del'>-	if (mgr-&gt;ch.st-&gt;dev-&gt;Dprotocols</div><div class='del'>-	    &amp; ((1 &lt;&lt; ISDN_P_TE_E1) | (1 &lt;&lt; ISDN_P_NT_E1)))</div><div class='add'>+	if (mgr-&gt;ch.st-&gt;dev-&gt;Dprotocols &amp; ((1 &lt;&lt; ISDN_P_TE_E1) |</div><div class='add'>+	    (1 &lt;&lt; ISDN_P_NT_E1))) {</div><div class='ctx'> 		test_and_set_bit(OPTION_L2_PMX, &amp;opt);</div><div class='add'>+		rq.protocol = ISDN_P_NT_E1;</div><div class='add'>+	} else {</div><div class='add'>+		rq.protocol = ISDN_P_NT_S0;</div><div class='add'>+	}</div><div class='ctx'> 	l2 = create_l2(mgr-&gt;up, ISDN_P_LAPD_NT, opt, tei, sapi);</div><div class='ctx'> 	if (!l2) {</div><div class='ctx'> 		printk(KERN_WARNING "%s:no memory for layer2\n", __func__);</div><div class='hunk'>@@ -836,6 +841,14 @@ create_new_tei(struct manager *mgr, int tei, int sapi)</div><div class='ctx'> 		l2-&gt;ch.recv = mgr-&gt;ch.recv;</div><div class='ctx'> 		l2-&gt;ch.peer = mgr-&gt;ch.peer;</div><div class='ctx'> 		l2-&gt;ch.ctrl(&amp;l2-&gt;ch, OPEN_CHANNEL, NULL);</div><div class='add'>+		/* We need open here L1 for the manager as well (refcounting) */</div><div class='add'>+		rq.adr.dev = mgr-&gt;ch.st-&gt;dev-&gt;id;</div><div class='add'>+		id = mgr-&gt;ch.st-&gt;own.ctrl(&amp;mgr-&gt;ch.st-&gt;own, OPEN_CHANNEL, &amp;rq);</div><div class='add'>+		if (id &lt; 0) {</div><div class='add'>+			printk(KERN_WARNING "%s: cannot open L1\n", __func__);</div><div class='add'>+			l2-&gt;ch.ctrl(&amp;l2-&gt;ch, CLOSE_CHANNEL, NULL);</div><div class='add'>+			l2 = NULL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return l2;</div><div class='ctx'> }</div><div class='hunk'>@@ -978,10 +991,11 @@ TEIrelease(struct layer2 *l2)</div><div class='ctx'> static int</div><div class='ctx'> create_teimgr(struct manager *mgr, struct channel_req *crq)</div><div class='ctx'> {</div><div class='del'>-	struct layer2	*l2;</div><div class='del'>-	u_long		opt = 0;</div><div class='del'>-	u_long		flags;</div><div class='del'>-	int		id;</div><div class='add'>+	struct layer2		*l2;</div><div class='add'>+	unsigned long		opt = 0;</div><div class='add'>+	unsigned long		flags;</div><div class='add'>+	int			id;</div><div class='add'>+	struct channel_req	l1rq;</div><div class='ctx'> </div><div class='ctx'> 	if (*debug &amp; DEBUG_L2_TEI)</div><div class='ctx'> 		printk(KERN_DEBUG "%s: %s proto(%x) adr(%d %d %d %d)\n",</div><div class='hunk'>@@ -1016,6 +1030,7 @@ create_teimgr(struct manager *mgr, struct channel_req *crq)</div><div class='ctx'> 		if (crq-&gt;protocol == ISDN_P_LAPD_TE)</div><div class='ctx'> 			test_and_set_bit(MGR_OPT_USER, &amp;mgr-&gt;options);</div><div class='ctx'> 	}</div><div class='add'>+	l1rq.adr = crq-&gt;adr;</div><div class='ctx'> 	if (mgr-&gt;ch.st-&gt;dev-&gt;Dprotocols</div><div class='ctx'> 	    &amp; ((1 &lt;&lt; ISDN_P_TE_E1) | (1 &lt;&lt; ISDN_P_NT_E1)))</div><div class='ctx'> 		test_and_set_bit(OPTION_L2_PMX, &amp;opt);</div><div class='hunk'>@@ -1023,6 +1038,8 @@ create_teimgr(struct manager *mgr, struct channel_req *crq)</div><div class='ctx'> 		mgr-&gt;up = crq-&gt;ch;</div><div class='ctx'> 		id = DL_INFO_L2_CONNECT;</div><div class='ctx'> 		teiup_create(mgr, DL_INFORMATION_IND, sizeof(id), &amp;id);</div><div class='add'>+		if (test_bit(MGR_PH_ACTIVE, &amp;mgr-&gt;options))</div><div class='add'>+			teiup_create(mgr, PH_ACTIVATE_IND, 0, NULL);</div><div class='ctx'> 		crq-&gt;ch = NULL;</div><div class='ctx'> 		if (!list_empty(&amp;mgr-&gt;layer2)) {</div><div class='ctx'> 			read_lock_irqsave(&amp;mgr-&gt;lock, flags);</div><div class='hunk'>@@ -1053,24 +1070,34 @@ create_teimgr(struct manager *mgr, struct channel_req *crq)</div><div class='ctx'> 		l2-&gt;tm-&gt;tei_m.fsm = &amp;teifsmu;</div><div class='ctx'> 		l2-&gt;tm-&gt;tei_m.state = ST_TEI_NOP;</div><div class='ctx'> 		l2-&gt;tm-&gt;tval = 1000; /* T201  1 sec */</div><div class='add'>+		if (test_bit(OPTION_L2_PMX, &amp;opt))</div><div class='add'>+			l1rq.protocol = ISDN_P_TE_E1;</div><div class='add'>+		else</div><div class='add'>+			l1rq.protocol = ISDN_P_TE_S0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		l2-&gt;tm-&gt;tei_m.fsm = &amp;teifsmn;</div><div class='ctx'> 		l2-&gt;tm-&gt;tei_m.state = ST_TEI_NOP;</div><div class='ctx'> 		l2-&gt;tm-&gt;tval = 2000; /* T202  2 sec */</div><div class='add'>+		if (test_bit(OPTION_L2_PMX, &amp;opt))</div><div class='add'>+			l1rq.protocol = ISDN_P_NT_E1;</div><div class='add'>+		else</div><div class='add'>+			l1rq.protocol = ISDN_P_NT_S0;</div><div class='ctx'> 	}</div><div class='ctx'> 	mISDN_FsmInitTimer(&amp;l2-&gt;tm-&gt;tei_m, &amp;l2-&gt;tm-&gt;timer);</div><div class='ctx'> 	write_lock_irqsave(&amp;mgr-&gt;lock, flags);</div><div class='ctx'> 	id = get_free_id(mgr);</div><div class='ctx'> 	list_add_tail(&amp;l2-&gt;list, &amp;mgr-&gt;layer2);</div><div class='ctx'> 	write_unlock_irqrestore(&amp;mgr-&gt;lock, flags);</div><div class='del'>-	if (id &lt; 0) {</div><div class='del'>-		l2-&gt;ch.ctrl(&amp;l2-&gt;ch, CLOSE_CHANNEL, NULL);</div><div class='del'>-	} else {</div><div class='add'>+	if (id &gt;= 0) {</div><div class='ctx'> 		l2-&gt;ch.nr = id;</div><div class='ctx'> 		l2-&gt;up-&gt;nr = id;</div><div class='ctx'> 		crq-&gt;ch = &amp;l2-&gt;ch;</div><div class='del'>-		id = 0;</div><div class='add'>+		/* We need open here L1 for the manager as well (refcounting) */</div><div class='add'>+		id = mgr-&gt;ch.st-&gt;own.ctrl(&amp;mgr-&gt;ch.st-&gt;own, OPEN_CHANNEL,</div><div class='add'>+					  &amp;l1rq);</div><div class='ctx'> 	}</div><div class='add'>+	if (id &lt; 0)</div><div class='add'>+		l2-&gt;ch.ctrl(&amp;l2-&gt;ch, CLOSE_CHANNEL, NULL);</div><div class='ctx'> 	return id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1096,12 +1123,16 @@ mgr_send(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PH_ACTIVATE_IND:</div><div class='ctx'> 		test_and_set_bit(MGR_PH_ACTIVE, &amp;mgr-&gt;options);</div><div class='add'>+		if (mgr-&gt;up)</div><div class='add'>+			teiup_create(mgr, PH_ACTIVATE_IND, 0, NULL);</div><div class='ctx'> 		mISDN_FsmEvent(&amp;mgr-&gt;deact, EV_ACTIVATE_IND, NULL);</div><div class='ctx'> 		do_send(mgr);</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PH_DEACTIVATE_IND:</div><div class='ctx'> 		test_and_clear_bit(MGR_PH_ACTIVE, &amp;mgr-&gt;options);</div><div class='add'>+		if (mgr-&gt;up)</div><div class='add'>+			teiup_create(mgr, PH_DEACTIVATE_IND, 0, NULL);</div><div class='ctx'> 		mISDN_FsmEvent(&amp;mgr-&gt;deact, EV_DEACTIVATE_IND, NULL);</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1263,7 +1294,7 @@ static int</div><div class='ctx'> mgr_bcast(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct manager		*mgr = container_of(ch, struct manager, bcast);</div><div class='del'>-	struct mISDNhead	*hh = mISDN_HEAD_P(skb);</div><div class='add'>+	struct mISDNhead	*hhc, *hh = mISDN_HEAD_P(skb);</div><div class='ctx'> 	struct sk_buff		*cskb = NULL;</div><div class='ctx'> 	struct layer2		*l2;</div><div class='ctx'> 	u_long			flags;</div><div class='hunk'>@@ -1278,10 +1309,17 @@ mgr_bcast(struct mISDNchannel *ch, struct sk_buff *skb)</div><div class='ctx'> 				skb = NULL;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				if (!cskb)</div><div class='del'>-					cskb = skb_copy(skb, GFP_KERNEL);</div><div class='add'>+					cskb = skb_copy(skb, GFP_ATOMIC);</div><div class='ctx'> 			}</div><div class='ctx'> 			if (cskb) {</div><div class='del'>-				ret = l2-&gt;ch.send(&amp;l2-&gt;ch, cskb);</div><div class='add'>+				hhc = mISDN_HEAD_P(cskb);</div><div class='add'>+				/* save original header behind normal header */</div><div class='add'>+				hhc++;</div><div class='add'>+				*hhc = *hh;</div><div class='add'>+				hhc--;</div><div class='add'>+				hhc-&gt;prim = DL_INTERN_MSG;</div><div class='add'>+				hhc-&gt;id = l2-&gt;ch.nr;</div><div class='add'>+				ret = ch-&gt;st-&gt;own.recv(&amp;ch-&gt;st-&gt;own, cskb);</div><div class='ctx'> 				if (ret) {</div><div class='ctx'> 					if (*debug &amp; DEBUG_SEND_ERR)</div><div class='ctx'> 						printk(KERN_DEBUG</div><div class='head'>diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig<br/>index ff4b8cfda585..04cb8c88d74b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/Kconfig</a></div><div class='hunk'>@@ -50,6 +50,19 @@ config LEDS_LM3530</div><div class='ctx'> 	  controlled manually or using PWM input or using ambient</div><div class='ctx'> 	  light automatically.</div><div class='ctx'> </div><div class='add'>+config LEDS_LM3533</div><div class='add'>+	tristate "LED support for LM3533"</div><div class='add'>+	depends on LEDS_CLASS</div><div class='add'>+	depends on MFD_LM3533</div><div class='add'>+	help</div><div class='add'>+	  This option enables support for the LEDs on National Semiconductor /</div><div class='add'>+	  TI LM3533 Lighting Power chips.</div><div class='add'>+</div><div class='add'>+	  The LEDs can be controlled directly, through PWM input, or by the</div><div class='add'>+	  ambient-light-sensor interface. The chip supports</div><div class='add'>+	  hardware-accelerated blinking with maximum on and off periods of 9.8</div><div class='add'>+	  and 77 seconds respectively.</div><div class='add'>+</div><div class='ctx'> config LEDS_LOCOMO</div><div class='ctx'> 	tristate "LED Support for Locomo device"</div><div class='ctx'> 	depends on LEDS_CLASS</div><div class='hunk'>@@ -259,6 +272,14 @@ config LEDS_DA903X</div><div class='ctx'> 	  This option enables support for on-chip LED drivers found</div><div class='ctx'> 	  on Dialog Semiconductor DA9030/DA9034 PMICs.</div><div class='ctx'> </div><div class='add'>+config LEDS_DA9052</div><div class='add'>+	tristate "Dialog DA9052/DA9053 LEDS"</div><div class='add'>+	depends on LEDS_CLASS</div><div class='add'>+	depends on PMIC_DA9052</div><div class='add'>+	help</div><div class='add'>+	  This option enables support for on-chip LED drivers found</div><div class='add'>+	  on Dialog Semiconductor DA9052-BC and DA9053-AA/Bx PMICs.</div><div class='add'>+</div><div class='ctx'> config LEDS_DAC124S085</div><div class='ctx'> 	tristate "LED Support for DAC124S085 SPI DAC"</div><div class='ctx'> 	depends on LEDS_CLASS</div><div class='hunk'>@@ -471,4 +492,12 @@ config LEDS_TRIGGER_DEFAULT_ON</div><div class='ctx'> comment "iptables trigger is under Netfilter config (LED target)"</div><div class='ctx'> 	depends on LEDS_TRIGGERS</div><div class='ctx'> </div><div class='add'>+config LEDS_TRIGGER_TRANSIENT</div><div class='add'>+	tristate "LED Transient Trigger"</div><div class='add'>+	depends on LEDS_TRIGGERS</div><div class='add'>+	help</div><div class='add'>+	  This allows one time activation of a transient state on</div><div class='add'>+	  GPIO/PWM based hadrware.</div><div class='add'>+	  If unsure, say Y.</div><div class='add'>+</div><div class='ctx'> endif # NEW_LEDS</div><div class='head'>diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile<br/>index 890481cb09f6..f8958cd6cf6e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/Makefile</a></div><div class='hunk'>@@ -10,6 +10,7 @@ obj-$(CONFIG_LEDS_ATMEL_PWM)		+= leds-atmel-pwm.o</div><div class='ctx'> obj-$(CONFIG_LEDS_BD2802)		+= leds-bd2802.o</div><div class='ctx'> obj-$(CONFIG_LEDS_LOCOMO)		+= leds-locomo.o</div><div class='ctx'> obj-$(CONFIG_LEDS_LM3530)		+= leds-lm3530.o</div><div class='add'>+obj-$(CONFIG_LEDS_LM3533)		+= leds-lm3533.o</div><div class='ctx'> obj-$(CONFIG_LEDS_MIKROTIK_RB532)	+= leds-rb532.o</div><div class='ctx'> obj-$(CONFIG_LEDS_S3C24XX)		+= leds-s3c24xx.o</div><div class='ctx'> obj-$(CONFIG_LEDS_NET48XX)		+= leds-net48xx.o</div><div class='hunk'>@@ -31,6 +32,7 @@ obj-$(CONFIG_LEDS_FSG)			+= leds-fsg.o</div><div class='ctx'> obj-$(CONFIG_LEDS_PCA955X)		+= leds-pca955x.o</div><div class='ctx'> obj-$(CONFIG_LEDS_PCA9633)		+= leds-pca9633.o</div><div class='ctx'> obj-$(CONFIG_LEDS_DA903X)		+= leds-da903x.o</div><div class='add'>+obj-$(CONFIG_LEDS_DA9052)		+= leds-da9052.o</div><div class='ctx'> obj-$(CONFIG_LEDS_WM831X_STATUS)	+= leds-wm831x-status.o</div><div class='ctx'> obj-$(CONFIG_LEDS_WM8350)		+= leds-wm8350.o</div><div class='ctx'> obj-$(CONFIG_LEDS_PWM)			+= leds-pwm.o</div><div class='hunk'>@@ -56,3 +58,4 @@ obj-$(CONFIG_LEDS_TRIGGER_HEARTBEAT)	+= ledtrig-heartbeat.o</div><div class='ctx'> obj-$(CONFIG_LEDS_TRIGGER_BACKLIGHT)	+= ledtrig-backlight.o</div><div class='ctx'> obj-$(CONFIG_LEDS_TRIGGER_GPIO)		+= ledtrig-gpio.o</div><div class='ctx'> obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON)	+= ledtrig-default-on.o</div><div class='add'>+obj-$(CONFIG_LEDS_TRIGGER_TRANSIENT)	+= ledtrig-transient.o</div><div class='head'>diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c<br/>index 5bff8439dc68..8ee92c81aec2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/led-class.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/led-class.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/led-class.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/led-class.c</a></div><div class='hunk'>@@ -44,23 +44,18 @@ static ssize_t led_brightness_store(struct device *dev,</div><div class='ctx'> 		struct device_attribute *attr, const char *buf, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	unsigned long state;</div><div class='ctx'> 	ssize_t ret = -EINVAL;</div><div class='del'>-	char *after;</div><div class='del'>-	unsigned long state = simple_strtoul(buf, &amp;after, 10);</div><div class='del'>-	size_t count = after - buf;</div><div class='ctx'> </div><div class='del'>-	if (isspace(*after))</div><div class='del'>-		count++;</div><div class='add'>+	ret = kstrtoul(buf, 10, &amp;state);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	if (count == size) {</div><div class='del'>-		ret = count;</div><div class='add'>+	if (state == LED_OFF)</div><div class='add'>+		led_trigger_remove(led_cdev);</div><div class='add'>+	led_set_brightness(led_cdev, state);</div><div class='ctx'> </div><div class='del'>-		if (state == LED_OFF)</div><div class='del'>-			led_trigger_remove(led_cdev);</div><div class='del'>-		led_set_brightness(led_cdev, state);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t led_max_brightness_show(struct device *dev,</div><div class='head'>diff --git a/drivers/leds/leds-da9052.c b/drivers/leds/leds-da9052.c<br/>new file mode 100644<br/>index 000000000000..58a5244c437e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/leds/leds-da9052.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-da9052.c</a></div><div class='hunk'>@@ -0,0 +1,214 @@</div><div class='add'>+/*</div><div class='add'>+ * LED Driver for Dialog DA9052 PMICs.</div><div class='add'>+ *</div><div class='add'>+ * Copyright(c) 2012 Dialog Semiconductor Ltd.</div><div class='add'>+ *</div><div class='add'>+ * Author: David Dajun Chen &lt;dchen@diasemi.com&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute  it and/or modify it</div><div class='add'>+ *  under  the terms of  the GNU General  Public License as published by the</div><div class='add'>+ *  Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='add'>+ *  option) any later version.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mfd/da9052/reg.h&gt;</div><div class='add'>+#include &lt;linux/mfd/da9052/da9052.h&gt;</div><div class='add'>+#include &lt;linux/mfd/da9052/pdata.h&gt;</div><div class='add'>+</div><div class='add'>+#define DA9052_OPENDRAIN_OUTPUT	2</div><div class='add'>+#define DA9052_SET_HIGH_LVL_OUTPUT	(1 &lt;&lt; 3)</div><div class='add'>+#define DA9052_MASK_UPPER_NIBBLE	0xF0</div><div class='add'>+#define DA9052_MASK_LOWER_NIBBLE	0x0F</div><div class='add'>+#define DA9052_NIBBLE_SHIFT		4</div><div class='add'>+#define DA9052_MAX_BRIGHTNESS		0x5f</div><div class='add'>+</div><div class='add'>+struct da9052_led {</div><div class='add'>+	struct led_classdev cdev;</div><div class='add'>+	struct work_struct work;</div><div class='add'>+	struct da9052 *da9052;</div><div class='add'>+	unsigned char led_index;</div><div class='add'>+	unsigned char id;</div><div class='add'>+	int brightness;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned char led_reg[] = {</div><div class='add'>+	DA9052_LED_CONT_4_REG,</div><div class='add'>+	DA9052_LED_CONT_5_REG,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int da9052_set_led_brightness(struct da9052_led *led)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	val = (led-&gt;brightness &amp; 0x7f) | DA9052_LED_CONT_DIM;</div><div class='add'>+</div><div class='add'>+	error = da9052_reg_write(led-&gt;da9052, led_reg[led-&gt;led_index], val);</div><div class='add'>+	if (error &lt; 0)</div><div class='add'>+		dev_err(led-&gt;da9052-&gt;dev, "Failed to set led brightness, %d\n",</div><div class='add'>+			error);</div><div class='add'>+	return error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void da9052_led_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct da9052_led *led = container_of(work, struct da9052_led, work);</div><div class='add'>+</div><div class='add'>+	da9052_set_led_brightness(led);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void da9052_led_set(struct led_classdev *led_cdev,</div><div class='add'>+			   enum led_brightness value)</div><div class='add'>+{</div><div class='add'>+	struct da9052_led *led;</div><div class='add'>+</div><div class='add'>+	led = container_of(led_cdev, struct da9052_led, cdev);</div><div class='add'>+	led-&gt;brightness = value;</div><div class='add'>+	schedule_work(&amp;led-&gt;work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int da9052_configure_leds(struct da9052 *da9052)</div><div class='add'>+{</div><div class='add'>+	int error;</div><div class='add'>+	unsigned char register_value = DA9052_OPENDRAIN_OUTPUT</div><div class='add'>+				       | DA9052_SET_HIGH_LVL_OUTPUT;</div><div class='add'>+</div><div class='add'>+	error = da9052_reg_update(da9052, DA9052_GPIO_14_15_REG,</div><div class='add'>+				  DA9052_MASK_LOWER_NIBBLE,</div><div class='add'>+				  register_value);</div><div class='add'>+</div><div class='add'>+	if (error &lt; 0) {</div><div class='add'>+		dev_err(da9052-&gt;dev, "Failed to write GPIO 14-15 reg, %d\n",</div><div class='add'>+			error);</div><div class='add'>+		return error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	error = da9052_reg_update(da9052, DA9052_GPIO_14_15_REG,</div><div class='add'>+				  DA9052_MASK_UPPER_NIBBLE,</div><div class='add'>+				  register_value &lt;&lt; DA9052_NIBBLE_SHIFT);</div><div class='add'>+	if (error &lt; 0)</div><div class='add'>+		dev_err(da9052-&gt;dev, "Failed to write GPIO 14-15 reg, %d\n",</div><div class='add'>+			error);</div><div class='add'>+</div><div class='add'>+	return error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit da9052_led_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct da9052_pdata *pdata;</div><div class='add'>+	struct da9052 *da9052;</div><div class='add'>+	struct led_platform_data *pled;</div><div class='add'>+	struct da9052_led *led = NULL;</div><div class='add'>+	int error = -ENODEV;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	da9052 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	pdata = da9052-&gt;dev-&gt;platform_data;</div><div class='add'>+	if (pdata == NULL) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "No platform data\n");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pled = pdata-&gt;pled;</div><div class='add'>+	if (pled == NULL) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "No platform data for LED\n");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	led = devm_kzalloc(&amp;pdev-&gt;dev,</div><div class='add'>+			   sizeof(struct da9052_led) * pled-&gt;num_leds,</div><div class='add'>+			   GFP_KERNEL);</div><div class='add'>+	if (led == NULL) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to alloc memory\n");</div><div class='add'>+		error = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pled-&gt;num_leds; i++) {</div><div class='add'>+		led[i].cdev.name = pled-&gt;leds[i].name;</div><div class='add'>+		led[i].cdev.brightness_set = da9052_led_set;</div><div class='add'>+		led[i].cdev.brightness = LED_OFF;</div><div class='add'>+		led[i].cdev.max_brightness = DA9052_MAX_BRIGHTNESS;</div><div class='add'>+		led[i].brightness = LED_OFF;</div><div class='add'>+		led[i].led_index = pled-&gt;leds[i].flags;</div><div class='add'>+		led[i].da9052 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+		INIT_WORK(&amp;led[i].work, da9052_led_work);</div><div class='add'>+</div><div class='add'>+		error = led_classdev_register(pdev-&gt;dev.parent, &amp;led[i].cdev);</div><div class='add'>+		if (error) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "Failed to register led %d\n",</div><div class='add'>+				led[i].led_index);</div><div class='add'>+			goto err_register;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		error = da9052_set_led_brightness(&amp;led[i]);</div><div class='add'>+		if (error) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "Unable to init led %d\n",</div><div class='add'>+				led[i].led_index);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	error = da9052_configure_leds(led-&gt;da9052);</div><div class='add'>+	if (error) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to configure GPIO LED%d\n", error);</div><div class='add'>+		goto err_register;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, led);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_register:</div><div class='add'>+	for (i = i - 1; i &gt;= 0; i--) {</div><div class='add'>+		led_classdev_unregister(&amp;led[i].cdev);</div><div class='add'>+		cancel_work_sync(&amp;led[i].work);</div><div class='add'>+	}</div><div class='add'>+err:</div><div class='add'>+	return error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit da9052_led_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct da9052_led *led = platform_get_drvdata(pdev);</div><div class='add'>+	struct da9052_pdata *pdata;</div><div class='add'>+	struct da9052 *da9052;</div><div class='add'>+	struct led_platform_data *pled;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	da9052 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	pdata = da9052-&gt;dev-&gt;platform_data;</div><div class='add'>+	pled = pdata-&gt;pled;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pled-&gt;num_leds; i++) {</div><div class='add'>+		led[i].brightness = 0;</div><div class='add'>+		da9052_set_led_brightness(&amp;led[i]);</div><div class='add'>+		led_classdev_unregister(&amp;led[i].cdev);</div><div class='add'>+		cancel_work_sync(&amp;led[i].work);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver da9052_led_driver = {</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "da9052-leds",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe		= da9052_led_probe,</div><div class='add'>+	.remove		= __devexit_p(da9052_led_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(da9052_led_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Dialog Semiconductor Ltd &lt;dchen@diasemi.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("LED driver for Dialog DA9052 PMIC");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/leds/leds-lm3530.c b/drivers/leds/leds-lm3530.c<br/>index 968fd5fef4fc..84ba6de8039c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/leds-lm3530.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/leds-lm3530.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/leds-lm3530.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-lm3530.c</a></div><div class='hunk'>@@ -113,6 +113,18 @@ struct lm3530_data {</div><div class='ctx'> 	bool enable;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * struct lm3530_als_data</div><div class='add'>+ * @config  : value of ALS configuration register</div><div class='add'>+ * @imp_sel : value of ALS resistor select register</div><div class='add'>+ * @zone    : values of ALS ZB(Zone Boundary) registers</div><div class='add'>+ */</div><div class='add'>+struct lm3530_als_data {</div><div class='add'>+	u8 config;</div><div class='add'>+	u8 imp_sel;</div><div class='add'>+	u8 zones[LM3530_ALS_ZB_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const u8 lm3530_reg[LM3530_REG_MAX] = {</div><div class='ctx'> 	LM3530_GEN_CONFIG,</div><div class='ctx'> 	LM3530_ALS_CONFIG,</div><div class='hunk'>@@ -141,29 +153,65 @@ static int lm3530_get_mode_from_str(const char *str)</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void lm3530_als_configure(struct lm3530_platform_data *pdata,</div><div class='add'>+				struct lm3530_als_data *als)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	u32 als_vmin, als_vmax, als_vstep;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;als_vmax == 0) {</div><div class='add'>+		pdata-&gt;als_vmin = 0;</div><div class='add'>+		pdata-&gt;als_vmax = LM3530_ALS_WINDOW_mV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	als_vmin = pdata-&gt;als_vmin;</div><div class='add'>+	als_vmax = pdata-&gt;als_vmax;</div><div class='add'>+</div><div class='add'>+	if ((als_vmax - als_vmin) &gt; LM3530_ALS_WINDOW_mV)</div><div class='add'>+		pdata-&gt;als_vmax = als_vmax = als_vmin + LM3530_ALS_WINDOW_mV;</div><div class='add'>+</div><div class='add'>+	/* n zone boundary makes n+1 zones */</div><div class='add'>+	als_vstep = (als_vmax - als_vmin) / (LM3530_ALS_ZB_MAX + 1);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; LM3530_ALS_ZB_MAX; i++)</div><div class='add'>+		als-&gt;zones[i] = (((als_vmin + LM3530_ALS_OFFSET_mV) +</div><div class='add'>+			als_vstep + (i * als_vstep)) * LED_FULL) / 1000;</div><div class='add'>+</div><div class='add'>+	als-&gt;config =</div><div class='add'>+		(pdata-&gt;als_avrg_time &lt;&lt; LM3530_ALS_AVG_TIME_SHIFT) |</div><div class='add'>+		(LM3530_ENABLE_ALS) |</div><div class='add'>+		(pdata-&gt;als_input_mode &lt;&lt; LM3530_ALS_SEL_SHIFT);</div><div class='add'>+</div><div class='add'>+	als-&gt;imp_sel =</div><div class='add'>+		(pdata-&gt;als1_resistor_sel &lt;&lt; LM3530_ALS1_IMP_SHIFT) |</div><div class='add'>+		(pdata-&gt;als2_resistor_sel &lt;&lt; LM3530_ALS2_IMP_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int lm3530_init_registers(struct lm3530_data *drvdata)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u8 gen_config;</div><div class='del'>-	u8 als_config = 0;</div><div class='ctx'> 	u8 brt_ramp;</div><div class='del'>-	u8 als_imp_sel = 0;</div><div class='ctx'> 	u8 brightness;</div><div class='ctx'> 	u8 reg_val[LM3530_REG_MAX];</div><div class='del'>-	u8 zones[LM3530_ALS_ZB_MAX];</div><div class='del'>-	u32 als_vmin, als_vmax, als_vstep;</div><div class='ctx'> 	struct lm3530_platform_data *pdata = drvdata-&gt;pdata;</div><div class='ctx'> 	struct i2c_client *client = drvdata-&gt;client;</div><div class='ctx'> 	struct lm3530_pwm_data *pwm = &amp;pdata-&gt;pwm_data;</div><div class='add'>+	struct lm3530_als_data als;</div><div class='add'>+</div><div class='add'>+	memset(&amp;als, 0, sizeof(struct lm3530_als_data));</div><div class='ctx'> </div><div class='ctx'> 	gen_config = (pdata-&gt;brt_ramp_law &lt;&lt; LM3530_RAMP_LAW_SHIFT) |</div><div class='ctx'> 			((pdata-&gt;max_current &amp; 7) &lt;&lt; LM3530_MAX_CURR_SHIFT);</div><div class='ctx'> </div><div class='ctx'> 	switch (drvdata-&gt;mode) {</div><div class='ctx'> 	case LM3530_BL_MODE_MANUAL:</div><div class='add'>+		gen_config |= LM3530_ENABLE_I2C;</div><div class='add'>+		break;</div><div class='ctx'> 	case LM3530_BL_MODE_ALS:</div><div class='ctx'> 		gen_config |= LM3530_ENABLE_I2C;</div><div class='add'>+		lm3530_als_configure(pdata, &amp;als);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LM3530_BL_MODE_PWM:</div><div class='ctx'> 		gen_config |= LM3530_ENABLE_PWM | LM3530_ENABLE_PWM_SIMPLE |</div><div class='hunk'>@@ -171,38 +219,6 @@ static int lm3530_init_registers(struct lm3530_data *drvdata)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (drvdata-&gt;mode == LM3530_BL_MODE_ALS) {</div><div class='del'>-		if (pdata-&gt;als_vmax == 0) {</div><div class='del'>-			pdata-&gt;als_vmin = 0;</div><div class='del'>-			pdata-&gt;als_vmax = LM3530_ALS_WINDOW_mV;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		als_vmin = pdata-&gt;als_vmin;</div><div class='del'>-		als_vmax = pdata-&gt;als_vmax;</div><div class='del'>-</div><div class='del'>-		if ((als_vmax - als_vmin) &gt; LM3530_ALS_WINDOW_mV)</div><div class='del'>-			pdata-&gt;als_vmax = als_vmax =</div><div class='del'>-				als_vmin + LM3530_ALS_WINDOW_mV;</div><div class='del'>-</div><div class='del'>-		/* n zone boundary makes n+1 zones */</div><div class='del'>-		als_vstep = (als_vmax - als_vmin) / (LM3530_ALS_ZB_MAX + 1);</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; LM3530_ALS_ZB_MAX; i++)</div><div class='del'>-			zones[i] = (((als_vmin + LM3530_ALS_OFFSET_mV) +</div><div class='del'>-					als_vstep + (i * als_vstep)) * LED_FULL)</div><div class='del'>-					/ 1000;</div><div class='del'>-</div><div class='del'>-		als_config =</div><div class='del'>-			(pdata-&gt;als_avrg_time &lt;&lt; LM3530_ALS_AVG_TIME_SHIFT) |</div><div class='del'>-			(LM3530_ENABLE_ALS) |</div><div class='del'>-			(pdata-&gt;als_input_mode &lt;&lt; LM3530_ALS_SEL_SHIFT);</div><div class='del'>-</div><div class='del'>-		als_imp_sel =</div><div class='del'>-			(pdata-&gt;als1_resistor_sel &lt;&lt; LM3530_ALS1_IMP_SHIFT) |</div><div class='del'>-			(pdata-&gt;als2_resistor_sel &lt;&lt; LM3530_ALS2_IMP_SHIFT);</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	brt_ramp = (pdata-&gt;brt_ramp_fall &lt;&lt; LM3530_BRT_RAMP_FALL_SHIFT) |</div><div class='ctx'> 			(pdata-&gt;brt_ramp_rise &lt;&lt; LM3530_BRT_RAMP_RISE_SHIFT);</div><div class='ctx'> </div><div class='hunk'>@@ -215,14 +231,14 @@ static int lm3530_init_registers(struct lm3530_data *drvdata)</div><div class='ctx'> 		brightness = drvdata-&gt;led_dev.max_brightness;</div><div class='ctx'> </div><div class='ctx'> 	reg_val[0] = gen_config;	/* LM3530_GEN_CONFIG */</div><div class='del'>-	reg_val[1] = als_config;	/* LM3530_ALS_CONFIG */</div><div class='add'>+	reg_val[1] = als.config;	/* LM3530_ALS_CONFIG */</div><div class='ctx'> 	reg_val[2] = brt_ramp;		/* LM3530_BRT_RAMP_RATE */</div><div class='del'>-	reg_val[3] = als_imp_sel;	/* LM3530_ALS_IMP_SELECT */</div><div class='add'>+	reg_val[3] = als.imp_sel;	/* LM3530_ALS_IMP_SELECT */</div><div class='ctx'> 	reg_val[4] = brightness;	/* LM3530_BRT_CTRL_REG */</div><div class='del'>-	reg_val[5] = zones[0];		/* LM3530_ALS_ZB0_REG */</div><div class='del'>-	reg_val[6] = zones[1];		/* LM3530_ALS_ZB1_REG */</div><div class='del'>-	reg_val[7] = zones[2];		/* LM3530_ALS_ZB2_REG */</div><div class='del'>-	reg_val[8] = zones[3];		/* LM3530_ALS_ZB3_REG */</div><div class='add'>+	reg_val[5] = als.zones[0];	/* LM3530_ALS_ZB0_REG */</div><div class='add'>+	reg_val[6] = als.zones[1];	/* LM3530_ALS_ZB1_REG */</div><div class='add'>+	reg_val[7] = als.zones[2];	/* LM3530_ALS_ZB2_REG */</div><div class='add'>+	reg_val[8] = als.zones[3];	/* LM3530_ALS_ZB3_REG */</div><div class='ctx'> 	reg_val[9] = LM3530_DEF_ZT_0;	/* LM3530_ALS_Z0T_REG */</div><div class='ctx'> 	reg_val[10] = LM3530_DEF_ZT_1;	/* LM3530_ALS_Z1T_REG */</div><div class='ctx'> 	reg_val[11] = LM3530_DEF_ZT_2;	/* LM3530_ALS_Z2T_REG */</div><div class='head'>diff --git a/drivers/leds/leds-lm3533.c b/drivers/leds/leds-lm3533.c<br/>new file mode 100644<br/>index 000000000000..f56b6e7ffdac<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/leds/leds-lm3533.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-lm3533.c</a></div><div class='hunk'>@@ -0,0 +1,785 @@</div><div class='add'>+/*</div><div class='add'>+ * leds-lm3533.c -- LM3533 LED driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2012 Texas Instruments</div><div class='add'>+ *</div><div class='add'>+ * Author: Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under  the terms of the GNU General  Public License as published by the</div><div class='add'>+ * Free Software Foundation;  either version 2 of the License, or (at your</div><div class='add'>+ * option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='add'>+#include &lt;linux/mfd/core.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mfd/lm3533.h&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define LM3533_LVCTRLBANK_MIN		2</div><div class='add'>+#define LM3533_LVCTRLBANK_MAX		5</div><div class='add'>+#define LM3533_LVCTRLBANK_COUNT		4</div><div class='add'>+#define LM3533_RISEFALLTIME_MAX		7</div><div class='add'>+#define LM3533_ALS_CHANNEL_LV_MIN	1</div><div class='add'>+#define LM3533_ALS_CHANNEL_LV_MAX	2</div><div class='add'>+</div><div class='add'>+#define LM3533_REG_CTRLBANK_BCONF_BASE		0x1b</div><div class='add'>+#define LM3533_REG_PATTERN_ENABLE		0x28</div><div class='add'>+#define LM3533_REG_PATTERN_LOW_TIME_BASE	0x71</div><div class='add'>+#define LM3533_REG_PATTERN_HIGH_TIME_BASE	0x72</div><div class='add'>+#define LM3533_REG_PATTERN_RISETIME_BASE	0x74</div><div class='add'>+#define LM3533_REG_PATTERN_FALLTIME_BASE	0x75</div><div class='add'>+</div><div class='add'>+#define LM3533_REG_PATTERN_STEP			0x10</div><div class='add'>+</div><div class='add'>+#define LM3533_REG_CTRLBANK_BCONF_MAPPING_MASK		0x04</div><div class='add'>+#define LM3533_REG_CTRLBANK_BCONF_ALS_EN_MASK		0x02</div><div class='add'>+#define LM3533_REG_CTRLBANK_BCONF_ALS_CHANNEL_MASK	0x01</div><div class='add'>+</div><div class='add'>+#define LM3533_LED_FLAG_PATTERN_ENABLE		1</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct lm3533_led {</div><div class='add'>+	struct lm3533 *lm3533;</div><div class='add'>+	struct lm3533_ctrlbank cb;</div><div class='add'>+	struct led_classdev cdev;</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	struct mutex mutex;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	struct work_struct work;</div><div class='add'>+	u8 new_brightness;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static inline struct lm3533_led *to_lm3533_led(struct led_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	return container_of(cdev, struct lm3533_led, cdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int lm3533_led_get_ctrlbank_id(struct lm3533_led *led)</div><div class='add'>+{</div><div class='add'>+	return led-&gt;id + 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 lm3533_led_get_lv_reg(struct lm3533_led *led, u8 base)</div><div class='add'>+{</div><div class='add'>+	return base + led-&gt;id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 lm3533_led_get_pattern(struct lm3533_led *led)</div><div class='add'>+{</div><div class='add'>+	return led-&gt;id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 lm3533_led_get_pattern_reg(struct lm3533_led *led,</div><div class='add'>+								u8 base)</div><div class='add'>+{</div><div class='add'>+	return base + lm3533_led_get_pattern(led) * LM3533_REG_PATTERN_STEP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lm3533_led_pattern_enable(struct lm3533_led *led, int enable)</div><div class='add'>+{</div><div class='add'>+	u8 mask;</div><div class='add'>+	u8 val;</div><div class='add'>+	int pattern;</div><div class='add'>+	int state;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	dev_dbg(led-&gt;cdev.dev, "%s - %d\n", __func__, enable);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;led-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	state = test_bit(LM3533_LED_FLAG_PATTERN_ENABLE, &amp;led-&gt;flags);</div><div class='add'>+	if ((enable &amp;&amp; state) || (!enable &amp;&amp; !state))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	pattern = lm3533_led_get_pattern(led);</div><div class='add'>+	mask = 1 &lt;&lt; (2 * pattern);</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		val = mask;</div><div class='add'>+	else</div><div class='add'>+		val = 0;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_update(led-&gt;lm3533, LM3533_REG_PATTERN_ENABLE, val, mask);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(led-&gt;cdev.dev, "failed to enable pattern %d (%d)\n",</div><div class='add'>+							pattern, enable);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__change_bit(LM3533_LED_FLAG_PATTERN_ENABLE, &amp;led-&gt;flags);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;led-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lm3533_led_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct lm3533_led *led = container_of(work, struct lm3533_led, work);</div><div class='add'>+</div><div class='add'>+	dev_dbg(led-&gt;cdev.dev, "%s - %u\n", __func__, led-&gt;new_brightness);</div><div class='add'>+</div><div class='add'>+	if (led-&gt;new_brightness == 0)</div><div class='add'>+		lm3533_led_pattern_enable(led, 0);	/* disable blink */</div><div class='add'>+</div><div class='add'>+	lm3533_ctrlbank_set_brightness(&amp;led-&gt;cb, led-&gt;new_brightness);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lm3533_led_set(struct led_classdev *cdev,</div><div class='add'>+						enum led_brightness value)</div><div class='add'>+{</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(cdev);</div><div class='add'>+</div><div class='add'>+	dev_dbg(led-&gt;cdev.dev, "%s - %d\n", __func__, value);</div><div class='add'>+</div><div class='add'>+	led-&gt;new_brightness = value;</div><div class='add'>+	schedule_work(&amp;led-&gt;work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum led_brightness lm3533_led_get(struct led_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(cdev);</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_ctrlbank_get_brightness(&amp;led-&gt;cb, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(led-&gt;cdev.dev, "%s - %u\n", __func__, val);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Pattern generator defines (delays in us). */</div><div class='add'>+#define LM3533_LED_DELAY1_VMIN	0x00</div><div class='add'>+#define LM3533_LED_DELAY2_VMIN	0x3d</div><div class='add'>+#define LM3533_LED_DELAY3_VMIN	0x80</div><div class='add'>+</div><div class='add'>+#define LM3533_LED_DELAY1_VMAX	(LM3533_LED_DELAY2_VMIN - 1)</div><div class='add'>+#define LM3533_LED_DELAY2_VMAX	(LM3533_LED_DELAY3_VMIN - 1)</div><div class='add'>+#define LM3533_LED_DELAY3_VMAX	0xff</div><div class='add'>+</div><div class='add'>+#define LM3533_LED_DELAY1_TMIN	16384U</div><div class='add'>+#define LM3533_LED_DELAY2_TMIN	1130496U</div><div class='add'>+#define LM3533_LED_DELAY3_TMIN	10305536U</div><div class='add'>+</div><div class='add'>+#define LM3533_LED_DELAY1_TMAX	999424U</div><div class='add'>+#define LM3533_LED_DELAY2_TMAX	9781248U</div><div class='add'>+#define LM3533_LED_DELAY3_TMAX	76890112U</div><div class='add'>+</div><div class='add'>+/* t_step = (t_max - t_min) / (v_max - v_min) */</div><div class='add'>+#define LM3533_LED_DELAY1_TSTEP	16384</div><div class='add'>+#define LM3533_LED_DELAY2_TSTEP	131072</div><div class='add'>+#define LM3533_LED_DELAY3_TSTEP	524288</div><div class='add'>+</div><div class='add'>+/* Delay limits for hardware accelerated blinking (in ms). */</div><div class='add'>+#define LM3533_LED_DELAY_ON_MAX \</div><div class='add'>+	((LM3533_LED_DELAY2_TMAX + LM3533_LED_DELAY2_TSTEP / 2) / 1000)</div><div class='add'>+#define LM3533_LED_DELAY_OFF_MAX \</div><div class='add'>+	((LM3533_LED_DELAY3_TMAX + LM3533_LED_DELAY3_TSTEP / 2) / 1000)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Returns linear map of *t from [t_min,t_max] to [v_min,v_max] with a step</div><div class='add'>+ * size of t_step, where</div><div class='add'>+ *</div><div class='add'>+ *	t_step = (t_max - t_min) / (v_max - v_min)</div><div class='add'>+ *</div><div class='add'>+ * and updates *t to reflect the mapped value.</div><div class='add'>+ */</div><div class='add'>+static u8 time_to_val(unsigned *t, unsigned t_min, unsigned t_step,</div><div class='add'>+							u8 v_min, u8 v_max)</div><div class='add'>+{</div><div class='add'>+	unsigned val;</div><div class='add'>+</div><div class='add'>+	val = (*t + t_step / 2 - t_min) / t_step + v_min;</div><div class='add'>+</div><div class='add'>+	*t = t_step * (val - v_min) + t_min;</div><div class='add'>+</div><div class='add'>+	return (u8)val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Returns time code corresponding to *delay (in ms) and updates *delay to</div><div class='add'>+ * reflect actual hardware delay.</div><div class='add'>+ *</div><div class='add'>+ * Hardware supports 256 discrete delay times, divided into three groups with</div><div class='add'>+ * the following ranges and step-sizes:</div><div class='add'>+ *</div><div class='add'>+ *	[   16,   999]	[0x00, 0x3e]	step  16 ms</div><div class='add'>+ *	[ 1130,  9781]	[0x3d, 0x7f]	step 131 ms</div><div class='add'>+ *	[10306, 76890]	[0x80, 0xff]	step 524 ms</div><div class='add'>+ *</div><div class='add'>+ * Note that delay group 3 is only available for delay_off.</div><div class='add'>+ */</div><div class='add'>+static u8 lm3533_led_get_hw_delay(unsigned *delay)</div><div class='add'>+{</div><div class='add'>+	unsigned t;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	t = *delay * 1000;</div><div class='add'>+</div><div class='add'>+	if (t &gt;= (LM3533_LED_DELAY2_TMAX + LM3533_LED_DELAY3_TMIN) / 2) {</div><div class='add'>+		t = clamp(t, LM3533_LED_DELAY3_TMIN, LM3533_LED_DELAY3_TMAX);</div><div class='add'>+		val = time_to_val(&amp;t,	LM3533_LED_DELAY3_TMIN,</div><div class='add'>+					LM3533_LED_DELAY3_TSTEP,</div><div class='add'>+					LM3533_LED_DELAY3_VMIN,</div><div class='add'>+					LM3533_LED_DELAY3_VMAX);</div><div class='add'>+	} else if (t &gt;= (LM3533_LED_DELAY1_TMAX + LM3533_LED_DELAY2_TMIN) / 2) {</div><div class='add'>+		t = clamp(t, LM3533_LED_DELAY2_TMIN, LM3533_LED_DELAY2_TMAX);</div><div class='add'>+		val = time_to_val(&amp;t,	LM3533_LED_DELAY2_TMIN,</div><div class='add'>+					LM3533_LED_DELAY2_TSTEP,</div><div class='add'>+					LM3533_LED_DELAY2_VMIN,</div><div class='add'>+					LM3533_LED_DELAY2_VMAX);</div><div class='add'>+	} else {</div><div class='add'>+		t = clamp(t, LM3533_LED_DELAY1_TMIN, LM3533_LED_DELAY1_TMAX);</div><div class='add'>+		val = time_to_val(&amp;t,	LM3533_LED_DELAY1_TMIN,</div><div class='add'>+					LM3533_LED_DELAY1_TSTEP,</div><div class='add'>+					LM3533_LED_DELAY1_VMIN,</div><div class='add'>+					LM3533_LED_DELAY1_VMAX);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*delay = (t + 500) / 1000;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Set delay register base to *delay (in ms) and update *delay to reflect</div><div class='add'>+ * actual hardware delay used.</div><div class='add'>+ */</div><div class='add'>+static u8 lm3533_led_delay_set(struct lm3533_led *led, u8 base,</div><div class='add'>+							unsigned long *delay)</div><div class='add'>+{</div><div class='add'>+	unsigned t;</div><div class='add'>+	u8 val;</div><div class='add'>+	u8 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	t = (unsigned)*delay;</div><div class='add'>+</div><div class='add'>+	/* Delay group 3 is only available for low time (delay off). */</div><div class='add'>+	if (base != LM3533_REG_PATTERN_LOW_TIME_BASE)</div><div class='add'>+		t = min(t, LM3533_LED_DELAY2_TMAX / 1000);</div><div class='add'>+</div><div class='add'>+	val = lm3533_led_get_hw_delay(&amp;t);</div><div class='add'>+</div><div class='add'>+	dev_dbg(led-&gt;cdev.dev, "%s - %lu: %u (0x%02x)\n", __func__,</div><div class='add'>+							*delay, t, val);</div><div class='add'>+	reg = lm3533_led_get_pattern_reg(led, base);</div><div class='add'>+	ret = lm3533_write(led-&gt;lm3533, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(led-&gt;cdev.dev, "failed to set delay (%02x)\n", reg);</div><div class='add'>+</div><div class='add'>+	*delay = t;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lm3533_led_delay_on_set(struct lm3533_led *led, unsigned long *t)</div><div class='add'>+{</div><div class='add'>+	return lm3533_led_delay_set(led, LM3533_REG_PATTERN_HIGH_TIME_BASE, t);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lm3533_led_delay_off_set(struct lm3533_led *led, unsigned long *t)</div><div class='add'>+{</div><div class='add'>+	return lm3533_led_delay_set(led, LM3533_REG_PATTERN_LOW_TIME_BASE, t);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lm3533_led_blink_set(struct led_classdev *cdev,</div><div class='add'>+				unsigned long *delay_on,</div><div class='add'>+				unsigned long *delay_off)</div><div class='add'>+{</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(cdev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(led-&gt;cdev.dev, "%s - on = %lu, off = %lu\n", __func__,</div><div class='add'>+							*delay_on, *delay_off);</div><div class='add'>+</div><div class='add'>+	if (*delay_on &gt; LM3533_LED_DELAY_ON_MAX ||</div><div class='add'>+					*delay_off &gt; LM3533_LED_DELAY_OFF_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (*delay_on == 0 &amp;&amp; *delay_off == 0) {</div><div class='add'>+		*delay_on = 500;</div><div class='add'>+		*delay_off = 500;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = lm3533_led_delay_on_set(led, delay_on);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_led_delay_off_set(led, delay_off);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return lm3533_led_pattern_enable(led, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t show_id(struct device *dev,</div><div class='add'>+				struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(led_cdev);</div><div class='add'>+</div><div class='add'>+	return scnprintf(buf, PAGE_SIZE, "%d\n", led-&gt;id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Pattern generator rise/fall times:</div><div class='add'>+ *</div><div class='add'>+ *   0 - 2048 us (default)</div><div class='add'>+ *   1 - 262 ms</div><div class='add'>+ *   2 - 524 ms</div><div class='add'>+ *   3 - 1.049 s</div><div class='add'>+ *   4 - 2.097 s</div><div class='add'>+ *   5 - 4.194 s</div><div class='add'>+ *   6 - 8.389 s</div><div class='add'>+ *   7 - 16.78 s</div><div class='add'>+ */</div><div class='add'>+static ssize_t show_risefalltime(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					char *buf, u8 base)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(led_cdev);</div><div class='add'>+	ssize_t ret;</div><div class='add'>+	u8 reg;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	reg = lm3533_led_get_pattern_reg(led, base);</div><div class='add'>+	ret = lm3533_read(led-&gt;lm3533, reg, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return scnprintf(buf, PAGE_SIZE, "%x\n", val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t show_risetime(struct device *dev,</div><div class='add'>+				struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	return show_risefalltime(dev, attr, buf,</div><div class='add'>+					LM3533_REG_PATTERN_RISETIME_BASE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t show_falltime(struct device *dev,</div><div class='add'>+				struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	return show_risefalltime(dev, attr, buf,</div><div class='add'>+					LM3533_REG_PATTERN_FALLTIME_BASE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_risefalltime(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					const char *buf, size_t len, u8 base)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(led_cdev);</div><div class='add'>+	u8 val;</div><div class='add'>+	u8 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (kstrtou8(buf, 0, &amp;val) || val &gt; LM3533_RISEFALLTIME_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	reg = lm3533_led_get_pattern_reg(led, base);</div><div class='add'>+	ret = lm3533_write(led-&gt;lm3533, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_risetime(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					const char *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	return store_risefalltime(dev, attr, buf, len,</div><div class='add'>+					LM3533_REG_PATTERN_RISETIME_BASE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_falltime(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					const char *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	return store_risefalltime(dev, attr, buf, len,</div><div class='add'>+					LM3533_REG_PATTERN_FALLTIME_BASE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t show_als_channel(struct device *dev,</div><div class='add'>+				struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(led_cdev);</div><div class='add'>+	unsigned channel;</div><div class='add'>+	u8 reg;</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	reg = lm3533_led_get_lv_reg(led, LM3533_REG_CTRLBANK_BCONF_BASE);</div><div class='add'>+	ret = lm3533_read(led-&gt;lm3533, reg, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	channel = (val &amp; LM3533_REG_CTRLBANK_BCONF_ALS_CHANNEL_MASK) + 1;</div><div class='add'>+</div><div class='add'>+	return scnprintf(buf, PAGE_SIZE, "%u\n", channel);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_als_channel(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					const char *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(led_cdev);</div><div class='add'>+	unsigned channel;</div><div class='add'>+	u8 reg;</div><div class='add'>+	u8 val;</div><div class='add'>+	u8 mask;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (kstrtouint(buf, 0, &amp;channel))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (channel &lt; LM3533_ALS_CHANNEL_LV_MIN ||</div><div class='add'>+					channel &gt; LM3533_ALS_CHANNEL_LV_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	reg = lm3533_led_get_lv_reg(led, LM3533_REG_CTRLBANK_BCONF_BASE);</div><div class='add'>+	mask = LM3533_REG_CTRLBANK_BCONF_ALS_CHANNEL_MASK;</div><div class='add'>+	val = channel - 1;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_update(led-&gt;lm3533, reg, val, mask);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t show_als_en(struct device *dev,</div><div class='add'>+				struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(led_cdev);</div><div class='add'>+	bool enable;</div><div class='add'>+	u8 reg;</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	reg = lm3533_led_get_lv_reg(led, LM3533_REG_CTRLBANK_BCONF_BASE);</div><div class='add'>+	ret = lm3533_read(led-&gt;lm3533, reg, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	enable = val &amp; LM3533_REG_CTRLBANK_BCONF_ALS_EN_MASK;</div><div class='add'>+</div><div class='add'>+	return scnprintf(buf, PAGE_SIZE, "%d\n", enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_als_en(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					const char *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(led_cdev);</div><div class='add'>+	unsigned enable;</div><div class='add'>+	u8 reg;</div><div class='add'>+	u8 mask;</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (kstrtouint(buf, 0, &amp;enable))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	reg = lm3533_led_get_lv_reg(led, LM3533_REG_CTRLBANK_BCONF_BASE);</div><div class='add'>+	mask = LM3533_REG_CTRLBANK_BCONF_ALS_EN_MASK;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		val = mask;</div><div class='add'>+	else</div><div class='add'>+		val = 0;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_update(led-&gt;lm3533, reg, val, mask);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t show_linear(struct device *dev,</div><div class='add'>+				struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(led_cdev);</div><div class='add'>+	u8 reg;</div><div class='add'>+	u8 val;</div><div class='add'>+	int linear;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	reg = lm3533_led_get_lv_reg(led, LM3533_REG_CTRLBANK_BCONF_BASE);</div><div class='add'>+	ret = lm3533_read(led-&gt;lm3533, reg, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (val &amp; LM3533_REG_CTRLBANK_BCONF_MAPPING_MASK)</div><div class='add'>+		linear = 1;</div><div class='add'>+	else</div><div class='add'>+		linear = 0;</div><div class='add'>+</div><div class='add'>+	return scnprintf(buf, PAGE_SIZE, "%x\n", linear);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_linear(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					const char *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(led_cdev);</div><div class='add'>+	unsigned long linear;</div><div class='add'>+	u8 reg;</div><div class='add'>+	u8 mask;</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (kstrtoul(buf, 0, &amp;linear))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	reg = lm3533_led_get_lv_reg(led, LM3533_REG_CTRLBANK_BCONF_BASE);</div><div class='add'>+	mask = LM3533_REG_CTRLBANK_BCONF_MAPPING_MASK;</div><div class='add'>+</div><div class='add'>+	if (linear)</div><div class='add'>+		val = mask;</div><div class='add'>+	else</div><div class='add'>+		val = 0;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_update(led-&gt;lm3533, reg, val, mask);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t show_pwm(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					char *buf)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(led_cdev);</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_ctrlbank_get_pwm(&amp;led-&gt;cb, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return scnprintf(buf, PAGE_SIZE, "%u\n", val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_pwm(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					const char *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(led_cdev);</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (kstrtou8(buf, 0, &amp;val))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_ctrlbank_set_pwm(&amp;led-&gt;cb, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static LM3533_ATTR_RW(als_channel);</div><div class='add'>+static LM3533_ATTR_RW(als_en);</div><div class='add'>+static LM3533_ATTR_RW(falltime);</div><div class='add'>+static LM3533_ATTR_RO(id);</div><div class='add'>+static LM3533_ATTR_RW(linear);</div><div class='add'>+static LM3533_ATTR_RW(pwm);</div><div class='add'>+static LM3533_ATTR_RW(risetime);</div><div class='add'>+</div><div class='add'>+static struct attribute *lm3533_led_attributes[] = {</div><div class='add'>+	&amp;dev_attr_als_channel.attr,</div><div class='add'>+	&amp;dev_attr_als_en.attr,</div><div class='add'>+	&amp;dev_attr_falltime.attr,</div><div class='add'>+	&amp;dev_attr_id.attr,</div><div class='add'>+	&amp;dev_attr_linear.attr,</div><div class='add'>+	&amp;dev_attr_pwm.attr,</div><div class='add'>+	&amp;dev_attr_risetime.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static umode_t lm3533_led_attr_is_visible(struct kobject *kobj,</div><div class='add'>+					     struct attribute *attr, int n)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = container_of(kobj, struct device, kobj);</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_led *led = to_lm3533_led(led_cdev);</div><div class='add'>+	umode_t mode = attr-&gt;mode;</div><div class='add'>+</div><div class='add'>+	if (attr == &amp;dev_attr_als_channel.attr ||</div><div class='add'>+					attr == &amp;dev_attr_als_en.attr) {</div><div class='add'>+		if (!led-&gt;lm3533-&gt;have_als)</div><div class='add'>+			mode = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mode;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute_group lm3533_led_attribute_group = {</div><div class='add'>+	.is_visible	= lm3533_led_attr_is_visible,</div><div class='add'>+	.attrs		= lm3533_led_attributes</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit lm3533_led_setup(struct lm3533_led *led,</div><div class='add'>+					struct lm3533_led_platform_data *pdata)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_ctrlbank_set_max_current(&amp;led-&gt;cb, pdata-&gt;max_current);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return lm3533_ctrlbank_set_pwm(&amp;led-&gt;cb, pdata-&gt;pwm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit lm3533_led_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct lm3533 *lm3533;</div><div class='add'>+	struct lm3533_led_platform_data *pdata;</div><div class='add'>+	struct lm3533_led *led;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	lm3533 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	if (!lm3533)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	if (!pdata) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "no platform data\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdev-&gt;id &lt; 0 || pdev-&gt;id &gt;= LM3533_LVCTRLBANK_COUNT) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "illegal LED id %d\n", pdev-&gt;id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	led = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*led), GFP_KERNEL);</div><div class='add'>+	if (!led)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	led-&gt;lm3533 = lm3533;</div><div class='add'>+	led-&gt;cdev.name = pdata-&gt;name;</div><div class='add'>+	led-&gt;cdev.default_trigger = pdata-&gt;default_trigger;</div><div class='add'>+	led-&gt;cdev.brightness_set = lm3533_led_set;</div><div class='add'>+	led-&gt;cdev.brightness_get = lm3533_led_get;</div><div class='add'>+	led-&gt;cdev.blink_set = lm3533_led_blink_set;</div><div class='add'>+	led-&gt;cdev.brightness = LED_OFF;</div><div class='add'>+	led-&gt;id = pdev-&gt;id;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;led-&gt;mutex);</div><div class='add'>+	INIT_WORK(&amp;led-&gt;work, lm3533_led_work);</div><div class='add'>+</div><div class='add'>+	/* The class framework makes a callback to get brightness during</div><div class='add'>+	 * registration so use parent device (for error reporting) until</div><div class='add'>+	 * registered.</div><div class='add'>+	 */</div><div class='add'>+	led-&gt;cb.lm3533 = lm3533;</div><div class='add'>+	led-&gt;cb.id = lm3533_led_get_ctrlbank_id(led);</div><div class='add'>+	led-&gt;cb.dev = lm3533-&gt;dev;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, led);</div><div class='add'>+</div><div class='add'>+	ret = led_classdev_register(pdev-&gt;dev.parent, &amp;led-&gt;cdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to register LED %d\n", pdev-&gt;id);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	led-&gt;cb.dev = led-&gt;cdev.dev;</div><div class='add'>+</div><div class='add'>+	ret = sysfs_create_group(&amp;led-&gt;cdev.dev-&gt;kobj,</div><div class='add'>+						&amp;lm3533_led_attribute_group);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to create sysfs attributes\n");</div><div class='add'>+		goto err_unregister;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = lm3533_led_setup(led, pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_sysfs_remove;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_ctrlbank_enable(&amp;led-&gt;cb);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_sysfs_remove;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_sysfs_remove:</div><div class='add'>+	sysfs_remove_group(&amp;led-&gt;cdev.dev-&gt;kobj, &amp;lm3533_led_attribute_group);</div><div class='add'>+err_unregister:</div><div class='add'>+	led_classdev_unregister(&amp;led-&gt;cdev);</div><div class='add'>+	flush_work_sync(&amp;led-&gt;work);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit lm3533_led_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct lm3533_led *led = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	lm3533_ctrlbank_disable(&amp;led-&gt;cb);</div><div class='add'>+	sysfs_remove_group(&amp;led-&gt;cdev.dev-&gt;kobj, &amp;lm3533_led_attribute_group);</div><div class='add'>+	led_classdev_unregister(&amp;led-&gt;cdev);</div><div class='add'>+	flush_work_sync(&amp;led-&gt;work);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lm3533_led_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	struct lm3533_led *led = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	lm3533_ctrlbank_disable(&amp;led-&gt;cb);</div><div class='add'>+	lm3533_led_set(&amp;led-&gt;cdev, LED_OFF);		/* disable blink */</div><div class='add'>+	flush_work_sync(&amp;led-&gt;work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver lm3533_led_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "lm3533-leds",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe		= lm3533_led_probe,</div><div class='add'>+	.remove		= __devexit_p(lm3533_led_remove),</div><div class='add'>+	.shutdown	= lm3533_led_shutdown,</div><div class='add'>+};</div><div class='add'>+module_platform_driver(lm3533_led_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Johan Hovold &lt;jhovold@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("LM3533 LED driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_ALIAS("platform:lm3533-leds");</div><div class='head'>diff --git a/drivers/leds/leds-lp5521.c b/drivers/leds/leds-lp5521.c<br/>index 410a723b8691..23815624f35e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/leds-lp5521.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/leds-lp5521.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/leds-lp5521.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-lp5521.c</a></div><div class='hunk'>@@ -193,9 +193,14 @@ static int lp5521_load_program(struct lp5521_engine *eng, const u8 *pattern)</div><div class='ctx'> </div><div class='ctx'> 	/* move current engine to direct mode and remember the state */</div><div class='ctx'> 	ret = lp5521_set_engine_mode(eng, LP5521_CMD_DIRECT);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	/* Mode change requires min 500 us delay. 1 - 2 ms  with margin */</div><div class='ctx'> 	usleep_range(1000, 2000);</div><div class='del'>-	ret |= lp5521_read(client, LP5521_REG_OP_MODE, &amp;mode);</div><div class='add'>+	ret = lp5521_read(client, LP5521_REG_OP_MODE, &amp;mode);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* For loading, all the engines to load mode */</div><div class='ctx'> 	lp5521_write(client, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);</div><div class='hunk'>@@ -211,8 +216,7 @@ static int lp5521_load_program(struct lp5521_engine *eng, const u8 *pattern)</div><div class='ctx'> 				LP5521_PROG_MEM_SIZE,</div><div class='ctx'> 				pattern);</div><div class='ctx'> </div><div class='del'>-	ret |= lp5521_write(client, LP5521_REG_OP_MODE, mode);</div><div class='del'>-	return ret;</div><div class='add'>+	return lp5521_write(client, LP5521_REG_OP_MODE, mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lp5521_set_led_current(struct lp5521_chip *chip, int led, u8 curr)</div><div class='hunk'>@@ -785,7 +789,7 @@ static int __devinit lp5521_probe(struct i2c_client *client,</div><div class='ctx'> 	 * LP5521_REG_ENABLE register will not have any effect - strange!</div><div class='ctx'> 	 */</div><div class='ctx'> 	ret = lp5521_read(client, LP5521_REG_R_CURRENT, &amp;buf);</div><div class='del'>-	if (buf != LP5521_REG_R_CURR_DEFAULT) {</div><div class='add'>+	if (ret || buf != LP5521_REG_R_CURR_DEFAULT) {</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "error in resetting chip\n");</div><div class='ctx'> 		goto fail2;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/leds/leds-mc13783.c b/drivers/leds/leds-mc13783.c<br/>index 8bc491541550..4cc6a2e3df34 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/leds-mc13783.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/leds-mc13783.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/leds-mc13783.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-mc13783.c</a></div><div class='hunk'>@@ -280,7 +280,7 @@ static int __devinit mc13783_led_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	led = kzalloc(sizeof(*led) * pdata-&gt;num_leds, GFP_KERNEL);</div><div class='add'>+	led = kcalloc(pdata-&gt;num_leds, sizeof(*led), GFP_KERNEL);</div><div class='ctx'> 	if (led == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to alloc memory\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/drivers/leds/leds-netxbig.c b/drivers/leds/leds-netxbig.c<br/>index d8433f2d53bc..73973fdbd8be 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/leds-netxbig.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/leds-netxbig.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/leds-netxbig.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-netxbig.c</a></div><div class='hunk'>@@ -112,7 +112,7 @@ err_free_addr:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __devexit gpio_ext_free(struct netxbig_gpio_ext *gpio_ext)</div><div class='add'>+static void gpio_ext_free(struct netxbig_gpio_ext *gpio_ext)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -294,7 +294,7 @@ static ssize_t netxbig_led_sata_show(struct device *dev,</div><div class='ctx'> </div><div class='ctx'> static DEVICE_ATTR(sata, 0644, netxbig_led_sata_show, netxbig_led_sata_store);</div><div class='ctx'> </div><div class='del'>-static void __devexit delete_netxbig_led(struct netxbig_led_data *led_dat)</div><div class='add'>+static void delete_netxbig_led(struct netxbig_led_data *led_dat)</div><div class='ctx'> {</div><div class='ctx'> 	if (led_dat-&gt;mode_val[NETXBIG_LED_SATA] != NETXBIG_LED_INVALID_MODE)</div><div class='ctx'> 		device_remove_file(led_dat-&gt;cdev.dev, &amp;dev_attr_sata);</div><div class='head'>diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c<br/>index 2f0a14421a73..01cf89ec6944 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/leds-ns2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/leds-ns2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/leds-ns2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-ns2.c</a></div><div class='hunk'>@@ -255,7 +255,7 @@ err_free_cmd:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __devexit delete_ns2_led(struct ns2_led_data *led_dat)</div><div class='add'>+static void delete_ns2_led(struct ns2_led_data *led_dat)</div><div class='ctx'> {</div><div class='ctx'> 	device_remove_file(led_dat-&gt;cdev.dev, &amp;dev_attr_sata);</div><div class='ctx'> 	led_classdev_unregister(&amp;led_dat-&gt;cdev);</div><div class='head'>diff --git a/drivers/leds/leds-pca955x.c b/drivers/leds/leds-pca955x.c<br/>index dcc3bc3d38db..5f462dbf0dbb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/leds-pca955x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/leds-pca955x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/leds-pca955x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/leds-pca955x.c</a></div><div class='hunk'>@@ -101,11 +101,16 @@ static const struct i2c_device_id pca955x_id[] = {</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(i2c, pca955x_id);</div><div class='ctx'> </div><div class='del'>-struct pca955x_led {</div><div class='add'>+struct pca955x {</div><div class='add'>+	struct mutex lock;</div><div class='add'>+	struct pca955x_led *leds;</div><div class='ctx'> 	struct pca955x_chipdef	*chipdef;</div><div class='ctx'> 	struct i2c_client	*client;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pca955x_led {</div><div class='add'>+	struct pca955x	*pca955x;</div><div class='ctx'> 	struct work_struct	work;</div><div class='del'>-	spinlock_t		lock;</div><div class='ctx'> 	enum led_brightness	brightness;</div><div class='ctx'> 	struct led_classdev	led_cdev;</div><div class='ctx'> 	int			led_num;	/* 0 .. 15 potentially */</div><div class='hunk'>@@ -140,7 +145,7 @@ static inline u8 pca955x_ledsel(u8 oldval, int led_num, int state)</div><div class='ctx'>  */</div><div class='ctx'> static void pca955x_write_psc(struct i2c_client *client, int n, u8 val)</div><div class='ctx'> {</div><div class='del'>-	struct pca955x_led *pca955x = i2c_get_clientdata(client);</div><div class='add'>+	struct pca955x *pca955x = i2c_get_clientdata(client);</div><div class='ctx'> </div><div class='ctx'> 	i2c_smbus_write_byte_data(client,</div><div class='ctx'> 		pca95xx_num_input_regs(pca955x-&gt;chipdef-&gt;bits) + 2*n,</div><div class='hunk'>@@ -156,7 +161,7 @@ static void pca955x_write_psc(struct i2c_client *client, int n, u8 val)</div><div class='ctx'>  */</div><div class='ctx'> static void pca955x_write_pwm(struct i2c_client *client, int n, u8 val)</div><div class='ctx'> {</div><div class='del'>-	struct pca955x_led *pca955x = i2c_get_clientdata(client);</div><div class='add'>+	struct pca955x *pca955x = i2c_get_clientdata(client);</div><div class='ctx'> </div><div class='ctx'> 	i2c_smbus_write_byte_data(client,</div><div class='ctx'> 		pca95xx_num_input_regs(pca955x-&gt;chipdef-&gt;bits) + 1 + 2*n,</div><div class='hunk'>@@ -169,7 +174,7 @@ static void pca955x_write_pwm(struct i2c_client *client, int n, u8 val)</div><div class='ctx'>  */</div><div class='ctx'> static void pca955x_write_ls(struct i2c_client *client, int n, u8 val)</div><div class='ctx'> {</div><div class='del'>-	struct pca955x_led *pca955x = i2c_get_clientdata(client);</div><div class='add'>+	struct pca955x *pca955x = i2c_get_clientdata(client);</div><div class='ctx'> </div><div class='ctx'> 	i2c_smbus_write_byte_data(client,</div><div class='ctx'> 		pca95xx_num_input_regs(pca955x-&gt;chipdef-&gt;bits) + 4 + n,</div><div class='hunk'>@@ -182,7 +187,7 @@ static void pca955x_write_ls(struct i2c_client *client, int n, u8 val)</div><div class='ctx'>  */</div><div class='ctx'> static u8 pca955x_read_ls(struct i2c_client *client, int n)</div><div class='ctx'> {</div><div class='del'>-	struct pca955x_led *pca955x = i2c_get_clientdata(client);</div><div class='add'>+	struct pca955x *pca955x = i2c_get_clientdata(client);</div><div class='ctx'> </div><div class='ctx'> 	return (u8) i2c_smbus_read_byte_data(client,</div><div class='ctx'> 		pca95xx_num_input_regs(pca955x-&gt;chipdef-&gt;bits) + 4 + n);</div><div class='hunk'>@@ -190,18 +195,23 @@ static u8 pca955x_read_ls(struct i2c_client *client, int n)</div><div class='ctx'> </div><div class='ctx'> static void pca955x_led_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct pca955x_led *pca955x;</div><div class='add'>+	struct pca955x_led *pca955x_led;</div><div class='add'>+	struct pca955x *pca955x;</div><div class='ctx'> 	u8 ls;</div><div class='ctx'> 	int chip_ls;	/* which LSx to use (0-3 potentially) */</div><div class='ctx'> 	int ls_led;	/* which set of bits within LSx to use (0-3) */</div><div class='ctx'> </div><div class='del'>-	pca955x = container_of(work, struct pca955x_led, work);</div><div class='del'>-	chip_ls = pca955x-&gt;led_num / 4;</div><div class='del'>-	ls_led = pca955x-&gt;led_num % 4;</div><div class='add'>+	pca955x_led = container_of(work, struct pca955x_led, work);</div><div class='add'>+	pca955x = pca955x_led-&gt;pca955x;</div><div class='add'>+</div><div class='add'>+	chip_ls = pca955x_led-&gt;led_num / 4;</div><div class='add'>+	ls_led = pca955x_led-&gt;led_num % 4;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pca955x-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	ls = pca955x_read_ls(pca955x-&gt;client, chip_ls);</div><div class='ctx'> </div><div class='del'>-	switch (pca955x-&gt;brightness) {</div><div class='add'>+	switch (pca955x_led-&gt;brightness) {</div><div class='ctx'> 	case LED_FULL:</div><div class='ctx'> 		ls = pca955x_ledsel(ls, ls_led, PCA955X_LS_LED_ON);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -219,12 +229,15 @@ static void pca955x_led_work(struct work_struct *work)</div><div class='ctx'> 		 * OFF, HALF, or FULL.  But, this is probably better than</div><div class='ctx'> 		 * just turning off for all other values.</div><div class='ctx'> 		 */</div><div class='del'>-		pca955x_write_pwm(pca955x-&gt;client, 1, 255-pca955x-&gt;brightness);</div><div class='add'>+		pca955x_write_pwm(pca955x-&gt;client, 1,</div><div class='add'>+				255 - pca955x_led-&gt;brightness);</div><div class='ctx'> 		ls = pca955x_ledsel(ls, ls_led, PCA955X_LS_BLINK1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pca955x_write_ls(pca955x-&gt;client, chip_ls, ls);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;pca955x-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pca955x_led_set(struct led_classdev *led_cdev, enum led_brightness value)</div><div class='hunk'>@@ -233,7 +246,6 @@ static void pca955x_led_set(struct led_classdev *led_cdev, enum led_brightness v</div><div class='ctx'> </div><div class='ctx'> 	pca955x = container_of(led_cdev, struct pca955x_led, led_cdev);</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;pca955x-&gt;lock);</div><div class='ctx'> 	pca955x-&gt;brightness = value;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -241,14 +253,13 @@ static void pca955x_led_set(struct led_classdev *led_cdev, enum led_brightness v</div><div class='ctx'> 	 * can sleep.</div><div class='ctx'> 	 */</div><div class='ctx'> 	schedule_work(&amp;pca955x-&gt;work);</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;pca955x-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devinit pca955x_probe(struct i2c_client *client,</div><div class='ctx'> 					const struct i2c_device_id *id)</div><div class='ctx'> {</div><div class='del'>-	struct pca955x_led *pca955x;</div><div class='add'>+	struct pca955x *pca955x;</div><div class='add'>+	struct pca955x_led *pca955x_led;</div><div class='ctx'> 	struct pca955x_chipdef *chip;</div><div class='ctx'> 	struct i2c_adapter *adapter;</div><div class='ctx'> 	struct led_platform_data *pdata;</div><div class='hunk'>@@ -282,39 +293,48 @@ static int __devinit pca955x_probe(struct i2c_client *client,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pca955x = kzalloc(sizeof(*pca955x) * chip-&gt;bits, GFP_KERNEL);</div><div class='add'>+	pca955x = kzalloc(sizeof(*pca955x), GFP_KERNEL);</div><div class='ctx'> 	if (!pca955x)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	pca955x-&gt;leds = kzalloc(sizeof(*pca955x_led) * chip-&gt;bits, GFP_KERNEL);</div><div class='add'>+	if (!pca955x-&gt;leds) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto exit_nomem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	i2c_set_clientdata(client, pca955x);</div><div class='ctx'> </div><div class='add'>+	mutex_init(&amp;pca955x-&gt;lock);</div><div class='add'>+	pca955x-&gt;client = client;</div><div class='add'>+	pca955x-&gt;chipdef = chip;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; chip-&gt;bits; i++) {</div><div class='del'>-		pca955x[i].chipdef = chip;</div><div class='del'>-		pca955x[i].client = client;</div><div class='del'>-		pca955x[i].led_num = i;</div><div class='add'>+		pca955x_led = &amp;pca955x-&gt;leds[i];</div><div class='add'>+		pca955x_led-&gt;led_num = i;</div><div class='add'>+		pca955x_led-&gt;pca955x = pca955x;</div><div class='ctx'> </div><div class='ctx'> 		/* Platform data can specify LED names and default triggers */</div><div class='ctx'> 		if (pdata) {</div><div class='ctx'> 			if (pdata-&gt;leds[i].name)</div><div class='del'>-				snprintf(pca955x[i].name,</div><div class='del'>-					 sizeof(pca955x[i].name), "pca955x:%s",</div><div class='del'>-					 pdata-&gt;leds[i].name);</div><div class='add'>+				snprintf(pca955x_led-&gt;name,</div><div class='add'>+					sizeof(pca955x_led-&gt;name), "pca955x:%s",</div><div class='add'>+					pdata-&gt;leds[i].name);</div><div class='ctx'> 			if (pdata-&gt;leds[i].default_trigger)</div><div class='del'>-				pca955x[i].led_cdev.default_trigger =</div><div class='add'>+				pca955x_led-&gt;led_cdev.default_trigger =</div><div class='ctx'> 					pdata-&gt;leds[i].default_trigger;</div><div class='ctx'> 		} else {</div><div class='del'>-			snprintf(pca955x[i].name, sizeof(pca955x[i].name),</div><div class='add'>+			snprintf(pca955x_led-&gt;name, sizeof(pca955x_led-&gt;name),</div><div class='ctx'> 				 "pca955x:%d", i);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		spin_lock_init(&amp;pca955x[i].lock);</div><div class='del'>-</div><div class='del'>-		pca955x[i].led_cdev.name = pca955x[i].name;</div><div class='del'>-		pca955x[i].led_cdev.brightness_set = pca955x_led_set;</div><div class='add'>+		pca955x_led-&gt;led_cdev.name = pca955x_led-&gt;name;</div><div class='add'>+		pca955x_led-&gt;led_cdev.brightness_set = pca955x_led_set;</div><div class='ctx'> </div><div class='del'>-		INIT_WORK(&amp;pca955x[i].work, pca955x_led_work);</div><div class='add'>+		INIT_WORK(&amp;pca955x_led-&gt;work, pca955x_led_work);</div><div class='ctx'> </div><div class='del'>-		err = led_classdev_register(&amp;client-&gt;dev, &amp;pca955x[i].led_cdev);</div><div class='add'>+		err = led_classdev_register(&amp;client-&gt;dev,</div><div class='add'>+					&amp;pca955x_led-&gt;led_cdev);</div><div class='ctx'> 		if (err &lt; 0)</div><div class='ctx'> 			goto exit;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -337,10 +357,12 @@ static int __devinit pca955x_probe(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> exit:</div><div class='ctx'> 	while (i--) {</div><div class='del'>-		led_classdev_unregister(&amp;pca955x[i].led_cdev);</div><div class='del'>-		cancel_work_sync(&amp;pca955x[i].work);</div><div class='add'>+		led_classdev_unregister(&amp;pca955x-&gt;leds[i].led_cdev);</div><div class='add'>+		cancel_work_sync(&amp;pca955x-&gt;leds[i].work);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	kfree(pca955x-&gt;leds);</div><div class='add'>+exit_nomem:</div><div class='ctx'> 	kfree(pca955x);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -348,14 +370,15 @@ exit:</div><div class='ctx'> </div><div class='ctx'> static int __devexit pca955x_remove(struct i2c_client *client)</div><div class='ctx'> {</div><div class='del'>-	struct pca955x_led *pca955x = i2c_get_clientdata(client);</div><div class='add'>+	struct pca955x *pca955x = i2c_get_clientdata(client);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; pca955x-&gt;chipdef-&gt;bits; i++) {</div><div class='del'>-		led_classdev_unregister(&amp;pca955x[i].led_cdev);</div><div class='del'>-		cancel_work_sync(&amp;pca955x[i].work);</div><div class='add'>+		led_classdev_unregister(&amp;pca955x-&gt;leds[i].led_cdev);</div><div class='add'>+		cancel_work_sync(&amp;pca955x-&gt;leds[i].work);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	kfree(pca955x-&gt;leds);</div><div class='ctx'> 	kfree(pca955x);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/leds/ledtrig-backlight.c b/drivers/leds/ledtrig-backlight.c<br/>index 2b513a2ad7de..e2726867c5d4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/ledtrig-backlight.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/ledtrig-backlight.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/ledtrig-backlight.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/ledtrig-backlight.c</a></div><div class='hunk'>@@ -120,6 +120,7 @@ static void bl_trig_activate(struct led_classdev *led)</div><div class='ctx'> 	ret = fb_register_client(&amp;n-&gt;notifier);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		dev_err(led-&gt;dev, "unable to register backlight trigger\n");</div><div class='add'>+	led-&gt;activated = true;</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='hunk'>@@ -133,10 +134,11 @@ static void bl_trig_deactivate(struct led_classdev *led)</div><div class='ctx'> 	struct bl_trig_notifier *n =</div><div class='ctx'> 		(struct bl_trig_notifier *) led-&gt;trigger_data;</div><div class='ctx'> </div><div class='del'>-	if (n) {</div><div class='add'>+	if (led-&gt;activated) {</div><div class='ctx'> 		device_remove_file(led-&gt;dev, &amp;dev_attr_inverted);</div><div class='ctx'> 		fb_unregister_client(&amp;n-&gt;notifier);</div><div class='ctx'> 		kfree(n);</div><div class='add'>+		led-&gt;activated = false;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/leds/ledtrig-gpio.c b/drivers/leds/ledtrig-gpio.c<br/>index ecc4bf3f37a9..f057c101b896 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/ledtrig-gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/ledtrig-gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/ledtrig-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/ledtrig-gpio.c</a></div><div class='hunk'>@@ -200,6 +200,7 @@ static void gpio_trig_activate(struct led_classdev *led)</div><div class='ctx'> 	gpio_data-&gt;led = led;</div><div class='ctx'> 	led-&gt;trigger_data = gpio_data;</div><div class='ctx'> 	INIT_WORK(&amp;gpio_data-&gt;work, gpio_trig_work);</div><div class='add'>+	led-&gt;activated = true;</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='hunk'>@@ -217,7 +218,7 @@ static void gpio_trig_deactivate(struct led_classdev *led)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpio_trig_data *gpio_data = led-&gt;trigger_data;</div><div class='ctx'> </div><div class='del'>-	if (gpio_data) {</div><div class='add'>+	if (led-&gt;activated) {</div><div class='ctx'> 		device_remove_file(led-&gt;dev, &amp;dev_attr_gpio);</div><div class='ctx'> 		device_remove_file(led-&gt;dev, &amp;dev_attr_inverted);</div><div class='ctx'> 		device_remove_file(led-&gt;dev, &amp;dev_attr_desired_brightness);</div><div class='hunk'>@@ -225,6 +226,7 @@ static void gpio_trig_deactivate(struct led_classdev *led)</div><div class='ctx'> 		if (gpio_data-&gt;gpio != 0)</div><div class='ctx'> 			free_irq(gpio_to_irq(gpio_data-&gt;gpio), led);</div><div class='ctx'> 		kfree(gpio_data);</div><div class='add'>+		led-&gt;activated = false;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/leds/ledtrig-heartbeat.c b/drivers/leds/ledtrig-heartbeat.c<br/>index 759c0bba4a8f..41dc76db4311 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/ledtrig-heartbeat.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/ledtrig-heartbeat.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/ledtrig-heartbeat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/ledtrig-heartbeat.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/timer.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/leds.h&gt;</div><div class='add'>+#include &lt;linux/reboot.h&gt;</div><div class='ctx'> #include "leds.h"</div><div class='ctx'> </div><div class='ctx'> struct heartbeat_trig_data {</div><div class='hunk'>@@ -83,15 +84,17 @@ static void heartbeat_trig_activate(struct led_classdev *led_cdev)</div><div class='ctx'> 		    led_heartbeat_function, (unsigned long) led_cdev);</div><div class='ctx'> 	heartbeat_data-&gt;phase = 0;</div><div class='ctx'> 	led_heartbeat_function(heartbeat_data-&gt;timer.data);</div><div class='add'>+	led_cdev-&gt;activated = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void heartbeat_trig_deactivate(struct led_classdev *led_cdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct heartbeat_trig_data *heartbeat_data = led_cdev-&gt;trigger_data;</div><div class='ctx'> </div><div class='del'>-	if (heartbeat_data) {</div><div class='add'>+	if (led_cdev-&gt;activated) {</div><div class='ctx'> 		del_timer_sync(&amp;heartbeat_data-&gt;timer);</div><div class='ctx'> 		kfree(heartbeat_data);</div><div class='add'>+		led_cdev-&gt;activated = false;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -101,13 +104,38 @@ static struct led_trigger heartbeat_led_trigger = {</div><div class='ctx'> 	.deactivate = heartbeat_trig_deactivate,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int heartbeat_reboot_notifier(struct notifier_block *nb,</div><div class='add'>+				     unsigned long code, void *unused)</div><div class='add'>+{</div><div class='add'>+	led_trigger_unregister(&amp;heartbeat_led_trigger);</div><div class='add'>+	return NOTIFY_DONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block heartbeat_reboot_nb = {</div><div class='add'>+	.notifier_call = heartbeat_reboot_notifier,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct notifier_block heartbeat_panic_nb = {</div><div class='add'>+	.notifier_call = heartbeat_reboot_notifier,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int __init heartbeat_trig_init(void)</div><div class='ctx'> {</div><div class='del'>-	return led_trigger_register(&amp;heartbeat_led_trigger);</div><div class='add'>+	int rc = led_trigger_register(&amp;heartbeat_led_trigger);</div><div class='add'>+</div><div class='add'>+	if (!rc) {</div><div class='add'>+		atomic_notifier_chain_register(&amp;panic_notifier_list,</div><div class='add'>+					       &amp;heartbeat_panic_nb);</div><div class='add'>+		register_reboot_notifier(&amp;heartbeat_reboot_nb);</div><div class='add'>+	}</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit heartbeat_trig_exit(void)</div><div class='ctx'> {</div><div class='add'>+	unregister_reboot_notifier(&amp;heartbeat_reboot_nb);</div><div class='add'>+	atomic_notifier_chain_unregister(&amp;panic_notifier_list,</div><div class='add'>+					 &amp;heartbeat_panic_nb);</div><div class='ctx'> 	led_trigger_unregister(&amp;heartbeat_led_trigger);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/leds/ledtrig-timer.c b/drivers/leds/ledtrig-timer.c<br/>index 328c64c0841c..9010f7abaf2c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/leds/ledtrig-timer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/leds/ledtrig-timer.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/leds/ledtrig-timer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/ledtrig-timer.c</a></div><div class='hunk'>@@ -31,21 +31,17 @@ static ssize_t led_delay_on_store(struct device *dev,</div><div class='ctx'> 		struct device_attribute *attr, const char *buf, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='del'>-	int ret = -EINVAL;</div><div class='del'>-	char *after;</div><div class='del'>-	unsigned long state = simple_strtoul(buf, &amp;after, 10);</div><div class='del'>-	size_t count = after - buf;</div><div class='del'>-</div><div class='del'>-	if (isspace(*after))</div><div class='del'>-		count++;</div><div class='del'>-</div><div class='del'>-	if (count == size) {</div><div class='del'>-		led_blink_set(led_cdev, &amp;state, &amp;led_cdev-&gt;blink_delay_off);</div><div class='del'>-		led_cdev-&gt;blink_delay_on = state;</div><div class='del'>-		ret = count;</div><div class='del'>-	}</div><div class='add'>+	unsigned long state;</div><div class='add'>+	ssize_t ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = kstrtoul(buf, 10, &amp;state);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	led_blink_set(led_cdev, &amp;state, &amp;led_cdev-&gt;blink_delay_off);</div><div class='add'>+	led_cdev-&gt;blink_delay_on = state;</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t led_delay_off_show(struct device *dev,</div><div class='hunk'>@@ -60,21 +56,17 @@ static ssize_t led_delay_off_store(struct device *dev,</div><div class='ctx'> 		struct device_attribute *attr, const char *buf, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='del'>-	int ret = -EINVAL;</div><div class='del'>-	char *after;</div><div class='del'>-	unsigned long state = simple_strtoul(buf, &amp;after, 10);</div><div class='del'>-	size_t count = after - buf;</div><div class='del'>-</div><div class='del'>-	if (isspace(*after))</div><div class='del'>-		count++;</div><div class='del'>-</div><div class='del'>-	if (count == size) {</div><div class='del'>-		led_blink_set(led_cdev, &amp;led_cdev-&gt;blink_delay_on, &amp;state);</div><div class='del'>-		led_cdev-&gt;blink_delay_off = state;</div><div class='del'>-		ret = count;</div><div class='del'>-	}</div><div class='add'>+	unsigned long state;</div><div class='add'>+	ssize_t ret = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	ret = kstrtoul(buf, 10, &amp;state);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	led_blink_set(led_cdev, &amp;led_cdev-&gt;blink_delay_on, &amp;state);</div><div class='add'>+	led_cdev-&gt;blink_delay_off = state;</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static DEVICE_ATTR(delay_on, 0644, led_delay_on_show, led_delay_on_store);</div><div class='hunk'>@@ -95,8 +87,7 @@ static void timer_trig_activate(struct led_classdev *led_cdev)</div><div class='ctx'> </div><div class='ctx'> 	led_blink_set(led_cdev, &amp;led_cdev-&gt;blink_delay_on,</div><div class='ctx'> 		      &amp;led_cdev-&gt;blink_delay_off);</div><div class='del'>-</div><div class='del'>-	led_cdev-&gt;trigger_data = (void *)1;</div><div class='add'>+	led_cdev-&gt;activated = true;</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='hunk'>@@ -106,9 +97,10 @@ err_out_delayon:</div><div class='ctx'> </div><div class='ctx'> static void timer_trig_deactivate(struct led_classdev *led_cdev)</div><div class='ctx'> {</div><div class='del'>-	if (led_cdev-&gt;trigger_data) {</div><div class='add'>+	if (led_cdev-&gt;activated) {</div><div class='ctx'> 		device_remove_file(led_cdev-&gt;dev, &amp;dev_attr_delay_on);</div><div class='ctx'> 		device_remove_file(led_cdev-&gt;dev, &amp;dev_attr_delay_off);</div><div class='add'>+		led_cdev-&gt;activated = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Stop blinking */</div><div class='head'>diff --git a/drivers/leds/ledtrig-transient.c b/drivers/leds/ledtrig-transient.c<br/>new file mode 100644<br/>index 000000000000..83179f435e1e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/leds/ledtrig-transient.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/leds/ledtrig-transient.c</a></div><div class='hunk'>@@ -0,0 +1,237 @@</div><div class='add'>+/*</div><div class='add'>+ * LED Kernel Transient Trigger</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Shuah Khan &lt;shuahkhan@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Based on Richard Purdie's ledtrig-timer.c and Atsushi Nemoto's</div><div class='add'>+ * ledtrig-heartbeat.c</div><div class='add'>+ * Design and use-case input from Jonas Bonn &lt;jonas@southpole.se&gt; and</div><div class='add'>+ * Neil Brown &lt;neilb@suse.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * Transient trigger allows one shot timer activation. Please refer to</div><div class='add'>+ * Documentation/leds/ledtrig-transient.txt for details</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/timer.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='add'>+#include "leds.h"</div><div class='add'>+</div><div class='add'>+struct transient_trig_data {</div><div class='add'>+	int activate;</div><div class='add'>+	int state;</div><div class='add'>+	int restore_state;</div><div class='add'>+	unsigned long duration;</div><div class='add'>+	struct timer_list timer;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void transient_timer_function(unsigned long data)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = (struct led_classdev *) data;</div><div class='add'>+	struct transient_trig_data *transient_data = led_cdev-&gt;trigger_data;</div><div class='add'>+</div><div class='add'>+	transient_data-&gt;activate = 0;</div><div class='add'>+	led_set_brightness(led_cdev, transient_data-&gt;restore_state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t transient_activate_show(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct transient_trig_data *transient_data = led_cdev-&gt;trigger_data;</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%d\n", transient_data-&gt;activate);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t transient_activate_store(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, const char *buf, size_t size)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct transient_trig_data *transient_data = led_cdev-&gt;trigger_data;</div><div class='add'>+	unsigned long state;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtoul(buf, 10, &amp;state);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (state != 1 &amp;&amp; state != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* cancel the running timer */</div><div class='add'>+	if (state == 0 &amp;&amp; transient_data-&gt;activate == 1) {</div><div class='add'>+		del_timer(&amp;transient_data-&gt;timer);</div><div class='add'>+		transient_data-&gt;activate = state;</div><div class='add'>+		led_set_brightness(led_cdev, transient_data-&gt;restore_state);</div><div class='add'>+		return size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* start timer if there is no active timer */</div><div class='add'>+	if (state == 1 &amp;&amp; transient_data-&gt;activate == 0 &amp;&amp;</div><div class='add'>+	    transient_data-&gt;duration != 0) {</div><div class='add'>+		transient_data-&gt;activate = state;</div><div class='add'>+		led_set_brightness(led_cdev, transient_data-&gt;state);</div><div class='add'>+		transient_data-&gt;restore_state =</div><div class='add'>+		    (transient_data-&gt;state == LED_FULL) ? LED_OFF : LED_FULL;</div><div class='add'>+		mod_timer(&amp;transient_data-&gt;timer,</div><div class='add'>+			  jiffies + transient_data-&gt;duration);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* state == 0 &amp;&amp; transient_data-&gt;activate == 0</div><div class='add'>+		timer is not active - just return */</div><div class='add'>+	/* state == 1 &amp;&amp; transient_data-&gt;activate == 1</div><div class='add'>+		timer is already active - just return */</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t transient_duration_show(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct transient_trig_data *transient_data = led_cdev-&gt;trigger_data;</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%lu\n", transient_data-&gt;duration);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t transient_duration_store(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, const char *buf, size_t size)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct transient_trig_data *transient_data = led_cdev-&gt;trigger_data;</div><div class='add'>+	unsigned long state;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtoul(buf, 10, &amp;state);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	transient_data-&gt;duration = state;</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t transient_state_show(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct transient_trig_data *transient_data = led_cdev-&gt;trigger_data;</div><div class='add'>+	int state;</div><div class='add'>+</div><div class='add'>+	state = (transient_data-&gt;state == LED_FULL) ? 1 : 0;</div><div class='add'>+	return sprintf(buf, "%d\n", state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t transient_state_store(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, const char *buf, size_t size)</div><div class='add'>+{</div><div class='add'>+	struct led_classdev *led_cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct transient_trig_data *transient_data = led_cdev-&gt;trigger_data;</div><div class='add'>+	unsigned long state;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtoul(buf, 10, &amp;state);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (state != 1 &amp;&amp; state != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	transient_data-&gt;state = (state == 1) ? LED_FULL : LED_OFF;</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEVICE_ATTR(activate, 0644, transient_activate_show,</div><div class='add'>+		   transient_activate_store);</div><div class='add'>+static DEVICE_ATTR(duration, 0644, transient_duration_show,</div><div class='add'>+		   transient_duration_store);</div><div class='add'>+static DEVICE_ATTR(state, 0644, transient_state_show, transient_state_store);</div><div class='add'>+</div><div class='add'>+static void transient_trig_activate(struct led_classdev *led_cdev)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+	struct transient_trig_data *tdata;</div><div class='add'>+</div><div class='add'>+	tdata = kzalloc(sizeof(struct transient_trig_data), GFP_KERNEL);</div><div class='add'>+	if (!tdata) {</div><div class='add'>+		dev_err(led_cdev-&gt;dev,</div><div class='add'>+			"unable to allocate transient trigger\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	led_cdev-&gt;trigger_data = tdata;</div><div class='add'>+</div><div class='add'>+	rc = device_create_file(led_cdev-&gt;dev, &amp;dev_attr_activate);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	rc = device_create_file(led_cdev-&gt;dev, &amp;dev_attr_duration);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_out_duration;</div><div class='add'>+</div><div class='add'>+	rc = device_create_file(led_cdev-&gt;dev, &amp;dev_attr_state);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_out_state;</div><div class='add'>+</div><div class='add'>+	setup_timer(&amp;tdata-&gt;timer, transient_timer_function,</div><div class='add'>+		    (unsigned long) led_cdev);</div><div class='add'>+	led_cdev-&gt;activated = true;</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err_out_state:</div><div class='add'>+	device_remove_file(led_cdev-&gt;dev, &amp;dev_attr_duration);</div><div class='add'>+err_out_duration:</div><div class='add'>+	device_remove_file(led_cdev-&gt;dev, &amp;dev_attr_activate);</div><div class='add'>+err_out:</div><div class='add'>+	dev_err(led_cdev-&gt;dev, "unable to register transient trigger\n");</div><div class='add'>+	led_cdev-&gt;trigger_data = NULL;</div><div class='add'>+	kfree(tdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void transient_trig_deactivate(struct led_classdev *led_cdev)</div><div class='add'>+{</div><div class='add'>+	struct transient_trig_data *transient_data = led_cdev-&gt;trigger_data;</div><div class='add'>+</div><div class='add'>+	if (led_cdev-&gt;activated) {</div><div class='add'>+		del_timer_sync(&amp;transient_data-&gt;timer);</div><div class='add'>+		led_set_brightness(led_cdev, transient_data-&gt;restore_state);</div><div class='add'>+		device_remove_file(led_cdev-&gt;dev, &amp;dev_attr_activate);</div><div class='add'>+		device_remove_file(led_cdev-&gt;dev, &amp;dev_attr_duration);</div><div class='add'>+		device_remove_file(led_cdev-&gt;dev, &amp;dev_attr_state);</div><div class='add'>+		led_cdev-&gt;trigger_data = NULL;</div><div class='add'>+		led_cdev-&gt;activated = false;</div><div class='add'>+		kfree(transient_data);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct led_trigger transient_trigger = {</div><div class='add'>+	.name     = "transient",</div><div class='add'>+	.activate = transient_trig_activate,</div><div class='add'>+	.deactivate = transient_trig_deactivate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init transient_trig_init(void)</div><div class='add'>+{</div><div class='add'>+	return led_trigger_register(&amp;transient_trigger);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit transient_trig_exit(void)</div><div class='add'>+{</div><div class='add'>+	led_trigger_unregister(&amp;transient_trigger);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(transient_trig_init);</div><div class='add'>+module_exit(transient_trig_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Shuah Khan &lt;shuahkhan@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Transient LED trigger");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/macintosh/Kconfig b/drivers/macintosh/Kconfig<br/>index fa51af11c6f1..a555da64224e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/Kconfig</a></div><div class='hunk'>@@ -204,11 +204,14 @@ config THERM_ADT746X</div><div class='ctx'> 	  better fan behaviour by default, and some manual control.</div><div class='ctx'> </div><div class='ctx'> config THERM_PM72</div><div class='del'>-	tristate "Support for thermal management on PowerMac G5"</div><div class='add'>+	tristate "Support for thermal management on PowerMac G5 (AGP)"</div><div class='ctx'> 	depends on I2C &amp;&amp; I2C_POWERMAC &amp;&amp; PPC_PMAC64</div><div class='add'>+	default n</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver provides thermostat and fan control for the desktop</div><div class='del'>-	  G5 machines. </div><div class='add'>+	  G5 machines.</div><div class='add'>+</div><div class='add'>+	  This is deprecated, use windfarm instead.</div><div class='ctx'> </div><div class='ctx'> config WINDFARM</div><div class='ctx'> 	tristate "New PowerMac thermal control infrastructure"</div><div class='hunk'>@@ -221,6 +224,22 @@ config WINDFARM_PM81</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver provides thermal control for the iMacG5</div><div class='ctx'> </div><div class='add'>+config WINDFARM_PM72</div><div class='add'>+	tristate "Support for thermal management on PowerMac G5 (AGP)"</div><div class='add'>+	depends on WINDFARM &amp;&amp; I2C &amp;&amp; CPU_FREQ_PMAC64 &amp;&amp; ADB_PMU</div><div class='add'>+	select I2C_POWERMAC</div><div class='add'>+	help</div><div class='add'>+	  This driver provides thermal control for the PowerMac G5</div><div class='add'>+	  "AGP" variants (PowerMac 7,2 and 7,3)</div><div class='add'>+</div><div class='add'>+config WINDFARM_RM31</div><div class='add'>+	tristate "Support for thermal management on Xserve G5"</div><div class='add'>+	depends on WINDFARM &amp;&amp; I2C &amp;&amp; CPU_FREQ_PMAC64 &amp;&amp; ADB_PMU</div><div class='add'>+	select I2C_POWERMAC</div><div class='add'>+	help</div><div class='add'>+	  This driver provides thermal control for the Xserve G5</div><div class='add'>+	  (RackMac3,1)</div><div class='add'>+</div><div class='ctx'> config WINDFARM_PM91</div><div class='ctx'> 	tristate "Support for thermal management on PowerMac9,1"</div><div class='ctx'> 	depends on WINDFARM &amp;&amp; I2C &amp;&amp; CPU_FREQ_PMAC64 &amp;&amp; PMAC_SMU</div><div class='head'>diff --git a/drivers/macintosh/Makefile b/drivers/macintosh/Makefile<br/>index 6652a6ebb6fa..6753b65f8ede 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/Makefile</a></div><div class='hunk'>@@ -29,6 +29,20 @@ obj-$(CONFIG_THERM_PM72)	+= therm_pm72.o</div><div class='ctx'> obj-$(CONFIG_THERM_WINDTUNNEL)	+= therm_windtunnel.o</div><div class='ctx'> obj-$(CONFIG_THERM_ADT746X)	+= therm_adt746x.o</div><div class='ctx'> obj-$(CONFIG_WINDFARM)	        += windfarm_core.o</div><div class='add'>+obj-$(CONFIG_WINDFARM_PM72)     += windfarm_fcu_controls.o \</div><div class='add'>+				   windfarm_ad7417_sensor.o \</div><div class='add'>+				   windfarm_lm75_sensor.o \</div><div class='add'>+				   windfarm_max6690_sensor.o \</div><div class='add'>+				   windfarm_pid.o \</div><div class='add'>+				   windfarm_cpufreq_clamp.o \</div><div class='add'>+				   windfarm_pm72.o</div><div class='add'>+obj-$(CONFIG_WINDFARM_RM31)     += windfarm_fcu_controls.o \</div><div class='add'>+				   windfarm_ad7417_sensor.o \</div><div class='add'>+				   windfarm_lm75_sensor.o \</div><div class='add'>+				   windfarm_lm87_sensor.o \</div><div class='add'>+				   windfarm_pid.o \</div><div class='add'>+				   windfarm_cpufreq_clamp.o \</div><div class='add'>+				   windfarm_rm31.o</div><div class='ctx'> obj-$(CONFIG_WINDFARM_PM81)     += windfarm_smu_controls.o \</div><div class='ctx'> 				   windfarm_smu_sensors.o \</div><div class='ctx'> 				   windfarm_lm75_sensor.o windfarm_pid.o \</div><div class='head'>diff --git a/drivers/macintosh/ams/ams-i2c.c b/drivers/macintosh/ams/ams-i2c.c<br/>index abeecd27b484..978eda8d6678 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/ams/ams-i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/ams/ams-i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/ams/ams-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/ams/ams-i2c.c</a></div><div class='hunk'>@@ -65,7 +65,7 @@ static int ams_i2c_probe(struct i2c_client *client,</div><div class='ctx'> static int ams_i2c_remove(struct i2c_client *client);</div><div class='ctx'> </div><div class='ctx'> static const struct i2c_device_id ams_id[] = {</div><div class='del'>-	{ "ams", 0 },</div><div class='add'>+	{ "MAC,accelerometer_1", 0 },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(i2c, ams_id);</div><div class='head'>diff --git a/drivers/macintosh/therm_adt746x.c b/drivers/macintosh/therm_adt746x.c<br/>index fc71723cbc48..f433521a6f9d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/therm_adt746x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/therm_adt746x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/therm_adt746x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/therm_adt746x.c</a></div><div class='hunk'>@@ -47,7 +47,7 @@ static u8 FAN_SPD_SET[2] = {0x30, 0x31};</div><div class='ctx'> </div><div class='ctx'> static u8 default_limits_local[3] = {70, 50, 70};    /* local, sensor1, sensor2 */</div><div class='ctx'> static u8 default_limits_chip[3] = {80, 65, 80};    /* local, sensor1, sensor2 */</div><div class='del'>-static const char *sensor_location[3];</div><div class='add'>+static const char *sensor_location[3] = { "?", "?", "?" };</div><div class='ctx'> </div><div class='ctx'> static int limit_adjust;</div><div class='ctx'> static int fan_speed = -1;</div><div class='hunk'>@@ -79,18 +79,16 @@ struct thermostat {</div><div class='ctx'> 	int			last_speed[2];</div><div class='ctx'> 	int			last_var[2];</div><div class='ctx'> 	int			pwm_inv[2];</div><div class='add'>+	struct task_struct	*thread;</div><div class='add'>+	struct platform_device	*pdev;</div><div class='add'>+	enum {</div><div class='add'>+		ADT7460,</div><div class='add'>+		ADT7467</div><div class='add'>+	}			type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static enum {ADT7460, ADT7467} therm_type;</div><div class='del'>-static int therm_bus, therm_address;</div><div class='del'>-static struct platform_device * of_dev;</div><div class='del'>-static struct thermostat* thermostat;</div><div class='del'>-static struct task_struct *thread_therm = NULL;</div><div class='del'>-</div><div class='ctx'> static void write_both_fan_speed(struct thermostat *th, int speed);</div><div class='ctx'> static void write_fan_speed(struct thermostat *th, int speed, int fan);</div><div class='del'>-static void thermostat_create_files(void);</div><div class='del'>-static void thermostat_remove_files(void);</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> write_reg(struct thermostat* th, int reg, u8 data)</div><div class='hunk'>@@ -126,66 +124,6 @@ read_reg(struct thermostat* th, int reg)</div><div class='ctx'> 	return data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct i2c_driver thermostat_driver;</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-attach_thermostat(struct i2c_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	unsigned long bus_no;</div><div class='del'>-	struct i2c_board_info info;</div><div class='del'>-	struct i2c_client *client;</div><div class='del'>-</div><div class='del'>-	if (strncmp(adapter-&gt;name, "uni-n", 5))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	bus_no = simple_strtoul(adapter-&gt;name + 6, NULL, 10);</div><div class='del'>-	if (bus_no != therm_bus)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	memset(&amp;info, 0, sizeof(struct i2c_board_info));</div><div class='del'>-	strlcpy(info.type, "therm_adt746x", I2C_NAME_SIZE);</div><div class='del'>-	info.addr = therm_address;</div><div class='del'>-	client = i2c_new_device(adapter, &amp;info);</div><div class='del'>-	if (!client)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Let i2c-core delete that device on driver removal.</div><div class='del'>-	 * This is safe because i2c-core holds the core_lock mutex for us.</div><div class='del'>-	 */</div><div class='del'>-	list_add_tail(&amp;client-&gt;detected, &amp;thermostat_driver.clients);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-remove_thermostat(struct i2c_client *client)</div><div class='del'>-{</div><div class='del'>-	struct thermostat *th = i2c_get_clientdata(client);</div><div class='del'>-	int i;</div><div class='del'>-	</div><div class='del'>-	thermostat_remove_files();</div><div class='del'>-</div><div class='del'>-	if (thread_therm != NULL) {</div><div class='del'>-		kthread_stop(thread_therm);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "adt746x: Putting max temperatures back from "</div><div class='del'>-			 "%d, %d, %d to %d, %d, %d\n",</div><div class='del'>-		th-&gt;limits[0], th-&gt;limits[1], th-&gt;limits[2],</div><div class='del'>-		th-&gt;initial_limits[0], th-&gt;initial_limits[1],</div><div class='del'>-		th-&gt;initial_limits[2]);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 3; i++)</div><div class='del'>-		write_reg(th, LIMIT_REG[i], th-&gt;initial_limits[i]);</div><div class='del'>-</div><div class='del'>-	write_both_fan_speed(th, -1);</div><div class='del'>-</div><div class='del'>-	thermostat = NULL;</div><div class='del'>-</div><div class='del'>-	kfree(th);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int read_fan_speed(struct thermostat *th, u8 addr)</div><div class='ctx'> {</div><div class='ctx'> 	u8 tmp[2];</div><div class='hunk'>@@ -203,7 +141,7 @@ static int read_fan_speed(struct thermostat *th, u8 addr)</div><div class='ctx'> static void write_both_fan_speed(struct thermostat *th, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	write_fan_speed(th, speed, 0);</div><div class='del'>-	if (therm_type == ADT7460)</div><div class='add'>+	if (th-&gt;type == ADT7460)</div><div class='ctx'> 		write_fan_speed(th, speed, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -216,7 +154,7 @@ static void write_fan_speed(struct thermostat *th, int speed, int fan)</div><div class='ctx'> 	else if (speed &lt; -1) </div><div class='ctx'> 		speed = 0;</div><div class='ctx'> 	</div><div class='del'>-	if (therm_type == ADT7467 &amp;&amp; fan == 1)</div><div class='add'>+	if (th-&gt;type == ADT7467 &amp;&amp; fan == 1)</div><div class='ctx'> 		return;</div><div class='ctx'> 	</div><div class='ctx'> 	if (th-&gt;last_speed[fan] != speed) {</div><div class='hunk'>@@ -239,7 +177,7 @@ static void write_fan_speed(struct thermostat *th, int speed, int fan)</div><div class='ctx'> 		write_reg(th, FAN_SPD_SET[fan], speed);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* back to automatic */</div><div class='del'>-		if(therm_type == ADT7460) {</div><div class='add'>+		if(th-&gt;type == ADT7460) {</div><div class='ctx'> 			manual = read_reg(th,</div><div class='ctx'> 				MANUAL_MODE[fan]) &amp; (~MANUAL_MASK);</div><div class='ctx'> 			manual &amp;= ~INVERT_MASK;</div><div class='hunk'>@@ -293,7 +231,7 @@ static void update_fans_speed (struct thermostat *th)</div><div class='ctx'> 	/* we don't care about local sensor, so we start at sensor 1 */</div><div class='ctx'> 	for (i = 1; i &lt; 3; i++) {</div><div class='ctx'> 		int started = 0;</div><div class='del'>-		int fan_number = (therm_type == ADT7460 &amp;&amp; i == 2);</div><div class='add'>+		int fan_number = (th-&gt;type == ADT7460 &amp;&amp; i == 2);</div><div class='ctx'> 		int var = th-&gt;temps[i] - th-&gt;limits[i];</div><div class='ctx'> </div><div class='ctx'> 		if (var &gt; -1) {</div><div class='hunk'>@@ -370,116 +308,22 @@ static int monitor_task(void *arg)</div><div class='ctx'> </div><div class='ctx'> static void set_limit(struct thermostat *th, int i)</div><div class='ctx'> {</div><div class='del'>-		/* Set sensor1 limit higher to avoid powerdowns */</div><div class='del'>-		th-&gt;limits[i] = default_limits_chip[i] + limit_adjust;</div><div class='del'>-		write_reg(th, LIMIT_REG[i], th-&gt;limits[i]);</div><div class='add'>+	/* Set sensor1 limit higher to avoid powerdowns */</div><div class='add'>+	th-&gt;limits[i] = default_limits_chip[i] + limit_adjust;</div><div class='add'>+	write_reg(th, LIMIT_REG[i], th-&gt;limits[i]);</div><div class='ctx'> 		</div><div class='del'>-		/* set our limits to normal */</div><div class='del'>-		th-&gt;limits[i] = default_limits_local[i] + limit_adjust;</div><div class='add'>+	/* set our limits to normal */</div><div class='add'>+	th-&gt;limits[i] = default_limits_local[i] + limit_adjust;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int probe_thermostat(struct i2c_client *client,</div><div class='del'>-			    const struct i2c_device_id *id)</div><div class='del'>-{</div><div class='del'>-	struct thermostat* th;</div><div class='del'>-	int rc;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (thermostat)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	th = kzalloc(sizeof(struct thermostat), GFP_KERNEL);</div><div class='del'>-	if (!th)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	i2c_set_clientdata(client, th);</div><div class='del'>-	th-&gt;clt = client;</div><div class='del'>-</div><div class='del'>-	rc = read_reg(th, CONFIG_REG);</div><div class='del'>-	if (rc &lt; 0) {</div><div class='del'>-		dev_err(&amp;client-&gt;dev, "Thermostat failed to read config!\n");</div><div class='del'>-		kfree(th);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* force manual control to start the fan quieter */</div><div class='del'>-	if (fan_speed == -1)</div><div class='del'>-		fan_speed = 64;</div><div class='del'>-	</div><div class='del'>-	if(therm_type == ADT7460) {</div><div class='del'>-		printk(KERN_INFO "adt746x: ADT7460 initializing\n");</div><div class='del'>-		/* The 7460 needs to be started explicitly */</div><div class='del'>-		write_reg(th, CONFIG_REG, 1);</div><div class='del'>-	} else</div><div class='del'>-		printk(KERN_INFO "adt746x: ADT7467 initializing\n");</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 3; i++) {</div><div class='del'>-		th-&gt;initial_limits[i] = read_reg(th, LIMIT_REG[i]);</div><div class='del'>-		set_limit(th, i);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "adt746x: Lowering max temperatures from %d, %d, %d"</div><div class='del'>-			 " to %d, %d, %d\n",</div><div class='del'>-			 th-&gt;initial_limits[0], th-&gt;initial_limits[1],</div><div class='del'>-			 th-&gt;initial_limits[2], th-&gt;limits[0], th-&gt;limits[1],</div><div class='del'>-			 th-&gt;limits[2]);</div><div class='del'>-</div><div class='del'>-	thermostat = th;</div><div class='del'>-</div><div class='del'>-	/* record invert bit status because fw can corrupt it after suspend */</div><div class='del'>-	th-&gt;pwm_inv[0] = read_reg(th, MANUAL_MODE[0]) &amp; INVERT_MASK;</div><div class='del'>-	th-&gt;pwm_inv[1] = read_reg(th, MANUAL_MODE[1]) &amp; INVERT_MASK;</div><div class='del'>-</div><div class='del'>-	/* be sure to really write fan speed the first time */</div><div class='del'>-	th-&gt;last_speed[0] = -2;</div><div class='del'>-	th-&gt;last_speed[1] = -2;</div><div class='del'>-	th-&gt;last_var[0] = -80;</div><div class='del'>-	th-&gt;last_var[1] = -80;</div><div class='del'>-</div><div class='del'>-	if (fan_speed != -1) {</div><div class='del'>-		/* manual mode, stop fans */</div><div class='del'>-		write_both_fan_speed(th, 0);</div><div class='del'>-	} else {</div><div class='del'>-		/* automatic mode */</div><div class='del'>-		write_both_fan_speed(th, -1);</div><div class='del'>-	}</div><div class='del'>-	</div><div class='del'>-	thread_therm = kthread_run(monitor_task, th, "kfand");</div><div class='del'>-</div><div class='del'>-	if (thread_therm == ERR_PTR(-ENOMEM)) {</div><div class='del'>-		printk(KERN_INFO "adt746x: Kthread creation failed\n");</div><div class='del'>-		thread_therm = NULL;</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	thermostat_create_files();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+#define BUILD_SHOW_FUNC_INT(name, data)				\</div><div class='add'>+static ssize_t show_##name(struct device *dev, struct device_attribute *attr, char *buf)	\</div><div class='add'>+{								\</div><div class='add'>+	struct thermostat *th = dev_get_drvdata(dev);		\</div><div class='add'>+	return sprintf(buf, "%d\n", data);			\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct i2c_device_id therm_adt746x_id[] = {</div><div class='del'>-	{ "therm_adt746x", 0 },</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct i2c_driver thermostat_driver = {</div><div class='del'>-	.driver = {</div><div class='del'>-		.name	= "therm_adt746x",</div><div class='del'>-	},</div><div class='del'>-	.attach_adapter	= attach_thermostat,</div><div class='del'>-	.probe = probe_thermostat,</div><div class='del'>-	.remove = remove_thermostat,</div><div class='del'>-	.id_table = therm_adt746x_id,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* </div><div class='del'>- * Now, unfortunately, sysfs doesn't give us a nice void * we could</div><div class='del'>- * pass around to the attribute functions, so we don't really have</div><div class='del'>- * choice but implement a bunch of them...</div><div class='del'>- *</div><div class='del'>- * FIXME, it does now...</div><div class='del'>- */</div><div class='del'>-#define BUILD_SHOW_FUNC_INT(name, data)				\</div><div class='add'>+#define BUILD_SHOW_FUNC_INT_LITE(name, data)				\</div><div class='ctx'> static ssize_t show_##name(struct device *dev, struct device_attribute *attr, char *buf)	\</div><div class='ctx'> {								\</div><div class='ctx'> 	return sprintf(buf, "%d\n", data);			\</div><div class='hunk'>@@ -494,22 +338,24 @@ static ssize_t show_##name(struct device *dev, struct device_attribute *attr, ch</div><div class='ctx'> #define BUILD_SHOW_FUNC_FAN(name, data)				\</div><div class='ctx'> static ssize_t show_##name(struct device *dev, struct device_attribute *attr, char *buf)       \</div><div class='ctx'> {								\</div><div class='add'>+	struct thermostat *th = dev_get_drvdata(dev);		\</div><div class='ctx'> 	return sprintf(buf, "%d (%d rpm)\n", 			\</div><div class='del'>-		thermostat-&gt;last_speed[data],			\</div><div class='del'>-		read_fan_speed(thermostat, FAN_SPEED[data])	\</div><div class='add'>+		th-&gt;last_speed[data],				\</div><div class='add'>+		read_fan_speed(th, FAN_SPEED[data])		\</div><div class='ctx'> 		);						\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define BUILD_STORE_FUNC_DEG(name, data)			\</div><div class='ctx'> static ssize_t store_##name(struct device *dev, struct device_attribute *attr, const char *buf, size_t n) \</div><div class='ctx'> {								\</div><div class='add'>+	struct thermostat *th = dev_get_drvdata(dev);		\</div><div class='ctx'> 	int val;						\</div><div class='ctx'> 	int i;							\</div><div class='ctx'> 	val = simple_strtol(buf, NULL, 10);			\</div><div class='ctx'> 	printk(KERN_INFO "Adjusting limits by %d degrees\n", val);	\</div><div class='ctx'> 	limit_adjust = val;					\</div><div class='ctx'> 	for (i=0; i &lt; 3; i++)					\</div><div class='del'>-		set_limit(thermostat, i);			\</div><div class='add'>+		set_limit(th, i);				\</div><div class='ctx'> 	return n;						\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -525,20 +371,21 @@ static ssize_t store_##name(struct device *dev, struct device_attribute *attr, c</div><div class='ctx'> 	return n;						\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-BUILD_SHOW_FUNC_INT(sensor1_temperature,	 (read_reg(thermostat, TEMP_REG[1])))</div><div class='del'>-BUILD_SHOW_FUNC_INT(sensor2_temperature,	 (read_reg(thermostat, TEMP_REG[2])))</div><div class='del'>-BUILD_SHOW_FUNC_INT(sensor1_limit,		 thermostat-&gt;limits[1])</div><div class='del'>-BUILD_SHOW_FUNC_INT(sensor2_limit,		 thermostat-&gt;limits[2])</div><div class='add'>+BUILD_SHOW_FUNC_INT(sensor1_temperature,	 (read_reg(th, TEMP_REG[1])))</div><div class='add'>+BUILD_SHOW_FUNC_INT(sensor2_temperature,	 (read_reg(th, TEMP_REG[2])))</div><div class='add'>+BUILD_SHOW_FUNC_INT(sensor1_limit,		 th-&gt;limits[1])</div><div class='add'>+BUILD_SHOW_FUNC_INT(sensor2_limit,		 th-&gt;limits[2])</div><div class='ctx'> BUILD_SHOW_FUNC_STR(sensor1_location,		 sensor_location[1])</div><div class='ctx'> BUILD_SHOW_FUNC_STR(sensor2_location,		 sensor_location[2])</div><div class='ctx'> </div><div class='del'>-BUILD_SHOW_FUNC_INT(specified_fan_speed, fan_speed)</div><div class='add'>+BUILD_SHOW_FUNC_INT_LITE(specified_fan_speed, fan_speed)</div><div class='add'>+BUILD_STORE_FUNC_INT(specified_fan_speed,fan_speed)</div><div class='add'>+</div><div class='ctx'> BUILD_SHOW_FUNC_FAN(sensor1_fan_speed,	 0)</div><div class='ctx'> BUILD_SHOW_FUNC_FAN(sensor2_fan_speed,	 1)</div><div class='ctx'> </div><div class='del'>-BUILD_STORE_FUNC_INT(specified_fan_speed,fan_speed)</div><div class='del'>-BUILD_SHOW_FUNC_INT(limit_adjust,	 limit_adjust)</div><div class='del'>-BUILD_STORE_FUNC_DEG(limit_adjust,	 thermostat)</div><div class='add'>+BUILD_SHOW_FUNC_INT_LITE(limit_adjust,	 limit_adjust)</div><div class='add'>+BUILD_STORE_FUNC_DEG(limit_adjust,	 th)</div><div class='ctx'> 		</div><div class='ctx'> static DEVICE_ATTR(sensor1_temperature,	S_IRUGO,</div><div class='ctx'> 		   show_sensor1_temperature,NULL);</div><div class='hunk'>@@ -564,53 +411,77 @@ static DEVICE_ATTR(sensor2_fan_speed,	S_IRUGO,</div><div class='ctx'> static DEVICE_ATTR(limit_adjust,	S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH,</div><div class='ctx'> 		   show_limit_adjust,	store_limit_adjust);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static int __init</div><div class='del'>-thermostat_init(void)</div><div class='add'>+static void thermostat_create_files(struct thermostat *th)</div><div class='ctx'> {</div><div class='del'>-	struct device_node* np;</div><div class='del'>-	const u32 *prop;</div><div class='del'>-	int i = 0, offset = 0;</div><div class='add'>+	struct device_node *np = th-&gt;clt-&gt;dev.of_node;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	np = of_find_node_by_name(NULL, "fan");</div><div class='del'>-	if (!np)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	if (of_device_is_compatible(np, "adt7460"))</div><div class='del'>-		therm_type = ADT7460;</div><div class='del'>-	else if (of_device_is_compatible(np, "adt7467"))</div><div class='del'>-		therm_type = ADT7467;</div><div class='del'>-	else {</div><div class='del'>-		of_node_put(np);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='add'>+	/* To maintain ABI compatibility with userspace, create</div><div class='add'>+	 * the old style platform driver and attach the attributes</div><div class='add'>+	 * to it here</div><div class='add'>+	 */</div><div class='add'>+	th-&gt;pdev = of_platform_device_create(np, "temperatures", NULL);</div><div class='add'>+	if (!th-&gt;pdev)</div><div class='add'>+		return;</div><div class='add'>+	dev = &amp;th-&gt;pdev-&gt;dev;</div><div class='add'>+	dev_set_drvdata(dev, th);</div><div class='add'>+	err = device_create_file(dev, &amp;dev_attr_sensor1_temperature);</div><div class='add'>+	err |= device_create_file(dev, &amp;dev_attr_sensor2_temperature);</div><div class='add'>+	err |= device_create_file(dev, &amp;dev_attr_sensor1_limit);</div><div class='add'>+	err |= device_create_file(dev, &amp;dev_attr_sensor2_limit);</div><div class='add'>+	err |= device_create_file(dev, &amp;dev_attr_sensor1_location);</div><div class='add'>+	err |= device_create_file(dev, &amp;dev_attr_sensor2_location);</div><div class='add'>+	err |= device_create_file(dev, &amp;dev_attr_limit_adjust);</div><div class='add'>+	err |= device_create_file(dev, &amp;dev_attr_specified_fan_speed);</div><div class='add'>+	err |= device_create_file(dev, &amp;dev_attr_sensor1_fan_speed);</div><div class='add'>+	if(th-&gt;type == ADT7460)</div><div class='add'>+		err |= device_create_file(dev, &amp;dev_attr_sensor2_fan_speed);</div><div class='add'>+	if (err)</div><div class='add'>+		printk(KERN_WARNING</div><div class='add'>+			"Failed to create temperature attribute file(s).\n");</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	prop = of_get_property(np, "hwsensor-params-version", NULL);</div><div class='del'>-	printk(KERN_INFO "adt746x: version %d (%ssupported)\n", *prop,</div><div class='del'>-			 (*prop == 1)?"":"un");</div><div class='del'>-	if (*prop != 1) {</div><div class='del'>-		of_node_put(np);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='add'>+static void thermostat_remove_files(struct thermostat *th)</div><div class='add'>+{</div><div class='add'>+	struct device *dev;</div><div class='ctx'> </div><div class='del'>-	prop = of_get_property(np, "reg", NULL);</div><div class='del'>-	if (!prop) {</div><div class='del'>-		of_node_put(np);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='add'>+	if (!th-&gt;pdev)</div><div class='add'>+		return;</div><div class='add'>+	dev = &amp;th-&gt;pdev-&gt;dev;</div><div class='add'>+	device_remove_file(dev, &amp;dev_attr_sensor1_temperature);</div><div class='add'>+	device_remove_file(dev, &amp;dev_attr_sensor2_temperature);</div><div class='add'>+	device_remove_file(dev, &amp;dev_attr_sensor1_limit);</div><div class='add'>+	device_remove_file(dev, &amp;dev_attr_sensor2_limit);</div><div class='add'>+	device_remove_file(dev, &amp;dev_attr_sensor1_location);</div><div class='add'>+	device_remove_file(dev, &amp;dev_attr_sensor2_location);</div><div class='add'>+	device_remove_file(dev, &amp;dev_attr_limit_adjust);</div><div class='add'>+	device_remove_file(dev, &amp;dev_attr_specified_fan_speed);</div><div class='add'>+	device_remove_file(dev, &amp;dev_attr_sensor1_fan_speed);	</div><div class='add'>+	if (th-&gt;type == ADT7460)</div><div class='add'>+		device_remove_file(dev, &amp;dev_attr_sensor2_fan_speed);</div><div class='add'>+	of_device_unregister(th-&gt;pdev);</div><div class='ctx'> </div><div class='del'>-	/* look for bus either by path or using "reg" */</div><div class='del'>-	if (strstr(np-&gt;full_name, "/i2c-bus@") != NULL) {</div><div class='del'>-		const char *tmp_bus = (strstr(np-&gt;full_name, "/i2c-bus@") + 9);</div><div class='del'>-		therm_bus = tmp_bus[0]-'0';</div><div class='del'>-	} else {</div><div class='del'>-		therm_bus = ((*prop) &gt;&gt; 8) &amp; 0x0f;</div><div class='del'>-	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	therm_address = ((*prop) &amp; 0xff) &gt;&gt; 1;</div><div class='add'>+static int probe_thermostat(struct i2c_client *client,</div><div class='add'>+			    const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = client-&gt;dev.of_node;</div><div class='add'>+	struct thermostat* th;</div><div class='add'>+	const __be32 *prop;</div><div class='add'>+	int i, rc, vers, offset = 0;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "adt746x: Thermostat bus: %d, address: 0x%02x, "</div><div class='del'>-			 "limit_adjust: %d, fan_speed: %d\n",</div><div class='del'>-			 therm_bus, therm_address, limit_adjust, fan_speed);</div><div class='add'>+	if (!np)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	prop = of_get_property(np, "hwsensor-params-version", NULL);</div><div class='add'>+	if (!prop)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	vers = be32_to_cpup(prop);</div><div class='add'>+	printk(KERN_INFO "adt746x: version %d (%ssupported)\n",</div><div class='add'>+	       vers, vers == 1 ? "" : "un");</div><div class='add'>+	if (vers != 1)</div><div class='add'>+		return -ENXIO;</div><div class='ctx'> </div><div class='ctx'> 	if (of_get_property(np, "hwsensor-location", NULL)) {</div><div class='ctx'> 		for (i = 0; i &lt; 3; i++) {</div><div class='hunk'>@@ -623,72 +494,129 @@ thermostat_init(void)</div><div class='ctx'> 			printk(KERN_INFO "sensor %d: %s\n", i, sensor_location[i]);</div><div class='ctx'> 			offset += strlen(sensor_location[i]) + 1;</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		sensor_location[0] = "?";</div><div class='del'>-		sensor_location[1] = "?";</div><div class='del'>-		sensor_location[2] = "?";</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	of_dev = of_platform_device_create(np, "temperatures", NULL);</div><div class='del'>-	of_node_put(np);</div><div class='add'>+	th = kzalloc(sizeof(struct thermostat), GFP_KERNEL);</div><div class='add'>+	if (!th)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	i2c_set_clientdata(client, th);</div><div class='add'>+	th-&gt;clt = client;</div><div class='add'>+	th-&gt;type = id-&gt;driver_data;</div><div class='ctx'> </div><div class='del'>-	if (of_dev == NULL) {</div><div class='del'>-		printk(KERN_ERR "Can't register temperatures device !\n");</div><div class='add'>+	rc = read_reg(th, CONFIG_REG);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Thermostat failed to read config!\n");</div><div class='add'>+		kfree(th);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_I2C_POWERMAC</div><div class='del'>-	request_module("i2c-powermac");</div><div class='del'>-#endif</div><div class='add'>+	/* force manual control to start the fan quieter */</div><div class='add'>+	if (fan_speed == -1)</div><div class='add'>+		fan_speed = 64;</div><div class='add'>+	</div><div class='add'>+	if (th-&gt;type == ADT7460) {</div><div class='add'>+		printk(KERN_INFO "adt746x: ADT7460 initializing\n");</div><div class='add'>+		/* The 7460 needs to be started explicitly */</div><div class='add'>+		write_reg(th, CONFIG_REG, 1);</div><div class='add'>+	} else</div><div class='add'>+		printk(KERN_INFO "adt746x: ADT7467 initializing\n");</div><div class='ctx'> </div><div class='del'>-	return i2c_add_driver(&amp;thermostat_driver);</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		th-&gt;initial_limits[i] = read_reg(th, LIMIT_REG[i]);</div><div class='add'>+		set_limit(th, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	printk(KERN_INFO "adt746x: Lowering max temperatures from %d, %d, %d"</div><div class='add'>+			 " to %d, %d, %d\n",</div><div class='add'>+			 th-&gt;initial_limits[0], th-&gt;initial_limits[1],</div><div class='add'>+			 th-&gt;initial_limits[2], th-&gt;limits[0], th-&gt;limits[1],</div><div class='add'>+			 th-&gt;limits[2]);</div><div class='add'>+</div><div class='add'>+	/* record invert bit status because fw can corrupt it after suspend */</div><div class='add'>+	th-&gt;pwm_inv[0] = read_reg(th, MANUAL_MODE[0]) &amp; INVERT_MASK;</div><div class='add'>+	th-&gt;pwm_inv[1] = read_reg(th, MANUAL_MODE[1]) &amp; INVERT_MASK;</div><div class='add'>+</div><div class='add'>+	/* be sure to really write fan speed the first time */</div><div class='add'>+	th-&gt;last_speed[0] = -2;</div><div class='add'>+	th-&gt;last_speed[1] = -2;</div><div class='add'>+	th-&gt;last_var[0] = -80;</div><div class='add'>+	th-&gt;last_var[1] = -80;</div><div class='add'>+</div><div class='add'>+	if (fan_speed != -1) {</div><div class='add'>+		/* manual mode, stop fans */</div><div class='add'>+		write_both_fan_speed(th, 0);</div><div class='add'>+	} else {</div><div class='add'>+		/* automatic mode */</div><div class='add'>+		write_both_fan_speed(th, -1);</div><div class='add'>+	}</div><div class='add'>+	</div><div class='add'>+	th-&gt;thread = kthread_run(monitor_task, th, "kfand");</div><div class='add'>+	if (th-&gt;thread == ERR_PTR(-ENOMEM)) {</div><div class='add'>+		printk(KERN_INFO "adt746x: Kthread creation failed\n");</div><div class='add'>+		th-&gt;thread = NULL;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	thermostat_create_files(th);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void thermostat_create_files(void)</div><div class='add'>+static int remove_thermostat(struct i2c_client *client)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='add'>+	struct thermostat *th = i2c_get_clientdata(client);</div><div class='add'>+	int i;</div><div class='add'>+	</div><div class='add'>+	thermostat_remove_files(th);</div><div class='ctx'> </div><div class='del'>-	err = device_create_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor1_temperature);</div><div class='del'>-	err |= device_create_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor2_temperature);</div><div class='del'>-	err |= device_create_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor1_limit);</div><div class='del'>-	err |= device_create_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor2_limit);</div><div class='del'>-	err |= device_create_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor1_location);</div><div class='del'>-	err |= device_create_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor2_location);</div><div class='del'>-	err |= device_create_file(&amp;of_dev-&gt;dev, &amp;dev_attr_limit_adjust);</div><div class='del'>-	err |= device_create_file(&amp;of_dev-&gt;dev, &amp;dev_attr_specified_fan_speed);</div><div class='del'>-	err |= device_create_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor1_fan_speed);</div><div class='del'>-	if(therm_type == ADT7460)</div><div class='del'>-		err |= device_create_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor2_fan_speed);</div><div class='del'>-	if (err)</div><div class='del'>-		printk(KERN_WARNING</div><div class='del'>-			"Failed to create temperature attribute file(s).\n");</div><div class='add'>+	if (th-&gt;thread != NULL)</div><div class='add'>+		kthread_stop(th-&gt;thread);</div><div class='add'>+</div><div class='add'>+	printk(KERN_INFO "adt746x: Putting max temperatures back from "</div><div class='add'>+			 "%d, %d, %d to %d, %d, %d\n",</div><div class='add'>+		th-&gt;limits[0], th-&gt;limits[1], th-&gt;limits[2],</div><div class='add'>+		th-&gt;initial_limits[0], th-&gt;initial_limits[1],</div><div class='add'>+		th-&gt;initial_limits[2]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++)</div><div class='add'>+		write_reg(th, LIMIT_REG[i], th-&gt;initial_limits[i]);</div><div class='add'>+</div><div class='add'>+	write_both_fan_speed(th, -1);</div><div class='add'>+</div><div class='add'>+	kfree(th);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void thermostat_remove_files(void)</div><div class='add'>+static const struct i2c_device_id therm_adt746x_id[] = {</div><div class='add'>+	{ "MAC,adt7460", ADT7460 },</div><div class='add'>+	{ "MAC,adt7467", ADT7467 },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, therm_adt746x_id);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver thermostat_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "therm_adt746x",</div><div class='add'>+	},</div><div class='add'>+	.probe = probe_thermostat,</div><div class='add'>+	.remove = remove_thermostat,</div><div class='add'>+	.id_table = therm_adt746x_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init thermostat_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (of_dev) {</div><div class='del'>-		device_remove_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor1_temperature);</div><div class='del'>-		device_remove_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor2_temperature);</div><div class='del'>-		device_remove_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor1_limit);</div><div class='del'>-		device_remove_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor2_limit);</div><div class='del'>-		device_remove_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor1_location);</div><div class='del'>-		device_remove_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor2_location);</div><div class='del'>-		device_remove_file(&amp;of_dev-&gt;dev, &amp;dev_attr_limit_adjust);</div><div class='del'>-		device_remove_file(&amp;of_dev-&gt;dev, &amp;dev_attr_specified_fan_speed);</div><div class='del'>-		device_remove_file(&amp;of_dev-&gt;dev, &amp;dev_attr_sensor1_fan_speed);</div><div class='del'>-</div><div class='del'>-		if(therm_type == ADT7460)</div><div class='del'>-			device_remove_file(&amp;of_dev-&gt;dev,</div><div class='del'>-					   &amp;dev_attr_sensor2_fan_speed);</div><div class='add'>+#ifndef CONFIG_I2C_POWERMAC</div><div class='add'>+	request_module("i2c-powermac");</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	}</div><div class='add'>+	return i2c_add_driver(&amp;thermostat_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __exit</div><div class='del'>-thermostat_exit(void)</div><div class='add'>+static void __exit thermostat_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	i2c_del_driver(&amp;thermostat_driver);</div><div class='del'>-	of_device_unregister(of_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(thermostat_init);</div><div class='head'>diff --git a/drivers/macintosh/windfarm.h b/drivers/macintosh/windfarm.h<br/>index 7a2482cc26a7..028cdac2d33d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/windfarm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/windfarm.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm.h</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Display a 16.16 fixed point value */</div><div class='del'>-#define FIX32TOPRINT(f)	((f) &gt;&gt; 16),((((f) &amp; 0xffff) * 1000) &gt;&gt; 16)</div><div class='add'>+#define FIX32TOPRINT(f)	(((s32)(f)) &gt;&gt; 16),(((((s32)(f)) &amp; 0xffff) * 1000) &gt;&gt; 16)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Control objects</div><div class='hunk'>@@ -35,12 +35,13 @@ struct wf_control_ops {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct wf_control {</div><div class='del'>-	struct list_head	link;</div><div class='del'>-	struct wf_control_ops	*ops;</div><div class='del'>-	char			*name;</div><div class='del'>-	int			type;</div><div class='del'>-	struct kref		ref;</div><div class='del'>-	struct device_attribute	attr;</div><div class='add'>+	struct list_head		link;</div><div class='add'>+	const struct wf_control_ops	*ops;</div><div class='add'>+	const char			*name;</div><div class='add'>+	int				type;</div><div class='add'>+	struct kref			ref;</div><div class='add'>+	struct device_attribute		attr;</div><div class='add'>+	void				*priv;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define WF_CONTROL_TYPE_GENERIC		0</div><div class='hunk'>@@ -72,6 +73,26 @@ static inline int wf_control_set_min(struct wf_control *ct)</div><div class='ctx'> 	return ct-&gt;ops-&gt;set_value(ct, vmin);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int wf_control_set(struct wf_control *ct, s32 val)</div><div class='add'>+{</div><div class='add'>+	return ct-&gt;ops-&gt;set_value(ct, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int wf_control_get(struct wf_control *ct, s32 *val)</div><div class='add'>+{</div><div class='add'>+	return ct-&gt;ops-&gt;get_value(ct, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline s32 wf_control_get_min(struct wf_control *ct)</div><div class='add'>+{</div><div class='add'>+	return ct-&gt;ops-&gt;get_min(ct);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline s32 wf_control_get_max(struct wf_control *ct)</div><div class='add'>+{</div><div class='add'>+	return ct-&gt;ops-&gt;get_max(ct);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Sensor objects</div><div class='ctx'>  */</div><div class='hunk'>@@ -85,11 +106,12 @@ struct wf_sensor_ops {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct wf_sensor {</div><div class='del'>-	struct list_head	link;</div><div class='del'>-	struct wf_sensor_ops	*ops;</div><div class='del'>-	char			*name;</div><div class='del'>-	struct kref		ref;</div><div class='del'>-	struct device_attribute	attr;</div><div class='add'>+	struct list_head		link;</div><div class='add'>+	const struct wf_sensor_ops	*ops;</div><div class='add'>+	const char			*name;</div><div class='add'>+	struct kref			ref;</div><div class='add'>+	struct device_attribute		attr;</div><div class='add'>+	void				*priv;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Same lifetime rules as controls */</div><div class='hunk'>@@ -99,6 +121,11 @@ extern struct wf_sensor * wf_find_sensor(const char *name);</div><div class='ctx'> extern int wf_get_sensor(struct wf_sensor *sr);</div><div class='ctx'> extern void wf_put_sensor(struct wf_sensor *sr);</div><div class='ctx'> </div><div class='add'>+static inline int wf_sensor_get(struct wf_sensor *sr, s32 *val)</div><div class='add'>+{</div><div class='add'>+	return sr-&gt;ops-&gt;get_value(sr, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* For use by clients. Note that we are a bit racy here since</div><div class='ctx'>  * notifier_block doesn't have a module owner field. I may fix</div><div class='ctx'>  * it one day ...</div><div class='head'>diff --git a/drivers/macintosh/windfarm_ad7417_sensor.c b/drivers/macintosh/windfarm_ad7417_sensor.c<br/>new file mode 100644<br/>index 000000000000..ac3f243b9c5a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_ad7417_sensor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_ad7417_sensor.c</a></div><div class='hunk'>@@ -0,0 +1,347 @@</div><div class='add'>+/*</div><div class='add'>+ * Windfarm PowerMac thermal control. AD7417 sensors</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Benjamin Herrenschmidt, IBM Corp.</div><div class='add'>+ *</div><div class='add'>+ * Released under the term of the GNU GPL v2.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/wait.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;asm/prom.h&gt;</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='add'>+</div><div class='add'>+#include "windfarm.h"</div><div class='add'>+#include "windfarm_mpu.h"</div><div class='add'>+</div><div class='add'>+#define VERSION "1.0"</div><div class='add'>+</div><div class='add'>+struct wf_ad7417_priv {</div><div class='add'>+	struct kref		ref;</div><div class='add'>+	struct i2c_client	*i2c;</div><div class='add'>+	u8			config;</div><div class='add'>+	u8			cpu;</div><div class='add'>+	const struct mpu_data	*mpu;</div><div class='add'>+	struct wf_sensor	sensors[5];</div><div class='add'>+	struct mutex		lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int wf_ad7417_temp_get(struct wf_sensor *sr, s32 *value)</div><div class='add'>+{</div><div class='add'>+	struct wf_ad7417_priv *pv = sr-&gt;priv;</div><div class='add'>+	u8 buf[2];</div><div class='add'>+	s16 raw;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	*value = 0;</div><div class='add'>+	mutex_lock(&amp;pv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Read temp register */</div><div class='add'>+	buf[0] = 0;</div><div class='add'>+	rc = i2c_master_send(pv-&gt;i2c, buf, 1);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+	rc = i2c_master_recv(pv-&gt;i2c, buf, 2);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	/* Read a a 16-bit signed value */</div><div class='add'>+	raw = be16_to_cpup((__le16 *)buf);</div><div class='add'>+</div><div class='add'>+	/* Convert 8.8-bit to 16.16 fixed point */</div><div class='add'>+	*value = ((s32)raw) &lt;&lt; 8;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;pv-&gt;lock);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	mutex_unlock(&amp;pv-&gt;lock);</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Scaling factors for the AD7417 ADC converters (except</div><div class='add'>+ * for the CPU diode which is obtained from the EEPROM).</div><div class='add'>+ * Those values are obtained from the property list of</div><div class='add'>+ * the darwin driver</div><div class='add'>+ */</div><div class='add'>+#define ADC_12V_CURRENT_SCALE	0x0320	/* _AD2 */</div><div class='add'>+#define ADC_CPU_VOLTAGE_SCALE	0x00a0	/* _AD3 */</div><div class='add'>+#define ADC_CPU_CURRENT_SCALE	0x1f40	/* _AD4 */</div><div class='add'>+</div><div class='add'>+static void wf_ad7417_adc_convert(struct wf_ad7417_priv *pv,</div><div class='add'>+				  int chan, s32 raw, s32 *value)</div><div class='add'>+{</div><div class='add'>+	switch(chan) {</div><div class='add'>+	case 1: /* Diode */</div><div class='add'>+		*value = (raw * (s32)pv-&gt;mpu-&gt;mdiode +</div><div class='add'>+			((s32)pv-&gt;mpu-&gt;bdiode &lt;&lt; 12)) &gt;&gt; 2;</div><div class='add'>+		break;</div><div class='add'>+	case 2: /* 12v current */</div><div class='add'>+		*value = raw * ADC_12V_CURRENT_SCALE;</div><div class='add'>+		break;</div><div class='add'>+	case 3: /* core voltage */</div><div class='add'>+		*value = raw * ADC_CPU_VOLTAGE_SCALE;</div><div class='add'>+		break;</div><div class='add'>+	case 4: /* core current */</div><div class='add'>+		*value = raw * ADC_CPU_CURRENT_SCALE;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wf_ad7417_adc_get(struct wf_sensor *sr, s32 *value)</div><div class='add'>+{</div><div class='add'>+	struct wf_ad7417_priv *pv = sr-&gt;priv;</div><div class='add'>+	int chan = sr - pv-&gt;sensors;</div><div class='add'>+	int i, rc;</div><div class='add'>+	u8 buf[2];</div><div class='add'>+	u16 raw;</div><div class='add'>+</div><div class='add'>+	*value = 0;</div><div class='add'>+	mutex_lock(&amp;pv-&gt;lock);</div><div class='add'>+	for (i = 0; i &lt; 10; i++) {</div><div class='add'>+		/* Set channel */</div><div class='add'>+		buf[0] = 1;</div><div class='add'>+		buf[1] = (pv-&gt;config &amp; 0x1f) | (chan &lt;&lt; 5);</div><div class='add'>+		rc = i2c_master_send(pv-&gt;i2c, buf, 2);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto error;</div><div class='add'>+</div><div class='add'>+		/* Wait for conversion */</div><div class='add'>+		msleep(1);</div><div class='add'>+</div><div class='add'>+		/* Switch to data register */</div><div class='add'>+		buf[0] = 4;</div><div class='add'>+		rc = i2c_master_send(pv-&gt;i2c, buf, 1);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto error;</div><div class='add'>+</div><div class='add'>+		/* Read result */</div><div class='add'>+		rc = i2c_master_recv(pv-&gt;i2c, buf, 2);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto error;</div><div class='add'>+</div><div class='add'>+		/* Read a a 16-bit signed value */</div><div class='add'>+		raw = be16_to_cpup((__le16 *)buf) &gt;&gt; 6;</div><div class='add'>+		wf_ad7417_adc_convert(pv, chan, raw, value);</div><div class='add'>+</div><div class='add'>+		dev_vdbg(&amp;pv-&gt;i2c-&gt;dev, "ADC chan %d [%s]"</div><div class='add'>+			 " raw value: 0x%x, conv to: 0x%08x\n",</div><div class='add'>+			 chan, sr-&gt;name, raw, *value);</div><div class='add'>+</div><div class='add'>+		mutex_unlock(&amp;pv-&gt;lock);</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	error:</div><div class='add'>+		dev_dbg(&amp;pv-&gt;i2c-&gt;dev,</div><div class='add'>+			  "Error reading ADC, try %d...\n", i);</div><div class='add'>+		if (i &lt; 9)</div><div class='add'>+			msleep(10);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;pv-&gt;lock);</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wf_ad7417_release(struct kref *ref)</div><div class='add'>+{</div><div class='add'>+	struct wf_ad7417_priv *pv = container_of(ref,</div><div class='add'>+						 struct wf_ad7417_priv, ref);</div><div class='add'>+	kfree(pv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wf_ad7417_sensor_release(struct wf_sensor *sr)</div><div class='add'>+{</div><div class='add'>+	struct wf_ad7417_priv *pv = sr-&gt;priv;</div><div class='add'>+</div><div class='add'>+	kfree(sr-&gt;name);</div><div class='add'>+	kref_put(&amp;pv-&gt;ref, wf_ad7417_release);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct wf_sensor_ops wf_ad7417_temp_ops = {</div><div class='add'>+	.get_value	= wf_ad7417_temp_get,</div><div class='add'>+	.release	= wf_ad7417_sensor_release,</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct wf_sensor_ops wf_ad7417_adc_ops = {</div><div class='add'>+	.get_value	= wf_ad7417_adc_get,</div><div class='add'>+	.release	= wf_ad7417_sensor_release,</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __devinit wf_ad7417_add_sensor(struct wf_ad7417_priv *pv,</div><div class='add'>+					   int index, const char *name,</div><div class='add'>+					   const struct wf_sensor_ops *ops)</div><div class='add'>+{</div><div class='add'>+	pv-&gt;sensors[index].name = kasprintf(GFP_KERNEL, "%s-%d", name, pv-&gt;cpu);</div><div class='add'>+	pv-&gt;sensors[index].priv = pv;</div><div class='add'>+	pv-&gt;sensors[index].ops = ops;</div><div class='add'>+	if (!wf_register_sensor(&amp;pv-&gt;sensors[index]))</div><div class='add'>+		kref_get(&amp;pv-&gt;ref);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devinit wf_ad7417_init_chip(struct wf_ad7417_priv *pv)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+	u8 buf[2];</div><div class='add'>+	u8 config = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Read ADC the configuration register and cache it. We</div><div class='add'>+	 * also make sure Config2 contains proper values, I've seen</div><div class='add'>+	 * cases where we got stale grabage in there, thus preventing</div><div class='add'>+	 * proper reading of conv. values</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* Clear Config2 */</div><div class='add'>+	buf[0] = 5;</div><div class='add'>+	buf[1] = 0;</div><div class='add'>+	i2c_master_send(pv-&gt;i2c, buf, 2);</div><div class='add'>+</div><div class='add'>+	/* Read &amp; cache Config1 */</div><div class='add'>+	buf[0] = 1;</div><div class='add'>+	rc = i2c_master_send(pv-&gt;i2c, buf, 1);</div><div class='add'>+	if (rc &gt; 0) {</div><div class='add'>+		rc = i2c_master_recv(pv-&gt;i2c, buf, 1);</div><div class='add'>+		if (rc &gt; 0) {</div><div class='add'>+			config = buf[0];</div><div class='add'>+</div><div class='add'>+			dev_dbg(&amp;pv-&gt;i2c-&gt;dev, "ADC config reg: %02x\n",</div><div class='add'>+				config);</div><div class='add'>+</div><div class='add'>+			/* Disable shutdown mode */</div><div class='add'>+			config &amp;= 0xfe;</div><div class='add'>+			buf[0] = 1;</div><div class='add'>+			buf[1] = config;</div><div class='add'>+			rc = i2c_master_send(pv-&gt;i2c, buf, 2);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (rc &lt;= 0)</div><div class='add'>+		dev_err(&amp;pv-&gt;i2c-&gt;dev, "Error reading ADC config\n");</div><div class='add'>+</div><div class='add'>+	pv-&gt;config = config;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit wf_ad7417_probe(struct i2c_client *client,</div><div class='add'>+				     const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct wf_ad7417_priv *pv;</div><div class='add'>+	const struct mpu_data *mpu;</div><div class='add'>+	const char *loc;</div><div class='add'>+	int cpu_nr;</div><div class='add'>+</div><div class='add'>+	loc = of_get_property(client-&gt;dev.of_node, "hwsensor-location", NULL);</div><div class='add'>+	if (!loc) {</div><div class='add'>+		dev_warn(&amp;client-&gt;dev, "Missing hwsensor-location property!\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Identify which CPU we belong to by looking at the first entry</div><div class='add'>+	 * in the hwsensor-location list</div><div class='add'>+	 */</div><div class='add'>+	if (!strncmp(loc, "CPU A", 5))</div><div class='add'>+		cpu_nr = 0;</div><div class='add'>+	else if (!strncmp(loc, "CPU B", 5))</div><div class='add'>+		cpu_nr = 1;</div><div class='add'>+	else {</div><div class='add'>+		pr_err("wf_ad7417: Can't identify location %s\n", loc);</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+	mpu = wf_get_mpu(cpu_nr);</div><div class='add'>+	if (!mpu) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Failed to retrieve MPU data\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pv = kzalloc(sizeof(struct wf_ad7417_priv), GFP_KERNEL);</div><div class='add'>+	if (pv == NULL)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	kref_init(&amp;pv-&gt;ref);</div><div class='add'>+	mutex_init(&amp;pv-&gt;lock);</div><div class='add'>+	pv-&gt;i2c = client;</div><div class='add'>+	pv-&gt;cpu = cpu_nr;</div><div class='add'>+	pv-&gt;mpu = mpu;</div><div class='add'>+	dev_set_drvdata(&amp;client-&gt;dev, pv);</div><div class='add'>+</div><div class='add'>+	/* Initialize the chip */</div><div class='add'>+	wf_ad7417_init_chip(pv);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We cannot rely on Apple device-tree giving us child</div><div class='add'>+	 * node with the names of the individual sensors so we</div><div class='add'>+	 * just hard code what we know about them</div><div class='add'>+	 */</div><div class='add'>+	wf_ad7417_add_sensor(pv, 0, "cpu-amb-temp", &amp;wf_ad7417_temp_ops);</div><div class='add'>+	wf_ad7417_add_sensor(pv, 1, "cpu-diode-temp", &amp;wf_ad7417_adc_ops);</div><div class='add'>+	wf_ad7417_add_sensor(pv, 2, "cpu-12v-current", &amp;wf_ad7417_adc_ops);</div><div class='add'>+	wf_ad7417_add_sensor(pv, 3, "cpu-voltage", &amp;wf_ad7417_adc_ops);</div><div class='add'>+	wf_ad7417_add_sensor(pv, 4, "cpu-current", &amp;wf_ad7417_adc_ops);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit wf_ad7417_remove(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct wf_ad7417_priv *pv = dev_get_drvdata(&amp;client-&gt;dev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Mark client detached */</div><div class='add'>+	pv-&gt;i2c = NULL;</div><div class='add'>+</div><div class='add'>+	/* Release sensor */</div><div class='add'>+	for (i = 0; i &lt; 5; i++)</div><div class='add'>+		wf_unregister_sensor(&amp;pv-&gt;sensors[i]);</div><div class='add'>+</div><div class='add'>+	kref_put(&amp;pv-&gt;ref, wf_ad7417_release);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id wf_ad7417_id[] = {</div><div class='add'>+	{ "MAC,ad7417", 0 },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, wf_ad7417_id);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver wf_ad7417_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "wf_ad7417",</div><div class='add'>+	},</div><div class='add'>+	.probe		= wf_ad7417_probe,</div><div class='add'>+	.remove		= wf_ad7417_remove,</div><div class='add'>+	.id_table	= wf_ad7417_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit wf_ad7417_init(void)</div><div class='add'>+{</div><div class='add'>+	/* This is only supported on these machines */</div><div class='add'>+	if (!of_machine_is_compatible("PowerMac7,2") &amp;&amp;</div><div class='add'>+	    !of_machine_is_compatible("PowerMac7,3") &amp;&amp;</div><div class='add'>+	    !of_machine_is_compatible("RackMac3,1"))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return i2c_add_driver(&amp;wf_ad7417_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devexit wf_ad7417_exit(void)</div><div class='add'>+{</div><div class='add'>+	i2c_del_driver(&amp;wf_ad7417_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(wf_ad7417_init);</div><div class='add'>+module_exit(wf_ad7417_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("ad7417 sensor driver for PowerMacs");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='head'>diff --git a/drivers/macintosh/windfarm_core.c b/drivers/macintosh/windfarm_core.c<br/>index ce8897933a84..3ee198b65843 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/windfarm_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/windfarm_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_core.c</a></div><div class='hunk'>@@ -164,13 +164,27 @@ static ssize_t wf_show_control(struct device *dev,</div><div class='ctx'> 			       struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct wf_control *ctrl = container_of(attr, struct wf_control, attr);</div><div class='add'>+	const char *typestr;</div><div class='ctx'> 	s32 val = 0;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = ctrl-&gt;ops-&gt;get_value(ctrl, &amp;val);</div><div class='del'>-	if (err &lt; 0)</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		if (err == -EFAULT)</div><div class='add'>+			return sprintf(buf, "&lt;HW FAULT&gt;\n");</div><div class='ctx'> 		return err;</div><div class='del'>-	return sprintf(buf, "%d\n", val);</div><div class='add'>+	}</div><div class='add'>+	switch(ctrl-&gt;type) {</div><div class='add'>+	case WF_CONTROL_RPM_FAN:</div><div class='add'>+		typestr = " RPM";</div><div class='add'>+		break;</div><div class='add'>+	case WF_CONTROL_PWM_FAN:</div><div class='add'>+		typestr = " %";</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		typestr = "";</div><div class='add'>+	}</div><div class='add'>+	return sprintf(buf, "%d%s\n", val, typestr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* This is really only for debugging... */</div><div class='hunk'>@@ -470,11 +484,6 @@ static int __init windfarm_core_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	DBG("wf: core loaded\n");</div><div class='ctx'> </div><div class='del'>-	/* Don't register on old machines that use therm_pm72 for now */</div><div class='del'>-	if (of_machine_is_compatible("PowerMac7,2") ||</div><div class='del'>-	    of_machine_is_compatible("PowerMac7,3") ||</div><div class='del'>-	    of_machine_is_compatible("RackMac3,1"))</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> 	platform_device_register(&amp;wf_platform_device);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/macintosh/windfarm_cpufreq_clamp.c b/drivers/macintosh/windfarm_cpufreq_clamp.c<br/>index 1a77a7c97d0e..72d1fdfe02a5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/windfarm_cpufreq_clamp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/windfarm_cpufreq_clamp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_cpufreq_clamp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_cpufreq_clamp.c</a></div><div class='hunk'>@@ -75,12 +75,6 @@ static int __init wf_cpufreq_clamp_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct wf_control *clamp;</div><div class='ctx'> </div><div class='del'>-	/* Don't register on old machines that use therm_pm72 for now */</div><div class='del'>-	if (of_machine_is_compatible("PowerMac7,2") ||</div><div class='del'>-	    of_machine_is_compatible("PowerMac7,3") ||</div><div class='del'>-	    of_machine_is_compatible("RackMac3,1"))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	clamp = kmalloc(sizeof(struct wf_control), GFP_KERNEL);</div><div class='ctx'> 	if (clamp == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/drivers/macintosh/windfarm_fcu_controls.c b/drivers/macintosh/windfarm_fcu_controls.c<br/>new file mode 100644<br/>index 000000000000..b3411edb324b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_fcu_controls.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_fcu_controls.c</a></div><div class='hunk'>@@ -0,0 +1,613 @@</div><div class='add'>+/*</div><div class='add'>+ * Windfarm PowerMac thermal control. FCU fan control</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Benjamin Herrenschmidt, IBM Corp.</div><div class='add'>+ *</div><div class='add'>+ * Released under the term of the GNU GPL v2.</div><div class='add'>+ */</div><div class='add'>+#undef DEBUG</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/wait.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;asm/prom.h&gt;</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='add'>+</div><div class='add'>+#include "windfarm.h"</div><div class='add'>+#include "windfarm_mpu.h"</div><div class='add'>+</div><div class='add'>+#define VERSION "1.0"</div><div class='add'>+</div><div class='add'>+#ifdef DEBUG</div><div class='add'>+#define DBG(args...)	printk(args)</div><div class='add'>+#else</div><div class='add'>+#define DBG(args...)	do { } while(0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This option is "weird" :) Basically, if you define this to 1</div><div class='add'>+ * the control loop for the RPMs fans (not PWMs) will apply the</div><div class='add'>+ * correction factor obtained from the PID to the actual RPM</div><div class='add'>+ * speed read from the FCU.</div><div class='add'>+ *</div><div class='add'>+ * If you define the below constant to 0, then it will be</div><div class='add'>+ * applied to the setpoint RPM speed, that is basically the</div><div class='add'>+ * speed we proviously "asked" for.</div><div class='add'>+ *</div><div class='add'>+ * I'm using 0 for now which is what therm_pm72 used to do and</div><div class='add'>+ * what Darwin -apparently- does based on observed behaviour.</div><div class='add'>+ */</div><div class='add'>+#define RPM_PID_USE_ACTUAL_SPEED	0</div><div class='add'>+</div><div class='add'>+/* Default min/max for pumps */</div><div class='add'>+#define CPU_PUMP_OUTPUT_MAX		3200</div><div class='add'>+#define CPU_PUMP_OUTPUT_MIN		1250</div><div class='add'>+</div><div class='add'>+#define FCU_FAN_RPM		0</div><div class='add'>+#define FCU_FAN_PWM		1</div><div class='add'>+</div><div class='add'>+struct wf_fcu_priv {</div><div class='add'>+	struct kref		ref;</div><div class='add'>+	struct i2c_client	*i2c;</div><div class='add'>+	struct mutex		lock;</div><div class='add'>+	struct list_head	fan_list;</div><div class='add'>+	int			rpm_shift;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct wf_fcu_fan {</div><div class='add'>+	struct list_head	link;</div><div class='add'>+	int			id;</div><div class='add'>+	s32			min, max, target;</div><div class='add'>+	struct wf_fcu_priv	*fcu_priv;</div><div class='add'>+	struct wf_control	ctrl;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void wf_fcu_release(struct kref *ref)</div><div class='add'>+{</div><div class='add'>+	struct wf_fcu_priv *pv = container_of(ref, struct wf_fcu_priv, ref);</div><div class='add'>+</div><div class='add'>+	kfree(pv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wf_fcu_fan_release(struct wf_control *ct)</div><div class='add'>+{</div><div class='add'>+	struct wf_fcu_fan *fan = ct-&gt;priv;</div><div class='add'>+</div><div class='add'>+	kref_put(&amp;fan-&gt;fcu_priv-&gt;ref, wf_fcu_release);</div><div class='add'>+	kfree(fan);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wf_fcu_read_reg(struct wf_fcu_priv *pv, int reg,</div><div class='add'>+			   unsigned char *buf, int nb)</div><div class='add'>+{</div><div class='add'>+	int tries, nr, nw;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	buf[0] = reg;</div><div class='add'>+	tries = 0;</div><div class='add'>+	for (;;) {</div><div class='add'>+		nw = i2c_master_send(pv-&gt;i2c, buf, 1);</div><div class='add'>+		if (nw &gt; 0 || (nw &lt; 0 &amp;&amp; nw != -EIO) || tries &gt;= 100)</div><div class='add'>+			break;</div><div class='add'>+		msleep(10);</div><div class='add'>+		++tries;</div><div class='add'>+	}</div><div class='add'>+	if (nw &lt;= 0) {</div><div class='add'>+		pr_err("Failure writing address to FCU: %d", nw);</div><div class='add'>+		nr = nw;</div><div class='add'>+		goto bail;</div><div class='add'>+	}</div><div class='add'>+	tries = 0;</div><div class='add'>+	for (;;) {</div><div class='add'>+		nr = i2c_master_recv(pv-&gt;i2c, buf, nb);</div><div class='add'>+		if (nr &gt; 0 || (nr &lt; 0 &amp;&amp; nr != -ENODEV) || tries &gt;= 100)</div><div class='add'>+			break;</div><div class='add'>+		msleep(10);</div><div class='add'>+		++tries;</div><div class='add'>+	}</div><div class='add'>+	if (nr &lt;= 0)</div><div class='add'>+		pr_err("wf_fcu: Failure reading data from FCU: %d", nw);</div><div class='add'>+ bail:</div><div class='add'>+	mutex_unlock(&amp;pv-&gt;lock);</div><div class='add'>+	return nr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wf_fcu_write_reg(struct wf_fcu_priv *pv, int reg,</div><div class='add'>+			    const unsigned char *ptr, int nb)</div><div class='add'>+{</div><div class='add'>+	int tries, nw;</div><div class='add'>+	unsigned char buf[16];</div><div class='add'>+</div><div class='add'>+	buf[0] = reg;</div><div class='add'>+	memcpy(buf+1, ptr, nb);</div><div class='add'>+	++nb;</div><div class='add'>+	tries = 0;</div><div class='add'>+	for (;;) {</div><div class='add'>+		nw = i2c_master_send(pv-&gt;i2c, buf, nb);</div><div class='add'>+		if (nw &gt; 0 || (nw &lt; 0 &amp;&amp; nw != -EIO) || tries &gt;= 100)</div><div class='add'>+			break;</div><div class='add'>+		msleep(10);</div><div class='add'>+		++tries;</div><div class='add'>+	}</div><div class='add'>+	if (nw &lt; 0)</div><div class='add'>+		pr_err("wf_fcu: Failure writing to FCU: %d", nw);</div><div class='add'>+	return nw;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wf_fcu_fan_set_rpm(struct wf_control *ct, s32 value)</div><div class='add'>+{</div><div class='add'>+	struct wf_fcu_fan *fan = ct-&gt;priv;</div><div class='add'>+	struct wf_fcu_priv *pv = fan-&gt;fcu_priv;</div><div class='add'>+	int rc, shift = pv-&gt;rpm_shift;</div><div class='add'>+	unsigned char buf[2];</div><div class='add'>+</div><div class='add'>+	if (value &lt; fan-&gt;min)</div><div class='add'>+		value = fan-&gt;min;</div><div class='add'>+	if (value &gt; fan-&gt;max)</div><div class='add'>+		value = fan-&gt;max;</div><div class='add'>+</div><div class='add'>+	fan-&gt;target = value;</div><div class='add'>+</div><div class='add'>+	buf[0] = value &gt;&gt; (8 - shift);</div><div class='add'>+	buf[1] = value &lt;&lt; shift;</div><div class='add'>+	rc = wf_fcu_write_reg(pv, 0x10 + (fan-&gt;id * 2), buf, 2);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return -EIO;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wf_fcu_fan_get_rpm(struct wf_control *ct, s32 *value)</div><div class='add'>+{</div><div class='add'>+	struct wf_fcu_fan *fan = ct-&gt;priv;</div><div class='add'>+	struct wf_fcu_priv *pv = fan-&gt;fcu_priv;</div><div class='add'>+	int rc, reg_base, shift = pv-&gt;rpm_shift;</div><div class='add'>+	unsigned char failure;</div><div class='add'>+	unsigned char active;</div><div class='add'>+	unsigned char buf[2];</div><div class='add'>+</div><div class='add'>+	rc = wf_fcu_read_reg(pv, 0xb, &amp;failure, 1);</div><div class='add'>+	if (rc != 1)</div><div class='add'>+		return -EIO;</div><div class='add'>+	if ((failure &amp; (1 &lt;&lt; fan-&gt;id)) != 0)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	rc = wf_fcu_read_reg(pv, 0xd, &amp;active, 1);</div><div class='add'>+	if (rc != 1)</div><div class='add'>+		return -EIO;</div><div class='add'>+	if ((active &amp; (1 &lt;&lt; fan-&gt;id)) == 0)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	/* Programmed value or real current speed */</div><div class='add'>+#if RPM_PID_USE_ACTUAL_SPEED</div><div class='add'>+	reg_base = 0x11;</div><div class='add'>+#else</div><div class='add'>+	reg_base = 0x10;</div><div class='add'>+#endif</div><div class='add'>+	rc = wf_fcu_read_reg(pv, reg_base + (fan-&gt;id * 2), buf, 2);</div><div class='add'>+	if (rc != 2)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	*value = (buf[0] &lt;&lt; (8 - shift)) | buf[1] &gt;&gt; shift;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wf_fcu_fan_set_pwm(struct wf_control *ct, s32 value)</div><div class='add'>+{</div><div class='add'>+	struct wf_fcu_fan *fan = ct-&gt;priv;</div><div class='add'>+	struct wf_fcu_priv *pv = fan-&gt;fcu_priv;</div><div class='add'>+	unsigned char buf[2];</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (value &lt; fan-&gt;min)</div><div class='add'>+		value = fan-&gt;min;</div><div class='add'>+	if (value &gt; fan-&gt;max)</div><div class='add'>+		value = fan-&gt;max;</div><div class='add'>+</div><div class='add'>+	fan-&gt;target = value;</div><div class='add'>+</div><div class='add'>+	value = (value * 2559) / 1000;</div><div class='add'>+	buf[0] = value;</div><div class='add'>+	rc = wf_fcu_write_reg(pv, 0x30 + (fan-&gt;id * 2), buf, 1);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return -EIO;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wf_fcu_fan_get_pwm(struct wf_control *ct, s32 *value)</div><div class='add'>+{</div><div class='add'>+	struct wf_fcu_fan *fan = ct-&gt;priv;</div><div class='add'>+	struct wf_fcu_priv *pv = fan-&gt;fcu_priv;</div><div class='add'>+	unsigned char failure;</div><div class='add'>+	unsigned char active;</div><div class='add'>+	unsigned char buf[2];</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = wf_fcu_read_reg(pv, 0x2b, &amp;failure, 1);</div><div class='add'>+	if (rc != 1)</div><div class='add'>+		return -EIO;</div><div class='add'>+	if ((failure &amp; (1 &lt;&lt; fan-&gt;id)) != 0)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	rc = wf_fcu_read_reg(pv, 0x2d, &amp;active, 1);</div><div class='add'>+	if (rc != 1)</div><div class='add'>+		return -EIO;</div><div class='add'>+	if ((active &amp; (1 &lt;&lt; fan-&gt;id)) == 0)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	rc = wf_fcu_read_reg(pv, 0x30 + (fan-&gt;id * 2), buf, 1);</div><div class='add'>+	if (rc != 1)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	*value = (((s32)buf[0]) * 1000) / 2559;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static s32 wf_fcu_fan_min(struct wf_control *ct)</div><div class='add'>+{</div><div class='add'>+	struct wf_fcu_fan *fan = ct-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return fan-&gt;min;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static s32 wf_fcu_fan_max(struct wf_control *ct)</div><div class='add'>+{</div><div class='add'>+	struct wf_fcu_fan *fan = ct-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return fan-&gt;max;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct wf_control_ops wf_fcu_fan_rpm_ops = {</div><div class='add'>+	.set_value	= wf_fcu_fan_set_rpm,</div><div class='add'>+	.get_value	= wf_fcu_fan_get_rpm,</div><div class='add'>+	.get_min	= wf_fcu_fan_min,</div><div class='add'>+	.get_max	= wf_fcu_fan_max,</div><div class='add'>+	.release	= wf_fcu_fan_release,</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct wf_control_ops wf_fcu_fan_pwm_ops = {</div><div class='add'>+	.set_value	= wf_fcu_fan_set_pwm,</div><div class='add'>+	.get_value	= wf_fcu_fan_get_pwm,</div><div class='add'>+	.get_min	= wf_fcu_fan_min,</div><div class='add'>+	.get_max	= wf_fcu_fan_max,</div><div class='add'>+	.release	= wf_fcu_fan_release,</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __devinit wf_fcu_get_pump_minmax(struct wf_fcu_fan *fan)</div><div class='add'>+{</div><div class='add'>+	const struct mpu_data *mpu = wf_get_mpu(0);</div><div class='add'>+	u16 pump_min = 0, pump_max = 0xffff;</div><div class='add'>+	u16 tmp[4];</div><div class='add'>+</div><div class='add'>+	/* Try to fetch pumps min/max infos from eeprom */</div><div class='add'>+	if (mpu) {</div><div class='add'>+		memcpy(&amp;tmp, mpu-&gt;processor_part_num, 8);</div><div class='add'>+		if (tmp[0] != 0xffff &amp;&amp; tmp[1] != 0xffff) {</div><div class='add'>+			pump_min = max(pump_min, tmp[0]);</div><div class='add'>+			pump_max = min(pump_max, tmp[1]);</div><div class='add'>+		}</div><div class='add'>+		if (tmp[2] != 0xffff &amp;&amp; tmp[3] != 0xffff) {</div><div class='add'>+			pump_min = max(pump_min, tmp[2]);</div><div class='add'>+			pump_max = min(pump_max, tmp[3]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Double check the values, this _IS_ needed as the EEPROM on</div><div class='add'>+	 * some dual 2.5Ghz G5s seem, at least, to have both min &amp; max</div><div class='add'>+	 * same to the same value ... (grrrr)</div><div class='add'>+	 */</div><div class='add'>+	if (pump_min == pump_max || pump_min == 0 || pump_max == 0xffff) {</div><div class='add'>+		pump_min = CPU_PUMP_OUTPUT_MIN;</div><div class='add'>+		pump_max = CPU_PUMP_OUTPUT_MAX;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fan-&gt;min = pump_min;</div><div class='add'>+	fan-&gt;max = pump_max;</div><div class='add'>+</div><div class='add'>+	DBG("wf_fcu: pump min/max for %s set to: [%d..%d] RPM\n",</div><div class='add'>+	    fan-&gt;ctrl.name, pump_min, pump_max);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devinit wf_fcu_get_rpmfan_minmax(struct wf_fcu_fan *fan)</div><div class='add'>+{</div><div class='add'>+	struct wf_fcu_priv *pv = fan-&gt;fcu_priv;</div><div class='add'>+	const struct mpu_data *mpu0 = wf_get_mpu(0);</div><div class='add'>+	const struct mpu_data *mpu1 = wf_get_mpu(1);</div><div class='add'>+</div><div class='add'>+	/* Default */</div><div class='add'>+	fan-&gt;min = 2400 &gt;&gt; pv-&gt;rpm_shift;</div><div class='add'>+	fan-&gt;max = 56000 &gt;&gt; pv-&gt;rpm_shift;</div><div class='add'>+</div><div class='add'>+	/* CPU fans have min/max in MPU */</div><div class='add'>+	if (mpu0 &amp;&amp; !strcmp(fan-&gt;ctrl.name, "cpu-front-fan-0")) {</div><div class='add'>+		fan-&gt;min = max(fan-&gt;min, (s32)mpu0-&gt;rminn_intake_fan);</div><div class='add'>+		fan-&gt;max = min(fan-&gt;max, (s32)mpu0-&gt;rmaxn_intake_fan);</div><div class='add'>+		goto bail;</div><div class='add'>+	}</div><div class='add'>+	if (mpu1 &amp;&amp; !strcmp(fan-&gt;ctrl.name, "cpu-front-fan-1")) {</div><div class='add'>+		fan-&gt;min = max(fan-&gt;min, (s32)mpu1-&gt;rminn_intake_fan);</div><div class='add'>+		fan-&gt;max = min(fan-&gt;max, (s32)mpu1-&gt;rmaxn_intake_fan);</div><div class='add'>+		goto bail;</div><div class='add'>+	}</div><div class='add'>+	if (mpu0 &amp;&amp; !strcmp(fan-&gt;ctrl.name, "cpu-rear-fan-0")) {</div><div class='add'>+		fan-&gt;min = max(fan-&gt;min, (s32)mpu0-&gt;rminn_exhaust_fan);</div><div class='add'>+		fan-&gt;max = min(fan-&gt;max, (s32)mpu0-&gt;rmaxn_exhaust_fan);</div><div class='add'>+		goto bail;</div><div class='add'>+	}</div><div class='add'>+	if (mpu1 &amp;&amp; !strcmp(fan-&gt;ctrl.name, "cpu-rear-fan-1")) {</div><div class='add'>+		fan-&gt;min = max(fan-&gt;min, (s32)mpu1-&gt;rminn_exhaust_fan);</div><div class='add'>+		fan-&gt;max = min(fan-&gt;max, (s32)mpu1-&gt;rmaxn_exhaust_fan);</div><div class='add'>+		goto bail;</div><div class='add'>+	}</div><div class='add'>+	/* Rackmac variants, we just use mpu0 intake */</div><div class='add'>+	if (!strncmp(fan-&gt;ctrl.name, "cpu-fan", 7)) {</div><div class='add'>+		fan-&gt;min = max(fan-&gt;min, (s32)mpu0-&gt;rminn_intake_fan);</div><div class='add'>+		fan-&gt;max = min(fan-&gt;max, (s32)mpu0-&gt;rmaxn_intake_fan);</div><div class='add'>+		goto bail;</div><div class='add'>+	}</div><div class='add'>+ bail:</div><div class='add'>+	DBG("wf_fcu: fan min/max for %s set to: [%d..%d] RPM\n",</div><div class='add'>+	    fan-&gt;ctrl.name, fan-&gt;min, fan-&gt;max);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devinit wf_fcu_add_fan(struct wf_fcu_priv *pv,</div><div class='add'>+				     const char *name,</div><div class='add'>+				     int type, int id)</div><div class='add'>+{</div><div class='add'>+	struct wf_fcu_fan *fan;</div><div class='add'>+</div><div class='add'>+	fan = kzalloc(sizeof(*fan), GFP_KERNEL);</div><div class='add'>+	if (!fan)</div><div class='add'>+		return;</div><div class='add'>+	fan-&gt;fcu_priv = pv;</div><div class='add'>+	fan-&gt;id = id;</div><div class='add'>+	fan-&gt;ctrl.name = name;</div><div class='add'>+	fan-&gt;ctrl.priv = fan;</div><div class='add'>+</div><div class='add'>+	/* min/max is oddball but the code comes from</div><div class='add'>+	 * therm_pm72 which seems to work so ...</div><div class='add'>+	 */</div><div class='add'>+	if (type == FCU_FAN_RPM) {</div><div class='add'>+		if (!strncmp(name, "cpu-pump", strlen("cpu-pump")))</div><div class='add'>+			wf_fcu_get_pump_minmax(fan);</div><div class='add'>+		else</div><div class='add'>+			wf_fcu_get_rpmfan_minmax(fan);</div><div class='add'>+		fan-&gt;ctrl.type = WF_CONTROL_RPM_FAN;</div><div class='add'>+		fan-&gt;ctrl.ops = &amp;wf_fcu_fan_rpm_ops;</div><div class='add'>+	} else {</div><div class='add'>+		fan-&gt;min = 10;</div><div class='add'>+		fan-&gt;max = 100;</div><div class='add'>+		fan-&gt;ctrl.type = WF_CONTROL_PWM_FAN;</div><div class='add'>+		fan-&gt;ctrl.ops = &amp;wf_fcu_fan_pwm_ops;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (wf_register_control(&amp;fan-&gt;ctrl)) {</div><div class='add'>+		pr_err("wf_fcu: Failed to register fan %s\n", name);</div><div class='add'>+		kfree(fan);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	list_add(&amp;fan-&gt;link, &amp;pv-&gt;fan_list);</div><div class='add'>+	kref_get(&amp;pv-&gt;ref);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devinit wf_fcu_lookup_fans(struct wf_fcu_priv *pv)</div><div class='add'>+{</div><div class='add'>+	/* Translation of device-tree location properties to</div><div class='add'>+	 * windfarm fan names</div><div class='add'>+	 */</div><div class='add'>+	static const struct {</div><div class='add'>+		const char *dt_name;	/* Device-tree name */</div><div class='add'>+		const char *ct_name;	/* Control name */</div><div class='add'>+	} loc_trans[] = {</div><div class='add'>+		{ "BACKSIDE",		"backside-fan",		},</div><div class='add'>+		{ "SYS CTRLR FAN",	"backside-fan",		},</div><div class='add'>+		{ "DRIVE BAY",		"drive-bay-fan",	},</div><div class='add'>+		{ "SLOT",		"slots-fan",		},</div><div class='add'>+		{ "PCI FAN",		"slots-fan",		},</div><div class='add'>+		{ "CPU A INTAKE",	"cpu-front-fan-0",	},</div><div class='add'>+		{ "CPU A EXHAUST",	"cpu-rear-fan-0",	},</div><div class='add'>+		{ "CPU B INTAKE",	"cpu-front-fan-1",	},</div><div class='add'>+		{ "CPU B EXHAUST",	"cpu-rear-fan-1",	},</div><div class='add'>+		{ "CPU A PUMP",		"cpu-pump-0",		},</div><div class='add'>+		{ "CPU B PUMP",		"cpu-pump-1",		},</div><div class='add'>+		{ "CPU A 1",		"cpu-fan-a-0",		},</div><div class='add'>+		{ "CPU A 2",		"cpu-fan-b-0",		},</div><div class='add'>+		{ "CPU A 3",		"cpu-fan-c-0",		},</div><div class='add'>+		{ "CPU B 1",		"cpu-fan-a-1",		},</div><div class='add'>+		{ "CPU B 2",		"cpu-fan-b-1",		},</div><div class='add'>+		{ "CPU B 3",		"cpu-fan-c-1",		},</div><div class='add'>+	};</div><div class='add'>+	struct device_node *np = NULL, *fcu = pv-&gt;i2c-&gt;dev.of_node;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	DBG("Looking up FCU controls in device-tree...\n");</div><div class='add'>+</div><div class='add'>+	while ((np = of_get_next_child(fcu, np)) != NULL) {</div><div class='add'>+		int id, type = -1;</div><div class='add'>+		const char *loc;</div><div class='add'>+		const char *name;</div><div class='add'>+		const u32 *reg;</div><div class='add'>+</div><div class='add'>+		DBG(" control: %s, type: %s\n", np-&gt;name, np-&gt;type);</div><div class='add'>+</div><div class='add'>+		/* Detect control type */</div><div class='add'>+		if (!strcmp(np-&gt;type, "fan-rpm-control") ||</div><div class='add'>+		    !strcmp(np-&gt;type, "fan-rpm"))</div><div class='add'>+			type = FCU_FAN_RPM;</div><div class='add'>+		if (!strcmp(np-&gt;type, "fan-pwm-control") ||</div><div class='add'>+		    !strcmp(np-&gt;type, "fan-pwm"))</div><div class='add'>+			type = FCU_FAN_PWM;</div><div class='add'>+		/* Only care about fans for now */</div><div class='add'>+		if (type == -1)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Lookup for a matching location */</div><div class='add'>+		loc = of_get_property(np, "location", NULL);</div><div class='add'>+		reg = of_get_property(np, "reg", NULL);</div><div class='add'>+		if (loc == NULL || reg == NULL)</div><div class='add'>+			continue;</div><div class='add'>+		DBG(" matching location: %s, reg: 0x%08x\n", loc, *reg);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(loc_trans); i++) {</div><div class='add'>+			if (strncmp(loc, loc_trans[i].dt_name,</div><div class='add'>+				    strlen(loc_trans[i].dt_name)))</div><div class='add'>+				continue;</div><div class='add'>+			name = loc_trans[i].ct_name;</div><div class='add'>+</div><div class='add'>+			DBG(" location match, name: %s\n", name);</div><div class='add'>+</div><div class='add'>+			if (type == FCU_FAN_RPM)</div><div class='add'>+				id = ((*reg) - 0x10) / 2;</div><div class='add'>+			else</div><div class='add'>+				id = ((*reg) - 0x30) / 2;</div><div class='add'>+			if (id &gt; 7) {</div><div class='add'>+				pr_warning("wf_fcu: Can't parse "</div><div class='add'>+				       "fan ID in device-tree for %s\n",</div><div class='add'>+					   np-&gt;full_name);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			wf_fcu_add_fan(pv, name, type, id);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devinit wf_fcu_default_fans(struct wf_fcu_priv *pv)</div><div class='add'>+{</div><div class='add'>+	/* We only support the default fans for PowerMac7,2 */</div><div class='add'>+	if (!of_machine_is_compatible("PowerMac7,2"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	wf_fcu_add_fan(pv, "backside-fan",	FCU_FAN_PWM, 1);</div><div class='add'>+	wf_fcu_add_fan(pv, "drive-bay-fan",	FCU_FAN_RPM, 2);</div><div class='add'>+	wf_fcu_add_fan(pv, "slots-fan",		FCU_FAN_PWM, 2);</div><div class='add'>+	wf_fcu_add_fan(pv, "cpu-front-fan-0",	FCU_FAN_RPM, 3);</div><div class='add'>+	wf_fcu_add_fan(pv, "cpu-rear-fan-0",	FCU_FAN_RPM, 4);</div><div class='add'>+	wf_fcu_add_fan(pv, "cpu-front-fan-1",	FCU_FAN_RPM, 5);</div><div class='add'>+	wf_fcu_add_fan(pv, "cpu-rear-fan-1",	FCU_FAN_RPM, 6);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit wf_fcu_init_chip(struct wf_fcu_priv *pv)</div><div class='add'>+{</div><div class='add'>+	unsigned char buf = 0xff;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = wf_fcu_write_reg(pv, 0xe, &amp;buf, 1);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return -EIO;</div><div class='add'>+	rc = wf_fcu_write_reg(pv, 0x2e, &amp;buf, 1);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return -EIO;</div><div class='add'>+	rc = wf_fcu_read_reg(pv, 0, &amp;buf, 1);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return -EIO;</div><div class='add'>+	pv-&gt;rpm_shift = (buf == 1) ? 2 : 3;</div><div class='add'>+</div><div class='add'>+	pr_debug("wf_fcu: FCU Initialized, RPM fan shift is %d\n",</div><div class='add'>+		 pv-&gt;rpm_shift);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit wf_fcu_probe(struct i2c_client *client,</div><div class='add'>+				  const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct wf_fcu_priv *pv;</div><div class='add'>+</div><div class='add'>+	pv = kzalloc(sizeof(*pv), GFP_KERNEL);</div><div class='add'>+	if (!pv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	kref_init(&amp;pv-&gt;ref);</div><div class='add'>+	mutex_init(&amp;pv-&gt;lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;pv-&gt;fan_list);</div><div class='add'>+	pv-&gt;i2c = client;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * First we must start the FCU which will query the</div><div class='add'>+	 * shift value to apply to RPMs</div><div class='add'>+	 */</div><div class='add'>+	if (wf_fcu_init_chip(pv)) {</div><div class='add'>+		pr_err("wf_fcu: Initialization failed !\n");</div><div class='add'>+		kfree(pv);</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* First lookup fans in the device-tree */</div><div class='add'>+	wf_fcu_lookup_fans(pv);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Older machines don't have the device-tree entries</div><div class='add'>+	 * we are looking for, just hard code the list</div><div class='add'>+	 */</div><div class='add'>+	if (list_empty(&amp;pv-&gt;fan_list))</div><div class='add'>+		wf_fcu_default_fans(pv);</div><div class='add'>+</div><div class='add'>+	/* Still no fans ? FAIL */</div><div class='add'>+	if (list_empty(&amp;pv-&gt;fan_list)) {</div><div class='add'>+		pr_err("wf_fcu: Failed to find fans for your machine\n");</div><div class='add'>+		kfree(pv);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;client-&gt;dev, pv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit wf_fcu_remove(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct wf_fcu_priv *pv = dev_get_drvdata(&amp;client-&gt;dev);</div><div class='add'>+	struct wf_fcu_fan *fan;</div><div class='add'>+</div><div class='add'>+	while (!list_empty(&amp;pv-&gt;fan_list)) {</div><div class='add'>+		fan = list_first_entry(&amp;pv-&gt;fan_list, struct wf_fcu_fan, link);</div><div class='add'>+		list_del(&amp;fan-&gt;link);</div><div class='add'>+		wf_unregister_control(&amp;fan-&gt;ctrl);</div><div class='add'>+	}</div><div class='add'>+	kref_put(&amp;pv-&gt;ref, wf_fcu_release);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id wf_fcu_id[] = {</div><div class='add'>+	{ "MAC,fcu", 0 },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, wf_fcu_id);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver wf_fcu_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "wf_fcu",</div><div class='add'>+	},</div><div class='add'>+	.probe		= wf_fcu_probe,</div><div class='add'>+	.remove		= wf_fcu_remove,</div><div class='add'>+	.id_table	= wf_fcu_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init wf_fcu_init(void)</div><div class='add'>+{</div><div class='add'>+	return i2c_add_driver(&amp;wf_fcu_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit wf_fcu_exit(void)</div><div class='add'>+{</div><div class='add'>+	i2c_del_driver(&amp;wf_fcu_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+module_init(wf_fcu_init);</div><div class='add'>+module_exit(wf_fcu_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("FCU control objects for PowerMacs thermal control");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='head'>diff --git a/drivers/macintosh/windfarm_lm75_sensor.c b/drivers/macintosh/windfarm_lm75_sensor.c<br/>index 4d6a90a1372b..b0c2d3695b34 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/windfarm_lm75_sensor.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/windfarm_lm75_sensor.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_lm75_sensor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_lm75_sensor.c</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "windfarm.h"</div><div class='ctx'> </div><div class='del'>-#define VERSION "0.2"</div><div class='add'>+#define VERSION "1.0"</div><div class='ctx'> </div><div class='ctx'> #undef DEBUG</div><div class='ctx'> </div><div class='hunk'>@@ -36,8 +36,8 @@</div><div class='ctx'> struct wf_lm75_sensor {</div><div class='ctx'> 	int			ds1775 : 1;</div><div class='ctx'> 	int			inited : 1;</div><div class='del'>-	struct 	i2c_client	*i2c;</div><div class='del'>-	struct 	wf_sensor	sens;</div><div class='add'>+	struct i2c_client	*i2c;</div><div class='add'>+	struct wf_sensor	sens;</div><div class='ctx'> };</div><div class='ctx'> #define wf_to_lm75(c) container_of(c, struct wf_lm75_sensor, sens)</div><div class='ctx'> </div><div class='hunk'>@@ -90,40 +90,19 @@ static struct wf_sensor_ops wf_lm75_ops = {</div><div class='ctx'> </div><div class='ctx'> static int wf_lm75_probe(struct i2c_client *client,</div><div class='ctx'> 			 const struct i2c_device_id *id)</div><div class='del'>-{</div><div class='add'>+{	</div><div class='ctx'> 	struct wf_lm75_sensor *lm;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	lm = kzalloc(sizeof(struct wf_lm75_sensor), GFP_KERNEL);</div><div class='del'>-	if (lm == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	lm-&gt;inited = 0;</div><div class='del'>-	lm-&gt;ds1775 = id-&gt;driver_data;</div><div class='del'>-	lm-&gt;i2c = client;</div><div class='del'>-	lm-&gt;sens.name = client-&gt;dev.platform_data;</div><div class='del'>-	lm-&gt;sens.ops = &amp;wf_lm75_ops;</div><div class='del'>-	i2c_set_clientdata(client, lm);</div><div class='del'>-</div><div class='del'>-	rc = wf_register_sensor(&amp;lm-&gt;sens);</div><div class='del'>-	if (rc)</div><div class='del'>-		kfree(lm);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct i2c_driver wf_lm75_driver;</div><div class='del'>-</div><div class='del'>-static struct i2c_client *wf_lm75_create(struct i2c_adapter *adapter,</div><div class='del'>-					     u8 addr, int ds1775,</div><div class='del'>-					     const char *loc)</div><div class='del'>-{</div><div class='del'>-	struct i2c_board_info info;</div><div class='del'>-	struct i2c_client *client;</div><div class='del'>-	char *name;</div><div class='add'>+	int rc, ds1775 = id-&gt;driver_data;</div><div class='add'>+	const char *name, *loc;</div><div class='ctx'> </div><div class='ctx'> 	DBG("wf_lm75: creating  %s device at address 0x%02x\n",</div><div class='del'>-	    ds1775 ? "ds1775" : "lm75", addr);</div><div class='add'>+	    ds1775 ? "ds1775" : "lm75", client-&gt;addr);</div><div class='add'>+</div><div class='add'>+	loc = of_get_property(client-&gt;dev.of_node, "hwsensor-location", NULL);</div><div class='add'>+	if (!loc) {</div><div class='add'>+		dev_warn(&amp;client-&gt;dev, "Missing hwsensor-location property!\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Usual rant about sensor names not beeing very consistent in</div><div class='ctx'> 	 * the device-tree, oh well ...</div><div class='hunk'>@@ -137,68 +116,31 @@ static struct i2c_client *wf_lm75_create(struct i2c_adapter *adapter,</div><div class='ctx'> 		name = "optical-drive-temp";</div><div class='ctx'> 	else if (!strcmp(loc, "HD Temp"))</div><div class='ctx'> 		name = "hard-drive-temp";</div><div class='add'>+	else if (!strcmp(loc, "PCI SLOTS"))</div><div class='add'>+		name = "slots-temp";</div><div class='add'>+	else if (!strcmp(loc, "CPU A INLET"))</div><div class='add'>+		name = "cpu-inlet-temp-0";</div><div class='add'>+	else if (!strcmp(loc, "CPU B INLET"))</div><div class='add'>+		name = "cpu-inlet-temp-1";</div><div class='ctx'> 	else</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	memset(&amp;info, 0, sizeof(struct i2c_board_info));</div><div class='del'>-	info.addr = (addr &gt;&gt; 1) &amp; 0x7f;</div><div class='del'>-	info.platform_data = name;</div><div class='del'>-	strlcpy(info.type, ds1775 ? "wf_ds1775" : "wf_lm75", I2C_NAME_SIZE);</div><div class='del'>-</div><div class='del'>-	client = i2c_new_device(adapter, &amp;info);</div><div class='del'>-	if (client == NULL) {</div><div class='del'>-		printk(KERN_ERR "windfarm: failed to attach %s %s to i2c\n",</div><div class='del'>-		       ds1775 ? "ds1775" : "lm75", name);</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Let i2c-core delete that device on driver removal.</div><div class='del'>-	 * This is safe because i2c-core holds the core_lock mutex for us.</div><div class='del'>-	 */</div><div class='del'>-	list_add_tail(&amp;client-&gt;detected, &amp;wf_lm75_driver.clients);</div><div class='del'>-	return client;</div><div class='del'>- fail:</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wf_lm75_attach(struct i2c_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	struct device_node *busnode, *dev;</div><div class='del'>-	struct pmac_i2c_bus *bus;</div><div class='add'>+		return -ENXIO;</div><div class='add'>+ 	</div><div class='ctx'> </div><div class='del'>-	DBG("wf_lm75: adapter %s detected\n", adapter-&gt;name);</div><div class='del'>-</div><div class='del'>-	bus = pmac_i2c_adapter_to_bus(adapter);</div><div class='del'>-	if (bus == NULL)</div><div class='add'>+	lm = kzalloc(sizeof(struct wf_lm75_sensor), GFP_KERNEL);</div><div class='add'>+	if (lm == NULL)</div><div class='ctx'> 		return -ENODEV;</div><div class='del'>-	busnode = pmac_i2c_get_bus_node(bus);</div><div class='ctx'> </div><div class='del'>-	DBG("wf_lm75: bus found, looking for device...\n");</div><div class='del'>-</div><div class='del'>-	/* Now look for lm75(s) in there */</div><div class='del'>-	for (dev = NULL;</div><div class='del'>-	     (dev = of_get_next_child(busnode, dev)) != NULL;) {</div><div class='del'>-		const char *loc =</div><div class='del'>-			of_get_property(dev, "hwsensor-location", NULL);</div><div class='del'>-		u8 addr;</div><div class='add'>+	lm-&gt;inited = 0;</div><div class='add'>+	lm-&gt;ds1775 = ds1775;</div><div class='add'>+	lm-&gt;i2c = client;</div><div class='add'>+	lm-&gt;sens.name = (char *)name; /* XXX fix constness in structure */</div><div class='add'>+	lm-&gt;sens.ops = &amp;wf_lm75_ops;</div><div class='add'>+	i2c_set_clientdata(client, lm);</div><div class='ctx'> </div><div class='del'>-		/* We must re-match the adapter in order to properly check</div><div class='del'>-		 * the channel on multibus setups</div><div class='del'>-		 */</div><div class='del'>-		if (!pmac_i2c_match_adapter(dev, adapter))</div><div class='del'>-			continue;</div><div class='del'>-		addr = pmac_i2c_get_dev_addr(dev);</div><div class='del'>-		if (loc == NULL || addr == 0)</div><div class='del'>-			continue;</div><div class='del'>-		/* real lm75 */</div><div class='del'>-		if (of_device_is_compatible(dev, "lm75"))</div><div class='del'>-			wf_lm75_create(adapter, addr, 0, loc);</div><div class='del'>-		/* ds1775 (compatible, better resolution */</div><div class='del'>-		else if (of_device_is_compatible(dev, "ds1775"))</div><div class='del'>-			wf_lm75_create(adapter, addr, 1, loc);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+	rc = wf_register_sensor(&amp;lm-&gt;sens);</div><div class='add'>+	if (rc)</div><div class='add'>+		kfree(lm);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int wf_lm75_remove(struct i2c_client *client)</div><div class='hunk'>@@ -217,16 +159,16 @@ static int wf_lm75_remove(struct i2c_client *client)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct i2c_device_id wf_lm75_id[] = {</div><div class='del'>-	{ "wf_lm75", 0 },</div><div class='del'>-	{ "wf_ds1775", 1 },</div><div class='add'>+	{ "MAC,lm75", 0 },</div><div class='add'>+	{ "MAC,ds1775", 1 },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, wf_lm75_id);</div><div class='ctx'> </div><div class='ctx'> static struct i2c_driver wf_lm75_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	= "wf_lm75",</div><div class='ctx'> 	},</div><div class='del'>-	.attach_adapter	= wf_lm75_attach,</div><div class='ctx'> 	.probe		= wf_lm75_probe,</div><div class='ctx'> 	.remove		= wf_lm75_remove,</div><div class='ctx'> 	.id_table	= wf_lm75_id,</div><div class='hunk'>@@ -234,11 +176,6 @@ static struct i2c_driver wf_lm75_driver = {</div><div class='ctx'> </div><div class='ctx'> static int __init wf_lm75_sensor_init(void)</div><div class='ctx'> {</div><div class='del'>-	/* Don't register on old machines that use therm_pm72 for now */</div><div class='del'>-	if (of_machine_is_compatible("PowerMac7,2") ||</div><div class='del'>-	    of_machine_is_compatible("PowerMac7,3") ||</div><div class='del'>-	    of_machine_is_compatible("RackMac3,1"))</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> 	return i2c_add_driver(&amp;wf_lm75_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/macintosh/windfarm_lm87_sensor.c b/drivers/macintosh/windfarm_lm87_sensor.c<br/>new file mode 100644<br/>index 000000000000..c071aab79dd1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_lm87_sensor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_lm87_sensor.c</a></div><div class='hunk'>@@ -0,0 +1,201 @@</div><div class='add'>+/*</div><div class='add'>+ * Windfarm PowerMac thermal control. LM87 sensor</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Benjamin Herrenschmidt, IBM Corp.</div><div class='add'>+ *</div><div class='add'>+ * Released under the term of the GNU GPL v2.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/wait.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;asm/prom.h&gt;</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='add'>+#include &lt;asm/pmac_low_i2c.h&gt;</div><div class='add'>+</div><div class='add'>+#include "windfarm.h"</div><div class='add'>+</div><div class='add'>+#define VERSION "1.0"</div><div class='add'>+</div><div class='add'>+#undef DEBUG</div><div class='add'>+</div><div class='add'>+#ifdef DEBUG</div><div class='add'>+#define DBG(args...)	printk(args)</div><div class='add'>+#else</div><div class='add'>+#define DBG(args...)	do { } while(0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+struct wf_lm87_sensor {</div><div class='add'>+	struct i2c_client	*i2c;</div><div class='add'>+	struct wf_sensor	sens;</div><div class='add'>+};</div><div class='add'>+#define wf_to_lm87(c) container_of(c, struct wf_lm87_sensor, sens)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int wf_lm87_read_reg(struct i2c_client *chip, int reg)</div><div class='add'>+{</div><div class='add'>+	int rc, tries = 0;</div><div class='add'>+	u8 buf;</div><div class='add'>+</div><div class='add'>+	for (;;) {</div><div class='add'>+		/* Set address */</div><div class='add'>+		buf = (u8)reg;</div><div class='add'>+		rc = i2c_master_send(chip, &amp;buf, 1);</div><div class='add'>+		if (rc &lt;= 0)</div><div class='add'>+			goto error;</div><div class='add'>+		rc = i2c_master_recv(chip, &amp;buf, 1);</div><div class='add'>+		if (rc &lt;= 0)</div><div class='add'>+			goto error;</div><div class='add'>+		return (int)buf;</div><div class='add'>+	error:</div><div class='add'>+		DBG("wf_lm87: Error reading LM87, retrying...\n");</div><div class='add'>+		if (++tries &gt; 10) {</div><div class='add'>+			printk(KERN_ERR "wf_lm87: Error reading LM87 !\n");</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+		msleep(10);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wf_lm87_get(struct wf_sensor *sr, s32 *value)</div><div class='add'>+{</div><div class='add'>+	struct wf_lm87_sensor *lm = sr-&gt;priv;</div><div class='add'>+	s32 temp;</div><div class='add'>+</div><div class='add'>+	if (lm-&gt;i2c == NULL)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+#define LM87_INT_TEMP		0x27</div><div class='add'>+</div><div class='add'>+	/* Read temperature register */</div><div class='add'>+	temp = wf_lm87_read_reg(lm-&gt;i2c, LM87_INT_TEMP);</div><div class='add'>+	if (temp &lt; 0)</div><div class='add'>+		return temp;</div><div class='add'>+	*value = temp &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wf_lm87_release(struct wf_sensor *sr)</div><div class='add'>+{</div><div class='add'>+	struct wf_lm87_sensor *lm = wf_to_lm87(sr);</div><div class='add'>+</div><div class='add'>+	kfree(lm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct wf_sensor_ops wf_lm87_ops = {</div><div class='add'>+	.get_value	= wf_lm87_get,</div><div class='add'>+	.release	= wf_lm87_release,</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int wf_lm87_probe(struct i2c_client *client,</div><div class='add'>+			 const struct i2c_device_id *id)</div><div class='add'>+{	</div><div class='add'>+	struct wf_lm87_sensor *lm;</div><div class='add'>+	const char *name = NULL, *loc;</div><div class='add'>+	struct device_node *np = NULL;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The lm87 contains a whole pile of sensors, additionally,</div><div class='add'>+	 * the Xserve G5 has several lm87's. However, for now we only</div><div class='add'>+	 * care about the internal temperature sensor</div><div class='add'>+	 */</div><div class='add'>+	while ((np = of_get_next_child(client-&gt;dev.of_node, np)) != NULL) {</div><div class='add'>+		if (strcmp(np-&gt;name, "int-temp"))</div><div class='add'>+			continue;</div><div class='add'>+		loc = of_get_property(np, "location", NULL);</div><div class='add'>+		if (!loc)</div><div class='add'>+			continue;</div><div class='add'>+		if (strstr(loc, "DIMM"))</div><div class='add'>+			name = "dimms-temp";</div><div class='add'>+		else if (strstr(loc, "Processors"))</div><div class='add'>+			name = "between-cpus-temp";</div><div class='add'>+		if (name) {</div><div class='add'>+			of_node_put(np);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (!name) {</div><div class='add'>+		pr_warning("wf_lm87: Unsupported sensor %s\n",</div><div class='add'>+			   client-&gt;dev.of_node-&gt;full_name);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lm = kzalloc(sizeof(struct wf_lm87_sensor), GFP_KERNEL);</div><div class='add'>+	if (lm == NULL)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	lm-&gt;i2c = client;</div><div class='add'>+	lm-&gt;sens.name = name;</div><div class='add'>+	lm-&gt;sens.ops = &amp;wf_lm87_ops;</div><div class='add'>+	lm-&gt;sens.priv = lm;</div><div class='add'>+	i2c_set_clientdata(client, lm);</div><div class='add'>+</div><div class='add'>+	rc = wf_register_sensor(&amp;lm-&gt;sens);</div><div class='add'>+	if (rc)</div><div class='add'>+		kfree(lm);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wf_lm87_remove(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct wf_lm87_sensor *lm = i2c_get_clientdata(client);</div><div class='add'>+</div><div class='add'>+	DBG("wf_lm87: i2c detatch called for %s\n", lm-&gt;sens.name);</div><div class='add'>+</div><div class='add'>+	/* Mark client detached */</div><div class='add'>+	lm-&gt;i2c = NULL;</div><div class='add'>+</div><div class='add'>+	/* release sensor */</div><div class='add'>+	wf_unregister_sensor(&amp;lm-&gt;sens);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id wf_lm87_id[] = {</div><div class='add'>+	{ "MAC,lm87cimt", 0 },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, wf_lm87_id);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver wf_lm87_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "wf_lm87",</div><div class='add'>+	},</div><div class='add'>+	.probe		= wf_lm87_probe,</div><div class='add'>+	.remove		= wf_lm87_remove,</div><div class='add'>+	.id_table	= wf_lm87_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init wf_lm87_sensor_init(void)</div><div class='add'>+{</div><div class='add'>+	/* We only support this on the Xserve */</div><div class='add'>+	if (!of_machine_is_compatible("RackMac3,1"))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return i2c_add_driver(&amp;wf_lm87_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit wf_lm87_sensor_exit(void)</div><div class='add'>+{</div><div class='add'>+	i2c_del_driver(&amp;wf_lm87_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+module_init(wf_lm87_sensor_init);</div><div class='add'>+module_exit(wf_lm87_sensor_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("LM87 sensor objects for PowerMacs thermal control");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='head'>diff --git a/drivers/macintosh/windfarm_max6690_sensor.c b/drivers/macintosh/windfarm_max6690_sensor.c<br/>index 8204113268f4..371b058d2f7d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/windfarm_max6690_sensor.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/windfarm_max6690_sensor.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_max6690_sensor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_max6690_sensor.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "windfarm.h"</div><div class='ctx'> </div><div class='del'>-#define VERSION "0.2"</div><div class='add'>+#define VERSION "1.0"</div><div class='ctx'> </div><div class='ctx'> /* This currently only exports the external temperature sensor,</div><div class='ctx'>    since that's all the control loops need. */</div><div class='hunk'>@@ -64,9 +64,29 @@ static struct wf_sensor_ops wf_max6690_ops = {</div><div class='ctx'> static int wf_max6690_probe(struct i2c_client *client,</div><div class='ctx'> 			    const struct i2c_device_id *id)</div><div class='ctx'> {</div><div class='add'>+	const char *name, *loc;</div><div class='ctx'> 	struct wf_6690_sensor *max;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='add'>+	loc = of_get_property(client-&gt;dev.of_node, "hwsensor-location", NULL);</div><div class='add'>+	if (!loc) {</div><div class='add'>+		dev_warn(&amp;client-&gt;dev, "Missing hwsensor-location property!\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We only expose the external temperature register for</div><div class='add'>+	 * now as this is all we need for our control loops</div><div class='add'>+	 */</div><div class='add'>+	if (!strcmp(loc, "BACKSIDE") || !strcmp(loc, "SYS CTRLR AMBIENT"))</div><div class='add'>+		name = "backside-temp";</div><div class='add'>+	else if (!strcmp(loc, "NB Ambient"))</div><div class='add'>+		name = "north-bridge-temp";</div><div class='add'>+	else if (!strcmp(loc, "GPU Ambient"))</div><div class='add'>+		name = "gpu-temp";</div><div class='add'>+	else</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='ctx'> 	max = kzalloc(sizeof(struct wf_6690_sensor), GFP_KERNEL);</div><div class='ctx'> 	if (max == NULL) {</div><div class='ctx'> 		printk(KERN_ERR "windfarm: Couldn't create MAX6690 sensor: "</div><div class='hunk'>@@ -75,90 +95,16 @@ static int wf_max6690_probe(struct i2c_client *client,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	max-&gt;i2c = client;</div><div class='del'>-	max-&gt;sens.name = client-&gt;dev.platform_data;</div><div class='add'>+	max-&gt;sens.name = (char *)name; /* XXX fix constness in structure */</div><div class='ctx'> 	max-&gt;sens.ops = &amp;wf_max6690_ops;</div><div class='ctx'> 	i2c_set_clientdata(client, max);</div><div class='ctx'> </div><div class='ctx'> 	rc = wf_register_sensor(&amp;max-&gt;sens);</div><div class='del'>-	if (rc) {</div><div class='add'>+	if (rc)</div><div class='ctx'> 		kfree(max);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct i2c_driver wf_max6690_driver;</div><div class='del'>-</div><div class='del'>-static struct i2c_client *wf_max6690_create(struct i2c_adapter *adapter,</div><div class='del'>-					    u8 addr, const char *loc)</div><div class='del'>-{</div><div class='del'>-	struct i2c_board_info info;</div><div class='del'>-	struct i2c_client *client;</div><div class='del'>-	char *name;</div><div class='del'>-</div><div class='del'>-	if (!strcmp(loc, "BACKSIDE"))</div><div class='del'>-		name = "backside-temp";</div><div class='del'>-	else if (!strcmp(loc, "NB Ambient"))</div><div class='del'>-		name = "north-bridge-temp";</div><div class='del'>-	else if (!strcmp(loc, "GPU Ambient"))</div><div class='del'>-		name = "gpu-temp";</div><div class='del'>-	else</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	memset(&amp;info, 0, sizeof(struct i2c_board_info));</div><div class='del'>-	info.addr = addr &gt;&gt; 1;</div><div class='del'>-	info.platform_data = name;</div><div class='del'>-	strlcpy(info.type, "wf_max6690", I2C_NAME_SIZE);</div><div class='del'>-</div><div class='del'>-	client = i2c_new_device(adapter, &amp;info);</div><div class='del'>-	if (client == NULL) {</div><div class='del'>-		printk(KERN_ERR "windfarm: failed to attach MAX6690 sensor\n");</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Let i2c-core delete that device on driver removal.</div><div class='del'>-	 * This is safe because i2c-core holds the core_lock mutex for us.</div><div class='del'>-	 */</div><div class='del'>-	list_add_tail(&amp;client-&gt;detected, &amp;wf_max6690_driver.clients);</div><div class='del'>-	return client;</div><div class='del'>-</div><div class='del'>- fail:</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wf_max6690_attach(struct i2c_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	struct device_node *busnode, *dev = NULL;</div><div class='del'>-	struct pmac_i2c_bus *bus;</div><div class='del'>-	const char *loc;</div><div class='del'>-</div><div class='del'>-	bus = pmac_i2c_adapter_to_bus(adapter);</div><div class='del'>-	if (bus == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	busnode = pmac_i2c_get_bus_node(bus);</div><div class='del'>-</div><div class='del'>-	while ((dev = of_get_next_child(busnode, dev)) != NULL) {</div><div class='del'>-		u8 addr;</div><div class='del'>-</div><div class='del'>-		/* We must re-match the adapter in order to properly check</div><div class='del'>-		 * the channel on multibus setups</div><div class='del'>-		 */</div><div class='del'>-		if (!pmac_i2c_match_adapter(dev, adapter))</div><div class='del'>-			continue;</div><div class='del'>-		if (!of_device_is_compatible(dev, "max6690"))</div><div class='del'>-			continue;</div><div class='del'>-		addr = pmac_i2c_get_dev_addr(dev);</div><div class='del'>-		loc = of_get_property(dev, "hwsensor-location", NULL);</div><div class='del'>-		if (loc == NULL || addr == 0)</div><div class='del'>-			continue;</div><div class='del'>-		printk("found max6690, loc=%s addr=0x%02x\n", loc, addr);</div><div class='del'>-		wf_max6690_create(adapter, addr, loc);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int wf_max6690_remove(struct i2c_client *client)</div><div class='ctx'> {</div><div class='ctx'> 	struct wf_6690_sensor *max = i2c_get_clientdata(client);</div><div class='hunk'>@@ -170,15 +116,15 @@ static int wf_max6690_remove(struct i2c_client *client)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct i2c_device_id wf_max6690_id[] = {</div><div class='del'>-	{ "wf_max6690", 0 },</div><div class='add'>+	{ "MAC,max6690", 0 },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, wf_max6690_id);</div><div class='ctx'> </div><div class='ctx'> static struct i2c_driver wf_max6690_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name		= "wf_max6690",</div><div class='ctx'> 	},</div><div class='del'>-	.attach_adapter	= wf_max6690_attach,</div><div class='ctx'> 	.probe		= wf_max6690_probe,</div><div class='ctx'> 	.remove		= wf_max6690_remove,</div><div class='ctx'> 	.id_table	= wf_max6690_id,</div><div class='hunk'>@@ -186,11 +132,6 @@ static struct i2c_driver wf_max6690_driver = {</div><div class='ctx'> </div><div class='ctx'> static int __init wf_max6690_sensor_init(void)</div><div class='ctx'> {</div><div class='del'>-	/* Don't register on old machines that use therm_pm72 for now */</div><div class='del'>-	if (of_machine_is_compatible("PowerMac7,2") ||</div><div class='del'>-	    of_machine_is_compatible("PowerMac7,3") ||</div><div class='del'>-	    of_machine_is_compatible("RackMac3,1"))</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> 	return i2c_add_driver(&amp;wf_max6690_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/macintosh/windfarm_mpu.h b/drivers/macintosh/windfarm_mpu.h<br/>new file mode 100644<br/>index 000000000000..046edc8c2ec5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_mpu.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_mpu.h</a></div><div class='hunk'>@@ -0,0 +1,105 @@</div><div class='add'>+/*</div><div class='add'>+ * Windfarm PowerMac thermal control</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Benjamin Herrenschmidt, IBM Corp.</div><div class='add'>+ *</div><div class='add'>+ * Released under the term of the GNU GPL v2.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __WINDFARM_MPU_H</div><div class='add'>+#define __WINDFARM_MPU_H</div><div class='add'>+</div><div class='add'>+typedef unsigned short fu16;</div><div class='add'>+typedef int fs32;</div><div class='add'>+typedef short fs16;</div><div class='add'>+</div><div class='add'>+/* Definition of the MPU data structure which contains per CPU</div><div class='add'>+ * calibration information (among others) for the G5 machines</div><div class='add'>+ */</div><div class='add'>+struct mpu_data</div><div class='add'>+{</div><div class='add'>+	u8	signature;		/* 0x00 - EEPROM sig. */</div><div class='add'>+	u8	bytes_used;		/* 0x01 - Bytes used in eeprom (160 ?) */</div><div class='add'>+	u8	size;			/* 0x02 - EEPROM size (256 ?) */</div><div class='add'>+	u8	version;		/* 0x03 - EEPROM version */</div><div class='add'>+	u32	data_revision;		/* 0x04 - Dataset revision */</div><div class='add'>+	u8	processor_bin_code[3];	/* 0x08 - Processor BIN code */</div><div class='add'>+	u8	bin_code_expansion;	/* 0x0b - ??? (padding ?) */</div><div class='add'>+	u8	processor_num;		/* 0x0c - Number of CPUs on this MPU */</div><div class='add'>+	u8	input_mul_bus_div;	/* 0x0d - Clock input multiplier/bus divider */</div><div class='add'>+	u8	reserved1[2];		/* 0x0e - */</div><div class='add'>+	u32	input_clk_freq_high;	/* 0x10 - Input clock frequency high */</div><div class='add'>+	u8	cpu_nb_target_cycles;	/* 0x14 - ??? */</div><div class='add'>+	u8	cpu_statlat;		/* 0x15 - ??? */</div><div class='add'>+	u8	cpu_snooplat;		/* 0x16 - ??? */</div><div class='add'>+	u8	cpu_snoopacc;		/* 0x17 - ??? */</div><div class='add'>+	u8	nb_paamwin;		/* 0x18 - ??? */</div><div class='add'>+	u8	nb_statlat;		/* 0x19 - ??? */</div><div class='add'>+	u8	nb_snooplat;		/* 0x1a - ??? */</div><div class='add'>+	u8	nb_snoopwin;		/* 0x1b - ??? */</div><div class='add'>+	u8	api_bus_mode;		/* 0x1c - ??? */</div><div class='add'>+	u8	reserved2[3];		/* 0x1d - */</div><div class='add'>+	u32	input_clk_freq_low;	/* 0x20 - Input clock frequency low */</div><div class='add'>+	u8	processor_card_slot;	/* 0x24 - Processor card slot number */</div><div class='add'>+	u8	reserved3[2];		/* 0x25 - */</div><div class='add'>+	u8	padjmax;       		/* 0x27 - Max power adjustment (Not in OF!) */</div><div class='add'>+	u8	ttarget;		/* 0x28 - Target temperature */</div><div class='add'>+	u8	tmax;			/* 0x29 - Max temperature */</div><div class='add'>+	u8	pmaxh;			/* 0x2a - Max power */</div><div class='add'>+	u8	tguardband;		/* 0x2b - Guardband temp ??? Hist. len in OSX */</div><div class='add'>+	fs32	pid_gp;			/* 0x2c - PID proportional gain */</div><div class='add'>+	fs32	pid_gr;			/* 0x30 - PID reset gain */</div><div class='add'>+	fs32	pid_gd;			/* 0x34 - PID derivative gain */</div><div class='add'>+	fu16	voph;			/* 0x38 - Vop High */</div><div class='add'>+	fu16	vopl;			/* 0x3a - Vop Low */</div><div class='add'>+	fs16	nactual_die;		/* 0x3c - nActual Die */</div><div class='add'>+	fs16	nactual_heatsink;	/* 0x3e - nActual Heatsink */</div><div class='add'>+	fs16	nactual_system;		/* 0x40 - nActual System */</div><div class='add'>+	u16	calibration_flags;	/* 0x42 - Calibration flags */</div><div class='add'>+	fu16	mdiode;			/* 0x44 - Diode M value (scaling factor) */</div><div class='add'>+	fs16	bdiode;			/* 0x46 - Diode B value (offset) */</div><div class='add'>+	fs32	theta_heat_sink;	/* 0x48 - Theta heat sink */</div><div class='add'>+	u16	rminn_intake_fan;	/* 0x4c - Intake fan min RPM */</div><div class='add'>+	u16	rmaxn_intake_fan;	/* 0x4e - Intake fan max RPM */</div><div class='add'>+	u16	rminn_exhaust_fan;	/* 0x50 - Exhaust fan min RPM */</div><div class='add'>+	u16	rmaxn_exhaust_fan;	/* 0x52 - Exhaust fan max RPM */</div><div class='add'>+	u8	processor_part_num[8];	/* 0x54 - Processor part number XX pumps min/max */</div><div class='add'>+	u32	processor_lot_num;	/* 0x5c - Processor lot number */</div><div class='add'>+	u8	orig_card_sernum[0x10];	/* 0x60 - Card original serial number */</div><div class='add'>+	u8	curr_card_sernum[0x10];	/* 0x70 - Card current serial number */</div><div class='add'>+	u8	mlb_sernum[0x18];	/* 0x80 - MLB serial number */</div><div class='add'>+	u32	checksum1;		/* 0x98 - */</div><div class='add'>+	u32	checksum2;		/* 0x9c - */	</div><div class='add'>+}; /* Total size = 0xa0 */</div><div class='add'>+</div><div class='add'>+static inline const struct mpu_data *wf_get_mpu(int cpu)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	char nodename[64];</div><div class='add'>+	const void *data;</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * prom.c routine for finding a node by path is a bit brain dead</div><div class='add'>+	 * and requires exact @xxx unit numbers. This is a bit ugly but</div><div class='add'>+	 * will work for these machines</div><div class='add'>+	 */</div><div class='add'>+	sprintf(nodename, "/u3@0,f8000000/i2c@f8001000/cpuid@a%d", cpu ? 2 : 0);</div><div class='add'>+	np = of_find_node_by_path(nodename);</div><div class='add'>+	if (!np)</div><div class='add'>+		return NULL;</div><div class='add'>+	data = of_get_property(np, "cpuid", &amp;len);	</div><div class='add'>+	of_node_put(np);</div><div class='add'>+	if (!data)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We are naughty, we have dropped the reference to the device</div><div class='add'>+	 * node and still return a pointer to the content. We know we</div><div class='add'>+	 * can do that though as this is only ever called on PowerMac</div><div class='add'>+	 * which cannot remove those nodes</div><div class='add'>+	 */</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /*  __WINDFARM_MPU_H */</div><div class='head'>diff --git a/drivers/macintosh/windfarm_pm72.c b/drivers/macintosh/windfarm_pm72.c<br/>new file mode 100644<br/>index 000000000000..84ac913d7e3a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_pm72.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_pm72.c</a></div><div class='hunk'>@@ -0,0 +1,847 @@</div><div class='add'>+/*</div><div class='add'>+ * Windfarm PowerMac thermal control.</div><div class='add'>+ * Control loops for PowerMac7,2 and 7,3</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Benjamin Herrenschmidt, IBM Corp.</div><div class='add'>+ *</div><div class='add'>+ * Use and redistribute under the terms of the GNU GPL v2.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/reboot.h&gt;</div><div class='add'>+#include &lt;asm/prom.h&gt;</div><div class='add'>+#include &lt;asm/smu.h&gt;</div><div class='add'>+</div><div class='add'>+#include "windfarm.h"</div><div class='add'>+#include "windfarm_pid.h"</div><div class='add'>+#include "windfarm_mpu.h"</div><div class='add'>+</div><div class='add'>+#define VERSION "1.0"</div><div class='add'>+</div><div class='add'>+#undef DEBUG</div><div class='add'>+#undef LOTSA_DEBUG</div><div class='add'>+</div><div class='add'>+#ifdef DEBUG</div><div class='add'>+#define DBG(args...)	printk(args)</div><div class='add'>+#else</div><div class='add'>+#define DBG(args...)	do { } while(0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef LOTSA_DEBUG</div><div class='add'>+#define DBG_LOTS(args...)	printk(args)</div><div class='add'>+#else</div><div class='add'>+#define DBG_LOTS(args...)	do { } while(0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* define this to force CPU overtemp to 60 degree, useful for testing</div><div class='add'>+ * the overtemp code</div><div class='add'>+ */</div><div class='add'>+#undef HACKED_OVERTEMP</div><div class='add'>+</div><div class='add'>+/* We currently only handle 2 chips */</div><div class='add'>+#define NR_CHIPS	2</div><div class='add'>+#define NR_CPU_FANS	3 * NR_CHIPS</div><div class='add'>+</div><div class='add'>+/* Controls and sensors */</div><div class='add'>+static struct wf_sensor *sens_cpu_temp[NR_CHIPS];</div><div class='add'>+static struct wf_sensor *sens_cpu_volts[NR_CHIPS];</div><div class='add'>+static struct wf_sensor *sens_cpu_amps[NR_CHIPS];</div><div class='add'>+static struct wf_sensor *backside_temp;</div><div class='add'>+static struct wf_sensor *drives_temp;</div><div class='add'>+</div><div class='add'>+static struct wf_control *cpu_front_fans[NR_CHIPS];</div><div class='add'>+static struct wf_control *cpu_rear_fans[NR_CHIPS];</div><div class='add'>+static struct wf_control *cpu_pumps[NR_CHIPS];</div><div class='add'>+static struct wf_control *backside_fan;</div><div class='add'>+static struct wf_control *drives_fan;</div><div class='add'>+static struct wf_control *slots_fan;</div><div class='add'>+static struct wf_control *cpufreq_clamp;</div><div class='add'>+</div><div class='add'>+/* We keep a temperature history for average calculation of 180s */</div><div class='add'>+#define CPU_TEMP_HIST_SIZE	180</div><div class='add'>+</div><div class='add'>+/* Fixed speed for slot fan */</div><div class='add'>+#define	SLOTS_FAN_DEFAULT_PWM	40</div><div class='add'>+</div><div class='add'>+/* Scale value for CPU intake fans */</div><div class='add'>+#define CPU_INTAKE_SCALE	0x0000f852</div><div class='add'>+</div><div class='add'>+/* PID loop state */</div><div class='add'>+static const struct mpu_data *cpu_mpu_data[NR_CHIPS];</div><div class='add'>+static struct wf_cpu_pid_state cpu_pid[NR_CHIPS];</div><div class='add'>+static bool cpu_pid_combined;</div><div class='add'>+static u32 cpu_thist[CPU_TEMP_HIST_SIZE];</div><div class='add'>+static int cpu_thist_pt;</div><div class='add'>+static s64 cpu_thist_total;</div><div class='add'>+static s32 cpu_all_tmax = 100 &lt;&lt; 16;</div><div class='add'>+static struct wf_pid_state backside_pid;</div><div class='add'>+static int backside_tick;</div><div class='add'>+static struct wf_pid_state drives_pid;</div><div class='add'>+static int drives_tick;</div><div class='add'>+</div><div class='add'>+static int nr_chips;</div><div class='add'>+static bool have_all_controls;</div><div class='add'>+static bool have_all_sensors;</div><div class='add'>+static bool started;</div><div class='add'>+</div><div class='add'>+static int failure_state;</div><div class='add'>+#define FAILURE_SENSOR		1</div><div class='add'>+#define FAILURE_FAN		2</div><div class='add'>+#define FAILURE_PERM		4</div><div class='add'>+#define FAILURE_LOW_OVERTEMP	8</div><div class='add'>+#define FAILURE_HIGH_OVERTEMP	16</div><div class='add'>+</div><div class='add'>+/* Overtemp values */</div><div class='add'>+#define LOW_OVER_AVERAGE	0</div><div class='add'>+#define LOW_OVER_IMMEDIATE	(10 &lt;&lt; 16)</div><div class='add'>+#define LOW_OVER_CLEAR		((-10) &lt;&lt; 16)</div><div class='add'>+#define HIGH_OVER_IMMEDIATE	(14 &lt;&lt; 16)</div><div class='add'>+#define HIGH_OVER_AVERAGE	(10 &lt;&lt; 16)</div><div class='add'>+#define HIGH_OVER_IMMEDIATE	(14 &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void cpu_max_all_fans(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* We max all CPU fans in case of a sensor error. We also do the</div><div class='add'>+	 * cpufreq clamping now, even if it's supposedly done later by the</div><div class='add'>+	 * generic code anyway, we do it earlier here to react faster</div><div class='add'>+	 */</div><div class='add'>+	if (cpufreq_clamp)</div><div class='add'>+		wf_control_set_max(cpufreq_clamp);</div><div class='add'>+	for (i = 0; i &lt; nr_chips; i++) {</div><div class='add'>+		if (cpu_front_fans[i])</div><div class='add'>+			wf_control_set_max(cpu_front_fans[i]);</div><div class='add'>+		if (cpu_rear_fans[i])</div><div class='add'>+			wf_control_set_max(cpu_rear_fans[i]);</div><div class='add'>+		if (cpu_pumps[i])</div><div class='add'>+			wf_control_set_max(cpu_pumps[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cpu_check_overtemp(s32 temp)</div><div class='add'>+{</div><div class='add'>+	int new_state = 0;</div><div class='add'>+	s32 t_avg, t_old;</div><div class='add'>+	static bool first = true;</div><div class='add'>+</div><div class='add'>+	/* First check for immediate overtemps */</div><div class='add'>+	if (temp &gt;= (cpu_all_tmax + LOW_OVER_IMMEDIATE)) {</div><div class='add'>+		new_state |= FAILURE_LOW_OVERTEMP;</div><div class='add'>+		if ((failure_state &amp; FAILURE_LOW_OVERTEMP) == 0)</div><div class='add'>+			printk(KERN_ERR "windfarm: Overtemp due to immediate CPU"</div><div class='add'>+			       " temperature !\n");</div><div class='add'>+	}</div><div class='add'>+	if (temp &gt;= (cpu_all_tmax + HIGH_OVER_IMMEDIATE)) {</div><div class='add'>+		new_state |= FAILURE_HIGH_OVERTEMP;</div><div class='add'>+		if ((failure_state &amp; FAILURE_HIGH_OVERTEMP) == 0)</div><div class='add'>+			printk(KERN_ERR "windfarm: Critical overtemp due to"</div><div class='add'>+			       " immediate CPU temperature !\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The first time around, initialize the array with the first</div><div class='add'>+	 * temperature reading</div><div class='add'>+	 */</div><div class='add'>+	if (first) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		cpu_thist_total = 0;</div><div class='add'>+		for (i = 0; i &lt; CPU_TEMP_HIST_SIZE; i++) {</div><div class='add'>+			cpu_thist[i] = temp;</div><div class='add'>+			cpu_thist_total += temp;</div><div class='add'>+		}</div><div class='add'>+		first = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We calculate a history of max temperatures and use that for the</div><div class='add'>+	 * overtemp management</div><div class='add'>+	 */</div><div class='add'>+	t_old = cpu_thist[cpu_thist_pt];</div><div class='add'>+	cpu_thist[cpu_thist_pt] = temp;</div><div class='add'>+	cpu_thist_pt = (cpu_thist_pt + 1) % CPU_TEMP_HIST_SIZE;</div><div class='add'>+	cpu_thist_total -= t_old;</div><div class='add'>+	cpu_thist_total += temp;</div><div class='add'>+	t_avg = cpu_thist_total / CPU_TEMP_HIST_SIZE;</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("  t_avg = %d.%03d (out: %d.%03d, in: %d.%03d)\n",</div><div class='add'>+		 FIX32TOPRINT(t_avg), FIX32TOPRINT(t_old), FIX32TOPRINT(temp));</div><div class='add'>+</div><div class='add'>+	/* Now check for average overtemps */</div><div class='add'>+	if (t_avg &gt;= (cpu_all_tmax + LOW_OVER_AVERAGE)) {</div><div class='add'>+		new_state |= FAILURE_LOW_OVERTEMP;</div><div class='add'>+		if ((failure_state &amp; FAILURE_LOW_OVERTEMP) == 0)</div><div class='add'>+			printk(KERN_ERR "windfarm: Overtemp due to average CPU"</div><div class='add'>+			       " temperature !\n");</div><div class='add'>+	}</div><div class='add'>+	if (t_avg &gt;= (cpu_all_tmax + HIGH_OVER_AVERAGE)) {</div><div class='add'>+		new_state |= FAILURE_HIGH_OVERTEMP;</div><div class='add'>+		if ((failure_state &amp; FAILURE_HIGH_OVERTEMP) == 0)</div><div class='add'>+			printk(KERN_ERR "windfarm: Critical overtemp due to"</div><div class='add'>+			       " average CPU temperature !\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Now handle overtemp conditions. We don't currently use the windfarm</div><div class='add'>+	 * overtemp handling core as it's not fully suited to the needs of those</div><div class='add'>+	 * new machine. This will be fixed later.</div><div class='add'>+	 */</div><div class='add'>+	if (new_state) {</div><div class='add'>+		/* High overtemp -&gt; immediate shutdown */</div><div class='add'>+		if (new_state &amp; FAILURE_HIGH_OVERTEMP)</div><div class='add'>+			machine_power_off();</div><div class='add'>+		if ((failure_state &amp; new_state) != new_state)</div><div class='add'>+			cpu_max_all_fans();</div><div class='add'>+		failure_state |= new_state;</div><div class='add'>+	} else if ((failure_state &amp; FAILURE_LOW_OVERTEMP) &amp;&amp;</div><div class='add'>+		   (temp &lt; (cpu_all_tmax + LOW_OVER_CLEAR))) {</div><div class='add'>+		printk(KERN_ERR "windfarm: Overtemp condition cleared !\n");</div><div class='add'>+		failure_state &amp;= ~FAILURE_LOW_OVERTEMP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return failure_state &amp; (FAILURE_LOW_OVERTEMP | FAILURE_HIGH_OVERTEMP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int read_one_cpu_vals(int cpu, s32 *temp, s32 *power)</div><div class='add'>+{</div><div class='add'>+	s32 dtemp, volts, amps;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* Get diode temperature */</div><div class='add'>+	rc = wf_sensor_get(sens_cpu_temp[cpu], &amp;dtemp);</div><div class='add'>+	if (rc) {</div><div class='add'>+		DBG("  CPU%d: temp reading error !\n", cpu);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	DBG_LOTS("  CPU%d: temp   = %d.%03d\n", cpu, FIX32TOPRINT((dtemp)));</div><div class='add'>+	*temp = dtemp;</div><div class='add'>+</div><div class='add'>+	/* Get voltage */</div><div class='add'>+	rc = wf_sensor_get(sens_cpu_volts[cpu], &amp;volts);</div><div class='add'>+	if (rc) {</div><div class='add'>+		DBG("  CPU%d, volts reading error !\n", cpu);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	DBG_LOTS("  CPU%d: volts  = %d.%03d\n", cpu, FIX32TOPRINT((volts)));</div><div class='add'>+</div><div class='add'>+	/* Get current */</div><div class='add'>+	rc = wf_sensor_get(sens_cpu_amps[cpu], &amp;amps);</div><div class='add'>+	if (rc) {</div><div class='add'>+		DBG("  CPU%d, current reading error !\n", cpu);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	DBG_LOTS("  CPU%d: amps   = %d.%03d\n", cpu, FIX32TOPRINT((amps)));</div><div class='add'>+</div><div class='add'>+	/* Calculate power */</div><div class='add'>+</div><div class='add'>+	/* Scale voltage and current raw sensor values according to fixed scales</div><div class='add'>+	 * obtained in Darwin and calculate power from I and V</div><div class='add'>+	 */</div><div class='add'>+	*power = (((u64)volts) * ((u64)amps)) &gt;&gt; 16;</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("  CPU%d: power  = %d.%03d\n", cpu, FIX32TOPRINT((*power)));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cpu_fans_tick_split(void)</div><div class='add'>+{</div><div class='add'>+	int err, cpu;</div><div class='add'>+	s32 intake, temp, power, t_max = 0;</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("* cpu fans_tick_split()\n");</div><div class='add'>+</div><div class='add'>+	for (cpu = 0; cpu &lt; nr_chips; ++cpu) {</div><div class='add'>+		struct wf_cpu_pid_state *sp = &amp;cpu_pid[cpu];</div><div class='add'>+</div><div class='add'>+		/* Read current speed */</div><div class='add'>+		wf_control_get(cpu_rear_fans[cpu], &amp;sp-&gt;target);</div><div class='add'>+</div><div class='add'>+		DBG_LOTS("  CPU%d: cur_target = %d RPM\n", cpu, sp-&gt;target);</div><div class='add'>+</div><div class='add'>+		err = read_one_cpu_vals(cpu, &amp;temp, &amp;power);</div><div class='add'>+		if (err) {</div><div class='add'>+			failure_state |= FAILURE_SENSOR;</div><div class='add'>+			cpu_max_all_fans();</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Keep track of highest temp */</div><div class='add'>+		t_max = max(t_max, temp);</div><div class='add'>+</div><div class='add'>+		/* Handle possible overtemps */</div><div class='add'>+		if (cpu_check_overtemp(t_max))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		/* Run PID */</div><div class='add'>+		wf_cpu_pid_run(sp, power, temp);</div><div class='add'>+</div><div class='add'>+		DBG_LOTS("  CPU%d: target = %d RPM\n", cpu, sp-&gt;target);</div><div class='add'>+</div><div class='add'>+		/* Apply result directly to exhaust fan */</div><div class='add'>+		err = wf_control_set(cpu_rear_fans[cpu], sp-&gt;target);</div><div class='add'>+		if (err) {</div><div class='add'>+			pr_warning("wf_pm72: Fan %s reports error %d\n",</div><div class='add'>+			       cpu_rear_fans[cpu]-&gt;name, err);</div><div class='add'>+			failure_state |= FAILURE_FAN;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Scale result for intake fan */</div><div class='add'>+		intake = (sp-&gt;target * CPU_INTAKE_SCALE) &gt;&gt; 16;</div><div class='add'>+		DBG_LOTS("  CPU%d: intake = %d RPM\n", cpu, intake);</div><div class='add'>+		err = wf_control_set(cpu_front_fans[cpu], intake);</div><div class='add'>+		if (err) {</div><div class='add'>+			pr_warning("wf_pm72: Fan %s reports error %d\n",</div><div class='add'>+			       cpu_front_fans[cpu]-&gt;name, err);</div><div class='add'>+			failure_state |= FAILURE_FAN;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cpu_fans_tick_combined(void)</div><div class='add'>+{</div><div class='add'>+	s32 temp0, power0, temp1, power1, t_max = 0;</div><div class='add'>+	s32 temp, power, intake, pump;</div><div class='add'>+	struct wf_control *pump0, *pump1;</div><div class='add'>+	struct wf_cpu_pid_state *sp = &amp;cpu_pid[0];</div><div class='add'>+	int err, cpu;</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("* cpu fans_tick_combined()\n");</div><div class='add'>+</div><div class='add'>+	/* Read current speed from cpu 0 */</div><div class='add'>+	wf_control_get(cpu_rear_fans[0], &amp;sp-&gt;target);</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("  CPUs: cur_target = %d RPM\n", sp-&gt;target);</div><div class='add'>+</div><div class='add'>+	/* Read values for both CPUs */</div><div class='add'>+	err = read_one_cpu_vals(0, &amp;temp0, &amp;power0);</div><div class='add'>+	if (err) {</div><div class='add'>+		failure_state |= FAILURE_SENSOR;</div><div class='add'>+		cpu_max_all_fans();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	err = read_one_cpu_vals(1, &amp;temp1, &amp;power1);</div><div class='add'>+	if (err) {</div><div class='add'>+		failure_state |= FAILURE_SENSOR;</div><div class='add'>+		cpu_max_all_fans();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Keep track of highest temp */</div><div class='add'>+	t_max = max(t_max, max(temp0, temp1));</div><div class='add'>+</div><div class='add'>+	/* Handle possible overtemps */</div><div class='add'>+	if (cpu_check_overtemp(t_max))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Use the max temp &amp; power of both */</div><div class='add'>+	temp = max(temp0, temp1);</div><div class='add'>+	power = max(power0, power1);</div><div class='add'>+</div><div class='add'>+	/* Run PID */</div><div class='add'>+	wf_cpu_pid_run(sp, power, temp);</div><div class='add'>+</div><div class='add'>+	/* Scale result for intake fan */</div><div class='add'>+	intake = (sp-&gt;target * CPU_INTAKE_SCALE) &gt;&gt; 16;</div><div class='add'>+</div><div class='add'>+	/* Same deal with pump speed */</div><div class='add'>+	pump0 = cpu_pumps[0];</div><div class='add'>+	pump1 = cpu_pumps[1];</div><div class='add'>+	if (!pump0) {</div><div class='add'>+		pump0 = pump1;</div><div class='add'>+		pump1 = NULL;</div><div class='add'>+	}</div><div class='add'>+	pump = (sp-&gt;target * wf_control_get_max(pump0)) /</div><div class='add'>+		cpu_mpu_data[0]-&gt;rmaxn_exhaust_fan;</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("  CPUs: target = %d RPM\n", sp-&gt;target);</div><div class='add'>+	DBG_LOTS("  CPUs: intake = %d RPM\n", intake);</div><div class='add'>+	DBG_LOTS("  CPUs: pump   = %d RPM\n", pump);</div><div class='add'>+</div><div class='add'>+	for (cpu = 0; cpu &lt; nr_chips; cpu++) {</div><div class='add'>+		err = wf_control_set(cpu_rear_fans[cpu], sp-&gt;target);</div><div class='add'>+		if (err) {</div><div class='add'>+			pr_warning("wf_pm72: Fan %s reports error %d\n",</div><div class='add'>+				   cpu_rear_fans[cpu]-&gt;name, err);</div><div class='add'>+			failure_state |= FAILURE_FAN;</div><div class='add'>+		}</div><div class='add'>+		err = wf_control_set(cpu_front_fans[cpu], intake);</div><div class='add'>+		if (err) {</div><div class='add'>+			pr_warning("wf_pm72: Fan %s reports error %d\n",</div><div class='add'>+				   cpu_front_fans[cpu]-&gt;name, err);</div><div class='add'>+			failure_state |= FAILURE_FAN;</div><div class='add'>+		}</div><div class='add'>+		err = 0;</div><div class='add'>+		if (cpu_pumps[cpu])</div><div class='add'>+			err = wf_control_set(cpu_pumps[cpu], pump);</div><div class='add'>+		if (err) {</div><div class='add'>+			pr_warning("wf_pm72: Pump %s reports error %d\n",</div><div class='add'>+				   cpu_pumps[cpu]-&gt;name, err);</div><div class='add'>+			failure_state |= FAILURE_FAN;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Implementation... */</div><div class='add'>+static int cpu_setup_pid(int cpu)</div><div class='add'>+{</div><div class='add'>+	struct wf_cpu_pid_param pid;</div><div class='add'>+	const struct mpu_data *mpu = cpu_mpu_data[cpu];</div><div class='add'>+	s32 tmax, ttarget, ptarget;</div><div class='add'>+	int fmin, fmax, hsize;</div><div class='add'>+</div><div class='add'>+	/* Get PID params from the appropriate MPU EEPROM */</div><div class='add'>+	tmax = mpu-&gt;tmax &lt;&lt; 16;</div><div class='add'>+	ttarget = mpu-&gt;ttarget &lt;&lt; 16;</div><div class='add'>+	ptarget = ((s32)(mpu-&gt;pmaxh - mpu-&gt;padjmax)) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	DBG("wf_72: CPU%d ttarget = %d.%03d, tmax = %d.%03d\n",</div><div class='add'>+	    cpu, FIX32TOPRINT(ttarget), FIX32TOPRINT(tmax));</div><div class='add'>+</div><div class='add'>+	/* We keep a global tmax for overtemp calculations */</div><div class='add'>+	if (tmax &lt; cpu_all_tmax)</div><div class='add'>+		cpu_all_tmax = tmax;</div><div class='add'>+</div><div class='add'>+	/* Set PID min/max by using the rear fan min/max */</div><div class='add'>+	fmin = wf_control_get_min(cpu_rear_fans[cpu]);</div><div class='add'>+	fmax = wf_control_get_max(cpu_rear_fans[cpu]);</div><div class='add'>+	DBG("wf_72: CPU%d max RPM range = [%d..%d]\n", cpu, fmin, fmax);</div><div class='add'>+</div><div class='add'>+	/* History size */</div><div class='add'>+	hsize = min_t(int, mpu-&gt;tguardband, WF_PID_MAX_HISTORY);</div><div class='add'>+	DBG("wf_72: CPU%d history size = %d\n", cpu, hsize);</div><div class='add'>+</div><div class='add'>+	/* Initialize PID loop */</div><div class='add'>+	pid.interval	= 1;	/* seconds */</div><div class='add'>+	pid.history_len = hsize;</div><div class='add'>+	pid.gd		= mpu-&gt;pid_gd;</div><div class='add'>+	pid.gp		= mpu-&gt;pid_gp;</div><div class='add'>+	pid.gr		= mpu-&gt;pid_gr;</div><div class='add'>+	pid.tmax	= tmax;</div><div class='add'>+	pid.ttarget	= ttarget;</div><div class='add'>+	pid.pmaxadj	= ptarget;</div><div class='add'>+	pid.min		= fmin;</div><div class='add'>+	pid.max		= fmax;</div><div class='add'>+</div><div class='add'>+	wf_cpu_pid_init(&amp;cpu_pid[cpu], &amp;pid);</div><div class='add'>+	cpu_pid[cpu].target = 1000;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Backside/U3 fan */</div><div class='add'>+static struct wf_pid_param backside_u3_param = {</div><div class='add'>+	.interval	= 5,</div><div class='add'>+	.history_len	= 2,</div><div class='add'>+	.gd		= 40 &lt;&lt; 20,</div><div class='add'>+	.gp		= 5 &lt;&lt; 20,</div><div class='add'>+	.gr		= 0,</div><div class='add'>+	.itarget	= 65 &lt;&lt; 16,</div><div class='add'>+	.additive	= 1,</div><div class='add'>+	.min		= 20,</div><div class='add'>+	.max		= 100,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct wf_pid_param backside_u3h_param = {</div><div class='add'>+	.interval	= 5,</div><div class='add'>+	.history_len	= 2,</div><div class='add'>+	.gd		= 20 &lt;&lt; 20,</div><div class='add'>+	.gp		= 5 &lt;&lt; 20,</div><div class='add'>+	.gr		= 0,</div><div class='add'>+	.itarget	= 75 &lt;&lt; 16,</div><div class='add'>+	.additive	= 1,</div><div class='add'>+	.min		= 20,</div><div class='add'>+	.max		= 100,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void backside_fan_tick(void)</div><div class='add'>+{</div><div class='add'>+	s32 temp;</div><div class='add'>+	int speed;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!backside_fan || !backside_temp || !backside_tick)</div><div class='add'>+		return;</div><div class='add'>+	if (--backside_tick &gt; 0)</div><div class='add'>+		return;</div><div class='add'>+	backside_tick = backside_pid.param.interval;</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("* backside fans tick\n");</div><div class='add'>+</div><div class='add'>+	/* Update fan speed from actual fans */</div><div class='add'>+	err = wf_control_get(backside_fan, &amp;speed);</div><div class='add'>+	if (!err)</div><div class='add'>+		backside_pid.target = speed;</div><div class='add'>+</div><div class='add'>+	err = wf_sensor_get(backside_temp, &amp;temp);</div><div class='add'>+	if (err) {</div><div class='add'>+		printk(KERN_WARNING "windfarm: U4 temp sensor error %d\n",</div><div class='add'>+		       err);</div><div class='add'>+		failure_state |= FAILURE_SENSOR;</div><div class='add'>+		wf_control_set_max(backside_fan);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	speed = wf_pid_run(&amp;backside_pid, temp);</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("backside PID temp=%d.%.3d speed=%d\n",</div><div class='add'>+		 FIX32TOPRINT(temp), speed);</div><div class='add'>+</div><div class='add'>+	err = wf_control_set(backside_fan, speed);</div><div class='add'>+	if (err) {</div><div class='add'>+		printk(KERN_WARNING "windfarm: backside fan error %d\n", err);</div><div class='add'>+		failure_state |= FAILURE_FAN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void backside_setup_pid(void)</div><div class='add'>+{</div><div class='add'>+	/* first time initialize things */</div><div class='add'>+	s32 fmin = wf_control_get_min(backside_fan);</div><div class='add'>+	s32 fmax = wf_control_get_max(backside_fan);</div><div class='add'>+	struct wf_pid_param param;</div><div class='add'>+	struct device_node *u3;</div><div class='add'>+	int u3h = 1; /* conservative by default */</div><div class='add'>+</div><div class='add'>+	u3 = of_find_node_by_path("/u3@0,f8000000");</div><div class='add'>+	if (u3 != NULL) {</div><div class='add'>+		const u32 *vers = of_get_property(u3, "device-rev", NULL);</div><div class='add'>+		if (vers)</div><div class='add'>+			if (((*vers) &amp; 0x3f) &lt; 0x34)</div><div class='add'>+				u3h = 0;</div><div class='add'>+		of_node_put(u3);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	param = u3h ? backside_u3h_param : backside_u3_param;</div><div class='add'>+</div><div class='add'>+	param.min = max(param.min, fmin);</div><div class='add'>+	param.max = min(param.max, fmax);</div><div class='add'>+	wf_pid_init(&amp;backside_pid, &amp;param);</div><div class='add'>+	backside_tick = 1;</div><div class='add'>+</div><div class='add'>+	pr_info("wf_pm72: Backside control loop started.\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Drive bay fan */</div><div class='add'>+static const struct wf_pid_param drives_param = {</div><div class='add'>+	.interval	= 5,</div><div class='add'>+	.history_len	= 2,</div><div class='add'>+	.gd		= 30 &lt;&lt; 20,</div><div class='add'>+	.gp		= 5 &lt;&lt; 20,</div><div class='add'>+	.gr		= 0,</div><div class='add'>+	.itarget	= 40 &lt;&lt; 16,</div><div class='add'>+	.additive	= 1,</div><div class='add'>+	.min		= 300,</div><div class='add'>+	.max		= 4000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void drives_fan_tick(void)</div><div class='add'>+{</div><div class='add'>+	s32 temp;</div><div class='add'>+	int speed;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!drives_fan || !drives_temp || !drives_tick)</div><div class='add'>+		return;</div><div class='add'>+	if (--drives_tick &gt; 0)</div><div class='add'>+		return;</div><div class='add'>+	drives_tick = drives_pid.param.interval;</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("* drives fans tick\n");</div><div class='add'>+</div><div class='add'>+	/* Update fan speed from actual fans */</div><div class='add'>+	err = wf_control_get(drives_fan, &amp;speed);</div><div class='add'>+	if (!err)</div><div class='add'>+		drives_pid.target = speed;</div><div class='add'>+</div><div class='add'>+	err = wf_sensor_get(drives_temp, &amp;temp);</div><div class='add'>+	if (err) {</div><div class='add'>+		pr_warning("wf_pm72: drive bay temp sensor error %d\n", err);</div><div class='add'>+		failure_state |= FAILURE_SENSOR;</div><div class='add'>+		wf_control_set_max(drives_fan);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	speed = wf_pid_run(&amp;drives_pid, temp);</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("drives PID temp=%d.%.3d speed=%d\n",</div><div class='add'>+		 FIX32TOPRINT(temp), speed);</div><div class='add'>+</div><div class='add'>+	err = wf_control_set(drives_fan, speed);</div><div class='add'>+	if (err) {</div><div class='add'>+		printk(KERN_WARNING "windfarm: drive bay fan error %d\n", err);</div><div class='add'>+		failure_state |= FAILURE_FAN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void drives_setup_pid(void)</div><div class='add'>+{</div><div class='add'>+	/* first time initialize things */</div><div class='add'>+	s32 fmin = wf_control_get_min(drives_fan);</div><div class='add'>+	s32 fmax = wf_control_get_max(drives_fan);</div><div class='add'>+	struct wf_pid_param param = drives_param;</div><div class='add'>+</div><div class='add'>+	param.min = max(param.min, fmin);</div><div class='add'>+	param.max = min(param.max, fmax);</div><div class='add'>+	wf_pid_init(&amp;drives_pid, &amp;param);</div><div class='add'>+	drives_tick = 1;</div><div class='add'>+</div><div class='add'>+	pr_info("wf_pm72: Drive bay control loop started.\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_fail_state(void)</div><div class='add'>+{</div><div class='add'>+	cpu_max_all_fans();</div><div class='add'>+</div><div class='add'>+	if (backside_fan)</div><div class='add'>+		wf_control_set_max(backside_fan);</div><div class='add'>+	if (slots_fan)</div><div class='add'>+		wf_control_set_max(slots_fan);</div><div class='add'>+	if (drives_fan)</div><div class='add'>+		wf_control_set_max(drives_fan);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pm72_tick(void)</div><div class='add'>+{</div><div class='add'>+	int i, last_failure;</div><div class='add'>+</div><div class='add'>+	if (!started) {</div><div class='add'>+		started = 1;</div><div class='add'>+		printk(KERN_INFO "windfarm: CPUs control loops started.\n");</div><div class='add'>+		for (i = 0; i &lt; nr_chips; ++i) {</div><div class='add'>+			if (cpu_setup_pid(i) &lt; 0) {</div><div class='add'>+				failure_state = FAILURE_PERM;</div><div class='add'>+				set_fail_state();</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		DBG_LOTS("cpu_all_tmax=%d.%03d\n", FIX32TOPRINT(cpu_all_tmax));</div><div class='add'>+</div><div class='add'>+		backside_setup_pid();</div><div class='add'>+		drives_setup_pid();</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We don't have the right stuff to drive the PCI fan</div><div class='add'>+		 * so we fix it to a default value</div><div class='add'>+		 */</div><div class='add'>+		wf_control_set(slots_fan, SLOTS_FAN_DEFAULT_PWM);</div><div class='add'>+</div><div class='add'>+#ifdef HACKED_OVERTEMP</div><div class='add'>+		cpu_all_tmax = 60 &lt;&lt; 16;</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Permanent failure, bail out */</div><div class='add'>+	if (failure_state &amp; FAILURE_PERM)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Clear all failure bits except low overtemp which will be eventually</div><div class='add'>+	 * cleared by the control loop itself</div><div class='add'>+	 */</div><div class='add'>+	last_failure = failure_state;</div><div class='add'>+	failure_state &amp;= FAILURE_LOW_OVERTEMP;</div><div class='add'>+	if (cpu_pid_combined)</div><div class='add'>+		cpu_fans_tick_combined();</div><div class='add'>+	else</div><div class='add'>+		cpu_fans_tick_split();</div><div class='add'>+	backside_fan_tick();</div><div class='add'>+	drives_fan_tick();</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("  last_failure: 0x%x, failure_state: %x\n",</div><div class='add'>+		 last_failure, failure_state);</div><div class='add'>+</div><div class='add'>+	/* Check for failures. Any failure causes cpufreq clamping */</div><div class='add'>+	if (failure_state &amp;&amp; last_failure == 0 &amp;&amp; cpufreq_clamp)</div><div class='add'>+		wf_control_set_max(cpufreq_clamp);</div><div class='add'>+	if (failure_state == 0 &amp;&amp; last_failure &amp;&amp; cpufreq_clamp)</div><div class='add'>+		wf_control_set_min(cpufreq_clamp);</div><div class='add'>+</div><div class='add'>+	/* That's it for now, we might want to deal with other failures</div><div class='add'>+	 * differently in the future though</div><div class='add'>+	 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pm72_new_control(struct wf_control *ct)</div><div class='add'>+{</div><div class='add'>+	bool all_controls;</div><div class='add'>+	bool had_pump = cpu_pumps[0] || cpu_pumps[1];</div><div class='add'>+</div><div class='add'>+	if (!strcmp(ct-&gt;name, "cpu-front-fan-0"))</div><div class='add'>+		cpu_front_fans[0] = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "cpu-front-fan-1"))</div><div class='add'>+		cpu_front_fans[1] = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "cpu-rear-fan-0"))</div><div class='add'>+		cpu_rear_fans[0] = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "cpu-rear-fan-1"))</div><div class='add'>+		cpu_rear_fans[1] = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "cpu-pump-0"))</div><div class='add'>+		cpu_pumps[0] = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "cpu-pump-1"))</div><div class='add'>+		cpu_pumps[1] = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "backside-fan"))</div><div class='add'>+		backside_fan = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "slots-fan"))</div><div class='add'>+		slots_fan = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "drive-bay-fan"))</div><div class='add'>+		drives_fan = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "cpufreq-clamp"))</div><div class='add'>+		cpufreq_clamp = ct;</div><div class='add'>+</div><div class='add'>+	all_controls =</div><div class='add'>+		cpu_front_fans[0] &amp;&amp;</div><div class='add'>+		cpu_rear_fans[0] &amp;&amp;</div><div class='add'>+		backside_fan &amp;&amp;</div><div class='add'>+		slots_fan &amp;&amp;</div><div class='add'>+		drives_fan;</div><div class='add'>+	if (nr_chips &gt; 1)</div><div class='add'>+		all_controls &amp;=</div><div class='add'>+			cpu_front_fans[1] &amp;&amp;</div><div class='add'>+			cpu_rear_fans[1];</div><div class='add'>+	have_all_controls = all_controls;</div><div class='add'>+</div><div class='add'>+	if ((cpu_pumps[0] || cpu_pumps[1]) &amp;&amp; !had_pump) {</div><div class='add'>+		pr_info("wf_pm72: Liquid cooling pump(s) detected,"</div><div class='add'>+			" using new algorithm !\n");</div><div class='add'>+		cpu_pid_combined = true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void pm72_new_sensor(struct wf_sensor *sr)</div><div class='add'>+{</div><div class='add'>+	bool all_sensors;</div><div class='add'>+</div><div class='add'>+	if (!strcmp(sr-&gt;name, "cpu-diode-temp-0"))</div><div class='add'>+		sens_cpu_temp[0] = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "cpu-diode-temp-1"))</div><div class='add'>+		sens_cpu_temp[1] = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "cpu-voltage-0"))</div><div class='add'>+		sens_cpu_volts[0] = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "cpu-voltage-1"))</div><div class='add'>+		sens_cpu_volts[1] = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "cpu-current-0"))</div><div class='add'>+		sens_cpu_amps[0] = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "cpu-current-1"))</div><div class='add'>+		sens_cpu_amps[1] = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "backside-temp"))</div><div class='add'>+		backside_temp = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "hd-temp"))</div><div class='add'>+		drives_temp = sr;</div><div class='add'>+</div><div class='add'>+	all_sensors =</div><div class='add'>+		sens_cpu_temp[0] &amp;&amp;</div><div class='add'>+		sens_cpu_volts[0] &amp;&amp;</div><div class='add'>+		sens_cpu_amps[0] &amp;&amp;</div><div class='add'>+		backside_temp &amp;&amp;</div><div class='add'>+		drives_temp;</div><div class='add'>+	if (nr_chips &gt; 1)</div><div class='add'>+		all_sensors &amp;=</div><div class='add'>+			sens_cpu_temp[1] &amp;&amp;</div><div class='add'>+			sens_cpu_volts[1] &amp;&amp;</div><div class='add'>+			sens_cpu_amps[1];</div><div class='add'>+</div><div class='add'>+	have_all_sensors = all_sensors;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pm72_wf_notify(struct notifier_block *self,</div><div class='add'>+			  unsigned long event, void *data)</div><div class='add'>+{</div><div class='add'>+	switch (event) {</div><div class='add'>+	case WF_EVENT_NEW_SENSOR:</div><div class='add'>+		pm72_new_sensor(data);</div><div class='add'>+		break;</div><div class='add'>+	case WF_EVENT_NEW_CONTROL:</div><div class='add'>+		pm72_new_control(data);</div><div class='add'>+		break;</div><div class='add'>+	case WF_EVENT_TICK:</div><div class='add'>+		if (have_all_controls &amp;&amp; have_all_sensors)</div><div class='add'>+			pm72_tick();</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block pm72_events = {</div><div class='add'>+	.notifier_call = pm72_wf_notify,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int wf_pm72_probe(struct platform_device *dev)</div><div class='add'>+{</div><div class='add'>+	wf_register_client(&amp;pm72_events);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit wf_pm72_remove(struct platform_device *dev)</div><div class='add'>+{</div><div class='add'>+	wf_unregister_client(&amp;pm72_events);</div><div class='add'>+</div><div class='add'>+	/* should release all sensors and controls */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver wf_pm72_driver = {</div><div class='add'>+	.probe	= wf_pm72_probe,</div><div class='add'>+	.remove	= wf_pm72_remove,</div><div class='add'>+	.driver	= {</div><div class='add'>+		.name = "windfarm",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init wf_pm72_init(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *cpu;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!of_machine_is_compatible("PowerMac7,2") &amp;&amp;</div><div class='add'>+	    !of_machine_is_compatible("PowerMac7,3"))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* Count the number of CPU cores */</div><div class='add'>+	nr_chips = 0;</div><div class='add'>+	for (cpu = NULL; (cpu = of_find_node_by_type(cpu, "cpu")) != NULL; )</div><div class='add'>+		++nr_chips;</div><div class='add'>+	if (nr_chips &gt; NR_CHIPS)</div><div class='add'>+		nr_chips = NR_CHIPS;</div><div class='add'>+</div><div class='add'>+	pr_info("windfarm: Initializing for desktop G5 with %d chips\n",</div><div class='add'>+		nr_chips);</div><div class='add'>+</div><div class='add'>+	/* Get MPU data for each CPU */</div><div class='add'>+	for (i = 0; i &lt; nr_chips; i++) {</div><div class='add'>+		cpu_mpu_data[i] = wf_get_mpu(i);</div><div class='add'>+		if (!cpu_mpu_data[i]) {</div><div class='add'>+			pr_err("wf_pm72: Failed to find MPU data for CPU %d\n", i);</div><div class='add'>+			return -ENXIO;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#ifdef MODULE</div><div class='add'>+	request_module("windfarm_fcu_controls");</div><div class='add'>+	request_module("windfarm_lm75_sensor");</div><div class='add'>+	request_module("windfarm_ad7417_sensor");</div><div class='add'>+	request_module("windfarm_max6690_sensor");</div><div class='add'>+	request_module("windfarm_cpufreq_clamp");</div><div class='add'>+#endif /* MODULE */</div><div class='add'>+</div><div class='add'>+	platform_driver_register(&amp;wf_pm72_driver);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit wf_pm72_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;wf_pm72_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(wf_pm72_init);</div><div class='add'>+module_exit(wf_pm72_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Thermal control for AGP PowerMac G5s");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_ALIAS("platform:windfarm");</div><div class='head'>diff --git a/drivers/macintosh/windfarm_pm81.c b/drivers/macintosh/windfarm_pm81.c<br/>index fc13d0f2663b..990c87606be9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/windfarm_pm81.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/windfarm_pm81.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_pm81.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_pm81.c</a></div><div class='hunk'>@@ -302,13 +302,13 @@ static void wf_smu_create_sys_fans(void)</div><div class='ctx'> 	pid_param.interval = WF_SMU_SYS_FANS_INTERVAL;</div><div class='ctx'> 	pid_param.history_len = WF_SMU_SYS_FANS_HISTORY_SIZE;</div><div class='ctx'> 	pid_param.itarget = param-&gt;itarget;</div><div class='del'>-	pid_param.min = fan_system-&gt;ops-&gt;get_min(fan_system);</div><div class='del'>-	pid_param.max = fan_system-&gt;ops-&gt;get_max(fan_system);</div><div class='add'>+	pid_param.min = wf_control_get_min(fan_system);</div><div class='add'>+	pid_param.max = wf_control_get_max(fan_system);</div><div class='ctx'> 	if (fan_hd) {</div><div class='ctx'> 		pid_param.min =</div><div class='del'>-			max(pid_param.min,fan_hd-&gt;ops-&gt;get_min(fan_hd));</div><div class='add'>+			max(pid_param.min, wf_control_get_min(fan_hd));</div><div class='ctx'> 		pid_param.max =</div><div class='del'>-			min(pid_param.max,fan_hd-&gt;ops-&gt;get_max(fan_hd));</div><div class='add'>+			min(pid_param.max, wf_control_get_max(fan_hd));</div><div class='ctx'> 	}</div><div class='ctx'> 	wf_pid_init(&amp;wf_smu_sys_fans-&gt;pid, &amp;pid_param);</div><div class='ctx'> </div><div class='hunk'>@@ -337,7 +337,7 @@ static void wf_smu_sys_fans_tick(struct wf_smu_sys_fans_state *st)</div><div class='ctx'> 	}</div><div class='ctx'> 	st-&gt;ticks = WF_SMU_SYS_FANS_INTERVAL;</div><div class='ctx'> </div><div class='del'>-	rc = sensor_hd_temp-&gt;ops-&gt;get_value(sensor_hd_temp, &amp;temp);</div><div class='add'>+	rc = wf_sensor_get(sensor_hd_temp, &amp;temp);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		printk(KERN_WARNING "windfarm: HD temp sensor error %d\n",</div><div class='ctx'> 		       rc);</div><div class='hunk'>@@ -373,7 +373,7 @@ static void wf_smu_sys_fans_tick(struct wf_smu_sys_fans_state *st)</div><div class='ctx'> 	st-&gt;hd_setpoint = new_setpoint;</div><div class='ctx'>  readjust:</div><div class='ctx'> 	if (fan_system &amp;&amp; wf_smu_failure_state == 0) {</div><div class='del'>-		rc = fan_system-&gt;ops-&gt;set_value(fan_system, st-&gt;sys_setpoint);</div><div class='add'>+		rc = wf_control_set(fan_system, st-&gt;sys_setpoint);</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			printk(KERN_WARNING "windfarm: Sys fan error %d\n",</div><div class='ctx'> 			       rc);</div><div class='hunk'>@@ -381,7 +381,7 @@ static void wf_smu_sys_fans_tick(struct wf_smu_sys_fans_state *st)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (fan_hd &amp;&amp; wf_smu_failure_state == 0) {</div><div class='del'>-		rc = fan_hd-&gt;ops-&gt;set_value(fan_hd, st-&gt;hd_setpoint);</div><div class='add'>+		rc = wf_control_set(fan_hd, st-&gt;hd_setpoint);</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			printk(KERN_WARNING "windfarm: HD fan error %d\n",</div><div class='ctx'> 			       rc);</div><div class='hunk'>@@ -447,8 +447,8 @@ static void wf_smu_create_cpu_fans(void)</div><div class='ctx'> 	pid_param.ttarget = tmax - tdelta;</div><div class='ctx'> 	pid_param.pmaxadj = maxpow - powadj;</div><div class='ctx'> </div><div class='del'>-	pid_param.min = fan_cpu_main-&gt;ops-&gt;get_min(fan_cpu_main);</div><div class='del'>-	pid_param.max = fan_cpu_main-&gt;ops-&gt;get_max(fan_cpu_main);</div><div class='add'>+	pid_param.min = wf_control_get_min(fan_cpu_main);</div><div class='add'>+	pid_param.max = wf_control_get_max(fan_cpu_main);</div><div class='ctx'> </div><div class='ctx'> 	wf_cpu_pid_init(&amp;wf_smu_cpu_fans-&gt;pid, &amp;pid_param);</div><div class='ctx'> </div><div class='hunk'>@@ -481,7 +481,7 @@ static void wf_smu_cpu_fans_tick(struct wf_smu_cpu_fans_state *st)</div><div class='ctx'> 	}</div><div class='ctx'> 	st-&gt;ticks = WF_SMU_CPU_FANS_INTERVAL;</div><div class='ctx'> </div><div class='del'>-	rc = sensor_cpu_temp-&gt;ops-&gt;get_value(sensor_cpu_temp, &amp;temp);</div><div class='add'>+	rc = wf_sensor_get(sensor_cpu_temp, &amp;temp);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		printk(KERN_WARNING "windfarm: CPU temp sensor error %d\n",</div><div class='ctx'> 		       rc);</div><div class='hunk'>@@ -489,7 +489,7 @@ static void wf_smu_cpu_fans_tick(struct wf_smu_cpu_fans_state *st)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rc = sensor_cpu_power-&gt;ops-&gt;get_value(sensor_cpu_power, &amp;power);</div><div class='add'>+	rc = wf_sensor_get(sensor_cpu_power, &amp;power);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		printk(KERN_WARNING "windfarm: CPU power sensor error %d\n",</div><div class='ctx'> 		       rc);</div><div class='hunk'>@@ -525,8 +525,7 @@ static void wf_smu_cpu_fans_tick(struct wf_smu_cpu_fans_state *st)</div><div class='ctx'> 	st-&gt;cpu_setpoint = new_setpoint;</div><div class='ctx'>  readjust:</div><div class='ctx'> 	if (fan_cpu_main &amp;&amp; wf_smu_failure_state == 0) {</div><div class='del'>-		rc = fan_cpu_main-&gt;ops-&gt;set_value(fan_cpu_main,</div><div class='del'>-						  st-&gt;cpu_setpoint);</div><div class='add'>+		rc = wf_control_set(fan_cpu_main, st-&gt;cpu_setpoint);</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			printk(KERN_WARNING "windfarm: CPU main fan"</div><div class='ctx'> 			       " error %d\n", rc);</div><div class='head'>diff --git a/drivers/macintosh/windfarm_pm91.c b/drivers/macintosh/windfarm_pm91.c<br/>index a9430ed4f36c..7653603cb00e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/windfarm_pm91.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/windfarm_pm91.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_pm91.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_pm91.c</a></div><div class='hunk'>@@ -192,8 +192,8 @@ static void wf_smu_create_cpu_fans(void)</div><div class='ctx'> 	pid_param.ttarget = tmax - tdelta;</div><div class='ctx'> 	pid_param.pmaxadj = maxpow - powadj;</div><div class='ctx'> </div><div class='del'>-	pid_param.min = fan_cpu_main-&gt;ops-&gt;get_min(fan_cpu_main);</div><div class='del'>-	pid_param.max = fan_cpu_main-&gt;ops-&gt;get_max(fan_cpu_main);</div><div class='add'>+	pid_param.min = wf_control_get_min(fan_cpu_main);</div><div class='add'>+	pid_param.max = wf_control_get_max(fan_cpu_main);</div><div class='ctx'> </div><div class='ctx'> 	wf_cpu_pid_init(&amp;wf_smu_cpu_fans-&gt;pid, &amp;pid_param);</div><div class='ctx'> </div><div class='hunk'>@@ -226,7 +226,7 @@ static void wf_smu_cpu_fans_tick(struct wf_smu_cpu_fans_state *st)</div><div class='ctx'> 	}</div><div class='ctx'> 	st-&gt;ticks = WF_SMU_CPU_FANS_INTERVAL;</div><div class='ctx'> </div><div class='del'>-	rc = sensor_cpu_temp-&gt;ops-&gt;get_value(sensor_cpu_temp, &amp;temp);</div><div class='add'>+	rc = wf_sensor_get(sensor_cpu_temp, &amp;temp);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		printk(KERN_WARNING "windfarm: CPU temp sensor error %d\n",</div><div class='ctx'> 		       rc);</div><div class='hunk'>@@ -234,7 +234,7 @@ static void wf_smu_cpu_fans_tick(struct wf_smu_cpu_fans_state *st)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rc = sensor_cpu_power-&gt;ops-&gt;get_value(sensor_cpu_power, &amp;power);</div><div class='add'>+	rc = wf_sensor_get(sensor_cpu_power, &amp;power);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		printk(KERN_WARNING "windfarm: CPU power sensor error %d\n",</div><div class='ctx'> 		       rc);</div><div class='hunk'>@@ -261,8 +261,7 @@ static void wf_smu_cpu_fans_tick(struct wf_smu_cpu_fans_state *st)</div><div class='ctx'> 	st-&gt;cpu_setpoint = new_setpoint;</div><div class='ctx'>  readjust:</div><div class='ctx'> 	if (fan_cpu_main &amp;&amp; wf_smu_failure_state == 0) {</div><div class='del'>-		rc = fan_cpu_main-&gt;ops-&gt;set_value(fan_cpu_main,</div><div class='del'>-						  st-&gt;cpu_setpoint);</div><div class='add'>+		rc = wf_control_set(fan_cpu_main, st-&gt;cpu_setpoint);</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			printk(KERN_WARNING "windfarm: CPU main fan"</div><div class='ctx'> 			       " error %d\n", rc);</div><div class='hunk'>@@ -270,8 +269,7 @@ static void wf_smu_cpu_fans_tick(struct wf_smu_cpu_fans_state *st)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (fan_cpu_second &amp;&amp; wf_smu_failure_state == 0) {</div><div class='del'>-		rc = fan_cpu_second-&gt;ops-&gt;set_value(fan_cpu_second,</div><div class='del'>-						    st-&gt;cpu_setpoint);</div><div class='add'>+		rc = wf_control_set(fan_cpu_second, st-&gt;cpu_setpoint);</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			printk(KERN_WARNING "windfarm: CPU second fan"</div><div class='ctx'> 			       " error %d\n", rc);</div><div class='hunk'>@@ -279,8 +277,7 @@ static void wf_smu_cpu_fans_tick(struct wf_smu_cpu_fans_state *st)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (fan_cpu_third &amp;&amp; wf_smu_failure_state == 0) {</div><div class='del'>-		rc = fan_cpu_main-&gt;ops-&gt;set_value(fan_cpu_third,</div><div class='del'>-						  st-&gt;cpu_setpoint);</div><div class='add'>+		rc = wf_control_set(fan_cpu_third, st-&gt;cpu_setpoint);</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			printk(KERN_WARNING "windfarm: CPU third fan"</div><div class='ctx'> 			       " error %d\n", rc);</div><div class='hunk'>@@ -312,8 +309,8 @@ static void wf_smu_create_drive_fans(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Fill PID params */</div><div class='ctx'> 	param.additive = (fan_hd-&gt;type == WF_CONTROL_RPM_FAN);</div><div class='del'>-	param.min = fan_hd-&gt;ops-&gt;get_min(fan_hd);</div><div class='del'>-	param.max = fan_hd-&gt;ops-&gt;get_max(fan_hd);</div><div class='add'>+	param.min = wf_control_get_min(fan_hd);</div><div class='add'>+	param.max = wf_control_get_max(fan_hd);</div><div class='ctx'> 	wf_pid_init(&amp;wf_smu_drive_fans-&gt;pid, &amp;param);</div><div class='ctx'> </div><div class='ctx'> 	DBG("wf: Drive Fan control initialized.\n");</div><div class='hunk'>@@ -338,7 +335,7 @@ static void wf_smu_drive_fans_tick(struct wf_smu_drive_fans_state *st)</div><div class='ctx'> 	}</div><div class='ctx'> 	st-&gt;ticks = st-&gt;pid.param.interval;</div><div class='ctx'> </div><div class='del'>-	rc = sensor_hd_temp-&gt;ops-&gt;get_value(sensor_hd_temp, &amp;temp);</div><div class='add'>+	rc = wf_sensor_get(sensor_hd_temp, &amp;temp);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		printk(KERN_WARNING "windfarm: HD temp sensor error %d\n",</div><div class='ctx'> 		       rc);</div><div class='hunk'>@@ -361,7 +358,7 @@ static void wf_smu_drive_fans_tick(struct wf_smu_drive_fans_state *st)</div><div class='ctx'> 	st-&gt;setpoint = new_setpoint;</div><div class='ctx'>  readjust:</div><div class='ctx'> 	if (fan_hd &amp;&amp; wf_smu_failure_state == 0) {</div><div class='del'>-		rc = fan_hd-&gt;ops-&gt;set_value(fan_hd, st-&gt;setpoint);</div><div class='add'>+		rc = wf_control_set(fan_hd, st-&gt;setpoint);</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			printk(KERN_WARNING "windfarm: HD fan error %d\n",</div><div class='ctx'> 			       rc);</div><div class='hunk'>@@ -393,8 +390,8 @@ static void wf_smu_create_slots_fans(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Fill PID params */</div><div class='ctx'> 	param.additive = (fan_slots-&gt;type == WF_CONTROL_RPM_FAN);</div><div class='del'>-	param.min = fan_slots-&gt;ops-&gt;get_min(fan_slots);</div><div class='del'>-	param.max = fan_slots-&gt;ops-&gt;get_max(fan_slots);</div><div class='add'>+	param.min = wf_control_get_min(fan_slots);</div><div class='add'>+	param.max = wf_control_get_max(fan_slots);</div><div class='ctx'> 	wf_pid_init(&amp;wf_smu_slots_fans-&gt;pid, &amp;param);</div><div class='ctx'> </div><div class='ctx'> 	DBG("wf: Slots Fan control initialized.\n");</div><div class='hunk'>@@ -419,7 +416,7 @@ static void wf_smu_slots_fans_tick(struct wf_smu_slots_fans_state *st)</div><div class='ctx'> 	}</div><div class='ctx'> 	st-&gt;ticks = st-&gt;pid.param.interval;</div><div class='ctx'> </div><div class='del'>-	rc = sensor_slots_power-&gt;ops-&gt;get_value(sensor_slots_power, &amp;power);</div><div class='add'>+	rc = wf_sensor_get(sensor_slots_power, &amp;power);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		printk(KERN_WARNING "windfarm: Slots power sensor error %d\n",</div><div class='ctx'> 		       rc);</div><div class='hunk'>@@ -444,7 +441,7 @@ static void wf_smu_slots_fans_tick(struct wf_smu_slots_fans_state *st)</div><div class='ctx'> 	st-&gt;setpoint = new_setpoint;</div><div class='ctx'>  readjust:</div><div class='ctx'> 	if (fan_slots &amp;&amp; wf_smu_failure_state == 0) {</div><div class='del'>-		rc = fan_slots-&gt;ops-&gt;set_value(fan_slots, st-&gt;setpoint);</div><div class='add'>+		rc = wf_control_set(fan_slots, st-&gt;setpoint);</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			printk(KERN_WARNING "windfarm: Slots fan error %d\n",</div><div class='ctx'> 			       rc);</div><div class='head'>diff --git a/drivers/macintosh/windfarm_rm31.c b/drivers/macintosh/windfarm_rm31.c<br/>new file mode 100644<br/>index 000000000000..3eca6d4b52fc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_rm31.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_rm31.c</a></div><div class='hunk'>@@ -0,0 +1,740 @@</div><div class='add'>+/*</div><div class='add'>+ * Windfarm PowerMac thermal control.</div><div class='add'>+ * Control loops for RackMack3,1 (Xserve G5)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Benjamin Herrenschmidt, IBM Corp.</div><div class='add'>+ *</div><div class='add'>+ * Use and redistribute under the terms of the GNU GPL v2.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/reboot.h&gt;</div><div class='add'>+#include &lt;asm/prom.h&gt;</div><div class='add'>+#include &lt;asm/smu.h&gt;</div><div class='add'>+</div><div class='add'>+#include "windfarm.h"</div><div class='add'>+#include "windfarm_pid.h"</div><div class='add'>+#include "windfarm_mpu.h"</div><div class='add'>+</div><div class='add'>+#define VERSION "1.0"</div><div class='add'>+</div><div class='add'>+#undef DEBUG</div><div class='add'>+#undef LOTSA_DEBUG</div><div class='add'>+</div><div class='add'>+#ifdef DEBUG</div><div class='add'>+#define DBG(args...)	printk(args)</div><div class='add'>+#else</div><div class='add'>+#define DBG(args...)	do { } while(0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef LOTSA_DEBUG</div><div class='add'>+#define DBG_LOTS(args...)	printk(args)</div><div class='add'>+#else</div><div class='add'>+#define DBG_LOTS(args...)	do { } while(0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* define this to force CPU overtemp to 60 degree, useful for testing</div><div class='add'>+ * the overtemp code</div><div class='add'>+ */</div><div class='add'>+#undef HACKED_OVERTEMP</div><div class='add'>+</div><div class='add'>+/* We currently only handle 2 chips */</div><div class='add'>+#define NR_CHIPS	2</div><div class='add'>+#define NR_CPU_FANS	3 * NR_CHIPS</div><div class='add'>+</div><div class='add'>+/* Controls and sensors */</div><div class='add'>+static struct wf_sensor *sens_cpu_temp[NR_CHIPS];</div><div class='add'>+static struct wf_sensor *sens_cpu_volts[NR_CHIPS];</div><div class='add'>+static struct wf_sensor *sens_cpu_amps[NR_CHIPS];</div><div class='add'>+static struct wf_sensor *backside_temp;</div><div class='add'>+static struct wf_sensor *slots_temp;</div><div class='add'>+static struct wf_sensor *dimms_temp;</div><div class='add'>+</div><div class='add'>+static struct wf_control *cpu_fans[NR_CHIPS][3];</div><div class='add'>+static struct wf_control *backside_fan;</div><div class='add'>+static struct wf_control *slots_fan;</div><div class='add'>+static struct wf_control *cpufreq_clamp;</div><div class='add'>+</div><div class='add'>+/* We keep a temperature history for average calculation of 180s */</div><div class='add'>+#define CPU_TEMP_HIST_SIZE	180</div><div class='add'>+</div><div class='add'>+/* PID loop state */</div><div class='add'>+static const struct mpu_data *cpu_mpu_data[NR_CHIPS];</div><div class='add'>+static struct wf_cpu_pid_state cpu_pid[NR_CHIPS];</div><div class='add'>+static u32 cpu_thist[CPU_TEMP_HIST_SIZE];</div><div class='add'>+static int cpu_thist_pt;</div><div class='add'>+static s64 cpu_thist_total;</div><div class='add'>+static s32 cpu_all_tmax = 100 &lt;&lt; 16;</div><div class='add'>+static struct wf_pid_state backside_pid;</div><div class='add'>+static int backside_tick;</div><div class='add'>+static struct wf_pid_state slots_pid;</div><div class='add'>+static int slots_tick;</div><div class='add'>+static int slots_speed;</div><div class='add'>+static struct wf_pid_state dimms_pid;</div><div class='add'>+static int dimms_output_clamp;</div><div class='add'>+</div><div class='add'>+static int nr_chips;</div><div class='add'>+static bool have_all_controls;</div><div class='add'>+static bool have_all_sensors;</div><div class='add'>+static bool started;</div><div class='add'>+</div><div class='add'>+static int failure_state;</div><div class='add'>+#define FAILURE_SENSOR		1</div><div class='add'>+#define FAILURE_FAN		2</div><div class='add'>+#define FAILURE_PERM		4</div><div class='add'>+#define FAILURE_LOW_OVERTEMP	8</div><div class='add'>+#define FAILURE_HIGH_OVERTEMP	16</div><div class='add'>+</div><div class='add'>+/* Overtemp values */</div><div class='add'>+#define LOW_OVER_AVERAGE	0</div><div class='add'>+#define LOW_OVER_IMMEDIATE	(10 &lt;&lt; 16)</div><div class='add'>+#define LOW_OVER_CLEAR		((-10) &lt;&lt; 16)</div><div class='add'>+#define HIGH_OVER_IMMEDIATE	(14 &lt;&lt; 16)</div><div class='add'>+#define HIGH_OVER_AVERAGE	(10 &lt;&lt; 16)</div><div class='add'>+#define HIGH_OVER_IMMEDIATE	(14 &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void cpu_max_all_fans(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* We max all CPU fans in case of a sensor error. We also do the</div><div class='add'>+	 * cpufreq clamping now, even if it's supposedly done later by the</div><div class='add'>+	 * generic code anyway, we do it earlier here to react faster</div><div class='add'>+	 */</div><div class='add'>+	if (cpufreq_clamp)</div><div class='add'>+		wf_control_set_max(cpufreq_clamp);</div><div class='add'>+	for (i = 0; i &lt; nr_chips; i++) {</div><div class='add'>+		if (cpu_fans[i][0])</div><div class='add'>+			wf_control_set_max(cpu_fans[i][0]);</div><div class='add'>+		if (cpu_fans[i][1])</div><div class='add'>+			wf_control_set_max(cpu_fans[i][1]);</div><div class='add'>+		if (cpu_fans[i][2])</div><div class='add'>+			wf_control_set_max(cpu_fans[i][2]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cpu_check_overtemp(s32 temp)</div><div class='add'>+{</div><div class='add'>+	int new_state = 0;</div><div class='add'>+	s32 t_avg, t_old;</div><div class='add'>+	static bool first = true;</div><div class='add'>+</div><div class='add'>+	/* First check for immediate overtemps */</div><div class='add'>+	if (temp &gt;= (cpu_all_tmax + LOW_OVER_IMMEDIATE)) {</div><div class='add'>+		new_state |= FAILURE_LOW_OVERTEMP;</div><div class='add'>+		if ((failure_state &amp; FAILURE_LOW_OVERTEMP) == 0)</div><div class='add'>+			printk(KERN_ERR "windfarm: Overtemp due to immediate CPU"</div><div class='add'>+			       " temperature !\n");</div><div class='add'>+	}</div><div class='add'>+	if (temp &gt;= (cpu_all_tmax + HIGH_OVER_IMMEDIATE)) {</div><div class='add'>+		new_state |= FAILURE_HIGH_OVERTEMP;</div><div class='add'>+		if ((failure_state &amp; FAILURE_HIGH_OVERTEMP) == 0)</div><div class='add'>+			printk(KERN_ERR "windfarm: Critical overtemp due to"</div><div class='add'>+			       " immediate CPU temperature !\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The first time around, initialize the array with the first</div><div class='add'>+	 * temperature reading</div><div class='add'>+	 */</div><div class='add'>+	if (first) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		cpu_thist_total = 0;</div><div class='add'>+		for (i = 0; i &lt; CPU_TEMP_HIST_SIZE; i++) {</div><div class='add'>+			cpu_thist[i] = temp;</div><div class='add'>+			cpu_thist_total += temp;</div><div class='add'>+		}</div><div class='add'>+		first = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We calculate a history of max temperatures and use that for the</div><div class='add'>+	 * overtemp management</div><div class='add'>+	 */</div><div class='add'>+	t_old = cpu_thist[cpu_thist_pt];</div><div class='add'>+	cpu_thist[cpu_thist_pt] = temp;</div><div class='add'>+	cpu_thist_pt = (cpu_thist_pt + 1) % CPU_TEMP_HIST_SIZE;</div><div class='add'>+	cpu_thist_total -= t_old;</div><div class='add'>+	cpu_thist_total += temp;</div><div class='add'>+	t_avg = cpu_thist_total / CPU_TEMP_HIST_SIZE;</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("  t_avg = %d.%03d (out: %d.%03d, in: %d.%03d)\n",</div><div class='add'>+		 FIX32TOPRINT(t_avg), FIX32TOPRINT(t_old), FIX32TOPRINT(temp));</div><div class='add'>+</div><div class='add'>+	/* Now check for average overtemps */</div><div class='add'>+	if (t_avg &gt;= (cpu_all_tmax + LOW_OVER_AVERAGE)) {</div><div class='add'>+		new_state |= FAILURE_LOW_OVERTEMP;</div><div class='add'>+		if ((failure_state &amp; FAILURE_LOW_OVERTEMP) == 0)</div><div class='add'>+			printk(KERN_ERR "windfarm: Overtemp due to average CPU"</div><div class='add'>+			       " temperature !\n");</div><div class='add'>+	}</div><div class='add'>+	if (t_avg &gt;= (cpu_all_tmax + HIGH_OVER_AVERAGE)) {</div><div class='add'>+		new_state |= FAILURE_HIGH_OVERTEMP;</div><div class='add'>+		if ((failure_state &amp; FAILURE_HIGH_OVERTEMP) == 0)</div><div class='add'>+			printk(KERN_ERR "windfarm: Critical overtemp due to"</div><div class='add'>+			       " average CPU temperature !\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Now handle overtemp conditions. We don't currently use the windfarm</div><div class='add'>+	 * overtemp handling core as it's not fully suited to the needs of those</div><div class='add'>+	 * new machine. This will be fixed later.</div><div class='add'>+	 */</div><div class='add'>+	if (new_state) {</div><div class='add'>+		/* High overtemp -&gt; immediate shutdown */</div><div class='add'>+		if (new_state &amp; FAILURE_HIGH_OVERTEMP)</div><div class='add'>+			machine_power_off();</div><div class='add'>+		if ((failure_state &amp; new_state) != new_state)</div><div class='add'>+			cpu_max_all_fans();</div><div class='add'>+		failure_state |= new_state;</div><div class='add'>+	} else if ((failure_state &amp; FAILURE_LOW_OVERTEMP) &amp;&amp;</div><div class='add'>+		   (temp &lt; (cpu_all_tmax + LOW_OVER_CLEAR))) {</div><div class='add'>+		printk(KERN_ERR "windfarm: Overtemp condition cleared !\n");</div><div class='add'>+		failure_state &amp;= ~FAILURE_LOW_OVERTEMP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return failure_state &amp; (FAILURE_LOW_OVERTEMP | FAILURE_HIGH_OVERTEMP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int read_one_cpu_vals(int cpu, s32 *temp, s32 *power)</div><div class='add'>+{</div><div class='add'>+	s32 dtemp, volts, amps;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* Get diode temperature */</div><div class='add'>+	rc = wf_sensor_get(sens_cpu_temp[cpu], &amp;dtemp);</div><div class='add'>+	if (rc) {</div><div class='add'>+		DBG("  CPU%d: temp reading error !\n", cpu);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	DBG_LOTS("  CPU%d: temp   = %d.%03d\n", cpu, FIX32TOPRINT((dtemp)));</div><div class='add'>+	*temp = dtemp;</div><div class='add'>+</div><div class='add'>+	/* Get voltage */</div><div class='add'>+	rc = wf_sensor_get(sens_cpu_volts[cpu], &amp;volts);</div><div class='add'>+	if (rc) {</div><div class='add'>+		DBG("  CPU%d, volts reading error !\n", cpu);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	DBG_LOTS("  CPU%d: volts  = %d.%03d\n", cpu, FIX32TOPRINT((volts)));</div><div class='add'>+</div><div class='add'>+	/* Get current */</div><div class='add'>+	rc = wf_sensor_get(sens_cpu_amps[cpu], &amp;amps);</div><div class='add'>+	if (rc) {</div><div class='add'>+		DBG("  CPU%d, current reading error !\n", cpu);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	DBG_LOTS("  CPU%d: amps   = %d.%03d\n", cpu, FIX32TOPRINT((amps)));</div><div class='add'>+</div><div class='add'>+	/* Calculate power */</div><div class='add'>+</div><div class='add'>+	/* Scale voltage and current raw sensor values according to fixed scales</div><div class='add'>+	 * obtained in Darwin and calculate power from I and V</div><div class='add'>+	 */</div><div class='add'>+	*power = (((u64)volts) * ((u64)amps)) &gt;&gt; 16;</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("  CPU%d: power  = %d.%03d\n", cpu, FIX32TOPRINT((*power)));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cpu_fans_tick(void)</div><div class='add'>+{</div><div class='add'>+	int err, cpu, i;</div><div class='add'>+	s32 speed, temp, power, t_max = 0;</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("* cpu fans_tick_split()\n");</div><div class='add'>+</div><div class='add'>+	for (cpu = 0; cpu &lt; nr_chips; ++cpu) {</div><div class='add'>+		struct wf_cpu_pid_state *sp = &amp;cpu_pid[cpu];</div><div class='add'>+</div><div class='add'>+		/* Read current speed */</div><div class='add'>+		wf_control_get(cpu_fans[cpu][0], &amp;sp-&gt;target);</div><div class='add'>+</div><div class='add'>+		err = read_one_cpu_vals(cpu, &amp;temp, &amp;power);</div><div class='add'>+		if (err) {</div><div class='add'>+			failure_state |= FAILURE_SENSOR;</div><div class='add'>+			cpu_max_all_fans();</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Keep track of highest temp */</div><div class='add'>+		t_max = max(t_max, temp);</div><div class='add'>+</div><div class='add'>+		/* Handle possible overtemps */</div><div class='add'>+		if (cpu_check_overtemp(t_max))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		/* Run PID */</div><div class='add'>+		wf_cpu_pid_run(sp, power, temp);</div><div class='add'>+</div><div class='add'>+		DBG_LOTS("  CPU%d: target = %d RPM\n", cpu, sp-&gt;target);</div><div class='add'>+</div><div class='add'>+		/* Apply DIMMs clamp */</div><div class='add'>+		speed = max(sp-&gt;target, dimms_output_clamp);</div><div class='add'>+</div><div class='add'>+		/* Apply result to all cpu fans */</div><div class='add'>+		for (i = 0; i &lt; 3; i++) {</div><div class='add'>+			err = wf_control_set(cpu_fans[cpu][i], speed);</div><div class='add'>+			if (err) {</div><div class='add'>+				pr_warning("wf_rm31: Fan %s reports error %d\n",</div><div class='add'>+					   cpu_fans[cpu][i]-&gt;name, err);</div><div class='add'>+				failure_state |= FAILURE_FAN;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Implementation... */</div><div class='add'>+static int cpu_setup_pid(int cpu)</div><div class='add'>+{</div><div class='add'>+	struct wf_cpu_pid_param pid;</div><div class='add'>+	const struct mpu_data *mpu = cpu_mpu_data[cpu];</div><div class='add'>+	s32 tmax, ttarget, ptarget;</div><div class='add'>+	int fmin, fmax, hsize;</div><div class='add'>+</div><div class='add'>+	/* Get PID params from the appropriate MPU EEPROM */</div><div class='add'>+	tmax = mpu-&gt;tmax &lt;&lt; 16;</div><div class='add'>+	ttarget = mpu-&gt;ttarget &lt;&lt; 16;</div><div class='add'>+	ptarget = ((s32)(mpu-&gt;pmaxh - mpu-&gt;padjmax)) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	DBG("wf_72: CPU%d ttarget = %d.%03d, tmax = %d.%03d\n",</div><div class='add'>+	    cpu, FIX32TOPRINT(ttarget), FIX32TOPRINT(tmax));</div><div class='add'>+</div><div class='add'>+	/* We keep a global tmax for overtemp calculations */</div><div class='add'>+	if (tmax &lt; cpu_all_tmax)</div><div class='add'>+		cpu_all_tmax = tmax;</div><div class='add'>+</div><div class='add'>+	/* Set PID min/max by using the rear fan min/max */</div><div class='add'>+	fmin = wf_control_get_min(cpu_fans[cpu][0]);</div><div class='add'>+	fmax = wf_control_get_max(cpu_fans[cpu][0]);</div><div class='add'>+	DBG("wf_72: CPU%d max RPM range = [%d..%d]\n", cpu, fmin, fmax);</div><div class='add'>+</div><div class='add'>+	/* History size */</div><div class='add'>+	hsize = min_t(int, mpu-&gt;tguardband, WF_PID_MAX_HISTORY);</div><div class='add'>+	DBG("wf_72: CPU%d history size = %d\n", cpu, hsize);</div><div class='add'>+</div><div class='add'>+	/* Initialize PID loop */</div><div class='add'>+	pid.interval	= 1;	/* seconds */</div><div class='add'>+	pid.history_len = hsize;</div><div class='add'>+	pid.gd		= mpu-&gt;pid_gd;</div><div class='add'>+	pid.gp		= mpu-&gt;pid_gp;</div><div class='add'>+	pid.gr		= mpu-&gt;pid_gr;</div><div class='add'>+	pid.tmax	= tmax;</div><div class='add'>+	pid.ttarget	= ttarget;</div><div class='add'>+	pid.pmaxadj	= ptarget;</div><div class='add'>+	pid.min		= fmin;</div><div class='add'>+	pid.max		= fmax;</div><div class='add'>+</div><div class='add'>+	wf_cpu_pid_init(&amp;cpu_pid[cpu], &amp;pid);</div><div class='add'>+	cpu_pid[cpu].target = 4000;</div><div class='add'>+	</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Backside/U3 fan */</div><div class='add'>+static struct wf_pid_param backside_param = {</div><div class='add'>+	.interval	= 1,</div><div class='add'>+	.history_len	= 2,</div><div class='add'>+	.gd		= 0x00500000,</div><div class='add'>+	.gp		= 0x0004cccc,</div><div class='add'>+	.gr		= 0,</div><div class='add'>+	.itarget	= 70 &lt;&lt; 16,</div><div class='add'>+	.additive	= 0,</div><div class='add'>+	.min		= 20,</div><div class='add'>+	.max		= 100,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* DIMMs temperature (clamp the backside fan) */</div><div class='add'>+static struct wf_pid_param dimms_param = {</div><div class='add'>+	.interval	= 1,</div><div class='add'>+	.history_len	= 20,</div><div class='add'>+	.gd		= 0,</div><div class='add'>+	.gp		= 0,</div><div class='add'>+	.gr		= 0x06553600,</div><div class='add'>+	.itarget	= 50 &lt;&lt; 16,</div><div class='add'>+	.additive	= 0,</div><div class='add'>+	.min		= 4000,</div><div class='add'>+	.max		= 14000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void backside_fan_tick(void)</div><div class='add'>+{</div><div class='add'>+	s32 temp, dtemp;</div><div class='add'>+	int speed, dspeed, fan_min;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!backside_fan || !backside_temp || !dimms_temp || !backside_tick)</div><div class='add'>+		return;</div><div class='add'>+	if (--backside_tick &gt; 0)</div><div class='add'>+		return;</div><div class='add'>+	backside_tick = backside_pid.param.interval;</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("* backside fans tick\n");</div><div class='add'>+</div><div class='add'>+	/* Update fan speed from actual fans */</div><div class='add'>+	err = wf_control_get(backside_fan, &amp;speed);</div><div class='add'>+	if (!err)</div><div class='add'>+		backside_pid.target = speed;</div><div class='add'>+</div><div class='add'>+	err = wf_sensor_get(backside_temp, &amp;temp);</div><div class='add'>+	if (err) {</div><div class='add'>+		printk(KERN_WARNING "windfarm: U3 temp sensor error %d\n",</div><div class='add'>+		       err);</div><div class='add'>+		failure_state |= FAILURE_SENSOR;</div><div class='add'>+		wf_control_set_max(backside_fan);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	speed = wf_pid_run(&amp;backside_pid, temp);</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("backside PID temp=%d.%.3d speed=%d\n",</div><div class='add'>+		 FIX32TOPRINT(temp), speed);</div><div class='add'>+</div><div class='add'>+	err = wf_sensor_get(dimms_temp, &amp;dtemp);</div><div class='add'>+	if (err) {</div><div class='add'>+		printk(KERN_WARNING "windfarm: DIMMs temp sensor error %d\n",</div><div class='add'>+		       err);</div><div class='add'>+		failure_state |= FAILURE_SENSOR;</div><div class='add'>+		wf_control_set_max(backside_fan);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	dspeed = wf_pid_run(&amp;dimms_pid, dtemp);</div><div class='add'>+	dimms_output_clamp = dspeed;</div><div class='add'>+</div><div class='add'>+	fan_min = (dspeed * 100) / 14000;</div><div class='add'>+	fan_min = max(fan_min, backside_param.min);</div><div class='add'>+	speed = max(speed, fan_min);</div><div class='add'>+</div><div class='add'>+	err = wf_control_set(backside_fan, speed);</div><div class='add'>+	if (err) {</div><div class='add'>+		printk(KERN_WARNING "windfarm: backside fan error %d\n", err);</div><div class='add'>+		failure_state |= FAILURE_FAN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void backside_setup_pid(void)</div><div class='add'>+{</div><div class='add'>+	/* first time initialize things */</div><div class='add'>+	s32 fmin = wf_control_get_min(backside_fan);</div><div class='add'>+	s32 fmax = wf_control_get_max(backside_fan);</div><div class='add'>+	struct wf_pid_param param;</div><div class='add'>+</div><div class='add'>+	param = backside_param;</div><div class='add'>+	param.min = max(param.min, fmin);</div><div class='add'>+	param.max = min(param.max, fmax);</div><div class='add'>+	wf_pid_init(&amp;backside_pid, &amp;param);</div><div class='add'>+</div><div class='add'>+	param = dimms_param;</div><div class='add'>+	wf_pid_init(&amp;dimms_pid, &amp;param);</div><div class='add'>+</div><div class='add'>+	backside_tick = 1;</div><div class='add'>+</div><div class='add'>+	pr_info("wf_rm31: Backside control loop started.\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Slots fan */</div><div class='add'>+static const struct wf_pid_param slots_param = {</div><div class='add'>+	.interval	= 5,</div><div class='add'>+	.history_len	= 2,</div><div class='add'>+	.gd		= 30 &lt;&lt; 20,</div><div class='add'>+	.gp		= 5 &lt;&lt; 20,</div><div class='add'>+	.gr		= 0,</div><div class='add'>+	.itarget	= 40 &lt;&lt; 16,</div><div class='add'>+	.additive	= 1,</div><div class='add'>+	.min		= 300,</div><div class='add'>+	.max		= 4000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void slots_fan_tick(void)</div><div class='add'>+{</div><div class='add'>+	s32 temp;</div><div class='add'>+	int speed;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!slots_fan || !slots_temp || !slots_tick)</div><div class='add'>+		return;</div><div class='add'>+	if (--slots_tick &gt; 0)</div><div class='add'>+		return;</div><div class='add'>+	slots_tick = slots_pid.param.interval;</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("* slots fans tick\n");</div><div class='add'>+</div><div class='add'>+	err = wf_sensor_get(slots_temp, &amp;temp);</div><div class='add'>+	if (err) {</div><div class='add'>+		pr_warning("wf_rm31: slots temp sensor error %d\n", err);</div><div class='add'>+		failure_state |= FAILURE_SENSOR;</div><div class='add'>+		wf_control_set_max(slots_fan);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	speed = wf_pid_run(&amp;slots_pid, temp);</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("slots PID temp=%d.%.3d speed=%d\n",</div><div class='add'>+		 FIX32TOPRINT(temp), speed);</div><div class='add'>+</div><div class='add'>+	slots_speed = speed;</div><div class='add'>+	err = wf_control_set(slots_fan, speed);</div><div class='add'>+	if (err) {</div><div class='add'>+		printk(KERN_WARNING "windfarm: slots bay fan error %d\n", err);</div><div class='add'>+		failure_state |= FAILURE_FAN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slots_setup_pid(void)</div><div class='add'>+{</div><div class='add'>+	/* first time initialize things */</div><div class='add'>+	s32 fmin = wf_control_get_min(slots_fan);</div><div class='add'>+	s32 fmax = wf_control_get_max(slots_fan);</div><div class='add'>+	struct wf_pid_param param = slots_param;</div><div class='add'>+</div><div class='add'>+	param.min = max(param.min, fmin);</div><div class='add'>+	param.max = min(param.max, fmax);</div><div class='add'>+	wf_pid_init(&amp;slots_pid, &amp;param);</div><div class='add'>+	slots_tick = 1;</div><div class='add'>+</div><div class='add'>+	pr_info("wf_rm31: Slots control loop started.\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_fail_state(void)</div><div class='add'>+{</div><div class='add'>+	cpu_max_all_fans();</div><div class='add'>+</div><div class='add'>+	if (backside_fan)</div><div class='add'>+		wf_control_set_max(backside_fan);</div><div class='add'>+	if (slots_fan)</div><div class='add'>+		wf_control_set_max(slots_fan);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rm31_tick(void)</div><div class='add'>+{</div><div class='add'>+	int i, last_failure;</div><div class='add'>+</div><div class='add'>+	if (!started) {</div><div class='add'>+		started = 1;</div><div class='add'>+		printk(KERN_INFO "windfarm: CPUs control loops started.\n");</div><div class='add'>+		for (i = 0; i &lt; nr_chips; ++i) {</div><div class='add'>+			if (cpu_setup_pid(i) &lt; 0) {</div><div class='add'>+				failure_state = FAILURE_PERM;</div><div class='add'>+				set_fail_state();</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		DBG_LOTS("cpu_all_tmax=%d.%03d\n", FIX32TOPRINT(cpu_all_tmax));</div><div class='add'>+</div><div class='add'>+		backside_setup_pid();</div><div class='add'>+		slots_setup_pid();</div><div class='add'>+</div><div class='add'>+#ifdef HACKED_OVERTEMP</div><div class='add'>+		cpu_all_tmax = 60 &lt;&lt; 16;</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Permanent failure, bail out */</div><div class='add'>+	if (failure_state &amp; FAILURE_PERM)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Clear all failure bits except low overtemp which will be eventually</div><div class='add'>+	 * cleared by the control loop itself</div><div class='add'>+	 */</div><div class='add'>+	last_failure = failure_state;</div><div class='add'>+	failure_state &amp;= FAILURE_LOW_OVERTEMP;</div><div class='add'>+	backside_fan_tick();</div><div class='add'>+	slots_fan_tick();</div><div class='add'>+</div><div class='add'>+	/* We do CPUs last because they can be clamped high by</div><div class='add'>+	 * DIMM temperature</div><div class='add'>+	 */</div><div class='add'>+	cpu_fans_tick();</div><div class='add'>+</div><div class='add'>+	DBG_LOTS("  last_failure: 0x%x, failure_state: %x\n",</div><div class='add'>+		 last_failure, failure_state);</div><div class='add'>+</div><div class='add'>+	/* Check for failures. Any failure causes cpufreq clamping */</div><div class='add'>+	if (failure_state &amp;&amp; last_failure == 0 &amp;&amp; cpufreq_clamp)</div><div class='add'>+		wf_control_set_max(cpufreq_clamp);</div><div class='add'>+	if (failure_state == 0 &amp;&amp; last_failure &amp;&amp; cpufreq_clamp)</div><div class='add'>+		wf_control_set_min(cpufreq_clamp);</div><div class='add'>+</div><div class='add'>+	/* That's it for now, we might want to deal with other failures</div><div class='add'>+	 * differently in the future though</div><div class='add'>+	 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rm31_new_control(struct wf_control *ct)</div><div class='add'>+{</div><div class='add'>+	bool all_controls;</div><div class='add'>+</div><div class='add'>+	if (!strcmp(ct-&gt;name, "cpu-fan-a-0"))</div><div class='add'>+		cpu_fans[0][0] = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "cpu-fan-b-0"))</div><div class='add'>+		cpu_fans[0][1] = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "cpu-fan-c-0"))</div><div class='add'>+		cpu_fans[0][2] = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "cpu-fan-a-1"))</div><div class='add'>+		cpu_fans[1][0] = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "cpu-fan-b-1"))</div><div class='add'>+		cpu_fans[1][1] = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "cpu-fan-c-1"))</div><div class='add'>+		cpu_fans[1][2] = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "backside-fan"))</div><div class='add'>+		backside_fan = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "slots-fan"))</div><div class='add'>+		slots_fan = ct;</div><div class='add'>+	else if (!strcmp(ct-&gt;name, "cpufreq-clamp"))</div><div class='add'>+		cpufreq_clamp = ct;</div><div class='add'>+</div><div class='add'>+	all_controls =</div><div class='add'>+		cpu_fans[0][0] &amp;&amp;</div><div class='add'>+		cpu_fans[0][1] &amp;&amp;</div><div class='add'>+		cpu_fans[0][2] &amp;&amp;</div><div class='add'>+		backside_fan &amp;&amp;</div><div class='add'>+		slots_fan;</div><div class='add'>+	if (nr_chips &gt; 1)</div><div class='add'>+		all_controls &amp;=</div><div class='add'>+			cpu_fans[1][0] &amp;&amp;</div><div class='add'>+			cpu_fans[1][1] &amp;&amp;</div><div class='add'>+			cpu_fans[1][2];</div><div class='add'>+	have_all_controls = all_controls;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static void rm31_new_sensor(struct wf_sensor *sr)</div><div class='add'>+{</div><div class='add'>+	bool all_sensors;</div><div class='add'>+</div><div class='add'>+	if (!strcmp(sr-&gt;name, "cpu-diode-temp-0"))</div><div class='add'>+		sens_cpu_temp[0] = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "cpu-diode-temp-1"))</div><div class='add'>+		sens_cpu_temp[1] = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "cpu-voltage-0"))</div><div class='add'>+		sens_cpu_volts[0] = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "cpu-voltage-1"))</div><div class='add'>+		sens_cpu_volts[1] = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "cpu-current-0"))</div><div class='add'>+		sens_cpu_amps[0] = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "cpu-current-1"))</div><div class='add'>+		sens_cpu_amps[1] = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "backside-temp"))</div><div class='add'>+		backside_temp = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "slots-temp"))</div><div class='add'>+		slots_temp = sr;</div><div class='add'>+	else if (!strcmp(sr-&gt;name, "dimms-temp"))</div><div class='add'>+		dimms_temp = sr;</div><div class='add'>+</div><div class='add'>+	all_sensors =</div><div class='add'>+		sens_cpu_temp[0] &amp;&amp;</div><div class='add'>+		sens_cpu_volts[0] &amp;&amp;</div><div class='add'>+		sens_cpu_amps[0] &amp;&amp;</div><div class='add'>+		backside_temp &amp;&amp;</div><div class='add'>+		slots_temp &amp;&amp;</div><div class='add'>+		dimms_temp;</div><div class='add'>+	if (nr_chips &gt; 1)</div><div class='add'>+		all_sensors &amp;=</div><div class='add'>+			sens_cpu_temp[1] &amp;&amp;</div><div class='add'>+			sens_cpu_volts[1] &amp;&amp;</div><div class='add'>+			sens_cpu_amps[1];</div><div class='add'>+</div><div class='add'>+	have_all_sensors = all_sensors;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rm31_wf_notify(struct notifier_block *self,</div><div class='add'>+			  unsigned long event, void *data)</div><div class='add'>+{</div><div class='add'>+	switch (event) {</div><div class='add'>+	case WF_EVENT_NEW_SENSOR:</div><div class='add'>+		rm31_new_sensor(data);</div><div class='add'>+		break;</div><div class='add'>+	case WF_EVENT_NEW_CONTROL:</div><div class='add'>+		rm31_new_control(data);</div><div class='add'>+		break;</div><div class='add'>+	case WF_EVENT_TICK:</div><div class='add'>+		if (have_all_controls &amp;&amp; have_all_sensors)</div><div class='add'>+			rm31_tick();</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block rm31_events = {</div><div class='add'>+	.notifier_call = rm31_wf_notify,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int wf_rm31_probe(struct platform_device *dev)</div><div class='add'>+{</div><div class='add'>+	wf_register_client(&amp;rm31_events);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit wf_rm31_remove(struct platform_device *dev)</div><div class='add'>+{</div><div class='add'>+	wf_unregister_client(&amp;rm31_events);</div><div class='add'>+</div><div class='add'>+	/* should release all sensors and controls */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver wf_rm31_driver = {</div><div class='add'>+	.probe	= wf_rm31_probe,</div><div class='add'>+	.remove	= wf_rm31_remove,</div><div class='add'>+	.driver	= {</div><div class='add'>+		.name = "windfarm",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init wf_rm31_init(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *cpu;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!of_machine_is_compatible("RackMac3,1"))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* Count the number of CPU cores */</div><div class='add'>+	nr_chips = 0;</div><div class='add'>+	for (cpu = NULL; (cpu = of_find_node_by_type(cpu, "cpu")) != NULL; )</div><div class='add'>+		++nr_chips;</div><div class='add'>+	if (nr_chips &gt; NR_CHIPS)</div><div class='add'>+		nr_chips = NR_CHIPS;</div><div class='add'>+</div><div class='add'>+	pr_info("windfarm: Initializing for desktop G5 with %d chips\n",</div><div class='add'>+		nr_chips);</div><div class='add'>+</div><div class='add'>+	/* Get MPU data for each CPU */</div><div class='add'>+	for (i = 0; i &lt; nr_chips; i++) {</div><div class='add'>+		cpu_mpu_data[i] = wf_get_mpu(i);</div><div class='add'>+		if (!cpu_mpu_data[i]) {</div><div class='add'>+			pr_err("wf_rm31: Failed to find MPU data for CPU %d\n", i);</div><div class='add'>+			return -ENXIO;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#ifdef MODULE</div><div class='add'>+	request_module("windfarm_fcu_controls");</div><div class='add'>+	request_module("windfarm_lm75_sensor");</div><div class='add'>+	request_module("windfarm_lm87_sensor");</div><div class='add'>+	request_module("windfarm_ad7417_sensor");</div><div class='add'>+	request_module("windfarm_max6690_sensor");</div><div class='add'>+	request_module("windfarm_cpufreq_clamp");</div><div class='add'>+#endif /* MODULE */</div><div class='add'>+</div><div class='add'>+	platform_driver_register(&amp;wf_rm31_driver);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit wf_rm31_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;wf_rm31_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(wf_rm31_init);</div><div class='add'>+module_exit(wf_rm31_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Thermal control for Xserve G5");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_ALIAS("platform:windfarm");</div><div class='head'>diff --git a/drivers/macintosh/windfarm_smu_controls.c b/drivers/macintosh/windfarm_smu_controls.c<br/>index 3c2be5193fd5..c155a54e8638 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/windfarm_smu_controls.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/windfarm_smu_controls.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_smu_controls.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_smu_controls.c</a></div><div class='hunk'>@@ -172,7 +172,6 @@ static struct smu_fan_control *smu_fan_create(struct device_node *node,</div><div class='ctx'> </div><div class='ctx'> 	fct-&gt;fan_type = pwm_fan;</div><div class='ctx'> 	fct-&gt;ctrl.type = pwm_fan ? WF_CONTROL_PWM_FAN : WF_CONTROL_RPM_FAN;</div><div class='del'>-	sysfs_attr_init(&amp;fct-&gt;ctrl.attr.attr);</div><div class='ctx'> </div><div class='ctx'> 	/* We use the name &amp; location here the same way we do for SMU sensors,</div><div class='ctx'> 	 * see the comment in windfarm_smu_sensors.c. The locations are a bit</div><div class='head'>diff --git a/drivers/macintosh/windfarm_smu_sat.c b/drivers/macintosh/windfarm_smu_sat.c<br/>index 65a8ff3e1f8e..426e810233d7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/macintosh/windfarm_smu_sat.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/macintosh/windfarm_smu_sat.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/macintosh/windfarm_smu_sat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/macintosh/windfarm_smu_sat.c</a></div><div class='hunk'>@@ -20,7 +20,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "windfarm.h"</div><div class='ctx'> </div><div class='del'>-#define VERSION "0.2"</div><div class='add'>+#define VERSION "1.0"</div><div class='ctx'> </div><div class='ctx'> #define DEBUG</div><div class='ctx'> </div><div class='hunk'>@@ -34,11 +34,12 @@</div><div class='ctx'> #define MAX_AGE		msecs_to_jiffies(800)</div><div class='ctx'> </div><div class='ctx'> struct wf_sat {</div><div class='add'>+	struct kref		ref;</div><div class='ctx'> 	int			nr;</div><div class='del'>-	atomic_t		refcnt;</div><div class='ctx'> 	struct mutex		mutex;</div><div class='ctx'> 	unsigned long		last_read; /* jiffies when cache last updated */</div><div class='ctx'> 	u8			cache[16];</div><div class='add'>+	struct list_head	sensors;</div><div class='ctx'> 	struct i2c_client	*i2c;</div><div class='ctx'> 	struct device_node	*node;</div><div class='ctx'> };</div><div class='hunk'>@@ -46,11 +47,12 @@ struct wf_sat {</div><div class='ctx'> static struct wf_sat *sats[2];</div><div class='ctx'> </div><div class='ctx'> struct wf_sat_sensor {</div><div class='del'>-	int		index;</div><div class='del'>-	int		index2;		/* used for power sensors */</div><div class='del'>-	int		shift;</div><div class='del'>-	struct wf_sat	*sat;</div><div class='del'>-	struct wf_sensor sens;</div><div class='add'>+	struct list_head	link;</div><div class='add'>+	int			index;</div><div class='add'>+	int			index2;		/* used for power sensors */</div><div class='add'>+	int			shift;</div><div class='add'>+	struct wf_sat		*sat;</div><div class='add'>+	struct wf_sensor 	sens;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define wf_to_sat(c)	container_of(c, struct wf_sat_sensor, sens)</div><div class='hunk'>@@ -142,7 +144,7 @@ static int wf_sat_read_cache(struct wf_sat *sat)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wf_sat_get(struct wf_sensor *sr, s32 *value)</div><div class='add'>+static int wf_sat_sensor_get(struct wf_sensor *sr, s32 *value)</div><div class='ctx'> {</div><div class='ctx'> 	struct wf_sat_sensor *sens = wf_to_sat(sr);</div><div class='ctx'> 	struct wf_sat *sat = sens-&gt;sat;</div><div class='hunk'>@@ -175,62 +177,34 @@ static int wf_sat_get(struct wf_sensor *sr, s32 *value)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void wf_sat_release(struct wf_sensor *sr)</div><div class='add'>+static void wf_sat_release(struct kref *ref)</div><div class='add'>+{</div><div class='add'>+	struct wf_sat *sat = container_of(ref, struct wf_sat, ref);</div><div class='add'>+</div><div class='add'>+	if (sat-&gt;nr &gt;= 0)</div><div class='add'>+		sats[sat-&gt;nr] = NULL;</div><div class='add'>+	kfree(sat);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wf_sat_sensor_release(struct wf_sensor *sr)</div><div class='ctx'> {</div><div class='ctx'> 	struct wf_sat_sensor *sens = wf_to_sat(sr);</div><div class='ctx'> 	struct wf_sat *sat = sens-&gt;sat;</div><div class='ctx'> </div><div class='del'>-	if (atomic_dec_and_test(&amp;sat-&gt;refcnt)) {</div><div class='del'>-		if (sat-&gt;nr &gt;= 0)</div><div class='del'>-			sats[sat-&gt;nr] = NULL;</div><div class='del'>-		kfree(sat);</div><div class='del'>-	}</div><div class='ctx'> 	kfree(sens);</div><div class='add'>+	kref_put(&amp;sat-&gt;ref, wf_sat_release);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct wf_sensor_ops wf_sat_ops = {</div><div class='del'>-	.get_value	= wf_sat_get,</div><div class='del'>-	.release	= wf_sat_release,</div><div class='add'>+	.get_value	= wf_sat_sensor_get,</div><div class='add'>+	.release	= wf_sat_sensor_release,</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_driver wf_sat_driver;</div><div class='del'>-</div><div class='del'>-static void wf_sat_create(struct i2c_adapter *adapter, struct device_node *dev)</div><div class='del'>-{</div><div class='del'>-	struct i2c_board_info info;</div><div class='del'>-	struct i2c_client *client;</div><div class='del'>-	const u32 *reg;</div><div class='del'>-	u8 addr;</div><div class='del'>-</div><div class='del'>-	reg = of_get_property(dev, "reg", NULL);</div><div class='del'>-	if (reg == NULL)</div><div class='del'>-		return;</div><div class='del'>-	addr = *reg;</div><div class='del'>-	DBG(KERN_DEBUG "wf_sat: creating sat at address %x\n", addr);</div><div class='del'>-</div><div class='del'>-	memset(&amp;info, 0, sizeof(struct i2c_board_info));</div><div class='del'>-	info.addr = (addr &gt;&gt; 1) &amp; 0x7f;</div><div class='del'>-	info.platform_data = dev;</div><div class='del'>-	strlcpy(info.type, "wf_sat", I2C_NAME_SIZE);</div><div class='del'>-</div><div class='del'>-	client = i2c_new_device(adapter, &amp;info);</div><div class='del'>-	if (client == NULL) {</div><div class='del'>-		printk(KERN_ERR "windfarm: failed to attach smu-sat to i2c\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Let i2c-core delete that device on driver removal.</div><div class='del'>-	 * This is safe because i2c-core holds the core_lock mutex for us.</div><div class='del'>-	 */</div><div class='del'>-	list_add_tail(&amp;client-&gt;detected, &amp;wf_sat_driver.clients);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int wf_sat_probe(struct i2c_client *client,</div><div class='ctx'> 			const struct i2c_device_id *id)</div><div class='ctx'> {</div><div class='del'>-	struct device_node *dev = client-&gt;dev.platform_data;</div><div class='add'>+	struct device_node *dev = client-&gt;dev.of_node;</div><div class='ctx'> 	struct wf_sat *sat;</div><div class='ctx'> 	struct wf_sat_sensor *sens;</div><div class='ctx'> 	const u32 *reg;</div><div class='hunk'>@@ -246,9 +220,10 @@ static int wf_sat_probe(struct i2c_client *client,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	sat-&gt;nr = -1;</div><div class='ctx'> 	sat-&gt;node = of_node_get(dev);</div><div class='del'>-	atomic_set(&amp;sat-&gt;refcnt, 0);</div><div class='add'>+	kref_init(&amp;sat-&gt;ref);</div><div class='ctx'> 	mutex_init(&amp;sat-&gt;mutex);</div><div class='ctx'> 	sat-&gt;i2c = client;</div><div class='add'>+	INIT_LIST_HEAD(&amp;sat-&gt;sensors);</div><div class='ctx'> 	i2c_set_clientdata(client, sat);</div><div class='ctx'> </div><div class='ctx'> 	vsens[0] = vsens[1] = -1;</div><div class='hunk'>@@ -310,14 +285,15 @@ static int wf_sat_probe(struct i2c_client *client,</div><div class='ctx'> 		sens-&gt;index2 = -1;</div><div class='ctx'> 		sens-&gt;shift = shift;</div><div class='ctx'> 		sens-&gt;sat = sat;</div><div class='del'>-		atomic_inc(&amp;sat-&gt;refcnt);</div><div class='ctx'> 		sens-&gt;sens.ops = &amp;wf_sat_ops;</div><div class='ctx'> 		sens-&gt;sens.name = (char *) (sens + 1);</div><div class='del'>-		snprintf(sens-&gt;sens.name, 16, "%s-%d", name, cpu);</div><div class='add'>+		snprintf((char *)sens-&gt;sens.name, 16, "%s-%d", name, cpu);</div><div class='ctx'> </div><div class='del'>-		if (wf_register_sensor(&amp;sens-&gt;sens)) {</div><div class='del'>-			atomic_dec(&amp;sat-&gt;refcnt);</div><div class='add'>+		if (wf_register_sensor(&amp;sens-&gt;sens))</div><div class='ctx'> 			kfree(sens);</div><div class='add'>+		else {</div><div class='add'>+			list_add(&amp;sens-&gt;link, &amp;sat-&gt;sensors);</div><div class='add'>+			kref_get(&amp;sat-&gt;ref);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -336,14 +312,15 @@ static int wf_sat_probe(struct i2c_client *client,</div><div class='ctx'> 		sens-&gt;index2 = isens[core];</div><div class='ctx'> 		sens-&gt;shift = 0;</div><div class='ctx'> 		sens-&gt;sat = sat;</div><div class='del'>-		atomic_inc(&amp;sat-&gt;refcnt);</div><div class='ctx'> 		sens-&gt;sens.ops = &amp;wf_sat_ops;</div><div class='ctx'> 		sens-&gt;sens.name = (char *) (sens + 1);</div><div class='del'>-		snprintf(sens-&gt;sens.name, 16, "cpu-power-%d", cpu);</div><div class='add'>+		snprintf((char *)sens-&gt;sens.name, 16, "cpu-power-%d", cpu);</div><div class='ctx'> </div><div class='del'>-		if (wf_register_sensor(&amp;sens-&gt;sens)) {</div><div class='del'>-			atomic_dec(&amp;sat-&gt;refcnt);</div><div class='add'>+		if (wf_register_sensor(&amp;sens-&gt;sens))</div><div class='ctx'> 			kfree(sens);</div><div class='add'>+		else {</div><div class='add'>+			list_add(&amp;sens-&gt;link, &amp;sat-&gt;sensors);</div><div class='add'>+			kref_get(&amp;sat-&gt;ref);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -353,42 +330,35 @@ static int wf_sat_probe(struct i2c_client *client,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wf_sat_attach(struct i2c_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	struct device_node *busnode, *dev = NULL;</div><div class='del'>-	struct pmac_i2c_bus *bus;</div><div class='del'>-</div><div class='del'>-	bus = pmac_i2c_adapter_to_bus(adapter);</div><div class='del'>-	if (bus == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	busnode = pmac_i2c_get_bus_node(bus);</div><div class='del'>-</div><div class='del'>-	while ((dev = of_get_next_child(busnode, dev)) != NULL)</div><div class='del'>-		if (of_device_is_compatible(dev, "smu-sat"))</div><div class='del'>-			wf_sat_create(adapter, dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int wf_sat_remove(struct i2c_client *client)</div><div class='ctx'> {</div><div class='ctx'> 	struct wf_sat *sat = i2c_get_clientdata(client);</div><div class='add'>+	struct wf_sat_sensor *sens;</div><div class='ctx'> </div><div class='del'>-	/* XXX TODO */</div><div class='del'>-</div><div class='add'>+	/* release sensors */</div><div class='add'>+	while(!list_empty(&amp;sat-&gt;sensors)) {</div><div class='add'>+		sens = list_first_entry(&amp;sat-&gt;sensors,</div><div class='add'>+					struct wf_sat_sensor, link);</div><div class='add'>+		list_del(&amp;sens-&gt;link);</div><div class='add'>+		wf_unregister_sensor(&amp;sens-&gt;sens);</div><div class='add'>+	}</div><div class='ctx'> 	sat-&gt;i2c = NULL;</div><div class='add'>+	i2c_set_clientdata(client, NULL);</div><div class='add'>+	kref_put(&amp;sat-&gt;ref, wf_sat_release);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct i2c_device_id wf_sat_id[] = {</div><div class='del'>-	{ "wf_sat", 0 },</div><div class='add'>+	{ "MAC,smu-sat", 0 },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, wf_sat_id);</div><div class='ctx'> </div><div class='ctx'> static struct i2c_driver wf_sat_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name		= "wf_smu_sat",</div><div class='ctx'> 	},</div><div class='del'>-	.attach_adapter	= wf_sat_attach,</div><div class='ctx'> 	.probe		= wf_sat_probe,</div><div class='ctx'> 	.remove		= wf_sat_remove,</div><div class='ctx'> 	.id_table	= wf_sat_id,</div><div class='hunk'>@@ -399,15 +369,13 @@ static int __init sat_sensors_init(void)</div><div class='ctx'> 	return i2c_add_driver(&amp;wf_sat_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if 0	/* uncomment when module_exit() below is uncommented */</div><div class='ctx'> static void __exit sat_sensors_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	i2c_del_driver(&amp;wf_sat_driver);</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> module_init(sat_sensors_init);</div><div class='del'>-/*module_exit(sat_sensors_exit); Uncomment when cleanup is implemented */</div><div class='add'>+module_exit(sat_sensors_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Paul Mackerras &lt;paulus@samba.org&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("SMU satellite sensors for PowerMac thermal control");</div><div class='head'>diff --git a/drivers/mca/Kconfig b/drivers/mca/Kconfig<br/>deleted file mode 100644<br/>index a7a0220ab4bd..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mca/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mca/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-config MCA_LEGACY</div><div class='del'>-	bool "Legacy MCA API Support"</div><div class='del'>-	depends on MCA</div><div class='del'>-	help</div><div class='del'>-	  This compiles in support for the old slot based MCA API.  If you</div><div class='del'>-	  have an unconverted MCA driver, you will need to say Y here.  It</div><div class='del'>-	  is safe to say Y anyway.</div><div class='del'>-</div><div class='del'>-config MCA_PROC_FS</div><div class='del'>-	bool "Support for the mca entry in /proc"</div><div class='del'>-	depends on MCA_LEGACY &amp;&amp; PROC_FS</div><div class='del'>-	help</div><div class='del'>-	  If you want the old style /proc/mca directory in addition to the</div><div class='del'>-	  new style sysfs say Y here.</div><div class='head'>diff --git a/drivers/mca/Makefile b/drivers/mca/Makefile<br/>deleted file mode 100644<br/>index 0794b122520e..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mca/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mca/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,7 +0,0 @@</div><div class='del'>-# Makefile for the Linux MCA bus support</div><div class='del'>-</div><div class='del'>-obj-y	:= mca-bus.o mca-device.o mca-driver.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_MCA_PROC_FS)	+= mca-proc.o</div><div class='del'>-obj-$(CONFIG_MCA_LEGACY)	+= mca-legacy.o</div><div class='del'>-</div><div class='head'>diff --git a/drivers/mca/mca-bus.c b/drivers/mca/mca-bus.c<br/>deleted file mode 100644<br/>index ada5ebbaa255..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mca/mca-bus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mca/mca-bus.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,169 +0,0 @@</div><div class='del'>-/* -*- mode: c; c-basic-offset: 8 -*- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * MCA bus support functions for sysfs.</div><div class='del'>- *</div><div class='del'>- * (C) 2002 James Bottomley &lt;James.Bottomley@HansenPartnership.com&gt;</div><div class='del'>- *</div><div class='del'>-**-----------------------------------------------------------------------------</div><div class='del'>-**  </div><div class='del'>-**  This program is free software; you can redistribute it and/or modify</div><div class='del'>-**  it under the terms of the GNU General Public License as published by</div><div class='del'>-**  the Free Software Foundation; either version 2 of the License, or</div><div class='del'>-**  (at your option) any later version.</div><div class='del'>-**</div><div class='del'>-**  This program is distributed in the hope that it will be useful,</div><div class='del'>-**  but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>-**  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>-**  GNU General Public License for more details.</div><div class='del'>-**</div><div class='del'>-**  You should have received a copy of the GNU General Public License</div><div class='del'>-**  along with this program; if not, write to the Free Software</div><div class='del'>-**  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>-**</div><div class='del'>-**-----------------------------------------------------------------------------</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-</div><div class='del'>-/* Very few machines have more than one MCA bus.  However, there are</div><div class='del'>- * those that do (Voyager 35xx/5xxx), so we do it this way for future</div><div class='del'>- * expansion.  None that I know have more than 2 */</div><div class='del'>-static struct mca_bus *mca_root_busses[MAX_MCA_BUSSES];</div><div class='del'>-</div><div class='del'>-#define MCA_DEVINFO(i,s) { .pos = i, .name = s }</div><div class='del'>-</div><div class='del'>-struct mca_device_info {</div><div class='del'>-	short pos_id;		/* the 2 byte pos id for this card */</div><div class='del'>-	char name[50];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int mca_bus_match (struct device *dev, struct device_driver *drv)</div><div class='del'>-{</div><div class='del'>-	struct mca_device *mca_dev = to_mca_device (dev);</div><div class='del'>-	struct mca_driver *mca_drv = to_mca_driver (drv);</div><div class='del'>-	const unsigned short *mca_ids = mca_drv-&gt;id_table;</div><div class='del'>-	int i = 0;</div><div class='del'>-</div><div class='del'>-	if (mca_ids) {</div><div class='del'>-		for(i = 0; mca_ids[i]; i++) {</div><div class='del'>-			if (mca_ids[i] == mca_dev-&gt;pos_id) {</div><div class='del'>-				mca_dev-&gt;index = i;</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	/* If the integrated id is present, treat it as though it were an</div><div class='del'>-	 * additional id in the id_table (it can't be because by definition,</div><div class='del'>-	 * integrated id's overflow a short */</div><div class='del'>-	if (mca_drv-&gt;integrated_id &amp;&amp; mca_dev-&gt;pos_id ==</div><div class='del'>-	    mca_drv-&gt;integrated_id) {</div><div class='del'>-		mca_dev-&gt;index = i;</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct bus_type mca_bus_type = {</div><div class='del'>-	.name  = "MCA",</div><div class='del'>-	.match = mca_bus_match,</div><div class='del'>-};</div><div class='del'>-EXPORT_SYMBOL (mca_bus_type);</div><div class='del'>-</div><div class='del'>-static ssize_t mca_show_pos_id(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	/* four digits, \n and trailing \0 */</div><div class='del'>-	struct mca_device *mca_dev = to_mca_device(dev);</div><div class='del'>-	int len;</div><div class='del'>-</div><div class='del'>-	if(mca_dev-&gt;pos_id &lt; MCA_DUMMY_POS_START)</div><div class='del'>-		len = sprintf(buf, "%04x\n", mca_dev-&gt;pos_id);</div><div class='del'>-	else</div><div class='del'>-		len = sprintf(buf, "none\n");</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-static ssize_t mca_show_pos(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	/* enough for 8 two byte hex chars plus space and new line */</div><div class='del'>-	int j, len=0;</div><div class='del'>-	struct mca_device *mca_dev = to_mca_device(dev);</div><div class='del'>-</div><div class='del'>-	for(j=0; j&lt;8; j++)</div><div class='del'>-		len += sprintf(buf+len, "%02x ", mca_dev-&gt;pos[j]);</div><div class='del'>-	/* change last trailing space to new line */</div><div class='del'>-	buf[len-1] = '\n';</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DEVICE_ATTR(id, S_IRUGO, mca_show_pos_id, NULL);</div><div class='del'>-static DEVICE_ATTR(pos, S_IRUGO, mca_show_pos, NULL);</div><div class='del'>-</div><div class='del'>-int __init mca_register_device(int bus, struct mca_device *mca_dev)</div><div class='del'>-{</div><div class='del'>-	struct mca_bus *mca_bus = mca_root_busses[bus];</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	mca_dev-&gt;dev.parent = &amp;mca_bus-&gt;dev;</div><div class='del'>-	mca_dev-&gt;dev.bus = &amp;mca_bus_type;</div><div class='del'>-	dev_set_name(&amp;mca_dev-&gt;dev, "%02d:%02X", bus, mca_dev-&gt;slot);</div><div class='del'>-	mca_dev-&gt;dma_mask = mca_bus-&gt;default_dma_mask;</div><div class='del'>-	mca_dev-&gt;dev.dma_mask = &amp;mca_dev-&gt;dma_mask;</div><div class='del'>-	mca_dev-&gt;dev.coherent_dma_mask = mca_dev-&gt;dma_mask;</div><div class='del'>-</div><div class='del'>-	rc = device_register(&amp;mca_dev-&gt;dev);</div><div class='del'>-	if (rc)</div><div class='del'>-		goto err_out;</div><div class='del'>-</div><div class='del'>-	rc = device_create_file(&amp;mca_dev-&gt;dev, &amp;dev_attr_id);</div><div class='del'>-	if (rc) goto err_out_devreg;</div><div class='del'>-	rc = device_create_file(&amp;mca_dev-&gt;dev, &amp;dev_attr_pos);</div><div class='del'>-	if (rc) goto err_out_id;</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-</div><div class='del'>-err_out_id:</div><div class='del'>-	device_remove_file(&amp;mca_dev-&gt;dev, &amp;dev_attr_id);</div><div class='del'>-err_out_devreg:</div><div class='del'>-	device_unregister(&amp;mca_dev-&gt;dev);</div><div class='del'>-err_out:</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* */</div><div class='del'>-struct mca_bus * __devinit mca_attach_bus(int bus)</div><div class='del'>-{</div><div class='del'>-	struct mca_bus *mca_bus;</div><div class='del'>-</div><div class='del'>-	if (unlikely(mca_root_busses[bus] != NULL)) {</div><div class='del'>-		/* This should never happen, but just in case */</div><div class='del'>-		printk(KERN_EMERG "MCA tried to add already existing bus %d\n",</div><div class='del'>-		       bus);</div><div class='del'>-		dump_stack();</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mca_bus = kzalloc(sizeof(struct mca_bus), GFP_KERNEL);</div><div class='del'>-	if (!mca_bus)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	dev_set_name(&amp;mca_bus-&gt;dev, "mca%d", bus);</div><div class='del'>-	sprintf(mca_bus-&gt;name,"Host %s MCA Bridge", bus ? "Secondary" : "Primary");</div><div class='del'>-	if (device_register(&amp;mca_bus-&gt;dev)) {</div><div class='del'>-		kfree(mca_bus);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mca_root_busses[bus] = mca_bus;</div><div class='del'>-</div><div class='del'>-	return mca_bus;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init mca_system_init (void)</div><div class='del'>-{</div><div class='del'>-	return bus_register(&amp;mca_bus_type);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/mca/mca-device.c b/drivers/mca/mca-device.c<br/>deleted file mode 100644<br/>index e7adf89fae41..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mca/mca-device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mca/mca-device.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,218 +0,0 @@</div><div class='del'>-/* -*- mode: c; c-basic-offset: 8 -*- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * MCA device support functions</div><div class='del'>- *</div><div class='del'>- * These functions support the ongoing device access API.</div><div class='del'>- *</div><div class='del'>- * (C) 2002 James Bottomley &lt;James.Bottomley@HansenPartnership.com&gt;</div><div class='del'>- *</div><div class='del'>-**-----------------------------------------------------------------------------</div><div class='del'>-**  </div><div class='del'>-**  This program is free software; you can redistribute it and/or modify</div><div class='del'>-**  it under the terms of the GNU General Public License as published by</div><div class='del'>-**  the Free Software Foundation; either version 2 of the License, or</div><div class='del'>-**  (at your option) any later version.</div><div class='del'>-**</div><div class='del'>-**  This program is distributed in the hope that it will be useful,</div><div class='del'>-**  but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>-**  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>-**  GNU General Public License for more details.</div><div class='del'>-**</div><div class='del'>-**  You should have received a copy of the GNU General Public License</div><div class='del'>-**  along with this program; if not, write to the Free Software</div><div class='del'>-**  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>-**</div><div class='del'>-**-----------------------------------------------------------------------------</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_device_read_stored_pos - read POS register from stored data</div><div class='del'>- *	@mca_dev: device to read from</div><div class='del'>- *	@reg:  register to read from</div><div class='del'>- *</div><div class='del'>- *	Fetch a POS value that was stored at boot time by the kernel</div><div class='del'>- *	when it scanned the MCA space. The register value is returned.</div><div class='del'>- *	Missing or invalid registers report 0.</div><div class='del'>- */</div><div class='del'>-unsigned char mca_device_read_stored_pos(struct mca_device *mca_dev, int reg)</div><div class='del'>-{</div><div class='del'>-	if(reg &lt; 0 || reg &gt;= 8)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return mca_dev-&gt;pos[reg];</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_device_read_stored_pos);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_device_read_pos - read POS register from card</div><div class='del'>- *	@mca_dev: device to read from</div><div class='del'>- *	@reg:  register to read from</div><div class='del'>- *</div><div class='del'>- *	Fetch a POS value directly from the hardware to obtain the</div><div class='del'>- *	current value. This is much slower than</div><div class='del'>- *	mca_device_read_stored_pos and may not be invoked from</div><div class='del'>- *	interrupt context. It handles the deep magic required for</div><div class='del'>- *	onboard devices transparently.</div><div class='del'>- */</div><div class='del'>-unsigned char mca_device_read_pos(struct mca_device *mca_dev, int reg)</div><div class='del'>-{</div><div class='del'>-	struct mca_bus *mca_bus = to_mca_bus(mca_dev-&gt;dev.parent);</div><div class='del'>-</div><div class='del'>-	return mca_bus-&gt;f.mca_read_pos(mca_dev, reg);</div><div class='del'>-</div><div class='del'>-	return 	mca_dev-&gt;pos[reg];</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_device_read_pos);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_device_write_pos - read POS register from card</div><div class='del'>- *	@mca_dev: device to write pos register to</div><div class='del'>- *	@reg:  register to write to</div><div class='del'>- *	@byte: byte to write to the POS registers</div><div class='del'>- *</div><div class='del'>- *	Store a POS value directly to the hardware. You should not</div><div class='del'>- *	normally need to use this function and should have a very good</div><div class='del'>- *	knowledge of MCA bus before you do so. Doing this wrongly can</div><div class='del'>- *	damage the hardware.</div><div class='del'>- *</div><div class='del'>- *	This function may not be used from interrupt context.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-void mca_device_write_pos(struct mca_device *mca_dev, int reg,</div><div class='del'>-			  unsigned char byte)</div><div class='del'>-{</div><div class='del'>-	struct mca_bus *mca_bus = to_mca_bus(mca_dev-&gt;dev.parent);</div><div class='del'>-</div><div class='del'>-	mca_bus-&gt;f.mca_write_pos(mca_dev, reg, byte);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_device_write_pos);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_device_transform_irq - transform the ADF obtained IRQ</div><div class='del'>- *	@mca_device: device whose irq needs transforming</div><div class='del'>- *	@irq: input irq from ADF</div><div class='del'>- *</div><div class='del'>- *	MCA Adapter Definition Files (ADF) contain irq, ioport, memory</div><div class='del'>- *	etc. definitions.  In systems with more than one bus, these need</div><div class='del'>- *	to be transformed through bus mapping functions to get the real</div><div class='del'>- *	system global quantities.</div><div class='del'>- *</div><div class='del'>- *	This function transforms the interrupt number and returns the</div><div class='del'>- *	transformed system global interrupt</div><div class='del'>- */</div><div class='del'>-int mca_device_transform_irq(struct mca_device *mca_dev, int irq)</div><div class='del'>-{</div><div class='del'>-	struct mca_bus *mca_bus = to_mca_bus(mca_dev-&gt;dev.parent);</div><div class='del'>-</div><div class='del'>-	return mca_bus-&gt;f.mca_transform_irq(mca_dev, irq);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_device_transform_irq);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_device_transform_ioport - transform the ADF obtained I/O port</div><div class='del'>- *	@mca_device: device whose port needs transforming</div><div class='del'>- *	@ioport: input I/O port from ADF</div><div class='del'>- *</div><div class='del'>- *	MCA Adapter Definition Files (ADF) contain irq, ioport, memory</div><div class='del'>- *	etc. definitions.  In systems with more than one bus, these need</div><div class='del'>- *	to be transformed through bus mapping functions to get the real</div><div class='del'>- *	system global quantities.</div><div class='del'>- *</div><div class='del'>- *	This function transforms the I/O port number and returns the</div><div class='del'>- *	transformed system global port number.</div><div class='del'>- *</div><div class='del'>- *	This transformation can be assumed to be linear for port ranges.</div><div class='del'>- */</div><div class='del'>-int mca_device_transform_ioport(struct mca_device *mca_dev, int port)</div><div class='del'>-{</div><div class='del'>-	struct mca_bus *mca_bus = to_mca_bus(mca_dev-&gt;dev.parent);</div><div class='del'>-</div><div class='del'>-	return mca_bus-&gt;f.mca_transform_ioport(mca_dev, port);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_device_transform_ioport);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_device_transform_memory - transform the ADF obtained memory</div><div class='del'>- *	@mca_device: device whose memory region needs transforming</div><div class='del'>- *	@mem: memory region start from ADF</div><div class='del'>- *</div><div class='del'>- *	MCA Adapter Definition Files (ADF) contain irq, ioport, memory</div><div class='del'>- *	etc. definitions.  In systems with more than one bus, these need</div><div class='del'>- *	to be transformed through bus mapping functions to get the real</div><div class='del'>- *	system global quantities.</div><div class='del'>- *</div><div class='del'>- *	This function transforms the memory region start and returns the</div><div class='del'>- *	transformed system global memory region (physical).</div><div class='del'>- *</div><div class='del'>- *	This transformation can be assumed to be linear for region ranges.</div><div class='del'>- */</div><div class='del'>-void *mca_device_transform_memory(struct mca_device *mca_dev, void *mem)</div><div class='del'>-{</div><div class='del'>-	struct mca_bus *mca_bus = to_mca_bus(mca_dev-&gt;dev.parent);</div><div class='del'>-</div><div class='del'>-	return mca_bus-&gt;f.mca_transform_memory(mca_dev, mem);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_device_transform_memory);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_device_claimed - check if claimed by driver</div><div class='del'>- *	@mca_dev:	device to check</div><div class='del'>- *</div><div class='del'>- *	Returns 1 if the slot has been claimed by a driver</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-int mca_device_claimed(struct mca_device *mca_dev)</div><div class='del'>-{</div><div class='del'>-	return mca_dev-&gt;driver_loaded;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_device_claimed);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_device_set_claim - set the claim value of the driver</div><div class='del'>- *	@mca_dev:	device to set value for</div><div class='del'>- *	@val:		claim value to set (1 claimed, 0 unclaimed)</div><div class='del'>- */</div><div class='del'>-void mca_device_set_claim(struct mca_device *mca_dev, int val)</div><div class='del'>-{</div><div class='del'>-	mca_dev-&gt;driver_loaded = val;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_device_set_claim);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_device_status - get the status of the device</div><div class='del'>- *	@mca_device:	device to get</div><div class='del'>- *</div><div class='del'>- *	returns an enumeration of the device status:</div><div class='del'>- *</div><div class='del'>- *	MCA_ADAPTER_NORMAL	adapter is OK.</div><div class='del'>- *	MCA_ADAPTER_NONE	no adapter at device (should never happen).</div><div class='del'>- *	MCA_ADAPTER_DISABLED	adapter is disabled.</div><div class='del'>- *	MCA_ADAPTER_ERROR	adapter cannot be initialised.</div><div class='del'>- */</div><div class='del'>-enum MCA_AdapterStatus mca_device_status(struct mca_device *mca_dev)</div><div class='del'>-{</div><div class='del'>-	return mca_dev-&gt;status;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_device_status);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_device_set_name - set the name of the device</div><div class='del'>- *	@mca_device:	device to set the name of</div><div class='del'>- *	@name:		name to set</div><div class='del'>- */</div><div class='del'>-void mca_device_set_name(struct mca_device *mca_dev, const char *name)</div><div class='del'>-{</div><div class='del'>-	if(!mca_dev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	strlcpy(mca_dev-&gt;name, name, sizeof(mca_dev-&gt;name));</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_device_set_name);</div><div class='head'>diff --git a/drivers/mca/mca-driver.c b/drivers/mca/mca-driver.c<br/>deleted file mode 100644<br/>index 32cd39bcc715..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mca/mca-driver.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mca/mca-driver.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,63 +0,0 @@</div><div class='del'>-/* -*- mode: c; c-basic-offset: 8 -*- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * MCA driver support functions for sysfs.</div><div class='del'>- *</div><div class='del'>- * (C) 2002 James Bottomley &lt;James.Bottomley@HansenPartnership.com&gt;</div><div class='del'>- *</div><div class='del'>-**-----------------------------------------------------------------------------</div><div class='del'>-**  </div><div class='del'>-**  This program is free software; you can redistribute it and/or modify</div><div class='del'>-**  it under the terms of the GNU General Public License as published by</div><div class='del'>-**  the Free Software Foundation; either version 2 of the License, or</div><div class='del'>-**  (at your option) any later version.</div><div class='del'>-**</div><div class='del'>-**  This program is distributed in the hope that it will be useful,</div><div class='del'>-**  but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>-**  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>-**  GNU General Public License for more details.</div><div class='del'>-**</div><div class='del'>-**  You should have received a copy of the GNU General Public License</div><div class='del'>-**  along with this program; if not, write to the Free Software</div><div class='del'>-**  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>-**</div><div class='del'>-**-----------------------------------------------------------------------------</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-int mca_register_driver(struct mca_driver *mca_drv)</div><div class='del'>-{</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	if (MCA_bus) {</div><div class='del'>-		mca_drv-&gt;driver.bus = &amp;mca_bus_type;</div><div class='del'>-		if ((r = driver_register(&amp;mca_drv-&gt;driver)) &lt; 0)</div><div class='del'>-			return r;</div><div class='del'>-		mca_drv-&gt;integrated_id = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_register_driver);</div><div class='del'>-</div><div class='del'>-int mca_register_driver_integrated(struct mca_driver *mca_driver,</div><div class='del'>-				   int integrated_id)</div><div class='del'>-{</div><div class='del'>-	int r = mca_register_driver(mca_driver);</div><div class='del'>-</div><div class='del'>-	if (!r)</div><div class='del'>-		mca_driver-&gt;integrated_id = integrated_id;</div><div class='del'>-</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_register_driver_integrated);</div><div class='del'>-</div><div class='del'>-void mca_unregister_driver(struct mca_driver *mca_drv)</div><div class='del'>-{</div><div class='del'>-	if (MCA_bus)</div><div class='del'>-		driver_unregister(&amp;mca_drv-&gt;driver);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_unregister_driver);</div><div class='head'>diff --git a/drivers/mca/mca-legacy.c b/drivers/mca/mca-legacy.c<br/>deleted file mode 100644<br/>index 494f0c2001f5..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mca/mca-legacy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mca/mca-legacy.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,329 +0,0 @@</div><div class='del'>-/* -*- mode: c; c-basic-offset: 8 -*- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * MCA bus support functions for legacy (2.4) API.</div><div class='del'>- *</div><div class='del'>- * Legacy API means the API that operates in terms of MCA slot number</div><div class='del'>- *</div><div class='del'>- * (C) 2002 James Bottomley &lt;James.Bottomley@HansenPartnership.com&gt;</div><div class='del'>- *</div><div class='del'>-**-----------------------------------------------------------------------------</div><div class='del'>-**  </div><div class='del'>-**  This program is free software; you can redistribute it and/or modify</div><div class='del'>-**  it under the terms of the GNU General Public License as published by</div><div class='del'>-**  the Free Software Foundation; either version 2 of the License, or</div><div class='del'>-**  (at your option) any later version.</div><div class='del'>-**</div><div class='del'>-**  This program is distributed in the hope that it will be useful,</div><div class='del'>-**  but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>-**  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>-**  GNU General Public License for more details.</div><div class='del'>-**</div><div class='del'>-**  You should have received a copy of the GNU General Public License</div><div class='del'>-**  along with this program; if not, write to the Free Software</div><div class='del'>-**  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>-**</div><div class='del'>-**-----------------------------------------------------------------------------</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/mca-legacy.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-/* NOTE: This structure is stack allocated */</div><div class='del'>-struct mca_find_adapter_info {</div><div class='del'>-	int			id;</div><div class='del'>-	int			slot;</div><div class='del'>-	struct mca_device	*mca_dev;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* The purpose of this iterator is to loop over all the devices and</div><div class='del'>- * find the one with the smallest slot number that's just greater than</div><div class='del'>- * or equal to the required slot with a matching id */</div><div class='del'>-static int mca_find_adapter_callback(struct device *dev, void *data)</div><div class='del'>-{</div><div class='del'>-	struct mca_find_adapter_info *info = data;</div><div class='del'>-	struct mca_device *mca_dev = to_mca_device(dev);</div><div class='del'>-</div><div class='del'>-	if(mca_dev-&gt;pos_id != info-&gt;id)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if(mca_dev-&gt;slot &lt; info-&gt;slot)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if(!info-&gt;mca_dev || info-&gt;mca_dev-&gt;slot &gt;= mca_dev-&gt;slot)</div><div class='del'>-		info-&gt;mca_dev = mca_dev;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_find_adapter - scan for adapters</div><div class='del'>- *	@id:	MCA identification to search for</div><div class='del'>- *	@start:	starting slot</div><div class='del'>- *</div><div class='del'>- *	Search the MCA configuration for adapters matching the 16bit</div><div class='del'>- *	ID given. The first time it should be called with start as zero</div><div class='del'>- *	and then further calls made passing the return value of the</div><div class='del'>- *	previous call until %MCA_NOTFOUND is returned.</div><div class='del'>- *</div><div class='del'>- *	Disabled adapters are not reported.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-int mca_find_adapter(int id, int start)</div><div class='del'>-{</div><div class='del'>-	struct mca_find_adapter_info info;</div><div class='del'>-</div><div class='del'>-	if(id == 0xffff)</div><div class='del'>-		return MCA_NOTFOUND;</div><div class='del'>-</div><div class='del'>-	info.slot = start;</div><div class='del'>-	info.id = id;</div><div class='del'>-	info.mca_dev = NULL;</div><div class='del'>-</div><div class='del'>-	for(;;) {</div><div class='del'>-		bus_for_each_dev(&amp;mca_bus_type, NULL, &amp;info, mca_find_adapter_callback);</div><div class='del'>-</div><div class='del'>-		if(info.mca_dev == NULL)</div><div class='del'>-			return MCA_NOTFOUND;</div><div class='del'>-</div><div class='del'>-		if(info.mca_dev-&gt;status != MCA_ADAPTER_DISABLED)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/* OK, found adapter but it was disabled.  Go around</div><div class='del'>-		 * again, excluding the slot we just found */</div><div class='del'>-</div><div class='del'>-		info.slot = info.mca_dev-&gt;slot + 1;</div><div class='del'>-		info.mca_dev = NULL;</div><div class='del'>-	}</div><div class='del'>-		</div><div class='del'>-	return info.mca_dev-&gt;slot;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_find_adapter);</div><div class='del'>-</div><div class='del'>-/*--------------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_find_unused_adapter - scan for unused adapters</div><div class='del'>- *	@id:	MCA identification to search for</div><div class='del'>- *	@start:	starting slot</div><div class='del'>- *</div><div class='del'>- *	Search the MCA configuration for adapters matching the 16bit</div><div class='del'>- *	ID given. The first time it should be called with start as zero</div><div class='del'>- *	and then further calls made passing the return value of the</div><div class='del'>- *	previous call until %MCA_NOTFOUND is returned.</div><div class='del'>- *</div><div class='del'>- *	Adapters that have been claimed by drivers and those that</div><div class='del'>- *	are disabled are not reported. This function thus allows a driver</div><div class='del'>- *	to scan for further cards when some may already be driven.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-int mca_find_unused_adapter(int id, int start)</div><div class='del'>-{</div><div class='del'>-	struct mca_find_adapter_info info = { 0 };</div><div class='del'>-</div><div class='del'>-	if (!MCA_bus || id == 0xffff)</div><div class='del'>-		return MCA_NOTFOUND;</div><div class='del'>-</div><div class='del'>-	info.slot = start;</div><div class='del'>-	info.id = id;</div><div class='del'>-	info.mca_dev = NULL;</div><div class='del'>-</div><div class='del'>-	for(;;) {</div><div class='del'>-		bus_for_each_dev(&amp;mca_bus_type, NULL, &amp;info, mca_find_adapter_callback);</div><div class='del'>-</div><div class='del'>-		if(info.mca_dev == NULL)</div><div class='del'>-			return MCA_NOTFOUND;</div><div class='del'>-</div><div class='del'>-		if(info.mca_dev-&gt;status != MCA_ADAPTER_DISABLED</div><div class='del'>-		   &amp;&amp; !info.mca_dev-&gt;driver_loaded)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/* OK, found adapter but it was disabled or already in</div><div class='del'>-		 * use.  Go around again, excluding the slot we just</div><div class='del'>-		 * found */</div><div class='del'>-</div><div class='del'>-		info.slot = info.mca_dev-&gt;slot + 1;</div><div class='del'>-		info.mca_dev = NULL;</div><div class='del'>-	}</div><div class='del'>-		</div><div class='del'>-	return info.mca_dev-&gt;slot;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_find_unused_adapter);</div><div class='del'>-</div><div class='del'>-/* NOTE: stack allocated structure */</div><div class='del'>-struct mca_find_device_by_slot_info {</div><div class='del'>-	int			slot;</div><div class='del'>-	struct mca_device 	*mca_dev;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int mca_find_device_by_slot_callback(struct device *dev, void *data)</div><div class='del'>-{</div><div class='del'>-	struct mca_find_device_by_slot_info *info = data;</div><div class='del'>-	struct mca_device *mca_dev = to_mca_device(dev);</div><div class='del'>-</div><div class='del'>-	if(mca_dev-&gt;slot == info-&gt;slot)</div><div class='del'>-		info-&gt;mca_dev = mca_dev;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct mca_device *mca_find_device_by_slot(int slot)</div><div class='del'>-{</div><div class='del'>-	struct mca_find_device_by_slot_info info;</div><div class='del'>-</div><div class='del'>-	info.slot = slot;</div><div class='del'>-	info.mca_dev = NULL;</div><div class='del'>-</div><div class='del'>-	bus_for_each_dev(&amp;mca_bus_type, NULL, &amp;info, mca_find_device_by_slot_callback);</div><div class='del'>-</div><div class='del'>-	return info.mca_dev;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_read_stored_pos - read POS register from boot data</div><div class='del'>- *	@slot: slot number to read from</div><div class='del'>- *	@reg:  register to read from</div><div class='del'>- *</div><div class='del'>- *	Fetch a POS value that was stored at boot time by the kernel</div><div class='del'>- *	when it scanned the MCA space. The register value is returned.</div><div class='del'>- *	Missing or invalid registers report 0.</div><div class='del'>- */</div><div class='del'>-unsigned char mca_read_stored_pos(int slot, int reg)</div><div class='del'>-{</div><div class='del'>-	struct mca_device *mca_dev = mca_find_device_by_slot(slot);</div><div class='del'>-</div><div class='del'>-	if(!mca_dev)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return mca_device_read_stored_pos(mca_dev, reg);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_read_stored_pos);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_read_pos - read POS register from card</div><div class='del'>- *	@slot: slot number to read from</div><div class='del'>- *	@reg:  register to read from</div><div class='del'>- *</div><div class='del'>- *	Fetch a POS value directly from the hardware to obtain the</div><div class='del'>- *	current value. This is much slower than mca_read_stored_pos and</div><div class='del'>- *	may not be invoked from interrupt context. It handles the</div><div class='del'>- *	deep magic required for onboard devices transparently.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-unsigned char mca_read_pos(int slot, int reg)</div><div class='del'>-{</div><div class='del'>-	struct mca_device *mca_dev = mca_find_device_by_slot(slot);</div><div class='del'>-</div><div class='del'>-	if(!mca_dev)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return mca_device_read_pos(mca_dev, reg);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_read_pos);</div><div class='del'>-</div><div class='del'>-		</div><div class='del'>-/**</div><div class='del'>- *	mca_write_pos - read POS register from card</div><div class='del'>- *	@slot: slot number to read from</div><div class='del'>- *	@reg:  register to read from</div><div class='del'>- *	@byte: byte to write to the POS registers</div><div class='del'>- *</div><div class='del'>- *	Store a POS value directly from the hardware. You should not</div><div class='del'>- *	normally need to use this function and should have a very good</div><div class='del'>- *	knowledge of MCA bus before you do so. Doing this wrongly can</div><div class='del'>- *	damage the hardware.</div><div class='del'>- *</div><div class='del'>- *	This function may not be used from interrupt context.</div><div class='del'>- *</div><div class='del'>- *	Note that this a technically a Bad Thing, as IBM tech stuff says</div><div class='del'>- *	you should only set POS values through their utilities.</div><div class='del'>- *	However, some devices such as the 3c523 recommend that you write</div><div class='del'>- *	back some data to make sure the configuration is consistent.</div><div class='del'>- *	I'd say that IBM is right, but I like my drivers to work.</div><div class='del'>- *</div><div class='del'>- *	This function can't do checks to see if multiple devices end up</div><div class='del'>- *	with the same resources, so you might see magic smoke if someone</div><div class='del'>- *	screws up.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-void mca_write_pos(int slot, int reg, unsigned char byte)</div><div class='del'>-{</div><div class='del'>-	struct mca_device *mca_dev = mca_find_device_by_slot(slot);</div><div class='del'>-</div><div class='del'>-	if(!mca_dev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mca_device_write_pos(mca_dev, reg, byte);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_write_pos);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_set_adapter_name - Set the description of the card</div><div class='del'>- *	@slot: slot to name</div><div class='del'>- *	@name: text string for the namen</div><div class='del'>- *</div><div class='del'>- *	This function sets the name reported via /proc for this</div><div class='del'>- *	adapter slot. This is for user information only. Setting a</div><div class='del'>- *	name deletes any previous name.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-void mca_set_adapter_name(int slot, char* name)</div><div class='del'>-{</div><div class='del'>-	struct mca_device *mca_dev = mca_find_device_by_slot(slot);</div><div class='del'>-</div><div class='del'>-	if(!mca_dev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mca_device_set_name(mca_dev, name);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_set_adapter_name);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_mark_as_used - claim an MCA device</div><div class='del'>- *	@slot:	slot to claim</div><div class='del'>- *	FIXME:  should we make this threadsafe</div><div class='del'>- *</div><div class='del'>- *	Claim an MCA slot for a device driver. If the</div><div class='del'>- *	slot is already taken the function returns 1,</div><div class='del'>- *	if it is not taken it is claimed and 0 is</div><div class='del'>- *	returned.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-int mca_mark_as_used(int slot)</div><div class='del'>-{</div><div class='del'>-	struct mca_device *mca_dev = mca_find_device_by_slot(slot);</div><div class='del'>-</div><div class='del'>-	if(!mca_dev)</div><div class='del'>-		/* FIXME: this is actually a severe error */</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	if(mca_device_claimed(mca_dev))</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	mca_device_set_claim(mca_dev, 1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_mark_as_used);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_mark_as_unused - release an MCA device</div><div class='del'>- *	@slot:	slot to claim</div><div class='del'>- *</div><div class='del'>- *	Release the slot for other drives to use.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-void mca_mark_as_unused(int slot)</div><div class='del'>-{</div><div class='del'>-	struct mca_device *mca_dev = mca_find_device_by_slot(slot);</div><div class='del'>-</div><div class='del'>-	if(!mca_dev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mca_device_set_claim(mca_dev, 0);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_mark_as_unused);</div><div class='del'>-</div><div class='head'>diff --git a/drivers/mca/mca-proc.c b/drivers/mca/mca-proc.c<br/>deleted file mode 100644<br/>index 81ea0d377bf4..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mca/mca-proc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mca/mca-proc.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,249 +0,0 @@</div><div class='del'>-/* -*- mode: c; c-basic-offset: 8 -*- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * MCA bus support functions for the proc fs.</div><div class='del'>- *</div><div class='del'>- * NOTE: this code *requires* the legacy MCA api.</div><div class='del'>- *</div><div class='del'>- * Legacy API means the API that operates in terms of MCA slot number</div><div class='del'>- *</div><div class='del'>- * (C) 2002 James Bottomley &lt;James.Bottomley@HansenPartnership.com&gt;</div><div class='del'>- *</div><div class='del'>-**-----------------------------------------------------------------------------</div><div class='del'>-**  </div><div class='del'>-**  This program is free software; you can redistribute it and/or modify</div><div class='del'>-**  it under the terms of the GNU General Public License as published by</div><div class='del'>-**  the Free Software Foundation; either version 2 of the License, or</div><div class='del'>-**  (at your option) any later version.</div><div class='del'>-**</div><div class='del'>-**  This program is distributed in the hope that it will be useful,</div><div class='del'>-**  but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>-**  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>-**  GNU General Public License for more details.</div><div class='del'>-**</div><div class='del'>-**  You should have received a copy of the GNU General Public License</div><div class='del'>-**  along with this program; if not, write to the Free Software</div><div class='del'>-**  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>-**</div><div class='del'>-**-----------------------------------------------------------------------------</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/proc_fs.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-</div><div class='del'>-static int get_mca_info_helper(struct mca_device *mca_dev, char *page, int len)</div><div class='del'>-{</div><div class='del'>-	int j;</div><div class='del'>-</div><div class='del'>-	for(j=0; j&lt;8; j++)</div><div class='del'>-		len += sprintf(page+len, "%02x ",</div><div class='del'>-			       mca_dev ? mca_dev-&gt;pos[j] : 0xff);</div><div class='del'>-	len += sprintf(page+len, " %s\n", mca_dev ? mca_dev-&gt;name : "");</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int get_mca_info(char *page, char **start, off_t off,</div><div class='del'>-			int count, int *eof, void *data)</div><div class='del'>-{</div><div class='del'>-	int i, len = 0;</div><div class='del'>-</div><div class='del'>-	if(MCA_bus) {</div><div class='del'>-		struct mca_device *mca_dev;</div><div class='del'>-		/* Format POS registers of eight MCA slots */</div><div class='del'>-</div><div class='del'>-		for(i=0; i&lt;MCA_MAX_SLOT_NR; i++) {</div><div class='del'>-			mca_dev = mca_find_device_by_slot(i);</div><div class='del'>-</div><div class='del'>-			len += sprintf(page+len, "Slot %d: ", i+1);</div><div class='del'>-			len = get_mca_info_helper(mca_dev, page, len);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Format POS registers of integrated video subsystem */</div><div class='del'>-</div><div class='del'>-		mca_dev = mca_find_device_by_slot(MCA_INTEGVIDEO);</div><div class='del'>-		len += sprintf(page+len, "Video : ");</div><div class='del'>-		len = get_mca_info_helper(mca_dev, page, len);</div><div class='del'>-</div><div class='del'>-		/* Format POS registers of integrated SCSI subsystem */</div><div class='del'>-</div><div class='del'>-		mca_dev = mca_find_device_by_slot(MCA_INTEGSCSI);</div><div class='del'>-		len += sprintf(page+len, "SCSI  : ");</div><div class='del'>-		len = get_mca_info_helper(mca_dev, page, len);</div><div class='del'>-</div><div class='del'>-		/* Format POS registers of motherboard */</div><div class='del'>-</div><div class='del'>-		mca_dev = mca_find_device_by_slot(MCA_MOTHERBOARD);</div><div class='del'>-		len += sprintf(page+len, "Planar: ");</div><div class='del'>-		len = get_mca_info_helper(mca_dev, page, len);</div><div class='del'>-	} else {</div><div class='del'>-		/* Leave it empty if MCA not detected - this should *never*</div><div class='del'>-		 * happen!</div><div class='del'>-		 */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &lt;= off+count) *eof = 1;</div><div class='del'>-	*start = page + off;</div><div class='del'>-	len -= off;</div><div class='del'>-	if (len&gt;count) len = count;</div><div class='del'>-	if (len&lt;0) len = 0;</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*--------------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-static int mca_default_procfn(char* buf, struct mca_device *mca_dev)</div><div class='del'>-{</div><div class='del'>-	int len = 0, i;</div><div class='del'>-	int slot = mca_dev-&gt;slot;</div><div class='del'>-</div><div class='del'>-	/* Print out the basic information */</div><div class='del'>-</div><div class='del'>-	if(slot &lt; MCA_MAX_SLOT_NR) {</div><div class='del'>-		len += sprintf(buf+len, "Slot: %d\n", slot+1);</div><div class='del'>-	} else if(slot == MCA_INTEGSCSI) {</div><div class='del'>-		len += sprintf(buf+len, "Integrated SCSI Adapter\n");</div><div class='del'>-	} else if(slot == MCA_INTEGVIDEO) {</div><div class='del'>-		len += sprintf(buf+len, "Integrated Video Adapter\n");</div><div class='del'>-	} else if(slot == MCA_MOTHERBOARD) {</div><div class='del'>-		len += sprintf(buf+len, "Motherboard\n");</div><div class='del'>-	}</div><div class='del'>-	if (mca_dev-&gt;name[0]) {</div><div class='del'>-</div><div class='del'>-		/* Drivers might register a name without /proc handler... */</div><div class='del'>-</div><div class='del'>-		len += sprintf(buf+len, "Adapter Name: %s\n",</div><div class='del'>-			       mca_dev-&gt;name);</div><div class='del'>-	} else {</div><div class='del'>-		len += sprintf(buf+len, "Adapter Name: Unknown\n");</div><div class='del'>-	}</div><div class='del'>-	len += sprintf(buf+len, "Id: %02x%02x\n",</div><div class='del'>-		mca_dev-&gt;pos[1], mca_dev-&gt;pos[0]);</div><div class='del'>-	len += sprintf(buf+len, "Enabled: %s\nPOS: ",</div><div class='del'>-		mca_device_status(mca_dev) == MCA_ADAPTER_NORMAL ?</div><div class='del'>-			"Yes" : "No");</div><div class='del'>-	for(i=0; i&lt;8; i++) {</div><div class='del'>-		len += sprintf(buf+len, "%02x ", mca_dev-&gt;pos[i]);</div><div class='del'>-	}</div><div class='del'>-	len += sprintf(buf+len, "\nDriver Installed: %s",</div><div class='del'>-		mca_device_claimed(mca_dev) ? "Yes" : "No");</div><div class='del'>-	buf[len++] = '\n';</div><div class='del'>-	buf[len] = 0;</div><div class='del'>-</div><div class='del'>-	return len;</div><div class='del'>-} /* mca_default_procfn() */</div><div class='del'>-</div><div class='del'>-static int get_mca_machine_info(char* page, char **start, off_t off,</div><div class='del'>-				 int count, int *eof, void *data)</div><div class='del'>-{</div><div class='del'>-	int len = 0;</div><div class='del'>-</div><div class='del'>-	len += sprintf(page+len, "Model Id: 0x%x\n", machine_id);</div><div class='del'>-	len += sprintf(page+len, "Submodel Id: 0x%x\n", machine_submodel_id);</div><div class='del'>-	len += sprintf(page+len, "BIOS Revision: 0x%x\n", BIOS_revision);</div><div class='del'>-</div><div class='del'>-	if (len &lt;= off+count) *eof = 1;</div><div class='del'>-	*start = page + off;</div><div class='del'>-	len -= off;</div><div class='del'>-	if (len&gt;count) len = count;</div><div class='del'>-	if (len&lt;0) len = 0;</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mca_read_proc(char *page, char **start, off_t off,</div><div class='del'>-				 int count, int *eof, void *data)</div><div class='del'>-{</div><div class='del'>-	struct mca_device *mca_dev = (struct mca_device *)data;</div><div class='del'>-	int len = 0;</div><div class='del'>-</div><div class='del'>-	/* Get the standard info */</div><div class='del'>-</div><div class='del'>-	len = mca_default_procfn(page, mca_dev);</div><div class='del'>-</div><div class='del'>-	/* Do any device-specific processing, if there is any */</div><div class='del'>-</div><div class='del'>-	if(mca_dev-&gt;procfn) {</div><div class='del'>-		len += mca_dev-&gt;procfn(page+len, mca_dev-&gt;slot,</div><div class='del'>-				       mca_dev-&gt;proc_dev);</div><div class='del'>-	}</div><div class='del'>-	if (len &lt;= off+count) *eof = 1;</div><div class='del'>-	*start = page + off;</div><div class='del'>-	len -= off;</div><div class='del'>-	if (len&gt;count) len = count;</div><div class='del'>-	if (len&lt;0) len = 0;</div><div class='del'>-	return len;</div><div class='del'>-} /* mca_read_proc() */</div><div class='del'>-</div><div class='del'>-/*--------------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-void __init mca_do_proc_init(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	struct proc_dir_entry *proc_mca;</div><div class='del'>-	struct proc_dir_entry* node = NULL;</div><div class='del'>-	struct mca_device *mca_dev;</div><div class='del'>-</div><div class='del'>-	proc_mca = proc_mkdir("mca", NULL);</div><div class='del'>-	create_proc_read_entry("pos",0,proc_mca,get_mca_info,NULL);</div><div class='del'>-	create_proc_read_entry("machine",0,proc_mca,get_mca_machine_info,NULL);</div><div class='del'>-</div><div class='del'>-	/* Initialize /proc/mca entries for existing adapters */</div><div class='del'>-</div><div class='del'>-	for(i = 0; i &lt; MCA_NUMADAPTERS; i++) {</div><div class='del'>-		enum MCA_AdapterStatus status;</div><div class='del'>-		mca_dev = mca_find_device_by_slot(i);</div><div class='del'>-		if(!mca_dev)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		mca_dev-&gt;procfn = NULL;</div><div class='del'>-</div><div class='del'>-		if(i &lt; MCA_MAX_SLOT_NR) sprintf(mca_dev-&gt;procname,"slot%d", i+1);</div><div class='del'>-		else if(i == MCA_INTEGVIDEO) sprintf(mca_dev-&gt;procname,"video");</div><div class='del'>-		else if(i == MCA_INTEGSCSI) sprintf(mca_dev-&gt;procname,"scsi");</div><div class='del'>-		else if(i == MCA_MOTHERBOARD) sprintf(mca_dev-&gt;procname,"planar");</div><div class='del'>-</div><div class='del'>-		status = mca_device_status(mca_dev);</div><div class='del'>-		if (status != MCA_ADAPTER_NORMAL &amp;&amp;</div><div class='del'>-		    status != MCA_ADAPTER_DISABLED)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		node = create_proc_read_entry(mca_dev-&gt;procname, 0, proc_mca,</div><div class='del'>-					      mca_read_proc, (void *)mca_dev);</div><div class='del'>-</div><div class='del'>-		if(node == NULL) {</div><div class='del'>-			printk("Failed to allocate memory for MCA proc-entries!");</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-} /* mca_do_proc_init() */</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mca_set_adapter_procfn - Set the /proc callback</div><div class='del'>- *	@slot: slot to configure</div><div class='del'>- *	@procfn: callback function to call for /proc</div><div class='del'>- *	@dev: device information passed to the callback</div><div class='del'>- *</div><div class='del'>- *	This sets up an information callback for /proc/mca/slot?.  The</div><div class='del'>- *	function is called with the buffer, slot, and device pointer (or</div><div class='del'>- *	some equally informative context information, or nothing, if you</div><div class='del'>- *	prefer), and is expected to put useful information into the</div><div class='del'>- *	buffer.  The adapter name, ID, and POS registers get printed</div><div class='del'>- *	before this is called though, so don't do it again.</div><div class='del'>- *</div><div class='del'>- *	This should be called with a %NULL @procfn when a module</div><div class='del'>- *	unregisters, thus preventing kernel crashes and other such</div><div class='del'>- *	nastiness.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-void mca_set_adapter_procfn(int slot, MCA_ProcFn procfn, void* proc_dev)</div><div class='del'>-{</div><div class='del'>-	struct mca_device *mca_dev = mca_find_device_by_slot(slot);</div><div class='del'>-</div><div class='del'>-	if(!mca_dev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mca_dev-&gt;procfn = procfn;</div><div class='del'>-	mca_dev-&gt;proc_dev = proc_dev;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mca_set_adapter_procfn);</div><div class='head'>diff --git a/drivers/md/bitmap.c b/drivers/md/bitmap.c<br/>index 97e73e555d11..15dbe03117e4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/bitmap.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/bitmap.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/bitmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/bitmap.c</a></div><div class='hunk'>@@ -45,7 +45,7 @@ static inline char *bmname(struct bitmap *bitmap)</div><div class='ctx'>  * if we find our page, we increment the page's refcount so that it stays</div><div class='ctx'>  * allocated while we're using it</div><div class='ctx'>  */</div><div class='del'>-static int bitmap_checkpage(struct bitmap *bitmap,</div><div class='add'>+static int bitmap_checkpage(struct bitmap_counts *bitmap,</div><div class='ctx'> 			    unsigned long page, int create)</div><div class='ctx'> __releases(bitmap-&gt;lock)</div><div class='ctx'> __acquires(bitmap-&gt;lock)</div><div class='hunk'>@@ -76,8 +76,7 @@ __acquires(bitmap-&gt;lock)</div><div class='ctx'> 	spin_lock_irq(&amp;bitmap-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (mappage == NULL) {</div><div class='del'>-		pr_debug("%s: bitmap map page allocation failed, hijacking\n",</div><div class='del'>-			 bmname(bitmap));</div><div class='add'>+		pr_debug("md/bitmap: map page allocation failed, hijacking\n");</div><div class='ctx'> 		/* failed - set the hijacked flag so that we can use the</div><div class='ctx'> 		 * pointer as a counter */</div><div class='ctx'> 		if (!bitmap-&gt;bp[page].map)</div><div class='hunk'>@@ -100,7 +99,7 @@ __acquires(bitmap-&gt;lock)</div><div class='ctx'> /* if page is completely empty, put it back on the free list, or dealloc it */</div><div class='ctx'> /* if page was hijacked, unmark the flag so it might get alloced next time */</div><div class='ctx'> /* Note: lock should be held when calling this */</div><div class='del'>-static void bitmap_checkfree(struct bitmap *bitmap, unsigned long page)</div><div class='add'>+static void bitmap_checkfree(struct bitmap_counts *bitmap, unsigned long page)</div><div class='ctx'> {</div><div class='ctx'> 	char *ptr;</div><div class='ctx'> </div><div class='hunk'>@@ -130,22 +129,14 @@ static void bitmap_checkfree(struct bitmap *bitmap, unsigned long page)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* IO operations when bitmap is stored near all superblocks */</div><div class='del'>-static struct page *read_sb_page(struct mddev *mddev, loff_t offset,</div><div class='del'>-				 struct page *page,</div><div class='del'>-				 unsigned long index, int size)</div><div class='add'>+static int read_sb_page(struct mddev *mddev, loff_t offset,</div><div class='add'>+			struct page *page,</div><div class='add'>+			unsigned long index, int size)</div><div class='ctx'> {</div><div class='ctx'> 	/* choose a good rdev and read the page from there */</div><div class='ctx'> </div><div class='ctx'> 	struct md_rdev *rdev;</div><div class='ctx'> 	sector_t target;</div><div class='del'>-	int did_alloc = 0;</div><div class='del'>-</div><div class='del'>-	if (!page) {</div><div class='del'>-		page = alloc_page(GFP_KERNEL);</div><div class='del'>-		if (!page)</div><div class='del'>-			return ERR_PTR(-ENOMEM);</div><div class='del'>-		did_alloc = 1;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	rdev_for_each(rdev, mddev) {</div><div class='ctx'> 		if (! test_bit(In_sync, &amp;rdev-&gt;flags)</div><div class='hunk'>@@ -158,15 +149,10 @@ static struct page *read_sb_page(struct mddev *mddev, loff_t offset,</div><div class='ctx'> 				 roundup(size, bdev_logical_block_size(rdev-&gt;bdev)),</div><div class='ctx'> 				 page, READ, true)) {</div><div class='ctx'> 			page-&gt;index = index;</div><div class='del'>-			attach_page_buffers(page, NULL); /* so that free_buffer will</div><div class='del'>-							  * quietly no-op */</div><div class='del'>-			return page;</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (did_alloc)</div><div class='del'>-		put_page(page);</div><div class='del'>-	return ERR_PTR(-EIO);</div><div class='del'>-</div><div class='add'>+	return -EIO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct md_rdev *next_active_rdev(struct md_rdev *rdev, struct mddev *mddev)</div><div class='hunk'>@@ -208,6 +194,7 @@ static int write_sb_page(struct bitmap *bitmap, struct page *page, int wait)</div><div class='ctx'> 	struct md_rdev *rdev = NULL;</div><div class='ctx'> 	struct block_device *bdev;</div><div class='ctx'> 	struct mddev *mddev = bitmap-&gt;mddev;</div><div class='add'>+	struct bitmap_storage *store = &amp;bitmap-&gt;storage;</div><div class='ctx'> </div><div class='ctx'> 	while ((rdev = next_active_rdev(rdev, mddev)) != NULL) {</div><div class='ctx'> 		int size = PAGE_SIZE;</div><div class='hunk'>@@ -215,9 +202,13 @@ static int write_sb_page(struct bitmap *bitmap, struct page *page, int wait)</div><div class='ctx'> </div><div class='ctx'> 		bdev = (rdev-&gt;meta_bdev) ? rdev-&gt;meta_bdev : rdev-&gt;bdev;</div><div class='ctx'> </div><div class='del'>-		if (page-&gt;index == bitmap-&gt;file_pages-1)</div><div class='del'>-			size = roundup(bitmap-&gt;last_page_size,</div><div class='add'>+		if (page-&gt;index == store-&gt;file_pages-1) {</div><div class='add'>+			int last_page_size = store-&gt;bytes &amp; (PAGE_SIZE-1);</div><div class='add'>+			if (last_page_size == 0)</div><div class='add'>+				last_page_size = PAGE_SIZE;</div><div class='add'>+			size = roundup(last_page_size,</div><div class='ctx'> 				       bdev_logical_block_size(bdev));</div><div class='add'>+		}</div><div class='ctx'> 		/* Just make sure we aren't corrupting data or</div><div class='ctx'> 		 * metadata</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -276,10 +267,10 @@ static void write_page(struct bitmap *bitmap, struct page *page, int wait)</div><div class='ctx'> {</div><div class='ctx'> 	struct buffer_head *bh;</div><div class='ctx'> </div><div class='del'>-	if (bitmap-&gt;file == NULL) {</div><div class='add'>+	if (bitmap-&gt;storage.file == NULL) {</div><div class='ctx'> 		switch (write_sb_page(bitmap, page, wait)) {</div><div class='ctx'> 		case -EINVAL:</div><div class='del'>-			bitmap-&gt;flags |= BITMAP_WRITE_ERROR;</div><div class='add'>+			set_bit(BITMAP_WRITE_ERROR, &amp;bitmap-&gt;flags);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> </div><div class='hunk'>@@ -297,20 +288,16 @@ static void write_page(struct bitmap *bitmap, struct page *page, int wait)</div><div class='ctx'> 			wait_event(bitmap-&gt;write_wait,</div><div class='ctx'> 				   atomic_read(&amp;bitmap-&gt;pending_writes)==0);</div><div class='ctx'> 	}</div><div class='del'>-	if (bitmap-&gt;flags &amp; BITMAP_WRITE_ERROR)</div><div class='add'>+	if (test_bit(BITMAP_WRITE_ERROR, &amp;bitmap-&gt;flags))</div><div class='ctx'> 		bitmap_file_kick(bitmap);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void end_bitmap_write(struct buffer_head *bh, int uptodate)</div><div class='ctx'> {</div><div class='ctx'> 	struct bitmap *bitmap = bh-&gt;b_private;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (!uptodate) {</div><div class='del'>-		spin_lock_irqsave(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-		bitmap-&gt;flags |= BITMAP_WRITE_ERROR;</div><div class='del'>-		spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-	}</div><div class='add'>+	if (!uptodate)</div><div class='add'>+		set_bit(BITMAP_WRITE_ERROR, &amp;bitmap-&gt;flags);</div><div class='ctx'> 	if (atomic_dec_and_test(&amp;bitmap-&gt;pending_writes))</div><div class='ctx'> 		wake_up(&amp;bitmap-&gt;write_wait);</div><div class='ctx'> }</div><div class='hunk'>@@ -325,8 +312,12 @@ __clear_page_buffers(struct page *page)</div><div class='ctx'> }</div><div class='ctx'> static void free_buffers(struct page *page)</div><div class='ctx'> {</div><div class='del'>-	struct buffer_head *bh = page_buffers(page);</div><div class='add'>+	struct buffer_head *bh;</div><div class='ctx'> </div><div class='add'>+	if (!PagePrivate(page))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	bh = page_buffers(page);</div><div class='ctx'> 	while (bh) {</div><div class='ctx'> 		struct buffer_head *next = bh-&gt;b_this_page;</div><div class='ctx'> 		free_buffer_head(bh);</div><div class='hunk'>@@ -343,11 +334,12 @@ static void free_buffers(struct page *page)</div><div class='ctx'>  * This usage is similar to how swap files are handled, and allows us</div><div class='ctx'>  * to write to a file with no concerns of memory allocation failing.</div><div class='ctx'>  */</div><div class='del'>-static struct page *read_page(struct file *file, unsigned long index,</div><div class='del'>-			      struct bitmap *bitmap,</div><div class='del'>-			      unsigned long count)</div><div class='add'>+static int read_page(struct file *file, unsigned long index,</div><div class='add'>+		     struct bitmap *bitmap,</div><div class='add'>+		     unsigned long count,</div><div class='add'>+		     struct page *page)</div><div class='ctx'> {</div><div class='del'>-	struct page *page = NULL;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> 	struct inode *inode = file-&gt;f_path.dentry-&gt;d_inode;</div><div class='ctx'> 	struct buffer_head *bh;</div><div class='ctx'> 	sector_t block;</div><div class='hunk'>@@ -355,16 +347,9 @@ static struct page *read_page(struct file *file, unsigned long index,</div><div class='ctx'> 	pr_debug("read bitmap file (%dB @ %llu)\n", (int)PAGE_SIZE,</div><div class='ctx'> 		 (unsigned long long)index &lt;&lt; PAGE_SHIFT);</div><div class='ctx'> </div><div class='del'>-	page = alloc_page(GFP_KERNEL);</div><div class='del'>-	if (!page)</div><div class='del'>-		page = ERR_PTR(-ENOMEM);</div><div class='del'>-	if (IS_ERR(page))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	bh = alloc_page_buffers(page, 1&lt;&lt;inode-&gt;i_blkbits, 0);</div><div class='ctx'> 	if (!bh) {</div><div class='del'>-		put_page(page);</div><div class='del'>-		page = ERR_PTR(-ENOMEM);</div><div class='add'>+		ret = -ENOMEM;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	attach_page_buffers(page, bh);</div><div class='hunk'>@@ -376,8 +361,7 @@ static struct page *read_page(struct file *file, unsigned long index,</div><div class='ctx'> 			bh-&gt;b_blocknr = bmap(inode, block);</div><div class='ctx'> 			if (bh-&gt;b_blocknr == 0) {</div><div class='ctx'> 				/* Cannot use this file! */</div><div class='del'>-				free_buffers(page);</div><div class='del'>-				page = ERR_PTR(-EINVAL);</div><div class='add'>+				ret = -EINVAL;</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='ctx'> 			bh-&gt;b_bdev = inode-&gt;i_sb-&gt;s_bdev;</div><div class='hunk'>@@ -400,17 +384,15 @@ static struct page *read_page(struct file *file, unsigned long index,</div><div class='ctx'> </div><div class='ctx'> 	wait_event(bitmap-&gt;write_wait,</div><div class='ctx'> 		   atomic_read(&amp;bitmap-&gt;pending_writes)==0);</div><div class='del'>-	if (bitmap-&gt;flags &amp; BITMAP_WRITE_ERROR) {</div><div class='del'>-		free_buffers(page);</div><div class='del'>-		page = ERR_PTR(-EIO);</div><div class='del'>-	}</div><div class='add'>+	if (test_bit(BITMAP_WRITE_ERROR, &amp;bitmap-&gt;flags))</div><div class='add'>+		ret = -EIO;</div><div class='ctx'> out:</div><div class='del'>-	if (IS_ERR(page))</div><div class='del'>-		printk(KERN_ALERT "md: bitmap read error: (%dB @ %llu): %ld\n",</div><div class='add'>+	if (ret)</div><div class='add'>+		printk(KERN_ALERT "md: bitmap read error: (%dB @ %llu): %d\n",</div><div class='ctx'> 			(int)PAGE_SIZE,</div><div class='ctx'> 			(unsigned long long)index &lt;&lt; PAGE_SHIFT,</div><div class='del'>-			PTR_ERR(page));</div><div class='del'>-	return page;</div><div class='add'>+			ret);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -426,9 +408,9 @@ void bitmap_update_sb(struct bitmap *bitmap)</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (bitmap-&gt;mddev-&gt;bitmap_info.external)</div><div class='ctx'> 		return;</div><div class='del'>-	if (!bitmap-&gt;sb_page) /* no superblock */</div><div class='add'>+	if (!bitmap-&gt;storage.sb_page) /* no superblock */</div><div class='ctx'> 		return;</div><div class='del'>-	sb = kmap_atomic(bitmap-&gt;sb_page);</div><div class='add'>+	sb = kmap_atomic(bitmap-&gt;storage.sb_page);</div><div class='ctx'> 	sb-&gt;events = cpu_to_le64(bitmap-&gt;mddev-&gt;events);</div><div class='ctx'> 	if (bitmap-&gt;mddev-&gt;events &lt; bitmap-&gt;events_cleared)</div><div class='ctx'> 		/* rocking back to read-only */</div><div class='hunk'>@@ -438,8 +420,13 @@ void bitmap_update_sb(struct bitmap *bitmap)</div><div class='ctx'> 	/* Just in case these have been changed via sysfs: */</div><div class='ctx'> 	sb-&gt;daemon_sleep = cpu_to_le32(bitmap-&gt;mddev-&gt;bitmap_info.daemon_sleep/HZ);</div><div class='ctx'> 	sb-&gt;write_behind = cpu_to_le32(bitmap-&gt;mddev-&gt;bitmap_info.max_write_behind);</div><div class='add'>+	/* This might have been changed by a reshape */</div><div class='add'>+	sb-&gt;sync_size = cpu_to_le64(bitmap-&gt;mddev-&gt;resync_max_sectors);</div><div class='add'>+	sb-&gt;chunksize = cpu_to_le32(bitmap-&gt;mddev-&gt;bitmap_info.chunksize);</div><div class='add'>+	sb-&gt;sectors_reserved = cpu_to_le32(bitmap-&gt;mddev-&gt;</div><div class='add'>+					   bitmap_info.space);</div><div class='ctx'> 	kunmap_atomic(sb);</div><div class='del'>-	write_page(bitmap, bitmap-&gt;sb_page, 1);</div><div class='add'>+	write_page(bitmap, bitmap-&gt;storage.sb_page, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* print out the bitmap file superblock */</div><div class='hunk'>@@ -447,9 +434,9 @@ void bitmap_print_sb(struct bitmap *bitmap)</div><div class='ctx'> {</div><div class='ctx'> 	bitmap_super_t *sb;</div><div class='ctx'> </div><div class='del'>-	if (!bitmap || !bitmap-&gt;sb_page)</div><div class='add'>+	if (!bitmap || !bitmap-&gt;storage.sb_page)</div><div class='ctx'> 		return;</div><div class='del'>-	sb = kmap_atomic(bitmap-&gt;sb_page);</div><div class='add'>+	sb = kmap_atomic(bitmap-&gt;storage.sb_page);</div><div class='ctx'> 	printk(KERN_DEBUG "%s: bitmap file superblock:\n", bmname(bitmap));</div><div class='ctx'> 	printk(KERN_DEBUG "         magic: %08x\n", le32_to_cpu(sb-&gt;magic));</div><div class='ctx'> 	printk(KERN_DEBUG "       version: %d\n", le32_to_cpu(sb-&gt;version));</div><div class='hunk'>@@ -488,15 +475,15 @@ static int bitmap_new_disk_sb(struct bitmap *bitmap)</div><div class='ctx'> 	unsigned long chunksize, daemon_sleep, write_behind;</div><div class='ctx'> 	int err = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	bitmap-&gt;sb_page = alloc_page(GFP_KERNEL);</div><div class='del'>-	if (IS_ERR(bitmap-&gt;sb_page)) {</div><div class='del'>-		err = PTR_ERR(bitmap-&gt;sb_page);</div><div class='del'>-		bitmap-&gt;sb_page = NULL;</div><div class='add'>+	bitmap-&gt;storage.sb_page = alloc_page(GFP_KERNEL);</div><div class='add'>+	if (IS_ERR(bitmap-&gt;storage.sb_page)) {</div><div class='add'>+		err = PTR_ERR(bitmap-&gt;storage.sb_page);</div><div class='add'>+		bitmap-&gt;storage.sb_page = NULL;</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='del'>-	bitmap-&gt;sb_page-&gt;index = 0;</div><div class='add'>+	bitmap-&gt;storage.sb_page-&gt;index = 0;</div><div class='ctx'> </div><div class='del'>-	sb = kmap_atomic(bitmap-&gt;sb_page);</div><div class='add'>+	sb = kmap_atomic(bitmap-&gt;storage.sb_page);</div><div class='ctx'> </div><div class='ctx'> 	sb-&gt;magic = cpu_to_le32(BITMAP_MAGIC);</div><div class='ctx'> 	sb-&gt;version = cpu_to_le32(BITMAP_MAJOR_HI);</div><div class='hunk'>@@ -534,8 +521,8 @@ static int bitmap_new_disk_sb(struct bitmap *bitmap)</div><div class='ctx'> </div><div class='ctx'> 	memcpy(sb-&gt;uuid, bitmap-&gt;mddev-&gt;uuid, 16);</div><div class='ctx'> </div><div class='del'>-	bitmap-&gt;flags |= BITMAP_STALE;</div><div class='del'>-	sb-&gt;state |= cpu_to_le32(BITMAP_STALE);</div><div class='add'>+	set_bit(BITMAP_STALE, &amp;bitmap-&gt;flags);</div><div class='add'>+	sb-&gt;state = cpu_to_le32(bitmap-&gt;flags);</div><div class='ctx'> 	bitmap-&gt;events_cleared = bitmap-&gt;mddev-&gt;events;</div><div class='ctx'> 	sb-&gt;events_cleared = cpu_to_le64(bitmap-&gt;mddev-&gt;events);</div><div class='ctx'> </div><div class='hunk'>@@ -551,31 +538,45 @@ static int bitmap_read_sb(struct bitmap *bitmap)</div><div class='ctx'> 	bitmap_super_t *sb;</div><div class='ctx'> 	unsigned long chunksize, daemon_sleep, write_behind;</div><div class='ctx'> 	unsigned long long events;</div><div class='add'>+	unsigned long sectors_reserved = 0;</div><div class='ctx'> 	int err = -EINVAL;</div><div class='add'>+	struct page *sb_page;</div><div class='ctx'> </div><div class='add'>+	if (!bitmap-&gt;storage.file &amp;&amp; !bitmap-&gt;mddev-&gt;bitmap_info.offset) {</div><div class='add'>+		chunksize = 128 * 1024 * 1024;</div><div class='add'>+		daemon_sleep = 5 * HZ;</div><div class='add'>+		write_behind = 0;</div><div class='add'>+		set_bit(BITMAP_STALE, &amp;bitmap-&gt;flags);</div><div class='add'>+		err = 0;</div><div class='add'>+		goto out_no_sb;</div><div class='add'>+	}</div><div class='ctx'> 	/* page 0 is the superblock, read it... */</div><div class='del'>-	if (bitmap-&gt;file) {</div><div class='del'>-		loff_t isize = i_size_read(bitmap-&gt;file-&gt;f_mapping-&gt;host);</div><div class='add'>+	sb_page = alloc_page(GFP_KERNEL);</div><div class='add'>+	if (!sb_page)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	bitmap-&gt;storage.sb_page = sb_page;</div><div class='add'>+</div><div class='add'>+	if (bitmap-&gt;storage.file) {</div><div class='add'>+		loff_t isize = i_size_read(bitmap-&gt;storage.file-&gt;f_mapping-&gt;host);</div><div class='ctx'> 		int bytes = isize &gt; PAGE_SIZE ? PAGE_SIZE : isize;</div><div class='ctx'> </div><div class='del'>-		bitmap-&gt;sb_page = read_page(bitmap-&gt;file, 0, bitmap, bytes);</div><div class='add'>+		err = read_page(bitmap-&gt;storage.file, 0,</div><div class='add'>+				bitmap, bytes, sb_page);</div><div class='ctx'> 	} else {</div><div class='del'>-		bitmap-&gt;sb_page = read_sb_page(bitmap-&gt;mddev,</div><div class='del'>-					       bitmap-&gt;mddev-&gt;bitmap_info.offset,</div><div class='del'>-					       NULL,</div><div class='del'>-					       0, sizeof(bitmap_super_t));</div><div class='add'>+		err = read_sb_page(bitmap-&gt;mddev,</div><div class='add'>+				   bitmap-&gt;mddev-&gt;bitmap_info.offset,</div><div class='add'>+				   sb_page,</div><div class='add'>+				   0, sizeof(bitmap_super_t));</div><div class='ctx'> 	}</div><div class='del'>-	if (IS_ERR(bitmap-&gt;sb_page)) {</div><div class='del'>-		err = PTR_ERR(bitmap-&gt;sb_page);</div><div class='del'>-		bitmap-&gt;sb_page = NULL;</div><div class='add'>+	if (err)</div><div class='ctx'> 		return err;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	sb = kmap_atomic(bitmap-&gt;sb_page);</div><div class='add'>+	sb = kmap_atomic(sb_page);</div><div class='ctx'> </div><div class='ctx'> 	chunksize = le32_to_cpu(sb-&gt;chunksize);</div><div class='ctx'> 	daemon_sleep = le32_to_cpu(sb-&gt;daemon_sleep) * HZ;</div><div class='ctx'> 	write_behind = le32_to_cpu(sb-&gt;write_behind);</div><div class='add'>+	sectors_reserved = le32_to_cpu(sb-&gt;sectors_reserved);</div><div class='ctx'> </div><div class='ctx'> 	/* verify that the bitmap-specific fields are valid */</div><div class='ctx'> 	if (sb-&gt;magic != cpu_to_le32(BITMAP_MAGIC))</div><div class='hunk'>@@ -618,60 +619,32 @@ static int bitmap_read_sb(struct bitmap *bitmap)</div><div class='ctx'> 			       "-- forcing full recovery\n",</div><div class='ctx'> 			       bmname(bitmap), events,</div><div class='ctx'> 			       (unsigned long long) bitmap-&gt;mddev-&gt;events);</div><div class='del'>-			sb-&gt;state |= cpu_to_le32(BITMAP_STALE);</div><div class='add'>+			set_bit(BITMAP_STALE, &amp;bitmap-&gt;flags);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* assign fields using values from superblock */</div><div class='del'>-	bitmap-&gt;mddev-&gt;bitmap_info.chunksize = chunksize;</div><div class='del'>-	bitmap-&gt;mddev-&gt;bitmap_info.daemon_sleep = daemon_sleep;</div><div class='del'>-	bitmap-&gt;mddev-&gt;bitmap_info.max_write_behind = write_behind;</div><div class='ctx'> 	bitmap-&gt;flags |= le32_to_cpu(sb-&gt;state);</div><div class='ctx'> 	if (le32_to_cpu(sb-&gt;version) == BITMAP_MAJOR_HOSTENDIAN)</div><div class='del'>-		bitmap-&gt;flags |= BITMAP_HOSTENDIAN;</div><div class='add'>+		set_bit(BITMAP_HOSTENDIAN, &amp;bitmap-&gt;flags);</div><div class='ctx'> 	bitmap-&gt;events_cleared = le64_to_cpu(sb-&gt;events_cleared);</div><div class='del'>-	if (bitmap-&gt;flags &amp; BITMAP_STALE)</div><div class='del'>-		bitmap-&gt;events_cleared = bitmap-&gt;mddev-&gt;events;</div><div class='ctx'> 	err = 0;</div><div class='ctx'> out:</div><div class='ctx'> 	kunmap_atomic(sb);</div><div class='add'>+out_no_sb:</div><div class='add'>+	if (test_bit(BITMAP_STALE, &amp;bitmap-&gt;flags))</div><div class='add'>+		bitmap-&gt;events_cleared = bitmap-&gt;mddev-&gt;events;</div><div class='add'>+	bitmap-&gt;mddev-&gt;bitmap_info.chunksize = chunksize;</div><div class='add'>+	bitmap-&gt;mddev-&gt;bitmap_info.daemon_sleep = daemon_sleep;</div><div class='add'>+	bitmap-&gt;mddev-&gt;bitmap_info.max_write_behind = write_behind;</div><div class='add'>+	if (bitmap-&gt;mddev-&gt;bitmap_info.space == 0 ||</div><div class='add'>+	    bitmap-&gt;mddev-&gt;bitmap_info.space &gt; sectors_reserved)</div><div class='add'>+		bitmap-&gt;mddev-&gt;bitmap_info.space = sectors_reserved;</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		bitmap_print_sb(bitmap);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum bitmap_mask_op {</div><div class='del'>-	MASK_SET,</div><div class='del'>-	MASK_UNSET</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* record the state of the bitmap in the superblock.  Return the old value */</div><div class='del'>-static int bitmap_mask_state(struct bitmap *bitmap, enum bitmap_state bits,</div><div class='del'>-			     enum bitmap_mask_op op)</div><div class='del'>-{</div><div class='del'>-	bitmap_super_t *sb;</div><div class='del'>-	int old;</div><div class='del'>-</div><div class='del'>-	if (!bitmap-&gt;sb_page) /* can't set the state */</div><div class='del'>-		return 0;</div><div class='del'>-	sb = kmap_atomic(bitmap-&gt;sb_page);</div><div class='del'>-	old = le32_to_cpu(sb-&gt;state) &amp; bits;</div><div class='del'>-	switch (op) {</div><div class='del'>-	case MASK_SET:</div><div class='del'>-		sb-&gt;state |= cpu_to_le32(bits);</div><div class='del'>-		bitmap-&gt;flags |= bits;</div><div class='del'>-		break;</div><div class='del'>-	case MASK_UNSET:</div><div class='del'>-		sb-&gt;state &amp;= cpu_to_le32(~bits);</div><div class='del'>-		bitmap-&gt;flags &amp;= ~bits;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-	kunmap_atomic(sb);</div><div class='del'>-	return old;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * general bitmap file operations</div><div class='ctx'>  */</div><div class='hunk'>@@ -683,17 +656,19 @@ static int bitmap_mask_state(struct bitmap *bitmap, enum bitmap_state bits,</div><div class='ctx'>  * file a page at a time. There's a superblock at the start of the file.</div><div class='ctx'>  */</div><div class='ctx'> /* calculate the index of the page that contains this bit */</div><div class='del'>-static inline unsigned long file_page_index(struct bitmap *bitmap, unsigned long chunk)</div><div class='add'>+static inline unsigned long file_page_index(struct bitmap_storage *store,</div><div class='add'>+					    unsigned long chunk)</div><div class='ctx'> {</div><div class='del'>-	if (!bitmap-&gt;mddev-&gt;bitmap_info.external)</div><div class='add'>+	if (store-&gt;sb_page)</div><div class='ctx'> 		chunk += sizeof(bitmap_super_t) &lt;&lt; 3;</div><div class='ctx'> 	return chunk &gt;&gt; PAGE_BIT_SHIFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* calculate the (bit) offset of this bit within a page */</div><div class='del'>-static inline unsigned long file_page_offset(struct bitmap *bitmap, unsigned long chunk)</div><div class='add'>+static inline unsigned long file_page_offset(struct bitmap_storage *store,</div><div class='add'>+					     unsigned long chunk)</div><div class='ctx'> {</div><div class='del'>-	if (!bitmap-&gt;mddev-&gt;bitmap_info.external)</div><div class='add'>+	if (store-&gt;sb_page)</div><div class='ctx'> 		chunk += sizeof(bitmap_super_t) &lt;&lt; 3;</div><div class='ctx'> 	return chunk &amp; (PAGE_BITS - 1);</div><div class='ctx'> }</div><div class='hunk'>@@ -705,57 +680,86 @@ static inline unsigned long file_page_offset(struct bitmap *bitmap, unsigned lon</div><div class='ctx'>  * 1 page (e.g., x86) or less than 1 page -- so the bitmap might start on page</div><div class='ctx'>  * 0 or page 1</div><div class='ctx'>  */</div><div class='del'>-static inline struct page *filemap_get_page(struct bitmap *bitmap,</div><div class='add'>+static inline struct page *filemap_get_page(struct bitmap_storage *store,</div><div class='ctx'> 					    unsigned long chunk)</div><div class='ctx'> {</div><div class='del'>-	if (file_page_index(bitmap, chunk) &gt;= bitmap-&gt;file_pages)</div><div class='add'>+	if (file_page_index(store, chunk) &gt;= store-&gt;file_pages)</div><div class='ctx'> 		return NULL;</div><div class='del'>-	return bitmap-&gt;filemap[file_page_index(bitmap, chunk)</div><div class='del'>-			       - file_page_index(bitmap, 0)];</div><div class='add'>+	return store-&gt;filemap[file_page_index(store, chunk)</div><div class='add'>+			      - file_page_index(store, 0)];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bitmap_file_unmap(struct bitmap *bitmap)</div><div class='add'>+static int bitmap_storage_alloc(struct bitmap_storage *store,</div><div class='add'>+				unsigned long chunks, int with_super)</div><div class='add'>+{</div><div class='add'>+	int pnum;</div><div class='add'>+	unsigned long num_pages;</div><div class='add'>+	unsigned long bytes;</div><div class='add'>+</div><div class='add'>+	bytes = DIV_ROUND_UP(chunks, 8);</div><div class='add'>+	if (with_super)</div><div class='add'>+		bytes += sizeof(bitmap_super_t);</div><div class='add'>+</div><div class='add'>+	num_pages = DIV_ROUND_UP(bytes, PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	store-&gt;filemap = kmalloc(sizeof(struct page *)</div><div class='add'>+				 * num_pages, GFP_KERNEL);</div><div class='add'>+	if (!store-&gt;filemap)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (with_super &amp;&amp; !store-&gt;sb_page) {</div><div class='add'>+		store-&gt;sb_page = alloc_page(GFP_KERNEL|__GFP_ZERO);</div><div class='add'>+		if (store-&gt;sb_page == NULL)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		store-&gt;sb_page-&gt;index = 0;</div><div class='add'>+	}</div><div class='add'>+	pnum = 0;</div><div class='add'>+	if (store-&gt;sb_page) {</div><div class='add'>+		store-&gt;filemap[0] = store-&gt;sb_page;</div><div class='add'>+		pnum = 1;</div><div class='add'>+	}</div><div class='add'>+	for ( ; pnum &lt; num_pages; pnum++) {</div><div class='add'>+		store-&gt;filemap[pnum] = alloc_page(GFP_KERNEL|__GFP_ZERO);</div><div class='add'>+		if (!store-&gt;filemap[pnum]) {</div><div class='add'>+			store-&gt;file_pages = pnum;</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+		store-&gt;filemap[pnum]-&gt;index = pnum;</div><div class='add'>+	}</div><div class='add'>+	store-&gt;file_pages = pnum;</div><div class='add'>+</div><div class='add'>+	/* We need 4 bits per page, rounded up to a multiple</div><div class='add'>+	 * of sizeof(unsigned long) */</div><div class='add'>+	store-&gt;filemap_attr = kzalloc(</div><div class='add'>+		roundup(DIV_ROUND_UP(num_pages*4, 8), sizeof(unsigned long)),</div><div class='add'>+		GFP_KERNEL);</div><div class='add'>+	if (!store-&gt;filemap_attr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	store-&gt;bytes = bytes;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bitmap_file_unmap(struct bitmap_storage *store)</div><div class='ctx'> {</div><div class='ctx'> 	struct page **map, *sb_page;</div><div class='del'>-	unsigned long *attr;</div><div class='ctx'> 	int pages;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct file *file;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-	map = bitmap-&gt;filemap;</div><div class='del'>-	bitmap-&gt;filemap = NULL;</div><div class='del'>-	attr = bitmap-&gt;filemap_attr;</div><div class='del'>-	bitmap-&gt;filemap_attr = NULL;</div><div class='del'>-	pages = bitmap-&gt;file_pages;</div><div class='del'>-	bitmap-&gt;file_pages = 0;</div><div class='del'>-	sb_page = bitmap-&gt;sb_page;</div><div class='del'>-	bitmap-&gt;sb_page = NULL;</div><div class='del'>-	spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='add'>+	file = store-&gt;file;</div><div class='add'>+	map = store-&gt;filemap;</div><div class='add'>+	pages = store-&gt;file_pages;</div><div class='add'>+	sb_page = store-&gt;sb_page;</div><div class='ctx'> </div><div class='ctx'> 	while (pages--)</div><div class='ctx'> 		if (map[pages] != sb_page) /* 0 is sb_page, release it below */</div><div class='ctx'> 			free_buffers(map[pages]);</div><div class='ctx'> 	kfree(map);</div><div class='del'>-	kfree(attr);</div><div class='add'>+	kfree(store-&gt;filemap_attr);</div><div class='ctx'> </div><div class='ctx'> 	if (sb_page)</div><div class='ctx'> 		free_buffers(sb_page);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bitmap_file_put(struct bitmap *bitmap)</div><div class='del'>-{</div><div class='del'>-	struct file *file;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-	file = bitmap-&gt;file;</div><div class='del'>-	bitmap-&gt;file = NULL;</div><div class='del'>-	spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	if (file)</div><div class='del'>-		wait_event(bitmap-&gt;write_wait,</div><div class='del'>-			   atomic_read(&amp;bitmap-&gt;pending_writes)==0);</div><div class='del'>-	bitmap_file_unmap(bitmap);</div><div class='ctx'> </div><div class='ctx'> 	if (file) {</div><div class='ctx'> 		struct inode *inode = file-&gt;f_path.dentry-&gt;d_inode;</div><div class='hunk'>@@ -773,14 +777,14 @@ static void bitmap_file_kick(struct bitmap *bitmap)</div><div class='ctx'> {</div><div class='ctx'> 	char *path, *ptr = NULL;</div><div class='ctx'> </div><div class='del'>-	if (bitmap_mask_state(bitmap, BITMAP_STALE, MASK_SET) == 0) {</div><div class='add'>+	if (!test_and_set_bit(BITMAP_STALE, &amp;bitmap-&gt;flags)) {</div><div class='ctx'> 		bitmap_update_sb(bitmap);</div><div class='ctx'> </div><div class='del'>-		if (bitmap-&gt;file) {</div><div class='add'>+		if (bitmap-&gt;storage.file) {</div><div class='ctx'> 			path = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='ctx'> 			if (path)</div><div class='del'>-				ptr = d_path(&amp;bitmap-&gt;file-&gt;f_path, path,</div><div class='del'>-					     PAGE_SIZE);</div><div class='add'>+				ptr = d_path(&amp;bitmap-&gt;storage.file-&gt;f_path,</div><div class='add'>+					     path, PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 			printk(KERN_ALERT</div><div class='ctx'> 			      "%s: kicking failed bitmap file %s from array!\n",</div><div class='hunk'>@@ -792,10 +796,6 @@ static void bitmap_file_kick(struct bitmap *bitmap)</div><div class='ctx'> 			       "%s: disabling internal bitmap due to errors\n",</div><div class='ctx'> 			       bmname(bitmap));</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	bitmap_file_put(bitmap);</div><div class='del'>-</div><div class='del'>-	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> enum bitmap_page_attr {</div><div class='hunk'>@@ -805,24 +805,30 @@ enum bitmap_page_attr {</div><div class='ctx'> 	BITMAP_PAGE_NEEDWRITE = 2, /* there are cleared bits that need to be synced */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline void set_page_attr(struct bitmap *bitmap, struct page *page,</div><div class='del'>-				enum bitmap_page_attr attr)</div><div class='add'>+static inline void set_page_attr(struct bitmap *bitmap, int pnum,</div><div class='add'>+				 enum bitmap_page_attr attr)</div><div class='ctx'> {</div><div class='del'>-	__set_bit((page-&gt;index&lt;&lt;2) + attr, bitmap-&gt;filemap_attr);</div><div class='add'>+	set_bit((pnum&lt;&lt;2) + attr, bitmap-&gt;storage.filemap_attr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void clear_page_attr(struct bitmap *bitmap, struct page *page,</div><div class='del'>-				enum bitmap_page_attr attr)</div><div class='add'>+static inline void clear_page_attr(struct bitmap *bitmap, int pnum,</div><div class='add'>+				   enum bitmap_page_attr attr)</div><div class='ctx'> {</div><div class='del'>-	__clear_bit((page-&gt;index&lt;&lt;2) + attr, bitmap-&gt;filemap_attr);</div><div class='add'>+	clear_bit((pnum&lt;&lt;2) + attr, bitmap-&gt;storage.filemap_attr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long test_page_attr(struct bitmap *bitmap, struct page *page,</div><div class='del'>-					   enum bitmap_page_attr attr)</div><div class='add'>+static inline int test_page_attr(struct bitmap *bitmap, int pnum,</div><div class='add'>+				 enum bitmap_page_attr attr)</div><div class='ctx'> {</div><div class='del'>-	return test_bit((page-&gt;index&lt;&lt;2) + attr, bitmap-&gt;filemap_attr);</div><div class='add'>+	return test_bit((pnum&lt;&lt;2) + attr, bitmap-&gt;storage.filemap_attr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int test_and_clear_page_attr(struct bitmap *bitmap, int pnum,</div><div class='add'>+					   enum bitmap_page_attr attr)</div><div class='add'>+{</div><div class='add'>+	return test_and_clear_bit((pnum&lt;&lt;2) + attr,</div><div class='add'>+				  bitmap-&gt;storage.filemap_attr);</div><div class='add'>+}</div><div class='ctx'> /*</div><div class='ctx'>  * bitmap_file_set_bit -- called before performing a write to the md device</div><div class='ctx'>  * to set (and eventually sync) a particular bit in the bitmap file</div><div class='hunk'>@@ -835,26 +841,46 @@ static void bitmap_file_set_bit(struct bitmap *bitmap, sector_t block)</div><div class='ctx'> 	unsigned long bit;</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> 	void *kaddr;</div><div class='del'>-	unsigned long chunk = block &gt;&gt; bitmap-&gt;chunkshift;</div><div class='add'>+	unsigned long chunk = block &gt;&gt; bitmap-&gt;counts.chunkshift;</div><div class='ctx'> </div><div class='del'>-	if (!bitmap-&gt;filemap)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	page = filemap_get_page(bitmap, chunk);</div><div class='add'>+	page = filemap_get_page(&amp;bitmap-&gt;storage, chunk);</div><div class='ctx'> 	if (!page)</div><div class='ctx'> 		return;</div><div class='del'>-	bit = file_page_offset(bitmap, chunk);</div><div class='add'>+	bit = file_page_offset(&amp;bitmap-&gt;storage, chunk);</div><div class='ctx'> </div><div class='ctx'> 	/* set the bit */</div><div class='ctx'> 	kaddr = kmap_atomic(page);</div><div class='del'>-	if (bitmap-&gt;flags &amp; BITMAP_HOSTENDIAN)</div><div class='add'>+	if (test_bit(BITMAP_HOSTENDIAN, &amp;bitmap-&gt;flags))</div><div class='ctx'> 		set_bit(bit, kaddr);</div><div class='ctx'> 	else</div><div class='del'>-		__set_bit_le(bit, kaddr);</div><div class='add'>+		test_and_set_bit_le(bit, kaddr);</div><div class='ctx'> 	kunmap_atomic(kaddr);</div><div class='ctx'> 	pr_debug("set file bit %lu page %lu\n", bit, page-&gt;index);</div><div class='ctx'> 	/* record page number so it gets flushed to disk when unplug occurs */</div><div class='del'>-	set_page_attr(bitmap, page, BITMAP_PAGE_DIRTY);</div><div class='add'>+	set_page_attr(bitmap, page-&gt;index, BITMAP_PAGE_DIRTY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bitmap_file_clear_bit(struct bitmap *bitmap, sector_t block)</div><div class='add'>+{</div><div class='add'>+	unsigned long bit;</div><div class='add'>+	struct page *page;</div><div class='add'>+	void *paddr;</div><div class='add'>+	unsigned long chunk = block &gt;&gt; bitmap-&gt;counts.chunkshift;</div><div class='add'>+</div><div class='add'>+	page = filemap_get_page(&amp;bitmap-&gt;storage, chunk);</div><div class='add'>+	if (!page)</div><div class='add'>+		return;</div><div class='add'>+	bit = file_page_offset(&amp;bitmap-&gt;storage, chunk);</div><div class='add'>+	paddr = kmap_atomic(page);</div><div class='add'>+	if (test_bit(BITMAP_HOSTENDIAN, &amp;bitmap-&gt;flags))</div><div class='add'>+		clear_bit(bit, paddr);</div><div class='add'>+	else</div><div class='add'>+		test_and_clear_bit_le(bit, paddr);</div><div class='add'>+	kunmap_atomic(paddr);</div><div class='add'>+	if (!test_page_attr(bitmap, page-&gt;index, BITMAP_PAGE_NEEDWRITE)) {</div><div class='add'>+		set_page_attr(bitmap, page-&gt;index, BITMAP_PAGE_PENDING);</div><div class='add'>+		bitmap-&gt;allclean = 0;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* this gets called when the md device is ready to unplug its underlying</div><div class='hunk'>@@ -862,42 +888,37 @@ static void bitmap_file_set_bit(struct bitmap *bitmap, sector_t block)</div><div class='ctx'>  * sync the dirty pages of the bitmap file to disk */</div><div class='ctx'> void bitmap_unplug(struct bitmap *bitmap)</div><div class='ctx'> {</div><div class='del'>-	unsigned long i, flags;</div><div class='add'>+	unsigned long i;</div><div class='ctx'> 	int dirty, need_write;</div><div class='del'>-	struct page *page;</div><div class='ctx'> 	int wait = 0;</div><div class='ctx'> </div><div class='del'>-	if (!bitmap)</div><div class='add'>+	if (!bitmap || !bitmap-&gt;storage.filemap ||</div><div class='add'>+	    test_bit(BITMAP_STALE, &amp;bitmap-&gt;flags))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* look at each page to see if there are any set bits that need to be</div><div class='ctx'> 	 * flushed out to disk */</div><div class='del'>-	for (i = 0; i &lt; bitmap-&gt;file_pages; i++) {</div><div class='del'>-		spin_lock_irqsave(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-		if (!bitmap-&gt;filemap) {</div><div class='del'>-			spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='add'>+	for (i = 0; i &lt; bitmap-&gt;storage.file_pages; i++) {</div><div class='add'>+		if (!bitmap-&gt;storage.filemap)</div><div class='ctx'> 			return;</div><div class='add'>+		dirty = test_and_clear_page_attr(bitmap, i, BITMAP_PAGE_DIRTY);</div><div class='add'>+		need_write = test_and_clear_page_attr(bitmap, i,</div><div class='add'>+						      BITMAP_PAGE_NEEDWRITE);</div><div class='add'>+		if (dirty || need_write) {</div><div class='add'>+			clear_page_attr(bitmap, i, BITMAP_PAGE_PENDING);</div><div class='add'>+			write_page(bitmap, bitmap-&gt;storage.filemap[i], 0);</div><div class='ctx'> 		}</div><div class='del'>-		page = bitmap-&gt;filemap[i];</div><div class='del'>-		dirty = test_page_attr(bitmap, page, BITMAP_PAGE_DIRTY);</div><div class='del'>-		need_write = test_page_attr(bitmap, page, BITMAP_PAGE_NEEDWRITE);</div><div class='del'>-		clear_page_attr(bitmap, page, BITMAP_PAGE_DIRTY);</div><div class='del'>-		clear_page_attr(bitmap, page, BITMAP_PAGE_NEEDWRITE);</div><div class='ctx'> 		if (dirty)</div><div class='ctx'> 			wait = 1;</div><div class='del'>-		spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-		if (dirty || need_write)</div><div class='del'>-			write_page(bitmap, page, 0);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (wait) { /* if any writes were performed, we need to wait on them */</div><div class='del'>-		if (bitmap-&gt;file)</div><div class='add'>+		if (bitmap-&gt;storage.file)</div><div class='ctx'> 			wait_event(bitmap-&gt;write_wait,</div><div class='ctx'> 				   atomic_read(&amp;bitmap-&gt;pending_writes)==0);</div><div class='ctx'> 		else</div><div class='ctx'> 			md_super_wait(bitmap-&gt;mddev);</div><div class='ctx'> 	}</div><div class='del'>-	if (bitmap-&gt;flags &amp; BITMAP_WRITE_ERROR)</div><div class='add'>+	if (test_bit(BITMAP_WRITE_ERROR, &amp;bitmap-&gt;flags))</div><div class='ctx'> 		bitmap_file_kick(bitmap);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bitmap_unplug);</div><div class='hunk'>@@ -917,98 +938,77 @@ static void bitmap_set_memory_bits(struct bitmap *bitmap, sector_t offset, int n</div><div class='ctx'> static int bitmap_init_from_disk(struct bitmap *bitmap, sector_t start)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long i, chunks, index, oldindex, bit;</div><div class='del'>-	struct page *page = NULL, *oldpage = NULL;</div><div class='del'>-	unsigned long num_pages, bit_cnt = 0;</div><div class='add'>+	struct page *page = NULL;</div><div class='add'>+	unsigned long bit_cnt = 0;</div><div class='ctx'> 	struct file *file;</div><div class='del'>-	unsigned long bytes, offset;</div><div class='add'>+	unsigned long offset;</div><div class='ctx'> 	int outofdate;</div><div class='ctx'> 	int ret = -ENOSPC;</div><div class='ctx'> 	void *paddr;</div><div class='add'>+	struct bitmap_storage *store = &amp;bitmap-&gt;storage;</div><div class='ctx'> </div><div class='del'>-	chunks = bitmap-&gt;chunks;</div><div class='del'>-	file = bitmap-&gt;file;</div><div class='add'>+	chunks = bitmap-&gt;counts.chunks;</div><div class='add'>+	file = store-&gt;file;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!file &amp;&amp; !bitmap-&gt;mddev-&gt;bitmap_info.offset);</div><div class='add'>+	if (!file &amp;&amp; !bitmap-&gt;mddev-&gt;bitmap_info.offset) {</div><div class='add'>+		/* No permanent bitmap - fill with '1s'. */</div><div class='add'>+		store-&gt;filemap = NULL;</div><div class='add'>+		store-&gt;file_pages = 0;</div><div class='add'>+		for (i = 0; i &lt; chunks ; i++) {</div><div class='add'>+			/* if the disk bit is set, set the memory bit */</div><div class='add'>+			int needed = ((sector_t)(i+1) &lt;&lt; (bitmap-&gt;counts.chunkshift)</div><div class='add'>+				      &gt;= start);</div><div class='add'>+			bitmap_set_memory_bits(bitmap,</div><div class='add'>+					       (sector_t)i &lt;&lt; bitmap-&gt;counts.chunkshift,</div><div class='add'>+					       needed);</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	outofdate = bitmap-&gt;flags &amp; BITMAP_STALE;</div><div class='add'>+	outofdate = test_bit(BITMAP_STALE, &amp;bitmap-&gt;flags);</div><div class='ctx'> 	if (outofdate)</div><div class='ctx'> 		printk(KERN_INFO "%s: bitmap file is out of date, doing full "</div><div class='ctx'> 			"recovery\n", bmname(bitmap));</div><div class='ctx'> </div><div class='del'>-	bytes = DIV_ROUND_UP(bitmap-&gt;chunks, 8);</div><div class='del'>-	if (!bitmap-&gt;mddev-&gt;bitmap_info.external)</div><div class='del'>-		bytes += sizeof(bitmap_super_t);</div><div class='del'>-</div><div class='del'>-	num_pages = DIV_ROUND_UP(bytes, PAGE_SIZE);</div><div class='del'>-</div><div class='del'>-	if (file &amp;&amp; i_size_read(file-&gt;f_mapping-&gt;host) &lt; bytes) {</div><div class='add'>+	if (file &amp;&amp; i_size_read(file-&gt;f_mapping-&gt;host) &lt; store-&gt;bytes) {</div><div class='ctx'> 		printk(KERN_INFO "%s: bitmap file too short %lu &lt; %lu\n",</div><div class='del'>-			bmname(bitmap),</div><div class='del'>-			(unsigned long) i_size_read(file-&gt;f_mapping-&gt;host),</div><div class='del'>-			bytes);</div><div class='add'>+		       bmname(bitmap),</div><div class='add'>+		       (unsigned long) i_size_read(file-&gt;f_mapping-&gt;host),</div><div class='add'>+		       store-&gt;bytes);</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = -ENOMEM;</div><div class='del'>-</div><div class='del'>-	bitmap-&gt;filemap = kmalloc(sizeof(struct page *) * num_pages, GFP_KERNEL);</div><div class='del'>-	if (!bitmap-&gt;filemap)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	/* We need 4 bits per page, rounded up to a multiple of sizeof(unsigned long) */</div><div class='del'>-	bitmap-&gt;filemap_attr = kzalloc(</div><div class='del'>-		roundup(DIV_ROUND_UP(num_pages*4, 8), sizeof(unsigned long)),</div><div class='del'>-		GFP_KERNEL);</div><div class='del'>-	if (!bitmap-&gt;filemap_attr)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='ctx'> 	oldindex = ~0L;</div><div class='add'>+	offset = 0;</div><div class='add'>+	if (!bitmap-&gt;mddev-&gt;bitmap_info.external)</div><div class='add'>+		offset = sizeof(bitmap_super_t);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; chunks; i++) {</div><div class='ctx'> 		int b;</div><div class='del'>-		index = file_page_index(bitmap, i);</div><div class='del'>-		bit = file_page_offset(bitmap, i);</div><div class='add'>+		index = file_page_index(&amp;bitmap-&gt;storage, i);</div><div class='add'>+		bit = file_page_offset(&amp;bitmap-&gt;storage, i);</div><div class='ctx'> 		if (index != oldindex) { /* this is a new page, read it in */</div><div class='ctx'> 			int count;</div><div class='ctx'> 			/* unmap the old page, we're done with it */</div><div class='del'>-			if (index == num_pages-1)</div><div class='del'>-				count = bytes - index * PAGE_SIZE;</div><div class='add'>+			if (index == store-&gt;file_pages-1)</div><div class='add'>+				count = store-&gt;bytes - index * PAGE_SIZE;</div><div class='ctx'> 			else</div><div class='ctx'> 				count = PAGE_SIZE;</div><div class='del'>-			if (index == 0 &amp;&amp; bitmap-&gt;sb_page) {</div><div class='del'>-				/*</div><div class='del'>-				 * if we're here then the superblock page</div><div class='del'>-				 * contains some bits (PAGE_SIZE != sizeof sb)</div><div class='del'>-				 * we've already read it in, so just use it</div><div class='del'>-				 */</div><div class='del'>-				page = bitmap-&gt;sb_page;</div><div class='del'>-				offset = sizeof(bitmap_super_t);</div><div class='del'>-				if (!file)</div><div class='del'>-					page = read_sb_page(</div><div class='del'>-						bitmap-&gt;mddev,</div><div class='del'>-						bitmap-&gt;mddev-&gt;bitmap_info.offset,</div><div class='del'>-						page,</div><div class='del'>-						index, count);</div><div class='del'>-			} else if (file) {</div><div class='del'>-				page = read_page(file, index, bitmap, count);</div><div class='del'>-				offset = 0;</div><div class='del'>-			} else {</div><div class='del'>-				page = read_sb_page(bitmap-&gt;mddev,</div><div class='del'>-						    bitmap-&gt;mddev-&gt;bitmap_info.offset,</div><div class='del'>-						    NULL,</div><div class='del'>-						    index, count);</div><div class='del'>-				offset = 0;</div><div class='del'>-			}</div><div class='del'>-			if (IS_ERR(page)) { /* read error */</div><div class='del'>-				ret = PTR_ERR(page);</div><div class='add'>+			page = store-&gt;filemap[index];</div><div class='add'>+			if (file)</div><div class='add'>+				ret = read_page(file, index, bitmap,</div><div class='add'>+						count, page);</div><div class='add'>+			else</div><div class='add'>+				ret = read_sb_page(</div><div class='add'>+					bitmap-&gt;mddev,</div><div class='add'>+					bitmap-&gt;mddev-&gt;bitmap_info.offset,</div><div class='add'>+					page,</div><div class='add'>+					index, count);</div><div class='add'>+</div><div class='add'>+			if (ret)</div><div class='ctx'> 				goto err;</div><div class='del'>-			}</div><div class='ctx'> </div><div class='ctx'> 			oldindex = index;</div><div class='del'>-			oldpage = page;</div><div class='del'>-</div><div class='del'>-			bitmap-&gt;filemap[bitmap-&gt;file_pages++] = page;</div><div class='del'>-			bitmap-&gt;last_page_size = count;</div><div class='ctx'> </div><div class='ctx'> 			if (outofdate) {</div><div class='ctx'> 				/*</div><div class='hunk'>@@ -1022,39 +1022,33 @@ static int bitmap_init_from_disk(struct bitmap *bitmap, sector_t start)</div><div class='ctx'> 				write_page(bitmap, page, 1);</div><div class='ctx'> </div><div class='ctx'> 				ret = -EIO;</div><div class='del'>-				if (bitmap-&gt;flags &amp; BITMAP_WRITE_ERROR)</div><div class='add'>+				if (test_bit(BITMAP_WRITE_ERROR,</div><div class='add'>+					     &amp;bitmap-&gt;flags))</div><div class='ctx'> 					goto err;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		paddr = kmap_atomic(page);</div><div class='del'>-		if (bitmap-&gt;flags &amp; BITMAP_HOSTENDIAN)</div><div class='add'>+		if (test_bit(BITMAP_HOSTENDIAN, &amp;bitmap-&gt;flags))</div><div class='ctx'> 			b = test_bit(bit, paddr);</div><div class='ctx'> 		else</div><div class='ctx'> 			b = test_bit_le(bit, paddr);</div><div class='ctx'> 		kunmap_atomic(paddr);</div><div class='ctx'> 		if (b) {</div><div class='ctx'> 			/* if the disk bit is set, set the memory bit */</div><div class='del'>-			int needed = ((sector_t)(i+1) &lt;&lt; bitmap-&gt;chunkshift</div><div class='add'>+			int needed = ((sector_t)(i+1) &lt;&lt; bitmap-&gt;counts.chunkshift</div><div class='ctx'> 				      &gt;= start);</div><div class='ctx'> 			bitmap_set_memory_bits(bitmap,</div><div class='del'>-					       (sector_t)i &lt;&lt; bitmap-&gt;chunkshift,</div><div class='add'>+					       (sector_t)i &lt;&lt; bitmap-&gt;counts.chunkshift,</div><div class='ctx'> 					       needed);</div><div class='ctx'> 			bit_cnt++;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* everything went OK */</div><div class='del'>-	ret = 0;</div><div class='del'>-	bitmap_mask_state(bitmap, BITMAP_STALE, MASK_UNSET);</div><div class='del'>-</div><div class='del'>-	if (bit_cnt) { /* Kick recovery if any bits were set */</div><div class='del'>-		set_bit(MD_RECOVERY_NEEDED, &amp;bitmap-&gt;mddev-&gt;recovery);</div><div class='del'>-		md_wakeup_thread(bitmap-&gt;mddev-&gt;thread);</div><div class='add'>+		offset = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO "%s: bitmap initialized from disk: "</div><div class='del'>-	       "read %lu/%lu pages, set %lu of %lu bits\n",</div><div class='del'>-	       bmname(bitmap), bitmap-&gt;file_pages, num_pages, bit_cnt, chunks);</div><div class='add'>+	       "read %lu pages, set %lu of %lu bits\n",</div><div class='add'>+	       bmname(bitmap), store-&gt;file_pages,</div><div class='add'>+	       bit_cnt, chunks);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1071,22 +1065,38 @@ void bitmap_write_all(struct bitmap *bitmap)</div><div class='ctx'> 	 */</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(&amp;bitmap-&gt;lock);</div><div class='del'>-	for (i = 0; i &lt; bitmap-&gt;file_pages; i++)</div><div class='del'>-		set_page_attr(bitmap, bitmap-&gt;filemap[i],</div><div class='add'>+	if (!bitmap || !bitmap-&gt;storage.filemap)</div><div class='add'>+		return;</div><div class='add'>+	if (bitmap-&gt;storage.file)</div><div class='add'>+		/* Only one copy, so nothing needed */</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bitmap-&gt;storage.file_pages; i++)</div><div class='add'>+		set_page_attr(bitmap, i,</div><div class='ctx'> 			      BITMAP_PAGE_NEEDWRITE);</div><div class='ctx'> 	bitmap-&gt;allclean = 0;</div><div class='del'>-	spin_unlock_irq(&amp;bitmap-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bitmap_count_page(struct bitmap *bitmap, sector_t offset, int inc)</div><div class='add'>+static void bitmap_count_page(struct bitmap_counts *bitmap,</div><div class='add'>+			      sector_t offset, int inc)</div><div class='ctx'> {</div><div class='ctx'> 	sector_t chunk = offset &gt;&gt; bitmap-&gt;chunkshift;</div><div class='ctx'> 	unsigned long page = chunk &gt;&gt; PAGE_COUNTER_SHIFT;</div><div class='ctx'> 	bitmap-&gt;bp[page].count += inc;</div><div class='ctx'> 	bitmap_checkfree(bitmap, page);</div><div class='ctx'> }</div><div class='del'>-static bitmap_counter_t *bitmap_get_counter(struct bitmap *bitmap,</div><div class='add'>+</div><div class='add'>+static void bitmap_set_pending(struct bitmap_counts *bitmap, sector_t offset)</div><div class='add'>+{</div><div class='add'>+	sector_t chunk = offset &gt;&gt; bitmap-&gt;chunkshift;</div><div class='add'>+	unsigned long page = chunk &gt;&gt; PAGE_COUNTER_SHIFT;</div><div class='add'>+	struct bitmap_page *bp = &amp;bitmap-&gt;bp[page];</div><div class='add'>+</div><div class='add'>+	if (!bp-&gt;pending)</div><div class='add'>+		bp-&gt;pending = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bitmap_counter_t *bitmap_get_counter(struct bitmap_counts *bitmap,</div><div class='ctx'> 					    sector_t offset, sector_t *blocks,</div><div class='ctx'> 					    int create);</div><div class='ctx'> </div><div class='hunk'>@@ -1099,10 +1109,9 @@ void bitmap_daemon_work(struct mddev *mddev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bitmap *bitmap;</div><div class='ctx'> 	unsigned long j;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct page *page = NULL, *lastpage = NULL;</div><div class='add'>+	unsigned long nextpage;</div><div class='ctx'> 	sector_t blocks;</div><div class='del'>-	void *paddr;</div><div class='add'>+	struct bitmap_counts *counts;</div><div class='ctx'> </div><div class='ctx'> 	/* Use a mutex to guard daemon_work against</div><div class='ctx'> 	 * bitmap_destroy.</div><div class='hunk'>@@ -1124,112 +1133,90 @@ void bitmap_daemon_work(struct mddev *mddev)</div><div class='ctx'> 	}</div><div class='ctx'> 	bitmap-&gt;allclean = 1;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-	for (j = 0; j &lt; bitmap-&gt;chunks; j++) {</div><div class='add'>+	/* Any file-page which is PENDING now needs to be written.</div><div class='add'>+	 * So set NEEDWRITE now, then after we make any last-minute changes</div><div class='add'>+	 * we will write it.</div><div class='add'>+	 */</div><div class='add'>+	for (j = 0; j &lt; bitmap-&gt;storage.file_pages; j++)</div><div class='add'>+		if (test_and_clear_page_attr(bitmap, j,</div><div class='add'>+					     BITMAP_PAGE_PENDING))</div><div class='add'>+			set_page_attr(bitmap, j,</div><div class='add'>+				      BITMAP_PAGE_NEEDWRITE);</div><div class='add'>+</div><div class='add'>+	if (bitmap-&gt;need_sync &amp;&amp;</div><div class='add'>+	    mddev-&gt;bitmap_info.external == 0) {</div><div class='add'>+		/* Arrange for superblock update as well as</div><div class='add'>+		 * other changes */</div><div class='add'>+		bitmap_super_t *sb;</div><div class='add'>+		bitmap-&gt;need_sync = 0;</div><div class='add'>+		if (bitmap-&gt;storage.filemap) {</div><div class='add'>+			sb = kmap_atomic(bitmap-&gt;storage.sb_page);</div><div class='add'>+			sb-&gt;events_cleared =</div><div class='add'>+				cpu_to_le64(bitmap-&gt;events_cleared);</div><div class='add'>+			kunmap_atomic(sb);</div><div class='add'>+			set_page_attr(bitmap, 0,</div><div class='add'>+				      BITMAP_PAGE_NEEDWRITE);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/* Now look at the bitmap counters and if any are '2' or '1',</div><div class='add'>+	 * decrement and handle accordingly.</div><div class='add'>+	 */</div><div class='add'>+	counts = &amp;bitmap-&gt;counts;</div><div class='add'>+	spin_lock_irq(&amp;counts-&gt;lock);</div><div class='add'>+	nextpage = 0;</div><div class='add'>+	for (j = 0; j &lt; counts-&gt;chunks; j++) {</div><div class='ctx'> 		bitmap_counter_t *bmc;</div><div class='del'>-		if (!bitmap-&gt;filemap)</div><div class='del'>-			/* error or shutdown */</div><div class='del'>-			break;</div><div class='add'>+		sector_t  block = (sector_t)j &lt;&lt; counts-&gt;chunkshift;</div><div class='ctx'> </div><div class='del'>-		page = filemap_get_page(bitmap, j);</div><div class='del'>-</div><div class='del'>-		if (page != lastpage) {</div><div class='del'>-			/* skip this page unless it's marked as needing cleaning */</div><div class='del'>-			if (!test_page_attr(bitmap, page, BITMAP_PAGE_PENDING)) {</div><div class='del'>-				int need_write = test_page_attr(bitmap, page,</div><div class='del'>-								BITMAP_PAGE_NEEDWRITE);</div><div class='del'>-				if (need_write)</div><div class='del'>-					clear_page_attr(bitmap, page, BITMAP_PAGE_NEEDWRITE);</div><div class='del'>-</div><div class='del'>-				spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-				if (need_write)</div><div class='del'>-					write_page(bitmap, page, 0);</div><div class='del'>-				spin_lock_irqsave(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-				j |= (PAGE_BITS - 1);</div><div class='add'>+		if (j == nextpage) {</div><div class='add'>+			nextpage += PAGE_COUNTER_RATIO;</div><div class='add'>+			if (!counts-&gt;bp[j &gt;&gt; PAGE_COUNTER_SHIFT].pending) {</div><div class='add'>+				j |= PAGE_COUNTER_MASK;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='del'>-</div><div class='del'>-			/* grab the new page, sync and release the old */</div><div class='del'>-			if (lastpage != NULL) {</div><div class='del'>-				if (test_page_attr(bitmap, lastpage,</div><div class='del'>-						   BITMAP_PAGE_NEEDWRITE)) {</div><div class='del'>-					clear_page_attr(bitmap, lastpage,</div><div class='del'>-							BITMAP_PAGE_NEEDWRITE);</div><div class='del'>-					spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-					write_page(bitmap, lastpage, 0);</div><div class='del'>-				} else {</div><div class='del'>-					set_page_attr(bitmap, lastpage,</div><div class='del'>-						      BITMAP_PAGE_NEEDWRITE);</div><div class='del'>-					bitmap-&gt;allclean = 0;</div><div class='del'>-					spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-				}</div><div class='del'>-			} else</div><div class='del'>-				spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-			lastpage = page;</div><div class='del'>-</div><div class='del'>-			/* We are possibly going to clear some bits, so make</div><div class='del'>-			 * sure that events_cleared is up-to-date.</div><div class='del'>-			 */</div><div class='del'>-			if (bitmap-&gt;need_sync &amp;&amp;</div><div class='del'>-			    mddev-&gt;bitmap_info.external == 0) {</div><div class='del'>-				bitmap_super_t *sb;</div><div class='del'>-				bitmap-&gt;need_sync = 0;</div><div class='del'>-				sb = kmap_atomic(bitmap-&gt;sb_page);</div><div class='del'>-				sb-&gt;events_cleared =</div><div class='del'>-					cpu_to_le64(bitmap-&gt;events_cleared);</div><div class='del'>-				kunmap_atomic(sb);</div><div class='del'>-				write_page(bitmap, bitmap-&gt;sb_page, 1);</div><div class='del'>-			}</div><div class='del'>-			spin_lock_irqsave(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-			if (!bitmap-&gt;need_sync)</div><div class='del'>-				clear_page_attr(bitmap, page, BITMAP_PAGE_PENDING);</div><div class='del'>-			else</div><div class='del'>-				bitmap-&gt;allclean = 0;</div><div class='add'>+			counts-&gt;bp[j &gt;&gt; PAGE_COUNTER_SHIFT].pending = 0;</div><div class='ctx'> 		}</div><div class='del'>-		bmc = bitmap_get_counter(bitmap,</div><div class='del'>-					 (sector_t)j &lt;&lt; bitmap-&gt;chunkshift,</div><div class='add'>+		bmc = bitmap_get_counter(counts,</div><div class='add'>+					 block,</div><div class='ctx'> 					 &amp;blocks, 0);</div><div class='del'>-		if (!bmc)</div><div class='add'>+</div><div class='add'>+		if (!bmc) {</div><div class='ctx'> 			j |= PAGE_COUNTER_MASK;</div><div class='del'>-		else if (*bmc) {</div><div class='del'>-			if (*bmc == 1 &amp;&amp; !bitmap-&gt;need_sync) {</div><div class='del'>-				/* we can clear the bit */</div><div class='del'>-				*bmc = 0;</div><div class='del'>-				bitmap_count_page(bitmap,</div><div class='del'>-						  (sector_t)j &lt;&lt; bitmap-&gt;chunkshift,</div><div class='del'>-						  -1);</div><div class='del'>-</div><div class='del'>-				/* clear the bit */</div><div class='del'>-				paddr = kmap_atomic(page);</div><div class='del'>-				if (bitmap-&gt;flags &amp; BITMAP_HOSTENDIAN)</div><div class='del'>-					clear_bit(file_page_offset(bitmap, j),</div><div class='del'>-						  paddr);</div><div class='del'>-				else</div><div class='del'>-					__clear_bit_le(</div><div class='del'>-						file_page_offset(bitmap,</div><div class='del'>-								 j),</div><div class='del'>-						paddr);</div><div class='del'>-				kunmap_atomic(paddr);</div><div class='del'>-			} else if (*bmc &lt;= 2) {</div><div class='del'>-				*bmc = 1; /* maybe clear the bit next time */</div><div class='del'>-				set_page_attr(bitmap, page, BITMAP_PAGE_PENDING);</div><div class='del'>-				bitmap-&gt;allclean = 0;</div><div class='del'>-			}</div><div class='add'>+			continue;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	/* now sync the final page */</div><div class='del'>-	if (lastpage != NULL) {</div><div class='del'>-		spin_lock_irqsave(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-		if (test_page_attr(bitmap, lastpage, BITMAP_PAGE_NEEDWRITE)) {</div><div class='del'>-			clear_page_attr(bitmap, lastpage, BITMAP_PAGE_NEEDWRITE);</div><div class='del'>-			spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-			write_page(bitmap, lastpage, 0);</div><div class='del'>-		} else {</div><div class='del'>-			set_page_attr(bitmap, lastpage, BITMAP_PAGE_NEEDWRITE);</div><div class='add'>+		if (*bmc == 1 &amp;&amp; !bitmap-&gt;need_sync) {</div><div class='add'>+			/* We can clear the bit */</div><div class='add'>+			*bmc = 0;</div><div class='add'>+			bitmap_count_page(counts, block, -1);</div><div class='add'>+			bitmap_file_clear_bit(bitmap, block);</div><div class='add'>+		} else if (*bmc &amp;&amp; *bmc &lt;= 2) {</div><div class='add'>+			*bmc = 1;</div><div class='add'>+			bitmap_set_pending(counts, block);</div><div class='ctx'> 			bitmap-&gt;allclean = 0;</div><div class='del'>-			spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(&amp;counts-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Now start writeout on any page in NEEDWRITE that isn't DIRTY.</div><div class='add'>+	 * DIRTY pages need to be written by bitmap_unplug so it can wait</div><div class='add'>+	 * for them.</div><div class='add'>+	 * If we find any DIRTY page we stop there and let bitmap_unplug</div><div class='add'>+	 * handle all the rest.  This is important in the case where</div><div class='add'>+	 * the first blocking holds the superblock and it has been updated.</div><div class='add'>+	 * We mustn't write any other blocks before the superblock.</div><div class='add'>+	 */</div><div class='add'>+	for (j = 0;</div><div class='add'>+	     j &lt; bitmap-&gt;storage.file_pages</div><div class='add'>+		     &amp;&amp; !test_bit(BITMAP_STALE, &amp;bitmap-&gt;flags);</div><div class='add'>+	     j++) {</div><div class='add'>+</div><div class='add'>+		if (test_page_attr(bitmap, j,</div><div class='add'>+				   BITMAP_PAGE_DIRTY))</div><div class='add'>+			/* bitmap_unplug will handle the rest */</div><div class='add'>+			break;</div><div class='add'>+		if (test_and_clear_page_attr(bitmap, j,</div><div class='add'>+					     BITMAP_PAGE_NEEDWRITE)) {</div><div class='add'>+			write_page(bitmap, bitmap-&gt;storage.filemap[j], 0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1240,7 +1227,7 @@ void bitmap_daemon_work(struct mddev *mddev)</div><div class='ctx'> 	mutex_unlock(&amp;mddev-&gt;bitmap_info.mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bitmap_counter_t *bitmap_get_counter(struct bitmap *bitmap,</div><div class='add'>+static bitmap_counter_t *bitmap_get_counter(struct bitmap_counts *bitmap,</div><div class='ctx'> 					    sector_t offset, sector_t *blocks,</div><div class='ctx'> 					    int create)</div><div class='ctx'> __releases(bitmap-&gt;lock)</div><div class='hunk'>@@ -1302,10 +1289,10 @@ int bitmap_startwrite(struct bitmap *bitmap, sector_t offset, unsigned long sect</div><div class='ctx'> 		sector_t blocks;</div><div class='ctx'> 		bitmap_counter_t *bmc;</div><div class='ctx'> </div><div class='del'>-		spin_lock_irq(&amp;bitmap-&gt;lock);</div><div class='del'>-		bmc = bitmap_get_counter(bitmap, offset, &amp;blocks, 1);</div><div class='add'>+		spin_lock_irq(&amp;bitmap-&gt;counts.lock);</div><div class='add'>+		bmc = bitmap_get_counter(&amp;bitmap-&gt;counts, offset, &amp;blocks, 1);</div><div class='ctx'> 		if (!bmc) {</div><div class='del'>-			spin_unlock_irq(&amp;bitmap-&gt;lock);</div><div class='add'>+			spin_unlock_irq(&amp;bitmap-&gt;counts.lock);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1317,7 +1304,7 @@ int bitmap_startwrite(struct bitmap *bitmap, sector_t offset, unsigned long sect</div><div class='ctx'> 			 */</div><div class='ctx'> 			prepare_to_wait(&amp;bitmap-&gt;overflow_wait, &amp;__wait,</div><div class='ctx'> 					TASK_UNINTERRUPTIBLE);</div><div class='del'>-			spin_unlock_irq(&amp;bitmap-&gt;lock);</div><div class='add'>+			spin_unlock_irq(&amp;bitmap-&gt;counts.lock);</div><div class='ctx'> 			io_schedule();</div><div class='ctx'> 			finish_wait(&amp;bitmap-&gt;overflow_wait, &amp;__wait);</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -1326,7 +1313,7 @@ int bitmap_startwrite(struct bitmap *bitmap, sector_t offset, unsigned long sect</div><div class='ctx'> 		switch (*bmc) {</div><div class='ctx'> 		case 0:</div><div class='ctx'> 			bitmap_file_set_bit(bitmap, offset);</div><div class='del'>-			bitmap_count_page(bitmap, offset, 1);</div><div class='add'>+			bitmap_count_page(&amp;bitmap-&gt;counts, offset, 1);</div><div class='ctx'> 			/* fall through */</div><div class='ctx'> 		case 1:</div><div class='ctx'> 			*bmc = 2;</div><div class='hunk'>@@ -1334,7 +1321,7 @@ int bitmap_startwrite(struct bitmap *bitmap, sector_t offset, unsigned long sect</div><div class='ctx'> </div><div class='ctx'> 		(*bmc)++;</div><div class='ctx'> </div><div class='del'>-		spin_unlock_irq(&amp;bitmap-&gt;lock);</div><div class='add'>+		spin_unlock_irq(&amp;bitmap-&gt;counts.lock);</div><div class='ctx'> </div><div class='ctx'> 		offset += blocks;</div><div class='ctx'> 		if (sectors &gt; blocks)</div><div class='hunk'>@@ -1364,10 +1351,10 @@ void bitmap_endwrite(struct bitmap *bitmap, sector_t offset, unsigned long secto</div><div class='ctx'> 		unsigned long flags;</div><div class='ctx'> 		bitmap_counter_t *bmc;</div><div class='ctx'> </div><div class='del'>-		spin_lock_irqsave(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-		bmc = bitmap_get_counter(bitmap, offset, &amp;blocks, 0);</div><div class='add'>+		spin_lock_irqsave(&amp;bitmap-&gt;counts.lock, flags);</div><div class='add'>+		bmc = bitmap_get_counter(&amp;bitmap-&gt;counts, offset, &amp;blocks, 0);</div><div class='ctx'> 		if (!bmc) {</div><div class='del'>-			spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='add'>+			spin_unlock_irqrestore(&amp;bitmap-&gt;counts.lock, flags);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1386,14 +1373,10 @@ void bitmap_endwrite(struct bitmap *bitmap, sector_t offset, unsigned long secto</div><div class='ctx'> </div><div class='ctx'> 		(*bmc)--;</div><div class='ctx'> 		if (*bmc &lt;= 2) {</div><div class='del'>-			set_page_attr(bitmap,</div><div class='del'>-				      filemap_get_page(</div><div class='del'>-					      bitmap,</div><div class='del'>-					      offset &gt;&gt; bitmap-&gt;chunkshift),</div><div class='del'>-				      BITMAP_PAGE_PENDING);</div><div class='add'>+			bitmap_set_pending(&amp;bitmap-&gt;counts, offset);</div><div class='ctx'> 			bitmap-&gt;allclean = 0;</div><div class='ctx'> 		}</div><div class='del'>-		spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='add'>+		spin_unlock_irqrestore(&amp;bitmap-&gt;counts.lock, flags);</div><div class='ctx'> 		offset += blocks;</div><div class='ctx'> 		if (sectors &gt; blocks)</div><div class='ctx'> 			sectors -= blocks;</div><div class='hunk'>@@ -1412,8 +1395,8 @@ static int __bitmap_start_sync(struct bitmap *bitmap, sector_t offset, sector_t</div><div class='ctx'> 		*blocks = 1024;</div><div class='ctx'> 		return 1; /* always resync if no bitmap */</div><div class='ctx'> 	}</div><div class='del'>-	spin_lock_irq(&amp;bitmap-&gt;lock);</div><div class='del'>-	bmc = bitmap_get_counter(bitmap, offset, blocks, 0);</div><div class='add'>+	spin_lock_irq(&amp;bitmap-&gt;counts.lock);</div><div class='add'>+	bmc = bitmap_get_counter(&amp;bitmap-&gt;counts, offset, blocks, 0);</div><div class='ctx'> 	rv = 0;</div><div class='ctx'> 	if (bmc) {</div><div class='ctx'> 		/* locked */</div><div class='hunk'>@@ -1427,7 +1410,7 @@ static int __bitmap_start_sync(struct bitmap *bitmap, sector_t offset, sector_t</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irq(&amp;bitmap-&gt;lock);</div><div class='add'>+	spin_unlock_irq(&amp;bitmap-&gt;counts.lock);</div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1464,8 +1447,8 @@ void bitmap_end_sync(struct bitmap *bitmap, sector_t offset, sector_t *blocks, i</div><div class='ctx'> 		*blocks = 1024;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	spin_lock_irqsave(&amp;bitmap-&gt;lock, flags);</div><div class='del'>-	bmc = bitmap_get_counter(bitmap, offset, blocks, 0);</div><div class='add'>+	spin_lock_irqsave(&amp;bitmap-&gt;counts.lock, flags);</div><div class='add'>+	bmc = bitmap_get_counter(&amp;bitmap-&gt;counts, offset, blocks, 0);</div><div class='ctx'> 	if (bmc == NULL)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> 	/* locked */</div><div class='hunk'>@@ -1476,15 +1459,13 @@ void bitmap_end_sync(struct bitmap *bitmap, sector_t offset, sector_t *blocks, i</div><div class='ctx'> 			*bmc |= NEEDED_MASK;</div><div class='ctx'> 		else {</div><div class='ctx'> 			if (*bmc &lt;= 2) {</div><div class='del'>-				set_page_attr(bitmap,</div><div class='del'>-					      filemap_get_page(bitmap, offset &gt;&gt; bitmap-&gt;chunkshift),</div><div class='del'>-					      BITMAP_PAGE_PENDING);</div><div class='add'>+				bitmap_set_pending(&amp;bitmap-&gt;counts, offset);</div><div class='ctx'> 				bitmap-&gt;allclean = 0;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'>  unlock:</div><div class='del'>-	spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;bitmap-&gt;counts.lock, flags);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bitmap_end_sync);</div><div class='ctx'> </div><div class='hunk'>@@ -1524,7 +1505,7 @@ void bitmap_cond_end_sync(struct bitmap *bitmap, sector_t sector)</div><div class='ctx'> </div><div class='ctx'> 	bitmap-&gt;mddev-&gt;curr_resync_completed = sector;</div><div class='ctx'> 	set_bit(MD_CHANGE_CLEAN, &amp;bitmap-&gt;mddev-&gt;flags);</div><div class='del'>-	sector &amp;= ~((1ULL &lt;&lt; bitmap-&gt;chunkshift) - 1);</div><div class='add'>+	sector &amp;= ~((1ULL &lt;&lt; bitmap-&gt;counts.chunkshift) - 1);</div><div class='ctx'> 	s = 0;</div><div class='ctx'> 	while (s &lt; sector &amp;&amp; s &lt; bitmap-&gt;mddev-&gt;resync_max_sectors) {</div><div class='ctx'> 		bitmap_end_sync(bitmap, s, &amp;blocks, 0);</div><div class='hunk'>@@ -1538,27 +1519,25 @@ EXPORT_SYMBOL(bitmap_cond_end_sync);</div><div class='ctx'> static void bitmap_set_memory_bits(struct bitmap *bitmap, sector_t offset, int needed)</div><div class='ctx'> {</div><div class='ctx'> 	/* For each chunk covered by any of these sectors, set the</div><div class='del'>-	 * counter to 1 and set resync_needed.  They should all</div><div class='add'>+	 * counter to 2 and possibly set resync_needed.  They should all</div><div class='ctx'> 	 * be 0 at this point</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	sector_t secs;</div><div class='ctx'> 	bitmap_counter_t *bmc;</div><div class='del'>-	spin_lock_irq(&amp;bitmap-&gt;lock);</div><div class='del'>-	bmc = bitmap_get_counter(bitmap, offset, &amp;secs, 1);</div><div class='add'>+	spin_lock_irq(&amp;bitmap-&gt;counts.lock);</div><div class='add'>+	bmc = bitmap_get_counter(&amp;bitmap-&gt;counts, offset, &amp;secs, 1);</div><div class='ctx'> 	if (!bmc) {</div><div class='del'>-		spin_unlock_irq(&amp;bitmap-&gt;lock);</div><div class='add'>+		spin_unlock_irq(&amp;bitmap-&gt;counts.lock);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!*bmc) {</div><div class='del'>-		struct page *page;</div><div class='ctx'> 		*bmc = 2 | (needed ? NEEDED_MASK : 0);</div><div class='del'>-		bitmap_count_page(bitmap, offset, 1);</div><div class='del'>-		page = filemap_get_page(bitmap, offset &gt;&gt; bitmap-&gt;chunkshift);</div><div class='del'>-		set_page_attr(bitmap, page, BITMAP_PAGE_PENDING);</div><div class='add'>+		bitmap_count_page(&amp;bitmap-&gt;counts, offset, 1);</div><div class='add'>+		bitmap_set_pending(&amp;bitmap-&gt;counts, offset);</div><div class='ctx'> 		bitmap-&gt;allclean = 0;</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irq(&amp;bitmap-&gt;lock);</div><div class='add'>+	spin_unlock_irq(&amp;bitmap-&gt;counts.lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* dirty the memory and file bits for bitmap chunks "s" to "e" */</div><div class='hunk'>@@ -1567,11 +1546,9 @@ void bitmap_dirty_bits(struct bitmap *bitmap, unsigned long s, unsigned long e)</div><div class='ctx'> 	unsigned long chunk;</div><div class='ctx'> </div><div class='ctx'> 	for (chunk = s; chunk &lt;= e; chunk++) {</div><div class='del'>-		sector_t sec = (sector_t)chunk &lt;&lt; bitmap-&gt;chunkshift;</div><div class='add'>+		sector_t sec = (sector_t)chunk &lt;&lt; bitmap-&gt;counts.chunkshift;</div><div class='ctx'> 		bitmap_set_memory_bits(bitmap, sec, 1);</div><div class='del'>-		spin_lock_irq(&amp;bitmap-&gt;lock);</div><div class='ctx'> 		bitmap_file_set_bit(bitmap, sec);</div><div class='del'>-		spin_unlock_irq(&amp;bitmap-&gt;lock);</div><div class='ctx'> 		if (sec &lt; bitmap-&gt;mddev-&gt;recovery_cp)</div><div class='ctx'> 			/* We are asserting that the array is dirty,</div><div class='ctx'> 			 * so move the recovery_cp address back so</div><div class='hunk'>@@ -1616,11 +1593,15 @@ static void bitmap_free(struct bitmap *bitmap)</div><div class='ctx'> 	if (!bitmap) /* there was no bitmap */</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* release the bitmap file and kill the daemon */</div><div class='del'>-	bitmap_file_put(bitmap);</div><div class='add'>+	/* Shouldn't be needed - but just in case.... */</div><div class='add'>+	wait_event(bitmap-&gt;write_wait,</div><div class='add'>+		   atomic_read(&amp;bitmap-&gt;pending_writes) == 0);</div><div class='add'>+</div><div class='add'>+	/* release the bitmap file  */</div><div class='add'>+	bitmap_file_unmap(&amp;bitmap-&gt;storage);</div><div class='ctx'> </div><div class='del'>-	bp = bitmap-&gt;bp;</div><div class='del'>-	pages = bitmap-&gt;pages;</div><div class='add'>+	bp = bitmap-&gt;counts.bp;</div><div class='add'>+	pages = bitmap-&gt;counts.pages;</div><div class='ctx'> </div><div class='ctx'> 	/* free all allocated memory */</div><div class='ctx'> </div><div class='hunk'>@@ -1659,25 +1640,19 @@ int bitmap_create(struct mddev *mddev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bitmap *bitmap;</div><div class='ctx'> 	sector_t blocks = mddev-&gt;resync_max_sectors;</div><div class='del'>-	unsigned long chunks;</div><div class='del'>-	unsigned long pages;</div><div class='ctx'> 	struct file *file = mddev-&gt;bitmap_info.file;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct sysfs_dirent *bm = NULL;</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON(sizeof(bitmap_super_t) != 256);</div><div class='ctx'> </div><div class='del'>-	if (!file</div><div class='del'>-	    &amp;&amp; !mddev-&gt;bitmap_info.offset) /* bitmap disabled, nothing to do */</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	BUG_ON(file &amp;&amp; mddev-&gt;bitmap_info.offset);</div><div class='ctx'> </div><div class='ctx'> 	bitmap = kzalloc(sizeof(*bitmap), GFP_KERNEL);</div><div class='ctx'> 	if (!bitmap)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;bitmap-&gt;lock);</div><div class='add'>+	spin_lock_init(&amp;bitmap-&gt;counts.lock);</div><div class='ctx'> 	atomic_set(&amp;bitmap-&gt;pending_writes, 0);</div><div class='ctx'> 	init_waitqueue_head(&amp;bitmap-&gt;write_wait);</div><div class='ctx'> 	init_waitqueue_head(&amp;bitmap-&gt;overflow_wait);</div><div class='hunk'>@@ -1693,7 +1668,7 @@ int bitmap_create(struct mddev *mddev)</div><div class='ctx'> 	} else</div><div class='ctx'> 		bitmap-&gt;sysfs_can_clear = NULL;</div><div class='ctx'> </div><div class='del'>-	bitmap-&gt;file = file;</div><div class='add'>+	bitmap-&gt;storage.file = file;</div><div class='ctx'> 	if (file) {</div><div class='ctx'> 		get_file(file);</div><div class='ctx'> 		/* As future accesses to this file will use bmap,</div><div class='hunk'>@@ -1724,33 +1699,15 @@ int bitmap_create(struct mddev *mddev)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='ctx'> 	bitmap-&gt;daemon_lastrun = jiffies;</div><div class='del'>-	bitmap-&gt;chunkshift = (ffz(~mddev-&gt;bitmap_info.chunksize)</div><div class='del'>-			      - BITMAP_BLOCK_SHIFT);</div><div class='del'>-</div><div class='del'>-	/* now that chunksize and chunkshift are set, we can use these macros */</div><div class='del'>-	chunks = (blocks + bitmap-&gt;chunkshift - 1) &gt;&gt;</div><div class='del'>-			bitmap-&gt;chunkshift;</div><div class='del'>-	pages = (chunks + PAGE_COUNTER_RATIO - 1) / PAGE_COUNTER_RATIO;</div><div class='del'>-</div><div class='del'>-	BUG_ON(!pages);</div><div class='del'>-</div><div class='del'>-	bitmap-&gt;chunks = chunks;</div><div class='del'>-	bitmap-&gt;pages = pages;</div><div class='del'>-	bitmap-&gt;missing_pages = pages;</div><div class='del'>-</div><div class='del'>-	bitmap-&gt;bp = kzalloc(pages * sizeof(*bitmap-&gt;bp), GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-	err = -ENOMEM;</div><div class='del'>-	if (!bitmap-&gt;bp)</div><div class='add'>+	err = bitmap_resize(bitmap, blocks, mddev-&gt;bitmap_info.chunksize, 1);</div><div class='add'>+	if (err)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO "created bitmap (%lu pages) for device %s\n",</div><div class='del'>-		pages, bmname(bitmap));</div><div class='add'>+	       bitmap-&gt;counts.pages, bmname(bitmap));</div><div class='ctx'> </div><div class='ctx'> 	mddev-&gt;bitmap = bitmap;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	return (bitmap-&gt;flags &amp; BITMAP_WRITE_ERROR) ? -EIO : 0;</div><div class='add'>+	return test_bit(BITMAP_WRITE_ERROR, &amp;bitmap-&gt;flags) ? -EIO : 0;</div><div class='ctx'> </div><div class='ctx'>  error:</div><div class='ctx'> 	bitmap_free(bitmap);</div><div class='hunk'>@@ -1791,13 +1748,17 @@ int bitmap_load(struct mddev *mddev)</div><div class='ctx'> </div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='add'>+	clear_bit(BITMAP_STALE, &amp;bitmap-&gt;flags);</div><div class='add'>+</div><div class='add'>+	/* Kick recovery in case any bits were set */</div><div class='add'>+	set_bit(MD_RECOVERY_NEEDED, &amp;bitmap-&gt;mddev-&gt;recovery);</div><div class='ctx'> </div><div class='ctx'> 	mddev-&gt;thread-&gt;timeout = mddev-&gt;bitmap_info.daemon_sleep;</div><div class='ctx'> 	md_wakeup_thread(mddev-&gt;thread);</div><div class='ctx'> </div><div class='ctx'> 	bitmap_update_sb(bitmap);</div><div class='ctx'> </div><div class='del'>-	if (bitmap-&gt;flags &amp; BITMAP_WRITE_ERROR)</div><div class='add'>+	if (test_bit(BITMAP_WRITE_ERROR, &amp;bitmap-&gt;flags))</div><div class='ctx'> 		err = -EIO;</div><div class='ctx'> out:</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1807,30 +1768,194 @@ EXPORT_SYMBOL_GPL(bitmap_load);</div><div class='ctx'> void bitmap_status(struct seq_file *seq, struct bitmap *bitmap)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long chunk_kb;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct bitmap_counts *counts;</div><div class='ctx'> </div><div class='ctx'> 	if (!bitmap)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;bitmap-&gt;lock, flags);</div><div class='add'>+	counts = &amp;bitmap-&gt;counts;</div><div class='add'>+</div><div class='ctx'> 	chunk_kb = bitmap-&gt;mddev-&gt;bitmap_info.chunksize &gt;&gt; 10;</div><div class='ctx'> 	seq_printf(seq, "bitmap: %lu/%lu pages [%luKB], "</div><div class='ctx'> 		   "%lu%s chunk",</div><div class='del'>-		   bitmap-&gt;pages - bitmap-&gt;missing_pages,</div><div class='del'>-		   bitmap-&gt;pages,</div><div class='del'>-		   (bitmap-&gt;pages - bitmap-&gt;missing_pages)</div><div class='add'>+		   counts-&gt;pages - counts-&gt;missing_pages,</div><div class='add'>+		   counts-&gt;pages,</div><div class='add'>+		   (counts-&gt;pages - counts-&gt;missing_pages)</div><div class='ctx'> 		   &lt;&lt; (PAGE_SHIFT - 10),</div><div class='ctx'> 		   chunk_kb ? chunk_kb : bitmap-&gt;mddev-&gt;bitmap_info.chunksize,</div><div class='ctx'> 		   chunk_kb ? "KB" : "B");</div><div class='del'>-	if (bitmap-&gt;file) {</div><div class='add'>+	if (bitmap-&gt;storage.file) {</div><div class='ctx'> 		seq_printf(seq, ", file: ");</div><div class='del'>-		seq_path(seq, &amp;bitmap-&gt;file-&gt;f_path, " \t\n");</div><div class='add'>+		seq_path(seq, &amp;bitmap-&gt;storage.file-&gt;f_path, " \t\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(seq, "\n");</div><div class='del'>-	spin_unlock_irqrestore(&amp;bitmap-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int bitmap_resize(struct bitmap *bitmap, sector_t blocks,</div><div class='add'>+		  int chunksize, int init)</div><div class='add'>+{</div><div class='add'>+	/* If chunk_size is 0, choose an appropriate chunk size.</div><div class='add'>+	 * Then possibly allocate new storage space.</div><div class='add'>+	 * Then quiesce, copy bits, replace bitmap, and re-start</div><div class='add'>+	 *</div><div class='add'>+	 * This function is called both to set up the initial bitmap</div><div class='add'>+	 * and to resize the bitmap while the array is active.</div><div class='add'>+	 * If this happens as a result of the array being resized,</div><div class='add'>+	 * chunksize will be zero, and we need to choose a suitable</div><div class='add'>+	 * chunksize, otherwise we use what we are given.</div><div class='add'>+	 */</div><div class='add'>+	struct bitmap_storage store;</div><div class='add'>+	struct bitmap_counts old_counts;</div><div class='add'>+	unsigned long chunks;</div><div class='add'>+	sector_t block;</div><div class='add'>+	sector_t old_blocks, new_blocks;</div><div class='add'>+	int chunkshift;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	long pages;</div><div class='add'>+	struct bitmap_page *new_bp;</div><div class='add'>+</div><div class='add'>+	if (chunksize == 0) {</div><div class='add'>+		/* If there is enough space, leave the chunk size unchanged,</div><div class='add'>+		 * else increase by factor of two until there is enough space.</div><div class='add'>+		 */</div><div class='add'>+		long bytes;</div><div class='add'>+		long space = bitmap-&gt;mddev-&gt;bitmap_info.space;</div><div class='add'>+</div><div class='add'>+		if (space == 0) {</div><div class='add'>+			/* We don't know how much space there is, so limit</div><div class='add'>+			 * to current size - in sectors.</div><div class='add'>+			 */</div><div class='add'>+			bytes = DIV_ROUND_UP(bitmap-&gt;counts.chunks, 8);</div><div class='add'>+			if (!bitmap-&gt;mddev-&gt;bitmap_info.external)</div><div class='add'>+				bytes += sizeof(bitmap_super_t);</div><div class='add'>+			space = DIV_ROUND_UP(bytes, 512);</div><div class='add'>+			bitmap-&gt;mddev-&gt;bitmap_info.space = space;</div><div class='add'>+		}</div><div class='add'>+		chunkshift = bitmap-&gt;counts.chunkshift;</div><div class='add'>+		chunkshift--;</div><div class='add'>+		do {</div><div class='add'>+			/* 'chunkshift' is shift from block size to chunk size */</div><div class='add'>+			chunkshift++;</div><div class='add'>+			chunks = DIV_ROUND_UP_SECTOR_T(blocks, 1 &lt;&lt; chunkshift);</div><div class='add'>+			bytes = DIV_ROUND_UP(chunks, 8);</div><div class='add'>+			if (!bitmap-&gt;mddev-&gt;bitmap_info.external)</div><div class='add'>+				bytes += sizeof(bitmap_super_t);</div><div class='add'>+		} while (bytes &gt; (space &lt;&lt; 9));</div><div class='add'>+	} else</div><div class='add'>+		chunkshift = ffz(~chunksize) - BITMAP_BLOCK_SHIFT;</div><div class='add'>+</div><div class='add'>+	chunks = DIV_ROUND_UP_SECTOR_T(blocks, 1 &lt;&lt; chunkshift);</div><div class='add'>+	memset(&amp;store, 0, sizeof(store));</div><div class='add'>+	if (bitmap-&gt;mddev-&gt;bitmap_info.offset || bitmap-&gt;mddev-&gt;bitmap_info.file)</div><div class='add'>+		ret = bitmap_storage_alloc(&amp;store, chunks,</div><div class='add'>+					   !bitmap-&gt;mddev-&gt;bitmap_info.external);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	pages = DIV_ROUND_UP(chunks, PAGE_COUNTER_RATIO);</div><div class='add'>+</div><div class='add'>+	new_bp = kzalloc(pages * sizeof(*new_bp), GFP_KERNEL);</div><div class='add'>+	ret = -ENOMEM;</div><div class='add'>+	if (!new_bp) {</div><div class='add'>+		bitmap_file_unmap(&amp;store);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!init)</div><div class='add'>+		bitmap-&gt;mddev-&gt;pers-&gt;quiesce(bitmap-&gt;mddev, 1);</div><div class='add'>+</div><div class='add'>+	store.file = bitmap-&gt;storage.file;</div><div class='add'>+	bitmap-&gt;storage.file = NULL;</div><div class='add'>+</div><div class='add'>+	if (store.sb_page &amp;&amp; bitmap-&gt;storage.sb_page)</div><div class='add'>+		memcpy(page_address(store.sb_page),</div><div class='add'>+		       page_address(bitmap-&gt;storage.sb_page),</div><div class='add'>+		       sizeof(bitmap_super_t));</div><div class='add'>+	bitmap_file_unmap(&amp;bitmap-&gt;storage);</div><div class='add'>+	bitmap-&gt;storage = store;</div><div class='add'>+</div><div class='add'>+	old_counts = bitmap-&gt;counts;</div><div class='add'>+	bitmap-&gt;counts.bp = new_bp;</div><div class='add'>+	bitmap-&gt;counts.pages = pages;</div><div class='add'>+	bitmap-&gt;counts.missing_pages = pages;</div><div class='add'>+	bitmap-&gt;counts.chunkshift = chunkshift;</div><div class='add'>+	bitmap-&gt;counts.chunks = chunks;</div><div class='add'>+	bitmap-&gt;mddev-&gt;bitmap_info.chunksize = 1 &lt;&lt; (chunkshift +</div><div class='add'>+						     BITMAP_BLOCK_SHIFT);</div><div class='add'>+</div><div class='add'>+	blocks = min(old_counts.chunks &lt;&lt; old_counts.chunkshift,</div><div class='add'>+		     chunks &lt;&lt; chunkshift);</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;bitmap-&gt;counts.lock);</div><div class='add'>+	for (block = 0; block &lt; blocks; ) {</div><div class='add'>+		bitmap_counter_t *bmc_old, *bmc_new;</div><div class='add'>+		int set;</div><div class='add'>+</div><div class='add'>+		bmc_old = bitmap_get_counter(&amp;old_counts, block,</div><div class='add'>+					     &amp;old_blocks, 0);</div><div class='add'>+		set = bmc_old &amp;&amp; NEEDED(*bmc_old);</div><div class='add'>+</div><div class='add'>+		if (set) {</div><div class='add'>+			bmc_new = bitmap_get_counter(&amp;bitmap-&gt;counts, block,</div><div class='add'>+						     &amp;new_blocks, 1);</div><div class='add'>+			if (*bmc_new == 0) {</div><div class='add'>+				/* need to set on-disk bits too. */</div><div class='add'>+				sector_t end = block + new_blocks;</div><div class='add'>+				sector_t start = block &gt;&gt; chunkshift;</div><div class='add'>+				start &lt;&lt;= chunkshift;</div><div class='add'>+				while (start &lt; end) {</div><div class='add'>+					bitmap_file_set_bit(bitmap, block);</div><div class='add'>+					start += 1 &lt;&lt; chunkshift;</div><div class='add'>+				}</div><div class='add'>+				*bmc_new = 2;</div><div class='add'>+				bitmap_count_page(&amp;bitmap-&gt;counts,</div><div class='add'>+						  block, 1);</div><div class='add'>+				bitmap_set_pending(&amp;bitmap-&gt;counts,</div><div class='add'>+						   block);</div><div class='add'>+			}</div><div class='add'>+			*bmc_new |= NEEDED_MASK;</div><div class='add'>+			if (new_blocks &lt; old_blocks)</div><div class='add'>+				old_blocks = new_blocks;</div><div class='add'>+		}</div><div class='add'>+		block += old_blocks;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!init) {</div><div class='add'>+		int i;</div><div class='add'>+		while (block &lt; (chunks &lt;&lt; chunkshift)) {</div><div class='add'>+			bitmap_counter_t *bmc;</div><div class='add'>+			bmc = bitmap_get_counter(&amp;bitmap-&gt;counts, block,</div><div class='add'>+						 &amp;new_blocks, 1);</div><div class='add'>+			if (bmc) {</div><div class='add'>+				/* new space.  It needs to be resynced, so</div><div class='add'>+				 * we set NEEDED_MASK.</div><div class='add'>+				 */</div><div class='add'>+				if (*bmc == 0) {</div><div class='add'>+					*bmc = NEEDED_MASK | 2;</div><div class='add'>+					bitmap_count_page(&amp;bitmap-&gt;counts,</div><div class='add'>+							  block, 1);</div><div class='add'>+					bitmap_set_pending(&amp;bitmap-&gt;counts,</div><div class='add'>+							   block);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			block += new_blocks;</div><div class='add'>+		}</div><div class='add'>+		for (i = 0; i &lt; bitmap-&gt;storage.file_pages; i++)</div><div class='add'>+			set_page_attr(bitmap, i, BITMAP_PAGE_DIRTY);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(&amp;bitmap-&gt;counts.lock);</div><div class='add'>+</div><div class='add'>+	if (!init) {</div><div class='add'>+		bitmap_unplug(bitmap);</div><div class='add'>+		bitmap-&gt;mddev-&gt;pers-&gt;quiesce(bitmap-&gt;mddev, 0);</div><div class='add'>+	}</div><div class='add'>+	ret = 0;</div><div class='add'>+err:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(bitmap_resize);</div><div class='add'>+</div><div class='ctx'> static ssize_t</div><div class='ctx'> location_show(struct mddev *mddev, char *page)</div><div class='ctx'> {</div><div class='hunk'>@@ -1924,6 +2049,43 @@ location_store(struct mddev *mddev, const char *buf, size_t len)</div><div class='ctx'> static struct md_sysfs_entry bitmap_location =</div><div class='ctx'> __ATTR(location, S_IRUGO|S_IWUSR, location_show, location_store);</div><div class='ctx'> </div><div class='add'>+/* 'bitmap/space' is the space available at 'location' for the</div><div class='add'>+ * bitmap.  This allows the kernel to know when it is safe to</div><div class='add'>+ * resize the bitmap to match a resized array.</div><div class='add'>+ */</div><div class='add'>+static ssize_t</div><div class='add'>+space_show(struct mddev *mddev, char *page)</div><div class='add'>+{</div><div class='add'>+	return sprintf(page, "%lu\n", mddev-&gt;bitmap_info.space);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+space_store(struct mddev *mddev, const char *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	unsigned long sectors;</div><div class='add'>+	int rv;</div><div class='add'>+</div><div class='add'>+	rv = kstrtoul(buf, 10, &amp;sectors);</div><div class='add'>+	if (rv)</div><div class='add'>+		return rv;</div><div class='add'>+</div><div class='add'>+	if (sectors == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (mddev-&gt;bitmap &amp;&amp;</div><div class='add'>+	    sectors &lt; (mddev-&gt;bitmap-&gt;storage.bytes + 511) &gt;&gt; 9)</div><div class='add'>+		return -EFBIG; /* Bitmap is too big for this small space */</div><div class='add'>+</div><div class='add'>+	/* could make sure it isn't too big, but that isn't really</div><div class='add'>+	 * needed - user-space should be careful.</div><div class='add'>+	 */</div><div class='add'>+	mddev-&gt;bitmap_info.space = sectors;</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct md_sysfs_entry bitmap_space =</div><div class='add'>+__ATTR(space, S_IRUGO|S_IWUSR, space_show, space_store);</div><div class='add'>+</div><div class='ctx'> static ssize_t</div><div class='ctx'> timeout_show(struct mddev *mddev, char *page)</div><div class='ctx'> {</div><div class='hunk'>@@ -2099,6 +2261,7 @@ __ATTR(max_backlog_used, S_IRUGO | S_IWUSR,</div><div class='ctx'> </div><div class='ctx'> static struct attribute *md_bitmap_attrs[] = {</div><div class='ctx'> 	&amp;bitmap_location.attr,</div><div class='add'>+	&amp;bitmap_space.attr,</div><div class='ctx'> 	&amp;bitmap_timeout.attr,</div><div class='ctx'> 	&amp;bitmap_backlog.attr,</div><div class='ctx'> 	&amp;bitmap_chunksize.attr,</div><div class='head'>diff --git a/drivers/md/bitmap.h b/drivers/md/bitmap.h<br/>index 55ca5aec84e4..df4aeb6ac6f0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/bitmap.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/bitmap.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/bitmap.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/bitmap.h</a></div><div class='hunk'>@@ -101,9 +101,6 @@ typedef __u16 bitmap_counter_t;</div><div class='ctx'> </div><div class='ctx'> #define BITMAP_BLOCK_SHIFT 9</div><div class='ctx'> </div><div class='del'>-/* how many blocks per chunk? (this is variable) */</div><div class='del'>-#define CHUNK_BLOCK_RATIO(bitmap) ((bitmap)-&gt;mddev-&gt;bitmap_info.chunksize &gt;&gt; BITMAP_BLOCK_SHIFT)</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -114,9 +111,9 @@ typedef __u16 bitmap_counter_t;</div><div class='ctx'> </div><div class='ctx'> /* use these for bitmap-&gt;flags and bitmap-&gt;sb-&gt;state bit-fields */</div><div class='ctx'> enum bitmap_state {</div><div class='del'>-	BITMAP_STALE  = 0x002,  /* the bitmap file is out of date or had -EIO */</div><div class='del'>-	BITMAP_WRITE_ERROR = 0x004, /* A write error has occurred */</div><div class='del'>-	BITMAP_HOSTENDIAN = 0x8000,</div><div class='add'>+	BITMAP_STALE	   = 1,  /* the bitmap file is out of date or had -EIO */</div><div class='add'>+	BITMAP_WRITE_ERROR = 2, /* A write error has occurred */</div><div class='add'>+	BITMAP_HOSTENDIAN  =15,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* the superblock at the front of the bitmap file -- little endian */</div><div class='hunk'>@@ -131,8 +128,10 @@ typedef struct bitmap_super_s {</div><div class='ctx'> 	__le32 chunksize;    /* 52  the bitmap chunk size in bytes */</div><div class='ctx'> 	__le32 daemon_sleep; /* 56  seconds between disk flushes */</div><div class='ctx'> 	__le32 write_behind; /* 60  number of outstanding write-behind writes */</div><div class='add'>+	__le32 sectors_reserved; /* 64 number of 512-byte sectors that are</div><div class='add'>+				  * reserved for the bitmap. */</div><div class='ctx'> </div><div class='del'>-	__u8  pad[256 - 64]; /* set to zero */</div><div class='add'>+	__u8  pad[256 - 68]; /* set to zero */</div><div class='ctx'> } bitmap_super_t;</div><div class='ctx'> </div><div class='ctx'> /* notes:</div><div class='hunk'>@@ -163,35 +162,48 @@ struct bitmap_page {</div><div class='ctx'> 	 */</div><div class='ctx'> 	unsigned int hijacked:1;</div><div class='ctx'> 	/*</div><div class='add'>+	 * If any counter in this page is '1' or '2' - and so could be</div><div class='add'>+	 * cleared then that page is marked as 'pending'</div><div class='add'>+	 */</div><div class='add'>+	unsigned int pending:1;</div><div class='add'>+	/*</div><div class='ctx'> 	 * count of dirty bits on the page</div><div class='ctx'> 	 */</div><div class='del'>-	unsigned int  count:31;</div><div class='add'>+	unsigned int  count:30;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* the main bitmap structure - one per mddev */</div><div class='ctx'> struct bitmap {</div><div class='del'>-	struct bitmap_page *bp;</div><div class='del'>-	unsigned long pages; /* total number of pages in the bitmap */</div><div class='del'>-	unsigned long missing_pages; /* number of pages not yet allocated */</div><div class='ctx'> </div><div class='del'>-	struct mddev *mddev; /* the md device that the bitmap is for */</div><div class='add'>+	struct bitmap_counts {</div><div class='add'>+		spinlock_t lock;</div><div class='add'>+		struct bitmap_page *bp;</div><div class='add'>+		unsigned long pages;		/* total number of pages</div><div class='add'>+						 * in the bitmap */</div><div class='add'>+		unsigned long missing_pages;	/* number of pages</div><div class='add'>+						 * not yet allocated */</div><div class='add'>+		unsigned long chunkshift;	/* chunksize = 2^chunkshift</div><div class='add'>+						 * (for bitops) */</div><div class='add'>+		unsigned long chunks;		/* Total number of data</div><div class='add'>+						 * chunks for the array */</div><div class='add'>+	} counts;</div><div class='ctx'> </div><div class='del'>-	/* bitmap chunksize -- how much data does each bit represent? */</div><div class='del'>-	unsigned long chunkshift; /* chunksize = 2^(chunkshift+9) (for bitops) */</div><div class='del'>-	unsigned long chunks; /* total number of data chunks for the array */</div><div class='add'>+	struct mddev *mddev; /* the md device that the bitmap is for */</div><div class='ctx'> </div><div class='ctx'> 	__u64	events_cleared;</div><div class='ctx'> 	int need_sync;</div><div class='ctx'> </div><div class='del'>-	/* bitmap spinlock */</div><div class='del'>-	spinlock_t lock;</div><div class='del'>-</div><div class='del'>-	struct file *file; /* backing disk file */</div><div class='del'>-	struct page *sb_page; /* cached copy of the bitmap file superblock */</div><div class='del'>-	struct page **filemap; /* list of cache pages for the file */</div><div class='del'>-	unsigned long *filemap_attr; /* attributes associated w/ filemap pages */</div><div class='del'>-	unsigned long file_pages; /* number of pages in the file */</div><div class='del'>-	int last_page_size; /* bytes in the last page */</div><div class='add'>+	struct bitmap_storage {</div><div class='add'>+		struct file *file;		/* backing disk file */</div><div class='add'>+		struct page *sb_page;		/* cached copy of the bitmap</div><div class='add'>+						 * file superblock */</div><div class='add'>+		struct page **filemap;		/* list of cache pages for</div><div class='add'>+						 * the file */</div><div class='add'>+		unsigned long *filemap_attr;	/* attributes associated</div><div class='add'>+						 * w/ filemap pages */</div><div class='add'>+		unsigned long file_pages;	/* number of pages in the file*/</div><div class='add'>+		unsigned long bytes;		/* total bytes in the bitmap */</div><div class='add'>+	} storage;</div><div class='ctx'> </div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -245,6 +257,9 @@ void bitmap_cond_end_sync(struct bitmap *bitmap, sector_t sector);</div><div class='ctx'> </div><div class='ctx'> void bitmap_unplug(struct bitmap *bitmap);</div><div class='ctx'> void bitmap_daemon_work(struct mddev *mddev);</div><div class='add'>+</div><div class='add'>+int bitmap_resize(struct bitmap *bitmap, sector_t blocks,</div><div class='add'>+		  int chunksize, int init);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/md/dm-log-userspace-transfer.c b/drivers/md/dm-log-userspace-transfer.c<br/>index 1f23e048f077..08d9a207259a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/dm-log-userspace-transfer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/dm-log-userspace-transfer.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/dm-log-userspace-transfer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/dm-log-userspace-transfer.c</a></div><div class='hunk'>@@ -134,7 +134,7 @@ static void cn_ulog_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp)</div><div class='ctx'> {</div><div class='ctx'> 	struct dm_ulog_request *tfr = (struct dm_ulog_request *)(msg + 1);</div><div class='ctx'> </div><div class='del'>-	if (!cap_raised(current_cap(), CAP_SYS_ADMIN))</div><div class='add'>+	if (!capable(CAP_SYS_ADMIN))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;receiving_list_lock);</div><div class='head'>diff --git a/drivers/md/dm-mpath.c b/drivers/md/dm-mpath.c<br/>index 922a3385eead..638dae048b4f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/dm-mpath.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/dm-mpath.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/dm-mpath.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/dm-mpath.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;scsi/scsi_dh.h&gt;</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -61,11 +62,11 @@ struct multipath {</div><div class='ctx'> 	struct list_head list;</div><div class='ctx'> 	struct dm_target *ti;</div><div class='ctx'> </div><div class='del'>-	spinlock_t lock;</div><div class='del'>-</div><div class='ctx'> 	const char *hw_handler_name;</div><div class='ctx'> 	char *hw_handler_params;</div><div class='ctx'> </div><div class='add'>+	spinlock_t lock;</div><div class='add'>+</div><div class='ctx'> 	unsigned nr_priority_groups;</div><div class='ctx'> 	struct list_head priority_groups;</div><div class='ctx'> </div><div class='hunk'>@@ -81,16 +82,17 @@ struct multipath {</div><div class='ctx'> 	struct priority_group *next_pg;	/* Switch to this PG if set */</div><div class='ctx'> 	unsigned repeat_count;		/* I/Os left before calling PS again */</div><div class='ctx'> </div><div class='del'>-	unsigned queue_io;		/* Must we queue all I/O? */</div><div class='del'>-	unsigned queue_if_no_path;	/* Queue I/O if last path fails? */</div><div class='del'>-	unsigned saved_queue_if_no_path;/* Saved state during suspension */</div><div class='add'>+	unsigned queue_io:1;		/* Must we queue all I/O? */</div><div class='add'>+	unsigned queue_if_no_path:1;	/* Queue I/O if last path fails? */</div><div class='add'>+	unsigned saved_queue_if_no_path:1; /* Saved state during suspension */</div><div class='add'>+</div><div class='ctx'> 	unsigned pg_init_retries;	/* Number of times to retry pg_init */</div><div class='ctx'> 	unsigned pg_init_count;		/* Number of times pg_init called */</div><div class='ctx'> 	unsigned pg_init_delay_msecs;	/* Number of msecs before pg_init retry */</div><div class='ctx'> </div><div class='add'>+	unsigned queue_size;</div><div class='ctx'> 	struct work_struct process_queued_ios;</div><div class='ctx'> 	struct list_head queued_ios;</div><div class='del'>-	unsigned queue_size;</div><div class='ctx'> </div><div class='ctx'> 	struct work_struct trigger_event;</div><div class='ctx'> </div><div class='hunk'>@@ -328,14 +330,18 @@ static void __choose_pgpath(struct multipath *m, size_t nr_bytes)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Loop through priority groups until we find a valid path.</div><div class='ctx'> 	 * First time we skip PGs marked 'bypassed'.</div><div class='del'>-	 * Second time we only try the ones we skipped.</div><div class='add'>+	 * Second time we only try the ones we skipped, but set</div><div class='add'>+	 * pg_init_delay_retry so we do not hammer controllers.</div><div class='ctx'> 	 */</div><div class='ctx'> 	do {</div><div class='ctx'> 		list_for_each_entry(pg, &amp;m-&gt;priority_groups, list) {</div><div class='ctx'> 			if (pg-&gt;bypassed == bypassed)</div><div class='ctx'> 				continue;</div><div class='del'>-			if (!__choose_path_in_pg(m, pg, nr_bytes))</div><div class='add'>+			if (!__choose_path_in_pg(m, pg, nr_bytes)) {</div><div class='add'>+				if (!bypassed)</div><div class='add'>+					m-&gt;pg_init_delay_retry = 1;</div><div class='ctx'> 				return;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	} while (bypassed--);</div><div class='ctx'> </div><div class='hunk'>@@ -481,9 +487,6 @@ static void process_queued_ios(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;m-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	if (!m-&gt;queue_size)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	if (!m-&gt;current_pgpath)</div><div class='ctx'> 		__choose_pgpath(m, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -496,7 +499,6 @@ static void process_queued_ios(struct work_struct *work)</div><div class='ctx'> 	if (m-&gt;pg_init_required &amp;&amp; !m-&gt;pg_init_in_progress &amp;&amp; pgpath)</div><div class='ctx'> 		__pg_init_all_paths(m);</div><div class='ctx'> </div><div class='del'>-out:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;m-&gt;lock, flags);</div><div class='ctx'> 	if (!must_queue)</div><div class='ctx'> 		dispatch_queued_ios(m);</div><div class='hunk'>@@ -718,8 +720,8 @@ static int parse_hw_handler(struct dm_arg_set *as, struct multipath *m)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	m-&gt;hw_handler_name = kstrdup(dm_shift_arg(as), GFP_KERNEL);</div><div class='del'>-	request_module("scsi_dh_%s", m-&gt;hw_handler_name);</div><div class='del'>-	if (scsi_dh_handler_exist(m-&gt;hw_handler_name) == 0) {</div><div class='add'>+	if (!try_then_request_module(scsi_dh_handler_exist(m-&gt;hw_handler_name),</div><div class='add'>+				     "scsi_dh_%s", m-&gt;hw_handler_name)) {</div><div class='ctx'> 		ti-&gt;error = "unknown hardware handler type";</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto fail;</div><div class='hunk'>@@ -1517,11 +1519,16 @@ out:</div><div class='ctx'> static int multipath_ioctl(struct dm_target *ti, unsigned int cmd,</div><div class='ctx'> 			   unsigned long arg)</div><div class='ctx'> {</div><div class='del'>-	struct multipath *m = (struct multipath *) ti-&gt;private;</div><div class='del'>-	struct block_device *bdev = NULL;</div><div class='del'>-	fmode_t mode = 0;</div><div class='add'>+	struct multipath *m = ti-&gt;private;</div><div class='add'>+	struct block_device *bdev;</div><div class='add'>+	fmode_t mode;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int r = 0;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+again:</div><div class='add'>+	bdev = NULL;</div><div class='add'>+	mode = 0;</div><div class='add'>+	r = 0;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;m-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -1546,6 +1553,12 @@ static int multipath_ioctl(struct dm_target *ti, unsigned int cmd,</div><div class='ctx'> 	if (!r &amp;&amp; ti-&gt;len != i_size_read(bdev-&gt;bd_inode) &gt;&gt; SECTOR_SHIFT)</div><div class='ctx'> 		r = scsi_verify_blk_ioctl(NULL, cmd);</div><div class='ctx'> </div><div class='add'>+	if (r == -EAGAIN &amp;&amp; !fatal_signal_pending(current)) {</div><div class='add'>+		queue_work(kmultipathd, &amp;m-&gt;process_queued_ios);</div><div class='add'>+		msleep(10);</div><div class='add'>+		goto again;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return r ? : __blkdev_driver_ioctl(bdev, mode, cmd, arg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1643,7 +1656,7 @@ out:</div><div class='ctx'>  *---------------------------------------------------------------*/</div><div class='ctx'> static struct target_type multipath_target = {</div><div class='ctx'> 	.name = "multipath",</div><div class='del'>-	.version = {1, 3, 0},</div><div class='add'>+	.version = {1, 4, 0},</div><div class='ctx'> 	.module = THIS_MODULE,</div><div class='ctx'> 	.ctr = multipath_ctr,</div><div class='ctx'> 	.dtr = multipath_dtr,</div><div class='head'>diff --git a/drivers/md/dm-raid.c b/drivers/md/dm-raid.c<br/>index 68965e663248..017c34d78d61 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/dm-raid.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/dm-raid.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/dm-raid.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/dm-raid.c</a></div><div class='hunk'>@@ -155,10 +155,7 @@ static void context_free(struct raid_set *rs)</div><div class='ctx'> 	for (i = 0; i &lt; rs-&gt;md.raid_disks; i++) {</div><div class='ctx'> 		if (rs-&gt;dev[i].meta_dev)</div><div class='ctx'> 			dm_put_device(rs-&gt;ti, rs-&gt;dev[i].meta_dev);</div><div class='del'>-		if (rs-&gt;dev[i].rdev.sb_page)</div><div class='del'>-			put_page(rs-&gt;dev[i].rdev.sb_page);</div><div class='del'>-		rs-&gt;dev[i].rdev.sb_page = NULL;</div><div class='del'>-		rs-&gt;dev[i].rdev.sb_loaded = 0;</div><div class='add'>+		md_rdev_clear(&amp;rs-&gt;dev[i].rdev);</div><div class='ctx'> 		if (rs-&gt;dev[i].data_dev)</div><div class='ctx'> 			dm_put_device(rs-&gt;ti, rs-&gt;dev[i].data_dev);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -606,7 +603,7 @@ static int read_disk_sb(struct md_rdev *rdev, int size)</div><div class='ctx'> 	if (!sync_page_io(rdev, 0, size, rdev-&gt;sb_page, READ, 1)) {</div><div class='ctx'> 		DMERR("Failed to read superblock of device at position %d",</div><div class='ctx'> 		      rdev-&gt;raid_disk);</div><div class='del'>-		set_bit(Faulty, &amp;rdev-&gt;flags);</div><div class='add'>+		md_error(rdev-&gt;mddev, rdev);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -617,16 +614,18 @@ static int read_disk_sb(struct md_rdev *rdev, int size)</div><div class='ctx'> </div><div class='ctx'> static void super_sync(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> {</div><div class='del'>-	struct md_rdev *r;</div><div class='add'>+	int i;</div><div class='ctx'> 	uint64_t failed_devices;</div><div class='ctx'> 	struct dm_raid_superblock *sb;</div><div class='add'>+	struct raid_set *rs = container_of(mddev, struct raid_set, md);</div><div class='ctx'> </div><div class='ctx'> 	sb = page_address(rdev-&gt;sb_page);</div><div class='ctx'> 	failed_devices = le64_to_cpu(sb-&gt;failed_devices);</div><div class='ctx'> </div><div class='del'>-	rdev_for_each(r, mddev)</div><div class='del'>-		if ((r-&gt;raid_disk &gt;= 0) &amp;&amp; test_bit(Faulty, &amp;r-&gt;flags))</div><div class='del'>-			failed_devices |= (1ULL &lt;&lt; r-&gt;raid_disk);</div><div class='add'>+	for (i = 0; i &lt; mddev-&gt;raid_disks; i++)</div><div class='add'>+		if (!rs-&gt;dev[i].data_dev ||</div><div class='add'>+		    test_bit(Faulty, &amp;(rs-&gt;dev[i].rdev.flags)))</div><div class='add'>+			failed_devices |= (1ULL &lt;&lt; i);</div><div class='ctx'> </div><div class='ctx'> 	memset(sb, 0, sizeof(*sb));</div><div class='ctx'> </div><div class='hunk'>@@ -1252,12 +1251,13 @@ static void raid_resume(struct dm_target *ti)</div><div class='ctx'> {</div><div class='ctx'> 	struct raid_set *rs = ti-&gt;private;</div><div class='ctx'> </div><div class='add'>+	set_bit(MD_CHANGE_DEVS, &amp;rs-&gt;md.flags);</div><div class='ctx'> 	if (!rs-&gt;bitmap_loaded) {</div><div class='ctx'> 		bitmap_load(&amp;rs-&gt;md);</div><div class='ctx'> 		rs-&gt;bitmap_loaded = 1;</div><div class='del'>-	} else</div><div class='del'>-		md_wakeup_thread(rs-&gt;md.thread);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	clear_bit(MD_RECOVERY_FROZEN, &amp;rs-&gt;md.recovery);</div><div class='ctx'> 	mddev_resume(&amp;rs-&gt;md);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/md/dm-thin-metadata.c b/drivers/md/dm-thin-metadata.c<br/>index 737d38865b69..3e2907f0bc46 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/dm-thin-metadata.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/dm-thin-metadata.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/dm-thin-metadata.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/dm-thin-metadata.c</a></div><div class='hunk'>@@ -1082,12 +1082,89 @@ int dm_pool_get_metadata_transaction_id(struct dm_pool_metadata *pmd,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __get_held_metadata_root(struct dm_pool_metadata *pmd,</div><div class='del'>-				    dm_block_t *result)</div><div class='add'>+static int __reserve_metadata_snap(struct dm_pool_metadata *pmd)</div><div class='add'>+{</div><div class='add'>+	int r, inc;</div><div class='add'>+	struct thin_disk_superblock *disk_super;</div><div class='add'>+	struct dm_block *copy, *sblock;</div><div class='add'>+	dm_block_t held_root;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Copy the superblock.</div><div class='add'>+	 */</div><div class='add'>+	dm_sm_inc_block(pmd-&gt;metadata_sm, THIN_SUPERBLOCK_LOCATION);</div><div class='add'>+	r = dm_tm_shadow_block(pmd-&gt;tm, THIN_SUPERBLOCK_LOCATION,</div><div class='add'>+			       &amp;sb_validator, &amp;copy, &amp;inc);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	BUG_ON(!inc);</div><div class='add'>+</div><div class='add'>+	held_root = dm_block_location(copy);</div><div class='add'>+	disk_super = dm_block_data(copy);</div><div class='add'>+</div><div class='add'>+	if (le64_to_cpu(disk_super-&gt;held_root)) {</div><div class='add'>+		DMWARN("Pool metadata snapshot already exists: release this before taking another.");</div><div class='add'>+</div><div class='add'>+		dm_tm_dec(pmd-&gt;tm, held_root);</div><div class='add'>+		dm_tm_unlock(pmd-&gt;tm, copy);</div><div class='add'>+		pmd-&gt;need_commit = 1;</div><div class='add'>+</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Wipe the spacemap since we're not publishing this.</div><div class='add'>+	 */</div><div class='add'>+	memset(&amp;disk_super-&gt;data_space_map_root, 0,</div><div class='add'>+	       sizeof(disk_super-&gt;data_space_map_root));</div><div class='add'>+	memset(&amp;disk_super-&gt;metadata_space_map_root, 0,</div><div class='add'>+	       sizeof(disk_super-&gt;metadata_space_map_root));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Increment the data structures that need to be preserved.</div><div class='add'>+	 */</div><div class='add'>+	dm_tm_inc(pmd-&gt;tm, le64_to_cpu(disk_super-&gt;data_mapping_root));</div><div class='add'>+	dm_tm_inc(pmd-&gt;tm, le64_to_cpu(disk_super-&gt;device_details_root));</div><div class='add'>+	dm_tm_unlock(pmd-&gt;tm, copy);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Write the held root into the superblock.</div><div class='add'>+	 */</div><div class='add'>+	r = dm_bm_write_lock(pmd-&gt;bm, THIN_SUPERBLOCK_LOCATION,</div><div class='add'>+			     &amp;sb_validator, &amp;sblock);</div><div class='add'>+	if (r) {</div><div class='add'>+		dm_tm_dec(pmd-&gt;tm, held_root);</div><div class='add'>+		pmd-&gt;need_commit = 1;</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	disk_super = dm_block_data(sblock);</div><div class='add'>+	disk_super-&gt;held_root = cpu_to_le64(held_root);</div><div class='add'>+	dm_bm_unlock(sblock);</div><div class='add'>+</div><div class='add'>+	pmd-&gt;need_commit = 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int dm_pool_reserve_metadata_snap(struct dm_pool_metadata *pmd)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	down_write(&amp;pmd-&gt;root_lock);</div><div class='add'>+	r = __reserve_metadata_snap(pmd);</div><div class='add'>+	up_write(&amp;pmd-&gt;root_lock);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __release_metadata_snap(struct dm_pool_metadata *pmd)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> 	struct thin_disk_superblock *disk_super;</div><div class='del'>-	struct dm_block *sblock;</div><div class='add'>+	struct dm_block *sblock, *copy;</div><div class='add'>+	dm_block_t held_root;</div><div class='ctx'> </div><div class='ctx'> 	r = dm_bm_write_lock(pmd-&gt;bm, THIN_SUPERBLOCK_LOCATION,</div><div class='ctx'> 			     &amp;sb_validator, &amp;sblock);</div><div class='hunk'>@@ -1095,18 +1172,65 @@ static int __get_held_metadata_root(struct dm_pool_metadata *pmd,</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='ctx'> 	disk_super = dm_block_data(sblock);</div><div class='add'>+	held_root = le64_to_cpu(disk_super-&gt;held_root);</div><div class='add'>+	disk_super-&gt;held_root = cpu_to_le64(0);</div><div class='add'>+	pmd-&gt;need_commit = 1;</div><div class='add'>+</div><div class='add'>+	dm_bm_unlock(sblock);</div><div class='add'>+</div><div class='add'>+	if (!held_root) {</div><div class='add'>+		DMWARN("No pool metadata snapshot found: nothing to release.");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = dm_tm_read_lock(pmd-&gt;tm, held_root, &amp;sb_validator, &amp;copy);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	disk_super = dm_block_data(copy);</div><div class='add'>+	dm_sm_dec_block(pmd-&gt;metadata_sm, le64_to_cpu(disk_super-&gt;data_mapping_root));</div><div class='add'>+	dm_sm_dec_block(pmd-&gt;metadata_sm, le64_to_cpu(disk_super-&gt;device_details_root));</div><div class='add'>+	dm_sm_dec_block(pmd-&gt;metadata_sm, held_root);</div><div class='add'>+</div><div class='add'>+	return dm_tm_unlock(pmd-&gt;tm, copy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int dm_pool_release_metadata_snap(struct dm_pool_metadata *pmd)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	down_write(&amp;pmd-&gt;root_lock);</div><div class='add'>+	r = __release_metadata_snap(pmd);</div><div class='add'>+	up_write(&amp;pmd-&gt;root_lock);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __get_metadata_snap(struct dm_pool_metadata *pmd,</div><div class='add'>+			       dm_block_t *result)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+	struct thin_disk_superblock *disk_super;</div><div class='add'>+	struct dm_block *sblock;</div><div class='add'>+</div><div class='add'>+	r = dm_bm_read_lock(pmd-&gt;bm, THIN_SUPERBLOCK_LOCATION,</div><div class='add'>+			    &amp;sb_validator, &amp;sblock);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	disk_super = dm_block_data(sblock);</div><div class='ctx'> 	*result = le64_to_cpu(disk_super-&gt;held_root);</div><div class='ctx'> </div><div class='ctx'> 	return dm_bm_unlock(sblock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int dm_pool_get_held_metadata_root(struct dm_pool_metadata *pmd,</div><div class='del'>-				   dm_block_t *result)</div><div class='add'>+int dm_pool_get_metadata_snap(struct dm_pool_metadata *pmd,</div><div class='add'>+			      dm_block_t *result)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='ctx'> 	down_read(&amp;pmd-&gt;root_lock);</div><div class='del'>-	r = __get_held_metadata_root(pmd, result);</div><div class='add'>+	r = __get_metadata_snap(pmd, result);</div><div class='ctx'> 	up_read(&amp;pmd-&gt;root_lock);</div><div class='ctx'> </div><div class='ctx'> 	return r;</div><div class='head'>diff --git a/drivers/md/dm-thin-metadata.h b/drivers/md/dm-thin-metadata.h<br/>index ed4725e67c96..b88918ccdaf6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/dm-thin-metadata.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/dm-thin-metadata.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/dm-thin-metadata.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/dm-thin-metadata.h</a></div><div class='hunk'>@@ -90,11 +90,18 @@ int dm_pool_get_metadata_transaction_id(struct dm_pool_metadata *pmd,</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Hold/get root for userspace transaction.</div><div class='add'>+ *</div><div class='add'>+ * The metadata snapshot is a copy of the current superblock (minus the</div><div class='add'>+ * space maps).  Userland can access the data structures for READ</div><div class='add'>+ * operations only.  A small performance hit is incurred by providing this</div><div class='add'>+ * copy of the metadata to userland due to extra copy-on-write operations</div><div class='add'>+ * on the metadata nodes.  Release this as soon as you finish with it.</div><div class='ctx'>  */</div><div class='del'>-int dm_pool_hold_metadata_root(struct dm_pool_metadata *pmd);</div><div class='add'>+int dm_pool_reserve_metadata_snap(struct dm_pool_metadata *pmd);</div><div class='add'>+int dm_pool_release_metadata_snap(struct dm_pool_metadata *pmd);</div><div class='ctx'> </div><div class='del'>-int dm_pool_get_held_metadata_root(struct dm_pool_metadata *pmd,</div><div class='del'>-				   dm_block_t *result);</div><div class='add'>+int dm_pool_get_metadata_snap(struct dm_pool_metadata *pmd,</div><div class='add'>+			      dm_block_t *result);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Actions on a single virtual device.</div><div class='head'>diff --git a/drivers/md/dm-thin.c b/drivers/md/dm-thin.c<br/>index 213ae32a0fc4..37fdaf81bd1f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/dm-thin.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/dm-thin.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/dm-thin.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/dm-thin.c</a></div><div class='hunk'>@@ -111,7 +111,7 @@ struct cell_key {</div><div class='ctx'> 	dm_block_t block;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct cell {</div><div class='add'>+struct dm_bio_prison_cell {</div><div class='ctx'> 	struct hlist_node list;</div><div class='ctx'> 	struct bio_prison *prison;</div><div class='ctx'> 	struct cell_key key;</div><div class='hunk'>@@ -141,6 +141,8 @@ static uint32_t calc_nr_buckets(unsigned nr_cells)</div><div class='ctx'> 	return n;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct kmem_cache *_cell_cache;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * @nr_cells should be the number of cells you want in use _concurrently_.</div><div class='ctx'>  * Don't confuse it with the number of distinct keys.</div><div class='hunk'>@@ -157,8 +159,7 @@ static struct bio_prison *prison_create(unsigned nr_cells)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;prison-&gt;lock);</div><div class='del'>-	prison-&gt;cell_pool = mempool_create_kmalloc_pool(nr_cells,</div><div class='del'>-							sizeof(struct cell));</div><div class='add'>+	prison-&gt;cell_pool = mempool_create_slab_pool(nr_cells, _cell_cache);</div><div class='ctx'> 	if (!prison-&gt;cell_pool) {</div><div class='ctx'> 		kfree(prison);</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -194,10 +195,10 @@ static int keys_equal(struct cell_key *lhs, struct cell_key *rhs)</div><div class='ctx'> 		       (lhs-&gt;block == rhs-&gt;block);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct cell *__search_bucket(struct hlist_head *bucket,</div><div class='del'>-				    struct cell_key *key)</div><div class='add'>+static struct dm_bio_prison_cell *__search_bucket(struct hlist_head *bucket,</div><div class='add'>+						  struct cell_key *key)</div><div class='ctx'> {</div><div class='del'>-	struct cell *cell;</div><div class='add'>+	struct dm_bio_prison_cell *cell;</div><div class='ctx'> 	struct hlist_node *tmp;</div><div class='ctx'> </div><div class='ctx'> 	hlist_for_each_entry(cell, tmp, bucket, list)</div><div class='hunk'>@@ -214,12 +215,12 @@ static struct cell *__search_bucket(struct hlist_head *bucket,</div><div class='ctx'>  * Returns 1 if the cell was already held, 0 if @inmate is the new holder.</div><div class='ctx'>  */</div><div class='ctx'> static int bio_detain(struct bio_prison *prison, struct cell_key *key,</div><div class='del'>-		      struct bio *inmate, struct cell **ref)</div><div class='add'>+		      struct bio *inmate, struct dm_bio_prison_cell **ref)</div><div class='ctx'> {</div><div class='ctx'> 	int r = 1;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	uint32_t hash = hash_key(prison, key);</div><div class='del'>-	struct cell *cell, *cell2;</div><div class='add'>+	struct dm_bio_prison_cell *cell, *cell2;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(hash &gt; prison-&gt;nr_buckets);</div><div class='ctx'> </div><div class='hunk'>@@ -273,19 +274,21 @@ out:</div><div class='ctx'> /*</div><div class='ctx'>  * @inmates must have been initialised prior to this call</div><div class='ctx'>  */</div><div class='del'>-static void __cell_release(struct cell *cell, struct bio_list *inmates)</div><div class='add'>+static void __cell_release(struct dm_bio_prison_cell *cell, struct bio_list *inmates)</div><div class='ctx'> {</div><div class='ctx'> 	struct bio_prison *prison = cell-&gt;prison;</div><div class='ctx'> </div><div class='ctx'> 	hlist_del(&amp;cell-&gt;list);</div><div class='ctx'> </div><div class='del'>-	bio_list_add(inmates, cell-&gt;holder);</div><div class='del'>-	bio_list_merge(inmates, &amp;cell-&gt;bios);</div><div class='add'>+	if (inmates) {</div><div class='add'>+		bio_list_add(inmates, cell-&gt;holder);</div><div class='add'>+		bio_list_merge(inmates, &amp;cell-&gt;bios);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mempool_free(cell, prison-&gt;cell_pool);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cell_release(struct cell *cell, struct bio_list *bios)</div><div class='add'>+static void cell_release(struct dm_bio_prison_cell *cell, struct bio_list *bios)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct bio_prison *prison = cell-&gt;prison;</div><div class='hunk'>@@ -301,14 +304,15 @@ static void cell_release(struct cell *cell, struct bio_list *bios)</div><div class='ctx'>  * bio may be in the cell.  This function releases the cell, and also does</div><div class='ctx'>  * a sanity check.</div><div class='ctx'>  */</div><div class='del'>-static void __cell_release_singleton(struct cell *cell, struct bio *bio)</div><div class='add'>+static void __cell_release_singleton(struct dm_bio_prison_cell *cell, struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	hlist_del(&amp;cell-&gt;list);</div><div class='ctx'> 	BUG_ON(cell-&gt;holder != bio);</div><div class='ctx'> 	BUG_ON(!bio_list_empty(&amp;cell-&gt;bios));</div><div class='add'>+</div><div class='add'>+	__cell_release(cell, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cell_release_singleton(struct cell *cell, struct bio *bio)</div><div class='add'>+static void cell_release_singleton(struct dm_bio_prison_cell *cell, struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct bio_prison *prison = cell-&gt;prison;</div><div class='hunk'>@@ -321,7 +325,8 @@ static void cell_release_singleton(struct cell *cell, struct bio *bio)</div><div class='ctx'> /*</div><div class='ctx'>  * Sometimes we don't want the holder, just the additional bios.</div><div class='ctx'>  */</div><div class='del'>-static void __cell_release_no_holder(struct cell *cell, struct bio_list *inmates)</div><div class='add'>+static void __cell_release_no_holder(struct dm_bio_prison_cell *cell,</div><div class='add'>+				     struct bio_list *inmates)</div><div class='ctx'> {</div><div class='ctx'> 	struct bio_prison *prison = cell-&gt;prison;</div><div class='ctx'> </div><div class='hunk'>@@ -331,7 +336,8 @@ static void __cell_release_no_holder(struct cell *cell, struct bio_list *inmates</div><div class='ctx'> 	mempool_free(cell, prison-&gt;cell_pool);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cell_release_no_holder(struct cell *cell, struct bio_list *inmates)</div><div class='add'>+static void cell_release_no_holder(struct dm_bio_prison_cell *cell,</div><div class='add'>+				   struct bio_list *inmates)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct bio_prison *prison = cell-&gt;prison;</div><div class='hunk'>@@ -341,7 +347,7 @@ static void cell_release_no_holder(struct cell *cell, struct bio_list *inmates)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;prison-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cell_error(struct cell *cell)</div><div class='add'>+static void cell_error(struct dm_bio_prison_cell *cell)</div><div class='ctx'> {</div><div class='ctx'> 	struct bio_prison *prison = cell-&gt;prison;</div><div class='ctx'> 	struct bio_list bios;</div><div class='hunk'>@@ -488,7 +494,7 @@ static void build_virtual_key(struct dm_thin_device *td, dm_block_t b,</div><div class='ctx'>  * also provides the interface for creating and destroying internal</div><div class='ctx'>  * devices.</div><div class='ctx'>  */</div><div class='del'>-struct new_mapping;</div><div class='add'>+struct dm_thin_new_mapping;</div><div class='ctx'> </div><div class='ctx'> struct pool_features {</div><div class='ctx'> 	unsigned zero_new_blocks:1;</div><div class='hunk'>@@ -534,7 +540,7 @@ struct pool {</div><div class='ctx'> 	struct deferred_set shared_read_ds;</div><div class='ctx'> 	struct deferred_set all_io_ds;</div><div class='ctx'> </div><div class='del'>-	struct new_mapping *next_mapping;</div><div class='add'>+	struct dm_thin_new_mapping *next_mapping;</div><div class='ctx'> 	mempool_t *mapping_pool;</div><div class='ctx'> 	mempool_t *endio_hook_pool;</div><div class='ctx'> };</div><div class='hunk'>@@ -627,11 +633,11 @@ static struct pool *__pool_table_lookup_metadata_dev(struct block_device *md_dev</div><div class='ctx'> </div><div class='ctx'> /*----------------------------------------------------------------*/</div><div class='ctx'> </div><div class='del'>-struct endio_hook {</div><div class='add'>+struct dm_thin_endio_hook {</div><div class='ctx'> 	struct thin_c *tc;</div><div class='ctx'> 	struct deferred_entry *shared_read_entry;</div><div class='ctx'> 	struct deferred_entry *all_io_entry;</div><div class='del'>-	struct new_mapping *overwrite_mapping;</div><div class='add'>+	struct dm_thin_new_mapping *overwrite_mapping;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __requeue_bio_list(struct thin_c *tc, struct bio_list *master)</div><div class='hunk'>@@ -644,7 +650,8 @@ static void __requeue_bio_list(struct thin_c *tc, struct bio_list *master)</div><div class='ctx'> 	bio_list_init(master);</div><div class='ctx'> </div><div class='ctx'> 	while ((bio = bio_list_pop(&amp;bios))) {</div><div class='del'>-		struct endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='add'>+		struct dm_thin_endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='add'>+</div><div class='ctx'> 		if (h-&gt;tc == tc)</div><div class='ctx'> 			bio_endio(bio, DM_ENDIO_REQUEUE);</div><div class='ctx'> 		else</div><div class='hunk'>@@ -733,7 +740,7 @@ static void wake_worker(struct pool *pool)</div><div class='ctx'> /*</div><div class='ctx'>  * Bio endio functions.</div><div class='ctx'>  */</div><div class='del'>-struct new_mapping {</div><div class='add'>+struct dm_thin_new_mapping {</div><div class='ctx'> 	struct list_head list;</div><div class='ctx'> </div><div class='ctx'> 	unsigned quiesced:1;</div><div class='hunk'>@@ -743,7 +750,7 @@ struct new_mapping {</div><div class='ctx'> 	struct thin_c *tc;</div><div class='ctx'> 	dm_block_t virt_block;</div><div class='ctx'> 	dm_block_t data_block;</div><div class='del'>-	struct cell *cell, *cell2;</div><div class='add'>+	struct dm_bio_prison_cell *cell, *cell2;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -756,7 +763,7 @@ struct new_mapping {</div><div class='ctx'> 	bio_end_io_t *saved_bi_end_io;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void __maybe_add_mapping(struct new_mapping *m)</div><div class='add'>+static void __maybe_add_mapping(struct dm_thin_new_mapping *m)</div><div class='ctx'> {</div><div class='ctx'> 	struct pool *pool = m-&gt;tc-&gt;pool;</div><div class='ctx'> </div><div class='hunk'>@@ -769,7 +776,7 @@ static void __maybe_add_mapping(struct new_mapping *m)</div><div class='ctx'> static void copy_complete(int read_err, unsigned long write_err, void *context)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	struct new_mapping *m = context;</div><div class='add'>+	struct dm_thin_new_mapping *m = context;</div><div class='ctx'> 	struct pool *pool = m-&gt;tc-&gt;pool;</div><div class='ctx'> </div><div class='ctx'> 	m-&gt;err = read_err || write_err ? -EIO : 0;</div><div class='hunk'>@@ -783,8 +790,8 @@ static void copy_complete(int read_err, unsigned long write_err, void *context)</div><div class='ctx'> static void overwrite_endio(struct bio *bio, int err)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	struct endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='del'>-	struct new_mapping *m = h-&gt;overwrite_mapping;</div><div class='add'>+	struct dm_thin_endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='add'>+	struct dm_thin_new_mapping *m = h-&gt;overwrite_mapping;</div><div class='ctx'> 	struct pool *pool = m-&gt;tc-&gt;pool;</div><div class='ctx'> </div><div class='ctx'> 	m-&gt;err = err;</div><div class='hunk'>@@ -808,7 +815,7 @@ static void overwrite_endio(struct bio *bio, int err)</div><div class='ctx'> /*</div><div class='ctx'>  * This sends the bios in the cell back to the deferred_bios list.</div><div class='ctx'>  */</div><div class='del'>-static void cell_defer(struct thin_c *tc, struct cell *cell,</div><div class='add'>+static void cell_defer(struct thin_c *tc, struct dm_bio_prison_cell *cell,</div><div class='ctx'> 		       dm_block_t data_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct pool *pool = tc-&gt;pool;</div><div class='hunk'>@@ -825,7 +832,7 @@ static void cell_defer(struct thin_c *tc, struct cell *cell,</div><div class='ctx'>  * Same as cell_defer above, except it omits one particular detainee,</div><div class='ctx'>  * a write bio that covers the block and has already been processed.</div><div class='ctx'>  */</div><div class='del'>-static void cell_defer_except(struct thin_c *tc, struct cell *cell)</div><div class='add'>+static void cell_defer_except(struct thin_c *tc, struct dm_bio_prison_cell *cell)</div><div class='ctx'> {</div><div class='ctx'> 	struct bio_list bios;</div><div class='ctx'> 	struct pool *pool = tc-&gt;pool;</div><div class='hunk'>@@ -840,7 +847,7 @@ static void cell_defer_except(struct thin_c *tc, struct cell *cell)</div><div class='ctx'> 	wake_worker(pool);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void process_prepared_mapping(struct new_mapping *m)</div><div class='add'>+static void process_prepared_mapping(struct dm_thin_new_mapping *m)</div><div class='ctx'> {</div><div class='ctx'> 	struct thin_c *tc = m-&gt;tc;</div><div class='ctx'> 	struct bio *bio;</div><div class='hunk'>@@ -883,7 +890,7 @@ static void process_prepared_mapping(struct new_mapping *m)</div><div class='ctx'> 	mempool_free(m, tc-&gt;pool-&gt;mapping_pool);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void process_prepared_discard(struct new_mapping *m)</div><div class='add'>+static void process_prepared_discard(struct dm_thin_new_mapping *m)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> 	struct thin_c *tc = m-&gt;tc;</div><div class='hunk'>@@ -906,11 +913,11 @@ static void process_prepared_discard(struct new_mapping *m)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void process_prepared(struct pool *pool, struct list_head *head,</div><div class='del'>-			     void (*fn)(struct new_mapping *))</div><div class='add'>+			     void (*fn)(struct dm_thin_new_mapping *))</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct list_head maps;</div><div class='del'>-	struct new_mapping *m, *tmp;</div><div class='add'>+	struct dm_thin_new_mapping *m, *tmp;</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;maps);</div><div class='ctx'> 	spin_lock_irqsave(&amp;pool-&gt;lock, flags);</div><div class='hunk'>@@ -954,9 +961,9 @@ static int ensure_next_mapping(struct pool *pool)</div><div class='ctx'> 	return pool-&gt;next_mapping ? 0 : -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct new_mapping *get_next_mapping(struct pool *pool)</div><div class='add'>+static struct dm_thin_new_mapping *get_next_mapping(struct pool *pool)</div><div class='ctx'> {</div><div class='del'>-	struct new_mapping *r = pool-&gt;next_mapping;</div><div class='add'>+	struct dm_thin_new_mapping *r = pool-&gt;next_mapping;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!pool-&gt;next_mapping);</div><div class='ctx'> </div><div class='hunk'>@@ -968,11 +975,11 @@ static struct new_mapping *get_next_mapping(struct pool *pool)</div><div class='ctx'> static void schedule_copy(struct thin_c *tc, dm_block_t virt_block,</div><div class='ctx'> 			  struct dm_dev *origin, dm_block_t data_origin,</div><div class='ctx'> 			  dm_block_t data_dest,</div><div class='del'>-			  struct cell *cell, struct bio *bio)</div><div class='add'>+			  struct dm_bio_prison_cell *cell, struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> 	struct pool *pool = tc-&gt;pool;</div><div class='del'>-	struct new_mapping *m = get_next_mapping(pool);</div><div class='add'>+	struct dm_thin_new_mapping *m = get_next_mapping(pool);</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;m-&gt;list);</div><div class='ctx'> 	m-&gt;quiesced = 0;</div><div class='hunk'>@@ -994,7 +1001,8 @@ static void schedule_copy(struct thin_c *tc, dm_block_t virt_block,</div><div class='ctx'> 	 * bio immediately. Otherwise we use kcopyd to clone the data first.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (io_overwrites_block(pool, bio)) {</div><div class='del'>-		struct endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='add'>+		struct dm_thin_endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='add'>+</div><div class='ctx'> 		h-&gt;overwrite_mapping = m;</div><div class='ctx'> 		m-&gt;bio = bio;</div><div class='ctx'> 		save_and_set_endio(bio, &amp;m-&gt;saved_bi_end_io, overwrite_endio);</div><div class='hunk'>@@ -1022,7 +1030,7 @@ static void schedule_copy(struct thin_c *tc, dm_block_t virt_block,</div><div class='ctx'> </div><div class='ctx'> static void schedule_internal_copy(struct thin_c *tc, dm_block_t virt_block,</div><div class='ctx'> 				   dm_block_t data_origin, dm_block_t data_dest,</div><div class='del'>-				   struct cell *cell, struct bio *bio)</div><div class='add'>+				   struct dm_bio_prison_cell *cell, struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	schedule_copy(tc, virt_block, tc-&gt;pool_dev,</div><div class='ctx'> 		      data_origin, data_dest, cell, bio);</div><div class='hunk'>@@ -1030,18 +1038,18 @@ static void schedule_internal_copy(struct thin_c *tc, dm_block_t virt_block,</div><div class='ctx'> </div><div class='ctx'> static void schedule_external_copy(struct thin_c *tc, dm_block_t virt_block,</div><div class='ctx'> 				   dm_block_t data_dest,</div><div class='del'>-				   struct cell *cell, struct bio *bio)</div><div class='add'>+				   struct dm_bio_prison_cell *cell, struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	schedule_copy(tc, virt_block, tc-&gt;origin_dev,</div><div class='ctx'> 		      virt_block, data_dest, cell, bio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void schedule_zero(struct thin_c *tc, dm_block_t virt_block,</div><div class='del'>-			  dm_block_t data_block, struct cell *cell,</div><div class='add'>+			  dm_block_t data_block, struct dm_bio_prison_cell *cell,</div><div class='ctx'> 			  struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	struct pool *pool = tc-&gt;pool;</div><div class='del'>-	struct new_mapping *m = get_next_mapping(pool);</div><div class='add'>+	struct dm_thin_new_mapping *m = get_next_mapping(pool);</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;m-&gt;list);</div><div class='ctx'> 	m-&gt;quiesced = 1;</div><div class='hunk'>@@ -1062,12 +1070,12 @@ static void schedule_zero(struct thin_c *tc, dm_block_t virt_block,</div><div class='ctx'> 		process_prepared_mapping(m);</div><div class='ctx'> </div><div class='ctx'> 	else if (io_overwrites_block(pool, bio)) {</div><div class='del'>-		struct endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='add'>+		struct dm_thin_endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='add'>+</div><div class='ctx'> 		h-&gt;overwrite_mapping = m;</div><div class='ctx'> 		m-&gt;bio = bio;</div><div class='ctx'> 		save_and_set_endio(bio, &amp;m-&gt;saved_bi_end_io, overwrite_endio);</div><div class='ctx'> 		remap_and_issue(tc, bio, data_block);</div><div class='del'>-</div><div class='ctx'> 	} else {</div><div class='ctx'> 		int r;</div><div class='ctx'> 		struct dm_io_region to;</div><div class='hunk'>@@ -1152,7 +1160,7 @@ static int alloc_data_block(struct thin_c *tc, dm_block_t *result)</div><div class='ctx'>  */</div><div class='ctx'> static void retry_on_resume(struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	struct endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='add'>+	struct dm_thin_endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='ctx'> 	struct thin_c *tc = h-&gt;tc;</div><div class='ctx'> 	struct pool *pool = tc-&gt;pool;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -1162,7 +1170,7 @@ static void retry_on_resume(struct bio *bio)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pool-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void no_space(struct cell *cell)</div><div class='add'>+static void no_space(struct dm_bio_prison_cell *cell)</div><div class='ctx'> {</div><div class='ctx'> 	struct bio *bio;</div><div class='ctx'> 	struct bio_list bios;</div><div class='hunk'>@@ -1177,12 +1185,13 @@ static void no_space(struct cell *cell)</div><div class='ctx'> static void process_discard(struct thin_c *tc, struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	struct pool *pool = tc-&gt;pool;</div><div class='del'>-	struct cell *cell, *cell2;</div><div class='add'>+	struct dm_bio_prison_cell *cell, *cell2;</div><div class='ctx'> 	struct cell_key key, key2;</div><div class='ctx'> 	dm_block_t block = get_bio_block(tc, bio);</div><div class='ctx'> 	struct dm_thin_lookup_result lookup_result;</div><div class='del'>-	struct new_mapping *m;</div><div class='add'>+	struct dm_thin_new_mapping *m;</div><div class='ctx'> </div><div class='ctx'> 	build_virtual_key(tc-&gt;td, block, &amp;key);</div><div class='ctx'> 	if (bio_detain(tc-&gt;pool-&gt;prison, &amp;key, bio, &amp;cell))</div><div class='hunk'>@@ -1218,7 +1227,9 @@ static void process_discard(struct thin_c *tc, struct bio *bio)</div><div class='ctx'> 			m-&gt;bio = bio;</div><div class='ctx'> </div><div class='ctx'> 			if (!ds_add_work(&amp;pool-&gt;all_io_ds, &amp;m-&gt;list)) {</div><div class='add'>+				spin_lock_irqsave(&amp;pool-&gt;lock, flags);</div><div class='ctx'> 				list_add(&amp;m-&gt;list, &amp;pool-&gt;prepared_discards);</div><div class='add'>+				spin_unlock_irqrestore(&amp;pool-&gt;lock, flags);</div><div class='ctx'> 				wake_worker(pool);</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1257,7 +1268,7 @@ static void process_discard(struct thin_c *tc, struct bio *bio)</div><div class='ctx'> static void break_sharing(struct thin_c *tc, struct bio *bio, dm_block_t block,</div><div class='ctx'> 			  struct cell_key *key,</div><div class='ctx'> 			  struct dm_thin_lookup_result *lookup_result,</div><div class='del'>-			  struct cell *cell)</div><div class='add'>+			  struct dm_bio_prison_cell *cell)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> 	dm_block_t data_block;</div><div class='hunk'>@@ -1284,7 +1295,7 @@ static void process_shared_bio(struct thin_c *tc, struct bio *bio,</div><div class='ctx'> 			       dm_block_t block,</div><div class='ctx'> 			       struct dm_thin_lookup_result *lookup_result)</div><div class='ctx'> {</div><div class='del'>-	struct cell *cell;</div><div class='add'>+	struct dm_bio_prison_cell *cell;</div><div class='ctx'> 	struct pool *pool = tc-&gt;pool;</div><div class='ctx'> 	struct cell_key key;</div><div class='ctx'> </div><div class='hunk'>@@ -1299,7 +1310,7 @@ static void process_shared_bio(struct thin_c *tc, struct bio *bio,</div><div class='ctx'> 	if (bio_data_dir(bio) == WRITE)</div><div class='ctx'> 		break_sharing(tc, bio, block, &amp;key, lookup_result, cell);</div><div class='ctx'> 	else {</div><div class='del'>-		struct endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='add'>+		struct dm_thin_endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='ctx'> </div><div class='ctx'> 		h-&gt;shared_read_entry = ds_inc(&amp;pool-&gt;shared_read_ds);</div><div class='ctx'> </div><div class='hunk'>@@ -1309,7 +1320,7 @@ static void process_shared_bio(struct thin_c *tc, struct bio *bio,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void provision_block(struct thin_c *tc, struct bio *bio, dm_block_t block,</div><div class='del'>-			    struct cell *cell)</div><div class='add'>+			    struct dm_bio_prison_cell *cell)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> 	dm_block_t data_block;</div><div class='hunk'>@@ -1357,7 +1368,7 @@ static void process_bio(struct thin_c *tc, struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> 	dm_block_t block = get_bio_block(tc, bio);</div><div class='del'>-	struct cell *cell;</div><div class='add'>+	struct dm_bio_prison_cell *cell;</div><div class='ctx'> 	struct cell_key key;</div><div class='ctx'> 	struct dm_thin_lookup_result lookup_result;</div><div class='ctx'> </div><div class='hunk'>@@ -1426,7 +1437,7 @@ static void process_deferred_bios(struct pool *pool)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pool-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	while ((bio = bio_list_pop(&amp;bios))) {</div><div class='del'>-		struct endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='add'>+		struct dm_thin_endio_hook *h = dm_get_mapinfo(bio)-&gt;ptr;</div><div class='ctx'> 		struct thin_c *tc = h-&gt;tc;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1516,10 +1527,10 @@ static void thin_defer_bio(struct thin_c *tc, struct bio *bio)</div><div class='ctx'> 	wake_worker(pool);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct endio_hook *thin_hook_bio(struct thin_c *tc, struct bio *bio)</div><div class='add'>+static struct dm_thin_endio_hook *thin_hook_bio(struct thin_c *tc, struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	struct pool *pool = tc-&gt;pool;</div><div class='del'>-	struct endio_hook *h = mempool_alloc(pool-&gt;endio_hook_pool, GFP_NOIO);</div><div class='add'>+	struct dm_thin_endio_hook *h = mempool_alloc(pool-&gt;endio_hook_pool, GFP_NOIO);</div><div class='ctx'> </div><div class='ctx'> 	h-&gt;tc = tc;</div><div class='ctx'> 	h-&gt;shared_read_entry = NULL;</div><div class='hunk'>@@ -1626,6 +1637,21 @@ static int bind_control_target(struct pool *pool, struct dm_target *ti)</div><div class='ctx'> 	pool-&gt;low_water_blocks = pt-&gt;low_water_blocks;</div><div class='ctx'> 	pool-&gt;pf = pt-&gt;pf;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If discard_passdown was enabled verify that the data device</div><div class='add'>+	 * supports discards.  Disable discard_passdown if not; otherwise</div><div class='add'>+	 * -EOPNOTSUPP will be returned.</div><div class='add'>+	 */</div><div class='add'>+	if (pt-&gt;pf.discard_passdown) {</div><div class='add'>+		struct request_queue *q = bdev_get_queue(pt-&gt;data_dev-&gt;bdev);</div><div class='add'>+		if (!q || !blk_queue_discard(q)) {</div><div class='add'>+			char buf[BDEVNAME_SIZE];</div><div class='add'>+			DMWARN("Discard unsupported by data device (%s): Disabling discard passdown.",</div><div class='add'>+			       bdevname(pt-&gt;data_dev-&gt;bdev, buf));</div><div class='add'>+			pool-&gt;pf.discard_passdown = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1666,6 +1692,9 @@ static void __pool_destroy(struct pool *pool)</div><div class='ctx'> 	kfree(pool);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct kmem_cache *_new_mapping_cache;</div><div class='add'>+static struct kmem_cache *_endio_hook_cache;</div><div class='add'>+</div><div class='ctx'> static struct pool *pool_create(struct mapped_device *pool_md,</div><div class='ctx'> 				struct block_device *metadata_dev,</div><div class='ctx'> 				unsigned long block_size, char **error)</div><div class='hunk'>@@ -1734,16 +1763,16 @@ static struct pool *pool_create(struct mapped_device *pool_md,</div><div class='ctx'> 	ds_init(&amp;pool-&gt;all_io_ds);</div><div class='ctx'> </div><div class='ctx'> 	pool-&gt;next_mapping = NULL;</div><div class='del'>-	pool-&gt;mapping_pool =</div><div class='del'>-		mempool_create_kmalloc_pool(MAPPING_POOL_SIZE, sizeof(struct new_mapping));</div><div class='add'>+	pool-&gt;mapping_pool = mempool_create_slab_pool(MAPPING_POOL_SIZE,</div><div class='add'>+						      _new_mapping_cache);</div><div class='ctx'> 	if (!pool-&gt;mapping_pool) {</div><div class='ctx'> 		*error = "Error creating pool's mapping mempool";</div><div class='ctx'> 		err_p = ERR_PTR(-ENOMEM);</div><div class='ctx'> 		goto bad_mapping_pool;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pool-&gt;endio_hook_pool =</div><div class='del'>-		mempool_create_kmalloc_pool(ENDIO_HOOK_POOL_SIZE, sizeof(struct endio_hook));</div><div class='add'>+	pool-&gt;endio_hook_pool = mempool_create_slab_pool(ENDIO_HOOK_POOL_SIZE,</div><div class='add'>+							 _endio_hook_cache);</div><div class='ctx'> 	if (!pool-&gt;endio_hook_pool) {</div><div class='ctx'> 		*error = "Error creating pool's endio_hook mempool";</div><div class='ctx'> 		err_p = ERR_PTR(-ENOMEM);</div><div class='hunk'>@@ -1982,19 +2011,6 @@ static int pool_ctr(struct dm_target *ti, unsigned argc, char **argv)</div><div class='ctx'> 		goto out_flags_changed;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If discard_passdown was enabled verify that the data device</div><div class='del'>-	 * supports discards.  Disable discard_passdown if not; otherwise</div><div class='del'>-	 * -EOPNOTSUPP will be returned.</div><div class='del'>-	 */</div><div class='del'>-	if (pf.discard_passdown) {</div><div class='del'>-		struct request_queue *q = bdev_get_queue(data_dev-&gt;bdev);</div><div class='del'>-		if (!q || !blk_queue_discard(q)) {</div><div class='del'>-			DMWARN("Discard unsupported by data device: Disabling discard passdown.");</div><div class='del'>-			pf.discard_passdown = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	pt-&gt;pool = pool;</div><div class='ctx'> 	pt-&gt;ti = ti;</div><div class='ctx'> 	pt-&gt;metadata_dev = metadata_dev;</div><div class='hunk'>@@ -2268,6 +2284,36 @@ static int process_set_transaction_id_mesg(unsigned argc, char **argv, struct po</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int process_reserve_metadata_snap_mesg(unsigned argc, char **argv, struct pool *pool)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	r = check_arg_count(argc, 1);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	r = dm_pool_reserve_metadata_snap(pool-&gt;pmd);</div><div class='add'>+	if (r)</div><div class='add'>+		DMWARN("reserve_metadata_snap message failed.");</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int process_release_metadata_snap_mesg(unsigned argc, char **argv, struct pool *pool)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	r = check_arg_count(argc, 1);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	r = dm_pool_release_metadata_snap(pool-&gt;pmd);</div><div class='add'>+	if (r)</div><div class='add'>+		DMWARN("release_metadata_snap message failed.");</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Messages supported:</div><div class='ctx'>  *   create_thin	&lt;dev_id&gt;</div><div class='hunk'>@@ -2275,6 +2321,8 @@ static int process_set_transaction_id_mesg(unsigned argc, char **argv, struct po</div><div class='ctx'>  *   delete		&lt;dev_id&gt;</div><div class='ctx'>  *   trim		&lt;dev_id&gt; &lt;new_size_in_sectors&gt;</div><div class='ctx'>  *   set_transaction_id &lt;current_trans_id&gt; &lt;new_trans_id&gt;</div><div class='add'>+ *   reserve_metadata_snap</div><div class='add'>+ *   release_metadata_snap</div><div class='ctx'>  */</div><div class='ctx'> static int pool_message(struct dm_target *ti, unsigned argc, char **argv)</div><div class='ctx'> {</div><div class='hunk'>@@ -2294,6 +2342,12 @@ static int pool_message(struct dm_target *ti, unsigned argc, char **argv)</div><div class='ctx'> 	else if (!strcasecmp(argv[0], "set_transaction_id"))</div><div class='ctx'> 		r = process_set_transaction_id_mesg(argc, argv, pool);</div><div class='ctx'> </div><div class='add'>+	else if (!strcasecmp(argv[0], "reserve_metadata_snap"))</div><div class='add'>+		r = process_reserve_metadata_snap_mesg(argc, argv, pool);</div><div class='add'>+</div><div class='add'>+	else if (!strcasecmp(argv[0], "release_metadata_snap"))</div><div class='add'>+		r = process_release_metadata_snap_mesg(argc, argv, pool);</div><div class='add'>+</div><div class='ctx'> 	else</div><div class='ctx'> 		DMWARN("Unrecognised thin pool target message received: %s", argv[0]);</div><div class='ctx'> </div><div class='hunk'>@@ -2353,7 +2407,7 @@ static int pool_status(struct dm_target *ti, status_type_t type,</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			return r;</div><div class='ctx'> </div><div class='del'>-		r = dm_pool_get_held_metadata_root(pool-&gt;pmd, &amp;held_root);</div><div class='add'>+		r = dm_pool_get_metadata_snap(pool-&gt;pmd, &amp;held_root);</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			return r;</div><div class='ctx'> </div><div class='hunk'>@@ -2379,7 +2433,7 @@ static int pool_status(struct dm_target *ti, status_type_t type,</div><div class='ctx'> 		       (unsigned long long)pt-&gt;low_water_blocks);</div><div class='ctx'> </div><div class='ctx'> 		count = !pool-&gt;pf.zero_new_blocks + !pool-&gt;pf.discard_enabled +</div><div class='del'>-			!pool-&gt;pf.discard_passdown;</div><div class='add'>+			!pt-&gt;pf.discard_passdown;</div><div class='ctx'> 		DMEMIT("%u ", count);</div><div class='ctx'> </div><div class='ctx'> 		if (!pool-&gt;pf.zero_new_blocks)</div><div class='hunk'>@@ -2388,7 +2442,7 @@ static int pool_status(struct dm_target *ti, status_type_t type,</div><div class='ctx'> 		if (!pool-&gt;pf.discard_enabled)</div><div class='ctx'> 			DMEMIT("ignore_discard ");</div><div class='ctx'> </div><div class='del'>-		if (!pool-&gt;pf.discard_passdown)</div><div class='add'>+		if (!pt-&gt;pf.discard_passdown)</div><div class='ctx'> 			DMEMIT("no_discard_passdown ");</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2449,7 +2503,7 @@ static struct target_type pool_target = {</div><div class='ctx'> 	.name = "thin-pool",</div><div class='ctx'> 	.features = DM_TARGET_SINGLETON | DM_TARGET_ALWAYS_WRITEABLE |</div><div class='ctx'> 		    DM_TARGET_IMMUTABLE,</div><div class='del'>-	.version = {1, 1, 0},</div><div class='add'>+	.version = {1, 2, 0},</div><div class='ctx'> 	.module = THIS_MODULE,</div><div class='ctx'> 	.ctr = pool_ctr,</div><div class='ctx'> 	.dtr = pool_dtr,</div><div class='hunk'>@@ -2605,9 +2659,9 @@ static int thin_endio(struct dm_target *ti,</div><div class='ctx'> 		      union map_info *map_context)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	struct endio_hook *h = map_context-&gt;ptr;</div><div class='add'>+	struct dm_thin_endio_hook *h = map_context-&gt;ptr;</div><div class='ctx'> 	struct list_head work;</div><div class='del'>-	struct new_mapping *m, *tmp;</div><div class='add'>+	struct dm_thin_new_mapping *m, *tmp;</div><div class='ctx'> 	struct pool *pool = h-&gt;tc-&gt;pool;</div><div class='ctx'> </div><div class='ctx'> 	if (h-&gt;shared_read_entry) {</div><div class='hunk'>@@ -2626,8 +2680,10 @@ static int thin_endio(struct dm_target *ti,</div><div class='ctx'> 	if (h-&gt;all_io_entry) {</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;work);</div><div class='ctx'> 		ds_dec(h-&gt;all_io_entry, &amp;work);</div><div class='add'>+		spin_lock_irqsave(&amp;pool-&gt;lock, flags);</div><div class='ctx'> 		list_for_each_entry_safe(m, tmp, &amp;work, list)</div><div class='ctx'> 			list_add(&amp;m-&gt;list, &amp;pool-&gt;prepared_discards);</div><div class='add'>+		spin_unlock_irqrestore(&amp;pool-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mempool_free(h, pool-&gt;endio_hook_pool);</div><div class='hunk'>@@ -2745,7 +2801,32 @@ static int __init dm_thin_init(void)</div><div class='ctx'> </div><div class='ctx'> 	r = dm_register_target(&amp;pool_target);</div><div class='ctx'> 	if (r)</div><div class='del'>-		dm_unregister_target(&amp;thin_target);</div><div class='add'>+		goto bad_pool_target;</div><div class='add'>+</div><div class='add'>+	r = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	_cell_cache = KMEM_CACHE(dm_bio_prison_cell, 0);</div><div class='add'>+	if (!_cell_cache)</div><div class='add'>+		goto bad_cell_cache;</div><div class='add'>+</div><div class='add'>+	_new_mapping_cache = KMEM_CACHE(dm_thin_new_mapping, 0);</div><div class='add'>+	if (!_new_mapping_cache)</div><div class='add'>+		goto bad_new_mapping_cache;</div><div class='add'>+</div><div class='add'>+	_endio_hook_cache = KMEM_CACHE(dm_thin_endio_hook, 0);</div><div class='add'>+	if (!_endio_hook_cache)</div><div class='add'>+		goto bad_endio_hook_cache;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+bad_endio_hook_cache:</div><div class='add'>+	kmem_cache_destroy(_new_mapping_cache);</div><div class='add'>+bad_new_mapping_cache:</div><div class='add'>+	kmem_cache_destroy(_cell_cache);</div><div class='add'>+bad_cell_cache:</div><div class='add'>+	dm_unregister_target(&amp;pool_target);</div><div class='add'>+bad_pool_target:</div><div class='add'>+	dm_unregister_target(&amp;thin_target);</div><div class='ctx'> </div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='hunk'>@@ -2754,11 +2835,15 @@ static void dm_thin_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	dm_unregister_target(&amp;thin_target);</div><div class='ctx'> 	dm_unregister_target(&amp;pool_target);</div><div class='add'>+</div><div class='add'>+	kmem_cache_destroy(_cell_cache);</div><div class='add'>+	kmem_cache_destroy(_new_mapping_cache);</div><div class='add'>+	kmem_cache_destroy(_endio_hook_cache);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(dm_thin_init);</div><div class='ctx'> module_exit(dm_thin_exit);</div><div class='ctx'> </div><div class='del'>-MODULE_DESCRIPTION(DM_NAME "device-mapper thin provisioning target");</div><div class='add'>+MODULE_DESCRIPTION(DM_NAME " thin provisioning target");</div><div class='ctx'> MODULE_AUTHOR("Joe Thornber &lt;dm-devel@redhat.com&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/md/md.c b/drivers/md/md.c<br/>index 477eb2e180c0..1c2f9048e1ae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/md.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/md.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/md.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/md.c</a></div><div class='hunk'>@@ -391,6 +391,8 @@ void mddev_suspend(struct mddev *mddev)</div><div class='ctx'> 	synchronize_rcu();</div><div class='ctx'> 	wait_event(mddev-&gt;sb_wait, atomic_read(&amp;mddev-&gt;active_io) == 0);</div><div class='ctx'> 	mddev-&gt;pers-&gt;quiesce(mddev, 1);</div><div class='add'>+</div><div class='add'>+	del_timer_sync(&amp;mddev-&gt;safemode_timer);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(mddev_suspend);</div><div class='ctx'> </div><div class='hunk'>@@ -400,6 +402,7 @@ void mddev_resume(struct mddev *mddev)</div><div class='ctx'> 	wake_up(&amp;mddev-&gt;sb_wait);</div><div class='ctx'> 	mddev-&gt;pers-&gt;quiesce(mddev, 0);</div><div class='ctx'> </div><div class='add'>+	set_bit(MD_RECOVERY_NEEDED, &amp;mddev-&gt;recovery);</div><div class='ctx'> 	md_wakeup_thread(mddev-&gt;thread);</div><div class='ctx'> 	md_wakeup_thread(mddev-&gt;sync_thread); /* possibly kick off a reshape */</div><div class='ctx'> }</div><div class='hunk'>@@ -450,7 +453,7 @@ static void submit_flushes(struct work_struct *ws)</div><div class='ctx'> 			atomic_inc(&amp;rdev-&gt;nr_pending);</div><div class='ctx'> 			atomic_inc(&amp;rdev-&gt;nr_pending);</div><div class='ctx'> 			rcu_read_unlock();</div><div class='del'>-			bi = bio_alloc_mddev(GFP_KERNEL, 0, mddev);</div><div class='add'>+			bi = bio_alloc_mddev(GFP_NOIO, 0, mddev);</div><div class='ctx'> 			bi-&gt;bi_end_io = md_end_flush;</div><div class='ctx'> 			bi-&gt;bi_private = rdev;</div><div class='ctx'> 			bi-&gt;bi_bdev = rdev-&gt;bdev;</div><div class='hunk'>@@ -605,6 +608,7 @@ void mddev_init(struct mddev *mddev)</div><div class='ctx'> 	init_waitqueue_head(&amp;mddev-&gt;sb_wait);</div><div class='ctx'> 	init_waitqueue_head(&amp;mddev-&gt;recovery_wait);</div><div class='ctx'> 	mddev-&gt;reshape_position = MaxSector;</div><div class='add'>+	mddev-&gt;reshape_backwards = 0;</div><div class='ctx'> 	mddev-&gt;resync_min = 0;</div><div class='ctx'> 	mddev-&gt;resync_max = MaxSector;</div><div class='ctx'> 	mddev-&gt;level = LEVEL_NONE;</div><div class='hunk'>@@ -800,7 +804,7 @@ static int alloc_disk_sb(struct md_rdev * rdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void free_disk_sb(struct md_rdev * rdev)</div><div class='add'>+void md_rdev_clear(struct md_rdev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	if (rdev-&gt;sb_page) {</div><div class='ctx'> 		put_page(rdev-&gt;sb_page);</div><div class='hunk'>@@ -813,8 +817,10 @@ static void free_disk_sb(struct md_rdev * rdev)</div><div class='ctx'> 		put_page(rdev-&gt;bb_page);</div><div class='ctx'> 		rdev-&gt;bb_page = NULL;</div><div class='ctx'> 	}</div><div class='add'>+	kfree(rdev-&gt;badblocks.page);</div><div class='add'>+	rdev-&gt;badblocks.page = NULL;</div><div class='ctx'> }</div><div class='del'>-</div><div class='add'>+EXPORT_SYMBOL_GPL(md_rdev_clear);</div><div class='ctx'> </div><div class='ctx'> static void super_written(struct bio *bio, int error)</div><div class='ctx'> {</div><div class='hunk'>@@ -885,6 +891,10 @@ int sync_page_io(struct md_rdev *rdev, sector_t sector, int size,</div><div class='ctx'> 		rdev-&gt;meta_bdev : rdev-&gt;bdev;</div><div class='ctx'> 	if (metadata_op)</div><div class='ctx'> 		bio-&gt;bi_sector = sector + rdev-&gt;sb_start;</div><div class='add'>+	else if (rdev-&gt;mddev-&gt;reshape_position != MaxSector &amp;&amp;</div><div class='add'>+		 (rdev-&gt;mddev-&gt;reshape_backwards ==</div><div class='add'>+		  (sector &gt;= rdev-&gt;mddev-&gt;reshape_position)))</div><div class='add'>+		bio-&gt;bi_sector = sector + rdev-&gt;new_data_offset;</div><div class='ctx'> 	else</div><div class='ctx'> 		bio-&gt;bi_sector = sector + rdev-&gt;data_offset;</div><div class='ctx'> 	bio_add_page(bio, page, size, 0);</div><div class='hunk'>@@ -1032,12 +1042,17 @@ static unsigned int calc_sb_csum(mdp_super_t * sb)</div><div class='ctx'> struct super_type  {</div><div class='ctx'> 	char		    *name;</div><div class='ctx'> 	struct module	    *owner;</div><div class='del'>-	int		    (*load_super)(struct md_rdev *rdev, struct md_rdev *refdev,</div><div class='add'>+	int		    (*load_super)(struct md_rdev *rdev,</div><div class='add'>+					  struct md_rdev *refdev,</div><div class='ctx'> 					  int minor_version);</div><div class='del'>-	int		    (*validate_super)(struct mddev *mddev, struct md_rdev *rdev);</div><div class='del'>-	void		    (*sync_super)(struct mddev *mddev, struct md_rdev *rdev);</div><div class='add'>+	int		    (*validate_super)(struct mddev *mddev,</div><div class='add'>+					      struct md_rdev *rdev);</div><div class='add'>+	void		    (*sync_super)(struct mddev *mddev,</div><div class='add'>+					  struct md_rdev *rdev);</div><div class='ctx'> 	unsigned long long  (*rdev_size_change)(struct md_rdev *rdev,</div><div class='ctx'> 						sector_t num_sectors);</div><div class='add'>+	int		    (*allow_new_offset)(struct md_rdev *rdev,</div><div class='add'>+						unsigned long long new_offset);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1109,6 +1124,7 @@ static int super_90_load(struct md_rdev *rdev, struct md_rdev *refdev, int minor</div><div class='ctx'> </div><div class='ctx'> 	rdev-&gt;preferred_minor = sb-&gt;md_minor;</div><div class='ctx'> 	rdev-&gt;data_offset = 0;</div><div class='add'>+	rdev-&gt;new_data_offset = 0;</div><div class='ctx'> 	rdev-&gt;sb_size = MD_SB_BYTES;</div><div class='ctx'> 	rdev-&gt;badblocks.shift = -1;</div><div class='ctx'> </div><div class='hunk'>@@ -1182,7 +1198,11 @@ static int super_90_validate(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> 		mddev-&gt;dev_sectors = ((sector_t)sb-&gt;size) * 2;</div><div class='ctx'> 		mddev-&gt;events = ev1;</div><div class='ctx'> 		mddev-&gt;bitmap_info.offset = 0;</div><div class='add'>+		mddev-&gt;bitmap_info.space = 0;</div><div class='add'>+		/* bitmap can use 60 K after the 4K superblocks */</div><div class='ctx'> 		mddev-&gt;bitmap_info.default_offset = MD_SB_BYTES &gt;&gt; 9;</div><div class='add'>+		mddev-&gt;bitmap_info.default_space = 64*2 - (MD_SB_BYTES &gt;&gt; 9);</div><div class='add'>+		mddev-&gt;reshape_backwards = 0;</div><div class='ctx'> </div><div class='ctx'> 		if (mddev-&gt;minor_version &gt;= 91) {</div><div class='ctx'> 			mddev-&gt;reshape_position = sb-&gt;reshape_position;</div><div class='hunk'>@@ -1190,6 +1210,8 @@ static int super_90_validate(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> 			mddev-&gt;new_level = sb-&gt;new_level;</div><div class='ctx'> 			mddev-&gt;new_layout = sb-&gt;new_layout;</div><div class='ctx'> 			mddev-&gt;new_chunk_sectors = sb-&gt;new_chunk &gt;&gt; 9;</div><div class='add'>+			if (mddev-&gt;delta_disks &lt; 0)</div><div class='add'>+				mddev-&gt;reshape_backwards = 1;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			mddev-&gt;reshape_position = MaxSector;</div><div class='ctx'> 			mddev-&gt;delta_disks = 0;</div><div class='hunk'>@@ -1216,9 +1238,12 @@ static int super_90_validate(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> 		mddev-&gt;max_disks = MD_SB_DISKS;</div><div class='ctx'> </div><div class='ctx'> 		if (sb-&gt;state &amp; (1&lt;&lt;MD_SB_BITMAP_PRESENT) &amp;&amp;</div><div class='del'>-		    mddev-&gt;bitmap_info.file == NULL)</div><div class='add'>+		    mddev-&gt;bitmap_info.file == NULL) {</div><div class='ctx'> 			mddev-&gt;bitmap_info.offset =</div><div class='ctx'> 				mddev-&gt;bitmap_info.default_offset;</div><div class='add'>+			mddev-&gt;bitmap_info.space =</div><div class='add'>+				mddev-&gt;bitmap_info.space;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 	} else if (mddev-&gt;pers == NULL) {</div><div class='ctx'> 		/* Insist on good event counter while assembling, except</div><div class='hunk'>@@ -1432,6 +1457,12 @@ super_90_rdev_size_change(struct md_rdev *rdev, sector_t num_sectors)</div><div class='ctx'> 	return num_sectors;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+super_90_allow_new_offset(struct md_rdev *rdev, unsigned long long new_offset)</div><div class='add'>+{</div><div class='add'>+	/* non-zero offset changes not possible with v0.90 */</div><div class='add'>+	return new_offset == 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * version 1 superblock</div><div class='hunk'>@@ -1467,6 +1498,7 @@ static int super_1_load(struct md_rdev *rdev, struct md_rdev *refdev, int minor_</div><div class='ctx'> 	struct mdp_superblock_1 *sb;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	sector_t sb_start;</div><div class='add'>+	sector_t sectors;</div><div class='ctx'> 	char b[BDEVNAME_SIZE], b2[BDEVNAME_SIZE];</div><div class='ctx'> 	int bmask;</div><div class='ctx'> </div><div class='hunk'>@@ -1521,9 +1553,18 @@ static int super_1_load(struct md_rdev *rdev, struct md_rdev *refdev, int minor_</div><div class='ctx'> 		       bdevname(rdev-&gt;bdev,b));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+	if (sb-&gt;pad0 ||</div><div class='add'>+	    sb-&gt;pad3[0] ||</div><div class='add'>+	    memcmp(sb-&gt;pad3, sb-&gt;pad3+1, sizeof(sb-&gt;pad3) - sizeof(sb-&gt;pad3[1])))</div><div class='add'>+		/* Some padding is non-zero, might be a new feature */</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	rdev-&gt;preferred_minor = 0xffff;</div><div class='ctx'> 	rdev-&gt;data_offset = le64_to_cpu(sb-&gt;data_offset);</div><div class='add'>+	rdev-&gt;new_data_offset = rdev-&gt;data_offset;</div><div class='add'>+	if ((le32_to_cpu(sb-&gt;feature_map) &amp; MD_FEATURE_RESHAPE_ACTIVE) &amp;&amp;</div><div class='add'>+	    (le32_to_cpu(sb-&gt;feature_map) &amp; MD_FEATURE_NEW_OFFSET))</div><div class='add'>+		rdev-&gt;new_data_offset += (s32)le32_to_cpu(sb-&gt;new_offset);</div><div class='ctx'> 	atomic_set(&amp;rdev-&gt;corrected_errors, le32_to_cpu(sb-&gt;cnt_corrected_read));</div><div class='ctx'> </div><div class='ctx'> 	rdev-&gt;sb_size = le32_to_cpu(sb-&gt;max_dev) * 2 + 256;</div><div class='hunk'>@@ -1534,6 +1575,9 @@ static int super_1_load(struct md_rdev *rdev, struct md_rdev *refdev, int minor_</div><div class='ctx'> 	if (minor_version</div><div class='ctx'> 	    &amp;&amp; rdev-&gt;data_offset &lt; sb_start + (rdev-&gt;sb_size/512))</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	if (minor_version</div><div class='add'>+	    &amp;&amp; rdev-&gt;new_data_offset &lt; sb_start + (rdev-&gt;sb_size/512))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (sb-&gt;level == cpu_to_le32(LEVEL_MULTIPATH))</div><div class='ctx'> 		rdev-&gt;desc_nr = -1;</div><div class='hunk'>@@ -1605,16 +1649,14 @@ static int super_1_load(struct md_rdev *rdev, struct md_rdev *refdev, int minor_</div><div class='ctx'> 		else</div><div class='ctx'> 			ret = 0;</div><div class='ctx'> 	}</div><div class='del'>-	if (minor_version)</div><div class='del'>-		rdev-&gt;sectors = (i_size_read(rdev-&gt;bdev-&gt;bd_inode) &gt;&gt; 9) -</div><div class='del'>-			le64_to_cpu(sb-&gt;data_offset);</div><div class='del'>-	else</div><div class='del'>-		rdev-&gt;sectors = rdev-&gt;sb_start;</div><div class='del'>-	if (rdev-&gt;sectors &lt; le64_to_cpu(sb-&gt;data_size))</div><div class='add'>+	if (minor_version) {</div><div class='add'>+		sectors = (i_size_read(rdev-&gt;bdev-&gt;bd_inode) &gt;&gt; 9);</div><div class='add'>+		sectors -= rdev-&gt;data_offset;</div><div class='add'>+	} else</div><div class='add'>+		sectors = rdev-&gt;sb_start;</div><div class='add'>+	if (sectors &lt; le64_to_cpu(sb-&gt;data_size))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	rdev-&gt;sectors = le64_to_cpu(sb-&gt;data_size);</div><div class='del'>-	if (le64_to_cpu(sb-&gt;size) &gt; rdev-&gt;sectors)</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1642,17 +1684,37 @@ static int super_1_validate(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> 		mddev-&gt;dev_sectors = le64_to_cpu(sb-&gt;size);</div><div class='ctx'> 		mddev-&gt;events = ev1;</div><div class='ctx'> 		mddev-&gt;bitmap_info.offset = 0;</div><div class='add'>+		mddev-&gt;bitmap_info.space = 0;</div><div class='add'>+		/* Default location for bitmap is 1K after superblock</div><div class='add'>+		 * using 3K - total of 4K</div><div class='add'>+		 */</div><div class='ctx'> 		mddev-&gt;bitmap_info.default_offset = 1024 &gt;&gt; 9;</div><div class='del'>-		</div><div class='add'>+		mddev-&gt;bitmap_info.default_space = (4096-1024) &gt;&gt; 9;</div><div class='add'>+		mddev-&gt;reshape_backwards = 0;</div><div class='add'>+</div><div class='ctx'> 		mddev-&gt;recovery_cp = le64_to_cpu(sb-&gt;resync_offset);</div><div class='ctx'> 		memcpy(mddev-&gt;uuid, sb-&gt;set_uuid, 16);</div><div class='ctx'> </div><div class='ctx'> 		mddev-&gt;max_disks =  (4096-256)/2;</div><div class='ctx'> </div><div class='ctx'> 		if ((le32_to_cpu(sb-&gt;feature_map) &amp; MD_FEATURE_BITMAP_OFFSET) &amp;&amp;</div><div class='del'>-		    mddev-&gt;bitmap_info.file == NULL )</div><div class='add'>+		    mddev-&gt;bitmap_info.file == NULL) {</div><div class='ctx'> 			mddev-&gt;bitmap_info.offset =</div><div class='ctx'> 				(__s32)le32_to_cpu(sb-&gt;bitmap_offset);</div><div class='add'>+			/* Metadata doesn't record how much space is available.</div><div class='add'>+			 * For 1.0, we assume we can use up to the superblock</div><div class='add'>+			 * if before, else to 4K beyond superblock.</div><div class='add'>+			 * For others, assume no change is possible.</div><div class='add'>+			 */</div><div class='add'>+			if (mddev-&gt;minor_version &gt; 0)</div><div class='add'>+				mddev-&gt;bitmap_info.space = 0;</div><div class='add'>+			else if (mddev-&gt;bitmap_info.offset &gt; 0)</div><div class='add'>+				mddev-&gt;bitmap_info.space =</div><div class='add'>+					8 - mddev-&gt;bitmap_info.offset;</div><div class='add'>+			else</div><div class='add'>+				mddev-&gt;bitmap_info.space =</div><div class='add'>+					-mddev-&gt;bitmap_info.offset;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if ((le32_to_cpu(sb-&gt;feature_map) &amp; MD_FEATURE_RESHAPE_ACTIVE)) {</div><div class='ctx'> 			mddev-&gt;reshape_position = le64_to_cpu(sb-&gt;reshape_position);</div><div class='hunk'>@@ -1660,6 +1722,11 @@ static int super_1_validate(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> 			mddev-&gt;new_level = le32_to_cpu(sb-&gt;new_level);</div><div class='ctx'> 			mddev-&gt;new_layout = le32_to_cpu(sb-&gt;new_layout);</div><div class='ctx'> 			mddev-&gt;new_chunk_sectors = le32_to_cpu(sb-&gt;new_chunk);</div><div class='add'>+			if (mddev-&gt;delta_disks &lt; 0 ||</div><div class='add'>+			    (mddev-&gt;delta_disks == 0 &amp;&amp;</div><div class='add'>+			     (le32_to_cpu(sb-&gt;feature_map)</div><div class='add'>+			      &amp; MD_FEATURE_RESHAPE_BACKWARDS)))</div><div class='add'>+				mddev-&gt;reshape_backwards = 1;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			mddev-&gt;reshape_position = MaxSector;</div><div class='ctx'> 			mddev-&gt;delta_disks = 0;</div><div class='hunk'>@@ -1733,7 +1800,6 @@ static void super_1_sync(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> 	sb-&gt;feature_map = 0;</div><div class='ctx'> 	sb-&gt;pad0 = 0;</div><div class='ctx'> 	sb-&gt;recovery_offset = cpu_to_le64(0);</div><div class='del'>-	memset(sb-&gt;pad1, 0, sizeof(sb-&gt;pad1));</div><div class='ctx'> 	memset(sb-&gt;pad3, 0, sizeof(sb-&gt;pad3));</div><div class='ctx'> </div><div class='ctx'> 	sb-&gt;utime = cpu_to_le64((__u64)mddev-&gt;utime);</div><div class='hunk'>@@ -1755,6 +1821,8 @@ static void super_1_sync(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> 		sb-&gt;devflags |= WriteMostly1;</div><div class='ctx'> 	else</div><div class='ctx'> 		sb-&gt;devflags &amp;= ~WriteMostly1;</div><div class='add'>+	sb-&gt;data_offset = cpu_to_le64(rdev-&gt;data_offset);</div><div class='add'>+	sb-&gt;data_size = cpu_to_le64(rdev-&gt;sectors);</div><div class='ctx'> </div><div class='ctx'> 	if (mddev-&gt;bitmap &amp;&amp; mddev-&gt;bitmap_info.file == NULL) {</div><div class='ctx'> 		sb-&gt;bitmap_offset = cpu_to_le32((__u32)mddev-&gt;bitmap_info.offset);</div><div class='hunk'>@@ -1779,6 +1847,16 @@ static void super_1_sync(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> 		sb-&gt;delta_disks = cpu_to_le32(mddev-&gt;delta_disks);</div><div class='ctx'> 		sb-&gt;new_level = cpu_to_le32(mddev-&gt;new_level);</div><div class='ctx'> 		sb-&gt;new_chunk = cpu_to_le32(mddev-&gt;new_chunk_sectors);</div><div class='add'>+		if (mddev-&gt;delta_disks == 0 &amp;&amp;</div><div class='add'>+		    mddev-&gt;reshape_backwards)</div><div class='add'>+			sb-&gt;feature_map</div><div class='add'>+				|= cpu_to_le32(MD_FEATURE_RESHAPE_BACKWARDS);</div><div class='add'>+		if (rdev-&gt;new_data_offset != rdev-&gt;data_offset) {</div><div class='add'>+			sb-&gt;feature_map</div><div class='add'>+				|= cpu_to_le32(MD_FEATURE_NEW_OFFSET);</div><div class='add'>+			sb-&gt;new_offset = cpu_to_le32((__u32)(rdev-&gt;new_data_offset</div><div class='add'>+							     - rdev-&gt;data_offset));</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rdev-&gt;badblocks.count == 0)</div><div class='hunk'>@@ -1855,6 +1933,8 @@ super_1_rdev_size_change(struct md_rdev *rdev, sector_t num_sectors)</div><div class='ctx'> 	sector_t max_sectors;</div><div class='ctx'> 	if (num_sectors &amp;&amp; num_sectors &lt; rdev-&gt;mddev-&gt;dev_sectors)</div><div class='ctx'> 		return 0; /* component must fit device */</div><div class='add'>+	if (rdev-&gt;data_offset != rdev-&gt;new_data_offset)</div><div class='add'>+		return 0; /* too confusing */</div><div class='ctx'> 	if (rdev-&gt;sb_start &lt; rdev-&gt;data_offset) {</div><div class='ctx'> 		/* minor versions 1 and 2; superblock before data */</div><div class='ctx'> 		max_sectors = i_size_read(rdev-&gt;bdev-&gt;bd_inode) &gt;&gt; 9;</div><div class='hunk'>@@ -1882,6 +1962,40 @@ super_1_rdev_size_change(struct md_rdev *rdev, sector_t num_sectors)</div><div class='ctx'> 		       rdev-&gt;sb_page);</div><div class='ctx'> 	md_super_wait(rdev-&gt;mddev);</div><div class='ctx'> 	return num_sectors;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+super_1_allow_new_offset(struct md_rdev *rdev,</div><div class='add'>+			 unsigned long long new_offset)</div><div class='add'>+{</div><div class='add'>+	/* All necessary checks on new &gt;= old have been done */</div><div class='add'>+	struct bitmap *bitmap;</div><div class='add'>+	if (new_offset &gt;= rdev-&gt;data_offset)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	/* with 1.0 metadata, there is no metadata to tread on</div><div class='add'>+	 * so we can always move back */</div><div class='add'>+	if (rdev-&gt;mddev-&gt;minor_version == 0)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	/* otherwise we must be sure not to step on</div><div class='add'>+	 * any metadata, so stay:</div><div class='add'>+	 * 36K beyond start of superblock</div><div class='add'>+	 * beyond end of badblocks</div><div class='add'>+	 * beyond write-intent bitmap</div><div class='add'>+	 */</div><div class='add'>+	if (rdev-&gt;sb_start + (32+4)*2 &gt; new_offset)</div><div class='add'>+		return 0;</div><div class='add'>+	bitmap = rdev-&gt;mddev-&gt;bitmap;</div><div class='add'>+	if (bitmap &amp;&amp; !rdev-&gt;mddev-&gt;bitmap_info.file &amp;&amp;</div><div class='add'>+	    rdev-&gt;sb_start + rdev-&gt;mddev-&gt;bitmap_info.offset +</div><div class='add'>+	    bitmap-&gt;storage.file_pages * (PAGE_SIZE&gt;&gt;9) &gt; new_offset)</div><div class='add'>+		return 0;</div><div class='add'>+	if (rdev-&gt;badblocks.sector + rdev-&gt;badblocks.size &gt; new_offset)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct super_type super_types[] = {</div><div class='hunk'>@@ -1892,6 +2006,7 @@ static struct super_type super_types[] = {</div><div class='ctx'> 		.validate_super	    = super_90_validate,</div><div class='ctx'> 		.sync_super	    = super_90_sync,</div><div class='ctx'> 		.rdev_size_change   = super_90_rdev_size_change,</div><div class='add'>+		.allow_new_offset   = super_90_allow_new_offset,</div><div class='ctx'> 	},</div><div class='ctx'> 	[1] = {</div><div class='ctx'> 		.name	= "md-1",</div><div class='hunk'>@@ -1900,6 +2015,7 @@ static struct super_type super_types[] = {</div><div class='ctx'> 		.validate_super	    = super_1_validate,</div><div class='ctx'> 		.sync_super	    = super_1_sync,</div><div class='ctx'> 		.rdev_size_change   = super_1_rdev_size_change,</div><div class='add'>+		.allow_new_offset   = super_1_allow_new_offset,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -2103,9 +2219,7 @@ static void unbind_rdev_from_array(struct md_rdev * rdev)</div><div class='ctx'> 	sysfs_remove_link(&amp;rdev-&gt;kobj, "block");</div><div class='ctx'> 	sysfs_put(rdev-&gt;sysfs_state);</div><div class='ctx'> 	rdev-&gt;sysfs_state = NULL;</div><div class='del'>-	kfree(rdev-&gt;badblocks.page);</div><div class='ctx'> 	rdev-&gt;badblocks.count = 0;</div><div class='del'>-	rdev-&gt;badblocks.page = NULL;</div><div class='ctx'> 	/* We need to delay this, otherwise we can deadlock when</div><div class='ctx'> 	 * writing to 'remove' to "dev/state".  We also need</div><div class='ctx'> 	 * to delay it due to rcu usage.</div><div class='hunk'>@@ -2156,7 +2270,7 @@ static void export_rdev(struct md_rdev * rdev)</div><div class='ctx'> 		bdevname(rdev-&gt;bdev,b));</div><div class='ctx'> 	if (rdev-&gt;mddev)</div><div class='ctx'> 		MD_BUG();</div><div class='del'>-	free_disk_sb(rdev);</div><div class='add'>+	md_rdev_clear(rdev);</div><div class='ctx'> #ifndef MODULE</div><div class='ctx'> 	if (test_bit(AutoDetected, &amp;rdev-&gt;flags))</div><div class='ctx'> 		md_autodetect_dev(rdev-&gt;bdev-&gt;bd_dev);</div><div class='hunk'>@@ -2807,9 +2921,8 @@ offset_show(struct md_rdev *rdev, char *page)</div><div class='ctx'> static ssize_t</div><div class='ctx'> offset_store(struct md_rdev *rdev, const char *buf, size_t len)</div><div class='ctx'> {</div><div class='del'>-	char *e;</div><div class='del'>-	unsigned long long offset = simple_strtoull(buf, &amp;e, 10);</div><div class='del'>-	if (e==buf || (*e &amp;&amp; *e != '\n'))</div><div class='add'>+	unsigned long long offset;</div><div class='add'>+	if (strict_strtoull(buf, 10, &amp;offset) &lt; 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (rdev-&gt;mddev-&gt;pers &amp;&amp; rdev-&gt;raid_disk &gt;= 0)</div><div class='ctx'> 		return -EBUSY;</div><div class='hunk'>@@ -2824,6 +2937,63 @@ offset_store(struct md_rdev *rdev, const char *buf, size_t len)</div><div class='ctx'> static struct rdev_sysfs_entry rdev_offset =</div><div class='ctx'> __ATTR(offset, S_IRUGO|S_IWUSR, offset_show, offset_store);</div><div class='ctx'> </div><div class='add'>+static ssize_t new_offset_show(struct md_rdev *rdev, char *page)</div><div class='add'>+{</div><div class='add'>+	return sprintf(page, "%llu\n",</div><div class='add'>+		       (unsigned long long)rdev-&gt;new_data_offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t new_offset_store(struct md_rdev *rdev,</div><div class='add'>+				const char *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	unsigned long long new_offset;</div><div class='add'>+	struct mddev *mddev = rdev-&gt;mddev;</div><div class='add'>+</div><div class='add'>+	if (strict_strtoull(buf, 10, &amp;new_offset) &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (mddev-&gt;sync_thread)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	if (new_offset == rdev-&gt;data_offset)</div><div class='add'>+		/* reset is always permitted */</div><div class='add'>+		;</div><div class='add'>+	else if (new_offset &gt; rdev-&gt;data_offset) {</div><div class='add'>+		/* must not push array size beyond rdev_sectors */</div><div class='add'>+		if (new_offset - rdev-&gt;data_offset</div><div class='add'>+		    + mddev-&gt;dev_sectors &gt; rdev-&gt;sectors)</div><div class='add'>+				return -E2BIG;</div><div class='add'>+	}</div><div class='add'>+	/* Metadata worries about other space details. */</div><div class='add'>+</div><div class='add'>+	/* decreasing the offset is inconsistent with a backwards</div><div class='add'>+	 * reshape.</div><div class='add'>+	 */</div><div class='add'>+	if (new_offset &lt; rdev-&gt;data_offset &amp;&amp;</div><div class='add'>+	    mddev-&gt;reshape_backwards)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	/* Increasing offset is inconsistent with forwards</div><div class='add'>+	 * reshape.  reshape_direction should be set to</div><div class='add'>+	 * 'backwards' first.</div><div class='add'>+	 */</div><div class='add'>+	if (new_offset &gt; rdev-&gt;data_offset &amp;&amp;</div><div class='add'>+	    !mddev-&gt;reshape_backwards)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (mddev-&gt;pers &amp;&amp; mddev-&gt;persistent &amp;&amp;</div><div class='add'>+	    !super_types[mddev-&gt;major_version]</div><div class='add'>+	    .allow_new_offset(rdev, new_offset))</div><div class='add'>+		return -E2BIG;</div><div class='add'>+	rdev-&gt;new_data_offset = new_offset;</div><div class='add'>+	if (new_offset &gt; rdev-&gt;data_offset)</div><div class='add'>+		mddev-&gt;reshape_backwards = 1;</div><div class='add'>+	else if (new_offset &lt; rdev-&gt;data_offset)</div><div class='add'>+		mddev-&gt;reshape_backwards = 0;</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+static struct rdev_sysfs_entry rdev_new_offset =</div><div class='add'>+__ATTR(new_offset, S_IRUGO|S_IWUSR, new_offset_show, new_offset_store);</div><div class='add'>+</div><div class='ctx'> static ssize_t</div><div class='ctx'> rdev_size_show(struct md_rdev *rdev, char *page)</div><div class='ctx'> {</div><div class='hunk'>@@ -2868,6 +3038,8 @@ rdev_size_store(struct md_rdev *rdev, const char *buf, size_t len)</div><div class='ctx'> </div><div class='ctx'> 	if (strict_blocks_to_sectors(buf, &amp;sectors) &lt; 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	if (rdev-&gt;data_offset != rdev-&gt;new_data_offset)</div><div class='add'>+		return -EINVAL; /* too confusing */</div><div class='ctx'> 	if (my_mddev-&gt;pers &amp;&amp; rdev-&gt;raid_disk &gt;= 0) {</div><div class='ctx'> 		if (my_mddev-&gt;persistent) {</div><div class='ctx'> 			sectors = super_types[my_mddev-&gt;major_version].</div><div class='hunk'>@@ -3004,6 +3176,7 @@ static struct attribute *rdev_default_attrs[] = {</div><div class='ctx'> 	&amp;rdev_errors.attr,</div><div class='ctx'> 	&amp;rdev_slot.attr,</div><div class='ctx'> 	&amp;rdev_offset.attr,</div><div class='add'>+	&amp;rdev_new_offset.attr,</div><div class='ctx'> 	&amp;rdev_size.attr,</div><div class='ctx'> 	&amp;rdev_recovery_start.attr,</div><div class='ctx'> 	&amp;rdev_bad_blocks.attr,</div><div class='hunk'>@@ -3078,6 +3251,7 @@ int md_rdev_init(struct md_rdev *rdev)</div><div class='ctx'> 	rdev-&gt;raid_disk = -1;</div><div class='ctx'> 	rdev-&gt;flags = 0;</div><div class='ctx'> 	rdev-&gt;data_offset = 0;</div><div class='add'>+	rdev-&gt;new_data_offset = 0;</div><div class='ctx'> 	rdev-&gt;sb_events = 0;</div><div class='ctx'> 	rdev-&gt;last_read_error.tv_sec  = 0;</div><div class='ctx'> 	rdev-&gt;last_read_error.tv_nsec = 0;</div><div class='hunk'>@@ -3176,8 +3350,7 @@ static struct md_rdev *md_import_device(dev_t newdev, int super_format, int supe</div><div class='ctx'> abort_free:</div><div class='ctx'> 	if (rdev-&gt;bdev)</div><div class='ctx'> 		unlock_rdev(rdev);</div><div class='del'>-	free_disk_sb(rdev);</div><div class='del'>-	kfree(rdev-&gt;badblocks.page);</div><div class='add'>+	md_rdev_clear(rdev);</div><div class='ctx'> 	kfree(rdev);</div><div class='ctx'> 	return ERR_PTR(err);</div><div class='ctx'> }</div><div class='hunk'>@@ -3417,6 +3590,7 @@ level_store(struct mddev *mddev, const char *buf, size_t len)</div><div class='ctx'> 		mddev-&gt;new_chunk_sectors = mddev-&gt;chunk_sectors;</div><div class='ctx'> 		mddev-&gt;raid_disks -= mddev-&gt;delta_disks;</div><div class='ctx'> 		mddev-&gt;delta_disks = 0;</div><div class='add'>+		mddev-&gt;reshape_backwards = 0;</div><div class='ctx'> 		module_put(pers-&gt;owner);</div><div class='ctx'> 		printk(KERN_WARNING "md: %s: %s would not accept array\n",</div><div class='ctx'> 		       mdname(mddev), clevel);</div><div class='hunk'>@@ -3490,6 +3664,7 @@ level_store(struct mddev *mddev, const char *buf, size_t len)</div><div class='ctx'> 	mddev-&gt;layout = mddev-&gt;new_layout;</div><div class='ctx'> 	mddev-&gt;chunk_sectors = mddev-&gt;new_chunk_sectors;</div><div class='ctx'> 	mddev-&gt;delta_disks = 0;</div><div class='add'>+	mddev-&gt;reshape_backwards = 0;</div><div class='ctx'> 	mddev-&gt;degraded = 0;</div><div class='ctx'> 	if (mddev-&gt;pers-&gt;sync_request == NULL) {</div><div class='ctx'> 		/* this is now an array without redundancy, so</div><div class='hunk'>@@ -3499,10 +3674,8 @@ level_store(struct mddev *mddev, const char *buf, size_t len)</div><div class='ctx'> 		del_timer_sync(&amp;mddev-&gt;safemode_timer);</div><div class='ctx'> 	}</div><div class='ctx'> 	pers-&gt;run(mddev);</div><div class='del'>-	mddev_resume(mddev);</div><div class='ctx'> 	set_bit(MD_CHANGE_DEVS, &amp;mddev-&gt;flags);</div><div class='del'>-	set_bit(MD_RECOVERY_NEEDED, &amp;mddev-&gt;recovery);</div><div class='del'>-	md_wakeup_thread(mddev-&gt;thread);</div><div class='add'>+	mddev_resume(mddev);</div><div class='ctx'> 	sysfs_notify(&amp;mddev-&gt;kobj, NULL, "level");</div><div class='ctx'> 	md_new_event(mddev);</div><div class='ctx'> 	return rv;</div><div class='hunk'>@@ -3580,9 +3753,20 @@ raid_disks_store(struct mddev *mddev, const char *buf, size_t len)</div><div class='ctx'> 	if (mddev-&gt;pers)</div><div class='ctx'> 		rv = update_raid_disks(mddev, n);</div><div class='ctx'> 	else if (mddev-&gt;reshape_position != MaxSector) {</div><div class='add'>+		struct md_rdev *rdev;</div><div class='ctx'> 		int olddisks = mddev-&gt;raid_disks - mddev-&gt;delta_disks;</div><div class='add'>+</div><div class='add'>+		rdev_for_each(rdev, mddev) {</div><div class='add'>+			if (olddisks &lt; n &amp;&amp;</div><div class='add'>+			    rdev-&gt;data_offset &lt; rdev-&gt;new_data_offset)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			if (olddisks &gt; n &amp;&amp;</div><div class='add'>+			    rdev-&gt;data_offset &gt; rdev-&gt;new_data_offset)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> 		mddev-&gt;delta_disks = n - olddisks;</div><div class='ctx'> 		mddev-&gt;raid_disks = n;</div><div class='add'>+		mddev-&gt;reshape_backwards = (mddev-&gt;delta_disks &lt; 0);</div><div class='ctx'> 	} else</div><div class='ctx'> 		mddev-&gt;raid_disks = n;</div><div class='ctx'> 	return rv ? rv : len;</div><div class='hunk'>@@ -4264,7 +4448,8 @@ sync_completed_show(struct mddev *mddev, char *page)</div><div class='ctx'> 	if (!test_bit(MD_RECOVERY_RUNNING, &amp;mddev-&gt;recovery))</div><div class='ctx'> 		return sprintf(page, "none\n");</div><div class='ctx'> </div><div class='del'>-	if (test_bit(MD_RECOVERY_SYNC, &amp;mddev-&gt;recovery))</div><div class='add'>+	if (test_bit(MD_RECOVERY_SYNC, &amp;mddev-&gt;recovery) ||</div><div class='add'>+	    test_bit(MD_RECOVERY_RESHAPE, &amp;mddev-&gt;recovery))</div><div class='ctx'> 		max_sectors = mddev-&gt;resync_max_sectors;</div><div class='ctx'> 	else</div><div class='ctx'> 		max_sectors = mddev-&gt;dev_sectors;</div><div class='hunk'>@@ -4426,6 +4611,7 @@ reshape_position_show(struct mddev *mddev, char *page)</div><div class='ctx'> static ssize_t</div><div class='ctx'> reshape_position_store(struct mddev *mddev, const char *buf, size_t len)</div><div class='ctx'> {</div><div class='add'>+	struct md_rdev *rdev;</div><div class='ctx'> 	char *e;</div><div class='ctx'> 	unsigned long long new = simple_strtoull(buf, &amp;e, 10);</div><div class='ctx'> 	if (mddev-&gt;pers)</div><div class='hunk'>@@ -4434,9 +4620,12 @@ reshape_position_store(struct mddev *mddev, const char *buf, size_t len)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	mddev-&gt;reshape_position = new;</div><div class='ctx'> 	mddev-&gt;delta_disks = 0;</div><div class='add'>+	mddev-&gt;reshape_backwards = 0;</div><div class='ctx'> 	mddev-&gt;new_level = mddev-&gt;level;</div><div class='ctx'> 	mddev-&gt;new_layout = mddev-&gt;layout;</div><div class='ctx'> 	mddev-&gt;new_chunk_sectors = mddev-&gt;chunk_sectors;</div><div class='add'>+	rdev_for_each(rdev, mddev)</div><div class='add'>+		rdev-&gt;new_data_offset = rdev-&gt;data_offset;</div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4445,6 +4634,42 @@ __ATTR(reshape_position, S_IRUGO|S_IWUSR, reshape_position_show,</div><div class='ctx'>        reshape_position_store);</div><div class='ctx'> </div><div class='ctx'> static ssize_t</div><div class='add'>+reshape_direction_show(struct mddev *mddev, char *page)</div><div class='add'>+{</div><div class='add'>+	return sprintf(page, "%s\n",</div><div class='add'>+		       mddev-&gt;reshape_backwards ? "backwards" : "forwards");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+reshape_direction_store(struct mddev *mddev, const char *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	int backwards = 0;</div><div class='add'>+	if (cmd_match(buf, "forwards"))</div><div class='add'>+		backwards = 0;</div><div class='add'>+	else if (cmd_match(buf, "backwards"))</div><div class='add'>+		backwards = 1;</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (mddev-&gt;reshape_backwards == backwards)</div><div class='add'>+		return len;</div><div class='add'>+</div><div class='add'>+	/* check if we are allowed to change */</div><div class='add'>+	if (mddev-&gt;delta_disks)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (mddev-&gt;persistent &amp;&amp;</div><div class='add'>+	    mddev-&gt;major_version == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mddev-&gt;reshape_backwards = backwards;</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct md_sysfs_entry md_reshape_direction =</div><div class='add'>+__ATTR(reshape_direction, S_IRUGO|S_IWUSR, reshape_direction_show,</div><div class='add'>+       reshape_direction_store);</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='ctx'> array_size_show(struct mddev *mddev, char *page)</div><div class='ctx'> {</div><div class='ctx'> 	if (mddev-&gt;external_size)</div><div class='hunk'>@@ -4499,6 +4724,7 @@ static struct attribute *md_default_attrs[] = {</div><div class='ctx'> 	&amp;md_safe_delay.attr,</div><div class='ctx'> 	&amp;md_array_state.attr,</div><div class='ctx'> 	&amp;md_reshape_position.attr,</div><div class='add'>+	&amp;md_reshape_direction.attr,</div><div class='ctx'> 	&amp;md_array_size.attr,</div><div class='ctx'> 	&amp;max_corr_read_errors.attr,</div><div class='ctx'> 	NULL,</div><div class='hunk'>@@ -4912,7 +5138,8 @@ int md_run(struct mddev *mddev)</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		mddev-&gt;pers-&gt;stop(mddev);</div><div class='ctx'> 	}</div><div class='del'>-	if (err == 0 &amp;&amp; mddev-&gt;pers-&gt;sync_request) {</div><div class='add'>+	if (err == 0 &amp;&amp; mddev-&gt;pers-&gt;sync_request &amp;&amp;</div><div class='add'>+	    (mddev-&gt;bitmap_info.file || mddev-&gt;bitmap_info.offset)) {</div><div class='ctx'> 		err = bitmap_create(mddev);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			printk(KERN_ERR "%s: failed to create bitmap (%d)\n",</div><div class='hunk'>@@ -5062,6 +5289,7 @@ static void md_clean(struct mddev *mddev)</div><div class='ctx'> 	mddev-&gt;events = 0;</div><div class='ctx'> 	mddev-&gt;can_decrease_events = 0;</div><div class='ctx'> 	mddev-&gt;delta_disks = 0;</div><div class='add'>+	mddev-&gt;reshape_backwards = 0;</div><div class='ctx'> 	mddev-&gt;new_level = LEVEL_NONE;</div><div class='ctx'> 	mddev-&gt;new_layout = 0;</div><div class='ctx'> 	mddev-&gt;new_chunk_sectors = 0;</div><div class='hunk'>@@ -5077,6 +5305,7 @@ static void md_clean(struct mddev *mddev)</div><div class='ctx'> 	mddev-&gt;merge_check_needed = 0;</div><div class='ctx'> 	mddev-&gt;bitmap_info.offset = 0;</div><div class='ctx'> 	mddev-&gt;bitmap_info.default_offset = 0;</div><div class='add'>+	mddev-&gt;bitmap_info.default_space = 0;</div><div class='ctx'> 	mddev-&gt;bitmap_info.chunksize = 0;</div><div class='ctx'> 	mddev-&gt;bitmap_info.daemon_sleep = 0;</div><div class='ctx'> 	mddev-&gt;bitmap_info.max_write_behind = 0;</div><div class='hunk'>@@ -5419,7 +5648,7 @@ static int get_bitmap_file(struct mddev * mddev, void __user * arg)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/* bitmap disabled, zero the first byte and copy out */</div><div class='del'>-	if (!mddev-&gt;bitmap || !mddev-&gt;bitmap-&gt;file) {</div><div class='add'>+	if (!mddev-&gt;bitmap || !mddev-&gt;bitmap-&gt;storage.file) {</div><div class='ctx'> 		file-&gt;pathname[0] = '\0';</div><div class='ctx'> 		goto copy_out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5428,7 +5657,8 @@ static int get_bitmap_file(struct mddev * mddev, void __user * arg)</div><div class='ctx'> 	if (!buf)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	ptr = d_path(&amp;mddev-&gt;bitmap-&gt;file-&gt;f_path, buf, sizeof(file-&gt;pathname));</div><div class='add'>+	ptr = d_path(&amp;mddev-&gt;bitmap-&gt;storage.file-&gt;f_path,</div><div class='add'>+		     buf, sizeof(file-&gt;pathname));</div><div class='ctx'> 	if (IS_ERR(ptr))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -5873,6 +6103,7 @@ static int set_array_info(struct mddev * mddev, mdu_array_info_t *info)</div><div class='ctx'> 	set_bit(MD_CHANGE_DEVS, &amp;mddev-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	mddev-&gt;bitmap_info.default_offset = MD_SB_BYTES &gt;&gt; 9;</div><div class='add'>+	mddev-&gt;bitmap_info.default_space = 64*2 - (MD_SB_BYTES &gt;&gt; 9);</div><div class='ctx'> 	mddev-&gt;bitmap_info.offset = 0;</div><div class='ctx'> </div><div class='ctx'> 	mddev-&gt;reshape_position = MaxSector;</div><div class='hunk'>@@ -5886,6 +6117,7 @@ static int set_array_info(struct mddev * mddev, mdu_array_info_t *info)</div><div class='ctx'> 	mddev-&gt;new_chunk_sectors = mddev-&gt;chunk_sectors;</div><div class='ctx'> 	mddev-&gt;new_layout = mddev-&gt;layout;</div><div class='ctx'> 	mddev-&gt;delta_disks = 0;</div><div class='add'>+	mddev-&gt;reshape_backwards = 0;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -5920,11 +6152,7 @@ static int update_size(struct mddev *mddev, sector_t num_sectors)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (mddev-&gt;sync_thread)</div><div class='ctx'> 		return -EBUSY;</div><div class='del'>-	if (mddev-&gt;bitmap)</div><div class='del'>-		/* Sorry, cannot grow a bitmap yet, just remove it,</div><div class='del'>-		 * grow, and re-add.</div><div class='del'>-		 */</div><div class='del'>-		return -EBUSY;</div><div class='add'>+</div><div class='ctx'> 	rdev_for_each(rdev, mddev) {</div><div class='ctx'> 		sector_t avail = rdev-&gt;sectors;</div><div class='ctx'> </div><div class='hunk'>@@ -5942,6 +6170,7 @@ static int update_size(struct mddev *mddev, sector_t num_sectors)</div><div class='ctx'> static int update_raid_disks(struct mddev *mddev, int raid_disks)</div><div class='ctx'> {</div><div class='ctx'> 	int rv;</div><div class='add'>+	struct md_rdev *rdev;</div><div class='ctx'> 	/* change the number of raid disks */</div><div class='ctx'> 	if (mddev-&gt;pers-&gt;check_reshape == NULL)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -5950,11 +6179,27 @@ static int update_raid_disks(struct mddev *mddev, int raid_disks)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (mddev-&gt;sync_thread || mddev-&gt;reshape_position != MaxSector)</div><div class='ctx'> 		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	rdev_for_each(rdev, mddev) {</div><div class='add'>+		if (mddev-&gt;raid_disks &lt; raid_disks &amp;&amp;</div><div class='add'>+		    rdev-&gt;data_offset &lt; rdev-&gt;new_data_offset)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		if (mddev-&gt;raid_disks &gt; raid_disks &amp;&amp;</div><div class='add'>+		    rdev-&gt;data_offset &gt; rdev-&gt;new_data_offset)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mddev-&gt;delta_disks = raid_disks - mddev-&gt;raid_disks;</div><div class='add'>+	if (mddev-&gt;delta_disks &lt; 0)</div><div class='add'>+		mddev-&gt;reshape_backwards = 1;</div><div class='add'>+	else if (mddev-&gt;delta_disks &gt; 0)</div><div class='add'>+		mddev-&gt;reshape_backwards = 0;</div><div class='ctx'> </div><div class='ctx'> 	rv = mddev-&gt;pers-&gt;check_reshape(mddev);</div><div class='del'>-	if (rv &lt; 0)</div><div class='add'>+	if (rv &lt; 0) {</div><div class='ctx'> 		mddev-&gt;delta_disks = 0;</div><div class='add'>+		mddev-&gt;reshape_backwards = 0;</div><div class='add'>+	}</div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6037,6 +6282,8 @@ static int update_array_info(struct mddev *mddev, mdu_array_info_t *info)</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 			mddev-&gt;bitmap_info.offset =</div><div class='ctx'> 				mddev-&gt;bitmap_info.default_offset;</div><div class='add'>+			mddev-&gt;bitmap_info.space =</div><div class='add'>+				mddev-&gt;bitmap_info.default_space;</div><div class='ctx'> 			mddev-&gt;pers-&gt;quiesce(mddev, 1);</div><div class='ctx'> 			rv = bitmap_create(mddev);</div><div class='ctx'> 			if (!rv)</div><div class='hunk'>@@ -6048,7 +6295,7 @@ static int update_array_info(struct mddev *mddev, mdu_array_info_t *info)</div><div class='ctx'> 			/* remove the bitmap */</div><div class='ctx'> 			if (!mddev-&gt;bitmap)</div><div class='ctx'> 				return -ENOENT;</div><div class='del'>-			if (mddev-&gt;bitmap-&gt;file)</div><div class='add'>+			if (mddev-&gt;bitmap-&gt;storage.file)</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 			mddev-&gt;pers-&gt;quiesce(mddev, 1);</div><div class='ctx'> 			bitmap_destroy(mddev);</div><div class='hunk'>@@ -6371,6 +6618,9 @@ static int md_open(struct block_device *bdev, fmode_t mode)</div><div class='ctx'> 	struct mddev *mddev = mddev_find(bdev-&gt;bd_dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (!mddev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	if (mddev-&gt;gendisk != bdev-&gt;bd_disk) {</div><div class='ctx'> 		/* we are racing with mddev_put which is discarding this</div><div class='ctx'> 		 * bd_disk.</div><div class='hunk'>@@ -6582,7 +6832,8 @@ static void status_resync(struct seq_file *seq, struct mddev * mddev)</div><div class='ctx'> </div><div class='ctx'> 	resync = mddev-&gt;curr_resync - atomic_read(&amp;mddev-&gt;recovery_active);</div><div class='ctx'> </div><div class='del'>-	if (test_bit(MD_RECOVERY_SYNC, &amp;mddev-&gt;recovery))</div><div class='add'>+	if (test_bit(MD_RECOVERY_SYNC, &amp;mddev-&gt;recovery) ||</div><div class='add'>+	    test_bit(MD_RECOVERY_RESHAPE, &amp;mddev-&gt;recovery))</div><div class='ctx'> 		max_sectors = mddev-&gt;resync_max_sectors;</div><div class='ctx'> 	else</div><div class='ctx'> 		max_sectors = mddev-&gt;dev_sectors;</div><div class='hunk'>@@ -7145,7 +7396,7 @@ void md_do_sync(struct mddev *mddev)</div><div class='ctx'> 			j = mddev-&gt;recovery_cp;</div><div class='ctx'> </div><div class='ctx'> 	} else if (test_bit(MD_RECOVERY_RESHAPE, &amp;mddev-&gt;recovery))</div><div class='del'>-		max_sectors = mddev-&gt;dev_sectors;</div><div class='add'>+		max_sectors = mddev-&gt;resync_max_sectors;</div><div class='ctx'> 	else {</div><div class='ctx'> 		/* recovery follows the physical size of devices */</div><div class='ctx'> 		max_sectors = mddev-&gt;dev_sectors;</div><div class='hunk'>@@ -7596,7 +7847,7 @@ void md_check_recovery(struct mddev *mddev)</div><div class='ctx'> 			goto unlock;</div><div class='ctx'> </div><div class='ctx'> 		if (mddev-&gt;pers-&gt;sync_request) {</div><div class='del'>-			if (spares &amp;&amp; mddev-&gt;bitmap &amp;&amp; ! mddev-&gt;bitmap-&gt;file) {</div><div class='add'>+			if (spares) {</div><div class='ctx'> 				/* We are adding a device or devices to an array</div><div class='ctx'> 				 * which has the bitmap stored on all devices.</div><div class='ctx'> 				 * So make sure all bitmap pages get written</div><div class='hunk'>@@ -7644,6 +7895,20 @@ void md_wait_for_blocked_rdev(struct md_rdev *rdev, struct mddev *mddev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(md_wait_for_blocked_rdev);</div><div class='ctx'> </div><div class='add'>+void md_finish_reshape(struct mddev *mddev)</div><div class='add'>+{</div><div class='add'>+	/* called be personality module when reshape completes. */</div><div class='add'>+	struct md_rdev *rdev;</div><div class='add'>+</div><div class='add'>+	rdev_for_each(rdev, mddev) {</div><div class='add'>+		if (rdev-&gt;data_offset &gt; rdev-&gt;new_data_offset)</div><div class='add'>+			rdev-&gt;sectors += rdev-&gt;data_offset - rdev-&gt;new_data_offset;</div><div class='add'>+		else</div><div class='add'>+			rdev-&gt;sectors -= rdev-&gt;new_data_offset - rdev-&gt;data_offset;</div><div class='add'>+		rdev-&gt;data_offset = rdev-&gt;new_data_offset;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(md_finish_reshape);</div><div class='ctx'> </div><div class='ctx'> /* Bad block management.</div><div class='ctx'>  * We can record which blocks on each device are 'bad' and so just</div><div class='hunk'>@@ -7892,10 +8157,15 @@ static int md_set_badblocks(struct badblocks *bb, sector_t s, int sectors,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int rdev_set_badblocks(struct md_rdev *rdev, sector_t s, int sectors,</div><div class='del'>-		       int acknowledged)</div><div class='add'>+		       int is_new)</div><div class='ctx'> {</div><div class='del'>-	int rv = md_set_badblocks(&amp;rdev-&gt;badblocks,</div><div class='del'>-				  s + rdev-&gt;data_offset, sectors, acknowledged);</div><div class='add'>+	int rv;</div><div class='add'>+	if (is_new)</div><div class='add'>+		s += rdev-&gt;new_data_offset;</div><div class='add'>+	else</div><div class='add'>+		s += rdev-&gt;data_offset;</div><div class='add'>+	rv = md_set_badblocks(&amp;rdev-&gt;badblocks,</div><div class='add'>+			      s, sectors, 0);</div><div class='ctx'> 	if (rv) {</div><div class='ctx'> 		/* Make sure they get written out promptly */</div><div class='ctx'> 		sysfs_notify_dirent_safe(rdev-&gt;sysfs_state);</div><div class='hunk'>@@ -8001,11 +8271,15 @@ out:</div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int rdev_clear_badblocks(struct md_rdev *rdev, sector_t s, int sectors)</div><div class='add'>+int rdev_clear_badblocks(struct md_rdev *rdev, sector_t s, int sectors,</div><div class='add'>+			 int is_new)</div><div class='ctx'> {</div><div class='add'>+	if (is_new)</div><div class='add'>+		s += rdev-&gt;new_data_offset;</div><div class='add'>+	else</div><div class='add'>+		s += rdev-&gt;data_offset;</div><div class='ctx'> 	return md_clear_badblocks(&amp;rdev-&gt;badblocks,</div><div class='del'>-				  s + rdev-&gt;data_offset,</div><div class='del'>-				  sectors);</div><div class='add'>+				  s, sectors);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(rdev_clear_badblocks);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/md/md.h b/drivers/md/md.h<br/>index 1c2063ccf48e..7b4a3c318cae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/md.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/md.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/md.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/md.h</a></div><div class='hunk'>@@ -55,6 +55,7 @@ struct md_rdev {</div><div class='ctx'> 	int		sb_loaded;</div><div class='ctx'> 	__u64		sb_events;</div><div class='ctx'> 	sector_t	data_offset;	/* start of data in array */</div><div class='add'>+	sector_t	new_data_offset;/* only relevant while reshaping */</div><div class='ctx'> 	sector_t 	sb_start;	/* offset of the super block (in 512byte sectors) */</div><div class='ctx'> 	int		sb_size;	/* bytes in the superblock */</div><div class='ctx'> 	int		preferred_minor;	/* autorun support */</div><div class='hunk'>@@ -193,8 +194,9 @@ static inline int is_badblock(struct md_rdev *rdev, sector_t s, int sectors,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> extern int rdev_set_badblocks(struct md_rdev *rdev, sector_t s, int sectors,</div><div class='del'>-			      int acknowledged);</div><div class='del'>-extern int rdev_clear_badblocks(struct md_rdev *rdev, sector_t s, int sectors);</div><div class='add'>+			      int is_new);</div><div class='add'>+extern int rdev_clear_badblocks(struct md_rdev *rdev, sector_t s, int sectors,</div><div class='add'>+				int is_new);</div><div class='ctx'> extern void md_ack_all_badblocks(struct badblocks *bb);</div><div class='ctx'> </div><div class='ctx'> struct mddev {</div><div class='hunk'>@@ -262,6 +264,7 @@ struct mddev {</div><div class='ctx'> 	sector_t			reshape_position;</div><div class='ctx'> 	int				delta_disks, new_level, new_layout;</div><div class='ctx'> 	int				new_chunk_sectors;</div><div class='add'>+	int				reshape_backwards;</div><div class='ctx'> </div><div class='ctx'> 	atomic_t			plug_cnt;	/* If device is expecting</div><div class='ctx'> 							 * more bios soon.</div><div class='hunk'>@@ -390,10 +393,13 @@ struct mddev {</div><div class='ctx'> 						 * For external metadata, offset</div><div class='ctx'> 						 * from start of device. </div><div class='ctx'> 						 */</div><div class='add'>+		unsigned long		space; /* space available at this offset */</div><div class='ctx'> 		loff_t			default_offset; /* this is the offset to use when</div><div class='ctx'> 							 * hot-adding a bitmap.  It should</div><div class='ctx'> 							 * eventually be settable by sysfs.</div><div class='ctx'> 							 */</div><div class='add'>+		unsigned long		default_space; /* space available at</div><div class='add'>+							* default offset */</div><div class='ctx'> 		struct mutex		mutex;</div><div class='ctx'> 		unsigned long		chunksize;</div><div class='ctx'> 		unsigned long		daemon_sleep; /* how many jiffies between updates? */</div><div class='hunk'>@@ -591,6 +597,7 @@ extern void md_write_start(struct mddev *mddev, struct bio *bi);</div><div class='ctx'> extern void md_write_end(struct mddev *mddev);</div><div class='ctx'> extern void md_done_sync(struct mddev *mddev, int blocks, int ok);</div><div class='ctx'> extern void md_error(struct mddev *mddev, struct md_rdev *rdev);</div><div class='add'>+extern void md_finish_reshape(struct mddev *mddev);</div><div class='ctx'> </div><div class='ctx'> extern int mddev_congested(struct mddev *mddev, int bits);</div><div class='ctx'> extern void md_flush_request(struct mddev *mddev, struct bio *bio);</div><div class='hunk'>@@ -615,6 +622,7 @@ extern int md_run(struct mddev *mddev);</div><div class='ctx'> extern void md_stop(struct mddev *mddev);</div><div class='ctx'> extern void md_stop_writes(struct mddev *mddev);</div><div class='ctx'> extern int md_rdev_init(struct md_rdev *rdev);</div><div class='add'>+extern void md_rdev_clear(struct md_rdev *rdev);</div><div class='ctx'> </div><div class='ctx'> extern void mddev_suspend(struct mddev *mddev);</div><div class='ctx'> extern void mddev_resume(struct mddev *mddev);</div><div class='head'>diff --git a/drivers/md/persistent-data/dm-transaction-manager.c b/drivers/md/persistent-data/dm-transaction-manager.c<br/>index 6f8d38747d7f..400fe144c0cd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/persistent-data/dm-transaction-manager.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/persistent-data/dm-transaction-manager.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/persistent-data/dm-transaction-manager.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/persistent-data/dm-transaction-manager.c</a></div><div class='hunk'>@@ -249,6 +249,7 @@ int dm_tm_shadow_block(struct dm_transaction_manager *tm, dm_block_t orig,</div><div class='ctx'> </div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(dm_tm_shadow_block);</div><div class='ctx'> </div><div class='ctx'> int dm_tm_read_lock(struct dm_transaction_manager *tm, dm_block_t b,</div><div class='ctx'> 		    struct dm_block_validator *v,</div><div class='hunk'>@@ -259,6 +260,7 @@ int dm_tm_read_lock(struct dm_transaction_manager *tm, dm_block_t b,</div><div class='ctx'> </div><div class='ctx'> 	return dm_bm_read_lock(tm-&gt;bm, b, v, blk);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(dm_tm_read_lock);</div><div class='ctx'> </div><div class='ctx'> int dm_tm_unlock(struct dm_transaction_manager *tm, struct dm_block *b)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c<br/>index 15dd59b84e94..a9c7981ddd24 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/raid1.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/raid1.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/raid1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/raid1.c</a></div><div class='hunk'>@@ -1859,7 +1859,9 @@ static void fix_read_error(struct r1conf *conf, int read_disk,</div><div class='ctx'> </div><div class='ctx'> 			rdev = conf-&gt;mirrors[d].rdev;</div><div class='ctx'> 			if (rdev &amp;&amp;</div><div class='del'>-			    test_bit(In_sync, &amp;rdev-&gt;flags) &amp;&amp;</div><div class='add'>+			    (test_bit(In_sync, &amp;rdev-&gt;flags) ||</div><div class='add'>+			     (!test_bit(Faulty, &amp;rdev-&gt;flags) &amp;&amp;</div><div class='add'>+			      rdev-&gt;recovery_offset &gt;= sect + s)) &amp;&amp;</div><div class='ctx'> 			    is_badblock(rdev, sect, s,</div><div class='ctx'> 					&amp;first_bad, &amp;bad_sectors) == 0 &amp;&amp;</div><div class='ctx'> 			    sync_page_io(rdev, sect, s&lt;&lt;9,</div><div class='hunk'>@@ -2024,7 +2026,7 @@ static void handle_sync_write_finished(struct r1conf *conf, struct r1bio *r1_bio</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (test_bit(BIO_UPTODATE, &amp;bio-&gt;bi_flags) &amp;&amp;</div><div class='ctx'> 		    test_bit(R1BIO_MadeGood, &amp;r1_bio-&gt;state)) {</div><div class='del'>-			rdev_clear_badblocks(rdev, r1_bio-&gt;sector, s);</div><div class='add'>+			rdev_clear_badblocks(rdev, r1_bio-&gt;sector, s, 0);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!test_bit(BIO_UPTODATE, &amp;bio-&gt;bi_flags) &amp;&amp;</div><div class='ctx'> 		    test_bit(R1BIO_WriteError, &amp;r1_bio-&gt;state)) {</div><div class='hunk'>@@ -2044,7 +2046,7 @@ static void handle_write_finished(struct r1conf *conf, struct r1bio *r1_bio)</div><div class='ctx'> 			struct md_rdev *rdev = conf-&gt;mirrors[m].rdev;</div><div class='ctx'> 			rdev_clear_badblocks(rdev,</div><div class='ctx'> 					     r1_bio-&gt;sector,</div><div class='del'>-					     r1_bio-&gt;sectors);</div><div class='add'>+					     r1_bio-&gt;sectors, 0);</div><div class='ctx'> 			rdev_dec_pending(rdev, conf-&gt;mddev);</div><div class='ctx'> 		} else if (r1_bio-&gt;bios[m] != NULL) {</div><div class='ctx'> 			/* This drive got a write error.  We need to</div><div class='hunk'>@@ -2548,6 +2550,7 @@ static struct r1conf *setup_conf(struct mddev *mddev)</div><div class='ctx'> 	err = -EINVAL;</div><div class='ctx'> 	spin_lock_init(&amp;conf-&gt;device_lock);</div><div class='ctx'> 	rdev_for_each(rdev, mddev) {</div><div class='add'>+		struct request_queue *q;</div><div class='ctx'> 		int disk_idx = rdev-&gt;raid_disk;</div><div class='ctx'> 		if (disk_idx &gt;= mddev-&gt;raid_disks</div><div class='ctx'> 		    || disk_idx &lt; 0)</div><div class='hunk'>@@ -2560,6 +2563,9 @@ static struct r1conf *setup_conf(struct mddev *mddev)</div><div class='ctx'> 		if (disk-&gt;rdev)</div><div class='ctx'> 			goto abort;</div><div class='ctx'> 		disk-&gt;rdev = rdev;</div><div class='add'>+		q = bdev_get_queue(rdev-&gt;bdev);</div><div class='add'>+		if (q-&gt;merge_bvec_fn)</div><div class='add'>+			mddev-&gt;merge_check_needed = 1;</div><div class='ctx'> </div><div class='ctx'> 		disk-&gt;head_position = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2598,7 +2604,8 @@ static struct r1conf *setup_conf(struct mddev *mddev)</div><div class='ctx'> 		if (!disk-&gt;rdev ||</div><div class='ctx'> 		    !test_bit(In_sync, &amp;disk-&gt;rdev-&gt;flags)) {</div><div class='ctx'> 			disk-&gt;head_position = 0;</div><div class='del'>-			if (disk-&gt;rdev)</div><div class='add'>+			if (disk-&gt;rdev &amp;&amp;</div><div class='add'>+			    (disk-&gt;rdev-&gt;saved_raid_disk &lt; 0))</div><div class='ctx'> 				conf-&gt;fullsync = 1;</div><div class='ctx'> 		} else if (conf-&gt;last_used &lt; 0)</div><div class='ctx'> 			/*</div><div class='hunk'>@@ -2750,9 +2757,16 @@ static int raid1_resize(struct mddev *mddev, sector_t sectors)</div><div class='ctx'> 	 * any io in the removed space completes, but it hardly seems</div><div class='ctx'> 	 * worth it.</div><div class='ctx'> 	 */</div><div class='del'>-	md_set_array_sectors(mddev, raid1_size(mddev, sectors, 0));</div><div class='del'>-	if (mddev-&gt;array_sectors &gt; raid1_size(mddev, sectors, 0))</div><div class='add'>+	sector_t newsize = raid1_size(mddev, sectors, 0);</div><div class='add'>+	if (mddev-&gt;external_size &amp;&amp;</div><div class='add'>+	    mddev-&gt;array_sectors &gt; newsize)</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	if (mddev-&gt;bitmap) {</div><div class='add'>+		int ret = bitmap_resize(mddev-&gt;bitmap, newsize, 0, 0);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	md_set_array_sectors(mddev, newsize);</div><div class='ctx'> 	set_capacity(mddev-&gt;gendisk, mddev-&gt;array_sectors);</div><div class='ctx'> 	revalidate_disk(mddev-&gt;gendisk);</div><div class='ctx'> 	if (sectors &gt; mddev-&gt;dev_sectors &amp;&amp;</div><div class='head'>diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c<br/>index c8dbb84d5357..99ae6068e456 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/raid10.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/raid10.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/raid10.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/raid10.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/ratelimit.h&gt;</div><div class='add'>+#include &lt;linux/kthread.h&gt;</div><div class='ctx'> #include "md.h"</div><div class='ctx'> #include "raid10.h"</div><div class='ctx'> #include "raid0.h"</div><div class='hunk'>@@ -68,6 +69,11 @@ static int max_queued_requests = 1024;</div><div class='ctx'> static void allow_barrier(struct r10conf *conf);</div><div class='ctx'> static void lower_barrier(struct r10conf *conf);</div><div class='ctx'> static int enough(struct r10conf *conf, int ignore);</div><div class='add'>+static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr,</div><div class='add'>+				int *skipped);</div><div class='add'>+static void reshape_request_write(struct mddev *mddev, struct r10bio *r10_bio);</div><div class='add'>+static void end_reshape_write(struct bio *bio, int error);</div><div class='add'>+static void end_reshape(struct r10conf *conf);</div><div class='ctx'> </div><div class='ctx'> static void * r10bio_pool_alloc(gfp_t gfp_flags, void *data)</div><div class='ctx'> {</div><div class='hunk'>@@ -112,7 +118,8 @@ static void * r10buf_pool_alloc(gfp_t gfp_flags, void *data)</div><div class='ctx'> 	if (!r10_bio)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	if (test_bit(MD_RECOVERY_SYNC, &amp;conf-&gt;mddev-&gt;recovery))</div><div class='add'>+	if (test_bit(MD_RECOVERY_SYNC, &amp;conf-&gt;mddev-&gt;recovery) ||</div><div class='add'>+	    test_bit(MD_RECOVERY_RESHAPE, &amp;conf-&gt;mddev-&gt;recovery))</div><div class='ctx'> 		nalloc = conf-&gt;copies; /* resync */</div><div class='ctx'> 	else</div><div class='ctx'> 		nalloc = 2; /* recovery */</div><div class='hunk'>@@ -140,9 +147,10 @@ static void * r10buf_pool_alloc(gfp_t gfp_flags, void *data)</div><div class='ctx'> 		struct bio *rbio = r10_bio-&gt;devs[j].repl_bio;</div><div class='ctx'> 		bio = r10_bio-&gt;devs[j].bio;</div><div class='ctx'> 		for (i = 0; i &lt; RESYNC_PAGES; i++) {</div><div class='del'>-			if (j == 1 &amp;&amp; !test_bit(MD_RECOVERY_SYNC,</div><div class='del'>-						&amp;conf-&gt;mddev-&gt;recovery)) {</div><div class='del'>-				/* we can share bv_page's during recovery */</div><div class='add'>+			if (j &gt; 0 &amp;&amp; !test_bit(MD_RECOVERY_SYNC,</div><div class='add'>+					       &amp;conf-&gt;mddev-&gt;recovery)) {</div><div class='add'>+				/* we can share bv_page's during recovery</div><div class='add'>+				 * and reshape */</div><div class='ctx'> 				struct bio *rbio = r10_bio-&gt;devs[0].bio;</div><div class='ctx'> 				page = rbio-&gt;bi_io_vec[i].bv_page;</div><div class='ctx'> 				get_page(page);</div><div class='hunk'>@@ -165,10 +173,11 @@ out_free_pages:</div><div class='ctx'> 	while (j--)</div><div class='ctx'> 		for (i = 0; i &lt; RESYNC_PAGES ; i++)</div><div class='ctx'> 			safe_put_page(r10_bio-&gt;devs[j].bio-&gt;bi_io_vec[i].bv_page);</div><div class='del'>-	j = -1;</div><div class='add'>+	j = 0;</div><div class='ctx'> out_free_bio:</div><div class='del'>-	while (++j &lt; nalloc) {</div><div class='del'>-		bio_put(r10_bio-&gt;devs[j].bio);</div><div class='add'>+	for ( ; j &lt; nalloc; j++) {</div><div class='add'>+		if (r10_bio-&gt;devs[j].bio)</div><div class='add'>+			bio_put(r10_bio-&gt;devs[j].bio);</div><div class='ctx'> 		if (r10_bio-&gt;devs[j].repl_bio)</div><div class='ctx'> 			bio_put(r10_bio-&gt;devs[j].repl_bio);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -504,79 +513,96 @@ static void raid10_end_write_request(struct bio *bio, int error)</div><div class='ctx'>  * sector offset to a virtual address</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void raid10_find_phys(struct r10conf *conf, struct r10bio *r10bio)</div><div class='add'>+static void __raid10_find_phys(struct geom *geo, struct r10bio *r10bio)</div><div class='ctx'> {</div><div class='ctx'> 	int n,f;</div><div class='ctx'> 	sector_t sector;</div><div class='ctx'> 	sector_t chunk;</div><div class='ctx'> 	sector_t stripe;</div><div class='ctx'> 	int dev;</div><div class='del'>-</div><div class='ctx'> 	int slot = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* now calculate first sector/dev */</div><div class='del'>-	chunk = r10bio-&gt;sector &gt;&gt; conf-&gt;chunk_shift;</div><div class='del'>-	sector = r10bio-&gt;sector &amp; conf-&gt;chunk_mask;</div><div class='add'>+	chunk = r10bio-&gt;sector &gt;&gt; geo-&gt;chunk_shift;</div><div class='add'>+	sector = r10bio-&gt;sector &amp; geo-&gt;chunk_mask;</div><div class='ctx'> </div><div class='del'>-	chunk *= conf-&gt;near_copies;</div><div class='add'>+	chunk *= geo-&gt;near_copies;</div><div class='ctx'> 	stripe = chunk;</div><div class='del'>-	dev = sector_div(stripe, conf-&gt;raid_disks);</div><div class='del'>-	if (conf-&gt;far_offset)</div><div class='del'>-		stripe *= conf-&gt;far_copies;</div><div class='add'>+	dev = sector_div(stripe, geo-&gt;raid_disks);</div><div class='add'>+	if (geo-&gt;far_offset)</div><div class='add'>+		stripe *= geo-&gt;far_copies;</div><div class='ctx'> </div><div class='del'>-	sector += stripe &lt;&lt; conf-&gt;chunk_shift;</div><div class='add'>+	sector += stripe &lt;&lt; geo-&gt;chunk_shift;</div><div class='ctx'> </div><div class='ctx'> 	/* and calculate all the others */</div><div class='del'>-	for (n=0; n &lt; conf-&gt;near_copies; n++) {</div><div class='add'>+	for (n = 0; n &lt; geo-&gt;near_copies; n++) {</div><div class='ctx'> 		int d = dev;</div><div class='ctx'> 		sector_t s = sector;</div><div class='ctx'> 		r10bio-&gt;devs[slot].addr = sector;</div><div class='ctx'> 		r10bio-&gt;devs[slot].devnum = d;</div><div class='ctx'> 		slot++;</div><div class='ctx'> </div><div class='del'>-		for (f = 1; f &lt; conf-&gt;far_copies; f++) {</div><div class='del'>-			d += conf-&gt;near_copies;</div><div class='del'>-			if (d &gt;= conf-&gt;raid_disks)</div><div class='del'>-				d -= conf-&gt;raid_disks;</div><div class='del'>-			s += conf-&gt;stride;</div><div class='add'>+		for (f = 1; f &lt; geo-&gt;far_copies; f++) {</div><div class='add'>+			d += geo-&gt;near_copies;</div><div class='add'>+			if (d &gt;= geo-&gt;raid_disks)</div><div class='add'>+				d -= geo-&gt;raid_disks;</div><div class='add'>+			s += geo-&gt;stride;</div><div class='ctx'> 			r10bio-&gt;devs[slot].devnum = d;</div><div class='ctx'> 			r10bio-&gt;devs[slot].addr = s;</div><div class='ctx'> 			slot++;</div><div class='ctx'> 		}</div><div class='ctx'> 		dev++;</div><div class='del'>-		if (dev &gt;= conf-&gt;raid_disks) {</div><div class='add'>+		if (dev &gt;= geo-&gt;raid_disks) {</div><div class='ctx'> 			dev = 0;</div><div class='del'>-			sector += (conf-&gt;chunk_mask + 1);</div><div class='add'>+			sector += (geo-&gt;chunk_mask + 1);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	BUG_ON(slot != conf-&gt;copies);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void raid10_find_phys(struct r10conf *conf, struct r10bio *r10bio)</div><div class='add'>+{</div><div class='add'>+	struct geom *geo = &amp;conf-&gt;geo;</div><div class='add'>+</div><div class='add'>+	if (conf-&gt;reshape_progress != MaxSector &amp;&amp;</div><div class='add'>+	    ((r10bio-&gt;sector &gt;= conf-&gt;reshape_progress) !=</div><div class='add'>+	     conf-&gt;mddev-&gt;reshape_backwards)) {</div><div class='add'>+		set_bit(R10BIO_Previous, &amp;r10bio-&gt;state);</div><div class='add'>+		geo = &amp;conf-&gt;prev;</div><div class='add'>+	} else</div><div class='add'>+		clear_bit(R10BIO_Previous, &amp;r10bio-&gt;state);</div><div class='add'>+</div><div class='add'>+	__raid10_find_phys(geo, r10bio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static sector_t raid10_find_virt(struct r10conf *conf, sector_t sector, int dev)</div><div class='ctx'> {</div><div class='ctx'> 	sector_t offset, chunk, vchunk;</div><div class='add'>+	/* Never use conf-&gt;prev as this is only called during resync</div><div class='add'>+	 * or recovery, so reshape isn't happening</div><div class='add'>+	 */</div><div class='add'>+	struct geom *geo = &amp;conf-&gt;geo;</div><div class='ctx'> </div><div class='del'>-	offset = sector &amp; conf-&gt;chunk_mask;</div><div class='del'>-	if (conf-&gt;far_offset) {</div><div class='add'>+	offset = sector &amp; geo-&gt;chunk_mask;</div><div class='add'>+	if (geo-&gt;far_offset) {</div><div class='ctx'> 		int fc;</div><div class='del'>-		chunk = sector &gt;&gt; conf-&gt;chunk_shift;</div><div class='del'>-		fc = sector_div(chunk, conf-&gt;far_copies);</div><div class='del'>-		dev -= fc * conf-&gt;near_copies;</div><div class='add'>+		chunk = sector &gt;&gt; geo-&gt;chunk_shift;</div><div class='add'>+		fc = sector_div(chunk, geo-&gt;far_copies);</div><div class='add'>+		dev -= fc * geo-&gt;near_copies;</div><div class='ctx'> 		if (dev &lt; 0)</div><div class='del'>-			dev += conf-&gt;raid_disks;</div><div class='add'>+			dev += geo-&gt;raid_disks;</div><div class='ctx'> 	} else {</div><div class='del'>-		while (sector &gt;= conf-&gt;stride) {</div><div class='del'>-			sector -= conf-&gt;stride;</div><div class='del'>-			if (dev &lt; conf-&gt;near_copies)</div><div class='del'>-				dev += conf-&gt;raid_disks - conf-&gt;near_copies;</div><div class='add'>+		while (sector &gt;= geo-&gt;stride) {</div><div class='add'>+			sector -= geo-&gt;stride;</div><div class='add'>+			if (dev &lt; geo-&gt;near_copies)</div><div class='add'>+				dev += geo-&gt;raid_disks - geo-&gt;near_copies;</div><div class='ctx'> 			else</div><div class='del'>-				dev -= conf-&gt;near_copies;</div><div class='add'>+				dev -= geo-&gt;near_copies;</div><div class='ctx'> 		}</div><div class='del'>-		chunk = sector &gt;&gt; conf-&gt;chunk_shift;</div><div class='add'>+		chunk = sector &gt;&gt; geo-&gt;chunk_shift;</div><div class='ctx'> 	}</div><div class='del'>-	vchunk = chunk * conf-&gt;raid_disks + dev;</div><div class='del'>-	sector_div(vchunk, conf-&gt;near_copies);</div><div class='del'>-	return (vchunk &lt;&lt; conf-&gt;chunk_shift) + offset;</div><div class='add'>+	vchunk = chunk * geo-&gt;raid_disks + dev;</div><div class='add'>+	sector_div(vchunk, geo-&gt;near_copies);</div><div class='add'>+	return (vchunk &lt;&lt; geo-&gt;chunk_shift) + offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -597,10 +623,17 @@ static int raid10_mergeable_bvec(struct request_queue *q,</div><div class='ctx'> 	struct r10conf *conf = mddev-&gt;private;</div><div class='ctx'> 	sector_t sector = bvm-&gt;bi_sector + get_start_sect(bvm-&gt;bi_bdev);</div><div class='ctx'> 	int max;</div><div class='del'>-	unsigned int chunk_sectors = mddev-&gt;chunk_sectors;</div><div class='add'>+	unsigned int chunk_sectors;</div><div class='ctx'> 	unsigned int bio_sectors = bvm-&gt;bi_size &gt;&gt; 9;</div><div class='add'>+	struct geom *geo = &amp;conf-&gt;geo;</div><div class='add'>+</div><div class='add'>+	chunk_sectors = (conf-&gt;geo.chunk_mask &amp; conf-&gt;prev.chunk_mask) + 1;</div><div class='add'>+	if (conf-&gt;reshape_progress != MaxSector &amp;&amp;</div><div class='add'>+	    ((sector &gt;= conf-&gt;reshape_progress) !=</div><div class='add'>+	     conf-&gt;mddev-&gt;reshape_backwards))</div><div class='add'>+		geo = &amp;conf-&gt;prev;</div><div class='ctx'> </div><div class='del'>-	if (conf-&gt;near_copies &lt; conf-&gt;raid_disks) {</div><div class='add'>+	if (geo-&gt;near_copies &lt; geo-&gt;raid_disks) {</div><div class='ctx'> 		max = (chunk_sectors - ((sector &amp; (chunk_sectors - 1))</div><div class='ctx'> 					+ bio_sectors)) &lt;&lt; 9;</div><div class='ctx'> 		if (max &lt; 0)</div><div class='hunk'>@@ -614,6 +647,12 @@ static int raid10_mergeable_bvec(struct request_queue *q,</div><div class='ctx'> 	if (mddev-&gt;merge_check_needed) {</div><div class='ctx'> 		struct r10bio r10_bio;</div><div class='ctx'> 		int s;</div><div class='add'>+		if (conf-&gt;reshape_progress != MaxSector) {</div><div class='add'>+			/* Cannot give any guidance during reshape */</div><div class='add'>+			if (max &lt;= biovec-&gt;bv_len &amp;&amp; bio_sectors == 0)</div><div class='add'>+				return biovec-&gt;bv_len;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='ctx'> 		r10_bio.sector = sector;</div><div class='ctx'> 		raid10_find_phys(conf, &amp;r10_bio);</div><div class='ctx'> 		rcu_read_lock();</div><div class='hunk'>@@ -681,6 +720,7 @@ static struct md_rdev *read_balance(struct r10conf *conf,</div><div class='ctx'> 	struct md_rdev *rdev, *best_rdev;</div><div class='ctx'> 	int do_balance;</div><div class='ctx'> 	int best_slot;</div><div class='add'>+	struct geom *geo = &amp;conf-&gt;geo;</div><div class='ctx'> </div><div class='ctx'> 	raid10_find_phys(conf, r10_bio);</div><div class='ctx'> 	rcu_read_lock();</div><div class='hunk'>@@ -761,11 +801,11 @@ retry:</div><div class='ctx'> 		 * sequential read speed for 'far copies' arrays.  So only</div><div class='ctx'> 		 * keep it for 'near' arrays, and review those later.</div><div class='ctx'> 		 */</div><div class='del'>-		if (conf-&gt;near_copies &gt; 1 &amp;&amp; !atomic_read(&amp;rdev-&gt;nr_pending))</div><div class='add'>+		if (geo-&gt;near_copies &gt; 1 &amp;&amp; !atomic_read(&amp;rdev-&gt;nr_pending))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		/* for far &gt; 1 always use the lowest address */</div><div class='del'>-		if (conf-&gt;far_copies &gt; 1)</div><div class='add'>+		if (geo-&gt;far_copies &gt; 1)</div><div class='ctx'> 			new_distance = r10_bio-&gt;devs[slot].addr;</div><div class='ctx'> 		else</div><div class='ctx'> 			new_distance = abs(r10_bio-&gt;devs[slot].addr -</div><div class='hunk'>@@ -812,7 +852,10 @@ static int raid10_congested(void *data, int bits)</div><div class='ctx'> 	if (mddev_congested(mddev, bits))</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	rcu_read_lock();</div><div class='del'>-	for (i = 0; i &lt; conf-&gt;raid_disks &amp;&amp; ret == 0; i++) {</div><div class='add'>+	for (i = 0;</div><div class='add'>+	     (i &lt; conf-&gt;geo.raid_disks || i &lt; conf-&gt;prev.raid_disks)</div><div class='add'>+		     &amp;&amp; ret == 0;</div><div class='add'>+	     i++) {</div><div class='ctx'> 		struct md_rdev *rdev = rcu_dereference(conf-&gt;mirrors[i].rdev);</div><div class='ctx'> 		if (rdev &amp;&amp; !test_bit(Faulty, &amp;rdev-&gt;flags)) {</div><div class='ctx'> 			struct request_queue *q = bdev_get_queue(rdev-&gt;bdev);</div><div class='hunk'>@@ -973,13 +1016,24 @@ static void unfreeze_array(struct r10conf *conf)</div><div class='ctx'> 	spin_unlock_irq(&amp;conf-&gt;resync_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static sector_t choose_data_offset(struct r10bio *r10_bio,</div><div class='add'>+				   struct md_rdev *rdev)</div><div class='add'>+{</div><div class='add'>+	if (!test_bit(MD_RECOVERY_RESHAPE, &amp;rdev-&gt;mddev-&gt;recovery) ||</div><div class='add'>+	    test_bit(R10BIO_Previous, &amp;r10_bio-&gt;state))</div><div class='add'>+		return rdev-&gt;data_offset;</div><div class='add'>+	else</div><div class='add'>+		return rdev-&gt;new_data_offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void make_request(struct mddev *mddev, struct bio * bio)</div><div class='ctx'> {</div><div class='ctx'> 	struct r10conf *conf = mddev-&gt;private;</div><div class='ctx'> 	struct r10bio *r10_bio;</div><div class='ctx'> 	struct bio *read_bio;</div><div class='ctx'> 	int i;</div><div class='del'>-	int chunk_sects = conf-&gt;chunk_mask + 1;</div><div class='add'>+	sector_t chunk_mask = (conf-&gt;geo.chunk_mask &amp; conf-&gt;prev.chunk_mask);</div><div class='add'>+	int chunk_sects = chunk_mask + 1;</div><div class='ctx'> 	const int rw = bio_data_dir(bio);</div><div class='ctx'> 	const unsigned long do_sync = (bio-&gt;bi_rw &amp; REQ_SYNC);</div><div class='ctx'> 	const unsigned long do_fua = (bio-&gt;bi_rw &amp; REQ_FUA);</div><div class='hunk'>@@ -988,6 +1042,7 @@ static void make_request(struct mddev *mddev, struct bio * bio)</div><div class='ctx'> 	int plugged;</div><div class='ctx'> 	int sectors_handled;</div><div class='ctx'> 	int max_sectors;</div><div class='add'>+	int sectors;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(bio-&gt;bi_rw &amp; REQ_FLUSH)) {</div><div class='ctx'> 		md_flush_request(mddev, bio);</div><div class='hunk'>@@ -997,9 +1052,10 @@ static void make_request(struct mddev *mddev, struct bio * bio)</div><div class='ctx'> 	/* If this request crosses a chunk boundary, we need to</div><div class='ctx'> 	 * split it.  This will only happen for 1 PAGE (or less) requests.</div><div class='ctx'> 	 */</div><div class='del'>-	if (unlikely( (bio-&gt;bi_sector &amp; conf-&gt;chunk_mask) + (bio-&gt;bi_size &gt;&gt; 9)</div><div class='del'>-		      &gt; chunk_sects &amp;&amp;</div><div class='del'>-		    conf-&gt;near_copies &lt; conf-&gt;raid_disks)) {</div><div class='add'>+	if (unlikely((bio-&gt;bi_sector &amp; chunk_mask) + (bio-&gt;bi_size &gt;&gt; 9)</div><div class='add'>+		     &gt; chunk_sects</div><div class='add'>+		     &amp;&amp; (conf-&gt;geo.near_copies &lt; conf-&gt;geo.raid_disks</div><div class='add'>+			 || conf-&gt;prev.near_copies &lt; conf-&gt;prev.raid_disks))) {</div><div class='ctx'> 		struct bio_pair *bp;</div><div class='ctx'> 		/* Sanity check -- queue functions should prevent this happening */</div><div class='ctx'> 		if (bio-&gt;bi_vcnt != 1 ||</div><div class='hunk'>@@ -1051,10 +1107,41 @@ static void make_request(struct mddev *mddev, struct bio * bio)</div><div class='ctx'> 	 */</div><div class='ctx'> 	wait_barrier(conf);</div><div class='ctx'> </div><div class='add'>+	sectors = bio-&gt;bi_size &gt;&gt; 9;</div><div class='add'>+	while (test_bit(MD_RECOVERY_RESHAPE, &amp;mddev-&gt;recovery) &amp;&amp;</div><div class='add'>+	    bio-&gt;bi_sector &lt; conf-&gt;reshape_progress &amp;&amp;</div><div class='add'>+	    bio-&gt;bi_sector + sectors &gt; conf-&gt;reshape_progress) {</div><div class='add'>+		/* IO spans the reshape position.  Need to wait for</div><div class='add'>+		 * reshape to pass</div><div class='add'>+		 */</div><div class='add'>+		allow_barrier(conf);</div><div class='add'>+		wait_event(conf-&gt;wait_barrier,</div><div class='add'>+			   conf-&gt;reshape_progress &lt;= bio-&gt;bi_sector ||</div><div class='add'>+			   conf-&gt;reshape_progress &gt;= bio-&gt;bi_sector + sectors);</div><div class='add'>+		wait_barrier(conf);</div><div class='add'>+	}</div><div class='add'>+	if (test_bit(MD_RECOVERY_RESHAPE, &amp;mddev-&gt;recovery) &amp;&amp;</div><div class='add'>+	    bio_data_dir(bio) == WRITE &amp;&amp;</div><div class='add'>+	    (mddev-&gt;reshape_backwards</div><div class='add'>+	     ? (bio-&gt;bi_sector &lt; conf-&gt;reshape_safe &amp;&amp;</div><div class='add'>+		bio-&gt;bi_sector + sectors &gt; conf-&gt;reshape_progress)</div><div class='add'>+	     : (bio-&gt;bi_sector + sectors &gt; conf-&gt;reshape_safe &amp;&amp;</div><div class='add'>+		bio-&gt;bi_sector &lt; conf-&gt;reshape_progress))) {</div><div class='add'>+		/* Need to update reshape_position in metadata */</div><div class='add'>+		mddev-&gt;reshape_position = conf-&gt;reshape_progress;</div><div class='add'>+		set_bit(MD_CHANGE_DEVS, &amp;mddev-&gt;flags);</div><div class='add'>+		set_bit(MD_CHANGE_PENDING, &amp;mddev-&gt;flags);</div><div class='add'>+		md_wakeup_thread(mddev-&gt;thread);</div><div class='add'>+		wait_event(mddev-&gt;sb_wait,</div><div class='add'>+			   !test_bit(MD_CHANGE_PENDING, &amp;mddev-&gt;flags));</div><div class='add'>+</div><div class='add'>+		conf-&gt;reshape_safe = mddev-&gt;reshape_position;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	r10_bio = mempool_alloc(conf-&gt;r10bio_pool, GFP_NOIO);</div><div class='ctx'> </div><div class='ctx'> 	r10_bio-&gt;master_bio = bio;</div><div class='del'>-	r10_bio-&gt;sectors = bio-&gt;bi_size &gt;&gt; 9;</div><div class='add'>+	r10_bio-&gt;sectors = sectors;</div><div class='ctx'> </div><div class='ctx'> 	r10_bio-&gt;mddev = mddev;</div><div class='ctx'> 	r10_bio-&gt;sector = bio-&gt;bi_sector;</div><div class='hunk'>@@ -1093,7 +1180,7 @@ read_again:</div><div class='ctx'> 		r10_bio-&gt;devs[slot].rdev = rdev;</div><div class='ctx'> </div><div class='ctx'> 		read_bio-&gt;bi_sector = r10_bio-&gt;devs[slot].addr +</div><div class='del'>-			rdev-&gt;data_offset;</div><div class='add'>+			choose_data_offset(r10_bio, rdev);</div><div class='ctx'> 		read_bio-&gt;bi_bdev = rdev-&gt;bdev;</div><div class='ctx'> 		read_bio-&gt;bi_end_io = raid10_end_read_request;</div><div class='ctx'> 		read_bio-&gt;bi_rw = READ | do_sync;</div><div class='hunk'>@@ -1297,7 +1384,8 @@ retry_write:</div><div class='ctx'> 		r10_bio-&gt;devs[i].bio = mbio;</div><div class='ctx'> </div><div class='ctx'> 		mbio-&gt;bi_sector	= (r10_bio-&gt;devs[i].addr+</div><div class='del'>-				   conf-&gt;mirrors[d].rdev-&gt;data_offset);</div><div class='add'>+				   choose_data_offset(r10_bio,</div><div class='add'>+						      conf-&gt;mirrors[d].rdev));</div><div class='ctx'> 		mbio-&gt;bi_bdev = conf-&gt;mirrors[d].rdev-&gt;bdev;</div><div class='ctx'> 		mbio-&gt;bi_end_io	= raid10_end_write_request;</div><div class='ctx'> 		mbio-&gt;bi_rw = WRITE | do_sync | do_fua;</div><div class='hunk'>@@ -1321,8 +1409,10 @@ retry_write:</div><div class='ctx'> 		 * so it cannot disappear, so the replacement cannot</div><div class='ctx'> 		 * become NULL here</div><div class='ctx'> 		 */</div><div class='del'>-		mbio-&gt;bi_sector	= (r10_bio-&gt;devs[i].addr+</div><div class='del'>-				   conf-&gt;mirrors[d].replacement-&gt;data_offset);</div><div class='add'>+		mbio-&gt;bi_sector	= (r10_bio-&gt;devs[i].addr +</div><div class='add'>+				   choose_data_offset(</div><div class='add'>+					   r10_bio,</div><div class='add'>+					   conf-&gt;mirrors[d].replacement));</div><div class='ctx'> 		mbio-&gt;bi_bdev = conf-&gt;mirrors[d].replacement-&gt;bdev;</div><div class='ctx'> 		mbio-&gt;bi_end_io	= raid10_end_write_request;</div><div class='ctx'> 		mbio-&gt;bi_rw = WRITE | do_sync | do_fua;</div><div class='hunk'>@@ -1368,19 +1458,19 @@ static void status(struct seq_file *seq, struct mddev *mddev)</div><div class='ctx'> 	struct r10conf *conf = mddev-&gt;private;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (conf-&gt;near_copies &lt; conf-&gt;raid_disks)</div><div class='add'>+	if (conf-&gt;geo.near_copies &lt; conf-&gt;geo.raid_disks)</div><div class='ctx'> 		seq_printf(seq, " %dK chunks", mddev-&gt;chunk_sectors / 2);</div><div class='del'>-	if (conf-&gt;near_copies &gt; 1)</div><div class='del'>-		seq_printf(seq, " %d near-copies", conf-&gt;near_copies);</div><div class='del'>-	if (conf-&gt;far_copies &gt; 1) {</div><div class='del'>-		if (conf-&gt;far_offset)</div><div class='del'>-			seq_printf(seq, " %d offset-copies", conf-&gt;far_copies);</div><div class='add'>+	if (conf-&gt;geo.near_copies &gt; 1)</div><div class='add'>+		seq_printf(seq, " %d near-copies", conf-&gt;geo.near_copies);</div><div class='add'>+	if (conf-&gt;geo.far_copies &gt; 1) {</div><div class='add'>+		if (conf-&gt;geo.far_offset)</div><div class='add'>+			seq_printf(seq, " %d offset-copies", conf-&gt;geo.far_copies);</div><div class='ctx'> 		else</div><div class='del'>-			seq_printf(seq, " %d far-copies", conf-&gt;far_copies);</div><div class='add'>+			seq_printf(seq, " %d far-copies", conf-&gt;geo.far_copies);</div><div class='ctx'> 	}</div><div class='del'>-	seq_printf(seq, " [%d/%d] [", conf-&gt;raid_disks,</div><div class='del'>-					conf-&gt;raid_disks - mddev-&gt;degraded);</div><div class='del'>-	for (i = 0; i &lt; conf-&gt;raid_disks; i++)</div><div class='add'>+	seq_printf(seq, " [%d/%d] [", conf-&gt;geo.raid_disks,</div><div class='add'>+					conf-&gt;geo.raid_disks - mddev-&gt;degraded);</div><div class='add'>+	for (i = 0; i &lt; conf-&gt;geo.raid_disks; i++)</div><div class='ctx'> 		seq_printf(seq, "%s",</div><div class='ctx'> 			      conf-&gt;mirrors[i].rdev &amp;&amp;</div><div class='ctx'> 			      test_bit(In_sync, &amp;conf-&gt;mirrors[i].rdev-&gt;flags) ? "U" : "_");</div><div class='hunk'>@@ -1392,7 +1482,7 @@ static void status(struct seq_file *seq, struct mddev *mddev)</div><div class='ctx'>  * Don't consider the device numbered 'ignore'</div><div class='ctx'>  * as we might be about to remove it.</div><div class='ctx'>  */</div><div class='del'>-static int enough(struct r10conf *conf, int ignore)</div><div class='add'>+static int _enough(struct r10conf *conf, struct geom *geo, int ignore)</div><div class='ctx'> {</div><div class='ctx'> 	int first = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1403,7 +1493,7 @@ static int enough(struct r10conf *conf, int ignore)</div><div class='ctx'> 			if (conf-&gt;mirrors[first].rdev &amp;&amp;</div><div class='ctx'> 			    first != ignore)</div><div class='ctx'> 				cnt++;</div><div class='del'>-			first = (first+1) % conf-&gt;raid_disks;</div><div class='add'>+			first = (first+1) % geo-&gt;raid_disks;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (cnt == 0)</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -1411,6 +1501,12 @@ static int enough(struct r10conf *conf, int ignore)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int enough(struct r10conf *conf, int ignore)</div><div class='add'>+{</div><div class='add'>+	return _enough(conf, &amp;conf-&gt;geo, ignore) &amp;&amp;</div><div class='add'>+		_enough(conf, &amp;conf-&gt;prev, ignore);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void error(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	char b[BDEVNAME_SIZE];</div><div class='hunk'>@@ -1445,7 +1541,7 @@ static void error(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> 	       "md/raid10:%s: Disk failure on %s, disabling device.\n"</div><div class='ctx'> 	       "md/raid10:%s: Operation continuing on %d devices.\n",</div><div class='ctx'> 	       mdname(mddev), bdevname(rdev-&gt;bdev, b),</div><div class='del'>-	       mdname(mddev), conf-&gt;raid_disks - mddev-&gt;degraded);</div><div class='add'>+	       mdname(mddev), conf-&gt;geo.raid_disks - mddev-&gt;degraded);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void print_conf(struct r10conf *conf)</div><div class='hunk'>@@ -1458,10 +1554,10 @@ static void print_conf(struct r10conf *conf)</div><div class='ctx'> 		printk(KERN_DEBUG "(!conf)\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	printk(KERN_DEBUG " --- wd:%d rd:%d\n", conf-&gt;raid_disks - conf-&gt;mddev-&gt;degraded,</div><div class='del'>-		conf-&gt;raid_disks);</div><div class='add'>+	printk(KERN_DEBUG " --- wd:%d rd:%d\n", conf-&gt;geo.raid_disks - conf-&gt;mddev-&gt;degraded,</div><div class='add'>+		conf-&gt;geo.raid_disks);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; conf-&gt;raid_disks; i++) {</div><div class='add'>+	for (i = 0; i &lt; conf-&gt;geo.raid_disks; i++) {</div><div class='ctx'> 		char b[BDEVNAME_SIZE];</div><div class='ctx'> 		tmp = conf-&gt;mirrors + i;</div><div class='ctx'> 		if (tmp-&gt;rdev)</div><div class='hunk'>@@ -1493,7 +1589,7 @@ static int raid10_spare_active(struct mddev *mddev)</div><div class='ctx'> 	 * Find all non-in_sync disks within the RAID10 configuration</div><div class='ctx'> 	 * and mark them in_sync</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; conf-&gt;raid_disks; i++) {</div><div class='add'>+	for (i = 0; i &lt; conf-&gt;geo.raid_disks; i++) {</div><div class='ctx'> 		tmp = conf-&gt;mirrors + i;</div><div class='ctx'> 		if (tmp-&gt;replacement</div><div class='ctx'> 		    &amp;&amp; tmp-&gt;replacement-&gt;recovery_offset == MaxSector</div><div class='hunk'>@@ -1535,7 +1631,7 @@ static int raid10_add_disk(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> 	int err = -EEXIST;</div><div class='ctx'> 	int mirror;</div><div class='ctx'> 	int first = 0;</div><div class='del'>-	int last = conf-&gt;raid_disks - 1;</div><div class='add'>+	int last = conf-&gt;geo.raid_disks - 1;</div><div class='ctx'> 	struct request_queue *q = bdev_get_queue(rdev-&gt;bdev);</div><div class='ctx'> </div><div class='ctx'> 	if (mddev-&gt;recovery_cp &lt; MaxSector)</div><div class='hunk'>@@ -1543,7 +1639,7 @@ static int raid10_add_disk(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> 		 * very different from resync</div><div class='ctx'> 		 */</div><div class='ctx'> 		return -EBUSY;</div><div class='del'>-	if (rdev-&gt;saved_raid_disk &lt; 0 &amp;&amp; !enough(conf, -1))</div><div class='add'>+	if (rdev-&gt;saved_raid_disk &lt; 0 &amp;&amp; !_enough(conf, &amp;conf-&gt;prev, -1))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (rdev-&gt;raid_disk &gt;= 0)</div><div class='hunk'>@@ -1635,6 +1731,7 @@ static int raid10_remove_disk(struct mddev *mddev, struct md_rdev *rdev)</div><div class='ctx'> 	if (!test_bit(Faulty, &amp;rdev-&gt;flags) &amp;&amp;</div><div class='ctx'> 	    mddev-&gt;recovery_disabled != p-&gt;recovery_disabled &amp;&amp;</div><div class='ctx'> 	    (!p-&gt;replacement || p-&gt;replacement == rdev) &amp;&amp;</div><div class='add'>+	    number &lt; conf-&gt;geo.raid_disks &amp;&amp;</div><div class='ctx'> 	    enough(conf, -1)) {</div><div class='ctx'> 		err = -EBUSY;</div><div class='ctx'> 		goto abort;</div><div class='hunk'>@@ -1676,7 +1773,11 @@ static void end_sync_read(struct bio *bio, int error)</div><div class='ctx'> 	struct r10conf *conf = r10_bio-&gt;mddev-&gt;private;</div><div class='ctx'> 	int d;</div><div class='ctx'> </div><div class='del'>-	d = find_bio_disk(conf, r10_bio, bio, NULL, NULL);</div><div class='add'>+	if (bio == r10_bio-&gt;master_bio) {</div><div class='add'>+		/* this is a reshape read */</div><div class='add'>+		d = r10_bio-&gt;read_slot; /* really the read dev */</div><div class='add'>+	} else</div><div class='add'>+		d = find_bio_disk(conf, r10_bio, bio, NULL, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(BIO_UPTODATE, &amp;bio-&gt;bi_flags))</div><div class='ctx'> 		set_bit(R10BIO_Uptodate, &amp;r10_bio-&gt;state);</div><div class='hunk'>@@ -2218,7 +2319,9 @@ static void fix_read_error(struct r10conf *conf, struct mddev *mddev, struct r10</div><div class='ctx'> 				       " (%d sectors at %llu on %s)\n",</div><div class='ctx'> 				       mdname(mddev), s,</div><div class='ctx'> 				       (unsigned long long)(</div><div class='del'>-					       sect + rdev-&gt;data_offset),</div><div class='add'>+					       sect +</div><div class='add'>+					       choose_data_offset(r10_bio,</div><div class='add'>+								  rdev)),</div><div class='ctx'> 				       bdevname(rdev-&gt;bdev, b));</div><div class='ctx'> 				printk(KERN_NOTICE "md/raid10:%s: %s: failing "</div><div class='ctx'> 				       "drive\n",</div><div class='hunk'>@@ -2256,7 +2359,8 @@ static void fix_read_error(struct r10conf *conf, struct mddev *mddev, struct r10</div><div class='ctx'> 				       " (%d sectors at %llu on %s)\n",</div><div class='ctx'> 				       mdname(mddev), s,</div><div class='ctx'> 				       (unsigned long long)(</div><div class='del'>-					       sect + rdev-&gt;data_offset),</div><div class='add'>+					       sect +</div><div class='add'>+					       choose_data_offset(r10_bio, rdev)),</div><div class='ctx'> 				       bdevname(rdev-&gt;bdev, b));</div><div class='ctx'> 				printk(KERN_NOTICE "md/raid10:%s: %s: failing "</div><div class='ctx'> 				       "drive\n",</div><div class='hunk'>@@ -2269,7 +2373,8 @@ static void fix_read_error(struct r10conf *conf, struct mddev *mddev, struct r10</div><div class='ctx'> 				       " (%d sectors at %llu on %s)\n",</div><div class='ctx'> 				       mdname(mddev), s,</div><div class='ctx'> 				       (unsigned long long)(</div><div class='del'>-					       sect + rdev-&gt;data_offset),</div><div class='add'>+					       sect +</div><div class='add'>+					       choose_data_offset(r10_bio, rdev)),</div><div class='ctx'> 				       bdevname(rdev-&gt;bdev, b));</div><div class='ctx'> 				atomic_add(s, &amp;rdev-&gt;corrected_errors);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -2343,7 +2448,7 @@ static int narrow_write_error(struct r10bio *r10_bio, int i)</div><div class='ctx'> 		wbio = bio_clone_mddev(bio, GFP_NOIO, mddev);</div><div class='ctx'> 		md_trim_bio(wbio, sector - bio-&gt;bi_sector, sectors);</div><div class='ctx'> 		wbio-&gt;bi_sector = (r10_bio-&gt;devs[i].addr+</div><div class='del'>-				   rdev-&gt;data_offset+</div><div class='add'>+				   choose_data_offset(r10_bio, rdev) +</div><div class='ctx'> 				   (sector - r10_bio-&gt;sector));</div><div class='ctx'> 		wbio-&gt;bi_bdev = rdev-&gt;bdev;</div><div class='ctx'> 		if (submit_bio_wait(WRITE, wbio) == 0)</div><div class='hunk'>@@ -2420,7 +2525,7 @@ read_more:</div><div class='ctx'> 	r10_bio-&gt;devs[slot].bio = bio;</div><div class='ctx'> 	r10_bio-&gt;devs[slot].rdev = rdev;</div><div class='ctx'> 	bio-&gt;bi_sector = r10_bio-&gt;devs[slot].addr</div><div class='del'>-		+ rdev-&gt;data_offset;</div><div class='add'>+		+ choose_data_offset(r10_bio, rdev);</div><div class='ctx'> 	bio-&gt;bi_bdev = rdev-&gt;bdev;</div><div class='ctx'> 	bio-&gt;bi_rw = READ | do_sync;</div><div class='ctx'> 	bio-&gt;bi_private = r10_bio;</div><div class='hunk'>@@ -2480,7 +2585,7 @@ static void handle_write_completed(struct r10conf *conf, struct r10bio *r10_bio)</div><div class='ctx'> 				rdev_clear_badblocks(</div><div class='ctx'> 					rdev,</div><div class='ctx'> 					r10_bio-&gt;devs[m].addr,</div><div class='del'>-					r10_bio-&gt;sectors);</div><div class='add'>+					r10_bio-&gt;sectors, 0);</div><div class='ctx'> 			} else {</div><div class='ctx'> 				if (!rdev_set_badblocks(</div><div class='ctx'> 					    rdev,</div><div class='hunk'>@@ -2496,7 +2601,7 @@ static void handle_write_completed(struct r10conf *conf, struct r10bio *r10_bio)</div><div class='ctx'> 				rdev_clear_badblocks(</div><div class='ctx'> 					rdev,</div><div class='ctx'> 					r10_bio-&gt;devs[m].addr,</div><div class='del'>-					r10_bio-&gt;sectors);</div><div class='add'>+					r10_bio-&gt;sectors, 0);</div><div class='ctx'> 			} else {</div><div class='ctx'> 				if (!rdev_set_badblocks(</div><div class='ctx'> 					    rdev,</div><div class='hunk'>@@ -2515,7 +2620,7 @@ static void handle_write_completed(struct r10conf *conf, struct r10bio *r10_bio)</div><div class='ctx'> 				rdev_clear_badblocks(</div><div class='ctx'> 					rdev,</div><div class='ctx'> 					r10_bio-&gt;devs[m].addr,</div><div class='del'>-					r10_bio-&gt;sectors);</div><div class='add'>+					r10_bio-&gt;sectors, 0);</div><div class='ctx'> 				rdev_dec_pending(rdev, conf-&gt;mddev);</div><div class='ctx'> 			} else if (bio != NULL &amp;&amp;</div><div class='ctx'> 				   !test_bit(BIO_UPTODATE, &amp;bio-&gt;bi_flags)) {</div><div class='hunk'>@@ -2532,7 +2637,7 @@ static void handle_write_completed(struct r10conf *conf, struct r10bio *r10_bio)</div><div class='ctx'> 				rdev_clear_badblocks(</div><div class='ctx'> 					rdev,</div><div class='ctx'> 					r10_bio-&gt;devs[m].addr,</div><div class='del'>-					r10_bio-&gt;sectors);</div><div class='add'>+					r10_bio-&gt;sectors, 0);</div><div class='ctx'> 				rdev_dec_pending(rdev, conf-&gt;mddev);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2573,6 +2678,8 @@ static void raid10d(struct mddev *mddev)</div><div class='ctx'> 		if (test_bit(R10BIO_MadeGood, &amp;r10_bio-&gt;state) ||</div><div class='ctx'> 		    test_bit(R10BIO_WriteError, &amp;r10_bio-&gt;state))</div><div class='ctx'> 			handle_write_completed(conf, r10_bio);</div><div class='add'>+		else if (test_bit(R10BIO_IsReshape, &amp;r10_bio-&gt;state))</div><div class='add'>+			reshape_request_write(mddev, r10_bio);</div><div class='ctx'> 		else if (test_bit(R10BIO_IsSync, &amp;r10_bio-&gt;state))</div><div class='ctx'> 			sync_request_write(mddev, r10_bio);</div><div class='ctx'> 		else if (test_bit(R10BIO_IsRecover, &amp;r10_bio-&gt;state))</div><div class='hunk'>@@ -2603,7 +2710,7 @@ static int init_resync(struct r10conf *conf)</div><div class='ctx'> 	buffs = RESYNC_WINDOW / RESYNC_BLOCK_SIZE;</div><div class='ctx'> 	BUG_ON(conf-&gt;r10buf_pool);</div><div class='ctx'> 	conf-&gt;have_replacement = 0;</div><div class='del'>-	for (i = 0; i &lt; conf-&gt;raid_disks; i++)</div><div class='add'>+	for (i = 0; i &lt; conf-&gt;geo.raid_disks; i++)</div><div class='ctx'> 		if (conf-&gt;mirrors[i].replacement)</div><div class='ctx'> 			conf-&gt;have_replacement = 1;</div><div class='ctx'> 	conf-&gt;r10buf_pool = mempool_create(buffs, r10buf_pool_alloc, r10buf_pool_free, conf);</div><div class='hunk'>@@ -2657,6 +2764,7 @@ static sector_t sync_request(struct mddev *mddev, sector_t sector_nr,</div><div class='ctx'> 	sector_t sync_blocks;</div><div class='ctx'> 	sector_t sectors_skipped = 0;</div><div class='ctx'> 	int chunks_skipped = 0;</div><div class='add'>+	sector_t chunk_mask = conf-&gt;geo.chunk_mask;</div><div class='ctx'> </div><div class='ctx'> 	if (!conf-&gt;r10buf_pool)</div><div class='ctx'> 		if (init_resync(conf))</div><div class='hunk'>@@ -2664,7 +2772,8 @@ static sector_t sync_request(struct mddev *mddev, sector_t sector_nr,</div><div class='ctx'> </div><div class='ctx'>  skipped:</div><div class='ctx'> 	max_sector = mddev-&gt;dev_sectors;</div><div class='del'>-	if (test_bit(MD_RECOVERY_SYNC, &amp;mddev-&gt;recovery))</div><div class='add'>+	if (test_bit(MD_RECOVERY_SYNC, &amp;mddev-&gt;recovery) ||</div><div class='add'>+	    test_bit(MD_RECOVERY_RESHAPE, &amp;mddev-&gt;recovery))</div><div class='ctx'> 		max_sector = mddev-&gt;resync_max_sectors;</div><div class='ctx'> 	if (sector_nr &gt;= max_sector) {</div><div class='ctx'> 		/* If we aborted, we need to abort the</div><div class='hunk'>@@ -2676,11 +2785,16 @@ static sector_t sync_request(struct mddev *mddev, sector_t sector_nr,</div><div class='ctx'> 		 * we need to convert that to several</div><div class='ctx'> 		 * virtual addresses.</div><div class='ctx'> 		 */</div><div class='add'>+		if (test_bit(MD_RECOVERY_RESHAPE, &amp;mddev-&gt;recovery)) {</div><div class='add'>+			end_reshape(conf);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (mddev-&gt;curr_resync &lt; max_sector) { /* aborted */</div><div class='ctx'> 			if (test_bit(MD_RECOVERY_SYNC, &amp;mddev-&gt;recovery))</div><div class='ctx'> 				bitmap_end_sync(mddev-&gt;bitmap, mddev-&gt;curr_resync,</div><div class='ctx'> 						&amp;sync_blocks, 1);</div><div class='del'>-			else for (i=0; i&lt;conf-&gt;raid_disks; i++) {</div><div class='add'>+			else for (i = 0; i &lt; conf-&gt;geo.raid_disks; i++) {</div><div class='ctx'> 				sector_t sect =</div><div class='ctx'> 					raid10_find_virt(conf, mddev-&gt;curr_resync, i);</div><div class='ctx'> 				bitmap_end_sync(mddev-&gt;bitmap, sect,</div><div class='hunk'>@@ -2694,7 +2808,7 @@ static sector_t sync_request(struct mddev *mddev, sector_t sector_nr,</div><div class='ctx'> 				/* Completed a full sync so the replacements</div><div class='ctx'> 				 * are now fully recovered.</div><div class='ctx'> 				 */</div><div class='del'>-				for (i = 0; i &lt; conf-&gt;raid_disks; i++)</div><div class='add'>+				for (i = 0; i &lt; conf-&gt;geo.raid_disks; i++)</div><div class='ctx'> 					if (conf-&gt;mirrors[i].replacement)</div><div class='ctx'> 						conf-&gt;mirrors[i].replacement</div><div class='ctx'> 							-&gt;recovery_offset</div><div class='hunk'>@@ -2707,7 +2821,11 @@ static sector_t sync_request(struct mddev *mddev, sector_t sector_nr,</div><div class='ctx'> 		*skipped = 1;</div><div class='ctx'> 		return sectors_skipped;</div><div class='ctx'> 	}</div><div class='del'>-	if (chunks_skipped &gt;= conf-&gt;raid_disks) {</div><div class='add'>+</div><div class='add'>+	if (test_bit(MD_RECOVERY_RESHAPE, &amp;mddev-&gt;recovery))</div><div class='add'>+		return reshape_request(mddev, sector_nr, skipped);</div><div class='add'>+</div><div class='add'>+	if (chunks_skipped &gt;= conf-&gt;geo.raid_disks) {</div><div class='ctx'> 		/* if there has been nothing to do on any drive,</div><div class='ctx'> 		 * then there is nothing to do at all..</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -2721,9 +2839,9 @@ static sector_t sync_request(struct mddev *mddev, sector_t sector_nr,</div><div class='ctx'> 	/* make sure whole request will fit in a chunk - if chunks</div><div class='ctx'> 	 * are meaningful</div><div class='ctx'> 	 */</div><div class='del'>-	if (conf-&gt;near_copies &lt; conf-&gt;raid_disks &amp;&amp;</div><div class='del'>-	    max_sector &gt; (sector_nr | conf-&gt;chunk_mask))</div><div class='del'>-		max_sector = (sector_nr | conf-&gt;chunk_mask) + 1;</div><div class='add'>+	if (conf-&gt;geo.near_copies &lt; conf-&gt;geo.raid_disks &amp;&amp;</div><div class='add'>+	    max_sector &gt; (sector_nr | chunk_mask))</div><div class='add'>+		max_sector = (sector_nr | chunk_mask) + 1;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If there is non-resync activity waiting for us then</div><div class='ctx'> 	 * put in a delay to throttle resync.</div><div class='hunk'>@@ -2752,7 +2870,7 @@ static sector_t sync_request(struct mddev *mddev, sector_t sector_nr,</div><div class='ctx'> 		int j;</div><div class='ctx'> 		r10_bio = NULL;</div><div class='ctx'> </div><div class='del'>-		for (i=0 ; i&lt;conf-&gt;raid_disks; i++) {</div><div class='add'>+		for (i = 0 ; i &lt; conf-&gt;geo.raid_disks; i++) {</div><div class='ctx'> 			int still_degraded;</div><div class='ctx'> 			struct r10bio *rb2;</div><div class='ctx'> 			sector_t sect;</div><div class='hunk'>@@ -2806,7 +2924,7 @@ static sector_t sync_request(struct mddev *mddev, sector_t sector_nr,</div><div class='ctx'> 			/* Need to check if the array will still be</div><div class='ctx'> 			 * degraded</div><div class='ctx'> 			 */</div><div class='del'>-			for (j=0; j&lt;conf-&gt;raid_disks; j++)</div><div class='add'>+			for (j = 0; j &lt; conf-&gt;geo.raid_disks; j++)</div><div class='ctx'> 				if (conf-&gt;mirrors[j].rdev == NULL ||</div><div class='ctx'> 				    test_bit(Faulty, &amp;conf-&gt;mirrors[j].rdev-&gt;flags)) {</div><div class='ctx'> 					still_degraded = 1;</div><div class='hunk'>@@ -2984,9 +3102,9 @@ static sector_t sync_request(struct mddev *mddev, sector_t sector_nr,</div><div class='ctx'> 		r10_bio-&gt;sector = sector_nr;</div><div class='ctx'> 		set_bit(R10BIO_IsSync, &amp;r10_bio-&gt;state);</div><div class='ctx'> 		raid10_find_phys(conf, r10_bio);</div><div class='del'>-		r10_bio-&gt;sectors = (sector_nr | conf-&gt;chunk_mask) - sector_nr +1;</div><div class='add'>+		r10_bio-&gt;sectors = (sector_nr | chunk_mask) - sector_nr + 1;</div><div class='ctx'> </div><div class='del'>-		for (i=0; i&lt;conf-&gt;copies; i++) {</div><div class='add'>+		for (i = 0; i &lt; conf-&gt;copies; i++) {</div><div class='ctx'> 			int d = r10_bio-&gt;devs[i].devnum;</div><div class='ctx'> 			sector_t first_bad, sector;</div><div class='ctx'> 			int bad_sectors;</div><div class='hunk'>@@ -3152,40 +3270,107 @@ raid10_size(struct mddev *mddev, sector_t sectors, int raid_disks)</div><div class='ctx'> 	struct r10conf *conf = mddev-&gt;private;</div><div class='ctx'> </div><div class='ctx'> 	if (!raid_disks)</div><div class='del'>-		raid_disks = conf-&gt;raid_disks;</div><div class='add'>+		raid_disks = min(conf-&gt;geo.raid_disks,</div><div class='add'>+				 conf-&gt;prev.raid_disks);</div><div class='ctx'> 	if (!sectors)</div><div class='ctx'> 		sectors = conf-&gt;dev_sectors;</div><div class='ctx'> </div><div class='del'>-	size = sectors &gt;&gt; conf-&gt;chunk_shift;</div><div class='del'>-	sector_div(size, conf-&gt;far_copies);</div><div class='add'>+	size = sectors &gt;&gt; conf-&gt;geo.chunk_shift;</div><div class='add'>+	sector_div(size, conf-&gt;geo.far_copies);</div><div class='ctx'> 	size = size * raid_disks;</div><div class='del'>-	sector_div(size, conf-&gt;near_copies);</div><div class='add'>+	sector_div(size, conf-&gt;geo.near_copies);</div><div class='add'>+</div><div class='add'>+	return size &lt;&lt; conf-&gt;geo.chunk_shift;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void calc_sectors(struct r10conf *conf, sector_t size)</div><div class='add'>+{</div><div class='add'>+	/* Calculate the number of sectors-per-device that will</div><div class='add'>+	 * actually be used, and set conf-&gt;dev_sectors and</div><div class='add'>+	 * conf-&gt;stride</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='del'>-	return size &lt;&lt; conf-&gt;chunk_shift;</div><div class='add'>+	size = size &gt;&gt; conf-&gt;geo.chunk_shift;</div><div class='add'>+	sector_div(size, conf-&gt;geo.far_copies);</div><div class='add'>+	size = size * conf-&gt;geo.raid_disks;</div><div class='add'>+	sector_div(size, conf-&gt;geo.near_copies);</div><div class='add'>+	/* 'size' is now the number of chunks in the array */</div><div class='add'>+	/* calculate "used chunks per device" */</div><div class='add'>+	size = size * conf-&gt;copies;</div><div class='add'>+</div><div class='add'>+	/* We need to round up when dividing by raid_disks to</div><div class='add'>+	 * get the stride size.</div><div class='add'>+	 */</div><div class='add'>+	size = DIV_ROUND_UP_SECTOR_T(size, conf-&gt;geo.raid_disks);</div><div class='add'>+</div><div class='add'>+	conf-&gt;dev_sectors = size &lt;&lt; conf-&gt;geo.chunk_shift;</div><div class='add'>+</div><div class='add'>+	if (conf-&gt;geo.far_offset)</div><div class='add'>+		conf-&gt;geo.stride = 1 &lt;&lt; conf-&gt;geo.chunk_shift;</div><div class='add'>+	else {</div><div class='add'>+		sector_div(size, conf-&gt;geo.far_copies);</div><div class='add'>+		conf-&gt;geo.stride = size &lt;&lt; conf-&gt;geo.chunk_shift;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+enum geo_type {geo_new, geo_old, geo_start};</div><div class='add'>+static int setup_geo(struct geom *geo, struct mddev *mddev, enum geo_type new)</div><div class='add'>+{</div><div class='add'>+	int nc, fc, fo;</div><div class='add'>+	int layout, chunk, disks;</div><div class='add'>+	switch (new) {</div><div class='add'>+	case geo_old:</div><div class='add'>+		layout = mddev-&gt;layout;</div><div class='add'>+		chunk = mddev-&gt;chunk_sectors;</div><div class='add'>+		disks = mddev-&gt;raid_disks - mddev-&gt;delta_disks;</div><div class='add'>+		break;</div><div class='add'>+	case geo_new:</div><div class='add'>+		layout = mddev-&gt;new_layout;</div><div class='add'>+		chunk = mddev-&gt;new_chunk_sectors;</div><div class='add'>+		disks = mddev-&gt;raid_disks;</div><div class='add'>+		break;</div><div class='add'>+	default: /* avoid 'may be unused' warnings */</div><div class='add'>+	case geo_start: /* new when starting reshape - raid_disks not</div><div class='add'>+			 * updated yet. */</div><div class='add'>+		layout = mddev-&gt;new_layout;</div><div class='add'>+		chunk = mddev-&gt;new_chunk_sectors;</div><div class='add'>+		disks = mddev-&gt;raid_disks + mddev-&gt;delta_disks;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (layout &gt;&gt; 17)</div><div class='add'>+		return -1;</div><div class='add'>+	if (chunk &lt; (PAGE_SIZE &gt;&gt; 9) ||</div><div class='add'>+	    !is_power_of_2(chunk))</div><div class='add'>+		return -2;</div><div class='add'>+	nc = layout &amp; 255;</div><div class='add'>+	fc = (layout &gt;&gt; 8) &amp; 255;</div><div class='add'>+	fo = layout &amp; (1&lt;&lt;16);</div><div class='add'>+	geo-&gt;raid_disks = disks;</div><div class='add'>+	geo-&gt;near_copies = nc;</div><div class='add'>+	geo-&gt;far_copies = fc;</div><div class='add'>+	geo-&gt;far_offset = fo;</div><div class='add'>+	geo-&gt;chunk_mask = chunk - 1;</div><div class='add'>+	geo-&gt;chunk_shift = ffz(~chunk);</div><div class='add'>+	return nc*fc;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static struct r10conf *setup_conf(struct mddev *mddev)</div><div class='ctx'> {</div><div class='ctx'> 	struct r10conf *conf = NULL;</div><div class='del'>-	int nc, fc, fo;</div><div class='del'>-	sector_t stride, size;</div><div class='ctx'> 	int err = -EINVAL;</div><div class='add'>+	struct geom geo;</div><div class='add'>+	int copies;</div><div class='ctx'> </div><div class='del'>-	if (mddev-&gt;new_chunk_sectors &lt; (PAGE_SIZE &gt;&gt; 9) ||</div><div class='del'>-	    !is_power_of_2(mddev-&gt;new_chunk_sectors)) {</div><div class='add'>+	copies = setup_geo(&amp;geo, mddev, geo_new);</div><div class='add'>+</div><div class='add'>+	if (copies == -2) {</div><div class='ctx'> 		printk(KERN_ERR "md/raid10:%s: chunk size must be "</div><div class='ctx'> 		       "at least PAGE_SIZE(%ld) and be a power of 2.\n",</div><div class='ctx'> 		       mdname(mddev), PAGE_SIZE);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	nc = mddev-&gt;new_layout &amp; 255;</div><div class='del'>-	fc = (mddev-&gt;new_layout &gt;&gt; 8) &amp; 255;</div><div class='del'>-	fo = mddev-&gt;new_layout &amp; (1&lt;&lt;16);</div><div class='del'>-</div><div class='del'>-	if ((nc*fc) &lt;2 || (nc*fc) &gt; mddev-&gt;raid_disks ||</div><div class='del'>-	    (mddev-&gt;new_layout &gt;&gt; 17)) {</div><div class='add'>+	if (copies &lt; 2 || copies &gt; mddev-&gt;raid_disks) {</div><div class='ctx'> 		printk(KERN_ERR "md/raid10:%s: unsupported raid10 layout: 0x%8x\n",</div><div class='ctx'> 		       mdname(mddev), mddev-&gt;new_layout);</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -3196,7 +3381,9 @@ static struct r10conf *setup_conf(struct mddev *mddev)</div><div class='ctx'> 	if (!conf)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	conf-&gt;mirrors = kzalloc(sizeof(struct mirror_info)*mddev-&gt;raid_disks,</div><div class='add'>+	/* FIXME calc properly */</div><div class='add'>+	conf-&gt;mirrors = kzalloc(sizeof(struct mirror_info)*(mddev-&gt;raid_disks +</div><div class='add'>+							    max(0,mddev-&gt;delta_disks)),</div><div class='ctx'> 				GFP_KERNEL);</div><div class='ctx'> 	if (!conf-&gt;mirrors)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -3205,43 +3392,29 @@ static struct r10conf *setup_conf(struct mddev *mddev)</div><div class='ctx'> 	if (!conf-&gt;tmppage)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	conf-&gt;raid_disks = mddev-&gt;raid_disks;</div><div class='del'>-	conf-&gt;near_copies = nc;</div><div class='del'>-	conf-&gt;far_copies = fc;</div><div class='del'>-	conf-&gt;copies = nc*fc;</div><div class='del'>-	conf-&gt;far_offset = fo;</div><div class='del'>-	conf-&gt;chunk_mask = mddev-&gt;new_chunk_sectors - 1;</div><div class='del'>-	conf-&gt;chunk_shift = ffz(~mddev-&gt;new_chunk_sectors);</div><div class='del'>-</div><div class='add'>+	conf-&gt;geo = geo;</div><div class='add'>+	conf-&gt;copies = copies;</div><div class='ctx'> 	conf-&gt;r10bio_pool = mempool_create(NR_RAID10_BIOS, r10bio_pool_alloc,</div><div class='ctx'> 					   r10bio_pool_free, conf);</div><div class='ctx'> 	if (!conf-&gt;r10bio_pool)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	size = mddev-&gt;dev_sectors &gt;&gt; conf-&gt;chunk_shift;</div><div class='del'>-	sector_div(size, fc);</div><div class='del'>-	size = size * conf-&gt;raid_disks;</div><div class='del'>-	sector_div(size, nc);</div><div class='del'>-	/* 'size' is now the number of chunks in the array */</div><div class='del'>-	/* calculate "used chunks per device" in 'stride' */</div><div class='del'>-	stride = size * conf-&gt;copies;</div><div class='del'>-</div><div class='del'>-	/* We need to round up when dividing by raid_disks to</div><div class='del'>-	 * get the stride size.</div><div class='del'>-	 */</div><div class='del'>-	stride += conf-&gt;raid_disks - 1;</div><div class='del'>-	sector_div(stride, conf-&gt;raid_disks);</div><div class='del'>-</div><div class='del'>-	conf-&gt;dev_sectors = stride &lt;&lt; conf-&gt;chunk_shift;</div><div class='del'>-</div><div class='del'>-	if (fo)</div><div class='del'>-		stride = 1;</div><div class='del'>-	else</div><div class='del'>-		sector_div(stride, fc);</div><div class='del'>-	conf-&gt;stride = stride &lt;&lt; conf-&gt;chunk_shift;</div><div class='del'>-</div><div class='del'>-</div><div class='add'>+	calc_sectors(conf, mddev-&gt;dev_sectors);</div><div class='add'>+	if (mddev-&gt;reshape_position == MaxSector) {</div><div class='add'>+		conf-&gt;prev = conf-&gt;geo;</div><div class='add'>+		conf-&gt;reshape_progress = MaxSector;</div><div class='add'>+	} else {</div><div class='add'>+		if (setup_geo(&amp;conf-&gt;prev, mddev, geo_old) != conf-&gt;copies) {</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		conf-&gt;reshape_progress = mddev-&gt;reshape_position;</div><div class='add'>+		if (conf-&gt;prev.far_offset)</div><div class='add'>+			conf-&gt;prev.stride = 1 &lt;&lt; conf-&gt;prev.chunk_shift;</div><div class='add'>+		else</div><div class='add'>+			/* far_copies must be 1 */</div><div class='add'>+			conf-&gt;prev.stride = conf-&gt;dev_sectors;</div><div class='add'>+	}</div><div class='ctx'> 	spin_lock_init(&amp;conf-&gt;device_lock);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;conf-&gt;retry_list);</div><div class='ctx'> </div><div class='hunk'>@@ -3256,8 +3429,9 @@ static struct r10conf *setup_conf(struct mddev *mddev)</div><div class='ctx'> 	return conf;</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='del'>-	printk(KERN_ERR "md/raid10:%s: couldn't allocate memory.\n",</div><div class='del'>-	       mdname(mddev));</div><div class='add'>+	if (err == -ENOMEM)</div><div class='add'>+		printk(KERN_ERR "md/raid10:%s: couldn't allocate memory.\n",</div><div class='add'>+		       mdname(mddev));</div><div class='ctx'> 	if (conf) {</div><div class='ctx'> 		if (conf-&gt;r10bio_pool)</div><div class='ctx'> 			mempool_destroy(conf-&gt;r10bio_pool);</div><div class='hunk'>@@ -3275,12 +3449,8 @@ static int run(struct mddev *mddev)</div><div class='ctx'> 	struct mirror_info *disk;</div><div class='ctx'> 	struct md_rdev *rdev;</div><div class='ctx'> 	sector_t size;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * copy the already verified devices into our private RAID10</div><div class='del'>-	 * bookkeeping area. [whatever we allocate in run(),</div><div class='del'>-	 * should be freed in stop()]</div><div class='del'>-	 */</div><div class='add'>+	sector_t min_offset_diff = 0;</div><div class='add'>+	int first = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (mddev-&gt;private == NULL) {</div><div class='ctx'> 		conf = setup_conf(mddev);</div><div class='hunk'>@@ -3297,17 +3467,21 @@ static int run(struct mddev *mddev)</div><div class='ctx'> </div><div class='ctx'> 	chunk_size = mddev-&gt;chunk_sectors &lt;&lt; 9;</div><div class='ctx'> 	blk_queue_io_min(mddev-&gt;queue, chunk_size);</div><div class='del'>-	if (conf-&gt;raid_disks % conf-&gt;near_copies)</div><div class='del'>-		blk_queue_io_opt(mddev-&gt;queue, chunk_size * conf-&gt;raid_disks);</div><div class='add'>+	if (conf-&gt;geo.raid_disks % conf-&gt;geo.near_copies)</div><div class='add'>+		blk_queue_io_opt(mddev-&gt;queue, chunk_size * conf-&gt;geo.raid_disks);</div><div class='ctx'> 	else</div><div class='ctx'> 		blk_queue_io_opt(mddev-&gt;queue, chunk_size *</div><div class='del'>-				 (conf-&gt;raid_disks / conf-&gt;near_copies));</div><div class='add'>+				 (conf-&gt;geo.raid_disks / conf-&gt;geo.near_copies));</div><div class='ctx'> </div><div class='ctx'> 	rdev_for_each(rdev, mddev) {</div><div class='add'>+		long long diff;</div><div class='add'>+		struct request_queue *q;</div><div class='ctx'> </div><div class='ctx'> 		disk_idx = rdev-&gt;raid_disk;</div><div class='del'>-		if (disk_idx &gt;= conf-&gt;raid_disks</div><div class='del'>-		    || disk_idx &lt; 0)</div><div class='add'>+		if (disk_idx &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+		if (disk_idx &gt;= conf-&gt;geo.raid_disks &amp;&amp;</div><div class='add'>+		    disk_idx &gt;= conf-&gt;prev.raid_disks)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		disk = conf-&gt;mirrors + disk_idx;</div><div class='ctx'> </div><div class='hunk'>@@ -3320,12 +3494,23 @@ static int run(struct mddev *mddev)</div><div class='ctx'> 				goto out_free_conf;</div><div class='ctx'> 			disk-&gt;rdev = rdev;</div><div class='ctx'> 		}</div><div class='add'>+		q = bdev_get_queue(rdev-&gt;bdev);</div><div class='add'>+		if (q-&gt;merge_bvec_fn)</div><div class='add'>+			mddev-&gt;merge_check_needed = 1;</div><div class='add'>+		diff = (rdev-&gt;new_data_offset - rdev-&gt;data_offset);</div><div class='add'>+		if (!mddev-&gt;reshape_backwards)</div><div class='add'>+			diff = -diff;</div><div class='add'>+		if (diff &lt; 0)</div><div class='add'>+			diff = 0;</div><div class='add'>+		if (first || diff &lt; min_offset_diff)</div><div class='add'>+			min_offset_diff = diff;</div><div class='ctx'> </div><div class='ctx'> 		disk_stack_limits(mddev-&gt;gendisk, rdev-&gt;bdev,</div><div class='ctx'> 				  rdev-&gt;data_offset &lt;&lt; 9);</div><div class='ctx'> </div><div class='ctx'> 		disk-&gt;head_position = 0;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	/* need to check that every block has at least one working mirror */</div><div class='ctx'> 	if (!enough(conf, -1)) {</div><div class='ctx'> 		printk(KERN_ERR "md/raid10:%s: not enough operational mirrors.\n",</div><div class='hunk'>@@ -3333,8 +3518,21 @@ static int run(struct mddev *mddev)</div><div class='ctx'> 		goto out_free_conf;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (conf-&gt;reshape_progress != MaxSector) {</div><div class='add'>+		/* must ensure that shape change is supported */</div><div class='add'>+		if (conf-&gt;geo.far_copies != 1 &amp;&amp;</div><div class='add'>+		    conf-&gt;geo.far_offset == 0)</div><div class='add'>+			goto out_free_conf;</div><div class='add'>+		if (conf-&gt;prev.far_copies != 1 &amp;&amp;</div><div class='add'>+		    conf-&gt;geo.far_offset == 0)</div><div class='add'>+			goto out_free_conf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mddev-&gt;degraded = 0;</div><div class='del'>-	for (i = 0; i &lt; conf-&gt;raid_disks; i++) {</div><div class='add'>+	for (i = 0;</div><div class='add'>+	     i &lt; conf-&gt;geo.raid_disks</div><div class='add'>+		     || i &lt; conf-&gt;prev.raid_disks;</div><div class='add'>+	     i++) {</div><div class='ctx'> </div><div class='ctx'> 		disk = conf-&gt;mirrors + i;</div><div class='ctx'> </div><div class='hunk'>@@ -3361,8 +3559,8 @@ static int run(struct mddev *mddev)</div><div class='ctx'> 		       mdname(mddev));</div><div class='ctx'> 	printk(KERN_INFO</div><div class='ctx'> 		"md/raid10:%s: active with %d out of %d devices\n",</div><div class='del'>-		mdname(mddev), conf-&gt;raid_disks - mddev-&gt;degraded,</div><div class='del'>-		conf-&gt;raid_disks);</div><div class='add'>+		mdname(mddev), conf-&gt;geo.raid_disks - mddev-&gt;degraded,</div><div class='add'>+		conf-&gt;geo.raid_disks);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ok, everything is just fine now</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -3379,11 +3577,11 @@ static int run(struct mddev *mddev)</div><div class='ctx'> 	 * maybe...</div><div class='ctx'> 	 */</div><div class='ctx'> 	{</div><div class='del'>-		int stripe = conf-&gt;raid_disks *</div><div class='add'>+		int stripe = conf-&gt;geo.raid_disks *</div><div class='ctx'> 			((mddev-&gt;chunk_sectors &lt;&lt; 9) / PAGE_SIZE);</div><div class='del'>-		stripe /= conf-&gt;near_copies;</div><div class='del'>-		if (mddev-&gt;queue-&gt;backing_dev_info.ra_pages &lt; 2* stripe)</div><div class='del'>-			mddev-&gt;queue-&gt;backing_dev_info.ra_pages = 2* stripe;</div><div class='add'>+		stripe /= conf-&gt;geo.near_copies;</div><div class='add'>+		if (mddev-&gt;queue-&gt;backing_dev_info.ra_pages &lt; 2 * stripe)</div><div class='add'>+			mddev-&gt;queue-&gt;backing_dev_info.ra_pages = 2 * stripe;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	blk_queue_merge_bvec(mddev-&gt;queue, raid10_mergeable_bvec);</div><div class='hunk'>@@ -3391,6 +3589,30 @@ static int run(struct mddev *mddev)</div><div class='ctx'> 	if (md_integrity_register(mddev))</div><div class='ctx'> 		goto out_free_conf;</div><div class='ctx'> </div><div class='add'>+	if (conf-&gt;reshape_progress != MaxSector) {</div><div class='add'>+		unsigned long before_length, after_length;</div><div class='add'>+</div><div class='add'>+		before_length = ((1 &lt;&lt; conf-&gt;prev.chunk_shift) *</div><div class='add'>+				 conf-&gt;prev.far_copies);</div><div class='add'>+		after_length = ((1 &lt;&lt; conf-&gt;geo.chunk_shift) *</div><div class='add'>+				conf-&gt;geo.far_copies);</div><div class='add'>+</div><div class='add'>+		if (max(before_length, after_length) &gt; min_offset_diff) {</div><div class='add'>+			/* This cannot work */</div><div class='add'>+			printk("md/raid10: offset difference not enough to continue reshape\n");</div><div class='add'>+			goto out_free_conf;</div><div class='add'>+		}</div><div class='add'>+		conf-&gt;offset_diff = min_offset_diff;</div><div class='add'>+</div><div class='add'>+		conf-&gt;reshape_safe = conf-&gt;reshape_progress;</div><div class='add'>+		clear_bit(MD_RECOVERY_SYNC, &amp;mddev-&gt;recovery);</div><div class='add'>+		clear_bit(MD_RECOVERY_CHECK, &amp;mddev-&gt;recovery);</div><div class='add'>+		set_bit(MD_RECOVERY_RESHAPE, &amp;mddev-&gt;recovery);</div><div class='add'>+		set_bit(MD_RECOVERY_RUNNING, &amp;mddev-&gt;recovery);</div><div class='add'>+		mddev-&gt;sync_thread = md_register_thread(md_do_sync, mddev,</div><div class='add'>+							"reshape");</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_free_conf:</div><div class='hunk'>@@ -3453,14 +3675,23 @@ static int raid10_resize(struct mddev *mddev, sector_t sectors)</div><div class='ctx'> 	struct r10conf *conf = mddev-&gt;private;</div><div class='ctx'> 	sector_t oldsize, size;</div><div class='ctx'> </div><div class='del'>-	if (conf-&gt;far_copies &gt; 1 &amp;&amp; !conf-&gt;far_offset)</div><div class='add'>+	if (mddev-&gt;reshape_position != MaxSector)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (conf-&gt;geo.far_copies &gt; 1 &amp;&amp; !conf-&gt;geo.far_offset)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	oldsize = raid10_size(mddev, 0, 0);</div><div class='ctx'> 	size = raid10_size(mddev, sectors, 0);</div><div class='del'>-	md_set_array_sectors(mddev, size);</div><div class='del'>-	if (mddev-&gt;array_sectors &gt; size)</div><div class='add'>+	if (mddev-&gt;external_size &amp;&amp;</div><div class='add'>+	    mddev-&gt;array_sectors &gt; size)</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	if (mddev-&gt;bitmap) {</div><div class='add'>+		int ret = bitmap_resize(mddev-&gt;bitmap, size, 0, 0);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	md_set_array_sectors(mddev, size);</div><div class='ctx'> 	set_capacity(mddev-&gt;gendisk, mddev-&gt;array_sectors);</div><div class='ctx'> 	revalidate_disk(mddev-&gt;gendisk);</div><div class='ctx'> 	if (sectors &gt; mddev-&gt;dev_sectors &amp;&amp;</div><div class='hunk'>@@ -3468,7 +3699,8 @@ static int raid10_resize(struct mddev *mddev, sector_t sectors)</div><div class='ctx'> 		mddev-&gt;recovery_cp = oldsize;</div><div class='ctx'> 		set_bit(MD_RECOVERY_NEEDED, &amp;mddev-&gt;recovery);</div><div class='ctx'> 	}</div><div class='del'>-	mddev-&gt;dev_sectors = sectors;</div><div class='add'>+	calc_sectors(conf, sectors);</div><div class='add'>+	mddev-&gt;dev_sectors = conf-&gt;dev_sectors;</div><div class='ctx'> 	mddev-&gt;resync_max_sectors = size;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3526,6 +3758,758 @@ static void *raid10_takeover(struct mddev *mddev)</div><div class='ctx'> 	return ERR_PTR(-EINVAL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int raid10_check_reshape(struct mddev *mddev)</div><div class='add'>+{</div><div class='add'>+	/* Called when there is a request to change</div><div class='add'>+	 * - layout (to -&gt;new_layout)</div><div class='add'>+	 * - chunk size (to -&gt;new_chunk_sectors)</div><div class='add'>+	 * - raid_disks (by delta_disks)</div><div class='add'>+	 * or when trying to restart a reshape that was ongoing.</div><div class='add'>+	 *</div><div class='add'>+	 * We need to validate the request and possibly allocate</div><div class='add'>+	 * space if that might be an issue later.</div><div class='add'>+	 *</div><div class='add'>+	 * Currently we reject any reshape of a 'far' mode array,</div><div class='add'>+	 * allow chunk size to change if new is generally acceptable,</div><div class='add'>+	 * allow raid_disks to increase, and allow</div><div class='add'>+	 * a switch between 'near' mode and 'offset' mode.</div><div class='add'>+	 */</div><div class='add'>+	struct r10conf *conf = mddev-&gt;private;</div><div class='add'>+	struct geom geo;</div><div class='add'>+</div><div class='add'>+	if (conf-&gt;geo.far_copies != 1 &amp;&amp; !conf-&gt;geo.far_offset)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (setup_geo(&amp;geo, mddev, geo_start) != conf-&gt;copies)</div><div class='add'>+		/* mustn't change number of copies */</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (geo.far_copies &gt; 1 &amp;&amp; !geo.far_offset)</div><div class='add'>+		/* Cannot switch to 'far' mode */</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (mddev-&gt;array_sectors &amp; geo.chunk_mask)</div><div class='add'>+			/* not factor of array size */</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!enough(conf, -1))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	kfree(conf-&gt;mirrors_new);</div><div class='add'>+	conf-&gt;mirrors_new = NULL;</div><div class='add'>+	if (mddev-&gt;delta_disks &gt; 0) {</div><div class='add'>+		/* allocate new 'mirrors' list */</div><div class='add'>+		conf-&gt;mirrors_new = kzalloc(</div><div class='add'>+			sizeof(struct mirror_info)</div><div class='add'>+			*(mddev-&gt;raid_disks +</div><div class='add'>+			  mddev-&gt;delta_disks),</div><div class='add'>+			GFP_KERNEL);</div><div class='add'>+		if (!conf-&gt;mirrors_new)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Need to check if array has failed when deciding whether to:</div><div class='add'>+ *  - start an array</div><div class='add'>+ *  - remove non-faulty devices</div><div class='add'>+ *  - add a spare</div><div class='add'>+ *  - allow a reshape</div><div class='add'>+ * This determination is simple when no reshape is happening.</div><div class='add'>+ * However if there is a reshape, we need to carefully check</div><div class='add'>+ * both the before and after sections.</div><div class='add'>+ * This is because some failed devices may only affect one</div><div class='add'>+ * of the two sections, and some non-in_sync devices may</div><div class='add'>+ * be insync in the section most affected by failed devices.</div><div class='add'>+ */</div><div class='add'>+static int calc_degraded(struct r10conf *conf)</div><div class='add'>+{</div><div class='add'>+	int degraded, degraded2;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	degraded = 0;</div><div class='add'>+	/* 'prev' section first */</div><div class='add'>+	for (i = 0; i &lt; conf-&gt;prev.raid_disks; i++) {</div><div class='add'>+		struct md_rdev *rdev = rcu_dereference(conf-&gt;mirrors[i].rdev);</div><div class='add'>+		if (!rdev || test_bit(Faulty, &amp;rdev-&gt;flags))</div><div class='add'>+			degraded++;</div><div class='add'>+		else if (!test_bit(In_sync, &amp;rdev-&gt;flags))</div><div class='add'>+			/* When we can reduce the number of devices in</div><div class='add'>+			 * an array, this might not contribute to</div><div class='add'>+			 * 'degraded'.  It does now.</div><div class='add'>+			 */</div><div class='add'>+			degraded++;</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	if (conf-&gt;geo.raid_disks == conf-&gt;prev.raid_disks)</div><div class='add'>+		return degraded;</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	degraded2 = 0;</div><div class='add'>+	for (i = 0; i &lt; conf-&gt;geo.raid_disks; i++) {</div><div class='add'>+		struct md_rdev *rdev = rcu_dereference(conf-&gt;mirrors[i].rdev);</div><div class='add'>+		if (!rdev || test_bit(Faulty, &amp;rdev-&gt;flags))</div><div class='add'>+			degraded2++;</div><div class='add'>+		else if (!test_bit(In_sync, &amp;rdev-&gt;flags)) {</div><div class='add'>+			/* If reshape is increasing the number of devices,</div><div class='add'>+			 * this section has already been recovered, so</div><div class='add'>+			 * it doesn't contribute to degraded.</div><div class='add'>+			 * else it does.</div><div class='add'>+			 */</div><div class='add'>+			if (conf-&gt;geo.raid_disks &lt;= conf-&gt;prev.raid_disks)</div><div class='add'>+				degraded2++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	if (degraded2 &gt; degraded)</div><div class='add'>+		return degraded2;</div><div class='add'>+	return degraded;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int raid10_start_reshape(struct mddev *mddev)</div><div class='add'>+{</div><div class='add'>+	/* A 'reshape' has been requested. This commits</div><div class='add'>+	 * the various 'new' fields and sets MD_RECOVER_RESHAPE</div><div class='add'>+	 * This also checks if there are enough spares and adds them</div><div class='add'>+	 * to the array.</div><div class='add'>+	 * We currently require enough spares to make the final</div><div class='add'>+	 * array non-degraded.  We also require that the difference</div><div class='add'>+	 * between old and new data_offset - on each device - is</div><div class='add'>+	 * enough that we never risk over-writing.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	unsigned long before_length, after_length;</div><div class='add'>+	sector_t min_offset_diff = 0;</div><div class='add'>+	int first = 1;</div><div class='add'>+	struct geom new;</div><div class='add'>+	struct r10conf *conf = mddev-&gt;private;</div><div class='add'>+	struct md_rdev *rdev;</div><div class='add'>+	int spares = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (test_bit(MD_RECOVERY_RUNNING, &amp;mddev-&gt;recovery))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (setup_geo(&amp;new, mddev, geo_start) != conf-&gt;copies)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	before_length = ((1 &lt;&lt; conf-&gt;prev.chunk_shift) *</div><div class='add'>+			 conf-&gt;prev.far_copies);</div><div class='add'>+	after_length = ((1 &lt;&lt; conf-&gt;geo.chunk_shift) *</div><div class='add'>+			conf-&gt;geo.far_copies);</div><div class='add'>+</div><div class='add'>+	rdev_for_each(rdev, mddev) {</div><div class='add'>+		if (!test_bit(In_sync, &amp;rdev-&gt;flags)</div><div class='add'>+		    &amp;&amp; !test_bit(Faulty, &amp;rdev-&gt;flags))</div><div class='add'>+			spares++;</div><div class='add'>+		if (rdev-&gt;raid_disk &gt;= 0) {</div><div class='add'>+			long long diff = (rdev-&gt;new_data_offset</div><div class='add'>+					  - rdev-&gt;data_offset);</div><div class='add'>+			if (!mddev-&gt;reshape_backwards)</div><div class='add'>+				diff = -diff;</div><div class='add'>+			if (diff &lt; 0)</div><div class='add'>+				diff = 0;</div><div class='add'>+			if (first || diff &lt; min_offset_diff)</div><div class='add'>+				min_offset_diff = diff;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (max(before_length, after_length) &gt; min_offset_diff)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (spares &lt; mddev-&gt;delta_disks)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	conf-&gt;offset_diff = min_offset_diff;</div><div class='add'>+	spin_lock_irq(&amp;conf-&gt;device_lock);</div><div class='add'>+	if (conf-&gt;mirrors_new) {</div><div class='add'>+		memcpy(conf-&gt;mirrors_new, conf-&gt;mirrors,</div><div class='add'>+		       sizeof(struct mirror_info)*conf-&gt;prev.raid_disks);</div><div class='add'>+		smp_mb();</div><div class='add'>+		kfree(conf-&gt;mirrors_old); /* FIXME and elsewhere */</div><div class='add'>+		conf-&gt;mirrors_old = conf-&gt;mirrors;</div><div class='add'>+		conf-&gt;mirrors = conf-&gt;mirrors_new;</div><div class='add'>+		conf-&gt;mirrors_new = NULL;</div><div class='add'>+	}</div><div class='add'>+	setup_geo(&amp;conf-&gt;geo, mddev, geo_start);</div><div class='add'>+	smp_mb();</div><div class='add'>+	if (mddev-&gt;reshape_backwards) {</div><div class='add'>+		sector_t size = raid10_size(mddev, 0, 0);</div><div class='add'>+		if (size &lt; mddev-&gt;array_sectors) {</div><div class='add'>+			spin_unlock_irq(&amp;conf-&gt;device_lock);</div><div class='add'>+			printk(KERN_ERR "md/raid10:%s: array size must be reduce before number of disks\n",</div><div class='add'>+			       mdname(mddev));</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		mddev-&gt;resync_max_sectors = size;</div><div class='add'>+		conf-&gt;reshape_progress = size;</div><div class='add'>+	} else</div><div class='add'>+		conf-&gt;reshape_progress = 0;</div><div class='add'>+	spin_unlock_irq(&amp;conf-&gt;device_lock);</div><div class='add'>+</div><div class='add'>+	if (mddev-&gt;delta_disks &amp;&amp; mddev-&gt;bitmap) {</div><div class='add'>+		ret = bitmap_resize(mddev-&gt;bitmap,</div><div class='add'>+				    raid10_size(mddev, 0,</div><div class='add'>+						conf-&gt;geo.raid_disks),</div><div class='add'>+				    0, 0);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto abort;</div><div class='add'>+	}</div><div class='add'>+	if (mddev-&gt;delta_disks &gt; 0) {</div><div class='add'>+		rdev_for_each(rdev, mddev)</div><div class='add'>+			if (rdev-&gt;raid_disk &lt; 0 &amp;&amp;</div><div class='add'>+			    !test_bit(Faulty, &amp;rdev-&gt;flags)) {</div><div class='add'>+				if (raid10_add_disk(mddev, rdev) == 0) {</div><div class='add'>+					if (rdev-&gt;raid_disk &gt;=</div><div class='add'>+					    conf-&gt;prev.raid_disks)</div><div class='add'>+						set_bit(In_sync, &amp;rdev-&gt;flags);</div><div class='add'>+					else</div><div class='add'>+						rdev-&gt;recovery_offset = 0;</div><div class='add'>+</div><div class='add'>+					if (sysfs_link_rdev(mddev, rdev))</div><div class='add'>+						/* Failure here  is OK */;</div><div class='add'>+				}</div><div class='add'>+			} else if (rdev-&gt;raid_disk &gt;= conf-&gt;prev.raid_disks</div><div class='add'>+				   &amp;&amp; !test_bit(Faulty, &amp;rdev-&gt;flags)) {</div><div class='add'>+				/* This is a spare that was manually added */</div><div class='add'>+				set_bit(In_sync, &amp;rdev-&gt;flags);</div><div class='add'>+			}</div><div class='add'>+	}</div><div class='add'>+	/* When a reshape changes the number of devices,</div><div class='add'>+	 * -&gt;degraded is measured against the larger of the</div><div class='add'>+	 * pre and  post numbers.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irq(&amp;conf-&gt;device_lock);</div><div class='add'>+	mddev-&gt;degraded = calc_degraded(conf);</div><div class='add'>+	spin_unlock_irq(&amp;conf-&gt;device_lock);</div><div class='add'>+	mddev-&gt;raid_disks = conf-&gt;geo.raid_disks;</div><div class='add'>+	mddev-&gt;reshape_position = conf-&gt;reshape_progress;</div><div class='add'>+	set_bit(MD_CHANGE_DEVS, &amp;mddev-&gt;flags);</div><div class='add'>+</div><div class='add'>+	clear_bit(MD_RECOVERY_SYNC, &amp;mddev-&gt;recovery);</div><div class='add'>+	clear_bit(MD_RECOVERY_CHECK, &amp;mddev-&gt;recovery);</div><div class='add'>+	set_bit(MD_RECOVERY_RESHAPE, &amp;mddev-&gt;recovery);</div><div class='add'>+	set_bit(MD_RECOVERY_RUNNING, &amp;mddev-&gt;recovery);</div><div class='add'>+</div><div class='add'>+	mddev-&gt;sync_thread = md_register_thread(md_do_sync, mddev,</div><div class='add'>+						"reshape");</div><div class='add'>+	if (!mddev-&gt;sync_thread) {</div><div class='add'>+		ret = -EAGAIN;</div><div class='add'>+		goto abort;</div><div class='add'>+	}</div><div class='add'>+	conf-&gt;reshape_checkpoint = jiffies;</div><div class='add'>+	md_wakeup_thread(mddev-&gt;sync_thread);</div><div class='add'>+	md_new_event(mddev);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+abort:</div><div class='add'>+	mddev-&gt;recovery = 0;</div><div class='add'>+	spin_lock_irq(&amp;conf-&gt;device_lock);</div><div class='add'>+	conf-&gt;geo = conf-&gt;prev;</div><div class='add'>+	mddev-&gt;raid_disks = conf-&gt;geo.raid_disks;</div><div class='add'>+	rdev_for_each(rdev, mddev)</div><div class='add'>+		rdev-&gt;new_data_offset = rdev-&gt;data_offset;</div><div class='add'>+	smp_wmb();</div><div class='add'>+	conf-&gt;reshape_progress = MaxSector;</div><div class='add'>+	mddev-&gt;reshape_position = MaxSector;</div><div class='add'>+	spin_unlock_irq(&amp;conf-&gt;device_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Calculate the last device-address that could contain</div><div class='add'>+ * any block from the chunk that includes the array-address 's'</div><div class='add'>+ * and report the next address.</div><div class='add'>+ * i.e. the address returned will be chunk-aligned and after</div><div class='add'>+ * any data that is in the chunk containing 's'.</div><div class='add'>+ */</div><div class='add'>+static sector_t last_dev_address(sector_t s, struct geom *geo)</div><div class='add'>+{</div><div class='add'>+	s = (s | geo-&gt;chunk_mask) + 1;</div><div class='add'>+	s &gt;&gt;= geo-&gt;chunk_shift;</div><div class='add'>+	s *= geo-&gt;near_copies;</div><div class='add'>+	s = DIV_ROUND_UP_SECTOR_T(s, geo-&gt;raid_disks);</div><div class='add'>+	s *= geo-&gt;far_copies;</div><div class='add'>+	s &lt;&lt;= geo-&gt;chunk_shift;</div><div class='add'>+	return s;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Calculate the first device-address that could contain</div><div class='add'>+ * any block from the chunk that includes the array-address 's'.</div><div class='add'>+ * This too will be the start of a chunk</div><div class='add'>+ */</div><div class='add'>+static sector_t first_dev_address(sector_t s, struct geom *geo)</div><div class='add'>+{</div><div class='add'>+	s &gt;&gt;= geo-&gt;chunk_shift;</div><div class='add'>+	s *= geo-&gt;near_copies;</div><div class='add'>+	sector_div(s, geo-&gt;raid_disks);</div><div class='add'>+	s *= geo-&gt;far_copies;</div><div class='add'>+	s &lt;&lt;= geo-&gt;chunk_shift;</div><div class='add'>+	return s;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr,</div><div class='add'>+				int *skipped)</div><div class='add'>+{</div><div class='add'>+	/* We simply copy at most one chunk (smallest of old and new)</div><div class='add'>+	 * at a time, possibly less if that exceeds RESYNC_PAGES,</div><div class='add'>+	 * or we hit a bad block or something.</div><div class='add'>+	 * This might mean we pause for normal IO in the middle of</div><div class='add'>+	 * a chunk, but that is not a problem was mddev-&gt;reshape_position</div><div class='add'>+	 * can record any location.</div><div class='add'>+	 *</div><div class='add'>+	 * If we will want to write to a location that isn't</div><div class='add'>+	 * yet recorded as 'safe' (i.e. in metadata on disk) then</div><div class='add'>+	 * we need to flush all reshape requests and update the metadata.</div><div class='add'>+	 *</div><div class='add'>+	 * When reshaping forwards (e.g. to more devices), we interpret</div><div class='add'>+	 * 'safe' as the earliest block which might not have been copied</div><div class='add'>+	 * down yet.  We divide this by previous stripe size and multiply</div><div class='add'>+	 * by previous stripe length to get lowest device offset that we</div><div class='add'>+	 * cannot write to yet.</div><div class='add'>+	 * We interpret 'sector_nr' as an address that we want to write to.</div><div class='add'>+	 * From this we use last_device_address() to find where we might</div><div class='add'>+	 * write to, and first_device_address on the  'safe' position.</div><div class='add'>+	 * If this 'next' write position is after the 'safe' position,</div><div class='add'>+	 * we must update the metadata to increase the 'safe' position.</div><div class='add'>+	 *</div><div class='add'>+	 * When reshaping backwards, we round in the opposite direction</div><div class='add'>+	 * and perform the reverse test:  next write position must not be</div><div class='add'>+	 * less than current safe position.</div><div class='add'>+	 *</div><div class='add'>+	 * In all this the minimum difference in data offsets</div><div class='add'>+	 * (conf-&gt;offset_diff - always positive) allows a bit of slack,</div><div class='add'>+	 * so next can be after 'safe', but not by more than offset_disk</div><div class='add'>+	 *</div><div class='add'>+	 * We need to prepare all the bios here before we start any IO</div><div class='add'>+	 * to ensure the size we choose is acceptable to all devices.</div><div class='add'>+	 * The means one for each copy for write-out and an extra one for</div><div class='add'>+	 * read-in.</div><div class='add'>+	 * We store the read-in bio in -&gt;master_bio and the others in</div><div class='add'>+	 * -&gt;devs[x].bio and -&gt;devs[x].repl_bio.</div><div class='add'>+	 */</div><div class='add'>+	struct r10conf *conf = mddev-&gt;private;</div><div class='add'>+	struct r10bio *r10_bio;</div><div class='add'>+	sector_t next, safe, last;</div><div class='add'>+	int max_sectors;</div><div class='add'>+	int nr_sectors;</div><div class='add'>+	int s;</div><div class='add'>+	struct md_rdev *rdev;</div><div class='add'>+	int need_flush = 0;</div><div class='add'>+	struct bio *blist;</div><div class='add'>+	struct bio *bio, *read_bio;</div><div class='add'>+	int sectors_done = 0;</div><div class='add'>+</div><div class='add'>+	if (sector_nr == 0) {</div><div class='add'>+		/* If restarting in the middle, skip the initial sectors */</div><div class='add'>+		if (mddev-&gt;reshape_backwards &amp;&amp;</div><div class='add'>+		    conf-&gt;reshape_progress &lt; raid10_size(mddev, 0, 0)) {</div><div class='add'>+			sector_nr = (raid10_size(mddev, 0, 0)</div><div class='add'>+				     - conf-&gt;reshape_progress);</div><div class='add'>+		} else if (!mddev-&gt;reshape_backwards &amp;&amp;</div><div class='add'>+			   conf-&gt;reshape_progress &gt; 0)</div><div class='add'>+			sector_nr = conf-&gt;reshape_progress;</div><div class='add'>+		if (sector_nr) {</div><div class='add'>+			mddev-&gt;curr_resync_completed = sector_nr;</div><div class='add'>+			sysfs_notify(&amp;mddev-&gt;kobj, NULL, "sync_completed");</div><div class='add'>+			*skipped = 1;</div><div class='add'>+			return sector_nr;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We don't use sector_nr to track where we are up to</div><div class='add'>+	 * as that doesn't work well for -&gt;reshape_backwards.</div><div class='add'>+	 * So just use -&gt;reshape_progress.</div><div class='add'>+	 */</div><div class='add'>+	if (mddev-&gt;reshape_backwards) {</div><div class='add'>+		/* 'next' is the earliest device address that we might</div><div class='add'>+		 * write to for this chunk in the new layout</div><div class='add'>+		 */</div><div class='add'>+		next = first_dev_address(conf-&gt;reshape_progress - 1,</div><div class='add'>+					 &amp;conf-&gt;geo);</div><div class='add'>+</div><div class='add'>+		/* 'safe' is the last device address that we might read from</div><div class='add'>+		 * in the old layout after a restart</div><div class='add'>+		 */</div><div class='add'>+		safe = last_dev_address(conf-&gt;reshape_safe - 1,</div><div class='add'>+					&amp;conf-&gt;prev);</div><div class='add'>+</div><div class='add'>+		if (next + conf-&gt;offset_diff &lt; safe)</div><div class='add'>+			need_flush = 1;</div><div class='add'>+</div><div class='add'>+		last = conf-&gt;reshape_progress - 1;</div><div class='add'>+		sector_nr = last &amp; ~(sector_t)(conf-&gt;geo.chunk_mask</div><div class='add'>+					       &amp; conf-&gt;prev.chunk_mask);</div><div class='add'>+		if (sector_nr + RESYNC_BLOCK_SIZE/512 &lt; last)</div><div class='add'>+			sector_nr = last + 1 - RESYNC_BLOCK_SIZE/512;</div><div class='add'>+	} else {</div><div class='add'>+		/* 'next' is after the last device address that we</div><div class='add'>+		 * might write to for this chunk in the new layout</div><div class='add'>+		 */</div><div class='add'>+		next = last_dev_address(conf-&gt;reshape_progress, &amp;conf-&gt;geo);</div><div class='add'>+</div><div class='add'>+		/* 'safe' is the earliest device address that we might</div><div class='add'>+		 * read from in the old layout after a restart</div><div class='add'>+		 */</div><div class='add'>+		safe = first_dev_address(conf-&gt;reshape_safe, &amp;conf-&gt;prev);</div><div class='add'>+</div><div class='add'>+		/* Need to update metadata if 'next' might be beyond 'safe'</div><div class='add'>+		 * as that would possibly corrupt data</div><div class='add'>+		 */</div><div class='add'>+		if (next &gt; safe + conf-&gt;offset_diff)</div><div class='add'>+			need_flush = 1;</div><div class='add'>+</div><div class='add'>+		sector_nr = conf-&gt;reshape_progress;</div><div class='add'>+		last  = sector_nr | (conf-&gt;geo.chunk_mask</div><div class='add'>+				     &amp; conf-&gt;prev.chunk_mask);</div><div class='add'>+</div><div class='add'>+		if (sector_nr + RESYNC_BLOCK_SIZE/512 &lt;= last)</div><div class='add'>+			last = sector_nr + RESYNC_BLOCK_SIZE/512 - 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (need_flush ||</div><div class='add'>+	    time_after(jiffies, conf-&gt;reshape_checkpoint + 10*HZ)) {</div><div class='add'>+		/* Need to update reshape_position in metadata */</div><div class='add'>+		wait_barrier(conf);</div><div class='add'>+		mddev-&gt;reshape_position = conf-&gt;reshape_progress;</div><div class='add'>+		if (mddev-&gt;reshape_backwards)</div><div class='add'>+			mddev-&gt;curr_resync_completed = raid10_size(mddev, 0, 0)</div><div class='add'>+				- conf-&gt;reshape_progress;</div><div class='add'>+		else</div><div class='add'>+			mddev-&gt;curr_resync_completed = conf-&gt;reshape_progress;</div><div class='add'>+		conf-&gt;reshape_checkpoint = jiffies;</div><div class='add'>+		set_bit(MD_CHANGE_DEVS, &amp;mddev-&gt;flags);</div><div class='add'>+		md_wakeup_thread(mddev-&gt;thread);</div><div class='add'>+		wait_event(mddev-&gt;sb_wait, mddev-&gt;flags == 0 ||</div><div class='add'>+			   kthread_should_stop());</div><div class='add'>+		conf-&gt;reshape_safe = mddev-&gt;reshape_position;</div><div class='add'>+		allow_barrier(conf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+read_more:</div><div class='add'>+	/* Now schedule reads for blocks from sector_nr to last */</div><div class='add'>+	r10_bio = mempool_alloc(conf-&gt;r10buf_pool, GFP_NOIO);</div><div class='add'>+	raise_barrier(conf, sectors_done != 0);</div><div class='add'>+	atomic_set(&amp;r10_bio-&gt;remaining, 0);</div><div class='add'>+	r10_bio-&gt;mddev = mddev;</div><div class='add'>+	r10_bio-&gt;sector = sector_nr;</div><div class='add'>+	set_bit(R10BIO_IsReshape, &amp;r10_bio-&gt;state);</div><div class='add'>+	r10_bio-&gt;sectors = last - sector_nr + 1;</div><div class='add'>+	rdev = read_balance(conf, r10_bio, &amp;max_sectors);</div><div class='add'>+	BUG_ON(!test_bit(R10BIO_Previous, &amp;r10_bio-&gt;state));</div><div class='add'>+</div><div class='add'>+	if (!rdev) {</div><div class='add'>+		/* Cannot read from here, so need to record bad blocks</div><div class='add'>+		 * on all the target devices.</div><div class='add'>+		 */</div><div class='add'>+		// FIXME</div><div class='add'>+		set_bit(MD_RECOVERY_INTR, &amp;mddev-&gt;recovery);</div><div class='add'>+		return sectors_done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	read_bio = bio_alloc_mddev(GFP_KERNEL, RESYNC_PAGES, mddev);</div><div class='add'>+</div><div class='add'>+	read_bio-&gt;bi_bdev = rdev-&gt;bdev;</div><div class='add'>+	read_bio-&gt;bi_sector = (r10_bio-&gt;devs[r10_bio-&gt;read_slot].addr</div><div class='add'>+			       + rdev-&gt;data_offset);</div><div class='add'>+	read_bio-&gt;bi_private = r10_bio;</div><div class='add'>+	read_bio-&gt;bi_end_io = end_sync_read;</div><div class='add'>+	read_bio-&gt;bi_rw = READ;</div><div class='add'>+	read_bio-&gt;bi_flags &amp;= ~(BIO_POOL_MASK - 1);</div><div class='add'>+	read_bio-&gt;bi_flags |= 1 &lt;&lt; BIO_UPTODATE;</div><div class='add'>+	read_bio-&gt;bi_vcnt = 0;</div><div class='add'>+	read_bio-&gt;bi_idx = 0;</div><div class='add'>+	read_bio-&gt;bi_size = 0;</div><div class='add'>+	r10_bio-&gt;master_bio = read_bio;</div><div class='add'>+	r10_bio-&gt;read_slot = r10_bio-&gt;devs[r10_bio-&gt;read_slot].devnum;</div><div class='add'>+</div><div class='add'>+	/* Now find the locations in the new layout */</div><div class='add'>+	__raid10_find_phys(&amp;conf-&gt;geo, r10_bio);</div><div class='add'>+</div><div class='add'>+	blist = read_bio;</div><div class='add'>+	read_bio-&gt;bi_next = NULL;</div><div class='add'>+</div><div class='add'>+	for (s = 0; s &lt; conf-&gt;copies*2; s++) {</div><div class='add'>+		struct bio *b;</div><div class='add'>+		int d = r10_bio-&gt;devs[s/2].devnum;</div><div class='add'>+		struct md_rdev *rdev2;</div><div class='add'>+		if (s&amp;1) {</div><div class='add'>+			rdev2 = conf-&gt;mirrors[d].replacement;</div><div class='add'>+			b = r10_bio-&gt;devs[s/2].repl_bio;</div><div class='add'>+		} else {</div><div class='add'>+			rdev2 = conf-&gt;mirrors[d].rdev;</div><div class='add'>+			b = r10_bio-&gt;devs[s/2].bio;</div><div class='add'>+		}</div><div class='add'>+		if (!rdev2 || test_bit(Faulty, &amp;rdev2-&gt;flags))</div><div class='add'>+			continue;</div><div class='add'>+		b-&gt;bi_bdev = rdev2-&gt;bdev;</div><div class='add'>+		b-&gt;bi_sector = r10_bio-&gt;devs[s/2].addr + rdev2-&gt;new_data_offset;</div><div class='add'>+		b-&gt;bi_private = r10_bio;</div><div class='add'>+		b-&gt;bi_end_io = end_reshape_write;</div><div class='add'>+		b-&gt;bi_rw = WRITE;</div><div class='add'>+		b-&gt;bi_flags &amp;= ~(BIO_POOL_MASK - 1);</div><div class='add'>+		b-&gt;bi_flags |= 1 &lt;&lt; BIO_UPTODATE;</div><div class='add'>+		b-&gt;bi_next = blist;</div><div class='add'>+		b-&gt;bi_vcnt = 0;</div><div class='add'>+		b-&gt;bi_idx = 0;</div><div class='add'>+		b-&gt;bi_size = 0;</div><div class='add'>+		blist = b;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Now add as many pages as possible to all of these bios. */</div><div class='add'>+</div><div class='add'>+	nr_sectors = 0;</div><div class='add'>+	for (s = 0 ; s &lt; max_sectors; s += PAGE_SIZE &gt;&gt; 9) {</div><div class='add'>+		struct page *page = r10_bio-&gt;devs[0].bio-&gt;bi_io_vec[s/(PAGE_SIZE&gt;&gt;9)].bv_page;</div><div class='add'>+		int len = (max_sectors - s) &lt;&lt; 9;</div><div class='add'>+		if (len &gt; PAGE_SIZE)</div><div class='add'>+			len = PAGE_SIZE;</div><div class='add'>+		for (bio = blist; bio ; bio = bio-&gt;bi_next) {</div><div class='add'>+			struct bio *bio2;</div><div class='add'>+			if (bio_add_page(bio, page, len, 0))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			/* Didn't fit, must stop */</div><div class='add'>+			for (bio2 = blist;</div><div class='add'>+			     bio2 &amp;&amp; bio2 != bio;</div><div class='add'>+			     bio2 = bio2-&gt;bi_next) {</div><div class='add'>+				/* Remove last page from this bio */</div><div class='add'>+				bio2-&gt;bi_vcnt--;</div><div class='add'>+				bio2-&gt;bi_size -= len;</div><div class='add'>+				bio2-&gt;bi_flags &amp;= ~(1&lt;&lt;BIO_SEG_VALID);</div><div class='add'>+			}</div><div class='add'>+			goto bio_full;</div><div class='add'>+		}</div><div class='add'>+		sector_nr += len &gt;&gt; 9;</div><div class='add'>+		nr_sectors += len &gt;&gt; 9;</div><div class='add'>+	}</div><div class='add'>+bio_full:</div><div class='add'>+	r10_bio-&gt;sectors = nr_sectors;</div><div class='add'>+</div><div class='add'>+	/* Now submit the read */</div><div class='add'>+	md_sync_acct(read_bio-&gt;bi_bdev, r10_bio-&gt;sectors);</div><div class='add'>+	atomic_inc(&amp;r10_bio-&gt;remaining);</div><div class='add'>+	read_bio-&gt;bi_next = NULL;</div><div class='add'>+	generic_make_request(read_bio);</div><div class='add'>+	sector_nr += nr_sectors;</div><div class='add'>+	sectors_done += nr_sectors;</div><div class='add'>+	if (sector_nr &lt;= last)</div><div class='add'>+		goto read_more;</div><div class='add'>+</div><div class='add'>+	/* Now that we have done the whole section we can</div><div class='add'>+	 * update reshape_progress</div><div class='add'>+	 */</div><div class='add'>+	if (mddev-&gt;reshape_backwards)</div><div class='add'>+		conf-&gt;reshape_progress -= sectors_done;</div><div class='add'>+	else</div><div class='add'>+		conf-&gt;reshape_progress += sectors_done;</div><div class='add'>+</div><div class='add'>+	return sectors_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void end_reshape_request(struct r10bio *r10_bio);</div><div class='add'>+static int handle_reshape_read_error(struct mddev *mddev,</div><div class='add'>+				     struct r10bio *r10_bio);</div><div class='add'>+static void reshape_request_write(struct mddev *mddev, struct r10bio *r10_bio)</div><div class='add'>+{</div><div class='add'>+	/* Reshape read completed.  Hopefully we have a block</div><div class='add'>+	 * to write out.</div><div class='add'>+	 * If we got a read error then we do sync 1-page reads from</div><div class='add'>+	 * elsewhere until we find the data - or give up.</div><div class='add'>+	 */</div><div class='add'>+	struct r10conf *conf = mddev-&gt;private;</div><div class='add'>+	int s;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(R10BIO_Uptodate, &amp;r10_bio-&gt;state))</div><div class='add'>+		if (handle_reshape_read_error(mddev, r10_bio) &lt; 0) {</div><div class='add'>+			/* Reshape has been aborted */</div><div class='add'>+			md_done_sync(mddev, r10_bio-&gt;sectors, 0);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	/* We definitely have the data in the pages, schedule the</div><div class='add'>+	 * writes.</div><div class='add'>+	 */</div><div class='add'>+	atomic_set(&amp;r10_bio-&gt;remaining, 1);</div><div class='add'>+	for (s = 0; s &lt; conf-&gt;copies*2; s++) {</div><div class='add'>+		struct bio *b;</div><div class='add'>+		int d = r10_bio-&gt;devs[s/2].devnum;</div><div class='add'>+		struct md_rdev *rdev;</div><div class='add'>+		if (s&amp;1) {</div><div class='add'>+			rdev = conf-&gt;mirrors[d].replacement;</div><div class='add'>+			b = r10_bio-&gt;devs[s/2].repl_bio;</div><div class='add'>+		} else {</div><div class='add'>+			rdev = conf-&gt;mirrors[d].rdev;</div><div class='add'>+			b = r10_bio-&gt;devs[s/2].bio;</div><div class='add'>+		}</div><div class='add'>+		if (!rdev || test_bit(Faulty, &amp;rdev-&gt;flags))</div><div class='add'>+			continue;</div><div class='add'>+		atomic_inc(&amp;rdev-&gt;nr_pending);</div><div class='add'>+		md_sync_acct(b-&gt;bi_bdev, r10_bio-&gt;sectors);</div><div class='add'>+		atomic_inc(&amp;r10_bio-&gt;remaining);</div><div class='add'>+		b-&gt;bi_next = NULL;</div><div class='add'>+		generic_make_request(b);</div><div class='add'>+	}</div><div class='add'>+	end_reshape_request(r10_bio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void end_reshape(struct r10conf *conf)</div><div class='add'>+{</div><div class='add'>+	if (test_bit(MD_RECOVERY_INTR, &amp;conf-&gt;mddev-&gt;recovery))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;conf-&gt;device_lock);</div><div class='add'>+	conf-&gt;prev = conf-&gt;geo;</div><div class='add'>+	md_finish_reshape(conf-&gt;mddev);</div><div class='add'>+	smp_wmb();</div><div class='add'>+	conf-&gt;reshape_progress = MaxSector;</div><div class='add'>+	spin_unlock_irq(&amp;conf-&gt;device_lock);</div><div class='add'>+</div><div class='add'>+	/* read-ahead size must cover two whole stripes, which is</div><div class='add'>+	 * 2 * (datadisks) * chunksize where 'n' is the number of raid devices</div><div class='add'>+	 */</div><div class='add'>+	if (conf-&gt;mddev-&gt;queue) {</div><div class='add'>+		int stripe = conf-&gt;geo.raid_disks *</div><div class='add'>+			((conf-&gt;mddev-&gt;chunk_sectors &lt;&lt; 9) / PAGE_SIZE);</div><div class='add'>+		stripe /= conf-&gt;geo.near_copies;</div><div class='add'>+		if (conf-&gt;mddev-&gt;queue-&gt;backing_dev_info.ra_pages &lt; 2 * stripe)</div><div class='add'>+			conf-&gt;mddev-&gt;queue-&gt;backing_dev_info.ra_pages = 2 * stripe;</div><div class='add'>+	}</div><div class='add'>+	conf-&gt;fullsync = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int handle_reshape_read_error(struct mddev *mddev,</div><div class='add'>+				     struct r10bio *r10_bio)</div><div class='add'>+{</div><div class='add'>+	/* Use sync reads to get the blocks from somewhere else */</div><div class='add'>+	int sectors = r10_bio-&gt;sectors;</div><div class='add'>+	struct r10bio r10b;</div><div class='add'>+	struct r10conf *conf = mddev-&gt;private;</div><div class='add'>+	int slot = 0;</div><div class='add'>+	int idx = 0;</div><div class='add'>+	struct bio_vec *bvec = r10_bio-&gt;master_bio-&gt;bi_io_vec;</div><div class='add'>+</div><div class='add'>+	r10b.sector = r10_bio-&gt;sector;</div><div class='add'>+	__raid10_find_phys(&amp;conf-&gt;prev, &amp;r10b);</div><div class='add'>+</div><div class='add'>+	while (sectors) {</div><div class='add'>+		int s = sectors;</div><div class='add'>+		int success = 0;</div><div class='add'>+		int first_slot = slot;</div><div class='add'>+</div><div class='add'>+		if (s &gt; (PAGE_SIZE &gt;&gt; 9))</div><div class='add'>+			s = PAGE_SIZE &gt;&gt; 9;</div><div class='add'>+</div><div class='add'>+		while (!success) {</div><div class='add'>+			int d = r10b.devs[slot].devnum;</div><div class='add'>+			struct md_rdev *rdev = conf-&gt;mirrors[d].rdev;</div><div class='add'>+			sector_t addr;</div><div class='add'>+			if (rdev == NULL ||</div><div class='add'>+			    test_bit(Faulty, &amp;rdev-&gt;flags) ||</div><div class='add'>+			    !test_bit(In_sync, &amp;rdev-&gt;flags))</div><div class='add'>+				goto failed;</div><div class='add'>+</div><div class='add'>+			addr = r10b.devs[slot].addr + idx * PAGE_SIZE;</div><div class='add'>+			success = sync_page_io(rdev,</div><div class='add'>+					       addr,</div><div class='add'>+					       s &lt;&lt; 9,</div><div class='add'>+					       bvec[idx].bv_page,</div><div class='add'>+					       READ, false);</div><div class='add'>+			if (success)</div><div class='add'>+				break;</div><div class='add'>+		failed:</div><div class='add'>+			slot++;</div><div class='add'>+			if (slot &gt;= conf-&gt;copies)</div><div class='add'>+				slot = 0;</div><div class='add'>+			if (slot == first_slot)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+		if (!success) {</div><div class='add'>+			/* couldn't read this block, must give up */</div><div class='add'>+			set_bit(MD_RECOVERY_INTR,</div><div class='add'>+				&amp;mddev-&gt;recovery);</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+		sectors -= s;</div><div class='add'>+		idx++;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void end_reshape_write(struct bio *bio, int error)</div><div class='add'>+{</div><div class='add'>+	int uptodate = test_bit(BIO_UPTODATE, &amp;bio-&gt;bi_flags);</div><div class='add'>+	struct r10bio *r10_bio = bio-&gt;bi_private;</div><div class='add'>+	struct mddev *mddev = r10_bio-&gt;mddev;</div><div class='add'>+	struct r10conf *conf = mddev-&gt;private;</div><div class='add'>+	int d;</div><div class='add'>+	int slot;</div><div class='add'>+	int repl;</div><div class='add'>+	struct md_rdev *rdev = NULL;</div><div class='add'>+</div><div class='add'>+	d = find_bio_disk(conf, r10_bio, bio, &amp;slot, &amp;repl);</div><div class='add'>+	if (repl)</div><div class='add'>+		rdev = conf-&gt;mirrors[d].replacement;</div><div class='add'>+	if (!rdev) {</div><div class='add'>+		smp_mb();</div><div class='add'>+		rdev = conf-&gt;mirrors[d].rdev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!uptodate) {</div><div class='add'>+		/* FIXME should record badblock */</div><div class='add'>+		md_error(mddev, rdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rdev_dec_pending(rdev, mddev);</div><div class='add'>+	end_reshape_request(r10_bio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void end_reshape_request(struct r10bio *r10_bio)</div><div class='add'>+{</div><div class='add'>+	if (!atomic_dec_and_test(&amp;r10_bio-&gt;remaining))</div><div class='add'>+		return;</div><div class='add'>+	md_done_sync(r10_bio-&gt;mddev, r10_bio-&gt;sectors, 1);</div><div class='add'>+	bio_put(r10_bio-&gt;master_bio);</div><div class='add'>+	put_buf(r10_bio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void raid10_finish_reshape(struct mddev *mddev)</div><div class='add'>+{</div><div class='add'>+	struct r10conf *conf = mddev-&gt;private;</div><div class='add'>+</div><div class='add'>+	if (test_bit(MD_RECOVERY_INTR, &amp;mddev-&gt;recovery))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (mddev-&gt;delta_disks &gt; 0) {</div><div class='add'>+		sector_t size = raid10_size(mddev, 0, 0);</div><div class='add'>+		md_set_array_sectors(mddev, size);</div><div class='add'>+		if (mddev-&gt;recovery_cp &gt; mddev-&gt;resync_max_sectors) {</div><div class='add'>+			mddev-&gt;recovery_cp = mddev-&gt;resync_max_sectors;</div><div class='add'>+			set_bit(MD_RECOVERY_NEEDED, &amp;mddev-&gt;recovery);</div><div class='add'>+		}</div><div class='add'>+		mddev-&gt;resync_max_sectors = size;</div><div class='add'>+		set_capacity(mddev-&gt;gendisk, mddev-&gt;array_sectors);</div><div class='add'>+		revalidate_disk(mddev-&gt;gendisk);</div><div class='add'>+	} else {</div><div class='add'>+		int d;</div><div class='add'>+		for (d = conf-&gt;geo.raid_disks ;</div><div class='add'>+		     d &lt; conf-&gt;geo.raid_disks - mddev-&gt;delta_disks;</div><div class='add'>+		     d++) {</div><div class='add'>+			struct md_rdev *rdev = conf-&gt;mirrors[d].rdev;</div><div class='add'>+			if (rdev)</div><div class='add'>+				clear_bit(In_sync, &amp;rdev-&gt;flags);</div><div class='add'>+			rdev = conf-&gt;mirrors[d].replacement;</div><div class='add'>+			if (rdev)</div><div class='add'>+				clear_bit(In_sync, &amp;rdev-&gt;flags);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mddev-&gt;layout = mddev-&gt;new_layout;</div><div class='add'>+	mddev-&gt;chunk_sectors = 1 &lt;&lt; conf-&gt;geo.chunk_shift;</div><div class='add'>+	mddev-&gt;reshape_position = MaxSector;</div><div class='add'>+	mddev-&gt;delta_disks = 0;</div><div class='add'>+	mddev-&gt;reshape_backwards = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct md_personality raid10_personality =</div><div class='ctx'> {</div><div class='ctx'> 	.name		= "raid10",</div><div class='hunk'>@@ -3544,6 +4528,9 @@ static struct md_personality raid10_personality =</div><div class='ctx'> 	.size		= raid10_size,</div><div class='ctx'> 	.resize		= raid10_resize,</div><div class='ctx'> 	.takeover	= raid10_takeover,</div><div class='add'>+	.check_reshape	= raid10_check_reshape,</div><div class='add'>+	.start_reshape	= raid10_start_reshape,</div><div class='add'>+	.finish_reshape	= raid10_finish_reshape,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init raid_init(void)</div><div class='head'>diff --git a/drivers/md/raid10.h b/drivers/md/raid10.h<br/>index 7c615613c381..135b1b0a1554 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/raid10.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/raid10.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/raid10.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/raid10.h</a></div><div class='hunk'>@@ -14,32 +14,38 @@ struct mirror_info {</div><div class='ctx'> struct r10conf {</div><div class='ctx'> 	struct mddev		*mddev;</div><div class='ctx'> 	struct mirror_info	*mirrors;</div><div class='del'>-	int			raid_disks;</div><div class='add'>+	struct mirror_info	*mirrors_new, *mirrors_old;</div><div class='ctx'> 	spinlock_t		device_lock;</div><div class='ctx'> </div><div class='ctx'> 	/* geometry */</div><div class='del'>-	int			near_copies;  /* number of copies laid out</div><div class='add'>+	struct geom {</div><div class='add'>+		int		raid_disks;</div><div class='add'>+		int		near_copies;  /* number of copies laid out</div><div class='ctx'> 					       * raid0 style */</div><div class='del'>-	int 			far_copies;   /* number of copies laid out</div><div class='add'>+		int		far_copies;   /* number of copies laid out</div><div class='ctx'> 					       * at large strides across drives</div><div class='ctx'> 					       */</div><div class='del'>-	int			far_offset;   /* far_copies are offset by 1</div><div class='add'>+		int		far_offset;   /* far_copies are offset by 1</div><div class='ctx'> 					       * stripe instead of many</div><div class='ctx'> 					       */</div><div class='del'>-	int			copies;	      /* near_copies * far_copies.</div><div class='del'>-					       * must be &lt;= raid_disks</div><div class='del'>-					       */</div><div class='del'>-	sector_t		stride;	      /* distance between far copies.</div><div class='add'>+		sector_t	stride;	      /* distance between far copies.</div><div class='ctx'> 					       * This is size / far_copies unless</div><div class='ctx'> 					       * far_offset, in which case it is</div><div class='ctx'> 					       * 1 stripe.</div><div class='ctx'> 					       */</div><div class='add'>+		int		chunk_shift; /* shift from chunks to sectors */</div><div class='add'>+		sector_t	chunk_mask;</div><div class='add'>+	} prev, geo;</div><div class='add'>+	int			copies;	      /* near_copies * far_copies.</div><div class='add'>+					       * must be &lt;= raid_disks</div><div class='add'>+					       */</div><div class='ctx'> </div><div class='ctx'> 	sector_t		dev_sectors;  /* temp copy of</div><div class='ctx'> 					       * mddev-&gt;dev_sectors */</div><div class='del'>-</div><div class='del'>-	int			chunk_shift; /* shift from chunks to sectors */</div><div class='del'>-	sector_t		chunk_mask;</div><div class='add'>+	sector_t		reshape_progress;</div><div class='add'>+	sector_t		reshape_safe;</div><div class='add'>+	unsigned long		reshape_checkpoint;</div><div class='add'>+	sector_t		offset_diff;</div><div class='ctx'> </div><div class='ctx'> 	struct list_head	retry_list;</div><div class='ctx'> 	/* queue pending writes and submit them on unplug */</div><div class='hunk'>@@ -136,6 +142,7 @@ enum r10bio_state {</div><div class='ctx'> 	R10BIO_Uptodate,</div><div class='ctx'> 	R10BIO_IsSync,</div><div class='ctx'> 	R10BIO_IsRecover,</div><div class='add'>+	R10BIO_IsReshape,</div><div class='ctx'> 	R10BIO_Degraded,</div><div class='ctx'> /* Set ReadError on bios that experience a read error</div><div class='ctx'>  * so that raid10d knows what to do with them.</div><div class='hunk'>@@ -146,5 +153,10 @@ enum r10bio_state {</div><div class='ctx'>  */</div><div class='ctx'> 	R10BIO_MadeGood,</div><div class='ctx'> 	R10BIO_WriteError,</div><div class='add'>+/* During a reshape we might be performing IO on the</div><div class='add'>+ * 'previous' part of the array, in which case this</div><div class='add'>+ * flag is set</div><div class='add'>+ */</div><div class='add'>+	R10BIO_Previous,</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c<br/>index f351422938e0..d26767246d26 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/raid5.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/raid5.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/raid5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/raid5.c</a></div><div class='hunk'>@@ -488,6 +488,27 @@ get_active_stripe(struct r5conf *conf, sector_t sector,</div><div class='ctx'> 	return sh;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Determine if 'data_offset' or 'new_data_offset' should be used</div><div class='add'>+ * in this stripe_head.</div><div class='add'>+ */</div><div class='add'>+static int use_new_offset(struct r5conf *conf, struct stripe_head *sh)</div><div class='add'>+{</div><div class='add'>+	sector_t progress = conf-&gt;reshape_progress;</div><div class='add'>+	/* Need a memory barrier to make sure we see the value</div><div class='add'>+	 * of conf-&gt;generation, or -&gt;data_offset that was set before</div><div class='add'>+	 * reshape_progress was updated.</div><div class='add'>+	 */</div><div class='add'>+	smp_rmb();</div><div class='add'>+	if (progress == MaxSector)</div><div class='add'>+		return 0;</div><div class='add'>+	if (sh-&gt;generation == conf-&gt;generation - 1)</div><div class='add'>+		return 0;</div><div class='add'>+	/* We are in a reshape, and this is a new-generation stripe,</div><div class='add'>+	 * so use new_data_offset.</div><div class='add'>+	 */</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> raid5_end_read_request(struct bio *bi, int error);</div><div class='ctx'> static void</div><div class='hunk'>@@ -518,6 +539,8 @@ static void ops_run_io(struct stripe_head *sh, struct stripe_head_state *s)</div><div class='ctx'> 			replace_only = 1;</div><div class='ctx'> 		} else</div><div class='ctx'> 			continue;</div><div class='add'>+		if (test_and_clear_bit(R5_SyncIO, &amp;sh-&gt;dev[i].flags))</div><div class='add'>+			rw |= REQ_SYNC;</div><div class='ctx'> </div><div class='ctx'> 		bi = &amp;sh-&gt;dev[i].req;</div><div class='ctx'> 		rbi = &amp;sh-&gt;dev[i].rreq; /* For writing to replacement */</div><div class='hunk'>@@ -603,7 +626,12 @@ static void ops_run_io(struct stripe_head *sh, struct stripe_head_state *s)</div><div class='ctx'> 				__func__, (unsigned long long)sh-&gt;sector,</div><div class='ctx'> 				bi-&gt;bi_rw, i);</div><div class='ctx'> 			atomic_inc(&amp;sh-&gt;count);</div><div class='del'>-			bi-&gt;bi_sector = sh-&gt;sector + rdev-&gt;data_offset;</div><div class='add'>+			if (use_new_offset(conf, sh))</div><div class='add'>+				bi-&gt;bi_sector = (sh-&gt;sector</div><div class='add'>+						 + rdev-&gt;new_data_offset);</div><div class='add'>+			else</div><div class='add'>+				bi-&gt;bi_sector = (sh-&gt;sector</div><div class='add'>+						 + rdev-&gt;data_offset);</div><div class='ctx'> 			bi-&gt;bi_flags = 1 &lt;&lt; BIO_UPTODATE;</div><div class='ctx'> 			bi-&gt;bi_idx = 0;</div><div class='ctx'> 			bi-&gt;bi_io_vec[0].bv_len = STRIPE_SIZE;</div><div class='hunk'>@@ -627,7 +655,12 @@ static void ops_run_io(struct stripe_head *sh, struct stripe_head_state *s)</div><div class='ctx'> 				__func__, (unsigned long long)sh-&gt;sector,</div><div class='ctx'> 				rbi-&gt;bi_rw, i);</div><div class='ctx'> 			atomic_inc(&amp;sh-&gt;count);</div><div class='del'>-			rbi-&gt;bi_sector = sh-&gt;sector + rrdev-&gt;data_offset;</div><div class='add'>+			if (use_new_offset(conf, sh))</div><div class='add'>+				rbi-&gt;bi_sector = (sh-&gt;sector</div><div class='add'>+						  + rrdev-&gt;new_data_offset);</div><div class='add'>+			else</div><div class='add'>+				rbi-&gt;bi_sector = (sh-&gt;sector</div><div class='add'>+						  + rrdev-&gt;data_offset);</div><div class='ctx'> 			rbi-&gt;bi_flags = 1 &lt;&lt; BIO_UPTODATE;</div><div class='ctx'> 			rbi-&gt;bi_idx = 0;</div><div class='ctx'> 			rbi-&gt;bi_io_vec[0].bv_len = STRIPE_SIZE;</div><div class='hunk'>@@ -1114,6 +1147,8 @@ ops_run_biodrain(struct stripe_head *sh, struct dma_async_tx_descriptor *tx)</div><div class='ctx'> 				dev-&gt;sector + STRIPE_SECTORS) {</div><div class='ctx'> 				if (wbi-&gt;bi_rw &amp; REQ_FUA)</div><div class='ctx'> 					set_bit(R5_WantFUA, &amp;dev-&gt;flags);</div><div class='add'>+				if (wbi-&gt;bi_rw &amp; REQ_SYNC)</div><div class='add'>+					set_bit(R5_SyncIO, &amp;dev-&gt;flags);</div><div class='ctx'> 				tx = async_copy_data(1, wbi, dev-&gt;page,</div><div class='ctx'> 					dev-&gt;sector, tx);</div><div class='ctx'> 				wbi = r5_next_bio(wbi, dev-&gt;sector);</div><div class='hunk'>@@ -1131,13 +1166,15 @@ static void ops_complete_reconstruct(void *stripe_head_ref)</div><div class='ctx'> 	int pd_idx = sh-&gt;pd_idx;</div><div class='ctx'> 	int qd_idx = sh-&gt;qd_idx;</div><div class='ctx'> 	int i;</div><div class='del'>-	bool fua = false;</div><div class='add'>+	bool fua = false, sync = false;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: stripe %llu\n", __func__,</div><div class='ctx'> 		(unsigned long long)sh-&gt;sector);</div><div class='ctx'> </div><div class='del'>-	for (i = disks; i--; )</div><div class='add'>+	for (i = disks; i--; ) {</div><div class='ctx'> 		fua |= test_bit(R5_WantFUA, &amp;sh-&gt;dev[i].flags);</div><div class='add'>+		sync |= test_bit(R5_SyncIO, &amp;sh-&gt;dev[i].flags);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = disks; i--; ) {</div><div class='ctx'> 		struct r5dev *dev = &amp;sh-&gt;dev[i];</div><div class='hunk'>@@ -1146,6 +1183,8 @@ static void ops_complete_reconstruct(void *stripe_head_ref)</div><div class='ctx'> 			set_bit(R5_UPTODATE, &amp;dev-&gt;flags);</div><div class='ctx'> 			if (fua)</div><div class='ctx'> 				set_bit(R5_WantFUA, &amp;dev-&gt;flags);</div><div class='add'>+			if (sync)</div><div class='add'>+				set_bit(R5_SyncIO, &amp;dev-&gt;flags);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1648,7 +1687,7 @@ static void raid5_end_read_request(struct bio * bi, int error)</div><div class='ctx'> 	int uptodate = test_bit(BIO_UPTODATE, &amp;bi-&gt;bi_flags);</div><div class='ctx'> 	char b[BDEVNAME_SIZE];</div><div class='ctx'> 	struct md_rdev *rdev = NULL;</div><div class='del'>-</div><div class='add'>+	sector_t s;</div><div class='ctx'> </div><div class='ctx'> 	for (i=0 ; i&lt;disks; i++)</div><div class='ctx'> 		if (bi == &amp;sh-&gt;dev[i].req)</div><div class='hunk'>@@ -1671,6 +1710,10 @@ static void raid5_end_read_request(struct bio * bi, int error)</div><div class='ctx'> 	if (!rdev)</div><div class='ctx'> 		rdev = conf-&gt;disks[i].rdev;</div><div class='ctx'> </div><div class='add'>+	if (use_new_offset(conf, sh))</div><div class='add'>+		s = sh-&gt;sector + rdev-&gt;new_data_offset;</div><div class='add'>+	else</div><div class='add'>+		s = sh-&gt;sector + rdev-&gt;data_offset;</div><div class='ctx'> 	if (uptodate) {</div><div class='ctx'> 		set_bit(R5_UPTODATE, &amp;sh-&gt;dev[i].flags);</div><div class='ctx'> 		if (test_bit(R5_ReadError, &amp;sh-&gt;dev[i].flags)) {</div><div class='hunk'>@@ -1683,8 +1726,7 @@ static void raid5_end_read_request(struct bio * bi, int error)</div><div class='ctx'> 				"md/raid:%s: read error corrected"</div><div class='ctx'> 				" (%lu sectors at %llu on %s)\n",</div><div class='ctx'> 				mdname(conf-&gt;mddev), STRIPE_SECTORS,</div><div class='del'>-				(unsigned long long)(sh-&gt;sector</div><div class='del'>-						     + rdev-&gt;data_offset),</div><div class='add'>+				(unsigned long long)s,</div><div class='ctx'> 				bdevname(rdev-&gt;bdev, b));</div><div class='ctx'> 			atomic_add(STRIPE_SECTORS, &amp;rdev-&gt;corrected_errors);</div><div class='ctx'> 			clear_bit(R5_ReadError, &amp;sh-&gt;dev[i].flags);</div><div class='hunk'>@@ -1704,8 +1746,7 @@ static void raid5_end_read_request(struct bio * bi, int error)</div><div class='ctx'> 				"md/raid:%s: read error on replacement device "</div><div class='ctx'> 				"(sector %llu on %s).\n",</div><div class='ctx'> 				mdname(conf-&gt;mddev),</div><div class='del'>-				(unsigned long long)(sh-&gt;sector</div><div class='del'>-						     + rdev-&gt;data_offset),</div><div class='add'>+				(unsigned long long)s,</div><div class='ctx'> 				bdn);</div><div class='ctx'> 		else if (conf-&gt;mddev-&gt;degraded &gt;= conf-&gt;max_degraded)</div><div class='ctx'> 			printk_ratelimited(</div><div class='hunk'>@@ -1713,8 +1754,7 @@ static void raid5_end_read_request(struct bio * bi, int error)</div><div class='ctx'> 				"md/raid:%s: read error not correctable "</div><div class='ctx'> 				"(sector %llu on %s).\n",</div><div class='ctx'> 				mdname(conf-&gt;mddev),</div><div class='del'>-				(unsigned long long)(sh-&gt;sector</div><div class='del'>-						     + rdev-&gt;data_offset),</div><div class='add'>+				(unsigned long long)s,</div><div class='ctx'> 				bdn);</div><div class='ctx'> 		else if (test_bit(R5_ReWrite, &amp;sh-&gt;dev[i].flags))</div><div class='ctx'> 			/* Oh, no!!! */</div><div class='hunk'>@@ -1723,8 +1763,7 @@ static void raid5_end_read_request(struct bio * bi, int error)</div><div class='ctx'> 				"md/raid:%s: read error NOT corrected!! "</div><div class='ctx'> 				"(sector %llu on %s).\n",</div><div class='ctx'> 				mdname(conf-&gt;mddev),</div><div class='del'>-				(unsigned long long)(sh-&gt;sector</div><div class='del'>-						     + rdev-&gt;data_offset),</div><div class='add'>+				(unsigned long long)s,</div><div class='ctx'> 				bdn);</div><div class='ctx'> 		else if (atomic_read(&amp;rdev-&gt;read_errors)</div><div class='ctx'> 			 &gt; conf-&gt;max_nr_stripes)</div><div class='hunk'>@@ -3561,7 +3600,7 @@ finish:</div><div class='ctx'> 			if (test_and_clear_bit(R5_MadeGood, &amp;dev-&gt;flags)) {</div><div class='ctx'> 				rdev = conf-&gt;disks[i].rdev;</div><div class='ctx'> 				rdev_clear_badblocks(rdev, sh-&gt;sector,</div><div class='del'>-						     STRIPE_SECTORS);</div><div class='add'>+						     STRIPE_SECTORS, 0);</div><div class='ctx'> 				rdev_dec_pending(rdev, conf-&gt;mddev);</div><div class='ctx'> 			}</div><div class='ctx'> 			if (test_and_clear_bit(R5_MadeGoodRepl, &amp;dev-&gt;flags)) {</div><div class='hunk'>@@ -3570,7 +3609,7 @@ finish:</div><div class='ctx'> 					/* rdev have been moved down */</div><div class='ctx'> 					rdev = conf-&gt;disks[i].rdev;</div><div class='ctx'> 				rdev_clear_badblocks(rdev, sh-&gt;sector,</div><div class='del'>-						     STRIPE_SECTORS);</div><div class='add'>+						     STRIPE_SECTORS, 0);</div><div class='ctx'> 				rdev_dec_pending(rdev, conf-&gt;mddev);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3842,6 +3881,7 @@ static int chunk_aligned_read(struct mddev *mddev, struct bio * raid_bio)</div><div class='ctx'> 		raid_bio-&gt;bi_next = (void*)rdev;</div><div class='ctx'> 		align_bi-&gt;bi_bdev =  rdev-&gt;bdev;</div><div class='ctx'> 		align_bi-&gt;bi_flags &amp;= ~(1 &lt;&lt; BIO_SEG_VALID);</div><div class='add'>+		/* No reshape active, so we can trust rdev-&gt;data_offset */</div><div class='ctx'> 		align_bi-&gt;bi_sector += rdev-&gt;data_offset;</div><div class='ctx'> </div><div class='ctx'> 		if (!bio_fits_rdev(align_bi) ||</div><div class='hunk'>@@ -3953,12 +3993,10 @@ static void make_request(struct mddev *mddev, struct bio * bi)</div><div class='ctx'> 	plugged = mddev_check_plugged(mddev);</div><div class='ctx'> 	for (;logical_sector &lt; last_sector; logical_sector += STRIPE_SECTORS) {</div><div class='ctx'> 		DEFINE_WAIT(w);</div><div class='del'>-		int disks, data_disks;</div><div class='ctx'> 		int previous;</div><div class='ctx'> </div><div class='ctx'> 	retry:</div><div class='ctx'> 		previous = 0;</div><div class='del'>-		disks = conf-&gt;raid_disks;</div><div class='ctx'> 		prepare_to_wait(&amp;conf-&gt;wait_for_overlap, &amp;w, TASK_UNINTERRUPTIBLE);</div><div class='ctx'> 		if (unlikely(conf-&gt;reshape_progress != MaxSector)) {</div><div class='ctx'> 			/* spinlock is needed as reshape_progress may be</div><div class='hunk'>@@ -3970,13 +4008,12 @@ static void make_request(struct mddev *mddev, struct bio * bi)</div><div class='ctx'> 			 * to check again.</div><div class='ctx'> 			 */</div><div class='ctx'> 			spin_lock_irq(&amp;conf-&gt;device_lock);</div><div class='del'>-			if (mddev-&gt;delta_disks &lt; 0</div><div class='add'>+			if (mddev-&gt;reshape_backwards</div><div class='ctx'> 			    ? logical_sector &lt; conf-&gt;reshape_progress</div><div class='ctx'> 			    : logical_sector &gt;= conf-&gt;reshape_progress) {</div><div class='del'>-				disks = conf-&gt;previous_raid_disks;</div><div class='ctx'> 				previous = 1;</div><div class='ctx'> 			} else {</div><div class='del'>-				if (mddev-&gt;delta_disks &lt; 0</div><div class='add'>+				if (mddev-&gt;reshape_backwards</div><div class='ctx'> 				    ? logical_sector &lt; conf-&gt;reshape_safe</div><div class='ctx'> 				    : logical_sector &gt;= conf-&gt;reshape_safe) {</div><div class='ctx'> 					spin_unlock_irq(&amp;conf-&gt;device_lock);</div><div class='hunk'>@@ -3986,7 +4023,6 @@ static void make_request(struct mddev *mddev, struct bio * bi)</div><div class='ctx'> 			}</div><div class='ctx'> 			spin_unlock_irq(&amp;conf-&gt;device_lock);</div><div class='ctx'> 		}</div><div class='del'>-		data_disks = disks - conf-&gt;max_degraded;</div><div class='ctx'> </div><div class='ctx'> 		new_sector = raid5_compute_sector(conf, logical_sector,</div><div class='ctx'> 						  previous,</div><div class='hunk'>@@ -4009,7 +4045,7 @@ static void make_request(struct mddev *mddev, struct bio * bi)</div><div class='ctx'> 				 */</div><div class='ctx'> 				int must_retry = 0;</div><div class='ctx'> 				spin_lock_irq(&amp;conf-&gt;device_lock);</div><div class='del'>-				if (mddev-&gt;delta_disks &lt; 0</div><div class='add'>+				if (mddev-&gt;reshape_backwards</div><div class='ctx'> 				    ? logical_sector &gt;= conf-&gt;reshape_progress</div><div class='ctx'> 				    : logical_sector &lt; conf-&gt;reshape_progress)</div><div class='ctx'> 					/* mismatch, need to try again */</div><div class='hunk'>@@ -4108,11 +4144,11 @@ static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr, int *sk</div><div class='ctx'> </div><div class='ctx'> 	if (sector_nr == 0) {</div><div class='ctx'> 		/* If restarting in the middle, skip the initial sectors */</div><div class='del'>-		if (mddev-&gt;delta_disks &lt; 0 &amp;&amp;</div><div class='add'>+		if (mddev-&gt;reshape_backwards &amp;&amp;</div><div class='ctx'> 		    conf-&gt;reshape_progress &lt; raid5_size(mddev, 0, 0)) {</div><div class='ctx'> 			sector_nr = raid5_size(mddev, 0, 0)</div><div class='ctx'> 				- conf-&gt;reshape_progress;</div><div class='del'>-		} else if (mddev-&gt;delta_disks &gt;= 0 &amp;&amp;</div><div class='add'>+		} else if (!mddev-&gt;reshape_backwards &amp;&amp;</div><div class='ctx'> 			   conf-&gt;reshape_progress &gt; 0)</div><div class='ctx'> 			sector_nr = conf-&gt;reshape_progress;</div><div class='ctx'> 		sector_div(sector_nr, new_data_disks);</div><div class='hunk'>@@ -4133,13 +4169,11 @@ static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr, int *sk</div><div class='ctx'> 	else</div><div class='ctx'> 		reshape_sectors = mddev-&gt;chunk_sectors;</div><div class='ctx'> </div><div class='del'>-	/* we update the metadata when there is more than 3Meg</div><div class='del'>-	 * in the block range (that is rather arbitrary, should</div><div class='del'>-	 * probably be time based) or when the data about to be</div><div class='del'>-	 * copied would over-write the source of the data at</div><div class='del'>-	 * the front of the range.</div><div class='del'>-	 * i.e. one new_stripe along from reshape_progress new_maps</div><div class='del'>-	 * to after where reshape_safe old_maps to</div><div class='add'>+	/* We update the metadata at least every 10 seconds, or when</div><div class='add'>+	 * the data about to be copied would over-write the source of</div><div class='add'>+	 * the data at the front of the range.  i.e. one new_stripe</div><div class='add'>+	 * along from reshape_progress new_maps to after where</div><div class='add'>+	 * reshape_safe old_maps to</div><div class='ctx'> 	 */</div><div class='ctx'> 	writepos = conf-&gt;reshape_progress;</div><div class='ctx'> 	sector_div(writepos, new_data_disks);</div><div class='hunk'>@@ -4147,7 +4181,7 @@ static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr, int *sk</div><div class='ctx'> 	sector_div(readpos, data_disks);</div><div class='ctx'> 	safepos = conf-&gt;reshape_safe;</div><div class='ctx'> 	sector_div(safepos, data_disks);</div><div class='del'>-	if (mddev-&gt;delta_disks &lt; 0) {</div><div class='add'>+	if (mddev-&gt;reshape_backwards) {</div><div class='ctx'> 		writepos -= min_t(sector_t, reshape_sectors, writepos);</div><div class='ctx'> 		readpos += reshape_sectors;</div><div class='ctx'> 		safepos += reshape_sectors;</div><div class='hunk'>@@ -4157,11 +4191,29 @@ static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr, int *sk</div><div class='ctx'> 		safepos -= min_t(sector_t, reshape_sectors, safepos);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Having calculated the 'writepos' possibly use it</div><div class='add'>+	 * to set 'stripe_addr' which is where we will write to.</div><div class='add'>+	 */</div><div class='add'>+	if (mddev-&gt;reshape_backwards) {</div><div class='add'>+		BUG_ON(conf-&gt;reshape_progress == 0);</div><div class='add'>+		stripe_addr = writepos;</div><div class='add'>+		BUG_ON((mddev-&gt;dev_sectors &amp;</div><div class='add'>+			~((sector_t)reshape_sectors - 1))</div><div class='add'>+		       - reshape_sectors - stripe_addr</div><div class='add'>+		       != sector_nr);</div><div class='add'>+	} else {</div><div class='add'>+		BUG_ON(writepos != sector_nr + reshape_sectors);</div><div class='add'>+		stripe_addr = sector_nr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* 'writepos' is the most advanced device address we might write.</div><div class='ctx'> 	 * 'readpos' is the least advanced device address we might read.</div><div class='ctx'> 	 * 'safepos' is the least address recorded in the metadata as having</div><div class='ctx'> 	 *     been reshaped.</div><div class='del'>-	 * If 'readpos' is behind 'writepos', then there is no way that we can</div><div class='add'>+	 * If there is a min_offset_diff, these are adjusted either by</div><div class='add'>+	 * increasing the safepos/readpos if diff is negative, or</div><div class='add'>+	 * increasing writepos if diff is positive.</div><div class='add'>+	 * If 'readpos' is then behind 'writepos', there is no way that we can</div><div class='ctx'> 	 * ensure safety in the face of a crash - that must be done by userspace</div><div class='ctx'> 	 * making a backup of the data.  So in that case there is no particular</div><div class='ctx'> 	 * rush to update metadata.</div><div class='hunk'>@@ -4174,7 +4226,13 @@ static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr, int *sk</div><div class='ctx'> 	 * Maybe that number should be configurable, but I'm not sure it is</div><div class='ctx'> 	 * worth it.... maybe it could be a multiple of safemode_delay???</div><div class='ctx'> 	 */</div><div class='del'>-	if ((mddev-&gt;delta_disks &lt; 0</div><div class='add'>+	if (conf-&gt;min_offset_diff &lt; 0) {</div><div class='add'>+		safepos += -conf-&gt;min_offset_diff;</div><div class='add'>+		readpos += -conf-&gt;min_offset_diff;</div><div class='add'>+	} else</div><div class='add'>+		writepos += conf-&gt;min_offset_diff;</div><div class='add'>+</div><div class='add'>+	if ((mddev-&gt;reshape_backwards</div><div class='ctx'> 	     ? (safepos &gt; writepos &amp;&amp; readpos &lt; writepos)</div><div class='ctx'> 	     : (safepos &lt; writepos &amp;&amp; readpos &gt; writepos)) ||</div><div class='ctx'> 	    time_after(jiffies, conf-&gt;reshape_checkpoint + 10*HZ)) {</div><div class='hunk'>@@ -4195,17 +4253,6 @@ static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr, int *sk</div><div class='ctx'> 		sysfs_notify(&amp;mddev-&gt;kobj, NULL, "sync_completed");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mddev-&gt;delta_disks &lt; 0) {</div><div class='del'>-		BUG_ON(conf-&gt;reshape_progress == 0);</div><div class='del'>-		stripe_addr = writepos;</div><div class='del'>-		BUG_ON((mddev-&gt;dev_sectors &amp;</div><div class='del'>-			~((sector_t)reshape_sectors - 1))</div><div class='del'>-		       - reshape_sectors - stripe_addr</div><div class='del'>-		       != sector_nr);</div><div class='del'>-	} else {</div><div class='del'>-		BUG_ON(writepos != sector_nr + reshape_sectors);</div><div class='del'>-		stripe_addr = sector_nr;</div><div class='del'>-	}</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;stripes);</div><div class='ctx'> 	for (i = 0; i &lt; reshape_sectors; i += STRIPE_SECTORS) {</div><div class='ctx'> 		int j;</div><div class='hunk'>@@ -4239,7 +4286,7 @@ static sector_t reshape_request(struct mddev *mddev, sector_t sector_nr, int *sk</div><div class='ctx'> 		list_add(&amp;sh-&gt;lru, &amp;stripes);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_lock_irq(&amp;conf-&gt;device_lock);</div><div class='del'>-	if (mddev-&gt;delta_disks &lt; 0)</div><div class='add'>+	if (mddev-&gt;reshape_backwards)</div><div class='ctx'> 		conf-&gt;reshape_progress -= reshape_sectors * new_data_disks;</div><div class='ctx'> 	else</div><div class='ctx'> 		conf-&gt;reshape_progress += reshape_sectors * new_data_disks;</div><div class='hunk'>@@ -4952,16 +4999,42 @@ static int run(struct mddev *mddev)</div><div class='ctx'> 	struct md_rdev *rdev;</div><div class='ctx'> 	sector_t reshape_offset = 0;</div><div class='ctx'> 	int i;</div><div class='add'>+	long long min_offset_diff = 0;</div><div class='add'>+	int first = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (mddev-&gt;recovery_cp != MaxSector)</div><div class='ctx'> 		printk(KERN_NOTICE "md/raid:%s: not clean"</div><div class='ctx'> 		       " -- starting background reconstruction\n",</div><div class='ctx'> 		       mdname(mddev));</div><div class='add'>+</div><div class='add'>+	rdev_for_each(rdev, mddev) {</div><div class='add'>+		long long diff;</div><div class='add'>+		if (rdev-&gt;raid_disk &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+		diff = (rdev-&gt;new_data_offset - rdev-&gt;data_offset);</div><div class='add'>+		if (first) {</div><div class='add'>+			min_offset_diff = diff;</div><div class='add'>+			first = 0;</div><div class='add'>+		} else if (mddev-&gt;reshape_backwards &amp;&amp;</div><div class='add'>+			 diff &lt; min_offset_diff)</div><div class='add'>+			min_offset_diff = diff;</div><div class='add'>+		else if (!mddev-&gt;reshape_backwards &amp;&amp;</div><div class='add'>+			 diff &gt; min_offset_diff)</div><div class='add'>+			min_offset_diff = diff;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (mddev-&gt;reshape_position != MaxSector) {</div><div class='ctx'> 		/* Check that we can continue the reshape.</div><div class='del'>-		 * Currently only disks can change, it must</div><div class='del'>-		 * increase, and we must be past the point where</div><div class='del'>-		 * a stripe over-writes itself</div><div class='add'>+		 * Difficulties arise if the stripe we would write to</div><div class='add'>+		 * next is at or after the stripe we would read from next.</div><div class='add'>+		 * For a reshape that changes the number of devices, this</div><div class='add'>+		 * is only possible for a very short time, and mdadm makes</div><div class='add'>+		 * sure that time appears to have past before assembling</div><div class='add'>+		 * the array.  So we fail if that time hasn't passed.</div><div class='add'>+		 * For a reshape that keeps the number of devices the same</div><div class='add'>+		 * mdadm must be monitoring the reshape can keeping the</div><div class='add'>+		 * critical areas read-only and backed up.  It will start</div><div class='add'>+		 * the array in read-only mode, so we check for that.</div><div class='ctx'> 		 */</div><div class='ctx'> 		sector_t here_new, here_old;</div><div class='ctx'> 		int old_disks;</div><div class='hunk'>@@ -4993,26 +5066,34 @@ static int run(struct mddev *mddev)</div><div class='ctx'> 		/* here_old is the first stripe that we might need to read</div><div class='ctx'> 		 * from */</div><div class='ctx'> 		if (mddev-&gt;delta_disks == 0) {</div><div class='add'>+			if ((here_new * mddev-&gt;new_chunk_sectors !=</div><div class='add'>+			     here_old * mddev-&gt;chunk_sectors)) {</div><div class='add'>+				printk(KERN_ERR "md/raid:%s: reshape position is"</div><div class='add'>+				       " confused - aborting\n", mdname(mddev));</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='ctx'> 			/* We cannot be sure it is safe to start an in-place</div><div class='del'>-			 * reshape.  It is only safe if user-space if monitoring</div><div class='add'>+			 * reshape.  It is only safe if user-space is monitoring</div><div class='ctx'> 			 * and taking constant backups.</div><div class='ctx'> 			 * mdadm always starts a situation like this in</div><div class='ctx'> 			 * readonly mode so it can take control before</div><div class='ctx'> 			 * allowing any writes.  So just check for that.</div><div class='ctx'> 			 */</div><div class='del'>-			if ((here_new * mddev-&gt;new_chunk_sectors != </div><div class='del'>-			     here_old * mddev-&gt;chunk_sectors) ||</div><div class='del'>-			    mddev-&gt;ro == 0) {</div><div class='del'>-				printk(KERN_ERR "md/raid:%s: in-place reshape must be started"</div><div class='del'>-				       " in read-only mode - aborting\n",</div><div class='add'>+			if (abs(min_offset_diff) &gt;= mddev-&gt;chunk_sectors &amp;&amp;</div><div class='add'>+			    abs(min_offset_diff) &gt;= mddev-&gt;new_chunk_sectors)</div><div class='add'>+				/* not really in-place - so OK */;</div><div class='add'>+			else if (mddev-&gt;ro == 0) {</div><div class='add'>+				printk(KERN_ERR "md/raid:%s: in-place reshape "</div><div class='add'>+				       "must be started in read-only mode "</div><div class='add'>+				       "- aborting\n",</div><div class='ctx'> 				       mdname(mddev));</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 			}</div><div class='del'>-		} else if (mddev-&gt;delta_disks &lt; 0</div><div class='del'>-		    ? (here_new * mddev-&gt;new_chunk_sectors &lt;=</div><div class='add'>+		} else if (mddev-&gt;reshape_backwards</div><div class='add'>+		    ? (here_new * mddev-&gt;new_chunk_sectors + min_offset_diff &lt;=</div><div class='ctx'> 		       here_old * mddev-&gt;chunk_sectors)</div><div class='ctx'> 		    : (here_new * mddev-&gt;new_chunk_sectors &gt;=</div><div class='del'>-		       here_old * mddev-&gt;chunk_sectors)) {</div><div class='add'>+		       here_old * mddev-&gt;chunk_sectors + (-min_offset_diff))) {</div><div class='ctx'> 			/* Reading from the same stripe as writing to - bad */</div><div class='ctx'> 			printk(KERN_ERR "md/raid:%s: reshape_position too early for "</div><div class='ctx'> 			       "auto-recovery - aborting.\n",</div><div class='hunk'>@@ -5037,6 +5118,7 @@ static int run(struct mddev *mddev)</div><div class='ctx'> 	if (IS_ERR(conf))</div><div class='ctx'> 		return PTR_ERR(conf);</div><div class='ctx'> </div><div class='add'>+	conf-&gt;min_offset_diff = min_offset_diff;</div><div class='ctx'> 	mddev-&gt;thread = conf-&gt;thread;</div><div class='ctx'> 	conf-&gt;thread = NULL;</div><div class='ctx'> 	mddev-&gt;private = conf;</div><div class='hunk'>@@ -5182,9 +5264,12 @@ static int run(struct mddev *mddev)</div><div class='ctx'> 		blk_queue_io_opt(mddev-&gt;queue, chunk_size *</div><div class='ctx'> 				 (conf-&gt;raid_disks - conf-&gt;max_degraded));</div><div class='ctx'> </div><div class='del'>-		rdev_for_each(rdev, mddev)</div><div class='add'>+		rdev_for_each(rdev, mddev) {</div><div class='ctx'> 			disk_stack_limits(mddev-&gt;gendisk, rdev-&gt;bdev,</div><div class='ctx'> 					  rdev-&gt;data_offset &lt;&lt; 9);</div><div class='add'>+			disk_stack_limits(mddev-&gt;gendisk, rdev-&gt;bdev,</div><div class='add'>+					  rdev-&gt;new_data_offset &lt;&lt; 9);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -5418,12 +5503,18 @@ static int raid5_resize(struct mddev *mddev, sector_t sectors)</div><div class='ctx'> 	 * any io in the removed space completes, but it hardly seems</div><div class='ctx'> 	 * worth it.</div><div class='ctx'> 	 */</div><div class='add'>+	sector_t newsize;</div><div class='ctx'> 	sectors &amp;= ~((sector_t)mddev-&gt;chunk_sectors - 1);</div><div class='del'>-	md_set_array_sectors(mddev, raid5_size(mddev, sectors,</div><div class='del'>-					       mddev-&gt;raid_disks));</div><div class='del'>-	if (mddev-&gt;array_sectors &gt;</div><div class='del'>-	    raid5_size(mddev, sectors, mddev-&gt;raid_disks))</div><div class='add'>+	newsize = raid5_size(mddev, sectors, mddev-&gt;raid_disks);</div><div class='add'>+	if (mddev-&gt;external_size &amp;&amp;</div><div class='add'>+	    mddev-&gt;array_sectors &gt; newsize)</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	if (mddev-&gt;bitmap) {</div><div class='add'>+		int ret = bitmap_resize(mddev-&gt;bitmap, sectors, 0, 0);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	md_set_array_sectors(mddev, newsize);</div><div class='ctx'> 	set_capacity(mddev-&gt;gendisk, mddev-&gt;array_sectors);</div><div class='ctx'> 	revalidate_disk(mddev-&gt;gendisk);</div><div class='ctx'> 	if (sectors &gt; mddev-&gt;dev_sectors &amp;&amp;</div><div class='hunk'>@@ -5468,9 +5559,6 @@ static int check_reshape(struct mddev *mddev)</div><div class='ctx'> 	    mddev-&gt;new_layout == mddev-&gt;layout &amp;&amp;</div><div class='ctx'> 	    mddev-&gt;new_chunk_sectors == mddev-&gt;chunk_sectors)</div><div class='ctx'> 		return 0; /* nothing to do */</div><div class='del'>-	if (mddev-&gt;bitmap)</div><div class='del'>-		/* Cannot grow a bitmap yet */</div><div class='del'>-		return -EBUSY;</div><div class='ctx'> 	if (has_failed(conf))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (mddev-&gt;delta_disks &lt; 0) {</div><div class='hunk'>@@ -5505,10 +5593,14 @@ static int raid5_start_reshape(struct mddev *mddev)</div><div class='ctx'> 	if (!check_stripe_cache(mddev))</div><div class='ctx'> 		return -ENOSPC;</div><div class='ctx'> </div><div class='del'>-	rdev_for_each(rdev, mddev)</div><div class='add'>+	if (has_failed(conf))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rdev_for_each(rdev, mddev) {</div><div class='ctx'> 		if (!test_bit(In_sync, &amp;rdev-&gt;flags)</div><div class='ctx'> 		    &amp;&amp; !test_bit(Faulty, &amp;rdev-&gt;flags))</div><div class='ctx'> 			spares++;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (spares - mddev-&gt;degraded &lt; mddev-&gt;delta_disks - conf-&gt;max_degraded)</div><div class='ctx'> 		/* Not enough devices even to make a degraded array</div><div class='hunk'>@@ -5535,12 +5627,16 @@ static int raid5_start_reshape(struct mddev *mddev)</div><div class='ctx'> 	conf-&gt;chunk_sectors = mddev-&gt;new_chunk_sectors;</div><div class='ctx'> 	conf-&gt;prev_algo = conf-&gt;algorithm;</div><div class='ctx'> 	conf-&gt;algorithm = mddev-&gt;new_layout;</div><div class='del'>-	if (mddev-&gt;delta_disks &lt; 0)</div><div class='add'>+	conf-&gt;generation++;</div><div class='add'>+	/* Code that selects data_offset needs to see the generation update</div><div class='add'>+	 * if reshape_progress has been set - so a memory barrier needed.</div><div class='add'>+	 */</div><div class='add'>+	smp_mb();</div><div class='add'>+	if (mddev-&gt;reshape_backwards)</div><div class='ctx'> 		conf-&gt;reshape_progress = raid5_size(mddev, 0, 0);</div><div class='ctx'> 	else</div><div class='ctx'> 		conf-&gt;reshape_progress = 0;</div><div class='ctx'> 	conf-&gt;reshape_safe = conf-&gt;reshape_progress;</div><div class='del'>-	conf-&gt;generation++;</div><div class='ctx'> 	spin_unlock_irq(&amp;conf-&gt;device_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Add some new drives, as many as will fit.</div><div class='hunk'>@@ -5592,6 +5688,9 @@ static int raid5_start_reshape(struct mddev *mddev)</div><div class='ctx'> 		mddev-&gt;recovery = 0;</div><div class='ctx'> 		spin_lock_irq(&amp;conf-&gt;device_lock);</div><div class='ctx'> 		mddev-&gt;raid_disks = conf-&gt;raid_disks = conf-&gt;previous_raid_disks;</div><div class='add'>+		rdev_for_each(rdev, mddev)</div><div class='add'>+			rdev-&gt;new_data_offset = rdev-&gt;data_offset;</div><div class='add'>+		smp_wmb();</div><div class='ctx'> 		conf-&gt;reshape_progress = MaxSector;</div><div class='ctx'> 		mddev-&gt;reshape_position = MaxSector;</div><div class='ctx'> 		spin_unlock_irq(&amp;conf-&gt;device_lock);</div><div class='hunk'>@@ -5610,9 +5709,13 @@ static void end_reshape(struct r5conf *conf)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(MD_RECOVERY_INTR, &amp;conf-&gt;mddev-&gt;recovery)) {</div><div class='add'>+		struct md_rdev *rdev;</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_irq(&amp;conf-&gt;device_lock);</div><div class='ctx'> 		conf-&gt;previous_raid_disks = conf-&gt;raid_disks;</div><div class='add'>+		rdev_for_each(rdev, conf-&gt;mddev)</div><div class='add'>+			rdev-&gt;data_offset = rdev-&gt;new_data_offset;</div><div class='add'>+		smp_wmb();</div><div class='ctx'> 		conf-&gt;reshape_progress = MaxSector;</div><div class='ctx'> 		spin_unlock_irq(&amp;conf-&gt;device_lock);</div><div class='ctx'> 		wake_up(&amp;conf-&gt;wait_for_overlap);</div><div class='hunk'>@@ -5652,17 +5755,18 @@ static void raid5_finish_reshape(struct mddev *mddev)</div><div class='ctx'> 			     d &lt; conf-&gt;raid_disks - mddev-&gt;delta_disks;</div><div class='ctx'> 			     d++) {</div><div class='ctx'> 				struct md_rdev *rdev = conf-&gt;disks[d].rdev;</div><div class='del'>-				if (rdev &amp;&amp;</div><div class='del'>-				    raid5_remove_disk(mddev, rdev) == 0) {</div><div class='del'>-					sysfs_unlink_rdev(mddev, rdev);</div><div class='del'>-					rdev-&gt;raid_disk = -1;</div><div class='del'>-				}</div><div class='add'>+				if (rdev)</div><div class='add'>+					clear_bit(In_sync, &amp;rdev-&gt;flags);</div><div class='add'>+				rdev = conf-&gt;disks[d].replacement;</div><div class='add'>+				if (rdev)</div><div class='add'>+					clear_bit(In_sync, &amp;rdev-&gt;flags);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		mddev-&gt;layout = conf-&gt;algorithm;</div><div class='ctx'> 		mddev-&gt;chunk_sectors = conf-&gt;chunk_sectors;</div><div class='ctx'> 		mddev-&gt;reshape_position = MaxSector;</div><div class='ctx'> 		mddev-&gt;delta_disks = 0;</div><div class='add'>+		mddev-&gt;reshape_backwards = 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/md/raid5.h b/drivers/md/raid5.h<br/>index 8d8e13934a48..2164021f3b5f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/md/raid5.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/md/raid5.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/md/raid5.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/md/raid5.h</a></div><div class='hunk'>@@ -285,6 +285,7 @@ enum r5dev_flags {</div><div class='ctx'> 			 */</div><div class='ctx'> 	R5_Wantdrain,	/* dev-&gt;towrite needs to be drained */</div><div class='ctx'> 	R5_WantFUA,	/* Write should be FUA */</div><div class='add'>+	R5_SyncIO,	/* The IO is sync */</div><div class='ctx'> 	R5_WriteError,	/* got a write error - need to record it */</div><div class='ctx'> 	R5_MadeGood,	/* A bad block has been fixed by writing to it */</div><div class='ctx'> 	R5_ReadRepl,	/* Will/did read from replacement rather than orig */</div><div class='hunk'>@@ -385,6 +386,12 @@ struct r5conf {</div><div class='ctx'> 	short			generation; /* increments with every reshape */</div><div class='ctx'> 	unsigned long		reshape_checkpoint; /* Time we last updated</div><div class='ctx'> 						     * metadata */</div><div class='add'>+	long long		min_offset_diff; /* minimum difference between</div><div class='add'>+						  * data_offset and</div><div class='add'>+						  * new_data_offset across all</div><div class='add'>+						  * devices.  May be negative,</div><div class='add'>+						  * but is closest to zero.</div><div class='add'>+						  */</div><div class='ctx'> </div><div class='ctx'> 	struct list_head	handle_list; /* stripes needing handling */</div><div class='ctx'> 	struct list_head	hold_list; /* preread ready stripes */</div><div class='head'>diff --git a/drivers/media/common/saa7146_fops.c b/drivers/media/common/saa7146_fops.c<br/>index 71f8e018e564..7d42c11c8684 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/common/saa7146_fops.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/common/saa7146_fops.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/saa7146_fops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/saa7146_fops.c</a></div><div class='hunk'>@@ -198,7 +198,6 @@ static int fops_open(struct file *file)</div><div class='ctx'> 	struct saa7146_dev *dev = video_drvdata(file);</div><div class='ctx'> 	struct saa7146_fh *fh = NULL;</div><div class='ctx'> 	int result = 0;</div><div class='del'>-</div><div class='ctx'> 	enum v4l2_buf_type type;</div><div class='ctx'> </div><div class='ctx'> 	DEB_EE("file:%p, dev:%s\n", file, video_device_node_name(vdev));</div><div class='hunk'>@@ -227,11 +226,12 @@ static int fops_open(struct file *file)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	file-&gt;private_data = fh;</div><div class='add'>+	v4l2_fh_init(&amp;fh-&gt;fh, vdev);</div><div class='add'>+</div><div class='add'>+	file-&gt;private_data = &amp;fh-&gt;fh;</div><div class='ctx'> 	fh-&gt;dev = dev;</div><div class='del'>-	fh-&gt;type = type;</div><div class='ctx'> </div><div class='del'>-	if( fh-&gt;type == V4L2_BUF_TYPE_VBI_CAPTURE) {</div><div class='add'>+	if (vdev-&gt;vfl_type == VFL_TYPE_VBI) {</div><div class='ctx'> 		DEB_S("initializing vbi...\n");</div><div class='ctx'> 		if (dev-&gt;ext_vv_data-&gt;capabilities &amp; V4L2_CAP_VBI_CAPTURE)</div><div class='ctx'> 			result = saa7146_vbi_uops.open(dev,file);</div><div class='hunk'>@@ -252,6 +252,7 @@ static int fops_open(struct file *file)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	result = 0;</div><div class='add'>+	v4l2_fh_add(&amp;fh-&gt;fh);</div><div class='ctx'> out:</div><div class='ctx'> 	if (fh &amp;&amp; result != 0) {</div><div class='ctx'> 		kfree(fh);</div><div class='hunk'>@@ -263,6 +264,7 @@ out:</div><div class='ctx'> </div><div class='ctx'> static int fops_release(struct file *file)</div><div class='ctx'> {</div><div class='add'>+	struct video_device *vdev = video_devdata(file);</div><div class='ctx'> 	struct saa7146_fh  *fh  = file-&gt;private_data;</div><div class='ctx'> 	struct saa7146_dev *dev = fh-&gt;dev;</div><div class='ctx'> </div><div class='hunk'>@@ -271,7 +273,7 @@ static int fops_release(struct file *file)</div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;saa7146_devices_lock))</div><div class='ctx'> 		return -ERESTARTSYS;</div><div class='ctx'> </div><div class='del'>-	if( fh-&gt;type == V4L2_BUF_TYPE_VBI_CAPTURE) {</div><div class='add'>+	if (vdev-&gt;vfl_type == VFL_TYPE_VBI) {</div><div class='ctx'> 		if (dev-&gt;ext_vv_data-&gt;capabilities &amp; V4L2_CAP_VBI_CAPTURE)</div><div class='ctx'> 			saa7146_vbi_uops.release(dev,file);</div><div class='ctx'> 		if (dev-&gt;ext_vv_data-&gt;vbi_fops.release)</div><div class='hunk'>@@ -280,6 +282,8 @@ static int fops_release(struct file *file)</div><div class='ctx'> 		saa7146_video_uops.release(dev,file);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	v4l2_fh_del(&amp;fh-&gt;fh);</div><div class='add'>+	v4l2_fh_exit(&amp;fh-&gt;fh);</div><div class='ctx'> 	module_put(dev-&gt;ext-&gt;module);</div><div class='ctx'> 	file-&gt;private_data = NULL;</div><div class='ctx'> 	kfree(fh);</div><div class='hunk'>@@ -291,19 +295,22 @@ static int fops_release(struct file *file)</div><div class='ctx'> </div><div class='ctx'> static int fops_mmap(struct file *file, struct vm_area_struct * vma)</div><div class='ctx'> {</div><div class='add'>+	struct video_device *vdev = video_devdata(file);</div><div class='ctx'> 	struct saa7146_fh *fh = file-&gt;private_data;</div><div class='ctx'> 	struct videobuf_queue *q;</div><div class='ctx'> </div><div class='del'>-	switch (fh-&gt;type) {</div><div class='del'>-	case V4L2_BUF_TYPE_VIDEO_CAPTURE: {</div><div class='add'>+	switch (vdev-&gt;vfl_type) {</div><div class='add'>+	case VFL_TYPE_GRABBER: {</div><div class='ctx'> 		DEB_EE("V4L2_BUF_TYPE_VIDEO_CAPTURE: file:%p, vma:%p\n",</div><div class='ctx'> 		       file, vma);</div><div class='ctx'> 		q = &amp;fh-&gt;video_q;</div><div class='ctx'> 		break;</div><div class='ctx'> 		}</div><div class='del'>-	case V4L2_BUF_TYPE_VBI_CAPTURE: {</div><div class='add'>+	case VFL_TYPE_VBI: {</div><div class='ctx'> 		DEB_EE("V4L2_BUF_TYPE_VBI_CAPTURE: file:%p, vma:%p\n",</div><div class='ctx'> 		       file, vma);</div><div class='add'>+		if (fh-&gt;dev-&gt;ext_vv_data-&gt;capabilities &amp; V4L2_CAP_SLICED_VBI_OUTPUT)</div><div class='add'>+			return -ENODEV;</div><div class='ctx'> 		q = &amp;fh-&gt;vbi_q;</div><div class='ctx'> 		break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -317,15 +324,19 @@ static int fops_mmap(struct file *file, struct vm_area_struct * vma)</div><div class='ctx'> </div><div class='ctx'> static unsigned int fops_poll(struct file *file, struct poll_table_struct *wait)</div><div class='ctx'> {</div><div class='add'>+	struct video_device *vdev = video_devdata(file);</div><div class='ctx'> 	struct saa7146_fh *fh = file-&gt;private_data;</div><div class='ctx'> 	struct videobuf_buffer *buf = NULL;</div><div class='ctx'> 	struct videobuf_queue *q;</div><div class='add'>+	unsigned int res = v4l2_ctrl_poll(file, wait);</div><div class='ctx'> </div><div class='ctx'> 	DEB_EE("file:%p, poll:%p\n", file, wait);</div><div class='ctx'> </div><div class='del'>-	if (V4L2_BUF_TYPE_VBI_CAPTURE == fh-&gt;type) {</div><div class='add'>+	if (vdev-&gt;vfl_type == VFL_TYPE_VBI) {</div><div class='add'>+		if (fh-&gt;dev-&gt;ext_vv_data-&gt;capabilities &amp; V4L2_CAP_SLICED_VBI_OUTPUT)</div><div class='add'>+			return res | POLLOUT | POLLWRNORM;</div><div class='ctx'> 		if( 0 == fh-&gt;vbi_q.streaming )</div><div class='del'>-			return videobuf_poll_stream(file, &amp;fh-&gt;vbi_q, wait);</div><div class='add'>+			return res | videobuf_poll_stream(file, &amp;fh-&gt;vbi_q, wait);</div><div class='ctx'> 		q = &amp;fh-&gt;vbi_q;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		DEB_D("using video queue\n");</div><div class='hunk'>@@ -337,31 +348,32 @@ static unsigned int fops_poll(struct file *file, struct poll_table_struct *wait)</div><div class='ctx'> </div><div class='ctx'> 	if (!buf) {</div><div class='ctx'> 		DEB_D("buf == NULL!\n");</div><div class='del'>-		return POLLERR;</div><div class='add'>+		return res | POLLERR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	poll_wait(file, &amp;buf-&gt;done, wait);</div><div class='ctx'> 	if (buf-&gt;state == VIDEOBUF_DONE || buf-&gt;state == VIDEOBUF_ERROR) {</div><div class='ctx'> 		DEB_D("poll succeeded!\n");</div><div class='del'>-		return POLLIN|POLLRDNORM;</div><div class='add'>+		return res | POLLIN | POLLRDNORM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	DEB_D("nothing to poll for, buf-&gt;state:%d\n", buf-&gt;state);</div><div class='del'>-	return 0;</div><div class='add'>+	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t fops_read(struct file *file, char __user *data, size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='add'>+	struct video_device *vdev = video_devdata(file);</div><div class='ctx'> 	struct saa7146_fh *fh = file-&gt;private_data;</div><div class='ctx'> </div><div class='del'>-	switch (fh-&gt;type) {</div><div class='del'>-	case V4L2_BUF_TYPE_VIDEO_CAPTURE:</div><div class='add'>+	switch (vdev-&gt;vfl_type) {</div><div class='add'>+	case VFL_TYPE_GRABBER:</div><div class='ctx'> /*</div><div class='ctx'> 		DEB_EE("V4L2_BUF_TYPE_VIDEO_CAPTURE: file:%p, data:%p, count:%lun",</div><div class='ctx'> 		       file, data, (unsigned long)count);</div><div class='ctx'> */</div><div class='ctx'> 		return saa7146_video_uops.read(file,data,count,ppos);</div><div class='del'>-	case V4L2_BUF_TYPE_VBI_CAPTURE:</div><div class='add'>+	case VFL_TYPE_VBI:</div><div class='ctx'> /*</div><div class='ctx'> 		DEB_EE("V4L2_BUF_TYPE_VBI_CAPTURE: file:%p, data:%p, count:%lu\n",</div><div class='ctx'> 		       file, data, (unsigned long)count);</div><div class='hunk'>@@ -377,12 +389,13 @@ static ssize_t fops_read(struct file *file, char __user *data, size_t count, lof</div><div class='ctx'> </div><div class='ctx'> static ssize_t fops_write(struct file *file, const char __user *data, size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='add'>+	struct video_device *vdev = video_devdata(file);</div><div class='ctx'> 	struct saa7146_fh *fh = file-&gt;private_data;</div><div class='ctx'> </div><div class='del'>-	switch (fh-&gt;type) {</div><div class='del'>-	case V4L2_BUF_TYPE_VIDEO_CAPTURE:</div><div class='add'>+	switch (vdev-&gt;vfl_type) {</div><div class='add'>+	case VFL_TYPE_GRABBER:</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	case V4L2_BUF_TYPE_VBI_CAPTURE:</div><div class='add'>+	case VFL_TYPE_VBI:</div><div class='ctx'> 		if (fh-&gt;dev-&gt;ext_vv_data-&gt;vbi_fops.write)</div><div class='ctx'> 			return fh-&gt;dev-&gt;ext_vv_data-&gt;vbi_fops.write(file, data, count, ppos);</div><div class='ctx'> 		else</div><div class='hunk'>@@ -429,8 +442,15 @@ static void vv_callback(struct saa7146_dev *dev, unsigned long status)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct v4l2_ctrl_ops saa7146_ctrl_ops = {</div><div class='add'>+	.s_ctrl = saa7146_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int saa7146_vv_init(struct saa7146_dev* dev, struct saa7146_ext_vv *ext_vv)</div><div class='ctx'> {</div><div class='add'>+	struct v4l2_ctrl_handler *hdl = &amp;dev-&gt;ctrl_handler;</div><div class='add'>+	struct v4l2_pix_format *fmt;</div><div class='add'>+	struct v4l2_vbi_format *vbi;</div><div class='ctx'> 	struct saa7146_vv *vv;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -438,12 +458,32 @@ int saa7146_vv_init(struct saa7146_dev* dev, struct saa7146_ext_vv *ext_vv)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	v4l2_ctrl_handler_init(hdl, 6);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;saa7146_ctrl_ops,</div><div class='add'>+		V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;saa7146_ctrl_ops,</div><div class='add'>+		V4L2_CID_CONTRAST, 0, 127, 1, 64);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;saa7146_ctrl_ops,</div><div class='add'>+		V4L2_CID_SATURATION, 0, 127, 1, 64);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;saa7146_ctrl_ops,</div><div class='add'>+		V4L2_CID_VFLIP, 0, 1, 1, 0);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;saa7146_ctrl_ops,</div><div class='add'>+		V4L2_CID_HFLIP, 0, 1, 1, 0);</div><div class='add'>+	if (hdl-&gt;error) {</div><div class='add'>+		err = hdl-&gt;error;</div><div class='add'>+		v4l2_ctrl_handler_free(hdl);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	dev-&gt;v4l2_dev.ctrl_handler = hdl;</div><div class='add'>+</div><div class='ctx'> 	vv = kzalloc(sizeof(struct saa7146_vv), GFP_KERNEL);</div><div class='ctx'> 	if (vv == NULL) {</div><div class='ctx'> 		ERR("out of memory. aborting.\n");</div><div class='add'>+		v4l2_ctrl_handler_free(hdl);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='del'>-	ext_vv-&gt;ops = saa7146_video_ioctl_ops;</div><div class='add'>+	ext_vv-&gt;vid_ops = saa7146_video_ioctl_ops;</div><div class='add'>+	ext_vv-&gt;vbi_ops = saa7146_vbi_ioctl_ops;</div><div class='ctx'> 	ext_vv-&gt;core_ops = &amp;saa7146_video_ioctl_ops;</div><div class='ctx'> </div><div class='ctx'> 	DEB_EE("dev:%p\n", dev);</div><div class='hunk'>@@ -463,6 +503,7 @@ int saa7146_vv_init(struct saa7146_dev* dev, struct saa7146_ext_vv *ext_vv)</div><div class='ctx'> 	if( NULL == vv-&gt;d_clipping.cpu_addr ) {</div><div class='ctx'> 		ERR("out of memory. aborting.\n");</div><div class='ctx'> 		kfree(vv);</div><div class='add'>+		v4l2_ctrl_handler_free(hdl);</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> 	memset(vv-&gt;d_clipping.cpu_addr, 0x0, SAA7146_CLIPPING_MEM);</div><div class='hunk'>@@ -471,6 +512,39 @@ int saa7146_vv_init(struct saa7146_dev* dev, struct saa7146_ext_vv *ext_vv)</div><div class='ctx'> 	if (dev-&gt;ext_vv_data-&gt;capabilities &amp; V4L2_CAP_VBI_CAPTURE)</div><div class='ctx'> 		saa7146_vbi_uops.init(dev,vv);</div><div class='ctx'> </div><div class='add'>+	fmt = &amp;vv-&gt;ov_fb.fmt;</div><div class='add'>+	fmt-&gt;width = vv-&gt;standard-&gt;h_max_out;</div><div class='add'>+	fmt-&gt;height = vv-&gt;standard-&gt;v_max_out;</div><div class='add'>+	fmt-&gt;pixelformat = V4L2_PIX_FMT_RGB565;</div><div class='add'>+	fmt-&gt;bytesperline = 2 * fmt-&gt;width;</div><div class='add'>+	fmt-&gt;sizeimage = fmt-&gt;bytesperline * fmt-&gt;height;</div><div class='add'>+	fmt-&gt;colorspace = V4L2_COLORSPACE_SRGB;</div><div class='add'>+</div><div class='add'>+	fmt = &amp;vv-&gt;video_fmt;</div><div class='add'>+	fmt-&gt;width = 384;</div><div class='add'>+	fmt-&gt;height = 288;</div><div class='add'>+	fmt-&gt;pixelformat = V4L2_PIX_FMT_BGR24;</div><div class='add'>+	fmt-&gt;field = V4L2_FIELD_ANY;</div><div class='add'>+	fmt-&gt;colorspace = V4L2_COLORSPACE_SMPTE170M;</div><div class='add'>+	fmt-&gt;bytesperline = 3 * fmt-&gt;width;</div><div class='add'>+	fmt-&gt;sizeimage = fmt-&gt;bytesperline * fmt-&gt;height;</div><div class='add'>+</div><div class='add'>+	vbi = &amp;vv-&gt;vbi_fmt;</div><div class='add'>+	vbi-&gt;sampling_rate	= 27000000;</div><div class='add'>+	vbi-&gt;offset		= 248; /* todo */</div><div class='add'>+	vbi-&gt;samples_per_line	= 720 * 2;</div><div class='add'>+	vbi-&gt;sample_format	= V4L2_PIX_FMT_GREY;</div><div class='add'>+</div><div class='add'>+	/* fixme: this only works for PAL */</div><div class='add'>+	vbi-&gt;start[0] = 5;</div><div class='add'>+	vbi-&gt;count[0] = 16;</div><div class='add'>+	vbi-&gt;start[1] = 312;</div><div class='add'>+	vbi-&gt;count[1] = 16;</div><div class='add'>+</div><div class='add'>+	init_timer(&amp;vv-&gt;vbi_read_timeout);</div><div class='add'>+</div><div class='add'>+	vv-&gt;ov_fb.capability = V4L2_FBUF_CAP_LIST_CLIPPING;</div><div class='add'>+	vv-&gt;ov_fb.flags = V4L2_FBUF_FLAG_PRIMARY;</div><div class='ctx'> 	dev-&gt;vv_data = vv;</div><div class='ctx'> 	dev-&gt;vv_callback = &amp;vv_callback;</div><div class='ctx'> </div><div class='hunk'>@@ -486,6 +560,7 @@ int saa7146_vv_release(struct saa7146_dev* dev)</div><div class='ctx'> </div><div class='ctx'> 	v4l2_device_unregister(&amp;dev-&gt;v4l2_dev);</div><div class='ctx'> 	pci_free_consistent(dev-&gt;pci, SAA7146_CLIPPING_MEM, vv-&gt;d_clipping.cpu_addr, vv-&gt;d_clipping.dma_handle);</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;dev-&gt;ctrl_handler);</div><div class='ctx'> 	kfree(vv);</div><div class='ctx'> 	dev-&gt;vv_data = NULL;</div><div class='ctx'> 	dev-&gt;vv_callback = NULL;</div><div class='hunk'>@@ -509,10 +584,19 @@ int saa7146_register_device(struct video_device **vid, struct saa7146_dev* dev,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	vfd-&gt;fops = &amp;video_fops;</div><div class='del'>-	vfd-&gt;ioctl_ops = &amp;dev-&gt;ext_vv_data-&gt;ops;</div><div class='add'>+	if (type == VFL_TYPE_GRABBER)</div><div class='add'>+		vfd-&gt;ioctl_ops = &amp;dev-&gt;ext_vv_data-&gt;vid_ops;</div><div class='add'>+	else</div><div class='add'>+		vfd-&gt;ioctl_ops = &amp;dev-&gt;ext_vv_data-&gt;vbi_ops;</div><div class='ctx'> 	vfd-&gt;release = video_device_release;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done by</div><div class='add'>+	   the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vfd-&gt;flags);</div><div class='ctx'> 	vfd-&gt;lock = &amp;dev-&gt;v4l2_lock;</div><div class='add'>+	vfd-&gt;v4l2_dev = &amp;dev-&gt;v4l2_dev;</div><div class='ctx'> 	vfd-&gt;tvnorms = 0;</div><div class='add'>+	set_bit(V4L2_FL_USE_FH_PRIO, &amp;vfd-&gt;flags);</div><div class='ctx'> 	for (i = 0; i &lt; dev-&gt;ext_vv_data-&gt;num_stds; i++)</div><div class='ctx'> 		vfd-&gt;tvnorms |= dev-&gt;ext_vv_data-&gt;stds[i].id;</div><div class='ctx'> 	strlcpy(vfd-&gt;name, name, sizeof(vfd-&gt;name));</div><div class='head'>diff --git a/drivers/media/common/saa7146_hlp.c b/drivers/media/common/saa7146_hlp.c<br/>index bc1f545c95cb..be746d1aee9a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/common/saa7146_hlp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/common/saa7146_hlp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/saa7146_hlp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/saa7146_hlp.c</a></div><div class='hunk'>@@ -343,9 +343,9 @@ static void calculate_clipping_registers_rect(struct saa7146_dev *dev, struct sa</div><div class='ctx'> 	struct saa7146_vv *vv = dev-&gt;vv_data;</div><div class='ctx'> 	__le32 *clipping = vv-&gt;d_clipping.cpu_addr;</div><div class='ctx'> </div><div class='del'>-	int width = fh-&gt;ov.win.w.width;</div><div class='del'>-	int height =  fh-&gt;ov.win.w.height;</div><div class='del'>-	int clipcount = fh-&gt;ov.nclips;</div><div class='add'>+	int width = vv-&gt;ov.win.w.width;</div><div class='add'>+	int height =  vv-&gt;ov.win.w.height;</div><div class='add'>+	int clipcount = vv-&gt;ov.nclips;</div><div class='ctx'> </div><div class='ctx'> 	u32 line_list[32];</div><div class='ctx'> 	u32 pixel_list[32];</div><div class='hunk'>@@ -365,10 +365,10 @@ static void calculate_clipping_registers_rect(struct saa7146_dev *dev, struct sa</div><div class='ctx'> 	for(i = 0; i &lt; clipcount; i++) {</div><div class='ctx'> 		int l = 0, r = 0, t = 0, b = 0;</div><div class='ctx'> </div><div class='del'>-		x[i] = fh-&gt;ov.clips[i].c.left;</div><div class='del'>-		y[i] = fh-&gt;ov.clips[i].c.top;</div><div class='del'>-		w[i] = fh-&gt;ov.clips[i].c.width;</div><div class='del'>-		h[i] = fh-&gt;ov.clips[i].c.height;</div><div class='add'>+		x[i] = vv-&gt;ov.clips[i].c.left;</div><div class='add'>+		y[i] = vv-&gt;ov.clips[i].c.top;</div><div class='add'>+		w[i] = vv-&gt;ov.clips[i].c.width;</div><div class='add'>+		h[i] = vv-&gt;ov.clips[i].c.height;</div><div class='ctx'> </div><div class='ctx'> 		if( w[i] &lt; 0) {</div><div class='ctx'> 			x[i] += w[i]; w[i] = -w[i];</div><div class='hunk'>@@ -485,13 +485,14 @@ static void saa7146_disable_clipping(struct saa7146_dev *dev)</div><div class='ctx'> static void saa7146_set_clipping_rect(struct saa7146_fh *fh)</div><div class='ctx'> {</div><div class='ctx'> 	struct saa7146_dev *dev = fh-&gt;dev;</div><div class='del'>-	enum v4l2_field field = fh-&gt;ov.win.field;</div><div class='add'>+	struct saa7146_vv *vv = dev-&gt;vv_data;</div><div class='add'>+	enum v4l2_field field = vv-&gt;ov.win.field;</div><div class='ctx'> 	struct	saa7146_video_dma vdma2;</div><div class='ctx'> 	u32 clip_format;</div><div class='ctx'> 	u32 arbtr_ctrl;</div><div class='ctx'> </div><div class='ctx'> 	/* check clipcount, disable clipping if clipcount == 0*/</div><div class='del'>-	if( fh-&gt;ov.nclips == 0 ) {</div><div class='add'>+	if (vv-&gt;ov.nclips == 0) {</div><div class='ctx'> 		saa7146_disable_clipping(dev);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -651,8 +652,8 @@ int saa7146_enable_overlay(struct saa7146_fh *fh)</div><div class='ctx'> 	struct saa7146_dev *dev = fh-&gt;dev;</div><div class='ctx'> 	struct saa7146_vv *vv = dev-&gt;vv_data;</div><div class='ctx'> </div><div class='del'>-	saa7146_set_window(dev, fh-&gt;ov.win.w.width, fh-&gt;ov.win.w.height, fh-&gt;ov.win.field);</div><div class='del'>-	saa7146_set_position(dev, fh-&gt;ov.win.w.left, fh-&gt;ov.win.w.top, fh-&gt;ov.win.w.height, fh-&gt;ov.win.field, vv-&gt;ov_fmt-&gt;pixelformat);</div><div class='add'>+	saa7146_set_window(dev, vv-&gt;ov.win.w.width, vv-&gt;ov.win.w.height, vv-&gt;ov.win.field);</div><div class='add'>+	saa7146_set_position(dev, vv-&gt;ov.win.w.left, vv-&gt;ov.win.w.top, vv-&gt;ov.win.w.height, vv-&gt;ov.win.field, vv-&gt;ov_fmt-&gt;pixelformat);</div><div class='ctx'> 	saa7146_set_output_format(dev, vv-&gt;ov_fmt-&gt;trans);</div><div class='ctx'> 	saa7146_set_clipping_rect(fh);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/common/saa7146_vbi.c b/drivers/media/common/saa7146_vbi.c<br/>index b2e718343739..1e71e374bbfe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/common/saa7146_vbi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/common/saa7146_vbi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/saa7146_vbi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/saa7146_vbi.c</a></div><div class='hunk'>@@ -211,7 +211,7 @@ static int buffer_activate(struct saa7146_dev *dev,</div><div class='ctx'> 	DEB_VBI("dev:%p, buf:%p, next:%p\n", dev, buf, next);</div><div class='ctx'> 	saa7146_set_vbi_capture(dev,buf,next);</div><div class='ctx'> </div><div class='del'>-	mod_timer(&amp;vv-&gt;vbi_q.timeout, jiffies+BUFFER_TIMEOUT);</div><div class='add'>+	mod_timer(&amp;vv-&gt;vbi_dmaq.timeout, jiffies+BUFFER_TIMEOUT);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -294,7 +294,7 @@ static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)</div><div class='ctx'> 	struct saa7146_buf *buf = (struct saa7146_buf *)vb;</div><div class='ctx'> </div><div class='ctx'> 	DEB_VBI("vb:%p\n", vb);</div><div class='del'>-	saa7146_buffer_queue(dev,&amp;vv-&gt;vbi_q,buf);</div><div class='add'>+	saa7146_buffer_queue(dev, &amp;vv-&gt;vbi_dmaq, buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)</div><div class='hunk'>@@ -335,16 +335,15 @@ static void vbi_stop(struct saa7146_fh *fh, struct file *file)</div><div class='ctx'> 	/* shut down dma 3 transfers */</div><div class='ctx'> 	saa7146_write(dev, MC1, MASK_20);</div><div class='ctx'> </div><div class='del'>-	if (vv-&gt;vbi_q.curr) {</div><div class='del'>-		saa7146_buffer_finish(dev,&amp;vv-&gt;vbi_q,VIDEOBUF_DONE);</div><div class='del'>-	}</div><div class='add'>+	if (vv-&gt;vbi_dmaq.curr)</div><div class='add'>+		saa7146_buffer_finish(dev, &amp;vv-&gt;vbi_dmaq, VIDEOBUF_DONE);</div><div class='ctx'> </div><div class='ctx'> 	videobuf_queue_cancel(&amp;fh-&gt;vbi_q);</div><div class='ctx'> </div><div class='ctx'> 	vv-&gt;vbi_streaming = NULL;</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;vv-&gt;vbi_q.timeout);</div><div class='del'>-	del_timer(&amp;fh-&gt;vbi_read_timeout);</div><div class='add'>+	del_timer(&amp;vv-&gt;vbi_dmaq.timeout);</div><div class='add'>+	del_timer(&amp;vv-&gt;vbi_read_timeout);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev-&gt;slock, flags);</div><div class='ctx'> }</div><div class='hunk'>@@ -364,12 +363,12 @@ static void vbi_init(struct saa7146_dev *dev, struct saa7146_vv *vv)</div><div class='ctx'> {</div><div class='ctx'> 	DEB_VBI("dev:%p\n", dev);</div><div class='ctx'> </div><div class='del'>-	INIT_LIST_HEAD(&amp;vv-&gt;vbi_q.queue);</div><div class='add'>+	INIT_LIST_HEAD(&amp;vv-&gt;vbi_dmaq.queue);</div><div class='ctx'> </div><div class='del'>-	init_timer(&amp;vv-&gt;vbi_q.timeout);</div><div class='del'>-	vv-&gt;vbi_q.timeout.function = saa7146_buffer_timeout;</div><div class='del'>-	vv-&gt;vbi_q.timeout.data     = (unsigned long)(&amp;vv-&gt;vbi_q);</div><div class='del'>-	vv-&gt;vbi_q.dev              = dev;</div><div class='add'>+	init_timer(&amp;vv-&gt;vbi_dmaq.timeout);</div><div class='add'>+	vv-&gt;vbi_dmaq.timeout.function = saa7146_buffer_timeout;</div><div class='add'>+	vv-&gt;vbi_dmaq.timeout.data     = (unsigned long)(&amp;vv-&gt;vbi_dmaq);</div><div class='add'>+	vv-&gt;vbi_dmaq.dev              = dev;</div><div class='ctx'> </div><div class='ctx'> 	init_waitqueue_head(&amp;vv-&gt;vbi_wq);</div><div class='ctx'> }</div><div class='hunk'>@@ -377,6 +376,7 @@ static void vbi_init(struct saa7146_dev *dev, struct saa7146_vv *vv)</div><div class='ctx'> static int vbi_open(struct saa7146_dev *dev, struct file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct saa7146_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct saa7146_vv *vv = fh-&gt;dev-&gt;vv_data;</div><div class='ctx'> </div><div class='ctx'> 	u32 arbtr_ctrl	= saa7146_read(dev, PCI_BT_V1);</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -395,19 +395,6 @@ static int vbi_open(struct saa7146_dev *dev, struct file *file)</div><div class='ctx'> 	saa7146_write(dev, PCI_BT_V1, arbtr_ctrl);</div><div class='ctx'> 	saa7146_write(dev, MC2, (MASK_04|MASK_20));</div><div class='ctx'> </div><div class='del'>-	memset(&amp;fh-&gt;vbi_fmt,0,sizeof(fh-&gt;vbi_fmt));</div><div class='del'>-</div><div class='del'>-	fh-&gt;vbi_fmt.sampling_rate	= 27000000;</div><div class='del'>-	fh-&gt;vbi_fmt.offset		= 248; /* todo */</div><div class='del'>-	fh-&gt;vbi_fmt.samples_per_line	= vbi_pixel_to_capture;</div><div class='del'>-	fh-&gt;vbi_fmt.sample_format	= V4L2_PIX_FMT_GREY;</div><div class='del'>-</div><div class='del'>-	/* fixme: this only works for PAL */</div><div class='del'>-	fh-&gt;vbi_fmt.start[0] = 5;</div><div class='del'>-	fh-&gt;vbi_fmt.count[0] = 16;</div><div class='del'>-	fh-&gt;vbi_fmt.start[1] = 312;</div><div class='del'>-	fh-&gt;vbi_fmt.count[1] = 16;</div><div class='del'>-</div><div class='ctx'> 	videobuf_queue_sg_init(&amp;fh-&gt;vbi_q, &amp;vbi_qops,</div><div class='ctx'> 			    &amp;dev-&gt;pci-&gt;dev, &amp;dev-&gt;slock,</div><div class='ctx'> 			    V4L2_BUF_TYPE_VBI_CAPTURE,</div><div class='hunk'>@@ -415,9 +402,8 @@ static int vbi_open(struct saa7146_dev *dev, struct file *file)</div><div class='ctx'> 			    sizeof(struct saa7146_buf),</div><div class='ctx'> 			    file, &amp;dev-&gt;v4l2_lock);</div><div class='ctx'> </div><div class='del'>-	init_timer(&amp;fh-&gt;vbi_read_timeout);</div><div class='del'>-	fh-&gt;vbi_read_timeout.function = vbi_read_timeout;</div><div class='del'>-	fh-&gt;vbi_read_timeout.data = (unsigned long)file;</div><div class='add'>+	vv-&gt;vbi_read_timeout.function = vbi_read_timeout;</div><div class='add'>+	vv-&gt;vbi_read_timeout.data = (unsigned long)file;</div><div class='ctx'> </div><div class='ctx'> 	/* initialize the brs */</div><div class='ctx'> 	if ( 0 != (SAA7146_USE_PORT_B_FOR_VBI &amp; dev-&gt;ext_vv_data-&gt;flags)) {</div><div class='hunk'>@@ -453,16 +439,16 @@ static void vbi_irq_done(struct saa7146_dev *dev, unsigned long status)</div><div class='ctx'> 	struct saa7146_vv *vv = dev-&gt;vv_data;</div><div class='ctx'> 	spin_lock(&amp;dev-&gt;slock);</div><div class='ctx'> </div><div class='del'>-	if (vv-&gt;vbi_q.curr) {</div><div class='del'>-		DEB_VBI("dev:%p, curr:%p\n", dev, vv-&gt;vbi_q.curr);</div><div class='add'>+	if (vv-&gt;vbi_dmaq.curr) {</div><div class='add'>+		DEB_VBI("dev:%p, curr:%p\n", dev, vv-&gt;vbi_dmaq.curr);</div><div class='ctx'> 		/* this must be += 2, one count for each field */</div><div class='ctx'> 		vv-&gt;vbi_fieldcount+=2;</div><div class='del'>-		vv-&gt;vbi_q.curr-&gt;vb.field_count = vv-&gt;vbi_fieldcount;</div><div class='del'>-		saa7146_buffer_finish(dev,&amp;vv-&gt;vbi_q,VIDEOBUF_DONE);</div><div class='add'>+		vv-&gt;vbi_dmaq.curr-&gt;vb.field_count = vv-&gt;vbi_fieldcount;</div><div class='add'>+		saa7146_buffer_finish(dev, &amp;vv-&gt;vbi_dmaq, VIDEOBUF_DONE);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		DEB_VBI("dev:%p\n", dev);</div><div class='ctx'> 	}</div><div class='del'>-	saa7146_buffer_next(dev,&amp;vv-&gt;vbi_q,1);</div><div class='add'>+	saa7146_buffer_next(dev, &amp;vv-&gt;vbi_dmaq, 1);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;dev-&gt;slock);</div><div class='ctx'> }</div><div class='hunk'>@@ -488,7 +474,7 @@ static ssize_t vbi_read(struct file *file, char __user *data, size_t count, loff</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mod_timer(&amp;fh-&gt;vbi_read_timeout, jiffies+BUFFER_TIMEOUT);</div><div class='add'>+	mod_timer(&amp;vv-&gt;vbi_read_timeout, jiffies+BUFFER_TIMEOUT);</div><div class='ctx'> 	ret = videobuf_read_stream(&amp;fh-&gt;vbi_q, data, count, ppos, 1,</div><div class='ctx'> 				   file-&gt;f_flags &amp; O_NONBLOCK);</div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/media/common/saa7146_video.c b/drivers/media/common/saa7146_video.c<br/>index ce30533fd972..6d14785d4747 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/common/saa7146_video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/common/saa7146_video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/saa7146_video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/saa7146_video.c</a></div><div class='hunk'>@@ -2,6 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;media/saa7146_vv.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-chip-ident.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> static int max_memory = 32;</div><div class='hunk'>@@ -112,8 +114,8 @@ int saa7146_start_preview(struct saa7146_fh *fh)</div><div class='ctx'> </div><div class='ctx'> 	DEB_EE("dev:%p, fh:%p\n", dev, fh);</div><div class='ctx'> </div><div class='del'>-	/* check if we have overlay informations */</div><div class='del'>-	if( NULL == fh-&gt;ov.fh ) {</div><div class='add'>+	/* check if we have overlay information */</div><div class='add'>+	if (vv-&gt;ov.fh == NULL) {</div><div class='ctx'> 		DEB_D("no overlay data available. try S_FMT first.\n");</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -139,19 +141,18 @@ int saa7146_start_preview(struct saa7146_fh *fh)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fmt.fmt.win = fh-&gt;ov.win;</div><div class='add'>+	fmt.fmt.win = vv-&gt;ov.win;</div><div class='ctx'> 	err = vidioc_try_fmt_vid_overlay(NULL, fh, &amp;fmt);</div><div class='ctx'> 	if (0 != err) {</div><div class='ctx'> 		saa7146_res_free(vv-&gt;video_fh, RESOURCE_DMA1_HPS|RESOURCE_DMA2_CLP);</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='del'>-	fh-&gt;ov.win = fmt.fmt.win;</div><div class='del'>-	vv-&gt;ov_data = &amp;fh-&gt;ov;</div><div class='add'>+	vv-&gt;ov.win = fmt.fmt.win;</div><div class='ctx'> </div><div class='ctx'> 	DEB_D("%dx%d+%d+%d %s field=%s\n",</div><div class='del'>-	      fh-&gt;ov.win.w.width, fh-&gt;ov.win.w.height,</div><div class='del'>-	      fh-&gt;ov.win.w.left, fh-&gt;ov.win.w.top,</div><div class='del'>-	      vv-&gt;ov_fmt-&gt;name, v4l2_field_names[fh-&gt;ov.win.field]);</div><div class='add'>+	      vv-&gt;ov.win.w.width, vv-&gt;ov.win.w.height,</div><div class='add'>+	      vv-&gt;ov.win.w.left, vv-&gt;ov.win.w.top,</div><div class='add'>+	      vv-&gt;ov_fmt-&gt;name, v4l2_field_names[vv-&gt;ov.win.field]);</div><div class='ctx'> </div><div class='ctx'> 	if (0 != (ret = saa7146_enable_overlay(fh))) {</div><div class='ctx'> 		DEB_D("enabling overlay failed: %d\n", ret);</div><div class='hunk'>@@ -202,65 +203,6 @@ int saa7146_stop_preview(struct saa7146_fh *fh)</div><div class='ctx'> EXPORT_SYMBOL_GPL(saa7146_stop_preview);</div><div class='ctx'> </div><div class='ctx'> /********************************************************************************/</div><div class='del'>-/* device controls */</div><div class='del'>-</div><div class='del'>-static struct v4l2_queryctrl controls[] = {</div><div class='del'>-	{</div><div class='del'>-		.id		= V4L2_CID_BRIGHTNESS,</div><div class='del'>-		.name		= "Brightness",</div><div class='del'>-		.minimum	= 0,</div><div class='del'>-		.maximum	= 255,</div><div class='del'>-		.step		= 1,</div><div class='del'>-		.default_value	= 128,</div><div class='del'>-		.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.flags 		= V4L2_CTRL_FLAG_SLIDER,</div><div class='del'>-	},{</div><div class='del'>-		.id		= V4L2_CID_CONTRAST,</div><div class='del'>-		.name		= "Contrast",</div><div class='del'>-		.minimum	= 0,</div><div class='del'>-		.maximum	= 127,</div><div class='del'>-		.step		= 1,</div><div class='del'>-		.default_value	= 64,</div><div class='del'>-		.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.flags 		= V4L2_CTRL_FLAG_SLIDER,</div><div class='del'>-	},{</div><div class='del'>-		.id		= V4L2_CID_SATURATION,</div><div class='del'>-		.name		= "Saturation",</div><div class='del'>-		.minimum	= 0,</div><div class='del'>-		.maximum	= 127,</div><div class='del'>-		.step		= 1,</div><div class='del'>-		.default_value	= 64,</div><div class='del'>-		.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.flags 		= V4L2_CTRL_FLAG_SLIDER,</div><div class='del'>-	},{</div><div class='del'>-		.id		= V4L2_CID_VFLIP,</div><div class='del'>-		.name		= "Vertical Flip",</div><div class='del'>-		.minimum	= 0,</div><div class='del'>-		.maximum	= 1,</div><div class='del'>-		.type		= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-	},{</div><div class='del'>-		.id		= V4L2_CID_HFLIP,</div><div class='del'>-		.name		= "Horizontal Flip",</div><div class='del'>-		.minimum	= 0,</div><div class='del'>-		.maximum	= 1,</div><div class='del'>-		.type		= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-static int NUM_CONTROLS = sizeof(controls)/sizeof(struct v4l2_queryctrl);</div><div class='del'>-</div><div class='del'>-#define V4L2_CID_PRIVATE_LASTP1      (V4L2_CID_PRIVATE_BASE + 0)</div><div class='del'>-</div><div class='del'>-static struct v4l2_queryctrl* ctrl_by_id(int id)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; NUM_CONTROLS; i++)</div><div class='del'>-		if (controls[i].id == id)</div><div class='del'>-			return controls+i;</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/********************************************************************************/</div><div class='ctx'> /* common pagetable functions */</div><div class='ctx'> </div><div class='ctx'> static int saa7146_pgtable_build(struct saa7146_dev *dev, struct saa7146_buf *buf)</div><div class='hunk'>@@ -413,7 +355,7 @@ static int video_begin(struct saa7146_fh *fh)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fmt = saa7146_format_by_fourcc(dev,fh-&gt;video_fmt.pixelformat);</div><div class='add'>+	fmt = saa7146_format_by_fourcc(dev, vv-&gt;video_fmt.pixelformat);</div><div class='ctx'> 	/* we need to have a valid format set here */</div><div class='ctx'> 	BUG_ON(NULL == fmt);</div><div class='ctx'> </div><div class='hunk'>@@ -465,7 +407,7 @@ static int video_end(struct saa7146_fh *fh, struct file *file)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fmt = saa7146_format_by_fourcc(dev,fh-&gt;video_fmt.pixelformat);</div><div class='add'>+	fmt = saa7146_format_by_fourcc(dev, vv-&gt;video_fmt.pixelformat);</div><div class='ctx'> 	/* we need to have a valid format set here */</div><div class='ctx'> 	BUG_ON(NULL == fmt);</div><div class='ctx'> </div><div class='hunk'>@@ -504,18 +446,25 @@ static int video_end(struct saa7146_fh *fh, struct file *file)</div><div class='ctx'> </div><div class='ctx'> static int vidioc_querycap(struct file *file, void *fh, struct v4l2_capability *cap)</div><div class='ctx'> {</div><div class='add'>+	struct video_device *vdev = video_devdata(file);</div><div class='ctx'> 	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	strcpy((char *)cap-&gt;driver, "saa7146 v4l2");</div><div class='ctx'> 	strlcpy((char *)cap-&gt;card, dev-&gt;ext-&gt;name, sizeof(cap-&gt;card));</div><div class='ctx'> 	sprintf((char *)cap-&gt;bus_info, "PCI:%s", pci_name(dev-&gt;pci));</div><div class='del'>-	cap-&gt;version = SAA7146_VERSION_CODE;</div><div class='del'>-	cap-&gt;capabilities =</div><div class='add'>+	cap-&gt;device_caps =</div><div class='ctx'> 		V4L2_CAP_VIDEO_CAPTURE |</div><div class='ctx'> 		V4L2_CAP_VIDEO_OVERLAY |</div><div class='ctx'> 		V4L2_CAP_READWRITE |</div><div class='ctx'> 		V4L2_CAP_STREAMING;</div><div class='del'>-	cap-&gt;capabilities |= dev-&gt;ext_vv_data-&gt;capabilities;</div><div class='add'>+	cap-&gt;device_caps |= dev-&gt;ext_vv_data-&gt;capabilities;</div><div class='add'>+	cap-&gt;capabilities = cap-&gt;device_caps | V4L2_CAP_DEVICE_CAPS;</div><div class='add'>+	if (vdev-&gt;vfl_type == VFL_TYPE_GRABBER)</div><div class='add'>+		cap-&gt;device_caps &amp;=</div><div class='add'>+			~(V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_OUTPUT);</div><div class='add'>+	else</div><div class='add'>+		cap-&gt;device_caps &amp;=</div><div class='add'>+			~(V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OVERLAY | V4L2_CAP_AUDIO);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -526,6 +475,7 @@ static int vidioc_g_fbuf(struct file *file, void *fh, struct v4l2_framebuffer *f</div><div class='ctx'> </div><div class='ctx'> 	*fb = vv-&gt;ov_fb;</div><div class='ctx'> 	fb-&gt;capability = V4L2_FBUF_CAP_LIST_CLIPPING;</div><div class='add'>+	fb-&gt;flags = V4L2_FBUF_FLAG_PRIMARY;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -579,135 +529,58 @@ static int vidioc_enum_fmt_vid_cap(struct file *file, void *fh, struct v4l2_fmtd</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vidioc_queryctrl(struct file *file, void *fh, struct v4l2_queryctrl *c)</div><div class='add'>+int saa7146_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='del'>-	const struct v4l2_queryctrl *ctrl;</div><div class='del'>-</div><div class='del'>-	if ((c-&gt;id &lt;  V4L2_CID_BASE ||</div><div class='del'>-	     c-&gt;id &gt;= V4L2_CID_LASTP1) &amp;&amp;</div><div class='del'>-	    (c-&gt;id &lt;  V4L2_CID_PRIVATE_BASE ||</div><div class='del'>-	     c-&gt;id &gt;= V4L2_CID_PRIVATE_LASTP1))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ctrl = ctrl_by_id(c-&gt;id);</div><div class='del'>-	if (ctrl == NULL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	DEB_EE("VIDIOC_QUERYCTRL: id:%d\n", c-&gt;id);</div><div class='del'>-	*c = *ctrl;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vidioc_g_ctrl(struct file *file, void *fh, struct v4l2_control *c)</div><div class='del'>-{</div><div class='del'>-	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='add'>+	struct saa7146_dev *dev = container_of(ctrl-&gt;handler,</div><div class='add'>+				struct saa7146_dev, ctrl_handler);</div><div class='ctx'> 	struct saa7146_vv *vv = dev-&gt;vv_data;</div><div class='del'>-	const struct v4l2_queryctrl *ctrl;</div><div class='del'>-	u32 value = 0;</div><div class='add'>+	u32 val;</div><div class='ctx'> </div><div class='del'>-	ctrl = ctrl_by_id(c-&gt;id);</div><div class='del'>-	if (NULL == ctrl)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	switch (c-&gt;id) {</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='ctx'> 	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		value = saa7146_read(dev, BCS_CTRL);</div><div class='del'>-		c-&gt;value = 0xff &amp; (value &gt;&gt; 24);</div><div class='del'>-		DEB_D("V4L2_CID_BRIGHTNESS: %d\n", c-&gt;value);</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_CONTRAST:</div><div class='del'>-		value = saa7146_read(dev, BCS_CTRL);</div><div class='del'>-		c-&gt;value = 0x7f &amp; (value &gt;&gt; 16);</div><div class='del'>-		DEB_D("V4L2_CID_CONTRAST: %d\n", c-&gt;value);</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_SATURATION:</div><div class='del'>-		value = saa7146_read(dev, BCS_CTRL);</div><div class='del'>-		c-&gt;value = 0x7f &amp; (value &gt;&gt; 0);</div><div class='del'>-		DEB_D("V4L2_CID_SATURATION: %d\n", c-&gt;value);</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_VFLIP:</div><div class='del'>-		c-&gt;value = vv-&gt;vflip;</div><div class='del'>-		DEB_D("V4L2_CID_VFLIP: %d\n", c-&gt;value);</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_HFLIP:</div><div class='del'>-		c-&gt;value = vv-&gt;hflip;</div><div class='del'>-		DEB_D("V4L2_CID_HFLIP: %d\n", c-&gt;value);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vidioc_s_ctrl(struct file *file, void *fh, struct v4l2_control *c)</div><div class='del'>-{</div><div class='del'>-	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='del'>-	struct saa7146_vv *vv = dev-&gt;vv_data;</div><div class='del'>-	const struct v4l2_queryctrl *ctrl;</div><div class='del'>-</div><div class='del'>-	ctrl = ctrl_by_id(c-&gt;id);</div><div class='del'>-	if (NULL == ctrl) {</div><div class='del'>-		DEB_D("unknown control %d\n", c-&gt;id);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (ctrl-&gt;type) {</div><div class='del'>-	case V4L2_CTRL_TYPE_BOOLEAN:</div><div class='del'>-	case V4L2_CTRL_TYPE_MENU:</div><div class='del'>-	case V4L2_CTRL_TYPE_INTEGER:</div><div class='del'>-		if (c-&gt;value &lt; ctrl-&gt;minimum)</div><div class='del'>-			c-&gt;value = ctrl-&gt;minimum;</div><div class='del'>-		if (c-&gt;value &gt; ctrl-&gt;maximum)</div><div class='del'>-			c-&gt;value = ctrl-&gt;maximum;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		/* nothing */;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (c-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS: {</div><div class='del'>-		u32 value = saa7146_read(dev, BCS_CTRL);</div><div class='del'>-		value &amp;= 0x00ffffff;</div><div class='del'>-		value |= (c-&gt;value &lt;&lt; 24);</div><div class='del'>-		saa7146_write(dev, BCS_CTRL, value);</div><div class='add'>+		val = saa7146_read(dev, BCS_CTRL);</div><div class='add'>+		val &amp;= 0x00ffffff;</div><div class='add'>+		val |= (ctrl-&gt;val &lt;&lt; 24);</div><div class='add'>+		saa7146_write(dev, BCS_CTRL, val);</div><div class='ctx'> 		saa7146_write(dev, MC2, MASK_22 | MASK_06);</div><div class='ctx'> 		break;</div><div class='del'>-	}</div><div class='del'>-	case V4L2_CID_CONTRAST: {</div><div class='del'>-		u32 value = saa7146_read(dev, BCS_CTRL);</div><div class='del'>-		value &amp;= 0xff00ffff;</div><div class='del'>-		value |= (c-&gt;value &lt;&lt; 16);</div><div class='del'>-		saa7146_write(dev, BCS_CTRL, value);</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_CONTRAST:</div><div class='add'>+		val = saa7146_read(dev, BCS_CTRL);</div><div class='add'>+		val &amp;= 0xff00ffff;</div><div class='add'>+		val |= (ctrl-&gt;val &lt;&lt; 16);</div><div class='add'>+		saa7146_write(dev, BCS_CTRL, val);</div><div class='ctx'> 		saa7146_write(dev, MC2, MASK_22 | MASK_06);</div><div class='ctx'> 		break;</div><div class='del'>-	}</div><div class='del'>-	case V4L2_CID_SATURATION: {</div><div class='del'>-		u32 value = saa7146_read(dev, BCS_CTRL);</div><div class='del'>-		value &amp;= 0xffffff00;</div><div class='del'>-		value |= (c-&gt;value &lt;&lt; 0);</div><div class='del'>-		saa7146_write(dev, BCS_CTRL, value);</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_SATURATION:</div><div class='add'>+		val = saa7146_read(dev, BCS_CTRL);</div><div class='add'>+		val &amp;= 0xffffff00;</div><div class='add'>+		val |= (ctrl-&gt;val &lt;&lt; 0);</div><div class='add'>+		saa7146_write(dev, BCS_CTRL, val);</div><div class='ctx'> 		saa7146_write(dev, MC2, MASK_22 | MASK_06);</div><div class='ctx'> 		break;</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	case V4L2_CID_HFLIP:</div><div class='ctx'> 		/* fixme: we can support changing VFLIP and HFLIP here... */</div><div class='del'>-		if (IS_CAPTURE_ACTIVE(fh) != 0) {</div><div class='del'>-			DEB_D("V4L2_CID_HFLIP while active capture\n");</div><div class='add'>+		if ((vv-&gt;video_status &amp; STATUS_CAPTURE))</div><div class='ctx'> 			return -EBUSY;</div><div class='del'>-		}</div><div class='del'>-		vv-&gt;hflip = c-&gt;value;</div><div class='add'>+		vv-&gt;hflip = ctrl-&gt;val;</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='ctx'> 	case V4L2_CID_VFLIP:</div><div class='del'>-		if (IS_CAPTURE_ACTIVE(fh) != 0) {</div><div class='del'>-			DEB_D("V4L2_CID_VFLIP while active capture\n");</div><div class='add'>+		if ((vv-&gt;video_status &amp; STATUS_CAPTURE))</div><div class='ctx'> 			return -EBUSY;</div><div class='del'>-		}</div><div class='del'>-		vv-&gt;vflip = c-&gt;value;</div><div class='add'>+		vv-&gt;vflip = ctrl-&gt;val;</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_OVERLAY_ACTIVE(fh) != 0) {</div><div class='add'>+	if ((vv-&gt;video_status &amp; STATUS_OVERLAY) != 0) { /* CHECK: &amp;&amp; (vv-&gt;video_fh == fh)) */</div><div class='add'>+		struct saa7146_fh *fh = vv-&gt;video_fh;</div><div class='add'>+</div><div class='ctx'> 		saa7146_stop_preview(fh);</div><div class='ctx'> 		saa7146_start_preview(fh);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -720,6 +593,8 @@ static int vidioc_g_parm(struct file *file, void *fh,</div><div class='ctx'> 	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='ctx'> 	struct saa7146_vv *vv = dev-&gt;vv_data;</div><div class='ctx'> </div><div class='add'>+	if (parm-&gt;type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	parm-&gt;parm.capture.readbuffers = 1;</div><div class='ctx'> 	v4l2_video_std_frame_period(vv-&gt;standard-&gt;id,</div><div class='ctx'> 				    &amp;parm-&gt;parm.capture.timeperframe);</div><div class='hunk'>@@ -728,19 +603,28 @@ static int vidioc_g_parm(struct file *file, void *fh,</div><div class='ctx'> </div><div class='ctx'> static int vidioc_g_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f)</div><div class='ctx'> {</div><div class='del'>-	f-&gt;fmt.pix = ((struct saa7146_fh *)fh)-&gt;video_fmt;</div><div class='add'>+	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='add'>+	struct saa7146_vv *vv = dev-&gt;vv_data;</div><div class='add'>+</div><div class='add'>+	f-&gt;fmt.pix = vv-&gt;video_fmt;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_g_fmt_vid_overlay(struct file *file, void *fh, struct v4l2_format *f)</div><div class='ctx'> {</div><div class='del'>-	f-&gt;fmt.win = ((struct saa7146_fh *)fh)-&gt;ov.win;</div><div class='add'>+	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='add'>+	struct saa7146_vv *vv = dev-&gt;vv_data;</div><div class='add'>+</div><div class='add'>+	f-&gt;fmt.win = vv-&gt;ov.win;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_g_fmt_vbi_cap(struct file *file, void *fh, struct v4l2_format *f)</div><div class='ctx'> {</div><div class='del'>-	f-&gt;fmt.vbi = ((struct saa7146_fh *)fh)-&gt;vbi_fmt;</div><div class='add'>+	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='add'>+	struct saa7146_vv *vv = dev-&gt;vv_data;</div><div class='add'>+</div><div class='add'>+	f-&gt;fmt.vbi = vv-&gt;vbi_fmt;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -787,6 +671,7 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *fh, struct v4l2_forma</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	f-&gt;fmt.pix.field = field;</div><div class='add'>+	f-&gt;fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;</div><div class='ctx'> 	if (f-&gt;fmt.pix.width &gt; maxw)</div><div class='ctx'> 		f-&gt;fmt.pix.width = maxw;</div><div class='ctx'> 	if (f-&gt;fmt.pix.height &gt; maxh)</div><div class='hunk'>@@ -883,9 +768,9 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *__fh, struct v4l2_forma</div><div class='ctx'> 	err = vidioc_try_fmt_vid_cap(file, fh, f);</div><div class='ctx'> 	if (0 != err)</div><div class='ctx'> 		return err;</div><div class='del'>-	fh-&gt;video_fmt = f-&gt;fmt.pix;</div><div class='add'>+	vv-&gt;video_fmt = f-&gt;fmt.pix;</div><div class='ctx'> 	DEB_EE("set to pixelformat '%4.4s'\n",</div><div class='del'>-	       (char *)&amp;fh-&gt;video_fmt.pixelformat);</div><div class='add'>+	       (char *)&amp;vv-&gt;video_fmt.pixelformat);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -900,17 +785,17 @@ static int vidioc_s_fmt_vid_overlay(struct file *file, void *__fh, struct v4l2_f</div><div class='ctx'> 	err = vidioc_try_fmt_vid_overlay(file, fh, f);</div><div class='ctx'> 	if (0 != err)</div><div class='ctx'> 		return err;</div><div class='del'>-	fh-&gt;ov.win    = f-&gt;fmt.win;</div><div class='del'>-	fh-&gt;ov.nclips = f-&gt;fmt.win.clipcount;</div><div class='del'>-	if (fh-&gt;ov.nclips &gt; 16)</div><div class='del'>-		fh-&gt;ov.nclips = 16;</div><div class='del'>-	if (copy_from_user(fh-&gt;ov.clips, f-&gt;fmt.win.clips,</div><div class='del'>-				sizeof(struct v4l2_clip) * fh-&gt;ov.nclips)) {</div><div class='add'>+	vv-&gt;ov.win    = f-&gt;fmt.win;</div><div class='add'>+	vv-&gt;ov.nclips = f-&gt;fmt.win.clipcount;</div><div class='add'>+	if (vv-&gt;ov.nclips &gt; 16)</div><div class='add'>+		vv-&gt;ov.nclips = 16;</div><div class='add'>+	if (copy_from_user(vv-&gt;ov.clips, f-&gt;fmt.win.clips,</div><div class='add'>+				sizeof(struct v4l2_clip) * vv-&gt;ov.nclips)) {</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* fh-&gt;ov.fh is used to indicate that we have valid overlay informations, too */</div><div class='del'>-	fh-&gt;ov.fh = fh;</div><div class='add'>+	/* vv-&gt;ov.fh is used to indicate that we have valid overlay informations, too */</div><div class='add'>+	vv-&gt;ov.fh = fh;</div><div class='ctx'> </div><div class='ctx'> 	/* check if our current overlay is active */</div><div class='ctx'> 	if (IS_OVERLAY_ACTIVE(fh) != 0) {</div><div class='hunk'>@@ -1111,10 +996,14 @@ static int vidioc_g_chip_ident(struct file *file, void *__fh,</div><div class='ctx'> </div><div class='ctx'> 	chip-&gt;ident = V4L2_IDENT_NONE;</div><div class='ctx'> 	chip-&gt;revision = 0;</div><div class='del'>-	if (chip-&gt;match.type == V4L2_CHIP_MATCH_HOST &amp;&amp; !chip-&gt;match.addr) {</div><div class='del'>-		chip-&gt;ident = V4L2_IDENT_SAA7146;</div><div class='add'>+	if (chip-&gt;match.type == V4L2_CHIP_MATCH_HOST) {</div><div class='add'>+		if (v4l2_chip_match_host(&amp;chip-&gt;match))</div><div class='add'>+			chip-&gt;ident = V4L2_IDENT_SAA7146;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='add'>+	if (chip-&gt;match.type != V4L2_CHIP_MATCH_I2C_DRIVER &amp;&amp;</div><div class='add'>+	    chip-&gt;match.type != V4L2_CHIP_MATCH_I2C_ADDR)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	return v4l2_device_call_until_err(&amp;dev-&gt;v4l2_dev, 0,</div><div class='ctx'> 			core, g_chip_ident, chip);</div><div class='ctx'> }</div><div class='hunk'>@@ -1129,7 +1018,6 @@ const struct v4l2_ioctl_ops saa7146_video_ioctl_ops = {</div><div class='ctx'> 	.vidioc_g_fmt_vid_overlay    = vidioc_g_fmt_vid_overlay,</div><div class='ctx'> 	.vidioc_try_fmt_vid_overlay  = vidioc_try_fmt_vid_overlay,</div><div class='ctx'> 	.vidioc_s_fmt_vid_overlay    = vidioc_s_fmt_vid_overlay,</div><div class='del'>-	.vidioc_g_fmt_vbi_cap        = vidioc_g_fmt_vbi_cap,</div><div class='ctx'> 	.vidioc_g_chip_ident         = vidioc_g_chip_ident,</div><div class='ctx'> </div><div class='ctx'> 	.vidioc_overlay 	     = vidioc_overlay,</div><div class='hunk'>@@ -1141,12 +1029,29 @@ const struct v4l2_ioctl_ops saa7146_video_ioctl_ops = {</div><div class='ctx'> 	.vidioc_dqbuf                = vidioc_dqbuf,</div><div class='ctx'> 	.vidioc_g_std                = vidioc_g_std,</div><div class='ctx'> 	.vidioc_s_std                = vidioc_s_std,</div><div class='del'>-	.vidioc_queryctrl            = vidioc_queryctrl,</div><div class='del'>-	.vidioc_g_ctrl               = vidioc_g_ctrl,</div><div class='del'>-	.vidioc_s_ctrl               = vidioc_s_ctrl,</div><div class='ctx'> 	.vidioc_streamon             = vidioc_streamon,</div><div class='ctx'> 	.vidioc_streamoff            = vidioc_streamoff,</div><div class='ctx'> 	.vidioc_g_parm 		     = vidioc_g_parm,</div><div class='add'>+	.vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,</div><div class='add'>+	.vidioc_unsubscribe_event    = v4l2_event_unsubscribe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct v4l2_ioctl_ops saa7146_vbi_ioctl_ops = {</div><div class='add'>+	.vidioc_querycap             = vidioc_querycap,</div><div class='add'>+	.vidioc_g_fmt_vbi_cap        = vidioc_g_fmt_vbi_cap,</div><div class='add'>+	.vidioc_g_chip_ident         = vidioc_g_chip_ident,</div><div class='add'>+</div><div class='add'>+	.vidioc_reqbufs              = vidioc_reqbufs,</div><div class='add'>+	.vidioc_querybuf             = vidioc_querybuf,</div><div class='add'>+	.vidioc_qbuf                 = vidioc_qbuf,</div><div class='add'>+	.vidioc_dqbuf                = vidioc_dqbuf,</div><div class='add'>+	.vidioc_g_std                = vidioc_g_std,</div><div class='add'>+	.vidioc_s_std                = vidioc_s_std,</div><div class='add'>+	.vidioc_streamon             = vidioc_streamon,</div><div class='add'>+	.vidioc_streamoff            = vidioc_streamoff,</div><div class='add'>+	.vidioc_g_parm		     = vidioc_g_parm,</div><div class='add'>+	.vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,</div><div class='add'>+	.vidioc_unsubscribe_event    = v4l2_event_unsubscribe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*********************************************************************************/</div><div class='hunk'>@@ -1161,7 +1066,7 @@ static int buffer_activate (struct saa7146_dev *dev,</div><div class='ctx'> 	buf-&gt;vb.state = VIDEOBUF_ACTIVE;</div><div class='ctx'> 	saa7146_set_capture(dev,buf,next);</div><div class='ctx'> </div><div class='del'>-	mod_timer(&amp;vv-&gt;video_q.timeout, jiffies+BUFFER_TIMEOUT);</div><div class='add'>+	mod_timer(&amp;vv-&gt;video_dmaq.timeout, jiffies+BUFFER_TIMEOUT);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1185,44 +1090,44 @@ static int buffer_prepare(struct videobuf_queue *q,</div><div class='ctx'> 	DEB_CAP("vbuf:%p\n", vb);</div><div class='ctx'> </div><div class='ctx'> 	/* sanity checks */</div><div class='del'>-	if (fh-&gt;video_fmt.width  &lt; 48 ||</div><div class='del'>-	    fh-&gt;video_fmt.height &lt; 32 ||</div><div class='del'>-	    fh-&gt;video_fmt.width  &gt; vv-&gt;standard-&gt;h_max_out ||</div><div class='del'>-	    fh-&gt;video_fmt.height &gt; vv-&gt;standard-&gt;v_max_out) {</div><div class='add'>+	if (vv-&gt;video_fmt.width  &lt; 48 ||</div><div class='add'>+	    vv-&gt;video_fmt.height &lt; 32 ||</div><div class='add'>+	    vv-&gt;video_fmt.width  &gt; vv-&gt;standard-&gt;h_max_out ||</div><div class='add'>+	    vv-&gt;video_fmt.height &gt; vv-&gt;standard-&gt;v_max_out) {</div><div class='ctx'> 		DEB_D("w (%d) / h (%d) out of bounds\n",</div><div class='del'>-		      fh-&gt;video_fmt.width, fh-&gt;video_fmt.height);</div><div class='add'>+		      vv-&gt;video_fmt.width, vv-&gt;video_fmt.height);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	size = fh-&gt;video_fmt.sizeimage;</div><div class='add'>+	size = vv-&gt;video_fmt.sizeimage;</div><div class='ctx'> 	if (0 != buf-&gt;vb.baddr &amp;&amp; buf-&gt;vb.bsize &lt; size) {</div><div class='ctx'> 		DEB_D("size mismatch\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	DEB_CAP("buffer_prepare [size=%dx%d,bytes=%d,fields=%s]\n",</div><div class='del'>-		fh-&gt;video_fmt.width, fh-&gt;video_fmt.height,</div><div class='del'>-		size, v4l2_field_names[fh-&gt;video_fmt.field]);</div><div class='del'>-	if (buf-&gt;vb.width  != fh-&gt;video_fmt.width  ||</div><div class='del'>-	    buf-&gt;vb.bytesperline != fh-&gt;video_fmt.bytesperline ||</div><div class='del'>-	    buf-&gt;vb.height != fh-&gt;video_fmt.height ||</div><div class='add'>+		vv-&gt;video_fmt.width, vv-&gt;video_fmt.height,</div><div class='add'>+		size, v4l2_field_names[vv-&gt;video_fmt.field]);</div><div class='add'>+	if (buf-&gt;vb.width  != vv-&gt;video_fmt.width  ||</div><div class='add'>+	    buf-&gt;vb.bytesperline != vv-&gt;video_fmt.bytesperline ||</div><div class='add'>+	    buf-&gt;vb.height != vv-&gt;video_fmt.height ||</div><div class='ctx'> 	    buf-&gt;vb.size   != size ||</div><div class='ctx'> 	    buf-&gt;vb.field  != field      ||</div><div class='del'>-	    buf-&gt;vb.field  != fh-&gt;video_fmt.field  ||</div><div class='del'>-	    buf-&gt;fmt       != &amp;fh-&gt;video_fmt) {</div><div class='add'>+	    buf-&gt;vb.field  != vv-&gt;video_fmt.field  ||</div><div class='add'>+	    buf-&gt;fmt       != &amp;vv-&gt;video_fmt) {</div><div class='ctx'> 		saa7146_dma_free(dev,q,buf);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (VIDEOBUF_NEEDS_INIT == buf-&gt;vb.state) {</div><div class='ctx'> 		struct saa7146_format *sfmt;</div><div class='ctx'> </div><div class='del'>-		buf-&gt;vb.bytesperline  = fh-&gt;video_fmt.bytesperline;</div><div class='del'>-		buf-&gt;vb.width  = fh-&gt;video_fmt.width;</div><div class='del'>-		buf-&gt;vb.height = fh-&gt;video_fmt.height;</div><div class='add'>+		buf-&gt;vb.bytesperline  = vv-&gt;video_fmt.bytesperline;</div><div class='add'>+		buf-&gt;vb.width  = vv-&gt;video_fmt.width;</div><div class='add'>+		buf-&gt;vb.height = vv-&gt;video_fmt.height;</div><div class='ctx'> 		buf-&gt;vb.size   = size;</div><div class='ctx'> 		buf-&gt;vb.field  = field;</div><div class='del'>-		buf-&gt;fmt       = &amp;fh-&gt;video_fmt;</div><div class='del'>-		buf-&gt;vb.field  = fh-&gt;video_fmt.field;</div><div class='add'>+		buf-&gt;fmt       = &amp;vv-&gt;video_fmt;</div><div class='add'>+		buf-&gt;vb.field  = vv-&gt;video_fmt.field;</div><div class='ctx'> </div><div class='ctx'> 		sfmt = saa7146_format_by_fourcc(dev,buf-&gt;fmt-&gt;pixelformat);</div><div class='ctx'> </div><div class='hunk'>@@ -1258,11 +1163,12 @@ static int buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned</div><div class='ctx'> {</div><div class='ctx'> 	struct file *file = q-&gt;priv_data;</div><div class='ctx'> 	struct saa7146_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct saa7146_vv *vv = fh-&gt;dev-&gt;vv_data;</div><div class='ctx'> </div><div class='ctx'> 	if (0 == *count || *count &gt; MAX_SAA7146_CAPTURE_BUFFERS)</div><div class='ctx'> 		*count = MAX_SAA7146_CAPTURE_BUFFERS;</div><div class='ctx'> </div><div class='del'>-	*size = fh-&gt;video_fmt.sizeimage;</div><div class='add'>+	*size = vv-&gt;video_fmt.sizeimage;</div><div class='ctx'> </div><div class='ctx'> 	/* check if we exceed the "max_memory" parameter */</div><div class='ctx'> 	if( (*count * *size) &gt; (max_memory*1048576) ) {</div><div class='hunk'>@@ -1283,7 +1189,7 @@ static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)</div><div class='ctx'> 	struct saa7146_buf *buf = (struct saa7146_buf *)vb;</div><div class='ctx'> </div><div class='ctx'> 	DEB_CAP("vbuf:%p\n", vb);</div><div class='del'>-	saa7146_buffer_queue(fh-&gt;dev,&amp;vv-&gt;video_q,buf);</div><div class='add'>+	saa7146_buffer_queue(fh-&gt;dev, &amp;vv-&gt;video_dmaq, buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)</div><div class='hunk'>@@ -1312,12 +1218,12 @@ static struct videobuf_queue_ops video_qops = {</div><div class='ctx'> </div><div class='ctx'> static void video_init(struct saa7146_dev *dev, struct saa7146_vv *vv)</div><div class='ctx'> {</div><div class='del'>-	INIT_LIST_HEAD(&amp;vv-&gt;video_q.queue);</div><div class='add'>+	INIT_LIST_HEAD(&amp;vv-&gt;video_dmaq.queue);</div><div class='ctx'> </div><div class='del'>-	init_timer(&amp;vv-&gt;video_q.timeout);</div><div class='del'>-	vv-&gt;video_q.timeout.function = saa7146_buffer_timeout;</div><div class='del'>-	vv-&gt;video_q.timeout.data     = (unsigned long)(&amp;vv-&gt;video_q);</div><div class='del'>-	vv-&gt;video_q.dev              = dev;</div><div class='add'>+	init_timer(&amp;vv-&gt;video_dmaq.timeout);</div><div class='add'>+	vv-&gt;video_dmaq.timeout.function = saa7146_buffer_timeout;</div><div class='add'>+	vv-&gt;video_dmaq.timeout.data     = (unsigned long)(&amp;vv-&gt;video_dmaq);</div><div class='add'>+	vv-&gt;video_dmaq.dev              = dev;</div><div class='ctx'> </div><div class='ctx'> 	/* set some default values */</div><div class='ctx'> 	vv-&gt;standard = &amp;dev-&gt;ext_vv_data-&gt;stds[0];</div><div class='hunk'>@@ -1331,15 +1237,6 @@ static void video_init(struct saa7146_dev *dev, struct saa7146_vv *vv)</div><div class='ctx'> static int video_open(struct saa7146_dev *dev, struct file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct saa7146_fh *fh = file-&gt;private_data;</div><div class='del'>-	struct saa7146_format *sfmt;</div><div class='del'>-</div><div class='del'>-	fh-&gt;video_fmt.width = 384;</div><div class='del'>-	fh-&gt;video_fmt.height = 288;</div><div class='del'>-	fh-&gt;video_fmt.pixelformat = V4L2_PIX_FMT_BGR24;</div><div class='del'>-	fh-&gt;video_fmt.bytesperline = 0;</div><div class='del'>-	fh-&gt;video_fmt.field = V4L2_FIELD_ANY;</div><div class='del'>-	sfmt = saa7146_format_by_fourcc(dev,fh-&gt;video_fmt.pixelformat);</div><div class='del'>-	fh-&gt;video_fmt.sizeimage = (fh-&gt;video_fmt.width * fh-&gt;video_fmt.height * sfmt-&gt;depth)/8;</div><div class='ctx'> </div><div class='ctx'> 	videobuf_queue_sg_init(&amp;fh-&gt;video_q, &amp;video_qops,</div><div class='ctx'> 			    &amp;dev-&gt;pci-&gt;dev, &amp;dev-&gt;slock,</div><div class='hunk'>@@ -1371,7 +1268,7 @@ static void video_close(struct saa7146_dev *dev, struct file *file)</div><div class='ctx'> static void video_irq_done(struct saa7146_dev *dev, unsigned long st)</div><div class='ctx'> {</div><div class='ctx'> 	struct saa7146_vv *vv = dev-&gt;vv_data;</div><div class='del'>-	struct saa7146_dmaqueue *q = &amp;vv-&gt;video_q;</div><div class='add'>+	struct saa7146_dmaqueue *q = &amp;vv-&gt;video_dmaq;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;dev-&gt;slock);</div><div class='ctx'> 	DEB_CAP("called\n");</div><div class='head'>diff --git a/drivers/media/common/tuners/Kconfig b/drivers/media/common/tuners/Kconfig<br/>index 4a6d5cef3964..bbf4945149a9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/common/tuners/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/common/tuners/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/Kconfig</a></div><div class='hunk'>@@ -204,6 +204,27 @@ config MEDIA_TUNER_TDA18218</div><div class='ctx'> 	help</div><div class='ctx'> 	  NXP TDA18218 silicon tuner driver.</div><div class='ctx'> </div><div class='add'>+config MEDIA_TUNER_FC0011</div><div class='add'>+	tristate "Fitipower FC0011 silicon tuner"</div><div class='add'>+	depends on VIDEO_MEDIA &amp;&amp; I2C</div><div class='add'>+	default m if MEDIA_TUNER_CUSTOMISE</div><div class='add'>+	help</div><div class='add'>+	  Fitipower FC0011 silicon tuner driver.</div><div class='add'>+</div><div class='add'>+config MEDIA_TUNER_FC0012</div><div class='add'>+	tristate "Fitipower FC0012 silicon tuner"</div><div class='add'>+	depends on VIDEO_MEDIA &amp;&amp; I2C</div><div class='add'>+	default m if MEDIA_TUNER_CUSTOMISE</div><div class='add'>+	help</div><div class='add'>+	  Fitipower FC0012 silicon tuner driver.</div><div class='add'>+</div><div class='add'>+config MEDIA_TUNER_FC0013</div><div class='add'>+	tristate "Fitipower FC0013 silicon tuner"</div><div class='add'>+	depends on VIDEO_MEDIA &amp;&amp; I2C</div><div class='add'>+	default m if MEDIA_TUNER_CUSTOMISE</div><div class='add'>+	help</div><div class='add'>+	  Fitipower FC0013 silicon tuner driver.</div><div class='add'>+</div><div class='ctx'> config MEDIA_TUNER_TDA18212</div><div class='ctx'> 	tristate "NXP TDA18212 silicon tuner"</div><div class='ctx'> 	depends on VIDEO_MEDIA &amp;&amp; I2C</div><div class='hunk'>@@ -211,4 +232,10 @@ config MEDIA_TUNER_TDA18212</div><div class='ctx'> 	help</div><div class='ctx'> 	  NXP TDA18212 silicon tuner driver.</div><div class='ctx'> </div><div class='add'>+config MEDIA_TUNER_TUA9001</div><div class='add'>+	tristate "Infineon TUA 9001 silicon tuner"</div><div class='add'>+	depends on VIDEO_MEDIA &amp;&amp; I2C</div><div class='add'>+	default m if MEDIA_TUNER_CUSTOMISE</div><div class='add'>+	help</div><div class='add'>+	  Infineon TUA 9001 silicon tuner driver.</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/drivers/media/common/tuners/Makefile b/drivers/media/common/tuners/Makefile<br/>index f80407eb8998..891b80e60808 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/common/tuners/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/common/tuners/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/Makefile</a></div><div class='hunk'>@@ -28,6 +28,10 @@ obj-$(CONFIG_MEDIA_TUNER_MC44S803) += mc44s803.o</div><div class='ctx'> obj-$(CONFIG_MEDIA_TUNER_MAX2165) += max2165.o</div><div class='ctx'> obj-$(CONFIG_MEDIA_TUNER_TDA18218) += tda18218.o</div><div class='ctx'> obj-$(CONFIG_MEDIA_TUNER_TDA18212) += tda18212.o</div><div class='add'>+obj-$(CONFIG_MEDIA_TUNER_TUA9001) += tua9001.o</div><div class='add'>+obj-$(CONFIG_MEDIA_TUNER_FC0011) += fc0011.o</div><div class='add'>+obj-$(CONFIG_MEDIA_TUNER_FC0012) += fc0012.o</div><div class='add'>+obj-$(CONFIG_MEDIA_TUNER_FC0013) += fc0013.o</div><div class='ctx'> </div><div class='ctx'> ccflags-y += -I$(srctree)/drivers/media/dvb/dvb-core</div><div class='ctx'> ccflags-y += -I$(srctree)/drivers/media/dvb/frontends</div><div class='head'>diff --git a/drivers/media/common/tuners/fc0011.c b/drivers/media/common/tuners/fc0011.c<br/>new file mode 100644<br/>index 000000000000..e4882546c283<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/fc0011.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0011.c</a></div><div class='hunk'>@@ -0,0 +1,524 @@</div><div class='add'>+/*</div><div class='add'>+ * Fitipower FC0011 tuner driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Michael Buesch &lt;m@bues.ch&gt;</div><div class='add'>+ *</div><div class='add'>+ * Derived from FC0012 tuner driver:</div><div class='add'>+ * Copyright (C) 2012 Hans-Frieder Vogt &lt;hfvogt@gmx.net&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "fc0011.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Tuner registers */</div><div class='add'>+enum {</div><div class='add'>+	FC11_REG_0,</div><div class='add'>+	FC11_REG_FA,		/* FA */</div><div class='add'>+	FC11_REG_FP,		/* FP */</div><div class='add'>+	FC11_REG_XINHI,		/* XIN high 8 bit */</div><div class='add'>+	FC11_REG_XINLO,		/* XIN low 8 bit */</div><div class='add'>+	FC11_REG_VCO,		/* VCO */</div><div class='add'>+	FC11_REG_VCOSEL,	/* VCO select */</div><div class='add'>+	FC11_REG_7,		/* Unknown tuner reg 7 */</div><div class='add'>+	FC11_REG_8,		/* Unknown tuner reg 8 */</div><div class='add'>+	FC11_REG_9,</div><div class='add'>+	FC11_REG_10,		/* Unknown tuner reg 10 */</div><div class='add'>+	FC11_REG_11,		/* Unknown tuner reg 11 */</div><div class='add'>+	FC11_REG_12,</div><div class='add'>+	FC11_REG_RCCAL,		/* RC calibrate */</div><div class='add'>+	FC11_REG_VCOCAL,	/* VCO calibrate */</div><div class='add'>+	FC11_REG_15,</div><div class='add'>+	FC11_REG_16,		/* Unknown tuner reg 16 */</div><div class='add'>+	FC11_REG_17,</div><div class='add'>+</div><div class='add'>+	FC11_NR_REGS,		/* Number of registers */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum FC11_REG_VCOSEL_bits {</div><div class='add'>+	FC11_VCOSEL_2		= 0x08, /* VCO select 2 */</div><div class='add'>+	FC11_VCOSEL_1		= 0x10, /* VCO select 1 */</div><div class='add'>+	FC11_VCOSEL_CLKOUT	= 0x20, /* Fix clock out */</div><div class='add'>+	FC11_VCOSEL_BW7M	= 0x40, /* 7MHz bw */</div><div class='add'>+	FC11_VCOSEL_BW6M	= 0x80, /* 6MHz bw */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum FC11_REG_RCCAL_bits {</div><div class='add'>+	FC11_RCCAL_FORCE	= 0x10, /* force */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum FC11_REG_VCOCAL_bits {</div><div class='add'>+	FC11_VCOCAL_RUN		= 0,	/* VCO calibration run */</div><div class='add'>+	FC11_VCOCAL_VALUEMASK	= 0x3F,	/* VCO calibration value mask */</div><div class='add'>+	FC11_VCOCAL_OK		= 0x40,	/* VCO calibration Ok */</div><div class='add'>+	FC11_VCOCAL_RESET	= 0x80, /* VCO calibration reset */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct fc0011_priv {</div><div class='add'>+	struct i2c_adapter *i2c;</div><div class='add'>+	u8 addr;</div><div class='add'>+</div><div class='add'>+	u32 frequency;</div><div class='add'>+	u32 bandwidth;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int fc0011_writereg(struct fc0011_priv *priv, u8 reg, u8 val)</div><div class='add'>+{</div><div class='add'>+	u8 buf[2] = { reg, val };</div><div class='add'>+	struct i2c_msg msg = { .addr = priv-&gt;addr,</div><div class='add'>+		.flags = 0, .buf = buf, .len = 2 };</div><div class='add'>+</div><div class='add'>+	if (i2c_transfer(priv-&gt;i2c, &amp;msg, 1) != 1) {</div><div class='add'>+		dev_err(&amp;priv-&gt;i2c-&gt;dev,</div><div class='add'>+			"I2C write reg failed, reg: %02x, val: %02x\n",</div><div class='add'>+			reg, val);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0011_readreg(struct fc0011_priv *priv, u8 reg, u8 *val)</div><div class='add'>+{</div><div class='add'>+	u8 dummy;</div><div class='add'>+	struct i2c_msg msg[2] = {</div><div class='add'>+		{ .addr = priv-&gt;addr,</div><div class='add'>+		  .flags = 0, .buf = &amp;reg, .len = 1 },</div><div class='add'>+		{ .addr = priv-&gt;addr,</div><div class='add'>+		  .flags = I2C_M_RD, .buf = val ? : &amp;dummy, .len = 1 },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (i2c_transfer(priv-&gt;i2c, msg, 2) != 2) {</div><div class='add'>+		dev_err(&amp;priv-&gt;i2c-&gt;dev,</div><div class='add'>+			"I2C read failed, reg: %02x\n", reg);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0011_release(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	kfree(fe-&gt;tuner_priv);</div><div class='add'>+	fe-&gt;tuner_priv = NULL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0011_init(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct fc0011_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(!fe-&gt;callback))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = fe-&gt;callback(priv-&gt;i2c, DVB_FRONTEND_COMPONENT_TUNER,</div><div class='add'>+			   FC0011_FE_CALLBACK_POWER, priv-&gt;addr);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;priv-&gt;i2c-&gt;dev, "Power-on callback failed\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	err = fe-&gt;callback(priv-&gt;i2c, DVB_FRONTEND_COMPONENT_TUNER,</div><div class='add'>+			   FC0011_FE_CALLBACK_RESET, priv-&gt;addr);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;priv-&gt;i2c-&gt;dev, "Reset callback failed\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Initiate VCO calibration */</div><div class='add'>+static int fc0011_vcocal_trigger(struct fc0011_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = fc0011_writereg(priv, FC11_REG_VCOCAL, FC11_VCOCAL_RESET);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	err = fc0011_writereg(priv, FC11_REG_VCOCAL, FC11_VCOCAL_RUN);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Read VCO calibration value */</div><div class='add'>+static int fc0011_vcocal_read(struct fc0011_priv *priv, u8 *value)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = fc0011_writereg(priv, FC11_REG_VCOCAL, FC11_VCOCAL_RUN);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	usleep_range(10000, 20000);</div><div class='add'>+	err = fc0011_readreg(priv, FC11_REG_VCOCAL, value);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0011_set_params(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct dtv_frontend_properties *p = &amp;fe-&gt;dtv_property_cache;</div><div class='add'>+	struct fc0011_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	int err;</div><div class='add'>+	unsigned int i, vco_retries;</div><div class='add'>+	u32 freq = p-&gt;frequency / 1000;</div><div class='add'>+	u32 bandwidth = p-&gt;bandwidth_hz / 1000;</div><div class='add'>+	u32 fvco, xin, xdiv, xdivr;</div><div class='add'>+	u16 frac;</div><div class='add'>+	u8 fa, fp, vco_sel, vco_cal;</div><div class='add'>+	u8 regs[FC11_NR_REGS] = { };</div><div class='add'>+</div><div class='add'>+	regs[FC11_REG_7] = 0x0F;</div><div class='add'>+	regs[FC11_REG_8] = 0x3E;</div><div class='add'>+	regs[FC11_REG_10] = 0xB8;</div><div class='add'>+	regs[FC11_REG_11] = 0x80;</div><div class='add'>+	regs[FC11_REG_RCCAL] = 0x04;</div><div class='add'>+	err = fc0011_writereg(priv, FC11_REG_7, regs[FC11_REG_7]);</div><div class='add'>+	err |= fc0011_writereg(priv, FC11_REG_8, regs[FC11_REG_8]);</div><div class='add'>+	err |= fc0011_writereg(priv, FC11_REG_10, regs[FC11_REG_10]);</div><div class='add'>+	err |= fc0011_writereg(priv, FC11_REG_11, regs[FC11_REG_11]);</div><div class='add'>+	err |= fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]);</div><div class='add'>+	if (err)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	/* Set VCO freq and VCO div */</div><div class='add'>+	if (freq &lt; 54000) {</div><div class='add'>+		fvco = freq * 64;</div><div class='add'>+		regs[FC11_REG_VCO] = 0x82;</div><div class='add'>+	} else if (freq &lt; 108000) {</div><div class='add'>+		fvco = freq * 32;</div><div class='add'>+		regs[FC11_REG_VCO] = 0x42;</div><div class='add'>+	} else if (freq &lt; 216000) {</div><div class='add'>+		fvco = freq * 16;</div><div class='add'>+		regs[FC11_REG_VCO] = 0x22;</div><div class='add'>+	} else if (freq &lt; 432000) {</div><div class='add'>+		fvco = freq * 8;</div><div class='add'>+		regs[FC11_REG_VCO] = 0x12;</div><div class='add'>+	} else {</div><div class='add'>+		fvco = freq * 4;</div><div class='add'>+		regs[FC11_REG_VCO] = 0x0A;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calc XIN. The PLL reference frequency is 18 MHz. */</div><div class='add'>+	xdiv = fvco / 18000;</div><div class='add'>+	frac = fvco - xdiv * 18000;</div><div class='add'>+	frac = (frac &lt;&lt; 15) / 18000;</div><div class='add'>+	if (frac &gt;= 16384)</div><div class='add'>+		frac += 32786;</div><div class='add'>+	if (!frac)</div><div class='add'>+		xin = 0;</div><div class='add'>+	else if (frac &lt; 511)</div><div class='add'>+		xin = 512;</div><div class='add'>+	else if (frac &lt; 65026)</div><div class='add'>+		xin = frac;</div><div class='add'>+	else</div><div class='add'>+		xin = 65024;</div><div class='add'>+	regs[FC11_REG_XINHI] = xin &gt;&gt; 8;</div><div class='add'>+	regs[FC11_REG_XINLO] = xin;</div><div class='add'>+</div><div class='add'>+	/* Calc FP and FA */</div><div class='add'>+	xdivr = xdiv;</div><div class='add'>+	if (fvco - xdiv * 18000 &gt;= 9000)</div><div class='add'>+		xdivr += 1; /* round */</div><div class='add'>+	fp = xdivr / 8;</div><div class='add'>+	fa = xdivr - fp * 8;</div><div class='add'>+	if (fa &lt; 2) {</div><div class='add'>+		fp -= 1;</div><div class='add'>+		fa += 8;</div><div class='add'>+	}</div><div class='add'>+	if (fp &gt; 0x1F) {</div><div class='add'>+		fp &amp;= 0x1F;</div><div class='add'>+		fa &amp;= 0xF;</div><div class='add'>+	}</div><div class='add'>+	if (fa &gt;= fp) {</div><div class='add'>+		dev_warn(&amp;priv-&gt;i2c-&gt;dev,</div><div class='add'>+			 "fa %02X &gt;= fp %02X, but trying to continue\n",</div><div class='add'>+			 (unsigned int)(u8)fa, (unsigned int)(u8)fp);</div><div class='add'>+	}</div><div class='add'>+	regs[FC11_REG_FA] = fa;</div><div class='add'>+	regs[FC11_REG_FP] = fp;</div><div class='add'>+</div><div class='add'>+	/* Select bandwidth */</div><div class='add'>+	switch (bandwidth) {</div><div class='add'>+	case 8000:</div><div class='add'>+		break;</div><div class='add'>+	case 7000:</div><div class='add'>+		regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_BW7M;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;priv-&gt;i2c-&gt;dev, "Unsupported bandwidth %u kHz. "</div><div class='add'>+			 "Using 6000 kHz.\n",</div><div class='add'>+			 bandwidth);</div><div class='add'>+		bandwidth = 6000;</div><div class='add'>+		/* fallthrough */</div><div class='add'>+	case 6000:</div><div class='add'>+		regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_BW6M;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Pre VCO select */</div><div class='add'>+	if (fvco &lt; 2320000) {</div><div class='add'>+		vco_sel = 0;</div><div class='add'>+		regs[FC11_REG_VCOSEL] &amp;= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);</div><div class='add'>+	} else if (fvco &lt; 3080000) {</div><div class='add'>+		vco_sel = 1;</div><div class='add'>+		regs[FC11_REG_VCOSEL] &amp;= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);</div><div class='add'>+		regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1;</div><div class='add'>+	} else {</div><div class='add'>+		vco_sel = 2;</div><div class='add'>+		regs[FC11_REG_VCOSEL] &amp;= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);</div><div class='add'>+		regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Fix for low freqs */</div><div class='add'>+	if (freq &lt; 45000) {</div><div class='add'>+		regs[FC11_REG_FA] = 0x6;</div><div class='add'>+		regs[FC11_REG_FP] = 0x11;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Clock out fix */</div><div class='add'>+	regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_CLKOUT;</div><div class='add'>+</div><div class='add'>+	/* Write the cached registers */</div><div class='add'>+	for (i = FC11_REG_FA; i &lt;= FC11_REG_VCOSEL; i++) {</div><div class='add'>+		err = fc0011_writereg(priv, i, regs[i]);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* VCO calibration */</div><div class='add'>+	err = fc0011_vcocal_trigger(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	err = fc0011_vcocal_read(priv, &amp;vco_cal);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	vco_retries = 0;</div><div class='add'>+	while (!(vco_cal &amp; FC11_VCOCAL_OK) &amp;&amp; vco_retries &lt; 3) {</div><div class='add'>+		/* Reset the tuner and try again */</div><div class='add'>+		err = fe-&gt;callback(priv-&gt;i2c, DVB_FRONTEND_COMPONENT_TUNER,</div><div class='add'>+				   FC0011_FE_CALLBACK_RESET, priv-&gt;addr);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(&amp;priv-&gt;i2c-&gt;dev, "Failed to reset tuner\n");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+		/* Reinit tuner config */</div><div class='add'>+		err = 0;</div><div class='add'>+		for (i = FC11_REG_FA; i &lt;= FC11_REG_VCOSEL; i++)</div><div class='add'>+			err |= fc0011_writereg(priv, i, regs[i]);</div><div class='add'>+		err |= fc0011_writereg(priv, FC11_REG_7, regs[FC11_REG_7]);</div><div class='add'>+		err |= fc0011_writereg(priv, FC11_REG_8, regs[FC11_REG_8]);</div><div class='add'>+		err |= fc0011_writereg(priv, FC11_REG_10, regs[FC11_REG_10]);</div><div class='add'>+		err |= fc0011_writereg(priv, FC11_REG_11, regs[FC11_REG_11]);</div><div class='add'>+		err |= fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]);</div><div class='add'>+		if (err)</div><div class='add'>+			return -EIO;</div><div class='add'>+		/* VCO calibration */</div><div class='add'>+		err = fc0011_vcocal_trigger(priv);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		err = fc0011_vcocal_read(priv, &amp;vco_cal);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		vco_retries++;</div><div class='add'>+	}</div><div class='add'>+	if (!(vco_cal &amp; FC11_VCOCAL_OK)) {</div><div class='add'>+		dev_err(&amp;priv-&gt;i2c-&gt;dev,</div><div class='add'>+			"Failed to read VCO calibration value (got %02X)\n",</div><div class='add'>+			(unsigned int)vco_cal);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	vco_cal &amp;= FC11_VCOCAL_VALUEMASK;</div><div class='add'>+</div><div class='add'>+	switch (vco_sel) {</div><div class='add'>+	case 0:</div><div class='add'>+		if (vco_cal &lt; 8) {</div><div class='add'>+			regs[FC11_REG_VCOSEL] &amp;= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);</div><div class='add'>+			regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1;</div><div class='add'>+			err = fc0011_writereg(priv, FC11_REG_VCOSEL,</div><div class='add'>+					      regs[FC11_REG_VCOSEL]);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+			err = fc0011_vcocal_trigger(priv);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		} else {</div><div class='add'>+			regs[FC11_REG_VCOSEL] &amp;= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);</div><div class='add'>+			err = fc0011_writereg(priv, FC11_REG_VCOSEL,</div><div class='add'>+					      regs[FC11_REG_VCOSEL]);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		if (vco_cal &lt; 5) {</div><div class='add'>+			regs[FC11_REG_VCOSEL] &amp;= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);</div><div class='add'>+			regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_2;</div><div class='add'>+			err = fc0011_writereg(priv, FC11_REG_VCOSEL,</div><div class='add'>+					      regs[FC11_REG_VCOSEL]);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+			err = fc0011_vcocal_trigger(priv);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		} else if (vco_cal &lt;= 48) {</div><div class='add'>+			regs[FC11_REG_VCOSEL] &amp;= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);</div><div class='add'>+			regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1;</div><div class='add'>+			err = fc0011_writereg(priv, FC11_REG_VCOSEL,</div><div class='add'>+					      regs[FC11_REG_VCOSEL]);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		} else {</div><div class='add'>+			regs[FC11_REG_VCOSEL] &amp;= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);</div><div class='add'>+			err = fc0011_writereg(priv, FC11_REG_VCOSEL,</div><div class='add'>+					      regs[FC11_REG_VCOSEL]);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+			err = fc0011_vcocal_trigger(priv);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		if (vco_cal &gt; 53) {</div><div class='add'>+			regs[FC11_REG_VCOSEL] &amp;= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);</div><div class='add'>+			regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1;</div><div class='add'>+			err = fc0011_writereg(priv, FC11_REG_VCOSEL,</div><div class='add'>+					      regs[FC11_REG_VCOSEL]);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+			err = fc0011_vcocal_trigger(priv);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		} else {</div><div class='add'>+			regs[FC11_REG_VCOSEL] &amp;= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);</div><div class='add'>+			regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_2;</div><div class='add'>+			err = fc0011_writereg(priv, FC11_REG_VCOSEL,</div><div class='add'>+					      regs[FC11_REG_VCOSEL]);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	err = fc0011_vcocal_read(priv, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	usleep_range(10000, 50000);</div><div class='add'>+</div><div class='add'>+	err = fc0011_readreg(priv, FC11_REG_RCCAL, &amp;regs[FC11_REG_RCCAL]);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	regs[FC11_REG_RCCAL] |= FC11_RCCAL_FORCE;</div><div class='add'>+	err = fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	err = fc0011_writereg(priv, FC11_REG_16, 0xB);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;priv-&gt;i2c-&gt;dev, "Tuned to "</div><div class='add'>+		"fa=%02X fp=%02X xin=%02X%02X vco=%02X vcosel=%02X "</div><div class='add'>+		"vcocal=%02X(%u) bw=%u\n",</div><div class='add'>+		(unsigned int)regs[FC11_REG_FA],</div><div class='add'>+		(unsigned int)regs[FC11_REG_FP],</div><div class='add'>+		(unsigned int)regs[FC11_REG_XINHI],</div><div class='add'>+		(unsigned int)regs[FC11_REG_XINLO],</div><div class='add'>+		(unsigned int)regs[FC11_REG_VCO],</div><div class='add'>+		(unsigned int)regs[FC11_REG_VCOSEL],</div><div class='add'>+		(unsigned int)vco_cal, vco_retries,</div><div class='add'>+		(unsigned int)bandwidth);</div><div class='add'>+</div><div class='add'>+	priv-&gt;frequency = p-&gt;frequency;</div><div class='add'>+	priv-&gt;bandwidth = p-&gt;bandwidth_hz;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0011_get_frequency(struct dvb_frontend *fe, u32 *frequency)</div><div class='add'>+{</div><div class='add'>+	struct fc0011_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+</div><div class='add'>+	*frequency = priv-&gt;frequency;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0011_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)</div><div class='add'>+{</div><div class='add'>+	*frequency = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0011_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)</div><div class='add'>+{</div><div class='add'>+	struct fc0011_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+</div><div class='add'>+	*bandwidth = priv-&gt;bandwidth;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dvb_tuner_ops fc0011_tuner_ops = {</div><div class='add'>+	.info = {</div><div class='add'>+		.name		= "Fitipower FC0011",</div><div class='add'>+</div><div class='add'>+		.frequency_min	= 45000000,</div><div class='add'>+		.frequency_max	= 1000000000,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	.release		= fc0011_release,</div><div class='add'>+	.init			= fc0011_init,</div><div class='add'>+</div><div class='add'>+	.set_params		= fc0011_set_params,</div><div class='add'>+</div><div class='add'>+	.get_frequency		= fc0011_get_frequency,</div><div class='add'>+	.get_if_frequency	= fc0011_get_if_frequency,</div><div class='add'>+	.get_bandwidth		= fc0011_get_bandwidth,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dvb_frontend *fc0011_attach(struct dvb_frontend *fe,</div><div class='add'>+				   struct i2c_adapter *i2c,</div><div class='add'>+				   const struct fc0011_config *config)</div><div class='add'>+{</div><div class='add'>+	struct fc0011_priv *priv;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(struct fc0011_priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	priv-&gt;i2c = i2c;</div><div class='add'>+	priv-&gt;addr = config-&gt;i2c_address;</div><div class='add'>+</div><div class='add'>+	fe-&gt;tuner_priv = priv;</div><div class='add'>+	fe-&gt;ops.tuner_ops = fc0011_tuner_ops;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;priv-&gt;i2c-&gt;dev, "Fitipower FC0011 tuner attached\n");</div><div class='add'>+</div><div class='add'>+	return fe;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(fc0011_attach);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Fitipower FC0011 silicon tuner driver");</div><div class='add'>+MODULE_AUTHOR("Michael Buesch &lt;m@bues.ch&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/media/common/tuners/fc0011.h b/drivers/media/common/tuners/fc0011.h<br/>new file mode 100644<br/>index 000000000000..0ee581f122d2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/fc0011.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0011.h</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+#ifndef LINUX_FC0011_H_</div><div class='add'>+#define LINUX_FC0011_H_</div><div class='add'>+</div><div class='add'>+#include "dvb_frontend.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/** struct fc0011_config - fc0011 hardware config</div><div class='add'>+ *</div><div class='add'>+ * @i2c_address: I2C bus address.</div><div class='add'>+ */</div><div class='add'>+struct fc0011_config {</div><div class='add'>+	u8 i2c_address;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/** enum fc0011_fe_callback_commands - Frontend callbacks</div><div class='add'>+ *</div><div class='add'>+ * @FC0011_FE_CALLBACK_POWER: Power on tuner hardware.</div><div class='add'>+ * @FC0011_FE_CALLBACK_RESET: Request a tuner reset.</div><div class='add'>+ */</div><div class='add'>+enum fc0011_fe_callback_commands {</div><div class='add'>+	FC0011_FE_CALLBACK_POWER,</div><div class='add'>+	FC0011_FE_CALLBACK_RESET,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MEDIA_TUNER_FC0011) ||\</div><div class='add'>+    defined(CONFIG_MEDIA_TUNER_FC0011_MODULE)</div><div class='add'>+struct dvb_frontend *fc0011_attach(struct dvb_frontend *fe,</div><div class='add'>+				   struct i2c_adapter *i2c,</div><div class='add'>+				   const struct fc0011_config *config);</div><div class='add'>+#else</div><div class='add'>+static inline</div><div class='add'>+struct dvb_frontend *fc0011_attach(struct dvb_frontend *fe,</div><div class='add'>+				   struct i2c_adapter *i2c,</div><div class='add'>+				   const struct fc0011_config *config)</div><div class='add'>+{</div><div class='add'>+	dev_err(&amp;i2c-&gt;dev, "fc0011 driver disabled in Kconfig\n");</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* LINUX_FC0011_H_ */</div><div class='head'>diff --git a/drivers/media/common/tuners/fc0012-priv.h b/drivers/media/common/tuners/fc0012-priv.h<br/>new file mode 100644<br/>index 000000000000..4577c917e616<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/fc0012-priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0012-priv.h</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+/*</div><div class='add'>+ * Fitipower FC0012 tuner driver - private includes</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Hans-Frieder Vogt &lt;hfvogt@gmx.net&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _FC0012_PRIV_H_</div><div class='add'>+#define _FC0012_PRIV_H_</div><div class='add'>+</div><div class='add'>+#define LOG_PREFIX "fc0012"</div><div class='add'>+</div><div class='add'>+#undef err</div><div class='add'>+#define err(f, arg...)  printk(KERN_ERR     LOG_PREFIX": " f "\n" , ## arg)</div><div class='add'>+#undef info</div><div class='add'>+#define info(f, arg...) printk(KERN_INFO    LOG_PREFIX": " f "\n" , ## arg)</div><div class='add'>+#undef warn</div><div class='add'>+#define warn(f, arg...) printk(KERN_WARNING LOG_PREFIX": " f "\n" , ## arg)</div><div class='add'>+</div><div class='add'>+struct fc0012_priv {</div><div class='add'>+	struct i2c_adapter *i2c;</div><div class='add'>+	u8 addr;</div><div class='add'>+	u8 dual_master;</div><div class='add'>+	u8 xtal_freq;</div><div class='add'>+</div><div class='add'>+	u32 frequency;</div><div class='add'>+	u32 bandwidth;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/media/common/tuners/fc0012.c b/drivers/media/common/tuners/fc0012.c<br/>new file mode 100644<br/>index 000000000000..308135abd54c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/fc0012.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0012.c</a></div><div class='hunk'>@@ -0,0 +1,467 @@</div><div class='add'>+/*</div><div class='add'>+ * Fitipower FC0012 tuner driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Hans-Frieder Vogt &lt;hfvogt@gmx.net&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "fc0012.h"</div><div class='add'>+#include "fc0012-priv.h"</div><div class='add'>+</div><div class='add'>+static int fc0012_writereg(struct fc0012_priv *priv, u8 reg, u8 val)</div><div class='add'>+{</div><div class='add'>+	u8 buf[2] = {reg, val};</div><div class='add'>+	struct i2c_msg msg = {</div><div class='add'>+		.addr = priv-&gt;addr, .flags = 0, .buf = buf, .len = 2</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (i2c_transfer(priv-&gt;i2c, &amp;msg, 1) != 1) {</div><div class='add'>+		err("I2C write reg failed, reg: %02x, val: %02x", reg, val);</div><div class='add'>+		return -EREMOTEIO;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0012_readreg(struct fc0012_priv *priv, u8 reg, u8 *val)</div><div class='add'>+{</div><div class='add'>+	struct i2c_msg msg[2] = {</div><div class='add'>+		{ .addr = priv-&gt;addr, .flags = 0, .buf = &amp;reg, .len = 1 },</div><div class='add'>+		{ .addr = priv-&gt;addr, .flags = I2C_M_RD, .buf = val, .len = 1 },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (i2c_transfer(priv-&gt;i2c, msg, 2) != 2) {</div><div class='add'>+		err("I2C read reg failed, reg: %02x", reg);</div><div class='add'>+		return -EREMOTEIO;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0012_release(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	kfree(fe-&gt;tuner_priv);</div><div class='add'>+	fe-&gt;tuner_priv = NULL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0012_init(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct fc0012_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+	unsigned char reg[] = {</div><div class='add'>+		0x00,	/* dummy reg. 0 */</div><div class='add'>+		0x05,	/* reg. 0x01 */</div><div class='add'>+		0x10,	/* reg. 0x02 */</div><div class='add'>+		0x00,	/* reg. 0x03 */</div><div class='add'>+		0x00,	/* reg. 0x04 */</div><div class='add'>+		0x0f,	/* reg. 0x05: may also be 0x0a */</div><div class='add'>+		0x00,	/* reg. 0x06: divider 2, VCO slow */</div><div class='add'>+		0x00,	/* reg. 0x07: may also be 0x0f */</div><div class='add'>+		0xff,	/* reg. 0x08: AGC Clock divide by 256, AGC gain 1/256,</div><div class='add'>+			   Loop Bw 1/8 */</div><div class='add'>+		0x6e,	/* reg. 0x09: Disable LoopThrough, Enable LoopThrough: 0x6f */</div><div class='add'>+		0xb8,	/* reg. 0x0a: Disable LO Test Buffer */</div><div class='add'>+		0x82,	/* reg. 0x0b: Output Clock is same as clock frequency,</div><div class='add'>+			   may also be 0x83 */</div><div class='add'>+		0xfc,	/* reg. 0x0c: depending on AGC Up-Down mode, may need 0xf8 */</div><div class='add'>+		0x02,	/* reg. 0x0d: AGC Not Forcing &amp; LNA Forcing, 0x02 for DVB-T */</div><div class='add'>+		0x00,	/* reg. 0x0e */</div><div class='add'>+		0x00,	/* reg. 0x0f */</div><div class='add'>+		0x00,	/* reg. 0x10: may also be 0x0d */</div><div class='add'>+		0x00,	/* reg. 0x11 */</div><div class='add'>+		0x1f,	/* reg. 0x12: Set to maximum gain */</div><div class='add'>+		0x08,	/* reg. 0x13: Set to Middle Gain: 0x08,</div><div class='add'>+			   Low Gain: 0x00, High Gain: 0x10, enable IX2: 0x80 */</div><div class='add'>+		0x00,	/* reg. 0x14 */</div><div class='add'>+		0x04,	/* reg. 0x15: Enable LNA COMPS */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	switch (priv-&gt;xtal_freq) {</div><div class='add'>+	case FC_XTAL_27_MHZ:</div><div class='add'>+	case FC_XTAL_28_8_MHZ:</div><div class='add'>+		reg[0x07] |= 0x20;</div><div class='add'>+		break;</div><div class='add'>+	case FC_XTAL_36_MHZ:</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;dual_master)</div><div class='add'>+		reg[0x0c] |= 0x02;</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; sizeof(reg); i++) {</div><div class='add'>+		ret = fc0012_writereg(priv, i, reg[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		err("fc0012_writereg failed: %d", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0012_sleep(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	/* nothing to do here */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0012_set_params(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct fc0012_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+	struct dtv_frontend_properties *p = &amp;fe-&gt;dtv_property_cache;</div><div class='add'>+	u32 freq = p-&gt;frequency / 1000;</div><div class='add'>+	u32 delsys = p-&gt;delivery_system;</div><div class='add'>+	unsigned char reg[7], am, pm, multi, tmp;</div><div class='add'>+	unsigned long f_vco;</div><div class='add'>+	unsigned short xtal_freq_khz_2, xin, xdiv;</div><div class='add'>+	int vco_select = false;</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;callback) {</div><div class='add'>+		ret = fe-&gt;callback(priv-&gt;i2c, DVB_FRONTEND_COMPONENT_TUNER,</div><div class='add'>+			FC_FE_CALLBACK_VHF_ENABLE, (freq &gt; 300000 ? 0 : 1));</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (priv-&gt;xtal_freq) {</div><div class='add'>+	case FC_XTAL_27_MHZ:</div><div class='add'>+		xtal_freq_khz_2 = 27000 / 2;</div><div class='add'>+		break;</div><div class='add'>+	case FC_XTAL_36_MHZ:</div><div class='add'>+		xtal_freq_khz_2 = 36000 / 2;</div><div class='add'>+		break;</div><div class='add'>+	case FC_XTAL_28_8_MHZ:</div><div class='add'>+	default:</div><div class='add'>+		xtal_freq_khz_2 = 28800 / 2;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* select frequency divider and the frequency of VCO */</div><div class='add'>+	if (freq &lt; 37084) {		/* freq * 96 &lt; 3560000 */</div><div class='add'>+		multi = 96;</div><div class='add'>+		reg[5] = 0x82;</div><div class='add'>+		reg[6] = 0x00;</div><div class='add'>+	} else if (freq &lt; 55625) {	/* freq * 64 &lt; 3560000 */</div><div class='add'>+		multi = 64;</div><div class='add'>+		reg[5] = 0x82;</div><div class='add'>+		reg[6] = 0x02;</div><div class='add'>+	} else if (freq &lt; 74167) {	/* freq * 48 &lt; 3560000 */</div><div class='add'>+		multi = 48;</div><div class='add'>+		reg[5] = 0x42;</div><div class='add'>+		reg[6] = 0x00;</div><div class='add'>+	} else if (freq &lt; 111250) {	/* freq * 32 &lt; 3560000 */</div><div class='add'>+		multi = 32;</div><div class='add'>+		reg[5] = 0x42;</div><div class='add'>+		reg[6] = 0x02;</div><div class='add'>+	} else if (freq &lt; 148334) {	/* freq * 24 &lt; 3560000 */</div><div class='add'>+		multi = 24;</div><div class='add'>+		reg[5] = 0x22;</div><div class='add'>+		reg[6] = 0x00;</div><div class='add'>+	} else if (freq &lt; 222500) {	/* freq * 16 &lt; 3560000 */</div><div class='add'>+		multi = 16;</div><div class='add'>+		reg[5] = 0x22;</div><div class='add'>+		reg[6] = 0x02;</div><div class='add'>+	} else if (freq &lt; 296667) {	/* freq * 12 &lt; 3560000 */</div><div class='add'>+		multi = 12;</div><div class='add'>+		reg[5] = 0x12;</div><div class='add'>+		reg[6] = 0x00;</div><div class='add'>+	} else if (freq &lt; 445000) {	/* freq * 8 &lt; 3560000 */</div><div class='add'>+		multi = 8;</div><div class='add'>+		reg[5] = 0x12;</div><div class='add'>+		reg[6] = 0x02;</div><div class='add'>+	} else if (freq &lt; 593334) {	/* freq * 6 &lt; 3560000 */</div><div class='add'>+		multi = 6;</div><div class='add'>+		reg[5] = 0x0a;</div><div class='add'>+		reg[6] = 0x00;</div><div class='add'>+	} else {</div><div class='add'>+		multi = 4;</div><div class='add'>+		reg[5] = 0x0a;</div><div class='add'>+		reg[6] = 0x02;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	f_vco = freq * multi;</div><div class='add'>+</div><div class='add'>+	if (f_vco &gt;= 3060000) {</div><div class='add'>+		reg[6] |= 0x08;</div><div class='add'>+		vco_select = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (freq &gt;= 45000) {</div><div class='add'>+		/* From divided value (XDIV) determined the FA and FP value */</div><div class='add'>+		xdiv = (unsigned short)(f_vco / xtal_freq_khz_2);</div><div class='add'>+		if ((f_vco - xdiv * xtal_freq_khz_2) &gt;= (xtal_freq_khz_2 / 2))</div><div class='add'>+			xdiv++;</div><div class='add'>+</div><div class='add'>+		pm = (unsigned char)(xdiv / 8);</div><div class='add'>+		am = (unsigned char)(xdiv - (8 * pm));</div><div class='add'>+</div><div class='add'>+		if (am &lt; 2) {</div><div class='add'>+			reg[1] = am + 8;</div><div class='add'>+			reg[2] = pm - 1;</div><div class='add'>+		} else {</div><div class='add'>+			reg[1] = am;</div><div class='add'>+			reg[2] = pm;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* fix for frequency less than 45 MHz */</div><div class='add'>+		reg[1] = 0x06;</div><div class='add'>+		reg[2] = 0x11;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* fix clock out */</div><div class='add'>+	reg[6] |= 0x20;</div><div class='add'>+</div><div class='add'>+	/* From VCO frequency determines the XIN ( fractional part of Delta</div><div class='add'>+	   Sigma PLL) and divided value (XDIV) */</div><div class='add'>+	xin = (unsigned short)(f_vco - (f_vco / xtal_freq_khz_2) * xtal_freq_khz_2);</div><div class='add'>+	xin = (xin &lt;&lt; 15) / xtal_freq_khz_2;</div><div class='add'>+	if (xin &gt;= 16384)</div><div class='add'>+		xin += 32768;</div><div class='add'>+</div><div class='add'>+	reg[3] = xin &gt;&gt; 8;	/* xin with 9 bit resolution */</div><div class='add'>+	reg[4] = xin &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	if (delsys == SYS_DVBT) {</div><div class='add'>+		reg[6] &amp;= 0x3f;	/* bits 6 and 7 describe the bandwidth */</div><div class='add'>+		switch (p-&gt;bandwidth_hz) {</div><div class='add'>+		case 6000000:</div><div class='add'>+			reg[6] |= 0x80;</div><div class='add'>+			break;</div><div class='add'>+		case 7000000:</div><div class='add'>+			reg[6] |= 0x40;</div><div class='add'>+			break;</div><div class='add'>+		case 8000000:</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		err("%s: modulation type not supported!", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* modified for Realtek demod */</div><div class='add'>+	reg[5] |= 0x07;</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt;= 6; i++) {</div><div class='add'>+		ret = fc0012_writereg(priv, i, reg[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* VCO Calibration */</div><div class='add'>+	ret = fc0012_writereg(priv, 0x0e, 0x80);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = fc0012_writereg(priv, 0x0e, 0x00);</div><div class='add'>+</div><div class='add'>+	/* VCO Re-Calibration if needed */</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = fc0012_writereg(priv, 0x0e, 0x00);</div><div class='add'>+</div><div class='add'>+	if (!ret) {</div><div class='add'>+		msleep(10);</div><div class='add'>+		ret = fc0012_readreg(priv, 0x0e, &amp;tmp);</div><div class='add'>+	}</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	/* vco selection */</div><div class='add'>+	tmp &amp;= 0x3f;</div><div class='add'>+</div><div class='add'>+	if (vco_select) {</div><div class='add'>+		if (tmp &gt; 0x3c) {</div><div class='add'>+			reg[6] &amp;= ~0x08;</div><div class='add'>+			ret = fc0012_writereg(priv, 0x06, reg[6]);</div><div class='add'>+			if (!ret)</div><div class='add'>+				ret = fc0012_writereg(priv, 0x0e, 0x80);</div><div class='add'>+			if (!ret)</div><div class='add'>+				ret = fc0012_writereg(priv, 0x0e, 0x00);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (tmp &lt; 0x02) {</div><div class='add'>+			reg[6] |= 0x08;</div><div class='add'>+			ret = fc0012_writereg(priv, 0x06, reg[6]);</div><div class='add'>+			if (!ret)</div><div class='add'>+				ret = fc0012_writereg(priv, 0x0e, 0x80);</div><div class='add'>+			if (!ret)</div><div class='add'>+				ret = fc0012_writereg(priv, 0x0e, 0x00);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;frequency = p-&gt;frequency;</div><div class='add'>+	priv-&gt;bandwidth = p-&gt;bandwidth_hz;</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */</div><div class='add'>+	if (ret)</div><div class='add'>+		warn("%s: failed: %d", __func__, ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0012_get_frequency(struct dvb_frontend *fe, u32 *frequency)</div><div class='add'>+{</div><div class='add'>+	struct fc0012_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	*frequency = priv-&gt;frequency;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0012_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)</div><div class='add'>+{</div><div class='add'>+	/* CHECK: always ? */</div><div class='add'>+	*frequency = 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0012_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)</div><div class='add'>+{</div><div class='add'>+	struct fc0012_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	*bandwidth = priv-&gt;bandwidth;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define INPUT_ADC_LEVEL	-8</div><div class='add'>+</div><div class='add'>+static int fc0012_get_rf_strength(struct dvb_frontend *fe, u16 *strength)</div><div class='add'>+{</div><div class='add'>+	struct fc0012_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned char tmp;</div><div class='add'>+	int int_temp, lna_gain, int_lna, tot_agc_gain, power;</div><div class='add'>+	const int fc0012_lna_gain_table[] = {</div><div class='add'>+		/* low gain */</div><div class='add'>+		-63, -58, -99, -73,</div><div class='add'>+		-63, -65, -54, -60,</div><div class='add'>+		/* middle gain */</div><div class='add'>+		 71,  70,  68,  67,</div><div class='add'>+		 65,  63,  61,  58,</div><div class='add'>+		/* high gain */</div><div class='add'>+		197, 191, 188, 186,</div><div class='add'>+		184, 182, 181, 179,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */</div><div class='add'>+</div><div class='add'>+	ret = fc0012_writereg(priv, 0x12, 0x00);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = fc0012_readreg(priv, 0x12, &amp;tmp);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+	int_temp = tmp;</div><div class='add'>+</div><div class='add'>+	ret = fc0012_readreg(priv, 0x13, &amp;tmp);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+	lna_gain = tmp &amp; 0x1f;</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */</div><div class='add'>+</div><div class='add'>+	if (lna_gain &lt; ARRAY_SIZE(fc0012_lna_gain_table)) {</div><div class='add'>+		int_lna = fc0012_lna_gain_table[lna_gain];</div><div class='add'>+		tot_agc_gain = (abs((int_temp &gt;&gt; 5) - 7) - 2 +</div><div class='add'>+				(int_temp &amp; 0x1f)) * 2;</div><div class='add'>+		power = INPUT_ADC_LEVEL - tot_agc_gain - int_lna / 10;</div><div class='add'>+</div><div class='add'>+		if (power &gt;= 45)</div><div class='add'>+			*strength = 255;	/* 100% */</div><div class='add'>+		else if (power &lt; -95)</div><div class='add'>+			*strength = 0;</div><div class='add'>+		else</div><div class='add'>+			*strength = (power + 95) * 255 / 140;</div><div class='add'>+</div><div class='add'>+		*strength |= *strength &lt;&lt; 8;</div><div class='add'>+	} else {</div><div class='add'>+		ret = -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	goto exit;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */</div><div class='add'>+exit:</div><div class='add'>+	if (ret)</div><div class='add'>+		warn("%s: failed: %d", __func__, ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dvb_tuner_ops fc0012_tuner_ops = {</div><div class='add'>+	.info = {</div><div class='add'>+		.name           = "Fitipower FC0012",</div><div class='add'>+</div><div class='add'>+		.frequency_min  = 37000000,	/* estimate */</div><div class='add'>+		.frequency_max  = 862000000,	/* estimate */</div><div class='add'>+		.frequency_step = 0,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	.release	= fc0012_release,</div><div class='add'>+</div><div class='add'>+	.init		= fc0012_init,</div><div class='add'>+	.sleep		= fc0012_sleep,</div><div class='add'>+</div><div class='add'>+	.set_params	= fc0012_set_params,</div><div class='add'>+</div><div class='add'>+	.get_frequency	= fc0012_get_frequency,</div><div class='add'>+	.get_if_frequency = fc0012_get_if_frequency,</div><div class='add'>+	.get_bandwidth	= fc0012_get_bandwidth,</div><div class='add'>+</div><div class='add'>+	.get_rf_strength = fc0012_get_rf_strength,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dvb_frontend *fc0012_attach(struct dvb_frontend *fe,</div><div class='add'>+	struct i2c_adapter *i2c, u8 i2c_address, int dual_master,</div><div class='add'>+	enum fc001x_xtal_freq xtal_freq)</div><div class='add'>+{</div><div class='add'>+	struct fc0012_priv *priv = NULL;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(struct fc0012_priv), GFP_KERNEL);</div><div class='add'>+	if (priv == NULL)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	priv-&gt;i2c = i2c;</div><div class='add'>+	priv-&gt;dual_master = dual_master;</div><div class='add'>+	priv-&gt;addr = i2c_address;</div><div class='add'>+	priv-&gt;xtal_freq = xtal_freq;</div><div class='add'>+</div><div class='add'>+	info("Fitipower FC0012 successfully attached.");</div><div class='add'>+</div><div class='add'>+	fe-&gt;tuner_priv = priv;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;fe-&gt;ops.tuner_ops, &amp;fc0012_tuner_ops,</div><div class='add'>+		sizeof(struct dvb_tuner_ops));</div><div class='add'>+</div><div class='add'>+	return fe;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(fc0012_attach);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Fitipower FC0012 silicon tuner driver");</div><div class='add'>+MODULE_AUTHOR("Hans-Frieder Vogt &lt;hfvogt@gmx.net&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_VERSION("0.6");</div><div class='head'>diff --git a/drivers/media/common/tuners/fc0012.h b/drivers/media/common/tuners/fc0012.h<br/>new file mode 100644<br/>index 000000000000..4dbd5efe8845<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/fc0012.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0012.h</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+/*</div><div class='add'>+ * Fitipower FC0012 tuner driver - include</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Hans-Frieder Vogt &lt;hfvogt@gmx.net&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _FC0012_H_</div><div class='add'>+#define _FC0012_H_</div><div class='add'>+</div><div class='add'>+#include "dvb_frontend.h"</div><div class='add'>+#include "fc001x-common.h"</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MEDIA_TUNER_FC0012) || \</div><div class='add'>+	(defined(CONFIG_MEDIA_TUNER_FC0012_MODULE) &amp;&amp; defined(MODULE))</div><div class='add'>+extern struct dvb_frontend *fc0012_attach(struct dvb_frontend *fe,</div><div class='add'>+					struct i2c_adapter *i2c,</div><div class='add'>+					u8 i2c_address, int dual_master,</div><div class='add'>+					enum fc001x_xtal_freq xtal_freq);</div><div class='add'>+#else</div><div class='add'>+static inline struct dvb_frontend *fc0012_attach(struct dvb_frontend *fe,</div><div class='add'>+					struct i2c_adapter *i2c,</div><div class='add'>+					u8 i2c_address, int dual_master,</div><div class='add'>+					enum fc001x_xtal_freq xtal_freq)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/media/common/tuners/fc0013-priv.h b/drivers/media/common/tuners/fc0013-priv.h<br/>new file mode 100644<br/>index 000000000000..bfd49dedea22<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/fc0013-priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0013-priv.h</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+/*</div><div class='add'>+ * Fitipower FC0013 tuner driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Hans-Frieder Vogt &lt;hfvogt@gmx.net&gt;</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License</div><div class='add'>+ *    along with this program; if not, write to the Free Software</div><div class='add'>+ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _FC0013_PRIV_H_</div><div class='add'>+#define _FC0013_PRIV_H_</div><div class='add'>+</div><div class='add'>+#define LOG_PREFIX "fc0013"</div><div class='add'>+</div><div class='add'>+#undef err</div><div class='add'>+#define err(f, arg...)  printk(KERN_ERR     LOG_PREFIX": " f "\n" , ## arg)</div><div class='add'>+#undef info</div><div class='add'>+#define info(f, arg...) printk(KERN_INFO    LOG_PREFIX": " f "\n" , ## arg)</div><div class='add'>+#undef warn</div><div class='add'>+#define warn(f, arg...) printk(KERN_WARNING LOG_PREFIX": " f "\n" , ## arg)</div><div class='add'>+</div><div class='add'>+struct fc0013_priv {</div><div class='add'>+	struct i2c_adapter *i2c;</div><div class='add'>+	u8 addr;</div><div class='add'>+	u8 dual_master;</div><div class='add'>+	u8 xtal_freq;</div><div class='add'>+</div><div class='add'>+	u32 frequency;</div><div class='add'>+	u32 bandwidth;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/media/common/tuners/fc0013.c b/drivers/media/common/tuners/fc0013.c<br/>new file mode 100644<br/>index 000000000000..bd8f0f1e8f3b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/fc0013.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0013.c</a></div><div class='hunk'>@@ -0,0 +1,634 @@</div><div class='add'>+/*</div><div class='add'>+ * Fitipower FC0013 tuner driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Hans-Frieder Vogt &lt;hfvogt@gmx.net&gt;</div><div class='add'>+ * partially based on driver code from Fitipower</div><div class='add'>+ * Copyright (C) 2010 Fitipower Integrated Technology Inc</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License</div><div class='add'>+ *    along with this program; if not, write to the Free Software</div><div class='add'>+ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "fc0013.h"</div><div class='add'>+#include "fc0013-priv.h"</div><div class='add'>+</div><div class='add'>+static int fc0013_writereg(struct fc0013_priv *priv, u8 reg, u8 val)</div><div class='add'>+{</div><div class='add'>+	u8 buf[2] = {reg, val};</div><div class='add'>+	struct i2c_msg msg = {</div><div class='add'>+		.addr = priv-&gt;addr, .flags = 0, .buf = buf, .len = 2</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (i2c_transfer(priv-&gt;i2c, &amp;msg, 1) != 1) {</div><div class='add'>+		err("I2C write reg failed, reg: %02x, val: %02x", reg, val);</div><div class='add'>+		return -EREMOTEIO;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0013_readreg(struct fc0013_priv *priv, u8 reg, u8 *val)</div><div class='add'>+{</div><div class='add'>+	struct i2c_msg msg[2] = {</div><div class='add'>+		{ .addr = priv-&gt;addr, .flags = 0, .buf = &amp;reg, .len = 1 },</div><div class='add'>+		{ .addr = priv-&gt;addr, .flags = I2C_M_RD, .buf = val, .len = 1 },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (i2c_transfer(priv-&gt;i2c, msg, 2) != 2) {</div><div class='add'>+		err("I2C read reg failed, reg: %02x", reg);</div><div class='add'>+		return -EREMOTEIO;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0013_release(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	kfree(fe-&gt;tuner_priv);</div><div class='add'>+	fe-&gt;tuner_priv = NULL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0013_init(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct fc0013_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+	unsigned char reg[] = {</div><div class='add'>+		0x00,	/* reg. 0x00: dummy */</div><div class='add'>+		0x09,	/* reg. 0x01 */</div><div class='add'>+		0x16,	/* reg. 0x02 */</div><div class='add'>+		0x00,	/* reg. 0x03 */</div><div class='add'>+		0x00,	/* reg. 0x04 */</div><div class='add'>+		0x17,	/* reg. 0x05 */</div><div class='add'>+		0x02,	/* reg. 0x06 */</div><div class='add'>+		0x0a,	/* reg. 0x07: CHECK */</div><div class='add'>+		0xff,	/* reg. 0x08: AGC Clock divide by 256, AGC gain 1/256,</div><div class='add'>+			   Loop Bw 1/8 */</div><div class='add'>+		0x6f,	/* reg. 0x09: enable LoopThrough */</div><div class='add'>+		0xb8,	/* reg. 0x0a: Disable LO Test Buffer */</div><div class='add'>+		0x82,	/* reg. 0x0b: CHECK */</div><div class='add'>+		0xfc,	/* reg. 0x0c: depending on AGC Up-Down mode, may need 0xf8 */</div><div class='add'>+		0x01,	/* reg. 0x0d: AGC Not Forcing &amp; LNA Forcing, may need 0x02 */</div><div class='add'>+		0x00,	/* reg. 0x0e */</div><div class='add'>+		0x00,	/* reg. 0x0f */</div><div class='add'>+		0x00,	/* reg. 0x10 */</div><div class='add'>+		0x00,	/* reg. 0x11 */</div><div class='add'>+		0x00,	/* reg. 0x12 */</div><div class='add'>+		0x00,	/* reg. 0x13 */</div><div class='add'>+		0x50,	/* reg. 0x14: DVB-t High Gain, UHF.</div><div class='add'>+			   Middle Gain: 0x48, Low Gain: 0x40 */</div><div class='add'>+		0x01,	/* reg. 0x15 */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	switch (priv-&gt;xtal_freq) {</div><div class='add'>+	case FC_XTAL_27_MHZ:</div><div class='add'>+	case FC_XTAL_28_8_MHZ:</div><div class='add'>+		reg[0x07] |= 0x20;</div><div class='add'>+		break;</div><div class='add'>+	case FC_XTAL_36_MHZ:</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;dual_master)</div><div class='add'>+		reg[0x0c] |= 0x02;</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; sizeof(reg); i++) {</div><div class='add'>+		ret = fc0013_writereg(priv, i, reg[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		err("fc0013_writereg failed: %d", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0013_sleep(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	/* nothing to do here */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fc0013_rc_cal_add(struct dvb_frontend *fe, int rc_val)</div><div class='add'>+{</div><div class='add'>+	struct fc0013_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 rc_cal;</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */</div><div class='add'>+</div><div class='add'>+	/* push rc_cal value, get rc_cal value */</div><div class='add'>+	ret = fc0013_writereg(priv, 0x10, 0x00);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error_out;</div><div class='add'>+</div><div class='add'>+	/* get rc_cal value */</div><div class='add'>+	ret = fc0013_readreg(priv, 0x10, &amp;rc_cal);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error_out;</div><div class='add'>+</div><div class='add'>+	rc_cal &amp;= 0x0f;</div><div class='add'>+</div><div class='add'>+	val = (int)rc_cal + rc_val;</div><div class='add'>+</div><div class='add'>+	/* forcing rc_cal */</div><div class='add'>+	ret = fc0013_writereg(priv, 0x0d, 0x11);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error_out;</div><div class='add'>+</div><div class='add'>+	/* modify rc_cal value */</div><div class='add'>+	if (val &gt; 15)</div><div class='add'>+		ret = fc0013_writereg(priv, 0x10, 0x0f);</div><div class='add'>+	else if (val &lt; 0)</div><div class='add'>+		ret = fc0013_writereg(priv, 0x10, 0x00);</div><div class='add'>+	else</div><div class='add'>+		ret = fc0013_writereg(priv, 0x10, (u8)val);</div><div class='add'>+</div><div class='add'>+error_out:</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(fc0013_rc_cal_add);</div><div class='add'>+</div><div class='add'>+int fc0013_rc_cal_reset(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct fc0013_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */</div><div class='add'>+</div><div class='add'>+	ret = fc0013_writereg(priv, 0x0d, 0x01);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = fc0013_writereg(priv, 0x10, 0x00);</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(fc0013_rc_cal_reset);</div><div class='add'>+</div><div class='add'>+static int fc0013_set_vhf_track(struct fc0013_priv *priv, u32 freq)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	ret = fc0013_readreg(priv, 0x1d, &amp;tmp);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error_out;</div><div class='add'>+	tmp &amp;= 0xe3;</div><div class='add'>+	if (freq &lt;= 177500) {		/* VHF Track: 7 */</div><div class='add'>+		ret = fc0013_writereg(priv, 0x1d, tmp | 0x1c);</div><div class='add'>+	} else if (freq &lt;= 184500) {	/* VHF Track: 6 */</div><div class='add'>+		ret = fc0013_writereg(priv, 0x1d, tmp | 0x18);</div><div class='add'>+	} else if (freq &lt;= 191500) {	/* VHF Track: 5 */</div><div class='add'>+		ret = fc0013_writereg(priv, 0x1d, tmp | 0x14);</div><div class='add'>+	} else if (freq &lt;= 198500) {	/* VHF Track: 4 */</div><div class='add'>+		ret = fc0013_writereg(priv, 0x1d, tmp | 0x10);</div><div class='add'>+	} else if (freq &lt;= 205500) {	/* VHF Track: 3 */</div><div class='add'>+		ret = fc0013_writereg(priv, 0x1d, tmp | 0x0c);</div><div class='add'>+	} else if (freq &lt;= 219500) {	/* VHF Track: 2 */</div><div class='add'>+		ret = fc0013_writereg(priv, 0x1d, tmp | 0x08);</div><div class='add'>+	} else if (freq &lt; 300000) {	/* VHF Track: 1 */</div><div class='add'>+		ret = fc0013_writereg(priv, 0x1d, tmp | 0x04);</div><div class='add'>+	} else {			/* UHF and GPS */</div><div class='add'>+		ret = fc0013_writereg(priv, 0x1d, tmp | 0x1c);</div><div class='add'>+	}</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error_out;</div><div class='add'>+error_out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0013_set_params(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct fc0013_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+	struct dtv_frontend_properties *p = &amp;fe-&gt;dtv_property_cache;</div><div class='add'>+	u32 freq = p-&gt;frequency / 1000;</div><div class='add'>+	u32 delsys = p-&gt;delivery_system;</div><div class='add'>+	unsigned char reg[7], am, pm, multi, tmp;</div><div class='add'>+	unsigned long f_vco;</div><div class='add'>+	unsigned short xtal_freq_khz_2, xin, xdiv;</div><div class='add'>+	int vco_select = false;</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;callback) {</div><div class='add'>+		ret = fe-&gt;callback(priv-&gt;i2c, DVB_FRONTEND_COMPONENT_TUNER,</div><div class='add'>+			FC_FE_CALLBACK_VHF_ENABLE, (freq &gt; 300000 ? 0 : 1));</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (priv-&gt;xtal_freq) {</div><div class='add'>+	case FC_XTAL_27_MHZ:</div><div class='add'>+		xtal_freq_khz_2 = 27000 / 2;</div><div class='add'>+		break;</div><div class='add'>+	case FC_XTAL_36_MHZ:</div><div class='add'>+		xtal_freq_khz_2 = 36000 / 2;</div><div class='add'>+		break;</div><div class='add'>+	case FC_XTAL_28_8_MHZ:</div><div class='add'>+	default:</div><div class='add'>+		xtal_freq_khz_2 = 28800 / 2;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */</div><div class='add'>+</div><div class='add'>+	/* set VHF track */</div><div class='add'>+	ret = fc0013_set_vhf_track(priv, freq);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	if (freq &lt; 300000) {</div><div class='add'>+		/* enable VHF filter */</div><div class='add'>+		ret = fc0013_readreg(priv, 0x07, &amp;tmp);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+		ret = fc0013_writereg(priv, 0x07, tmp | 0x10);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+</div><div class='add'>+		/* disable UHF &amp; disable GPS */</div><div class='add'>+		ret = fc0013_readreg(priv, 0x14, &amp;tmp);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+		ret = fc0013_writereg(priv, 0x14, tmp &amp; 0x1f);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+	} else if (freq &lt;= 862000) {</div><div class='add'>+		/* disable VHF filter */</div><div class='add'>+		ret = fc0013_readreg(priv, 0x07, &amp;tmp);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+		ret = fc0013_writereg(priv, 0x07, tmp &amp; 0xef);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+</div><div class='add'>+		/* enable UHF &amp; disable GPS */</div><div class='add'>+		ret = fc0013_readreg(priv, 0x14, &amp;tmp);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+		ret = fc0013_writereg(priv, 0x14, (tmp &amp; 0x1f) | 0x40);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+	} else {</div><div class='add'>+		/* disable VHF filter */</div><div class='add'>+		ret = fc0013_readreg(priv, 0x07, &amp;tmp);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+		ret = fc0013_writereg(priv, 0x07, tmp &amp; 0xef);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+</div><div class='add'>+		/* disable UHF &amp; enable GPS */</div><div class='add'>+		ret = fc0013_readreg(priv, 0x14, &amp;tmp);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+		ret = fc0013_writereg(priv, 0x14, (tmp &amp; 0x1f) | 0x20);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* select frequency divider and the frequency of VCO */</div><div class='add'>+	if (freq &lt; 37084) {		/* freq * 96 &lt; 3560000 */</div><div class='add'>+		multi = 96;</div><div class='add'>+		reg[5] = 0x82;</div><div class='add'>+		reg[6] = 0x00;</div><div class='add'>+	} else if (freq &lt; 55625) {	/* freq * 64 &lt; 3560000 */</div><div class='add'>+		multi = 64;</div><div class='add'>+		reg[5] = 0x02;</div><div class='add'>+		reg[6] = 0x02;</div><div class='add'>+	} else if (freq &lt; 74167) {	/* freq * 48 &lt; 3560000 */</div><div class='add'>+		multi = 48;</div><div class='add'>+		reg[5] = 0x42;</div><div class='add'>+		reg[6] = 0x00;</div><div class='add'>+	} else if (freq &lt; 111250) {	/* freq * 32 &lt; 3560000 */</div><div class='add'>+		multi = 32;</div><div class='add'>+		reg[5] = 0x82;</div><div class='add'>+		reg[6] = 0x02;</div><div class='add'>+	} else if (freq &lt; 148334) {	/* freq * 24 &lt; 3560000 */</div><div class='add'>+		multi = 24;</div><div class='add'>+		reg[5] = 0x22;</div><div class='add'>+		reg[6] = 0x00;</div><div class='add'>+	} else if (freq &lt; 222500) {	/* freq * 16 &lt; 3560000 */</div><div class='add'>+		multi = 16;</div><div class='add'>+		reg[5] = 0x42;</div><div class='add'>+		reg[6] = 0x02;</div><div class='add'>+	} else if (freq &lt; 296667) {	/* freq * 12 &lt; 3560000 */</div><div class='add'>+		multi = 12;</div><div class='add'>+		reg[5] = 0x12;</div><div class='add'>+		reg[6] = 0x00;</div><div class='add'>+	} else if (freq &lt; 445000) {	/* freq * 8 &lt; 3560000 */</div><div class='add'>+		multi = 8;</div><div class='add'>+		reg[5] = 0x22;</div><div class='add'>+		reg[6] = 0x02;</div><div class='add'>+	} else if (freq &lt; 593334) {	/* freq * 6 &lt; 3560000 */</div><div class='add'>+		multi = 6;</div><div class='add'>+		reg[5] = 0x0a;</div><div class='add'>+		reg[6] = 0x00;</div><div class='add'>+	} else if (freq &lt; 950000) {	/* freq * 4 &lt; 3800000 */</div><div class='add'>+		multi = 4;</div><div class='add'>+		reg[5] = 0x12;</div><div class='add'>+		reg[6] = 0x02;</div><div class='add'>+	} else {</div><div class='add'>+		multi = 2;</div><div class='add'>+		reg[5] = 0x0a;</div><div class='add'>+		reg[6] = 0x02;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	f_vco = freq * multi;</div><div class='add'>+</div><div class='add'>+	if (f_vco &gt;= 3060000) {</div><div class='add'>+		reg[6] |= 0x08;</div><div class='add'>+		vco_select = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (freq &gt;= 45000) {</div><div class='add'>+		/* From divided value (XDIV) determined the FA and FP value */</div><div class='add'>+		xdiv = (unsigned short)(f_vco / xtal_freq_khz_2);</div><div class='add'>+		if ((f_vco - xdiv * xtal_freq_khz_2) &gt;= (xtal_freq_khz_2 / 2))</div><div class='add'>+			xdiv++;</div><div class='add'>+</div><div class='add'>+		pm = (unsigned char)(xdiv / 8);</div><div class='add'>+		am = (unsigned char)(xdiv - (8 * pm));</div><div class='add'>+</div><div class='add'>+		if (am &lt; 2) {</div><div class='add'>+			reg[1] = am + 8;</div><div class='add'>+			reg[2] = pm - 1;</div><div class='add'>+		} else {</div><div class='add'>+			reg[1] = am;</div><div class='add'>+			reg[2] = pm;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* fix for frequency less than 45 MHz */</div><div class='add'>+		reg[1] = 0x06;</div><div class='add'>+		reg[2] = 0x11;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* fix clock out */</div><div class='add'>+	reg[6] |= 0x20;</div><div class='add'>+</div><div class='add'>+	/* From VCO frequency determines the XIN ( fractional part of Delta</div><div class='add'>+	   Sigma PLL) and divided value (XDIV) */</div><div class='add'>+	xin = (unsigned short)(f_vco - (f_vco / xtal_freq_khz_2) * xtal_freq_khz_2);</div><div class='add'>+	xin = (xin &lt;&lt; 15) / xtal_freq_khz_2;</div><div class='add'>+	if (xin &gt;= 16384)</div><div class='add'>+		xin += 32768;</div><div class='add'>+</div><div class='add'>+	reg[3] = xin &gt;&gt; 8;</div><div class='add'>+	reg[4] = xin &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	if (delsys == SYS_DVBT) {</div><div class='add'>+		reg[6] &amp;= 0x3f; /* bits 6 and 7 describe the bandwidth */</div><div class='add'>+		switch (p-&gt;bandwidth_hz) {</div><div class='add'>+		case 6000000:</div><div class='add'>+			reg[6] |= 0x80;</div><div class='add'>+			break;</div><div class='add'>+		case 7000000:</div><div class='add'>+			reg[6] |= 0x40;</div><div class='add'>+			break;</div><div class='add'>+		case 8000000:</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		err("%s: modulation type not supported!", __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* modified for Realtek demod */</div><div class='add'>+	reg[5] |= 0x07;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt;= 6; i++) {</div><div class='add'>+		ret = fc0013_writereg(priv, i, reg[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = fc0013_readreg(priv, 0x11, &amp;tmp);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+	if (multi == 64)</div><div class='add'>+		ret = fc0013_writereg(priv, 0x11, tmp | 0x04);</div><div class='add'>+	else</div><div class='add'>+		ret = fc0013_writereg(priv, 0x11, tmp &amp; 0xfb);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	/* VCO Calibration */</div><div class='add'>+	ret = fc0013_writereg(priv, 0x0e, 0x80);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = fc0013_writereg(priv, 0x0e, 0x00);</div><div class='add'>+</div><div class='add'>+	/* VCO Re-Calibration if needed */</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = fc0013_writereg(priv, 0x0e, 0x00);</div><div class='add'>+</div><div class='add'>+	if (!ret) {</div><div class='add'>+		msleep(10);</div><div class='add'>+		ret = fc0013_readreg(priv, 0x0e, &amp;tmp);</div><div class='add'>+	}</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	/* vco selection */</div><div class='add'>+	tmp &amp;= 0x3f;</div><div class='add'>+</div><div class='add'>+	if (vco_select) {</div><div class='add'>+		if (tmp &gt; 0x3c) {</div><div class='add'>+			reg[6] &amp;= ~0x08;</div><div class='add'>+			ret = fc0013_writereg(priv, 0x06, reg[6]);</div><div class='add'>+			if (!ret)</div><div class='add'>+				ret = fc0013_writereg(priv, 0x0e, 0x80);</div><div class='add'>+			if (!ret)</div><div class='add'>+				ret = fc0013_writereg(priv, 0x0e, 0x00);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (tmp &lt; 0x02) {</div><div class='add'>+			reg[6] |= 0x08;</div><div class='add'>+			ret = fc0013_writereg(priv, 0x06, reg[6]);</div><div class='add'>+			if (!ret)</div><div class='add'>+				ret = fc0013_writereg(priv, 0x0e, 0x80);</div><div class='add'>+			if (!ret)</div><div class='add'>+				ret = fc0013_writereg(priv, 0x0e, 0x00);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;frequency = p-&gt;frequency;</div><div class='add'>+	priv-&gt;bandwidth = p-&gt;bandwidth_hz;</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */</div><div class='add'>+	if (ret)</div><div class='add'>+		warn("%s: failed: %d", __func__, ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0013_get_frequency(struct dvb_frontend *fe, u32 *frequency)</div><div class='add'>+{</div><div class='add'>+	struct fc0013_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	*frequency = priv-&gt;frequency;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0013_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)</div><div class='add'>+{</div><div class='add'>+	/* always ? */</div><div class='add'>+	*frequency = 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fc0013_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)</div><div class='add'>+{</div><div class='add'>+	struct fc0013_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	*bandwidth = priv-&gt;bandwidth;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define INPUT_ADC_LEVEL	-8</div><div class='add'>+</div><div class='add'>+static int fc0013_get_rf_strength(struct dvb_frontend *fe, u16 *strength)</div><div class='add'>+{</div><div class='add'>+	struct fc0013_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned char tmp;</div><div class='add'>+	int int_temp, lna_gain, int_lna, tot_agc_gain, power;</div><div class='add'>+	const int fc0013_lna_gain_table[] = {</div><div class='add'>+		/* low gain */</div><div class='add'>+		-63, -58, -99, -73,</div><div class='add'>+		-63, -65, -54, -60,</div><div class='add'>+		/* middle gain */</div><div class='add'>+		 71,  70,  68,  67,</div><div class='add'>+		 65,  63,  61,  58,</div><div class='add'>+		/* high gain */</div><div class='add'>+		197, 191, 188, 186,</div><div class='add'>+		184, 182, 181, 179,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */</div><div class='add'>+</div><div class='add'>+	ret = fc0013_writereg(priv, 0x13, 0x00);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = fc0013_readreg(priv, 0x13, &amp;tmp);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+	int_temp = tmp;</div><div class='add'>+</div><div class='add'>+	ret = fc0013_readreg(priv, 0x14, &amp;tmp);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+	lna_gain = tmp &amp; 0x1f;</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */</div><div class='add'>+</div><div class='add'>+	if (lna_gain &lt; ARRAY_SIZE(fc0013_lna_gain_table)) {</div><div class='add'>+		int_lna = fc0013_lna_gain_table[lna_gain];</div><div class='add'>+		tot_agc_gain = (abs((int_temp &gt;&gt; 5) - 7) - 2 +</div><div class='add'>+				(int_temp &amp; 0x1f)) * 2;</div><div class='add'>+		power = INPUT_ADC_LEVEL - tot_agc_gain - int_lna / 10;</div><div class='add'>+</div><div class='add'>+		if (power &gt;= 45)</div><div class='add'>+			*strength = 255;	/* 100% */</div><div class='add'>+		else if (power &lt; -95)</div><div class='add'>+			*strength = 0;</div><div class='add'>+		else</div><div class='add'>+			*strength = (power + 95) * 255 / 140;</div><div class='add'>+</div><div class='add'>+		*strength |= *strength &lt;&lt; 8;</div><div class='add'>+	} else {</div><div class='add'>+		ret = -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	goto exit;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */</div><div class='add'>+exit:</div><div class='add'>+	if (ret)</div><div class='add'>+		warn("%s: failed: %d", __func__, ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dvb_tuner_ops fc0013_tuner_ops = {</div><div class='add'>+	.info = {</div><div class='add'>+		.name		= "Fitipower FC0013",</div><div class='add'>+</div><div class='add'>+		.frequency_min	= 37000000,	/* estimate */</div><div class='add'>+		.frequency_max	= 1680000000,	/* CHECK */</div><div class='add'>+		.frequency_step	= 0,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	.release	= fc0013_release,</div><div class='add'>+</div><div class='add'>+	.init		= fc0013_init,</div><div class='add'>+	.sleep		= fc0013_sleep,</div><div class='add'>+</div><div class='add'>+	.set_params	= fc0013_set_params,</div><div class='add'>+</div><div class='add'>+	.get_frequency	= fc0013_get_frequency,</div><div class='add'>+	.get_if_frequency = fc0013_get_if_frequency,</div><div class='add'>+	.get_bandwidth	= fc0013_get_bandwidth,</div><div class='add'>+</div><div class='add'>+	.get_rf_strength = fc0013_get_rf_strength,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dvb_frontend *fc0013_attach(struct dvb_frontend *fe,</div><div class='add'>+	struct i2c_adapter *i2c, u8 i2c_address, int dual_master,</div><div class='add'>+	enum fc001x_xtal_freq xtal_freq)</div><div class='add'>+{</div><div class='add'>+	struct fc0013_priv *priv = NULL;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(struct fc0013_priv), GFP_KERNEL);</div><div class='add'>+	if (priv == NULL)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	priv-&gt;i2c = i2c;</div><div class='add'>+	priv-&gt;dual_master = dual_master;</div><div class='add'>+	priv-&gt;addr = i2c_address;</div><div class='add'>+	priv-&gt;xtal_freq = xtal_freq;</div><div class='add'>+</div><div class='add'>+	info("Fitipower FC0013 successfully attached.");</div><div class='add'>+</div><div class='add'>+	fe-&gt;tuner_priv = priv;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;fe-&gt;ops.tuner_ops, &amp;fc0013_tuner_ops,</div><div class='add'>+		sizeof(struct dvb_tuner_ops));</div><div class='add'>+</div><div class='add'>+	return fe;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(fc0013_attach);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Fitipower FC0013 silicon tuner driver");</div><div class='add'>+MODULE_AUTHOR("Hans-Frieder Vogt &lt;hfvogt@gmx.net&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_VERSION("0.2");</div><div class='head'>diff --git a/drivers/media/common/tuners/fc0013.h b/drivers/media/common/tuners/fc0013.h<br/>new file mode 100644<br/>index 000000000000..594efd64aeec<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/fc0013.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc0013.h</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+/*</div><div class='add'>+ * Fitipower FC0013 tuner driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Hans-Frieder Vogt &lt;hfvogt@gmx.net&gt;</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License</div><div class='add'>+ *    along with this program; if not, write to the Free Software</div><div class='add'>+ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _FC0013_H_</div><div class='add'>+#define _FC0013_H_</div><div class='add'>+</div><div class='add'>+#include "dvb_frontend.h"</div><div class='add'>+#include "fc001x-common.h"</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MEDIA_TUNER_FC0013) || \</div><div class='add'>+	(defined(CONFIG_MEDIA_TUNER_FC0013_MODULE) &amp;&amp; defined(MODULE))</div><div class='add'>+extern struct dvb_frontend *fc0013_attach(struct dvb_frontend *fe,</div><div class='add'>+					struct i2c_adapter *i2c,</div><div class='add'>+					u8 i2c_address, int dual_master,</div><div class='add'>+					enum fc001x_xtal_freq xtal_freq);</div><div class='add'>+extern int fc0013_rc_cal_add(struct dvb_frontend *fe, int rc_val);</div><div class='add'>+extern int fc0013_rc_cal_reset(struct dvb_frontend *fe);</div><div class='add'>+#else</div><div class='add'>+static inline struct dvb_frontend *fc0013_attach(struct dvb_frontend *fe,</div><div class='add'>+					struct i2c_adapter *i2c,</div><div class='add'>+					u8 i2c_address, int dual_master,</div><div class='add'>+					enum fc001x_xtal_freq xtal_freq)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int fc0013_rc_cal_add(struct dvb_frontend *fe, int rc_val)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int fc0013_rc_cal_reset(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/media/common/tuners/fc001x-common.h b/drivers/media/common/tuners/fc001x-common.h<br/>new file mode 100644<br/>index 000000000000..718818156934<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/fc001x-common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/fc001x-common.h</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+/*</div><div class='add'>+ * Fitipower FC0012 &amp; FC0013 tuner driver - common defines</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Hans-Frieder Vogt &lt;hfvogt@gmx.net&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _FC001X_COMMON_H_</div><div class='add'>+#define _FC001X_COMMON_H_</div><div class='add'>+</div><div class='add'>+enum fc001x_xtal_freq {</div><div class='add'>+	FC_XTAL_27_MHZ,		/* 27000000 */</div><div class='add'>+	FC_XTAL_28_8_MHZ,	/* 28800000 */</div><div class='add'>+	FC_XTAL_36_MHZ,		/* 36000000 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * enum fc001x_fe_callback_commands - Frontend callbacks</div><div class='add'>+ *</div><div class='add'>+ * @FC_FE_CALLBACK_VHF_ENABLE: enable VHF or UHF</div><div class='add'>+ */</div><div class='add'>+enum fc001x_fe_callback_commands {</div><div class='add'>+	FC_FE_CALLBACK_VHF_ENABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/media/common/tuners/tua9001.c b/drivers/media/common/tuners/tua9001.c<br/>new file mode 100644<br/>index 000000000000..de2607084672<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/tua9001.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/tua9001.c</a></div><div class='hunk'>@@ -0,0 +1,215 @@</div><div class='add'>+/*</div><div class='add'>+ * Infineon TUA 9001 silicon tuner driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2009 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License along</div><div class='add'>+ *    with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "tua9001.h"</div><div class='add'>+#include "tua9001_priv.h"</div><div class='add'>+</div><div class='add'>+/* write register */</div><div class='add'>+static int tua9001_wr_reg(struct tua9001_priv *priv, u8 reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 buf[3] = { reg, (val &gt;&gt; 8) &amp; 0xff, (val &gt;&gt; 0) &amp; 0xff };</div><div class='add'>+	struct i2c_msg msg[1] = {</div><div class='add'>+		{</div><div class='add'>+			.addr = priv-&gt;cfg-&gt;i2c_addr,</div><div class='add'>+			.flags = 0,</div><div class='add'>+			.len = sizeof(buf),</div><div class='add'>+			.buf = buf,</div><div class='add'>+		}</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ret = i2c_transfer(priv-&gt;i2c, msg, 1);</div><div class='add'>+	if (ret == 1) {</div><div class='add'>+		ret = 0;</div><div class='add'>+	} else {</div><div class='add'>+		printk(KERN_WARNING "%s: I2C wr failed=%d reg=%02x\n",</div><div class='add'>+				__func__, ret, reg);</div><div class='add'>+		ret = -EREMOTEIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tua9001_release(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	kfree(fe-&gt;tuner_priv);</div><div class='add'>+	fe-&gt;tuner_priv = NULL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tua9001_init(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct tua9001_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u8 i;</div><div class='add'>+	struct reg_val data[] = {</div><div class='add'>+		{ 0x1e, 0x6512 },</div><div class='add'>+		{ 0x25, 0xb888 },</div><div class='add'>+		{ 0x39, 0x5460 },</div><div class='add'>+		{ 0x3b, 0x00c0 },</div><div class='add'>+		{ 0x3a, 0xf000 },</div><div class='add'>+		{ 0x08, 0x0000 },</div><div class='add'>+		{ 0x32, 0x0030 },</div><div class='add'>+		{ 0x41, 0x703a },</div><div class='add'>+		{ 0x40, 0x1c78 },</div><div class='add'>+		{ 0x2c, 0x1c00 },</div><div class='add'>+		{ 0x36, 0xc013 },</div><div class='add'>+		{ 0x37, 0x6f18 },</div><div class='add'>+		{ 0x27, 0x0008 },</div><div class='add'>+		{ 0x2a, 0x0001 },</div><div class='add'>+		{ 0x34, 0x0a40 },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 1); /* open i2c-gate */</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(data); i++) {</div><div class='add'>+		ret = tua9001_wr_reg(priv, data[i].reg, data[i].val);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 0); /* close i2c-gate */</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tua9001_set_params(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct tua9001_priv *priv = fe-&gt;tuner_priv;</div><div class='add'>+	struct dtv_frontend_properties *c = &amp;fe-&gt;dtv_property_cache;</div><div class='add'>+	int ret, i;</div><div class='add'>+	u16 val;</div><div class='add'>+	u32 frequency;</div><div class='add'>+	struct reg_val data[2];</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: delivery_system=%d frequency=%d bandwidth_hz=%d\n",</div><div class='add'>+			__func__, c-&gt;delivery_system, c-&gt;frequency,</div><div class='add'>+			c-&gt;bandwidth_hz);</div><div class='add'>+</div><div class='add'>+	switch (c-&gt;delivery_system) {</div><div class='add'>+	case SYS_DVBT:</div><div class='add'>+		switch (c-&gt;bandwidth_hz) {</div><div class='add'>+		case 8000000:</div><div class='add'>+			val  = 0x0000;</div><div class='add'>+			break;</div><div class='add'>+		case 7000000:</div><div class='add'>+			val  = 0x1000;</div><div class='add'>+			break;</div><div class='add'>+		case 6000000:</div><div class='add'>+			val  = 0x2000;</div><div class='add'>+			break;</div><div class='add'>+		case 5000000:</div><div class='add'>+			val  = 0x3000;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data[0].reg = 0x04;</div><div class='add'>+	data[0].val = val;</div><div class='add'>+</div><div class='add'>+	frequency = (c-&gt;frequency - 150000000);</div><div class='add'>+	frequency /= 100;</div><div class='add'>+	frequency *= 48;</div><div class='add'>+	frequency /= 10000;</div><div class='add'>+</div><div class='add'>+	data[1].reg = 0x1f;</div><div class='add'>+	data[1].val = frequency;</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 1); /* open i2c-gate */</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(data); i++) {</div><div class='add'>+		ret = tua9001_wr_reg(priv, data[i].reg, data[i].val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+		fe-&gt;ops.i2c_gate_ctrl(fe, 0); /* close i2c-gate */</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tua9001_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)</div><div class='add'>+{</div><div class='add'>+	*frequency = 0; /* Zero-IF */</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dvb_tuner_ops tua9001_tuner_ops = {</div><div class='add'>+	.info = {</div><div class='add'>+		.name           = "Infineon TUA 9001",</div><div class='add'>+</div><div class='add'>+		.frequency_min  = 170000000,</div><div class='add'>+		.frequency_max  = 862000000,</div><div class='add'>+		.frequency_step = 0,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	.release = tua9001_release,</div><div class='add'>+</div><div class='add'>+	.init = tua9001_init,</div><div class='add'>+	.set_params = tua9001_set_params,</div><div class='add'>+</div><div class='add'>+	.get_if_frequency = tua9001_get_if_frequency,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dvb_frontend *tua9001_attach(struct dvb_frontend *fe,</div><div class='add'>+		struct i2c_adapter *i2c, struct tua9001_config *cfg)</div><div class='add'>+{</div><div class='add'>+	struct tua9001_priv *priv = NULL;</div><div class='add'>+</div><div class='add'>+	priv = kzalloc(sizeof(struct tua9001_priv), GFP_KERNEL);</div><div class='add'>+	if (priv == NULL)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	priv-&gt;cfg = cfg;</div><div class='add'>+	priv-&gt;i2c = i2c;</div><div class='add'>+</div><div class='add'>+	printk(KERN_INFO "Infineon TUA 9001 successfully attached.");</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;fe-&gt;ops.tuner_ops, &amp;tua9001_tuner_ops,</div><div class='add'>+			sizeof(struct dvb_tuner_ops));</div><div class='add'>+</div><div class='add'>+	fe-&gt;tuner_priv = priv;</div><div class='add'>+	return fe;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(tua9001_attach);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Infineon TUA 9001 silicon tuner driver");</div><div class='add'>+MODULE_AUTHOR("Antti Palosaari &lt;crope@iki.fi&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/media/common/tuners/tua9001.h b/drivers/media/common/tuners/tua9001.h<br/>new file mode 100644<br/>index 000000000000..38d6ae76b1d6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/tua9001.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/tua9001.h</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+/*</div><div class='add'>+ * Infineon TUA 9001 silicon tuner driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2009 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License along</div><div class='add'>+ *    with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef TUA9001_H</div><div class='add'>+#define TUA9001_H</div><div class='add'>+</div><div class='add'>+#include "dvb_frontend.h"</div><div class='add'>+</div><div class='add'>+struct tua9001_config {</div><div class='add'>+	/*</div><div class='add'>+	 * I2C address</div><div class='add'>+	 */</div><div class='add'>+	u8 i2c_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MEDIA_TUNER_TUA9001) || \</div><div class='add'>+	(defined(CONFIG_MEDIA_TUNER_TUA9001_MODULE) &amp;&amp; defined(MODULE))</div><div class='add'>+extern struct dvb_frontend *tua9001_attach(struct dvb_frontend *fe,</div><div class='add'>+		struct i2c_adapter *i2c, struct tua9001_config *cfg);</div><div class='add'>+#else</div><div class='add'>+static inline struct dvb_frontend *tua9001_attach(struct dvb_frontend *fe,</div><div class='add'>+		struct i2c_adapter *i2c, struct tua9001_config *cfg)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/media/common/tuners/tua9001_priv.h b/drivers/media/common/tuners/tua9001_priv.h<br/>new file mode 100644<br/>index 000000000000..73cc1ce0575c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/tua9001_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/tua9001_priv.h</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+/*</div><div class='add'>+ * Infineon TUA 9001 silicon tuner driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2009 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License along</div><div class='add'>+ *    with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef TUA9001_PRIV_H</div><div class='add'>+#define TUA9001_PRIV_H</div><div class='add'>+</div><div class='add'>+struct reg_val {</div><div class='add'>+	u8 reg;</div><div class='add'>+	u16 val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tua9001_priv {</div><div class='add'>+	struct tua9001_config *cfg;</div><div class='add'>+	struct i2c_adapter *i2c;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/media/common/tuners/xc5000.c b/drivers/media/common/tuners/xc5000.c<br/>index eab2ea424200..dcca42ca57be 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/common/tuners/xc5000.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/common/tuners/xc5000.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/xc5000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/xc5000.c</a></div><div class='hunk'>@@ -54,7 +54,7 @@ struct xc5000_priv {</div><div class='ctx'> 	struct list_head hybrid_tuner_instance_list;</div><div class='ctx'> </div><div class='ctx'> 	u32 if_khz;</div><div class='del'>-	u32 xtal_khz;</div><div class='add'>+	u16 xtal_khz;</div><div class='ctx'> 	u32 freq_hz;</div><div class='ctx'> 	u32 bandwidth;</div><div class='ctx'> 	u8  video_standard;</div><div class='hunk'>@@ -631,7 +631,10 @@ static int xc5000_fwupload(struct dvb_frontend *fe)</div><div class='ctx'> 		ret = xc_load_i2c_sequence(fe,  fw-&gt;data);</div><div class='ctx'> 		if (XC_RESULT_SUCCESS == ret)</div><div class='ctx'> 			ret = xc_set_xtal(fe);</div><div class='del'>-		printk(KERN_INFO "xc5000: firmware upload complete...\n");</div><div class='add'>+		if (XC_RESULT_SUCCESS == ret)</div><div class='add'>+			printk(KERN_INFO "xc5000: firmware upload complete...\n");</div><div class='add'>+		else</div><div class='add'>+			printk(KERN_ERR "xc5000: firmware upload failed...\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='head'>diff --git a/drivers/media/common/tuners/xc5000.h b/drivers/media/common/tuners/xc5000.h<br/>index 39a73bf01406..b1a547494625 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/common/tuners/xc5000.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/common/tuners/xc5000.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/common/tuners/xc5000.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/common/tuners/xc5000.h</a></div><div class='hunk'>@@ -34,7 +34,7 @@ struct xc5000_config {</div><div class='ctx'> 	u8   i2c_address;</div><div class='ctx'> 	u32  if_khz;</div><div class='ctx'> 	u8   radio_input;</div><div class='del'>-	u32  xtal_khz;</div><div class='add'>+	u16  xtal_khz;</div><div class='ctx'> </div><div class='ctx'> 	int chip_id;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/media/dvb/bt8xx/dst_ca.c b/drivers/media/dvb/bt8xx/dst_ca.c<br/>index 48e48e8af55a..66f52f116b60 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/bt8xx/dst_ca.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/bt8xx/dst_ca.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/bt8xx/dst_ca.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/bt8xx/dst_ca.c</a></div><div class='hunk'>@@ -477,7 +477,6 @@ static int dst_check_ca_pmt(struct dst_state *state, struct ca_msg *p_ca_message</div><div class='ctx'> static int ca_send_message(struct dst_state *state, struct ca_msg *p_ca_message, void __user *arg)</div><div class='ctx'> {</div><div class='ctx'> 	int i = 0;</div><div class='del'>-	unsigned int ca_message_header_len;</div><div class='ctx'> </div><div class='ctx'> 	u32 command = 0;</div><div class='ctx'> 	struct ca_msg *hw_buffer;</div><div class='hunk'>@@ -496,7 +495,6 @@ static int ca_send_message(struct dst_state *state, struct ca_msg *p_ca_message,</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	if (p_ca_message-&gt;msg) {</div><div class='del'>-		ca_message_header_len = p_ca_message-&gt;length;	/*	Restore it back when you are done	*/</div><div class='ctx'> 		/*	EN50221 tag	*/</div><div class='ctx'> 		command = 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/dvb/ddbridge/ddbridge-core.c b/drivers/media/dvb/ddbridge/ddbridge-core.c<br/>index d88c4aa7d24d..131b938e9e81 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/ddbridge/ddbridge-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/ddbridge/ddbridge-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/ddbridge/ddbridge-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/ddbridge/ddbridge-core.c</a></div><div class='hunk'>@@ -31,7 +31,6 @@</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/pci_ids.h&gt;</div><div class='ctx'> #include &lt;linux/timer.h&gt;</div><div class='del'>-#include &lt;linux/version.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/swab.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='hunk'>@@ -1696,7 +1695,7 @@ static struct pci_driver ddb_pci_driver = {</div><div class='ctx'> 	.name        = "DDBridge",</div><div class='ctx'> 	.id_table    = ddb_id_tbl,</div><div class='ctx'> 	.probe       = ddb_probe,</div><div class='del'>-	.remove      = ddb_remove,</div><div class='add'>+	.remove      = __devexit_p(ddb_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __init int module_init_ddbridge(void)</div><div class='head'>diff --git a/drivers/media/dvb/dvb-core/dvb_demux.c b/drivers/media/dvb/dvb-core/dvb_demux.c<br/>index faa3671b649e..d82469f842e2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-core/dvb_demux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-core/dvb_demux.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-core/dvb_demux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-core/dvb_demux.c</a></div><div class='hunk'>@@ -568,6 +568,16 @@ void dvb_dmx_swfilter_204(struct dvb_demux *demux, const u8 *buf, size_t count)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dvb_dmx_swfilter_204);</div><div class='ctx'> </div><div class='add'>+void dvb_dmx_swfilter_raw(struct dvb_demux *demux, const u8 *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;demux-&gt;lock);</div><div class='add'>+</div><div class='add'>+	demux-&gt;feed-&gt;cb.ts(buf, count, NULL, 0, &amp;demux-&gt;feed-&gt;feed.ts, DMX_OK);</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;demux-&gt;lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(dvb_dmx_swfilter_raw);</div><div class='add'>+</div><div class='ctx'> static struct dvb_demux_filter *dvb_dmx_filter_alloc(struct dvb_demux *demux)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='head'>diff --git a/drivers/media/dvb/dvb-core/dvb_demux.h b/drivers/media/dvb/dvb-core/dvb_demux.h<br/>index a7d876fd02dd..fa7188a253aa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-core/dvb_demux.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-core/dvb_demux.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-core/dvb_demux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-core/dvb_demux.h</a></div><div class='hunk'>@@ -145,5 +145,7 @@ void dvb_dmx_swfilter_packets(struct dvb_demux *dvbdmx, const u8 *buf,</div><div class='ctx'> void dvb_dmx_swfilter(struct dvb_demux *demux, const u8 *buf, size_t count);</div><div class='ctx'> void dvb_dmx_swfilter_204(struct dvb_demux *demux, const u8 *buf,</div><div class='ctx'> 			  size_t count);</div><div class='add'>+void dvb_dmx_swfilter_raw(struct dvb_demux *demux, const u8 *buf,</div><div class='add'>+			  size_t count);</div><div class='ctx'> </div><div class='ctx'> #endif /* _DVB_DEMUX_H_ */</div><div class='head'>diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.c b/drivers/media/dvb/dvb-core/dvb_frontend.c<br/>index 0f64d7182657..aebcdf221dda 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-core/dvb_frontend.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-core/dvb_frontend.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-core/dvb_frontend.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-core/dvb_frontend.c</a></div><div class='hunk'>@@ -182,13 +182,13 @@ static enum dvbv3_emulation_type dvbv3_type(u32 delivery_system)</div><div class='ctx'> 	case SYS_DMBTH:</div><div class='ctx'> 		return DVBV3_OFDM;</div><div class='ctx'> 	case SYS_ATSC:</div><div class='add'>+	case SYS_ATSCMH:</div><div class='ctx'> 	case SYS_DVBC_ANNEX_B:</div><div class='ctx'> 		return DVBV3_ATSC;</div><div class='ctx'> 	case SYS_UNDEFINED:</div><div class='ctx'> 	case SYS_ISDBC:</div><div class='ctx'> 	case SYS_DVBH:</div><div class='ctx'> 	case SYS_DAB:</div><div class='del'>-	case SYS_ATSCMH:</div><div class='ctx'> 	default:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Doesn't know how to emulate those types and/or</div><div class='hunk'>@@ -1030,6 +1030,25 @@ static struct dtv_cmds_h dtv_cmds[DTV_MAX_COMMAND + 1] = {</div><div class='ctx'> 	_DTV_CMD(DTV_HIERARCHY, 0, 0),</div><div class='ctx'> </div><div class='ctx'> 	_DTV_CMD(DTV_ENUM_DELSYS, 0, 0),</div><div class='add'>+</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_PARADE_ID, 1, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_RS_FRAME_ENSEMBLE, 1, 0),</div><div class='add'>+</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_FIC_VER, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_PARADE_ID, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_NOG, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_TNOG, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_SGN, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_PRC, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_RS_FRAME_MODE, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_RS_FRAME_ENSEMBLE, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_RS_CODE_MODE_PRI, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_RS_CODE_MODE_SEC, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_SCCC_BLOCK_MODE, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_SCCC_CODE_MODE_A, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_SCCC_CODE_MODE_B, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_SCCC_CODE_MODE_C, 0, 0),</div><div class='add'>+	_DTV_CMD(DTV_ATSCMH_SCCC_CODE_MODE_D, 0, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void dtv_property_dump(struct dtv_property *tvp)</div><div class='hunk'>@@ -1121,6 +1140,8 @@ static int dtv_property_cache_sync(struct dvb_frontend *fe,</div><div class='ctx'> 	case DVBV3_ATSC:</div><div class='ctx'> 		dprintk("%s() Preparing ATSC req\n", __func__);</div><div class='ctx'> 		c-&gt;modulation = p-&gt;u.vsb.modulation;</div><div class='add'>+		if (c-&gt;delivery_system == SYS_ATSCMH)</div><div class='add'>+			break;</div><div class='ctx'> 		if ((c-&gt;modulation == VSB_8) || (c-&gt;modulation == VSB_16))</div><div class='ctx'> 			c-&gt;delivery_system = SYS_ATSC;</div><div class='ctx'> 		else</div><div class='hunk'>@@ -1367,6 +1388,54 @@ static int dtv_property_process_get(struct dvb_frontend *fe,</div><div class='ctx'> 	case DTV_DVBT2_PLP_ID:</div><div class='ctx'> 		tvp-&gt;u.data = c-&gt;dvbt2_plp_id;</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	/* ATSC-MH */</div><div class='add'>+	case DTV_ATSCMH_FIC_VER:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_fic_ver;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_PARADE_ID:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_parade_id;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_NOG:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_nog;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_TNOG:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_tnog;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_SGN:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_sgn;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_PRC:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_prc;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_RS_FRAME_MODE:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_rs_frame_mode;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_RS_FRAME_ENSEMBLE:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_rs_frame_ensemble;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_RS_CODE_MODE_PRI:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_rs_code_mode_pri;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_RS_CODE_MODE_SEC:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_rs_code_mode_sec;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_SCCC_BLOCK_MODE:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_sccc_block_mode;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_SCCC_CODE_MODE_A:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_sccc_code_mode_a;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_SCCC_CODE_MODE_B:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_sccc_code_mode_b;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_SCCC_CODE_MODE_C:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_sccc_code_mode_c;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_SCCC_CODE_MODE_D:</div><div class='add'>+		tvp-&gt;u.data = fe-&gt;dtv_property_cache.atscmh_sccc_code_mode_d;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1708,6 +1777,15 @@ static int dtv_property_process_set(struct dvb_frontend *fe,</div><div class='ctx'> 	case DTV_DVBT2_PLP_ID:</div><div class='ctx'> 		c-&gt;dvbt2_plp_id = tvp-&gt;u.data;</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	/* ATSC-MH */</div><div class='add'>+	case DTV_ATSCMH_PARADE_ID:</div><div class='add'>+		fe-&gt;dtv_property_cache.atscmh_parade_id = tvp-&gt;u.data;</div><div class='add'>+		break;</div><div class='add'>+	case DTV_ATSCMH_RS_FRAME_ENSEMBLE:</div><div class='add'>+		fe-&gt;dtv_property_cache.atscmh_rs_frame_ensemble = tvp-&gt;u.data;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1921,6 +1999,10 @@ static int dtv_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* default values */</div><div class='ctx'> 		switch (c-&gt;delivery_system) {</div><div class='add'>+		case SYS_DVBS:</div><div class='add'>+		case SYS_DVBS2:</div><div class='add'>+		case SYS_ISDBS:</div><div class='add'>+		case SYS_TURBO:</div><div class='ctx'> 		case SYS_DVBC_ANNEX_A:</div><div class='ctx'> 		case SYS_DVBC_ANNEX_C:</div><div class='ctx'> 			fepriv-&gt;min_delay = HZ / 20;</div><div class='head'>diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.h b/drivers/media/dvb/dvb-core/dvb_frontend.h<br/>index d63a8215fe03..e929d5697b87 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-core/dvb_frontend.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-core/dvb_frontend.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-core/dvb_frontend.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-core/dvb_frontend.h</a></div><div class='hunk'>@@ -372,6 +372,24 @@ struct dtv_frontend_properties {</div><div class='ctx'> </div><div class='ctx'> 	/* DVB-T2 specifics */</div><div class='ctx'> 	u32                     dvbt2_plp_id;</div><div class='add'>+</div><div class='add'>+	/* ATSC-MH specifics */</div><div class='add'>+	u8			atscmh_fic_ver;</div><div class='add'>+	u8			atscmh_parade_id;</div><div class='add'>+	u8			atscmh_nog;</div><div class='add'>+	u8			atscmh_tnog;</div><div class='add'>+	u8			atscmh_sgn;</div><div class='add'>+	u8			atscmh_prc;</div><div class='add'>+</div><div class='add'>+	u8			atscmh_rs_frame_mode;</div><div class='add'>+	u8			atscmh_rs_frame_ensemble;</div><div class='add'>+	u8			atscmh_rs_code_mode_pri;</div><div class='add'>+	u8			atscmh_rs_code_mode_sec;</div><div class='add'>+	u8			atscmh_sccc_block_mode;</div><div class='add'>+	u8			atscmh_sccc_code_mode_a;</div><div class='add'>+	u8			atscmh_sccc_code_mode_b;</div><div class='add'>+	u8			atscmh_sccc_code_mode_c;</div><div class='add'>+	u8			atscmh_sccc_code_mode_d;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dvb_frontend {</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig<br/>index 63bf45679f98..a26949336b3d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/Kconfig</a></div><div class='hunk'>@@ -409,6 +409,7 @@ config DVB_USB_MXL111SF</div><div class='ctx'> 	tristate "MxL111SF DTV USB2.0 support"</div><div class='ctx'> 	depends on DVB_USB</div><div class='ctx'> 	select DVB_LGDT3305 if !DVB_FE_CUSTOMISE</div><div class='add'>+	select DVB_LG2160 if !DVB_FE_CUSTOMISE</div><div class='ctx'> 	select VIDEO_TVEEPROM</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here to support the MxL111SF USB2.0 DTV receiver.</div><div class='hunk'>@@ -422,3 +423,15 @@ config DVB_USB_RTL28XXU</div><div class='ctx'> 	select MEDIA_TUNER_MXL5005S if !MEDIA_TUNER_CUSTOMISE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here to support the Realtek RTL28xxU DVB USB receiver.</div><div class='add'>+</div><div class='add'>+config DVB_USB_AF9035</div><div class='add'>+	tristate "Afatech AF9035 DVB-T USB2.0 support"</div><div class='add'>+	depends on DVB_USB</div><div class='add'>+	select DVB_AF9033</div><div class='add'>+	select MEDIA_TUNER_TUA9001 if !MEDIA_TUNER_CUSTOMISE</div><div class='add'>+	select MEDIA_TUNER_FC0011 if !MEDIA_TUNER_CUSTOMISE</div><div class='add'>+	select MEDIA_TUNER_MXL5007T if !MEDIA_TUNER_CUSTOMISE</div><div class='add'>+	select MEDIA_TUNER_TDA18218 if !MEDIA_TUNER_CUSTOMISE</div><div class='add'>+	help</div><div class='add'>+	  Say Y here to support the Afatech AF9035 based DVB USB receiver.</div><div class='add'>+</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/Makefile b/drivers/media/dvb/dvb-usb/Makefile<br/>index b76acb5387e6..b667ac39a4e3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/Makefile</a></div><div class='hunk'>@@ -110,6 +110,9 @@ obj-$(CONFIG_DVB_USB_MXL111SF) += mxl111sf-tuner.o</div><div class='ctx'> dvb-usb-rtl28xxu-objs = rtl28xxu.o</div><div class='ctx'> obj-$(CONFIG_DVB_USB_RTL28XXU) += dvb-usb-rtl28xxu.o</div><div class='ctx'> </div><div class='add'>+dvb-usb-af9035-objs = af9035.o</div><div class='add'>+obj-$(CONFIG_DVB_USB_AF9035) += dvb-usb-af9035.o</div><div class='add'>+</div><div class='ctx'> ccflags-y += -I$(srctree)/drivers/media/dvb/dvb-core</div><div class='ctx'> ccflags-y += -I$(srctree)/drivers/media/dvb/frontends/</div><div class='ctx'> # due to tuner-xc3028</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/af9015.c b/drivers/media/dvb/dvb-usb/af9015.c<br/>index 7e70ea50ef26..677fed79b01e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/af9015.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/af9015.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/af9015.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/af9015.c</a></div><div class='hunk'>@@ -244,8 +244,7 @@ static int af9015_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 	u8 uninitialized_var(mbox), addr_len;</div><div class='ctx'> 	struct req_t req;</div><div class='ctx'> </div><div class='del'>-/* TODO: implement bus lock</div><div class='del'>-</div><div class='add'>+/*</div><div class='ctx'> The bus lock is needed because there is two tuners both using same I2C-address.</div><div class='ctx'> Due to that the only way to select correct tuner is use demodulator I2C-gate.</div><div class='ctx'> </div><div class='hunk'>@@ -789,7 +788,7 @@ static void af9015_set_remote_config(struct usb_device *udev,</div><div class='ctx'> 	/* try to load remote based USB ID */</div><div class='ctx'> 	if (!props-&gt;rc.core.rc_codes)</div><div class='ctx'> 		props-&gt;rc.core.rc_codes = af9015_rc_setup_match(</div><div class='del'>-			(vid &lt;&lt; 16) + pid, af9015_rc_setup_usbids);</div><div class='add'>+			(vid &lt;&lt; 16) | pid, af9015_rc_setup_usbids);</div><div class='ctx'> </div><div class='ctx'> 	/* try to load remote based USB iManufacturer string */</div><div class='ctx'> 	if (!props-&gt;rc.core.rc_codes &amp;&amp; vid == USB_VID_AFATECH) {</div><div class='hunk'>@@ -1220,8 +1219,8 @@ static int af9015_af9013_frontend_attach(struct dvb_usb_adapter *adap)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* attach demodulator */</div><div class='del'>-	adap-&gt;fe_adap[0].fe = dvb_attach(af9013_attach, &amp;af9015_af9013_config[adap-&gt;id],</div><div class='del'>-		&amp;adap-&gt;dev-&gt;i2c_adap);</div><div class='add'>+	adap-&gt;fe_adap[0].fe = dvb_attach(af9013_attach,</div><div class='add'>+		&amp;af9015_af9013_config[adap-&gt;id], &amp;adap-&gt;dev-&gt;i2c_adap);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * AF9015 firmware does not like if it gets interrupted by I2C adapter</div><div class='hunk'>@@ -1324,14 +1323,15 @@ static int af9015_tuner_attach(struct dvb_usb_adapter *adap)</div><div class='ctx'> 	switch (af9015_af9013_config[adap-&gt;id].tuner) {</div><div class='ctx'> 	case AF9013_TUNER_MT2060:</div><div class='ctx'> 	case AF9013_TUNER_MT2060_2:</div><div class='del'>-		ret = dvb_attach(mt2060_attach, adap-&gt;fe_adap[0].fe, &amp;adap-&gt;dev-&gt;i2c_adap,</div><div class='del'>-			&amp;af9015_mt2060_config,</div><div class='add'>+		ret = dvb_attach(mt2060_attach, adap-&gt;fe_adap[0].fe,</div><div class='add'>+			&amp;adap-&gt;dev-&gt;i2c_adap, &amp;af9015_mt2060_config,</div><div class='ctx'> 			af9015_config.mt2060_if1[adap-&gt;id])</div><div class='ctx'> 			== NULL ? -ENODEV : 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AF9013_TUNER_QT1010:</div><div class='ctx'> 	case AF9013_TUNER_QT1010A:</div><div class='del'>-		ret = dvb_attach(qt1010_attach, adap-&gt;fe_adap[0].fe, &amp;adap-&gt;dev-&gt;i2c_adap,</div><div class='add'>+		ret = dvb_attach(qt1010_attach, adap-&gt;fe_adap[0].fe,</div><div class='add'>+			&amp;adap-&gt;dev-&gt;i2c_adap,</div><div class='ctx'> 			&amp;af9015_qt1010_config) == NULL ? -ENODEV : 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AF9013_TUNER_TDA18271:</div><div class='hunk'>@@ -1434,69 +1434,85 @@ enum af9015_usb_table_entry {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct usb_device_id af9015_usb_table[] = {</div><div class='del'>-	[AFATECH_9015] =</div><div class='del'>-		{USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9015_9015)},</div><div class='del'>-	[AFATECH_9016] =</div><div class='del'>-		{USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9015_9016)},</div><div class='del'>-	[WINFAST_DTV_GOLD] =</div><div class='del'>-		{USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_GOLD)},</div><div class='del'>-	[PINNACLE_PCTV_71E] =</div><div class='del'>-		{USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV71E)},</div><div class='del'>-	[KWORLD_PLUSTV_399U] =</div><div class='del'>-		{USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_399U)},</div><div class='del'>-	[TINYTWIN] = {USB_DEVICE(USB_VID_VISIONPLUS, USB_PID_TINYTWIN)},</div><div class='del'>-	[AZUREWAVE_TU700] =</div><div class='del'>-		{USB_DEVICE(USB_VID_VISIONPLUS, USB_PID_AZUREWAVE_AD_TU700)},</div><div class='del'>-	[TERRATEC_AF9015] = {USB_DEVICE(USB_VID_TERRATEC,</div><div class='add'>+	[AFATECH_9015] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9015_9015)},</div><div class='add'>+	[AFATECH_9016] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9015_9016)},</div><div class='add'>+	[WINFAST_DTV_GOLD] = {</div><div class='add'>+		USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_GOLD)},</div><div class='add'>+	[PINNACLE_PCTV_71E] = {</div><div class='add'>+		USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV71E)},</div><div class='add'>+	[KWORLD_PLUSTV_399U] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_399U)},</div><div class='add'>+	[TINYTWIN] = {</div><div class='add'>+		USB_DEVICE(USB_VID_VISIONPLUS, USB_PID_TINYTWIN)},</div><div class='add'>+	[AZUREWAVE_TU700] = {</div><div class='add'>+		USB_DEVICE(USB_VID_VISIONPLUS, USB_PID_AZUREWAVE_AD_TU700)},</div><div class='add'>+	[TERRATEC_AF9015] = {</div><div class='add'>+		USB_DEVICE(USB_VID_TERRATEC,</div><div class='ctx'> 				USB_PID_TERRATEC_CINERGY_T_USB_XE_REV2)},</div><div class='del'>-	[KWORLD_PLUSTV_PC160] =</div><div class='del'>-		{USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_PC160_2T)},</div><div class='del'>-	[AVERTV_VOLAR_X] =</div><div class='del'>-		{USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_X)},</div><div class='del'>-	[XTENSIONS_380U] =</div><div class='del'>-		{USB_DEVICE(USB_VID_XTENSIONS, USB_PID_XTENSIONS_XD_380)},</div><div class='del'>-	[MSI_DIGIVOX_DUO] =</div><div class='del'>-		{USB_DEVICE(USB_VID_MSI_2, USB_PID_MSI_DIGIVOX_DUO)},</div><div class='del'>-	[AVERTV_VOLAR_X_REV2] =</div><div class='del'>-		{USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_X_2)},</div><div class='del'>-	[TELESTAR_STARSTICK_2] =</div><div class='del'>-		{USB_DEVICE(USB_VID_TELESTAR,  USB_PID_TELESTAR_STARSTICK_2)},</div><div class='del'>-	[AVERMEDIA_A309_USB] =</div><div class='del'>-		{USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A309)},</div><div class='del'>-	[MSI_DIGIVOX_MINI_III] =</div><div class='del'>-		{USB_DEVICE(USB_VID_MSI_2, USB_PID_MSI_DIGI_VOX_MINI_III)},</div><div class='del'>-	[KWORLD_E396] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U)},</div><div class='del'>-	[KWORLD_E39B] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_2)},</div><div class='del'>-	[KWORLD_E395] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_3)},</div><div class='del'>-	[TREKSTOR_DVBT] = {USB_DEVICE(USB_VID_AFATECH, USB_PID_TREKSTOR_DVBT)},</div><div class='del'>-	[AVERTV_A850] = {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A850)},</div><div class='del'>-	[AVERTV_A805] = {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A805)},</div><div class='del'>-	[CONCEPTRONIC_CTVDIGRCU] =</div><div class='del'>-		{USB_DEVICE(USB_VID_KWORLD_2, USB_PID_CONCEPTRONIC_CTVDIGRCU)},</div><div class='del'>-	[KWORLD_MC810] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_MC810)},</div><div class='del'>-	[GENIUS_TVGO_DVB_T03] =</div><div class='del'>-		{USB_DEVICE(USB_VID_KYE, USB_PID_GENIUS_TVGO_DVB_T03)},</div><div class='del'>-	[KWORLD_399U_2] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_399U_2)},</div><div class='del'>-	[KWORLD_PC160_T] =</div><div class='del'>-		{USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_PC160_T)},</div><div class='del'>-	[SVEON_STV20] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_SVEON_STV20)},</div><div class='del'>-	[TINYTWIN_2] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_TINYTWIN_2)},</div><div class='del'>-	[WINFAST_DTV2000DS] =</div><div class='del'>-		{USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV2000DS)},</div><div class='del'>-	[KWORLD_UB383_T] =</div><div class='del'>-		{USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_UB383_T)},</div><div class='del'>-	[KWORLD_E39A] =</div><div class='del'>-		{USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_4)},</div><div class='del'>-	[AVERMEDIA_A815M] =</div><div class='del'>-		{USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A815M)},</div><div class='del'>-	[CINERGY_T_STICK_RC] = {USB_DEVICE(USB_VID_TERRATEC,</div><div class='add'>+	[KWORLD_PLUSTV_PC160] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_PC160_2T)},</div><div class='add'>+	[AVERTV_VOLAR_X] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_X)},</div><div class='add'>+	[XTENSIONS_380U] = {</div><div class='add'>+		USB_DEVICE(USB_VID_XTENSIONS, USB_PID_XTENSIONS_XD_380)},</div><div class='add'>+	[MSI_DIGIVOX_DUO] = {</div><div class='add'>+		USB_DEVICE(USB_VID_MSI_2, USB_PID_MSI_DIGIVOX_DUO)},</div><div class='add'>+	[AVERTV_VOLAR_X_REV2] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_X_2)},</div><div class='add'>+	[TELESTAR_STARSTICK_2] = {</div><div class='add'>+		USB_DEVICE(USB_VID_TELESTAR,  USB_PID_TELESTAR_STARSTICK_2)},</div><div class='add'>+	[AVERMEDIA_A309_USB] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A309)},</div><div class='add'>+	[MSI_DIGIVOX_MINI_III] = {</div><div class='add'>+		USB_DEVICE(USB_VID_MSI_2, USB_PID_MSI_DIGI_VOX_MINI_III)},</div><div class='add'>+	[KWORLD_E396] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U)},</div><div class='add'>+	[KWORLD_E39B] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_2)},</div><div class='add'>+	[KWORLD_E395] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_3)},</div><div class='add'>+	[TREKSTOR_DVBT] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AFATECH, USB_PID_TREKSTOR_DVBT)},</div><div class='add'>+	[AVERTV_A850] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A850)},</div><div class='add'>+	[AVERTV_A805] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A805)},</div><div class='add'>+	[CONCEPTRONIC_CTVDIGRCU] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_CONCEPTRONIC_CTVDIGRCU)},</div><div class='add'>+	[KWORLD_MC810] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_MC810)},</div><div class='add'>+	[GENIUS_TVGO_DVB_T03] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KYE, USB_PID_GENIUS_TVGO_DVB_T03)},</div><div class='add'>+	[KWORLD_399U_2] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_399U_2)},</div><div class='add'>+	[KWORLD_PC160_T] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_PC160_T)},</div><div class='add'>+	[SVEON_STV20] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_SVEON_STV20)},</div><div class='add'>+	[TINYTWIN_2] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_TINYTWIN_2)},</div><div class='add'>+	[WINFAST_DTV2000DS] = {</div><div class='add'>+		USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV2000DS)},</div><div class='add'>+	[KWORLD_UB383_T] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_UB383_T)},</div><div class='add'>+	[KWORLD_E39A] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_4)},</div><div class='add'>+	[AVERMEDIA_A815M] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A815M)},</div><div class='add'>+	[CINERGY_T_STICK_RC] = {</div><div class='add'>+		USB_DEVICE(USB_VID_TERRATEC,</div><div class='ctx'> 				USB_PID_TERRATEC_CINERGY_T_STICK_RC)},</div><div class='del'>-	[CINERGY_T_DUAL_RC] = {USB_DEVICE(USB_VID_TERRATEC,</div><div class='add'>+	[CINERGY_T_DUAL_RC] = {</div><div class='add'>+		USB_DEVICE(USB_VID_TERRATEC,</div><div class='ctx'> 				USB_PID_TERRATEC_CINERGY_T_STICK_DUAL_RC)},</div><div class='del'>-	[AVERTV_A850T] =</div><div class='del'>-		{USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A850T)},</div><div class='del'>-	[TINYTWIN_3] = {USB_DEVICE(USB_VID_GTEK, USB_PID_TINYTWIN_3)},</div><div class='del'>-	[SVEON_STV22] = {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_SVEON_STV22)},</div><div class='add'>+	[AVERTV_A850T] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A850T)},</div><div class='add'>+	[TINYTWIN_3] = {</div><div class='add'>+		USB_DEVICE(USB_VID_GTEK, USB_PID_TINYTWIN_3)},</div><div class='add'>+	[SVEON_STV22] = {</div><div class='add'>+		USB_DEVICE(USB_VID_KWORLD_2, USB_PID_SVEON_STV22)},</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(usb, af9015_usb_table);</div><div class='hunk'>@@ -1516,43 +1532,44 @@ static struct dvb_usb_device_properties af9015_properties[] = {</div><div class='ctx'> 		.num_adapters = 2,</div><div class='ctx'> 		.adapter = {</div><div class='ctx'> 			{</div><div class='del'>-			.num_frontends = 1,</div><div class='del'>-			.fe = {{</div><div class='del'>-				.caps = DVB_USB_ADAP_HAS_PID_FILTER |</div><div class='del'>-				DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,</div><div class='del'>-</div><div class='del'>-				.pid_filter_count = 32,</div><div class='del'>-				.pid_filter       = af9015_pid_filter,</div><div class='del'>-				.pid_filter_ctrl  = af9015_pid_filter_ctrl,</div><div class='del'>-</div><div class='del'>-				.frontend_attach =</div><div class='del'>-					af9015_af9013_frontend_attach,</div><div class='del'>-				.tuner_attach    = af9015_tuner_attach,</div><div class='del'>-				.stream = {</div><div class='del'>-					.type = USB_BULK,</div><div class='del'>-					.count = 6,</div><div class='del'>-					.endpoint = 0x84,</div><div class='add'>+				.num_frontends = 1,</div><div class='add'>+				.fe = {</div><div class='add'>+					{</div><div class='add'>+						.caps = DVB_USB_ADAP_HAS_PID_FILTER |</div><div class='add'>+							DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,</div><div class='add'>+</div><div class='add'>+						.pid_filter_count = 32,</div><div class='add'>+						.pid_filter       = af9015_pid_filter,</div><div class='add'>+						.pid_filter_ctrl  = af9015_pid_filter_ctrl,</div><div class='add'>+</div><div class='add'>+						.frontend_attach = af9015_af9013_frontend_attach,</div><div class='add'>+						.tuner_attach    = af9015_tuner_attach,</div><div class='add'>+						.stream = {</div><div class='add'>+							.type = USB_BULK,</div><div class='add'>+							.count = 6,</div><div class='add'>+							.endpoint = 0x84,</div><div class='add'>+						},</div><div class='add'>+					}</div><div class='ctx'> 				},</div><div class='del'>-			}},</div><div class='ctx'> 			},</div><div class='ctx'> 			{</div><div class='del'>-			.num_frontends = 1,</div><div class='del'>-			.fe = {{</div><div class='del'>-				.frontend_attach =</div><div class='del'>-					af9015_af9013_frontend_attach,</div><div class='del'>-				.tuner_attach    = af9015_tuner_attach,</div><div class='del'>-				.stream = {</div><div class='del'>-					.type = USB_BULK,</div><div class='del'>-					.count = 6,</div><div class='del'>-					.endpoint = 0x85,</div><div class='del'>-					.u = {</div><div class='del'>-						.bulk = {</div><div class='del'>-							.buffersize =</div><div class='del'>-						TS_USB20_FRAME_SIZE,</div><div class='del'>-						}</div><div class='add'>+				.num_frontends = 1,</div><div class='add'>+				.fe = {</div><div class='add'>+					{</div><div class='add'>+						.frontend_attach = af9015_af9013_frontend_attach,</div><div class='add'>+						.tuner_attach    = af9015_tuner_attach,</div><div class='add'>+						.stream = {</div><div class='add'>+							.type = USB_BULK,</div><div class='add'>+							.count = 6,</div><div class='add'>+							.endpoint = 0x85,</div><div class='add'>+							.u = {</div><div class='add'>+								.bulk = {</div><div class='add'>+									.buffersize = TS_USB20_FRAME_SIZE,</div><div class='add'>+								}</div><div class='add'>+							}</div><div class='add'>+						},</div><div class='ctx'> 					}</div><div class='ctx'> 				},</div><div class='del'>-			}},</div><div class='ctx'> 			}</div><div class='ctx'> 		},</div><div class='ctx'> </div><div class='hunk'>@@ -1575,102 +1592,67 @@ static struct dvb_usb_device_properties af9015_properties[] = {</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[AFATECH_9015],</div><div class='ctx'> 					&amp;af9015_usb_table[AFATECH_9016],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "Leadtek WinFast DTV Dongle Gold",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[WINFAST_DTV_GOLD],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "Pinnacle PCTV 71e",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[PINNACLE_PCTV_71E],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "KWorld PlusTV Dual DVB-T Stick " \</div><div class='ctx'> 					"(DVB-T 399U)",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[KWORLD_PLUSTV_399U],</div><div class='ctx'> 					&amp;af9015_usb_table[KWORLD_399U_2],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "DigitalNow TinyTwin DVB-T Receiver",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[TINYTWIN],</div><div class='ctx'> 					&amp;af9015_usb_table[TINYTWIN_2],</div><div class='ctx'> 					&amp;af9015_usb_table[TINYTWIN_3],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "TwinHan AzureWave AD-TU700(704J)",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[AZUREWAVE_TU700],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "TerraTec Cinergy T USB XE",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[TERRATEC_AF9015],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "KWorld PlusTV Dual DVB-T PCI " \</div><div class='ctx'> 					"(DVB-T PC160-2T)",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[KWORLD_PLUSTV_PC160],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "AVerMedia AVerTV DVB-T Volar X",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[AVERTV_VOLAR_X],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "TerraTec Cinergy T Stick RC",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[CINERGY_T_STICK_RC],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "TerraTec Cinergy T Stick Dual RC",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[CINERGY_T_DUAL_RC],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "AverMedia AVerTV Red HD+ (A850T)",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[AVERTV_A850T],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='ctx'> 			},</div><div class='ctx'> 		}</div><div class='ctx'> 	}, {</div><div class='hunk'>@@ -1686,43 +1668,44 @@ static struct dvb_usb_device_properties af9015_properties[] = {</div><div class='ctx'> 		.num_adapters = 2,</div><div class='ctx'> 		.adapter = {</div><div class='ctx'> 			{</div><div class='del'>-			.num_frontends = 1,</div><div class='del'>-			.fe = {{</div><div class='del'>-				.caps = DVB_USB_ADAP_HAS_PID_FILTER |</div><div class='del'>-				DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,</div><div class='del'>-</div><div class='del'>-				.pid_filter_count = 32,</div><div class='del'>-				.pid_filter       = af9015_pid_filter,</div><div class='del'>-				.pid_filter_ctrl  = af9015_pid_filter_ctrl,</div><div class='del'>-</div><div class='del'>-				.frontend_attach =</div><div class='del'>-					af9015_af9013_frontend_attach,</div><div class='del'>-				.tuner_attach    = af9015_tuner_attach,</div><div class='del'>-				.stream = {</div><div class='del'>-					.type = USB_BULK,</div><div class='del'>-					.count = 6,</div><div class='del'>-					.endpoint = 0x84,</div><div class='add'>+				.num_frontends = 1,</div><div class='add'>+				.fe = {</div><div class='add'>+					{</div><div class='add'>+						.caps = DVB_USB_ADAP_HAS_PID_FILTER |</div><div class='add'>+							DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,</div><div class='add'>+</div><div class='add'>+						.pid_filter_count = 32,</div><div class='add'>+						.pid_filter       = af9015_pid_filter,</div><div class='add'>+						.pid_filter_ctrl  = af9015_pid_filter_ctrl,</div><div class='add'>+</div><div class='add'>+						.frontend_attach = af9015_af9013_frontend_attach,</div><div class='add'>+						.tuner_attach    = af9015_tuner_attach,</div><div class='add'>+						.stream = {</div><div class='add'>+							.type = USB_BULK,</div><div class='add'>+							.count = 6,</div><div class='add'>+							.endpoint = 0x84,</div><div class='add'>+						},</div><div class='add'>+					}</div><div class='ctx'> 				},</div><div class='del'>-			}},</div><div class='ctx'> 			},</div><div class='ctx'> 			{</div><div class='del'>-			.num_frontends = 1,</div><div class='del'>-			.fe = {{</div><div class='del'>-				.frontend_attach =</div><div class='del'>-					af9015_af9013_frontend_attach,</div><div class='del'>-				.tuner_attach    = af9015_tuner_attach,</div><div class='del'>-				.stream = {</div><div class='del'>-					.type = USB_BULK,</div><div class='del'>-					.count = 6,</div><div class='del'>-					.endpoint = 0x85,</div><div class='del'>-					.u = {</div><div class='del'>-						.bulk = {</div><div class='del'>-							.buffersize =</div><div class='del'>-						TS_USB20_FRAME_SIZE,</div><div class='del'>-						}</div><div class='add'>+				.num_frontends = 1,</div><div class='add'>+				.fe = {</div><div class='add'>+					{</div><div class='add'>+						.frontend_attach = af9015_af9013_frontend_attach,</div><div class='add'>+						.tuner_attach    = af9015_tuner_attach,</div><div class='add'>+						.stream = {</div><div class='add'>+							.type = USB_BULK,</div><div class='add'>+							.count = 6,</div><div class='add'>+							.endpoint = 0x85,</div><div class='add'>+							.u = {</div><div class='add'>+								.bulk = {</div><div class='add'>+									.buffersize = TS_USB20_FRAME_SIZE,</div><div class='add'>+								}</div><div class='add'>+							}</div><div class='add'>+						},</div><div class='ctx'> 					}</div><div class='ctx'> 				},</div><div class='del'>-			}},</div><div class='ctx'> 			}</div><div class='ctx'> 		},</div><div class='ctx'> </div><div class='hunk'>@@ -1744,51 +1727,33 @@ static struct dvb_usb_device_properties af9015_properties[] = {</div><div class='ctx'> 				.name = "Xtensions XD-380",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[XTENSIONS_380U],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "MSI DIGIVOX Duo",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[MSI_DIGIVOX_DUO],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "Fujitsu-Siemens Slim Mobile USB DVB-T",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[AVERTV_VOLAR_X_REV2],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "Telestar Starstick 2",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[TELESTAR_STARSTICK_2],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "AVerMedia A309",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[AVERMEDIA_A309_USB],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "MSI Digi VOX mini III",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[MSI_DIGIVOX_MINI_III],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "KWorld USB DVB-T TV Stick II " \</div><div class='ctx'> 					"(VS-DVB-T 395U)",</div><div class='ctx'> 				.cold_ids = {</div><div class='hunk'>@@ -1796,34 +1761,23 @@ static struct dvb_usb_device_properties af9015_properties[] = {</div><div class='ctx'> 					&amp;af9015_usb_table[KWORLD_E39B],</div><div class='ctx'> 					&amp;af9015_usb_table[KWORLD_E395],</div><div class='ctx'> 					&amp;af9015_usb_table[KWORLD_E39A],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "TrekStor DVB-T USB Stick",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[TREKSTOR_DVBT],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "AverMedia AVerTV Volar Black HD " \</div><div class='ctx'> 					"(A850)",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[AVERTV_A850],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "Sveon STV22 Dual USB DVB-T Tuner HDTV",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[SVEON_STV22],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='ctx'> 			},</div><div class='ctx'> 		}</div><div class='ctx'> 	}, {</div><div class='hunk'>@@ -1839,43 +1793,44 @@ static struct dvb_usb_device_properties af9015_properties[] = {</div><div class='ctx'> 		.num_adapters = 2,</div><div class='ctx'> 		.adapter = {</div><div class='ctx'> 			{</div><div class='del'>-			.num_frontends = 1,</div><div class='del'>-			.fe = {{</div><div class='del'>-				.caps = DVB_USB_ADAP_HAS_PID_FILTER |</div><div class='del'>-				DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,</div><div class='del'>-</div><div class='del'>-				.pid_filter_count = 32,</div><div class='del'>-				.pid_filter       = af9015_pid_filter,</div><div class='del'>-				.pid_filter_ctrl  = af9015_pid_filter_ctrl,</div><div class='del'>-</div><div class='del'>-				.frontend_attach =</div><div class='del'>-					af9015_af9013_frontend_attach,</div><div class='del'>-				.tuner_attach    = af9015_tuner_attach,</div><div class='del'>-				.stream = {</div><div class='del'>-					.type = USB_BULK,</div><div class='del'>-					.count = 6,</div><div class='del'>-					.endpoint = 0x84,</div><div class='add'>+				.num_frontends = 1,</div><div class='add'>+				.fe = {</div><div class='add'>+					{</div><div class='add'>+						.caps = DVB_USB_ADAP_HAS_PID_FILTER |</div><div class='add'>+							DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,</div><div class='add'>+</div><div class='add'>+						.pid_filter_count = 32,</div><div class='add'>+						.pid_filter       = af9015_pid_filter,</div><div class='add'>+						.pid_filter_ctrl  = af9015_pid_filter_ctrl,</div><div class='add'>+</div><div class='add'>+						.frontend_attach = af9015_af9013_frontend_attach,</div><div class='add'>+						.tuner_attach    = af9015_tuner_attach,</div><div class='add'>+						.stream = {</div><div class='add'>+							.type = USB_BULK,</div><div class='add'>+							.count = 6,</div><div class='add'>+							.endpoint = 0x84,</div><div class='add'>+						},</div><div class='add'>+					}</div><div class='ctx'> 				},</div><div class='del'>-			}},</div><div class='ctx'> 			},</div><div class='ctx'> 			{</div><div class='del'>-			.num_frontends = 1,</div><div class='del'>-			.fe = {{</div><div class='del'>-				.frontend_attach =</div><div class='del'>-					af9015_af9013_frontend_attach,</div><div class='del'>-				.tuner_attach    = af9015_tuner_attach,</div><div class='del'>-				.stream = {</div><div class='del'>-					.type = USB_BULK,</div><div class='del'>-					.count = 6,</div><div class='del'>-					.endpoint = 0x85,</div><div class='del'>-					.u = {</div><div class='del'>-						.bulk = {</div><div class='del'>-							.buffersize =</div><div class='del'>-						TS_USB20_FRAME_SIZE,</div><div class='del'>-						}</div><div class='add'>+				.num_frontends = 1,</div><div class='add'>+				.fe = {</div><div class='add'>+					{</div><div class='add'>+						.frontend_attach = af9015_af9013_frontend_attach,</div><div class='add'>+						.tuner_attach    = af9015_tuner_attach,</div><div class='add'>+						.stream = {</div><div class='add'>+							.type = USB_BULK,</div><div class='add'>+							.count = 6,</div><div class='add'>+							.endpoint = 0x85,</div><div class='add'>+							.u = {</div><div class='add'>+								.bulk = {</div><div class='add'>+									.buffersize = TS_USB20_FRAME_SIZE,</div><div class='add'>+								}</div><div class='add'>+							}</div><div class='add'>+						},</div><div class='ctx'> 					}</div><div class='ctx'> 				},</div><div class='del'>-			}},</div><div class='ctx'> 			}</div><div class='ctx'> 		},</div><div class='ctx'> </div><div class='hunk'>@@ -1897,76 +1852,50 @@ static struct dvb_usb_device_properties af9015_properties[] = {</div><div class='ctx'> 				.name = "AverMedia AVerTV Volar GPS 805 (A805)",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[AVERTV_A805],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "Conceptronic USB2.0 DVB-T CTVDIGRCU " \</div><div class='ctx'> 					"V3.0",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[CONCEPTRONIC_CTVDIGRCU],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "KWorld Digial MC-810",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[KWORLD_MC810],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "Genius TVGo DVB-T03",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[GENIUS_TVGO_DVB_T03],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "KWorld PlusTV DVB-T PCI Pro Card " \</div><div class='ctx'> 					"(DVB-T PC160-T)",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[KWORLD_PC160_T],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "Sveon STV20 Tuner USB DVB-T HDTV",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[SVEON_STV20],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "Leadtek WinFast DTV2000DS",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[WINFAST_DTV2000DS],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "KWorld USB DVB-T Stick Mobile " \</div><div class='ctx'> 					"(UB383-T)",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[KWORLD_UB383_T],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='add'>+			}, {</div><div class='ctx'> 				.name = "AverMedia AVerTV Volar M (A815Mac)",</div><div class='ctx'> 				.cold_ids = {</div><div class='ctx'> 					&amp;af9015_usb_table[AVERMEDIA_A815M],</div><div class='del'>-					NULL</div><div class='ctx'> 				},</div><div class='del'>-				.warm_ids = {NULL},</div><div class='ctx'> 			},</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='hunk'>@@ -2019,5 +1948,5 @@ static struct usb_driver af9015_usb_driver = {</div><div class='ctx'> module_usb_driver(af9015_usb_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Antti Palosaari &lt;crope@iki.fi&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Driver for Afatech AF9015 DVB-T");</div><div class='add'>+MODULE_DESCRIPTION("Afatech AF9015 driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/af9035.c b/drivers/media/dvb/dvb-usb/af9035.c<br/>new file mode 100644<br/>index 000000000000..e83b39d3993c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/af9035.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/af9035.c</a></div><div class='hunk'>@@ -0,0 +1,1242 @@</div><div class='add'>+/*</div><div class='add'>+ * Afatech AF9035 DVB USB driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2009 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ * Copyright (C) 2012 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License along</div><div class='add'>+ *    with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "af9035.h"</div><div class='add'>+</div><div class='add'>+DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);</div><div class='add'>+static DEFINE_MUTEX(af9035_usb_mutex);</div><div class='add'>+static struct dvb_usb_device_properties af9035_properties[2];</div><div class='add'>+static int af9035_properties_count = ARRAY_SIZE(af9035_properties);</div><div class='add'>+</div><div class='add'>+static u16 af9035_checksum(const u8 *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	size_t i;</div><div class='add'>+	u16 checksum = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; len; i++) {</div><div class='add'>+		if (i % 2)</div><div class='add'>+			checksum += buf[i] &lt;&lt; 8;</div><div class='add'>+		else</div><div class='add'>+			checksum += buf[i];</div><div class='add'>+	}</div><div class='add'>+	checksum = ~checksum;</div><div class='add'>+</div><div class='add'>+	return checksum;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9035_ctrl_msg(struct usb_device *udev, struct usb_req *req)</div><div class='add'>+{</div><div class='add'>+#define BUF_LEN 64</div><div class='add'>+#define REQ_HDR_LEN 4 /* send header size */</div><div class='add'>+#define ACK_HDR_LEN 3 /* rece header size */</div><div class='add'>+#define CHECKSUM_LEN 2</div><div class='add'>+#define USB_TIMEOUT 2000</div><div class='add'>+</div><div class='add'>+	int ret, msg_len, act_len;</div><div class='add'>+	u8 buf[BUF_LEN];</div><div class='add'>+	static u8 seq; /* packet sequence number */</div><div class='add'>+	u16 checksum, tmp_checksum;</div><div class='add'>+</div><div class='add'>+	/* buffer overflow check */</div><div class='add'>+	if (req-&gt;wlen &gt; (BUF_LEN - REQ_HDR_LEN - CHECKSUM_LEN) ||</div><div class='add'>+		req-&gt;rlen &gt; (BUF_LEN - ACK_HDR_LEN - CHECKSUM_LEN)) {</div><div class='add'>+		pr_debug("%s: too much data wlen=%d rlen=%d\n", __func__,</div><div class='add'>+				req-&gt;wlen, req-&gt;rlen);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mutex_lock_interruptible(&amp;af9035_usb_mutex) &lt; 0)</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	buf[0] = REQ_HDR_LEN + req-&gt;wlen + CHECKSUM_LEN - 1;</div><div class='add'>+	buf[1] = req-&gt;mbox;</div><div class='add'>+	buf[2] = req-&gt;cmd;</div><div class='add'>+	buf[3] = seq++;</div><div class='add'>+	if (req-&gt;wlen)</div><div class='add'>+		memcpy(&amp;buf[4], req-&gt;wbuf, req-&gt;wlen);</div><div class='add'>+</div><div class='add'>+	/* calc and add checksum */</div><div class='add'>+	checksum = af9035_checksum(buf, buf[0] - 1);</div><div class='add'>+	buf[buf[0] - 1] = (checksum &gt;&gt; 8);</div><div class='add'>+	buf[buf[0] - 0] = (checksum &amp; 0xff);</div><div class='add'>+</div><div class='add'>+	msg_len = REQ_HDR_LEN + req-&gt;wlen + CHECKSUM_LEN ;</div><div class='add'>+</div><div class='add'>+	/* send req */</div><div class='add'>+	ret = usb_bulk_msg(udev, usb_sndbulkpipe(udev, 0x02), buf, msg_len,</div><div class='add'>+			&amp;act_len, USB_TIMEOUT);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		err("bulk message failed=%d (%d/%d)", ret, msg_len, act_len);</div><div class='add'>+	else</div><div class='add'>+		if (act_len != msg_len)</div><div class='add'>+			ret = -EIO; /* all data is not send */</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_mutex_unlock;</div><div class='add'>+</div><div class='add'>+	/* no ack for those packets */</div><div class='add'>+	if (req-&gt;cmd == CMD_FW_DL)</div><div class='add'>+		goto exit_mutex_unlock;</div><div class='add'>+</div><div class='add'>+	/* receive ack and data if read req */</div><div class='add'>+	msg_len = ACK_HDR_LEN + req-&gt;rlen + CHECKSUM_LEN;</div><div class='add'>+	ret = usb_bulk_msg(udev, usb_rcvbulkpipe(udev, 0x81), buf, msg_len,</div><div class='add'>+			&amp;act_len, USB_TIMEOUT);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		err("recv bulk message failed=%d", ret);</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto err_mutex_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act_len != msg_len) {</div><div class='add'>+		err("recv bulk message truncated (%d != %d)", act_len, msg_len);</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto err_mutex_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* verify checksum */</div><div class='add'>+	checksum = af9035_checksum(buf, act_len - 2);</div><div class='add'>+	tmp_checksum = (buf[act_len - 2] &lt;&lt; 8) | buf[act_len - 1];</div><div class='add'>+	if (tmp_checksum != checksum) {</div><div class='add'>+		err("%s: command=%02x checksum mismatch (%04x != %04x)",</div><div class='add'>+		    __func__, req-&gt;cmd, tmp_checksum, checksum);</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto err_mutex_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check status */</div><div class='add'>+	if (buf[2]) {</div><div class='add'>+		pr_debug("%s: command=%02x failed fw error=%d\n", __func__,</div><div class='add'>+				req-&gt;cmd, buf[2]);</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto err_mutex_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* read request, copy returned data to return buf */</div><div class='add'>+	if (req-&gt;rlen)</div><div class='add'>+		memcpy(req-&gt;rbuf, &amp;buf[ACK_HDR_LEN], req-&gt;rlen);</div><div class='add'>+</div><div class='add'>+err_mutex_unlock:</div><div class='add'>+exit_mutex_unlock:</div><div class='add'>+	mutex_unlock(&amp;af9035_usb_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* write multiple registers */</div><div class='add'>+static int af9035_wr_regs(struct dvb_usb_device *d, u32 reg, u8 *val, int len)</div><div class='add'>+{</div><div class='add'>+	u8 wbuf[6 + len];</div><div class='add'>+	u8 mbox = (reg &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+	struct usb_req req = { CMD_MEM_WR, mbox, sizeof(wbuf), wbuf, 0, NULL };</div><div class='add'>+</div><div class='add'>+	wbuf[0] = len;</div><div class='add'>+	wbuf[1] = 2;</div><div class='add'>+	wbuf[2] = 0;</div><div class='add'>+	wbuf[3] = 0;</div><div class='add'>+	wbuf[4] = (reg &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	wbuf[5] = (reg &gt;&gt; 0) &amp; 0xff;</div><div class='add'>+	memcpy(&amp;wbuf[6], val, len);</div><div class='add'>+</div><div class='add'>+	return af9035_ctrl_msg(d-&gt;udev, &amp;req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* read multiple registers */</div><div class='add'>+static int af9035_rd_regs(struct dvb_usb_device *d, u32 reg, u8 *val, int len)</div><div class='add'>+{</div><div class='add'>+	u8 wbuf[] = { len, 2, 0, 0, (reg &gt;&gt; 8) &amp; 0xff, reg &amp; 0xff };</div><div class='add'>+	u8 mbox = (reg &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+	struct usb_req req = { CMD_MEM_RD, mbox, sizeof(wbuf), wbuf, len, val };</div><div class='add'>+</div><div class='add'>+	return af9035_ctrl_msg(d-&gt;udev, &amp;req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* write single register */</div><div class='add'>+static int af9035_wr_reg(struct dvb_usb_device *d, u32 reg, u8 val)</div><div class='add'>+{</div><div class='add'>+	return af9035_wr_regs(d, reg, &amp;val, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* read single register */</div><div class='add'>+static int af9035_rd_reg(struct dvb_usb_device *d, u32 reg, u8 *val)</div><div class='add'>+{</div><div class='add'>+	return af9035_rd_regs(d, reg, val, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* write single register with mask */</div><div class='add'>+static int af9035_wr_reg_mask(struct dvb_usb_device *d, u32 reg, u8 val,</div><div class='add'>+		u8 mask)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	/* no need for read if whole reg is written */</div><div class='add'>+	if (mask != 0xff) {</div><div class='add'>+		ret = af9035_rd_regs(d, reg, &amp;tmp, 1);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		val &amp;= mask;</div><div class='add'>+		tmp &amp;= ~mask;</div><div class='add'>+		val |= tmp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return af9035_wr_regs(d, reg, &amp;val, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9035_i2c_master_xfer(struct i2c_adapter *adap,</div><div class='add'>+		struct i2c_msg msg[], int num)</div><div class='add'>+{</div><div class='add'>+	struct dvb_usb_device *d = i2c_get_adapdata(adap);</div><div class='add'>+	struct state *state = d-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (mutex_lock_interruptible(&amp;d-&gt;i2c_mutex) &lt; 0)</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * I2C sub header is 5 bytes long. Meaning of those bytes are:</div><div class='add'>+	 * 0: data len</div><div class='add'>+	 * 1: I2C addr &lt;&lt; 1</div><div class='add'>+	 * 2: reg addr len</div><div class='add'>+	 *    byte 3 and 4 can be used as reg addr</div><div class='add'>+	 * 3: reg addr MSB</div><div class='add'>+	 *    used when reg addr len is set to 2</div><div class='add'>+	 * 4: reg addr LSB</div><div class='add'>+	 *    used when reg addr len is set to 1 or 2</div><div class='add'>+	 *</div><div class='add'>+	 * For the simplify we do not use register addr at all.</div><div class='add'>+	 * NOTE: As a firmware knows tuner type there is very small possibility</div><div class='add'>+	 * there could be some tuner I2C hacks done by firmware and this may</div><div class='add'>+	 * lead problems if firmware expects those bytes are used.</div><div class='add'>+	 */</div><div class='add'>+	if (num == 2 &amp;&amp; !(msg[0].flags &amp; I2C_M_RD) &amp;&amp;</div><div class='add'>+			(msg[1].flags &amp; I2C_M_RD)) {</div><div class='add'>+		if (msg[0].len &gt; 40 || msg[1].len &gt; 40) {</div><div class='add'>+			/* TODO: correct limits &gt; 40 */</div><div class='add'>+			ret = -EOPNOTSUPP;</div><div class='add'>+		} else if (msg[0].addr == state-&gt;af9033_config[0].i2c_addr) {</div><div class='add'>+			/* integrated demod */</div><div class='add'>+			u32 reg = msg[0].buf[0] &lt;&lt; 16 | msg[0].buf[1] &lt;&lt; 8 |</div><div class='add'>+					msg[0].buf[2];</div><div class='add'>+			ret = af9035_rd_regs(d, reg, &amp;msg[1].buf[0],</div><div class='add'>+					msg[1].len);</div><div class='add'>+		} else {</div><div class='add'>+			/* I2C */</div><div class='add'>+			u8 buf[5 + msg[0].len];</div><div class='add'>+			struct usb_req req = { CMD_I2C_RD, 0, sizeof(buf),</div><div class='add'>+					buf, msg[1].len, msg[1].buf };</div><div class='add'>+			buf[0] = msg[1].len;</div><div class='add'>+			buf[1] = msg[0].addr &lt;&lt; 1;</div><div class='add'>+			buf[2] = 0x00; /* reg addr len */</div><div class='add'>+			buf[3] = 0x00; /* reg addr MSB */</div><div class='add'>+			buf[4] = 0x00; /* reg addr LSB */</div><div class='add'>+			memcpy(&amp;buf[5], msg[0].buf, msg[0].len);</div><div class='add'>+			ret = af9035_ctrl_msg(d-&gt;udev, &amp;req);</div><div class='add'>+		}</div><div class='add'>+	} else if (num == 1 &amp;&amp; !(msg[0].flags &amp; I2C_M_RD)) {</div><div class='add'>+		if (msg[0].len &gt; 40) {</div><div class='add'>+			/* TODO: correct limits &gt; 40 */</div><div class='add'>+			ret = -EOPNOTSUPP;</div><div class='add'>+		} else if (msg[0].addr == state-&gt;af9033_config[0].i2c_addr) {</div><div class='add'>+			/* integrated demod */</div><div class='add'>+			u32 reg = msg[0].buf[0] &lt;&lt; 16 | msg[0].buf[1] &lt;&lt; 8 |</div><div class='add'>+					msg[0].buf[2];</div><div class='add'>+			ret = af9035_wr_regs(d, reg, &amp;msg[0].buf[3],</div><div class='add'>+					msg[0].len - 3);</div><div class='add'>+		} else {</div><div class='add'>+			/* I2C */</div><div class='add'>+			u8 buf[5 + msg[0].len];</div><div class='add'>+			struct usb_req req = { CMD_I2C_WR, 0, sizeof(buf), buf,</div><div class='add'>+					0, NULL };</div><div class='add'>+			buf[0] = msg[0].len;</div><div class='add'>+			buf[1] = msg[0].addr &lt;&lt; 1;</div><div class='add'>+			buf[2] = 0x00; /* reg addr len */</div><div class='add'>+			buf[3] = 0x00; /* reg addr MSB */</div><div class='add'>+			buf[4] = 0x00; /* reg addr LSB */</div><div class='add'>+			memcpy(&amp;buf[5], msg[0].buf, msg[0].len);</div><div class='add'>+			ret = af9035_ctrl_msg(d-&gt;udev, &amp;req);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * We support only two kind of I2C transactions:</div><div class='add'>+		 * 1) 1 x read + 1 x write</div><div class='add'>+		 * 2) 1 x write</div><div class='add'>+		 */</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;d-&gt;i2c_mutex);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	else</div><div class='add'>+		return num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 af9035_i2c_functionality(struct i2c_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return I2C_FUNC_I2C;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct i2c_algorithm af9035_i2c_algo = {</div><div class='add'>+	.master_xfer = af9035_i2c_master_xfer,</div><div class='add'>+	.functionality = af9035_i2c_functionality,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AF9035_POLL 250</div><div class='add'>+static int af9035_rc_query(struct dvb_usb_device *d)</div><div class='add'>+{</div><div class='add'>+	unsigned int key;</div><div class='add'>+	unsigned char b[4];</div><div class='add'>+	int ret;</div><div class='add'>+	struct usb_req req = { CMD_IR_GET, 0, 0, NULL, 4, b };</div><div class='add'>+</div><div class='add'>+	ret = af9035_ctrl_msg(d-&gt;udev, &amp;req);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if ((b[2] + b[3]) == 0xff) {</div><div class='add'>+		if ((b[0] + b[1]) == 0xff) {</div><div class='add'>+			/* NEC */</div><div class='add'>+			key = b[0] &lt;&lt; 8 | b[2];</div><div class='add'>+		} else {</div><div class='add'>+			/* ext. NEC */</div><div class='add'>+			key = b[0] &lt;&lt; 16 | b[1] &lt;&lt; 8 | b[2];</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		key = b[0] &lt;&lt; 24 | b[1] &lt;&lt; 16 | b[2] &lt;&lt; 8 | b[3];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc_keydown(d-&gt;rc_dev, key, 0);</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	/* ignore errors */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9035_init(struct dvb_usb_device *d)</div><div class='add'>+{</div><div class='add'>+	struct state *state = d-&gt;priv;</div><div class='add'>+	int ret, i;</div><div class='add'>+	u16 frame_size = 87 * 188 / 4;</div><div class='add'>+	u8  packet_size = 512 / 4;</div><div class='add'>+	struct reg_val_mask tab[] = {</div><div class='add'>+		{ 0x80f99d, 0x01, 0x01 },</div><div class='add'>+		{ 0x80f9a4, 0x01, 0x01 },</div><div class='add'>+		{ 0x00dd11, 0x00, 0x20 },</div><div class='add'>+		{ 0x00dd11, 0x00, 0x40 },</div><div class='add'>+		{ 0x00dd13, 0x00, 0x20 },</div><div class='add'>+		{ 0x00dd13, 0x00, 0x40 },</div><div class='add'>+		{ 0x00dd11, 0x20, 0x20 },</div><div class='add'>+		{ 0x00dd88, (frame_size &gt;&gt; 0) &amp; 0xff, 0xff},</div><div class='add'>+		{ 0x00dd89, (frame_size &gt;&gt; 8) &amp; 0xff, 0xff},</div><div class='add'>+		{ 0x00dd0c, packet_size, 0xff},</div><div class='add'>+		{ 0x00dd11, state-&gt;dual_mode &lt;&lt; 6, 0x40 },</div><div class='add'>+		{ 0x00dd8a, (frame_size &gt;&gt; 0) &amp; 0xff, 0xff},</div><div class='add'>+		{ 0x00dd8b, (frame_size &gt;&gt; 8) &amp; 0xff, 0xff},</div><div class='add'>+		{ 0x00dd0d, packet_size, 0xff },</div><div class='add'>+		{ 0x80f9a3, 0x00, 0x01 },</div><div class='add'>+		{ 0x80f9cd, 0x00, 0x01 },</div><div class='add'>+		{ 0x80f99d, 0x00, 0x01 },</div><div class='add'>+		{ 0x80f9a4, 0x00, 0x01 },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: USB speed=%d frame_size=%04x packet_size=%02x\n",</div><div class='add'>+		__func__, d-&gt;udev-&gt;speed, frame_size, packet_size);</div><div class='add'>+</div><div class='add'>+	/* init endpoints */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tab); i++) {</div><div class='add'>+		ret = af9035_wr_reg_mask(d, tab[i].reg, tab[i].val,</div><div class='add'>+				tab[i].mask);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9035_identify_state(struct usb_device *udev,</div><div class='add'>+		struct dvb_usb_device_properties *props,</div><div class='add'>+		struct dvb_usb_device_description **desc,</div><div class='add'>+		int *cold)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 wbuf[1] = { 1 };</div><div class='add'>+	u8 rbuf[4];</div><div class='add'>+	struct usb_req req = { CMD_FW_QUERYINFO, 0, sizeof(wbuf), wbuf,</div><div class='add'>+			sizeof(rbuf), rbuf };</div><div class='add'>+</div><div class='add'>+	ret = af9035_ctrl_msg(udev, &amp;req);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: reply=%02x %02x %02x %02x\n", __func__,</div><div class='add'>+		rbuf[0], rbuf[1], rbuf[2], rbuf[3]);</div><div class='add'>+	if (rbuf[0] || rbuf[1] || rbuf[2] || rbuf[3])</div><div class='add'>+		*cold = 0;</div><div class='add'>+	else</div><div class='add'>+		*cold = 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9035_download_firmware(struct usb_device *udev,</div><div class='add'>+		const struct firmware *fw)</div><div class='add'>+{</div><div class='add'>+	int ret, i, j, len;</div><div class='add'>+	u8 wbuf[1];</div><div class='add'>+	u8 rbuf[4];</div><div class='add'>+	struct usb_req req = { 0, 0, 0, NULL, 0, NULL };</div><div class='add'>+	struct usb_req req_fw_dl = { CMD_FW_DL, 0, 0, wbuf, 0, NULL };</div><div class='add'>+	struct usb_req req_fw_ver = { CMD_FW_QUERYINFO, 0, 1, wbuf, 4, rbuf } ;</div><div class='add'>+	u8 hdr_core;</div><div class='add'>+	u16 hdr_addr, hdr_data_len, hdr_checksum;</div><div class='add'>+	#define MAX_DATA 58</div><div class='add'>+	#define HDR_SIZE 7</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Thanks to Daniel Glöckner &lt;daniel-gl@gmx.net&gt; about that info!</div><div class='add'>+	 *</div><div class='add'>+	 * byte 0: MCS 51 core</div><div class='add'>+	 *  There are two inside the AF9035 (1=Link and 2=OFDM) with separate</div><div class='add'>+	 *  address spaces</div><div class='add'>+	 * byte 1-2: Big endian destination address</div><div class='add'>+	 * byte 3-4: Big endian number of data bytes following the header</div><div class='add'>+	 * byte 5-6: Big endian header checksum, apparently ignored by the chip</div><div class='add'>+	 *  Calculated as ~(h[0]*256+h[1]+h[2]*256+h[3]+h[4]*256)</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	for (i = fw-&gt;size; i &gt; HDR_SIZE;) {</div><div class='add'>+		hdr_core = fw-&gt;data[fw-&gt;size - i + 0];</div><div class='add'>+		hdr_addr = fw-&gt;data[fw-&gt;size - i + 1] &lt;&lt; 8;</div><div class='add'>+		hdr_addr |= fw-&gt;data[fw-&gt;size - i + 2] &lt;&lt; 0;</div><div class='add'>+		hdr_data_len = fw-&gt;data[fw-&gt;size - i + 3] &lt;&lt; 8;</div><div class='add'>+		hdr_data_len |= fw-&gt;data[fw-&gt;size - i + 4] &lt;&lt; 0;</div><div class='add'>+		hdr_checksum = fw-&gt;data[fw-&gt;size - i + 5] &lt;&lt; 8;</div><div class='add'>+		hdr_checksum |= fw-&gt;data[fw-&gt;size - i + 6] &lt;&lt; 0;</div><div class='add'>+</div><div class='add'>+		pr_debug("%s: core=%d addr=%04x data_len=%d checksum=%04x\n",</div><div class='add'>+				__func__, hdr_core, hdr_addr, hdr_data_len,</div><div class='add'>+				hdr_checksum);</div><div class='add'>+</div><div class='add'>+		if (((hdr_core != 1) &amp;&amp; (hdr_core != 2)) ||</div><div class='add'>+				(hdr_data_len &gt; i)) {</div><div class='add'>+			pr_debug("%s: bad firmware\n", __func__);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* download begin packet */</div><div class='add'>+		req.cmd = CMD_FW_DL_BEGIN;</div><div class='add'>+		ret = af9035_ctrl_msg(udev, &amp;req);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		/* download firmware packet(s) */</div><div class='add'>+		for (j = HDR_SIZE + hdr_data_len; j &gt; 0; j -= MAX_DATA) {</div><div class='add'>+			len = j;</div><div class='add'>+			if (len &gt; MAX_DATA)</div><div class='add'>+				len = MAX_DATA;</div><div class='add'>+			req_fw_dl.wlen = len;</div><div class='add'>+			req_fw_dl.wbuf = (u8 *) &amp;fw-&gt;data[fw-&gt;size - i +</div><div class='add'>+					HDR_SIZE + hdr_data_len - j];</div><div class='add'>+			ret = af9035_ctrl_msg(udev, &amp;req_fw_dl);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* download end packet */</div><div class='add'>+		req.cmd = CMD_FW_DL_END;</div><div class='add'>+		ret = af9035_ctrl_msg(udev, &amp;req);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		i -= hdr_data_len + HDR_SIZE;</div><div class='add'>+</div><div class='add'>+		pr_debug("%s: data uploaded=%zu\n", __func__, fw-&gt;size - i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* firmware loaded, request boot */</div><div class='add'>+	req.cmd = CMD_FW_BOOT;</div><div class='add'>+	ret = af9035_ctrl_msg(udev, &amp;req);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* ensure firmware starts */</div><div class='add'>+	wbuf[0] = 1;</div><div class='add'>+	ret = af9035_ctrl_msg(udev, &amp;req_fw_ver);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (!(rbuf[0] || rbuf[1] || rbuf[2] || rbuf[3])) {</div><div class='add'>+		info("firmware did not run");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info("firmware version=%d.%d.%d.%d", rbuf[0], rbuf[1], rbuf[2],</div><div class='add'>+			rbuf[3]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9035_download_firmware_it9135(struct usb_device *udev,</div><div class='add'>+		const struct firmware *fw)</div><div class='add'>+{</div><div class='add'>+	int ret, i, i_prev;</div><div class='add'>+	u8 wbuf[1];</div><div class='add'>+	u8 rbuf[4];</div><div class='add'>+	struct usb_req req = { 0, 0, 0, NULL, 0, NULL };</div><div class='add'>+	struct usb_req req_fw_dl = { CMD_FW_SCATTER_WR, 0, 0, NULL, 0, NULL };</div><div class='add'>+	struct usb_req req_fw_ver = { CMD_FW_QUERYINFO, 0, 1, wbuf, 4, rbuf } ;</div><div class='add'>+	#define HDR_SIZE 7</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * There seems to be following firmware header. Meaning of bytes 0-3</div><div class='add'>+	 * is unknown.</div><div class='add'>+	 *</div><div class='add'>+	 * 0: 3</div><div class='add'>+	 * 1: 0, 1</div><div class='add'>+	 * 2: 0</div><div class='add'>+	 * 3: 1, 2, 3</div><div class='add'>+	 * 4: addr MSB</div><div class='add'>+	 * 5: addr LSB</div><div class='add'>+	 * 6: count of data bytes ?</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	for (i = HDR_SIZE, i_prev = 0; i &lt;= fw-&gt;size; i++) {</div><div class='add'>+		if (i == fw-&gt;size ||</div><div class='add'>+				(fw-&gt;data[i + 0] == 0x03 &amp;&amp;</div><div class='add'>+				(fw-&gt;data[i + 1] == 0x00 ||</div><div class='add'>+				fw-&gt;data[i + 1] == 0x01) &amp;&amp;</div><div class='add'>+				fw-&gt;data[i + 2] == 0x00)) {</div><div class='add'>+			req_fw_dl.wlen = i - i_prev;</div><div class='add'>+			req_fw_dl.wbuf = (u8 *) &amp;fw-&gt;data[i_prev];</div><div class='add'>+			i_prev = i;</div><div class='add'>+			ret = af9035_ctrl_msg(udev, &amp;req_fw_dl);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				goto err;</div><div class='add'>+</div><div class='add'>+			pr_debug("%s: data uploaded=%d\n", __func__, i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* firmware loaded, request boot */</div><div class='add'>+	req.cmd = CMD_FW_BOOT;</div><div class='add'>+	ret = af9035_ctrl_msg(udev, &amp;req);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* ensure firmware starts */</div><div class='add'>+	wbuf[0] = 1;</div><div class='add'>+	ret = af9035_ctrl_msg(udev, &amp;req_fw_ver);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (!(rbuf[0] || rbuf[1] || rbuf[2] || rbuf[3])) {</div><div class='add'>+		info("firmware did not run");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info("firmware version=%d.%d.%d.%d", rbuf[0], rbuf[1], rbuf[2],</div><div class='add'>+			rbuf[3]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* abuse that callback as there is no better one for reading eeprom */</div><div class='add'>+static int af9035_read_mac_address(struct dvb_usb_device *d, u8 mac[6])</div><div class='add'>+{</div><div class='add'>+	struct state *state = d-&gt;priv;</div><div class='add'>+	int ret, i, eeprom_shift = 0;</div><div class='add'>+	u8 tmp;</div><div class='add'>+	u16 tmp16;</div><div class='add'>+</div><div class='add'>+	/* check if there is dual tuners */</div><div class='add'>+	ret = af9035_rd_reg(d, EEPROM_DUAL_MODE, &amp;tmp);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	state-&gt;dual_mode = tmp;</div><div class='add'>+	pr_debug("%s: dual mode=%d\n", __func__, state-&gt;dual_mode);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; af9035_properties[0].num_adapters; i++) {</div><div class='add'>+		/* tuner */</div><div class='add'>+		ret = af9035_rd_reg(d, EEPROM_1_TUNER_ID + eeprom_shift, &amp;tmp);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		state-&gt;af9033_config[i].tuner = tmp;</div><div class='add'>+		pr_debug("%s: [%d]tuner=%02x\n", __func__, i, tmp);</div><div class='add'>+</div><div class='add'>+		switch (tmp) {</div><div class='add'>+		case AF9033_TUNER_TUA9001:</div><div class='add'>+		case AF9033_TUNER_FC0011:</div><div class='add'>+		case AF9033_TUNER_MXL5007T:</div><div class='add'>+		case AF9033_TUNER_TDA18218:</div><div class='add'>+			state-&gt;af9033_config[i].spec_inv = 1;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			warn("tuner ID=%02x not supported, please report!",</div><div class='add'>+				tmp);</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		/* tuner IF frequency */</div><div class='add'>+		ret = af9035_rd_reg(d, EEPROM_1_IFFREQ_L + eeprom_shift, &amp;tmp);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		tmp16 = tmp;</div><div class='add'>+</div><div class='add'>+		ret = af9035_rd_reg(d, EEPROM_1_IFFREQ_H + eeprom_shift, &amp;tmp);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		tmp16 |= tmp &lt;&lt; 8;</div><div class='add'>+</div><div class='add'>+		pr_debug("%s: [%d]IF=%d\n", __func__, i, tmp16);</div><div class='add'>+</div><div class='add'>+		eeprom_shift = 0x10; /* shift for the 2nd tuner params */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* get demod clock */</div><div class='add'>+	ret = af9035_rd_reg(d, 0x00d800, &amp;tmp);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	tmp = (tmp &gt;&gt; 0) &amp; 0x0f;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; af9035_properties[0].num_adapters; i++)</div><div class='add'>+		state-&gt;af9033_config[i].clock = clock_lut[tmp];</div><div class='add'>+</div><div class='add'>+	ret = af9035_rd_reg(d, EEPROM_IR_MODE, &amp;tmp);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+	pr_debug("%s: ir_mode=%02x\n", __func__, tmp);</div><div class='add'>+</div><div class='add'>+	/* don't activate rc if in HID mode or if not available */</div><div class='add'>+	if (tmp == 5) {</div><div class='add'>+		ret = af9035_rd_reg(d, EEPROM_IR_TYPE, &amp;tmp);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+		pr_debug("%s: ir_type=%02x\n", __func__, tmp);</div><div class='add'>+</div><div class='add'>+		switch (tmp) {</div><div class='add'>+		case 0: /* NEC */</div><div class='add'>+		default:</div><div class='add'>+			d-&gt;props.rc.core.protocol = RC_TYPE_NEC;</div><div class='add'>+			d-&gt;props.rc.core.allowed_protos = RC_TYPE_NEC;</div><div class='add'>+			break;</div><div class='add'>+		case 1: /* RC6 */</div><div class='add'>+			d-&gt;props.rc.core.protocol = RC_TYPE_RC6;</div><div class='add'>+			d-&gt;props.rc.core.allowed_protos = RC_TYPE_RC6;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		d-&gt;props.rc.core.rc_query = af9035_rc_query;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* abuse that callback as there is no better one for reading eeprom */</div><div class='add'>+static int af9035_read_mac_address_it9135(struct dvb_usb_device *d, u8 mac[6])</div><div class='add'>+{</div><div class='add'>+	struct state *state = d-&gt;priv;</div><div class='add'>+	int ret, i;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	state-&gt;dual_mode = false;</div><div class='add'>+</div><div class='add'>+	/* get demod clock */</div><div class='add'>+	ret = af9035_rd_reg(d, 0x00d800, &amp;tmp);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	tmp = (tmp &gt;&gt; 0) &amp; 0x0f;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; af9035_properties[0].num_adapters; i++)</div><div class='add'>+		state-&gt;af9033_config[i].clock = clock_lut_it9135[tmp];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9035_fc0011_tuner_callback(struct dvb_usb_device *d,</div><div class='add'>+		int cmd, int arg)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (cmd) {</div><div class='add'>+	case FC0011_FE_CALLBACK_POWER:</div><div class='add'>+		/* Tuner enable */</div><div class='add'>+		ret = af9035_wr_reg_mask(d, 0xd8eb, 1, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg_mask(d, 0xd8ec, 1, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg_mask(d, 0xd8ed, 1, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		/* LED */</div><div class='add'>+		ret = af9035_wr_reg_mask(d, 0xd8d0, 1, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg_mask(d, 0xd8d1, 1, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		usleep_range(10000, 50000);</div><div class='add'>+		break;</div><div class='add'>+	case FC0011_FE_CALLBACK_RESET:</div><div class='add'>+		ret = af9035_wr_reg(d, 0xd8e9, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg(d, 0xd8e8, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg(d, 0xd8e7, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		usleep_range(10000, 20000);</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg(d, 0xd8e7, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		usleep_range(10000, 20000);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9035_tuner_callback(struct dvb_usb_device *d, int cmd, int arg)</div><div class='add'>+{</div><div class='add'>+	struct state *state = d-&gt;priv;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;af9033_config[0].tuner) {</div><div class='add'>+	case AF9033_TUNER_FC0011:</div><div class='add'>+		return af9035_fc0011_tuner_callback(d, cmd, arg);</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9035_frontend_callback(void *adapter_priv, int component,</div><div class='add'>+				    int cmd, int arg)</div><div class='add'>+{</div><div class='add'>+	struct i2c_adapter *adap = adapter_priv;</div><div class='add'>+	struct dvb_usb_device *d = i2c_get_adapdata(adap);</div><div class='add'>+</div><div class='add'>+	switch (component) {</div><div class='add'>+	case DVB_FRONTEND_COMPONENT_TUNER:</div><div class='add'>+		return af9035_tuner_callback(d, cmd, arg);</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9035_frontend_attach(struct dvb_usb_adapter *adap)</div><div class='add'>+{</div><div class='add'>+	struct state *state = adap-&gt;dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!state-&gt;af9033_config[adap-&gt;id].tuner) {</div><div class='add'>+		/* unsupported tuner */</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (adap-&gt;id == 0) {</div><div class='add'>+		state-&gt;af9033_config[0].ts_mode = AF9033_TS_MODE_USB;</div><div class='add'>+		state-&gt;af9033_config[1].ts_mode = AF9033_TS_MODE_SERIAL;</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg(adap-&gt;dev, 0x00417f,</div><div class='add'>+				state-&gt;af9033_config[1].i2c_addr);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg(adap-&gt;dev, 0x00d81a,</div><div class='add'>+				state-&gt;dual_mode);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* attach demodulator */</div><div class='add'>+	adap-&gt;fe_adap[0].fe = dvb_attach(af9033_attach,</div><div class='add'>+			&amp;state-&gt;af9033_config[adap-&gt;id], &amp;adap-&gt;dev-&gt;i2c_adap);</div><div class='add'>+	if (adap-&gt;fe_adap[0].fe == NULL) {</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* disable I2C-gate */</div><div class='add'>+	adap-&gt;fe_adap[0].fe-&gt;ops.i2c_gate_ctrl = NULL;</div><div class='add'>+	adap-&gt;fe_adap[0].fe-&gt;callback = af9035_frontend_callback;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct tua9001_config af9035_tua9001_config = {</div><div class='add'>+	.i2c_addr = 0x60,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct fc0011_config af9035_fc0011_config = {</div><div class='add'>+	.i2c_address = 0x60,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mxl5007t_config af9035_mxl5007t_config = {</div><div class='add'>+	.xtal_freq_hz = MxL_XTAL_24_MHZ,</div><div class='add'>+	.if_freq_hz = MxL_IF_4_57_MHZ,</div><div class='add'>+	.invert_if = 0,</div><div class='add'>+	.loop_thru_enable = 0,</div><div class='add'>+	.clk_out_enable = 0,</div><div class='add'>+	.clk_out_amp = MxL_CLKOUT_AMP_0_94V,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct tda18218_config af9035_tda18218_config = {</div><div class='add'>+	.i2c_address = 0x60,</div><div class='add'>+	.i2c_wr_max = 21,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int af9035_tuner_attach(struct dvb_usb_adapter *adap)</div><div class='add'>+{</div><div class='add'>+	struct state *state = adap-&gt;dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	struct dvb_frontend *fe;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;af9033_config[adap-&gt;id].tuner) {</div><div class='add'>+	case AF9033_TUNER_TUA9001:</div><div class='add'>+		/* AF9035 gpiot3 = TUA9001 RESETN</div><div class='add'>+		   AF9035 gpiot2 = TUA9001 RXEN */</div><div class='add'>+</div><div class='add'>+		/* configure gpiot2 and gpiot2 as output */</div><div class='add'>+		ret = af9035_wr_reg_mask(adap-&gt;dev, 0x00d8ec, 0x01, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg_mask(adap-&gt;dev, 0x00d8ed, 0x01, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg_mask(adap-&gt;dev, 0x00d8e8, 0x01, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg_mask(adap-&gt;dev, 0x00d8e9, 0x01, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		/* reset tuner */</div><div class='add'>+		ret = af9035_wr_reg_mask(adap-&gt;dev, 0x00d8e7, 0x00, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		usleep_range(2000, 20000);</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg_mask(adap-&gt;dev, 0x00d8e7, 0x01, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		/* activate tuner RX */</div><div class='add'>+		/* TODO: use callback for TUA9001 RXEN */</div><div class='add'>+		ret = af9035_wr_reg_mask(adap-&gt;dev, 0x00d8eb, 0x01, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		/* attach tuner */</div><div class='add'>+		fe = dvb_attach(tua9001_attach, adap-&gt;fe_adap[0].fe,</div><div class='add'>+				&amp;adap-&gt;dev-&gt;i2c_adap, &amp;af9035_tua9001_config);</div><div class='add'>+		break;</div><div class='add'>+	case AF9033_TUNER_FC0011:</div><div class='add'>+		fe = dvb_attach(fc0011_attach, adap-&gt;fe_adap[0].fe,</div><div class='add'>+				&amp;adap-&gt;dev-&gt;i2c_adap, &amp;af9035_fc0011_config);</div><div class='add'>+		break;</div><div class='add'>+	case AF9033_TUNER_MXL5007T:</div><div class='add'>+		ret = af9035_wr_reg(adap-&gt;dev, 0x00d8e0, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+		ret = af9035_wr_reg(adap-&gt;dev, 0x00d8e1, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+		ret = af9035_wr_reg(adap-&gt;dev, 0x00d8df, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		msleep(30);</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg(adap-&gt;dev, 0x00d8df, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		msleep(300);</div><div class='add'>+</div><div class='add'>+		ret = af9035_wr_reg(adap-&gt;dev, 0x00d8c0, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+		ret = af9035_wr_reg(adap-&gt;dev, 0x00d8c1, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+		ret = af9035_wr_reg(adap-&gt;dev, 0x00d8bf, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+		ret = af9035_wr_reg(adap-&gt;dev, 0x00d8b4, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+		ret = af9035_wr_reg(adap-&gt;dev, 0x00d8b5, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+		ret = af9035_wr_reg(adap-&gt;dev, 0x00d8b3, 1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		/* attach tuner */</div><div class='add'>+		fe = dvb_attach(mxl5007t_attach, adap-&gt;fe_adap[0].fe,</div><div class='add'>+				&amp;adap-&gt;dev-&gt;i2c_adap, 0x60, &amp;af9035_mxl5007t_config);</div><div class='add'>+		break;</div><div class='add'>+	case AF9033_TUNER_TDA18218:</div><div class='add'>+		/* attach tuner */</div><div class='add'>+		fe = dvb_attach(tda18218_attach, adap-&gt;fe_adap[0].fe,</div><div class='add'>+				&amp;adap-&gt;dev-&gt;i2c_adap, &amp;af9035_tda18218_config);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		fe = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fe == NULL) {</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum af9035_id_entry {</div><div class='add'>+	AF9035_15A4_9035,</div><div class='add'>+	AF9035_15A4_1000,</div><div class='add'>+	AF9035_15A4_1001,</div><div class='add'>+	AF9035_15A4_1002,</div><div class='add'>+	AF9035_15A4_1003,</div><div class='add'>+	AF9035_0CCD_0093,</div><div class='add'>+	AF9035_07CA_A835,</div><div class='add'>+	AF9035_07CA_B835,</div><div class='add'>+	AF9035_07CA_1867,</div><div class='add'>+	AF9035_07CA_A867,</div><div class='add'>+	AF9035_07CA_0825,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct usb_device_id af9035_id[] = {</div><div class='add'>+	[AF9035_15A4_9035] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9035_9035)},</div><div class='add'>+	[AF9035_15A4_1000] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9035_1000)},</div><div class='add'>+	[AF9035_15A4_1001] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9035_1001)},</div><div class='add'>+	[AF9035_15A4_1002] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9035_1002)},</div><div class='add'>+	[AF9035_15A4_1003] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AFATECH, USB_PID_AFATECH_AF9035_1003)},</div><div class='add'>+	[AF9035_0CCD_0093] = {</div><div class='add'>+		USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_STICK)},</div><div class='add'>+	[AF9035_07CA_A835] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A835)},</div><div class='add'>+	[AF9035_07CA_B835] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_B835)},</div><div class='add'>+	[AF9035_07CA_1867] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_1867)},</div><div class='add'>+	[AF9035_07CA_A867] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A867)},</div><div class='add'>+	[AF9035_07CA_0825] = {</div><div class='add'>+		USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_TWINSTAR)},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(usb, af9035_id);</div><div class='add'>+</div><div class='add'>+static struct dvb_usb_device_properties af9035_properties[] = {</div><div class='add'>+	{</div><div class='add'>+		.caps = DVB_USB_IS_AN_I2C_ADAPTER,</div><div class='add'>+</div><div class='add'>+		.usb_ctrl = DEVICE_SPECIFIC,</div><div class='add'>+		.download_firmware = af9035_download_firmware,</div><div class='add'>+		.firmware = "dvb-usb-af9035-02.fw",</div><div class='add'>+		.no_reconnect = 1,</div><div class='add'>+</div><div class='add'>+		.size_of_priv = sizeof(struct state),</div><div class='add'>+</div><div class='add'>+		.num_adapters = 1,</div><div class='add'>+		.adapter = {</div><div class='add'>+			{</div><div class='add'>+				.num_frontends = 1,</div><div class='add'>+				.fe = {</div><div class='add'>+					{</div><div class='add'>+						.frontend_attach = af9035_frontend_attach,</div><div class='add'>+						.tuner_attach = af9035_tuner_attach,</div><div class='add'>+						.stream = {</div><div class='add'>+							.type = USB_BULK,</div><div class='add'>+							.count = 6,</div><div class='add'>+							.endpoint = 0x84,</div><div class='add'>+							.u = {</div><div class='add'>+								.bulk = {</div><div class='add'>+									.buffersize = (87 * 188),</div><div class='add'>+								}</div><div class='add'>+							}</div><div class='add'>+						}</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		},</div><div class='add'>+</div><div class='add'>+		.identify_state = af9035_identify_state,</div><div class='add'>+		.read_mac_address = af9035_read_mac_address,</div><div class='add'>+</div><div class='add'>+		.i2c_algo = &amp;af9035_i2c_algo,</div><div class='add'>+</div><div class='add'>+		.rc.core = {</div><div class='add'>+			.protocol       = RC_TYPE_UNKNOWN,</div><div class='add'>+			.module_name    = "af9035",</div><div class='add'>+			.rc_query       = NULL,</div><div class='add'>+			.rc_interval    = AF9035_POLL,</div><div class='add'>+			.allowed_protos = RC_TYPE_UNKNOWN,</div><div class='add'>+			.rc_codes       = RC_MAP_EMPTY,</div><div class='add'>+		},</div><div class='add'>+		.num_device_descs = 5,</div><div class='add'>+		.devices = {</div><div class='add'>+			{</div><div class='add'>+				.name = "Afatech AF9035 reference design",</div><div class='add'>+				.cold_ids = {</div><div class='add'>+					&amp;af9035_id[AF9035_15A4_9035],</div><div class='add'>+					&amp;af9035_id[AF9035_15A4_1000],</div><div class='add'>+					&amp;af9035_id[AF9035_15A4_1001],</div><div class='add'>+					&amp;af9035_id[AF9035_15A4_1002],</div><div class='add'>+					&amp;af9035_id[AF9035_15A4_1003],</div><div class='add'>+				},</div><div class='add'>+			}, {</div><div class='add'>+				.name = "TerraTec Cinergy T Stick",</div><div class='add'>+				.cold_ids = {</div><div class='add'>+					&amp;af9035_id[AF9035_0CCD_0093],</div><div class='add'>+				},</div><div class='add'>+			}, {</div><div class='add'>+				.name = "AVerMedia AVerTV Volar HD/PRO (A835)",</div><div class='add'>+				.cold_ids = {</div><div class='add'>+					&amp;af9035_id[AF9035_07CA_A835],</div><div class='add'>+					&amp;af9035_id[AF9035_07CA_B835],</div><div class='add'>+				},</div><div class='add'>+			}, {</div><div class='add'>+				.name = "AVerMedia HD Volar (A867)",</div><div class='add'>+				.cold_ids = {</div><div class='add'>+					&amp;af9035_id[AF9035_07CA_1867],</div><div class='add'>+					&amp;af9035_id[AF9035_07CA_A867],</div><div class='add'>+				},</div><div class='add'>+			}, {</div><div class='add'>+				.name = "AVerMedia Twinstar (A825)",</div><div class='add'>+				.cold_ids = {</div><div class='add'>+					&amp;af9035_id[AF9035_07CA_0825],</div><div class='add'>+				},</div><div class='add'>+			},</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.caps = DVB_USB_IS_AN_I2C_ADAPTER,</div><div class='add'>+</div><div class='add'>+		.usb_ctrl = DEVICE_SPECIFIC,</div><div class='add'>+		.download_firmware = af9035_download_firmware_it9135,</div><div class='add'>+		.firmware = "dvb-usb-it9135-01.fw",</div><div class='add'>+		.no_reconnect = 1,</div><div class='add'>+</div><div class='add'>+		.size_of_priv = sizeof(struct state),</div><div class='add'>+</div><div class='add'>+		.num_adapters = 1,</div><div class='add'>+		.adapter = {</div><div class='add'>+			{</div><div class='add'>+				.num_frontends = 1,</div><div class='add'>+				.fe = {</div><div class='add'>+					{</div><div class='add'>+						.frontend_attach = af9035_frontend_attach,</div><div class='add'>+						.tuner_attach = af9035_tuner_attach,</div><div class='add'>+						.stream = {</div><div class='add'>+							.type = USB_BULK,</div><div class='add'>+							.count = 6,</div><div class='add'>+							.endpoint = 0x84,</div><div class='add'>+							.u = {</div><div class='add'>+								.bulk = {</div><div class='add'>+									.buffersize = (87 * 188),</div><div class='add'>+								}</div><div class='add'>+							}</div><div class='add'>+						}</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		},</div><div class='add'>+</div><div class='add'>+		.identify_state = af9035_identify_state,</div><div class='add'>+		.read_mac_address = af9035_read_mac_address_it9135,</div><div class='add'>+</div><div class='add'>+		.i2c_algo = &amp;af9035_i2c_algo,</div><div class='add'>+</div><div class='add'>+		.num_device_descs = 0, /* disabled as no support for IT9135 */</div><div class='add'>+		.devices = {</div><div class='add'>+			{</div><div class='add'>+				.name = "ITE Tech. IT9135 reference design",</div><div class='add'>+			},</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int af9035_usb_probe(struct usb_interface *intf,</div><div class='add'>+			    const struct usb_device_id *id)</div><div class='add'>+{</div><div class='add'>+	int ret, i;</div><div class='add'>+	struct dvb_usb_device *d = NULL;</div><div class='add'>+	struct usb_device *udev;</div><div class='add'>+	bool found;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: interface=%d\n", __func__,</div><div class='add'>+			intf-&gt;cur_altsetting-&gt;desc.bInterfaceNumber);</div><div class='add'>+</div><div class='add'>+	/* interface 0 is used by DVB-T receiver and</div><div class='add'>+	   interface 1 is for remote controller (HID) */</div><div class='add'>+	if (intf-&gt;cur_altsetting-&gt;desc.bInterfaceNumber != 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Dynamic USB ID support. Replaces first device ID with current one. */</div><div class='add'>+	udev = interface_to_usbdev(intf);</div><div class='add'>+</div><div class='add'>+	for (i = 0, found = false; i &lt; ARRAY_SIZE(af9035_id) - 1; i++) {</div><div class='add'>+		if (af9035_id[i].idVendor ==</div><div class='add'>+				le16_to_cpu(udev-&gt;descriptor.idVendor) &amp;&amp;</div><div class='add'>+				af9035_id[i].idProduct ==</div><div class='add'>+				le16_to_cpu(udev-&gt;descriptor.idProduct)) {</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!found) {</div><div class='add'>+		pr_debug("%s: using dynamic ID %04x:%04x\n", __func__,</div><div class='add'>+				le16_to_cpu(udev-&gt;descriptor.idVendor),</div><div class='add'>+				le16_to_cpu(udev-&gt;descriptor.idProduct));</div><div class='add'>+		af9035_properties[0].devices[0].cold_ids[0]-&gt;idVendor =</div><div class='add'>+				le16_to_cpu(udev-&gt;descriptor.idVendor);</div><div class='add'>+		af9035_properties[0].devices[0].cold_ids[0]-&gt;idProduct =</div><div class='add'>+				le16_to_cpu(udev-&gt;descriptor.idProduct);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; af9035_properties_count; i++) {</div><div class='add'>+		ret = dvb_usb_device_init(intf, &amp;af9035_properties[i],</div><div class='add'>+				THIS_MODULE, &amp;d, adapter_nr);</div><div class='add'>+</div><div class='add'>+		if (ret == -ENODEV)</div><div class='add'>+			continue;</div><div class='add'>+		else</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (d) {</div><div class='add'>+		ret = af9035_init(d);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* usb specific object needed to register this driver with the usb subsystem */</div><div class='add'>+static struct usb_driver af9035_usb_driver = {</div><div class='add'>+	.name = "dvb_usb_af9035",</div><div class='add'>+	.probe = af9035_usb_probe,</div><div class='add'>+	.disconnect = dvb_usb_device_exit,</div><div class='add'>+	.id_table = af9035_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_usb_driver(af9035_usb_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Antti Palosaari &lt;crope@iki.fi&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Afatech AF9035 driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/af9035.h b/drivers/media/dvb/dvb-usb/af9035.h<br/>new file mode 100644<br/>index 000000000000..481a1a43dd2a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/af9035.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/af9035.h</a></div><div class='hunk'>@@ -0,0 +1,113 @@</div><div class='add'>+/*</div><div class='add'>+ * Afatech AF9035 DVB USB driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2009 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ * Copyright (C) 2012 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License along</div><div class='add'>+ *    with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AF9035_H</div><div class='add'>+#define AF9035_H</div><div class='add'>+</div><div class='add'>+/* prefix for dvb-usb log writings */</div><div class='add'>+#define DVB_USB_LOG_PREFIX "af9035"</div><div class='add'>+</div><div class='add'>+#include "dvb-usb.h"</div><div class='add'>+#include "af9033.h"</div><div class='add'>+#include "tua9001.h"</div><div class='add'>+#include "fc0011.h"</div><div class='add'>+#include "mxl5007t.h"</div><div class='add'>+#include "tda18218.h"</div><div class='add'>+</div><div class='add'>+struct reg_val {</div><div class='add'>+	u32 reg;</div><div class='add'>+	u8  val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct reg_val_mask {</div><div class='add'>+	u32 reg;</div><div class='add'>+	u8  val;</div><div class='add'>+	u8  mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct usb_req {</div><div class='add'>+	u8  cmd;</div><div class='add'>+	u8  mbox;</div><div class='add'>+	u8  wlen;</div><div class='add'>+	u8  *wbuf;</div><div class='add'>+	u8  rlen;</div><div class='add'>+	u8  *rbuf;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct state {</div><div class='add'>+	bool dual_mode;</div><div class='add'>+</div><div class='add'>+	struct af9033_config af9033_config[2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u32 clock_lut[] = {</div><div class='add'>+	20480000, /*      FPGA */</div><div class='add'>+	16384000, /* 16.38 MHz */</div><div class='add'>+	20480000, /* 20.48 MHz */</div><div class='add'>+	36000000, /* 36.00 MHz */</div><div class='add'>+	30000000, /* 30.00 MHz */</div><div class='add'>+	26000000, /* 26.00 MHz */</div><div class='add'>+	28000000, /* 28.00 MHz */</div><div class='add'>+	32000000, /* 32.00 MHz */</div><div class='add'>+	34000000, /* 34.00 MHz */</div><div class='add'>+	24000000, /* 24.00 MHz */</div><div class='add'>+	22000000, /* 22.00 MHz */</div><div class='add'>+	12000000, /* 12.00 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u32 clock_lut_it9135[] = {</div><div class='add'>+	12000000, /* 12.00 MHz */</div><div class='add'>+	20480000, /* 20.48 MHz */</div><div class='add'>+	36000000, /* 36.00 MHz */</div><div class='add'>+	30000000, /* 30.00 MHz */</div><div class='add'>+	26000000, /* 26.00 MHz */</div><div class='add'>+	28000000, /* 28.00 MHz */</div><div class='add'>+	32000000, /* 32.00 MHz */</div><div class='add'>+	34000000, /* 34.00 MHz */</div><div class='add'>+	24000000, /* 24.00 MHz */</div><div class='add'>+	22000000, /* 22.00 MHz */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* EEPROM locations */</div><div class='add'>+#define EEPROM_IR_MODE            0x430d</div><div class='add'>+#define EEPROM_DUAL_MODE          0x4326</div><div class='add'>+#define EEPROM_IR_TYPE            0x4329</div><div class='add'>+#define EEPROM_1_IFFREQ_L         0x432d</div><div class='add'>+#define EEPROM_1_IFFREQ_H         0x432e</div><div class='add'>+#define EEPROM_1_TUNER_ID         0x4331</div><div class='add'>+#define EEPROM_2_IFFREQ_L         0x433d</div><div class='add'>+#define EEPROM_2_IFFREQ_H         0x433e</div><div class='add'>+#define EEPROM_2_TUNER_ID         0x4341</div><div class='add'>+</div><div class='add'>+/* USB commands */</div><div class='add'>+#define CMD_MEM_RD                  0x00</div><div class='add'>+#define CMD_MEM_WR                  0x01</div><div class='add'>+#define CMD_I2C_RD                  0x02</div><div class='add'>+#define CMD_I2C_WR                  0x03</div><div class='add'>+#define CMD_IR_GET                  0x18</div><div class='add'>+#define CMD_FW_DL                   0x21</div><div class='add'>+#define CMD_FW_QUERYINFO            0x22</div><div class='add'>+#define CMD_FW_BOOT                 0x23</div><div class='add'>+#define CMD_FW_DL_BEGIN             0x24</div><div class='add'>+#define CMD_FW_DL_END               0x25</div><div class='add'>+#define CMD_FW_SCATTER_WR           0x29</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/dib0700_core.c b/drivers/media/dvb/dvb-usb/dib0700_core.c<br/>index 02290c60f72f..7e9e00fae04e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/dib0700_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/dib0700_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/dib0700_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/dib0700_core.c</a></div><div class='hunk'>@@ -32,7 +32,7 @@ int dib0700_get_version(struct dvb_usb_device *d, u32 *hwversion,</div><div class='ctx'> </div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;d-&gt;usb_mutex) &lt; 0) {</div><div class='ctx'> 		err("could not acquire lock");</div><div class='del'>-		return 0;</div><div class='add'>+		return -EINTR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = usb_control_msg(d-&gt;udev, usb_rcvctrlpipe(d-&gt;udev, 0),</div><div class='hunk'>@@ -118,7 +118,7 @@ int dib0700_set_gpio(struct dvb_usb_device *d, enum dib07x0_gpios gpio, u8 gpio_</div><div class='ctx'> </div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;d-&gt;usb_mutex) &lt; 0) {</div><div class='ctx'> 		err("could not acquire lock");</div><div class='del'>-		return 0;</div><div class='add'>+		return -EINTR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	st-&gt;buf[0] = REQUEST_SET_GPIO;</div><div class='hunk'>@@ -139,7 +139,7 @@ static int dib0700_set_usb_xfer_len(struct dvb_usb_device *d, u16 nb_ts_packets)</div><div class='ctx'> 	if (st-&gt;fw_version &gt;= 0x10201) {</div><div class='ctx'> 		if (mutex_lock_interruptible(&amp;d-&gt;usb_mutex) &lt; 0) {</div><div class='ctx'> 			err("could not acquire lock");</div><div class='del'>-			return 0;</div><div class='add'>+			return -EINTR;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		st-&gt;buf[0] = REQUEST_SET_USB_XFER_LEN;</div><div class='hunk'>@@ -178,7 +178,7 @@ static int dib0700_i2c_xfer_new(struct i2c_adapter *adap, struct i2c_msg *msg,</div><div class='ctx'> 	/* Ensure nobody else hits the i2c bus while we're sending our</div><div class='ctx'> 	   sequence of messages, (such as the remote control thread) */</div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;d-&gt;i2c_mutex) &lt; 0)</div><div class='del'>-		return -EAGAIN;</div><div class='add'>+		return -EINTR;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num; i++) {</div><div class='ctx'> 		if (i == 0) {</div><div class='hunk'>@@ -228,7 +228,8 @@ static int dib0700_i2c_xfer_new(struct i2c_adapter *adap, struct i2c_msg *msg,</div><div class='ctx'> 			/* Write request */</div><div class='ctx'> 			if (mutex_lock_interruptible(&amp;d-&gt;usb_mutex) &lt; 0) {</div><div class='ctx'> 				err("could not acquire lock");</div><div class='del'>-				return 0;</div><div class='add'>+				mutex_unlock(&amp;d-&gt;i2c_mutex);</div><div class='add'>+				return -EINTR;</div><div class='ctx'> 			}</div><div class='ctx'> 			st-&gt;buf[0] = REQUEST_NEW_I2C_WRITE;</div><div class='ctx'> 			st-&gt;buf[1] = msg[i].addr &lt;&lt; 1;</div><div class='hunk'>@@ -271,10 +272,11 @@ static int dib0700_i2c_xfer_legacy(struct i2c_adapter *adap,</div><div class='ctx'> 	int i,len;</div><div class='ctx'> </div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;d-&gt;i2c_mutex) &lt; 0)</div><div class='del'>-		return -EAGAIN;</div><div class='add'>+		return -EINTR;</div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;d-&gt;usb_mutex) &lt; 0) {</div><div class='ctx'> 		err("could not acquire lock");</div><div class='del'>-		return 0;</div><div class='add'>+		mutex_unlock(&amp;d-&gt;i2c_mutex);</div><div class='add'>+		return -EINTR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num; i++) {</div><div class='hunk'>@@ -369,7 +371,7 @@ static int dib0700_set_clock(struct dvb_usb_device *d, u8 en_pll,</div><div class='ctx'> </div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;d-&gt;usb_mutex) &lt; 0) {</div><div class='ctx'> 		err("could not acquire lock");</div><div class='del'>-		return 0;</div><div class='add'>+		return -EINTR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	st-&gt;buf[0] = REQUEST_SET_CLOCK;</div><div class='hunk'>@@ -401,7 +403,7 @@ int dib0700_set_i2c_speed(struct dvb_usb_device *d, u16 scl_kHz)</div><div class='ctx'> </div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;d-&gt;usb_mutex) &lt; 0) {</div><div class='ctx'> 		err("could not acquire lock");</div><div class='del'>-		return 0;</div><div class='add'>+		return -EINTR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	st-&gt;buf[0] = REQUEST_SET_I2C_PARAM;</div><div class='hunk'>@@ -561,7 +563,7 @@ int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)</div><div class='ctx'> </div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;adap-&gt;dev-&gt;usb_mutex) &lt; 0) {</div><div class='ctx'> 		err("could not acquire lock");</div><div class='del'>-		return 0;</div><div class='add'>+		return -EINTR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	st-&gt;buf[0] = REQUEST_ENABLE_VIDEO;</div><div class='hunk'>@@ -611,7 +613,7 @@ int dib0700_change_protocol(struct rc_dev *rc, u64 rc_type)</div><div class='ctx'> </div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;d-&gt;usb_mutex) &lt; 0) {</div><div class='ctx'> 		err("could not acquire lock");</div><div class='del'>-		return 0;</div><div class='add'>+		return -EINTR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	st-&gt;buf[0] = REQUEST_SET_RC;</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c<br/>index f9e966aa26e7..510001da6e83 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/dib0700_devices.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/dib0700_devices.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/dib0700_devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/dib0700_devices.c</a></div><div class='hunk'>@@ -3569,6 +3569,7 @@ struct usb_device_id dib0700_usb_id_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_TFE7090E) },</div><div class='ctx'> 	{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_TFE7790E) },</div><div class='ctx'> /* 80 */{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_TFE8096P) },</div><div class='add'>+	{ USB_DEVICE(USB_VID_ELGATO,	USB_PID_ELGATO_EYETV_DTT_2) },</div><div class='ctx'> 	{ 0 }		/* Terminating entry */</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);</div><div class='hunk'>@@ -3832,7 +3833,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {</div><div class='ctx'> 			},</div><div class='ctx'> 		},</div><div class='ctx'> </div><div class='del'>-		.num_device_descs = 11,</div><div class='add'>+		.num_device_descs = 12,</div><div class='ctx'> 		.devices = {</div><div class='ctx'> 			{   "DiBcom STK7070P reference design",</div><div class='ctx'> 				{ &amp;dib0700_usb_id_table[15], NULL },</div><div class='hunk'>@@ -3878,6 +3879,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {</div><div class='ctx'> 				{ &amp;dib0700_usb_id_table[50], NULL },</div><div class='ctx'> 				{ NULL },</div><div class='ctx'> 			},</div><div class='add'>+			{   "Elgato EyeTV DTT rev. 2",</div><div class='add'>+				{ &amp;dib0700_usb_id_table[81], NULL },</div><div class='add'>+				{ NULL },</div><div class='add'>+			},</div><div class='ctx'> 		},</div><div class='ctx'> </div><div class='ctx'> 		.rc.core = {</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h<br/>index 397d8f232731..7a6160bf54ba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/dvb-usb-ids.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/dvb-usb-ids.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/dvb-usb-ids.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/dvb-usb-ids.h</a></div><div class='hunk'>@@ -76,6 +76,11 @@</div><div class='ctx'> #define USB_PID_AFATECH_AF9005				0x9020</div><div class='ctx'> #define USB_PID_AFATECH_AF9015_9015			0x9015</div><div class='ctx'> #define USB_PID_AFATECH_AF9015_9016			0x9016</div><div class='add'>+#define USB_PID_AFATECH_AF9035_1000			0x1000</div><div class='add'>+#define USB_PID_AFATECH_AF9035_1001			0x1001</div><div class='add'>+#define USB_PID_AFATECH_AF9035_1002			0x1002</div><div class='add'>+#define USB_PID_AFATECH_AF9035_1003			0x1003</div><div class='add'>+#define USB_PID_AFATECH_AF9035_9035			0x9035</div><div class='ctx'> #define USB_PID_TREKSTOR_DVBT				0x901b</div><div class='ctx'> #define USB_VID_ALINK_DTU				0xf170</div><div class='ctx'> #define USB_PID_ANSONIC_DVBT_USB			0x6000</div><div class='hunk'>@@ -152,6 +157,7 @@</div><div class='ctx'> #define USB_PID_KWORLD_VSTREAM_WARM			0x17df</div><div class='ctx'> #define USB_PID_TERRATEC_CINERGY_T_USB_XE		0x0055</div><div class='ctx'> #define USB_PID_TERRATEC_CINERGY_T_USB_XE_REV2		0x0069</div><div class='add'>+#define USB_PID_TERRATEC_CINERGY_T_STICK		0x0093</div><div class='ctx'> #define USB_PID_TERRATEC_CINERGY_T_STICK_RC		0x0097</div><div class='ctx'> #define USB_PID_TERRATEC_CINERGY_T_STICK_DUAL_RC	0x0099</div><div class='ctx'> #define USB_PID_TWINHAN_VP7041_COLD			0x3201</div><div class='hunk'>@@ -221,6 +227,11 @@</div><div class='ctx'> #define USB_PID_AVERMEDIA_A850T				0x850b</div><div class='ctx'> #define USB_PID_AVERMEDIA_A805				0xa805</div><div class='ctx'> #define USB_PID_AVERMEDIA_A815M				0x815a</div><div class='add'>+#define USB_PID_AVERMEDIA_A835				0xa835</div><div class='add'>+#define USB_PID_AVERMEDIA_B835				0xb835</div><div class='add'>+#define USB_PID_AVERMEDIA_1867				0x1867</div><div class='add'>+#define USB_PID_AVERMEDIA_A867				0xa867</div><div class='add'>+#define USB_PID_AVERMEDIA_TWINSTAR			0x0825</div><div class='ctx'> #define USB_PID_TECHNOTREND_CONNECT_S2400               0x3006</div><div class='ctx'> #define USB_PID_TECHNOTREND_CONNECT_CT3650		0x300d</div><div class='ctx'> #define USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY	0x005a</div><div class='hunk'>@@ -327,6 +338,7 @@</div><div class='ctx'> #define USB_PID_MYGICA_D689				0xd811</div><div class='ctx'> #define USB_PID_ELGATO_EYETV_DIVERSITY			0x0011</div><div class='ctx'> #define USB_PID_ELGATO_EYETV_DTT			0x0021</div><div class='add'>+#define USB_PID_ELGATO_EYETV_DTT_2			0x003f</div><div class='ctx'> #define USB_PID_ELGATO_EYETV_DTT_Dlx			0x0020</div><div class='ctx'> #define USB_PID_ELGATO_EYETV_SAT			0x002a</div><div class='ctx'> #define USB_PID_DVB_T_USB_STICK_HIGH_SPEED_COLD		0x5000</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-urb.c b/drivers/media/dvb/dvb-usb/dvb-usb-urb.c<br/>index 53a5c30b51b2..5c8f651344fc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/dvb-usb-urb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/dvb-usb-urb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/dvb-usb-urb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/dvb-usb-urb.c</a></div><div class='hunk'>@@ -80,6 +80,14 @@ static void dvb_usb_data_complete_204(struct usb_data_stream *stream, u8 *buffer</div><div class='ctx'> 		dvb_dmx_swfilter_204(&amp;adap-&gt;demux, buffer, length);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void dvb_usb_data_complete_raw(struct usb_data_stream *stream,</div><div class='add'>+				      u8 *buffer, size_t length)</div><div class='add'>+{</div><div class='add'>+	struct dvb_usb_adapter *adap = stream-&gt;user_priv;</div><div class='add'>+	if (adap-&gt;feedcount &gt; 0 &amp;&amp; adap-&gt;state &amp; DVB_USB_ADAP_STATE_DVB)</div><div class='add'>+		dvb_dmx_swfilter_raw(&amp;adap-&gt;demux, buffer, length);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int dvb_usb_adapter_stream_init(struct dvb_usb_adapter *adap)</div><div class='ctx'> {</div><div class='ctx'> 	int i, ret = 0;</div><div class='hunk'>@@ -90,6 +98,10 @@ int dvb_usb_adapter_stream_init(struct dvb_usb_adapter *adap)</div><div class='ctx'> 			adap-&gt;fe_adap[i].stream.complete =</div><div class='ctx'> 				dvb_usb_data_complete_204;</div><div class='ctx'> 		else</div><div class='add'>+		if (adap-&gt;props.fe[i].caps &amp; DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD)</div><div class='add'>+			adap-&gt;fe_adap[i].stream.complete =</div><div class='add'>+				dvb_usb_data_complete_raw;</div><div class='add'>+		else</div><div class='ctx'> 		adap-&gt;fe_adap[i].stream.complete  = dvb_usb_data_complete;</div><div class='ctx'> 		adap-&gt;fe_adap[i].stream.user_priv = adap;</div><div class='ctx'> 		ret = usb_urb_init(&amp;adap-&gt;fe_adap[i].stream,</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/dvb-usb.h b/drivers/media/dvb/dvb-usb/dvb-usb.h<br/>index 6d7d13f9ce68..99f94409efa1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/dvb-usb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/dvb-usb.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/dvb-usb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/dvb-usb.h</a></div><div class='hunk'>@@ -141,6 +141,7 @@ struct dvb_usb_adapter_fe_properties {</div><div class='ctx'> #define DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF 0x02</div><div class='ctx'> #define DVB_USB_ADAP_NEED_PID_FILTERING           0x04</div><div class='ctx'> #define DVB_USB_ADAP_RECEIVES_204_BYTE_TS         0x08</div><div class='add'>+#define DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD         0x10</div><div class='ctx'> 	int caps;</div><div class='ctx'> 	int pid_filter_count;</div><div class='ctx'> </div><div class='hunk'>@@ -156,7 +157,7 @@ struct dvb_usb_adapter_fe_properties {</div><div class='ctx'> 	int size_of_priv;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define MAX_NO_OF_FE_PER_ADAP 2</div><div class='add'>+#define MAX_NO_OF_FE_PER_ADAP 3</div><div class='ctx'> struct dvb_usb_adapter_properties {</div><div class='ctx'> 	int size_of_priv;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/dw2102.c b/drivers/media/dvb/dvb-usb/dw2102.c<br/>index 451c5a7adfb2..9382895b1b88 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/dw2102.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/dw2102.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/dw2102.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/dw2102.c</a></div><div class='hunk'>@@ -148,7 +148,7 @@ static int dw2102_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 		int num)</div><div class='ctx'> {</div><div class='ctx'> 	struct dvb_usb_device *d = i2c_get_adapdata(adap);</div><div class='del'>-	int i = 0, ret = 0;</div><div class='add'>+	int i = 0;</div><div class='ctx'> 	u8 buf6[] = {0x2c, 0x05, 0xc0, 0, 0, 0, 0};</div><div class='ctx'> 	u16 value;</div><div class='ctx'> </div><div class='hunk'>@@ -162,7 +162,7 @@ static int dw2102_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 		/* read stv0299 register */</div><div class='ctx'> 		value = msg[0].buf[0];/* register */</div><div class='ctx'> 		for (i = 0; i &lt; msg[1].len; i++) {</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0xb5, value + i, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xb5, value + i, 0,</div><div class='ctx'> 					buf6, 2, DW210X_READ_MSG);</div><div class='ctx'> 			msg[1].buf[i] = buf6[0];</div><div class='ctx'> 		}</div><div class='hunk'>@@ -174,7 +174,7 @@ static int dw2102_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 			buf6[0] = 0x2a;</div><div class='ctx'> 			buf6[1] = msg[0].buf[0];</div><div class='ctx'> 			buf6[2] = msg[0].buf[1];</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0xb2, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xb2, 0, 0,</div><div class='ctx'> 					buf6, 3, DW210X_WRITE_MSG);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 0x60:</div><div class='hunk'>@@ -187,17 +187,17 @@ static int dw2102_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 				buf6[4] = msg[0].buf[1];</div><div class='ctx'> 				buf6[5] = msg[0].buf[2];</div><div class='ctx'> 				buf6[6] = msg[0].buf[3];</div><div class='del'>-				ret = dw210x_op_rw(d-&gt;udev, 0xb2, 0, 0,</div><div class='add'>+				dw210x_op_rw(d-&gt;udev, 0xb2, 0, 0,</div><div class='ctx'> 						buf6, 7, DW210X_WRITE_MSG);</div><div class='ctx'> 			} else {</div><div class='ctx'> 			/* read from tuner */</div><div class='del'>-				ret = dw210x_op_rw(d-&gt;udev, 0xb5, 0, 0,</div><div class='add'>+				dw210x_op_rw(d-&gt;udev, 0xb5, 0, 0,</div><div class='ctx'> 						buf6, 1, DW210X_READ_MSG);</div><div class='ctx'> 				msg[0].buf[0] = buf6[0];</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case (DW2102_RC_QUERY):</div><div class='del'>-			ret  = dw210x_op_rw(d-&gt;udev, 0xb8, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xb8, 0, 0,</div><div class='ctx'> 					buf6, 2, DW210X_READ_MSG);</div><div class='ctx'> 			msg[0].buf[0] = buf6[0];</div><div class='ctx'> 			msg[0].buf[1] = buf6[1];</div><div class='hunk'>@@ -205,7 +205,7 @@ static int dw2102_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 		case (DW2102_VOLTAGE_CTRL):</div><div class='ctx'> 			buf6[0] = 0x30;</div><div class='ctx'> 			buf6[1] = msg[0].buf[0];</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0xb2, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xb2, 0, 0,</div><div class='ctx'> 					buf6, 2, DW210X_WRITE_MSG);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -221,7 +221,6 @@ static int dw2102_serit_i2c_transfer(struct i2c_adapter *adap,</div><div class='ctx'> 						struct i2c_msg msg[], int num)</div><div class='ctx'> {</div><div class='ctx'> 	struct dvb_usb_device *d = i2c_get_adapdata(adap);</div><div class='del'>-	int ret = 0;</div><div class='ctx'> 	u8 buf6[] = {0, 0, 0, 0, 0, 0, 0};</div><div class='ctx'> </div><div class='ctx'> 	if (!d)</div><div class='hunk'>@@ -235,10 +234,10 @@ static int dw2102_serit_i2c_transfer(struct i2c_adapter *adap,</div><div class='ctx'> 		buf6[0] = msg[0].addr &lt;&lt; 1;</div><div class='ctx'> 		buf6[1] = msg[0].len;</div><div class='ctx'> 		buf6[2] = msg[0].buf[0];</div><div class='del'>-		ret = dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='add'>+		dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='ctx'> 				buf6, msg[0].len + 2, DW210X_WRITE_MSG);</div><div class='ctx'> 		/* read si2109 register */</div><div class='del'>-		ret = dw210x_op_rw(d-&gt;udev, 0xc3, 0xd0, 0,</div><div class='add'>+		dw210x_op_rw(d-&gt;udev, 0xc3, 0xd0, 0,</div><div class='ctx'> 				buf6, msg[1].len + 2, DW210X_READ_MSG);</div><div class='ctx'> 		memcpy(msg[1].buf, buf6 + 2, msg[1].len);</div><div class='ctx'> </div><div class='hunk'>@@ -250,11 +249,11 @@ static int dw2102_serit_i2c_transfer(struct i2c_adapter *adap,</div><div class='ctx'> 			buf6[0] = msg[0].addr &lt;&lt; 1;</div><div class='ctx'> 			buf6[1] = msg[0].len;</div><div class='ctx'> 			memcpy(buf6 + 2, msg[0].buf, msg[0].len);</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0, buf6,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0, buf6,</div><div class='ctx'> 					msg[0].len + 2, DW210X_WRITE_MSG);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case(DW2102_RC_QUERY):</div><div class='del'>-			ret  = dw210x_op_rw(d-&gt;udev, 0xb8, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xb8, 0, 0,</div><div class='ctx'> 					buf6, 2, DW210X_READ_MSG);</div><div class='ctx'> 			msg[0].buf[0] = buf6[0];</div><div class='ctx'> 			msg[0].buf[1] = buf6[1];</div><div class='hunk'>@@ -262,7 +261,7 @@ static int dw2102_serit_i2c_transfer(struct i2c_adapter *adap,</div><div class='ctx'> 		case(DW2102_VOLTAGE_CTRL):</div><div class='ctx'> 			buf6[0] = 0x30;</div><div class='ctx'> 			buf6[1] = msg[0].buf[0];</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0xb2, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xb2, 0, 0,</div><div class='ctx'> 					buf6, 2, DW210X_WRITE_MSG);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -276,7 +275,6 @@ static int dw2102_serit_i2c_transfer(struct i2c_adapter *adap,</div><div class='ctx'> static int dw2102_earda_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[], int num)</div><div class='ctx'> {</div><div class='ctx'> 	struct dvb_usb_device *d = i2c_get_adapdata(adap);</div><div class='del'>-	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!d)</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -291,10 +289,10 @@ static int dw2102_earda_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg ms</div><div class='ctx'> 		obuf[0] = msg[0].addr &lt;&lt; 1;</div><div class='ctx'> 		obuf[1] = msg[0].len;</div><div class='ctx'> 		obuf[2] = msg[0].buf[0];</div><div class='del'>-		ret = dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='add'>+		dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='ctx'> 				obuf, msg[0].len + 2, DW210X_WRITE_MSG);</div><div class='ctx'> 		/* second read registers */</div><div class='del'>-		ret = dw210x_op_rw(d-&gt;udev, 0xc3, 0xd1 , 0,</div><div class='add'>+		dw210x_op_rw(d-&gt;udev, 0xc3, 0xd1 , 0,</div><div class='ctx'> 				ibuf, msg[1].len + 2, DW210X_READ_MSG);</div><div class='ctx'> 		memcpy(msg[1].buf, ibuf + 2, msg[1].len);</div><div class='ctx'> </div><div class='hunk'>@@ -308,7 +306,7 @@ static int dw2102_earda_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg ms</div><div class='ctx'> 			obuf[0] = msg[0].addr &lt;&lt; 1;</div><div class='ctx'> 			obuf[1] = msg[0].len;</div><div class='ctx'> 			memcpy(obuf + 2, msg[0].buf, msg[0].len);</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='ctx'> 					obuf, msg[0].len + 2, DW210X_WRITE_MSG);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -318,13 +316,13 @@ static int dw2102_earda_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg ms</div><div class='ctx'> 			obuf[0] = msg[0].addr &lt;&lt; 1;</div><div class='ctx'> 			obuf[1] = msg[0].len;</div><div class='ctx'> 			memcpy(obuf + 2, msg[0].buf, msg[0].len);</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='ctx'> 					obuf, msg[0].len + 2, DW210X_WRITE_MSG);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		case(DW2102_RC_QUERY): {</div><div class='ctx'> 			u8 ibuf[2];</div><div class='del'>-			ret  = dw210x_op_rw(d-&gt;udev, 0xb8, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xb8, 0, 0,</div><div class='ctx'> 					ibuf, 2, DW210X_READ_MSG);</div><div class='ctx'> 			memcpy(msg[0].buf, ibuf , 2);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -333,7 +331,7 @@ static int dw2102_earda_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg ms</div><div class='ctx'> 			u8 obuf[2];</div><div class='ctx'> 			obuf[0] = 0x30;</div><div class='ctx'> 			obuf[1] = msg[0].buf[0];</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0xb2, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xb2, 0, 0,</div><div class='ctx'> 					obuf, 2, DW210X_WRITE_MSG);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -349,7 +347,6 @@ static int dw2102_earda_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg ms</div><div class='ctx'> static int dw2104_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[], int num)</div><div class='ctx'> {</div><div class='ctx'> 	struct dvb_usb_device *d = i2c_get_adapdata(adap);</div><div class='del'>-	int ret = 0;</div><div class='ctx'> 	int len, i, j;</div><div class='ctx'> </div><div class='ctx'> 	if (!d)</div><div class='hunk'>@@ -361,7 +358,7 @@ static int dw2104_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[], i</div><div class='ctx'> 		switch (msg[j].addr) {</div><div class='ctx'> 		case(DW2102_RC_QUERY): {</div><div class='ctx'> 			u8 ibuf[2];</div><div class='del'>-			ret  = dw210x_op_rw(d-&gt;udev, 0xb8, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xb8, 0, 0,</div><div class='ctx'> 					ibuf, 2, DW210X_READ_MSG);</div><div class='ctx'> 			memcpy(msg[j].buf, ibuf , 2);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -370,7 +367,7 @@ static int dw2104_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[], i</div><div class='ctx'> 			u8 obuf[2];</div><div class='ctx'> 			obuf[0] = 0x30;</div><div class='ctx'> 			obuf[1] = msg[j].buf[0];</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0xb2, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xb2, 0, 0,</div><div class='ctx'> 					obuf, 2, DW210X_WRITE_MSG);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -382,7 +379,7 @@ static int dw2104_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[], i</div><div class='ctx'> 			if (msg[j].flags == I2C_M_RD) {</div><div class='ctx'> 				/* read registers */</div><div class='ctx'> 				u8  ibuf[msg[j].len + 2];</div><div class='del'>-				ret = dw210x_op_rw(d-&gt;udev, 0xc3,</div><div class='add'>+				dw210x_op_rw(d-&gt;udev, 0xc3,</div><div class='ctx'> 						(msg[j].addr &lt;&lt; 1) + 1, 0,</div><div class='ctx'> 						ibuf, msg[j].len + 2,</div><div class='ctx'> 						DW210X_READ_MSG);</div><div class='hunk'>@@ -402,7 +399,7 @@ static int dw2104_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[], i</div><div class='ctx'> 				do {</div><div class='ctx'> 					memcpy(obuf + 3, msg[j].buf + i,</div><div class='ctx'> 							(len &gt; 16 ? 16 : len));</div><div class='del'>-					ret = dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='add'>+					dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='ctx'> 						obuf, (len &gt; 16 ? 16 : len) + 3,</div><div class='ctx'> 						DW210X_WRITE_MSG);</div><div class='ctx'> 					i += 16;</div><div class='hunk'>@@ -414,7 +411,7 @@ static int dw2104_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[], i</div><div class='ctx'> 				obuf[0] = msg[j].addr &lt;&lt; 1;</div><div class='ctx'> 				obuf[1] = msg[j].len;</div><div class='ctx'> 				memcpy(obuf + 2, msg[j].buf, msg[j].len);</div><div class='del'>-				ret = dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='add'>+				dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='ctx'> 						obuf, msg[j].len + 2,</div><div class='ctx'> 						DW210X_WRITE_MSG);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -432,7 +429,7 @@ static int dw3101_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 								int num)</div><div class='ctx'> {</div><div class='ctx'> 	struct dvb_usb_device *d = i2c_get_adapdata(adap);</div><div class='del'>-	int ret = 0, i;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!d)</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -447,10 +444,10 @@ static int dw3101_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 		obuf[0] = msg[0].addr &lt;&lt; 1;</div><div class='ctx'> 		obuf[1] = msg[0].len;</div><div class='ctx'> 		obuf[2] = msg[0].buf[0];</div><div class='del'>-		ret = dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='add'>+		dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='ctx'> 				obuf, msg[0].len + 2, DW210X_WRITE_MSG);</div><div class='ctx'> 		/* second read registers */</div><div class='del'>-		ret = dw210x_op_rw(d-&gt;udev, 0xc3, 0x19 , 0,</div><div class='add'>+		dw210x_op_rw(d-&gt;udev, 0xc3, 0x19 , 0,</div><div class='ctx'> 				ibuf, msg[1].len + 2, DW210X_READ_MSG);</div><div class='ctx'> 		memcpy(msg[1].buf, ibuf + 2, msg[1].len);</div><div class='ctx'> </div><div class='hunk'>@@ -465,13 +462,13 @@ static int dw3101_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 			obuf[0] = msg[0].addr &lt;&lt; 1;</div><div class='ctx'> 			obuf[1] = msg[0].len;</div><div class='ctx'> 			memcpy(obuf + 2, msg[0].buf, msg[0].len);</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xc2, 0, 0,</div><div class='ctx'> 					obuf, msg[0].len + 2, DW210X_WRITE_MSG);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		case(DW2102_RC_QUERY): {</div><div class='ctx'> 			u8 ibuf[2];</div><div class='del'>-			ret  = dw210x_op_rw(d-&gt;udev, 0xb8, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xb8, 0, 0,</div><div class='ctx'> 					ibuf, 2, DW210X_READ_MSG);</div><div class='ctx'> 			memcpy(msg[0].buf, ibuf , 2);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -496,7 +493,6 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> {</div><div class='ctx'> 	struct dvb_usb_device *d = i2c_get_adapdata(adap);</div><div class='ctx'> 	struct usb_device *udev;</div><div class='del'>-	int ret = 0;</div><div class='ctx'> 	int len, i, j;</div><div class='ctx'> </div><div class='ctx'> 	if (!d)</div><div class='hunk'>@@ -509,7 +505,7 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 		switch (msg[j].addr) {</div><div class='ctx'> 		case (DW2102_RC_QUERY): {</div><div class='ctx'> 			u8 ibuf[5];</div><div class='del'>-			ret  = dw210x_op_rw(d-&gt;udev, 0xb8, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0xb8, 0, 0,</div><div class='ctx'> 					ibuf, 5, DW210X_READ_MSG);</div><div class='ctx'> 			memcpy(msg[j].buf, ibuf + 3, 2);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -519,11 +515,11 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> </div><div class='ctx'> 			obuf[0] = 1;</div><div class='ctx'> 			obuf[1] = msg[j].buf[1];/* off-on */</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0x8a, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0x8a, 0, 0,</div><div class='ctx'> 					obuf, 2, DW210X_WRITE_MSG);</div><div class='ctx'> 			obuf[0] = 3;</div><div class='ctx'> 			obuf[1] = msg[j].buf[0];/* 13v-18v */</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0x8a, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0x8a, 0, 0,</div><div class='ctx'> 					obuf, 2, DW210X_WRITE_MSG);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -532,7 +528,7 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> </div><div class='ctx'> 			obuf[0] = 5;</div><div class='ctx'> 			obuf[1] = msg[j].buf[0];</div><div class='del'>-			ret = dw210x_op_rw(d-&gt;udev, 0x8a, 0, 0,</div><div class='add'>+			dw210x_op_rw(d-&gt;udev, 0x8a, 0, 0,</div><div class='ctx'> 					obuf, 2, DW210X_WRITE_MSG);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -545,7 +541,7 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 			if (msg[j].flags == I2C_M_RD) {</div><div class='ctx'> 				/* read registers */</div><div class='ctx'> 				u8 ibuf[msg[j].len];</div><div class='del'>-				ret = dw210x_op_rw(d-&gt;udev, 0x91, 0, 0,</div><div class='add'>+				dw210x_op_rw(d-&gt;udev, 0x91, 0, 0,</div><div class='ctx'> 						ibuf, msg[j].len,</div><div class='ctx'> 						DW210X_READ_MSG);</div><div class='ctx'> 				memcpy(msg[j].buf, ibuf, msg[j].len);</div><div class='hunk'>@@ -563,7 +559,7 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 				do {</div><div class='ctx'> 					memcpy(obuf + 3, msg[j].buf + i,</div><div class='ctx'> 							(len &gt; 16 ? 16 : len));</div><div class='del'>-					ret = dw210x_op_rw(d-&gt;udev, 0x80, 0, 0,</div><div class='add'>+					dw210x_op_rw(d-&gt;udev, 0x80, 0, 0,</div><div class='ctx'> 						obuf, (len &gt; 16 ? 16 : len) + 3,</div><div class='ctx'> 						DW210X_WRITE_MSG);</div><div class='ctx'> 					i += 16;</div><div class='hunk'>@@ -575,7 +571,7 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 				obuf[0] = msg[j + 1].len;</div><div class='ctx'> 				obuf[1] = (msg[j].addr &lt;&lt; 1);</div><div class='ctx'> 				memcpy(obuf + 2, msg[j].buf, msg[j].len);</div><div class='del'>-				ret = dw210x_op_rw(d-&gt;udev,</div><div class='add'>+				dw210x_op_rw(d-&gt;udev,</div><div class='ctx'> 						udev-&gt;descriptor.idProduct ==</div><div class='ctx'> 						0x7500 ? 0x92 : 0x90, 0, 0,</div><div class='ctx'> 						obuf, msg[j].len + 2,</div><div class='hunk'>@@ -587,7 +583,7 @@ static int s6x0_i2c_transfer(struct i2c_adapter *adap, struct i2c_msg msg[],</div><div class='ctx'> 				obuf[0] = msg[j].len + 1;</div><div class='ctx'> 				obuf[1] = (msg[j].addr &lt;&lt; 1);</div><div class='ctx'> 				memcpy(obuf + 2, msg[j].buf, msg[j].len);</div><div class='del'>-				ret = dw210x_op_rw(d-&gt;udev, 0x80, 0, 0,</div><div class='add'>+				dw210x_op_rw(d-&gt;udev, 0x80, 0, 0,</div><div class='ctx'> 						obuf, msg[j].len + 2,</div><div class='ctx'> 						DW210X_WRITE_MSG);</div><div class='ctx'> 				break;</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/it913x.c b/drivers/media/dvb/dvb-usb/it913x.c<br/>index 482d249ca7f3..6244fe9d1a3a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/it913x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/it913x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/it913x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/it913x.c</a></div><div class='hunk'>@@ -81,7 +81,7 @@ static int it913x_bulk_write(struct usb_device *dev,</div><div class='ctx'> 	for (i = 0; i &lt; IT913X_RETRY; i++) {</div><div class='ctx'> 		ret = usb_bulk_msg(dev, usb_sndbulkpipe(dev, pipe),</div><div class='ctx'> 				snd, len , &amp;actual_l, IT913X_SND_TIMEOUT);</div><div class='del'>-		if (ret == 0 || ret != -EBUSY || ret != -ETIMEDOUT)</div><div class='add'>+		if (ret != -EBUSY &amp;&amp; ret != -ETIMEDOUT)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -99,7 +99,7 @@ static int it913x_bulk_read(struct usb_device *dev,</div><div class='ctx'> 	for (i = 0; i &lt; IT913X_RETRY; i++) {</div><div class='ctx'> 		ret = usb_bulk_msg(dev, usb_rcvbulkpipe(dev, pipe),</div><div class='ctx'> 				 rev, len , &amp;actual_l, IT913X_RCV_TIMEOUT);</div><div class='del'>-		if (ret == 0 || ret != -EBUSY || ret != -ETIMEDOUT)</div><div class='add'>+		if (ret != -EBUSY &amp;&amp; ret != -ETIMEDOUT)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/lmedm04.c b/drivers/media/dvb/dvb-usb/lmedm04.c<br/>index 5dde06d066ff..25d1031460f8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/lmedm04.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/lmedm04.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/lmedm04.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/lmedm04.c</a></div><div class='hunk'>@@ -373,7 +373,7 @@ static int lme2510_pid_filter_ctrl(struct dvb_usb_adapter *adap, int onoff)</div><div class='ctx'> 	struct lme2510_state *st = adap-&gt;dev-&gt;priv;</div><div class='ctx'> 	static u8 clear_pid_reg[] = LME_ALL_PIDS;</div><div class='ctx'> 	static u8 rbuf[1];</div><div class='del'>-	int ret;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	deb_info(1, "PID Clearing Filter");</div><div class='ctx'> </div><div class='hunk'>@@ -1205,14 +1205,13 @@ static int lme2510_probe(struct usb_interface *intf,</div><div class='ctx'> 		const struct usb_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct usb_device *udev = interface_to_usbdev(intf);</div><div class='del'>-	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	usb_reset_configuration(udev);</div><div class='ctx'> </div><div class='ctx'> 	usb_set_interface(udev, intf-&gt;cur_altsetting-&gt;desc.bInterfaceNumber, 1);</div><div class='ctx'> </div><div class='ctx'> 	if (udev-&gt;speed != USB_SPEED_HIGH) {</div><div class='del'>-		ret = usb_reset_device(udev);</div><div class='add'>+		usb_reset_device(udev);</div><div class='ctx'> 		info("DEV Failed to connect in HIGH SPEED mode");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/mxl111sf-tuner.c b/drivers/media/dvb/dvb-usb/mxl111sf-tuner.c<br/>index 72db6eef4b9c..74da5bb1ce99 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/mxl111sf-tuner.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/mxl111sf-tuner.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/mxl111sf-tuner.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/mxl111sf-tuner.c</a></div><div class='hunk'>@@ -284,6 +284,7 @@ static int mxl111sf_tuner_set_params(struct dvb_frontend *fe)</div><div class='ctx'> </div><div class='ctx'> 	switch (delsys) {</div><div class='ctx'> 	case SYS_ATSC:</div><div class='add'>+	case SYS_ATSCMH:</div><div class='ctx'> 		bw = 0; /* ATSC */</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SYS_DVBC_ANNEX_B:</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/mxl111sf.c b/drivers/media/dvb/dvb-usb/mxl111sf.c<br/>index 81305de2fea5..cd842798f5af 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/mxl111sf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/mxl111sf.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/mxl111sf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/mxl111sf.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include "mxl111sf-tuner.h"</div><div class='ctx'> </div><div class='ctx'> #include "lgdt3305.h"</div><div class='add'>+#include "lg2160.h"</div><div class='ctx'> </div><div class='ctx'> int dvb_usb_mxl111sf_debug;</div><div class='ctx'> module_param_named(debug, dvb_usb_mxl111sf_debug, int, 0644);</div><div class='hunk'>@@ -31,6 +32,10 @@ int dvb_usb_mxl111sf_isoc;</div><div class='ctx'> module_param_named(isoc, dvb_usb_mxl111sf_isoc, int, 0644);</div><div class='ctx'> MODULE_PARM_DESC(isoc, "enable usb isoc xfer (0=bulk, 1=isoc).");</div><div class='ctx'> </div><div class='add'>+int dvb_usb_mxl111sf_spi;</div><div class='add'>+module_param_named(spi, dvb_usb_mxl111sf_spi, int, 0644);</div><div class='add'>+MODULE_PARM_DESC(spi, "use spi rather than tp for data xfer (0=tp, 1=spi).");</div><div class='add'>+</div><div class='ctx'> #define ANT_PATH_AUTO 0</div><div class='ctx'> #define ANT_PATH_EXTERNAL 1</div><div class='ctx'> #define ANT_PATH_INTERNAL 2</div><div class='hunk'>@@ -340,7 +345,6 @@ static int mxl111sf_ep6_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)</div><div class='ctx'> 	struct mxl111sf_state *state = d-&gt;priv;</div><div class='ctx'> 	struct mxl111sf_adap_state *adap_state = adap-&gt;fe_adap[adap-&gt;active_fe].priv;</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	u8 tmp;</div><div class='ctx'> </div><div class='ctx'> 	deb_info("%s(%d)\n", __func__, onoff);</div><div class='ctx'> </div><div class='hunk'>@@ -361,6 +365,33 @@ static int mxl111sf_ep6_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mxl111sf_ep5_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)</div><div class='add'>+{</div><div class='add'>+	struct dvb_usb_device *d = adap-&gt;dev;</div><div class='add'>+	struct mxl111sf_state *state = d-&gt;priv;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	deb_info("%s(%d)\n", __func__, onoff);</div><div class='add'>+</div><div class='add'>+	if (onoff) {</div><div class='add'>+		ret = mxl111sf_enable_usb_output(state);</div><div class='add'>+		mxl_fail(ret);</div><div class='add'>+</div><div class='add'>+		ret = mxl111sf_init_i2s_port(state, 200);</div><div class='add'>+		mxl_fail(ret);</div><div class='add'>+		ret = mxl111sf_config_i2s(state, 0, 15);</div><div class='add'>+		mxl_fail(ret);</div><div class='add'>+	} else {</div><div class='add'>+		ret = mxl111sf_disable_i2s_port(state);</div><div class='add'>+		mxl_fail(ret);</div><div class='add'>+	}</div><div class='add'>+	if (state-&gt;chip_rev &gt; MXL111SF_V6)</div><div class='add'>+		ret = mxl111sf_config_spi(state, onoff);</div><div class='add'>+	mxl_fail(ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mxl111sf_ep4_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)</div><div class='ctx'> {</div><div class='ctx'> 	struct dvb_usb_device *d = adap-&gt;dev;</div><div class='hunk'>@@ -453,6 +484,255 @@ fail:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct lg2160_config hauppauge_lg2160_config = {</div><div class='add'>+	.lg_chip            = LG2160,</div><div class='add'>+	.i2c_addr           = 0x1c &gt;&gt; 1,</div><div class='add'>+	.deny_i2c_rptr      = 1,</div><div class='add'>+	.spectral_inversion = 0,</div><div class='add'>+	.if_khz             = 6000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mxl111sf_lg2160_frontend_attach(struct dvb_usb_adapter *adap)</div><div class='add'>+{</div><div class='add'>+	struct dvb_usb_device *d = adap-&gt;dev;</div><div class='add'>+	struct mxl111sf_state *state = d-&gt;priv;</div><div class='add'>+	int fe_id = adap-&gt;num_frontends_initialized;</div><div class='add'>+	struct mxl111sf_adap_state *adap_state = adap-&gt;fe_adap[fe_id].priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	deb_adv("%s()\n", __func__);</div><div class='add'>+</div><div class='add'>+	/* save a pointer to the dvb_usb_device in device state */</div><div class='add'>+	state-&gt;d = d;</div><div class='add'>+	adap_state-&gt;alt_mode = (dvb_usb_mxl111sf_isoc) ? 2 : 1;</div><div class='add'>+	state-&gt;alt_mode = adap_state-&gt;alt_mode;</div><div class='add'>+</div><div class='add'>+	if (usb_set_interface(adap-&gt;dev-&gt;udev, 0, state-&gt;alt_mode) &lt; 0)</div><div class='add'>+		err("set interface failed");</div><div class='add'>+</div><div class='add'>+	state-&gt;gpio_mode = MXL111SF_GPIO_MOD_MH;</div><div class='add'>+	adap_state-&gt;gpio_mode = state-&gt;gpio_mode;</div><div class='add'>+	adap_state-&gt;device_mode = MXL_TUNER_MODE;</div><div class='add'>+	adap_state-&gt;ep6_clockphase = 1;</div><div class='add'>+</div><div class='add'>+	ret = mxl1x1sf_soft_reset(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = mxl111sf_init_tuner_demod(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = mxl1x1sf_set_device_mode(state, adap_state-&gt;device_mode);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = mxl111sf_enable_usb_output(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = mxl1x1sf_top_master_ctrl(state, 1);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = mxl111sf_init_port_expander(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = mxl111sf_gpio_mode_switch(state, state-&gt;gpio_mode);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = get_chip_info(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	adap-&gt;fe_adap[fe_id].fe = dvb_attach(lg2160_attach,</div><div class='add'>+			      &amp;hauppauge_lg2160_config,</div><div class='add'>+			      &amp;adap-&gt;dev-&gt;i2c_adap);</div><div class='add'>+	if (adap-&gt;fe_adap[fe_id].fe) {</div><div class='add'>+		adap_state-&gt;fe_init = adap-&gt;fe_adap[fe_id].fe-&gt;ops.init;</div><div class='add'>+		adap-&gt;fe_adap[fe_id].fe-&gt;ops.init = mxl111sf_adap_fe_init;</div><div class='add'>+		adap_state-&gt;fe_sleep = adap-&gt;fe_adap[fe_id].fe-&gt;ops.sleep;</div><div class='add'>+		adap-&gt;fe_adap[fe_id].fe-&gt;ops.sleep = mxl111sf_adap_fe_sleep;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	ret = -EIO;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct lg2160_config hauppauge_lg2161_1019_config = {</div><div class='add'>+	.lg_chip            = LG2161_1019,</div><div class='add'>+	.i2c_addr           = 0x1c &gt;&gt; 1,</div><div class='add'>+	.deny_i2c_rptr      = 1,</div><div class='add'>+	.spectral_inversion = 0,</div><div class='add'>+	.if_khz             = 6000,</div><div class='add'>+	.output_if          = 2, /* LG2161_OIF_SPI_MAS */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct lg2160_config hauppauge_lg2161_1040_config = {</div><div class='add'>+	.lg_chip            = LG2161_1040,</div><div class='add'>+	.i2c_addr           = 0x1c &gt;&gt; 1,</div><div class='add'>+	.deny_i2c_rptr      = 1,</div><div class='add'>+	.spectral_inversion = 0,</div><div class='add'>+	.if_khz             = 6000,</div><div class='add'>+	.output_if          = 4, /* LG2161_OIF_SPI_MAS */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mxl111sf_lg2161_frontend_attach(struct dvb_usb_adapter *adap)</div><div class='add'>+{</div><div class='add'>+	struct dvb_usb_device *d = adap-&gt;dev;</div><div class='add'>+	struct mxl111sf_state *state = d-&gt;priv;</div><div class='add'>+	int fe_id = adap-&gt;num_frontends_initialized;</div><div class='add'>+	struct mxl111sf_adap_state *adap_state = adap-&gt;fe_adap[fe_id].priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	deb_adv("%s()\n", __func__);</div><div class='add'>+</div><div class='add'>+	/* save a pointer to the dvb_usb_device in device state */</div><div class='add'>+	state-&gt;d = d;</div><div class='add'>+	adap_state-&gt;alt_mode = (dvb_usb_mxl111sf_isoc) ? 2 : 1;</div><div class='add'>+	state-&gt;alt_mode = adap_state-&gt;alt_mode;</div><div class='add'>+</div><div class='add'>+	if (usb_set_interface(adap-&gt;dev-&gt;udev, 0, state-&gt;alt_mode) &lt; 0)</div><div class='add'>+		err("set interface failed");</div><div class='add'>+</div><div class='add'>+	state-&gt;gpio_mode = MXL111SF_GPIO_MOD_MH;</div><div class='add'>+	adap_state-&gt;gpio_mode = state-&gt;gpio_mode;</div><div class='add'>+	adap_state-&gt;device_mode = MXL_TUNER_MODE;</div><div class='add'>+	adap_state-&gt;ep6_clockphase = 1;</div><div class='add'>+</div><div class='add'>+	ret = mxl1x1sf_soft_reset(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = mxl111sf_init_tuner_demod(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = mxl1x1sf_set_device_mode(state, adap_state-&gt;device_mode);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = mxl111sf_enable_usb_output(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = mxl1x1sf_top_master_ctrl(state, 1);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = mxl111sf_init_port_expander(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = mxl111sf_gpio_mode_switch(state, state-&gt;gpio_mode);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = get_chip_info(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	adap-&gt;fe_adap[fe_id].fe = dvb_attach(lg2160_attach,</div><div class='add'>+			      (MXL111SF_V8_200 == state-&gt;chip_rev) ?</div><div class='add'>+			      &amp;hauppauge_lg2161_1040_config :</div><div class='add'>+			      &amp;hauppauge_lg2161_1019_config,</div><div class='add'>+			      &amp;adap-&gt;dev-&gt;i2c_adap);</div><div class='add'>+	if (adap-&gt;fe_adap[fe_id].fe) {</div><div class='add'>+		adap_state-&gt;fe_init = adap-&gt;fe_adap[fe_id].fe-&gt;ops.init;</div><div class='add'>+		adap-&gt;fe_adap[fe_id].fe-&gt;ops.init = mxl111sf_adap_fe_init;</div><div class='add'>+		adap_state-&gt;fe_sleep = adap-&gt;fe_adap[fe_id].fe-&gt;ops.sleep;</div><div class='add'>+		adap-&gt;fe_adap[fe_id].fe-&gt;ops.sleep = mxl111sf_adap_fe_sleep;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	ret = -EIO;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct lg2160_config hauppauge_lg2161_1019_ep6_config = {</div><div class='add'>+	.lg_chip            = LG2161_1019,</div><div class='add'>+	.i2c_addr           = 0x1c &gt;&gt; 1,</div><div class='add'>+	.deny_i2c_rptr      = 1,</div><div class='add'>+	.spectral_inversion = 0,</div><div class='add'>+	.if_khz             = 6000,</div><div class='add'>+	.output_if          = 1, /* LG2161_OIF_SERIAL_TS */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct lg2160_config hauppauge_lg2161_1040_ep6_config = {</div><div class='add'>+	.lg_chip            = LG2161_1040,</div><div class='add'>+	.i2c_addr           = 0x1c &gt;&gt; 1,</div><div class='add'>+	.deny_i2c_rptr      = 1,</div><div class='add'>+	.spectral_inversion = 0,</div><div class='add'>+	.if_khz             = 6000,</div><div class='add'>+	.output_if          = 7, /* LG2161_OIF_SERIAL_TS */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mxl111sf_lg2161_ep6_frontend_attach(struct dvb_usb_adapter *adap)</div><div class='add'>+{</div><div class='add'>+	struct dvb_usb_device *d = adap-&gt;dev;</div><div class='add'>+	struct mxl111sf_state *state = d-&gt;priv;</div><div class='add'>+	int fe_id = adap-&gt;num_frontends_initialized;</div><div class='add'>+	struct mxl111sf_adap_state *adap_state = adap-&gt;fe_adap[fe_id].priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	deb_adv("%s()\n", __func__);</div><div class='add'>+</div><div class='add'>+	/* save a pointer to the dvb_usb_device in device state */</div><div class='add'>+	state-&gt;d = d;</div><div class='add'>+	adap_state-&gt;alt_mode = (dvb_usb_mxl111sf_isoc) ? 2 : 1;</div><div class='add'>+	state-&gt;alt_mode = adap_state-&gt;alt_mode;</div><div class='add'>+</div><div class='add'>+	if (usb_set_interface(adap-&gt;dev-&gt;udev, 0, state-&gt;alt_mode) &lt; 0)</div><div class='add'>+		err("set interface failed");</div><div class='add'>+</div><div class='add'>+	state-&gt;gpio_mode = MXL111SF_GPIO_MOD_MH;</div><div class='add'>+	adap_state-&gt;gpio_mode = state-&gt;gpio_mode;</div><div class='add'>+	adap_state-&gt;device_mode = MXL_TUNER_MODE;</div><div class='add'>+	adap_state-&gt;ep6_clockphase = 0;</div><div class='add'>+</div><div class='add'>+	ret = mxl1x1sf_soft_reset(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = mxl111sf_init_tuner_demod(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = mxl1x1sf_set_device_mode(state, adap_state-&gt;device_mode);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = mxl111sf_enable_usb_output(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = mxl1x1sf_top_master_ctrl(state, 1);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = mxl111sf_init_port_expander(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = mxl111sf_gpio_mode_switch(state, state-&gt;gpio_mode);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = get_chip_info(state);</div><div class='add'>+	if (mxl_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	adap-&gt;fe_adap[fe_id].fe = dvb_attach(lg2160_attach,</div><div class='add'>+			      (MXL111SF_V8_200 == state-&gt;chip_rev) ?</div><div class='add'>+			      &amp;hauppauge_lg2161_1040_ep6_config :</div><div class='add'>+			      &amp;hauppauge_lg2161_1019_ep6_config,</div><div class='add'>+			      &amp;adap-&gt;dev-&gt;i2c_adap);</div><div class='add'>+	if (adap-&gt;fe_adap[fe_id].fe) {</div><div class='add'>+		adap_state-&gt;fe_init = adap-&gt;fe_adap[fe_id].fe-&gt;ops.init;</div><div class='add'>+		adap-&gt;fe_adap[fe_id].fe-&gt;ops.init = mxl111sf_adap_fe_init;</div><div class='add'>+		adap_state-&gt;fe_sleep = adap-&gt;fe_adap[fe_id].fe-&gt;ops.sleep;</div><div class='add'>+		adap-&gt;fe_adap[fe_id].fe-&gt;ops.sleep = mxl111sf_adap_fe_sleep;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	ret = -EIO;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct mxl111sf_demod_config mxl_demod_config = {</div><div class='ctx'> 	.read_reg        = mxl111sf_read_reg,</div><div class='ctx'> 	.write_reg       = mxl111sf_write_reg,</div><div class='hunk'>@@ -650,6 +930,18 @@ static struct dvb_usb_device_properties mxl111sf_dvbt_bulk_properties;</div><div class='ctx'> static struct dvb_usb_device_properties mxl111sf_dvbt_isoc_properties;</div><div class='ctx'> static struct dvb_usb_device_properties mxl111sf_atsc_bulk_properties;</div><div class='ctx'> static struct dvb_usb_device_properties mxl111sf_atsc_isoc_properties;</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_atsc_mh_bulk_properties;</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_atsc_mh_isoc_properties;</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mh_bulk_properties;</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mh_isoc_properties;</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mercury_spi_bulk_properties;</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mercury_spi_isoc_properties;</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mercury_tp_bulk_properties;</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mercury_tp_isoc_properties;</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mercury_mh_spi_bulk_properties;</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mercury_mh_spi_isoc_properties;</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mercury_mh_tp_bulk_properties;</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mercury_mh_tp_isoc_properties;</div><div class='ctx'> </div><div class='ctx'> static int mxl111sf_probe(struct usb_interface *intf,</div><div class='ctx'> 			  const struct usb_device_id *id)</div><div class='hunk'>@@ -664,12 +956,50 @@ static int mxl111sf_probe(struct usb_interface *intf,</div><div class='ctx'> 				       THIS_MODULE, &amp;d, adapter_nr) ||</div><div class='ctx'> 	      0 == dvb_usb_device_init(intf,</div><div class='ctx'> 				       &amp;mxl111sf_atsc_isoc_properties,</div><div class='add'>+				       THIS_MODULE, &amp;d, adapter_nr) ||</div><div class='add'>+	      0 == dvb_usb_device_init(intf,</div><div class='add'>+				       &amp;mxl111sf_atsc_mh_isoc_properties,</div><div class='add'>+				       THIS_MODULE, &amp;d, adapter_nr) ||</div><div class='add'>+	      0 == dvb_usb_device_init(intf,</div><div class='add'>+				       &amp;mxl111sf_mh_isoc_properties,</div><div class='add'>+				       THIS_MODULE, &amp;d, adapter_nr) ||</div><div class='add'>+	      ((dvb_usb_mxl111sf_spi) &amp;&amp;</div><div class='add'>+	       (0 == dvb_usb_device_init(intf,</div><div class='add'>+					 &amp;mxl111sf_mercury_spi_isoc_properties,</div><div class='add'>+					 THIS_MODULE, &amp;d, adapter_nr) ||</div><div class='add'>+		0 == dvb_usb_device_init(intf,</div><div class='add'>+					 &amp;mxl111sf_mercury_mh_spi_isoc_properties,</div><div class='add'>+					 THIS_MODULE, &amp;d, adapter_nr))) ||</div><div class='add'>+	      0 == dvb_usb_device_init(intf,</div><div class='add'>+				       &amp;mxl111sf_mercury_tp_isoc_properties,</div><div class='add'>+				       THIS_MODULE, &amp;d, adapter_nr) ||</div><div class='add'>+	      0 == dvb_usb_device_init(intf,</div><div class='add'>+				       &amp;mxl111sf_mercury_mh_tp_isoc_properties,</div><div class='ctx'> 				       THIS_MODULE, &amp;d, adapter_nr))) ||</div><div class='ctx'> 	    0 == dvb_usb_device_init(intf,</div><div class='ctx'> 				     &amp;mxl111sf_dvbt_bulk_properties,</div><div class='ctx'> 				     THIS_MODULE, &amp;d, adapter_nr) ||</div><div class='ctx'> 	    0 == dvb_usb_device_init(intf,</div><div class='ctx'> 				     &amp;mxl111sf_atsc_bulk_properties,</div><div class='add'>+				     THIS_MODULE, &amp;d, adapter_nr) ||</div><div class='add'>+	    0 == dvb_usb_device_init(intf,</div><div class='add'>+				     &amp;mxl111sf_atsc_mh_bulk_properties,</div><div class='add'>+				     THIS_MODULE, &amp;d, adapter_nr) ||</div><div class='add'>+	    0 == dvb_usb_device_init(intf,</div><div class='add'>+				     &amp;mxl111sf_mh_bulk_properties,</div><div class='add'>+				     THIS_MODULE, &amp;d, adapter_nr) ||</div><div class='add'>+	    ((dvb_usb_mxl111sf_spi) &amp;&amp;</div><div class='add'>+	     (0 == dvb_usb_device_init(intf,</div><div class='add'>+				       &amp;mxl111sf_mercury_spi_bulk_properties,</div><div class='add'>+				       THIS_MODULE, &amp;d, adapter_nr) ||</div><div class='add'>+	      0 == dvb_usb_device_init(intf,</div><div class='add'>+				       &amp;mxl111sf_mercury_mh_spi_bulk_properties,</div><div class='add'>+				       THIS_MODULE, &amp;d, adapter_nr))) ||</div><div class='add'>+	    0 == dvb_usb_device_init(intf,</div><div class='add'>+				     &amp;mxl111sf_mercury_tp_bulk_properties,</div><div class='add'>+				     THIS_MODULE, &amp;d, adapter_nr) ||</div><div class='add'>+	    0 == dvb_usb_device_init(intf,</div><div class='add'>+				     &amp;mxl111sf_mercury_mh_tp_bulk_properties,</div><div class='ctx'> 				     THIS_MODULE, &amp;d, adapter_nr) || 0) {</div><div class='ctx'> </div><div class='ctx'> 		struct mxl111sf_state *state = d-&gt;priv;</div><div class='hunk'>@@ -787,6 +1117,36 @@ MODULE_DEVICE_TABLE(usb, mxl111sf_table);</div><div class='ctx'> 		}					\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#define MXL111SF_EP5_BULK_STREAMING_CONFIG		\</div><div class='add'>+	.size_of_priv = sizeof(struct mxl111sf_adap_state), \</div><div class='add'>+	.streaming_ctrl = mxl111sf_ep5_streaming_ctrl,	\</div><div class='add'>+	.stream = {					\</div><div class='add'>+		.type = USB_BULK,			\</div><div class='add'>+		.count = 5,				\</div><div class='add'>+		.endpoint = 0x05,			\</div><div class='add'>+		.u = {					\</div><div class='add'>+			.bulk = {			\</div><div class='add'>+				.buffersize = 8192,	\</div><div class='add'>+			}				\</div><div class='add'>+		}					\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define MXL111SF_EP5_ISOC_STREAMING_CONFIG		\</div><div class='add'>+	.size_of_priv = sizeof(struct mxl111sf_adap_state), \</div><div class='add'>+	.streaming_ctrl = mxl111sf_ep5_streaming_ctrl,	\</div><div class='add'>+	.stream = {					\</div><div class='add'>+		.type = USB_ISOC,			\</div><div class='add'>+		.count = 5,				\</div><div class='add'>+		.endpoint = 0x05,			\</div><div class='add'>+		.u = {					\</div><div class='add'>+			.isoc = {			\</div><div class='add'>+				.framesperurb = 96,	\</div><div class='add'>+				.framesize = 200,	\</div><div class='add'>+				.interval = 1,		\</div><div class='add'>+			}				\</div><div class='add'>+		}					\</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> #define MXL111SF_EP6_BULK_STREAMING_CONFIG		\</div><div class='ctx'> 	.size_of_priv = sizeof(struct mxl111sf_adap_state), \</div><div class='ctx'> 	.streaming_ctrl = mxl111sf_ep6_streaming_ctrl,	\</div><div class='hunk'>@@ -848,7 +1208,7 @@ static struct dvb_usb_device_properties mxl111sf_dvbt_bulk_properties = {</div><div class='ctx'> 		} },</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.num_device_descs = 4,</div><div class='add'>+	.num_device_descs = 3,</div><div class='ctx'> 	.devices = {</div><div class='ctx'> 		{   "Hauppauge 126xxx DVBT (bulk)",</div><div class='ctx'> 			{ NULL },</div><div class='hunk'>@@ -866,11 +1226,6 @@ static struct dvb_usb_device_properties mxl111sf_dvbt_bulk_properties = {</div><div class='ctx'> 			  &amp;mxl111sf_table[24], &amp;mxl111sf_table[26],</div><div class='ctx'> 			  NULL },</div><div class='ctx'> 		},</div><div class='del'>-		{   "Hauppauge 126xxx (tp-bulk)",</div><div class='del'>-			{ NULL },</div><div class='del'>-			{ &amp;mxl111sf_table[28], &amp;mxl111sf_table[30],</div><div class='del'>-			  NULL },</div><div class='del'>-		},</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -890,7 +1245,7 @@ static struct dvb_usb_device_properties mxl111sf_dvbt_isoc_properties = {</div><div class='ctx'> 		} },</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.num_device_descs = 4,</div><div class='add'>+	.num_device_descs = 3,</div><div class='ctx'> 	.devices = {</div><div class='ctx'> 		{   "Hauppauge 126xxx DVBT (isoc)",</div><div class='ctx'> 			{ NULL },</div><div class='hunk'>@@ -908,11 +1263,6 @@ static struct dvb_usb_device_properties mxl111sf_dvbt_isoc_properties = {</div><div class='ctx'> 			  &amp;mxl111sf_table[24], &amp;mxl111sf_table[26],</div><div class='ctx'> 			  NULL },</div><div class='ctx'> 		},</div><div class='del'>-		{   "Hauppauge 126xxx (tp-isoc)",</div><div class='del'>-			{ NULL },</div><div class='del'>-			{ &amp;mxl111sf_table[28], &amp;mxl111sf_table[30],</div><div class='del'>-			  NULL },</div><div class='del'>-		},</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -923,33 +1273,159 @@ static struct dvb_usb_device_properties mxl111sf_atsc_bulk_properties = {</div><div class='ctx'> 	.adapter = {</div><div class='ctx'> 		{</div><div class='ctx'> 		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='del'>-		.num_frontends = 2,</div><div class='add'>+		.num_frontends = 1,</div><div class='ctx'> 		.fe = {{</div><div class='ctx'> 			.frontend_attach  = mxl111sf_lgdt3305_frontend_attach,</div><div class='ctx'> 			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='ctx'> </div><div class='ctx'> 			MXL111SF_EP6_BULK_STREAMING_CONFIG,</div><div class='add'>+		}},</div><div class='ctx'> 		},</div><div class='add'>+	},</div><div class='add'>+	.num_device_descs = 2,</div><div class='add'>+	.devices = {</div><div class='add'>+		{   "Hauppauge 126xxx ATSC (bulk)",</div><div class='add'>+			{ NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[1], &amp;mxl111sf_table[5],</div><div class='add'>+			  NULL },</div><div class='add'>+		},</div><div class='add'>+		{   "Hauppauge 117xxx ATSC (bulk)",</div><div class='add'>+			{ NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[12],</div><div class='add'>+			  NULL },</div><div class='add'>+		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_atsc_isoc_properties = {</div><div class='add'>+	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='add'>+</div><div class='add'>+	.num_adapters = 1,</div><div class='add'>+	.adapter = {</div><div class='ctx'> 		{</div><div class='del'>-			.frontend_attach  = mxl111sf_attach_demod,</div><div class='add'>+		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='add'>+		.num_frontends = 1,</div><div class='add'>+		.fe = {{</div><div class='add'>+			.frontend_attach  = mxl111sf_lgdt3305_frontend_attach,</div><div class='ctx'> 			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='ctx'> </div><div class='del'>-			MXL111SF_EP4_BULK_STREAMING_CONFIG,</div><div class='add'>+			MXL111SF_EP6_ISOC_STREAMING_CONFIG,</div><div class='ctx'> 		}},</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.num_device_descs = 6,</div><div class='add'>+	.num_device_descs = 2,</div><div class='ctx'> 	.devices = {</div><div class='del'>-		{   "Hauppauge 126xxx ATSC (bulk)",</div><div class='add'>+		{   "Hauppauge 126xxx ATSC (isoc)",</div><div class='ctx'> 			{ NULL },</div><div class='ctx'> 			{ &amp;mxl111sf_table[1], &amp;mxl111sf_table[5],</div><div class='ctx'> 			  NULL },</div><div class='ctx'> 		},</div><div class='del'>-		{   "Hauppauge 117xxx ATSC (bulk)",</div><div class='add'>+		{   "Hauppauge 117xxx ATSC (isoc)",</div><div class='ctx'> 			{ NULL },</div><div class='ctx'> 			{ &amp;mxl111sf_table[12],</div><div class='ctx'> 			  NULL },</div><div class='ctx'> 		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mh_bulk_properties = {</div><div class='add'>+	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='add'>+</div><div class='add'>+	.num_adapters = 1,</div><div class='add'>+	.adapter = {</div><div class='add'>+		{</div><div class='add'>+		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='add'>+		.num_frontends = 1,</div><div class='add'>+		.fe = {{</div><div class='add'>+			.caps = DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD,</div><div class='add'>+</div><div class='add'>+			.frontend_attach  = mxl111sf_lg2160_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP5_BULK_STREAMING_CONFIG,</div><div class='add'>+		}},</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.num_device_descs = 2,</div><div class='add'>+	.devices = {</div><div class='add'>+		{   "HCW 126xxx (bulk)",</div><div class='add'>+			{ NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[2], &amp;mxl111sf_table[6],</div><div class='add'>+			  NULL },</div><div class='add'>+		},</div><div class='add'>+		{   "HCW 117xxx (bulk)",</div><div class='add'>+			{ NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[13],</div><div class='add'>+			  NULL },</div><div class='add'>+		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mh_isoc_properties = {</div><div class='add'>+	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='add'>+</div><div class='add'>+	.num_adapters = 1,</div><div class='add'>+	.adapter = {</div><div class='add'>+		{</div><div class='add'>+		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='add'>+		.num_frontends = 1,</div><div class='add'>+		.fe = {{</div><div class='add'>+			.caps = DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD,</div><div class='add'>+</div><div class='add'>+			.frontend_attach  = mxl111sf_lg2160_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP5_ISOC_STREAMING_CONFIG,</div><div class='add'>+		}},</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.num_device_descs = 2,</div><div class='add'>+	.devices = {</div><div class='add'>+		{   "HCW 126xxx (isoc)",</div><div class='add'>+			{ NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[2], &amp;mxl111sf_table[6],</div><div class='add'>+			  NULL },</div><div class='add'>+		},</div><div class='add'>+		{   "HCW 117xxx (isoc)",</div><div class='add'>+			{ NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[13],</div><div class='add'>+			  NULL },</div><div class='add'>+		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_atsc_mh_bulk_properties = {</div><div class='add'>+	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='add'>+</div><div class='add'>+	.num_adapters = 1,</div><div class='add'>+	.adapter = {</div><div class='add'>+		{</div><div class='add'>+		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='add'>+		.num_frontends = 3,</div><div class='add'>+		.fe = {{</div><div class='add'>+			.frontend_attach  = mxl111sf_lgdt3305_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP6_BULK_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.frontend_attach  = mxl111sf_attach_demod,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP4_BULK_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.caps = DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD,</div><div class='add'>+</div><div class='add'>+			.frontend_attach  = mxl111sf_lg2160_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP5_BULK_STREAMING_CONFIG,</div><div class='add'>+		}},</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.num_device_descs = 2,</div><div class='add'>+	.devices = {</div><div class='ctx'> 		{   "Hauppauge 126xxx ATSC+ (bulk)",</div><div class='ctx'> 			{ NULL },</div><div class='ctx'> 			{ &amp;mxl111sf_table[0], &amp;mxl111sf_table[3],</div><div class='hunk'>@@ -963,13 +1439,96 @@ static struct dvb_usb_device_properties mxl111sf_atsc_bulk_properties = {</div><div class='ctx'> 			  &amp;mxl111sf_table[32], &amp;mxl111sf_table[33],</div><div class='ctx'> 			  NULL },</div><div class='ctx'> 		},</div><div class='del'>-		{   "Hauppauge Mercury (tp-bulk)",</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_atsc_mh_isoc_properties = {</div><div class='add'>+	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='add'>+</div><div class='add'>+	.num_adapters = 1,</div><div class='add'>+	.adapter = {</div><div class='add'>+		{</div><div class='add'>+		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='add'>+		.num_frontends = 3,</div><div class='add'>+		.fe = {{</div><div class='add'>+			.frontend_attach  = mxl111sf_lgdt3305_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP6_ISOC_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.frontend_attach  = mxl111sf_attach_demod,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP4_ISOC_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.caps = DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD,</div><div class='add'>+</div><div class='add'>+			.frontend_attach  = mxl111sf_lg2160_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP5_ISOC_STREAMING_CONFIG,</div><div class='add'>+		}},</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.num_device_descs = 2,</div><div class='add'>+	.devices = {</div><div class='add'>+		{   "Hauppauge 126xxx ATSC+ (isoc)",</div><div class='add'>+			{ NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[0], &amp;mxl111sf_table[3],</div><div class='add'>+			  &amp;mxl111sf_table[7], &amp;mxl111sf_table[9],</div><div class='add'>+			  &amp;mxl111sf_table[10], NULL },</div><div class='add'>+		},</div><div class='add'>+		{   "Hauppauge 117xxx ATSC+ (isoc)",</div><div class='add'>+			{ NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[11], &amp;mxl111sf_table[14],</div><div class='add'>+			  &amp;mxl111sf_table[16], &amp;mxl111sf_table[17],</div><div class='add'>+			  &amp;mxl111sf_table[32], &amp;mxl111sf_table[33],</div><div class='add'>+			  NULL },</div><div class='add'>+		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mercury_spi_bulk_properties = {</div><div class='add'>+	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='add'>+</div><div class='add'>+	.num_adapters = 1,</div><div class='add'>+	.adapter = {</div><div class='add'>+		{</div><div class='add'>+		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='add'>+		.num_frontends = 3,</div><div class='add'>+		.fe = {{</div><div class='add'>+			.frontend_attach  = mxl111sf_lgdt3305_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP6_BULK_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.frontend_attach  = mxl111sf_attach_demod,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP4_BULK_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.caps = DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD,</div><div class='add'>+</div><div class='add'>+			.frontend_attach  = mxl111sf_lg2161_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP5_BULK_STREAMING_CONFIG,</div><div class='add'>+		}},</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.num_device_descs = 2,</div><div class='add'>+	.devices = {</div><div class='add'>+		{   "Hauppauge Mercury (spi-bulk)",</div><div class='ctx'> 			{ NULL },</div><div class='ctx'> 			{ &amp;mxl111sf_table[19], &amp;mxl111sf_table[21],</div><div class='ctx'> 			  &amp;mxl111sf_table[23], &amp;mxl111sf_table[25],</div><div class='del'>-			  &amp;mxl111sf_table[27], NULL },</div><div class='add'>+			  NULL },</div><div class='ctx'> 		},</div><div class='del'>-		{   "Hauppauge WinTV-Aero-M",</div><div class='add'>+		{   "Hauppauge WinTV-Aero-M (spi-bulk)",</div><div class='ctx'> 			{ NULL },</div><div class='ctx'> 			{ &amp;mxl111sf_table[29], &amp;mxl111sf_table[31],</div><div class='ctx'> 			  NULL },</div><div class='hunk'>@@ -977,14 +1536,14 @@ static struct dvb_usb_device_properties mxl111sf_atsc_bulk_properties = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct dvb_usb_device_properties mxl111sf_atsc_isoc_properties = {</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mercury_spi_isoc_properties = {</div><div class='ctx'> 	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='ctx'> </div><div class='ctx'> 	.num_adapters = 1,</div><div class='ctx'> 	.adapter = {</div><div class='ctx'> 		{</div><div class='ctx'> 		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='del'>-		.num_frontends = 2,</div><div class='add'>+		.num_frontends = 3,</div><div class='ctx'> 		.fe = {{</div><div class='ctx'> 			.frontend_attach  = mxl111sf_lgdt3305_frontend_attach,</div><div class='ctx'> 			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='hunk'>@@ -996,34 +1555,111 @@ static struct dvb_usb_device_properties mxl111sf_atsc_isoc_properties = {</div><div class='ctx'> 			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='ctx'> </div><div class='ctx'> 			MXL111SF_EP4_ISOC_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.caps = DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD,</div><div class='add'>+</div><div class='add'>+			.frontend_attach  = mxl111sf_lg2161_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP5_ISOC_STREAMING_CONFIG,</div><div class='ctx'> 		}},</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='del'>-	.num_device_descs = 6,</div><div class='add'>+	.num_device_descs = 2,</div><div class='ctx'> 	.devices = {</div><div class='del'>-		{   "Hauppauge 126xxx ATSC (isoc)",</div><div class='add'>+		{   "Hauppauge Mercury (spi-isoc)",</div><div class='ctx'> 			{ NULL },</div><div class='del'>-			{ &amp;mxl111sf_table[1], &amp;mxl111sf_table[5],</div><div class='add'>+			{ &amp;mxl111sf_table[19], &amp;mxl111sf_table[21],</div><div class='add'>+			  &amp;mxl111sf_table[23], &amp;mxl111sf_table[25],</div><div class='ctx'> 			  NULL },</div><div class='ctx'> 		},</div><div class='del'>-		{   "Hauppauge 117xxx ATSC (isoc)",</div><div class='add'>+		{   "Hauppauge WinTV-Aero-M (spi-isoc)",</div><div class='ctx'> 			{ NULL },</div><div class='del'>-			{ &amp;mxl111sf_table[12],</div><div class='add'>+			{ &amp;mxl111sf_table[29], &amp;mxl111sf_table[31],</div><div class='ctx'> 			  NULL },</div><div class='ctx'> 		},</div><div class='del'>-		{   "Hauppauge 126xxx ATSC+ (isoc)",</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mercury_tp_bulk_properties = {</div><div class='add'>+	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='add'>+</div><div class='add'>+	.num_adapters = 1,</div><div class='add'>+	.adapter = {</div><div class='add'>+		{</div><div class='add'>+		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='add'>+		.num_frontends = 3,</div><div class='add'>+		.fe = {{</div><div class='add'>+			.frontend_attach  = mxl111sf_lgdt3305_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP6_BULK_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.frontend_attach  = mxl111sf_attach_demod,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP4_BULK_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.caps = DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD,</div><div class='add'>+</div><div class='add'>+			.frontend_attach  = mxl111sf_lg2161_ep6_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP6_BULK_STREAMING_CONFIG,</div><div class='add'>+		}},</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.num_device_descs = 2,</div><div class='add'>+	.devices = {</div><div class='add'>+		{   "Hauppauge Mercury (tp-bulk)",</div><div class='ctx'> 			{ NULL },</div><div class='del'>-			{ &amp;mxl111sf_table[0], &amp;mxl111sf_table[3],</div><div class='del'>-			  &amp;mxl111sf_table[7], &amp;mxl111sf_table[9],</div><div class='del'>-			  &amp;mxl111sf_table[10], NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[19], &amp;mxl111sf_table[21],</div><div class='add'>+			  &amp;mxl111sf_table[23], &amp;mxl111sf_table[25],</div><div class='add'>+			  &amp;mxl111sf_table[27], NULL },</div><div class='ctx'> 		},</div><div class='del'>-		{   "Hauppauge 117xxx ATSC+ (isoc)",</div><div class='add'>+		{   "Hauppauge WinTV-Aero-M",</div><div class='ctx'> 			{ NULL },</div><div class='del'>-			{ &amp;mxl111sf_table[11], &amp;mxl111sf_table[14],</div><div class='del'>-			  &amp;mxl111sf_table[16], &amp;mxl111sf_table[17],</div><div class='del'>-			  &amp;mxl111sf_table[32], &amp;mxl111sf_table[33],</div><div class='add'>+			{ &amp;mxl111sf_table[29], &amp;mxl111sf_table[31],</div><div class='ctx'> 			  NULL },</div><div class='ctx'> 		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dvb_usb_device_properties mxl111sf_mercury_tp_isoc_properties = {</div><div class='add'>+	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='add'>+</div><div class='add'>+	.num_adapters = 1,</div><div class='add'>+	.adapter = {</div><div class='add'>+		{</div><div class='add'>+		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='add'>+		.num_frontends = 3,</div><div class='add'>+		.fe = {{</div><div class='add'>+			.frontend_attach  = mxl111sf_lgdt3305_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP6_ISOC_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.frontend_attach  = mxl111sf_attach_demod,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP4_ISOC_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.caps = DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD,</div><div class='add'>+</div><div class='add'>+			.frontend_attach  = mxl111sf_lg2161_ep6_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP6_ISOC_STREAMING_CONFIG,</div><div class='add'>+		}},</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.num_device_descs = 2,</div><div class='add'>+	.devices = {</div><div class='ctx'> 		{   "Hauppauge Mercury (tp-isoc)",</div><div class='ctx'> 			{ NULL },</div><div class='ctx'> 			{ &amp;mxl111sf_table[19], &amp;mxl111sf_table[21],</div><div class='hunk'>@@ -1038,6 +1674,146 @@ static struct dvb_usb_device_properties mxl111sf_atsc_isoc_properties = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static</div><div class='add'>+struct dvb_usb_device_properties mxl111sf_mercury_mh_tp_bulk_properties = {</div><div class='add'>+	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='add'>+</div><div class='add'>+	.num_adapters = 1,</div><div class='add'>+	.adapter = {</div><div class='add'>+		{</div><div class='add'>+		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='add'>+		.num_frontends = 2,</div><div class='add'>+		.fe = {{</div><div class='add'>+			.frontend_attach  = mxl111sf_attach_demod,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP4_BULK_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.caps = DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD,</div><div class='add'>+</div><div class='add'>+			.frontend_attach  = mxl111sf_lg2161_ep6_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP6_BULK_STREAMING_CONFIG,</div><div class='add'>+		}},</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.num_device_descs = 1,</div><div class='add'>+	.devices = {</div><div class='add'>+		{   "Hauppauge 126xxx (tp-bulk)",</div><div class='add'>+			{ NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[28], &amp;mxl111sf_table[30],</div><div class='add'>+			  NULL },</div><div class='add'>+		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static</div><div class='add'>+struct dvb_usb_device_properties mxl111sf_mercury_mh_tp_isoc_properties = {</div><div class='add'>+	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='add'>+</div><div class='add'>+	.num_adapters = 1,</div><div class='add'>+	.adapter = {</div><div class='add'>+		{</div><div class='add'>+		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='add'>+		.num_frontends = 2,</div><div class='add'>+		.fe = {{</div><div class='add'>+			.frontend_attach  = mxl111sf_attach_demod,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP4_ISOC_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.caps = DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD,</div><div class='add'>+</div><div class='add'>+			.frontend_attach  = mxl111sf_lg2161_ep6_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP6_ISOC_STREAMING_CONFIG,</div><div class='add'>+		}},</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.num_device_descs = 1,</div><div class='add'>+	.devices = {</div><div class='add'>+		{   "Hauppauge 126xxx (tp-isoc)",</div><div class='add'>+			{ NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[28], &amp;mxl111sf_table[30],</div><div class='add'>+			  NULL },</div><div class='add'>+		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static</div><div class='add'>+struct dvb_usb_device_properties mxl111sf_mercury_mh_spi_bulk_properties = {</div><div class='add'>+	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='add'>+</div><div class='add'>+	.num_adapters = 1,</div><div class='add'>+	.adapter = {</div><div class='add'>+		{</div><div class='add'>+		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='add'>+		.num_frontends = 2,</div><div class='add'>+		.fe = {{</div><div class='add'>+			.frontend_attach  = mxl111sf_attach_demod,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP4_BULK_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.caps = DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD,</div><div class='add'>+</div><div class='add'>+			.frontend_attach  = mxl111sf_lg2161_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP5_BULK_STREAMING_CONFIG,</div><div class='add'>+		}},</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.num_device_descs = 1,</div><div class='add'>+	.devices = {</div><div class='add'>+		{   "Hauppauge 126xxx (spi-bulk)",</div><div class='add'>+			{ NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[28], &amp;mxl111sf_table[30],</div><div class='add'>+			  NULL },</div><div class='add'>+		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static</div><div class='add'>+struct dvb_usb_device_properties mxl111sf_mercury_mh_spi_isoc_properties = {</div><div class='add'>+	MXL111SF_DEFAULT_DEVICE_PROPERTIES,</div><div class='add'>+</div><div class='add'>+	.num_adapters = 1,</div><div class='add'>+	.adapter = {</div><div class='add'>+		{</div><div class='add'>+		.fe_ioctl_override = mxl111sf_fe_ioctl_override,</div><div class='add'>+		.num_frontends = 2,</div><div class='add'>+		.fe = {{</div><div class='add'>+			.frontend_attach  = mxl111sf_attach_demod,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP4_ISOC_STREAMING_CONFIG,</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.caps = DVB_USB_ADAP_RECEIVES_RAW_PAYLOAD,</div><div class='add'>+</div><div class='add'>+			.frontend_attach  = mxl111sf_lg2161_frontend_attach,</div><div class='add'>+			.tuner_attach     = mxl111sf_attach_tuner,</div><div class='add'>+</div><div class='add'>+			MXL111SF_EP5_ISOC_STREAMING_CONFIG,</div><div class='add'>+		}},</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.num_device_descs = 1,</div><div class='add'>+	.devices = {</div><div class='add'>+		{   "Hauppauge 126xxx (spi-isoc)",</div><div class='add'>+			{ NULL },</div><div class='add'>+			{ &amp;mxl111sf_table[28], &amp;mxl111sf_table[30],</div><div class='add'>+			  NULL },</div><div class='add'>+		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct usb_driver mxl111sf_driver = {</div><div class='ctx'> 	.name		= "dvb_usb_mxl111sf",</div><div class='ctx'> 	.probe		= mxl111sf_probe,</div><div class='head'>diff --git a/drivers/media/dvb/dvb-usb/rtl28xxu.c b/drivers/media/dvb/dvb-usb/rtl28xxu.c<br/>index 8f4736a10fc8..41e1f5537f44 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/rtl28xxu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/dvb-usb/rtl28xxu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/dvb-usb/rtl28xxu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/dvb-usb/rtl28xxu.c</a></div><div class='hunk'>@@ -322,6 +322,9 @@ static int rtl2831u_frontend_attach(struct dvb_usb_adapter *adap)</div><div class='ctx'> 	 * since there is some demod params needed to set according to tuner.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='add'>+	/* demod needs some time to wake up */</div><div class='add'>+	msleep(20);</div><div class='add'>+</div><div class='ctx'> 	/* open demod I2C gate */</div><div class='ctx'> 	ret = rtl28xxu_ctrl_msg(adap-&gt;dev, &amp;req_gate);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -909,6 +912,8 @@ static int rtl28xxu_probe(struct usb_interface *intf,</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> 	int properties_count = ARRAY_SIZE(rtl28xxu_properties);</div><div class='ctx'> 	struct dvb_usb_device *d;</div><div class='add'>+	struct usb_device *udev;</div><div class='add'>+	bool found;</div><div class='ctx'> </div><div class='ctx'> 	deb_info("%s: interface=%d\n", __func__,</div><div class='ctx'> 		intf-&gt;cur_altsetting-&gt;desc.bInterfaceNumber);</div><div class='hunk'>@@ -916,6 +921,29 @@ static int rtl28xxu_probe(struct usb_interface *intf,</div><div class='ctx'> 	if (intf-&gt;cur_altsetting-&gt;desc.bInterfaceNumber != 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	/* Dynamic USB ID support. Replaces first device ID with current one .*/</div><div class='add'>+	udev = interface_to_usbdev(intf);</div><div class='add'>+</div><div class='add'>+	for (i = 0, found = false; i &lt; ARRAY_SIZE(rtl28xxu_table) - 1; i++) {</div><div class='add'>+		if (rtl28xxu_table[i].idVendor ==</div><div class='add'>+				le16_to_cpu(udev-&gt;descriptor.idVendor) &amp;&amp;</div><div class='add'>+				rtl28xxu_table[i].idProduct ==</div><div class='add'>+				le16_to_cpu(udev-&gt;descriptor.idProduct)) {</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!found) {</div><div class='add'>+		deb_info("%s: using dynamic ID %04x:%04x\n", __func__,</div><div class='add'>+				le16_to_cpu(udev-&gt;descriptor.idVendor),</div><div class='add'>+				le16_to_cpu(udev-&gt;descriptor.idProduct));</div><div class='add'>+		rtl28xxu_properties[0].devices[0].warm_ids[0]-&gt;idVendor =</div><div class='add'>+				le16_to_cpu(udev-&gt;descriptor.idVendor);</div><div class='add'>+		rtl28xxu_properties[0].devices[0].warm_ids[0]-&gt;idProduct =</div><div class='add'>+				le16_to_cpu(udev-&gt;descriptor.idProduct);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; properties_count; i++) {</div><div class='ctx'> 		ret = dvb_usb_device_init(intf, &amp;rtl28xxu_properties[i],</div><div class='ctx'> 				THIS_MODULE, &amp;d, adapter_nr);</div><div class='head'>diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig<br/>index 21246707fbfb..b98ebb264e29 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/Kconfig</a></div><div class='hunk'>@@ -531,6 +531,14 @@ config DVB_LGDT3305</div><div class='ctx'> 	  An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want</div><div class='ctx'> 	  to support this frontend.</div><div class='ctx'> </div><div class='add'>+config DVB_LG2160</div><div class='add'>+	tristate "LG Electronics LG216x based"</div><div class='add'>+	depends on DVB_CORE &amp;&amp; I2C</div><div class='add'>+	default m if DVB_FE_CUSTOMISE</div><div class='add'>+	help</div><div class='add'>+	  An ATSC/MH demodulator module. Say Y when you want</div><div class='add'>+	  to support this frontend.</div><div class='add'>+</div><div class='ctx'> config DVB_S5H1409</div><div class='ctx'> 	tristate "Samsung S5H1409 based"</div><div class='ctx'> 	depends on DVB_CORE &amp;&amp; I2C</div><div class='hunk'>@@ -540,12 +548,26 @@ config DVB_S5H1409</div><div class='ctx'> 	  to support this frontend.</div><div class='ctx'> </div><div class='ctx'> config DVB_AU8522</div><div class='del'>-	tristate "Auvitek AU8522 based"</div><div class='del'>-	depends on DVB_CORE &amp;&amp; I2C &amp;&amp; VIDEO_V4L2</div><div class='add'>+	depends on I2C</div><div class='add'>+	tristate</div><div class='add'>+</div><div class='add'>+config DVB_AU8522_DTV</div><div class='add'>+	tristate "Auvitek AU8522 based DTV demod"</div><div class='add'>+	depends on DVB_CORE &amp;&amp; I2C</div><div class='add'>+	select DVB_AU8522</div><div class='ctx'> 	default m if DVB_FE_CUSTOMISE</div><div class='ctx'> 	help</div><div class='del'>-	  An ATSC 8VSB and QAM64/256 tuner module. Say Y when you want</div><div class='del'>-	  to support this frontend.</div><div class='add'>+	  An ATSC 8VSB, QAM64/256 &amp; NTSC demodulator module. Say Y when</div><div class='add'>+	  you want to enable DTV demodulation support for this frontend.</div><div class='add'>+</div><div class='add'>+config DVB_AU8522_V4L</div><div class='add'>+	tristate "Auvitek AU8522 based ATV demod"</div><div class='add'>+	depends on VIDEO_V4L2 &amp;&amp; I2C</div><div class='add'>+	select DVB_AU8522</div><div class='add'>+	default m if DVB_FE_CUSTOMISE</div><div class='add'>+	help</div><div class='add'>+	  An ATSC 8VSB, QAM64/256 &amp; NTSC demodulator module. Say Y when</div><div class='add'>+	  you want to enable ATV demodulation support for this frontend.</div><div class='ctx'> </div><div class='ctx'> config DVB_S5H1411</div><div class='ctx'> 	tristate "Samsung S5H1411 based"</div><div class='hunk'>@@ -713,6 +735,11 @@ config DVB_M88RS2000</div><div class='ctx'> 	  A DVB-S tuner module.</div><div class='ctx'> 	  Say Y when you want to support this frontend.</div><div class='ctx'> </div><div class='add'>+config DVB_AF9033</div><div class='add'>+	tristate "Afatech AF9033 DVB-T demodulator"</div><div class='add'>+	depends on DVB_CORE &amp;&amp; I2C</div><div class='add'>+	default m if DVB_FE_CUSTOMISE</div><div class='add'>+</div><div class='ctx'> comment "Tools to develop new frontends"</div><div class='ctx'> </div><div class='ctx'> config DVB_DUMMY_FE</div><div class='head'>diff --git a/drivers/media/dvb/frontends/Makefile b/drivers/media/dvb/frontends/Makefile<br/>index 86fa808bf589..cd1ac2fd5774 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/Makefile</a></div><div class='hunk'>@@ -7,7 +7,6 @@ ccflags-y += -I$(srctree)/drivers/media/common/tuners/</div><div class='ctx'> </div><div class='ctx'> stb0899-objs = stb0899_drv.o stb0899_algo.o</div><div class='ctx'> stv0900-objs = stv0900_core.o stv0900_sw.o</div><div class='del'>-au8522-objs = au8522_dig.o au8522_decoder.o</div><div class='ctx'> drxd-objs = drxd_firm.o drxd_hard.o</div><div class='ctx'> cxd2820r-objs = cxd2820r_core.o cxd2820r_c.o cxd2820r_t.o cxd2820r_t2.o</div><div class='ctx'> drxk-objs := drxk_hard.o</div><div class='hunk'>@@ -50,6 +49,7 @@ obj-$(CONFIG_DVB_BCM3510) += bcm3510.o</div><div class='ctx'> obj-$(CONFIG_DVB_S5H1420) += s5h1420.o</div><div class='ctx'> obj-$(CONFIG_DVB_LGDT330X) += lgdt330x.o</div><div class='ctx'> obj-$(CONFIG_DVB_LGDT3305) += lgdt3305.o</div><div class='add'>+obj-$(CONFIG_DVB_LG2160) += lg2160.o</div><div class='ctx'> obj-$(CONFIG_DVB_CX24123) += cx24123.o</div><div class='ctx'> obj-$(CONFIG_DVB_LNBP21) += lnbp21.o</div><div class='ctx'> obj-$(CONFIG_DVB_LNBP22) += lnbp22.o</div><div class='hunk'>@@ -63,7 +63,9 @@ obj-$(CONFIG_DVB_TUNER_DIB0090) += dib0090.o</div><div class='ctx'> obj-$(CONFIG_DVB_TUA6100) += tua6100.o</div><div class='ctx'> obj-$(CONFIG_DVB_S5H1409) += s5h1409.o</div><div class='ctx'> obj-$(CONFIG_DVB_TUNER_ITD1000) += itd1000.o</div><div class='del'>-obj-$(CONFIG_DVB_AU8522) += au8522.o</div><div class='add'>+obj-$(CONFIG_DVB_AU8522) += au8522_common.o</div><div class='add'>+obj-$(CONFIG_DVB_AU8522_DTV) += au8522_dig.o</div><div class='add'>+obj-$(CONFIG_DVB_AU8522_V4L) += au8522_decoder.o</div><div class='ctx'> obj-$(CONFIG_DVB_TDA10048) += tda10048.o</div><div class='ctx'> obj-$(CONFIG_DVB_TUNER_CX24113) += cx24113.o</div><div class='ctx'> obj-$(CONFIG_DVB_S5H1411) += s5h1411.o</div><div class='hunk'>@@ -98,4 +100,5 @@ obj-$(CONFIG_DVB_A8293) += a8293.o</div><div class='ctx'> obj-$(CONFIG_DVB_TDA10071) += tda10071.o</div><div class='ctx'> obj-$(CONFIG_DVB_RTL2830) += rtl2830.o</div><div class='ctx'> obj-$(CONFIG_DVB_M88RS2000) += m88rs2000.o</div><div class='add'>+obj-$(CONFIG_DVB_AF9033) += af9033.o</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/dvb/frontends/af9013.c b/drivers/media/dvb/frontends/af9013.c<br/>index 6bcbcf543b38..5bc570d77846 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/af9013.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/af9013.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/af9013.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/af9013.c</a></div><div class='hunk'>@@ -514,7 +514,6 @@ err:</div><div class='ctx'> </div><div class='ctx'> static void af9013_statistics_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='ctx'> 	struct af9013_state *state = container_of(work,</div><div class='ctx'> 		struct af9013_state, statistics_work.work);</div><div class='ctx'> 	unsigned int next_msec;</div><div class='hunk'>@@ -530,27 +529,27 @@ static void af9013_statistics_work(struct work_struct *work)</div><div class='ctx'> 	default:</div><div class='ctx'> 		state-&gt;statistics_step = 0;</div><div class='ctx'> 	case 0:</div><div class='del'>-		ret = af9013_statistics_signal_strength(&amp;state-&gt;fe);</div><div class='add'>+		af9013_statistics_signal_strength(&amp;state-&gt;fe);</div><div class='ctx'> 		state-&gt;statistics_step++;</div><div class='ctx'> 		next_msec = 300;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='del'>-		ret = af9013_statistics_snr_start(&amp;state-&gt;fe);</div><div class='add'>+		af9013_statistics_snr_start(&amp;state-&gt;fe);</div><div class='ctx'> 		state-&gt;statistics_step++;</div><div class='ctx'> 		next_msec = 200;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='del'>-		ret = af9013_statistics_ber_unc_start(&amp;state-&gt;fe);</div><div class='add'>+		af9013_statistics_ber_unc_start(&amp;state-&gt;fe);</div><div class='ctx'> 		state-&gt;statistics_step++;</div><div class='ctx'> 		next_msec = 1000;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='del'>-		ret = af9013_statistics_snr_result(&amp;state-&gt;fe);</div><div class='add'>+		af9013_statistics_snr_result(&amp;state-&gt;fe);</div><div class='ctx'> 		state-&gt;statistics_step++;</div><div class='ctx'> 		next_msec = 400;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 4:</div><div class='del'>-		ret = af9013_statistics_ber_unc_result(&amp;state-&gt;fe);</div><div class='add'>+		af9013_statistics_ber_unc_result(&amp;state-&gt;fe);</div><div class='ctx'> 		state-&gt;statistics_step++;</div><div class='ctx'> 		next_msec = 100;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -558,8 +557,6 @@ static void af9013_statistics_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	schedule_delayed_work(&amp;state-&gt;statistics_work,</div><div class='ctx'> 		msecs_to_jiffies(next_msec));</div><div class='del'>-</div><div class='del'>-	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int af9013_get_tune_settings(struct dvb_frontend *fe,</div><div class='head'>diff --git a/drivers/media/dvb/frontends/af9033.c b/drivers/media/dvb/frontends/af9033.c<br/>new file mode 100644<br/>index 000000000000..a38998286260<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/af9033.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/af9033.c</a></div><div class='hunk'>@@ -0,0 +1,980 @@</div><div class='add'>+/*</div><div class='add'>+ * Afatech AF9033 demodulator driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2009 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ * Copyright (C) 2012 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License along</div><div class='add'>+ *    with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "af9033_priv.h"</div><div class='add'>+</div><div class='add'>+struct af9033_state {</div><div class='add'>+	struct i2c_adapter *i2c;</div><div class='add'>+	struct dvb_frontend fe;</div><div class='add'>+	struct af9033_config cfg;</div><div class='add'>+</div><div class='add'>+	u32 bandwidth_hz;</div><div class='add'>+	bool ts_mode_parallel;</div><div class='add'>+	bool ts_mode_serial;</div><div class='add'>+</div><div class='add'>+	u32 ber;</div><div class='add'>+	u32 ucb;</div><div class='add'>+	unsigned long last_stat_check;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* write multiple registers */</div><div class='add'>+static int af9033_wr_regs(struct af9033_state *state, u32 reg, const u8 *val,</div><div class='add'>+		int len)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 buf[3 + len];</div><div class='add'>+	struct i2c_msg msg[1] = {</div><div class='add'>+		{</div><div class='add'>+			.addr = state-&gt;cfg.i2c_addr,</div><div class='add'>+			.flags = 0,</div><div class='add'>+			.len = sizeof(buf),</div><div class='add'>+			.buf = buf,</div><div class='add'>+		}</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	buf[0] = (reg &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+	buf[1] = (reg &gt;&gt;  8) &amp; 0xff;</div><div class='add'>+	buf[2] = (reg &gt;&gt;  0) &amp; 0xff;</div><div class='add'>+	memcpy(&amp;buf[3], val, len);</div><div class='add'>+</div><div class='add'>+	ret = i2c_transfer(state-&gt;i2c, msg, 1);</div><div class='add'>+	if (ret == 1) {</div><div class='add'>+		ret = 0;</div><div class='add'>+	} else {</div><div class='add'>+		printk(KERN_WARNING "%s: i2c wr failed=%d reg=%06x len=%d\n",</div><div class='add'>+				__func__, ret, reg, len);</div><div class='add'>+		ret = -EREMOTEIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* read multiple registers */</div><div class='add'>+static int af9033_rd_regs(struct af9033_state *state, u32 reg, u8 *val, int len)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 buf[3] = { (reg &gt;&gt; 16) &amp; 0xff, (reg &gt;&gt; 8) &amp; 0xff,</div><div class='add'>+			(reg &gt;&gt; 0) &amp; 0xff };</div><div class='add'>+	struct i2c_msg msg[2] = {</div><div class='add'>+		{</div><div class='add'>+			.addr = state-&gt;cfg.i2c_addr,</div><div class='add'>+			.flags = 0,</div><div class='add'>+			.len = sizeof(buf),</div><div class='add'>+			.buf = buf</div><div class='add'>+		}, {</div><div class='add'>+			.addr = state-&gt;cfg.i2c_addr,</div><div class='add'>+			.flags = I2C_M_RD,</div><div class='add'>+			.len = len,</div><div class='add'>+			.buf = val</div><div class='add'>+		}</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ret = i2c_transfer(state-&gt;i2c, msg, 2);</div><div class='add'>+	if (ret == 2) {</div><div class='add'>+		ret = 0;</div><div class='add'>+	} else {</div><div class='add'>+		printk(KERN_WARNING "%s: i2c rd failed=%d reg=%06x len=%d\n",</div><div class='add'>+				__func__, ret, reg, len);</div><div class='add'>+		ret = -EREMOTEIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* write single register */</div><div class='add'>+static int af9033_wr_reg(struct af9033_state *state, u32 reg, u8 val)</div><div class='add'>+{</div><div class='add'>+	return af9033_wr_regs(state, reg, &amp;val, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* read single register */</div><div class='add'>+static int af9033_rd_reg(struct af9033_state *state, u32 reg, u8 *val)</div><div class='add'>+{</div><div class='add'>+	return af9033_rd_regs(state, reg, val, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* write single register with mask */</div><div class='add'>+static int af9033_wr_reg_mask(struct af9033_state *state, u32 reg, u8 val,</div><div class='add'>+		u8 mask)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	/* no need for read if whole reg is written */</div><div class='add'>+	if (mask != 0xff) {</div><div class='add'>+		ret = af9033_rd_regs(state, reg, &amp;tmp, 1);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		val &amp;= mask;</div><div class='add'>+		tmp &amp;= ~mask;</div><div class='add'>+		val |= tmp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return af9033_wr_regs(state, reg, &amp;val, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* read single register with mask */</div><div class='add'>+static int af9033_rd_reg_mask(struct af9033_state *state, u32 reg, u8 *val,</div><div class='add'>+		u8 mask)</div><div class='add'>+{</div><div class='add'>+	int ret, i;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	ret = af9033_rd_regs(state, reg, &amp;tmp, 1);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	tmp &amp;= mask;</div><div class='add'>+</div><div class='add'>+	/* find position of the first bit */</div><div class='add'>+	for (i = 0; i &lt; 8; i++) {</div><div class='add'>+		if ((mask &gt;&gt; i) &amp; 0x01)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	*val = tmp &gt;&gt; i;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 af9033_div(u32 a, u32 b, u32 x)</div><div class='add'>+{</div><div class='add'>+	u32 r = 0, c = 0, i;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: a=%d b=%d x=%d\n", __func__, a, b, x);</div><div class='add'>+</div><div class='add'>+	if (a &gt; b) {</div><div class='add'>+		c = a / b;</div><div class='add'>+		a = a - c * b;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; x; i++) {</div><div class='add'>+		if (a &gt;= b) {</div><div class='add'>+			r += 1;</div><div class='add'>+			a -= b;</div><div class='add'>+		}</div><div class='add'>+		a &lt;&lt;= 1;</div><div class='add'>+		r &lt;&lt;= 1;</div><div class='add'>+	}</div><div class='add'>+	r = (c &lt;&lt; (u32)x) + r;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: a=%d b=%d x=%d r=%d r=%x\n", __func__, a, b, x, r, r);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void af9033_release(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct af9033_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+</div><div class='add'>+	kfree(state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9033_init(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct af9033_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret, i, len;</div><div class='add'>+	const struct reg_val *init;</div><div class='add'>+	u8 buf[4];</div><div class='add'>+	u32 adc_cw, clock_cw;</div><div class='add'>+	struct reg_val_mask tab[] = {</div><div class='add'>+		{ 0x80fb24, 0x00, 0x08 },</div><div class='add'>+		{ 0x80004c, 0x00, 0xff },</div><div class='add'>+		{ 0x00f641, state-&gt;cfg.tuner, 0xff },</div><div class='add'>+		{ 0x80f5ca, 0x01, 0x01 },</div><div class='add'>+		{ 0x80f715, 0x01, 0x01 },</div><div class='add'>+		{ 0x00f41f, 0x04, 0x04 },</div><div class='add'>+		{ 0x00f41a, 0x01, 0x01 },</div><div class='add'>+		{ 0x80f731, 0x00, 0x01 },</div><div class='add'>+		{ 0x00d91e, 0x00, 0x01 },</div><div class='add'>+		{ 0x00d919, 0x00, 0x01 },</div><div class='add'>+		{ 0x80f732, 0x00, 0x01 },</div><div class='add'>+		{ 0x00d91f, 0x00, 0x01 },</div><div class='add'>+		{ 0x00d91a, 0x00, 0x01 },</div><div class='add'>+		{ 0x80f730, 0x00, 0x01 },</div><div class='add'>+		{ 0x80f778, 0x00, 0xff },</div><div class='add'>+		{ 0x80f73c, 0x01, 0x01 },</div><div class='add'>+		{ 0x80f776, 0x00, 0x01 },</div><div class='add'>+		{ 0x00d8fd, 0x01, 0xff },</div><div class='add'>+		{ 0x00d830, 0x01, 0xff },</div><div class='add'>+		{ 0x00d831, 0x00, 0xff },</div><div class='add'>+		{ 0x00d832, 0x00, 0xff },</div><div class='add'>+		{ 0x80f985, state-&gt;ts_mode_serial, 0x01 },</div><div class='add'>+		{ 0x80f986, state-&gt;ts_mode_parallel, 0x01 },</div><div class='add'>+		{ 0x00d827, 0x00, 0xff },</div><div class='add'>+		{ 0x00d829, 0x00, 0xff },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* program clock control */</div><div class='add'>+	clock_cw = af9033_div(state-&gt;cfg.clock, 1000000ul, 19ul);</div><div class='add'>+	buf[0] = (clock_cw &gt;&gt;  0) &amp; 0xff;</div><div class='add'>+	buf[1] = (clock_cw &gt;&gt;  8) &amp; 0xff;</div><div class='add'>+	buf[2] = (clock_cw &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+	buf[3] = (clock_cw &gt;&gt; 24) &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: clock=%d clock_cw=%08x\n", __func__, state-&gt;cfg.clock,</div><div class='add'>+			clock_cw);</div><div class='add'>+</div><div class='add'>+	ret = af9033_wr_regs(state, 0x800025, buf, 4);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* program ADC control */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(clock_adc_lut); i++) {</div><div class='add'>+		if (clock_adc_lut[i].clock == state-&gt;cfg.clock)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adc_cw = af9033_div(clock_adc_lut[i].adc, 1000000ul, 19ul);</div><div class='add'>+	buf[0] = (adc_cw &gt;&gt;  0) &amp; 0xff;</div><div class='add'>+	buf[1] = (adc_cw &gt;&gt;  8) &amp; 0xff;</div><div class='add'>+	buf[2] = (adc_cw &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: adc=%d adc_cw=%06x\n", __func__, clock_adc_lut[i].adc,</div><div class='add'>+			adc_cw);</div><div class='add'>+</div><div class='add'>+	ret = af9033_wr_regs(state, 0x80f1cd, buf, 3);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* program register table */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tab); i++) {</div><div class='add'>+		ret = af9033_wr_reg_mask(state, tab[i].reg, tab[i].val,</div><div class='add'>+				tab[i].mask);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* settings for TS interface */</div><div class='add'>+	if (state-&gt;cfg.ts_mode == AF9033_TS_MODE_USB) {</div><div class='add'>+		ret = af9033_wr_reg_mask(state, 0x80f9a5, 0x00, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = af9033_wr_reg_mask(state, 0x80f9b5, 0x01, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+	} else {</div><div class='add'>+		ret = af9033_wr_reg_mask(state, 0x80f990, 0x00, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = af9033_wr_reg_mask(state, 0x80f9b5, 0x00, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* load OFSM settings */</div><div class='add'>+	pr_debug("%s: load ofsm settings\n", __func__);</div><div class='add'>+	len = ARRAY_SIZE(ofsm_init);</div><div class='add'>+	init = ofsm_init;</div><div class='add'>+	for (i = 0; i &lt; len; i++) {</div><div class='add'>+		ret = af9033_wr_reg(state, init[i].reg, init[i].val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* load tuner specific settings */</div><div class='add'>+	pr_debug("%s: load tuner specific settings\n",</div><div class='add'>+			__func__);</div><div class='add'>+	switch (state-&gt;cfg.tuner) {</div><div class='add'>+	case AF9033_TUNER_TUA9001:</div><div class='add'>+		len = ARRAY_SIZE(tuner_init_tua9001);</div><div class='add'>+		init = tuner_init_tua9001;</div><div class='add'>+		break;</div><div class='add'>+	case AF9033_TUNER_FC0011:</div><div class='add'>+		len = ARRAY_SIZE(tuner_init_fc0011);</div><div class='add'>+		init = tuner_init_fc0011;</div><div class='add'>+		break;</div><div class='add'>+	case AF9033_TUNER_MXL5007T:</div><div class='add'>+		len = ARRAY_SIZE(tuner_init_mxl5007t);</div><div class='add'>+		init = tuner_init_mxl5007t;</div><div class='add'>+		break;</div><div class='add'>+	case AF9033_TUNER_TDA18218:</div><div class='add'>+		len = ARRAY_SIZE(tuner_init_tda18218);</div><div class='add'>+		init = tuner_init_tda18218;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_debug("%s: unsupported tuner ID=%d\n", __func__,</div><div class='add'>+				state-&gt;cfg.tuner);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++) {</div><div class='add'>+		ret = af9033_wr_reg(state, init[i].reg, init[i].val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	state-&gt;bandwidth_hz = 0; /* force to program all parameters */</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9033_sleep(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct af9033_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret, i;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	ret = af9033_wr_reg(state, 0x80004c, 1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = af9033_wr_reg(state, 0x800000, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	for (i = 100, tmp = 1; i &amp;&amp; tmp; i--) {</div><div class='add'>+		ret = af9033_rd_reg(state, 0x80004c, &amp;tmp);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		usleep_range(200, 10000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: loop=%d\n", __func__, i);</div><div class='add'>+</div><div class='add'>+	if (i == 0) {</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = af9033_wr_reg_mask(state, 0x80fb24, 0x08, 0x08);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* prevent current leak (?) */</div><div class='add'>+	if (state-&gt;cfg.ts_mode == AF9033_TS_MODE_SERIAL) {</div><div class='add'>+		/* enable parallel TS */</div><div class='add'>+		ret = af9033_wr_reg_mask(state, 0x00d917, 0x00, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = af9033_wr_reg_mask(state, 0x00d916, 0x01, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9033_get_tune_settings(struct dvb_frontend *fe,</div><div class='add'>+		struct dvb_frontend_tune_settings *fesettings)</div><div class='add'>+{</div><div class='add'>+	fesettings-&gt;min_delay_ms = 800;</div><div class='add'>+	fesettings-&gt;step_size = 0;</div><div class='add'>+	fesettings-&gt;max_drift = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9033_set_frontend(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct af9033_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	struct dtv_frontend_properties *c = &amp;fe-&gt;dtv_property_cache;</div><div class='add'>+	int ret, i, spec_inv;</div><div class='add'>+	u8 tmp, buf[3], bandwidth_reg_val;</div><div class='add'>+	u32 if_frequency, freq_cw, adc_freq;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: frequency=%d bandwidth_hz=%d\n", __func__, c-&gt;frequency,</div><div class='add'>+			c-&gt;bandwidth_hz);</div><div class='add'>+</div><div class='add'>+	/* check bandwidth */</div><div class='add'>+	switch (c-&gt;bandwidth_hz) {</div><div class='add'>+	case 6000000:</div><div class='add'>+		bandwidth_reg_val = 0x00;</div><div class='add'>+		break;</div><div class='add'>+	case 7000000:</div><div class='add'>+		bandwidth_reg_val = 0x01;</div><div class='add'>+		break;</div><div class='add'>+	case 8000000:</div><div class='add'>+		bandwidth_reg_val = 0x02;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_debug("%s: invalid bandwidth_hz\n", __func__);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* program tuner */</div><div class='add'>+	if (fe-&gt;ops.tuner_ops.set_params)</div><div class='add'>+		fe-&gt;ops.tuner_ops.set_params(fe);</div><div class='add'>+</div><div class='add'>+	/* program CFOE coefficients */</div><div class='add'>+	if (c-&gt;bandwidth_hz != state-&gt;bandwidth_hz) {</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(coeff_lut); i++) {</div><div class='add'>+			if (coeff_lut[i].clock == state-&gt;cfg.clock &amp;&amp;</div><div class='add'>+				coeff_lut[i].bandwidth_hz == c-&gt;bandwidth_hz) {</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		ret =  af9033_wr_regs(state, 0x800001,</div><div class='add'>+				coeff_lut[i].val, sizeof(coeff_lut[i].val));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* program frequency control */</div><div class='add'>+	if (c-&gt;bandwidth_hz != state-&gt;bandwidth_hz) {</div><div class='add'>+		spec_inv = state-&gt;cfg.spec_inv ? -1 : 1;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(clock_adc_lut); i++) {</div><div class='add'>+			if (clock_adc_lut[i].clock == state-&gt;cfg.clock)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+		adc_freq = clock_adc_lut[i].adc;</div><div class='add'>+</div><div class='add'>+		/* get used IF frequency */</div><div class='add'>+		if (fe-&gt;ops.tuner_ops.get_if_frequency)</div><div class='add'>+			fe-&gt;ops.tuner_ops.get_if_frequency(fe, &amp;if_frequency);</div><div class='add'>+		else</div><div class='add'>+			if_frequency = 0;</div><div class='add'>+</div><div class='add'>+		while (if_frequency &gt; (adc_freq / 2))</div><div class='add'>+			if_frequency -= adc_freq;</div><div class='add'>+</div><div class='add'>+		if (if_frequency &gt;= 0)</div><div class='add'>+			spec_inv *= -1;</div><div class='add'>+		else</div><div class='add'>+			if_frequency *= -1;</div><div class='add'>+</div><div class='add'>+		freq_cw = af9033_div(if_frequency, adc_freq, 23ul);</div><div class='add'>+</div><div class='add'>+		if (spec_inv == -1)</div><div class='add'>+			freq_cw *= -1;</div><div class='add'>+</div><div class='add'>+		/* get adc multiplies */</div><div class='add'>+		ret = af9033_rd_reg(state, 0x800045, &amp;tmp);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		if (tmp == 1)</div><div class='add'>+			freq_cw /= 2;</div><div class='add'>+</div><div class='add'>+		buf[0] = (freq_cw &gt;&gt;  0) &amp; 0xff;</div><div class='add'>+		buf[1] = (freq_cw &gt;&gt;  8) &amp; 0xff;</div><div class='add'>+		buf[2] = (freq_cw &gt;&gt; 16) &amp; 0x7f;</div><div class='add'>+		ret = af9033_wr_regs(state, 0x800029, buf, 3);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		state-&gt;bandwidth_hz = c-&gt;bandwidth_hz;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = af9033_wr_reg_mask(state, 0x80f904, bandwidth_reg_val, 0x03);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = af9033_wr_reg(state, 0x800040, 0x00);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = af9033_wr_reg(state, 0x800047, 0x00);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = af9033_wr_reg_mask(state, 0x80f999, 0x00, 0x01);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (c-&gt;frequency &lt;= 230000000)</div><div class='add'>+		tmp = 0x00; /* VHF */</div><div class='add'>+	else</div><div class='add'>+		tmp = 0x01; /* UHF */</div><div class='add'>+</div><div class='add'>+	ret = af9033_wr_reg(state, 0x80004b, tmp);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = af9033_wr_reg(state, 0x800000, 0x00);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9033_get_frontend(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct af9033_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	struct dtv_frontend_properties *c = &amp;fe-&gt;dtv_property_cache;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 buf[8];</div><div class='add'>+</div><div class='add'>+	pr_debug("%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	/* read all needed registers */</div><div class='add'>+	ret = af9033_rd_regs(state, 0x80f900, buf, sizeof(buf));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	switch ((buf[0] &gt;&gt; 0) &amp; 3) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;transmission_mode = TRANSMISSION_MODE_2K;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;transmission_mode = TRANSMISSION_MODE_8K;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((buf[1] &gt;&gt; 0) &amp; 3) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;guard_interval = GUARD_INTERVAL_1_32;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;guard_interval = GUARD_INTERVAL_1_16;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		c-&gt;guard_interval = GUARD_INTERVAL_1_8;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		c-&gt;guard_interval = GUARD_INTERVAL_1_4;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((buf[2] &gt;&gt; 0) &amp; 7) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;hierarchy = HIERARCHY_NONE;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;hierarchy = HIERARCHY_1;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		c-&gt;hierarchy = HIERARCHY_2;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		c-&gt;hierarchy = HIERARCHY_4;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((buf[3] &gt;&gt; 0) &amp; 3) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;modulation = QPSK;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;modulation = QAM_16;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		c-&gt;modulation = QAM_64;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((buf[4] &gt;&gt; 0) &amp; 3) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;bandwidth_hz = 6000000;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;bandwidth_hz = 7000000;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		c-&gt;bandwidth_hz = 8000000;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((buf[6] &gt;&gt; 0) &amp; 7) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;code_rate_HP = FEC_1_2;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;code_rate_HP = FEC_2_3;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		c-&gt;code_rate_HP = FEC_3_4;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		c-&gt;code_rate_HP = FEC_5_6;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		c-&gt;code_rate_HP = FEC_7_8;</div><div class='add'>+		break;</div><div class='add'>+	case 5:</div><div class='add'>+		c-&gt;code_rate_HP = FEC_NONE;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((buf[7] &gt;&gt; 0) &amp; 7) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;code_rate_LP = FEC_1_2;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;code_rate_LP = FEC_2_3;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		c-&gt;code_rate_LP = FEC_3_4;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		c-&gt;code_rate_LP = FEC_5_6;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		c-&gt;code_rate_LP = FEC_7_8;</div><div class='add'>+		break;</div><div class='add'>+	case 5:</div><div class='add'>+		c-&gt;code_rate_LP = FEC_NONE;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9033_read_status(struct dvb_frontend *fe, fe_status_t *status)</div><div class='add'>+{</div><div class='add'>+	struct af9033_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	*status = 0;</div><div class='add'>+</div><div class='add'>+	/* radio channel status, 0=no result, 1=has signal, 2=no signal */</div><div class='add'>+	ret = af9033_rd_reg(state, 0x800047, &amp;tmp);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* has signal */</div><div class='add'>+	if (tmp == 0x01)</div><div class='add'>+		*status |= FE_HAS_SIGNAL;</div><div class='add'>+</div><div class='add'>+	if (tmp != 0x02) {</div><div class='add'>+		/* TPS lock */</div><div class='add'>+		ret = af9033_rd_reg_mask(state, 0x80f5a9, &amp;tmp, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		if (tmp)</div><div class='add'>+			*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |</div><div class='add'>+					FE_HAS_VITERBI;</div><div class='add'>+</div><div class='add'>+		/* full lock */</div><div class='add'>+		ret = af9033_rd_reg_mask(state, 0x80f999, &amp;tmp, 0x01);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		if (tmp)</div><div class='add'>+			*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |</div><div class='add'>+					FE_HAS_VITERBI | FE_HAS_SYNC |</div><div class='add'>+					FE_HAS_LOCK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9033_read_snr(struct dvb_frontend *fe, u16 *snr)</div><div class='add'>+{</div><div class='add'>+	struct af9033_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret, i, len;</div><div class='add'>+	u8 buf[3], tmp;</div><div class='add'>+	u32 snr_val;</div><div class='add'>+	const struct val_snr *uninitialized_var(snr_lut);</div><div class='add'>+</div><div class='add'>+	/* read value */</div><div class='add'>+	ret = af9033_rd_regs(state, 0x80002c, buf, 3);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	snr_val = (buf[2] &lt;&lt; 16) | (buf[1] &lt;&lt; 8) | buf[0];</div><div class='add'>+</div><div class='add'>+	/* read current modulation */</div><div class='add'>+	ret = af9033_rd_reg(state, 0x80f903, &amp;tmp);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	switch ((tmp &gt;&gt; 0) &amp; 3) {</div><div class='add'>+	case 0:</div><div class='add'>+		len = ARRAY_SIZE(qpsk_snr_lut);</div><div class='add'>+		snr_lut = qpsk_snr_lut;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		len = ARRAY_SIZE(qam16_snr_lut);</div><div class='add'>+		snr_lut = qam16_snr_lut;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		len = ARRAY_SIZE(qam64_snr_lut);</div><div class='add'>+		snr_lut = qam64_snr_lut;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++) {</div><div class='add'>+		tmp = snr_lut[i].snr;</div><div class='add'>+</div><div class='add'>+		if (snr_val &lt; snr_lut[i].val)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*snr = tmp * 10; /* dB/10 */</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength)</div><div class='add'>+{</div><div class='add'>+	struct af9033_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 strength2;</div><div class='add'>+</div><div class='add'>+	/* read signal strength of 0-100 scale */</div><div class='add'>+	ret = af9033_rd_reg(state, 0x800048, &amp;strength2);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* scale value to 0x0000-0xffff */</div><div class='add'>+	*strength = strength2 * 0xffff / 100;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9033_update_ch_stat(struct af9033_state *state)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 err_cnt, bit_cnt;</div><div class='add'>+	u16 abort_cnt;</div><div class='add'>+	u8 buf[7];</div><div class='add'>+</div><div class='add'>+	/* only update data every half second */</div><div class='add'>+	if (time_after(jiffies, state-&gt;last_stat_check + msecs_to_jiffies(500))) {</div><div class='add'>+		ret = af9033_rd_regs(state, 0x800032, buf, sizeof(buf));</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+		/* in 8 byte packets? */</div><div class='add'>+		abort_cnt = (buf[1] &lt;&lt; 8) + buf[0];</div><div class='add'>+		/* in bits */</div><div class='add'>+		err_cnt = (buf[4] &lt;&lt; 16) + (buf[3] &lt;&lt; 8) + buf[2];</div><div class='add'>+		/* in 8 byte packets? always(?) 0x2710 = 10000 */</div><div class='add'>+		bit_cnt = (buf[6] &lt;&lt; 8) + buf[5];</div><div class='add'>+</div><div class='add'>+		if (bit_cnt &lt; abort_cnt) {</div><div class='add'>+			abort_cnt = 1000;</div><div class='add'>+			state-&gt;ber = 0xffffffff;</div><div class='add'>+		} else {</div><div class='add'>+			/* 8 byte packets, that have not been rejected already */</div><div class='add'>+			bit_cnt -= (u32)abort_cnt;</div><div class='add'>+			if (bit_cnt == 0) {</div><div class='add'>+				state-&gt;ber = 0xffffffff;</div><div class='add'>+			} else {</div><div class='add'>+				err_cnt -= (u32)abort_cnt * 8 * 8;</div><div class='add'>+				bit_cnt *= 8 * 8;</div><div class='add'>+				state-&gt;ber = err_cnt * (0xffffffff / bit_cnt);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		state-&gt;ucb += abort_cnt;</div><div class='add'>+		state-&gt;last_stat_check = jiffies;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9033_read_ber(struct dvb_frontend *fe, u32 *ber)</div><div class='add'>+{</div><div class='add'>+	struct af9033_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = af9033_update_ch_stat(state);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*ber = state-&gt;ber;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9033_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)</div><div class='add'>+{</div><div class='add'>+	struct af9033_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = af9033_update_ch_stat(state);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*ucblocks = state-&gt;ucb;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int af9033_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)</div><div class='add'>+{</div><div class='add'>+	struct af9033_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: enable=%d\n", __func__, enable);</div><div class='add'>+</div><div class='add'>+	ret = af9033_wr_reg_mask(state, 0x00fa04, enable, 0x01);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pr_debug("%s: failed=%d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct dvb_frontend_ops af9033_ops;</div><div class='add'>+</div><div class='add'>+struct dvb_frontend *af9033_attach(const struct af9033_config *config,</div><div class='add'>+		struct i2c_adapter *i2c)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct af9033_state *state;</div><div class='add'>+	u8 buf[8];</div><div class='add'>+</div><div class='add'>+	pr_debug("%s:\n", __func__);</div><div class='add'>+</div><div class='add'>+	/* allocate memory for the internal state */</div><div class='add'>+	state = kzalloc(sizeof(struct af9033_state), GFP_KERNEL);</div><div class='add'>+	if (state == NULL)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* setup the state */</div><div class='add'>+	state-&gt;i2c = i2c;</div><div class='add'>+	memcpy(&amp;state-&gt;cfg, config, sizeof(struct af9033_config));</div><div class='add'>+</div><div class='add'>+	if (state-&gt;cfg.clock != 12000000) {</div><div class='add'>+		printk(KERN_INFO "af9033: unsupported clock=%d, only " \</div><div class='add'>+				"12000000 Hz is supported currently\n",</div><div class='add'>+				state-&gt;cfg.clock);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* firmware version */</div><div class='add'>+	ret = af9033_rd_regs(state, 0x0083e9, &amp;buf[0], 4);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = af9033_rd_regs(state, 0x804191, &amp;buf[4], 4);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	printk(KERN_INFO "af9033: firmware version: LINK=%d.%d.%d.%d " \</div><div class='add'>+			"OFDM=%d.%d.%d.%d\n", buf[0], buf[1], buf[2], buf[3],</div><div class='add'>+			buf[4], buf[5], buf[6], buf[7]);</div><div class='add'>+</div><div class='add'>+	/* configure internal TS mode */</div><div class='add'>+	switch (state-&gt;cfg.ts_mode) {</div><div class='add'>+	case AF9033_TS_MODE_PARALLEL:</div><div class='add'>+		state-&gt;ts_mode_parallel = true;</div><div class='add'>+		break;</div><div class='add'>+	case AF9033_TS_MODE_SERIAL:</div><div class='add'>+		state-&gt;ts_mode_serial = true;</div><div class='add'>+		break;</div><div class='add'>+	case AF9033_TS_MODE_USB:</div><div class='add'>+		/* usb mode for AF9035 */</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* create dvb_frontend */</div><div class='add'>+	memcpy(&amp;state-&gt;fe.ops, &amp;af9033_ops, sizeof(struct dvb_frontend_ops));</div><div class='add'>+	state-&gt;fe.demodulator_priv = state;</div><div class='add'>+</div><div class='add'>+	return &amp;state-&gt;fe;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	kfree(state);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(af9033_attach);</div><div class='add'>+</div><div class='add'>+static struct dvb_frontend_ops af9033_ops = {</div><div class='add'>+	.delsys = { SYS_DVBT },</div><div class='add'>+	.info = {</div><div class='add'>+		.name = "Afatech AF9033 (DVB-T)",</div><div class='add'>+		.frequency_min = 174000000,</div><div class='add'>+		.frequency_max = 862000000,</div><div class='add'>+		.frequency_stepsize = 250000,</div><div class='add'>+		.frequency_tolerance = 0,</div><div class='add'>+		.caps =	FE_CAN_FEC_1_2 |</div><div class='add'>+			FE_CAN_FEC_2_3 |</div><div class='add'>+			FE_CAN_FEC_3_4 |</div><div class='add'>+			FE_CAN_FEC_5_6 |</div><div class='add'>+			FE_CAN_FEC_7_8 |</div><div class='add'>+			FE_CAN_FEC_AUTO |</div><div class='add'>+			FE_CAN_QPSK |</div><div class='add'>+			FE_CAN_QAM_16 |</div><div class='add'>+			FE_CAN_QAM_64 |</div><div class='add'>+			FE_CAN_QAM_AUTO |</div><div class='add'>+			FE_CAN_TRANSMISSION_MODE_AUTO |</div><div class='add'>+			FE_CAN_GUARD_INTERVAL_AUTO |</div><div class='add'>+			FE_CAN_HIERARCHY_AUTO |</div><div class='add'>+			FE_CAN_RECOVER |</div><div class='add'>+			FE_CAN_MUTE_TS</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	.release = af9033_release,</div><div class='add'>+</div><div class='add'>+	.init = af9033_init,</div><div class='add'>+	.sleep = af9033_sleep,</div><div class='add'>+</div><div class='add'>+	.get_tune_settings = af9033_get_tune_settings,</div><div class='add'>+	.set_frontend = af9033_set_frontend,</div><div class='add'>+	.get_frontend = af9033_get_frontend,</div><div class='add'>+</div><div class='add'>+	.read_status = af9033_read_status,</div><div class='add'>+	.read_snr = af9033_read_snr,</div><div class='add'>+	.read_signal_strength = af9033_read_signal_strength,</div><div class='add'>+	.read_ber = af9033_read_ber,</div><div class='add'>+	.read_ucblocks = af9033_read_ucblocks,</div><div class='add'>+</div><div class='add'>+	.i2c_gate_ctrl = af9033_i2c_gate_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Antti Palosaari &lt;crope@iki.fi&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Afatech AF9033 DVB-T demodulator driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/media/dvb/frontends/af9033.h b/drivers/media/dvb/frontends/af9033.h<br/>new file mode 100644<br/>index 000000000000..9e302c3f0f7d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/af9033.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/af9033.h</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+/*</div><div class='add'>+ * Afatech AF9033 demodulator driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2009 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ * Copyright (C) 2012 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License along</div><div class='add'>+ *    with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AF9033_H</div><div class='add'>+#define AF9033_H</div><div class='add'>+</div><div class='add'>+struct af9033_config {</div><div class='add'>+	/*</div><div class='add'>+	 * I2C address</div><div class='add'>+	 */</div><div class='add'>+	u8 i2c_addr;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * clock Hz</div><div class='add'>+	 * 12000000, 22000000, 24000000, 34000000, 32000000, 28000000, 26000000,</div><div class='add'>+	 * 30000000, 36000000, 20480000, 16384000</div><div class='add'>+	 */</div><div class='add'>+	u32 clock;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * tuner</div><div class='add'>+	 */</div><div class='add'>+#define AF9033_TUNER_TUA9001     0x27 /* Infineon TUA 9001 */</div><div class='add'>+#define AF9033_TUNER_FC0011      0x28 /* Fitipower FC0011 */</div><div class='add'>+#define AF9033_TUNER_MXL5007T    0xa0 /* MaxLinear MxL5007T */</div><div class='add'>+#define AF9033_TUNER_TDA18218    0xa1 /* NXP TDA 18218HN */</div><div class='add'>+	u8 tuner;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TS settings</div><div class='add'>+	 */</div><div class='add'>+#define AF9033_TS_MODE_USB       0</div><div class='add'>+#define AF9033_TS_MODE_PARALLEL  1</div><div class='add'>+#define AF9033_TS_MODE_SERIAL    2</div><div class='add'>+	u8 ts_mode:2;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * input spectrum inversion</div><div class='add'>+	 */</div><div class='add'>+	bool spec_inv;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_DVB_AF9033) || \</div><div class='add'>+	(defined(CONFIG_DVB_AF9033_MODULE) &amp;&amp; defined(MODULE))</div><div class='add'>+extern struct dvb_frontend *af9033_attach(const struct af9033_config *config,</div><div class='add'>+	struct i2c_adapter *i2c);</div><div class='add'>+#else</div><div class='add'>+static inline struct dvb_frontend *af9033_attach(</div><div class='add'>+	const struct af9033_config *config, struct i2c_adapter *i2c)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* AF9033_H */</div><div class='head'>diff --git a/drivers/media/dvb/frontends/af9033_priv.h b/drivers/media/dvb/frontends/af9033_priv.h<br/>new file mode 100644<br/>index 000000000000..0b783b9ed75e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/af9033_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/af9033_priv.h</a></div><div class='hunk'>@@ -0,0 +1,470 @@</div><div class='add'>+/*</div><div class='add'>+ * Afatech AF9033 demodulator driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2009 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ * Copyright (C) 2012 Antti Palosaari &lt;crope@iki.fi&gt;</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License along</div><div class='add'>+ *    with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AF9033_PRIV_H</div><div class='add'>+#define AF9033_PRIV_H</div><div class='add'>+</div><div class='add'>+#include "dvb_frontend.h"</div><div class='add'>+#include "af9033.h"</div><div class='add'>+</div><div class='add'>+struct reg_val {</div><div class='add'>+	u32 reg;</div><div class='add'>+	u8  val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct reg_val_mask {</div><div class='add'>+	u32 reg;</div><div class='add'>+	u8  val;</div><div class='add'>+	u8  mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct coeff {</div><div class='add'>+	u32 clock;</div><div class='add'>+	u32 bandwidth_hz;</div><div class='add'>+	u8 val[36];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct clock_adc {</div><div class='add'>+	u32 clock;</div><div class='add'>+	u32 adc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct val_snr {</div><div class='add'>+	u32 val;</div><div class='add'>+	u8 snr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Xtal clock vs. ADC clock lookup table */</div><div class='add'>+static const struct clock_adc clock_adc_lut[] = {</div><div class='add'>+	{ 16384000, 20480000 },</div><div class='add'>+	{ 20480000, 20480000 },</div><div class='add'>+	{ 36000000, 20250000 },</div><div class='add'>+	{ 30000000, 20156250 },</div><div class='add'>+	{ 26000000, 20583333 },</div><div class='add'>+	{ 28000000, 20416667 },</div><div class='add'>+	{ 32000000, 20500000 },</div><div class='add'>+	{ 34000000, 20187500 },</div><div class='add'>+	{ 24000000, 20500000 },</div><div class='add'>+	{ 22000000, 20625000 },</div><div class='add'>+	{ 12000000, 20250000 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pre-calculated coeff lookup table */</div><div class='add'>+static const struct coeff coeff_lut[] = {</div><div class='add'>+	/* 12.000 MHz */</div><div class='add'>+	{ 12000000, 8000000, {</div><div class='add'>+		0x01, 0xce, 0x55, 0xc9, 0x00, 0xe7, 0x2a, 0xe4, 0x00, 0x73,</div><div class='add'>+		0x99, 0x0f, 0x00, 0x73, 0x95, 0x72, 0x00, 0x73, 0x91, 0xd5,</div><div class='add'>+		0x00, 0x39, 0xca, 0xb9, 0x00, 0xe7, 0x2a, 0xe4, 0x00, 0x73,</div><div class='add'>+		0x95, 0x72, 0x37, 0x02, 0xce, 0x01 }</div><div class='add'>+	},</div><div class='add'>+	{ 12000000, 7000000, {</div><div class='add'>+		0x01, 0x94, 0x8b, 0x10, 0x00, 0xca, 0x45, 0x88, 0x00, 0x65,</div><div class='add'>+		0x25, 0xed, 0x00, 0x65, 0x22, 0xc4, 0x00, 0x65, 0x1f, 0x9b,</div><div class='add'>+		0x00, 0x32, 0x91, 0x62, 0x00, 0xca, 0x45, 0x88, 0x00, 0x65,</div><div class='add'>+		0x22, 0xc4, 0x88, 0x02, 0x95, 0x01 }</div><div class='add'>+	},</div><div class='add'>+	{ 12000000, 6000000, {</div><div class='add'>+		0x01, 0x5a, 0xc0, 0x56, 0x00, 0xad, 0x60, 0x2b, 0x00, 0x56,</div><div class='add'>+		0xb2, 0xcb, 0x00, 0x56, 0xb0, 0x15, 0x00, 0x56, 0xad, 0x60,</div><div class='add'>+		0x00, 0x2b, 0x58, 0x0b, 0x00, 0xad, 0x60, 0x2b, 0x00, 0x56,</div><div class='add'>+		0xb0, 0x15, 0xf4, 0x02, 0x5b, 0x01 }</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* QPSK SNR lookup table */</div><div class='add'>+static const struct val_snr qpsk_snr_lut[] = {</div><div class='add'>+	{ 0x0b4771,  0 },</div><div class='add'>+	{ 0x0c1aed,  1 },</div><div class='add'>+	{ 0x0d0d27,  2 },</div><div class='add'>+	{ 0x0e4d19,  3 },</div><div class='add'>+	{ 0x0e5da8,  4 },</div><div class='add'>+	{ 0x107097,  5 },</div><div class='add'>+	{ 0x116975,  6 },</div><div class='add'>+	{ 0x1252d9,  7 },</div><div class='add'>+	{ 0x131fa4,  8 },</div><div class='add'>+	{ 0x13d5e1,  9 },</div><div class='add'>+	{ 0x148e53, 10 },</div><div class='add'>+	{ 0x15358b, 11 },</div><div class='add'>+	{ 0x15dd29, 12 },</div><div class='add'>+	{ 0x168112, 13 },</div><div class='add'>+	{ 0x170b61, 14 },</div><div class='add'>+	{ 0x17a532, 15 },</div><div class='add'>+	{ 0x180f94, 16 },</div><div class='add'>+	{ 0x186ed2, 17 },</div><div class='add'>+	{ 0x18b271, 18 },</div><div class='add'>+	{ 0x18e118, 19 },</div><div class='add'>+	{ 0x18ff4b, 20 },</div><div class='add'>+	{ 0x190af1, 21 },</div><div class='add'>+	{ 0x191451, 22 },</div><div class='add'>+	{ 0xffffff, 23 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* QAM16 SNR lookup table */</div><div class='add'>+static const struct val_snr qam16_snr_lut[] = {</div><div class='add'>+	{ 0x04f0d5,  0 },</div><div class='add'>+	{ 0x05387a,  1 },</div><div class='add'>+	{ 0x0573a4,  2 },</div><div class='add'>+	{ 0x05a99e,  3 },</div><div class='add'>+	{ 0x05cc80,  4 },</div><div class='add'>+	{ 0x05eb62,  5 },</div><div class='add'>+	{ 0x05fecf,  6 },</div><div class='add'>+	{ 0x060b80,  7 },</div><div class='add'>+	{ 0x062501,  8 },</div><div class='add'>+	{ 0x064865,  9 },</div><div class='add'>+	{ 0x069604, 10 },</div><div class='add'>+	{ 0x06f356, 11 },</div><div class='add'>+	{ 0x07706a, 12 },</div><div class='add'>+	{ 0x0804d3, 13 },</div><div class='add'>+	{ 0x089d1a, 14 },</div><div class='add'>+	{ 0x093e3d, 15 },</div><div class='add'>+	{ 0x09e35d, 16 },</div><div class='add'>+	{ 0x0a7c3c, 17 },</div><div class='add'>+	{ 0x0afaf8, 18 },</div><div class='add'>+	{ 0x0b719d, 19 },</div><div class='add'>+	{ 0x0bda6a, 20 },</div><div class='add'>+	{ 0x0c0c75, 21 },</div><div class='add'>+	{ 0x0c3f7d, 22 },</div><div class='add'>+	{ 0x0c5e62, 23 },</div><div class='add'>+	{ 0x0c6c31, 24 },</div><div class='add'>+	{ 0x0c7925, 25 },</div><div class='add'>+	{ 0xffffff, 26 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* QAM64 SNR lookup table */</div><div class='add'>+static const struct val_snr qam64_snr_lut[] = {</div><div class='add'>+	{ 0x0256d0,  0 },</div><div class='add'>+	{ 0x027a65,  1 },</div><div class='add'>+	{ 0x029873,  2 },</div><div class='add'>+	{ 0x02b7fe,  3 },</div><div class='add'>+	{ 0x02cf1e,  4 },</div><div class='add'>+	{ 0x02e234,  5 },</div><div class='add'>+	{ 0x02f409,  6 },</div><div class='add'>+	{ 0x030046,  7 },</div><div class='add'>+	{ 0x030844,  8 },</div><div class='add'>+	{ 0x030a02,  9 },</div><div class='add'>+	{ 0x030cde, 10 },</div><div class='add'>+	{ 0x031031, 11 },</div><div class='add'>+	{ 0x03144c, 12 },</div><div class='add'>+	{ 0x0315dd, 13 },</div><div class='add'>+	{ 0x031920, 14 },</div><div class='add'>+	{ 0x0322d0, 15 },</div><div class='add'>+	{ 0x0339fc, 16 },</div><div class='add'>+	{ 0x0364a1, 17 },</div><div class='add'>+	{ 0x038bcc, 18 },</div><div class='add'>+	{ 0x03c7d3, 19 },</div><div class='add'>+	{ 0x0408cc, 20 },</div><div class='add'>+	{ 0x043bed, 21 },</div><div class='add'>+	{ 0x048061, 22 },</div><div class='add'>+	{ 0x04be95, 23 },</div><div class='add'>+	{ 0x04fa7d, 24 },</div><div class='add'>+	{ 0x052405, 25 },</div><div class='add'>+	{ 0x05570d, 26 },</div><div class='add'>+	{ 0x059feb, 27 },</div><div class='add'>+	{ 0x05bf38, 28 },</div><div class='add'>+	{ 0xffffff, 29 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_val ofsm_init[] = {</div><div class='add'>+	{ 0x800051, 0x01 },</div><div class='add'>+	{ 0x800070, 0x0a },</div><div class='add'>+	{ 0x80007e, 0x04 },</div><div class='add'>+	{ 0x800081, 0x0a },</div><div class='add'>+	{ 0x80008a, 0x01 },</div><div class='add'>+	{ 0x80008e, 0x01 },</div><div class='add'>+	{ 0x800092, 0x06 },</div><div class='add'>+	{ 0x800099, 0x01 },</div><div class='add'>+	{ 0x80009f, 0xe1 },</div><div class='add'>+	{ 0x8000a0, 0xcf },</div><div class='add'>+	{ 0x8000a3, 0x01 },</div><div class='add'>+	{ 0x8000a5, 0x01 },</div><div class='add'>+	{ 0x8000a6, 0x01 },</div><div class='add'>+	{ 0x8000a9, 0x00 },</div><div class='add'>+	{ 0x8000aa, 0x01 },</div><div class='add'>+	{ 0x8000ab, 0x01 },</div><div class='add'>+	{ 0x8000b0, 0x01 },</div><div class='add'>+	{ 0x8000c0, 0x05 },</div><div class='add'>+	{ 0x8000c4, 0x19 },</div><div class='add'>+	{ 0x80f000, 0x0f },</div><div class='add'>+	{ 0x80f016, 0x10 },</div><div class='add'>+	{ 0x80f017, 0x04 },</div><div class='add'>+	{ 0x80f018, 0x05 },</div><div class='add'>+	{ 0x80f019, 0x04 },</div><div class='add'>+	{ 0x80f01a, 0x05 },</div><div class='add'>+	{ 0x80f021, 0x03 },</div><div class='add'>+	{ 0x80f022, 0x0a },</div><div class='add'>+	{ 0x80f023, 0x0a },</div><div class='add'>+	{ 0x80f02b, 0x00 },</div><div class='add'>+	{ 0x80f02c, 0x01 },</div><div class='add'>+	{ 0x80f064, 0x03 },</div><div class='add'>+	{ 0x80f065, 0xf9 },</div><div class='add'>+	{ 0x80f066, 0x03 },</div><div class='add'>+	{ 0x80f067, 0x01 },</div><div class='add'>+	{ 0x80f06f, 0xe0 },</div><div class='add'>+	{ 0x80f070, 0x03 },</div><div class='add'>+	{ 0x80f072, 0x0f },</div><div class='add'>+	{ 0x80f073, 0x03 },</div><div class='add'>+	{ 0x80f078, 0x00 },</div><div class='add'>+	{ 0x80f087, 0x00 },</div><div class='add'>+	{ 0x80f09b, 0x3f },</div><div class='add'>+	{ 0x80f09c, 0x00 },</div><div class='add'>+	{ 0x80f09d, 0x20 },</div><div class='add'>+	{ 0x80f09e, 0x00 },</div><div class='add'>+	{ 0x80f09f, 0x0c },</div><div class='add'>+	{ 0x80f0a0, 0x00 },</div><div class='add'>+	{ 0x80f130, 0x04 },</div><div class='add'>+	{ 0x80f132, 0x04 },</div><div class='add'>+	{ 0x80f144, 0x1a },</div><div class='add'>+	{ 0x80f146, 0x00 },</div><div class='add'>+	{ 0x80f14a, 0x01 },</div><div class='add'>+	{ 0x80f14c, 0x00 },</div><div class='add'>+	{ 0x80f14d, 0x00 },</div><div class='add'>+	{ 0x80f14f, 0x04 },</div><div class='add'>+	{ 0x80f158, 0x7f },</div><div class='add'>+	{ 0x80f15a, 0x00 },</div><div class='add'>+	{ 0x80f15b, 0x08 },</div><div class='add'>+	{ 0x80f15d, 0x03 },</div><div class='add'>+	{ 0x80f15e, 0x05 },</div><div class='add'>+	{ 0x80f163, 0x05 },</div><div class='add'>+	{ 0x80f166, 0x01 },</div><div class='add'>+	{ 0x80f167, 0x40 },</div><div class='add'>+	{ 0x80f168, 0x0f },</div><div class='add'>+	{ 0x80f17a, 0x00 },</div><div class='add'>+	{ 0x80f17b, 0x00 },</div><div class='add'>+	{ 0x80f183, 0x01 },</div><div class='add'>+	{ 0x80f19d, 0x40 },</div><div class='add'>+	{ 0x80f1bc, 0x36 },</div><div class='add'>+	{ 0x80f1bd, 0x00 },</div><div class='add'>+	{ 0x80f1cb, 0xa0 },</div><div class='add'>+	{ 0x80f1cc, 0x01 },</div><div class='add'>+	{ 0x80f204, 0x10 },</div><div class='add'>+	{ 0x80f214, 0x00 },</div><div class='add'>+	{ 0x80f40e, 0x0a },</div><div class='add'>+	{ 0x80f40f, 0x40 },</div><div class='add'>+	{ 0x80f410, 0x08 },</div><div class='add'>+	{ 0x80f55f, 0x0a },</div><div class='add'>+	{ 0x80f561, 0x15 },</div><div class='add'>+	{ 0x80f562, 0x20 },</div><div class='add'>+	{ 0x80f5df, 0xfb },</div><div class='add'>+	{ 0x80f5e0, 0x00 },</div><div class='add'>+	{ 0x80f5e3, 0x09 },</div><div class='add'>+	{ 0x80f5e4, 0x01 },</div><div class='add'>+	{ 0x80f5e5, 0x01 },</div><div class='add'>+	{ 0x80f5f8, 0x01 },</div><div class='add'>+	{ 0x80f5fd, 0x01 },</div><div class='add'>+	{ 0x80f600, 0x05 },</div><div class='add'>+	{ 0x80f601, 0x08 },</div><div class='add'>+	{ 0x80f602, 0x0b },</div><div class='add'>+	{ 0x80f603, 0x0e },</div><div class='add'>+	{ 0x80f604, 0x11 },</div><div class='add'>+	{ 0x80f605, 0x14 },</div><div class='add'>+	{ 0x80f606, 0x17 },</div><div class='add'>+	{ 0x80f607, 0x1f },</div><div class='add'>+	{ 0x80f60e, 0x00 },</div><div class='add'>+	{ 0x80f60f, 0x04 },</div><div class='add'>+	{ 0x80f610, 0x32 },</div><div class='add'>+	{ 0x80f611, 0x10 },</div><div class='add'>+	{ 0x80f707, 0xfc },</div><div class='add'>+	{ 0x80f708, 0x00 },</div><div class='add'>+	{ 0x80f709, 0x37 },</div><div class='add'>+	{ 0x80f70a, 0x00 },</div><div class='add'>+	{ 0x80f78b, 0x01 },</div><div class='add'>+	{ 0x80f80f, 0x40 },</div><div class='add'>+	{ 0x80f810, 0x54 },</div><div class='add'>+	{ 0x80f811, 0x5a },</div><div class='add'>+	{ 0x80f905, 0x01 },</div><div class='add'>+	{ 0x80fb06, 0x03 },</div><div class='add'>+	{ 0x80fd8b, 0x00 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Infineon TUA 9001 tuner init</div><div class='add'>+   AF9033_TUNER_TUA9001    = 0x27 */</div><div class='add'>+static const struct reg_val tuner_init_tua9001[] = {</div><div class='add'>+	{ 0x800046, 0x27 },</div><div class='add'>+	{ 0x800057, 0x00 },</div><div class='add'>+	{ 0x800058, 0x01 },</div><div class='add'>+	{ 0x80005f, 0x00 },</div><div class='add'>+	{ 0x800060, 0x00 },</div><div class='add'>+	{ 0x80006d, 0x00 },</div><div class='add'>+	{ 0x800071, 0x05 },</div><div class='add'>+	{ 0x800072, 0x02 },</div><div class='add'>+	{ 0x800074, 0x01 },</div><div class='add'>+	{ 0x800075, 0x03 },</div><div class='add'>+	{ 0x800076, 0x02 },</div><div class='add'>+	{ 0x800077, 0x00 },</div><div class='add'>+	{ 0x800078, 0x01 },</div><div class='add'>+	{ 0x800079, 0x00 },</div><div class='add'>+	{ 0x80007a, 0x7e },</div><div class='add'>+	{ 0x80007b, 0x3e },</div><div class='add'>+	{ 0x800093, 0x00 },</div><div class='add'>+	{ 0x800094, 0x01 },</div><div class='add'>+	{ 0x800095, 0x02 },</div><div class='add'>+	{ 0x800096, 0x01 },</div><div class='add'>+	{ 0x800098, 0x0a },</div><div class='add'>+	{ 0x80009b, 0x05 },</div><div class='add'>+	{ 0x80009c, 0x80 },</div><div class='add'>+	{ 0x8000b3, 0x00 },</div><div class='add'>+	{ 0x8000c1, 0x01 },</div><div class='add'>+	{ 0x8000c2, 0x00 },</div><div class='add'>+	{ 0x80f007, 0x00 },</div><div class='add'>+	{ 0x80f01f, 0x82 },</div><div class='add'>+	{ 0x80f020, 0x00 },</div><div class='add'>+	{ 0x80f029, 0x82 },</div><div class='add'>+	{ 0x80f02a, 0x00 },</div><div class='add'>+	{ 0x80f047, 0x00 },</div><div class='add'>+	{ 0x80f054, 0x00 },</div><div class='add'>+	{ 0x80f055, 0x00 },</div><div class='add'>+	{ 0x80f077, 0x01 },</div><div class='add'>+	{ 0x80f1e6, 0x00 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Fitipower fc0011 tuner init</div><div class='add'>+   AF9033_TUNER_FC0011    = 0x28 */</div><div class='add'>+static const struct reg_val tuner_init_fc0011[] = {</div><div class='add'>+	{ 0x800046, AF9033_TUNER_FC0011 },</div><div class='add'>+	{ 0x800057, 0x00 },</div><div class='add'>+	{ 0x800058, 0x01 },</div><div class='add'>+	{ 0x80005f, 0x00 },</div><div class='add'>+	{ 0x800060, 0x00 },</div><div class='add'>+	{ 0x800068, 0xa5 },</div><div class='add'>+	{ 0x80006e, 0x01 },</div><div class='add'>+	{ 0x800071, 0x0A },</div><div class='add'>+	{ 0x800072, 0x02 },</div><div class='add'>+	{ 0x800074, 0x01 },</div><div class='add'>+	{ 0x800079, 0x01 },</div><div class='add'>+	{ 0x800093, 0x00 },</div><div class='add'>+	{ 0x800094, 0x00 },</div><div class='add'>+	{ 0x800095, 0x00 },</div><div class='add'>+	{ 0x800096, 0x00 },</div><div class='add'>+	{ 0x80009b, 0x2D },</div><div class='add'>+	{ 0x80009c, 0x60 },</div><div class='add'>+	{ 0x80009d, 0x23 },</div><div class='add'>+	{ 0x8000a4, 0x50 },</div><div class='add'>+	{ 0x8000ad, 0x50 },</div><div class='add'>+	{ 0x8000b3, 0x01 },</div><div class='add'>+	{ 0x8000b7, 0x88 },</div><div class='add'>+	{ 0x8000b8, 0xa6 },</div><div class='add'>+	{ 0x8000c3, 0x01 },</div><div class='add'>+	{ 0x8000c4, 0x01 },</div><div class='add'>+	{ 0x8000c7, 0x69 },</div><div class='add'>+	{ 0x80F007, 0x00 },</div><div class='add'>+	{ 0x80F00A, 0x1B },</div><div class='add'>+	{ 0x80F00B, 0x1B },</div><div class='add'>+	{ 0x80F00C, 0x1B },</div><div class='add'>+	{ 0x80F00D, 0x1B },</div><div class='add'>+	{ 0x80F00E, 0xFF },</div><div class='add'>+	{ 0x80F00F, 0x01 },</div><div class='add'>+	{ 0x80F010, 0x00 },</div><div class='add'>+	{ 0x80F011, 0x02 },</div><div class='add'>+	{ 0x80F012, 0xFF },</div><div class='add'>+	{ 0x80F013, 0x01 },</div><div class='add'>+	{ 0x80F014, 0x00 },</div><div class='add'>+	{ 0x80F015, 0x02 },</div><div class='add'>+	{ 0x80F01B, 0xEF },</div><div class='add'>+	{ 0x80F01C, 0x01 },</div><div class='add'>+	{ 0x80F01D, 0x0f },</div><div class='add'>+	{ 0x80F01E, 0x02 },</div><div class='add'>+	{ 0x80F01F, 0x6E },</div><div class='add'>+	{ 0x80F020, 0x00 },</div><div class='add'>+	{ 0x80F025, 0xDE },</div><div class='add'>+	{ 0x80F026, 0x00 },</div><div class='add'>+	{ 0x80F027, 0x0A },</div><div class='add'>+	{ 0x80F028, 0x03 },</div><div class='add'>+	{ 0x80F029, 0x6E },</div><div class='add'>+	{ 0x80F02A, 0x00 },</div><div class='add'>+	{ 0x80F047, 0x00 },</div><div class='add'>+	{ 0x80F054, 0x00 },</div><div class='add'>+	{ 0x80F055, 0x00 },</div><div class='add'>+	{ 0x80F077, 0x01 },</div><div class='add'>+	{ 0x80F1E6, 0x00 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MaxLinear MxL5007T tuner init</div><div class='add'>+   AF9033_TUNER_MXL5007T    = 0xa0 */</div><div class='add'>+static const struct reg_val tuner_init_mxl5007t[] = {</div><div class='add'>+	{ 0x800046, 0x1b },</div><div class='add'>+	{ 0x800057, 0x01 },</div><div class='add'>+	{ 0x800058, 0x01 },</div><div class='add'>+	{ 0x80005f, 0x00 },</div><div class='add'>+	{ 0x800060, 0x00 },</div><div class='add'>+	{ 0x800068, 0x96 },</div><div class='add'>+	{ 0x800071, 0x05 },</div><div class='add'>+	{ 0x800072, 0x02 },</div><div class='add'>+	{ 0x800074, 0x01 },</div><div class='add'>+	{ 0x800079, 0x01 },</div><div class='add'>+	{ 0x800093, 0x00 },</div><div class='add'>+	{ 0x800094, 0x00 },</div><div class='add'>+	{ 0x800095, 0x00 },</div><div class='add'>+	{ 0x800096, 0x00 },</div><div class='add'>+	{ 0x8000b3, 0x01 },</div><div class='add'>+	{ 0x8000c1, 0x01 },</div><div class='add'>+	{ 0x8000c2, 0x00 },</div><div class='add'>+	{ 0x80f007, 0x00 },</div><div class='add'>+	{ 0x80f00c, 0x19 },</div><div class='add'>+	{ 0x80f00d, 0x1a },</div><div class='add'>+	{ 0x80f012, 0xda },</div><div class='add'>+	{ 0x80f013, 0x00 },</div><div class='add'>+	{ 0x80f014, 0x00 },</div><div class='add'>+	{ 0x80f015, 0x02 },</div><div class='add'>+	{ 0x80f01f, 0x82 },</div><div class='add'>+	{ 0x80f020, 0x00 },</div><div class='add'>+	{ 0x80f029, 0x82 },</div><div class='add'>+	{ 0x80f02a, 0x00 },</div><div class='add'>+	{ 0x80f077, 0x02 },</div><div class='add'>+	{ 0x80f1e6, 0x00 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* NXP TDA 18218HN tuner init</div><div class='add'>+   AF9033_TUNER_TDA18218    = 0xa1 */</div><div class='add'>+static const struct reg_val tuner_init_tda18218[] = {</div><div class='add'>+	{0x800046, 0xa1},</div><div class='add'>+	{0x800057, 0x01},</div><div class='add'>+	{0x800058, 0x01},</div><div class='add'>+	{0x80005f, 0x00},</div><div class='add'>+	{0x800060, 0x00},</div><div class='add'>+	{0x800071, 0x05},</div><div class='add'>+	{0x800072, 0x02},</div><div class='add'>+	{0x800074, 0x01},</div><div class='add'>+	{0x800079, 0x01},</div><div class='add'>+	{0x800093, 0x00},</div><div class='add'>+	{0x800094, 0x00},</div><div class='add'>+	{0x800095, 0x00},</div><div class='add'>+	{0x800096, 0x00},</div><div class='add'>+	{0x8000b3, 0x01},</div><div class='add'>+	{0x8000c3, 0x01},</div><div class='add'>+	{0x8000c4, 0x00},</div><div class='add'>+	{0x80f007, 0x00},</div><div class='add'>+	{0x80f00c, 0x19},</div><div class='add'>+	{0x80f00d, 0x1a},</div><div class='add'>+	{0x80f012, 0xda},</div><div class='add'>+	{0x80f013, 0x00},</div><div class='add'>+	{0x80f014, 0x00},</div><div class='add'>+	{0x80f015, 0x02},</div><div class='add'>+	{0x80f01f, 0x82},</div><div class='add'>+	{0x80f020, 0x00},</div><div class='add'>+	{0x80f029, 0x82},</div><div class='add'>+	{0x80f02a, 0x00},</div><div class='add'>+	{0x80f077, 0x02},</div><div class='add'>+	{0x80f1e6, 0x00},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* AF9033_PRIV_H */</div><div class='add'>+</div><div class='head'>diff --git a/drivers/media/dvb/frontends/au8522_common.c b/drivers/media/dvb/frontends/au8522_common.c<br/>new file mode 100644<br/>index 000000000000..5cfe151ee394<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/au8522_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/au8522_common.c</a></div><div class='hunk'>@@ -0,0 +1,259 @@</div><div class='add'>+/*</div><div class='add'>+    Auvitek AU8522 QAM/8VSB demodulator driver</div><div class='add'>+</div><div class='add'>+    Copyright (C) 2008 Steven Toth &lt;stoth@linuxtv.org&gt;</div><div class='add'>+    Copyright (C) 2008 Devin Heitmueller &lt;dheitmueller@linuxtv.org&gt;</div><div class='add'>+    Copyright (C) 2005-2008 Auvitek International, Ltd.</div><div class='add'>+    Copyright (C) 2012 Michael Krufky &lt;mkrufky@linuxtv.org&gt;</div><div class='add'>+</div><div class='add'>+    This program is free software; you can redistribute it and/or modify</div><div class='add'>+    it under the terms of the GNU General Public License as published by</div><div class='add'>+    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+    (at your option) any later version.</div><div class='add'>+</div><div class='add'>+    This program is distributed in the hope that it will be useful,</div><div class='add'>+    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+    GNU General Public License for more details.</div><div class='add'>+</div><div class='add'>+    You should have received a copy of the GNU General Public License</div><div class='add'>+    along with this program; if not, write to the Free Software</div><div class='add'>+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include "dvb_frontend.h"</div><div class='add'>+#include "au8522_priv.h"</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+static int debug;</div><div class='add'>+</div><div class='add'>+#define dprintk(arg...)\</div><div class='add'>+  do { if (debug)\</div><div class='add'>+	 printk(arg);\</div><div class='add'>+  } while (0)</div><div class='add'>+</div><div class='add'>+/* Despite the name "hybrid_tuner", the framework works just as well for</div><div class='add'>+   hybrid demodulators as well... */</div><div class='add'>+static LIST_HEAD(hybrid_tuner_instance_list);</div><div class='add'>+static DEFINE_MUTEX(au8522_list_mutex);</div><div class='add'>+</div><div class='add'>+/* 16 bit registers, 8 bit values */</div><div class='add'>+int au8522_writereg(struct au8522_state *state, u16 reg, u8 data)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 buf[] = { (reg &gt;&gt; 8) | 0x80, reg &amp; 0xff, data };</div><div class='add'>+</div><div class='add'>+	struct i2c_msg msg = { .addr = state-&gt;config-&gt;demod_address,</div><div class='add'>+			       .flags = 0, .buf = buf, .len = 3 };</div><div class='add'>+</div><div class='add'>+	ret = i2c_transfer(state-&gt;i2c, &amp;msg, 1);</div><div class='add'>+</div><div class='add'>+	if (ret != 1)</div><div class='add'>+		printk("%s: writereg error (reg == 0x%02x, val == 0x%04x, "</div><div class='add'>+		       "ret == %i)\n", __func__, reg, data, ret);</div><div class='add'>+</div><div class='add'>+	return (ret != 1) ? -1 : 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(au8522_writereg);</div><div class='add'>+</div><div class='add'>+u8 au8522_readreg(struct au8522_state *state, u16 reg)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 b0[] = { (reg &gt;&gt; 8) | 0x40, reg &amp; 0xff };</div><div class='add'>+	u8 b1[] = { 0 };</div><div class='add'>+</div><div class='add'>+	struct i2c_msg msg[] = {</div><div class='add'>+		{ .addr = state-&gt;config-&gt;demod_address, .flags = 0,</div><div class='add'>+		  .buf = b0, .len = 2 },</div><div class='add'>+		{ .addr = state-&gt;config-&gt;demod_address, .flags = I2C_M_RD,</div><div class='add'>+		  .buf = b1, .len = 1 } };</div><div class='add'>+</div><div class='add'>+	ret = i2c_transfer(state-&gt;i2c, msg, 2);</div><div class='add'>+</div><div class='add'>+	if (ret != 2)</div><div class='add'>+		printk(KERN_ERR "%s: readreg error (ret == %i)\n",</div><div class='add'>+		       __func__, ret);</div><div class='add'>+	return b1[0];</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(au8522_readreg);</div><div class='add'>+</div><div class='add'>+int au8522_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)</div><div class='add'>+{</div><div class='add'>+	struct au8522_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+</div><div class='add'>+	dprintk("%s(%d)\n", __func__, enable);</div><div class='add'>+</div><div class='add'>+	if (state-&gt;operational_mode == AU8522_ANALOG_MODE) {</div><div class='add'>+		/* We're being asked to manage the gate even though we're</div><div class='add'>+		   not in digital mode.  This can occur if we get switched</div><div class='add'>+		   over to analog mode before the dvb_frontend kernel thread</div><div class='add'>+		   has completely shutdown */</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		return au8522_writereg(state, 0x106, 1);</div><div class='add'>+	else</div><div class='add'>+		return au8522_writereg(state, 0x106, 0);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(au8522_i2c_gate_ctrl);</div><div class='add'>+</div><div class='add'>+/* Reset the demod hardware and reset all of the configuration registers</div><div class='add'>+   to a default state. */</div><div class='add'>+int au8522_get_state(struct au8522_state **state, struct i2c_adapter *i2c,</div><div class='add'>+		     u8 client_address)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;au8522_list_mutex);</div><div class='add'>+	ret = hybrid_tuner_request_state(struct au8522_state, (*state),</div><div class='add'>+					 hybrid_tuner_instance_list,</div><div class='add'>+					 i2c, client_address, "au8522");</div><div class='add'>+	mutex_unlock(&amp;au8522_list_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(au8522_get_state);</div><div class='add'>+</div><div class='add'>+void au8522_release_state(struct au8522_state *state)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;au8522_list_mutex);</div><div class='add'>+	if (state != NULL)</div><div class='add'>+		hybrid_tuner_release_state(state);</div><div class='add'>+	mutex_unlock(&amp;au8522_list_mutex);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(au8522_release_state);</div><div class='add'>+</div><div class='add'>+static int au8522_led_gpio_enable(struct au8522_state *state, int onoff)</div><div class='add'>+{</div><div class='add'>+	struct au8522_led_config *led_config = state-&gt;config-&gt;led_cfg;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	/* bail out if we can't control an LED */</div><div class='add'>+	if (!led_config || !led_config-&gt;gpio_output ||</div><div class='add'>+	    !led_config-&gt;gpio_output_enable || !led_config-&gt;gpio_output_disable)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	val = au8522_readreg(state, 0x4000 |</div><div class='add'>+			     (led_config-&gt;gpio_output &amp; ~0xc000));</div><div class='add'>+	if (onoff) {</div><div class='add'>+		/* enable GPIO output */</div><div class='add'>+		val &amp;= ~((led_config-&gt;gpio_output_enable &gt;&gt; 8) &amp; 0xff);</div><div class='add'>+		val |=  (led_config-&gt;gpio_output_enable &amp; 0xff);</div><div class='add'>+	} else {</div><div class='add'>+		/* disable GPIO output */</div><div class='add'>+		val &amp;= ~((led_config-&gt;gpio_output_disable &gt;&gt; 8) &amp; 0xff);</div><div class='add'>+		val |=  (led_config-&gt;gpio_output_disable &amp; 0xff);</div><div class='add'>+	}</div><div class='add'>+	return au8522_writereg(state, 0x8000 |</div><div class='add'>+			       (led_config-&gt;gpio_output &amp; ~0xc000), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* led = 0 | off</div><div class='add'>+ * led = 1 | signal ok</div><div class='add'>+ * led = 2 | signal strong</div><div class='add'>+ * led &lt; 0 | only light led if leds are currently off</div><div class='add'>+ */</div><div class='add'>+int au8522_led_ctrl(struct au8522_state *state, int led)</div><div class='add'>+{</div><div class='add'>+	struct au8522_led_config *led_config = state-&gt;config-&gt;led_cfg;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	/* bail out if we can't control an LED */</div><div class='add'>+	if (!led_config || !led_config-&gt;gpio_leds ||</div><div class='add'>+	    !led_config-&gt;num_led_states || !led_config-&gt;led_states)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (led &lt; 0) {</div><div class='add'>+		/* if LED is already lit, then leave it as-is */</div><div class='add'>+		if (state-&gt;led_state)</div><div class='add'>+			return 0;</div><div class='add'>+		else</div><div class='add'>+			led *= -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* toggle LED if changing state */</div><div class='add'>+	if (state-&gt;led_state != led) {</div><div class='add'>+		u8 val;</div><div class='add'>+</div><div class='add'>+		dprintk("%s: %d\n", __func__, led);</div><div class='add'>+</div><div class='add'>+		au8522_led_gpio_enable(state, 1);</div><div class='add'>+</div><div class='add'>+		val = au8522_readreg(state, 0x4000 |</div><div class='add'>+				     (led_config-&gt;gpio_leds &amp; ~0xc000));</div><div class='add'>+</div><div class='add'>+		/* start with all leds off */</div><div class='add'>+		for (i = 0; i &lt; led_config-&gt;num_led_states; i++)</div><div class='add'>+			val &amp;= ~led_config-&gt;led_states[i];</div><div class='add'>+</div><div class='add'>+		/* set selected LED state */</div><div class='add'>+		if (led &lt; led_config-&gt;num_led_states)</div><div class='add'>+			val |= led_config-&gt;led_states[led];</div><div class='add'>+		else if (led_config-&gt;num_led_states)</div><div class='add'>+			val |=</div><div class='add'>+			led_config-&gt;led_states[led_config-&gt;num_led_states - 1];</div><div class='add'>+</div><div class='add'>+		ret = au8522_writereg(state, 0x8000 |</div><div class='add'>+				      (led_config-&gt;gpio_leds &amp; ~0xc000), val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		state-&gt;led_state = led;</div><div class='add'>+</div><div class='add'>+		if (led == 0)</div><div class='add'>+			au8522_led_gpio_enable(state, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(au8522_led_ctrl);</div><div class='add'>+</div><div class='add'>+int au8522_init(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct au8522_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	dprintk("%s()\n", __func__);</div><div class='add'>+</div><div class='add'>+	state-&gt;operational_mode = AU8522_DIGITAL_MODE;</div><div class='add'>+</div><div class='add'>+	/* Clear out any state associated with the digital side of the</div><div class='add'>+	   chip, so that when it gets powered back up it won't think</div><div class='add'>+	   that it is already tuned */</div><div class='add'>+	state-&gt;current_frequency = 0;</div><div class='add'>+</div><div class='add'>+	au8522_writereg(state, 0xa4, 1 &lt;&lt; 5);</div><div class='add'>+</div><div class='add'>+	au8522_i2c_gate_ctrl(fe, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(au8522_init);</div><div class='add'>+</div><div class='add'>+int au8522_sleep(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct au8522_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	dprintk("%s()\n", __func__);</div><div class='add'>+</div><div class='add'>+	/* Only power down if the digital side is currently using the chip */</div><div class='add'>+	if (state-&gt;operational_mode == AU8522_ANALOG_MODE) {</div><div class='add'>+		/* We're not in one of the expected power modes, which means</div><div class='add'>+		   that the DVB thread is probably telling us to go to sleep</div><div class='add'>+		   even though the analog frontend has already started using</div><div class='add'>+		   the chip.  So ignore the request */</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* turn off led */</div><div class='add'>+	au8522_led_ctrl(state, 0);</div><div class='add'>+</div><div class='add'>+	/* Power down the chip */</div><div class='add'>+	au8522_writereg(state, 0xa4, 1 &lt;&lt; 5);</div><div class='add'>+</div><div class='add'>+	state-&gt;current_frequency = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(au8522_sleep);</div><div class='head'>diff --git a/drivers/media/dvb/frontends/au8522_dig.c b/drivers/media/dvb/frontends/au8522_dig.c<br/>index 25f650934c73..5fc70d6cd04f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/au8522_dig.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/au8522_dig.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/au8522_dig.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/au8522_dig.c</a></div><div class='hunk'>@@ -30,74 +30,11 @@</div><div class='ctx'> </div><div class='ctx'> static int debug;</div><div class='ctx'> </div><div class='del'>-/* Despite the name "hybrid_tuner", the framework works just as well for</div><div class='del'>-   hybrid demodulators as well... */</div><div class='del'>-static LIST_HEAD(hybrid_tuner_instance_list);</div><div class='del'>-static DEFINE_MUTEX(au8522_list_mutex);</div><div class='del'>-</div><div class='ctx'> #define dprintk(arg...)\</div><div class='ctx'> 	do { if (debug)\</div><div class='ctx'> 		printk(arg);\</div><div class='ctx'> 	} while (0)</div><div class='ctx'> </div><div class='del'>-/* 16 bit registers, 8 bit values */</div><div class='del'>-int au8522_writereg(struct au8522_state *state, u16 reg, u8 data)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	u8 buf[] = { (reg &gt;&gt; 8) | 0x80, reg &amp; 0xff, data };</div><div class='del'>-</div><div class='del'>-	struct i2c_msg msg = { .addr = state-&gt;config-&gt;demod_address,</div><div class='del'>-			       .flags = 0, .buf = buf, .len = 3 };</div><div class='del'>-</div><div class='del'>-	ret = i2c_transfer(state-&gt;i2c, &amp;msg, 1);</div><div class='del'>-</div><div class='del'>-	if (ret != 1)</div><div class='del'>-		printk("%s: writereg error (reg == 0x%02x, val == 0x%04x, "</div><div class='del'>-		       "ret == %i)\n", __func__, reg, data, ret);</div><div class='del'>-</div><div class='del'>-	return (ret != 1) ? -1 : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u8 au8522_readreg(struct au8522_state *state, u16 reg)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	u8 b0[] = { (reg &gt;&gt; 8) | 0x40, reg &amp; 0xff };</div><div class='del'>-	u8 b1[] = { 0 };</div><div class='del'>-</div><div class='del'>-	struct i2c_msg msg[] = {</div><div class='del'>-		{ .addr = state-&gt;config-&gt;demod_address, .flags = 0,</div><div class='del'>-		  .buf = b0, .len = 2 },</div><div class='del'>-		{ .addr = state-&gt;config-&gt;demod_address, .flags = I2C_M_RD,</div><div class='del'>-		  .buf = b1, .len = 1 } };</div><div class='del'>-</div><div class='del'>-	ret = i2c_transfer(state-&gt;i2c, msg, 2);</div><div class='del'>-</div><div class='del'>-	if (ret != 2)</div><div class='del'>-		printk(KERN_ERR "%s: readreg error (ret == %i)\n",</div><div class='del'>-		       __func__, ret);</div><div class='del'>-	return b1[0];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int au8522_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)</div><div class='del'>-{</div><div class='del'>-	struct au8522_state *state = fe-&gt;demodulator_priv;</div><div class='del'>-</div><div class='del'>-	dprintk("%s(%d)\n", __func__, enable);</div><div class='del'>-</div><div class='del'>-	if (state-&gt;operational_mode == AU8522_ANALOG_MODE) {</div><div class='del'>-		/* We're being asked to manage the gate even though we're</div><div class='del'>-		   not in digital mode.  This can occur if we get switched</div><div class='del'>-		   over to analog mode before the dvb_frontend kernel thread</div><div class='del'>-		   has completely shutdown */</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (enable)</div><div class='del'>-		return au8522_writereg(state, 0x106, 1);</div><div class='del'>-	else</div><div class='del'>-		return au8522_writereg(state, 0x106, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct mse2snr_tab {</div><div class='ctx'> 	u16 val;</div><div class='ctx'> 	u16 data;</div><div class='hunk'>@@ -609,136 +546,6 @@ static int au8522_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Reset the demod hardware and reset all of the configuration registers</div><div class='del'>-   to a default state. */</div><div class='del'>-int au8522_init(struct dvb_frontend *fe)</div><div class='del'>-{</div><div class='del'>-	struct au8522_state *state = fe-&gt;demodulator_priv;</div><div class='del'>-	dprintk("%s()\n", __func__);</div><div class='del'>-</div><div class='del'>-	state-&gt;operational_mode = AU8522_DIGITAL_MODE;</div><div class='del'>-</div><div class='del'>-	/* Clear out any state associated with the digital side of the</div><div class='del'>-	   chip, so that when it gets powered back up it won't think</div><div class='del'>-	   that it is already tuned */</div><div class='del'>-	state-&gt;current_frequency = 0;</div><div class='del'>-</div><div class='del'>-	au8522_writereg(state, 0xa4, 1 &lt;&lt; 5);</div><div class='del'>-</div><div class='del'>-	au8522_i2c_gate_ctrl(fe, 1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int au8522_led_gpio_enable(struct au8522_state *state, int onoff)</div><div class='del'>-{</div><div class='del'>-	struct au8522_led_config *led_config = state-&gt;config-&gt;led_cfg;</div><div class='del'>-	u8 val;</div><div class='del'>-</div><div class='del'>-	/* bail out if we can't control an LED */</div><div class='del'>-	if (!led_config || !led_config-&gt;gpio_output ||</div><div class='del'>-	    !led_config-&gt;gpio_output_enable || !led_config-&gt;gpio_output_disable)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	val = au8522_readreg(state, 0x4000 |</div><div class='del'>-			     (led_config-&gt;gpio_output &amp; ~0xc000));</div><div class='del'>-	if (onoff) {</div><div class='del'>-		/* enable GPIO output */</div><div class='del'>-		val &amp;= ~((led_config-&gt;gpio_output_enable &gt;&gt; 8) &amp; 0xff);</div><div class='del'>-		val |=  (led_config-&gt;gpio_output_enable &amp; 0xff);</div><div class='del'>-	} else {</div><div class='del'>-		/* disable GPIO output */</div><div class='del'>-		val &amp;= ~((led_config-&gt;gpio_output_disable &gt;&gt; 8) &amp; 0xff);</div><div class='del'>-		val |=  (led_config-&gt;gpio_output_disable &amp; 0xff);</div><div class='del'>-	}</div><div class='del'>-	return au8522_writereg(state, 0x8000 |</div><div class='del'>-			       (led_config-&gt;gpio_output &amp; ~0xc000), val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* led = 0 | off</div><div class='del'>- * led = 1 | signal ok</div><div class='del'>- * led = 2 | signal strong</div><div class='del'>- * led &lt; 0 | only light led if leds are currently off</div><div class='del'>- */</div><div class='del'>-static int au8522_led_ctrl(struct au8522_state *state, int led)</div><div class='del'>-{</div><div class='del'>-	struct au8522_led_config *led_config = state-&gt;config-&gt;led_cfg;</div><div class='del'>-	int i, ret = 0;</div><div class='del'>-</div><div class='del'>-	/* bail out if we can't control an LED */</div><div class='del'>-	if (!led_config || !led_config-&gt;gpio_leds ||</div><div class='del'>-	    !led_config-&gt;num_led_states || !led_config-&gt;led_states)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (led &lt; 0) {</div><div class='del'>-		/* if LED is already lit, then leave it as-is */</div><div class='del'>-		if (state-&gt;led_state)</div><div class='del'>-			return 0;</div><div class='del'>-		else</div><div class='del'>-			led *= -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* toggle LED if changing state */</div><div class='del'>-	if (state-&gt;led_state != led) {</div><div class='del'>-		u8 val;</div><div class='del'>-</div><div class='del'>-		dprintk("%s: %d\n", __func__, led);</div><div class='del'>-</div><div class='del'>-		au8522_led_gpio_enable(state, 1);</div><div class='del'>-</div><div class='del'>-		val = au8522_readreg(state, 0x4000 |</div><div class='del'>-				     (led_config-&gt;gpio_leds &amp; ~0xc000));</div><div class='del'>-</div><div class='del'>-		/* start with all leds off */</div><div class='del'>-		for (i = 0; i &lt; led_config-&gt;num_led_states; i++)</div><div class='del'>-			val &amp;= ~led_config-&gt;led_states[i];</div><div class='del'>-</div><div class='del'>-		/* set selected LED state */</div><div class='del'>-		if (led &lt; led_config-&gt;num_led_states)</div><div class='del'>-			val |= led_config-&gt;led_states[led];</div><div class='del'>-		else if (led_config-&gt;num_led_states)</div><div class='del'>-			val |=</div><div class='del'>-			led_config-&gt;led_states[led_config-&gt;num_led_states - 1];</div><div class='del'>-</div><div class='del'>-		ret = au8522_writereg(state, 0x8000 |</div><div class='del'>-				      (led_config-&gt;gpio_leds &amp; ~0xc000), val);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		state-&gt;led_state = led;</div><div class='del'>-</div><div class='del'>-		if (led == 0)</div><div class='del'>-			au8522_led_gpio_enable(state, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int au8522_sleep(struct dvb_frontend *fe)</div><div class='del'>-{</div><div class='del'>-	struct au8522_state *state = fe-&gt;demodulator_priv;</div><div class='del'>-	dprintk("%s()\n", __func__);</div><div class='del'>-</div><div class='del'>-	/* Only power down if the digital side is currently using the chip */</div><div class='del'>-	if (state-&gt;operational_mode == AU8522_ANALOG_MODE) {</div><div class='del'>-		/* We're not in one of the expected power modes, which means</div><div class='del'>-		   that the DVB thread is probably telling us to go to sleep</div><div class='del'>-		   even though the analog frontend has already started using</div><div class='del'>-		   the chip.  So ignore the request */</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* turn off led */</div><div class='del'>-	au8522_led_ctrl(state, 0);</div><div class='del'>-</div><div class='del'>-	/* Power down the chip */</div><div class='del'>-	au8522_writereg(state, 0xa4, 1 &lt;&lt; 5);</div><div class='del'>-</div><div class='del'>-	state-&gt;current_frequency = 0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int au8522_read_status(struct dvb_frontend *fe, fe_status_t *status)</div><div class='ctx'> {</div><div class='ctx'> 	struct au8522_state *state = fe-&gt;demodulator_priv;</div><div class='hunk'>@@ -931,28 +738,6 @@ static int au8522_get_tune_settings(struct dvb_frontend *fe,</div><div class='ctx'> </div><div class='ctx'> static struct dvb_frontend_ops au8522_ops;</div><div class='ctx'> </div><div class='del'>-int au8522_get_state(struct au8522_state **state, struct i2c_adapter *i2c,</div><div class='del'>-		     u8 client_address)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;au8522_list_mutex);</div><div class='del'>-	ret = hybrid_tuner_request_state(struct au8522_state, (*state),</div><div class='del'>-					 hybrid_tuner_instance_list,</div><div class='del'>-					 i2c, client_address, "au8522");</div><div class='del'>-	mutex_unlock(&amp;au8522_list_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void au8522_release_state(struct au8522_state *state)</div><div class='del'>-{</div><div class='del'>-	mutex_lock(&amp;au8522_list_mutex);</div><div class='del'>-	if (state != NULL)</div><div class='del'>-		hybrid_tuner_release_state(state);</div><div class='del'>-	mutex_unlock(&amp;au8522_list_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> static void au8522_release(struct dvb_frontend *fe)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/media/dvb/frontends/au8522_priv.h b/drivers/media/dvb/frontends/au8522_priv.h<br/>index 751e17d692a9..6e4a438732b5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/au8522_priv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/au8522_priv.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/au8522_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/au8522_priv.h</a></div><div class='hunk'>@@ -81,6 +81,8 @@ int au8522_sleep(struct dvb_frontend *fe);</div><div class='ctx'> int au8522_get_state(struct au8522_state **state, struct i2c_adapter *i2c,</div><div class='ctx'> 		     u8 client_address);</div><div class='ctx'> void au8522_release_state(struct au8522_state *state);</div><div class='add'>+int au8522_i2c_gate_ctrl(struct dvb_frontend *fe, int enable);</div><div class='add'>+int au8522_led_ctrl(struct au8522_state *state, int led);</div><div class='ctx'> </div><div class='ctx'> /* REGISTERS */</div><div class='ctx'> #define AU8522_INPUT_CONTROL_REG081H			0x081</div><div class='head'>diff --git a/drivers/media/dvb/frontends/cx24110.c b/drivers/media/dvb/frontends/cx24110.c<br/>index 5101f10f2d7a..98ecaf0900d6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/cx24110.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/cx24110.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/cx24110.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/cx24110.c</a></div><div class='hunk'>@@ -512,14 +512,13 @@ static int cx24110_read_snr(struct dvb_frontend* fe, u16* snr)</div><div class='ctx'> static int cx24110_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)</div><div class='ctx'> {</div><div class='ctx'> 	struct cx24110_state *state = fe-&gt;demodulator_priv;</div><div class='del'>-	u32 lastbyer;</div><div class='ctx'> </div><div class='ctx'> 	if(cx24110_readreg(state,0x10)&amp;0x40) {</div><div class='ctx'> 		/* the RS error counter has finished one counting window */</div><div class='ctx'> 		cx24110_writereg(state,0x10,0x60); /* select the byer reg */</div><div class='del'>-		lastbyer=cx24110_readreg(state,0x12)|</div><div class='del'>-			(cx24110_readreg(state,0x13)&lt;&lt;8)|</div><div class='del'>-			(cx24110_readreg(state,0x14)&lt;&lt;16);</div><div class='add'>+		cx24110_readreg(state, 0x12) |</div><div class='add'>+			(cx24110_readreg(state, 0x13) &lt;&lt; 8) |</div><div class='add'>+			(cx24110_readreg(state, 0x14) &lt;&lt; 16);</div><div class='ctx'> 		cx24110_writereg(state,0x10,0x70); /* select the bler reg */</div><div class='ctx'> 		state-&gt;lastbler=cx24110_readreg(state,0x12)|</div><div class='ctx'> 			(cx24110_readreg(state,0x13)&lt;&lt;8)|</div><div class='head'>diff --git a/drivers/media/dvb/frontends/cxd2820r_core.c b/drivers/media/dvb/frontends/cxd2820r_core.c<br/>index 5c7c2aaf9bf5..3bba37d74f57 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/cxd2820r_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/cxd2820r_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/cxd2820r_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/cxd2820r_core.c</a></div><div class='hunk'>@@ -526,12 +526,12 @@ static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto error;</div><div class='ctx'> </div><div class='del'>-		if (status &amp; FE_HAS_SIGNAL)</div><div class='add'>+		if (status &amp; FE_HAS_LOCK)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* check if we have a valid signal */</div><div class='del'>-	if (status) {</div><div class='add'>+	if (status &amp; FE_HAS_LOCK) {</div><div class='ctx'> 		priv-&gt;last_tune_failed = 0;</div><div class='ctx'> 		return DVBFE_ALGO_SEARCH_SUCCESS;</div><div class='ctx'> 	} else {</div><div class='head'>diff --git a/drivers/media/dvb/frontends/dib7000p.c b/drivers/media/dvb/frontends/dib7000p.c<br/>index 5ceadc285b3a..3e1eefada0e8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/dib7000p.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/dib7000p.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/dib7000p.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/dib7000p.c</a></div><div class='hunk'>@@ -2396,11 +2396,6 @@ struct dvb_frontend *dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr,</div><div class='ctx'> 	   more common) */</div><div class='ctx'> 	st-&gt;i2c_master.gated_tuner_i2c_adap.dev.parent = i2c_adap-&gt;dev.parent;</div><div class='ctx'> </div><div class='del'>-	/* FIXME: make sure the dev.parent field is initialized, or else</div><div class='del'>-	   request_firmware() will hit an OOPS (this should be moved somewhere</div><div class='del'>-	   more common) */</div><div class='del'>-	st-&gt;i2c_master.gated_tuner_i2c_adap.dev.parent = i2c_adap-&gt;dev.parent;</div><div class='del'>-</div><div class='ctx'> 	dibx000_init_i2c_master(&amp;st-&gt;i2c_master, DIB7000P, st-&gt;i2c_adap, st-&gt;i2c_addr);</div><div class='ctx'> </div><div class='ctx'> 	/* init 7090 tuner adapter */</div><div class='head'>diff --git a/drivers/media/dvb/frontends/dib9000.c b/drivers/media/dvb/frontends/dib9000.c<br/>index 80848b4c15d4..6201c59a78dd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/dib9000.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/dib9000.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/dib9000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/dib9000.c</a></div><div class='hunk'>@@ -31,13 +31,6 @@ struct i2c_device {</div><div class='ctx'> 	u8 *i2c_write_buffer;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* lock */</div><div class='del'>-#define DIB_LOCK struct mutex</div><div class='del'>-#define DibAcquireLock(lock) mutex_lock_interruptible(lock)</div><div class='del'>-#define DibReleaseLock(lock) mutex_unlock(lock)</div><div class='del'>-#define DibInitLock(lock) mutex_init(lock)</div><div class='del'>-#define DibFreeLock(lock)</div><div class='del'>-</div><div class='ctx'> struct dib9000_pid_ctrl {</div><div class='ctx'> #define DIB9000_PID_FILTER_CTRL 0</div><div class='ctx'> #define DIB9000_PID_FILTER      1</div><div class='hunk'>@@ -82,11 +75,11 @@ struct dib9000_state {</div><div class='ctx'> 			} fe_mm[18];</div><div class='ctx'> 			u8 memcmd;</div><div class='ctx'> </div><div class='del'>-			DIB_LOCK mbx_if_lock;	/* to protect read/write operations */</div><div class='del'>-			DIB_LOCK mbx_lock;	/* to protect the whole mailbox handling */</div><div class='add'>+			struct mutex mbx_if_lock;	/* to protect read/write operations */</div><div class='add'>+			struct mutex mbx_lock;	/* to protect the whole mailbox handling */</div><div class='ctx'> </div><div class='del'>-			DIB_LOCK mem_lock;	/* to protect the memory accesses */</div><div class='del'>-			DIB_LOCK mem_mbx_lock;	/* to protect the memory-based mailbox */</div><div class='add'>+			struct mutex mem_lock;	/* to protect the memory accesses */</div><div class='add'>+			struct mutex mem_mbx_lock;	/* to protect the memory-based mailbox */</div><div class='ctx'> </div><div class='ctx'> #define MBX_MAX_WORDS (256 - 200 - 2)</div><div class='ctx'> #define DIB9000_MSG_CACHE_SIZE 2</div><div class='hunk'>@@ -108,7 +101,7 @@ struct dib9000_state {</div><div class='ctx'> 	struct i2c_msg msg[2];</div><div class='ctx'> 	u8 i2c_write_buffer[255];</div><div class='ctx'> 	u8 i2c_read_buffer[255];</div><div class='del'>-	DIB_LOCK demod_lock;</div><div class='add'>+	struct mutex demod_lock;</div><div class='ctx'> 	u8 get_frontend_internal;</div><div class='ctx'> 	struct dib9000_pid_ctrl pid_ctrl[10];</div><div class='ctx'> 	s8 pid_ctrl_index; /* -1: empty list; -2: do not use the list */</div><div class='hunk'>@@ -446,13 +439,13 @@ static int dib9000_risc_mem_read(struct dib9000_state *state, u8 cmd, u8 * b, u1</div><div class='ctx'> 	if (!state-&gt;platform.risc.fw_is_running)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;platform.risc.mem_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;platform.risc.mem_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> 	}</div><div class='ctx'> 	dib9000_risc_mem_setup(state, cmd | 0x80);</div><div class='ctx'> 	dib9000_risc_mem_read_chunks(state, b, len);</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;platform.risc.mem_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;platform.risc.mem_lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -462,13 +455,13 @@ static int dib9000_risc_mem_write(struct dib9000_state *state, u8 cmd, const u8</div><div class='ctx'> 	if (!state-&gt;platform.risc.fw_is_running)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;platform.risc.mem_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;platform.risc.mem_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> 	}</div><div class='ctx'> 	dib9000_risc_mem_setup(state, cmd);</div><div class='ctx'> 	dib9000_risc_mem_write_chunks(state, b, m-&gt;size);</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;platform.risc.mem_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;platform.risc.mem_lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -537,7 +530,7 @@ static int dib9000_mbx_send_attr(struct dib9000_state *state, u8 id, u16 * data,</div><div class='ctx'> 	if (!state-&gt;platform.risc.fw_is_running)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;platform.risc.mbx_if_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;platform.risc.mbx_if_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -584,7 +577,7 @@ static int dib9000_mbx_send_attr(struct dib9000_state *state, u8 id, u16 * data,</div><div class='ctx'> 	ret = (u8) dib9000_write_word_attr(state, 1043, 1 &lt;&lt; 14, attr);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;platform.risc.mbx_if_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;platform.risc.mbx_if_lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -602,7 +595,7 @@ static u8 dib9000_mbx_read(struct dib9000_state *state, u16 * data, u8 risc_id,</div><div class='ctx'> 	if (!state-&gt;platform.risc.fw_is_running)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;platform.risc.mbx_if_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;platform.risc.mbx_if_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -643,7 +636,7 @@ static u8 dib9000_mbx_read(struct dib9000_state *state, u16 * data, u8 risc_id,</div><div class='ctx'> 	/* Update register nb_mes_in_TX */</div><div class='ctx'> 	dib9000_write_word_attr(state, 1028 + mc_base, 1 &lt;&lt; 14, attr);</div><div class='ctx'> </div><div class='del'>-	DibReleaseLock(&amp;state-&gt;platform.risc.mbx_if_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;platform.risc.mbx_if_lock);</div><div class='ctx'> </div><div class='ctx'> 	return size + 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -708,12 +701,11 @@ static u8 dib9000_mbx_count(struct dib9000_state *state, u8 risc_id, u16 attr)</div><div class='ctx'> static int dib9000_mbx_process(struct dib9000_state *state, u16 attr)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	u16 tmp;</div><div class='ctx'> </div><div class='ctx'> 	if (!state-&gt;platform.risc.fw_is_running)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;platform.risc.mbx_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;platform.risc.mbx_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -721,10 +713,10 @@ static int dib9000_mbx_process(struct dib9000_state *state, u16 attr)</div><div class='ctx'> 	if (dib9000_mbx_count(state, 1, attr))	/* 1=RiscB */</div><div class='ctx'> 		ret = dib9000_mbx_fetch_to_cache(state, attr);</div><div class='ctx'> </div><div class='del'>-	tmp = dib9000_read_word_attr(state, 1229, attr);	/* Clear the IRQ */</div><div class='add'>+	dib9000_read_word_attr(state, 1229, attr);	/* Clear the IRQ */</div><div class='ctx'> /*      if (tmp) */</div><div class='ctx'> /*              dprintk( "cleared IRQ: %x", tmp); */</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;platform.risc.mbx_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;platform.risc.mbx_lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1193,7 +1185,7 @@ static int dib9000_fw_get_channel(struct dvb_frontend *fe)</div><div class='ctx'> 	struct dibDVBTChannel *ch;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;platform.risc.mem_mbx_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;platform.risc.mem_mbx_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1323,7 +1315,7 @@ static int dib9000_fw_get_channel(struct dvb_frontend *fe)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1678,7 +1670,7 @@ static int dib9000_fw_component_bus_xfer(struct i2c_adapter *i2c_adap, struct i2</div><div class='ctx'> 		p[12] = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;platform.risc.mem_mbx_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;platform.risc.mem_mbx_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1692,7 +1684,7 @@ static int dib9000_fw_component_bus_xfer(struct i2c_adapter *i2c_adap, struct i2</div><div class='ctx'> </div><div class='ctx'> 	/* do the transaction */</div><div class='ctx'> 	if (dib9000_fw_memmbx_sync(state, FE_SYNC_COMPONENT_ACCESS) &lt; 0) {</div><div class='del'>-		DibReleaseLock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='add'>+		mutex_unlock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1700,7 +1692,7 @@ static int dib9000_fw_component_bus_xfer(struct i2c_adapter *i2c_adap, struct i2</div><div class='ctx'> 	if ((num &gt; 1) &amp;&amp; (msg[1].flags &amp; I2C_M_RD))</div><div class='ctx'> 		dib9000_risc_mem_read(state, FE_MM_RW_COMPONENT_ACCESS_BUFFER, msg[1].buf, msg[1].len);</div><div class='ctx'> </div><div class='del'>-	DibReleaseLock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='ctx'> </div><div class='ctx'> 	return num;</div><div class='ctx'> }</div><div class='hunk'>@@ -1789,7 +1781,7 @@ int dib9000_fw_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1799,7 +1791,7 @@ int dib9000_fw_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff)</div><div class='ctx'> </div><div class='ctx'> 	dprintk("PID filter enabled %d", onoff);</div><div class='ctx'> 	ret = dib9000_write_word(state, 294 + 1, val);</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;demod_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;demod_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -1824,14 +1816,14 @@ int dib9000_fw_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> 	}</div><div class='ctx'> 	dprintk("Index %x, PID %d, OnOff %d", id, pid, onoff);</div><div class='ctx'> 	ret = dib9000_write_word(state, 300 + 1 + id,</div><div class='ctx'> 			onoff ? (1 &lt;&lt; 13) | pid : 0);</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;demod_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;demod_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dib9000_fw_pid_filter);</div><div class='hunk'>@@ -1851,11 +1843,6 @@ static void dib9000_release(struct dvb_frontend *demod)</div><div class='ctx'> 	for (index_frontend = 1; (index_frontend &lt; MAX_NUMBER_OF_FRONTENDS) &amp;&amp; (st-&gt;fe[index_frontend] != NULL); index_frontend++)</div><div class='ctx'> 		dvb_frontend_detach(st-&gt;fe[index_frontend]);</div><div class='ctx'> </div><div class='del'>-	DibFreeLock(&amp;state-&gt;platform.risc.mbx_if_lock);</div><div class='del'>-	DibFreeLock(&amp;state-&gt;platform.risc.mbx_lock);</div><div class='del'>-	DibFreeLock(&amp;state-&gt;platform.risc.mem_lock);</div><div class='del'>-	DibFreeLock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='del'>-	DibFreeLock(&amp;state-&gt;demod_lock);</div><div class='ctx'> 	dibx000_exit_i2c_master(&amp;st-&gt;i2c_master);</div><div class='ctx'> </div><div class='ctx'> 	i2c_del_adapter(&amp;st-&gt;tuner_adap);</div><div class='hunk'>@@ -1875,7 +1862,7 @@ static int dib9000_sleep(struct dvb_frontend *fe)</div><div class='ctx'> 	u8 index_frontend;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1887,7 +1874,7 @@ static int dib9000_sleep(struct dvb_frontend *fe)</div><div class='ctx'> 	ret = dib9000_mbx_send(state, OUT_MSG_FE_SLEEP, NULL, 0);</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;demod_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;demod_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1905,7 +1892,7 @@ static int dib9000_get_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (state-&gt;get_frontend_internal == 0) {</div><div class='del'>-		if (DibAcquireLock(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='add'>+		if (mutex_lock_interruptible(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='ctx'> 			dprintk("could not get the lock");</div><div class='ctx'> 			return -EINTR;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1964,7 +1951,7 @@ static int dib9000_get_frontend(struct dvb_frontend *fe)</div><div class='ctx'> </div><div class='ctx'> return_value:</div><div class='ctx'> 	if (state-&gt;get_frontend_internal == 0)</div><div class='del'>-		DibReleaseLock(&amp;state-&gt;demod_lock);</div><div class='add'>+		mutex_unlock(&amp;state-&gt;demod_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2012,7 +1999,7 @@ static int dib9000_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	state-&gt;pid_ctrl_index = -1; /* postpone the pid filtering cmd */</div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2081,7 +2068,7 @@ static int dib9000_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 	/* check the tune result */</div><div class='ctx'> 	if (exit_condition == 1) {	/* tune failed */</div><div class='ctx'> 		dprintk("tune failed");</div><div class='del'>-		DibReleaseLock(&amp;state-&gt;demod_lock);</div><div class='add'>+		mutex_unlock(&amp;state-&gt;demod_lock);</div><div class='ctx'> 		/* tune failed; put all the pid filtering cmd to junk */</div><div class='ctx'> 		state-&gt;pid_ctrl_index = -1;</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2137,7 +2124,7 @@ static int dib9000_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 	/* turn off the diversity for the last frontend */</div><div class='ctx'> 	dib9000_fw_set_diversity_in(state-&gt;fe[index_frontend - 1], 0);</div><div class='ctx'> </div><div class='del'>-	DibReleaseLock(&amp;state-&gt;demod_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;demod_lock);</div><div class='ctx'> 	if (state-&gt;pid_ctrl_index &gt;= 0) {</div><div class='ctx'> 		u8 index_pid_filter_cmd;</div><div class='ctx'> 		u8 pid_ctrl_index = state-&gt;pid_ctrl_index;</div><div class='hunk'>@@ -2175,7 +2162,7 @@ static int dib9000_read_status(struct dvb_frontend *fe, fe_status_t * stat)</div><div class='ctx'> 	u8 index_frontend;</div><div class='ctx'> 	u16 lock = 0, lock_slave = 0;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2197,7 +2184,7 @@ static int dib9000_read_status(struct dvb_frontend *fe, fe_status_t * stat)</div><div class='ctx'> 	if ((lock &amp; 0x0008) || (lock_slave &amp; 0x0008))</div><div class='ctx'> 		*stat |= FE_HAS_LOCK;</div><div class='ctx'> </div><div class='del'>-	DibReleaseLock(&amp;state-&gt;demod_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;demod_lock);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2208,30 +2195,30 @@ static int dib9000_read_ber(struct dvb_frontend *fe, u32 * ber)</div><div class='ctx'> 	u16 *c;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> 	}</div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;platform.risc.mem_mbx_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;platform.risc.mem_mbx_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		ret = -EINTR;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) &lt; 0) {</div><div class='del'>-		DibReleaseLock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='add'>+		mutex_unlock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='ctx'> 		ret = -EIO;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> 	dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR,</div><div class='ctx'> 			state-&gt;i2c_read_buffer, 16 * 2);</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='ctx'> </div><div class='ctx'> 	c = (u16 *)state-&gt;i2c_read_buffer;</div><div class='ctx'> </div><div class='ctx'> 	*ber = c[10] &lt;&lt; 16 | c[11];</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;demod_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;demod_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2243,7 +2230,7 @@ static int dib9000_read_signal_strength(struct dvb_frontend *fe, u16 * strength)</div><div class='ctx'> 	u16 val;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2256,18 +2243,18 @@ static int dib9000_read_signal_strength(struct dvb_frontend *fe, u16 * strength)</div><div class='ctx'> 			*strength += val;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;platform.risc.mem_mbx_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;platform.risc.mem_mbx_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		ret = -EINTR;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) &lt; 0) {</div><div class='del'>-		DibReleaseLock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='add'>+		mutex_unlock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='ctx'> 		ret = -EIO;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> 	dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, (u8 *) c, 16 * 2);</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='ctx'> </div><div class='ctx'> 	val = 65535 - c[4];</div><div class='ctx'> 	if (val &gt; 65535 - *strength)</div><div class='hunk'>@@ -2276,7 +2263,7 @@ static int dib9000_read_signal_strength(struct dvb_frontend *fe, u16 * strength)</div><div class='ctx'> 		*strength += val;</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;demod_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;demod_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2287,16 +2274,16 @@ static u32 dib9000_get_snr(struct dvb_frontend *fe)</div><div class='ctx'> 	u32 n, s, exp;</div><div class='ctx'> 	u16 val;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;platform.risc.mem_mbx_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;platform.risc.mem_mbx_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) &lt; 0) {</div><div class='del'>-		DibReleaseLock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='add'>+		mutex_unlock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, (u8 *) c, 16 * 2);</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='ctx'> </div><div class='ctx'> 	val = c[7];</div><div class='ctx'> 	n = (val &gt;&gt; 4) &amp; 0xff;</div><div class='hunk'>@@ -2326,7 +2313,7 @@ static int dib9000_read_snr(struct dvb_frontend *fe, u16 * snr)</div><div class='ctx'> 	u8 index_frontend;</div><div class='ctx'> 	u32 snr_master;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2340,7 +2327,7 @@ static int dib9000_read_snr(struct dvb_frontend *fe, u16 * snr)</div><div class='ctx'> 	} else</div><div class='ctx'> 		*snr = 0;</div><div class='ctx'> </div><div class='del'>-	DibReleaseLock(&amp;state-&gt;demod_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;demod_lock);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2351,27 +2338,27 @@ static int dib9000_read_unc_blocks(struct dvb_frontend *fe, u32 * unc)</div><div class='ctx'> 	u16 *c = (u16 *)state-&gt;i2c_read_buffer;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;demod_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> 	}</div><div class='del'>-	if (DibAcquireLock(&amp;state-&gt;platform.risc.mem_mbx_lock) &lt; 0) {</div><div class='add'>+	if (mutex_lock_interruptible(&amp;state-&gt;platform.risc.mem_mbx_lock) &lt; 0) {</div><div class='ctx'> 		dprintk("could not get the lock");</div><div class='ctx'> 		ret = -EINTR;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) &lt; 0) {</div><div class='del'>-		DibReleaseLock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='add'>+		mutex_unlock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='ctx'> 		ret = -EIO;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> 	dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, (u8 *) c, 16 * 2);</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;platform.risc.mem_mbx_lock);</div><div class='ctx'> </div><div class='ctx'> 	*unc = c[12];</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='del'>-	DibReleaseLock(&amp;state-&gt;demod_lock);</div><div class='add'>+	mutex_unlock(&amp;state-&gt;demod_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2514,11 +2501,11 @@ struct dvb_frontend *dib9000_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, c</div><div class='ctx'> 	st-&gt;gpio_val = DIB9000_GPIO_DEFAULT_VALUES;</div><div class='ctx'> 	st-&gt;gpio_pwm_pos = DIB9000_GPIO_DEFAULT_PWM_POS;</div><div class='ctx'> </div><div class='del'>-	DibInitLock(&amp;st-&gt;platform.risc.mbx_if_lock);</div><div class='del'>-	DibInitLock(&amp;st-&gt;platform.risc.mbx_lock);</div><div class='del'>-	DibInitLock(&amp;st-&gt;platform.risc.mem_lock);</div><div class='del'>-	DibInitLock(&amp;st-&gt;platform.risc.mem_mbx_lock);</div><div class='del'>-	DibInitLock(&amp;st-&gt;demod_lock);</div><div class='add'>+	mutex_init(&amp;st-&gt;platform.risc.mbx_if_lock);</div><div class='add'>+	mutex_init(&amp;st-&gt;platform.risc.mbx_lock);</div><div class='add'>+	mutex_init(&amp;st-&gt;platform.risc.mem_lock);</div><div class='add'>+	mutex_init(&amp;st-&gt;platform.risc.mem_mbx_lock);</div><div class='add'>+	mutex_init(&amp;st-&gt;demod_lock);</div><div class='ctx'> 	st-&gt;get_frontend_internal = 0;</div><div class='ctx'> </div><div class='ctx'> 	st-&gt;pid_ctrl_index = -2;</div><div class='head'>diff --git a/drivers/media/dvb/frontends/drxd.h b/drivers/media/dvb/frontends/drxd.h<br/>index 34398738f9bc..216c8c3702f8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/drxd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/drxd.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/drxd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/drxd.h</a></div><div class='hunk'>@@ -51,9 +51,23 @@ struct drxd_config {</div><div class='ctx'> 	 s16(*osc_deviation) (void *priv, s16 dev, int flag);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_DVB_DRXD) || \</div><div class='add'>+			(defined(CONFIG_DVB_DRXD_MODULE) &amp;&amp; defined(MODULE))</div><div class='ctx'> extern</div><div class='ctx'> struct dvb_frontend *drxd_attach(const struct drxd_config *config,</div><div class='ctx'> 				 void *priv, struct i2c_adapter *i2c,</div><div class='ctx'> 				 struct device *dev);</div><div class='add'>+#else</div><div class='add'>+static inline</div><div class='add'>+struct dvb_frontend *drxd_attach(const struct drxd_config *config,</div><div class='add'>+				 void *priv, struct i2c_adapter *i2c,</div><div class='add'>+				 struct device *dev)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_INFO "%s: not probed - driver disabled by Kconfig\n",</div><div class='add'>+	       __func__);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> extern int drxd_config_i2c(struct dvb_frontend *, int);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/media/dvb/frontends/drxk_hard.c b/drivers/media/dvb/frontends/drxk_hard.c<br/>index a414b1f2b6a5..60b868faeacf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/drxk_hard.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/drxk_hard.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/drxk_hard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/drxk_hard.c</a></div><div class='hunk'>@@ -1380,20 +1380,20 @@ static int DownloadMicrocode(struct drxk_state *state,</div><div class='ctx'> 			     const u8 pMCImage[], u32 Length)</div><div class='ctx'> {</div><div class='ctx'> 	const u8 *pSrc = pMCImage;</div><div class='del'>-	u16 Flags;</div><div class='del'>-	u16 Drain;</div><div class='ctx'> 	u32 Address;</div><div class='ctx'> 	u16 nBlocks;</div><div class='ctx'> 	u16 BlockSize;</div><div class='del'>-	u16 BlockCRC;</div><div class='ctx'> 	u32 offset = 0;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> 	int status = 0;</div><div class='ctx'> </div><div class='ctx'> 	dprintk(1, "\n");</div><div class='ctx'> </div><div class='del'>-	/* down the drain (we don care about MAGIC_WORD) */</div><div class='add'>+	/* down the drain (we don't care about MAGIC_WORD) */</div><div class='add'>+#if 0</div><div class='add'>+	/* For future reference */</div><div class='ctx'> 	Drain = (pSrc[0] &lt;&lt; 8) | pSrc[1];</div><div class='add'>+#endif</div><div class='ctx'> 	pSrc += sizeof(u16);</div><div class='ctx'> 	offset += sizeof(u16);</div><div class='ctx'> 	nBlocks = (pSrc[0] &lt;&lt; 8) | pSrc[1];</div><div class='hunk'>@@ -1410,11 +1410,17 @@ static int DownloadMicrocode(struct drxk_state *state,</div><div class='ctx'> 		pSrc += sizeof(u16);</div><div class='ctx'> 		offset += sizeof(u16);</div><div class='ctx'> </div><div class='add'>+#if 0</div><div class='add'>+		/* For future reference */</div><div class='ctx'> 		Flags = (pSrc[0] &lt;&lt; 8) | pSrc[1];</div><div class='add'>+#endif</div><div class='ctx'> 		pSrc += sizeof(u16);</div><div class='ctx'> 		offset += sizeof(u16);</div><div class='ctx'> </div><div class='add'>+#if 0</div><div class='add'>+		/* For future reference */</div><div class='ctx'> 		BlockCRC = (pSrc[0] &lt;&lt; 8) | pSrc[1];</div><div class='add'>+#endif</div><div class='ctx'> 		pSrc += sizeof(u16);</div><div class='ctx'> 		offset += sizeof(u16);</div><div class='ctx'> </div><div class='hunk'>@@ -5829,7 +5835,7 @@ static int WriteGPIO(struct drxk_state *state)</div><div class='ctx'> 		}</div><div class='ctx'> 		if (state-&gt;UIO_mask &amp; 0x0002) { /* UIO-2 */</div><div class='ctx'> 			/* write to io pad configuration register - output mode */</div><div class='del'>-			status = write16(state, SIO_PDR_SMA_TX_CFG__A, state-&gt;m_GPIOCfg);</div><div class='add'>+			status = write16(state, SIO_PDR_SMA_RX_CFG__A, state-&gt;m_GPIOCfg);</div><div class='ctx'> 			if (status &lt; 0)</div><div class='ctx'> 				goto error;</div><div class='ctx'> </div><div class='hunk'>@@ -5848,7 +5854,7 @@ static int WriteGPIO(struct drxk_state *state)</div><div class='ctx'> 		}</div><div class='ctx'> 		if (state-&gt;UIO_mask &amp; 0x0004) { /* UIO-3 */</div><div class='ctx'> 			/* write to io pad configuration register - output mode */</div><div class='del'>-			status = write16(state, SIO_PDR_SMA_TX_CFG__A, state-&gt;m_GPIOCfg);</div><div class='add'>+			status = write16(state, SIO_PDR_GPIO_CFG__A, state-&gt;m_GPIOCfg);</div><div class='ctx'> 			if (status &lt; 0)</div><div class='ctx'> 				goto error;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/dvb/frontends/drxk_map.h b/drivers/media/dvb/frontends/drxk_map.h<br/>index 9b11a8328869..23e16c12f234 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/drxk_map.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/drxk_map.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/drxk_map.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/drxk_map.h</a></div><div class='hunk'>@@ -432,6 +432,7 @@</div><div class='ctx'> #define  SIO_PDR_UIO_OUT_LO__A                                             0x7F0016</div><div class='ctx'> #define  SIO_PDR_OHW_CFG__A                                                0x7F001F</div><div class='ctx'> #define    SIO_PDR_OHW_CFG_FREF_SEL__M                                     0x3</div><div class='add'>+#define  SIO_PDR_GPIO_CFG__A                                               0x7F0021</div><div class='ctx'> #define  SIO_PDR_MSTRT_CFG__A                                              0x7F0025</div><div class='ctx'> #define  SIO_PDR_MERR_CFG__A                                               0x7F0026</div><div class='ctx'> #define  SIO_PDR_MCLK_CFG__A                                               0x7F0028</div><div class='hunk'>@@ -446,4 +447,5 @@</div><div class='ctx'> #define  SIO_PDR_MD5_CFG__A                                                0x7F0030</div><div class='ctx'> #define  SIO_PDR_MD6_CFG__A                                                0x7F0031</div><div class='ctx'> #define  SIO_PDR_MD7_CFG__A                                                0x7F0032</div><div class='add'>+#define  SIO_PDR_SMA_RX_CFG__A                                             0x7F0037</div><div class='ctx'> #define  SIO_PDR_SMA_TX_CFG__A                                             0x7F0038</div><div class='head'>diff --git a/drivers/media/dvb/frontends/ds3000.c b/drivers/media/dvb/frontends/ds3000.c<br/>index af65d013db11..4c8ac2657c4a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/ds3000.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/ds3000.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/ds3000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/ds3000.c</a></div><div class='hunk'>@@ -1114,7 +1114,10 @@ static int ds3000_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 			ds3000_writereg(state,</div><div class='ctx'> 				ds3000_dvbs2_init_tab[i],</div><div class='ctx'> 				ds3000_dvbs2_init_tab[i + 1]);</div><div class='del'>-		ds3000_writereg(state, 0xfe, 0x98);</div><div class='add'>+		if (c-&gt;symbol_rate &gt;= 30000000)</div><div class='add'>+			ds3000_writereg(state, 0xfe, 0x54);</div><div class='add'>+		else</div><div class='add'>+			ds3000_writereg(state, 0xfe, 0x98);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return 1;</div><div class='head'>diff --git a/drivers/media/dvb/frontends/it913x-fe.c b/drivers/media/dvb/frontends/it913x-fe.c<br/>index 84df03c29179..708cbf197913 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/it913x-fe.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/it913x-fe.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/it913x-fe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/it913x-fe.c</a></div><div class='hunk'>@@ -633,10 +633,9 @@ static int it913x_fe_read_snr(struct dvb_frontend *fe, u16 *snr)</div><div class='ctx'> static int it913x_fe_read_ber(struct dvb_frontend *fe, u32 *ber)</div><div class='ctx'> {</div><div class='ctx'> 	struct it913x_fe_state *state = fe-&gt;demodulator_priv;</div><div class='del'>-	int ret;</div><div class='ctx'> 	u8 reg[5];</div><div class='ctx'> 	/* Read Aborted Packets and Pre-Viterbi error rate 5 bytes */</div><div class='del'>-	ret = it913x_read_reg(state, RSD_ABORT_PKT_LSB, reg, sizeof(reg));</div><div class='add'>+	it913x_read_reg(state, RSD_ABORT_PKT_LSB, reg, sizeof(reg));</div><div class='ctx'> 	state-&gt;ucblocks += (u32)(reg[1] &lt;&lt; 8) | reg[0];</div><div class='ctx'> 	*ber = (u32)(reg[4] &lt;&lt; 16) | (reg[3] &lt;&lt; 8) | reg[2];</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -658,10 +657,9 @@ static int it913x_fe_get_frontend(struct dvb_frontend *fe)</div><div class='ctx'> {</div><div class='ctx'> 	struct dtv_frontend_properties *p = &amp;fe-&gt;dtv_property_cache;</div><div class='ctx'> 	struct it913x_fe_state *state = fe-&gt;demodulator_priv;</div><div class='del'>-	int ret;</div><div class='ctx'> 	u8 reg[8];</div><div class='ctx'> </div><div class='del'>-	ret = it913x_read_reg(state, REG_TPSD_TX_MODE, reg, sizeof(reg));</div><div class='add'>+	it913x_read_reg(state, REG_TPSD_TX_MODE, reg, sizeof(reg));</div><div class='ctx'> </div><div class='ctx'> 	if (reg[3] &lt; 3)</div><div class='ctx'> 		p-&gt;modulation = fe_con[reg[3]];</div><div class='hunk'>@@ -691,25 +689,25 @@ static int it913x_fe_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> {</div><div class='ctx'> 	struct dtv_frontend_properties *p = &amp;fe-&gt;dtv_property_cache;</div><div class='ctx'> 	struct it913x_fe_state *state = fe-&gt;demodulator_priv;</div><div class='del'>-	int ret, i;</div><div class='add'>+	int i;</div><div class='ctx'> 	u8 empty_ch, last_ch;</div><div class='ctx'> </div><div class='ctx'> 	state-&gt;it913x_status = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Set bw*/</div><div class='del'>-	ret = it913x_fe_select_bw(state, p-&gt;bandwidth_hz,</div><div class='add'>+	it913x_fe_select_bw(state, p-&gt;bandwidth_hz,</div><div class='ctx'> 		state-&gt;adcFrequency);</div><div class='ctx'> </div><div class='ctx'> 	/* Training Mode Off */</div><div class='del'>-	ret = it913x_write_reg(state, PRO_LINK, TRAINING_MODE, 0x0);</div><div class='add'>+	it913x_write_reg(state, PRO_LINK, TRAINING_MODE, 0x0);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear Empty Channel */</div><div class='del'>-	ret = it913x_write_reg(state, PRO_DMOD, EMPTY_CHANNEL_STATUS, 0x0);</div><div class='add'>+	it913x_write_reg(state, PRO_DMOD, EMPTY_CHANNEL_STATUS, 0x0);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear bits */</div><div class='del'>-	ret = it913x_write_reg(state, PRO_DMOD, MP2IF_SYNC_LK, 0x0);</div><div class='add'>+	it913x_write_reg(state, PRO_DMOD, MP2IF_SYNC_LK, 0x0);</div><div class='ctx'> 	/* LED on */</div><div class='del'>-	ret = it913x_write_reg(state, PRO_LINK, GPIOH3_O, 0x1);</div><div class='add'>+	it913x_write_reg(state, PRO_LINK, GPIOH3_O, 0x1);</div><div class='ctx'> 	/* Select Band*/</div><div class='ctx'> 	if ((p-&gt;frequency &gt;= 51000000) &amp;&amp; (p-&gt;frequency &lt;= 230000000))</div><div class='ctx'> 		i = 0;</div><div class='hunk'>@@ -720,7 +718,7 @@ static int it913x_fe_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 	else</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	ret = it913x_write_reg(state, PRO_DMOD, FREE_BAND, i);</div><div class='add'>+	it913x_write_reg(state, PRO_DMOD, FREE_BAND, i);</div><div class='ctx'> </div><div class='ctx'> 	deb_info("Frontend Set Tuner Type %02x", state-&gt;tuner_type);</div><div class='ctx'> 	switch (state-&gt;tuner_type) {</div><div class='hunk'>@@ -730,7 +728,7 @@ static int it913x_fe_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 	case IT9135_60:</div><div class='ctx'> 	case IT9135_61:</div><div class='ctx'> 	case IT9135_62:</div><div class='del'>-		ret = it9137_set_tuner(state,</div><div class='add'>+		it9137_set_tuner(state,</div><div class='ctx'> 			p-&gt;bandwidth_hz, p-&gt;frequency);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -742,9 +740,9 @@ static int it913x_fe_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* LED off */</div><div class='del'>-	ret = it913x_write_reg(state, PRO_LINK, GPIOH3_O, 0x0);</div><div class='add'>+	it913x_write_reg(state, PRO_LINK, GPIOH3_O, 0x0);</div><div class='ctx'> 	/* Trigger ofsm */</div><div class='del'>-	ret = it913x_write_reg(state, PRO_DMOD, TRIGGER_OFSM, 0x0);</div><div class='add'>+	it913x_write_reg(state, PRO_DMOD, TRIGGER_OFSM, 0x0);</div><div class='ctx'> 	last_ch = 2;</div><div class='ctx'> 	for (i = 0; i &lt; 40; ++i) {</div><div class='ctx'> 		empty_ch = it913x_read_reg_u8(state, EMPTY_CHANNEL_STATUS);</div><div class='head'>diff --git a/drivers/media/dvb/frontends/lg2160.c b/drivers/media/dvb/frontends/lg2160.c<br/>new file mode 100644<br/>index 000000000000..a3ab1a5b6597<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/lg2160.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/lg2160.c</a></div><div class='hunk'>@@ -0,0 +1,1468 @@</div><div class='add'>+/*</div><div class='add'>+ *    Support for LG2160 - ATSC/MH</div><div class='add'>+ *</div><div class='add'>+ *    Copyright (C) 2010 Michael Krufky &lt;mkrufky@linuxtv.org&gt;</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License</div><div class='add'>+ *    along with this program; if not, write to the Free Software</div><div class='add'>+ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/dvb/frontend.h&gt;</div><div class='add'>+#include "lg2160.h"</div><div class='add'>+</div><div class='add'>+static int debug;</div><div class='add'>+module_param(debug, int, 0644);</div><div class='add'>+MODULE_PARM_DESC(debug, "set debug level (info=1, reg=2 (or-able))");</div><div class='add'>+</div><div class='add'>+#define DBG_INFO 1</div><div class='add'>+#define DBG_REG  2</div><div class='add'>+</div><div class='add'>+#define lg_printk(kern, fmt, arg...)					\</div><div class='add'>+	printk(kern "%s: " fmt, __func__, ##arg)</div><div class='add'>+</div><div class='add'>+#define lg_info(fmt, arg...)	printk(KERN_INFO "lg2160: " fmt, ##arg)</div><div class='add'>+#define lg_warn(fmt, arg...)	lg_printk(KERN_WARNING,       fmt, ##arg)</div><div class='add'>+#define lg_err(fmt, arg...)	lg_printk(KERN_ERR,           fmt, ##arg)</div><div class='add'>+#define lg_dbg(fmt, arg...) if (debug &amp; DBG_INFO)			\</div><div class='add'>+				lg_printk(KERN_DEBUG,         fmt, ##arg)</div><div class='add'>+#define lg_reg(fmt, arg...) if (debug &amp; DBG_REG)			\</div><div class='add'>+				lg_printk(KERN_DEBUG,         fmt, ##arg)</div><div class='add'>+</div><div class='add'>+#define lg_fail(ret)							\</div><div class='add'>+({									\</div><div class='add'>+	int __ret;							\</div><div class='add'>+	__ret = (ret &lt; 0);						\</div><div class='add'>+	if (__ret)							\</div><div class='add'>+		lg_err("error %d on line %d\n",	ret, __LINE__);		\</div><div class='add'>+	__ret;								\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+struct lg216x_state {</div><div class='add'>+	struct i2c_adapter *i2c_adap;</div><div class='add'>+	const struct lg2160_config *cfg;</div><div class='add'>+</div><div class='add'>+	struct dvb_frontend frontend;</div><div class='add'>+</div><div class='add'>+	u32 current_frequency;</div><div class='add'>+	u8 parade_id;</div><div class='add'>+	u8 fic_ver;</div><div class='add'>+	unsigned int last_reset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+static int lg216x_write_reg(struct lg216x_state *state, u16 reg, u8 val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 buf[] = { reg &gt;&gt; 8, reg &amp; 0xff, val };</div><div class='add'>+	struct i2c_msg msg = {</div><div class='add'>+		.addr = state-&gt;cfg-&gt;i2c_addr, .flags = 0,</div><div class='add'>+		.buf = buf, .len = 3,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lg_reg("reg: 0x%04x, val: 0x%02x\n", reg, val);</div><div class='add'>+</div><div class='add'>+	ret = i2c_transfer(state-&gt;i2c_adap, &amp;msg, 1);</div><div class='add'>+</div><div class='add'>+	if (ret != 1) {</div><div class='add'>+		lg_err("error (addr %02x %02x &lt;- %02x, err = %i)\n",</div><div class='add'>+		       msg.buf[0], msg.buf[1], msg.buf[2], ret);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		else</div><div class='add'>+			return -EREMOTEIO;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_read_reg(struct lg216x_state *state, u16 reg, u8 *val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 reg_buf[] = { reg &gt;&gt; 8, reg &amp; 0xff };</div><div class='add'>+	struct i2c_msg msg[] = {</div><div class='add'>+		{ .addr = state-&gt;cfg-&gt;i2c_addr,</div><div class='add'>+		  .flags = 0, .buf = reg_buf, .len = 2 },</div><div class='add'>+		{ .addr = state-&gt;cfg-&gt;i2c_addr,</div><div class='add'>+		  .flags = I2C_M_RD, .buf = val, .len = 1 },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	lg_reg("reg: 0x%04x\n", reg);</div><div class='add'>+</div><div class='add'>+	ret = i2c_transfer(state-&gt;i2c_adap, msg, 2);</div><div class='add'>+</div><div class='add'>+	if (ret != 2) {</div><div class='add'>+		lg_err("error (addr %02x reg %04x error (ret == %i)\n",</div><div class='add'>+		       state-&gt;cfg-&gt;i2c_addr, reg, ret);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		else</div><div class='add'>+			return -EREMOTEIO;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct lg216x_reg {</div><div class='add'>+	u16 reg;</div><div class='add'>+	u8 val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int lg216x_write_regs(struct lg216x_state *state,</div><div class='add'>+			     struct lg216x_reg *regs, int len)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	lg_reg("writing %d registers...\n", len);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len - 1; i++) {</div><div class='add'>+		ret = lg216x_write_reg(state, regs[i].reg, regs[i].val);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_set_reg_bit(struct lg216x_state *state,</div><div class='add'>+			      u16 reg, int bit, int onoff)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lg_reg("reg: 0x%04x, bit: %d, level: %d\n", reg, bit, onoff);</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, reg, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~(1 &lt;&lt; bit);</div><div class='add'>+	val |= (onoff &amp; 1) &lt;&lt; bit;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, reg, val);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+static int lg216x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)</div><div class='add'>+{</div><div class='add'>+	struct lg216x_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (state-&gt;cfg-&gt;deny_i2c_rptr)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	lg_dbg("(%d)\n", enable);</div><div class='add'>+</div><div class='add'>+	ret = lg216x_set_reg_bit(state, 0x0000, 0, enable ? 0 : 1);</div><div class='add'>+</div><div class='add'>+	msleep(1);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_soft_reset(struct lg216x_state *state)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lg_dbg("\n");</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0002, 0x00);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	msleep(20);</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0002, 0x01);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	state-&gt;last_reset = jiffies_to_msecs(jiffies);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_initialize(struct lg216x_state *state)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	static struct lg216x_reg lg2160_init[] = {</div><div class='add'>+#if 0</div><div class='add'>+		{ .reg = 0x0015, .val = 0xe6 },</div><div class='add'>+#else</div><div class='add'>+		{ .reg = 0x0015, .val = 0xf7 },</div><div class='add'>+		{ .reg = 0x001b, .val = 0x52 },</div><div class='add'>+		{ .reg = 0x0208, .val = 0x00 },</div><div class='add'>+		{ .reg = 0x0209, .val = 0x82 },</div><div class='add'>+		{ .reg = 0x0210, .val = 0xf9 },</div><div class='add'>+		{ .reg = 0x020a, .val = 0x00 },</div><div class='add'>+		{ .reg = 0x020b, .val = 0x82 },</div><div class='add'>+		{ .reg = 0x020d, .val = 0x28 },</div><div class='add'>+		{ .reg = 0x020f, .val = 0x14 },</div><div class='add'>+#endif</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	static struct lg216x_reg lg2161_init[] = {</div><div class='add'>+		{ .reg = 0x0000, .val = 0x41 },</div><div class='add'>+		{ .reg = 0x0001, .val = 0xfb },</div><div class='add'>+		{ .reg = 0x0216, .val = 0x00 },</div><div class='add'>+		{ .reg = 0x0219, .val = 0x00 },</div><div class='add'>+		{ .reg = 0x021b, .val = 0x55 },</div><div class='add'>+		{ .reg = 0x0606, .val = 0x0a },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		ret = lg216x_write_regs(state,</div><div class='add'>+					lg2160_init, ARRAY_SIZE(lg2160_init));</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		ret = lg216x_write_regs(state,</div><div class='add'>+					lg2161_init, ARRAY_SIZE(lg2161_init));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_soft_reset(state);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+static int lg216x_set_if(struct lg216x_state *state)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lg_dbg("%d KHz\n", state-&gt;cfg-&gt;if_khz);</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0132, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	val &amp;= 0xfb;</div><div class='add'>+	val |= (0 == state-&gt;cfg-&gt;if_khz) ? 0x04 : 0x00;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0132, val);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+</div><div class='add'>+	/* if NOT zero IF, 6 MHz is the default */</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+static int lg2160_agc_fix(struct lg216x_state *state,</div><div class='add'>+			  int if_agc_fix, int rf_agc_fix)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0100, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	val &amp;= 0xf3;</div><div class='add'>+	val |= (if_agc_fix) ? 0x08 : 0x00;</div><div class='add'>+	val |= (rf_agc_fix) ? 0x04 : 0x00;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0100, val);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+static int lg2160_agc_freeze(struct lg216x_state *state,</div><div class='add'>+			     int if_agc_freeze, int rf_agc_freeze)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0100, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	val &amp;= 0xcf;</div><div class='add'>+	val |= (if_agc_freeze) ? 0x20 : 0x00;</div><div class='add'>+	val |= (rf_agc_freeze) ? 0x10 : 0x00;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0100, val);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int lg2160_agc_polarity(struct lg216x_state *state,</div><div class='add'>+			       int if_agc_polarity, int rf_agc_polarity)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0100, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	val &amp;= 0xfc;</div><div class='add'>+	val |= (if_agc_polarity) ? 0x02 : 0x00;</div><div class='add'>+	val |= (rf_agc_polarity) ? 0x01 : 0x00;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0100, val);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg2160_tuner_pwr_save_polarity(struct lg216x_state *state,</div><div class='add'>+					  int polarity)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0008, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	val &amp;= 0xfe;</div><div class='add'>+	val |= (polarity) ? 0x01 : 0x00;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0008, val);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg2160_spectrum_polarity(struct lg216x_state *state,</div><div class='add'>+				    int inverted)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0132, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	val &amp;= 0xfd;</div><div class='add'>+	val |= (inverted) ? 0x02 : 0x00;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0132, val);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+fail:</div><div class='add'>+	return lg216x_soft_reset(state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg2160_tuner_pwr_save(struct lg216x_state *state, int onoff)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0007, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	val &amp;= 0xbf;</div><div class='add'>+	val |= (onoff) ? 0x40 : 0x00;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0007, val);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_set_parade(struct lg216x_state *state, int id)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x013e, id &amp; 0x7f);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	state-&gt;parade_id = id &amp; 0x7f;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_set_ensemble(struct lg216x_state *state, int id)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u16 reg;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		reg = 0x0400;</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+	default:</div><div class='add'>+		reg = 0x0500;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, reg, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	val &amp;= 0xfe;</div><div class='add'>+	val |= (id) ? 0x01 : 0x00;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, reg, val);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg2160_set_spi_clock(struct lg216x_state *state)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0014, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	val &amp;= 0xf3;</div><div class='add'>+	val |= (state-&gt;cfg-&gt;spi_clock &lt;&lt; 2);</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0014, val);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg2161_set_output_interface(struct lg216x_state *state)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0014, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~0x07;</div><div class='add'>+	val |= state-&gt;cfg-&gt;output_if; /* FIXME: needs sanity check */</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0014, val);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_enable_fic(struct lg216x_state *state, int onoff)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0017, 0x23);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_write_reg(state, 0x0016, 0xfc);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		ret = lg216x_write_reg(state, 0x0016,</div><div class='add'>+				       0xfc | ((onoff) ? 0x02 : 0x00));</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		ret = lg216x_write_reg(state, 0x0016, (onoff) ? 0x10 : 0x00);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_initialize(state);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	if (onoff) {</div><div class='add'>+		ret = lg216x_write_reg(state, 0x0017, 0x03);</div><div class='add'>+		lg_fail(ret);</div><div class='add'>+	}</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+static int lg216x_get_fic_version(struct lg216x_state *state, u8 *ficver)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*ficver = 0xff; /* invalid value */</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0128, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*ficver = (val &gt;&gt; 3) &amp; 0x1f;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+static int lg2160_get_parade_id(struct lg216x_state *state, u8 *id)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*id = 0xff; /* invalid value */</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0123, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*id = val &amp; 0x7f;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int lg216x_get_nog(struct lg216x_state *state, u8 *nog)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*nog = 0xff; /* invalid value */</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0124, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*nog = ((val &gt;&gt; 4) &amp; 0x07) + 1;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_get_tnog(struct lg216x_state *state, u8 *tnog)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*tnog = 0xff; /* invalid value */</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0125, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*tnog = val &amp; 0x1f;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_get_sgn(struct lg216x_state *state, u8 *sgn)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*sgn = 0xff; /* invalid value */</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0124, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*sgn = val &amp; 0x0f;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_get_prc(struct lg216x_state *state, u8 *prc)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*prc = 0xff; /* invalid value */</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0125, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*prc = ((val &gt;&gt; 5) &amp; 0x07) + 1;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+static int lg216x_get_rs_frame_mode(struct lg216x_state *state,</div><div class='add'>+				    enum atscmh_rs_frame_mode *rs_framemode)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		ret = lg216x_read_reg(state, 0x0410, &amp;val);</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		ret = lg216x_read_reg(state, 0x0513, &amp;val);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	switch ((val &gt;&gt; 4) &amp; 0x03) {</div><div class='add'>+#if 1</div><div class='add'>+	default:</div><div class='add'>+#endif</div><div class='add'>+	case 0x00:</div><div class='add'>+		*rs_framemode = ATSCMH_RSFRAME_PRI_ONLY;</div><div class='add'>+		break;</div><div class='add'>+	case 0x01:</div><div class='add'>+		*rs_framemode = ATSCMH_RSFRAME_PRI_SEC;</div><div class='add'>+		break;</div><div class='add'>+#if 0</div><div class='add'>+	default:</div><div class='add'>+		*rs_framemode = ATSCMH_RSFRAME_RES;</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static</div><div class='add'>+int lg216x_get_rs_frame_ensemble(struct lg216x_state *state,</div><div class='add'>+				 enum atscmh_rs_frame_ensemble *rs_frame_ens)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		ret = lg216x_read_reg(state, 0x0400, &amp;val);</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		ret = lg216x_read_reg(state, 0x0500, &amp;val);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	val &amp;= 0x01;</div><div class='add'>+	*rs_frame_ens = (enum atscmh_rs_frame_ensemble) val;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_get_rs_code_mode(struct lg216x_state *state,</div><div class='add'>+				   enum atscmh_rs_code_mode *rs_code_pri,</div><div class='add'>+				   enum atscmh_rs_code_mode *rs_code_sec)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		ret = lg216x_read_reg(state, 0x0410, &amp;val);</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		ret = lg216x_read_reg(state, 0x0513, &amp;val);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*rs_code_pri = (enum atscmh_rs_code_mode) ((val &gt;&gt; 2) &amp; 0x03);</div><div class='add'>+	*rs_code_sec = (enum atscmh_rs_code_mode) (val &amp; 0x03);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_get_sccc_block_mode(struct lg216x_state *state,</div><div class='add'>+				      enum atscmh_sccc_block_mode *sccc_block)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		ret = lg216x_read_reg(state, 0x0315, &amp;val);</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		ret = lg216x_read_reg(state, 0x0511, &amp;val);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	switch (val &amp; 0x03) {</div><div class='add'>+	case 0x00:</div><div class='add'>+		*sccc_block = ATSCMH_SCCC_BLK_SEP;</div><div class='add'>+		break;</div><div class='add'>+	case 0x01:</div><div class='add'>+		*sccc_block = ATSCMH_SCCC_BLK_COMB;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*sccc_block = ATSCMH_SCCC_BLK_RES;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_get_sccc_code_mode(struct lg216x_state *state,</div><div class='add'>+				     enum atscmh_sccc_code_mode *mode_a,</div><div class='add'>+				     enum atscmh_sccc_code_mode *mode_b,</div><div class='add'>+				     enum atscmh_sccc_code_mode *mode_c,</div><div class='add'>+				     enum atscmh_sccc_code_mode *mode_d)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		ret = lg216x_read_reg(state, 0x0316, &amp;val);</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		ret = lg216x_read_reg(state, 0x0512, &amp;val);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	switch ((val &gt;&gt; 6) &amp; 0x03) {</div><div class='add'>+	case 0x00:</div><div class='add'>+		*mode_a = ATSCMH_SCCC_CODE_HLF;</div><div class='add'>+		break;</div><div class='add'>+	case 0x01:</div><div class='add'>+		*mode_a = ATSCMH_SCCC_CODE_QTR;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*mode_a = ATSCMH_SCCC_CODE_RES;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((val &gt;&gt; 4) &amp; 0x03) {</div><div class='add'>+	case 0x00:</div><div class='add'>+		*mode_b = ATSCMH_SCCC_CODE_HLF;</div><div class='add'>+		break;</div><div class='add'>+	case 0x01:</div><div class='add'>+		*mode_b = ATSCMH_SCCC_CODE_QTR;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*mode_b = ATSCMH_SCCC_CODE_RES;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((val &gt;&gt; 2) &amp; 0x03) {</div><div class='add'>+	case 0x00:</div><div class='add'>+		*mode_c = ATSCMH_SCCC_CODE_HLF;</div><div class='add'>+		break;</div><div class='add'>+	case 0x01:</div><div class='add'>+		*mode_c = ATSCMH_SCCC_CODE_QTR;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*mode_c = ATSCMH_SCCC_CODE_RES;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (val &amp; 0x03) {</div><div class='add'>+	case 0x00:</div><div class='add'>+		*mode_d = ATSCMH_SCCC_CODE_HLF;</div><div class='add'>+		break;</div><div class='add'>+	case 0x01:</div><div class='add'>+		*mode_d = ATSCMH_SCCC_CODE_QTR;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*mode_d = ATSCMH_SCCC_CODE_RES;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+static int lg216x_read_fic_err_count(struct lg216x_state *state, u8 *err)</div><div class='add'>+{</div><div class='add'>+	u8 fic_err;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*err = 0;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		ret = lg216x_read_reg(state, 0x0012, &amp;fic_err);</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		ret = lg216x_read_reg(state, 0x001e, &amp;fic_err);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*err = fic_err;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg2160_read_crc_err_count(struct lg216x_state *state, u16 *err)</div><div class='add'>+{</div><div class='add'>+	u8 crc_err1, crc_err2;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*err = 0;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0411, &amp;crc_err1);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0412, &amp;crc_err2);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*err = (u16)(((crc_err2 &amp; 0x0f) &lt;&lt; 8) | crc_err1);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg2161_read_crc_err_count(struct lg216x_state *state, u16 *err)</div><div class='add'>+{</div><div class='add'>+	u8 crc_err;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*err = 0;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0612, &amp;crc_err);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*err = (u16)crc_err;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_read_crc_err_count(struct lg216x_state *state, u16 *err)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		ret = lg2160_read_crc_err_count(state, err);</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		ret = lg2161_read_crc_err_count(state, err);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg2160_read_rs_err_count(struct lg216x_state *state, u16 *err)</div><div class='add'>+{</div><div class='add'>+	u8 rs_err1, rs_err2;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*err = 0;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0413, &amp;rs_err1);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0414, &amp;rs_err2);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*err = (u16)(((rs_err2 &amp; 0x0f) &lt;&lt; 8) | rs_err1);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg2161_read_rs_err_count(struct lg216x_state *state, u16 *err)</div><div class='add'>+{</div><div class='add'>+	u8 rs_err1, rs_err2;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*err = 0;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0613, &amp;rs_err1);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0614, &amp;rs_err2);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*err = (u16)((rs_err1 &lt;&lt; 8) | rs_err2);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_read_rs_err_count(struct lg216x_state *state, u16 *err)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		ret = lg2160_read_rs_err_count(state, err);</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		ret = lg2161_read_rs_err_count(state, err);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+static int lg216x_get_frontend(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct lg216x_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lg_dbg("\n");</div><div class='add'>+</div><div class='add'>+	fe-&gt;dtv_property_cache.modulation = VSB_8;</div><div class='add'>+	fe-&gt;dtv_property_cache.frequency = state-&gt;current_frequency;</div><div class='add'>+	fe-&gt;dtv_property_cache.delivery_system = SYS_ATSCMH;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_get_fic_version(state,</div><div class='add'>+				     &amp;fe-&gt;dtv_property_cache.atscmh_fic_ver);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	if (state-&gt;fic_ver != fe-&gt;dtv_property_cache.atscmh_fic_ver) {</div><div class='add'>+		state-&gt;fic_ver = fe-&gt;dtv_property_cache.atscmh_fic_ver;</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+		ret = lg2160_get_parade_id(state,</div><div class='add'>+				&amp;fe-&gt;dtv_property_cache.atscmh_parade_id);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+/* #else */</div><div class='add'>+		fe-&gt;dtv_property_cache.atscmh_parade_id = state-&gt;parade_id;</div><div class='add'>+#endif</div><div class='add'>+		ret = lg216x_get_nog(state,</div><div class='add'>+				     &amp;fe-&gt;dtv_property_cache.atscmh_nog);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+		ret = lg216x_get_tnog(state,</div><div class='add'>+				      &amp;fe-&gt;dtv_property_cache.atscmh_tnog);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+		ret = lg216x_get_sgn(state,</div><div class='add'>+				     &amp;fe-&gt;dtv_property_cache.atscmh_sgn);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+		ret = lg216x_get_prc(state,</div><div class='add'>+				     &amp;fe-&gt;dtv_property_cache.atscmh_prc);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+</div><div class='add'>+		ret = lg216x_get_rs_frame_mode(state,</div><div class='add'>+			(enum atscmh_rs_frame_mode *)</div><div class='add'>+			&amp;fe-&gt;dtv_property_cache.atscmh_rs_frame_mode);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+		ret = lg216x_get_rs_frame_ensemble(state,</div><div class='add'>+			(enum atscmh_rs_frame_ensemble *)</div><div class='add'>+			&amp;fe-&gt;dtv_property_cache.atscmh_rs_frame_ensemble);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+		ret = lg216x_get_rs_code_mode(state,</div><div class='add'>+			(enum atscmh_rs_code_mode *)</div><div class='add'>+			&amp;fe-&gt;dtv_property_cache.atscmh_rs_code_mode_pri,</div><div class='add'>+			(enum atscmh_rs_code_mode *)</div><div class='add'>+			&amp;fe-&gt;dtv_property_cache.atscmh_rs_code_mode_sec);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+		ret = lg216x_get_sccc_block_mode(state,</div><div class='add'>+			(enum atscmh_sccc_block_mode *)</div><div class='add'>+			&amp;fe-&gt;dtv_property_cache.atscmh_sccc_block_mode);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+		ret = lg216x_get_sccc_code_mode(state,</div><div class='add'>+			(enum atscmh_sccc_code_mode *)</div><div class='add'>+			&amp;fe-&gt;dtv_property_cache.atscmh_sccc_code_mode_a,</div><div class='add'>+			(enum atscmh_sccc_code_mode *)</div><div class='add'>+			&amp;fe-&gt;dtv_property_cache.atscmh_sccc_code_mode_b,</div><div class='add'>+			(enum atscmh_sccc_code_mode *)</div><div class='add'>+			&amp;fe-&gt;dtv_property_cache.atscmh_sccc_code_mode_c,</div><div class='add'>+			(enum atscmh_sccc_code_mode *)</div><div class='add'>+			&amp;fe-&gt;dtv_property_cache.atscmh_sccc_code_mode_d);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+	}</div><div class='add'>+#if 0</div><div class='add'>+	ret = lg216x_read_fic_err_count(state,</div><div class='add'>+				(u8 *)&amp;fe-&gt;dtv_property_cache.atscmh_fic_err);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = lg216x_read_crc_err_count(state,</div><div class='add'>+				&amp;fe-&gt;dtv_property_cache.atscmh_crc_err);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = lg216x_read_rs_err_count(state,</div><div class='add'>+				&amp;fe-&gt;dtv_property_cache.atscmh_rs_err);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		if (((fe-&gt;dtv_property_cache.atscmh_rs_err &gt;= 240) &amp;&amp;</div><div class='add'>+		     (fe-&gt;dtv_property_cache.atscmh_crc_err &gt;= 240)) &amp;&amp;</div><div class='add'>+		    ((jiffies_to_msecs(jiffies) - state-&gt;last_reset) &gt; 6000))</div><div class='add'>+			ret = lg216x_soft_reset(state);</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		/* no fix needed here (as far as we know) */</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+#endif</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_get_property(struct dvb_frontend *fe,</div><div class='add'>+			       struct dtv_property *tvp)</div><div class='add'>+{</div><div class='add'>+	return (DTV_ATSCMH_FIC_VER == tvp-&gt;cmd) ?</div><div class='add'>+		lg216x_get_frontend(fe) : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int lg2160_set_frontend(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct lg216x_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lg_dbg("(%d)\n", fe-&gt;dtv_property_cache.frequency);</div><div class='add'>+</div><div class='add'>+	if (fe-&gt;ops.tuner_ops.set_params) {</div><div class='add'>+		ret = fe-&gt;ops.tuner_ops.set_params(fe);</div><div class='add'>+		if (fe-&gt;ops.i2c_gate_ctrl)</div><div class='add'>+			fe-&gt;ops.i2c_gate_ctrl(fe, 0);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+		state-&gt;current_frequency = fe-&gt;dtv_property_cache.frequency;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = lg2160_agc_fix(state, 0, 0);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = lg2160_agc_polarity(state, 0, 0);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = lg2160_tuner_pwr_save_polarity(state, 1);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = lg216x_set_if(state);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	ret = lg2160_spectrum_polarity(state, state-&gt;cfg-&gt;spectral_inversion);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	/* be tuned before this point */</div><div class='add'>+	ret = lg216x_soft_reset(state);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = lg2160_tuner_pwr_save(state, 0);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		ret = lg2160_set_spi_clock(state);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		ret = lg2161_set_output_interface(state);</div><div class='add'>+		if (lg_fail(ret))</div><div class='add'>+			goto fail;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = lg216x_set_parade(state, fe-&gt;dtv_property_cache.atscmh_parade_id);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_set_ensemble(state,</div><div class='add'>+			fe-&gt;dtv_property_cache.atscmh_rs_frame_ensemble);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_initialize(state);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_enable_fic(state, 1);</div><div class='add'>+	lg_fail(ret);</div><div class='add'>+</div><div class='add'>+	lg216x_get_frontend(fe);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+static int lg2160_read_lock_status(struct lg216x_state *state,</div><div class='add'>+				   int *acq_lock, int *sync_lock)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*acq_lock = 0;</div><div class='add'>+	*sync_lock = 0;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x011b, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*sync_lock = (val &amp; 0x20) ? 0 : 1;</div><div class='add'>+	*acq_lock  = (val &amp; 0x40) ? 0 : 1;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef USE_LG2161_LOCK_BITS</div><div class='add'>+static int lg2161_read_lock_status(struct lg216x_state *state,</div><div class='add'>+				   int *acq_lock, int *sync_lock)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*acq_lock = 0;</div><div class='add'>+	*sync_lock = 0;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0304, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*sync_lock = (val &amp; 0x80) ? 0 : 1;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x011b, &amp;val);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*acq_lock  = (val &amp; 0x40) ? 0 : 1;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int lg216x_read_lock_status(struct lg216x_state *state,</div><div class='add'>+				   int *acq_lock, int *sync_lock)</div><div class='add'>+{</div><div class='add'>+#ifdef USE_LG2161_LOCK_BITS</div><div class='add'>+	int ret;</div><div class='add'>+	switch (state-&gt;cfg-&gt;lg_chip) {</div><div class='add'>+	case LG2160:</div><div class='add'>+		ret = lg2160_read_lock_status(state, acq_lock, sync_lock);</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		ret = lg2161_read_lock_status(state, acq_lock, sync_lock);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+#else</div><div class='add'>+	return lg2160_read_lock_status(state, acq_lock, sync_lock);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_read_status(struct dvb_frontend *fe, fe_status_t *status)</div><div class='add'>+{</div><div class='add'>+	struct lg216x_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret, acq_lock, sync_lock;</div><div class='add'>+</div><div class='add'>+	*status = 0;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_lock_status(state, &amp;acq_lock, &amp;sync_lock);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	lg_dbg("%s%s\n",</div><div class='add'>+	       acq_lock  ? "SIGNALEXIST " : "",</div><div class='add'>+	       sync_lock ? "SYNCLOCK"     : "");</div><div class='add'>+</div><div class='add'>+	if (acq_lock)</div><div class='add'>+		*status |= FE_HAS_SIGNAL;</div><div class='add'>+	if (sync_lock)</div><div class='add'>+		*status |= FE_HAS_SYNC;</div><div class='add'>+</div><div class='add'>+	if (*status)</div><div class='add'>+		*status |= FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_LOCK;</div><div class='add'>+</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+static int lg2160_read_snr(struct dvb_frontend *fe, u16 *snr)</div><div class='add'>+{</div><div class='add'>+	struct lg216x_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	u8 snr1, snr2;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*snr = 0;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0202, &amp;snr1);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0203, &amp;snr2);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	if ((snr1 == 0xba) || (snr2 == 0xdf))</div><div class='add'>+		*snr = 0;</div><div class='add'>+	else</div><div class='add'>+#if 1</div><div class='add'>+	*snr =  ((snr1 &gt;&gt; 4) * 100) + ((snr1 &amp; 0x0f) * 10) + (snr2 &gt;&gt; 4);</div><div class='add'>+#else /* BCD */</div><div class='add'>+	*snr =  (snr2 | (snr1 &lt;&lt; 8));</div><div class='add'>+#endif</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg2161_read_snr(struct dvb_frontend *fe, u16 *snr)</div><div class='add'>+{</div><div class='add'>+	struct lg216x_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	u8 snr1, snr2;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*snr = 0;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0302, &amp;snr1);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_reg(state, 0x0303, &amp;snr2);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	if ((snr1 == 0xba) || (snr2 == 0xfd))</div><div class='add'>+		*snr = 0;</div><div class='add'>+	else</div><div class='add'>+</div><div class='add'>+	*snr =  ((snr1 &gt;&gt; 4) * 100) + ((snr1 &amp; 0x0f) * 10) + (snr2 &amp; 0x0f);</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_read_signal_strength(struct dvb_frontend *fe,</div><div class='add'>+				       u16 *strength)</div><div class='add'>+{</div><div class='add'>+#if 0</div><div class='add'>+	/* borrowed from lgdt330x.c</div><div class='add'>+	 *</div><div class='add'>+	 * Calculate strength from SNR up to 35dB</div><div class='add'>+	 * Even though the SNR can go higher than 35dB,</div><div class='add'>+	 * there is some comfort factor in having a range of</div><div class='add'>+	 * strong signals that can show at 100%</div><div class='add'>+	 */</div><div class='add'>+	struct lg216x_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	u16 snr;</div><div class='add'>+	int ret;</div><div class='add'>+#endif</div><div class='add'>+	*strength = 0;</div><div class='add'>+#if 0</div><div class='add'>+	ret = fe-&gt;ops.read_snr(fe, &amp;snr);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+	/* Rather than use the 8.8 value snr, use state-&gt;snr which is 8.24 */</div><div class='add'>+	/* scale the range 0 - 35*2^24 into 0 - 65535 */</div><div class='add'>+	if (state-&gt;snr &gt;= 8960 * 0x10000)</div><div class='add'>+		*strength = 0xffff;</div><div class='add'>+	else</div><div class='add'>+		*strength = state-&gt;snr / 8960;</div><div class='add'>+fail:</div><div class='add'>+	return ret;</div><div class='add'>+#else</div><div class='add'>+	return 0;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+static int lg216x_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)</div><div class='add'>+{</div><div class='add'>+#if 0</div><div class='add'>+	struct lg216x_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lg216x_read_rs_err_count(state,</div><div class='add'>+				       &amp;fe-&gt;dtv_property_cache.atscmh_rs_err);</div><div class='add'>+	if (lg_fail(ret))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	*ucblocks = fe-&gt;dtv_property_cache.atscmh_rs_err;</div><div class='add'>+fail:</div><div class='add'>+#else</div><div class='add'>+	*ucblocks = 0;</div><div class='add'>+#endif</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lg216x_get_tune_settings(struct dvb_frontend *fe,</div><div class='add'>+				    struct dvb_frontend_tune_settings</div><div class='add'>+				    *fe_tune_settings)</div><div class='add'>+{</div><div class='add'>+	fe_tune_settings-&gt;min_delay_ms = 500;</div><div class='add'>+	lg_dbg("\n");</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lg216x_release(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct lg216x_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	lg_dbg("\n");</div><div class='add'>+	kfree(state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct dvb_frontend_ops lg2160_ops = {</div><div class='add'>+	.delsys = { SYS_ATSCMH },</div><div class='add'>+	.info = {</div><div class='add'>+		.name = "LG Electronics LG2160 ATSC/MH Frontend",</div><div class='add'>+		.frequency_min      = 54000000,</div><div class='add'>+		.frequency_max      = 858000000,</div><div class='add'>+		.frequency_stepsize = 62500,</div><div class='add'>+	},</div><div class='add'>+	.i2c_gate_ctrl        = lg216x_i2c_gate_ctrl,</div><div class='add'>+#if 0</div><div class='add'>+	.init                 = lg216x_init,</div><div class='add'>+	.sleep                = lg216x_sleep,</div><div class='add'>+#endif</div><div class='add'>+	.get_property         = lg216x_get_property,</div><div class='add'>+</div><div class='add'>+	.set_frontend         = lg2160_set_frontend,</div><div class='add'>+	.get_frontend         = lg216x_get_frontend,</div><div class='add'>+	.get_tune_settings    = lg216x_get_tune_settings,</div><div class='add'>+	.read_status          = lg216x_read_status,</div><div class='add'>+#if 0</div><div class='add'>+	.read_ber             = lg216x_read_ber,</div><div class='add'>+#endif</div><div class='add'>+	.read_signal_strength = lg216x_read_signal_strength,</div><div class='add'>+	.read_snr             = lg2160_read_snr,</div><div class='add'>+	.read_ucblocks        = lg216x_read_ucblocks,</div><div class='add'>+	.release              = lg216x_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dvb_frontend_ops lg2161_ops = {</div><div class='add'>+	.delsys = { SYS_ATSCMH },</div><div class='add'>+	.info = {</div><div class='add'>+		.name = "LG Electronics LG2161 ATSC/MH Frontend",</div><div class='add'>+		.frequency_min      = 54000000,</div><div class='add'>+		.frequency_max      = 858000000,</div><div class='add'>+		.frequency_stepsize = 62500,</div><div class='add'>+	},</div><div class='add'>+	.i2c_gate_ctrl        = lg216x_i2c_gate_ctrl,</div><div class='add'>+#if 0</div><div class='add'>+	.init                 = lg216x_init,</div><div class='add'>+	.sleep                = lg216x_sleep,</div><div class='add'>+#endif</div><div class='add'>+	.get_property         = lg216x_get_property,</div><div class='add'>+</div><div class='add'>+	.set_frontend         = lg2160_set_frontend,</div><div class='add'>+	.get_frontend         = lg216x_get_frontend,</div><div class='add'>+	.get_tune_settings    = lg216x_get_tune_settings,</div><div class='add'>+	.read_status          = lg216x_read_status,</div><div class='add'>+#if 0</div><div class='add'>+	.read_ber             = lg216x_read_ber,</div><div class='add'>+#endif</div><div class='add'>+	.read_signal_strength = lg216x_read_signal_strength,</div><div class='add'>+	.read_snr             = lg2161_read_snr,</div><div class='add'>+	.read_ucblocks        = lg216x_read_ucblocks,</div><div class='add'>+	.release              = lg216x_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dvb_frontend *lg2160_attach(const struct lg2160_config *config,</div><div class='add'>+				   struct i2c_adapter *i2c_adap)</div><div class='add'>+{</div><div class='add'>+	struct lg216x_state *state = NULL;</div><div class='add'>+</div><div class='add'>+	lg_dbg("(%d-%04x)\n",</div><div class='add'>+	       i2c_adap ? i2c_adapter_id(i2c_adap) : 0,</div><div class='add'>+	       config ? config-&gt;i2c_addr : 0);</div><div class='add'>+</div><div class='add'>+	state = kzalloc(sizeof(struct lg216x_state), GFP_KERNEL);</div><div class='add'>+	if (state == NULL)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	state-&gt;cfg = config;</div><div class='add'>+	state-&gt;i2c_adap = i2c_adap;</div><div class='add'>+	state-&gt;fic_ver = 0xff;</div><div class='add'>+	state-&gt;parade_id = 0xff;</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;lg_chip) {</div><div class='add'>+	default:</div><div class='add'>+		lg_warn("invalid chip requested, defaulting to LG2160");</div><div class='add'>+		/* fall-thru */</div><div class='add'>+	case LG2160:</div><div class='add'>+		memcpy(&amp;state-&gt;frontend.ops, &amp;lg2160_ops,</div><div class='add'>+		       sizeof(struct dvb_frontend_ops));</div><div class='add'>+		break;</div><div class='add'>+	case LG2161:</div><div class='add'>+		memcpy(&amp;state-&gt;frontend.ops, &amp;lg2161_ops,</div><div class='add'>+		       sizeof(struct dvb_frontend_ops));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	state-&gt;frontend.demodulator_priv = state;</div><div class='add'>+	state-&gt;current_frequency = -1;</div><div class='add'>+	/* parade 1 by default */</div><div class='add'>+	state-&gt;frontend.dtv_property_cache.atscmh_parade_id = 1;</div><div class='add'>+</div><div class='add'>+	return &amp;state-&gt;frontend;</div><div class='add'>+fail:</div><div class='add'>+	lg_warn("unable to detect LG216x hardware\n");</div><div class='add'>+	kfree(state);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(lg2160_attach);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("LG Electronics LG216x ATSC/MH Demodulator Driver");</div><div class='add'>+MODULE_AUTHOR("Michael Krufky &lt;mkrufky@linuxtv.org&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_VERSION("0.3");</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Local variables:</div><div class='add'>+ * c-basic-offset: 8</div><div class='add'>+ * End:</div><div class='add'>+ */</div><div class='head'>diff --git a/drivers/media/dvb/frontends/lg2160.h b/drivers/media/dvb/frontends/lg2160.h<br/>new file mode 100644<br/>index 000000000000..9e2c0f41199a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/lg2160.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/lg2160.h</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+/*</div><div class='add'>+ *    Support for LG2160 - ATSC/MH</div><div class='add'>+ *</div><div class='add'>+ *    Copyright (C) 2010 Michael Krufky &lt;mkrufky@linuxtv.org&gt;</div><div class='add'>+ *</div><div class='add'>+ *    This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *    it under the terms of the GNU General Public License as published by</div><div class='add'>+ *    the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *    (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *    This program is distributed in the hope that it will be useful,</div><div class='add'>+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *    GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *    You should have received a copy of the GNU General Public License</div><div class='add'>+ *    along with this program; if not, write to the Free Software</div><div class='add'>+ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _LG2160_H_</div><div class='add'>+#define _LG2160_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include "dvb_frontend.h"</div><div class='add'>+</div><div class='add'>+enum lg_chip_type {</div><div class='add'>+	LG2160 = 0,</div><div class='add'>+	LG2161 = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define LG2161_1019 LG2161</div><div class='add'>+#define LG2161_1040 LG2161</div><div class='add'>+</div><div class='add'>+enum lg2160_spi_clock {</div><div class='add'>+	LG2160_SPI_3_125_MHZ = 0,</div><div class='add'>+	LG2160_SPI_6_25_MHZ = 1,</div><div class='add'>+	LG2160_SPI_12_5_MHZ = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+enum lg2161_oif {</div><div class='add'>+	LG2161_OIF_EBI2_SLA  = 1,</div><div class='add'>+	LG2161_OIF_SDIO_SLA  = 2,</div><div class='add'>+	LG2161_OIF_SPI_SLA   = 3,</div><div class='add'>+	LG2161_OIF_SPI_MAS   = 4,</div><div class='add'>+	LG2161_OIF_SERIAL_TS = 7,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+struct lg2160_config {</div><div class='add'>+	u8 i2c_addr;</div><div class='add'>+</div><div class='add'>+	/* user defined IF frequency in KHz */</div><div class='add'>+	u16 if_khz;</div><div class='add'>+</div><div class='add'>+	/* disable i2c repeater - 0:repeater enabled 1:repeater disabled */</div><div class='add'>+	int deny_i2c_rptr:1;</div><div class='add'>+</div><div class='add'>+	/* spectral inversion - 0:disabled 1:enabled */</div><div class='add'>+	int spectral_inversion:1;</div><div class='add'>+</div><div class='add'>+	unsigned int output_if;</div><div class='add'>+	enum lg2160_spi_clock spi_clock;</div><div class='add'>+	enum lg_chip_type lg_chip;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_DVB_LG2160) || (defined(CONFIG_DVB_LG2160_MODULE) &amp;&amp; \</div><div class='add'>+				     defined(MODULE))</div><div class='add'>+extern</div><div class='add'>+struct dvb_frontend *lg2160_attach(const struct lg2160_config *config,</div><div class='add'>+				     struct i2c_adapter *i2c_adap);</div><div class='add'>+#else</div><div class='add'>+static inline</div><div class='add'>+struct dvb_frontend *lg2160_attach(const struct lg2160_config *config,</div><div class='add'>+				     struct i2c_adapter *i2c_adap)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_DVB_LG2160 */</div><div class='add'>+</div><div class='add'>+#endif /* _LG2160_H_ */</div><div class='head'>diff --git a/drivers/media/dvb/frontends/lgs8gxx.c b/drivers/media/dvb/frontends/lgs8gxx.c<br/>index 4de1d3520cd2..568363a10a31 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/lgs8gxx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/lgs8gxx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/lgs8gxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/lgs8gxx.c</a></div><div class='hunk'>@@ -262,7 +262,6 @@ static int lgs8gxx_set_mode_auto(struct lgs8gxx_state *priv)</div><div class='ctx'> </div><div class='ctx'> static int lgs8gxx_set_mode_manual(struct lgs8gxx_state *priv)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='ctx'> 	u8 t;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;config-&gt;prod == LGS8GXX_PROD_LGS8G75) {</div><div class='hunk'>@@ -296,7 +295,7 @@ static int lgs8gxx_set_mode_manual(struct lgs8gxx_state *priv)</div><div class='ctx'> 	if (priv-&gt;config-&gt;prod == LGS8GXX_PROD_LGS8913)</div><div class='ctx'> 		lgs8gxx_write_reg(priv, 0xC1, 0);</div><div class='ctx'> </div><div class='del'>-	ret = lgs8gxx_read_reg(priv, 0xC5, &amp;t);</div><div class='add'>+	lgs8gxx_read_reg(priv, 0xC5, &amp;t);</div><div class='ctx'> 	t = (t &amp; 0xE0) | 0x06;</div><div class='ctx'> 	lgs8gxx_write_reg(priv, 0xC5, t);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/dvb/frontends/m88rs2000.c b/drivers/media/dvb/frontends/m88rs2000.c<br/>index 045ee5a6f7ae..312588e84dae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/m88rs2000.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/m88rs2000.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/m88rs2000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/m88rs2000.c</a></div><div class='hunk'>@@ -416,9 +416,25 @@ static int m88rs2000_tab_set(struct m88rs2000_state *state,</div><div class='ctx'> </div><div class='ctx'> static int m88rs2000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t volt)</div><div class='ctx'> {</div><div class='del'>-	deb_info("%s: %s\n", __func__,</div><div class='del'>-		volt == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" :</div><div class='del'>-		volt == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??");</div><div class='add'>+	struct m88rs2000_state *state = fe-&gt;demodulator_priv;</div><div class='add'>+	u8 data;</div><div class='add'>+</div><div class='add'>+	data = m88rs2000_demod_read(state, 0xb2);</div><div class='add'>+	data |= 0x03; /* bit0 V/H, bit1 off/on */</div><div class='add'>+</div><div class='add'>+	switch (volt) {</div><div class='add'>+	case SEC_VOLTAGE_18:</div><div class='add'>+		data &amp;= ~0x03;</div><div class='add'>+		break;</div><div class='add'>+	case SEC_VOLTAGE_13:</div><div class='add'>+		data &amp;= ~0x03;</div><div class='add'>+		data |= 0x01;</div><div class='add'>+		break;</div><div class='add'>+	case SEC_VOLTAGE_OFF:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	m88rs2000_demod_write(state, 0xb2, data);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -654,7 +670,6 @@ static int m88rs2000_set_tuner(struct dvb_frontend *fe, u16 *offset)</div><div class='ctx'> static int m88rs2000_set_fec(struct m88rs2000_state *state,</div><div class='ctx'> 		fe_code_rate_t fec)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='ctx'> 	u16 fec_set;</div><div class='ctx'> 	switch (fec) {</div><div class='ctx'> 	/* This is not confirmed kept for reference */</div><div class='hunk'>@@ -677,7 +692,7 @@ static int m88rs2000_set_fec(struct m88rs2000_state *state,</div><div class='ctx'> 	default:</div><div class='ctx'> 		fec_set = 0x08;</div><div class='ctx'> 	}</div><div class='del'>-	ret = m88rs2000_demod_write(state, 0x76, fec_set);</div><div class='add'>+	m88rs2000_demod_write(state, 0x76, fec_set);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -772,13 +787,13 @@ static int m88rs2000_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 25; i++) {</div><div class='del'>-		u8 reg = m88rs2000_demod_read(state, 0x8c);</div><div class='add'>+		reg = m88rs2000_demod_read(state, 0x8c);</div><div class='ctx'> 		if ((reg &amp; 0x7) == 0x7) {</div><div class='ctx'> 			status = FE_HAS_LOCK;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		state-&gt;no_lock_count++;</div><div class='del'>-		if (state-&gt;no_lock_count &gt; 15) {</div><div class='add'>+		if (state-&gt;no_lock_count == 15) {</div><div class='ctx'> 			reg = m88rs2000_demod_read(state, 0x70);</div><div class='ctx'> 			reg ^= 0x4;</div><div class='ctx'> 			m88rs2000_demod_write(state, 0x70, reg);</div><div class='head'>diff --git a/drivers/media/dvb/frontends/rtl2830.c b/drivers/media/dvb/frontends/rtl2830.c<br/>index 45196c5b0736..93612ebac519 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/rtl2830.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/rtl2830.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/rtl2830.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/rtl2830.c</a></div><div class='hunk'>@@ -374,6 +374,118 @@ err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rtl2830_get_frontend(struct dvb_frontend *fe)</div><div class='add'>+{</div><div class='add'>+	struct rtl2830_priv *priv = fe-&gt;demodulator_priv;</div><div class='add'>+	struct dtv_frontend_properties *c = &amp;fe-&gt;dtv_property_cache;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 buf[3];</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;sleeping)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = rtl2830_rd_regs(priv, 0x33c, buf, 2);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = rtl2830_rd_reg(priv, 0x351, &amp;buf[2]);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	dbg("%s: TPS=%02x %02x %02x", __func__, buf[0], buf[1], buf[2]);</div><div class='add'>+</div><div class='add'>+	switch ((buf[0] &gt;&gt; 2) &amp; 3) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;modulation = QPSK;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;modulation = QAM_16;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		c-&gt;modulation = QAM_64;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((buf[2] &gt;&gt; 2) &amp; 1) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;transmission_mode = TRANSMISSION_MODE_2K;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;transmission_mode = TRANSMISSION_MODE_8K;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((buf[2] &gt;&gt; 0) &amp; 3) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;guard_interval = GUARD_INTERVAL_1_32;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;guard_interval = GUARD_INTERVAL_1_16;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		c-&gt;guard_interval = GUARD_INTERVAL_1_8;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		c-&gt;guard_interval = GUARD_INTERVAL_1_4;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((buf[0] &gt;&gt; 4) &amp; 7) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;hierarchy = HIERARCHY_NONE;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;hierarchy = HIERARCHY_1;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		c-&gt;hierarchy = HIERARCHY_2;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		c-&gt;hierarchy = HIERARCHY_4;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((buf[1] &gt;&gt; 3) &amp; 7) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;code_rate_HP = FEC_1_2;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;code_rate_HP = FEC_2_3;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		c-&gt;code_rate_HP = FEC_3_4;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		c-&gt;code_rate_HP = FEC_5_6;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		c-&gt;code_rate_HP = FEC_7_8;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((buf[1] &gt;&gt; 0) &amp; 7) {</div><div class='add'>+	case 0:</div><div class='add'>+		c-&gt;code_rate_LP = FEC_1_2;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		c-&gt;code_rate_LP = FEC_2_3;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		c-&gt;code_rate_LP = FEC_3_4;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		c-&gt;code_rate_LP = FEC_5_6;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		c-&gt;code_rate_LP = FEC_7_8;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	dbg("%s: failed=%d", __func__, ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rtl2830_read_status(struct dvb_frontend *fe, fe_status_t *status)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl2830_priv *priv = fe-&gt;demodulator_priv;</div><div class='hunk'>@@ -404,14 +516,72 @@ err:</div><div class='ctx'> </div><div class='ctx'> static int rtl2830_read_snr(struct dvb_frontend *fe, u16 *snr)</div><div class='ctx'> {</div><div class='del'>-	*snr = 0;</div><div class='add'>+	struct rtl2830_priv *priv = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret, hierarchy, constellation;</div><div class='add'>+	u8 buf[2], tmp;</div><div class='add'>+	u16 tmp16;</div><div class='add'>+#define CONSTELLATION_NUM 3</div><div class='add'>+#define HIERARCHY_NUM 4</div><div class='add'>+	static const u32 snr_constant[CONSTELLATION_NUM][HIERARCHY_NUM] = {</div><div class='add'>+		{ 70705899, 70705899, 70705899, 70705899 },</div><div class='add'>+		{ 82433173, 82433173, 87483115, 94445660 },</div><div class='add'>+		{ 92888734, 92888734, 95487525, 99770748 },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;sleeping)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* reports SNR in resolution of 0.1 dB */</div><div class='add'>+</div><div class='add'>+	ret = rtl2830_rd_reg(priv, 0x33c, &amp;tmp);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	constellation = (tmp &gt;&gt; 2) &amp; 0x03; /* [3:2] */</div><div class='add'>+	if (constellation &gt; CONSTELLATION_NUM - 1)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	hierarchy = (tmp &gt;&gt; 4) &amp; 0x07; /* [6:4] */</div><div class='add'>+	if (hierarchy &gt; HIERARCHY_NUM - 1)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = rtl2830_rd_regs(priv, 0x40c, buf, 2);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	tmp16 = buf[0] &lt;&lt; 8 | buf[1];</div><div class='add'>+</div><div class='add'>+	if (tmp16)</div><div class='add'>+		*snr = (snr_constant[constellation][hierarchy] -</div><div class='add'>+				intlog10(tmp16)) / ((1 &lt;&lt; 24) / 100);</div><div class='add'>+	else</div><div class='add'>+		*snr = 0;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='add'>+err:</div><div class='add'>+	dbg("%s: failed=%d", __func__, ret);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rtl2830_read_ber(struct dvb_frontend *fe, u32 *ber)</div><div class='ctx'> {</div><div class='del'>-	*ber = 0;</div><div class='add'>+	struct rtl2830_priv *priv = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 buf[2];</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;sleeping)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = rtl2830_rd_regs(priv, 0x34e, buf, 2);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	*ber = buf[0] &lt;&lt; 8 | buf[1];</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='add'>+err:</div><div class='add'>+	dbg("%s: failed=%d", __func__, ret);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rtl2830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)</div><div class='hunk'>@@ -422,8 +592,32 @@ static int rtl2830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)</div><div class='ctx'> </div><div class='ctx'> static int rtl2830_read_signal_strength(struct dvb_frontend *fe, u16 *strength)</div><div class='ctx'> {</div><div class='del'>-	*strength = 0;</div><div class='add'>+	struct rtl2830_priv *priv = fe-&gt;demodulator_priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 buf[2];</div><div class='add'>+	u16 if_agc_raw, if_agc;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;sleeping)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = rtl2830_rd_regs(priv, 0x359, buf, 2);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if_agc_raw = (buf[0] &lt;&lt; 8 | buf[1]) &amp; 0x3fff;</div><div class='add'>+</div><div class='add'>+	if (if_agc_raw &amp; (1 &lt;&lt; 9))</div><div class='add'>+		if_agc = -(~(if_agc_raw - 1) &amp; 0x1ff);</div><div class='add'>+	else</div><div class='add'>+		if_agc = if_agc_raw;</div><div class='add'>+</div><div class='add'>+	*strength = (u8) (55 - if_agc / 182);</div><div class='add'>+	*strength |= *strength &lt;&lt; 8;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='add'>+err:</div><div class='add'>+	dbg("%s: failed=%d", __func__, ret);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct dvb_frontend_ops rtl2830_ops;</div><div class='hunk'>@@ -549,6 +743,7 @@ static struct dvb_frontend_ops rtl2830_ops = {</div><div class='ctx'> 	.get_tune_settings = rtl2830_get_tune_settings,</div><div class='ctx'> </div><div class='ctx'> 	.set_frontend = rtl2830_set_frontend,</div><div class='add'>+	.get_frontend = rtl2830_get_frontend,</div><div class='ctx'> </div><div class='ctx'> 	.read_status = rtl2830_read_status,</div><div class='ctx'> 	.read_snr = rtl2830_read_snr,</div><div class='head'>diff --git a/drivers/media/dvb/frontends/rtl2830_priv.h b/drivers/media/dvb/frontends/rtl2830_priv.h<br/>index 4a464761b5b8..9b20557ccf6c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/rtl2830_priv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/rtl2830_priv.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/rtl2830_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/rtl2830_priv.h</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #define RTL2830_PRIV_H</div><div class='ctx'> </div><div class='ctx'> #include "dvb_frontend.h"</div><div class='add'>+#include "dvb_math.h"</div><div class='ctx'> #include "rtl2830.h"</div><div class='ctx'> </div><div class='ctx'> #define LOG_PREFIX "rtl2830"</div><div class='head'>diff --git a/drivers/media/dvb/frontends/stb0899_drv.c b/drivers/media/dvb/frontends/stb0899_drv.c<br/>index dd08f4ac64a8..8b0dc74a3298 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/stb0899_drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/stb0899_drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/stb0899_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/stb0899_drv.c</a></div><div class='hunk'>@@ -637,11 +637,9 @@ static void stb0899_init_calc(struct stb0899_state *state)</div><div class='ctx'> 	struct stb0899_internal *internal = &amp;state-&gt;internal;</div><div class='ctx'> 	int master_clk;</div><div class='ctx'> 	u8 agc[2];</div><div class='del'>-	u8 agc1cn;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='ctx'> 	/* Read registers (in burst mode)	*/</div><div class='del'>-	agc1cn = stb0899_read_reg(state, STB0899_AGC1CN);</div><div class='ctx'> 	stb0899_read_regs(state, STB0899_AGC1REF, agc, 2); /* AGC1R and AGC2O	*/</div><div class='ctx'> </div><div class='ctx'> 	/* Initial calculations	*/</div><div class='hunk'>@@ -823,15 +821,12 @@ static int stb0899_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t</div><div class='ctx'> </div><div class='ctx'> static int stb0899_diseqc_init(struct stb0899_state *state)</div><div class='ctx'> {</div><div class='del'>-	struct dvb_diseqc_master_cmd tx_data;</div><div class='ctx'> /*</div><div class='ctx'> 	struct dvb_diseqc_slave_reply rx_data;</div><div class='ctx'> */</div><div class='del'>-	u8 f22_tx, f22_rx, reg;</div><div class='add'>+	u8 f22_tx, reg;</div><div class='ctx'> </div><div class='ctx'> 	u32 mclk, tx_freq = 22000;/* count = 0, i; */</div><div class='del'>-	tx_data.msg[0] = 0xe2;</div><div class='del'>-	tx_data.msg_len = 3;</div><div class='ctx'> 	reg = stb0899_read_reg(state, STB0899_DISCNTRL2);</div><div class='ctx'> 	STB0899_SETFIELD_VAL(ONECHIP_TRX, reg, 0);</div><div class='ctx'> 	stb0899_write_reg(state, STB0899_DISCNTRL2, reg);</div><div class='hunk'>@@ -849,7 +844,6 @@ static int stb0899_diseqc_init(struct stb0899_state *state)</div><div class='ctx'> 	f22_tx = mclk / (tx_freq * 32);</div><div class='ctx'> 	stb0899_write_reg(state, STB0899_DISF22, f22_tx); /* DiSEqC Tx freq	*/</div><div class='ctx'> 	state-&gt;rx_freq = 20000;</div><div class='del'>-	f22_rx = mclk / (state-&gt;rx_freq * 32);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/media/dvb/frontends/stb6100.c b/drivers/media/dvb/frontends/stb6100.c<br/>index def88abb30bf..2e93e65d2cdb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/stb6100.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/stb6100.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/stb6100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/stb6100.c</a></div><div class='hunk'>@@ -158,7 +158,6 @@ static int stb6100_read_regs(struct stb6100_state *state, u8 regs[])</div><div class='ctx'> static int stb6100_read_reg(struct stb6100_state *state, u8 reg)</div><div class='ctx'> {</div><div class='ctx'> 	u8 regs[STB6100_NUMREGS];</div><div class='del'>-	int rc;</div><div class='ctx'> </div><div class='ctx'> 	struct i2c_msg msg = {</div><div class='ctx'> 		.addr	= state-&gt;config-&gt;tuner_address + reg,</div><div class='hunk'>@@ -167,7 +166,7 @@ static int stb6100_read_reg(struct stb6100_state *state, u8 reg)</div><div class='ctx'> 		.len	= 1</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rc = i2c_transfer(state-&gt;i2c, &amp;msg, 1);</div><div class='add'>+	i2c_transfer(state-&gt;i2c, &amp;msg, 1);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(reg &gt;= STB6100_NUMREGS)) {</div><div class='ctx'> 		dprintk(verbose, FE_ERROR, 1, "Invalid register offset 0x%x", reg);</div><div class='head'>diff --git a/drivers/media/dvb/frontends/stv0297.c b/drivers/media/dvb/frontends/stv0297.c<br/>index 85c157a1fe5e..d40f226160ef 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/stv0297.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/stv0297.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/stv0297.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/stv0297.c</a></div><div class='hunk'>@@ -414,7 +414,6 @@ static int stv0297_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 	int delay;</div><div class='ctx'> 	int sweeprate;</div><div class='ctx'> 	int carrieroffset;</div><div class='del'>-	unsigned long starttime;</div><div class='ctx'> 	unsigned long timeout;</div><div class='ctx'> 	fe_spectral_inversion_t inversion;</div><div class='ctx'> </div><div class='hunk'>@@ -543,7 +542,6 @@ static int stv0297_set_frontend(struct dvb_frontend *fe)</div><div class='ctx'> 	stv0297_writereg_mask(state, 0x43, 0x10, 0x10);</div><div class='ctx'> </div><div class='ctx'> 	/* wait for WGAGC lock */</div><div class='del'>-	starttime = jiffies;</div><div class='ctx'> 	timeout = jiffies + msecs_to_jiffies(2000);</div><div class='ctx'> 	while (time_before(jiffies, timeout)) {</div><div class='ctx'> 		msleep(10);</div><div class='head'>diff --git a/drivers/media/dvb/frontends/stv0900_sw.c b/drivers/media/dvb/frontends/stv0900_sw.c<br/>index ba0709b2d433..4af20780fb9c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/stv0900_sw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/stv0900_sw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/stv0900_sw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/stv0900_sw.c</a></div><div class='hunk'>@@ -835,7 +835,6 @@ static void stv0900_track_optimization(struct dvb_frontend *fe)</div><div class='ctx'> 		blind_tun_sw = 0,</div><div class='ctx'> 		modulation;</div><div class='ctx'> </div><div class='del'>-	enum fe_stv0900_rolloff rolloff;</div><div class='ctx'> 	enum fe_stv0900_modcode foundModcod;</div><div class='ctx'> </div><div class='ctx'> 	dprintk("%s\n", __func__);</div><div class='hunk'>@@ -940,7 +939,6 @@ static void stv0900_track_optimization(struct dvb_frontend *fe)</div><div class='ctx'> </div><div class='ctx'> 	freq1 = stv0900_read_reg(intp, CFR2);</div><div class='ctx'> 	freq0 = stv0900_read_reg(intp, CFR1);</div><div class='del'>-	rolloff = stv0900_get_bits(intp, ROLLOFF_STATUS);</div><div class='ctx'> 	if (intp-&gt;srch_algo[demod] == STV0900_BLIND_SEARCH) {</div><div class='ctx'> 		stv0900_write_reg(intp, SFRSTEP, 0x00);</div><div class='ctx'> 		stv0900_write_bits(intp, SCAN_ENABLE, 0);</div><div class='head'>diff --git a/drivers/media/dvb/frontends/stv090x.c b/drivers/media/dvb/frontends/stv090x.c<br/>index 4aef1877ed42..d79e69f65cbb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/stv090x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/stv090x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/stv090x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/stv090x.c</a></div><div class='hunk'>@@ -2842,7 +2842,6 @@ static int stv090x_optimize_track(struct stv090x_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct dvb_frontend *fe = &amp;state-&gt;frontend;</div><div class='ctx'> </div><div class='del'>-	enum stv090x_rolloff rolloff;</div><div class='ctx'> 	enum stv090x_modcod modcod;</div><div class='ctx'> </div><div class='ctx'> 	s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;</div><div class='hunk'>@@ -2966,7 +2965,6 @@ static int stv090x_optimize_track(struct stv090x_state *state)</div><div class='ctx'> 	f_1 = STV090x_READ_DEMOD(state, CFR2);</div><div class='ctx'> 	f_0 = STV090x_READ_DEMOD(state, CFR1);</div><div class='ctx'> 	reg = STV090x_READ_DEMOD(state, TMGOBS);</div><div class='del'>-	rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);</div><div class='ctx'> </div><div class='ctx'> 	if (state-&gt;algo == STV090x_BLIND_SEARCH) {</div><div class='ctx'> 		STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);</div><div class='head'>diff --git a/drivers/media/dvb/frontends/zl10353.c b/drivers/media/dvb/frontends/zl10353.c<br/>index ac7237891374..82946cd517f5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/frontends/zl10353.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/frontends/zl10353.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/frontends/zl10353.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/frontends/zl10353.c</a></div><div class='hunk'>@@ -525,7 +525,7 @@ static int zl10353_read_snr(struct dvb_frontend *fe, u16 *snr)</div><div class='ctx'> 		zl10353_dump_regs(fe);</div><div class='ctx'> </div><div class='ctx'> 	_snr = zl10353_read_register(state, SNR);</div><div class='del'>-	*snr = (_snr &lt;&lt; 8) | _snr;</div><div class='add'>+	*snr = 10 * _snr / 8;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -559,7 +559,6 @@ static int zl10353_init(struct dvb_frontend *fe)</div><div class='ctx'> {</div><div class='ctx'> 	struct zl10353_state *state = fe-&gt;demodulator_priv;</div><div class='ctx'> 	u8 zl10353_reset_attach[6] = { 0x50, 0x03, 0x64, 0x46, 0x15, 0x0F };</div><div class='del'>-	int rc = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (debug_regs)</div><div class='ctx'> 		zl10353_dump_regs(fe);</div><div class='hunk'>@@ -573,7 +572,7 @@ static int zl10353_init(struct dvb_frontend *fe)</div><div class='ctx'> 	/* Do a "hard" reset if not already done */</div><div class='ctx'> 	if (zl10353_read_register(state, 0x50) != zl10353_reset_attach[1] ||</div><div class='ctx'> 	    zl10353_read_register(state, 0x51) != zl10353_reset_attach[2]) {</div><div class='del'>-		rc = zl10353_write(fe, zl10353_reset_attach,</div><div class='add'>+		zl10353_write(fe, zl10353_reset_attach,</div><div class='ctx'> 				   sizeof(zl10353_reset_attach));</div><div class='ctx'> 		if (debug_regs)</div><div class='ctx'> 			zl10353_dump_regs(fe);</div><div class='head'>diff --git a/drivers/media/dvb/mantis/hopper_cards.c b/drivers/media/dvb/mantis/hopper_cards.c<br/>index 71622f65c037..cc0251e01077 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/mantis/hopper_cards.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/mantis/hopper_cards.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/mantis/hopper_cards.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/mantis/hopper_cards.c</a></div><div class='hunk'>@@ -65,7 +65,7 @@ static int devs;</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t hopper_irq_handler(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='del'>-	u32 stat = 0, mask = 0, lstat = 0;</div><div class='add'>+	u32 stat = 0, mask = 0;</div><div class='ctx'> 	u32 rst_stat = 0, rst_mask = 0;</div><div class='ctx'> </div><div class='ctx'> 	struct mantis_pci *mantis;</div><div class='hunk'>@@ -80,7 +80,6 @@ static irqreturn_t hopper_irq_handler(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	stat = mmread(MANTIS_INT_STAT);</div><div class='ctx'> 	mask = mmread(MANTIS_INT_MASK);</div><div class='del'>-	lstat = stat &amp; ~MANTIS_INT_RISCSTAT;</div><div class='ctx'> 	if (!(stat &amp; mask))</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/dvb/mantis/mantis_cards.c b/drivers/media/dvb/mantis/mantis_cards.c<br/>index c2bb90b3e529..095cf3a994e2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/mantis/mantis_cards.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/mantis/mantis_cards.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/mantis/mantis_cards.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/mantis/mantis_cards.c</a></div><div class='hunk'>@@ -73,7 +73,7 @@ static char *label[10] = {</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t mantis_irq_handler(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='del'>-	u32 stat = 0, mask = 0, lstat = 0;</div><div class='add'>+	u32 stat = 0, mask = 0;</div><div class='ctx'> 	u32 rst_stat = 0, rst_mask = 0;</div><div class='ctx'> </div><div class='ctx'> 	struct mantis_pci *mantis;</div><div class='hunk'>@@ -88,7 +88,6 @@ static irqreturn_t mantis_irq_handler(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	stat = mmread(MANTIS_INT_STAT);</div><div class='ctx'> 	mask = mmread(MANTIS_INT_MASK);</div><div class='del'>-	lstat = stat &amp; ~MANTIS_INT_RISCSTAT;</div><div class='ctx'> 	if (!(stat &amp; mask))</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/dvb/mantis/mantis_dma.c b/drivers/media/dvb/mantis/mantis_dma.c<br/>index c61ca7d3daea..566c407175a4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/mantis/mantis_dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/mantis/mantis_dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/mantis/mantis_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/mantis/mantis_dma.c</a></div><div class='hunk'>@@ -199,10 +199,6 @@ void mantis_dma_start(struct mantis_pci *mantis)</div><div class='ctx'> </div><div class='ctx'> void mantis_dma_stop(struct mantis_pci *mantis)</div><div class='ctx'> {</div><div class='del'>-	u32 stat = 0, mask = 0;</div><div class='del'>-</div><div class='del'>-	stat = mmread(MANTIS_INT_STAT);</div><div class='del'>-	mask = mmread(MANTIS_INT_MASK);</div><div class='ctx'> 	dprintk(MANTIS_DEBUG, 1, "Mantis Stop DMA engine");</div><div class='ctx'> </div><div class='ctx'> 	mmwrite((mmread(MANTIS_GPIF_ADDR) &amp; (~(MANTIS_GPIF_HIFRDWRN))), MANTIS_GPIF_ADDR);</div><div class='head'>diff --git a/drivers/media/dvb/mantis/mantis_evm.c b/drivers/media/dvb/mantis/mantis_evm.c<br/>index 36f2256ebb0e..71ce52875c38 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/mantis/mantis_evm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/mantis/mantis_evm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/mantis/mantis_evm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/mantis/mantis_evm.c</a></div><div class='hunk'>@@ -41,10 +41,9 @@ static void mantis_hifevm_work(struct work_struct *work)</div><div class='ctx'> 	struct mantis_ca *ca = container_of(work, struct mantis_ca, hif_evm_work);</div><div class='ctx'> 	struct mantis_pci *mantis = ca-&gt;ca_priv;</div><div class='ctx'> </div><div class='del'>-	u32 gpif_stat, gpif_mask;</div><div class='add'>+	u32 gpif_stat;</div><div class='ctx'> </div><div class='ctx'> 	gpif_stat = mmread(MANTIS_GPIF_STATUS);</div><div class='del'>-	gpif_mask = mmread(MANTIS_GPIF_IRQCFG);</div><div class='ctx'> </div><div class='ctx'> 	if (gpif_stat &amp; MANTIS_GPIF_DETSTAT) {</div><div class='ctx'> 		if (gpif_stat &amp; MANTIS_CARD_PLUGIN) {</div><div class='head'>diff --git a/drivers/media/dvb/ngene/ngene-core.c b/drivers/media/dvb/ngene/ngene-core.c<br/>index f129a9303f80..39857384af10 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/ngene/ngene-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/ngene/ngene-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/ngene/ngene-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/ngene/ngene-core.c</a></div><div class='hunk'>@@ -1409,10 +1409,8 @@ static int ngene_start(struct ngene *dev)</div><div class='ctx'> 	if (stat &lt; 0)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='del'>-	if (!stat)</div><div class='del'>-		return stat;</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='del'>-	/* otherwise error: fall through */</div><div class='ctx'> fail:</div><div class='ctx'> 	ngwritel(0, NGENE_INT_ENABLE);</div><div class='ctx'> 	free_irq(dev-&gt;pci_dev-&gt;irq, dev);</div><div class='head'>diff --git a/drivers/media/dvb/pluto2/pluto2.c b/drivers/media/dvb/pluto2/pluto2.c<br/>index e1f20c236989..f148b19a206a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/pluto2/pluto2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/pluto2/pluto2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/pluto2/pluto2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/pluto2/pluto2.c</a></div><div class='hunk'>@@ -481,14 +481,6 @@ static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe)</div><div class='ctx'> 	if (p-&gt;bandwidth_hz == 8000000)</div><div class='ctx'> 		buf[3] |= 0x08;</div><div class='ctx'> </div><div class='del'>-	if (sizeof(buf) == 6) {</div><div class='del'>-		buf[4] = buf[2];</div><div class='del'>-		buf[4] &amp;= ~0x1c;</div><div class='del'>-		buf[4] |=  0x18;</div><div class='del'>-</div><div class='del'>-		buf[5] = (0 &lt;&lt; 7) | (2 &lt;&lt; 4);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	msg.addr = I2C_ADDR_TUA6034 &gt;&gt; 1;</div><div class='ctx'> 	msg.flags = 0;</div><div class='ctx'> 	msg.buf = buf;</div><div class='head'>diff --git a/drivers/media/dvb/siano/smssdio.c b/drivers/media/dvb/siano/smssdio.c<br/>index 91f8c8291e2b..d6f3f100699a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/siano/smssdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/siano/smssdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/siano/smssdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/siano/smssdio.c</a></div><div class='hunk'>@@ -114,7 +114,7 @@ out:</div><div class='ctx'> </div><div class='ctx'> static void smssdio_interrupt(struct sdio_func *func)</div><div class='ctx'> {</div><div class='del'>-	int ret, isr;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	struct smssdio_device *smsdev;</div><div class='ctx'> 	struct smscore_buffer_t *cb;</div><div class='hunk'>@@ -127,7 +127,7 @@ static void smssdio_interrupt(struct sdio_func *func)</div><div class='ctx'> 	 * The interrupt register has no defined meaning. It is just</div><div class='ctx'> 	 * a way of turning of the level triggered interrupt.</div><div class='ctx'> 	 */</div><div class='del'>-	isr = sdio_readb(func, SMSSDIO_INT, &amp;ret);</div><div class='add'>+	(void)sdio_readb(func, SMSSDIO_INT, &amp;ret);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		sms_err("Unable to read interrupt register!\n");</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/drivers/media/dvb/siano/smsusb.c b/drivers/media/dvb/siano/smsusb.c<br/>index b1fe5137df09..63c004a25e0b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/siano/smsusb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/siano/smsusb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/siano/smsusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/siano/smsusb.c</a></div><div class='hunk'>@@ -542,6 +542,8 @@ static const struct usb_device_id smsusb_id_table[] __devinitconst = {</div><div class='ctx'> 		.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },</div><div class='ctx'> 	{ USB_DEVICE(0x2040, 0xc090),</div><div class='ctx'> 		.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },</div><div class='add'>+	{ USB_DEVICE(0x2040, 0xc0a0),</div><div class='add'>+		.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },</div><div class='ctx'> 	{ } /* Terminating entry */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/dvb/ttpci/av7110_v4l.c b/drivers/media/dvb/ttpci/av7110_v4l.c<br/>index ee8ee1d481fa..1b2d15140a1d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/ttpci/av7110_v4l.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/ttpci/av7110_v4l.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/ttpci/av7110_v4l.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/ttpci/av7110_v4l.c</a></div><div class='hunk'>@@ -107,7 +107,7 @@ static struct v4l2_input inputs[4] = {</div><div class='ctx'> 		.index		= 1,</div><div class='ctx'> 		.name		= "Television",</div><div class='ctx'> 		.type		= V4L2_INPUT_TYPE_TUNER,</div><div class='del'>-		.audioset	= 2,</div><div class='add'>+		.audioset	= 1,</div><div class='ctx'> 		.tuner		= 0,</div><div class='ctx'> 		.std		= V4L2_STD_PAL_BG|V4L2_STD_NTSC_M,</div><div class='ctx'> 		.status		= 0,</div><div class='hunk'>@@ -494,7 +494,7 @@ static int vidioc_s_input(struct file *file, void *fh, unsigned int input)</div><div class='ctx'> 	dprintk(2, "VIDIOC_S_INPUT: %d\n", input);</div><div class='ctx'> </div><div class='ctx'> 	if (!av7110-&gt;analog_tuner_flags)</div><div class='del'>-		return 0;</div><div class='add'>+		return input ? -EINVAL : 0;</div><div class='ctx'> </div><div class='ctx'> 	if (input &gt;= 4)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -503,19 +503,38 @@ static int vidioc_s_input(struct file *file, void *fh, unsigned int input)</div><div class='ctx'> 	return av7110_dvb_c_switch(fh);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int vidioc_enumaudio(struct file *file, void *fh, struct v4l2_audio *a)</div><div class='add'>+{</div><div class='add'>+	dprintk(2, "VIDIOC_G_AUDIO: %d\n", a-&gt;index);</div><div class='add'>+	if (a-&gt;index != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	*a = msp3400_v4l2_audio;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int vidioc_g_audio(struct file *file, void *fh, struct v4l2_audio *a)</div><div class='ctx'> {</div><div class='add'>+	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='add'>+	struct av7110 *av7110 = (struct av7110 *)dev-&gt;ext_priv;</div><div class='add'>+</div><div class='ctx'> 	dprintk(2, "VIDIOC_G_AUDIO: %d\n", a-&gt;index);</div><div class='ctx'> 	if (a-&gt;index != 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	memcpy(a, &amp;msp3400_v4l2_audio, sizeof(struct v4l2_audio));</div><div class='add'>+	if (av7110-&gt;current_input &gt;= 2)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	*a = msp3400_v4l2_audio;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_s_audio(struct file *file, void *fh, struct v4l2_audio *a)</div><div class='ctx'> {</div><div class='add'>+	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='add'>+	struct av7110 *av7110 = (struct av7110 *)dev-&gt;ext_priv;</div><div class='add'>+</div><div class='ctx'> 	dprintk(2, "VIDIOC_S_AUDIO: %d\n", a-&gt;index);</div><div class='del'>-	return 0;</div><div class='add'>+	if (av7110-&gt;current_input &gt;= 2)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return a-&gt;index ? -EINVAL : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_g_sliced_vbi_cap(struct file *file, void *fh,</div><div class='hunk'>@@ -802,26 +821,39 @@ int av7110_init_v4l(struct av7110 *av7110)</div><div class='ctx'> 		ERR("cannot init capture device. skipping\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='del'>-	vv_data-&gt;ops.vidioc_enum_input = vidioc_enum_input;</div><div class='del'>-	vv_data-&gt;ops.vidioc_g_input = vidioc_g_input;</div><div class='del'>-	vv_data-&gt;ops.vidioc_s_input = vidioc_s_input;</div><div class='del'>-	vv_data-&gt;ops.vidioc_g_tuner = vidioc_g_tuner;</div><div class='del'>-	vv_data-&gt;ops.vidioc_s_tuner = vidioc_s_tuner;</div><div class='del'>-	vv_data-&gt;ops.vidioc_g_frequency = vidioc_g_frequency;</div><div class='del'>-	vv_data-&gt;ops.vidioc_s_frequency = vidioc_s_frequency;</div><div class='del'>-	vv_data-&gt;ops.vidioc_g_audio = vidioc_g_audio;</div><div class='del'>-	vv_data-&gt;ops.vidioc_s_audio = vidioc_s_audio;</div><div class='del'>-	vv_data-&gt;ops.vidioc_g_sliced_vbi_cap = vidioc_g_sliced_vbi_cap;</div><div class='del'>-	vv_data-&gt;ops.vidioc_g_fmt_sliced_vbi_out = vidioc_g_fmt_sliced_vbi_out;</div><div class='del'>-	vv_data-&gt;ops.vidioc_s_fmt_sliced_vbi_out = vidioc_s_fmt_sliced_vbi_out;</div><div class='add'>+	vv_data-&gt;vid_ops.vidioc_enum_input = vidioc_enum_input;</div><div class='add'>+	vv_data-&gt;vid_ops.vidioc_g_input = vidioc_g_input;</div><div class='add'>+	vv_data-&gt;vid_ops.vidioc_s_input = vidioc_s_input;</div><div class='add'>+	vv_data-&gt;vid_ops.vidioc_g_tuner = vidioc_g_tuner;</div><div class='add'>+	vv_data-&gt;vid_ops.vidioc_s_tuner = vidioc_s_tuner;</div><div class='add'>+	vv_data-&gt;vid_ops.vidioc_g_frequency = vidioc_g_frequency;</div><div class='add'>+	vv_data-&gt;vid_ops.vidioc_s_frequency = vidioc_s_frequency;</div><div class='add'>+	vv_data-&gt;vid_ops.vidioc_enumaudio = vidioc_enumaudio;</div><div class='add'>+	vv_data-&gt;vid_ops.vidioc_g_audio = vidioc_g_audio;</div><div class='add'>+	vv_data-&gt;vid_ops.vidioc_s_audio = vidioc_s_audio;</div><div class='add'>+	vv_data-&gt;vid_ops.vidioc_g_fmt_vbi_cap = NULL;</div><div class='add'>+</div><div class='add'>+	vv_data-&gt;vbi_ops.vidioc_g_tuner = vidioc_g_tuner;</div><div class='add'>+	vv_data-&gt;vbi_ops.vidioc_s_tuner = vidioc_s_tuner;</div><div class='add'>+	vv_data-&gt;vbi_ops.vidioc_g_frequency = vidioc_g_frequency;</div><div class='add'>+	vv_data-&gt;vbi_ops.vidioc_s_frequency = vidioc_s_frequency;</div><div class='add'>+	vv_data-&gt;vbi_ops.vidioc_g_fmt_vbi_cap = NULL;</div><div class='add'>+	vv_data-&gt;vbi_ops.vidioc_g_sliced_vbi_cap = vidioc_g_sliced_vbi_cap;</div><div class='add'>+	vv_data-&gt;vbi_ops.vidioc_g_fmt_sliced_vbi_out = vidioc_g_fmt_sliced_vbi_out;</div><div class='add'>+	vv_data-&gt;vbi_ops.vidioc_s_fmt_sliced_vbi_out = vidioc_s_fmt_sliced_vbi_out;</div><div class='add'>+</div><div class='add'>+	if (FW_VERSION(av7110-&gt;arm_app) &lt; 0x2623)</div><div class='add'>+		vv_data-&gt;capabilities &amp;= ~V4L2_CAP_SLICED_VBI_OUTPUT;</div><div class='ctx'> </div><div class='ctx'> 	if (saa7146_register_device(&amp;av7110-&gt;v4l_dev, dev, "av7110", VFL_TYPE_GRABBER)) {</div><div class='ctx'> 		ERR("cannot register capture device. skipping\n");</div><div class='ctx'> 		saa7146_vv_release(dev);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='del'>-	if (saa7146_register_device(&amp;av7110-&gt;vbi_dev, dev, "av7110", VFL_TYPE_VBI))</div><div class='del'>-		ERR("cannot register vbi v4l2 device. skipping\n");</div><div class='add'>+	if (FW_VERSION(av7110-&gt;arm_app) &gt;= 0x2623) {</div><div class='add'>+		if (saa7146_register_device(&amp;av7110-&gt;vbi_dev, dev, "av7110", VFL_TYPE_VBI))</div><div class='add'>+			ERR("cannot register vbi v4l2 device. skipping\n");</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -905,7 +937,7 @@ static int std_callback(struct saa7146_dev* dev, struct saa7146_standard *std)</div><div class='ctx'> static struct saa7146_ext_vv av7110_vv_data_st = {</div><div class='ctx'> 	.inputs		= 1,</div><div class='ctx'> 	.audios		= 1,</div><div class='del'>-	.capabilities	= V4L2_CAP_SLICED_VBI_OUTPUT,</div><div class='add'>+	.capabilities	= V4L2_CAP_SLICED_VBI_OUTPUT | V4L2_CAP_AUDIO,</div><div class='ctx'> 	.flags		= 0,</div><div class='ctx'> </div><div class='ctx'> 	.stds		= &amp;standard[0],</div><div class='hunk'>@@ -920,7 +952,7 @@ static struct saa7146_ext_vv av7110_vv_data_st = {</div><div class='ctx'> static struct saa7146_ext_vv av7110_vv_data_c = {</div><div class='ctx'> 	.inputs		= 1,</div><div class='ctx'> 	.audios		= 1,</div><div class='del'>-	.capabilities	= V4L2_CAP_TUNER | V4L2_CAP_SLICED_VBI_OUTPUT,</div><div class='add'>+	.capabilities	= V4L2_CAP_TUNER | V4L2_CAP_SLICED_VBI_OUTPUT | V4L2_CAP_AUDIO,</div><div class='ctx'> 	.flags		= SAA7146_USE_PORT_B_FOR_VBI,</div><div class='ctx'> </div><div class='ctx'> 	.stds		= &amp;standard[0],</div><div class='head'>diff --git a/drivers/media/dvb/ttpci/budget-av.c b/drivers/media/dvb/ttpci/budget-av.c<br/>index 8b32e282bf5d..12ddb53c58dc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/dvb/ttpci/budget-av.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/dvb/ttpci/budget-av.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/dvb/ttpci/budget-av.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/dvb/ttpci/budget-av.c</a></div><div class='hunk'>@@ -1483,9 +1483,9 @@ static int budget_av_attach(struct saa7146_dev *dev, struct saa7146_pci_extensio</div><div class='ctx'> 			ERR("cannot init vv subsystem\n");</div><div class='ctx'> 			return err;</div><div class='ctx'> 		}</div><div class='del'>-		vv_data.ops.vidioc_enum_input = vidioc_enum_input;</div><div class='del'>-		vv_data.ops.vidioc_g_input = vidioc_g_input;</div><div class='del'>-		vv_data.ops.vidioc_s_input = vidioc_s_input;</div><div class='add'>+		vv_data.vid_ops.vidioc_enum_input = vidioc_enum_input;</div><div class='add'>+		vv_data.vid_ops.vidioc_g_input = vidioc_g_input;</div><div class='add'>+		vv_data.vid_ops.vidioc_s_input = vidioc_s_input;</div><div class='ctx'> </div><div class='ctx'> 		if ((err = saa7146_register_device(&amp;budget_av-&gt;vd, dev, "knc1", VFL_TYPE_GRABBER))) {</div><div class='ctx'> 			/* fixme: proper cleanup here */</div><div class='head'>diff --git a/drivers/media/media-entity.c b/drivers/media/media-entity.c<br/>index 056138f63c7d..e1cd13283407 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/media-entity.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/media-entity.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/media-entity.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/media-entity.c</a></div><div class='hunk'>@@ -214,23 +214,76 @@ EXPORT_SYMBOL_GPL(media_entity_graph_walk_next);</div><div class='ctx'>  * pipeline pointer must be identical for all nested calls to</div><div class='ctx'>  * media_entity_pipeline_start().</div><div class='ctx'>  */</div><div class='del'>-void media_entity_pipeline_start(struct media_entity *entity,</div><div class='del'>-				 struct media_pipeline *pipe)</div><div class='add'>+__must_check int media_entity_pipeline_start(struct media_entity *entity,</div><div class='add'>+					     struct media_pipeline *pipe)</div><div class='ctx'> {</div><div class='ctx'> 	struct media_device *mdev = entity-&gt;parent;</div><div class='ctx'> 	struct media_entity_graph graph;</div><div class='add'>+	struct media_entity *entity_err = entity;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mdev-&gt;graph_mutex);</div><div class='ctx'> </div><div class='ctx'> 	media_entity_graph_walk_start(&amp;graph, entity);</div><div class='ctx'> </div><div class='ctx'> 	while ((entity = media_entity_graph_walk_next(&amp;graph))) {</div><div class='add'>+		unsigned int i;</div><div class='add'>+</div><div class='ctx'> 		entity-&gt;stream_count++;</div><div class='ctx'> 		WARN_ON(entity-&gt;pipe &amp;&amp; entity-&gt;pipe != pipe);</div><div class='ctx'> 		entity-&gt;pipe = pipe;</div><div class='add'>+</div><div class='add'>+		/* Already streaming --- no need to check. */</div><div class='add'>+		if (entity-&gt;stream_count &gt; 1)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!entity-&gt;ops || !entity-&gt;ops-&gt;link_validate)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; entity-&gt;num_links; i++) {</div><div class='add'>+			struct media_link *link = &amp;entity-&gt;links[i];</div><div class='add'>+</div><div class='add'>+			/* Is this pad part of an enabled link? */</div><div class='add'>+			if (!(link-&gt;flags &amp; MEDIA_LNK_FL_ENABLED))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			/* Are we the sink or not? */</div><div class='add'>+			if (link-&gt;sink-&gt;entity != entity)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			ret = entity-&gt;ops-&gt;link_validate(link);</div><div class='add'>+			if (ret &lt; 0 &amp;&amp; ret != -ENOIOCTLCMD)</div><div class='add'>+				goto error;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;mdev-&gt;graph_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	/*</div><div class='add'>+	 * Link validation on graph failed. We revert what we did and</div><div class='add'>+	 * return the error.</div><div class='add'>+	 */</div><div class='add'>+	media_entity_graph_walk_start(&amp;graph, entity_err);</div><div class='add'>+</div><div class='add'>+	while ((entity_err = media_entity_graph_walk_next(&amp;graph))) {</div><div class='add'>+		entity_err-&gt;stream_count--;</div><div class='add'>+		if (entity_err-&gt;stream_count == 0)</div><div class='add'>+			entity_err-&gt;pipe = NULL;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We haven't increased stream_count further than this</div><div class='add'>+		 * so we quit here.</div><div class='add'>+		 */</div><div class='add'>+		if (entity_err == entity)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;mdev-&gt;graph_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(media_entity_pipeline_start);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/radio/Kconfig b/drivers/media/radio/Kconfig<br/>index 8db2d7f4b52a..c257da13d766 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/Kconfig</a></div><div class='hunk'>@@ -320,7 +320,7 @@ config RADIO_MIROPCM20</div><div class='ctx'> 	  module will be called radio-miropcm20.</div><div class='ctx'> </div><div class='ctx'> config RADIO_SF16FMI</div><div class='del'>-	tristate "SF16-FMI/SF16-FMP Radio"</div><div class='add'>+	tristate "SF16-FMI/SF16-FMP/SF16-FMD Radio"</div><div class='ctx'> 	depends on ISA &amp;&amp; VIDEO_V4L2</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Choose Y here if you have one of these FM radio cards.</div><div class='hunk'>@@ -329,7 +329,7 @@ config RADIO_SF16FMI</div><div class='ctx'> 	  module will be called radio-sf16fmi.</div><div class='ctx'> </div><div class='ctx'> config RADIO_SF16FMR2</div><div class='del'>-	tristate "SF16FMR2 Radio"</div><div class='add'>+	tristate "SF16-FMR2/SF16-FMD2 Radio"</div><div class='ctx'> 	depends on ISA &amp;&amp; VIDEO_V4L2 &amp;&amp; SND</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Choose Y here if you have one of these FM radio cards.</div><div class='head'>diff --git a/drivers/media/radio/dsbr100.c b/drivers/media/radio/dsbr100.c<br/>index f36905b63645..63b112b555b2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/dsbr100.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/dsbr100.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/dsbr100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/dsbr100.c</a></div><div class='hunk'>@@ -1,92 +1,37 @@</div><div class='ctx'> /* A driver for the D-Link DSB-R100 USB radio and Gemtek USB Radio 21.</div><div class='del'>- The device plugs into both the USB and an analog audio input, so this thing</div><div class='del'>- only deals with initialisation and frequency setting, the</div><div class='del'>- audio data has to be handled by a sound driver.</div><div class='del'>-</div><div class='del'>- Major issue: I can't find out where the device reports the signal</div><div class='del'>- strength, and indeed the windows software appearantly just looks</div><div class='del'>- at the stereo indicator as well.  So, scanning will only find</div><div class='del'>- stereo stations.  Sad, but I can't help it.</div><div class='del'>-</div><div class='del'>- Also, the windows program sends oodles of messages over to the</div><div class='del'>- device, and I couldn't figure out their meaning.  My suspicion</div><div class='del'>- is that they don't have any:-)</div><div class='del'>-</div><div class='del'>- You might find some interesting stuff about this module at</div><div class='del'>- http://unimut.fsk.uni-heidelberg.de/unimut/demi/dsbr</div><div class='del'>-</div><div class='del'>- Copyright (c) 2000 Markus Demleitner &lt;msdemlei@cl.uni-heidelberg.de&gt;</div><div class='del'>-</div><div class='del'>- This program is free software; you can redistribute it and/or modify</div><div class='del'>- it under the terms of the GNU General Public License as published by</div><div class='del'>- the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- (at your option) any later version.</div><div class='del'>-</div><div class='del'>- This program is distributed in the hope that it will be useful,</div><div class='del'>- but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- GNU General Public License for more details.</div><div class='del'>-</div><div class='del'>- You should have received a copy of the GNU General Public License</div><div class='del'>- along with this program; if not, write to the Free Software</div><div class='del'>- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA</div><div class='del'>-</div><div class='del'>- History:</div><div class='del'>-</div><div class='del'>- Version 0.46:</div><div class='del'>-	Removed usb_dsbr100_open/close calls and radio-&gt;users counter. Also,</div><div class='del'>-	radio-&gt;muted changed to radio-&gt;status and suspend/resume calls updated.</div><div class='del'>-</div><div class='del'>- Version 0.45:</div><div class='del'>-	Converted to v4l2_device.</div><div class='del'>-</div><div class='del'>- Version 0.44:</div><div class='del'>-	Add suspend/resume functions, fix unplug of device,</div><div class='del'>-	a lot of cleanups and fixes by Alexey Klimov &lt;klimov.linux@gmail.com&gt;</div><div class='del'>-</div><div class='del'>- Version 0.43:</div><div class='del'>-	Oliver Neukum: avoided DMA coherency issue</div><div class='del'>-</div><div class='del'>- Version 0.42:</div><div class='del'>-	Converted dsbr100 to use video_ioctl2</div><div class='del'>-	by Douglas Landgraf &lt;dougsland@gmail.com&gt;</div><div class='del'>-</div><div class='del'>- Version 0.41-ac1:</div><div class='del'>-	Alan Cox: Some cleanups and fixes</div><div class='del'>-</div><div class='del'>- Version 0.41:</div><div class='del'>-	Converted to V4L2 API by Mauro Carvalho Chehab &lt;mchehab@infradead.org&gt;</div><div class='del'>-</div><div class='del'>- Version 0.40:</div><div class='del'>-	Markus: Updates for 2.6.x kernels, code layout changes, name sanitizing</div><div class='del'>-</div><div class='del'>- Version 0.30:</div><div class='del'>-	Markus: Updates for 2.5.x kernel and more ISO compliant source</div><div class='del'>-</div><div class='del'>- Version 0.25:</div><div class='del'>-	PSL and Markus: Cleanup, radio now doesn't stop on device close</div><div class='del'>-</div><div class='del'>- Version 0.24:</div><div class='del'>-	Markus: Hope I got these silly VIDEO_TUNER_LOW issues finally</div><div class='del'>-	right.  Some minor cleanup, improved standalone compilation</div><div class='del'>-</div><div class='del'>- Version 0.23:</div><div class='del'>-	Markus: Sign extension bug fixed by declaring transfer_buffer unsigned</div><div class='del'>-</div><div class='del'>- Version 0.22:</div><div class='del'>-	Markus: Some (brown bag) cleanup in what VIDIOCSTUNER returns,</div><div class='del'>-	thanks to Mike Cox for pointing the problem out.</div><div class='del'>-</div><div class='del'>- Version 0.21:</div><div class='del'>-	Markus: Minor cleanup, warnings if something goes wrong, lame attempt</div><div class='del'>-	to adhere to Documentation/CodingStyle</div><div class='del'>-</div><div class='del'>- Version 0.2:</div><div class='del'>-	Brad Hards &lt;bradh@dynamite.com.au&gt;: Fixes to make it work as non-module</div><div class='del'>-	Markus: Copyright clarification</div><div class='del'>-</div><div class='del'>- Version 0.01: Markus: initial release</div><div class='del'>-</div><div class='add'>+ * The device plugs into both the USB and an analog audio input, so this thing</div><div class='add'>+ * only deals with initialisation and frequency setting, the</div><div class='add'>+ * audio data has to be handled by a sound driver.</div><div class='add'>+ *</div><div class='add'>+ * Major issue: I can't find out where the device reports the signal</div><div class='add'>+ * strength, and indeed the windows software appearantly just looks</div><div class='add'>+ * at the stereo indicator as well.  So, scanning will only find</div><div class='add'>+ * stereo stations.  Sad, but I can't help it.</div><div class='add'>+ *</div><div class='add'>+ * Also, the windows program sends oodles of messages over to the</div><div class='add'>+ * device, and I couldn't figure out their meaning.  My suspicion</div><div class='add'>+ * is that they don't have any:-)</div><div class='add'>+ *</div><div class='add'>+ * You might find some interesting stuff about this module at</div><div class='add'>+ * http://unimut.fsk.uni-heidelberg.de/unimut/demi/dsbr</div><div class='add'>+ *</div><div class='add'>+ * Fully tested with the Keene USB FM Transmitter and the v4l2-compliance tool.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2000 Markus Demleitner &lt;msdemlei@cl.uni-heidelberg.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA</div><div class='ctx'> */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -95,17 +40,19 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='del'>-#include &lt;linux/usb.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Version Information</div><div class='ctx'>  */</div><div class='del'>-#define DRIVER_VERSION "0.4.7"</div><div class='del'>-</div><div class='del'>-#define DRIVER_AUTHOR "Markus Demleitner &lt;msdemlei@tucana.harvard.edu&gt;"</div><div class='del'>-#define DRIVER_DESC "D-Link DSB-R100 USB FM radio driver"</div><div class='add'>+MODULE_AUTHOR("Markus Demleitner &lt;msdemlei@tucana.harvard.edu&gt;");</div><div class='add'>+MODULE_DESCRIPTION("D-Link DSB-R100 USB FM radio driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_VERSION("1.1.0");</div><div class='ctx'> </div><div class='ctx'> #define DSB100_VENDOR 0x04b4</div><div class='ctx'> #define DSB100_PRODUCT 0x1002</div><div class='hunk'>@@ -122,19 +69,8 @@ devices, that would be 76 and 91.  */</div><div class='ctx'> #define FREQ_MAX 108.0</div><div class='ctx'> #define FREQ_MUL 16000</div><div class='ctx'> </div><div class='del'>-/* defines for radio-&gt;status */</div><div class='del'>-#define STARTED	0</div><div class='del'>-#define STOPPED	1</div><div class='del'>-</div><div class='ctx'> #define v4l2_dev_to_radio(d) container_of(d, struct dsbr100_device, v4l2_dev)</div><div class='ctx'> </div><div class='del'>-static int usb_dsbr100_probe(struct usb_interface *intf,</div><div class='del'>-			     const struct usb_device_id *id);</div><div class='del'>-static void usb_dsbr100_disconnect(struct usb_interface *intf);</div><div class='del'>-static int usb_dsbr100_suspend(struct usb_interface *intf,</div><div class='del'>-						pm_message_t message);</div><div class='del'>-static int usb_dsbr100_resume(struct usb_interface *intf);</div><div class='del'>-</div><div class='ctx'> static int radio_nr = -1;</div><div class='ctx'> module_param(radio_nr, int, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -143,179 +79,92 @@ struct dsbr100_device {</div><div class='ctx'> 	struct usb_device *usbdev;</div><div class='ctx'> 	struct video_device videodev;</div><div class='ctx'> 	struct v4l2_device v4l2_dev;</div><div class='add'>+	struct v4l2_ctrl_handler hdl;</div><div class='ctx'> </div><div class='ctx'> 	u8 *transfer_buffer;</div><div class='ctx'> 	struct mutex v4l2_lock;</div><div class='ctx'> 	int curfreq;</div><div class='del'>-	int stereo;</div><div class='del'>-	int status;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct usb_device_id usb_dsbr100_device_table [] = {</div><div class='del'>-	{ USB_DEVICE(DSB100_VENDOR, DSB100_PRODUCT) },</div><div class='del'>-	{ }						/* Terminating entry */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-MODULE_DEVICE_TABLE (usb, usb_dsbr100_device_table);</div><div class='del'>-</div><div class='del'>-/* USB subsystem interface */</div><div class='del'>-static struct usb_driver usb_dsbr100_driver = {</div><div class='del'>-	.name			= "dsbr100",</div><div class='del'>-	.probe			= usb_dsbr100_probe,</div><div class='del'>-	.disconnect		= usb_dsbr100_disconnect,</div><div class='del'>-	.id_table		= usb_dsbr100_device_table,</div><div class='del'>-	.suspend		= usb_dsbr100_suspend,</div><div class='del'>-	.resume			= usb_dsbr100_resume,</div><div class='del'>-	.reset_resume		= usb_dsbr100_resume,</div><div class='del'>-	.supports_autosuspend	= 0,</div><div class='add'>+	bool stereo;</div><div class='add'>+	bool muted;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Low-level device interface begins here */</div><div class='ctx'> </div><div class='del'>-/* switch on radio */</div><div class='del'>-static int dsbr100_start(struct dsbr100_device *radio)</div><div class='add'>+/* set a frequency, freq is defined by v4l's TUNER_LOW, i.e. 1/16th kHz */</div><div class='add'>+static int dsbr100_setfreq(struct dsbr100_device *radio, unsigned freq)</div><div class='ctx'> {</div><div class='del'>-	int retval;</div><div class='del'>-	int request;</div><div class='del'>-</div><div class='del'>-	retval = usb_control_msg(radio-&gt;usbdev,</div><div class='del'>-		usb_rcvctrlpipe(radio-&gt;usbdev, 0),</div><div class='del'>-		USB_REQ_GET_STATUS,</div><div class='del'>-		USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,</div><div class='del'>-		0x00, 0xC7, radio-&gt;transfer_buffer, 8, 300);</div><div class='del'>-</div><div class='del'>-	if (retval &lt; 0) {</div><div class='del'>-		request = USB_REQ_GET_STATUS;</div><div class='del'>-		goto usb_control_msg_failed;</div><div class='add'>+	unsigned f = (freq / 16 * 80) / 1000 + 856;</div><div class='add'>+	int retval = 0;</div><div class='add'>+</div><div class='add'>+	if (!radio-&gt;muted) {</div><div class='add'>+		retval = usb_control_msg(radio-&gt;usbdev,</div><div class='add'>+				usb_rcvctrlpipe(radio-&gt;usbdev, 0),</div><div class='add'>+				DSB100_TUNE,</div><div class='add'>+				USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,</div><div class='add'>+				(f &gt;&gt; 8) &amp; 0x00ff, f &amp; 0xff,</div><div class='add'>+				radio-&gt;transfer_buffer, 8, 300);</div><div class='add'>+		if (retval &gt;= 0)</div><div class='add'>+			mdelay(1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	retval = usb_control_msg(radio-&gt;usbdev,</div><div class='del'>-		usb_rcvctrlpipe(radio-&gt;usbdev, 0),</div><div class='del'>-		DSB100_ONOFF,</div><div class='del'>-		USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,</div><div class='del'>-		0x01, 0x00, radio-&gt;transfer_buffer, 8, 300);</div><div class='del'>-</div><div class='del'>-	if (retval &lt; 0) {</div><div class='del'>-		request = DSB100_ONOFF;</div><div class='del'>-		goto usb_control_msg_failed;</div><div class='add'>+	if (retval &gt;= 0) {</div><div class='add'>+		radio-&gt;curfreq = freq;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	radio-&gt;status = STARTED;</div><div class='del'>-	return (radio-&gt;transfer_buffer)[0];</div><div class='del'>-</div><div class='del'>-usb_control_msg_failed:</div><div class='ctx'> 	dev_err(&amp;radio-&gt;usbdev-&gt;dev,</div><div class='ctx'> 		"%s - usb_control_msg returned %i, request %i\n",</div><div class='del'>-			__func__, retval, request);</div><div class='add'>+			__func__, retval, DSB100_TUNE);</div><div class='ctx'> 	return retval;</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* switch off radio */</div><div class='del'>-static int dsbr100_stop(struct dsbr100_device *radio)</div><div class='add'>+/* switch on radio */</div><div class='add'>+static int dsbr100_start(struct dsbr100_device *radio)</div><div class='ctx'> {</div><div class='del'>-	int retval;</div><div class='del'>-	int request;</div><div class='del'>-</div><div class='del'>-	retval = usb_control_msg(radio-&gt;usbdev,</div><div class='del'>-		usb_rcvctrlpipe(radio-&gt;usbdev, 0),</div><div class='del'>-		USB_REQ_GET_STATUS,</div><div class='del'>-		USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,</div><div class='del'>-		0x16, 0x1C, radio-&gt;transfer_buffer, 8, 300);</div><div class='del'>-</div><div class='del'>-	if (retval &lt; 0) {</div><div class='del'>-		request = USB_REQ_GET_STATUS;</div><div class='del'>-		goto usb_control_msg_failed;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	retval = usb_control_msg(radio-&gt;usbdev,</div><div class='add'>+	int retval = usb_control_msg(radio-&gt;usbdev,</div><div class='ctx'> 		usb_rcvctrlpipe(radio-&gt;usbdev, 0),</div><div class='ctx'> 		DSB100_ONOFF,</div><div class='ctx'> 		USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,</div><div class='del'>-		0x00, 0x00, radio-&gt;transfer_buffer, 8, 300);</div><div class='del'>-</div><div class='del'>-	if (retval &lt; 0) {</div><div class='del'>-		request = DSB100_ONOFF;</div><div class='del'>-		goto usb_control_msg_failed;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	radio-&gt;status = STOPPED;</div><div class='del'>-	return (radio-&gt;transfer_buffer)[0];</div><div class='add'>+		0x01, 0x00, radio-&gt;transfer_buffer, 8, 300);</div><div class='ctx'> </div><div class='del'>-usb_control_msg_failed:</div><div class='add'>+	if (retval &gt;= 0)</div><div class='add'>+		return dsbr100_setfreq(radio, radio-&gt;curfreq);</div><div class='ctx'> 	dev_err(&amp;radio-&gt;usbdev-&gt;dev,</div><div class='ctx'> 		"%s - usb_control_msg returned %i, request %i\n",</div><div class='del'>-			__func__, retval, request);</div><div class='add'>+			__func__, retval, DSB100_ONOFF);</div><div class='ctx'> 	return retval;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* set a frequency, freq is defined by v4l's TUNER_LOW, i.e. 1/16th kHz */</div><div class='del'>-static int dsbr100_setfreq(struct dsbr100_device *radio)</div><div class='add'>+/* switch off radio */</div><div class='add'>+static int dsbr100_stop(struct dsbr100_device *radio)</div><div class='ctx'> {</div><div class='del'>-	int retval;</div><div class='del'>-	int request;</div><div class='del'>-	int freq = (radio-&gt;curfreq / 16 * 80) / 1000 + 856;</div><div class='del'>-</div><div class='del'>-	retval = usb_control_msg(radio-&gt;usbdev,</div><div class='del'>-		usb_rcvctrlpipe(radio-&gt;usbdev, 0),</div><div class='del'>-		DSB100_TUNE,</div><div class='del'>-		USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,</div><div class='del'>-		(freq &gt;&gt; 8) &amp; 0x00ff, freq &amp; 0xff,</div><div class='del'>-		radio-&gt;transfer_buffer, 8, 300);</div><div class='del'>-</div><div class='del'>-	if (retval &lt; 0) {</div><div class='del'>-		request = DSB100_TUNE;</div><div class='del'>-		goto usb_control_msg_failed;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	retval = usb_control_msg(radio-&gt;usbdev,</div><div class='add'>+	int retval = usb_control_msg(radio-&gt;usbdev,</div><div class='ctx'> 		usb_rcvctrlpipe(radio-&gt;usbdev, 0),</div><div class='del'>-		USB_REQ_GET_STATUS,</div><div class='add'>+		DSB100_ONOFF,</div><div class='ctx'> 		USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,</div><div class='del'>-		0x96, 0xB7, radio-&gt;transfer_buffer, 8, 300);</div><div class='del'>-</div><div class='del'>-	if (retval &lt; 0) {</div><div class='del'>-		request = USB_REQ_GET_STATUS;</div><div class='del'>-		goto usb_control_msg_failed;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	retval = usb_control_msg(radio-&gt;usbdev,</div><div class='del'>-		usb_rcvctrlpipe(radio-&gt;usbdev, 0),</div><div class='del'>-		USB_REQ_GET_STATUS,</div><div class='del'>-		USB_TYPE_VENDOR | USB_RECIP_DEVICE |  USB_DIR_IN,</div><div class='del'>-		0x00, 0x24, radio-&gt;transfer_buffer, 8, 300);</div><div class='del'>-</div><div class='del'>-	if (retval &lt; 0) {</div><div class='del'>-		request = USB_REQ_GET_STATUS;</div><div class='del'>-		goto usb_control_msg_failed;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	radio-&gt;stereo = !((radio-&gt;transfer_buffer)[0] &amp; 0x01);</div><div class='del'>-	return (radio-&gt;transfer_buffer)[0];</div><div class='add'>+		0x00, 0x00, radio-&gt;transfer_buffer, 8, 300);</div><div class='ctx'> </div><div class='del'>-usb_control_msg_failed:</div><div class='del'>-	radio-&gt;stereo = -1;</div><div class='add'>+	if (retval &gt;= 0)</div><div class='add'>+		return 0;</div><div class='ctx'> 	dev_err(&amp;radio-&gt;usbdev-&gt;dev,</div><div class='ctx'> 		"%s - usb_control_msg returned %i, request %i\n",</div><div class='del'>-			__func__, retval, request);</div><div class='add'>+			__func__, retval, DSB100_ONOFF);</div><div class='ctx'> 	return retval;</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* return the device status.  This is, in effect, just whether it</div><div class='ctx'> sees a stereo signal or not.  Pity. */</div><div class='ctx'> static void dsbr100_getstat(struct dsbr100_device *radio)</div><div class='ctx'> {</div><div class='del'>-	int retval;</div><div class='del'>-</div><div class='del'>-	retval = usb_control_msg(radio-&gt;usbdev,</div><div class='add'>+	int retval = usb_control_msg(radio-&gt;usbdev,</div><div class='ctx'> 		usb_rcvctrlpipe(radio-&gt;usbdev, 0),</div><div class='ctx'> 		USB_REQ_GET_STATUS,</div><div class='ctx'> 		USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,</div><div class='del'>-		0x00 , 0x24, radio-&gt;transfer_buffer, 8, 300);</div><div class='add'>+		0x00, 0x24, radio-&gt;transfer_buffer, 8, 300);</div><div class='ctx'> </div><div class='ctx'> 	if (retval &lt; 0) {</div><div class='del'>-		radio-&gt;stereo = -1;</div><div class='add'>+		radio-&gt;stereo = false;</div><div class='ctx'> 		dev_err(&amp;radio-&gt;usbdev-&gt;dev,</div><div class='ctx'> 			"%s - usb_control_msg returned %i, request %i\n",</div><div class='ctx'> 				__func__, retval, USB_REQ_GET_STATUS);</div><div class='hunk'>@@ -332,7 +181,8 @@ static int vidioc_querycap(struct file *file, void *priv,</div><div class='ctx'> 	strlcpy(v-&gt;driver, "dsbr100", sizeof(v-&gt;driver));</div><div class='ctx'> 	strlcpy(v-&gt;card, "D-Link R-100 USB FM Radio", sizeof(v-&gt;card));</div><div class='ctx'> 	usb_make_path(radio-&gt;usbdev, v-&gt;bus_info, sizeof(v-&gt;bus_info));</div><div class='del'>-	v-&gt;capabilities = V4L2_CAP_TUNER;</div><div class='add'>+	v-&gt;device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;</div><div class='add'>+	v-&gt;capabilities = v-&gt;device_caps | V4L2_CAP_DEVICE_CAPS;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -349,13 +199,11 @@ static int vidioc_g_tuner(struct file *file, void *priv,</div><div class='ctx'> 	v-&gt;type = V4L2_TUNER_RADIO;</div><div class='ctx'> 	v-&gt;rangelow = FREQ_MIN * FREQ_MUL;</div><div class='ctx'> 	v-&gt;rangehigh = FREQ_MAX * FREQ_MUL;</div><div class='del'>-	v-&gt;rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;</div><div class='del'>-	v-&gt;capability = V4L2_TUNER_CAP_LOW;</div><div class='del'>-	if(radio-&gt;stereo)</div><div class='del'>-		v-&gt;audmode = V4L2_TUNER_MODE_STEREO;</div><div class='del'>-	else</div><div class='del'>-		v-&gt;audmode = V4L2_TUNER_MODE_MONO;</div><div class='del'>-	v-&gt;signal = 0xffff;     /* We can't get the signal strength */</div><div class='add'>+	v-&gt;rxsubchans = radio-&gt;stereo ? V4L2_TUNER_SUB_STEREO :</div><div class='add'>+		V4L2_TUNER_SUB_MONO;</div><div class='add'>+	v-&gt;capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO;</div><div class='add'>+	v-&gt;audmode = V4L2_TUNER_MODE_STEREO;</div><div class='add'>+	v-&gt;signal = radio-&gt;stereo ? 0xffff : 0;     /* We can't get the signal strength */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -369,14 +217,12 @@ static int vidioc_s_frequency(struct file *file, void *priv,</div><div class='ctx'> 				struct v4l2_frequency *f)</div><div class='ctx'> {</div><div class='ctx'> 	struct dsbr100_device *radio = video_drvdata(file);</div><div class='del'>-	int retval;</div><div class='ctx'> </div><div class='del'>-	radio-&gt;curfreq = f-&gt;frequency;</div><div class='add'>+	if (f-&gt;tuner != 0 || f-&gt;type != V4L2_TUNER_RADIO)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	retval = dsbr100_setfreq(radio);</div><div class='del'>-	if (retval &lt; 0)</div><div class='del'>-		dev_warn(&amp;radio-&gt;usbdev-&gt;dev, "Set frequency failed\n");</div><div class='del'>-	return 0;</div><div class='add'>+	return dsbr100_setfreq(radio, clamp_t(unsigned, f-&gt;frequency,</div><div class='add'>+			FREQ_MIN * FREQ_MUL, FREQ_MAX * FREQ_MUL));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_g_frequency(struct file *file, void *priv,</div><div class='hunk'>@@ -384,90 +230,26 @@ static int vidioc_g_frequency(struct file *file, void *priv,</div><div class='ctx'> {</div><div class='ctx'> 	struct dsbr100_device *radio = video_drvdata(file);</div><div class='ctx'> </div><div class='add'>+	if (f-&gt;tuner)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	f-&gt;type = V4L2_TUNER_RADIO;</div><div class='ctx'> 	f-&gt;frequency = radio-&gt;curfreq;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vidioc_queryctrl(struct file *file, void *priv,</div><div class='del'>-				struct v4l2_queryctrl *qc)</div><div class='del'>-{</div><div class='del'>-	switch (qc-&gt;id) {</div><div class='del'>-	case V4L2_CID_AUDIO_MUTE:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 1, 1, 1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vidioc_g_ctrl(struct file *file, void *priv,</div><div class='del'>-				struct v4l2_control *ctrl)</div><div class='add'>+static int usb_dsbr100_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='del'>-	struct dsbr100_device *radio = video_drvdata(file);</div><div class='add'>+	struct dsbr100_device *radio =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct dsbr100_device, hdl);</div><div class='ctx'> </div><div class='ctx'> 	switch (ctrl-&gt;id) {</div><div class='ctx'> 	case V4L2_CID_AUDIO_MUTE:</div><div class='del'>-		ctrl-&gt;value = radio-&gt;status;</div><div class='del'>-		return 0;</div><div class='add'>+		radio-&gt;muted = ctrl-&gt;val;</div><div class='add'>+		return radio-&gt;muted ? dsbr100_stop(radio) : dsbr100_start(radio);</div><div class='ctx'> 	}</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vidioc_s_ctrl(struct file *file, void *priv,</div><div class='del'>-				struct v4l2_control *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct dsbr100_device *radio = video_drvdata(file);</div><div class='del'>-	int retval;</div><div class='del'>-</div><div class='del'>-	switch (ctrl-&gt;id) {</div><div class='del'>-	case V4L2_CID_AUDIO_MUTE:</div><div class='del'>-		if (ctrl-&gt;value) {</div><div class='del'>-			retval = dsbr100_stop(radio);</div><div class='del'>-			if (retval &lt; 0) {</div><div class='del'>-				dev_warn(&amp;radio-&gt;usbdev-&gt;dev,</div><div class='del'>-					 "Radio did not respond properly\n");</div><div class='del'>-				return -EBUSY;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			retval = dsbr100_start(radio);</div><div class='del'>-			if (retval &lt; 0) {</div><div class='del'>-				dev_warn(&amp;radio-&gt;usbdev-&gt;dev,</div><div class='del'>-					 "Radio did not respond properly\n");</div><div class='del'>-				return -EBUSY;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vidioc_g_audio(struct file *file, void *priv,</div><div class='del'>-				struct v4l2_audio *a)</div><div class='del'>-{</div><div class='del'>-	if (a-&gt;index &gt; 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	strcpy(a-&gt;name, "Radio");</div><div class='del'>-	a-&gt;capability = V4L2_AUDCAP_STEREO;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vidioc_g_input(struct file *filp, void *priv, unsigned int *i)</div><div class='del'>-{</div><div class='del'>-	*i = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vidioc_s_input(struct file *filp, void *priv, unsigned int i)</div><div class='del'>-{</div><div class='del'>-	return i ? -EINVAL : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vidioc_s_audio(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_audio *a)</div><div class='del'>-{</div><div class='del'>-	return a-&gt;index ? -EINVAL : 0;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /* USB subsystem interface begins here */</div><div class='ctx'> </div><div class='hunk'>@@ -481,8 +263,17 @@ static void usb_dsbr100_disconnect(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct dsbr100_device *radio = usb_get_intfdata(intf);</div><div class='ctx'> </div><div class='del'>-	v4l2_device_get(&amp;radio-&gt;v4l2_dev);</div><div class='ctx'> 	mutex_lock(&amp;radio-&gt;v4l2_lock);</div><div class='add'>+	/*</div><div class='add'>+	 * Disconnect is also called on unload, and in that case we need to</div><div class='add'>+	 * mute the device. This call will silently fail if it is called</div><div class='add'>+	 * after a physical disconnect.</div><div class='add'>+	 */</div><div class='add'>+	usb_control_msg(radio-&gt;usbdev,</div><div class='add'>+		usb_rcvctrlpipe(radio-&gt;usbdev, 0),</div><div class='add'>+		DSB100_ONOFF,</div><div class='add'>+		USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,</div><div class='add'>+		0x00, 0x00, radio-&gt;transfer_buffer, 8, 300);</div><div class='ctx'> 	usb_set_intfdata(intf, NULL);</div><div class='ctx'> 	video_unregister_device(&amp;radio-&gt;videodev);</div><div class='ctx'> 	v4l2_device_disconnect(&amp;radio-&gt;v4l2_dev);</div><div class='hunk'>@@ -495,25 +286,13 @@ static void usb_dsbr100_disconnect(struct usb_interface *intf)</div><div class='ctx'> static int usb_dsbr100_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='ctx'> {</div><div class='ctx'> 	struct dsbr100_device *radio = usb_get_intfdata(intf);</div><div class='del'>-	int retval;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;radio-&gt;v4l2_lock);</div><div class='del'>-	if (radio-&gt;status == STARTED) {</div><div class='del'>-		retval = dsbr100_stop(radio);</div><div class='del'>-		if (retval &lt; 0)</div><div class='del'>-			dev_warn(&amp;intf-&gt;dev, "dsbr100_stop failed\n");</div><div class='del'>-</div><div class='del'>-		/* After dsbr100_stop() status set to STOPPED.</div><div class='del'>-		 * If we want driver to start radio on resume</div><div class='del'>-		 * we set status equal to STARTED.</div><div class='del'>-		 * On resume we will check status and run radio if needed.</div><div class='del'>-		 */</div><div class='del'>-		radio-&gt;status = STARTED;</div><div class='del'>-	}</div><div class='add'>+	if (!radio-&gt;muted &amp;&amp; dsbr100_stop(radio) &lt; 0)</div><div class='add'>+		dev_warn(&amp;intf-&gt;dev, "dsbr100_stop failed\n");</div><div class='ctx'> 	mutex_unlock(&amp;radio-&gt;v4l2_lock);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;intf-&gt;dev, "going into suspend..\n");</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -521,18 +300,13 @@ static int usb_dsbr100_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='ctx'> static int usb_dsbr100_resume(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct dsbr100_device *radio = usb_get_intfdata(intf);</div><div class='del'>-	int retval;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;radio-&gt;v4l2_lock);</div><div class='del'>-	if (radio-&gt;status == STARTED) {</div><div class='del'>-		retval = dsbr100_start(radio);</div><div class='del'>-		if (retval &lt; 0)</div><div class='del'>-			dev_warn(&amp;intf-&gt;dev, "dsbr100_start failed\n");</div><div class='del'>-	}</div><div class='add'>+	if (!radio-&gt;muted &amp;&amp; dsbr100_start(radio) &lt; 0)</div><div class='add'>+		dev_warn(&amp;intf-&gt;dev, "dsbr100_start failed\n");</div><div class='ctx'> 	mutex_unlock(&amp;radio-&gt;v4l2_lock);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;intf-&gt;dev, "coming out of suspend..\n");</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -541,15 +315,23 @@ static void usb_dsbr100_release(struct v4l2_device *v4l2_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dsbr100_device *radio = v4l2_dev_to_radio(v4l2_dev);</div><div class='ctx'> </div><div class='add'>+	v4l2_ctrl_handler_free(&amp;radio-&gt;hdl);</div><div class='ctx'> 	v4l2_device_unregister(&amp;radio-&gt;v4l2_dev);</div><div class='ctx'> 	kfree(radio-&gt;transfer_buffer);</div><div class='ctx'> 	kfree(radio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct v4l2_ctrl_ops usb_dsbr100_ctrl_ops = {</div><div class='add'>+	.s_ctrl = usb_dsbr100_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* File system interface */</div><div class='ctx'> static const struct v4l2_file_operations usb_dsbr100_fops = {</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='ctx'> 	.unlocked_ioctl	= video_ioctl2,</div><div class='add'>+	.open           = v4l2_fh_open,</div><div class='add'>+	.release        = v4l2_fh_release,</div><div class='add'>+	.poll		= v4l2_ctrl_poll,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct v4l2_ioctl_ops usb_dsbr100_ioctl_ops = {</div><div class='hunk'>@@ -558,13 +340,9 @@ static const struct v4l2_ioctl_ops usb_dsbr100_ioctl_ops = {</div><div class='ctx'> 	.vidioc_s_tuner     = vidioc_s_tuner,</div><div class='ctx'> 	.vidioc_g_frequency = vidioc_g_frequency,</div><div class='ctx'> 	.vidioc_s_frequency = vidioc_s_frequency,</div><div class='del'>-	.vidioc_queryctrl   = vidioc_queryctrl,</div><div class='del'>-	.vidioc_g_ctrl      = vidioc_g_ctrl,</div><div class='del'>-	.vidioc_s_ctrl      = vidioc_s_ctrl,</div><div class='del'>-	.vidioc_g_audio     = vidioc_g_audio,</div><div class='del'>-	.vidioc_s_audio     = vidioc_s_audio,</div><div class='del'>-	.vidioc_g_input     = vidioc_g_input,</div><div class='del'>-	.vidioc_s_input     = vidioc_s_input,</div><div class='add'>+	.vidioc_log_status  = v4l2_ctrl_log_status,</div><div class='add'>+	.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,</div><div class='add'>+	.vidioc_unsubscribe_event = v4l2_event_unsubscribe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* check if the device is present and register with v4l and usb if it is */</div><div class='hunk'>@@ -593,11 +371,17 @@ static int usb_dsbr100_probe(struct usb_interface *intf,</div><div class='ctx'> 	retval = v4l2_device_register(&amp;intf-&gt;dev, v4l2_dev);</div><div class='ctx'> 	if (retval &lt; 0) {</div><div class='ctx'> 		v4l2_err(v4l2_dev, "couldn't register v4l2_device\n");</div><div class='del'>-		kfree(radio-&gt;transfer_buffer);</div><div class='del'>-		kfree(radio);</div><div class='del'>-		return retval;</div><div class='add'>+		goto err_reg_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	v4l2_ctrl_handler_init(&amp;radio-&gt;hdl, 1);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;radio-&gt;hdl, &amp;usb_dsbr100_ctrl_ops,</div><div class='add'>+			  V4L2_CID_AUDIO_MUTE, 0, 1, 1, 1);</div><div class='add'>+	if (radio-&gt;hdl.error) {</div><div class='add'>+		retval = radio-&gt;hdl.error;</div><div class='add'>+		v4l2_err(v4l2_dev, "couldn't register control\n");</div><div class='add'>+		goto err_reg_ctrl;</div><div class='add'>+	}</div><div class='ctx'> 	mutex_init(&amp;radio-&gt;v4l2_lock);</div><div class='ctx'> 	strlcpy(radio-&gt;videodev.name, v4l2_dev-&gt;name, sizeof(radio-&gt;videodev.name));</div><div class='ctx'> 	radio-&gt;videodev.v4l2_dev = v4l2_dev;</div><div class='hunk'>@@ -605,28 +389,46 @@ static int usb_dsbr100_probe(struct usb_interface *intf,</div><div class='ctx'> 	radio-&gt;videodev.ioctl_ops = &amp;usb_dsbr100_ioctl_ops;</div><div class='ctx'> 	radio-&gt;videodev.release = video_device_release_empty;</div><div class='ctx'> 	radio-&gt;videodev.lock = &amp;radio-&gt;v4l2_lock;</div><div class='add'>+	radio-&gt;videodev.ctrl_handler = &amp;radio-&gt;hdl;</div><div class='add'>+	set_bit(V4L2_FL_USE_FH_PRIO, &amp;radio-&gt;videodev.flags);</div><div class='ctx'> </div><div class='ctx'> 	radio-&gt;usbdev = interface_to_usbdev(intf);</div><div class='ctx'> 	radio-&gt;curfreq = FREQ_MIN * FREQ_MUL;</div><div class='del'>-	radio-&gt;status = STOPPED;</div><div class='add'>+	radio-&gt;muted = true;</div><div class='ctx'> </div><div class='ctx'> 	video_set_drvdata(&amp;radio-&gt;videodev, radio);</div><div class='add'>+	usb_set_intfdata(intf, radio);</div><div class='ctx'> </div><div class='ctx'> 	retval = video_register_device(&amp;radio-&gt;videodev, VFL_TYPE_RADIO, radio_nr);</div><div class='del'>-	if (retval &lt; 0) {</div><div class='del'>-		v4l2_err(v4l2_dev, "couldn't register video device\n");</div><div class='del'>-		v4l2_device_unregister(v4l2_dev);</div><div class='del'>-		kfree(radio-&gt;transfer_buffer);</div><div class='del'>-		kfree(radio);</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-	usb_set_intfdata(intf, radio);</div><div class='del'>-	return 0;</div><div class='add'>+	if (retval == 0)</div><div class='add'>+		return 0;</div><div class='add'>+	v4l2_err(v4l2_dev, "couldn't register video device\n");</div><div class='add'>+</div><div class='add'>+err_reg_ctrl:</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;radio-&gt;hdl);</div><div class='add'>+	v4l2_device_unregister(v4l2_dev);</div><div class='add'>+err_reg_dev:</div><div class='add'>+	kfree(radio-&gt;transfer_buffer);</div><div class='add'>+	kfree(radio);</div><div class='add'>+	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-module_usb_driver(usb_dsbr100_driver);</div><div class='add'>+static struct usb_device_id usb_dsbr100_device_table[] = {</div><div class='add'>+	{ USB_DEVICE(DSB100_VENDOR, DSB100_PRODUCT) },</div><div class='add'>+	{ }						/* Terminating entry */</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR( DRIVER_AUTHOR );</div><div class='del'>-MODULE_DESCRIPTION( DRIVER_DESC );</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_VERSION(DRIVER_VERSION);</div><div class='add'>+MODULE_DEVICE_TABLE(usb, usb_dsbr100_device_table);</div><div class='add'>+</div><div class='add'>+/* USB subsystem interface */</div><div class='add'>+static struct usb_driver usb_dsbr100_driver = {</div><div class='add'>+	.name			= "dsbr100",</div><div class='add'>+	.probe			= usb_dsbr100_probe,</div><div class='add'>+	.disconnect		= usb_dsbr100_disconnect,</div><div class='add'>+	.id_table		= usb_dsbr100_device_table,</div><div class='add'>+	.suspend		= usb_dsbr100_suspend,</div><div class='add'>+	.resume			= usb_dsbr100_resume,</div><div class='add'>+	.reset_resume		= usb_dsbr100_resume,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_usb_driver(usb_dsbr100_driver);</div><div class='head'>diff --git a/drivers/media/radio/radio-gemtek.c b/drivers/media/radio/radio-gemtek.c<br/>index 2e639ce6f256..235c0e349820 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/radio-gemtek.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/radio-gemtek.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/radio-gemtek.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-gemtek.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;	/* kernel radio structs		*/</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;		/* outb, outb_p			*/</div><div class='add'>+#include &lt;linux/pnp.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='hunk'>@@ -283,6 +284,16 @@ static const struct radio_isa_ops gemtek_ops = {</div><div class='ctx'> </div><div class='ctx'> static const int gemtek_ioports[] = { 0x20c, 0x30c, 0x24c, 0x34c, 0x248, 0x28c };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PNP</div><div class='add'>+static struct pnp_device_id gemtek_pnp_devices[] = {</div><div class='add'>+	/* AOpen FX-3D/Pro Radio */</div><div class='add'>+	{.id = "ADS7183", .driver_data = 0},</div><div class='add'>+	{.id = ""}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(pnp, gemtek_pnp_devices);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct radio_isa_driver gemtek_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.match		= radio_isa_match,</div><div class='hunk'>@@ -292,6 +303,14 @@ static struct radio_isa_driver gemtek_driver = {</div><div class='ctx'> 			.name	= "radio-gemtek",</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='add'>+#ifdef CONFIG_PNP</div><div class='add'>+	.pnp_driver = {</div><div class='add'>+		.name		= "radio-gemtek",</div><div class='add'>+		.id_table	= gemtek_pnp_devices,</div><div class='add'>+		.probe		= radio_isa_pnp_probe,</div><div class='add'>+		.remove		= radio_isa_pnp_remove,</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='ctx'> 	.io_params = io,</div><div class='ctx'> 	.radio_nr_params = radio_nr,</div><div class='ctx'> 	.io_ports = gemtek_ioports,</div><div class='hunk'>@@ -305,12 +324,18 @@ static struct radio_isa_driver gemtek_driver = {</div><div class='ctx'> static int __init gemtek_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	gemtek_driver.probe = probe;</div><div class='add'>+#ifdef CONFIG_PNP</div><div class='add'>+	pnp_register_driver(&amp;gemtek_driver.pnp_driver);</div><div class='add'>+#endif</div><div class='ctx'> 	return isa_register_driver(&amp;gemtek_driver.driver, GEMTEK_MAX);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit gemtek_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	hardmute = 1;	/* Turn off PLL */</div><div class='add'>+#ifdef CONFIG_PNP</div><div class='add'>+	pnp_unregister_driver(&amp;gemtek_driver.pnp_driver);</div><div class='add'>+#endif</div><div class='ctx'> 	isa_unregister_driver(&amp;gemtek_driver.driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/radio/radio-isa.c b/drivers/media/radio/radio-isa.c<br/>index 06f906351fad..3c0067de4324 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/radio-isa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/radio-isa.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/radio-isa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-isa.c</a></div><div class='hunk'>@@ -150,14 +150,6 @@ static int radio_isa_log_status(struct file *file, void *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int radio_isa_subscribe_event(struct v4l2_fh *fh,</div><div class='del'>-				struct v4l2_event_subscription *sub)</div><div class='del'>-{</div><div class='del'>-	if (sub-&gt;type == V4L2_EVENT_CTRL)</div><div class='del'>-		return v4l2_event_subscribe(fh, sub, 0);</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct v4l2_ctrl_ops radio_isa_ctrl_ops = {</div><div class='ctx'> 	.s_ctrl = radio_isa_s_ctrl,</div><div class='ctx'> };</div><div class='hunk'>@@ -177,7 +169,7 @@ static const struct v4l2_ioctl_ops radio_isa_ioctl_ops = {</div><div class='ctx'> 	.vidioc_g_frequency = radio_isa_g_frequency,</div><div class='ctx'> 	.vidioc_s_frequency = radio_isa_s_frequency,</div><div class='ctx'> 	.vidioc_log_status  = radio_isa_log_status,</div><div class='del'>-	.vidioc_subscribe_event   = radio_isa_subscribe_event,</div><div class='add'>+	.vidioc_subscribe_event   = v4l2_ctrl_subscribe_event,</div><div class='ctx'> 	.vidioc_unsubscribe_event = v4l2_event_unsubscribe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -199,56 +191,31 @@ static bool radio_isa_valid_io(const struct radio_isa_driver *drv, int io)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int radio_isa_probe(struct device *pdev, unsigned int dev)</div><div class='add'>+struct radio_isa_card *radio_isa_alloc(struct radio_isa_driver *drv,</div><div class='add'>+				struct device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct radio_isa_driver *drv = pdev-&gt;platform_data;</div><div class='del'>-	const struct radio_isa_ops *ops = drv-&gt;ops;</div><div class='ctx'> 	struct v4l2_device *v4l2_dev;</div><div class='del'>-	struct radio_isa_card *isa;</div><div class='del'>-	int res;</div><div class='add'>+	struct radio_isa_card *isa = drv-&gt;ops-&gt;alloc();</div><div class='add'>+	if (!isa)</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='del'>-	isa = drv-&gt;ops-&gt;alloc();</div><div class='del'>-	if (isa == NULL)</div><div class='del'>-		return -ENOMEM;</div><div class='ctx'> 	dev_set_drvdata(pdev, isa);</div><div class='ctx'> 	isa-&gt;drv = drv;</div><div class='del'>-	isa-&gt;io = drv-&gt;io_params[dev];</div><div class='ctx'> 	v4l2_dev = &amp;isa-&gt;v4l2_dev;</div><div class='ctx'> 	strlcpy(v4l2_dev-&gt;name, dev_name(pdev), sizeof(v4l2_dev-&gt;name));</div><div class='ctx'> </div><div class='del'>-	if (drv-&gt;probe &amp;&amp; ops-&gt;probe) {</div><div class='del'>-		int i;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; drv-&gt;num_of_io_ports; ++i) {</div><div class='del'>-			int io = drv-&gt;io_ports[i];</div><div class='del'>-</div><div class='del'>-			if (request_region(io, drv-&gt;region_size, v4l2_dev-&gt;name)) {</div><div class='del'>-				bool found = ops-&gt;probe(isa, io);</div><div class='del'>-</div><div class='del'>-				release_region(io, drv-&gt;region_size);</div><div class='del'>-				if (found) {</div><div class='del'>-					isa-&gt;io = io;</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!radio_isa_valid_io(drv, isa-&gt;io)) {</div><div class='del'>-		int i;</div><div class='add'>+	return isa;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (isa-&gt;io &lt; 0)</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		v4l2_err(v4l2_dev, "you must set an I/O address with io=0x%03x",</div><div class='del'>-				drv-&gt;io_ports[0]);</div><div class='del'>-		for (i = 1; i &lt; drv-&gt;num_of_io_ports; i++)</div><div class='del'>-			printk(KERN_CONT "/0x%03x", drv-&gt;io_ports[i]);</div><div class='del'>-		printk(KERN_CONT ".\n");</div><div class='del'>-		kfree(isa);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+int radio_isa_common_probe(struct radio_isa_card *isa, struct device *pdev,</div><div class='add'>+				int radio_nr, unsigned region_size)</div><div class='add'>+{</div><div class='add'>+	const struct radio_isa_driver *drv = isa-&gt;drv;</div><div class='add'>+	const struct radio_isa_ops *ops = drv-&gt;ops;</div><div class='add'>+	struct v4l2_device *v4l2_dev = &amp;isa-&gt;v4l2_dev;</div><div class='add'>+	int res;</div><div class='ctx'> </div><div class='del'>-	if (!request_region(isa-&gt;io, drv-&gt;region_size, v4l2_dev-&gt;name)) {</div><div class='add'>+	if (!request_region(isa-&gt;io, region_size, v4l2_dev-&gt;name)) {</div><div class='ctx'> 		v4l2_err(v4l2_dev, "port 0x%x already in use\n", isa-&gt;io);</div><div class='ctx'> 		kfree(isa);</div><div class='ctx'> 		return -EBUSY;</div><div class='hunk'>@@ -299,42 +266,126 @@ int radio_isa_probe(struct device *pdev, unsigned int dev)</div><div class='ctx'> 		res = ops-&gt;s_stereo(isa, isa-&gt;stereo);</div><div class='ctx'> 	if (res &lt; 0) {</div><div class='ctx'> 		v4l2_err(v4l2_dev, "Could not setup card\n");</div><div class='del'>-		goto err_node_reg;</div><div class='add'>+		goto err_hdl;</div><div class='ctx'> 	}</div><div class='del'>-	res = video_register_device(&amp;isa-&gt;vdev, VFL_TYPE_RADIO,</div><div class='del'>-					drv-&gt;radio_nr_params[dev]);</div><div class='add'>+	res = video_register_device(&amp;isa-&gt;vdev, VFL_TYPE_RADIO, radio_nr);</div><div class='add'>+</div><div class='ctx'> 	if (res &lt; 0) {</div><div class='ctx'> 		v4l2_err(v4l2_dev, "Could not register device node\n");</div><div class='del'>-		goto err_node_reg;</div><div class='add'>+		goto err_hdl;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	v4l2_info(v4l2_dev, "Initialized radio card %s on port 0x%03x\n",</div><div class='ctx'> 			drv-&gt;card, isa-&gt;io);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_node_reg:</div><div class='del'>-	v4l2_ctrl_handler_free(&amp;isa-&gt;hdl);</div><div class='ctx'> err_hdl:</div><div class='del'>-	v4l2_device_unregister(&amp;isa-&gt;v4l2_dev);</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;isa-&gt;hdl);</div><div class='ctx'> err_dev_reg:</div><div class='del'>-	release_region(isa-&gt;io, drv-&gt;region_size);</div><div class='add'>+	release_region(isa-&gt;io, region_size);</div><div class='ctx'> 	kfree(isa);</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(radio_isa_probe);</div><div class='ctx'> </div><div class='del'>-int radio_isa_remove(struct device *pdev, unsigned int dev)</div><div class='add'>+int radio_isa_common_remove(struct radio_isa_card *isa, unsigned region_size)</div><div class='ctx'> {</div><div class='del'>-	struct radio_isa_card *isa = dev_get_drvdata(pdev);</div><div class='ctx'> 	const struct radio_isa_ops *ops = isa-&gt;drv-&gt;ops;</div><div class='ctx'> </div><div class='ctx'> 	ops-&gt;s_mute_volume(isa, true, isa-&gt;volume ? isa-&gt;volume-&gt;cur.val : 0);</div><div class='ctx'> 	video_unregister_device(&amp;isa-&gt;vdev);</div><div class='ctx'> 	v4l2_ctrl_handler_free(&amp;isa-&gt;hdl);</div><div class='ctx'> 	v4l2_device_unregister(&amp;isa-&gt;v4l2_dev);</div><div class='del'>-	release_region(isa-&gt;io, isa-&gt;drv-&gt;region_size);</div><div class='add'>+	release_region(isa-&gt;io, region_size);</div><div class='ctx'> 	v4l2_info(&amp;isa-&gt;v4l2_dev, "Removed radio card %s\n", isa-&gt;drv-&gt;card);</div><div class='ctx'> 	kfree(isa);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int radio_isa_probe(struct device *pdev, unsigned int dev)</div><div class='add'>+{</div><div class='add'>+	struct radio_isa_driver *drv = pdev-&gt;platform_data;</div><div class='add'>+	const struct radio_isa_ops *ops = drv-&gt;ops;</div><div class='add'>+	struct v4l2_device *v4l2_dev;</div><div class='add'>+	struct radio_isa_card *isa;</div><div class='add'>+</div><div class='add'>+	isa = radio_isa_alloc(drv, pdev);</div><div class='add'>+	if (!isa)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	isa-&gt;io = drv-&gt;io_params[dev];</div><div class='add'>+	v4l2_dev = &amp;isa-&gt;v4l2_dev;</div><div class='add'>+</div><div class='add'>+	if (drv-&gt;probe &amp;&amp; ops-&gt;probe) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; drv-&gt;num_of_io_ports; ++i) {</div><div class='add'>+			int io = drv-&gt;io_ports[i];</div><div class='add'>+</div><div class='add'>+			if (request_region(io, drv-&gt;region_size, v4l2_dev-&gt;name)) {</div><div class='add'>+				bool found = ops-&gt;probe(isa, io);</div><div class='add'>+</div><div class='add'>+				release_region(io, drv-&gt;region_size);</div><div class='add'>+				if (found) {</div><div class='add'>+					isa-&gt;io = io;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!radio_isa_valid_io(drv, isa-&gt;io)) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		if (isa-&gt;io &lt; 0)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		v4l2_err(v4l2_dev, "you must set an I/O address with io=0x%03x",</div><div class='add'>+				drv-&gt;io_ports[0]);</div><div class='add'>+		for (i = 1; i &lt; drv-&gt;num_of_io_ports; i++)</div><div class='add'>+			printk(KERN_CONT "/0x%03x", drv-&gt;io_ports[i]);</div><div class='add'>+		printk(KERN_CONT ".\n");</div><div class='add'>+		kfree(isa);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return radio_isa_common_probe(isa, pdev, drv-&gt;radio_nr_params[dev],</div><div class='add'>+					drv-&gt;region_size);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(radio_isa_probe);</div><div class='add'>+</div><div class='add'>+int radio_isa_remove(struct device *pdev, unsigned int dev)</div><div class='add'>+{</div><div class='add'>+	struct radio_isa_card *isa = dev_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	return radio_isa_common_remove(isa, isa-&gt;drv-&gt;region_size);</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL_GPL(radio_isa_remove);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PNP</div><div class='add'>+int radio_isa_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct pnp_driver *pnp_drv = to_pnp_driver(dev-&gt;dev.driver);</div><div class='add'>+	struct radio_isa_driver *drv = container_of(pnp_drv,</div><div class='add'>+					struct radio_isa_driver, pnp_driver);</div><div class='add'>+	struct radio_isa_card *isa;</div><div class='add'>+</div><div class='add'>+	if (!pnp_port_valid(dev, 0))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	isa = radio_isa_alloc(drv, &amp;dev-&gt;dev);</div><div class='add'>+	if (!isa)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	isa-&gt;io = pnp_port_start(dev, 0);</div><div class='add'>+</div><div class='add'>+	return radio_isa_common_probe(isa, &amp;dev-&gt;dev, drv-&gt;radio_nr_params[0],</div><div class='add'>+					pnp_port_len(dev, 0));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(radio_isa_pnp_probe);</div><div class='add'>+</div><div class='add'>+void radio_isa_pnp_remove(struct pnp_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct radio_isa_card *isa = dev_get_drvdata(&amp;dev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	radio_isa_common_remove(isa, pnp_port_len(dev, 0));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(radio_isa_pnp_remove);</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/media/radio/radio-isa.h b/drivers/media/radio/radio-isa.h<br/>index 8a0ea84d86de..ba4c01f1bd0c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/radio-isa.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/radio-isa.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/radio-isa.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-isa.h</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #define _RADIO_ISA_H_</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/isa.h&gt;</div><div class='add'>+#include &lt;linux/pnp.h&gt;</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ctrls.h&gt;</div><div class='hunk'>@@ -76,6 +77,9 @@ struct radio_isa_ops {</div><div class='ctx'> /* Top level structure needed to instantiate the cards */</div><div class='ctx'> struct radio_isa_driver {</div><div class='ctx'> 	struct isa_driver driver;</div><div class='add'>+#ifdef CONFIG_PNP</div><div class='add'>+	struct pnp_driver pnp_driver;</div><div class='add'>+#endif</div><div class='ctx'> 	const struct radio_isa_ops *ops;</div><div class='ctx'> 	/* The module_param_array with the specified I/O ports */</div><div class='ctx'> 	int *io_params;</div><div class='hunk'>@@ -101,5 +105,10 @@ struct radio_isa_driver {</div><div class='ctx'> int radio_isa_match(struct device *pdev, unsigned int dev);</div><div class='ctx'> int radio_isa_probe(struct device *pdev, unsigned int dev);</div><div class='ctx'> int radio_isa_remove(struct device *pdev, unsigned int dev);</div><div class='add'>+#ifdef CONFIG_PNP</div><div class='add'>+int radio_isa_pnp_probe(struct pnp_dev *dev,</div><div class='add'>+			const struct pnp_device_id *dev_id);</div><div class='add'>+void radio_isa_pnp_remove(struct pnp_dev *dev);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/media/radio/radio-keene.c b/drivers/media/radio/radio-keene.c<br/>index 55bd1d2937c8..79adf3e654e5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/radio-keene.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/radio-keene.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/radio-keene.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-keene.c</a></div><div class='hunk'>@@ -28,7 +28,6 @@</div><div class='ctx'> #include &lt;media/v4l2-ctrls.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-event.h&gt;</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='del'>-#include &lt;linux/version.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* driver and module definitions */</div><div class='hunk'>@@ -149,7 +148,6 @@ static void usb_keene_disconnect(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct keene_device *radio = to_keene_dev(usb_get_intfdata(intf));</div><div class='ctx'> </div><div class='del'>-	v4l2_device_get(&amp;radio-&gt;v4l2_dev);</div><div class='ctx'> 	mutex_lock(&amp;radio-&gt;lock);</div><div class='ctx'> 	usb_set_intfdata(intf, NULL);</div><div class='ctx'> 	video_unregister_device(&amp;radio-&gt;vdev);</div><div class='hunk'>@@ -158,6 +156,23 @@ static void usb_keene_disconnect(struct usb_interface *intf)</div><div class='ctx'> 	v4l2_device_put(&amp;radio-&gt;v4l2_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int usb_keene_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='add'>+{</div><div class='add'>+	struct keene_device *radio = to_keene_dev(usb_get_intfdata(intf));</div><div class='add'>+</div><div class='add'>+	return keene_cmd_main(radio, 0, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int usb_keene_resume(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	struct keene_device *radio = to_keene_dev(usb_get_intfdata(intf));</div><div class='add'>+</div><div class='add'>+	mdelay(50);</div><div class='add'>+	keene_cmd_set(radio);</div><div class='add'>+	keene_cmd_main(radio, radio-&gt;curfreq, true);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int vidioc_querycap(struct file *file, void *priv,</div><div class='ctx'> 					struct v4l2_capability *v)</div><div class='ctx'> {</div><div class='hunk'>@@ -256,18 +271,6 @@ static int keene_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vidioc_subscribe_event(struct v4l2_fh *fh,</div><div class='del'>-				struct v4l2_event_subscription *sub)</div><div class='del'>-{</div><div class='del'>-	switch (sub-&gt;type) {</div><div class='del'>-	case V4L2_EVENT_CTRL:</div><div class='del'>-		return v4l2_event_subscribe(fh, sub, 0);</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /* File system interface */</div><div class='ctx'> static const struct v4l2_file_operations usb_keene_fops = {</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='hunk'>@@ -288,7 +291,7 @@ static const struct v4l2_ioctl_ops usb_keene_ioctl_ops = {</div><div class='ctx'> 	.vidioc_g_frequency = vidioc_g_frequency,</div><div class='ctx'> 	.vidioc_s_frequency = vidioc_s_frequency,</div><div class='ctx'> 	.vidioc_log_status = v4l2_ctrl_log_status,</div><div class='del'>-	.vidioc_subscribe_event = vidioc_subscribe_event,</div><div class='add'>+	.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,</div><div class='ctx'> 	.vidioc_unsubscribe_event = v4l2_event_unsubscribe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -404,6 +407,9 @@ static struct usb_driver usb_keene_driver = {</div><div class='ctx'> 	.probe			= usb_keene_probe,</div><div class='ctx'> 	.disconnect		= usb_keene_disconnect,</div><div class='ctx'> 	.id_table		= usb_keene_device_table,</div><div class='add'>+	.suspend		= usb_keene_suspend,</div><div class='add'>+	.resume			= usb_keene_resume,</div><div class='add'>+	.reset_resume		= usb_keene_resume,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init keene_init(void)</div><div class='head'>diff --git a/drivers/media/radio/radio-mr800.c b/drivers/media/radio/radio-mr800.c<br/>index a860a72a58ec..94cb6bc690f5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/radio-mr800.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/radio-mr800.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/radio-mr800.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-mr800.c</a></div><div class='hunk'>@@ -62,6 +62,8 @@</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -101,12 +103,17 @@ devices, that would be 76 and 91.  */</div><div class='ctx'>  * List isn't full and will be updated with implementation of new functions</div><div class='ctx'>  */</div><div class='ctx'> #define AMRADIO_SET_FREQ	0xa4</div><div class='add'>+#define AMRADIO_GET_READY_FLAG	0xa5</div><div class='add'>+#define AMRADIO_GET_SIGNAL	0xa7</div><div class='add'>+#define AMRADIO_GET_FREQ	0xa8</div><div class='add'>+#define AMRADIO_SET_SEARCH_UP	0xa9</div><div class='add'>+#define AMRADIO_SET_SEARCH_DOWN	0xaa</div><div class='ctx'> #define AMRADIO_SET_MUTE	0xab</div><div class='add'>+#define AMRADIO_SET_RIGHT_MUTE	0xac</div><div class='add'>+#define AMRADIO_SET_LEFT_MUTE	0xad</div><div class='ctx'> #define AMRADIO_SET_MONO	0xae</div><div class='del'>-</div><div class='del'>-/* Comfortable defines for amradio_set_mute */</div><div class='del'>-#define AMRADIO_START		0x00</div><div class='del'>-#define AMRADIO_STOP		0x01</div><div class='add'>+#define AMRADIO_SET_SEARCH_LVL	0xb0</div><div class='add'>+#define AMRADIO_STOP_SEARCH	0xb1</div><div class='ctx'> </div><div class='ctx'> /* Comfortable defines for amradio_set_stereo */</div><div class='ctx'> #define WANT_STEREO		0x00</div><div class='hunk'>@@ -117,29 +124,20 @@ static int radio_nr = -1;</div><div class='ctx'> module_param(radio_nr, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(radio_nr, "Radio Nr");</div><div class='ctx'> </div><div class='del'>-static int usb_amradio_probe(struct usb_interface *intf,</div><div class='del'>-			     const struct usb_device_id *id);</div><div class='del'>-static void usb_amradio_disconnect(struct usb_interface *intf);</div><div class='del'>-static int usb_amradio_open(struct file *file);</div><div class='del'>-static int usb_amradio_close(struct file *file);</div><div class='del'>-static int usb_amradio_suspend(struct usb_interface *intf,</div><div class='del'>-				pm_message_t message);</div><div class='del'>-static int usb_amradio_resume(struct usb_interface *intf);</div><div class='del'>-</div><div class='ctx'> /* Data for one (physical) device */</div><div class='ctx'> struct amradio_device {</div><div class='ctx'> 	/* reference to USB and video device */</div><div class='ctx'> 	struct usb_device *usbdev;</div><div class='ctx'> 	struct usb_interface *intf;</div><div class='del'>-	struct video_device videodev;</div><div class='add'>+	struct video_device vdev;</div><div class='ctx'> 	struct v4l2_device v4l2_dev;</div><div class='add'>+	struct v4l2_ctrl_handler hdl;</div><div class='ctx'> </div><div class='del'>-	unsigned char *buffer;</div><div class='add'>+	u8 *buffer;</div><div class='ctx'> 	struct mutex lock;	/* buffer locking */</div><div class='ctx'> 	int curfreq;</div><div class='ctx'> 	int stereo;</div><div class='ctx'> 	int muted;</div><div class='del'>-	int initialized;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline struct amradio_device *to_amradio_dev(struct v4l2_device *v4l2_dev)</div><div class='hunk'>@@ -147,29 +145,8 @@ static inline struct amradio_device *to_amradio_dev(struct v4l2_device *v4l2_dev</div><div class='ctx'> 	return container_of(v4l2_dev, struct amradio_device, v4l2_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* USB Device ID List */</div><div class='del'>-static struct usb_device_id usb_amradio_device_table[] = {</div><div class='del'>-	{USB_DEVICE_AND_INTERFACE_INFO(USB_AMRADIO_VENDOR, USB_AMRADIO_PRODUCT,</div><div class='del'>-							USB_CLASS_HID, 0, 0) },</div><div class='del'>-	{ }						/* Terminating entry */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-MODULE_DEVICE_TABLE(usb, usb_amradio_device_table);</div><div class='del'>-</div><div class='del'>-/* USB subsystem interface */</div><div class='del'>-static struct usb_driver usb_amradio_driver = {</div><div class='del'>-	.name			= MR800_DRIVER_NAME,</div><div class='del'>-	.probe			= usb_amradio_probe,</div><div class='del'>-	.disconnect		= usb_amradio_disconnect,</div><div class='del'>-	.suspend		= usb_amradio_suspend,</div><div class='del'>-	.resume			= usb_amradio_resume,</div><div class='del'>-	.reset_resume		= usb_amradio_resume,</div><div class='del'>-	.id_table		= usb_amradio_device_table,</div><div class='del'>-	.supports_autosuspend	= 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* switch on/off the radio. Send 8 bytes to device */</div><div class='del'>-static int amradio_set_mute(struct amradio_device *radio, char argument)</div><div class='add'>+static int amradio_send_cmd(struct amradio_device *radio, u8 cmd, u8 arg,</div><div class='add'>+		u8 *extra, u8 extralen, bool reply)</div><div class='ctx'> {</div><div class='ctx'> 	int retval;</div><div class='ctx'> 	int size;</div><div class='hunk'>@@ -177,99 +154,92 @@ static int amradio_set_mute(struct amradio_device *radio, char argument)</div><div class='ctx'> 	radio-&gt;buffer[0] = 0x00;</div><div class='ctx'> 	radio-&gt;buffer[1] = 0x55;</div><div class='ctx'> 	radio-&gt;buffer[2] = 0xaa;</div><div class='del'>-	radio-&gt;buffer[3] = 0x00;</div><div class='del'>-	radio-&gt;buffer[4] = AMRADIO_SET_MUTE;</div><div class='del'>-	radio-&gt;buffer[5] = argument;</div><div class='add'>+	radio-&gt;buffer[3] = extralen;</div><div class='add'>+	radio-&gt;buffer[4] = cmd;</div><div class='add'>+	radio-&gt;buffer[5] = arg;</div><div class='ctx'> 	radio-&gt;buffer[6] = 0x00;</div><div class='del'>-	radio-&gt;buffer[7] = 0x00;</div><div class='add'>+	radio-&gt;buffer[7] = extra || reply ? 8 : 0;</div><div class='ctx'> </div><div class='ctx'> 	retval = usb_bulk_msg(radio-&gt;usbdev, usb_sndintpipe(radio-&gt;usbdev, 2),</div><div class='del'>-		(void *) (radio-&gt;buffer), BUFFER_LENGTH, &amp;size, USB_TIMEOUT);</div><div class='add'>+		radio-&gt;buffer, BUFFER_LENGTH, &amp;size, USB_TIMEOUT);</div><div class='ctx'> </div><div class='ctx'> 	if (retval &lt; 0 || size != BUFFER_LENGTH) {</div><div class='del'>-		amradio_dev_warn(&amp;radio-&gt;videodev.dev, "set mute failed\n");</div><div class='del'>-		return retval;</div><div class='add'>+		if (video_is_registered(&amp;radio-&gt;vdev))</div><div class='add'>+			amradio_dev_warn(&amp;radio-&gt;vdev.dev,</div><div class='add'>+					"cmd %02x failed\n", cmd);</div><div class='add'>+		return retval ? retval : -EIO;</div><div class='ctx'> 	}</div><div class='add'>+	if (!extra &amp;&amp; !reply)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	radio-&gt;muted = argument;</div><div class='add'>+	if (extra) {</div><div class='add'>+		memcpy(radio-&gt;buffer, extra, extralen);</div><div class='add'>+		memset(radio-&gt;buffer + extralen, 0, 8 - extralen);</div><div class='add'>+		retval = usb_bulk_msg(radio-&gt;usbdev, usb_sndintpipe(radio-&gt;usbdev, 2),</div><div class='add'>+			radio-&gt;buffer, BUFFER_LENGTH, &amp;size, USB_TIMEOUT);</div><div class='add'>+	} else {</div><div class='add'>+		memset(radio-&gt;buffer, 0, 8);</div><div class='add'>+		retval = usb_bulk_msg(radio-&gt;usbdev, usb_rcvbulkpipe(radio-&gt;usbdev, 0x81),</div><div class='add'>+			radio-&gt;buffer, BUFFER_LENGTH, &amp;size, USB_TIMEOUT);</div><div class='add'>+	}</div><div class='add'>+	if (retval == 0 &amp;&amp; size == BUFFER_LENGTH)</div><div class='add'>+		return 0;</div><div class='add'>+	if (video_is_registered(&amp;radio-&gt;vdev) &amp;&amp; cmd != AMRADIO_GET_READY_FLAG)</div><div class='add'>+		amradio_dev_warn(&amp;radio-&gt;vdev.dev, "follow-up to cmd %02x failed\n", cmd);</div><div class='add'>+	return retval ? retval : -EIO;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return retval;</div><div class='add'>+/* switch on/off the radio. Send 8 bytes to device */</div><div class='add'>+static int amradio_set_mute(struct amradio_device *radio, bool mute)</div><div class='add'>+{</div><div class='add'>+	int ret = amradio_send_cmd(radio,</div><div class='add'>+			AMRADIO_SET_MUTE, mute, NULL, 0, false);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		radio-&gt;muted = mute;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* set a frequency, freq is defined by v4l's TUNER_LOW, i.e. 1/16th kHz */</div><div class='del'>-static int amradio_setfreq(struct amradio_device *radio, int freq)</div><div class='add'>+static int amradio_set_freq(struct amradio_device *radio, int freq)</div><div class='ctx'> {</div><div class='del'>-	int retval;</div><div class='del'>-	int size;</div><div class='ctx'> 	unsigned short freq_send = 0x10 + (freq &gt;&gt; 3) / 25;</div><div class='del'>-</div><div class='del'>-	radio-&gt;buffer[0] = 0x00;</div><div class='del'>-	radio-&gt;buffer[1] = 0x55;</div><div class='del'>-	radio-&gt;buffer[2] = 0xaa;</div><div class='del'>-	radio-&gt;buffer[3] = 0x03;</div><div class='del'>-	radio-&gt;buffer[4] = AMRADIO_SET_FREQ;</div><div class='del'>-	radio-&gt;buffer[5] = 0x00;</div><div class='del'>-	radio-&gt;buffer[6] = 0x00;</div><div class='del'>-	radio-&gt;buffer[7] = 0x08;</div><div class='del'>-</div><div class='del'>-	retval = usb_bulk_msg(radio-&gt;usbdev, usb_sndintpipe(radio-&gt;usbdev, 2),</div><div class='del'>-		(void *) (radio-&gt;buffer), BUFFER_LENGTH, &amp;size, USB_TIMEOUT);</div><div class='del'>-</div><div class='del'>-	if (retval &lt; 0 || size != BUFFER_LENGTH)</div><div class='del'>-		goto out_err;</div><div class='add'>+	u8 buf[3];</div><div class='add'>+	int retval;</div><div class='ctx'> </div><div class='ctx'> 	/* frequency is calculated from freq_send and placed in first 2 bytes */</div><div class='del'>-	radio-&gt;buffer[0] = (freq_send &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-	radio-&gt;buffer[1] = freq_send &amp; 0xff;</div><div class='del'>-	radio-&gt;buffer[2] = 0x01;</div><div class='del'>-	radio-&gt;buffer[3] = 0x00;</div><div class='del'>-	radio-&gt;buffer[4] = 0x00;</div><div class='del'>-	/* 5 and 6 bytes of buffer already = 0x00 */</div><div class='del'>-	radio-&gt;buffer[7] = 0x00;</div><div class='del'>-</div><div class='del'>-	retval = usb_bulk_msg(radio-&gt;usbdev, usb_sndintpipe(radio-&gt;usbdev, 2),</div><div class='del'>-		(void *) (radio-&gt;buffer), BUFFER_LENGTH, &amp;size, USB_TIMEOUT);</div><div class='del'>-</div><div class='del'>-	if (retval &lt; 0 || size != BUFFER_LENGTH)</div><div class='del'>-		goto out_err;</div><div class='add'>+	buf[0] = (freq_send &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	buf[1] = freq_send &amp; 0xff;</div><div class='add'>+	buf[2] = 0x01;</div><div class='ctx'> </div><div class='add'>+	retval = amradio_send_cmd(radio, AMRADIO_SET_FREQ, 0, buf, 3, false);</div><div class='add'>+	if (retval)</div><div class='add'>+		return retval;</div><div class='ctx'> 	radio-&gt;curfreq = freq;</div><div class='del'>-	goto out;</div><div class='del'>-</div><div class='del'>-out_err:</div><div class='del'>-	amradio_dev_warn(&amp;radio-&gt;videodev.dev, "set frequency failed\n");</div><div class='del'>-out:</div><div class='del'>-	return retval;</div><div class='add'>+	msleep(40);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int amradio_set_stereo(struct amradio_device *radio, char argument)</div><div class='add'>+static int amradio_set_stereo(struct amradio_device *radio, bool stereo)</div><div class='ctx'> {</div><div class='del'>-	int retval;</div><div class='del'>-	int size;</div><div class='add'>+	int ret = amradio_send_cmd(radio,</div><div class='add'>+			AMRADIO_SET_MONO, !stereo, NULL, 0, false);</div><div class='ctx'> </div><div class='del'>-	radio-&gt;buffer[0] = 0x00;</div><div class='del'>-	radio-&gt;buffer[1] = 0x55;</div><div class='del'>-	radio-&gt;buffer[2] = 0xaa;</div><div class='del'>-	radio-&gt;buffer[3] = 0x00;</div><div class='del'>-	radio-&gt;buffer[4] = AMRADIO_SET_MONO;</div><div class='del'>-	radio-&gt;buffer[5] = argument;</div><div class='del'>-	radio-&gt;buffer[6] = 0x00;</div><div class='del'>-	radio-&gt;buffer[7] = 0x00;</div><div class='del'>-</div><div class='del'>-	retval = usb_bulk_msg(radio-&gt;usbdev, usb_sndintpipe(radio-&gt;usbdev, 2),</div><div class='del'>-		(void *) (radio-&gt;buffer), BUFFER_LENGTH, &amp;size, USB_TIMEOUT);</div><div class='del'>-</div><div class='del'>-	if (retval &lt; 0 || size != BUFFER_LENGTH) {</div><div class='del'>-		amradio_dev_warn(&amp;radio-&gt;videodev.dev, "set stereo failed\n");</div><div class='del'>-		return retval;</div><div class='del'>-	}</div><div class='add'>+	if (!ret)</div><div class='add'>+		radio-&gt;stereo = stereo;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (argument == WANT_STEREO)</div><div class='del'>-		radio-&gt;stereo = 1;</div><div class='del'>-	else</div><div class='del'>-		radio-&gt;stereo = 0;</div><div class='add'>+static int amradio_get_stat(struct amradio_device *radio, bool *is_stereo, u32 *signal)</div><div class='add'>+{</div><div class='add'>+	int ret = amradio_send_cmd(radio,</div><div class='add'>+			AMRADIO_GET_SIGNAL, 0, NULL, 0, true);</div><div class='ctx'> </div><div class='del'>-	return retval;</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	*is_stereo = radio-&gt;buffer[2] &gt;&gt; 7;</div><div class='add'>+	*signal = (radio-&gt;buffer[3] &amp; 0xf0) &lt;&lt; 8;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Handle unplugging the device.</div><div class='hunk'>@@ -282,25 +252,26 @@ static void usb_amradio_disconnect(struct usb_interface *intf)</div><div class='ctx'> 	struct amradio_device *radio = to_amradio_dev(usb_get_intfdata(intf));</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	/* increase the device node's refcount */</div><div class='del'>-	get_device(&amp;radio-&gt;videodev.dev);</div><div class='add'>+	video_unregister_device(&amp;radio-&gt;vdev);</div><div class='add'>+	amradio_set_mute(radio, true);</div><div class='add'>+	usb_set_intfdata(intf, NULL);</div><div class='ctx'> 	v4l2_device_disconnect(&amp;radio-&gt;v4l2_dev);</div><div class='del'>-	video_unregister_device(&amp;radio-&gt;videodev);</div><div class='ctx'> 	mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-	/* decrease the device node's refcount, allowing it to be released */</div><div class='del'>-	put_device(&amp;radio-&gt;videodev.dev);</div><div class='add'>+	v4l2_device_put(&amp;radio-&gt;v4l2_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* vidioc_querycap - query device capabilities */</div><div class='ctx'> static int vidioc_querycap(struct file *file, void *priv,</div><div class='ctx'> 					struct v4l2_capability *v)</div><div class='ctx'> {</div><div class='del'>-	struct amradio_device *radio = file-&gt;private_data;</div><div class='add'>+	struct amradio_device *radio = video_drvdata(file);</div><div class='ctx'> </div><div class='ctx'> 	strlcpy(v-&gt;driver, "radio-mr800", sizeof(v-&gt;driver));</div><div class='ctx'> 	strlcpy(v-&gt;card, "AverMedia MR 800 USB FM Radio", sizeof(v-&gt;card));</div><div class='ctx'> 	usb_make_path(radio-&gt;usbdev, v-&gt;bus_info, sizeof(v-&gt;bus_info));</div><div class='del'>-	v-&gt;capabilities = V4L2_CAP_TUNER;</div><div class='add'>+	v-&gt;device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER |</div><div class='add'>+					V4L2_CAP_HW_FREQ_SEEK;</div><div class='add'>+	v-&gt;capabilities = v-&gt;device_caps | V4L2_CAP_DEVICE_CAPS;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -308,44 +279,34 @@ static int vidioc_querycap(struct file *file, void *priv,</div><div class='ctx'> static int vidioc_g_tuner(struct file *file, void *priv,</div><div class='ctx'> 				struct v4l2_tuner *v)</div><div class='ctx'> {</div><div class='del'>-	struct amradio_device *radio = file-&gt;private_data;</div><div class='add'>+	struct amradio_device *radio = video_drvdata(file);</div><div class='add'>+	bool is_stereo = false;</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='ctx'> 	if (v-&gt;index &gt; 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-/* TODO: Add function which look is signal stereo or not</div><div class='del'>- * 	amradio_getstat(radio);</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* we call amradio_set_stereo to set radio-&gt;stereo</div><div class='del'>- * Honestly, amradio_getstat should cover this in future and</div><div class='del'>- * amradio_set_stereo shouldn't be here</div><div class='del'>- */</div><div class='del'>-	retval = amradio_set_stereo(radio, WANT_STEREO);</div><div class='add'>+	v-&gt;signal = 0;</div><div class='add'>+	retval = amradio_get_stat(radio, &amp;is_stereo, &amp;v-&gt;signal);</div><div class='add'>+	if (retval)</div><div class='add'>+		return retval;</div><div class='ctx'> </div><div class='ctx'> 	strcpy(v-&gt;name, "FM");</div><div class='ctx'> 	v-&gt;type = V4L2_TUNER_RADIO;</div><div class='ctx'> 	v-&gt;rangelow = FREQ_MIN * FREQ_MUL;</div><div class='ctx'> 	v-&gt;rangehigh = FREQ_MAX * FREQ_MUL;</div><div class='del'>-	v-&gt;rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;</div><div class='del'>-	v-&gt;capability = V4L2_TUNER_CAP_LOW;</div><div class='del'>-	if (radio-&gt;stereo)</div><div class='del'>-		v-&gt;audmode = V4L2_TUNER_MODE_STEREO;</div><div class='del'>-	else</div><div class='del'>-		v-&gt;audmode = V4L2_TUNER_MODE_MONO;</div><div class='del'>-	v-&gt;signal = 0xffff;     /* Can't get the signal strength, sad.. */</div><div class='del'>-	v-&gt;afc = 0; /* Don't know what is this */</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='add'>+	v-&gt;capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO;</div><div class='add'>+	v-&gt;rxsubchans = is_stereo ? V4L2_TUNER_SUB_STEREO : V4L2_TUNER_SUB_MONO;</div><div class='add'>+	v-&gt;audmode = radio-&gt;stereo ?</div><div class='add'>+		V4L2_TUNER_MODE_STEREO : V4L2_TUNER_MODE_MONO;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* vidioc_s_tuner - set tuner attributes */</div><div class='ctx'> static int vidioc_s_tuner(struct file *file, void *priv,</div><div class='ctx'> 				struct v4l2_tuner *v)</div><div class='ctx'> {</div><div class='del'>-	struct amradio_device *radio = file-&gt;private_data;</div><div class='del'>-	int retval = -EINVAL;</div><div class='add'>+	struct amradio_device *radio = video_drvdata(file);</div><div class='ctx'> </div><div class='ctx'> 	if (v-&gt;index &gt; 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -353,34 +314,31 @@ static int vidioc_s_tuner(struct file *file, void *priv,</div><div class='ctx'> 	/* mono/stereo selector */</div><div class='ctx'> 	switch (v-&gt;audmode) {</div><div class='ctx'> 	case V4L2_TUNER_MODE_MONO:</div><div class='del'>-		retval = amradio_set_stereo(radio, WANT_MONO);</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_TUNER_MODE_STEREO:</div><div class='del'>-		retval = amradio_set_stereo(radio, WANT_STEREO);</div><div class='del'>-		break;</div><div class='add'>+		return amradio_set_stereo(radio, WANT_MONO);</div><div class='add'>+	default:</div><div class='add'>+		return amradio_set_stereo(radio, WANT_STEREO);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* vidioc_s_frequency - set tuner radio frequency */</div><div class='ctx'> static int vidioc_s_frequency(struct file *file, void *priv,</div><div class='ctx'> 				struct v4l2_frequency *f)</div><div class='ctx'> {</div><div class='del'>-	struct amradio_device *radio = file-&gt;private_data;</div><div class='add'>+	struct amradio_device *radio = video_drvdata(file);</div><div class='ctx'> </div><div class='del'>-	if (f-&gt;tuner != 0 || f-&gt;type != V4L2_TUNER_RADIO)</div><div class='add'>+	if (f-&gt;tuner != 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	return amradio_setfreq(radio, f-&gt;frequency);</div><div class='add'>+	return amradio_set_freq(radio, clamp_t(unsigned, f-&gt;frequency,</div><div class='add'>+				FREQ_MIN * FREQ_MUL, FREQ_MAX * FREQ_MUL));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* vidioc_g_frequency - get tuner radio frequency */</div><div class='ctx'> static int vidioc_g_frequency(struct file *file, void *priv,</div><div class='ctx'> 				struct v4l2_frequency *f)</div><div class='ctx'> {</div><div class='del'>-	struct amradio_device *radio = file-&gt;private_data;</div><div class='add'>+	struct amradio_device *radio = video_drvdata(file);</div><div class='ctx'> </div><div class='del'>-	if (f-&gt;tuner != 0)</div><div class='add'>+	if (f-&gt;tuner != 0 || f-&gt;type != V4L2_TUNER_RADIO)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	f-&gt;type = V4L2_TUNER_RADIO;</div><div class='ctx'> 	f-&gt;frequency = radio-&gt;curfreq;</div><div class='hunk'>@@ -388,148 +346,101 @@ static int vidioc_g_frequency(struct file *file, void *priv,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* vidioc_queryctrl - enumerate control items */</div><div class='del'>-static int vidioc_queryctrl(struct file *file, void *priv,</div><div class='del'>-				struct v4l2_queryctrl *qc)</div><div class='add'>+static int vidioc_s_hw_freq_seek(struct file *file, void *priv,</div><div class='add'>+		struct v4l2_hw_freq_seek *seek)</div><div class='ctx'> {</div><div class='del'>-	switch (qc-&gt;id) {</div><div class='del'>-	case V4L2_CID_AUDIO_MUTE:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 1, 1, 1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='add'>+	static u8 buf[8] = {</div><div class='add'>+		0x3d, 0x32, 0x0f, 0x08, 0x3d, 0x32, 0x0f, 0x08</div><div class='add'>+	};</div><div class='add'>+	struct amradio_device *radio = video_drvdata(file);</div><div class='add'>+	unsigned long timeout;</div><div class='add'>+	int retval;</div><div class='ctx'> </div><div class='del'>-/* vidioc_g_ctrl - get the value of a control */</div><div class='del'>-static int vidioc_g_ctrl(struct file *file, void *priv,</div><div class='del'>-				struct v4l2_control *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct amradio_device *radio = file-&gt;private_data;</div><div class='add'>+	if (seek-&gt;tuner != 0 || !seek-&gt;wrap_around)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	switch (ctrl-&gt;id) {</div><div class='del'>-	case V4L2_CID_AUDIO_MUTE:</div><div class='del'>-		ctrl-&gt;value = radio-&gt;muted;</div><div class='del'>-		return 0;</div><div class='add'>+	retval = amradio_send_cmd(radio,</div><div class='add'>+			AMRADIO_SET_SEARCH_LVL, 0, buf, 8, false);</div><div class='add'>+	if (retval)</div><div class='add'>+		return retval;</div><div class='add'>+	amradio_set_freq(radio, radio-&gt;curfreq);</div><div class='add'>+	retval = amradio_send_cmd(radio,</div><div class='add'>+		seek-&gt;seek_upward ? AMRADIO_SET_SEARCH_UP : AMRADIO_SET_SEARCH_DOWN,</div><div class='add'>+		0, NULL, 0, false);</div><div class='add'>+	if (retval)</div><div class='add'>+		return retval;</div><div class='add'>+	timeout = jiffies + msecs_to_jiffies(30000);</div><div class='add'>+	for (;;) {</div><div class='add'>+		if (time_after(jiffies, timeout)) {</div><div class='add'>+			retval = -EAGAIN;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (schedule_timeout_interruptible(msecs_to_jiffies(10))) {</div><div class='add'>+			retval = -ERESTARTSYS;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		retval = amradio_send_cmd(radio, AMRADIO_GET_READY_FLAG,</div><div class='add'>+				0, NULL, 0, true);</div><div class='add'>+		if (retval)</div><div class='add'>+			continue;</div><div class='add'>+		amradio_send_cmd(radio, AMRADIO_GET_FREQ, 0, NULL, 0, true);</div><div class='add'>+		if (radio-&gt;buffer[1] || radio-&gt;buffer[2]) {</div><div class='add'>+			radio-&gt;curfreq = (radio-&gt;buffer[1] &lt;&lt; 8) | radio-&gt;buffer[2];</div><div class='add'>+			radio-&gt;curfreq = (radio-&gt;curfreq - 0x10) * 200;</div><div class='add'>+			amradio_send_cmd(radio, AMRADIO_STOP_SEARCH,</div><div class='add'>+					0, NULL, 0, false);</div><div class='add'>+			amradio_set_freq(radio, radio-&gt;curfreq);</div><div class='add'>+			retval = 0;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='add'>+	amradio_send_cmd(radio, AMRADIO_STOP_SEARCH, 0, NULL, 0, false);</div><div class='add'>+	amradio_set_freq(radio, radio-&gt;curfreq);</div><div class='add'>+	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* vidioc_s_ctrl - set the value of a control */</div><div class='del'>-static int vidioc_s_ctrl(struct file *file, void *priv,</div><div class='del'>-				struct v4l2_control *ctrl)</div><div class='add'>+static int usb_amradio_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='del'>-	struct amradio_device *radio = file-&gt;private_data;</div><div class='del'>-	int retval = -EINVAL;</div><div class='add'>+	struct amradio_device *radio =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct amradio_device, hdl);</div><div class='ctx'> </div><div class='ctx'> 	switch (ctrl-&gt;id) {</div><div class='ctx'> 	case V4L2_CID_AUDIO_MUTE:</div><div class='del'>-		if (ctrl-&gt;value)</div><div class='del'>-			retval = amradio_set_mute(radio, AMRADIO_STOP);</div><div class='del'>-		else</div><div class='del'>-			retval = amradio_set_mute(radio, AMRADIO_START);</div><div class='del'>-</div><div class='del'>-		break;</div><div class='add'>+		return amradio_set_mute(radio, ctrl-&gt;val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* vidioc_g_audio - get audio attributes */</div><div class='del'>-static int vidioc_g_audio(struct file *file, void *priv,</div><div class='del'>-				struct v4l2_audio *a)</div><div class='del'>-{</div><div class='del'>-	if (a-&gt;index &gt; 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	strcpy(a-&gt;name, "Radio");</div><div class='del'>-	a-&gt;capability = V4L2_AUDCAP_STEREO;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* vidioc_s_audio - set audio attributes  */</div><div class='del'>-static int vidioc_s_audio(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_audio *a)</div><div class='del'>-{</div><div class='del'>-	if (a-&gt;index != 0)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* vidioc_g_input - get input */</div><div class='del'>-static int vidioc_g_input(struct file *filp, void *priv, unsigned int *i)</div><div class='del'>-{</div><div class='del'>-	*i = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* vidioc_s_input - set input */</div><div class='del'>-static int vidioc_s_input(struct file *filp, void *priv, unsigned int i)</div><div class='del'>-{</div><div class='del'>-	if (i != 0)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int usb_amradio_init(struct amradio_device *radio)</div><div class='ctx'> {</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='del'>-	retval = amradio_set_mute(radio, AMRADIO_STOP);</div><div class='add'>+	retval = amradio_set_mute(radio, true);</div><div class='ctx'> 	if (retval)</div><div class='ctx'> 		goto out_err;</div><div class='del'>-</div><div class='del'>-	retval = amradio_set_stereo(radio, WANT_STEREO);</div><div class='add'>+	retval = amradio_set_stereo(radio, true);</div><div class='ctx'> 	if (retval)</div><div class='ctx'> 		goto out_err;</div><div class='del'>-</div><div class='del'>-	radio-&gt;initialized = 1;</div><div class='del'>-	goto out;</div><div class='del'>-</div><div class='del'>-out_err:</div><div class='del'>-	amradio_dev_err(&amp;radio-&gt;videodev.dev, "initialization failed\n");</div><div class='del'>-out:</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* open device - amradio_start() and amradio_setfreq() */</div><div class='del'>-static int usb_amradio_open(struct file *file)</div><div class='del'>-{</div><div class='del'>-	struct amradio_device *radio = video_drvdata(file);</div><div class='del'>-	int retval;</div><div class='del'>-</div><div class='del'>-	file-&gt;private_data = radio;</div><div class='del'>-	retval = usb_autopm_get_interface(radio-&gt;intf);</div><div class='add'>+	retval = amradio_set_freq(radio, radio-&gt;curfreq);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		return retval;</div><div class='add'>+		goto out_err;</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(!radio-&gt;initialized)) {</div><div class='del'>-		retval = usb_amradio_init(radio);</div><div class='del'>-		if (retval)</div><div class='del'>-			usb_autopm_put_interface(radio-&gt;intf);</div><div class='del'>-	}</div><div class='add'>+out_err:</div><div class='add'>+	amradio_dev_err(&amp;radio-&gt;vdev.dev, "initialization failed\n");</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*close device */</div><div class='del'>-static int usb_amradio_close(struct file *file)</div><div class='del'>-{</div><div class='del'>-	struct amradio_device *radio = file-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	if (video_is_registered(&amp;radio-&gt;videodev))</div><div class='del'>-		usb_autopm_put_interface(radio-&gt;intf);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Suspend device - stop device. Need to be checked and fixed */</div><div class='ctx'> static int usb_amradio_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='ctx'> {</div><div class='ctx'> 	struct amradio_device *radio = to_amradio_dev(usb_get_intfdata(intf));</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	if (!radio-&gt;muted &amp;&amp; radio-&gt;initialized) {</div><div class='del'>-		amradio_set_mute(radio, AMRADIO_STOP);</div><div class='del'>-		radio-&gt;muted = 0;</div><div class='add'>+	if (!radio-&gt;muted) {</div><div class='add'>+		amradio_set_mute(radio, true);</div><div class='add'>+		radio-&gt;muted = false;</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;radio-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -543,31 +454,28 @@ static int usb_amradio_resume(struct usb_interface *intf)</div><div class='ctx'> 	struct amradio_device *radio = to_amradio_dev(usb_get_intfdata(intf));</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	if (unlikely(!radio-&gt;initialized))</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='del'>-	if (radio-&gt;stereo)</div><div class='del'>-		amradio_set_stereo(radio, WANT_STEREO);</div><div class='del'>-	else</div><div class='del'>-		amradio_set_stereo(radio, WANT_MONO);</div><div class='del'>-</div><div class='del'>-	amradio_setfreq(radio, radio-&gt;curfreq);</div><div class='add'>+	amradio_set_stereo(radio, radio-&gt;stereo);</div><div class='add'>+	amradio_set_freq(radio, radio-&gt;curfreq);</div><div class='ctx'> </div><div class='ctx'> 	if (!radio-&gt;muted)</div><div class='del'>-		amradio_set_mute(radio, AMRADIO_START);</div><div class='add'>+		amradio_set_mute(radio, false);</div><div class='ctx'> </div><div class='del'>-unlock:</div><div class='ctx'> 	mutex_unlock(&amp;radio-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;intf-&gt;dev, "coming out of suspend..\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct v4l2_ctrl_ops usb_amradio_ctrl_ops = {</div><div class='add'>+	.s_ctrl = usb_amradio_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* File system interface */</div><div class='ctx'> static const struct v4l2_file_operations usb_amradio_fops = {</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='del'>-	.open		= usb_amradio_open,</div><div class='del'>-	.release	= usb_amradio_close,</div><div class='add'>+	.open		= v4l2_fh_open,</div><div class='add'>+	.release	= v4l2_fh_release,</div><div class='add'>+	.poll		= v4l2_ctrl_poll,</div><div class='ctx'> 	.unlocked_ioctl	= video_ioctl2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -577,20 +485,19 @@ static const struct v4l2_ioctl_ops usb_amradio_ioctl_ops = {</div><div class='ctx'> 	.vidioc_s_tuner     = vidioc_s_tuner,</div><div class='ctx'> 	.vidioc_g_frequency = vidioc_g_frequency,</div><div class='ctx'> 	.vidioc_s_frequency = vidioc_s_frequency,</div><div class='del'>-	.vidioc_queryctrl   = vidioc_queryctrl,</div><div class='del'>-	.vidioc_g_ctrl      = vidioc_g_ctrl,</div><div class='del'>-	.vidioc_s_ctrl      = vidioc_s_ctrl,</div><div class='del'>-	.vidioc_g_audio     = vidioc_g_audio,</div><div class='del'>-	.vidioc_s_audio     = vidioc_s_audio,</div><div class='del'>-	.vidioc_g_input     = vidioc_g_input,</div><div class='del'>-	.vidioc_s_input     = vidioc_s_input,</div><div class='add'>+	.vidioc_s_hw_freq_seek = vidioc_s_hw_freq_seek,</div><div class='add'>+	.vidioc_log_status  = v4l2_ctrl_log_status,</div><div class='add'>+	.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,</div><div class='add'>+	.vidioc_unsubscribe_event = v4l2_event_unsubscribe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void usb_amradio_video_device_release(struct video_device *videodev)</div><div class='add'>+static void usb_amradio_release(struct v4l2_device *v4l2_dev)</div><div class='ctx'> {</div><div class='del'>-	struct amradio_device *radio = video_get_drvdata(videodev);</div><div class='add'>+	struct amradio_device *radio = to_amradio_dev(v4l2_dev);</div><div class='ctx'> </div><div class='ctx'> 	/* free rest memory */</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;radio-&gt;hdl);</div><div class='add'>+	v4l2_device_unregister(&amp;radio-&gt;v4l2_dev);</div><div class='ctx'> 	kfree(radio-&gt;buffer);</div><div class='ctx'> 	kfree(radio);</div><div class='ctx'> }</div><div class='hunk'>@@ -624,23 +531,38 @@ static int usb_amradio_probe(struct usb_interface *intf,</div><div class='ctx'> 		goto err_v4l2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	v4l2_ctrl_handler_init(&amp;radio-&gt;hdl, 1);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;radio-&gt;hdl, &amp;usb_amradio_ctrl_ops,</div><div class='add'>+			  V4L2_CID_AUDIO_MUTE, 0, 1, 1, 1);</div><div class='add'>+	if (radio-&gt;hdl.error) {</div><div class='add'>+		retval = radio-&gt;hdl.error;</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "couldn't register control\n");</div><div class='add'>+		goto err_ctrl;</div><div class='add'>+	}</div><div class='ctx'> 	mutex_init(&amp;radio-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	strlcpy(radio-&gt;videodev.name, radio-&gt;v4l2_dev.name,</div><div class='del'>-		sizeof(radio-&gt;videodev.name));</div><div class='del'>-	radio-&gt;videodev.v4l2_dev = &amp;radio-&gt;v4l2_dev;</div><div class='del'>-	radio-&gt;videodev.fops = &amp;usb_amradio_fops;</div><div class='del'>-	radio-&gt;videodev.ioctl_ops = &amp;usb_amradio_ioctl_ops;</div><div class='del'>-	radio-&gt;videodev.release = usb_amradio_video_device_release;</div><div class='del'>-	radio-&gt;videodev.lock = &amp;radio-&gt;lock;</div><div class='add'>+	radio-&gt;v4l2_dev.ctrl_handler = &amp;radio-&gt;hdl;</div><div class='add'>+	radio-&gt;v4l2_dev.release = usb_amradio_release;</div><div class='add'>+	strlcpy(radio-&gt;vdev.name, radio-&gt;v4l2_dev.name,</div><div class='add'>+		sizeof(radio-&gt;vdev.name));</div><div class='add'>+	radio-&gt;vdev.v4l2_dev = &amp;radio-&gt;v4l2_dev;</div><div class='add'>+	radio-&gt;vdev.fops = &amp;usb_amradio_fops;</div><div class='add'>+	radio-&gt;vdev.ioctl_ops = &amp;usb_amradio_ioctl_ops;</div><div class='add'>+	radio-&gt;vdev.release = video_device_release_empty;</div><div class='add'>+	radio-&gt;vdev.lock = &amp;radio-&gt;lock;</div><div class='add'>+	set_bit(V4L2_FL_USE_FH_PRIO, &amp;radio-&gt;vdev.flags);</div><div class='ctx'> </div><div class='ctx'> 	radio-&gt;usbdev = interface_to_usbdev(intf);</div><div class='ctx'> 	radio-&gt;intf = intf;</div><div class='add'>+	usb_set_intfdata(intf, &amp;radio-&gt;v4l2_dev);</div><div class='ctx'> 	radio-&gt;curfreq = 95.16 * FREQ_MUL;</div><div class='ctx'> </div><div class='del'>-	video_set_drvdata(&amp;radio-&gt;videodev, radio);</div><div class='add'>+	video_set_drvdata(&amp;radio-&gt;vdev, radio);</div><div class='add'>+	retval = usb_amradio_init(radio);</div><div class='add'>+	if (retval)</div><div class='add'>+		goto err_vdev;</div><div class='ctx'> </div><div class='del'>-	retval = video_register_device(&amp;radio-&gt;videodev, VFL_TYPE_RADIO,</div><div class='add'>+	retval = video_register_device(&amp;radio-&gt;vdev, VFL_TYPE_RADIO,</div><div class='ctx'> 					radio_nr);</div><div class='ctx'> 	if (retval &lt; 0) {</div><div class='ctx'> 		dev_err(&amp;intf-&gt;dev, "could not register video device\n");</div><div class='hunk'>@@ -650,6 +572,8 @@ static int usb_amradio_probe(struct usb_interface *intf,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_vdev:</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;radio-&gt;hdl);</div><div class='add'>+err_ctrl:</div><div class='ctx'> 	v4l2_device_unregister(&amp;radio-&gt;v4l2_dev);</div><div class='ctx'> err_v4l2:</div><div class='ctx'> 	kfree(radio-&gt;buffer);</div><div class='hunk'>@@ -659,4 +583,24 @@ err:</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* USB Device ID List */</div><div class='add'>+static struct usb_device_id usb_amradio_device_table[] = {</div><div class='add'>+	{ USB_DEVICE_AND_INTERFACE_INFO(USB_AMRADIO_VENDOR, USB_AMRADIO_PRODUCT,</div><div class='add'>+							USB_CLASS_HID, 0, 0) },</div><div class='add'>+	{ }						/* Terminating entry */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(usb, usb_amradio_device_table);</div><div class='add'>+</div><div class='add'>+/* USB subsystem interface */</div><div class='add'>+static struct usb_driver usb_amradio_driver = {</div><div class='add'>+	.name			= MR800_DRIVER_NAME,</div><div class='add'>+	.probe			= usb_amradio_probe,</div><div class='add'>+	.disconnect		= usb_amradio_disconnect,</div><div class='add'>+	.suspend		= usb_amradio_suspend,</div><div class='add'>+	.resume			= usb_amradio_resume,</div><div class='add'>+	.reset_resume		= usb_amradio_resume,</div><div class='add'>+	.id_table		= usb_amradio_device_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> module_usb_driver(usb_amradio_driver);</div><div class='head'>diff --git a/drivers/media/radio/radio-rtrack2.c b/drivers/media/radio/radio-rtrack2.c<br/>index b275c5d0fe9a..b1f844c64fde 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/radio-rtrack2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/radio-rtrack2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/radio-rtrack2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-rtrack2.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;	/* kernel radio structs		*/</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;		/* outb, outb_p			*/</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='ctx'> #include "radio-isa.h"</div><div class='head'>diff --git a/drivers/media/radio/radio-sf16fmi.c b/drivers/media/radio/radio-sf16fmi.c<br/>index 22c5743bf9db..a81d723b8c77 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/radio-sf16fmi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/radio-sf16fmi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/radio-sf16fmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-sf16fmi.c</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-/* SF16-FMI and SF16-FMP radio driver for Linux radio support</div><div class='add'>+/* SF16-FMI, SF16-FMP and SF16-FMD radio driver for Linux radio support</div><div class='ctx'>  * heavily based on rtrack driver...</div><div class='ctx'>  * (c) 1997 M. Kirkwood</div><div class='ctx'>  * (c) 1998 Petr Vandrovec, vandrove@vc.cvut.cz</div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  *  Frequency control is done digitally -- ie out(port,encodefreq(95.8));</div><div class='ctx'>  *  No volume control - only mute/unmute - you have to use line volume</div><div class='del'>- *  control on SB-part of SF16-FMI/SF16-FMP</div><div class='add'>+ *  control on SB-part of SF16-FMI/SF16-FMP/SF16-FMD</div><div class='ctx'>  *</div><div class='ctx'>  * Converted to V4L2 API by Mauro Carvalho Chehab &lt;mchehab@infradead.org&gt;</div><div class='ctx'>  */</div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Petr Vandrovec, vandrove@vc.cvut.cz and M. Kirkwood");</div><div class='del'>-MODULE_DESCRIPTION("A driver for the SF16-FMI and SF16-FMP radio.");</div><div class='add'>+MODULE_DESCRIPTION("A driver for the SF16-FMI, SF16-FMP and SF16-FMD radio.");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_VERSION("0.0.3");</div><div class='ctx'> </div><div class='hunk'>@@ -37,7 +37,7 @@ static int io = -1;</div><div class='ctx'> static int radio_nr = -1;</div><div class='ctx'> </div><div class='ctx'> module_param(io, int, 0);</div><div class='del'>-MODULE_PARM_DESC(io, "I/O address of the SF16-FMI or SF16-FMP card (0x284 or 0x384)");</div><div class='add'>+MODULE_PARM_DESC(io, "I/O address of the SF16-FMI/SF16-FMP/SF16-FMD card (0x284 or 0x384)");</div><div class='ctx'> module_param(radio_nr, int, 0);</div><div class='ctx'> </div><div class='ctx'> struct fmi</div><div class='hunk'>@@ -130,7 +130,7 @@ static int vidioc_querycap(struct file *file, void  *priv,</div><div class='ctx'> 					struct v4l2_capability *v)</div><div class='ctx'> {</div><div class='ctx'> 	strlcpy(v-&gt;driver, "radio-sf16fmi", sizeof(v-&gt;driver));</div><div class='del'>-	strlcpy(v-&gt;card, "SF16-FMx radio", sizeof(v-&gt;card));</div><div class='add'>+	strlcpy(v-&gt;card, "SF16-FMI/FMP/FMD radio", sizeof(v-&gt;card));</div><div class='ctx'> 	strlcpy(v-&gt;bus_info, "ISA", sizeof(v-&gt;bus_info));</div><div class='ctx'> 	v-&gt;capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -277,8 +277,12 @@ static const struct v4l2_ioctl_ops fmi_ioctl_ops = {</div><div class='ctx'> </div><div class='ctx'> /* ladis: this is my card. does any other types exist? */</div><div class='ctx'> static struct isapnp_device_id id_table[] __devinitdata = {</div><div class='add'>+		/* SF16-FMI */</div><div class='ctx'> 	{	ISAPNP_ANY_ID, ISAPNP_ANY_ID,</div><div class='ctx'> 		ISAPNP_VENDOR('M','F','R'), ISAPNP_FUNCTION(0xad10), 0},</div><div class='add'>+		/* SF16-FMD */</div><div class='add'>+	{	ISAPNP_ANY_ID, ISAPNP_ANY_ID,</div><div class='add'>+		ISAPNP_VENDOR('M','F','R'), ISAPNP_FUNCTION(0xad12), 0},</div><div class='ctx'> 	{	ISAPNP_CARD_END, },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/radio/radio-sf16fmr2.c b/drivers/media/radio/radio-sf16fmr2.c<br/>index 7c69214334bf..52b8011f1b23 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/radio-sf16fmr2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/radio-sf16fmr2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/radio-sf16fmr2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-sf16fmr2.c</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-/* SF16-FMR2 radio driver for Linux</div><div class='add'>+/* SF16-FMR2 and SF16-FMD2 radio driver for Linux</div><div class='ctx'>  * Copyright (c) 2011 Ondrej Zary</div><div class='ctx'>  *</div><div class='ctx'>  * Original driver was (c) 2000-2002 Ziglio Frediano, freddy77@angelfire.com</div><div class='hunk'>@@ -13,15 +13,19 @@</div><div class='ctx'> #include &lt;linux/ioport.h&gt;	/* request_region		*/</div><div class='ctx'> #include &lt;linux/io.h&gt;		/* outb, outb_p			*/</div><div class='ctx'> #include &lt;linux/isa.h&gt;</div><div class='add'>+#include &lt;linux/pnp.h&gt;</div><div class='ctx'> #include &lt;sound/tea575x-tuner.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Ondrej Zary");</div><div class='del'>-MODULE_DESCRIPTION("MediaForte SF16-FMR2 FM radio card driver");</div><div class='add'>+MODULE_DESCRIPTION("MediaForte SF16-FMR2 and SF16-FMD2 FM radio card driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='del'>-static int radio_nr = -1;</div><div class='del'>-module_param(radio_nr, int, 0444);</div><div class='del'>-MODULE_PARM_DESC(radio_nr, "Radio device number");</div><div class='add'>+/* these cards can only use two different ports (0x384 and 0x284) */</div><div class='add'>+#define FMR2_MAX 2</div><div class='add'>+</div><div class='add'>+static int radio_nr[FMR2_MAX] = { [0 ... (FMR2_MAX - 1)] = -1 };</div><div class='add'>+module_param_array(radio_nr, int, NULL, 0444);</div><div class='add'>+MODULE_PARM_DESC(radio_nr, "Radio device numbers");</div><div class='ctx'> </div><div class='ctx'> struct fmr2 {</div><div class='ctx'> 	int io;</div><div class='hunk'>@@ -29,9 +33,15 @@ struct fmr2 {</div><div class='ctx'> 	struct snd_tea575x tea;</div><div class='ctx'> 	struct v4l2_ctrl *volume;</div><div class='ctx'> 	struct v4l2_ctrl *balance;</div><div class='add'>+	bool is_fmd2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* the port is hardwired so no need to support multiple cards */</div><div class='add'>+static int num_fmr2_cards;</div><div class='add'>+static struct fmr2 *fmr2_cards[FMR2_MAX];</div><div class='add'>+static bool isa_registered;</div><div class='add'>+static bool pnp_registered;</div><div class='add'>+</div><div class='add'>+/* the port is hardwired on SF16-FMR2 */</div><div class='ctx'> #define FMR2_PORT	0x384</div><div class='ctx'> </div><div class='ctx'> /* TEA575x tuner pins */</div><div class='hunk'>@@ -174,7 +184,8 @@ static int fmr2_tea_ext_init(struct snd_tea575x *tea)</div><div class='ctx'> {</div><div class='ctx'> 	struct fmr2 *fmr2 = tea-&gt;private_data;</div><div class='ctx'> </div><div class='del'>-	if (inb(fmr2-&gt;io) &amp; FMR2_HASVOL) {</div><div class='add'>+	/* FMR2 can have volume control, FMD2 can't (uses SB16 mixer) */</div><div class='add'>+	if (!fmr2-&gt;is_fmd2 &amp;&amp; inb(fmr2-&gt;io) &amp; FMR2_HASVOL) {</div><div class='ctx'> 		fmr2-&gt;volume = v4l2_ctrl_new_std(&amp;tea-&gt;ctrl_handler, &amp;fmr2_ctrl_ops, V4L2_CID_AUDIO_VOLUME, 0, 68, 2, 56);</div><div class='ctx'> 		fmr2-&gt;balance = v4l2_ctrl_new_std(&amp;tea-&gt;ctrl_handler, &amp;fmr2_ctrl_ops, V4L2_CID_AUDIO_BALANCE, -68, 68, 2, 0);</div><div class='ctx'> 		if (tea-&gt;ctrl_handler.error) {</div><div class='hunk'>@@ -186,22 +197,28 @@ static int fmr2_tea_ext_init(struct snd_tea575x *tea)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __devinit fmr2_probe(struct device *pdev, unsigned int dev)</div><div class='add'>+static struct pnp_device_id fmr2_pnp_ids[] __devinitdata = {</div><div class='add'>+	{ .id = "MFRad13" }, /* tuner subdevice of SF16-FMD2 */</div><div class='add'>+	{ .id = "" }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pnp, fmr2_pnp_ids);</div><div class='add'>+</div><div class='add'>+static int __devinit fmr2_probe(struct fmr2 *fmr2, struct device *pdev, int io)</div><div class='ctx'> {</div><div class='del'>-	struct fmr2 *fmr2;</div><div class='del'>-	int err;</div><div class='add'>+	int err, i;</div><div class='add'>+	char *card_name = fmr2-&gt;is_fmd2 ? "SF16-FMD2" : "SF16-FMR2";</div><div class='ctx'> </div><div class='del'>-	fmr2 = kzalloc(sizeof(*fmr2), GFP_KERNEL);</div><div class='del'>-	if (fmr2 == NULL)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	/* avoid errors if a card was already registered at given port */</div><div class='add'>+	for (i = 0; i &lt; num_fmr2_cards; i++)</div><div class='add'>+		if (io == fmr2_cards[i]-&gt;io)</div><div class='add'>+			return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	strlcpy(fmr2-&gt;v4l2_dev.name, dev_name(pdev),</div><div class='del'>-			sizeof(fmr2-&gt;v4l2_dev.name));</div><div class='del'>-	fmr2-&gt;io = FMR2_PORT;</div><div class='add'>+	strlcpy(fmr2-&gt;v4l2_dev.name, "radio-sf16fmr2",</div><div class='add'>+			sizeof(fmr2-&gt;v4l2_dev.name)),</div><div class='add'>+	fmr2-&gt;io = io;</div><div class='ctx'> </div><div class='ctx'> 	if (!request_region(fmr2-&gt;io, 2, fmr2-&gt;v4l2_dev.name)) {</div><div class='ctx'> 		printk(KERN_ERR "radio-sf16fmr2: I/O port 0x%x already in use\n", fmr2-&gt;io);</div><div class='del'>-		kfree(fmr2);</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -210,56 +227,121 @@ static int __devinit fmr2_probe(struct device *pdev, unsigned int dev)</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='ctx'> 		v4l2_err(&amp;fmr2-&gt;v4l2_dev, "Could not register v4l2_device\n");</div><div class='ctx'> 		release_region(fmr2-&gt;io, 2);</div><div class='del'>-		kfree(fmr2);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> 	fmr2-&gt;tea.v4l2_dev = &amp;fmr2-&gt;v4l2_dev;</div><div class='ctx'> 	fmr2-&gt;tea.private_data = fmr2;</div><div class='del'>-	fmr2-&gt;tea.radio_nr = radio_nr;</div><div class='add'>+	fmr2-&gt;tea.radio_nr = radio_nr[num_fmr2_cards];</div><div class='ctx'> 	fmr2-&gt;tea.ops = &amp;fmr2_tea_ops;</div><div class='ctx'> 	fmr2-&gt;tea.ext_init = fmr2_tea_ext_init;</div><div class='del'>-	strlcpy(fmr2-&gt;tea.card, "SF16-FMR2", sizeof(fmr2-&gt;tea.card));</div><div class='del'>-	snprintf(fmr2-&gt;tea.bus_info, sizeof(fmr2-&gt;tea.bus_info), "ISA:%s",</div><div class='del'>-			fmr2-&gt;v4l2_dev.name);</div><div class='add'>+	strlcpy(fmr2-&gt;tea.card, card_name, sizeof(fmr2-&gt;tea.card));</div><div class='add'>+	snprintf(fmr2-&gt;tea.bus_info, sizeof(fmr2-&gt;tea.bus_info), "%s:%s",</div><div class='add'>+			fmr2-&gt;is_fmd2 ? "PnP" : "ISA", dev_name(pdev));</div><div class='ctx'> </div><div class='ctx'> 	if (snd_tea575x_init(&amp;fmr2-&gt;tea)) {</div><div class='ctx'> 		printk(KERN_ERR "radio-sf16fmr2: Unable to detect TEA575x tuner\n");</div><div class='ctx'> 		release_region(fmr2-&gt;io, 2);</div><div class='del'>-		kfree(fmr2);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "radio-sf16fmr2: SF16-FMR2 radio card at 0x%x.\n", fmr2-&gt;io);</div><div class='add'>+	printk(KERN_INFO "radio-sf16fmr2: %s radio card at 0x%x.\n",</div><div class='add'>+			card_name, fmr2-&gt;io);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __exit fmr2_remove(struct device *pdev, unsigned int dev)</div><div class='add'>+static int __devinit fmr2_isa_match(struct device *pdev, unsigned int ndev)</div><div class='add'>+{</div><div class='add'>+	struct fmr2 *fmr2 = kzalloc(sizeof(*fmr2), GFP_KERNEL);</div><div class='add'>+	if (!fmr2)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (fmr2_probe(fmr2, pdev, FMR2_PORT)) {</div><div class='add'>+		kfree(fmr2);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	dev_set_drvdata(pdev, fmr2);</div><div class='add'>+	fmr2_cards[num_fmr2_cards++] = fmr2;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit fmr2_pnp_probe(struct pnp_dev *pdev,</div><div class='add'>+				const struct pnp_device_id *id)</div><div class='ctx'> {</div><div class='del'>-	struct fmr2 *fmr2 = dev_get_drvdata(pdev);</div><div class='add'>+	int ret;</div><div class='add'>+	struct fmr2 *fmr2 = kzalloc(sizeof(*fmr2), GFP_KERNEL);</div><div class='add'>+	if (!fmr2)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	fmr2-&gt;is_fmd2 = true;</div><div class='add'>+	ret = fmr2_probe(fmr2, &amp;pdev-&gt;dev, pnp_port_start(pdev, 0));</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(fmr2);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	pnp_set_drvdata(pdev, fmr2);</div><div class='add'>+	fmr2_cards[num_fmr2_cards++] = fmr2;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devexit fmr2_remove(struct fmr2 *fmr2)</div><div class='add'>+{</div><div class='ctx'> 	snd_tea575x_exit(&amp;fmr2-&gt;tea);</div><div class='ctx'> 	release_region(fmr2-&gt;io, 2);</div><div class='ctx'> 	v4l2_device_unregister(&amp;fmr2-&gt;v4l2_dev);</div><div class='ctx'> 	kfree(fmr2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit fmr2_isa_remove(struct device *pdev, unsigned int ndev)</div><div class='add'>+{</div><div class='add'>+	fmr2_remove(dev_get_drvdata(pdev));</div><div class='add'>+	dev_set_drvdata(pdev, NULL);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct isa_driver fmr2_driver = {</div><div class='del'>-	.probe		= fmr2_probe,</div><div class='del'>-	.remove		= fmr2_remove,</div><div class='add'>+static void __devexit fmr2_pnp_remove(struct pnp_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	fmr2_remove(pnp_get_drvdata(pdev));</div><div class='add'>+	pnp_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct isa_driver fmr2_isa_driver = {</div><div class='add'>+	.match		= fmr2_isa_match,</div><div class='add'>+	.remove		= __devexit_p(fmr2_isa_remove),</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "radio-sf16fmr2",</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct pnp_driver fmr2_pnp_driver = {</div><div class='add'>+	.name		= "radio-sf16fmr2",</div><div class='add'>+	.id_table	= fmr2_pnp_ids,</div><div class='add'>+	.probe		= fmr2_pnp_probe,</div><div class='add'>+	.remove		= __devexit_p(fmr2_pnp_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int __init fmr2_init(void)</div><div class='ctx'> {</div><div class='del'>-	return isa_register_driver(&amp;fmr2_driver, 1);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pnp_register_driver(&amp;fmr2_pnp_driver);</div><div class='add'>+	if (!ret)</div><div class='add'>+		pnp_registered = true;</div><div class='add'>+	ret = isa_register_driver(&amp;fmr2_isa_driver, 1);</div><div class='add'>+	if (!ret)</div><div class='add'>+		isa_registered = true;</div><div class='add'>+</div><div class='add'>+	return (pnp_registered || isa_registered) ? 0 : ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit fmr2_exit(void)</div><div class='ctx'> {</div><div class='del'>-	isa_unregister_driver(&amp;fmr2_driver);</div><div class='add'>+	if (pnp_registered)</div><div class='add'>+		pnp_unregister_driver(&amp;fmr2_pnp_driver);</div><div class='add'>+	if (isa_registered)</div><div class='add'>+		isa_unregister_driver(&amp;fmr2_isa_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(fmr2_init);</div><div class='head'>diff --git a/drivers/media/radio/radio-timb.c b/drivers/media/radio/radio-timb.c<br/>index 5d9a90ac3a1c..7052adc0c0b0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/radio-timb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/radio-timb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/radio-timb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/radio-timb.c</a></div><div class='hunk'>@@ -223,7 +223,7 @@ static struct platform_driver timbradio_platform_driver = {</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= timbradio_probe,</div><div class='del'>-	.remove		= timbradio_remove,</div><div class='add'>+	.remove		= __devexit_p(timbradio_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_platform_driver(timbradio_platform_driver);</div><div class='head'>diff --git a/drivers/media/radio/saa7706h.c b/drivers/media/radio/saa7706h.c<br/>index 9474706350f8..bb953ef75f61 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/saa7706h.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/saa7706h.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/saa7706h.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/saa7706h.c</a></div><div class='hunk'>@@ -430,7 +430,7 @@ static struct i2c_driver saa7706h_driver = {</div><div class='ctx'> 		.name	= DRIVER_NAME,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= saa7706h_probe,</div><div class='del'>-	.remove		= saa7706h_remove,</div><div class='add'>+	.remove		= __devexit_p(saa7706h_remove),</div><div class='ctx'> 	.id_table	= saa7706h_id,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/radio/si470x/radio-si470x-common.c b/drivers/media/radio/si470x/radio-si470x-common.c<br/>index 0e740c98786c..969cf494d85b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/si470x/radio-si470x-common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/si470x/radio-si470x-common.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/si470x/radio-si470x-common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/si470x/radio-si470x-common.c</a></div><div class='hunk'>@@ -196,9 +196,9 @@ static int si470x_set_chan(struct si470x_device *radio, unsigned short chan)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((radio-&gt;registers[STATUSRSSI] &amp; STATUSRSSI_STC) == 0)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev, "tune does not complete\n");</div><div class='add'>+		dev_warn(&amp;radio-&gt;videodev.dev, "tune does not complete\n");</div><div class='ctx'> 	if (timed_out)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev,</div><div class='add'>+		dev_warn(&amp;radio-&gt;videodev.dev,</div><div class='ctx'> 			"tune timed out after %u ms\n", tune_timeout);</div><div class='ctx'> </div><div class='ctx'> stop:</div><div class='hunk'>@@ -262,7 +262,7 @@ static int si470x_get_freq(struct si470x_device *radio, unsigned int *freq)</div><div class='ctx'>  */</div><div class='ctx'> int si470x_set_freq(struct si470x_device *radio, unsigned int freq)</div><div class='ctx'> {</div><div class='del'>-	unsigned int spacing, band_bottom;</div><div class='add'>+	unsigned int spacing, band_bottom, band_top;</div><div class='ctx'> 	unsigned short chan;</div><div class='ctx'> </div><div class='ctx'> 	/* Spacing (kHz) */</div><div class='hunk'>@@ -278,19 +278,26 @@ int si470x_set_freq(struct si470x_device *radio, unsigned int freq)</div><div class='ctx'> 		spacing = 0.050 * FREQ_MUL; break;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	/* Bottom of Band (MHz) */</div><div class='add'>+	/* Bottom/Top of Band (MHz) */</div><div class='ctx'> 	switch ((radio-&gt;registers[SYSCONFIG2] &amp; SYSCONFIG2_BAND) &gt;&gt; 6) {</div><div class='ctx'> 	/* 0: 87.5 - 108 MHz (USA, Europe) */</div><div class='ctx'> 	case 0:</div><div class='del'>-		band_bottom = 87.5 * FREQ_MUL; break;</div><div class='add'>+		band_bottom = 87.5 * FREQ_MUL;</div><div class='add'>+		band_top = 108 * FREQ_MUL;</div><div class='add'>+		break;</div><div class='ctx'> 	/* 1: 76   - 108 MHz (Japan wide band) */</div><div class='ctx'> 	default:</div><div class='del'>-		band_bottom = 76   * FREQ_MUL; break;</div><div class='add'>+		band_bottom = 76 * FREQ_MUL;</div><div class='add'>+		band_top = 108 * FREQ_MUL;</div><div class='add'>+		break;</div><div class='ctx'> 	/* 2: 76   -  90 MHz (Japan) */</div><div class='ctx'> 	case 2:</div><div class='del'>-		band_bottom = 76   * FREQ_MUL; break;</div><div class='add'>+		band_bottom = 76 * FREQ_MUL;</div><div class='add'>+		band_top = 90 * FREQ_MUL;</div><div class='add'>+		break;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	freq = clamp(freq, band_bottom, band_top);</div><div class='ctx'> 	/* Chan = [ Freq (Mhz) - Bottom of Band (MHz) ] / Spacing (kHz) */</div><div class='ctx'> 	chan = (freq - band_bottom) / spacing;</div><div class='ctx'> </div><div class='hunk'>@@ -320,7 +327,7 @@ static int si470x_set_seek(struct si470x_device *radio,</div><div class='ctx'> 		radio-&gt;registers[POWERCFG] &amp;= ~POWERCFG_SEEKUP;</div><div class='ctx'> 	retval = si470x_set_register(radio, POWERCFG);</div><div class='ctx'> 	if (retval &lt; 0)</div><div class='del'>-		goto done;</div><div class='add'>+		return retval;</div><div class='ctx'> </div><div class='ctx'> 	/* currently I2C driver only uses interrupt way to seek */</div><div class='ctx'> 	if (radio-&gt;stci_enabled) {</div><div class='hunk'>@@ -344,24 +351,19 @@ static int si470x_set_seek(struct si470x_device *radio,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((radio-&gt;registers[STATUSRSSI] &amp; STATUSRSSI_STC) == 0)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev, "seek does not complete\n");</div><div class='add'>+		dev_warn(&amp;radio-&gt;videodev.dev, "seek does not complete\n");</div><div class='ctx'> 	if (radio-&gt;registers[STATUSRSSI] &amp; STATUSRSSI_SF)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev,</div><div class='add'>+		dev_warn(&amp;radio-&gt;videodev.dev,</div><div class='ctx'> 			"seek failed / band limit reached\n");</div><div class='del'>-	if (timed_out)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev,</div><div class='del'>-			"seek timed out after %u ms\n", seek_timeout);</div><div class='ctx'> </div><div class='ctx'> stop:</div><div class='ctx'> 	/* stop seeking */</div><div class='ctx'> 	radio-&gt;registers[POWERCFG] &amp;= ~POWERCFG_SEEK;</div><div class='ctx'> 	retval = si470x_set_register(radio, POWERCFG);</div><div class='ctx'> </div><div class='del'>-done:</div><div class='ctx'> 	/* try again, if timed out */</div><div class='del'>-	if ((retval == 0) &amp;&amp; timed_out)</div><div class='del'>-		retval = -EAGAIN;</div><div class='del'>-</div><div class='add'>+	if (retval == 0 &amp;&amp; timed_out)</div><div class='add'>+		return -EAGAIN;</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -463,7 +465,6 @@ static ssize_t si470x_fops_read(struct file *file, char __user *buf,</div><div class='ctx'> 	unsigned int block_count = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* switch on rds reception */</div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='ctx'> 	if ((radio-&gt;registers[SYSCONFIG1] &amp; SYSCONFIG1_RDS) == 0)</div><div class='ctx'> 		si470x_rds_on(radio);</div><div class='ctx'> </div><div class='hunk'>@@ -505,7 +506,6 @@ static ssize_t si470x_fops_read(struct file *file, char __user *buf,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -517,19 +517,19 @@ static unsigned int si470x_fops_poll(struct file *file,</div><div class='ctx'> 		struct poll_table_struct *pts)</div><div class='ctx'> {</div><div class='ctx'> 	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval = 0;</div><div class='add'>+	unsigned long req_events = poll_requested_events(pts);</div><div class='add'>+	int retval = v4l2_ctrl_poll(file, pts);</div><div class='ctx'> </div><div class='del'>-	/* switch on rds reception */</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	if ((radio-&gt;registers[SYSCONFIG1] &amp; SYSCONFIG1_RDS) == 0)</div><div class='del'>-		si470x_rds_on(radio);</div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='add'>+	if (req_events &amp; (POLLIN | POLLRDNORM)) {</div><div class='add'>+		/* switch on rds reception */</div><div class='add'>+		if ((radio-&gt;registers[SYSCONFIG1] &amp; SYSCONFIG1_RDS) == 0)</div><div class='add'>+			si470x_rds_on(radio);</div><div class='ctx'> </div><div class='del'>-	poll_wait(file, &amp;radio-&gt;read_queue, pts);</div><div class='add'>+		poll_wait(file, &amp;radio-&gt;read_queue, pts);</div><div class='ctx'> </div><div class='del'>-	if (radio-&gt;rd_index != radio-&gt;wr_index)</div><div class='del'>-		retval = POLLIN | POLLRDNORM;</div><div class='add'>+		if (radio-&gt;rd_index != radio-&gt;wr_index)</div><div class='add'>+			retval |= POLLIN | POLLRDNORM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='hunk'>@@ -553,134 +553,26 @@ static const struct v4l2_file_operations si470x_fops = {</div><div class='ctx'>  * Video4Linux Interface</div><div class='ctx'>  **************************************************************************/</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * si470x_vidioc_queryctrl - enumerate control items</div><div class='del'>- */</div><div class='del'>-static int si470x_vidioc_queryctrl(struct file *file, void *priv,</div><div class='del'>-		struct v4l2_queryctrl *qc)</div><div class='del'>-{</div><div class='del'>-	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval = -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* abort if qc-&gt;id is below V4L2_CID_BASE */</div><div class='del'>-	if (qc-&gt;id &lt; V4L2_CID_BASE)</div><div class='del'>-		goto done;</div><div class='del'>-</div><div class='del'>-	/* search video control */</div><div class='del'>-	switch (qc-&gt;id) {</div><div class='del'>-	case V4L2_CID_AUDIO_VOLUME:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 15, 1, 15);</div><div class='del'>-	case V4L2_CID_AUDIO_MUTE:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 1, 1, 1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* disable unsupported base controls */</div><div class='del'>-	/* to satisfy kradio and such apps */</div><div class='del'>-	if ((retval == -EINVAL) &amp;&amp; (qc-&gt;id &lt; V4L2_CID_LASTP1)) {</div><div class='del'>-		qc-&gt;flags = V4L2_CTRL_FLAG_DISABLED;</div><div class='del'>-		retval = 0;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-done:</div><div class='del'>-	if (retval &lt; 0)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev,</div><div class='del'>-			"query controls failed with %d\n", retval);</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * si470x_vidioc_g_ctrl - get the value of a control</div><div class='del'>- */</div><div class='del'>-static int si470x_vidioc_g_ctrl(struct file *file, void *priv,</div><div class='del'>-		struct v4l2_control *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	/* safety checks */</div><div class='del'>-	retval = si470x_disconnect_check(radio);</div><div class='del'>-	if (retval)</div><div class='del'>-		goto done;</div><div class='del'>-</div><div class='del'>-	switch (ctrl-&gt;id) {</div><div class='del'>-	case V4L2_CID_AUDIO_VOLUME:</div><div class='del'>-		ctrl-&gt;value = radio-&gt;registers[SYSCONFIG2] &amp;</div><div class='del'>-				SYSCONFIG2_VOLUME;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_AUDIO_MUTE:</div><div class='del'>-		ctrl-&gt;value = ((radio-&gt;registers[POWERCFG] &amp;</div><div class='del'>-				POWERCFG_DMUTE) == 0) ? 1 : 0;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		retval = -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	if (retval &lt; 0)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev,</div><div class='del'>-			"get control failed with %d\n", retval);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * si470x_vidioc_s_ctrl - set the value of a control</div><div class='del'>- */</div><div class='del'>-static int si470x_vidioc_s_ctrl(struct file *file, void *priv,</div><div class='del'>-		struct v4l2_control *ctrl)</div><div class='add'>+static int si470x_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='del'>-	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	/* safety checks */</div><div class='del'>-	retval = si470x_disconnect_check(radio);</div><div class='del'>-	if (retval)</div><div class='del'>-		goto done;</div><div class='add'>+	struct si470x_device *radio =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct si470x_device, hdl);</div><div class='ctx'> </div><div class='ctx'> 	switch (ctrl-&gt;id) {</div><div class='ctx'> 	case V4L2_CID_AUDIO_VOLUME:</div><div class='ctx'> 		radio-&gt;registers[SYSCONFIG2] &amp;= ~SYSCONFIG2_VOLUME;</div><div class='del'>-		radio-&gt;registers[SYSCONFIG2] |= ctrl-&gt;value;</div><div class='del'>-		retval = si470x_set_register(radio, SYSCONFIG2);</div><div class='del'>-		break;</div><div class='add'>+		radio-&gt;registers[SYSCONFIG2] |= ctrl-&gt;val;</div><div class='add'>+		return si470x_set_register(radio, SYSCONFIG2);</div><div class='ctx'> 	case V4L2_CID_AUDIO_MUTE:</div><div class='del'>-		if (ctrl-&gt;value == 1)</div><div class='add'>+		if (ctrl-&gt;val)</div><div class='ctx'> 			radio-&gt;registers[POWERCFG] &amp;= ~POWERCFG_DMUTE;</div><div class='ctx'> 		else</div><div class='ctx'> 			radio-&gt;registers[POWERCFG] |= POWERCFG_DMUTE;</div><div class='del'>-		retval = si470x_set_register(radio, POWERCFG);</div><div class='del'>-		break;</div><div class='add'>+		return si470x_set_register(radio, POWERCFG);</div><div class='ctx'> 	default:</div><div class='del'>-		retval = -EINVAL;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	if (retval &lt; 0)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev,</div><div class='del'>-			"set control failed with %d\n", retval);</div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * si470x_vidioc_g_audio - get audio attributes</div><div class='del'>- */</div><div class='del'>-static int si470x_vidioc_g_audio(struct file *file, void *priv,</div><div class='del'>-		struct v4l2_audio *audio)</div><div class='del'>-{</div><div class='del'>-	/* driver constants */</div><div class='del'>-	audio-&gt;index = 0;</div><div class='del'>-	strcpy(audio-&gt;name, "Radio");</div><div class='del'>-	audio-&gt;capability = V4L2_AUDCAP_STEREO;</div><div class='del'>-	audio-&gt;mode = 0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -691,22 +583,14 @@ static int si470x_vidioc_g_tuner(struct file *file, void *priv,</div><div class='ctx'> 		struct v4l2_tuner *tuner)</div><div class='ctx'> {</div><div class='ctx'> 	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	/* safety checks */</div><div class='del'>-	retval = si470x_disconnect_check(radio);</div><div class='del'>-	if (retval)</div><div class='del'>-		goto done;</div><div class='add'>+	int retval;</div><div class='ctx'> </div><div class='del'>-	if (tuner-&gt;index != 0) {</div><div class='del'>-		retval = -EINVAL;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='add'>+	if (tuner-&gt;index != 0)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	retval = si470x_get_register(radio, STATUSRSSI);</div><div class='ctx'> 	if (retval &lt; 0)</div><div class='del'>-		goto done;</div><div class='add'>+		return retval;</div><div class='ctx'> </div><div class='ctx'> 	/* driver constants */</div><div class='ctx'> 	strcpy(tuner-&gt;name, "FM");</div><div class='hunk'>@@ -737,7 +621,7 @@ static int si470x_vidioc_g_tuner(struct file *file, void *priv,</div><div class='ctx'> 	if ((radio-&gt;registers[STATUSRSSI] &amp; STATUSRSSI_ST) == 0)</div><div class='ctx'> 		tuner-&gt;rxsubchans = V4L2_TUNER_SUB_MONO;</div><div class='ctx'> 	else</div><div class='del'>-		tuner-&gt;rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;</div><div class='add'>+		tuner-&gt;rxsubchans = V4L2_TUNER_SUB_STEREO;</div><div class='ctx'> 	/* If there is a reliable method of detecting an RDS channel,</div><div class='ctx'> 	   then this code should check for that before setting this</div><div class='ctx'> 	   RDS subchannel. */</div><div class='hunk'>@@ -754,16 +638,13 @@ static int si470x_vidioc_g_tuner(struct file *file, void *priv,</div><div class='ctx'> 	tuner-&gt;signal = (radio-&gt;registers[STATUSRSSI] &amp; STATUSRSSI_RSSI);</div><div class='ctx'> 	/* the ideal factor is 0xffff/75 = 873,8 */</div><div class='ctx'> 	tuner-&gt;signal = (tuner-&gt;signal * 873) + (8 * tuner-&gt;signal / 10);</div><div class='add'>+	if (tuner-&gt;signal &gt; 0xffff)</div><div class='add'>+		tuner-&gt;signal = 0xffff;</div><div class='ctx'> </div><div class='ctx'> 	/* automatic frequency control: -1: freq to low, 1 freq to high */</div><div class='ctx'> 	/* AFCRL does only indicate that freq. differs, not if too low/high */</div><div class='ctx'> 	tuner-&gt;afc = (radio-&gt;registers[STATUSRSSI] &amp; STATUSRSSI_AFCRL) ? 1 : 0;</div><div class='ctx'> </div><div class='del'>-done:</div><div class='del'>-	if (retval &lt; 0)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev,</div><div class='del'>-			"get tuner failed with %d\n", retval);</div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -775,16 +656,9 @@ static int si470x_vidioc_s_tuner(struct file *file, void *priv,</div><div class='ctx'> 		struct v4l2_tuner *tuner)</div><div class='ctx'> {</div><div class='ctx'> 	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	/* safety checks */</div><div class='del'>-	retval = si470x_disconnect_check(radio);</div><div class='del'>-	if (retval)</div><div class='del'>-		goto done;</div><div class='ctx'> </div><div class='ctx'> 	if (tuner-&gt;index != 0)</div><div class='del'>-		goto done;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* mono/stereo selector */</div><div class='ctx'> 	switch (tuner-&gt;audmode) {</div><div class='hunk'>@@ -792,20 +666,12 @@ static int si470x_vidioc_s_tuner(struct file *file, void *priv,</div><div class='ctx'> 		radio-&gt;registers[POWERCFG] |= POWERCFG_MONO;  /* force mono */</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_TUNER_MODE_STEREO:</div><div class='add'>+	default:</div><div class='ctx'> 		radio-&gt;registers[POWERCFG] &amp;= ~POWERCFG_MONO; /* try stereo */</div><div class='ctx'> 		break;</div><div class='del'>-	default:</div><div class='del'>-		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	retval = si470x_set_register(radio, POWERCFG);</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	if (retval &lt; 0)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev,</div><div class='del'>-			"set tuner failed with %d\n", retval);</div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-	return retval;</div><div class='add'>+	return si470x_set_register(radio, POWERCFG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -816,28 +682,12 @@ static int si470x_vidioc_g_frequency(struct file *file, void *priv,</div><div class='ctx'> 		struct v4l2_frequency *freq)</div><div class='ctx'> {</div><div class='ctx'> 	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval = 0;</div><div class='del'>-</div><div class='del'>-	/* safety checks */</div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	retval = si470x_disconnect_check(radio);</div><div class='del'>-	if (retval)</div><div class='del'>-		goto done;</div><div class='ctx'> </div><div class='del'>-	if (freq-&gt;tuner != 0) {</div><div class='del'>-		retval = -EINVAL;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='add'>+	if (freq-&gt;tuner != 0)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	freq-&gt;type = V4L2_TUNER_RADIO;</div><div class='del'>-	retval = si470x_get_freq(radio, &amp;freq-&gt;frequency);</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	if (retval &lt; 0)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev,</div><div class='del'>-			"get frequency failed with %d\n", retval);</div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-	return retval;</div><div class='add'>+	return si470x_get_freq(radio, &amp;freq-&gt;frequency);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -848,27 +698,11 @@ static int si470x_vidioc_s_frequency(struct file *file, void *priv,</div><div class='ctx'> 		struct v4l2_frequency *freq)</div><div class='ctx'> {</div><div class='ctx'> 	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	/* safety checks */</div><div class='del'>-	retval = si470x_disconnect_check(radio);</div><div class='del'>-	if (retval)</div><div class='del'>-		goto done;</div><div class='ctx'> </div><div class='del'>-	if (freq-&gt;tuner != 0) {</div><div class='del'>-		retval = -EINVAL;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='add'>+	if (freq-&gt;tuner != 0)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	retval = si470x_set_freq(radio, freq-&gt;frequency);</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	if (retval &lt; 0)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev,</div><div class='del'>-			"set frequency failed with %d\n", retval);</div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-	return retval;</div><div class='add'>+	return si470x_set_freq(radio, freq-&gt;frequency);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -879,44 +713,29 @@ static int si470x_vidioc_s_hw_freq_seek(struct file *file, void *priv,</div><div class='ctx'> 		struct v4l2_hw_freq_seek *seek)</div><div class='ctx'> {</div><div class='ctx'> 	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	/* safety checks */</div><div class='del'>-	retval = si470x_disconnect_check(radio);</div><div class='del'>-	if (retval)</div><div class='del'>-		goto done;</div><div class='del'>-</div><div class='del'>-	if (seek-&gt;tuner != 0) {</div><div class='del'>-		retval = -EINVAL;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	retval = si470x_set_seek(radio, seek-&gt;wrap_around, seek-&gt;seek_upward);</div><div class='add'>+	if (seek-&gt;tuner != 0)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-done:</div><div class='del'>-	if (retval &lt; 0)</div><div class='del'>-		dev_warn(&amp;radio-&gt;videodev-&gt;dev,</div><div class='del'>-			"set hardware frequency seek failed with %d\n", retval);</div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-	return retval;</div><div class='add'>+	return si470x_set_seek(radio, seek-&gt;wrap_around, seek-&gt;seek_upward);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+const struct v4l2_ctrl_ops si470x_ctrl_ops = {</div><div class='add'>+	.s_ctrl = si470x_s_ctrl,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * si470x_ioctl_ops - video device ioctl operations</div><div class='ctx'>  */</div><div class='ctx'> static const struct v4l2_ioctl_ops si470x_ioctl_ops = {</div><div class='ctx'> 	.vidioc_querycap	= si470x_vidioc_querycap,</div><div class='del'>-	.vidioc_queryctrl	= si470x_vidioc_queryctrl,</div><div class='del'>-	.vidioc_g_ctrl		= si470x_vidioc_g_ctrl,</div><div class='del'>-	.vidioc_s_ctrl		= si470x_vidioc_s_ctrl,</div><div class='del'>-	.vidioc_g_audio		= si470x_vidioc_g_audio,</div><div class='ctx'> 	.vidioc_g_tuner		= si470x_vidioc_g_tuner,</div><div class='ctx'> 	.vidioc_s_tuner		= si470x_vidioc_s_tuner,</div><div class='ctx'> 	.vidioc_g_frequency	= si470x_vidioc_g_frequency,</div><div class='ctx'> 	.vidioc_s_frequency	= si470x_vidioc_s_frequency,</div><div class='ctx'> 	.vidioc_s_hw_freq_seek	= si470x_vidioc_s_hw_freq_seek,</div><div class='add'>+	.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,</div><div class='add'>+	.vidioc_unsubscribe_event = v4l2_event_unsubscribe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -926,6 +745,6 @@ static const struct v4l2_ioctl_ops si470x_ioctl_ops = {</div><div class='ctx'> struct video_device si470x_viddev_template = {</div><div class='ctx'> 	.fops			= &amp;si470x_fops,</div><div class='ctx'> 	.name			= DRIVER_NAME,</div><div class='del'>-	.release		= video_device_release,</div><div class='add'>+	.release		= video_device_release_empty,</div><div class='ctx'> 	.ioctl_ops		= &amp;si470x_ioctl_ops,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/media/radio/si470x/radio-si470x-i2c.c b/drivers/media/radio/si470x/radio-si470x-i2c.c<br/>index 9b546a5523f3..a80044c5874e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/si470x/radio-si470x-i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/si470x/radio-si470x-i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/si470x/radio-si470x-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/si470x/radio-si470x-i2c.c</a></div><div class='hunk'>@@ -162,20 +162,6 @@ static int si470x_get_all_registers(struct si470x_device *radio)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /**************************************************************************</div><div class='del'>- * General Driver Functions - DISCONNECT_CHECK</div><div class='del'>- **************************************************************************/</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * si470x_disconnect_check - check whether radio disconnects</div><div class='del'>- */</div><div class='del'>-int si470x_disconnect_check(struct si470x_device *radio)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**************************************************************************</div><div class='ctx'>  * File Operations Interface</div><div class='ctx'>  **************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -185,12 +171,12 @@ int si470x_disconnect_check(struct si470x_device *radio)</div><div class='ctx'> int si470x_fops_open(struct file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval = 0;</div><div class='add'>+	int retval = v4l2_fh_open(file);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	radio-&gt;users++;</div><div class='add'>+	if (retval)</div><div class='add'>+		return retval;</div><div class='ctx'> </div><div class='del'>-	if (radio-&gt;users == 1) {</div><div class='add'>+	if (v4l2_fh_is_singular_file(file)) {</div><div class='ctx'> 		/* start radio */</div><div class='ctx'> 		retval = si470x_start(radio);</div><div class='ctx'> 		if (retval &lt; 0)</div><div class='hunk'>@@ -205,7 +191,8 @@ int si470x_fops_open(struct file *file)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='add'>+	if (retval)</div><div class='add'>+		v4l2_fh_release(file);</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -216,21 +203,12 @@ done:</div><div class='ctx'> int si470x_fops_release(struct file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval = 0;</div><div class='del'>-</div><div class='del'>-	/* safety check */</div><div class='del'>-	if (!radio)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	radio-&gt;users--;</div><div class='del'>-	if (radio-&gt;users == 0)</div><div class='add'>+	if (v4l2_fh_is_singular_file(file))</div><div class='ctx'> 		/* stop radio */</div><div class='del'>-		retval = si470x_stop(radio);</div><div class='add'>+		si470x_stop(radio);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='add'>+	return v4l2_fh_release(file);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -371,32 +349,25 @@ static int __devinit si470x_i2c_probe(struct i2c_client *client,</div><div class='ctx'> 		goto err_initial;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	radio-&gt;users = 0;</div><div class='ctx'> 	radio-&gt;client = client;</div><div class='ctx'> 	mutex_init(&amp;radio-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	/* video device allocation and initialization */</div><div class='del'>-	radio-&gt;videodev = video_device_alloc();</div><div class='del'>-	if (!radio-&gt;videodev) {</div><div class='del'>-		retval = -ENOMEM;</div><div class='del'>-		goto err_radio;</div><div class='del'>-	}</div><div class='del'>-	memcpy(radio-&gt;videodev, &amp;si470x_viddev_template,</div><div class='del'>-			sizeof(si470x_viddev_template));</div><div class='del'>-	video_set_drvdata(radio-&gt;videodev, radio);</div><div class='add'>+	/* video device initialization */</div><div class='add'>+	radio-&gt;videodev = si470x_viddev_template;</div><div class='add'>+	video_set_drvdata(&amp;radio-&gt;videodev, radio);</div><div class='ctx'> </div><div class='ctx'> 	/* power up : need 110ms */</div><div class='ctx'> 	radio-&gt;registers[POWERCFG] = POWERCFG_ENABLE;</div><div class='ctx'> 	if (si470x_set_register(radio, POWERCFG) &lt; 0) {</div><div class='ctx'> 		retval = -EIO;</div><div class='del'>-		goto err_video;</div><div class='add'>+		goto err_radio;</div><div class='ctx'> 	}</div><div class='ctx'> 	msleep(110);</div><div class='ctx'> </div><div class='ctx'> 	/* get device and chip versions */</div><div class='ctx'> 	if (si470x_get_all_registers(radio) &lt; 0) {</div><div class='ctx'> 		retval = -EIO;</div><div class='del'>-		goto err_video;</div><div class='add'>+		goto err_radio;</div><div class='ctx'> 	}</div><div class='ctx'> 	dev_info(&amp;client-&gt;dev, "DeviceID=0x%4.4hx ChipID=0x%4.4hx\n",</div><div class='ctx'> 			radio-&gt;registers[DEVICEID], radio-&gt;registers[CHIPID]);</div><div class='hunk'>@@ -427,7 +398,7 @@ static int __devinit si470x_i2c_probe(struct i2c_client *client,</div><div class='ctx'> 	radio-&gt;buffer = kmalloc(radio-&gt;buf_size, GFP_KERNEL);</div><div class='ctx'> 	if (!radio-&gt;buffer) {</div><div class='ctx'> 		retval = -EIO;</div><div class='del'>-		goto err_video;</div><div class='add'>+		goto err_radio;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* rds buffer configuration */</div><div class='hunk'>@@ -447,7 +418,7 @@ static int __devinit si470x_i2c_probe(struct i2c_client *client,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* register video device */</div><div class='del'>-	retval = video_register_device(radio-&gt;videodev, VFL_TYPE_RADIO,</div><div class='add'>+	retval = video_register_device(&amp;radio-&gt;videodev, VFL_TYPE_RADIO,</div><div class='ctx'> 			radio_nr);</div><div class='ctx'> 	if (retval) {</div><div class='ctx'> 		dev_warn(&amp;client-&gt;dev, "Could not register video device\n");</div><div class='hunk'>@@ -460,8 +431,6 @@ err_all:</div><div class='ctx'> 	free_irq(client-&gt;irq, radio);</div><div class='ctx'> err_rds:</div><div class='ctx'> 	kfree(radio-&gt;buffer);</div><div class='del'>-err_video:</div><div class='del'>-	video_device_release(radio-&gt;videodev);</div><div class='ctx'> err_radio:</div><div class='ctx'> 	kfree(radio);</div><div class='ctx'> err_initial:</div><div class='hunk'>@@ -477,7 +446,7 @@ static __devexit int si470x_i2c_remove(struct i2c_client *client)</div><div class='ctx'> 	struct si470x_device *radio = i2c_get_clientdata(client);</div><div class='ctx'> </div><div class='ctx'> 	free_irq(client-&gt;irq, radio);</div><div class='del'>-	video_unregister_device(radio-&gt;videodev);</div><div class='add'>+	video_unregister_device(&amp;radio-&gt;videodev);</div><div class='ctx'> 	kfree(radio);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/media/radio/si470x/radio-si470x-usb.c b/drivers/media/radio/si470x/radio-si470x-usb.c<br/>index b7debb67932a..e9f638761296 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/si470x/radio-si470x-usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/si470x/radio-si470x-usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/si470x/radio-si470x-usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/si470x/radio-si470x-usb.c</a></div><div class='hunk'>@@ -367,23 +367,6 @@ static int si470x_get_scratch_page_versions(struct si470x_device *radio)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /**************************************************************************</div><div class='del'>- * General Driver Functions - DISCONNECT_CHECK</div><div class='del'>- **************************************************************************/</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * si470x_disconnect_check - check whether radio disconnects</div><div class='del'>- */</div><div class='del'>-int si470x_disconnect_check(struct si470x_device *radio)</div><div class='del'>-{</div><div class='del'>-	if (radio-&gt;disconnected)</div><div class='del'>-		return -EIO;</div><div class='del'>-	else</div><div class='del'>-		return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**************************************************************************</div><div class='ctx'>  * RDS Driver Functions</div><div class='ctx'>  **************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -414,9 +397,6 @@ static void si470x_int_in_callback(struct urb *urb)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* safety checks */</div><div class='del'>-	if (radio-&gt;disconnected)</div><div class='del'>-		return;</div><div class='ctx'> 	if ((radio-&gt;registers[SYSCONFIG1] &amp; SYSCONFIG1_RDS) == 0)</div><div class='ctx'> 		goto resubmit;</div><div class='ctx'> </div><div class='hunk'>@@ -501,112 +481,30 @@ resubmit:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/**************************************************************************</div><div class='del'>- * File Operations Interface</div><div class='del'>- **************************************************************************/</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * si470x_fops_open - file open</div><div class='del'>- */</div><div class='ctx'> int si470x_fops_open(struct file *file)</div><div class='ctx'> {</div><div class='del'>-	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	radio-&gt;users++;</div><div class='del'>-</div><div class='del'>-	retval = usb_autopm_get_interface(radio-&gt;intf);</div><div class='del'>-	if (retval &lt; 0) {</div><div class='del'>-		radio-&gt;users--;</div><div class='del'>-		retval = -EIO;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (radio-&gt;users == 1) {</div><div class='del'>-		/* start radio */</div><div class='del'>-		retval = si470x_start(radio);</div><div class='del'>-		if (retval &lt; 0) {</div><div class='del'>-			usb_autopm_put_interface(radio-&gt;intf);</div><div class='del'>-			goto done;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* initialize interrupt urb */</div><div class='del'>-		usb_fill_int_urb(radio-&gt;int_in_urb, radio-&gt;usbdev,</div><div class='del'>-			usb_rcvintpipe(radio-&gt;usbdev,</div><div class='del'>-			radio-&gt;int_in_endpoint-&gt;bEndpointAddress),</div><div class='del'>-			radio-&gt;int_in_buffer,</div><div class='del'>-			le16_to_cpu(radio-&gt;int_in_endpoint-&gt;wMaxPacketSize),</div><div class='del'>-			si470x_int_in_callback,</div><div class='del'>-			radio,</div><div class='del'>-			radio-&gt;int_in_endpoint-&gt;bInterval);</div><div class='del'>-</div><div class='del'>-		radio-&gt;int_in_running = 1;</div><div class='del'>-		mb();</div><div class='del'>-</div><div class='del'>-		retval = usb_submit_urb(radio-&gt;int_in_urb, GFP_KERNEL);</div><div class='del'>-		if (retval) {</div><div class='del'>-			dev_info(&amp;radio-&gt;intf-&gt;dev,</div><div class='del'>-				 "submitting int urb failed (%d)\n", retval);</div><div class='del'>-			radio-&gt;int_in_running = 0;</div><div class='del'>-			usb_autopm_put_interface(radio-&gt;intf);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-	return retval;</div><div class='add'>+	return v4l2_fh_open(file);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * si470x_fops_release - file release</div><div class='del'>- */</div><div class='ctx'> int si470x_fops_release(struct file *file)</div><div class='ctx'> {</div><div class='del'>-	struct si470x_device *radio = video_drvdata(file);</div><div class='del'>-	int retval = 0;</div><div class='del'>-</div><div class='del'>-	/* safety check */</div><div class='del'>-	if (!radio) {</div><div class='del'>-		retval = -ENODEV;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	radio-&gt;users--;</div><div class='del'>-	if (radio-&gt;users == 0) {</div><div class='del'>-		/* shutdown interrupt handler */</div><div class='del'>-		if (radio-&gt;int_in_running) {</div><div class='del'>-			radio-&gt;int_in_running = 0;</div><div class='del'>-		if (radio-&gt;int_in_urb)</div><div class='del'>-			usb_kill_urb(radio-&gt;int_in_urb);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (radio-&gt;disconnected) {</div><div class='del'>-			video_unregister_device(radio-&gt;videodev);</div><div class='del'>-			kfree(radio-&gt;int_in_buffer);</div><div class='del'>-			kfree(radio-&gt;buffer);</div><div class='del'>-			mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-			kfree(radio);</div><div class='del'>-			goto done;</div><div class='del'>-		}</div><div class='add'>+	return v4l2_fh_release(file);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		/* cancel read processes */</div><div class='del'>-		wake_up_interruptible(&amp;radio-&gt;read_queue);</div><div class='add'>+static void si470x_usb_release(struct v4l2_device *v4l2_dev)</div><div class='add'>+{</div><div class='add'>+	struct si470x_device *radio =</div><div class='add'>+		container_of(v4l2_dev, struct si470x_device, v4l2_dev);</div><div class='ctx'> </div><div class='del'>-		/* stop radio */</div><div class='del'>-		retval = si470x_stop(radio);</div><div class='del'>-		usb_autopm_put_interface(radio-&gt;intf);</div><div class='del'>-	}</div><div class='del'>-	mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-done:</div><div class='del'>-	return retval;</div><div class='add'>+	usb_free_urb(radio-&gt;int_in_urb);</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;radio-&gt;hdl);</div><div class='add'>+	v4l2_device_unregister(&amp;radio-&gt;v4l2_dev);</div><div class='add'>+	kfree(radio-&gt;int_in_buffer);</div><div class='add'>+	kfree(radio-&gt;buffer);</div><div class='add'>+	kfree(radio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /**************************************************************************</div><div class='ctx'>  * Video4Linux Interface</div><div class='ctx'>  **************************************************************************/</div><div class='hunk'>@@ -623,13 +521,45 @@ int si470x_vidioc_querycap(struct file *file, void *priv,</div><div class='ctx'> 	strlcpy(capability-&gt;card, DRIVER_CARD, sizeof(capability-&gt;card));</div><div class='ctx'> 	usb_make_path(radio-&gt;usbdev, capability-&gt;bus_info,</div><div class='ctx'> 			sizeof(capability-&gt;bus_info));</div><div class='del'>-	capability-&gt;capabilities = V4L2_CAP_HW_FREQ_SEEK |</div><div class='add'>+	capability-&gt;device_caps = V4L2_CAP_HW_FREQ_SEEK |</div><div class='ctx'> 		V4L2_CAP_TUNER | V4L2_CAP_RADIO | V4L2_CAP_RDS_CAPTURE;</div><div class='del'>-</div><div class='add'>+	capability-&gt;capabilities = capability-&gt;device_caps | V4L2_CAP_DEVICE_CAPS;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+static int si470x_start_usb(struct si470x_device *radio)</div><div class='add'>+{</div><div class='add'>+	int retval;</div><div class='add'>+</div><div class='add'>+	/* start radio */</div><div class='add'>+	retval = si470x_start(radio);</div><div class='add'>+	if (retval &lt; 0)</div><div class='add'>+		return retval;</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_handler_setup(&amp;radio-&gt;hdl);</div><div class='add'>+</div><div class='add'>+	/* initialize interrupt urb */</div><div class='add'>+	usb_fill_int_urb(radio-&gt;int_in_urb, radio-&gt;usbdev,</div><div class='add'>+			usb_rcvintpipe(radio-&gt;usbdev,</div><div class='add'>+				radio-&gt;int_in_endpoint-&gt;bEndpointAddress),</div><div class='add'>+			radio-&gt;int_in_buffer,</div><div class='add'>+			le16_to_cpu(radio-&gt;int_in_endpoint-&gt;wMaxPacketSize),</div><div class='add'>+			si470x_int_in_callback,</div><div class='add'>+			radio,</div><div class='add'>+			radio-&gt;int_in_endpoint-&gt;bInterval);</div><div class='add'>+</div><div class='add'>+	radio-&gt;int_in_running = 1;</div><div class='add'>+	mb();</div><div class='add'>+</div><div class='add'>+	retval = usb_submit_urb(radio-&gt;int_in_urb, GFP_KERNEL);</div><div class='add'>+	if (retval) {</div><div class='add'>+		dev_info(&amp;radio-&gt;intf-&gt;dev,</div><div class='add'>+				"submitting int urb failed (%d)\n", retval);</div><div class='add'>+		radio-&gt;int_in_running = 0;</div><div class='add'>+	}</div><div class='add'>+	return retval;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /**************************************************************************</div><div class='ctx'>  * USB Interface</div><div class='hunk'>@@ -653,8 +583,6 @@ static int si470x_usb_driver_probe(struct usb_interface *intf,</div><div class='ctx'> 		retval = -ENOMEM;</div><div class='ctx'> 		goto err_initial;</div><div class='ctx'> 	}</div><div class='del'>-	radio-&gt;users = 0;</div><div class='del'>-	radio-&gt;disconnected = 0;</div><div class='ctx'> 	radio-&gt;usbdev = interface_to_usbdev(intf);</div><div class='ctx'> 	radio-&gt;intf = intf;</div><div class='ctx'> 	mutex_init(&amp;radio-&gt;lock);</div><div class='hunk'>@@ -691,20 +619,35 @@ static int si470x_usb_driver_probe(struct usb_interface *intf,</div><div class='ctx'> 		goto err_intbuffer;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* video device allocation and initialization */</div><div class='del'>-	radio-&gt;videodev = video_device_alloc();</div><div class='del'>-	if (!radio-&gt;videodev) {</div><div class='del'>-		retval = -ENOMEM;</div><div class='add'>+	radio-&gt;v4l2_dev.release = si470x_usb_release;</div><div class='add'>+	retval = v4l2_device_register(&amp;intf-&gt;dev, &amp;radio-&gt;v4l2_dev);</div><div class='add'>+	if (retval &lt; 0) {</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "couldn't register v4l2_device\n");</div><div class='ctx'> 		goto err_urb;</div><div class='ctx'> 	}</div><div class='del'>-	memcpy(radio-&gt;videodev, &amp;si470x_viddev_template,</div><div class='del'>-			sizeof(si470x_viddev_template));</div><div class='del'>-	video_set_drvdata(radio-&gt;videodev, radio);</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_handler_init(&amp;radio-&gt;hdl, 2);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;radio-&gt;hdl, &amp;si470x_ctrl_ops,</div><div class='add'>+			  V4L2_CID_AUDIO_MUTE, 0, 1, 1, 1);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;radio-&gt;hdl, &amp;si470x_ctrl_ops,</div><div class='add'>+			  V4L2_CID_AUDIO_VOLUME, 0, 15, 1, 15);</div><div class='add'>+	if (radio-&gt;hdl.error) {</div><div class='add'>+		retval = radio-&gt;hdl.error;</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "couldn't register control\n");</div><div class='add'>+		goto err_dev;</div><div class='add'>+	}</div><div class='add'>+	radio-&gt;videodev = si470x_viddev_template;</div><div class='add'>+	radio-&gt;videodev.ctrl_handler = &amp;radio-&gt;hdl;</div><div class='add'>+	radio-&gt;videodev.lock = &amp;radio-&gt;lock;</div><div class='add'>+	radio-&gt;videodev.v4l2_dev = &amp;radio-&gt;v4l2_dev;</div><div class='add'>+	radio-&gt;videodev.release = video_device_release_empty;</div><div class='add'>+	set_bit(V4L2_FL_USE_FH_PRIO, &amp;radio-&gt;videodev.flags);</div><div class='add'>+	video_set_drvdata(&amp;radio-&gt;videodev, radio);</div><div class='ctx'> </div><div class='ctx'> 	/* get device and chip versions */</div><div class='ctx'> 	if (si470x_get_all_registers(radio) &lt; 0) {</div><div class='ctx'> 		retval = -EIO;</div><div class='del'>-		goto err_video;</div><div class='add'>+		goto err_ctrl;</div><div class='ctx'> 	}</div><div class='ctx'> 	dev_info(&amp;intf-&gt;dev, "DeviceID=0x%4.4hx ChipID=0x%4.4hx\n",</div><div class='ctx'> 			radio-&gt;registers[DEVICEID], radio-&gt;registers[CHIPID]);</div><div class='hunk'>@@ -721,7 +664,7 @@ static int si470x_usb_driver_probe(struct usb_interface *intf,</div><div class='ctx'> 	/* get software and hardware versions */</div><div class='ctx'> 	if (si470x_get_scratch_page_versions(radio) &lt; 0) {</div><div class='ctx'> 		retval = -EIO;</div><div class='del'>-		goto err_video;</div><div class='add'>+		goto err_ctrl;</div><div class='ctx'> 	}</div><div class='ctx'> 	dev_info(&amp;intf-&gt;dev, "software version %d, hardware version %d\n",</div><div class='ctx'> 			radio-&gt;software_version, radio-&gt;hardware_version);</div><div class='hunk'>@@ -764,28 +707,35 @@ static int si470x_usb_driver_probe(struct usb_interface *intf,</div><div class='ctx'> 	radio-&gt;buffer = kmalloc(radio-&gt;buf_size, GFP_KERNEL);</div><div class='ctx'> 	if (!radio-&gt;buffer) {</div><div class='ctx'> 		retval = -EIO;</div><div class='del'>-		goto err_video;</div><div class='add'>+		goto err_ctrl;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* rds buffer configuration */</div><div class='ctx'> 	radio-&gt;wr_index = 0;</div><div class='ctx'> 	radio-&gt;rd_index = 0;</div><div class='ctx'> 	init_waitqueue_head(&amp;radio-&gt;read_queue);</div><div class='add'>+	usb_set_intfdata(intf, radio);</div><div class='add'>+</div><div class='add'>+	/* start radio */</div><div class='add'>+	retval = si470x_start_usb(radio);</div><div class='add'>+	if (retval &lt; 0)</div><div class='add'>+		goto err_all;</div><div class='ctx'> </div><div class='ctx'> 	/* register video device */</div><div class='del'>-	retval = video_register_device(radio-&gt;videodev, VFL_TYPE_RADIO,</div><div class='add'>+	retval = video_register_device(&amp;radio-&gt;videodev, VFL_TYPE_RADIO,</div><div class='ctx'> 			radio_nr);</div><div class='ctx'> 	if (retval) {</div><div class='del'>-		dev_warn(&amp;intf-&gt;dev, "Could not register video device\n");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Could not register video device\n");</div><div class='ctx'> 		goto err_all;</div><div class='ctx'> 	}</div><div class='del'>-	usb_set_intfdata(intf, radio);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> err_all:</div><div class='ctx'> 	kfree(radio-&gt;buffer);</div><div class='del'>-err_video:</div><div class='del'>-	video_device_release(radio-&gt;videodev);</div><div class='add'>+err_ctrl:</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;radio-&gt;hdl);</div><div class='add'>+err_dev:</div><div class='add'>+	v4l2_device_unregister(&amp;radio-&gt;v4l2_dev);</div><div class='ctx'> err_urb:</div><div class='ctx'> 	usb_free_urb(radio-&gt;int_in_urb);</div><div class='ctx'> err_intbuffer:</div><div class='hunk'>@@ -803,8 +753,22 @@ err_initial:</div><div class='ctx'> static int si470x_usb_driver_suspend(struct usb_interface *intf,</div><div class='ctx'> 		pm_message_t message)</div><div class='ctx'> {</div><div class='add'>+	struct si470x_device *radio = usb_get_intfdata(intf);</div><div class='add'>+</div><div class='ctx'> 	dev_info(&amp;intf-&gt;dev, "suspending now...\n");</div><div class='ctx'> </div><div class='add'>+	/* shutdown interrupt handler */</div><div class='add'>+	if (radio-&gt;int_in_running) {</div><div class='add'>+		radio-&gt;int_in_running = 0;</div><div class='add'>+		if (radio-&gt;int_in_urb)</div><div class='add'>+			usb_kill_urb(radio-&gt;int_in_urb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* cancel read processes */</div><div class='add'>+	wake_up_interruptible(&amp;radio-&gt;read_queue);</div><div class='add'>+</div><div class='add'>+	/* stop radio */</div><div class='add'>+	si470x_stop(radio);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -814,9 +778,12 @@ static int si470x_usb_driver_suspend(struct usb_interface *intf,</div><div class='ctx'>  */</div><div class='ctx'> static int si470x_usb_driver_resume(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='add'>+	struct si470x_device *radio = usb_get_intfdata(intf);</div><div class='add'>+</div><div class='ctx'> 	dev_info(&amp;intf-&gt;dev, "resuming now...\n");</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* start radio */</div><div class='add'>+	return si470x_start_usb(radio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -828,28 +795,22 @@ static void si470x_usb_driver_disconnect(struct usb_interface *intf)</div><div class='ctx'> 	struct si470x_device *radio = usb_get_intfdata(intf);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;radio-&gt;lock);</div><div class='del'>-	radio-&gt;disconnected = 1;</div><div class='add'>+	v4l2_device_disconnect(&amp;radio-&gt;v4l2_dev);</div><div class='add'>+	video_unregister_device(&amp;radio-&gt;videodev);</div><div class='ctx'> 	usb_set_intfdata(intf, NULL);</div><div class='del'>-	if (radio-&gt;users == 0) {</div><div class='del'>-		/* set led to disconnect state */</div><div class='del'>-		si470x_set_led_state(radio, BLINK_ORANGE_LED);</div><div class='del'>-</div><div class='del'>-		/* Free data structures. */</div><div class='del'>-		usb_free_urb(radio-&gt;int_in_urb);</div><div class='del'>-</div><div class='del'>-		kfree(radio-&gt;int_in_buffer);</div><div class='del'>-		video_unregister_device(radio-&gt;videodev);</div><div class='del'>-		kfree(radio-&gt;buffer);</div><div class='del'>-		mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-		kfree(radio);</div><div class='del'>-	} else {</div><div class='del'>-		mutex_unlock(&amp;radio-&gt;lock);</div><div class='del'>-	}</div><div class='add'>+	mutex_unlock(&amp;radio-&gt;lock);</div><div class='add'>+	v4l2_device_put(&amp;radio-&gt;v4l2_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * si470x_usb_driver - usb driver interface</div><div class='add'>+ *</div><div class='add'>+ * A note on suspend/resume: this driver had only empty suspend/resume</div><div class='add'>+ * functions, and when I tried to test suspend/resume it always disconnected</div><div class='add'>+ * instead of resuming (using my ADS InstantFM stick). So I've decided to</div><div class='add'>+ * remove these callbacks until someone else with better hardware can</div><div class='add'>+ * implement and test this.</div><div class='ctx'>  */</div><div class='ctx'> static struct usb_driver si470x_usb_driver = {</div><div class='ctx'> 	.name			= DRIVER_NAME,</div><div class='hunk'>@@ -857,8 +818,8 @@ static struct usb_driver si470x_usb_driver = {</div><div class='ctx'> 	.disconnect		= si470x_usb_driver_disconnect,</div><div class='ctx'> 	.suspend		= si470x_usb_driver_suspend,</div><div class='ctx'> 	.resume			= si470x_usb_driver_resume,</div><div class='add'>+	.reset_resume		= si470x_usb_driver_resume,</div><div class='ctx'> 	.id_table		= si470x_usb_driver_id_table,</div><div class='del'>-	.supports_autosuspend	= 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(si470x_usb_driver);</div><div class='head'>diff --git a/drivers/media/radio/si470x/radio-si470x.h b/drivers/media/radio/si470x/radio-si470x.h<br/>index f300a55ed85c..4921cab8e0fa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/si470x/radio-si470x.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/si470x/radio-si470x.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/si470x/radio-si470x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/si470x/radio-si470x.h</a></div><div class='hunk'>@@ -36,6 +36,9 @@</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-common.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='add'>+#include &lt;media/v4l2-device.h&gt;</div><div class='ctx'> #include &lt;asm/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -141,10 +144,9 @@</div><div class='ctx'>  * si470x_device - private data</div><div class='ctx'>  */</div><div class='ctx'> struct si470x_device {</div><div class='del'>-	struct video_device *videodev;</div><div class='del'>-</div><div class='del'>-	/* driver management */</div><div class='del'>-	unsigned int users;</div><div class='add'>+	struct v4l2_device v4l2_dev;</div><div class='add'>+	struct video_device videodev;</div><div class='add'>+	struct v4l2_ctrl_handler hdl;</div><div class='ctx'> </div><div class='ctx'> 	/* Silabs internal registers (0..15) */</div><div class='ctx'> 	unsigned short registers[RADIO_REGISTER_NUM];</div><div class='hunk'>@@ -174,9 +176,6 @@ struct si470x_device {</div><div class='ctx'> 	/* scratch page */</div><div class='ctx'> 	unsigned char software_version;</div><div class='ctx'> 	unsigned char hardware_version;</div><div class='del'>-</div><div class='del'>-	/* driver management */</div><div class='del'>-	unsigned char disconnected;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_I2C_SI470X) || defined(CONFIG_I2C_SI470X_MODULE)</div><div class='hunk'>@@ -213,6 +212,7 @@ struct si470x_device {</div><div class='ctx'>  * Common Functions</div><div class='ctx'>  **************************************************************************/</div><div class='ctx'> extern struct video_device si470x_viddev_template;</div><div class='add'>+extern const struct v4l2_ctrl_ops si470x_ctrl_ops;</div><div class='ctx'> int si470x_get_register(struct si470x_device *radio, int regnr);</div><div class='ctx'> int si470x_set_register(struct si470x_device *radio, int regnr);</div><div class='ctx'> int si470x_disconnect_check(struct si470x_device *radio);</div><div class='head'>diff --git a/drivers/media/radio/tef6862.c b/drivers/media/radio/tef6862.c<br/>index 6418c4c9faf1..06d47e5cce9f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/tef6862.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/tef6862.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/tef6862.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/tef6862.c</a></div><div class='hunk'>@@ -211,7 +211,7 @@ static struct i2c_driver tef6862_driver = {</div><div class='ctx'> 		.name	= DRIVER_NAME,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= tef6862_probe,</div><div class='del'>-	.remove		= tef6862_remove,</div><div class='add'>+	.remove		= __devexit_p(tef6862_remove),</div><div class='ctx'> 	.id_table	= tef6862_id,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/radio/wl128x/fmdrv_v4l2.c b/drivers/media/radio/wl128x/fmdrv_v4l2.c<br/>index 077d369a0173..080b96a61f1a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/radio/wl128x/fmdrv_v4l2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/radio/wl128x/fmdrv_v4l2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/radio/wl128x/fmdrv_v4l2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/radio/wl128x/fmdrv_v4l2.c</a></div><div class='hunk'>@@ -518,6 +518,10 @@ int fm_v4l2_init_video_device(struct fmdev *fmdev, int radio_nr)</div><div class='ctx'> 	video_set_drvdata(gradio_dev, fmdev);</div><div class='ctx'> </div><div class='ctx'> 	gradio_dev-&gt;lock = &amp;fmdev-&gt;mutex;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;gradio_dev-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	/* Register with V4L2 subsystem as RADIO device */</div><div class='ctx'> 	if (video_register_device(gradio_dev, VFL_TYPE_RADIO, radio_nr)) {</div><div class='head'>diff --git a/drivers/media/rc/Kconfig b/drivers/media/rc/Kconfig<br/>index a3fbb21350e9..f97eeb870455 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/Kconfig</a></div><div class='hunk'>@@ -69,6 +69,7 @@ config IR_JVC_DECODER</div><div class='ctx'> config IR_SONY_DECODER</div><div class='ctx'> 	tristate "Enable IR raw decoder for the Sony protocol"</div><div class='ctx'> 	depends on RC_CORE</div><div class='add'>+	select BITREVERSE</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='ctx'> 	---help---</div><div class='head'>diff --git a/drivers/media/rc/ati_remote.c b/drivers/media/rc/ati_remote.c<br/>index baf907b3ce76..7be377fc1be8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/ati_remote.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/ati_remote.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/ati_remote.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/ati_remote.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  USB ATI Remote support</div><div class='ctx'>  *</div><div class='del'>- *                Copyright (c) 2011 Anssi Hannula &lt;anssi.hannula@iki.fi&gt;</div><div class='add'>+ *                Copyright (c) 2011, 2012 Anssi Hannula &lt;anssi.hannula@iki.fi&gt;</div><div class='ctx'>  *  Version 2.2.0 Copyright (c) 2004 Torrey Hoffman &lt;thoffman@arnor.net&gt;</div><div class='ctx'>  *  Version 2.1.1 Copyright (c) 2002 Vladimir Dergachev</div><div class='ctx'>  *</div><div class='hunk'>@@ -151,13 +151,57 @@ MODULE_PARM_DESC(mouse, "Enable mouse device, default = yes");</div><div class='ctx'> #undef err</div><div class='ctx'> #define err(format, arg...) printk(KERN_ERR format , ## arg)</div><div class='ctx'> </div><div class='add'>+struct ati_receiver_type {</div><div class='add'>+	/* either default_keymap or get_default_keymap should be set */</div><div class='add'>+	const char *default_keymap;</div><div class='add'>+	const char *(*get_default_keymap)(struct usb_interface *interface);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *get_medion_keymap(struct usb_interface *interface)</div><div class='add'>+{</div><div class='add'>+	struct usb_device *udev = interface_to_usbdev(interface);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * There are many different Medion remotes shipped with a receiver</div><div class='add'>+	 * with the same usb id, but the receivers have subtle differences</div><div class='add'>+	 * in the USB descriptors allowing us to detect them.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (udev-&gt;manufacturer &amp;&amp; udev-&gt;product) {</div><div class='add'>+		if (udev-&gt;actconfig-&gt;desc.bmAttributes &amp; USB_CONFIG_ATT_WAKEUP) {</div><div class='add'>+</div><div class='add'>+			if (!strcmp(udev-&gt;manufacturer, "X10 Wireless Technology Inc")</div><div class='add'>+			    &amp;&amp; !strcmp(udev-&gt;product, "USB Receiver"))</div><div class='add'>+				return RC_MAP_MEDION_X10_DIGITAINER;</div><div class='add'>+</div><div class='add'>+			if (!strcmp(udev-&gt;manufacturer, "X10 WTI")</div><div class='add'>+			    &amp;&amp; !strcmp(udev-&gt;product, "RF receiver"))</div><div class='add'>+				return RC_MAP_MEDION_X10_OR2X;</div><div class='add'>+		} else {</div><div class='add'>+</div><div class='add'>+			 if (!strcmp(udev-&gt;manufacturer, "X10 Wireless Technology Inc")</div><div class='add'>+			    &amp;&amp; !strcmp(udev-&gt;product, "USB Receiver"))</div><div class='add'>+				return RC_MAP_MEDION_X10;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;interface-&gt;dev,</div><div class='add'>+		 "Unknown Medion X10 receiver, using default ati_remote Medion keymap\n");</div><div class='add'>+</div><div class='add'>+	return RC_MAP_MEDION_X10;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ati_receiver_type type_ati		= { .default_keymap = RC_MAP_ATI_X10 };</div><div class='add'>+static const struct ati_receiver_type type_medion	= { .get_default_keymap = get_medion_keymap };</div><div class='add'>+static const struct ati_receiver_type type_firefly	= { .default_keymap = RC_MAP_SNAPSTREAM_FIREFLY };</div><div class='add'>+</div><div class='ctx'> static struct usb_device_id ati_remote_table[] = {</div><div class='del'>-	{ USB_DEVICE(ATI_REMOTE_VENDOR_ID, LOLA_REMOTE_PRODUCT_ID),	.driver_info = (unsigned long)RC_MAP_ATI_X10 },</div><div class='del'>-	{ USB_DEVICE(ATI_REMOTE_VENDOR_ID, LOLA2_REMOTE_PRODUCT_ID),	.driver_info = (unsigned long)RC_MAP_ATI_X10 },</div><div class='del'>-	{ USB_DEVICE(ATI_REMOTE_VENDOR_ID, ATI_REMOTE_PRODUCT_ID),	.driver_info = (unsigned long)RC_MAP_ATI_X10 },</div><div class='del'>-	{ USB_DEVICE(ATI_REMOTE_VENDOR_ID, NVIDIA_REMOTE_PRODUCT_ID),	.driver_info = (unsigned long)RC_MAP_ATI_X10 },</div><div class='del'>-	{ USB_DEVICE(ATI_REMOTE_VENDOR_ID, MEDION_REMOTE_PRODUCT_ID),	.driver_info = (unsigned long)RC_MAP_MEDION_X10 },</div><div class='del'>-	{ USB_DEVICE(ATI_REMOTE_VENDOR_ID, FIREFLY_REMOTE_PRODUCT_ID),	.driver_info = (unsigned long)RC_MAP_SNAPSTREAM_FIREFLY },</div><div class='add'>+	{ USB_DEVICE(ATI_REMOTE_VENDOR_ID, LOLA_REMOTE_PRODUCT_ID),	.driver_info = (unsigned long)&amp;type_ati },</div><div class='add'>+	{ USB_DEVICE(ATI_REMOTE_VENDOR_ID, LOLA2_REMOTE_PRODUCT_ID),	.driver_info = (unsigned long)&amp;type_ati },</div><div class='add'>+	{ USB_DEVICE(ATI_REMOTE_VENDOR_ID, ATI_REMOTE_PRODUCT_ID),	.driver_info = (unsigned long)&amp;type_ati },</div><div class='add'>+	{ USB_DEVICE(ATI_REMOTE_VENDOR_ID, NVIDIA_REMOTE_PRODUCT_ID),	.driver_info = (unsigned long)&amp;type_ati },</div><div class='add'>+	{ USB_DEVICE(ATI_REMOTE_VENDOR_ID, MEDION_REMOTE_PRODUCT_ID),	.driver_info = (unsigned long)&amp;type_medion },</div><div class='add'>+	{ USB_DEVICE(ATI_REMOTE_VENDOR_ID, FIREFLY_REMOTE_PRODUCT_ID),	.driver_info = (unsigned long)&amp;type_firefly },</div><div class='ctx'> 	{}	/* Terminating entry */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -445,6 +489,7 @@ static void ati_remote_input_report(struct urb *urb)</div><div class='ctx'> 	int acc;</div><div class='ctx'> 	int remote_num;</div><div class='ctx'> 	unsigned char scancode;</div><div class='add'>+	u32 wheel_keycode = KEY_RESERVED;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -484,26 +529,33 @@ static void ati_remote_input_report(struct urb *urb)</div><div class='ctx'> 	 */</div><div class='ctx'> 	scancode = data[2] &amp; 0x7f;</div><div class='ctx'> </div><div class='del'>-	/* Look up event code index in the mouse translation table. */</div><div class='del'>-	for (i = 0; ati_remote_tbl[i].kind != KIND_END; i++) {</div><div class='del'>-		if (scancode == ati_remote_tbl[i].data) {</div><div class='del'>-			index = i;</div><div class='del'>-			break;</div><div class='add'>+	dbginfo(&amp;ati_remote-&gt;interface-&gt;dev,</div><div class='add'>+		"channel 0x%02x; key data %02x, scancode %02x\n",</div><div class='add'>+		remote_num, data[2], scancode);</div><div class='add'>+</div><div class='add'>+	if (scancode &gt;= 0x70) {</div><div class='add'>+		/*</div><div class='add'>+		 * This is either a mouse or scrollwheel event, depending on</div><div class='add'>+		 * the remote/keymap.</div><div class='add'>+		 * Get the keycode assigned to scancode 0x78/0x70. If it is</div><div class='add'>+		 * set, assume this is a scrollwheel up/down event.</div><div class='add'>+		 */</div><div class='add'>+		wheel_keycode = rc_g_keycode_from_table(ati_remote-&gt;rdev,</div><div class='add'>+							scancode &amp; 0x78);</div><div class='add'>+</div><div class='add'>+		if (wheel_keycode == KEY_RESERVED) {</div><div class='add'>+			/* scrollwheel was not mapped, assume mouse */</div><div class='add'>+</div><div class='add'>+			/* Look up event code index in the mouse translation table. */</div><div class='add'>+			for (i = 0; ati_remote_tbl[i].kind != KIND_END; i++) {</div><div class='add'>+				if (scancode == ati_remote_tbl[i].data) {</div><div class='add'>+					index = i;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (index &gt;= 0) {</div><div class='del'>-		dbginfo(&amp;ati_remote-&gt;interface-&gt;dev,</div><div class='del'>-			"channel 0x%02x; mouse data %02x; index %d; keycode %d\n",</div><div class='del'>-			remote_num, data[2], index, ati_remote_tbl[index].code);</div><div class='del'>-		if (!dev)</div><div class='del'>-			return; /* no mouse device */</div><div class='del'>-	} else</div><div class='del'>-		dbginfo(&amp;ati_remote-&gt;interface-&gt;dev,</div><div class='del'>-			"channel 0x%02x; key data %02x, scancode %02x\n",</div><div class='del'>-			remote_num, data[2], scancode);</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> 	if (index &gt;= 0 &amp;&amp; ati_remote_tbl[index].kind == KIND_LITERAL) {</div><div class='ctx'> 		input_event(dev, ati_remote_tbl[index].type,</div><div class='ctx'> 			ati_remote_tbl[index].code,</div><div class='hunk'>@@ -542,15 +594,29 @@ static void ati_remote_input_report(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 		if (index &lt; 0) {</div><div class='ctx'> 			/* Not a mouse event, hand it to rc-core. */</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * We don't use the rc-core repeat handling yet as</div><div class='del'>-			 * it would cause ghost repeats which would be a</div><div class='del'>-			 * regression for this driver.</div><div class='del'>-			 */</div><div class='del'>-			rc_keydown_notimeout(ati_remote-&gt;rdev, scancode,</div><div class='del'>-					     data[2]);</div><div class='del'>-			rc_keyup(ati_remote-&gt;rdev);</div><div class='add'>+			int count = 1;</div><div class='add'>+</div><div class='add'>+			if (wheel_keycode != KEY_RESERVED) {</div><div class='add'>+				/*</div><div class='add'>+				 * This is a scrollwheel event, send the</div><div class='add'>+				 * scroll up (0x78) / down (0x70) scancode</div><div class='add'>+				 * repeatedly as many times as indicated by</div><div class='add'>+				 * rest of the scancode.</div><div class='add'>+				 */</div><div class='add'>+				count = (scancode &amp; 0x07) + 1;</div><div class='add'>+				scancode &amp;= 0x78;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			while (count--) {</div><div class='add'>+				/*</div><div class='add'>+				* We don't use the rc-core repeat handling yet as</div><div class='add'>+				* it would cause ghost repeats which would be a</div><div class='add'>+				* regression for this driver.</div><div class='add'>+				*/</div><div class='add'>+				rc_keydown_notimeout(ati_remote-&gt;rdev, scancode,</div><div class='add'>+						     data[2]);</div><div class='add'>+				rc_keyup(ati_remote-&gt;rdev);</div><div class='add'>+			}</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -766,6 +832,7 @@ static int ati_remote_probe(struct usb_interface *interface, const struct usb_de</div><div class='ctx'> 	struct usb_device *udev = interface_to_usbdev(interface);</div><div class='ctx'> 	struct usb_host_interface *iface_host = interface-&gt;cur_altsetting;</div><div class='ctx'> 	struct usb_endpoint_descriptor *endpoint_in, *endpoint_out;</div><div class='add'>+	struct ati_receiver_type *type = (struct ati_receiver_type *)id-&gt;driver_info;</div><div class='ctx'> 	struct ati_remote *ati_remote;</div><div class='ctx'> 	struct input_dev *input_dev;</div><div class='ctx'> 	struct rc_dev *rc_dev;</div><div class='hunk'>@@ -827,10 +894,15 @@ static int ati_remote_probe(struct usb_interface *interface, const struct usb_de</div><div class='ctx'> 	snprintf(ati_remote-&gt;mouse_name, sizeof(ati_remote-&gt;mouse_name),</div><div class='ctx'> 		 "%s mouse", ati_remote-&gt;rc_name);</div><div class='ctx'> </div><div class='del'>-	if (id-&gt;driver_info)</div><div class='del'>-		rc_dev-&gt;map_name = (const char *)id-&gt;driver_info;</div><div class='del'>-	else</div><div class='del'>-		rc_dev-&gt;map_name = RC_MAP_ATI_X10;</div><div class='add'>+	rc_dev-&gt;map_name = RC_MAP_ATI_X10; /* default map */</div><div class='add'>+</div><div class='add'>+	/* set default keymap according to receiver model */</div><div class='add'>+	if (type) {</div><div class='add'>+		if (type-&gt;default_keymap)</div><div class='add'>+			rc_dev-&gt;map_name = type-&gt;default_keymap;</div><div class='add'>+		else if (type-&gt;get_default_keymap)</div><div class='add'>+			rc_dev-&gt;map_name = type-&gt;get_default_keymap(interface);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ati_remote_rc_init(ati_remote);</div><div class='ctx'> 	mutex_init(&amp;ati_remote-&gt;open_mutex);</div><div class='head'>diff --git a/drivers/media/rc/ene_ir.c b/drivers/media/rc/ene_ir.c<br/>index 860c112e0fd2..bef5296173c9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/ene_ir.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/ene_ir.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/ene_ir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/ene_ir.c</a></div><div class='hunk'>@@ -1018,22 +1018,6 @@ static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;dev-&gt;hw_lock);</div><div class='ctx'> </div><div class='del'>-	/* claim the resources */</div><div class='del'>-	error = -EBUSY;</div><div class='del'>-	dev-&gt;hw_io = pnp_port_start(pnp_dev, 0);</div><div class='del'>-	if (!request_region(dev-&gt;hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) {</div><div class='del'>-		dev-&gt;hw_io = -1;</div><div class='del'>-		dev-&gt;irq = -1;</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;irq = pnp_irq(pnp_dev, 0);</div><div class='del'>-	if (request_irq(dev-&gt;irq, ene_isr,</div><div class='del'>-			IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev)) {</div><div class='del'>-		dev-&gt;irq = -1;</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	pnp_set_drvdata(pnp_dev, dev);</div><div class='ctx'> 	dev-&gt;pnp_dev = pnp_dev;</div><div class='ctx'> </div><div class='hunk'>@@ -1086,6 +1070,22 @@ static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)</div><div class='ctx'> 	device_set_wakeup_capable(&amp;pnp_dev-&gt;dev, true);</div><div class='ctx'> 	device_set_wakeup_enable(&amp;pnp_dev-&gt;dev, true);</div><div class='ctx'> </div><div class='add'>+	/* claim the resources */</div><div class='add'>+	error = -EBUSY;</div><div class='add'>+	dev-&gt;hw_io = pnp_port_start(pnp_dev, 0);</div><div class='add'>+	if (!request_region(dev-&gt;hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) {</div><div class='add'>+		dev-&gt;hw_io = -1;</div><div class='add'>+		dev-&gt;irq = -1;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;irq = pnp_irq(pnp_dev, 0);</div><div class='add'>+	if (request_irq(dev-&gt;irq, ene_isr,</div><div class='add'>+			IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev)) {</div><div class='add'>+		dev-&gt;irq = -1;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	error = rc_register_device(rdev);</div><div class='ctx'> 	if (error &lt; 0)</div><div class='ctx'> 		goto error;</div><div class='head'>diff --git a/drivers/media/rc/fintek-cir.c b/drivers/media/rc/fintek-cir.c<br/>index 392d4be91f8f..6aabf7ae3a31 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/fintek-cir.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/fintek-cir.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/fintek-cir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/fintek-cir.c</a></div><div class='hunk'>@@ -197,7 +197,7 @@ static int fintek_hw_detect(struct fintek_dev *fintek)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Newer reviews of this chipset uses port 8 instead of 5</div><div class='ctx'> 	 */</div><div class='del'>-	if ((chip != 0x0408) || (chip != 0x0804))</div><div class='add'>+	if ((chip != 0x0408) &amp;&amp; (chip != 0x0804))</div><div class='ctx'> 		fintek-&gt;logical_dev_cir = LOGICAL_DEV_CIR_REV2;</div><div class='ctx'> 	else</div><div class='ctx'> 		fintek-&gt;logical_dev_cir = LOGICAL_DEV_CIR_REV1;</div><div class='hunk'>@@ -514,16 +514,6 @@ static int fintek_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;fintek-&gt;fintek_lock);</div><div class='ctx'> </div><div class='del'>-	ret = -EBUSY;</div><div class='del'>-	/* now claim resources */</div><div class='del'>-	if (!request_region(fintek-&gt;cir_addr,</div><div class='del'>-			    fintek-&gt;cir_port_len, FINTEK_DRIVER_NAME))</div><div class='del'>-		goto failure;</div><div class='del'>-</div><div class='del'>-	if (request_irq(fintek-&gt;cir_irq, fintek_cir_isr, IRQF_SHARED,</div><div class='del'>-			FINTEK_DRIVER_NAME, (void *)fintek))</div><div class='del'>-		goto failure;</div><div class='del'>-</div><div class='ctx'> 	pnp_set_drvdata(pdev, fintek);</div><div class='ctx'> 	fintek-&gt;pdev = pdev;</div><div class='ctx'> </div><div class='hunk'>@@ -558,9 +548,19 @@ static int fintek_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id</div><div class='ctx'> 	/* rx resolution is hardwired to 50us atm, 1, 25, 100 also possible */</div><div class='ctx'> 	rdev-&gt;rx_resolution = US_TO_NS(CIR_SAMPLE_PERIOD);</div><div class='ctx'> </div><div class='add'>+	ret = -EBUSY;</div><div class='add'>+	/* now claim resources */</div><div class='add'>+	if (!request_region(fintek-&gt;cir_addr,</div><div class='add'>+			    fintek-&gt;cir_port_len, FINTEK_DRIVER_NAME))</div><div class='add'>+		goto failure;</div><div class='add'>+</div><div class='add'>+	if (request_irq(fintek-&gt;cir_irq, fintek_cir_isr, IRQF_SHARED,</div><div class='add'>+			FINTEK_DRIVER_NAME, (void *)fintek))</div><div class='add'>+		goto failure2;</div><div class='add'>+</div><div class='ctx'> 	ret = rc_register_device(rdev);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto failure;</div><div class='add'>+		goto failure3;</div><div class='ctx'> </div><div class='ctx'> 	device_init_wakeup(&amp;pdev-&gt;dev, true);</div><div class='ctx'> 	fintek-&gt;rdev = rdev;</div><div class='hunk'>@@ -570,12 +570,11 @@ static int fintek_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+failure3:</div><div class='add'>+	free_irq(fintek-&gt;cir_irq, fintek);</div><div class='add'>+failure2:</div><div class='add'>+	release_region(fintek-&gt;cir_addr, fintek-&gt;cir_port_len);</div><div class='ctx'> failure:</div><div class='del'>-	if (fintek-&gt;cir_irq)</div><div class='del'>-		free_irq(fintek-&gt;cir_irq, fintek);</div><div class='del'>-	if (fintek-&gt;cir_addr)</div><div class='del'>-		release_region(fintek-&gt;cir_addr, fintek-&gt;cir_port_len);</div><div class='del'>-</div><div class='ctx'> 	rc_free_device(rdev);</div><div class='ctx'> 	kfree(fintek);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/rc/imon.c b/drivers/media/rc/imon.c<br/>index 7f26fdf2e54e..5dd0386604f0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/imon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/imon.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/imon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/imon.c</a></div><div class='hunk'>@@ -255,7 +255,7 @@ static struct usb_device_id imon_usb_id_table[] = {</div><div class='ctx'> static struct usb_driver imon_driver = {</div><div class='ctx'> 	.name		= MOD_NAME,</div><div class='ctx'> 	.probe		= imon_probe,</div><div class='del'>-	.disconnect	= imon_disconnect,</div><div class='add'>+	.disconnect	= __devexit_p(imon_disconnect),</div><div class='ctx'> 	.suspend	= imon_suspend,</div><div class='ctx'> 	.resume		= imon_resume,</div><div class='ctx'> 	.id_table	= imon_usb_id_table,</div><div class='head'>diff --git a/drivers/media/rc/ir-raw.c b/drivers/media/rc/ir-raw.c<br/>index 95e630998aaf..a82025121345 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/ir-raw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/ir-raw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/ir-raw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/ir-raw.c</a></div><div class='hunk'>@@ -46,9 +46,9 @@ static int ir_raw_event_thread(void *data)</div><div class='ctx'> 	while (!kthread_should_stop()) {</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_irq(&amp;raw-&gt;lock);</div><div class='del'>-		retval = kfifo_out(&amp;raw-&gt;kfifo, &amp;ev, sizeof(ev));</div><div class='add'>+		retval = kfifo_len(&amp;raw-&gt;kfifo);</div><div class='ctx'> </div><div class='del'>-		if (!retval) {</div><div class='add'>+		if (retval &lt; sizeof(ev)) {</div><div class='ctx'> 			set_current_state(TASK_INTERRUPTIBLE);</div><div class='ctx'> </div><div class='ctx'> 			if (kthread_should_stop())</div><div class='hunk'>@@ -59,11 +59,9 @@ static int ir_raw_event_thread(void *data)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		retval = kfifo_out(&amp;raw-&gt;kfifo, &amp;ev, sizeof(ev));</div><div class='ctx'> 		spin_unlock_irq(&amp;raw-&gt;lock);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-		BUG_ON(retval != sizeof(ev));</div><div class='del'>-</div><div class='ctx'> 		mutex_lock(&amp;ir_raw_handler_lock);</div><div class='ctx'> 		list_for_each_entry(handler, &amp;ir_raw_handler_list, list)</div><div class='ctx'> 			handler-&gt;decode(raw-&gt;dev, ev);</div><div class='head'>diff --git a/drivers/media/rc/ir-sanyo-decoder.c b/drivers/media/rc/ir-sanyo-decoder.c<br/>index d38fbdd0b25a..7e54ec57bcf9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/ir-sanyo-decoder.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/ir-sanyo-decoder.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/ir-sanyo-decoder.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/ir-sanyo-decoder.c</a></div><div class='hunk'>@@ -56,7 +56,7 @@ static int ir_sanyo_decode(struct rc_dev *dev, struct ir_raw_event ev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sanyo_dec *data = &amp;dev-&gt;raw-&gt;sanyo;</div><div class='ctx'> 	u32 scancode;</div><div class='del'>-	u8 address, not_address, command, not_command;</div><div class='add'>+	u8 address, command, not_command;</div><div class='ctx'> </div><div class='ctx'> 	if (!(dev-&gt;raw-&gt;enabled_protocols &amp; RC_TYPE_SANYO))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -154,7 +154,7 @@ static int ir_sanyo_decode(struct rc_dev *dev, struct ir_raw_event ev)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		address     = bitrev16((data-&gt;bits &gt;&gt; 29) &amp; 0x1fff) &gt;&gt; 3;</div><div class='del'>-		not_address = bitrev16((data-&gt;bits &gt;&gt; 16) &amp; 0x1fff) &gt;&gt; 3;</div><div class='add'>+		/* not_address = bitrev16((data-&gt;bits &gt;&gt; 16) &amp; 0x1fff) &gt;&gt; 3; */</div><div class='ctx'> 		command	    = bitrev8((data-&gt;bits &gt;&gt;  8) &amp; 0xff);</div><div class='ctx'> 		not_command = bitrev8((data-&gt;bits &gt;&gt;  0) &amp; 0xff);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/rc/ite-cir.c b/drivers/media/rc/ite-cir.c<br/>index 682009d76cdf..36fe5a349b95 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/ite-cir.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/ite-cir.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/ite-cir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/ite-cir.c</a></div><div class='hunk'>@@ -1515,16 +1515,6 @@ static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id</div><div class='ctx'> 	/* initialize raw event */</div><div class='ctx'> 	init_ir_raw_event(&amp;itdev-&gt;rawir);</div><div class='ctx'> </div><div class='del'>-	ret = -EBUSY;</div><div class='del'>-	/* now claim resources */</div><div class='del'>-	if (!request_region(itdev-&gt;cir_addr,</div><div class='del'>-				dev_desc-&gt;io_region_size, ITE_DRIVER_NAME))</div><div class='del'>-		goto failure;</div><div class='del'>-</div><div class='del'>-	if (request_irq(itdev-&gt;cir_irq, ite_cir_isr, IRQF_SHARED,</div><div class='del'>-			ITE_DRIVER_NAME, (void *)itdev))</div><div class='del'>-		goto failure;</div><div class='del'>-</div><div class='ctx'> 	/* set driver data into the pnp device */</div><div class='ctx'> 	pnp_set_drvdata(pdev, itdev);</div><div class='ctx'> 	itdev-&gt;pdev = pdev;</div><div class='hunk'>@@ -1600,22 +1590,30 @@ static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id</div><div class='ctx'> 	rdev-&gt;driver_name = ITE_DRIVER_NAME;</div><div class='ctx'> 	rdev-&gt;map_name = RC_MAP_RC6_MCE;</div><div class='ctx'> </div><div class='add'>+	ret = -EBUSY;</div><div class='add'>+	/* now claim resources */</div><div class='add'>+	if (!request_region(itdev-&gt;cir_addr,</div><div class='add'>+				dev_desc-&gt;io_region_size, ITE_DRIVER_NAME))</div><div class='add'>+		goto failure;</div><div class='add'>+</div><div class='add'>+	if (request_irq(itdev-&gt;cir_irq, ite_cir_isr, IRQF_SHARED,</div><div class='add'>+			ITE_DRIVER_NAME, (void *)itdev))</div><div class='add'>+		goto failure2;</div><div class='add'>+</div><div class='ctx'> 	ret = rc_register_device(rdev);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto failure;</div><div class='add'>+		goto failure3;</div><div class='ctx'> </div><div class='ctx'> 	itdev-&gt;rdev = rdev;</div><div class='ctx'> 	ite_pr(KERN_NOTICE, "driver has been successfully loaded\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+failure3:</div><div class='add'>+	free_irq(itdev-&gt;cir_irq, itdev);</div><div class='add'>+failure2:</div><div class='add'>+	release_region(itdev-&gt;cir_addr, itdev-&gt;params.io_region_size);</div><div class='ctx'> failure:</div><div class='del'>-	if (itdev-&gt;cir_irq)</div><div class='del'>-		free_irq(itdev-&gt;cir_irq, itdev);</div><div class='del'>-</div><div class='del'>-	if (itdev-&gt;cir_addr)</div><div class='del'>-		release_region(itdev-&gt;cir_addr, itdev-&gt;params.io_region_size);</div><div class='del'>-</div><div class='ctx'> 	rc_free_device(rdev);</div><div class='ctx'> 	kfree(itdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile<br/>index 49ce2662f56b..ab84d66c67c1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/keymaps/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/keymaps/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/keymaps/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/keymaps/Makefile</a></div><div class='hunk'>@@ -3,6 +3,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \</div><div class='ctx'> 			rc-anysee.o \</div><div class='ctx'> 			rc-apac-viewcomp.o \</div><div class='ctx'> 			rc-asus-pc39.o \</div><div class='add'>+			rc-asus-ps3-100.o \</div><div class='ctx'> 			rc-ati-tv-wonder-hd-600.o \</div><div class='ctx'> 			rc-ati-x10.o \</div><div class='ctx'> 			rc-avermedia-a16d.o \</div><div class='hunk'>@@ -52,6 +53,8 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \</div><div class='ctx'> 			rc-lme2510.o \</div><div class='ctx'> 			rc-manli.o \</div><div class='ctx'> 			rc-medion-x10.o \</div><div class='add'>+			rc-medion-x10-digitainer.o \</div><div class='add'>+			rc-medion-x10-or2x.o \</div><div class='ctx'> 			rc-msi-digivox-ii.o \</div><div class='ctx'> 			rc-msi-digivox-iii.o \</div><div class='ctx'> 			rc-msi-tvanywhere.o \</div><div class='head'>diff --git a/drivers/media/rc/keymaps/rc-asus-ps3-100.c b/drivers/media/rc/keymaps/rc-asus-ps3-100.c<br/>new file mode 100644<br/>index 000000000000..ba76609c5936<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/keymaps/rc-asus-ps3-100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/keymaps/rc-asus-ps3-100.c</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+/* asus-ps3-100.h - Keytable for asus_ps3_100 Remote Controller</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012 by Mauro Carvalho Chehab &lt;mchehab@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Based on a previous patch from Remi Schwartz &lt;remi.schwartz@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;media/rc-map.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+static struct rc_map_table asus_ps3_100[] = {</div><div class='add'>+	{ 0x081c, KEY_HOME },             /* home */</div><div class='add'>+	{ 0x081e, KEY_TV },               /* tv */</div><div class='add'>+	{ 0x0803, KEY_TEXT },             /* teletext */</div><div class='add'>+	{ 0x0829, KEY_POWER },            /* close */</div><div class='add'>+</div><div class='add'>+	{ 0x080b, KEY_RED },              /* red */</div><div class='add'>+	{ 0x080d, KEY_YELLOW },           /* yellow */</div><div class='add'>+	{ 0x0806, KEY_BLUE },             /* blue */</div><div class='add'>+	{ 0x0807, KEY_GREEN },            /* green */</div><div class='add'>+</div><div class='add'>+	/* Keys 0 to 9 */</div><div class='add'>+	{ 0x082a, KEY_0 },</div><div class='add'>+	{ 0x0816, KEY_1 },</div><div class='add'>+	{ 0x0812, KEY_2 },</div><div class='add'>+	{ 0x0814, KEY_3 },</div><div class='add'>+	{ 0x0836, KEY_4 },</div><div class='add'>+	{ 0x0832, KEY_5 },</div><div class='add'>+	{ 0x0834, KEY_6 },</div><div class='add'>+	{ 0x080e, KEY_7 },</div><div class='add'>+	{ 0x080a, KEY_8 },</div><div class='add'>+	{ 0x080c, KEY_9 },</div><div class='add'>+</div><div class='add'>+	{ 0x0815, KEY_VOLUMEUP },</div><div class='add'>+	{ 0x0826, KEY_VOLUMEDOWN },</div><div class='add'>+	{ 0x0835, KEY_CHANNELUP },        /* channel / program + */</div><div class='add'>+	{ 0x0824, KEY_CHANNELDOWN },      /* channel / program - */</div><div class='add'>+</div><div class='add'>+	{ 0x0808, KEY_UP },</div><div class='add'>+	{ 0x0804, KEY_DOWN },</div><div class='add'>+	{ 0x0818, KEY_LEFT },</div><div class='add'>+	{ 0x0810, KEY_RIGHT },</div><div class='add'>+	{ 0x0825, KEY_ENTER },            /* enter */</div><div class='add'>+</div><div class='add'>+	{ 0x0822, KEY_EXIT },             /* back */</div><div class='add'>+	{ 0x082c, KEY_AB },               /* recall */</div><div class='add'>+</div><div class='add'>+	{ 0x0820, KEY_AUDIO },            /* TV audio */</div><div class='add'>+	{ 0x0837, KEY_SCREEN },           /* snapshot */</div><div class='add'>+	{ 0x082e, KEY_ZOOM },             /* full screen */</div><div class='add'>+	{ 0x0802, KEY_MUTE },             /* mute */</div><div class='add'>+</div><div class='add'>+	{ 0x0831, KEY_REWIND },           /* backward &lt;&lt; */</div><div class='add'>+	{ 0x0811, KEY_RECORD },           /* recording */</div><div class='add'>+	{ 0x0809, KEY_STOP },</div><div class='add'>+	{ 0x0805, KEY_FASTFORWARD },      /* forward &gt;&gt; */</div><div class='add'>+	{ 0x0821, KEY_PREVIOUS },         /* rew */</div><div class='add'>+	{ 0x081a, KEY_PAUSE },            /* pause */</div><div class='add'>+	{ 0x0839, KEY_PLAY },             /* play */</div><div class='add'>+	{ 0x0819, KEY_NEXT },             /* forward */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct rc_map_list asus_ps3_100_map = {</div><div class='add'>+.map = {</div><div class='add'>+	.scan    = asus_ps3_100,</div><div class='add'>+	.size    = ARRAY_SIZE(asus_ps3_100),</div><div class='add'>+	.rc_type = RC_TYPE_RC5,</div><div class='add'>+	.name    = RC_MAP_ASUS_PS3_100,</div><div class='add'>+}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init init_rc_map_asus_ps3_100(void)</div><div class='add'>+{</div><div class='add'>+return rc_map_register(&amp;asus_ps3_100_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit exit_rc_map_asus_ps3_100(void)</div><div class='add'>+{</div><div class='add'>+rc_map_unregister(&amp;asus_ps3_100_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(init_rc_map_asus_ps3_100)</div><div class='add'>+module_exit(exit_rc_map_asus_ps3_100)</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Mauro Carvalho Chehab &lt;mchehab@redhat.com&gt;");</div><div class='head'>diff --git a/drivers/media/rc/keymaps/rc-it913x-v2.c b/drivers/media/rc/keymaps/rc-it913x-v2.c<br/>index 28e376e18b99..bd42a30ec06f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/keymaps/rc-it913x-v2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/keymaps/rc-it913x-v2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/keymaps/rc-it913x-v2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/keymaps/rc-it913x-v2.c</a></div><div class='hunk'>@@ -40,7 +40,7 @@ static struct rc_map_table it913x_v2_rc[] = {</div><div class='ctx'> 	/* Type 2 */</div><div class='ctx'> 	/* keys stereo, snapshot unassigned */</div><div class='ctx'> 	{ 0x866b00, KEY_0 },</div><div class='del'>-	{ 0x866b1b, KEY_1 },</div><div class='add'>+	{ 0x866b01, KEY_1 },</div><div class='ctx'> 	{ 0x866b02, KEY_2 },</div><div class='ctx'> 	{ 0x866b03, KEY_3 },</div><div class='ctx'> 	{ 0x866b04, KEY_4 },</div><div class='head'>diff --git a/drivers/media/rc/keymaps/rc-medion-x10-digitainer.c b/drivers/media/rc/keymaps/rc-medion-x10-digitainer.c<br/>new file mode 100644<br/>index 000000000000..966f9b3c71da<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/keymaps/rc-medion-x10-digitainer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/keymaps/rc-medion-x10-digitainer.c</a></div><div class='hunk'>@@ -0,0 +1,123 @@</div><div class='add'>+/*</div><div class='add'>+ * Medion X10 RF remote keytable (Digitainer variant)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Anssi Hannula &lt;anssi.hannula@iki.fi&gt;</div><div class='add'>+ *</div><div class='add'>+ * This keymap is for a variant that has a distinctive scrollwheel instead of</div><div class='add'>+ * up/down buttons (tested with P/N 40009936 / 20018268), reportedly</div><div class='add'>+ * originally shipped with Medion Digitainer but now sold separately simply as</div><div class='add'>+ * an "X10" remote.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along</div><div class='add'>+ * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;media/rc-map.h&gt;</div><div class='add'>+</div><div class='add'>+static struct rc_map_table medion_x10_digitainer[] = {</div><div class='add'>+	{ 0x02, KEY_POWER },</div><div class='add'>+</div><div class='add'>+	{ 0x2c, KEY_TV },</div><div class='add'>+	{ 0x2d, KEY_VIDEO },</div><div class='add'>+	{ 0x04, KEY_DVD },    /* CD/DVD */</div><div class='add'>+	{ 0x16, KEY_TEXT },   /* "teletext" icon, i.e. a screen with lines */</div><div class='add'>+	{ 0x06, KEY_AUDIO },</div><div class='add'>+	{ 0x2e, KEY_RADIO },</div><div class='add'>+	{ 0x31, KEY_EPG },    /* a screen with an open book */</div><div class='add'>+	{ 0x05, KEY_IMAGES }, /* Photo */</div><div class='add'>+	{ 0x2f, KEY_INFO },</div><div class='add'>+</div><div class='add'>+	{ 0x78, KEY_UP },     /* scrollwheel up 1 notch */</div><div class='add'>+	/* 0x79..0x7f: 2-8 notches, driver repeats 0x78 entry */</div><div class='add'>+</div><div class='add'>+	{ 0x70, KEY_DOWN },   /* scrollwheel down 1 notch */</div><div class='add'>+	/* 0x71..0x77: 2-8 notches, driver repeats 0x70 entry */</div><div class='add'>+</div><div class='add'>+	{ 0x19, KEY_MENU },</div><div class='add'>+	{ 0x1d, KEY_LEFT },</div><div class='add'>+	{ 0x1e, KEY_OK },     /* scrollwheel press */</div><div class='add'>+	{ 0x1f, KEY_RIGHT },</div><div class='add'>+	{ 0x20, KEY_BACK },</div><div class='add'>+</div><div class='add'>+	{ 0x09, KEY_VOLUMEUP },</div><div class='add'>+	{ 0x08, KEY_VOLUMEDOWN },</div><div class='add'>+	{ 0x00, KEY_MUTE },</div><div class='add'>+</div><div class='add'>+	{ 0x1b, KEY_SELECT }, /* also has "U" rotated 90 degrees CCW */</div><div class='add'>+</div><div class='add'>+	{ 0x0b, KEY_CHANNELUP },</div><div class='add'>+	{ 0x0c, KEY_CHANNELDOWN },</div><div class='add'>+	{ 0x1c, KEY_LAST },</div><div class='add'>+</div><div class='add'>+	{ 0x32, KEY_RED },    /* also Audio */</div><div class='add'>+	{ 0x33, KEY_GREEN },  /* also Subtitle */</div><div class='add'>+	{ 0x34, KEY_YELLOW }, /* also Angle */</div><div class='add'>+	{ 0x35, KEY_BLUE },   /* also Title */</div><div class='add'>+</div><div class='add'>+	{ 0x28, KEY_STOP },</div><div class='add'>+	{ 0x29, KEY_PAUSE },</div><div class='add'>+	{ 0x25, KEY_PLAY },</div><div class='add'>+	{ 0x21, KEY_PREVIOUS },</div><div class='add'>+	{ 0x18, KEY_CAMERA },</div><div class='add'>+	{ 0x23, KEY_NEXT },</div><div class='add'>+	{ 0x24, KEY_REWIND },</div><div class='add'>+	{ 0x27, KEY_RECORD },</div><div class='add'>+	{ 0x26, KEY_FORWARD },</div><div class='add'>+</div><div class='add'>+	{ 0x0d, KEY_1 },</div><div class='add'>+	{ 0x0e, KEY_2 },</div><div class='add'>+	{ 0x0f, KEY_3 },</div><div class='add'>+	{ 0x10, KEY_4 },</div><div class='add'>+	{ 0x11, KEY_5 },</div><div class='add'>+	{ 0x12, KEY_6 },</div><div class='add'>+	{ 0x13, KEY_7 },</div><div class='add'>+	{ 0x14, KEY_8 },</div><div class='add'>+	{ 0x15, KEY_9 },</div><div class='add'>+	{ 0x17, KEY_0 },</div><div class='add'>+</div><div class='add'>+	/* these do not actually exist on this remote, but these scancodes</div><div class='add'>+	 * exist on all other Medion X10 remotes and adding them here allows</div><div class='add'>+	 * such remotes to be adequately usable with this keymap in case</div><div class='add'>+	 * this keymap is wrongly used with them (which is quite possible as</div><div class='add'>+	 * there are lots of different Medion X10 remotes): */</div><div class='add'>+	{ 0x1a, KEY_UP },</div><div class='add'>+	{ 0x22, KEY_DOWN },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct rc_map_list medion_x10_digitainer_map = {</div><div class='add'>+	.map = {</div><div class='add'>+		.scan    = medion_x10_digitainer,</div><div class='add'>+		.size    = ARRAY_SIZE(medion_x10_digitainer),</div><div class='add'>+		.rc_type = RC_TYPE_OTHER,</div><div class='add'>+		.name    = RC_MAP_MEDION_X10_DIGITAINER,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init init_rc_map_medion_x10_digitainer(void)</div><div class='add'>+{</div><div class='add'>+	return rc_map_register(&amp;medion_x10_digitainer_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit exit_rc_map_medion_x10_digitainer(void)</div><div class='add'>+{</div><div class='add'>+	rc_map_unregister(&amp;medion_x10_digitainer_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(init_rc_map_medion_x10_digitainer)</div><div class='add'>+module_exit(exit_rc_map_medion_x10_digitainer)</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Medion X10 RF remote keytable (Digitainer variant)");</div><div class='add'>+MODULE_AUTHOR("Anssi Hannula &lt;anssi.hannula@iki.fi&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/media/rc/keymaps/rc-medion-x10-or2x.c b/drivers/media/rc/keymaps/rc-medion-x10-or2x.c<br/>new file mode 100644<br/>index 000000000000..b077300ecb5c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/keymaps/rc-medion-x10-or2x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/keymaps/rc-medion-x10-or2x.c</a></div><div class='hunk'>@@ -0,0 +1,108 @@</div><div class='add'>+/*</div><div class='add'>+ * Medion X10 OR22/OR24 RF remote keytable</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Anssi Hannula &lt;anssi.hannula@iki.fi&gt;</div><div class='add'>+ *</div><div class='add'>+ * This keymap is for several Medion X10 remotes that have the Windows MCE</div><div class='add'>+ * button. This has been tested with a "RF VISTA Remote Control", OR24V,</div><div class='add'>+ * P/N 20035335, but should work with other variants that have the same</div><div class='add'>+ * buttons, such as OR22V and OR24E.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along</div><div class='add'>+ * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;media/rc-map.h&gt;</div><div class='add'>+</div><div class='add'>+static struct rc_map_table medion_x10_or2x[] = {</div><div class='add'>+	{ 0x02, KEY_POWER },</div><div class='add'>+	{ 0x16, KEY_TEXT },   /* "T" in a box, for teletext */</div><div class='add'>+</div><div class='add'>+	{ 0x09, KEY_VOLUMEUP },</div><div class='add'>+	{ 0x08, KEY_VOLUMEDOWN },</div><div class='add'>+	{ 0x00, KEY_MUTE },</div><div class='add'>+	{ 0x0b, KEY_CHANNELUP },</div><div class='add'>+	{ 0x0c, KEY_CHANNELDOWN },</div><div class='add'>+</div><div class='add'>+	{ 0x32, KEY_RED },</div><div class='add'>+	{ 0x33, KEY_GREEN },</div><div class='add'>+	{ 0x34, KEY_YELLOW },</div><div class='add'>+	{ 0x35, KEY_BLUE },</div><div class='add'>+</div><div class='add'>+	{ 0x18, KEY_PVR },    /* record symbol inside a tv symbol */</div><div class='add'>+	{ 0x04, KEY_DVD },    /* disc symbol */</div><div class='add'>+	{ 0x31, KEY_EPG },    /* a tv schedule symbol */</div><div class='add'>+	{ 0x1c, KEY_TV },     /* play symbol inside a tv symbol */</div><div class='add'>+	{ 0x20, KEY_BACK },</div><div class='add'>+	{ 0x2f, KEY_INFO },</div><div class='add'>+</div><div class='add'>+	{ 0x1a, KEY_UP },</div><div class='add'>+	{ 0x22, KEY_DOWN },</div><div class='add'>+	{ 0x1d, KEY_LEFT },</div><div class='add'>+	{ 0x1f, KEY_RIGHT },</div><div class='add'>+	{ 0x1e, KEY_OK },</div><div class='add'>+</div><div class='add'>+	{ 0x1b, KEY_MEDIA },  /* Windows MCE button */</div><div class='add'>+</div><div class='add'>+	{ 0x21, KEY_PREVIOUS },</div><div class='add'>+	{ 0x23, KEY_NEXT },</div><div class='add'>+	{ 0x24, KEY_REWIND },</div><div class='add'>+	{ 0x26, KEY_FORWARD },</div><div class='add'>+	{ 0x25, KEY_PLAY },</div><div class='add'>+	{ 0x28, KEY_STOP },</div><div class='add'>+	{ 0x29, KEY_PAUSE },</div><div class='add'>+	{ 0x27, KEY_RECORD },</div><div class='add'>+</div><div class='add'>+	{ 0x0d, KEY_1 },</div><div class='add'>+	{ 0x0e, KEY_2 },</div><div class='add'>+	{ 0x0f, KEY_3 },</div><div class='add'>+	{ 0x10, KEY_4 },</div><div class='add'>+	{ 0x11, KEY_5 },</div><div class='add'>+	{ 0x12, KEY_6 },</div><div class='add'>+	{ 0x13, KEY_7 },</div><div class='add'>+	{ 0x14, KEY_8 },</div><div class='add'>+	{ 0x15, KEY_9 },</div><div class='add'>+	{ 0x17, KEY_0 },</div><div class='add'>+	{ 0x30, KEY_CLEAR },</div><div class='add'>+	{ 0x36, KEY_ENTER },</div><div class='add'>+	{ 0x37, KEY_NUMERIC_STAR },</div><div class='add'>+	{ 0x38, KEY_NUMERIC_POUND },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct rc_map_list medion_x10_or2x_map = {</div><div class='add'>+	.map = {</div><div class='add'>+		.scan    = medion_x10_or2x,</div><div class='add'>+		.size    = ARRAY_SIZE(medion_x10_or2x),</div><div class='add'>+		.rc_type = RC_TYPE_OTHER,</div><div class='add'>+		.name    = RC_MAP_MEDION_X10_OR2X,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init init_rc_map_medion_x10_or2x(void)</div><div class='add'>+{</div><div class='add'>+	return rc_map_register(&amp;medion_x10_or2x_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit exit_rc_map_medion_x10_or2x(void)</div><div class='add'>+{</div><div class='add'>+	rc_map_unregister(&amp;medion_x10_or2x_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(init_rc_map_medion_x10_or2x)</div><div class='add'>+module_exit(exit_rc_map_medion_x10_or2x)</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Medion X10 OR22/OR24 RF remote keytable");</div><div class='add'>+MODULE_AUTHOR("Anssi Hannula &lt;anssi.hannula@iki.fi&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/media/rc/mceusb.c b/drivers/media/rc/mceusb.c<br/>index e150a2e29a4b..84e06d3aa696 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/mceusb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/mceusb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/mceusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/mceusb.c</a></div><div class='hunk'>@@ -520,7 +520,7 @@ static void mceusb_dev_printdata(struct mceusb_dev *ir, char *buf,</div><div class='ctx'> {</div><div class='ctx'> 	char codes[USB_BUFLEN * 3 + 1];</div><div class='ctx'> 	char inout[9];</div><div class='del'>-	u8 cmd, subcmd, data1, data2, data3, data4, data5;</div><div class='add'>+	u8 cmd, subcmd, data1, data2, data3, data4;</div><div class='ctx'> 	struct device *dev = ir-&gt;dev;</div><div class='ctx'> 	int i, start, skip = 0;</div><div class='ctx'> 	u32 carrier, period;</div><div class='hunk'>@@ -553,7 +553,6 @@ static void mceusb_dev_printdata(struct mceusb_dev *ir, char *buf,</div><div class='ctx'> 	data2  = buf[start + 3] &amp; 0xff;</div><div class='ctx'> 	data3  = buf[start + 4] &amp; 0xff;</div><div class='ctx'> 	data4  = buf[start + 5] &amp; 0xff;</div><div class='del'>-	data5  = buf[start + 6] &amp; 0xff;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case MCE_CMD_NULL:</div><div class='hunk'>@@ -1443,7 +1442,7 @@ static int mceusb_dev_resume(struct usb_interface *intf)</div><div class='ctx'> static struct usb_driver mceusb_dev_driver = {</div><div class='ctx'> 	.name =		DRIVER_NAME,</div><div class='ctx'> 	.probe =	mceusb_dev_probe,</div><div class='del'>-	.disconnect =	mceusb_dev_disconnect,</div><div class='add'>+	.disconnect =	__devexit_p(mceusb_dev_disconnect),</div><div class='ctx'> 	.suspend =	mceusb_dev_suspend,</div><div class='ctx'> 	.resume =	mceusb_dev_resume,</div><div class='ctx'> 	.reset_resume =	mceusb_dev_resume,</div><div class='head'>diff --git a/drivers/media/rc/nuvoton-cir.c b/drivers/media/rc/nuvoton-cir.c<br/>index 144f3f55d765..dc8a7dddccd4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/nuvoton-cir.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/nuvoton-cir.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/nuvoton-cir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/nuvoton-cir.c</a></div><div class='hunk'>@@ -1021,24 +1021,6 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id)</div><div class='ctx'> 	spin_lock_init(&amp;nvt-&gt;nvt_lock);</div><div class='ctx'> 	spin_lock_init(&amp;nvt-&gt;tx.lock);</div><div class='ctx'> </div><div class='del'>-	ret = -EBUSY;</div><div class='del'>-	/* now claim resources */</div><div class='del'>-	if (!request_region(nvt-&gt;cir_addr,</div><div class='del'>-			    CIR_IOREG_LENGTH, NVT_DRIVER_NAME))</div><div class='del'>-		goto failure;</div><div class='del'>-</div><div class='del'>-	if (request_irq(nvt-&gt;cir_irq, nvt_cir_isr, IRQF_SHARED,</div><div class='del'>-			NVT_DRIVER_NAME, (void *)nvt))</div><div class='del'>-		goto failure;</div><div class='del'>-</div><div class='del'>-	if (!request_region(nvt-&gt;cir_wake_addr,</div><div class='del'>-			    CIR_IOREG_LENGTH, NVT_DRIVER_NAME))</div><div class='del'>-		goto failure;</div><div class='del'>-</div><div class='del'>-	if (request_irq(nvt-&gt;cir_wake_irq, nvt_cir_wake_isr, IRQF_SHARED,</div><div class='del'>-			NVT_DRIVER_NAME, (void *)nvt))</div><div class='del'>-		goto failure;</div><div class='del'>-</div><div class='ctx'> 	pnp_set_drvdata(pdev, nvt);</div><div class='ctx'> 	nvt-&gt;pdev = pdev;</div><div class='ctx'> </div><div class='hunk'>@@ -1085,9 +1067,27 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id)</div><div class='ctx'> 	rdev-&gt;tx_resolution = XYZ;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+	ret = -EBUSY;</div><div class='add'>+	/* now claim resources */</div><div class='add'>+	if (!request_region(nvt-&gt;cir_addr,</div><div class='add'>+			    CIR_IOREG_LENGTH, NVT_DRIVER_NAME))</div><div class='add'>+		goto failure;</div><div class='add'>+</div><div class='add'>+	if (request_irq(nvt-&gt;cir_irq, nvt_cir_isr, IRQF_SHARED,</div><div class='add'>+			NVT_DRIVER_NAME, (void *)nvt))</div><div class='add'>+		goto failure2;</div><div class='add'>+</div><div class='add'>+	if (!request_region(nvt-&gt;cir_wake_addr,</div><div class='add'>+			    CIR_IOREG_LENGTH, NVT_DRIVER_NAME))</div><div class='add'>+		goto failure3;</div><div class='add'>+</div><div class='add'>+	if (request_irq(nvt-&gt;cir_wake_irq, nvt_cir_wake_isr, IRQF_SHARED,</div><div class='add'>+			NVT_DRIVER_NAME, (void *)nvt))</div><div class='add'>+		goto failure4;</div><div class='add'>+</div><div class='ctx'> 	ret = rc_register_device(rdev);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto failure;</div><div class='add'>+		goto failure5;</div><div class='ctx'> </div><div class='ctx'> 	device_init_wakeup(&amp;pdev-&gt;dev, true);</div><div class='ctx'> 	nvt-&gt;rdev = rdev;</div><div class='hunk'>@@ -1099,17 +1099,15 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+failure5:</div><div class='add'>+	free_irq(nvt-&gt;cir_wake_irq, nvt);</div><div class='add'>+failure4:</div><div class='add'>+	release_region(nvt-&gt;cir_wake_addr, CIR_IOREG_LENGTH);</div><div class='add'>+failure3:</div><div class='add'>+	free_irq(nvt-&gt;cir_irq, nvt);</div><div class='add'>+failure2:</div><div class='add'>+	release_region(nvt-&gt;cir_addr, CIR_IOREG_LENGTH);</div><div class='ctx'> failure:</div><div class='del'>-	if (nvt-&gt;cir_irq)</div><div class='del'>-		free_irq(nvt-&gt;cir_irq, nvt);</div><div class='del'>-	if (nvt-&gt;cir_addr)</div><div class='del'>-		release_region(nvt-&gt;cir_addr, CIR_IOREG_LENGTH);</div><div class='del'>-</div><div class='del'>-	if (nvt-&gt;cir_wake_irq)</div><div class='del'>-		free_irq(nvt-&gt;cir_wake_irq, nvt);</div><div class='del'>-	if (nvt-&gt;cir_wake_addr)</div><div class='del'>-		release_region(nvt-&gt;cir_wake_addr, CIR_IOREG_LENGTH);</div><div class='del'>-</div><div class='ctx'> 	rc_free_device(rdev);</div><div class='ctx'> 	kfree(nvt);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/rc/rc-loopback.c b/drivers/media/rc/rc-loopback.c<br/>index efc6a514348a..fae1615e0ff2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/rc-loopback.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/rc-loopback.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/rc-loopback.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/rc-loopback.c</a></div><div class='hunk'>@@ -221,7 +221,6 @@ static int __init loop_init(void)</div><div class='ctx'> 	rc-&gt;s_idle		= loop_set_idle;</div><div class='ctx'> 	rc-&gt;s_learning_mode	= loop_set_learning_mode;</div><div class='ctx'> 	rc-&gt;s_carrier_report	= loop_set_carrier_report;</div><div class='del'>-	rc-&gt;priv		= &amp;loopdev;</div><div class='ctx'> </div><div class='ctx'> 	loopdev.txmask		= RXMASK_REGULAR;</div><div class='ctx'> 	loopdev.txcarrier	= 36000;</div><div class='head'>diff --git a/drivers/media/rc/redrat3.c b/drivers/media/rc/redrat3.c<br/>index ad95c67a4dba..2878b0ed9741 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/redrat3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/redrat3.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/redrat3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/redrat3.c</a></div><div class='hunk'>@@ -1277,7 +1277,7 @@ static int redrat3_dev_resume(struct usb_interface *intf)</div><div class='ctx'> static struct usb_driver redrat3_dev_driver = {</div><div class='ctx'> 	.name		= DRIVER_NAME,</div><div class='ctx'> 	.probe		= redrat3_dev_probe,</div><div class='del'>-	.disconnect	= redrat3_dev_disconnect,</div><div class='add'>+	.disconnect	= __devexit_p(redrat3_dev_disconnect),</div><div class='ctx'> 	.suspend	= redrat3_dev_suspend,</div><div class='ctx'> 	.resume		= redrat3_dev_resume,</div><div class='ctx'> 	.reset_resume	= redrat3_dev_resume,</div><div class='head'>diff --git a/drivers/media/rc/winbond-cir.c b/drivers/media/rc/winbond-cir.c<br/>index af526586fa26..342c2c8c1ddf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/rc/winbond-cir.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/rc/winbond-cir.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/rc/winbond-cir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/rc/winbond-cir.c</a></div><div class='hunk'>@@ -991,39 +991,10 @@ wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id)</div><div class='ctx'> 		"(w: 0x%lX, e: 0x%lX, s: 0x%lX, i: %u)\n",</div><div class='ctx'> 		data-&gt;wbase, data-&gt;ebase, data-&gt;sbase, data-&gt;irq);</div><div class='ctx'> </div><div class='del'>-	if (!request_region(data-&gt;wbase, WAKEUP_IOMEM_LEN, DRVNAME)) {</div><div class='del'>-		dev_err(dev, "Region 0x%lx-0x%lx already in use!\n",</div><div class='del'>-			data-&gt;wbase, data-&gt;wbase + WAKEUP_IOMEM_LEN - 1);</div><div class='del'>-		err = -EBUSY;</div><div class='del'>-		goto exit_free_data;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!request_region(data-&gt;ebase, EHFUNC_IOMEM_LEN, DRVNAME)) {</div><div class='del'>-		dev_err(dev, "Region 0x%lx-0x%lx already in use!\n",</div><div class='del'>-			data-&gt;ebase, data-&gt;ebase + EHFUNC_IOMEM_LEN - 1);</div><div class='del'>-		err = -EBUSY;</div><div class='del'>-		goto exit_release_wbase;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!request_region(data-&gt;sbase, SP_IOMEM_LEN, DRVNAME)) {</div><div class='del'>-		dev_err(dev, "Region 0x%lx-0x%lx already in use!\n",</div><div class='del'>-			data-&gt;sbase, data-&gt;sbase + SP_IOMEM_LEN - 1);</div><div class='del'>-		err = -EBUSY;</div><div class='del'>-		goto exit_release_ebase;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = request_irq(data-&gt;irq, wbcir_irq_handler,</div><div class='del'>-			  IRQF_DISABLED, DRVNAME, device);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "Failed to claim IRQ %u\n", data-&gt;irq);</div><div class='del'>-		err = -EBUSY;</div><div class='del'>-		goto exit_release_sbase;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	led_trigger_register_simple("cir-tx", &amp;data-&gt;txtrigger);</div><div class='ctx'> 	if (!data-&gt;txtrigger) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='del'>-		goto exit_free_irq;</div><div class='add'>+		goto exit_free_data;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	led_trigger_register_simple("cir-rx", &amp;data-&gt;rxtrigger);</div><div class='hunk'>@@ -1062,9 +1033,38 @@ wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id)</div><div class='ctx'> 	data-&gt;dev-&gt;priv = data;</div><div class='ctx'> 	data-&gt;dev-&gt;dev.parent = &amp;device-&gt;dev;</div><div class='ctx'> </div><div class='add'>+	if (!request_region(data-&gt;wbase, WAKEUP_IOMEM_LEN, DRVNAME)) {</div><div class='add'>+		dev_err(dev, "Region 0x%lx-0x%lx already in use!\n",</div><div class='add'>+			data-&gt;wbase, data-&gt;wbase + WAKEUP_IOMEM_LEN - 1);</div><div class='add'>+		err = -EBUSY;</div><div class='add'>+		goto exit_free_rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!request_region(data-&gt;ebase, EHFUNC_IOMEM_LEN, DRVNAME)) {</div><div class='add'>+		dev_err(dev, "Region 0x%lx-0x%lx already in use!\n",</div><div class='add'>+			data-&gt;ebase, data-&gt;ebase + EHFUNC_IOMEM_LEN - 1);</div><div class='add'>+		err = -EBUSY;</div><div class='add'>+		goto exit_release_wbase;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!request_region(data-&gt;sbase, SP_IOMEM_LEN, DRVNAME)) {</div><div class='add'>+		dev_err(dev, "Region 0x%lx-0x%lx already in use!\n",</div><div class='add'>+			data-&gt;sbase, data-&gt;sbase + SP_IOMEM_LEN - 1);</div><div class='add'>+		err = -EBUSY;</div><div class='add'>+		goto exit_release_ebase;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = request_irq(data-&gt;irq, wbcir_irq_handler,</div><div class='add'>+			  IRQF_DISABLED, DRVNAME, device);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to claim IRQ %u\n", data-&gt;irq);</div><div class='add'>+		err = -EBUSY;</div><div class='add'>+		goto exit_release_sbase;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = rc_register_device(data-&gt;dev);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto exit_free_rc;</div><div class='add'>+		goto exit_free_irq;</div><div class='ctx'> </div><div class='ctx'> 	device_init_wakeup(&amp;device-&gt;dev, 1);</div><div class='ctx'> </div><div class='hunk'>@@ -1072,14 +1072,6 @@ wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-exit_free_rc:</div><div class='del'>-	rc_free_device(data-&gt;dev);</div><div class='del'>-exit_unregister_led:</div><div class='del'>-	led_classdev_unregister(&amp;data-&gt;led);</div><div class='del'>-exit_unregister_rxtrigger:</div><div class='del'>-	led_trigger_unregister_simple(data-&gt;rxtrigger);</div><div class='del'>-exit_unregister_txtrigger:</div><div class='del'>-	led_trigger_unregister_simple(data-&gt;txtrigger);</div><div class='ctx'> exit_free_irq:</div><div class='ctx'> 	free_irq(data-&gt;irq, device);</div><div class='ctx'> exit_release_sbase:</div><div class='hunk'>@@ -1088,6 +1080,14 @@ exit_release_ebase:</div><div class='ctx'> 	release_region(data-&gt;ebase, EHFUNC_IOMEM_LEN);</div><div class='ctx'> exit_release_wbase:</div><div class='ctx'> 	release_region(data-&gt;wbase, WAKEUP_IOMEM_LEN);</div><div class='add'>+exit_free_rc:</div><div class='add'>+	rc_free_device(data-&gt;dev);</div><div class='add'>+exit_unregister_led:</div><div class='add'>+	led_classdev_unregister(&amp;data-&gt;led);</div><div class='add'>+exit_unregister_rxtrigger:</div><div class='add'>+	led_trigger_unregister_simple(data-&gt;rxtrigger);</div><div class='add'>+exit_unregister_txtrigger:</div><div class='add'>+	led_trigger_unregister_simple(data-&gt;txtrigger);</div><div class='ctx'> exit_free_data:</div><div class='ctx'> 	kfree(data);</div><div class='ctx'> 	pnp_set_drvdata(device, NULL);</div><div class='head'>diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig<br/>index ce1e7ba940f6..99937c94d7df 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/Kconfig</a></div><div class='hunk'>@@ -472,6 +472,9 @@ comment "Camera sensor devices"</div><div class='ctx'> config VIDEO_APTINA_PLL</div><div class='ctx'> 	tristate</div><div class='ctx'> </div><div class='add'>+config VIDEO_SMIAPP_PLL</div><div class='add'>+	tristate</div><div class='add'>+</div><div class='ctx'> config VIDEO_OV7670</div><div class='ctx'> 	tristate "OmniVision OV7670 sensor support"</div><div class='ctx'> 	depends on I2C &amp;&amp; VIDEO_V4L2</div><div class='hunk'>@@ -556,6 +559,8 @@ config VIDEO_S5K6AA</div><div class='ctx'> 	  This is a V4L2 sensor-level driver for Samsung S5K6AA(FX) 1.3M</div><div class='ctx'> 	  camera sensor with an embedded SoC image signal processor.</div><div class='ctx'> </div><div class='add'>+source "drivers/media/video/smiapp/Kconfig"</div><div class='add'>+</div><div class='ctx'> comment "Flash devices"</div><div class='ctx'> </div><div class='ctx'> config VIDEO_ADP1653</div><div class='hunk'>@@ -644,6 +649,8 @@ menuconfig V4L_USB_DRIVERS</div><div class='ctx'> </div><div class='ctx'> if V4L_USB_DRIVERS</div><div class='ctx'> </div><div class='add'>+source "drivers/media/video/au0828/Kconfig"</div><div class='add'>+</div><div class='ctx'> source "drivers/media/video/uvc/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/media/video/gspca/Kconfig"</div><div class='hunk'>@@ -662,8 +669,6 @@ source "drivers/media/video/tm6000/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/media/video/usbvision/Kconfig"</div><div class='ctx'> </div><div class='del'>-source "drivers/media/video/et61x251/Kconfig"</div><div class='del'>-</div><div class='ctx'> source "drivers/media/video/sn9c102/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/media/video/pwc/Kconfig"</div><div class='hunk'>@@ -721,8 +726,6 @@ menuconfig V4L_PCI_DRIVERS</div><div class='ctx'> </div><div class='ctx'> if V4L_PCI_DRIVERS</div><div class='ctx'> </div><div class='del'>-source "drivers/media/video/au0828/Kconfig"</div><div class='del'>-</div><div class='ctx'> source "drivers/media/video/bt8xx/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/media/video/cx18/Kconfig"</div><div class='hunk'>@@ -794,6 +797,19 @@ source "drivers/media/video/saa7164/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/media/video/zoran/Kconfig"</div><div class='ctx'> </div><div class='add'>+config STA2X11_VIP</div><div class='add'>+	tristate "STA2X11 VIP Video For Linux"</div><div class='add'>+	depends on STA2X11</div><div class='add'>+	select VIDEO_ADV7180 if VIDEO_HELPER_CHIPS_AUTO</div><div class='add'>+	select VIDEOBUF_DMA_CONTIG</div><div class='add'>+	depends on PCI &amp;&amp; VIDEO_V4L2 &amp;&amp; VIRT_TO_BUS</div><div class='add'>+	help</div><div class='add'>+	  Say Y for support for STA2X11 VIP (Video Input Port) capture</div><div class='add'>+	  device.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called sta2x11_vip.</div><div class='add'>+</div><div class='ctx'> endif # V4L_PCI_DRIVERS</div><div class='ctx'> </div><div class='ctx'> #</div><div class='hunk'>@@ -1127,19 +1143,6 @@ config VIDEO_MX2</div><div class='ctx'> 	  This is a v4l2 driver for the i.MX27 and the i.MX25 Camera Sensor</div><div class='ctx'> 	  Interface</div><div class='ctx'> </div><div class='del'>-config  VIDEO_SAMSUNG_S5P_FIMC</div><div class='del'>-	tristate "Samsung S5P and EXYNOS4 camera interface driver (EXPERIMENTAL)"</div><div class='del'>-	depends on VIDEO_V4L2 &amp;&amp; I2C &amp;&amp; PLAT_S5P &amp;&amp; PM_RUNTIME &amp;&amp; \</div><div class='del'>-		VIDEO_V4L2_SUBDEV_API &amp;&amp; EXPERIMENTAL</div><div class='del'>-	select VIDEOBUF2_DMA_CONTIG</div><div class='del'>-	select V4L2_MEM2MEM_DEV</div><div class='del'>-	---help---</div><div class='del'>-	  This is a v4l2 driver for Samsung S5P and EXYNOS4 camera</div><div class='del'>-	  host interface and video postprocessor.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the</div><div class='del'>-	  module will be called s5p-fimc.</div><div class='del'>-</div><div class='ctx'> config VIDEO_ATMEL_ISI</div><div class='ctx'> 	tristate "ATMEL Image Sensor Interface (ISI) support"</div><div class='ctx'> 	depends on VIDEO_DEV &amp;&amp; SOC_CAMERA &amp;&amp; ARCH_AT91</div><div class='hunk'>@@ -1148,16 +1151,7 @@ config VIDEO_ATMEL_ISI</div><div class='ctx'> 	  This module makes the ATMEL Image Sensor Interface available</div><div class='ctx'> 	  as a v4l2 device.</div><div class='ctx'> </div><div class='del'>-config VIDEO_S5P_MIPI_CSIS</div><div class='del'>-	tristate "Samsung S5P and EXYNOS4 MIPI CSI receiver driver"</div><div class='del'>-	depends on VIDEO_V4L2 &amp;&amp; PM_RUNTIME &amp;&amp; PLAT_S5P</div><div class='del'>-	depends on VIDEO_V4L2_SUBDEV_API &amp;&amp; REGULATOR</div><div class='del'>-	---help---</div><div class='del'>-	  This is a v4l2 driver for Samsung S5P/EXYNOS4 MIPI-CSI receiver.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the</div><div class='del'>-	  module will be called s5p-csis.</div><div class='del'>-</div><div class='add'>+source "drivers/media/video/s5p-fimc/Kconfig"</div><div class='ctx'> source "drivers/media/video/s5p-tv/Kconfig"</div><div class='ctx'> </div><div class='ctx'> endif # V4L_PLATFORM_DRIVERS</div><div class='head'>diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile<br/>index a6282a3a6a82..d209de0e0ca8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/Makefile</a></div><div class='hunk'>@@ -79,9 +79,12 @@ obj-$(CONFIG_VIDEO_SR030PC30)	+= sr030pc30.o</div><div class='ctx'> obj-$(CONFIG_VIDEO_NOON010PC30)	+= noon010pc30.o</div><div class='ctx'> obj-$(CONFIG_VIDEO_M5MOLS)	+= m5mols/</div><div class='ctx'> obj-$(CONFIG_VIDEO_S5K6AA)	+= s5k6aa.o</div><div class='add'>+obj-$(CONFIG_VIDEO_SMIAPP)	+= smiapp/</div><div class='ctx'> obj-$(CONFIG_VIDEO_ADP1653)	+= adp1653.o</div><div class='ctx'> obj-$(CONFIG_VIDEO_AS3645A)	+= as3645a.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_VIDEO_SMIAPP_PLL)	+= smiapp-pll.o</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_SOC_CAMERA_IMX074)		+= imx074.o</div><div class='ctx'> obj-$(CONFIG_SOC_CAMERA_MT9M001)	+= mt9m001.o</div><div class='ctx'> obj-$(CONFIG_SOC_CAMERA_MT9M111)	+= mt9m111.o</div><div class='hunk'>@@ -120,6 +123,7 @@ obj-$(CONFIG_VIDEO_TM6000) += tm6000/</div><div class='ctx'> obj-$(CONFIG_VIDEO_MXB) += mxb.o</div><div class='ctx'> obj-$(CONFIG_VIDEO_HEXIUM_ORION) += hexium_orion.o</div><div class='ctx'> obj-$(CONFIG_VIDEO_HEXIUM_GEMINI) += hexium_gemini.o</div><div class='add'>+obj-$(CONFIG_STA2X11_VIP) += sta2x11_vip.o</div><div class='ctx'> obj-$(CONFIG_VIDEO_TIMBERDALE)	+= timblogiw.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_VIDEOBUF_GEN) += videobuf-core.o</div><div class='hunk'>@@ -152,7 +156,6 @@ obj-$(CONFIG_USB_ZR364XX)       += zr364xx.o</div><div class='ctx'> obj-$(CONFIG_USB_STKWEBCAM)     += stkwebcam.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_USB_SN9C102)       += sn9c102/</div><div class='del'>-obj-$(CONFIG_USB_ET61X251)      += et61x251/</div><div class='ctx'> obj-$(CONFIG_USB_PWC)           += pwc/</div><div class='ctx'> obj-$(CONFIG_USB_GSPCA)         += gspca/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/adp1653.c b/drivers/media/video/adp1653.c<br/>index 5b045b4a66fe..57e87090388d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/adp1653.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/adp1653.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/adp1653.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/adp1653.c</a></div><div class='hunk'>@@ -34,7 +34,6 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/version.h&gt;</div><div class='ctx'> #include &lt;media/adp1653.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -282,19 +281,19 @@ adp1653_init_device(struct adp1653_flash *flash)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;flash-&gt;ctrls.lock);</div><div class='add'>+	mutex_lock(flash-&gt;ctrls.lock);</div><div class='ctx'> 	/* Reset faults before reading new ones. */</div><div class='ctx'> 	flash-&gt;fault = 0;</div><div class='ctx'> 	rval = adp1653_get_fault(flash);</div><div class='del'>-	mutex_unlock(&amp;flash-&gt;ctrls.lock);</div><div class='add'>+	mutex_unlock(flash-&gt;ctrls.lock);</div><div class='ctx'> 	if (rval &gt; 0) {</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "faults detected: 0x%1.1x\n", rval);</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;flash-&gt;ctrls.lock);</div><div class='add'>+	mutex_lock(flash-&gt;ctrls.lock);</div><div class='ctx'> 	rval = adp1653_update_hw(flash);</div><div class='del'>-	mutex_unlock(&amp;flash-&gt;ctrls.lock);</div><div class='add'>+	mutex_unlock(flash-&gt;ctrls.lock);</div><div class='ctx'> 	if (rval) {</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev,</div><div class='ctx'> 			"adp1653_update_hw failed at %s\n", __func__);</div><div class='head'>diff --git a/drivers/media/video/adv7180.c b/drivers/media/video/adv7180.c<br/>index b8b6c4b0cad4..174bffacf117 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/adv7180.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/adv7180.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/adv7180.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/adv7180.c</a></div><div class='hunk'>@@ -48,6 +48,7 @@</div><div class='ctx'> #define ADV7180_INPUT_CONTROL_PAL_COMB_N_PED		0xd0</div><div class='ctx'> #define ADV7180_INPUT_CONTROL_PAL_SECAM			0xe0</div><div class='ctx'> #define ADV7180_INPUT_CONTROL_PAL_SECAM_PED		0xf0</div><div class='add'>+#define ADV7180_INPUT_CONTROL_INSEL_MASK		0x0f</div><div class='ctx'> </div><div class='ctx'> #define ADV7180_EXTENDED_OUTPUT_CONTROL_REG		0x04</div><div class='ctx'> #define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS		0xC5</div><div class='hunk'>@@ -55,9 +56,29 @@</div><div class='ctx'> #define ADV7180_AUTODETECT_ENABLE_REG			0x07</div><div class='ctx'> #define ADV7180_AUTODETECT_DEFAULT			0x7f</div><div class='ctx'> </div><div class='add'>+#define ADV7180_CON_REG		0x08	/*Unsigned */</div><div class='add'>+#define CON_REG_MIN		0</div><div class='add'>+#define CON_REG_DEF		128</div><div class='add'>+#define CON_REG_MAX		255</div><div class='add'>+</div><div class='add'>+#define ADV7180_BRI_REG		0x0a	/*Signed */</div><div class='add'>+#define BRI_REG_MIN		-128</div><div class='add'>+#define BRI_REG_DEF		0</div><div class='add'>+#define BRI_REG_MAX		127</div><div class='add'>+</div><div class='add'>+#define ADV7180_HUE_REG		0x0b	/*Signed, inverted */</div><div class='add'>+#define HUE_REG_MIN		-127</div><div class='add'>+#define HUE_REG_DEF		0</div><div class='add'>+#define HUE_REG_MAX		128</div><div class='add'>+</div><div class='ctx'> #define ADV7180_ADI_CTRL_REG				0x0e</div><div class='ctx'> #define ADV7180_ADI_CTRL_IRQ_SPACE			0x20</div><div class='ctx'> </div><div class='add'>+#define ADV7180_PWR_MAN_REG		0x0f</div><div class='add'>+#define ADV7180_PWR_MAN_ON		0x04</div><div class='add'>+#define ADV7180_PWR_MAN_OFF		0x24</div><div class='add'>+#define ADV7180_PWR_MAN_RES		0x80</div><div class='add'>+</div><div class='ctx'> #define ADV7180_STATUS1_REG				0x10</div><div class='ctx'> #define ADV7180_STATUS1_IN_LOCK		0x01</div><div class='ctx'> #define ADV7180_STATUS1_AUTOD_MASK	0x70</div><div class='hunk'>@@ -78,6 +99,12 @@</div><div class='ctx'> #define ADV7180_ICONF1_PSYNC_ONLY	0x10</div><div class='ctx'> #define ADV7180_ICONF1_ACTIVE_TO_CLR	0xC0</div><div class='ctx'> </div><div class='add'>+#define ADV7180_SD_SAT_CB_REG	0xe3	/*Unsigned */</div><div class='add'>+#define ADV7180_SD_SAT_CR_REG	0xe4	/*Unsigned */</div><div class='add'>+#define SAT_REG_MIN		0</div><div class='add'>+#define SAT_REG_DEF		128</div><div class='add'>+#define SAT_REG_MAX		255</div><div class='add'>+</div><div class='ctx'> #define ADV7180_IRQ1_LOCK	0x01</div><div class='ctx'> #define ADV7180_IRQ1_UNLOCK	0x02</div><div class='ctx'> #define ADV7180_ISR1_ADI	0x42</div><div class='hunk'>@@ -90,6 +117,9 @@</div><div class='ctx'> #define ADV7180_IMR3_ADI	0x4C</div><div class='ctx'> #define ADV7180_IMR4_ADI	0x50</div><div class='ctx'> </div><div class='add'>+#define ADV7180_NTSC_V_BIT_END_REG	0xE6</div><div class='add'>+#define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND	0x4F</div><div class='add'>+</div><div class='ctx'> struct adv7180_state {</div><div class='ctx'> 	struct v4l2_subdev	sd;</div><div class='ctx'> 	struct work_struct	work;</div><div class='hunk'>@@ -97,6 +127,11 @@ struct adv7180_state {</div><div class='ctx'> 	int			irq;</div><div class='ctx'> 	v4l2_std_id		curr_norm;</div><div class='ctx'> 	bool			autodetect;</div><div class='add'>+	s8			brightness;</div><div class='add'>+	s16			hue;</div><div class='add'>+	u8			contrast;</div><div class='add'>+	u8			saturation;</div><div class='add'>+	u8			input;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static v4l2_std_id adv7180_std_to_v4l2(u8 status1)</div><div class='hunk'>@@ -155,7 +190,7 @@ static u32 adv7180_status_to_v4l2(u8 status1)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __adv7180_status(struct i2c_client *client, u32 *status,</div><div class='del'>-	v4l2_std_id *std)</div><div class='add'>+			    v4l2_std_id *std)</div><div class='ctx'> {</div><div class='ctx'> 	int status1 = i2c_smbus_read_byte_data(client, ADV7180_STATUS1_REG);</div><div class='ctx'> </div><div class='hunk'>@@ -192,6 +227,36 @@ static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input,</div><div class='add'>+			     u32 output, u32 config)</div><div class='add'>+{</div><div class='add'>+	struct adv7180_state *state = to_state(sd);</div><div class='add'>+	int ret = mutex_lock_interruptible(&amp;state-&gt;mutex);</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(sd);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*We cannot discriminate between LQFP and 40-pin LFCSP, so accept</div><div class='add'>+	 * all inputs and let the card driver take care of validation</div><div class='add'>+	 */</div><div class='add'>+	if ((input &amp; ADV7180_INPUT_CONTROL_INSEL_MASK) != input)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_byte_data(client, ADV7180_INPUT_CONTROL_REG);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret &amp;= ~ADV7180_INPUT_CONTROL_INSEL_MASK;</div><div class='add'>+	ret = i2c_smbus_write_byte_data(client,</div><div class='add'>+					ADV7180_INPUT_CONTROL_REG, ret | input);</div><div class='add'>+	state-&gt;input = input;</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;state-&gt;mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)</div><div class='ctx'> {</div><div class='ctx'> 	struct adv7180_state *state = to_state(sd);</div><div class='hunk'>@@ -205,7 +270,7 @@ static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int adv7180_g_chip_ident(struct v4l2_subdev *sd,</div><div class='del'>-	struct v4l2_dbg_chip_ident *chip)</div><div class='add'>+				struct v4l2_dbg_chip_ident *chip)</div><div class='ctx'> {</div><div class='ctx'> 	struct i2c_client *client = v4l2_get_subdevdata(sd);</div><div class='ctx'> </div><div class='hunk'>@@ -222,9 +287,10 @@ static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)</div><div class='ctx'> </div><div class='ctx'> 	/* all standards -&gt; autodetect */</div><div class='ctx'> 	if (std == V4L2_STD_ALL) {</div><div class='del'>-		ret = i2c_smbus_write_byte_data(client,</div><div class='del'>-			ADV7180_INPUT_CONTROL_REG,</div><div class='del'>-			ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM);</div><div class='add'>+		ret =</div><div class='add'>+		    i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,</div><div class='add'>+				ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM</div><div class='add'>+					      | state-&gt;input);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -236,7 +302,8 @@ static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='ctx'> 		ret = i2c_smbus_write_byte_data(client,</div><div class='del'>-			ADV7180_INPUT_CONTROL_REG, ret);</div><div class='add'>+						ADV7180_INPUT_CONTROL_REG,</div><div class='add'>+						ret | state-&gt;input);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -249,14 +316,138 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int adv7180_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)</div><div class='add'>+{</div><div class='add'>+	switch (qc-&gt;id) {</div><div class='add'>+	case V4L2_CID_BRIGHTNESS:</div><div class='add'>+		return v4l2_ctrl_query_fill(qc, BRI_REG_MIN, BRI_REG_MAX,</div><div class='add'>+					    1, BRI_REG_DEF);</div><div class='add'>+	case V4L2_CID_HUE:</div><div class='add'>+		return v4l2_ctrl_query_fill(qc, HUE_REG_MIN, HUE_REG_MAX,</div><div class='add'>+					    1, HUE_REG_DEF);</div><div class='add'>+	case V4L2_CID_CONTRAST:</div><div class='add'>+		return v4l2_ctrl_query_fill(qc, CON_REG_MIN, CON_REG_MAX,</div><div class='add'>+					    1, CON_REG_DEF);</div><div class='add'>+	case V4L2_CID_SATURATION:</div><div class='add'>+		return v4l2_ctrl_query_fill(qc, SAT_REG_MIN, SAT_REG_MAX,</div><div class='add'>+					    1, SAT_REG_DEF);</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adv7180_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct adv7180_state *state = to_state(sd);</div><div class='add'>+	int ret = mutex_lock_interruptible(&amp;state-&gt;mutex);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_BRIGHTNESS:</div><div class='add'>+		ctrl-&gt;value = state-&gt;brightness;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_HUE:</div><div class='add'>+		ctrl-&gt;value = state-&gt;hue;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_CONTRAST:</div><div class='add'>+		ctrl-&gt;value = state-&gt;contrast;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_SATURATION:</div><div class='add'>+		ctrl-&gt;value = state-&gt;saturation;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;state-&gt;mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adv7180_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct adv7180_state *state = to_state(sd);</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(sd);</div><div class='add'>+	int ret = mutex_lock_interruptible(&amp;state-&gt;mutex);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_BRIGHTNESS:</div><div class='add'>+		if ((ctrl-&gt;value &gt; BRI_REG_MAX)</div><div class='add'>+		    || (ctrl-&gt;value &lt; BRI_REG_MIN)) {</div><div class='add'>+			ret = -ERANGE;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		state-&gt;brightness = ctrl-&gt;value;</div><div class='add'>+		ret = i2c_smbus_write_byte_data(client,</div><div class='add'>+						ADV7180_BRI_REG,</div><div class='add'>+						state-&gt;brightness);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_HUE:</div><div class='add'>+		if ((ctrl-&gt;value &gt; HUE_REG_MAX)</div><div class='add'>+		    || (ctrl-&gt;value &lt; HUE_REG_MIN)) {</div><div class='add'>+			ret = -ERANGE;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		state-&gt;hue = ctrl-&gt;value;</div><div class='add'>+		/*Hue is inverted according to HSL chart */</div><div class='add'>+		ret = i2c_smbus_write_byte_data(client,</div><div class='add'>+						ADV7180_HUE_REG, -state-&gt;hue);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_CONTRAST:</div><div class='add'>+		if ((ctrl-&gt;value &gt; CON_REG_MAX)</div><div class='add'>+		    || (ctrl-&gt;value &lt; CON_REG_MIN)) {</div><div class='add'>+			ret = -ERANGE;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		state-&gt;contrast = ctrl-&gt;value;</div><div class='add'>+		ret = i2c_smbus_write_byte_data(client,</div><div class='add'>+						ADV7180_CON_REG,</div><div class='add'>+						state-&gt;contrast);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_SATURATION:</div><div class='add'>+		if ((ctrl-&gt;value &gt; SAT_REG_MAX)</div><div class='add'>+		    || (ctrl-&gt;value &lt; SAT_REG_MIN)) {</div><div class='add'>+			ret = -ERANGE;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		/*</div><div class='add'>+		 *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE</div><div class='add'>+		 *Let's not confuse the user, everybody understands saturation</div><div class='add'>+		 */</div><div class='add'>+		state-&gt;saturation = ctrl-&gt;value;</div><div class='add'>+		ret = i2c_smbus_write_byte_data(client,</div><div class='add'>+						ADV7180_SD_SAT_CB_REG,</div><div class='add'>+						state-&gt;saturation);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+		ret = i2c_smbus_write_byte_data(client,</div><div class='add'>+						ADV7180_SD_SAT_CR_REG,</div><div class='add'>+						state-&gt;saturation);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;state-&gt;mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct v4l2_subdev_video_ops adv7180_video_ops = {</div><div class='ctx'> 	.querystd = adv7180_querystd,</div><div class='ctx'> 	.g_input_status = adv7180_g_input_status,</div><div class='add'>+	.s_routing = adv7180_s_routing,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct v4l2_subdev_core_ops adv7180_core_ops = {</div><div class='ctx'> 	.g_chip_ident = adv7180_g_chip_ident,</div><div class='ctx'> 	.s_std = adv7180_s_std,</div><div class='add'>+	.queryctrl = adv7180_queryctrl,</div><div class='add'>+	.g_ctrl = adv7180_g_ctrl,</div><div class='add'>+	.s_ctrl = adv7180_s_ctrl,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct v4l2_subdev_ops adv7180_ops = {</div><div class='hunk'>@@ -267,13 +458,13 @@ static const struct v4l2_subdev_ops adv7180_ops = {</div><div class='ctx'> static void adv7180_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct adv7180_state *state = container_of(work, struct adv7180_state,</div><div class='del'>-		work);</div><div class='add'>+						   work);</div><div class='ctx'> 	struct i2c_client *client = v4l2_get_subdevdata(&amp;state-&gt;sd);</div><div class='ctx'> 	u8 isr3;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;state-&gt;mutex);</div><div class='ctx'> 	i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG,</div><div class='del'>-		ADV7180_ADI_CTRL_IRQ_SPACE);</div><div class='add'>+				  ADV7180_ADI_CTRL_IRQ_SPACE);</div><div class='ctx'> 	isr3 = i2c_smbus_read_byte_data(client, ADV7180_ISR3_ADI);</div><div class='ctx'> 	/* clear */</div><div class='ctx'> 	i2c_smbus_write_byte_data(client, ADV7180_ICR3_ADI, isr3);</div><div class='hunk'>@@ -297,56 +488,51 @@ static irqreturn_t adv7180_irq(int irq, void *devid)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Generic i2c probe</div><div class='del'>- * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '&gt;&gt;1'</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static __devinit int adv7180_probe(struct i2c_client *client,</div><div class='del'>-			const struct i2c_device_id *id)</div><div class='add'>+static int init_device(struct i2c_client *client, struct adv7180_state *state)</div><div class='ctx'> {</div><div class='del'>-	struct adv7180_state *state;</div><div class='del'>-	struct v4l2_subdev *sd;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/* Check if the adapter supports the needed features */</div><div class='del'>-	if (!i2c_check_functionality(client-&gt;adapter, I2C_FUNC_SMBUS_BYTE_DATA))</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	v4l_info(client, "chip found @ 0x%02x (%s)\n",</div><div class='del'>-			client-&gt;addr &lt;&lt; 1, client-&gt;adapter-&gt;name);</div><div class='del'>-</div><div class='del'>-	state = kzalloc(sizeof(struct adv7180_state), GFP_KERNEL);</div><div class='del'>-	if (state == NULL) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	state-&gt;irq = client-&gt;irq;</div><div class='del'>-	INIT_WORK(&amp;state-&gt;work, adv7180_work);</div><div class='del'>-	mutex_init(&amp;state-&gt;mutex);</div><div class='del'>-	state-&gt;autodetect = true;</div><div class='del'>-	sd = &amp;state-&gt;sd;</div><div class='del'>-	v4l2_i2c_subdev_init(sd, client, &amp;adv7180_ops);</div><div class='del'>-</div><div class='ctx'> 	/* Initialize adv7180 */</div><div class='ctx'> 	/* Enable autodetection */</div><div class='del'>-	ret = i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,</div><div class='del'>-		ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto err_unreg_subdev;</div><div class='add'>+	if (state-&gt;autodetect) {</div><div class='add'>+		ret =</div><div class='add'>+		    i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,</div><div class='add'>+				ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM</div><div class='add'>+					      | state-&gt;input);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-	ret = i2c_smbus_write_byte_data(client, ADV7180_AUTODETECT_ENABLE_REG,</div><div class='del'>-		ADV7180_AUTODETECT_DEFAULT);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto err_unreg_subdev;</div><div class='add'>+		ret =</div><div class='add'>+		    i2c_smbus_write_byte_data(client,</div><div class='add'>+					      ADV7180_AUTODETECT_ENABLE_REG,</div><div class='add'>+					      ADV7180_AUTODETECT_DEFAULT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	} else {</div><div class='add'>+		ret = v4l2_std_to_adv7180(state-&gt;curr_norm);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='add'>+		ret =</div><div class='add'>+		    i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,</div><div class='add'>+					      ret | state-&gt;input);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+	}</div><div class='ctx'> 	/* ITU-R BT.656-4 compatible */</div><div class='ctx'> 	ret = i2c_smbus_write_byte_data(client,</div><div class='del'>-		ADV7180_EXTENDED_OUTPUT_CONTROL_REG,</div><div class='del'>-		ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);</div><div class='add'>+			ADV7180_EXTENDED_OUTPUT_CONTROL_REG,</div><div class='add'>+			ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto err_unreg_subdev;</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Manually set V bit end position in NTSC mode */</div><div class='add'>+	ret = i2c_smbus_write_byte_data(client,</div><div class='add'>+					ADV7180_NTSC_V_BIT_END_REG,</div><div class='add'>+					ADV7180_NTSC_V_BIT_END_MANUAL_NVEND);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* read current norm */</div><div class='ctx'> 	__adv7180_status(client, NULL, &amp;state-&gt;curr_norm);</div><div class='hunk'>@@ -354,45 +540,109 @@ static __devinit int adv7180_probe(struct i2c_client *client,</div><div class='ctx'> 	/* register for interrupts */</div><div class='ctx'> 	if (state-&gt;irq &gt; 0) {</div><div class='ctx'> 		ret = request_irq(state-&gt;irq, adv7180_irq, 0, DRIVER_NAME,</div><div class='del'>-			state);</div><div class='add'>+				  state);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto err_unreg_subdev;</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		ret = i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG,</div><div class='del'>-			ADV7180_ADI_CTRL_IRQ_SPACE);</div><div class='add'>+						ADV7180_ADI_CTRL_IRQ_SPACE);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto err_unreg_subdev;</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		/* config the Interrupt pin to be active low */</div><div class='ctx'> 		ret = i2c_smbus_write_byte_data(client, ADV7180_ICONF1_ADI,</div><div class='del'>-			ADV7180_ICONF1_ACTIVE_LOW | ADV7180_ICONF1_PSYNC_ONLY);</div><div class='add'>+						ADV7180_ICONF1_ACTIVE_LOW |</div><div class='add'>+						ADV7180_ICONF1_PSYNC_ONLY);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto err_unreg_subdev;</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		ret = i2c_smbus_write_byte_data(client, ADV7180_IMR1_ADI, 0);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto err_unreg_subdev;</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		ret = i2c_smbus_write_byte_data(client, ADV7180_IMR2_ADI, 0);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto err_unreg_subdev;</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		/* enable AD change interrupts interrupts */</div><div class='ctx'> 		ret = i2c_smbus_write_byte_data(client, ADV7180_IMR3_ADI,</div><div class='del'>-			ADV7180_IRQ3_AD_CHANGE);</div><div class='add'>+						ADV7180_IRQ3_AD_CHANGE);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto err_unreg_subdev;</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		ret = i2c_smbus_write_byte_data(client, ADV7180_IMR4_ADI, 0);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto err_unreg_subdev;</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		ret = i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG,</div><div class='del'>-			0);</div><div class='add'>+						0);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto err_unreg_subdev;</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*Set default value for controls */</div><div class='add'>+	ret = i2c_smbus_write_byte_data(client, ADV7180_BRI_REG,</div><div class='add'>+					state-&gt;brightness);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_write_byte_data(client, ADV7180_HUE_REG, state-&gt;hue);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_write_byte_data(client, ADV7180_CON_REG,</div><div class='add'>+					state-&gt;contrast);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_write_byte_data(client, ADV7180_SD_SAT_CB_REG,</div><div class='add'>+					state-&gt;saturation);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_write_byte_data(client, ADV7180_SD_SAT_CR_REG,</div><div class='add'>+					state-&gt;saturation);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __devinit int adv7180_probe(struct i2c_client *client,</div><div class='add'>+				   const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct adv7180_state *state;</div><div class='add'>+	struct v4l2_subdev *sd;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Check if the adapter supports the needed features */</div><div class='add'>+	if (!i2c_check_functionality(client-&gt;adapter, I2C_FUNC_SMBUS_BYTE_DATA))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	v4l_info(client, "chip found @ 0x%02x (%s)\n",</div><div class='add'>+		 client-&gt;addr, client-&gt;adapter-&gt;name);</div><div class='add'>+</div><div class='add'>+	state = kzalloc(sizeof(struct adv7180_state), GFP_KERNEL);</div><div class='add'>+	if (state == NULL) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	state-&gt;irq = client-&gt;irq;</div><div class='add'>+	INIT_WORK(&amp;state-&gt;work, adv7180_work);</div><div class='add'>+	mutex_init(&amp;state-&gt;mutex);</div><div class='add'>+	state-&gt;autodetect = true;</div><div class='add'>+	state-&gt;brightness = BRI_REG_DEF;</div><div class='add'>+	state-&gt;hue = HUE_REG_DEF;</div><div class='add'>+	state-&gt;contrast = CON_REG_DEF;</div><div class='add'>+	state-&gt;saturation = SAT_REG_DEF;</div><div class='add'>+	state-&gt;input = 0;</div><div class='add'>+	sd = &amp;state-&gt;sd;</div><div class='add'>+	v4l2_i2c_subdev_init(sd, client, &amp;adv7180_ops);</div><div class='add'>+</div><div class='add'>+	ret = init_device(client, state);</div><div class='add'>+	if (0 != ret)</div><div class='add'>+		goto err_unreg_subdev;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_unreg_subdev:</div><div class='hunk'>@@ -432,16 +682,49 @@ static const struct i2c_device_id adv7180_id[] = {</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+static int adv7180_suspend(struct i2c_client *client, pm_message_t state)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_write_byte_data(client, ADV7180_PWR_MAN_REG,</div><div class='add'>+					ADV7180_PWR_MAN_OFF);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adv7180_resume(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subdev *sd = i2c_get_clientdata(client);</div><div class='add'>+	struct adv7180_state *state = to_state(sd);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_write_byte_data(client, ADV7180_PWR_MAN_REG,</div><div class='add'>+					ADV7180_PWR_MAN_ON);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = init_device(client, state);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> MODULE_DEVICE_TABLE(i2c, adv7180_id);</div><div class='ctx'> </div><div class='ctx'> static struct i2c_driver adv7180_driver = {</div><div class='ctx'> 	.driver = {</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='del'>-		.name	= DRIVER_NAME,</div><div class='del'>-	},</div><div class='del'>-	.probe		= adv7180_probe,</div><div class='del'>-	.remove		= __devexit_p(adv7180_remove),</div><div class='del'>-	.id_table	= adv7180_id,</div><div class='add'>+		   .owner = THIS_MODULE,</div><div class='add'>+		   .name = DRIVER_NAME,</div><div class='add'>+		   },</div><div class='add'>+	.probe = adv7180_probe,</div><div class='add'>+	.remove = __devexit_p(adv7180_remove),</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+	.suspend = adv7180_suspend,</div><div class='add'>+	.resume = adv7180_resume,</div><div class='add'>+#endif</div><div class='add'>+	.id_table = adv7180_id,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_i2c_driver(adv7180_driver);</div><div class='head'>diff --git a/drivers/media/video/adv7343.c b/drivers/media/video/adv7343.c<br/>index 119b60401bf3..2b5aa676a84e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/adv7343.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/adv7343.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/adv7343.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/adv7343.c</a></div><div class='hunk'>@@ -130,14 +130,12 @@ static int adv7343_setstd(struct v4l2_subdev *sd, v4l2_std_id std)</div><div class='ctx'> {</div><div class='ctx'> 	struct adv7343_state *state = to_state(sd);</div><div class='ctx'> 	struct adv7343_std_info *std_info;</div><div class='del'>-	int output_idx, num_std;</div><div class='add'>+	int num_std;</div><div class='ctx'> 	char *fsc_ptr;</div><div class='ctx'> 	u8 reg, val;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='del'>-	output_idx = state-&gt;output;</div><div class='del'>-</div><div class='ctx'> 	std_info = (struct adv7343_std_info *)stdinfo;</div><div class='ctx'> 	num_std = ARRAY_SIZE(stdinfo);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/aptina-pll.c b/drivers/media/video/aptina-pll.c<br/>index 0bd3813bb59d..8153a449846b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/aptina-pll.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/aptina-pll.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/aptina-pll.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/aptina-pll.c</a></div><div class='hunk'>@@ -148,9 +148,8 @@ int aptina_pll_calculate(struct device *dev,</div><div class='ctx'> 		unsigned int mf_high;</div><div class='ctx'> 		unsigned int mf_low;</div><div class='ctx'> </div><div class='del'>-		mf_low = max(roundup(mf_min, mf_inc),</div><div class='del'>-			     DIV_ROUND_UP(pll-&gt;ext_clock * p1,</div><div class='del'>-			       limits-&gt;int_clock_max * div));</div><div class='add'>+		mf_low = roundup(max(mf_min, DIV_ROUND_UP(pll-&gt;ext_clock * p1,</div><div class='add'>+					limits-&gt;int_clock_max * div)), mf_inc);</div><div class='ctx'> 		mf_high = min(mf_max, pll-&gt;ext_clock * p1 /</div><div class='ctx'> 			      (limits-&gt;int_clock_min * div));</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/arv.c b/drivers/media/video/arv.c<br/>index b6ed44aebe30..e346d32d08ce 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/arv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/arv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/arv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/arv.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;media/v4l2-common.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='add'>+#include &lt;media/v4l2-fh.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='hunk'>@@ -403,7 +404,8 @@ static int ar_querycap(struct file *file, void  *priv,</div><div class='ctx'> 	strlcpy(vcap-&gt;driver, ar-&gt;vdev.name, sizeof(vcap-&gt;driver));</div><div class='ctx'> 	strlcpy(vcap-&gt;card, "Colour AR VGA", sizeof(vcap-&gt;card));</div><div class='ctx'> 	strlcpy(vcap-&gt;bus_info, "Platform", sizeof(vcap-&gt;bus_info));</div><div class='del'>-	vcap-&gt;capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE;</div><div class='add'>+	vcap-&gt;device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE;</div><div class='add'>+	vcap-&gt;capabilities = vcap-&gt;device_caps | V4L2_CAP_DEVICE_CAPS;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -709,6 +711,8 @@ static int ar_initialize(struct ar *ar)</div><div class='ctx'> </div><div class='ctx'> static const struct v4l2_file_operations ar_fops = {</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='add'>+	.open		= v4l2_fh_open,</div><div class='add'>+	.release	= v4l2_fh_release,</div><div class='ctx'> 	.read		= ar_read,</div><div class='ctx'> 	.unlocked_ioctl	= video_ioctl2,</div><div class='ctx'> };</div><div class='hunk'>@@ -769,6 +773,7 @@ static int __init ar_init(void)</div><div class='ctx'> 	ar-&gt;vdev.fops = &amp;ar_fops;</div><div class='ctx'> 	ar-&gt;vdev.ioctl_ops = &amp;ar_ioctl_ops;</div><div class='ctx'> 	ar-&gt;vdev.release = video_device_release_empty;</div><div class='add'>+	set_bit(V4L2_FL_USE_FH_PRIO, &amp;ar-&gt;vdev.flags);</div><div class='ctx'> 	video_set_drvdata(&amp;ar-&gt;vdev, ar);</div><div class='ctx'> </div><div class='ctx'> 	if (vga) {</div><div class='head'>diff --git a/drivers/media/video/as3645a.c b/drivers/media/video/as3645a.c<br/>index 7a3371f044fc..c4b03572dce8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/as3645a.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/as3645a.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/as3645a.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/as3645a.c</a></div><div class='hunk'>@@ -713,7 +713,7 @@ static int as3645a_resume(struct device *dev)</div><div class='ctx'>  * The number of LEDs reported in platform data is used to compute default</div><div class='ctx'>  * limits. Parameters passed through platform data can override those limits.</div><div class='ctx'>  */</div><div class='del'>-static int as3645a_init_controls(struct as3645a *flash)</div><div class='add'>+static int __devinit as3645a_init_controls(struct as3645a *flash)</div><div class='ctx'> {</div><div class='ctx'> 	const struct as3645a_platform_data *pdata = flash-&gt;pdata;</div><div class='ctx'> 	struct v4l2_ctrl *ctrl;</div><div class='hunk'>@@ -804,8 +804,8 @@ static int as3645a_init_controls(struct as3645a *flash)</div><div class='ctx'> 	return flash-&gt;ctrls.error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int as3645a_probe(struct i2c_client *client,</div><div class='del'>-			 const struct i2c_device_id *devid)</div><div class='add'>+static int __devinit as3645a_probe(struct i2c_client *client,</div><div class='add'>+				   const struct i2c_device_id *devid)</div><div class='ctx'> {</div><div class='ctx'> 	struct as3645a *flash;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -846,7 +846,7 @@ done:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __exit as3645a_remove(struct i2c_client *client)</div><div class='add'>+static int __devexit as3645a_remove(struct i2c_client *client)</div><div class='ctx'> {</div><div class='ctx'> 	struct v4l2_subdev *subdev = i2c_get_clientdata(client);</div><div class='ctx'> 	struct as3645a *flash = to_as3645a(subdev);</div><div class='hunk'>@@ -877,7 +877,7 @@ static struct i2c_driver as3645a_i2c_driver = {</div><div class='ctx'> 		.pm   = &amp;as3645a_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe	= as3645a_probe,</div><div class='del'>-	.remove	= __exit_p(as3645a_remove),</div><div class='add'>+	.remove	= __devexit_p(as3645a_remove),</div><div class='ctx'> 	.id_table = as3645a_id_table,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/atmel-isi.c b/drivers/media/video/atmel-isi.c<br/>index ec3f6a06f9c3..6274a91c25c7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/atmel-isi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/atmel-isi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/atmel-isi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/atmel-isi.c</a></div><div class='hunk'>@@ -260,7 +260,7 @@ static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,</div><div class='ctx'> 	struct soc_camera_host *ici = to_soc_camera_host(icd-&gt;parent);</div><div class='ctx'> 	struct atmel_isi *isi = ici-&gt;priv;</div><div class='ctx'> 	unsigned long size;</div><div class='del'>-	int ret, bytes_per_line;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Reset ISI */</div><div class='ctx'> 	ret = atmel_isi_wait_status(isi, WAIT_ISI_RESET);</div><div class='hunk'>@@ -271,13 +271,7 @@ static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,</div><div class='ctx'> 	/* Disable all interrupts */</div><div class='ctx'> 	isi_writel(isi, ISI_INTDIS, ~0UL);</div><div class='ctx'> </div><div class='del'>-	bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-						icd-&gt;current_fmt-&gt;host_fmt);</div><div class='del'>-</div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		return bytes_per_line;</div><div class='del'>-</div><div class='del'>-	size = bytes_per_line * icd-&gt;user_height;</div><div class='add'>+	size = icd-&gt;sizeimage;</div><div class='ctx'> </div><div class='ctx'> 	if (!*nbuffers || *nbuffers &gt; MAX_BUFFER_NUM)</div><div class='ctx'> 		*nbuffers = MAX_BUFFER_NUM;</div><div class='hunk'>@@ -316,13 +310,8 @@ static int buffer_prepare(struct vb2_buffer *vb)</div><div class='ctx'> 	struct atmel_isi *isi = ici-&gt;priv;</div><div class='ctx'> 	unsigned long size;</div><div class='ctx'> 	struct isi_dma_desc *desc;</div><div class='del'>-	int bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-						icd-&gt;current_fmt-&gt;host_fmt);</div><div class='del'>-</div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		return bytes_per_line;</div><div class='ctx'> </div><div class='del'>-	size = bytes_per_line * icd-&gt;user_height;</div><div class='add'>+	size = icd-&gt;sizeimage;</div><div class='ctx'> </div><div class='ctx'> 	if (vb2_plane_size(vb, 0) &lt; size) {</div><div class='ctx'> 		dev_err(icd-&gt;parent, "%s data will not fit into plane (%lu &lt; %lu)\n",</div><div class='hunk'>@@ -638,6 +627,7 @@ static const struct soc_mbus_pixelfmt isi_camera_formats[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/au0828/Kconfig b/drivers/media/video/au0828/Kconfig<br/>index 81ba9d9d1b52..23f7fd22f0eb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/au0828/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/au0828/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/au0828/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/au0828/Kconfig</a></div><div class='hunk'>@@ -6,7 +6,8 @@ config VIDEO_AU0828</div><div class='ctx'> 	select I2C_ALGOBIT</div><div class='ctx'> 	select VIDEO_TVEEPROM</div><div class='ctx'> 	select VIDEOBUF_VMALLOC</div><div class='del'>-	select DVB_AU8522 if !DVB_FE_CUSTOMISE</div><div class='add'>+	select DVB_AU8522_DTV if !DVB_FE_CUSTOMISE</div><div class='add'>+	select DVB_AU8522_V4L if !DVB_FE_CUSTOMISE</div><div class='ctx'> 	select MEDIA_TUNER_XC5000 if !MEDIA_TUNER_CUSTOMISE</div><div class='ctx'> 	select MEDIA_TUNER_MXL5007T if !MEDIA_TUNER_CUSTOMISE</div><div class='ctx'> 	select MEDIA_TUNER_TDA18271 if !MEDIA_TUNER_CUSTOMISE</div><div class='head'>diff --git a/drivers/media/video/au0828/au0828-cards.c b/drivers/media/video/au0828/au0828-cards.c<br/>index 1c6015a04f96..e3fe9a6637f6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/au0828/au0828-cards.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/au0828/au0828-cards.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/au0828/au0828-cards.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/au0828/au0828-cards.c</a></div><div class='hunk'>@@ -325,6 +325,8 @@ struct usb_device_id au0828_usb_id_table[] = {</div><div class='ctx'> 		.driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q_MXL },</div><div class='ctx'> 	{ USB_DEVICE(0x2040, 0x7281),</div><div class='ctx'> 		.driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q_MXL },</div><div class='add'>+	{ USB_DEVICE(0x05e1, 0x0480),</div><div class='add'>+		.driver_info = AU0828_BOARD_HAUPPAUGE_WOODBURY },</div><div class='ctx'> 	{ USB_DEVICE(0x2040, 0x8200),</div><div class='ctx'> 		.driver_info = AU0828_BOARD_HAUPPAUGE_WOODBURY },</div><div class='ctx'> 	{ USB_DEVICE(0x2040, 0x7260),</div><div class='head'>diff --git a/drivers/media/video/au0828/au0828-dvb.c b/drivers/media/video/au0828/au0828-dvb.c<br/>index 518216743c9c..39ece8e24985 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/au0828/au0828-dvb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/au0828/au0828-dvb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/au0828/au0828-dvb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/au0828/au0828-dvb.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-common.h&gt;</div><div class='add'>+#include &lt;media/tuner.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "au0828.h"</div><div class='ctx'> #include "au8522.h"</div><div class='hunk'>@@ -79,9 +80,16 @@ static struct au8522_config hauppauge_woodbury_config = {</div><div class='ctx'> 	.vsb_if        = AU8522_IF_3_25MHZ,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct xc5000_config hauppauge_hvr950q_tunerconfig = {</div><div class='add'>+static struct xc5000_config hauppauge_xc5000a_config = {</div><div class='ctx'> 	.i2c_address      = 0x61,</div><div class='ctx'> 	.if_khz           = 6000,</div><div class='add'>+	.chip_id          = XC5000A,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct xc5000_config hauppauge_xc5000c_config = {</div><div class='add'>+	.i2c_address      = 0x61,</div><div class='add'>+	.if_khz           = 6000,</div><div class='add'>+	.chip_id          = XC5000C,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct mxl5007t_config mxl5007t_hvr950q_config = {</div><div class='hunk'>@@ -383,8 +391,19 @@ int au0828_dvb_register(struct au0828_dev *dev)</div><div class='ctx'> 				&amp;hauppauge_hvr950q_config,</div><div class='ctx'> 				&amp;dev-&gt;i2c_adap);</div><div class='ctx'> 		if (dvb-&gt;frontend != NULL)</div><div class='del'>-			dvb_attach(xc5000_attach, dvb-&gt;frontend, &amp;dev-&gt;i2c_adap,</div><div class='del'>-				   &amp;hauppauge_hvr950q_tunerconfig);</div><div class='add'>+			switch (dev-&gt;board.tuner_type) {</div><div class='add'>+			default:</div><div class='add'>+			case TUNER_XC5000:</div><div class='add'>+				dvb_attach(xc5000_attach, dvb-&gt;frontend,</div><div class='add'>+					   &amp;dev-&gt;i2c_adap,</div><div class='add'>+					   &amp;hauppauge_xc5000a_config);</div><div class='add'>+				break;</div><div class='add'>+			case TUNER_XC5000C:</div><div class='add'>+				dvb_attach(xc5000_attach, dvb-&gt;frontend,</div><div class='add'>+					   &amp;dev-&gt;i2c_adap,</div><div class='add'>+					   &amp;hauppauge_xc5000c_config);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AU0828_BOARD_HAUPPAUGE_HVR950Q_MXL:</div><div class='ctx'> 		dvb-&gt;frontend = dvb_attach(au8522_attach,</div><div class='hunk'>@@ -411,7 +430,7 @@ int au0828_dvb_register(struct au0828_dev *dev)</div><div class='ctx'> 		if (dvb-&gt;frontend != NULL) {</div><div class='ctx'> 			dvb_attach(xc5000_attach, dvb-&gt;frontend,</div><div class='ctx'> 				&amp;dev-&gt;i2c_adap,</div><div class='del'>-				&amp;hauppauge_hvr950q_tunerconfig);</div><div class='add'>+				&amp;hauppauge_xc5000a_config);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='head'>diff --git a/drivers/media/video/au0828/au0828-video.c b/drivers/media/video/au0828/au0828-video.c<br/>index 0b3e481ffe8c..ac3dd733ab81 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/au0828/au0828-video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/au0828/au0828-video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/au0828/au0828-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/au0828/au0828-video.c</a></div><div class='hunk'>@@ -120,7 +120,7 @@ static void au0828_irq_callback(struct urb *urb)</div><div class='ctx'> 	struct au0828_dmaqueue  *dma_q = urb-&gt;context;</div><div class='ctx'> 	struct au0828_dev *dev = container_of(dma_q, struct au0828_dev, vidq);</div><div class='ctx'> 	unsigned long flags = 0;</div><div class='del'>-	int rc, i;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='ctx'> 	case 0:             /* success */</div><div class='hunk'>@@ -138,7 +138,7 @@ static void au0828_irq_callback(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	/* Copy data from URB */</div><div class='ctx'> 	spin_lock_irqsave(&amp;dev-&gt;slock, flags);</div><div class='del'>-	rc = dev-&gt;isoc_ctl.isoc_copy(dev, urb);</div><div class='add'>+	dev-&gt;isoc_ctl.isoc_copy(dev, urb);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev-&gt;slock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset urb buffers */</div><div class='hunk'>@@ -1881,7 +1881,7 @@ int au0828_analog_register(struct au0828_dev *dev,</div><div class='ctx'> 	int retval = -ENOMEM;</div><div class='ctx'> 	struct usb_host_interface *iface_desc;</div><div class='ctx'> 	struct usb_endpoint_descriptor *endpoint;</div><div class='del'>-	int i;</div><div class='add'>+	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	dprintk(1, "au0828_analog_register called!\n");</div><div class='ctx'> </div><div class='hunk'>@@ -1951,8 +1951,8 @@ int au0828_analog_register(struct au0828_dev *dev,</div><div class='ctx'> 	dev-&gt;vbi_dev = video_device_alloc();</div><div class='ctx'> 	if (NULL == dev-&gt;vbi_dev) {</div><div class='ctx'> 		dprintk(1, "Can't allocate vbi_device.\n");</div><div class='del'>-		kfree(dev-&gt;vdev);</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_vdev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Fill the video capture device struct */</div><div class='hunk'>@@ -1971,8 +1971,8 @@ int au0828_analog_register(struct au0828_dev *dev,</div><div class='ctx'> 	if (retval != 0) {</div><div class='ctx'> 		dprintk(1, "unable to register video device (error = %d).\n",</div><div class='ctx'> 			retval);</div><div class='del'>-		video_device_release(dev-&gt;vdev);</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err_vbi_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Register the vbi device */</div><div class='hunk'>@@ -1981,13 +1981,18 @@ int au0828_analog_register(struct au0828_dev *dev,</div><div class='ctx'> 	if (retval != 0) {</div><div class='ctx'> 		dprintk(1, "unable to register vbi device (error = %d).\n",</div><div class='ctx'> 			retval);</div><div class='del'>-		video_device_release(dev-&gt;vbi_dev);</div><div class='del'>-		video_device_release(dev-&gt;vdev);</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err_vbi_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dprintk(1, "%s completed!\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_vbi_dev:</div><div class='add'>+	video_device_release(dev-&gt;vbi_dev);</div><div class='add'>+err_vdev:</div><div class='add'>+	video_device_release(dev-&gt;vdev);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/blackfin/bfin_capture.c b/drivers/media/video/blackfin/bfin_capture.c<br/>index 514fcf742f5a..0aba45e34f70 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/blackfin/bfin_capture.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/blackfin/bfin_capture.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/blackfin/bfin_capture.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/blackfin/bfin_capture.c</a></div><div class='hunk'>@@ -942,6 +942,10 @@ static int __devinit bcap_probe(struct platform_device *pdev)</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;bcap_dev-&gt;dma_queue);</div><div class='ctx'> </div><div class='ctx'> 	vfd-&gt;lock = &amp;bcap_dev-&gt;mutex;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vfd-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	/* register video device */</div><div class='ctx'> 	ret = video_register_device(bcap_dev-&gt;video_dev, VFL_TYPE_GRABBER, -1);</div><div class='head'>diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c<br/>index e581b37be789..a9cfb0f4be48 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/bt8xx/bttv-driver.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/bt8xx/bttv-driver.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/bt8xx/bttv-driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/bt8xx/bttv-driver.c</a></div><div class='hunk'>@@ -663,7 +663,7 @@ static const struct v4l2_queryctrl bttv_ctls[] = {</div><div class='ctx'> 		.minimum       = 0,</div><div class='ctx'> 		.maximum       = 65535,</div><div class='ctx'> 		.step          = 128,</div><div class='del'>-		.default_value = 32768,</div><div class='add'>+		.default_value = 27648,</div><div class='ctx'> 		.type          = V4L2_CTRL_TYPE_INTEGER,</div><div class='ctx'> 	},{</div><div class='ctx'> 		.id            = V4L2_CID_SATURATION,</div><div class='hunk'>@@ -4394,7 +4394,7 @@ static int __devinit bttv_probe(struct pci_dev *dev,</div><div class='ctx'> 	if (!bttv_tvcards[btv-&gt;c.type].no_video) {</div><div class='ctx'> 		bttv_register_video(btv);</div><div class='ctx'> 		bt848_bright(btv,32768);</div><div class='del'>-		bt848_contrast(btv,32768);</div><div class='add'>+		bt848_contrast(btv, 27648);</div><div class='ctx'> 		bt848_hue(btv,32768);</div><div class='ctx'> 		bt848_sat(btv,32768);</div><div class='ctx'> 		audio_mute(btv, 1);</div><div class='head'>diff --git a/drivers/media/video/bw-qcam.c b/drivers/media/video/bw-qcam.c<br/>index f09df9dffaae..2520219f01ba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/bw-qcam.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/bw-qcam.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/bw-qcam.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/bw-qcam.c</a></div><div class='hunk'>@@ -77,6 +77,9 @@ OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'> #include &lt;media/v4l2-common.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='add'>+#include &lt;media/v4l2-fh.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* One from column A... */</div><div class='ctx'> #define QC_NOTSET 0</div><div class='hunk'>@@ -103,6 +106,7 @@ OTHER DEALINGS IN THE SOFTWARE.</div><div class='ctx'> struct qcam {</div><div class='ctx'> 	struct v4l2_device v4l2_dev;</div><div class='ctx'> 	struct video_device vdev;</div><div class='add'>+	struct v4l2_ctrl_handler hdl;</div><div class='ctx'> 	struct pardevice *pdev;</div><div class='ctx'> 	struct parport *pport;</div><div class='ctx'> 	struct mutex lock;</div><div class='hunk'>@@ -646,7 +650,8 @@ static int qcam_querycap(struct file *file, void  *priv,</div><div class='ctx'> 	strlcpy(vcap-&gt;driver, qcam-&gt;v4l2_dev.name, sizeof(vcap-&gt;driver));</div><div class='ctx'> 	strlcpy(vcap-&gt;card, "B&amp;W Quickcam", sizeof(vcap-&gt;card));</div><div class='ctx'> 	strlcpy(vcap-&gt;bus_info, "parport", sizeof(vcap-&gt;bus_info));</div><div class='del'>-	vcap-&gt;capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE;</div><div class='add'>+	vcap-&gt;device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE;</div><div class='add'>+	vcap-&gt;capabilities = vcap-&gt;device_caps | V4L2_CAP_DEVICE_CAPS;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -674,72 +679,6 @@ static int qcam_s_input(struct file *file, void *fh, unsigned int inp)</div><div class='ctx'> 	return (inp &gt; 0) ? -EINVAL : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int qcam_queryctrl(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_queryctrl *qc)</div><div class='del'>-{</div><div class='del'>-	switch (qc-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 255, 1, 180);</div><div class='del'>-	case V4L2_CID_CONTRAST:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 255, 1, 192);</div><div class='del'>-	case V4L2_CID_GAMMA:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 255, 1, 105);</div><div class='del'>-	}</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int qcam_g_ctrl(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_control *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct qcam *qcam = video_drvdata(file);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (ctrl-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		ctrl-&gt;value = qcam-&gt;brightness;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_CONTRAST:</div><div class='del'>-		ctrl-&gt;value = qcam-&gt;contrast;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_GAMMA:</div><div class='del'>-		ctrl-&gt;value = qcam-&gt;whitebal;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int qcam_s_ctrl(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_control *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct qcam *qcam = video_drvdata(file);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;qcam-&gt;lock);</div><div class='del'>-	switch (ctrl-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		qcam-&gt;brightness = ctrl-&gt;value;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_CONTRAST:</div><div class='del'>-		qcam-&gt;contrast = ctrl-&gt;value;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_GAMMA:</div><div class='del'>-		qcam-&gt;whitebal = ctrl-&gt;value;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		qc_setscanmode(qcam);</div><div class='del'>-		qcam-&gt;status |= QC_PARAM_CHANGE;</div><div class='del'>-	}</div><div class='del'>-	mutex_unlock(&amp;qcam-&gt;lock);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int qcam_g_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *fmt)</div><div class='ctx'> {</div><div class='ctx'> 	struct qcam *qcam = video_drvdata(file);</div><div class='hunk'>@@ -856,8 +795,40 @@ static ssize_t qcam_read(struct file *file, char __user *buf,</div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int qcam_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct qcam *qcam =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct qcam, hdl);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;qcam-&gt;lock);</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_BRIGHTNESS:</div><div class='add'>+		qcam-&gt;brightness = ctrl-&gt;val;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_CONTRAST:</div><div class='add'>+		qcam-&gt;contrast = ctrl-&gt;val;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_GAMMA:</div><div class='add'>+		qcam-&gt;whitebal = ctrl-&gt;val;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		qc_setscanmode(qcam);</div><div class='add'>+		qcam-&gt;status |= QC_PARAM_CHANGE;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;qcam-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct v4l2_file_operations qcam_fops = {</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='add'>+	.open		= v4l2_fh_open,</div><div class='add'>+	.release	= v4l2_fh_release,</div><div class='add'>+	.poll		= v4l2_ctrl_poll,</div><div class='ctx'> 	.unlocked_ioctl = video_ioctl2,</div><div class='ctx'> 	.read		= qcam_read,</div><div class='ctx'> };</div><div class='hunk'>@@ -867,13 +838,17 @@ static const struct v4l2_ioctl_ops qcam_ioctl_ops = {</div><div class='ctx'> 	.vidioc_g_input      		    = qcam_g_input,</div><div class='ctx'> 	.vidioc_s_input      		    = qcam_s_input,</div><div class='ctx'> 	.vidioc_enum_input   		    = qcam_enum_input,</div><div class='del'>-	.vidioc_queryctrl 		    = qcam_queryctrl,</div><div class='del'>-	.vidioc_g_ctrl  		    = qcam_g_ctrl,</div><div class='del'>-	.vidioc_s_ctrl 			    = qcam_s_ctrl,</div><div class='ctx'> 	.vidioc_enum_fmt_vid_cap 	    = qcam_enum_fmt_vid_cap,</div><div class='ctx'> 	.vidioc_g_fmt_vid_cap 		    = qcam_g_fmt_vid_cap,</div><div class='ctx'> 	.vidioc_s_fmt_vid_cap  		    = qcam_s_fmt_vid_cap,</div><div class='ctx'> 	.vidioc_try_fmt_vid_cap  	    = qcam_try_fmt_vid_cap,</div><div class='add'>+	.vidioc_log_status		    = v4l2_ctrl_log_status,</div><div class='add'>+	.vidioc_subscribe_event		    = v4l2_ctrl_subscribe_event,</div><div class='add'>+	.vidioc_unsubscribe_event	    = v4l2_event_unsubscribe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops qcam_ctrl_ops = {</div><div class='add'>+	.s_ctrl = qcam_s_ctrl,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Initialize the QuickCam driver control structure.  This is where</div><div class='hunk'>@@ -897,19 +872,35 @@ static struct qcam *qcam_init(struct parport *port)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	v4l2_ctrl_handler_init(&amp;qcam-&gt;hdl, 3);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;qcam-&gt;hdl, &amp;qcam_ctrl_ops,</div><div class='add'>+			  V4L2_CID_BRIGHTNESS, 0, 255, 1, 180);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;qcam-&gt;hdl, &amp;qcam_ctrl_ops,</div><div class='add'>+			  V4L2_CID_CONTRAST, 0, 255, 1, 192);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;qcam-&gt;hdl, &amp;qcam_ctrl_ops,</div><div class='add'>+			  V4L2_CID_GAMMA, 0, 255, 1, 105);</div><div class='add'>+	if (qcam-&gt;hdl.error) {</div><div class='add'>+		v4l2_err(v4l2_dev, "couldn't register controls\n");</div><div class='add'>+		v4l2_ctrl_handler_free(&amp;qcam-&gt;hdl);</div><div class='add'>+		kfree(qcam);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='ctx'> 	qcam-&gt;pport = port;</div><div class='ctx'> 	qcam-&gt;pdev = parport_register_device(port, "bw-qcam", NULL, NULL,</div><div class='ctx'> 			NULL, 0, NULL);</div><div class='ctx'> 	if (qcam-&gt;pdev == NULL) {</div><div class='ctx'> 		v4l2_err(v4l2_dev, "couldn't register for %s.\n", port-&gt;name);</div><div class='add'>+		v4l2_ctrl_handler_free(&amp;qcam-&gt;hdl);</div><div class='ctx'> 		kfree(qcam);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	strlcpy(qcam-&gt;vdev.name, "Connectix QuickCam", sizeof(qcam-&gt;vdev.name));</div><div class='ctx'> 	qcam-&gt;vdev.v4l2_dev = v4l2_dev;</div><div class='add'>+	qcam-&gt;vdev.ctrl_handler = &amp;qcam-&gt;hdl;</div><div class='ctx'> 	qcam-&gt;vdev.fops = &amp;qcam_fops;</div><div class='ctx'> 	qcam-&gt;vdev.ioctl_ops = &amp;qcam_ioctl_ops;</div><div class='add'>+	set_bit(V4L2_FL_USE_FH_PRIO, &amp;qcam-&gt;vdev.flags);</div><div class='ctx'> 	qcam-&gt;vdev.release = video_device_release_empty;</div><div class='ctx'> 	video_set_drvdata(&amp;qcam-&gt;vdev, qcam);</div><div class='ctx'> </div><div class='hunk'>@@ -1003,6 +994,7 @@ static int init_bwqcam(struct parport *port)</div><div class='ctx'> static void close_bwqcam(struct qcam *qcam)</div><div class='ctx'> {</div><div class='ctx'> 	video_unregister_device(&amp;qcam-&gt;vdev);</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;qcam-&gt;hdl);</div><div class='ctx'> 	parport_unregister_device(qcam-&gt;pdev);</div><div class='ctx'> 	kfree(qcam);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/media/video/c-qcam.c b/drivers/media/video/c-qcam.c<br/>index fda32f52554a..ec51e1f12e82 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/c-qcam.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/c-qcam.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/c-qcam.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/c-qcam.c</a></div><div class='hunk'>@@ -40,10 +40,14 @@</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-common.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='add'>+#include &lt;media/v4l2-fh.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct qcam {</div><div class='ctx'> 	struct v4l2_device v4l2_dev;</div><div class='ctx'> 	struct video_device vdev;</div><div class='add'>+	struct v4l2_ctrl_handler hdl;</div><div class='ctx'> 	struct pardevice *pdev;</div><div class='ctx'> 	struct parport *pport;</div><div class='ctx'> 	int width, height;</div><div class='hunk'>@@ -378,7 +382,7 @@ get_fragment:</div><div class='ctx'> static long qc_capture(struct qcam *qcam, char __user *buf, unsigned long len)</div><div class='ctx'> {</div><div class='ctx'> 	struct v4l2_device *v4l2_dev = &amp;qcam-&gt;v4l2_dev;</div><div class='del'>-	unsigned lines, pixelsperline, bitsperxfer;</div><div class='add'>+	unsigned lines, pixelsperline;</div><div class='ctx'> 	unsigned int is_bi_dir = qcam-&gt;bidirectional;</div><div class='ctx'> 	size_t wantlen, outptr = 0;</div><div class='ctx'> 	char tmpbuf[BUFSZ];</div><div class='hunk'>@@ -404,7 +408,6 @@ static long qc_capture(struct qcam *qcam, char __user *buf, unsigned long len)</div><div class='ctx'> </div><div class='ctx'> 	lines = qcam-&gt;height;</div><div class='ctx'> 	pixelsperline = qcam-&gt;width;</div><div class='del'>-	bitsperxfer = (is_bi_dir) ? 24 : 8;</div><div class='ctx'> </div><div class='ctx'> 	if (is_bi_dir) {</div><div class='ctx'> 		/* Turn the port around */</div><div class='hunk'>@@ -516,7 +519,8 @@ static int qcam_querycap(struct file *file, void  *priv,</div><div class='ctx'> 	strlcpy(vcap-&gt;driver, qcam-&gt;v4l2_dev.name, sizeof(vcap-&gt;driver));</div><div class='ctx'> 	strlcpy(vcap-&gt;card, "Color Quickcam", sizeof(vcap-&gt;card));</div><div class='ctx'> 	strlcpy(vcap-&gt;bus_info, "parport", sizeof(vcap-&gt;bus_info));</div><div class='del'>-	vcap-&gt;capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE;</div><div class='add'>+	vcap-&gt;device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE;</div><div class='add'>+	vcap-&gt;capabilities = vcap-&gt;device_caps | V4L2_CAP_DEVICE_CAPS;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -544,73 +548,6 @@ static int qcam_s_input(struct file *file, void *fh, unsigned int inp)</div><div class='ctx'> 	return (inp &gt; 0) ? -EINVAL : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int qcam_queryctrl(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_queryctrl *qc)</div><div class='del'>-{</div><div class='del'>-	switch (qc-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 255, 1, 240);</div><div class='del'>-	case V4L2_CID_CONTRAST:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 255, 1, 192);</div><div class='del'>-	case V4L2_CID_GAMMA:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 255, 1, 128);</div><div class='del'>-	}</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int qcam_g_ctrl(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_control *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct qcam *qcam = video_drvdata(file);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (ctrl-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		ctrl-&gt;value = qcam-&gt;brightness;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_CONTRAST:</div><div class='del'>-		ctrl-&gt;value = qcam-&gt;contrast;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_GAMMA:</div><div class='del'>-		ctrl-&gt;value = qcam-&gt;whitebal;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int qcam_s_ctrl(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_control *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct qcam *qcam = video_drvdata(file);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;qcam-&gt;lock);</div><div class='del'>-	switch (ctrl-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		qcam-&gt;brightness = ctrl-&gt;value;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_CONTRAST:</div><div class='del'>-		qcam-&gt;contrast = ctrl-&gt;value;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_GAMMA:</div><div class='del'>-		qcam-&gt;whitebal = ctrl-&gt;value;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		parport_claim_or_block(qcam-&gt;pdev);</div><div class='del'>-		qc_setup(qcam);</div><div class='del'>-		parport_release(qcam-&gt;pdev);</div><div class='del'>-	}</div><div class='del'>-	mutex_unlock(&amp;qcam-&gt;lock);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int qcam_g_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *fmt)</div><div class='ctx'> {</div><div class='ctx'> 	struct qcam *qcam = video_drvdata(file);</div><div class='hunk'>@@ -714,8 +651,41 @@ static ssize_t qcam_read(struct file *file, char __user *buf,</div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int qcam_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct qcam *qcam =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct qcam, hdl);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;qcam-&gt;lock);</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_BRIGHTNESS:</div><div class='add'>+		qcam-&gt;brightness = ctrl-&gt;val;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_CONTRAST:</div><div class='add'>+		qcam-&gt;contrast = ctrl-&gt;val;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_GAMMA:</div><div class='add'>+		qcam-&gt;whitebal = ctrl-&gt;val;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		parport_claim_or_block(qcam-&gt;pdev);</div><div class='add'>+		qc_setup(qcam);</div><div class='add'>+		parport_release(qcam-&gt;pdev);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;qcam-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct v4l2_file_operations qcam_fops = {</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='add'>+	.open		= v4l2_fh_open,</div><div class='add'>+	.release	= v4l2_fh_release,</div><div class='add'>+	.poll		= v4l2_ctrl_poll,</div><div class='ctx'> 	.unlocked_ioctl	= video_ioctl2,</div><div class='ctx'> 	.read		= qcam_read,</div><div class='ctx'> };</div><div class='hunk'>@@ -725,13 +695,17 @@ static const struct v4l2_ioctl_ops qcam_ioctl_ops = {</div><div class='ctx'> 	.vidioc_g_input      		    = qcam_g_input,</div><div class='ctx'> 	.vidioc_s_input      		    = qcam_s_input,</div><div class='ctx'> 	.vidioc_enum_input   		    = qcam_enum_input,</div><div class='del'>-	.vidioc_queryctrl 		    = qcam_queryctrl,</div><div class='del'>-	.vidioc_g_ctrl  		    = qcam_g_ctrl,</div><div class='del'>-	.vidioc_s_ctrl 			    = qcam_s_ctrl,</div><div class='del'>-	.vidioc_enum_fmt_vid_cap 	    = qcam_enum_fmt_vid_cap,</div><div class='add'>+	.vidioc_enum_fmt_vid_cap	    = qcam_enum_fmt_vid_cap,</div><div class='ctx'> 	.vidioc_g_fmt_vid_cap 		    = qcam_g_fmt_vid_cap,</div><div class='ctx'> 	.vidioc_s_fmt_vid_cap  		    = qcam_s_fmt_vid_cap,</div><div class='ctx'> 	.vidioc_try_fmt_vid_cap  	    = qcam_try_fmt_vid_cap,</div><div class='add'>+	.vidioc_log_status		    = v4l2_ctrl_log_status,</div><div class='add'>+	.vidioc_subscribe_event		    = v4l2_ctrl_subscribe_event,</div><div class='add'>+	.vidioc_unsubscribe_event	    = v4l2_event_unsubscribe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops qcam_ctrl_ops = {</div><div class='add'>+	.s_ctrl = qcam_s_ctrl,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Initialize the QuickCam driver control structure. */</div><div class='hunk'>@@ -754,6 +728,20 @@ static struct qcam *qcam_init(struct parport *port)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	v4l2_ctrl_handler_init(&amp;qcam-&gt;hdl, 3);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;qcam-&gt;hdl, &amp;qcam_ctrl_ops,</div><div class='add'>+			  V4L2_CID_BRIGHTNESS, 0, 255, 1, 240);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;qcam-&gt;hdl, &amp;qcam_ctrl_ops,</div><div class='add'>+			  V4L2_CID_CONTRAST, 0, 255, 1, 192);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;qcam-&gt;hdl, &amp;qcam_ctrl_ops,</div><div class='add'>+			  V4L2_CID_GAMMA, 0, 255, 1, 128);</div><div class='add'>+	if (qcam-&gt;hdl.error) {</div><div class='add'>+		v4l2_err(v4l2_dev, "couldn't register controls\n");</div><div class='add'>+		v4l2_ctrl_handler_free(&amp;qcam-&gt;hdl);</div><div class='add'>+		kfree(qcam);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	qcam-&gt;pport = port;</div><div class='ctx'> 	qcam-&gt;pdev = parport_register_device(port, "c-qcam", NULL, NULL,</div><div class='ctx'> 					  NULL, 0, NULL);</div><div class='hunk'>@@ -762,6 +750,7 @@ static struct qcam *qcam_init(struct parport *port)</div><div class='ctx'> </div><div class='ctx'> 	if (qcam-&gt;pdev == NULL) {</div><div class='ctx'> 		v4l2_err(v4l2_dev, "couldn't register for %s.\n", port-&gt;name);</div><div class='add'>+		v4l2_ctrl_handler_free(&amp;qcam-&gt;hdl);</div><div class='ctx'> 		kfree(qcam);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -771,6 +760,8 @@ static struct qcam *qcam_init(struct parport *port)</div><div class='ctx'> 	qcam-&gt;vdev.fops = &amp;qcam_fops;</div><div class='ctx'> 	qcam-&gt;vdev.ioctl_ops = &amp;qcam_ioctl_ops;</div><div class='ctx'> 	qcam-&gt;vdev.release = video_device_release_empty;</div><div class='add'>+	qcam-&gt;vdev.ctrl_handler = &amp;qcam-&gt;hdl;</div><div class='add'>+	set_bit(V4L2_FL_USE_FH_PRIO, &amp;qcam-&gt;vdev.flags);</div><div class='ctx'> 	video_set_drvdata(&amp;qcam-&gt;vdev, qcam);</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;qcam-&gt;lock);</div><div class='hunk'>@@ -845,6 +836,7 @@ static int init_cqcam(struct parport *port)</div><div class='ctx'> static void close_cqcam(struct qcam *qcam)</div><div class='ctx'> {</div><div class='ctx'> 	video_unregister_device(&amp;qcam-&gt;vdev);</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;qcam-&gt;hdl);</div><div class='ctx'> 	parport_unregister_device(qcam-&gt;pdev);</div><div class='ctx'> 	kfree(qcam);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/media/video/cpia2/cpia2.h b/drivers/media/video/cpia2/cpia2.h<br/>index ab252188981b..cdef677d57ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cpia2/cpia2.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cpia2/cpia2.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cpia2/cpia2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cpia2/cpia2.h</a></div><div class='hunk'>@@ -32,11 +32,12 @@</div><div class='ctx'> #define __CPIA2_H__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='del'>-#include &lt;media/v4l2-common.h&gt;</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='ctx'> #include &lt;linux/poll.h&gt;</div><div class='add'>+#include &lt;media/v4l2-common.h&gt;</div><div class='add'>+#include &lt;media/v4l2-device.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "cpia2dev.h"</div><div class='ctx'> #include "cpia2_registers.h"</div><div class='ctx'> </div><div class='ctx'> /* define for verbose debug output */</div><div class='hunk'>@@ -65,7 +66,6 @@</div><div class='ctx'> </div><div class='ctx'> /* Flicker Modes */</div><div class='ctx'> #define NEVER_FLICKER   0</div><div class='del'>-#define ANTI_FLICKER_ON 1</div><div class='ctx'> #define FLICKER_60      60</div><div class='ctx'> #define FLICKER_50      50</div><div class='ctx'> </div><div class='hunk'>@@ -148,7 +148,6 @@ enum {</div><div class='ctx'> #define DEFAULT_BRIGHTNESS 0x46</div><div class='ctx'> #define DEFAULT_CONTRAST 0x93</div><div class='ctx'> #define DEFAULT_SATURATION 0x7f</div><div class='del'>-#define DEFAULT_TARGET_KB 0x30</div><div class='ctx'> </div><div class='ctx'> /* Power state */</div><div class='ctx'> #define HI_POWER_MODE CPIA2_SYSTEM_CONTROL_HIGH_POWER</div><div class='hunk'>@@ -287,7 +286,6 @@ struct camera_params {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		u8 cam_register;</div><div class='ctx'> 		u8 flicker_mode_req;	/* 1 if flicker on, else never flicker */</div><div class='del'>-		int mains_frequency;</div><div class='ctx'> 	} flicker_control;</div><div class='ctx'> </div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -337,7 +335,7 @@ struct camera_params {</div><div class='ctx'> 		u8 vc_control;</div><div class='ctx'> 		u8 vc_mp_direction;</div><div class='ctx'> 		u8 vc_mp_data;</div><div class='del'>-		u8 target_kb;</div><div class='add'>+		u8 quality;</div><div class='ctx'> 	} vc_params;</div><div class='ctx'> </div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -366,23 +364,23 @@ struct framebuf {</div><div class='ctx'> 	struct framebuf *next;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct cpia2_fh {</div><div class='del'>-	enum v4l2_priority prio;</div><div class='del'>-	u8 mmapped;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct camera_data {</div><div class='ctx'> 	/* locks */</div><div class='add'>+	struct v4l2_device v4l2_dev;</div><div class='ctx'> 	struct mutex v4l2_lock;	/* serialize file operations */</div><div class='del'>-	struct v4l2_prio_state prio;</div><div class='add'>+	struct v4l2_ctrl_handler hdl;</div><div class='add'>+	struct {</div><div class='add'>+		/* Lights control cluster */</div><div class='add'>+		struct v4l2_ctrl *top_light;</div><div class='add'>+		struct v4l2_ctrl *bottom_light;</div><div class='add'>+	};</div><div class='add'>+	struct v4l2_ctrl *usb_alt;</div><div class='ctx'> </div><div class='ctx'> 	/* camera status */</div><div class='del'>-	volatile int present;	/* Is the camera still present? */</div><div class='del'>-	int open_count;		/* # of process that have camera open */</div><div class='ctx'> 	int first_image_seen;</div><div class='del'>-	u8 mains_freq;		/* for flicker control */</div><div class='ctx'> 	enum sensors sensor_type;</div><div class='ctx'> 	u8 flush;</div><div class='add'>+	struct v4l2_fh *stream_fh;</div><div class='ctx'> 	u8 mmapped;</div><div class='ctx'> 	int streaming;		/* 0 = no, 1 = yes */</div><div class='ctx'> 	int xfer_mode;		/* XFER_BULK or XFER_ISOC */</div><div class='hunk'>@@ -390,7 +388,7 @@ struct camera_data {</div><div class='ctx'> </div><div class='ctx'> 	/* v4l */</div><div class='ctx'> 	int video_size;			/* VIDEO_SIZE_ */</div><div class='del'>-	struct video_device *vdev;	/* v4l videodev */</div><div class='add'>+	struct video_device vdev;	/* v4l videodev */</div><div class='ctx'> 	u32 width;</div><div class='ctx'> 	u32 height;			/* Its size */</div><div class='ctx'> 	__u32 pixelformat;       /* Format fourcc      */</div><div class='hunk'>@@ -425,6 +423,7 @@ struct camera_data {</div><div class='ctx'> /* v4l */</div><div class='ctx'> int cpia2_register_camera(struct camera_data *cam);</div><div class='ctx'> void cpia2_unregister_camera(struct camera_data *cam);</div><div class='add'>+void cpia2_camera_release(struct v4l2_device *v4l2_dev);</div><div class='ctx'> </div><div class='ctx'> /* core */</div><div class='ctx'> int cpia2_reset_camera(struct camera_data *cam);</div><div class='hunk'>@@ -443,7 +442,7 @@ int cpia2_send_command(struct camera_data *cam, struct cpia2_command *cmd);</div><div class='ctx'> int cpia2_do_command(struct camera_data *cam,</div><div class='ctx'> 		     unsigned int command,</div><div class='ctx'> 		     unsigned char direction, unsigned char param);</div><div class='del'>-struct camera_data *cpia2_init_camera_struct(void);</div><div class='add'>+struct camera_data *cpia2_init_camera_struct(struct usb_interface *intf);</div><div class='ctx'> int cpia2_init_camera(struct camera_data *cam);</div><div class='ctx'> int cpia2_allocate_buffers(struct camera_data *cam);</div><div class='ctx'> void cpia2_free_buffers(struct camera_data *cam);</div><div class='hunk'>@@ -454,7 +453,6 @@ unsigned int cpia2_poll(struct camera_data *cam,</div><div class='ctx'> int cpia2_remap_buffer(struct camera_data *cam, struct vm_area_struct *vma);</div><div class='ctx'> void cpia2_set_property_flip(struct camera_data *cam, int prop_val);</div><div class='ctx'> void cpia2_set_property_mirror(struct camera_data *cam, int prop_val);</div><div class='del'>-int cpia2_set_target_kb(struct camera_data *cam, unsigned char value);</div><div class='ctx'> int cpia2_set_gpio(struct camera_data *cam, unsigned char setting);</div><div class='ctx'> int cpia2_set_fps(struct camera_data *cam, int framerate);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/cpia2/cpia2_core.c b/drivers/media/video/cpia2/cpia2_core.c<br/>index ee91e295c90a..17188e234770 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cpia2/cpia2_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cpia2/cpia2_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cpia2/cpia2_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cpia2/cpia2_core.c</a></div><div class='hunk'>@@ -66,7 +66,6 @@ static int config_sensor_410(struct camera_data *cam,</div><div class='ctx'> static int config_sensor_500(struct camera_data *cam,</div><div class='ctx'> 			    int reqwidth, int reqheight);</div><div class='ctx'> static int set_all_properties(struct camera_data *cam);</div><div class='del'>-static void get_color_params(struct camera_data *cam);</div><div class='ctx'> static void wake_system(struct camera_data *cam);</div><div class='ctx'> static void set_lowlight_boost(struct camera_data *cam);</div><div class='ctx'> static void reset_camera_struct(struct camera_data *cam);</div><div class='hunk'>@@ -453,15 +452,6 @@ int cpia2_do_command(struct camera_data *cam,</div><div class='ctx'> 		cam-&gt;params.version.vp_device_hi = cmd.buffer.block_data[0];</div><div class='ctx'> 		cam-&gt;params.version.vp_device_lo = cmd.buffer.block_data[1];</div><div class='ctx'> 		break;</div><div class='del'>-	case CPIA2_CMD_GET_VP_BRIGHTNESS:</div><div class='del'>-		cam-&gt;params.color_params.brightness = cmd.buffer.block_data[0];</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CMD_GET_CONTRAST:</div><div class='del'>-		cam-&gt;params.color_params.contrast = cmd.buffer.block_data[0];</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CMD_GET_VP_SATURATION:</div><div class='del'>-		cam-&gt;params.color_params.saturation = cmd.buffer.block_data[0];</div><div class='del'>-		break;</div><div class='ctx'> 	case CPIA2_CMD_GET_VP_GPIO_DATA:</div><div class='ctx'> 		cam-&gt;params.vp_params.gpio_data = cmd.buffer.block_data[0];</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -617,6 +607,7 @@ int cpia2_reset_camera(struct camera_data *cam)</div><div class='ctx'> {</div><div class='ctx'> 	u8 tmp_reg;</div><div class='ctx'> 	int retval = 0;</div><div class='add'>+	int target_kb;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct cpia2_command cmd;</div><div class='ctx'> </div><div class='hunk'>@@ -800,9 +791,16 @@ int cpia2_reset_camera(struct camera_data *cam)</div><div class='ctx'> 	}</div><div class='ctx'> 	cpia2_do_command(cam, CPIA2_CMD_SET_VC_CONTROL, TRANSFER_WRITE,tmp_reg);</div><div class='ctx'> </div><div class='del'>-	/* Set target size (kb) on vc */</div><div class='add'>+	/* Set target size (kb) on vc</div><div class='add'>+	   This is a heuristic based on the quality parameter and the raw</div><div class='add'>+	   framesize in kB divided by 16 (the compression factor when the</div><div class='add'>+	   quality is 100%) */</div><div class='add'>+	target_kb = (cam-&gt;width * cam-&gt;height * 2 / 16384) *</div><div class='add'>+				cam-&gt;params.vc_params.quality / 100;</div><div class='add'>+	if (target_kb &lt; 1)</div><div class='add'>+		target_kb = 1;</div><div class='ctx'> 	cpia2_do_command(cam, CPIA2_CMD_SET_TARGET_KB,</div><div class='del'>-			 TRANSFER_WRITE, cam-&gt;params.vc_params.target_kb);</div><div class='add'>+			 TRANSFER_WRITE, target_kb);</div><div class='ctx'> </div><div class='ctx'> 	/* Wiggle VC Reset */</div><div class='ctx'> 	/***</div><div class='hunk'>@@ -1538,23 +1536,17 @@ static int set_all_properties(struct camera_data *cam)</div><div class='ctx'> 	 * framerate and user_mode were already set (set_default_user_mode).</div><div class='ctx'> 	 **/</div><div class='ctx'> </div><div class='del'>-	cpia2_set_color_params(cam);</div><div class='del'>-</div><div class='ctx'> 	cpia2_usb_change_streaming_alternate(cam,</div><div class='ctx'> 					  cam-&gt;params.camera_state.stream_mode);</div><div class='ctx'> </div><div class='del'>-	cpia2_do_command(cam, CPIA2_CMD_SET_USER_EFFECTS, TRANSFER_WRITE,</div><div class='del'>-			 cam-&gt;params.vp_params.user_effects);</div><div class='del'>-</div><div class='del'>-	cpia2_set_flicker_mode(cam,</div><div class='del'>-			       cam-&gt;params.flicker_control.flicker_mode_req);</div><div class='del'>-</div><div class='ctx'> 	cpia2_do_command(cam,</div><div class='ctx'> 			 CPIA2_CMD_SET_VC_MP_GPIO_DIRECTION,</div><div class='ctx'> 			 TRANSFER_WRITE, cam-&gt;params.vp_params.gpio_direction);</div><div class='ctx'> 	cpia2_do_command(cam, CPIA2_CMD_SET_VC_MP_GPIO_DATA, TRANSFER_WRITE,</div><div class='ctx'> 			 cam-&gt;params.vp_params.gpio_data);</div><div class='ctx'> </div><div class='add'>+	v4l2_ctrl_handler_setup(&amp;cam-&gt;hdl);</div><div class='add'>+</div><div class='ctx'> 	wake_system(cam);</div><div class='ctx'> </div><div class='ctx'> 	set_lowlight_boost(cam);</div><div class='hunk'>@@ -1569,7 +1561,6 @@ static int set_all_properties(struct camera_data *cam)</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> void cpia2_save_camera_state(struct camera_data *cam)</div><div class='ctx'> {</div><div class='del'>-	get_color_params(cam);</div><div class='ctx'> 	cpia2_do_command(cam, CPIA2_CMD_GET_USER_EFFECTS, TRANSFER_READ, 0);</div><div class='ctx'> 	cpia2_do_command(cam, CPIA2_CMD_GET_VC_MP_GPIO_DIRECTION, TRANSFER_READ,</div><div class='ctx'> 			 0);</div><div class='hunk'>@@ -1577,30 +1568,6 @@ void cpia2_save_camera_state(struct camera_data *cam)</div><div class='ctx'> 	/* Don't get framerate or target_kb. Trust the values we already have */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/******************************************************************************</div><div class='del'>- *</div><div class='del'>- *  get_color_params</div><div class='del'>- *</div><div class='del'>- *****************************************************************************/</div><div class='del'>-static void get_color_params(struct camera_data *cam)</div><div class='del'>-{</div><div class='del'>-	cpia2_do_command(cam, CPIA2_CMD_GET_VP_BRIGHTNESS, TRANSFER_READ, 0);</div><div class='del'>-	cpia2_do_command(cam, CPIA2_CMD_GET_VP_SATURATION, TRANSFER_READ, 0);</div><div class='del'>-	cpia2_do_command(cam, CPIA2_CMD_GET_CONTRAST, TRANSFER_READ, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- *</div><div class='del'>- *  cpia2_set_color_params</div><div class='del'>- *</div><div class='del'>- *****************************************************************************/</div><div class='del'>-void cpia2_set_color_params(struct camera_data *cam)</div><div class='del'>-{</div><div class='del'>-	DBG("Setting color params\n");</div><div class='del'>-	cpia2_set_brightness(cam, cam-&gt;params.color_params.brightness);</div><div class='del'>-	cpia2_set_contrast(cam, cam-&gt;params.color_params.contrast);</div><div class='del'>-	cpia2_set_saturation(cam, cam-&gt;params.color_params.saturation);</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='ctx'>  *</div><div class='hunk'>@@ -1664,15 +1631,9 @@ int cpia2_set_flicker_mode(struct camera_data *cam, int mode)</div><div class='ctx'> </div><div class='ctx'> 	switch(mode) {</div><div class='ctx'> 	case NEVER_FLICKER:</div><div class='del'>-		cam-&gt;params.flicker_control.flicker_mode_req = mode;</div><div class='del'>-		break;</div><div class='ctx'> 	case FLICKER_60:</div><div class='del'>-		cam-&gt;params.flicker_control.flicker_mode_req = mode;</div><div class='del'>-		cam-&gt;params.flicker_control.mains_frequency = 60;</div><div class='del'>-		break;</div><div class='ctx'> 	case FLICKER_50:</div><div class='ctx'> 		cam-&gt;params.flicker_control.flicker_mode_req = mode;</div><div class='del'>-		cam-&gt;params.flicker_control.mains_frequency = 50;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -EINVAL;</div><div class='hunk'>@@ -1701,6 +1662,7 @@ void cpia2_set_property_flip(struct camera_data *cam, int prop_val)</div><div class='ctx'> 	{</div><div class='ctx'> 		cam_reg &amp;= ~CPIA2_VP_USER_EFFECTS_FLIP;</div><div class='ctx'> 	}</div><div class='add'>+	cam-&gt;params.vp_params.user_effects = cam_reg;</div><div class='ctx'> 	cpia2_do_command(cam, CPIA2_CMD_SET_USER_EFFECTS, TRANSFER_WRITE,</div><div class='ctx'> 			 cam_reg);</div><div class='ctx'> }</div><div class='hunk'>@@ -1725,37 +1687,13 @@ void cpia2_set_property_mirror(struct camera_data *cam, int prop_val)</div><div class='ctx'> 	{</div><div class='ctx'> 		cam_reg &amp;= ~CPIA2_VP_USER_EFFECTS_MIRROR;</div><div class='ctx'> 	}</div><div class='add'>+	cam-&gt;params.vp_params.user_effects = cam_reg;</div><div class='ctx'> 	cpia2_do_command(cam, CPIA2_CMD_SET_USER_EFFECTS, TRANSFER_WRITE,</div><div class='ctx'> 			 cam_reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='ctx'>  *</div><div class='del'>- *  set_target_kb</div><div class='del'>- *</div><div class='del'>- *  The new Target KB is set in cam-&gt;params.vc_params.target_kb and</div><div class='del'>- *  activates on reset.</div><div class='del'>- *****************************************************************************/</div><div class='del'>-</div><div class='del'>-int cpia2_set_target_kb(struct camera_data *cam, unsigned char value)</div><div class='del'>-{</div><div class='del'>-	DBG("Requested target_kb = %d\n", value);</div><div class='del'>-	if (value != cam-&gt;params.vc_params.target_kb) {</div><div class='del'>-</div><div class='del'>-		cpia2_usb_stream_pause(cam);</div><div class='del'>-</div><div class='del'>-		/* reset camera for new target_kb */</div><div class='del'>-		cam-&gt;params.vc_params.target_kb = value;</div><div class='del'>-		cpia2_reset_camera(cam);</div><div class='del'>-</div><div class='del'>-		cpia2_usb_stream_resume(cam);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- *</div><div class='ctx'>  *  cpia2_set_gpio</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='hunk'>@@ -1843,7 +1781,7 @@ void cpia2_set_brightness(struct camera_data *cam, unsigned char value)</div><div class='ctx'> 	if (cam-&gt;params.pnp_id.device_type == DEVICE_STV_672 &amp;&amp; value == 0)</div><div class='ctx'> 		value++;</div><div class='ctx'> 	DBG("Setting brightness to %d (0x%0x)\n", value, value);</div><div class='del'>-	cpia2_do_command(cam,CPIA2_CMD_SET_VP_BRIGHTNESS, TRANSFER_WRITE,value);</div><div class='add'>+	cpia2_do_command(cam, CPIA2_CMD_SET_VP_BRIGHTNESS, TRANSFER_WRITE, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='hunk'>@@ -1854,7 +1792,6 @@ void cpia2_set_brightness(struct camera_data *cam, unsigned char value)</div><div class='ctx'> void cpia2_set_contrast(struct camera_data *cam, unsigned char value)</div><div class='ctx'> {</div><div class='ctx'> 	DBG("Setting contrast to %d (0x%0x)\n", value, value);</div><div class='del'>-	cam-&gt;params.color_params.contrast = value;</div><div class='ctx'> 	cpia2_do_command(cam, CPIA2_CMD_SET_CONTRAST, TRANSFER_WRITE, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1866,7 +1803,6 @@ void cpia2_set_contrast(struct camera_data *cam, unsigned char value)</div><div class='ctx'> void cpia2_set_saturation(struct camera_data *cam, unsigned char value)</div><div class='ctx'> {</div><div class='ctx'> 	DBG("Setting saturation to %d (0x%0x)\n", value, value);</div><div class='del'>-	cam-&gt;params.color_params.saturation = value;</div><div class='ctx'> 	cpia2_do_command(cam,CPIA2_CMD_SET_VP_SATURATION, TRANSFER_WRITE,value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2168,14 +2104,10 @@ static void reset_camera_struct(struct camera_data *cam)</div><div class='ctx'> 	/***</div><div class='ctx'> 	 * The following parameter values are the defaults from the register map.</div><div class='ctx'> 	 ***/</div><div class='del'>-	cam-&gt;params.color_params.brightness = DEFAULT_BRIGHTNESS;</div><div class='del'>-	cam-&gt;params.color_params.contrast = DEFAULT_CONTRAST;</div><div class='del'>-	cam-&gt;params.color_params.saturation = DEFAULT_SATURATION;</div><div class='ctx'> 	cam-&gt;params.vp_params.lowlight_boost = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* FlickerModes */</div><div class='ctx'> 	cam-&gt;params.flicker_control.flicker_mode_req = NEVER_FLICKER;</div><div class='del'>-	cam-&gt;params.flicker_control.mains_frequency = 60;</div><div class='ctx'> </div><div class='ctx'> 	/* jpeg params */</div><div class='ctx'> 	cam-&gt;params.compression.jpeg_options = CPIA2_VC_VC_JPEG_OPT_DEFAULT;</div><div class='hunk'>@@ -2188,7 +2120,7 @@ static void reset_camera_struct(struct camera_data *cam)</div><div class='ctx'> 	cam-&gt;params.vp_params.gpio_data = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Target kb params */</div><div class='del'>-	cam-&gt;params.vc_params.target_kb = DEFAULT_TARGET_KB;</div><div class='add'>+	cam-&gt;params.vc_params.quality = 100;</div><div class='ctx'> </div><div class='ctx'> 	/***</div><div class='ctx'> 	 * Set Sensor FPS as fast as possible.</div><div class='hunk'>@@ -2228,7 +2160,7 @@ static void reset_camera_struct(struct camera_data *cam)</div><div class='ctx'>  *</div><div class='ctx'>  *  Initializes camera struct, does not call reset to fill in defaults.</div><div class='ctx'>  *****************************************************************************/</div><div class='del'>-struct camera_data *cpia2_init_camera_struct(void)</div><div class='add'>+struct camera_data *cpia2_init_camera_struct(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct camera_data *cam;</div><div class='ctx'> </div><div class='hunk'>@@ -2239,8 +2171,13 @@ struct camera_data *cpia2_init_camera_struct(void)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	cam-&gt;v4l2_dev.release = cpia2_camera_release;</div><div class='add'>+	if (v4l2_device_register(&amp;intf-&gt;dev, &amp;cam-&gt;v4l2_dev) &lt; 0) {</div><div class='add'>+		v4l2_err(&amp;cam-&gt;v4l2_dev, "couldn't register v4l2_device\n");</div><div class='add'>+		kfree(cam);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	cam-&gt;present = 1;</div><div class='ctx'> 	mutex_init(&amp;cam-&gt;v4l2_lock);</div><div class='ctx'> 	init_waitqueue_head(&amp;cam-&gt;wq_stream);</div><div class='ctx'> </div><div class='hunk'>@@ -2373,11 +2310,6 @@ long cpia2_read(struct camera_data *cam,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!cam-&gt;present) {</div><div class='del'>-		LOG("%s: camera removed\n",__func__);</div><div class='del'>-		return 0;	/* EOF */</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (!cam-&gt;streaming) {</div><div class='ctx'> 		/* Start streaming */</div><div class='ctx'> 		cpia2_usb_stream_start(cam,</div><div class='hunk'>@@ -2393,12 +2325,12 @@ long cpia2_read(struct camera_data *cam,</div><div class='ctx'> 	if (frame-&gt;status != FRAME_READY) {</div><div class='ctx'> 		mutex_unlock(&amp;cam-&gt;v4l2_lock);</div><div class='ctx'> 		wait_event_interruptible(cam-&gt;wq_stream,</div><div class='del'>-			       !cam-&gt;present ||</div><div class='add'>+			       !video_is_registered(&amp;cam-&gt;vdev) ||</div><div class='ctx'> 			       (frame = cam-&gt;curbuff)-&gt;status == FRAME_READY);</div><div class='ctx'> 		mutex_lock(&amp;cam-&gt;v4l2_lock);</div><div class='ctx'> 		if (signal_pending(current))</div><div class='ctx'> 			return -ERESTARTSYS;</div><div class='del'>-		if (!cam-&gt;present)</div><div class='add'>+		if (!video_is_registered(&amp;cam-&gt;vdev))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2423,17 +2355,10 @@ long cpia2_read(struct camera_data *cam,</div><div class='ctx'> unsigned int cpia2_poll(struct camera_data *cam, struct file *filp,</div><div class='ctx'> 			poll_table *wait)</div><div class='ctx'> {</div><div class='del'>-	unsigned int status=0;</div><div class='add'>+	unsigned int status = v4l2_ctrl_poll(filp, wait);</div><div class='ctx'> </div><div class='del'>-	if (!cam) {</div><div class='del'>-		ERR("%s: Internal error, camera_data not found!\n",__func__);</div><div class='del'>-		return POLLERR;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!cam-&gt;present)</div><div class='del'>-		return POLLHUP;</div><div class='del'>-</div><div class='del'>-	if(!cam-&gt;streaming) {</div><div class='add'>+	if ((poll_requested_events(wait) &amp; (POLLIN | POLLRDNORM)) &amp;&amp;</div><div class='add'>+			!cam-&gt;streaming) {</div><div class='ctx'> 		/* Start streaming */</div><div class='ctx'> 		cpia2_usb_stream_start(cam,</div><div class='ctx'> 				       cam-&gt;params.camera_state.stream_mode);</div><div class='hunk'>@@ -2441,10 +2366,8 @@ unsigned int cpia2_poll(struct camera_data *cam, struct file *filp,</div><div class='ctx'> </div><div class='ctx'> 	poll_wait(filp, &amp;cam-&gt;wq_stream, wait);</div><div class='ctx'> </div><div class='del'>-	if(!cam-&gt;present)</div><div class='del'>-		status = POLLHUP;</div><div class='del'>-	else if(cam-&gt;curbuff-&gt;status == FRAME_READY)</div><div class='del'>-		status = POLLIN | POLLRDNORM;</div><div class='add'>+	if (cam-&gt;curbuff-&gt;status == FRAME_READY)</div><div class='add'>+		status |= POLLIN | POLLRDNORM;</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='hunk'>@@ -2462,12 +2385,9 @@ int cpia2_remap_buffer(struct camera_data *cam, struct vm_area_struct *vma)</div><div class='ctx'> 	unsigned long start = (unsigned long) adr;</div><div class='ctx'> 	unsigned long page, pos;</div><div class='ctx'> </div><div class='del'>-	if (!cam)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	DBG("mmap offset:%ld size:%ld\n", start_offset, size);</div><div class='ctx'> </div><div class='del'>-	if (!cam-&gt;present)</div><div class='add'>+	if (!video_is_registered(&amp;cam-&gt;vdev))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (size &gt; cam-&gt;frame_size*cam-&gt;num_frames  ||</div><div class='head'>diff --git a/drivers/media/video/cpia2/cpia2_usb.c b/drivers/media/video/cpia2/cpia2_usb.c<br/>index 59c797c15277..95b5d6e7cdc4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cpia2/cpia2_usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cpia2/cpia2_usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cpia2/cpia2_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cpia2/cpia2_usb.c</a></div><div class='hunk'>@@ -54,6 +54,8 @@ static void cpia2_usb_complete(struct urb *urb);</div><div class='ctx'> static int cpia2_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 			   const struct usb_device_id *id);</div><div class='ctx'> static void cpia2_usb_disconnect(struct usb_interface *intf);</div><div class='add'>+static int cpia2_usb_suspend(struct usb_interface *intf, pm_message_t message);</div><div class='add'>+static int cpia2_usb_resume(struct usb_interface *intf);</div><div class='ctx'> </div><div class='ctx'> static void free_sbufs(struct camera_data *cam);</div><div class='ctx'> static void add_APPn(struct camera_data *cam);</div><div class='hunk'>@@ -74,6 +76,9 @@ static struct usb_driver cpia2_driver = {</div><div class='ctx'> 	.name		= "cpia2",</div><div class='ctx'> 	.probe		= cpia2_usb_probe,</div><div class='ctx'> 	.disconnect	= cpia2_usb_disconnect,</div><div class='add'>+	.suspend	= cpia2_usb_suspend,</div><div class='add'>+	.resume		= cpia2_usb_resume,</div><div class='add'>+	.reset_resume	= cpia2_usb_resume,</div><div class='ctx'> 	.id_table	= cpia2_id_table</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -218,10 +223,9 @@ static void cpia2_usb_complete(struct urb *urb)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!cam-&gt;streaming || !cam-&gt;present || cam-&gt;open_count == 0) {</div><div class='del'>-		LOG("Will now stop the streaming: streaming = %d, "</div><div class='del'>-		    "present=%d, open_count=%d\n",</div><div class='del'>-		    cam-&gt;streaming, cam-&gt;present, cam-&gt;open_count);</div><div class='add'>+	if (!cam-&gt;streaming || !video_is_registered(&amp;cam-&gt;vdev)) {</div><div class='add'>+		LOG("Will now stop the streaming: streaming = %d, present=%d\n",</div><div class='add'>+		    cam-&gt;streaming, video_is_registered(&amp;cam-&gt;vdev));</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -392,7 +396,7 @@ static int configure_transfer_mode(struct camera_data *cam, unsigned int alt)</div><div class='ctx'> 	struct cpia2_command cmd;</div><div class='ctx'> 	unsigned char reg;</div><div class='ctx'> </div><div class='del'>-	if(!cam-&gt;present)</div><div class='add'>+	if (!video_is_registered(&amp;cam-&gt;vdev))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	/***</div><div class='hunk'>@@ -752,8 +756,8 @@ int cpia2_usb_stream_pause(struct camera_data *cam)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	if(cam-&gt;streaming) {</div><div class='del'>-		ret = set_alternate(cam, USBIF_CMDONLY);</div><div class='ctx'> 		free_sbufs(cam);</div><div class='add'>+		ret = set_alternate(cam, USBIF_CMDONLY);</div><div class='ctx'> 	}</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -770,6 +774,10 @@ int cpia2_usb_stream_resume(struct camera_data *cam)</div><div class='ctx'> 		cam-&gt;first_image_seen = 0;</div><div class='ctx'> 		ret = set_alternate(cam, cam-&gt;params.camera_state.stream_mode);</div><div class='ctx'> 		if(ret == 0) {</div><div class='add'>+			/* for some reason the user effects need to be set</div><div class='add'>+			   again when starting streaming. */</div><div class='add'>+			cpia2_do_command(cam, CPIA2_CMD_SET_USER_EFFECTS, TRANSFER_WRITE,</div><div class='add'>+					cam-&gt;params.vp_params.user_effects);</div><div class='ctx'> 			ret = submit_urbs(cam);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -784,6 +792,7 @@ int cpia2_usb_stream_resume(struct camera_data *cam)</div><div class='ctx'> int cpia2_usb_stream_stop(struct camera_data *cam)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='add'>+</div><div class='ctx'> 	ret = cpia2_usb_stream_pause(cam);</div><div class='ctx'> 	cam-&gt;streaming = 0;</div><div class='ctx'> 	configure_transfer_mode(cam, 0);</div><div class='hunk'>@@ -812,7 +821,8 @@ static int cpia2_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 	/* If we get to this point, we found a CPiA2 camera */</div><div class='ctx'> 	LOG("CPiA2 USB camera found\n");</div><div class='ctx'> </div><div class='del'>-	if((cam = cpia2_init_camera_struct()) == NULL)</div><div class='add'>+	cam = cpia2_init_camera_struct(intf);</div><div class='add'>+	if (cam == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	cam-&gt;dev = udev;</div><div class='hunk'>@@ -825,16 +835,9 @@ static int cpia2_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((ret = cpia2_register_camera(cam)) &lt; 0) {</div><div class='del'>-		ERR("%s: Failed to register cpia2 camera (ret = %d)\n", __func__, ret);</div><div class='del'>-		kfree(cam);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> 	if((ret = cpia2_init_camera(cam)) &lt; 0) {</div><div class='ctx'> 		ERR("%s: failed to initialize cpia2 camera (ret = %d)\n", __func__, ret);</div><div class='del'>-		cpia2_unregister_camera(cam);</div><div class='ctx'> 		kfree(cam);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -853,6 +856,13 @@ static int cpia2_usb_probe(struct usb_interface *intf,</div><div class='ctx'> </div><div class='ctx'> 	usb_set_intfdata(intf, cam);</div><div class='ctx'> </div><div class='add'>+	ret = cpia2_register_camera(cam);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		ERR("%s: Failed to register cpia2 camera (ret = %d)\n", __func__, ret);</div><div class='add'>+		kfree(cam);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -865,13 +875,16 @@ static void cpia2_usb_disconnect(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct camera_data *cam = usb_get_intfdata(intf);</div><div class='ctx'> 	usb_set_intfdata(intf, NULL);</div><div class='del'>-	cam-&gt;present = 0;</div><div class='ctx'> </div><div class='ctx'> 	DBG("Stopping stream\n");</div><div class='ctx'> 	cpia2_usb_stream_stop(cam);</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;cam-&gt;v4l2_lock);</div><div class='ctx'> 	DBG("Unregistering camera\n");</div><div class='ctx'> 	cpia2_unregister_camera(cam);</div><div class='add'>+	v4l2_device_disconnect(&amp;cam-&gt;v4l2_dev);</div><div class='add'>+	mutex_unlock(&amp;cam-&gt;v4l2_lock);</div><div class='add'>+	v4l2_device_put(&amp;cam-&gt;v4l2_dev);</div><div class='ctx'> </div><div class='ctx'> 	if(cam-&gt;buffers) {</div><div class='ctx'> 		DBG("Wakeup waiting processes\n");</div><div class='hunk'>@@ -884,14 +897,41 @@ static void cpia2_usb_disconnect(struct usb_interface *intf)</div><div class='ctx'> 	DBG("Releasing interface\n");</div><div class='ctx'> 	usb_driver_release_interface(&amp;cpia2_driver, intf);</div><div class='ctx'> </div><div class='del'>-	if (cam-&gt;open_count == 0) {</div><div class='del'>-		DBG("Freeing camera structure\n");</div><div class='del'>-		kfree(cam);</div><div class='add'>+	LOG("CPiA2 camera disconnected.\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cpia2_usb_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='add'>+{</div><div class='add'>+	struct camera_data *cam = usb_get_intfdata(intf);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;cam-&gt;v4l2_lock);</div><div class='add'>+	if (cam-&gt;streaming) {</div><div class='add'>+		cpia2_usb_stream_stop(cam);</div><div class='add'>+		cam-&gt;streaming = 1;</div><div class='ctx'> 	}</div><div class='add'>+	mutex_unlock(&amp;cam-&gt;v4l2_lock);</div><div class='ctx'> </div><div class='del'>-	LOG("CPiA2 camera disconnected.\n");</div><div class='add'>+	dev_info(&amp;intf-&gt;dev, "going into suspend..\n");</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Resume device - start device. */</div><div class='add'>+static int cpia2_usb_resume(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	struct camera_data *cam = usb_get_intfdata(intf);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;cam-&gt;v4l2_lock);</div><div class='add'>+	v4l2_ctrl_handler_setup(&amp;cam-&gt;hdl);</div><div class='add'>+	if (cam-&gt;streaming) {</div><div class='add'>+		cam-&gt;streaming = 0;</div><div class='add'>+		cpia2_usb_stream_start(cam,</div><div class='add'>+				cam-&gt;params.camera_state.stream_mode);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;cam-&gt;v4l2_lock);</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;intf-&gt;dev, "coming out of suspend..\n");</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/media/video/cpia2/cpia2_v4l.c b/drivers/media/video/cpia2/cpia2_v4l.c<br/>index 077eb1db80a1..55e92902a76c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cpia2/cpia2_v4l.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cpia2/cpia2_v4l.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cpia2/cpia2_v4l.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cpia2/cpia2_v4l.c</a></div><div class='hunk'>@@ -39,15 +39,15 @@</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "cpia2.h"</div><div class='del'>-#include "cpia2dev.h"</div><div class='ctx'> </div><div class='ctx'> static int video_nr = -1;</div><div class='ctx'> module_param(video_nr, int, 0);</div><div class='del'>-MODULE_PARM_DESC(video_nr,"video device to register (0=/dev/video0, etc)");</div><div class='add'>+MODULE_PARM_DESC(video_nr, "video device to register (0=/dev/video0, etc)");</div><div class='ctx'> </div><div class='del'>-static int buffer_size = 68*1024;</div><div class='add'>+static int buffer_size = 68 * 1024;</div><div class='ctx'> module_param(buffer_size, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(buffer_size, "Size for each frame buffer in bytes (default 68k)");</div><div class='ctx'> </div><div class='hunk'>@@ -62,18 +62,10 @@ MODULE_PARM_DESC(alternate, "USB Alternate (" __stringify(USBIF_ISO_1) "-"</div><div class='ctx'> 		 __stringify(USBIF_ISO_6) ", default "</div><div class='ctx'> 		 __stringify(DEFAULT_ALT) ")");</div><div class='ctx'> </div><div class='del'>-static int flicker_freq = 60;</div><div class='del'>-module_param(flicker_freq, int, 0);</div><div class='del'>-MODULE_PARM_DESC(flicker_freq, "Flicker frequency (" __stringify(50) "or"</div><div class='del'>-		 __stringify(60) ", default "</div><div class='del'>-		 __stringify(60) ")");</div><div class='del'>-</div><div class='del'>-static int flicker_mode = NEVER_FLICKER;</div><div class='add'>+static int flicker_mode;</div><div class='ctx'> module_param(flicker_mode, int, 0);</div><div class='del'>-MODULE_PARM_DESC(flicker_mode,</div><div class='del'>-		 "Flicker supression (" __stringify(NEVER_FLICKER) "or"</div><div class='del'>-		 __stringify(ANTI_FLICKER_ON) ", default "</div><div class='del'>-		 __stringify(NEVER_FLICKER) ")");</div><div class='add'>+MODULE_PARM_DESC(flicker_mode, "Flicker frequency (0 (disabled), " __stringify(50) " or "</div><div class='add'>+		 __stringify(60) ", default 0)");</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Steve Miller (STMicroelectronics) &lt;steve.miller@st.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("V4L-driver for STMicroelectronics CPiA2 based cameras");</div><div class='hunk'>@@ -82,153 +74,7 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_VERSION(CPIA_VERSION);</div><div class='ctx'> </div><div class='ctx'> #define ABOUT "V4L-Driver for Vision CPiA2 based cameras"</div><div class='del'>-</div><div class='del'>-struct control_menu_info {</div><div class='del'>-	int value;</div><div class='del'>-	char name[32];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct control_menu_info framerate_controls[] =</div><div class='del'>-{</div><div class='del'>-	{ CPIA2_VP_FRAMERATE_6_25, "6.25 fps" },</div><div class='del'>-	{ CPIA2_VP_FRAMERATE_7_5,  "7.5 fps"  },</div><div class='del'>-	{ CPIA2_VP_FRAMERATE_12_5, "12.5 fps" },</div><div class='del'>-	{ CPIA2_VP_FRAMERATE_15,   "15 fps"   },</div><div class='del'>-	{ CPIA2_VP_FRAMERATE_25,   "25 fps"   },</div><div class='del'>-	{ CPIA2_VP_FRAMERATE_30,   "30 fps"   },</div><div class='del'>-};</div><div class='del'>-#define NUM_FRAMERATE_CONTROLS (ARRAY_SIZE(framerate_controls))</div><div class='del'>-</div><div class='del'>-static struct control_menu_info flicker_controls[] =</div><div class='del'>-{</div><div class='del'>-	{ NEVER_FLICKER, "Off" },</div><div class='del'>-	{ FLICKER_50,    "50 Hz" },</div><div class='del'>-	{ FLICKER_60,    "60 Hz"  },</div><div class='del'>-};</div><div class='del'>-#define NUM_FLICKER_CONTROLS (ARRAY_SIZE(flicker_controls))</div><div class='del'>-</div><div class='del'>-static struct control_menu_info lights_controls[] =</div><div class='del'>-{</div><div class='del'>-	{ 0,   "Off" },</div><div class='del'>-	{ 64,  "Top" },</div><div class='del'>-	{ 128, "Bottom"  },</div><div class='del'>-	{ 192, "Both"  },</div><div class='del'>-};</div><div class='del'>-#define NUM_LIGHTS_CONTROLS (ARRAY_SIZE(lights_controls))</div><div class='del'>-#define GPIO_LIGHTS_MASK 192</div><div class='del'>-</div><div class='del'>-static struct v4l2_queryctrl controls[] = {</div><div class='del'>-	{</div><div class='del'>-		.id            = V4L2_CID_BRIGHTNESS,</div><div class='del'>-		.type          = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name          = "Brightness",</div><div class='del'>-		.minimum       = 0,</div><div class='del'>-		.maximum       = 255,</div><div class='del'>-		.step          = 1,</div><div class='del'>-		.default_value = DEFAULT_BRIGHTNESS,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.id            = V4L2_CID_CONTRAST,</div><div class='del'>-		.type          = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name          = "Contrast",</div><div class='del'>-		.minimum       = 0,</div><div class='del'>-		.maximum       = 255,</div><div class='del'>-		.step          = 1,</div><div class='del'>-		.default_value = DEFAULT_CONTRAST,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.id            = V4L2_CID_SATURATION,</div><div class='del'>-		.type          = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name          = "Saturation",</div><div class='del'>-		.minimum       = 0,</div><div class='del'>-		.maximum       = 255,</div><div class='del'>-		.step          = 1,</div><div class='del'>-		.default_value = DEFAULT_SATURATION,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.id            = V4L2_CID_HFLIP,</div><div class='del'>-		.type          = V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-		.name          = "Mirror Horizontally",</div><div class='del'>-		.minimum       = 0,</div><div class='del'>-		.maximum       = 1,</div><div class='del'>-		.step          = 1,</div><div class='del'>-		.default_value = 0,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.id            = V4L2_CID_VFLIP,</div><div class='del'>-		.type          = V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-		.name          = "Flip Vertically",</div><div class='del'>-		.minimum       = 0,</div><div class='del'>-		.maximum       = 1,</div><div class='del'>-		.step          = 1,</div><div class='del'>-		.default_value = 0,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.id            = CPIA2_CID_TARGET_KB,</div><div class='del'>-		.type          = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name          = "Target KB",</div><div class='del'>-		.minimum       = 0,</div><div class='del'>-		.maximum       = 255,</div><div class='del'>-		.step          = 1,</div><div class='del'>-		.default_value = DEFAULT_TARGET_KB,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.id            = CPIA2_CID_GPIO,</div><div class='del'>-		.type          = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name          = "GPIO",</div><div class='del'>-		.minimum       = 0,</div><div class='del'>-		.maximum       = 255,</div><div class='del'>-		.step          = 1,</div><div class='del'>-		.default_value = 0,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.id            = CPIA2_CID_FLICKER_MODE,</div><div class='del'>-		.type          = V4L2_CTRL_TYPE_MENU,</div><div class='del'>-		.name          = "Flicker Reduction",</div><div class='del'>-		.minimum       = 0,</div><div class='del'>-		.maximum       = NUM_FLICKER_CONTROLS-1,</div><div class='del'>-		.step          = 1,</div><div class='del'>-		.default_value = 0,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.id            = CPIA2_CID_FRAMERATE,</div><div class='del'>-		.type          = V4L2_CTRL_TYPE_MENU,</div><div class='del'>-		.name          = "Framerate",</div><div class='del'>-		.minimum       = 0,</div><div class='del'>-		.maximum       = NUM_FRAMERATE_CONTROLS-1,</div><div class='del'>-		.step          = 1,</div><div class='del'>-		.default_value = NUM_FRAMERATE_CONTROLS-1,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.id            = CPIA2_CID_USB_ALT,</div><div class='del'>-		.type          = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name          = "USB Alternate",</div><div class='del'>-		.minimum       = USBIF_ISO_1,</div><div class='del'>-		.maximum       = USBIF_ISO_6,</div><div class='del'>-		.step          = 1,</div><div class='del'>-		.default_value = DEFAULT_ALT,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.id            = CPIA2_CID_LIGHTS,</div><div class='del'>-		.type          = V4L2_CTRL_TYPE_MENU,</div><div class='del'>-		.name          = "Lights",</div><div class='del'>-		.minimum       = 0,</div><div class='del'>-		.maximum       = NUM_LIGHTS_CONTROLS-1,</div><div class='del'>-		.step          = 1,</div><div class='del'>-		.default_value = 0,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.id            = CPIA2_CID_RESET_CAMERA,</div><div class='del'>-		.type          = V4L2_CTRL_TYPE_BUTTON,</div><div class='del'>-		.name          = "Reset Camera",</div><div class='del'>-		.minimum       = 0,</div><div class='del'>-		.maximum       = 0,</div><div class='del'>-		.step          = 0,</div><div class='del'>-		.default_value = 0,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-#define NUM_CONTROLS (ARRAY_SIZE(controls))</div><div class='del'>-</div><div class='add'>+#define CPIA2_CID_USB_ALT (V4L2_CID_USER_BASE | 0xf000)</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='ctx'>  *</div><div class='hunk'>@@ -238,38 +84,27 @@ static struct v4l2_queryctrl controls[] = {</div><div class='ctx'> static int cpia2_open(struct file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct camera_data *cam = video_drvdata(file);</div><div class='del'>-	struct cpia2_fh *fh;</div><div class='del'>-</div><div class='del'>-	if (!cam) {</div><div class='del'>-		ERR("Internal error, camera_data not found!\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='add'>+	int retval = v4l2_fh_open(file);</div><div class='ctx'> </div><div class='del'>-	if (!cam-&gt;present)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	if (retval)</div><div class='add'>+		return retval;</div><div class='ctx'> </div><div class='del'>-	if (cam-&gt;open_count == 0) {</div><div class='del'>-		if (cpia2_allocate_buffers(cam))</div><div class='add'>+	if (v4l2_fh_is_singular_file(file)) {</div><div class='add'>+		if (cpia2_allocate_buffers(cam)) {</div><div class='add'>+			v4l2_fh_release(file);</div><div class='ctx'> 			return -ENOMEM;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* reset the camera */</div><div class='del'>-		if (cpia2_reset_camera(cam) &lt; 0)</div><div class='add'>+		if (cpia2_reset_camera(cam) &lt; 0) {</div><div class='add'>+			v4l2_fh_release(file);</div><div class='ctx'> 			return -EIO;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		cam-&gt;APP_len = 0;</div><div class='ctx'> 		cam-&gt;COM_len = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fh = kmalloc(sizeof(*fh), GFP_KERNEL);</div><div class='del'>-	if (!fh)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	file-&gt;private_data = fh;</div><div class='del'>-	fh-&gt;prio = V4L2_PRIORITY_UNSET;</div><div class='del'>-	v4l2_prio_open(&amp;cam-&gt;prio, &amp;fh-&gt;prio);</div><div class='del'>-	fh-&gt;mmapped = 0;</div><div class='del'>-</div><div class='del'>-	++cam-&gt;open_count;</div><div class='del'>-</div><div class='ctx'> 	cpia2_dbg_dump_registers(cam);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -283,37 +118,22 @@ static int cpia2_close(struct file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct video_device *dev = video_devdata(file);</div><div class='ctx'> 	struct camera_data *cam = video_get_drvdata(dev);</div><div class='del'>-	struct cpia2_fh *fh = file-&gt;private_data;</div><div class='ctx'> </div><div class='del'>-	if (cam-&gt;present &amp;&amp;</div><div class='del'>-	    (cam-&gt;open_count == 1 || fh-&gt;prio == V4L2_PRIORITY_RECORD)) {</div><div class='add'>+	if (video_is_registered(&amp;cam-&gt;vdev) &amp;&amp; v4l2_fh_is_singular_file(file)) {</div><div class='ctx'> 		cpia2_usb_stream_stop(cam);</div><div class='ctx'> </div><div class='del'>-		if (cam-&gt;open_count == 1) {</div><div class='del'>-			/* save camera state for later open */</div><div class='del'>-			cpia2_save_camera_state(cam);</div><div class='add'>+		/* save camera state for later open */</div><div class='add'>+		cpia2_save_camera_state(cam);</div><div class='ctx'> </div><div class='del'>-			cpia2_set_low_power(cam);</div><div class='del'>-			cpia2_free_buffers(cam);</div><div class='del'>-		}</div><div class='add'>+		cpia2_set_low_power(cam);</div><div class='add'>+		cpia2_free_buffers(cam);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (fh-&gt;mmapped)</div><div class='add'>+	if (cam-&gt;stream_fh == file-&gt;private_data) {</div><div class='add'>+		cam-&gt;stream_fh = NULL;</div><div class='ctx'> 		cam-&gt;mmapped = 0;</div><div class='del'>-	v4l2_prio_close(&amp;cam-&gt;prio, fh-&gt;prio);</div><div class='del'>-	file-&gt;private_data = NULL;</div><div class='del'>-	kfree(fh);</div><div class='del'>-</div><div class='del'>-	if (--cam-&gt;open_count == 0) {</div><div class='del'>-		cpia2_free_buffers(cam);</div><div class='del'>-		if (!cam-&gt;present) {</div><div class='del'>-			video_unregister_device(dev);</div><div class='del'>-			kfree(cam);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return v4l2_fh_release(file);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='hunk'>@@ -327,16 +147,9 @@ static ssize_t cpia2_v4l_read(struct file *file, char __user *buf, size_t count,</div><div class='ctx'> 	struct camera_data *cam = video_drvdata(file);</div><div class='ctx'> 	int noblock = file-&gt;f_flags&amp;O_NONBLOCK;</div><div class='ctx'> </div><div class='del'>-	struct cpia2_fh *fh = file-&gt;private_data;</div><div class='del'>-</div><div class='ctx'> 	if(!cam)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* Priority check */</div><div class='del'>-	if(fh-&gt;prio != V4L2_PRIORITY_RECORD) {</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return cpia2_read(cam, buf, count, noblock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -349,15 +162,6 @@ static ssize_t cpia2_v4l_read(struct file *file, char __user *buf, size_t count,</div><div class='ctx'> static unsigned int cpia2_v4l_poll(struct file *filp, struct poll_table_struct *wait)</div><div class='ctx'> {</div><div class='ctx'> 	struct camera_data *cam = video_drvdata(filp);</div><div class='del'>-	struct cpia2_fh *fh = filp-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	if(!cam)</div><div class='del'>-		return POLLERR;</div><div class='del'>-</div><div class='del'>-	/* Priority check */</div><div class='del'>-	if(fh-&gt;prio != V4L2_PRIORITY_RECORD) {</div><div class='del'>-		return POLLERR;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return cpia2_poll(cam, filp, wait);</div><div class='ctx'> }</div><div class='hunk'>@@ -384,36 +188,13 @@ static int sync(struct camera_data *cam, int frame_nr)</div><div class='ctx'> 		mutex_lock(&amp;cam-&gt;v4l2_lock);</div><div class='ctx'> 		if (signal_pending(current))</div><div class='ctx'> 			return -ERESTARTSYS;</div><div class='del'>-		if(!cam-&gt;present)</div><div class='add'>+		if (!video_is_registered(&amp;cam-&gt;vdev))</div><div class='ctx'> 			return -ENOTTY;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='ctx'>  *</div><div class='del'>- *  ioctl_set_gpio</div><div class='del'>- *</div><div class='del'>- *****************************************************************************/</div><div class='del'>-</div><div class='del'>-static long cpia2_default(struct file *file, void *fh, bool valid_prio,</div><div class='del'>-			  int cmd, void *arg)</div><div class='del'>-{</div><div class='del'>-	struct camera_data *cam = video_drvdata(file);</div><div class='del'>-	__u32 gpio_val;</div><div class='del'>-</div><div class='del'>-	if (cmd != CPIA2_CID_GPIO)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	gpio_val = *(__u32*) arg;</div><div class='del'>-</div><div class='del'>-	if (gpio_val &amp;~ 0xFFU)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return cpia2_set_gpio(cam, (unsigned char)gpio_val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************************************************</div><div class='del'>- *</div><div class='ctx'>  *  ioctl_querycap</div><div class='ctx'>  *</div><div class='ctx'>  *  V4L2 device capabilities</div><div class='hunk'>@@ -465,9 +246,11 @@ static int cpia2_querycap(struct file *file, void *fh, struct v4l2_capability *v</div><div class='ctx'> 	if (usb_make_path(cam-&gt;dev, vc-&gt;bus_info, sizeof(vc-&gt;bus_info)) &lt;0)</div><div class='ctx'> 		memset(vc-&gt;bus_info,0, sizeof(vc-&gt;bus_info));</div><div class='ctx'> </div><div class='del'>-	vc-&gt;capabilities = V4L2_CAP_VIDEO_CAPTURE |</div><div class='add'>+	vc-&gt;device_caps = V4L2_CAP_VIDEO_CAPTURE |</div><div class='ctx'> 			   V4L2_CAP_READWRITE |</div><div class='ctx'> 			   V4L2_CAP_STREAMING;</div><div class='add'>+	vc-&gt;capabilities = vc-&gt;device_caps |</div><div class='add'>+			   V4L2_CAP_DEVICE_CAPS;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -610,22 +393,12 @@ static int cpia2_s_fmt_vid_cap(struct file *file, void *_fh,</div><div class='ctx'> 					struct v4l2_format *f)</div><div class='ctx'> {</div><div class='ctx'> 	struct camera_data *cam = video_drvdata(file);</div><div class='del'>-	struct cpia2_fh *fh = _fh;</div><div class='ctx'> 	int err, frame;</div><div class='ctx'> </div><div class='del'>-	err = v4l2_prio_check(&amp;cam-&gt;prio, fh-&gt;prio);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='ctx'> 	err = cpia2_try_fmt_vid_cap(file, _fh, f);</div><div class='ctx'> 	if(err != 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	/* Ensure that only this process can change the format. */</div><div class='del'>-	err = v4l2_prio_change(&amp;cam-&gt;prio, &amp;fh-&gt;prio, V4L2_PRIORITY_RECORD);</div><div class='del'>-	if(err != 0) {</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	cam-&gt;pixelformat = f-&gt;fmt.pix.pixelformat;</div><div class='ctx'> </div><div class='ctx'> 	/* NOTE: This should be set to 1 for MJPEG, but some apps don't handle</div><div class='hunk'>@@ -713,240 +486,126 @@ static int cpia2_cropcap(struct file *file, void *fh, struct v4l2_cropcap *c)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/******************************************************************************</div><div class='del'>- *</div><div class='del'>- *  ioctl_queryctrl</div><div class='del'>- *</div><div class='del'>- *  V4L2 query possible control variables</div><div class='del'>- *</div><div class='del'>- *****************************************************************************/</div><div class='add'>+struct framerate_info {</div><div class='add'>+	int value;</div><div class='add'>+	struct v4l2_fract period;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static int cpia2_queryctrl(struct file *file, void *fh, struct v4l2_queryctrl *c)</div><div class='add'>+static const struct framerate_info framerate_controls[] = {</div><div class='add'>+	{ CPIA2_VP_FRAMERATE_6_25, { 4, 25 } },</div><div class='add'>+	{ CPIA2_VP_FRAMERATE_7_5,  { 2, 15 } },</div><div class='add'>+	{ CPIA2_VP_FRAMERATE_12_5, { 2, 25 } },</div><div class='add'>+	{ CPIA2_VP_FRAMERATE_15,   { 1, 15 } },</div><div class='add'>+	{ CPIA2_VP_FRAMERATE_25,   { 1, 25 } },</div><div class='add'>+	{ CPIA2_VP_FRAMERATE_30,   { 1, 30 } },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int cpia2_g_parm(struct file *file, void *fh, struct v4l2_streamparm *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct camera_data *cam = video_drvdata(file);</div><div class='add'>+	struct v4l2_captureparm *cap = &amp;p-&gt;parm.capture;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for(i=0; i&lt;NUM_CONTROLS; ++i) {</div><div class='del'>-		if(c-&gt;id == controls[i].id) {</div><div class='del'>-			memcpy(c, controls+i, sizeof(*c));</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(i == NUM_CONTROLS)</div><div class='add'>+	if (p-&gt;type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* Some devices have additional limitations */</div><div class='del'>-	switch(c-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		/***</div><div class='del'>-		 * Don't let the register be set to zero - bug in VP4</div><div class='del'>-		 * flash of full brightness</div><div class='del'>-		 ***/</div><div class='del'>-		if (cam-&gt;params.pnp_id.device_type == DEVICE_STV_672)</div><div class='del'>-			c-&gt;minimum = 1;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_VFLIP:</div><div class='del'>-		// VP5 Only</div><div class='del'>-		if(cam-&gt;params.pnp_id.device_type == DEVICE_STV_672)</div><div class='del'>-			c-&gt;flags |= V4L2_CTRL_FLAG_DISABLED;</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CID_FRAMERATE:</div><div class='del'>-		if(cam-&gt;params.pnp_id.device_type == DEVICE_STV_672 &amp;&amp;</div><div class='del'>-		   cam-&gt;params.version.sensor_flags==CPIA2_VP_SENSOR_FLAGS_500){</div><div class='del'>-			// Maximum 15fps</div><div class='del'>-			for(i=0; i&lt;c-&gt;maximum; ++i) {</div><div class='del'>-				if(framerate_controls[i].value ==</div><div class='del'>-				   CPIA2_VP_FRAMERATE_15) {</div><div class='del'>-					c-&gt;maximum = i;</div><div class='del'>-					c-&gt;default_value = i;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='add'>+	cap-&gt;capability = V4L2_CAP_TIMEPERFRAME;</div><div class='add'>+	cap-&gt;readbuffers = cam-&gt;num_frames;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(framerate_controls); i++)</div><div class='add'>+		if (cam-&gt;params.vp_params.frame_rate == framerate_controls[i].value) {</div><div class='add'>+			cap-&gt;timeperframe = framerate_controls[i].period;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CID_FLICKER_MODE:</div><div class='del'>-		// Flicker control only valid for 672.</div><div class='del'>-		if(cam-&gt;params.pnp_id.device_type != DEVICE_STV_672)</div><div class='del'>-			c-&gt;flags |= V4L2_CTRL_FLAG_DISABLED;</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CID_LIGHTS:</div><div class='del'>-		// Light control only valid for the QX5 Microscope.</div><div class='del'>-		if(cam-&gt;params.pnp_id.product != 0x151)</div><div class='del'>-			c-&gt;flags |= V4L2_CTRL_FLAG_DISABLED;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/******************************************************************************</div><div class='del'>- *</div><div class='del'>- *  ioctl_querymenu</div><div class='del'>- *</div><div class='del'>- *  V4L2 query possible control variables</div><div class='del'>- *</div><div class='del'>- *****************************************************************************/</div><div class='del'>-</div><div class='del'>-static int cpia2_querymenu(struct file *file, void *fh, struct v4l2_querymenu *m)</div><div class='add'>+static int cpia2_s_parm(struct file *file, void *fh, struct v4l2_streamparm *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct camera_data *cam = video_drvdata(file);</div><div class='add'>+	struct v4l2_captureparm *cap = &amp;p-&gt;parm.capture;</div><div class='add'>+	struct v4l2_fract tpf = cap-&gt;timeperframe;</div><div class='add'>+	int max = ARRAY_SIZE(framerate_controls) - 1;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	switch(m-&gt;id) {</div><div class='del'>-	case CPIA2_CID_FLICKER_MODE:</div><div class='del'>-		if (m-&gt;index &gt;= NUM_FLICKER_CONTROLS)</div><div class='del'>-			return -EINVAL;</div><div class='add'>+	ret = cpia2_g_parm(file, fh, p);</div><div class='add'>+	if (ret || !tpf.denominator || !tpf.numerator)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Maximum 15 fps for this model */</div><div class='add'>+	if (cam-&gt;params.pnp_id.device_type == DEVICE_STV_672 &amp;&amp;</div><div class='add'>+	    cam-&gt;params.version.sensor_flags == CPIA2_VP_SENSOR_FLAGS_500)</div><div class='add'>+		max -= 2;</div><div class='add'>+	for (i = 0; i &lt;= max; i++) {</div><div class='add'>+		struct v4l2_fract f1 = tpf;</div><div class='add'>+		struct v4l2_fract f2 = framerate_controls[i].period;</div><div class='add'>+</div><div class='add'>+		f1.numerator *= f2.denominator;</div><div class='add'>+		f2.numerator *= f1.denominator;</div><div class='add'>+		if (f1.numerator &gt;= f2.numerator)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	if (i &gt; max)</div><div class='add'>+		i = max;</div><div class='add'>+	cap-&gt;timeperframe = framerate_controls[i].period;</div><div class='add'>+	return cpia2_set_fps(cam, framerate_controls[i].value);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		strcpy(m-&gt;name, flicker_controls[m-&gt;index].name);</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CID_FRAMERATE:</div><div class='del'>-	    {</div><div class='del'>-		int maximum = NUM_FRAMERATE_CONTROLS - 1;</div><div class='del'>-		if(cam-&gt;params.pnp_id.device_type == DEVICE_STV_672 &amp;&amp;</div><div class='del'>-		   cam-&gt;params.version.sensor_flags==CPIA2_VP_SENSOR_FLAGS_500){</div><div class='del'>-			// Maximum 15fps</div><div class='del'>-			int i;</div><div class='del'>-			for(i=0; i&lt;maximum; ++i) {</div><div class='del'>-				if(framerate_controls[i].value ==</div><div class='del'>-				   CPIA2_VP_FRAMERATE_15)</div><div class='del'>-					maximum = i;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if (m-&gt;index &gt; maximum)</div><div class='del'>-			return -EINVAL;</div><div class='add'>+static const struct {</div><div class='add'>+	u32 width;</div><div class='add'>+	u32 height;</div><div class='add'>+} cpia2_framesizes[] = {</div><div class='add'>+	{ 640, 480 },</div><div class='add'>+	{ 352, 288 },</div><div class='add'>+	{ 320, 240 },</div><div class='add'>+	{ 288, 216 },</div><div class='add'>+	{ 256, 192 },</div><div class='add'>+	{ 224, 168 },</div><div class='add'>+	{ 192, 144 },</div><div class='add'>+	{ 176, 144 },</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		strcpy(m-&gt;name, framerate_controls[m-&gt;index].name);</div><div class='del'>-		break;</div><div class='del'>-	    }</div><div class='del'>-	case CPIA2_CID_LIGHTS:</div><div class='del'>-		if (m-&gt;index &gt;= NUM_LIGHTS_CONTROLS)</div><div class='del'>-			return -EINVAL;</div><div class='add'>+static int cpia2_enum_framesizes(struct file *file, void *fh,</div><div class='add'>+					 struct v4l2_frmsizeenum *fsize)</div><div class='add'>+{</div><div class='ctx'> </div><div class='del'>-		strcpy(m-&gt;name, lights_controls[m-&gt;index].name);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='add'>+	if (fsize-&gt;pixel_format != V4L2_PIX_FMT_MJPEG &amp;&amp;</div><div class='add'>+	    fsize-&gt;pixel_format != V4L2_PIX_FMT_JPEG)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	if (fsize-&gt;index &gt;= ARRAY_SIZE(cpia2_framesizes))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	fsize-&gt;type = V4L2_FRMSIZE_TYPE_DISCRETE;</div><div class='add'>+	fsize-&gt;discrete.width = cpia2_framesizes[fsize-&gt;index].width;</div><div class='add'>+	fsize-&gt;discrete.height = cpia2_framesizes[fsize-&gt;index].height;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/******************************************************************************</div><div class='del'>- *</div><div class='del'>- *  ioctl_g_ctrl</div><div class='del'>- *</div><div class='del'>- *  V4L2 get the value of a control variable</div><div class='del'>- *</div><div class='del'>- *****************************************************************************/</div><div class='del'>-</div><div class='del'>-static int cpia2_g_ctrl(struct file *file, void *fh, struct v4l2_control *c)</div><div class='add'>+static int cpia2_enum_frameintervals(struct file *file, void *fh,</div><div class='add'>+					   struct v4l2_frmivalenum *fival)</div><div class='ctx'> {</div><div class='ctx'> 	struct camera_data *cam = video_drvdata(file);</div><div class='add'>+	int max = ARRAY_SIZE(framerate_controls) - 1;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	switch(c-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		cpia2_do_command(cam, CPIA2_CMD_GET_VP_BRIGHTNESS,</div><div class='del'>-				 TRANSFER_READ, 0);</div><div class='del'>-		c-&gt;value = cam-&gt;params.color_params.brightness;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_CONTRAST:</div><div class='del'>-		cpia2_do_command(cam, CPIA2_CMD_GET_CONTRAST,</div><div class='del'>-				 TRANSFER_READ, 0);</div><div class='del'>-		c-&gt;value = cam-&gt;params.color_params.contrast;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_SATURATION:</div><div class='del'>-		cpia2_do_command(cam, CPIA2_CMD_GET_VP_SATURATION,</div><div class='del'>-				 TRANSFER_READ, 0);</div><div class='del'>-		c-&gt;value = cam-&gt;params.color_params.saturation;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_HFLIP:</div><div class='del'>-		cpia2_do_command(cam, CPIA2_CMD_GET_USER_EFFECTS,</div><div class='del'>-				 TRANSFER_READ, 0);</div><div class='del'>-		c-&gt;value = (cam-&gt;params.vp_params.user_effects &amp;</div><div class='del'>-			    CPIA2_VP_USER_EFFECTS_MIRROR) != 0;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_VFLIP:</div><div class='del'>-		cpia2_do_command(cam, CPIA2_CMD_GET_USER_EFFECTS,</div><div class='del'>-				 TRANSFER_READ, 0);</div><div class='del'>-		c-&gt;value = (cam-&gt;params.vp_params.user_effects &amp;</div><div class='del'>-			    CPIA2_VP_USER_EFFECTS_FLIP) != 0;</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CID_TARGET_KB:</div><div class='del'>-		c-&gt;value = cam-&gt;params.vc_params.target_kb;</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CID_GPIO:</div><div class='del'>-		cpia2_do_command(cam, CPIA2_CMD_GET_VP_GPIO_DATA,</div><div class='del'>-				 TRANSFER_READ, 0);</div><div class='del'>-		c-&gt;value = cam-&gt;params.vp_params.gpio_data;</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CID_FLICKER_MODE:</div><div class='del'>-	{</div><div class='del'>-		int i, mode;</div><div class='del'>-		cpia2_do_command(cam, CPIA2_CMD_GET_FLICKER_MODES,</div><div class='del'>-				 TRANSFER_READ, 0);</div><div class='del'>-		if(cam-&gt;params.flicker_control.cam_register &amp;</div><div class='del'>-		   CPIA2_VP_FLICKER_MODES_NEVER_FLICKER) {</div><div class='del'>-			mode = NEVER_FLICKER;</div><div class='del'>-		} else {</div><div class='del'>-		    if(cam-&gt;params.flicker_control.cam_register &amp;</div><div class='del'>-		       CPIA2_VP_FLICKER_MODES_50HZ) {</div><div class='del'>-			mode = FLICKER_50;</div><div class='del'>-		    } else {</div><div class='del'>-			mode = FLICKER_60;</div><div class='del'>-		    }</div><div class='del'>-		}</div><div class='del'>-		for(i=0; i&lt;NUM_FLICKER_CONTROLS; i++) {</div><div class='del'>-			if(flicker_controls[i].value == mode) {</div><div class='del'>-				c-&gt;value = i;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if(i == NUM_FLICKER_CONTROLS)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	case CPIA2_CID_FRAMERATE:</div><div class='del'>-	{</div><div class='del'>-		int maximum = NUM_FRAMERATE_CONTROLS - 1;</div><div class='del'>-		int i;</div><div class='del'>-		for(i=0; i&lt;= maximum; i++) {</div><div class='del'>-			if(cam-&gt;params.vp_params.frame_rate ==</div><div class='del'>-			   framerate_controls[i].value)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-		if(i &gt; maximum)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		c-&gt;value = i;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	case CPIA2_CID_USB_ALT:</div><div class='del'>-		c-&gt;value = cam-&gt;params.camera_state.stream_mode;</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CID_LIGHTS:</div><div class='del'>-	{</div><div class='del'>-		int i;</div><div class='del'>-		cpia2_do_command(cam, CPIA2_CMD_GET_VP_GPIO_DATA,</div><div class='del'>-				 TRANSFER_READ, 0);</div><div class='del'>-		for(i=0; i&lt;NUM_LIGHTS_CONTROLS; i++) {</div><div class='del'>-			if((cam-&gt;params.vp_params.gpio_data&amp;GPIO_LIGHTS_MASK) ==</div><div class='del'>-			   lights_controls[i].value) {</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if(i == NUM_LIGHTS_CONTROLS)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		c-&gt;value = i;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	case CPIA2_CID_RESET_CAMERA:</div><div class='add'>+	if (fival-&gt;pixel_format != V4L2_PIX_FMT_MJPEG &amp;&amp;</div><div class='add'>+	    fival-&gt;pixel_format != V4L2_PIX_FMT_JPEG)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DBG("Get control id:%d, value:%d\n", c-&gt;id, c-&gt;value);</div><div class='ctx'> </div><div class='add'>+	/* Maximum 15 fps for this model */</div><div class='add'>+	if (cam-&gt;params.pnp_id.device_type == DEVICE_STV_672 &amp;&amp;</div><div class='add'>+	    cam-&gt;params.version.sensor_flags == CPIA2_VP_SENSOR_FLAGS_500)</div><div class='add'>+		max -= 2;</div><div class='add'>+	if (fival-&gt;index &gt; max)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(cpia2_framesizes); i++)</div><div class='add'>+		if (fival-&gt;width == cpia2_framesizes[i].width &amp;&amp;</div><div class='add'>+		    fival-&gt;height == cpia2_framesizes[i].height)</div><div class='add'>+			break;</div><div class='add'>+	if (i == ARRAY_SIZE(cpia2_framesizes))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	fival-&gt;type = V4L2_FRMIVAL_TYPE_DISCRETE;</div><div class='add'>+	fival-&gt;discrete = framerate_controls[fival-&gt;index].period;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -958,72 +617,54 @@ static int cpia2_g_ctrl(struct file *file, void *fh, struct v4l2_control *c)</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='del'>-static int cpia2_s_ctrl(struct file *file, void *fh, struct v4l2_control *c)</div><div class='add'>+static int cpia2_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='del'>-	struct camera_data *cam = video_drvdata(file);</div><div class='del'>-	int i;</div><div class='del'>-	int retval = 0;</div><div class='add'>+	struct camera_data *cam =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct camera_data, hdl);</div><div class='add'>+	static const int flicker_table[] = {</div><div class='add'>+		NEVER_FLICKER,</div><div class='add'>+		FLICKER_50,</div><div class='add'>+		FLICKER_60,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-	DBG("Set control id:%d, value:%d\n", c-&gt;id, c-&gt;value);</div><div class='del'>-</div><div class='del'>-	/* Check that the value is in range */</div><div class='del'>-	for(i=0; i&lt;NUM_CONTROLS; i++) {</div><div class='del'>-		if(c-&gt;id == controls[i].id) {</div><div class='del'>-			if(c-&gt;value &lt; controls[i].minimum ||</div><div class='del'>-			   c-&gt;value &gt; controls[i].maximum) {</div><div class='del'>-				return -EINVAL;</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if(i == NUM_CONTROLS)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	DBG("Set control id:%d, value:%d\n", ctrl-&gt;id, ctrl-&gt;val);</div><div class='ctx'> </div><div class='del'>-	switch(c-&gt;id) {</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='ctx'> 	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		cpia2_set_brightness(cam, c-&gt;value);</div><div class='add'>+		cpia2_set_brightness(cam, ctrl-&gt;val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_CONTRAST:</div><div class='del'>-		cpia2_set_contrast(cam, c-&gt;value);</div><div class='add'>+		cpia2_set_contrast(cam, ctrl-&gt;val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_SATURATION:</div><div class='del'>-		cpia2_set_saturation(cam, c-&gt;value);</div><div class='add'>+		cpia2_set_saturation(cam, ctrl-&gt;val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_HFLIP:</div><div class='del'>-		cpia2_set_property_mirror(cam, c-&gt;value);</div><div class='add'>+		cpia2_set_property_mirror(cam, ctrl-&gt;val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_VFLIP:</div><div class='del'>-		cpia2_set_property_flip(cam, c-&gt;value);</div><div class='add'>+		cpia2_set_property_flip(cam, ctrl-&gt;val);</div><div class='ctx'> 		break;</div><div class='del'>-	case CPIA2_CID_TARGET_KB:</div><div class='del'>-		retval = cpia2_set_target_kb(cam, c-&gt;value);</div><div class='add'>+	case V4L2_CID_POWER_LINE_FREQUENCY:</div><div class='add'>+		return cpia2_set_flicker_mode(cam, flicker_table[ctrl-&gt;val]);</div><div class='add'>+	case V4L2_CID_ILLUMINATORS_1:</div><div class='add'>+		return cpia2_set_gpio(cam, (cam-&gt;top_light-&gt;val &lt;&lt; 6) |</div><div class='add'>+					   (cam-&gt;bottom_light-&gt;val &lt;&lt; 7));</div><div class='add'>+	case V4L2_CID_JPEG_ACTIVE_MARKER:</div><div class='add'>+		cam-&gt;params.compression.inhibit_htables =</div><div class='add'>+			!(ctrl-&gt;val &amp; V4L2_JPEG_ACTIVE_MARKER_DHT);</div><div class='ctx'> 		break;</div><div class='del'>-	case CPIA2_CID_GPIO:</div><div class='del'>-		retval = cpia2_set_gpio(cam, c-&gt;value);</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CID_FLICKER_MODE:</div><div class='del'>-		retval = cpia2_set_flicker_mode(cam,</div><div class='del'>-					      flicker_controls[c-&gt;value].value);</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CID_FRAMERATE:</div><div class='del'>-		retval = cpia2_set_fps(cam, framerate_controls[c-&gt;value].value);</div><div class='add'>+	case V4L2_CID_JPEG_COMPRESSION_QUALITY:</div><div class='add'>+		cam-&gt;params.vc_params.quality = ctrl-&gt;val;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CPIA2_CID_USB_ALT:</div><div class='del'>-		retval = cpia2_usb_change_streaming_alternate(cam, c-&gt;value);</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CID_LIGHTS:</div><div class='del'>-		retval = cpia2_set_gpio(cam, lights_controls[c-&gt;value].value);</div><div class='del'>-		break;</div><div class='del'>-	case CPIA2_CID_RESET_CAMERA:</div><div class='del'>-		cpia2_usb_stream_pause(cam);</div><div class='del'>-		cpia2_reset_camera(cam);</div><div class='del'>-		cpia2_usb_stream_resume(cam);</div><div class='add'>+		cam-&gt;params.camera_state.stream_mode = ctrl-&gt;val;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		retval = -EINVAL;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return retval;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='hunk'>@@ -1084,6 +725,8 @@ static int cpia2_s_jpegcomp(struct file *file, void *fh, struct v4l2_jpegcompres</div><div class='ctx'> </div><div class='ctx'> 	cam-&gt;params.compression.inhibit_htables =</div><div class='ctx'> 		!(parms-&gt;jpeg_markers &amp; V4L2_JPEG_MARKER_DHT);</div><div class='add'>+	parms-&gt;jpeg_markers &amp;= V4L2_JPEG_MARKER_DQT | V4L2_JPEG_MARKER_DRI |</div><div class='add'>+			       V4L2_JPEG_MARKER_DHT;</div><div class='ctx'> </div><div class='ctx'> 	if(parms-&gt;APP_len != 0) {</div><div class='ctx'> 		if(parms-&gt;APP_len &gt; 0 &amp;&amp;</div><div class='hunk'>@@ -1270,12 +913,12 @@ static int cpia2_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf)</div><div class='ctx'> 		struct framebuf *cb=cam-&gt;curbuff;</div><div class='ctx'> 		mutex_unlock(&amp;cam-&gt;v4l2_lock);</div><div class='ctx'> 		wait_event_interruptible(cam-&gt;wq_stream,</div><div class='del'>-					 !cam-&gt;present ||</div><div class='add'>+					 !video_is_registered(&amp;cam-&gt;vdev) ||</div><div class='ctx'> 					 (cb=cam-&gt;curbuff)-&gt;status == FRAME_READY);</div><div class='ctx'> 		mutex_lock(&amp;cam-&gt;v4l2_lock);</div><div class='ctx'> 		if (signal_pending(current))</div><div class='ctx'> 			return -ERESTARTSYS;</div><div class='del'>-		if(!cam-&gt;present)</div><div class='add'>+		if (!video_is_registered(&amp;cam-&gt;vdev))</div><div class='ctx'> 			return -ENOTTY;</div><div class='ctx'> 		frame = cb-&gt;num;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1299,56 +942,39 @@ static int cpia2_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cpia2_g_priority(struct file *file, void *_fh, enum v4l2_priority *p)</div><div class='del'>-{</div><div class='del'>-	struct cpia2_fh *fh = _fh;</div><div class='del'>-</div><div class='del'>-	*p = fh-&gt;prio;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cpia2_s_priority(struct file *file, void *_fh, enum v4l2_priority prio)</div><div class='del'>-{</div><div class='del'>-	struct camera_data *cam = video_drvdata(file);</div><div class='del'>-	struct cpia2_fh *fh = _fh;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;streaming &amp;&amp; prio != fh-&gt;prio &amp;&amp;</div><div class='del'>-			fh-&gt;prio == V4L2_PRIORITY_RECORD)</div><div class='del'>-		/* Can't drop record priority while streaming */</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	if (prio == V4L2_PRIORITY_RECORD &amp;&amp; prio != fh-&gt;prio &amp;&amp;</div><div class='del'>-			v4l2_prio_max(&amp;cam-&gt;prio) == V4L2_PRIORITY_RECORD)</div><div class='del'>-		/* Only one program can record at a time */</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	return v4l2_prio_change(&amp;cam-&gt;prio, &amp;fh-&gt;prio, prio);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int cpia2_streamon(struct file *file, void *fh, enum v4l2_buf_type type)</div><div class='ctx'> {</div><div class='ctx'> 	struct camera_data *cam = video_drvdata(file);</div><div class='add'>+	int ret = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	DBG("VIDIOC_STREAMON, streaming=%d\n", cam-&gt;streaming);</div><div class='ctx'> 	if (!cam-&gt;mmapped || type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!cam-&gt;streaming)</div><div class='del'>-		return cpia2_usb_stream_start(cam,</div><div class='add'>+	if (!cam-&gt;streaming) {</div><div class='add'>+		ret = cpia2_usb_stream_start(cam,</div><div class='ctx'> 				cam-&gt;params.camera_state.stream_mode);</div><div class='del'>-	return -EINVAL;</div><div class='add'>+		if (!ret)</div><div class='add'>+			v4l2_ctrl_grab(cam-&gt;usb_alt, true);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpia2_streamoff(struct file *file, void *fh, enum v4l2_buf_type type)</div><div class='ctx'> {</div><div class='ctx'> 	struct camera_data *cam = video_drvdata(file);</div><div class='add'>+	int ret = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	DBG("VIDIOC_STREAMOFF, streaming=%d\n", cam-&gt;streaming);</div><div class='ctx'> 	if (!cam-&gt;mmapped || type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (cam-&gt;streaming)</div><div class='del'>-		return cpia2_usb_stream_stop(cam);</div><div class='del'>-	return -EINVAL;</div><div class='add'>+	if (cam-&gt;streaming) {</div><div class='add'>+		ret = cpia2_usb_stream_stop(cam);</div><div class='add'>+		if (!ret)</div><div class='add'>+			v4l2_ctrl_grab(cam-&gt;usb_alt, false);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='hunk'>@@ -1361,16 +987,10 @@ static int cpia2_mmap(struct file *file, struct vm_area_struct *area)</div><div class='ctx'> 	struct camera_data *cam = video_drvdata(file);</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='del'>-	/* Priority check */</div><div class='del'>-	struct cpia2_fh *fh = file-&gt;private_data;</div><div class='del'>-	if(fh-&gt;prio != V4L2_PRIORITY_RECORD) {</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	retval = cpia2_remap_buffer(cam, area);</div><div class='ctx'> </div><div class='ctx'> 	if(!retval)</div><div class='del'>-		fh-&gt;mmapped = 1;</div><div class='add'>+		cam-&gt;stream_fh = file-&gt;private_data;</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1388,15 +1008,13 @@ static void reset_camera_struct_v4l(struct camera_data *cam)</div><div class='ctx'> 	cam-&gt;frame_size = buffer_size;</div><div class='ctx'> 	cam-&gt;num_frames = num_buffers;</div><div class='ctx'> </div><div class='del'>-	/* FlickerModes */</div><div class='add'>+	/* Flicker modes */</div><div class='ctx'> 	cam-&gt;params.flicker_control.flicker_mode_req = flicker_mode;</div><div class='del'>-	cam-&gt;params.flicker_control.mains_frequency = flicker_freq;</div><div class='ctx'> </div><div class='del'>-	/* streamMode */</div><div class='add'>+	/* stream modes */</div><div class='ctx'> 	cam-&gt;params.camera_state.stream_mode = alternate;</div><div class='ctx'> </div><div class='ctx'> 	cam-&gt;pixelformat = V4L2_PIX_FMT_JPEG;</div><div class='del'>-	v4l2_prio_init(&amp;cam-&gt;prio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct v4l2_ioctl_ops cpia2_ioctl_ops = {</div><div class='hunk'>@@ -1408,10 +1026,6 @@ static const struct v4l2_ioctl_ops cpia2_ioctl_ops = {</div><div class='ctx'> 	.vidioc_g_fmt_vid_cap		    = cpia2_g_fmt_vid_cap,</div><div class='ctx'> 	.vidioc_s_fmt_vid_cap		    = cpia2_s_fmt_vid_cap,</div><div class='ctx'> 	.vidioc_try_fmt_vid_cap		    = cpia2_try_fmt_vid_cap,</div><div class='del'>-	.vidioc_queryctrl		    = cpia2_queryctrl,</div><div class='del'>-	.vidioc_querymenu		    = cpia2_querymenu,</div><div class='del'>-	.vidioc_g_ctrl			    = cpia2_g_ctrl,</div><div class='del'>-	.vidioc_s_ctrl			    = cpia2_s_ctrl,</div><div class='ctx'> 	.vidioc_g_jpegcomp		    = cpia2_g_jpegcomp,</div><div class='ctx'> 	.vidioc_s_jpegcomp		    = cpia2_s_jpegcomp,</div><div class='ctx'> 	.vidioc_cropcap			    = cpia2_cropcap,</div><div class='hunk'>@@ -1421,9 +1035,12 @@ static const struct v4l2_ioctl_ops cpia2_ioctl_ops = {</div><div class='ctx'> 	.vidioc_dqbuf			    = cpia2_dqbuf,</div><div class='ctx'> 	.vidioc_streamon		    = cpia2_streamon,</div><div class='ctx'> 	.vidioc_streamoff		    = cpia2_streamoff,</div><div class='del'>-	.vidioc_g_priority		    = cpia2_g_priority,</div><div class='del'>-	.vidioc_s_priority		    = cpia2_s_priority,</div><div class='del'>-	.vidioc_default			    = cpia2_default,</div><div class='add'>+	.vidioc_s_parm			    = cpia2_s_parm,</div><div class='add'>+	.vidioc_g_parm			    = cpia2_g_parm,</div><div class='add'>+	.vidioc_enum_framesizes		    = cpia2_enum_framesizes,</div><div class='add'>+	.vidioc_enum_frameintervals	    = cpia2_enum_frameintervals,</div><div class='add'>+	.vidioc_subscribe_event		    = v4l2_ctrl_subscribe_event,</div><div class='add'>+	.vidioc_unsubscribe_event	    = v4l2_event_unsubscribe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /***</div><div class='hunk'>@@ -1444,7 +1061,21 @@ static struct video_device cpia2_template = {</div><div class='ctx'> 	.name =		"CPiA2 Camera",</div><div class='ctx'> 	.fops =		&amp;cpia2_fops,</div><div class='ctx'> 	.ioctl_ops =	&amp;cpia2_ioctl_ops,</div><div class='del'>-	.release =	video_device_release,</div><div class='add'>+	.release =	video_device_release_empty,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void cpia2_camera_release(struct v4l2_device *v4l2_dev)</div><div class='add'>+{</div><div class='add'>+	struct camera_data *cam =</div><div class='add'>+		container_of(v4l2_dev, struct camera_data, v4l2_dev);</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;cam-&gt;hdl);</div><div class='add'>+	v4l2_device_unregister(&amp;cam-&gt;v4l2_dev);</div><div class='add'>+	kfree(cam);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops cpia2_ctrl_ops = {</div><div class='add'>+	.s_ctrl = cpia2_s_ctrl,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='hunk'>@@ -1454,20 +1085,78 @@ static struct video_device cpia2_template = {</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> int cpia2_register_camera(struct camera_data *cam)</div><div class='ctx'> {</div><div class='del'>-	cam-&gt;vdev = video_device_alloc();</div><div class='del'>-	if(!cam-&gt;vdev)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	struct v4l2_ctrl_handler *hdl = &amp;cam-&gt;hdl;</div><div class='add'>+	struct v4l2_ctrl_config cpia2_usb_alt = {</div><div class='add'>+		.ops = &amp;cpia2_ctrl_ops,</div><div class='add'>+		.id = CPIA2_CID_USB_ALT,</div><div class='add'>+		.name = "USB Alternate",</div><div class='add'>+		.type = V4L2_CTRL_TYPE_INTEGER,</div><div class='add'>+		.min = USBIF_ISO_1,</div><div class='add'>+		.max = USBIF_ISO_6,</div><div class='add'>+		.step = 1,</div><div class='add'>+	};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_handler_init(hdl, 12);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;cpia2_ctrl_ops,</div><div class='add'>+			V4L2_CID_BRIGHTNESS,</div><div class='add'>+			cam-&gt;params.pnp_id.device_type == DEVICE_STV_672 ? 1 : 0,</div><div class='add'>+			255, 1, DEFAULT_BRIGHTNESS);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;cpia2_ctrl_ops,</div><div class='add'>+			V4L2_CID_CONTRAST, 0, 255, 1, DEFAULT_CONTRAST);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;cpia2_ctrl_ops,</div><div class='add'>+			V4L2_CID_SATURATION, 0, 255, 1, DEFAULT_SATURATION);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;cpia2_ctrl_ops,</div><div class='add'>+			V4L2_CID_HFLIP, 0, 1, 1, 0);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;cpia2_ctrl_ops,</div><div class='add'>+			V4L2_CID_JPEG_ACTIVE_MARKER, 0,</div><div class='add'>+			V4L2_JPEG_ACTIVE_MARKER_DHT, 0,</div><div class='add'>+			V4L2_JPEG_ACTIVE_MARKER_DHT);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;cpia2_ctrl_ops,</div><div class='add'>+			V4L2_CID_JPEG_COMPRESSION_QUALITY, 1,</div><div class='add'>+			100, 1, 100);</div><div class='add'>+	cpia2_usb_alt.def = alternate;</div><div class='add'>+	cam-&gt;usb_alt = v4l2_ctrl_new_custom(hdl, &amp;cpia2_usb_alt, NULL);</div><div class='add'>+	/* VP5 Only */</div><div class='add'>+	if (cam-&gt;params.pnp_id.device_type != DEVICE_STV_672)</div><div class='add'>+		v4l2_ctrl_new_std(hdl, &amp;cpia2_ctrl_ops,</div><div class='add'>+			V4L2_CID_VFLIP, 0, 1, 1, 0);</div><div class='add'>+	/* Flicker control only valid for 672 */</div><div class='add'>+	if (cam-&gt;params.pnp_id.device_type == DEVICE_STV_672)</div><div class='add'>+		v4l2_ctrl_new_std_menu(hdl, &amp;cpia2_ctrl_ops,</div><div class='add'>+			V4L2_CID_POWER_LINE_FREQUENCY,</div><div class='add'>+			V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0, 0);</div><div class='add'>+	/* Light control only valid for the QX5 Microscope */</div><div class='add'>+	if (cam-&gt;params.pnp_id.product == 0x151) {</div><div class='add'>+		cam-&gt;top_light = v4l2_ctrl_new_std(hdl, &amp;cpia2_ctrl_ops,</div><div class='add'>+				V4L2_CID_ILLUMINATORS_1, 0, 1, 1, 0);</div><div class='add'>+		cam-&gt;bottom_light = v4l2_ctrl_new_std(hdl, &amp;cpia2_ctrl_ops,</div><div class='add'>+				V4L2_CID_ILLUMINATORS_2, 0, 1, 1, 0);</div><div class='add'>+		v4l2_ctrl_cluster(2, &amp;cam-&gt;top_light);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	memcpy(cam-&gt;vdev, &amp;cpia2_template, sizeof(cpia2_template));</div><div class='del'>-	video_set_drvdata(cam-&gt;vdev, cam);</div><div class='del'>-	cam-&gt;vdev-&gt;lock = &amp;cam-&gt;v4l2_lock;</div><div class='add'>+	if (hdl-&gt;error) {</div><div class='add'>+		ret = hdl-&gt;error;</div><div class='add'>+		v4l2_ctrl_handler_free(hdl);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cam-&gt;vdev = cpia2_template;</div><div class='add'>+	video_set_drvdata(&amp;cam-&gt;vdev, cam);</div><div class='add'>+	cam-&gt;vdev.lock = &amp;cam-&gt;v4l2_lock;</div><div class='add'>+	cam-&gt;vdev.ctrl_handler = hdl;</div><div class='add'>+	cam-&gt;vdev.v4l2_dev = &amp;cam-&gt;v4l2_dev;</div><div class='add'>+	set_bit(V4L2_FL_USE_FH_PRIO, &amp;cam-&gt;vdev.flags);</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;cam-&gt;vdev.flags);</div><div class='ctx'> </div><div class='ctx'> 	reset_camera_struct_v4l(cam);</div><div class='ctx'> </div><div class='ctx'> 	/* register v4l device */</div><div class='del'>-	if (video_register_device(cam-&gt;vdev, VFL_TYPE_GRABBER, video_nr) &lt; 0) {</div><div class='add'>+	if (video_register_device(&amp;cam-&gt;vdev, VFL_TYPE_GRABBER, video_nr) &lt; 0) {</div><div class='ctx'> 		ERR("video_register_device failed\n");</div><div class='del'>-		video_device_release(cam-&gt;vdev);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1481,13 +1170,7 @@ int cpia2_register_camera(struct camera_data *cam)</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> void cpia2_unregister_camera(struct camera_data *cam)</div><div class='ctx'> {</div><div class='del'>-	if (!cam-&gt;open_count) {</div><div class='del'>-		video_unregister_device(cam-&gt;vdev);</div><div class='del'>-	} else {</div><div class='del'>-		LOG("%s removed while open, deferring "</div><div class='del'>-		    "video_unregister_device\n",</div><div class='del'>-		    video_device_node_name(cam-&gt;vdev));</div><div class='del'>-	}</div><div class='add'>+	video_unregister_device(&amp;cam-&gt;vdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='hunk'>@@ -1524,23 +1207,12 @@ static void __init check_parameters(void)</div><div class='ctx'> 		LOG("alternate specified is invalid, using %d\n", alternate);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (flicker_mode != NEVER_FLICKER &amp;&amp; flicker_mode != ANTI_FLICKER_ON) {</div><div class='del'>-		flicker_mode = NEVER_FLICKER;</div><div class='add'>+	if (flicker_mode != 0 &amp;&amp; flicker_mode != FLICKER_50 &amp;&amp; flicker_mode != FLICKER_60) {</div><div class='add'>+		flicker_mode = 0;</div><div class='ctx'> 		LOG("Flicker mode specified is invalid, using %d\n",</div><div class='ctx'> 		    flicker_mode);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (flicker_freq != FLICKER_50 &amp;&amp; flicker_freq != FLICKER_60) {</div><div class='del'>-		flicker_freq = FLICKER_60;</div><div class='del'>-		LOG("Flicker mode specified is invalid, using %d\n",</div><div class='del'>-		    flicker_freq);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(video_nr &lt; -1 || video_nr &gt; 64) {</div><div class='del'>-		video_nr = -1;</div><div class='del'>-		LOG("invalid video_nr specified, must be -1 to 64\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	DBG("Using %d buffers, each %d bytes, alternate=%d\n",</div><div class='ctx'> 	    num_buffers, buffer_size, alternate);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/media/video/cpia2/cpia2dev.h b/drivers/media/video/cpia2/cpia2dev.h<br/>deleted file mode 100644<br/>index f66691fe5a35..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cpia2/cpia2dev.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cpia2/cpia2dev.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,50 +0,0 @@</div><div class='del'>-/****************************************************************************</div><div class='del'>- *</div><div class='del'>- *  Filename: cpia2dev.h</div><div class='del'>- *</div><div class='del'>- *  Copyright 2001, STMicrolectronics, Inc.</div><div class='del'>- *</div><div class='del'>- *  Contact:  steve.miller@st.com</div><div class='del'>- *</div><div class='del'>- *  Description:</div><div class='del'>- *     This file provides definitions for applications wanting to use the</div><div class='del'>- *     cpia2 driver beyond the generic v4l capabilities.</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can redistribute it and/or modify</div><div class='del'>- *  it under the terms of the GNU General Public License as published by</div><div class='del'>- *  the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- *  (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- *  This program is distributed in the hope that it will be useful,</div><div class='del'>- *  but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- *  GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- *  You should have received a copy of the GNU General Public License</div><div class='del'>- *  along with this program; if not, write to the Free Software</div><div class='del'>- *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>- *</div><div class='del'>- ****************************************************************************/</div><div class='del'>-</div><div class='del'>-#ifndef CPIA2_DEV_HEADER</div><div class='del'>-#define CPIA2_DEV_HEADER</div><div class='del'>-</div><div class='del'>-#include &lt;linux/videodev2.h&gt;</div><div class='del'>-</div><div class='del'>-/***</div><div class='del'>- * The following defines are ioctl numbers based on video4linux private ioctls,</div><div class='del'>- * which can range from 192 (BASE_VIDIOCPRIVATE) to 255. All of these take int</div><div class='del'>- * args</div><div class='del'>- */</div><div class='del'>-#define CPIA2_IOC_SET_GPIO         _IOW('v', BASE_VIDIOC_PRIVATE + 17, __u32)</div><div class='del'>-</div><div class='del'>-/* V4L2 driver specific controls */</div><div class='del'>-#define CPIA2_CID_TARGET_KB     (V4L2_CID_PRIVATE_BASE+0)</div><div class='del'>-#define CPIA2_CID_GPIO          (V4L2_CID_PRIVATE_BASE+1)</div><div class='del'>-#define CPIA2_CID_FLICKER_MODE  (V4L2_CID_PRIVATE_BASE+2)</div><div class='del'>-#define CPIA2_CID_FRAMERATE     (V4L2_CID_PRIVATE_BASE+3)</div><div class='del'>-#define CPIA2_CID_USB_ALT       (V4L2_CID_PRIVATE_BASE+4)</div><div class='del'>-#define CPIA2_CID_LIGHTS        (V4L2_CID_PRIVATE_BASE+5)</div><div class='del'>-#define CPIA2_CID_RESET_CAMERA  (V4L2_CID_PRIVATE_BASE+6)</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/media/video/cx18/cx18-alsa-main.c b/drivers/media/video/cx18/cx18-alsa-main.c<br/>index e118361c2e7b..6d2a98246b6d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx18/cx18-alsa-main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx18/cx18-alsa-main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx18/cx18-alsa-main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx18/cx18-alsa-main.c</a></div><div class='hunk'>@@ -285,6 +285,7 @@ static void __exit cx18_alsa_exit(void)</div><div class='ctx'> </div><div class='ctx'> 	drv = driver_find("cx18", &amp;pci_bus_type);</div><div class='ctx'> 	ret = driver_for_each_device(drv, NULL, NULL, cx18_alsa_exit_callback);</div><div class='add'>+	(void)ret;	/* suppress compiler warning */</div><div class='ctx'> </div><div class='ctx'> 	cx18_ext_init = NULL;</div><div class='ctx'> 	printk(KERN_INFO "cx18-alsa: module unload complete\n");</div><div class='head'>diff --git a/drivers/media/video/cx18/cx18-alsa-pcm.c b/drivers/media/video/cx18/cx18-alsa-pcm.c<br/>index 82d195be9197..7a5b84a86bb3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx18/cx18-alsa-pcm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx18/cx18-alsa-pcm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx18/cx18-alsa-pcm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx18/cx18-alsa-pcm.c</a></div><div class='hunk'>@@ -190,7 +190,7 @@ static int snd_cx18_pcm_capture_open(struct snd_pcm_substream *substream)</div><div class='ctx'> 	ret = cx18_start_v4l2_encode_stream(s);</div><div class='ctx'> 	snd_cx18_unlock(cxsc);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int snd_cx18_pcm_capture_close(struct snd_pcm_substream *substream)</div><div class='hunk'>@@ -199,12 +199,11 @@ static int snd_cx18_pcm_capture_close(struct snd_pcm_substream *substream)</div><div class='ctx'> 	struct v4l2_device *v4l2_dev = cxsc-&gt;v4l2_dev;</div><div class='ctx'> 	struct cx18 *cx = to_cx18(v4l2_dev);</div><div class='ctx'> 	struct cx18_stream *s;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Instruct the cx18 to stop sending packets */</div><div class='ctx'> 	snd_cx18_lock(cxsc);</div><div class='ctx'> 	s = &amp;cx-&gt;streams[CX18_ENC_STREAM_TYPE_PCM];</div><div class='del'>-	ret = cx18_stop_v4l2_encode_stream(s, 0);</div><div class='add'>+	cx18_stop_v4l2_encode_stream(s, 0);</div><div class='ctx'> 	clear_bit(CX18_F_S_STREAMING, &amp;s-&gt;s_flags);</div><div class='ctx'> </div><div class='ctx'> 	cx18_release_stream(s);</div><div class='hunk'>@@ -252,13 +251,10 @@ static int snd_pcm_alloc_vmalloc_buffer(struct snd_pcm_substream *subs,</div><div class='ctx'> static int snd_cx18_pcm_hw_params(struct snd_pcm_substream *substream,</div><div class='ctx'> 			 struct snd_pcm_hw_params *params)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='ctx'> 	dprintk("%s called\n", __func__);</div><div class='ctx'> </div><div class='del'>-	ret = snd_pcm_alloc_vmalloc_buffer(substream,</div><div class='add'>+	return snd_pcm_alloc_vmalloc_buffer(substream,</div><div class='ctx'> 					   params_buffer_bytes(params));</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int snd_cx18_pcm_hw_free(struct snd_pcm_substream *substream)</div><div class='head'>diff --git a/drivers/media/video/cx18/cx18-ioctl.c b/drivers/media/video/cx18/cx18-ioctl.c<br/>index be49f68ddf37..35fde4e931f5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx18/cx18-ioctl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx18/cx18-ioctl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx18/cx18-ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx18/cx18-ioctl.c</a></div><div class='hunk'>@@ -1137,7 +1137,7 @@ static long cx18_default(struct file *file, void *fh, bool valid_prio,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return -ENOTTY;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/media/video/cx18/cx18-mailbox.c b/drivers/media/video/cx18/cx18-mailbox.c<br/>index 0c7796e76ac0..ed8118390b02 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx18/cx18-mailbox.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx18/cx18-mailbox.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx18/cx18-mailbox.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx18/cx18-mailbox.c</a></div><div class='hunk'>@@ -595,9 +595,8 @@ void cx18_api_epu_cmd_irq(struct cx18 *cx, int rpu)</div><div class='ctx'> static int cx18_api_call(struct cx18 *cx, u32 cmd, int args, u32 data[])</div><div class='ctx'> {</div><div class='ctx'> 	const struct cx18_api_info *info = find_api_info(cmd);</div><div class='del'>-	u32 state, irq, req, ack, err;</div><div class='add'>+	u32 irq, req, ack, err;</div><div class='ctx'> 	struct cx18_mailbox __iomem *mb;</div><div class='del'>-	u32 __iomem *xpu_state;</div><div class='ctx'> 	wait_queue_head_t *waitq;</div><div class='ctx'> 	struct mutex *mb_lock;</div><div class='ctx'> 	unsigned long int t0, timeout, ret;</div><div class='hunk'>@@ -628,14 +627,12 @@ static int cx18_api_call(struct cx18 *cx, u32 cmd, int args, u32 data[])</div><div class='ctx'> 		mb_lock = &amp;cx-&gt;epu2apu_mb_lock;</div><div class='ctx'> 		irq = IRQ_EPU_TO_APU;</div><div class='ctx'> 		mb = &amp;cx-&gt;scb-&gt;epu2apu_mb;</div><div class='del'>-		xpu_state = &amp;cx-&gt;scb-&gt;apu_state;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CPU:</div><div class='ctx'> 		waitq = &amp;cx-&gt;mb_cpu_waitq;</div><div class='ctx'> 		mb_lock = &amp;cx-&gt;epu2cpu_mb_lock;</div><div class='ctx'> 		irq = IRQ_EPU_TO_CPU;</div><div class='ctx'> 		mb = &amp;cx-&gt;scb-&gt;epu2cpu_mb;</div><div class='del'>-		xpu_state = &amp;cx-&gt;scb-&gt;cpu_state;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		CX18_WARN("Unknown RPU (%d) for API call\n", info-&gt;rpu);</div><div class='hunk'>@@ -653,7 +650,6 @@ static int cx18_api_call(struct cx18 *cx, u32 cmd, int args, u32 data[])</div><div class='ctx'> 	 * by a signal, we may get here and find a busy mailbox.  After waiting,</div><div class='ctx'> 	 * mark it "not busy" from our end, if the XPU hasn't ack'ed it still.</div><div class='ctx'> 	 */</div><div class='del'>-	state = cx18_readl(cx, xpu_state);</div><div class='ctx'> 	req = cx18_readl(cx, &amp;mb-&gt;request);</div><div class='ctx'> 	timeout = msecs_to_jiffies(10);</div><div class='ctx'> 	ret = wait_event_timeout(*waitq,</div><div class='head'>diff --git a/drivers/media/video/cx18/cx18-streams.c b/drivers/media/video/cx18/cx18-streams.c<br/>index 638cca156b58..4185bcb80ca3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx18/cx18-streams.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx18/cx18-streams.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx18/cx18-streams.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx18/cx18-streams.c</a></div><div class='hunk'>@@ -980,7 +980,6 @@ void cx18_stop_all_captures(struct cx18 *cx)</div><div class='ctx'> int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)</div><div class='ctx'> {</div><div class='ctx'> 	struct cx18 *cx = s-&gt;cx;</div><div class='del'>-	unsigned long then;</div><div class='ctx'> </div><div class='ctx'> 	if (!cx18_stream_enabled(s))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -999,8 +998,6 @@ int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)</div><div class='ctx'> 	else</div><div class='ctx'> 		cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s-&gt;handle);</div><div class='ctx'> </div><div class='del'>-	then = jiffies;</div><div class='del'>-</div><div class='ctx'> 	if (s-&gt;type == CX18_ENC_STREAM_TYPE_MPG &amp;&amp; gop_end) {</div><div class='ctx'> 		CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/media/video/cx231xx/cx231xx-417.c b/drivers/media/video/cx231xx/cx231xx-417.c<br/>index d4327dab5a36..ce2f62238a19 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx231xx/cx231xx-417.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx231xx/cx231xx-417.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx231xx/cx231xx-417.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx231xx/cx231xx-417.c</a></div><div class='hunk'>@@ -1095,7 +1095,7 @@ static int cx231xx_initialize_codec(struct cx231xx *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int version;</div><div class='ctx'> 	int retval;</div><div class='del'>-	u32 i, data[7];</div><div class='add'>+	u32 i;</div><div class='ctx'> 	u32 val = 0;</div><div class='ctx'> </div><div class='ctx'> 	dprintk(1, "%s()\n", __func__);</div><div class='hunk'>@@ -1154,6 +1154,11 @@ static int cx231xx_initialize_codec(struct cx231xx *dev)</div><div class='ctx'> 		CX231xx_CUSTOM_EXTENSION_USR_DATA, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='ctx'> 		0, 0);</div><div class='ctx'> */</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+	/* TODO */</div><div class='add'>+	u32 data[7];</div><div class='add'>+</div><div class='ctx'> 	/* Setup to capture VBI */</div><div class='ctx'> 	data[0] = 0x0001BD00;</div><div class='ctx'> 	data[1] = 1;          /* frames per interrupt */</div><div class='hunk'>@@ -1162,7 +1167,7 @@ static int cx231xx_initialize_codec(struct cx231xx *dev)</div><div class='ctx'> 	data[4] = 0x206080C0; /* stop codes */</div><div class='ctx'> 	data[5] = 6;          /* lines */</div><div class='ctx'> 	data[6] = 64;         /* BPL */</div><div class='del'>-/*</div><div class='add'>+</div><div class='ctx'> 	cx231xx_api_cmd(dev, CX2341X_ENC_SET_VBI_CONFIG, 7, 0, data[0], data[1],</div><div class='ctx'> 		data[2], data[3], data[4], data[5], data[6]);</div><div class='ctx'> </div><div class='hunk'>@@ -1175,7 +1180,7 @@ static int cx231xx_initialize_codec(struct cx231xx *dev)</div><div class='ctx'> 		cx231xx_api_cmd(dev, CX2341X_ENC_SET_VBI_LINE, 5, 0,</div><div class='ctx'> 				i | 0x80000000, valid, 0, 0, 0);</div><div class='ctx'> 	}</div><div class='del'>-*/</div><div class='add'>+#endif</div><div class='ctx'> /*	cx231xx_api_cmd(dev, CX2341X_ENC_MUTE_AUDIO, 1, 0, CX231xx_UNMUTE);</div><div class='ctx'> 	msleep(60);</div><div class='ctx'> */</div><div class='hunk'>@@ -1792,17 +1797,16 @@ static int vidioc_streamon(struct file *file, void *priv,</div><div class='ctx'> 	struct cx231xx_fh  *fh  = file-&gt;private_data;</div><div class='ctx'> </div><div class='ctx'> 	struct cx231xx *dev = fh-&gt;dev;</div><div class='del'>-	int rc = 0;</div><div class='ctx'> 	dprintk(3, "enter vidioc_streamon()\n");</div><div class='ctx'> 		cx231xx_set_alt_setting(dev, INDEX_TS1, 0);</div><div class='del'>-		rc = cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE);</div><div class='add'>+		cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE);</div><div class='ctx'> 		if (dev-&gt;USE_ISO)</div><div class='del'>-			rc = cx231xx_init_isoc(dev, CX231XX_NUM_PACKETS,</div><div class='add'>+			cx231xx_init_isoc(dev, CX231XX_NUM_PACKETS,</div><div class='ctx'> 				       CX231XX_NUM_BUFS,</div><div class='ctx'> 				       dev-&gt;video_mode.max_pkt_size,</div><div class='ctx'> 				       cx231xx_isoc_copy);</div><div class='ctx'> 		else {</div><div class='del'>-			rc = cx231xx_init_bulk(dev, 320,</div><div class='add'>+			cx231xx_init_bulk(dev, 320,</div><div class='ctx'> 				       5,</div><div class='ctx'> 				       dev-&gt;ts1_mode.max_pkt_size,</div><div class='ctx'> 				       cx231xx_bulk_copy);</div><div class='head'>diff --git a/drivers/media/video/cx231xx/cx231xx-audio.c b/drivers/media/video/cx231xx/cx231xx-audio.c<br/>index a2c2b7d343ec..068f78dc5d13 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx231xx/cx231xx-audio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx231xx/cx231xx-audio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx231xx/cx231xx-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx231xx/cx231xx-audio.c</a></div><div class='hunk'>@@ -523,21 +523,24 @@ static int snd_cx231xx_pcm_close(struct snd_pcm_substream *substream)</div><div class='ctx'> static int snd_cx231xx_hw_capture_params(struct snd_pcm_substream *substream,</div><div class='ctx'> 					 struct snd_pcm_hw_params *hw_params)</div><div class='ctx'> {</div><div class='del'>-	unsigned int channels, rate, format;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	dprintk("Setting capture parameters\n");</div><div class='ctx'> </div><div class='ctx'> 	ret = snd_pcm_alloc_vmalloc_buffer(substream,</div><div class='ctx'> 					   params_buffer_bytes(hw_params));</div><div class='add'>+#if 0</div><div class='add'>+	/* TODO: set up cx231xx audio chip to deliver the correct audio format,</div><div class='add'>+	   current default is 48000hz multiplexed =&gt; 96000hz mono</div><div class='add'>+	   which shouldn't matter since analogue TV only supports mono */</div><div class='add'>+	unsigned int channels, rate, format;</div><div class='add'>+</div><div class='ctx'> 	format = params_format(hw_params);</div><div class='ctx'> 	rate = params_rate(hw_params);</div><div class='ctx'> 	channels = params_channels(hw_params);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	/* TODO: set up cx231xx audio chip to deliver the correct audio format,</div><div class='del'>-	   current default is 48000hz multiplexed =&gt; 96000hz mono</div><div class='del'>-	   which shouldn't matter since analogue TV only supports mono */</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int snd_cx231xx_hw_capture_free(struct snd_pcm_substream *substream)</div><div class='hunk'>@@ -586,7 +589,7 @@ static int snd_cx231xx_capture_trigger(struct snd_pcm_substream *substream,</div><div class='ctx'> 				       int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct cx231xx *dev = snd_pcm_substream_chip(substream);</div><div class='del'>-	int retval;</div><div class='add'>+	int retval = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;state &amp; DEV_DISCONNECTED)</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -601,12 +604,13 @@ static int snd_cx231xx_capture_trigger(struct snd_pcm_substream *substream,</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		retval = -EINVAL;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock(&amp;dev-&gt;adev.slock);</div><div class='ctx'> </div><div class='ctx'> 	schedule_work(&amp;dev-&gt;wq_trigger);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static snd_pcm_uframes_t snd_cx231xx_capture_pointer(struct snd_pcm_substream</div><div class='head'>diff --git a/drivers/media/video/cx231xx/cx231xx-avcore.c b/drivers/media/video/cx231xx/cx231xx-avcore.c<br/>index 53ff26e7abf7..b085a3c6dc04 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx231xx/cx231xx-avcore.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx231xx/cx231xx-avcore.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx231xx/cx231xx-avcore.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx231xx/cx231xx-avcore.c</a></div><div class='hunk'>@@ -934,33 +934,29 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,</div><div class='ctx'> void cx231xx_enable656(struct cx231xx *dev)</div><div class='ctx'> {</div><div class='ctx'> 	u8 temp = 0;</div><div class='del'>-	int status;</div><div class='ctx'> 	/*enable TS1 data[0:7] as output to export 656*/</div><div class='ctx'> </div><div class='del'>-	status = vid_blk_write_byte(dev, TS1_PIN_CTL0, 0xFF);</div><div class='add'>+	vid_blk_write_byte(dev, TS1_PIN_CTL0, 0xFF);</div><div class='ctx'> </div><div class='ctx'> 	/*enable TS1 clock as output to export 656*/</div><div class='ctx'> </div><div class='del'>-	status = vid_blk_read_byte(dev, TS1_PIN_CTL1, &amp;temp);</div><div class='add'>+	vid_blk_read_byte(dev, TS1_PIN_CTL1, &amp;temp);</div><div class='ctx'> 	temp = temp|0x04;</div><div class='ctx'> </div><div class='del'>-	status = vid_blk_write_byte(dev, TS1_PIN_CTL1, temp);</div><div class='del'>-</div><div class='add'>+	vid_blk_write_byte(dev, TS1_PIN_CTL1, temp);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cx231xx_enable656);</div><div class='ctx'> </div><div class='ctx'> void cx231xx_disable656(struct cx231xx *dev)</div><div class='ctx'> {</div><div class='ctx'> 	u8 temp = 0;</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='ctx'> </div><div class='del'>-	status = vid_blk_write_byte(dev, TS1_PIN_CTL0, 0x00);</div><div class='add'>+	vid_blk_write_byte(dev, TS1_PIN_CTL0, 0x00);</div><div class='ctx'> </div><div class='del'>-	status = vid_blk_read_byte(dev, TS1_PIN_CTL1, &amp;temp);</div><div class='add'>+	vid_blk_read_byte(dev, TS1_PIN_CTL1, &amp;temp);</div><div class='ctx'> 	temp = temp&amp;0xFB;</div><div class='ctx'> </div><div class='del'>-	status = vid_blk_write_byte(dev, TS1_PIN_CTL1, temp);</div><div class='add'>+	vid_blk_write_byte(dev, TS1_PIN_CTL1, temp);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cx231xx_disable656);</div><div class='ctx'> </div><div class='hunk'>@@ -1320,117 +1316,115 @@ void update_HH_register_after_set_DIF(struct cx231xx *dev)</div><div class='ctx'> </div><div class='ctx'> void cx231xx_dump_HH_reg(struct cx231xx *dev)</div><div class='ctx'> {</div><div class='del'>-	u8 status = 0;</div><div class='ctx'> 	u32 value = 0;</div><div class='ctx'> 	u16  i = 0;</div><div class='ctx'> </div><div class='ctx'> 	value = 0x45005390;</div><div class='del'>-	status = vid_blk_write_word(dev, 0x104, value);</div><div class='add'>+	vid_blk_write_word(dev, 0x104, value);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0x100; i &lt; 0x140; i++) {</div><div class='del'>-		status = vid_blk_read_word(dev, i, &amp;value);</div><div class='add'>+		vid_blk_read_word(dev, i, &amp;value);</div><div class='ctx'> 		cx231xx_info("reg0x%x=0x%x\n", i, value);</div><div class='ctx'> 		i = i+3;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0x300; i &lt; 0x400; i++) {</div><div class='del'>-		status = vid_blk_read_word(dev, i, &amp;value);</div><div class='add'>+		vid_blk_read_word(dev, i, &amp;value);</div><div class='ctx'> 		cx231xx_info("reg0x%x=0x%x\n", i, value);</div><div class='ctx'> 		i = i+3;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0x400; i &lt; 0x440; i++) {</div><div class='del'>-		status = vid_blk_read_word(dev, i,  &amp;value);</div><div class='add'>+		vid_blk_read_word(dev, i,  &amp;value);</div><div class='ctx'> 		cx231xx_info("reg0x%x=0x%x\n", i, value);</div><div class='ctx'> 		i = i+3;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	status = vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &amp;value);</div><div class='add'>+	vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &amp;value);</div><div class='ctx'> 	cx231xx_info("AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value);</div><div class='ctx'> 	vid_blk_write_word(dev, AFE_CTRL_C2HH_SRC_CTRL, 0x4485D390);</div><div class='del'>-	status = vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &amp;value);</div><div class='add'>+	vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &amp;value);</div><div class='ctx'> 	cx231xx_info("AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void cx231xx_dump_SC_reg(struct cx231xx *dev)</div><div class='ctx'> {</div><div class='ctx'> 	u8 value[4] = { 0, 0, 0, 0 };</div><div class='del'>-	int status = 0;</div><div class='ctx'> 	cx231xx_info("cx231xx_dump_SC_reg!\n");</div><div class='ctx'> </div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, BOARD_CFG_STAT,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, BOARD_CFG_STAT,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", BOARD_CFG_STAT, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS_MODE_REG,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS_MODE_REG,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS_MODE_REG, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_CFG_REG,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_CFG_REG,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_CFG_REG, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_LENGTH_REG,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_LENGTH_REG,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_LENGTH_REG, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='ctx'> </div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_CFG_REG,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_CFG_REG,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_CFG_REG, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_LENGTH_REG,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_LENGTH_REG,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_LENGTH_REG, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", EP_MODE_SET, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN1,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN1,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN1, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='ctx'> </div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN2,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN2,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN2, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN3,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN3,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN3, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK0,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK0,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK0, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK1,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK1,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK1, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='ctx'> </div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK2,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK2,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK2, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_GAIN,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_GAIN,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_GAIN, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_CAR_REG,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_CAR_REG,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_CAR_REG, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG1,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG1,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG1, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='ctx'> </div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG2,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG2,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG2, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='del'>-	status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,</div><div class='add'>+	cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,</div><div class='ctx'> 				 value, 4);</div><div class='ctx'> 	cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, value[0],</div><div class='ctx'> 				 value[1], value[2], value[3]);</div><div class='hunk'>@@ -1441,18 +1435,15 @@ void cx231xx_dump_SC_reg(struct cx231xx *dev)</div><div class='ctx'> void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev)</div><div class='ctx'> </div><div class='ctx'> {</div><div class='del'>-	u8 status = 0;</div><div class='ctx'> 	u8 value = 0;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	status = afe_read_byte(dev, ADC_STATUS2_CH3, &amp;value);</div><div class='add'>+	afe_read_byte(dev, ADC_STATUS2_CH3, &amp;value);</div><div class='ctx'> 	value = (value &amp; 0xFE)|0x01;</div><div class='del'>-	status = afe_write_byte(dev, ADC_STATUS2_CH3, value);</div><div class='add'>+	afe_write_byte(dev, ADC_STATUS2_CH3, value);</div><div class='ctx'> </div><div class='del'>-	status = afe_read_byte(dev, ADC_STATUS2_CH3, &amp;value);</div><div class='add'>+	afe_read_byte(dev, ADC_STATUS2_CH3, &amp;value);</div><div class='ctx'> 	value = (value &amp; 0xFE)|0x00;</div><div class='del'>-	status = afe_write_byte(dev, ADC_STATUS2_CH3, value);</div><div class='add'>+	afe_write_byte(dev, ADC_STATUS2_CH3, value);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1464,44 +1455,43 @@ void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev)</div><div class='ctx'> 		for low-if agc defect</div><div class='ctx'> */</div><div class='ctx'> </div><div class='del'>-	status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3, &amp;value);</div><div class='add'>+	afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3, &amp;value);</div><div class='ctx'> 	value = (value &amp; 0xFC)|0x00;</div><div class='del'>-	status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, value);</div><div class='add'>+	afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, value);</div><div class='ctx'> </div><div class='del'>-	status = afe_read_byte(dev, ADC_INPUT_CH3, &amp;value);</div><div class='add'>+	afe_read_byte(dev, ADC_INPUT_CH3, &amp;value);</div><div class='ctx'> 	value = (value &amp; 0xF9)|0x02;</div><div class='del'>-	status = afe_write_byte(dev, ADC_INPUT_CH3, value);</div><div class='add'>+	afe_write_byte(dev, ADC_INPUT_CH3, value);</div><div class='ctx'> </div><div class='del'>-	status = afe_read_byte(dev, ADC_FB_FRCRST_CH3, &amp;value);</div><div class='add'>+	afe_read_byte(dev, ADC_FB_FRCRST_CH3, &amp;value);</div><div class='ctx'> 	value = (value &amp; 0xFB)|0x04;</div><div class='del'>-	status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, value);</div><div class='add'>+	afe_write_byte(dev, ADC_FB_FRCRST_CH3, value);</div><div class='ctx'> </div><div class='del'>-	status = afe_read_byte(dev, ADC_DCSERVO_DEM_CH3, &amp;value);</div><div class='add'>+	afe_read_byte(dev, ADC_DCSERVO_DEM_CH3, &amp;value);</div><div class='ctx'> 	value = (value &amp; 0xFC)|0x03;</div><div class='del'>-	status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, value);</div><div class='add'>+	afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, value);</div><div class='ctx'> </div><div class='del'>-	status = afe_read_byte(dev, ADC_CTRL_DAC1_CH3, &amp;value);</div><div class='add'>+	afe_read_byte(dev, ADC_CTRL_DAC1_CH3, &amp;value);</div><div class='ctx'> 	value = (value &amp; 0xFB)|0x04;</div><div class='del'>-	status = afe_write_byte(dev, ADC_CTRL_DAC1_CH3, value);</div><div class='add'>+	afe_write_byte(dev, ADC_CTRL_DAC1_CH3, value);</div><div class='ctx'> </div><div class='del'>-	status = afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &amp;value);</div><div class='add'>+	afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &amp;value);</div><div class='ctx'> 	value = (value &amp; 0xF8)|0x06;</div><div class='del'>-	status = afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value);</div><div class='add'>+	afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value);</div><div class='ctx'> </div><div class='del'>-	status = afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &amp;value);</div><div class='add'>+	afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &amp;value);</div><div class='ctx'> 	value = (value &amp; 0x8F)|0x40;</div><div class='del'>-	status = afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value);</div><div class='add'>+	afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value);</div><div class='ctx'> </div><div class='del'>-	status = afe_read_byte(dev, ADC_PWRDN_CLAMP_CH3, &amp;value);</div><div class='add'>+	afe_read_byte(dev, ADC_PWRDN_CLAMP_CH3, &amp;value);</div><div class='ctx'> 	value = (value &amp; 0xDF)|0x20;</div><div class='del'>-	status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, value);</div><div class='add'>+	afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,</div><div class='ctx'> 		 u8 spectral_invert, u32 mode)</div><div class='ctx'> {</div><div class='ctx'> 	u32 colibri_carrier_offset = 0;</div><div class='del'>-	u8 status = 0;</div><div class='ctx'> 	u32 func_mode = 0x01; /* Device has a DIF if this function is called */</div><div class='ctx'> 	u32 standard = 0;</div><div class='ctx'> 	u8 value[4] = { 0, 0, 0, 0 };</div><div class='hunk'>@@ -1511,15 +1501,15 @@ void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,</div><div class='ctx'> 	value[1] = (u8) 0x6F;</div><div class='ctx'> 	value[2] = (u8) 0x6F;</div><div class='ctx'> 	value[3] = (u8) 0x6F;</div><div class='del'>-	status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,</div><div class='add'>+	cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,</div><div class='ctx'> 					PWR_CTL_EN, value, 4);</div><div class='ctx'> </div><div class='ctx'> 	/*Set colibri for low IF*/</div><div class='del'>-	status = cx231xx_afe_set_mode(dev, AFE_MODE_LOW_IF);</div><div class='add'>+	cx231xx_afe_set_mode(dev, AFE_MODE_LOW_IF);</div><div class='ctx'> </div><div class='ctx'> 	/* Set C2HH for low IF operation.*/</div><div class='ctx'> 	standard = dev-&gt;norm;</div><div class='del'>-	status = cx231xx_dif_configure_C2HH_for_low_IF(dev, dev-&gt;active_mode,</div><div class='add'>+	cx231xx_dif_configure_C2HH_for_low_IF(dev, dev-&gt;active_mode,</div><div class='ctx'> 						       func_mode, standard);</div><div class='ctx'> </div><div class='ctx'> 	/* Get colibri offsets.*/</div><div class='hunk'>@@ -1556,7 +1546,6 @@ void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,</div><div class='ctx'> 		 u8 spectral_invert, u32 mode)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long pll_freq_word;</div><div class='del'>-	int status = 0;</div><div class='ctx'> 	u32 dif_misc_ctrl_value = 0;</div><div class='ctx'> 	u64 pll_freq_u64 = 0;</div><div class='ctx'> 	u32 i = 0;</div><div class='hunk'>@@ -1567,7 +1556,7 @@ void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,</div><div class='ctx'> </div><div class='ctx'> 	if (mode == TUNER_MODE_FM_RADIO) {</div><div class='ctx'> 		pll_freq_word = 0x905A1CAC;</div><div class='del'>-		status = vid_blk_write_word(dev, DIF_PLL_FREQ_WORD,  pll_freq_word);</div><div class='add'>+		vid_blk_write_word(dev, DIF_PLL_FREQ_WORD,  pll_freq_word);</div><div class='ctx'> </div><div class='ctx'> 	} else /*KSPROPERTY_TUNER_MODE_TV*/{</div><div class='ctx'> 		/* Calculate the PLL frequency word based on the adjusted if_freq*/</div><div class='hunk'>@@ -1576,23 +1565,23 @@ void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,</div><div class='ctx'> 		do_div(pll_freq_u64, 50000000);</div><div class='ctx'> 		pll_freq_word = (u32)pll_freq_u64;</div><div class='ctx'> 		/*pll_freq_word = 0x3463497;*/</div><div class='del'>-		status = vid_blk_write_word(dev, DIF_PLL_FREQ_WORD,  pll_freq_word);</div><div class='add'>+		vid_blk_write_word(dev, DIF_PLL_FREQ_WORD,  pll_freq_word);</div><div class='ctx'> </div><div class='ctx'> 	if (spectral_invert) {</div><div class='ctx'> 		if_freq -= 400000;</div><div class='ctx'> 		/* Enable Spectral Invert*/</div><div class='del'>-		status = vid_blk_read_word(dev, DIF_MISC_CTRL,</div><div class='add'>+		vid_blk_read_word(dev, DIF_MISC_CTRL,</div><div class='ctx'> 					&amp;dif_misc_ctrl_value);</div><div class='ctx'> 		dif_misc_ctrl_value = dif_misc_ctrl_value | 0x00200000;</div><div class='del'>-		status = vid_blk_write_word(dev, DIF_MISC_CTRL,</div><div class='add'>+		vid_blk_write_word(dev, DIF_MISC_CTRL,</div><div class='ctx'> 					dif_misc_ctrl_value);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if_freq += 400000;</div><div class='ctx'> 		/* Disable Spectral Invert*/</div><div class='del'>-		status = vid_blk_read_word(dev, DIF_MISC_CTRL,</div><div class='add'>+		vid_blk_read_word(dev, DIF_MISC_CTRL,</div><div class='ctx'> 					&amp;dif_misc_ctrl_value);</div><div class='ctx'> 		dif_misc_ctrl_value = dif_misc_ctrl_value &amp; 0xFFDFFFFF;</div><div class='del'>-		status = vid_blk_write_word(dev, DIF_MISC_CTRL,</div><div class='add'>+		vid_blk_write_word(dev, DIF_MISC_CTRL,</div><div class='ctx'> 					dif_misc_ctrl_value);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1606,10 +1595,10 @@ void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cx231xx_info("Enter IF=%zd\n",</div><div class='del'>-			sizeof(Dif_set_array)/sizeof(struct dif_settings));</div><div class='del'>-	for (i = 0; i &lt; sizeof(Dif_set_array)/sizeof(struct dif_settings); i++) {</div><div class='add'>+			ARRAY_SIZE(Dif_set_array));</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(Dif_set_array); i++) {</div><div class='ctx'> 		if (Dif_set_array[i].if_freq == if_freq) {</div><div class='del'>-			status = vid_blk_write_word(dev,</div><div class='add'>+			vid_blk_write_word(dev,</div><div class='ctx'> 			Dif_set_array[i].register_address, Dif_set_array[i].value);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3090,31 +3079,30 @@ int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len)</div><div class='ctx'>  */</div><div class='ctx'> int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len)</div><div class='ctx'> {</div><div class='del'>-	int status = 0;</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* get the lock */</div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;gpio_i2c_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* start */</div><div class='del'>-	status = cx231xx_gpio_i2c_start(dev);</div><div class='add'>+	cx231xx_gpio_i2c_start(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* write dev_addr */</div><div class='del'>-	status = cx231xx_gpio_i2c_write_byte(dev, dev_addr &lt;&lt; 1);</div><div class='add'>+	cx231xx_gpio_i2c_write_byte(dev, dev_addr &lt;&lt; 1);</div><div class='ctx'> </div><div class='ctx'> 	/* read Ack */</div><div class='del'>-	status = cx231xx_gpio_i2c_read_ack(dev);</div><div class='add'>+	cx231xx_gpio_i2c_read_ack(dev);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; len; i++) {</div><div class='ctx'> 		/* Write data */</div><div class='del'>-		status = cx231xx_gpio_i2c_write_byte(dev, buf[i]);</div><div class='add'>+		cx231xx_gpio_i2c_write_byte(dev, buf[i]);</div><div class='ctx'> </div><div class='ctx'> 		/* read Ack */</div><div class='del'>-		status = cx231xx_gpio_i2c_read_ack(dev);</div><div class='add'>+		cx231xx_gpio_i2c_read_ack(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* write End */</div><div class='del'>-	status = cx231xx_gpio_i2c_end(dev);</div><div class='add'>+	cx231xx_gpio_i2c_end(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* release the lock */</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;gpio_i2c_lock);</div><div class='head'>diff --git a/drivers/media/video/cx231xx/cx231xx-core.c b/drivers/media/video/cx231xx/cx231xx-core.c<br/>index 08dd930f882a..05358d486135 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx231xx/cx231xx-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx231xx/cx231xx-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx231xx/cx231xx-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx231xx/cx231xx-core.c</a></div><div class='hunk'>@@ -754,7 +754,7 @@ int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return errCode ? -EINVAL : 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cx231xx_set_mode);</div><div class='ctx'> </div><div class='hunk'>@@ -764,7 +764,7 @@ int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size)</div><div class='ctx'> 	int actlen, ret = -ENOMEM;</div><div class='ctx'> 	u32 *buffer;</div><div class='ctx'> </div><div class='del'>-buffer = kzalloc(4096, GFP_KERNEL);</div><div class='add'>+	buffer = kzalloc(4096, GFP_KERNEL);</div><div class='ctx'> 	if (buffer == NULL) {</div><div class='ctx'> 		cx231xx_info("out of mem\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -772,16 +772,16 @@ buffer = kzalloc(4096, GFP_KERNEL);</div><div class='ctx'> 	memcpy(&amp;buffer[0], firmware, 4096);</div><div class='ctx'> </div><div class='ctx'> 	ret = usb_bulk_msg(dev-&gt;udev, usb_sndbulkpipe(dev-&gt;udev, 5),</div><div class='del'>-				 buffer, 4096, &amp;actlen, 2000);</div><div class='add'>+			buffer, 4096, &amp;actlen, 2000);</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		cx231xx_info("bulk message failed: %d (%d/%d)", ret,</div><div class='del'>-				 size, actlen);</div><div class='add'>+				size, actlen);</div><div class='ctx'> 	else {</div><div class='ctx'> 		errCode = actlen != size ? -1 : 0;</div><div class='ctx'> 	}</div><div class='del'>-kfree(buffer);</div><div class='del'>-	return 0;</div><div class='add'>+	kfree(buffer);</div><div class='add'>+	return errCode;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************</div><div class='hunk'>@@ -797,7 +797,7 @@ static void cx231xx_isoc_irq_callback(struct urb *urb)</div><div class='ctx'> 	struct cx231xx_video_mode *vmode =</div><div class='ctx'> 	    container_of(dma_q, struct cx231xx_video_mode, vidq);</div><div class='ctx'> 	struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode);</div><div class='del'>-	int rc, i;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='ctx'> 	case 0:		/* success */</div><div class='hunk'>@@ -814,7 +814,7 @@ static void cx231xx_isoc_irq_callback(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	/* Copy data from URB */</div><div class='ctx'> 	spin_lock(&amp;dev-&gt;video_mode.slock);</div><div class='del'>-	rc = dev-&gt;video_mode.isoc_ctl.isoc_copy(dev, urb);</div><div class='add'>+	dev-&gt;video_mode.isoc_ctl.isoc_copy(dev, urb);</div><div class='ctx'> 	spin_unlock(&amp;dev-&gt;video_mode.slock);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset urb buffers */</div><div class='hunk'>@@ -822,7 +822,6 @@ static void cx231xx_isoc_irq_callback(struct urb *urb)</div><div class='ctx'> 		urb-&gt;iso_frame_desc[i].status = 0;</div><div class='ctx'> 		urb-&gt;iso_frame_desc[i].actual_length = 0;</div><div class='ctx'> 	}</div><div class='del'>-	urb-&gt;status = 0;</div><div class='ctx'> </div><div class='ctx'> 	urb-&gt;status = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (urb-&gt;status) {</div><div class='hunk'>@@ -843,7 +842,6 @@ static void cx231xx_bulk_irq_callback(struct urb *urb)</div><div class='ctx'> 	struct cx231xx_video_mode *vmode =</div><div class='ctx'> 	    container_of(dma_q, struct cx231xx_video_mode, vidq);</div><div class='ctx'> 	struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode);</div><div class='del'>-	int rc;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='ctx'> 	case 0:		/* success */</div><div class='hunk'>@@ -860,12 +858,10 @@ static void cx231xx_bulk_irq_callback(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	/* Copy data from URB */</div><div class='ctx'> 	spin_lock(&amp;dev-&gt;video_mode.slock);</div><div class='del'>-	rc = dev-&gt;video_mode.bulk_ctl.bulk_copy(dev, urb);</div><div class='add'>+	dev-&gt;video_mode.bulk_ctl.bulk_copy(dev, urb);</div><div class='ctx'> 	spin_unlock(&amp;dev-&gt;video_mode.slock);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset urb buffers */</div><div class='del'>-	urb-&gt;status = 0;</div><div class='del'>-</div><div class='ctx'> 	urb-&gt;status = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (urb-&gt;status) {</div><div class='ctx'> 		cx231xx_isocdbg("urb resubmit failed (error=%i)\n",</div><div class='hunk'>@@ -1231,42 +1227,40 @@ int cx231xx_init_bulk(struct cx231xx *dev, int max_packets,</div><div class='ctx'> EXPORT_SYMBOL_GPL(cx231xx_init_bulk);</div><div class='ctx'> void cx231xx_stop_TS1(struct cx231xx *dev)</div><div class='ctx'> {</div><div class='del'>-	int status = 0;</div><div class='ctx'> 	u8 val[4] = { 0, 0, 0, 0 };</div><div class='ctx'> </div><div class='del'>-			val[0] = 0x00;</div><div class='del'>-			val[1] = 0x03;</div><div class='del'>-			val[2] = 0x00;</div><div class='del'>-			val[3] = 0x00;</div><div class='del'>-			status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,</div><div class='del'>-				 TS_MODE_REG, val, 4);</div><div class='del'>-</div><div class='del'>-			val[0] = 0x00;</div><div class='del'>-			val[1] = 0x70;</div><div class='del'>-			val[2] = 0x04;</div><div class='del'>-			val[3] = 0x00;</div><div class='del'>-			status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,</div><div class='del'>-				 TS1_CFG_REG, val, 4);</div><div class='add'>+	val[0] = 0x00;</div><div class='add'>+	val[1] = 0x03;</div><div class='add'>+	val[2] = 0x00;</div><div class='add'>+	val[3] = 0x00;</div><div class='add'>+	cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,</div><div class='add'>+			TS_MODE_REG, val, 4);</div><div class='add'>+</div><div class='add'>+	val[0] = 0x00;</div><div class='add'>+	val[1] = 0x70;</div><div class='add'>+	val[2] = 0x04;</div><div class='add'>+	val[3] = 0x00;</div><div class='add'>+	cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,</div><div class='add'>+			TS1_CFG_REG, val, 4);</div><div class='ctx'> }</div><div class='ctx'> /* EXPORT_SYMBOL_GPL(cx231xx_stop_TS1); */</div><div class='ctx'> void cx231xx_start_TS1(struct cx231xx *dev)</div><div class='ctx'> {</div><div class='del'>-	int status = 0;</div><div class='ctx'> 	u8 val[4] = { 0, 0, 0, 0 };</div><div class='ctx'> </div><div class='del'>-			val[0] = 0x03;</div><div class='del'>-			val[1] = 0x03;</div><div class='del'>-			val[2] = 0x00;</div><div class='del'>-			val[3] = 0x00;</div><div class='del'>-			status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,</div><div class='del'>-				 TS_MODE_REG, val, 4);</div><div class='del'>-</div><div class='del'>-			val[0] = 0x04;</div><div class='del'>-			val[1] = 0xA3;</div><div class='del'>-			val[2] = 0x3B;</div><div class='del'>-			val[3] = 0x00;</div><div class='del'>-			status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,</div><div class='del'>-				 TS1_CFG_REG, val, 4);</div><div class='add'>+	val[0] = 0x03;</div><div class='add'>+	val[1] = 0x03;</div><div class='add'>+	val[2] = 0x00;</div><div class='add'>+	val[3] = 0x00;</div><div class='add'>+	cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,</div><div class='add'>+			TS_MODE_REG, val, 4);</div><div class='add'>+</div><div class='add'>+	val[0] = 0x04;</div><div class='add'>+	val[1] = 0xA3;</div><div class='add'>+	val[2] = 0x3B;</div><div class='add'>+	val[3] = 0x00;</div><div class='add'>+	cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,</div><div class='add'>+			TS1_CFG_REG, val, 4);</div><div class='ctx'> }</div><div class='ctx'> /* EXPORT_SYMBOL_GPL(cx231xx_start_TS1); */</div><div class='ctx'> /*****************************************************************</div><div class='head'>diff --git a/drivers/media/video/cx231xx/cx231xx-vbi.c b/drivers/media/video/cx231xx/cx231xx-vbi.c<br/>index 8cdee5f78f13..3d15314e1f88 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx231xx/cx231xx-vbi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx231xx/cx231xx-vbi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx231xx/cx231xx-vbi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx231xx/cx231xx-vbi.c</a></div><div class='hunk'>@@ -83,7 +83,6 @@ static inline void print_err_status(struct cx231xx *dev, int packet, int status)</div><div class='ctx'>  */</div><div class='ctx'> static inline int cx231xx_isoc_vbi_copy(struct cx231xx *dev, struct urb *urb)</div><div class='ctx'> {</div><div class='del'>-	struct cx231xx_buffer *buf;</div><div class='ctx'> 	struct cx231xx_dmaqueue *dma_q = urb-&gt;context;</div><div class='ctx'> 	int rc = 1;</div><div class='ctx'> 	unsigned char *p_buffer;</div><div class='hunk'>@@ -102,8 +101,6 @@ static inline int cx231xx_isoc_vbi_copy(struct cx231xx *dev, struct urb *urb)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	buf = dev-&gt;vbi_mode.bulk_ctl.buf;</div><div class='del'>-</div><div class='ctx'> 	/* get buffer pointer and length */</div><div class='ctx'> 	p_buffer = urb-&gt;transfer_buffer;</div><div class='ctx'> 	buffer_size = urb-&gt;actual_length;</div><div class='hunk'>@@ -310,7 +307,6 @@ static void cx231xx_irq_vbi_callback(struct urb *urb)</div><div class='ctx'> 	struct cx231xx_video_mode *vmode =</div><div class='ctx'> 	    container_of(dma_q, struct cx231xx_video_mode, vidq);</div><div class='ctx'> 	struct cx231xx *dev = container_of(vmode, struct cx231xx, vbi_mode);</div><div class='del'>-	int rc;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='ctx'> 	case 0:		/* success */</div><div class='hunk'>@@ -328,7 +324,7 @@ static void cx231xx_irq_vbi_callback(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	/* Copy data from URB */</div><div class='ctx'> 	spin_lock(&amp;dev-&gt;vbi_mode.slock);</div><div class='del'>-	rc = dev-&gt;vbi_mode.bulk_ctl.bulk_copy(dev, urb);</div><div class='add'>+	dev-&gt;vbi_mode.bulk_ctl.bulk_copy(dev, urb);</div><div class='ctx'> 	spin_unlock(&amp;dev-&gt;vbi_mode.slock);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset status */</div><div class='head'>diff --git a/drivers/media/video/cx231xx/cx231xx-video.c b/drivers/media/video/cx231xx/cx231xx-video.c<br/>index 7f916f0685e9..523aa49d6b86 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx231xx/cx231xx-video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx231xx/cx231xx-video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx231xx/cx231xx-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx231xx/cx231xx-video.c</a></div><div class='hunk'>@@ -326,9 +326,7 @@ static inline void get_next_buf(struct cx231xx_dmaqueue *dma_q,</div><div class='ctx'>  */</div><div class='ctx'> static inline int cx231xx_isoc_copy(struct cx231xx *dev, struct urb *urb)</div><div class='ctx'> {</div><div class='del'>-	struct cx231xx_buffer *buf;</div><div class='ctx'> 	struct cx231xx_dmaqueue *dma_q = urb-&gt;context;</div><div class='del'>-	unsigned char *outp = NULL;</div><div class='ctx'> 	int i, rc = 1;</div><div class='ctx'> 	unsigned char *p_buffer;</div><div class='ctx'> 	u32 bytes_parsed = 0, buffer_size = 0;</div><div class='hunk'>@@ -346,10 +344,6 @@ static inline int cx231xx_isoc_copy(struct cx231xx *dev, struct urb *urb)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	buf = dev-&gt;video_mode.isoc_ctl.buf;</div><div class='del'>-	if (buf != NULL)</div><div class='del'>-		outp = videobuf_to_vmalloc(&amp;buf-&gt;vb);</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; urb-&gt;number_of_packets; i++) {</div><div class='ctx'> 		int status = urb-&gt;iso_frame_desc[i].status;</div><div class='ctx'> </div><div class='hunk'>@@ -429,9 +423,7 @@ static inline int cx231xx_isoc_copy(struct cx231xx *dev, struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> static inline int cx231xx_bulk_copy(struct cx231xx *dev, struct urb *urb)</div><div class='ctx'> {</div><div class='del'>-	struct cx231xx_buffer *buf;</div><div class='ctx'> 	struct cx231xx_dmaqueue *dma_q = urb-&gt;context;</div><div class='del'>-	unsigned char *outp = NULL;</div><div class='ctx'> 	int rc = 1;</div><div class='ctx'> 	unsigned char *p_buffer;</div><div class='ctx'> 	u32 bytes_parsed = 0, buffer_size = 0;</div><div class='hunk'>@@ -449,10 +441,6 @@ static inline int cx231xx_bulk_copy(struct cx231xx *dev, struct urb *urb)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	buf = dev-&gt;video_mode.bulk_ctl.buf;</div><div class='del'>-	if (buf != NULL)</div><div class='del'>-		outp = videobuf_to_vmalloc(&amp;buf-&gt;vb);</div><div class='del'>-</div><div class='ctx'> 	if (1) {</div><div class='ctx'> </div><div class='ctx'> 		/*  get buffer pointer and length */</div><div class='hunk'>@@ -701,13 +689,9 @@ void cx231xx_reset_video_buffer(struct cx231xx *dev,</div><div class='ctx'> 		buf = dev-&gt;video_mode.bulk_ctl.buf;</div><div class='ctx'> </div><div class='ctx'> 	if (buf == NULL) {</div><div class='del'>-		u8 *outp = NULL;</div><div class='ctx'> 		/* first try to get the buffer */</div><div class='ctx'> 		get_next_buf(dma_q, &amp;buf);</div><div class='ctx'> </div><div class='del'>-		if (buf)</div><div class='del'>-			outp = videobuf_to_vmalloc(&amp;buf-&gt;vb);</div><div class='del'>-</div><div class='ctx'> 		dma_q-&gt;pos = 0;</div><div class='ctx'> 		dma_q-&gt;field1_done = 0;</div><div class='ctx'> 		dma_q-&gt;current_field = -1;</div><div class='hunk'>@@ -2561,6 +2545,10 @@ static struct video_device *cx231xx_vdev_init(struct cx231xx *dev,</div><div class='ctx'> 	vfd-&gt;release = video_device_release;</div><div class='ctx'> 	vfd-&gt;debug = video_debug;</div><div class='ctx'> 	vfd-&gt;lock = &amp;dev-&gt;lock;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vfd-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	snprintf(vfd-&gt;name, sizeof(vfd-&gt;name), "%s %s", dev-&gt;name, type_name);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/cx23885/cx23885-cards.c b/drivers/media/video/cx23885/cx23885-cards.c<br/>index 19b5499d2624..13739e002a63 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx23885/cx23885-cards.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx23885/cx23885-cards.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx23885/cx23885-cards.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx23885/cx23885-cards.c</a></div><div class='hunk'>@@ -497,6 +497,10 @@ struct cx23885_board cx23885_boards[] = {</div><div class='ctx'> 		.name		= "TerraTec Cinergy T PCIe Dual",</div><div class='ctx'> 		.portb		= CX23885_MPEG_DVB,</div><div class='ctx'> 		.portc		= CX23885_MPEG_DVB,</div><div class='add'>+	},</div><div class='add'>+	[CX23885_BOARD_TEVII_S471] = {</div><div class='add'>+		.name		= "TeVii S471",</div><div class='add'>+		.portb		= CX23885_MPEG_DVB,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);</div><div class='hunk'>@@ -705,6 +709,10 @@ struct cx23885_subid cx23885_subids[] = {</div><div class='ctx'> 		.subvendor = 0x153b,</div><div class='ctx'> 		.subdevice = 0x117e,</div><div class='ctx'> 		.card      = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,</div><div class='add'>+	}, {</div><div class='add'>+		.subvendor = 0xd471,</div><div class='add'>+		.subdevice = 0x9022,</div><div class='add'>+		.card      = CX23885_BOARD_TEVII_S471,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);</div><div class='hunk'>@@ -1460,6 +1468,7 @@ void cx23885_card_setup(struct cx23885_dev *dev)</div><div class='ctx'> 		ts1-&gt;src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CX23885_BOARD_TEVII_S470:</div><div class='add'>+	case CX23885_BOARD_TEVII_S471:</div><div class='ctx'> 	case CX23885_BOARD_DVBWORLD_2005:</div><div class='ctx'> 		ts1-&gt;gen_ctrl_val  = 0x5; /* Parallel */</div><div class='ctx'> 		ts1-&gt;ts_clk_en_val = 0x1; /* Enable TS_CLK */</div><div class='head'>diff --git a/drivers/media/video/cx23885/cx23885-core.c b/drivers/media/video/cx23885/cx23885-core.c<br/>index 6ad227029a0f..697728f09430 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx23885/cx23885-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx23885/cx23885-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx23885/cx23885-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx23885/cx23885-core.c</a></div><div class='hunk'>@@ -1046,6 +1046,13 @@ static int cx23885_dev_setup(struct cx23885_dev *dev)</div><div class='ctx'> 	if (cx23885_boards[dev-&gt;board].ci_type &gt; 0)</div><div class='ctx'> 		cx_clear(RDR_RDRCTL1, 1 &lt;&lt; 8);</div><div class='ctx'> </div><div class='add'>+	switch (dev-&gt;board) {</div><div class='add'>+	case CX23885_BOARD_TEVII_S470:</div><div class='add'>+	case CX23885_BOARD_TEVII_S471:</div><div class='add'>+		cx_clear(RDR_RDRCTL1, 1 &lt;&lt; 8);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/cx23885/cx23885-dvb.c b/drivers/media/video/cx23885/cx23885-dvb.c<br/>index 6835eb1fc093..a80a92c47455 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx23885/cx23885-dvb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx23885/cx23885-dvb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx23885/cx23885-dvb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx23885/cx23885-dvb.c</a></div><div class='hunk'>@@ -1173,6 +1173,13 @@ static int dvb_register(struct cx23885_tsport *port)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case CX23885_BOARD_TEVII_S471:</div><div class='add'>+		i2c_bus = &amp;dev-&gt;i2c_bus[1];</div><div class='add'>+</div><div class='add'>+		fe0-&gt;dvb.frontend = dvb_attach(ds3000_attach,</div><div class='add'>+					&amp;tevii_ds3000_config,</div><div class='add'>+					&amp;i2c_bus-&gt;i2c_adap);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "</div><div class='ctx'> 			" isn't supported yet\n",</div><div class='head'>diff --git a/drivers/media/video/cx23885/cx23885.h b/drivers/media/video/cx23885/cx23885.h<br/>index f020f0568df4..d884784a1c85 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx23885/cx23885.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx23885/cx23885.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx23885/cx23885.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx23885/cx23885.h</a></div><div class='hunk'>@@ -89,6 +89,7 @@</div><div class='ctx'> #define CX23885_BOARD_MPX885                   32</div><div class='ctx'> #define CX23885_BOARD_MYGICA_X8507             33</div><div class='ctx'> #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34</div><div class='add'>+#define CX23885_BOARD_TEVII_S471               35</div><div class='ctx'> </div><div class='ctx'> #define GPIO_0 0x00000001</div><div class='ctx'> #define GPIO_1 0x00000002</div><div class='head'>diff --git a/drivers/media/video/cx23885/cx23888-ir.c b/drivers/media/video/cx23885/cx23888-ir.c<br/>index bb1ce346425d..c2bc39c58f82 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx23885/cx23888-ir.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx23885/cx23888-ir.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx23885/cx23888-ir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx23885/cx23888-ir.c</a></div><div class='hunk'>@@ -331,9 +331,7 @@ static u64 ns_to_pulse_clocks(u32 ns)</div><div class='ctx'> </div><div class='ctx'> static u16 pulse_clocks_to_clock_divider(u64 count)</div><div class='ctx'> {</div><div class='del'>-	u32 rem;</div><div class='del'>-</div><div class='del'>-	rem = do_div(count, (FIFO_RXTX &lt;&lt; 2) | 0x3);</div><div class='add'>+	do_div(count, (FIFO_RXTX &lt;&lt; 2) | 0x3);</div><div class='ctx'> </div><div class='ctx'> 	/* net result needs to be rounded down and decremented by 1 */</div><div class='ctx'> 	if (count &gt; RXCLK_RCD + 1)</div><div class='head'>diff --git a/drivers/media/video/cx25821/cx25821-alsa.c b/drivers/media/video/cx25821/cx25821-alsa.c<br/>index 03cfac476b03..1858a45dd081 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-alsa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx25821/cx25821-alsa.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-alsa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-alsa.c</a></div><div class='hunk'>@@ -290,11 +290,9 @@ static irqreturn_t cx25821_irq(int irq, void *dev_id)</div><div class='ctx'> 	u32 status, pci_status;</div><div class='ctx'> 	u32 audint_status, audint_mask;</div><div class='ctx'> 	int loop, handled = 0;</div><div class='del'>-	int audint_count = 0;</div><div class='ctx'> </div><div class='ctx'> 	audint_status = cx_read(AUD_A_INT_STAT);</div><div class='ctx'> 	audint_mask = cx_read(AUD_A_INT_MSK);</div><div class='del'>-	audint_count = cx_read(AUD_A_GPCNT);</div><div class='ctx'> 	status = cx_read(PCI_INT_STAT);</div><div class='ctx'> </div><div class='ctx'> 	for (loop = 0; loop &lt; 1; loop++) {</div><div class='head'>diff --git a/drivers/media/video/cx25821/cx25821-audio-upstream.c b/drivers/media/video/cx25821/cx25821-audio-upstream.c<br/>index 20c7ca3351a8..8b2a99975c23 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-audio-upstream.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx25821/cx25821-audio-upstream.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-audio-upstream.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-audio-upstream.c</a></div><div class='hunk'>@@ -585,7 +585,7 @@ int cx25821_audio_upstream_irq(struct cx25821_dev *dev, int chan_num,</div><div class='ctx'> static irqreturn_t cx25821_upstream_irq_audio(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct cx25821_dev *dev = dev_id;</div><div class='del'>-	u32 msk_stat, audio_status;</div><div class='add'>+	u32 audio_status;</div><div class='ctx'> 	int handled = 0;</div><div class='ctx'> 	struct sram_channel *sram_ch;</div><div class='ctx'> </div><div class='hunk'>@@ -594,7 +594,6 @@ static irqreturn_t cx25821_upstream_irq_audio(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	sram_ch = dev-&gt;channels[dev-&gt;_audio_upstream_channel].sram_channels;</div><div class='ctx'> </div><div class='del'>-	msk_stat = cx_read(sram_ch-&gt;int_mstat);</div><div class='ctx'> 	audio_status = cx_read(sram_ch-&gt;int_stat);</div><div class='ctx'> </div><div class='ctx'> 	/* Only deal with our interrupt */</div><div class='head'>diff --git a/drivers/media/video/cx25821/cx25821-core.c b/drivers/media/video/cx25821/cx25821-core.c<br/>index 7930ca58349f..83c1aa6b2e6c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx25821/cx25821-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-core.c</a></div><div class='hunk'>@@ -379,14 +379,6 @@ static inline int i2c_slave_did_ack(struct i2c_adapter *i2c_adap)</div><div class='ctx'> 	return cx_read(bus-&gt;reg_stat) &amp; 0x01;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void cx_i2c_read_print(struct cx25821_dev *dev, u32 reg, const char *reg_string)</div><div class='del'>-{</div><div class='del'>-	int tmp = 0;</div><div class='del'>-	u32 value = 0;</div><div class='del'>-</div><div class='del'>-	value = cx25821_i2c_read(&amp;dev-&gt;i2c_bus[0], reg, &amp;tmp);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void cx25821_registers_init(struct cx25821_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tmp;</div><div class='hunk'>@@ -895,7 +887,7 @@ static void cx25821_iounmap(struct cx25821_dev *dev)</div><div class='ctx'> </div><div class='ctx'> static int cx25821_dev_setup(struct cx25821_dev *dev)</div><div class='ctx'> {</div><div class='del'>-	int io_size = 0, i;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	pr_info("\n***********************************\n");</div><div class='ctx'> 	pr_info("cx25821 set up\n");</div><div class='hunk'>@@ -960,7 +952,6 @@ static int cx25821_dev_setup(struct cx25821_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* PCIe stuff */</div><div class='ctx'> 	dev-&gt;base_io_addr = pci_resource_start(dev-&gt;pci, 0);</div><div class='del'>-	io_size = pci_resource_len(dev-&gt;pci, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (!dev-&gt;base_io_addr) {</div><div class='ctx'> 		CX25821_ERR("No PCI Memory resources, exiting!\n");</div><div class='hunk'>@@ -1317,13 +1308,12 @@ void cx25821_free_buffer(struct videobuf_queue *q, struct cx25821_buffer *buf)</div><div class='ctx'> static irqreturn_t cx25821_irq(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct cx25821_dev *dev = dev_id;</div><div class='del'>-	u32 pci_status, pci_mask;</div><div class='add'>+	u32 pci_status;</div><div class='ctx'> 	u32 vid_status;</div><div class='ctx'> 	int i, handled = 0;</div><div class='ctx'> 	u32 mask[8] = { 1, 2, 4, 8, 16, 32, 64, 128 };</div><div class='ctx'> </div><div class='ctx'> 	pci_status = cx_read(PCI_INT_STAT);</div><div class='del'>-	pci_mask = cx_read(PCI_INT_MSK);</div><div class='ctx'> </div><div class='ctx'> 	if (pci_status == 0)</div><div class='ctx'> 		goto out;</div><div class='head'>diff --git a/drivers/media/video/cx25821/cx25821-i2c.c b/drivers/media/video/cx25821/cx25821-i2c.c<br/>index 12d7300fa1e9..6311180f430c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx25821/cx25821-i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-i2c.c</a></div><div class='hunk'>@@ -361,7 +361,6 @@ void cx25821_av_clk(struct cx25821_dev *dev, int enable)</div><div class='ctx'> int cx25821_i2c_read(struct cx25821_i2c *bus, u16 reg_addr, int *value)</div><div class='ctx'> {</div><div class='ctx'> 	struct i2c_client *client = &amp;bus-&gt;i2c_client;</div><div class='del'>-	int retval = 0;</div><div class='ctx'> 	int v = 0;</div><div class='ctx'> 	u8 addr[2] = { 0, 0 };</div><div class='ctx'> 	u8 buf[4] = { 0, 0, 0, 0 };</div><div class='hunk'>@@ -385,7 +384,7 @@ int cx25821_i2c_read(struct cx25821_i2c *bus, u16 reg_addr, int *value)</div><div class='ctx'> 	msgs[0].addr = 0x44;</div><div class='ctx'> 	msgs[1].addr = 0x44;</div><div class='ctx'> </div><div class='del'>-	retval = i2c_xfer(client-&gt;adapter, msgs, 2);</div><div class='add'>+	i2c_xfer(client-&gt;adapter, msgs, 2);</div><div class='ctx'> </div><div class='ctx'> 	v = (buf[3] &lt;&lt; 24) | (buf[2] &lt;&lt; 16) | (buf[1] &lt;&lt; 8) | buf[0];</div><div class='ctx'> 	*value = v;</div><div class='head'>diff --git a/drivers/media/video/cx25821/cx25821-medusa-video.c b/drivers/media/video/cx25821/cx25821-medusa-video.c<br/>index 298a68d98c2f..313fb20a0b47 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-medusa-video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx25821/cx25821-medusa-video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-medusa-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-medusa-video.c</a></div><div class='hunk'>@@ -35,7 +35,6 @@</div><div class='ctx'> static void medusa_enable_bluefield_output(struct cx25821_dev *dev, int channel,</div><div class='ctx'> 					   int enable)</div><div class='ctx'> {</div><div class='del'>-	int ret_val = 1;</div><div class='ctx'> 	u32 value = 0;</div><div class='ctx'> 	u32 tmp = 0;</div><div class='ctx'> 	int out_ctrl = OUT_CTRL1;</div><div class='hunk'>@@ -79,13 +78,13 @@ static void medusa_enable_bluefield_output(struct cx25821_dev *dev, int channel,</div><div class='ctx'> 	value &amp;= 0xFFFFFF7F;	/* clear BLUE_FIELD_EN */</div><div class='ctx'> 	if (enable)</div><div class='ctx'> 		value |= 0x00000080;	/* set BLUE_FIELD_EN */</div><div class='del'>-	ret_val = cx25821_i2c_write(&amp;dev-&gt;i2c_bus[0], out_ctrl, value);</div><div class='add'>+	cx25821_i2c_write(&amp;dev-&gt;i2c_bus[0], out_ctrl, value);</div><div class='ctx'> </div><div class='ctx'> 	value = cx25821_i2c_read(&amp;dev-&gt;i2c_bus[0], out_ctrl_ns, &amp;tmp);</div><div class='ctx'> 	value &amp;= 0xFFFFFF7F;</div><div class='ctx'> 	if (enable)</div><div class='ctx'> 		value |= 0x00000080;	/* set BLUE_FIELD_EN */</div><div class='del'>-	ret_val = cx25821_i2c_write(&amp;dev-&gt;i2c_bus[0], out_ctrl_ns, value);</div><div class='add'>+	cx25821_i2c_write(&amp;dev-&gt;i2c_bus[0], out_ctrl_ns, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int medusa_initialize_ntsc(struct cx25821_dev *dev)</div><div class='hunk'>@@ -431,7 +430,6 @@ void medusa_set_resolution(struct cx25821_dev *dev, int width,</div><div class='ctx'> {</div><div class='ctx'> 	int decoder = 0;</div><div class='ctx'> 	int decoder_count = 0;</div><div class='del'>-	int ret_val = 0;</div><div class='ctx'> 	u32 hscale = 0x0;</div><div class='ctx'> 	u32 vscale = 0x0;</div><div class='ctx'> 	const int MAX_WIDTH = 720;</div><div class='hunk'>@@ -482,9 +480,9 @@ void medusa_set_resolution(struct cx25821_dev *dev, int width,</div><div class='ctx'> </div><div class='ctx'> 	for (; decoder &lt; decoder_count; decoder++) {</div><div class='ctx'> 		/* write scaling values for each decoder */</div><div class='del'>-		ret_val = cx25821_i2c_write(&amp;dev-&gt;i2c_bus[0],</div><div class='add'>+		cx25821_i2c_write(&amp;dev-&gt;i2c_bus[0],</div><div class='ctx'> 				HSCALE_CTRL + (0x200 * decoder), hscale);</div><div class='del'>-		ret_val = cx25821_i2c_write(&amp;dev-&gt;i2c_bus[0],</div><div class='add'>+		cx25821_i2c_write(&amp;dev-&gt;i2c_bus[0],</div><div class='ctx'> 				VSCALE_CTRL + (0x200 * decoder), vscale);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -494,7 +492,6 @@ void medusa_set_resolution(struct cx25821_dev *dev, int width,</div><div class='ctx'> static void medusa_set_decoderduration(struct cx25821_dev *dev, int decoder,</div><div class='ctx'> 				       int duration)</div><div class='ctx'> {</div><div class='del'>-	int ret_val = 0;</div><div class='ctx'> 	u32 fld_cnt = 0;</div><div class='ctx'> 	u32 tmp = 0;</div><div class='ctx'> 	u32 disp_cnt_reg = DISP_AB_CNT;</div><div class='hunk'>@@ -537,7 +534,7 @@ static void medusa_set_decoderduration(struct cx25821_dev *dev, int decoder,</div><div class='ctx'> 		fld_cnt |= ((u32) duration) &lt;&lt; 16;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret_val = cx25821_i2c_write(&amp;dev-&gt;i2c_bus[0], disp_cnt_reg, fld_cnt);</div><div class='add'>+	cx25821_i2c_write(&amp;dev-&gt;i2c_bus[0], disp_cnt_reg, fld_cnt);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;lock);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/media/video/cx25821/cx25821-video-upstream-ch2.c b/drivers/media/video/cx25821/cx25821-video-upstream-ch2.c<br/>index 5a157cf4a95e..c8c94fbf5d8d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-video-upstream-ch2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx25821/cx25821-video-upstream-ch2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-video-upstream-ch2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-video-upstream-ch2.c</a></div><div class='hunk'>@@ -587,7 +587,7 @@ int cx25821_video_upstream_irq_ch2(struct cx25821_dev *dev, int chan_num,</div><div class='ctx'> static irqreturn_t cx25821_upstream_irq_ch2(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct cx25821_dev *dev = dev_id;</div><div class='del'>-	u32 msk_stat, vid_status;</div><div class='add'>+	u32 vid_status;</div><div class='ctx'> 	int handled = 0;</div><div class='ctx'> 	int channel_num = 0;</div><div class='ctx'> 	struct sram_channel *sram_ch;</div><div class='hunk'>@@ -598,7 +598,6 @@ static irqreturn_t cx25821_upstream_irq_ch2(int irq, void *dev_id)</div><div class='ctx'> 	channel_num = VID_UPSTREAM_SRAM_CHANNEL_J;</div><div class='ctx'> 	sram_ch = dev-&gt;channels[channel_num].sram_channels;</div><div class='ctx'> </div><div class='del'>-	msk_stat = cx_read(sram_ch-&gt;int_mstat);</div><div class='ctx'> 	vid_status = cx_read(sram_ch-&gt;int_stat);</div><div class='ctx'> </div><div class='ctx'> 	/* Only deal with our interrupt */</div><div class='head'>diff --git a/drivers/media/video/cx25821/cx25821-video-upstream.c b/drivers/media/video/cx25821/cx25821-video-upstream.c<br/>index 21e7d657f049..52c13e0b6492 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-video-upstream.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx25821/cx25821-video-upstream.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-video-upstream.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-video-upstream.c</a></div><div class='hunk'>@@ -637,7 +637,7 @@ int cx25821_video_upstream_irq(struct cx25821_dev *dev, int chan_num,</div><div class='ctx'> static irqreturn_t cx25821_upstream_irq(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct cx25821_dev *dev = dev_id;</div><div class='del'>-	u32 msk_stat, vid_status;</div><div class='add'>+	u32 vid_status;</div><div class='ctx'> 	int handled = 0;</div><div class='ctx'> 	int channel_num = 0;</div><div class='ctx'> 	struct sram_channel *sram_ch;</div><div class='hunk'>@@ -649,7 +649,6 @@ static irqreturn_t cx25821_upstream_irq(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	sram_ch = dev-&gt;channels[channel_num].sram_channels;</div><div class='ctx'> </div><div class='del'>-	msk_stat = cx_read(sram_ch-&gt;int_mstat);</div><div class='ctx'> 	vid_status = cx_read(sram_ch-&gt;int_stat);</div><div class='ctx'> </div><div class='ctx'> 	/* Only deal with our interrupt */</div><div class='head'>diff --git a/drivers/media/video/cx25821/cx25821-video.c b/drivers/media/video/cx25821/cx25821-video.c<br/>index ffd8bc79c02e..b38d4379cc36 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx25821/cx25821-video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-video.c</a></div><div class='hunk'>@@ -109,25 +109,6 @@ struct cx25821_fmt *cx25821_format_by_fourcc(unsigned int fourcc)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void cx25821_dump_video_queue(struct cx25821_dev *dev,</div><div class='del'>-			      struct cx25821_dmaqueue *q)</div><div class='del'>-{</div><div class='del'>-	struct cx25821_buffer *buf;</div><div class='del'>-	struct list_head *item;</div><div class='del'>-	dprintk(1, "%s()\n", __func__);</div><div class='del'>-</div><div class='del'>-	if (!list_empty(&amp;q-&gt;active)) {</div><div class='del'>-		list_for_each(item, &amp;q-&gt;active)</div><div class='del'>-			buf = list_entry(item, struct cx25821_buffer, vb.queue);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!list_empty(&amp;q-&gt;queued)) {</div><div class='del'>-		list_for_each(item, &amp;q-&gt;queued)</div><div class='del'>-			buf = list_entry(item, struct cx25821_buffer, vb.queue);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void cx25821_video_wakeup(struct cx25821_dev *dev, struct cx25821_dmaqueue *q,</div><div class='ctx'> 			  u32 count)</div><div class='ctx'> {</div><div class='hunk'>@@ -557,7 +538,7 @@ int cx25821_buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,</div><div class='ctx'> 	struct cx25821_buffer *buf =</div><div class='ctx'> 		container_of(vb, struct cx25821_buffer, vb);</div><div class='ctx'> 	int rc, init_buffer = 0;</div><div class='del'>-	u32 line0_offset, line1_offset;</div><div class='add'>+	u32 line0_offset;</div><div class='ctx'> 	struct videobuf_dmabuf *dma = videobuf_to_dma(&amp;buf-&gt;vb);</div><div class='ctx'> 	int bpl_local = LINE_SIZE_D1;</div><div class='ctx'> 	int channel_opened = fh-&gt;channel_id;</div><div class='hunk'>@@ -639,7 +620,6 @@ int cx25821_buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,</div><div class='ctx'> 		case V4L2_FIELD_INTERLACED:</div><div class='ctx'> 			/* All other formats are top field first */</div><div class='ctx'> 			line0_offset = 0;</div><div class='del'>-			line1_offset = buf-&gt;bpl;</div><div class='ctx'> 			dprintk(1, "top field first\n");</div><div class='ctx'> </div><div class='ctx'> 			cx25821_risc_buffer(dev-&gt;pci, &amp;buf-&gt;risc,</div><div class='hunk'>@@ -1830,7 +1810,6 @@ static long video_ioctl_set(struct file *file, unsigned int cmd,</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> 	int cif_enable = 0;</div><div class='ctx'> 	int cif_width = 0;</div><div class='del'>-	u32 value = 0;</div><div class='ctx'> </div><div class='ctx'> 	data_from_user = (struct downstream_user_struct *)arg;</div><div class='ctx'> </div><div class='hunk'>@@ -1914,7 +1893,7 @@ static long video_ioctl_set(struct file *file, unsigned int cmd,</div><div class='ctx'> 		cx_write(data_from_user-&gt;reg_address, data_from_user-&gt;reg_data);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MEDUSA_READ:</div><div class='del'>-		value = cx25821_i2c_read(&amp;dev-&gt;i2c_bus[0],</div><div class='add'>+		cx25821_i2c_read(&amp;dev-&gt;i2c_bus[0],</div><div class='ctx'> 					 (u16) data_from_user-&gt;reg_address,</div><div class='ctx'> 					 &amp;data_from_user-&gt;reg_data);</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/media/video/cx25821/cx25821-video.h b/drivers/media/video/cx25821/cx25821-video.h<br/>index d0d9538ca5b3..9652a5e35ba2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-video.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx25821/cx25821-video.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx25821/cx25821-video.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25821/cx25821-video.h</a></div><div class='hunk'>@@ -86,8 +86,6 @@ extern struct cx25821_fmt formats[];</div><div class='ctx'> extern struct cx25821_fmt *cx25821_format_by_fourcc(unsigned int fourcc);</div><div class='ctx'> extern struct cx25821_data timeout_data[MAX_VID_CHANNEL_NUM];</div><div class='ctx'> </div><div class='del'>-extern void cx25821_dump_video_queue(struct cx25821_dev *dev,</div><div class='del'>-				     struct cx25821_dmaqueue *q);</div><div class='ctx'> extern void cx25821_video_wakeup(struct cx25821_dev *dev,</div><div class='ctx'> 				 struct cx25821_dmaqueue *q, u32 count);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/cx25840/cx25840-ir.c b/drivers/media/video/cx25840/cx25840-ir.c<br/>index 13c380ebb562..38ce76ed1924 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/cx25840/cx25840-ir.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/cx25840/cx25840-ir.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/cx25840/cx25840-ir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/cx25840/cx25840-ir.c</a></div><div class='hunk'>@@ -316,9 +316,7 @@ static u64 ns_to_pulse_clocks(u32 ns)</div><div class='ctx'> </div><div class='ctx'> static u16 pulse_clocks_to_clock_divider(u64 count)</div><div class='ctx'> {</div><div class='del'>-	u32 rem;</div><div class='del'>-</div><div class='del'>-	rem = do_div(count, (FIFO_RXTX &lt;&lt; 2) | 0x3);</div><div class='add'>+	do_div(count, (FIFO_RXTX &lt;&lt; 2) | 0x3);</div><div class='ctx'> </div><div class='ctx'> 	/* net result needs to be rounded down and decremented by 1 */</div><div class='ctx'> 	if (count &gt; RXCLK_RCD + 1)</div><div class='hunk'>@@ -860,12 +858,10 @@ static int cx25840_ir_tx_write(struct v4l2_subdev *sd, u8 *buf, size_t count,</div><div class='ctx'> 			       ssize_t *num)</div><div class='ctx'> {</div><div class='ctx'> 	struct cx25840_ir_state *ir_state = to_ir_state(sd);</div><div class='del'>-	struct i2c_client *c;</div><div class='ctx'> </div><div class='ctx'> 	if (ir_state == NULL)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	c = ir_state-&gt;c;</div><div class='ctx'> #if 0</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * FIXME - the code below is an incomplete and untested sketch of what</div><div class='head'>diff --git a/drivers/media/video/davinci/Kconfig b/drivers/media/video/davinci/Kconfig<br/>index 60a456ebdc7c..9337b5605c90 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/davinci/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/davinci/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/davinci/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/davinci/Kconfig</a></div><div class='hunk'>@@ -40,6 +40,7 @@ config VIDEO_VPSS_SYSTEM</div><div class='ctx'> config VIDEO_VPFE_CAPTURE</div><div class='ctx'> 	tristate "VPFE Video Capture Driver"</div><div class='ctx'> 	depends on VIDEO_V4L2 &amp;&amp; (ARCH_DAVINCI || ARCH_OMAP3)</div><div class='add'>+	depends on I2C</div><div class='ctx'> 	select VIDEOBUF_DMA_CONTIG</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for DMx/AMx VPFE based frame grabber. This is the</div><div class='head'>diff --git a/drivers/media/video/davinci/vpbe_display.c b/drivers/media/video/davinci/vpbe_display.c<br/>index 1f3b1c729252..e106b72810a9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/davinci/vpbe_display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/davinci/vpbe_display.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/davinci/vpbe_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/davinci/vpbe_display.c</a></div><div class='hunk'>@@ -1618,6 +1618,10 @@ static __devinit int init_vpbe_layer(int i, struct vpbe_display *disp_dev,</div><div class='ctx'> 	vbd-&gt;ioctl_ops	= &amp;vpbe_ioctl_ops;</div><div class='ctx'> 	vbd-&gt;minor	= -1;</div><div class='ctx'> 	vbd-&gt;v4l2_dev   = &amp;disp_dev-&gt;vpbe_dev-&gt;v4l2_dev;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vbd-&gt;flags);</div><div class='ctx'> 	vbd-&gt;lock	= &amp;vpbe_display_layer-&gt;opslock;</div><div class='ctx'> </div><div class='ctx'> 	if (disp_dev-&gt;vpbe_dev-&gt;current_timings.timings_type &amp;</div><div class='head'>diff --git a/drivers/media/video/davinci/vpfe_capture.c b/drivers/media/video/davinci/vpfe_capture.c<br/>index 20cf271a774b..49a845fb804a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/davinci/vpfe_capture.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/davinci/vpfe_capture.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/davinci/vpfe_capture.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/davinci/vpfe_capture.c</a></div><div class='hunk'>@@ -1761,7 +1761,7 @@ static long vpfe_param_handler(struct file *file, void *priv,</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='add'>+		ret = -ENOTTY;</div><div class='ctx'> 	}</div><div class='ctx'> unlock_out:</div><div class='ctx'> 	mutex_unlock(&amp;vpfe_dev-&gt;lock);</div><div class='head'>diff --git a/drivers/media/video/davinci/vpif_capture.c b/drivers/media/video/davinci/vpif_capture.c<br/>index 6504e40a31dd..96046957bf21 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/davinci/vpif_capture.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/davinci/vpif_capture.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/davinci/vpif_capture.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/davinci/vpif_capture.c</a></div><div class='hunk'>@@ -2228,6 +2228,10 @@ static __init int vpif_probe(struct platform_device *pdev)</div><div class='ctx'> 		common = &amp;(ch-&gt;common[VPIF_VIDEO_INDEX]);</div><div class='ctx'> 		spin_lock_init(&amp;common-&gt;irqlock);</div><div class='ctx'> 		mutex_init(&amp;common-&gt;lock);</div><div class='add'>+		/* Locking in file operations other than ioctl should be done</div><div class='add'>+		   by the driver, not the V4L2 core.</div><div class='add'>+		   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+		set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;ch-&gt;video_dev-&gt;flags);</div><div class='ctx'> 		ch-&gt;video_dev-&gt;lock = &amp;common-&gt;lock;</div><div class='ctx'> 		/* Initialize prio member of channel object */</div><div class='ctx'> 		v4l2_prio_init(&amp;ch-&gt;prio);</div><div class='head'>diff --git a/drivers/media/video/davinci/vpif_display.c b/drivers/media/video/davinci/vpif_display.c<br/>index 7fa34b4fae26..e6488ee7db18 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/davinci/vpif_display.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/davinci/vpif_display.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/davinci/vpif_display.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/davinci/vpif_display.c</a></div><div class='hunk'>@@ -1778,6 +1778,10 @@ static __init int vpif_probe(struct platform_device *pdev)</div><div class='ctx'> 		v4l2_prio_init(&amp;ch-&gt;prio);</div><div class='ctx'> 		ch-&gt;common[VPIF_VIDEO_INDEX].fmt.type =</div><div class='ctx'> 						V4L2_BUF_TYPE_VIDEO_OUTPUT;</div><div class='add'>+		/* Locking in file operations other than ioctl should be done</div><div class='add'>+		   by the driver, not the V4L2 core.</div><div class='add'>+		   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+		set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;ch-&gt;video_dev-&gt;flags);</div><div class='ctx'> 		ch-&gt;video_dev-&gt;lock = &amp;common-&gt;lock;</div><div class='ctx'> </div><div class='ctx'> 		/* register video device */</div><div class='head'>diff --git a/drivers/media/video/em28xx/Kconfig b/drivers/media/video/em28xx/Kconfig<br/>index f6f622e123bd..928ef0d0429f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/em28xx/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/em28xx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/em28xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/Kconfig</a></div><div class='hunk'>@@ -49,10 +49,10 @@ config VIDEO_EM28XX_DVB</div><div class='ctx'> 	  Empiatech em28xx chips.</div><div class='ctx'> </div><div class='ctx'> config VIDEO_EM28XX_RC</div><div class='del'>-        bool "EM28XX Remote Controller support"</div><div class='add'>+        tristate "EM28XX Remote Controller support"</div><div class='ctx'>         depends on RC_CORE</div><div class='ctx'>         depends on VIDEO_EM28XX</div><div class='ctx'>         depends on !(RC_CORE=m &amp;&amp; VIDEO_EM28XX=y)</div><div class='del'>-        default y</div><div class='add'>+        default VIDEO_EM28XX</div><div class='ctx'>         ---help---</div><div class='ctx'>           Enables Remote Controller support on em28xx driver.</div><div class='head'>diff --git a/drivers/media/video/em28xx/Makefile b/drivers/media/video/em28xx/Makefile<br/>index 2abdf76c5203..c8b338d4be05 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/em28xx/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/em28xx/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/em28xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/Makefile</a></div><div class='hunk'>@@ -1,16 +1,15 @@</div><div class='ctx'> em28xx-y :=	em28xx-video.o em28xx-i2c.o em28xx-cards.o</div><div class='ctx'> em28xx-y +=	em28xx-core.o  em28xx-vbi.o</div><div class='ctx'> </div><div class='del'>-em28xx-$(CONFIG_VIDEO_EM28XX_RC) += em28xx-input.o</div><div class='del'>-</div><div class='ctx'> em28xx-alsa-objs := em28xx-audio.o</div><div class='add'>+em28xx-rc-objs := em28xx-input.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_VIDEO_EM28XX) += em28xx.o</div><div class='ctx'> obj-$(CONFIG_VIDEO_EM28XX_ALSA) += em28xx-alsa.o</div><div class='ctx'> obj-$(CONFIG_VIDEO_EM28XX_DVB) += em28xx-dvb.o</div><div class='add'>+obj-$(CONFIG_VIDEO_EM28XX_RC) += em28xx-rc.o</div><div class='ctx'> </div><div class='ctx'> ccflags-y += -Idrivers/media/video</div><div class='ctx'> ccflags-y += -Idrivers/media/common/tuners</div><div class='ctx'> ccflags-y += -Idrivers/media/dvb/dvb-core</div><div class='ctx'> ccflags-y += -Idrivers/media/dvb/frontends</div><div class='del'>-</div><div class='head'>diff --git a/drivers/media/video/em28xx/em28xx-audio.c b/drivers/media/video/em28xx/em28xx-audio.c<br/>index e2a7b77c39c7..d7e2a3dc5525 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-audio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/em28xx/em28xx-audio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-audio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-audio.c</a></div><div class='hunk'>@@ -343,7 +343,6 @@ static int snd_em28xx_pcm_close(struct snd_pcm_substream *substream)</div><div class='ctx'> static int snd_em28xx_hw_capture_params(struct snd_pcm_substream *substream,</div><div class='ctx'> 					struct snd_pcm_hw_params *hw_params)</div><div class='ctx'> {</div><div class='del'>-	unsigned int channels, rate, format;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	dprintk("Setting capture parameters\n");</div><div class='hunk'>@@ -352,13 +351,17 @@ static int snd_em28xx_hw_capture_params(struct snd_pcm_substream *substream,</div><div class='ctx'> 				params_buffer_bytes(hw_params));</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='add'>+#if 0</div><div class='add'>+	/* TODO: set up em28xx audio chip to deliver the correct audio format,</div><div class='add'>+	   current default is 48000hz multiplexed =&gt; 96000hz mono</div><div class='add'>+	   which shouldn't matter since analogue TV only supports mono */</div><div class='add'>+	unsigned int channels, rate, format;</div><div class='add'>+</div><div class='ctx'> 	format = params_format(hw_params);</div><div class='ctx'> 	rate = params_rate(hw_params);</div><div class='ctx'> 	channels = params_channels(hw_params);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	/* TODO: set up em28xx audio chip to deliver the correct audio format,</div><div class='del'>-	   current default is 48000hz multiplexed =&gt; 96000hz mono</div><div class='del'>-	   which shouldn't matter since analogue TV only supports mono */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c<br/>index 9fd8cc7dbb23..20a7e24de6fb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-cards.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/em28xx/em28xx-cards.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-cards.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-cards.c</a></div><div class='hunk'>@@ -69,6 +69,8 @@ struct em28xx_hash_table {</div><div class='ctx'> 	unsigned int  tuner;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void em28xx_pre_card_setup(struct em28xx *dev);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  *  Reset sequences for analog/digital modes</div><div class='ctx'>  */</div><div class='hunk'>@@ -2361,7 +2363,7 @@ static int em28xx_hint_sensor(struct em28xx *dev)</div><div class='ctx'> /* Since em28xx_pre_card_setup() requires a proper dev-&gt;model,</div><div class='ctx'>  * this won't work for boards with generic PCI IDs</div><div class='ctx'>  */</div><div class='del'>-void em28xx_pre_card_setup(struct em28xx *dev)</div><div class='add'>+static void em28xx_pre_card_setup(struct em28xx *dev)</div><div class='ctx'> {</div><div class='ctx'> 	/* Set the initial XCLK and I2C clock values based on the board</div><div class='ctx'> 	   definition */</div><div class='hunk'>@@ -2661,55 +2663,7 @@ static int em28xx_hint_board(struct em28xx *dev)</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* ----------------------------------------------------------------------- */</div><div class='del'>-void em28xx_register_i2c_ir(struct em28xx *dev)</div><div class='del'>-{</div><div class='del'>-	/* Leadtek winfast tv USBII deluxe can find a non working IR-device */</div><div class='del'>-	/* at address 0x18, so if that address is needed for another board in */</div><div class='del'>-	/* the future, please put it after 0x1f. */</div><div class='del'>-	struct i2c_board_info info;</div><div class='del'>-	const unsigned short addr_list[] = {</div><div class='del'>-		 0x1f, 0x30, 0x47, I2C_CLIENT_END</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	if (disable_ir)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	memset(&amp;info, 0, sizeof(struct i2c_board_info));</div><div class='del'>-	memset(&amp;dev-&gt;init_data, 0, sizeof(dev-&gt;init_data));</div><div class='del'>-	strlcpy(info.type, "ir_video", I2C_NAME_SIZE);</div><div class='del'>-</div><div class='del'>-	/* detect &amp; configure */</div><div class='del'>-	switch (dev-&gt;model) {</div><div class='del'>-	case EM2800_BOARD_TERRATEC_CINERGY_200:</div><div class='del'>-	case EM2820_BOARD_TERRATEC_CINERGY_250:</div><div class='del'>-		dev-&gt;init_data.ir_codes = RC_MAP_EM_TERRATEC;</div><div class='del'>-		dev-&gt;init_data.get_key = em28xx_get_key_terratec;</div><div class='del'>-		dev-&gt;init_data.name = "i2c IR (EM28XX Terratec)";</div><div class='del'>-		break;</div><div class='del'>-	case EM2820_BOARD_PINNACLE_USB_2:</div><div class='del'>-		dev-&gt;init_data.ir_codes = RC_MAP_PINNACLE_GREY;</div><div class='del'>-		dev-&gt;init_data.get_key = em28xx_get_key_pinnacle_usb_grey;</div><div class='del'>-		dev-&gt;init_data.name = "i2c IR (EM28XX Pinnacle PCTV)";</div><div class='del'>-		break;</div><div class='del'>-	case EM2820_BOARD_HAUPPAUGE_WINTV_USB_2:</div><div class='del'>-		dev-&gt;init_data.ir_codes = RC_MAP_HAUPPAUGE;</div><div class='del'>-		dev-&gt;init_data.get_key = em28xx_get_key_em_haup;</div><div class='del'>-		dev-&gt;init_data.name = "i2c IR (EM2840 Hauppauge)";</div><div class='del'>-		break;</div><div class='del'>-	case EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE:</div><div class='del'>-		dev-&gt;init_data.ir_codes = RC_MAP_WINFAST_USBII_DELUXE;</div><div class='del'>-		dev-&gt;init_data.get_key = em28xx_get_key_winfast_usbii_deluxe;</div><div class='del'>-		dev-&gt;init_data.name = "i2c IR (EM2820 Winfast TV USBII Deluxe)";</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;init_data.name)</div><div class='del'>-		info.platform_data = &amp;dev-&gt;init_data;</div><div class='del'>-	i2c_new_probed_device(&amp;dev-&gt;i2c_adap, &amp;info, addr_list, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void em28xx_card_setup(struct em28xx *dev)</div><div class='add'>+static void em28xx_card_setup(struct em28xx *dev)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the device can be a webcam, seek for a sensor.</div><div class='hunk'>@@ -2849,13 +2803,6 @@ void em28xx_card_setup(struct em28xx *dev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_MODULES) &amp;&amp; defined(MODULE)</div><div class='del'>-	if (dev-&gt;board.has_ir_i2c &amp;&amp; !disable_ir)</div><div class='del'>-		request_module("ir-kbd-i2c");</div><div class='del'>-#endif</div><div class='del'>-	if (dev-&gt;board.has_snapshot_button)</div><div class='del'>-		em28xx_register_snapshot_button(dev);</div><div class='del'>-</div><div class='ctx'> 	if (dev-&gt;board.valid == EM28XX_BOARD_NOT_VALIDATED) {</div><div class='ctx'> 		em28xx_errdev("\n\n");</div><div class='ctx'> 		em28xx_errdev("The support for this board weren't "</div><div class='hunk'>@@ -2929,9 +2876,6 @@ void em28xx_card_setup(struct em28xx *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	em28xx_tuner_setup(dev);</div><div class='del'>-</div><div class='del'>-	if(!disable_ir)</div><div class='del'>-		em28xx_ir_init(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -2948,6 +2892,8 @@ static void request_module_async(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;board.has_dvb)</div><div class='ctx'> 		request_module("em28xx-dvb");</div><div class='add'>+	if (dev-&gt;board.has_ir_i2c &amp;&amp; !disable_ir)</div><div class='add'>+		request_module("em28xx-rc");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void request_modules(struct em28xx *dev)</div><div class='hunk'>@@ -2972,12 +2918,6 @@ static void flush_request_modules(struct em28xx *dev)</div><div class='ctx'> */</div><div class='ctx'> void em28xx_release_resources(struct em28xx *dev)</div><div class='ctx'> {</div><div class='del'>-	if (dev-&gt;sbutton_input_dev)</div><div class='del'>-		em28xx_deregister_snapshot_button(dev);</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;ir)</div><div class='del'>-		em28xx_ir_fini(dev);</div><div class='del'>-</div><div class='ctx'> 	/*FIXME: I2C IR should be disconnected */</div><div class='ctx'> </div><div class='ctx'> 	em28xx_release_analog_resources(dev);</div><div class='hunk'>@@ -3005,9 +2945,6 @@ static int em28xx_init_dev(struct em28xx *dev, struct usb_device *udev,</div><div class='ctx'> 	dev-&gt;udev = udev;</div><div class='ctx'> 	mutex_init(&amp;dev-&gt;ctrl_urb_lock);</div><div class='ctx'> 	spin_lock_init(&amp;dev-&gt;slock);</div><div class='del'>-	init_waitqueue_head(&amp;dev-&gt;open);</div><div class='del'>-	init_waitqueue_head(&amp;dev-&gt;wait_frame);</div><div class='del'>-	init_waitqueue_head(&amp;dev-&gt;wait_stream);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;em28xx_write_regs = em28xx_write_regs;</div><div class='ctx'> 	dev-&gt;em28xx_read_reg = em28xx_read_reg;</div><div class='hunk'>@@ -3140,9 +3077,7 @@ static int em28xx_init_dev(struct em28xx *dev, struct usb_device *udev,</div><div class='ctx'> </div><div class='ctx'> 	/* init video dma queues */</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;dev-&gt;vidq.active);</div><div class='del'>-	INIT_LIST_HEAD(&amp;dev-&gt;vidq.queued);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;dev-&gt;vbiq.active);</div><div class='del'>-	INIT_LIST_HEAD(&amp;dev-&gt;vbiq.queued);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;board.has_msp34xx) {</div><div class='ctx'> 		/* Send a reset to other chips via gpio */</div><div class='hunk'>@@ -3447,8 +3382,6 @@ static void em28xx_usb_disconnect(struct usb_interface *interface)</div><div class='ctx'> 	   resources */</div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	wake_up_interruptible_all(&amp;dev-&gt;open);</div><div class='del'>-</div><div class='ctx'> 	v4l2_device_disconnect(&amp;dev-&gt;v4l2_dev);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;users) {</div><div class='hunk'>@@ -3460,8 +3393,6 @@ static void em28xx_usb_disconnect(struct usb_interface *interface)</div><div class='ctx'> 		dev-&gt;state |= DEV_MISCONFIGURED;</div><div class='ctx'> 		em28xx_uninit_isoc(dev, dev-&gt;mode);</div><div class='ctx'> 		dev-&gt;state |= DEV_DISCONNECTED;</div><div class='del'>-		wake_up_interruptible(&amp;dev-&gt;wait_frame);</div><div class='del'>-		wake_up_interruptible(&amp;dev-&gt;wait_stream);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev-&gt;state |= DEV_DISCONNECTED;</div><div class='ctx'> 		em28xx_release_resources(dev);</div><div class='head'>diff --git a/drivers/media/video/em28xx/em28xx-core.c b/drivers/media/video/em28xx/em28xx-core.c<br/>index 53a9fb91e97e..5717bdee8f1b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/em28xx/em28xx-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-core.c</a></div><div class='hunk'>@@ -139,6 +139,7 @@ int em28xx_read_reg(struct em28xx *dev, u16 reg)</div><div class='ctx'> {</div><div class='ctx'> 	return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(em28xx_read_reg);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * em28xx_write_regs_req()</div><div class='hunk'>@@ -205,6 +206,7 @@ int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(em28xx_write_regs);</div><div class='ctx'> </div><div class='ctx'> /* Write a single register */</div><div class='ctx'> int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)</div><div class='hunk'>@@ -239,6 +241,7 @@ int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,</div><div class='ctx'> </div><div class='ctx'> 	return em28xx_write_regs(dev, reg, &amp;newval, 1);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(em28xx_write_reg_bits);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * em28xx_is_ac97_ready()</div><div class='hunk'>@@ -666,7 +669,6 @@ int em28xx_capture_start(struct em28xx *dev, int start)</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(em28xx_capture_start);</div><div class='ctx'> </div><div class='ctx'> int em28xx_vbi_supported(struct em28xx *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -975,7 +977,6 @@ void em28xx_uninit_isoc(struct em28xx *dev, enum em28xx_mode mode)</div><div class='ctx'> 	else</div><div class='ctx'> 		isoc_bufs = &amp;dev-&gt;isoc_ctl.analog_bufs;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;isoc_ctl.nfields = -1;</div><div class='ctx'> 	for (i = 0; i &lt; isoc_bufs-&gt;num_bufs; i++) {</div><div class='ctx'> 		urb = isoc_bufs-&gt;urb[i];</div><div class='ctx'> 		if (urb) {</div><div class='hunk'>@@ -1008,6 +1009,31 @@ void em28xx_uninit_isoc(struct em28xx *dev, enum em28xx_mode mode)</div><div class='ctx'> EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Stop URBs</div><div class='add'>+ */</div><div class='add'>+void em28xx_stop_urbs(struct em28xx *dev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	struct em28xx_usb_isoc_bufs *isoc_bufs = &amp;dev-&gt;isoc_ctl.digital_bufs;</div><div class='add'>+</div><div class='add'>+	em28xx_isocdbg("em28xx: called em28xx_stop_urbs\n");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; isoc_bufs-&gt;num_bufs; i++) {</div><div class='add'>+		urb = isoc_bufs-&gt;urb[i];</div><div class='add'>+		if (urb) {</div><div class='add'>+			if (!irqs_disabled())</div><div class='add'>+				usb_kill_urb(urb);</div><div class='add'>+			else</div><div class='add'>+				usb_unlink_urb(urb);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	em28xx_capture_start(dev, 0);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(em28xx_stop_urbs);</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Allocate URBs</div><div class='ctx'>  */</div><div class='ctx'> int em28xx_alloc_isoc(struct em28xx *dev, enum em28xx_mode mode,</div><div class='head'>diff --git a/drivers/media/video/em28xx/em28xx-dvb.c b/drivers/media/video/em28xx/em28xx-dvb.c<br/>index 503a8d5b5382..16410ac20092 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-dvb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/em28xx/em28xx-dvb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-dvb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-dvb.c</a></div><div class='hunk'>@@ -183,7 +183,7 @@ static int em28xx_stop_streaming(struct em28xx_dvb *dvb)</div><div class='ctx'> {</div><div class='ctx'> 	struct em28xx *dev = dvb-&gt;adapter.priv;</div><div class='ctx'> </div><div class='del'>-	em28xx_capture_start(dev, 0);</div><div class='add'>+	em28xx_stop_urbs(dev);</div><div class='ctx'> </div><div class='ctx'> 	em28xx_set_mode(dev, EM28XX_SUSPEND);</div><div class='ctx'> </div><div class='hunk'>@@ -336,6 +336,8 @@ struct drxk_config pctv_520e_drxk = {</div><div class='ctx'> 	.single_master = 1,</div><div class='ctx'> 	.microcode_name = "dvb-demod-drxk-pctv.fw",</div><div class='ctx'> 	.chunk_size = 58,</div><div class='add'>+	.antenna_dvbt = true, /* disable LNA */</div><div class='add'>+	.antenna_gpio = (1 &lt;&lt; 2), /* disable LNA */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)</div><div class='hunk'>@@ -474,8 +476,8 @@ static void terratec_h5_init(struct em28xx *dev)</div><div class='ctx'> static void pctv_520e_init(struct em28xx *dev)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * Init TDA8295(?) analog demodulator. Looks like I2C traffic to</div><div class='del'>-	 * digital demodulator and tuner are routed via TDA8295.</div><div class='add'>+	 * Init AVF4910B analog decoder. Looks like I2C traffic to</div><div class='add'>+	 * digital demodulator and tuner are routed via AVF4910B.</div><div class='ctx'> 	 */</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -542,7 +544,8 @@ static struct cxd2820r_config em28xx_cxd2820r_config = {</div><div class='ctx'> 	.i2c_address = (0xd8 &gt;&gt; 1),</div><div class='ctx'> 	.ts_mode = CXD2820R_TS_SERIAL,</div><div class='ctx'> </div><div class='del'>-	/* enable LNA for DVB-T2 and DVB-C */</div><div class='add'>+	/* enable LNA for DVB-T, DVB-T2 and DVB-C */</div><div class='add'>+	.gpio_dvbt[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L,</div><div class='ctx'> 	.gpio_dvbt2[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L,</div><div class='ctx'> 	.gpio_dvbc[0] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | CXD2820R_GPIO_L,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/media/video/em28xx/em28xx-i2c.c b/drivers/media/video/em28xx/em28xx-i2c.c<br/>index a88e169dba23..185db65b766e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/em28xx/em28xx-i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-i2c.c</a></div><div class='hunk'>@@ -553,9 +553,6 @@ int em28xx_i2c_register(struct em28xx *dev)</div><div class='ctx'> 	if (i2c_scan)</div><div class='ctx'> 		em28xx_do_i2c_scan(dev);</div><div class='ctx'> </div><div class='del'>-	/* Instantiate the IR receiver device, if present */</div><div class='del'>-	em28xx_register_i2c_ir(dev);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/em28xx/em28xx-input.c b/drivers/media/video/em28xx/em28xx-input.c<br/>index 2630b265b0e8..fce5f7680c99 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-input.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/em28xx/em28xx-input.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-input.c</a></div><div class='hunk'>@@ -80,7 +80,7 @@ struct em28xx_IR {</div><div class='ctx'>  I2C IR based get keycodes - should be used with ir-kbd-i2c</div><div class='ctx'>  **********************************************************/</div><div class='ctx'> </div><div class='del'>-int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)</div><div class='add'>+static int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char b;</div><div class='ctx'> </div><div class='hunk'>@@ -108,7 +108,7 @@ int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)</div><div class='add'>+static int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char buf[2];</div><div class='ctx'> 	u16 code;</div><div class='hunk'>@@ -157,7 +157,7 @@ int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,</div><div class='add'>+static int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,</div><div class='ctx'> 				     u32 *ir_raw)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char buf[3];</div><div class='hunk'>@@ -179,7 +179,8 @@ int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int em28xx_get_key_winfast_usbii_deluxe(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw)</div><div class='add'>+static int em28xx_get_key_winfast_usbii_deluxe(struct IR_i2c *ir, u32 *ir_key,</div><div class='add'>+					u32 *ir_raw)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char subaddr, keydetect, key;</div><div class='ctx'> </div><div class='hunk'>@@ -387,7 +388,138 @@ int em28xx_ir_change_protocol(struct rc_dev *rc_dev, u64 rc_type)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int em28xx_ir_init(struct em28xx *dev)</div><div class='add'>+static void em28xx_register_i2c_ir(struct em28xx *dev)</div><div class='add'>+{</div><div class='add'>+	/* Leadtek winfast tv USBII deluxe can find a non working IR-device */</div><div class='add'>+	/* at address 0x18, so if that address is needed for another board in */</div><div class='add'>+	/* the future, please put it after 0x1f. */</div><div class='add'>+	struct i2c_board_info info;</div><div class='add'>+	const unsigned short addr_list[] = {</div><div class='add'>+		 0x1f, 0x30, 0x47, I2C_CLIENT_END</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memset(&amp;info, 0, sizeof(struct i2c_board_info));</div><div class='add'>+	memset(&amp;dev-&gt;init_data, 0, sizeof(dev-&gt;init_data));</div><div class='add'>+	strlcpy(info.type, "ir_video", I2C_NAME_SIZE);</div><div class='add'>+</div><div class='add'>+	/* detect &amp; configure */</div><div class='add'>+	switch (dev-&gt;model) {</div><div class='add'>+	case EM2800_BOARD_TERRATEC_CINERGY_200:</div><div class='add'>+	case EM2820_BOARD_TERRATEC_CINERGY_250:</div><div class='add'>+		dev-&gt;init_data.ir_codes = RC_MAP_EM_TERRATEC;</div><div class='add'>+		dev-&gt;init_data.get_key = em28xx_get_key_terratec;</div><div class='add'>+		dev-&gt;init_data.name = "i2c IR (EM28XX Terratec)";</div><div class='add'>+		break;</div><div class='add'>+	case EM2820_BOARD_PINNACLE_USB_2:</div><div class='add'>+		dev-&gt;init_data.ir_codes = RC_MAP_PINNACLE_GREY;</div><div class='add'>+		dev-&gt;init_data.get_key = em28xx_get_key_pinnacle_usb_grey;</div><div class='add'>+		dev-&gt;init_data.name = "i2c IR (EM28XX Pinnacle PCTV)";</div><div class='add'>+		break;</div><div class='add'>+	case EM2820_BOARD_HAUPPAUGE_WINTV_USB_2:</div><div class='add'>+		dev-&gt;init_data.ir_codes = RC_MAP_HAUPPAUGE;</div><div class='add'>+		dev-&gt;init_data.get_key = em28xx_get_key_em_haup;</div><div class='add'>+		dev-&gt;init_data.name = "i2c IR (EM2840 Hauppauge)";</div><div class='add'>+		break;</div><div class='add'>+	case EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE:</div><div class='add'>+		dev-&gt;init_data.ir_codes = RC_MAP_WINFAST_USBII_DELUXE;</div><div class='add'>+		dev-&gt;init_data.get_key = em28xx_get_key_winfast_usbii_deluxe;</div><div class='add'>+		dev-&gt;init_data.name = "i2c IR (EM2820 Winfast TV USBII Deluxe)";</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;init_data.name)</div><div class='add'>+		info.platform_data = &amp;dev-&gt;init_data;</div><div class='add'>+	i2c_new_probed_device(&amp;dev-&gt;i2c_adap, &amp;info, addr_list, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**********************************************************</div><div class='add'>+ Handle Webcam snapshot button</div><div class='add'>+ **********************************************************/</div><div class='add'>+</div><div class='add'>+static void em28xx_query_sbutton(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	/* Poll the register and see if the button is depressed */</div><div class='add'>+	struct em28xx *dev =</div><div class='add'>+		container_of(work, struct em28xx, sbutton_query_work.work);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = em28xx_read_reg(dev, EM28XX_R0C_USBSUSP);</div><div class='add'>+</div><div class='add'>+	if (ret &amp; EM28XX_R0C_USBSUSP_SNAPSHOT) {</div><div class='add'>+		u8 cleared;</div><div class='add'>+		/* Button is depressed, clear the register */</div><div class='add'>+		cleared = ((u8) ret) &amp; ~EM28XX_R0C_USBSUSP_SNAPSHOT;</div><div class='add'>+		em28xx_write_regs(dev, EM28XX_R0C_USBSUSP, &amp;cleared, 1);</div><div class='add'>+</div><div class='add'>+		/* Not emulate the keypress */</div><div class='add'>+		input_report_key(dev-&gt;sbutton_input_dev, EM28XX_SNAPSHOT_KEY,</div><div class='add'>+				 1);</div><div class='add'>+		/* Now unpress the key */</div><div class='add'>+		input_report_key(dev-&gt;sbutton_input_dev, EM28XX_SNAPSHOT_KEY,</div><div class='add'>+				 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Schedule next poll */</div><div class='add'>+	schedule_delayed_work(&amp;dev-&gt;sbutton_query_work,</div><div class='add'>+			      msecs_to_jiffies(EM28XX_SBUTTON_QUERY_INTERVAL));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void em28xx_register_snapshot_button(struct em28xx *dev)</div><div class='add'>+{</div><div class='add'>+	struct input_dev *input_dev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	em28xx_info("Registering snapshot button...\n");</div><div class='add'>+	input_dev = input_allocate_device();</div><div class='add'>+	if (!input_dev) {</div><div class='add'>+		em28xx_errdev("input_allocate_device failed\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	usb_make_path(dev-&gt;udev, dev-&gt;snapshot_button_path,</div><div class='add'>+		      sizeof(dev-&gt;snapshot_button_path));</div><div class='add'>+	strlcat(dev-&gt;snapshot_button_path, "/sbutton",</div><div class='add'>+		sizeof(dev-&gt;snapshot_button_path));</div><div class='add'>+	INIT_DELAYED_WORK(&amp;dev-&gt;sbutton_query_work, em28xx_query_sbutton);</div><div class='add'>+</div><div class='add'>+	input_dev-&gt;name = "em28xx snapshot button";</div><div class='add'>+	input_dev-&gt;phys = dev-&gt;snapshot_button_path;</div><div class='add'>+	input_dev-&gt;evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);</div><div class='add'>+	set_bit(EM28XX_SNAPSHOT_KEY, input_dev-&gt;keybit);</div><div class='add'>+	input_dev-&gt;keycodesize = 0;</div><div class='add'>+	input_dev-&gt;keycodemax = 0;</div><div class='add'>+	input_dev-&gt;id.bustype = BUS_USB;</div><div class='add'>+	input_dev-&gt;id.vendor = le16_to_cpu(dev-&gt;udev-&gt;descriptor.idVendor);</div><div class='add'>+	input_dev-&gt;id.product = le16_to_cpu(dev-&gt;udev-&gt;descriptor.idProduct);</div><div class='add'>+	input_dev-&gt;id.version = 1;</div><div class='add'>+	input_dev-&gt;dev.parent = &amp;dev-&gt;udev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	err = input_register_device(input_dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		em28xx_errdev("input_register_device failed\n");</div><div class='add'>+		input_free_device(input_dev);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;sbutton_input_dev = input_dev;</div><div class='add'>+	schedule_delayed_work(&amp;dev-&gt;sbutton_query_work,</div><div class='add'>+			      msecs_to_jiffies(EM28XX_SBUTTON_QUERY_INTERVAL));</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void em28xx_deregister_snapshot_button(struct em28xx *dev)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;sbutton_input_dev != NULL) {</div><div class='add'>+		em28xx_info("Deregistering snapshot button\n");</div><div class='add'>+		cancel_delayed_work_sync(&amp;dev-&gt;sbutton_query_work);</div><div class='add'>+		input_unregister_device(dev-&gt;sbutton_input_dev);</div><div class='add'>+		dev-&gt;sbutton_input_dev = NULL;</div><div class='add'>+	}</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int em28xx_ir_init(struct em28xx *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct em28xx_IR *ir;</div><div class='ctx'> 	struct rc_dev *rc;</div><div class='hunk'>@@ -448,6 +580,15 @@ int em28xx_ir_init(struct em28xx *dev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_out_stop;</div><div class='ctx'> </div><div class='add'>+	em28xx_register_i2c_ir(dev);</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MODULES) &amp;&amp; defined(MODULE)</div><div class='add'>+	if (dev-&gt;board.has_ir_i2c)</div><div class='add'>+		request_module("ir-kbd-i2c");</div><div class='add'>+#endif</div><div class='add'>+	if (dev-&gt;board.has_snapshot_button)</div><div class='add'>+		em28xx_register_snapshot_button(dev);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'>  err_out_stop:</div><div class='hunk'>@@ -458,10 +599,12 @@ int em28xx_ir_init(struct em28xx *dev)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int em28xx_ir_fini(struct em28xx *dev)</div><div class='add'>+static int em28xx_ir_fini(struct em28xx *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct em28xx_IR *ir = dev-&gt;ir;</div><div class='ctx'> </div><div class='add'>+	em28xx_deregister_snapshot_button(dev);</div><div class='add'>+</div><div class='ctx'> 	/* skip detach on non attached boards */</div><div class='ctx'> 	if (!ir)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -475,89 +618,26 @@ int em28xx_ir_fini(struct em28xx *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**********************************************************</div><div class='del'>- Handle Webcam snapshot button</div><div class='del'>- **********************************************************/</div><div class='add'>+static struct em28xx_ops rc_ops = {</div><div class='add'>+	.id   = EM28XX_RC,</div><div class='add'>+	.name = "Em28xx Input Extension",</div><div class='add'>+	.init = em28xx_ir_init,</div><div class='add'>+	.fini = em28xx_ir_fini,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void em28xx_query_sbutton(struct work_struct *work)</div><div class='add'>+static int __init em28xx_rc_register(void)</div><div class='ctx'> {</div><div class='del'>-	/* Poll the register and see if the button is depressed */</div><div class='del'>-	struct em28xx *dev =</div><div class='del'>-		container_of(work, struct em28xx, sbutton_query_work.work);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = em28xx_read_reg(dev, EM28XX_R0C_USBSUSP);</div><div class='del'>-</div><div class='del'>-	if (ret &amp; EM28XX_R0C_USBSUSP_SNAPSHOT) {</div><div class='del'>-		u8 cleared;</div><div class='del'>-		/* Button is depressed, clear the register */</div><div class='del'>-		cleared = ((u8) ret) &amp; ~EM28XX_R0C_USBSUSP_SNAPSHOT;</div><div class='del'>-		em28xx_write_regs(dev, EM28XX_R0C_USBSUSP, &amp;cleared, 1);</div><div class='del'>-</div><div class='del'>-		/* Not emulate the keypress */</div><div class='del'>-		input_report_key(dev-&gt;sbutton_input_dev, EM28XX_SNAPSHOT_KEY,</div><div class='del'>-				 1);</div><div class='del'>-		/* Now unpress the key */</div><div class='del'>-		input_report_key(dev-&gt;sbutton_input_dev, EM28XX_SNAPSHOT_KEY,</div><div class='del'>-				 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Schedule next poll */</div><div class='del'>-	schedule_delayed_work(&amp;dev-&gt;sbutton_query_work,</div><div class='del'>-			      msecs_to_jiffies(EM28XX_SBUTTON_QUERY_INTERVAL));</div><div class='add'>+	return em28xx_register_extension(&amp;rc_ops);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void em28xx_register_snapshot_button(struct em28xx *dev)</div><div class='add'>+static void __exit em28xx_rc_unregister(void)</div><div class='ctx'> {</div><div class='del'>-	struct input_dev *input_dev;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	em28xx_info("Registering snapshot button...\n");</div><div class='del'>-	input_dev = input_allocate_device();</div><div class='del'>-	if (!input_dev) {</div><div class='del'>-		em28xx_errdev("input_allocate_device failed\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	usb_make_path(dev-&gt;udev, dev-&gt;snapshot_button_path,</div><div class='del'>-		      sizeof(dev-&gt;snapshot_button_path));</div><div class='del'>-	strlcat(dev-&gt;snapshot_button_path, "/sbutton",</div><div class='del'>-		sizeof(dev-&gt;snapshot_button_path));</div><div class='del'>-	INIT_DELAYED_WORK(&amp;dev-&gt;sbutton_query_work, em28xx_query_sbutton);</div><div class='del'>-</div><div class='del'>-	input_dev-&gt;name = "em28xx snapshot button";</div><div class='del'>-	input_dev-&gt;phys = dev-&gt;snapshot_button_path;</div><div class='del'>-	input_dev-&gt;evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);</div><div class='del'>-	set_bit(EM28XX_SNAPSHOT_KEY, input_dev-&gt;keybit);</div><div class='del'>-	input_dev-&gt;keycodesize = 0;</div><div class='del'>-	input_dev-&gt;keycodemax = 0;</div><div class='del'>-	input_dev-&gt;id.bustype = BUS_USB;</div><div class='del'>-	input_dev-&gt;id.vendor = le16_to_cpu(dev-&gt;udev-&gt;descriptor.idVendor);</div><div class='del'>-	input_dev-&gt;id.product = le16_to_cpu(dev-&gt;udev-&gt;descriptor.idProduct);</div><div class='del'>-	input_dev-&gt;id.version = 1;</div><div class='del'>-	input_dev-&gt;dev.parent = &amp;dev-&gt;udev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	err = input_register_device(input_dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		em28xx_errdev("input_register_device failed\n");</div><div class='del'>-		input_free_device(input_dev);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;sbutton_input_dev = input_dev;</div><div class='del'>-	schedule_delayed_work(&amp;dev-&gt;sbutton_query_work,</div><div class='del'>-			      msecs_to_jiffies(EM28XX_SBUTTON_QUERY_INTERVAL));</div><div class='del'>-	return;</div><div class='del'>-</div><div class='add'>+	em28xx_unregister_extension(&amp;rc_ops);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void em28xx_deregister_snapshot_button(struct em28xx *dev)</div><div class='del'>-{</div><div class='del'>-	if (dev-&gt;sbutton_input_dev != NULL) {</div><div class='del'>-		em28xx_info("Deregistering snapshot button\n");</div><div class='del'>-		cancel_delayed_work_sync(&amp;dev-&gt;sbutton_query_work);</div><div class='del'>-		input_unregister_device(dev-&gt;sbutton_input_dev);</div><div class='del'>-		dev-&gt;sbutton_input_dev = NULL;</div><div class='del'>-	}</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Mauro Carvalho Chehab &lt;mchehab@redhat.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Em28xx Input driver");</div><div class='add'>+</div><div class='add'>+module_init(em28xx_rc_register);</div><div class='add'>+module_exit(em28xx_rc_unregister);</div><div class='head'>diff --git a/drivers/media/video/em28xx/em28xx-video.c b/drivers/media/video/em28xx/em28xx-video.c<br/>index 324b695c0724..50f5f4fc2148 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/em28xx/em28xx-video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx-video.c</a></div><div class='hunk'>@@ -1305,9 +1305,7 @@ static int vidioc_s_input(struct file *file, void *priv, unsigned int i)</div><div class='ctx'> 	if (0 == INPUT(i)-&gt;type)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;ctl_input = i;</div><div class='del'>-</div><div class='del'>-	video_mux(dev, dev-&gt;ctl_input);</div><div class='add'>+	video_mux(dev, i);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2262,6 +2260,7 @@ static int em28xx_v4l2_close(struct file *filp)</div><div class='ctx'> 			em28xx_release_resources(dev);</div><div class='ctx'> 			kfree(dev-&gt;alt_max_pkt_size);</div><div class='ctx'> 			kfree(dev);</div><div class='add'>+			kfree(fh);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2286,7 +2285,6 @@ static int em28xx_v4l2_close(struct file *filp)</div><div class='ctx'> 	videobuf_mmap_free(&amp;fh-&gt;vb_vbiq);</div><div class='ctx'> 	kfree(fh);</div><div class='ctx'> 	dev-&gt;users--;</div><div class='del'>-	wake_up_interruptible_nr(&amp;dev-&gt;open, 1);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2497,6 +2495,10 @@ static struct video_device *em28xx_vdev_init(struct em28xx *dev,</div><div class='ctx'> 	vfd-&gt;release	= video_device_release;</div><div class='ctx'> 	vfd-&gt;debug	= video_debug;</div><div class='ctx'> 	vfd-&gt;lock	= &amp;dev-&gt;lock;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vfd-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	snprintf(vfd-&gt;name, sizeof(vfd-&gt;name), "%s %s",</div><div class='ctx'> 		 dev-&gt;name, type_name);</div><div class='hunk'>@@ -2518,7 +2520,6 @@ int em28xx_register_analog_devices(struct em28xx *dev)</div><div class='ctx'> 	dev-&gt;norm = em28xx_video_template.current_norm;</div><div class='ctx'> 	v4l2_device_call_all(&amp;dev-&gt;v4l2_dev, 0, core, s_std, dev-&gt;norm);</div><div class='ctx'> 	dev-&gt;interlaced = EM28XX_INTERLACED_DEFAULT;</div><div class='del'>-	dev-&gt;ctl_input = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Analog specific initialization */</div><div class='ctx'> 	dev-&gt;format = &amp;format[0];</div><div class='hunk'>@@ -2532,7 +2533,7 @@ int em28xx_register_analog_devices(struct em28xx *dev)</div><div class='ctx'> 	em28xx_set_video_format(dev, format[0].fourcc,</div><div class='ctx'> 				maxw, norm_maxh(dev));</div><div class='ctx'> </div><div class='del'>-	video_mux(dev, dev-&gt;ctl_input);</div><div class='add'>+	video_mux(dev, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Audio defaults */</div><div class='ctx'> 	dev-&gt;mute = 1;</div><div class='head'>diff --git a/drivers/media/video/em28xx/em28xx.h b/drivers/media/video/em28xx/em28xx.h<br/>index 2868b19f8b54..8757523e6863 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/em28xx/em28xx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/em28xx/em28xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/em28xx/em28xx.h</a></div><div class='hunk'>@@ -226,24 +226,10 @@ struct em28xx_usb_isoc_ctl {</div><div class='ctx'> 		/* isoc transfer buffers for digital mode */</div><div class='ctx'> 	struct em28xx_usb_isoc_bufs	digital_bufs;</div><div class='ctx'> </div><div class='del'>-		/* Last buffer command and region */</div><div class='del'>-	u8				cmd;</div><div class='del'>-	int				pos, size, pktsize;</div><div class='del'>-</div><div class='del'>-		/* Last field: ODD or EVEN? */</div><div class='del'>-	int				field;</div><div class='del'>-</div><div class='del'>-		/* Stores incomplete commands */</div><div class='del'>-	u32				tmp_buf;</div><div class='del'>-	int				tmp_buf_len;</div><div class='del'>-</div><div class='ctx'> 		/* Stores already requested buffers */</div><div class='ctx'> 	struct em28xx_buffer    	*vid_buf;</div><div class='ctx'> 	struct em28xx_buffer    	*vbi_buf;</div><div class='ctx'> </div><div class='del'>-		/* Stores the number of received fields */</div><div class='del'>-	int				nfields;</div><div class='del'>-</div><div class='ctx'> 		/* isoc urb callback */</div><div class='ctx'> 	int (*isoc_copy) (struct em28xx *dev, struct urb *urb);</div><div class='ctx'> </div><div class='hunk'>@@ -264,12 +250,10 @@ struct em28xx_buffer {</div><div class='ctx'> </div><div class='ctx'> 	struct list_head frame;</div><div class='ctx'> 	int top_field;</div><div class='del'>-	int receiving;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct em28xx_dmaqueue {</div><div class='ctx'> 	struct list_head       active;</div><div class='del'>-	struct list_head       queued;</div><div class='ctx'> </div><div class='ctx'> 	wait_queue_head_t          wq;</div><div class='ctx'> </div><div class='hunk'>@@ -277,13 +261,6 @@ struct em28xx_dmaqueue {</div><div class='ctx'> 	int                        pos;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* io methods */</div><div class='del'>-enum em28xx_io_method {</div><div class='del'>-	IO_NONE,</div><div class='del'>-	IO_READ,</div><div class='del'>-	IO_MMAP,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* inputs */</div><div class='ctx'> </div><div class='ctx'> #define MAX_EM28XX_INPUT 4</div><div class='hunk'>@@ -467,6 +444,7 @@ enum em28xx_dev_state {</div><div class='ctx'> /* em28xx extensions */</div><div class='ctx'> #define EM28XX_AUDIO   0x10</div><div class='ctx'> #define EM28XX_DVB     0x20</div><div class='add'>+#define EM28XX_RC      0x30</div><div class='ctx'> </div><div class='ctx'> /* em28xx resource types (used for res_get/res_lock etc */</div><div class='ctx'> #define EM28XX_RESOURCE_VIDEO 0x01</div><div class='hunk'>@@ -577,7 +555,6 @@ struct em28xx {</div><div class='ctx'> </div><div class='ctx'> 	/* states */</div><div class='ctx'> 	enum em28xx_dev_state state;</div><div class='del'>-	enum em28xx_io_method io;</div><div class='ctx'> </div><div class='ctx'> 	/* vbi related state tracking */</div><div class='ctx'> 	int capture_type;</div><div class='hunk'>@@ -593,7 +570,6 @@ struct em28xx {</div><div class='ctx'> 	struct mutex ctrl_urb_lock;	/* protects urb_buf */</div><div class='ctx'> 	/* spinlock_t queue_lock; */</div><div class='ctx'> 	struct list_head inqueue, outqueue;</div><div class='del'>-	wait_queue_head_t open, wait_frame, wait_stream;</div><div class='ctx'> 	struct video_device *vbi_dev;</div><div class='ctx'> 	struct video_device *radio_dev;</div><div class='ctx'> </div><div class='hunk'>@@ -695,6 +671,7 @@ int em28xx_init_isoc(struct em28xx *dev, enum em28xx_mode mode,</div><div class='ctx'> 		     int max_packets, int num_bufs, int max_pkt_size,</div><div class='ctx'> 		     int (*isoc_copy) (struct em28xx *dev, struct urb *urb));</div><div class='ctx'> void em28xx_uninit_isoc(struct em28xx *dev, enum em28xx_mode mode);</div><div class='add'>+void em28xx_stop_urbs(struct em28xx *dev);</div><div class='ctx'> int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev);</div><div class='ctx'> int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode);</div><div class='ctx'> int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio);</div><div class='hunk'>@@ -710,45 +687,12 @@ void em28xx_release_analog_resources(struct em28xx *dev);</div><div class='ctx'> </div><div class='ctx'> /* Provided by em28xx-cards.c */</div><div class='ctx'> extern int em2800_variant_detect(struct usb_device *udev, int model);</div><div class='del'>-extern void em28xx_pre_card_setup(struct em28xx *dev);</div><div class='del'>-extern void em28xx_card_setup(struct em28xx *dev);</div><div class='ctx'> extern struct em28xx_board em28xx_boards[];</div><div class='ctx'> extern struct usb_device_id em28xx_id_table[];</div><div class='ctx'> extern const unsigned int em28xx_bcount;</div><div class='del'>-void em28xx_register_i2c_ir(struct em28xx *dev);</div><div class='ctx'> int em28xx_tuner_callback(void *ptr, int component, int command, int arg);</div><div class='ctx'> void em28xx_release_resources(struct em28xx *dev);</div><div class='ctx'> </div><div class='del'>-/* Provided by em28xx-input.c */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_VIDEO_EM28XX_RC</div><div class='del'>-</div><div class='del'>-int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);</div><div class='del'>-int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);</div><div class='del'>-int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,</div><div class='del'>-				     u32 *ir_raw);</div><div class='del'>-int em28xx_get_key_winfast_usbii_deluxe(struct IR_i2c *ir, u32 *ir_key,</div><div class='del'>-				     u32 *ir_raw);</div><div class='del'>-void em28xx_register_snapshot_button(struct em28xx *dev);</div><div class='del'>-void em28xx_deregister_snapshot_button(struct em28xx *dev);</div><div class='del'>-</div><div class='del'>-int em28xx_ir_init(struct em28xx *dev);</div><div class='del'>-int em28xx_ir_fini(struct em28xx *dev);</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#define em28xx_get_key_terratec			NULL</div><div class='del'>-#define em28xx_get_key_em_haup			NULL</div><div class='del'>-#define em28xx_get_key_pinnacle_usb_grey	NULL</div><div class='del'>-#define em28xx_get_key_winfast_usbii_deluxe	NULL</div><div class='del'>-</div><div class='del'>-static inline void em28xx_register_snapshot_button(struct em28xx *dev) {}</div><div class='del'>-static inline void em28xx_deregister_snapshot_button(struct em28xx *dev) {}</div><div class='del'>-static inline int em28xx_ir_init(struct em28xx *dev) { return 0; }</div><div class='del'>-static inline int em28xx_ir_fini(struct em28xx *dev) { return 0; }</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* Provided by em28xx-vbi.c */</div><div class='ctx'> extern struct videobuf_queue_ops em28xx_vbi_qops;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/et61x251/Kconfig b/drivers/media/video/et61x251/Kconfig<br/>deleted file mode 100644<br/>index 87981b078fe6..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/et61x251/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/et61x251/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-config USB_ET61X251</div><div class='del'>-	tristate "USB ET61X[12]51 PC Camera Controller support (DEPRECATED)"</div><div class='del'>-	depends on VIDEO_V4L2</div><div class='del'>-	default n</div><div class='del'>-	---help---</div><div class='del'>-	  This driver is DEPRECATED please use the gspca zc3xx module</div><div class='del'>-	  instead.</div><div class='del'>-</div><div class='del'>-	  Say Y here if you want support for cameras based on Etoms ET61X151</div><div class='del'>-	  or ET61X251 PC Camera Controllers.</div><div class='del'>-</div><div class='del'>-	  See &lt;file:Documentation/video4linux/et61x251.txt&gt; for more info.</div><div class='del'>-</div><div class='del'>-	  This driver uses the Video For Linux API. You must say Y or M to</div><div class='del'>-	  "Video For Linux" to use this driver.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the</div><div class='del'>-	  module will be called et61x251.</div><div class='head'>diff --git a/drivers/media/video/et61x251/Makefile b/drivers/media/video/et61x251/Makefile<br/>deleted file mode 100644<br/>index 2ff4db9ec882..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/et61x251/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/et61x251/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,4 +0,0 @@</div><div class='del'>-et61x251-objs   := et61x251_core.o et61x251_tas5130d1b.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_USB_ET61X251)      += et61x251.o</div><div class='del'>-</div><div class='head'>diff --git a/drivers/media/video/et61x251/et61x251.h b/drivers/media/video/et61x251/et61x251.h<br/>deleted file mode 100644<br/>index 337ded4a6388..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/et61x251/et61x251.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/et61x251/et61x251.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,213 +0,0 @@</div><div class='del'>-/***************************************************************************</div><div class='del'>- * V4L2 driver for ET61X[12]51 PC Camera Controllers                       *</div><div class='del'>- *                                                                         *</div><div class='del'>- * Copyright (C) 2006 by Luca Risolia &lt;luca.risolia@studio.unibo.it&gt;       *</div><div class='del'>- *                                                                         *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify    *</div><div class='del'>- * it under the terms of the GNU General Public License as published by    *</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or       *</div><div class='del'>- * (at your option) any later version.                                     *</div><div class='del'>- *                                                                         *</div><div class='del'>- * This program is distributed in the hope that it will be useful,         *</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of          *</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the           *</div><div class='del'>- * GNU General Public License for more details.                            *</div><div class='del'>- *                                                                         *</div><div class='del'>- * You should have received a copy of the GNU General Public License       *</div><div class='del'>- * along with this program; if not, write to the Free Software             *</div><div class='del'>- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.               *</div><div class='del'>- ***************************************************************************/</div><div class='del'>-</div><div class='del'>-#ifndef _ET61X251_H_</div><div class='del'>-#define _ET61X251_H_</div><div class='del'>-</div><div class='del'>-#include &lt;linux/usb.h&gt;</div><div class='del'>-#include &lt;linux/videodev2.h&gt;</div><div class='del'>-#include &lt;media/v4l2-common.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/time.h&gt;</div><div class='del'>-#include &lt;linux/wait.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/param.h&gt;</div><div class='del'>-#include &lt;linux/rwsem.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/stddef.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/kref.h&gt;</div><div class='del'>-</div><div class='del'>-#include "et61x251_sensor.h"</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-#define ET61X251_DEBUG</div><div class='del'>-#define ET61X251_DEBUG_LEVEL         2</div><div class='del'>-#define ET61X251_MAX_DEVICES         64</div><div class='del'>-#define ET61X251_PRESERVE_IMGSCALE   0</div><div class='del'>-#define ET61X251_FORCE_MUNMAP        0</div><div class='del'>-#define ET61X251_MAX_FRAMES          32</div><div class='del'>-#define ET61X251_COMPRESSION_QUALITY 0</div><div class='del'>-#define ET61X251_URBS                2</div><div class='del'>-#define ET61X251_ISO_PACKETS         7</div><div class='del'>-#define ET61X251_ALTERNATE_SETTING   13</div><div class='del'>-#define ET61X251_URB_TIMEOUT         msecs_to_jiffies(2 * ET61X251_ISO_PACKETS)</div><div class='del'>-#define ET61X251_CTRL_TIMEOUT        100</div><div class='del'>-#define ET61X251_FRAME_TIMEOUT       2</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static const struct usb_device_id et61x251_id_table[] = {</div><div class='del'>-	{ USB_DEVICE(0x102c, 0x6251), },</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-ET61X251_SENSOR_TABLE</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-enum et61x251_frame_state {</div><div class='del'>-	F_UNUSED,</div><div class='del'>-	F_QUEUED,</div><div class='del'>-	F_GRABBING,</div><div class='del'>-	F_DONE,</div><div class='del'>-	F_ERROR,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct et61x251_frame_t {</div><div class='del'>-	void* bufmem;</div><div class='del'>-	struct v4l2_buffer buf;</div><div class='del'>-	enum et61x251_frame_state state;</div><div class='del'>-	struct list_head frame;</div><div class='del'>-	unsigned long vma_use_count;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum et61x251_dev_state {</div><div class='del'>-	DEV_INITIALIZED = 0x01,</div><div class='del'>-	DEV_DISCONNECTED = 0x02,</div><div class='del'>-	DEV_MISCONFIGURED = 0x04,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum et61x251_io_method {</div><div class='del'>-	IO_NONE,</div><div class='del'>-	IO_READ,</div><div class='del'>-	IO_MMAP,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum et61x251_stream_state {</div><div class='del'>-	STREAM_OFF,</div><div class='del'>-	STREAM_INTERRUPT,</div><div class='del'>-	STREAM_ON,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct et61x251_sysfs_attr {</div><div class='del'>-	u8 reg, i2c_reg;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct et61x251_module_param {</div><div class='del'>-	u8 force_munmap;</div><div class='del'>-	u16 frame_timeout;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static DEFINE_MUTEX(et61x251_sysfs_lock);</div><div class='del'>-static DECLARE_RWSEM(et61x251_dev_lock);</div><div class='del'>-</div><div class='del'>-struct et61x251_device {</div><div class='del'>-	struct video_device* v4ldev;</div><div class='del'>-</div><div class='del'>-	struct et61x251_sensor sensor;</div><div class='del'>-</div><div class='del'>-	struct usb_device* usbdev;</div><div class='del'>-	struct urb* urb[ET61X251_URBS];</div><div class='del'>-	void* transfer_buffer[ET61X251_URBS];</div><div class='del'>-	u8* control_buffer;</div><div class='del'>-</div><div class='del'>-	struct et61x251_frame_t *frame_current, frame[ET61X251_MAX_FRAMES];</div><div class='del'>-	struct list_head inqueue, outqueue;</div><div class='del'>-	u32 frame_count, nbuffers, nreadbuffers;</div><div class='del'>-</div><div class='del'>-	enum et61x251_io_method io;</div><div class='del'>-	enum et61x251_stream_state stream;</div><div class='del'>-</div><div class='del'>-	struct v4l2_jpegcompression compression;</div><div class='del'>-</div><div class='del'>-	struct et61x251_sysfs_attr sysfs;</div><div class='del'>-	struct et61x251_module_param module_param;</div><div class='del'>-</div><div class='del'>-	struct kref kref;</div><div class='del'>-	enum et61x251_dev_state state;</div><div class='del'>-	u8 users;</div><div class='del'>-</div><div class='del'>-	struct completion probe;</div><div class='del'>-	struct mutex open_mutex, fileop_mutex;</div><div class='del'>-	spinlock_t queue_lock;</div><div class='del'>-	wait_queue_head_t wait_open, wait_frame, wait_stream;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-struct et61x251_device*</div><div class='del'>-et61x251_match_id(struct et61x251_device* cam, const struct usb_device_id *id)</div><div class='del'>-{</div><div class='del'>-	return usb_match_id(usb_ifnum_to_if(cam-&gt;usbdev, 0), id) ? cam : NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-et61x251_attach_sensor(struct et61x251_device* cam,</div><div class='del'>-		       const struct et61x251_sensor* sensor)</div><div class='del'>-{</div><div class='del'>-	memcpy(&amp;cam-&gt;sensor, sensor, sizeof(struct et61x251_sensor));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-#undef DBG</div><div class='del'>-#undef KDBG</div><div class='del'>-#ifdef ET61X251_DEBUG</div><div class='del'>-#define DBG(level, fmt, ...)						\</div><div class='del'>-do {									\</div><div class='del'>-	if (debug &gt;= (level)) {						\</div><div class='del'>-		if ((level) == 1)					\</div><div class='del'>-			dev_err(&amp;cam-&gt;usbdev-&gt;dev, fmt "\n",		\</div><div class='del'>-				##__VA_ARGS__);				\</div><div class='del'>-		else if ((level) == 2)					\</div><div class='del'>-			dev_info(&amp;cam-&gt;usbdev-&gt;dev, fmt "\n",		\</div><div class='del'>-				 ##__VA_ARGS__);			\</div><div class='del'>-		else if ((level) &gt;= 3)					\</div><div class='del'>-			dev_info(&amp;cam-&gt;usbdev-&gt;dev, "[%s:%s:%d] " fmt "\n", \</div><div class='del'>-				 __FILE__, __func__, __LINE__,		\</div><div class='del'>-				 ##__VA_ARGS__);			\</div><div class='del'>-	}								\</div><div class='del'>-} while (0)</div><div class='del'>-#define KDBG(level, fmt, ...)						\</div><div class='del'>-do {									\</div><div class='del'>-	if (debug &gt;= (level)) {						\</div><div class='del'>-		if ((level) == 1 || (level) == 2)			\</div><div class='del'>-			pr_info(fmt "\n", ##__VA_ARGS__);		\</div><div class='del'>-		else if ((level) == 3)					\</div><div class='del'>-			pr_debug("[%s:%s:%d] " fmt "\n",		\</div><div class='del'>-				 __FILE__,  __func__, __LINE__,		\</div><div class='del'>-				 ##__VA_ARGS__);			\</div><div class='del'>-	}								\</div><div class='del'>-} while (0)</div><div class='del'>-#define V4LDBG(level, name, cmd)					\</div><div class='del'>-do {									\</div><div class='del'>-	if (debug &gt;= (level))						\</div><div class='del'>-		v4l_print_ioctl(name, cmd);				\</div><div class='del'>-} while (0)</div><div class='del'>-#else</div><div class='del'>-#define DBG(level, fmt, ...) do {;} while(0)</div><div class='del'>-#define KDBG(level, fmt, ...) do {;} while(0)</div><div class='del'>-#define V4LDBG(level, name, cmd) do {;} while(0)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#undef PDBG</div><div class='del'>-#define PDBG(fmt, ...)							\</div><div class='del'>-	dev_info(&amp;cam-&gt;usbdev-&gt;dev, "[%s:%s:%d] " fmt "\n",		\</div><div class='del'>-		 __FILE__, __func__, __LINE__, ##__VA_ARGS__)</div><div class='del'>-</div><div class='del'>-#undef PDBGG</div><div class='del'>-#define PDBGG(fmt, args...) do {;} while (0) /* placeholder */</div><div class='del'>-</div><div class='del'>-#endif /* _ET61X251_H_ */</div><div class='head'>diff --git a/drivers/media/video/et61x251/et61x251_core.c b/drivers/media/video/et61x251/et61x251_core.c<br/>deleted file mode 100644<br/>index 5539f09440ac..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/et61x251/et61x251_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/et61x251/et61x251_core.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,2683 +0,0 @@</div><div class='del'>-/***************************************************************************</div><div class='del'>- * V4L2 driver for ET61X[12]51 PC Camera Controllers                       *</div><div class='del'>- *                                                                         *</div><div class='del'>- * Copyright (C) 2006-2007 by Luca Risolia &lt;luca.risolia@studio.unibo.it&gt;  *</div><div class='del'>- *                                                                         *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify    *</div><div class='del'>- * it under the terms of the GNU General Public License as published by    *</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or       *</div><div class='del'>- * (at your option) any later version.                                     *</div><div class='del'>- *                                                                         *</div><div class='del'>- * This program is distributed in the hope that it will be useful,         *</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of          *</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the           *</div><div class='del'>- * GNU General Public License for more details.                            *</div><div class='del'>- *                                                                         *</div><div class='del'>- * You should have received a copy of the GNU General Public License       *</div><div class='del'>- * along with this program; if not, write to the Free Software             *</div><div class='del'>- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.               *</div><div class='del'>- ***************************************************************************/</div><div class='del'>-</div><div class='del'>-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='del'>-</div><div class='del'>-#include &lt;linux/version.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/param.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/compiler.h&gt;</div><div class='del'>-#include &lt;linux/ioctl.h&gt;</div><div class='del'>-#include &lt;linux/poll.h&gt;</div><div class='del'>-#include &lt;linux/stat.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='del'>-#include &lt;linux/page-flags.h&gt;</div><div class='del'>-#include &lt;media/v4l2-ioctl.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-#include "et61x251.h"</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-#define ET61X251_MODULE_NAME    "V4L2 driver for ET61X[12]51 "                \</div><div class='del'>-				"PC Camera Controllers"</div><div class='del'>-#define ET61X251_MODULE_AUTHOR  "(C) 2006-2007 Luca Risolia"</div><div class='del'>-#define ET61X251_AUTHOR_EMAIL   "&lt;luca.risolia@studio.unibo.it&gt;"</div><div class='del'>-#define ET61X251_MODULE_LICENSE "GPL"</div><div class='del'>-#define ET61X251_MODULE_VERSION "1.1.10"</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-MODULE_DEVICE_TABLE(usb, et61x251_id_table);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR(ET61X251_MODULE_AUTHOR " " ET61X251_AUTHOR_EMAIL);</div><div class='del'>-MODULE_DESCRIPTION(ET61X251_MODULE_NAME);</div><div class='del'>-MODULE_VERSION(ET61X251_MODULE_VERSION);</div><div class='del'>-MODULE_LICENSE(ET61X251_MODULE_LICENSE);</div><div class='del'>-</div><div class='del'>-static short video_nr[] = {[0 ... ET61X251_MAX_DEVICES-1] = -1};</div><div class='del'>-module_param_array(video_nr, short, NULL, 0444);</div><div class='del'>-MODULE_PARM_DESC(video_nr,</div><div class='del'>-		 "\n&lt;-1|n[,...]&gt; Specify V4L2 minor mode number."</div><div class='del'>-		 "\n -1 = use next available (default)"</div><div class='del'>-		 "\n  n = use minor number n (integer &gt;= 0)"</div><div class='del'>-		 "\nYou can specify up to "</div><div class='del'>-		 __MODULE_STRING(ET61X251_MAX_DEVICES) " cameras this way."</div><div class='del'>-		 "\nFor example:"</div><div class='del'>-		 "\nvideo_nr=-1,2,-1 would assign minor number 2 to"</div><div class='del'>-		 "\nthe second registered camera and use auto for the first"</div><div class='del'>-		 "\none and for every other camera."</div><div class='del'>-		 "\n");</div><div class='del'>-</div><div class='del'>-static bool force_munmap[] = {[0 ... ET61X251_MAX_DEVICES-1] =</div><div class='del'>-			      ET61X251_FORCE_MUNMAP};</div><div class='del'>-module_param_array(force_munmap, bool, NULL, 0444);</div><div class='del'>-MODULE_PARM_DESC(force_munmap,</div><div class='del'>-		 "\n&lt;0|1[,...]&gt; Force the application to unmap previously"</div><div class='del'>-		 "\nmapped buffer memory before calling any VIDIOC_S_CROP or"</div><div class='del'>-		 "\nVIDIOC_S_FMT ioctl's. Not all the applications support"</div><div class='del'>-		 "\nthis feature. This parameter is specific for each"</div><div class='del'>-		 "\ndetected camera."</div><div class='del'>-		 "\n 0 = do not force memory unmapping"</div><div class='del'>-		 "\n 1 = force memory unmapping (save memory)"</div><div class='del'>-		 "\nDefault value is "__MODULE_STRING(ET61X251_FORCE_MUNMAP)"."</div><div class='del'>-		 "\n");</div><div class='del'>-</div><div class='del'>-static unsigned int frame_timeout[] = {[0 ... ET61X251_MAX_DEVICES-1] =</div><div class='del'>-				       ET61X251_FRAME_TIMEOUT};</div><div class='del'>-module_param_array(frame_timeout, uint, NULL, 0644);</div><div class='del'>-MODULE_PARM_DESC(frame_timeout,</div><div class='del'>-		 "\n&lt;n[,...]&gt; Timeout for a video frame in seconds."</div><div class='del'>-		 "\nThis parameter is specific for each detected camera."</div><div class='del'>-		 "\nDefault value is "</div><div class='del'>-		 __MODULE_STRING(ET61X251_FRAME_TIMEOUT)"."</div><div class='del'>-		 "\n");</div><div class='del'>-</div><div class='del'>-#ifdef ET61X251_DEBUG</div><div class='del'>-static unsigned short debug = ET61X251_DEBUG_LEVEL;</div><div class='del'>-module_param(debug, ushort, 0644);</div><div class='del'>-MODULE_PARM_DESC(debug,</div><div class='del'>-		 "\n&lt;n&gt; Debugging information level, from 0 to 3:"</div><div class='del'>-		 "\n0 = none (use carefully)"</div><div class='del'>-		 "\n1 = critical errors"</div><div class='del'>-		 "\n2 = significant informations"</div><div class='del'>-		 "\n3 = more verbose messages"</div><div class='del'>-		 "\nLevel 3 is useful for testing only, when only "</div><div class='del'>-		 "one device is used."</div><div class='del'>-		 "\nDefault value is "__MODULE_STRING(ET61X251_DEBUG_LEVEL)"."</div><div class='del'>-		 "\n");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static u32</div><div class='del'>-et61x251_request_buffers(struct et61x251_device* cam, u32 count,</div><div class='del'>-			 enum et61x251_io_method io)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_pix_format* p = &amp;(cam-&gt;sensor.pix_format);</div><div class='del'>-	struct v4l2_rect* r = &amp;(cam-&gt;sensor.cropcap.bounds);</div><div class='del'>-	const size_t imagesize = cam-&gt;module_param.force_munmap ||</div><div class='del'>-				 io == IO_READ ?</div><div class='del'>-				 (p-&gt;width * p-&gt;height * p-&gt;priv) / 8 :</div><div class='del'>-				 (r-&gt;width * r-&gt;height * p-&gt;priv) / 8;</div><div class='del'>-	void* buff = NULL;</div><div class='del'>-	u32 i;</div><div class='del'>-</div><div class='del'>-	if (count &gt; ET61X251_MAX_FRAMES)</div><div class='del'>-		count = ET61X251_MAX_FRAMES;</div><div class='del'>-</div><div class='del'>-	cam-&gt;nbuffers = count;</div><div class='del'>-	while (cam-&gt;nbuffers &gt; 0) {</div><div class='del'>-		if ((buff = vmalloc_32_user(cam-&gt;nbuffers *</div><div class='del'>-					    PAGE_ALIGN(imagesize))))</div><div class='del'>-			break;</div><div class='del'>-		cam-&gt;nbuffers--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; cam-&gt;nbuffers; i++) {</div><div class='del'>-		cam-&gt;frame[i].bufmem = buff + i*PAGE_ALIGN(imagesize);</div><div class='del'>-		cam-&gt;frame[i].buf.index = i;</div><div class='del'>-		cam-&gt;frame[i].buf.m.offset = i*PAGE_ALIGN(imagesize);</div><div class='del'>-		cam-&gt;frame[i].buf.length = imagesize;</div><div class='del'>-		cam-&gt;frame[i].buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;</div><div class='del'>-		cam-&gt;frame[i].buf.sequence = 0;</div><div class='del'>-		cam-&gt;frame[i].buf.field = V4L2_FIELD_NONE;</div><div class='del'>-		cam-&gt;frame[i].buf.memory = V4L2_MEMORY_MMAP;</div><div class='del'>-		cam-&gt;frame[i].buf.flags = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return cam-&gt;nbuffers;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void et61x251_release_buffers(struct et61x251_device* cam)</div><div class='del'>-{</div><div class='del'>-	if (cam-&gt;nbuffers) {</div><div class='del'>-		vfree(cam-&gt;frame[0].bufmem);</div><div class='del'>-		cam-&gt;nbuffers = 0;</div><div class='del'>-	}</div><div class='del'>-	cam-&gt;frame_current = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void et61x251_empty_framequeues(struct et61x251_device* cam)</div><div class='del'>-{</div><div class='del'>-	u32 i;</div><div class='del'>-</div><div class='del'>-	INIT_LIST_HEAD(&amp;cam-&gt;inqueue);</div><div class='del'>-	INIT_LIST_HEAD(&amp;cam-&gt;outqueue);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ET61X251_MAX_FRAMES; i++) {</div><div class='del'>-		cam-&gt;frame[i].state = F_UNUSED;</div><div class='del'>-		cam-&gt;frame[i].buf.bytesused = 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void et61x251_requeue_outqueue(struct et61x251_device* cam)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_frame_t *i;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(i, &amp;cam-&gt;outqueue, frame) {</div><div class='del'>-		i-&gt;state = F_QUEUED;</div><div class='del'>-		list_add(&amp;i-&gt;frame, &amp;cam-&gt;inqueue);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	INIT_LIST_HEAD(&amp;cam-&gt;outqueue);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void et61x251_queue_unusedframes(struct et61x251_device* cam)</div><div class='del'>-{</div><div class='del'>-	unsigned long lock_flags;</div><div class='del'>-	u32 i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; cam-&gt;nbuffers; i++)</div><div class='del'>-		if (cam-&gt;frame[i].state == F_UNUSED) {</div><div class='del'>-			cam-&gt;frame[i].state = F_QUEUED;</div><div class='del'>-			spin_lock_irqsave(&amp;cam-&gt;queue_lock, lock_flags);</div><div class='del'>-			list_add_tail(&amp;cam-&gt;frame[i].frame, &amp;cam-&gt;inqueue);</div><div class='del'>-			spin_unlock_irqrestore(&amp;cam-&gt;queue_lock, lock_flags);</div><div class='del'>-		}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-int et61x251_write_reg(struct et61x251_device* cam, u8 value, u16 index)</div><div class='del'>-{</div><div class='del'>-	struct usb_device* udev = cam-&gt;usbdev;</div><div class='del'>-	u8* buff = cam-&gt;control_buffer;</div><div class='del'>-	int res;</div><div class='del'>-</div><div class='del'>-	*buff = value;</div><div class='del'>-</div><div class='del'>-	res = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0x00, 0x41,</div><div class='del'>-			      0, index, buff, 1, ET61X251_CTRL_TIMEOUT);</div><div class='del'>-	if (res &lt; 0) {</div><div class='del'>-		DBG(3, "Failed to write a register (value 0x%02X, index "</div><div class='del'>-		       "0x%02X, error %d)", value, index, res);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int et61x251_read_reg(struct et61x251_device* cam, u16 index)</div><div class='del'>-{</div><div class='del'>-	struct usb_device* udev = cam-&gt;usbdev;</div><div class='del'>-	u8* buff = cam-&gt;control_buffer;</div><div class='del'>-	int res;</div><div class='del'>-</div><div class='del'>-	res = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), 0x00, 0xc1,</div><div class='del'>-			      0, index, buff, 1, ET61X251_CTRL_TIMEOUT);</div><div class='del'>-	if (res &lt; 0)</div><div class='del'>-		DBG(3, "Failed to read a register (index 0x%02X, error %d)",</div><div class='del'>-		    index, res);</div><div class='del'>-</div><div class='del'>-	return (res &gt;= 0) ? (int)(*buff) : -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_i2c_wait(struct et61x251_device* cam,</div><div class='del'>-		  const struct et61x251_sensor* sensor)</div><div class='del'>-{</div><div class='del'>-	int i, r;</div><div class='del'>-</div><div class='del'>-	for (i = 1; i &lt;= 8; i++) {</div><div class='del'>-		if (sensor-&gt;interface == ET61X251_I2C_3WIRES) {</div><div class='del'>-			r = et61x251_read_reg(cam, 0x8e);</div><div class='del'>-			if (!(r &amp; 0x02) &amp;&amp; (r &gt;= 0))</div><div class='del'>-				return 0;</div><div class='del'>-		} else {</div><div class='del'>-			r = et61x251_read_reg(cam, 0x8b);</div><div class='del'>-			if (!(r &amp; 0x01) &amp;&amp; (r &gt;= 0))</div><div class='del'>-				return 0;</div><div class='del'>-		}</div><div class='del'>-		if (r &lt; 0)</div><div class='del'>-			return -EIO;</div><div class='del'>-		udelay(8*8); /* minimum for sensors at 400kHz */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EBUSY;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-et61x251_i2c_raw_write(struct et61x251_device* cam, u8 n, u8 data1, u8 data2,</div><div class='del'>-		       u8 data3, u8 data4, u8 data5, u8 data6, u8 data7,</div><div class='del'>-		       u8 data8, u8 address)</div><div class='del'>-{</div><div class='del'>-	struct usb_device* udev = cam-&gt;usbdev;</div><div class='del'>-	u8* data = cam-&gt;control_buffer;</div><div class='del'>-	int err = 0, res;</div><div class='del'>-</div><div class='del'>-	data[0] = data2;</div><div class='del'>-	data[1] = data3;</div><div class='del'>-	data[2] = data4;</div><div class='del'>-	data[3] = data5;</div><div class='del'>-	data[4] = data6;</div><div class='del'>-	data[5] = data7;</div><div class='del'>-	data[6] = data8;</div><div class='del'>-	res = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0x00, 0x41,</div><div class='del'>-			      0, 0x81, data, n-1, ET61X251_CTRL_TIMEOUT);</div><div class='del'>-	if (res &lt; 0)</div><div class='del'>-		err += res;</div><div class='del'>-</div><div class='del'>-	data[0] = address;</div><div class='del'>-	data[1] = cam-&gt;sensor.i2c_slave_id;</div><div class='del'>-	data[2] = cam-&gt;sensor.rsta | 0x02 | (n &lt;&lt; 4);</div><div class='del'>-	res = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0x00, 0x41,</div><div class='del'>-			      0, 0x88, data, 3, ET61X251_CTRL_TIMEOUT);</div><div class='del'>-	if (res &lt; 0)</div><div class='del'>-		err += res;</div><div class='del'>-</div><div class='del'>-	/* Start writing through the serial interface */</div><div class='del'>-	data[0] = data1;</div><div class='del'>-	res = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0x00, 0x41,</div><div class='del'>-			      0, 0x80, data, 1, ET61X251_CTRL_TIMEOUT);</div><div class='del'>-	if (res &lt; 0)</div><div class='del'>-		err += res;</div><div class='del'>-</div><div class='del'>-	err += et61x251_i2c_wait(cam, &amp;cam-&gt;sensor);</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		DBG(3, "I2C raw write failed for %s image sensor",</div><div class='del'>-		    cam-&gt;sensor.name);</div><div class='del'>-</div><div class='del'>-	PDBGG("I2C raw write: %u bytes, address = 0x%02X, data1 = 0x%02X, "</div><div class='del'>-	      "data2 = 0x%02X, data3 = 0x%02X, data4 = 0x%02X, data5 = 0x%02X,"</div><div class='del'>-	      " data6 = 0x%02X, data7 = 0x%02X, data8 = 0x%02X", n, address,</div><div class='del'>-	      data1, data2, data3, data4, data5, data6, data7, data8);</div><div class='del'>-</div><div class='del'>-	return err ? -1 : 0;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static void et61x251_urb_complete(struct urb *urb)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device* cam = urb-&gt;context;</div><div class='del'>-	struct et61x251_frame_t** f;</div><div class='del'>-	size_t imagesize;</div><div class='del'>-	u8 i;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (urb-&gt;status == -ENOENT)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	f = &amp;cam-&gt;frame_current;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;stream == STREAM_INTERRUPT) {</div><div class='del'>-		cam-&gt;stream = STREAM_OFF;</div><div class='del'>-		if ((*f))</div><div class='del'>-			(*f)-&gt;state = F_QUEUED;</div><div class='del'>-		DBG(3, "Stream interrupted");</div><div class='del'>-		wake_up(&amp;cam-&gt;wait_stream);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_DISCONNECTED)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_MISCONFIGURED) {</div><div class='del'>-		wake_up_interruptible(&amp;cam-&gt;wait_frame);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;stream == STREAM_OFF || list_empty(&amp;cam-&gt;inqueue))</div><div class='del'>-		goto resubmit_urb;</div><div class='del'>-</div><div class='del'>-	if (!(*f))</div><div class='del'>-		(*f) = list_entry(cam-&gt;inqueue.next, struct et61x251_frame_t,</div><div class='del'>-				  frame);</div><div class='del'>-</div><div class='del'>-	imagesize = (cam-&gt;sensor.pix_format.width *</div><div class='del'>-		     cam-&gt;sensor.pix_format.height *</div><div class='del'>-		     cam-&gt;sensor.pix_format.priv) / 8;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; urb-&gt;number_of_packets; i++) {</div><div class='del'>-		unsigned int len, status;</div><div class='del'>-		void *pos;</div><div class='del'>-		u8* b1, * b2, sof;</div><div class='del'>-		const u8 VOID_BYTES = 6;</div><div class='del'>-		size_t imglen;</div><div class='del'>-</div><div class='del'>-		len = urb-&gt;iso_frame_desc[i].actual_length;</div><div class='del'>-		status = urb-&gt;iso_frame_desc[i].status;</div><div class='del'>-		pos = urb-&gt;iso_frame_desc[i].offset + urb-&gt;transfer_buffer;</div><div class='del'>-</div><div class='del'>-		if (status) {</div><div class='del'>-			DBG(3, "Error in isochronous frame");</div><div class='del'>-			(*f)-&gt;state = F_ERROR;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		b1 = pos++;</div><div class='del'>-		b2 = pos++;</div><div class='del'>-		sof = ((*b1 &amp; 0x3f) == 63);</div><div class='del'>-		imglen = ((*b1 &amp; 0xc0) &lt;&lt; 2) | *b2;</div><div class='del'>-</div><div class='del'>-		PDBGG("Isochrnous frame: length %u, #%u i, image length %zu",</div><div class='del'>-		      len, i, imglen);</div><div class='del'>-</div><div class='del'>-		if ((*f)-&gt;state == F_QUEUED || (*f)-&gt;state == F_ERROR)</div><div class='del'>-start_of_frame:</div><div class='del'>-			if (sof) {</div><div class='del'>-				(*f)-&gt;state = F_GRABBING;</div><div class='del'>-				(*f)-&gt;buf.bytesused = 0;</div><div class='del'>-				do_gettimeofday(&amp;(*f)-&gt;buf.timestamp);</div><div class='del'>-				pos += 22;</div><div class='del'>-				DBG(3, "SOF detected: new video frame");</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-		if ((*f)-&gt;state == F_GRABBING) {</div><div class='del'>-			if (sof &amp;&amp; (*f)-&gt;buf.bytesused) {</div><div class='del'>-				if (cam-&gt;sensor.pix_format.pixelformat ==</div><div class='del'>-							 V4L2_PIX_FMT_ET61X251)</div><div class='del'>-					goto end_of_frame;</div><div class='del'>-				else {</div><div class='del'>-					DBG(3, "Not expected SOF detected "</div><div class='del'>-					       "after %lu bytes",</div><div class='del'>-					   (unsigned long)(*f)-&gt;buf.bytesused);</div><div class='del'>-					(*f)-&gt;state = F_ERROR;</div><div class='del'>-					continue;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if ((*f)-&gt;buf.bytesused + imglen &gt; imagesize) {</div><div class='del'>-				DBG(3, "Video frame size exceeded");</div><div class='del'>-				(*f)-&gt;state = F_ERROR;</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			pos += VOID_BYTES;</div><div class='del'>-</div><div class='del'>-			memcpy((*f)-&gt;bufmem+(*f)-&gt;buf.bytesused, pos, imglen);</div><div class='del'>-			(*f)-&gt;buf.bytesused += imglen;</div><div class='del'>-</div><div class='del'>-			if ((*f)-&gt;buf.bytesused == imagesize) {</div><div class='del'>-				u32 b;</div><div class='del'>-end_of_frame:</div><div class='del'>-				b = (*f)-&gt;buf.bytesused;</div><div class='del'>-				(*f)-&gt;state = F_DONE;</div><div class='del'>-				(*f)-&gt;buf.sequence= ++cam-&gt;frame_count;</div><div class='del'>-				spin_lock(&amp;cam-&gt;queue_lock);</div><div class='del'>-				list_move_tail(&amp;(*f)-&gt;frame, &amp;cam-&gt;outqueue);</div><div class='del'>-				if (!list_empty(&amp;cam-&gt;inqueue))</div><div class='del'>-					(*f) = list_entry(cam-&gt;inqueue.next,</div><div class='del'>-						       struct et61x251_frame_t,</div><div class='del'>-							  frame);</div><div class='del'>-				else</div><div class='del'>-					(*f) = NULL;</div><div class='del'>-				spin_unlock(&amp;cam-&gt;queue_lock);</div><div class='del'>-				DBG(3, "Video frame captured: : %lu bytes",</div><div class='del'>-				       (unsigned long)(b));</div><div class='del'>-</div><div class='del'>-				if (!(*f))</div><div class='del'>-					goto resubmit_urb;</div><div class='del'>-</div><div class='del'>-				if (sof &amp;&amp;</div><div class='del'>-				    cam-&gt;sensor.pix_format.pixelformat ==</div><div class='del'>-							 V4L2_PIX_FMT_ET61X251)</div><div class='del'>-					goto start_of_frame;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-resubmit_urb:</div><div class='del'>-	urb-&gt;dev = cam-&gt;usbdev;</div><div class='del'>-	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='del'>-	if (err &lt; 0 &amp;&amp; err != -EPERM) {</div><div class='del'>-		cam-&gt;state |= DEV_MISCONFIGURED;</div><div class='del'>-		DBG(1, "usb_submit_urb() failed");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	wake_up_interruptible(&amp;cam-&gt;wait_frame);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int et61x251_start_transfer(struct et61x251_device* cam)</div><div class='del'>-{</div><div class='del'>-	struct usb_device *udev = cam-&gt;usbdev;</div><div class='del'>-	struct urb* urb;</div><div class='del'>-	struct usb_host_interface* altsetting = usb_altnum_to_altsetting(</div><div class='del'>-						   usb_ifnum_to_if(udev, 0),</div><div class='del'>-						   ET61X251_ALTERNATE_SETTING);</div><div class='del'>-	const unsigned int psz = le16_to_cpu(altsetting-&gt;</div><div class='del'>-					     endpoint[0].desc.wMaxPacketSize);</div><div class='del'>-	s8 i, j;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ET61X251_URBS; i++) {</div><div class='del'>-		cam-&gt;transfer_buffer[i] = kzalloc(ET61X251_ISO_PACKETS * psz,</div><div class='del'>-						  GFP_KERNEL);</div><div class='del'>-		if (!cam-&gt;transfer_buffer[i]) {</div><div class='del'>-			err = -ENOMEM;</div><div class='del'>-			DBG(1, "Not enough memory");</div><div class='del'>-			goto free_buffers;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ET61X251_URBS; i++) {</div><div class='del'>-		urb = usb_alloc_urb(ET61X251_ISO_PACKETS, GFP_KERNEL);</div><div class='del'>-		cam-&gt;urb[i] = urb;</div><div class='del'>-		if (!urb) {</div><div class='del'>-			err = -ENOMEM;</div><div class='del'>-			DBG(1, "usb_alloc_urb() failed");</div><div class='del'>-			goto free_urbs;</div><div class='del'>-		}</div><div class='del'>-		urb-&gt;dev = udev;</div><div class='del'>-		urb-&gt;context = cam;</div><div class='del'>-		urb-&gt;pipe = usb_rcvisocpipe(udev, 1);</div><div class='del'>-		urb-&gt;transfer_flags = URB_ISO_ASAP;</div><div class='del'>-		urb-&gt;number_of_packets = ET61X251_ISO_PACKETS;</div><div class='del'>-		urb-&gt;complete = et61x251_urb_complete;</div><div class='del'>-		urb-&gt;transfer_buffer = cam-&gt;transfer_buffer[i];</div><div class='del'>-		urb-&gt;transfer_buffer_length = psz * ET61X251_ISO_PACKETS;</div><div class='del'>-		urb-&gt;interval = 1;</div><div class='del'>-		for (j = 0; j &lt; ET61X251_ISO_PACKETS; j++) {</div><div class='del'>-			urb-&gt;iso_frame_desc[j].offset = psz * j;</div><div class='del'>-			urb-&gt;iso_frame_desc[j].length = psz;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = et61x251_write_reg(cam, 0x01, 0x03);</div><div class='del'>-	err = et61x251_write_reg(cam, 0x00, 0x03);</div><div class='del'>-	err = et61x251_write_reg(cam, 0x08, 0x03);</div><div class='del'>-	if (err) {</div><div class='del'>-		err = -EIO;</div><div class='del'>-		DBG(1, "I/O hardware error");</div><div class='del'>-		goto free_urbs;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = usb_set_interface(udev, 0, ET61X251_ALTERNATE_SETTING);</div><div class='del'>-	if (err) {</div><div class='del'>-		DBG(1, "usb_set_interface() failed");</div><div class='del'>-		goto free_urbs;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cam-&gt;frame_current = NULL;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ET61X251_URBS; i++) {</div><div class='del'>-		err = usb_submit_urb(cam-&gt;urb[i], GFP_KERNEL);</div><div class='del'>-		if (err) {</div><div class='del'>-			for (j = i-1; j &gt;= 0; j--)</div><div class='del'>-				usb_kill_urb(cam-&gt;urb[j]);</div><div class='del'>-			DBG(1, "usb_submit_urb() failed, error %d", err);</div><div class='del'>-			goto free_urbs;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-free_urbs:</div><div class='del'>-	for (i = 0; (i &lt; ET61X251_URBS) &amp;&amp; cam-&gt;urb[i]; i++)</div><div class='del'>-		usb_free_urb(cam-&gt;urb[i]);</div><div class='del'>-</div><div class='del'>-free_buffers:</div><div class='del'>-	for (i = 0; (i &lt; ET61X251_URBS) &amp;&amp; cam-&gt;transfer_buffer[i]; i++)</div><div class='del'>-		kfree(cam-&gt;transfer_buffer[i]);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int et61x251_stop_transfer(struct et61x251_device* cam)</div><div class='del'>-{</div><div class='del'>-	struct usb_device *udev = cam-&gt;usbdev;</div><div class='del'>-	s8 i;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_DISCONNECTED)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	for (i = ET61X251_URBS-1; i &gt;= 0; i--) {</div><div class='del'>-		usb_kill_urb(cam-&gt;urb[i]);</div><div class='del'>-		usb_free_urb(cam-&gt;urb[i]);</div><div class='del'>-		kfree(cam-&gt;transfer_buffer[i]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = usb_set_interface(udev, 0, 0); /* 0 Mb/s */</div><div class='del'>-	if (err)</div><div class='del'>-		DBG(3, "usb_set_interface() failed");</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int et61x251_stream_interrupt(struct et61x251_device* cam)</div><div class='del'>-{</div><div class='del'>-	long timeout;</div><div class='del'>-</div><div class='del'>-	cam-&gt;stream = STREAM_INTERRUPT;</div><div class='del'>-	timeout = wait_event_timeout(cam-&gt;wait_stream,</div><div class='del'>-				     (cam-&gt;stream == STREAM_OFF) ||</div><div class='del'>-				     (cam-&gt;state &amp; DEV_DISCONNECTED),</div><div class='del'>-				     ET61X251_URB_TIMEOUT);</div><div class='del'>-	if (cam-&gt;state &amp; DEV_DISCONNECTED)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	else if (cam-&gt;stream != STREAM_OFF) {</div><div class='del'>-		cam-&gt;state |= DEV_MISCONFIGURED;</div><div class='del'>-		DBG(1, "URB timeout reached. The camera is misconfigured. To "</div><div class='del'>-		       "use it, close and open %s again.",</div><div class='del'>-		    video_device_node_name(cam-&gt;v4ldev));</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_VIDEO_ADV_DEBUG</div><div class='del'>-</div><div class='del'>-static int et61x251_i2c_try_read(struct et61x251_device* cam,</div><div class='del'>-				 const struct et61x251_sensor* sensor,</div><div class='del'>-				 u8 address)</div><div class='del'>-{</div><div class='del'>-	struct usb_device* udev = cam-&gt;usbdev;</div><div class='del'>-	u8* data = cam-&gt;control_buffer;</div><div class='del'>-	int err = 0, res;</div><div class='del'>-</div><div class='del'>-	data[0] = address;</div><div class='del'>-	data[1] = cam-&gt;sensor.i2c_slave_id;</div><div class='del'>-	data[2] = cam-&gt;sensor.rsta | 0x10;</div><div class='del'>-	data[3] = !(et61x251_read_reg(cam, 0x8b) &amp; 0x02);</div><div class='del'>-	res = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0x00, 0x41,</div><div class='del'>-			      0, 0x88, data, 4, ET61X251_CTRL_TIMEOUT);</div><div class='del'>-	if (res &lt; 0)</div><div class='del'>-		err += res;</div><div class='del'>-</div><div class='del'>-	err += et61x251_i2c_wait(cam, sensor);</div><div class='del'>-</div><div class='del'>-	res = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), 0x00, 0xc1,</div><div class='del'>-			      0, 0x80, data, 8, ET61X251_CTRL_TIMEOUT);</div><div class='del'>-	if (res &lt; 0)</div><div class='del'>-		err += res;</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		DBG(3, "I2C read failed for %s image sensor", sensor-&gt;name);</div><div class='del'>-</div><div class='del'>-	PDBGG("I2C read: address 0x%02X, value: 0x%02X", address, data[0]);</div><div class='del'>-</div><div class='del'>-	return err ? -1 : (int)data[0];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int et61x251_i2c_try_write(struct et61x251_device* cam,</div><div class='del'>-				  const struct et61x251_sensor* sensor,</div><div class='del'>-				  u8 address, u8 value)</div><div class='del'>-{</div><div class='del'>-	struct usb_device* udev = cam-&gt;usbdev;</div><div class='del'>-	u8* data = cam-&gt;control_buffer;</div><div class='del'>-	int err = 0, res;</div><div class='del'>-</div><div class='del'>-	data[0] = address;</div><div class='del'>-	data[1] = cam-&gt;sensor.i2c_slave_id;</div><div class='del'>-	data[2] = cam-&gt;sensor.rsta | 0x12;</div><div class='del'>-	res = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0x00, 0x41,</div><div class='del'>-			      0, 0x88, data, 3, ET61X251_CTRL_TIMEOUT);</div><div class='del'>-	if (res &lt; 0)</div><div class='del'>-		err += res;</div><div class='del'>-</div><div class='del'>-	data[0] = value;</div><div class='del'>-	res = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0x00, 0x41,</div><div class='del'>-			      0, 0x80, data, 1, ET61X251_CTRL_TIMEOUT);</div><div class='del'>-	if (res &lt; 0)</div><div class='del'>-		err += res;</div><div class='del'>-</div><div class='del'>-	err += et61x251_i2c_wait(cam, sensor);</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		DBG(3, "I2C write failed for %s image sensor", sensor-&gt;name);</div><div class='del'>-</div><div class='del'>-	PDBGG("I2C write: address 0x%02X, value: 0x%02X", address, value);</div><div class='del'>-</div><div class='del'>-	return err ? -1 : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int et61x251_i2c_read(struct et61x251_device* cam, u8 address)</div><div class='del'>-{</div><div class='del'>-	return et61x251_i2c_try_read(cam, &amp;cam-&gt;sensor, address);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int et61x251_i2c_write(struct et61x251_device* cam,</div><div class='del'>-			      u8 address, u8 value)</div><div class='del'>-{</div><div class='del'>-	return et61x251_i2c_try_write(cam, &amp;cam-&gt;sensor, address, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u8 et61x251_strtou8(const char* buff, size_t len, ssize_t* count)</div><div class='del'>-{</div><div class='del'>-	char str[5];</div><div class='del'>-	char* endp;</div><div class='del'>-	unsigned long val;</div><div class='del'>-</div><div class='del'>-	if (len &lt; 4) {</div><div class='del'>-		strncpy(str, buff, len);</div><div class='del'>-		str[len] = '\0';</div><div class='del'>-	} else {</div><div class='del'>-		strncpy(str, buff, 4);</div><div class='del'>-		str[4] = '\0';</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	val = simple_strtoul(str, &amp;endp, 0);</div><div class='del'>-</div><div class='del'>-	*count = 0;</div><div class='del'>-	if (val &lt;= 0xff)</div><div class='del'>-		*count = (ssize_t)(endp - str);</div><div class='del'>-	if ((*count) &amp;&amp; (len == *count+1) &amp;&amp; (buff[*count] == '\n'))</div><div class='del'>-		*count += 1;</div><div class='del'>-</div><div class='del'>-	return (u8)val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-   NOTE 1: being inside one of the following methods implies that the v4l</div><div class='del'>-	   device exists for sure (see kobjects and reference counters)</div><div class='del'>-   NOTE 2: buffers are PAGE_SIZE long</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-static ssize_t et61x251_show_reg(struct device* cd,</div><div class='del'>-				 struct device_attribute *attr, char* buf)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device* cam;</div><div class='del'>-	ssize_t count;</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;et61x251_sysfs_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	cam = video_get_drvdata(to_video_device(cd));</div><div class='del'>-	if (!cam) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	count = sprintf(buf, "%u\n", cam-&gt;sysfs.reg);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static ssize_t</div><div class='del'>-et61x251_store_reg(struct device* cd,</div><div class='del'>-		   struct device_attribute *attr, const char* buf, size_t len)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device* cam;</div><div class='del'>-	u8 index;</div><div class='del'>-	ssize_t count;</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;et61x251_sysfs_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	cam = video_get_drvdata(to_video_device(cd));</div><div class='del'>-	if (!cam) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	index = et61x251_strtou8(buf, len, &amp;count);</div><div class='del'>-	if (index &gt; 0x8e || !count) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cam-&gt;sysfs.reg = index;</div><div class='del'>-</div><div class='del'>-	DBG(2, "Moved ET61X[12]51 register index to 0x%02X", cam-&gt;sysfs.reg);</div><div class='del'>-	DBG(3, "Written bytes: %zd", count);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static ssize_t et61x251_show_val(struct device* cd,</div><div class='del'>-				 struct device_attribute *attr, char* buf)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device* cam;</div><div class='del'>-	ssize_t count;</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;et61x251_sysfs_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	cam = video_get_drvdata(to_video_device(cd));</div><div class='del'>-	if (!cam) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((val = et61x251_read_reg(cam, cam-&gt;sysfs.reg)) &lt; 0) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	count = sprintf(buf, "%d\n", val);</div><div class='del'>-</div><div class='del'>-	DBG(3, "Read bytes: %zd", count);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static ssize_t</div><div class='del'>-et61x251_store_val(struct device* cd, struct device_attribute *attr,</div><div class='del'>-		   const char* buf, size_t len)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device* cam;</div><div class='del'>-	u8 value;</div><div class='del'>-	ssize_t count;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;et61x251_sysfs_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	cam = video_get_drvdata(to_video_device(cd));</div><div class='del'>-	if (!cam) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	value = et61x251_strtou8(buf, len, &amp;count);</div><div class='del'>-	if (!count) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = et61x251_write_reg(cam, value, cam-&gt;sysfs.reg);</div><div class='del'>-	if (err) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DBG(2, "Written ET61X[12]51 reg. 0x%02X, val. 0x%02X",</div><div class='del'>-	    cam-&gt;sysfs.reg, value);</div><div class='del'>-	DBG(3, "Written bytes: %zd", count);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static ssize_t et61x251_show_i2c_reg(struct device* cd,</div><div class='del'>-				     struct device_attribute *attr, char* buf)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device* cam;</div><div class='del'>-	ssize_t count;</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;et61x251_sysfs_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	cam = video_get_drvdata(to_video_device(cd));</div><div class='del'>-	if (!cam) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	count = sprintf(buf, "%u\n", cam-&gt;sysfs.i2c_reg);</div><div class='del'>-</div><div class='del'>-	DBG(3, "Read bytes: %zd", count);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static ssize_t</div><div class='del'>-et61x251_store_i2c_reg(struct device* cd, struct device_attribute *attr,</div><div class='del'>-		       const char* buf, size_t len)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device* cam;</div><div class='del'>-	u8 index;</div><div class='del'>-	ssize_t count;</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;et61x251_sysfs_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	cam = video_get_drvdata(to_video_device(cd));</div><div class='del'>-	if (!cam) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	index = et61x251_strtou8(buf, len, &amp;count);</div><div class='del'>-	if (!count) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cam-&gt;sysfs.i2c_reg = index;</div><div class='del'>-</div><div class='del'>-	DBG(2, "Moved sensor register index to 0x%02X", cam-&gt;sysfs.i2c_reg);</div><div class='del'>-	DBG(3, "Written bytes: %zd", count);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static ssize_t et61x251_show_i2c_val(struct device* cd,</div><div class='del'>-				     struct device_attribute *attr, char* buf)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device* cam;</div><div class='del'>-	ssize_t count;</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;et61x251_sysfs_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	cam = video_get_drvdata(to_video_device(cd));</div><div class='del'>-	if (!cam) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!(cam-&gt;sensor.sysfs_ops &amp; ET61X251_I2C_READ)) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -ENOSYS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((val = et61x251_i2c_read(cam, cam-&gt;sysfs.i2c_reg)) &lt; 0) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	count = sprintf(buf, "%d\n", val);</div><div class='del'>-</div><div class='del'>-	DBG(3, "Read bytes: %zd", count);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static ssize_t</div><div class='del'>-et61x251_store_i2c_val(struct device* cd, struct device_attribute *attr,</div><div class='del'>-		       const char* buf, size_t len)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device* cam;</div><div class='del'>-	u8 value;</div><div class='del'>-	ssize_t count;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;et61x251_sysfs_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	cam = video_get_drvdata(to_video_device(cd));</div><div class='del'>-	if (!cam) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!(cam-&gt;sensor.sysfs_ops &amp; ET61X251_I2C_READ)) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -ENOSYS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	value = et61x251_strtou8(buf, len, &amp;count);</div><div class='del'>-	if (!count) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = et61x251_i2c_write(cam, cam-&gt;sysfs.i2c_reg, value);</div><div class='del'>-	if (err) {</div><div class='del'>-		mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DBG(2, "Written sensor reg. 0x%02X, val. 0x%02X",</div><div class='del'>-	    cam-&gt;sysfs.i2c_reg, value);</div><div class='del'>-	DBG(3, "Written bytes: %zd", count);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static DEVICE_ATTR(reg, S_IRUGO | S_IWUSR,</div><div class='del'>-		   et61x251_show_reg, et61x251_store_reg);</div><div class='del'>-static DEVICE_ATTR(val, S_IRUGO | S_IWUSR,</div><div class='del'>-		   et61x251_show_val, et61x251_store_val);</div><div class='del'>-static DEVICE_ATTR(i2c_reg, S_IRUGO | S_IWUSR,</div><div class='del'>-		   et61x251_show_i2c_reg, et61x251_store_i2c_reg);</div><div class='del'>-static DEVICE_ATTR(i2c_val, S_IRUGO | S_IWUSR,</div><div class='del'>-		   et61x251_show_i2c_val, et61x251_store_i2c_val);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int et61x251_create_sysfs(struct et61x251_device* cam)</div><div class='del'>-{</div><div class='del'>-	struct device *classdev = &amp;(cam-&gt;v4ldev-&gt;dev);</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if ((err = device_create_file(classdev, &amp;dev_attr_reg)))</div><div class='del'>-		goto err_out;</div><div class='del'>-	if ((err = device_create_file(classdev, &amp;dev_attr_val)))</div><div class='del'>-		goto err_reg;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;sensor.sysfs_ops) {</div><div class='del'>-		if ((err = device_create_file(classdev, &amp;dev_attr_i2c_reg)))</div><div class='del'>-			goto err_val;</div><div class='del'>-		if ((err = device_create_file(classdev, &amp;dev_attr_i2c_val)))</div><div class='del'>-			goto err_i2c_reg;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-err_i2c_reg:</div><div class='del'>-	if (cam-&gt;sensor.sysfs_ops)</div><div class='del'>-		device_remove_file(classdev, &amp;dev_attr_i2c_reg);</div><div class='del'>-err_val:</div><div class='del'>-	device_remove_file(classdev, &amp;dev_attr_val);</div><div class='del'>-err_reg:</div><div class='del'>-	device_remove_file(classdev, &amp;dev_attr_reg);</div><div class='del'>-err_out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_VIDEO_ADV_DEBUG */</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_set_pix_format(struct et61x251_device* cam,</div><div class='del'>-			struct v4l2_pix_format* pix)</div><div class='del'>-{</div><div class='del'>-	int r, err = 0;</div><div class='del'>-</div><div class='del'>-	if ((r = et61x251_read_reg(cam, 0x12)) &lt; 0)</div><div class='del'>-		err += r;</div><div class='del'>-	if (pix-&gt;pixelformat == V4L2_PIX_FMT_ET61X251)</div><div class='del'>-		err += et61x251_write_reg(cam, r &amp; 0xfd, 0x12);</div><div class='del'>-	else</div><div class='del'>-		err += et61x251_write_reg(cam, r | 0x02, 0x12);</div><div class='del'>-</div><div class='del'>-	return err ? -EIO : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_set_compression(struct et61x251_device* cam,</div><div class='del'>-			 struct v4l2_jpegcompression* compression)</div><div class='del'>-{</div><div class='del'>-	int r, err = 0;</div><div class='del'>-</div><div class='del'>-	if ((r = et61x251_read_reg(cam, 0x12)) &lt; 0)</div><div class='del'>-		err += r;</div><div class='del'>-	if (compression-&gt;quality == 0)</div><div class='del'>-		err += et61x251_write_reg(cam, r &amp; 0xfb, 0x12);</div><div class='del'>-	else</div><div class='del'>-		err += et61x251_write_reg(cam, r | 0x04, 0x12);</div><div class='del'>-</div><div class='del'>-	return err ? -EIO : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int et61x251_set_scale(struct et61x251_device* cam, u8 scale)</div><div class='del'>-{</div><div class='del'>-	int r = 0, err = 0;</div><div class='del'>-</div><div class='del'>-	r = et61x251_read_reg(cam, 0x12);</div><div class='del'>-	if (r &lt; 0)</div><div class='del'>-		err += r;</div><div class='del'>-</div><div class='del'>-	if (scale == 1)</div><div class='del'>-		err += et61x251_write_reg(cam, r &amp; ~0x01, 0x12);</div><div class='del'>-	else if (scale == 2)</div><div class='del'>-		err += et61x251_write_reg(cam, r | 0x01, 0x12);</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	PDBGG("Scaling factor: %u", scale);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_set_crop(struct et61x251_device* cam, struct v4l2_rect* rect)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_sensor* s = &amp;cam-&gt;sensor;</div><div class='del'>-	u16 fmw_sx = (u16)(rect-&gt;left - s-&gt;cropcap.bounds.left +</div><div class='del'>-			   s-&gt;active_pixel.left),</div><div class='del'>-	    fmw_sy = (u16)(rect-&gt;top - s-&gt;cropcap.bounds.top +</div><div class='del'>-			   s-&gt;active_pixel.top),</div><div class='del'>-	    fmw_length = (u16)(rect-&gt;width),</div><div class='del'>-	    fmw_height = (u16)(rect-&gt;height);</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	err += et61x251_write_reg(cam, fmw_sx &amp; 0xff, 0x69);</div><div class='del'>-	err += et61x251_write_reg(cam, fmw_sy &amp; 0xff, 0x6a);</div><div class='del'>-	err += et61x251_write_reg(cam, fmw_length &amp; 0xff, 0x6b);</div><div class='del'>-	err += et61x251_write_reg(cam, fmw_height &amp; 0xff, 0x6c);</div><div class='del'>-	err += et61x251_write_reg(cam, (fmw_sx &gt;&gt; 8) | ((fmw_sy &amp; 0x300) &gt;&gt; 6)</div><div class='del'>-				       | ((fmw_length &amp; 0x300) &gt;&gt; 4)</div><div class='del'>-				       | ((fmw_height &amp; 0x300) &gt;&gt; 2), 0x6d);</div><div class='del'>-	if (err)</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	PDBGG("fmw_sx, fmw_sy, fmw_length, fmw_height: %u %u %u %u",</div><div class='del'>-	      fmw_sx, fmw_sy, fmw_length, fmw_height);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int et61x251_init(struct et61x251_device* cam)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_sensor* s = &amp;cam-&gt;sensor;</div><div class='del'>-	struct v4l2_control ctrl;</div><div class='del'>-	struct v4l2_queryctrl *qctrl;</div><div class='del'>-	struct v4l2_rect* rect;</div><div class='del'>-	u8 i = 0;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (!(cam-&gt;state &amp; DEV_INITIALIZED)) {</div><div class='del'>-		mutex_init(&amp;cam-&gt;open_mutex);</div><div class='del'>-		init_waitqueue_head(&amp;cam-&gt;wait_open);</div><div class='del'>-		qctrl = s-&gt;qctrl;</div><div class='del'>-		rect = &amp;(s-&gt;cropcap.defrect);</div><div class='del'>-		cam-&gt;compression.quality = ET61X251_COMPRESSION_QUALITY;</div><div class='del'>-	} else { /* use current values */</div><div class='del'>-		qctrl = s-&gt;_qctrl;</div><div class='del'>-		rect = &amp;(s-&gt;_rect);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err += et61x251_set_scale(cam, rect-&gt;width / s-&gt;pix_format.width);</div><div class='del'>-	err += et61x251_set_crop(cam, rect);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (s-&gt;init) {</div><div class='del'>-		err = s-&gt;init(cam);</div><div class='del'>-		if (err) {</div><div class='del'>-			DBG(3, "Sensor initialization failed");</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err += et61x251_set_compression(cam, &amp;cam-&gt;compression);</div><div class='del'>-	err += et61x251_set_pix_format(cam, &amp;s-&gt;pix_format);</div><div class='del'>-	if (s-&gt;set_pix_format)</div><div class='del'>-		err += s-&gt;set_pix_format(cam, &amp;s-&gt;pix_format);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (s-&gt;pix_format.pixelformat == V4L2_PIX_FMT_ET61X251)</div><div class='del'>-		DBG(3, "Compressed video format is active, quality %d",</div><div class='del'>-		    cam-&gt;compression.quality);</div><div class='del'>-	else</div><div class='del'>-		DBG(3, "Uncompressed video format is active");</div><div class='del'>-</div><div class='del'>-	if (s-&gt;set_crop)</div><div class='del'>-		if ((err = s-&gt;set_crop(cam, rect))) {</div><div class='del'>-			DBG(3, "set_crop() failed");</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	if (s-&gt;set_ctrl) {</div><div class='del'>-		for (i = 0; i &lt; ARRAY_SIZE(s-&gt;qctrl); i++)</div><div class='del'>-			if (s-&gt;qctrl[i].id != 0 &amp;&amp;</div><div class='del'>-			    !(s-&gt;qctrl[i].flags &amp; V4L2_CTRL_FLAG_DISABLED)) {</div><div class='del'>-				ctrl.id = s-&gt;qctrl[i].id;</div><div class='del'>-				ctrl.value = qctrl[i].default_value;</div><div class='del'>-				err = s-&gt;set_ctrl(cam, &amp;ctrl);</div><div class='del'>-				if (err) {</div><div class='del'>-					DBG(3, "Set %s control failed",</div><div class='del'>-					    s-&gt;qctrl[i].name);</div><div class='del'>-					return err;</div><div class='del'>-				}</div><div class='del'>-				DBG(3, "Image sensor supports '%s' control",</div><div class='del'>-				    s-&gt;qctrl[i].name);</div><div class='del'>-			}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!(cam-&gt;state &amp; DEV_INITIALIZED)) {</div><div class='del'>-		mutex_init(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-		spin_lock_init(&amp;cam-&gt;queue_lock);</div><div class='del'>-		init_waitqueue_head(&amp;cam-&gt;wait_frame);</div><div class='del'>-		init_waitqueue_head(&amp;cam-&gt;wait_stream);</div><div class='del'>-		cam-&gt;nreadbuffers = 2;</div><div class='del'>-		memcpy(s-&gt;_qctrl, s-&gt;qctrl, sizeof(s-&gt;qctrl));</div><div class='del'>-		memcpy(&amp;(s-&gt;_rect), &amp;(s-&gt;cropcap.defrect),</div><div class='del'>-		       sizeof(struct v4l2_rect));</div><div class='del'>-		cam-&gt;state |= DEV_INITIALIZED;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DBG(2, "Initialization succeeded");</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static void et61x251_release_resources(struct kref *kref)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device *cam;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;et61x251_sysfs_lock);</div><div class='del'>-</div><div class='del'>-	cam = container_of(kref, struct et61x251_device, kref);</div><div class='del'>-</div><div class='del'>-	DBG(2, "V4L2 device %s deregistered",</div><div class='del'>-	    video_device_node_name(cam-&gt;v4ldev));</div><div class='del'>-	video_set_drvdata(cam-&gt;v4ldev, NULL);</div><div class='del'>-	video_unregister_device(cam-&gt;v4ldev);</div><div class='del'>-	usb_put_dev(cam-&gt;usbdev);</div><div class='del'>-	kfree(cam-&gt;control_buffer);</div><div class='del'>-	kfree(cam);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;et61x251_sysfs_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int et61x251_open(struct file *filp)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device* cam;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (!down_read_trylock(&amp;et61x251_dev_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	cam = video_drvdata(filp);</div><div class='del'>-</div><div class='del'>-	if (wait_for_completion_interruptible(&amp;cam-&gt;probe)) {</div><div class='del'>-		up_read(&amp;et61x251_dev_lock);</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kref_get(&amp;cam-&gt;kref);</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;cam-&gt;open_mutex)) {</div><div class='del'>-		kref_put(&amp;cam-&gt;kref, et61x251_release_resources);</div><div class='del'>-		up_read(&amp;et61x251_dev_lock);</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_DISCONNECTED) {</div><div class='del'>-		DBG(1, "Device not present");</div><div class='del'>-		err = -ENODEV;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;users) {</div><div class='del'>-		DBG(2, "Device %s is already in use",</div><div class='del'>-		       video_device_node_name(cam-&gt;v4ldev));</div><div class='del'>-		DBG(3, "Simultaneous opens are not supported");</div><div class='del'>-		if ((filp-&gt;f_flags &amp; O_NONBLOCK) ||</div><div class='del'>-		    (filp-&gt;f_flags &amp; O_NDELAY)) {</div><div class='del'>-			err = -EWOULDBLOCK;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-		DBG(2, "A blocking open() has been requested. Wait for the "</div><div class='del'>-		       "device to be released...");</div><div class='del'>-		up_read(&amp;et61x251_dev_lock);</div><div class='del'>-		err = wait_event_interruptible_exclusive(cam-&gt;wait_open,</div><div class='del'>-						(cam-&gt;state &amp; DEV_DISCONNECTED)</div><div class='del'>-							 || !cam-&gt;users);</div><div class='del'>-		down_read(&amp;et61x251_dev_lock);</div><div class='del'>-		if (err)</div><div class='del'>-			goto out;</div><div class='del'>-		if (cam-&gt;state &amp; DEV_DISCONNECTED) {</div><div class='del'>-			err = -ENODEV;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_MISCONFIGURED) {</div><div class='del'>-		err = et61x251_init(cam);</div><div class='del'>-		if (err) {</div><div class='del'>-			DBG(1, "Initialization failed again. "</div><div class='del'>-			       "I will retry on next open().");</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-		cam-&gt;state &amp;= ~DEV_MISCONFIGURED;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((err = et61x251_start_transfer(cam)))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	filp-&gt;private_data = cam;</div><div class='del'>-	cam-&gt;users++;</div><div class='del'>-	cam-&gt;io = IO_NONE;</div><div class='del'>-	cam-&gt;stream = STREAM_OFF;</div><div class='del'>-	cam-&gt;nbuffers = 0;</div><div class='del'>-	cam-&gt;frame_count = 0;</div><div class='del'>-	et61x251_empty_framequeues(cam);</div><div class='del'>-</div><div class='del'>-	DBG(3, "Video device %s is open",</div><div class='del'>-	    video_device_node_name(cam-&gt;v4ldev));</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;cam-&gt;open_mutex);</div><div class='del'>-	if (err)</div><div class='del'>-		kref_put(&amp;cam-&gt;kref, et61x251_release_resources);</div><div class='del'>-	up_read(&amp;et61x251_dev_lock);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int et61x251_release(struct file *filp)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device* cam;</div><div class='del'>-</div><div class='del'>-	down_write(&amp;et61x251_dev_lock);</div><div class='del'>-</div><div class='del'>-	cam = video_drvdata(filp);</div><div class='del'>-</div><div class='del'>-	et61x251_stop_transfer(cam);</div><div class='del'>-	et61x251_release_buffers(cam);</div><div class='del'>-	cam-&gt;users--;</div><div class='del'>-	wake_up_interruptible_nr(&amp;cam-&gt;wait_open, 1);</div><div class='del'>-</div><div class='del'>-	DBG(3, "Video device %s closed",</div><div class='del'>-	    video_device_node_name(cam-&gt;v4ldev));</div><div class='del'>-</div><div class='del'>-	kref_put(&amp;cam-&gt;kref, et61x251_release_resources);</div><div class='del'>-</div><div class='del'>-	up_write(&amp;et61x251_dev_lock);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static ssize_t</div><div class='del'>-et61x251_read(struct file* filp, char __user * buf,</div><div class='del'>-	      size_t count, loff_t* f_pos)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device *cam = video_drvdata(filp);</div><div class='del'>-	struct et61x251_frame_t* f, * i;</div><div class='del'>-	unsigned long lock_flags;</div><div class='del'>-	long timeout;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;cam-&gt;fileop_mutex))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_DISCONNECTED) {</div><div class='del'>-		DBG(1, "Device not present");</div><div class='del'>-		mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_MISCONFIGURED) {</div><div class='del'>-		DBG(1, "The camera is misconfigured. Close and open it "</div><div class='del'>-		       "again.");</div><div class='del'>-		mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;io == IO_MMAP) {</div><div class='del'>-		DBG(3, "Close and open the device again to choose the read "</div><div class='del'>-		       "method");</div><div class='del'>-		mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;io == IO_NONE) {</div><div class='del'>-		if (!et61x251_request_buffers(cam, cam-&gt;nreadbuffers,</div><div class='del'>-					      IO_READ)) {</div><div class='del'>-			DBG(1, "read() failed, not enough memory");</div><div class='del'>-			mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-		cam-&gt;io = IO_READ;</div><div class='del'>-		cam-&gt;stream = STREAM_ON;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (list_empty(&amp;cam-&gt;inqueue)) {</div><div class='del'>-		if (!list_empty(&amp;cam-&gt;outqueue))</div><div class='del'>-			et61x251_empty_framequeues(cam);</div><div class='del'>-		et61x251_queue_unusedframes(cam);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!count) {</div><div class='del'>-		mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (list_empty(&amp;cam-&gt;outqueue)) {</div><div class='del'>-		if (filp-&gt;f_flags &amp; O_NONBLOCK) {</div><div class='del'>-			mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-			return -EAGAIN;</div><div class='del'>-		}</div><div class='del'>-		timeout = wait_event_interruptible_timeout</div><div class='del'>-			  ( cam-&gt;wait_frame,</div><div class='del'>-			    (!list_empty(&amp;cam-&gt;outqueue)) ||</div><div class='del'>-			    (cam-&gt;state &amp; DEV_DISCONNECTED) ||</div><div class='del'>-			    (cam-&gt;state &amp; DEV_MISCONFIGURED),</div><div class='del'>-			    msecs_to_jiffies(</div><div class='del'>-				cam-&gt;module_param.frame_timeout * 1000</div><div class='del'>-			    )</div><div class='del'>-			  );</div><div class='del'>-		if (timeout &lt; 0) {</div><div class='del'>-			mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-			return timeout;</div><div class='del'>-		}</div><div class='del'>-		if (cam-&gt;state &amp; DEV_DISCONNECTED) {</div><div class='del'>-			mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		if (!timeout || (cam-&gt;state &amp; DEV_MISCONFIGURED)) {</div><div class='del'>-			mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-			return -EIO;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	f = list_entry(cam-&gt;outqueue.prev, struct et61x251_frame_t, frame);</div><div class='del'>-</div><div class='del'>-	if (count &gt; f-&gt;buf.bytesused)</div><div class='del'>-		count = f-&gt;buf.bytesused;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(buf, f-&gt;bufmem, count)) {</div><div class='del'>-		err = -EFAULT;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-	*f_pos += count;</div><div class='del'>-</div><div class='del'>-exit:</div><div class='del'>-	spin_lock_irqsave(&amp;cam-&gt;queue_lock, lock_flags);</div><div class='del'>-	list_for_each_entry(i, &amp;cam-&gt;outqueue, frame)</div><div class='del'>-		i-&gt;state = F_UNUSED;</div><div class='del'>-	INIT_LIST_HEAD(&amp;cam-&gt;outqueue);</div><div class='del'>-	spin_unlock_irqrestore(&amp;cam-&gt;queue_lock, lock_flags);</div><div class='del'>-</div><div class='del'>-	et61x251_queue_unusedframes(cam);</div><div class='del'>-</div><div class='del'>-	PDBGG("Frame #%lu, bytes read: %zu",</div><div class='del'>-	      (unsigned long)f-&gt;buf.index, count);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-</div><div class='del'>-	return err ? err : count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static unsigned int et61x251_poll(struct file *filp, poll_table *wait)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device *cam = video_drvdata(filp);</div><div class='del'>-	struct et61x251_frame_t* f;</div><div class='del'>-	unsigned long lock_flags;</div><div class='del'>-	unsigned int mask = 0;</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;cam-&gt;fileop_mutex))</div><div class='del'>-		return POLLERR;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_DISCONNECTED) {</div><div class='del'>-		DBG(1, "Device not present");</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_MISCONFIGURED) {</div><div class='del'>-		DBG(1, "The camera is misconfigured. Close and open it "</div><div class='del'>-		       "again.");</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;io == IO_NONE) {</div><div class='del'>-		if (!et61x251_request_buffers(cam, cam-&gt;nreadbuffers,</div><div class='del'>-					      IO_READ)) {</div><div class='del'>-			DBG(1, "poll() failed, not enough memory");</div><div class='del'>-			goto error;</div><div class='del'>-		}</div><div class='del'>-		cam-&gt;io = IO_READ;</div><div class='del'>-		cam-&gt;stream = STREAM_ON;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;io == IO_READ) {</div><div class='del'>-		spin_lock_irqsave(&amp;cam-&gt;queue_lock, lock_flags);</div><div class='del'>-		list_for_each_entry(f, &amp;cam-&gt;outqueue, frame)</div><div class='del'>-			f-&gt;state = F_UNUSED;</div><div class='del'>-		INIT_LIST_HEAD(&amp;cam-&gt;outqueue);</div><div class='del'>-		spin_unlock_irqrestore(&amp;cam-&gt;queue_lock, lock_flags);</div><div class='del'>-		et61x251_queue_unusedframes(cam);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	poll_wait(filp, &amp;cam-&gt;wait_frame, wait);</div><div class='del'>-</div><div class='del'>-	if (!list_empty(&amp;cam-&gt;outqueue))</div><div class='del'>-		mask |= POLLIN | POLLRDNORM;</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-</div><div class='del'>-	return mask;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-	return POLLERR;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void et61x251_vm_open(struct vm_area_struct* vma)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_frame_t* f = vma-&gt;vm_private_data;</div><div class='del'>-	f-&gt;vma_use_count++;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void et61x251_vm_close(struct vm_area_struct* vma)</div><div class='del'>-{</div><div class='del'>-	/* NOTE: buffers are not freed here */</div><div class='del'>-	struct et61x251_frame_t* f = vma-&gt;vm_private_data;</div><div class='del'>-	f-&gt;vma_use_count--;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static const struct vm_operations_struct et61x251_vm_ops = {</div><div class='del'>-	.open = et61x251_vm_open,</div><div class='del'>-	.close = et61x251_vm_close,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int et61x251_mmap(struct file* filp, struct vm_area_struct *vma)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device *cam = video_drvdata(filp);</div><div class='del'>-	unsigned long size = vma-&gt;vm_end - vma-&gt;vm_start,</div><div class='del'>-		      start = vma-&gt;vm_start;</div><div class='del'>-	void *pos;</div><div class='del'>-	u32 i;</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;cam-&gt;fileop_mutex))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_DISCONNECTED) {</div><div class='del'>-		DBG(1, "Device not present");</div><div class='del'>-		mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_MISCONFIGURED) {</div><div class='del'>-		DBG(1, "The camera is misconfigured. Close and open it "</div><div class='del'>-		       "again.");</div><div class='del'>-		mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!(vma-&gt;vm_flags &amp; (VM_WRITE | VM_READ))) {</div><div class='del'>-		mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-		return -EACCES;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;io != IO_MMAP ||</div><div class='del'>-	    size != PAGE_ALIGN(cam-&gt;frame[0].buf.length)) {</div><div class='del'>-		mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; cam-&gt;nbuffers; i++) {</div><div class='del'>-		if ((cam-&gt;frame[i].buf.m.offset&gt;&gt;PAGE_SHIFT) == vma-&gt;vm_pgoff)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	if (i == cam-&gt;nbuffers) {</div><div class='del'>-		mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vma-&gt;vm_flags |= VM_IO;</div><div class='del'>-	vma-&gt;vm_flags |= VM_RESERVED;</div><div class='del'>-</div><div class='del'>-	pos = cam-&gt;frame[i].bufmem;</div><div class='del'>-	while (size &gt; 0) { /* size is page-aligned */</div><div class='del'>-		if (vm_insert_page(vma, start, vmalloc_to_page(pos))) {</div><div class='del'>-			mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-			return -EAGAIN;</div><div class='del'>-		}</div><div class='del'>-		start += PAGE_SIZE;</div><div class='del'>-		pos += PAGE_SIZE;</div><div class='del'>-		size -= PAGE_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vma-&gt;vm_ops = &amp;et61x251_vm_ops;</div><div class='del'>-	vma-&gt;vm_private_data = &amp;cam-&gt;frame[i];</div><div class='del'>-	et61x251_vm_open(vma);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_querycap(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_capability cap = {</div><div class='del'>-		.driver = "et61x251",</div><div class='del'>-		.version = LINUX_VERSION_CODE,</div><div class='del'>-		.capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |</div><div class='del'>-				V4L2_CAP_STREAMING,</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	strlcpy(cap.card, cam-&gt;v4ldev-&gt;name, sizeof(cap.card));</div><div class='del'>-	if (usb_make_path(cam-&gt;usbdev, cap.bus_info, sizeof(cap.bus_info)) &lt; 0)</div><div class='del'>-		strlcpy(cap.bus_info, dev_name(&amp;cam-&gt;usbdev-&gt;dev),</div><div class='del'>-			sizeof(cap.bus_info));</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;cap, sizeof(cap)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_enuminput(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_input i;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;i, arg, sizeof(i)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (i.index)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	memset(&amp;i, 0, sizeof(i));</div><div class='del'>-	strcpy(i.name, "Camera");</div><div class='del'>-	i.type = V4L2_INPUT_TYPE_CAMERA;</div><div class='del'>-	i.capabilities = V4L2_IN_CAP_STD;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;i, sizeof(i)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_g_input(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	int index = 0;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;index, sizeof(index)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_s_input(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	int index;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;index, arg, sizeof(index)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (index != 0)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_query_ctrl(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_sensor* s = &amp;cam-&gt;sensor;</div><div class='del'>-	struct v4l2_queryctrl qc;</div><div class='del'>-	u8 i;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;qc, arg, sizeof(qc)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(s-&gt;qctrl); i++)</div><div class='del'>-		if (qc.id &amp;&amp; qc.id == s-&gt;qctrl[i].id) {</div><div class='del'>-			memcpy(&amp;qc, &amp;(s-&gt;qctrl[i]), sizeof(qc));</div><div class='del'>-			if (copy_to_user(arg, &amp;qc, sizeof(qc)))</div><div class='del'>-				return -EFAULT;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_g_ctrl(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_sensor* s = &amp;cam-&gt;sensor;</div><div class='del'>-	struct v4l2_control ctrl;</div><div class='del'>-	int err = 0;</div><div class='del'>-	u8 i;</div><div class='del'>-</div><div class='del'>-	if (!s-&gt;get_ctrl &amp;&amp; !s-&gt;set_ctrl)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;ctrl, arg, sizeof(ctrl)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (!s-&gt;get_ctrl) {</div><div class='del'>-		for (i = 0; i &lt; ARRAY_SIZE(s-&gt;qctrl); i++)</div><div class='del'>-			if (ctrl.id == s-&gt;qctrl[i].id) {</div><div class='del'>-				ctrl.value = s-&gt;_qctrl[i].default_value;</div><div class='del'>-				goto exit;</div><div class='del'>-			}</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	} else</div><div class='del'>-		err = s-&gt;get_ctrl(cam, &amp;ctrl);</div><div class='del'>-</div><div class='del'>-exit:</div><div class='del'>-	if (copy_to_user(arg, &amp;ctrl, sizeof(ctrl)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_s_ctrl(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_sensor* s = &amp;cam-&gt;sensor;</div><div class='del'>-	struct v4l2_control ctrl;</div><div class='del'>-	u8 i;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (!s-&gt;set_ctrl)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;ctrl, arg, sizeof(ctrl)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(s-&gt;qctrl); i++) {</div><div class='del'>-		if (ctrl.id == s-&gt;qctrl[i].id) {</div><div class='del'>-			if (s-&gt;qctrl[i].flags &amp; V4L2_CTRL_FLAG_DISABLED)</div><div class='del'>-				return -EINVAL;</div><div class='del'>-			if (ctrl.value &lt; s-&gt;qctrl[i].minimum ||</div><div class='del'>-			    ctrl.value &gt; s-&gt;qctrl[i].maximum)</div><div class='del'>-				return -ERANGE;</div><div class='del'>-			ctrl.value -= ctrl.value % s-&gt;qctrl[i].step;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (i == ARRAY_SIZE(s-&gt;qctrl))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if ((err = s-&gt;set_ctrl(cam, &amp;ctrl)))</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	s-&gt;_qctrl[i].default_value = ctrl.value;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_cropcap(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_cropcap* cc = &amp;(cam-&gt;sensor.cropcap);</div><div class='del'>-</div><div class='del'>-	cc-&gt;type = V4L2_BUF_TYPE_VIDEO_CAPTURE;</div><div class='del'>-	cc-&gt;pixelaspect.numerator = 1;</div><div class='del'>-	cc-&gt;pixelaspect.denominator = 1;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, cc, sizeof(*cc)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_g_crop(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_sensor* s = &amp;cam-&gt;sensor;</div><div class='del'>-	struct v4l2_crop crop = {</div><div class='del'>-		.type = V4L2_BUF_TYPE_VIDEO_CAPTURE,</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;(crop.c), &amp;(s-&gt;_rect), sizeof(struct v4l2_rect));</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;crop, sizeof(crop)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_s_crop(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_sensor* s = &amp;cam-&gt;sensor;</div><div class='del'>-	struct v4l2_crop crop;</div><div class='del'>-	struct v4l2_rect* rect;</div><div class='del'>-	struct v4l2_rect* bounds = &amp;(s-&gt;cropcap.bounds);</div><div class='del'>-	struct v4l2_pix_format* pix_format = &amp;(s-&gt;pix_format);</div><div class='del'>-	u8 scale;</div><div class='del'>-	const enum et61x251_stream_state stream = cam-&gt;stream;</div><div class='del'>-	const u32 nbuffers = cam-&gt;nbuffers;</div><div class='del'>-	u32 i;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;crop, arg, sizeof(crop)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	rect = &amp;(crop.c);</div><div class='del'>-</div><div class='del'>-	if (crop.type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;module_param.force_munmap)</div><div class='del'>-		for (i = 0; i &lt; cam-&gt;nbuffers; i++)</div><div class='del'>-			if (cam-&gt;frame[i].vma_use_count) {</div><div class='del'>-				DBG(3, "VIDIOC_S_CROP failed. "</div><div class='del'>-				       "Unmap the buffers first.");</div><div class='del'>-				return -EBUSY;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-	/* Preserve R,G or B origin */</div><div class='del'>-	rect-&gt;left = (s-&gt;_rect.left &amp; 1L) ? rect-&gt;left | 1L : rect-&gt;left &amp; ~1L;</div><div class='del'>-	rect-&gt;top = (s-&gt;_rect.top &amp; 1L) ? rect-&gt;top | 1L : rect-&gt;top &amp; ~1L;</div><div class='del'>-</div><div class='del'>-	if (rect-&gt;width &lt; 16)</div><div class='del'>-		rect-&gt;width = 16;</div><div class='del'>-	if (rect-&gt;height &lt; 16)</div><div class='del'>-		rect-&gt;height = 16;</div><div class='del'>-	if (rect-&gt;width &gt; bounds-&gt;width)</div><div class='del'>-		rect-&gt;width = bounds-&gt;width;</div><div class='del'>-	if (rect-&gt;height &gt; bounds-&gt;height)</div><div class='del'>-		rect-&gt;height = bounds-&gt;height;</div><div class='del'>-	if (rect-&gt;left &lt; bounds-&gt;left)</div><div class='del'>-		rect-&gt;left = bounds-&gt;left;</div><div class='del'>-	if (rect-&gt;top &lt; bounds-&gt;top)</div><div class='del'>-		rect-&gt;top = bounds-&gt;top;</div><div class='del'>-	if (rect-&gt;left + rect-&gt;width &gt; bounds-&gt;left + bounds-&gt;width)</div><div class='del'>-		rect-&gt;left = bounds-&gt;left+bounds-&gt;width - rect-&gt;width;</div><div class='del'>-	if (rect-&gt;top + rect-&gt;height &gt; bounds-&gt;top + bounds-&gt;height)</div><div class='del'>-		rect-&gt;top = bounds-&gt;top+bounds-&gt;height - rect-&gt;height;</div><div class='del'>-</div><div class='del'>-	rect-&gt;width &amp;= ~15L;</div><div class='del'>-	rect-&gt;height &amp;= ~15L;</div><div class='del'>-</div><div class='del'>-	if (ET61X251_PRESERVE_IMGSCALE) {</div><div class='del'>-		/* Calculate the actual scaling factor */</div><div class='del'>-		u32 a, b;</div><div class='del'>-		a = rect-&gt;width * rect-&gt;height;</div><div class='del'>-		b = pix_format-&gt;width * pix_format-&gt;height;</div><div class='del'>-		scale = b ? (u8)((a / b) &lt; 4 ? 1 : 2) : 1;</div><div class='del'>-	} else</div><div class='del'>-		scale = 1;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;stream == STREAM_ON)</div><div class='del'>-		if ((err = et61x251_stream_interrupt(cam)))</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;crop, sizeof(crop))) {</div><div class='del'>-		cam-&gt;stream = stream;</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;module_param.force_munmap || cam-&gt;io == IO_READ)</div><div class='del'>-		et61x251_release_buffers(cam);</div><div class='del'>-</div><div class='del'>-	err = et61x251_set_crop(cam, rect);</div><div class='del'>-	if (s-&gt;set_crop)</div><div class='del'>-		err += s-&gt;set_crop(cam, rect);</div><div class='del'>-	err += et61x251_set_scale(cam, scale);</div><div class='del'>-</div><div class='del'>-	if (err) { /* atomic, no rollback in ioctl() */</div><div class='del'>-		cam-&gt;state |= DEV_MISCONFIGURED;</div><div class='del'>-		DBG(1, "VIDIOC_S_CROP failed because of hardware problems. To "</div><div class='del'>-		       "use the camera, close and open %s again.",</div><div class='del'>-		    video_device_node_name(cam-&gt;v4ldev));</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	s-&gt;pix_format.width = rect-&gt;width/scale;</div><div class='del'>-	s-&gt;pix_format.height = rect-&gt;height/scale;</div><div class='del'>-	memcpy(&amp;(s-&gt;_rect), rect, sizeof(*rect));</div><div class='del'>-</div><div class='del'>-	if ((cam-&gt;module_param.force_munmap  || cam-&gt;io == IO_READ) &amp;&amp;</div><div class='del'>-	    nbuffers != et61x251_request_buffers(cam, nbuffers, cam-&gt;io)) {</div><div class='del'>-		cam-&gt;state |= DEV_MISCONFIGURED;</div><div class='del'>-		DBG(1, "VIDIOC_S_CROP failed because of not enough memory. To "</div><div class='del'>-		       "use the camera, close and open %s again.",</div><div class='del'>-		    video_device_node_name(cam-&gt;v4ldev));</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;io == IO_READ)</div><div class='del'>-		et61x251_empty_framequeues(cam);</div><div class='del'>-	else if (cam-&gt;module_param.force_munmap)</div><div class='del'>-		et61x251_requeue_outqueue(cam);</div><div class='del'>-</div><div class='del'>-	cam-&gt;stream = stream;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_enum_framesizes(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_frmsizeenum frmsize;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;frmsize, arg, sizeof(frmsize)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (frmsize.index != 0)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (frmsize.pixel_format != V4L2_PIX_FMT_ET61X251 &amp;&amp;</div><div class='del'>-	    frmsize.pixel_format != V4L2_PIX_FMT_SBGGR8)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	frmsize.type = V4L2_FRMSIZE_TYPE_STEPWISE;</div><div class='del'>-	frmsize.stepwise.min_width = frmsize.stepwise.step_width = 16;</div><div class='del'>-	frmsize.stepwise.min_height = frmsize.stepwise.step_height = 16;</div><div class='del'>-	frmsize.stepwise.max_width = cam-&gt;sensor.cropcap.bounds.width;</div><div class='del'>-	frmsize.stepwise.max_height = cam-&gt;sensor.cropcap.bounds.height;</div><div class='del'>-	memset(&amp;frmsize.reserved, 0, sizeof(frmsize.reserved));</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;frmsize, sizeof(frmsize)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_enum_fmt(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_fmtdesc fmtd;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;fmtd, arg, sizeof(fmtd)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (fmtd.type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (fmtd.index == 0) {</div><div class='del'>-		strcpy(fmtd.description, "bayer rgb");</div><div class='del'>-		fmtd.pixelformat = V4L2_PIX_FMT_SBGGR8;</div><div class='del'>-	} else if (fmtd.index == 1) {</div><div class='del'>-		strcpy(fmtd.description, "compressed");</div><div class='del'>-		fmtd.pixelformat = V4L2_PIX_FMT_ET61X251;</div><div class='del'>-		fmtd.flags = V4L2_FMT_FLAG_COMPRESSED;</div><div class='del'>-	} else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	fmtd.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;</div><div class='del'>-	memset(&amp;fmtd.reserved, 0, sizeof(fmtd.reserved));</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;fmtd, sizeof(fmtd)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_g_fmt(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_format format;</div><div class='del'>-	struct v4l2_pix_format* pfmt = &amp;(cam-&gt;sensor.pix_format);</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;format, arg, sizeof(format)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (format.type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	pfmt-&gt;colorspace = (pfmt-&gt;pixelformat == V4L2_PIX_FMT_ET61X251) ?</div><div class='del'>-			   0 : V4L2_COLORSPACE_SRGB;</div><div class='del'>-	pfmt-&gt;bytesperline = (pfmt-&gt;pixelformat==V4L2_PIX_FMT_ET61X251)</div><div class='del'>-			     ? 0 : (pfmt-&gt;width * pfmt-&gt;priv) / 8;</div><div class='del'>-	pfmt-&gt;sizeimage = pfmt-&gt;height * ((pfmt-&gt;width*pfmt-&gt;priv)/8);</div><div class='del'>-	pfmt-&gt;field = V4L2_FIELD_NONE;</div><div class='del'>-	memcpy(&amp;(format.fmt.pix), pfmt, sizeof(*pfmt));</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;format, sizeof(format)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_try_s_fmt(struct et61x251_device* cam, unsigned int cmd,</div><div class='del'>-			  void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_sensor* s = &amp;cam-&gt;sensor;</div><div class='del'>-	struct v4l2_format format;</div><div class='del'>-	struct v4l2_pix_format* pix;</div><div class='del'>-	struct v4l2_pix_format* pfmt = &amp;(s-&gt;pix_format);</div><div class='del'>-	struct v4l2_rect* bounds = &amp;(s-&gt;cropcap.bounds);</div><div class='del'>-	struct v4l2_rect rect;</div><div class='del'>-	u8 scale;</div><div class='del'>-	const enum et61x251_stream_state stream = cam-&gt;stream;</div><div class='del'>-	const u32 nbuffers = cam-&gt;nbuffers;</div><div class='del'>-	u32 i;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;format, arg, sizeof(format)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	pix = &amp;(format.fmt.pix);</div><div class='del'>-</div><div class='del'>-	if (format.type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;rect, &amp;(s-&gt;_rect), sizeof(rect));</div><div class='del'>-</div><div class='del'>-	{ /* calculate the actual scaling factor */</div><div class='del'>-		u32 a, b;</div><div class='del'>-		a = rect.width * rect.height;</div><div class='del'>-		b = pix-&gt;width * pix-&gt;height;</div><div class='del'>-		scale = b ? (u8)((a / b) &lt; 4 ? 1 : 2) : 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rect.width = scale * pix-&gt;width;</div><div class='del'>-	rect.height = scale * pix-&gt;height;</div><div class='del'>-</div><div class='del'>-	if (rect.width &lt; 16)</div><div class='del'>-		rect.width = 16;</div><div class='del'>-	if (rect.height &lt; 16)</div><div class='del'>-		rect.height = 16;</div><div class='del'>-	if (rect.width &gt; bounds-&gt;left + bounds-&gt;width - rect.left)</div><div class='del'>-		rect.width = bounds-&gt;left + bounds-&gt;width - rect.left;</div><div class='del'>-	if (rect.height &gt; bounds-&gt;top + bounds-&gt;height - rect.top)</div><div class='del'>-		rect.height = bounds-&gt;top + bounds-&gt;height - rect.top;</div><div class='del'>-</div><div class='del'>-	rect.width &amp;= ~15L;</div><div class='del'>-	rect.height &amp;= ~15L;</div><div class='del'>-</div><div class='del'>-	{ /* adjust the scaling factor */</div><div class='del'>-		u32 a, b;</div><div class='del'>-		a = rect.width * rect.height;</div><div class='del'>-		b = pix-&gt;width * pix-&gt;height;</div><div class='del'>-		scale = b ? (u8)((a / b) &lt; 4 ? 1 : 2) : 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pix-&gt;width = rect.width / scale;</div><div class='del'>-	pix-&gt;height = rect.height / scale;</div><div class='del'>-</div><div class='del'>-	if (pix-&gt;pixelformat != V4L2_PIX_FMT_ET61X251 &amp;&amp;</div><div class='del'>-	    pix-&gt;pixelformat != V4L2_PIX_FMT_SBGGR8)</div><div class='del'>-		pix-&gt;pixelformat = pfmt-&gt;pixelformat;</div><div class='del'>-	pix-&gt;priv = pfmt-&gt;priv; /* bpp */</div><div class='del'>-	pix-&gt;colorspace = (pix-&gt;pixelformat == V4L2_PIX_FMT_ET61X251) ?</div><div class='del'>-			  0 : V4L2_COLORSPACE_SRGB;</div><div class='del'>-	pix-&gt;colorspace = pfmt-&gt;colorspace;</div><div class='del'>-	pix-&gt;bytesperline = (pix-&gt;pixelformat == V4L2_PIX_FMT_ET61X251)</div><div class='del'>-			    ? 0 : (pix-&gt;width * pix-&gt;priv) / 8;</div><div class='del'>-	pix-&gt;sizeimage = pix-&gt;height * ((pix-&gt;width * pix-&gt;priv) / 8);</div><div class='del'>-	pix-&gt;field = V4L2_FIELD_NONE;</div><div class='del'>-</div><div class='del'>-	if (cmd == VIDIOC_TRY_FMT) {</div><div class='del'>-		if (copy_to_user(arg, &amp;format, sizeof(format)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;module_param.force_munmap)</div><div class='del'>-		for (i = 0; i &lt; cam-&gt;nbuffers; i++)</div><div class='del'>-			if (cam-&gt;frame[i].vma_use_count) {</div><div class='del'>-				DBG(3, "VIDIOC_S_FMT failed. "</div><div class='del'>-				       "Unmap the buffers first.");</div><div class='del'>-				return -EBUSY;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;stream == STREAM_ON)</div><div class='del'>-		if ((err = et61x251_stream_interrupt(cam)))</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;format, sizeof(format))) {</div><div class='del'>-		cam-&gt;stream = stream;</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;module_param.force_munmap || cam-&gt;io == IO_READ)</div><div class='del'>-		et61x251_release_buffers(cam);</div><div class='del'>-</div><div class='del'>-	err += et61x251_set_pix_format(cam, pix);</div><div class='del'>-	err += et61x251_set_crop(cam, &amp;rect);</div><div class='del'>-	if (s-&gt;set_pix_format)</div><div class='del'>-		err += s-&gt;set_pix_format(cam, pix);</div><div class='del'>-	if (s-&gt;set_crop)</div><div class='del'>-		err += s-&gt;set_crop(cam, &amp;rect);</div><div class='del'>-	err += et61x251_set_scale(cam, scale);</div><div class='del'>-</div><div class='del'>-	if (err) { /* atomic, no rollback in ioctl() */</div><div class='del'>-		cam-&gt;state |= DEV_MISCONFIGURED;</div><div class='del'>-		DBG(1, "VIDIOC_S_FMT failed because of hardware problems. To "</div><div class='del'>-		       "use the camera, close and open %s again.",</div><div class='del'>-		    video_device_node_name(cam-&gt;v4ldev));</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(pfmt, pix, sizeof(*pix));</div><div class='del'>-	memcpy(&amp;(s-&gt;_rect), &amp;rect, sizeof(rect));</div><div class='del'>-</div><div class='del'>-	if ((cam-&gt;module_param.force_munmap  || cam-&gt;io == IO_READ) &amp;&amp;</div><div class='del'>-	    nbuffers != et61x251_request_buffers(cam, nbuffers, cam-&gt;io)) {</div><div class='del'>-		cam-&gt;state |= DEV_MISCONFIGURED;</div><div class='del'>-		DBG(1, "VIDIOC_S_FMT failed because of not enough memory. To "</div><div class='del'>-		       "use the camera, close and open %s again.",</div><div class='del'>-		    video_device_node_name(cam-&gt;v4ldev));</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;io == IO_READ)</div><div class='del'>-		et61x251_empty_framequeues(cam);</div><div class='del'>-	else if (cam-&gt;module_param.force_munmap)</div><div class='del'>-		et61x251_requeue_outqueue(cam);</div><div class='del'>-</div><div class='del'>-	cam-&gt;stream = stream;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_g_jpegcomp(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	if (copy_to_user(arg, &amp;cam-&gt;compression,</div><div class='del'>-			 sizeof(cam-&gt;compression)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_s_jpegcomp(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_jpegcompression jc;</div><div class='del'>-	const enum et61x251_stream_state stream = cam-&gt;stream;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;jc, arg, sizeof(jc)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (jc.quality != 0 &amp;&amp; jc.quality != 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;stream == STREAM_ON)</div><div class='del'>-		if ((err = et61x251_stream_interrupt(cam)))</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-	err += et61x251_set_compression(cam, &amp;jc);</div><div class='del'>-	if (err) { /* atomic, no rollback in ioctl() */</div><div class='del'>-		cam-&gt;state |= DEV_MISCONFIGURED;</div><div class='del'>-		DBG(1, "VIDIOC_S_JPEGCOMP failed because of hardware "</div><div class='del'>-		       "problems. To use the camera, close and open "</div><div class='del'>-		       "%s again.", video_device_node_name(cam-&gt;v4ldev));</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cam-&gt;compression.quality = jc.quality;</div><div class='del'>-</div><div class='del'>-	cam-&gt;stream = stream;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_reqbufs(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_requestbuffers rb;</div><div class='del'>-	u32 i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;rb, arg, sizeof(rb)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (rb.type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||</div><div class='del'>-	    rb.memory != V4L2_MEMORY_MMAP)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;io == IO_READ) {</div><div class='del'>-		DBG(3, "Close and open the device again to choose the mmap "</div><div class='del'>-		       "I/O method");</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; cam-&gt;nbuffers; i++)</div><div class='del'>-		if (cam-&gt;frame[i].vma_use_count) {</div><div class='del'>-			DBG(3, "VIDIOC_REQBUFS failed. "</div><div class='del'>-			       "Previous buffers are still mapped.");</div><div class='del'>-			return -EBUSY;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;stream == STREAM_ON)</div><div class='del'>-		if ((err = et61x251_stream_interrupt(cam)))</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-	et61x251_empty_framequeues(cam);</div><div class='del'>-</div><div class='del'>-	et61x251_release_buffers(cam);</div><div class='del'>-	if (rb.count)</div><div class='del'>-		rb.count = et61x251_request_buffers(cam, rb.count, IO_MMAP);</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;rb, sizeof(rb))) {</div><div class='del'>-		et61x251_release_buffers(cam);</div><div class='del'>-		cam-&gt;io = IO_NONE;</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cam-&gt;io = rb.count ? IO_MMAP : IO_NONE;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_querybuf(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_buffer b;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;b, arg, sizeof(b)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (b.type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||</div><div class='del'>-	    b.index &gt;= cam-&gt;nbuffers || cam-&gt;io != IO_MMAP)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;b, &amp;cam-&gt;frame[b.index].buf, sizeof(b));</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;frame[b.index].vma_use_count)</div><div class='del'>-		b.flags |= V4L2_BUF_FLAG_MAPPED;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;frame[b.index].state == F_DONE)</div><div class='del'>-		b.flags |= V4L2_BUF_FLAG_DONE;</div><div class='del'>-	else if (cam-&gt;frame[b.index].state != F_UNUSED)</div><div class='del'>-		b.flags |= V4L2_BUF_FLAG_QUEUED;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;b, sizeof(b)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_qbuf(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_buffer b;</div><div class='del'>-	unsigned long lock_flags;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;b, arg, sizeof(b)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (b.type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||</div><div class='del'>-	    b.index &gt;= cam-&gt;nbuffers || cam-&gt;io != IO_MMAP)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;frame[b.index].state != F_UNUSED)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	cam-&gt;frame[b.index].state = F_QUEUED;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;cam-&gt;queue_lock, lock_flags);</div><div class='del'>-	list_add_tail(&amp;cam-&gt;frame[b.index].frame, &amp;cam-&gt;inqueue);</div><div class='del'>-	spin_unlock_irqrestore(&amp;cam-&gt;queue_lock, lock_flags);</div><div class='del'>-</div><div class='del'>-	PDBGG("Frame #%lu queued", (unsigned long)b.index);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_dqbuf(struct et61x251_device* cam, struct file* filp,</div><div class='del'>-		      void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_buffer b;</div><div class='del'>-	struct et61x251_frame_t *f;</div><div class='del'>-	unsigned long lock_flags;</div><div class='del'>-	long timeout;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;b, arg, sizeof(b)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (b.type != V4L2_BUF_TYPE_VIDEO_CAPTURE || cam-&gt;io!= IO_MMAP)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (list_empty(&amp;cam-&gt;outqueue)) {</div><div class='del'>-		if (cam-&gt;stream == STREAM_OFF)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		if (filp-&gt;f_flags &amp; O_NONBLOCK)</div><div class='del'>-			return -EAGAIN;</div><div class='del'>-		timeout = wait_event_interruptible_timeout</div><div class='del'>-			  ( cam-&gt;wait_frame,</div><div class='del'>-			    (!list_empty(&amp;cam-&gt;outqueue)) ||</div><div class='del'>-			    (cam-&gt;state &amp; DEV_DISCONNECTED) ||</div><div class='del'>-			    (cam-&gt;state &amp; DEV_MISCONFIGURED),</div><div class='del'>-			    cam-&gt;module_param.frame_timeout *</div><div class='del'>-			    1000 * msecs_to_jiffies(1) );</div><div class='del'>-		if (timeout &lt; 0)</div><div class='del'>-			return timeout;</div><div class='del'>-		if (cam-&gt;state &amp; DEV_DISCONNECTED)</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		if (!timeout || (cam-&gt;state &amp; DEV_MISCONFIGURED))</div><div class='del'>-			return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;cam-&gt;queue_lock, lock_flags);</div><div class='del'>-	f = list_entry(cam-&gt;outqueue.next, struct et61x251_frame_t, frame);</div><div class='del'>-	list_del(cam-&gt;outqueue.next);</div><div class='del'>-	spin_unlock_irqrestore(&amp;cam-&gt;queue_lock, lock_flags);</div><div class='del'>-</div><div class='del'>-	f-&gt;state = F_UNUSED;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;b, &amp;f-&gt;buf, sizeof(b));</div><div class='del'>-	if (f-&gt;vma_use_count)</div><div class='del'>-		b.flags |= V4L2_BUF_FLAG_MAPPED;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;b, sizeof(b)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	PDBGG("Frame #%lu dequeued", (unsigned long)f-&gt;buf.index);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_streamon(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	int type;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;type, arg, sizeof(type)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE || cam-&gt;io != IO_MMAP)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	cam-&gt;stream = STREAM_ON;</div><div class='del'>-</div><div class='del'>-	DBG(3, "Stream on");</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_streamoff(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	int type, err;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;type, arg, sizeof(type)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE || cam-&gt;io != IO_MMAP)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;stream == STREAM_ON)</div><div class='del'>-		if ((err = et61x251_stream_interrupt(cam)))</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-	et61x251_empty_framequeues(cam);</div><div class='del'>-</div><div class='del'>-	DBG(3, "Stream off");</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_g_parm(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_streamparm sp;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;sp, arg, sizeof(sp)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (sp.type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	sp.parm.capture.extendedmode = 0;</div><div class='del'>-	sp.parm.capture.readbuffers = cam-&gt;nreadbuffers;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;sp, sizeof(sp)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-et61x251_vidioc_s_parm(struct et61x251_device* cam, void __user * arg)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_streamparm sp;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;sp, arg, sizeof(sp)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (sp.type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	sp.parm.capture.extendedmode = 0;</div><div class='del'>-</div><div class='del'>-	if (sp.parm.capture.readbuffers == 0)</div><div class='del'>-		sp.parm.capture.readbuffers = cam-&gt;nreadbuffers;</div><div class='del'>-</div><div class='del'>-	if (sp.parm.capture.readbuffers &gt; ET61X251_MAX_FRAMES)</div><div class='del'>-		sp.parm.capture.readbuffers = ET61X251_MAX_FRAMES;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(arg, &amp;sp, sizeof(sp)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	cam-&gt;nreadbuffers = sp.parm.capture.readbuffers;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static long et61x251_ioctl_v4l2(struct file *filp,</div><div class='del'>-			       unsigned int cmd, void __user *arg)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device *cam = video_drvdata(filp);</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-</div><div class='del'>-	case VIDIOC_QUERYCAP:</div><div class='del'>-		return et61x251_vidioc_querycap(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_ENUMINPUT:</div><div class='del'>-		return et61x251_vidioc_enuminput(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_G_INPUT:</div><div class='del'>-		return et61x251_vidioc_g_input(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_S_INPUT:</div><div class='del'>-		return et61x251_vidioc_s_input(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_QUERYCTRL:</div><div class='del'>-		return et61x251_vidioc_query_ctrl(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_G_CTRL:</div><div class='del'>-		return et61x251_vidioc_g_ctrl(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_S_CTRL:</div><div class='del'>-		return et61x251_vidioc_s_ctrl(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_CROPCAP:</div><div class='del'>-		return et61x251_vidioc_cropcap(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_G_CROP:</div><div class='del'>-		return et61x251_vidioc_g_crop(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_S_CROP:</div><div class='del'>-		return et61x251_vidioc_s_crop(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_ENUM_FMT:</div><div class='del'>-		return et61x251_vidioc_enum_fmt(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_G_FMT:</div><div class='del'>-		return et61x251_vidioc_g_fmt(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_TRY_FMT:</div><div class='del'>-	case VIDIOC_S_FMT:</div><div class='del'>-		return et61x251_vidioc_try_s_fmt(cam, cmd, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_ENUM_FRAMESIZES:</div><div class='del'>-		return et61x251_vidioc_enum_framesizes(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_G_JPEGCOMP:</div><div class='del'>-		return et61x251_vidioc_g_jpegcomp(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_S_JPEGCOMP:</div><div class='del'>-		return et61x251_vidioc_s_jpegcomp(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_REQBUFS:</div><div class='del'>-		return et61x251_vidioc_reqbufs(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_QUERYBUF:</div><div class='del'>-		return et61x251_vidioc_querybuf(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_QBUF:</div><div class='del'>-		return et61x251_vidioc_qbuf(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_DQBUF:</div><div class='del'>-		return et61x251_vidioc_dqbuf(cam, filp, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_STREAMON:</div><div class='del'>-		return et61x251_vidioc_streamon(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_STREAMOFF:</div><div class='del'>-		return et61x251_vidioc_streamoff(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_G_PARM:</div><div class='del'>-		return et61x251_vidioc_g_parm(cam, arg);</div><div class='del'>-</div><div class='del'>-	case VIDIOC_S_PARM:</div><div class='del'>-		return et61x251_vidioc_s_parm(cam, arg);</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return -ENOTTY;</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static long et61x251_ioctl(struct file *filp,</div><div class='del'>-			 unsigned int cmd, unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device *cam = video_drvdata(filp);</div><div class='del'>-	long err = 0;</div><div class='del'>-</div><div class='del'>-	if (mutex_lock_interruptible(&amp;cam-&gt;fileop_mutex))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_DISCONNECTED) {</div><div class='del'>-		DBG(1, "Device not present");</div><div class='del'>-		mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;state &amp; DEV_MISCONFIGURED) {</div><div class='del'>-		DBG(1, "The camera is misconfigured. Close and open it "</div><div class='del'>-		       "again.");</div><div class='del'>-		mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	V4LDBG(3, "et61x251", cmd);</div><div class='del'>-</div><div class='del'>-	err = et61x251_ioctl_v4l2(filp, cmd, (void __user *)arg);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;cam-&gt;fileop_mutex);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static const struct v4l2_file_operations et61x251_fops = {</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-	.open =    et61x251_open,</div><div class='del'>-	.release = et61x251_release,</div><div class='del'>-	.unlocked_ioctl =   et61x251_ioctl,</div><div class='del'>-	.read =    et61x251_read,</div><div class='del'>-	.poll =    et61x251_poll,</div><div class='del'>-	.mmap =    et61x251_mmap,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-/* It exists a single interface only. We do not need to validate anything. */</div><div class='del'>-static int</div><div class='del'>-et61x251_usb_probe(struct usb_interface* intf, const struct usb_device_id* id)</div><div class='del'>-{</div><div class='del'>-	struct usb_device *udev = interface_to_usbdev(intf);</div><div class='del'>-	struct et61x251_device* cam;</div><div class='del'>-	static unsigned int dev_nr;</div><div class='del'>-	unsigned int i;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (!(cam = kzalloc(sizeof(struct et61x251_device), GFP_KERNEL)))</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	cam-&gt;usbdev = udev;</div><div class='del'>-</div><div class='del'>-	if (!(cam-&gt;control_buffer = kzalloc(8, GFP_KERNEL))) {</div><div class='del'>-		DBG(1, "kmalloc() failed");</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!(cam-&gt;v4ldev = video_device_alloc())) {</div><div class='del'>-		DBG(1, "video_device_alloc() failed");</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DBG(2, "ET61X[12]51 PC Camera Controller detected "</div><div class='del'>-	       "(vid/pid 0x%04X:0x%04X)",id-&gt;idVendor, id-&gt;idProduct);</div><div class='del'>-</div><div class='del'>-	for  (i = 0; et61x251_sensor_table[i]; i++) {</div><div class='del'>-		err = et61x251_sensor_table[i](cam);</div><div class='del'>-		if (!err)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!err)</div><div class='del'>-		DBG(2, "%s image sensor detected", cam-&gt;sensor.name);</div><div class='del'>-	else {</div><div class='del'>-		DBG(1, "No supported image sensor detected");</div><div class='del'>-		err = -ENODEV;</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (et61x251_init(cam)) {</div><div class='del'>-		DBG(1, "Initialization failed. I will retry on open().");</div><div class='del'>-		cam-&gt;state |= DEV_MISCONFIGURED;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	strcpy(cam-&gt;v4ldev-&gt;name, "ET61X[12]51 PC Camera");</div><div class='del'>-	cam-&gt;v4ldev-&gt;fops = &amp;et61x251_fops;</div><div class='del'>-	cam-&gt;v4ldev-&gt;release = video_device_release;</div><div class='del'>-	cam-&gt;v4ldev-&gt;parent = &amp;udev-&gt;dev;</div><div class='del'>-	video_set_drvdata(cam-&gt;v4ldev, cam);</div><div class='del'>-</div><div class='del'>-	init_completion(&amp;cam-&gt;probe);</div><div class='del'>-</div><div class='del'>-	err = video_register_device(cam-&gt;v4ldev, VFL_TYPE_GRABBER,</div><div class='del'>-				    video_nr[dev_nr]);</div><div class='del'>-	if (err) {</div><div class='del'>-		DBG(1, "V4L2 device registration failed");</div><div class='del'>-		if (err == -ENFILE &amp;&amp; video_nr[dev_nr] == -1)</div><div class='del'>-			DBG(1, "Free /dev/videoX node not found");</div><div class='del'>-		video_nr[dev_nr] = -1;</div><div class='del'>-		dev_nr = (dev_nr &lt; ET61X251_MAX_DEVICES-1) ? dev_nr+1 : 0;</div><div class='del'>-		complete_all(&amp;cam-&gt;probe);</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DBG(2, "V4L2 device registered as %s",</div><div class='del'>-	    video_device_node_name(cam-&gt;v4ldev));</div><div class='del'>-</div><div class='del'>-	cam-&gt;module_param.force_munmap = force_munmap[dev_nr];</div><div class='del'>-	cam-&gt;module_param.frame_timeout = frame_timeout[dev_nr];</div><div class='del'>-</div><div class='del'>-	dev_nr = (dev_nr &lt; ET61X251_MAX_DEVICES-1) ? dev_nr+1 : 0;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_VIDEO_ADV_DEBUG</div><div class='del'>-	err = et61x251_create_sysfs(cam);</div><div class='del'>-	if (!err)</div><div class='del'>-		DBG(2, "Optional device control through 'sysfs' "</div><div class='del'>-		       "interface ready");</div><div class='del'>-	else</div><div class='del'>-		DBG(2, "Failed to create 'sysfs' interface for optional "</div><div class='del'>-		       "device controlling. Error #%d", err);</div><div class='del'>-#else</div><div class='del'>-	DBG(2, "Optional device control through 'sysfs' interface disabled");</div><div class='del'>-	DBG(3, "Compile the kernel with the 'CONFIG_VIDEO_ADV_DEBUG' "</div><div class='del'>-	       "configuration option to enable it.");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	usb_set_intfdata(intf, cam);</div><div class='del'>-	kref_init(&amp;cam-&gt;kref);</div><div class='del'>-	usb_get_dev(cam-&gt;usbdev);</div><div class='del'>-</div><div class='del'>-	complete_all(&amp;cam-&gt;probe);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-fail:</div><div class='del'>-	if (cam) {</div><div class='del'>-		kfree(cam-&gt;control_buffer);</div><div class='del'>-		if (cam-&gt;v4ldev)</div><div class='del'>-			video_device_release(cam-&gt;v4ldev);</div><div class='del'>-		kfree(cam);</div><div class='del'>-	}</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void et61x251_usb_disconnect(struct usb_interface* intf)</div><div class='del'>-{</div><div class='del'>-	struct et61x251_device* cam;</div><div class='del'>-</div><div class='del'>-	down_write(&amp;et61x251_dev_lock);</div><div class='del'>-</div><div class='del'>-	cam = usb_get_intfdata(intf);</div><div class='del'>-</div><div class='del'>-	DBG(2, "Disconnecting %s...", cam-&gt;v4ldev-&gt;name);</div><div class='del'>-</div><div class='del'>-	if (cam-&gt;users) {</div><div class='del'>-		DBG(2, "Device %s is open! Deregistration and memory "</div><div class='del'>-		       "deallocation are deferred.",</div><div class='del'>-		    video_device_node_name(cam-&gt;v4ldev));</div><div class='del'>-		cam-&gt;state |= DEV_MISCONFIGURED;</div><div class='del'>-		et61x251_stop_transfer(cam);</div><div class='del'>-		cam-&gt;state |= DEV_DISCONNECTED;</div><div class='del'>-		wake_up_interruptible(&amp;cam-&gt;wait_frame);</div><div class='del'>-		wake_up(&amp;cam-&gt;wait_stream);</div><div class='del'>-	} else</div><div class='del'>-		cam-&gt;state |= DEV_DISCONNECTED;</div><div class='del'>-</div><div class='del'>-	wake_up_interruptible_all(&amp;cam-&gt;wait_open);</div><div class='del'>-</div><div class='del'>-	kref_put(&amp;cam-&gt;kref, et61x251_release_resources);</div><div class='del'>-</div><div class='del'>-	up_write(&amp;et61x251_dev_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static struct usb_driver et61x251_usb_driver = {</div><div class='del'>-	.name =       "et61x251",</div><div class='del'>-	.id_table =   et61x251_id_table,</div><div class='del'>-	.probe =      et61x251_usb_probe,</div><div class='del'>-	.disconnect = et61x251_usb_disconnect,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-module_usb_driver(et61x251_usb_driver);</div><div class='head'>diff --git a/drivers/media/video/et61x251/et61x251_sensor.h b/drivers/media/video/et61x251/et61x251_sensor.h<br/>deleted file mode 100644<br/>index 71a03148cb09..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/et61x251/et61x251_sensor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/et61x251/et61x251_sensor.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,108 +0,0 @@</div><div class='del'>-/***************************************************************************</div><div class='del'>- * API for image sensors connected to ET61X[12]51 PC Camera Controllers    *</div><div class='del'>- *                                                                         *</div><div class='del'>- * Copyright (C) 2006-2007 by Luca Risolia &lt;luca.risolia@studio.unibo.it&gt;  *</div><div class='del'>- *                                                                         *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify    *</div><div class='del'>- * it under the terms of the GNU General Public License as published by    *</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or       *</div><div class='del'>- * (at your option) any later version.                                     *</div><div class='del'>- *                                                                         *</div><div class='del'>- * This program is distributed in the hope that it will be useful,         *</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of          *</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the           *</div><div class='del'>- * GNU General Public License for more details.                            *</div><div class='del'>- *                                                                         *</div><div class='del'>- * You should have received a copy of the GNU General Public License       *</div><div class='del'>- * along with this program; if not, write to the Free Software             *</div><div class='del'>- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.               *</div><div class='del'>- ***************************************************************************/</div><div class='del'>-</div><div class='del'>-#ifndef _ET61X251_SENSOR_H_</div><div class='del'>-#define _ET61X251_SENSOR_H_</div><div class='del'>-</div><div class='del'>-#include &lt;linux/usb.h&gt;</div><div class='del'>-#include &lt;linux/videodev2.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/stddef.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;asm/types.h&gt;</div><div class='del'>-</div><div class='del'>-struct et61x251_device;</div><div class='del'>-struct et61x251_sensor;</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-extern int et61x251_probe_tas5130d1b(struct et61x251_device* cam);</div><div class='del'>-</div><div class='del'>-#define ET61X251_SENSOR_TABLE                                                 \</div><div class='del'>-/* Weak detections must go at the end of the list */                          \</div><div class='del'>-static int (*et61x251_sensor_table[])(struct et61x251_device*) = {            \</div><div class='del'>-	&amp;et61x251_probe_tas5130d1b,                                           \</div><div class='del'>-	NULL,                                                                 \</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct et61x251_device*</div><div class='del'>-et61x251_match_id(struct et61x251_device* cam, const struct usb_device_id *id);</div><div class='del'>-</div><div class='del'>-extern void</div><div class='del'>-et61x251_attach_sensor(struct et61x251_device* cam,</div><div class='del'>-		       const struct et61x251_sensor* sensor);</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-extern int et61x251_write_reg(struct et61x251_device*, u8 value, u16 index);</div><div class='del'>-extern int et61x251_i2c_raw_write(struct et61x251_device*, u8 n, u8 data1,</div><div class='del'>-				  u8 data2, u8 data3, u8 data4, u8 data5,</div><div class='del'>-				  u8 data6, u8 data7, u8 data8, u8 address);</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-enum et61x251_i2c_sysfs_ops {</div><div class='del'>-	ET61X251_I2C_READ = 0x01,</div><div class='del'>-	ET61X251_I2C_WRITE = 0x02,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum et61x251_i2c_interface {</div><div class='del'>-	ET61X251_I2C_2WIRES,</div><div class='del'>-	ET61X251_I2C_3WIRES,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Repeat start condition when RSTA is high */</div><div class='del'>-enum et61x251_i2c_rsta {</div><div class='del'>-	ET61X251_I2C_RSTA_STOP = 0x00, /* stop then start */</div><div class='del'>-	ET61X251_I2C_RSTA_REPEAT = 0x01, /* repeat start */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ET61X251_MAX_CTRLS (V4L2_CID_LASTP1-V4L2_CID_BASE+10)</div><div class='del'>-</div><div class='del'>-struct et61x251_sensor {</div><div class='del'>-	char name[32];</div><div class='del'>-</div><div class='del'>-	enum et61x251_i2c_sysfs_ops sysfs_ops;</div><div class='del'>-</div><div class='del'>-	enum et61x251_i2c_interface interface;</div><div class='del'>-	u8 i2c_slave_id;</div><div class='del'>-	enum et61x251_i2c_rsta rsta;</div><div class='del'>-	struct v4l2_rect active_pixel; /* left and top define FVSX and FVSY */</div><div class='del'>-</div><div class='del'>-	struct v4l2_queryctrl qctrl[ET61X251_MAX_CTRLS];</div><div class='del'>-	struct v4l2_cropcap cropcap;</div><div class='del'>-	struct v4l2_pix_format pix_format;</div><div class='del'>-</div><div class='del'>-	int (*init)(struct et61x251_device* cam);</div><div class='del'>-	int (*get_ctrl)(struct et61x251_device* cam,</div><div class='del'>-			struct v4l2_control* ctrl);</div><div class='del'>-	int (*set_ctrl)(struct et61x251_device* cam,</div><div class='del'>-			const struct v4l2_control* ctrl);</div><div class='del'>-	int (*set_crop)(struct et61x251_device* cam,</div><div class='del'>-			const struct v4l2_rect* rect);</div><div class='del'>-	int (*set_pix_format)(struct et61x251_device* cam,</div><div class='del'>-			      const struct v4l2_pix_format* pix);</div><div class='del'>-</div><div class='del'>-	/* Private */</div><div class='del'>-	struct v4l2_queryctrl _qctrl[ET61X251_MAX_CTRLS];</div><div class='del'>-	struct v4l2_rect _rect;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif /* _ET61X251_SENSOR_H_ */</div><div class='head'>diff --git a/drivers/media/video/et61x251/et61x251_tas5130d1b.c b/drivers/media/video/et61x251/et61x251_tas5130d1b.c<br/>deleted file mode 100644<br/>index ced2e167935d..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/et61x251/et61x251_tas5130d1b.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/et61x251/et61x251_tas5130d1b.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,143 +0,0 @@</div><div class='del'>-/***************************************************************************</div><div class='del'>- * Plug-in for TAS5130D1B image sensor connected to the ET61X[12]51        *</div><div class='del'>- * PC Camera Controllers                                                   *</div><div class='del'>- *                                                                         *</div><div class='del'>- * Copyright (C) 2006-2007 by Luca Risolia &lt;luca.risolia@studio.unibo.it&gt;  *</div><div class='del'>- *                                                                         *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify    *</div><div class='del'>- * it under the terms of the GNU General Public License as published by    *</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or       *</div><div class='del'>- * (at your option) any later version.                                     *</div><div class='del'>- *                                                                         *</div><div class='del'>- * This program is distributed in the hope that it will be useful,         *</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of          *</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the           *</div><div class='del'>- * GNU General Public License for more details.                            *</div><div class='del'>- *                                                                         *</div><div class='del'>- * You should have received a copy of the GNU General Public License       *</div><div class='del'>- * along with this program; if not, write to the Free Software             *</div><div class='del'>- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.               *</div><div class='del'>- ***************************************************************************/</div><div class='del'>-</div><div class='del'>-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='del'>-</div><div class='del'>-#include "et61x251_sensor.h"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int tas5130d1b_init(struct et61x251_device* cam)</div><div class='del'>-{</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	err += et61x251_write_reg(cam, 0x14, 0x01);</div><div class='del'>-	err += et61x251_write_reg(cam, 0x1b, 0x02);</div><div class='del'>-	err += et61x251_write_reg(cam, 0x02, 0x12);</div><div class='del'>-	err += et61x251_write_reg(cam, 0x0e, 0x60);</div><div class='del'>-	err += et61x251_write_reg(cam, 0x80, 0x61);</div><div class='del'>-	err += et61x251_write_reg(cam, 0xf0, 0x62);</div><div class='del'>-	err += et61x251_write_reg(cam, 0x03, 0x63);</div><div class='del'>-	err += et61x251_write_reg(cam, 0x14, 0x64);</div><div class='del'>-	err += et61x251_write_reg(cam, 0xf4, 0x65);</div><div class='del'>-	err += et61x251_write_reg(cam, 0x01, 0x66);</div><div class='del'>-	err += et61x251_write_reg(cam, 0x05, 0x67);</div><div class='del'>-	err += et61x251_write_reg(cam, 0x8f, 0x68);</div><div class='del'>-	err += et61x251_write_reg(cam, 0x0f, 0x8d);</div><div class='del'>-	err += et61x251_write_reg(cam, 0x08, 0x8e);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int tas5130d1b_set_ctrl(struct et61x251_device* cam,</div><div class='del'>-			       const struct v4l2_control* ctrl)</div><div class='del'>-{</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	switch (ctrl-&gt;id) {</div><div class='del'>-	case V4L2_CID_GAIN:</div><div class='del'>-		err += et61x251_i2c_raw_write(cam, 2, 0x20,</div><div class='del'>-					      0xf6-ctrl-&gt;value, 0, 0, 0,</div><div class='del'>-					      0, 0, 0, 0);</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_EXPOSURE:</div><div class='del'>-		err += et61x251_i2c_raw_write(cam, 2, 0x40,</div><div class='del'>-					      0x47-ctrl-&gt;value, 0, 0, 0,</div><div class='del'>-					      0, 0, 0, 0);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err ? -EIO : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static const struct et61x251_sensor tas5130d1b = {</div><div class='del'>-	.name = "TAS5130D1B",</div><div class='del'>-	.interface = ET61X251_I2C_3WIRES,</div><div class='del'>-	.rsta = ET61X251_I2C_RSTA_STOP,</div><div class='del'>-	.active_pixel = {</div><div class='del'>-		.left = 106,</div><div class='del'>-		.top = 13,</div><div class='del'>-	},</div><div class='del'>-	.init = &amp;tas5130d1b_init,</div><div class='del'>-	.qctrl = {</div><div class='del'>-		{</div><div class='del'>-			.id = V4L2_CID_GAIN,</div><div class='del'>-			.type = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name = "global gain",</div><div class='del'>-			.minimum = 0x00,</div><div class='del'>-			.maximum = 0xf6,</div><div class='del'>-			.step = 0x02,</div><div class='del'>-			.default_value = 0x0d,</div><div class='del'>-			.flags = 0,</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			.id = V4L2_CID_EXPOSURE,</div><div class='del'>-			.type = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name = "exposure",</div><div class='del'>-			.minimum = 0x00,</div><div class='del'>-			.maximum = 0x47,</div><div class='del'>-			.step = 0x01,</div><div class='del'>-			.default_value = 0x23,</div><div class='del'>-			.flags = 0,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.set_ctrl = &amp;tas5130d1b_set_ctrl,</div><div class='del'>-	.cropcap = {</div><div class='del'>-		.bounds = {</div><div class='del'>-			.left = 0,</div><div class='del'>-			.top = 0,</div><div class='del'>-			.width = 640,</div><div class='del'>-			.height = 480,</div><div class='del'>-		},</div><div class='del'>-		.defrect = {</div><div class='del'>-			.left = 0,</div><div class='del'>-			.top = 0,</div><div class='del'>-			.width = 640,</div><div class='del'>-			.height = 480,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.pix_format = {</div><div class='del'>-		.width = 640,</div><div class='del'>-		.height = 480,</div><div class='del'>-		.pixelformat = V4L2_PIX_FMT_SBGGR8,</div><div class='del'>-		.priv = 8,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-int et61x251_probe_tas5130d1b(struct et61x251_device* cam)</div><div class='del'>-{</div><div class='del'>-	const struct usb_device_id tas5130d1b_id_table[] = {</div><div class='del'>-		{ USB_DEVICE(0x102c, 0x6251), },</div><div class='del'>-		{ }</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* Sensor detection is based on USB pid/vid */</div><div class='del'>-	if (!et61x251_match_id(cam, tas5130d1b_id_table))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	et61x251_attach_sensor(cam, &amp;tas5130d1b);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/media/video/fsl-viu.c b/drivers/media/video/fsl-viu.c<br/>index 27e3e0c0b219..777486f7cadb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/fsl-viu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/fsl-viu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/fsl-viu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/fsl-viu.c</a></div><div class='hunk'>@@ -1544,6 +1544,10 @@ static int __devinit viu_of_probe(struct platform_device *op)</div><div class='ctx'> </div><div class='ctx'> 	/* initialize locks */</div><div class='ctx'> 	mutex_init(&amp;viu_dev-&gt;lock);</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;viu_dev-&gt;vdev-&gt;flags);</div><div class='ctx'> 	viu_dev-&gt;vdev-&gt;lock = &amp;viu_dev-&gt;lock;</div><div class='ctx'> 	spin_lock_init(&amp;viu_dev-&gt;slock);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/gspca/Makefile b/drivers/media/video/gspca/Makefile<br/>index 79ebe46e1ad7..c901da0bd657 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/Makefile</a></div><div class='hunk'>@@ -43,7 +43,7 @@ obj-$(CONFIG_USB_GSPCA_VICAM)    += gspca_vicam.o</div><div class='ctx'> obj-$(CONFIG_USB_GSPCA_XIRLINK_CIT) += gspca_xirlink_cit.o</div><div class='ctx'> obj-$(CONFIG_USB_GSPCA_ZC3XX)    += gspca_zc3xx.o</div><div class='ctx'> </div><div class='del'>-gspca_main-objs     := gspca.o</div><div class='add'>+gspca_main-objs     := gspca.o autogain_functions.o</div><div class='ctx'> gspca_benq-objs     := benq.o</div><div class='ctx'> gspca_conex-objs    := conex.o</div><div class='ctx'> gspca_cpia1-objs    := cpia1.o</div><div class='head'>diff --git a/drivers/media/video/gspca/autogain_functions.c b/drivers/media/video/gspca/autogain_functions.c<br/>new file mode 100644<br/>index 000000000000..67db674bb044<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/autogain_functions.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/autogain_functions.c</a></div><div class='hunk'>@@ -0,0 +1,178 @@</div><div class='add'>+/*</div><div class='add'>+ * Functions for auto gain.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2010-2012 Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='add'>+ */</div><div class='add'>+#include "gspca.h"</div><div class='add'>+</div><div class='add'>+/* auto gain and exposure algorithm based on the knee algorithm described here:</div><div class='add'>+   http://ytse.tricolour.net/docs/LowLightOptimization.html</div><div class='add'>+</div><div class='add'>+   Returns 0 if no changes were made, 1 if the gain and or exposure settings</div><div class='add'>+   where changed. */</div><div class='add'>+int gspca_expo_autogain(</div><div class='add'>+			struct gspca_dev *gspca_dev,</div><div class='add'>+			int avg_lum,</div><div class='add'>+			int desired_avg_lum,</div><div class='add'>+			int deadzone,</div><div class='add'>+			int gain_knee,</div><div class='add'>+			int exposure_knee)</div><div class='add'>+{</div><div class='add'>+	s32 gain, orig_gain, exposure, orig_exposure;</div><div class='add'>+	int i, steps, retval = 0;</div><div class='add'>+</div><div class='add'>+	if (v4l2_ctrl_g_ctrl(gspca_dev-&gt;autogain) == 0)</div><div class='add'>+	        return 0;</div><div class='add'>+</div><div class='add'>+	orig_gain = gain = v4l2_ctrl_g_ctrl(gspca_dev-&gt;gain);</div><div class='add'>+	orig_exposure = exposure = v4l2_ctrl_g_ctrl(gspca_dev-&gt;exposure);</div><div class='add'>+</div><div class='add'>+	/* If we are of a multiple of deadzone, do multiple steps to reach the</div><div class='add'>+	   desired lumination fast (with the risc of a slight overshoot) */</div><div class='add'>+	steps = abs(desired_avg_lum - avg_lum) / deadzone;</div><div class='add'>+</div><div class='add'>+	PDEBUG(D_FRAM, "autogain: lum: %d, desired: %d, steps: %d",</div><div class='add'>+		avg_lum, desired_avg_lum, steps);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; steps; i++) {</div><div class='add'>+		if (avg_lum &gt; desired_avg_lum) {</div><div class='add'>+			if (gain &gt; gain_knee)</div><div class='add'>+				gain--;</div><div class='add'>+			else if (exposure &gt; exposure_knee)</div><div class='add'>+				exposure--;</div><div class='add'>+			else if (gain &gt; gspca_dev-&gt;gain-&gt;default_value)</div><div class='add'>+				gain--;</div><div class='add'>+			else if (exposure &gt; gspca_dev-&gt;exposure-&gt;minimum)</div><div class='add'>+				exposure--;</div><div class='add'>+			else if (gain &gt; gspca_dev-&gt;gain-&gt;minimum)</div><div class='add'>+				gain--;</div><div class='add'>+			else</div><div class='add'>+				break;</div><div class='add'>+		} else {</div><div class='add'>+			if (gain &lt; gspca_dev-&gt;gain-&gt;default_value)</div><div class='add'>+				gain++;</div><div class='add'>+			else if (exposure &lt; exposure_knee)</div><div class='add'>+				exposure++;</div><div class='add'>+			else if (gain &lt; gain_knee)</div><div class='add'>+				gain++;</div><div class='add'>+			else if (exposure &lt; gspca_dev-&gt;exposure-&gt;maximum)</div><div class='add'>+				exposure++;</div><div class='add'>+			else if (gain &lt; gspca_dev-&gt;gain-&gt;maximum)</div><div class='add'>+				gain++;</div><div class='add'>+			else</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (gain != orig_gain) {</div><div class='add'>+	        v4l2_ctrl_s_ctrl(gspca_dev-&gt;gain, gain);</div><div class='add'>+		retval = 1;</div><div class='add'>+	}</div><div class='add'>+	if (exposure != orig_exposure) {</div><div class='add'>+	        v4l2_ctrl_s_ctrl(gspca_dev-&gt;exposure, exposure);</div><div class='add'>+		retval = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (retval)</div><div class='add'>+		PDEBUG(D_FRAM, "autogain: changed gain: %d, expo: %d",</div><div class='add'>+			gain, exposure);</div><div class='add'>+	return retval;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(gspca_expo_autogain);</div><div class='add'>+</div><div class='add'>+/* Autogain + exposure algorithm for cameras with a coarse exposure control</div><div class='add'>+   (usually this means we can only control the clockdiv to change exposure)</div><div class='add'>+   As changing the clockdiv so that the fps drops from 30 to 15 fps for</div><div class='add'>+   example, will lead to a huge exposure change (it effectively doubles),</div><div class='add'>+   this algorithm normally tries to only adjust the gain (between 40 and</div><div class='add'>+   80 %) and if that does not help, only then changes exposure. This leads</div><div class='add'>+   to a much more stable image then using the knee algorithm which at</div><div class='add'>+   certain points of the knee graph will only try to adjust exposure,</div><div class='add'>+   which leads to oscilating as one exposure step is huge.</div><div class='add'>+</div><div class='add'>+   Returns 0 if no changes were made, 1 if the gain and or exposure settings</div><div class='add'>+   where changed. */</div><div class='add'>+int gspca_coarse_grained_expo_autogain(</div><div class='add'>+			struct gspca_dev *gspca_dev,</div><div class='add'>+			int avg_lum,</div><div class='add'>+			int desired_avg_lum,</div><div class='add'>+			int deadzone)</div><div class='add'>+{</div><div class='add'>+	s32 gain_low, gain_high, gain, orig_gain, exposure, orig_exposure;</div><div class='add'>+	int steps, retval = 0;</div><div class='add'>+</div><div class='add'>+	if (v4l2_ctrl_g_ctrl(gspca_dev-&gt;autogain) == 0)</div><div class='add'>+	        return 0;</div><div class='add'>+</div><div class='add'>+	orig_gain = gain = v4l2_ctrl_g_ctrl(gspca_dev-&gt;gain);</div><div class='add'>+	orig_exposure = exposure = v4l2_ctrl_g_ctrl(gspca_dev-&gt;exposure);</div><div class='add'>+</div><div class='add'>+	gain_low  = (gspca_dev-&gt;gain-&gt;maximum - gspca_dev-&gt;gain-&gt;minimum) /</div><div class='add'>+		    5 * 2 + gspca_dev-&gt;gain-&gt;minimum;</div><div class='add'>+	gain_high = (gspca_dev-&gt;gain-&gt;maximum - gspca_dev-&gt;gain-&gt;minimum) /</div><div class='add'>+		    5 * 4 + gspca_dev-&gt;gain-&gt;minimum;</div><div class='add'>+</div><div class='add'>+	/* If we are of a multiple of deadzone, do multiple steps to reach the</div><div class='add'>+	   desired lumination fast (with the risc of a slight overshoot) */</div><div class='add'>+	steps = (desired_avg_lum - avg_lum) / deadzone;</div><div class='add'>+</div><div class='add'>+	PDEBUG(D_FRAM, "autogain: lum: %d, desired: %d, steps: %d",</div><div class='add'>+		avg_lum, desired_avg_lum, steps);</div><div class='add'>+</div><div class='add'>+	if ((gain + steps) &gt; gain_high &amp;&amp;</div><div class='add'>+	    exposure &lt; gspca_dev-&gt;exposure-&gt;maximum) {</div><div class='add'>+		gain = gain_high;</div><div class='add'>+		gspca_dev-&gt;exp_too_low_cnt++;</div><div class='add'>+		gspca_dev-&gt;exp_too_high_cnt = 0;</div><div class='add'>+	} else if ((gain + steps) &lt; gain_low &amp;&amp;</div><div class='add'>+		   exposure &gt; gspca_dev-&gt;exposure-&gt;minimum) {</div><div class='add'>+		gain = gain_low;</div><div class='add'>+		gspca_dev-&gt;exp_too_high_cnt++;</div><div class='add'>+		gspca_dev-&gt;exp_too_low_cnt = 0;</div><div class='add'>+	} else {</div><div class='add'>+		gain += steps;</div><div class='add'>+		if (gain &gt; gspca_dev-&gt;gain-&gt;maximum)</div><div class='add'>+			gain = gspca_dev-&gt;gain-&gt;maximum;</div><div class='add'>+		else if (gain &lt; gspca_dev-&gt;gain-&gt;minimum)</div><div class='add'>+			gain = gspca_dev-&gt;gain-&gt;minimum;</div><div class='add'>+		gspca_dev-&gt;exp_too_high_cnt = 0;</div><div class='add'>+		gspca_dev-&gt;exp_too_low_cnt = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (gspca_dev-&gt;exp_too_high_cnt &gt; 3) {</div><div class='add'>+		exposure--;</div><div class='add'>+		gspca_dev-&gt;exp_too_high_cnt = 0;</div><div class='add'>+	} else if (gspca_dev-&gt;exp_too_low_cnt &gt; 3) {</div><div class='add'>+		exposure++;</div><div class='add'>+		gspca_dev-&gt;exp_too_low_cnt = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (gain != orig_gain) {</div><div class='add'>+	        v4l2_ctrl_s_ctrl(gspca_dev-&gt;gain, gain);</div><div class='add'>+		retval = 1;</div><div class='add'>+	}</div><div class='add'>+	if (exposure != orig_exposure) {</div><div class='add'>+	        v4l2_ctrl_s_ctrl(gspca_dev-&gt;exposure, exposure);</div><div class='add'>+		retval = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (retval)</div><div class='add'>+		PDEBUG(D_FRAM, "autogain: changed gain: %d, expo: %d",</div><div class='add'>+			gain, exposure);</div><div class='add'>+	return retval;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(gspca_coarse_grained_expo_autogain);</div><div class='head'>diff --git a/drivers/media/video/gspca/autogain_functions.h b/drivers/media/video/gspca/autogain_functions.h<br/>index 46777eee678b..d625eafe63eb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/autogain_functions.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/autogain_functions.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/autogain_functions.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/autogain_functions.h</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'>  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#ifdef WANT_REGULAR_AUTOGAIN</div><div class='ctx'> /* auto gain and exposure algorithm based on the knee algorithm described here:</div><div class='ctx'>    http://ytse.tricolour.net/docs/LowLightOptimization.html</div><div class='ctx'> </div><div class='hunk'>@@ -91,7 +92,9 @@ static inline int auto_gain_n_exposure(</div><div class='ctx'> 			gain, exposure);</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='add'>+#ifdef WANT_COARSE_EXPO_AUTOGAIN</div><div class='ctx'> /* Autogain + exposure algorithm for cameras with a coarse exposure control</div><div class='ctx'>    (usually this means we can only control the clockdiv to change exposure)</div><div class='ctx'>    As changing the clockdiv so that the fps drops from 30 to 15 fps for</div><div class='hunk'>@@ -103,7 +106,7 @@ static inline int auto_gain_n_exposure(</div><div class='ctx'>    which leads to oscilating as one exposure step is huge.</div><div class='ctx'> </div><div class='ctx'>    Note this assumes that the sd struct for the cam in question has</div><div class='del'>-   exp_too_high_cnt and exp_too_high_cnt int members for use by this function.</div><div class='add'>+   exp_too_low_cnt and exp_too_high_cnt int members for use by this function.</div><div class='ctx'> </div><div class='ctx'>    Returns 0 if no changes were made, 1 if the gain and or exposure settings</div><div class='ctx'>    where changed. */</div><div class='hunk'>@@ -177,3 +180,4 @@ static inline int coarse_grained_expo_autogain(</div><div class='ctx'> 			gain, exposure);</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/media/video/gspca/conex.c b/drivers/media/video/gspca/conex.c<br/>index ea17b5d94ea4..f39fee0fd10f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/conex.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/conex.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/conex.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/conex.c</a></div><div class='hunk'>@@ -306,7 +306,7 @@ static void cx_sensor(struct gspca_dev*gspca_dev)</div><div class='ctx'> </div><div class='ctx'> 	reg_w(gspca_dev, 0x0020, reg20, 8);</div><div class='ctx'> 	reg_w(gspca_dev, 0x0028, reg28, 8);</div><div class='del'>-	reg_w(gspca_dev, 0x0010, reg10, 8);</div><div class='add'>+	reg_w(gspca_dev, 0x0010, reg10, 2);</div><div class='ctx'> 	reg_w_val(gspca_dev, 0x0092, 0x03);</div><div class='ctx'> </div><div class='ctx'> 	switch (gspca_dev-&gt;cam.cam_mode[(int) gspca_dev-&gt;curr_mode].priv) {</div><div class='hunk'>@@ -326,7 +326,7 @@ static void cx_sensor(struct gspca_dev*gspca_dev)</div><div class='ctx'> 	}</div><div class='ctx'> 	reg_w(gspca_dev, 0x007b, reg7b, 6);</div><div class='ctx'> 	reg_w_val(gspca_dev, 0x00f8, 0x00);</div><div class='del'>-	reg_w(gspca_dev, 0x0010, reg10, 8);</div><div class='add'>+	reg_w(gspca_dev, 0x0010, reg10, 2);</div><div class='ctx'> 	reg_w_val(gspca_dev, 0x0098, 0x41);</div><div class='ctx'> 	for (i = 0; i &lt; 11; i++) {</div><div class='ctx'> 		if (i == 3 || i == 5 || i == 8)</div><div class='head'>diff --git a/drivers/media/video/gspca/finepix.c b/drivers/media/video/gspca/finepix.c<br/>index 0107513cd728..6e26c93b4656 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/finepix.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/finepix.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/finepix.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/finepix.c</a></div><div class='hunk'>@@ -94,7 +94,11 @@ static void dostream(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	/* loop reading a frame */</div><div class='ctx'> again:</div><div class='del'>-	while (gspca_dev-&gt;present &amp;&amp; gspca_dev-&gt;streaming) {</div><div class='add'>+	while (gspca_dev-&gt;dev &amp;&amp; gspca_dev-&gt;streaming) {</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+		if (gspca_dev-&gt;frozen)</div><div class='add'>+			break;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 		/* request a frame */</div><div class='ctx'> 		mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='hunk'>@@ -102,7 +106,11 @@ again:</div><div class='ctx'> 		mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			break;</div><div class='del'>-		if (!gspca_dev-&gt;present || !gspca_dev-&gt;streaming)</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+		if (gspca_dev-&gt;frozen)</div><div class='add'>+			break;</div><div class='add'>+#endif</div><div class='add'>+		if (!gspca_dev-&gt;dev || !gspca_dev-&gt;streaming)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		/* the frame comes in parts */</div><div class='hunk'>@@ -117,7 +125,11 @@ again:</div><div class='ctx'> 				 * error. Just restart. */</div><div class='ctx'> 				goto again;</div><div class='ctx'> 			}</div><div class='del'>-			if (!gspca_dev-&gt;present || !gspca_dev-&gt;streaming)</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+			if (gspca_dev-&gt;frozen)</div><div class='add'>+				goto out;</div><div class='add'>+#endif</div><div class='add'>+			if (!gspca_dev-&gt;dev || !gspca_dev-&gt;streaming)</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			if (len &lt; FPIX_MAX_TRANSFER ||</div><div class='ctx'> 				(data[len - 2] == 0xff &amp;&amp;</div><div class='head'>diff --git a/drivers/media/video/gspca/gl860/gl860.c b/drivers/media/video/gspca/gl860/gl860.c<br/>index c84e26006fc3..c549574c1c7e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/gl860/gl860.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/gl860/gl860.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/gl860/gl860.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/gl860/gl860.c</a></div><div class='hunk'>@@ -405,6 +405,9 @@ static void sd_stop0(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> </div><div class='add'>+	if (!sd-&gt;gspca_dev.present)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	return sd-&gt;dev_post_unset_alt(gspca_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c<br/>index ca5a2b139d0b..137166d73945 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/gspca.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/gspca.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/gspca.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/gspca.c</a></div><div class='hunk'>@@ -38,6 +38,9 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/ktime.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='add'>+#include &lt;media/v4l2-fh.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "gspca.h"</div><div class='ctx'> </div><div class='hunk'>@@ -592,16 +595,13 @@ static int gspca_set_alt0(struct gspca_dev *gspca_dev)</div><div class='ctx'> static void gspca_stream_off(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	gspca_dev-&gt;streaming = 0;</div><div class='del'>-	if (gspca_dev-&gt;present) {</div><div class='del'>-		if (gspca_dev-&gt;sd_desc-&gt;stopN)</div><div class='del'>-			gspca_dev-&gt;sd_desc-&gt;stopN(gspca_dev);</div><div class='del'>-		destroy_urbs(gspca_dev);</div><div class='del'>-		gspca_input_destroy_urb(gspca_dev);</div><div class='del'>-		gspca_set_alt0(gspca_dev);</div><div class='del'>-		gspca_input_create_urb(gspca_dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* always call stop0 to free the subdriver's resources */</div><div class='add'>+	gspca_dev-&gt;usb_err = 0;</div><div class='add'>+	if (gspca_dev-&gt;sd_desc-&gt;stopN)</div><div class='add'>+		gspca_dev-&gt;sd_desc-&gt;stopN(gspca_dev);</div><div class='add'>+	destroy_urbs(gspca_dev);</div><div class='add'>+	gspca_input_destroy_urb(gspca_dev);</div><div class='add'>+	gspca_set_alt0(gspca_dev);</div><div class='add'>+	gspca_input_create_urb(gspca_dev);</div><div class='ctx'> 	if (gspca_dev-&gt;sd_desc-&gt;stop0)</div><div class='ctx'> 		gspca_dev-&gt;sd_desc-&gt;stop0(gspca_dev);</div><div class='ctx'> 	PDEBUG(D_STREAM, "stream off OK");</div><div class='hunk'>@@ -847,14 +847,6 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	struct ep_tb_s ep_tb[MAX_ALT];</div><div class='ctx'> 	int n, ret, xfer, alt, alt_idx;</div><div class='ctx'> </div><div class='del'>-	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='del'>-	if (!gspca_dev-&gt;present) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* reset the streaming variables */</div><div class='ctx'> 	gspca_dev-&gt;image = NULL;</div><div class='ctx'> 	gspca_dev-&gt;image_len = 0;</div><div class='hunk'>@@ -869,7 +861,7 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	if (gspca_dev-&gt;sd_desc-&gt;isoc_init) {</div><div class='ctx'> 		ret = gspca_dev-&gt;sd_desc-&gt;isoc_init(gspca_dev);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto unlock;</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	xfer = gspca_dev-&gt;cam.bulk ? USB_ENDPOINT_XFER_BULK</div><div class='ctx'> 				   : USB_ENDPOINT_XFER_ISOC;</div><div class='hunk'>@@ -880,8 +872,7 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		ep = alt_xfer(&amp;intf-&gt;altsetting[gspca_dev-&gt;alt], xfer);</div><div class='ctx'> 		if (ep == NULL) {</div><div class='ctx'> 			pr_err("bad altsetting %d\n", gspca_dev-&gt;alt);</div><div class='del'>-			ret = -EIO;</div><div class='del'>-			goto out;</div><div class='add'>+			return -EIO;</div><div class='ctx'> 		}</div><div class='ctx'> 		ep_tb[0].alt = gspca_dev-&gt;alt;</div><div class='ctx'> 		alt_idx = 1;</div><div class='hunk'>@@ -892,8 +883,7 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		alt_idx = build_isoc_ep_tb(gspca_dev, intf, ep_tb);</div><div class='ctx'> 		if (alt_idx &lt;= 0) {</div><div class='ctx'> 			pr_err("no transfer endpoint found\n");</div><div class='del'>-			ret = -EIO;</div><div class='del'>-			goto unlock;</div><div class='add'>+			return -EIO;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -988,8 +978,6 @@ retry:</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	gspca_input_create_urb(gspca_dev);</div><div class='del'>-unlock:</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1006,6 +994,8 @@ static void gspca_set_default_mode(struct gspca_dev *gspca_dev)</div><div class='ctx'> </div><div class='ctx'> 	/* set the current control values to their default values</div><div class='ctx'> 	 * which may have changed in sd_init() */</div><div class='add'>+	/* does nothing if ctrl_handler == NULL */</div><div class='add'>+	v4l2_ctrl_handler_setup(gspca_dev-&gt;vdev.ctrl_handler);</div><div class='ctx'> 	ctrl = gspca_dev-&gt;cam.ctrls;</div><div class='ctx'> 	if (ctrl != NULL) {</div><div class='ctx'> 		for (i = 0;</div><div class='hunk'>@@ -1057,77 +1047,50 @@ static int gspca_get_mode(struct gspca_dev *gspca_dev,</div><div class='ctx'> static int vidioc_g_register(struct file *file, void *priv,</div><div class='ctx'> 			struct v4l2_dbg_register *reg)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> </div><div class='ctx'> 	if (!gspca_dev-&gt;sd_desc-&gt;get_chip_ident)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return -ENOTTY;</div><div class='ctx'> </div><div class='ctx'> 	if (!gspca_dev-&gt;sd_desc-&gt;get_register)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return -ENOTTY;</div><div class='ctx'> </div><div class='del'>-	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='ctx'> 	gspca_dev-&gt;usb_err = 0;</div><div class='del'>-	if (gspca_dev-&gt;present)</div><div class='del'>-		ret = gspca_dev-&gt;sd_desc-&gt;get_register(gspca_dev, reg);</div><div class='del'>-	else</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return gspca_dev-&gt;sd_desc-&gt;get_register(gspca_dev, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_s_register(struct file *file, void *priv,</div><div class='ctx'> 			struct v4l2_dbg_register *reg)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> </div><div class='ctx'> 	if (!gspca_dev-&gt;sd_desc-&gt;get_chip_ident)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return -ENOTTY;</div><div class='ctx'> </div><div class='ctx'> 	if (!gspca_dev-&gt;sd_desc-&gt;set_register)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return -ENOTTY;</div><div class='ctx'> </div><div class='del'>-	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='ctx'> 	gspca_dev-&gt;usb_err = 0;</div><div class='del'>-	if (gspca_dev-&gt;present)</div><div class='del'>-		ret = gspca_dev-&gt;sd_desc-&gt;set_register(gspca_dev, reg);</div><div class='del'>-	else</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return gspca_dev-&gt;sd_desc-&gt;set_register(gspca_dev, reg);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static int vidioc_g_chip_ident(struct file *file, void *priv,</div><div class='ctx'> 			struct v4l2_dbg_chip_ident *chip)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> </div><div class='ctx'> 	if (!gspca_dev-&gt;sd_desc-&gt;get_chip_ident)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return -ENOTTY;</div><div class='ctx'> </div><div class='del'>-	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='ctx'> 	gspca_dev-&gt;usb_err = 0;</div><div class='del'>-	if (gspca_dev-&gt;present)</div><div class='del'>-		ret = gspca_dev-&gt;sd_desc-&gt;get_chip_ident(gspca_dev, chip);</div><div class='del'>-	else</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return gspca_dev-&gt;sd_desc-&gt;get_chip_ident(gspca_dev, chip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_enum_fmt_vid_cap(struct file *file, void  *priv,</div><div class='ctx'> 				struct v4l2_fmtdesc *fmtdesc)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	int i, j, index;</div><div class='ctx'> 	__u32 fmt_tb[8];</div><div class='ctx'> </div><div class='hunk'>@@ -1169,7 +1132,7 @@ static int vidioc_enum_fmt_vid_cap(struct file *file, void  *priv,</div><div class='ctx'> static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,</div><div class='ctx'> 			    struct v4l2_format *fmt)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	int mode;</div><div class='ctx'> </div><div class='ctx'> 	mode = gspca_dev-&gt;curr_mode;</div><div class='hunk'>@@ -1214,7 +1177,7 @@ static int vidioc_try_fmt_vid_cap(struct file *file,</div><div class='ctx'> 			      void *priv,</div><div class='ctx'> 			      struct v4l2_format *fmt)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = try_fmt_vid_cap(gspca_dev, fmt);</div><div class='hunk'>@@ -1226,7 +1189,7 @@ static int vidioc_try_fmt_vid_cap(struct file *file,</div><div class='ctx'> static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,</div><div class='ctx'> 			    struct v4l2_format *fmt)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;queue_lock))</div><div class='hunk'>@@ -1265,7 +1228,7 @@ out:</div><div class='ctx'> static int vidioc_enum_framesizes(struct file *file, void *priv,</div><div class='ctx'> 				  struct v4l2_frmsizeenum *fsize)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	int i;</div><div class='ctx'> 	__u32 index = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1291,7 +1254,7 @@ static int vidioc_enum_framesizes(struct file *file, void *priv,</div><div class='ctx'> static int vidioc_enum_frameintervals(struct file *filp, void *priv,</div><div class='ctx'> 				      struct v4l2_frmivalenum *fival)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(filp);</div><div class='ctx'> 	int mode = wxh_to_mode(gspca_dev, fival-&gt;width, fival-&gt;height);</div><div class='ctx'> 	__u32 i;</div><div class='ctx'> </div><div class='hunk'>@@ -1316,31 +1279,30 @@ static int vidioc_enum_frameintervals(struct file *filp, void *priv,</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gspca_release(struct video_device *vfd)</div><div class='add'>+static void gspca_release(struct v4l2_device *v4l2_device)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = container_of(vfd, struct gspca_dev, vdev);</div><div class='add'>+	struct gspca_dev *gspca_dev =</div><div class='add'>+		container_of(v4l2_device, struct gspca_dev, v4l2_dev);</div><div class='ctx'> </div><div class='ctx'> 	PDEBUG(D_PROBE, "%s released",</div><div class='ctx'> 		video_device_node_name(&amp;gspca_dev-&gt;vdev));</div><div class='ctx'> </div><div class='add'>+	v4l2_ctrl_handler_free(gspca_dev-&gt;vdev.ctrl_handler);</div><div class='add'>+	v4l2_device_unregister(&amp;gspca_dev-&gt;v4l2_dev);</div><div class='ctx'> 	kfree(gspca_dev-&gt;usb_buf);</div><div class='ctx'> 	kfree(gspca_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dev_open(struct file *file)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> </div><div class='ctx'> 	PDEBUG(D_STREAM, "[%s] open", current-&gt;comm);</div><div class='del'>-	gspca_dev = (struct gspca_dev *) video_devdata(file);</div><div class='del'>-	if (!gspca_dev-&gt;present)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	/* protect the subdriver against rmmod */</div><div class='ctx'> 	if (!try_module_get(gspca_dev-&gt;module))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	file-&gt;private_data = gspca_dev;</div><div class='ctx'> #ifdef GSPCA_DEBUG</div><div class='ctx'> 	/* activate the v4l2 debug */</div><div class='ctx'> 	if (gspca_debug &amp; D_V4L2)</div><div class='hunk'>@@ -1350,49 +1312,44 @@ static int dev_open(struct file *file)</div><div class='ctx'> 		gspca_dev-&gt;vdev.debug &amp;= ~(V4L2_DEBUG_IOCTL</div><div class='ctx'> 					| V4L2_DEBUG_IOCTL_ARG);</div><div class='ctx'> #endif</div><div class='del'>-	return 0;</div><div class='add'>+	return v4l2_fh_open(file);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dev_close(struct file *file)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = file-&gt;private_data;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> </div><div class='ctx'> 	PDEBUG(D_STREAM, "[%s] close", current-&gt;comm);</div><div class='del'>-	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;queue_lock))</div><div class='add'>+</div><div class='add'>+	/* Needed for gspca_stream_off, always lock before queue_lock! */</div><div class='add'>+	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='ctx'> 		return -ERESTARTSYS;</div><div class='ctx'> </div><div class='add'>+	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;queue_lock)) {</div><div class='add'>+		mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='add'>+		return -ERESTARTSYS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* if the file did the capture, free the streaming resources */</div><div class='ctx'> 	if (gspca_dev-&gt;capt_file == file) {</div><div class='del'>-		if (gspca_dev-&gt;streaming) {</div><div class='del'>-			mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-			gspca_dev-&gt;usb_err = 0;</div><div class='add'>+		if (gspca_dev-&gt;streaming)</div><div class='ctx'> 			gspca_stream_off(gspca_dev);</div><div class='del'>-			mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-		}</div><div class='ctx'> 		frame_free(gspca_dev);</div><div class='ctx'> 	}</div><div class='del'>-	file-&gt;private_data = NULL;</div><div class='ctx'> 	module_put(gspca_dev-&gt;module);</div><div class='ctx'> 	mutex_unlock(&amp;gspca_dev-&gt;queue_lock);</div><div class='add'>+	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> </div><div class='ctx'> 	PDEBUG(D_STREAM, "close done");</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return v4l2_fh_release(file);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_querycap(struct file *file, void  *priv,</div><div class='ctx'> 			   struct v4l2_capability *cap)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='del'>-	int ret;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> </div><div class='del'>-	/* protect the access to the usb device */</div><div class='del'>-	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-	if (!gspca_dev-&gt;present) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='ctx'> 	strlcpy((char *) cap-&gt;driver, gspca_dev-&gt;sd_desc-&gt;name,</div><div class='ctx'> 			sizeof cap-&gt;driver);</div><div class='ctx'> 	if (gspca_dev-&gt;dev-&gt;product != NULL) {</div><div class='hunk'>@@ -1406,13 +1363,11 @@ static int vidioc_querycap(struct file *file, void  *priv,</div><div class='ctx'> 	}</div><div class='ctx'> 	usb_make_path(gspca_dev-&gt;dev, (char *) cap-&gt;bus_info,</div><div class='ctx'> 			sizeof(cap-&gt;bus_info));</div><div class='del'>-	cap-&gt;capabilities = V4L2_CAP_VIDEO_CAPTURE</div><div class='add'>+	cap-&gt;device_caps = V4L2_CAP_VIDEO_CAPTURE</div><div class='ctx'> 			  | V4L2_CAP_STREAMING</div><div class='ctx'> 			  | V4L2_CAP_READWRITE;</div><div class='del'>-	ret = 0;</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-	return ret;</div><div class='add'>+	cap-&gt;capabilities = cap-&gt;device_caps | V4L2_CAP_DEVICE_CAPS;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int get_ctrl(struct gspca_dev *gspca_dev,</div><div class='hunk'>@@ -1435,7 +1390,7 @@ static int get_ctrl(struct gspca_dev *gspca_dev,</div><div class='ctx'> static int vidioc_queryctrl(struct file *file, void *priv,</div><div class='ctx'> 			   struct v4l2_queryctrl *q_ctrl)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	const struct ctrl *ctrls;</div><div class='ctx'> 	struct gspca_ctrl *gspca_ctrl;</div><div class='ctx'> 	int i, idx;</div><div class='hunk'>@@ -1478,10 +1433,10 @@ static int vidioc_queryctrl(struct file *file, void *priv,</div><div class='ctx'> static int vidioc_s_ctrl(struct file *file, void *priv,</div><div class='ctx'> 			 struct v4l2_control *ctrl)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	const struct ctrl *ctrls;</div><div class='ctx'> 	struct gspca_ctrl *gspca_ctrl;</div><div class='del'>-	int idx, ret;</div><div class='add'>+	int idx;</div><div class='ctx'> </div><div class='ctx'> 	idx = get_ctrl(gspca_dev, ctrl-&gt;id);</div><div class='ctx'> 	if (idx &lt; 0)</div><div class='hunk'>@@ -1501,74 +1456,52 @@ static int vidioc_s_ctrl(struct file *file, void *priv,</div><div class='ctx'> 			return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> 	PDEBUG(D_CONF, "set ctrl [%08x] = %d", ctrl-&gt;id, ctrl-&gt;value);</div><div class='del'>-	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-	if (!gspca_dev-&gt;present) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='ctx'> 	gspca_dev-&gt;usb_err = 0;</div><div class='del'>-	if (ctrls-&gt;set != NULL) {</div><div class='del'>-		ret = ctrls-&gt;set(gspca_dev, ctrl-&gt;value);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	if (ctrls-&gt;set != NULL)</div><div class='add'>+		return ctrls-&gt;set(gspca_dev, ctrl-&gt;value);</div><div class='ctx'> 	if (gspca_ctrl != NULL) {</div><div class='ctx'> 		gspca_ctrl-&gt;val = ctrl-&gt;value;</div><div class='ctx'> 		if (ctrls-&gt;set_control != NULL</div><div class='ctx'> 		 &amp;&amp; gspca_dev-&gt;streaming)</div><div class='ctx'> 			ctrls-&gt;set_control(gspca_dev);</div><div class='ctx'> 	}</div><div class='del'>-	ret = gspca_dev-&gt;usb_err;</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-	return ret;</div><div class='add'>+	return gspca_dev-&gt;usb_err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_g_ctrl(struct file *file, void *priv,</div><div class='ctx'> 			 struct v4l2_control *ctrl)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	const struct ctrl *ctrls;</div><div class='del'>-	int idx, ret;</div><div class='add'>+	int idx;</div><div class='ctx'> </div><div class='ctx'> 	idx = get_ctrl(gspca_dev, ctrl-&gt;id);</div><div class='ctx'> 	if (idx &lt; 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	ctrls = &amp;gspca_dev-&gt;sd_desc-&gt;ctrls[idx];</div><div class='ctx'> </div><div class='del'>-	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-	if (!gspca_dev-&gt;present) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='ctx'> 	gspca_dev-&gt;usb_err = 0;</div><div class='del'>-	if (ctrls-&gt;get != NULL) {</div><div class='del'>-		ret = ctrls-&gt;get(gspca_dev, &amp;ctrl-&gt;value);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	if (ctrls-&gt;get != NULL)</div><div class='add'>+		return ctrls-&gt;get(gspca_dev, &amp;ctrl-&gt;value);</div><div class='ctx'> 	if (gspca_dev-&gt;cam.ctrls != NULL)</div><div class='ctx'> 		ctrl-&gt;value = gspca_dev-&gt;cam.ctrls[idx].val;</div><div class='del'>-	ret = 0;</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_querymenu(struct file *file, void *priv,</div><div class='ctx'> 			    struct v4l2_querymenu *qmenu)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> </div><div class='ctx'> 	if (!gspca_dev-&gt;sd_desc-&gt;querymenu)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return -ENOTTY;</div><div class='ctx'> 	return gspca_dev-&gt;sd_desc-&gt;querymenu(gspca_dev, qmenu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_enum_input(struct file *file, void *priv,</div><div class='ctx'> 				struct v4l2_input *input)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> </div><div class='ctx'> 	if (input-&gt;index != 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1595,7 +1528,7 @@ static int vidioc_s_input(struct file *file, void *priv, unsigned int i)</div><div class='ctx'> static int vidioc_reqbufs(struct file *file, void *priv,</div><div class='ctx'> 			  struct v4l2_requestbuffers *rb)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	int i, ret = 0, streaming;</div><div class='ctx'> </div><div class='ctx'> 	i = rb-&gt;memory;			/* (avoid compilation warning) */</div><div class='hunk'>@@ -1635,10 +1568,7 @@ static int vidioc_reqbufs(struct file *file, void *priv,</div><div class='ctx'> 	/* stop streaming */</div><div class='ctx'> 	streaming = gspca_dev-&gt;streaming;</div><div class='ctx'> 	if (streaming) {</div><div class='del'>-		mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-		gspca_dev-&gt;usb_err = 0;</div><div class='ctx'> 		gspca_stream_off(gspca_dev);</div><div class='del'>-		mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> </div><div class='ctx'> 		/* Don't restart the stream when switching from read</div><div class='ctx'> 		 * to mmap mode */</div><div class='hunk'>@@ -1666,7 +1596,7 @@ out:</div><div class='ctx'> static int vidioc_querybuf(struct file *file, void *priv,</div><div class='ctx'> 			   struct v4l2_buffer *v4l2_buf)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	struct gspca_frame *frame;</div><div class='ctx'> </div><div class='ctx'> 	if (v4l2_buf-&gt;index &lt; 0</div><div class='hunk'>@@ -1681,7 +1611,7 @@ static int vidioc_querybuf(struct file *file, void *priv,</div><div class='ctx'> static int vidioc_streamon(struct file *file, void *priv,</div><div class='ctx'> 			   enum v4l2_buf_type buf_type)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (buf_type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='hunk'>@@ -1722,7 +1652,7 @@ out:</div><div class='ctx'> static int vidioc_streamoff(struct file *file, void *priv,</div><div class='ctx'> 				enum v4l2_buf_type buf_type)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (buf_type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='hunk'>@@ -1743,13 +1673,7 @@ static int vidioc_streamoff(struct file *file, void *priv,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* stop streaming */</div><div class='del'>-	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock)) {</div><div class='del'>-		ret = -ERESTARTSYS;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	gspca_dev-&gt;usb_err = 0;</div><div class='ctx'> 	gspca_stream_off(gspca_dev);</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 	/* In case another thread is waiting in dqbuf */</div><div class='ctx'> 	wake_up_interruptible(&amp;gspca_dev-&gt;wq);</div><div class='ctx'> </div><div class='hunk'>@@ -1766,71 +1690,44 @@ out:</div><div class='ctx'> static int vidioc_g_jpegcomp(struct file *file, void *priv,</div><div class='ctx'> 			struct v4l2_jpegcompression *jpegcomp)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='del'>-	int ret;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> </div><div class='ctx'> 	if (!gspca_dev-&gt;sd_desc-&gt;get_jcomp)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='add'>+		return -ENOTTY;</div><div class='ctx'> 	gspca_dev-&gt;usb_err = 0;</div><div class='del'>-	if (gspca_dev-&gt;present)</div><div class='del'>-		ret = gspca_dev-&gt;sd_desc-&gt;get_jcomp(gspca_dev, jpegcomp);</div><div class='del'>-	else</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-	return ret;</div><div class='add'>+	return gspca_dev-&gt;sd_desc-&gt;get_jcomp(gspca_dev, jpegcomp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_s_jpegcomp(struct file *file, void *priv,</div><div class='ctx'> 			struct v4l2_jpegcompression *jpegcomp)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='del'>-	int ret;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> </div><div class='ctx'> 	if (!gspca_dev-&gt;sd_desc-&gt;set_jcomp)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='add'>+		return -ENOTTY;</div><div class='ctx'> 	gspca_dev-&gt;usb_err = 0;</div><div class='del'>-	if (gspca_dev-&gt;present)</div><div class='del'>-		ret = gspca_dev-&gt;sd_desc-&gt;set_jcomp(gspca_dev, jpegcomp);</div><div class='del'>-	else</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-	return ret;</div><div class='add'>+	return gspca_dev-&gt;sd_desc-&gt;set_jcomp(gspca_dev, jpegcomp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_g_parm(struct file *filp, void *priv,</div><div class='ctx'> 			struct v4l2_streamparm *parm)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(filp);</div><div class='ctx'> </div><div class='ctx'> 	parm-&gt;parm.capture.readbuffers = gspca_dev-&gt;nbufread;</div><div class='ctx'> </div><div class='ctx'> 	if (gspca_dev-&gt;sd_desc-&gt;get_streamparm) {</div><div class='del'>-		int ret;</div><div class='del'>-</div><div class='del'>-		if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='del'>-			return -ERESTARTSYS;</div><div class='del'>-		if (gspca_dev-&gt;present) {</div><div class='del'>-			gspca_dev-&gt;usb_err = 0;</div><div class='del'>-			gspca_dev-&gt;sd_desc-&gt;get_streamparm(gspca_dev, parm);</div><div class='del'>-			ret = gspca_dev-&gt;usb_err;</div><div class='del'>-		} else {</div><div class='del'>-			ret = -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-		return ret;</div><div class='add'>+		gspca_dev-&gt;usb_err = 0;</div><div class='add'>+		gspca_dev-&gt;sd_desc-&gt;get_streamparm(gspca_dev, parm);</div><div class='add'>+		return gspca_dev-&gt;usb_err;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_s_parm(struct file *filp, void *priv,</div><div class='ctx'> 			struct v4l2_streamparm *parm)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(filp);</div><div class='ctx'> 	int n;</div><div class='ctx'> </div><div class='ctx'> 	n = parm-&gt;parm.capture.readbuffers;</div><div class='hunk'>@@ -1840,19 +1737,9 @@ static int vidioc_s_parm(struct file *filp, void *priv,</div><div class='ctx'> 		gspca_dev-&gt;nbufread = n;</div><div class='ctx'> </div><div class='ctx'> 	if (gspca_dev-&gt;sd_desc-&gt;set_streamparm) {</div><div class='del'>-		int ret;</div><div class='del'>-</div><div class='del'>-		if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='del'>-			return -ERESTARTSYS;</div><div class='del'>-		if (gspca_dev-&gt;present) {</div><div class='del'>-			gspca_dev-&gt;usb_err = 0;</div><div class='del'>-			gspca_dev-&gt;sd_desc-&gt;set_streamparm(gspca_dev, parm);</div><div class='del'>-			ret = gspca_dev-&gt;usb_err;</div><div class='del'>-		} else {</div><div class='del'>-			ret = -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-		return ret;</div><div class='add'>+		gspca_dev-&gt;usb_err = 0;</div><div class='add'>+		gspca_dev-&gt;sd_desc-&gt;set_streamparm(gspca_dev, parm);</div><div class='add'>+		return gspca_dev-&gt;usb_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1860,7 +1747,7 @@ static int vidioc_s_parm(struct file *filp, void *priv,</div><div class='ctx'> </div><div class='ctx'> static int dev_mmap(struct file *file, struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = file-&gt;private_data;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	struct gspca_frame *frame;</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> 	unsigned long addr, start, size;</div><div class='hunk'>@@ -1872,10 +1759,6 @@ static int dev_mmap(struct file *file, struct vm_area_struct *vma)</div><div class='ctx'> </div><div class='ctx'> 	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;queue_lock))</div><div class='ctx'> 		return -ERESTARTSYS;</div><div class='del'>-	if (!gspca_dev-&gt;present) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='ctx'> 	if (gspca_dev-&gt;capt_file != file) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -1963,7 +1846,7 @@ static int frame_ready(struct gspca_dev *gspca_dev, struct file *file,</div><div class='ctx'> static int vidioc_dqbuf(struct file *file, void *priv,</div><div class='ctx'> 			struct v4l2_buffer *v4l2_buf)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	struct gspca_frame *frame;</div><div class='ctx'> 	int i, j, ret;</div><div class='ctx'> </div><div class='hunk'>@@ -2003,14 +1886,6 @@ static int vidioc_dqbuf(struct file *file, void *priv,</div><div class='ctx'> </div><div class='ctx'> 	gspca_dev-&gt;fr_o = (i + 1) % GSPCA_MAX_FRAMES;</div><div class='ctx'> </div><div class='del'>-	if (gspca_dev-&gt;sd_desc-&gt;dq_callback) {</div><div class='del'>-		mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-		gspca_dev-&gt;usb_err = 0;</div><div class='del'>-		if (gspca_dev-&gt;present)</div><div class='del'>-			gspca_dev-&gt;sd_desc-&gt;dq_callback(gspca_dev);</div><div class='del'>-		mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	frame-&gt;v4l2_buf.flags &amp;= ~V4L2_BUF_FLAG_DONE;</div><div class='ctx'> 	memcpy(v4l2_buf, &amp;frame-&gt;v4l2_buf, sizeof *v4l2_buf);</div><div class='ctx'> 	PDEBUG(D_FRAM, "dqbuf %d", j);</div><div class='hunk'>@@ -2027,6 +1902,15 @@ static int vidioc_dqbuf(struct file *file, void *priv,</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;gspca_dev-&gt;queue_lock);</div><div class='add'>+</div><div class='add'>+	if (ret == 0 &amp;&amp; gspca_dev-&gt;sd_desc-&gt;dq_callback) {</div><div class='add'>+		mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='add'>+		gspca_dev-&gt;usb_err = 0;</div><div class='add'>+		if (gspca_dev-&gt;present)</div><div class='add'>+			gspca_dev-&gt;sd_desc-&gt;dq_callback(gspca_dev);</div><div class='add'>+		mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2039,7 +1923,7 @@ out:</div><div class='ctx'> static int vidioc_qbuf(struct file *file, void *priv,</div><div class='ctx'> 			struct v4l2_buffer *v4l2_buf)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = priv;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	struct gspca_frame *frame;</div><div class='ctx'> 	int i, index, ret;</div><div class='ctx'> </div><div class='hunk'>@@ -2098,6 +1982,10 @@ static int read_alloc(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	PDEBUG(D_STREAM, "read alloc");</div><div class='add'>+</div><div class='add'>+	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;usb_lock))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='add'>+</div><div class='ctx'> 	if (gspca_dev-&gt;nframes == 0) {</div><div class='ctx'> 		struct v4l2_requestbuffers rb;</div><div class='ctx'> </div><div class='hunk'>@@ -2108,7 +1996,7 @@ static int read_alloc(struct gspca_dev *gspca_dev,</div><div class='ctx'> 		ret = vidioc_reqbufs(file, gspca_dev, &amp;rb);</div><div class='ctx'> 		if (ret != 0) {</div><div class='ctx'> 			PDEBUG(D_STREAM, "read reqbuf err %d", ret);</div><div class='del'>-			return ret;</div><div class='add'>+			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> 		memset(&amp;v4l2_buf, 0, sizeof v4l2_buf);</div><div class='ctx'> 		v4l2_buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;</div><div class='hunk'>@@ -2118,61 +2006,69 @@ static int read_alloc(struct gspca_dev *gspca_dev,</div><div class='ctx'> 			ret = vidioc_qbuf(file, gspca_dev, &amp;v4l2_buf);</div><div class='ctx'> 			if (ret != 0) {</div><div class='ctx'> 				PDEBUG(D_STREAM, "read qbuf err: %d", ret);</div><div class='del'>-				return ret;</div><div class='add'>+				goto out;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		gspca_dev-&gt;memory = GSPCA_MEMORY_READ;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* start streaming */</div><div class='ctx'> 	ret = vidioc_streamon(file, gspca_dev, V4L2_BUF_TYPE_VIDEO_CAPTURE);</div><div class='ctx'> 	if (ret != 0)</div><div class='ctx'> 		PDEBUG(D_STREAM, "read streamon err %d", ret);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int dev_poll(struct file *file, poll_table *wait)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = file-&gt;private_data;</div><div class='del'>-	int ret;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='add'>+	unsigned long req_events = poll_requested_events(wait);</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	PDEBUG(D_FRAM, "poll");</div><div class='ctx'> </div><div class='del'>-	poll_wait(file, &amp;gspca_dev-&gt;wq, wait);</div><div class='add'>+	if (req_events &amp; POLLPRI)</div><div class='add'>+		ret |= v4l2_ctrl_poll(file, wait);</div><div class='ctx'> </div><div class='del'>-	/* if reqbufs is not done, the user would use read() */</div><div class='del'>-	if (gspca_dev-&gt;memory == GSPCA_MEMORY_NO) {</div><div class='del'>-		ret = read_alloc(gspca_dev, file);</div><div class='del'>-		if (ret != 0)</div><div class='del'>-			return POLLERR;</div><div class='del'>-	}</div><div class='add'>+	if (req_events &amp; (POLLIN | POLLRDNORM)) {</div><div class='add'>+		/* if reqbufs is not done, the user would use read() */</div><div class='add'>+		if (gspca_dev-&gt;memory == GSPCA_MEMORY_NO) {</div><div class='add'>+			if (read_alloc(gspca_dev, file) != 0) {</div><div class='add'>+				ret |= POLLERR;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (mutex_lock_interruptible(&amp;gspca_dev-&gt;queue_lock) != 0)</div><div class='del'>-		return POLLERR;</div><div class='add'>+		poll_wait(file, &amp;gspca_dev-&gt;wq, wait);</div><div class='ctx'> </div><div class='del'>-	/* check if an image has been received */</div><div class='del'>-	if (gspca_dev-&gt;fr_o != atomic_read(&amp;gspca_dev-&gt;fr_i))</div><div class='del'>-		ret = POLLIN | POLLRDNORM;	/* yes */</div><div class='del'>-	else</div><div class='del'>-		ret = 0;</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;queue_lock);</div><div class='add'>+		/* check if an image has been received */</div><div class='add'>+		if (mutex_lock_interruptible(&amp;gspca_dev-&gt;queue_lock) != 0) {</div><div class='add'>+			ret |= POLLERR;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		if (gspca_dev-&gt;fr_o != atomic_read(&amp;gspca_dev-&gt;fr_i))</div><div class='add'>+			ret |= POLLIN | POLLRDNORM;</div><div class='add'>+		mutex_unlock(&amp;gspca_dev-&gt;queue_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='ctx'> 	if (!gspca_dev-&gt;present)</div><div class='del'>-		return POLLHUP;</div><div class='add'>+		ret |= POLLHUP;</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t dev_read(struct file *file, char __user *data,</div><div class='ctx'> 		    size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='del'>-	struct gspca_dev *gspca_dev = file-&gt;private_data;</div><div class='add'>+	struct gspca_dev *gspca_dev = video_drvdata(file);</div><div class='ctx'> 	struct gspca_frame *frame;</div><div class='ctx'> 	struct v4l2_buffer v4l2_buf;</div><div class='ctx'> 	struct timeval timestamp;</div><div class='ctx'> 	int n, ret, ret2;</div><div class='ctx'> </div><div class='ctx'> 	PDEBUG(D_FRAM, "read (%zd)", count);</div><div class='del'>-	if (!gspca_dev-&gt;present)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> 	if (gspca_dev-&gt;memory == GSPCA_MEMORY_NO) { /* first time ? */</div><div class='ctx'> 		ret = read_alloc(gspca_dev, file);</div><div class='ctx'> 		if (ret != 0)</div><div class='hunk'>@@ -2266,13 +2162,15 @@ static const struct v4l2_ioctl_ops dev_ioctl_ops = {</div><div class='ctx'> 	.vidioc_s_register	= vidioc_s_register,</div><div class='ctx'> #endif</div><div class='ctx'> 	.vidioc_g_chip_ident	= vidioc_g_chip_ident,</div><div class='add'>+	.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,</div><div class='add'>+	.vidioc_unsubscribe_event = v4l2_event_unsubscribe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct video_device gspca_template = {</div><div class='ctx'> 	.name = "gspca main driver",</div><div class='ctx'> 	.fops = &amp;dev_fops,</div><div class='ctx'> 	.ioctl_ops = &amp;dev_ioctl_ops,</div><div class='del'>-	.release = gspca_release,</div><div class='add'>+	.release = video_device_release_empty, /* We use v4l2_dev.release */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* initialize the controls */</div><div class='hunk'>@@ -2344,9 +2242,24 @@ int gspca_dev_probe2(struct usb_interface *intf,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	gspca_dev-&gt;v4l2_dev.release = gspca_release;</div><div class='add'>+	ret = v4l2_device_register(&amp;intf-&gt;dev, &amp;gspca_dev-&gt;v4l2_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='ctx'> 	gspca_dev-&gt;sd_desc = sd_desc;</div><div class='ctx'> 	gspca_dev-&gt;nbufread = 2;</div><div class='ctx'> 	gspca_dev-&gt;empty_packet = -1;	/* don't check the empty packets */</div><div class='add'>+	gspca_dev-&gt;vdev = gspca_template;</div><div class='add'>+	gspca_dev-&gt;vdev.v4l2_dev = &amp;gspca_dev-&gt;v4l2_dev;</div><div class='add'>+	video_set_drvdata(&amp;gspca_dev-&gt;vdev, gspca_dev);</div><div class='add'>+	set_bit(V4L2_FL_USE_FH_PRIO, &amp;gspca_dev-&gt;vdev.flags);</div><div class='add'>+	gspca_dev-&gt;module = module;</div><div class='add'>+	gspca_dev-&gt;present = 1;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;gspca_dev-&gt;usb_lock);</div><div class='add'>+	gspca_dev-&gt;vdev.lock = &amp;gspca_dev-&gt;usb_lock;</div><div class='add'>+	mutex_init(&amp;gspca_dev-&gt;queue_lock);</div><div class='add'>+	init_waitqueue_head(&amp;gspca_dev-&gt;wq);</div><div class='ctx'> </div><div class='ctx'> 	/* configure the subdriver and initialize the USB device */</div><div class='ctx'> 	ret = sd_desc-&gt;config(gspca_dev, id);</div><div class='hunk'>@@ -2357,21 +2270,26 @@ int gspca_dev_probe2(struct usb_interface *intf,</div><div class='ctx'> 	ret = sd_desc-&gt;init(gspca_dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto out;</div><div class='add'>+	if (sd_desc-&gt;init_controls)</div><div class='add'>+		ret = sd_desc-&gt;init_controls(gspca_dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='ctx'> 	gspca_set_default_mode(gspca_dev);</div><div class='ctx'> </div><div class='ctx'> 	ret = gspca_input_connect(gspca_dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	mutex_init(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-	mutex_init(&amp;gspca_dev-&gt;queue_lock);</div><div class='del'>-	init_waitqueue_head(&amp;gspca_dev-&gt;wq);</div><div class='add'>+	/*</div><div class='add'>+	 * Don't take usb_lock for these ioctls. This improves latency if</div><div class='add'>+	 * usb_lock is taken for a long time, e.g. when changing a control</div><div class='add'>+	 * value, and a new frame is ready to be dequeued.</div><div class='add'>+	 */</div><div class='add'>+	v4l2_disable_ioctl_locking(&amp;gspca_dev-&gt;vdev, VIDIOC_DQBUF);</div><div class='add'>+	v4l2_disable_ioctl_locking(&amp;gspca_dev-&gt;vdev, VIDIOC_QBUF);</div><div class='add'>+	v4l2_disable_ioctl_locking(&amp;gspca_dev-&gt;vdev, VIDIOC_QUERYBUF);</div><div class='ctx'> </div><div class='ctx'> 	/* init video stuff */</div><div class='del'>-	memcpy(&amp;gspca_dev-&gt;vdev, &amp;gspca_template, sizeof gspca_template);</div><div class='del'>-	gspca_dev-&gt;vdev.parent = &amp;intf-&gt;dev;</div><div class='del'>-	gspca_dev-&gt;module = module;</div><div class='del'>-	gspca_dev-&gt;present = 1;</div><div class='ctx'> 	ret = video_register_device(&amp;gspca_dev-&gt;vdev,</div><div class='ctx'> 				  VFL_TYPE_GRABBER,</div><div class='ctx'> 				  -1);</div><div class='hunk'>@@ -2391,6 +2309,7 @@ out:</div><div class='ctx'> 	if (gspca_dev-&gt;input_dev)</div><div class='ctx'> 		input_unregister_device(gspca_dev-&gt;input_dev);</div><div class='ctx'> #endif</div><div class='add'>+	v4l2_ctrl_handler_free(gspca_dev-&gt;vdev.ctrl_handler);</div><div class='ctx'> 	kfree(gspca_dev-&gt;usb_buf);</div><div class='ctx'> 	kfree(gspca_dev);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2437,11 +2356,12 @@ void gspca_disconnect(struct usb_interface *intf)</div><div class='ctx'> </div><div class='ctx'> 	PDEBUG(D_PROBE, "%s disconnect",</div><div class='ctx'> 		video_device_node_name(&amp;gspca_dev-&gt;vdev));</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> </div><div class='add'>+	usb_set_intfdata(intf, NULL);</div><div class='add'>+	gspca_dev-&gt;dev = NULL;</div><div class='ctx'> 	gspca_dev-&gt;present = 0;</div><div class='del'>-	wake_up_interruptible(&amp;gspca_dev-&gt;wq);</div><div class='del'>-</div><div class='ctx'> 	destroy_urbs(gspca_dev);</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)</div><div class='hunk'>@@ -2452,18 +2372,19 @@ void gspca_disconnect(struct usb_interface *intf)</div><div class='ctx'> 		input_unregister_device(input_dev);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='add'>+	/* Free subdriver's streaming resources / stop sd workqueue(s) */</div><div class='add'>+	if (gspca_dev-&gt;sd_desc-&gt;stop0 &amp;&amp; gspca_dev-&gt;streaming)</div><div class='add'>+		gspca_dev-&gt;sd_desc-&gt;stop0(gspca_dev);</div><div class='add'>+	gspca_dev-&gt;streaming = 0;</div><div class='add'>+	wake_up_interruptible(&amp;gspca_dev-&gt;wq);</div><div class='ctx'> </div><div class='del'>-	/* the device is freed at exit of this function */</div><div class='del'>-	gspca_dev-&gt;dev = NULL;</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='add'>+	v4l2_device_disconnect(&amp;gspca_dev-&gt;v4l2_dev);</div><div class='add'>+	video_unregister_device(&amp;gspca_dev-&gt;vdev);</div><div class='ctx'> </div><div class='del'>-	usb_set_intfdata(intf, NULL);</div><div class='add'>+	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> </div><div class='del'>-	/* release the device */</div><div class='ctx'> 	/* (this will call gspca_release() immediately or on last close) */</div><div class='del'>-	video_unregister_device(&amp;gspca_dev-&gt;vdev);</div><div class='del'>-</div><div class='del'>-/*	PDEBUG(D_PROBE, "disconnect complete"); */</div><div class='add'>+	v4l2_device_put(&amp;gspca_dev-&gt;v4l2_dev);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(gspca_disconnect);</div><div class='ctx'> </div><div class='hunk'>@@ -2474,7 +2395,9 @@ int gspca_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='ctx'> </div><div class='ctx'> 	if (!gspca_dev-&gt;streaming)</div><div class='ctx'> 		return 0;</div><div class='add'>+	mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 	gspca_dev-&gt;frozen = 1;		/* avoid urb error messages */</div><div class='add'>+	gspca_dev-&gt;usb_err = 0;</div><div class='ctx'> 	if (gspca_dev-&gt;sd_desc-&gt;stopN)</div><div class='ctx'> 		gspca_dev-&gt;sd_desc-&gt;stopN(gspca_dev);</div><div class='ctx'> 	destroy_urbs(gspca_dev);</div><div class='hunk'>@@ -2482,6 +2405,7 @@ int gspca_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='ctx'> 	gspca_set_alt0(gspca_dev);</div><div class='ctx'> 	if (gspca_dev-&gt;sd_desc-&gt;stop0)</div><div class='ctx'> 		gspca_dev-&gt;sd_desc-&gt;stop0(gspca_dev);</div><div class='add'>+	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(gspca_suspend);</div><div class='hunk'>@@ -2489,105 +2413,28 @@ EXPORT_SYMBOL(gspca_suspend);</div><div class='ctx'> int gspca_resume(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct gspca_dev *gspca_dev = usb_get_intfdata(intf);</div><div class='add'>+	int streaming, ret = 0;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 	gspca_dev-&gt;frozen = 0;</div><div class='add'>+	gspca_dev-&gt;usb_err = 0;</div><div class='ctx'> 	gspca_dev-&gt;sd_desc-&gt;init(gspca_dev);</div><div class='ctx'> 	gspca_input_create_urb(gspca_dev);</div><div class='del'>-	if (gspca_dev-&gt;streaming)</div><div class='del'>-		return gspca_init_transfer(gspca_dev);</div><div class='del'>-	return 0;</div><div class='add'>+	/*</div><div class='add'>+	 * Most subdrivers send all ctrl values on sd_start and thus</div><div class='add'>+	 * only write to the device registers on s_ctrl when streaming -&gt;</div><div class='add'>+	 * Clear streaming to avoid setting all ctrls twice.</div><div class='add'>+	 */</div><div class='add'>+	streaming = gspca_dev-&gt;streaming;</div><div class='add'>+	gspca_dev-&gt;streaming = 0;</div><div class='add'>+	v4l2_ctrl_handler_setup(gspca_dev-&gt;vdev.ctrl_handler);</div><div class='add'>+	if (streaming)</div><div class='add'>+		ret = gspca_init_transfer(gspca_dev);</div><div class='add'>+	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(gspca_resume);</div><div class='ctx'> #endif</div><div class='del'>-/* -- cam driver utility functions -- */</div><div class='del'>-</div><div class='del'>-/* auto gain and exposure algorithm based on the knee algorithm described here:</div><div class='del'>-   http://ytse.tricolour.net/docs/LowLightOptimization.html</div><div class='del'>-</div><div class='del'>-   Returns 0 if no changes were made, 1 if the gain and or exposure settings</div><div class='del'>-   where changed. */</div><div class='del'>-int gspca_auto_gain_n_exposure(struct gspca_dev *gspca_dev, int avg_lum,</div><div class='del'>-	int desired_avg_lum, int deadzone, int gain_knee, int exposure_knee)</div><div class='del'>-{</div><div class='del'>-	int i, steps, gain, orig_gain, exposure, orig_exposure, autogain;</div><div class='del'>-	const struct ctrl *gain_ctrl = NULL;</div><div class='del'>-	const struct ctrl *exposure_ctrl = NULL;</div><div class='del'>-	const struct ctrl *autogain_ctrl = NULL;</div><div class='del'>-	int retval = 0;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; gspca_dev-&gt;sd_desc-&gt;nctrls; i++) {</div><div class='del'>-		if (gspca_dev-&gt;ctrl_dis &amp; (1 &lt;&lt; i))</div><div class='del'>-			continue;</div><div class='del'>-		if (gspca_dev-&gt;sd_desc-&gt;ctrls[i].qctrl.id == V4L2_CID_GAIN)</div><div class='del'>-			gain_ctrl = &amp;gspca_dev-&gt;sd_desc-&gt;ctrls[i];</div><div class='del'>-		if (gspca_dev-&gt;sd_desc-&gt;ctrls[i].qctrl.id == V4L2_CID_EXPOSURE)</div><div class='del'>-			exposure_ctrl = &amp;gspca_dev-&gt;sd_desc-&gt;ctrls[i];</div><div class='del'>-		if (gspca_dev-&gt;sd_desc-&gt;ctrls[i].qctrl.id == V4L2_CID_AUTOGAIN)</div><div class='del'>-			autogain_ctrl = &amp;gspca_dev-&gt;sd_desc-&gt;ctrls[i];</div><div class='del'>-	}</div><div class='del'>-	if (!gain_ctrl || !exposure_ctrl || !autogain_ctrl) {</div><div class='del'>-		PDEBUG(D_ERR, "Error: gspca_auto_gain_n_exposure called "</div><div class='del'>-			"on cam without (auto)gain/exposure");</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (gain_ctrl-&gt;get(gspca_dev, &amp;gain) ||</div><div class='del'>-			exposure_ctrl-&gt;get(gspca_dev, &amp;exposure) ||</div><div class='del'>-			autogain_ctrl-&gt;get(gspca_dev, &amp;autogain) || !autogain)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	orig_gain = gain;</div><div class='del'>-	orig_exposure = exposure;</div><div class='del'>-</div><div class='del'>-	/* If we are of a multiple of deadzone, do multiple steps to reach the</div><div class='del'>-	   desired lumination fast (with the risc of a slight overshoot) */</div><div class='del'>-	steps = abs(desired_avg_lum - avg_lum) / deadzone;</div><div class='del'>-</div><div class='del'>-	PDEBUG(D_FRAM, "autogain: lum: %d, desired: %d, steps: %d",</div><div class='del'>-		avg_lum, desired_avg_lum, steps);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; steps; i++) {</div><div class='del'>-		if (avg_lum &gt; desired_avg_lum) {</div><div class='del'>-			if (gain &gt; gain_knee)</div><div class='del'>-				gain--;</div><div class='del'>-			else if (exposure &gt; exposure_knee)</div><div class='del'>-				exposure--;</div><div class='del'>-			else if (gain &gt; gain_ctrl-&gt;qctrl.default_value)</div><div class='del'>-				gain--;</div><div class='del'>-			else if (exposure &gt; exposure_ctrl-&gt;qctrl.minimum)</div><div class='del'>-				exposure--;</div><div class='del'>-			else if (gain &gt; gain_ctrl-&gt;qctrl.minimum)</div><div class='del'>-				gain--;</div><div class='del'>-			else</div><div class='del'>-				break;</div><div class='del'>-		} else {</div><div class='del'>-			if (gain &lt; gain_ctrl-&gt;qctrl.default_value)</div><div class='del'>-				gain++;</div><div class='del'>-			else if (exposure &lt; exposure_knee)</div><div class='del'>-				exposure++;</div><div class='del'>-			else if (gain &lt; gain_knee)</div><div class='del'>-				gain++;</div><div class='del'>-			else if (exposure &lt; exposure_ctrl-&gt;qctrl.maximum)</div><div class='del'>-				exposure++;</div><div class='del'>-			else if (gain &lt; gain_ctrl-&gt;qctrl.maximum)</div><div class='del'>-				gain++;</div><div class='del'>-			else</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (gain != orig_gain) {</div><div class='del'>-		gain_ctrl-&gt;set(gspca_dev, gain);</div><div class='del'>-		retval = 1;</div><div class='del'>-	}</div><div class='del'>-	if (exposure != orig_exposure) {</div><div class='del'>-		exposure_ctrl-&gt;set(gspca_dev, exposure);</div><div class='del'>-		retval = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(gspca_auto_gain_n_exposure);</div><div class='ctx'> </div><div class='ctx'> /* -- module insert / remove -- */</div><div class='ctx'> static int __init gspca_init(void)</div><div class='head'>diff --git a/drivers/media/video/gspca/gspca.h b/drivers/media/video/gspca/gspca.h<br/>index 589009f4496f..dc688c7f5e48 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/gspca.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/gspca.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/gspca.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/gspca.h</a></div><div class='hunk'>@@ -6,6 +6,8 @@</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-common.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='add'>+#include &lt;media/v4l2-device.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* compilation option */</div><div class='hunk'>@@ -115,6 +117,7 @@ struct sd_desc {</div><div class='ctx'> /* mandatory operations */</div><div class='ctx'> 	cam_cf_op config;	/* called on probe */</div><div class='ctx'> 	cam_op init;		/* called on probe and resume */</div><div class='add'>+	cam_op init_controls;	/* called on probe */</div><div class='ctx'> 	cam_op start;		/* called on stream on after URBs creation */</div><div class='ctx'> 	cam_pkt_op pkt_scan;</div><div class='ctx'> /* optional operations */</div><div class='hunk'>@@ -158,8 +161,10 @@ struct gspca_frame {</div><div class='ctx'> struct gspca_dev {</div><div class='ctx'> 	struct video_device vdev;	/* !! must be the first item */</div><div class='ctx'> 	struct module *module;		/* subdriver handling the device */</div><div class='add'>+	struct v4l2_device v4l2_dev;</div><div class='ctx'> 	struct usb_device *dev;</div><div class='ctx'> 	struct file *capt_file;		/* file doing video capture */</div><div class='add'>+					/* protected by queue_lock */</div><div class='ctx'> #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)</div><div class='ctx'> 	struct input_dev *input_dev;</div><div class='ctx'> 	char phys[64];			/* physical device path */</div><div class='hunk'>@@ -169,6 +174,16 @@ struct gspca_dev {</div><div class='ctx'> 	const struct sd_desc *sd_desc;		/* subdriver description */</div><div class='ctx'> 	unsigned ctrl_dis;		/* disabled controls (bit map) */</div><div class='ctx'> 	unsigned ctrl_inac;		/* inactive controls (bit map) */</div><div class='add'>+	struct v4l2_ctrl_handler ctrl_handler;</div><div class='add'>+</div><div class='add'>+	/* autogain and exposure or gain control cluster, these are global as</div><div class='add'>+	   the autogain/exposure functions in autogain_functions.c use them */</div><div class='add'>+	struct {</div><div class='add'>+		struct v4l2_ctrl *autogain;</div><div class='add'>+		struct v4l2_ctrl *exposure;</div><div class='add'>+		struct v4l2_ctrl *gain;</div><div class='add'>+		int exp_too_low_cnt, exp_too_high_cnt;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> #define USB_BUF_SZ 64</div><div class='ctx'> 	__u8 *usb_buf;				/* buffer for USB exchanges */</div><div class='hunk'>@@ -189,7 +204,7 @@ struct gspca_dev {</div><div class='ctx'> 	u8 fr_o;				/* next frame to dequeue */</div><div class='ctx'> 	__u8 last_packet_type;</div><div class='ctx'> 	__s8 empty_packet;		/* if (-1) don't check empty packets */</div><div class='del'>-	__u8 streaming;</div><div class='add'>+	__u8 streaming;			/* protected by both mutexes (*) */</div><div class='ctx'> </div><div class='ctx'> 	__u8 curr_mode;			/* current camera mode */</div><div class='ctx'> 	__u32 pixfmt;			/* current mode parameters */</div><div class='hunk'>@@ -211,6 +226,10 @@ struct gspca_dev {</div><div class='ctx'> 	__u8 iface;			/* USB interface number */</div><div class='ctx'> 	__u8 alt;			/* USB alternate setting */</div><div class='ctx'> 	u8 audio;			/* presence of audio device */</div><div class='add'>+</div><div class='add'>+	/* (*) These variables are proteced by both usb_lock and queue_lock,</div><div class='add'>+	   that is any code setting them is holding *both*, which means that</div><div class='add'>+	   any code getting them needs to hold at least one of them */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int gspca_dev_probe(struct usb_interface *intf,</div><div class='hunk'>@@ -232,6 +251,9 @@ void gspca_frame_add(struct gspca_dev *gspca_dev,</div><div class='ctx'> int gspca_suspend(struct usb_interface *intf, pm_message_t message);</div><div class='ctx'> int gspca_resume(struct usb_interface *intf);</div><div class='ctx'> #endif</div><div class='del'>-int gspca_auto_gain_n_exposure(struct gspca_dev *gspca_dev, int avg_lum,</div><div class='add'>+int gspca_expo_autogain(struct gspca_dev *gspca_dev, int avg_lum,</div><div class='ctx'> 	int desired_avg_lum, int deadzone, int gain_knee, int exposure_knee);</div><div class='add'>+int gspca_coarse_grained_expo_autogain(struct gspca_dev *gspca_dev,</div><div class='add'>+        int avg_lum, int desired_avg_lum, int deadzone);</div><div class='add'>+</div><div class='ctx'> #endif /* GSPCAV2_H */</div><div class='head'>diff --git a/drivers/media/video/gspca/jl2005bcd.c b/drivers/media/video/gspca/jl2005bcd.c<br/>index 53f58ef367cf..9c591c7c6f54 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/jl2005bcd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/jl2005bcd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/jl2005bcd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/jl2005bcd.c</a></div><div class='hunk'>@@ -335,7 +335,11 @@ static void jl2005c_dostream(struct work_struct *work)</div><div class='ctx'> 		goto quit_stream;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	while (gspca_dev-&gt;present &amp;&amp; gspca_dev-&gt;streaming) {</div><div class='add'>+	while (gspca_dev-&gt;dev &amp;&amp; gspca_dev-&gt;streaming) {</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+		if (gspca_dev-&gt;frozen)</div><div class='add'>+			break;</div><div class='add'>+#endif</div><div class='ctx'> 		/* Check if this is a new frame. If so, start the frame first */</div><div class='ctx'> 		if (!header_read) {</div><div class='ctx'> 			mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='hunk'>@@ -367,7 +371,7 @@ static void jl2005c_dostream(struct work_struct *work)</div><div class='ctx'> 					buffer, act_len);</div><div class='ctx'> 			header_read = 1;</div><div class='ctx'> 		}</div><div class='del'>-		while (bytes_left &gt; 0 &amp;&amp; gspca_dev-&gt;present) {</div><div class='add'>+		while (bytes_left &gt; 0 &amp;&amp; gspca_dev-&gt;dev) {</div><div class='ctx'> 			data_len = bytes_left &gt; JL2005C_MAX_TRANSFER ?</div><div class='ctx'> 				JL2005C_MAX_TRANSFER : bytes_left;</div><div class='ctx'> 			ret = usb_bulk_msg(gspca_dev-&gt;dev,</div><div class='hunk'>@@ -390,7 +394,7 @@ static void jl2005c_dostream(struct work_struct *work)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> quit_stream:</div><div class='del'>-	if (gspca_dev-&gt;present) {</div><div class='add'>+	if (gspca_dev-&gt;dev) {</div><div class='ctx'> 		mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 		jl2005c_stop(gspca_dev);</div><div class='ctx'> 		mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='head'>diff --git a/drivers/media/video/gspca/mars.c b/drivers/media/video/gspca/mars.c<br/>index b0231465afae..ec7b21ee79fb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/mars.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/mars.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/mars.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/mars.c</a></div><div class='hunk'>@@ -30,22 +30,19 @@ MODULE_AUTHOR("Michel Xhaard &lt;mxhaard@users.sourceforge.net&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("GSPCA/Mars USB Camera Driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='del'>-/* controls */</div><div class='del'>-enum e_ctrl {</div><div class='del'>-	BRIGHTNESS,</div><div class='del'>-	COLORS,</div><div class='del'>-	GAMMA,</div><div class='del'>-	SHARPNESS,</div><div class='del'>-	ILLUM_TOP,</div><div class='del'>-	ILLUM_BOT,</div><div class='del'>-	NCTRLS		/* number of controls */</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* specific webcam descriptor */</div><div class='ctx'> struct sd {</div><div class='ctx'> 	struct gspca_dev gspca_dev;	/* !! must be the first item */</div><div class='ctx'> </div><div class='del'>-	struct gspca_ctrl ctrls[NCTRLS];</div><div class='add'>+	struct v4l2_ctrl *brightness;</div><div class='add'>+	struct v4l2_ctrl *saturation;</div><div class='add'>+	struct v4l2_ctrl *sharpness;</div><div class='add'>+	struct v4l2_ctrl *gamma;</div><div class='add'>+	struct { /* illuminator control cluster */</div><div class='add'>+		struct v4l2_ctrl *illum_top;</div><div class='add'>+		struct v4l2_ctrl *illum_bottom;</div><div class='add'>+	};</div><div class='add'>+	struct v4l2_ctrl *jpegqual;</div><div class='ctx'> </div><div class='ctx'> 	u8 quality;</div><div class='ctx'> #define QUALITY_MIN 40</div><div class='hunk'>@@ -56,89 +53,10 @@ struct sd {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* V4L2 controls supported by the driver */</div><div class='del'>-static void setbrightness(struct gspca_dev *gspca_dev);</div><div class='del'>-static void setcolors(struct gspca_dev *gspca_dev);</div><div class='del'>-static void setgamma(struct gspca_dev *gspca_dev);</div><div class='del'>-static void setsharpness(struct gspca_dev *gspca_dev);</div><div class='del'>-static int sd_setilluminator1(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int sd_setilluminator2(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-</div><div class='del'>-static const struct ctrl sd_ctrls[NCTRLS] = {</div><div class='del'>-[BRIGHTNESS] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_BRIGHTNESS,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Brightness",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 30,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 15,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = setbrightness</div><div class='del'>-	},</div><div class='del'>-[COLORS] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_SATURATION,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Color",</div><div class='del'>-		.minimum = 1,</div><div class='del'>-		.maximum = 255,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 200,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = setcolors</div><div class='del'>-	},</div><div class='del'>-[GAMMA] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_GAMMA,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Gamma",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 3,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 1,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = setgamma</div><div class='del'>-	},</div><div class='del'>-[SHARPNESS] = {</div><div class='del'>-	    {</div><div class='del'>-		.id	 = V4L2_CID_SHARPNESS,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Sharpness",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 2,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 1,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = setsharpness</div><div class='del'>-	},</div><div class='del'>-[ILLUM_TOP] = {</div><div class='del'>-	    {</div><div class='del'>-		.id	 = V4L2_CID_ILLUMINATORS_1,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-		.name    = "Top illuminator",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 1,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 0,</div><div class='del'>-		.flags = V4L2_CTRL_FLAG_UPDATE,</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setilluminator1</div><div class='del'>-	},</div><div class='del'>-[ILLUM_BOT] = {</div><div class='del'>-	    {</div><div class='del'>-		.id	 = V4L2_CID_ILLUMINATORS_2,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-		.name    = "Bottom illuminator",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 1,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 0,</div><div class='del'>-		.flags = V4L2_CTRL_FLAG_UPDATE,</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setilluminator2</div><div class='del'>-	},</div><div class='del'>-};</div><div class='add'>+static void setbrightness(struct gspca_dev *gspca_dev, s32 val);</div><div class='add'>+static void setcolors(struct gspca_dev *gspca_dev, s32 val);</div><div class='add'>+static void setgamma(struct gspca_dev *gspca_dev, s32 val);</div><div class='add'>+static void setsharpness(struct gspca_dev *gspca_dev, s32 val);</div><div class='ctx'> </div><div class='ctx'> static const struct v4l2_pix_format vga_mode[] = {</div><div class='ctx'> 	{320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,</div><div class='hunk'>@@ -198,59 +116,130 @@ static void mi_w(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	reg_w(gspca_dev, 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setbrightness(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setbrightness(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='ctx'> 	gspca_dev-&gt;usb_buf[0] = 0x61;</div><div class='del'>-	gspca_dev-&gt;usb_buf[1] = sd-&gt;ctrls[BRIGHTNESS].val;</div><div class='add'>+	gspca_dev-&gt;usb_buf[1] = val;</div><div class='ctx'> 	reg_w(gspca_dev, 2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setcolors(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setcolors(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s16 val;</div><div class='del'>-</div><div class='del'>-	val = sd-&gt;ctrls[COLORS].val;</div><div class='ctx'> 	gspca_dev-&gt;usb_buf[0] = 0x5f;</div><div class='ctx'> 	gspca_dev-&gt;usb_buf[1] = val &lt;&lt; 3;</div><div class='ctx'> 	gspca_dev-&gt;usb_buf[2] = ((val &gt;&gt; 2) &amp; 0xf8) | 0x04;</div><div class='ctx'> 	reg_w(gspca_dev, 3);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setgamma(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setgamma(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='ctx'> 	gspca_dev-&gt;usb_buf[0] = 0x06;</div><div class='del'>-	gspca_dev-&gt;usb_buf[1] = sd-&gt;ctrls[GAMMA].val * 0x40;</div><div class='add'>+	gspca_dev-&gt;usb_buf[1] = val * 0x40;</div><div class='ctx'> 	reg_w(gspca_dev, 2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setsharpness(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setsharpness(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='ctx'> 	gspca_dev-&gt;usb_buf[0] = 0x67;</div><div class='del'>-	gspca_dev-&gt;usb_buf[1] = sd-&gt;ctrls[SHARPNESS].val * 4 + 3;</div><div class='add'>+	gspca_dev-&gt;usb_buf[1] = val * 4 + 3;</div><div class='ctx'> 	reg_w(gspca_dev, 2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setilluminators(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setilluminators(struct gspca_dev *gspca_dev, bool top, bool bottom)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='add'>+	/* both are off if not streaming */</div><div class='ctx'> 	gspca_dev-&gt;usb_buf[0] = 0x22;</div><div class='del'>-	if (sd-&gt;ctrls[ILLUM_TOP].val)</div><div class='add'>+	if (top)</div><div class='ctx'> 		gspca_dev-&gt;usb_buf[1] = 0x76;</div><div class='del'>-	else if (sd-&gt;ctrls[ILLUM_BOT].val)</div><div class='add'>+	else if (bottom)</div><div class='ctx'> 		gspca_dev-&gt;usb_buf[1] = 0x7a;</div><div class='ctx'> 	else</div><div class='ctx'> 		gspca_dev-&gt;usb_buf[1] = 0x7e;</div><div class='ctx'> 	reg_w(gspca_dev, 2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mars_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct gspca_dev *gspca_dev =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct gspca_dev, ctrl_handler);</div><div class='add'>+	struct sd *sd = (struct sd *)gspca_dev;</div><div class='add'>+</div><div class='add'>+	gspca_dev-&gt;usb_err = 0;</div><div class='add'>+</div><div class='add'>+	if (ctrl-&gt;id == V4L2_CID_ILLUMINATORS_1) {</div><div class='add'>+		/* only one can be on at a time */</div><div class='add'>+		if (ctrl-&gt;is_new &amp;&amp; ctrl-&gt;val)</div><div class='add'>+			sd-&gt;illum_bottom-&gt;val = 0;</div><div class='add'>+		if (sd-&gt;illum_bottom-&gt;is_new &amp;&amp; sd-&gt;illum_bottom-&gt;val)</div><div class='add'>+			sd-&gt;illum_top-&gt;val = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!gspca_dev-&gt;streaming)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_BRIGHTNESS:</div><div class='add'>+		setbrightness(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_SATURATION:</div><div class='add'>+		setcolors(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_GAMMA:</div><div class='add'>+		setgamma(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_ILLUMINATORS_1:</div><div class='add'>+		setilluminators(gspca_dev, sd-&gt;illum_top-&gt;val,</div><div class='add'>+					   sd-&gt;illum_bottom-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_SHARPNESS:</div><div class='add'>+		setsharpness(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_JPEG_COMPRESSION_QUALITY:</div><div class='add'>+		jpeg_set_qual(sd-&gt;jpeg_hdr, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return gspca_dev-&gt;usb_err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops mars_ctrl_ops = {</div><div class='add'>+	.s_ctrl = mars_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* this function is called at probe time */</div><div class='add'>+static int sd_init_controls(struct gspca_dev *gspca_dev)</div><div class='add'>+{</div><div class='add'>+	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	struct v4l2_ctrl_handler *hdl = &amp;gspca_dev-&gt;ctrl_handler;</div><div class='add'>+</div><div class='add'>+	gspca_dev-&gt;vdev.ctrl_handler = hdl;</div><div class='add'>+	v4l2_ctrl_handler_init(hdl, 7);</div><div class='add'>+	sd-&gt;brightness = v4l2_ctrl_new_std(hdl, &amp;mars_ctrl_ops,</div><div class='add'>+			V4L2_CID_BRIGHTNESS, 0, 30, 1, 15);</div><div class='add'>+	sd-&gt;saturation = v4l2_ctrl_new_std(hdl, &amp;mars_ctrl_ops,</div><div class='add'>+			V4L2_CID_SATURATION, 0, 255, 1, 200);</div><div class='add'>+	sd-&gt;gamma = v4l2_ctrl_new_std(hdl, &amp;mars_ctrl_ops,</div><div class='add'>+			V4L2_CID_GAMMA, 0, 3, 1, 1);</div><div class='add'>+	sd-&gt;sharpness = v4l2_ctrl_new_std(hdl, &amp;mars_ctrl_ops,</div><div class='add'>+			V4L2_CID_SHARPNESS, 0, 2, 1, 1);</div><div class='add'>+	sd-&gt;illum_top = v4l2_ctrl_new_std(hdl, &amp;mars_ctrl_ops,</div><div class='add'>+			V4L2_CID_ILLUMINATORS_1, 0, 1, 1, 0);</div><div class='add'>+	sd-&gt;illum_top-&gt;flags |= V4L2_CTRL_FLAG_UPDATE;</div><div class='add'>+	sd-&gt;illum_bottom = v4l2_ctrl_new_std(hdl, &amp;mars_ctrl_ops,</div><div class='add'>+			V4L2_CID_ILLUMINATORS_2, 0, 1, 1, 0);</div><div class='add'>+	sd-&gt;illum_bottom-&gt;flags |= V4L2_CTRL_FLAG_UPDATE;</div><div class='add'>+	sd-&gt;jpegqual = v4l2_ctrl_new_std(hdl, &amp;mars_ctrl_ops,</div><div class='add'>+			V4L2_CID_JPEG_COMPRESSION_QUALITY,</div><div class='add'>+			QUALITY_MIN, QUALITY_MAX, 1, QUALITY_DEF);</div><div class='add'>+	if (hdl-&gt;error) {</div><div class='add'>+		pr_err("Could not initialize controls\n");</div><div class='add'>+		return hdl-&gt;error;</div><div class='add'>+	}</div><div class='add'>+	v4l2_ctrl_cluster(2, &amp;sd-&gt;illum_top);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* this function is called at probe time */</div><div class='ctx'> static int sd_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> 			const struct usb_device_id *id)</div><div class='hunk'>@@ -261,7 +250,6 @@ static int sd_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	cam = &amp;gspca_dev-&gt;cam;</div><div class='ctx'> 	cam-&gt;cam_mode = vga_mode;</div><div class='ctx'> 	cam-&gt;nmodes = ARRAY_SIZE(vga_mode);</div><div class='del'>-	cam-&gt;ctrls = sd-&gt;ctrls;</div><div class='ctx'> 	sd-&gt;quality = QUALITY_DEF;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -269,7 +257,6 @@ static int sd_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> /* this function is called at probe and resume time */</div><div class='ctx'> static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='del'>-	gspca_dev-&gt;ctrl_inac = (1 &lt;&lt; ILLUM_TOP) | (1 &lt;&lt; ILLUM_BOT);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -282,7 +269,7 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	/* create the JPEG header */</div><div class='ctx'> 	jpeg_define(sd-&gt;jpeg_hdr, gspca_dev-&gt;height, gspca_dev-&gt;width,</div><div class='ctx'> 			0x21);		/* JPEG 422 */</div><div class='del'>-	jpeg_set_qual(sd-&gt;jpeg_hdr, sd-&gt;quality);</div><div class='add'>+	jpeg_set_qual(sd-&gt;jpeg_hdr, v4l2_ctrl_g_ctrl(sd-&gt;jpegqual));</div><div class='ctx'> </div><div class='ctx'> 	data = gspca_dev-&gt;usb_buf;</div><div class='ctx'> </div><div class='hunk'>@@ -301,7 +288,7 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	data[5] = 0x30;		/* reg 4, MI, PAS5101 :</div><div class='ctx'> 				 *	0x30 for 24mhz , 0x28 for 12mhz */</div><div class='ctx'> 	data[6] = 0x02;		/* reg 5, H start - was 0x04 */</div><div class='del'>-	data[7] = sd-&gt;ctrls[GAMMA].val * 0x40;	/* reg 0x06: gamma */</div><div class='add'>+	data[7] = v4l2_ctrl_g_ctrl(sd-&gt;gamma) * 0x40;	/* reg 0x06: gamma */</div><div class='ctx'> 	data[8] = 0x01;		/* reg 7, V start - was 0x03 */</div><div class='ctx'> /*	if (h_size == 320 ) */</div><div class='ctx'> /*		data[9]= 0x56;	 * reg 8, 24MHz, 2:1 scale down */</div><div class='hunk'>@@ -333,16 +320,16 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 				/* reg 0x5f/0x60 (LE) = saturation */</div><div class='ctx'> 				/* h (60): xxxx x100</div><div class='ctx'> 				 * l (5f): xxxx x000 */</div><div class='del'>-	data[2] = sd-&gt;ctrls[COLORS].val &lt;&lt; 3;</div><div class='del'>-	data[3] = ((sd-&gt;ctrls[COLORS].val &gt;&gt; 2) &amp; 0xf8) | 0x04;</div><div class='del'>-	data[4] = sd-&gt;ctrls[BRIGHTNESS].val; /* reg 0x61 = brightness */</div><div class='add'>+	data[2] = v4l2_ctrl_g_ctrl(sd-&gt;saturation) &lt;&lt; 3;</div><div class='add'>+	data[3] = ((v4l2_ctrl_g_ctrl(sd-&gt;saturation) &gt;&gt; 2) &amp; 0xf8) | 0x04;</div><div class='add'>+	data[4] = v4l2_ctrl_g_ctrl(sd-&gt;brightness); /* reg 0x61 = brightness */</div><div class='ctx'> 	data[5] = 0x00;</div><div class='ctx'> </div><div class='ctx'> 	reg_w(gspca_dev, 6);</div><div class='ctx'> </div><div class='ctx'> 	data[0] = 0x67;</div><div class='ctx'> /*jfm: from win trace*/</div><div class='del'>-	data[1] = sd-&gt;ctrls[SHARPNESS].val * 4 + 3;</div><div class='add'>+	data[1] = v4l2_ctrl_g_ctrl(sd-&gt;sharpness) * 4 + 3;</div><div class='ctx'> 	data[2] = 0x14;</div><div class='ctx'> 	reg_w(gspca_dev, 3);</div><div class='ctx'> </div><div class='hunk'>@@ -365,7 +352,9 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	data[1] = 0x4d;		/* ISOC transferring enable... */</div><div class='ctx'> 	reg_w(gspca_dev, 2);</div><div class='ctx'> </div><div class='del'>-	gspca_dev-&gt;ctrl_inac = 0; /* activate the illuminator controls */</div><div class='add'>+	setilluminators(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;illum_top),</div><div class='add'>+				   v4l2_ctrl_g_ctrl(sd-&gt;illum_bottom));</div><div class='add'>+</div><div class='ctx'> 	return gspca_dev-&gt;usb_err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -373,11 +362,9 @@ static void sd_stopN(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> </div><div class='del'>-	gspca_dev-&gt;ctrl_inac = (1 &lt;&lt; ILLUM_TOP) | (1 &lt;&lt; ILLUM_BOT);</div><div class='del'>-	if (sd-&gt;ctrls[ILLUM_TOP].val || sd-&gt;ctrls[ILLUM_BOT].val) {</div><div class='del'>-		sd-&gt;ctrls[ILLUM_TOP].val = 0;</div><div class='del'>-		sd-&gt;ctrls[ILLUM_BOT].val = 0;</div><div class='del'>-		setilluminators(gspca_dev);</div><div class='add'>+	if (v4l2_ctrl_g_ctrl(sd-&gt;illum_top) ||</div><div class='add'>+	    v4l2_ctrl_g_ctrl(sd-&gt;illum_bottom)) {</div><div class='add'>+		setilluminators(gspca_dev, false, false);</div><div class='ctx'> 		msleep(20);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -424,43 +411,16 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sd_setilluminator1(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	/* only one illuminator may be on */</div><div class='del'>-	sd-&gt;ctrls[ILLUM_TOP].val = val;</div><div class='del'>-	if (val)</div><div class='del'>-		sd-&gt;ctrls[ILLUM_BOT].val = 0;</div><div class='del'>-	setilluminators(gspca_dev);</div><div class='del'>-	return gspca_dev-&gt;usb_err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_setilluminator2(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	/* only one illuminator may be on */</div><div class='del'>-	sd-&gt;ctrls[ILLUM_BOT].val = val;</div><div class='del'>-	if (val)</div><div class='del'>-		sd-&gt;ctrls[ILLUM_TOP].val = 0;</div><div class='del'>-	setilluminators(gspca_dev);</div><div class='del'>-	return gspca_dev-&gt;usb_err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int sd_set_jcomp(struct gspca_dev *gspca_dev,</div><div class='ctx'> 			struct v4l2_jpegcompression *jcomp)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (jcomp-&gt;quality &lt; QUALITY_MIN)</div><div class='del'>-		sd-&gt;quality = QUALITY_MIN;</div><div class='del'>-	else if (jcomp-&gt;quality &gt; QUALITY_MAX)</div><div class='del'>-		sd-&gt;quality = QUALITY_MAX;</div><div class='del'>-	else</div><div class='del'>-		sd-&gt;quality = jcomp-&gt;quality;</div><div class='del'>-	if (gspca_dev-&gt;streaming)</div><div class='del'>-		jpeg_set_qual(sd-&gt;jpeg_hdr, sd-&gt;quality);</div><div class='add'>+	ret = v4l2_ctrl_s_ctrl(sd-&gt;jpegqual, jcomp-&gt;quality);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	jcomp-&gt;quality = v4l2_ctrl_g_ctrl(sd-&gt;jpegqual);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -470,7 +430,7 @@ static int sd_get_jcomp(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> </div><div class='ctx'> 	memset(jcomp, 0, sizeof *jcomp);</div><div class='del'>-	jcomp-&gt;quality = sd-&gt;quality;</div><div class='add'>+	jcomp-&gt;quality = v4l2_ctrl_g_ctrl(sd-&gt;jpegqual);</div><div class='ctx'> 	jcomp-&gt;jpeg_markers = V4L2_JPEG_MARKER_DHT</div><div class='ctx'> 			| V4L2_JPEG_MARKER_DQT;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -479,10 +439,9 @@ static int sd_get_jcomp(struct gspca_dev *gspca_dev,</div><div class='ctx'> /* sub-driver description */</div><div class='ctx'> static const struct sd_desc sd_desc = {</div><div class='ctx'> 	.name = MODULE_NAME,</div><div class='del'>-	.ctrls = sd_ctrls,</div><div class='del'>-	.nctrls = NCTRLS,</div><div class='ctx'> 	.config = sd_config,</div><div class='ctx'> 	.init = sd_init,</div><div class='add'>+	.init_controls = sd_init_controls,</div><div class='ctx'> 	.start = sd_start,</div><div class='ctx'> 	.stopN = sd_stopN,</div><div class='ctx'> 	.pkt_scan = sd_pkt_scan,</div><div class='hunk'>@@ -513,6 +472,7 @@ static struct usb_driver sd_driver = {</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> 	.suspend = gspca_suspend,</div><div class='ctx'> 	.resume = gspca_resume,</div><div class='add'>+	.reset_resume = gspca_resume,</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/gspca/nw80x.c b/drivers/media/video/gspca/nw80x.c<br/>index 7167cac7359c..42e021931e60 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/nw80x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/nw80x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/nw80x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/nw80x.c</a></div><div class='hunk'>@@ -2001,6 +2001,8 @@ static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> 	return gspca_dev-&gt;usb_err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define WANT_REGULAR_AUTOGAIN</div><div class='add'>+#define WANT_COARSE_EXPO_AUTOGAIN</div><div class='ctx'> #include "autogain_functions.h"</div><div class='ctx'> </div><div class='ctx'> static void do_autogain(struct gspca_dev *gspca_dev)</div><div class='head'>diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c<br/>index 739e8a2a2d30..183457c5cfdb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/ov519.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/ov519.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/ov519.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/ov519.c</a></div><div class='hunk'>@@ -2804,7 +2804,7 @@ static void ov7xx0_configure(struct sd *sd)</div><div class='ctx'> 	/* add OV7670 here</div><div class='ctx'> 	 * it appears to be wrongly detected as a 7610 by default */</div><div class='ctx'> 	if (rc &lt; 0) {</div><div class='del'>-		PDEBUG(D_ERR, "Error detecting sensor type");</div><div class='add'>+		pr_err("Error detecting sensor type\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	if ((rc &amp; 3) == 3) {</div><div class='hunk'>@@ -2832,12 +2832,12 @@ static void ov7xx0_configure(struct sd *sd)</div><div class='ctx'> 		/* try to read product id registers */</div><div class='ctx'> 		high = i2c_r(sd, 0x0a);</div><div class='ctx'> 		if (high &lt; 0) {</div><div class='del'>-			PDEBUG(D_ERR, "Error detecting camera chip PID");</div><div class='add'>+			pr_err("Error detecting camera chip PID\n");</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 		low = i2c_r(sd, 0x0b);</div><div class='ctx'> 		if (low &lt; 0) {</div><div class='del'>-			PDEBUG(D_ERR, "Error detecting camera chip VER");</div><div class='add'>+			pr_err("Error detecting camera chip VER\n");</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (high == 0x76) {</div><div class='hunk'>@@ -2863,7 +2863,7 @@ static void ov7xx0_configure(struct sd *sd)</div><div class='ctx'> 				sd-&gt;sensor = SEN_OV7660;</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='del'>-				PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);</div><div class='add'>+				pr_err("Unknown sensor: 0x76%02x\n", low);</div><div class='ctx'> 				return;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -2884,7 +2884,7 @@ static void ov6xx0_configure(struct sd *sd)</div><div class='ctx'> 	/* Detect sensor (sub)type */</div><div class='ctx'> 	rc = i2c_r(sd, OV7610_REG_COM_I);</div><div class='ctx'> 	if (rc &lt; 0) {</div><div class='del'>-		PDEBUG(D_ERR, "Error detecting sensor type");</div><div class='add'>+		pr_err("Error detecting sensor type\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/gspca/ov534.c b/drivers/media/video/gspca/ov534.c<br/>index 04753391de3e..b5acb1e4b4e7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/ov534.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/ov534.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/ov534.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/ov534.c</a></div><div class='hunk'>@@ -34,6 +34,8 @@</div><div class='ctx'> </div><div class='ctx'> #include "gspca.h"</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/fixp-arith.h&gt;</div><div class='add'>+</div><div class='ctx'> #define OV534_REG_ADDRESS	0xf1	/* sensor address */</div><div class='ctx'> #define OV534_REG_SUBADDR	0xf2</div><div class='ctx'> #define OV534_REG_WRITE		0xf3</div><div class='hunk'>@@ -53,6 +55,8 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> /* controls */</div><div class='ctx'> enum e_ctrl {</div><div class='add'>+	HUE,</div><div class='add'>+	SATURATION,</div><div class='ctx'> 	BRIGHTNESS,</div><div class='ctx'> 	CONTRAST,</div><div class='ctx'> 	GAIN,</div><div class='hunk'>@@ -63,7 +67,6 @@ enum e_ctrl {</div><div class='ctx'> 	SHARPNESS,</div><div class='ctx'> 	HFLIP,</div><div class='ctx'> 	VFLIP,</div><div class='del'>-	COLORS,</div><div class='ctx'> 	LIGHTFREQ,</div><div class='ctx'> 	NCTRLS		/* number of controls */</div><div class='ctx'> };</div><div class='hunk'>@@ -87,6 +90,8 @@ enum sensors {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* V4L2 controls supported by the driver */</div><div class='add'>+static void sethue(struct gspca_dev *gspca_dev);</div><div class='add'>+static void setsaturation(struct gspca_dev *gspca_dev);</div><div class='ctx'> static void setbrightness(struct gspca_dev *gspca_dev);</div><div class='ctx'> static void setcontrast(struct gspca_dev *gspca_dev);</div><div class='ctx'> static void setgain(struct gspca_dev *gspca_dev);</div><div class='hunk'>@@ -96,13 +101,36 @@ static void setawb(struct gspca_dev *gspca_dev);</div><div class='ctx'> static void setaec(struct gspca_dev *gspca_dev);</div><div class='ctx'> static void setsharpness(struct gspca_dev *gspca_dev);</div><div class='ctx'> static void sethvflip(struct gspca_dev *gspca_dev);</div><div class='del'>-static void setcolors(struct gspca_dev *gspca_dev);</div><div class='ctx'> static void setlightfreq(struct gspca_dev *gspca_dev);</div><div class='ctx'> </div><div class='ctx'> static int sd_start(struct gspca_dev *gspca_dev);</div><div class='ctx'> static void sd_stopN(struct gspca_dev *gspca_dev);</div><div class='ctx'> </div><div class='ctx'> static const struct ctrl sd_ctrls[] = {</div><div class='add'>+[HUE] = {</div><div class='add'>+		{</div><div class='add'>+			.id      = V4L2_CID_HUE,</div><div class='add'>+			.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='add'>+			.name    = "Hue",</div><div class='add'>+			.minimum = -90,</div><div class='add'>+			.maximum = 90,</div><div class='add'>+			.step    = 1,</div><div class='add'>+			.default_value = 0,</div><div class='add'>+		},</div><div class='add'>+		.set_control = sethue</div><div class='add'>+	},</div><div class='add'>+[SATURATION] = {</div><div class='add'>+		{</div><div class='add'>+			.id      = V4L2_CID_SATURATION,</div><div class='add'>+			.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='add'>+			.name    = "Saturation",</div><div class='add'>+			.minimum = 0,</div><div class='add'>+			.maximum = 255,</div><div class='add'>+			.step    = 1,</div><div class='add'>+			.default_value = 64,</div><div class='add'>+		},</div><div class='add'>+		.set_control = setsaturation</div><div class='add'>+	},</div><div class='ctx'> [BRIGHTNESS] = {</div><div class='ctx'> 		{</div><div class='ctx'> 			.id      = V4L2_CID_BRIGHTNESS,</div><div class='hunk'>@@ -223,18 +251,6 @@ static const struct ctrl sd_ctrls[] = {</div><div class='ctx'> 		},</div><div class='ctx'> 		.set_control = sethvflip</div><div class='ctx'> 	},</div><div class='del'>-[COLORS] = {</div><div class='del'>-		{</div><div class='del'>-			.id      = V4L2_CID_SATURATION,</div><div class='del'>-			.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name    = "Saturation",</div><div class='del'>-			.minimum = 0,</div><div class='del'>-			.maximum = 6,</div><div class='del'>-			.step    = 1,</div><div class='del'>-			.default_value = 3,</div><div class='del'>-		},</div><div class='del'>-		.set_control = setcolors</div><div class='del'>-	},</div><div class='ctx'> [LIGHTFREQ] = {</div><div class='ctx'> 		{</div><div class='ctx'> 			.id      = V4L2_CID_POWER_LINE_FREQUENCY,</div><div class='hunk'>@@ -684,7 +700,7 @@ static const u8 sensor_init_772x[][2] = {</div><div class='ctx'> 	{ 0x9c, 0x20 },</div><div class='ctx'> 	{ 0x9e, 0x81 },</div><div class='ctx'> </div><div class='del'>-	{ 0xa6, 0x04 },</div><div class='add'>+	{ 0xa6, 0x07 },</div><div class='ctx'> 	{ 0x7e, 0x0c },</div><div class='ctx'> 	{ 0x7f, 0x16 },</div><div class='ctx'> 	{ 0x80, 0x2a },</div><div class='hunk'>@@ -955,6 +971,74 @@ static void set_frame_rate(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	PDEBUG(D_PROBE, "frame_rate: %d", r-&gt;fps);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void sethue(struct gspca_dev *gspca_dev)</div><div class='add'>+{</div><div class='add'>+	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	val = sd-&gt;ctrls[HUE].val;</div><div class='add'>+	if (sd-&gt;sensor == SENSOR_OV767x) {</div><div class='add'>+		/* TBD */</div><div class='add'>+	} else {</div><div class='add'>+		s16 huesin;</div><div class='add'>+		s16 huecos;</div><div class='add'>+</div><div class='add'>+		/* fixp_sin and fixp_cos accept only positive values, while</div><div class='add'>+		 * our val is between -90 and 90</div><div class='add'>+		 */</div><div class='add'>+		val += 360;</div><div class='add'>+</div><div class='add'>+		/* According to the datasheet the registers expect HUESIN and</div><div class='add'>+		 * HUECOS to be the result of the trigonometric functions,</div><div class='add'>+		 * scaled by 0x80.</div><div class='add'>+		 *</div><div class='add'>+		 * The 0x100 here represents the maximun absolute value</div><div class='add'>+		 * returned byt fixp_sin and fixp_cos, so the scaling will</div><div class='add'>+		 * consider the result like in the interval [-1.0, 1.0].</div><div class='add'>+		 */</div><div class='add'>+		huesin = fixp_sin(val) * 0x80 / 0x100;</div><div class='add'>+		huecos = fixp_cos(val) * 0x80 / 0x100;</div><div class='add'>+</div><div class='add'>+		if (huesin &lt; 0) {</div><div class='add'>+			sccb_reg_write(gspca_dev, 0xab,</div><div class='add'>+				sccb_reg_read(gspca_dev, 0xab) | 0x2);</div><div class='add'>+			huesin = -huesin;</div><div class='add'>+		} else {</div><div class='add'>+			sccb_reg_write(gspca_dev, 0xab,</div><div class='add'>+				sccb_reg_read(gspca_dev, 0xab) &amp; ~0x2);</div><div class='add'>+</div><div class='add'>+		}</div><div class='add'>+		sccb_reg_write(gspca_dev, 0xa9, (u8)huecos);</div><div class='add'>+		sccb_reg_write(gspca_dev, 0xaa, (u8)huesin);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void setsaturation(struct gspca_dev *gspca_dev)</div><div class='add'>+{</div><div class='add'>+	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	val = sd-&gt;ctrls[SATURATION].val;</div><div class='add'>+	if (sd-&gt;sensor == SENSOR_OV767x) {</div><div class='add'>+		int i;</div><div class='add'>+		static u8 color_tb[][6] = {</div><div class='add'>+			{0x42, 0x42, 0x00, 0x11, 0x30, 0x41},</div><div class='add'>+			{0x52, 0x52, 0x00, 0x16, 0x3c, 0x52},</div><div class='add'>+			{0x66, 0x66, 0x00, 0x1b, 0x4b, 0x66},</div><div class='add'>+			{0x80, 0x80, 0x00, 0x22, 0x5e, 0x80},</div><div class='add'>+			{0x9a, 0x9a, 0x00, 0x29, 0x71, 0x9a},</div><div class='add'>+			{0xb8, 0xb8, 0x00, 0x31, 0x87, 0xb8},</div><div class='add'>+			{0xdd, 0xdd, 0x00, 0x3b, 0xa2, 0xdd},</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(color_tb[0]); i++)</div><div class='add'>+			sccb_reg_write(gspca_dev, 0x4f + i, color_tb[val][i]);</div><div class='add'>+	} else {</div><div class='add'>+		sccb_reg_write(gspca_dev, 0xa7, val); /* U saturation */</div><div class='add'>+		sccb_reg_write(gspca_dev, 0xa8, val); /* V saturation */</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void setbrightness(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='hunk'>@@ -1132,26 +1216,6 @@ static void sethvflip(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setcolors(struct gspca_dev *gspca_dev)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	u8 val;</div><div class='del'>-	int i;</div><div class='del'>-	static u8 color_tb[][6] = {</div><div class='del'>-		{0x42, 0x42, 0x00, 0x11, 0x30, 0x41},</div><div class='del'>-		{0x52, 0x52, 0x00, 0x16, 0x3c, 0x52},</div><div class='del'>-		{0x66, 0x66, 0x00, 0x1b, 0x4b, 0x66},</div><div class='del'>-		{0x80, 0x80, 0x00, 0x22, 0x5e, 0x80},</div><div class='del'>-		{0x9a, 0x9a, 0x00, 0x29, 0x71, 0x9a},</div><div class='del'>-		{0xb8, 0xb8, 0x00, 0x31, 0x87, 0xb8},</div><div class='del'>-		{0xdd, 0xdd, 0x00, 0x3b, 0xa2, 0xdd},</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	val = sd-&gt;ctrls[COLORS].val;</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(color_tb[0]); i++)</div><div class='del'>-		sccb_reg_write(gspca_dev, 0x4f + i, color_tb[val][i]);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void setlightfreq(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='hunk'>@@ -1225,9 +1289,13 @@ static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> </div><div class='ctx'> 	if ((sensor_id &amp; 0xfff0) == 0x7670) {</div><div class='ctx'> 		sd-&gt;sensor = SENSOR_OV767x;</div><div class='del'>-		gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; GAIN) |</div><div class='add'>+		gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; HUE) |</div><div class='add'>+					(1 &lt;&lt; GAIN) |</div><div class='ctx'> 					(1 &lt;&lt; AGC) |</div><div class='ctx'> 					(1 &lt;&lt; SHARPNESS);	/* auto */</div><div class='add'>+		sd-&gt;ctrls[SATURATION].min = 0,</div><div class='add'>+		sd-&gt;ctrls[SATURATION].max = 6,</div><div class='add'>+		sd-&gt;ctrls[SATURATION].def = 3,</div><div class='ctx'> 		sd-&gt;ctrls[BRIGHTNESS].min = -127;</div><div class='ctx'> 		sd-&gt;ctrls[BRIGHTNESS].max = 127;</div><div class='ctx'> 		sd-&gt;ctrls[BRIGHTNESS].def = 0;</div><div class='hunk'>@@ -1243,7 +1311,6 @@ static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		gspca_dev-&gt;cam.nmodes = ARRAY_SIZE(ov767x_mode);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		sd-&gt;sensor = SENSOR_OV772x;</div><div class='del'>-		gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; COLORS);</div><div class='ctx'> 		gspca_dev-&gt;cam.bulk = 1;</div><div class='ctx'> 		gspca_dev-&gt;cam.bulk_size = 16384;</div><div class='ctx'> 		gspca_dev-&gt;cam.bulk_nurbs = 2;</div><div class='hunk'>@@ -1302,6 +1369,9 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> </div><div class='ctx'> 	set_frame_rate(gspca_dev);</div><div class='ctx'> </div><div class='add'>+	if (!(gspca_dev-&gt;ctrl_dis &amp; (1 &lt;&lt; HUE)))</div><div class='add'>+		sethue(gspca_dev);</div><div class='add'>+	setsaturation(gspca_dev);</div><div class='ctx'> 	if (!(gspca_dev-&gt;ctrl_dis &amp; (1 &lt;&lt; AGC)))</div><div class='ctx'> 		setagc(gspca_dev);</div><div class='ctx'> 	setawb(gspca_dev);</div><div class='hunk'>@@ -1314,8 +1384,6 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	if (!(gspca_dev-&gt;ctrl_dis &amp; (1 &lt;&lt; SHARPNESS)))</div><div class='ctx'> 		setsharpness(gspca_dev);</div><div class='ctx'> 	sethvflip(gspca_dev);</div><div class='del'>-	if (!(gspca_dev-&gt;ctrl_dis &amp; (1 &lt;&lt; COLORS)))</div><div class='del'>-		setcolors(gspca_dev);</div><div class='ctx'> 	setlightfreq(gspca_dev);</div><div class='ctx'> </div><div class='ctx'> 	ov534_set_led(gspca_dev, 1);</div><div class='head'>diff --git a/drivers/media/video/gspca/ov534_9.c b/drivers/media/video/gspca/ov534_9.c<br/>index e6601b886032..b5797308a39b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/ov534_9.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/ov534_9.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/ov534_9.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/ov534_9.c</a></div><div class='hunk'>@@ -1376,7 +1376,7 @@ static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> 				ARRAY_SIZE(ov562x_init_2));</div><div class='ctx'> 		reg_w(gspca_dev, 0xe0, 0x00);</div><div class='ctx'> 	} else {</div><div class='del'>-		err("Unknown sensor %04x", sensor_id);</div><div class='add'>+		pr_err("Unknown sensor %04x", sensor_id);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/gspca/pac207.c b/drivers/media/video/gspca/pac207.c<br/>index 3844c49f269c..fa661c6d6d55 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/pac207.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/pac207.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/pac207.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/pac207.c</a></div><div class='hunk'>@@ -29,6 +29,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='ctx'> #include "gspca.h"</div><div class='add'>+/* Include pac common sof detection functions */</div><div class='add'>+#include "pac_common.h"</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Hans de Goede &lt;hdegoede@redhat.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Pixart PAC207");</div><div class='hunk'>@@ -39,16 +41,17 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> #define PAC207_BRIGHTNESS_MIN		0</div><div class='ctx'> #define PAC207_BRIGHTNESS_MAX		255</div><div class='ctx'> #define PAC207_BRIGHTNESS_DEFAULT	46</div><div class='add'>+#define PAC207_BRIGHTNESS_REG		0x08</div><div class='ctx'> </div><div class='ctx'> #define PAC207_EXPOSURE_MIN		3</div><div class='ctx'> #define PAC207_EXPOSURE_MAX		90 /* 1 sec expo time / 1 fps */</div><div class='ctx'> #define PAC207_EXPOSURE_DEFAULT		5 /* power on default: 3 */</div><div class='del'>-#define PAC207_EXPOSURE_KNEE		9 /* fps: 90 / exposure -&gt; 9: 10 fps */</div><div class='add'>+#define PAC207_EXPOSURE_REG		0x02</div><div class='ctx'> </div><div class='ctx'> #define PAC207_GAIN_MIN			0</div><div class='ctx'> #define PAC207_GAIN_MAX			31</div><div class='ctx'> #define PAC207_GAIN_DEFAULT		7 /* power on default: 9 */</div><div class='del'>-#define PAC207_GAIN_KNEE		15</div><div class='add'>+#define PAC207_GAIN_REG			0x0e</div><div class='ctx'> </div><div class='ctx'> #define PAC207_AUTOGAIN_DEADZONE	30</div><div class='ctx'> </div><div class='hunk'>@@ -56,13 +59,9 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> struct sd {</div><div class='ctx'> 	struct gspca_dev gspca_dev;		/* !! must be the first item */</div><div class='ctx'> </div><div class='del'>-	u8 mode;</div><div class='del'>-</div><div class='del'>-	u8 brightness;</div><div class='del'>-	u8 exposure;</div><div class='del'>-	u8 autogain;</div><div class='del'>-	u8 gain;</div><div class='add'>+	struct v4l2_ctrl *brightness;</div><div class='ctx'> </div><div class='add'>+	u8 mode;</div><div class='ctx'> 	u8 sof_read;</div><div class='ctx'> 	u8 header_read;</div><div class='ctx'> 	u8 autogain_ignore_frames;</div><div class='hunk'>@@ -70,80 +69,6 @@ struct sd {</div><div class='ctx'> 	atomic_t avg_lum;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* V4L2 controls supported by the driver */</div><div class='del'>-static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='del'>-static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='del'>-static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='del'>-static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='del'>-</div><div class='del'>-static const struct ctrl sd_ctrls[] = {</div><div class='del'>-#define SD_BRIGHTNESS 0</div><div class='del'>-	{</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_BRIGHTNESS,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Brightness",</div><div class='del'>-		.minimum = PAC207_BRIGHTNESS_MIN,</div><div class='del'>-		.maximum = PAC207_BRIGHTNESS_MAX,</div><div class='del'>-		.step = 1,</div><div class='del'>-		.default_value = PAC207_BRIGHTNESS_DEFAULT,</div><div class='del'>-		.flags = 0,</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setbrightness,</div><div class='del'>-	    .get = sd_getbrightness,</div><div class='del'>-	},</div><div class='del'>-#define SD_EXPOSURE 1</div><div class='del'>-	{</div><div class='del'>-	    {</div><div class='del'>-		.id = V4L2_CID_EXPOSURE,</div><div class='del'>-		.type = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name = "Exposure",</div><div class='del'>-		.minimum = PAC207_EXPOSURE_MIN,</div><div class='del'>-		.maximum = PAC207_EXPOSURE_MAX,</div><div class='del'>-		.step = 1,</div><div class='del'>-		.default_value = PAC207_EXPOSURE_DEFAULT,</div><div class='del'>-		.flags = 0,</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setexposure,</div><div class='del'>-	    .get = sd_getexposure,</div><div class='del'>-	},</div><div class='del'>-#define SD_AUTOGAIN 2</div><div class='del'>-	{</div><div class='del'>-	    {</div><div class='del'>-		.id	  = V4L2_CID_AUTOGAIN,</div><div class='del'>-		.type	= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-		.name	= "Auto Gain",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 1,</div><div class='del'>-		.step	= 1,</div><div class='del'>-#define AUTOGAIN_DEF 1</div><div class='del'>-		.default_value = AUTOGAIN_DEF,</div><div class='del'>-		.flags = 0,</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setautogain,</div><div class='del'>-	    .get = sd_getautogain,</div><div class='del'>-	},</div><div class='del'>-#define SD_GAIN 3</div><div class='del'>-	{</div><div class='del'>-	    {</div><div class='del'>-		.id = V4L2_CID_GAIN,</div><div class='del'>-		.type = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name = "Gain",</div><div class='del'>-		.minimum = PAC207_GAIN_MIN,</div><div class='del'>-		.maximum = PAC207_GAIN_MAX,</div><div class='del'>-		.step = 1,</div><div class='del'>-		.default_value = PAC207_GAIN_DEFAULT,</div><div class='del'>-		.flags = 0,</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setgain,</div><div class='del'>-	    .get = sd_getgain,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct v4l2_pix_format sif_mode[] = {</div><div class='ctx'> 	{176, 144, V4L2_PIX_FMT_PAC207, V4L2_FIELD_NONE,</div><div class='ctx'> 		.bytesperline = 176,</div><div class='hunk'>@@ -167,39 +92,44 @@ static const __u8 pac207_sensor_init[][8] = {</div><div class='ctx'> 	{0x32, 0x00, 0x96, 0x00, 0xa2, 0x02, 0xaf, 0x00},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int pac207_write_regs(struct gspca_dev *gspca_dev, u16 index,</div><div class='add'>+static void pac207_write_regs(struct gspca_dev *gspca_dev, u16 index,</div><div class='ctx'> 	const u8 *buffer, u16 length)</div><div class='ctx'> {</div><div class='ctx'> 	struct usb_device *udev = gspca_dev-&gt;dev;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (gspca_dev-&gt;usb_err &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	memcpy(gspca_dev-&gt;usb_buf, buffer, length);</div><div class='ctx'> </div><div class='ctx'> 	err = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0x01,</div><div class='ctx'> 			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='ctx'> 			0x00, index,</div><div class='ctx'> 			gspca_dev-&gt;usb_buf, length, PAC207_CTRL_TIMEOUT);</div><div class='del'>-	if (err &lt; 0)</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		pr_err("Failed to write registers to index 0x%04X, error %d\n",</div><div class='ctx'> 		       index, err);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+		gspca_dev-&gt;usb_err = err;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static int pac207_write_reg(struct gspca_dev *gspca_dev, u16 index, u16 value)</div><div class='add'>+static void pac207_write_reg(struct gspca_dev *gspca_dev, u16 index, u16 value)</div><div class='ctx'> {</div><div class='ctx'> 	struct usb_device *udev = gspca_dev-&gt;dev;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (gspca_dev-&gt;usb_err &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	err = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0x00,</div><div class='ctx'> 			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='ctx'> 			value, index, NULL, 0, PAC207_CTRL_TIMEOUT);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='ctx'> 		pr_err("Failed to write a register (index 0x%04X, value 0x%02X, error %d)\n",</div><div class='ctx'> 		       index, value, err);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+		gspca_dev-&gt;usb_err = err;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pac207_read_reg(struct gspca_dev *gspca_dev, u16 index)</div><div class='hunk'>@@ -207,6 +137,9 @@ static int pac207_read_reg(struct gspca_dev *gspca_dev, u16 index)</div><div class='ctx'> 	struct usb_device *udev = gspca_dev-&gt;dev;</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='add'>+	if (gspca_dev-&gt;usb_err &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	res = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), 0x00,</div><div class='ctx'> 			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='ctx'> 			0x00, index,</div><div class='hunk'>@@ -214,7 +147,8 @@ static int pac207_read_reg(struct gspca_dev *gspca_dev, u16 index)</div><div class='ctx'> 	if (res &lt; 0) {</div><div class='ctx'> 		pr_err("Failed to read a register (index 0x%04X, error %d)\n",</div><div class='ctx'> 		       index, res);</div><div class='del'>-		return res;</div><div class='add'>+		gspca_dev-&gt;usb_err = res;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return gspca_dev-&gt;usb_buf[0];</div><div class='hunk'>@@ -224,7 +158,6 @@ static int pac207_read_reg(struct gspca_dev *gspca_dev, u16 index)</div><div class='ctx'> static int sd_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> 			const struct usb_device_id *id)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> 	struct cam *cam;</div><div class='ctx'> 	u8 idreg[2];</div><div class='ctx'> </div><div class='hunk'>@@ -247,10 +180,6 @@ static int sd_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	cam = &amp;gspca_dev-&gt;cam;</div><div class='ctx'> 	cam-&gt;cam_mode = sif_mode;</div><div class='ctx'> 	cam-&gt;nmodes = ARRAY_SIZE(sif_mode);</div><div class='del'>-	sd-&gt;brightness = PAC207_BRIGHTNESS_DEFAULT;</div><div class='del'>-	sd-&gt;exposure = PAC207_EXPOSURE_DEFAULT;</div><div class='del'>-	sd-&gt;gain = PAC207_GAIN_DEFAULT;</div><div class='del'>-	sd-&gt;autogain = AUTOGAIN_DEF;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -264,6 +193,87 @@ static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> 				 * Bit_2=Compression test mode enable */</div><div class='ctx'> 	pac207_write_reg(gspca_dev, 0x0f, 0x00); /* Power Control */</div><div class='ctx'> </div><div class='add'>+	return gspca_dev-&gt;usb_err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void setcontrol(struct gspca_dev *gspca_dev, u16 reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	pac207_write_reg(gspca_dev, reg, val);</div><div class='add'>+	pac207_write_reg(gspca_dev, 0x13, 0x01);	/* Bit 0, auto clear */</div><div class='add'>+	pac207_write_reg(gspca_dev, 0x1c, 0x01);	/* not documented */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sd_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct gspca_dev *gspca_dev =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct gspca_dev, ctrl_handler);</div><div class='add'>+	struct sd *sd = (struct sd *)gspca_dev;</div><div class='add'>+</div><div class='add'>+	gspca_dev-&gt;usb_err = 0;</div><div class='add'>+</div><div class='add'>+	if (ctrl-&gt;id == V4L2_CID_AUTOGAIN &amp;&amp; ctrl-&gt;is_new &amp;&amp; ctrl-&gt;val) {</div><div class='add'>+		/* when switching to autogain set defaults to make sure</div><div class='add'>+		   we are on a valid point of the autogain gain /</div><div class='add'>+		   exposure knee graph, and give this change time to</div><div class='add'>+		   take effect before doing autogain. */</div><div class='add'>+		gspca_dev-&gt;exposure-&gt;val    = PAC207_EXPOSURE_DEFAULT;</div><div class='add'>+		gspca_dev-&gt;gain-&gt;val        = PAC207_GAIN_DEFAULT;</div><div class='add'>+		sd-&gt;autogain_ignore_frames  = PAC_AUTOGAIN_IGNORE_FRAMES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!gspca_dev-&gt;streaming)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_BRIGHTNESS:</div><div class='add'>+		setcontrol(gspca_dev, PAC207_BRIGHTNESS_REG, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_AUTOGAIN:</div><div class='add'>+		if (gspca_dev-&gt;exposure-&gt;is_new || (ctrl-&gt;is_new &amp;&amp; ctrl-&gt;val))</div><div class='add'>+			setcontrol(gspca_dev, PAC207_EXPOSURE_REG,</div><div class='add'>+				   gspca_dev-&gt;exposure-&gt;val);</div><div class='add'>+		if (gspca_dev-&gt;gain-&gt;is_new || (ctrl-&gt;is_new &amp;&amp; ctrl-&gt;val))</div><div class='add'>+			setcontrol(gspca_dev, PAC207_GAIN_REG,</div><div class='add'>+				   gspca_dev-&gt;gain-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return gspca_dev-&gt;usb_err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops sd_ctrl_ops = {</div><div class='add'>+	.s_ctrl = sd_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* this function is called at probe time */</div><div class='add'>+static int sd_init_controls(struct gspca_dev *gspca_dev)</div><div class='add'>+{</div><div class='add'>+	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	struct v4l2_ctrl_handler *hdl = &amp;gspca_dev-&gt;ctrl_handler;</div><div class='add'>+</div><div class='add'>+	gspca_dev-&gt;vdev.ctrl_handler = hdl;</div><div class='add'>+	v4l2_ctrl_handler_init(hdl, 4);</div><div class='add'>+</div><div class='add'>+	sd-&gt;brightness = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+				V4L2_CID_BRIGHTNESS,</div><div class='add'>+				PAC207_BRIGHTNESS_MIN, PAC207_BRIGHTNESS_MAX,</div><div class='add'>+				1, PAC207_BRIGHTNESS_DEFAULT);</div><div class='add'>+	gspca_dev-&gt;autogain = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+				V4L2_CID_AUTOGAIN, 0, 1, 1, 1);</div><div class='add'>+	gspca_dev-&gt;exposure = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+				V4L2_CID_EXPOSURE,</div><div class='add'>+				PAC207_EXPOSURE_MIN, PAC207_EXPOSURE_MAX,</div><div class='add'>+				1, PAC207_EXPOSURE_DEFAULT);</div><div class='add'>+	gspca_dev-&gt;gain = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+				V4L2_CID_GAIN,</div><div class='add'>+				PAC207_GAIN_MIN, PAC207_GAIN_MAX,</div><div class='add'>+				1, PAC207_GAIN_DEFAULT);</div><div class='add'>+	if (hdl-&gt;error) {</div><div class='add'>+		pr_err("Could not initialize controls\n");</div><div class='add'>+		return hdl-&gt;error;</div><div class='add'>+	}</div><div class='add'>+	v4l2_ctrl_auto_cluster(3, &amp;gspca_dev-&gt;autogain, 0, false);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -285,11 +295,13 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	else</div><div class='ctx'> 		pac207_write_reg(gspca_dev, 0x4a, 0x30);</div><div class='ctx'> 	pac207_write_reg(gspca_dev, 0x4b, 0x00); /* Sram test value */</div><div class='del'>-	pac207_write_reg(gspca_dev, 0x08, sd-&gt;brightness);</div><div class='add'>+	pac207_write_reg(gspca_dev, 0x08, v4l2_ctrl_g_ctrl(sd-&gt;brightness));</div><div class='ctx'> </div><div class='ctx'> 	/* PGA global gain (Bit 4-0) */</div><div class='del'>-	pac207_write_reg(gspca_dev, 0x0e, sd-&gt;gain);</div><div class='del'>-	pac207_write_reg(gspca_dev, 0x02, sd-&gt;exposure); /* PXCK = 12MHz /n */</div><div class='add'>+	pac207_write_reg(gspca_dev, 0x0e,</div><div class='add'>+		v4l2_ctrl_g_ctrl(gspca_dev-&gt;gain));</div><div class='add'>+	pac207_write_reg(gspca_dev, 0x02,</div><div class='add'>+		v4l2_ctrl_g_ctrl(gspca_dev-&gt;exposure)); /* PXCK = 12MHz /n */</div><div class='ctx'> </div><div class='ctx'> 	mode = 0x02; /* Image Format (Bit 0), LED (1), Compr. test mode (2) */</div><div class='ctx'> 	if (gspca_dev-&gt;width == 176) {	/* 176x144 */</div><div class='hunk'>@@ -308,7 +320,7 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	sd-&gt;sof_read = 0;</div><div class='ctx'> 	sd-&gt;autogain_ignore_frames = 0;</div><div class='ctx'> 	atomic_set(&amp;sd-&gt;avg_lum, -1);</div><div class='del'>-	return 0;</div><div class='add'>+	return gspca_dev-&gt;usb_err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sd_stopN(struct gspca_dev *gspca_dev)</div><div class='hunk'>@@ -318,8 +330,6 @@ static void sd_stopN(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	pac207_write_reg(gspca_dev, 0x0f, 0x00); /* Power Control */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Include pac common sof detection functions */</div><div class='del'>-#include "pac_common.h"</div><div class='ctx'> </div><div class='ctx'> static void pac207_do_auto_gain(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -331,9 +341,8 @@ static void pac207_do_auto_gain(struct gspca_dev *gspca_dev)</div><div class='ctx'> </div><div class='ctx'> 	if (sd-&gt;autogain_ignore_frames &gt; 0)</div><div class='ctx'> 		sd-&gt;autogain_ignore_frames--;</div><div class='del'>-	else if (gspca_auto_gain_n_exposure(gspca_dev, avg_lum,</div><div class='del'>-			90, PAC207_AUTOGAIN_DEADZONE,</div><div class='del'>-			PAC207_GAIN_KNEE, PAC207_EXPOSURE_KNEE))</div><div class='add'>+	else if (gspca_coarse_grained_expo_autogain(gspca_dev, avg_lum,</div><div class='add'>+			90, PAC207_AUTOGAIN_DEADZONE))</div><div class='ctx'> 		sd-&gt;autogain_ignore_frames = PAC_AUTOGAIN_IGNORE_FRAMES;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -384,118 +393,6 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setbrightness(struct gspca_dev *gspca_dev)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	pac207_write_reg(gspca_dev, 0x08, sd-&gt;brightness);</div><div class='del'>-	pac207_write_reg(gspca_dev, 0x13, 0x01);	/* Bit 0, auto clear */</div><div class='del'>-	pac207_write_reg(gspca_dev, 0x1c, 0x01);	/* not documented */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void setexposure(struct gspca_dev *gspca_dev)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	pac207_write_reg(gspca_dev, 0x02, sd-&gt;exposure);</div><div class='del'>-	pac207_write_reg(gspca_dev, 0x13, 0x01);	/* Bit 0, auto clear */</div><div class='del'>-	pac207_write_reg(gspca_dev, 0x1c, 0x01);	/* not documented */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void setgain(struct gspca_dev *gspca_dev)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	pac207_write_reg(gspca_dev, 0x0e, sd-&gt;gain);</div><div class='del'>-	pac207_write_reg(gspca_dev, 0x13, 0x01);	/* Bit 0, auto clear */</div><div class='del'>-	pac207_write_reg(gspca_dev, 0x1c, 0x01);	/* not documented */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	sd-&gt;brightness = val;</div><div class='del'>-	if (gspca_dev-&gt;streaming)</div><div class='del'>-		setbrightness(gspca_dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	*val = sd-&gt;brightness;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	sd-&gt;exposure = val;</div><div class='del'>-	if (gspca_dev-&gt;streaming)</div><div class='del'>-		setexposure(gspca_dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	*val = sd-&gt;exposure;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	sd-&gt;gain = val;</div><div class='del'>-	if (gspca_dev-&gt;streaming)</div><div class='del'>-		setgain(gspca_dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	*val = sd-&gt;gain;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	sd-&gt;autogain = val;</div><div class='del'>-	/* when switching to autogain set defaults to make sure</div><div class='del'>-	   we are on a valid point of the autogain gain /</div><div class='del'>-	   exposure knee graph, and give this change time to</div><div class='del'>-	   take effect before doing autogain. */</div><div class='del'>-	if (sd-&gt;autogain) {</div><div class='del'>-		sd-&gt;exposure = PAC207_EXPOSURE_DEFAULT;</div><div class='del'>-		sd-&gt;gain = PAC207_GAIN_DEFAULT;</div><div class='del'>-		if (gspca_dev-&gt;streaming) {</div><div class='del'>-			sd-&gt;autogain_ignore_frames =</div><div class='del'>-				PAC_AUTOGAIN_IGNORE_FRAMES;</div><div class='del'>-			setexposure(gspca_dev);</div><div class='del'>-			setgain(gspca_dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	*val = sd-&gt;autogain;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)</div><div class='ctx'> static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> 			u8 *data,		/* interrupt packet data */</div><div class='hunk'>@@ -518,10 +415,9 @@ static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> /* sub-driver description */</div><div class='ctx'> static const struct sd_desc sd_desc = {</div><div class='ctx'> 	.name = MODULE_NAME,</div><div class='del'>-	.ctrls = sd_ctrls,</div><div class='del'>-	.nctrls = ARRAY_SIZE(sd_ctrls),</div><div class='ctx'> 	.config = sd_config,</div><div class='ctx'> 	.init = sd_init,</div><div class='add'>+	.init_controls = sd_init_controls,</div><div class='ctx'> 	.start = sd_start,</div><div class='ctx'> 	.stopN = sd_stopN,</div><div class='ctx'> 	.dq_callback = pac207_do_auto_gain,</div><div class='head'>diff --git a/drivers/media/video/gspca/pac7302.c b/drivers/media/video/gspca/pac7302.c<br/>index 30662fccb0cf..a0369a58c4bb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/pac7302.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/pac7302.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/pac7302.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/pac7302.c</a></div><div class='hunk'>@@ -23,43 +23,58 @@</div><div class='ctx'>  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/* Some documentation about various registers as determined by trial and error.</div><div class='del'>-</div><div class='del'>-   Register page 1:</div><div class='del'>-</div><div class='del'>-   Address	Description</div><div class='del'>-   0x78		Global control, bit 6 controls the LED (inverted)</div><div class='del'>-</div><div class='del'>-   Register page 3:</div><div class='del'>-</div><div class='del'>-   Address	Description</div><div class='del'>-   0x02		Clock divider 3-63, fps = 90 / val. Must be a multiple of 3 on</div><div class='del'>-		the 7302, so one of 3, 6, 9, ..., except when between 6 and 12?</div><div class='del'>-   0x03		Variable framerate ctrl reg2==3: 0 -&gt; ~30 fps, 255 -&gt; ~22fps</div><div class='del'>-   0x04		Another var framerate ctrl reg2==3, reg3==0: 0 -&gt; ~30 fps,</div><div class='del'>-		63 -&gt; ~27 fps, the 2 msb's must always be 1 !!</div><div class='del'>-   0x05		Another var framerate ctrl reg2==3, reg3==0, reg4==0xc0:</div><div class='del'>-		1 -&gt; ~30 fps, 2 -&gt; ~20 fps</div><div class='del'>-   0x0e		Exposure bits 0-7, 0-448, 0 = use full frame time</div><div class='del'>-   0x0f		Exposure bit 8, 0-448, 448 = no exposure at all</div><div class='del'>-   0x10		Master gain 0-31</div><div class='del'>-   0x21		Bitfield: 0-1 unused, 2-3 vflip/hflip, 4-5 unknown, 6-7 unused</div><div class='del'>-</div><div class='del'>-   The registers are accessed in the following functions:</div><div class='del'>-</div><div class='del'>-   Page | Register   | Function</div><div class='del'>-   -----+------------+---------------------------------------------------</div><div class='del'>-    0   | 0x0f..0x20 | setcolors()</div><div class='del'>-    0   | 0xa2..0xab | setbrightcont()</div><div class='del'>-    0   | 0xc5       | setredbalance()</div><div class='del'>-    0   | 0xc6       | setwhitebalance()</div><div class='del'>-    0   | 0xc7       | setbluebalance()</div><div class='del'>-    0   | 0xdc       | setbrightcont(), setcolors()</div><div class='del'>-    3   | 0x02       | setexposure()</div><div class='del'>-    3   | 0x10       | setgain()</div><div class='del'>-    3   | 0x11       | setcolors(), setgain(), setexposure(), sethvflip()</div><div class='del'>-    3   | 0x21       | sethvflip()</div><div class='del'>-*/</div><div class='add'>+/*</div><div class='add'>+ * Some documentation about various registers as determined by trial and error.</div><div class='add'>+ *</div><div class='add'>+ * Register page 1:</div><div class='add'>+ *</div><div class='add'>+ * Address	Description</div><div class='add'>+ * 0x78		Global control, bit 6 controls the LED (inverted)</div><div class='add'>+ * 0x80		Compression balance, 2 interesting settings:</div><div class='add'>+ *		0x0f Default</div><div class='add'>+ *		0x50 Values &gt;= this switch the camera to a lower compression,</div><div class='add'>+ *		     using the same table for both luminance and chrominance.</div><div class='add'>+ *		     This gives a sharper picture. Only usable when running</div><div class='add'>+ *		     at &lt; 15 fps! Note currently the driver does not use this</div><div class='add'>+ *		     as the quality gain is small and the generated JPG-s are</div><div class='add'>+ *		     only understood by v4l-utils &gt;= 0.8.9</div><div class='add'>+ *</div><div class='add'>+ * Register page 3:</div><div class='add'>+ *</div><div class='add'>+ * Address	Description</div><div class='add'>+ * 0x02		Clock divider 3-63, fps = 90 / val. Must be a multiple of 3 on</div><div class='add'>+ *		the 7302, so one of 3, 6, 9, ..., except when between 6 and 12?</div><div class='add'>+ * 0x03		Variable framerate ctrl reg2==3: 0 -&gt; ~30 fps, 255 -&gt; ~22fps</div><div class='add'>+ * 0x04		Another var framerate ctrl reg2==3, reg3==0: 0 -&gt; ~30 fps,</div><div class='add'>+ *		63 -&gt; ~27 fps, the 2 msb's must always be 1 !!</div><div class='add'>+ * 0x05		Another var framerate ctrl reg2==3, reg3==0, reg4==0xc0:</div><div class='add'>+ *		1 -&gt; ~30 fps, 2 -&gt; ~20 fps</div><div class='add'>+ * 0x0e		Exposure bits 0-7, 0-448, 0 = use full frame time</div><div class='add'>+ * 0x0f		Exposure bit 8, 0-448, 448 = no exposure at all</div><div class='add'>+ * 0x10		Gain 0-31</div><div class='add'>+ * 0x12		Another gain 0-31, unlike 0x10 this one seems to start with an</div><div class='add'>+ *		amplification value of 1 rather then 0 at its lowest setting</div><div class='add'>+ * 0x21		Bitfield: 0-1 unused, 2-3 vflip/hflip, 4-5 unknown, 6-7 unused</div><div class='add'>+ * 0x80		Another framerate control, best left at 1, moving it from 1 to</div><div class='add'>+ *		2 causes the framerate to become 3/4th of what it was, and</div><div class='add'>+ *		also seems to cause pixel averaging, resulting in an effective</div><div class='add'>+ *		resolution of 320x240 and thus a much blockier image</div><div class='add'>+ *</div><div class='add'>+ * The registers are accessed in the following functions:</div><div class='add'>+ *</div><div class='add'>+ * Page | Register   | Function</div><div class='add'>+ * -----+------------+---------------------------------------------------</div><div class='add'>+ *  0   | 0x0f..0x20 | setcolors()</div><div class='add'>+ *  0   | 0xa2..0xab | setbrightcont()</div><div class='add'>+ *  0   | 0xc5       | setredbalance()</div><div class='add'>+ *  0   | 0xc6       | setwhitebalance()</div><div class='add'>+ *  0   | 0xc7       | setbluebalance()</div><div class='add'>+ *  0   | 0xdc       | setbrightcont(), setcolors()</div><div class='add'>+ *  3   | 0x02       | setexposure()</div><div class='add'>+ *  3   | 0x10, 0x12 | setgain()</div><div class='add'>+ *  3   | 0x11       | setcolors(), setgain(), setexposure(), sethvflip()</div><div class='add'>+ *  3   | 0x21       | sethvflip()</div><div class='add'>+ */</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='hunk'>@@ -89,7 +104,6 @@ enum e_ctrl {</div><div class='ctx'> 	NCTRLS		/* number of controls */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* specific webcam descriptor for pac7302 */</div><div class='ctx'> struct sd {</div><div class='ctx'> 	struct gspca_dev gspca_dev;		/* !! must be the first item */</div><div class='ctx'> </div><div class='hunk'>@@ -198,10 +212,10 @@ static const struct ctrl sd_ctrls[] = {</div><div class='ctx'> 		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='ctx'> 		.name    = "Gain",</div><div class='ctx'> 		.minimum = 0,</div><div class='del'>-		.maximum = 255,</div><div class='add'>+		.maximum = 62,</div><div class='ctx'> 		.step    = 1,</div><div class='del'>-#define GAIN_DEF 127</div><div class='del'>-#define GAIN_KNEE 255 /* Gain seems to cause little noise on the pac73xx */</div><div class='add'>+#define GAIN_DEF 15</div><div class='add'>+#define GAIN_KNEE 46</div><div class='ctx'> 		.default_value = GAIN_DEF,</div><div class='ctx'> 	    },</div><div class='ctx'> 	    .set_control = setgain</div><div class='hunk'>@@ -270,7 +284,6 @@ static const struct v4l2_pix_format vga_mode[] = {</div><div class='ctx'> #define LOAD_PAGE3		255</div><div class='ctx'> #define END_OF_SEQUENCE		0</div><div class='ctx'> </div><div class='del'>-/* pac 7302 */</div><div class='ctx'> static const u8 init_7302[] = {</div><div class='ctx'> /*	index,value */</div><div class='ctx'> 	0xff, 0x01,		/* page 1 */</div><div class='hunk'>@@ -509,7 +522,6 @@ static int sd_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* This function is used by pac7302 only */</div><div class='ctx'> static void setbrightcont(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='hunk'>@@ -536,7 +548,6 @@ static void setbrightcont(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	reg_w(gspca_dev, 0xdc, 0x01);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* This function is used by pac7302 only */</div><div class='ctx'> static void setcolors(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='hunk'>@@ -590,9 +601,19 @@ static void setbluebalance(struct gspca_dev *gspca_dev)</div><div class='ctx'> static void setgain(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	u8 reg10, reg12;</div><div class='add'>+</div><div class='add'>+	if (sd-&gt;ctrls[GAIN].val &lt; 32) {</div><div class='add'>+		reg10 = sd-&gt;ctrls[GAIN].val;</div><div class='add'>+		reg12 = 0;</div><div class='add'>+	} else {</div><div class='add'>+		reg10 = 31;</div><div class='add'>+		reg12 = sd-&gt;ctrls[GAIN].val - 31;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	reg_w(gspca_dev, 0xff, 0x03);			/* page 3 */</div><div class='del'>-	reg_w(gspca_dev, 0x10, sd-&gt;ctrls[GAIN].val &gt;&gt; 3);</div><div class='add'>+	reg_w(gspca_dev, 0x10, reg10);</div><div class='add'>+	reg_w(gspca_dev, 0x12, reg12);</div><div class='ctx'> </div><div class='ctx'> 	/* load registers to sensor (Bit 0, auto clear) */</div><div class='ctx'> 	reg_w(gspca_dev, 0x11, 0x01);</div><div class='hunk'>@@ -604,28 +625,36 @@ static void setexposure(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	u8 clockdiv;</div><div class='ctx'> 	u16 exposure;</div><div class='ctx'> </div><div class='del'>-	/* register 2 of frame 3 contains the clock divider configuring the</div><div class='del'>-	   no fps according to the formula: 90 / reg. sd-&gt;exposure is the</div><div class='del'>-	   desired exposure time in 0.5 ms. */</div><div class='add'>+	/*</div><div class='add'>+	 * Register 2 of frame 3 contains the clock divider configuring the</div><div class='add'>+	 * no fps according to the formula: 90 / reg. sd-&gt;exposure is the</div><div class='add'>+	 * desired exposure time in 0.5 ms.</div><div class='add'>+	 */</div><div class='ctx'> 	clockdiv = (90 * sd-&gt;ctrls[EXPOSURE].val + 1999) / 2000;</div><div class='ctx'> </div><div class='del'>-	/* Note clockdiv = 3 also works, but when running at 30 fps, depending</div><div class='del'>-	   on the scene being recorded, the camera switches to another</div><div class='del'>-	   quantization table for certain JPEG blocks, and we don't know how</div><div class='del'>-	   to decompress these blocks. So we cap the framerate at 15 fps */</div><div class='add'>+	/*</div><div class='add'>+	 * Note clockdiv = 3 also works, but when running at 30 fps, depending</div><div class='add'>+	 * on the scene being recorded, the camera switches to another</div><div class='add'>+	 * quantization table for certain JPEG blocks, and we don't know how</div><div class='add'>+	 * to decompress these blocks. So we cap the framerate at 15 fps.</div><div class='add'>+	 */</div><div class='ctx'> 	if (clockdiv &lt; 6)</div><div class='ctx'> 		clockdiv = 6;</div><div class='ctx'> 	else if (clockdiv &gt; 63)</div><div class='ctx'> 		clockdiv = 63;</div><div class='ctx'> </div><div class='del'>-	/* reg2 MUST be a multiple of 3, except when between 6 and 12?</div><div class='del'>-	   Always round up, otherwise we cannot get the desired frametime</div><div class='del'>-	   using the partial frame time exposure control */</div><div class='add'>+	/*</div><div class='add'>+	 * Register 2 MUST be a multiple of 3, except when between 6 and 12?</div><div class='add'>+	 * Always round up, otherwise we cannot get the desired frametime</div><div class='add'>+	 * using the partial frame time exposure control.</div><div class='add'>+	 */</div><div class='ctx'> 	if (clockdiv &lt; 6 || clockdiv &gt; 12)</div><div class='ctx'> 		clockdiv = ((clockdiv + 2) / 3) * 3;</div><div class='ctx'> </div><div class='del'>-	/* frame exposure time in ms = 1000 * clockdiv / 90    -&gt;</div><div class='del'>-	exposure = (sd-&gt;exposure / 2) * 448 / (1000 * clockdiv / 90) */</div><div class='add'>+	/*</div><div class='add'>+	 * frame exposure time in ms = 1000 * clockdiv / 90    -&gt;</div><div class='add'>+	 * exposure = (sd-&gt;exposure / 2) * 448 / (1000 * clockdiv / 90)</div><div class='add'>+	 */</div><div class='ctx'> 	exposure = (sd-&gt;ctrls[EXPOSURE].val * 45 * 448) / (1000 * clockdiv);</div><div class='ctx'> 	/* 0 = use full frametime, 448 = no exposure, reverse it */</div><div class='ctx'> 	exposure = 448 - exposure;</div><div class='hunk'>@@ -643,10 +672,12 @@ static void setautogain(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> </div><div class='del'>-	/* when switching to autogain set defaults to make sure</div><div class='del'>-	   we are on a valid point of the autogain gain /</div><div class='del'>-	   exposure knee graph, and give this change time to</div><div class='del'>-	   take effect before doing autogain. */</div><div class='add'>+	/*</div><div class='add'>+	 * When switching to autogain set defaults to make sure</div><div class='add'>+	 * we are on a valid point of the autogain gain /</div><div class='add'>+	 * exposure knee graph, and give this change time to</div><div class='add'>+	 * take effect before doing autogain.</div><div class='add'>+	 */</div><div class='ctx'> 	if (sd-&gt;ctrls[AUTOGAIN].val) {</div><div class='ctx'> 		sd-&gt;ctrls[EXPOSURE].val = EXPOSURE_DEF;</div><div class='ctx'> 		sd-&gt;ctrls[GAIN].val = GAIN_DEF;</div><div class='hunk'>@@ -700,8 +731,6 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	setautogain(gspca_dev);</div><div class='ctx'> 	sethvflip(gspca_dev);</div><div class='ctx'> </div><div class='del'>-	/* only resolution 640x480 is supported for pac7302 */</div><div class='del'>-</div><div class='ctx'> 	sd-&gt;sof_read = 0;</div><div class='ctx'> 	atomic_set(&amp;sd-&gt;avg_lum, 270 + sd-&gt;ctrls[BRIGHTNESS].val);</div><div class='ctx'> </div><div class='hunk'>@@ -729,9 +758,7 @@ static void sd_stop0(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	reg_w(gspca_dev, 0x78, 0x40);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* !! coarse_grained_expo_autogain is not used !! */</div><div class='del'>-#define exp_too_low_cnt flags</div><div class='del'>-#define exp_too_high_cnt sof_read</div><div class='add'>+#define WANT_REGULAR_AUTOGAIN</div><div class='ctx'> #include "autogain_functions.h"</div><div class='ctx'> </div><div class='ctx'> static void do_autogain(struct gspca_dev *gspca_dev)</div><div class='hunk'>@@ -792,10 +819,12 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	if (sof) {</div><div class='ctx'> 		int n, lum_offset, footer_length;</div><div class='ctx'> </div><div class='del'>-		/* 6 bytes after the FF D9 EOF marker a number of lumination</div><div class='del'>-		   bytes are send corresponding to different parts of the</div><div class='del'>-		   image, the 14th and 15th byte after the EOF seem to</div><div class='del'>-		   correspond to the center of the image */</div><div class='add'>+		/*</div><div class='add'>+		 * 6 bytes after the FF D9 EOF marker a number of lumination</div><div class='add'>+		 * bytes are send corresponding to different parts of the</div><div class='add'>+		 * image, the 14th and 15th byte after the EOF seem to</div><div class='add'>+		 * correspond to the center of the image.</div><div class='add'>+		 */</div><div class='ctx'> 		lum_offset = 61 + sizeof pac_sof_marker;</div><div class='ctx'> 		footer_length = 74;</div><div class='ctx'> </div><div class='hunk'>@@ -839,9 +868,10 @@ static int sd_dbg_s_register(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	u8 index;</div><div class='ctx'> 	u8 value;</div><div class='ctx'> </div><div class='del'>-	/* reg-&gt;reg: bit0..15: reserved for register index (wIndex is 16bit</div><div class='del'>-			       long on the USB bus)</div><div class='del'>-	*/</div><div class='add'>+	/*</div><div class='add'>+	 * reg-&gt;reg: bit0..15: reserved for register index (wIndex is 16bit</div><div class='add'>+	 *		       long on the USB bus)</div><div class='add'>+	 */</div><div class='ctx'> 	if (reg-&gt;match.type == V4L2_CHIP_MATCH_HOST &amp;&amp;</div><div class='ctx'> 	    reg-&gt;match.addr == 0 &amp;&amp;</div><div class='ctx'> 	    (reg-&gt;reg &lt; 0x000000ff) &amp;&amp;</div><div class='hunk'>@@ -852,9 +882,11 @@ static int sd_dbg_s_register(struct gspca_dev *gspca_dev,</div><div class='ctx'> 		index = reg-&gt;reg;</div><div class='ctx'> 		value = reg-&gt;val;</div><div class='ctx'> </div><div class='del'>-		/* Note that there shall be no access to other page</div><div class='del'>-		   by any other function between the page swith and</div><div class='del'>-		   the actual register write */</div><div class='add'>+		/*</div><div class='add'>+		 * Note that there shall be no access to other page</div><div class='add'>+		 * by any other function between the page switch and</div><div class='add'>+		 * the actual register write.</div><div class='add'>+		 */</div><div class='ctx'> 		reg_w(gspca_dev, 0xff, 0x00);		/* page 0 */</div><div class='ctx'> 		reg_w(gspca_dev, index, value);</div><div class='ctx'> </div><div class='hunk'>@@ -940,6 +972,7 @@ static const struct usb_device_id device_table[] = {</div><div class='ctx'> 	{USB_DEVICE(0x093a, 0x2624), .driver_info = FL_VFLIP},</div><div class='ctx'> 	{USB_DEVICE(0x093a, 0x2625)},</div><div class='ctx'> 	{USB_DEVICE(0x093a, 0x2626)},</div><div class='add'>+	{USB_DEVICE(0x093a, 0x2627), .driver_info = FL_VFLIP},</div><div class='ctx'> 	{USB_DEVICE(0x093a, 0x2628)},</div><div class='ctx'> 	{USB_DEVICE(0x093a, 0x2629), .driver_info = FL_VFLIP},</div><div class='ctx'> 	{USB_DEVICE(0x093a, 0x262a)},</div><div class='head'>diff --git a/drivers/media/video/gspca/pac7311.c b/drivers/media/video/gspca/pac7311.c<br/>index 1ac111176ffa..2cb7d95f7be7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/pac7311.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/pac7311.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/pac7311.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/pac7311.c</a></div><div class='hunk'>@@ -20,34 +20,42 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* Some documentation about various registers as determined by trial and error.</div><div class='del'>-   When the register addresses differ between the 7202 and the 7311 the 2</div><div class='del'>-   different addresses are written as 7302addr/7311addr, when one of the 2</div><div class='del'>-   addresses is a - sign that register description is not valid for the</div><div class='del'>-   matching IC.</div><div class='del'>-</div><div class='del'>-   Register page 1:</div><div class='del'>-</div><div class='del'>-   Address	Description</div><div class='del'>-   -/0x08	Unknown compressor related, must always be 8 except when not</div><div class='del'>-		in 640x480 resolution and page 4 reg 2 &lt;= 3 then set it to 9 !</div><div class='del'>-   -/0x1b	Auto white balance related, bit 0 is AWB enable (inverted)</div><div class='del'>-		bits 345 seem to toggle per color gains on/off (inverted)</div><div class='del'>-   0x78		Global control, bit 6 controls the LED (inverted)</div><div class='del'>-   -/0x80	JPEG compression ratio ? Best not touched</div><div class='del'>-</div><div class='del'>-   Register page 3/4:</div><div class='del'>-</div><div class='del'>-   Address	Description</div><div class='del'>-   0x02		Clock divider 2-63, fps =~ 60 / val. Must be a multiple of 3 on</div><div class='del'>-		the 7302, so one of 3, 6, 9, ..., except when between 6 and 12?</div><div class='del'>-   -/0x0f	Master gain 1-245, low value = high gain</div><div class='del'>-   0x10/-	Master gain 0-31</div><div class='del'>-   -/0x10	Another gain 0-15, limited influence (1-2x gain I guess)</div><div class='del'>-   0x21		Bitfield: 0-1 unused, 2-3 vflip/hflip, 4-5 unknown, 6-7 unused</div><div class='del'>-   -/0x27	Seems to toggle various gains on / off, Setting bit 7 seems to</div><div class='del'>-		completely disable the analog amplification block. Set to 0x68</div><div class='del'>-		for max gain, 0x14 for minimal gain.</div><div class='del'>-*/</div><div class='add'>+ *</div><div class='add'>+ * Register page 1:</div><div class='add'>+ *</div><div class='add'>+ * Address	Description</div><div class='add'>+ * 0x08		Unknown compressor related, must always be 8 except when not</div><div class='add'>+ *		in 640x480 resolution and page 4 reg 2 &lt;= 3 then set it to 9 !</div><div class='add'>+ * 0x1b		Auto white balance related, bit 0 is AWB enable (inverted)</div><div class='add'>+ *		bits 345 seem to toggle per color gains on/off (inverted)</div><div class='add'>+ * 0x78		Global control, bit 6 controls the LED (inverted)</div><div class='add'>+ * 0x80		Compression balance, interesting settings:</div><div class='add'>+ *		0x01 Use this to allow the camera to switch to higher compr.</div><div class='add'>+ *		     on the fly. Needed to stay within bandwidth @ 640x480@30</div><div class='add'>+ *		0x1c From usb captures under Windows for 640x480</div><div class='add'>+ *		0x2a Values &gt;= this switch the camera to a lower compression,</div><div class='add'>+ *		     using the same table for both luminance and chrominance.</div><div class='add'>+ *		     This gives a sharper picture. Usable only at 640x480@ &lt;</div><div class='add'>+ *		     15 fps or 320x240 / 160x120. Note currently the driver</div><div class='add'>+ *		     does not use this as the quality gain is small and the</div><div class='add'>+ *		     generated JPG-s are only understood by v4l-utils &gt;= 0.8.9</div><div class='add'>+ *		0x3f From usb captures under Windows for 320x240</div><div class='add'>+ *		0x69 From usb captures under Windows for 160x120</div><div class='add'>+ *</div><div class='add'>+ * Register page 4:</div><div class='add'>+ *</div><div class='add'>+ * Address	Description</div><div class='add'>+ * 0x02		Clock divider 2-63, fps =~ 60 / val. Must be a multiple of 3 on</div><div class='add'>+ *		the 7302, so one of 3, 6, 9, ..., except when between 6 and 12?</div><div class='add'>+ * 0x0f		Master gain 1-245, low value = high gain</div><div class='add'>+ * 0x10		Another gain 0-15, limited influence (1-2x gain I guess)</div><div class='add'>+ * 0x21		Bitfield: 0-1 unused, 2-3 vflip/hflip, 4-5 unknown, 6-7 unused</div><div class='add'>+ *		Note setting vflip disabled leads to a much lower image quality,</div><div class='add'>+ *		so we always vflip, and tell userspace to flip it back</div><div class='add'>+ * 0x27		Seems to toggle various gains on / off, Setting bit 7 seems to</div><div class='add'>+ *		completely disable the analog amplification block. Set to 0x68</div><div class='add'>+ *		for max gain, 0x14 for minimal gain.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='hunk'>@@ -55,21 +63,21 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/input.h&gt;</div><div class='ctx'> #include "gspca.h"</div><div class='add'>+/* Include pac common sof detection functions */</div><div class='add'>+#include "pac_common.h"</div><div class='add'>+</div><div class='add'>+#define PAC7311_GAIN_DEFAULT     122</div><div class='add'>+#define PAC7311_EXPOSURE_DEFAULT   3 /* 20 fps, avoid using high compr. */</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Thomas Kaiser thomas@kaiser-linux.li");</div><div class='ctx'> MODULE_DESCRIPTION("Pixart PAC7311");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='del'>-/* specific webcam descriptor for pac7311 */</div><div class='ctx'> struct sd {</div><div class='ctx'> 	struct gspca_dev gspca_dev;		/* !! must be the first item */</div><div class='ctx'> </div><div class='del'>-	unsigned char contrast;</div><div class='del'>-	unsigned char gain;</div><div class='del'>-	unsigned char exposure;</div><div class='del'>-	unsigned char autogain;</div><div class='del'>-	__u8 hflip;</div><div class='del'>-	__u8 vflip;</div><div class='add'>+	struct v4l2_ctrl *contrast;</div><div class='add'>+	struct v4l2_ctrl *hflip;</div><div class='ctx'> </div><div class='ctx'> 	u8 sof_read;</div><div class='ctx'> 	u8 autogain_ignore_frames;</div><div class='hunk'>@@ -77,114 +85,6 @@ struct sd {</div><div class='ctx'> 	atomic_t avg_lum;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* V4L2 controls supported by the driver */</div><div class='del'>-static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='del'>-static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='del'>-static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='del'>-static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='del'>-static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='del'>-static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='del'>-</div><div class='del'>-static const struct ctrl sd_ctrls[] = {</div><div class='del'>-/* This control is for both the 7302 and the 7311 */</div><div class='del'>-	{</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_CONTRAST,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Contrast",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-#define CONTRAST_MAX 255</div><div class='del'>-		.maximum = CONTRAST_MAX,</div><div class='del'>-		.step    = 1,</div><div class='del'>-#define CONTRAST_DEF 127</div><div class='del'>-		.default_value = CONTRAST_DEF,</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setcontrast,</div><div class='del'>-	    .get = sd_getcontrast,</div><div class='del'>-	},</div><div class='del'>-/* All controls below are for both the 7302 and the 7311 */</div><div class='del'>-	{</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_GAIN,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Gain",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-#define GAIN_MAX 255</div><div class='del'>-		.maximum = GAIN_MAX,</div><div class='del'>-		.step    = 1,</div><div class='del'>-#define GAIN_DEF 127</div><div class='del'>-#define GAIN_KNEE 255 /* Gain seems to cause little noise on the pac73xx */</div><div class='del'>-		.default_value = GAIN_DEF,</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setgain,</div><div class='del'>-	    .get = sd_getgain,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_EXPOSURE,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Exposure",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-#define EXPOSURE_MAX 255</div><div class='del'>-		.maximum = EXPOSURE_MAX,</div><div class='del'>-		.step    = 1,</div><div class='del'>-#define EXPOSURE_DEF  16 /*  32 ms / 30 fps */</div><div class='del'>-#define EXPOSURE_KNEE 50 /* 100 ms / 10 fps */</div><div class='del'>-		.default_value = EXPOSURE_DEF,</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setexposure,</div><div class='del'>-	    .get = sd_getexposure,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_AUTOGAIN,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-		.name    = "Auto Gain",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 1,</div><div class='del'>-		.step    = 1,</div><div class='del'>-#define AUTOGAIN_DEF 1</div><div class='del'>-		.default_value = AUTOGAIN_DEF,</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setautogain,</div><div class='del'>-	    .get = sd_getautogain,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_HFLIP,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-		.name    = "Mirror",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 1,</div><div class='del'>-		.step    = 1,</div><div class='del'>-#define HFLIP_DEF 0</div><div class='del'>-		.default_value = HFLIP_DEF,</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_sethflip,</div><div class='del'>-	    .get = sd_gethflip,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_VFLIP,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-		.name    = "Vflip",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 1,</div><div class='del'>-		.step    = 1,</div><div class='del'>-#define VFLIP_DEF 0</div><div class='del'>-		.default_value = VFLIP_DEF,</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setvflip,</div><div class='del'>-	    .get = sd_getvflip,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct v4l2_pix_format vga_mode[] = {</div><div class='ctx'> 	{160, 120, V4L2_PIX_FMT_PJPG, V4L2_FIELD_NONE,</div><div class='ctx'> 		.bytesperline = 160,</div><div class='hunk'>@@ -206,8 +106,8 @@ static const struct v4l2_pix_format vga_mode[] = {</div><div class='ctx'> #define LOAD_PAGE4		254</div><div class='ctx'> #define END_OF_SEQUENCE		0</div><div class='ctx'> </div><div class='del'>-/* pac 7311 */</div><div class='ctx'> static const __u8 init_7311[] = {</div><div class='add'>+	0xff, 0x01,</div><div class='ctx'> 	0x78, 0x40,	/* Bit_0=start stream, Bit_6=LED */</div><div class='ctx'> 	0x78, 0x40,	/* Bit_0=start stream, Bit_6=LED */</div><div class='ctx'> 	0x78, 0x44,	/* Bit_0=start stream, Bit_6=LED */</div><div class='hunk'>@@ -387,90 +287,73 @@ static void reg_w_var(struct gspca_dev *gspca_dev,</div><div class='ctx'> static int sd_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> 			const struct usb_device_id *id)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	struct cam *cam;</div><div class='add'>+	struct cam *cam = &amp;gspca_dev-&gt;cam;</div><div class='ctx'> </div><div class='del'>-	cam = &amp;gspca_dev-&gt;cam;</div><div class='del'>-</div><div class='del'>-	PDEBUG(D_CONF, "Find Sensor PAC7311");</div><div class='ctx'> 	cam-&gt;cam_mode = vga_mode;</div><div class='ctx'> 	cam-&gt;nmodes = ARRAY_SIZE(vga_mode);</div><div class='add'>+	cam-&gt;input_flags = V4L2_IN_ST_VFLIP;</div><div class='ctx'> </div><div class='del'>-	sd-&gt;contrast = CONTRAST_DEF;</div><div class='del'>-	sd-&gt;gain = GAIN_DEF;</div><div class='del'>-	sd-&gt;exposure = EXPOSURE_DEF;</div><div class='del'>-	sd-&gt;autogain = AUTOGAIN_DEF;</div><div class='del'>-	sd-&gt;hflip = HFLIP_DEF;</div><div class='del'>-	sd-&gt;vflip = VFLIP_DEF;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* This function is used by pac7311 only */</div><div class='del'>-static void setcontrast(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setcontrast(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='ctx'> 	reg_w(gspca_dev, 0xff, 0x04);</div><div class='del'>-	reg_w(gspca_dev, 0x10, sd-&gt;contrast &gt;&gt; 4);</div><div class='add'>+	reg_w(gspca_dev, 0x10, val);</div><div class='ctx'> 	/* load registers to sensor (Bit 0, auto clear) */</div><div class='ctx'> 	reg_w(gspca_dev, 0x11, 0x01);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setgain(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setgain(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	int gain = GAIN_MAX - sd-&gt;gain;</div><div class='del'>-</div><div class='del'>-	if (gain &lt; 1)</div><div class='del'>-		gain = 1;</div><div class='del'>-	else if (gain &gt; 245)</div><div class='del'>-		gain = 245;</div><div class='ctx'> 	reg_w(gspca_dev, 0xff, 0x04);			/* page 4 */</div><div class='ctx'> 	reg_w(gspca_dev, 0x0e, 0x00);</div><div class='del'>-	reg_w(gspca_dev, 0x0f, gain);</div><div class='add'>+	reg_w(gspca_dev, 0x0f, gspca_dev-&gt;gain-&gt;maximum - val + 1);</div><div class='ctx'> </div><div class='ctx'> 	/* load registers to sensor (Bit 0, auto clear) */</div><div class='ctx'> 	reg_w(gspca_dev, 0x11, 0x01);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setexposure(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setexposure(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	__u8 reg;</div><div class='del'>-</div><div class='del'>-	/* register 2 of frame 3/4 contains the clock divider configuring the</div><div class='del'>-	   no fps according to the formula: 60 / reg. sd-&gt;exposure is the</div><div class='del'>-	   desired exposure time in ms. */</div><div class='del'>-	reg = 120 * sd-&gt;exposure / 1000;</div><div class='del'>-	if (reg &lt; 2)</div><div class='del'>-		reg = 2;</div><div class='del'>-	else if (reg &gt; 63)</div><div class='del'>-		reg = 63;</div><div class='del'>-</div><div class='ctx'> 	reg_w(gspca_dev, 0xff, 0x04);			/* page 4 */</div><div class='del'>-	reg_w(gspca_dev, 0x02, reg);</div><div class='add'>+	reg_w(gspca_dev, 0x02, val);</div><div class='ctx'> </div><div class='del'>-	/* Page 1 register 8 must always be 0x08 except when not in</div><div class='del'>-	   640x480 mode and Page3/4 reg 2 &lt;= 3 then it must be 9 */</div><div class='add'>+	/* load registers to sensor (Bit 0, auto clear) */</div><div class='add'>+	reg_w(gspca_dev, 0x11, 0x01);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Page 1 register 8 must always be 0x08 except when not in</div><div class='add'>+	 *  640x480 mode and page 4 reg 2 &lt;= 3 then it must be 9</div><div class='add'>+	 */</div><div class='ctx'> 	reg_w(gspca_dev, 0xff, 0x01);</div><div class='del'>-	if (gspca_dev-&gt;cam.cam_mode[(int)gspca_dev-&gt;curr_mode].priv &amp;&amp;</div><div class='del'>-			reg &lt;= 3) {</div><div class='add'>+	if (gspca_dev-&gt;width != 640 &amp;&amp; val &lt;= 3)</div><div class='ctx'> 		reg_w(gspca_dev, 0x08, 0x09);</div><div class='del'>-	} else {</div><div class='add'>+	else</div><div class='ctx'> 		reg_w(gspca_dev, 0x08, 0x08);</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Page1 register 80 sets the compression balance, normally we</div><div class='add'>+	 * want / use 0x1c, but for 640x480@30fps we must allow the</div><div class='add'>+	 * camera to use higher compression or we may run out of</div><div class='add'>+	 * bandwidth.</div><div class='add'>+	 */</div><div class='add'>+	if (gspca_dev-&gt;width == 640 &amp;&amp; val == 2)</div><div class='add'>+		reg_w(gspca_dev, 0x80, 0x01);</div><div class='add'>+	else</div><div class='add'>+		reg_w(gspca_dev, 0x80, 0x1c);</div><div class='ctx'> </div><div class='ctx'> 	/* load registers to sensor (Bit 0, auto clear) */</div><div class='ctx'> 	reg_w(gspca_dev, 0x11, 0x01);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sethvflip(struct gspca_dev *gspca_dev)</div><div class='add'>+static void sethvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> 	__u8 data;</div><div class='ctx'> </div><div class='ctx'> 	reg_w(gspca_dev, 0xff, 0x04);			/* page 4 */</div><div class='del'>-	data = (sd-&gt;hflip ? 0x04 : 0x00) | (sd-&gt;vflip ? 0x08 : 0x00);</div><div class='add'>+	data = (hflip ? 0x04 : 0x00) |</div><div class='add'>+	       (vflip ? 0x08 : 0x00);</div><div class='ctx'> 	reg_w(gspca_dev, 0x21, data);</div><div class='ctx'> </div><div class='ctx'> 	/* load registers to sensor (Bit 0, auto clear) */</div><div class='hunk'>@@ -484,6 +367,82 @@ static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	return gspca_dev-&gt;usb_err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int sd_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct gspca_dev *gspca_dev =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct gspca_dev, ctrl_handler);</div><div class='add'>+	struct sd *sd = (struct sd *)gspca_dev;</div><div class='add'>+</div><div class='add'>+	gspca_dev-&gt;usb_err = 0;</div><div class='add'>+</div><div class='add'>+	if (ctrl-&gt;id == V4L2_CID_AUTOGAIN &amp;&amp; ctrl-&gt;is_new &amp;&amp; ctrl-&gt;val) {</div><div class='add'>+		/* when switching to autogain set defaults to make sure</div><div class='add'>+		   we are on a valid point of the autogain gain /</div><div class='add'>+		   exposure knee graph, and give this change time to</div><div class='add'>+		   take effect before doing autogain. */</div><div class='add'>+		gspca_dev-&gt;exposure-&gt;val    = PAC7311_EXPOSURE_DEFAULT;</div><div class='add'>+		gspca_dev-&gt;gain-&gt;val        = PAC7311_GAIN_DEFAULT;</div><div class='add'>+		sd-&gt;autogain_ignore_frames  = PAC_AUTOGAIN_IGNORE_FRAMES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!gspca_dev-&gt;streaming)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_CONTRAST:</div><div class='add'>+		setcontrast(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_AUTOGAIN:</div><div class='add'>+		if (gspca_dev-&gt;exposure-&gt;is_new || (ctrl-&gt;is_new &amp;&amp; ctrl-&gt;val))</div><div class='add'>+			setexposure(gspca_dev, gspca_dev-&gt;exposure-&gt;val);</div><div class='add'>+		if (gspca_dev-&gt;gain-&gt;is_new || (ctrl-&gt;is_new &amp;&amp; ctrl-&gt;val))</div><div class='add'>+			setgain(gspca_dev, gspca_dev-&gt;gain-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_HFLIP:</div><div class='add'>+		sethvflip(gspca_dev, sd-&gt;hflip-&gt;val, 1);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return gspca_dev-&gt;usb_err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops sd_ctrl_ops = {</div><div class='add'>+	.s_ctrl = sd_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* this function is called at probe time */</div><div class='add'>+static int sd_init_controls(struct gspca_dev *gspca_dev)</div><div class='add'>+{</div><div class='add'>+	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	struct v4l2_ctrl_handler *hdl = &amp;gspca_dev-&gt;ctrl_handler;</div><div class='add'>+</div><div class='add'>+	gspca_dev-&gt;vdev.ctrl_handler = hdl;</div><div class='add'>+	v4l2_ctrl_handler_init(hdl, 4);</div><div class='add'>+</div><div class='add'>+	sd-&gt;contrast = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+					V4L2_CID_CONTRAST, 0, 15, 1, 7);</div><div class='add'>+	gspca_dev-&gt;autogain = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+					V4L2_CID_AUTOGAIN, 0, 1, 1, 1);</div><div class='add'>+	gspca_dev-&gt;exposure = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+					V4L2_CID_EXPOSURE, 2, 63, 1,</div><div class='add'>+					PAC7311_EXPOSURE_DEFAULT);</div><div class='add'>+	gspca_dev-&gt;gain = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+					V4L2_CID_GAIN, 0, 244, 1,</div><div class='add'>+					PAC7311_GAIN_DEFAULT);</div><div class='add'>+	sd-&gt;hflip = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+		V4L2_CID_HFLIP, 0, 1, 1, 0);</div><div class='add'>+</div><div class='add'>+	if (hdl-&gt;error) {</div><div class='add'>+		pr_err("Could not initialize controls\n");</div><div class='add'>+		return hdl-&gt;error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_auto_cluster(3, &amp;gspca_dev-&gt;autogain, 0, false);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* -- start the camera -- */</div><div class='ctx'> static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='hunk'>@@ -492,19 +451,19 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> </div><div class='ctx'> 	reg_w_var(gspca_dev, start_7311,</div><div class='ctx'> 		page4_7311, sizeof(page4_7311));</div><div class='del'>-	setcontrast(gspca_dev);</div><div class='del'>-	setgain(gspca_dev);</div><div class='del'>-	setexposure(gspca_dev);</div><div class='del'>-	sethvflip(gspca_dev);</div><div class='add'>+	setcontrast(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;contrast));</div><div class='add'>+	setgain(gspca_dev, v4l2_ctrl_g_ctrl(gspca_dev-&gt;gain));</div><div class='add'>+	setexposure(gspca_dev, v4l2_ctrl_g_ctrl(gspca_dev-&gt;exposure));</div><div class='add'>+	sethvflip(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;hflip), 1);</div><div class='ctx'> </div><div class='ctx'> 	/* set correct resolution */</div><div class='ctx'> 	switch (gspca_dev-&gt;cam.cam_mode[(int) gspca_dev-&gt;curr_mode].priv) {</div><div class='del'>-	case 2:					/* 160x120 pac7311 */</div><div class='add'>+	case 2:					/* 160x120 */</div><div class='ctx'> 		reg_w(gspca_dev, 0xff, 0x01);</div><div class='ctx'> 		reg_w(gspca_dev, 0x17, 0x20);</div><div class='ctx'> 		reg_w(gspca_dev, 0x87, 0x10);</div><div class='ctx'> 		break;</div><div class='del'>-	case 1:					/* 320x240 pac7311 */</div><div class='add'>+	case 1:					/* 320x240 */</div><div class='ctx'> 		reg_w(gspca_dev, 0xff, 0x01);</div><div class='ctx'> 		reg_w(gspca_dev, 0x17, 0x30);</div><div class='ctx'> 		reg_w(gspca_dev, 0x87, 0x11);</div><div class='hunk'>@@ -541,14 +500,6 @@ static void sd_stopN(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	reg_w(gspca_dev, 0x78, 0x44); /* Bit_0=start stream, Bit_6=LED */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* called on streamoff with alt 0 and on disconnect for 7311 */</div><div class='del'>-static void sd_stop0(struct gspca_dev *gspca_dev)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Include pac common sof detection functions */</div><div class='del'>-#include "pac_common.h"</div><div class='del'>-</div><div class='ctx'> static void do_autogain(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='hunk'>@@ -558,13 +509,13 @@ static void do_autogain(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	if (avg_lum == -1)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	desired_lum = 200;</div><div class='add'>+	desired_lum = 170;</div><div class='ctx'> 	deadzone = 20;</div><div class='ctx'> </div><div class='ctx'> 	if (sd-&gt;autogain_ignore_frames &gt; 0)</div><div class='ctx'> 		sd-&gt;autogain_ignore_frames--;</div><div class='del'>-	else if (gspca_auto_gain_n_exposure(gspca_dev, avg_lum, desired_lum,</div><div class='del'>-			deadzone, GAIN_KNEE, EXPOSURE_KNEE))</div><div class='add'>+	else if (gspca_coarse_grained_expo_autogain(gspca_dev, avg_lum,</div><div class='add'>+						    desired_lum, deadzone))</div><div class='ctx'> 		sd-&gt;autogain_ignore_frames = PAC_AUTOGAIN_IGNORE_FRAMES;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -628,10 +579,12 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	if (sof) {</div><div class='ctx'> 		int n, lum_offset, footer_length;</div><div class='ctx'> </div><div class='del'>-		/* 6 bytes after the FF D9 EOF marker a number of lumination</div><div class='del'>-		   bytes are send corresponding to different parts of the</div><div class='del'>-		   image, the 14th and 15th byte after the EOF seem to</div><div class='del'>-		   correspond to the center of the image */</div><div class='add'>+		/*</div><div class='add'>+		 * 6 bytes after the FF D9 EOF marker a number of lumination</div><div class='add'>+		 * bytes are send corresponding to different parts of the</div><div class='add'>+		 * image, the 14th and 15th byte after the EOF seem to</div><div class='add'>+		 * correspond to the center of the image.</div><div class='add'>+		 */</div><div class='ctx'> 		lum_offset = 24 + sizeof pac_sof_marker;</div><div class='ctx'> 		footer_length = 26;</div><div class='ctx'> </div><div class='hunk'>@@ -668,127 +621,6 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	sd-&gt;contrast = val;</div><div class='del'>-	if (gspca_dev-&gt;streaming)</div><div class='del'>-		setcontrast(gspca_dev);</div><div class='del'>-	return gspca_dev-&gt;usb_err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	*val = sd-&gt;contrast;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	sd-&gt;gain = val;</div><div class='del'>-	if (gspca_dev-&gt;streaming)</div><div class='del'>-		setgain(gspca_dev);</div><div class='del'>-	return gspca_dev-&gt;usb_err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	*val = sd-&gt;gain;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	sd-&gt;exposure = val;</div><div class='del'>-	if (gspca_dev-&gt;streaming)</div><div class='del'>-		setexposure(gspca_dev);</div><div class='del'>-	return gspca_dev-&gt;usb_err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	*val = sd-&gt;exposure;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	sd-&gt;autogain = val;</div><div class='del'>-	/* when switching to autogain set defaults to make sure</div><div class='del'>-	   we are on a valid point of the autogain gain /</div><div class='del'>-	   exposure knee graph, and give this change time to</div><div class='del'>-	   take effect before doing autogain. */</div><div class='del'>-	if (sd-&gt;autogain) {</div><div class='del'>-		sd-&gt;exposure = EXPOSURE_DEF;</div><div class='del'>-		sd-&gt;gain = GAIN_DEF;</div><div class='del'>-		if (gspca_dev-&gt;streaming) {</div><div class='del'>-			sd-&gt;autogain_ignore_frames =</div><div class='del'>-				PAC_AUTOGAIN_IGNORE_FRAMES;</div><div class='del'>-			setexposure(gspca_dev);</div><div class='del'>-			setgain(gspca_dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return gspca_dev-&gt;usb_err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	*val = sd-&gt;autogain;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	sd-&gt;hflip = val;</div><div class='del'>-	if (gspca_dev-&gt;streaming)</div><div class='del'>-		sethvflip(gspca_dev);</div><div class='del'>-	return gspca_dev-&gt;usb_err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	*val = sd-&gt;hflip;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	sd-&gt;vflip = val;</div><div class='del'>-	if (gspca_dev-&gt;streaming)</div><div class='del'>-		sethvflip(gspca_dev);</div><div class='del'>-	return gspca_dev-&gt;usb_err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	*val = sd-&gt;vflip;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)</div><div class='ctx'> static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> 			u8 *data,		/* interrupt packet data */</div><div class='hunk'>@@ -820,16 +652,13 @@ static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/* sub-driver description for pac7311 */</div><div class='ctx'> static const struct sd_desc sd_desc = {</div><div class='ctx'> 	.name = MODULE_NAME,</div><div class='del'>-	.ctrls = sd_ctrls,</div><div class='del'>-	.nctrls = ARRAY_SIZE(sd_ctrls),</div><div class='ctx'> 	.config = sd_config,</div><div class='ctx'> 	.init = sd_init,</div><div class='add'>+	.init_controls = sd_init_controls,</div><div class='ctx'> 	.start = sd_start,</div><div class='ctx'> 	.stopN = sd_stopN,</div><div class='del'>-	.stop0 = sd_stop0,</div><div class='ctx'> 	.pkt_scan = sd_pkt_scan,</div><div class='ctx'> 	.dq_callback = do_autogain,</div><div class='ctx'> #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)</div><div class='head'>diff --git a/drivers/media/video/gspca/sn9c20x.c b/drivers/media/video/gspca/sn9c20x.c<br/>index 7e71aa2d2522..ad098202d7f0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/sn9c20x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/sn9c20x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/sn9c20x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/sn9c20x.c</a></div><div class='hunk'>@@ -59,35 +59,38 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> #define SENSOR_MT9M111	9</div><div class='ctx'> #define SENSOR_MT9M112  10</div><div class='ctx'> #define SENSOR_HV7131R	11</div><div class='del'>-#define SENSOR_MT9VPRB	20</div><div class='add'>+#define SENSOR_MT9VPRB	12</div><div class='ctx'> </div><div class='ctx'> /* camera flags */</div><div class='ctx'> #define HAS_NO_BUTTON	0x1</div><div class='ctx'> #define LED_REVERSE	0x2 /* some cameras unset gpio to turn on leds */</div><div class='ctx'> #define FLIP_DETECT	0x4</div><div class='ctx'> </div><div class='del'>-enum e_ctrl {</div><div class='del'>-	BRIGHTNESS,</div><div class='del'>-	CONTRAST,</div><div class='del'>-	SATURATION,</div><div class='del'>-	HUE,</div><div class='del'>-	GAMMA,</div><div class='del'>-	BLUE,</div><div class='del'>-	RED,</div><div class='del'>-	VFLIP,</div><div class='del'>-	HFLIP,</div><div class='del'>-	EXPOSURE,</div><div class='del'>-	GAIN,</div><div class='del'>-	AUTOGAIN,</div><div class='del'>-	QUALITY,</div><div class='del'>-	NCTRLS		/* number of controls */</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* specific webcam descriptor */</div><div class='ctx'> struct sd {</div><div class='ctx'> 	struct gspca_dev gspca_dev;</div><div class='ctx'> </div><div class='del'>-	struct gspca_ctrl ctrls[NCTRLS];</div><div class='add'>+	struct { /* color control cluster */</div><div class='add'>+		struct v4l2_ctrl *brightness;</div><div class='add'>+		struct v4l2_ctrl *contrast;</div><div class='add'>+		struct v4l2_ctrl *saturation;</div><div class='add'>+		struct v4l2_ctrl *hue;</div><div class='add'>+	};</div><div class='add'>+	struct { /* blue/red balance control cluster */</div><div class='add'>+		struct v4l2_ctrl *blue;</div><div class='add'>+		struct v4l2_ctrl *red;</div><div class='add'>+	};</div><div class='add'>+	struct { /* h/vflip control cluster */</div><div class='add'>+		struct v4l2_ctrl *hflip;</div><div class='add'>+		struct v4l2_ctrl *vflip;</div><div class='add'>+	};</div><div class='add'>+	struct v4l2_ctrl *gamma;</div><div class='add'>+	struct { /* autogain and exposure or gain control cluster */</div><div class='add'>+		struct v4l2_ctrl *autogain;</div><div class='add'>+		struct v4l2_ctrl *exposure;</div><div class='add'>+		struct v4l2_ctrl *gain;</div><div class='add'>+	};</div><div class='add'>+	struct v4l2_ctrl *jpegqual;</div><div class='ctx'> </div><div class='ctx'> 	struct work_struct work;</div><div class='ctx'> 	struct workqueue_struct *work_thread;</div><div class='hunk'>@@ -105,6 +108,7 @@ struct sd {</div><div class='ctx'> 	u8 exposure_step;</div><div class='ctx'> </div><div class='ctx'> 	u8 i2c_addr;</div><div class='add'>+	u8 i2c_intf;</div><div class='ctx'> 	u8 sensor;</div><div class='ctx'> 	u8 hstart;</div><div class='ctx'> 	u8 vstart;</div><div class='hunk'>@@ -166,175 +170,6 @@ static const struct dmi_system_id flip_dmi_table[] = {</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void set_cmatrix(struct gspca_dev *gspca_dev);</div><div class='del'>-static void set_gamma(struct gspca_dev *gspca_dev);</div><div class='del'>-static void set_redblue(struct gspca_dev *gspca_dev);</div><div class='del'>-static void set_hvflip(struct gspca_dev *gspca_dev);</div><div class='del'>-static void set_exposure(struct gspca_dev *gspca_dev);</div><div class='del'>-static void set_gain(struct gspca_dev *gspca_dev);</div><div class='del'>-static void set_quality(struct gspca_dev *gspca_dev);</div><div class='del'>-</div><div class='del'>-static const struct ctrl sd_ctrls[NCTRLS] = {</div><div class='del'>-[BRIGHTNESS] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_BRIGHTNESS,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Brightness",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 0xff,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 0x7f</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = set_cmatrix</div><div class='del'>-	},</div><div class='del'>-[CONTRAST] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_CONTRAST,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Contrast",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 0xff,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 0x7f</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = set_cmatrix</div><div class='del'>-	},</div><div class='del'>-[SATURATION] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_SATURATION,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Saturation",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 0xff,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 0x7f</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = set_cmatrix</div><div class='del'>-	},</div><div class='del'>-[HUE] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_HUE,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Hue",</div><div class='del'>-		.minimum = -180,</div><div class='del'>-		.maximum = 180,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 0</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = set_cmatrix</div><div class='del'>-	},</div><div class='del'>-[GAMMA] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_GAMMA,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Gamma",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 0xff,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 0x10</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = set_gamma</div><div class='del'>-	},</div><div class='del'>-[BLUE] = {</div><div class='del'>-	    {</div><div class='del'>-		.id	 = V4L2_CID_BLUE_BALANCE,</div><div class='del'>-		.type	 = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name	 = "Blue Balance",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 0x7f,</div><div class='del'>-		.step	 = 1,</div><div class='del'>-		.default_value = 0x28</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = set_redblue</div><div class='del'>-	},</div><div class='del'>-[RED] = {</div><div class='del'>-	    {</div><div class='del'>-		.id	 = V4L2_CID_RED_BALANCE,</div><div class='del'>-		.type	 = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name	 = "Red Balance",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 0x7f,</div><div class='del'>-		.step	 = 1,</div><div class='del'>-		.default_value = 0x28</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = set_redblue</div><div class='del'>-	},</div><div class='del'>-[HFLIP] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_HFLIP,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-		.name    = "Horizontal Flip",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 1,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 0,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = set_hvflip</div><div class='del'>-	},</div><div class='del'>-[VFLIP] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_VFLIP,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-		.name    = "Vertical Flip",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 1,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 0,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = set_hvflip</div><div class='del'>-	},</div><div class='del'>-[EXPOSURE] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_EXPOSURE,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Exposure",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 0x1780,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 0x33,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = set_exposure</div><div class='del'>-	},</div><div class='del'>-[GAIN] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_GAIN,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Gain",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 28,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 0,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = set_gain</div><div class='del'>-	},</div><div class='del'>-[AUTOGAIN] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_AUTOGAIN,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-		.name    = "Auto Exposure",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 1,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 1,</div><div class='del'>-	    },</div><div class='del'>-	},</div><div class='del'>-[QUALITY] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_JPEG_COMPRESSION_QUALITY,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Compression Quality",</div><div class='del'>-#define QUALITY_MIN 50</div><div class='del'>-#define QUALITY_MAX 90</div><div class='del'>-#define QUALITY_DEF 80</div><div class='del'>-		.minimum = QUALITY_MIN,</div><div class='del'>-		.maximum = QUALITY_MAX,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = QUALITY_DEF,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = set_quality</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct v4l2_pix_format vga_mode[] = {</div><div class='ctx'> 	{160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,</div><div class='ctx'> 		.bytesperline = 160,</div><div class='hunk'>@@ -747,7 +582,7 @@ static const s16 hsv_blue_y[] = {</div><div class='ctx'> 	4,   2,   0,  -1,  -3,  -5,  -7,  -9, -11</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static u16 i2c_ident[] = {</div><div class='add'>+static const u16 i2c_ident[] = {</div><div class='ctx'> 	V4L2_IDENT_OV9650,</div><div class='ctx'> 	V4L2_IDENT_OV9655,</div><div class='ctx'> 	V4L2_IDENT_SOI968,</div><div class='hunk'>@@ -760,9 +595,10 @@ static u16 i2c_ident[] = {</div><div class='ctx'> 	V4L2_IDENT_MT9M111,</div><div class='ctx'> 	V4L2_IDENT_MT9M112,</div><div class='ctx'> 	V4L2_IDENT_HV7131R,</div><div class='add'>+[SENSOR_MT9VPRB] = V4L2_IDENT_UNKNOWN,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static u16 bridge_init[][2] = {</div><div class='add'>+static const u16 bridge_init[][2] = {</div><div class='ctx'> 	{0x1000, 0x78}, {0x1001, 0x40}, {0x1002, 0x1c},</div><div class='ctx'> 	{0x1020, 0x80}, {0x1061, 0x01}, {0x1067, 0x40},</div><div class='ctx'> 	{0x1068, 0x30}, {0x1069, 0x20},	{0x106a, 0x10},</div><div class='hunk'>@@ -786,7 +622,7 @@ static u16 bridge_init[][2] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Gain = (bit[3:0] / 16 + 1) * (bit[4] + 1) * (bit[5] + 1) * (bit[6] + 1) */</div><div class='del'>-static u8 ov_gain[] = {</div><div class='add'>+static const u8 ov_gain[] = {</div><div class='ctx'> 	0x00 /* 1x */, 0x04 /* 1.25x */, 0x08 /* 1.5x */, 0x0c /* 1.75x */,</div><div class='ctx'> 	0x10 /* 2x */, 0x12 /* 2.25x */, 0x14 /* 2.5x */, 0x16 /* 2.75x */,</div><div class='ctx'> 	0x18 /* 3x */, 0x1a /* 3.25x */, 0x1c /* 3.5x */, 0x1e /* 3.75x */,</div><div class='hunk'>@@ -798,7 +634,7 @@ static u8 ov_gain[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Gain = (bit[8] + 1) * (bit[7] + 1) * (bit[6:0] * 0.03125) */</div><div class='del'>-static u16 micron1_gain[] = {</div><div class='add'>+static const u16 micron1_gain[] = {</div><div class='ctx'> 	/* 1x   1.25x   1.5x    1.75x */</div><div class='ctx'> 	0x0020, 0x0028, 0x0030, 0x0038,</div><div class='ctx'> 	/* 2x   2.25x   2.5x    2.75x */</div><div class='hunk'>@@ -819,7 +655,7 @@ static u16 micron1_gain[] = {</div><div class='ctx'> </div><div class='ctx'> /* mt9m001 sensor uses a different gain formula then other micron sensors */</div><div class='ctx'> /* Gain = (bit[6] + 1) * (bit[5-0] * 0.125) */</div><div class='del'>-static u16 micron2_gain[] = {</div><div class='add'>+static const u16 micron2_gain[] = {</div><div class='ctx'> 	/* 1x   1.25x   1.5x    1.75x */</div><div class='ctx'> 	0x0008, 0x000a, 0x000c, 0x000e,</div><div class='ctx'> 	/* 2x   2.25x   2.5x    2.75x */</div><div class='hunk'>@@ -839,7 +675,7 @@ static u16 micron2_gain[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Gain = .5 + bit[7:0] / 16 */</div><div class='del'>-static u8 hv7131r_gain[] = {</div><div class='add'>+static const u8 hv7131r_gain[] = {</div><div class='ctx'> 	0x08 /* 1x */, 0x0c /* 1.25x */, 0x10 /* 1.5x */, 0x14 /* 1.75x */,</div><div class='ctx'> 	0x18 /* 2x */, 0x1c /* 2.25x */, 0x20 /* 2.5x */, 0x24 /* 2.75x */,</div><div class='ctx'> 	0x28 /* 3x */, 0x2c /* 3.25x */, 0x30 /* 3.5x */, 0x34 /* 3.75x */,</div><div class='hunk'>@@ -850,7 +686,7 @@ static u8 hv7131r_gain[] = {</div><div class='ctx'> 	0x78 /* 8x */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_reg_u8 soi968_init[] = {</div><div class='add'>+static const struct i2c_reg_u8 soi968_init[] = {</div><div class='ctx'> 	{0x0c, 0x00}, {0x0f, 0x1f},</div><div class='ctx'> 	{0x11, 0x80}, {0x38, 0x52}, {0x1e, 0x00},</div><div class='ctx'> 	{0x33, 0x08}, {0x35, 0x8c}, {0x36, 0x0c},</div><div class='hunk'>@@ -864,7 +700,7 @@ static struct i2c_reg_u8 soi968_init[] = {</div><div class='ctx'> 	{0x00, 0x00}, {0x01, 0x80}, {0x02, 0x80},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_reg_u8 ov7660_init[] = {</div><div class='add'>+static const struct i2c_reg_u8 ov7660_init[] = {</div><div class='ctx'> 	{0x0e, 0x80}, {0x0d, 0x08}, {0x0f, 0xc3},</div><div class='ctx'> 	{0x04, 0xc3}, {0x10, 0x40}, {0x11, 0x40},</div><div class='ctx'> 	{0x12, 0x05}, {0x13, 0xba}, {0x14, 0x2a},</div><div class='hunk'>@@ -872,11 +708,11 @@ static struct i2c_reg_u8 ov7660_init[] = {</div><div class='ctx'> 	   0x10, 0x61 and sd-&gt;hstart, vstart = 3, fixes ugly colored borders */</div><div class='ctx'> 	{0x17, 0x10}, {0x18, 0x61},</div><div class='ctx'> 	{0x37, 0x0f}, {0x38, 0x02}, {0x39, 0x43},</div><div class='del'>-	{0x3a, 0x00}, {0x69, 0x90}, {0x2d, 0xf6},</div><div class='del'>-	{0x2e, 0x0b}, {0x01, 0x78}, {0x02, 0x50},</div><div class='add'>+	{0x3a, 0x00}, {0x69, 0x90}, {0x2d, 0x00},</div><div class='add'>+	{0x2e, 0x00}, {0x01, 0x78}, {0x02, 0x50},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_reg_u8 ov7670_init[] = {</div><div class='add'>+static const struct i2c_reg_u8 ov7670_init[] = {</div><div class='ctx'> 	{0x11, 0x80}, {0x3a, 0x04}, {0x12, 0x01},</div><div class='ctx'> 	{0x32, 0xb6}, {0x03, 0x0a}, {0x0c, 0x00}, {0x3e, 0x00},</div><div class='ctx'> 	{0x70, 0x3a}, {0x71, 0x35}, {0x72, 0x11}, {0x73, 0xf0},</div><div class='hunk'>@@ -933,7 +769,7 @@ static struct i2c_reg_u8 ov7670_init[] = {</div><div class='ctx'> 	{0x93, 0x00},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_reg_u8 ov9650_init[] = {</div><div class='add'>+static const struct i2c_reg_u8 ov9650_init[] = {</div><div class='ctx'> 	{0x00, 0x00}, {0x01, 0x78},</div><div class='ctx'> 	{0x02, 0x78}, {0x03, 0x36}, {0x04, 0x03},</div><div class='ctx'> 	{0x05, 0x00}, {0x06, 0x00}, {0x08, 0x00},</div><div class='hunk'>@@ -963,7 +799,7 @@ static struct i2c_reg_u8 ov9650_init[] = {</div><div class='ctx'> 	{0xaa, 0x92}, {0xab, 0x0a},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_reg_u8 ov9655_init[] = {</div><div class='add'>+static const struct i2c_reg_u8 ov9655_init[] = {</div><div class='ctx'> 	{0x0e, 0x61}, {0x11, 0x80}, {0x13, 0xba},</div><div class='ctx'> 	{0x14, 0x2e}, {0x16, 0x24}, {0x1e, 0x04}, {0x27, 0x08},</div><div class='ctx'> 	{0x28, 0x08}, {0x29, 0x15}, {0x2c, 0x08}, {0x34, 0x3d},</div><div class='hunk'>@@ -990,7 +826,7 @@ static struct i2c_reg_u8 ov9655_init[] = {</div><div class='ctx'> 	{0x04, 0x03}, {0x00, 0x13},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_reg_u16 mt9v112_init[] = {</div><div class='add'>+static const struct i2c_reg_u16 mt9v112_init[] = {</div><div class='ctx'> 	{0xf0, 0x0000}, {0x0d, 0x0021}, {0x0d, 0x0020},</div><div class='ctx'> 	{0x34, 0xc019}, {0x0a, 0x0011}, {0x0b, 0x000b},</div><div class='ctx'> 	{0x20, 0x0703}, {0x35, 0x2022}, {0xf0, 0x0001},</div><div class='hunk'>@@ -1009,7 +845,7 @@ static struct i2c_reg_u16 mt9v112_init[] = {</div><div class='ctx'> 	{0x2c, 0x00ae}, {0x2d, 0x00ae}, {0x2e, 0x00ae},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_reg_u16 mt9v111_init[] = {</div><div class='add'>+static const struct i2c_reg_u16 mt9v111_init[] = {</div><div class='ctx'> 	{0x01, 0x0004}, {0x0d, 0x0001}, {0x0d, 0x0000},</div><div class='ctx'> 	{0x01, 0x0001}, {0x05, 0x0004}, {0x2d, 0xe0a0},</div><div class='ctx'> 	{0x2e, 0x0c64},	{0x2f, 0x0064}, {0x06, 0x600e},</div><div class='hunk'>@@ -1019,7 +855,7 @@ static struct i2c_reg_u16 mt9v111_init[] = {</div><div class='ctx'> 	{0x0e, 0x0008}, {0x20, 0x0000}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_reg_u16 mt9v011_init[] = {</div><div class='add'>+static const struct i2c_reg_u16 mt9v011_init[] = {</div><div class='ctx'> 	{0x07, 0x0002},	{0x0d, 0x0001},	{0x0d, 0x0000},</div><div class='ctx'> 	{0x01, 0x0008},	{0x02, 0x0016},	{0x03, 0x01e1},</div><div class='ctx'> 	{0x04, 0x0281},	{0x05, 0x0083},	{0x06, 0x0006},</div><div class='hunk'>@@ -1046,7 +882,7 @@ static struct i2c_reg_u16 mt9v011_init[] = {</div><div class='ctx'> 	{0x06, 0x0029},	{0x05, 0x0009},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_reg_u16 mt9m001_init[] = {</div><div class='add'>+static const struct i2c_reg_u16 mt9m001_init[] = {</div><div class='ctx'> 	{0x0d, 0x0001},</div><div class='ctx'> 	{0x0d, 0x0000},</div><div class='ctx'> 	{0x04, 0x0500},		/* hres = 1280 */</div><div class='hunk'>@@ -1062,21 +898,21 @@ static struct i2c_reg_u16 mt9m001_init[] = {</div><div class='ctx'> 	{0x35, 0x0057},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_reg_u16 mt9m111_init[] = {</div><div class='add'>+static const struct i2c_reg_u16 mt9m111_init[] = {</div><div class='ctx'> 	{0xf0, 0x0000}, {0x0d, 0x0021}, {0x0d, 0x0008},</div><div class='ctx'> 	{0xf0, 0x0001}, {0x3a, 0x4300}, {0x9b, 0x4300},</div><div class='ctx'> 	{0x06, 0x708e}, {0xf0, 0x0002}, {0x2e, 0x0a1e},</div><div class='ctx'> 	{0xf0, 0x0000},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_reg_u16 mt9m112_init[] = {</div><div class='add'>+static const struct i2c_reg_u16 mt9m112_init[] = {</div><div class='ctx'> 	{0xf0, 0x0000}, {0x0d, 0x0021}, {0x0d, 0x0008},</div><div class='ctx'> 	{0xf0, 0x0001}, {0x3a, 0x4300}, {0x9b, 0x4300},</div><div class='ctx'> 	{0x06, 0x708e}, {0xf0, 0x0002}, {0x2e, 0x0a1e},</div><div class='ctx'> 	{0xf0, 0x0000},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct i2c_reg_u8 hv7131r_init[] = {</div><div class='add'>+static const struct i2c_reg_u8 hv7131r_init[] = {</div><div class='ctx'> 	{0x02, 0x08}, {0x02, 0x00}, {0x01, 0x08},</div><div class='ctx'> 	{0x02, 0x00}, {0x20, 0x00}, {0x21, 0xd0},</div><div class='ctx'> 	{0x22, 0x00}, {0x23, 0x09}, {0x01, 0x08},</div><div class='hunk'>@@ -1167,7 +1003,7 @@ static void i2c_w1(struct gspca_dev *gspca_dev, u8 reg, u8 val)</div><div class='ctx'> 	 * from the point of view of the bridge, the length</div><div class='ctx'> 	 * includes the address</div><div class='ctx'> 	 */</div><div class='del'>-	row[0] = 0x81 | (2 &lt;&lt; 4);</div><div class='add'>+	row[0] = sd-&gt;i2c_intf | (2 &lt;&lt; 4);</div><div class='ctx'> 	row[1] = sd-&gt;i2c_addr;</div><div class='ctx'> 	row[2] = reg;</div><div class='ctx'> 	row[3] = val;</div><div class='hunk'>@@ -1180,7 +1016,7 @@ static void i2c_w1(struct gspca_dev *gspca_dev, u8 reg, u8 val)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void i2c_w1_buf(struct gspca_dev *gspca_dev,</div><div class='del'>-			struct i2c_reg_u8 *buf, int sz)</div><div class='add'>+			const struct i2c_reg_u8 *buf, int sz)</div><div class='ctx'> {</div><div class='ctx'> 	while (--sz &gt;= 0) {</div><div class='ctx'> 		i2c_w1(gspca_dev, buf-&gt;reg, buf-&gt;val);</div><div class='hunk'>@@ -1197,7 +1033,7 @@ static void i2c_w2(struct gspca_dev *gspca_dev, u8 reg, u16 val)</div><div class='ctx'> 	 * from the point of view of the bridge, the length</div><div class='ctx'> 	 * includes the address</div><div class='ctx'> 	 */</div><div class='del'>-	row[0] = 0x81 | (3 &lt;&lt; 4);</div><div class='add'>+	row[0] = sd-&gt;i2c_intf | (3 &lt;&lt; 4);</div><div class='ctx'> 	row[1] = sd-&gt;i2c_addr;</div><div class='ctx'> 	row[2] = reg;</div><div class='ctx'> 	row[3] = val &gt;&gt; 8;</div><div class='hunk'>@@ -1210,7 +1046,7 @@ static void i2c_w2(struct gspca_dev *gspca_dev, u8 reg, u16 val)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void i2c_w2_buf(struct gspca_dev *gspca_dev,</div><div class='del'>-			struct i2c_reg_u16 *buf, int sz)</div><div class='add'>+			const struct i2c_reg_u16 *buf, int sz)</div><div class='ctx'> {</div><div class='ctx'> 	while (--sz &gt;= 0) {</div><div class='ctx'> 		i2c_w2(gspca_dev, buf-&gt;reg, buf-&gt;val);</div><div class='hunk'>@@ -1223,7 +1059,7 @@ static void i2c_r1(struct gspca_dev *gspca_dev, u8 reg, u8 *val)</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> 	u8 row[8];</div><div class='ctx'> </div><div class='del'>-	row[0] = 0x81 | (1 &lt;&lt; 4);</div><div class='add'>+	row[0] = sd-&gt;i2c_intf | (1 &lt;&lt; 4);</div><div class='ctx'> 	row[1] = sd-&gt;i2c_addr;</div><div class='ctx'> 	row[2] = reg;</div><div class='ctx'> 	row[3] = 0;</div><div class='hunk'>@@ -1232,7 +1068,7 @@ static void i2c_r1(struct gspca_dev *gspca_dev, u8 reg, u8 *val)</div><div class='ctx'> 	row[6] = 0;</div><div class='ctx'> 	row[7] = 0x10;</div><div class='ctx'> 	i2c_w(gspca_dev, row);</div><div class='del'>-	row[0] = 0x81 | (1 &lt;&lt; 4) | 0x02;</div><div class='add'>+	row[0] = sd-&gt;i2c_intf | (1 &lt;&lt; 4) | 0x02;</div><div class='ctx'> 	row[2] = 0;</div><div class='ctx'> 	i2c_w(gspca_dev, row);</div><div class='ctx'> 	reg_r(gspca_dev, 0x10c2, 5);</div><div class='hunk'>@@ -1244,7 +1080,7 @@ static void i2c_r2(struct gspca_dev *gspca_dev, u8 reg, u16 *val)</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> 	u8 row[8];</div><div class='ctx'> </div><div class='del'>-	row[0] = 0x81 | (1 &lt;&lt; 4);</div><div class='add'>+	row[0] = sd-&gt;i2c_intf | (1 &lt;&lt; 4);</div><div class='ctx'> 	row[1] = sd-&gt;i2c_addr;</div><div class='ctx'> 	row[2] = reg;</div><div class='ctx'> 	row[3] = 0;</div><div class='hunk'>@@ -1253,7 +1089,7 @@ static void i2c_r2(struct gspca_dev *gspca_dev, u8 reg, u16 *val)</div><div class='ctx'> 	row[6] = 0;</div><div class='ctx'> 	row[7] = 0x10;</div><div class='ctx'> 	i2c_w(gspca_dev, row);</div><div class='del'>-	row[0] = 0x81 | (2 &lt;&lt; 4) | 0x02;</div><div class='add'>+	row[0] = sd-&gt;i2c_intf | (2 &lt;&lt; 4) | 0x02;</div><div class='ctx'> 	row[2] = 0;</div><div class='ctx'> 	i2c_w(gspca_dev, row);</div><div class='ctx'> 	reg_r(gspca_dev, 0x10c2, 5);</div><div class='hunk'>@@ -1294,8 +1130,6 @@ static void ov9655_init_sensor(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	if (gspca_dev-&gt;usb_err &lt; 0)</div><div class='ctx'> 		pr_err("OV9655 sensor initialization failed\n");</div><div class='ctx'> </div><div class='del'>-	/* disable hflip and vflip */</div><div class='del'>-	gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; HFLIP) | (1 &lt;&lt; VFLIP);</div><div class='ctx'> 	sd-&gt;hstart = 1;</div><div class='ctx'> 	sd-&gt;vstart = 2;</div><div class='ctx'> }</div><div class='hunk'>@@ -1310,9 +1144,6 @@ static void soi968_init_sensor(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	if (gspca_dev-&gt;usb_err &lt; 0)</div><div class='ctx'> 		pr_err("SOI968 sensor initialization failed\n");</div><div class='ctx'> </div><div class='del'>-	/* disable hflip and vflip */</div><div class='del'>-	gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; HFLIP) | (1 &lt;&lt; VFLIP)</div><div class='del'>-				| (1 &lt;&lt; EXPOSURE);</div><div class='ctx'> 	sd-&gt;hstart = 60;</div><div class='ctx'> 	sd-&gt;vstart = 11;</div><div class='ctx'> }</div><div class='hunk'>@@ -1340,8 +1171,6 @@ static void ov7670_init_sensor(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	if (gspca_dev-&gt;usb_err &lt; 0)</div><div class='ctx'> 		pr_err("OV7670 sensor initialization failed\n");</div><div class='ctx'> </div><div class='del'>-	/* disable hflip and vflip */</div><div class='del'>-	gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; HFLIP) | (1 &lt;&lt; VFLIP);</div><div class='ctx'> 	sd-&gt;hstart = 0;</div><div class='ctx'> 	sd-&gt;vstart = 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -1378,9 +1207,6 @@ static void mt9v_init_sensor(struct gspca_dev *gspca_dev)</div><div class='ctx'> 			pr_err("MT9V111 sensor initialization failed\n");</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='del'>-		gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; EXPOSURE)</div><div class='del'>-					| (1 &lt;&lt; AUTOGAIN)</div><div class='del'>-					| (1 &lt;&lt; GAIN);</div><div class='ctx'> 		sd-&gt;hstart = 2;</div><div class='ctx'> 		sd-&gt;vstart = 2;</div><div class='ctx'> 		sd-&gt;sensor = SENSOR_MT9V111;</div><div class='hunk'>@@ -1422,8 +1248,6 @@ static void mt9m112_init_sensor(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	if (gspca_dev-&gt;usb_err &lt; 0)</div><div class='ctx'> 		pr_err("MT9M112 sensor initialization failed\n");</div><div class='ctx'> </div><div class='del'>-	gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; EXPOSURE) | (1 &lt;&lt; AUTOGAIN)</div><div class='del'>-				| (1 &lt;&lt; GAIN);</div><div class='ctx'> 	sd-&gt;hstart = 0;</div><div class='ctx'> 	sd-&gt;vstart = 2;</div><div class='ctx'> }</div><div class='hunk'>@@ -1436,8 +1260,6 @@ static void mt9m111_init_sensor(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	if (gspca_dev-&gt;usb_err &lt; 0)</div><div class='ctx'> 		pr_err("MT9M111 sensor initialization failed\n");</div><div class='ctx'> </div><div class='del'>-	gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; EXPOSURE) | (1 &lt;&lt; AUTOGAIN)</div><div class='del'>-				| (1 &lt;&lt; GAIN);</div><div class='ctx'> 	sd-&gt;hstart = 0;</div><div class='ctx'> 	sd-&gt;vstart = 2;</div><div class='ctx'> }</div><div class='hunk'>@@ -1470,8 +1292,6 @@ static void mt9m001_init_sensor(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	if (gspca_dev-&gt;usb_err &lt; 0)</div><div class='ctx'> 		pr_err("MT9M001 sensor initialization failed\n");</div><div class='ctx'> </div><div class='del'>-	/* disable hflip and vflip */</div><div class='del'>-	gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; HFLIP) | (1 &lt;&lt; VFLIP);</div><div class='ctx'> 	sd-&gt;hstart = 1;</div><div class='ctx'> 	sd-&gt;vstart = 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -1488,20 +1308,18 @@ static void hv7131r_init_sensor(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	sd-&gt;vstart = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void set_cmatrix(struct gspca_dev *gspca_dev)</div><div class='add'>+static void set_cmatrix(struct gspca_dev *gspca_dev,</div><div class='add'>+		s32 brightness, s32 contrast, s32 satur, s32 hue)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	int satur;</div><div class='del'>-	s32 hue_coord, hue_index = 180 + sd-&gt;ctrls[HUE].val;</div><div class='add'>+	s32 hue_coord, hue_index = 180 + hue;</div><div class='ctx'> 	u8 cmatrix[21];</div><div class='ctx'> </div><div class='ctx'> 	memset(cmatrix, 0, sizeof cmatrix);</div><div class='del'>-	cmatrix[2] = (sd-&gt;ctrls[CONTRAST].val * 0x25 / 0x100) + 0x26;</div><div class='add'>+	cmatrix[2] = (contrast * 0x25 / 0x100) + 0x26;</div><div class='ctx'> 	cmatrix[0] = 0x13 + (cmatrix[2] - 0x26) * 0x13 / 0x25;</div><div class='ctx'> 	cmatrix[4] = 0x07 + (cmatrix[2] - 0x26) * 0x07 / 0x25;</div><div class='del'>-	cmatrix[18] = sd-&gt;ctrls[BRIGHTNESS].val - 0x80;</div><div class='add'>+	cmatrix[18] = brightness - 0x80;</div><div class='ctx'> </div><div class='del'>-	satur = sd-&gt;ctrls[SATURATION].val;</div><div class='ctx'> 	hue_coord = (hsv_red_x[hue_index] * satur) &gt;&gt; 8;</div><div class='ctx'> 	cmatrix[6] = hue_coord;</div><div class='ctx'> 	cmatrix[7] = (hue_coord &gt;&gt; 8) &amp; 0x0f;</div><div class='hunk'>@@ -1529,11 +1347,10 @@ static void set_cmatrix(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	reg_w(gspca_dev, 0x10e1, cmatrix, 21);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void set_gamma(struct gspca_dev *gspca_dev)</div><div class='add'>+static void set_gamma(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> 	u8 gamma[17];</div><div class='del'>-	u8 gval = sd-&gt;ctrls[GAMMA].val * 0xb8 / 0x100;</div><div class='add'>+	u8 gval = val * 0xb8 / 0x100;</div><div class='ctx'> </div><div class='ctx'> 	gamma[0] = 0x0a;</div><div class='ctx'> 	gamma[1] = 0x13 + (gval * (0xcb - 0x13) / 0xb8);</div><div class='hunk'>@@ -1556,26 +1373,21 @@ static void set_gamma(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	reg_w(gspca_dev, 0x1190, gamma, 17);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void set_redblue(struct gspca_dev *gspca_dev)</div><div class='add'>+static void set_redblue(struct gspca_dev *gspca_dev, s32 blue, s32 red)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	reg_w1(gspca_dev, 0x118c, sd-&gt;ctrls[RED].val);</div><div class='del'>-	reg_w1(gspca_dev, 0x118f, sd-&gt;ctrls[BLUE].val);</div><div class='add'>+	reg_w1(gspca_dev, 0x118c, red);</div><div class='add'>+	reg_w1(gspca_dev, 0x118f, blue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void set_hvflip(struct gspca_dev *gspca_dev)</div><div class='add'>+static void set_hvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip)</div><div class='ctx'> {</div><div class='del'>-	u8 value, tslb, hflip, vflip;</div><div class='add'>+	u8 value, tslb;</div><div class='ctx'> 	u16 value2;</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> </div><div class='ctx'> 	if ((sd-&gt;flags &amp; FLIP_DETECT) &amp;&amp; dmi_check_system(flip_dmi_table)) {</div><div class='del'>-		hflip = !sd-&gt;ctrls[HFLIP].val;</div><div class='del'>-		vflip = !sd-&gt;ctrls[VFLIP].val;</div><div class='del'>-	} else {</div><div class='del'>-		hflip = sd-&gt;ctrls[HFLIP].val;</div><div class='del'>-		vflip = sd-&gt;ctrls[VFLIP].val;</div><div class='add'>+		hflip = !hflip;</div><div class='add'>+		vflip = !vflip;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (sd-&gt;sensor) {</div><div class='hunk'>@@ -1638,20 +1450,38 @@ static void set_hvflip(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void set_exposure(struct gspca_dev *gspca_dev)</div><div class='add'>+static void set_exposure(struct gspca_dev *gspca_dev, s32 expo)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	u8 exp[8] = {0x81, sd-&gt;i2c_addr, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e};</div><div class='del'>-	int expo;</div><div class='add'>+	u8 exp[8] = {sd-&gt;i2c_intf, sd-&gt;i2c_addr,</div><div class='add'>+				0x00, 0x00, 0x00, 0x00, 0x00, 0x10};</div><div class='add'>+	int expo2;</div><div class='add'>+</div><div class='add'>+	if (gspca_dev-&gt;streaming)</div><div class='add'>+		exp[7] = 0x1e;</div><div class='ctx'> </div><div class='del'>-	expo = sd-&gt;ctrls[EXPOSURE].val;</div><div class='ctx'> 	switch (sd-&gt;sensor) {</div><div class='ctx'> 	case SENSOR_OV7660:</div><div class='ctx'> 	case SENSOR_OV7670:</div><div class='ctx'> 	case SENSOR_OV9655:</div><div class='ctx'> 	case SENSOR_OV9650:</div><div class='add'>+		if (expo &gt; 547)</div><div class='add'>+			expo2 = 547;</div><div class='add'>+		else</div><div class='add'>+			expo2 = expo;</div><div class='add'>+		exp[0] |= (2 &lt;&lt; 4);</div><div class='add'>+		exp[2] = 0x10;			/* AECH */</div><div class='add'>+		exp[3] = expo2 &gt;&gt; 2;</div><div class='add'>+		exp[7] = 0x10;</div><div class='add'>+		i2c_w(gspca_dev, exp);</div><div class='add'>+		exp[2] = 0x04;			/* COM1 */</div><div class='add'>+		exp[3] = expo2 &amp; 0x0003;</div><div class='add'>+		exp[7] = 0x10;</div><div class='add'>+		i2c_w(gspca_dev, exp);</div><div class='add'>+		expo -= expo2;</div><div class='add'>+		exp[7] = 0x1e;</div><div class='ctx'> 		exp[0] |= (3 &lt;&lt; 4);</div><div class='del'>-		exp[2] = 0x2d;</div><div class='add'>+		exp[2] = 0x2d;			/* ADVFL &amp; ADVFH */</div><div class='ctx'> 		exp[3] = expo;</div><div class='ctx'> 		exp[4] = expo &gt;&gt; 8;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1676,13 +1506,15 @@ static void set_exposure(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	i2c_w(gspca_dev, exp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void set_gain(struct gspca_dev *gspca_dev)</div><div class='add'>+static void set_gain(struct gspca_dev *gspca_dev, s32 g)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	u8 gain[8] = {0x81, sd-&gt;i2c_addr, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1d};</div><div class='del'>-	int g;</div><div class='add'>+	u8 gain[8] = {sd-&gt;i2c_intf, sd-&gt;i2c_addr,</div><div class='add'>+				0x00, 0x00, 0x00, 0x00, 0x00, 0x10};</div><div class='add'>+</div><div class='add'>+	if (gspca_dev-&gt;streaming)</div><div class='add'>+		gain[7] = 0x15;		/* or 1d ? */</div><div class='ctx'> </div><div class='del'>-	g = sd-&gt;ctrls[GAIN].val;</div><div class='ctx'> 	switch (sd-&gt;sensor) {</div><div class='ctx'> 	case SENSOR_OV7660:</div><div class='ctx'> 	case SENSOR_OV7670:</div><div class='hunk'>@@ -1721,11 +1553,11 @@ static void set_gain(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	i2c_w(gspca_dev, gain);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void set_quality(struct gspca_dev *gspca_dev)</div><div class='add'>+static void set_quality(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> </div><div class='del'>-	jpeg_set_qual(sd-&gt;jpeg_hdr, sd-&gt;ctrls[QUALITY].val);</div><div class='add'>+	jpeg_set_qual(sd-&gt;jpeg_hdr, val);</div><div class='ctx'> 	reg_w1(gspca_dev, 0x1061, 0x01);	/* stop transfer */</div><div class='ctx'> 	reg_w1(gspca_dev, 0x10e0, sd-&gt;fmt | 0x20); /* write QTAB */</div><div class='ctx'> 	reg_w(gspca_dev, 0x1100, &amp;sd-&gt;jpeg_hdr[JPEG_QT0_OFFSET], 64);</div><div class='hunk'>@@ -1827,6 +1659,7 @@ static int sd_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	sd-&gt;sensor = id-&gt;driver_info &gt;&gt; 8;</div><div class='ctx'> 	sd-&gt;i2c_addr = id-&gt;driver_info;</div><div class='ctx'> 	sd-&gt;flags = id-&gt;driver_info &gt;&gt; 16;</div><div class='add'>+	sd-&gt;i2c_intf = 0x80;			/* i2c 100 Kb/s */</div><div class='ctx'> </div><div class='ctx'> 	switch (sd-&gt;sensor) {</div><div class='ctx'> 	case SENSOR_MT9M112:</div><div class='hunk'>@@ -1840,6 +1673,9 @@ static int sd_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> 		cam-&gt;cam_mode = mono_mode;</div><div class='ctx'> 		cam-&gt;nmodes = ARRAY_SIZE(mono_mode);</div><div class='ctx'> 		break;</div><div class='add'>+	case SENSOR_HV7131R:</div><div class='add'>+		sd-&gt;i2c_intf = 0x81;			/* i2c 400 Kb/s */</div><div class='add'>+		/* fall thru */</div><div class='ctx'> 	default:</div><div class='ctx'> 		cam-&gt;cam_mode = vga_mode;</div><div class='ctx'> 		cam-&gt;nmodes = ARRAY_SIZE(vga_mode);</div><div class='hunk'>@@ -1850,13 +1686,133 @@ static int sd_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	sd-&gt;older_step = 0;</div><div class='ctx'> 	sd-&gt;exposure_step = 16;</div><div class='ctx'> </div><div class='del'>-	gspca_dev-&gt;cam.ctrls = sd-&gt;ctrls;</div><div class='del'>-</div><div class='ctx'> 	INIT_WORK(&amp;sd-&gt;work, qual_upd);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int sd_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct gspca_dev *gspca_dev =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct gspca_dev, ctrl_handler);</div><div class='add'>+	struct sd *sd = (struct sd *)gspca_dev;</div><div class='add'>+</div><div class='add'>+	gspca_dev-&gt;usb_err = 0;</div><div class='add'>+</div><div class='add'>+	if (!gspca_dev-&gt;streaming)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	/* color control cluster */</div><div class='add'>+	case V4L2_CID_BRIGHTNESS:</div><div class='add'>+		set_cmatrix(gspca_dev, sd-&gt;brightness-&gt;val,</div><div class='add'>+			sd-&gt;contrast-&gt;val, sd-&gt;saturation-&gt;val, sd-&gt;hue-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_GAMMA:</div><div class='add'>+		set_gamma(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	/* blue/red balance cluster */</div><div class='add'>+	case V4L2_CID_BLUE_BALANCE:</div><div class='add'>+		set_redblue(gspca_dev, sd-&gt;blue-&gt;val, sd-&gt;red-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	/* h/vflip cluster */</div><div class='add'>+	case V4L2_CID_HFLIP:</div><div class='add'>+		set_hvflip(gspca_dev, sd-&gt;hflip-&gt;val, sd-&gt;vflip-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	/* standalone exposure control */</div><div class='add'>+	case V4L2_CID_EXPOSURE:</div><div class='add'>+		set_exposure(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	/* standalone gain control */</div><div class='add'>+	case V4L2_CID_GAIN:</div><div class='add'>+		set_gain(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	/* autogain + exposure or gain control cluster */</div><div class='add'>+	case V4L2_CID_AUTOGAIN:</div><div class='add'>+		if (sd-&gt;sensor == SENSOR_SOI968)</div><div class='add'>+			set_gain(gspca_dev, sd-&gt;gain-&gt;val);</div><div class='add'>+		else</div><div class='add'>+			set_exposure(gspca_dev, sd-&gt;exposure-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_JPEG_COMPRESSION_QUALITY:</div><div class='add'>+		set_quality(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return gspca_dev-&gt;usb_err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops sd_ctrl_ops = {</div><div class='add'>+	.s_ctrl = sd_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int sd_init_controls(struct gspca_dev *gspca_dev)</div><div class='add'>+{</div><div class='add'>+	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	struct v4l2_ctrl_handler *hdl = &amp;gspca_dev-&gt;ctrl_handler;</div><div class='add'>+</div><div class='add'>+	gspca_dev-&gt;vdev.ctrl_handler = hdl;</div><div class='add'>+	v4l2_ctrl_handler_init(hdl, 13);</div><div class='add'>+</div><div class='add'>+	sd-&gt;brightness = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_BRIGHTNESS, 0, 255, 1, 127);</div><div class='add'>+	sd-&gt;contrast = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_CONTRAST, 0, 255, 1, 127);</div><div class='add'>+	sd-&gt;saturation = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_SATURATION, 0, 255, 1, 127);</div><div class='add'>+	sd-&gt;hue = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_HUE, -180, 180, 1, 0);</div><div class='add'>+	v4l2_ctrl_cluster(4, &amp;sd-&gt;brightness);</div><div class='add'>+</div><div class='add'>+	sd-&gt;gamma = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_GAMMA, 0, 255, 1, 0x10);</div><div class='add'>+</div><div class='add'>+	sd-&gt;blue = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_BLUE_BALANCE, 0, 127, 1, 0x28);</div><div class='add'>+	sd-&gt;red = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_RED_BALANCE, 0, 127, 1, 0x28);</div><div class='add'>+	v4l2_ctrl_cluster(2, &amp;sd-&gt;blue);</div><div class='add'>+</div><div class='add'>+	if (sd-&gt;sensor != SENSOR_OV9655 &amp;&amp; sd-&gt;sensor != SENSOR_SOI968 &amp;&amp;</div><div class='add'>+	    sd-&gt;sensor != SENSOR_OV7670 &amp;&amp; sd-&gt;sensor != SENSOR_MT9M001 &amp;&amp;</div><div class='add'>+	    sd-&gt;sensor != SENSOR_MT9VPRB) {</div><div class='add'>+		sd-&gt;hflip = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_HFLIP, 0, 1, 1, 0);</div><div class='add'>+		sd-&gt;vflip = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_VFLIP, 0, 1, 1, 0);</div><div class='add'>+		v4l2_ctrl_cluster(2, &amp;sd-&gt;hflip);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sd-&gt;sensor != SENSOR_SOI968 &amp;&amp; sd-&gt;sensor != SENSOR_MT9VPRB &amp;&amp;</div><div class='add'>+	    sd-&gt;sensor != SENSOR_MT9M112 &amp;&amp; sd-&gt;sensor != SENSOR_MT9M111 &amp;&amp;</div><div class='add'>+	    sd-&gt;sensor != SENSOR_MT9V111)</div><div class='add'>+		sd-&gt;exposure = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_EXPOSURE, 0, 0x1780, 1, 0x33);</div><div class='add'>+</div><div class='add'>+	if (sd-&gt;sensor != SENSOR_MT9VPRB &amp;&amp; sd-&gt;sensor != SENSOR_MT9M112 &amp;&amp;</div><div class='add'>+	    sd-&gt;sensor != SENSOR_MT9M111 &amp;&amp; sd-&gt;sensor != SENSOR_MT9V111) {</div><div class='add'>+		sd-&gt;gain = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_GAIN, 0, 28, 1, 0);</div><div class='add'>+		sd-&gt;autogain = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_AUTOGAIN, 0, 1, 1, 1);</div><div class='add'>+		if (sd-&gt;sensor == SENSOR_SOI968)</div><div class='add'>+			/* this sensor doesn't have the exposure control and</div><div class='add'>+			   autogain is clustered with gain instead. This works</div><div class='add'>+			   because sd-&gt;exposure == NULL. */</div><div class='add'>+			v4l2_ctrl_auto_cluster(3, &amp;sd-&gt;autogain, 0, false);</div><div class='add'>+		else</div><div class='add'>+			/* Otherwise autogain is clustered with exposure. */</div><div class='add'>+			v4l2_ctrl_auto_cluster(2, &amp;sd-&gt;autogain, 0, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sd-&gt;jpegqual = v4l2_ctrl_new_std(hdl, &amp;sd_ctrl_ops,</div><div class='add'>+			V4L2_CID_JPEG_COMPRESSION_QUALITY, 50, 90, 1, 80);</div><div class='add'>+	if (hdl-&gt;error) {</div><div class='add'>+		pr_err("Could not initialize controls\n");</div><div class='add'>+		return hdl-&gt;error;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='hunk'>@@ -1949,7 +1905,6 @@ static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		pr_err("Unsupported sensor\n");</div><div class='ctx'> 		gspca_dev-&gt;usb_err = -ENODEV;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	return gspca_dev-&gt;usb_err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2025,8 +1980,8 @@ static int sd_isoc_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> </div><div class='ctx'> 		if (intf-&gt;num_altsetting != 9) {</div><div class='ctx'> 			pr_warn("sn9c20x camera with unknown number of alt "</div><div class='del'>-			        "settings (%d), please report!\n",</div><div class='del'>-			        intf-&gt;num_altsetting);</div><div class='add'>+				"settings (%d), please report!\n",</div><div class='add'>+				intf-&gt;num_altsetting);</div><div class='ctx'> 			gspca_dev-&gt;alt = intf-&gt;num_altsetting;</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2067,7 +2022,7 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> </div><div class='ctx'> 	jpeg_define(sd-&gt;jpeg_hdr, height, width,</div><div class='ctx'> 			0x21);</div><div class='del'>-	jpeg_set_qual(sd-&gt;jpeg_hdr, sd-&gt;ctrls[QUALITY].val);</div><div class='add'>+	jpeg_set_qual(sd-&gt;jpeg_hdr, v4l2_ctrl_g_ctrl(sd-&gt;jpegqual));</div><div class='ctx'> </div><div class='ctx'> 	if (mode &amp; MODE_RAW)</div><div class='ctx'> 		fmt = 0x2d;</div><div class='hunk'>@@ -2104,12 +2059,17 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	reg_w1(gspca_dev, 0x1189, scale);</div><div class='ctx'> 	reg_w1(gspca_dev, 0x10e0, fmt);</div><div class='ctx'> </div><div class='del'>-	set_cmatrix(gspca_dev);</div><div class='del'>-	set_gamma(gspca_dev);</div><div class='del'>-	set_redblue(gspca_dev);</div><div class='del'>-	set_gain(gspca_dev);</div><div class='del'>-	set_exposure(gspca_dev);</div><div class='del'>-	set_hvflip(gspca_dev);</div><div class='add'>+	set_cmatrix(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;brightness),</div><div class='add'>+			v4l2_ctrl_g_ctrl(sd-&gt;contrast),</div><div class='add'>+			v4l2_ctrl_g_ctrl(sd-&gt;saturation),</div><div class='add'>+			v4l2_ctrl_g_ctrl(sd-&gt;hue));</div><div class='add'>+	set_gamma(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;gamma));</div><div class='add'>+	set_redblue(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;blue),</div><div class='add'>+			v4l2_ctrl_g_ctrl(sd-&gt;red));</div><div class='add'>+	set_gain(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;gain));</div><div class='add'>+	set_exposure(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;exposure));</div><div class='add'>+	set_hvflip(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;hflip),</div><div class='add'>+			v4l2_ctrl_g_ctrl(sd-&gt;vflip));</div><div class='ctx'> </div><div class='ctx'> 	reg_w1(gspca_dev, 0x1007, 0x20);</div><div class='ctx'> 	reg_w1(gspca_dev, 0x1061, 0x03);</div><div class='hunk'>@@ -2148,6 +2108,9 @@ static void sd_stop0(struct gspca_dev *gspca_dev)</div><div class='ctx'> static void do_autoexposure(struct gspca_dev *gspca_dev, u16 avg_lum)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	s32 cur_exp = v4l2_ctrl_g_ctrl(sd-&gt;exposure);</div><div class='add'>+	s32 max = sd-&gt;exposure-&gt;maximum - sd-&gt;exposure_step;</div><div class='add'>+	s32 min = sd-&gt;exposure-&gt;minimum + sd-&gt;exposure_step;</div><div class='ctx'> 	s16 new_exp;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2156,16 +2119,15 @@ static void do_autoexposure(struct gspca_dev *gspca_dev, u16 avg_lum)</div><div class='ctx'> 	 * and exposure steps</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (avg_lum &lt; MIN_AVG_LUM) {</div><div class='del'>-		if (sd-&gt;ctrls[EXPOSURE].val &gt; 0x1770)</div><div class='add'>+		if (cur_exp &gt; max)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		new_exp = sd-&gt;ctrls[EXPOSURE].val + sd-&gt;exposure_step;</div><div class='del'>-		if (new_exp &gt; 0x1770)</div><div class='del'>-			new_exp = 0x1770;</div><div class='del'>-		if (new_exp &lt; 0x10)</div><div class='del'>-			new_exp = 0x10;</div><div class='del'>-		sd-&gt;ctrls[EXPOSURE].val = new_exp;</div><div class='del'>-		set_exposure(gspca_dev);</div><div class='add'>+		new_exp = cur_exp + sd-&gt;exposure_step;</div><div class='add'>+		if (new_exp &gt; max)</div><div class='add'>+			new_exp = max;</div><div class='add'>+		if (new_exp &lt; min)</div><div class='add'>+			new_exp = min;</div><div class='add'>+		v4l2_ctrl_s_ctrl(sd-&gt;exposure, new_exp);</div><div class='ctx'> </div><div class='ctx'> 		sd-&gt;older_step = sd-&gt;old_step;</div><div class='ctx'> 		sd-&gt;old_step = 1;</div><div class='hunk'>@@ -2176,15 +2138,14 @@ static void do_autoexposure(struct gspca_dev *gspca_dev, u16 avg_lum)</div><div class='ctx'> 			sd-&gt;exposure_step += 2;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (avg_lum &gt; MAX_AVG_LUM) {</div><div class='del'>-		if (sd-&gt;ctrls[EXPOSURE].val &lt; 0x10)</div><div class='add'>+		if (cur_exp &lt; min)</div><div class='ctx'> 			return;</div><div class='del'>-		new_exp = sd-&gt;ctrls[EXPOSURE].val - sd-&gt;exposure_step;</div><div class='del'>-		if (new_exp &gt; 0x1700)</div><div class='del'>-			new_exp = 0x1770;</div><div class='del'>-		if (new_exp &lt; 0x10)</div><div class='del'>-			new_exp = 0x10;</div><div class='del'>-		sd-&gt;ctrls[EXPOSURE].val = new_exp;</div><div class='del'>-		set_exposure(gspca_dev);</div><div class='add'>+		new_exp = cur_exp - sd-&gt;exposure_step;</div><div class='add'>+		if (new_exp &gt; max)</div><div class='add'>+			new_exp = max;</div><div class='add'>+		if (new_exp &lt; min)</div><div class='add'>+			new_exp = min;</div><div class='add'>+		v4l2_ctrl_s_ctrl(sd-&gt;exposure, new_exp);</div><div class='ctx'> 		sd-&gt;older_step = sd-&gt;old_step;</div><div class='ctx'> 		sd-&gt;old_step = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2198,19 +2159,12 @@ static void do_autoexposure(struct gspca_dev *gspca_dev, u16 avg_lum)</div><div class='ctx'> static void do_autogain(struct gspca_dev *gspca_dev, u16 avg_lum)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	s32 cur_gain = v4l2_ctrl_g_ctrl(sd-&gt;gain);</div><div class='ctx'> </div><div class='del'>-	if (avg_lum &lt; MIN_AVG_LUM) {</div><div class='del'>-		if (sd-&gt;ctrls[GAIN].val + 1 &lt;= 28) {</div><div class='del'>-			sd-&gt;ctrls[GAIN].val++;</div><div class='del'>-			set_gain(gspca_dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (avg_lum &gt; MAX_AVG_LUM) {</div><div class='del'>-		if (sd-&gt;ctrls[GAIN].val &gt; 0) {</div><div class='del'>-			sd-&gt;ctrls[GAIN].val--;</div><div class='del'>-			set_gain(gspca_dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (avg_lum &lt; MIN_AVG_LUM &amp;&amp; cur_gain &lt; sd-&gt;gain-&gt;maximum)</div><div class='add'>+		v4l2_ctrl_s_ctrl(sd-&gt;gain, cur_gain + 1);</div><div class='add'>+	if (avg_lum &gt; MAX_AVG_LUM &amp;&amp; cur_gain &gt; sd-&gt;gain-&gt;minimum)</div><div class='add'>+		v4l2_ctrl_s_ctrl(sd-&gt;gain, cur_gain - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sd_dqcallback(struct gspca_dev *gspca_dev)</div><div class='hunk'>@@ -2218,7 +2172,7 @@ static void sd_dqcallback(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> 	int avg_lum;</div><div class='ctx'> </div><div class='del'>-	if (!sd-&gt;ctrls[AUTOGAIN].val)</div><div class='add'>+	if (!v4l2_ctrl_g_ctrl(sd-&gt;autogain))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	avg_lum = atomic_read(&amp;sd-&gt;avg_lum);</div><div class='hunk'>@@ -2234,10 +2188,11 @@ static void qual_upd(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = container_of(work, struct sd, work);</div><div class='ctx'> 	struct gspca_dev *gspca_dev = &amp;sd-&gt;gspca_dev;</div><div class='add'>+	s32 qual = v4l2_ctrl_g_ctrl(sd-&gt;jpegqual);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-	PDEBUG(D_STREAM, "qual_upd %d%%", sd-&gt;ctrls[QUALITY].val);</div><div class='del'>-	set_quality(gspca_dev);</div><div class='add'>+	PDEBUG(D_STREAM, "qual_upd %d%%", qual);</div><div class='add'>+	set_quality(gspca_dev, qual);</div><div class='ctx'> 	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2286,14 +2241,18 @@ static void transfer_check(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	if (new_qual != 0) {</div><div class='ctx'> 		sd-&gt;nchg += new_qual;</div><div class='ctx'> 		if (sd-&gt;nchg &lt; -6 || sd-&gt;nchg &gt;= 12) {</div><div class='add'>+			/* Note: we are in interrupt context, so we can't</div><div class='add'>+			   use v4l2_ctrl_g/s_ctrl here. Access the value</div><div class='add'>+			   directly instead. */</div><div class='add'>+			s32 curqual = sd-&gt;jpegqual-&gt;cur.val;</div><div class='ctx'> 			sd-&gt;nchg = 0;</div><div class='del'>-			new_qual += sd-&gt;ctrls[QUALITY].val;</div><div class='del'>-			if (new_qual &lt; QUALITY_MIN)</div><div class='del'>-				new_qual = QUALITY_MIN;</div><div class='del'>-			else if (new_qual &gt; QUALITY_MAX)</div><div class='del'>-				new_qual = QUALITY_MAX;</div><div class='del'>-			if (new_qual != sd-&gt;ctrls[QUALITY].val) {</div><div class='del'>-				sd-&gt;ctrls[QUALITY].val = new_qual;</div><div class='add'>+			new_qual += curqual;</div><div class='add'>+			if (new_qual &lt; sd-&gt;jpegqual-&gt;minimum)</div><div class='add'>+				new_qual = sd-&gt;jpegqual-&gt;minimum;</div><div class='add'>+			else if (new_qual &gt; sd-&gt;jpegqual-&gt;maximum)</div><div class='add'>+				new_qual = sd-&gt;jpegqual-&gt;maximum;</div><div class='add'>+			if (new_qual != curqual) {</div><div class='add'>+				sd-&gt;jpegqual-&gt;cur.val = new_qual;</div><div class='ctx'> 				queue_work(sd-&gt;work_thread, &amp;sd-&gt;work);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2309,7 +2268,7 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> 	int avg_lum, is_jpeg;</div><div class='del'>-	static u8 frame_header[] =</div><div class='add'>+	static const u8 frame_header[] =</div><div class='ctx'> 		{0xff, 0xff, 0x00, 0xc4, 0xc4, 0x96};</div><div class='ctx'> </div><div class='ctx'> 	is_jpeg = (sd-&gt;fmt &amp; 0x03) == 0;</div><div class='hunk'>@@ -2373,10 +2332,9 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> /* sub-driver description */</div><div class='ctx'> static const struct sd_desc sd_desc = {</div><div class='ctx'> 	.name = KBUILD_MODNAME,</div><div class='del'>-	.ctrls = sd_ctrls,</div><div class='del'>-	.nctrls = ARRAY_SIZE(sd_ctrls),</div><div class='ctx'> 	.config = sd_config,</div><div class='ctx'> 	.init = sd_init,</div><div class='add'>+	.init_controls = sd_init_controls,</div><div class='ctx'> 	.isoc_init = sd_isoc_init,</div><div class='ctx'> 	.start = sd_start,</div><div class='ctx'> 	.stopN = sd_stopN,</div><div class='head'>diff --git a/drivers/media/video/gspca/sonixb.c b/drivers/media/video/gspca/sonixb.c<br/>index 6a1148d7fe92..e2bdf8f632f4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/sonixb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/sonixb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/sonixb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/sonixb.c</a></div><div class='hunk'>@@ -1000,6 +1000,8 @@ static void setfreq(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define WANT_REGULAR_AUTOGAIN</div><div class='add'>+#define WANT_COARSE_EXPO_AUTOGAIN</div><div class='ctx'> #include "autogain_functions.h"</div><div class='ctx'> </div><div class='ctx'> static void do_autogain(struct gspca_dev *gspca_dev)</div><div class='head'>diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c<br/>index db8e5084df06..4d1696d1a7f4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/sonixj.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/sonixj.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/sonixj.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/sonixj.c</a></div><div class='hunk'>@@ -2800,10 +2800,7 @@ static void sd_stop0(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* !! coarse_grained_expo_autogain is not used !! */</div><div class='del'>-#define exp_too_low_cnt bridge</div><div class='del'>-#define exp_too_high_cnt sensor</div><div class='del'>-</div><div class='add'>+#define WANT_REGULAR_AUTOGAIN</div><div class='ctx'> #include "autogain_functions.h"</div><div class='ctx'> </div><div class='ctx'> static void do_autogain(struct gspca_dev *gspca_dev)</div><div class='hunk'>@@ -2923,6 +2920,10 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	 * not the JPEG end of frame ('ff d9').</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='add'>+	/* count the packets and their size */</div><div class='add'>+	sd-&gt;npkt++;</div><div class='add'>+	sd-&gt;pktsz += len;</div><div class='add'>+</div><div class='ctx'> /*fixme: assumption about the following code:</div><div class='ctx'>  *	- there can be only one marker in a packet</div><div class='ctx'>  */</div><div class='hunk'>@@ -2945,10 +2946,6 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> 		data += i;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* count the packets and their size */</div><div class='del'>-	sd-&gt;npkt++;</div><div class='del'>-	sd-&gt;pktsz += len;</div><div class='del'>-</div><div class='ctx'> 	/* search backwards if there is a marker in the packet */</div><div class='ctx'> 	for (i = len - 1; --i &gt;= 0; ) {</div><div class='ctx'> 		if (data[i] != 0xff) {</div><div class='head'>diff --git a/drivers/media/video/gspca/sq905.c b/drivers/media/video/gspca/sq905.c<br/>index 2fe3c29bd6b7..04f54654a026 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/sq905.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/sq905.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/sq905.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/sq905.c</a></div><div class='hunk'>@@ -232,7 +232,11 @@ static void sq905_dostream(struct work_struct *work)</div><div class='ctx'> 	frame_sz = gspca_dev-&gt;cam.cam_mode[gspca_dev-&gt;curr_mode].sizeimage</div><div class='ctx'> 			+ FRAME_HEADER_LEN;</div><div class='ctx'> </div><div class='del'>-	while (gspca_dev-&gt;present &amp;&amp; gspca_dev-&gt;streaming) {</div><div class='add'>+	while (gspca_dev-&gt;dev &amp;&amp; gspca_dev-&gt;streaming) {</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+		if (gspca_dev-&gt;frozen)</div><div class='add'>+			break;</div><div class='add'>+#endif</div><div class='ctx'> 		/* request some data and then read it until we have</div><div class='ctx'> 		 * a complete frame. */</div><div class='ctx'> 		bytes_left = frame_sz;</div><div class='hunk'>@@ -242,7 +246,7 @@ static void sq905_dostream(struct work_struct *work)</div><div class='ctx'> 		   we must finish reading an entire frame, otherwise the</div><div class='ctx'> 		   next time we stream we start reading in the middle of a</div><div class='ctx'> 		   frame. */</div><div class='del'>-		while (bytes_left &gt; 0 &amp;&amp; gspca_dev-&gt;present) {</div><div class='add'>+		while (bytes_left &gt; 0 &amp;&amp; gspca_dev-&gt;dev) {</div><div class='ctx'> 			data_len = bytes_left &gt; SQ905_MAX_TRANSFER ?</div><div class='ctx'> 				SQ905_MAX_TRANSFER : bytes_left;</div><div class='ctx'> 			ret = sq905_read_data(gspca_dev, buffer, data_len, 1);</div><div class='hunk'>@@ -274,7 +278,7 @@ static void sq905_dostream(struct work_struct *work)</div><div class='ctx'> 				gspca_frame_add(gspca_dev, LAST_PACKET,</div><div class='ctx'> 						NULL, 0);</div><div class='ctx'> 		}</div><div class='del'>-		if (gspca_dev-&gt;present) {</div><div class='add'>+		if (gspca_dev-&gt;dev) {</div><div class='ctx'> 			/* acknowledge the frame */</div><div class='ctx'> 			mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 			ret = sq905_ack_frame(gspca_dev);</div><div class='hunk'>@@ -284,7 +288,7 @@ static void sq905_dostream(struct work_struct *work)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> quit_stream:</div><div class='del'>-	if (gspca_dev-&gt;present) {</div><div class='add'>+	if (gspca_dev-&gt;dev) {</div><div class='ctx'> 		mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 		sq905_command(gspca_dev, SQ905_CLEAR);</div><div class='ctx'> 		mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='head'>diff --git a/drivers/media/video/gspca/sq905c.c b/drivers/media/video/gspca/sq905c.c<br/>index ae783634712f..f34ddb0570c8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/sq905c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/sq905c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/sq905c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/sq905c.c</a></div><div class='hunk'>@@ -150,7 +150,11 @@ static void sq905c_dostream(struct work_struct *work)</div><div class='ctx'> 		goto quit_stream;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	while (gspca_dev-&gt;present &amp;&amp; gspca_dev-&gt;streaming) {</div><div class='add'>+	while (gspca_dev-&gt;dev &amp;&amp; gspca_dev-&gt;streaming) {</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+		if (gspca_dev-&gt;frozen)</div><div class='add'>+			break;</div><div class='add'>+#endif</div><div class='ctx'> 		/* Request the header, which tells the size to download */</div><div class='ctx'> 		ret = usb_bulk_msg(gspca_dev-&gt;dev,</div><div class='ctx'> 				usb_rcvbulkpipe(gspca_dev-&gt;dev, 0x81),</div><div class='hunk'>@@ -169,7 +173,7 @@ static void sq905c_dostream(struct work_struct *work)</div><div class='ctx'> 		packet_type = FIRST_PACKET;</div><div class='ctx'> 		gspca_frame_add(gspca_dev, packet_type,</div><div class='ctx'> 				buffer, FRAME_HEADER_LEN);</div><div class='del'>-		while (bytes_left &gt; 0 &amp;&amp; gspca_dev-&gt;present) {</div><div class='add'>+		while (bytes_left &gt; 0 &amp;&amp; gspca_dev-&gt;dev) {</div><div class='ctx'> 			data_len = bytes_left &gt; SQ905C_MAX_TRANSFER ?</div><div class='ctx'> 				SQ905C_MAX_TRANSFER : bytes_left;</div><div class='ctx'> 			ret = usb_bulk_msg(gspca_dev-&gt;dev,</div><div class='hunk'>@@ -191,7 +195,7 @@ static void sq905c_dostream(struct work_struct *work)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> quit_stream:</div><div class='del'>-	if (gspca_dev-&gt;present) {</div><div class='add'>+	if (gspca_dev-&gt;dev) {</div><div class='ctx'> 		mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 		sq905c_command(gspca_dev, SQ905C_CLEAR, 0);</div><div class='ctx'> 		mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='head'>diff --git a/drivers/media/video/gspca/stv06xx/stv06xx.c b/drivers/media/video/gspca/stv06xx/stv06xx.c<br/>index 91d99b4cc57b..999ec7764449 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/stv06xx/stv06xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx.c</a></div><div class='hunk'>@@ -261,6 +261,17 @@ static int stv06xx_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	return (err &lt; 0) ? err : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* this function is called at probe time */</div><div class='add'>+static int stv06xx_init_controls(struct gspca_dev *gspca_dev)</div><div class='add'>+{</div><div class='add'>+	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+</div><div class='add'>+	PDEBUG(D_PROBE, "Initializing controls");</div><div class='add'>+</div><div class='add'>+	gspca_dev-&gt;vdev.ctrl_handler = &amp;gspca_dev-&gt;ctrl_handler;</div><div class='add'>+	return sd-&gt;sensor-&gt;init_controls(sd);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Start the camera */</div><div class='ctx'> static int stv06xx_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -512,6 +523,7 @@ static const struct sd_desc sd_desc = {</div><div class='ctx'> 	.name = MODULE_NAME,</div><div class='ctx'> 	.config = stv06xx_config,</div><div class='ctx'> 	.init = stv06xx_init,</div><div class='add'>+	.init_controls = stv06xx_init_controls,</div><div class='ctx'> 	.start = stv06xx_start,</div><div class='ctx'> 	.stopN = stv06xx_stopN,</div><div class='ctx'> 	.pkt_scan = stv06xx_pkt_scan,</div><div class='hunk'>@@ -530,9 +542,8 @@ static int stv06xx_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> </div><div class='ctx'> 	PDEBUG(D_PROBE, "Configuring camera");</div><div class='ctx'> </div><div class='del'>-	sd-&gt;desc = sd_desc;</div><div class='ctx'> 	sd-&gt;bridge = id-&gt;driver_info;</div><div class='del'>-	gspca_dev-&gt;sd_desc = &amp;sd-&gt;desc;</div><div class='add'>+	gspca_dev-&gt;sd_desc = &amp;sd_desc;</div><div class='ctx'> </div><div class='ctx'> 	if (dump_bridge)</div><div class='ctx'> 		stv06xx_dump_bridge(sd);</div><div class='hunk'>@@ -594,11 +605,12 @@ static void sd_disconnect(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct gspca_dev *gspca_dev = usb_get_intfdata(intf);</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	void *priv = sd-&gt;sensor_priv;</div><div class='ctx'> 	PDEBUG(D_PROBE, "Disconnecting the stv06xx device");</div><div class='ctx'> </div><div class='del'>-	if (sd-&gt;sensor-&gt;disconnect)</div><div class='del'>-		sd-&gt;sensor-&gt;disconnect(sd);</div><div class='add'>+	sd-&gt;sensor = NULL;</div><div class='ctx'> 	gspca_disconnect(intf);</div><div class='add'>+	kfree(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct usb_driver sd_driver = {</div><div class='hunk'>@@ -609,6 +621,7 @@ static struct usb_driver sd_driver = {</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> 	.suspend = gspca_suspend,</div><div class='ctx'> 	.resume = gspca_resume,</div><div class='add'>+	.reset_resume = gspca_resume,</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/gspca/stv06xx/stv06xx.h b/drivers/media/video/gspca/stv06xx/stv06xx.h<br/>index d270a5981afe..34957a4ec150 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/stv06xx/stv06xx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx.h</a></div><div class='hunk'>@@ -89,9 +89,6 @@ struct sd {</div><div class='ctx'> 	/* A pointer to the currently connected sensor */</div><div class='ctx'> 	const struct stv06xx_sensor *sensor;</div><div class='ctx'> </div><div class='del'>-	/* A pointer to the sd_desc struct */</div><div class='del'>-	struct sd_desc desc;</div><div class='del'>-</div><div class='ctx'> 	/* Sensor private data */</div><div class='ctx'> 	void *sensor_priv;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c b/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c<br/>index a8698b7a7566..06fa54c5efb2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c</a></div><div class='hunk'>@@ -32,36 +32,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "stv06xx_hdcs.h"</div><div class='ctx'> </div><div class='del'>-static const struct ctrl hdcs1x00_ctrl[] = {</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_EXPOSURE,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "exposure",</div><div class='del'>-			.minimum	= 0x00,</div><div class='del'>-			.maximum	= 0xff,</div><div class='del'>-			.step		= 0x1,</div><div class='del'>-			.default_value	= HDCS_DEFAULT_EXPOSURE,</div><div class='del'>-			.flags		= V4L2_CTRL_FLAG_SLIDER</div><div class='del'>-		},</div><div class='del'>-		.set = hdcs_set_exposure,</div><div class='del'>-		.get = hdcs_get_exposure</div><div class='del'>-	}, {</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_GAIN,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "gain",</div><div class='del'>-			.minimum	= 0x00,</div><div class='del'>-			.maximum	= 0xff,</div><div class='del'>-			.step		= 0x1,</div><div class='del'>-			.default_value	= HDCS_DEFAULT_GAIN,</div><div class='del'>-			.flags		= V4L2_CTRL_FLAG_SLIDER</div><div class='del'>-		},</div><div class='del'>-		.set = hdcs_set_gain,</div><div class='del'>-		.get = hdcs_get_gain</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct v4l2_pix_format hdcs1x00_mode[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		HDCS_1X00_DEF_WIDTH,</div><div class='hunk'>@@ -76,36 +46,6 @@ static struct v4l2_pix_format hdcs1x00_mode[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct ctrl hdcs1020_ctrl[] = {</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_EXPOSURE,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "exposure",</div><div class='del'>-			.minimum	= 0x00,</div><div class='del'>-			.maximum	= 0xffff,</div><div class='del'>-			.step		= 0x1,</div><div class='del'>-			.default_value	= HDCS_DEFAULT_EXPOSURE,</div><div class='del'>-			.flags		= V4L2_CTRL_FLAG_SLIDER</div><div class='del'>-		},</div><div class='del'>-		.set = hdcs_set_exposure,</div><div class='del'>-		.get = hdcs_get_exposure</div><div class='del'>-	}, {</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_GAIN,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "gain",</div><div class='del'>-			.minimum	= 0x00,</div><div class='del'>-			.maximum	= 0xff,</div><div class='del'>-			.step		= 0x1,</div><div class='del'>-			.default_value	= HDCS_DEFAULT_GAIN,</div><div class='del'>-			.flags		= V4L2_CTRL_FLAG_SLIDER</div><div class='del'>-		},</div><div class='del'>-		.set = hdcs_set_gain,</div><div class='del'>-		.get = hdcs_get_gain</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct v4l2_pix_format hdcs1020_mode[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		HDCS_1020_DEF_WIDTH,</div><div class='hunk'>@@ -150,7 +90,6 @@ struct hdcs {</div><div class='ctx'> 	} exp;</div><div class='ctx'> </div><div class='ctx'> 	int psmp;</div><div class='del'>-	u8 exp_cache, gain_cache;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int hdcs_reg_write_seq(struct sd *sd, u8 reg, u8 *vals, u8 len)</div><div class='hunk'>@@ -232,16 +171,6 @@ static int hdcs_reset(struct sd *sd)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hdcs_get_exposure(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	struct hdcs *hdcs = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = hdcs-&gt;exp_cache;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int hdcs_set_exposure(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='hunk'>@@ -260,9 +189,6 @@ static int hdcs_set_exposure(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> 	int cycles, err;</div><div class='ctx'> 	u8 exp[14];</div><div class='ctx'> </div><div class='del'>-	val &amp;= 0xff;</div><div class='del'>-	hdcs-&gt;exp_cache = val;</div><div class='del'>-</div><div class='ctx'> 	cycles = val * HDCS_CLK_FREQ_MHZ * 257;</div><div class='ctx'> </div><div class='ctx'> 	ct = hdcs-&gt;exp.cto + hdcs-&gt;psmp + (HDCS_ADC_START_SIG_DUR + 2);</div><div class='hunk'>@@ -336,12 +262,9 @@ static int hdcs_set_exposure(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> </div><div class='ctx'> static int hdcs_set_gains(struct sd *sd, u8 g)</div><div class='ctx'> {</div><div class='del'>-	struct hdcs *hdcs = sd-&gt;sensor_priv;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	u8 gains[4];</div><div class='ctx'> </div><div class='del'>-	hdcs-&gt;gain_cache = g;</div><div class='del'>-</div><div class='ctx'> 	/* the voltage gain Av = (1 + 19 * val / 127) * (1 + bit7) */</div><div class='ctx'> 	if (g &gt; 127)</div><div class='ctx'> 		g = 0x80 | (g / 2);</div><div class='hunk'>@@ -352,17 +275,7 @@ static int hdcs_set_gains(struct sd *sd, u8 g)</div><div class='ctx'> 	gains[3] = g;</div><div class='ctx'> </div><div class='ctx'> 	err = hdcs_reg_write_seq(sd, HDCS_ERECPGA, gains, 4);</div><div class='del'>-		return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hdcs_get_gain(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	struct hdcs *hdcs = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = hdcs-&gt;gain_cache;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hdcs_set_gain(struct gspca_dev *gspca_dev, __s32 val)</div><div class='hunk'>@@ -420,6 +333,39 @@ static int hdcs_set_size(struct sd *sd,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int hdcs_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct gspca_dev *gspca_dev =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct gspca_dev, ctrl_handler);</div><div class='add'>+	int err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_GAIN:</div><div class='add'>+		err = hdcs_set_gain(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_EXPOSURE:</div><div class='add'>+		err = hdcs_set_exposure(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops hdcs_ctrl_ops = {</div><div class='add'>+	.s_ctrl = hdcs_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int hdcs_init_controls(struct sd *sd)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_ctrl_handler *hdl = &amp;sd-&gt;gspca_dev.ctrl_handler;</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_handler_init(hdl, 2);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;hdcs_ctrl_ops,</div><div class='add'>+			V4L2_CID_EXPOSURE, 0, 0xff, 1, HDCS_DEFAULT_EXPOSURE);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;hdcs_ctrl_ops,</div><div class='add'>+			V4L2_CID_GAIN, 0, 0xff, 1, HDCS_DEFAULT_GAIN);</div><div class='add'>+	return hdl-&gt;error;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hdcs_probe_1x00(struct sd *sd)</div><div class='ctx'> {</div><div class='ctx'> 	struct hdcs *hdcs;</div><div class='hunk'>@@ -434,8 +380,6 @@ static int hdcs_probe_1x00(struct sd *sd)</div><div class='ctx'> </div><div class='ctx'> 	sd-&gt;gspca_dev.cam.cam_mode = hdcs1x00_mode;</div><div class='ctx'> 	sd-&gt;gspca_dev.cam.nmodes = ARRAY_SIZE(hdcs1x00_mode);</div><div class='del'>-	sd-&gt;desc.ctrls = hdcs1x00_ctrl;</div><div class='del'>-	sd-&gt;desc.nctrls = ARRAY_SIZE(hdcs1x00_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	hdcs = kmalloc(sizeof(struct hdcs), GFP_KERNEL);</div><div class='ctx'> 	if (!hdcs)</div><div class='hunk'>@@ -493,8 +437,6 @@ static int hdcs_probe_1020(struct sd *sd)</div><div class='ctx'> </div><div class='ctx'> 	sd-&gt;gspca_dev.cam.cam_mode = hdcs1020_mode;</div><div class='ctx'> 	sd-&gt;gspca_dev.cam.nmodes = ARRAY_SIZE(hdcs1020_mode);</div><div class='del'>-	sd-&gt;desc.ctrls = hdcs1020_ctrl;</div><div class='del'>-	sd-&gt;desc.nctrls = ARRAY_SIZE(hdcs1020_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	hdcs = kmalloc(sizeof(struct hdcs), GFP_KERNEL);</div><div class='ctx'> 	if (!hdcs)</div><div class='hunk'>@@ -537,12 +479,6 @@ static int hdcs_stop(struct sd *sd)</div><div class='ctx'> 	return hdcs_set_state(sd, HDCS_STATE_SLEEP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hdcs_disconnect(struct sd *sd)</div><div class='del'>-{</div><div class='del'>-	PDEBUG(D_PROBE, "Disconnecting the sensor");</div><div class='del'>-	kfree(sd-&gt;sensor_priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int hdcs_init(struct sd *sd)</div><div class='ctx'> {</div><div class='ctx'> 	struct hdcs *hdcs = sd-&gt;sensor_priv;</div><div class='hunk'>@@ -587,16 +523,7 @@ static int hdcs_init(struct sd *sd)</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = hdcs_set_gains(sd, HDCS_DEFAULT_GAIN);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = hdcs_set_size(sd, hdcs-&gt;array.width, hdcs-&gt;array.height);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = hdcs_set_exposure(&amp;sd-&gt;gspca_dev, HDCS_DEFAULT_EXPOSURE);</div><div class='del'>-	return err;</div><div class='add'>+	return hdcs_set_size(sd, hdcs-&gt;array.width, hdcs-&gt;array.height);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hdcs_dump(struct sd *sd)</div><div class='head'>diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h b/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h<br/>index a14a84a5079b..1ba9158d0102 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h</a></div><div class='hunk'>@@ -131,14 +131,12 @@ static int hdcs_probe_1x00(struct sd *sd);</div><div class='ctx'> static int hdcs_probe_1020(struct sd *sd);</div><div class='ctx'> static int hdcs_start(struct sd *sd);</div><div class='ctx'> static int hdcs_init(struct sd *sd);</div><div class='add'>+static int hdcs_init_controls(struct sd *sd);</div><div class='ctx'> static int hdcs_stop(struct sd *sd);</div><div class='ctx'> static int hdcs_dump(struct sd *sd);</div><div class='del'>-static void hdcs_disconnect(struct sd *sd);</div><div class='ctx'> </div><div class='del'>-static int hdcs_get_exposure(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='ctx'> static int hdcs_set_exposure(struct gspca_dev *gspca_dev, __s32 val);</div><div class='ctx'> static int hdcs_set_gain(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int hdcs_get_gain(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='ctx'> </div><div class='ctx'> const struct stv06xx_sensor stv06xx_sensor_hdcs1x00 = {</div><div class='ctx'> 	.name = "HP HDCS-1000/1100",</div><div class='hunk'>@@ -152,10 +150,10 @@ const struct stv06xx_sensor stv06xx_sensor_hdcs1x00 = {</div><div class='ctx'> 	.max_packet_size = { 847 },</div><div class='ctx'> </div><div class='ctx'> 	.init = hdcs_init,</div><div class='add'>+	.init_controls = hdcs_init_controls,</div><div class='ctx'> 	.probe = hdcs_probe_1x00,</div><div class='ctx'> 	.start = hdcs_start,</div><div class='ctx'> 	.stop = hdcs_stop,</div><div class='del'>-	.disconnect = hdcs_disconnect,</div><div class='ctx'> 	.dump = hdcs_dump,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -171,6 +169,7 @@ const struct stv06xx_sensor stv06xx_sensor_hdcs1020 = {</div><div class='ctx'> 	.max_packet_size = { 847 },</div><div class='ctx'> </div><div class='ctx'> 	.init = hdcs_init,</div><div class='add'>+	.init_controls = hdcs_init_controls,</div><div class='ctx'> 	.probe = hdcs_probe_1020,</div><div class='ctx'> 	.start = hdcs_start,</div><div class='ctx'> 	.stop = hdcs_stop,</div><div class='head'>diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.c b/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.c<br/>index 26f14fc4a135..cdfc3d05ab6b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/stv06xx/stv06xx_pb0100.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_pb0100.c</a></div><div class='hunk'>@@ -48,105 +48,16 @@</div><div class='ctx'> </div><div class='ctx'> #include "stv06xx_pb0100.h"</div><div class='ctx'> </div><div class='del'>-static const struct ctrl pb0100_ctrl[] = {</div><div class='del'>-#define GAIN_IDX 0</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_GAIN,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "Gain",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-			.maximum	= 255,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 128</div><div class='del'>-		},</div><div class='del'>-		.set = pb0100_set_gain,</div><div class='del'>-		.get = pb0100_get_gain</div><div class='del'>-	},</div><div class='del'>-#define RED_BALANCE_IDX 1</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_RED_BALANCE,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "Red Balance",</div><div class='del'>-			.minimum	= -255,</div><div class='del'>-			.maximum	= 255,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 0</div><div class='del'>-		},</div><div class='del'>-		.set = pb0100_set_red_balance,</div><div class='del'>-		.get = pb0100_get_red_balance</div><div class='del'>-	},</div><div class='del'>-#define BLUE_BALANCE_IDX 2</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_BLUE_BALANCE,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "Blue Balance",</div><div class='del'>-			.minimum	= -255,</div><div class='del'>-			.maximum	= 255,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 0</div><div class='del'>-		},</div><div class='del'>-		.set = pb0100_set_blue_balance,</div><div class='del'>-		.get = pb0100_get_blue_balance</div><div class='del'>-	},</div><div class='del'>-#define EXPOSURE_IDX 3</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_EXPOSURE,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "Exposure",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-			.maximum	= 511,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 12</div><div class='del'>-		},</div><div class='del'>-		.set = pb0100_set_exposure,</div><div class='del'>-		.get = pb0100_get_exposure</div><div class='del'>-	},</div><div class='del'>-#define AUTOGAIN_IDX 4</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_AUTOGAIN,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-			.name		= "Automatic Gain and Exposure",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-			.maximum	= 1,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 1</div><div class='del'>-		},</div><div class='del'>-		.set = pb0100_set_autogain,</div><div class='del'>-		.get = pb0100_get_autogain</div><div class='del'>-	},</div><div class='del'>-#define AUTOGAIN_TARGET_IDX 5</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CTRL_CLASS_USER + 0x1000,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "Automatic Gain Target",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-			.maximum	= 255,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 128</div><div class='del'>-		},</div><div class='del'>-		.set = pb0100_set_autogain_target,</div><div class='del'>-		.get = pb0100_get_autogain_target</div><div class='del'>-	},</div><div class='del'>-#define NATURAL_IDX 6</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CTRL_CLASS_USER + 0x1001,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-			.name		= "Natural Light Source",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-			.maximum	= 1,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 1</div><div class='del'>-		},</div><div class='del'>-		.set = pb0100_set_natural,</div><div class='del'>-		.get = pb0100_get_natural</div><div class='del'>-	}</div><div class='add'>+struct pb0100_ctrls {</div><div class='add'>+	struct { /* one big happy control cluster... */</div><div class='add'>+		struct v4l2_ctrl *autogain;</div><div class='add'>+		struct v4l2_ctrl *gain;</div><div class='add'>+		struct v4l2_ctrl *exposure;</div><div class='add'>+		struct v4l2_ctrl *red;</div><div class='add'>+		struct v4l2_ctrl *blue;</div><div class='add'>+		struct v4l2_ctrl *natural;</div><div class='add'>+	};</div><div class='add'>+	struct v4l2_ctrl *target;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct v4l2_pix_format pb0100_mode[] = {</div><div class='hunk'>@@ -174,38 +85,104 @@ static struct v4l2_pix_format pb0100_mode[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int pb0100_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct gspca_dev *gspca_dev =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct gspca_dev, ctrl_handler);</div><div class='add'>+	struct sd *sd = (struct sd *)gspca_dev;</div><div class='add'>+	struct pb0100_ctrls *ctrls = sd-&gt;sensor_priv;</div><div class='add'>+	int err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_AUTOGAIN:</div><div class='add'>+		err = pb0100_set_autogain(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+		if (ctrl-&gt;val)</div><div class='add'>+			break;</div><div class='add'>+		err = pb0100_set_gain(gspca_dev, ctrls-&gt;gain-&gt;val);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+		err = pb0100_set_exposure(gspca_dev, ctrls-&gt;exposure-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CTRL_CLASS_USER + 0x1001:</div><div class='add'>+		err = pb0100_set_autogain_target(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops pb0100_ctrl_ops = {</div><div class='add'>+	.s_ctrl = pb0100_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int pb0100_init_controls(struct sd *sd)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_ctrl_handler *hdl = &amp;sd-&gt;gspca_dev.ctrl_handler;</div><div class='add'>+	struct pb0100_ctrls *ctrls;</div><div class='add'>+	static const struct v4l2_ctrl_config autogain_target = {</div><div class='add'>+		.ops = &amp;pb0100_ctrl_ops,</div><div class='add'>+		.id = V4L2_CTRL_CLASS_USER + 0x1000,</div><div class='add'>+		.type = V4L2_CTRL_TYPE_INTEGER,</div><div class='add'>+		.name = "Automatic Gain Target",</div><div class='add'>+		.max = 255,</div><div class='add'>+		.step = 1,</div><div class='add'>+		.def = 128,</div><div class='add'>+	};</div><div class='add'>+	static const struct v4l2_ctrl_config natural_light = {</div><div class='add'>+		.ops = &amp;pb0100_ctrl_ops,</div><div class='add'>+		.id = V4L2_CTRL_CLASS_USER + 0x1001,</div><div class='add'>+		.type = V4L2_CTRL_TYPE_BOOLEAN,</div><div class='add'>+		.name = "Natural Light Source",</div><div class='add'>+		.max = 1,</div><div class='add'>+		.step = 1,</div><div class='add'>+		.def = 1,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ctrls = kzalloc(sizeof(*ctrls), GFP_KERNEL);</div><div class='add'>+	if (!ctrls)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_handler_init(hdl, 6);</div><div class='add'>+	ctrls-&gt;autogain = v4l2_ctrl_new_std(hdl, &amp;pb0100_ctrl_ops,</div><div class='add'>+			V4L2_CID_AUTOGAIN, 0, 1, 1, 1);</div><div class='add'>+	ctrls-&gt;exposure = v4l2_ctrl_new_std(hdl, &amp;pb0100_ctrl_ops,</div><div class='add'>+			V4L2_CID_EXPOSURE, 0, 511, 1, 12);</div><div class='add'>+	ctrls-&gt;gain = v4l2_ctrl_new_std(hdl, &amp;pb0100_ctrl_ops,</div><div class='add'>+			V4L2_CID_GAIN, 0, 255, 1, 128);</div><div class='add'>+	ctrls-&gt;red = v4l2_ctrl_new_std(hdl, &amp;pb0100_ctrl_ops,</div><div class='add'>+			V4L2_CID_RED_BALANCE, -255, 255, 1, 0);</div><div class='add'>+	ctrls-&gt;blue = v4l2_ctrl_new_std(hdl, &amp;pb0100_ctrl_ops,</div><div class='add'>+			V4L2_CID_BLUE_BALANCE, -255, 255, 1, 0);</div><div class='add'>+	ctrls-&gt;natural = v4l2_ctrl_new_custom(hdl, &amp;natural_light, NULL);</div><div class='add'>+	ctrls-&gt;target = v4l2_ctrl_new_custom(hdl, &amp;autogain_target, NULL);</div><div class='add'>+	if (hdl-&gt;error) {</div><div class='add'>+		kfree(ctrls);</div><div class='add'>+		return hdl-&gt;error;</div><div class='add'>+	}</div><div class='add'>+	sd-&gt;sensor_priv = ctrls;</div><div class='add'>+	v4l2_ctrl_auto_cluster(5, &amp;ctrls-&gt;autogain, 0, false);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int pb0100_probe(struct sd *sd)</div><div class='ctx'> {</div><div class='ctx'> 	u16 sensor;</div><div class='del'>-	int i, err;</div><div class='del'>-	s32 *sensor_settings;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = stv06xx_read_sensor(sd, PB_IDENT, &amp;sensor);</div><div class='ctx'> </div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return -ENODEV;</div><div class='add'>+	if ((sensor &gt;&gt; 8) != 0x64)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if ((sensor &gt;&gt; 8) == 0x64) {</div><div class='del'>-		sensor_settings = kmalloc(</div><div class='del'>-				ARRAY_SIZE(pb0100_ctrl) * sizeof(s32),</div><div class='del'>-				GFP_KERNEL);</div><div class='del'>-		if (!sensor_settings)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-</div><div class='del'>-		pr_info("Photobit pb0100 sensor detected\n");</div><div class='del'>-</div><div class='del'>-		sd-&gt;gspca_dev.cam.cam_mode = pb0100_mode;</div><div class='del'>-		sd-&gt;gspca_dev.cam.nmodes = ARRAY_SIZE(pb0100_mode);</div><div class='del'>-		sd-&gt;desc.ctrls = pb0100_ctrl;</div><div class='del'>-		sd-&gt;desc.nctrls = ARRAY_SIZE(pb0100_ctrl);</div><div class='del'>-		for (i = 0; i &lt; sd-&gt;desc.nctrls; i++)</div><div class='del'>-			sensor_settings[i] = pb0100_ctrl[i].qctrl.default_value;</div><div class='del'>-		sd-&gt;sensor_priv = sensor_settings;</div><div class='add'>+	pr_info("Photobit pb0100 sensor detected\n");</div><div class='ctx'> </div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='add'>+	sd-&gt;gspca_dev.cam.cam_mode = pb0100_mode;</div><div class='add'>+	sd-&gt;gspca_dev.cam.nmodes = ARRAY_SIZE(pb0100_mode);</div><div class='ctx'> </div><div class='del'>-	return -ENODEV;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pb0100_start(struct sd *sd)</div><div class='hunk'>@@ -214,7 +191,6 @@ static int pb0100_start(struct sd *sd)</div><div class='ctx'> 	struct usb_host_interface *alt;</div><div class='ctx'> 	struct usb_interface *intf;</div><div class='ctx'> 	struct cam *cam = &amp;sd-&gt;gspca_dev.cam;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='ctx'> 	u32 mode = cam-&gt;cam_mode[sd-&gt;gspca_dev.curr_mode].priv;</div><div class='ctx'> </div><div class='ctx'> 	intf = usb_ifnum_to_if(sd-&gt;gspca_dev.dev, sd-&gt;gspca_dev.iface);</div><div class='hunk'>@@ -255,13 +231,6 @@ static int pb0100_start(struct sd *sd)</div><div class='ctx'> 		stv06xx_write_bridge(sd, STV_SCAN_RATE, 0x20);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* set_gain also sets red and blue balance */</div><div class='del'>-	pb0100_set_gain(&amp;sd-&gt;gspca_dev, sensor_settings[GAIN_IDX]);</div><div class='del'>-	pb0100_set_exposure(&amp;sd-&gt;gspca_dev, sensor_settings[EXPOSURE_IDX]);</div><div class='del'>-	pb0100_set_autogain_target(&amp;sd-&gt;gspca_dev,</div><div class='del'>-				   sensor_settings[AUTOGAIN_TARGET_IDX]);</div><div class='del'>-	pb0100_set_autogain(&amp;sd-&gt;gspca_dev, sensor_settings[AUTOGAIN_IDX]);</div><div class='del'>-</div><div class='ctx'> 	err = stv06xx_write_sensor(sd, PB_CONTROL, BIT(5)|BIT(3)|BIT(1));</div><div class='ctx'> 	PDEBUG(D_STREAM, "Started stream, status: %d", err);</div><div class='ctx'> </div><div class='hunk'>@@ -285,12 +254,6 @@ out:</div><div class='ctx'> 	return (err &lt; 0) ? err : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pb0100_disconnect(struct sd *sd)</div><div class='del'>-{</div><div class='del'>-	sd-&gt;sensor = NULL;</div><div class='del'>-	kfree(sd-&gt;sensor_priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* FIXME: Sort the init commands out and put them into tables,</div><div class='ctx'> 	  this is only for getting the camera to work */</div><div class='ctx'> /* FIXME: No error handling for now,</div><div class='hunk'>@@ -362,62 +325,32 @@ static int pb0100_dump(struct sd *sd)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pb0100_get_gain(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = sensor_settings[GAIN_IDX];</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int pb0100_set_gain(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='add'>+	struct pb0100_ctrls *ctrls = sd-&gt;sensor_priv;</div><div class='ctx'> </div><div class='del'>-	if (sensor_settings[AUTOGAIN_IDX])</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	sensor_settings[GAIN_IDX] = val;</div><div class='ctx'> 	err = stv06xx_write_sensor(sd, PB_G1GAIN, val);</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		err = stv06xx_write_sensor(sd, PB_G2GAIN, val);</div><div class='ctx'> 	PDEBUG(D_V4L2, "Set green gain to %d, status: %d", val, err);</div><div class='ctx'> </div><div class='ctx'> 	if (!err)</div><div class='del'>-		err = pb0100_set_red_balance(gspca_dev,</div><div class='del'>-					     sensor_settings[RED_BALANCE_IDX]);</div><div class='add'>+		err = pb0100_set_red_balance(gspca_dev, ctrls-&gt;red-&gt;val);</div><div class='ctx'> 	if (!err)</div><div class='del'>-		err = pb0100_set_blue_balance(gspca_dev,</div><div class='del'>-					    sensor_settings[BLUE_BALANCE_IDX]);</div><div class='add'>+		err = pb0100_set_blue_balance(gspca_dev, ctrls-&gt;blue-&gt;val);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pb0100_get_red_balance(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = sensor_settings[RED_BALANCE_IDX];</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int pb0100_set_red_balance(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='add'>+	struct pb0100_ctrls *ctrls = sd-&gt;sensor_priv;</div><div class='ctx'> </div><div class='del'>-	if (sensor_settings[AUTOGAIN_IDX])</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	sensor_settings[RED_BALANCE_IDX] = val;</div><div class='del'>-	val += sensor_settings[GAIN_IDX];</div><div class='add'>+	val += ctrls-&gt;gain-&gt;val;</div><div class='ctx'> 	if (val &lt; 0)</div><div class='ctx'> 		val = 0;</div><div class='ctx'> 	else if (val &gt; 255)</div><div class='hunk'>@@ -429,27 +362,13 @@ static int pb0100_set_red_balance(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pb0100_get_blue_balance(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = sensor_settings[BLUE_BALANCE_IDX];</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int pb0100_set_blue_balance(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='add'>+	struct pb0100_ctrls *ctrls = sd-&gt;sensor_priv;</div><div class='ctx'> </div><div class='del'>-	if (sensor_settings[AUTOGAIN_IDX])</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	sensor_settings[BLUE_BALANCE_IDX] = val;</div><div class='del'>-	val += sensor_settings[GAIN_IDX];</div><div class='add'>+	val += ctrls-&gt;gain-&gt;val;</div><div class='ctx'> 	if (val &lt; 0)</div><div class='ctx'> 		val = 0;</div><div class='ctx'> 	else if (val &gt; 255)</div><div class='hunk'>@@ -461,51 +380,25 @@ static int pb0100_set_blue_balance(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pb0100_get_exposure(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = sensor_settings[EXPOSURE_IDX];</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int pb0100_set_exposure(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	if (sensor_settings[AUTOGAIN_IDX])</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	sensor_settings[EXPOSURE_IDX] = val;</div><div class='ctx'> 	err = stv06xx_write_sensor(sd, PB_RINTTIME, val);</div><div class='ctx'> 	PDEBUG(D_V4L2, "Set exposure to %d, status: %d", val, err);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pb0100_get_autogain(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = sensor_settings[AUTOGAIN_IDX];</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int pb0100_set_autogain(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='add'>+	struct pb0100_ctrls *ctrls = sd-&gt;sensor_priv;</div><div class='ctx'> </div><div class='del'>-	sensor_settings[AUTOGAIN_IDX] = val;</div><div class='del'>-	if (sensor_settings[AUTOGAIN_IDX]) {</div><div class='del'>-		if (sensor_settings[NATURAL_IDX])</div><div class='add'>+	if (val) {</div><div class='add'>+		if (ctrls-&gt;natural-&gt;val)</div><div class='ctx'> 			val = BIT(6)|BIT(4)|BIT(0);</div><div class='ctx'> 		else</div><div class='ctx'> 			val = BIT(4)|BIT(0);</div><div class='hunk'>@@ -514,29 +407,15 @@ static int pb0100_set_autogain(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> </div><div class='ctx'> 	err = stv06xx_write_sensor(sd, PB_EXPGAIN, val);</div><div class='ctx'> 	PDEBUG(D_V4L2, "Set autogain to %d (natural: %d), status: %d",</div><div class='del'>-	       sensor_settings[AUTOGAIN_IDX], sensor_settings[NATURAL_IDX],</div><div class='del'>-	       err);</div><div class='add'>+	       val, ctrls-&gt;natural-&gt;val, err);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pb0100_get_autogain_target(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = sensor_settings[AUTOGAIN_TARGET_IDX];</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int pb0100_set_autogain_target(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err, totalpixels, brightpixels, darkpixels;</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	sensor_settings[AUTOGAIN_TARGET_IDX] = val;</div><div class='ctx'> </div><div class='ctx'> 	/* Number of pixels counted by the sensor when subsampling the pixels.</div><div class='ctx'> 	 * Slightly larger than the real value to avoid oscillation */</div><div class='hunk'>@@ -553,23 +432,3 @@ static int pb0100_set_autogain_target(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static int pb0100_get_natural(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = sensor_settings[NATURAL_IDX];</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pb0100_set_natural(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	sensor_settings[NATURAL_IDX] = val;</div><div class='del'>-</div><div class='del'>-	return pb0100_set_autogain(gspca_dev, sensor_settings[AUTOGAIN_IDX]);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.h b/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.h<br/>index 757de246dc75..5071e5353fd3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/stv06xx/stv06xx_pb0100.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_pb0100.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_pb0100.h</a></div><div class='hunk'>@@ -112,25 +112,17 @@</div><div class='ctx'> static int pb0100_probe(struct sd *sd);</div><div class='ctx'> static int pb0100_start(struct sd *sd);</div><div class='ctx'> static int pb0100_init(struct sd *sd);</div><div class='add'>+static int pb0100_init_controls(struct sd *sd);</div><div class='ctx'> static int pb0100_stop(struct sd *sd);</div><div class='ctx'> static int pb0100_dump(struct sd *sd);</div><div class='del'>-static void pb0100_disconnect(struct sd *sd);</div><div class='ctx'> </div><div class='ctx'> /* V4L2 controls supported by the driver */</div><div class='del'>-static int pb0100_get_gain(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='ctx'> static int pb0100_set_gain(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int pb0100_get_red_balance(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='ctx'> static int pb0100_set_red_balance(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int pb0100_get_blue_balance(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='ctx'> static int pb0100_set_blue_balance(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int pb0100_get_exposure(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='ctx'> static int pb0100_set_exposure(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int pb0100_get_autogain(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='ctx'> static int pb0100_set_autogain(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int pb0100_get_autogain_target(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='ctx'> static int pb0100_set_autogain_target(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int pb0100_get_natural(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='del'>-static int pb0100_set_natural(struct gspca_dev *gspca_dev, __s32 val);</div><div class='ctx'> </div><div class='ctx'> const struct stv06xx_sensor stv06xx_sensor_pb0100 = {</div><div class='ctx'> 	.name = "PB-0100",</div><div class='hunk'>@@ -142,11 +134,11 @@ const struct stv06xx_sensor stv06xx_sensor_pb0100 = {</div><div class='ctx'> 	.max_packet_size = { 847, 923 },</div><div class='ctx'> </div><div class='ctx'> 	.init = pb0100_init,</div><div class='add'>+	.init_controls = pb0100_init_controls,</div><div class='ctx'> 	.probe = pb0100_probe,</div><div class='ctx'> 	.start = pb0100_start,</div><div class='ctx'> 	.stop = pb0100_stop,</div><div class='ctx'> 	.dump = pb0100_dump,</div><div class='del'>-	.disconnect = pb0100_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_sensor.h b/drivers/media/video/gspca/stv06xx/stv06xx_sensor.h<br/>index fb229d8ded58..3a498c2495c6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_sensor.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/stv06xx/stv06xx_sensor.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_sensor.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_sensor.h</a></div><div class='hunk'>@@ -63,8 +63,8 @@ struct stv06xx_sensor {</div><div class='ctx'> 	/* Performs a initialization sequence */</div><div class='ctx'> 	int (*init)(struct sd *sd);</div><div class='ctx'> </div><div class='del'>-	/* Executed at device disconnect */</div><div class='del'>-	void (*disconnect)(struct sd *sd);</div><div class='add'>+	/* Initializes the controls */</div><div class='add'>+	int (*init_controls)(struct sd *sd);</div><div class='ctx'> </div><div class='ctx'> 	/* Reads a sensor register */</div><div class='ctx'> 	int (*read_sensor)(struct sd *sd, const u8 address,</div><div class='head'>diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_st6422.c b/drivers/media/video/gspca/stv06xx/stv06xx_st6422.c<br/>index 9940e035b3ab..8a57990dfe0f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_st6422.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/stv06xx/stv06xx_st6422.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_st6422.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_st6422.c</a></div><div class='hunk'>@@ -30,20 +30,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "stv06xx_st6422.h"</div><div class='ctx'> </div><div class='del'>-/* controls */</div><div class='del'>-enum e_ctrl {</div><div class='del'>-	BRIGHTNESS,</div><div class='del'>-	CONTRAST,</div><div class='del'>-	GAIN,</div><div class='del'>-	EXPOSURE,</div><div class='del'>-	NCTRLS		/* number of controls */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* sensor settings */</div><div class='del'>-struct st6422_settings {</div><div class='del'>-	struct gspca_ctrl ctrls[NCTRLS];</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct v4l2_pix_format st6422_mode[] = {</div><div class='ctx'> 	/* Note we actually get 124 lines of data, of which we skip the 4st</div><div class='ctx'> 	   4 as they are garbage */</div><div class='hunk'>@@ -74,83 +60,70 @@ static struct v4l2_pix_format st6422_mode[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* V4L2 controls supported by the driver */</div><div class='del'>-static void st6422_set_brightness(struct gspca_dev *gspca_dev);</div><div class='del'>-static void st6422_set_contrast(struct gspca_dev *gspca_dev);</div><div class='del'>-static void st6422_set_gain(struct gspca_dev *gspca_dev);</div><div class='del'>-static void st6422_set_exposure(struct gspca_dev *gspca_dev);</div><div class='del'>-</div><div class='del'>-static const struct ctrl st6422_ctrl[NCTRLS] = {</div><div class='del'>-[BRIGHTNESS] = {</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_BRIGHTNESS,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "Brightness",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-			.maximum	= 31,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 3</div><div class='del'>-		},</div><div class='del'>-		.set_control = st6422_set_brightness</div><div class='del'>-	},</div><div class='del'>-[CONTRAST] = {</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_CONTRAST,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "Contrast",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-			.maximum	= 15,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 11</div><div class='del'>-		},</div><div class='del'>-		.set_control = st6422_set_contrast</div><div class='del'>-	},</div><div class='del'>-[GAIN] = {</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_GAIN,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "Gain",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-			.maximum	= 255,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 64</div><div class='del'>-		},</div><div class='del'>-		.set_control = st6422_set_gain</div><div class='del'>-	},</div><div class='del'>-[EXPOSURE] = {</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_EXPOSURE,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "Exposure",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-#define EXPOSURE_MAX 1023</div><div class='del'>-			.maximum	= EXPOSURE_MAX,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 256</div><div class='del'>-		},</div><div class='del'>-		.set_control = st6422_set_exposure</div><div class='del'>-	},</div><div class='add'>+static int setbrightness(struct sd *sd, s32 val);</div><div class='add'>+static int setcontrast(struct sd *sd, s32 val);</div><div class='add'>+static int setgain(struct sd *sd, u8 gain);</div><div class='add'>+static int setexposure(struct sd *sd, s16 expo);</div><div class='add'>+</div><div class='add'>+static int st6422_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct gspca_dev *gspca_dev =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct gspca_dev, ctrl_handler);</div><div class='add'>+	struct sd *sd = (struct sd *)gspca_dev;</div><div class='add'>+	int err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_BRIGHTNESS:</div><div class='add'>+		err = setbrightness(sd, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_CONTRAST:</div><div class='add'>+		err = setcontrast(sd, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_GAIN:</div><div class='add'>+		err = setgain(sd, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_EXPOSURE:</div><div class='add'>+		err = setexposure(sd, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* commit settings */</div><div class='add'>+	if (err &gt;= 0)</div><div class='add'>+		err = stv06xx_write_bridge(sd, 0x143f, 0x01);</div><div class='add'>+	sd-&gt;gspca_dev.usb_err = err;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops st6422_ctrl_ops = {</div><div class='add'>+	.s_ctrl = st6422_s_ctrl,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int st6422_probe(struct sd *sd)</div><div class='add'>+static int st6422_init_controls(struct sd *sd)</div><div class='ctx'> {</div><div class='del'>-	struct st6422_settings *sensor_settings;</div><div class='add'>+	struct v4l2_ctrl_handler *hdl = &amp;sd-&gt;gspca_dev.ctrl_handler;</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_handler_init(hdl, 4);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;st6422_ctrl_ops,</div><div class='add'>+			V4L2_CID_BRIGHTNESS, 0, 31, 1, 3);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;st6422_ctrl_ops,</div><div class='add'>+			V4L2_CID_CONTRAST, 0, 15, 1, 11);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;st6422_ctrl_ops,</div><div class='add'>+			V4L2_CID_EXPOSURE, 0, 1023, 1, 256);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;st6422_ctrl_ops,</div><div class='add'>+			V4L2_CID_GAIN, 0, 255, 1, 64);</div><div class='add'>+</div><div class='add'>+	return hdl-&gt;error;</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+static int st6422_probe(struct sd *sd)</div><div class='add'>+{</div><div class='ctx'> 	if (sd-&gt;bridge != BRIDGE_ST6422)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	pr_info("st6422 sensor detected\n");</div><div class='ctx'> </div><div class='del'>-	sensor_settings = kmalloc(sizeof *sensor_settings, GFP_KERNEL);</div><div class='del'>-	if (!sensor_settings)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='ctx'> 	sd-&gt;gspca_dev.cam.cam_mode = st6422_mode;</div><div class='ctx'> 	sd-&gt;gspca_dev.cam.nmodes = ARRAY_SIZE(st6422_mode);</div><div class='del'>-	sd-&gt;gspca_dev.cam.ctrls = sensor_settings-&gt;ctrls;</div><div class='del'>-	sd-&gt;desc.ctrls = st6422_ctrl;</div><div class='del'>-	sd-&gt;desc.nctrls = ARRAY_SIZE(st6422_ctrl);</div><div class='del'>-	sd-&gt;sensor_priv = sensor_settings;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -239,38 +212,22 @@ static int st6422_init(struct sd *sd)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void st6422_disconnect(struct sd *sd)</div><div class='del'>-{</div><div class='del'>-	sd-&gt;sensor = NULL;</div><div class='del'>-	kfree(sd-&gt;sensor_priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int setbrightness(struct sd *sd)</div><div class='add'>+static int setbrightness(struct sd *sd, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct st6422_settings *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='ctx'> 	/* val goes from 0 -&gt; 31 */</div><div class='del'>-	return stv06xx_write_bridge(sd, 0x1432,</div><div class='del'>-			sensor_settings-&gt;ctrls[BRIGHTNESS].val);</div><div class='add'>+	return stv06xx_write_bridge(sd, 0x1432, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int setcontrast(struct sd *sd)</div><div class='add'>+static int setcontrast(struct sd *sd, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct st6422_settings *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='ctx'> 	/* Val goes from 0 -&gt; 15 */</div><div class='del'>-	return stv06xx_write_bridge(sd, 0x143a,</div><div class='del'>-			sensor_settings-&gt;ctrls[CONTRAST].val | 0xf0);</div><div class='add'>+	return stv06xx_write_bridge(sd, 0x143a, val | 0xf0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int setgain(struct sd *sd)</div><div class='add'>+static int setgain(struct sd *sd, u8 gain)</div><div class='ctx'> {</div><div class='del'>-	struct st6422_settings *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-	u8 gain;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	gain = sensor_settings-&gt;ctrls[GAIN].val;</div><div class='del'>-</div><div class='ctx'> 	/* Set red, green, blue, gain */</div><div class='ctx'> 	err = stv06xx_write_bridge(sd, 0x0509, gain);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='hunk'>@@ -292,13 +249,10 @@ static int setgain(struct sd *sd)</div><div class='ctx'> 	return stv06xx_write_bridge(sd, 0x050d, 0x01);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int setexposure(struct sd *sd)</div><div class='add'>+static int setexposure(struct sd *sd, s16 expo)</div><div class='ctx'> {</div><div class='del'>-	struct st6422_settings *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-	u16 expo;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	expo = sensor_settings-&gt;ctrls[EXPOSURE].val;</div><div class='ctx'> 	err = stv06xx_write_bridge(sd, 0x143d, expo &amp; 0xff);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -318,22 +272,6 @@ static int st6422_start(struct sd *sd)</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = setbrightness(sd);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = setcontrast(sd);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = setexposure(sd);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = setgain(sd);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='ctx'> 	/* commit settings */</div><div class='ctx'> 	err = stv06xx_write_bridge(sd, 0x143f, 0x01);</div><div class='ctx'> 	return (err &lt; 0) ? err : 0;</div><div class='hunk'>@@ -345,59 +283,3 @@ static int st6422_stop(struct sd *sd)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static void st6422_set_brightness(struct gspca_dev *gspca_dev)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	err = setbrightness(sd);</div><div class='del'>-</div><div class='del'>-	/* commit settings */</div><div class='del'>-	if (err &gt;= 0)</div><div class='del'>-		err = stv06xx_write_bridge(sd, 0x143f, 0x01);</div><div class='del'>-</div><div class='del'>-	gspca_dev-&gt;usb_err = err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void st6422_set_contrast(struct gspca_dev *gspca_dev)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	err = setcontrast(sd);</div><div class='del'>-</div><div class='del'>-	/* commit settings */</div><div class='del'>-	if (err &gt;= 0)</div><div class='del'>-		err = stv06xx_write_bridge(sd, 0x143f, 0x01);</div><div class='del'>-</div><div class='del'>-	gspca_dev-&gt;usb_err = err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void st6422_set_gain(struct gspca_dev *gspca_dev)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	err = setgain(sd);</div><div class='del'>-</div><div class='del'>-	/* commit settings */</div><div class='del'>-	if (err &gt;= 0)</div><div class='del'>-		err = stv06xx_write_bridge(sd, 0x143f, 0x01);</div><div class='del'>-</div><div class='del'>-	gspca_dev-&gt;usb_err = err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void st6422_set_exposure(struct gspca_dev *gspca_dev)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	err = setexposure(sd);</div><div class='del'>-</div><div class='del'>-	/* commit settings */</div><div class='del'>-	if (err &gt;= 0)</div><div class='del'>-		err = stv06xx_write_bridge(sd, 0x143f, 0x01);</div><div class='del'>-</div><div class='del'>-	gspca_dev-&gt;usb_err = err;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_st6422.h b/drivers/media/video/gspca/stv06xx/stv06xx_st6422.h<br/>index d7498e06432b..8f20fbf30f33 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_st6422.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/stv06xx/stv06xx_st6422.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_st6422.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_st6422.h</a></div><div class='hunk'>@@ -34,8 +34,8 @@</div><div class='ctx'> static int st6422_probe(struct sd *sd);</div><div class='ctx'> static int st6422_start(struct sd *sd);</div><div class='ctx'> static int st6422_init(struct sd *sd);</div><div class='add'>+static int st6422_init_controls(struct sd *sd);</div><div class='ctx'> static int st6422_stop(struct sd *sd);</div><div class='del'>-static void st6422_disconnect(struct sd *sd);</div><div class='ctx'> </div><div class='ctx'> const struct stv06xx_sensor stv06xx_sensor_st6422 = {</div><div class='ctx'> 	.name = "ST6422",</div><div class='hunk'>@@ -43,10 +43,10 @@ const struct stv06xx_sensor stv06xx_sensor_st6422 = {</div><div class='ctx'> 	.min_packet_size = { 300, 847 },</div><div class='ctx'> 	.max_packet_size = { 300, 847 },</div><div class='ctx'> 	.init = st6422_init,</div><div class='add'>+	.init_controls = st6422_init_controls,</div><div class='ctx'> 	.probe = st6422_probe,</div><div class='ctx'> 	.start = st6422_start,</div><div class='ctx'> 	.stop = st6422_stop,</div><div class='del'>-	.disconnect = st6422_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.c b/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.c<br/>index a5c69d9ebdd4..748e1421d6d8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/stv06xx/stv06xx_vv6410.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_vv6410.c</a></div><div class='hunk'>@@ -44,130 +44,83 @@ static struct v4l2_pix_format vv6410_mode[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct ctrl vv6410_ctrl[] = {</div><div class='del'>-#define HFLIP_IDX 0</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_HFLIP,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-			.name		= "horizontal flip",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-			.maximum	= 1,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value	= 0</div><div class='del'>-		},</div><div class='del'>-		.set = vv6410_set_hflip,</div><div class='del'>-		.get = vv6410_get_hflip</div><div class='del'>-	},</div><div class='del'>-#define VFLIP_IDX 1</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_VFLIP,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-			.name		= "vertical flip",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-			.maximum	= 1,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value	= 0</div><div class='del'>-		},</div><div class='del'>-		.set = vv6410_set_vflip,</div><div class='del'>-		.get = vv6410_get_vflip</div><div class='del'>-	},</div><div class='del'>-#define GAIN_IDX 2</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_GAIN,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "analog gain",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-			.maximum	= 15,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 10</div><div class='del'>-		},</div><div class='del'>-		.set = vv6410_set_analog_gain,</div><div class='del'>-		.get = vv6410_get_analog_gain</div><div class='del'>-	},</div><div class='del'>-#define EXPOSURE_IDX 3</div><div class='del'>-	{</div><div class='del'>-		{</div><div class='del'>-			.id		= V4L2_CID_EXPOSURE,</div><div class='del'>-			.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-			.name		= "exposure",</div><div class='del'>-			.minimum	= 0,</div><div class='del'>-			.maximum	= 32768,</div><div class='del'>-			.step		= 1,</div><div class='del'>-			.default_value  = 20000</div><div class='del'>-		},</div><div class='del'>-		.set = vv6410_set_exposure,</div><div class='del'>-		.get = vv6410_get_exposure</div><div class='add'>+static int vv6410_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct gspca_dev *gspca_dev =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct gspca_dev, ctrl_handler);</div><div class='add'>+	int err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_HFLIP:</div><div class='add'>+		err = vv6410_set_hflip(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_VFLIP:</div><div class='add'>+		err = vv6410_set_vflip(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_GAIN:</div><div class='add'>+		err = vv6410_set_analog_gain(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_EXPOSURE:</div><div class='add'>+		err = vv6410_set_exposure(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='del'>-	};</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops vv6410_ctrl_ops = {</div><div class='add'>+	.s_ctrl = vv6410_s_ctrl,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static int vv6410_probe(struct sd *sd)</div><div class='ctx'> {</div><div class='ctx'> 	u16 data;</div><div class='del'>-	int err, i;</div><div class='del'>-	s32 *sensor_settings;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = stv06xx_read_sensor(sd, VV6410_DEVICEH, &amp;data);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (data == 0x19) {</div><div class='del'>-		pr_info("vv6410 sensor detected\n");</div><div class='add'>+	if (data != 0x19)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-		sensor_settings = kmalloc(ARRAY_SIZE(vv6410_ctrl) * sizeof(s32),</div><div class='del'>-					  GFP_KERNEL);</div><div class='del'>-		if (!sensor_settings)</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+	pr_info("vv6410 sensor detected\n");</div><div class='ctx'> </div><div class='del'>-		sd-&gt;gspca_dev.cam.cam_mode = vv6410_mode;</div><div class='del'>-		sd-&gt;gspca_dev.cam.nmodes = ARRAY_SIZE(vv6410_mode);</div><div class='del'>-		sd-&gt;desc.ctrls = vv6410_ctrl;</div><div class='del'>-		sd-&gt;desc.nctrls = ARRAY_SIZE(vv6410_ctrl);</div><div class='add'>+	sd-&gt;gspca_dev.cam.cam_mode = vv6410_mode;</div><div class='add'>+	sd-&gt;gspca_dev.cam.nmodes = ARRAY_SIZE(vv6410_mode);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; sd-&gt;desc.nctrls; i++)</div><div class='del'>-			sensor_settings[i] = vv6410_ctrl[i].qctrl.default_value;</div><div class='del'>-		sd-&gt;sensor_priv = sensor_settings;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	return -ENODEV;</div><div class='add'>+static int vv6410_init_controls(struct sd *sd)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_ctrl_handler *hdl = &amp;sd-&gt;gspca_dev.ctrl_handler;</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_handler_init(hdl, 4);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;vv6410_ctrl_ops,</div><div class='add'>+			V4L2_CID_HFLIP, 0, 1, 1, 0);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;vv6410_ctrl_ops,</div><div class='add'>+			V4L2_CID_VFLIP, 0, 1, 1, 0);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;vv6410_ctrl_ops,</div><div class='add'>+			V4L2_CID_EXPOSURE, 0, 32768, 1, 20000);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;vv6410_ctrl_ops,</div><div class='add'>+			V4L2_CID_GAIN, 0, 15, 1, 10);</div><div class='add'>+	return hdl-&gt;error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vv6410_init(struct sd *sd)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0, i;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(stv_bridge_init); i++) {</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(stv_bridge_init); i++)</div><div class='ctx'> 		stv06xx_write_bridge(sd, stv_bridge_init[i].addr, stv_bridge_init[i].data);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	err = stv06xx_write_sensor_bytes(sd, (u8 *) vv6410_sensor_init,</div><div class='ctx'> 					 ARRAY_SIZE(vv6410_sensor_init));</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = vv6410_set_exposure(&amp;sd-&gt;gspca_dev,</div><div class='del'>-				   sensor_settings[EXPOSURE_IDX]);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = vv6410_set_analog_gain(&amp;sd-&gt;gspca_dev,</div><div class='del'>-				      sensor_settings[GAIN_IDX]);</div><div class='del'>-</div><div class='ctx'> 	return (err &lt; 0) ? err : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void vv6410_disconnect(struct sd *sd)</div><div class='del'>-{</div><div class='del'>-	sd-&gt;sensor = NULL;</div><div class='del'>-	kfree(sd-&gt;sensor_priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int vv6410_start(struct sd *sd)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -233,25 +186,12 @@ static int vv6410_dump(struct sd *sd)</div><div class='ctx'> 	return (err &lt; 0) ? err : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vv6410_get_hflip(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = sensor_settings[HFLIP_IDX];</div><div class='del'>-	PDEBUG(D_V4L2, "Read horizontal flip %d", *val);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int vv6410_set_hflip(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	u16 i2c_data;</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='ctx'> </div><div class='del'>-	sensor_settings[HFLIP_IDX] = val;</div><div class='ctx'> 	err = stv06xx_read_sensor(sd, VV6410_DATAFORMAT, &amp;i2c_data);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -267,25 +207,12 @@ static int vv6410_set_hflip(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> 	return (err &lt; 0) ? err : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vv6410_get_vflip(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = sensor_settings[VFLIP_IDX];</div><div class='del'>-	PDEBUG(D_V4L2, "Read vertical flip %d", *val);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int vv6410_set_vflip(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	u16 i2c_data;</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='ctx'> </div><div class='del'>-	sensor_settings[VFLIP_IDX] = val;</div><div class='ctx'> 	err = stv06xx_read_sensor(sd, VV6410_DATAFORMAT, &amp;i2c_data);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -301,52 +228,23 @@ static int vv6410_set_vflip(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> 	return (err &lt; 0) ? err : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vv6410_get_analog_gain(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = sensor_settings[GAIN_IDX];</div><div class='del'>-</div><div class='del'>-	PDEBUG(D_V4L2, "Read analog gain %d", *val);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int vv6410_set_analog_gain(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='ctx'> </div><div class='del'>-	sensor_settings[GAIN_IDX] = val;</div><div class='ctx'> 	PDEBUG(D_V4L2, "Set analog gain to %d", val);</div><div class='ctx'> 	err = stv06xx_write_sensor(sd, VV6410_ANALOGGAIN, 0xf0 | (val &amp; 0xf));</div><div class='ctx'> </div><div class='ctx'> 	return (err &lt; 0) ? err : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vv6410_get_exposure(struct gspca_dev *gspca_dev, __s32 *val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='del'>-</div><div class='del'>-	*val = sensor_settings[EXPOSURE_IDX];</div><div class='del'>-</div><div class='del'>-	PDEBUG(D_V4L2, "Read exposure %d", *val);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int vv6410_set_exposure(struct gspca_dev *gspca_dev, __s32 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s32 *sensor_settings = sd-&gt;sensor_priv;</div><div class='ctx'> 	unsigned int fine, coarse;</div><div class='ctx'> </div><div class='del'>-	sensor_settings[EXPOSURE_IDX] = val;</div><div class='del'>-</div><div class='ctx'> 	val = (val * val &gt;&gt; 14) + val / 4;</div><div class='ctx'> </div><div class='ctx'> 	fine = val % VV6410_CIF_LINELENGTH;</div><div class='head'>diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h b/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h<br/>index a25b8873f2e6..53e67b40ca05 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h</a></div><div class='hunk'>@@ -178,18 +178,14 @@</div><div class='ctx'> static int vv6410_probe(struct sd *sd);</div><div class='ctx'> static int vv6410_start(struct sd *sd);</div><div class='ctx'> static int vv6410_init(struct sd *sd);</div><div class='add'>+static int vv6410_init_controls(struct sd *sd);</div><div class='ctx'> static int vv6410_stop(struct sd *sd);</div><div class='ctx'> static int vv6410_dump(struct sd *sd);</div><div class='del'>-static void vv6410_disconnect(struct sd *sd);</div><div class='ctx'> </div><div class='ctx'> /* V4L2 controls supported by the driver */</div><div class='del'>-static int vv6410_get_hflip(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='ctx'> static int vv6410_set_hflip(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int vv6410_get_vflip(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='ctx'> static int vv6410_set_vflip(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int vv6410_get_analog_gain(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='ctx'> static int vv6410_set_analog_gain(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static int vv6410_get_exposure(struct gspca_dev *gspca_dev, __s32 *val);</div><div class='ctx'> static int vv6410_set_exposure(struct gspca_dev *gspca_dev, __s32 val);</div><div class='ctx'> </div><div class='ctx'> const struct stv06xx_sensor stv06xx_sensor_vv6410 = {</div><div class='hunk'>@@ -202,11 +198,11 @@ const struct stv06xx_sensor stv06xx_sensor_vv6410 = {</div><div class='ctx'> 	.min_packet_size = { 1023 },</div><div class='ctx'> 	.max_packet_size = { 1023 },</div><div class='ctx'> 	.init = vv6410_init,</div><div class='add'>+	.init_controls = vv6410_init_controls,</div><div class='ctx'> 	.probe = vv6410_probe,</div><div class='ctx'> 	.start = vv6410_start,</div><div class='ctx'> 	.stop = vv6410_stop,</div><div class='ctx'> 	.dump = vv6410_dump,</div><div class='del'>-	.disconnect = vv6410_disconnect,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* If NULL, only single value to write, stored in len */</div><div class='head'>diff --git a/drivers/media/video/gspca/topro.c b/drivers/media/video/gspca/topro.c<br/>index 444d3c5b9079..c6326d177a3d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/topro.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/topro.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/topro.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/topro.c</a></div><div class='hunk'>@@ -4675,11 +4675,9 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> /* -- do autogain -- */</div><div class='ctx'> /* gain setting is done in setexposure() for tp6810 */</div><div class='ctx'> static void setgain(struct gspca_dev *gspca_dev) {}</div><div class='del'>-/* !! coarse_grained_expo_autogain is not used !! */</div><div class='del'>-#define exp_too_low_cnt bridge</div><div class='del'>-#define exp_too_high_cnt sensor</div><div class='del'>-</div><div class='add'>+#define WANT_REGULAR_AUTOGAIN</div><div class='ctx'> #include "autogain_functions.h"</div><div class='add'>+</div><div class='ctx'> static void sd_dq_callback(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='head'>diff --git a/drivers/media/video/gspca/vicam.c b/drivers/media/video/gspca/vicam.c<br/>index 911152e169d6..15a30f7a4b2a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/vicam.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/vicam.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/vicam.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/vicam.c</a></div><div class='hunk'>@@ -37,9 +37,12 @@</div><div class='ctx'> #include &lt;linux/ihex.h&gt;</div><div class='ctx'> #include "gspca.h"</div><div class='ctx'> </div><div class='add'>+#define VICAM_FIRMWARE "vicam/firmware.fw"</div><div class='add'>+</div><div class='ctx'> MODULE_AUTHOR("Hans de Goede &lt;hdegoede@redhat.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("GSPCA ViCam USB Camera Driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_FIRMWARE(VICAM_FIRMWARE);</div><div class='ctx'> </div><div class='ctx'> enum e_ctrl {</div><div class='ctx'> 	GAIN,</div><div class='hunk'>@@ -222,7 +225,11 @@ static void vicam_dostream(struct work_struct *work)</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	while (gspca_dev-&gt;present &amp;&amp; gspca_dev-&gt;streaming) {</div><div class='add'>+	while (gspca_dev-&gt;dev &amp;&amp; gspca_dev-&gt;streaming) {</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+		if (gspca_dev-&gt;frozen)</div><div class='add'>+			break;</div><div class='add'>+#endif</div><div class='ctx'> 		ret = vicam_read_frame(gspca_dev, buffer, frame_sz);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -268,7 +275,7 @@ static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	const struct firmware *uninitialized_var(fw);</div><div class='ctx'> 	u8 *firmware_buf;</div><div class='ctx'> </div><div class='del'>-	ret = request_ihex_firmware(&amp;fw, "vicam/firmware.fw",</div><div class='add'>+	ret = request_ihex_firmware(&amp;fw, VICAM_FIRMWARE,</div><div class='ctx'> 				    &amp;gspca_dev-&gt;dev-&gt;dev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		pr_err("Failed to load \"vicam/firmware.fw\": %d\n", ret);</div><div class='hunk'>@@ -324,7 +331,7 @@ static void sd_stop0(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	dev-&gt;work_thread = NULL;</div><div class='ctx'> 	mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> </div><div class='del'>-	if (gspca_dev-&gt;present)</div><div class='add'>+	if (gspca_dev-&gt;dev)</div><div class='ctx'> 		vicam_set_camera_power(gspca_dev, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/gspca/zc3xx.c b/drivers/media/video/gspca/zc3xx.c<br/>index 7d9a4f1be9dc..f0bacee33ef9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/gspca/zc3xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/gspca/zc3xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/gspca/zc3xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/gspca/zc3xx.c</a></div><div class='hunk'>@@ -32,29 +32,25 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> static int force_sensor = -1;</div><div class='ctx'> </div><div class='del'>-#define REG08_DEF 3		/* default JPEG compression (70%) */</div><div class='add'>+#define REG08_DEF 3		/* default JPEG compression (75%) */</div><div class='ctx'> #include "zc3xx-reg.h"</div><div class='ctx'> </div><div class='del'>-/* controls */</div><div class='del'>-enum e_ctrl {</div><div class='del'>-	BRIGHTNESS,</div><div class='del'>-	CONTRAST,</div><div class='del'>-	EXPOSURE,</div><div class='del'>-	GAMMA,</div><div class='del'>-	AUTOGAIN,</div><div class='del'>-	LIGHTFREQ,</div><div class='del'>-	SHARPNESS,</div><div class='del'>-	QUALITY,</div><div class='del'>-	NCTRLS		/* number of controls */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define AUTOGAIN_DEF 1</div><div class='del'>-</div><div class='ctx'> /* specific webcam descriptor */</div><div class='ctx'> struct sd {</div><div class='ctx'> 	struct gspca_dev gspca_dev;	/* !! must be the first item */</div><div class='ctx'> </div><div class='del'>-	struct gspca_ctrl ctrls[NCTRLS];</div><div class='add'>+	struct { /* gamma/brightness/contrast control cluster */</div><div class='add'>+		struct v4l2_ctrl *gamma;</div><div class='add'>+		struct v4l2_ctrl *brightness;</div><div class='add'>+		struct v4l2_ctrl *contrast;</div><div class='add'>+	};</div><div class='add'>+	struct { /* autogain/exposure control cluster */</div><div class='add'>+		struct v4l2_ctrl *autogain;</div><div class='add'>+		struct v4l2_ctrl *exposure;</div><div class='add'>+	};</div><div class='add'>+	struct v4l2_ctrl *plfreq;</div><div class='add'>+	struct v4l2_ctrl *sharpness;</div><div class='add'>+	struct v4l2_ctrl *jpegqual;</div><div class='ctx'> </div><div class='ctx'> 	struct work_struct work;</div><div class='ctx'> 	struct workqueue_struct *work_thread;</div><div class='hunk'>@@ -94,114 +90,6 @@ enum sensors {</div><div class='ctx'> 	SENSOR_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* V4L2 controls supported by the driver */</div><div class='del'>-static void setcontrast(struct gspca_dev *gspca_dev);</div><div class='del'>-static void setexposure(struct gspca_dev *gspca_dev);</div><div class='del'>-static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-static void setlightfreq(struct gspca_dev *gspca_dev);</div><div class='del'>-static void setsharpness(struct gspca_dev *gspca_dev);</div><div class='del'>-static int sd_setquality(struct gspca_dev *gspca_dev, __s32 val);</div><div class='del'>-</div><div class='del'>-static const struct ctrl sd_ctrls[NCTRLS] = {</div><div class='del'>-[BRIGHTNESS] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_BRIGHTNESS,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Brightness",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 255,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 128,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = setcontrast</div><div class='del'>-	},</div><div class='del'>-[CONTRAST] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_CONTRAST,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Contrast",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 255,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 128,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = setcontrast</div><div class='del'>-	},</div><div class='del'>-[EXPOSURE] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_EXPOSURE,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Exposure",</div><div class='del'>-		.minimum = 0x30d,</div><div class='del'>-		.maximum	= 0x493e,</div><div class='del'>-		.step		= 1,</div><div class='del'>-		.default_value  = 0x927</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = setexposure</div><div class='del'>-	},</div><div class='del'>-[GAMMA] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_GAMMA,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Gamma",</div><div class='del'>-		.minimum = 1,</div><div class='del'>-		.maximum = 6,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 4,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = setcontrast</div><div class='del'>-	},</div><div class='del'>-[AUTOGAIN] = {</div><div class='del'>-	    {</div><div class='del'>-		.id      = V4L2_CID_AUTOGAIN,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_BOOLEAN,</div><div class='del'>-		.name    = "Auto Gain",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 1,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = AUTOGAIN_DEF,</div><div class='del'>-		.flags   = V4L2_CTRL_FLAG_UPDATE</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setautogain</div><div class='del'>-	},</div><div class='del'>-[LIGHTFREQ] = {</div><div class='del'>-	    {</div><div class='del'>-		.id	 = V4L2_CID_POWER_LINE_FREQUENCY,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_MENU,</div><div class='del'>-		.name    = "Light frequency filter",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 2,	/* 0: 0, 1: 50Hz, 2:60Hz */</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 0,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = setlightfreq</div><div class='del'>-	},</div><div class='del'>-[SHARPNESS] = {</div><div class='del'>-	    {</div><div class='del'>-		.id	 = V4L2_CID_SHARPNESS,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Sharpness",</div><div class='del'>-		.minimum = 0,</div><div class='del'>-		.maximum = 3,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 2,</div><div class='del'>-	    },</div><div class='del'>-	    .set_control = setsharpness</div><div class='del'>-	},</div><div class='del'>-[QUALITY] = {</div><div class='del'>-	    {</div><div class='del'>-		.id	 = V4L2_CID_JPEG_COMPRESSION_QUALITY,</div><div class='del'>-		.type    = V4L2_CTRL_TYPE_INTEGER,</div><div class='del'>-		.name    = "Compression Quality",</div><div class='del'>-		.minimum = 40,</div><div class='del'>-		.maximum = 70,</div><div class='del'>-		.step    = 1,</div><div class='del'>-		.default_value = 70	/* updated in sd_init() */</div><div class='del'>-	    },</div><div class='del'>-	    .set = sd_setquality</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct v4l2_pix_format vga_mode[] = {</div><div class='ctx'> 	{320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,</div><div class='ctx'> 		.bytesperline = 320,</div><div class='hunk'>@@ -241,8 +129,11 @@ static const struct v4l2_pix_format sif_mode[] = {</div><div class='ctx'> 		.priv = 0},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* bridge reg08 -&gt; JPEG quality conversion table */</div><div class='del'>-static u8 jpeg_qual[] = {40, 50, 60, 70, /*80*/};</div><div class='add'>+/*</div><div class='add'>+ * Bridge reg08 bits 1-2 -&gt; JPEG quality conversion table. Note the highest</div><div class='add'>+ * quality setting is not usable as USB 1 does not have enough bandwidth.</div><div class='add'>+ */</div><div class='add'>+static u8 jpeg_qual[] = {50, 75, 87, /* 94 */};</div><div class='ctx'> </div><div class='ctx'> /* usb exchanges */</div><div class='ctx'> struct usb_action {</div><div class='hunk'>@@ -5818,10 +5709,8 @@ static void setmatrix(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		reg_w(gspca_dev, matrix[i], 0x010a + i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setsharpness(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setsharpness(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	int sharpness;</div><div class='ctx'> 	static const u8 sharpness_tb[][2] = {</div><div class='ctx'> 		{0x02, 0x03},</div><div class='ctx'> 		{0x04, 0x07},</div><div class='hunk'>@@ -5829,19 +5718,18 @@ static void setsharpness(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		{0x10, 0x1e}</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	sharpness = sd-&gt;ctrls[SHARPNESS].val;</div><div class='del'>-	reg_w(gspca_dev, sharpness_tb[sharpness][0], 0x01c6);</div><div class='add'>+	reg_w(gspca_dev, sharpness_tb[val][0], 0x01c6);</div><div class='ctx'> 	reg_r(gspca_dev, 0x01c8);</div><div class='ctx'> 	reg_r(gspca_dev, 0x01c9);</div><div class='ctx'> 	reg_r(gspca_dev, 0x01ca);</div><div class='del'>-	reg_w(gspca_dev, sharpness_tb[sharpness][1], 0x01cb);</div><div class='add'>+	reg_w(gspca_dev, sharpness_tb[val][1], 0x01cb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setcontrast(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setcontrast(struct gspca_dev *gspca_dev,</div><div class='add'>+		s32 gamma, s32 brightness, s32 contrast)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> 	const u8 *Tgamma;</div><div class='del'>-	int g, i, brightness, contrast, adj, gp1, gp2;</div><div class='add'>+	int g, i, adj, gp1, gp2;</div><div class='ctx'> 	u8 gr[16];</div><div class='ctx'> 	static const u8 delta_b[16] =		/* delta for brightness */</div><div class='ctx'> 		{0x50, 0x38, 0x2d, 0x28, 0x24, 0x21, 0x1e, 0x1d,</div><div class='hunk'>@@ -5864,10 +5752,10 @@ static void setcontrast(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		 0xe0, 0xeb, 0xf4, 0xff, 0xff, 0xff, 0xff, 0xff},</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	Tgamma = gamma_tb[sd-&gt;ctrls[GAMMA].val - 1];</div><div class='add'>+	Tgamma = gamma_tb[gamma - 1];</div><div class='ctx'> </div><div class='del'>-	contrast = ((int) sd-&gt;ctrls[CONTRAST].val - 128); /* -128 / 127 */</div><div class='del'>-	brightness = ((int) sd-&gt;ctrls[BRIGHTNESS].val - 128); /* -128 / 92 */</div><div class='add'>+	contrast -= 128; /* -128 / 127 */</div><div class='add'>+	brightness -= 128; /* -128 / 92 */</div><div class='ctx'> 	adj = 0;</div><div class='ctx'> 	gp1 = gp2 = 0;</div><div class='ctx'> 	for (i = 0; i &lt; 16; i++) {</div><div class='hunk'>@@ -5894,25 +5782,15 @@ static void setcontrast(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		reg_w(gspca_dev, gr[i], 0x0130 + i);	/* gradient */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void getexposure(struct gspca_dev *gspca_dev)</div><div class='add'>+static s32 getexposure(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	if (sd-&gt;sensor != SENSOR_HV7131R)</div><div class='del'>-		return;</div><div class='del'>-	sd-&gt;ctrls[EXPOSURE].val = (i2c_read(gspca_dev, 0x25) &lt;&lt; 9)</div><div class='add'>+	return (i2c_read(gspca_dev, 0x25) &lt;&lt; 9)</div><div class='ctx'> 		| (i2c_read(gspca_dev, 0x26) &lt;&lt; 1)</div><div class='ctx'> 		| (i2c_read(gspca_dev, 0x27) &gt;&gt; 7);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setexposure(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setexposure(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='del'>-	if (sd-&gt;sensor != SENSOR_HV7131R)</div><div class='del'>-		return;</div><div class='del'>-	val = sd-&gt;ctrls[EXPOSURE].val;</div><div class='ctx'> 	i2c_write(gspca_dev, 0x25, val &gt;&gt; 9, 0x00);</div><div class='ctx'> 	i2c_write(gspca_dev, 0x26, val &gt;&gt; 1, 0x00);</div><div class='ctx'> 	i2c_write(gspca_dev, 0x27, val &lt;&lt; 7, 0x00);</div><div class='hunk'>@@ -5921,20 +5799,8 @@ static void setexposure(struct gspca_dev *gspca_dev)</div><div class='ctx'> static void setquality(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	s8 reg07;</div><div class='del'>-</div><div class='del'>-	reg07 = 0;</div><div class='del'>-	switch (sd-&gt;sensor) {</div><div class='del'>-	case SENSOR_OV7620:</div><div class='del'>-		reg07 = 0x30;</div><div class='del'>-		break;</div><div class='del'>-	case SENSOR_HV7131R:</div><div class='del'>-	case SENSOR_PAS202B:</div><div class='del'>-		return;			/* done by work queue */</div><div class='del'>-	}</div><div class='add'>+	jpeg_set_qual(sd-&gt;jpeg_hdr, jpeg_qual[sd-&gt;reg08 &gt;&gt; 1]);</div><div class='ctx'> 	reg_w(gspca_dev, sd-&gt;reg08, ZC3XX_R008_CLOCKSETTING);</div><div class='del'>-	if (reg07 != 0)</div><div class='del'>-		reg_w(gspca_dev, reg07, 0x0007);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Matches the sensor's internal frame rate to the lighting frequency.</div><div class='hunk'>@@ -5943,7 +5809,7 @@ static void setquality(struct gspca_dev *gspca_dev)</div><div class='ctx'>  *	60Hz, for American lighting</div><div class='ctx'>  *	0 = No Fliker (for outdoore usage)</div><div class='ctx'>  */</div><div class='del'>-static void setlightfreq(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setlightfreq(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> 	int i, mode;</div><div class='hunk'>@@ -6027,7 +5893,7 @@ static void setlightfreq(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		 tas5130c_60HZ, tas5130c_60HZScale},</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	i = sd-&gt;ctrls[LIGHTFREQ].val * 2;</div><div class='add'>+	i = val * 2;</div><div class='ctx'> 	mode = gspca_dev-&gt;cam.cam_mode[gspca_dev-&gt;curr_mode].priv;</div><div class='ctx'> 	if (mode)</div><div class='ctx'> 		i++;			/* 320x240 */</div><div class='hunk'>@@ -6037,14 +5903,14 @@ static void setlightfreq(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	usb_exchange(gspca_dev, zc3_freq);</div><div class='ctx'> 	switch (sd-&gt;sensor) {</div><div class='ctx'> 	case SENSOR_GC0305:</div><div class='del'>-		if (mode				/* if 320x240 */</div><div class='del'>-		    &amp;&amp; sd-&gt;ctrls[LIGHTFREQ].val == 1)	/* and 50Hz */</div><div class='add'>+		if (mode		/* if 320x240 */</div><div class='add'>+		    &amp;&amp; val == 1)	/* and 50Hz */</div><div class='ctx'> 			reg_w(gspca_dev, 0x85, 0x018d);</div><div class='ctx'> 					/* win: 0x80, 0x018d */</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SENSOR_OV7620:</div><div class='del'>-		if (!mode) {				/* if 640x480 */</div><div class='del'>-			if (sd-&gt;ctrls[LIGHTFREQ].val != 0) /* and filter */</div><div class='add'>+		if (!mode) {		/* if 640x480 */</div><div class='add'>+			if (val != 0)	/* and filter */</div><div class='ctx'> 				reg_w(gspca_dev, 0x40, 0x0002);</div><div class='ctx'> 			else</div><div class='ctx'> 				reg_w(gspca_dev, 0x44, 0x0002);</div><div class='hunk'>@@ -6056,22 +5922,15 @@ static void setlightfreq(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setautogain(struct gspca_dev *gspca_dev)</div><div class='add'>+static void setautogain(struct gspca_dev *gspca_dev, s32 val)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	u8 autoval;</div><div class='del'>-</div><div class='del'>-	if (sd-&gt;ctrls[AUTOGAIN].val)</div><div class='del'>-		autoval = 0x42;</div><div class='del'>-	else</div><div class='del'>-		autoval = 0x02;</div><div class='del'>-	reg_w(gspca_dev, autoval, 0x0180);</div><div class='add'>+	reg_w(gspca_dev, val ? 0x42 : 0x02, 0x0180);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* update the transfer parameters */</div><div class='del'>-/* This function is executed from a work queue. */</div><div class='del'>-/* The exact use of the bridge registers 07 and 08 is not known.</div><div class='del'>- * The following algorithm has been adapted from ms-win traces */</div><div class='add'>+/*</div><div class='add'>+ * Update the transfer parameters.</div><div class='add'>+ * This function is executed from a work queue.</div><div class='add'>+ */</div><div class='ctx'> static void transfer_update(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = container_of(work, struct sd, work);</div><div class='hunk'>@@ -6079,96 +5938,55 @@ static void transfer_update(struct work_struct *work)</div><div class='ctx'> 	int change, good;</div><div class='ctx'> 	u8 reg07, reg11;</div><div class='ctx'> </div><div class='del'>-	/* synchronize with the main driver and initialize the registers */</div><div class='del'>-	mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-	reg07 = 0;					/* max */</div><div class='del'>-	reg_w(gspca_dev, reg07, 0x0007);</div><div class='del'>-	reg_w(gspca_dev, sd-&gt;reg08, ZC3XX_R008_CLOCKSETTING);</div><div class='del'>-	mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='add'>+	/* reg07 gets set to 0 by sd_start before starting us */</div><div class='add'>+	reg07 = 0;</div><div class='ctx'> </div><div class='ctx'> 	good = 0;</div><div class='ctx'> 	for (;;) {</div><div class='ctx'> 		msleep(100);</div><div class='ctx'> </div><div class='del'>-		/* get the transfer status */</div><div class='del'>-		/* the bit 0 of the bridge register 11 indicates overflow */</div><div class='ctx'> 		mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='del'>-		if (!gspca_dev-&gt;present || !gspca_dev-&gt;streaming)</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+		if (gspca_dev-&gt;frozen)</div><div class='ctx'> 			goto err;</div><div class='add'>+#endif</div><div class='add'>+		if (!gspca_dev-&gt;dev || !gspca_dev-&gt;streaming)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		/* Bit 0 of register 11 indicates FIFO overflow */</div><div class='add'>+		gspca_dev-&gt;usb_err = 0;</div><div class='ctx'> 		reg11 = reg_r(gspca_dev, 0x0011);</div><div class='del'>-		if (gspca_dev-&gt;usb_err &lt; 0</div><div class='del'>-		 || !gspca_dev-&gt;present || !gspca_dev-&gt;streaming)</div><div class='add'>+		if (gspca_dev-&gt;usb_err)</div><div class='ctx'> 			goto err;</div><div class='ctx'> </div><div class='ctx'> 		change = reg11 &amp; 0x01;</div><div class='ctx'> 		if (change) {				/* overflow */</div><div class='del'>-			switch (reg07) {</div><div class='del'>-			case 0:				/* max */</div><div class='del'>-				reg07 = sd-&gt;sensor == SENSOR_HV7131R</div><div class='del'>-						? 0x30 : 0x32;</div><div class='del'>-				if (sd-&gt;reg08 != 0) {</div><div class='del'>-					change = 3;</div><div class='del'>-					sd-&gt;reg08--;</div><div class='del'>-				}</div><div class='del'>-				break;</div><div class='del'>-			case 0x32:</div><div class='del'>-				reg07 -= 4;</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				reg07 -= 2;</div><div class='del'>-				break;</div><div class='del'>-			case 2:</div><div class='del'>-				change = 0;		/* already min */</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='ctx'> 			good = 0;</div><div class='add'>+</div><div class='add'>+			if (reg07 == 0) /* Bit Rate Control not enabled? */</div><div class='add'>+				reg07 = 0x32; /* Allow 98 bytes / unit */</div><div class='add'>+			else if (reg07 &gt; 2)</div><div class='add'>+				reg07 -= 2; /* Decrease allowed bytes / unit */</div><div class='add'>+			else</div><div class='add'>+				change = 0;</div><div class='ctx'> 		} else {				/* no overflow */</div><div class='del'>-			if (reg07 != 0) {		/* if not max */</div><div class='del'>-				good++;</div><div class='del'>-				if (good &gt;= 10) {</div><div class='del'>-					good = 0;</div><div class='add'>+			good++;</div><div class='add'>+			if (good &gt;= 10) {</div><div class='add'>+				good = 0;</div><div class='add'>+				if (reg07) { /* BRC enabled? */</div><div class='ctx'> 					change = 1;</div><div class='del'>-					reg07 += 2;</div><div class='del'>-					switch (reg07) {</div><div class='del'>-					case 0x30:</div><div class='del'>-						if (sd-&gt;sensor == SENSOR_PAS202B)</div><div class='del'>-							reg07 += 2;</div><div class='del'>-						break;</div><div class='del'>-					case 0x32:</div><div class='del'>-					case 0x34:</div><div class='add'>+					if (reg07 &lt; 0x32)</div><div class='add'>+						reg07 += 2;</div><div class='add'>+					else</div><div class='ctx'> 						reg07 = 0;</div><div class='del'>-						break;</div><div class='del'>-					}</div><div class='del'>-				}</div><div class='del'>-			} else {			/* reg07 max */</div><div class='del'>-				if (sd-&gt;reg08 &lt; sizeof jpeg_qual - 1) {</div><div class='del'>-					good++;</div><div class='del'>-					if (good &gt; 10) {</div><div class='del'>-						sd-&gt;reg08++;</div><div class='del'>-						change = 2;</div><div class='del'>-					}</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		if (change) {</div><div class='del'>-			if (change &amp; 1) {</div><div class='del'>-				reg_w(gspca_dev, reg07, 0x0007);</div><div class='del'>-				if (gspca_dev-&gt;usb_err &lt; 0</div><div class='del'>-				 || !gspca_dev-&gt;present</div><div class='del'>-				 || !gspca_dev-&gt;streaming)</div><div class='del'>-					goto err;</div><div class='del'>-			}</div><div class='del'>-			if (change &amp; 2) {</div><div class='del'>-				reg_w(gspca_dev, sd-&gt;reg08,</div><div class='del'>-						ZC3XX_R008_CLOCKSETTING);</div><div class='del'>-				if (gspca_dev-&gt;usb_err &lt; 0</div><div class='del'>-				 || !gspca_dev-&gt;present</div><div class='del'>-				 || !gspca_dev-&gt;streaming)</div><div class='del'>-					goto err;</div><div class='del'>-				sd-&gt;ctrls[QUALITY].val = jpeg_qual[sd-&gt;reg08];</div><div class='del'>-				jpeg_set_qual(sd-&gt;jpeg_hdr,</div><div class='del'>-						jpeg_qual[sd-&gt;reg08]);</div><div class='del'>-			}</div><div class='add'>+			gspca_dev-&gt;usb_err = 0;</div><div class='add'>+			reg_w(gspca_dev, reg07, 0x0007);</div><div class='add'>+			if (gspca_dev-&gt;usb_err)</div><div class='add'>+				goto err;</div><div class='ctx'> 		}</div><div class='ctx'> 		mutex_unlock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6503,7 +6321,6 @@ static int sd_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	/* define some sensors from the vendor/product */</div><div class='ctx'> 	sd-&gt;sensor = id-&gt;driver_info;</div><div class='ctx'> </div><div class='del'>-	gspca_dev-&gt;cam.ctrls = sd-&gt;ctrls;</div><div class='ctx'> 	sd-&gt;reg08 = REG08_DEF;</div><div class='ctx'> </div><div class='ctx'> 	INIT_WORK(&amp;sd-&gt;work, transfer_update);</div><div class='hunk'>@@ -6511,12 +6328,87 @@ static int sd_config(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* this function is called at probe and resume time */</div><div class='del'>-static int sd_init(struct gspca_dev *gspca_dev)</div><div class='add'>+static int zcxx_g_volatile_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	struct cam *cam;</div><div class='del'>-	int sensor;</div><div class='add'>+	struct gspca_dev *gspca_dev =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct gspca_dev, ctrl_handler);</div><div class='add'>+	struct sd *sd = (struct sd *)gspca_dev;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_AUTOGAIN:</div><div class='add'>+		gspca_dev-&gt;usb_err = 0;</div><div class='add'>+		if (ctrl-&gt;val &amp;&amp; sd-&gt;exposure &amp;&amp; gspca_dev-&gt;streaming)</div><div class='add'>+			sd-&gt;exposure-&gt;val = getexposure(gspca_dev);</div><div class='add'>+		return gspca_dev-&gt;usb_err;</div><div class='add'>+	}</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zcxx_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct gspca_dev *gspca_dev =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct gspca_dev, ctrl_handler);</div><div class='add'>+	struct sd *sd = (struct sd *)gspca_dev;</div><div class='add'>+	int i, qual;</div><div class='add'>+</div><div class='add'>+	gspca_dev-&gt;usb_err = 0;</div><div class='add'>+</div><div class='add'>+	if (ctrl-&gt;id == V4L2_CID_JPEG_COMPRESSION_QUALITY) {</div><div class='add'>+		qual = sd-&gt;reg08 &gt;&gt; 1;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(jpeg_qual); i++) {</div><div class='add'>+			if (ctrl-&gt;val &lt;= jpeg_qual[i])</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+		if (i &gt; 0 &amp;&amp; i == qual &amp;&amp; ctrl-&gt;val &lt; jpeg_qual[i])</div><div class='add'>+			i--;</div><div class='add'>+</div><div class='add'>+		/* With high quality settings we need max bandwidth */</div><div class='add'>+		if (i &gt;= 2 &amp;&amp; gspca_dev-&gt;streaming &amp;&amp;</div><div class='add'>+		    !gspca_dev-&gt;cam.needs_full_bandwidth)</div><div class='add'>+			return -EBUSY;</div><div class='add'>+</div><div class='add'>+		sd-&gt;reg08 = (i &lt;&lt; 1) | 1;</div><div class='add'>+		ctrl-&gt;val = jpeg_qual[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!gspca_dev-&gt;streaming)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	/* gamma/brightness/contrast cluster */</div><div class='add'>+	case V4L2_CID_GAMMA:</div><div class='add'>+		setcontrast(gspca_dev, sd-&gt;gamma-&gt;val,</div><div class='add'>+				sd-&gt;brightness-&gt;val, sd-&gt;contrast-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	/* autogain/exposure cluster */</div><div class='add'>+	case V4L2_CID_AUTOGAIN:</div><div class='add'>+		setautogain(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		if (!gspca_dev-&gt;usb_err &amp;&amp; !ctrl-&gt;val &amp;&amp; sd-&gt;exposure)</div><div class='add'>+			setexposure(gspca_dev, sd-&gt;exposure-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_POWER_LINE_FREQUENCY:</div><div class='add'>+		setlightfreq(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_SHARPNESS:</div><div class='add'>+		setsharpness(gspca_dev, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CID_JPEG_COMPRESSION_QUALITY:</div><div class='add'>+		setquality(gspca_dev);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return gspca_dev-&gt;usb_err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops zcxx_ctrl_ops = {</div><div class='add'>+	.g_volatile_ctrl = zcxx_g_volatile_ctrl,</div><div class='add'>+	.s_ctrl = zcxx_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int sd_init_controls(struct gspca_dev *gspca_dev)</div><div class='add'>+{</div><div class='add'>+	struct sd *sd = (struct sd *)gspca_dev;</div><div class='add'>+	struct v4l2_ctrl_handler *hdl = &amp;gspca_dev-&gt;ctrl_handler;</div><div class='ctx'> 	static const u8 gamma[SENSOR_MAX] = {</div><div class='ctx'> 		[SENSOR_ADCM2700] =	4,</div><div class='ctx'> 		[SENSOR_CS2102] =	4,</div><div class='hunk'>@@ -6538,6 +6430,48 @@ static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		[SENSOR_PO2030] =	4,</div><div class='ctx'> 		[SENSOR_TAS5130C] =	3,</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	gspca_dev-&gt;vdev.ctrl_handler = hdl;</div><div class='add'>+	v4l2_ctrl_handler_init(hdl, 8);</div><div class='add'>+	sd-&gt;brightness = v4l2_ctrl_new_std(hdl, &amp;zcxx_ctrl_ops,</div><div class='add'>+			V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);</div><div class='add'>+	sd-&gt;contrast = v4l2_ctrl_new_std(hdl, &amp;zcxx_ctrl_ops,</div><div class='add'>+			V4L2_CID_CONTRAST, 0, 255, 1, 128);</div><div class='add'>+	sd-&gt;gamma = v4l2_ctrl_new_std(hdl, &amp;zcxx_ctrl_ops,</div><div class='add'>+			V4L2_CID_GAMMA, 1, 6, 1, gamma[sd-&gt;sensor]);</div><div class='add'>+	if (sd-&gt;sensor == SENSOR_HV7131R)</div><div class='add'>+		sd-&gt;exposure = v4l2_ctrl_new_std(hdl, &amp;zcxx_ctrl_ops,</div><div class='add'>+			V4L2_CID_EXPOSURE, 0x30d, 0x493e, 1, 0x927);</div><div class='add'>+	sd-&gt;autogain = v4l2_ctrl_new_std(hdl, &amp;zcxx_ctrl_ops,</div><div class='add'>+			V4L2_CID_AUTOGAIN, 0, 1, 1, 1);</div><div class='add'>+	if (sd-&gt;sensor != SENSOR_OV7630C)</div><div class='add'>+		sd-&gt;plfreq = v4l2_ctrl_new_std_menu(hdl, &amp;zcxx_ctrl_ops,</div><div class='add'>+			V4L2_CID_POWER_LINE_FREQUENCY,</div><div class='add'>+			V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0,</div><div class='add'>+			V4L2_CID_POWER_LINE_FREQUENCY_DISABLED);</div><div class='add'>+	sd-&gt;sharpness = v4l2_ctrl_new_std(hdl, &amp;zcxx_ctrl_ops,</div><div class='add'>+			V4L2_CID_SHARPNESS, 0, 3, 1,</div><div class='add'>+			sd-&gt;sensor == SENSOR_PO2030 ? 0 : 2);</div><div class='add'>+	sd-&gt;jpegqual = v4l2_ctrl_new_std(hdl, &amp;zcxx_ctrl_ops,</div><div class='add'>+			V4L2_CID_JPEG_COMPRESSION_QUALITY,</div><div class='add'>+			jpeg_qual[0], jpeg_qual[ARRAY_SIZE(jpeg_qual) - 1], 1,</div><div class='add'>+			jpeg_qual[REG08_DEF &gt;&gt; 1]);</div><div class='add'>+	if (hdl-&gt;error) {</div><div class='add'>+		pr_err("Could not initialize controls\n");</div><div class='add'>+		return hdl-&gt;error;</div><div class='add'>+	}</div><div class='add'>+	v4l2_ctrl_cluster(3, &amp;sd-&gt;gamma);</div><div class='add'>+	if (sd-&gt;sensor == SENSOR_HV7131R)</div><div class='add'>+		v4l2_ctrl_auto_cluster(2, &amp;sd-&gt;autogain, 0, true);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* this function is called at probe and resume time */</div><div class='add'>+static int sd_init(struct gspca_dev *gspca_dev)</div><div class='add'>+{</div><div class='add'>+	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	struct cam *cam;</div><div class='add'>+	int sensor;</div><div class='ctx'> 	static const u8 mode_tb[SENSOR_MAX] = {</div><div class='ctx'> 		[SENSOR_ADCM2700] =	2,</div><div class='ctx'> 		[SENSOR_CS2102] =	1,</div><div class='hunk'>@@ -6559,27 +6493,6 @@ static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		[SENSOR_PO2030] =	1,</div><div class='ctx'> 		[SENSOR_TAS5130C] =	1,</div><div class='ctx'> 	};</div><div class='del'>-	static const u8 reg08_tb[SENSOR_MAX] = {</div><div class='del'>-		[SENSOR_ADCM2700] =	1,</div><div class='del'>-		[SENSOR_CS2102] =	3,</div><div class='del'>-		[SENSOR_CS2102K] =	3,</div><div class='del'>-		[SENSOR_GC0303] =	2,</div><div class='del'>-		[SENSOR_GC0305] =	3,</div><div class='del'>-		[SENSOR_HDCS2020] =	1,</div><div class='del'>-		[SENSOR_HV7131B] =	3,</div><div class='del'>-		[SENSOR_HV7131R] =	3,</div><div class='del'>-		[SENSOR_ICM105A] =	3,</div><div class='del'>-		[SENSOR_MC501CB] =	3,</div><div class='del'>-		[SENSOR_MT9V111_1] =	3,</div><div class='del'>-		[SENSOR_MT9V111_3] =	3,</div><div class='del'>-		[SENSOR_OV7620] =	1,</div><div class='del'>-		[SENSOR_OV7630C] =	3,</div><div class='del'>-		[SENSOR_PAS106] =	3,</div><div class='del'>-		[SENSOR_PAS202B] =	3,</div><div class='del'>-		[SENSOR_PB0330] =	3,</div><div class='del'>-		[SENSOR_PO2030] =	2,</div><div class='del'>-		[SENSOR_TAS5130C] =	3,</div><div class='del'>-	};</div><div class='ctx'> </div><div class='ctx'> 	sensor = zcxx_probeSensor(gspca_dev);</div><div class='ctx'> 	if (sensor &gt;= 0)</div><div class='hunk'>@@ -6688,7 +6601,6 @@ static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		case 0x2030:</div><div class='ctx'> 			PDEBUG(D_PROBE, "Find Sensor PO2030");</div><div class='ctx'> 			sd-&gt;sensor = SENSOR_PO2030;</div><div class='del'>-			sd-&gt;ctrls[SHARPNESS].def = 0;	/* from win traces */</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 0x7620:</div><div class='ctx'> 			PDEBUG(D_PROBE, "Find Sensor OV7620");</div><div class='hunk'>@@ -6730,36 +6642,18 @@ static int sd_init(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sd-&gt;ctrls[GAMMA].def = gamma[sd-&gt;sensor];</div><div class='del'>-	sd-&gt;reg08 = reg08_tb[sd-&gt;sensor];</div><div class='del'>-	sd-&gt;ctrls[QUALITY].def = jpeg_qual[sd-&gt;reg08];</div><div class='del'>-	sd-&gt;ctrls[QUALITY].min = jpeg_qual[0];</div><div class='del'>-	sd-&gt;ctrls[QUALITY].max = jpeg_qual[ARRAY_SIZE(jpeg_qual) - 1];</div><div class='del'>-</div><div class='del'>-	switch (sd-&gt;sensor) {</div><div class='del'>-	case SENSOR_HV7131R:</div><div class='del'>-		gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; QUALITY);</div><div class='del'>-		break;</div><div class='del'>-	case SENSOR_OV7630C:</div><div class='del'>-		gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; LIGHTFREQ) | (1 &lt;&lt; EXPOSURE);</div><div class='del'>-		break;</div><div class='del'>-	case SENSOR_PAS202B:</div><div class='del'>-		gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; QUALITY) | (1 &lt;&lt; EXPOSURE);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		gspca_dev-&gt;ctrl_dis = (1 &lt;&lt; EXPOSURE);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-#if AUTOGAIN_DEF</div><div class='del'>-	if (sd-&gt;ctrls[AUTOGAIN].val)</div><div class='del'>-		gspca_dev-&gt;ctrl_inac = (1 &lt;&lt; EXPOSURE);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	/* switch off the led */</div><div class='ctx'> 	reg_w(gspca_dev, 0x01, 0x0000);</div><div class='ctx'> 	return gspca_dev-&gt;usb_err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int sd_pre_start(struct gspca_dev *gspca_dev)</div><div class='add'>+{</div><div class='add'>+	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	gspca_dev-&gt;cam.needs_full_bandwidth = (sd-&gt;reg08 &gt;= 4) ? 1 : 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='hunk'>@@ -6864,7 +6758,7 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		reg_w(gspca_dev, 0x03, 0x0008);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	setsharpness(gspca_dev);</div><div class='add'>+	setsharpness(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;sharpness));</div><div class='ctx'> </div><div class='ctx'> 	/* set the gamma tables when not set */</div><div class='ctx'> 	switch (sd-&gt;sensor) {</div><div class='hunk'>@@ -6873,7 +6767,9 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 	case SENSOR_OV7630C:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		setcontrast(gspca_dev);</div><div class='add'>+		setcontrast(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;gamma),</div><div class='add'>+				v4l2_ctrl_g_ctrl(sd-&gt;brightness),</div><div class='add'>+				v4l2_ctrl_g_ctrl(sd-&gt;contrast));</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	setmatrix(gspca_dev);			/* one more time? */</div><div class='hunk'>@@ -6885,8 +6781,10 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	setquality(gspca_dev);</div><div class='del'>-	jpeg_set_qual(sd-&gt;jpeg_hdr, jpeg_qual[sd-&gt;reg08]);</div><div class='del'>-	setlightfreq(gspca_dev);</div><div class='add'>+	/* Start with BRC disabled, transfer_update will enable it if needed */</div><div class='add'>+	reg_w(gspca_dev, 0x00, 0x0007);</div><div class='add'>+	if (sd-&gt;plfreq)</div><div class='add'>+		setlightfreq(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;plfreq));</div><div class='ctx'> </div><div class='ctx'> 	switch (sd-&gt;sensor) {</div><div class='ctx'> 	case SENSOR_ADCM2700:</div><div class='hunk'>@@ -6897,7 +6795,7 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		reg_w(gspca_dev, 0x40, 0x0117);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SENSOR_HV7131R:</div><div class='del'>-		setexposure(gspca_dev);</div><div class='add'>+		setexposure(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;exposure));</div><div class='ctx'> 		reg_w(gspca_dev, 0x00, ZC3XX_R1A7_CALCGLOBALMEAN);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SENSOR_GC0305:</div><div class='hunk'>@@ -6921,21 +6819,16 @@ static int sd_start(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	setautogain(gspca_dev);</div><div class='add'>+	setautogain(gspca_dev, v4l2_ctrl_g_ctrl(sd-&gt;autogain));</div><div class='ctx'> </div><div class='del'>-	/* start the transfer update thread if needed */</div><div class='del'>-	if (gspca_dev-&gt;usb_err &gt;= 0) {</div><div class='del'>-		switch (sd-&gt;sensor) {</div><div class='del'>-		case SENSOR_HV7131R:</div><div class='del'>-		case SENSOR_PAS202B:</div><div class='del'>-			sd-&gt;work_thread =</div><div class='del'>-				create_singlethread_workqueue(KBUILD_MODNAME);</div><div class='del'>-			queue_work(sd-&gt;work_thread, &amp;sd-&gt;work);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (gspca_dev-&gt;usb_err &lt; 0)</div><div class='add'>+		return gspca_dev-&gt;usb_err;</div><div class='ctx'> </div><div class='del'>-	return gspca_dev-&gt;usb_err;</div><div class='add'>+	/* Start the transfer parameters update thread */</div><div class='add'>+	sd-&gt;work_thread = create_singlethread_workqueue(KBUILD_MODNAME);</div><div class='add'>+	queue_work(sd-&gt;work_thread, &amp;sd-&gt;work);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* called on streamoff with alt 0 and on disconnect */</div><div class='hunk'>@@ -6949,7 +6842,7 @@ static void sd_stop0(struct gspca_dev *gspca_dev)</div><div class='ctx'> 		mutex_lock(&amp;gspca_dev-&gt;usb_lock);</div><div class='ctx'> 		sd-&gt;work_thread = NULL;</div><div class='ctx'> 	}</div><div class='del'>-	if (!gspca_dev-&gt;present)</div><div class='add'>+	if (!gspca_dev-&gt;dev)</div><div class='ctx'> 		return;</div><div class='ctx'> 	send_unknown(gspca_dev, sd-&gt;sensor);</div><div class='ctx'> }</div><div class='hunk'>@@ -6987,72 +6880,17 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-</div><div class='del'>-	sd-&gt;ctrls[AUTOGAIN].val = val;</div><div class='del'>-	if (val) {</div><div class='del'>-		gspca_dev-&gt;ctrl_inac |= (1 &lt;&lt; EXPOSURE);</div><div class='del'>-	} else {</div><div class='del'>-		gspca_dev-&gt;ctrl_inac &amp;= ~(1 &lt;&lt; EXPOSURE);</div><div class='del'>-		if (gspca_dev-&gt;streaming)</div><div class='del'>-			getexposure(gspca_dev);</div><div class='del'>-	}</div><div class='del'>-	if (gspca_dev-&gt;streaming)</div><div class='del'>-		setautogain(gspca_dev);</div><div class='del'>-	return gspca_dev-&gt;usb_err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_querymenu(struct gspca_dev *gspca_dev,</div><div class='del'>-			struct v4l2_querymenu *menu)</div><div class='del'>-{</div><div class='del'>-	switch (menu-&gt;id) {</div><div class='del'>-	case V4L2_CID_POWER_LINE_FREQUENCY:</div><div class='del'>-		switch (menu-&gt;index) {</div><div class='del'>-		case 0:		/* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */</div><div class='del'>-			strcpy((char *) menu-&gt;name, "NoFliker");</div><div class='del'>-			return 0;</div><div class='del'>-		case 1:		/* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */</div><div class='del'>-			strcpy((char *) menu-&gt;name, "50 Hz");</div><div class='del'>-			return 0;</div><div class='del'>-		case 2:		/* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */</div><div class='del'>-			strcpy((char *) menu-&gt;name, "60 Hz");</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sd_setquality(struct gspca_dev *gspca_dev, __s32 val)</div><div class='del'>-{</div><div class='del'>-	struct sd *sd = (struct sd *) gspca_dev;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(jpeg_qual) - 1; i++) {</div><div class='del'>-		if (val &lt;= jpeg_qual[i])</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	if (i &gt; 0</div><div class='del'>-	 &amp;&amp; i == sd-&gt;reg08</div><div class='del'>-	 &amp;&amp; val &lt; jpeg_qual[sd-&gt;reg08])</div><div class='del'>-		i--;</div><div class='del'>-	sd-&gt;reg08 = i;</div><div class='del'>-	sd-&gt;ctrls[QUALITY].val = jpeg_qual[i];</div><div class='del'>-	if (gspca_dev-&gt;streaming)</div><div class='del'>-		jpeg_set_qual(sd-&gt;jpeg_hdr, sd-&gt;ctrls[QUALITY].val);</div><div class='del'>-	return gspca_dev-&gt;usb_err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int sd_set_jcomp(struct gspca_dev *gspca_dev,</div><div class='ctx'> 			struct v4l2_jpegcompression *jcomp)</div><div class='ctx'> {</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	sd_setquality(gspca_dev, jcomp-&gt;quality);</div><div class='del'>-	jcomp-&gt;quality = sd-&gt;ctrls[QUALITY].val;</div><div class='del'>-	return gspca_dev-&gt;usb_err;</div><div class='add'>+	ret = v4l2_ctrl_s_ctrl(sd-&gt;jpegqual, jcomp-&gt;quality);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	jcomp-&gt;quality = v4l2_ctrl_g_ctrl(sd-&gt;jpegqual);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sd_get_jcomp(struct gspca_dev *gspca_dev,</div><div class='hunk'>@@ -7061,7 +6899,7 @@ static int sd_get_jcomp(struct gspca_dev *gspca_dev,</div><div class='ctx'> 	struct sd *sd = (struct sd *) gspca_dev;</div><div class='ctx'> </div><div class='ctx'> 	memset(jcomp, 0, sizeof *jcomp);</div><div class='del'>-	jcomp-&gt;quality = sd-&gt;ctrls[QUALITY].val;</div><div class='add'>+	jcomp-&gt;quality = v4l2_ctrl_g_ctrl(sd-&gt;jpegqual);</div><div class='ctx'> 	jcomp-&gt;jpeg_markers = V4L2_JPEG_MARKER_DHT</div><div class='ctx'> 			| V4L2_JPEG_MARKER_DQT;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -7085,14 +6923,13 @@ static int sd_int_pkt_scan(struct gspca_dev *gspca_dev,</div><div class='ctx'> </div><div class='ctx'> static const struct sd_desc sd_desc = {</div><div class='ctx'> 	.name = KBUILD_MODNAME,</div><div class='del'>-	.ctrls = sd_ctrls,</div><div class='del'>-	.nctrls = ARRAY_SIZE(sd_ctrls),</div><div class='ctx'> 	.config = sd_config,</div><div class='ctx'> 	.init = sd_init,</div><div class='add'>+	.init_controls = sd_init_controls,</div><div class='add'>+	.isoc_init = sd_pre_start,</div><div class='ctx'> 	.start = sd_start,</div><div class='ctx'> 	.stop0 = sd_stop0,</div><div class='ctx'> 	.pkt_scan = sd_pkt_scan,</div><div class='del'>-	.querymenu = sd_querymenu,</div><div class='ctx'> 	.get_jcomp = sd_get_jcomp,</div><div class='ctx'> 	.set_jcomp = sd_set_jcomp,</div><div class='ctx'> #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)</div><div class='hunk'>@@ -7176,6 +7013,7 @@ static struct usb_driver sd_driver = {</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> 	.suspend = gspca_suspend,</div><div class='ctx'> 	.resume = gspca_resume,</div><div class='add'>+	.reset_resume = gspca_resume,</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/hdpvr/hdpvr-control.c b/drivers/media/video/hdpvr/hdpvr-control.c<br/>index 068df4ba3f51..ae8f229d1141 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/hdpvr/hdpvr-control.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/hdpvr/hdpvr-control.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/hdpvr/hdpvr-control.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/hdpvr/hdpvr-control.c</a></div><div class='hunk'>@@ -113,6 +113,8 @@ int get_input_lines_info(struct hdpvr_device *dev)</div><div class='ctx'> 			 "get input lines info returned: %d, %s\n", ret,</div><div class='ctx'> 			 print_buf);</div><div class='ctx'> 	}</div><div class='add'>+#else</div><div class='add'>+	(void)ret;	/* suppress compiler warning */</div><div class='ctx'> #endif</div><div class='ctx'> 	lines = dev-&gt;usbc_buf[1] &lt;&lt; 8 | dev-&gt;usbc_buf[0];</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;usbc_mutex);</div><div class='head'>diff --git a/drivers/media/video/hdpvr/hdpvr-core.c b/drivers/media/video/hdpvr/hdpvr-core.c<br/>index 6510110f53d0..304f43ef59eb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/hdpvr/hdpvr-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/hdpvr/hdpvr-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/hdpvr/hdpvr-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/hdpvr/hdpvr-core.c</a></div><div class='hunk'>@@ -303,7 +303,7 @@ static int hdpvr_probe(struct usb_interface *interface,</div><div class='ctx'> 	/* allocate memory for our device state and initialize it */</div><div class='ctx'> 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);</div><div class='ctx'> 	if (!dev) {</div><div class='del'>-		err("Out of memory");</div><div class='add'>+		dev_err(&amp;interface-&gt;dev, "Out of memory\n");</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -311,7 +311,7 @@ static int hdpvr_probe(struct usb_interface *interface,</div><div class='ctx'> </div><div class='ctx'> 	/* register v4l2_device early so it can be used for printks */</div><div class='ctx'> 	if (v4l2_device_register(&amp;interface-&gt;dev, &amp;dev-&gt;v4l2_dev)) {</div><div class='del'>-		err("v4l2_device_register failed");</div><div class='add'>+		dev_err(&amp;interface-&gt;dev, "v4l2_device_register failed\n");</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/hdpvr/hdpvr-video.c b/drivers/media/video/hdpvr/hdpvr-video.c<br/>index 11ffe9cc1780..0e9e156bb2aa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/hdpvr/hdpvr-video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/hdpvr/hdpvr-video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/hdpvr/hdpvr-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/hdpvr/hdpvr-video.c</a></div><div class='hunk'>@@ -994,7 +994,7 @@ static int hdpvr_try_ctrl(struct v4l2_ext_control *ctrl, int ac3)</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_try_ext_ctrls(struct file *file, void *priv,</div><div class='head'>diff --git a/drivers/media/video/hexium_gemini.c b/drivers/media/video/hexium_gemini.c<br/>index a62322d5c0d8..366434f5647e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/hexium_gemini.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/hexium_gemini.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/hexium_gemini.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/hexium_gemini.c</a></div><div class='hunk'>@@ -40,15 +40,15 @@ static int hexium_num;</div><div class='ctx'> </div><div class='ctx'> #define HEXIUM_INPUTS	9</div><div class='ctx'> static struct v4l2_input hexium_inputs[HEXIUM_INPUTS] = {</div><div class='del'>-	{ 0, "CVBS 1",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 1, "CVBS 2",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 2, "CVBS 3",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 3, "CVBS 4",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 4, "CVBS 5",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 5, "CVBS 6",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 6, "Y/C 1",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 7, "Y/C 2",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 8, "Y/C 3",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 0, "CVBS 1",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 1, "CVBS 2",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 2, "CVBS 3",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 3, "CVBS 4",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 4, "CVBS 5",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 5, "CVBS 6",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 6, "Y/C 1",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 7, "Y/C 2",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 8, "Y/C 3",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define HEXIUM_AUDIOS	0</div><div class='hunk'>@@ -59,11 +59,6 @@ struct hexium_data</div><div class='ctx'> 	u8 byte;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define HEXIUM_CONTROLS	1</div><div class='del'>-static struct v4l2_queryctrl hexium_controls[] = {</div><div class='del'>-	{ V4L2_CID_PRIVATE_BASE, V4L2_CTRL_TYPE_BOOLEAN, "B/W", 0, 1, 1, 0, 0 },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define HEXIUM_GEMINI_V_1_0		1</div><div class='ctx'> #define HEXIUM_GEMINI_DUAL_V_1_0	2</div><div class='ctx'> </div><div class='hunk'>@@ -76,7 +71,6 @@ struct hexium</div><div class='ctx'> </div><div class='ctx'> 	int 		cur_input;	/* current input */</div><div class='ctx'> 	v4l2_std_id 	cur_std;	/* current standard */</div><div class='del'>-	int		cur_bw;		/* current black/white status */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Samsung KS0127B decoder default registers */</div><div class='hunk'>@@ -119,18 +113,10 @@ static struct hexium_data hexium_pal[] = {</div><div class='ctx'> 	{ 0x01, 0x52 }, { 0x12, 0x64 }, { 0x2D, 0x2C }, { 0x2E, 0x9B }, { -1 , 0xFF }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct hexium_data hexium_pal_bw[] = {</div><div class='del'>-	{ 0x01, 0x52 },	{ 0x12, 0x64 },	{ 0x2D, 0x2C },	{ 0x2E, 0x9B },	{ -1 , 0xFF }</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct hexium_data hexium_ntsc[] = {</div><div class='ctx'> 	{ 0x01, 0x53 }, { 0x12, 0x04 }, { 0x2D, 0x23 }, { 0x2E, 0x81 }, { -1 , 0xFF }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct hexium_data hexium_ntsc_bw[] = {</div><div class='del'>-	{ 0x01, 0x53 }, { 0x12, 0x04 }, { 0x2D, 0x23 }, { 0x2E, 0x81 }, { -1 , 0xFF }</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct hexium_data hexium_secam[] = {</div><div class='ctx'> 	{ 0x01, 0x52 }, { 0x12, 0x64 }, { 0x2D, 0x2C }, { 0x2E, 0x9B }, { -1 , 0xFF }</div><div class='ctx'> };</div><div class='hunk'>@@ -264,93 +250,6 @@ static int vidioc_s_input(struct file *file, void *fh, unsigned int input)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* the saa7146 provides some controls (brightness, contrast, saturation)</div><div class='del'>-   which gets registered *after* this function. because of this we have</div><div class='del'>-   to return with a value != 0 even if the function succeeded.. */</div><div class='del'>-static int vidioc_queryctrl(struct file *file, void *fh, struct v4l2_queryctrl *qc)</div><div class='del'>-{</div><div class='del'>-	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = HEXIUM_CONTROLS - 1; i &gt;= 0; i--) {</div><div class='del'>-		if (hexium_controls[i].id == qc-&gt;id) {</div><div class='del'>-			*qc = hexium_controls[i];</div><div class='del'>-			DEB_D("VIDIOC_QUERYCTRL %d\n", qc-&gt;id);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return dev-&gt;ext_vv_data-&gt;core_ops-&gt;vidioc_queryctrl(file, fh, qc);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vidioc_g_ctrl(struct file *file, void *fh, struct v4l2_control *vc)</div><div class='del'>-{</div><div class='del'>-	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='del'>-	struct hexium *hexium = (struct hexium *) dev-&gt;ext_priv;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = HEXIUM_CONTROLS - 1; i &gt;= 0; i--) {</div><div class='del'>-		if (hexium_controls[i].id == vc-&gt;id)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i &lt; 0)</div><div class='del'>-		return dev-&gt;ext_vv_data-&gt;core_ops-&gt;vidioc_g_ctrl(file, fh, vc);</div><div class='del'>-</div><div class='del'>-	if (vc-&gt;id == V4L2_CID_PRIVATE_BASE) {</div><div class='del'>-		vc-&gt;value = hexium-&gt;cur_bw;</div><div class='del'>-		DEB_D("VIDIOC_G_CTRL BW:%d\n", vc-&gt;value);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vidioc_s_ctrl(struct file *file, void *fh, struct v4l2_control *vc)</div><div class='del'>-{</div><div class='del'>-	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='del'>-	struct hexium *hexium = (struct hexium *) dev-&gt;ext_priv;</div><div class='del'>-	int i = 0;</div><div class='del'>-</div><div class='del'>-	for (i = HEXIUM_CONTROLS - 1; i &gt;= 0; i--) {</div><div class='del'>-		if (hexium_controls[i].id == vc-&gt;id)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i &lt; 0)</div><div class='del'>-		return dev-&gt;ext_vv_data-&gt;core_ops-&gt;vidioc_s_ctrl(file, fh, vc);</div><div class='del'>-</div><div class='del'>-	if (vc-&gt;id == V4L2_CID_PRIVATE_BASE)</div><div class='del'>-		hexium-&gt;cur_bw = vc-&gt;value;</div><div class='del'>-</div><div class='del'>-	DEB_D("VIDIOC_S_CTRL BW:%d\n", hexium-&gt;cur_bw);</div><div class='del'>-</div><div class='del'>-	if (0 == hexium-&gt;cur_bw &amp;&amp; V4L2_STD_PAL == hexium-&gt;cur_std) {</div><div class='del'>-		hexium_set_standard(hexium, hexium_pal);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	if (0 == hexium-&gt;cur_bw &amp;&amp; V4L2_STD_NTSC == hexium-&gt;cur_std) {</div><div class='del'>-		hexium_set_standard(hexium, hexium_ntsc);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	if (0 == hexium-&gt;cur_bw &amp;&amp; V4L2_STD_SECAM == hexium-&gt;cur_std) {</div><div class='del'>-		hexium_set_standard(hexium, hexium_secam);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	if (1 == hexium-&gt;cur_bw &amp;&amp; V4L2_STD_PAL == hexium-&gt;cur_std) {</div><div class='del'>-		hexium_set_standard(hexium, hexium_pal_bw);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	if (1 == hexium-&gt;cur_bw &amp;&amp; V4L2_STD_NTSC == hexium-&gt;cur_std) {</div><div class='del'>-		hexium_set_standard(hexium, hexium_ntsc_bw);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	if (1 == hexium-&gt;cur_bw &amp;&amp; V4L2_STD_SECAM == hexium-&gt;cur_std)</div><div class='del'>-		/* fixme: is there no bw secam mode? */</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> static struct saa7146_ext_vv vv_data;</div><div class='ctx'> </div><div class='ctx'> /* this function only gets called when the probing was successful */</div><div class='hunk'>@@ -399,12 +298,10 @@ static int hexium_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_d</div><div class='ctx'> 	hexium-&gt;cur_input = 0;</div><div class='ctx'> </div><div class='ctx'> 	saa7146_vv_init(dev, &amp;vv_data);</div><div class='del'>-	vv_data.ops.vidioc_queryctrl = vidioc_queryctrl;</div><div class='del'>-	vv_data.ops.vidioc_g_ctrl = vidioc_g_ctrl;</div><div class='del'>-	vv_data.ops.vidioc_s_ctrl = vidioc_s_ctrl;</div><div class='del'>-	vv_data.ops.vidioc_enum_input = vidioc_enum_input;</div><div class='del'>-	vv_data.ops.vidioc_g_input = vidioc_g_input;</div><div class='del'>-	vv_data.ops.vidioc_s_input = vidioc_s_input;</div><div class='add'>+</div><div class='add'>+	vv_data.vid_ops.vidioc_enum_input = vidioc_enum_input;</div><div class='add'>+	vv_data.vid_ops.vidioc_g_input = vidioc_g_input;</div><div class='add'>+	vv_data.vid_ops.vidioc_s_input = vidioc_s_input;</div><div class='ctx'> 	ret = saa7146_register_device(&amp;hexium-&gt;video_dev, dev, "hexium gemini", VFL_TYPE_GRABBER);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		pr_err("cannot register capture v4l2 device. skipping.\n");</div><div class='head'>diff --git a/drivers/media/video/hexium_orion.c b/drivers/media/video/hexium_orion.c<br/>index 23debc967d94..a1eb26d11070 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/hexium_orion.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/hexium_orion.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/hexium_orion.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/hexium_orion.c</a></div><div class='hunk'>@@ -41,15 +41,15 @@ static int hexium_num;</div><div class='ctx'> </div><div class='ctx'> #define HEXIUM_INPUTS	9</div><div class='ctx'> static struct v4l2_input hexium_inputs[HEXIUM_INPUTS] = {</div><div class='del'>-	{ 0, "CVBS 1",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 1, "CVBS 2",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 2, "CVBS 3",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 3, "CVBS 4",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 4, "CVBS 5",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 5, "CVBS 6",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 6, "Y/C 1",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 7, "Y/C 2",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ 8, "Y/C 3",	V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 0, "CVBS 1",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 1, "CVBS 2",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 2, "CVBS 3",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 3, "CVBS 4",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 4, "CVBS 5",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 5, "CVBS 6",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 6, "Y/C 1",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 7, "Y/C 2",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ 8, "Y/C 3",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define HEXIUM_AUDIOS	0</div><div class='hunk'>@@ -371,9 +371,9 @@ static int hexium_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_d</div><div class='ctx'> 	DEB_EE("\n");</div><div class='ctx'> </div><div class='ctx'> 	saa7146_vv_init(dev, &amp;vv_data);</div><div class='del'>-	vv_data.ops.vidioc_enum_input = vidioc_enum_input;</div><div class='del'>-	vv_data.ops.vidioc_g_input = vidioc_g_input;</div><div class='del'>-	vv_data.ops.vidioc_s_input = vidioc_s_input;</div><div class='add'>+	vv_data.vid_ops.vidioc_enum_input = vidioc_enum_input;</div><div class='add'>+	vv_data.vid_ops.vidioc_g_input = vidioc_g_input;</div><div class='add'>+	vv_data.vid_ops.vidioc_s_input = vidioc_s_input;</div><div class='ctx'> 	if (0 != saa7146_register_device(&amp;hexium-&gt;video_dev, dev, "hexium orion", VFL_TYPE_GRABBER)) {</div><div class='ctx'> 		pr_err("cannot register capture v4l2 device. skipping.\n");</div><div class='ctx'> 		return -1;</div><div class='head'>diff --git a/drivers/media/video/ivtv/ivtv-driver.c b/drivers/media/video/ivtv/ivtv-driver.c<br/>index 679262ed13bc..057929e165ab 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/ivtv/ivtv-driver.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/ivtv/ivtv-driver.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/ivtv/ivtv-driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/ivtv/ivtv-driver.c</a></div><div class='hunk'>@@ -1201,9 +1201,9 @@ static int __devinit ivtv_probe(struct pci_dev *pdev,</div><div class='ctx'> 		struct v4l2_ctrl_handler *hdl = itv-&gt;v4l2_dev.ctrl_handler;</div><div class='ctx'> </div><div class='ctx'> 		itv-&gt;ctrl_pts = v4l2_ctrl_new_std(hdl, &amp;ivtv_hdl_out_ops,</div><div class='del'>-				V4L2_CID_MPEG_VIDEO_DEC_PTS, 0, 0, 1, 0);</div><div class='add'>+				V4L2_CID_MPEG_VIDEO_DEC_PTS, 0, 0, 0, 0);</div><div class='ctx'> 		itv-&gt;ctrl_frame = v4l2_ctrl_new_std(hdl, &amp;ivtv_hdl_out_ops,</div><div class='del'>-				V4L2_CID_MPEG_VIDEO_DEC_FRAME, 0, 0x7fffffff, 1, 0);</div><div class='add'>+				V4L2_CID_MPEG_VIDEO_DEC_FRAME, 0, 0, 0, 0);</div><div class='ctx'> 		/* Note: V4L2_MPEG_AUDIO_DEC_PLAYBACK_AUTO is not supported,</div><div class='ctx'> 		   mask that menu item. */</div><div class='ctx'> 		itv-&gt;ctrl_audio_playback =</div><div class='head'>diff --git a/drivers/media/video/ivtv/ivtv-fileops.c b/drivers/media/video/ivtv/ivtv-fileops.c<br/>index c9663e885b9f..9ff69b5a87e2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/ivtv/ivtv-fileops.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/ivtv/ivtv-fileops.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/ivtv/ivtv-fileops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/ivtv/ivtv-fileops.c</a></div><div class='hunk'>@@ -746,8 +746,9 @@ unsigned int ivtv_v4l2_dec_poll(struct file *filp, poll_table *wait)</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned int ivtv_v4l2_enc_poll(struct file *filp, poll_table * wait)</div><div class='add'>+unsigned int ivtv_v4l2_enc_poll(struct file *filp, poll_table *wait)</div><div class='ctx'> {</div><div class='add'>+	unsigned long req_events = poll_requested_events(wait);</div><div class='ctx'> 	struct ivtv_open_id *id = fh2id(filp-&gt;private_data);</div><div class='ctx'> 	struct ivtv *itv = id-&gt;itv;</div><div class='ctx'> 	struct ivtv_stream *s = &amp;itv-&gt;streams[id-&gt;type];</div><div class='hunk'>@@ -755,7 +756,8 @@ unsigned int ivtv_v4l2_enc_poll(struct file *filp, poll_table * wait)</div><div class='ctx'> 	unsigned res = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Start a capture if there is none */</div><div class='del'>-	if (!eof &amp;&amp; !test_bit(IVTV_F_S_STREAMING, &amp;s-&gt;s_flags)) {</div><div class='add'>+	if (!eof &amp;&amp; !test_bit(IVTV_F_S_STREAMING, &amp;s-&gt;s_flags) &amp;&amp;</div><div class='add'>+			(req_events &amp; (POLLIN | POLLRDNORM))) {</div><div class='ctx'> 		int rc;</div><div class='ctx'> </div><div class='ctx'> 		rc = ivtv_start_capture(id);</div><div class='head'>diff --git a/drivers/media/video/ivtv/ivtv-ioctl.c b/drivers/media/video/ivtv/ivtv-ioctl.c<br/>index 989e556913ed..f7d57b3f2842 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/ivtv/ivtv-ioctl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/ivtv/ivtv-ioctl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/ivtv/ivtv-ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/ivtv/ivtv-ioctl.c</a></div><div class='hunk'>@@ -135,7 +135,6 @@ void ivtv_set_osd_alpha(struct ivtv *itv)</div><div class='ctx'> int ivtv_set_speed(struct ivtv *itv, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data[CX2341X_MBOX_MAX_DATA];</div><div class='del'>-	struct ivtv_stream *s;</div><div class='ctx'> 	int single_step = (speed == 1 || speed == -1);</div><div class='ctx'> 	DEFINE_WAIT(wait);</div><div class='ctx'> </div><div class='hunk'>@@ -145,8 +144,6 @@ int ivtv_set_speed(struct ivtv *itv, int speed)</div><div class='ctx'> 	if (speed == itv-&gt;speed &amp;&amp; !single_step)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	s = &amp;itv-&gt;streams[IVTV_DEC_STREAM_TYPE_MPG];</div><div class='del'>-</div><div class='ctx'> 	if (single_step &amp;&amp; (speed &lt; 0) == (itv-&gt;speed &lt; 0)) {</div><div class='ctx'> 		/* Single step video and no need to change direction */</div><div class='ctx'> 		ivtv_vapi(itv, CX2341X_DEC_STEP_VIDEO, 1, 0);</div><div class='hunk'>@@ -1468,8 +1465,9 @@ static int ivtv_subscribe_event(struct v4l2_fh *fh, struct v4l2_event_subscripti</div><div class='ctx'> 	switch (sub-&gt;type) {</div><div class='ctx'> 	case V4L2_EVENT_VSYNC:</div><div class='ctx'> 	case V4L2_EVENT_EOS:</div><div class='add'>+		return v4l2_event_subscribe(fh, sub, 0, NULL);</div><div class='ctx'> 	case V4L2_EVENT_CTRL:</div><div class='del'>-		return v4l2_event_subscribe(fh, sub, 0);</div><div class='add'>+		return v4l2_event_subscribe(fh, sub, 0, &amp;v4l2_ctrl_sub_ev_ops);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1827,7 +1825,7 @@ static long ivtv_default(struct file *file, void *fh, bool valid_prio,</div><div class='ctx'> 		return ivtv_decoder_ioctls(file, cmd, (void *)arg);</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return -ENOTTY;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/media/video/ivtv/ivtv-streams.c b/drivers/media/video/ivtv/ivtv-streams.c<br/>index 7ea5ca7f012b..6738592aa35d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/ivtv/ivtv-streams.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/ivtv/ivtv-streams.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/ivtv/ivtv-streams.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/ivtv/ivtv-streams.c</a></div><div class='hunk'>@@ -228,6 +228,10 @@ static int ivtv_prep_dev(struct ivtv *itv, int type)</div><div class='ctx'> 	s-&gt;vdev-&gt;release = video_device_release;</div><div class='ctx'> 	s-&gt;vdev-&gt;tvnorms = V4L2_STD_ALL;</div><div class='ctx'> 	s-&gt;vdev-&gt;lock = &amp;itv-&gt;serialize_lock;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;s-&gt;vdev-&gt;flags);</div><div class='ctx'> 	set_bit(V4L2_FL_USE_FH_PRIO, &amp;s-&gt;vdev-&gt;flags);</div><div class='ctx'> 	ivtv_set_funcs(s-&gt;vdev);</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/media/video/ivtv/ivtvfb.c b/drivers/media/video/ivtv/ivtvfb.c<br/>index e5e7fa9e737b..05b94aa8ba32 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/ivtv/ivtvfb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/ivtv/ivtvfb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/ivtv/ivtvfb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/ivtv/ivtvfb.c</a></div><div class='hunk'>@@ -1293,6 +1293,7 @@ static int __init ivtvfb_init(void)</div><div class='ctx'> </div><div class='ctx'> 	drv = driver_find("ivtv", &amp;pci_bus_type);</div><div class='ctx'> 	err = driver_for_each_device(drv, NULL, &amp;registered, ivtvfb_callback_init);</div><div class='add'>+	(void)err;	/* suppress compiler warning */</div><div class='ctx'> 	if (!registered) {</div><div class='ctx'> 		printk(KERN_ERR "ivtvfb:  no cards found\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -1309,6 +1310,7 @@ static void ivtvfb_cleanup(void)</div><div class='ctx'> </div><div class='ctx'> 	drv = driver_find("ivtv", &amp;pci_bus_type);</div><div class='ctx'> 	err = driver_for_each_device(drv, NULL, NULL, ivtvfb_callback_cleanup);</div><div class='add'>+	(void)err;	/* suppress compiler warning */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(ivtvfb_init);</div><div class='head'>diff --git a/drivers/media/video/m5mols/m5mols.h b/drivers/media/video/m5mols/m5mols.h<br/>index 4b021e1ee5f2..bb589917b65b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/m5mols/m5mols.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/m5mols/m5mols.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/m5mols/m5mols.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/m5mols/m5mols.h</a></div><div class='hunk'>@@ -21,11 +21,6 @@</div><div class='ctx'> </div><div class='ctx'> extern int m5mols_debug;</div><div class='ctx'> </div><div class='del'>-#define to_m5mols(__sd)	container_of(__sd, struct m5mols_info, sd)</div><div class='del'>-</div><div class='del'>-#define to_sd(__ctrl) \</div><div class='del'>-	(&amp;container_of(__ctrl-&gt;handler, struct m5mols_info, handle)-&gt;sd)</div><div class='del'>-</div><div class='ctx'> enum m5mols_restype {</div><div class='ctx'> 	M5MOLS_RESTYPE_MONITOR,</div><div class='ctx'> 	M5MOLS_RESTYPE_CAPTURE,</div><div class='hunk'>@@ -163,21 +158,27 @@ struct m5mols_version {</div><div class='ctx'>  * @ffmt: current fmt according to resolution type</div><div class='ctx'>  * @res_type: current resolution type</div><div class='ctx'>  * @irq_waitq: waitqueue for the capture</div><div class='del'>- * @flags: state variable for the interrupt handler</div><div class='add'>+ * @irq_done: set to 1 in the interrupt handler</div><div class='ctx'>  * @handle: control handler</div><div class='del'>- * @autoexposure: Auto Exposure control</div><div class='del'>- * @exposure: Exposure control</div><div class='del'>- * @autowb: Auto White Balance control</div><div class='del'>- * @colorfx: Color effect control</div><div class='del'>- * @saturation:	Saturation control</div><div class='del'>- * @zoom: Zoom control</div><div class='add'>+ * @auto_exposure: auto/manual exposure control</div><div class='add'>+ * @exposure_bias: exposure compensation control</div><div class='add'>+ * @exposure: manual exposure control</div><div class='add'>+ * @metering: exposure metering control</div><div class='add'>+ * @auto_iso: auto/manual ISO sensitivity control</div><div class='add'>+ * @iso: manual ISO sensitivity control</div><div class='add'>+ * @auto_wb: auto white balance control</div><div class='add'>+ * @lock_3a: 3A lock control</div><div class='add'>+ * @colorfx: color effect control</div><div class='add'>+ * @saturation: saturation control</div><div class='add'>+ * @zoom: zoom control</div><div class='add'>+ * @wdr: wide dynamic range control</div><div class='add'>+ * @stabilization: image stabilization control</div><div class='add'>+ * @jpeg_quality: JPEG compression quality control</div><div class='ctx'>  * @ver: information of the version</div><div class='ctx'>  * @cap: the capture mode attributes</div><div class='del'>- * @power: current sensor's power status</div><div class='ctx'>  * @isp_ready: 1 when the ISP controller has completed booting</div><div class='add'>+ * @power: current sensor's power status</div><div class='ctx'>  * @ctrl_sync: 1 when the control handler state is restored in H/W</div><div class='del'>- * @lock_ae: true means the Auto Exposure is locked</div><div class='del'>- * @lock_awb: true means the Aut WhiteBalance is locked</div><div class='ctx'>  * @resolution:	register value for current resolution</div><div class='ctx'>  * @mode: register value for current operation mode</div><div class='ctx'>  * @set_power: optional power callback to the board code</div><div class='hunk'>@@ -193,15 +194,27 @@ struct m5mols_info {</div><div class='ctx'> 	atomic_t irq_done;</div><div class='ctx'> </div><div class='ctx'> 	struct v4l2_ctrl_handler handle;</div><div class='add'>+	struct {</div><div class='add'>+		/* exposure/exposure bias/auto exposure cluster */</div><div class='add'>+		struct v4l2_ctrl *auto_exposure;</div><div class='add'>+		struct v4l2_ctrl *exposure_bias;</div><div class='add'>+		struct v4l2_ctrl *exposure;</div><div class='add'>+		struct v4l2_ctrl *metering;</div><div class='add'>+	};</div><div class='add'>+	struct {</div><div class='add'>+		/* iso/auto iso cluster */</div><div class='add'>+		struct v4l2_ctrl *auto_iso;</div><div class='add'>+		struct v4l2_ctrl *iso;</div><div class='add'>+	};</div><div class='add'>+	struct v4l2_ctrl *auto_wb;</div><div class='ctx'> </div><div class='del'>-	/* Autoexposure/exposure control cluster */</div><div class='del'>-	struct v4l2_ctrl *autoexposure;</div><div class='del'>-	struct v4l2_ctrl *exposure;</div><div class='del'>-</div><div class='del'>-	struct v4l2_ctrl *autowb;</div><div class='add'>+	struct v4l2_ctrl *lock_3a;</div><div class='ctx'> 	struct v4l2_ctrl *colorfx;</div><div class='ctx'> 	struct v4l2_ctrl *saturation;</div><div class='ctx'> 	struct v4l2_ctrl *zoom;</div><div class='add'>+	struct v4l2_ctrl *wdr;</div><div class='add'>+	struct v4l2_ctrl *stabilization;</div><div class='add'>+	struct v4l2_ctrl *jpeg_quality;</div><div class='ctx'> </div><div class='ctx'> 	struct m5mols_version ver;</div><div class='ctx'> 	struct m5mols_capture cap;</div><div class='hunk'>@@ -210,8 +223,6 @@ struct m5mols_info {</div><div class='ctx'> 	unsigned int power:1;</div><div class='ctx'> 	unsigned int ctrl_sync:1;</div><div class='ctx'> </div><div class='del'>-	bool lock_ae;</div><div class='del'>-	bool lock_awb;</div><div class='ctx'> 	u8 resolution;</div><div class='ctx'> 	u8 mode;</div><div class='ctx'> </div><div class='hunk'>@@ -282,7 +293,7 @@ int m5mols_busy_wait(struct v4l2_subdev *sd, u32 reg, u32 value, u32 mask,</div><div class='ctx'>  * The available executing order between each modes are as follows:</div><div class='ctx'>  *   PARAMETER &lt;---&gt; MONITOR &lt;---&gt; CAPTURE</div><div class='ctx'>  */</div><div class='del'>-int m5mols_mode(struct m5mols_info *info, u8 mode);</div><div class='add'>+int m5mols_set_mode(struct m5mols_info *info, u8 mode);</div><div class='ctx'> </div><div class='ctx'> int m5mols_enable_interrupt(struct v4l2_subdev *sd, u8 reg);</div><div class='ctx'> int m5mols_wait_interrupt(struct v4l2_subdev *sd, u8 condition, u32 timeout);</div><div class='hunk'>@@ -291,9 +302,33 @@ int m5mols_start_capture(struct m5mols_info *info);</div><div class='ctx'> int m5mols_do_scenemode(struct m5mols_info *info, u8 mode);</div><div class='ctx'> int m5mols_lock_3a(struct m5mols_info *info, bool lock);</div><div class='ctx'> int m5mols_set_ctrl(struct v4l2_ctrl *ctrl);</div><div class='add'>+int m5mols_init_controls(struct v4l2_subdev *sd);</div><div class='ctx'> </div><div class='ctx'> /* The firmware function */</div><div class='ctx'> int m5mols_update_fw(struct v4l2_subdev *sd,</div><div class='ctx'> 		     int (*set_power)(struct m5mols_info *, bool));</div><div class='ctx'> </div><div class='add'>+static inline struct m5mols_info *to_m5mols(struct v4l2_subdev *subdev)</div><div class='add'>+{</div><div class='add'>+	return container_of(subdev, struct m5mols_info, sd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct m5mols_info *info = container_of(ctrl-&gt;handler,</div><div class='add'>+						struct m5mols_info, handle);</div><div class='add'>+	return &amp;info-&gt;sd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void m5mols_set_ctrl_mode(struct v4l2_ctrl *ctrl,</div><div class='add'>+					unsigned int mode)</div><div class='add'>+{</div><div class='add'>+	ctrl-&gt;priv = (void *)mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int m5mols_get_ctrl_mode(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	return (unsigned int)ctrl-&gt;priv;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif	/* M5MOLS_H */</div><div class='head'>diff --git a/drivers/media/video/m5mols/m5mols_capture.c b/drivers/media/video/m5mols/m5mols_capture.c<br/>index ba25e8e2ba4c..cb243bd278ce 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/m5mols/m5mols_capture.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/m5mols/m5mols_capture.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/m5mols/m5mols_capture.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/m5mols/m5mols_capture.c</a></div><div class='hunk'>@@ -106,7 +106,6 @@ static int m5mols_capture_info(struct m5mols_info *info)</div><div class='ctx'> int m5mols_start_capture(struct m5mols_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct v4l2_subdev *sd = &amp;info-&gt;sd;</div><div class='del'>-	u8 resolution = info-&gt;resolution;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -114,22 +113,18 @@ int m5mols_start_capture(struct m5mols_info *info)</div><div class='ctx'> 	 * format. The frame capture is initiated during switching from Monitor</div><div class='ctx'> 	 * to Capture mode.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = m5mols_mode(info, REG_MONITOR);</div><div class='add'>+	ret = m5mols_set_mode(info, REG_MONITOR);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = m5mols_restore_controls(info);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = m5mols_write(sd, CAPP_YUVOUT_MAIN, REG_JPEG);</div><div class='ctx'> 	if (!ret)</div><div class='del'>-		ret = m5mols_write(sd, CAPP_MAIN_IMAGE_SIZE, resolution);</div><div class='add'>+		ret = m5mols_write(sd, CAPP_MAIN_IMAGE_SIZE, info-&gt;resolution);</div><div class='ctx'> 	if (!ret)</div><div class='del'>-		ret = m5mols_lock_3a(info, true);</div><div class='del'>-	if (!ret)</div><div class='del'>-		ret = m5mols_mode(info, REG_CAPTURE);</div><div class='add'>+		ret = m5mols_set_mode(info, REG_CAPTURE);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		/* Wait until a frame is captured to ISP internal memory */</div><div class='ctx'> 		ret = m5mols_wait_interrupt(sd, REG_INT_CAPTURE, 2000);</div><div class='del'>-	if (!ret)</div><div class='del'>-		ret = m5mols_lock_3a(info, false);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/m5mols/m5mols_controls.c b/drivers/media/video/m5mols/m5mols_controls.c<br/>index d135d20d09cf..392a028730e2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/m5mols/m5mols_controls.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/m5mols/m5mols_controls.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/m5mols/m5mols_controls.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/m5mols/m5mols_controls.c</a></div><div class='hunk'>@@ -139,7 +139,7 @@ int m5mols_do_scenemode(struct m5mols_info *info, u8 mode)</div><div class='ctx'> 	if (mode &gt; REG_SCENE_CANDLE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ret = m5mols_lock_3a(info, false);</div><div class='add'>+	ret = v4l2_ctrl_s_ctrl(info-&gt;lock_3a, 0);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = m5mols_write(sd, AE_EV_PRESET_MONITOR, mode);</div><div class='ctx'> 	if (!ret)</div><div class='hunk'>@@ -169,7 +169,7 @@ int m5mols_do_scenemode(struct m5mols_info *info, u8 mode)</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = m5mols_write(sd, AE_ISO, scenemode.iso);</div><div class='ctx'> 	if (!ret)</div><div class='del'>-		ret = m5mols_mode(info, REG_CAPTURE);</div><div class='add'>+		ret = m5mols_set_mode(info, REG_CAPTURE);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = m5mols_write(sd, CAPP_WDR_EN, scenemode.wdr);</div><div class='ctx'> 	if (!ret)</div><div class='hunk'>@@ -181,119 +181,448 @@ int m5mols_do_scenemode(struct m5mols_info *info, u8 mode)</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = m5mols_write(sd, CAPC_MODE, scenemode.capt_mode);</div><div class='ctx'> 	if (!ret)</div><div class='del'>-		ret = m5mols_mode(info, REG_MONITOR);</div><div class='add'>+		ret = m5mols_set_mode(info, REG_MONITOR);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int m5mols_lock_ae(struct m5mols_info *info, bool lock)</div><div class='add'>+static int m5mols_3a_lock(struct m5mols_info *info, struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='add'>+	bool af_lock = ctrl-&gt;val &amp; V4L2_LOCK_FOCUS;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (info-&gt;lock_ae != lock)</div><div class='del'>-		ret = m5mols_write(&amp;info-&gt;sd, AE_LOCK,</div><div class='del'>-				lock ? REG_AE_LOCK : REG_AE_UNLOCK);</div><div class='del'>-	if (!ret)</div><div class='del'>-		info-&gt;lock_ae = lock;</div><div class='add'>+	if ((ctrl-&gt;val ^ ctrl-&gt;cur.val) &amp; V4L2_LOCK_EXPOSURE) {</div><div class='add'>+		bool ae_lock = ctrl-&gt;val &amp; V4L2_LOCK_EXPOSURE;</div><div class='add'>+</div><div class='add'>+		ret = m5mols_write(&amp;info-&gt;sd, AE_LOCK, ae_lock ?</div><div class='add'>+				   REG_AE_LOCK : REG_AE_UNLOCK);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (((ctrl-&gt;val ^ ctrl-&gt;cur.val) &amp; V4L2_LOCK_WHITE_BALANCE)</div><div class='add'>+	    &amp;&amp; info-&gt;auto_wb-&gt;val) {</div><div class='add'>+		bool awb_lock = ctrl-&gt;val &amp; V4L2_LOCK_WHITE_BALANCE;</div><div class='add'>+</div><div class='add'>+		ret = m5mols_write(&amp;info-&gt;sd, AWB_LOCK, awb_lock ?</div><div class='add'>+				   REG_AWB_LOCK : REG_AWB_UNLOCK);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!info-&gt;ver.af || !af_lock)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if ((ctrl-&gt;val ^ ctrl-&gt;cur.val) &amp; V4L2_LOCK_FOCUS)</div><div class='add'>+		ret = m5mols_write(&amp;info-&gt;sd, AF_EXECUTE, REG_AF_STOP);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m5mols_set_metering_mode(struct m5mols_info *info, int mode)</div><div class='add'>+{</div><div class='add'>+	unsigned int metering;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case V4L2_EXPOSURE_METERING_CENTER_WEIGHTED:</div><div class='add'>+		metering = REG_AE_CENTER;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_EXPOSURE_METERING_SPOT:</div><div class='add'>+		metering = REG_AE_SPOT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		metering = REG_AE_ALL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return m5mols_write(&amp;info-&gt;sd, AE_MODE, metering);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m5mols_set_exposure(struct m5mols_info *info, int exposure)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subdev *sd = &amp;info-&gt;sd;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (exposure == V4L2_EXPOSURE_AUTO) {</div><div class='add'>+		/* Unlock auto exposure */</div><div class='add'>+		info-&gt;lock_3a-&gt;val &amp;= ~V4L2_LOCK_EXPOSURE;</div><div class='add'>+		m5mols_3a_lock(info, info-&gt;lock_3a);</div><div class='add'>+</div><div class='add'>+		ret = m5mols_set_metering_mode(info, info-&gt;metering-&gt;val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		v4l2_dbg(1, m5mols_debug, sd,</div><div class='add'>+			 "%s: exposure bias: %#x, metering: %#x\n",</div><div class='add'>+			 __func__, info-&gt;exposure_bias-&gt;val,</div><div class='add'>+			 info-&gt;metering-&gt;val);</div><div class='add'>+</div><div class='add'>+		return m5mols_write(sd, AE_INDEX, info-&gt;exposure_bias-&gt;val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (exposure == V4L2_EXPOSURE_MANUAL) {</div><div class='add'>+		ret = m5mols_write(sd, AE_MODE, REG_AE_OFF);</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			ret = m5mols_write(sd, AE_MAN_GAIN_MON,</div><div class='add'>+					   info-&gt;exposure-&gt;val);</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			ret = m5mols_write(sd, AE_MAN_GAIN_CAP,</div><div class='add'>+					   info-&gt;exposure-&gt;val);</div><div class='add'>+</div><div class='add'>+		v4l2_dbg(1, m5mols_debug, sd, "%s: exposure: %#x\n",</div><div class='add'>+			 __func__, info-&gt;exposure-&gt;val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m5mols_set_white_balance(struct m5mols_info *info, int val)</div><div class='add'>+{</div><div class='add'>+	static const unsigned short wb[][2] = {</div><div class='add'>+		{ V4L2_WHITE_BALANCE_INCANDESCENT,  REG_AWB_INCANDESCENT },</div><div class='add'>+		{ V4L2_WHITE_BALANCE_FLUORESCENT,   REG_AWB_FLUORESCENT_1 },</div><div class='add'>+		{ V4L2_WHITE_BALANCE_FLUORESCENT_H, REG_AWB_FLUORESCENT_2 },</div><div class='add'>+		{ V4L2_WHITE_BALANCE_HORIZON,       REG_AWB_HORIZON },</div><div class='add'>+		{ V4L2_WHITE_BALANCE_DAYLIGHT,      REG_AWB_DAYLIGHT },</div><div class='add'>+		{ V4L2_WHITE_BALANCE_FLASH,         REG_AWB_LEDLIGHT },</div><div class='add'>+		{ V4L2_WHITE_BALANCE_CLOUDY,        REG_AWB_CLOUDY },</div><div class='add'>+		{ V4L2_WHITE_BALANCE_SHADE,         REG_AWB_SHADE },</div><div class='add'>+		{ V4L2_WHITE_BALANCE_AUTO,          REG_AWB_AUTO },</div><div class='add'>+	};</div><div class='add'>+	int i;</div><div class='add'>+	struct v4l2_subdev *sd = &amp;info-&gt;sd;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(wb); i++) {</div><div class='add'>+		int awb;</div><div class='add'>+		if (wb[i][0] != val)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		v4l2_dbg(1, m5mols_debug, sd,</div><div class='add'>+			 "Setting white balance to: %#x\n", wb[i][0]);</div><div class='add'>+</div><div class='add'>+		awb = wb[i][0] == V4L2_WHITE_BALANCE_AUTO;</div><div class='add'>+		ret = m5mols_write(sd, AWB_MODE, awb ? REG_AWB_AUTO :</div><div class='add'>+						 REG_AWB_PRESET);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (!awb)</div><div class='add'>+			ret = m5mols_write(sd, AWB_MANUAL, wb[i][1]);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int m5mols_lock_awb(struct m5mols_info *info, bool lock)</div><div class='add'>+static int m5mols_set_saturation(struct m5mols_info *info, int val)</div><div class='add'>+{</div><div class='add'>+	int ret = m5mols_write(&amp;info-&gt;sd, MON_CHROMA_LVL, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return m5mols_write(&amp;info-&gt;sd, MON_CHROMA_EN, REG_CHROMA_ON);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m5mols_set_color_effect(struct m5mols_info *info, int val)</div><div class='ctx'> {</div><div class='add'>+	unsigned int m_effect = REG_COLOR_EFFECT_OFF;</div><div class='add'>+	unsigned int p_effect = REG_EFFECT_OFF;</div><div class='add'>+	unsigned int cfix_r = 0, cfix_b = 0;</div><div class='add'>+	struct v4l2_subdev *sd = &amp;info-&gt;sd;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (info-&gt;lock_awb != lock)</div><div class='del'>-		ret = m5mols_write(&amp;info-&gt;sd, AWB_LOCK,</div><div class='del'>-				lock ? REG_AWB_LOCK : REG_AWB_UNLOCK);</div><div class='add'>+	switch (val) {</div><div class='add'>+	case V4L2_COLORFX_BW:</div><div class='add'>+		m_effect = REG_COLOR_EFFECT_ON;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_COLORFX_NEGATIVE:</div><div class='add'>+		p_effect = REG_EFFECT_NEGA;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_COLORFX_EMBOSS:</div><div class='add'>+		p_effect = REG_EFFECT_EMBOSS;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_COLORFX_SEPIA:</div><div class='add'>+		m_effect = REG_COLOR_EFFECT_ON;</div><div class='add'>+		cfix_r = REG_CFIXR_SEPIA;</div><div class='add'>+		cfix_b = REG_CFIXB_SEPIA;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = m5mols_write(sd, PARM_EFFECT, p_effect);</div><div class='ctx'> 	if (!ret)</div><div class='del'>-		info-&gt;lock_awb = lock;</div><div class='add'>+		ret = m5mols_write(sd, MON_EFFECT, m_effect);</div><div class='add'>+</div><div class='add'>+	if (ret == 0 &amp;&amp; m_effect == REG_COLOR_EFFECT_ON) {</div><div class='add'>+		ret = m5mols_write(sd, MON_CFIXR, cfix_r);</div><div class='add'>+		if (!ret)</div><div class='add'>+			ret = m5mols_write(sd, MON_CFIXB, cfix_b);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	v4l2_dbg(1, m5mols_debug, sd,</div><div class='add'>+		 "p_effect: %#x, m_effect: %#x, r: %#x, b: %#x (%d)\n",</div><div class='add'>+		 p_effect, m_effect, cfix_r, cfix_b, ret);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* m5mols_lock_3a() - Lock 3A(Auto Exposure, Auto Whitebalance, Auto Focus) */</div><div class='del'>-int m5mols_lock_3a(struct m5mols_info *info, bool lock)</div><div class='add'>+static int m5mols_set_iso(struct m5mols_info *info, int auto_iso)</div><div class='add'>+{</div><div class='add'>+	u32 iso = auto_iso ? 0 : info-&gt;iso-&gt;val + 1;</div><div class='add'>+</div><div class='add'>+	return m5mols_write(&amp;info-&gt;sd, AE_ISO, iso);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m5mols_set_wdr(struct m5mols_info *info, int wdr)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = m5mols_lock_ae(info, lock);</div><div class='del'>-	if (!ret)</div><div class='del'>-		ret = m5mols_lock_awb(info, lock);</div><div class='del'>-	/* Don't need to handle unlocking AF */</div><div class='del'>-	if (!ret &amp;&amp; is_available_af(info) &amp;&amp; lock)</div><div class='del'>-		ret = m5mols_write(&amp;info-&gt;sd, AF_EXECUTE, REG_AF_STOP);</div><div class='add'>+	ret = m5mols_write(&amp;info-&gt;sd, MON_TONE_CTL, wdr ? 9 : 5);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = m5mols_set_mode(info, REG_CAPTURE);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return m5mols_write(&amp;info-&gt;sd, CAPP_WDR_EN, wdr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m5mols_set_stabilization(struct m5mols_info *info, int val)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subdev *sd = &amp;info-&gt;sd;</div><div class='add'>+	unsigned int evp = val ? 0xe : 0x0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = m5mols_write(sd, AE_EV_PRESET_MONITOR, evp);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return m5mols_write(sd, AE_EV_PRESET_CAPTURE, evp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m5mols_g_volatile_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subdev *sd = to_sd(ctrl);</div><div class='add'>+	struct m5mols_info *info = to_m5mols(sd);</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u8 status;</div><div class='add'>+</div><div class='add'>+	v4l2_dbg(1, m5mols_debug, sd, "%s: ctrl: %s (%d)\n",</div><div class='add'>+		 __func__, ctrl-&gt;name, info-&gt;isp_ready);</div><div class='add'>+</div><div class='add'>+	if (!info-&gt;isp_ready)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_ISO_SENSITIVITY_AUTO:</div><div class='add'>+		ret = m5mols_read_u8(sd, AE_ISO, &amp;status);</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			ctrl-&gt;val = !status;</div><div class='add'>+		if (status != REG_ISO_AUTO)</div><div class='add'>+			info-&gt;iso-&gt;val = status - 1;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_3A_LOCK:</div><div class='add'>+		ctrl-&gt;val &amp;= ~0x7;</div><div class='add'>+</div><div class='add'>+		ret = m5mols_read_u8(sd, AE_LOCK, &amp;status);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		if (status)</div><div class='add'>+			info-&gt;lock_3a-&gt;val |= V4L2_LOCK_EXPOSURE;</div><div class='add'>+</div><div class='add'>+		ret = m5mols_read_u8(sd, AWB_LOCK, &amp;status);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		if (status)</div><div class='add'>+			info-&gt;lock_3a-&gt;val |= V4L2_LOCK_EXPOSURE;</div><div class='add'>+</div><div class='add'>+		ret = m5mols_read_u8(sd, AF_EXECUTE, &amp;status);</div><div class='add'>+		if (!status)</div><div class='add'>+			info-&gt;lock_3a-&gt;val |= V4L2_LOCK_EXPOSURE;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* m5mols_set_ctrl() - The main s_ctrl function called by m5mols_set_ctrl() */</div><div class='del'>-int m5mols_set_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+static int m5mols_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='add'>+	unsigned int ctrl_mode = m5mols_get_ctrl_mode(ctrl);</div><div class='ctx'> 	struct v4l2_subdev *sd = to_sd(ctrl);</div><div class='ctx'> 	struct m5mols_info *info = to_m5mols(sd);</div><div class='del'>-	int ret;</div><div class='add'>+	int last_mode = info-&gt;mode;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If needed, defer restoring the controls until</div><div class='add'>+	 * the device is fully initialized.</div><div class='add'>+	 */</div><div class='add'>+	if (!info-&gt;isp_ready) {</div><div class='add'>+		info-&gt;ctrl_sync = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	v4l2_dbg(1, m5mols_debug, sd, "%s: %s, val: %d, priv: %#x\n",</div><div class='add'>+		 __func__, ctrl-&gt;name, ctrl-&gt;val, (int)ctrl-&gt;priv);</div><div class='add'>+</div><div class='add'>+	if (ctrl_mode &amp;&amp; ctrl_mode != info-&gt;mode) {</div><div class='add'>+		ret = m5mols_set_mode(info, ctrl_mode);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_3A_LOCK:</div><div class='add'>+		ret = m5mols_3a_lock(info, ctrl);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case V4L2_CID_ZOOM_ABSOLUTE:</div><div class='del'>-		return m5mols_write(sd, MON_ZOOM, ctrl-&gt;val);</div><div class='add'>+		ret = m5mols_write(sd, MON_ZOOM, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='ctx'> 	case V4L2_CID_EXPOSURE_AUTO:</div><div class='del'>-		ret = m5mols_lock_ae(info,</div><div class='del'>-			ctrl-&gt;val == V4L2_EXPOSURE_AUTO ? false : true);</div><div class='del'>-		if (!ret &amp;&amp; ctrl-&gt;val == V4L2_EXPOSURE_AUTO)</div><div class='del'>-			ret = m5mols_write(sd, AE_MODE, REG_AE_ALL);</div><div class='del'>-		if (!ret &amp;&amp; ctrl-&gt;val == V4L2_EXPOSURE_MANUAL) {</div><div class='del'>-			int val = info-&gt;exposure-&gt;val;</div><div class='del'>-			ret = m5mols_write(sd, AE_MODE, REG_AE_OFF);</div><div class='del'>-			if (!ret)</div><div class='del'>-				ret = m5mols_write(sd, AE_MAN_GAIN_MON, val);</div><div class='del'>-			if (!ret)</div><div class='del'>-				ret = m5mols_write(sd, AE_MAN_GAIN_CAP, val);</div><div class='del'>-		}</div><div class='del'>-		return ret;</div><div class='add'>+		ret = m5mols_set_exposure(info, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-	case V4L2_CID_AUTO_WHITE_BALANCE:</div><div class='del'>-		ret = m5mols_lock_awb(info, ctrl-&gt;val ? false : true);</div><div class='del'>-		if (!ret)</div><div class='del'>-			ret = m5mols_write(sd, AWB_MODE, ctrl-&gt;val ?</div><div class='del'>-				REG_AWB_AUTO : REG_AWB_PRESET);</div><div class='del'>-		return ret;</div><div class='add'>+	case V4L2_CID_ISO_SENSITIVITY:</div><div class='add'>+		ret = m5mols_set_iso(info, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE:</div><div class='add'>+		ret = m5mols_set_white_balance(info, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='ctx'> 	case V4L2_CID_SATURATION:</div><div class='del'>-		ret = m5mols_write(sd, MON_CHROMA_LVL, ctrl-&gt;val);</div><div class='del'>-		if (!ret)</div><div class='del'>-			ret = m5mols_write(sd, MON_CHROMA_EN, REG_CHROMA_ON);</div><div class='del'>-		return ret;</div><div class='add'>+		ret = m5mols_set_saturation(info, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='ctx'> 	case V4L2_CID_COLORFX:</div><div class='del'>-		/*</div><div class='del'>-		 * This control uses two kinds of registers: normal &amp; color.</div><div class='del'>-		 * The normal effect belongs to category 1, while the color</div><div class='del'>-		 * one belongs to category 2.</div><div class='del'>-		 *</div><div class='del'>-		 * The normal effect uses one register: CAT1_EFFECT.</div><div class='del'>-		 * The color effect uses three registers:</div><div class='del'>-		 * CAT2_COLOR_EFFECT, CAT2_CFIXR, CAT2_CFIXB.</div><div class='del'>-		 */</div><div class='del'>-		ret = m5mols_write(sd, PARM_EFFECT,</div><div class='del'>-			ctrl-&gt;val == V4L2_COLORFX_NEGATIVE ? REG_EFFECT_NEGA :</div><div class='del'>-			ctrl-&gt;val == V4L2_COLORFX_EMBOSS ? REG_EFFECT_EMBOSS :</div><div class='del'>-			REG_EFFECT_OFF);</div><div class='del'>-		if (!ret)</div><div class='del'>-			ret = m5mols_write(sd, MON_EFFECT,</div><div class='del'>-				ctrl-&gt;val == V4L2_COLORFX_SEPIA ?</div><div class='del'>-				REG_COLOR_EFFECT_ON : REG_COLOR_EFFECT_OFF);</div><div class='del'>-		if (!ret)</div><div class='del'>-			ret = m5mols_write(sd, MON_CFIXR,</div><div class='del'>-				ctrl-&gt;val == V4L2_COLORFX_SEPIA ?</div><div class='del'>-				REG_CFIXR_SEPIA : 0);</div><div class='del'>-		if (!ret)</div><div class='del'>-			ret = m5mols_write(sd, MON_CFIXB,</div><div class='del'>-				ctrl-&gt;val == V4L2_COLORFX_SEPIA ?</div><div class='del'>-				REG_CFIXB_SEPIA : 0);</div><div class='add'>+		ret = m5mols_set_color_effect(info, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_WIDE_DYNAMIC_RANGE:</div><div class='add'>+		ret = m5mols_set_wdr(info, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_IMAGE_STABILIZATION:</div><div class='add'>+		ret = m5mols_set_stabilization(info, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_JPEG_COMPRESSION_QUALITY:</div><div class='add'>+		ret = m5mols_write(sd, CAPP_JPEG_RATIO, ctrl-&gt;val);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret == 0 &amp;&amp; info-&gt;mode != last_mode)</div><div class='add'>+		ret = m5mols_set_mode(info, last_mode);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops m5mols_ctrl_ops = {</div><div class='add'>+	.g_volatile_ctrl	= m5mols_g_volatile_ctrl,</div><div class='add'>+	.s_ctrl			= m5mols_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Supported manual ISO values */</div><div class='add'>+static const s64 iso_qmenu[] = {</div><div class='add'>+	/* AE_ISO: 0x01...0x07 */</div><div class='add'>+	50, 100, 200, 400, 800, 1600, 3200</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Supported Exposure Bias values, -2.0EV...+2.0EV */</div><div class='add'>+static const s64 ev_bias_qmenu[] = {</div><div class='add'>+	/* AE_INDEX: 0x00...0x08 */</div><div class='add'>+	-2000, -1500, -1000, -500, 0, 500, 1000, 1500, 2000</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int m5mols_init_controls(struct v4l2_subdev *sd)</div><div class='add'>+{</div><div class='add'>+	struct m5mols_info *info = to_m5mols(sd);</div><div class='add'>+	u16 exposure_max;</div><div class='add'>+	u16 zoom_step;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Determine the firmware dependant control range and step values */</div><div class='add'>+	ret = m5mols_read_u16(sd, AE_MAX_GAIN_MON, &amp;exposure_max);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	zoom_step = is_manufacturer(info, REG_SAMSUNG_OPTICS) ? 31 : 1;</div><div class='add'>+	v4l2_ctrl_handler_init(&amp;info-&gt;handle, 20);</div><div class='add'>+</div><div class='add'>+	info-&gt;auto_wb = v4l2_ctrl_new_std_menu(&amp;info-&gt;handle,</div><div class='add'>+			&amp;m5mols_ctrl_ops, V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE,</div><div class='add'>+			9, ~0x3fe, V4L2_WHITE_BALANCE_AUTO);</div><div class='add'>+</div><div class='add'>+	/* Exposure control cluster */</div><div class='add'>+	info-&gt;auto_exposure = v4l2_ctrl_new_std_menu(&amp;info-&gt;handle,</div><div class='add'>+			&amp;m5mols_ctrl_ops, V4L2_CID_EXPOSURE_AUTO,</div><div class='add'>+			1, ~0x03, V4L2_EXPOSURE_AUTO);</div><div class='add'>+</div><div class='add'>+	info-&gt;exposure = v4l2_ctrl_new_std(&amp;info-&gt;handle,</div><div class='add'>+			&amp;m5mols_ctrl_ops, V4L2_CID_EXPOSURE,</div><div class='add'>+			0, exposure_max, 1, exposure_max / 2);</div><div class='add'>+</div><div class='add'>+	info-&gt;exposure_bias = v4l2_ctrl_new_int_menu(&amp;info-&gt;handle,</div><div class='add'>+			&amp;m5mols_ctrl_ops, V4L2_CID_AUTO_EXPOSURE_BIAS,</div><div class='add'>+			ARRAY_SIZE(ev_bias_qmenu) - 1,</div><div class='add'>+			ARRAY_SIZE(ev_bias_qmenu)/2 - 1,</div><div class='add'>+			ev_bias_qmenu);</div><div class='add'>+</div><div class='add'>+	info-&gt;metering = v4l2_ctrl_new_std_menu(&amp;info-&gt;handle,</div><div class='add'>+			&amp;m5mols_ctrl_ops, V4L2_CID_EXPOSURE_METERING,</div><div class='add'>+			2, ~0x7, V4L2_EXPOSURE_METERING_AVERAGE);</div><div class='add'>+</div><div class='add'>+	/* ISO control cluster */</div><div class='add'>+	info-&gt;auto_iso = v4l2_ctrl_new_std_menu(&amp;info-&gt;handle, &amp;m5mols_ctrl_ops,</div><div class='add'>+			V4L2_CID_ISO_SENSITIVITY_AUTO, 1, ~0x03, 1);</div><div class='add'>+</div><div class='add'>+	info-&gt;iso = v4l2_ctrl_new_int_menu(&amp;info-&gt;handle, &amp;m5mols_ctrl_ops,</div><div class='add'>+			V4L2_CID_ISO_SENSITIVITY, ARRAY_SIZE(iso_qmenu) - 1,</div><div class='add'>+			ARRAY_SIZE(iso_qmenu)/2 - 1, iso_qmenu);</div><div class='add'>+</div><div class='add'>+	info-&gt;saturation = v4l2_ctrl_new_std(&amp;info-&gt;handle, &amp;m5mols_ctrl_ops,</div><div class='add'>+			V4L2_CID_SATURATION, 1, 5, 1, 3);</div><div class='add'>+</div><div class='add'>+	info-&gt;zoom = v4l2_ctrl_new_std(&amp;info-&gt;handle, &amp;m5mols_ctrl_ops,</div><div class='add'>+			V4L2_CID_ZOOM_ABSOLUTE, 1, 70, zoom_step, 1);</div><div class='add'>+</div><div class='add'>+	info-&gt;colorfx = v4l2_ctrl_new_std_menu(&amp;info-&gt;handle, &amp;m5mols_ctrl_ops,</div><div class='add'>+			V4L2_CID_COLORFX, 4, 0, V4L2_COLORFX_NONE);</div><div class='add'>+</div><div class='add'>+	info-&gt;wdr = v4l2_ctrl_new_std(&amp;info-&gt;handle, &amp;m5mols_ctrl_ops,</div><div class='add'>+			V4L2_CID_WIDE_DYNAMIC_RANGE, 0, 1, 1, 0);</div><div class='add'>+</div><div class='add'>+	info-&gt;stabilization = v4l2_ctrl_new_std(&amp;info-&gt;handle, &amp;m5mols_ctrl_ops,</div><div class='add'>+			V4L2_CID_IMAGE_STABILIZATION, 0, 1, 1, 0);</div><div class='add'>+</div><div class='add'>+	info-&gt;jpeg_quality = v4l2_ctrl_new_std(&amp;info-&gt;handle, &amp;m5mols_ctrl_ops,</div><div class='add'>+			V4L2_CID_JPEG_COMPRESSION_QUALITY, 1, 100, 1, 80);</div><div class='add'>+</div><div class='add'>+	info-&gt;lock_3a = v4l2_ctrl_new_std(&amp;info-&gt;handle, &amp;m5mols_ctrl_ops,</div><div class='add'>+			V4L2_CID_3A_LOCK, 0, 0x7, 0, 0);</div><div class='add'>+</div><div class='add'>+	if (info-&gt;handle.error) {</div><div class='add'>+		int ret = info-&gt;handle.error;</div><div class='add'>+		v4l2_err(sd, "Failed to initialize controls: %d\n", ret);</div><div class='add'>+		v4l2_ctrl_handler_free(&amp;info-&gt;handle);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return -EINVAL;</div><div class='add'>+	v4l2_ctrl_auto_cluster(4, &amp;info-&gt;auto_exposure, 1, false);</div><div class='add'>+	info-&gt;auto_iso-&gt;flags |= V4L2_CTRL_FLAG_VOLATILE |</div><div class='add'>+				V4L2_CTRL_FLAG_UPDATE;</div><div class='add'>+	v4l2_ctrl_auto_cluster(2, &amp;info-&gt;auto_iso, 0, false);</div><div class='add'>+</div><div class='add'>+	info-&gt;lock_3a-&gt;flags |= V4L2_CTRL_FLAG_VOLATILE;</div><div class='add'>+</div><div class='add'>+	m5mols_set_ctrl_mode(info-&gt;auto_exposure, REG_PARAMETER);</div><div class='add'>+	m5mols_set_ctrl_mode(info-&gt;auto_wb, REG_PARAMETER);</div><div class='add'>+	m5mols_set_ctrl_mode(info-&gt;colorfx, REG_MONITOR);</div><div class='add'>+</div><div class='add'>+	sd-&gt;ctrl_handler = &amp;info-&gt;handle;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/media/video/m5mols/m5mols_core.c b/drivers/media/video/m5mols/m5mols_core.c<br/>index d718aee01c77..ac7d28b6ddf2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/m5mols/m5mols_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/m5mols/m5mols_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/m5mols/m5mols_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/m5mols/m5mols_core.c</a></div><div class='hunk'>@@ -362,14 +362,14 @@ static int m5mols_reg_mode(struct v4l2_subdev *sd, u8 mode)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * m5mols_mode - manage the M-5MOLS's mode</div><div class='add'>+ * m5mols_set_mode - set the M-5MOLS controller mode</div><div class='ctx'>  * @mode: the required operation mode</div><div class='ctx'>  *</div><div class='ctx'>  * The commands of M-5MOLS are grouped into specific modes. Each functionality</div><div class='del'>- * can be guaranteed only when the sensor is operating in mode which which</div><div class='del'>- * a command belongs to.</div><div class='add'>+ * can be guaranteed only when the sensor is operating in mode which a command</div><div class='add'>+ * belongs to.</div><div class='ctx'>  */</div><div class='del'>-int m5mols_mode(struct m5mols_info *info, u8 mode)</div><div class='add'>+int m5mols_set_mode(struct m5mols_info *info, u8 mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct v4l2_subdev *sd = &amp;info-&gt;sd;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='hunk'>@@ -645,13 +645,13 @@ static int m5mols_start_monitor(struct m5mols_info *info)</div><div class='ctx'> 	struct v4l2_subdev *sd = &amp;info-&gt;sd;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = m5mols_mode(info, REG_PARAMETER);</div><div class='add'>+	ret = m5mols_set_mode(info, REG_PARAMETER);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = m5mols_write(sd, PARM_MON_SIZE, info-&gt;resolution);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = m5mols_write(sd, PARM_MON_FPS, REG_FPS_30);</div><div class='ctx'> 	if (!ret)</div><div class='del'>-		ret = m5mols_mode(info, REG_MONITOR);</div><div class='add'>+		ret = m5mols_set_mode(info, REG_MONITOR);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = m5mols_restore_controls(info);</div><div class='ctx'> </div><div class='hunk'>@@ -674,42 +674,13 @@ static int m5mols_s_stream(struct v4l2_subdev *sd, int enable)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return m5mols_mode(info, REG_PARAMETER);</div><div class='add'>+	return m5mols_set_mode(info, REG_PARAMETER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct v4l2_subdev_video_ops m5mols_video_ops = {</div><div class='ctx'> 	.s_stream	= m5mols_s_stream,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int m5mols_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_subdev *sd = to_sd(ctrl);</div><div class='del'>-	struct m5mols_info *info = to_m5mols(sd);</div><div class='del'>-	int ispstate = info-&gt;mode;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If needed, defer restoring the controls until</div><div class='del'>-	 * the device is fully initialized.</div><div class='del'>-	 */</div><div class='del'>-	if (!info-&gt;isp_ready) {</div><div class='del'>-		info-&gt;ctrl_sync = 0;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = m5mols_mode(info, REG_PARAMETER);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-	ret = m5mols_set_ctrl(ctrl);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-	return m5mols_mode(info, ispstate);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct v4l2_ctrl_ops m5mols_ctrl_ops = {</div><div class='del'>-	.s_ctrl	= m5mols_s_ctrl,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int m5mols_sensor_power(struct m5mols_info *info, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	struct v4l2_subdev *sd = &amp;info-&gt;sd;</div><div class='hunk'>@@ -802,52 +773,6 @@ static int m5mols_fw_start(struct v4l2_subdev *sd)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int m5mols_init_controls(struct m5mols_info *info)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_subdev *sd = &amp;info-&gt;sd;</div><div class='del'>-	u16 max_exposure;</div><div class='del'>-	u16 step_zoom;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* Determine value's range &amp; step of controls for various FW version */</div><div class='del'>-	ret = m5mols_read_u16(sd, AE_MAX_GAIN_MON, &amp;max_exposure);</div><div class='del'>-	if (!ret)</div><div class='del'>-		step_zoom = is_manufacturer(info, REG_SAMSUNG_OPTICS) ? 31 : 1;</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	v4l2_ctrl_handler_init(&amp;info-&gt;handle, 6);</div><div class='del'>-	info-&gt;autowb = v4l2_ctrl_new_std(&amp;info-&gt;handle,</div><div class='del'>-			&amp;m5mols_ctrl_ops, V4L2_CID_AUTO_WHITE_BALANCE,</div><div class='del'>-			0, 1, 1, 0);</div><div class='del'>-	info-&gt;saturation = v4l2_ctrl_new_std(&amp;info-&gt;handle,</div><div class='del'>-			&amp;m5mols_ctrl_ops, V4L2_CID_SATURATION,</div><div class='del'>-			1, 5, 1, 3);</div><div class='del'>-	info-&gt;zoom = v4l2_ctrl_new_std(&amp;info-&gt;handle,</div><div class='del'>-			&amp;m5mols_ctrl_ops, V4L2_CID_ZOOM_ABSOLUTE,</div><div class='del'>-			1, 70, step_zoom, 1);</div><div class='del'>-	info-&gt;exposure = v4l2_ctrl_new_std(&amp;info-&gt;handle,</div><div class='del'>-			&amp;m5mols_ctrl_ops, V4L2_CID_EXPOSURE,</div><div class='del'>-			0, max_exposure, 1, (int)max_exposure/2);</div><div class='del'>-	info-&gt;colorfx = v4l2_ctrl_new_std_menu(&amp;info-&gt;handle,</div><div class='del'>-			&amp;m5mols_ctrl_ops, V4L2_CID_COLORFX,</div><div class='del'>-			4, (1 &lt;&lt; V4L2_COLORFX_BW), V4L2_COLORFX_NONE);</div><div class='del'>-	info-&gt;autoexposure = v4l2_ctrl_new_std_menu(&amp;info-&gt;handle,</div><div class='del'>-			&amp;m5mols_ctrl_ops, V4L2_CID_EXPOSURE_AUTO,</div><div class='del'>-			1, 0, V4L2_EXPOSURE_AUTO);</div><div class='del'>-</div><div class='del'>-	sd-&gt;ctrl_handler = &amp;info-&gt;handle;</div><div class='del'>-	if (info-&gt;handle.error) {</div><div class='del'>-		v4l2_err(sd, "Failed to initialize controls: %d\n", ret);</div><div class='del'>-		v4l2_ctrl_handler_free(&amp;info-&gt;handle);</div><div class='del'>-		return info-&gt;handle.error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	v4l2_ctrl_cluster(2, &amp;info-&gt;autoexposure);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * m5mols_s_power - Main sensor power control function</div><div class='ctx'>  *</div><div class='hunk'>@@ -868,7 +793,7 @@ static int m5mols_s_power(struct v4l2_subdev *sd, int on)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (is_manufacturer(info, REG_SAMSUNG_TECHWIN)) {</div><div class='del'>-		ret = m5mols_mode(info, REG_MONITOR);</div><div class='add'>+		ret = m5mols_set_mode(info, REG_MONITOR);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			ret = m5mols_write(sd, AF_EXECUTE, REG_AF_STOP);</div><div class='ctx'> 		if (!ret)</div><div class='hunk'>@@ -1010,7 +935,7 @@ static int __devinit m5mols_probe(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> 	ret = m5mols_fw_start(sd);</div><div class='ctx'> 	if (!ret)</div><div class='del'>-		ret = m5mols_init_controls(info);</div><div class='add'>+		ret = m5mols_init_controls(sd);</div><div class='ctx'> </div><div class='ctx'> 	m5mols_sensor_power(info, false);</div><div class='ctx'> 	if (!ret)</div><div class='head'>diff --git a/drivers/media/video/m5mols/m5mols_reg.h b/drivers/media/video/m5mols/m5mols_reg.h<br/>index ae4aced0f9b2..14d4be72aeff 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/m5mols/m5mols_reg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/m5mols/m5mols_reg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/m5mols/m5mols_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/m5mols/m5mols_reg.h</a></div><div class='hunk'>@@ -310,6 +310,7 @@</div><div class='ctx'> #define REG_JPEG		0x10</div><div class='ctx'> </div><div class='ctx'> #define CAPP_MAIN_IMAGE_SIZE	I2C_REG(CAT_CAPT_PARM, 0x01, 1)</div><div class='add'>+#define CAPP_JPEG_RATIO		I2C_REG(CAT_CAPT_PARM, 0x17, 1)</div><div class='ctx'> </div><div class='ctx'> #define CAPP_MCC_MODE		I2C_REG(CAT_CAPT_PARM, 0x1d, 1)</div><div class='ctx'> #define REG_MCC_OFF		0x00</div><div class='head'>diff --git a/drivers/media/video/marvell-ccic/mcam-core.c b/drivers/media/video/marvell-ccic/mcam-core.c<br/>index 996ac34d9a89..ce2b7b4788d6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/marvell-ccic/mcam-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/marvell-ccic/mcam-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/marvell-ccic/mcam-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/marvell-ccic/mcam-core.c</a></div><div class='hunk'>@@ -1356,7 +1356,6 @@ static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv,</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	mcam_set_config_needed(cam, 1);</div><div class='del'>-	ret = 0;</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;cam-&gt;s_mutex);</div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/drivers/media/video/marvell-ccic/mmp-driver.c b/drivers/media/video/marvell-ccic/mmp-driver.c<br/>index d23552323f45..c4c17fe76c0d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/marvell-ccic/mmp-driver.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/marvell-ccic/mmp-driver.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/marvell-ccic/mmp-driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/marvell-ccic/mmp-driver.c</a></div><div class='hunk'>@@ -181,7 +181,6 @@ static int mmpcam_probe(struct platform_device *pdev)</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;cam-&gt;devlist);</div><div class='ctx'> </div><div class='ctx'> 	mcam = &amp;cam-&gt;mcam;</div><div class='del'>-	mcam-&gt;platform = MHP_Armada610;</div><div class='ctx'> 	mcam-&gt;plat_power_up = mmpcam_power_up;</div><div class='ctx'> 	mcam-&gt;plat_power_down = mmpcam_power_down;</div><div class='ctx'> 	mcam-&gt;dev = &amp;pdev-&gt;dev;</div><div class='head'>diff --git a/drivers/media/video/mem2mem_testdev.c b/drivers/media/video/mem2mem_testdev.c<br/>index 12897e8a3314..d2dec585e61b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/mem2mem_testdev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/mem2mem_testdev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/mem2mem_testdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mem2mem_testdev.c</a></div><div class='hunk'>@@ -40,7 +40,7 @@ MODULE_VERSION("0.1.1");</div><div class='ctx'> #define MIN_H 32</div><div class='ctx'> #define MAX_W 640</div><div class='ctx'> #define MAX_H 480</div><div class='del'>-#define DIM_ALIGN_MASK 0x08 /* 8-alignment for dimensions */</div><div class='add'>+#define DIM_ALIGN_MASK 7 /* 8-byte alignment for line length */</div><div class='ctx'> </div><div class='ctx'> /* Flags that indicate a format can be used for capture/output */</div><div class='ctx'> #define MEM2MEM_CAPTURE	(1 &lt;&lt; 0)</div><div class='hunk'>@@ -958,6 +958,10 @@ static int m2mtest_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	*vfd = m2mtest_videodev;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vfd-&gt;flags);</div><div class='ctx'> 	vfd-&gt;lock = &amp;dev-&gt;dev_mutex;</div><div class='ctx'> </div><div class='ctx'> 	ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0);</div><div class='head'>diff --git a/drivers/media/video/meye.c b/drivers/media/video/meye.c<br/>index b09a3c80a15e..7bc775219f97 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/meye.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/meye.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/meye.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/meye.c</a></div><div class='hunk'>@@ -1570,7 +1570,7 @@ static long vidioc_default(struct file *file, void *fh, bool valid_prio,</div><div class='ctx'> 		return meyeioc_stilljcapt((int *) arg);</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return -ENOTTY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/media/video/msp3400-driver.c b/drivers/media/video/msp3400-driver.c<br/>index 82ce50721de3..aeb22be7dcbd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/msp3400-driver.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/msp3400-driver.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/msp3400-driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/msp3400-driver.c</a></div><div class='hunk'>@@ -597,19 +597,23 @@ static int msp_log_status(struct v4l2_subdev *sd)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int msp_suspend(struct i2c_client *client, pm_message_t state)</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int msp_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct i2c_client *client = to_i2c_client(dev);</div><div class='ctx'> 	v4l_dbg(1, msp_debug, client, "suspend\n");</div><div class='ctx'> 	msp_reset(client);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int msp_resume(struct i2c_client *client)</div><div class='add'>+static int msp_resume(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct i2c_client *client = to_i2c_client(dev);</div><div class='ctx'> 	v4l_dbg(1, msp_debug, client, "resume\n");</div><div class='ctx'> 	msp_wake_thread(client);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /* ----------------------------------------------------------------------- */</div><div class='ctx'> </div><div class='hunk'>@@ -863,6 +867,10 @@ static int msp_remove(struct i2c_client *client)</div><div class='ctx'> </div><div class='ctx'> /* ----------------------------------------------------------------------- */</div><div class='ctx'> </div><div class='add'>+static const struct dev_pm_ops msp3400_pm_ops = {</div><div class='add'>+	SET_SYSTEM_SLEEP_PM_OPS(msp_suspend, msp_resume)</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct i2c_device_id msp_id[] = {</div><div class='ctx'> 	{ "msp3400", 0 },</div><div class='ctx'> 	{ }</div><div class='hunk'>@@ -873,11 +881,10 @@ static struct i2c_driver msp_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 		.name	= "msp3400",</div><div class='add'>+		.pm	= &amp;msp3400_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= msp_probe,</div><div class='ctx'> 	.remove		= msp_remove,</div><div class='del'>-	.suspend	= msp_suspend,</div><div class='del'>-	.resume		= msp_resume,</div><div class='ctx'> 	.id_table	= msp_id,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/mt9m032.c b/drivers/media/video/mt9m032.c<br/>index 645973c5feb0..3c1e626139b7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/mt9m032.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/mt9m032.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/mt9m032.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mt9m032.c</a></div><div class='hunk'>@@ -838,9 +838,9 @@ static int mt9m032_remove(struct i2c_client *client)</div><div class='ctx'> 	struct v4l2_subdev *subdev = i2c_get_clientdata(client);</div><div class='ctx'> 	struct mt9m032 *sensor = to_mt9m032(subdev);</div><div class='ctx'> </div><div class='del'>-	v4l2_device_unregister_subdev(&amp;sensor-&gt;subdev);</div><div class='add'>+	v4l2_device_unregister_subdev(subdev);</div><div class='ctx'> 	v4l2_ctrl_handler_free(&amp;sensor-&gt;ctrls);</div><div class='del'>-	media_entity_cleanup(&amp;sensor-&gt;subdev.entity);</div><div class='add'>+	media_entity_cleanup(&amp;subdev-&gt;entity);</div><div class='ctx'> 	mutex_destroy(&amp;sensor-&gt;lock);</div><div class='ctx'> 	kfree(sensor);</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/media/video/mt9p031.c b/drivers/media/video/mt9p031.c<br/>index c81eaf4fbe01..8f061d9ac443 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/mt9p031.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/mt9p031.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/mt9p031.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mt9p031.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/log2.h&gt;</div><div class='hunk'>@@ -90,7 +91,14 @@</div><div class='ctx'> #define		MT9P031_GLOBAL_GAIN_MAX			1024</div><div class='ctx'> #define		MT9P031_GLOBAL_GAIN_DEF			8</div><div class='ctx'> #define		MT9P031_GLOBAL_GAIN_MULT		(1 &lt;&lt; 6)</div><div class='add'>+#define MT9P031_ROW_BLACK_TARGET			0x49</div><div class='ctx'> #define MT9P031_ROW_BLACK_DEF_OFFSET			0x4b</div><div class='add'>+#define MT9P031_GREEN1_OFFSET				0x60</div><div class='add'>+#define MT9P031_GREEN2_OFFSET				0x61</div><div class='add'>+#define MT9P031_BLACK_LEVEL_CALIBRATION			0x62</div><div class='add'>+#define		MT9P031_BLC_MANUAL_BLC			(1 &lt;&lt; 0)</div><div class='add'>+#define MT9P031_RED_OFFSET				0x63</div><div class='add'>+#define MT9P031_BLUE_OFFSET				0x64</div><div class='ctx'> #define MT9P031_TEST_PATTERN				0xa0</div><div class='ctx'> #define		MT9P031_TEST_PATTERN_SHIFT		3</div><div class='ctx'> #define		MT9P031_TEST_PATTERN_ENABLE		(1 &lt;&lt; 0)</div><div class='hunk'>@@ -99,17 +107,27 @@</div><div class='ctx'> #define MT9P031_TEST_PATTERN_RED			0xa2</div><div class='ctx'> #define MT9P031_TEST_PATTERN_BLUE			0xa3</div><div class='ctx'> </div><div class='add'>+enum mt9p031_model {</div><div class='add'>+	MT9P031_MODEL_COLOR,</div><div class='add'>+	MT9P031_MODEL_MONOCHROME,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mt9p031 {</div><div class='ctx'> 	struct v4l2_subdev subdev;</div><div class='ctx'> 	struct media_pad pad;</div><div class='ctx'> 	struct v4l2_rect crop;  /* Sensor window */</div><div class='ctx'> 	struct v4l2_mbus_framefmt format;</div><div class='del'>-	struct v4l2_ctrl_handler ctrls;</div><div class='ctx'> 	struct mt9p031_platform_data *pdata;</div><div class='ctx'> 	struct mutex power_lock; /* lock to protect power_count */</div><div class='ctx'> 	int power_count;</div><div class='ctx'> </div><div class='add'>+	enum mt9p031_model model;</div><div class='ctx'> 	struct aptina_pll pll;</div><div class='add'>+	int reset;</div><div class='add'>+</div><div class='add'>+	struct v4l2_ctrl_handler ctrls;</div><div class='add'>+	struct v4l2_ctrl *blc_auto;</div><div class='add'>+	struct v4l2_ctrl *blc_offset;</div><div class='ctx'> </div><div class='ctx'> 	/* Registers cache */</div><div class='ctx'> 	u16 output_control;</div><div class='hunk'>@@ -241,8 +259,8 @@ static inline int mt9p031_pll_disable(struct mt9p031 *mt9p031)</div><div class='ctx'> static int mt9p031_power_on(struct mt9p031 *mt9p031)</div><div class='ctx'> {</div><div class='ctx'> 	/* Ensure RESET_BAR is low */</div><div class='del'>-	if (mt9p031-&gt;pdata-&gt;reset) {</div><div class='del'>-		mt9p031-&gt;pdata-&gt;reset(&amp;mt9p031-&gt;subdev, 1);</div><div class='add'>+	if (mt9p031-&gt;reset != -1) {</div><div class='add'>+		gpio_set_value(mt9p031-&gt;reset, 0);</div><div class='ctx'> 		usleep_range(1000, 2000);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -252,8 +270,8 @@ static int mt9p031_power_on(struct mt9p031 *mt9p031)</div><div class='ctx'> 					 mt9p031-&gt;pdata-&gt;ext_freq);</div><div class='ctx'> </div><div class='ctx'> 	/* Now RESET_BAR must be high */</div><div class='del'>-	if (mt9p031-&gt;pdata-&gt;reset) {</div><div class='del'>-		mt9p031-&gt;pdata-&gt;reset(&amp;mt9p031-&gt;subdev, 0);</div><div class='add'>+	if (mt9p031-&gt;reset != -1) {</div><div class='add'>+		gpio_set_value(mt9p031-&gt;reset, 1);</div><div class='ctx'> 		usleep_range(1000, 2000);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -262,8 +280,8 @@ static int mt9p031_power_on(struct mt9p031 *mt9p031)</div><div class='ctx'> </div><div class='ctx'> static void mt9p031_power_off(struct mt9p031 *mt9p031)</div><div class='ctx'> {</div><div class='del'>-	if (mt9p031-&gt;pdata-&gt;reset) {</div><div class='del'>-		mt9p031-&gt;pdata-&gt;reset(&amp;mt9p031-&gt;subdev, 1);</div><div class='add'>+	if (mt9p031-&gt;reset != -1) {</div><div class='add'>+		gpio_set_value(mt9p031-&gt;reset, 0);</div><div class='ctx'> 		usleep_range(1000, 2000);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -557,6 +575,10 @@ static int mt9p031_set_crop(struct v4l2_subdev *subdev,</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define V4L2_CID_TEST_PATTERN		(V4L2_CID_USER_BASE | 0x1001)</div><div class='add'>+#define V4L2_CID_BLC_AUTO		(V4L2_CID_USER_BASE | 0x1002)</div><div class='add'>+#define V4L2_CID_BLC_TARGET_LEVEL	(V4L2_CID_USER_BASE | 0x1003)</div><div class='add'>+#define V4L2_CID_BLC_ANALOG_OFFSET	(V4L2_CID_USER_BASE | 0x1004)</div><div class='add'>+#define V4L2_CID_BLC_DIGITAL_OFFSET	(V4L2_CID_USER_BASE | 0x1005)</div><div class='ctx'> </div><div class='ctx'> static int mt9p031_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='hunk'>@@ -621,11 +643,17 @@ static int mt9p031_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> </div><div class='ctx'> 	case V4L2_CID_TEST_PATTERN:</div><div class='ctx'> 		if (!ctrl-&gt;val) {</div><div class='del'>-			ret = mt9p031_set_mode2(mt9p031,</div><div class='del'>-					0, MT9P031_READ_MODE_2_ROW_BLC);</div><div class='del'>-			if (ret &lt; 0)</div><div class='del'>-				return ret;</div><div class='del'>-</div><div class='add'>+			/* Restore the black level compensation settings. */</div><div class='add'>+			if (mt9p031-&gt;blc_auto-&gt;cur.val != 0) {</div><div class='add'>+				ret = mt9p031_s_ctrl(mt9p031-&gt;blc_auto);</div><div class='add'>+				if (ret &lt; 0)</div><div class='add'>+					return ret;</div><div class='add'>+			}</div><div class='add'>+			if (mt9p031-&gt;blc_offset-&gt;cur.val != 0) {</div><div class='add'>+				ret = mt9p031_s_ctrl(mt9p031-&gt;blc_offset);</div><div class='add'>+				if (ret &lt; 0)</div><div class='add'>+					return ret;</div><div class='add'>+			}</div><div class='ctx'> 			return mt9p031_write(client, MT9P031_TEST_PATTERN,</div><div class='ctx'> 					     MT9P031_TEST_PATTERN_DISABLE);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -640,10 +668,14 @@ static int mt9p031_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='add'>+		/* Disable digital black level compensation when using a test</div><div class='add'>+		 * pattern.</div><div class='add'>+		 */</div><div class='ctx'> 		ret = mt9p031_set_mode2(mt9p031, MT9P031_READ_MODE_2_ROW_BLC,</div><div class='ctx'> 					0);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='add'>+</div><div class='ctx'> 		ret = mt9p031_write(client, MT9P031_ROW_BLACK_DEF_OFFSET, 0);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='hunk'>@@ -651,7 +683,40 @@ static int mt9p031_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> 		return mt9p031_write(client, MT9P031_TEST_PATTERN,</div><div class='ctx'> 				((ctrl-&gt;val - 1) &lt;&lt; MT9P031_TEST_PATTERN_SHIFT)</div><div class='ctx'> 				| MT9P031_TEST_PATTERN_ENABLE);</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_BLC_AUTO:</div><div class='add'>+		ret = mt9p031_set_mode2(mt9p031,</div><div class='add'>+				ctrl-&gt;val ? 0 : MT9P031_READ_MODE_2_ROW_BLC,</div><div class='add'>+				ctrl-&gt;val ? MT9P031_READ_MODE_2_ROW_BLC : 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		return mt9p031_write(client, MT9P031_BLACK_LEVEL_CALIBRATION,</div><div class='add'>+				     ctrl-&gt;val ? 0 : MT9P031_BLC_MANUAL_BLC);</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_BLC_TARGET_LEVEL:</div><div class='add'>+		return mt9p031_write(client, MT9P031_ROW_BLACK_TARGET,</div><div class='add'>+				     ctrl-&gt;val);</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_BLC_ANALOG_OFFSET:</div><div class='add'>+		data = ctrl-&gt;val &amp; ((1 &lt;&lt; 9) - 1);</div><div class='add'>+</div><div class='add'>+		ret = mt9p031_write(client, MT9P031_GREEN1_OFFSET, data);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		ret = mt9p031_write(client, MT9P031_GREEN2_OFFSET, data);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		ret = mt9p031_write(client, MT9P031_RED_OFFSET, data);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		return mt9p031_write(client, MT9P031_BLUE_OFFSET, data);</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_BLC_DIGITAL_OFFSET:</div><div class='add'>+		return mt9p031_write(client, MT9P031_ROW_BLACK_DEF_OFFSET,</div><div class='add'>+				     ctrl-&gt;val &amp; ((1 &lt;&lt; 12) - 1));</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -685,6 +750,46 @@ static const struct v4l2_ctrl_config mt9p031_ctrls[] = {</div><div class='ctx'> 		.flags		= 0,</div><div class='ctx'> 		.menu_skip_mask	= 0,</div><div class='ctx'> 		.qmenu		= mt9p031_test_pattern_menu,</div><div class='add'>+	}, {</div><div class='add'>+		.ops		= &amp;mt9p031_ctrl_ops,</div><div class='add'>+		.id		= V4L2_CID_BLC_AUTO,</div><div class='add'>+		.type		= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='add'>+		.name		= "BLC, Auto",</div><div class='add'>+		.min		= 0,</div><div class='add'>+		.max		= 1,</div><div class='add'>+		.step		= 1,</div><div class='add'>+		.def		= 1,</div><div class='add'>+		.flags		= 0,</div><div class='add'>+	}, {</div><div class='add'>+		.ops		= &amp;mt9p031_ctrl_ops,</div><div class='add'>+		.id		= V4L2_CID_BLC_TARGET_LEVEL,</div><div class='add'>+		.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='add'>+		.name		= "BLC Target Level",</div><div class='add'>+		.min		= 0,</div><div class='add'>+		.max		= 4095,</div><div class='add'>+		.step		= 1,</div><div class='add'>+		.def		= 168,</div><div class='add'>+		.flags		= 0,</div><div class='add'>+	}, {</div><div class='add'>+		.ops		= &amp;mt9p031_ctrl_ops,</div><div class='add'>+		.id		= V4L2_CID_BLC_ANALOG_OFFSET,</div><div class='add'>+		.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='add'>+		.name		= "BLC Analog Offset",</div><div class='add'>+		.min		= -255,</div><div class='add'>+		.max		= 255,</div><div class='add'>+		.step		= 1,</div><div class='add'>+		.def		= 32,</div><div class='add'>+		.flags		= 0,</div><div class='add'>+	}, {</div><div class='add'>+		.ops		= &amp;mt9p031_ctrl_ops,</div><div class='add'>+		.id		= V4L2_CID_BLC_DIGITAL_OFFSET,</div><div class='add'>+		.type		= V4L2_CTRL_TYPE_INTEGER,</div><div class='add'>+		.name		= "BLC Digital Offset",</div><div class='add'>+		.min		= -2048,</div><div class='add'>+		.max		= 2047,</div><div class='add'>+		.step		= 1,</div><div class='add'>+		.def		= 40,</div><div class='add'>+		.flags		= 0,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -764,7 +869,7 @@ static int mt9p031_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)</div><div class='ctx'> </div><div class='ctx'> 	format = v4l2_subdev_get_try_format(fh, 0);</div><div class='ctx'> </div><div class='del'>-	if (mt9p031-&gt;pdata-&gt;version == MT9P031_MONOCHROME_VERSION)</div><div class='add'>+	if (mt9p031-&gt;model == MT9P031_MODEL_MONOCHROME)</div><div class='ctx'> 		format-&gt;code = V4L2_MBUS_FMT_Y12_1X12;</div><div class='ctx'> 	else</div><div class='ctx'> 		format-&gt;code = V4L2_MBUS_FMT_SGRBG12_1X12;</div><div class='hunk'>@@ -842,6 +947,8 @@ static int mt9p031_probe(struct i2c_client *client,</div><div class='ctx'> 	mt9p031-&gt;pdata = pdata;</div><div class='ctx'> 	mt9p031-&gt;output_control	= MT9P031_OUTPUT_CONTROL_DEF;</div><div class='ctx'> 	mt9p031-&gt;mode2 = MT9P031_READ_MODE_2_ROW_BLC;</div><div class='add'>+	mt9p031-&gt;model = did-&gt;driver_data;</div><div class='add'>+	mt9p031-&gt;reset = -1;</div><div class='ctx'> </div><div class='ctx'> 	v4l2_ctrl_handler_init(&amp;mt9p031-&gt;ctrls, ARRAY_SIZE(mt9p031_ctrls) + 4);</div><div class='ctx'> </div><div class='hunk'>@@ -862,9 +969,16 @@ static int mt9p031_probe(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> 	mt9p031-&gt;subdev.ctrl_handler = &amp;mt9p031-&gt;ctrls;</div><div class='ctx'> </div><div class='del'>-	if (mt9p031-&gt;ctrls.error)</div><div class='add'>+	if (mt9p031-&gt;ctrls.error) {</div><div class='ctx'> 		printk(KERN_INFO "%s: control initialization error %d\n",</div><div class='ctx'> 		       __func__, mt9p031-&gt;ctrls.error);</div><div class='add'>+		ret = mt9p031-&gt;ctrls.error;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mt9p031-&gt;blc_auto = v4l2_ctrl_find(&amp;mt9p031-&gt;ctrls, V4L2_CID_BLC_AUTO);</div><div class='add'>+	mt9p031-&gt;blc_offset = v4l2_ctrl_find(&amp;mt9p031-&gt;ctrls,</div><div class='add'>+					     V4L2_CID_BLC_DIGITAL_OFFSET);</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;mt9p031-&gt;power_lock);</div><div class='ctx'> 	v4l2_i2c_subdev_init(&amp;mt9p031-&gt;subdev, client, &amp;mt9p031_subdev_ops);</div><div class='hunk'>@@ -882,7 +996,7 @@ static int mt9p031_probe(struct i2c_client *client,</div><div class='ctx'> 	mt9p031-&gt;crop.left = MT9P031_COLUMN_START_DEF;</div><div class='ctx'> 	mt9p031-&gt;crop.top = MT9P031_ROW_START_DEF;</div><div class='ctx'> </div><div class='del'>-	if (mt9p031-&gt;pdata-&gt;version == MT9P031_MONOCHROME_VERSION)</div><div class='add'>+	if (mt9p031-&gt;model == MT9P031_MODEL_MONOCHROME)</div><div class='ctx'> 		mt9p031-&gt;format.code = V4L2_MBUS_FMT_Y12_1X12;</div><div class='ctx'> 	else</div><div class='ctx'> 		mt9p031-&gt;format.code = V4L2_MBUS_FMT_SGRBG12_1X12;</div><div class='hunk'>@@ -892,10 +1006,22 @@ static int mt9p031_probe(struct i2c_client *client,</div><div class='ctx'> 	mt9p031-&gt;format.field = V4L2_FIELD_NONE;</div><div class='ctx'> 	mt9p031-&gt;format.colorspace = V4L2_COLORSPACE_SRGB;</div><div class='ctx'> </div><div class='add'>+	if (pdata-&gt;reset != -1) {</div><div class='add'>+		ret = gpio_request_one(pdata-&gt;reset, GPIOF_OUT_INIT_LOW,</div><div class='add'>+				       "mt9p031_rst");</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto done;</div><div class='add'>+</div><div class='add'>+		mt9p031-&gt;reset = pdata-&gt;reset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = mt9p031_pll_setup(mt9p031);</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='add'>+		if (mt9p031-&gt;reset != -1)</div><div class='add'>+			gpio_free(mt9p031-&gt;reset);</div><div class='add'>+</div><div class='ctx'> 		v4l2_ctrl_handler_free(&amp;mt9p031-&gt;ctrls);</div><div class='ctx'> 		media_entity_cleanup(&amp;mt9p031-&gt;subdev.entity);</div><div class='ctx'> 		kfree(mt9p031);</div><div class='hunk'>@@ -912,13 +1038,16 @@ static int mt9p031_remove(struct i2c_client *client)</div><div class='ctx'> 	v4l2_ctrl_handler_free(&amp;mt9p031-&gt;ctrls);</div><div class='ctx'> 	v4l2_device_unregister_subdev(subdev);</div><div class='ctx'> 	media_entity_cleanup(&amp;subdev-&gt;entity);</div><div class='add'>+	if (mt9p031-&gt;reset != -1)</div><div class='add'>+		gpio_free(mt9p031-&gt;reset);</div><div class='ctx'> 	kfree(mt9p031);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct i2c_device_id mt9p031_id[] = {</div><div class='del'>-	{ "mt9p031", 0 },</div><div class='add'>+	{ "mt9p031", MT9P031_MODEL_COLOR },</div><div class='add'>+	{ "mt9p031m", MT9P031_MODEL_MONOCHROME },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(i2c, mt9p031_id);</div><div class='head'>diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c<br/>index 8d1445f12708..e1ae46a7ee96 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/mt9t112.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/mt9t112.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/mt9t112.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mt9t112.c</a></div><div class='hunk'>@@ -453,6 +453,7 @@ static int mt9t112_init_pll(const struct i2c_client *client)</div><div class='ctx'> 	 * I2C Master Clock Divider</div><div class='ctx'> 	 */</div><div class='ctx'> 	mt9t112_reg_write(ret, client, 0x0014, 0x3046);</div><div class='add'>+	mt9t112_reg_write(ret, client, 0x0016, 0x0400); /* JPEG initialization workaround */</div><div class='ctx'> 	mt9t112_reg_write(ret, client, 0x0022, 0x0190);</div><div class='ctx'> 	mt9t112_reg_write(ret, client, 0x3B84, 0x0212);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/mt9v032.c b/drivers/media/video/mt9v032.c<br/>index 75e253a343c5..4ba4884c016e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/mt9v032.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/mt9v032.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/mt9v032.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mt9v032.c</a></div><div class='hunk'>@@ -481,7 +481,7 @@ static int mt9v032_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> </div><div class='ctx'> 	case V4L2_CID_EXPOSURE_AUTO:</div><div class='ctx'> 		return mt9v032_update_aec_agc(mt9v032, MT9V032_AEC_ENABLE,</div><div class='del'>-					      ctrl-&gt;val);</div><div class='add'>+					      !ctrl-&gt;val);</div><div class='ctx'> </div><div class='ctx'> 	case V4L2_CID_EXPOSURE:</div><div class='ctx'> 		return mt9v032_write(client, MT9V032_TOTAL_SHUTTER_WIDTH,</div><div class='head'>diff --git a/drivers/media/video/mx1_camera.c b/drivers/media/video/mx1_camera.c<br/>index 055d11ddb038..4296a8350298 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/mx1_camera.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/mx1_camera.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/mx1_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mx1_camera.c</a></div><div class='hunk'>@@ -126,13 +126,8 @@ static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,</div><div class='ctx'> 			      unsigned int *size)</div><div class='ctx'> {</div><div class='ctx'> 	struct soc_camera_device *icd = vq-&gt;priv_data;</div><div class='del'>-	int bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-						icd-&gt;current_fmt-&gt;host_fmt);</div><div class='ctx'> </div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		return bytes_per_line;</div><div class='del'>-</div><div class='del'>-	*size = bytes_per_line * icd-&gt;user_height;</div><div class='add'>+	*size = icd-&gt;sizeimage;</div><div class='ctx'> </div><div class='ctx'> 	if (!*count)</div><div class='ctx'> 		*count = 32;</div><div class='hunk'>@@ -171,11 +166,6 @@ static int mx1_videobuf_prepare(struct videobuf_queue *vq,</div><div class='ctx'> 	struct soc_camera_device *icd = vq-&gt;priv_data;</div><div class='ctx'> 	struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);</div><div class='ctx'> 	int ret;</div><div class='del'>-	int bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-						icd-&gt;current_fmt-&gt;host_fmt);</div><div class='del'>-</div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		return bytes_per_line;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(icd-&gt;parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,</div><div class='ctx'> 		vb, vb-&gt;baddr, vb-&gt;bsize);</div><div class='hunk'>@@ -202,7 +192,7 @@ static int mx1_videobuf_prepare(struct videobuf_queue *vq,</div><div class='ctx'> 		vb-&gt;state	= VIDEOBUF_NEEDS_INIT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vb-&gt;size = bytes_per_line * vb-&gt;height;</div><div class='add'>+	vb-&gt;size = icd-&gt;sizeimage;</div><div class='ctx'> 	if (0 != vb-&gt;baddr &amp;&amp; vb-&gt;bsize &lt; vb-&gt;size) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='head'>diff --git a/drivers/media/video/mx2_camera.c b/drivers/media/video/mx2_camera.c<br/>index 18afaeeadb7b..ded26b7286fa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/mx2_camera.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/mx2_camera.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/mx2_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mx2_camera.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/gcd.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/math64.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='hunk'>@@ -344,6 +345,19 @@ static struct mx2_fmt_cfg mx27_emma_prp_table[] = {</div><div class='ctx'> 					PRP_INTR_CH2OVF,</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.in_fmt		= V4L2_MBUS_FMT_UYVY8_2X8,</div><div class='add'>+		.out_fmt	= V4L2_PIX_FMT_YUV420,</div><div class='add'>+		.cfg		= {</div><div class='add'>+			.channel	= 2,</div><div class='add'>+			.in_fmt		= PRP_CNTL_DATA_IN_YUV422,</div><div class='add'>+			.out_fmt	= PRP_CNTL_CH2_OUT_YUV420,</div><div class='add'>+			.src_pixel	= 0x22000888, /* YUV422 (YUYV) */</div><div class='add'>+			.irq_flags	= PRP_INTR_RDERR | PRP_INTR_CH2WERR |</div><div class='add'>+					PRP_INTR_CH2FC | PRP_INTR_LBOVF |</div><div class='add'>+					PRP_INTR_CH2OVF,</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct mx2_fmt_cfg *mx27_emma_prp_get_format(</div><div class='hunk'>@@ -525,8 +539,6 @@ static int mx2_videobuf_setup(struct vb2_queue *vq,</div><div class='ctx'> 	struct soc_camera_device *icd = soc_camera_from_vb2q(vq);</div><div class='ctx'> 	struct soc_camera_host *ici = to_soc_camera_host(icd-&gt;parent);</div><div class='ctx'> 	struct mx2_camera_dev *pcdev = ici-&gt;priv;</div><div class='del'>-	int bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-			icd-&gt;current_fmt-&gt;host_fmt);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(icd-&gt;parent, "count=%d, size=%d\n", *count, sizes[0]);</div><div class='ctx'> </div><div class='hunk'>@@ -534,12 +546,9 @@ static int mx2_videobuf_setup(struct vb2_queue *vq,</div><div class='ctx'> 	if (fmt != NULL)</div><div class='ctx'> 		return -ENOTTY;</div><div class='ctx'> </div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		return bytes_per_line;</div><div class='del'>-</div><div class='ctx'> 	alloc_ctxs[0] = pcdev-&gt;alloc_ctx;</div><div class='ctx'> </div><div class='del'>-	sizes[0] = bytes_per_line * icd-&gt;user_height;</div><div class='add'>+	sizes[0] = icd-&gt;sizeimage;</div><div class='ctx'> </div><div class='ctx'> 	if (0 == *count)</div><div class='ctx'> 		*count = 32;</div><div class='hunk'>@@ -555,16 +564,11 @@ static int mx2_videobuf_setup(struct vb2_queue *vq,</div><div class='ctx'> static int mx2_videobuf_prepare(struct vb2_buffer *vb)</div><div class='ctx'> {</div><div class='ctx'> 	struct soc_camera_device *icd = soc_camera_from_vb2q(vb-&gt;vb2_queue);</div><div class='del'>-	int bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-			icd-&gt;current_fmt-&gt;host_fmt);</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(icd-&gt;parent, "%s (vb=0x%p) 0x%p %lu\n", __func__,</div><div class='ctx'> 		vb, vb2_plane_vaddr(vb, 0), vb2_get_plane_payload(vb, 0));</div><div class='ctx'> </div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		return bytes_per_line;</div><div class='del'>-</div><div class='ctx'> #ifdef DEBUG</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This can be useful if you want to see if we actually fill</div><div class='hunk'>@@ -574,7 +578,7 @@ static int mx2_videobuf_prepare(struct vb2_buffer *vb)</div><div class='ctx'> 	       0xaa, vb2_get_plane_payload(vb, 0));</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	vb2_set_plane_payload(vb, 0, bytes_per_line * icd-&gt;user_height);</div><div class='add'>+	vb2_set_plane_payload(vb, 0, icd-&gt;sizeimage);</div><div class='ctx'> 	if (vb2_plane_vaddr(vb, 0) &amp;&amp;</div><div class='ctx'> 	    vb2_get_plane_payload(vb, 0) &gt; vb2_plane_size(vb, 0)) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -980,6 +984,7 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd)</div><div class='ctx'> 	struct soc_camera_host *ici = to_soc_camera_host(icd-&gt;parent);</div><div class='ctx'> 	struct mx2_camera_dev *pcdev = ici-&gt;priv;</div><div class='ctx'> 	struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};</div><div class='add'>+	const struct soc_camera_format_xlate *xlate;</div><div class='ctx'> 	unsigned long common_flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int bytesperline;</div><div class='hunk'>@@ -1024,14 +1029,31 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);</div><div class='add'>+	if (!xlate) {</div><div class='add'>+		dev_warn(icd-&gt;parent, "Format %x not found\n", pixfmt);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (xlate-&gt;code == V4L2_MBUS_FMT_YUYV8_2X8) {</div><div class='add'>+		csicr1 |= CSICR1_PACK_DIR;</div><div class='add'>+		csicr1 &amp;= ~CSICR1_SWAP16_EN;</div><div class='add'>+		dev_dbg(icd-&gt;parent, "already yuyv format, don't convert\n");</div><div class='add'>+	} else if (xlate-&gt;code == V4L2_MBUS_FMT_UYVY8_2X8) {</div><div class='add'>+		csicr1 &amp;= ~CSICR1_PACK_DIR;</div><div class='add'>+		csicr1 |= CSICR1_SWAP16_EN;</div><div class='add'>+		dev_dbg(icd-&gt;parent, "convert uyvy mbus format into yuyv\n");</div><div class='add'>+	} else {</div><div class='add'>+		dev_warn(icd-&gt;parent, "mbus format not supported\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (common_flags &amp; V4L2_MBUS_PCLK_SAMPLE_RISING)</div><div class='ctx'> 		csicr1 |= CSICR1_REDGE;</div><div class='ctx'> 	if (common_flags &amp; V4L2_MBUS_VSYNC_ACTIVE_HIGH)</div><div class='ctx'> 		csicr1 |= CSICR1_SOF_POL;</div><div class='ctx'> 	if (common_flags &amp; V4L2_MBUS_HSYNC_ACTIVE_HIGH)</div><div class='ctx'> 		csicr1 |= CSICR1_HSYNC_POL;</div><div class='del'>-	if (pcdev-&gt;platform_flags &amp; MX2_CAMERA_SWAP16)</div><div class='del'>-		csicr1 |= CSICR1_SWAP16_EN;</div><div class='ctx'> 	if (pcdev-&gt;platform_flags &amp; MX2_CAMERA_EXT_VSYNC)</div><div class='ctx'> 		csicr1 |= CSICR1_EXT_VSYNC;</div><div class='ctx'> 	if (pcdev-&gt;platform_flags &amp; MX2_CAMERA_CCIR)</div><div class='hunk'>@@ -1042,8 +1064,6 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd)</div><div class='ctx'> 		csicr1 |= CSICR1_GCLK_MODE;</div><div class='ctx'> 	if (pcdev-&gt;platform_flags &amp; MX2_CAMERA_INV_DATA)</div><div class='ctx'> 		csicr1 |= CSICR1_INV_DATA;</div><div class='del'>-	if (pcdev-&gt;platform_flags &amp; MX2_CAMERA_PACK_DIR_MSB)</div><div class='del'>-		csicr1 |= CSICR1_PACK_DIR;</div><div class='ctx'> </div><div class='ctx'> 	pcdev-&gt;csicr1 = csicr1;</div><div class='ctx'> </div><div class='hunk'>@@ -1118,7 +1138,8 @@ static int mx2_camera_get_formats(struct soc_camera_device *icd,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (code == V4L2_MBUS_FMT_YUYV8_2X8) {</div><div class='add'>+	if (code == V4L2_MBUS_FMT_YUYV8_2X8 ||</div><div class='add'>+	    code == V4L2_MBUS_FMT_UYVY8_2X8) {</div><div class='ctx'> 		formats++;</div><div class='ctx'> 		if (xlate) {</div><div class='ctx'> 			/*</div><div class='hunk'>@@ -1134,6 +1155,18 @@ static int mx2_camera_get_formats(struct soc_camera_device *icd,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (code == V4L2_MBUS_FMT_UYVY8_2X8) {</div><div class='add'>+		formats++;</div><div class='add'>+		if (xlate) {</div><div class='add'>+			xlate-&gt;host_fmt =</div><div class='add'>+				soc_mbus_get_fmtdesc(V4L2_MBUS_FMT_YUYV8_2X8);</div><div class='add'>+			xlate-&gt;code	= code;</div><div class='add'>+			dev_dbg(dev, "Providing host format %s for sensor code %d\n",</div><div class='add'>+				xlate-&gt;host_fmt-&gt;name, code);</div><div class='add'>+			xlate++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Generic pass-trough */</div><div class='ctx'> 	formats++;</div><div class='ctx'> 	if (xlate) {</div><div class='hunk'>@@ -1363,17 +1396,20 @@ static int mx2_camera_try_fmt(struct soc_camera_device *icd,</div><div class='ctx'> 				xlate-&gt;host_fmt);</div><div class='ctx'> 		if (pix-&gt;bytesperline &lt; 0)</div><div class='ctx'> 			return pix-&gt;bytesperline;</div><div class='del'>-		pix-&gt;sizeimage = pix-&gt;height * pix-&gt;bytesperline;</div><div class='add'>+		pix-&gt;sizeimage = soc_mbus_image_size(xlate-&gt;host_fmt,</div><div class='add'>+						pix-&gt;bytesperline, pix-&gt;height);</div><div class='ctx'> 		/* Check against the CSIRXCNT limit */</div><div class='ctx'> 		if (pix-&gt;sizeimage &gt; 4 * 0x3ffff) {</div><div class='ctx'> 			/* Adjust geometry, preserve aspect ratio */</div><div class='del'>-			unsigned int new_height = int_sqrt(4 * 0x3ffff *</div><div class='del'>-					pix-&gt;height / pix-&gt;bytesperline);</div><div class='add'>+			unsigned int new_height = int_sqrt(div_u64(0x3ffffULL *</div><div class='add'>+					4 * pix-&gt;height, pix-&gt;bytesperline));</div><div class='ctx'> 			pix-&gt;width = new_height * pix-&gt;width / pix-&gt;height;</div><div class='ctx'> 			pix-&gt;height = new_height;</div><div class='ctx'> 			pix-&gt;bytesperline = soc_mbus_bytes_per_line(pix-&gt;width,</div><div class='ctx'> 							xlate-&gt;host_fmt);</div><div class='ctx'> 			BUG_ON(pix-&gt;bytesperline &lt; 0);</div><div class='add'>+			pix-&gt;sizeimage = soc_mbus_image_size(xlate-&gt;host_fmt,</div><div class='add'>+						pix-&gt;bytesperline, pix-&gt;height);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1752,6 +1788,8 @@ static int __devinit mx2_camera_probe(struct platform_device *pdev)</div><div class='ctx'> 	pcdev-&gt;soc_host.priv		= pcdev;</div><div class='ctx'> 	pcdev-&gt;soc_host.v4l2_dev.dev	= &amp;pdev-&gt;dev;</div><div class='ctx'> 	pcdev-&gt;soc_host.nr		= pdev-&gt;id;</div><div class='add'>+	if (cpu_is_mx25())</div><div class='add'>+		pcdev-&gt;soc_host.capabilities = SOCAM_HOST_CAP_STRIDE;</div><div class='ctx'> </div><div class='ctx'> 	pcdev-&gt;alloc_ctx = vb2_dma_contig_init_ctx(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (IS_ERR(pcdev-&gt;alloc_ctx)) {</div><div class='head'>diff --git a/drivers/media/video/mx2_emmaprp.c b/drivers/media/video/mx2_emmaprp.c<br/>index ba89a7401c8c..0bd5815de369 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/mx2_emmaprp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/mx2_emmaprp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/mx2_emmaprp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mx2_emmaprp.c</a></div><div class='hunk'>@@ -755,7 +755,7 @@ static int queue_init(void *priv, struct vb2_queue *src_vq,</div><div class='ctx'> </div><div class='ctx'> 	memset(src_vq, 0, sizeof(*src_vq));</div><div class='ctx'> 	src_vq-&gt;type = V4L2_BUF_TYPE_VIDEO_OUTPUT;</div><div class='del'>-	src_vq-&gt;io_modes = VB2_MMAP;</div><div class='add'>+	src_vq-&gt;io_modes = VB2_MMAP | VB2_USERPTR;</div><div class='ctx'> 	src_vq-&gt;drv_priv = ctx;</div><div class='ctx'> 	src_vq-&gt;buf_struct_size = sizeof(struct v4l2_m2m_buffer);</div><div class='ctx'> 	src_vq-&gt;ops = &amp;emmaprp_qops;</div><div class='hunk'>@@ -767,7 +767,7 @@ static int queue_init(void *priv, struct vb2_queue *src_vq,</div><div class='ctx'> </div><div class='ctx'> 	memset(dst_vq, 0, sizeof(*dst_vq));</div><div class='ctx'> 	dst_vq-&gt;type = V4L2_BUF_TYPE_VIDEO_CAPTURE;</div><div class='del'>-	dst_vq-&gt;io_modes = VB2_MMAP;</div><div class='add'>+	dst_vq-&gt;io_modes = VB2_MMAP | VB2_USERPTR;</div><div class='ctx'> 	dst_vq-&gt;drv_priv = ctx;</div><div class='ctx'> 	dst_vq-&gt;buf_struct_size = sizeof(struct v4l2_m2m_buffer);</div><div class='ctx'> 	dst_vq-&gt;ops = &amp;emmaprp_qops;</div><div class='hunk'>@@ -904,6 +904,10 @@ static int emmaprp_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	*vfd = emmaprp_videodev;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vfd-&gt;flags);</div><div class='ctx'> 	vfd-&gt;lock = &amp;pcdev-&gt;dev_mutex;</div><div class='ctx'> </div><div class='ctx'> 	video_set_drvdata(vfd, pcdev);</div><div class='head'>diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c<br/>index 93c35ef5f0ad..f13643d31353 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/mx3_camera.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/mx3_camera.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/mx3_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mx3_camera.c</a></div><div class='hunk'>@@ -199,8 +199,6 @@ static int mx3_videobuf_setup(struct vb2_queue *vq,</div><div class='ctx'> 	struct soc_camera_device *icd = soc_camera_from_vb2q(vq);</div><div class='ctx'> 	struct soc_camera_host *ici = to_soc_camera_host(icd-&gt;parent);</div><div class='ctx'> 	struct mx3_camera_dev *mx3_cam = ici-&gt;priv;</div><div class='del'>-	int bytes_per_line;</div><div class='del'>-	unsigned int height;</div><div class='ctx'> </div><div class='ctx'> 	if (!mx3_cam-&gt;idmac_channel[0])</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -208,21 +206,29 @@ static int mx3_videobuf_setup(struct vb2_queue *vq,</div><div class='ctx'> 	if (fmt) {</div><div class='ctx'> 		const struct soc_camera_format_xlate *xlate = soc_camera_xlate_by_fourcc(icd,</div><div class='ctx'> 								fmt-&gt;fmt.pix.pixelformat);</div><div class='add'>+		unsigned int bytes_per_line;</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='ctx'> 		if (!xlate)</div><div class='ctx'> 			return -EINVAL;</div><div class='del'>-		bytes_per_line = soc_mbus_bytes_per_line(fmt-&gt;fmt.pix.width,</div><div class='del'>-							 xlate-&gt;host_fmt);</div><div class='del'>-		height = fmt-&gt;fmt.pix.height;</div><div class='add'>+</div><div class='add'>+		ret = soc_mbus_bytes_per_line(fmt-&gt;fmt.pix.width,</div><div class='add'>+					      xlate-&gt;host_fmt);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		bytes_per_line = max_t(u32, fmt-&gt;fmt.pix.bytesperline, ret);</div><div class='add'>+</div><div class='add'>+		ret = soc_mbus_image_size(xlate-&gt;host_fmt, bytes_per_line,</div><div class='add'>+					  fmt-&gt;fmt.pix.height);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		sizes[0] = max_t(u32, fmt-&gt;fmt.pix.sizeimage, ret);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Called from VIDIOC_REQBUFS or in compatibility mode */</div><div class='del'>-		bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-						icd-&gt;current_fmt-&gt;host_fmt);</div><div class='del'>-		height = icd-&gt;user_height;</div><div class='add'>+		sizes[0] = icd-&gt;sizeimage;</div><div class='ctx'> 	}</div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		return bytes_per_line;</div><div class='del'>-</div><div class='del'>-	sizes[0] = bytes_per_line * height;</div><div class='ctx'> </div><div class='ctx'> 	alloc_ctxs[0] = mx3_cam-&gt;alloc_ctx;</div><div class='ctx'> </div><div class='hunk'>@@ -267,14 +273,11 @@ static void mx3_videobuf_queue(struct vb2_buffer *vb)</div><div class='ctx'> 	struct idmac_channel *ichan = mx3_cam-&gt;idmac_channel[0];</div><div class='ctx'> 	struct idmac_video_param *video = &amp;ichan-&gt;params.video;</div><div class='ctx'> 	const struct soc_mbus_pixelfmt *host_fmt = icd-&gt;current_fmt-&gt;host_fmt;</div><div class='del'>-	int bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width, host_fmt);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	dma_cookie_t cookie;</div><div class='ctx'> 	size_t new_size;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(bytes_per_line &lt;= 0);</div><div class='del'>-</div><div class='del'>-	new_size = bytes_per_line * icd-&gt;user_height;</div><div class='add'>+	new_size = icd-&gt;sizeimage;</div><div class='ctx'> </div><div class='ctx'> 	if (vb2_plane_size(vb, 0) &lt; new_size) {</div><div class='ctx'> 		dev_err(icd-&gt;parent, "Buffer #%d too small (%lu &lt; %zu)\n",</div><div class='hunk'>@@ -314,9 +317,9 @@ static void mx3_videobuf_queue(struct vb2_buffer *vb)</div><div class='ctx'> 		 * horizontal parameters in this case are expressed in bytes,</div><div class='ctx'> 		 * not in pixels.</div><div class='ctx'> 		 */</div><div class='del'>-		video-&gt;out_width	= bytes_per_line;</div><div class='add'>+		video-&gt;out_width	= icd-&gt;bytesperline;</div><div class='ctx'> 		video-&gt;out_height	= icd-&gt;user_height;</div><div class='del'>-		video-&gt;out_stride	= bytes_per_line;</div><div class='add'>+		video-&gt;out_stride	= icd-&gt;bytesperline;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * For IPU known formats the pixel unit will be managed</div><div class='hunk'>@@ -508,7 +511,7 @@ static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,</div><div class='ctx'> 	/* ipu_csi_init_interface() */</div><div class='ctx'> 	csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);</div><div class='ctx'> </div><div class='del'>-	clk_enable(mx3_cam-&gt;clk);</div><div class='add'>+	clk_prepare_enable(mx3_cam-&gt;clk);</div><div class='ctx'> 	rate = clk_round_rate(mx3_cam-&gt;clk, mx3_cam-&gt;mclk);</div><div class='ctx'> 	dev_dbg(icd-&gt;parent, "Set SENS_CONF to %x, rate %ld\n", conf, rate);</div><div class='ctx'> 	if (rate)</div><div class='hunk'>@@ -549,7 +552,7 @@ static void mx3_camera_remove_device(struct soc_camera_device *icd)</div><div class='ctx'> 		*ichan = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	clk_disable(mx3_cam-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(mx3_cam-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	mx3_cam-&gt;icd = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -642,12 +645,14 @@ static const struct soc_mbus_pixelfmt mx3_camera_formats[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_NONE,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.fourcc			= V4L2_PIX_FMT_GREY,</div><div class='ctx'> 		.name			= "Monochrome 8 bit",</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_NONE,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/mxb.c b/drivers/media/video/mxb.c<br/>index 2e4131748438..b520a45cb3f3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/mxb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/mxb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/mxb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/mxb.c</a></div><div class='hunk'>@@ -31,10 +31,11 @@</div><div class='ctx'> #include &lt;media/saa7115.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "mxb.h"</div><div class='ctx'> #include "tea6415c.h"</div><div class='ctx'> #include "tea6420.h"</div><div class='ctx'> </div><div class='add'>+#define MXB_AUDIOS	6</div><div class='add'>+</div><div class='ctx'> #define I2C_SAA7111A  0x24</div><div class='ctx'> #define	I2C_TDA9840   0x42</div><div class='ctx'> #define	I2C_TEA6415C  0x43</div><div class='hunk'>@@ -62,10 +63,14 @@ MODULE_PARM_DESC(debug, "Turn on/off device debugging (default:off).");</div><div class='ctx'> enum { TUNER, AUX1, AUX3, AUX3_YC };</div><div class='ctx'> </div><div class='ctx'> static struct v4l2_input mxb_inputs[MXB_INPUTS] = {</div><div class='del'>-	{ TUNER,	"Tuner",		V4L2_INPUT_TYPE_TUNER,	1, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ AUX1,		"AUX1",			V4L2_INPUT_TYPE_CAMERA,	2, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ AUX3,		"AUX3 Composite",	V4L2_INPUT_TYPE_CAMERA,	4, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='del'>-	{ AUX3_YC,	"AUX3 S-Video",		V4L2_INPUT_TYPE_CAMERA,	4, 0, V4L2_STD_PAL_BG|V4L2_STD_NTSC_M, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ TUNER,   "Tuner",          V4L2_INPUT_TYPE_TUNER,  0x3f, 0,</div><div class='add'>+		V4L2_STD_PAL_BG | V4L2_STD_PAL_I, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ AUX1,	   "AUX1",           V4L2_INPUT_TYPE_CAMERA, 0x3f, 0,</div><div class='add'>+		V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ AUX3,	   "AUX3 Composite", V4L2_INPUT_TYPE_CAMERA, 0x3f, 0,</div><div class='add'>+		V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='add'>+	{ AUX3_YC, "AUX3 S-Video",   V4L2_INPUT_TYPE_CAMERA, 0x3f, 0,</div><div class='add'>+		V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* this array holds the information, which port of the saa7146 each</div><div class='hunk'>@@ -90,6 +95,36 @@ struct mxb_routing {</div><div class='ctx'> 	u32 output;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* these are the available audio sources, which can switched</div><div class='add'>+   to the line- and cd-output individually */</div><div class='add'>+static struct v4l2_audio mxb_audios[MXB_AUDIOS] = {</div><div class='add'>+	    {</div><div class='add'>+		.index	= 0,</div><div class='add'>+		.name	= "Tuner",</div><div class='add'>+		.capability = V4L2_AUDCAP_STEREO,</div><div class='add'>+	} , {</div><div class='add'>+		.index	= 1,</div><div class='add'>+		.name	= "AUX1",</div><div class='add'>+		.capability = V4L2_AUDCAP_STEREO,</div><div class='add'>+	} , {</div><div class='add'>+		.index	= 2,</div><div class='add'>+		.name	= "AUX2",</div><div class='add'>+		.capability = V4L2_AUDCAP_STEREO,</div><div class='add'>+	} , {</div><div class='add'>+		.index	= 3,</div><div class='add'>+		.name	= "AUX3",</div><div class='add'>+		.capability = V4L2_AUDCAP_STEREO,</div><div class='add'>+	} , {</div><div class='add'>+		.index	= 4,</div><div class='add'>+		.name	= "Radio (X9)",</div><div class='add'>+		.capability = V4L2_AUDCAP_STEREO,</div><div class='add'>+	} , {</div><div class='add'>+		.index	= 5,</div><div class='add'>+		.name	= "CD-ROM (X10)",</div><div class='add'>+		.capability = V4L2_AUDCAP_STEREO,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* These are the necessary input-output-pins for bringing one audio source</div><div class='ctx'>    (see above) to the CD-output. Note that gain is set to 0 in this table. */</div><div class='ctx'> static struct mxb_routing TEA6420_cd[MXB_AUDIOS + 1][2] = {</div><div class='hunk'>@@ -114,11 +149,6 @@ static struct mxb_routing TEA6420_line[MXB_AUDIOS + 1][2] = {</div><div class='ctx'> 	{ { 6, 3 }, { 6, 2 } }	/* Mute */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define MAXCONTROLS	1</div><div class='del'>-static struct v4l2_queryctrl mxb_controls[] = {</div><div class='del'>-	{ V4L2_CID_AUDIO_MUTE, V4L2_CTRL_TYPE_BOOLEAN, "Mute", 0, 1, 1, 0, 0 },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct mxb</div><div class='ctx'> {</div><div class='ctx'> 	struct video_device	*video_dev;</div><div class='hunk'>@@ -135,6 +165,7 @@ struct mxb</div><div class='ctx'> </div><div class='ctx'> 	int	cur_mode;	/* current audio mode (mono, stereo, ...) */</div><div class='ctx'> 	int	cur_input;	/* current input */</div><div class='add'>+	int	cur_audinput;	/* current audio input */</div><div class='ctx'> 	int	cur_mute;	/* current mute status */</div><div class='ctx'> 	struct v4l2_frequency	cur_freq;	/* current frequency the tuner is tuned to */</div><div class='ctx'> };</div><div class='hunk'>@@ -150,16 +181,21 @@ struct mxb</div><div class='ctx'> #define call_all(dev, o, f, args...) \</div><div class='ctx'> 	v4l2_device_call_until_err(&amp;dev-&gt;v4l2_dev, 0, o, f, ##args)</div><div class='ctx'> </div><div class='del'>-static inline void tea6420_route_cd(struct mxb *mxb, int idx)</div><div class='add'>+static void mxb_update_audmode(struct mxb *mxb)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_tuner t = {</div><div class='add'>+		.audmode = mxb-&gt;cur_mode,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tda9840_call(mxb, tuner, s_tuner, &amp;t);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void tea6420_route(struct mxb *mxb, int idx)</div><div class='ctx'> {</div><div class='ctx'> 	v4l2_subdev_call(mxb-&gt;tea6420_1, audio, s_routing,</div><div class='ctx'> 		TEA6420_cd[idx][0].input, TEA6420_cd[idx][0].output, 0);</div><div class='ctx'> 	v4l2_subdev_call(mxb-&gt;tea6420_2, audio, s_routing,</div><div class='ctx'> 		TEA6420_cd[idx][1].input, TEA6420_cd[idx][1].output, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void tea6420_route_line(struct mxb *mxb, int idx)</div><div class='del'>-{</div><div class='ctx'> 	v4l2_subdev_call(mxb-&gt;tea6420_1, audio, s_routing,</div><div class='ctx'> 		TEA6420_line[idx][0].input, TEA6420_line[idx][0].output, 0);</div><div class='ctx'> 	v4l2_subdev_call(mxb-&gt;tea6420_2, audio, s_routing,</div><div class='hunk'>@@ -168,16 +204,45 @@ static inline void tea6420_route_line(struct mxb *mxb, int idx)</div><div class='ctx'> </div><div class='ctx'> static struct saa7146_extension extension;</div><div class='ctx'> </div><div class='add'>+static int mxb_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct saa7146_dev *dev = container_of(ctrl-&gt;handler,</div><div class='add'>+				struct saa7146_dev, ctrl_handler);</div><div class='add'>+	struct mxb *mxb = dev-&gt;ext_priv;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_AUDIO_MUTE:</div><div class='add'>+		mxb-&gt;cur_mute = ctrl-&gt;val;</div><div class='add'>+		/* switch the audio-source */</div><div class='add'>+		tea6420_route(mxb, ctrl-&gt;val ? 6 :</div><div class='add'>+				video_audio_connect[mxb-&gt;cur_input]);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops mxb_ctrl_ops = {</div><div class='add'>+	.s_ctrl = mxb_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int mxb_probe(struct saa7146_dev *dev)</div><div class='ctx'> {</div><div class='add'>+	struct v4l2_ctrl_handler *hdl = &amp;dev-&gt;ctrl_handler;</div><div class='ctx'> 	struct mxb *mxb = NULL;</div><div class='ctx'> </div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;mxb_ctrl_ops,</div><div class='add'>+			V4L2_CID_AUDIO_MUTE, 0, 1, 1, 1);</div><div class='add'>+	if (hdl-&gt;error)</div><div class='add'>+		return hdl-&gt;error;</div><div class='ctx'> 	mxb = kzalloc(sizeof(struct mxb), GFP_KERNEL);</div><div class='ctx'> 	if (mxb == NULL) {</div><div class='ctx'> 		DEB_D("not enough kernel memory\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 	snprintf(mxb-&gt;i2c_adapter.name, sizeof(mxb-&gt;i2c_adapter.name), "mxb%d", mxb_num);</div><div class='ctx'> </div><div class='ctx'> 	saa7146_i2c_adapter_prepare(dev, &amp;mxb-&gt;i2c_adapter, SAA7146_I2C_BUS_BIT_RATE_480);</div><div class='hunk'>@@ -214,6 +279,8 @@ static int mxb_probe(struct saa7146_dev *dev)</div><div class='ctx'> 	/* we store the pointer in our private data field */</div><div class='ctx'> 	dev-&gt;ext_priv = mxb;</div><div class='ctx'> </div><div class='add'>+	v4l2_ctrl_handler_setup(hdl);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -286,6 +353,9 @@ static int mxb_init_done(struct saa7146_dev* dev)</div><div class='ctx'> </div><div class='ctx'> 	int i = 0, err = 0;</div><div class='ctx'> </div><div class='add'>+	/* mute audio on tea6420s */</div><div class='add'>+	tea6420_route(mxb, 6);</div><div class='add'>+</div><div class='ctx'> 	/* select video mode in saa7111a */</div><div class='ctx'> 	saa7111a_call(mxb, core, s_std, std);</div><div class='ctx'> </div><div class='hunk'>@@ -306,12 +376,12 @@ static int mxb_init_done(struct saa7146_dev* dev)</div><div class='ctx'> 	tuner_call(mxb, tuner, s_frequency, &amp;mxb-&gt;cur_freq);</div><div class='ctx'> </div><div class='ctx'> 	/* set a default video standard */</div><div class='add'>+	/* These two gpio calls set the GPIO pins that control the tda9820 */</div><div class='add'>+	saa7146_write(dev, GPIO_CTRL, 0x00404050);</div><div class='add'>+	saa7111a_call(mxb, core, s_gpio, 1);</div><div class='add'>+	saa7111a_call(mxb, core, s_std, std);</div><div class='ctx'> 	tuner_call(mxb, core, s_std, std);</div><div class='ctx'> </div><div class='del'>-	/* mute audio on tea6420s */</div><div class='del'>-	tea6420_route_line(mxb, 6);</div><div class='del'>-	tea6420_route_cd(mxb, 6);</div><div class='del'>-</div><div class='ctx'> 	/* switch to tuner-channel on tea6415c */</div><div class='ctx'> 	tea6415c_call(mxb, video, s_routing, 3, 17, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -320,9 +390,11 @@ static int mxb_init_done(struct saa7146_dev* dev)</div><div class='ctx'> </div><div class='ctx'> 	/* the rest for mxb */</div><div class='ctx'> 	mxb-&gt;cur_input = 0;</div><div class='add'>+	mxb-&gt;cur_audinput = video_audio_connect[mxb-&gt;cur_input];</div><div class='ctx'> 	mxb-&gt;cur_mute = 1;</div><div class='ctx'> </div><div class='ctx'> 	mxb-&gt;cur_mode = V4L2_TUNER_MODE_STEREO;</div><div class='add'>+	mxb_update_audmode(mxb);</div><div class='ctx'> </div><div class='ctx'> 	/* check if the saa7740 (aka 'sound arena module') is present</div><div class='ctx'> 	   on the mxb. if so, we must initialize it. due to lack of</div><div class='hunk'>@@ -385,69 +457,6 @@ void mxb_irq_bh(struct saa7146_dev* dev, u32* irq_mask)</div><div class='ctx'> }</div><div class='ctx'> */</div><div class='ctx'> </div><div class='del'>-static int vidioc_queryctrl(struct file *file, void *fh, struct v4l2_queryctrl *qc)</div><div class='del'>-{</div><div class='del'>-	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = MAXCONTROLS - 1; i &gt;= 0; i--) {</div><div class='del'>-		if (mxb_controls[i].id == qc-&gt;id) {</div><div class='del'>-			*qc = mxb_controls[i];</div><div class='del'>-			DEB_D("VIDIOC_QUERYCTRL %d\n", qc-&gt;id);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return dev-&gt;ext_vv_data-&gt;core_ops-&gt;vidioc_queryctrl(file, fh, qc);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vidioc_g_ctrl(struct file *file, void *fh, struct v4l2_control *vc)</div><div class='del'>-{</div><div class='del'>-	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='del'>-	struct mxb *mxb = (struct mxb *)dev-&gt;ext_priv;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = MAXCONTROLS - 1; i &gt;= 0; i--) {</div><div class='del'>-		if (mxb_controls[i].id == vc-&gt;id)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i &lt; 0)</div><div class='del'>-		return dev-&gt;ext_vv_data-&gt;core_ops-&gt;vidioc_g_ctrl(file, fh, vc);</div><div class='del'>-</div><div class='del'>-	if (vc-&gt;id == V4L2_CID_AUDIO_MUTE) {</div><div class='del'>-		vc-&gt;value = mxb-&gt;cur_mute;</div><div class='del'>-		DEB_D("VIDIOC_G_CTRL V4L2_CID_AUDIO_MUTE:%d\n", vc-&gt;value);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DEB_EE("VIDIOC_G_CTRL V4L2_CID_AUDIO_MUTE:%d\n", vc-&gt;value);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vidioc_s_ctrl(struct file *file, void *fh, struct v4l2_control *vc)</div><div class='del'>-{</div><div class='del'>-	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='del'>-	struct mxb *mxb = (struct mxb *)dev-&gt;ext_priv;</div><div class='del'>-	int i = 0;</div><div class='del'>-</div><div class='del'>-	for (i = MAXCONTROLS - 1; i &gt;= 0; i--) {</div><div class='del'>-		if (mxb_controls[i].id == vc-&gt;id)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i &lt; 0)</div><div class='del'>-		return dev-&gt;ext_vv_data-&gt;core_ops-&gt;vidioc_s_ctrl(file, fh, vc);</div><div class='del'>-</div><div class='del'>-	if (vc-&gt;id == V4L2_CID_AUDIO_MUTE) {</div><div class='del'>-		mxb-&gt;cur_mute = vc-&gt;value;</div><div class='del'>-		/* switch the audio-source */</div><div class='del'>-		tea6420_route_line(mxb, vc-&gt;value ? 6 :</div><div class='del'>-				video_audio_connect[mxb-&gt;cur_input]);</div><div class='del'>-		DEB_EE("VIDIOC_S_CTRL, V4L2_CID_AUDIO_MUTE: %d\n", vc-&gt;value);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int vidioc_enum_input(struct file *file, void *fh, struct v4l2_input *i)</div><div class='ctx'> {</div><div class='ctx'> 	DEB_EE("VIDIOC_ENUMINPUT %d\n", i-&gt;index);</div><div class='hunk'>@@ -519,9 +528,12 @@ static int vidioc_s_input(struct file *file, void *fh, unsigned int input)</div><div class='ctx'> 	if (saa7111a_call(mxb, video, s_routing, i, SAA7111_FMT_CCIR, 0))</div><div class='ctx'> 		pr_err("VIDIOC_S_INPUT: could not address saa7111a\n");</div><div class='ctx'> </div><div class='add'>+	mxb-&gt;cur_audinput = video_audio_connect[input];</div><div class='ctx'> 	/* switch the audio-source only if necessary */</div><div class='ctx'> 	if (0 == mxb-&gt;cur_mute)</div><div class='del'>-		tea6420_route_line(mxb, video_audio_connect[input]);</div><div class='add'>+		tea6420_route(mxb, mxb-&gt;cur_audinput);</div><div class='add'>+	if (mxb-&gt;cur_audinput == 0)</div><div class='add'>+		mxb_update_audmode(mxb);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -563,17 +575,20 @@ static int vidioc_s_tuner(struct file *file, void *fh, struct v4l2_tuner *t)</div><div class='ctx'> 	return call_all(dev, tuner, s_tuner, t);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int vidioc_querystd(struct file *file, void *fh, v4l2_std_id *norm)</div><div class='add'>+{</div><div class='add'>+	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='add'>+</div><div class='add'>+	return call_all(dev, video, querystd, norm);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int vidioc_g_frequency(struct file *file, void *fh, struct v4l2_frequency *f)</div><div class='ctx'> {</div><div class='ctx'> 	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='ctx'> 	struct mxb *mxb = (struct mxb *)dev-&gt;ext_priv;</div><div class='ctx'> </div><div class='del'>-	if (mxb-&gt;cur_input) {</div><div class='del'>-		DEB_D("VIDIOC_G_FREQ: channel %d does not have a tuner!\n",</div><div class='del'>-		      mxb-&gt;cur_input);</div><div class='add'>+	if (f-&gt;tuner)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	*f = mxb-&gt;cur_freq;</div><div class='ctx'> </div><div class='ctx'> 	DEB_EE("VIDIOC_G_FREQ: freq:0x%08x\n", mxb-&gt;cur_freq.frequency);</div><div class='hunk'>@@ -592,17 +607,18 @@ static int vidioc_s_frequency(struct file *file, void *fh, struct v4l2_frequency</div><div class='ctx'> 	if (V4L2_TUNER_ANALOG_TV != f-&gt;type)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (mxb-&gt;cur_input) {</div><div class='del'>-		DEB_D("VIDIOC_S_FREQ: channel %d does not have a tuner!\n",</div><div class='del'>-		      mxb-&gt;cur_input);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mxb-&gt;cur_freq = *f;</div><div class='ctx'> 	DEB_EE("VIDIOC_S_FREQUENCY: freq:0x%08x\n", mxb-&gt;cur_freq.frequency);</div><div class='ctx'> </div><div class='ctx'> 	/* tune in desired frequency */</div><div class='del'>-	tuner_call(mxb, tuner, s_frequency, &amp;mxb-&gt;cur_freq);</div><div class='add'>+	tuner_call(mxb, tuner, s_frequency, f);</div><div class='add'>+	/* let the tuner subdev clamp the frequency to the tuner range */</div><div class='add'>+	tuner_call(mxb, tuner, g_frequency, f);</div><div class='add'>+	mxb-&gt;cur_freq = *f;</div><div class='add'>+	if (mxb-&gt;cur_audinput == 0)</div><div class='add'>+		mxb_update_audmode(mxb);</div><div class='add'>+</div><div class='add'>+	if (mxb-&gt;cur_input)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* hack: changing the frequency should invalidate the vbi-counter (=&gt; alevt) */</div><div class='ctx'> 	spin_lock(&amp;dev-&gt;slock);</div><div class='hunk'>@@ -612,25 +628,40 @@ static int vidioc_s_frequency(struct file *file, void *fh, struct v4l2_frequency</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int vidioc_enumaudio(struct file *file, void *fh, struct v4l2_audio *a)</div><div class='add'>+{</div><div class='add'>+	if (a-&gt;index &gt;= MXB_AUDIOS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	*a = mxb_audios[a-&gt;index];</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int vidioc_g_audio(struct file *file, void *fh, struct v4l2_audio *a)</div><div class='ctx'> {</div><div class='ctx'> 	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='ctx'> 	struct mxb *mxb = (struct mxb *)dev-&gt;ext_priv;</div><div class='ctx'> </div><div class='del'>-	if (a-&gt;index &gt; MXB_INPUTS) {</div><div class='del'>-		DEB_D("VIDIOC_G_AUDIO %d out of range\n", a-&gt;index);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DEB_EE("VIDIOC_G_AUDIO %d\n", a-&gt;index);</div><div class='del'>-	memcpy(a, &amp;mxb_audios[video_audio_connect[mxb-&gt;cur_input]], sizeof(struct v4l2_audio));</div><div class='add'>+	DEB_EE("VIDIOC_G_AUDIO\n");</div><div class='add'>+	*a = mxb_audios[mxb-&gt;cur_audinput];</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_s_audio(struct file *file, void *fh, struct v4l2_audio *a)</div><div class='ctx'> {</div><div class='add'>+	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='add'>+	struct mxb *mxb = (struct mxb *)dev-&gt;ext_priv;</div><div class='add'>+</div><div class='ctx'> 	DEB_D("VIDIOC_S_AUDIO %d\n", a-&gt;index);</div><div class='del'>-	return 0;</div><div class='add'>+	if (mxb_inputs[mxb-&gt;cur_input].audioset &amp; (1 &lt;&lt; a-&gt;index)) {</div><div class='add'>+		if (mxb-&gt;cur_audinput != a-&gt;index) {</div><div class='add'>+			mxb-&gt;cur_audinput = a-&gt;index;</div><div class='add'>+			tea6420_route(mxb, a-&gt;index);</div><div class='add'>+			if (mxb-&gt;cur_audinput == 0)</div><div class='add'>+				mxb_update_audmode(mxb);</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_VIDEO_ADV_DEBUG</div><div class='hunk'>@@ -638,60 +669,31 @@ static int vidioc_g_register(struct file *file, void *fh, struct v4l2_dbg_regist</div><div class='ctx'> {</div><div class='ctx'> 	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	return call_all(dev, core, g_register, reg);</div><div class='add'>+	if (!capable(CAP_SYS_ADMIN))</div><div class='add'>+		return -EPERM;</div><div class='add'>+	if (v4l2_chip_match_host(&amp;reg-&gt;match)) {</div><div class='add'>+		reg-&gt;val = saa7146_read(dev, reg-&gt;reg);</div><div class='add'>+		reg-&gt;size = 4;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	call_all(dev, core, g_register, reg);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vidioc_s_register(struct file *file, void *fh, struct v4l2_dbg_register *reg)</div><div class='ctx'> {</div><div class='ctx'> 	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	return call_all(dev, core, s_register, reg);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static long vidioc_default(struct file *file, void *fh, bool valid_prio,</div><div class='del'>-							int cmd, void *arg)</div><div class='del'>-{</div><div class='del'>-	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)-&gt;dev;</div><div class='del'>-	struct mxb *mxb = (struct mxb *)dev-&gt;ext_priv;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case MXB_S_AUDIO_CD:</div><div class='del'>-	{</div><div class='del'>-		int i = *(int *)arg;</div><div class='del'>-</div><div class='del'>-		if (i &lt; 0 || i &gt;= MXB_AUDIOS) {</div><div class='del'>-			DEB_D("invalid argument to MXB_S_AUDIO_CD: i:%d\n", i);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		DEB_EE("MXB_S_AUDIO_CD: i:%d\n", i);</div><div class='del'>-</div><div class='del'>-		tea6420_route_cd(mxb, i);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	case MXB_S_AUDIO_LINE:</div><div class='del'>-	{</div><div class='del'>-		int i = *(int *)arg;</div><div class='del'>-</div><div class='del'>-		if (i &lt; 0 || i &gt;= MXB_AUDIOS) {</div><div class='del'>-			DEB_D("invalid argument to MXB_S_AUDIO_LINE: i:%d\n",</div><div class='del'>-			      i);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		DEB_EE("MXB_S_AUDIO_LINE: i:%d\n", i);</div><div class='del'>-		tea6420_route_line(mxb, i);</div><div class='add'>+	if (!capable(CAP_SYS_ADMIN))</div><div class='add'>+		return -EPERM;</div><div class='add'>+	if (v4l2_chip_match_host(&amp;reg-&gt;match)) {</div><div class='add'>+		saa7146_write(dev, reg-&gt;reg, reg-&gt;val);</div><div class='add'>+		reg-&gt;size = 4;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	default:</div><div class='del'>-/*</div><div class='del'>-		DEB2(pr_err("does not handle this ioctl\n"));</div><div class='del'>-*/</div><div class='del'>-		return -ENOIOCTLCMD;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+	return call_all(dev, core, s_register, reg);</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static struct saa7146_ext_vv vv_data;</div><div class='ctx'> </div><div class='hunk'>@@ -709,23 +711,21 @@ static int mxb_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data</div><div class='ctx'> 	}</div><div class='ctx'> 	mxb = (struct mxb *)dev-&gt;ext_priv;</div><div class='ctx'> </div><div class='del'>-	vv_data.ops.vidioc_queryctrl = vidioc_queryctrl;</div><div class='del'>-	vv_data.ops.vidioc_g_ctrl = vidioc_g_ctrl;</div><div class='del'>-	vv_data.ops.vidioc_s_ctrl = vidioc_s_ctrl;</div><div class='del'>-	vv_data.ops.vidioc_enum_input = vidioc_enum_input;</div><div class='del'>-	vv_data.ops.vidioc_g_input = vidioc_g_input;</div><div class='del'>-	vv_data.ops.vidioc_s_input = vidioc_s_input;</div><div class='del'>-	vv_data.ops.vidioc_g_tuner = vidioc_g_tuner;</div><div class='del'>-	vv_data.ops.vidioc_s_tuner = vidioc_s_tuner;</div><div class='del'>-	vv_data.ops.vidioc_g_frequency = vidioc_g_frequency;</div><div class='del'>-	vv_data.ops.vidioc_s_frequency = vidioc_s_frequency;</div><div class='del'>-	vv_data.ops.vidioc_g_audio = vidioc_g_audio;</div><div class='del'>-	vv_data.ops.vidioc_s_audio = vidioc_s_audio;</div><div class='add'>+	vv_data.vid_ops.vidioc_enum_input = vidioc_enum_input;</div><div class='add'>+	vv_data.vid_ops.vidioc_g_input = vidioc_g_input;</div><div class='add'>+	vv_data.vid_ops.vidioc_s_input = vidioc_s_input;</div><div class='add'>+	vv_data.vid_ops.vidioc_querystd = vidioc_querystd;</div><div class='add'>+	vv_data.vid_ops.vidioc_g_tuner = vidioc_g_tuner;</div><div class='add'>+	vv_data.vid_ops.vidioc_s_tuner = vidioc_s_tuner;</div><div class='add'>+	vv_data.vid_ops.vidioc_g_frequency = vidioc_g_frequency;</div><div class='add'>+	vv_data.vid_ops.vidioc_s_frequency = vidioc_s_frequency;</div><div class='add'>+	vv_data.vid_ops.vidioc_enumaudio = vidioc_enumaudio;</div><div class='add'>+	vv_data.vid_ops.vidioc_g_audio = vidioc_g_audio;</div><div class='add'>+	vv_data.vid_ops.vidioc_s_audio = vidioc_s_audio;</div><div class='ctx'> #ifdef CONFIG_VIDEO_ADV_DEBUG</div><div class='del'>-	vv_data.ops.vidioc_g_register = vidioc_g_register;</div><div class='del'>-	vv_data.ops.vidioc_s_register = vidioc_s_register;</div><div class='add'>+	vv_data.vid_ops.vidioc_g_register = vidioc_g_register;</div><div class='add'>+	vv_data.vid_ops.vidioc_s_register = vidioc_s_register;</div><div class='ctx'> #endif</div><div class='del'>-	vv_data.ops.vidioc_default = vidioc_default;</div><div class='ctx'> 	if (saa7146_register_device(&amp;mxb-&gt;video_dev, dev, "mxb", VFL_TYPE_GRABBER)) {</div><div class='ctx'> 		ERR("cannot register capture v4l2 device. skipping.\n");</div><div class='ctx'> 		saa7146_vv_release(dev);</div><div class='hunk'>@@ -752,6 +752,9 @@ static int mxb_detach(struct saa7146_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	DEB_EE("dev:%p\n", dev);</div><div class='ctx'> </div><div class='add'>+	/* mute audio on tea6420s */</div><div class='add'>+	tea6420_route(mxb, 6);</div><div class='add'>+</div><div class='ctx'> 	saa7146_unregister_device(&amp;mxb-&gt;video_dev,dev);</div><div class='ctx'> 	if (MXB_BOARD_CAN_DO_VBI(dev))</div><div class='ctx'> 		saa7146_unregister_device(&amp;mxb-&gt;vbi_dev, dev);</div><div class='hunk'>@@ -773,20 +776,24 @@ static int std_callback(struct saa7146_dev *dev, struct saa7146_standard *standa</div><div class='ctx'> 		v4l2_std_id std = V4L2_STD_PAL_I;</div><div class='ctx'> </div><div class='ctx'> 		DEB_D("VIDIOC_S_STD: setting mxb for PAL_I\n");</div><div class='del'>-		/* set the 7146 gpio register -- I don't know what this does exactly */</div><div class='add'>+		/* These two gpio calls set the GPIO pins that control the tda9820 */</div><div class='ctx'> 		saa7146_write(dev, GPIO_CTRL, 0x00404050);</div><div class='del'>-		/* unset the 7111 gpio register -- I don't know what this does exactly */</div><div class='ctx'> 		saa7111a_call(mxb, core, s_gpio, 0);</div><div class='del'>-		tuner_call(mxb, core, s_std, std);</div><div class='add'>+		saa7111a_call(mxb, core, s_std, std);</div><div class='add'>+		if (mxb-&gt;cur_input == 0)</div><div class='add'>+			tuner_call(mxb, core, s_std, std);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		v4l2_std_id std = V4L2_STD_PAL_BG;</div><div class='ctx'> </div><div class='add'>+		if (mxb-&gt;cur_input)</div><div class='add'>+			std = standard-&gt;id;</div><div class='ctx'> 		DEB_D("VIDIOC_S_STD: setting mxb for PAL/NTSC/SECAM\n");</div><div class='del'>-		/* set the 7146 gpio register -- I don't know what this does exactly */</div><div class='add'>+		/* These two gpio calls set the GPIO pins that control the tda9820 */</div><div class='ctx'> 		saa7146_write(dev, GPIO_CTRL, 0x00404050);</div><div class='del'>-		/* set the 7111 gpio register -- I don't know what this does exactly */</div><div class='ctx'> 		saa7111a_call(mxb, core, s_gpio, 1);</div><div class='del'>-		tuner_call(mxb, core, s_std, std);</div><div class='add'>+		saa7111a_call(mxb, core, s_std, std);</div><div class='add'>+		if (mxb-&gt;cur_input == 0)</div><div class='add'>+			tuner_call(mxb, core, s_std, std);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -836,14 +843,14 @@ MODULE_DEVICE_TABLE(pci, pci_tbl);</div><div class='ctx'> </div><div class='ctx'> static struct saa7146_ext_vv vv_data = {</div><div class='ctx'> 	.inputs		= MXB_INPUTS,</div><div class='del'>-	.capabilities	= V4L2_CAP_TUNER | V4L2_CAP_VBI_CAPTURE,</div><div class='add'>+	.capabilities	= V4L2_CAP_TUNER | V4L2_CAP_VBI_CAPTURE | V4L2_CAP_AUDIO,</div><div class='ctx'> 	.stds		= &amp;standard[0],</div><div class='ctx'> 	.num_stds	= sizeof(standard)/sizeof(struct saa7146_standard),</div><div class='ctx'> 	.std_callback	= &amp;std_callback,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct saa7146_extension extension = {</div><div class='del'>-	.name		= MXB_IDENTIFIER,</div><div class='add'>+	.name		= "Multimedia eXtension Board",</div><div class='ctx'> 	.flags		= SAA7146_USE_I2C_IRQ,</div><div class='ctx'> </div><div class='ctx'> 	.pci_tbl	= &amp;pci_tbl[0],</div><div class='head'>diff --git a/drivers/media/video/mxb.h b/drivers/media/video/mxb.h<br/>deleted file mode 100644<br/>index 400a57ba62ec..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/mxb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/mxb.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-#ifndef __MXB__</div><div class='del'>-#define __MXB__</div><div class='del'>-</div><div class='del'>-#define BASE_VIDIOC_MXB 10</div><div class='del'>-</div><div class='del'>-#define MXB_S_AUDIO_CD		_IOW  ('V', BASE_VIDIOC_PRIVATE+BASE_VIDIOC_MXB+0, int)</div><div class='del'>-#define MXB_S_AUDIO_LINE	_IOW  ('V', BASE_VIDIOC_PRIVATE+BASE_VIDIOC_MXB+1, int)</div><div class='del'>-</div><div class='del'>-#define MXB_IDENTIFIER "Multimedia eXtension Board"</div><div class='del'>-</div><div class='del'>-#define MXB_AUDIOS	6</div><div class='del'>-</div><div class='del'>-/* these are the available audio sources, which can switched</div><div class='del'>-   to the line- and cd-output individually */</div><div class='del'>-static struct v4l2_audio mxb_audios[MXB_AUDIOS] = {</div><div class='del'>-	    {</div><div class='del'>-		.index	= 0,</div><div class='del'>-		.name	= "Tuner",</div><div class='del'>-		.capability = V4L2_AUDCAP_STEREO,</div><div class='del'>-	} , {</div><div class='del'>-		.index	= 1,</div><div class='del'>-		.name	= "AUX1",</div><div class='del'>-		.capability = V4L2_AUDCAP_STEREO,</div><div class='del'>-	} , {</div><div class='del'>-		.index	= 2,</div><div class='del'>-		.name	= "AUX2",</div><div class='del'>-		.capability = V4L2_AUDCAP_STEREO,</div><div class='del'>-	} , {</div><div class='del'>-		.index	= 3,</div><div class='del'>-		.name	= "AUX3",</div><div class='del'>-		.capability = V4L2_AUDCAP_STEREO,</div><div class='del'>-	} , {</div><div class='del'>-		.index	= 4,</div><div class='del'>-		.name	= "Radio (X9)",</div><div class='del'>-		.capability = V4L2_AUDCAP_STEREO,</div><div class='del'>-	} , {</div><div class='del'>-		.index	= 5,</div><div class='del'>-		.name	= "CD-ROM (X10)",</div><div class='del'>-		.capability = V4L2_AUDCAP_STEREO,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/media/video/omap1_camera.c b/drivers/media/video/omap1_camera.c<br/>index c20f5ecd6790..c7e41145041f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap1_camera.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap1_camera.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap1_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap1_camera.c</a></div><div class='hunk'>@@ -206,15 +206,10 @@ static int omap1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,</div><div class='ctx'> 		unsigned int *size)</div><div class='ctx'> {</div><div class='ctx'> 	struct soc_camera_device *icd = vq-&gt;priv_data;</div><div class='del'>-	int bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-			icd-&gt;current_fmt-&gt;host_fmt);</div><div class='ctx'> 	struct soc_camera_host *ici = to_soc_camera_host(icd-&gt;parent);</div><div class='ctx'> 	struct omap1_cam_dev *pcdev = ici-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		return bytes_per_line;</div><div class='del'>-</div><div class='del'>-	*size = bytes_per_line * icd-&gt;user_height;</div><div class='add'>+	*size = icd-&gt;sizeimage;</div><div class='ctx'> </div><div class='ctx'> 	if (!*count || *count &lt; OMAP1_CAMERA_MIN_BUF_COUNT(pcdev-&gt;vb_mode))</div><div class='ctx'> 		*count = OMAP1_CAMERA_MIN_BUF_COUNT(pcdev-&gt;vb_mode);</div><div class='hunk'>@@ -256,15 +251,10 @@ static int omap1_videobuf_prepare(struct videobuf_queue *vq,</div><div class='ctx'> {</div><div class='ctx'> 	struct soc_camera_device *icd = vq-&gt;priv_data;</div><div class='ctx'> 	struct omap1_cam_buf *buf = container_of(vb, struct omap1_cam_buf, vb);</div><div class='del'>-	int bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-			icd-&gt;current_fmt-&gt;host_fmt);</div><div class='ctx'> 	struct soc_camera_host *ici = to_soc_camera_host(icd-&gt;parent);</div><div class='ctx'> 	struct omap1_cam_dev *pcdev = ici-&gt;priv;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		return bytes_per_line;</div><div class='del'>-</div><div class='ctx'> 	WARN_ON(!list_empty(&amp;vb-&gt;queue));</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(NULL == icd-&gt;current_fmt);</div><div class='hunk'>@@ -281,7 +271,7 @@ static int omap1_videobuf_prepare(struct videobuf_queue *vq,</div><div class='ctx'> 		vb-&gt;state  = VIDEOBUF_NEEDS_INIT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vb-&gt;size = bytes_per_line * vb-&gt;height;</div><div class='add'>+	vb-&gt;size = icd-&gt;sizeimage;</div><div class='ctx'> </div><div class='ctx'> 	if (vb-&gt;baddr &amp;&amp; vb-&gt;bsize &lt; vb-&gt;size) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -999,6 +989,7 @@ static const struct soc_mbus_lookup omap1_cam_formats[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_BE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_VYUY8_2X8,</div><div class='hunk'>@@ -1008,6 +999,7 @@ static const struct soc_mbus_lookup omap1_cam_formats[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_BE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_YUYV8_2X8,</div><div class='hunk'>@@ -1017,6 +1009,7 @@ static const struct soc_mbus_lookup omap1_cam_formats[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_BE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_YVYU8_2X8,</div><div class='hunk'>@@ -1026,6 +1019,7 @@ static const struct soc_mbus_lookup omap1_cam_formats[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_BE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE,</div><div class='hunk'>@@ -1035,6 +1029,7 @@ static const struct soc_mbus_lookup omap1_cam_formats[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_BE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE,</div><div class='hunk'>@@ -1044,6 +1039,7 @@ static const struct soc_mbus_lookup omap1_cam_formats[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_BE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_RGB565_2X8_BE,</div><div class='hunk'>@@ -1053,6 +1049,7 @@ static const struct soc_mbus_lookup omap1_cam_formats[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_BE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_RGB565_2X8_LE,</div><div class='hunk'>@@ -1062,6 +1059,7 @@ static const struct soc_mbus_lookup omap1_cam_formats[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_BE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> },</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/media/video/omap24xxcam-dma.c b/drivers/media/video/omap24xxcam-dma.c<br/>index 3ea38a8def8e..b5ae170de4a5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap24xxcam-dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap24xxcam-dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap24xxcam-dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap24xxcam-dma.c</a></div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* Ack all interrupt on CSR and IRQSTATUS_L0 */</div><div class='del'>-static void omap24xxcam_dmahw_ack_all(unsigned long base)</div><div class='add'>+static void omap24xxcam_dmahw_ack_all(void __iomem *base)</div><div class='ctx'> {</div><div class='ctx'> 	u32 csr;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -52,7 +52,7 @@ static void omap24xxcam_dmahw_ack_all(unsigned long base)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Ack dmach on CSR and IRQSTATUS_L0 */</div><div class='del'>-static u32 omap24xxcam_dmahw_ack_ch(unsigned long base, int dmach)</div><div class='add'>+static u32 omap24xxcam_dmahw_ack_ch(void __iomem *base, int dmach)</div><div class='ctx'> {</div><div class='ctx'> 	u32 csr;</div><div class='ctx'> </div><div class='hunk'>@@ -65,12 +65,12 @@ static u32 omap24xxcam_dmahw_ack_ch(unsigned long base, int dmach)</div><div class='ctx'> 	return csr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int omap24xxcam_dmahw_running(unsigned long base, int dmach)</div><div class='add'>+static int omap24xxcam_dmahw_running(void __iomem *base, int dmach)</div><div class='ctx'> {</div><div class='ctx'> 	return omap24xxcam_reg_in(base, CAMDMA_CCR(dmach)) &amp; CAMDMA_CCR_ENABLE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void omap24xxcam_dmahw_transfer_setup(unsigned long base, int dmach,</div><div class='add'>+static void omap24xxcam_dmahw_transfer_setup(void __iomem *base, int dmach,</div><div class='ctx'> 					     dma_addr_t start, u32 len)</div><div class='ctx'> {</div><div class='ctx'> 	omap24xxcam_reg_out(base, CAMDMA_CCR(dmach),</div><div class='hunk'>@@ -112,7 +112,7 @@ static void omap24xxcam_dmahw_transfer_setup(unsigned long base, int dmach,</div><div class='ctx'> 			    | CAMDMA_CICR_DROP_IE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void omap24xxcam_dmahw_transfer_start(unsigned long base, int dmach)</div><div class='add'>+static void omap24xxcam_dmahw_transfer_start(void __iomem *base, int dmach)</div><div class='ctx'> {</div><div class='ctx'> 	omap24xxcam_reg_out(base, CAMDMA_CCR(dmach),</div><div class='ctx'> 			    CAMDMA_CCR_SEL_SRC_DST_SYNC</div><div class='hunk'>@@ -124,7 +124,7 @@ static void omap24xxcam_dmahw_transfer_start(unsigned long base, int dmach)</div><div class='ctx'> 			    | CAMDMA_CCR_SYNCHRO_CAMERA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void omap24xxcam_dmahw_transfer_chain(unsigned long base, int dmach,</div><div class='add'>+static void omap24xxcam_dmahw_transfer_chain(void __iomem *base, int dmach,</div><div class='ctx'> 					     int free_dmach)</div><div class='ctx'> {</div><div class='ctx'> 	int prev_dmach, ch;</div><div class='hunk'>@@ -160,7 +160,7 @@ static void omap24xxcam_dmahw_transfer_chain(unsigned long base, int dmach,</div><div class='ctx'>  * controller may not be idle after this routine completes, because</div><div class='ctx'>  * the completion routines might start new transfers.</div><div class='ctx'>  */</div><div class='del'>-static void omap24xxcam_dmahw_abort_ch(unsigned long base, int dmach)</div><div class='add'>+static void omap24xxcam_dmahw_abort_ch(void __iomem *base, int dmach)</div><div class='ctx'> {</div><div class='ctx'> 	/* mask all interrupts from this channel */</div><div class='ctx'> 	omap24xxcam_reg_out(base, CAMDMA_CICR(dmach), 0);</div><div class='hunk'>@@ -171,7 +171,7 @@ static void omap24xxcam_dmahw_abort_ch(unsigned long base, int dmach)</div><div class='ctx'> 	omap24xxcam_reg_merge(base, CAMDMA_CCR(dmach), 0, CAMDMA_CCR_ENABLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void omap24xxcam_dmahw_init(unsigned long base)</div><div class='add'>+static void omap24xxcam_dmahw_init(void __iomem *base)</div><div class='ctx'> {</div><div class='ctx'> 	omap24xxcam_reg_out(base, CAMDMA_OCP_SYSCONFIG,</div><div class='ctx'> 			    CAMDMA_OCP_SYSCONFIG_MIDLEMODE_FSTANDBY</div><div class='hunk'>@@ -362,7 +362,7 @@ void omap24xxcam_dma_hwinit(struct omap24xxcam_dma *dma)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void omap24xxcam_dma_init(struct omap24xxcam_dma *dma,</div><div class='del'>-				 unsigned long base)</div><div class='add'>+				 void __iomem *base)</div><div class='ctx'> {</div><div class='ctx'> 	int ch;</div><div class='ctx'> </div><div class='hunk'>@@ -577,7 +577,7 @@ void omap24xxcam_sgdma_sync(struct omap24xxcam_sgdma *sgdma)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void omap24xxcam_sgdma_init(struct omap24xxcam_sgdma *sgdma,</div><div class='del'>-			    unsigned long base,</div><div class='add'>+			    void __iomem *base,</div><div class='ctx'> 			    void (*reset_callback)(unsigned long data),</div><div class='ctx'> 			    unsigned long reset_callback_data)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/media/video/omap24xxcam.c b/drivers/media/video/omap24xxcam.c<br/>index 7d3864144368..e5015b0d5508 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap24xxcam.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap24xxcam.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap24xxcam.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap24xxcam.c</a></div><div class='hunk'>@@ -1776,8 +1776,7 @@ static int __devinit omap24xxcam_probe(struct platform_device *pdev)</div><div class='ctx'> 	cam-&gt;mmio_size = resource_size(mem);</div><div class='ctx'> </div><div class='ctx'> 	/* map the region */</div><div class='del'>-	cam-&gt;mmio_base = (unsigned long)</div><div class='del'>-		ioremap_nocache(cam-&gt;mmio_base_phys, cam-&gt;mmio_size);</div><div class='add'>+	cam-&gt;mmio_base = ioremap_nocache(cam-&gt;mmio_base_phys, cam-&gt;mmio_size);</div><div class='ctx'> 	if (!cam-&gt;mmio_base) {</div><div class='ctx'> 		dev_err(cam-&gt;dev, "cannot map camera register I/O region\n");</div><div class='ctx'> 		goto err;</div><div class='head'>diff --git a/drivers/media/video/omap24xxcam.h b/drivers/media/video/omap24xxcam.h<br/>index 2ce67f5a48d5..d59727afe894 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap24xxcam.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap24xxcam.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap24xxcam.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap24xxcam.h</a></div><div class='hunk'>@@ -429,7 +429,7 @@ struct sgdma_state {</div><div class='ctx'> struct omap24xxcam_dma {</div><div class='ctx'> 	spinlock_t lock;	/* Lock for the whole structure. */</div><div class='ctx'> </div><div class='del'>-	unsigned long base;	/* base address for dma controller */</div><div class='add'>+	void __iomem *base;	/* base address for dma controller */</div><div class='ctx'> </div><div class='ctx'> 	/* While dma_stop!=0, an attempt to start a new DMA transfer will</div><div class='ctx'> 	 * fail.</div><div class='hunk'>@@ -491,7 +491,7 @@ struct omap24xxcam_device {</div><div class='ctx'> </div><div class='ctx'> 	/*** hardware resources ***/</div><div class='ctx'> 	unsigned int irq;</div><div class='del'>-	unsigned long mmio_base;</div><div class='add'>+	void __iomem *mmio_base;</div><div class='ctx'> 	unsigned long mmio_base_phys;</div><div class='ctx'> 	unsigned long mmio_size;</div><div class='ctx'> </div><div class='hunk'>@@ -544,22 +544,22 @@ struct omap24xxcam_fh {</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static inline u32 omap24xxcam_reg_in(unsigned long base, u32 offset)</div><div class='add'>+static inline u32 omap24xxcam_reg_in(u32 __iomem *base, u32 offset)</div><div class='ctx'> {</div><div class='ctx'> 	return readl(base + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 omap24xxcam_reg_out(unsigned long base, u32 offset,</div><div class='add'>+static inline u32 omap24xxcam_reg_out(u32 __iomem *base, u32 offset,</div><div class='ctx'> 					  u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	writel(val, base + offset);</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 omap24xxcam_reg_merge(unsigned long base, u32 offset,</div><div class='add'>+static inline u32 omap24xxcam_reg_merge(u32 __iomem *base, u32 offset,</div><div class='ctx'> 					    u32 val, u32 mask)</div><div class='ctx'> {</div><div class='del'>-	u32 addr = base + offset;</div><div class='add'>+	u32 __iomem *addr = base + offset;</div><div class='ctx'> 	u32 new_val = (readl(addr) &amp; ~mask) | (val &amp; mask);</div><div class='ctx'> </div><div class='ctx'> 	writel(new_val, addr);</div><div class='hunk'>@@ -585,7 +585,7 @@ int omap24xxcam_sgdma_queue(struct omap24xxcam_sgdma *sgdma,</div><div class='ctx'> 			    int len, sgdma_callback_t callback, void *arg);</div><div class='ctx'> void omap24xxcam_sgdma_sync(struct omap24xxcam_sgdma *sgdma);</div><div class='ctx'> void omap24xxcam_sgdma_init(struct omap24xxcam_sgdma *sgdma,</div><div class='del'>-			    unsigned long base,</div><div class='add'>+			    void __iomem *base,</div><div class='ctx'> 			    void (*reset_callback)(unsigned long data),</div><div class='ctx'> 			    unsigned long reset_callback_data);</div><div class='ctx'> void omap24xxcam_sgdma_exit(struct omap24xxcam_sgdma *sgdma);</div><div class='head'>diff --git a/drivers/media/video/omap3isp/isp.c b/drivers/media/video/omap3isp/isp.c<br/>index 12d5f923e1d0..1c347633e663 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/isp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/isp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/isp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/isp.c</a></div><div class='hunk'>@@ -329,19 +329,6 @@ void omap3isp_configure_bridge(struct isp_device *isp,</div><div class='ctx'> 	isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * isp_set_pixel_clock - Configures the ISP pixel clock</div><div class='del'>- * @isp: OMAP3 ISP device</div><div class='del'>- * @pixelclk: Average pixel clock in Hz</div><div class='del'>- *</div><div class='del'>- * Set the average pixel clock required by the sensor. The ISP will use the</div><div class='del'>- * lowest possible memory bandwidth settings compatible with the clock.</div><div class='del'>- **/</div><div class='del'>-static void isp_set_pixel_clock(struct isp_device *isp, unsigned int pixelclk)</div><div class='del'>-{</div><div class='del'>-	isp-&gt;isp_ccdc.vpcfg.pixelclk = pixelclk;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void omap3isp_hist_dma_done(struct isp_device *isp)</div><div class='ctx'> {</div><div class='ctx'> 	if (omap3isp_ccdc_busy(&amp;isp-&gt;isp_ccdc) ||</div><div class='hunk'>@@ -739,6 +726,17 @@ static int isp_pipeline_enable(struct isp_pipeline *pipe,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	/* If the preview engine crashed it might not respond to read/write</div><div class='add'>+	 * operations on the L4 bus. This would result in a bus fault and a</div><div class='add'>+	 * kernel oops. Refuse to start streaming in that case. This check must</div><div class='add'>+	 * be performed before the loop below to avoid starting entities if the</div><div class='add'>+	 * pipeline won't start anyway (those entities would then likely fail to</div><div class='add'>+	 * stop, making the problem worse).</div><div class='add'>+	 */</div><div class='add'>+	if ((pipe-&gt;entities &amp; isp-&gt;crashed) &amp;</div><div class='add'>+	    (1U &lt;&lt; isp-&gt;isp_prev.subdev.entity.id))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;pipe-&gt;lock, flags);</div><div class='ctx'> 	pipe-&gt;state &amp;= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pipe-&gt;lock, flags);</div><div class='hunk'>@@ -774,14 +772,6 @@ static int isp_pipeline_enable(struct isp_pipeline *pipe,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Frame number propagation. In continuous streaming mode the number</div><div class='del'>-	 * is incremented in the frame start ISR. In mem-to-mem mode</div><div class='del'>-	 * singleshot is used and frame start IRQs are not available.</div><div class='del'>-	 * Thus we have to increment the number here.</div><div class='del'>-	 */</div><div class='del'>-	if (pipe-&gt;do_propagation &amp;&amp; mode == ISP_PIPELINE_STREAM_SINGLESHOT)</div><div class='del'>-		atomic_inc(&amp;pipe-&gt;frame_number);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -879,13 +869,15 @@ static int isp_pipeline_disable(struct isp_pipeline *pipe)</div><div class='ctx'> </div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_info(isp-&gt;dev, "Unable to stop %s\n", subdev-&gt;name);</div><div class='add'>+			/* If the entity failed to stopped, assume it has</div><div class='add'>+			 * crashed. Mark it as such, the ISP will be reset when</div><div class='add'>+			 * applications will release it.</div><div class='add'>+			 */</div><div class='add'>+			isp-&gt;crashed |= 1U &lt;&lt; subdev-&gt;entity.id;</div><div class='ctx'> 			failure = -ETIMEDOUT;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (failure &lt; 0)</div><div class='del'>-		isp-&gt;needs_reset = true;</div><div class='del'>-</div><div class='ctx'> 	return failure;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1069,6 +1061,7 @@ static int isp_reset(struct isp_device *isp)</div><div class='ctx'> 		udelay(1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	isp-&gt;crashed = 0;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1495,11 +1488,13 @@ void omap3isp_put(struct isp_device *isp)</div><div class='ctx'> 	BUG_ON(isp-&gt;ref_count == 0);</div><div class='ctx'> 	if (--isp-&gt;ref_count == 0) {</div><div class='ctx'> 		isp_disable_interrupts(isp);</div><div class='del'>-		isp_save_ctx(isp);</div><div class='del'>-		if (isp-&gt;needs_reset) {</div><div class='add'>+		if (isp-&gt;domain)</div><div class='add'>+			isp_save_ctx(isp);</div><div class='add'>+		/* Reset the ISP if an entity has failed to stop. This is the</div><div class='add'>+		 * only way to recover from such conditions.</div><div class='add'>+		 */</div><div class='add'>+		if (isp-&gt;crashed)</div><div class='ctx'> 			isp_reset(isp);</div><div class='del'>-			isp-&gt;needs_reset = false;</div><div class='del'>-		}</div><div class='ctx'> 		isp_disable_clocks(isp);</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;isp-&gt;isp_mutex);</div><div class='hunk'>@@ -1970,7 +1965,7 @@ error_csiphy:</div><div class='ctx'>  *</div><div class='ctx'>  * Always returns 0.</div><div class='ctx'>  */</div><div class='del'>-static int isp_remove(struct platform_device *pdev)</div><div class='add'>+static int __devexit isp_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_device *isp = platform_get_drvdata(pdev);</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1981,6 +1976,7 @@ static int isp_remove(struct platform_device *pdev)</div><div class='ctx'> 	omap3isp_get(isp);</div><div class='ctx'> 	iommu_detach_device(isp-&gt;domain, &amp;pdev-&gt;dev);</div><div class='ctx'> 	iommu_domain_free(isp-&gt;domain);</div><div class='add'>+	isp-&gt;domain = NULL;</div><div class='ctx'> 	omap3isp_put(isp);</div><div class='ctx'> </div><div class='ctx'> 	free_irq(isp-&gt;irq_num, isp);</div><div class='hunk'>@@ -2050,7 +2046,7 @@ static int isp_map_mem_resource(struct platform_device *pdev,</div><div class='ctx'>  *   -EINVAL if couldn't install ISR,</div><div class='ctx'>  *   or clk_get return error value.</div><div class='ctx'>  */</div><div class='del'>-static int isp_probe(struct platform_device *pdev)</div><div class='add'>+static int __devinit isp_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='ctx'> 	struct isp_device *isp;</div><div class='hunk'>@@ -2068,7 +2064,6 @@ static int isp_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	isp-&gt;autoidle = autoidle;</div><div class='ctx'> 	isp-&gt;platform_cb.set_xclk = isp_set_xclk;</div><div class='del'>-	isp-&gt;platform_cb.set_pixel_clock = isp_set_pixel_clock;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;isp-&gt;isp_mutex);</div><div class='ctx'> 	spin_lock_init(&amp;isp-&gt;stat_lock);</div><div class='hunk'>@@ -2218,7 +2213,7 @@ MODULE_DEVICE_TABLE(platform, omap3isp_id_table);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver omap3isp_driver = {</div><div class='ctx'> 	.probe = isp_probe,</div><div class='del'>-	.remove = isp_remove,</div><div class='add'>+	.remove = __devexit_p(isp_remove),</div><div class='ctx'> 	.id_table = omap3isp_id_table,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='head'>diff --git a/drivers/media/video/omap3isp/isp.h b/drivers/media/video/omap3isp/isp.h<br/>index d96603eb0d17..fc7af3e32efd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/isp.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/isp.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/isp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/isp.h</a></div><div class='hunk'>@@ -129,7 +129,6 @@ struct isp_platform_callback {</div><div class='ctx'> 	int (*csiphy_config)(struct isp_csiphy *phy,</div><div class='ctx'> 			     struct isp_csiphy_dphy_cfg *dphy,</div><div class='ctx'> 			     struct isp_csiphy_lanes_cfg *lanes);</div><div class='del'>-	void (*set_pixel_clock)(struct isp_device *isp, unsigned int pixelclk);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -145,6 +144,7 @@ struct isp_platform_callback {</div><div class='ctx'>  * @raw_dmamask: Raw DMA mask</div><div class='ctx'>  * @stat_lock: Spinlock for handling statistics</div><div class='ctx'>  * @isp_mutex: Mutex for serializing requests to ISP.</div><div class='add'>+ * @crashed: Bitmask of crashed entities (indexed by entity ID)</div><div class='ctx'>  * @has_context: Context has been saved at least once and can be restored.</div><div class='ctx'>  * @ref_count: Reference count for handling multiple ISP requests.</div><div class='ctx'>  * @cam_ick: Pointer to camera interface clock structure.</div><div class='hunk'>@@ -184,7 +184,7 @@ struct isp_device {</div><div class='ctx'> 	/* ISP Obj */</div><div class='ctx'> 	spinlock_t stat_lock;	/* common lock for statistic drivers */</div><div class='ctx'> 	struct mutex isp_mutex;	/* For handling ref_count field */</div><div class='del'>-	bool needs_reset;</div><div class='add'>+	u32 crashed;</div><div class='ctx'> 	int has_context;</div><div class='ctx'> 	int ref_count;</div><div class='ctx'> 	unsigned int autoidle;</div><div class='hunk'>@@ -237,10 +237,6 @@ void omap3isp_configure_bridge(struct isp_device *isp,</div><div class='ctx'> 			       const struct isp_parallel_platform_data *pdata,</div><div class='ctx'> 			       unsigned int shift);</div><div class='ctx'> </div><div class='del'>-#define ISP_XCLK_NONE			0</div><div class='del'>-#define ISP_XCLK_A			1</div><div class='del'>-#define ISP_XCLK_B			2</div><div class='del'>-</div><div class='ctx'> struct isp_device *omap3isp_get(struct isp_device *isp);</div><div class='ctx'> void omap3isp_put(struct isp_device *isp);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/omap3isp/ispccdc.c b/drivers/media/video/omap3isp/ispccdc.c<br/>index eaabc27f0fa2..7e32331b60fb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispccdc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/ispccdc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispccdc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispccdc.c</a></div><div class='hunk'>@@ -38,6 +38,9 @@</div><div class='ctx'> #include "ispreg.h"</div><div class='ctx'> #include "ispccdc.h"</div><div class='ctx'> </div><div class='add'>+#define CCDC_MIN_WIDTH		32</div><div class='add'>+#define CCDC_MIN_HEIGHT		32</div><div class='add'>+</div><div class='ctx'> static struct v4l2_mbus_framefmt *</div><div class='ctx'> __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,</div><div class='ctx'> 		  unsigned int pad, enum v4l2_subdev_format_whence which);</div><div class='hunk'>@@ -836,8 +839,8 @@ static void ccdc_config_vp(struct isp_ccdc_device *ccdc)</div><div class='ctx'> </div><div class='ctx'> 	if (pipe-&gt;input)</div><div class='ctx'> 		div = DIV_ROUND_UP(l3_ick, pipe-&gt;max_rate);</div><div class='del'>-	else if (ccdc-&gt;vpcfg.pixelclk)</div><div class='del'>-		div = l3_ick / ccdc-&gt;vpcfg.pixelclk;</div><div class='add'>+	else if (pipe-&gt;external_rate)</div><div class='add'>+		div = l3_ick / pipe-&gt;external_rate;</div><div class='ctx'> </div><div class='ctx'> 	div = clamp(div, 2U, max_div);</div><div class='ctx'> 	fmtcfg_vp |= (div - 2) &lt;&lt; ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;</div><div class='hunk'>@@ -1118,6 +1121,7 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)</div><div class='ctx'> 	struct isp_parallel_platform_data *pdata = NULL;</div><div class='ctx'> 	struct v4l2_subdev *sensor;</div><div class='ctx'> 	struct v4l2_mbus_framefmt *format;</div><div class='add'>+	const struct v4l2_rect *crop;</div><div class='ctx'> 	const struct isp_format_info *fmt_info;</div><div class='ctx'> 	struct v4l2_subdev_format fmt_src;</div><div class='ctx'> 	unsigned int depth_out;</div><div class='hunk'>@@ -1211,14 +1215,14 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)</div><div class='ctx'> 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);</div><div class='ctx'> </div><div class='ctx'> 	/* CCDC_PAD_SOURCE_OF */</div><div class='del'>-	format = &amp;ccdc-&gt;formats[CCDC_PAD_SOURCE_OF];</div><div class='add'>+	crop = &amp;ccdc-&gt;crop;</div><div class='ctx'> </div><div class='del'>-	isp_reg_writel(isp, (0 &lt;&lt; ISPCCDC_HORZ_INFO_SPH_SHIFT) |</div><div class='del'>-		       ((format-&gt;width - 1) &lt;&lt; ISPCCDC_HORZ_INFO_NPH_SHIFT),</div><div class='add'>+	isp_reg_writel(isp, (crop-&gt;left &lt;&lt; ISPCCDC_HORZ_INFO_SPH_SHIFT) |</div><div class='add'>+		       ((crop-&gt;width - 1) &lt;&lt; ISPCCDC_HORZ_INFO_NPH_SHIFT),</div><div class='ctx'> 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);</div><div class='del'>-	isp_reg_writel(isp, 0 &lt;&lt; ISPCCDC_VERT_START_SLV0_SHIFT,</div><div class='add'>+	isp_reg_writel(isp, crop-&gt;top &lt;&lt; ISPCCDC_VERT_START_SLV0_SHIFT,</div><div class='ctx'> 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);</div><div class='del'>-	isp_reg_writel(isp, (format-&gt;height - 1)</div><div class='add'>+	isp_reg_writel(isp, (crop-&gt;height - 1)</div><div class='ctx'> 			&lt;&lt; ISPCCDC_VERT_LINES_NLV_SHIFT,</div><div class='ctx'> 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);</div><div class='ctx'> </div><div class='hunk'>@@ -1410,6 +1414,9 @@ static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)</div><div class='ctx'> 	struct video_device *vdev = ccdc-&gt;subdev.devnode;</div><div class='ctx'> 	struct v4l2_event event;</div><div class='ctx'> </div><div class='add'>+	/* Frame number propagation */</div><div class='add'>+	atomic_inc(&amp;pipe-&gt;frame_number);</div><div class='add'>+</div><div class='ctx'> 	memset(&amp;event, 0, sizeof(event));</div><div class='ctx'> 	event.type = V4L2_EVENT_FRAME_SYNC;</div><div class='ctx'> 	event.u.frame_sync.frame_sequence = atomic_read(&amp;pipe-&gt;frame_number);</div><div class='hunk'>@@ -1703,7 +1710,7 @@ static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,</div><div class='ctx'> 	if (sub-&gt;id != 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS);</div><div class='add'>+	return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,</div><div class='hunk'>@@ -1790,6 +1797,16 @@ __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,</div><div class='ctx'> 		return &amp;ccdc-&gt;formats[pad];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct v4l2_rect *</div><div class='add'>+__ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,</div><div class='add'>+		enum v4l2_subdev_format_whence which)</div><div class='add'>+{</div><div class='add'>+	if (which == V4L2_SUBDEV_FORMAT_TRY)</div><div class='add'>+		return v4l2_subdev_get_try_crop(fh, CCDC_PAD_SOURCE_OF);</div><div class='add'>+	else</div><div class='add'>+		return &amp;ccdc-&gt;crop;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * ccdc_try_format - Try video format on a pad</div><div class='ctx'>  * @ccdc: ISP CCDC device</div><div class='hunk'>@@ -1806,6 +1823,7 @@ ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,</div><div class='ctx'> 	const struct isp_format_info *info;</div><div class='ctx'> 	unsigned int width = fmt-&gt;width;</div><div class='ctx'> 	unsigned int height = fmt-&gt;height;</div><div class='add'>+	struct v4l2_rect *crop;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	switch (pad) {</div><div class='hunk'>@@ -1831,14 +1849,10 @@ ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,</div><div class='ctx'> 		format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);</div><div class='ctx'> 		memcpy(fmt, format, sizeof(*fmt));</div><div class='ctx'> </div><div class='del'>-		/* The data formatter truncates the number of horizontal output</div><div class='del'>-		 * pixels to a multiple of 16. To avoid clipping data, allow</div><div class='del'>-		 * callers to request an output size bigger than the input size</div><div class='del'>-		 * up to the nearest multiple of 16.</div><div class='del'>-		 */</div><div class='del'>-		fmt-&gt;width = clamp_t(u32, width, 32, fmt-&gt;width + 15);</div><div class='del'>-		fmt-&gt;width &amp;= ~15;</div><div class='del'>-		fmt-&gt;height = clamp_t(u32, height, 32, fmt-&gt;height);</div><div class='add'>+		/* Hardcode the output size to the crop rectangle size. */</div><div class='add'>+		crop = __ccdc_get_crop(ccdc, fh, which);</div><div class='add'>+		fmt-&gt;width = crop-&gt;width;</div><div class='add'>+		fmt-&gt;height = crop-&gt;height;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case CCDC_PAD_SOURCE_VP:</div><div class='hunk'>@@ -1866,6 +1880,49 @@ ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * ccdc_try_crop - Validate a crop rectangle</div><div class='add'>+ * @ccdc: ISP CCDC device</div><div class='add'>+ * @sink: format on the sink pad</div><div class='add'>+ * @crop: crop rectangle to be validated</div><div class='add'>+ */</div><div class='add'>+static void ccdc_try_crop(struct isp_ccdc_device *ccdc,</div><div class='add'>+			  const struct v4l2_mbus_framefmt *sink,</div><div class='add'>+			  struct v4l2_rect *crop)</div><div class='add'>+{</div><div class='add'>+	const struct isp_format_info *info;</div><div class='add'>+	unsigned int max_width;</div><div class='add'>+</div><div class='add'>+	/* For Bayer formats, restrict left/top and width/height to even values</div><div class='add'>+	 * to keep the Bayer pattern.</div><div class='add'>+	 */</div><div class='add'>+	info = omap3isp_video_format_info(sink-&gt;code);</div><div class='add'>+	if (info-&gt;flavor != V4L2_MBUS_FMT_Y8_1X8) {</div><div class='add'>+		crop-&gt;left &amp;= ~1;</div><div class='add'>+		crop-&gt;top &amp;= ~1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	crop-&gt;left = clamp_t(u32, crop-&gt;left, 0, sink-&gt;width - CCDC_MIN_WIDTH);</div><div class='add'>+	crop-&gt;top = clamp_t(u32, crop-&gt;top, 0, sink-&gt;height - CCDC_MIN_HEIGHT);</div><div class='add'>+</div><div class='add'>+	/* The data formatter truncates the number of horizontal output pixels</div><div class='add'>+	 * to a multiple of 16. To avoid clipping data, allow callers to request</div><div class='add'>+	 * an output size bigger than the input size up to the nearest multiple</div><div class='add'>+	 * of 16.</div><div class='add'>+	 */</div><div class='add'>+	max_width = (sink-&gt;width - crop-&gt;left + 15) &amp; ~15;</div><div class='add'>+	crop-&gt;width = clamp_t(u32, crop-&gt;width, CCDC_MIN_WIDTH, max_width)</div><div class='add'>+		    &amp; ~15;</div><div class='add'>+	crop-&gt;height = clamp_t(u32, crop-&gt;height, CCDC_MIN_HEIGHT,</div><div class='add'>+			       sink-&gt;height - crop-&gt;top);</div><div class='add'>+</div><div class='add'>+	/* Odd width/height values don't make sense for Bayer formats. */</div><div class='add'>+	if (info-&gt;flavor != V4L2_MBUS_FMT_Y8_1X8) {</div><div class='add'>+		crop-&gt;width &amp;= ~1;</div><div class='add'>+		crop-&gt;height &amp;= ~1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * ccdc_enum_mbus_code - Handle pixel format enumeration</div><div class='ctx'>  * @sd     : pointer to v4l2 subdev structure</div><div class='ctx'>  * @fh : V4L2 subdev file handle</div><div class='hunk'>@@ -1937,6 +1994,93 @@ static int ccdc_enum_frame_size(struct v4l2_subdev *sd,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * ccdc_get_selection - Retrieve a selection rectangle on a pad</div><div class='add'>+ * @sd: ISP CCDC V4L2 subdevice</div><div class='add'>+ * @fh: V4L2 subdev file handle</div><div class='add'>+ * @sel: Selection rectangle</div><div class='add'>+ *</div><div class='add'>+ * The only supported rectangles are the crop rectangles on the output formatter</div><div class='add'>+ * source pad.</div><div class='add'>+ *</div><div class='add'>+ * Return 0 on success or a negative error code otherwise.</div><div class='add'>+ */</div><div class='add'>+static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,</div><div class='add'>+			      struct v4l2_subdev_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);</div><div class='add'>+	struct v4l2_mbus_framefmt *format;</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;pad != CCDC_PAD_SOURCE_OF)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (sel-&gt;target) {</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS:</div><div class='add'>+		sel-&gt;r.left = 0;</div><div class='add'>+		sel-&gt;r.top = 0;</div><div class='add'>+		sel-&gt;r.width = INT_MAX;</div><div class='add'>+		sel-&gt;r.height = INT_MAX;</div><div class='add'>+</div><div class='add'>+		format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel-&gt;which);</div><div class='add'>+		ccdc_try_crop(ccdc, format, &amp;sel-&gt;r);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL:</div><div class='add'>+		sel-&gt;r = *__ccdc_get_crop(ccdc, fh, sel-&gt;which);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ccdc_set_selection - Set a selection rectangle on a pad</div><div class='add'>+ * @sd: ISP CCDC V4L2 subdevice</div><div class='add'>+ * @fh: V4L2 subdev file handle</div><div class='add'>+ * @sel: Selection rectangle</div><div class='add'>+ *</div><div class='add'>+ * The only supported rectangle is the actual crop rectangle on the output</div><div class='add'>+ * formatter source pad.</div><div class='add'>+ *</div><div class='add'>+ * Return 0 on success or a negative error code otherwise.</div><div class='add'>+ */</div><div class='add'>+static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,</div><div class='add'>+			      struct v4l2_subdev_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);</div><div class='add'>+	struct v4l2_mbus_framefmt *format;</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;target != V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL ||</div><div class='add'>+	    sel-&gt;pad != CCDC_PAD_SOURCE_OF)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* The crop rectangle can't be changed while streaming. */</div><div class='add'>+	if (ccdc-&gt;state != ISP_PIPELINE_STREAM_STOPPED)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	/* Modifying the crop rectangle always changes the format on the source</div><div class='add'>+	 * pad. If the KEEP_CONFIG flag is set, just return the current crop</div><div class='add'>+	 * rectangle.</div><div class='add'>+	 */</div><div class='add'>+	if (sel-&gt;flags &amp; V4L2_SUBDEV_SEL_FLAG_KEEP_CONFIG) {</div><div class='add'>+		sel-&gt;r = *__ccdc_get_crop(ccdc, fh, sel-&gt;which);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel-&gt;which);</div><div class='add'>+	ccdc_try_crop(ccdc, format, &amp;sel-&gt;r);</div><div class='add'>+	*__ccdc_get_crop(ccdc, fh, sel-&gt;which) = sel-&gt;r;</div><div class='add'>+</div><div class='add'>+	/* Update the source format. */</div><div class='add'>+	format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF, sel-&gt;which);</div><div class='add'>+	ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format, sel-&gt;which);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * ccdc_get_format - Retrieve the video format on a pad</div><div class='ctx'>  * @sd : ISP CCDC V4L2 subdevice</div><div class='ctx'>  * @fh : V4L2 subdev file handle</div><div class='hunk'>@@ -1973,6 +2117,7 @@ static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);</div><div class='ctx'> 	struct v4l2_mbus_framefmt *format;</div><div class='add'>+	struct v4l2_rect *crop;</div><div class='ctx'> </div><div class='ctx'> 	format = __ccdc_get_format(ccdc, fh, fmt-&gt;pad, fmt-&gt;which);</div><div class='ctx'> 	if (format == NULL)</div><div class='hunk'>@@ -1983,6 +2128,16 @@ static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,</div><div class='ctx'> </div><div class='ctx'> 	/* Propagate the format from sink to source */</div><div class='ctx'> 	if (fmt-&gt;pad == CCDC_PAD_SINK) {</div><div class='add'>+		/* Reset the crop rectangle. */</div><div class='add'>+		crop = __ccdc_get_crop(ccdc, fh, fmt-&gt;which);</div><div class='add'>+		crop-&gt;left = 0;</div><div class='add'>+		crop-&gt;top = 0;</div><div class='add'>+		crop-&gt;width = fmt-&gt;format.width;</div><div class='add'>+		crop-&gt;height = fmt-&gt;format.height;</div><div class='add'>+</div><div class='add'>+		ccdc_try_crop(ccdc, &amp;fmt-&gt;format, crop);</div><div class='add'>+</div><div class='add'>+		/* Update the source formats. */</div><div class='ctx'> 		format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,</div><div class='ctx'> 					   fmt-&gt;which);</div><div class='ctx'> 		*format = fmt-&gt;format;</div><div class='hunk'>@@ -2000,6 +2155,69 @@ static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Decide whether desired output pixel code can be obtained with</div><div class='add'>+ * the lane shifter by shifting the input pixel code.</div><div class='add'>+ * @in: input pixelcode to shifter</div><div class='add'>+ * @out: output pixelcode from shifter</div><div class='add'>+ * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]</div><div class='add'>+ *</div><div class='add'>+ * return true if the combination is possible</div><div class='add'>+ * return false otherwise</div><div class='add'>+ */</div><div class='add'>+static bool ccdc_is_shiftable(enum v4l2_mbus_pixelcode in,</div><div class='add'>+			      enum v4l2_mbus_pixelcode out,</div><div class='add'>+			      unsigned int additional_shift)</div><div class='add'>+{</div><div class='add'>+	const struct isp_format_info *in_info, *out_info;</div><div class='add'>+</div><div class='add'>+	if (in == out)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	in_info = omap3isp_video_format_info(in);</div><div class='add'>+	out_info = omap3isp_video_format_info(out);</div><div class='add'>+</div><div class='add'>+	if ((in_info-&gt;flavor == 0) || (out_info-&gt;flavor == 0))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (in_info-&gt;flavor != out_info-&gt;flavor)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return in_info-&gt;bpp - out_info-&gt;bpp + additional_shift &lt;= 6;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ccdc_link_validate(struct v4l2_subdev *sd,</div><div class='add'>+			      struct media_link *link,</div><div class='add'>+			      struct v4l2_subdev_format *source_fmt,</div><div class='add'>+			      struct v4l2_subdev_format *sink_fmt)</div><div class='add'>+{</div><div class='add'>+	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);</div><div class='add'>+	unsigned long parallel_shift;</div><div class='add'>+</div><div class='add'>+	/* Check if the two ends match */</div><div class='add'>+	if (source_fmt-&gt;format.width != sink_fmt-&gt;format.width ||</div><div class='add'>+	    source_fmt-&gt;format.height != sink_fmt-&gt;format.height)</div><div class='add'>+		return -EPIPE;</div><div class='add'>+</div><div class='add'>+	/* We've got a parallel sensor here. */</div><div class='add'>+	if (ccdc-&gt;input == CCDC_INPUT_PARALLEL) {</div><div class='add'>+		struct isp_parallel_platform_data *pdata =</div><div class='add'>+			&amp;((struct isp_v4l2_subdevs_group *)</div><div class='add'>+			  media_entity_to_v4l2_subdev(link-&gt;source-&gt;entity)</div><div class='add'>+			  -&gt;host_priv)-&gt;bus.parallel;</div><div class='add'>+		parallel_shift = pdata-&gt;data_lane_shift * 2;</div><div class='add'>+	} else {</div><div class='add'>+		parallel_shift = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Lane shifter may be used to drop bits on CCDC sink pad */</div><div class='add'>+	if (!ccdc_is_shiftable(source_fmt-&gt;format.code,</div><div class='add'>+			       sink_fmt-&gt;format.code, parallel_shift))</div><div class='add'>+		return -EPIPE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * ccdc_init_formats - Initialize formats on all pads</div><div class='ctx'>  * @sd: ISP CCDC V4L2 subdevice</div><div class='ctx'>  * @fh: V4L2 subdev file handle</div><div class='hunk'>@@ -2041,6 +2259,9 @@ static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {</div><div class='ctx'> 	.enum_frame_size = ccdc_enum_frame_size,</div><div class='ctx'> 	.get_fmt = ccdc_get_format,</div><div class='ctx'> 	.set_fmt = ccdc_set_format,</div><div class='add'>+	.get_selection = ccdc_get_selection,</div><div class='add'>+	.set_selection = ccdc_set_selection,</div><div class='add'>+	.link_validate = ccdc_link_validate,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* V4L2 subdev operations */</div><div class='hunk'>@@ -2150,6 +2371,7 @@ static int ccdc_link_setup(struct media_entity *entity,</div><div class='ctx'> /* media operations */</div><div class='ctx'> static const struct media_entity_operations ccdc_media_ops = {</div><div class='ctx'> 	.link_setup = ccdc_link_setup,</div><div class='add'>+	.link_validate = v4l2_subdev_link_validate,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)</div><div class='hunk'>@@ -2276,8 +2498,6 @@ int omap3isp_ccdc_init(struct isp_device *isp)</div><div class='ctx'> 	ccdc-&gt;clamp.oblen = 0;</div><div class='ctx'> 	ccdc-&gt;clamp.dcsubval = 0;</div><div class='ctx'> </div><div class='del'>-	ccdc-&gt;vpcfg.pixelclk = 0;</div><div class='del'>-</div><div class='ctx'> 	ccdc-&gt;update = OMAP3ISP_CCDC_BLCLAMP;</div><div class='ctx'> 	ccdc_apply_controls(ccdc);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/omap3isp/ispccdc.h b/drivers/media/video/omap3isp/ispccdc.h<br/>index 6d0264bab75b..890f6b3a68fd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispccdc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/ispccdc.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispccdc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispccdc.h</a></div><div class='hunk'>@@ -80,14 +80,6 @@ struct ispccdc_syncif {</div><div class='ctx'> 	u8 bt_r656_en;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * struct ispccdc_vp - Structure for Video Port parameters</div><div class='del'>- * @pixelclk: Input pixel clock in Hz</div><div class='del'>- */</div><div class='del'>-struct ispccdc_vp {</div><div class='del'>-	unsigned int pixelclk;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> enum ispccdc_lsc_state {</div><div class='ctx'> 	LSC_STATE_STOPPED = 0,</div><div class='ctx'> 	LSC_STATE_STOPPING = 1,</div><div class='hunk'>@@ -147,6 +139,7 @@ struct ispccdc_lsc {</div><div class='ctx'>  * @subdev: V4L2 subdevice</div><div class='ctx'>  * @pads: Sink and source media entity pads</div><div class='ctx'>  * @formats: Active video formats</div><div class='add'>+ * @crop: Active crop rectangle on the OF source pad</div><div class='ctx'>  * @input: Active input</div><div class='ctx'>  * @output: Active outputs</div><div class='ctx'>  * @video_out: Output video node</div><div class='hunk'>@@ -161,7 +154,6 @@ struct ispccdc_lsc {</div><div class='ctx'>  * @update: Bitmask of controls to update during the next interrupt</div><div class='ctx'>  * @shadow_update: Controls update in progress by userspace</div><div class='ctx'>  * @syncif: Interface synchronization configuration</div><div class='del'>- * @vpcfg: Video port configuration</div><div class='ctx'>  * @underrun: A buffer underrun occurred and a new buffer has been queued</div><div class='ctx'>  * @state: Streaming state</div><div class='ctx'>  * @lock: Serializes shadow_update with interrupt handler</div><div class='hunk'>@@ -173,6 +165,7 @@ struct isp_ccdc_device {</div><div class='ctx'> 	struct v4l2_subdev subdev;</div><div class='ctx'> 	struct media_pad pads[CCDC_PADS_NUM];</div><div class='ctx'> 	struct v4l2_mbus_framefmt formats[CCDC_PADS_NUM];</div><div class='add'>+	struct v4l2_rect crop;</div><div class='ctx'> </div><div class='ctx'> 	enum ccdc_input_entity input;</div><div class='ctx'> 	unsigned int output;</div><div class='hunk'>@@ -190,7 +183,6 @@ struct isp_ccdc_device {</div><div class='ctx'> 	unsigned int shadow_update;</div><div class='ctx'> </div><div class='ctx'> 	struct ispccdc_syncif syncif;</div><div class='del'>-	struct ispccdc_vp vpcfg;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int underrun:1;</div><div class='ctx'> 	enum isp_pipeline_stream_state state;</div><div class='head'>diff --git a/drivers/media/video/omap3isp/ispccp2.c b/drivers/media/video/omap3isp/ispccp2.c<br/>index 70ddbf35b223..85f0de85f37c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispccp2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/ispccp2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispccp2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispccp2.c</a></div><div class='hunk'>@@ -161,7 +161,6 @@ static void ccp2_pwr_cfg(struct isp_ccp2_device *ccp2)</div><div class='ctx'> static void ccp2_if_enable(struct isp_ccp2_device *ccp2, u8 enable)</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_device *isp = to_isp_device(ccp2);</div><div class='del'>-	struct isp_pipeline *pipe = to_isp_pipeline(&amp;ccp2-&gt;subdev.entity);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (enable &amp;&amp; ccp2-&gt;vdds_csib)</div><div class='hunk'>@@ -178,19 +177,6 @@ static void ccp2_if_enable(struct isp_ccp2_device *ccp2, u8 enable)</div><div class='ctx'> 			ISPCCP2_CTRL_MODE | ISPCCP2_CTRL_IF_EN,</div><div class='ctx'> 			enable ? (ISPCCP2_CTRL_MODE | ISPCCP2_CTRL_IF_EN) : 0);</div><div class='ctx'> </div><div class='del'>-	/* For frame count propagation */</div><div class='del'>-	if (pipe-&gt;do_propagation) {</div><div class='del'>-		/* We may want the Frame Start IRQ from LC0 */</div><div class='del'>-		if (enable)</div><div class='del'>-			isp_reg_set(isp, OMAP3_ISP_IOMEM_CCP2,</div><div class='del'>-				    ISPCCP2_LC01_IRQENABLE,</div><div class='del'>-				    ISPCCP2_LC01_IRQSTATUS_LC0_FS_IRQ);</div><div class='del'>-		else</div><div class='del'>-			isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCP2,</div><div class='del'>-				    ISPCCP2_LC01_IRQENABLE,</div><div class='del'>-				    ISPCCP2_LC01_IRQSTATUS_LC0_FS_IRQ);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (!enable &amp;&amp; ccp2-&gt;vdds_csib)</div><div class='ctx'> 		regulator_disable(ccp2-&gt;vdds_csib);</div><div class='ctx'> }</div><div class='hunk'>@@ -350,7 +336,6 @@ static void ccp2_lcx_config(struct isp_ccp2_device *ccp2,</div><div class='ctx'> 	      ISPCCP2_LC01_IRQSTATUS_LC0_CRC_IRQ |</div><div class='ctx'> 	      ISPCCP2_LC01_IRQSTATUS_LC0_FSP_IRQ |</div><div class='ctx'> 	      ISPCCP2_LC01_IRQSTATUS_LC0_FW_IRQ |</div><div class='del'>-	      ISPCCP2_LC01_IRQSTATUS_LC0_FS_IRQ |</div><div class='ctx'> 	      ISPCCP2_LC01_IRQSTATUS_LC0_FSC_IRQ |</div><div class='ctx'> 	      ISPCCP2_LC01_IRQSTATUS_LC0_SSC_IRQ;</div><div class='ctx'> </div><div class='hunk'>@@ -613,14 +598,6 @@ void omap3isp_ccp2_isr(struct isp_ccp2_device *ccp2)</div><div class='ctx'> 	if (omap3isp_module_sync_is_stopping(&amp;ccp2-&gt;wait, &amp;ccp2-&gt;stopping))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* Frame number propagation */</div><div class='del'>-	if (lcx_irqstatus &amp; ISPCCP2_LC01_IRQSTATUS_LC0_FS_IRQ) {</div><div class='del'>-		struct isp_pipeline *pipe =</div><div class='del'>-			to_isp_pipeline(&amp;ccp2-&gt;subdev.entity);</div><div class='del'>-		if (pipe-&gt;do_propagation)</div><div class='del'>-			atomic_inc(&amp;pipe-&gt;frame_number);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Handle queued buffers on frame end interrupts */</div><div class='ctx'> 	if (lcm_irqstatus &amp; ISPCCP2_LCM_IRQSTATUS_EOF_IRQ)</div><div class='ctx'> 		ccp2_isr_buffer(ccp2);</div><div class='hunk'>@@ -1021,6 +998,7 @@ static int ccp2_link_setup(struct media_entity *entity,</div><div class='ctx'> /* media operations */</div><div class='ctx'> static const struct media_entity_operations ccp2_media_ops = {</div><div class='ctx'> 	.link_setup = ccp2_link_setup,</div><div class='add'>+	.link_validate = v4l2_subdev_link_validate,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/media/video/omap3isp/ispcsi2.c b/drivers/media/video/omap3isp/ispcsi2.c<br/>index fcb5168996a7..a1724362b6d5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispcsi2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/ispcsi2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispcsi2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispcsi2.c</a></div><div class='hunk'>@@ -378,21 +378,17 @@ static void csi2_timing_config(struct isp_device *isp,</div><div class='ctx'> static void csi2_irq_ctx_set(struct isp_device *isp,</div><div class='ctx'> 			     struct isp_csi2_device *csi2, int enable)</div><div class='ctx'> {</div><div class='del'>-	u32 reg = ISPCSI2_CTX_IRQSTATUS_FE_IRQ;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (csi2-&gt;use_fs_irq)</div><div class='del'>-		reg |= ISPCSI2_CTX_IRQSTATUS_FS_IRQ;</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; 8; i++) {</div><div class='del'>-		isp_reg_writel(isp, reg, csi2-&gt;regs1,</div><div class='add'>+		isp_reg_writel(isp, ISPCSI2_CTX_IRQSTATUS_FE_IRQ, csi2-&gt;regs1,</div><div class='ctx'> 			       ISPCSI2_CTX_IRQSTATUS(i));</div><div class='ctx'> 		if (enable)</div><div class='ctx'> 			isp_reg_set(isp, csi2-&gt;regs1, ISPCSI2_CTX_IRQENABLE(i),</div><div class='del'>-				    reg);</div><div class='add'>+				    ISPCSI2_CTX_IRQSTATUS_FE_IRQ);</div><div class='ctx'> 		else</div><div class='ctx'> 			isp_reg_clr(isp, csi2-&gt;regs1, ISPCSI2_CTX_IRQENABLE(i),</div><div class='del'>-				    reg);</div><div class='add'>+				    ISPCSI2_CTX_IRQSTATUS_FE_IRQ);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -690,14 +686,6 @@ static void csi2_isr_ctx(struct isp_csi2_device *csi2,</div><div class='ctx'> 	status = isp_reg_readl(isp, csi2-&gt;regs1, ISPCSI2_CTX_IRQSTATUS(n));</div><div class='ctx'> 	isp_reg_writel(isp, status, csi2-&gt;regs1, ISPCSI2_CTX_IRQSTATUS(n));</div><div class='ctx'> </div><div class='del'>-	/* Propagate frame number */</div><div class='del'>-	if (status &amp; ISPCSI2_CTX_IRQSTATUS_FS_IRQ) {</div><div class='del'>-		struct isp_pipeline *pipe =</div><div class='del'>-				     to_isp_pipeline(&amp;csi2-&gt;subdev.entity);</div><div class='del'>-		if (pipe-&gt;do_propagation)</div><div class='del'>-			atomic_inc(&amp;pipe-&gt;frame_number);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (!(status &amp; ISPCSI2_CTX_IRQSTATUS_FE_IRQ))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -1047,14 +1035,12 @@ static int csi2_set_stream(struct v4l2_subdev *sd, int enable)</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_csi2_device *csi2 = v4l2_get_subdevdata(sd);</div><div class='ctx'> 	struct isp_device *isp = csi2-&gt;isp;</div><div class='del'>-	struct isp_pipeline *pipe = to_isp_pipeline(&amp;csi2-&gt;subdev.entity);</div><div class='ctx'> 	struct isp_video *video_out = &amp;csi2-&gt;video_out;</div><div class='ctx'> </div><div class='ctx'> 	switch (enable) {</div><div class='ctx'> 	case ISP_PIPELINE_STREAM_CONTINUOUS:</div><div class='ctx'> 		if (omap3isp_csiphy_acquire(csi2-&gt;phy) &lt; 0)</div><div class='ctx'> 			return -ENODEV;</div><div class='del'>-		csi2-&gt;use_fs_irq = pipe-&gt;do_propagation;</div><div class='ctx'> 		if (csi2-&gt;output &amp; CSI2_OUTPUT_MEMORY)</div><div class='ctx'> 			omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CSI2A_WRITE);</div><div class='ctx'> 		csi2_configure(csi2);</div><div class='hunk'>@@ -1181,6 +1167,7 @@ static int csi2_link_setup(struct media_entity *entity,</div><div class='ctx'> /* media operations */</div><div class='ctx'> static const struct media_entity_operations csi2_media_ops = {</div><div class='ctx'> 	.link_setup = csi2_link_setup,</div><div class='add'>+	.link_validate = v4l2_subdev_link_validate,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void omap3isp_csi2_unregister_entities(struct isp_csi2_device *csi2)</div><div class='head'>diff --git a/drivers/media/video/omap3isp/ispcsi2.h b/drivers/media/video/omap3isp/ispcsi2.h<br/>index 885ad79a7678..c57729b7e86e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispcsi2.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/ispcsi2.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispcsi2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispcsi2.h</a></div><div class='hunk'>@@ -145,7 +145,6 @@ struct isp_csi2_device {</div><div class='ctx'> 	u32 output; /* output to CCDC, memory or both? */</div><div class='ctx'> 	bool dpcm_decompress;</div><div class='ctx'> 	unsigned int frame_skip;</div><div class='del'>-	bool use_fs_irq;</div><div class='ctx'> </div><div class='ctx'> 	struct isp_csiphy *phy;</div><div class='ctx'> 	struct isp_csi2_ctx_cfg contexts[ISP_CSI2_MAX_CTX_NUM + 1];</div><div class='head'>diff --git a/drivers/media/video/omap3isp/ispcsiphy.c b/drivers/media/video/omap3isp/ispcsiphy.c<br/>index 5be37ce7d0c2..348f67ebbbc9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispcsiphy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/ispcsiphy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispcsiphy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispcsiphy.c</a></div><div class='hunk'>@@ -186,7 +186,9 @@ int omap3isp_csiphy_acquire(struct isp_csiphy *phy)</div><div class='ctx'> 	if (rval &lt; 0)</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='del'>-	omap3isp_csi2_reset(phy-&gt;csi2);</div><div class='add'>+	rval = omap3isp_csi2_reset(phy-&gt;csi2);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto done;</div><div class='ctx'> </div><div class='ctx'> 	csiphy_dphy_config(phy);</div><div class='ctx'> 	csiphy_lanes_config(phy);</div><div class='head'>diff --git a/drivers/media/video/omap3isp/ispcsiphy.h b/drivers/media/video/omap3isp/ispcsiphy.h<br/>index 9596dc6830a6..e93a661e65d9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispcsiphy.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/ispcsiphy.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispcsiphy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispcsiphy.h</a></div><div class='hunk'>@@ -27,22 +27,11 @@</div><div class='ctx'> #ifndef OMAP3_ISP_CSI_PHY_H</div><div class='ctx'> #define OMAP3_ISP_CSI_PHY_H</div><div class='ctx'> </div><div class='add'>+#include &lt;media/omap3isp.h&gt;</div><div class='add'>+</div><div class='ctx'> struct isp_csi2_device;</div><div class='ctx'> struct regulator;</div><div class='ctx'> </div><div class='del'>-struct csiphy_lane {</div><div class='del'>-	u8 pos;</div><div class='del'>-	u8 pol;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ISP_CSIPHY2_NUM_DATA_LANES	2</div><div class='del'>-#define ISP_CSIPHY1_NUM_DATA_LANES	1</div><div class='del'>-</div><div class='del'>-struct isp_csiphy_lanes_cfg {</div><div class='del'>-	struct csiphy_lane data[ISP_CSIPHY2_NUM_DATA_LANES];</div><div class='del'>-	struct csiphy_lane clk;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct isp_csiphy_dphy_cfg {</div><div class='ctx'> 	u8 ths_term;</div><div class='ctx'> 	u8 ths_settle;</div><div class='head'>diff --git a/drivers/media/video/omap3isp/isppreview.c b/drivers/media/video/omap3isp/isppreview.c<br/>index 6d0fb2c8c26d..8a4935ecc655 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/isppreview.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/isppreview.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/isppreview.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/isppreview.c</a></div><div class='hunk'>@@ -441,23 +441,6 @@ preview_enable_dcor(struct isp_prev_device *prev, u8 enable)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * preview_enable_cfa - Enable/Disable the CFA Interpolation.</div><div class='del'>- * @enable: 1 - Enables the CFA.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-preview_enable_cfa(struct isp_prev_device *prev, u8 enable)</div><div class='del'>-{</div><div class='del'>-	struct isp_device *isp = to_isp_device(prev);</div><div class='del'>-</div><div class='del'>-	if (enable)</div><div class='del'>-		isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,</div><div class='del'>-			    ISPPRV_PCR_CFAEN);</div><div class='del'>-	else</div><div class='del'>-		isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,</div><div class='del'>-			    ISPPRV_PCR_CFAEN);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * preview_enable_gammabypass - Enables/Disables the GammaByPass</div><div class='ctx'>  * @enable: 1 - Bypasses Gamma - 10bit input is cropped to 8MSB.</div><div class='ctx'>  *          0 - Goes through Gamma Correction. input and output is 10bit.</div><div class='hunk'>@@ -608,12 +591,12 @@ preview_config_rgb_blending(struct isp_prev_device *prev, const void *rgb2rgb)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Configures the RGB-YCbYCr conversion matrix</div><div class='add'>+ * Configures the color space conversion (RGB toYCbYCr) matrix</div><div class='ctx'>  * @prev_csc: Structure containing the RGB to YCbYCr matrix and the</div><div class='ctx'>  *            YCbCr offset.</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='del'>-preview_config_rgb_to_ycbcr(struct isp_prev_device *prev, const void *prev_csc)</div><div class='add'>+preview_config_csc(struct isp_prev_device *prev, const void *prev_csc)</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_device *isp = to_isp_device(prev);</div><div class='ctx'> 	const struct omap3isp_prev_csc *csc = prev_csc;</div><div class='hunk'>@@ -649,12 +632,18 @@ preview_config_rgb_to_ycbcr(struct isp_prev_device *prev, const void *prev_csc)</div><div class='ctx'> static void</div><div class='ctx'> preview_update_contrast(struct isp_prev_device *prev, u8 contrast)</div><div class='ctx'> {</div><div class='del'>-	struct prev_params *params = &amp;prev-&gt;params;</div><div class='add'>+	struct prev_params *params;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;prev-&gt;params.lock, flags);</div><div class='add'>+	params = (prev-&gt;params.active &amp; OMAP3ISP_PREV_CONTRAST)</div><div class='add'>+	       ? &amp;prev-&gt;params.params[0] : &amp;prev-&gt;params.params[1];</div><div class='ctx'> </div><div class='ctx'> 	if (params-&gt;contrast != (contrast * ISPPRV_CONTRAST_UNITS)) {</div><div class='ctx'> 		params-&gt;contrast = contrast * ISPPRV_CONTRAST_UNITS;</div><div class='del'>-		prev-&gt;update |= PREV_CONTRAST;</div><div class='add'>+		params-&gt;update |= OMAP3ISP_PREV_CONTRAST;</div><div class='ctx'> 	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;prev-&gt;params.lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -681,12 +670,18 @@ preview_config_contrast(struct isp_prev_device *prev, const void *params)</div><div class='ctx'> static void</div><div class='ctx'> preview_update_brightness(struct isp_prev_device *prev, u8 brightness)</div><div class='ctx'> {</div><div class='del'>-	struct prev_params *params = &amp;prev-&gt;params;</div><div class='add'>+	struct prev_params *params;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;prev-&gt;params.lock, flags);</div><div class='add'>+	params = (prev-&gt;params.active &amp; OMAP3ISP_PREV_BRIGHTNESS)</div><div class='add'>+	       ? &amp;prev-&gt;params.params[0] : &amp;prev-&gt;params.params[1];</div><div class='ctx'> </div><div class='ctx'> 	if (params-&gt;brightness != (brightness * ISPPRV_BRIGHT_UNITS)) {</div><div class='ctx'> 		params-&gt;brightness = brightness * ISPPRV_BRIGHT_UNITS;</div><div class='del'>-		prev-&gt;update |= PREV_BRIGHTNESS;</div><div class='add'>+		params-&gt;update |= OMAP3ISP_PREV_BRIGHTNESS;</div><div class='ctx'> 	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;prev-&gt;params.lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -721,159 +716,188 @@ preview_config_yc_range(struct isp_prev_device *prev, const void *yclimit)</div><div class='ctx'> 		       OMAP3_ISP_IOMEM_PREV, ISPPRV_SETUP_YC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32</div><div class='add'>+preview_params_lock(struct isp_prev_device *prev, u32 update, bool shadow)</div><div class='add'>+{</div><div class='add'>+	u32 active = prev-&gt;params.active;</div><div class='add'>+</div><div class='add'>+	if (shadow) {</div><div class='add'>+		/* Mark all shadow parameters we are going to touch as busy. */</div><div class='add'>+		prev-&gt;params.params[0].busy |= ~active &amp; update;</div><div class='add'>+		prev-&gt;params.params[1].busy |= active &amp; update;</div><div class='add'>+	} else {</div><div class='add'>+		/* Mark all active parameters we are going to touch as busy. */</div><div class='add'>+		update = (prev-&gt;params.params[0].update &amp; active)</div><div class='add'>+		       | (prev-&gt;params.params[1].update &amp; ~active);</div><div class='add'>+</div><div class='add'>+		prev-&gt;params.params[0].busy |= active &amp; update;</div><div class='add'>+		prev-&gt;params.params[1].busy |= ~active &amp; update;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return update;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+preview_params_unlock(struct isp_prev_device *prev, u32 update, bool shadow)</div><div class='add'>+{</div><div class='add'>+	u32 active = prev-&gt;params.active;</div><div class='add'>+</div><div class='add'>+	if (shadow) {</div><div class='add'>+		/* Set the update flag for shadow parameters that have been</div><div class='add'>+		 * updated and clear the busy flag for all shadow parameters.</div><div class='add'>+		 */</div><div class='add'>+		prev-&gt;params.params[0].update |= (~active &amp; update);</div><div class='add'>+		prev-&gt;params.params[1].update |= (active &amp; update);</div><div class='add'>+		prev-&gt;params.params[0].busy &amp;= active;</div><div class='add'>+		prev-&gt;params.params[1].busy &amp;= ~active;</div><div class='add'>+	} else {</div><div class='add'>+		/* Clear the update flag for active parameters that have been</div><div class='add'>+		 * applied and the busy flag for all active parameters.</div><div class='add'>+		 */</div><div class='add'>+		prev-&gt;params.params[0].update &amp;= ~(active &amp; update);</div><div class='add'>+		prev-&gt;params.params[1].update &amp;= ~(~active &amp; update);</div><div class='add'>+		prev-&gt;params.params[0].busy &amp;= ~active;</div><div class='add'>+		prev-&gt;params.params[1].busy &amp;= active;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void preview_params_switch(struct isp_prev_device *prev)</div><div class='add'>+{</div><div class='add'>+	u32 to_switch;</div><div class='add'>+</div><div class='add'>+	/* Switch active parameters with updated shadow parameters when the</div><div class='add'>+	 * shadow parameter has been updated and neither the active not the</div><div class='add'>+	 * shadow parameter is busy.</div><div class='add'>+	 */</div><div class='add'>+	to_switch = (prev-&gt;params.params[0].update &amp; ~prev-&gt;params.active)</div><div class='add'>+		  | (prev-&gt;params.params[1].update &amp; prev-&gt;params.active);</div><div class='add'>+	to_switch &amp;= ~(prev-&gt;params.params[0].busy |</div><div class='add'>+		       prev-&gt;params.params[1].busy);</div><div class='add'>+	if (to_switch == 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	prev-&gt;params.active ^= to_switch;</div><div class='add'>+</div><div class='add'>+	/* Remove the update flag for the shadow copy of parameters we have</div><div class='add'>+	 * switched.</div><div class='add'>+	 */</div><div class='add'>+	prev-&gt;params.params[0].update &amp;= ~(~prev-&gt;params.active &amp; to_switch);</div><div class='add'>+	prev-&gt;params.params[1].update &amp;= ~(prev-&gt;params.active &amp; to_switch);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* preview parameters update structure */</div><div class='ctx'> struct preview_update {</div><div class='del'>-	int cfg_bit;</div><div class='del'>-	int feature_bit;</div><div class='ctx'> 	void (*config)(struct isp_prev_device *, const void *);</div><div class='ctx'> 	void (*enable)(struct isp_prev_device *, u8);</div><div class='add'>+	unsigned int param_offset;</div><div class='add'>+	unsigned int param_size;</div><div class='add'>+	unsigned int config_offset;</div><div class='add'>+	bool skip;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct preview_update update_attrs[] = {</div><div class='del'>-	{OMAP3ISP_PREV_LUMAENH, PREV_LUMA_ENHANCE,</div><div class='add'>+/* Keep the array indexed by the OMAP3ISP_PREV_* bit number. */</div><div class='add'>+static const struct preview_update update_attrs[] = {</div><div class='add'>+	/* OMAP3ISP_PREV_LUMAENH */ {</div><div class='ctx'> 		preview_config_luma_enhancement,</div><div class='del'>-		preview_enable_luma_enhancement},</div><div class='del'>-	{OMAP3ISP_PREV_INVALAW, PREV_INVERSE_ALAW,</div><div class='add'>+		preview_enable_luma_enhancement,</div><div class='add'>+		offsetof(struct prev_params, luma),</div><div class='add'>+		FIELD_SIZEOF(struct prev_params, luma),</div><div class='add'>+		offsetof(struct omap3isp_prev_update_config, luma),</div><div class='add'>+	}, /* OMAP3ISP_PREV_INVALAW */ {</div><div class='ctx'> 		NULL,</div><div class='del'>-		preview_enable_invalaw},</div><div class='del'>-	{OMAP3ISP_PREV_HRZ_MED, PREV_HORZ_MEDIAN_FILTER,</div><div class='add'>+		preview_enable_invalaw,</div><div class='add'>+	}, /* OMAP3ISP_PREV_HRZ_MED */ {</div><div class='ctx'> 		preview_config_hmed,</div><div class='del'>-		preview_enable_hmed},</div><div class='del'>-	{OMAP3ISP_PREV_CFA, PREV_CFA,</div><div class='add'>+		preview_enable_hmed,</div><div class='add'>+		offsetof(struct prev_params, hmed),</div><div class='add'>+		FIELD_SIZEOF(struct prev_params, hmed),</div><div class='add'>+		offsetof(struct omap3isp_prev_update_config, hmed),</div><div class='add'>+	}, /* OMAP3ISP_PREV_CFA */ {</div><div class='ctx'> 		preview_config_cfa,</div><div class='del'>-		preview_enable_cfa},</div><div class='del'>-	{OMAP3ISP_PREV_CHROMA_SUPP, PREV_CHROMA_SUPPRESS,</div><div class='add'>+		NULL,</div><div class='add'>+		offsetof(struct prev_params, cfa),</div><div class='add'>+		FIELD_SIZEOF(struct prev_params, cfa),</div><div class='add'>+		offsetof(struct omap3isp_prev_update_config, cfa),</div><div class='add'>+	}, /* OMAP3ISP_PREV_CHROMA_SUPP */ {</div><div class='ctx'> 		preview_config_chroma_suppression,</div><div class='del'>-		preview_enable_chroma_suppression},</div><div class='del'>-	{OMAP3ISP_PREV_WB, PREV_WB,</div><div class='add'>+		preview_enable_chroma_suppression,</div><div class='add'>+		offsetof(struct prev_params, csup),</div><div class='add'>+		FIELD_SIZEOF(struct prev_params, csup),</div><div class='add'>+		offsetof(struct omap3isp_prev_update_config, csup),</div><div class='add'>+	}, /* OMAP3ISP_PREV_WB */ {</div><div class='ctx'> 		preview_config_whitebalance,</div><div class='del'>-		NULL},</div><div class='del'>-	{OMAP3ISP_PREV_BLKADJ, PREV_BLKADJ,</div><div class='add'>+		NULL,</div><div class='add'>+		offsetof(struct prev_params, wbal),</div><div class='add'>+		FIELD_SIZEOF(struct prev_params, wbal),</div><div class='add'>+		offsetof(struct omap3isp_prev_update_config, wbal),</div><div class='add'>+	}, /* OMAP3ISP_PREV_BLKADJ */ {</div><div class='ctx'> 		preview_config_blkadj,</div><div class='del'>-		NULL},</div><div class='del'>-	{OMAP3ISP_PREV_RGB2RGB, PREV_RGB2RGB,</div><div class='add'>+		NULL,</div><div class='add'>+		offsetof(struct prev_params, blkadj),</div><div class='add'>+		FIELD_SIZEOF(struct prev_params, blkadj),</div><div class='add'>+		offsetof(struct omap3isp_prev_update_config, blkadj),</div><div class='add'>+	}, /* OMAP3ISP_PREV_RGB2RGB */ {</div><div class='ctx'> 		preview_config_rgb_blending,</div><div class='del'>-		NULL},</div><div class='del'>-	{OMAP3ISP_PREV_COLOR_CONV, PREV_COLOR_CONV,</div><div class='del'>-		preview_config_rgb_to_ycbcr,</div><div class='del'>-		NULL},</div><div class='del'>-	{OMAP3ISP_PREV_YC_LIMIT, PREV_YCLIMITS,</div><div class='add'>+		NULL,</div><div class='add'>+		offsetof(struct prev_params, rgb2rgb),</div><div class='add'>+		FIELD_SIZEOF(struct prev_params, rgb2rgb),</div><div class='add'>+		offsetof(struct omap3isp_prev_update_config, rgb2rgb),</div><div class='add'>+	}, /* OMAP3ISP_PREV_COLOR_CONV */ {</div><div class='add'>+		preview_config_csc,</div><div class='add'>+		NULL,</div><div class='add'>+		offsetof(struct prev_params, csc),</div><div class='add'>+		FIELD_SIZEOF(struct prev_params, csc),</div><div class='add'>+		offsetof(struct omap3isp_prev_update_config, csc),</div><div class='add'>+	}, /* OMAP3ISP_PREV_YC_LIMIT */ {</div><div class='ctx'> 		preview_config_yc_range,</div><div class='del'>-		NULL},</div><div class='del'>-	{OMAP3ISP_PREV_DEFECT_COR, PREV_DEFECT_COR,</div><div class='add'>+		NULL,</div><div class='add'>+		offsetof(struct prev_params, yclimit),</div><div class='add'>+		FIELD_SIZEOF(struct prev_params, yclimit),</div><div class='add'>+		offsetof(struct omap3isp_prev_update_config, yclimit),</div><div class='add'>+	}, /* OMAP3ISP_PREV_DEFECT_COR */ {</div><div class='ctx'> 		preview_config_dcor,</div><div class='del'>-		preview_enable_dcor},</div><div class='del'>-	{OMAP3ISP_PREV_GAMMABYPASS, PREV_GAMMA_BYPASS,</div><div class='add'>+		preview_enable_dcor,</div><div class='add'>+		offsetof(struct prev_params, dcor),</div><div class='add'>+		FIELD_SIZEOF(struct prev_params, dcor),</div><div class='add'>+		offsetof(struct omap3isp_prev_update_config, dcor),</div><div class='add'>+	}, /* OMAP3ISP_PREV_GAMMABYPASS */ {</div><div class='ctx'> 		NULL,</div><div class='del'>-		preview_enable_gammabypass},</div><div class='del'>-	{OMAP3ISP_PREV_DRK_FRM_CAPTURE, PREV_DARK_FRAME_CAPTURE,</div><div class='add'>+		preview_enable_gammabypass,</div><div class='add'>+	}, /* OMAP3ISP_PREV_DRK_FRM_CAPTURE */ {</div><div class='ctx'> 		NULL,</div><div class='del'>-		preview_enable_drkframe_capture},</div><div class='del'>-	{OMAP3ISP_PREV_DRK_FRM_SUBTRACT, PREV_DARK_FRAME_SUBTRACT,</div><div class='add'>+		preview_enable_drkframe_capture,</div><div class='add'>+	}, /* OMAP3ISP_PREV_DRK_FRM_SUBTRACT */ {</div><div class='ctx'> 		NULL,</div><div class='del'>-		preview_enable_drkframe},</div><div class='del'>-	{OMAP3ISP_PREV_LENS_SHADING, PREV_LENS_SHADING,</div><div class='add'>+		preview_enable_drkframe,</div><div class='add'>+	}, /* OMAP3ISP_PREV_LENS_SHADING */ {</div><div class='ctx'> 		preview_config_drkf_shadcomp,</div><div class='del'>-		preview_enable_drkframe},</div><div class='del'>-	{OMAP3ISP_PREV_NF, PREV_NOISE_FILTER,</div><div class='add'>+		preview_enable_drkframe,</div><div class='add'>+	}, /* OMAP3ISP_PREV_NF */ {</div><div class='ctx'> 		preview_config_noisefilter,</div><div class='del'>-		preview_enable_noisefilter},</div><div class='del'>-	{OMAP3ISP_PREV_GAMMA, PREV_GAMMA,</div><div class='add'>+		preview_enable_noisefilter,</div><div class='add'>+		offsetof(struct prev_params, nf),</div><div class='add'>+		FIELD_SIZEOF(struct prev_params, nf),</div><div class='add'>+		offsetof(struct omap3isp_prev_update_config, nf),</div><div class='add'>+	}, /* OMAP3ISP_PREV_GAMMA */ {</div><div class='ctx'> 		preview_config_gammacorrn,</div><div class='del'>-		NULL},</div><div class='del'>-	{-1, PREV_CONTRAST,</div><div class='add'>+		NULL,</div><div class='add'>+		offsetof(struct prev_params, gamma),</div><div class='add'>+		FIELD_SIZEOF(struct prev_params, gamma),</div><div class='add'>+		offsetof(struct omap3isp_prev_update_config, gamma),</div><div class='add'>+	}, /* OMAP3ISP_PREV_CONTRAST */ {</div><div class='ctx'> 		preview_config_contrast,</div><div class='del'>-		NULL},</div><div class='del'>-	{-1, PREV_BRIGHTNESS,</div><div class='add'>+		NULL,</div><div class='add'>+		offsetof(struct prev_params, contrast),</div><div class='add'>+		0, true,</div><div class='add'>+	}, /* OMAP3ISP_PREV_BRIGHTNESS */ {</div><div class='ctx'> 		preview_config_brightness,</div><div class='del'>-		NULL},</div><div class='add'>+		NULL,</div><div class='add'>+		offsetof(struct prev_params, brightness),</div><div class='add'>+		0, true,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * __preview_get_ptrs - helper function which return pointers to members</div><div class='del'>- *                         of params and config structures.</div><div class='del'>- * @params - pointer to preview_params structure.</div><div class='del'>- * @param - return pointer to appropriate structure field.</div><div class='del'>- * @configs - pointer to update config structure.</div><div class='del'>- * @config - return pointer to appropriate structure field.</div><div class='del'>- * @bit - for which feature to return pointers.</div><div class='del'>- * Return size of corresponding prev_params member</div><div class='del'>- */</div><div class='del'>-static u32</div><div class='del'>-__preview_get_ptrs(struct prev_params *params, void **param,</div><div class='del'>-		   struct omap3isp_prev_update_config *configs,</div><div class='del'>-		   void __user **config, u32 bit)</div><div class='del'>-{</div><div class='del'>-#define CHKARG(cfgs, cfg, field)				\</div><div class='del'>-	if (cfgs &amp;&amp; cfg) {					\</div><div class='del'>-		*(cfg) = (cfgs)-&gt;field;				\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (bit) {</div><div class='del'>-	case PREV_HORZ_MEDIAN_FILTER:</div><div class='del'>-		*param = &amp;params-&gt;hmed;</div><div class='del'>-		CHKARG(configs, config, hmed)</div><div class='del'>-		return sizeof(params-&gt;hmed);</div><div class='del'>-	case PREV_NOISE_FILTER:</div><div class='del'>-		*param = &amp;params-&gt;nf;</div><div class='del'>-		CHKARG(configs, config, nf)</div><div class='del'>-		return sizeof(params-&gt;nf);</div><div class='del'>-		break;</div><div class='del'>-	case PREV_CFA:</div><div class='del'>-		*param = &amp;params-&gt;cfa;</div><div class='del'>-		CHKARG(configs, config, cfa)</div><div class='del'>-		return sizeof(params-&gt;cfa);</div><div class='del'>-	case PREV_LUMA_ENHANCE:</div><div class='del'>-		*param = &amp;params-&gt;luma;</div><div class='del'>-		CHKARG(configs, config, luma)</div><div class='del'>-		return sizeof(params-&gt;luma);</div><div class='del'>-	case PREV_CHROMA_SUPPRESS:</div><div class='del'>-		*param = &amp;params-&gt;csup;</div><div class='del'>-		CHKARG(configs, config, csup)</div><div class='del'>-		return sizeof(params-&gt;csup);</div><div class='del'>-	case PREV_DEFECT_COR:</div><div class='del'>-		*param = &amp;params-&gt;dcor;</div><div class='del'>-		CHKARG(configs, config, dcor)</div><div class='del'>-		return sizeof(params-&gt;dcor);</div><div class='del'>-	case PREV_BLKADJ:</div><div class='del'>-		*param = &amp;params-&gt;blk_adj;</div><div class='del'>-		CHKARG(configs, config, blkadj)</div><div class='del'>-		return sizeof(params-&gt;blk_adj);</div><div class='del'>-	case PREV_YCLIMITS:</div><div class='del'>-		*param = &amp;params-&gt;yclimit;</div><div class='del'>-		CHKARG(configs, config, yclimit)</div><div class='del'>-		return sizeof(params-&gt;yclimit);</div><div class='del'>-	case PREV_RGB2RGB:</div><div class='del'>-		*param = &amp;params-&gt;rgb2rgb;</div><div class='del'>-		CHKARG(configs, config, rgb2rgb)</div><div class='del'>-		return sizeof(params-&gt;rgb2rgb);</div><div class='del'>-	case PREV_COLOR_CONV:</div><div class='del'>-		*param = &amp;params-&gt;rgb2ycbcr;</div><div class='del'>-		CHKARG(configs, config, csc)</div><div class='del'>-		return sizeof(params-&gt;rgb2ycbcr);</div><div class='del'>-	case PREV_WB:</div><div class='del'>-		*param = &amp;params-&gt;wbal;</div><div class='del'>-		CHKARG(configs, config, wbal)</div><div class='del'>-		return sizeof(params-&gt;wbal);</div><div class='del'>-	case PREV_GAMMA:</div><div class='del'>-		*param = &amp;params-&gt;gamma;</div><div class='del'>-		CHKARG(configs, config, gamma)</div><div class='del'>-		return sizeof(params-&gt;gamma);</div><div class='del'>-	case PREV_CONTRAST:</div><div class='del'>-		*param = &amp;params-&gt;contrast;</div><div class='del'>-		return 0;</div><div class='del'>-	case PREV_BRIGHTNESS:</div><div class='del'>-		*param = &amp;params-&gt;brightness;</div><div class='del'>-		return 0;</div><div class='del'>-	default:</div><div class='del'>-		*param = NULL;</div><div class='del'>-		*config = NULL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * preview_config - Copy and update local structure with userspace preview</div><div class='ctx'>  *                  configuration.</div><div class='ctx'>  * @prev: ISP preview engine</div><div class='hunk'>@@ -885,84 +909,103 @@ __preview_get_ptrs(struct prev_params *params, void **param,</div><div class='ctx'> static int preview_config(struct isp_prev_device *prev,</div><div class='ctx'> 			  struct omap3isp_prev_update_config *cfg)</div><div class='ctx'> {</div><div class='del'>-	struct prev_params *params;</div><div class='del'>-	struct preview_update *attr;</div><div class='del'>-	int i, bit, rval = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int rval = 0;</div><div class='add'>+	u32 update;</div><div class='add'>+	u32 active;</div><div class='ctx'> </div><div class='del'>-	params = &amp;prev-&gt;params;</div><div class='add'>+	if (cfg-&gt;update == 0)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	if (prev-&gt;state != ISP_PIPELINE_STREAM_STOPPED) {</div><div class='del'>-		unsigned long flags;</div><div class='add'>+	/* Mark the shadow parameters we're going to update as busy. */</div><div class='add'>+	spin_lock_irqsave(&amp;prev-&gt;params.lock, flags);</div><div class='add'>+	preview_params_lock(prev, cfg-&gt;update, true);</div><div class='add'>+	active = prev-&gt;params.active;</div><div class='add'>+	spin_unlock_irqrestore(&amp;prev-&gt;params.lock, flags);</div><div class='ctx'> </div><div class='del'>-		spin_lock_irqsave(&amp;prev-&gt;lock, flags);</div><div class='del'>-		prev-&gt;shadow_update = 1;</div><div class='del'>-		spin_unlock_irqrestore(&amp;prev-&gt;lock, flags);</div><div class='del'>-	}</div><div class='add'>+	update = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(update_attrs); i++) {</div><div class='del'>-		attr = &amp;update_attrs[i];</div><div class='del'>-		bit = 0;</div><div class='add'>+		const struct preview_update *attr = &amp;update_attrs[i];</div><div class='add'>+		struct prev_params *params;</div><div class='add'>+		unsigned int bit = 1 &lt;&lt; i;</div><div class='ctx'> </div><div class='del'>-		if (!(cfg-&gt;update &amp; attr-&gt;cfg_bit))</div><div class='add'>+		if (attr-&gt;skip || !(cfg-&gt;update &amp; bit))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		bit = cfg-&gt;flag &amp; attr-&gt;cfg_bit;</div><div class='del'>-		if (bit) {</div><div class='del'>-			void *to = NULL, __user *from = NULL;</div><div class='del'>-			unsigned long sz = 0;</div><div class='add'>+		params = &amp;prev-&gt;params.params[!!(active &amp; bit)];</div><div class='add'>+</div><div class='add'>+		if (cfg-&gt;flag &amp; bit) {</div><div class='add'>+			void __user *from = *(void * __user *)</div><div class='add'>+				((void *)cfg + attr-&gt;config_offset);</div><div class='add'>+			void *to = (void *)params + attr-&gt;param_offset;</div><div class='add'>+			size_t size = attr-&gt;param_size;</div><div class='ctx'> </div><div class='del'>-			sz = __preview_get_ptrs(params, &amp;to, cfg, &amp;from,</div><div class='del'>-						   bit);</div><div class='del'>-			if (to &amp;&amp; from &amp;&amp; sz) {</div><div class='del'>-				if (copy_from_user(to, from, sz)) {</div><div class='add'>+			if (to &amp;&amp; from &amp;&amp; size) {</div><div class='add'>+				if (copy_from_user(to, from, size)) {</div><div class='ctx'> 					rval = -EFAULT;</div><div class='ctx'> 					break;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='del'>-			params-&gt;features |= attr-&gt;feature_bit;</div><div class='add'>+			params-&gt;features |= bit;</div><div class='ctx'> 		} else {</div><div class='del'>-			params-&gt;features &amp;= ~attr-&gt;feature_bit;</div><div class='add'>+			params-&gt;features &amp;= ~bit;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		prev-&gt;update |= attr-&gt;feature_bit;</div><div class='add'>+		update |= bit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	prev-&gt;shadow_update = 0;</div><div class='add'>+	spin_lock_irqsave(&amp;prev-&gt;params.lock, flags);</div><div class='add'>+	preview_params_unlock(prev, update, true);</div><div class='add'>+	preview_params_switch(prev);</div><div class='add'>+	spin_unlock_irqrestore(&amp;prev-&gt;params.lock, flags);</div><div class='add'>+</div><div class='ctx'> 	return rval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * preview_setup_hw - Setup preview registers and/or internal memory</div><div class='ctx'>  * @prev: pointer to preview private structure</div><div class='add'>+ * @update: Bitmask of parameters to setup</div><div class='add'>+ * @active: Bitmask of parameters active in set 0</div><div class='ctx'>  * Note: can be called from interrupt context</div><div class='ctx'>  * Return none</div><div class='ctx'>  */</div><div class='del'>-static void preview_setup_hw(struct isp_prev_device *prev)</div><div class='add'>+static void preview_setup_hw(struct isp_prev_device *prev, u32 update,</div><div class='add'>+			     u32 active)</div><div class='ctx'> {</div><div class='del'>-	struct prev_params *params = &amp;prev-&gt;params;</div><div class='del'>-	struct preview_update *attr;</div><div class='del'>-	int i, bit;</div><div class='del'>-	void *param_ptr;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u32 features;</div><div class='add'>+</div><div class='add'>+	if (update == 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	features = (prev-&gt;params.params[0].features &amp; active)</div><div class='add'>+		 | (prev-&gt;params.params[1].features &amp; ~active);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(update_attrs); i++) {</div><div class='del'>-		attr = &amp;update_attrs[i];</div><div class='add'>+		const struct preview_update *attr = &amp;update_attrs[i];</div><div class='add'>+		struct prev_params *params;</div><div class='add'>+		unsigned int bit = 1 &lt;&lt; i;</div><div class='add'>+		void *param_ptr;</div><div class='ctx'> </div><div class='del'>-		if (!(prev-&gt;update &amp; attr-&gt;feature_bit))</div><div class='add'>+		if (!(update &amp; bit))</div><div class='ctx'> 			continue;</div><div class='del'>-		bit = params-&gt;features &amp; attr-&gt;feature_bit;</div><div class='del'>-		if (bit) {</div><div class='add'>+</div><div class='add'>+		params = &amp;prev-&gt;params.params[!(active &amp; bit)];</div><div class='add'>+</div><div class='add'>+		if (params-&gt;features &amp; bit) {</div><div class='ctx'> 			if (attr-&gt;config) {</div><div class='del'>-				__preview_get_ptrs(params, &amp;param_ptr, NULL,</div><div class='del'>-						      NULL, bit);</div><div class='add'>+				param_ptr = (void *)params + attr-&gt;param_offset;</div><div class='ctx'> 				attr-&gt;config(prev, param_ptr);</div><div class='ctx'> 			}</div><div class='ctx'> 			if (attr-&gt;enable)</div><div class='ctx'> 				attr-&gt;enable(prev, 1);</div><div class='del'>-		} else</div><div class='add'>+		} else {</div><div class='ctx'> 			if (attr-&gt;enable)</div><div class='ctx'> 				attr-&gt;enable(prev, 0);</div><div class='del'>-</div><div class='del'>-		prev-&gt;update &amp;= ~attr-&gt;feature_bit;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1000,13 +1043,17 @@ preview_config_ycpos(struct isp_prev_device *prev,</div><div class='ctx'> static void preview_config_averager(struct isp_prev_device *prev, u8 average)</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_device *isp = to_isp_device(prev);</div><div class='add'>+	struct prev_params *params;</div><div class='ctx'> 	int reg = 0;</div><div class='ctx'> </div><div class='del'>-	if (prev-&gt;params.cfa.format == OMAP3ISP_CFAFMT_BAYER)</div><div class='add'>+	params = (prev-&gt;params.active &amp; OMAP3ISP_PREV_CFA)</div><div class='add'>+	       ? &amp;prev-&gt;params.params[0] : &amp;prev-&gt;params.params[1];</div><div class='add'>+</div><div class='add'>+	if (params-&gt;cfa.format == OMAP3ISP_CFAFMT_BAYER)</div><div class='ctx'> 		reg = ISPPRV_AVE_EVENDIST_2 &lt;&lt; ISPPRV_AVE_EVENDIST_SHIFT |</div><div class='ctx'> 		      ISPPRV_AVE_ODDDIST_2 &lt;&lt; ISPPRV_AVE_ODDDIST_SHIFT |</div><div class='ctx'> 		      average;</div><div class='del'>-	else if (prev-&gt;params.cfa.format == OMAP3ISP_CFAFMT_RGBFOVEON)</div><div class='add'>+	else if (params-&gt;cfa.format == OMAP3ISP_CFAFMT_RGBFOVEON)</div><div class='ctx'> 		reg = ISPPRV_AVE_EVENDIST_3 &lt;&lt; ISPPRV_AVE_EVENDIST_SHIFT |</div><div class='ctx'> 		      ISPPRV_AVE_ODDDIST_3 &lt;&lt; ISPPRV_AVE_ODDDIST_SHIFT |</div><div class='ctx'> 		      average;</div><div class='hunk'>@@ -1014,6 +1061,27 @@ static void preview_config_averager(struct isp_prev_device *prev, u8 average)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * preview_config_input_format - Configure the input format</div><div class='add'>+ * @prev: The preview engine</div><div class='add'>+ * @format: Format on the preview engine sink pad</div><div class='add'>+ *</div><div class='add'>+ * Enable CFA interpolation for Bayer formats and disable it for greyscale</div><div class='add'>+ * formats.</div><div class='add'>+ */</div><div class='add'>+static void preview_config_input_format(struct isp_prev_device *prev,</div><div class='add'>+					const struct v4l2_mbus_framefmt *format)</div><div class='add'>+{</div><div class='add'>+	struct isp_device *isp = to_isp_device(prev);</div><div class='add'>+</div><div class='add'>+	if (format-&gt;code != V4L2_MBUS_FMT_Y10_1X10)</div><div class='add'>+		isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,</div><div class='add'>+			    ISPPRV_PCR_CFAEN);</div><div class='add'>+	else</div><div class='add'>+		isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,</div><div class='add'>+			    ISPPRV_PCR_CFAEN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * preview_config_input_size - Configure the input frame size</div><div class='ctx'>  *</div><div class='ctx'>  * The preview engine crops several rows and columns internally depending on</div><div class='hunk'>@@ -1024,32 +1092,37 @@ static void preview_config_averager(struct isp_prev_device *prev, u8 average)</div><div class='ctx'>  *</div><div class='ctx'>  * See the explanation at the PREV_MARGIN_* definitions for more details.</div><div class='ctx'>  */</div><div class='del'>-static void preview_config_input_size(struct isp_prev_device *prev)</div><div class='add'>+static void preview_config_input_size(struct isp_prev_device *prev, u32 active)</div><div class='ctx'> {</div><div class='add'>+	const struct v4l2_mbus_framefmt *format = &amp;prev-&gt;formats[PREV_PAD_SINK];</div><div class='ctx'> 	struct isp_device *isp = to_isp_device(prev);</div><div class='del'>-	struct prev_params *params = &amp;prev-&gt;params;</div><div class='ctx'> 	unsigned int sph = prev-&gt;crop.left;</div><div class='ctx'> 	unsigned int eph = prev-&gt;crop.left + prev-&gt;crop.width - 1;</div><div class='ctx'> 	unsigned int slv = prev-&gt;crop.top;</div><div class='ctx'> 	unsigned int elv = prev-&gt;crop.top + prev-&gt;crop.height - 1;</div><div class='add'>+	u32 features;</div><div class='ctx'> </div><div class='del'>-	if (params-&gt;features &amp; PREV_CFA) {</div><div class='add'>+	if (format-&gt;code == V4L2_MBUS_FMT_Y10_1X10) {</div><div class='ctx'> 		sph -= 2;</div><div class='ctx'> 		eph += 2;</div><div class='ctx'> 		slv -= 2;</div><div class='ctx'> 		elv += 2;</div><div class='ctx'> 	}</div><div class='del'>-	if (params-&gt;features &amp; (PREV_DEFECT_COR | PREV_NOISE_FILTER)) {</div><div class='add'>+</div><div class='add'>+	features = (prev-&gt;params.params[0].features &amp; active)</div><div class='add'>+		 | (prev-&gt;params.params[1].features &amp; ~active);</div><div class='add'>+</div><div class='add'>+	if (features &amp; (OMAP3ISP_PREV_DEFECT_COR | OMAP3ISP_PREV_NF)) {</div><div class='ctx'> 		sph -= 2;</div><div class='ctx'> 		eph += 2;</div><div class='ctx'> 		slv -= 2;</div><div class='ctx'> 		elv += 2;</div><div class='ctx'> 	}</div><div class='del'>-	if (params-&gt;features &amp; PREV_HORZ_MEDIAN_FILTER) {</div><div class='add'>+	if (features &amp; OMAP3ISP_PREV_HRZ_MED) {</div><div class='ctx'> 		sph -= 2;</div><div class='ctx'> 		eph += 2;</div><div class='ctx'> 	}</div><div class='del'>-	if (params-&gt;features &amp; (PREV_CHROMA_SUPPRESS | PREV_LUMA_ENHANCE))</div><div class='add'>+	if (features &amp; (OMAP3ISP_PREV_CHROMA_SUPP | OMAP3ISP_PREV_LUMAENH))</div><div class='ctx'> 		sph -= 2;</div><div class='ctx'> </div><div class='ctx'> 	isp_reg_writel(isp, (sph &lt;&lt; ISPPRV_HORZ_INFO_SPH_SHIFT) | eph,</div><div class='hunk'>@@ -1184,8 +1257,16 @@ int omap3isp_preview_busy(struct isp_prev_device *prev)</div><div class='ctx'>  */</div><div class='ctx'> void omap3isp_preview_restore_context(struct isp_device *isp)</div><div class='ctx'> {</div><div class='del'>-	isp-&gt;isp_prev.update = PREV_FEATURES_END - 1;</div><div class='del'>-	preview_setup_hw(&amp;isp-&gt;isp_prev);</div><div class='add'>+	struct isp_prev_device *prev = &amp;isp-&gt;isp_prev;</div><div class='add'>+	const u32 update = OMAP3ISP_PREV_FEATURES_END - 1;</div><div class='add'>+</div><div class='add'>+	prev-&gt;params.params[0].update = prev-&gt;params.active &amp; update;</div><div class='add'>+	prev-&gt;params.params[1].update = ~prev-&gt;params.active &amp; update;</div><div class='add'>+</div><div class='add'>+	preview_setup_hw(prev, update, prev-&gt;params.active);</div><div class='add'>+</div><div class='add'>+	prev-&gt;params.params[0].update = 0;</div><div class='add'>+	prev-&gt;params.params[1].update = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1244,12 +1325,21 @@ static void preview_print_status(struct isp_prev_device *prev)</div><div class='ctx'> /*</div><div class='ctx'>  * preview_init_params - init image processing parameters.</div><div class='ctx'>  * @prev: pointer to previewer private structure</div><div class='del'>- * return none</div><div class='ctx'>  */</div><div class='ctx'> static void preview_init_params(struct isp_prev_device *prev)</div><div class='ctx'> {</div><div class='del'>-	struct prev_params *params = &amp;prev-&gt;params;</div><div class='del'>-	int i = 0;</div><div class='add'>+	struct prev_params *params;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;prev-&gt;params.lock);</div><div class='add'>+</div><div class='add'>+	prev-&gt;params.active = ~0;</div><div class='add'>+	prev-&gt;params.params[0].busy = 0;</div><div class='add'>+	prev-&gt;params.params[0].update = OMAP3ISP_PREV_FEATURES_END - 1;</div><div class='add'>+	prev-&gt;params.params[1].busy = 0;</div><div class='add'>+	prev-&gt;params.params[1].update = 0;</div><div class='add'>+</div><div class='add'>+	params = &amp;prev-&gt;params.params[0];</div><div class='ctx'> </div><div class='ctx'> 	/* Init values */</div><div class='ctx'> 	params-&gt;contrast = ISPPRV_CONTRAST_DEF * ISPPRV_CONTRAST_UNITS;</div><div class='hunk'>@@ -1277,22 +1367,22 @@ static void preview_init_params(struct isp_prev_device *prev)</div><div class='ctx'> 	params-&gt;wbal.coef1 = FLR_WBAL_COEF;</div><div class='ctx'> 	params-&gt;wbal.coef2 = FLR_WBAL_COEF;</div><div class='ctx'> 	params-&gt;wbal.coef3 = FLR_WBAL_COEF;</div><div class='del'>-	params-&gt;blk_adj.red = FLR_BLKADJ_RED;</div><div class='del'>-	params-&gt;blk_adj.green = FLR_BLKADJ_GREEN;</div><div class='del'>-	params-&gt;blk_adj.blue = FLR_BLKADJ_BLUE;</div><div class='add'>+	params-&gt;blkadj.red = FLR_BLKADJ_RED;</div><div class='add'>+	params-&gt;blkadj.green = FLR_BLKADJ_GREEN;</div><div class='add'>+	params-&gt;blkadj.blue = FLR_BLKADJ_BLUE;</div><div class='ctx'> 	params-&gt;rgb2rgb = flr_rgb2rgb;</div><div class='del'>-	params-&gt;rgb2ycbcr = flr_prev_csc;</div><div class='add'>+	params-&gt;csc = flr_prev_csc;</div><div class='ctx'> 	params-&gt;yclimit.minC = ISPPRV_YC_MIN;</div><div class='ctx'> 	params-&gt;yclimit.maxC = ISPPRV_YC_MAX;</div><div class='ctx'> 	params-&gt;yclimit.minY = ISPPRV_YC_MIN;</div><div class='ctx'> 	params-&gt;yclimit.maxY = ISPPRV_YC_MAX;</div><div class='ctx'> </div><div class='del'>-	params-&gt;features = PREV_CFA | PREV_DEFECT_COR | PREV_NOISE_FILTER</div><div class='del'>-			 | PREV_GAMMA | PREV_BLKADJ | PREV_YCLIMITS</div><div class='del'>-			 | PREV_RGB2RGB | PREV_COLOR_CONV | PREV_WB</div><div class='del'>-			 | PREV_BRIGHTNESS | PREV_CONTRAST;</div><div class='del'>-</div><div class='del'>-	prev-&gt;update = PREV_FEATURES_END - 1;</div><div class='add'>+	params-&gt;features = OMAP3ISP_PREV_CFA | OMAP3ISP_PREV_DEFECT_COR</div><div class='add'>+			 | OMAP3ISP_PREV_NF | OMAP3ISP_PREV_GAMMA</div><div class='add'>+			 | OMAP3ISP_PREV_BLKADJ | OMAP3ISP_PREV_YC_LIMIT</div><div class='add'>+			 | OMAP3ISP_PREV_RGB2RGB | OMAP3ISP_PREV_COLOR_CONV</div><div class='add'>+			 | OMAP3ISP_PREV_WB | OMAP3ISP_PREV_BRIGHTNESS</div><div class='add'>+			 | OMAP3ISP_PREV_CONTRAST;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1321,8 +1411,17 @@ static void preview_configure(struct isp_prev_device *prev)</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_device *isp = to_isp_device(prev);</div><div class='ctx'> 	struct v4l2_mbus_framefmt *format;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 update;</div><div class='add'>+	u32 active;</div><div class='ctx'> </div><div class='del'>-	preview_setup_hw(prev);</div><div class='add'>+	spin_lock_irqsave(&amp;prev-&gt;params.lock, flags);</div><div class='add'>+	/* Mark all active parameters we are going to touch as busy. */</div><div class='add'>+	update = preview_params_lock(prev, 0, false);</div><div class='add'>+	active = prev-&gt;params.active;</div><div class='add'>+	spin_unlock_irqrestore(&amp;prev-&gt;params.lock, flags);</div><div class='add'>+</div><div class='add'>+	preview_setup_hw(prev, update, active);</div><div class='ctx'> </div><div class='ctx'> 	if (prev-&gt;output &amp; PREVIEW_OUTPUT_MEMORY)</div><div class='ctx'> 		isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,</div><div class='hunk'>@@ -1343,7 +1442,8 @@ static void preview_configure(struct isp_prev_device *prev)</div><div class='ctx'> </div><div class='ctx'> 	preview_adjust_bandwidth(prev);</div><div class='ctx'> </div><div class='del'>-	preview_config_input_size(prev);</div><div class='add'>+	preview_config_input_format(prev, format);</div><div class='add'>+	preview_config_input_size(prev, active);</div><div class='ctx'> </div><div class='ctx'> 	if (prev-&gt;input == PREVIEW_INPUT_CCDC)</div><div class='ctx'> 		preview_config_inlineoffset(prev, 0);</div><div class='hunk'>@@ -1360,6 +1460,10 @@ static void preview_configure(struct isp_prev_device *prev)</div><div class='ctx'> </div><div class='ctx'> 	preview_config_averager(prev, 0);</div><div class='ctx'> 	preview_config_ycpos(prev, format-&gt;code);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;prev-&gt;params.lock, flags);</div><div class='add'>+	preview_params_unlock(prev, update, false);</div><div class='add'>+	spin_unlock_irqrestore(&amp;prev-&gt;params.lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* -----------------------------------------------------------------------------</div><div class='hunk'>@@ -1448,25 +1552,30 @@ static void preview_isr_buffer(struct isp_prev_device *prev)</div><div class='ctx'> void omap3isp_preview_isr(struct isp_prev_device *prev)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	u32 update;</div><div class='add'>+	u32 active;</div><div class='ctx'> </div><div class='ctx'> 	if (omap3isp_module_sync_is_stopping(&amp;prev-&gt;wait, &amp;prev-&gt;stopping))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;prev-&gt;lock, flags);</div><div class='del'>-	if (prev-&gt;shadow_update)</div><div class='del'>-		goto done;</div><div class='add'>+	spin_lock_irqsave(&amp;prev-&gt;params.lock, flags);</div><div class='add'>+	preview_params_switch(prev);</div><div class='add'>+	update = preview_params_lock(prev, 0, false);</div><div class='add'>+	active = prev-&gt;params.active;</div><div class='add'>+	spin_unlock_irqrestore(&amp;prev-&gt;params.lock, flags);</div><div class='ctx'> </div><div class='del'>-	preview_setup_hw(prev);</div><div class='del'>-	preview_config_input_size(prev);</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	spin_unlock_irqrestore(&amp;prev-&gt;lock, flags);</div><div class='add'>+	preview_setup_hw(prev, update, active);</div><div class='add'>+	preview_config_input_size(prev, active);</div><div class='ctx'> </div><div class='ctx'> 	if (prev-&gt;input == PREVIEW_INPUT_MEMORY ||</div><div class='ctx'> 	    prev-&gt;output &amp; PREVIEW_OUTPUT_MEMORY)</div><div class='ctx'> 		preview_isr_buffer(prev);</div><div class='ctx'> 	else if (prev-&gt;state == ISP_PIPELINE_STREAM_CONTINUOUS)</div><div class='ctx'> 		preview_enable_oneshot(prev);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;prev-&gt;params.lock, flags);</div><div class='add'>+	preview_params_unlock(prev, update, false);</div><div class='add'>+	spin_unlock_irqrestore(&amp;prev-&gt;params.lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* -----------------------------------------------------------------------------</div><div class='hunk'>@@ -1552,7 +1661,6 @@ static int preview_set_stream(struct v4l2_subdev *sd, int enable)</div><div class='ctx'> 	struct isp_video *video_out = &amp;prev-&gt;video_out;</div><div class='ctx'> 	struct isp_device *isp = to_isp_device(prev);</div><div class='ctx'> 	struct device *dev = to_device(prev);</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (prev-&gt;state == ISP_PIPELINE_STREAM_STOPPED) {</div><div class='ctx'> 		if (enable == ISP_PIPELINE_STREAM_STOPPED)</div><div class='hunk'>@@ -1589,11 +1697,9 @@ static int preview_set_stream(struct v4l2_subdev *sd, int enable)</div><div class='ctx'> 		if (omap3isp_module_sync_idle(&amp;sd-&gt;entity, &amp;prev-&gt;wait,</div><div class='ctx'> 					      &amp;prev-&gt;stopping))</div><div class='ctx'> 			dev_dbg(dev, "%s: stop timeout.\n", sd-&gt;name);</div><div class='del'>-		spin_lock_irqsave(&amp;prev-&gt;lock, flags);</div><div class='ctx'> 		omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_PREVIEW_READ);</div><div class='ctx'> 		omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);</div><div class='ctx'> 		omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_PREVIEW);</div><div class='del'>-		spin_unlock_irqrestore(&amp;prev-&gt;lock, flags);</div><div class='ctx'> 		isp_video_dmaqueue_flags_clr(video_out);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1624,6 +1730,7 @@ __preview_get_crop(struct isp_prev_device *prev, struct v4l2_subdev_fh *fh,</div><div class='ctx'> </div><div class='ctx'> /* previewer format descriptions */</div><div class='ctx'> static const unsigned int preview_input_fmts[] = {</div><div class='add'>+	V4L2_MBUS_FMT_Y10_1X10,</div><div class='ctx'> 	V4L2_MBUS_FMT_SGRBG10_1X10,</div><div class='ctx'> 	V4L2_MBUS_FMT_SRGGB10_1X10,</div><div class='ctx'> 	V4L2_MBUS_FMT_SBGGR10_1X10,</div><div class='hunk'>@@ -1822,55 +1929,89 @@ static int preview_enum_frame_size(struct v4l2_subdev *sd,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * preview_get_crop - Retrieve the crop rectangle on a pad</div><div class='add'>+ * preview_get_selection - Retrieve a selection rectangle on a pad</div><div class='ctx'>  * @sd: ISP preview V4L2 subdevice</div><div class='ctx'>  * @fh: V4L2 subdev file handle</div><div class='del'>- * @crop: crop rectangle</div><div class='add'>+ * @sel: Selection rectangle</div><div class='add'>+ *</div><div class='add'>+ * The only supported rectangles are the crop rectangles on the sink pad.</div><div class='ctx'>  *</div><div class='ctx'>  * Return 0 on success or a negative error code otherwise.</div><div class='ctx'>  */</div><div class='del'>-static int preview_get_crop(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,</div><div class='del'>-			    struct v4l2_subdev_crop *crop)</div><div class='add'>+static int preview_get_selection(struct v4l2_subdev *sd,</div><div class='add'>+				 struct v4l2_subdev_fh *fh,</div><div class='add'>+				 struct v4l2_subdev_selection *sel)</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_prev_device *prev = v4l2_get_subdevdata(sd);</div><div class='add'>+	struct v4l2_mbus_framefmt *format;</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;pad != PREV_PAD_SINK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (sel-&gt;target) {</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS:</div><div class='add'>+		sel-&gt;r.left = 0;</div><div class='add'>+		sel-&gt;r.top = 0;</div><div class='add'>+		sel-&gt;r.width = INT_MAX;</div><div class='add'>+		sel-&gt;r.height = INT_MAX;</div><div class='add'>+</div><div class='add'>+		format = __preview_get_format(prev, fh, PREV_PAD_SINK,</div><div class='add'>+					      sel-&gt;which);</div><div class='add'>+		preview_try_crop(prev, format, &amp;sel-&gt;r);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL:</div><div class='add'>+		sel-&gt;r = *__preview_get_crop(prev, fh, sel-&gt;which);</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-	/* Cropping is only supported on the sink pad. */</div><div class='del'>-	if (crop-&gt;pad != PREV_PAD_SINK)</div><div class='add'>+	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	crop-&gt;rect = *__preview_get_crop(prev, fh, crop-&gt;which);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * preview_set_crop - Retrieve the crop rectangle on a pad</div><div class='add'>+ * preview_set_selection - Set a selection rectangle on a pad</div><div class='ctx'>  * @sd: ISP preview V4L2 subdevice</div><div class='ctx'>  * @fh: V4L2 subdev file handle</div><div class='del'>- * @crop: crop rectangle</div><div class='add'>+ * @sel: Selection rectangle</div><div class='add'>+ *</div><div class='add'>+ * The only supported rectangle is the actual crop rectangle on the sink pad.</div><div class='ctx'>  *</div><div class='ctx'>  * Return 0 on success or a negative error code otherwise.</div><div class='ctx'>  */</div><div class='del'>-static int preview_set_crop(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,</div><div class='del'>-			    struct v4l2_subdev_crop *crop)</div><div class='add'>+static int preview_set_selection(struct v4l2_subdev *sd,</div><div class='add'>+				 struct v4l2_subdev_fh *fh,</div><div class='add'>+				 struct v4l2_subdev_selection *sel)</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_prev_device *prev = v4l2_get_subdevdata(sd);</div><div class='ctx'> 	struct v4l2_mbus_framefmt *format;</div><div class='ctx'> </div><div class='del'>-	/* Cropping is only supported on the sink pad. */</div><div class='del'>-	if (crop-&gt;pad != PREV_PAD_SINK)</div><div class='add'>+	if (sel-&gt;target != V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL ||</div><div class='add'>+	    sel-&gt;pad != PREV_PAD_SINK)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* The crop rectangle can't be changed while streaming. */</div><div class='ctx'> 	if (prev-&gt;state != ISP_PIPELINE_STREAM_STOPPED)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	format = __preview_get_format(prev, fh, PREV_PAD_SINK, crop-&gt;which);</div><div class='del'>-	preview_try_crop(prev, format, &amp;crop-&gt;rect);</div><div class='del'>-	*__preview_get_crop(prev, fh, crop-&gt;which) = crop-&gt;rect;</div><div class='add'>+	/* Modifying the crop rectangle always changes the format on the source</div><div class='add'>+	 * pad. If the KEEP_CONFIG flag is set, just return the current crop</div><div class='add'>+	 * rectangle.</div><div class='add'>+	 */</div><div class='add'>+	if (sel-&gt;flags &amp; V4L2_SUBDEV_SEL_FLAG_KEEP_CONFIG) {</div><div class='add'>+		sel-&gt;r = *__preview_get_crop(prev, fh, sel-&gt;which);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	format = __preview_get_format(prev, fh, PREV_PAD_SINK, sel-&gt;which);</div><div class='add'>+	preview_try_crop(prev, format, &amp;sel-&gt;r);</div><div class='add'>+	*__preview_get_crop(prev, fh, sel-&gt;which) = sel-&gt;r;</div><div class='ctx'> </div><div class='ctx'> 	/* Update the source format. */</div><div class='del'>-	format = __preview_get_format(prev, fh, PREV_PAD_SOURCE, crop-&gt;which);</div><div class='del'>-	preview_try_format(prev, fh, PREV_PAD_SOURCE, format, crop-&gt;which);</div><div class='add'>+	format = __preview_get_format(prev, fh, PREV_PAD_SOURCE, sel-&gt;which);</div><div class='add'>+	preview_try_format(prev, fh, PREV_PAD_SOURCE, format, sel-&gt;which);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1979,8 +2120,8 @@ static const struct v4l2_subdev_pad_ops preview_v4l2_pad_ops = {</div><div class='ctx'> 	.enum_frame_size = preview_enum_frame_size,</div><div class='ctx'> 	.get_fmt = preview_get_format,</div><div class='ctx'> 	.set_fmt = preview_set_format,</div><div class='del'>-	.get_crop = preview_get_crop,</div><div class='del'>-	.set_crop = preview_set_crop,</div><div class='add'>+	.get_selection = preview_get_selection,</div><div class='add'>+	.set_selection = preview_set_selection,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* subdev operations */</div><div class='hunk'>@@ -2076,6 +2217,7 @@ static int preview_link_setup(struct media_entity *entity,</div><div class='ctx'> /* media operations */</div><div class='ctx'> static const struct media_entity_operations preview_media_ops = {</div><div class='ctx'> 	.link_setup = preview_link_setup,</div><div class='add'>+	.link_validate = v4l2_subdev_link_validate,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void omap3isp_preview_unregister_entities(struct isp_prev_device *prev)</div><div class='hunk'>@@ -2201,7 +2343,7 @@ error_video_in:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * isp_preview_init - Previewer initialization.</div><div class='add'>+ * omap3isp_preview_init - Previewer initialization.</div><div class='ctx'>  * @dev : Pointer to ISP device</div><div class='ctx'>  * return -ENOMEM or zero on success</div><div class='ctx'>  */</div><div class='hunk'>@@ -2209,8 +2351,8 @@ int omap3isp_preview_init(struct isp_device *isp)</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_prev_device *prev = &amp;isp-&gt;isp_prev;</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;prev-&gt;lock);</div><div class='ctx'> 	init_waitqueue_head(&amp;prev-&gt;wait);</div><div class='add'>+</div><div class='ctx'> 	preview_init_params(prev);</div><div class='ctx'> </div><div class='ctx'> 	return preview_init_entities(prev);</div><div class='head'>diff --git a/drivers/media/video/omap3isp/isppreview.h b/drivers/media/video/omap3isp/isppreview.h<br/>index 09686607973c..6663ab64e4b1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/isppreview.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/isppreview.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/isppreview.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/isppreview.h</a></div><div class='hunk'>@@ -45,29 +45,10 @@</div><div class='ctx'> #define ISPPRV_CONTRAST_HIGH		0xFF</div><div class='ctx'> #define ISPPRV_CONTRAST_UNITS		0x1</div><div class='ctx'> </div><div class='del'>-/* Features list */</div><div class='del'>-#define PREV_LUMA_ENHANCE		OMAP3ISP_PREV_LUMAENH</div><div class='del'>-#define PREV_INVERSE_ALAW		OMAP3ISP_PREV_INVALAW</div><div class='del'>-#define PREV_HORZ_MEDIAN_FILTER		OMAP3ISP_PREV_HRZ_MED</div><div class='del'>-#define PREV_CFA			OMAP3ISP_PREV_CFA</div><div class='del'>-#define PREV_CHROMA_SUPPRESS		OMAP3ISP_PREV_CHROMA_SUPP</div><div class='del'>-#define PREV_WB				OMAP3ISP_PREV_WB</div><div class='del'>-#define PREV_BLKADJ			OMAP3ISP_PREV_BLKADJ</div><div class='del'>-#define PREV_RGB2RGB			OMAP3ISP_PREV_RGB2RGB</div><div class='del'>-#define PREV_COLOR_CONV			OMAP3ISP_PREV_COLOR_CONV</div><div class='del'>-#define PREV_YCLIMITS			OMAP3ISP_PREV_YC_LIMIT</div><div class='del'>-#define PREV_DEFECT_COR			OMAP3ISP_PREV_DEFECT_COR</div><div class='del'>-#define PREV_GAMMA_BYPASS		OMAP3ISP_PREV_GAMMABYPASS</div><div class='del'>-#define PREV_DARK_FRAME_CAPTURE		OMAP3ISP_PREV_DRK_FRM_CAPTURE</div><div class='del'>-#define PREV_DARK_FRAME_SUBTRACT	OMAP3ISP_PREV_DRK_FRM_SUBTRACT</div><div class='del'>-#define PREV_LENS_SHADING		OMAP3ISP_PREV_LENS_SHADING</div><div class='del'>-#define PREV_NOISE_FILTER		OMAP3ISP_PREV_NF</div><div class='del'>-#define PREV_GAMMA			OMAP3ISP_PREV_GAMMA</div><div class='del'>-</div><div class='del'>-#define PREV_CONTRAST			(1 &lt;&lt; 17)</div><div class='del'>-#define PREV_BRIGHTNESS			(1 &lt;&lt; 18)</div><div class='del'>-#define PREV_AVERAGER			(1 &lt;&lt; 19)</div><div class='del'>-#define PREV_FEATURES_END		(1 &lt;&lt; 20)</div><div class='add'>+/* Additional features not listed in linux/omap3isp.h */</div><div class='add'>+#define OMAP3ISP_PREV_CONTRAST		(1 &lt;&lt; 17)</div><div class='add'>+#define OMAP3ISP_PREV_BRIGHTNESS	(1 &lt;&lt; 18)</div><div class='add'>+#define OMAP3ISP_PREV_FEATURES_END	(1 &lt;&lt; 19)</div><div class='ctx'> </div><div class='ctx'> enum preview_input_entity {</div><div class='ctx'> 	PREVIEW_INPUT_NONE,</div><div class='hunk'>@@ -88,6 +69,8 @@ enum preview_ycpos_mode {</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * struct prev_params - Structure for all configuration</div><div class='add'>+ * @busy: Bitmask of busy parameters (being updated or used)</div><div class='add'>+ * @update: Bitmask of the parameters to be updated</div><div class='ctx'>  * @features: Set of features enabled.</div><div class='ctx'>  * @cfa: CFA coefficients.</div><div class='ctx'>  * @csup: Chroma suppression coefficients.</div><div class='hunk'>@@ -96,15 +79,17 @@ enum preview_ycpos_mode {</div><div class='ctx'>  * @dcor: Noise filter coefficients.</div><div class='ctx'>  * @gamma: Gamma coefficients.</div><div class='ctx'>  * @wbal: White Balance parameters.</div><div class='del'>- * @blk_adj: Black adjustment parameters.</div><div class='add'>+ * @blkadj: Black adjustment parameters.</div><div class='ctx'>  * @rgb2rgb: RGB blending parameters.</div><div class='del'>- * @rgb2ycbcr: RGB to ycbcr parameters.</div><div class='add'>+ * @csc: Color space conversion (RGB to YCbCr) parameters.</div><div class='ctx'>  * @hmed: Horizontal median filter.</div><div class='ctx'>  * @yclimit: YC limits parameters.</div><div class='ctx'>  * @contrast: Contrast.</div><div class='ctx'>  * @brightness: Brightness.</div><div class='ctx'>  */</div><div class='ctx'> struct prev_params {</div><div class='add'>+	u32 busy;</div><div class='add'>+	u32 update;</div><div class='ctx'> 	u32 features;</div><div class='ctx'> 	struct omap3isp_prev_cfa cfa;</div><div class='ctx'> 	struct omap3isp_prev_csup csup;</div><div class='hunk'>@@ -113,35 +98,15 @@ struct prev_params {</div><div class='ctx'> 	struct omap3isp_prev_dcor dcor;</div><div class='ctx'> 	struct omap3isp_prev_gtables gamma;</div><div class='ctx'> 	struct omap3isp_prev_wbal wbal;</div><div class='del'>-	struct omap3isp_prev_blkadj blk_adj;</div><div class='add'>+	struct omap3isp_prev_blkadj blkadj;</div><div class='ctx'> 	struct omap3isp_prev_rgbtorgb rgb2rgb;</div><div class='del'>-	struct omap3isp_prev_csc rgb2ycbcr;</div><div class='add'>+	struct omap3isp_prev_csc csc;</div><div class='ctx'> 	struct omap3isp_prev_hmed hmed;</div><div class='ctx'> 	struct omap3isp_prev_yclimit yclimit;</div><div class='ctx'> 	u8 contrast;</div><div class='ctx'> 	u8 brightness;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * struct isptables_update - Structure for Table Configuration.</div><div class='del'>- * @update: Specifies which tables should be updated.</div><div class='del'>- * @flag: Specifies which tables should be enabled.</div><div class='del'>- * @nf: Pointer to structure for Noise Filter</div><div class='del'>- * @lsc: Pointer to LSC gain table. (currently not used)</div><div class='del'>- * @gamma: Pointer to gamma correction tables.</div><div class='del'>- * @cfa: Pointer to color filter array configuration.</div><div class='del'>- * @wbal: Pointer to colour and digital gain configuration.</div><div class='del'>- */</div><div class='del'>-struct isptables_update {</div><div class='del'>-	u32 update;</div><div class='del'>-	u32 flag;</div><div class='del'>-	struct omap3isp_prev_nf *nf;</div><div class='del'>-	u32 *lsc;</div><div class='del'>-	struct omap3isp_prev_gtables *gamma;</div><div class='del'>-	struct omap3isp_prev_cfa *cfa;</div><div class='del'>-	struct omap3isp_prev_wbal *wbal;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Sink and source previewer pads */</div><div class='ctx'> #define PREV_PAD_SINK			0</div><div class='ctx'> #define PREV_PAD_SOURCE			1</div><div class='hunk'>@@ -157,12 +122,11 @@ struct isptables_update {</div><div class='ctx'>  * @output: Bitmask of the active output</div><div class='ctx'>  * @video_in: Input video entity</div><div class='ctx'>  * @video_out: Output video entity</div><div class='del'>- * @params: Module configuration data</div><div class='del'>- * @shadow_update: If set, update the hardware configured in the next interrupt</div><div class='add'>+ * @params.params : Active and shadow parameters sets</div><div class='add'>+ * @params.active: Bitmask of parameters active in set 0</div><div class='add'>+ * @params.lock: Parameters lock, protects params.active and params.shadow</div><div class='ctx'>  * @underrun: Whether the preview entity has queued buffers on the output</div><div class='ctx'>  * @state: Current preview pipeline state</div><div class='del'>- * @lock: Shadow update lock</div><div class='del'>- * @update: Bitmask of the parameters to be updated</div><div class='ctx'>  *</div><div class='ctx'>  * This structure is used to store the OMAP ISP Preview module Information.</div><div class='ctx'>  */</div><div class='hunk'>@@ -179,13 +143,15 @@ struct isp_prev_device {</div><div class='ctx'> 	struct isp_video video_in;</div><div class='ctx'> 	struct isp_video video_out;</div><div class='ctx'> </div><div class='del'>-	struct prev_params params;</div><div class='del'>-	unsigned int shadow_update:1;</div><div class='add'>+	struct {</div><div class='add'>+		struct prev_params params[2];</div><div class='add'>+		u32 active;</div><div class='add'>+		spinlock_t lock;</div><div class='add'>+	} params;</div><div class='add'>+</div><div class='ctx'> 	enum isp_pipeline_stream_state state;</div><div class='ctx'> 	wait_queue_head_t wait;</div><div class='ctx'> 	atomic_t stopping;</div><div class='del'>-	spinlock_t lock;</div><div class='del'>-	u32 update;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct isp_device;</div><div class='head'>diff --git a/drivers/media/video/omap3isp/ispqueue.h b/drivers/media/video/omap3isp/ispqueue.h<br/>index 92c5a12157d5..908dfd712e8e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispqueue.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/ispqueue.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispqueue.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispqueue.h</a></div><div class='hunk'>@@ -90,7 +90,7 @@ struct isp_video_buffer {</div><div class='ctx'> 	void *vaddr;</div><div class='ctx'> </div><div class='ctx'> 	/* For userspace buffers. */</div><div class='del'>-	unsigned long vm_flags;</div><div class='add'>+	vm_flags_t vm_flags;</div><div class='ctx'> 	unsigned long offset;</div><div class='ctx'> 	unsigned int npages;</div><div class='ctx'> 	struct page **pages;</div><div class='head'>diff --git a/drivers/media/video/omap3isp/ispresizer.c b/drivers/media/video/omap3isp/ispresizer.c<br/>index 6958a9e3dc22..14041c9c8643 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispresizer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/ispresizer.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispresizer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispresizer.c</a></div><div class='hunk'>@@ -1188,32 +1188,6 @@ static int resizer_set_stream(struct v4l2_subdev *sd, int enable)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * resizer_g_crop - handle get crop subdev operation</div><div class='del'>- * @sd : pointer to v4l2 subdev structure</div><div class='del'>- * @pad : subdev pad</div><div class='del'>- * @crop : pointer to crop structure</div><div class='del'>- * @which : active or try format</div><div class='del'>- * return zero</div><div class='del'>- */</div><div class='del'>-static int resizer_g_crop(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,</div><div class='del'>-			  struct v4l2_subdev_crop *crop)</div><div class='del'>-{</div><div class='del'>-	struct isp_res_device *res = v4l2_get_subdevdata(sd);</div><div class='del'>-	struct v4l2_mbus_framefmt *format;</div><div class='del'>-	struct resizer_ratio ratio;</div><div class='del'>-</div><div class='del'>-	/* Only sink pad has crop capability */</div><div class='del'>-	if (crop-&gt;pad != RESZ_PAD_SINK)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	format = __resizer_get_format(res, fh, RESZ_PAD_SOURCE, crop-&gt;which);</div><div class='del'>-	crop-&gt;rect = *__resizer_get_crop(res, fh, crop-&gt;which);</div><div class='del'>-	resizer_calc_ratios(res, &amp;crop-&gt;rect, format, &amp;ratio);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * resizer_try_crop - mangles crop parameters.</div><div class='ctx'>  */</div><div class='ctx'> static void resizer_try_crop(const struct v4l2_mbus_framefmt *sink,</div><div class='hunk'>@@ -1223,7 +1197,7 @@ static void resizer_try_crop(const struct v4l2_mbus_framefmt *sink,</div><div class='ctx'> 	const unsigned int spv = DEFAULT_PHASE;</div><div class='ctx'> 	const unsigned int sph = DEFAULT_PHASE;</div><div class='ctx'> </div><div class='del'>-	/* Crop rectangle is constrained to the output size so that zoom ratio</div><div class='add'>+	/* Crop rectangle is constrained by the output size so that zoom ratio</div><div class='ctx'> 	 * cannot exceed +/-4.0.</div><div class='ctx'> 	 */</div><div class='ctx'> 	unsigned int min_width =</div><div class='hunk'>@@ -1248,51 +1222,115 @@ static void resizer_try_crop(const struct v4l2_mbus_framefmt *sink,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * resizer_s_crop - handle set crop subdev operation</div><div class='del'>- * @sd : pointer to v4l2 subdev structure</div><div class='del'>- * @pad : subdev pad</div><div class='del'>- * @crop : pointer to crop structure</div><div class='del'>- * @which : active or try format</div><div class='del'>- * return -EINVAL or zero when succeed</div><div class='add'>+ * resizer_get_selection - Retrieve a selection rectangle on a pad</div><div class='add'>+ * @sd: ISP resizer V4L2 subdevice</div><div class='add'>+ * @fh: V4L2 subdev file handle</div><div class='add'>+ * @sel: Selection rectangle</div><div class='add'>+ *</div><div class='add'>+ * The only supported rectangles are the crop rectangles on the sink pad.</div><div class='add'>+ *</div><div class='add'>+ * Return 0 on success or a negative error code otherwise.</div><div class='ctx'>  */</div><div class='del'>-static int resizer_s_crop(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,</div><div class='del'>-			  struct v4l2_subdev_crop *crop)</div><div class='add'>+static int resizer_get_selection(struct v4l2_subdev *sd,</div><div class='add'>+				 struct v4l2_subdev_fh *fh,</div><div class='add'>+				 struct v4l2_subdev_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct isp_res_device *res = v4l2_get_subdevdata(sd);</div><div class='add'>+	struct v4l2_mbus_framefmt *format_source;</div><div class='add'>+	struct v4l2_mbus_framefmt *format_sink;</div><div class='add'>+	struct resizer_ratio ratio;</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;pad != RESZ_PAD_SINK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	format_sink = __resizer_get_format(res, fh, RESZ_PAD_SINK,</div><div class='add'>+					   sel-&gt;which);</div><div class='add'>+	format_source = __resizer_get_format(res, fh, RESZ_PAD_SOURCE,</div><div class='add'>+					     sel-&gt;which);</div><div class='add'>+</div><div class='add'>+	switch (sel-&gt;target) {</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS:</div><div class='add'>+		sel-&gt;r.left = 0;</div><div class='add'>+		sel-&gt;r.top = 0;</div><div class='add'>+		sel-&gt;r.width = INT_MAX;</div><div class='add'>+		sel-&gt;r.height = INT_MAX;</div><div class='add'>+</div><div class='add'>+		resizer_try_crop(format_sink, format_source, &amp;sel-&gt;r);</div><div class='add'>+		resizer_calc_ratios(res, &amp;sel-&gt;r, format_source, &amp;ratio);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL:</div><div class='add'>+		sel-&gt;r = *__resizer_get_crop(res, fh, sel-&gt;which);</div><div class='add'>+		resizer_calc_ratios(res, &amp;sel-&gt;r, format_source, &amp;ratio);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * resizer_set_selection - Set a selection rectangle on a pad</div><div class='add'>+ * @sd: ISP resizer V4L2 subdevice</div><div class='add'>+ * @fh: V4L2 subdev file handle</div><div class='add'>+ * @sel: Selection rectangle</div><div class='add'>+ *</div><div class='add'>+ * The only supported rectangle is the actual crop rectangle on the sink pad.</div><div class='add'>+ *</div><div class='add'>+ * FIXME: This function currently behaves as if the KEEP_CONFIG selection flag</div><div class='add'>+ * was always set.</div><div class='add'>+ *</div><div class='add'>+ * Return 0 on success or a negative error code otherwise.</div><div class='add'>+ */</div><div class='add'>+static int resizer_set_selection(struct v4l2_subdev *sd,</div><div class='add'>+				 struct v4l2_subdev_fh *fh,</div><div class='add'>+				 struct v4l2_subdev_selection *sel)</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_res_device *res = v4l2_get_subdevdata(sd);</div><div class='ctx'> 	struct isp_device *isp = to_isp_device(res);</div><div class='ctx'> 	struct v4l2_mbus_framefmt *format_sink, *format_source;</div><div class='ctx'> 	struct resizer_ratio ratio;</div><div class='ctx'> </div><div class='del'>-	/* Only sink pad has crop capability */</div><div class='del'>-	if (crop-&gt;pad != RESZ_PAD_SINK)</div><div class='add'>+	if (sel-&gt;target != V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL ||</div><div class='add'>+	    sel-&gt;pad != RESZ_PAD_SINK)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	format_sink = __resizer_get_format(res, fh, RESZ_PAD_SINK,</div><div class='del'>-					   crop-&gt;which);</div><div class='add'>+					   sel-&gt;which);</div><div class='ctx'> 	format_source = __resizer_get_format(res, fh, RESZ_PAD_SOURCE,</div><div class='del'>-					     crop-&gt;which);</div><div class='add'>+					     sel-&gt;which);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(isp-&gt;dev, "%s: L=%d,T=%d,W=%d,H=%d,which=%d\n", __func__,</div><div class='del'>-		crop-&gt;rect.left, crop-&gt;rect.top, crop-&gt;rect.width,</div><div class='del'>-		crop-&gt;rect.height, crop-&gt;which);</div><div class='add'>+		sel-&gt;r.left, sel-&gt;r.top, sel-&gt;r.width, sel-&gt;r.height,</div><div class='add'>+		sel-&gt;which);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(isp-&gt;dev, "%s: input=%dx%d, output=%dx%d\n", __func__,</div><div class='ctx'> 		format_sink-&gt;width, format_sink-&gt;height,</div><div class='ctx'> 		format_source-&gt;width, format_source-&gt;height);</div><div class='ctx'> </div><div class='del'>-	resizer_try_crop(format_sink, format_source, &amp;crop-&gt;rect);</div><div class='del'>-	*__resizer_get_crop(res, fh, crop-&gt;which) = crop-&gt;rect;</div><div class='del'>-	resizer_calc_ratios(res, &amp;crop-&gt;rect, format_source, &amp;ratio);</div><div class='add'>+	/* Clamp the crop rectangle to the bounds, and then mangle it further to</div><div class='add'>+	 * fulfill the TRM equations. Store the clamped but otherwise unmangled</div><div class='add'>+	 * rectangle to avoid cropping the input multiple times: when an</div><div class='add'>+	 * application sets the output format, the current crop rectangle is</div><div class='add'>+	 * mangled during crop rectangle computation, which would lead to a new,</div><div class='add'>+	 * smaller input crop rectangle every time the output size is set if we</div><div class='add'>+	 * stored the mangled rectangle.</div><div class='add'>+	 */</div><div class='add'>+	resizer_try_crop(format_sink, format_source, &amp;sel-&gt;r);</div><div class='add'>+	*__resizer_get_crop(res, fh, sel-&gt;which) = sel-&gt;r;</div><div class='add'>+	resizer_calc_ratios(res, &amp;sel-&gt;r, format_source, &amp;ratio);</div><div class='ctx'> </div><div class='del'>-	if (crop-&gt;which == V4L2_SUBDEV_FORMAT_TRY)</div><div class='add'>+	if (sel-&gt;which == V4L2_SUBDEV_FORMAT_TRY)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	res-&gt;ratio = ratio;</div><div class='del'>-	res-&gt;crop.active = crop-&gt;rect;</div><div class='add'>+	res-&gt;crop.active = sel-&gt;r;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * s_crop can be called while streaming is on. In this case</div><div class='del'>-	 * the crop values will be set in the next IRQ.</div><div class='add'>+	 * set_selection can be called while streaming is on. In this case the</div><div class='add'>+	 * crop values will be set in the next IRQ.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (res-&gt;state != ISP_PIPELINE_STREAM_STOPPED)</div><div class='ctx'> 		res-&gt;applycrop = 1;</div><div class='hunk'>@@ -1530,8 +1568,8 @@ static const struct v4l2_subdev_pad_ops resizer_v4l2_pad_ops = {</div><div class='ctx'> 	.enum_frame_size = resizer_enum_frame_size,</div><div class='ctx'> 	.get_fmt = resizer_get_format,</div><div class='ctx'> 	.set_fmt = resizer_set_format,</div><div class='del'>-	.get_crop = resizer_g_crop,</div><div class='del'>-	.set_crop = resizer_s_crop,</div><div class='add'>+	.get_selection = resizer_get_selection,</div><div class='add'>+	.set_selection = resizer_set_selection,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* subdev operations */</div><div class='hunk'>@@ -1603,6 +1641,7 @@ static int resizer_link_setup(struct media_entity *entity,</div><div class='ctx'> /* media operations */</div><div class='ctx'> static const struct media_entity_operations resizer_media_ops = {</div><div class='ctx'> 	.link_setup = resizer_link_setup,</div><div class='add'>+	.link_validate = v4l2_subdev_link_validate,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void omap3isp_resizer_unregister_entities(struct isp_res_device *res)</div><div class='head'>diff --git a/drivers/media/video/omap3isp/ispstat.c b/drivers/media/video/omap3isp/ispstat.c<br/>index 11871ecc6d25..b8640be692f1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispstat.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/ispstat.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispstat.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispstat.c</a></div><div class='hunk'>@@ -1032,7 +1032,7 @@ int omap3isp_stat_subscribe_event(struct v4l2_subdev *subdev,</div><div class='ctx'> 	if (sub-&gt;type != stat-&gt;event_type)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return v4l2_event_subscribe(fh, sub, STAT_NEVENTS);</div><div class='add'>+	return v4l2_event_subscribe(fh, sub, STAT_NEVENTS, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int omap3isp_stat_unsubscribe_event(struct v4l2_subdev *subdev,</div><div class='head'>diff --git a/drivers/media/video/omap3isp/ispvideo.c b/drivers/media/video/omap3isp/ispvideo.c<br/>index b02070057724..b37379d39cdd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispvideo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/ispvideo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispvideo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispvideo.c</a></div><div class='hunk'>@@ -46,6 +46,10 @@</div><div class='ctx'>  * Helper functions</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * NOTE: When adding new media bus codes, always remember to add</div><div class='add'>+ * corresponding in-memory formats to the table below!!!</div><div class='add'>+ */</div><div class='ctx'> static struct isp_format_info formats[] = {</div><div class='ctx'> 	{ V4L2_MBUS_FMT_Y8_1X8, V4L2_MBUS_FMT_Y8_1X8,</div><div class='ctx'> 	  V4L2_MBUS_FMT_Y8_1X8, V4L2_MBUS_FMT_Y8_1X8,</div><div class='hunk'>@@ -68,9 +72,18 @@ static struct isp_format_info formats[] = {</div><div class='ctx'> 	{ V4L2_MBUS_FMT_SRGGB8_1X8, V4L2_MBUS_FMT_SRGGB8_1X8,</div><div class='ctx'> 	  V4L2_MBUS_FMT_SRGGB8_1X8, V4L2_MBUS_FMT_SRGGB8_1X8,</div><div class='ctx'> 	  V4L2_PIX_FMT_SRGGB8, 8, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8, V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8,</div><div class='add'>+	  V4L2_MBUS_FMT_SBGGR10_1X10, 0,</div><div class='add'>+	  V4L2_PIX_FMT_SBGGR10DPCM8, 8, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8, V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8,</div><div class='add'>+	  V4L2_MBUS_FMT_SGBRG10_1X10, 0,</div><div class='add'>+	  V4L2_PIX_FMT_SGBRG10DPCM8, 8, },</div><div class='ctx'> 	{ V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8, V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8,</div><div class='ctx'> 	  V4L2_MBUS_FMT_SGRBG10_1X10, 0,</div><div class='ctx'> 	  V4L2_PIX_FMT_SGRBG10DPCM8, 8, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8, V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8,</div><div class='add'>+	  V4L2_MBUS_FMT_SRGGB10_1X10, 0,</div><div class='add'>+	  V4L2_PIX_FMT_SRGGB10DPCM8, 8, },</div><div class='ctx'> 	{ V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_MBUS_FMT_SBGGR10_1X10,</div><div class='ctx'> 	  V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_MBUS_FMT_SBGGR8_1X8,</div><div class='ctx'> 	  V4L2_PIX_FMT_SBGGR10, 10, },</div><div class='hunk'>@@ -117,37 +130,6 @@ omap3isp_video_format_info(enum v4l2_mbus_pixelcode code)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Decide whether desired output pixel code can be obtained with</div><div class='del'>- * the lane shifter by shifting the input pixel code.</div><div class='del'>- * @in: input pixelcode to shifter</div><div class='del'>- * @out: output pixelcode from shifter</div><div class='del'>- * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]</div><div class='del'>- *</div><div class='del'>- * return true if the combination is possible</div><div class='del'>- * return false otherwise</div><div class='del'>- */</div><div class='del'>-static bool isp_video_is_shiftable(enum v4l2_mbus_pixelcode in,</div><div class='del'>-		enum v4l2_mbus_pixelcode out,</div><div class='del'>-		unsigned int additional_shift)</div><div class='del'>-{</div><div class='del'>-	const struct isp_format_info *in_info, *out_info;</div><div class='del'>-</div><div class='del'>-	if (in == out)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	in_info = omap3isp_video_format_info(in);</div><div class='del'>-	out_info = omap3isp_video_format_info(out);</div><div class='del'>-</div><div class='del'>-	if ((in_info-&gt;flavor == 0) || (out_info-&gt;flavor == 0))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (in_info-&gt;flavor != out_info-&gt;flavor)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return in_info-&gt;bpp - out_info-&gt;bpp + additional_shift &lt;= 6;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * isp_video_mbus_to_pix - Convert v4l2_mbus_framefmt to v4l2_pix_format</div><div class='ctx'>  * @video: ISP video instance</div><div class='ctx'>  * @mbus: v4l2_mbus_framefmt format (input)</div><div class='hunk'>@@ -242,8 +224,8 @@ isp_video_remote_subdev(struct isp_video *video, u32 *pad)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Return a pointer to the ISP video instance at the far end of the pipeline. */</div><div class='del'>-static struct isp_video *</div><div class='del'>-isp_video_far_end(struct isp_video *video)</div><div class='add'>+static int isp_video_get_graph_data(struct isp_video *video,</div><div class='add'>+				    struct isp_pipeline *pipe)</div><div class='ctx'> {</div><div class='ctx'> 	struct media_entity_graph graph;</div><div class='ctx'> 	struct media_entity *entity = &amp;video-&gt;video.entity;</div><div class='hunk'>@@ -254,21 +236,38 @@ isp_video_far_end(struct isp_video *video)</div><div class='ctx'> 	media_entity_graph_walk_start(&amp;graph, entity);</div><div class='ctx'> </div><div class='ctx'> 	while ((entity = media_entity_graph_walk_next(&amp;graph))) {</div><div class='add'>+		struct isp_video *__video;</div><div class='add'>+</div><div class='add'>+		pipe-&gt;entities |= 1 &lt;&lt; entity-&gt;id;</div><div class='add'>+</div><div class='add'>+		if (far_end != NULL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		if (entity == &amp;video-&gt;video.entity)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		far_end = to_isp_video(media_entity_to_video_device(entity));</div><div class='del'>-		if (far_end-&gt;type != video-&gt;type)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		far_end = NULL;</div><div class='add'>+		__video = to_isp_video(media_entity_to_video_device(entity));</div><div class='add'>+		if (__video-&gt;type != video-&gt;type)</div><div class='add'>+			far_end = __video;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;mdev-&gt;graph_mutex);</div><div class='del'>-	return far_end;</div><div class='add'>+</div><div class='add'>+	if (video-&gt;type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {</div><div class='add'>+		pipe-&gt;input = far_end;</div><div class='add'>+		pipe-&gt;output = video;</div><div class='add'>+	} else {</div><div class='add'>+		if (far_end == NULL)</div><div class='add'>+			return -EPIPE;</div><div class='add'>+</div><div class='add'>+		pipe-&gt;input = video;</div><div class='add'>+		pipe-&gt;output = far_end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -285,52 +284,24 @@ isp_video_far_end(struct isp_video *video)</div><div class='ctx'> static int isp_video_validate_pipeline(struct isp_pipeline *pipe)</div><div class='ctx'> {</div><div class='ctx'> 	struct isp_device *isp = pipe-&gt;output-&gt;isp;</div><div class='del'>-	struct v4l2_subdev_format fmt_source;</div><div class='del'>-	struct v4l2_subdev_format fmt_sink;</div><div class='ctx'> 	struct media_pad *pad;</div><div class='ctx'> 	struct v4l2_subdev *subdev;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	pipe-&gt;max_rate = pipe-&gt;l3_ick;</div><div class='ctx'> </div><div class='ctx'> 	subdev = isp_video_remote_subdev(pipe-&gt;output, NULL);</div><div class='ctx'> 	if (subdev == NULL)</div><div class='ctx'> 		return -EPIPE;</div><div class='ctx'> </div><div class='ctx'> 	while (1) {</div><div class='del'>-		unsigned int shifter_link;</div><div class='ctx'> 		/* Retrieve the sink format */</div><div class='ctx'> 		pad = &amp;subdev-&gt;entity.pads[0];</div><div class='ctx'> 		if (!(pad-&gt;flags &amp; MEDIA_PAD_FL_SINK))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		fmt_sink.pad = pad-&gt;index;</div><div class='del'>-		fmt_sink.which = V4L2_SUBDEV_FORMAT_ACTIVE;</div><div class='del'>-		ret = v4l2_subdev_call(subdev, pad, get_fmt, NULL, &amp;fmt_sink);</div><div class='del'>-		if (ret &lt; 0 &amp;&amp; ret != -ENOIOCTLCMD)</div><div class='del'>-			return -EPIPE;</div><div class='del'>-</div><div class='ctx'> 		/* Update the maximum frame rate */</div><div class='ctx'> 		if (subdev == &amp;isp-&gt;isp_res.subdev)</div><div class='ctx'> 			omap3isp_resizer_max_rate(&amp;isp-&gt;isp_res,</div><div class='ctx'> 						  &amp;pipe-&gt;max_rate);</div><div class='ctx'> </div><div class='del'>-		/* Check ccdc maximum data rate when data comes from sensor</div><div class='del'>-		 * TODO: Include ccdc rate in pipe-&gt;max_rate and compare the</div><div class='del'>-		 *       total pipe rate with the input data rate from sensor.</div><div class='del'>-		 */</div><div class='del'>-		if (subdev == &amp;isp-&gt;isp_ccdc.subdev &amp;&amp; pipe-&gt;input == NULL) {</div><div class='del'>-			unsigned int rate = UINT_MAX;</div><div class='del'>-</div><div class='del'>-			omap3isp_ccdc_max_rate(&amp;isp-&gt;isp_ccdc, &amp;rate);</div><div class='del'>-			if (isp-&gt;isp_ccdc.vpcfg.pixelclk &gt; rate)</div><div class='del'>-				return -ENOSPC;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* If sink pad is on CCDC, the link has the lane shifter</div><div class='del'>-		 * in the middle of it. */</div><div class='del'>-		shifter_link = subdev == &amp;isp-&gt;isp_ccdc.subdev;</div><div class='del'>-</div><div class='ctx'> 		/* Retrieve the source format. Return an error if no source</div><div class='ctx'> 		 * entity can be found, and stop checking the pipeline if the</div><div class='ctx'> 		 * source entity isn't a subdev.</div><div class='hunk'>@@ -343,32 +314,6 @@ static int isp_video_validate_pipeline(struct isp_pipeline *pipe)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		subdev = media_entity_to_v4l2_subdev(pad-&gt;entity);</div><div class='del'>-</div><div class='del'>-		fmt_source.pad = pad-&gt;index;</div><div class='del'>-		fmt_source.which = V4L2_SUBDEV_FORMAT_ACTIVE;</div><div class='del'>-		ret = v4l2_subdev_call(subdev, pad, get_fmt, NULL, &amp;fmt_source);</div><div class='del'>-		if (ret &lt; 0 &amp;&amp; ret != -ENOIOCTLCMD)</div><div class='del'>-			return -EPIPE;</div><div class='del'>-</div><div class='del'>-		/* Check if the two ends match */</div><div class='del'>-		if (fmt_source.format.width != fmt_sink.format.width ||</div><div class='del'>-		    fmt_source.format.height != fmt_sink.format.height)</div><div class='del'>-			return -EPIPE;</div><div class='del'>-</div><div class='del'>-		if (shifter_link) {</div><div class='del'>-			unsigned int parallel_shift = 0;</div><div class='del'>-			if (isp-&gt;isp_ccdc.input == CCDC_INPUT_PARALLEL) {</div><div class='del'>-				struct isp_parallel_platform_data *pdata =</div><div class='del'>-					&amp;((struct isp_v4l2_subdevs_group *)</div><div class='del'>-					      subdev-&gt;host_priv)-&gt;bus.parallel;</div><div class='del'>-				parallel_shift = pdata-&gt;data_lane_shift * 2;</div><div class='del'>-			}</div><div class='del'>-			if (!isp_video_is_shiftable(fmt_source.format.code,</div><div class='del'>-						fmt_sink.format.code,</div><div class='del'>-						parallel_shift))</div><div class='del'>-				return -EPIPE;</div><div class='del'>-		} else if (fmt_source.format.code != fmt_sink.format.code)</div><div class='del'>-			return -EPIPE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -923,6 +868,92 @@ isp_video_dqbuf(struct file *file, void *fh, struct v4l2_buffer *b)</div><div class='ctx'> 					  file-&gt;f_flags &amp; O_NONBLOCK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int isp_video_check_external_subdevs(struct isp_video *video,</div><div class='add'>+					    struct isp_pipeline *pipe)</div><div class='add'>+{</div><div class='add'>+	struct isp_device *isp = video-&gt;isp;</div><div class='add'>+	struct media_entity *ents[] = {</div><div class='add'>+		&amp;isp-&gt;isp_csi2a.subdev.entity,</div><div class='add'>+		&amp;isp-&gt;isp_csi2c.subdev.entity,</div><div class='add'>+		&amp;isp-&gt;isp_ccp2.subdev.entity,</div><div class='add'>+		&amp;isp-&gt;isp_ccdc.subdev.entity</div><div class='add'>+	};</div><div class='add'>+	struct media_pad *source_pad;</div><div class='add'>+	struct media_entity *source = NULL;</div><div class='add'>+	struct media_entity *sink;</div><div class='add'>+	struct v4l2_subdev_format fmt;</div><div class='add'>+	struct v4l2_ext_controls ctrls;</div><div class='add'>+	struct v4l2_ext_control ctrl;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ents); i++) {</div><div class='add'>+		/* Is the entity part of the pipeline? */</div><div class='add'>+		if (!(pipe-&gt;entities &amp; (1 &lt;&lt; ents[i]-&gt;id)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* ISP entities have always sink pad == 0. Find source. */</div><div class='add'>+		source_pad = media_entity_remote_source(&amp;ents[i]-&gt;pads[0]);</div><div class='add'>+		if (source_pad == NULL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		source = source_pad-&gt;entity;</div><div class='add'>+		sink = ents[i];</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!source) {</div><div class='add'>+		dev_warn(isp-&gt;dev, "can't find source, failing now\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (media_entity_type(source) != MEDIA_ENT_T_V4L2_SUBDEV)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	pipe-&gt;external = media_entity_to_v4l2_subdev(source);</div><div class='add'>+</div><div class='add'>+	fmt.pad = source_pad-&gt;index;</div><div class='add'>+	fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;</div><div class='add'>+	ret = v4l2_subdev_call(media_entity_to_v4l2_subdev(sink),</div><div class='add'>+			       pad, get_fmt, NULL, &amp;fmt);</div><div class='add'>+	if (unlikely(ret &lt; 0)) {</div><div class='add'>+		dev_warn(isp-&gt;dev, "get_fmt returned null!\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pipe-&gt;external_bpp = omap3isp_video_format_info(fmt.format.code)-&gt;bpp;</div><div class='add'>+</div><div class='add'>+	memset(&amp;ctrls, 0, sizeof(ctrls));</div><div class='add'>+	memset(&amp;ctrl, 0, sizeof(ctrl));</div><div class='add'>+</div><div class='add'>+	ctrl.id = V4L2_CID_PIXEL_RATE;</div><div class='add'>+</div><div class='add'>+	ctrls.count = 1;</div><div class='add'>+	ctrls.controls = &amp;ctrl;</div><div class='add'>+</div><div class='add'>+	ret = v4l2_g_ext_ctrls(pipe-&gt;external-&gt;ctrl_handler, &amp;ctrls);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_warn(isp-&gt;dev, "no pixel rate control in subdev %s\n",</div><div class='add'>+			 pipe-&gt;external-&gt;name);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pipe-&gt;external_rate = ctrl.value64;</div><div class='add'>+</div><div class='add'>+	if (pipe-&gt;entities &amp; (1 &lt;&lt; isp-&gt;isp_ccdc.subdev.entity.id)) {</div><div class='add'>+		unsigned int rate = UINT_MAX;</div><div class='add'>+		/*</div><div class='add'>+		 * Check that maximum allowed CCDC pixel rate isn't</div><div class='add'>+		 * exceeded by the pixel rate.</div><div class='add'>+		 */</div><div class='add'>+		omap3isp_ccdc_max_rate(&amp;isp-&gt;isp_ccdc, &amp;rate);</div><div class='add'>+		if (pipe-&gt;external_rate &gt; rate)</div><div class='add'>+			return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Stream management</div><div class='ctx'>  *</div><div class='hunk'>@@ -961,7 +992,6 @@ isp_video_streamon(struct file *file, void *fh, enum v4l2_buf_type type)</div><div class='ctx'> 	struct isp_video *video = video_drvdata(file);</div><div class='ctx'> 	enum isp_pipeline_state state;</div><div class='ctx'> 	struct isp_pipeline *pipe;</div><div class='del'>-	struct isp_video *far_end;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -980,46 +1010,45 @@ isp_video_streamon(struct file *file, void *fh, enum v4l2_buf_type type)</div><div class='ctx'> 	 */</div><div class='ctx'> 	pipe = video-&gt;video.entity.pipe</div><div class='ctx'> 	     ? to_isp_pipeline(&amp;video-&gt;video.entity) : &amp;video-&gt;pipe;</div><div class='del'>-	media_entity_pipeline_start(&amp;video-&gt;video.entity, &amp;pipe-&gt;pipe);</div><div class='add'>+</div><div class='add'>+	pipe-&gt;entities = 0;</div><div class='add'>+</div><div class='add'>+	if (video-&gt;isp-&gt;pdata-&gt;set_constraints)</div><div class='add'>+		video-&gt;isp-&gt;pdata-&gt;set_constraints(video-&gt;isp, true);</div><div class='add'>+	pipe-&gt;l3_ick = clk_get_rate(video-&gt;isp-&gt;clock[ISP_CLK_L3_ICK]);</div><div class='add'>+	pipe-&gt;max_rate = pipe-&gt;l3_ick;</div><div class='add'>+</div><div class='add'>+	ret = media_entity_pipeline_start(&amp;video-&gt;video.entity, &amp;pipe-&gt;pipe);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_pipeline_start;</div><div class='ctx'> </div><div class='ctx'> 	/* Verify that the currently configured format matches the output of</div><div class='ctx'> 	 * the connected subdev.</div><div class='ctx'> 	 */</div><div class='ctx'> 	ret = isp_video_check_format(video, vfh);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='add'>+		goto err_check_format;</div><div class='ctx'> </div><div class='ctx'> 	video-&gt;bpl_padding = ret;</div><div class='ctx'> 	video-&gt;bpl_value = vfh-&gt;format.fmt.pix.bytesperline;</div><div class='ctx'> </div><div class='del'>-	/* Find the ISP video node connected at the far end of the pipeline and</div><div class='del'>-	 * update the pipeline.</div><div class='del'>-	 */</div><div class='del'>-	far_end = isp_video_far_end(video);</div><div class='add'>+	ret = isp_video_get_graph_data(video, pipe);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_check_format;</div><div class='ctx'> </div><div class='del'>-	if (video-&gt;type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {</div><div class='add'>+	if (video-&gt;type == V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='ctx'> 		state = ISP_PIPELINE_STREAM_OUTPUT | ISP_PIPELINE_IDLE_OUTPUT;</div><div class='del'>-		pipe-&gt;input = far_end;</div><div class='del'>-		pipe-&gt;output = video;</div><div class='del'>-	} else {</div><div class='del'>-		if (far_end == NULL) {</div><div class='del'>-			ret = -EPIPE;</div><div class='del'>-			goto error;</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+	else</div><div class='ctx'> 		state = ISP_PIPELINE_STREAM_INPUT | ISP_PIPELINE_IDLE_INPUT;</div><div class='del'>-		pipe-&gt;input = video;</div><div class='del'>-		pipe-&gt;output = far_end;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (video-&gt;isp-&gt;pdata-&gt;set_constraints)</div><div class='del'>-		video-&gt;isp-&gt;pdata-&gt;set_constraints(video-&gt;isp, true);</div><div class='del'>-	pipe-&gt;l3_ick = clk_get_rate(video-&gt;isp-&gt;clock[ISP_CLK_L3_ICK]);</div><div class='add'>+	ret = isp_video_check_external_subdevs(video, pipe);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_check_format;</div><div class='ctx'> </div><div class='ctx'> 	/* Validate the pipeline and update its state. */</div><div class='ctx'> 	ret = isp_video_validate_pipeline(pipe);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='add'>+		goto err_check_format;</div><div class='ctx'> </div><div class='ctx'> 	pipe-&gt;error = false;</div><div class='ctx'> </div><div class='hunk'>@@ -1041,7 +1070,7 @@ isp_video_streamon(struct file *file, void *fh, enum v4l2_buf_type type)</div><div class='ctx'> </div><div class='ctx'> 	ret = omap3isp_video_queue_streamon(&amp;vfh-&gt;queue);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='add'>+		goto err_check_format;</div><div class='ctx'> </div><div class='ctx'> 	/* In sensor-to-memory mode, the stream can be started synchronously</div><div class='ctx'> 	 * to the stream on command. In memory-to-memory mode, it will be</div><div class='hunk'>@@ -1051,32 +1080,34 @@ isp_video_streamon(struct file *file, void *fh, enum v4l2_buf_type type)</div><div class='ctx'> 		ret = omap3isp_pipeline_set_stream(pipe,</div><div class='ctx'> 					      ISP_PIPELINE_STREAM_CONTINUOUS);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto error;</div><div class='add'>+			goto err_set_stream;</div><div class='ctx'> 		spin_lock_irqsave(&amp;video-&gt;queue-&gt;irqlock, flags);</div><div class='ctx'> 		if (list_empty(&amp;video-&gt;dmaqueue))</div><div class='ctx'> 			video-&gt;dmaqueue_flags |= ISP_VIDEO_DMAQUEUE_UNDERRUN;</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;video-&gt;queue-&gt;irqlock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-error:</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		omap3isp_video_queue_streamoff(&amp;vfh-&gt;queue);</div><div class='del'>-		if (video-&gt;isp-&gt;pdata-&gt;set_constraints)</div><div class='del'>-			video-&gt;isp-&gt;pdata-&gt;set_constraints(video-&gt;isp, false);</div><div class='del'>-		media_entity_pipeline_stop(&amp;video-&gt;video.entity);</div><div class='del'>-		/* The DMA queue must be emptied here, otherwise CCDC interrupts</div><div class='del'>-		 * that will get triggered the next time the CCDC is powered up</div><div class='del'>-		 * will try to access buffers that might have been freed but</div><div class='del'>-		 * still present in the DMA queue. This can easily get triggered</div><div class='del'>-		 * if the above omap3isp_pipeline_set_stream() call fails on a</div><div class='del'>-		 * system with a free-running sensor.</div><div class='del'>-		 */</div><div class='del'>-		INIT_LIST_HEAD(&amp;video-&gt;dmaqueue);</div><div class='del'>-		video-&gt;queue = NULL;</div><div class='del'>-	}</div><div class='add'>+	video-&gt;streaming = 1;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;video-&gt;stream_lock);</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='del'>-	if (!ret)</div><div class='del'>-		video-&gt;streaming = 1;</div><div class='add'>+err_set_stream:</div><div class='add'>+	omap3isp_video_queue_streamoff(&amp;vfh-&gt;queue);</div><div class='add'>+err_check_format:</div><div class='add'>+	media_entity_pipeline_stop(&amp;video-&gt;video.entity);</div><div class='add'>+err_pipeline_start:</div><div class='add'>+	if (video-&gt;isp-&gt;pdata-&gt;set_constraints)</div><div class='add'>+		video-&gt;isp-&gt;pdata-&gt;set_constraints(video-&gt;isp, false);</div><div class='add'>+	/* The DMA queue must be emptied here, otherwise CCDC interrupts that</div><div class='add'>+	 * will get triggered the next time the CCDC is powered up will try to</div><div class='add'>+	 * access buffers that might have been freed but still present in the</div><div class='add'>+	 * DMA queue. This can easily get triggered if the above</div><div class='add'>+	 * omap3isp_pipeline_set_stream() call fails on a system with a</div><div class='add'>+	 * free-running sensor.</div><div class='add'>+	 */</div><div class='add'>+	INIT_LIST_HEAD(&amp;video-&gt;dmaqueue);</div><div class='add'>+	video-&gt;queue = NULL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;video-&gt;stream_lock);</div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/drivers/media/video/omap3isp/ispvideo.h b/drivers/media/video/omap3isp/ispvideo.h<br/>index d91bdb919be0..5acc909500ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispvideo.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/omap3isp/ispvideo.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/omap3isp/ispvideo.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/omap3isp/ispvideo.h</a></div><div class='hunk'>@@ -88,6 +88,7 @@ enum isp_pipeline_state {</div><div class='ctx'> /*</div><div class='ctx'>  * struct isp_pipeline - An ISP hardware pipeline</div><div class='ctx'>  * @error: A hardware error occurred during capture</div><div class='add'>+ * @entities: Bitmask of entities in the pipeline (indexed by entity ID)</div><div class='ctx'>  */</div><div class='ctx'> struct isp_pipeline {</div><div class='ctx'> 	struct media_pipeline pipe;</div><div class='hunk'>@@ -96,12 +97,16 @@ struct isp_pipeline {</div><div class='ctx'> 	enum isp_pipeline_stream_state stream_state;</div><div class='ctx'> 	struct isp_video *input;</div><div class='ctx'> 	struct isp_video *output;</div><div class='add'>+	u32 entities;</div><div class='ctx'> 	unsigned long l3_ick;</div><div class='ctx'> 	unsigned int max_rate;</div><div class='ctx'> 	atomic_t frame_number;</div><div class='ctx'> 	bool do_propagation; /* of frame number */</div><div class='ctx'> 	bool error;</div><div class='ctx'> 	struct v4l2_fract max_timeperframe;</div><div class='add'>+	struct v4l2_subdev *external;</div><div class='add'>+	unsigned int external_rate;</div><div class='add'>+	unsigned int external_bpp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define to_isp_pipeline(__e) \</div><div class='head'>diff --git a/drivers/media/video/ov5642.c b/drivers/media/video/ov5642.c<br/>index 80e07794ac8e..0bc93313d37a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/ov5642.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/ov5642.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/ov5642.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/ov5642.c</a></div><div class='hunk'>@@ -1025,8 +1025,6 @@ static int ov5642_probe(struct i2c_client *client,</div><div class='ctx'> 	priv-&gt;crop_rect.height	= OV5642_DEFAULT_HEIGHT;</div><div class='ctx'> 	priv-&gt;crop_rect.left	= (OV5642_MAX_WIDTH - OV5642_DEFAULT_WIDTH) / 2;</div><div class='ctx'> 	priv-&gt;crop_rect.top	= (OV5642_MAX_HEIGHT - OV5642_DEFAULT_HEIGHT) / 2;</div><div class='del'>-	priv-&gt;crop_rect.width	= OV5642_DEFAULT_WIDTH;</div><div class='del'>-	priv-&gt;crop_rect.height	= OV5642_DEFAULT_HEIGHT;</div><div class='ctx'> 	priv-&gt;total_width = OV5642_DEFAULT_WIDTH + BLANKING_EXTRA_WIDTH;</div><div class='ctx'> 	priv-&gt;total_height = BLANKING_MIN_HEIGHT;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/pms.c b/drivers/media/video/pms.c<br/>index e753b5e4d2ce..af2d9086d7e8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/pms.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/pms.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/pms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pms.c</a></div><div class='hunk'>@@ -30,15 +30,19 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/isa.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-common.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='add'>+#include &lt;media/v4l2-fh.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_VERSION("0.0.4");</div><div class='add'>+MODULE_VERSION("0.0.5");</div><div class='ctx'> </div><div class='ctx'> #define MOTOROLA	1</div><div class='ctx'> #define PHILIPS2	2               /* SAA7191 */</div><div class='hunk'>@@ -55,11 +59,11 @@ struct i2c_info {</div><div class='ctx'> struct pms {</div><div class='ctx'> 	struct v4l2_device v4l2_dev;</div><div class='ctx'> 	struct video_device vdev;</div><div class='add'>+	struct v4l2_ctrl_handler hdl;</div><div class='ctx'> 	int height;</div><div class='ctx'> 	int width;</div><div class='ctx'> 	int depth;</div><div class='ctx'> 	int input;</div><div class='del'>-	s32 brightness, saturation, hue, contrast;</div><div class='ctx'> 	struct mutex lock;</div><div class='ctx'> 	int i2c_count;</div><div class='ctx'> 	struct i2c_info i2cinfo[64];</div><div class='hunk'>@@ -72,8 +76,6 @@ struct pms {</div><div class='ctx'> 	void __iomem *mem;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct pms pms_card;</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  *	I/O ports and Shared Memory</div><div class='ctx'>  */</div><div class='hunk'>@@ -676,8 +678,10 @@ static int pms_querycap(struct file *file, void  *priv,</div><div class='ctx'> </div><div class='ctx'> 	strlcpy(vcap-&gt;driver, dev-&gt;v4l2_dev.name, sizeof(vcap-&gt;driver));</div><div class='ctx'> 	strlcpy(vcap-&gt;card, "Mediavision PMS", sizeof(vcap-&gt;card));</div><div class='del'>-	strlcpy(vcap-&gt;bus_info, "ISA", sizeof(vcap-&gt;bus_info));</div><div class='del'>-	vcap-&gt;capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE;</div><div class='add'>+	snprintf(vcap-&gt;bus_info, sizeof(vcap-&gt;bus_info),</div><div class='add'>+			"ISA:%s", dev-&gt;v4l2_dev.name);</div><div class='add'>+	vcap-&gt;device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE;</div><div class='add'>+	vcap-&gt;capabilities = vcap-&gt;device_caps | V4L2_CAP_DEVICE_CAPS;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -716,11 +720,9 @@ static int pms_s_input(struct file *file, void *fh, unsigned int inp)</div><div class='ctx'> 	if (inp &gt; 3)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;dev-&gt;lock);</div><div class='ctx'> 	dev-&gt;input = inp;</div><div class='ctx'> 	pms_videosource(dev, inp &amp; 1);</div><div class='ctx'> 	pms_vcrinput(dev, inp &gt;&gt; 1);</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -738,7 +740,6 @@ static int pms_s_std(struct file *file, void *fh, v4l2_std_id *std)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;std = *std;</div><div class='del'>-	mutex_lock(&amp;dev-&gt;lock);</div><div class='ctx'> 	if (dev-&gt;std &amp; V4L2_STD_NTSC) {</div><div class='ctx'> 		pms_framerate(dev, 30);</div><div class='ctx'> 		pms_secamcross(dev, 0);</div><div class='hunk'>@@ -762,81 +763,31 @@ static int pms_s_std(struct file *file, void *fh, v4l2_std_id *std)</div><div class='ctx'> 		pms_format(dev, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}*/</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;lock);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pms_queryctrl(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_queryctrl *qc)</div><div class='del'>-{</div><div class='del'>-	switch (qc-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 255, 1, 139);</div><div class='del'>-	case V4L2_CID_CONTRAST:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 255, 1, 70);</div><div class='del'>-	case V4L2_CID_SATURATION:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 255, 1, 64);</div><div class='del'>-	case V4L2_CID_HUE:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 255, 1, 0);</div><div class='del'>-	}</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pms_g_ctrl(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_control *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct pms *dev = video_drvdata(file);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (ctrl-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		ctrl-&gt;value = dev-&gt;brightness;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_CONTRAST:</div><div class='del'>-		ctrl-&gt;value = dev-&gt;contrast;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_SATURATION:</div><div class='del'>-		ctrl-&gt;value = dev-&gt;saturation;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_HUE:</div><div class='del'>-		ctrl-&gt;value = dev-&gt;hue;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pms_s_ctrl(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_control *ctrl)</div><div class='add'>+static int pms_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='del'>-	struct pms *dev = video_drvdata(file);</div><div class='add'>+	struct pms *dev = container_of(ctrl-&gt;handler, struct pms, hdl);</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;dev-&gt;lock);</div><div class='ctx'> 	switch (ctrl-&gt;id) {</div><div class='ctx'> 	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		dev-&gt;brightness = ctrl-&gt;value;</div><div class='del'>-		pms_brightness(dev, dev-&gt;brightness);</div><div class='add'>+		pms_brightness(dev, ctrl-&gt;val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_CONTRAST:</div><div class='del'>-		dev-&gt;contrast = ctrl-&gt;value;</div><div class='del'>-		pms_contrast(dev, dev-&gt;contrast);</div><div class='add'>+		pms_contrast(dev, ctrl-&gt;val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_SATURATION:</div><div class='del'>-		dev-&gt;saturation = ctrl-&gt;value;</div><div class='del'>-		pms_saturation(dev, dev-&gt;saturation);</div><div class='add'>+		pms_saturation(dev, ctrl-&gt;val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_HUE:</div><div class='del'>-		dev-&gt;hue = ctrl-&gt;value;</div><div class='del'>-		pms_hue(dev, dev-&gt;hue);</div><div class='add'>+		pms_hue(dev, ctrl-&gt;val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -884,13 +835,11 @@ static int pms_s_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *fm</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	mutex_lock(&amp;dev-&gt;lock);</div><div class='ctx'> 	dev-&gt;width = pix-&gt;width;</div><div class='ctx'> 	dev-&gt;height = pix-&gt;height;</div><div class='ctx'> 	dev-&gt;depth = (pix-&gt;pixelformat == V4L2_PIX_FMT_RGB555) ? 15 : 16;</div><div class='ctx'> 	pms_resolution(dev, dev-&gt;width, dev-&gt;height);</div><div class='ctx'> 	/* Ok we figured out what to use from our wide choice */</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -901,7 +850,7 @@ static int pms_enum_fmt_vid_cap(struct file *file, void *fh, struct v4l2_fmtdesc</div><div class='ctx'> 		  "RGB 5:5:5", V4L2_PIX_FMT_RGB555,</div><div class='ctx'> 		  { 0, 0, 0, 0 }</div><div class='ctx'> 		},</div><div class='del'>-		{ 0, 0, 0,</div><div class='add'>+		{ 1, 0, 0,</div><div class='ctx'> 		  "RGB 5:6:5", V4L2_PIX_FMT_RGB565,</div><div class='ctx'> 		  { 0, 0, 0, 0 }</div><div class='ctx'> 		},</div><div class='hunk'>@@ -922,32 +871,43 @@ static ssize_t pms_read(struct file *file, char __user *buf,</div><div class='ctx'> 	struct pms *dev = video_drvdata(file);</div><div class='ctx'> 	int len;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;dev-&gt;lock);</div><div class='ctx'> 	len = pms_capture(dev, buf, (dev-&gt;depth == 15), count);</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;lock);</div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int pms_poll(struct file *file, struct poll_table_struct *wait)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	unsigned int res = POLLIN | POLLRDNORM;</div><div class='add'>+</div><div class='add'>+	if (v4l2_event_pending(fh))</div><div class='add'>+		res |= POLLPRI;</div><div class='add'>+	poll_wait(file, &amp;fh-&gt;wait, wait);</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct v4l2_file_operations pms_fops = {</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='add'>+	.open           = v4l2_fh_open,</div><div class='add'>+	.release        = v4l2_fh_release,</div><div class='add'>+	.poll           = pms_poll,</div><div class='ctx'> 	.unlocked_ioctl	= video_ioctl2,</div><div class='ctx'> 	.read           = pms_read,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct v4l2_ioctl_ops pms_ioctl_ops = {</div><div class='del'>-	.vidioc_querycap    		    = pms_querycap,</div><div class='del'>-	.vidioc_g_input      		    = pms_g_input,</div><div class='del'>-	.vidioc_s_input      		    = pms_s_input,</div><div class='del'>-	.vidioc_enum_input   		    = pms_enum_input,</div><div class='del'>-	.vidioc_g_std 			    = pms_g_std,</div><div class='del'>-	.vidioc_s_std 			    = pms_s_std,</div><div class='del'>-	.vidioc_queryctrl 		    = pms_queryctrl,</div><div class='del'>-	.vidioc_g_ctrl  		    = pms_g_ctrl,</div><div class='del'>-	.vidioc_s_ctrl 			    = pms_s_ctrl,</div><div class='del'>-	.vidioc_enum_fmt_vid_cap 	    = pms_enum_fmt_vid_cap,</div><div class='del'>-	.vidioc_g_fmt_vid_cap 		    = pms_g_fmt_vid_cap,</div><div class='del'>-	.vidioc_s_fmt_vid_cap  		    = pms_s_fmt_vid_cap,</div><div class='del'>-	.vidioc_try_fmt_vid_cap  	    = pms_try_fmt_vid_cap,</div><div class='add'>+	.vidioc_querycap	    = pms_querycap,</div><div class='add'>+	.vidioc_g_input		    = pms_g_input,</div><div class='add'>+	.vidioc_s_input		    = pms_s_input,</div><div class='add'>+	.vidioc_enum_input	    = pms_enum_input,</div><div class='add'>+	.vidioc_g_std		    = pms_g_std,</div><div class='add'>+	.vidioc_s_std		    = pms_s_std,</div><div class='add'>+	.vidioc_enum_fmt_vid_cap    = pms_enum_fmt_vid_cap,</div><div class='add'>+	.vidioc_g_fmt_vid_cap	    = pms_g_fmt_vid_cap,</div><div class='add'>+	.vidioc_s_fmt_vid_cap	    = pms_s_fmt_vid_cap,</div><div class='add'>+	.vidioc_try_fmt_vid_cap     = pms_try_fmt_vid_cap,</div><div class='add'>+	.vidioc_subscribe_event     = v4l2_ctrl_subscribe_event,</div><div class='add'>+	.vidioc_unsubscribe_event   = v4l2_event_unsubscribe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -956,7 +916,6 @@ static const struct v4l2_ioctl_ops pms_ioctl_ops = {</div><div class='ctx'> </div><div class='ctx'> static int init_mediavision(struct pms *dev)</div><div class='ctx'> {</div><div class='del'>-	int id;</div><div class='ctx'> 	int idec, decst;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	static const unsigned char i2c_defs[] = {</div><div class='hunk'>@@ -988,7 +947,6 @@ static int init_mediavision(struct pms *dev)</div><div class='ctx'> 	outb(dev-&gt;io &gt;&gt; 4, 0x9a01);	/* Set IO port */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	id = mvv_read(dev, 3);</div><div class='ctx'> 	decst = pms_i2c_stat(dev, 0x43);</div><div class='ctx'> </div><div class='ctx'> 	if (decst != -1)</div><div class='hunk'>@@ -1068,76 +1026,125 @@ static int enable;</div><div class='ctx'> module_param(enable, int, 0);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static int __init pms_init(void)</div><div class='add'>+static const struct v4l2_ctrl_ops pms_ctrl_ops = {</div><div class='add'>+	.s_ctrl = pms_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int pms_probe(struct device *pdev, unsigned int card)</div><div class='ctx'> {</div><div class='del'>-	struct pms *dev = &amp;pms_card;</div><div class='del'>-	struct v4l2_device *v4l2_dev = &amp;dev-&gt;v4l2_dev;</div><div class='add'>+	struct pms *dev;</div><div class='add'>+	struct v4l2_device *v4l2_dev;</div><div class='add'>+	struct v4l2_ctrl_handler *hdl;</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='del'>-	strlcpy(v4l2_dev-&gt;name, "pms", sizeof(v4l2_dev-&gt;name));</div><div class='del'>-</div><div class='del'>-	v4l2_info(v4l2_dev, "Mediavision Pro Movie Studio driver 0.03\n");</div><div class='del'>-</div><div class='ctx'> #ifndef MODULE</div><div class='ctx'> 	if (!enable) {</div><div class='del'>-		v4l2_err(v4l2_dev,</div><div class='del'>-			"PMS: not enabled, use pms.enable=1 to probe\n");</div><div class='add'>+		pr_err("PMS: not enabled, use pms.enable=1 to probe\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+	dev = kzalloc(sizeof(*dev), GFP_KERNEL);</div><div class='add'>+	if (dev == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	dev-&gt;decoder = PHILIPS2;</div><div class='ctx'> 	dev-&gt;io = io_port;</div><div class='ctx'> 	dev-&gt;data = io_port + 1;</div><div class='add'>+	v4l2_dev = &amp;dev-&gt;v4l2_dev;</div><div class='add'>+	hdl = &amp;dev-&gt;hdl;</div><div class='ctx'> </div><div class='del'>-	if (init_mediavision(dev)) {</div><div class='add'>+	res = v4l2_device_register(pdev, v4l2_dev);</div><div class='add'>+	if (res &lt; 0) {</div><div class='add'>+		v4l2_err(v4l2_dev, "Could not register v4l2_device\n");</div><div class='add'>+		goto free_dev;</div><div class='add'>+	}</div><div class='add'>+	v4l2_info(v4l2_dev, "Mediavision Pro Movie Studio driver 0.05\n");</div><div class='add'>+</div><div class='add'>+	res = init_mediavision(dev);</div><div class='add'>+	if (res) {</div><div class='ctx'> 		v4l2_err(v4l2_dev, "Board not found.\n");</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		goto free_io;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	res = v4l2_device_register(NULL, v4l2_dev);</div><div class='del'>-	if (res &lt; 0) {</div><div class='del'>-		v4l2_err(v4l2_dev, "Could not register v4l2_device\n");</div><div class='del'>-		return res;</div><div class='add'>+	v4l2_ctrl_handler_init(hdl, 4);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;pms_ctrl_ops,</div><div class='add'>+			V4L2_CID_BRIGHTNESS, 0, 255, 1, 139);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;pms_ctrl_ops,</div><div class='add'>+			V4L2_CID_CONTRAST, 0, 255, 1, 70);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;pms_ctrl_ops,</div><div class='add'>+			V4L2_CID_SATURATION, 0, 255, 1, 64);</div><div class='add'>+	v4l2_ctrl_new_std(hdl, &amp;pms_ctrl_ops,</div><div class='add'>+			V4L2_CID_HUE, 0, 255, 1, 0);</div><div class='add'>+	if (hdl-&gt;error) {</div><div class='add'>+		res = hdl-&gt;error;</div><div class='add'>+		goto free_hdl;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mutex_init(&amp;dev-&gt;lock);</div><div class='ctx'> 	strlcpy(dev-&gt;vdev.name, v4l2_dev-&gt;name, sizeof(dev-&gt;vdev.name));</div><div class='ctx'> 	dev-&gt;vdev.v4l2_dev = v4l2_dev;</div><div class='add'>+	dev-&gt;vdev.ctrl_handler = hdl;</div><div class='ctx'> 	dev-&gt;vdev.fops = &amp;pms_fops;</div><div class='ctx'> 	dev-&gt;vdev.ioctl_ops = &amp;pms_ioctl_ops;</div><div class='ctx'> 	dev-&gt;vdev.release = video_device_release_empty;</div><div class='add'>+	dev-&gt;vdev.lock = &amp;dev-&gt;lock;</div><div class='add'>+	dev-&gt;vdev.tvnorms = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM;</div><div class='add'>+	set_bit(V4L2_FL_USE_FH_PRIO, &amp;dev-&gt;vdev.flags);</div><div class='ctx'> 	video_set_drvdata(&amp;dev-&gt;vdev, dev);</div><div class='del'>-	mutex_init(&amp;dev-&gt;lock);</div><div class='ctx'> 	dev-&gt;std = V4L2_STD_NTSC_M;</div><div class='ctx'> 	dev-&gt;height = 240;</div><div class='ctx'> 	dev-&gt;width = 320;</div><div class='del'>-	dev-&gt;depth = 15;</div><div class='del'>-	dev-&gt;brightness = 139;</div><div class='del'>-	dev-&gt;contrast = 70;</div><div class='del'>-	dev-&gt;hue = 0;</div><div class='del'>-	dev-&gt;saturation = 64;</div><div class='add'>+	dev-&gt;depth = 16;</div><div class='ctx'> 	pms_swsense(dev, 75);</div><div class='ctx'> 	pms_resolution(dev, 320, 240);</div><div class='ctx'> 	pms_videosource(dev, 0);</div><div class='ctx'> 	pms_vcrinput(dev, 0);</div><div class='del'>-	if (video_register_device(&amp;dev-&gt;vdev, VFL_TYPE_GRABBER, video_nr) &lt; 0) {</div><div class='del'>-		v4l2_device_unregister(&amp;dev-&gt;v4l2_dev);</div><div class='del'>-		release_region(dev-&gt;io, 3);</div><div class='del'>-		release_region(0x9a01, 1);</div><div class='del'>-		iounmap(dev-&gt;mem);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+	v4l2_ctrl_handler_setup(hdl);</div><div class='add'>+	res = video_register_device(&amp;dev-&gt;vdev, VFL_TYPE_GRABBER, video_nr);</div><div class='add'>+	if (res &gt;= 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+free_hdl:</div><div class='add'>+	v4l2_ctrl_handler_free(hdl);</div><div class='add'>+	v4l2_device_unregister(&amp;dev-&gt;v4l2_dev);</div><div class='add'>+free_io:</div><div class='add'>+	release_region(dev-&gt;io, 3);</div><div class='add'>+	release_region(0x9a01, 1);</div><div class='add'>+	iounmap(dev-&gt;mem);</div><div class='add'>+free_dev:</div><div class='add'>+	kfree(dev);</div><div class='add'>+	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __exit pms_exit(void)</div><div class='add'>+static int pms_remove(struct device *pdev, unsigned int card)</div><div class='ctx'> {</div><div class='del'>-	struct pms *dev = &amp;pms_card;</div><div class='add'>+	struct pms *dev = dev_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	video_unregister_device(&amp;dev-&gt;vdev);</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;dev-&gt;hdl);</div><div class='ctx'> 	release_region(dev-&gt;io, 3);</div><div class='ctx'> 	release_region(0x9a01, 1);</div><div class='ctx'> 	iounmap(dev-&gt;mem);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct isa_driver pms_driver = {</div><div class='add'>+	.probe		= pms_probe,</div><div class='add'>+	.remove		= pms_remove,</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "pms",</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init pms_init(void)</div><div class='add'>+{</div><div class='add'>+	return isa_register_driver(&amp;pms_driver, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit pms_exit(void)</div><div class='add'>+{</div><div class='add'>+	isa_unregister_driver(&amp;pms_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(pms_init);</div><div class='head'>diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h b/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h<br/>index 305e6aaa844a..036952f2a3cb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h</a></div><div class='hunk'>@@ -317,18 +317,16 @@ struct pvr2_hdw {</div><div class='ctx'> 	v4l2_std_id std_mask_eeprom; // Hardware supported selections</div><div class='ctx'> 	v4l2_std_id std_mask_avail;  // Which standards we may select from</div><div class='ctx'> 	v4l2_std_id std_mask_cur;    // Currently selected standard(s)</div><div class='del'>-	unsigned int std_enum_cnt;   // # of enumerated standards</div><div class='ctx'> 	int std_enum_cur;            // selected standard enumeration value</div><div class='ctx'> 	int std_dirty;               // True if std_mask_cur has changed</div><div class='ctx'> 	struct pvr2_ctl_info std_info_enum;</div><div class='ctx'> 	struct pvr2_ctl_info std_info_avail;</div><div class='ctx'> 	struct pvr2_ctl_info std_info_cur;</div><div class='del'>-	struct v4l2_standard *std_defs;</div><div class='del'>-	const char **std_enum_names;</div><div class='add'>+	struct pvr2_ctl_info std_info_detect;</div><div class='ctx'> </div><div class='ctx'> 	// Generated string names, one per actual V4L2 standard</div><div class='ctx'> 	const char *std_mask_ptrs[32];</div><div class='del'>-	char std_mask_names[32][10];</div><div class='add'>+	char std_mask_names[32][16];</div><div class='ctx'> </div><div class='ctx'> 	int unit_number;             /* ID for driver instance */</div><div class='ctx'> 	unsigned long serial_number; /* ID for hardware itself */</div><div class='head'>diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw.c b/drivers/media/video/pvrusb2/pvrusb2-hdw.c<br/>index ebc2c7e39233..fb828ba1dbbe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/pvrusb2/pvrusb2-hdw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/pvrusb2/pvrusb2-hdw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/pvrusb2/pvrusb2-hdw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pvrusb2/pvrusb2-hdw.c</a></div><div class='hunk'>@@ -334,8 +334,6 @@ static void pvr2_hdw_state_log_state(struct pvr2_hdw *);</div><div class='ctx'> static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl);</div><div class='ctx'> static int pvr2_hdw_commit_setup(struct pvr2_hdw *hdw);</div><div class='ctx'> static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw);</div><div class='del'>-static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw);</div><div class='del'>-static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw);</div><div class='ctx'> static void pvr2_hdw_quiescent_timeout(unsigned long);</div><div class='ctx'> static void pvr2_hdw_decoder_stabilization_timeout(unsigned long);</div><div class='ctx'> static void pvr2_hdw_encoder_wait_timeout(unsigned long);</div><div class='hunk'>@@ -346,7 +344,7 @@ static int pvr2_send_request_ex(struct pvr2_hdw *hdw,</div><div class='ctx'> 				void *write_data,unsigned int write_len,</div><div class='ctx'> 				void *read_data,unsigned int read_len);</div><div class='ctx'> static int pvr2_hdw_check_cropcap(struct pvr2_hdw *hdw);</div><div class='del'>-</div><div class='add'>+static v4l2_std_id pvr2_hdw_get_detected_std(struct pvr2_hdw *hdw);</div><div class='ctx'> </div><div class='ctx'> static void trace_stbit(const char *name,int val)</div><div class='ctx'> {</div><div class='hunk'>@@ -840,6 +838,12 @@ static int ctrl_hsm_get(struct pvr2_ctrl *cptr,int *vp)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ctrl_stddetect_get(struct pvr2_ctrl *cptr, int *vp)</div><div class='add'>+{</div><div class='add'>+	*vp = pvr2_hdw_get_detected_std(cptr-&gt;hdw);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ctrl_stdavail_get(struct pvr2_ctrl *cptr,int *vp)</div><div class='ctx'> {</div><div class='ctx'> 	*vp = cptr-&gt;hdw-&gt;std_mask_avail;</div><div class='hunk'>@@ -854,8 +858,7 @@ static int ctrl_stdavail_set(struct pvr2_ctrl *cptr,int m,int v)</div><div class='ctx'> 	ns = (ns &amp; ~m) | (v &amp; m);</div><div class='ctx'> 	if (ns == hdw-&gt;std_mask_avail) return 0;</div><div class='ctx'> 	hdw-&gt;std_mask_avail = ns;</div><div class='del'>-	pvr2_hdw_internal_set_std_avail(hdw);</div><div class='del'>-	pvr2_hdw_internal_find_stdenum(hdw);</div><div class='add'>+	hdw-&gt;std_info_cur.def.type_bitmask.valid_bits = hdw-&gt;std_mask_avail;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -895,7 +898,6 @@ static int ctrl_stdcur_set(struct pvr2_ctrl *cptr,int m,int v)</div><div class='ctx'> 	if (ns == hdw-&gt;std_mask_cur) return 0;</div><div class='ctx'> 	hdw-&gt;std_mask_cur = ns;</div><div class='ctx'> 	hdw-&gt;std_dirty = !0;</div><div class='del'>-	pvr2_hdw_internal_find_stdenum(hdw);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -941,40 +943,6 @@ static int ctrl_audio_modes_present_get(struct pvr2_ctrl *cptr,int *vp)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int ctrl_stdenumcur_set(struct pvr2_ctrl *cptr,int m,int v)</div><div class='del'>-{</div><div class='del'>-	struct pvr2_hdw *hdw = cptr-&gt;hdw;</div><div class='del'>-	if (v &lt; 0) return -EINVAL;</div><div class='del'>-	if (v &gt; hdw-&gt;std_enum_cnt) return -EINVAL;</div><div class='del'>-	hdw-&gt;std_enum_cur = v;</div><div class='del'>-	if (!v) return 0;</div><div class='del'>-	v--;</div><div class='del'>-	if (hdw-&gt;std_mask_cur == hdw-&gt;std_defs[v].id) return 0;</div><div class='del'>-	hdw-&gt;std_mask_cur = hdw-&gt;std_defs[v].id;</div><div class='del'>-	hdw-&gt;std_dirty = !0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int ctrl_stdenumcur_get(struct pvr2_ctrl *cptr,int *vp)</div><div class='del'>-{</div><div class='del'>-	*vp = cptr-&gt;hdw-&gt;std_enum_cur;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int ctrl_stdenumcur_is_dirty(struct pvr2_ctrl *cptr)</div><div class='del'>-{</div><div class='del'>-	return cptr-&gt;hdw-&gt;std_dirty != 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void ctrl_stdenumcur_clear_dirty(struct pvr2_ctrl *cptr)</div><div class='del'>-{</div><div class='del'>-	cptr-&gt;hdw-&gt;std_dirty = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> #define DEFINT(vmin,vmax) \</div><div class='ctx'> 	.type = pvr2_ctl_int, \</div><div class='ctx'> 	.def.type_int.min_value = vmin, \</div><div class='hunk'>@@ -1293,15 +1261,14 @@ static const struct pvr2_ctl_info control_defs[] = {</div><div class='ctx'> 		.sym_to_val = ctrl_std_sym_to_val,</div><div class='ctx'> 		.type = pvr2_ctl_bitmask,</div><div class='ctx'> 	},{</div><div class='del'>-		.desc = "Video Standard Name",</div><div class='del'>-		.name = "video_standard",</div><div class='del'>-		.internal_id = PVR2_CID_STDENUM,</div><div class='add'>+		.desc = "Video Standards Detected Mask",</div><div class='add'>+		.name = "video_standard_mask_detected",</div><div class='add'>+		.internal_id = PVR2_CID_STDDETECT,</div><div class='ctx'> 		.skip_init = !0,</div><div class='del'>-		.get_value = ctrl_stdenumcur_get,</div><div class='del'>-		.set_value = ctrl_stdenumcur_set,</div><div class='del'>-		.is_dirty = ctrl_stdenumcur_is_dirty,</div><div class='del'>-		.clear_dirty = ctrl_stdenumcur_clear_dirty,</div><div class='del'>-		.type = pvr2_ctl_enum,</div><div class='add'>+		.get_value = ctrl_stddetect_get,</div><div class='add'>+		.val_to_sym = ctrl_std_val_to_sym,</div><div class='add'>+		.sym_to_val = ctrl_std_sym_to_val,</div><div class='add'>+		.type = pvr2_ctl_bitmask,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1936,7 +1903,7 @@ static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)</div><div class='ctx'> 		hdw-&gt;std_mask_avail |= std2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pvr2_hdw_internal_set_std_avail(hdw);</div><div class='add'>+	hdw-&gt;std_info_cur.def.type_bitmask.valid_bits = hdw-&gt;std_mask_avail;</div><div class='ctx'> </div><div class='ctx'> 	if (std1) {</div><div class='ctx'> 		bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std1);</div><div class='hunk'>@@ -1945,7 +1912,6 @@ static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)</div><div class='ctx'> 			   bcnt,buf);</div><div class='ctx'> 		hdw-&gt;std_mask_cur = std1;</div><div class='ctx'> 		hdw-&gt;std_dirty = !0;</div><div class='del'>-		pvr2_hdw_internal_find_stdenum(hdw);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (std3) {</div><div class='hunk'>@@ -1955,7 +1921,6 @@ static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)</div><div class='ctx'> 			   " (determined by device type): %.*s",bcnt,buf);</div><div class='ctx'> 		hdw-&gt;std_mask_cur = std3;</div><div class='ctx'> 		hdw-&gt;std_dirty = !0;</div><div class='del'>-		pvr2_hdw_internal_find_stdenum(hdw);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1975,24 +1940,10 @@ static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)</div><div class='ctx'> 				   bcnt,buf);</div><div class='ctx'> 			hdw-&gt;std_mask_cur = std_eeprom_maps[idx].std;</div><div class='ctx'> 			hdw-&gt;std_dirty = !0;</div><div class='del'>-			pvr2_hdw_internal_find_stdenum(hdw);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (hdw-&gt;std_enum_cnt &gt; 1) {</div><div class='del'>-		// Autoselect the first listed standard</div><div class='del'>-		hdw-&gt;std_enum_cur = 1;</div><div class='del'>-		hdw-&gt;std_mask_cur = hdw-&gt;std_defs[hdw-&gt;std_enum_cur-1].id;</div><div class='del'>-		hdw-&gt;std_dirty = !0;</div><div class='del'>-		pvr2_trace(PVR2_TRACE_STD,</div><div class='del'>-			   "Initial video standard auto-selected to %s",</div><div class='del'>-			   hdw-&gt;std_defs[hdw-&gt;std_enum_cur-1].name);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pvr2_trace(PVR2_TRACE_ERROR_LEGS,</div><div class='del'>-		   "Unable to select a viable initial video standard");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -2594,14 +2545,6 @@ struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf,</div><div class='ctx'> 		cptr-&gt;info = ciptr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	// Initialize video standard enum dynamic control</div><div class='del'>-	cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDENUM);</div><div class='del'>-	if (cptr) {</div><div class='del'>-		memcpy(&amp;hdw-&gt;std_info_enum,cptr-&gt;info,</div><div class='del'>-		       sizeof(hdw-&gt;std_info_enum));</div><div class='del'>-		cptr-&gt;info = &amp;hdw-&gt;std_info_enum;</div><div class='del'>-</div><div class='del'>-	}</div><div class='ctx'> 	// Initialize control data regarding video standard masks</div><div class='ctx'> 	valid_std_mask = pvr2_std_get_usable();</div><div class='ctx'> 	for (idx = 0; idx &lt; 32; idx++) {</div><div class='hunk'>@@ -2629,7 +2572,17 @@ struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf,</div><div class='ctx'> 		cptr-&gt;info = &amp;hdw-&gt;std_info_cur;</div><div class='ctx'> 		hdw-&gt;std_info_cur.def.type_bitmask.bit_names =</div><div class='ctx'> 			hdw-&gt;std_mask_ptrs;</div><div class='del'>-		hdw-&gt;std_info_avail.def.type_bitmask.valid_bits =</div><div class='add'>+		hdw-&gt;std_info_cur.def.type_bitmask.valid_bits =</div><div class='add'>+			valid_std_mask;</div><div class='add'>+	}</div><div class='add'>+	cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDDETECT);</div><div class='add'>+	if (cptr) {</div><div class='add'>+		memcpy(&amp;hdw-&gt;std_info_detect,cptr-&gt;info,</div><div class='add'>+		       sizeof(hdw-&gt;std_info_detect));</div><div class='add'>+		cptr-&gt;info = &amp;hdw-&gt;std_info_detect;</div><div class='add'>+		hdw-&gt;std_info_detect.def.type_bitmask.bit_names =</div><div class='add'>+			hdw-&gt;std_mask_ptrs;</div><div class='add'>+		hdw-&gt;std_info_detect.def.type_bitmask.valid_bits =</div><div class='ctx'> 			valid_std_mask;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2711,8 +2664,6 @@ struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf,</div><div class='ctx'> 		kfree(hdw-&gt;ctl_write_buffer);</div><div class='ctx'> 		kfree(hdw-&gt;controls);</div><div class='ctx'> 		kfree(hdw-&gt;mpeg_ctrl_info);</div><div class='del'>-		kfree(hdw-&gt;std_defs);</div><div class='del'>-		kfree(hdw-&gt;std_enum_names);</div><div class='ctx'> 		kfree(hdw);</div><div class='ctx'> 	}</div><div class='ctx'> 	return NULL;</div><div class='hunk'>@@ -2788,8 +2739,6 @@ void pvr2_hdw_destroy(struct pvr2_hdw *hdw)</div><div class='ctx'> 	} while (0); mutex_unlock(&amp;pvr2_unit_mtx);</div><div class='ctx'> 	kfree(hdw-&gt;controls);</div><div class='ctx'> 	kfree(hdw-&gt;mpeg_ctrl_info);</div><div class='del'>-	kfree(hdw-&gt;std_defs);</div><div class='del'>-	kfree(hdw-&gt;std_enum_names);</div><div class='ctx'> 	kfree(hdw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2812,86 +2761,6 @@ void pvr2_hdw_disconnect(struct pvr2_hdw *hdw)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-// Attempt to autoselect an appropriate value for std_enum_cur given</div><div class='del'>-// whatever is currently in std_mask_cur</div><div class='del'>-static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw)</div><div class='del'>-{</div><div class='del'>-	unsigned int idx;</div><div class='del'>-	for (idx = 1; idx &lt; hdw-&gt;std_enum_cnt; idx++) {</div><div class='del'>-		if (hdw-&gt;std_defs[idx-1].id == hdw-&gt;std_mask_cur) {</div><div class='del'>-			hdw-&gt;std_enum_cur = idx;</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	hdw-&gt;std_enum_cur = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-// Calculate correct set of enumerated standards based on currently known</div><div class='del'>-// set of available standards bits.</div><div class='del'>-static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_standard *newstd;</div><div class='del'>-	unsigned int std_cnt;</div><div class='del'>-	unsigned int idx;</div><div class='del'>-</div><div class='del'>-	newstd = pvr2_std_create_enum(&amp;std_cnt,hdw-&gt;std_mask_avail);</div><div class='del'>-</div><div class='del'>-	if (hdw-&gt;std_defs) {</div><div class='del'>-		kfree(hdw-&gt;std_defs);</div><div class='del'>-		hdw-&gt;std_defs = NULL;</div><div class='del'>-	}</div><div class='del'>-	hdw-&gt;std_enum_cnt = 0;</div><div class='del'>-	if (hdw-&gt;std_enum_names) {</div><div class='del'>-		kfree(hdw-&gt;std_enum_names);</div><div class='del'>-		hdw-&gt;std_enum_names = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!std_cnt) {</div><div class='del'>-		pvr2_trace(</div><div class='del'>-			PVR2_TRACE_ERROR_LEGS,</div><div class='del'>-			"WARNING: Failed to identify any viable standards");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set up the dynamic control for this standard */</div><div class='del'>-	hdw-&gt;std_enum_names = kmalloc(sizeof(char *)*(std_cnt+1),GFP_KERNEL);</div><div class='del'>-	if (hdw-&gt;std_enum_names) {</div><div class='del'>-		hdw-&gt;std_enum_names[0] = "none";</div><div class='del'>-		for (idx = 0; idx &lt; std_cnt; idx++)</div><div class='del'>-			hdw-&gt;std_enum_names[idx+1] = newstd[idx].name;</div><div class='del'>-		hdw-&gt;std_info_enum.def.type_enum.value_names =</div><div class='del'>-						hdw-&gt;std_enum_names;</div><div class='del'>-		hdw-&gt;std_info_enum.def.type_enum.count = std_cnt+1;</div><div class='del'>-	} else {</div><div class='del'>-		pvr2_trace(</div><div class='del'>-			PVR2_TRACE_ERROR_LEGS,</div><div class='del'>-			"WARNING: Failed to alloc memory for names");</div><div class='del'>-		hdw-&gt;std_info_enum.def.type_enum.value_names = NULL;</div><div class='del'>-		hdw-&gt;std_info_enum.def.type_enum.count = 0;</div><div class='del'>-	}</div><div class='del'>-	hdw-&gt;std_defs = newstd;</div><div class='del'>-	hdw-&gt;std_enum_cnt = std_cnt+1;</div><div class='del'>-	hdw-&gt;std_enum_cur = 0;</div><div class='del'>-	hdw-&gt;std_info_cur.def.type_bitmask.valid_bits = hdw-&gt;std_mask_avail;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-int pvr2_hdw_get_stdenum_value(struct pvr2_hdw *hdw,</div><div class='del'>-			       struct v4l2_standard *std,</div><div class='del'>-			       unsigned int idx)</div><div class='del'>-{</div><div class='del'>-	int ret = -EINVAL;</div><div class='del'>-	if (!idx) return ret;</div><div class='del'>-	LOCK_TAKE(hdw-&gt;big_lock); do {</div><div class='del'>-		if (idx &gt;= hdw-&gt;std_enum_cnt) break;</div><div class='del'>-		idx--;</div><div class='del'>-		memcpy(std,hdw-&gt;std_defs+idx,sizeof(*std));</div><div class='del'>-		ret = 0;</div><div class='del'>-	} while (0); LOCK_GIVE(hdw-&gt;big_lock);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /* Get the number of defined controls */</div><div class='ctx'> unsigned int pvr2_hdw_get_ctrl_count(struct pvr2_hdw *hdw)</div><div class='ctx'> {</div><div class='hunk'>@@ -2995,11 +2864,13 @@ static void pvr2_subdev_set_control(struct pvr2_hdw *hdw, int id,</div><div class='ctx'> 		pvr2_subdev_set_control(hdw, id, #lab, (hdw)-&gt;lab##_val); \</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-int pvr2_hdw_get_detected_std(struct pvr2_hdw *hdw, v4l2_std_id *std)</div><div class='add'>+v4l2_std_id pvr2_hdw_get_detected_std(struct pvr2_hdw *hdw)</div><div class='ctx'> {</div><div class='add'>+	v4l2_std_id std;</div><div class='add'>+	std = (v4l2_std_id)hdw-&gt;std_mask_avail;</div><div class='ctx'> 	v4l2_device_call_all(&amp;hdw-&gt;v4l2_dev, 0,</div><div class='del'>-			     video, querystd, std);</div><div class='del'>-	return 0;</div><div class='add'>+			     video, querystd, &amp;std);</div><div class='add'>+	return std;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Execute whatever commands are required to update the state of all the</div><div class='head'>diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw.h b/drivers/media/video/pvrusb2/pvrusb2-hdw.h<br/>index 66546580b17d..8060fc666eeb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/pvrusb2/pvrusb2-hdw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/pvrusb2/pvrusb2-hdw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/pvrusb2/pvrusb2-hdw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pvrusb2/pvrusb2-hdw.h</a></div><div class='hunk'>@@ -28,7 +28,6 @@</div><div class='ctx'> </div><div class='ctx'> /* Private internal control ids, look these up with</div><div class='ctx'>    pvr2_hdw_get_ctrl_by_id() - these are NOT visible in V4L */</div><div class='del'>-#define PVR2_CID_STDENUM 1</div><div class='ctx'> #define PVR2_CID_STDCUR 2</div><div class='ctx'> #define PVR2_CID_STDAVAIL 3</div><div class='ctx'> #define PVR2_CID_INPUT 4</div><div class='hunk'>@@ -46,6 +45,7 @@</div><div class='ctx'> #define PVR2_CID_CROPCAPBT 16</div><div class='ctx'> #define PVR2_CID_CROPCAPBW 17</div><div class='ctx'> #define PVR2_CID_CROPCAPBH 18</div><div class='add'>+#define PVR2_CID_STDDETECT 19</div><div class='ctx'> </div><div class='ctx'> /* Legal values for the INPUT state variable */</div><div class='ctx'> #define PVR2_CVAL_INPUT_TV 0</div><div class='hunk'>@@ -210,13 +210,6 @@ int pvr2_hdw_set_stream_type(struct pvr2_hdw *, enum pvr2_config);</div><div class='ctx'> /* Get handle to video output stream */</div><div class='ctx'> struct pvr2_stream *pvr2_hdw_get_video_stream(struct pvr2_hdw *);</div><div class='ctx'> </div><div class='del'>-/* Emit a video standard struct */</div><div class='del'>-int pvr2_hdw_get_stdenum_value(struct pvr2_hdw *hdw,struct v4l2_standard *std,</div><div class='del'>-			       unsigned int idx);</div><div class='del'>-</div><div class='del'>-/* Get the detected video standard */</div><div class='del'>-int pvr2_hdw_get_detected_std(struct pvr2_hdw *hdw, v4l2_std_id *std);</div><div class='del'>-</div><div class='ctx'> /* Enable / disable retrieval of CPU firmware or prom contents.  This must</div><div class='ctx'>    be enabled before pvr2_hdw_cpufw_get() will function.  Note that doing</div><div class='ctx'>    this may prevent the device from running (and leaving this mode may</div><div class='head'>diff --git a/drivers/media/video/pvrusb2/pvrusb2-v4l2.c b/drivers/media/video/pvrusb2/pvrusb2-v4l2.c<br/>index e1111d968a3d..7bddfaeeafc3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/pvrusb2/pvrusb2-v4l2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/pvrusb2/pvrusb2-v4l2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/pvrusb2/pvrusb2-v4l2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pvrusb2/pvrusb2-v4l2.c</a></div><div class='hunk'>@@ -107,7 +107,6 @@ static struct v4l2_fmtdesc pvr_fmtdesc [] = {</div><div class='ctx'> 		// This should really be V4L2_PIX_FMT_MPEG, but xawtv</div><div class='ctx'> 		// breaks when I do that.</div><div class='ctx'> 		.pixelformat    = 0, // V4L2_PIX_FMT_MPEG,</div><div class='del'>-		.reserved       = { 0, 0, 0, 0 }</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -145,740 +144,739 @@ static struct v4l2_format pvr_format [] = {</div><div class='ctx'> 				.start = { 0, 0 },</div><div class='ctx'> 				.count = { 0, 0 },</div><div class='ctx'> 				.flags = 0,</div><div class='del'>-				.reserved = { 0, 0 }</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> /*</div><div class='del'>- * pvr_ioctl()</div><div class='del'>- *</div><div class='del'>- * This is part of Video 4 Linux API. The procedure handles ioctl() calls.</div><div class='del'>- *</div><div class='add'>+ * This is part of Video 4 Linux API. These procedures handle ioctl() calls.</div><div class='ctx'>  */</div><div class='del'>-static long pvr2_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)</div><div class='add'>+static int pvr2_querycap(struct file *file, void *priv, struct v4l2_capability *cap)</div><div class='ctx'> {</div><div class='ctx'> 	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='del'>-	struct pvr2_v4l2 *vp = fh-&gt;vhead;</div><div class='del'>-	struct pvr2_v4l2_dev *pdi = fh-&gt;pdi;</div><div class='ctx'> 	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='del'>-	long ret = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (pvrusb2_debug &amp; PVR2_TRACE_V4LIOCTL) {</div><div class='del'>-		v4l_print_ioctl(pvr2_hdw_get_driver_name(hdw),cmd);</div><div class='del'>-	}</div><div class='add'>+	memcpy(cap, &amp;pvr_capability, sizeof(struct v4l2_capability));</div><div class='add'>+	strlcpy(cap-&gt;bus_info, pvr2_hdw_get_bus_info(hdw),</div><div class='add'>+			sizeof(cap-&gt;bus_info));</div><div class='add'>+	strlcpy(cap-&gt;card, pvr2_hdw_get_desc(hdw), sizeof(cap-&gt;card));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (!pvr2_hdw_dev_ok(hdw)) {</div><div class='del'>-		pvr2_trace(PVR2_TRACE_ERROR_LEGS,</div><div class='del'>-			   "ioctl failed - bad or no context");</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	}</div><div class='add'>+static int pvr2_g_priority(struct file *file, void *priv, enum v4l2_priority *p)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_v4l2 *vp = fh-&gt;vhead;</div><div class='ctx'> </div><div class='del'>-	/* check priority */</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case VIDIOC_S_CTRL:</div><div class='del'>-	case VIDIOC_S_STD:</div><div class='del'>-	case VIDIOC_S_INPUT:</div><div class='del'>-	case VIDIOC_S_TUNER:</div><div class='del'>-	case VIDIOC_S_FREQUENCY:</div><div class='del'>-		ret = v4l2_prio_check(&amp;vp-&gt;prio, fh-&gt;prio);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='add'>+	*p = v4l2_prio_max(&amp;vp-&gt;prio);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case VIDIOC_QUERYCAP:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_capability *cap = arg;</div><div class='add'>+static int pvr2_s_priority(struct file *file, void *priv, enum v4l2_priority prio)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_v4l2 *vp = fh-&gt;vhead;</div><div class='ctx'> </div><div class='del'>-		memcpy(cap, &amp;pvr_capability, sizeof(struct v4l2_capability));</div><div class='del'>-		strlcpy(cap-&gt;bus_info,pvr2_hdw_get_bus_info(hdw),</div><div class='del'>-			sizeof(cap-&gt;bus_info));</div><div class='del'>-		strlcpy(cap-&gt;card,pvr2_hdw_get_desc(hdw),sizeof(cap-&gt;card));</div><div class='add'>+	return v4l2_prio_change(&amp;vp-&gt;prio, &amp;fh-&gt;prio, prio);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+static int pvr2_g_std(struct file *file, void *priv, v4l2_std_id *std)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	int val = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_G_PRIORITY:</div><div class='del'>-	{</div><div class='del'>-		enum v4l2_priority *p = arg;</div><div class='add'>+	ret = pvr2_ctrl_get_value(</div><div class='add'>+			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_STDCUR), &amp;val);</div><div class='add'>+	*std = val;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		*p = v4l2_prio_max(&amp;vp-&gt;prio);</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+int pvr2_s_std(struct file *file, void *priv, v4l2_std_id *std)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_S_PRIORITY:</div><div class='del'>-	{</div><div class='del'>-		enum v4l2_priority *prio = arg;</div><div class='add'>+	return pvr2_ctrl_set_value(</div><div class='add'>+		pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_STDCUR), *std);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		ret = v4l2_prio_change(&amp;vp-&gt;prio, &amp;fh-&gt;prio, *prio);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+static int pvr2_querystd(struct file *file, void *priv, v4l2_std_id *std)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	int val = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_ENUMSTD:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_standard *vs = (struct v4l2_standard *)arg;</div><div class='del'>-		int idx = vs-&gt;index;</div><div class='del'>-		ret = pvr2_hdw_get_stdenum_value(hdw,vs,idx+1);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	ret = pvr2_ctrl_get_value(</div><div class='add'>+		pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_STDDETECT), &amp;val);</div><div class='add'>+	*std = val;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_QUERYSTD:</div><div class='del'>-	{</div><div class='del'>-		v4l2_std_id *std = arg;</div><div class='del'>-		*std = V4L2_STD_ALL;</div><div class='del'>-		ret = pvr2_hdw_get_detected_std(hdw, std);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+static int pvr2_enum_input(struct file *file, void *priv, struct v4l2_input *vi)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	struct pvr2_ctrl *cptr;</div><div class='add'>+	struct v4l2_input tmp;</div><div class='add'>+	unsigned int cnt;</div><div class='add'>+	int val;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_G_STD:</div><div class='del'>-	{</div><div class='del'>-		int val = 0;</div><div class='del'>-		ret = pvr2_ctrl_get_value(</div><div class='del'>-			pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDCUR),&amp;val);</div><div class='del'>-		*(v4l2_std_id *)arg = val;</div><div class='add'>+	cptr = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_INPUT);</div><div class='add'>+</div><div class='add'>+	memset(&amp;tmp, 0, sizeof(tmp));</div><div class='add'>+	tmp.index = vi-&gt;index;</div><div class='add'>+	ret = 0;</div><div class='add'>+	if (vi-&gt;index &gt;= fh-&gt;input_cnt)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	val = fh-&gt;input_map[vi-&gt;index];</div><div class='add'>+	switch (val) {</div><div class='add'>+	case PVR2_CVAL_INPUT_TV:</div><div class='add'>+	case PVR2_CVAL_INPUT_DTV:</div><div class='add'>+	case PVR2_CVAL_INPUT_RADIO:</div><div class='add'>+		tmp.type = V4L2_INPUT_TYPE_TUNER;</div><div class='ctx'> 		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	case VIDIOC_S_STD:</div><div class='del'>-	{</div><div class='del'>-		ret = pvr2_ctrl_set_value(</div><div class='del'>-			pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDCUR),</div><div class='del'>-			*(v4l2_std_id *)arg);</div><div class='add'>+	case PVR2_CVAL_INPUT_SVIDEO:</div><div class='add'>+	case PVR2_CVAL_INPUT_COMPOSITE:</div><div class='add'>+		tmp.type = V4L2_INPUT_TYPE_CAMERA;</div><div class='ctx'> 		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_ENUMINPUT:</div><div class='del'>-	{</div><div class='del'>-		struct pvr2_ctrl *cptr;</div><div class='del'>-		struct v4l2_input *vi = (struct v4l2_input *)arg;</div><div class='del'>-		struct v4l2_input tmp;</div><div class='del'>-		unsigned int cnt;</div><div class='del'>-		int val;</div><div class='add'>+	cnt = 0;</div><div class='add'>+	pvr2_ctrl_get_valname(cptr, val,</div><div class='add'>+			tmp.name, sizeof(tmp.name) - 1, &amp;cnt);</div><div class='add'>+	tmp.name[cnt] = 0;</div><div class='ctx'> </div><div class='del'>-		cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_INPUT);</div><div class='add'>+	/* Don't bother with audioset, since this driver currently</div><div class='add'>+	   always switches the audio whenever the video is</div><div class='add'>+	   switched. */</div><div class='ctx'> </div><div class='del'>-		memset(&amp;tmp,0,sizeof(tmp));</div><div class='del'>-		tmp.index = vi-&gt;index;</div><div class='del'>-		ret = 0;</div><div class='del'>-		if (vi-&gt;index &gt;= fh-&gt;input_cnt) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		val = fh-&gt;input_map[vi-&gt;index];</div><div class='del'>-		switch (val) {</div><div class='del'>-		case PVR2_CVAL_INPUT_TV:</div><div class='del'>-		case PVR2_CVAL_INPUT_DTV:</div><div class='del'>-		case PVR2_CVAL_INPUT_RADIO:</div><div class='del'>-			tmp.type = V4L2_INPUT_TYPE_TUNER;</div><div class='del'>-			break;</div><div class='del'>-		case PVR2_CVAL_INPUT_SVIDEO:</div><div class='del'>-		case PVR2_CVAL_INPUT_COMPOSITE:</div><div class='del'>-			tmp.type = V4L2_INPUT_TYPE_CAMERA;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (ret &lt; 0) break;</div><div class='del'>-</div><div class='del'>-		cnt = 0;</div><div class='del'>-		pvr2_ctrl_get_valname(cptr,val,</div><div class='del'>-				      tmp.name,sizeof(tmp.name)-1,&amp;cnt);</div><div class='del'>-		tmp.name[cnt] = 0;</div><div class='del'>-</div><div class='del'>-		/* Don't bother with audioset, since this driver currently</div><div class='del'>-		   always switches the audio whenever the video is</div><div class='del'>-		   switched. */</div><div class='del'>-</div><div class='del'>-		/* Handling std is a tougher problem.  It doesn't make</div><div class='del'>-		   sense in cases where a device might be multi-standard.</div><div class='del'>-		   We could just copy out the current value for the</div><div class='del'>-		   standard, but it can change over time.  For now just</div><div class='del'>-		   leave it zero. */</div><div class='del'>-</div><div class='del'>-		memcpy(vi, &amp;tmp, sizeof(tmp));</div><div class='del'>-</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	/* Handling std is a tougher problem.  It doesn't make</div><div class='add'>+	   sense in cases where a device might be multi-standard.</div><div class='add'>+	   We could just copy out the current value for the</div><div class='add'>+	   standard, but it can change over time.  For now just</div><div class='add'>+	   leave it zero. */</div><div class='add'>+	*vi = tmp;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_G_INPUT:</div><div class='del'>-	{</div><div class='del'>-		unsigned int idx;</div><div class='del'>-		struct pvr2_ctrl *cptr;</div><div class='del'>-		struct v4l2_input *vi = (struct v4l2_input *)arg;</div><div class='del'>-		int val;</div><div class='del'>-		cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_INPUT);</div><div class='del'>-		val = 0;</div><div class='del'>-		ret = pvr2_ctrl_get_value(cptr,&amp;val);</div><div class='del'>-		vi-&gt;index = 0;</div><div class='del'>-		for (idx = 0; idx &lt; fh-&gt;input_cnt; idx++) {</div><div class='del'>-			if (fh-&gt;input_map[idx] == val) {</div><div class='del'>-				vi-&gt;index = idx;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+static int pvr2_g_input(struct file *file, void *priv, unsigned int *i)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	unsigned int idx;</div><div class='add'>+	struct pvr2_ctrl *cptr;</div><div class='add'>+	int val;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_S_INPUT:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_input *vi = (struct v4l2_input *)arg;</div><div class='del'>-		if (vi-&gt;index &gt;= fh-&gt;input_cnt) {</div><div class='del'>-			ret = -ERANGE;</div><div class='add'>+	cptr = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_INPUT);</div><div class='add'>+	val = 0;</div><div class='add'>+	ret = pvr2_ctrl_get_value(cptr, &amp;val);</div><div class='add'>+	*i = 0;</div><div class='add'>+	for (idx = 0; idx &lt; fh-&gt;input_cnt; idx++) {</div><div class='add'>+		if (fh-&gt;input_map[idx] == val) {</div><div class='add'>+			*i = idx;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		ret = pvr2_ctrl_set_value(</div><div class='del'>-			pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_INPUT),</div><div class='del'>-			fh-&gt;input_map[vi-&gt;index]);</div><div class='del'>-		break;</div><div class='ctx'> 	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_ENUMAUDIO:</div><div class='del'>-	{</div><div class='del'>-		/* pkt: FIXME: We are returning one "fake" input here</div><div class='del'>-		   which could very well be called "whatever_we_like".</div><div class='del'>-		   This is for apps that want to see an audio input</div><div class='del'>-		   just to feel comfortable, as well as to test if</div><div class='del'>-		   it can do stereo or sth. There is actually no guarantee</div><div class='del'>-		   that the actual audio input cannot change behind the app's</div><div class='del'>-		   back, but most applications should not mind that either.</div><div class='del'>-</div><div class='del'>-		   Hopefully, mplayer people will work with us on this (this</div><div class='del'>-		   whole mess is to support mplayer pvr://), or Hans will come</div><div class='del'>-		   up with a more standard way to say "we have inputs but we</div><div class='del'>-		   don 't want you to change them independent of video" which</div><div class='del'>-		   will sort this mess.</div><div class='del'>-		 */</div><div class='del'>-		struct v4l2_audio *vin = arg;</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		if (vin-&gt;index &gt; 0) break;</div><div class='del'>-		strncpy(vin-&gt;name, "PVRUSB2 Audio",14);</div><div class='del'>-		vin-&gt;capability = V4L2_AUDCAP_STEREO;</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+static int pvr2_s_input(struct file *file, void *priv, unsigned int inp)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_G_AUDIO:</div><div class='del'>-	{</div><div class='del'>-		/* pkt: FIXME: see above comment (VIDIOC_ENUMAUDIO) */</div><div class='del'>-		struct v4l2_audio *vin = arg;</div><div class='del'>-		memset(vin,0,sizeof(*vin));</div><div class='del'>-		vin-&gt;index = 0;</div><div class='del'>-		strncpy(vin-&gt;name, "PVRUSB2 Audio",14);</div><div class='del'>-		vin-&gt;capability = V4L2_AUDCAP_STEREO;</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	if (inp &gt;= fh-&gt;input_cnt)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return pvr2_ctrl_set_value(</div><div class='add'>+			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_INPUT),</div><div class='add'>+			fh-&gt;input_map[inp]);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_G_TUNER:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_tuner *vt = (struct v4l2_tuner *)arg;</div><div class='add'>+static int pvr2_enumaudio(struct file *file, void *priv, struct v4l2_audio *vin)</div><div class='add'>+{</div><div class='add'>+	/* pkt: FIXME: We are returning one "fake" input here</div><div class='add'>+	   which could very well be called "whatever_we_like".</div><div class='add'>+	   This is for apps that want to see an audio input</div><div class='add'>+	   just to feel comfortable, as well as to test if</div><div class='add'>+	   it can do stereo or sth. There is actually no guarantee</div><div class='add'>+	   that the actual audio input cannot change behind the app's</div><div class='add'>+	   back, but most applications should not mind that either.</div><div class='add'>+</div><div class='add'>+	   Hopefully, mplayer people will work with us on this (this</div><div class='add'>+	   whole mess is to support mplayer pvr://), or Hans will come</div><div class='add'>+	   up with a more standard way to say "we have inputs but we</div><div class='add'>+	   don 't want you to change them independent of video" which</div><div class='add'>+	   will sort this mess.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (vin-&gt;index &gt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	strncpy(vin-&gt;name, "PVRUSB2 Audio", 14);</div><div class='add'>+	vin-&gt;capability = V4L2_AUDCAP_STEREO;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (vt-&gt;index != 0) break; /* Only answer for the 1st tuner */</div><div class='add'>+static int pvr2_g_audio(struct file *file, void *priv, struct v4l2_audio *vin)</div><div class='add'>+{</div><div class='add'>+	/* pkt: FIXME: see above comment (VIDIOC_ENUMAUDIO) */</div><div class='add'>+	vin-&gt;index = 0;</div><div class='add'>+	strncpy(vin-&gt;name, "PVRUSB2 Audio", 14);</div><div class='add'>+	vin-&gt;capability = V4L2_AUDCAP_STEREO;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		pvr2_hdw_execute_tuner_poll(hdw);</div><div class='del'>-		ret = pvr2_hdw_get_tuner_status(hdw,vt);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+static int pvr2_s_audio(struct file *file, void *priv, struct v4l2_audio *vout)</div><div class='add'>+{</div><div class='add'>+	if (vout-&gt;index)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_S_TUNER:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_tuner *vt=(struct v4l2_tuner *)arg;</div><div class='add'>+static int pvr2_g_tuner(struct file *file, void *priv, struct v4l2_tuner *vt)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='ctx'> </div><div class='del'>-		if (vt-&gt;index != 0)</div><div class='del'>-			break;</div><div class='add'>+	if (vt-&gt;index != 0)</div><div class='add'>+		return -EINVAL; /* Only answer for the 1st tuner */</div><div class='ctx'> </div><div class='del'>-		ret = pvr2_ctrl_set_value(</div><div class='del'>-			pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_AUDIOMODE),</div><div class='add'>+	pvr2_hdw_execute_tuner_poll(hdw);</div><div class='add'>+	return pvr2_hdw_get_tuner_status(hdw, vt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pvr2_s_tuner(struct file *file, void *priv, struct v4l2_tuner *vt)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+</div><div class='add'>+	if (vt-&gt;index != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return pvr2_ctrl_set_value(</div><div class='add'>+			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_AUDIOMODE),</div><div class='ctx'> 			vt-&gt;audmode);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_S_FREQUENCY:</div><div class='del'>-	{</div><div class='del'>-		const struct v4l2_frequency *vf = (struct v4l2_frequency *)arg;</div><div class='del'>-		unsigned long fv;</div><div class='del'>-		struct v4l2_tuner vt;</div><div class='del'>-		int cur_input;</div><div class='del'>-		struct pvr2_ctrl *ctrlp;</div><div class='del'>-		ret = pvr2_hdw_get_tuner_status(hdw,&amp;vt);</div><div class='del'>-		if (ret != 0) break;</div><div class='del'>-		ctrlp = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_INPUT);</div><div class='del'>-		ret = pvr2_ctrl_get_value(ctrlp,&amp;cur_input);</div><div class='del'>-		if (ret != 0) break;</div><div class='del'>-		if (vf-&gt;type == V4L2_TUNER_RADIO) {</div><div class='del'>-			if (cur_input != PVR2_CVAL_INPUT_RADIO) {</div><div class='del'>-				pvr2_ctrl_set_value(ctrlp,</div><div class='del'>-						    PVR2_CVAL_INPUT_RADIO);</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			if (cur_input == PVR2_CVAL_INPUT_RADIO) {</div><div class='del'>-				pvr2_ctrl_set_value(ctrlp,</div><div class='del'>-						    PVR2_CVAL_INPUT_TV);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		fv = vf-&gt;frequency;</div><div class='del'>-		if (vt.capability &amp; V4L2_TUNER_CAP_LOW) {</div><div class='del'>-			fv = (fv * 125) / 2;</div><div class='del'>-		} else {</div><div class='del'>-			fv = fv * 62500;</div><div class='del'>-		}</div><div class='del'>-		ret = pvr2_ctrl_set_value(</div><div class='add'>+int pvr2_s_frequency(struct file *file, void *priv, struct v4l2_frequency *vf)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	unsigned long fv;</div><div class='add'>+	struct v4l2_tuner vt;</div><div class='add'>+	int cur_input;</div><div class='add'>+	struct pvr2_ctrl *ctrlp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pvr2_hdw_get_tuner_status(hdw, &amp;vt);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+	ctrlp = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_INPUT);</div><div class='add'>+	ret = pvr2_ctrl_get_value(ctrlp, &amp;cur_input);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+	if (vf-&gt;type == V4L2_TUNER_RADIO) {</div><div class='add'>+		if (cur_input != PVR2_CVAL_INPUT_RADIO)</div><div class='add'>+			pvr2_ctrl_set_value(ctrlp, PVR2_CVAL_INPUT_RADIO);</div><div class='add'>+	} else {</div><div class='add'>+		if (cur_input == PVR2_CVAL_INPUT_RADIO)</div><div class='add'>+			pvr2_ctrl_set_value(ctrlp, PVR2_CVAL_INPUT_TV);</div><div class='add'>+	}</div><div class='add'>+	fv = vf-&gt;frequency;</div><div class='add'>+	if (vt.capability &amp; V4L2_TUNER_CAP_LOW)</div><div class='add'>+		fv = (fv * 125) / 2;</div><div class='add'>+	else</div><div class='add'>+		fv = fv * 62500;</div><div class='add'>+	return pvr2_ctrl_set_value(</div><div class='ctx'> 			pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_FREQUENCY),fv);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_G_FREQUENCY:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_frequency *vf = (struct v4l2_frequency *)arg;</div><div class='del'>-		int val = 0;</div><div class='del'>-		int cur_input;</div><div class='del'>-		struct v4l2_tuner vt;</div><div class='del'>-		ret = pvr2_hdw_get_tuner_status(hdw,&amp;vt);</div><div class='del'>-		if (ret != 0) break;</div><div class='del'>-		ret = pvr2_ctrl_get_value(</div><div class='del'>-			pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_FREQUENCY),</div><div class='add'>+static int pvr2_g_frequency(struct file *file, void *priv, struct v4l2_frequency *vf)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	int val = 0;</div><div class='add'>+	int cur_input;</div><div class='add'>+	struct v4l2_tuner vt;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pvr2_hdw_get_tuner_status(hdw, &amp;vt);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = pvr2_ctrl_get_value(</div><div class='add'>+			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_FREQUENCY),</div><div class='ctx'> 			&amp;val);</div><div class='del'>-		if (ret != 0) break;</div><div class='del'>-		pvr2_ctrl_get_value(</div><div class='del'>-			pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_INPUT),</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+	pvr2_ctrl_get_value(</div><div class='add'>+			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_INPUT),</div><div class='ctx'> 			&amp;cur_input);</div><div class='del'>-		if (cur_input == PVR2_CVAL_INPUT_RADIO) {</div><div class='del'>-			vf-&gt;type = V4L2_TUNER_RADIO;</div><div class='del'>-		} else {</div><div class='del'>-			vf-&gt;type = V4L2_TUNER_ANALOG_TV;</div><div class='del'>-		}</div><div class='del'>-		if (vt.capability &amp; V4L2_TUNER_CAP_LOW) {</div><div class='del'>-			val = (val * 2) / 125;</div><div class='del'>-		} else {</div><div class='del'>-			val /= 62500;</div><div class='del'>-		}</div><div class='del'>-		vf-&gt;frequency = val;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	if (cur_input == PVR2_CVAL_INPUT_RADIO)</div><div class='add'>+		vf-&gt;type = V4L2_TUNER_RADIO;</div><div class='add'>+	else</div><div class='add'>+		vf-&gt;type = V4L2_TUNER_ANALOG_TV;</div><div class='add'>+	if (vt.capability &amp; V4L2_TUNER_CAP_LOW)</div><div class='add'>+		val = (val * 2) / 125;</div><div class='add'>+	else</div><div class='add'>+		val /= 62500;</div><div class='add'>+	vf-&gt;frequency = val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_ENUM_FMT:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_fmtdesc *fd = (struct v4l2_fmtdesc *)arg;</div><div class='add'>+static int pvr2_enum_fmt_vid_cap(struct file *file, void *priv, struct v4l2_fmtdesc *fd)</div><div class='add'>+{</div><div class='add'>+	/* Only one format is supported : mpeg.*/</div><div class='add'>+	if (fd-&gt;index != 0)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		/* Only one format is supported : mpeg.*/</div><div class='del'>-		if (fd-&gt;index != 0)</div><div class='del'>-			break;</div><div class='add'>+	memcpy(fd, pvr_fmtdesc, sizeof(struct v4l2_fmtdesc));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		memcpy(fd, pvr_fmtdesc, sizeof(struct v4l2_fmtdesc));</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+static int pvr2_g_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *vf)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	int val;</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_G_FMT:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_format *vf = (struct v4l2_format *)arg;</div><div class='del'>-		int val;</div><div class='del'>-		switch(vf-&gt;type) {</div><div class='del'>-		case V4L2_BUF_TYPE_VIDEO_CAPTURE:</div><div class='del'>-			memcpy(vf, &amp;pvr_format[PVR_FORMAT_PIX],</div><div class='del'>-			       sizeof(struct v4l2_format));</div><div class='del'>-			val = 0;</div><div class='del'>-			pvr2_ctrl_get_value(</div><div class='del'>-				pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_HRES),</div><div class='del'>-				&amp;val);</div><div class='del'>-			vf-&gt;fmt.pix.width = val;</div><div class='del'>-			val = 0;</div><div class='del'>-			pvr2_ctrl_get_value(</div><div class='del'>-				pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_VRES),</div><div class='del'>-				&amp;val);</div><div class='del'>-			vf-&gt;fmt.pix.height = val;</div><div class='del'>-			ret = 0;</div><div class='del'>-			break;</div><div class='del'>-		case V4L2_BUF_TYPE_VBI_CAPTURE:</div><div class='del'>-			// ????? Still need to figure out to do VBI correctly</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	memcpy(vf, &amp;pvr_format[PVR_FORMAT_PIX], sizeof(struct v4l2_format));</div><div class='add'>+	val = 0;</div><div class='add'>+	pvr2_ctrl_get_value(</div><div class='add'>+			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_HRES),</div><div class='add'>+			&amp;val);</div><div class='add'>+	vf-&gt;fmt.pix.width = val;</div><div class='add'>+	val = 0;</div><div class='add'>+	pvr2_ctrl_get_value(</div><div class='add'>+			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_VRES),</div><div class='add'>+			&amp;val);</div><div class='add'>+	vf-&gt;fmt.pix.height = val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_TRY_FMT:</div><div class='del'>-	case VIDIOC_S_FMT:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_format *vf = (struct v4l2_format *)arg;</div><div class='del'>-</div><div class='del'>-		ret = 0;</div><div class='del'>-		switch(vf-&gt;type) {</div><div class='del'>-		case V4L2_BUF_TYPE_VIDEO_CAPTURE: {</div><div class='del'>-			int lmin,lmax,ldef;</div><div class='del'>-			struct pvr2_ctrl *hcp,*vcp;</div><div class='del'>-			int h = vf-&gt;fmt.pix.height;</div><div class='del'>-			int w = vf-&gt;fmt.pix.width;</div><div class='del'>-			hcp = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_HRES);</div><div class='del'>-			vcp = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_VRES);</div><div class='del'>-</div><div class='del'>-			lmin = pvr2_ctrl_get_min(hcp);</div><div class='del'>-			lmax = pvr2_ctrl_get_max(hcp);</div><div class='del'>-			pvr2_ctrl_get_def(hcp, &amp;ldef);</div><div class='del'>-			if (w == -1) {</div><div class='del'>-				w = ldef;</div><div class='del'>-			} else if (w &lt; lmin) {</div><div class='del'>-				w = lmin;</div><div class='del'>-			} else if (w &gt; lmax) {</div><div class='del'>-				w = lmax;</div><div class='del'>-			}</div><div class='del'>-			lmin = pvr2_ctrl_get_min(vcp);</div><div class='del'>-			lmax = pvr2_ctrl_get_max(vcp);</div><div class='del'>-			pvr2_ctrl_get_def(vcp, &amp;ldef);</div><div class='del'>-			if (h == -1) {</div><div class='del'>-				h = ldef;</div><div class='del'>-			} else if (h &lt; lmin) {</div><div class='del'>-				h = lmin;</div><div class='del'>-			} else if (h &gt; lmax) {</div><div class='del'>-				h = lmax;</div><div class='del'>-			}</div><div class='add'>+static int pvr2_try_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *vf)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	int lmin, lmax, ldef;</div><div class='add'>+	struct pvr2_ctrl *hcp, *vcp;</div><div class='add'>+	int h = vf-&gt;fmt.pix.height;</div><div class='add'>+	int w = vf-&gt;fmt.pix.width;</div><div class='add'>+</div><div class='add'>+	hcp = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_HRES);</div><div class='add'>+	vcp = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_VRES);</div><div class='add'>+</div><div class='add'>+	lmin = pvr2_ctrl_get_min(hcp);</div><div class='add'>+	lmax = pvr2_ctrl_get_max(hcp);</div><div class='add'>+	pvr2_ctrl_get_def(hcp, &amp;ldef);</div><div class='add'>+	if (w == -1)</div><div class='add'>+		w = ldef;</div><div class='add'>+	else if (w &lt; lmin)</div><div class='add'>+		w = lmin;</div><div class='add'>+	else if (w &gt; lmax)</div><div class='add'>+		w = lmax;</div><div class='add'>+	lmin = pvr2_ctrl_get_min(vcp);</div><div class='add'>+	lmax = pvr2_ctrl_get_max(vcp);</div><div class='add'>+	pvr2_ctrl_get_def(vcp, &amp;ldef);</div><div class='add'>+	if (h == -1)</div><div class='add'>+		h = ldef;</div><div class='add'>+	else if (h &lt; lmin)</div><div class='add'>+		h = lmin;</div><div class='add'>+	else if (h &gt; lmax)</div><div class='add'>+		h = lmax;</div><div class='add'>+</div><div class='add'>+	memcpy(vf, &amp;pvr_format[PVR_FORMAT_PIX],</div><div class='add'>+			sizeof(struct v4l2_format));</div><div class='add'>+	vf-&gt;fmt.pix.width = w;</div><div class='add'>+	vf-&gt;fmt.pix.height = h;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			memcpy(vf, &amp;pvr_format[PVR_FORMAT_PIX],</div><div class='del'>-			       sizeof(struct v4l2_format));</div><div class='del'>-			vf-&gt;fmt.pix.width = w;</div><div class='del'>-			vf-&gt;fmt.pix.height = h;</div><div class='add'>+static int pvr2_s_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *vf)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	struct pvr2_ctrl *hcp, *vcp;</div><div class='add'>+	int ret = pvr2_try_fmt_vid_cap(file, fh, vf);</div><div class='ctx'> </div><div class='del'>-			if (cmd == VIDIOC_S_FMT) {</div><div class='del'>-				pvr2_ctrl_set_value(hcp,vf-&gt;fmt.pix.width);</div><div class='del'>-				pvr2_ctrl_set_value(vcp,vf-&gt;fmt.pix.height);</div><div class='del'>-			}</div><div class='del'>-		} break;</div><div class='del'>-		case V4L2_BUF_TYPE_VBI_CAPTURE:</div><div class='del'>-			// ????? Still need to figure out to do VBI correctly</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	hcp = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_HRES);</div><div class='add'>+	vcp = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_VRES);</div><div class='add'>+	pvr2_ctrl_set_value(hcp, vf-&gt;fmt.pix.width);</div><div class='add'>+	pvr2_ctrl_set_value(vcp, vf-&gt;fmt.pix.height);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_STREAMON:</div><div class='del'>-	{</div><div class='del'>-		if (!fh-&gt;pdi-&gt;stream) {</div><div class='del'>-			/* No stream defined for this node.  This means</div><div class='del'>-			   that we're not currently allowed to stream from</div><div class='del'>-			   this node. */</div><div class='del'>-			ret = -EPERM;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		ret = pvr2_hdw_set_stream_type(hdw,pdi-&gt;config);</div><div class='del'>-		if (ret &lt; 0) return ret;</div><div class='del'>-		ret = pvr2_hdw_set_streaming(hdw,!0);</div><div class='del'>-		break;</div><div class='add'>+static int pvr2_streamon(struct file *file, void *priv, enum v4l2_buf_type i)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	struct pvr2_v4l2_dev *pdi = fh-&gt;pdi;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!fh-&gt;pdi-&gt;stream) {</div><div class='add'>+		/* No stream defined for this node.  This means</div><div class='add'>+		   that we're not currently allowed to stream from</div><div class='add'>+		   this node. */</div><div class='add'>+		return -EPERM;</div><div class='ctx'> 	}</div><div class='add'>+	ret = pvr2_hdw_set_stream_type(hdw, pdi-&gt;config);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	return pvr2_hdw_set_streaming(hdw, !0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_STREAMOFF:</div><div class='del'>-	{</div><div class='del'>-		if (!fh-&gt;pdi-&gt;stream) {</div><div class='del'>-			/* No stream defined for this node.  This means</div><div class='del'>-			   that we're not currently allowed to stream from</div><div class='del'>-			   this node. */</div><div class='del'>-			ret = -EPERM;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		ret = pvr2_hdw_set_streaming(hdw,0);</div><div class='del'>-		break;</div><div class='add'>+static int pvr2_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+</div><div class='add'>+	if (!fh-&gt;pdi-&gt;stream) {</div><div class='add'>+		/* No stream defined for this node.  This means</div><div class='add'>+		   that we're not currently allowed to stream from</div><div class='add'>+		   this node. */</div><div class='add'>+		return -EPERM;</div><div class='ctx'> 	}</div><div class='add'>+	return pvr2_hdw_set_streaming(hdw, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_QUERYCTRL:</div><div class='del'>-	{</div><div class='del'>-		struct pvr2_ctrl *cptr;</div><div class='del'>-		int val;</div><div class='del'>-		struct v4l2_queryctrl *vc = (struct v4l2_queryctrl *)arg;</div><div class='del'>-		ret = 0;</div><div class='del'>-		if (vc-&gt;id &amp; V4L2_CTRL_FLAG_NEXT_CTRL) {</div><div class='del'>-			cptr = pvr2_hdw_get_ctrl_nextv4l(</div><div class='del'>-				hdw,(vc-&gt;id &amp; ~V4L2_CTRL_FLAG_NEXT_CTRL));</div><div class='del'>-			if (cptr) vc-&gt;id = pvr2_ctrl_get_v4lid(cptr);</div><div class='del'>-		} else {</div><div class='del'>-			cptr = pvr2_hdw_get_ctrl_v4l(hdw,vc-&gt;id);</div><div class='del'>-		}</div><div class='del'>-		if (!cptr) {</div><div class='del'>-			pvr2_trace(PVR2_TRACE_V4LIOCTL,</div><div class='del'>-				   "QUERYCTRL id=0x%x not implemented here",</div><div class='del'>-				   vc-&gt;id);</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+static int pvr2_queryctrl(struct file *file, void *priv,</div><div class='add'>+		struct v4l2_queryctrl *vc)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	struct pvr2_ctrl *cptr;</div><div class='add'>+	int val;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='add'>+	ret = 0;</div><div class='add'>+	if (vc-&gt;id &amp; V4L2_CTRL_FLAG_NEXT_CTRL) {</div><div class='add'>+		cptr = pvr2_hdw_get_ctrl_nextv4l(</div><div class='add'>+				hdw, (vc-&gt;id &amp; ~V4L2_CTRL_FLAG_NEXT_CTRL));</div><div class='add'>+		if (cptr)</div><div class='add'>+			vc-&gt;id = pvr2_ctrl_get_v4lid(cptr);</div><div class='add'>+	} else {</div><div class='add'>+		cptr = pvr2_hdw_get_ctrl_v4l(hdw, vc-&gt;id);</div><div class='add'>+	}</div><div class='add'>+	if (!cptr) {</div><div class='ctx'> 		pvr2_trace(PVR2_TRACE_V4LIOCTL,</div><div class='del'>-			   "QUERYCTRL id=0x%x mapping name=%s (%s)",</div><div class='del'>-			   vc-&gt;id,pvr2_ctrl_get_name(cptr),</div><div class='del'>-			   pvr2_ctrl_get_desc(cptr));</div><div class='del'>-		strlcpy(vc-&gt;name,pvr2_ctrl_get_desc(cptr),sizeof(vc-&gt;name));</div><div class='del'>-		vc-&gt;flags = pvr2_ctrl_get_v4lflags(cptr);</div><div class='del'>-		pvr2_ctrl_get_def(cptr, &amp;val);</div><div class='del'>-		vc-&gt;default_value = val;</div><div class='del'>-		switch (pvr2_ctrl_get_type(cptr)) {</div><div class='del'>-		case pvr2_ctl_enum:</div><div class='del'>-			vc-&gt;type = V4L2_CTRL_TYPE_MENU;</div><div class='del'>-			vc-&gt;minimum = 0;</div><div class='del'>-			vc-&gt;maximum = pvr2_ctrl_get_cnt(cptr) - 1;</div><div class='del'>-			vc-&gt;step = 1;</div><div class='del'>-			break;</div><div class='del'>-		case pvr2_ctl_bool:</div><div class='del'>-			vc-&gt;type = V4L2_CTRL_TYPE_BOOLEAN;</div><div class='del'>-			vc-&gt;minimum = 0;</div><div class='del'>-			vc-&gt;maximum = 1;</div><div class='del'>-			vc-&gt;step = 1;</div><div class='del'>-			break;</div><div class='del'>-		case pvr2_ctl_int:</div><div class='del'>-			vc-&gt;type = V4L2_CTRL_TYPE_INTEGER;</div><div class='del'>-			vc-&gt;minimum = pvr2_ctrl_get_min(cptr);</div><div class='del'>-			vc-&gt;maximum = pvr2_ctrl_get_max(cptr);</div><div class='del'>-			vc-&gt;step = 1;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			pvr2_trace(PVR2_TRACE_V4LIOCTL,</div><div class='del'>-				   "QUERYCTRL id=0x%x name=%s not mappable",</div><div class='del'>-				   vc-&gt;id,pvr2_ctrl_get_name(cptr));</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+				"QUERYCTRL id=0x%x not implemented here",</div><div class='add'>+				vc-&gt;id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pvr2_trace(PVR2_TRACE_V4LIOCTL,</div><div class='add'>+			"QUERYCTRL id=0x%x mapping name=%s (%s)",</div><div class='add'>+			vc-&gt;id, pvr2_ctrl_get_name(cptr),</div><div class='add'>+			pvr2_ctrl_get_desc(cptr));</div><div class='add'>+	strlcpy(vc-&gt;name, pvr2_ctrl_get_desc(cptr), sizeof(vc-&gt;name));</div><div class='add'>+	vc-&gt;flags = pvr2_ctrl_get_v4lflags(cptr);</div><div class='add'>+	pvr2_ctrl_get_def(cptr, &amp;val);</div><div class='add'>+	vc-&gt;default_value = val;</div><div class='add'>+	switch (pvr2_ctrl_get_type(cptr)) {</div><div class='add'>+	case pvr2_ctl_enum:</div><div class='add'>+		vc-&gt;type = V4L2_CTRL_TYPE_MENU;</div><div class='add'>+		vc-&gt;minimum = 0;</div><div class='add'>+		vc-&gt;maximum = pvr2_ctrl_get_cnt(cptr) - 1;</div><div class='add'>+		vc-&gt;step = 1;</div><div class='ctx'> 		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	case VIDIOC_QUERYMENU:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_querymenu *vm = (struct v4l2_querymenu *)arg;</div><div class='del'>-		unsigned int cnt = 0;</div><div class='del'>-		ret = pvr2_ctrl_get_valname(pvr2_hdw_get_ctrl_v4l(hdw,vm-&gt;id),</div><div class='del'>-					    vm-&gt;index,</div><div class='del'>-					    vm-&gt;name,sizeof(vm-&gt;name)-1,</div><div class='del'>-					    &amp;cnt);</div><div class='del'>-		vm-&gt;name[cnt] = 0;</div><div class='add'>+	case pvr2_ctl_bool:</div><div class='add'>+		vc-&gt;type = V4L2_CTRL_TYPE_BOOLEAN;</div><div class='add'>+		vc-&gt;minimum = 0;</div><div class='add'>+		vc-&gt;maximum = 1;</div><div class='add'>+		vc-&gt;step = 1;</div><div class='ctx'> 		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	case VIDIOC_G_CTRL:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_control *vc = (struct v4l2_control *)arg;</div><div class='del'>-		int val = 0;</div><div class='del'>-		ret = pvr2_ctrl_get_value(pvr2_hdw_get_ctrl_v4l(hdw,vc-&gt;id),</div><div class='del'>-					  &amp;val);</div><div class='del'>-		vc-&gt;value = val;</div><div class='add'>+	case pvr2_ctl_int:</div><div class='add'>+		vc-&gt;type = V4L2_CTRL_TYPE_INTEGER;</div><div class='add'>+		vc-&gt;minimum = pvr2_ctrl_get_min(cptr);</div><div class='add'>+		vc-&gt;maximum = pvr2_ctrl_get_max(cptr);</div><div class='add'>+		vc-&gt;step = 1;</div><div class='ctx'> 		break;</div><div class='add'>+	default:</div><div class='add'>+		pvr2_trace(PVR2_TRACE_V4LIOCTL,</div><div class='add'>+				"QUERYCTRL id=0x%x name=%s not mappable",</div><div class='add'>+				vc-&gt;id, pvr2_ctrl_get_name(cptr));</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_S_CTRL:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_control *vc = (struct v4l2_control *)arg;</div><div class='del'>-		ret = pvr2_ctrl_set_value(pvr2_hdw_get_ctrl_v4l(hdw,vc-&gt;id),</div><div class='del'>-					  vc-&gt;value);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+static int pvr2_querymenu(struct file *file, void *priv, struct v4l2_querymenu *vm)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	unsigned int cnt = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_G_EXT_CTRLS:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_ext_controls *ctls =</div><div class='del'>-			(struct v4l2_ext_controls *)arg;</div><div class='del'>-		struct v4l2_ext_control *ctrl;</div><div class='del'>-		unsigned int idx;</div><div class='del'>-		int val;</div><div class='del'>-		ret = 0;</div><div class='del'>-		for (idx = 0; idx &lt; ctls-&gt;count; idx++) {</div><div class='del'>-			ctrl = ctls-&gt;controls + idx;</div><div class='del'>-			ret = pvr2_ctrl_get_value(</div><div class='del'>-				pvr2_hdw_get_ctrl_v4l(hdw,ctrl-&gt;id),&amp;val);</div><div class='del'>-			if (ret) {</div><div class='del'>-				ctls-&gt;error_idx = idx;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			/* Ensure that if read as a 64 bit value, the user</div><div class='del'>-			   will still get a hopefully sane value */</div><div class='del'>-			ctrl-&gt;value64 = 0;</div><div class='del'>-			ctrl-&gt;value = val;</div><div class='add'>+	ret = pvr2_ctrl_get_valname(pvr2_hdw_get_ctrl_v4l(hdw, vm-&gt;id),</div><div class='add'>+			vm-&gt;index,</div><div class='add'>+			vm-&gt;name, sizeof(vm-&gt;name) - 1,</div><div class='add'>+			&amp;cnt);</div><div class='add'>+	vm-&gt;name[cnt] = 0;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pvr2_g_ctrl(struct file *file, void *priv, struct v4l2_control *vc)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	int val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pvr2_ctrl_get_value(pvr2_hdw_get_ctrl_v4l(hdw, vc-&gt;id),</div><div class='add'>+			&amp;val);</div><div class='add'>+	vc-&gt;value = val;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pvr2_s_ctrl(struct file *file, void *priv, struct v4l2_control *vc)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+</div><div class='add'>+	return pvr2_ctrl_set_value(pvr2_hdw_get_ctrl_v4l(hdw, vc-&gt;id),</div><div class='add'>+			vc-&gt;value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pvr2_g_ext_ctrls(struct file *file, void *priv,</div><div class='add'>+					struct v4l2_ext_controls *ctls)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	struct v4l2_ext_control *ctrl;</div><div class='add'>+	unsigned int idx;</div><div class='add'>+	int val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+	for (idx = 0; idx &lt; ctls-&gt;count; idx++) {</div><div class='add'>+		ctrl = ctls-&gt;controls + idx;</div><div class='add'>+		ret = pvr2_ctrl_get_value(</div><div class='add'>+				pvr2_hdw_get_ctrl_v4l(hdw, ctrl-&gt;id), &amp;val);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ctls-&gt;error_idx = idx;</div><div class='add'>+			return ret;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='add'>+		/* Ensure that if read as a 64 bit value, the user</div><div class='add'>+		   will still get a hopefully sane value */</div><div class='add'>+		ctrl-&gt;value64 = 0;</div><div class='add'>+		ctrl-&gt;value = val;</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_S_EXT_CTRLS:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_ext_controls *ctls =</div><div class='del'>-			(struct v4l2_ext_controls *)arg;</div><div class='del'>-		struct v4l2_ext_control *ctrl;</div><div class='del'>-		unsigned int idx;</div><div class='del'>-		ret = 0;</div><div class='del'>-		for (idx = 0; idx &lt; ctls-&gt;count; idx++) {</div><div class='del'>-			ctrl = ctls-&gt;controls + idx;</div><div class='del'>-			ret = pvr2_ctrl_set_value(</div><div class='del'>-				pvr2_hdw_get_ctrl_v4l(hdw,ctrl-&gt;id),</div><div class='add'>+static int pvr2_s_ext_ctrls(struct file *file, void *priv,</div><div class='add'>+		struct v4l2_ext_controls *ctls)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	struct v4l2_ext_control *ctrl;</div><div class='add'>+	unsigned int idx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+	for (idx = 0; idx &lt; ctls-&gt;count; idx++) {</div><div class='add'>+		ctrl = ctls-&gt;controls + idx;</div><div class='add'>+		ret = pvr2_ctrl_set_value(</div><div class='add'>+				pvr2_hdw_get_ctrl_v4l(hdw, ctrl-&gt;id),</div><div class='ctx'> 				ctrl-&gt;value);</div><div class='del'>-			if (ret) {</div><div class='del'>-				ctls-&gt;error_idx = idx;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='add'>+		if (ret) {</div><div class='add'>+			ctls-&gt;error_idx = idx;</div><div class='add'>+			return ret;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_TRY_EXT_CTRLS:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_ext_controls *ctls =</div><div class='del'>-			(struct v4l2_ext_controls *)arg;</div><div class='del'>-		struct v4l2_ext_control *ctrl;</div><div class='del'>-		struct pvr2_ctrl *pctl;</div><div class='del'>-		unsigned int idx;</div><div class='del'>-		/* For the moment just validate that the requested control</div><div class='del'>-		   actually exists. */</div><div class='del'>-		ret = 0;</div><div class='del'>-		for (idx = 0; idx &lt; ctls-&gt;count; idx++) {</div><div class='del'>-			ctrl = ctls-&gt;controls + idx;</div><div class='del'>-			pctl = pvr2_hdw_get_ctrl_v4l(hdw,ctrl-&gt;id);</div><div class='del'>-			if (!pctl) {</div><div class='del'>-				ret = -EINVAL;</div><div class='del'>-				ctls-&gt;error_idx = idx;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+static int pvr2_try_ext_ctrls(struct file *file, void *priv,</div><div class='add'>+		struct v4l2_ext_controls *ctls)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	struct v4l2_ext_control *ctrl;</div><div class='add'>+	struct pvr2_ctrl *pctl;</div><div class='add'>+	unsigned int idx;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	case VIDIOC_CROPCAP:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_cropcap *cap = (struct v4l2_cropcap *)arg;</div><div class='del'>-		if (cap-&gt;type != V4L2_BUF_TYPE_VIDEO_CAPTURE) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='add'>+	/* For the moment just validate that the requested control</div><div class='add'>+	   actually exists. */</div><div class='add'>+	ret = 0;</div><div class='add'>+	for (idx = 0; idx &lt; ctls-&gt;count; idx++) {</div><div class='add'>+		ctrl = ctls-&gt;controls + idx;</div><div class='add'>+		pctl = pvr2_hdw_get_ctrl_v4l(hdw, ctrl-&gt;id);</div><div class='add'>+		if (!pctl) {</div><div class='add'>+			ctls-&gt;error_idx = idx;</div><div class='add'>+			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-		ret = pvr2_hdw_get_cropcap(hdw, cap);</div><div class='del'>-		cap-&gt;type = V4L2_BUF_TYPE_VIDEO_CAPTURE; /* paranoia */</div><div class='del'>-		break;</div><div class='ctx'> 	}</div><div class='del'>-	case VIDIOC_G_CROP:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_crop *crop = (struct v4l2_crop *)arg;</div><div class='del'>-		int val = 0;</div><div class='del'>-		if (crop-&gt;type != V4L2_BUF_TYPE_VIDEO_CAPTURE) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		ret = pvr2_ctrl_get_value(</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pvr2_cropcap(struct file *file, void *priv, struct v4l2_cropcap *cap)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (cap-&gt;type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	ret = pvr2_hdw_get_cropcap(hdw, cap);</div><div class='add'>+	cap-&gt;type = V4L2_BUF_TYPE_VIDEO_CAPTURE; /* paranoia */</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pvr2_g_crop(struct file *file, void *priv, struct v4l2_crop *crop)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	int val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (crop-&gt;type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	ret = pvr2_ctrl_get_value(</div><div class='ctx'> 			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPL), &amp;val);</div><div class='del'>-		if (ret != 0) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		crop-&gt;c.left = val;</div><div class='del'>-		ret = pvr2_ctrl_get_value(</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	crop-&gt;c.left = val;</div><div class='add'>+	ret = pvr2_ctrl_get_value(</div><div class='ctx'> 			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPT), &amp;val);</div><div class='del'>-		if (ret != 0) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		crop-&gt;c.top = val;</div><div class='del'>-		ret = pvr2_ctrl_get_value(</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	crop-&gt;c.top = val;</div><div class='add'>+	ret = pvr2_ctrl_get_value(</div><div class='ctx'> 			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPW), &amp;val);</div><div class='del'>-		if (ret != 0) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		crop-&gt;c.width = val;</div><div class='del'>-		ret = pvr2_ctrl_get_value(</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	crop-&gt;c.width = val;</div><div class='add'>+	ret = pvr2_ctrl_get_value(</div><div class='ctx'> 			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPH), &amp;val);</div><div class='del'>-		if (ret != 0) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		crop-&gt;c.height = val;</div><div class='del'>-	}</div><div class='del'>-	case VIDIOC_S_CROP:</div><div class='del'>-	{</div><div class='del'>-		struct v4l2_crop *crop = (struct v4l2_crop *)arg;</div><div class='del'>-		if (crop-&gt;type != V4L2_BUF_TYPE_VIDEO_CAPTURE) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		ret = pvr2_ctrl_set_value(</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	crop-&gt;c.height = val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pvr2_s_crop(struct file *file, void *priv, struct v4l2_crop *crop)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	struct v4l2_cropcap cap;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (crop-&gt;type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	cap.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;</div><div class='add'>+	ret = pvr2_ctrl_set_value(</div><div class='ctx'> 			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPL),</div><div class='ctx'> 			crop-&gt;c.left);</div><div class='del'>-		if (ret != 0) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		ret = pvr2_ctrl_set_value(</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	ret = pvr2_ctrl_set_value(</div><div class='ctx'> 			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPT),</div><div class='ctx'> 			crop-&gt;c.top);</div><div class='del'>-		if (ret != 0) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		ret = pvr2_ctrl_set_value(</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	ret = pvr2_ctrl_set_value(</div><div class='ctx'> 			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPW),</div><div class='ctx'> 			crop-&gt;c.width);</div><div class='del'>-		if (ret != 0) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		ret = pvr2_ctrl_set_value(</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	ret = pvr2_ctrl_set_value(</div><div class='ctx'> 			pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPH),</div><div class='ctx'> 			crop-&gt;c.height);</div><div class='del'>-		if (ret != 0) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	case VIDIOC_LOG_STATUS:</div><div class='del'>-	{</div><div class='del'>-		pvr2_hdw_trigger_module_log(hdw);</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pvr2_log_status(struct file *file, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+</div><div class='add'>+	pvr2_hdw_trigger_module_log(hdw);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_VIDEO_ADV_DEBUG</div><div class='del'>-	case VIDIOC_DBG_S_REGISTER:</div><div class='del'>-	case VIDIOC_DBG_G_REGISTER:</div><div class='del'>-	{</div><div class='del'>-		u64 val;</div><div class='del'>-		struct v4l2_dbg_register *req = (struct v4l2_dbg_register *)arg;</div><div class='del'>-		if (cmd == VIDIOC_DBG_S_REGISTER) val = req-&gt;val;</div><div class='del'>-		ret = pvr2_hdw_register_access(</div><div class='del'>-			hdw, &amp;req-&gt;match, req-&gt;reg,</div><div class='del'>-			cmd == VIDIOC_DBG_S_REGISTER, &amp;val);</div><div class='del'>-		if (cmd == VIDIOC_DBG_G_REGISTER) req-&gt;val = val;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='add'>+static int pvr2_g_register(struct file *file, void *priv, struct v4l2_dbg_register *req)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	u64 val;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	default :</div><div class='del'>-		ret = -ENOTTY;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	ret = pvr2_hdw_register_access(</div><div class='add'>+			hdw, &amp;req-&gt;match, req-&gt;reg,</div><div class='add'>+			0, &amp;val);</div><div class='add'>+	req-&gt;val = val;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	pvr2_hdw_commit_ctl(hdw);</div><div class='add'>+static int pvr2_s_register(struct file *file, void *priv, struct v4l2_dbg_register *req)</div><div class='add'>+{</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	u64 val;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		if (pvrusb2_debug &amp; PVR2_TRACE_V4LIOCTL) {</div><div class='del'>-			pvr2_trace(PVR2_TRACE_V4LIOCTL,</div><div class='del'>-				   "pvr2_v4l2_do_ioctl failure, ret=%ld", ret);</div><div class='del'>-		} else {</div><div class='del'>-			if (pvrusb2_debug &amp; PVR2_TRACE_V4LIOCTL) {</div><div class='del'>-				pvr2_trace(PVR2_TRACE_V4LIOCTL,</div><div class='del'>-					   "pvr2_v4l2_do_ioctl failure, ret=%ld"</div><div class='del'>-					   " command was:", ret);</div><div class='del'>-				v4l_print_ioctl(pvr2_hdw_get_driver_name(hdw),</div><div class='del'>-						cmd);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		pvr2_trace(PVR2_TRACE_V4LIOCTL,</div><div class='del'>-			   "pvr2_v4l2_do_ioctl complete, ret=%ld (0x%lx)",</div><div class='del'>-			   ret, ret);</div><div class='del'>-	}</div><div class='add'>+	val = req-&gt;val;</div><div class='add'>+	ret = pvr2_hdw_register_access(</div><div class='add'>+			hdw, &amp;req-&gt;match, req-&gt;reg,</div><div class='add'>+			1, &amp;val);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ioctl_ops pvr2_ioctl_ops = {</div><div class='add'>+	.vidioc_querycap		    = pvr2_querycap,</div><div class='add'>+	.vidioc_g_priority		    = pvr2_g_priority,</div><div class='add'>+	.vidioc_s_priority		    = pvr2_s_priority,</div><div class='add'>+	.vidioc_s_audio			    = pvr2_s_audio,</div><div class='add'>+	.vidioc_g_audio			    = pvr2_g_audio,</div><div class='add'>+	.vidioc_enumaudio		    = pvr2_enumaudio,</div><div class='add'>+	.vidioc_enum_input		    = pvr2_enum_input,</div><div class='add'>+	.vidioc_cropcap			    = pvr2_cropcap,</div><div class='add'>+	.vidioc_s_crop			    = pvr2_s_crop,</div><div class='add'>+	.vidioc_g_crop			    = pvr2_g_crop,</div><div class='add'>+	.vidioc_g_input			    = pvr2_g_input,</div><div class='add'>+	.vidioc_s_input			    = pvr2_s_input,</div><div class='add'>+	.vidioc_g_frequency		    = pvr2_g_frequency,</div><div class='add'>+	.vidioc_s_frequency		    = pvr2_s_frequency,</div><div class='add'>+	.vidioc_s_tuner			    = pvr2_s_tuner,</div><div class='add'>+	.vidioc_g_tuner			    = pvr2_g_tuner,</div><div class='add'>+	.vidioc_g_std			    = pvr2_g_std,</div><div class='add'>+	.vidioc_s_std			    = pvr2_s_std,</div><div class='add'>+	.vidioc_querystd		    = pvr2_querystd,</div><div class='add'>+	.vidioc_log_status		    = pvr2_log_status,</div><div class='add'>+	.vidioc_enum_fmt_vid_cap	    = pvr2_enum_fmt_vid_cap,</div><div class='add'>+	.vidioc_g_fmt_vid_cap		    = pvr2_g_fmt_vid_cap,</div><div class='add'>+	.vidioc_s_fmt_vid_cap		    = pvr2_s_fmt_vid_cap,</div><div class='add'>+	.vidioc_try_fmt_vid_cap		    = pvr2_try_fmt_vid_cap,</div><div class='add'>+	.vidioc_streamon		    = pvr2_streamon,</div><div class='add'>+	.vidioc_streamoff		    = pvr2_streamoff,</div><div class='add'>+	.vidioc_queryctrl		    = pvr2_queryctrl,</div><div class='add'>+	.vidioc_querymenu		    = pvr2_querymenu,</div><div class='add'>+	.vidioc_g_ctrl			    = pvr2_g_ctrl,</div><div class='add'>+	.vidioc_s_ctrl			    = pvr2_s_ctrl,</div><div class='add'>+	.vidioc_g_ext_ctrls		    = pvr2_g_ext_ctrls,</div><div class='add'>+	.vidioc_s_ext_ctrls		    = pvr2_s_ext_ctrls,</div><div class='add'>+	.vidioc_try_ext_ctrls		    = pvr2_try_ext_ctrls,</div><div class='add'>+#ifdef CONFIG_VIDEO_ADV_DEBUG</div><div class='add'>+	.vidioc_g_register		    = pvr2_g_register,</div><div class='add'>+	.vidioc_s_register		    = pvr2_s_register,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static void pvr2_v4l2_dev_destroy(struct pvr2_v4l2_dev *dip)</div><div class='ctx'> {</div><div class='hunk'>@@ -961,7 +959,56 @@ static long pvr2_v4l2_ioctl(struct file *file,</div><div class='ctx'> 			   unsigned int cmd, unsigned long arg)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='del'>-	return video_usercopy(file, cmd, arg, pvr2_v4l2_do_ioctl);</div><div class='add'>+	struct pvr2_v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+	struct pvr2_v4l2 *vp = fh-&gt;vhead;</div><div class='add'>+	struct pvr2_hdw *hdw = fh-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	long ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (pvrusb2_debug &amp; PVR2_TRACE_V4LIOCTL)</div><div class='add'>+		v4l_print_ioctl(pvr2_hdw_get_driver_name(hdw), cmd);</div><div class='add'>+</div><div class='add'>+	if (!pvr2_hdw_dev_ok(hdw)) {</div><div class='add'>+		pvr2_trace(PVR2_TRACE_ERROR_LEGS,</div><div class='add'>+			   "ioctl failed - bad or no context");</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check priority */</div><div class='add'>+	switch (cmd) {</div><div class='add'>+	case VIDIOC_S_CTRL:</div><div class='add'>+	case VIDIOC_S_STD:</div><div class='add'>+	case VIDIOC_S_INPUT:</div><div class='add'>+	case VIDIOC_S_TUNER:</div><div class='add'>+	case VIDIOC_S_FREQUENCY:</div><div class='add'>+		ret = v4l2_prio_check(&amp;vp-&gt;prio, fh-&gt;prio);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = video_ioctl2(file, cmd, arg);</div><div class='add'>+</div><div class='add'>+	pvr2_hdw_commit_ctl(hdw);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		if (pvrusb2_debug &amp; PVR2_TRACE_V4LIOCTL) {</div><div class='add'>+			pvr2_trace(PVR2_TRACE_V4LIOCTL,</div><div class='add'>+				   "pvr2_v4l2_do_ioctl failure, ret=%ld", ret);</div><div class='add'>+		} else {</div><div class='add'>+			if (pvrusb2_debug &amp; PVR2_TRACE_V4LIOCTL) {</div><div class='add'>+				pvr2_trace(PVR2_TRACE_V4LIOCTL,</div><div class='add'>+					   "pvr2_v4l2_do_ioctl failure, ret=%ld"</div><div class='add'>+					   " command was:", ret);</div><div class='add'>+				v4l_print_ioctl(pvr2_hdw_get_driver_name(hdw),</div><div class='add'>+						cmd);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		pvr2_trace(PVR2_TRACE_V4LIOCTL,</div><div class='add'>+			   "pvr2_v4l2_do_ioctl complete, ret=%ld (0x%lx)",</div><div class='add'>+			   ret, ret);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1262,10 +1309,12 @@ static void pvr2_v4l2_dev_init(struct pvr2_v4l2_dev *dip,</div><div class='ctx'> 	struct usb_device *usbdev;</div><div class='ctx'> 	int mindevnum;</div><div class='ctx'> 	int unit_number;</div><div class='add'>+	struct pvr2_hdw *hdw;</div><div class='ctx'> 	int *nr_ptr = NULL;</div><div class='ctx'> 	dip-&gt;v4lp = vp;</div><div class='ctx'> </div><div class='del'>-	usbdev = pvr2_hdw_get_dev(vp-&gt;channel.mc_head-&gt;hdw);</div><div class='add'>+	hdw = vp-&gt;channel.mc_head-&gt;hdw;</div><div class='add'>+	usbdev = pvr2_hdw_get_dev(hdw);</div><div class='ctx'> 	dip-&gt;v4l_type = v4l_type;</div><div class='ctx'> 	switch (v4l_type) {</div><div class='ctx'> 	case VFL_TYPE_GRABBER:</div><div class='hunk'>@@ -1300,9 +1349,17 @@ static void pvr2_v4l2_dev_init(struct pvr2_v4l2_dev *dip,</div><div class='ctx'> </div><div class='ctx'> 	memcpy(&amp;dip-&gt;devbase,&amp;vdev_template,sizeof(vdev_template));</div><div class='ctx'> 	dip-&gt;devbase.release = pvr2_video_device_release;</div><div class='add'>+	dip-&gt;devbase.ioctl_ops = &amp;pvr2_ioctl_ops;</div><div class='add'>+	{</div><div class='add'>+		int val;</div><div class='add'>+		pvr2_ctrl_get_value(</div><div class='add'>+			pvr2_hdw_get_ctrl_by_id(hdw,</div><div class='add'>+						PVR2_CID_STDAVAIL), &amp;val);</div><div class='add'>+		dip-&gt;devbase.tvnorms = (v4l2_std_id)val;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mindevnum = -1;</div><div class='del'>-	unit_number = pvr2_hdw_get_unit_number(vp-&gt;channel.mc_head-&gt;hdw);</div><div class='add'>+	unit_number = pvr2_hdw_get_unit_number(hdw);</div><div class='ctx'> 	if (nr_ptr &amp;&amp; (unit_number &gt;= 0) &amp;&amp; (unit_number &lt; PVR_NUM)) {</div><div class='ctx'> 		mindevnum = nr_ptr[unit_number];</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1319,7 +1376,7 @@ static void pvr2_v4l2_dev_init(struct pvr2_v4l2_dev *dip,</div><div class='ctx'> 	       video_device_node_name(&amp;dip-&gt;devbase),</div><div class='ctx'> 	       pvr2_config_get_name(dip-&gt;config));</div><div class='ctx'> </div><div class='del'>-	pvr2_hdw_v4l_store_minor_number(vp-&gt;channel.mc_head-&gt;hdw,</div><div class='add'>+	pvr2_hdw_v4l_store_minor_number(hdw,</div><div class='ctx'> 					dip-&gt;minor_type,dip-&gt;devbase.minor);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/pwc/pwc-if.c b/drivers/media/video/pwc/pwc-if.c<br/>index 122fbd0081eb..ec4e2ef54e65 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/pwc/pwc-if.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/pwc/pwc-if.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/pwc/pwc-if.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pwc/pwc-if.c</a></div><div class='hunk'>@@ -357,6 +357,7 @@ handler_end:</div><div class='ctx'> 		PWC_ERROR("Error (%d) re-submitting urb in pwc_isoc_handler.\n", i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Both v4l2_lock and vb_queue_lock should be locked when calling this */</div><div class='ctx'> static int pwc_isoc_init(struct pwc_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct usb_device *udev;</div><div class='hunk'>@@ -366,9 +367,6 @@ static int pwc_isoc_init(struct pwc_device *pdev)</div><div class='ctx'> 	struct usb_host_interface *idesc = NULL;</div><div class='ctx'> 	int compression = 0; /* 0..3 = uncompressed..high */</div><div class='ctx'> </div><div class='del'>-	if (pdev-&gt;iso_init)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	pdev-&gt;vsync = 0;</div><div class='ctx'> 	pdev-&gt;vlast_packet_size = 0;</div><div class='ctx'> 	pdev-&gt;fill_buf = NULL;</div><div class='hunk'>@@ -418,7 +416,6 @@ retry:</div><div class='ctx'> 		urb = usb_alloc_urb(ISO_FRAMES_PER_DESC, GFP_KERNEL);</div><div class='ctx'> 		if (urb == NULL) {</div><div class='ctx'> 			PWC_ERROR("Failed to allocate urb %d\n", i);</div><div class='del'>-			pdev-&gt;iso_init = 1;</div><div class='ctx'> 			pwc_isoc_cleanup(pdev);</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -435,7 +432,6 @@ retry:</div><div class='ctx'> 							  &amp;urb-&gt;transfer_dma);</div><div class='ctx'> 		if (urb-&gt;transfer_buffer == NULL) {</div><div class='ctx'> 			PWC_ERROR("Failed to allocate urb buffer %d\n", i);</div><div class='del'>-			pdev-&gt;iso_init = 1;</div><div class='ctx'> 			pwc_isoc_cleanup(pdev);</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -455,13 +451,11 @@ retry:</div><div class='ctx'> 		ret = usb_submit_urb(pdev-&gt;urbs[i], GFP_KERNEL);</div><div class='ctx'> 		if (ret == -ENOSPC &amp;&amp; compression &lt; 3) {</div><div class='ctx'> 			compression++;</div><div class='del'>-			pdev-&gt;iso_init = 1;</div><div class='ctx'> 			pwc_isoc_cleanup(pdev);</div><div class='ctx'> 			goto retry;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			PWC_ERROR("isoc_init() submit_urb %d failed with error %d\n", i, ret);</div><div class='del'>-			pdev-&gt;iso_init = 1;</div><div class='ctx'> 			pwc_isoc_cleanup(pdev);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -469,7 +463,6 @@ retry:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* All is done... */</div><div class='del'>-	pdev-&gt;iso_init = 1;</div><div class='ctx'> 	PWC_DEBUG_OPEN("&lt;&lt; pwc_isoc_init()\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -507,21 +500,19 @@ static void pwc_iso_free(struct pwc_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Both v4l2_lock and vb_queue_lock should be locked when calling this */</div><div class='ctx'> static void pwc_isoc_cleanup(struct pwc_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	PWC_DEBUG_OPEN("&gt;&gt; pwc_isoc_cleanup()\n");</div><div class='ctx'> </div><div class='del'>-	if (pdev-&gt;iso_init == 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	pwc_iso_stop(pdev);</div><div class='ctx'> 	pwc_iso_free(pdev);</div><div class='ctx'> 	usb_set_interface(pdev-&gt;udev, 0, 0);</div><div class='ctx'> </div><div class='del'>-	pdev-&gt;iso_init = 0;</div><div class='ctx'> 	PWC_DEBUG_OPEN("&lt;&lt; pwc_isoc_cleanup()\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Must be called with vb_queue_lock hold */</div><div class='ctx'> static void pwc_cleanup_queued_bufs(struct pwc_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags = 0;</div><div class='hunk'>@@ -573,18 +564,13 @@ static const char *pwc_sensor_type_to_string(unsigned int sensor_type)</div><div class='ctx'> </div><div class='ctx'> int pwc_test_n_set_capt_file(struct pwc_device *pdev, struct file *file)</div><div class='ctx'> {</div><div class='del'>-	int r = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;pdev-&gt;capt_file_lock);</div><div class='ctx'> 	if (pdev-&gt;capt_file != NULL &amp;&amp;</div><div class='del'>-	    pdev-&gt;capt_file != file) {</div><div class='del'>-		r = -EBUSY;</div><div class='del'>-		goto leave;</div><div class='del'>-	}</div><div class='add'>+	    pdev-&gt;capt_file != file)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='ctx'> 	pdev-&gt;capt_file = file;</div><div class='del'>-leave:</div><div class='del'>-	mutex_unlock(&amp;pdev-&gt;capt_file_lock);</div><div class='del'>-	return r;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pwc_video_release(struct v4l2_device *v)</div><div class='hunk'>@@ -592,6 +578,7 @@ static void pwc_video_release(struct v4l2_device *v)</div><div class='ctx'> 	struct pwc_device *pdev = container_of(v, struct pwc_device, v4l2_dev);</div><div class='ctx'> </div><div class='ctx'> 	v4l2_ctrl_handler_free(&amp;pdev-&gt;ctrl_handler);</div><div class='add'>+	v4l2_device_unregister(&amp;pdev-&gt;v4l2_dev);</div><div class='ctx'> 	kfree(pdev-&gt;ctrl_buf);</div><div class='ctx'> 	kfree(pdev);</div><div class='ctx'> }</div><div class='hunk'>@@ -600,10 +587,25 @@ static int pwc_video_close(struct file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev = video_drvdata(file);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If we're still streaming vb2_queue_release will call stream_stop</div><div class='add'>+	 * so we must take both the v4l2_lock and the vb_queue_lock.</div><div class='add'>+	 */</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;v4l2_lock))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;vb_queue_lock)) {</div><div class='add'>+		mutex_unlock(&amp;pdev-&gt;v4l2_lock);</div><div class='add'>+		return -ERESTARTSYS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (pdev-&gt;capt_file == file) {</div><div class='ctx'> 		vb2_queue_release(&amp;pdev-&gt;vb_queue);</div><div class='ctx'> 		pdev-&gt;capt_file = NULL;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;v4l2_lock);</div><div class='add'>+</div><div class='ctx'> 	return v4l2_fh_release(file);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -611,35 +613,81 @@ static ssize_t pwc_video_read(struct file *file, char __user *buf,</div><div class='ctx'> 			      size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev = video_drvdata(file);</div><div class='add'>+	int lock_v4l2 = 0;</div><div class='add'>+	ssize_t ret;</div><div class='ctx'> </div><div class='del'>-	if (!pdev-&gt;udev)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;vb_queue_lock))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='ctx'> </div><div class='del'>-	if (pwc_test_n_set_capt_file(pdev, file))</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	ret = pwc_test_n_set_capt_file(pdev, file);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	return vb2_read(&amp;pdev-&gt;vb_queue, buf, count, ppos,</div><div class='del'>-			file-&gt;f_flags &amp; O_NONBLOCK);</div><div class='add'>+	/* stream_start will get called so we must take the v4l2_lock */</div><div class='add'>+	if (pdev-&gt;vb_queue.fileio == NULL)</div><div class='add'>+		lock_v4l2 = 1;</div><div class='add'>+</div><div class='add'>+	/* Use try_lock, since we're taking the locks in the *wrong* order! */</div><div class='add'>+	if (lock_v4l2 &amp;&amp; !mutex_trylock(&amp;pdev-&gt;v4l2_lock)) {</div><div class='add'>+		ret = -ERESTARTSYS;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	ret = vb2_read(&amp;pdev-&gt;vb_queue, buf, count, ppos,</div><div class='add'>+		       file-&gt;f_flags &amp; O_NONBLOCK);</div><div class='add'>+	if (lock_v4l2)</div><div class='add'>+		mutex_unlock(&amp;pdev-&gt;v4l2_lock);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int pwc_video_poll(struct file *file, poll_table *wait)</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev = video_drvdata(file);</div><div class='add'>+	struct vb2_queue *q = &amp;pdev-&gt;vb_queue;</div><div class='add'>+	unsigned long req_events = poll_requested_events(wait);</div><div class='add'>+	unsigned int ret = POLL_ERR;</div><div class='add'>+	int lock_v4l2 = 0;</div><div class='ctx'> </div><div class='del'>-	if (!pdev-&gt;udev)</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;vb_queue_lock))</div><div class='ctx'> 		return POLL_ERR;</div><div class='ctx'> </div><div class='del'>-	return vb2_poll(&amp;pdev-&gt;vb_queue, file, wait);</div><div class='add'>+	/* Will this start fileio and thus call start_stream? */</div><div class='add'>+	if ((req_events &amp; (POLLIN | POLLRDNORM)) &amp;&amp;</div><div class='add'>+	    q-&gt;num_buffers == 0 &amp;&amp; !q-&gt;streaming &amp;&amp; q-&gt;fileio == NULL) {</div><div class='add'>+		if (pwc_test_n_set_capt_file(pdev, file))</div><div class='add'>+			goto out;</div><div class='add'>+		lock_v4l2 = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Use try_lock, since we're taking the locks in the *wrong* order! */</div><div class='add'>+	if (lock_v4l2 &amp;&amp; !mutex_trylock(&amp;pdev-&gt;v4l2_lock))</div><div class='add'>+		goto out;</div><div class='add'>+	ret = vb2_poll(&amp;pdev-&gt;vb_queue, file, wait);</div><div class='add'>+	if (lock_v4l2)</div><div class='add'>+		mutex_unlock(&amp;pdev-&gt;v4l2_lock);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (!pdev-&gt;udev)</div><div class='add'>+		ret |= POLLHUP;</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev = video_drvdata(file);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (pdev-&gt;capt_file != file)</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;vb_queue_lock))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='ctx'> </div><div class='del'>-	return vb2_mmap(&amp;pdev-&gt;vb_queue, vma);</div><div class='add'>+	ret = pwc_test_n_set_capt_file(pdev, file);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		ret = vb2_mmap(&amp;pdev-&gt;vb_queue, vma);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='hunk'>@@ -715,12 +763,14 @@ static void buffer_queue(struct vb2_buffer *vb)</div><div class='ctx'> 	struct pwc_frame_buf *buf = container_of(vb, struct pwc_frame_buf, vb);</div><div class='ctx'> 	unsigned long flags = 0;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;pdev-&gt;queued_bufs_lock, flags);</div><div class='ctx'> 	/* Check the device has not disconnected between prep and queuing */</div><div class='del'>-	if (pdev-&gt;udev)</div><div class='del'>-		list_add_tail(&amp;buf-&gt;list, &amp;pdev-&gt;queued_bufs);</div><div class='del'>-	else</div><div class='add'>+	if (!pdev-&gt;udev) {</div><div class='ctx'> 		vb2_buffer_done(&amp;buf-&gt;vb, VB2_BUF_STATE_ERROR);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;pdev-&gt;queued_bufs_lock, flags);</div><div class='add'>+	list_add_tail(&amp;buf-&gt;list, &amp;pdev-&gt;queued_bufs);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pdev-&gt;queued_bufs_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -729,11 +779,8 @@ static int start_streaming(struct vb2_queue *vq, unsigned int count)</div><div class='ctx'> 	struct pwc_device *pdev = vb2_get_drv_priv(vq);</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;pdev-&gt;udevlock);</div><div class='del'>-	if (!pdev-&gt;udev) {</div><div class='del'>-		r = -ENODEV;</div><div class='del'>-		goto leave;</div><div class='del'>-	}</div><div class='add'>+	if (!pdev-&gt;udev)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	/* Turn on camera and set LEDS on */</div><div class='ctx'> 	pwc_camera_power(pdev, 1);</div><div class='hunk'>@@ -747,8 +794,7 @@ static int start_streaming(struct vb2_queue *vq, unsigned int count)</div><div class='ctx'> 		/* And cleanup any queued bufs!! */</div><div class='ctx'> 		pwc_cleanup_queued_bufs(pdev);</div><div class='ctx'> 	}</div><div class='del'>-leave:</div><div class='del'>-	mutex_unlock(&amp;pdev-&gt;udevlock);</div><div class='add'>+</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -756,19 +802,29 @@ static int stop_streaming(struct vb2_queue *vq)</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev = vb2_get_drv_priv(vq);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;pdev-&gt;udevlock);</div><div class='ctx'> 	if (pdev-&gt;udev) {</div><div class='ctx'> 		pwc_set_leds(pdev, 0, 0);</div><div class='ctx'> 		pwc_camera_power(pdev, 0);</div><div class='ctx'> 		pwc_isoc_cleanup(pdev);</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;pdev-&gt;udevlock);</div><div class='ctx'> </div><div class='ctx'> 	pwc_cleanup_queued_bufs(pdev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void wait_prepare(struct vb2_queue *vq)</div><div class='add'>+{</div><div class='add'>+	struct pwc_device *pdev = vb2_get_drv_priv(vq);</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wait_finish(struct vb2_queue *vq)</div><div class='add'>+{</div><div class='add'>+	struct pwc_device *pdev = vb2_get_drv_priv(vq);</div><div class='add'>+	mutex_lock(&amp;pdev-&gt;vb_queue_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct vb2_ops pwc_vb_queue_ops = {</div><div class='ctx'> 	.queue_setup		= queue_setup,</div><div class='ctx'> 	.buf_init		= buffer_init,</div><div class='hunk'>@@ -778,6 +834,8 @@ static struct vb2_ops pwc_vb_queue_ops = {</div><div class='ctx'> 	.buf_queue		= buffer_queue,</div><div class='ctx'> 	.start_streaming	= start_streaming,</div><div class='ctx'> 	.stop_streaming		= stop_streaming,</div><div class='add'>+	.wait_prepare		= wait_prepare,</div><div class='add'>+	.wait_finish		= wait_finish,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************/</div><div class='hunk'>@@ -1057,8 +1115,8 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id</div><div class='ctx'> 	pdev-&gt;features = features;</div><div class='ctx'> 	pwc_construct(pdev); /* set min/max sizes correct */</div><div class='ctx'> </div><div class='del'>-	mutex_init(&amp;pdev-&gt;capt_file_lock);</div><div class='del'>-	mutex_init(&amp;pdev-&gt;udevlock);</div><div class='add'>+	mutex_init(&amp;pdev-&gt;v4l2_lock);</div><div class='add'>+	mutex_init(&amp;pdev-&gt;vb_queue_lock);</div><div class='ctx'> 	spin_lock_init(&amp;pdev-&gt;queued_bufs_lock);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;pdev-&gt;queued_bufs);</div><div class='ctx'> </div><div class='hunk'>@@ -1130,6 +1188,16 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id</div><div class='ctx'> </div><div class='ctx'> 	pdev-&gt;v4l2_dev.ctrl_handler = &amp;pdev-&gt;ctrl_handler;</div><div class='ctx'> 	pdev-&gt;vdev.v4l2_dev = &amp;pdev-&gt;v4l2_dev;</div><div class='add'>+	pdev-&gt;vdev.lock = &amp;pdev-&gt;v4l2_lock;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Don't take v4l2_lock for these ioctls. This improves latency if</div><div class='add'>+	 * v4l2_lock is taken for a long time, e.g. when changing a control</div><div class='add'>+	 * value, and a new frame is ready to be dequeued.</div><div class='add'>+	 */</div><div class='add'>+	v4l2_disable_ioctl_locking(&amp;pdev-&gt;vdev, VIDIOC_DQBUF);</div><div class='add'>+	v4l2_disable_ioctl_locking(&amp;pdev-&gt;vdev, VIDIOC_QBUF);</div><div class='add'>+	v4l2_disable_ioctl_locking(&amp;pdev-&gt;vdev, VIDIOC_QUERYBUF);</div><div class='ctx'> </div><div class='ctx'> 	rc = video_register_device(&amp;pdev-&gt;vdev, VFL_TYPE_GRABBER, -1);</div><div class='ctx'> 	if (rc &lt; 0) {</div><div class='hunk'>@@ -1185,16 +1253,20 @@ static void usb_pwc_disconnect(struct usb_interface *intf)</div><div class='ctx'> 	struct v4l2_device *v = usb_get_intfdata(intf);</div><div class='ctx'> 	struct pwc_device *pdev = container_of(v, struct pwc_device, v4l2_dev);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;pdev-&gt;udevlock);</div><div class='add'>+	mutex_lock(&amp;pdev-&gt;v4l2_lock);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pdev-&gt;vb_queue_lock);</div><div class='ctx'> 	/* No need to keep the urbs around after disconnection */</div><div class='del'>-	pwc_isoc_cleanup(pdev);</div><div class='add'>+	if (pdev-&gt;vb_queue.streaming)</div><div class='add'>+		pwc_isoc_cleanup(pdev);</div><div class='ctx'> 	pdev-&gt;udev = NULL;</div><div class='del'>-	mutex_unlock(&amp;pdev-&gt;udevlock);</div><div class='del'>-</div><div class='ctx'> 	pwc_cleanup_queued_bufs(pdev);</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='ctx'> </div><div class='add'>+	v4l2_device_disconnect(&amp;pdev-&gt;v4l2_dev);</div><div class='ctx'> 	video_unregister_device(&amp;pdev-&gt;vdev);</div><div class='del'>-	v4l2_device_unregister(&amp;pdev-&gt;v4l2_dev);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;v4l2_lock);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_USB_PWC_INPUT_EVDEV</div><div class='ctx'> 	if (pdev-&gt;button_dev)</div><div class='hunk'>@@ -1229,15 +1301,4 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_ALIAS("pwcx");</div><div class='ctx'> MODULE_VERSION( PWC_VERSION );</div><div class='ctx'> </div><div class='del'>-static int __init usb_pwc_init(void)</div><div class='del'>-{</div><div class='del'>-	return usb_register(&amp;pwc_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit usb_pwc_exit(void)</div><div class='del'>-{</div><div class='del'>-	usb_deregister(&amp;pwc_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(usb_pwc_init);</div><div class='del'>-module_exit(usb_pwc_exit);</div><div class='add'>+module_usb_driver(pwc_driver);</div><div class='head'>diff --git a/drivers/media/video/pwc/pwc-v4l.c b/drivers/media/video/pwc/pwc-v4l.c<br/>index 2834e3e65b39..c691e29cc36e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/pwc/pwc-v4l.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/pwc/pwc-v4l.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/pwc/pwc-v4l.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pwc/pwc-v4l.c</a></div><div class='hunk'>@@ -464,26 +464,24 @@ static int pwc_s_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f)</div><div class='ctx'> 	struct pwc_device *pdev = video_drvdata(file);</div><div class='ctx'> 	int ret, pixelformat, compression = 0;</div><div class='ctx'> </div><div class='del'>-	if (pwc_test_n_set_capt_file(pdev, file))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='ctx'> 	ret = pwc_vidioc_try_fmt(pdev, f);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	pixelformat = f-&gt;fmt.pix.pixelformat;</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;vb_queue_lock))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;pdev-&gt;udevlock);</div><div class='del'>-	if (!pdev-&gt;udev) {</div><div class='del'>-		ret = -ENODEV;</div><div class='add'>+	ret = pwc_test_n_set_capt_file(pdev, file);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto leave;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (pdev-&gt;iso_init) {</div><div class='add'>+	if (pdev-&gt;vb_queue.streaming) {</div><div class='ctx'> 		ret = -EBUSY;</div><div class='ctx'> 		goto leave;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	pixelformat = f-&gt;fmt.pix.pixelformat;</div><div class='add'>+</div><div class='ctx'> 	PWC_DEBUG_IOCTL("Trying to set format to: width=%d height=%d fps=%d "</div><div class='ctx'> 			"format=%c%c%c%c\n",</div><div class='ctx'> 			f-&gt;fmt.pix.width, f-&gt;fmt.pix.height, pdev-&gt;vframes,</div><div class='hunk'>@@ -499,7 +497,7 @@ static int pwc_s_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f)</div><div class='ctx'> </div><div class='ctx'> 	pwc_vidioc_fill_fmt(f, pdev-&gt;width, pdev-&gt;height, pdev-&gt;pixfmt);</div><div class='ctx'> leave:</div><div class='del'>-	mutex_unlock(&amp;pdev-&gt;udevlock);</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -507,9 +505,6 @@ static int pwc_querycap(struct file *file, void *fh, struct v4l2_capability *cap</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev = video_drvdata(file);</div><div class='ctx'> </div><div class='del'>-	if (!pdev-&gt;udev)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	strcpy(cap-&gt;driver, PWC_NAME);</div><div class='ctx'> 	strlcpy(cap-&gt;card, pdev-&gt;vdev.name, sizeof(cap-&gt;card));</div><div class='ctx'> 	usb_make_path(pdev-&gt;udev, cap-&gt;bus_info, sizeof(cap-&gt;bus_info));</div><div class='hunk'>@@ -540,15 +535,12 @@ static int pwc_s_input(struct file *file, void *fh, unsigned int i)</div><div class='ctx'> 	return i ? -EINVAL : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pwc_g_volatile_ctrl_unlocked(struct v4l2_ctrl *ctrl)</div><div class='add'>+static int pwc_g_volatile_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev =</div><div class='ctx'> 		container_of(ctrl-&gt;handler, struct pwc_device, ctrl_handler);</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (!pdev-&gt;udev)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	switch (ctrl-&gt;id) {</div><div class='ctx'> 	case V4L2_CID_AUTO_WHITE_BALANCE:</div><div class='ctx'> 		if (pdev-&gt;color_bal_valid &amp;&amp;</div><div class='hunk'>@@ -615,18 +607,6 @@ static int pwc_g_volatile_ctrl_unlocked(struct v4l2_ctrl *ctrl)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pwc_g_volatile_ctrl(struct v4l2_ctrl *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct pwc_device *pdev =</div><div class='del'>-		container_of(ctrl-&gt;handler, struct pwc_device, ctrl_handler);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;pdev-&gt;udevlock);</div><div class='del'>-	ret = pwc_g_volatile_ctrl_unlocked(ctrl);</div><div class='del'>-	mutex_unlock(&amp;pdev-&gt;udevlock);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int pwc_set_awb(struct pwc_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -648,7 +628,7 @@ static int pwc_set_awb(struct pwc_device *pdev)</div><div class='ctx'> 		if (pdev-&gt;auto_white_balance-&gt;val == awb_indoor ||</div><div class='ctx'> 		    pdev-&gt;auto_white_balance-&gt;val == awb_outdoor ||</div><div class='ctx'> 		    pdev-&gt;auto_white_balance-&gt;val == awb_fl)</div><div class='del'>-			pwc_g_volatile_ctrl_unlocked(pdev-&gt;auto_white_balance);</div><div class='add'>+			pwc_g_volatile_ctrl(pdev-&gt;auto_white_balance);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (pdev-&gt;auto_white_balance-&gt;val != awb_manual)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -812,13 +792,6 @@ static int pwc_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> 		container_of(ctrl-&gt;handler, struct pwc_device, ctrl_handler);</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;pdev-&gt;udevlock);</div><div class='del'>-</div><div class='del'>-	if (!pdev-&gt;udev) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto leave;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	switch (ctrl-&gt;id) {</div><div class='ctx'> 	case V4L2_CID_BRIGHTNESS:</div><div class='ctx'> 		ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL,</div><div class='hunk'>@@ -915,8 +888,6 @@ static int pwc_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		PWC_ERROR("s_ctrl %s error %d\n", ctrl-&gt;name, ret);</div><div class='ctx'> </div><div class='del'>-leave:</div><div class='del'>-	mutex_unlock(&amp;pdev-&gt;udevlock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -949,11 +920,9 @@ static int pwc_g_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f)</div><div class='ctx'> 	if (f-&gt;type != V4L2_BUF_TYPE_VIDEO_CAPTURE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;pdev-&gt;udevlock); /* To avoid race with s_fmt */</div><div class='ctx'> 	PWC_DEBUG_IOCTL("ioctl(VIDIOC_G_FMT) return size %dx%d\n",</div><div class='ctx'> 			pdev-&gt;width, pdev-&gt;height);</div><div class='ctx'> 	pwc_vidioc_fill_fmt(f, pdev-&gt;width, pdev-&gt;height, pdev-&gt;pixfmt);</div><div class='del'>-	mutex_unlock(&amp;pdev-&gt;udevlock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -968,70 +937,98 @@ static int pwc_reqbufs(struct file *file, void *fh,</div><div class='ctx'> 		       struct v4l2_requestbuffers *rb)</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev = video_drvdata(file);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (pwc_test_n_set_capt_file(pdev, file))</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;vb_queue_lock))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='ctx'> </div><div class='del'>-	return vb2_reqbufs(&amp;pdev-&gt;vb_queue, rb);</div><div class='add'>+	ret = pwc_test_n_set_capt_file(pdev, file);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		ret = vb2_reqbufs(&amp;pdev-&gt;vb_queue, rb);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pwc_querybuf(struct file *file, void *fh, struct v4l2_buffer *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev = video_drvdata(file);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	return vb2_querybuf(&amp;pdev-&gt;vb_queue, buf);</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;vb_queue_lock))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='add'>+</div><div class='add'>+	ret = pwc_test_n_set_capt_file(pdev, file);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		ret = vb2_querybuf(&amp;pdev-&gt;vb_queue, buf);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pwc_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev = video_drvdata(file);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!pdev-&gt;udev)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;vb_queue_lock))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='ctx'> </div><div class='del'>-	if (pdev-&gt;capt_file != file)</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	ret = pwc_test_n_set_capt_file(pdev, file);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		ret = vb2_qbuf(&amp;pdev-&gt;vb_queue, buf);</div><div class='ctx'> </div><div class='del'>-	return vb2_qbuf(&amp;pdev-&gt;vb_queue, buf);</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pwc_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev = video_drvdata(file);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!pdev-&gt;udev)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;vb_queue_lock))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='ctx'> </div><div class='del'>-	if (pdev-&gt;capt_file != file)</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	ret = pwc_test_n_set_capt_file(pdev, file);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		ret = vb2_dqbuf(&amp;pdev-&gt;vb_queue, buf,</div><div class='add'>+				file-&gt;f_flags &amp; O_NONBLOCK);</div><div class='ctx'> </div><div class='del'>-	return vb2_dqbuf(&amp;pdev-&gt;vb_queue, buf, file-&gt;f_flags &amp; O_NONBLOCK);</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pwc_streamon(struct file *file, void *fh, enum v4l2_buf_type i)</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev = video_drvdata(file);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!pdev-&gt;udev)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;vb_queue_lock))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='ctx'> </div><div class='del'>-	if (pdev-&gt;capt_file != file)</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	ret = pwc_test_n_set_capt_file(pdev, file);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		ret = vb2_streamon(&amp;pdev-&gt;vb_queue, i);</div><div class='ctx'> </div><div class='del'>-	return vb2_streamon(&amp;pdev-&gt;vb_queue, i);</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pwc_streamoff(struct file *file, void *fh, enum v4l2_buf_type i)</div><div class='ctx'> {</div><div class='ctx'> 	struct pwc_device *pdev = video_drvdata(file);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!pdev-&gt;udev)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;vb_queue_lock))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='ctx'> </div><div class='del'>-	if (pdev-&gt;capt_file != file)</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	ret = pwc_test_n_set_capt_file(pdev, file);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		ret = vb2_streamoff(&amp;pdev-&gt;vb_queue, i);</div><div class='ctx'> </div><div class='del'>-	return vb2_streamoff(&amp;pdev-&gt;vb_queue, i);</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pwc_enum_framesizes(struct file *file, void *fh,</div><div class='hunk'>@@ -1119,19 +1116,17 @@ static int pwc_s_parm(struct file *file, void *fh,</div><div class='ctx'> 	    parm-&gt;parm.capture.timeperframe.numerator == 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (pwc_test_n_set_capt_file(pdev, file))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='ctx'> 	fps = parm-&gt;parm.capture.timeperframe.denominator /</div><div class='ctx'> 	      parm-&gt;parm.capture.timeperframe.numerator;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;pdev-&gt;udevlock);</div><div class='del'>-	if (!pdev-&gt;udev) {</div><div class='del'>-		ret = -ENODEV;</div><div class='add'>+	if (mutex_lock_interruptible(&amp;pdev-&gt;vb_queue_lock))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='add'>+</div><div class='add'>+	ret = pwc_test_n_set_capt_file(pdev, file);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto leave;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (pdev-&gt;iso_init) {</div><div class='add'>+	if (pdev-&gt;vb_queue.streaming) {</div><div class='ctx'> 		ret = -EBUSY;</div><div class='ctx'> 		goto leave;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1142,7 +1137,7 @@ static int pwc_s_parm(struct file *file, void *fh,</div><div class='ctx'> 	pwc_g_parm(file, fh, parm);</div><div class='ctx'> </div><div class='ctx'> leave:</div><div class='del'>-	mutex_unlock(&amp;pdev-&gt;udevlock);</div><div class='add'>+	mutex_unlock(&amp;pdev-&gt;vb_queue_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1166,4 +1161,6 @@ const struct v4l2_ioctl_ops pwc_ioctl_ops = {</div><div class='ctx'> 	.vidioc_enum_frameintervals	    = pwc_enum_frameintervals,</div><div class='ctx'> 	.vidioc_g_parm			    = pwc_g_parm,</div><div class='ctx'> 	.vidioc_s_parm			    = pwc_s_parm,</div><div class='add'>+	.vidioc_subscribe_event		    = v4l2_ctrl_subscribe_event,</div><div class='add'>+	.vidioc_unsubscribe_event	    = v4l2_event_unsubscribe,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/media/video/pwc/pwc.h b/drivers/media/video/pwc/pwc.h<br/>index e4d4d711dd1f..d6b5b216b9d6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/pwc/pwc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/pwc/pwc.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/pwc/pwc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pwc/pwc.h</a></div><div class='hunk'>@@ -221,9 +221,17 @@ struct pwc_device</div><div class='ctx'> 	struct video_device vdev;</div><div class='ctx'> 	struct v4l2_device v4l2_dev;</div><div class='ctx'> </div><div class='del'>-	/* Pointer to our usb_device, may be NULL after unplug */</div><div class='del'>-	struct usb_device *udev;</div><div class='del'>-	struct mutex udevlock;</div><div class='add'>+	/* videobuf2 queue and queued buffers list */</div><div class='add'>+	struct vb2_queue vb_queue;</div><div class='add'>+	struct list_head queued_bufs;</div><div class='add'>+	spinlock_t queued_bufs_lock; /* Protects queued_bufs */</div><div class='add'>+</div><div class='add'>+	/* Note if taking both locks v4l2_lock must always be locked first! */</div><div class='add'>+	struct mutex v4l2_lock;      /* Protects everything else */</div><div class='add'>+	struct mutex vb_queue_lock;  /* Protects vb_queue and capt_file */</div><div class='add'>+</div><div class='add'>+	/* Pointer to our usb_device, will be NULL after unplug */</div><div class='add'>+	struct usb_device *udev; /* Both mutexes most be hold when setting! */</div><div class='ctx'> </div><div class='ctx'> 	/* type of cam (645, 646, 675, 680, 690, 720, 730, 740, 750) */</div><div class='ctx'> 	int type;</div><div class='hunk'>@@ -232,7 +240,6 @@ struct pwc_device</div><div class='ctx'> </div><div class='ctx'> 	/*** Video data ***/</div><div class='ctx'> 	struct file *capt_file;	/* file doing video capture */</div><div class='del'>-	struct mutex capt_file_lock;</div><div class='ctx'> 	int vendpoint;		/* video isoc endpoint */</div><div class='ctx'> 	int vcinterface;	/* video control interface */</div><div class='ctx'> 	int valternate;		/* alternate interface needed */</div><div class='hunk'>@@ -251,12 +258,6 @@ struct pwc_device</div><div class='ctx'> 	unsigned char *ctrl_buf;</div><div class='ctx'> </div><div class='ctx'> 	struct urb *urbs[MAX_ISO_BUFS];</div><div class='del'>-	char iso_init;</div><div class='del'>-</div><div class='del'>-	/* videobuf2 queue and queued buffers list */</div><div class='del'>-	struct vb2_queue vb_queue;</div><div class='del'>-	struct list_head queued_bufs;</div><div class='del'>-	spinlock_t queued_bufs_lock;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Frame currently being filled, this only gets touched by the</div><div class='head'>diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c<br/>index 5a413f4427e0..9c21e01f2c24 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/pxa_camera.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/pxa_camera.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/pxa_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/pxa_camera.c</a></div><div class='hunk'>@@ -241,15 +241,10 @@ static int pxa_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,</div><div class='ctx'> 			      unsigned int *size)</div><div class='ctx'> {</div><div class='ctx'> 	struct soc_camera_device *icd = vq-&gt;priv_data;</div><div class='del'>-	int bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-						icd-&gt;current_fmt-&gt;host_fmt);</div><div class='del'>-</div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		return bytes_per_line;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(icd-&gt;parent, "count=%d, size=%d\n", *count, *size);</div><div class='ctx'> </div><div class='del'>-	*size = bytes_per_line * icd-&gt;user_height;</div><div class='add'>+	*size = icd-&gt;sizeimage;</div><div class='ctx'> </div><div class='ctx'> 	if (0 == *count)</div><div class='ctx'> 		*count = 32;</div><div class='hunk'>@@ -435,11 +430,6 @@ static int pxa_videobuf_prepare(struct videobuf_queue *vq,</div><div class='ctx'> 	struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb);</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int size_y, size_u = 0, size_v = 0;</div><div class='del'>-	int bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-						icd-&gt;current_fmt-&gt;host_fmt);</div><div class='del'>-</div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		return bytes_per_line;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,</div><div class='ctx'> 		vb, vb-&gt;baddr, vb-&gt;bsize);</div><div class='hunk'>@@ -474,7 +464,7 @@ static int pxa_videobuf_prepare(struct videobuf_queue *vq,</div><div class='ctx'> 		vb-&gt;state	= VIDEOBUF_NEEDS_INIT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vb-&gt;size = bytes_per_line * vb-&gt;height;</div><div class='add'>+	vb-&gt;size = icd-&gt;sizeimage;</div><div class='ctx'> 	if (0 != vb-&gt;baddr &amp;&amp; vb-&gt;bsize &lt; vb-&gt;size) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -1244,6 +1234,7 @@ static const struct soc_mbus_pixelfmt pxa_camera_formats[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PLANAR_2Y_U_V,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/s2255drv.c b/drivers/media/video/s2255drv.c<br/>index 4894cbb1c547..01c2179f0520 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s2255drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s2255drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s2255drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s2255drv.c</a></div><div class='hunk'>@@ -634,13 +634,11 @@ static void s2255_fillbuff(struct s2255_channel *channel,</div><div class='ctx'> 	const char *tmpbuf;</div><div class='ctx'> 	char *vbuf = videobuf_to_vmalloc(&amp;buf-&gt;vb);</div><div class='ctx'> 	unsigned long last_frame;</div><div class='del'>-	struct s2255_framei *frm;</div><div class='ctx'> </div><div class='ctx'> 	if (!vbuf)</div><div class='ctx'> 		return;</div><div class='ctx'> 	last_frame = channel-&gt;last_frame;</div><div class='ctx'> 	if (last_frame != -1) {</div><div class='del'>-		frm = &amp;channel-&gt;buffer.frame[last_frame];</div><div class='ctx'> 		tmpbuf =</div><div class='ctx'> 		    (const char *)channel-&gt;buffer.frame[last_frame].lpvbits;</div><div class='ctx'> 		switch (buf-&gt;fmt-&gt;fourcc) {</div><div class='hunk'>@@ -987,7 +985,6 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,</div><div class='ctx'> 	struct videobuf_queue *q = &amp;fh-&gt;vb_vidq;</div><div class='ctx'> 	struct s2255_mode mode;</div><div class='ctx'> 	int ret;</div><div class='del'>-	int norm;</div><div class='ctx'> </div><div class='ctx'> 	ret = vidioc_try_fmt_vid_cap(file, fh, f);</div><div class='ctx'> </div><div class='hunk'>@@ -1018,7 +1015,6 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,</div><div class='ctx'> 	channel-&gt;height = f-&gt;fmt.pix.height;</div><div class='ctx'> 	fh-&gt;vb_vidq.field = f-&gt;fmt.pix.field;</div><div class='ctx'> 	fh-&gt;type = f-&gt;type;</div><div class='del'>-	norm = norm_minw(&amp;channel-&gt;vdev);</div><div class='ctx'> 	if (channel-&gt;width &gt; norm_minw(&amp;channel-&gt;vdev)) {</div><div class='ctx'> 		if (channel-&gt;height &gt; norm_minh(&amp;channel-&gt;vdev)) {</div><div class='ctx'> 			if (channel-&gt;cap_parm.capturemode &amp;</div><div class='hunk'>@@ -1826,8 +1822,7 @@ static void s2255_destroy(struct s2255_dev *dev)</div><div class='ctx'> 		usb_free_urb(dev-&gt;fw_data-&gt;fw_urb);</div><div class='ctx'> 		dev-&gt;fw_data-&gt;fw_urb = NULL;</div><div class='ctx'> 	}</div><div class='del'>-	if (dev-&gt;fw_data-&gt;fw)</div><div class='del'>-		release_firmware(dev-&gt;fw_data-&gt;fw);</div><div class='add'>+	release_firmware(dev-&gt;fw_data-&gt;fw);</div><div class='ctx'> 	kfree(dev-&gt;fw_data-&gt;pfw_data);</div><div class='ctx'> 	kfree(dev-&gt;fw_data);</div><div class='ctx'> 	/* reset the DSP so firmware can be reloaded next time */</div><div class='hunk'>@@ -1949,6 +1944,10 @@ static int s2255_probe_v4l(struct s2255_dev *dev)</div><div class='ctx'> 		/* register 4 video devices */</div><div class='ctx'> 		channel-&gt;vdev = template;</div><div class='ctx'> 		channel-&gt;vdev.lock = &amp;dev-&gt;lock;</div><div class='add'>+		/* Locking in file operations other than ioctl should be done</div><div class='add'>+		   by the driver, not the V4L2 core.</div><div class='add'>+		   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+		set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;channel-&gt;vdev.flags);</div><div class='ctx'> 		channel-&gt;vdev.v4l2_dev = &amp;dev-&gt;v4l2_dev;</div><div class='ctx'> 		video_set_drvdata(&amp;channel-&gt;vdev, channel);</div><div class='ctx'> 		if (video_nr == -1)</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/Kconfig b/drivers/media/video/s5p-fimc/Kconfig<br/>new file mode 100644<br/>index 000000000000..a564f7eeb064<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+</div><div class='add'>+config VIDEO_SAMSUNG_S5P_FIMC</div><div class='add'>+	bool "Samsung S5P/EXYNOS SoC camera interface driver (experimental)"</div><div class='add'>+	depends on VIDEO_V4L2 &amp;&amp; VIDEO_V4L2_SUBDEV_API &amp;&amp; PLAT_S5P &amp;&amp; PM_RUNTIME</div><div class='add'>+	depends on EXPERIMENTAL</div><div class='add'>+	help</div><div class='add'>+	  Say Y here to enable camera host interface devices for</div><div class='add'>+	  Samsung S5P and EXYNOS SoC series.</div><div class='add'>+</div><div class='add'>+if VIDEO_SAMSUNG_S5P_FIMC</div><div class='add'>+</div><div class='add'>+config VIDEO_S5P_FIMC</div><div class='add'>+	tristate "S5P/EXYNOS4 FIMC/CAMIF camera interface driver"</div><div class='add'>+	depends on I2C</div><div class='add'>+	select VIDEOBUF2_DMA_CONTIG</div><div class='add'>+	select V4L2_MEM2MEM_DEV</div><div class='add'>+	help</div><div class='add'>+	  This is a V4L2 driver for Samsung S5P and EXYNOS4 SoC camera host</div><div class='add'>+	  interface and video postprocessor (FIMC and FIMC-LITE) devices.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called s5p-fimc.</div><div class='add'>+</div><div class='add'>+config VIDEO_S5P_MIPI_CSIS</div><div class='add'>+	tristate "S5P/EXYNOS MIPI-CSI2 receiver (MIPI-CSIS) driver"</div><div class='add'>+	depends on REGULATOR</div><div class='add'>+	help</div><div class='add'>+	  This is a V4L2 driver for Samsung S5P and EXYNOS4 SoC MIPI-CSI2</div><div class='add'>+	  receiver (MIPI-CSIS) devices.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called s5p-csis.</div><div class='add'>+</div><div class='add'>+if ARCH_EXYNOS</div><div class='add'>+</div><div class='add'>+config VIDEO_EXYNOS_FIMC_LITE</div><div class='add'>+	tristate "EXYNOS FIMC-LITE camera interface driver"</div><div class='add'>+	depends on I2C</div><div class='add'>+	select VIDEOBUF2_DMA_CONTIG</div><div class='add'>+	help</div><div class='add'>+	  This is a V4L2 driver for Samsung EXYNOS4/5 SoC FIMC-LITE camera</div><div class='add'>+	  host interface.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called exynos-fimc-lite.</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+endif # VIDEO_SAMSUNG_S5P_FIMC</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/Makefile b/drivers/media/video/s5p-fimc/Makefile<br/>index 33dec7f890e7..46485143e1ca 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-fimc/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/Makefile</a></div><div class='hunk'>@@ -1,5 +1,7 @@</div><div class='del'>-s5p-fimc-objs := fimc-core.o fimc-reg.o fimc-capture.o fimc-mdevice.o</div><div class='add'>+s5p-fimc-objs := fimc-core.o fimc-reg.o fimc-m2m.o fimc-capture.o fimc-mdevice.o</div><div class='add'>+exynos-fimc-lite-objs += fimc-lite-reg.o fimc-lite.o</div><div class='ctx'> s5p-csis-objs := mipi-csis.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_VIDEO_S5P_MIPI_CSIS)	+= s5p-csis.o</div><div class='del'>-obj-$(CONFIG_VIDEO_SAMSUNG_S5P_FIMC)	+= s5p-fimc.o</div><div class='add'>+obj-$(CONFIG_VIDEO_EXYNOS_FIMC_LITE)	+= exynos-fimc-lite.o</div><div class='add'>+obj-$(CONFIG_VIDEO_S5P_FIMC)		+= s5p-fimc.o</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c<br/>index b06efd208328..354574591908 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-capture.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-fimc/fimc-capture.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-capture.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-capture.c</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2010 - 2011 Samsung Electronics Co., Ltd.</div><div class='del'>- * Author: Sylwester Nawrocki, &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+ * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='hunk'>@@ -29,20 +29,22 @@</div><div class='ctx'> </div><div class='ctx'> #include "fimc-mdevice.h"</div><div class='ctx'> #include "fimc-core.h"</div><div class='add'>+#include "fimc-reg.h"</div><div class='ctx'> </div><div class='del'>-static int fimc_init_capture(struct fimc_dev *fimc)</div><div class='add'>+static int fimc_capture_hw_init(struct fimc_dev *fimc)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_ctx *ctx = fimc-&gt;vid_cap.ctx;</div><div class='add'>+	struct fimc_pipeline *p = &amp;fimc-&gt;pipeline;</div><div class='ctx'> 	struct fimc_sensor_info *sensor;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (fimc-&gt;pipeline.sensor == NULL || ctx == NULL)</div><div class='add'>+	if (p-&gt;subdevs[IDX_SENSOR] == NULL || ctx == NULL)</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	if (ctx-&gt;s_frame.fmt == NULL)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	sensor = v4l2_get_subdev_hostdata(fimc-&gt;pipeline.sensor);</div><div class='add'>+	sensor = v4l2_get_subdev_hostdata(p-&gt;subdevs[IDX_SENSOR]);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='ctx'> 	fimc_prepare_dma_offset(ctx, &amp;ctx-&gt;d_frame);</div><div class='hunk'>@@ -60,7 +62,7 @@ static int fimc_init_capture(struct fimc_dev *fimc)</div><div class='ctx'> 		fimc_hw_set_mainscaler(ctx);</div><div class='ctx'> 		fimc_hw_set_target_format(ctx);</div><div class='ctx'> 		fimc_hw_set_rotation(ctx);</div><div class='del'>-		fimc_hw_set_effect(ctx, false);</div><div class='add'>+		fimc_hw_set_effect(ctx);</div><div class='ctx'> 		fimc_hw_set_output_path(ctx);</div><div class='ctx'> 		fimc_hw_set_out_dma(ctx);</div><div class='ctx'> 		if (fimc-&gt;variant-&gt;has_alpha)</div><div class='hunk'>@@ -71,6 +73,14 @@ static int fimc_init_capture(struct fimc_dev *fimc)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Reinitialize the driver so it is ready to start the streaming again.</div><div class='add'>+ * Set fimc-&gt;state to indicate stream off and the hardware shut down state.</div><div class='add'>+ * If not suspending (@suspend is false), return any buffers to videobuf2.</div><div class='add'>+ * Otherwise put any owned buffers onto the pending buffers queue, so they</div><div class='add'>+ * can be re-spun when the device is being resumed. Also perform FIMC</div><div class='add'>+ * software reset and disable streaming on the whole pipeline if required.</div><div class='add'>+ */</div><div class='ctx'> static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_vid_cap *cap = &amp;fimc-&gt;vid_cap;</div><div class='hunk'>@@ -83,7 +93,9 @@ static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)</div><div class='ctx'> </div><div class='ctx'> 	fimc-&gt;state &amp;= ~(1 &lt;&lt; ST_CAPT_RUN | 1 &lt;&lt; ST_CAPT_SHUT |</div><div class='ctx'> 			 1 &lt;&lt; ST_CAPT_STREAM | 1 &lt;&lt; ST_CAPT_ISP_STREAM);</div><div class='del'>-	if (!suspend)</div><div class='add'>+	if (suspend)</div><div class='add'>+		fimc-&gt;state |= (1 &lt;&lt; ST_CAPT_SUSPENDED);</div><div class='add'>+	else</div><div class='ctx'> 		fimc-&gt;state &amp;= ~(1 &lt;&lt; ST_CAPT_PEND | 1 &lt;&lt; ST_CAPT_SUSPENDED);</div><div class='ctx'> </div><div class='ctx'> 	/* Release unused buffers */</div><div class='hunk'>@@ -99,7 +111,6 @@ static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)</div><div class='ctx'> 		else</div><div class='ctx'> 			vb2_buffer_done(&amp;buf-&gt;vb, VB2_BUF_STATE_ERROR);</div><div class='ctx'> 	}</div><div class='del'>-	set_bit(ST_CAPT_SUSPENDED, &amp;fimc-&gt;state);</div><div class='ctx'> </div><div class='ctx'> 	fimc_hw_reset(fimc);</div><div class='ctx'> 	cap-&gt;buf_index = 0;</div><div class='hunk'>@@ -107,7 +118,7 @@ static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (streaming)</div><div class='del'>-		return fimc_pipeline_s_stream(fimc, 0);</div><div class='add'>+		return fimc_pipeline_s_stream(&amp;fimc-&gt;pipeline, 0);</div><div class='ctx'> 	else</div><div class='ctx'> 		return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -138,32 +149,96 @@ static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)</div><div class='ctx'>  * spinlock held. It updates the camera pixel crop, rotation and</div><div class='ctx'>  * image flip in H/W.</div><div class='ctx'>  */</div><div class='del'>-int fimc_capture_config_update(struct fimc_ctx *ctx)</div><div class='add'>+static int fimc_capture_config_update(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!test_bit(ST_CAPT_APPLY_CFG, &amp;fimc-&gt;state))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;ctx-&gt;slock);</div><div class='ctx'> 	fimc_hw_set_camera_offset(fimc, &amp;ctx-&gt;s_frame);</div><div class='add'>+</div><div class='ctx'> 	ret = fimc_set_scaler_info(ctx);</div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		fimc_hw_set_prescaler(ctx);</div><div class='del'>-		fimc_hw_set_mainscaler(ctx);</div><div class='del'>-		fimc_hw_set_target_format(ctx);</div><div class='del'>-		fimc_hw_set_rotation(ctx);</div><div class='del'>-		fimc_prepare_dma_offset(ctx, &amp;ctx-&gt;d_frame);</div><div class='del'>-		fimc_hw_set_out_dma(ctx);</div><div class='del'>-		if (fimc-&gt;variant-&gt;has_alpha)</div><div class='del'>-			fimc_hw_set_rgb_alpha(ctx);</div><div class='del'>-		clear_bit(ST_CAPT_APPLY_CFG, &amp;fimc-&gt;state);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;ctx-&gt;slock);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	fimc_hw_set_prescaler(ctx);</div><div class='add'>+	fimc_hw_set_mainscaler(ctx);</div><div class='add'>+	fimc_hw_set_target_format(ctx);</div><div class='add'>+	fimc_hw_set_rotation(ctx);</div><div class='add'>+	fimc_hw_set_effect(ctx);</div><div class='add'>+	fimc_prepare_dma_offset(ctx, &amp;ctx-&gt;d_frame);</div><div class='add'>+	fimc_hw_set_out_dma(ctx);</div><div class='add'>+	if (fimc-&gt;variant-&gt;has_alpha)</div><div class='add'>+		fimc_hw_set_rgb_alpha(ctx);</div><div class='add'>+</div><div class='add'>+	clear_bit(ST_CAPT_APPLY_CFG, &amp;fimc-&gt;state);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)</div><div class='add'>+{</div><div class='add'>+	struct fimc_vid_cap *cap = &amp;fimc-&gt;vid_cap;</div><div class='add'>+	struct fimc_vid_buffer *v_buf;</div><div class='add'>+	struct timeval *tv;</div><div class='add'>+	struct timespec ts;</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_bit(ST_CAPT_SHUT, &amp;fimc-&gt;state)) {</div><div class='add'>+		wake_up(&amp;fimc-&gt;irq_queue);</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!list_empty(&amp;cap-&gt;active_buf_q) &amp;&amp;</div><div class='add'>+	    test_bit(ST_CAPT_RUN, &amp;fimc-&gt;state) &amp;&amp; deq_buf) {</div><div class='add'>+		ktime_get_real_ts(&amp;ts);</div><div class='add'>+</div><div class='add'>+		v_buf = fimc_active_queue_pop(cap);</div><div class='add'>+</div><div class='add'>+		tv = &amp;v_buf-&gt;vb.v4l2_buf.timestamp;</div><div class='add'>+		tv-&gt;tv_sec = ts.tv_sec;</div><div class='add'>+		tv-&gt;tv_usec = ts.tv_nsec / NSEC_PER_USEC;</div><div class='add'>+		v_buf-&gt;vb.v4l2_buf.sequence = cap-&gt;frame_count++;</div><div class='add'>+</div><div class='add'>+		vb2_buffer_done(&amp;v_buf-&gt;vb, VB2_BUF_STATE_DONE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!list_empty(&amp;cap-&gt;pending_buf_q)) {</div><div class='add'>+</div><div class='add'>+		v_buf = fimc_pending_queue_pop(cap);</div><div class='add'>+		fimc_hw_set_output_addr(fimc, &amp;v_buf-&gt;paddr, cap-&gt;buf_index);</div><div class='add'>+		v_buf-&gt;index = cap-&gt;buf_index;</div><div class='add'>+</div><div class='add'>+		/* Move the buffer to the capture active queue */</div><div class='add'>+		fimc_active_queue_add(cap, v_buf);</div><div class='add'>+</div><div class='add'>+		dbg("next frame: %d, done frame: %d",</div><div class='add'>+		    fimc_hw_get_frame_index(fimc), v_buf-&gt;index);</div><div class='add'>+</div><div class='add'>+		if (++cap-&gt;buf_index &gt;= FIMC_MAX_OUT_BUFS)</div><div class='add'>+			cap-&gt;buf_index = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cap-&gt;active_buf_cnt == 0) {</div><div class='add'>+		if (deq_buf)</div><div class='add'>+			clear_bit(ST_CAPT_RUN, &amp;fimc-&gt;state);</div><div class='add'>+</div><div class='add'>+		if (++cap-&gt;buf_index &gt;= FIMC_MAX_OUT_BUFS)</div><div class='add'>+			cap-&gt;buf_index = 0;</div><div class='add'>+	} else {</div><div class='add'>+		set_bit(ST_CAPT_RUN, &amp;fimc-&gt;state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (test_bit(ST_CAPT_APPLY_CFG, &amp;fimc-&gt;state))</div><div class='add'>+		fimc_capture_config_update(cap-&gt;ctx);</div><div class='add'>+done:</div><div class='add'>+	if (cap-&gt;active_buf_cnt == 1) {</div><div class='add'>+		fimc_deactivate_capture(fimc);</div><div class='add'>+		clear_bit(ST_CAPT_STREAM, &amp;fimc-&gt;state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dbg("frame: %d, active_buf_cnt: %d",</div><div class='add'>+	    fimc_hw_get_frame_index(fimc), cap-&gt;active_buf_cnt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> static int start_streaming(struct vb2_queue *q, unsigned int count)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_ctx *ctx = q-&gt;drv_priv;</div><div class='hunk'>@@ -174,9 +249,11 @@ static int start_streaming(struct vb2_queue *q, unsigned int count)</div><div class='ctx'> </div><div class='ctx'> 	vid_cap-&gt;frame_count = 0;</div><div class='ctx'> </div><div class='del'>-	ret = fimc_init_capture(fimc);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto error;</div><div class='add'>+	ret = fimc_capture_hw_init(fimc);</div><div class='add'>+	if (ret) {</div><div class='add'>+		fimc_capture_state_cleanup(fimc, false);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	set_bit(ST_CAPT_PEND, &amp;fimc-&gt;state);</div><div class='ctx'> </div><div class='hunk'>@@ -187,13 +264,10 @@ static int start_streaming(struct vb2_queue *q, unsigned int count)</div><div class='ctx'> 		fimc_activate_capture(ctx);</div><div class='ctx'> </div><div class='ctx'> 		if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &amp;fimc-&gt;state))</div><div class='del'>-			fimc_pipeline_s_stream(fimc, 1);</div><div class='add'>+			fimc_pipeline_s_stream(&amp;fimc-&gt;pipeline, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-error:</div><div class='del'>-	fimc_capture_state_cleanup(fimc, false);</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int stop_streaming(struct vb2_queue *q)</div><div class='hunk'>@@ -214,7 +288,7 @@ int fimc_capture_suspend(struct fimc_dev *fimc)</div><div class='ctx'> 	int ret = fimc_stop_capture(fimc, suspend);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	return fimc_pipeline_shutdown(fimc);</div><div class='add'>+	return fimc_pipeline_shutdown(&amp;fimc-&gt;pipeline);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void buffer_queue(struct vb2_buffer *vb);</div><div class='hunk'>@@ -230,9 +304,9 @@ int fimc_capture_resume(struct fimc_dev *fimc)</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;fimc-&gt;vid_cap.active_buf_q);</div><div class='ctx'> 	vid_cap-&gt;buf_index = 0;</div><div class='del'>-	fimc_pipeline_initialize(fimc, &amp;fimc-&gt;vid_cap.vfd-&gt;entity,</div><div class='add'>+	fimc_pipeline_initialize(&amp;fimc-&gt;pipeline, &amp;vid_cap-&gt;vfd-&gt;entity,</div><div class='ctx'> 				 false);</div><div class='del'>-	fimc_init_capture(fimc);</div><div class='add'>+	fimc_capture_hw_init(fimc);</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(ST_CAPT_SUSPENDED, &amp;fimc-&gt;state);</div><div class='ctx'> </div><div class='hunk'>@@ -246,28 +320,37 @@ int fimc_capture_resume(struct fimc_dev *fimc)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int get_plane_size(struct fimc_frame *fr, unsigned int plane)</div><div class='del'>-{</div><div class='del'>-	if (!fr || plane &gt;= fr-&gt;fmt-&gt;memplanes)</div><div class='del'>-		return 0;</div><div class='del'>-	return fr-&gt;f_width * fr-&gt;f_height * fr-&gt;fmt-&gt;depth[plane] / 8;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int queue_setup(struct vb2_queue *vq,  const struct v4l2_format *pfmt,</div><div class='add'>+static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,</div><div class='ctx'> 		       unsigned int *num_buffers, unsigned int *num_planes,</div><div class='ctx'> 		       unsigned int sizes[], void *allocators[])</div><div class='ctx'> {</div><div class='add'>+	const struct v4l2_pix_format_mplane *pixm = NULL;</div><div class='ctx'> 	struct fimc_ctx *ctx = vq-&gt;drv_priv;</div><div class='del'>-	struct fimc_fmt *fmt = ctx-&gt;d_frame.fmt;</div><div class='add'>+	struct fimc_frame *frame = &amp;ctx-&gt;d_frame;</div><div class='add'>+	struct fimc_fmt *fmt = frame-&gt;fmt;</div><div class='add'>+	unsigned long wh;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!fmt)</div><div class='add'>+	if (pfmt) {</div><div class='add'>+		pixm = &amp;pfmt-&gt;fmt.pix_mp;</div><div class='add'>+		fmt = fimc_find_format(&amp;pixm-&gt;pixelformat, NULL,</div><div class='add'>+				       FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);</div><div class='add'>+		wh = pixm-&gt;width * pixm-&gt;height;</div><div class='add'>+	} else {</div><div class='add'>+		wh = frame-&gt;f_width * frame-&gt;f_height;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fmt == NULL)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	*num_planes = fmt-&gt;memplanes;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; fmt-&gt;memplanes; i++) {</div><div class='del'>-		sizes[i] = get_plane_size(&amp;ctx-&gt;d_frame, i);</div><div class='add'>+		unsigned int size = (wh * fmt-&gt;depth[i]) / 8;</div><div class='add'>+		if (pixm)</div><div class='add'>+			sizes[i] = max(size, pixm-&gt;plane_fmt[i].sizeimage);</div><div class='add'>+		else</div><div class='add'>+			sizes[i] = size;</div><div class='ctx'> 		allocators[i] = ctx-&gt;fimc_dev-&gt;alloc_ctx;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -338,7 +421,7 @@ static void buffer_queue(struct vb2_buffer *vb)</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='ctx'> </div><div class='ctx'> 		if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &amp;fimc-&gt;state))</div><div class='del'>-			fimc_pipeline_s_stream(fimc, 1);</div><div class='add'>+			fimc_pipeline_s_stream(&amp;fimc-&gt;pipeline, 1);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='hunk'>@@ -380,15 +463,15 @@ int fimc_capture_ctrls_create(struct fimc_dev *fimc)</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(vid_cap-&gt;ctx == NULL))</div><div class='ctx'> 		return -ENXIO;</div><div class='del'>-	if (vid_cap-&gt;ctx-&gt;ctrls_rdy)</div><div class='add'>+	if (vid_cap-&gt;ctx-&gt;ctrls.ready)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = fimc_ctrls_create(vid_cap-&gt;ctx);</div><div class='del'>-	if (ret || vid_cap-&gt;user_subdev_api)</div><div class='add'>+	if (ret || vid_cap-&gt;user_subdev_api || !vid_cap-&gt;ctx-&gt;ctrls.ready)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return v4l2_ctrl_add_handler(&amp;vid_cap-&gt;ctx-&gt;ctrl_handler,</div><div class='del'>-				    fimc-&gt;pipeline.sensor-&gt;ctrl_handler);</div><div class='add'>+	return v4l2_ctrl_add_handler(&amp;vid_cap-&gt;ctx-&gt;ctrls.handler,</div><div class='add'>+		    fimc-&gt;pipeline.subdevs[IDX_SENSOR]-&gt;ctrl_handler);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int fimc_capture_set_default_format(struct fimc_dev *fimc);</div><div class='hunk'>@@ -411,7 +494,7 @@ static int fimc_capture_open(struct file *file)</div><div class='ctx'> 	pm_runtime_get_sync(&amp;fimc-&gt;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	if (++fimc-&gt;vid_cap.refcnt == 1) {</div><div class='del'>-		ret = fimc_pipeline_initialize(fimc,</div><div class='add'>+		ret = fimc_pipeline_initialize(&amp;fimc-&gt;pipeline,</div><div class='ctx'> 			       &amp;fimc-&gt;vid_cap.vfd-&gt;entity, true);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			dev_err(&amp;fimc-&gt;pdev-&gt;dev,</div><div class='hunk'>@@ -439,7 +522,7 @@ static int fimc_capture_close(struct file *file)</div><div class='ctx'> 	if (--fimc-&gt;vid_cap.refcnt == 0) {</div><div class='ctx'> 		clear_bit(ST_CAPT_BUSY, &amp;fimc-&gt;state);</div><div class='ctx'> 		fimc_stop_capture(fimc, false);</div><div class='del'>-		fimc_pipeline_shutdown(fimc);</div><div class='add'>+		fimc_pipeline_shutdown(&amp;fimc-&gt;pipeline);</div><div class='ctx'> 		clear_bit(ST_CAPT_SUSPENDED, &amp;fimc-&gt;state);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -486,7 +569,7 @@ static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,</div><div class='ctx'> {</div><div class='ctx'> 	bool rotation = ctx-&gt;rotation == 90 || ctx-&gt;rotation == 270;</div><div class='ctx'> 	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='del'>-	struct samsung_fimc_variant *var = fimc-&gt;variant;</div><div class='add'>+	struct fimc_variant *var = fimc-&gt;variant;</div><div class='ctx'> 	struct fimc_pix_limit *pl = var-&gt;pix_limit;</div><div class='ctx'> 	struct fimc_frame *dst = &amp;ctx-&gt;d_frame;</div><div class='ctx'> 	u32 depth, min_w, max_w, min_h, align_h = 3;</div><div class='hunk'>@@ -528,8 +611,13 @@ static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Apply the scaler and the output DMA constraints */</div><div class='ctx'> 	max_w = rotation ? pl-&gt;out_rot_en_w : pl-&gt;out_rot_dis_w;</div><div class='del'>-	min_w = ctx-&gt;state &amp; FIMC_DST_CROP ? dst-&gt;width : var-&gt;min_out_pixsize;</div><div class='del'>-	min_h = ctx-&gt;state &amp; FIMC_DST_CROP ? dst-&gt;height : var-&gt;min_out_pixsize;</div><div class='add'>+	if (ctx-&gt;state &amp; FIMC_COMPOSE) {</div><div class='add'>+		min_w = dst-&gt;offs_h + dst-&gt;width;</div><div class='add'>+		min_h = dst-&gt;offs_v + dst-&gt;height;</div><div class='add'>+	} else {</div><div class='add'>+		min_w = var-&gt;min_out_pixsize;</div><div class='add'>+		min_h = var-&gt;min_out_pixsize;</div><div class='add'>+	}</div><div class='ctx'> 	if (var-&gt;min_vsize_align == 1 &amp;&amp; !rotation)</div><div class='ctx'> 		align_h = fimc_fmt_is_rgb(ffmt-&gt;color) ? 0 : 1;</div><div class='ctx'> </div><div class='hunk'>@@ -547,12 +635,13 @@ static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,</div><div class='ctx'> 	return ffmt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fimc_capture_try_crop(struct fimc_ctx *ctx, struct v4l2_rect *r,</div><div class='del'>-				  int pad)</div><div class='add'>+static void fimc_capture_try_selection(struct fimc_ctx *ctx,</div><div class='add'>+				       struct v4l2_rect *r,</div><div class='add'>+				       int target)</div><div class='ctx'> {</div><div class='ctx'> 	bool rotate = ctx-&gt;rotation == 90 || ctx-&gt;rotation == 270;</div><div class='ctx'> 	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='del'>-	struct samsung_fimc_variant *var = fimc-&gt;variant;</div><div class='add'>+	struct fimc_variant *var = fimc-&gt;variant;</div><div class='ctx'> 	struct fimc_pix_limit *pl = var-&gt;pix_limit;</div><div class='ctx'> 	struct fimc_frame *sink = &amp;ctx-&gt;s_frame;</div><div class='ctx'> 	u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;</div><div class='hunk'>@@ -566,7 +655,7 @@ static void fimc_capture_try_crop(struct fimc_ctx *ctx, struct v4l2_rect *r,</div><div class='ctx'> 		r-&gt;left   = r-&gt;top = 0;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	if (pad == FIMC_SD_PAD_SOURCE) {</div><div class='add'>+	if (target == V4L2_SEL_TGT_COMPOSE_ACTIVE) {</div><div class='ctx'> 		if (ctx-&gt;rotation != 90 &amp;&amp; ctx-&gt;rotation != 270)</div><div class='ctx'> 			align_h = 1;</div><div class='ctx'> 		max_sc_h = min(SCALER_MAX_HRATIO, 1 &lt;&lt; (ffs(sink-&gt;width) - 3));</div><div class='hunk'>@@ -580,8 +669,7 @@ static void fimc_capture_try_crop(struct fimc_ctx *ctx, struct v4l2_rect *r,</div><div class='ctx'> 		max_sc_h = max_sc_v = 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	/*</div><div class='del'>-	 * For the crop rectangle at source pad the following constraints</div><div class='del'>-	 * must be met:</div><div class='add'>+	 * For the compose rectangle the following constraints must be met:</div><div class='ctx'> 	 * - it must fit in the sink pad format rectangle (f_width/f_height);</div><div class='ctx'> 	 * - maximum downscaling ratio is 64;</div><div class='ctx'> 	 * - maximum crop size depends if the rotator is used or not;</div><div class='hunk'>@@ -593,7 +681,8 @@ static void fimc_capture_try_crop(struct fimc_ctx *ctx, struct v4l2_rect *r,</div><div class='ctx'> 		      rotate ? pl-&gt;out_rot_en_w : pl-&gt;out_rot_dis_w,</div><div class='ctx'> 		      rotate ? sink-&gt;f_height : sink-&gt;f_width);</div><div class='ctx'> 	max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink-&gt;f_height);</div><div class='del'>-	if (pad == FIMC_SD_PAD_SOURCE) {</div><div class='add'>+</div><div class='add'>+	if (target == V4L2_SEL_TGT_COMPOSE_ACTIVE) {</div><div class='ctx'> 		min_w = min_t(u32, max_w, sink-&gt;f_width / max_sc_h);</div><div class='ctx'> 		min_h = min_t(u32, max_h, sink-&gt;f_height / max_sc_v);</div><div class='ctx'> 		if (rotate) {</div><div class='hunk'>@@ -604,13 +693,13 @@ static void fimc_capture_try_crop(struct fimc_ctx *ctx, struct v4l2_rect *r,</div><div class='ctx'> 	v4l_bound_align_image(&amp;r-&gt;width, min_w, max_w, ffs(min_sz) - 1,</div><div class='ctx'> 			      &amp;r-&gt;height, min_h, max_h, align_h,</div><div class='ctx'> 			      align_sz);</div><div class='del'>-	/* Adjust left/top if cropping rectangle is out of bounds */</div><div class='add'>+	/* Adjust left/top if crop/compose rectangle is out of bounds */</div><div class='ctx'> 	r-&gt;left = clamp_t(u32, r-&gt;left, 0, sink-&gt;f_width - r-&gt;width);</div><div class='ctx'> 	r-&gt;top  = clamp_t(u32, r-&gt;top, 0, sink-&gt;f_height - r-&gt;height);</div><div class='ctx'> 	r-&gt;left = round_down(r-&gt;left, var-&gt;hor_offs_align);</div><div class='ctx'> </div><div class='del'>-	dbg("pad%d: (%d,%d)/%dx%d, sink fmt: %dx%d",</div><div class='del'>-	    pad, r-&gt;left, r-&gt;top, r-&gt;width, r-&gt;height,</div><div class='add'>+	dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",</div><div class='add'>+	    target, r-&gt;left, r-&gt;top, r-&gt;width, r-&gt;height,</div><div class='ctx'> 	    sink-&gt;f_width, sink-&gt;f_height);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -660,8 +749,8 @@ static int fimc_pipeline_try_format(struct fimc_ctx *ctx,</div><div class='ctx'> 				    bool set)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='del'>-	struct v4l2_subdev *sd = fimc-&gt;pipeline.sensor;</div><div class='del'>-	struct v4l2_subdev *csis = fimc-&gt;pipeline.csis;</div><div class='add'>+	struct v4l2_subdev *sd = fimc-&gt;pipeline.subdevs[IDX_SENSOR];</div><div class='add'>+	struct v4l2_subdev *csis = fimc-&gt;pipeline.subdevs[IDX_CSIS];</div><div class='ctx'> 	struct v4l2_subdev_format sfmt;</div><div class='ctx'> 	struct v4l2_mbus_framefmt *mf = &amp;sfmt.format;</div><div class='ctx'> 	struct fimc_fmt *ffmt = NULL;</div><div class='hunk'>@@ -842,7 +931,7 @@ static int fimc_capture_set_format(struct fimc_dev *fimc, struct v4l2_format *f)</div><div class='ctx'> </div><div class='ctx'> 	set_frame_bounds(ff, pix-&gt;width, pix-&gt;height);</div><div class='ctx'> 	/* Reset the composition rectangle if not yet configured */</div><div class='del'>-	if (!(ctx-&gt;state &amp; FIMC_DST_CROP))</div><div class='add'>+	if (!(ctx-&gt;state &amp; FIMC_COMPOSE))</div><div class='ctx'> 		set_frame_crop(ff, 0, 0, pix-&gt;width, pix-&gt;height);</div><div class='ctx'> </div><div class='ctx'> 	fimc_capture_mark_jpeg_xfer(ctx, fimc_fmt_is_jpeg(ff-&gt;fmt-&gt;color));</div><div class='hunk'>@@ -869,7 +958,7 @@ static int fimc_cap_enum_input(struct file *file, void *priv,</div><div class='ctx'> 			       struct v4l2_input *i)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *fimc = video_drvdata(file);</div><div class='del'>-	struct v4l2_subdev *sd = fimc-&gt;pipeline.sensor;</div><div class='add'>+	struct v4l2_subdev *sd = fimc-&gt;pipeline.subdevs[IDX_SENSOR];</div><div class='ctx'> </div><div class='ctx'> 	if (i-&gt;index != 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -918,7 +1007,7 @@ static int fimc_pipeline_validate(struct fimc_dev *fimc)</div><div class='ctx'> 		if (!(pad-&gt;flags &amp; MEDIA_PAD_FL_SINK))</div><div class='ctx'> 			break;</div><div class='ctx'> 		/* Don't call FIMC subdev operation to avoid nested locking */</div><div class='del'>-		if (sd == fimc-&gt;vid_cap.subdev) {</div><div class='add'>+		if (sd == &amp;fimc-&gt;vid_cap.subdev) {</div><div class='ctx'> 			struct fimc_frame *ff = &amp;vid_cap-&gt;ctx-&gt;s_frame;</div><div class='ctx'> 			sink_fmt.format.width = ff-&gt;f_width;</div><div class='ctx'> 			sink_fmt.format.height = ff-&gt;f_height;</div><div class='hunk'>@@ -961,7 +1050,8 @@ static int fimc_cap_streamon(struct file *file, void *priv,</div><div class='ctx'> 	if (fimc_capture_active(fimc))</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	media_entity_pipeline_start(&amp;p-&gt;sensor-&gt;entity, p-&gt;pipe);</div><div class='add'>+	media_entity_pipeline_start(&amp;p-&gt;subdevs[IDX_SENSOR]-&gt;entity,</div><div class='add'>+				    p-&gt;m_pipeline);</div><div class='ctx'> </div><div class='ctx'> 	if (fimc-&gt;vid_cap.user_subdev_api) {</div><div class='ctx'> 		ret = fimc_pipeline_validate(fimc);</div><div class='hunk'>@@ -975,7 +1065,7 @@ static int fimc_cap_streamoff(struct file *file, void *priv,</div><div class='ctx'> 			    enum v4l2_buf_type type)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *fimc = video_drvdata(file);</div><div class='del'>-	struct v4l2_subdev *sd = fimc-&gt;pipeline.sensor;</div><div class='add'>+	struct v4l2_subdev *sd = fimc-&gt;pipeline.subdevs[IDX_SENSOR];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = vb2_streamoff(&amp;fimc-&gt;vid_cap.vbq, type);</div><div class='hunk'>@@ -1091,29 +1181,18 @@ static int fimc_cap_s_selection(struct file *file, void *fh,</div><div class='ctx'> 	struct v4l2_rect rect = s-&gt;r;</div><div class='ctx'> 	struct fimc_frame *f;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	unsigned int pad;</div><div class='ctx'> </div><div class='ctx'> 	if (s-&gt;type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	switch (s-&gt;target) {</div><div class='del'>-	case V4L2_SEL_TGT_COMPOSE_DEFAULT:</div><div class='del'>-	case V4L2_SEL_TGT_COMPOSE_BOUNDS:</div><div class='del'>-	case V4L2_SEL_TGT_COMPOSE_ACTIVE:</div><div class='add'>+	if (s-&gt;target == V4L2_SEL_TGT_COMPOSE_ACTIVE)</div><div class='ctx'> 		f = &amp;ctx-&gt;d_frame;</div><div class='del'>-		pad = FIMC_SD_PAD_SOURCE;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_SEL_TGT_CROP_BOUNDS:</div><div class='del'>-	case V4L2_SEL_TGT_CROP_DEFAULT:</div><div class='del'>-	case V4L2_SEL_TGT_CROP_ACTIVE:</div><div class='add'>+	else if (s-&gt;target == V4L2_SEL_TGT_CROP_ACTIVE)</div><div class='ctx'> 		f = &amp;ctx-&gt;s_frame;</div><div class='del'>-		pad = FIMC_SD_PAD_SINK;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='add'>+	else</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	fimc_capture_try_crop(ctx, &amp;rect, pad);</div><div class='add'>+	fimc_capture_try_selection(ctx, &amp;rect, s-&gt;target);</div><div class='ctx'> </div><div class='ctx'> 	if (s-&gt;flags &amp; V4L2_SEL_FLAG_LE &amp;&amp;</div><div class='ctx'> 	    !enclosed_rectangle(&amp;rect, &amp;s-&gt;r))</div><div class='hunk'>@@ -1234,7 +1313,7 @@ void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,</div><div class='ctx'> 					 struct fimc_vid_buffer, list);</div><div class='ctx'> 			vb2_set_plane_payload(&amp;buf-&gt;vb, 0, *((u32 *)arg));</div><div class='ctx'> 		}</div><div class='del'>-		fimc_capture_irq_handler(fimc, true);</div><div class='add'>+		fimc_capture_irq_handler(fimc, 1);</div><div class='ctx'> 		fimc_deactivate_capture(fimc);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;fimc-&gt;slock, irq_flags);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1325,77 +1404,122 @@ static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,</div><div class='ctx'> 	ff-&gt;fmt = ffmt;</div><div class='ctx'> </div><div class='ctx'> 	/* Reset the crop rectangle if required. */</div><div class='del'>-	if (!(fmt-&gt;pad == FIMC_SD_PAD_SOURCE &amp;&amp; (ctx-&gt;state &amp; FIMC_DST_CROP)))</div><div class='add'>+	if (!(fmt-&gt;pad == FIMC_SD_PAD_SOURCE &amp;&amp; (ctx-&gt;state &amp; FIMC_COMPOSE)))</div><div class='ctx'> 		set_frame_crop(ff, 0, 0, mf-&gt;width, mf-&gt;height);</div><div class='ctx'> </div><div class='ctx'> 	if (fmt-&gt;pad == FIMC_SD_PAD_SINK)</div><div class='del'>-		ctx-&gt;state &amp;= ~FIMC_DST_CROP;</div><div class='add'>+		ctx-&gt;state &amp;= ~FIMC_COMPOSE;</div><div class='ctx'> 	mutex_unlock(&amp;fimc-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fimc_subdev_get_crop(struct v4l2_subdev *sd,</div><div class='del'>-				struct v4l2_subdev_fh *fh,</div><div class='del'>-				struct v4l2_subdev_crop *crop)</div><div class='add'>+static int fimc_subdev_get_selection(struct v4l2_subdev *sd,</div><div class='add'>+				     struct v4l2_subdev_fh *fh,</div><div class='add'>+				     struct v4l2_subdev_selection *sel)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);</div><div class='ctx'> 	struct fimc_ctx *ctx = fimc-&gt;vid_cap.ctx;</div><div class='del'>-	struct v4l2_rect *r = &amp;crop-&gt;rect;</div><div class='del'>-	struct fimc_frame *ff;</div><div class='add'>+	struct fimc_frame *f = &amp;ctx-&gt;s_frame;</div><div class='add'>+	struct v4l2_rect *r = &amp;sel-&gt;r;</div><div class='add'>+	struct v4l2_rect *try_sel;</div><div class='ctx'> </div><div class='del'>-	if (crop-&gt;which == V4L2_SUBDEV_FORMAT_TRY) {</div><div class='del'>-		crop-&gt;rect = *v4l2_subdev_get_try_crop(fh, crop-&gt;pad);</div><div class='add'>+	if (sel-&gt;pad != FIMC_SD_PAD_SINK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;fimc-&gt;lock);</div><div class='add'>+</div><div class='add'>+	switch (sel-&gt;target) {</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_COMPOSE_BOUNDS:</div><div class='add'>+		f = &amp;ctx-&gt;d_frame;</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS:</div><div class='add'>+		r-&gt;width = f-&gt;o_width;</div><div class='add'>+		r-&gt;height = f-&gt;o_height;</div><div class='add'>+		r-&gt;left = 0;</div><div class='add'>+		r-&gt;top = 0;</div><div class='add'>+		mutex_unlock(&amp;fimc-&gt;lock);</div><div class='ctx'> 		return 0;</div><div class='add'>+</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL:</div><div class='add'>+		try_sel = v4l2_subdev_get_try_crop(fh, sel-&gt;pad);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_COMPOSE_ACTUAL:</div><div class='add'>+		try_sel = v4l2_subdev_get_try_compose(fh, sel-&gt;pad);</div><div class='add'>+		f = &amp;ctx-&gt;d_frame;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	ff = crop-&gt;pad == FIMC_SD_PAD_SINK ?</div><div class='del'>-		&amp;ctx-&gt;s_frame : &amp;ctx-&gt;d_frame;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;fimc-&gt;lock);</div><div class='del'>-	r-&gt;left	  = ff-&gt;offs_h;</div><div class='del'>-	r-&gt;top	  = ff-&gt;offs_v;</div><div class='del'>-	r-&gt;width  = ff-&gt;width;</div><div class='del'>-	r-&gt;height = ff-&gt;height;</div><div class='del'>-	mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+	if (sel-&gt;which == V4L2_SUBDEV_FORMAT_TRY) {</div><div class='add'>+		sel-&gt;r = *try_sel;</div><div class='add'>+	} else {</div><div class='add'>+		r-&gt;left = f-&gt;offs_h;</div><div class='add'>+		r-&gt;top = f-&gt;offs_v;</div><div class='add'>+		r-&gt;width = f-&gt;width;</div><div class='add'>+		r-&gt;height = f-&gt;height;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	dbg("ff:%p, pad%d: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",</div><div class='del'>-	    ff, crop-&gt;pad, r-&gt;left, r-&gt;top, r-&gt;width, r-&gt;height,</div><div class='del'>-	    ff-&gt;f_width, ff-&gt;f_height);</div><div class='add'>+	dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",</div><div class='add'>+	    sel-&gt;pad, r-&gt;left, r-&gt;top, r-&gt;width, r-&gt;height,</div><div class='add'>+	    f-&gt;f_width, f-&gt;f_height);</div><div class='ctx'> </div><div class='add'>+	mutex_unlock(&amp;fimc-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fimc_subdev_set_crop(struct v4l2_subdev *sd,</div><div class='del'>-				struct v4l2_subdev_fh *fh,</div><div class='del'>-				struct v4l2_subdev_crop *crop)</div><div class='add'>+static int fimc_subdev_set_selection(struct v4l2_subdev *sd,</div><div class='add'>+				     struct v4l2_subdev_fh *fh,</div><div class='add'>+				     struct v4l2_subdev_selection *sel)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);</div><div class='ctx'> 	struct fimc_ctx *ctx = fimc-&gt;vid_cap.ctx;</div><div class='del'>-	struct v4l2_rect *r = &amp;crop-&gt;rect;</div><div class='del'>-	struct fimc_frame *ff;</div><div class='add'>+	struct fimc_frame *f = &amp;ctx-&gt;s_frame;</div><div class='add'>+	struct v4l2_rect *r = &amp;sel-&gt;r;</div><div class='add'>+	struct v4l2_rect *try_sel;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	dbg("(%d,%d)/%dx%d", r-&gt;left, r-&gt;top, r-&gt;width, r-&gt;height);</div><div class='del'>-</div><div class='del'>-	ff = crop-&gt;pad == FIMC_SD_PAD_SOURCE ?</div><div class='del'>-		&amp;ctx-&gt;d_frame : &amp;ctx-&gt;s_frame;</div><div class='add'>+	if (sel-&gt;pad != FIMC_SD_PAD_SINK)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;fimc-&gt;lock);</div><div class='del'>-	fimc_capture_try_crop(ctx, r, crop-&gt;pad);</div><div class='add'>+	fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP_ACTIVE);</div><div class='ctx'> </div><div class='del'>-	if (crop-&gt;which == V4L2_SUBDEV_FORMAT_TRY) {</div><div class='del'>-		mutex_lock(&amp;fimc-&gt;lock);</div><div class='del'>-		*v4l2_subdev_get_try_crop(fh, crop-&gt;pad) = *r;</div><div class='add'>+	switch (sel-&gt;target) {</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_COMPOSE_BOUNDS:</div><div class='add'>+		f = &amp;ctx-&gt;d_frame;</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS:</div><div class='add'>+		r-&gt;width = f-&gt;o_width;</div><div class='add'>+		r-&gt;height = f-&gt;o_height;</div><div class='add'>+		r-&gt;left = 0;</div><div class='add'>+		r-&gt;top = 0;</div><div class='add'>+		mutex_unlock(&amp;fimc-&gt;lock);</div><div class='ctx'> 		return 0;</div><div class='add'>+</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL:</div><div class='add'>+		try_sel = v4l2_subdev_get_try_crop(fh, sel-&gt;pad);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_COMPOSE_ACTUAL:</div><div class='add'>+		try_sel = v4l2_subdev_get_try_compose(fh, sel-&gt;pad);</div><div class='add'>+		f = &amp;ctx-&gt;d_frame;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='del'>-	set_frame_crop(ff, r-&gt;left, r-&gt;top, r-&gt;width, r-&gt;height);</div><div class='del'>-	if (crop-&gt;pad == FIMC_SD_PAD_SOURCE)</div><div class='del'>-		ctx-&gt;state |= FIMC_DST_CROP;</div><div class='ctx'> </div><div class='del'>-	set_bit(ST_CAPT_APPLY_CFG, &amp;fimc-&gt;state);</div><div class='del'>-	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+	if (sel-&gt;which == V4L2_SUBDEV_FORMAT_TRY) {</div><div class='add'>+		*try_sel = sel-&gt;r;</div><div class='add'>+	} else {</div><div class='add'>+		spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='add'>+		set_frame_crop(f, r-&gt;left, r-&gt;top, r-&gt;width, r-&gt;height);</div><div class='add'>+		set_bit(ST_CAPT_APPLY_CFG, &amp;fimc-&gt;state);</div><div class='add'>+		spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+		if (sel-&gt;target == V4L2_SUBDEV_SEL_TGT_COMPOSE_ACTUAL)</div><div class='add'>+			ctx-&gt;state |= FIMC_COMPOSE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	dbg("pad%d: (%d,%d)/%dx%d", crop-&gt;pad, r-&gt;left, r-&gt;top,</div><div class='add'>+	dbg("target %#x: (%d,%d)/%dx%d", sel-&gt;target, r-&gt;left, r-&gt;top,</div><div class='ctx'> 	    r-&gt;width, r-&gt;height);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;fimc-&gt;lock);</div><div class='hunk'>@@ -1404,63 +1528,16 @@ static int fimc_subdev_set_crop(struct v4l2_subdev *sd,</div><div class='ctx'> </div><div class='ctx'> static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {</div><div class='ctx'> 	.enum_mbus_code = fimc_subdev_enum_mbus_code,</div><div class='add'>+	.get_selection = fimc_subdev_get_selection,</div><div class='add'>+	.set_selection = fimc_subdev_set_selection,</div><div class='ctx'> 	.get_fmt = fimc_subdev_get_fmt,</div><div class='ctx'> 	.set_fmt = fimc_subdev_set_fmt,</div><div class='del'>-	.get_crop = fimc_subdev_get_crop,</div><div class='del'>-	.set_crop = fimc_subdev_set_crop,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct v4l2_subdev_ops fimc_subdev_ops = {</div><div class='ctx'> 	.pad = &amp;fimc_subdev_pad_ops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int fimc_create_capture_subdev(struct fimc_dev *fimc,</div><div class='del'>-				      struct v4l2_device *v4l2_dev)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_subdev *sd;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	sd = kzalloc(sizeof(*sd), GFP_KERNEL);</div><div class='del'>-	if (!sd)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	v4l2_subdev_init(sd, &amp;fimc_subdev_ops);</div><div class='del'>-	sd-&gt;flags = V4L2_SUBDEV_FL_HAS_DEVNODE;</div><div class='del'>-	snprintf(sd-&gt;name, sizeof(sd-&gt;name), "FIMC.%d", fimc-&gt;pdev-&gt;id);</div><div class='del'>-</div><div class='del'>-	fimc-&gt;vid_cap.sd_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;</div><div class='del'>-	fimc-&gt;vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;</div><div class='del'>-	ret = media_entity_init(&amp;sd-&gt;entity, FIMC_SD_PADS_NUM,</div><div class='del'>-				fimc-&gt;vid_cap.sd_pads, 0);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto me_err;</div><div class='del'>-	ret = v4l2_device_register_subdev(v4l2_dev, sd);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto sd_err;</div><div class='del'>-</div><div class='del'>-	fimc-&gt;vid_cap.subdev = sd;</div><div class='del'>-	v4l2_set_subdevdata(sd, fimc);</div><div class='del'>-	sd-&gt;entity.ops = &amp;fimc_sd_media_ops;</div><div class='del'>-	return 0;</div><div class='del'>-sd_err:</div><div class='del'>-	media_entity_cleanup(&amp;sd-&gt;entity);</div><div class='del'>-me_err:</div><div class='del'>-	kfree(sd);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void fimc_destroy_capture_subdev(struct fimc_dev *fimc)</div><div class='del'>-{</div><div class='del'>-	struct v4l2_subdev *sd = fimc-&gt;vid_cap.subdev;</div><div class='del'>-</div><div class='del'>-	if (!sd)</div><div class='del'>-		return;</div><div class='del'>-	media_entity_cleanup(&amp;sd-&gt;entity);</div><div class='del'>-	v4l2_device_unregister_subdev(sd);</div><div class='del'>-	kfree(sd);</div><div class='del'>-	fimc-&gt;vid_cap.subdev = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Set default format at the sensor and host interface */</div><div class='ctx'> static int fimc_capture_set_default_format(struct fimc_dev *fimc)</div><div class='ctx'> {</div><div class='hunk'>@@ -1479,7 +1556,7 @@ static int fimc_capture_set_default_format(struct fimc_dev *fimc)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* fimc-&gt;lock must be already initialized */</div><div class='del'>-int fimc_register_capture_device(struct fimc_dev *fimc,</div><div class='add'>+static int fimc_register_capture_device(struct fimc_dev *fimc,</div><div class='ctx'> 				 struct v4l2_device *v4l2_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct video_device *vfd;</div><div class='hunk'>@@ -1493,11 +1570,11 @@ int fimc_register_capture_device(struct fimc_dev *fimc,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;fimc_dev	 = fimc;</div><div class='del'>-	ctx-&gt;in_path	 = FIMC_CAMERA;</div><div class='del'>-	ctx-&gt;out_path	 = FIMC_DMA;</div><div class='add'>+	ctx-&gt;in_path	 = FIMC_IO_CAMERA;</div><div class='add'>+	ctx-&gt;out_path	 = FIMC_IO_DMA;</div><div class='ctx'> 	ctx-&gt;state	 = FIMC_CTX_CAP;</div><div class='ctx'> 	ctx-&gt;s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);</div><div class='del'>-	ctx-&gt;d_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);</div><div class='add'>+	ctx-&gt;d_frame.fmt = ctx-&gt;s_frame.fmt;</div><div class='ctx'> </div><div class='ctx'> 	vfd = video_device_alloc();</div><div class='ctx'> 	if (!vfd) {</div><div class='hunk'>@@ -1505,8 +1582,7 @@ int fimc_register_capture_device(struct fimc_dev *fimc,</div><div class='ctx'> 		goto err_vd_alloc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	snprintf(vfd-&gt;name, sizeof(vfd-&gt;name), "%s.capture",</div><div class='del'>-		 dev_name(&amp;fimc-&gt;pdev-&gt;dev));</div><div class='add'>+	snprintf(vfd-&gt;name, sizeof(vfd-&gt;name), "fimc.%d.capture", fimc-&gt;id);</div><div class='ctx'> </div><div class='ctx'> 	vfd-&gt;fops	= &amp;fimc_capture_fops;</div><div class='ctx'> 	vfd-&gt;ioctl_ops	= &amp;fimc_capture_ioctl_ops;</div><div class='hunk'>@@ -1514,6 +1590,10 @@ int fimc_register_capture_device(struct fimc_dev *fimc,</div><div class='ctx'> 	vfd-&gt;minor	= -1;</div><div class='ctx'> 	vfd-&gt;release	= video_device_release;</div><div class='ctx'> 	vfd-&gt;lock	= &amp;fimc-&gt;lock;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vfd-&gt;flags);</div><div class='ctx'> 	video_set_drvdata(vfd, fimc);</div><div class='ctx'> </div><div class='ctx'> 	vid_cap = &amp;fimc-&gt;vid_cap;</div><div class='hunk'>@@ -1524,7 +1604,6 @@ int fimc_register_capture_device(struct fimc_dev *fimc,</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;vid_cap-&gt;pending_buf_q);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;vid_cap-&gt;active_buf_q);</div><div class='del'>-	spin_lock_init(&amp;ctx-&gt;slock);</div><div class='ctx'> 	vid_cap-&gt;ctx = ctx;</div><div class='ctx'> </div><div class='ctx'> 	q = &amp;fimc-&gt;vid_cap.vbq;</div><div class='hunk'>@@ -1538,18 +1617,22 @@ int fimc_register_capture_device(struct fimc_dev *fimc,</div><div class='ctx'> </div><div class='ctx'> 	vb2_queue_init(q);</div><div class='ctx'> </div><div class='del'>-	fimc-&gt;vid_cap.vd_pad.flags = MEDIA_PAD_FL_SINK;</div><div class='del'>-	ret = media_entity_init(&amp;vfd-&gt;entity, 1, &amp;fimc-&gt;vid_cap.vd_pad, 0);</div><div class='add'>+	vid_cap-&gt;vd_pad.flags = MEDIA_PAD_FL_SINK;</div><div class='add'>+	ret = media_entity_init(&amp;vfd-&gt;entity, 1, &amp;vid_cap-&gt;vd_pad, 0);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_ent;</div><div class='del'>-	ret = fimc_create_capture_subdev(fimc, v4l2_dev);</div><div class='add'>+</div><div class='add'>+	ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err_sd_reg;</div><div class='add'>+		goto err_vd;</div><div class='add'>+</div><div class='add'>+	v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",</div><div class='add'>+		  vfd-&gt;name, video_device_node_name(vfd));</div><div class='ctx'> </div><div class='del'>-	vfd-&gt;ctrl_handler = &amp;ctx-&gt;ctrl_handler;</div><div class='add'>+	vfd-&gt;ctrl_handler = &amp;ctx-&gt;ctrls.handler;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_sd_reg:</div><div class='add'>+err_vd:</div><div class='ctx'> 	media_entity_cleanup(&amp;vfd-&gt;entity);</div><div class='ctx'> err_ent:</div><div class='ctx'> 	video_device_release(vfd);</div><div class='hunk'>@@ -1558,17 +1641,73 @@ err_vd_alloc:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void fimc_unregister_capture_device(struct fimc_dev *fimc)</div><div class='add'>+static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)</div><div class='add'>+{</div><div class='add'>+	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = fimc_register_m2m_device(fimc, sd-&gt;v4l2_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = fimc_register_capture_device(fimc, sd-&gt;v4l2_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		fimc_unregister_m2m_device(fimc);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)</div><div class='ctx'> {</div><div class='del'>-	struct video_device *vfd = fimc-&gt;vid_cap.vfd;</div><div class='add'>+	struct fimc_dev *fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+</div><div class='add'>+	if (fimc == NULL)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	if (vfd) {</div><div class='del'>-		media_entity_cleanup(&amp;vfd-&gt;entity);</div><div class='del'>-		/* Can also be called if video device was</div><div class='del'>-		   not registered */</div><div class='del'>-		video_unregister_device(vfd);</div><div class='add'>+	fimc_unregister_m2m_device(fimc);</div><div class='add'>+</div><div class='add'>+	if (fimc-&gt;vid_cap.vfd) {</div><div class='add'>+		media_entity_cleanup(&amp;fimc-&gt;vid_cap.vfd-&gt;entity);</div><div class='add'>+		video_unregister_device(fimc-&gt;vid_cap.vfd);</div><div class='add'>+		fimc-&gt;vid_cap.vfd = NULL;</div><div class='ctx'> 	}</div><div class='del'>-	fimc_destroy_capture_subdev(fimc);</div><div class='add'>+</div><div class='ctx'> 	kfree(fimc-&gt;vid_cap.ctx);</div><div class='ctx'> 	fimc-&gt;vid_cap.ctx = NULL;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {</div><div class='add'>+	.registered = fimc_capture_subdev_registered,</div><div class='add'>+	.unregistered = fimc_capture_subdev_unregistered,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int fimc_initialize_capture_subdev(struct fimc_dev *fimc)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subdev *sd = &amp;fimc-&gt;vid_cap.subdev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	v4l2_subdev_init(sd, &amp;fimc_subdev_ops);</div><div class='add'>+	sd-&gt;flags = V4L2_SUBDEV_FL_HAS_DEVNODE;</div><div class='add'>+	snprintf(sd-&gt;name, sizeof(sd-&gt;name), "FIMC.%d", fimc-&gt;pdev-&gt;id);</div><div class='add'>+</div><div class='add'>+	fimc-&gt;vid_cap.sd_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;</div><div class='add'>+	fimc-&gt;vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;</div><div class='add'>+	ret = media_entity_init(&amp;sd-&gt;entity, FIMC_SD_PADS_NUM,</div><div class='add'>+				fimc-&gt;vid_cap.sd_pads, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	sd-&gt;entity.ops = &amp;fimc_sd_media_ops;</div><div class='add'>+	sd-&gt;internal_ops = &amp;fimc_capture_sd_internal_ops;</div><div class='add'>+	v4l2_set_subdevdata(sd, fimc);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fimc_unregister_capture_subdev(struct fimc_dev *fimc)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subdev *sd = &amp;fimc-&gt;vid_cap.subdev;</div><div class='add'>+</div><div class='add'>+	v4l2_device_unregister_subdev(sd);</div><div class='add'>+	media_entity_cleanup(&amp;sd-&gt;entity);</div><div class='add'>+	v4l2_set_subdevdata(sd, NULL);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c<br/>index e184e650022a..fedcd561ba27 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-fimc/fimc-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-core.c</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> /*</div><div class='del'>- * Samsung S5P/EXYNOS4 SoC series camera interface (video postprocessor) driver</div><div class='add'>+ * Samsung S5P/EXYNOS4 SoC series FIMC (CAMIF) driver</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd.</div><div class='del'>- * Contact: Sylwester Nawrocki, &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+ * Copyright (C) 2010-2012 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published</div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;media/videobuf2-dma-contig.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fimc-core.h"</div><div class='add'>+#include "fimc-reg.h"</div><div class='ctx'> #include "fimc-mdevice.h"</div><div class='ctx'> </div><div class='ctx'> static char *fimc_clocks[MAX_FIMC_CLOCKS] = {</div><div class='hunk'>@@ -39,7 +40,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "RGB565",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_RGB565,</div><div class='ctx'> 		.depth		= { 16 },</div><div class='del'>-		.color		= S5P_FIMC_RGB565,</div><div class='add'>+		.color		= FIMC_FMT_RGB565,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 1,</div><div class='ctx'> 		.flags		= FMT_FLAGS_M2M,</div><div class='hunk'>@@ -47,7 +48,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "BGR666",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_BGR666,</div><div class='ctx'> 		.depth		= { 32 },</div><div class='del'>-		.color		= S5P_FIMC_RGB666,</div><div class='add'>+		.color		= FIMC_FMT_RGB666,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 1,</div><div class='ctx'> 		.flags		= FMT_FLAGS_M2M,</div><div class='hunk'>@@ -55,7 +56,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "ARGB8888, 32 bpp",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_RGB32,</div><div class='ctx'> 		.depth		= { 32 },</div><div class='del'>-		.color		= S5P_FIMC_RGB888,</div><div class='add'>+		.color		= FIMC_FMT_RGB888,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 1,</div><div class='ctx'> 		.flags		= FMT_FLAGS_M2M | FMT_HAS_ALPHA,</div><div class='hunk'>@@ -63,7 +64,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "ARGB1555",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_RGB555,</div><div class='ctx'> 		.depth		= { 16 },</div><div class='del'>-		.color		= S5P_FIMC_RGB555,</div><div class='add'>+		.color		= FIMC_FMT_RGB555,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 1,</div><div class='ctx'> 		.flags		= FMT_FLAGS_M2M_OUT | FMT_HAS_ALPHA,</div><div class='hunk'>@@ -71,7 +72,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "ARGB4444",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_RGB444,</div><div class='ctx'> 		.depth		= { 16 },</div><div class='del'>-		.color		= S5P_FIMC_RGB444,</div><div class='add'>+		.color		= FIMC_FMT_RGB444,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 1,</div><div class='ctx'> 		.flags		= FMT_FLAGS_M2M_OUT | FMT_HAS_ALPHA,</div><div class='hunk'>@@ -79,7 +80,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "YUV 4:2:2 packed, YCbYCr",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_YUYV,</div><div class='ctx'> 		.depth		= { 16 },</div><div class='del'>-		.color		= S5P_FIMC_YCBYCR422,</div><div class='add'>+		.color		= FIMC_FMT_YCBYCR422,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 1,</div><div class='ctx'> 		.mbus_code	= V4L2_MBUS_FMT_YUYV8_2X8,</div><div class='hunk'>@@ -88,7 +89,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "YUV 4:2:2 packed, CbYCrY",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_UYVY,</div><div class='ctx'> 		.depth		= { 16 },</div><div class='del'>-		.color		= S5P_FIMC_CBYCRY422,</div><div class='add'>+		.color		= FIMC_FMT_CBYCRY422,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 1,</div><div class='ctx'> 		.mbus_code	= V4L2_MBUS_FMT_UYVY8_2X8,</div><div class='hunk'>@@ -97,7 +98,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "YUV 4:2:2 packed, CrYCbY",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_VYUY,</div><div class='ctx'> 		.depth		= { 16 },</div><div class='del'>-		.color		= S5P_FIMC_CRYCBY422,</div><div class='add'>+		.color		= FIMC_FMT_CRYCBY422,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 1,</div><div class='ctx'> 		.mbus_code	= V4L2_MBUS_FMT_VYUY8_2X8,</div><div class='hunk'>@@ -106,7 +107,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "YUV 4:2:2 packed, YCrYCb",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_YVYU,</div><div class='ctx'> 		.depth		= { 16 },</div><div class='del'>-		.color		= S5P_FIMC_YCRYCB422,</div><div class='add'>+		.color		= FIMC_FMT_YCRYCB422,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 1,</div><div class='ctx'> 		.mbus_code	= V4L2_MBUS_FMT_YVYU8_2X8,</div><div class='hunk'>@@ -115,7 +116,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "YUV 4:2:2 planar, Y/Cb/Cr",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_YUV422P,</div><div class='ctx'> 		.depth		= { 12 },</div><div class='del'>-		.color		= S5P_FIMC_YCBYCR422,</div><div class='add'>+		.color		= FIMC_FMT_YCBYCR422,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 3,</div><div class='ctx'> 		.flags		= FMT_FLAGS_M2M,</div><div class='hunk'>@@ -123,7 +124,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "YUV 4:2:2 planar, Y/CbCr",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_NV16,</div><div class='ctx'> 		.depth		= { 16 },</div><div class='del'>-		.color		= S5P_FIMC_YCBYCR422,</div><div class='add'>+		.color		= FIMC_FMT_YCBYCR422,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 2,</div><div class='ctx'> 		.flags		= FMT_FLAGS_M2M,</div><div class='hunk'>@@ -131,7 +132,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "YUV 4:2:2 planar, Y/CrCb",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_NV61,</div><div class='ctx'> 		.depth		= { 16 },</div><div class='del'>-		.color		= S5P_FIMC_YCRYCB422,</div><div class='add'>+		.color		= FIMC_FMT_YCRYCB422,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 2,</div><div class='ctx'> 		.flags		= FMT_FLAGS_M2M,</div><div class='hunk'>@@ -139,7 +140,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "YUV 4:2:0 planar, YCbCr",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_YUV420,</div><div class='ctx'> 		.depth		= { 12 },</div><div class='del'>-		.color		= S5P_FIMC_YCBCR420,</div><div class='add'>+		.color		= FIMC_FMT_YCBCR420,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 3,</div><div class='ctx'> 		.flags		= FMT_FLAGS_M2M,</div><div class='hunk'>@@ -147,14 +148,14 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 		.name		= "YUV 4:2:0 planar, Y/CbCr",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_NV12,</div><div class='ctx'> 		.depth		= { 12 },</div><div class='del'>-		.color		= S5P_FIMC_YCBCR420,</div><div class='add'>+		.color		= FIMC_FMT_YCBCR420,</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 2,</div><div class='ctx'> 		.flags		= FMT_FLAGS_M2M,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.name		= "YUV 4:2:0 non-contiguous 2-planar, Y/CbCr",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_NV12M,</div><div class='del'>-		.color		= S5P_FIMC_YCBCR420,</div><div class='add'>+		.color		= FIMC_FMT_YCBCR420,</div><div class='ctx'> 		.depth		= { 8, 4 },</div><div class='ctx'> 		.memplanes	= 2,</div><div class='ctx'> 		.colplanes	= 2,</div><div class='hunk'>@@ -162,7 +163,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.name		= "YUV 4:2:0 non-contiguous 3-planar, Y/Cb/Cr",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_YUV420M,</div><div class='del'>-		.color		= S5P_FIMC_YCBCR420,</div><div class='add'>+		.color		= FIMC_FMT_YCBCR420,</div><div class='ctx'> 		.depth		= { 8, 2, 2 },</div><div class='ctx'> 		.memplanes	= 3,</div><div class='ctx'> 		.colplanes	= 3,</div><div class='hunk'>@@ -170,7 +171,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.name		= "YUV 4:2:0 non-contiguous 2-planar, Y/CbCr, tiled",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_NV12MT,</div><div class='del'>-		.color		= S5P_FIMC_YCBCR420,</div><div class='add'>+		.color		= FIMC_FMT_YCBCR420,</div><div class='ctx'> 		.depth		= { 8, 4 },</div><div class='ctx'> 		.memplanes	= 2,</div><div class='ctx'> 		.colplanes	= 2,</div><div class='hunk'>@@ -178,7 +179,7 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.name		= "JPEG encoded data",</div><div class='ctx'> 		.fourcc		= V4L2_PIX_FMT_JPEG,</div><div class='del'>-		.color		= S5P_FIMC_JPEG,</div><div class='add'>+		.color		= FIMC_FMT_JPEG,</div><div class='ctx'> 		.depth		= { 8 },</div><div class='ctx'> 		.memplanes	= 1,</div><div class='ctx'> 		.colplanes	= 1,</div><div class='hunk'>@@ -187,12 +188,12 @@ static struct fimc_fmt fimc_formats[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static unsigned int get_m2m_fmt_flags(unsigned int stream_type)</div><div class='add'>+struct fimc_fmt *fimc_get_format(unsigned int index)</div><div class='ctx'> {</div><div class='del'>-	if (stream_type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)</div><div class='del'>-		return FMT_FLAGS_M2M_IN;</div><div class='del'>-	else</div><div class='del'>-		return FMT_FLAGS_M2M_OUT;</div><div class='add'>+	if (index &gt;= ARRAY_SIZE(fimc_formats))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return &amp;fimc_formats[index];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int fimc_check_scaler_ratio(struct fimc_ctx *ctx, int sw, int sh,</div><div class='hunk'>@@ -230,7 +231,7 @@ static int fimc_get_scaler_factor(u32 src, u32 tar, u32 *ratio, u32 *shift)</div><div class='ctx'> </div><div class='ctx'> int fimc_set_scaler_info(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	struct samsung_fimc_variant *variant = ctx-&gt;fimc_dev-&gt;variant;</div><div class='add'>+	struct fimc_variant *variant = ctx-&gt;fimc_dev-&gt;variant;</div><div class='ctx'> 	struct device *dev = &amp;ctx-&gt;fimc_dev-&gt;pdev-&gt;dev;</div><div class='ctx'> 	struct fimc_scaler *sc = &amp;ctx-&gt;scaler;</div><div class='ctx'> 	struct fimc_frame *s_frame = &amp;ctx-&gt;s_frame;</div><div class='hunk'>@@ -293,126 +294,9 @@ int fimc_set_scaler_info(struct fimc_ctx *ctx)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fimc_m2m_job_finish(struct fimc_ctx *ctx, int vb_state)</div><div class='del'>-{</div><div class='del'>-	struct vb2_buffer *src_vb, *dst_vb;</div><div class='del'>-</div><div class='del'>-	if (!ctx || !ctx-&gt;m2m_ctx)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	src_vb = v4l2_m2m_src_buf_remove(ctx-&gt;m2m_ctx);</div><div class='del'>-	dst_vb = v4l2_m2m_dst_buf_remove(ctx-&gt;m2m_ctx);</div><div class='del'>-</div><div class='del'>-	if (src_vb &amp;&amp; dst_vb) {</div><div class='del'>-		v4l2_m2m_buf_done(src_vb, vb_state);</div><div class='del'>-		v4l2_m2m_buf_done(dst_vb, vb_state);</div><div class='del'>-		v4l2_m2m_job_finish(ctx-&gt;fimc_dev-&gt;m2m.m2m_dev,</div><div class='del'>-				    ctx-&gt;m2m_ctx);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Complete the transaction which has been scheduled for execution. */</div><div class='del'>-static int fimc_m2m_shutdown(struct fimc_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!fimc_m2m_pending(fimc))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	fimc_ctx_state_lock_set(FIMC_CTX_SHUT, ctx);</div><div class='del'>-</div><div class='del'>-	ret = wait_event_timeout(fimc-&gt;irq_queue,</div><div class='del'>-			   !fimc_ctx_state_is_set(FIMC_CTX_SHUT, ctx),</div><div class='del'>-			   FIMC_SHUTDOWN_TIMEOUT);</div><div class='del'>-</div><div class='del'>-	return ret == 0 ? -ETIMEDOUT : ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int start_streaming(struct vb2_queue *q, unsigned int count)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = q-&gt;drv_priv;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = pm_runtime_get_sync(&amp;ctx-&gt;fimc_dev-&gt;pdev-&gt;dev);</div><div class='del'>-	return ret &gt; 0 ? 0 : ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int stop_streaming(struct vb2_queue *q)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = q-&gt;drv_priv;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = fimc_m2m_shutdown(ctx);</div><div class='del'>-	if (ret == -ETIMEDOUT)</div><div class='del'>-		fimc_m2m_job_finish(ctx, VB2_BUF_STATE_ERROR);</div><div class='del'>-</div><div class='del'>-	pm_runtime_put(&amp;ctx-&gt;fimc_dev-&gt;pdev-&gt;dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void fimc_capture_irq_handler(struct fimc_dev *fimc, bool final)</div><div class='del'>-{</div><div class='del'>-	struct fimc_vid_cap *cap = &amp;fimc-&gt;vid_cap;</div><div class='del'>-	struct fimc_vid_buffer *v_buf;</div><div class='del'>-	struct timeval *tv;</div><div class='del'>-	struct timespec ts;</div><div class='del'>-</div><div class='del'>-	if (test_and_clear_bit(ST_CAPT_SHUT, &amp;fimc-&gt;state)) {</div><div class='del'>-		wake_up(&amp;fimc-&gt;irq_queue);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!list_empty(&amp;cap-&gt;active_buf_q) &amp;&amp;</div><div class='del'>-	    test_bit(ST_CAPT_RUN, &amp;fimc-&gt;state) &amp;&amp; final) {</div><div class='del'>-		ktime_get_real_ts(&amp;ts);</div><div class='del'>-</div><div class='del'>-		v_buf = fimc_active_queue_pop(cap);</div><div class='del'>-</div><div class='del'>-		tv = &amp;v_buf-&gt;vb.v4l2_buf.timestamp;</div><div class='del'>-		tv-&gt;tv_sec = ts.tv_sec;</div><div class='del'>-		tv-&gt;tv_usec = ts.tv_nsec / NSEC_PER_USEC;</div><div class='del'>-		v_buf-&gt;vb.v4l2_buf.sequence = cap-&gt;frame_count++;</div><div class='del'>-</div><div class='del'>-		vb2_buffer_done(&amp;v_buf-&gt;vb, VB2_BUF_STATE_DONE);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!list_empty(&amp;cap-&gt;pending_buf_q)) {</div><div class='del'>-</div><div class='del'>-		v_buf = fimc_pending_queue_pop(cap);</div><div class='del'>-		fimc_hw_set_output_addr(fimc, &amp;v_buf-&gt;paddr, cap-&gt;buf_index);</div><div class='del'>-		v_buf-&gt;index = cap-&gt;buf_index;</div><div class='del'>-</div><div class='del'>-		/* Move the buffer to the capture active queue */</div><div class='del'>-		fimc_active_queue_add(cap, v_buf);</div><div class='del'>-</div><div class='del'>-		dbg("next frame: %d, done frame: %d",</div><div class='del'>-		    fimc_hw_get_frame_index(fimc), v_buf-&gt;index);</div><div class='del'>-</div><div class='del'>-		if (++cap-&gt;buf_index &gt;= FIMC_MAX_OUT_BUFS)</div><div class='del'>-			cap-&gt;buf_index = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cap-&gt;active_buf_cnt == 0) {</div><div class='del'>-		if (final)</div><div class='del'>-			clear_bit(ST_CAPT_RUN, &amp;fimc-&gt;state);</div><div class='del'>-</div><div class='del'>-		if (++cap-&gt;buf_index &gt;= FIMC_MAX_OUT_BUFS)</div><div class='del'>-			cap-&gt;buf_index = 0;</div><div class='del'>-	} else {</div><div class='del'>-		set_bit(ST_CAPT_RUN, &amp;fimc-&gt;state);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	fimc_capture_config_update(cap-&gt;ctx);</div><div class='del'>-</div><div class='del'>-	dbg("frame: %d, active_buf_cnt: %d",</div><div class='del'>-	    fimc_hw_get_frame_index(fimc), cap-&gt;active_buf_cnt);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static irqreturn_t fimc_irq_handler(int irq, void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *fimc = priv;</div><div class='del'>-	struct fimc_vid_cap *cap = &amp;fimc-&gt;vid_cap;</div><div class='ctx'> 	struct fimc_ctx *ctx;</div><div class='ctx'> </div><div class='ctx'> 	fimc_hw_clear_irq(fimc);</div><div class='hunk'>@@ -430,21 +314,16 @@ static irqreturn_t fimc_irq_handler(int irq, void *priv)</div><div class='ctx'> 			spin_unlock(&amp;fimc-&gt;slock);</div><div class='ctx'> 			fimc_m2m_job_finish(ctx, VB2_BUF_STATE_DONE);</div><div class='ctx'> </div><div class='del'>-			spin_lock(&amp;ctx-&gt;slock);</div><div class='ctx'> 			if (ctx-&gt;state &amp; FIMC_CTX_SHUT) {</div><div class='ctx'> 				ctx-&gt;state &amp;= ~FIMC_CTX_SHUT;</div><div class='ctx'> 				wake_up(&amp;fimc-&gt;irq_queue);</div><div class='ctx'> 			}</div><div class='del'>-			spin_unlock(&amp;ctx-&gt;slock);</div><div class='add'>+			return IRQ_HANDLED;</div><div class='ctx'> 		}</div><div class='del'>-		return IRQ_HANDLED;</div><div class='ctx'> 	} else if (test_bit(ST_CAPT_PEND, &amp;fimc-&gt;state)) {</div><div class='del'>-		fimc_capture_irq_handler(fimc,</div><div class='del'>-				 !test_bit(ST_CAPT_JPEG, &amp;fimc-&gt;state));</div><div class='del'>-		if (cap-&gt;active_buf_cnt == 1) {</div><div class='del'>-			fimc_deactivate_capture(fimc);</div><div class='del'>-			clear_bit(ST_CAPT_STREAM, &amp;fimc-&gt;state);</div><div class='del'>-		}</div><div class='add'>+		int last_buf = test_bit(ST_CAPT_JPEG, &amp;fimc-&gt;state) &amp;&amp;</div><div class='add'>+				fimc-&gt;vid_cap.reqbufs_count == 1;</div><div class='add'>+		fimc_capture_irq_handler(fimc, !last_buf);</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	spin_unlock(&amp;fimc-&gt;slock);</div><div class='hunk'>@@ -482,7 +361,7 @@ int fimc_prepare_addr(struct fimc_ctx *ctx, struct vb2_buffer *vb,</div><div class='ctx'> 		case 3:</div><div class='ctx'> 			paddr-&gt;cb = (u32)(paddr-&gt;y + pix_size);</div><div class='ctx'> 			/* decompose Y into Y/Cb/Cr */</div><div class='del'>-			if (S5P_FIMC_YCBCR420 == frame-&gt;fmt-&gt;color)</div><div class='add'>+			if (FIMC_FMT_YCBCR420 == frame-&gt;fmt-&gt;color)</div><div class='ctx'> 				paddr-&gt;cr = (u32)(paddr-&gt;cb</div><div class='ctx'> 						+ (pix_size &gt;&gt; 2));</div><div class='ctx'> 			else /* 422 */</div><div class='hunk'>@@ -510,40 +389,40 @@ int fimc_prepare_addr(struct fimc_ctx *ctx, struct vb2_buffer *vb,</div><div class='ctx'> void fimc_set_yuv_order(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	/* The one only mode supported in SoC. */</div><div class='del'>-	ctx-&gt;in_order_2p = S5P_FIMC_LSB_CRCB;</div><div class='del'>-	ctx-&gt;out_order_2p = S5P_FIMC_LSB_CRCB;</div><div class='add'>+	ctx-&gt;in_order_2p = FIMC_REG_CIOCTRL_ORDER422_2P_LSB_CRCB;</div><div class='add'>+	ctx-&gt;out_order_2p = FIMC_REG_CIOCTRL_ORDER422_2P_LSB_CRCB;</div><div class='ctx'> </div><div class='ctx'> 	/* Set order for 1 plane input formats. */</div><div class='ctx'> 	switch (ctx-&gt;s_frame.fmt-&gt;color) {</div><div class='del'>-	case S5P_FIMC_YCRYCB422:</div><div class='del'>-		ctx-&gt;in_order_1p = S5P_MSCTRL_ORDER422_CBYCRY;</div><div class='add'>+	case FIMC_FMT_YCRYCB422:</div><div class='add'>+		ctx-&gt;in_order_1p = FIMC_REG_MSCTRL_ORDER422_CBYCRY;</div><div class='ctx'> 		break;</div><div class='del'>-	case S5P_FIMC_CBYCRY422:</div><div class='del'>-		ctx-&gt;in_order_1p = S5P_MSCTRL_ORDER422_YCRYCB;</div><div class='add'>+	case FIMC_FMT_CBYCRY422:</div><div class='add'>+		ctx-&gt;in_order_1p = FIMC_REG_MSCTRL_ORDER422_YCRYCB;</div><div class='ctx'> 		break;</div><div class='del'>-	case S5P_FIMC_CRYCBY422:</div><div class='del'>-		ctx-&gt;in_order_1p = S5P_MSCTRL_ORDER422_YCBYCR;</div><div class='add'>+	case FIMC_FMT_CRYCBY422:</div><div class='add'>+		ctx-&gt;in_order_1p = FIMC_REG_MSCTRL_ORDER422_YCBYCR;</div><div class='ctx'> 		break;</div><div class='del'>-	case S5P_FIMC_YCBYCR422:</div><div class='add'>+	case FIMC_FMT_YCBYCR422:</div><div class='ctx'> 	default:</div><div class='del'>-		ctx-&gt;in_order_1p = S5P_MSCTRL_ORDER422_CRYCBY;</div><div class='add'>+		ctx-&gt;in_order_1p = FIMC_REG_MSCTRL_ORDER422_CRYCBY;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	dbg("ctx-&gt;in_order_1p= %d", ctx-&gt;in_order_1p);</div><div class='ctx'> </div><div class='ctx'> 	switch (ctx-&gt;d_frame.fmt-&gt;color) {</div><div class='del'>-	case S5P_FIMC_YCRYCB422:</div><div class='del'>-		ctx-&gt;out_order_1p = S5P_CIOCTRL_ORDER422_CBYCRY;</div><div class='add'>+	case FIMC_FMT_YCRYCB422:</div><div class='add'>+		ctx-&gt;out_order_1p = FIMC_REG_CIOCTRL_ORDER422_CBYCRY;</div><div class='ctx'> 		break;</div><div class='del'>-	case S5P_FIMC_CBYCRY422:</div><div class='del'>-		ctx-&gt;out_order_1p = S5P_CIOCTRL_ORDER422_YCRYCB;</div><div class='add'>+	case FIMC_FMT_CBYCRY422:</div><div class='add'>+		ctx-&gt;out_order_1p = FIMC_REG_CIOCTRL_ORDER422_YCRYCB;</div><div class='ctx'> 		break;</div><div class='del'>-	case S5P_FIMC_CRYCBY422:</div><div class='del'>-		ctx-&gt;out_order_1p = S5P_CIOCTRL_ORDER422_YCBYCR;</div><div class='add'>+	case FIMC_FMT_CRYCBY422:</div><div class='add'>+		ctx-&gt;out_order_1p = FIMC_REG_CIOCTRL_ORDER422_YCBYCR;</div><div class='ctx'> 		break;</div><div class='del'>-	case S5P_FIMC_YCBYCR422:</div><div class='add'>+	case FIMC_FMT_YCBYCR422:</div><div class='ctx'> 	default:</div><div class='del'>-		ctx-&gt;out_order_1p = S5P_CIOCTRL_ORDER422_CRYCBY;</div><div class='add'>+		ctx-&gt;out_order_1p = FIMC_REG_CIOCTRL_ORDER422_CRYCBY;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	dbg("ctx-&gt;out_order_1p= %d", ctx-&gt;out_order_1p);</div><div class='hunk'>@@ -551,7 +430,7 @@ void fimc_set_yuv_order(struct fimc_ctx *ctx)</div><div class='ctx'> </div><div class='ctx'> void fimc_prepare_dma_offset(struct fimc_ctx *ctx, struct fimc_frame *f)</div><div class='ctx'> {</div><div class='del'>-	struct samsung_fimc_variant *variant = ctx-&gt;fimc_dev-&gt;variant;</div><div class='add'>+	struct fimc_variant *variant = ctx-&gt;fimc_dev-&gt;variant;</div><div class='ctx'> 	u32 i, depth = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; f-&gt;fmt-&gt;colplanes; i++)</div><div class='hunk'>@@ -574,7 +453,7 @@ void fimc_prepare_dma_offset(struct fimc_ctx *ctx, struct fimc_frame *f)</div><div class='ctx'> 			f-&gt;dma_offset.cb_h &gt;&gt;= 1;</div><div class='ctx'> 			f-&gt;dma_offset.cr_h &gt;&gt;= 1;</div><div class='ctx'> 		}</div><div class='del'>-		if (f-&gt;fmt-&gt;color == S5P_FIMC_YCBCR420) {</div><div class='add'>+		if (f-&gt;fmt-&gt;color == FIMC_FMT_YCBCR420) {</div><div class='ctx'> 			f-&gt;dma_offset.cb_v &gt;&gt;= 1;</div><div class='ctx'> 			f-&gt;dma_offset.cr_v &gt;&gt;= 1;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -584,203 +463,58 @@ void fimc_prepare_dma_offset(struct fimc_ctx *ctx, struct fimc_frame *f)</div><div class='ctx'> 	    f-&gt;fmt-&gt;color, f-&gt;dma_offset.y_h, f-&gt;dma_offset.y_v);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * fimc_prepare_config - check dimensions, operation and color mode</div><div class='del'>- *			 and pre-calculate offset and the scaling coefficients.</div><div class='del'>- *</div><div class='del'>- * @ctx: hardware context information</div><div class='del'>- * @flags: flags indicating which parameters to check/update</div><div class='del'>- *</div><div class='del'>- * Return: 0 if dimensions are valid or non zero otherwise.</div><div class='del'>- */</div><div class='del'>-int fimc_prepare_config(struct fimc_ctx *ctx, u32 flags)</div><div class='del'>-{</div><div class='del'>-	struct fimc_frame *s_frame, *d_frame;</div><div class='del'>-	struct vb2_buffer *vb = NULL;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	s_frame = &amp;ctx-&gt;s_frame;</div><div class='del'>-	d_frame = &amp;ctx-&gt;d_frame;</div><div class='del'>-</div><div class='del'>-	if (flags &amp; FIMC_PARAMS) {</div><div class='del'>-		/* Prepare the DMA offset ratios for scaler. */</div><div class='del'>-		fimc_prepare_dma_offset(ctx, &amp;ctx-&gt;s_frame);</div><div class='del'>-		fimc_prepare_dma_offset(ctx, &amp;ctx-&gt;d_frame);</div><div class='del'>-</div><div class='del'>-		if (s_frame-&gt;height &gt; (SCALER_MAX_VRATIO * d_frame-&gt;height) ||</div><div class='del'>-		    s_frame-&gt;width &gt; (SCALER_MAX_HRATIO * d_frame-&gt;width)) {</div><div class='del'>-			err("out of scaler range");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-		fimc_set_yuv_order(ctx);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (flags &amp; FIMC_SRC_ADDR) {</div><div class='del'>-		vb = v4l2_m2m_next_src_buf(ctx-&gt;m2m_ctx);</div><div class='del'>-		ret = fimc_prepare_addr(ctx, vb, s_frame, &amp;s_frame-&gt;paddr);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (flags &amp; FIMC_DST_ADDR) {</div><div class='del'>-		vb = v4l2_m2m_next_dst_buf(ctx-&gt;m2m_ctx);</div><div class='del'>-		ret = fimc_prepare_addr(ctx, vb, d_frame, &amp;d_frame-&gt;paddr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void fimc_dma_run(void *priv)</div><div class='add'>+int fimc_set_color_effect(struct fimc_ctx *ctx, enum v4l2_colorfx colorfx)</div><div class='ctx'> {</div><div class='del'>-	struct fimc_ctx *ctx = priv;</div><div class='del'>-	struct fimc_dev *fimc;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 ret;</div><div class='del'>-</div><div class='del'>-	if (WARN(!ctx, "null hardware context\n"))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	fimc = ctx-&gt;fimc_dev;</div><div class='del'>-	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='del'>-	set_bit(ST_M2M_PEND, &amp;fimc-&gt;state);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;ctx-&gt;slock);</div><div class='del'>-	ctx-&gt;state |= (FIMC_SRC_ADDR | FIMC_DST_ADDR);</div><div class='del'>-	ret = fimc_prepare_config(ctx, ctx-&gt;state);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto dma_unlock;</div><div class='add'>+	struct fimc_effect *effect = &amp;ctx-&gt;effect;</div><div class='ctx'> </div><div class='del'>-	/* Reconfigure hardware if the context has changed. */</div><div class='del'>-	if (fimc-&gt;m2m.ctx != ctx) {</div><div class='del'>-		ctx-&gt;state |= FIMC_PARAMS;</div><div class='del'>-		fimc-&gt;m2m.ctx = ctx;</div><div class='del'>-	}</div><div class='del'>-	fimc_hw_set_input_addr(fimc, &amp;ctx-&gt;s_frame.paddr);</div><div class='del'>-</div><div class='del'>-	if (ctx-&gt;state &amp; FIMC_PARAMS) {</div><div class='del'>-		fimc_hw_set_input_path(ctx);</div><div class='del'>-		fimc_hw_set_in_dma(ctx);</div><div class='del'>-		ret = fimc_set_scaler_info(ctx);</div><div class='del'>-		if (ret) {</div><div class='del'>-			spin_unlock(&amp;fimc-&gt;slock);</div><div class='del'>-			goto dma_unlock;</div><div class='del'>-		}</div><div class='del'>-		fimc_hw_set_prescaler(ctx);</div><div class='del'>-		fimc_hw_set_mainscaler(ctx);</div><div class='del'>-		fimc_hw_set_target_format(ctx);</div><div class='del'>-		fimc_hw_set_rotation(ctx);</div><div class='del'>-		fimc_hw_set_effect(ctx, false);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	fimc_hw_set_output_path(ctx);</div><div class='del'>-	if (ctx-&gt;state &amp; (FIMC_DST_ADDR | FIMC_PARAMS))</div><div class='del'>-		fimc_hw_set_output_addr(fimc, &amp;ctx-&gt;d_frame.paddr, -1);</div><div class='del'>-</div><div class='del'>-	if (ctx-&gt;state &amp; FIMC_PARAMS) {</div><div class='del'>-		fimc_hw_set_out_dma(ctx);</div><div class='del'>-		if (fimc-&gt;variant-&gt;has_alpha)</div><div class='del'>-			fimc_hw_set_rgb_alpha(ctx);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	fimc_activate_capture(ctx);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;state &amp;= (FIMC_CTX_M2M | FIMC_CTX_CAP |</div><div class='del'>-		       FIMC_SRC_FMT | FIMC_DST_FMT);</div><div class='del'>-	fimc_hw_activate_input_dma(fimc, true);</div><div class='del'>-dma_unlock:</div><div class='del'>-	spin_unlock(&amp;ctx-&gt;slock);</div><div class='del'>-	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void fimc_job_abort(void *priv)</div><div class='del'>-{</div><div class='del'>-	fimc_m2m_shutdown(priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,</div><div class='del'>-			    unsigned int *num_buffers, unsigned int *num_planes,</div><div class='del'>-			    unsigned int sizes[], void *allocators[])</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = vb2_get_drv_priv(vq);</div><div class='del'>-	struct fimc_frame *f;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	f = ctx_get_frame(ctx, vq-&gt;type);</div><div class='del'>-	if (IS_ERR(f))</div><div class='del'>-		return PTR_ERR(f);</div><div class='del'>-	/*</div><div class='del'>-	 * Return number of non-contigous planes (plane buffers)</div><div class='del'>-	 * depending on the configured color format.</div><div class='del'>-	 */</div><div class='del'>-	if (!f-&gt;fmt)</div><div class='add'>+	switch (colorfx) {</div><div class='add'>+	case V4L2_COLORFX_NONE:</div><div class='add'>+		effect-&gt;type = FIMC_REG_CIIMGEFF_FIN_BYPASS;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_COLORFX_BW:</div><div class='add'>+		effect-&gt;type = FIMC_REG_CIIMGEFF_FIN_ARBITRARY;</div><div class='add'>+		effect-&gt;pat_cb = 128;</div><div class='add'>+		effect-&gt;pat_cr = 128;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_COLORFX_SEPIA:</div><div class='add'>+		effect-&gt;type = FIMC_REG_CIIMGEFF_FIN_ARBITRARY;</div><div class='add'>+		effect-&gt;pat_cb = 115;</div><div class='add'>+		effect-&gt;pat_cr = 145;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_COLORFX_NEGATIVE:</div><div class='add'>+		effect-&gt;type = FIMC_REG_CIIMGEFF_FIN_NEGATIVE;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_COLORFX_EMBOSS:</div><div class='add'>+		effect-&gt;type = FIMC_REG_CIIMGEFF_FIN_EMBOSSING;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_COLORFX_ART_FREEZE:</div><div class='add'>+		effect-&gt;type = FIMC_REG_CIIMGEFF_FIN_ARTFREEZE;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_COLORFX_SILHOUETTE:</div><div class='add'>+		effect-&gt;type = FIMC_REG_CIIMGEFF_FIN_SILHOUETTE;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_COLORFX_SET_CBCR:</div><div class='add'>+		effect-&gt;type = FIMC_REG_CIIMGEFF_FIN_ARBITRARY;</div><div class='add'>+		effect-&gt;pat_cb = ctx-&gt;ctrls.colorfx_cbcr-&gt;val &gt;&gt; 8;</div><div class='add'>+		effect-&gt;pat_cr = ctx-&gt;ctrls.colorfx_cbcr-&gt;val &amp; 0xff;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	*num_planes = f-&gt;fmt-&gt;memplanes;</div><div class='del'>-	for (i = 0; i &lt; f-&gt;fmt-&gt;memplanes; i++) {</div><div class='del'>-		sizes[i] = (f-&gt;f_width * f-&gt;f_height * f-&gt;fmt-&gt;depth[i]) / 8;</div><div class='del'>-		allocators[i] = ctx-&gt;fimc_dev-&gt;alloc_ctx;</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_buf_prepare(struct vb2_buffer *vb)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = vb2_get_drv_priv(vb-&gt;vb2_queue);</div><div class='del'>-	struct fimc_frame *frame;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	frame = ctx_get_frame(ctx, vb-&gt;vb2_queue-&gt;type);</div><div class='del'>-	if (IS_ERR(frame))</div><div class='del'>-		return PTR_ERR(frame);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; frame-&gt;fmt-&gt;memplanes; i++)</div><div class='del'>-		vb2_set_plane_payload(vb, i, frame-&gt;payload[i]);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fimc_buf_queue(struct vb2_buffer *vb)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = vb2_get_drv_priv(vb-&gt;vb2_queue);</div><div class='del'>-</div><div class='del'>-	dbg("ctx: %p, ctx-&gt;state: 0x%x", ctx, ctx-&gt;state);</div><div class='del'>-</div><div class='del'>-	if (ctx-&gt;m2m_ctx)</div><div class='del'>-		v4l2_m2m_buf_queue(ctx-&gt;m2m_ctx, vb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void fimc_lock(struct vb2_queue *vq)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = vb2_get_drv_priv(vq);</div><div class='del'>-	mutex_lock(&amp;ctx-&gt;fimc_dev-&gt;lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void fimc_unlock(struct vb2_queue *vq)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = vb2_get_drv_priv(vq);</div><div class='del'>-	mutex_unlock(&amp;ctx-&gt;fimc_dev-&gt;lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct vb2_ops fimc_qops = {</div><div class='del'>-	.queue_setup	 = fimc_queue_setup,</div><div class='del'>-	.buf_prepare	 = fimc_buf_prepare,</div><div class='del'>-	.buf_queue	 = fimc_buf_queue,</div><div class='del'>-	.wait_prepare	 = fimc_unlock,</div><div class='del'>-	.wait_finish	 = fimc_lock,</div><div class='del'>-	.stop_streaming	 = stop_streaming,</div><div class='del'>-	.start_streaming = start_streaming,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * V4L2 controls handling</div><div class='ctx'>  */</div><div class='ctx'> #define ctrl_to_ctx(__ctrl) \</div><div class='del'>-	container_of((__ctrl)-&gt;handler, struct fimc_ctx, ctrl_handler)</div><div class='add'>+	container_of((__ctrl)-&gt;handler, struct fimc_ctx, ctrls.handler)</div><div class='ctx'> </div><div class='ctx'> static int __fimc_s_ctrl(struct fimc_ctx *ctx, struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='del'>-	struct samsung_fimc_variant *variant = fimc-&gt;variant;</div><div class='add'>+	struct fimc_variant *variant = fimc-&gt;variant;</div><div class='ctx'> 	unsigned int flags = FIMC_DST_FMT | FIMC_SRC_FMT;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -815,7 +549,14 @@ static int __fimc_s_ctrl(struct fimc_ctx *ctx, struct v4l2_ctrl *ctrl)</div><div class='ctx'> 	case V4L2_CID_ALPHA_COMPONENT:</div><div class='ctx'> 		ctx-&gt;d_frame.alpha = ctrl-&gt;val;</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_COLORFX:</div><div class='add'>+		ret = fimc_set_color_effect(ctx, ctrl-&gt;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	ctx-&gt;state |= FIMC_PARAMS;</div><div class='ctx'> 	set_bit(ST_CAPT_APPLY_CFG, &amp;fimc-&gt;state);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -827,9 +568,9 @@ static int fimc_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ctx-&gt;slock, flags);</div><div class='add'>+	spin_lock_irqsave(&amp;ctx-&gt;fimc_dev-&gt;slock, flags);</div><div class='ctx'> 	ret = __fimc_s_ctrl(ctx, ctrl);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ctx-&gt;slock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ctx-&gt;fimc_dev-&gt;slock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -840,71 +581,93 @@ static const struct v4l2_ctrl_ops fimc_ctrl_ops = {</div><div class='ctx'> </div><div class='ctx'> int fimc_ctrls_create(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	struct samsung_fimc_variant *variant = ctx-&gt;fimc_dev-&gt;variant;</div><div class='add'>+	struct fimc_variant *variant = ctx-&gt;fimc_dev-&gt;variant;</div><div class='ctx'> 	unsigned int max_alpha = fimc_get_alpha_mask(ctx-&gt;d_frame.fmt);</div><div class='add'>+	struct fimc_ctrls *ctrls = &amp;ctx-&gt;ctrls;</div><div class='add'>+	struct v4l2_ctrl_handler *handler = &amp;ctrls-&gt;handler;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;ctrls_rdy)</div><div class='add'>+	if (ctx-&gt;ctrls.ready)</div><div class='ctx'> 		return 0;</div><div class='del'>-	v4l2_ctrl_handler_init(&amp;ctx-&gt;ctrl_handler, 4);</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;ctrl_rotate = v4l2_ctrl_new_std(&amp;ctx-&gt;ctrl_handler, &amp;fimc_ctrl_ops,</div><div class='add'>+	v4l2_ctrl_handler_init(handler, 6);</div><div class='add'>+</div><div class='add'>+	ctrls-&gt;rotate = v4l2_ctrl_new_std(handler, &amp;fimc_ctrl_ops,</div><div class='ctx'> 					V4L2_CID_ROTATE, 0, 270, 90, 0);</div><div class='del'>-	ctx-&gt;ctrl_hflip = v4l2_ctrl_new_std(&amp;ctx-&gt;ctrl_handler, &amp;fimc_ctrl_ops,</div><div class='add'>+	ctrls-&gt;hflip = v4l2_ctrl_new_std(handler, &amp;fimc_ctrl_ops,</div><div class='ctx'> 					V4L2_CID_HFLIP, 0, 1, 1, 0);</div><div class='del'>-	ctx-&gt;ctrl_vflip = v4l2_ctrl_new_std(&amp;ctx-&gt;ctrl_handler, &amp;fimc_ctrl_ops,</div><div class='add'>+	ctrls-&gt;vflip = v4l2_ctrl_new_std(handler, &amp;fimc_ctrl_ops,</div><div class='ctx'> 					V4L2_CID_VFLIP, 0, 1, 1, 0);</div><div class='add'>+</div><div class='ctx'> 	if (variant-&gt;has_alpha)</div><div class='del'>-		ctx-&gt;ctrl_alpha = v4l2_ctrl_new_std(&amp;ctx-&gt;ctrl_handler,</div><div class='del'>-				    &amp;fimc_ctrl_ops, V4L2_CID_ALPHA_COMPONENT,</div><div class='del'>-				    0, max_alpha, 1, 0);</div><div class='add'>+		ctrls-&gt;alpha = v4l2_ctrl_new_std(handler, &amp;fimc_ctrl_ops,</div><div class='add'>+					V4L2_CID_ALPHA_COMPONENT,</div><div class='add'>+					0, max_alpha, 1, 0);</div><div class='ctx'> 	else</div><div class='del'>-		ctx-&gt;ctrl_alpha = NULL;</div><div class='add'>+		ctrls-&gt;alpha = NULL;</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;ctrls_rdy = ctx-&gt;ctrl_handler.error == 0;</div><div class='add'>+	ctrls-&gt;colorfx = v4l2_ctrl_new_std_menu(handler, &amp;fimc_ctrl_ops,</div><div class='add'>+				V4L2_CID_COLORFX, V4L2_COLORFX_SET_CBCR,</div><div class='add'>+				~0x983f, V4L2_COLORFX_NONE);</div><div class='ctx'> </div><div class='del'>-	return ctx-&gt;ctrl_handler.error;</div><div class='add'>+	ctrls-&gt;colorfx_cbcr = v4l2_ctrl_new_std(handler, &amp;fimc_ctrl_ops,</div><div class='add'>+				V4L2_CID_COLORFX_CBCR, 0, 0xffff, 1, 0);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;effect.type = FIMC_REG_CIIMGEFF_FIN_BYPASS;</div><div class='add'>+</div><div class='add'>+	if (!handler-&gt;error) {</div><div class='add'>+		v4l2_ctrl_cluster(3, &amp;ctrls-&gt;colorfx);</div><div class='add'>+		ctrls-&gt;ready = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return handler-&gt;error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fimc_ctrls_delete(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	if (ctx-&gt;ctrls_rdy) {</div><div class='del'>-		v4l2_ctrl_handler_free(&amp;ctx-&gt;ctrl_handler);</div><div class='del'>-		ctx-&gt;ctrls_rdy = false;</div><div class='del'>-		ctx-&gt;ctrl_alpha = NULL;</div><div class='add'>+	struct fimc_ctrls *ctrls = &amp;ctx-&gt;ctrls;</div><div class='add'>+</div><div class='add'>+	if (ctrls-&gt;ready) {</div><div class='add'>+		v4l2_ctrl_handler_free(&amp;ctrls-&gt;handler);</div><div class='add'>+		ctrls-&gt;ready = false;</div><div class='add'>+		ctrls-&gt;alpha = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fimc_ctrls_activate(struct fimc_ctx *ctx, bool active)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int has_alpha = ctx-&gt;d_frame.fmt-&gt;flags &amp; FMT_HAS_ALPHA;</div><div class='add'>+	struct fimc_ctrls *ctrls = &amp;ctx-&gt;ctrls;</div><div class='ctx'> </div><div class='del'>-	if (!ctx-&gt;ctrls_rdy)</div><div class='add'>+	if (!ctrls-&gt;ready)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;ctx-&gt;ctrl_handler.lock);</div><div class='del'>-	v4l2_ctrl_activate(ctx-&gt;ctrl_rotate, active);</div><div class='del'>-	v4l2_ctrl_activate(ctx-&gt;ctrl_hflip, active);</div><div class='del'>-	v4l2_ctrl_activate(ctx-&gt;ctrl_vflip, active);</div><div class='del'>-	if (ctx-&gt;ctrl_alpha)</div><div class='del'>-		v4l2_ctrl_activate(ctx-&gt;ctrl_alpha, active &amp;&amp; has_alpha);</div><div class='add'>+	mutex_lock(&amp;ctrls-&gt;handler.lock);</div><div class='add'>+	v4l2_ctrl_activate(ctrls-&gt;rotate, active);</div><div class='add'>+	v4l2_ctrl_activate(ctrls-&gt;hflip, active);</div><div class='add'>+	v4l2_ctrl_activate(ctrls-&gt;vflip, active);</div><div class='add'>+	v4l2_ctrl_activate(ctrls-&gt;colorfx, active);</div><div class='add'>+	if (ctrls-&gt;alpha)</div><div class='add'>+		v4l2_ctrl_activate(ctrls-&gt;alpha, active &amp;&amp; has_alpha);</div><div class='ctx'> </div><div class='ctx'> 	if (active) {</div><div class='del'>-		ctx-&gt;rotation = ctx-&gt;ctrl_rotate-&gt;val;</div><div class='del'>-		ctx-&gt;hflip    = ctx-&gt;ctrl_hflip-&gt;val;</div><div class='del'>-		ctx-&gt;vflip    = ctx-&gt;ctrl_vflip-&gt;val;</div><div class='add'>+		fimc_set_color_effect(ctx, ctrls-&gt;colorfx-&gt;cur.val);</div><div class='add'>+		ctx-&gt;rotation = ctrls-&gt;rotate-&gt;val;</div><div class='add'>+		ctx-&gt;hflip    = ctrls-&gt;hflip-&gt;val;</div><div class='add'>+		ctx-&gt;vflip    = ctrls-&gt;vflip-&gt;val;</div><div class='ctx'> 	} else {</div><div class='add'>+		ctx-&gt;effect.type = FIMC_REG_CIIMGEFF_FIN_BYPASS;</div><div class='ctx'> 		ctx-&gt;rotation = 0;</div><div class='ctx'> 		ctx-&gt;hflip    = 0;</div><div class='ctx'> 		ctx-&gt;vflip    = 0;</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;ctx-&gt;ctrl_handler.lock);</div><div class='add'>+	mutex_unlock(&amp;ctrls-&gt;handler.lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Update maximum value of the alpha color control */</div><div class='ctx'> void fimc_alpha_ctrl_update(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='del'>-	struct v4l2_ctrl *ctrl = ctx-&gt;ctrl_alpha;</div><div class='add'>+	struct v4l2_ctrl *ctrl = ctx-&gt;ctrls.alpha;</div><div class='ctx'> </div><div class='ctx'> 	if (ctrl == NULL || !fimc-&gt;variant-&gt;has_alpha)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -918,39 +681,6 @@ void fimc_alpha_ctrl_update(struct fimc_ctx *ctx)</div><div class='ctx'> 	v4l2_ctrl_unlock(ctrl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * V4L2 ioctl handlers</div><div class='del'>- */</div><div class='del'>-static int fimc_m2m_querycap(struct file *file, void *fh,</div><div class='del'>-			     struct v4l2_capability *cap)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='del'>-</div><div class='del'>-	strncpy(cap-&gt;driver, fimc-&gt;pdev-&gt;name, sizeof(cap-&gt;driver) - 1);</div><div class='del'>-	strncpy(cap-&gt;card, fimc-&gt;pdev-&gt;name, sizeof(cap-&gt;card) - 1);</div><div class='del'>-	cap-&gt;bus_info[0] = 0;</div><div class='del'>-	cap-&gt;capabilities = V4L2_CAP_STREAMING |</div><div class='del'>-		V4L2_CAP_VIDEO_CAPTURE_MPLANE | V4L2_CAP_VIDEO_OUTPUT_MPLANE;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_enum_fmt_mplane(struct file *file, void *priv,</div><div class='del'>-				    struct v4l2_fmtdesc *f)</div><div class='del'>-{</div><div class='del'>-	struct fimc_fmt *fmt;</div><div class='del'>-</div><div class='del'>-	fmt = fimc_find_format(NULL, NULL, get_m2m_fmt_flags(f-&gt;type),</div><div class='del'>-			       f-&gt;index);</div><div class='del'>-	if (!fmt)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	strncpy(f-&gt;description, fmt-&gt;name, sizeof(f-&gt;description) - 1);</div><div class='del'>-	f-&gt;pixelformat = fmt-&gt;fourcc;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int fimc_fill_format(struct fimc_frame *frame, struct v4l2_format *f)</div><div class='ctx'> {</div><div class='ctx'> 	struct v4l2_pix_format_mplane *pixm = &amp;f-&gt;fmt.pix_mp;</div><div class='hunk'>@@ -1029,18 +759,6 @@ void fimc_adjust_mplane_format(struct fimc_fmt *fmt, u32 width, u32 height,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fimc_m2m_g_fmt_mplane(struct file *file, void *fh,</div><div class='del'>-				 struct v4l2_format *f)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-	struct fimc_frame *frame = ctx_get_frame(ctx, f-&gt;type);</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(frame))</div><div class='del'>-		return PTR_ERR(frame);</div><div class='del'>-</div><div class='del'>-	return fimc_fill_format(frame, f);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * fimc_find_format - lookup fimc color format by fourcc or media bus format</div><div class='ctx'>  * @pixelformat: fourcc to match, ignored if null</div><div class='hunk'>@@ -1048,14 +766,14 @@ static int fimc_m2m_g_fmt_mplane(struct file *file, void *fh,</div><div class='ctx'>  * @mask: the color flags to match</div><div class='ctx'>  * @index: offset in the fimc_formats array, ignored if negative</div><div class='ctx'>  */</div><div class='del'>-struct fimc_fmt *fimc_find_format(u32 *pixelformat, u32 *mbus_code,</div><div class='add'>+struct fimc_fmt *fimc_find_format(const u32 *pixelformat, const u32 *mbus_code,</div><div class='ctx'> 				  unsigned int mask, int index)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_fmt *fmt, *def_fmt = NULL;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int id = 0;</div><div class='ctx'> </div><div class='del'>-	if (index &gt;= ARRAY_SIZE(fimc_formats))</div><div class='add'>+	if (index &gt;= (int)ARRAY_SIZE(fimc_formats))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(fimc_formats); ++i) {</div><div class='hunk'>@@ -1073,535 +791,10 @@ struct fimc_fmt *fimc_find_format(u32 *pixelformat, u32 *mbus_code,</div><div class='ctx'> 	return def_fmt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fimc_try_fmt_mplane(struct fimc_ctx *ctx, struct v4l2_format *f)</div><div class='del'>-{</div><div class='del'>-	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='del'>-	struct samsung_fimc_variant *variant = fimc-&gt;variant;</div><div class='del'>-	struct v4l2_pix_format_mplane *pix = &amp;f-&gt;fmt.pix_mp;</div><div class='del'>-	struct fimc_fmt *fmt;</div><div class='del'>-	u32 max_w, mod_x, mod_y;</div><div class='del'>-</div><div class='del'>-	if (!IS_M2M(f-&gt;type))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	dbg("w: %d, h: %d", pix-&gt;width, pix-&gt;height);</div><div class='del'>-</div><div class='del'>-	fmt = fimc_find_format(&amp;pix-&gt;pixelformat, NULL,</div><div class='del'>-			       get_m2m_fmt_flags(f-&gt;type), 0);</div><div class='del'>-	if (WARN(fmt == NULL, "Pixel format lookup failed"))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (pix-&gt;field == V4L2_FIELD_ANY)</div><div class='del'>-		pix-&gt;field = V4L2_FIELD_NONE;</div><div class='del'>-	else if (pix-&gt;field != V4L2_FIELD_NONE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (f-&gt;type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {</div><div class='del'>-		max_w = variant-&gt;pix_limit-&gt;scaler_dis_w;</div><div class='del'>-		mod_x = ffs(variant-&gt;min_inp_pixsize) - 1;</div><div class='del'>-	} else {</div><div class='del'>-		max_w = variant-&gt;pix_limit-&gt;out_rot_dis_w;</div><div class='del'>-		mod_x = ffs(variant-&gt;min_out_pixsize) - 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (tiled_fmt(fmt)) {</div><div class='del'>-		mod_x = 6; /* 64 x 32 pixels tile */</div><div class='del'>-		mod_y = 5;</div><div class='del'>-	} else {</div><div class='del'>-		if (variant-&gt;min_vsize_align == 1)</div><div class='del'>-			mod_y = fimc_fmt_is_rgb(fmt-&gt;color) ? 0 : 1;</div><div class='del'>-		else</div><div class='del'>-			mod_y = ffs(variant-&gt;min_vsize_align) - 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	v4l_bound_align_image(&amp;pix-&gt;width, 16, max_w, mod_x,</div><div class='del'>-		&amp;pix-&gt;height, 8, variant-&gt;pix_limit-&gt;scaler_dis_w, mod_y, 0);</div><div class='del'>-</div><div class='del'>-	fimc_adjust_mplane_format(fmt, pix-&gt;width, pix-&gt;height, &amp;f-&gt;fmt.pix_mp);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_try_fmt_mplane(struct file *file, void *fh,</div><div class='del'>-				   struct v4l2_format *f)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-</div><div class='del'>-	return fimc_try_fmt_mplane(ctx, f);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_s_fmt_mplane(struct file *file, void *fh,</div><div class='del'>-				 struct v4l2_format *f)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='del'>-	struct vb2_queue *vq;</div><div class='del'>-	struct fimc_frame *frame;</div><div class='del'>-	struct v4l2_pix_format_mplane *pix;</div><div class='del'>-	int i, ret = 0;</div><div class='del'>-</div><div class='del'>-	ret = fimc_try_fmt_mplane(ctx, f);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	vq = v4l2_m2m_get_vq(ctx-&gt;m2m_ctx, f-&gt;type);</div><div class='del'>-</div><div class='del'>-	if (vb2_is_busy(vq)) {</div><div class='del'>-		v4l2_err(fimc-&gt;m2m.vfd, "queue (%d) busy\n", f-&gt;type);</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (f-&gt;type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)</div><div class='del'>-		frame = &amp;ctx-&gt;s_frame;</div><div class='del'>-	else</div><div class='del'>-		frame = &amp;ctx-&gt;d_frame;</div><div class='del'>-</div><div class='del'>-	pix = &amp;f-&gt;fmt.pix_mp;</div><div class='del'>-	frame-&gt;fmt = fimc_find_format(&amp;pix-&gt;pixelformat, NULL,</div><div class='del'>-				      get_m2m_fmt_flags(f-&gt;type), 0);</div><div class='del'>-	if (!frame-&gt;fmt)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* Update RGB Alpha control state and value range */</div><div class='del'>-	fimc_alpha_ctrl_update(ctx);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; frame-&gt;fmt-&gt;colplanes; i++) {</div><div class='del'>-		frame-&gt;payload[i] =</div><div class='del'>-			(pix-&gt;width * pix-&gt;height * frame-&gt;fmt-&gt;depth[i]) / 8;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	fimc_fill_frame(frame, f);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;scaler.enabled = 1;</div><div class='del'>-</div><div class='del'>-	if (f-&gt;type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)</div><div class='del'>-		fimc_ctx_state_lock_set(FIMC_PARAMS | FIMC_DST_FMT, ctx);</div><div class='del'>-	else</div><div class='del'>-		fimc_ctx_state_lock_set(FIMC_PARAMS | FIMC_SRC_FMT, ctx);</div><div class='del'>-</div><div class='del'>-	dbg("f_w: %d, f_h: %d", frame-&gt;f_width, frame-&gt;f_height);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_reqbufs(struct file *file, void *fh,</div><div class='del'>-			    struct v4l2_requestbuffers *reqbufs)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-</div><div class='del'>-	return v4l2_m2m_reqbufs(file, ctx-&gt;m2m_ctx, reqbufs);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_querybuf(struct file *file, void *fh,</div><div class='del'>-			     struct v4l2_buffer *buf)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-</div><div class='del'>-	return v4l2_m2m_querybuf(file, ctx-&gt;m2m_ctx, buf);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_qbuf(struct file *file, void *fh,</div><div class='del'>-			 struct v4l2_buffer *buf)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-</div><div class='del'>-	return v4l2_m2m_qbuf(file, ctx-&gt;m2m_ctx, buf);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_dqbuf(struct file *file, void *fh,</div><div class='del'>-			  struct v4l2_buffer *buf)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-</div><div class='del'>-	return v4l2_m2m_dqbuf(file, ctx-&gt;m2m_ctx, buf);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_streamon(struct file *file, void *fh,</div><div class='del'>-			     enum v4l2_buf_type type)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-</div><div class='del'>-	/* The source and target color format need to be set */</div><div class='del'>-	if (V4L2_TYPE_IS_OUTPUT(type)) {</div><div class='del'>-		if (!fimc_ctx_state_is_set(FIMC_SRC_FMT, ctx))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-	} else if (!fimc_ctx_state_is_set(FIMC_DST_FMT, ctx)) {</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return v4l2_m2m_streamon(file, ctx-&gt;m2m_ctx, type);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_streamoff(struct file *file, void *fh,</div><div class='del'>-			    enum v4l2_buf_type type)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-</div><div class='del'>-	return v4l2_m2m_streamoff(file, ctx-&gt;m2m_ctx, type);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_cropcap(struct file *file, void *fh,</div><div class='del'>-			    struct v4l2_cropcap *cr)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-	struct fimc_frame *frame;</div><div class='del'>-</div><div class='del'>-	frame = ctx_get_frame(ctx, cr-&gt;type);</div><div class='del'>-	if (IS_ERR(frame))</div><div class='del'>-		return PTR_ERR(frame);</div><div class='del'>-</div><div class='del'>-	cr-&gt;bounds.left		= 0;</div><div class='del'>-	cr-&gt;bounds.top		= 0;</div><div class='del'>-	cr-&gt;bounds.width	= frame-&gt;o_width;</div><div class='del'>-	cr-&gt;bounds.height	= frame-&gt;o_height;</div><div class='del'>-	cr-&gt;defrect		= cr-&gt;bounds;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_g_crop(struct file *file, void *fh, struct v4l2_crop *cr)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-	struct fimc_frame *frame;</div><div class='del'>-</div><div class='del'>-	frame = ctx_get_frame(ctx, cr-&gt;type);</div><div class='del'>-	if (IS_ERR(frame))</div><div class='del'>-		return PTR_ERR(frame);</div><div class='del'>-</div><div class='del'>-	cr-&gt;c.left = frame-&gt;offs_h;</div><div class='del'>-	cr-&gt;c.top = frame-&gt;offs_v;</div><div class='del'>-	cr-&gt;c.width = frame-&gt;width;</div><div class='del'>-	cr-&gt;c.height = frame-&gt;height;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_try_crop(struct fimc_ctx *ctx, struct v4l2_crop *cr)</div><div class='del'>-{</div><div class='del'>-	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='del'>-	struct fimc_frame *f;</div><div class='del'>-	u32 min_size, halign, depth = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (cr-&gt;c.top &lt; 0 || cr-&gt;c.left &lt; 0) {</div><div class='del'>-		v4l2_err(fimc-&gt;m2m.vfd,</div><div class='del'>-			"doesn't support negative values for top &amp; left\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	if (cr-&gt;type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)</div><div class='del'>-		f = &amp;ctx-&gt;d_frame;</div><div class='del'>-	else if (cr-&gt;type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)</div><div class='del'>-		f = &amp;ctx-&gt;s_frame;</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	min_size = (f == &amp;ctx-&gt;s_frame) ?</div><div class='del'>-		fimc-&gt;variant-&gt;min_inp_pixsize : fimc-&gt;variant-&gt;min_out_pixsize;</div><div class='del'>-</div><div class='del'>-	/* Get pixel alignment constraints. */</div><div class='del'>-	if (fimc-&gt;variant-&gt;min_vsize_align == 1)</div><div class='del'>-		halign = fimc_fmt_is_rgb(f-&gt;fmt-&gt;color) ? 0 : 1;</div><div class='del'>-	else</div><div class='del'>-		halign = ffs(fimc-&gt;variant-&gt;min_vsize_align) - 1;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; f-&gt;fmt-&gt;colplanes; i++)</div><div class='del'>-		depth += f-&gt;fmt-&gt;depth[i];</div><div class='del'>-</div><div class='del'>-	v4l_bound_align_image(&amp;cr-&gt;c.width, min_size, f-&gt;o_width,</div><div class='del'>-			      ffs(min_size) - 1,</div><div class='del'>-			      &amp;cr-&gt;c.height, min_size, f-&gt;o_height,</div><div class='del'>-			      halign, 64/(ALIGN(depth, 8)));</div><div class='del'>-</div><div class='del'>-	/* adjust left/top if cropping rectangle is out of bounds */</div><div class='del'>-	if (cr-&gt;c.left + cr-&gt;c.width &gt; f-&gt;o_width)</div><div class='del'>-		cr-&gt;c.left = f-&gt;o_width - cr-&gt;c.width;</div><div class='del'>-	if (cr-&gt;c.top + cr-&gt;c.height &gt; f-&gt;o_height)</div><div class='del'>-		cr-&gt;c.top = f-&gt;o_height - cr-&gt;c.height;</div><div class='del'>-</div><div class='del'>-	cr-&gt;c.left = round_down(cr-&gt;c.left, min_size);</div><div class='del'>-	cr-&gt;c.top  = round_down(cr-&gt;c.top, fimc-&gt;variant-&gt;hor_offs_align);</div><div class='del'>-</div><div class='del'>-	dbg("l:%d, t:%d, w:%d, h:%d, f_w: %d, f_h: %d",</div><div class='del'>-	    cr-&gt;c.left, cr-&gt;c.top, cr-&gt;c.width, cr-&gt;c.height,</div><div class='del'>-	    f-&gt;f_width, f-&gt;f_height);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_s_crop(struct file *file, void *fh, struct v4l2_crop *cr)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='del'>-	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='del'>-	struct fimc_frame *f;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = fimc_m2m_try_crop(ctx, cr);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	f = (cr-&gt;type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) ?</div><div class='del'>-		&amp;ctx-&gt;s_frame : &amp;ctx-&gt;d_frame;</div><div class='del'>-</div><div class='del'>-	/* Check to see if scaling ratio is within supported range */</div><div class='del'>-	if (fimc_ctx_state_is_set(FIMC_DST_FMT | FIMC_SRC_FMT, ctx)) {</div><div class='del'>-		if (cr-&gt;type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {</div><div class='del'>-			ret = fimc_check_scaler_ratio(ctx, cr-&gt;c.width,</div><div class='del'>-					cr-&gt;c.height, ctx-&gt;d_frame.width,</div><div class='del'>-					ctx-&gt;d_frame.height, ctx-&gt;rotation);</div><div class='del'>-		} else {</div><div class='del'>-			ret = fimc_check_scaler_ratio(ctx, ctx-&gt;s_frame.width,</div><div class='del'>-					ctx-&gt;s_frame.height, cr-&gt;c.width,</div><div class='del'>-					cr-&gt;c.height, ctx-&gt;rotation);</div><div class='del'>-		}</div><div class='del'>-		if (ret) {</div><div class='del'>-			v4l2_err(fimc-&gt;m2m.vfd, "Out of scaler range\n");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	f-&gt;offs_h = cr-&gt;c.left;</div><div class='del'>-	f-&gt;offs_v = cr-&gt;c.top;</div><div class='del'>-	f-&gt;width  = cr-&gt;c.width;</div><div class='del'>-	f-&gt;height = cr-&gt;c.height;</div><div class='del'>-</div><div class='del'>-	fimc_ctx_state_lock_set(FIMC_PARAMS, ctx);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct v4l2_ioctl_ops fimc_m2m_ioctl_ops = {</div><div class='del'>-	.vidioc_querycap		= fimc_m2m_querycap,</div><div class='del'>-</div><div class='del'>-	.vidioc_enum_fmt_vid_cap_mplane	= fimc_m2m_enum_fmt_mplane,</div><div class='del'>-	.vidioc_enum_fmt_vid_out_mplane	= fimc_m2m_enum_fmt_mplane,</div><div class='del'>-</div><div class='del'>-	.vidioc_g_fmt_vid_cap_mplane	= fimc_m2m_g_fmt_mplane,</div><div class='del'>-	.vidioc_g_fmt_vid_out_mplane	= fimc_m2m_g_fmt_mplane,</div><div class='del'>-</div><div class='del'>-	.vidioc_try_fmt_vid_cap_mplane	= fimc_m2m_try_fmt_mplane,</div><div class='del'>-	.vidioc_try_fmt_vid_out_mplane	= fimc_m2m_try_fmt_mplane,</div><div class='del'>-</div><div class='del'>-	.vidioc_s_fmt_vid_cap_mplane	= fimc_m2m_s_fmt_mplane,</div><div class='del'>-	.vidioc_s_fmt_vid_out_mplane	= fimc_m2m_s_fmt_mplane,</div><div class='del'>-</div><div class='del'>-	.vidioc_reqbufs			= fimc_m2m_reqbufs,</div><div class='del'>-	.vidioc_querybuf		= fimc_m2m_querybuf,</div><div class='del'>-</div><div class='del'>-	.vidioc_qbuf			= fimc_m2m_qbuf,</div><div class='del'>-	.vidioc_dqbuf			= fimc_m2m_dqbuf,</div><div class='del'>-</div><div class='del'>-	.vidioc_streamon		= fimc_m2m_streamon,</div><div class='del'>-	.vidioc_streamoff		= fimc_m2m_streamoff,</div><div class='del'>-</div><div class='del'>-	.vidioc_g_crop			= fimc_m2m_g_crop,</div><div class='del'>-	.vidioc_s_crop			= fimc_m2m_s_crop,</div><div class='del'>-	.vidioc_cropcap			= fimc_m2m_cropcap</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int queue_init(void *priv, struct vb2_queue *src_vq,</div><div class='del'>-		      struct vb2_queue *dst_vq)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = priv;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	memset(src_vq, 0, sizeof(*src_vq));</div><div class='del'>-	src_vq-&gt;type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;</div><div class='del'>-	src_vq-&gt;io_modes = VB2_MMAP | VB2_USERPTR;</div><div class='del'>-	src_vq-&gt;drv_priv = ctx;</div><div class='del'>-	src_vq-&gt;ops = &amp;fimc_qops;</div><div class='del'>-	src_vq-&gt;mem_ops = &amp;vb2_dma_contig_memops;</div><div class='del'>-	src_vq-&gt;buf_struct_size = sizeof(struct v4l2_m2m_buffer);</div><div class='del'>-</div><div class='del'>-	ret = vb2_queue_init(src_vq);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	memset(dst_vq, 0, sizeof(*dst_vq));</div><div class='del'>-	dst_vq-&gt;type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;</div><div class='del'>-	dst_vq-&gt;io_modes = VB2_MMAP | VB2_USERPTR;</div><div class='del'>-	dst_vq-&gt;drv_priv = ctx;</div><div class='del'>-	dst_vq-&gt;ops = &amp;fimc_qops;</div><div class='del'>-	dst_vq-&gt;mem_ops = &amp;vb2_dma_contig_memops;</div><div class='del'>-	dst_vq-&gt;buf_struct_size = sizeof(struct v4l2_m2m_buffer);</div><div class='del'>-</div><div class='del'>-	return vb2_queue_init(dst_vq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_open(struct file *file)</div><div class='del'>-{</div><div class='del'>-	struct fimc_dev *fimc = video_drvdata(file);</div><div class='del'>-	struct fimc_ctx *ctx;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	dbg("pid: %d, state: 0x%lx, refcnt: %d",</div><div class='del'>-		task_pid_nr(current), fimc-&gt;state, fimc-&gt;vid_cap.refcnt);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Return if the corresponding video capture node</div><div class='del'>-	 * is already opened.</div><div class='del'>-	 */</div><div class='del'>-	if (fimc-&gt;vid_cap.refcnt &gt; 0)</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	ctx = kzalloc(sizeof *ctx, GFP_KERNEL);</div><div class='del'>-	if (!ctx)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	v4l2_fh_init(&amp;ctx-&gt;fh, fimc-&gt;m2m.vfd);</div><div class='del'>-	ctx-&gt;fimc_dev = fimc;</div><div class='del'>-</div><div class='del'>-	/* Default color format */</div><div class='del'>-	ctx-&gt;s_frame.fmt = &amp;fimc_formats[0];</div><div class='del'>-	ctx-&gt;d_frame.fmt = &amp;fimc_formats[0];</div><div class='del'>-</div><div class='del'>-	ret = fimc_ctrls_create(ctx);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto error_fh;</div><div class='del'>-</div><div class='del'>-	/* Use separate control handler per file handle */</div><div class='del'>-	ctx-&gt;fh.ctrl_handler = &amp;ctx-&gt;ctrl_handler;</div><div class='del'>-	file-&gt;private_data = &amp;ctx-&gt;fh;</div><div class='del'>-	v4l2_fh_add(&amp;ctx-&gt;fh);</div><div class='del'>-</div><div class='del'>-	/* Setup the device context for memory-to-memory mode */</div><div class='del'>-	ctx-&gt;state = FIMC_CTX_M2M;</div><div class='del'>-	ctx-&gt;flags = 0;</div><div class='del'>-	ctx-&gt;in_path = FIMC_DMA;</div><div class='del'>-	ctx-&gt;out_path = FIMC_DMA;</div><div class='del'>-	spin_lock_init(&amp;ctx-&gt;slock);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;m2m_ctx = v4l2_m2m_ctx_init(fimc-&gt;m2m.m2m_dev, ctx, queue_init);</div><div class='del'>-	if (IS_ERR(ctx-&gt;m2m_ctx)) {</div><div class='del'>-		ret = PTR_ERR(ctx-&gt;m2m_ctx);</div><div class='del'>-		goto error_c;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (fimc-&gt;m2m.refcnt++ == 0)</div><div class='del'>-		set_bit(ST_M2M_RUN, &amp;fimc-&gt;state);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-error_c:</div><div class='del'>-	fimc_ctrls_delete(ctx);</div><div class='del'>-error_fh:</div><div class='del'>-	v4l2_fh_del(&amp;ctx-&gt;fh);</div><div class='del'>-	v4l2_fh_exit(&amp;ctx-&gt;fh);</div><div class='del'>-	kfree(ctx);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_release(struct file *file)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(file-&gt;private_data);</div><div class='del'>-	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='del'>-</div><div class='del'>-	dbg("pid: %d, state: 0x%lx, refcnt= %d",</div><div class='del'>-		task_pid_nr(current), fimc-&gt;state, fimc-&gt;m2m.refcnt);</div><div class='del'>-</div><div class='del'>-	v4l2_m2m_ctx_release(ctx-&gt;m2m_ctx);</div><div class='del'>-	fimc_ctrls_delete(ctx);</div><div class='del'>-	v4l2_fh_del(&amp;ctx-&gt;fh);</div><div class='del'>-	v4l2_fh_exit(&amp;ctx-&gt;fh);</div><div class='del'>-</div><div class='del'>-	if (--fimc-&gt;m2m.refcnt &lt;= 0)</div><div class='del'>-		clear_bit(ST_M2M_RUN, &amp;fimc-&gt;state);</div><div class='del'>-	kfree(ctx);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int fimc_m2m_poll(struct file *file,</div><div class='del'>-				  struct poll_table_struct *wait)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(file-&gt;private_data);</div><div class='del'>-</div><div class='del'>-	return v4l2_m2m_poll(file, ctx-&gt;m2m_ctx, wait);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int fimc_m2m_mmap(struct file *file, struct vm_area_struct *vma)</div><div class='del'>-{</div><div class='del'>-	struct fimc_ctx *ctx = fh_to_ctx(file-&gt;private_data);</div><div class='del'>-</div><div class='del'>-	return v4l2_m2m_mmap(file, ctx-&gt;m2m_ctx, vma);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct v4l2_file_operations fimc_m2m_fops = {</div><div class='del'>-	.owner		= THIS_MODULE,</div><div class='del'>-	.open		= fimc_m2m_open,</div><div class='del'>-	.release	= fimc_m2m_release,</div><div class='del'>-	.poll		= fimc_m2m_poll,</div><div class='del'>-	.unlocked_ioctl	= video_ioctl2,</div><div class='del'>-	.mmap		= fimc_m2m_mmap,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct v4l2_m2m_ops m2m_ops = {</div><div class='del'>-	.device_run	= fimc_dma_run,</div><div class='del'>-	.job_abort	= fimc_job_abort,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int fimc_register_m2m_device(struct fimc_dev *fimc,</div><div class='del'>-			     struct v4l2_device *v4l2_dev)</div><div class='del'>-{</div><div class='del'>-	struct video_device *vfd;</div><div class='del'>-	struct platform_device *pdev;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (!fimc)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	pdev = fimc-&gt;pdev;</div><div class='del'>-	fimc-&gt;v4l2_dev = v4l2_dev;</div><div class='del'>-</div><div class='del'>-	vfd = video_device_alloc();</div><div class='del'>-	if (!vfd) {</div><div class='del'>-		v4l2_err(v4l2_dev, "Failed to allocate video device\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vfd-&gt;fops	= &amp;fimc_m2m_fops;</div><div class='del'>-	vfd-&gt;ioctl_ops	= &amp;fimc_m2m_ioctl_ops;</div><div class='del'>-	vfd-&gt;v4l2_dev	= v4l2_dev;</div><div class='del'>-	vfd-&gt;minor	= -1;</div><div class='del'>-	vfd-&gt;release	= video_device_release;</div><div class='del'>-	vfd-&gt;lock	= &amp;fimc-&gt;lock;</div><div class='del'>-</div><div class='del'>-	snprintf(vfd-&gt;name, sizeof(vfd-&gt;name), "%s.m2m", dev_name(&amp;pdev-&gt;dev));</div><div class='del'>-	video_set_drvdata(vfd, fimc);</div><div class='del'>-</div><div class='del'>-	fimc-&gt;m2m.vfd = vfd;</div><div class='del'>-	fimc-&gt;m2m.m2m_dev = v4l2_m2m_init(&amp;m2m_ops);</div><div class='del'>-	if (IS_ERR(fimc-&gt;m2m.m2m_dev)) {</div><div class='del'>-		v4l2_err(v4l2_dev, "failed to initialize v4l2-m2m device\n");</div><div class='del'>-		ret = PTR_ERR(fimc-&gt;m2m.m2m_dev);</div><div class='del'>-		goto err_init;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = media_entity_init(&amp;vfd-&gt;entity, 0, NULL, 0);</div><div class='del'>-	if (!ret)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	v4l2_m2m_release(fimc-&gt;m2m.m2m_dev);</div><div class='del'>-err_init:</div><div class='del'>-	video_device_release(fimc-&gt;m2m.vfd);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void fimc_unregister_m2m_device(struct fimc_dev *fimc)</div><div class='del'>-{</div><div class='del'>-	if (!fimc)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (fimc-&gt;m2m.m2m_dev)</div><div class='del'>-		v4l2_m2m_release(fimc-&gt;m2m.m2m_dev);</div><div class='del'>-	if (fimc-&gt;m2m.vfd) {</div><div class='del'>-		media_entity_cleanup(&amp;fimc-&gt;m2m.vfd-&gt;entity);</div><div class='del'>-		/* Can also be called if video device wasn't registered */</div><div class='del'>-		video_unregister_device(fimc-&gt;m2m.vfd);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void fimc_clk_put(struct fimc_dev *fimc)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	for (i = 0; i &lt; fimc-&gt;num_clocks; i++) {</div><div class='add'>+	for (i = 0; i &lt; MAX_FIMC_CLOCKS; i++) {</div><div class='ctx'> 		if (IS_ERR_OR_NULL(fimc-&gt;clock[i]))</div><div class='ctx'> 			continue;</div><div class='ctx'> 		clk_unprepare(fimc-&gt;clock[i]);</div><div class='hunk'>@@ -1614,7 +807,7 @@ static int fimc_clk_get(struct fimc_dev *fimc)</div><div class='ctx'> {</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; fimc-&gt;num_clocks; i++) {</div><div class='add'>+	for (i = 0; i &lt; MAX_FIMC_CLOCKS; i++) {</div><div class='ctx'> 		fimc-&gt;clock[i] = clk_get(&amp;fimc-&gt;pdev-&gt;dev, fimc_clocks[i]);</div><div class='ctx'> 		if (IS_ERR(fimc-&gt;clock[i]))</div><div class='ctx'> 			goto err;</div><div class='hunk'>@@ -1672,15 +865,12 @@ static int fimc_m2m_resume(struct fimc_dev *fimc)</div><div class='ctx'> </div><div class='ctx'> static int fimc_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct fimc_drvdata *drv_data = fimc_get_drvdata(pdev);</div><div class='add'>+	struct s5p_platform_fimc *pdata;</div><div class='ctx'> 	struct fimc_dev *fimc;</div><div class='ctx'> 	struct resource *res;</div><div class='del'>-	struct samsung_fimc_driverdata *drv_data;</div><div class='del'>-	struct s5p_platform_fimc *pdata;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	drv_data = (struct samsung_fimc_driverdata *)</div><div class='del'>-		platform_get_device_id(pdev)-&gt;driver_data;</div><div class='del'>-</div><div class='ctx'> 	if (pdev-&gt;id &gt;= drv_data-&gt;num_entities) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Invalid platform device id: %d\n",</div><div class='ctx'> 			pdev-&gt;id);</div><div class='hunk'>@@ -1714,28 +904,29 @@ static int fimc_probe(struct platform_device *pdev)</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Failed to get IRQ resource\n");</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	}</div><div class='del'>-	fimc-&gt;irq = res-&gt;start;</div><div class='ctx'> </div><div class='del'>-	fimc-&gt;num_clocks = MAX_FIMC_CLOCKS;</div><div class='ctx'> 	ret = fimc_clk_get(fimc);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	clk_set_rate(fimc-&gt;clock[CLK_BUS], drv_data-&gt;lclk_frequency);</div><div class='ctx'> 	clk_enable(fimc-&gt;clock[CLK_BUS]);</div><div class='ctx'> </div><div class='del'>-	platform_set_drvdata(pdev, fimc);</div><div class='del'>-</div><div class='del'>-	ret = devm_request_irq(&amp;pdev-&gt;dev, fimc-&gt;irq, fimc_irq_handler,</div><div class='del'>-			       0, pdev-&gt;name, fimc);</div><div class='add'>+	ret = devm_request_irq(&amp;pdev-&gt;dev, res-&gt;start, fimc_irq_handler,</div><div class='add'>+			       0, dev_name(&amp;pdev-&gt;dev), fimc);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to install irq (%d)\n", ret);</div><div class='ctx'> 		goto err_clk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = fimc_initialize_capture_subdev(fimc);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_clk;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, fimc);</div><div class='ctx'> 	pm_runtime_enable(&amp;pdev-&gt;dev);</div><div class='ctx'> 	ret = pm_runtime_get_sync(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto err_clk;</div><div class='add'>+		goto err_sd;</div><div class='ctx'> 	/* Initialize contiguous memory allocator */</div><div class='ctx'> 	fimc-&gt;alloc_ctx = vb2_dma_contig_init_ctx(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (IS_ERR(fimc-&gt;alloc_ctx)) {</div><div class='hunk'>@@ -1747,9 +938,10 @@ static int fimc_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	pm_runtime_put(&amp;pdev-&gt;dev);</div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='ctx'> err_pm:</div><div class='ctx'> 	pm_runtime_put(&amp;pdev-&gt;dev);</div><div class='add'>+err_sd:</div><div class='add'>+	fimc_unregister_capture_subdev(fimc);</div><div class='ctx'> err_clk:</div><div class='ctx'> 	fimc_clk_put(fimc);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1834,6 +1026,7 @@ static int __devexit fimc_remove(struct platform_device *pdev)</div><div class='ctx'> 	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='ctx'> 	pm_runtime_set_suspended(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='add'>+	fimc_unregister_capture_subdev(fimc);</div><div class='ctx'> 	vb2_dma_contig_cleanup_ctx(fimc-&gt;alloc_ctx);</div><div class='ctx'> </div><div class='ctx'> 	clk_disable(fimc-&gt;clock[CLK_BUS]);</div><div class='hunk'>@@ -1879,7 +1072,7 @@ static struct fimc_pix_limit s5p_pix_limit[4] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct samsung_fimc_variant fimc0_variant_s5p = {</div><div class='add'>+static struct fimc_variant fimc0_variant_s5p = {</div><div class='ctx'> 	.has_inp_rot	 = 1,</div><div class='ctx'> 	.has_out_rot	 = 1,</div><div class='ctx'> 	.has_cam_if	 = 1,</div><div class='hunk'>@@ -1891,17 +1084,17 @@ static struct samsung_fimc_variant fimc0_variant_s5p = {</div><div class='ctx'> 	.pix_limit	 = &amp;s5p_pix_limit[0],</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct samsung_fimc_variant fimc2_variant_s5p = {</div><div class='add'>+static struct fimc_variant fimc2_variant_s5p = {</div><div class='ctx'> 	.has_cam_if	 = 1,</div><div class='ctx'> 	.min_inp_pixsize = 16,</div><div class='ctx'> 	.min_out_pixsize = 16,</div><div class='ctx'> 	.hor_offs_align	 = 8,</div><div class='ctx'> 	.min_vsize_align = 16,</div><div class='ctx'> 	.out_buf_count	 = 4,</div><div class='del'>-	.pix_limit = &amp;s5p_pix_limit[1],</div><div class='add'>+	.pix_limit	 = &amp;s5p_pix_limit[1],</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct samsung_fimc_variant fimc0_variant_s5pv210 = {</div><div class='add'>+static struct fimc_variant fimc0_variant_s5pv210 = {</div><div class='ctx'> 	.pix_hoff	 = 1,</div><div class='ctx'> 	.has_inp_rot	 = 1,</div><div class='ctx'> 	.has_out_rot	 = 1,</div><div class='hunk'>@@ -1914,7 +1107,7 @@ static struct samsung_fimc_variant fimc0_variant_s5pv210 = {</div><div class='ctx'> 	.pix_limit	 = &amp;s5p_pix_limit[1],</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct samsung_fimc_variant fimc1_variant_s5pv210 = {</div><div class='add'>+static struct fimc_variant fimc1_variant_s5pv210 = {</div><div class='ctx'> 	.pix_hoff	 = 1,</div><div class='ctx'> 	.has_inp_rot	 = 1,</div><div class='ctx'> 	.has_out_rot	 = 1,</div><div class='hunk'>@@ -1928,7 +1121,7 @@ static struct samsung_fimc_variant fimc1_variant_s5pv210 = {</div><div class='ctx'> 	.pix_limit	 = &amp;s5p_pix_limit[2],</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct samsung_fimc_variant fimc2_variant_s5pv210 = {</div><div class='add'>+static struct fimc_variant fimc2_variant_s5pv210 = {</div><div class='ctx'> 	.has_cam_if	 = 1,</div><div class='ctx'> 	.pix_hoff	 = 1,</div><div class='ctx'> 	.min_inp_pixsize = 16,</div><div class='hunk'>@@ -1939,7 +1132,7 @@ static struct samsung_fimc_variant fimc2_variant_s5pv210 = {</div><div class='ctx'> 	.pix_limit	 = &amp;s5p_pix_limit[2],</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct samsung_fimc_variant fimc0_variant_exynos4 = {</div><div class='add'>+static struct fimc_variant fimc0_variant_exynos4 = {</div><div class='ctx'> 	.pix_hoff	 = 1,</div><div class='ctx'> 	.has_inp_rot	 = 1,</div><div class='ctx'> 	.has_out_rot	 = 1,</div><div class='hunk'>@@ -1955,7 +1148,7 @@ static struct samsung_fimc_variant fimc0_variant_exynos4 = {</div><div class='ctx'> 	.pix_limit	 = &amp;s5p_pix_limit[1],</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct samsung_fimc_variant fimc3_variant_exynos4 = {</div><div class='add'>+static struct fimc_variant fimc3_variant_exynos4 = {</div><div class='ctx'> 	.pix_hoff	 = 1,</div><div class='ctx'> 	.has_cam_if	 = 1,</div><div class='ctx'> 	.has_cistatus2	 = 1,</div><div class='hunk'>@@ -1970,7 +1163,7 @@ static struct samsung_fimc_variant fimc3_variant_exynos4 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* S5PC100 */</div><div class='del'>-static struct samsung_fimc_driverdata fimc_drvdata_s5p = {</div><div class='add'>+static struct fimc_drvdata fimc_drvdata_s5p = {</div><div class='ctx'> 	.variant = {</div><div class='ctx'> 		[0] = &amp;fimc0_variant_s5p,</div><div class='ctx'> 		[1] = &amp;fimc0_variant_s5p,</div><div class='hunk'>@@ -1981,7 +1174,7 @@ static struct samsung_fimc_driverdata fimc_drvdata_s5p = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* S5PV210, S5PC110 */</div><div class='del'>-static struct samsung_fimc_driverdata fimc_drvdata_s5pv210 = {</div><div class='add'>+static struct fimc_drvdata fimc_drvdata_s5pv210 = {</div><div class='ctx'> 	.variant = {</div><div class='ctx'> 		[0] = &amp;fimc0_variant_s5pv210,</div><div class='ctx'> 		[1] = &amp;fimc1_variant_s5pv210,</div><div class='hunk'>@@ -1991,8 +1184,8 @@ static struct samsung_fimc_driverdata fimc_drvdata_s5pv210 = {</div><div class='ctx'> 	.lclk_frequency = 166000000UL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* S5PV310, S5PC210 */</div><div class='del'>-static struct samsung_fimc_driverdata fimc_drvdata_exynos4 = {</div><div class='add'>+/* EXYNOS4210, S5PV310, S5PC210 */</div><div class='add'>+static struct fimc_drvdata fimc_drvdata_exynos4 = {</div><div class='ctx'> 	.variant = {</div><div class='ctx'> 		[0] = &amp;fimc0_variant_exynos4,</div><div class='ctx'> 		[1] = &amp;fimc0_variant_exynos4,</div><div class='hunk'>@@ -2036,7 +1229,7 @@ static struct platform_driver fimc_driver = {</div><div class='ctx'> </div><div class='ctx'> int __init fimc_register_driver(void)</div><div class='ctx'> {</div><div class='del'>-	return platform_driver_probe(&amp;fimc_driver, fimc_probe);</div><div class='add'>+	return platform_driver_register(&amp;fimc_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __exit fimc_unregister_driver(void)</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/fimc-core.h b/drivers/media/video/s5p-fimc/fimc-core.h<br/>index a18291e648e2..95b27ae5cf27 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-core.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-fimc/fimc-core.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-core.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2010 - 2011 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;asm/sizes.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;media/media-entity.h&gt;</div><div class='ctx'> #include &lt;media/videobuf2-core.h&gt;</div><div class='hunk'>@@ -26,8 +27,6 @@</div><div class='ctx'> #include &lt;media/v4l2-mediabus.h&gt;</div><div class='ctx'> #include &lt;media/s5p_fimc.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "regs-fimc.h"</div><div class='del'>-</div><div class='ctx'> #define err(fmt, args...) \</div><div class='ctx'> 	printk(KERN_ERR "%s:%d: " fmt "\n", __func__, __LINE__, ##args)</div><div class='ctx'> </div><div class='hunk'>@@ -78,26 +77,31 @@ enum fimc_dev_flags {</div><div class='ctx'> #define fimc_capture_busy(dev) test_bit(ST_CAPT_BUSY, &amp;(dev)-&gt;state)</div><div class='ctx'> </div><div class='ctx'> enum fimc_datapath {</div><div class='del'>-	FIMC_CAMERA,</div><div class='del'>-	FIMC_DMA,</div><div class='del'>-	FIMC_LCDFIFO,</div><div class='del'>-	FIMC_WRITEBACK</div><div class='add'>+	FIMC_IO_NONE,</div><div class='add'>+	FIMC_IO_CAMERA,</div><div class='add'>+	FIMC_IO_DMA,</div><div class='add'>+	FIMC_IO_LCDFIFO,</div><div class='add'>+	FIMC_IO_WRITEBACK,</div><div class='add'>+	FIMC_IO_ISP,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum fimc_color_fmt {</div><div class='del'>-	S5P_FIMC_RGB444 = 0x10,</div><div class='del'>-	S5P_FIMC_RGB555,</div><div class='del'>-	S5P_FIMC_RGB565,</div><div class='del'>-	S5P_FIMC_RGB666,</div><div class='del'>-	S5P_FIMC_RGB888,</div><div class='del'>-	S5P_FIMC_RGB30_LOCAL,</div><div class='del'>-	S5P_FIMC_YCBCR420 = 0x20,</div><div class='del'>-	S5P_FIMC_YCBYCR422,</div><div class='del'>-	S5P_FIMC_YCRYCB422,</div><div class='del'>-	S5P_FIMC_CBYCRY422,</div><div class='del'>-	S5P_FIMC_CRYCBY422,</div><div class='del'>-	S5P_FIMC_YCBCR444_LOCAL,</div><div class='del'>-	S5P_FIMC_JPEG = 0x40,</div><div class='add'>+	FIMC_FMT_RGB444 = 0x10,</div><div class='add'>+	FIMC_FMT_RGB555,</div><div class='add'>+	FIMC_FMT_RGB565,</div><div class='add'>+	FIMC_FMT_RGB666,</div><div class='add'>+	FIMC_FMT_RGB888,</div><div class='add'>+	FIMC_FMT_RGB30_LOCAL,</div><div class='add'>+	FIMC_FMT_YCBCR420 = 0x20,</div><div class='add'>+	FIMC_FMT_YCBYCR422,</div><div class='add'>+	FIMC_FMT_YCRYCB422,</div><div class='add'>+	FIMC_FMT_CBYCRY422,</div><div class='add'>+	FIMC_FMT_CRYCBY422,</div><div class='add'>+	FIMC_FMT_YCBCR444_LOCAL,</div><div class='add'>+	FIMC_FMT_JPEG = 0x40,</div><div class='add'>+	FIMC_FMT_RAW8 = 0x80,</div><div class='add'>+	FIMC_FMT_RAW10,</div><div class='add'>+	FIMC_FMT_RAW12,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define fimc_fmt_is_rgb(x) (!!((x) &amp; 0x10))</div><div class='hunk'>@@ -106,24 +110,11 @@ enum fimc_color_fmt {</div><div class='ctx'> #define IS_M2M(__strt) ((__strt) == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE || \</div><div class='ctx'> 			__strt == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)</div><div class='ctx'> </div><div class='del'>-/* Cb/Cr chrominance components order for 2 plane Y/CbCr 4:2:2 formats. */</div><div class='del'>-#define	S5P_FIMC_LSB_CRCB	S5P_CIOCTRL_ORDER422_2P_LSB_CRCB</div><div class='del'>-</div><div class='del'>-/* The embedded image effect selection */</div><div class='del'>-#define	S5P_FIMC_EFFECT_ORIGINAL	S5P_CIIMGEFF_FIN_BYPASS</div><div class='del'>-#define	S5P_FIMC_EFFECT_ARBITRARY	S5P_CIIMGEFF_FIN_ARBITRARY</div><div class='del'>-#define	S5P_FIMC_EFFECT_NEGATIVE	S5P_CIIMGEFF_FIN_NEGATIVE</div><div class='del'>-#define	S5P_FIMC_EFFECT_ARTFREEZE	S5P_CIIMGEFF_FIN_ARTFREEZE</div><div class='del'>-#define	S5P_FIMC_EFFECT_EMBOSSING	S5P_CIIMGEFF_FIN_EMBOSSING</div><div class='del'>-#define	S5P_FIMC_EFFECT_SIKHOUETTE	S5P_CIIMGEFF_FIN_SILHOUETTE</div><div class='del'>-</div><div class='ctx'> /* The hardware context state. */</div><div class='ctx'> #define	FIMC_PARAMS		(1 &lt;&lt; 0)</div><div class='del'>-#define	FIMC_SRC_ADDR		(1 &lt;&lt; 1)</div><div class='del'>-#define	FIMC_DST_ADDR		(1 &lt;&lt; 2)</div><div class='ctx'> #define	FIMC_SRC_FMT		(1 &lt;&lt; 3)</div><div class='ctx'> #define	FIMC_DST_FMT		(1 &lt;&lt; 4)</div><div class='del'>-#define	FIMC_DST_CROP		(1 &lt;&lt; 5)</div><div class='add'>+#define	FIMC_COMPOSE		(1 &lt;&lt; 5)</div><div class='ctx'> #define	FIMC_CTX_M2M		(1 &lt;&lt; 16)</div><div class='ctx'> #define	FIMC_CTX_CAP		(1 &lt;&lt; 17)</div><div class='ctx'> #define	FIMC_CTX_SHUT		(1 &lt;&lt; 18)</div><div class='hunk'>@@ -333,7 +324,7 @@ struct fimc_vid_cap {</div><div class='ctx'> 	struct fimc_ctx			*ctx;</div><div class='ctx'> 	struct vb2_alloc_ctx		*alloc_ctx;</div><div class='ctx'> 	struct video_device		*vfd;</div><div class='del'>-	struct v4l2_subdev		*subdev;</div><div class='add'>+	struct v4l2_subdev		subdev;</div><div class='ctx'> 	struct media_pad		vd_pad;</div><div class='ctx'> 	struct v4l2_mbus_framefmt	mf;</div><div class='ctx'> 	struct media_pad		sd_pads[FIMC_SD_PADS_NUM];</div><div class='hunk'>@@ -370,8 +361,7 @@ struct fimc_pix_limit {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * struct samsung_fimc_variant - camera interface variant information</div><div class='del'>- *</div><div class='add'>+ * struct fimc_variant - FIMC device variant information</div><div class='ctx'>  * @pix_hoff: indicate whether horizontal offset is in pixels or in bytes</div><div class='ctx'>  * @has_inp_rot: set if has input rotator</div><div class='ctx'>  * @has_out_rot: set if has output rotator</div><div class='hunk'>@@ -386,7 +376,7 @@ struct fimc_pix_limit {</div><div class='ctx'>  * @min_vsize_align: minimum vertical pixel size alignment</div><div class='ctx'>  * @out_buf_count: the number of buffers in output DMA sequence</div><div class='ctx'>  */</div><div class='del'>-struct samsung_fimc_variant {</div><div class='add'>+struct fimc_variant {</div><div class='ctx'> 	unsigned int	pix_hoff:1;</div><div class='ctx'> 	unsigned int	has_inp_rot:1;</div><div class='ctx'> 	unsigned int	has_out_rot:1;</div><div class='hunk'>@@ -403,23 +393,19 @@ struct samsung_fimc_variant {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * struct samsung_fimc_driverdata - per device type driver data for init time.</div><div class='del'>- *</div><div class='del'>- * @variant: the variant information for this driver.</div><div class='del'>- * @dev_cnt: number of fimc sub-devices available in SoC</div><div class='del'>- * @lclk_frequency: fimc bus clock frequency</div><div class='add'>+ * struct fimc_drvdata - per device type driver data</div><div class='add'>+ * @variant: variant information for this device</div><div class='add'>+ * @num_entities: number of fimc instances available in a SoC</div><div class='add'>+ * @lclk_frequency: local bus clock frequency</div><div class='ctx'>  */</div><div class='del'>-struct samsung_fimc_driverdata {</div><div class='del'>-	struct samsung_fimc_variant *variant[FIMC_MAX_DEVS];</div><div class='del'>-	unsigned long	lclk_frequency;</div><div class='del'>-	int		num_entities;</div><div class='add'>+struct fimc_drvdata {</div><div class='add'>+	struct fimc_variant *variant[FIMC_MAX_DEVS];</div><div class='add'>+	int num_entities;</div><div class='add'>+	unsigned long lclk_frequency;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct fimc_pipeline {</div><div class='del'>-	struct media_pipeline *pipe;</div><div class='del'>-	struct v4l2_subdev *sensor;</div><div class='del'>-	struct v4l2_subdev *csis;</div><div class='del'>-};</div><div class='add'>+#define fimc_get_drvdata(_pdev) \</div><div class='add'>+	((struct fimc_drvdata *) platform_get_device_id(_pdev)-&gt;driver_data)</div><div class='ctx'> </div><div class='ctx'> struct fimc_ctx;</div><div class='ctx'> </div><div class='hunk'>@@ -431,10 +417,8 @@ struct fimc_ctx;</div><div class='ctx'>  * @pdata:	pointer to the device platform data</div><div class='ctx'>  * @variant:	the IP variant information</div><div class='ctx'>  * @id:		FIMC device index (0..FIMC_MAX_DEVS)</div><div class='del'>- * @num_clocks: the number of clocks managed by this device instance</div><div class='ctx'>  * @clock:	clocks required for FIMC operation</div><div class='ctx'>  * @regs:	the mapped hardware registers</div><div class='del'>- * @irq:	FIMC interrupt number</div><div class='ctx'>  * @irq_queue:	interrupt handler waitqueue</div><div class='ctx'>  * @v4l2_dev:	root v4l2_device</div><div class='ctx'>  * @m2m:	memory-to-memory V4L2 device information</div><div class='hunk'>@@ -448,12 +432,10 @@ struct fimc_dev {</div><div class='ctx'> 	struct mutex			lock;</div><div class='ctx'> 	struct platform_device		*pdev;</div><div class='ctx'> 	struct s5p_platform_fimc	*pdata;</div><div class='del'>-	struct samsung_fimc_variant	*variant;</div><div class='add'>+	struct fimc_variant		*variant;</div><div class='ctx'> 	u16				id;</div><div class='del'>-	u16				num_clocks;</div><div class='ctx'> 	struct clk			*clock[MAX_FIMC_CLOCKS];</div><div class='ctx'> 	void __iomem			*regs;</div><div class='del'>-	int				irq;</div><div class='ctx'> 	wait_queue_head_t		irq_queue;</div><div class='ctx'> 	struct v4l2_device		*v4l2_dev;</div><div class='ctx'> 	struct fimc_m2m_device		m2m;</div><div class='hunk'>@@ -464,8 +446,31 @@ struct fimc_dev {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * struct fimc_ctrls - v4l2 controls structure</div><div class='add'>+ * @handler: the control handler</div><div class='add'>+ * @colorfx: image effect control</div><div class='add'>+ * @colorfx_cbcr: Cb/Cr coefficients control</div><div class='add'>+ * @rotate: image rotation control</div><div class='add'>+ * @hflip: horizontal flip control</div><div class='add'>+ * @vflip: vertical flip control</div><div class='add'>+ * @alpha: RGB alpha control</div><div class='add'>+ * @ready: true if @handler is initialized</div><div class='add'>+ */</div><div class='add'>+struct fimc_ctrls {</div><div class='add'>+	struct v4l2_ctrl_handler handler;</div><div class='add'>+	struct {</div><div class='add'>+		struct v4l2_ctrl *colorfx;</div><div class='add'>+		struct v4l2_ctrl *colorfx_cbcr;</div><div class='add'>+	};</div><div class='add'>+	struct v4l2_ctrl *rotate;</div><div class='add'>+	struct v4l2_ctrl *hflip;</div><div class='add'>+	struct v4l2_ctrl *vflip;</div><div class='add'>+	struct v4l2_ctrl *alpha;</div><div class='add'>+	bool ready;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * fimc_ctx - the device context data</div><div class='del'>- * @slock:		spinlock protecting this data structure</div><div class='ctx'>  * @s_frame:		source frame properties</div><div class='ctx'>  * @d_frame:		destination frame properties</div><div class='ctx'>  * @out_order_1p:	output 1-plane YCBCR order</div><div class='hunk'>@@ -484,15 +489,9 @@ struct fimc_dev {</div><div class='ctx'>  * @fimc_dev:		the FIMC device this context applies to</div><div class='ctx'>  * @m2m_ctx:		memory-to-memory device context</div><div class='ctx'>  * @fh:			v4l2 file handle</div><div class='del'>- * @ctrl_handler:	v4l2 controls handler</div><div class='del'>- * @ctrl_rotate		image rotation control</div><div class='del'>- * @ctrl_hflip		horizontal flip control</div><div class='del'>- * @ctrl_vflip		vertical flip control</div><div class='del'>- * @ctrl_alpha		RGB alpha control</div><div class='del'>- * @ctrls_rdy:		true if the control handler is initialized</div><div class='add'>+ * @ctrls:		v4l2 controls structure</div><div class='ctx'>  */</div><div class='ctx'> struct fimc_ctx {</div><div class='del'>-	spinlock_t		slock;</div><div class='ctx'> 	struct fimc_frame	s_frame;</div><div class='ctx'> 	struct fimc_frame	d_frame;</div><div class='ctx'> 	u32			out_order_1p;</div><div class='hunk'>@@ -511,12 +510,7 @@ struct fimc_ctx {</div><div class='ctx'> 	struct fimc_dev		*fimc_dev;</div><div class='ctx'> 	struct v4l2_m2m_ctx	*m2m_ctx;</div><div class='ctx'> 	struct v4l2_fh		fh;</div><div class='del'>-	struct v4l2_ctrl_handler ctrl_handler;</div><div class='del'>-	struct v4l2_ctrl	*ctrl_rotate;</div><div class='del'>-	struct v4l2_ctrl	*ctrl_hflip;</div><div class='del'>-	struct v4l2_ctrl	*ctrl_vflip;</div><div class='del'>-	struct v4l2_ctrl	*ctrl_alpha;</div><div class='del'>-	bool			ctrls_rdy;</div><div class='add'>+	struct fimc_ctrls	ctrls;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define fh_to_ctx(__fh) container_of(__fh, struct fimc_ctx, fh)</div><div class='hunk'>@@ -560,13 +554,13 @@ static inline bool fimc_capture_active(struct fimc_dev *fimc)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void fimc_ctx_state_lock_set(u32 state, struct fimc_ctx *ctx)</div><div class='add'>+static inline void fimc_ctx_state_set(u32 state, struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ctx-&gt;slock, flags);</div><div class='add'>+	spin_lock_irqsave(&amp;ctx-&gt;fimc_dev-&gt;slock, flags);</div><div class='ctx'> 	ctx-&gt;state |= state;</div><div class='del'>-	spin_unlock_irqrestore(&amp;ctx-&gt;slock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ctx-&gt;fimc_dev-&gt;slock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool fimc_ctx_state_is_set(u32 mask, struct fimc_ctx *ctx)</div><div class='hunk'>@@ -574,9 +568,9 @@ static inline bool fimc_ctx_state_is_set(u32 mask, struct fimc_ctx *ctx)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	bool ret;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ctx-&gt;slock, flags);</div><div class='add'>+	spin_lock_irqsave(&amp;ctx-&gt;fimc_dev-&gt;slock, flags);</div><div class='ctx'> 	ret = (ctx-&gt;state &amp; mask) == mask;</div><div class='del'>-	spin_unlock_irqrestore(&amp;ctx-&gt;slock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ctx-&gt;fimc_dev-&gt;slock, flags);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -589,61 +583,13 @@ static inline int tiled_fmt(struct fimc_fmt *fmt)</div><div class='ctx'> static inline int fimc_get_alpha_mask(struct fimc_fmt *fmt)</div><div class='ctx'> {</div><div class='ctx'> 	switch (fmt-&gt;color) {</div><div class='del'>-	case S5P_FIMC_RGB444:	return 0x0f;</div><div class='del'>-	case S5P_FIMC_RGB555:	return 0x01;</div><div class='del'>-	case S5P_FIMC_RGB888:	return 0xff;</div><div class='add'>+	case FIMC_FMT_RGB444:	return 0x0f;</div><div class='add'>+	case FIMC_FMT_RGB555:	return 0x01;</div><div class='add'>+	case FIMC_FMT_RGB888:	return 0xff;</div><div class='ctx'> 	default:		return 0;</div><div class='ctx'> 	};</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void fimc_hw_clear_irq(struct fimc_dev *dev)</div><div class='del'>-{</div><div class='del'>-	u32 cfg = readl(dev-&gt;regs + S5P_CIGCTRL);</div><div class='del'>-	cfg |= S5P_CIGCTRL_IRQ_CLR;</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIGCTRL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void fimc_hw_enable_scaler(struct fimc_dev *dev, bool on)</div><div class='del'>-{</div><div class='del'>-	u32 cfg = readl(dev-&gt;regs + S5P_CISCCTRL);</div><div class='del'>-	if (on)</div><div class='del'>-		cfg |= S5P_CISCCTRL_SCALERSTART;</div><div class='del'>-	else</div><div class='del'>-		cfg &amp;= ~S5P_CISCCTRL_SCALERSTART;</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CISCCTRL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void fimc_hw_activate_input_dma(struct fimc_dev *dev, bool on)</div><div class='del'>-{</div><div class='del'>-	u32 cfg = readl(dev-&gt;regs + S5P_MSCTRL);</div><div class='del'>-	if (on)</div><div class='del'>-		cfg |= S5P_MSCTRL_ENVID;</div><div class='del'>-	else</div><div class='del'>-		cfg &amp;= ~S5P_MSCTRL_ENVID;</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_MSCTRL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void fimc_hw_dis_capture(struct fimc_dev *dev)</div><div class='del'>-{</div><div class='del'>-	u32 cfg = readl(dev-&gt;regs + S5P_CIIMGCPT);</div><div class='del'>-	cfg &amp;= ~(S5P_CIIMGCPT_IMGCPTEN | S5P_CIIMGCPT_IMGCPTEN_SC);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIIMGCPT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * fimc_hw_set_dma_seq - configure output DMA buffer sequence</div><div class='del'>- * @mask: each bit corresponds to one of 32 output buffer registers set</div><div class='del'>- *	  1 to include buffer in the sequence, 0 to disable</div><div class='del'>- *</div><div class='del'>- * This function mask output DMA ring buffers, i.e. it allows to configure</div><div class='del'>- * which of the output buffer address registers will be used by the DMA</div><div class='del'>- * engine.</div><div class='del'>- */</div><div class='del'>-static inline void fimc_hw_set_dma_seq(struct fimc_dev *dev, u32 mask)</div><div class='del'>-{</div><div class='del'>-	writel(mask, dev-&gt;regs + S5P_CIFCNTSEQ);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline struct fimc_frame *ctx_get_frame(struct fimc_ctx *ctx,</div><div class='ctx'> 					       enum v4l2_buf_type type)</div><div class='ctx'> {</div><div class='hunk'>@@ -665,48 +611,6 @@ static inline struct fimc_frame *ctx_get_frame(struct fimc_ctx *ctx,</div><div class='ctx'> 	return frame;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Return an index to the buffer actually being written. */</div><div class='del'>-static inline u32 fimc_hw_get_frame_index(struct fimc_dev *dev)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;variant-&gt;has_cistatus2) {</div><div class='del'>-		reg = readl(dev-&gt;regs + S5P_CISTATUS2) &amp; 0x3F;</div><div class='del'>-		return reg &gt; 0 ? --reg : reg;</div><div class='del'>-	} else {</div><div class='del'>-		reg = readl(dev-&gt;regs + S5P_CISTATUS);</div><div class='del'>-		return (reg &amp; S5P_CISTATUS_FRAMECNT_MASK) &gt;&gt;</div><div class='del'>-			S5P_CISTATUS_FRAMECNT_SHIFT;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* -----------------------------------------------------*/</div><div class='del'>-/* fimc-reg.c						*/</div><div class='del'>-void fimc_hw_reset(struct fimc_dev *fimc);</div><div class='del'>-void fimc_hw_set_rotation(struct fimc_ctx *ctx);</div><div class='del'>-void fimc_hw_set_target_format(struct fimc_ctx *ctx);</div><div class='del'>-void fimc_hw_set_out_dma(struct fimc_ctx *ctx);</div><div class='del'>-void fimc_hw_en_lastirq(struct fimc_dev *fimc, int enable);</div><div class='del'>-void fimc_hw_en_irq(struct fimc_dev *fimc, int enable);</div><div class='del'>-void fimc_hw_set_prescaler(struct fimc_ctx *ctx);</div><div class='del'>-void fimc_hw_set_mainscaler(struct fimc_ctx *ctx);</div><div class='del'>-void fimc_hw_en_capture(struct fimc_ctx *ctx);</div><div class='del'>-void fimc_hw_set_effect(struct fimc_ctx *ctx, bool active);</div><div class='del'>-void fimc_hw_set_rgb_alpha(struct fimc_ctx *ctx);</div><div class='del'>-void fimc_hw_set_in_dma(struct fimc_ctx *ctx);</div><div class='del'>-void fimc_hw_set_input_path(struct fimc_ctx *ctx);</div><div class='del'>-void fimc_hw_set_output_path(struct fimc_ctx *ctx);</div><div class='del'>-void fimc_hw_set_input_addr(struct fimc_dev *fimc, struct fimc_addr *paddr);</div><div class='del'>-void fimc_hw_set_output_addr(struct fimc_dev *fimc, struct fimc_addr *paddr,</div><div class='del'>-			     int index);</div><div class='del'>-int fimc_hw_set_camera_source(struct fimc_dev *fimc,</div><div class='del'>-			      struct s5p_fimc_isp_info *cam);</div><div class='del'>-int fimc_hw_set_camera_offset(struct fimc_dev *fimc, struct fimc_frame *f);</div><div class='del'>-int fimc_hw_set_camera_polarity(struct fimc_dev *fimc,</div><div class='del'>-				struct s5p_fimc_isp_info *cam);</div><div class='del'>-int fimc_hw_set_camera_type(struct fimc_dev *fimc,</div><div class='del'>-			    struct s5p_fimc_isp_info *cam);</div><div class='del'>-</div><div class='ctx'> /* -----------------------------------------------------*/</div><div class='ctx'> /* fimc-core.c */</div><div class='ctx'> int fimc_vidioc_enum_fmt_mplane(struct file *file, void *priv,</div><div class='hunk'>@@ -718,8 +622,9 @@ void fimc_alpha_ctrl_update(struct fimc_ctx *ctx);</div><div class='ctx'> int fimc_fill_format(struct fimc_frame *frame, struct v4l2_format *f);</div><div class='ctx'> void fimc_adjust_mplane_format(struct fimc_fmt *fmt, u32 width, u32 height,</div><div class='ctx'> 			       struct v4l2_pix_format_mplane *pix);</div><div class='del'>-struct fimc_fmt *fimc_find_format(u32 *pixelformat, u32 *mbus_code,</div><div class='add'>+struct fimc_fmt *fimc_find_format(const u32 *pixelformat, const u32 *mbus_code,</div><div class='ctx'> 				  unsigned int mask, int index);</div><div class='add'>+struct fimc_fmt *fimc_get_format(unsigned int index);</div><div class='ctx'> </div><div class='ctx'> int fimc_check_scaler_ratio(struct fimc_ctx *ctx, int sw, int sh,</div><div class='ctx'> 			    int dw, int dh, int rotation);</div><div class='hunk'>@@ -730,7 +635,7 @@ int fimc_prepare_addr(struct fimc_ctx *ctx, struct vb2_buffer *vb,</div><div class='ctx'> void fimc_prepare_dma_offset(struct fimc_ctx *ctx, struct fimc_frame *f);</div><div class='ctx'> void fimc_set_yuv_order(struct fimc_ctx *ctx);</div><div class='ctx'> void fimc_fill_frame(struct fimc_frame *frame, struct v4l2_format *f);</div><div class='del'>-void fimc_capture_irq_handler(struct fimc_dev *fimc, bool done);</div><div class='add'>+void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf);</div><div class='ctx'> </div><div class='ctx'> int fimc_register_m2m_device(struct fimc_dev *fimc,</div><div class='ctx'> 			     struct v4l2_device *v4l2_dev);</div><div class='hunk'>@@ -739,33 +644,18 @@ int fimc_register_driver(void);</div><div class='ctx'> void fimc_unregister_driver(void);</div><div class='ctx'> </div><div class='ctx'> /* -----------------------------------------------------*/</div><div class='add'>+/* fimc-m2m.c */</div><div class='add'>+void fimc_m2m_job_finish(struct fimc_ctx *ctx, int vb_state);</div><div class='add'>+</div><div class='add'>+/* -----------------------------------------------------*/</div><div class='ctx'> /* fimc-capture.c					*/</div><div class='del'>-int fimc_register_capture_device(struct fimc_dev *fimc,</div><div class='del'>-				 struct v4l2_device *v4l2_dev);</div><div class='del'>-void fimc_unregister_capture_device(struct fimc_dev *fimc);</div><div class='add'>+int fimc_initialize_capture_subdev(struct fimc_dev *fimc);</div><div class='add'>+void fimc_unregister_capture_subdev(struct fimc_dev *fimc);</div><div class='ctx'> int fimc_capture_ctrls_create(struct fimc_dev *fimc);</div><div class='del'>-int fimc_vid_cap_buf_queue(struct fimc_dev *fimc,</div><div class='del'>-			     struct fimc_vid_buffer *fimc_vb);</div><div class='ctx'> void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,</div><div class='ctx'> 			void *arg);</div><div class='ctx'> int fimc_capture_suspend(struct fimc_dev *fimc);</div><div class='ctx'> int fimc_capture_resume(struct fimc_dev *fimc);</div><div class='del'>-int fimc_capture_config_update(struct fimc_ctx *ctx);</div><div class='del'>-</div><div class='del'>-/* Locking: the caller holds fimc-&gt;slock */</div><div class='del'>-static inline void fimc_activate_capture(struct fimc_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	fimc_hw_enable_scaler(ctx-&gt;fimc_dev, ctx-&gt;scaler.enabled);</div><div class='del'>-	fimc_hw_en_capture(ctx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void fimc_deactivate_capture(struct fimc_dev *fimc)</div><div class='del'>-{</div><div class='del'>-	fimc_hw_en_lastirq(fimc, true);</div><div class='del'>-	fimc_hw_dis_capture(fimc);</div><div class='del'>-	fimc_hw_enable_scaler(fimc, false);</div><div class='del'>-	fimc_hw_en_lastirq(fimc, false);</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Buffer list manipulation functions. Must be called with fimc.slock held.</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/fimc-lite-reg.c b/drivers/media/video/s5p-fimc/fimc-lite-reg.c<br/>new file mode 100644<br/>index 000000000000..419adfb7cdf9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-lite-reg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-lite-reg.c</a></div><div class='hunk'>@@ -0,0 +1,300 @@</div><div class='add'>+/*</div><div class='add'>+ * Register interface file for EXYNOS FIMC-LITE (camera interface) driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;media/s5p_fimc.h&gt;</div><div class='add'>+</div><div class='add'>+#include "fimc-lite-reg.h"</div><div class='add'>+#include "fimc-lite.h"</div><div class='add'>+#include "fimc-core.h"</div><div class='add'>+</div><div class='add'>+#define FLITE_RESET_TIMEOUT 50 /* in ms */</div><div class='add'>+</div><div class='add'>+void flite_hw_reset(struct fimc_lite *dev)</div><div class='add'>+{</div><div class='add'>+	unsigned long end = jiffies + msecs_to_jiffies(FLITE_RESET_TIMEOUT);</div><div class='add'>+	u32 cfg;</div><div class='add'>+</div><div class='add'>+	cfg = readl(dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+	cfg |= FLITE_REG_CIGCTRL_SWRST_REQ;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+</div><div class='add'>+	while (time_is_after_jiffies(end)) {</div><div class='add'>+		cfg = readl(dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+		if (cfg &amp; FLITE_REG_CIGCTRL_SWRST_RDY)</div><div class='add'>+			break;</div><div class='add'>+		usleep_range(1000, 5000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfg |= FLITE_REG_CIGCTRL_SWRST;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void flite_hw_clear_pending_irq(struct fimc_lite *dev)</div><div class='add'>+{</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FLITE_REG_CISTATUS);</div><div class='add'>+	cfg &amp;= ~FLITE_REG_CISTATUS_IRQ_CAM;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CISTATUS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 flite_hw_get_interrupt_source(struct fimc_lite *dev)</div><div class='add'>+{</div><div class='add'>+	u32 intsrc = readl(dev-&gt;regs + FLITE_REG_CISTATUS);</div><div class='add'>+	return intsrc &amp; FLITE_REG_CISTATUS_IRQ_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void flite_hw_clear_last_capture_end(struct fimc_lite *dev)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FLITE_REG_CISTATUS2);</div><div class='add'>+	cfg &amp;= ~FLITE_REG_CISTATUS2_LASTCAPEND;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CISTATUS2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void flite_hw_set_interrupt_mask(struct fimc_lite *dev)</div><div class='add'>+{</div><div class='add'>+	u32 cfg, intsrc;</div><div class='add'>+</div><div class='add'>+	/* Select interrupts to be enabled for each output mode */</div><div class='add'>+	if (dev-&gt;out_path == FIMC_IO_DMA) {</div><div class='add'>+		intsrc = FLITE_REG_CIGCTRL_IRQ_OVFEN |</div><div class='add'>+			 FLITE_REG_CIGCTRL_IRQ_LASTEN |</div><div class='add'>+			 FLITE_REG_CIGCTRL_IRQ_STARTEN;</div><div class='add'>+	} else {</div><div class='add'>+		/* An output to the FIMC-IS */</div><div class='add'>+		intsrc = FLITE_REG_CIGCTRL_IRQ_OVFEN |</div><div class='add'>+			 FLITE_REG_CIGCTRL_IRQ_LASTEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfg = readl(dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+	cfg |= FLITE_REG_CIGCTRL_IRQ_DISABLE_MASK;</div><div class='add'>+	cfg &amp;= ~intsrc;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void flite_hw_capture_start(struct fimc_lite *dev)</div><div class='add'>+{</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FLITE_REG_CIIMGCPT);</div><div class='add'>+	cfg |= FLITE_REG_CIIMGCPT_IMGCPTEN;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIIMGCPT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void flite_hw_capture_stop(struct fimc_lite *dev)</div><div class='add'>+{</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FLITE_REG_CIIMGCPT);</div><div class='add'>+	cfg &amp;= ~FLITE_REG_CIIMGCPT_IMGCPTEN;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIIMGCPT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Test pattern (color bars) enable/disable. External sensor</div><div class='add'>+ * pixel clock must be active for the test pattern to work.</div><div class='add'>+ */</div><div class='add'>+void flite_hw_set_test_pattern(struct fimc_lite *dev, bool on)</div><div class='add'>+{</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+	if (on)</div><div class='add'>+		cfg |= FLITE_REG_CIGCTRL_TEST_PATTERN_COLORBAR;</div><div class='add'>+	else</div><div class='add'>+		cfg &amp;= ~FLITE_REG_CIGCTRL_TEST_PATTERN_COLORBAR;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u32 src_pixfmt_map[8][3] = {</div><div class='add'>+	{ V4L2_MBUS_FMT_YUYV8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_YCBYCR,</div><div class='add'>+	  FLITE_REG_CIGCTRL_YUV422_1P },</div><div class='add'>+	{ V4L2_MBUS_FMT_YVYU8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_YCRYCB,</div><div class='add'>+	  FLITE_REG_CIGCTRL_YUV422_1P },</div><div class='add'>+	{ V4L2_MBUS_FMT_UYVY8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_CBYCRY,</div><div class='add'>+	  FLITE_REG_CIGCTRL_YUV422_1P },</div><div class='add'>+	{ V4L2_MBUS_FMT_VYUY8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_CRYCBY,</div><div class='add'>+	  FLITE_REG_CIGCTRL_YUV422_1P },</div><div class='add'>+	{ V4L2_PIX_FMT_SGRBG8, 0, FLITE_REG_CIGCTRL_RAW8 },</div><div class='add'>+	{ V4L2_PIX_FMT_SGRBG10, 0, FLITE_REG_CIGCTRL_RAW10 },</div><div class='add'>+	{ V4L2_PIX_FMT_SGRBG12, 0, FLITE_REG_CIGCTRL_RAW12 },</div><div class='add'>+	{ V4L2_MBUS_FMT_JPEG_1X8, 0, FLITE_REG_CIGCTRL_USER(1) },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Set camera input pixel format and resolution */</div><div class='add'>+void flite_hw_set_source_format(struct fimc_lite *dev, struct flite_frame *f)</div><div class='add'>+{</div><div class='add'>+	enum v4l2_mbus_pixelcode pixelcode = dev-&gt;fmt-&gt;mbus_code;</div><div class='add'>+	unsigned int i = ARRAY_SIZE(src_pixfmt_map);</div><div class='add'>+	u32 cfg;</div><div class='add'>+</div><div class='add'>+	while (i-- &gt;= 0) {</div><div class='add'>+		if (src_pixfmt_map[i][0] == pixelcode)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == 0 &amp;&amp; src_pixfmt_map[i][0] != pixelcode) {</div><div class='add'>+		v4l2_err(dev-&gt;vfd,</div><div class='add'>+			 "Unsupported pixel code, falling back to %#08x\n",</div><div class='add'>+			 src_pixfmt_map[i][0]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfg = readl(dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+	cfg &amp;= ~FLITE_REG_CIGCTRL_FMT_MASK;</div><div class='add'>+	cfg |= src_pixfmt_map[i][2];</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+</div><div class='add'>+	cfg = readl(dev-&gt;regs + FLITE_REG_CISRCSIZE);</div><div class='add'>+	cfg &amp;= ~(FLITE_REG_CISRCSIZE_ORDER422_MASK |</div><div class='add'>+		 FLITE_REG_CISRCSIZE_SIZE_CAM_MASK);</div><div class='add'>+	cfg |= (f-&gt;f_width &lt;&lt; 16) | f-&gt;f_height;</div><div class='add'>+	cfg |= src_pixfmt_map[i][1];</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CISRCSIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set the camera host input window offsets (cropping) */</div><div class='add'>+void flite_hw_set_window_offset(struct fimc_lite *dev, struct flite_frame *f)</div><div class='add'>+{</div><div class='add'>+	u32 hoff2, voff2;</div><div class='add'>+	u32 cfg;</div><div class='add'>+</div><div class='add'>+	cfg = readl(dev-&gt;regs + FLITE_REG_CIWDOFST);</div><div class='add'>+	cfg &amp;= ~FLITE_REG_CIWDOFST_OFST_MASK;</div><div class='add'>+	cfg |= (f-&gt;rect.left &lt;&lt; 16) | f-&gt;rect.top;</div><div class='add'>+	cfg |= FLITE_REG_CIWDOFST_WINOFSEN;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIWDOFST);</div><div class='add'>+</div><div class='add'>+	hoff2 = f-&gt;f_width - f-&gt;rect.width - f-&gt;rect.left;</div><div class='add'>+	voff2 = f-&gt;f_height - f-&gt;rect.height - f-&gt;rect.top;</div><div class='add'>+</div><div class='add'>+	cfg = (hoff2 &lt;&lt; 16) | voff2;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIWDOFST2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Select camera port (A, B) */</div><div class='add'>+static void flite_hw_set_camera_port(struct fimc_lite *dev, int id)</div><div class='add'>+{</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FLITE_REG_CIGENERAL);</div><div class='add'>+	if (id == 0)</div><div class='add'>+		cfg &amp;= ~FLITE_REG_CIGENERAL_CAM_B;</div><div class='add'>+	else</div><div class='add'>+		cfg |= FLITE_REG_CIGENERAL_CAM_B;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIGENERAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Select serial or parallel bus, camera port (A,B) and set signals polarity */</div><div class='add'>+void flite_hw_set_camera_bus(struct fimc_lite *dev,</div><div class='add'>+			     struct s5p_fimc_isp_info *s_info)</div><div class='add'>+{</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+	unsigned int flags = s_info-&gt;flags;</div><div class='add'>+</div><div class='add'>+	if (s_info-&gt;bus_type != FIMC_MIPI_CSI2) {</div><div class='add'>+		cfg &amp;= ~(FLITE_REG_CIGCTRL_SELCAM_MIPI |</div><div class='add'>+			 FLITE_REG_CIGCTRL_INVPOLPCLK |</div><div class='add'>+			 FLITE_REG_CIGCTRL_INVPOLVSYNC |</div><div class='add'>+			 FLITE_REG_CIGCTRL_INVPOLHREF);</div><div class='add'>+</div><div class='add'>+		if (flags &amp; V4L2_MBUS_PCLK_SAMPLE_FALLING)</div><div class='add'>+			cfg |= FLITE_REG_CIGCTRL_INVPOLPCLK;</div><div class='add'>+</div><div class='add'>+		if (flags &amp; V4L2_MBUS_VSYNC_ACTIVE_LOW)</div><div class='add'>+			cfg |= FLITE_REG_CIGCTRL_INVPOLVSYNC;</div><div class='add'>+</div><div class='add'>+		if (flags &amp; V4L2_MBUS_HSYNC_ACTIVE_LOW)</div><div class='add'>+			cfg |= FLITE_REG_CIGCTRL_INVPOLHREF;</div><div class='add'>+	} else {</div><div class='add'>+		cfg |= FLITE_REG_CIGCTRL_SELCAM_MIPI;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+</div><div class='add'>+	flite_hw_set_camera_port(dev, s_info-&gt;mux_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void flite_hw_set_out_order(struct fimc_lite *dev, struct flite_frame *f)</div><div class='add'>+{</div><div class='add'>+	static const u32 pixcode[4][2] = {</div><div class='add'>+		{ V4L2_MBUS_FMT_YUYV8_2X8, FLITE_REG_CIODMAFMT_YCBYCR },</div><div class='add'>+		{ V4L2_MBUS_FMT_YVYU8_2X8, FLITE_REG_CIODMAFMT_YCRYCB },</div><div class='add'>+		{ V4L2_MBUS_FMT_UYVY8_2X8, FLITE_REG_CIODMAFMT_CBYCRY },</div><div class='add'>+		{ V4L2_MBUS_FMT_VYUY8_2X8, FLITE_REG_CIODMAFMT_CRYCBY },</div><div class='add'>+	};</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FLITE_REG_CIODMAFMT);</div><div class='add'>+	unsigned int i = ARRAY_SIZE(pixcode);</div><div class='add'>+</div><div class='add'>+	while (i-- &gt;= 0)</div><div class='add'>+		if (pixcode[i][0] == dev-&gt;fmt-&gt;mbus_code)</div><div class='add'>+			break;</div><div class='add'>+	cfg &amp;= ~FLITE_REG_CIODMAFMT_YCBCR_ORDER_MASK;</div><div class='add'>+	writel(cfg | pixcode[i][1], dev-&gt;regs + FLITE_REG_CIODMAFMT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void flite_hw_set_dma_window(struct fimc_lite *dev, struct flite_frame *f)</div><div class='add'>+{</div><div class='add'>+	u32 cfg;</div><div class='add'>+</div><div class='add'>+	/* Maximum output pixel size */</div><div class='add'>+	cfg = readl(dev-&gt;regs + FLITE_REG_CIOCAN);</div><div class='add'>+	cfg &amp;= ~FLITE_REG_CIOCAN_MASK;</div><div class='add'>+	cfg = (f-&gt;f_height &lt;&lt; 16) | f-&gt;f_width;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIOCAN);</div><div class='add'>+</div><div class='add'>+	/* DMA offsets */</div><div class='add'>+	cfg = readl(dev-&gt;regs + FLITE_REG_CIOOFF);</div><div class='add'>+	cfg &amp;= ~FLITE_REG_CIOOFF_MASK;</div><div class='add'>+	cfg |= (f-&gt;rect.top &lt;&lt; 16) | f-&gt;rect.left;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIOOFF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Enable/disable output DMA, set output pixel size and offsets (composition) */</div><div class='add'>+void flite_hw_set_output_dma(struct fimc_lite *dev, struct flite_frame *f,</div><div class='add'>+			     bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+</div><div class='add'>+	if (!enable) {</div><div class='add'>+		cfg |= FLITE_REG_CIGCTRL_ODMA_DISABLE;</div><div class='add'>+		writel(cfg, dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfg &amp;= ~FLITE_REG_CIGCTRL_ODMA_DISABLE;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FLITE_REG_CIGCTRL);</div><div class='add'>+</div><div class='add'>+	flite_hw_set_out_order(dev, f);</div><div class='add'>+	flite_hw_set_dma_window(dev, f);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void flite_hw_dump_regs(struct fimc_lite *dev, const char *label)</div><div class='add'>+{</div><div class='add'>+	struct {</div><div class='add'>+		u32 offset;</div><div class='add'>+		const char * const name;</div><div class='add'>+	} registers[] = {</div><div class='add'>+		{ 0x00, "CISRCSIZE" },</div><div class='add'>+		{ 0x04, "CIGCTRL" },</div><div class='add'>+		{ 0x08, "CIIMGCPT" },</div><div class='add'>+		{ 0x0c, "CICPTSEQ" },</div><div class='add'>+		{ 0x10, "CIWDOFST" },</div><div class='add'>+		{ 0x14, "CIWDOFST2" },</div><div class='add'>+		{ 0x18, "CIODMAFMT" },</div><div class='add'>+		{ 0x20, "CIOCAN" },</div><div class='add'>+		{ 0x24, "CIOOFF" },</div><div class='add'>+		{ 0x30, "CIOSA" },</div><div class='add'>+		{ 0x40, "CISTATUS" },</div><div class='add'>+		{ 0x44, "CISTATUS2" },</div><div class='add'>+		{ 0xf0, "CITHOLD" },</div><div class='add'>+		{ 0xfc, "CIGENERAL" },</div><div class='add'>+	};</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	pr_info("--- %s ---\n", label);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(registers); i++) {</div><div class='add'>+		u32 cfg = readl(dev-&gt;regs + registers[i].offset);</div><div class='add'>+		pr_info("%s: %s:\t0x%08x\n", __func__, registers[i].name, cfg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/fimc-lite-reg.h b/drivers/media/video/s5p-fimc/fimc-lite-reg.h<br/>new file mode 100644<br/>index 000000000000..adb9e9e6f3c2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-lite-reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-lite-reg.h</a></div><div class='hunk'>@@ -0,0 +1,150 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 Samsung Electronics Co., Ltd.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef FIMC_LITE_REG_H_</div><div class='add'>+#define FIMC_LITE_REG_H_</div><div class='add'>+</div><div class='add'>+#include "fimc-lite.h"</div><div class='add'>+</div><div class='add'>+/* Camera Source size */</div><div class='add'>+#define FLITE_REG_CISRCSIZE			0x00</div><div class='add'>+#define FLITE_REG_CISRCSIZE_ORDER422_IN_YCBYCR	(0 &lt;&lt; 14)</div><div class='add'>+#define FLITE_REG_CISRCSIZE_ORDER422_IN_YCRYCB	(1 &lt;&lt; 14)</div><div class='add'>+#define FLITE_REG_CISRCSIZE_ORDER422_IN_CBYCRY	(2 &lt;&lt; 14)</div><div class='add'>+#define FLITE_REG_CISRCSIZE_ORDER422_IN_CRYCBY	(3 &lt;&lt; 14)</div><div class='add'>+#define FLITE_REG_CISRCSIZE_ORDER422_MASK	(0x3 &lt;&lt; 14)</div><div class='add'>+#define FLITE_REG_CISRCSIZE_SIZE_CAM_MASK	(0x3fff &lt;&lt; 16 | 0x3fff)</div><div class='add'>+</div><div class='add'>+/* Global control */</div><div class='add'>+#define FLITE_REG_CIGCTRL			0x04</div><div class='add'>+#define FLITE_REG_CIGCTRL_YUV422_1P		(0x1e &lt;&lt; 24)</div><div class='add'>+#define FLITE_REG_CIGCTRL_RAW8			(0x2a &lt;&lt; 24)</div><div class='add'>+#define FLITE_REG_CIGCTRL_RAW10			(0x2b &lt;&lt; 24)</div><div class='add'>+#define FLITE_REG_CIGCTRL_RAW12			(0x2c &lt;&lt; 24)</div><div class='add'>+#define FLITE_REG_CIGCTRL_RAW14			(0x2d &lt;&lt; 24)</div><div class='add'>+/* User defined formats. x = 0...15 */</div><div class='add'>+#define FLITE_REG_CIGCTRL_USER(x)		((0x30 + x - 1) &lt;&lt; 24)</div><div class='add'>+#define FLITE_REG_CIGCTRL_FMT_MASK		(0x3f &lt;&lt; 24)</div><div class='add'>+#define FLITE_REG_CIGCTRL_SHADOWMASK_DISABLE	(1 &lt;&lt; 21)</div><div class='add'>+#define FLITE_REG_CIGCTRL_ODMA_DISABLE		(1 &lt;&lt; 20)</div><div class='add'>+#define FLITE_REG_CIGCTRL_SWRST_REQ		(1 &lt;&lt; 19)</div><div class='add'>+#define FLITE_REG_CIGCTRL_SWRST_RDY		(1 &lt;&lt; 18)</div><div class='add'>+#define FLITE_REG_CIGCTRL_SWRST			(1 &lt;&lt; 17)</div><div class='add'>+#define FLITE_REG_CIGCTRL_TEST_PATTERN_COLORBAR	(1 &lt;&lt; 15)</div><div class='add'>+#define FLITE_REG_CIGCTRL_INVPOLPCLK		(1 &lt;&lt; 14)</div><div class='add'>+#define FLITE_REG_CIGCTRL_INVPOLVSYNC		(1 &lt;&lt; 13)</div><div class='add'>+#define FLITE_REG_CIGCTRL_INVPOLHREF		(1 &lt;&lt; 12)</div><div class='add'>+/* Interrupts mask bits (1 disables an interrupt) */</div><div class='add'>+#define FLITE_REG_CIGCTRL_IRQ_LASTEN		(1 &lt;&lt; 8)</div><div class='add'>+#define FLITE_REG_CIGCTRL_IRQ_ENDEN		(1 &lt;&lt; 7)</div><div class='add'>+#define FLITE_REG_CIGCTRL_IRQ_STARTEN		(1 &lt;&lt; 6)</div><div class='add'>+#define FLITE_REG_CIGCTRL_IRQ_OVFEN		(1 &lt;&lt; 5)</div><div class='add'>+#define FLITE_REG_CIGCTRL_IRQ_DISABLE_MASK	(0xf &lt;&lt; 5)</div><div class='add'>+#define FLITE_REG_CIGCTRL_SELCAM_MIPI		(1 &lt;&lt; 3)</div><div class='add'>+</div><div class='add'>+/* Image Capture Enable */</div><div class='add'>+#define FLITE_REG_CIIMGCPT			0x08</div><div class='add'>+#define FLITE_REG_CIIMGCPT_IMGCPTEN		(1 &lt;&lt; 31)</div><div class='add'>+#define FLITE_REG_CIIMGCPT_CPT_FREN		(1 &lt;&lt; 25)</div><div class='add'>+#define FLITE_REG_CIIMGCPT_CPT_MOD_FRCNT	(1 &lt;&lt; 18)</div><div class='add'>+#define FLITE_REG_CIIMGCPT_CPT_MOD_FREN		(0 &lt;&lt; 18)</div><div class='add'>+</div><div class='add'>+/* Capture Sequence */</div><div class='add'>+#define FLITE_REG_CICPTSEQ			0x0c</div><div class='add'>+</div><div class='add'>+/* Camera Window Offset */</div><div class='add'>+#define FLITE_REG_CIWDOFST			0x10</div><div class='add'>+#define FLITE_REG_CIWDOFST_WINOFSEN		(1 &lt;&lt; 31)</div><div class='add'>+#define FLITE_REG_CIWDOFST_CLROVIY		(1 &lt;&lt; 31)</div><div class='add'>+#define FLITE_REG_CIWDOFST_CLROVFICB		(1 &lt;&lt; 15)</div><div class='add'>+#define FLITE_REG_CIWDOFST_CLROVFICR		(1 &lt;&lt; 14)</div><div class='add'>+#define FLITE_REG_CIWDOFST_OFST_MASK		((0x1fff &lt;&lt; 16) | 0x1fff)</div><div class='add'>+</div><div class='add'>+/* Camera Window Offset2 */</div><div class='add'>+#define FLITE_REG_CIWDOFST2			0x14</div><div class='add'>+</div><div class='add'>+/* Camera Output DMA Format */</div><div class='add'>+#define FLITE_REG_CIODMAFMT			0x18</div><div class='add'>+#define FLITE_REG_CIODMAFMT_RAW_CON		(1 &lt;&lt; 15)</div><div class='add'>+#define FLITE_REG_CIODMAFMT_PACK12		(1 &lt;&lt; 14)</div><div class='add'>+#define FLITE_REG_CIODMAFMT_CRYCBY		(0 &lt;&lt; 4)</div><div class='add'>+#define FLITE_REG_CIODMAFMT_CBYCRY		(1 &lt;&lt; 4)</div><div class='add'>+#define FLITE_REG_CIODMAFMT_YCRYCB		(2 &lt;&lt; 4)</div><div class='add'>+#define FLITE_REG_CIODMAFMT_YCBYCR		(3 &lt;&lt; 4)</div><div class='add'>+#define FLITE_REG_CIODMAFMT_YCBCR_ORDER_MASK	(0x3 &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+/* Camera Output Canvas */</div><div class='add'>+#define FLITE_REG_CIOCAN			0x20</div><div class='add'>+#define FLITE_REG_CIOCAN_MASK			((0x3fff &lt;&lt; 16) | 0x3fff)</div><div class='add'>+</div><div class='add'>+/* Camera Output DMA Offset */</div><div class='add'>+#define FLITE_REG_CIOOFF			0x24</div><div class='add'>+#define FLITE_REG_CIOOFF_MASK			((0x3fff &lt;&lt; 16) | 0x3fff)</div><div class='add'>+</div><div class='add'>+/* Camera Output DMA Start Address */</div><div class='add'>+#define FLITE_REG_CIOSA				0x30</div><div class='add'>+</div><div class='add'>+/* Camera Status */</div><div class='add'>+#define FLITE_REG_CISTATUS			0x40</div><div class='add'>+#define FLITE_REG_CISTATUS_MIPI_VVALID		(1 &lt;&lt; 22)</div><div class='add'>+#define FLITE_REG_CISTATUS_MIPI_HVALID		(1 &lt;&lt; 21)</div><div class='add'>+#define FLITE_REG_CISTATUS_MIPI_DVALID		(1 &lt;&lt; 20)</div><div class='add'>+#define FLITE_REG_CISTATUS_ITU_VSYNC		(1 &lt;&lt; 14)</div><div class='add'>+#define FLITE_REG_CISTATUS_ITU_HREFF		(1 &lt;&lt; 13)</div><div class='add'>+#define FLITE_REG_CISTATUS_OVFIY		(1 &lt;&lt; 10)</div><div class='add'>+#define FLITE_REG_CISTATUS_OVFICB		(1 &lt;&lt; 9)</div><div class='add'>+#define FLITE_REG_CISTATUS_OVFICR		(1 &lt;&lt; 8)</div><div class='add'>+#define FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW	(1 &lt;&lt; 7)</div><div class='add'>+#define FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND	(1 &lt;&lt; 6)</div><div class='add'>+#define FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART	(1 &lt;&lt; 5)</div><div class='add'>+#define FLITE_REG_CISTATUS_IRQ_SRC_FRMEND	(1 &lt;&lt; 4)</div><div class='add'>+#define FLITE_REG_CISTATUS_IRQ_CAM		(1 &lt;&lt; 0)</div><div class='add'>+#define FLITE_REG_CISTATUS_IRQ_MASK		(0xf &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+/* Camera Status2 */</div><div class='add'>+#define FLITE_REG_CISTATUS2			0x44</div><div class='add'>+#define FLITE_REG_CISTATUS2_LASTCAPEND		(1 &lt;&lt; 1)</div><div class='add'>+#define FLITE_REG_CISTATUS2_FRMEND		(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* Qos Threshold */</div><div class='add'>+#define FLITE_REG_CITHOLD			0xf0</div><div class='add'>+#define FLITE_REG_CITHOLD_W_QOS_EN		(1 &lt;&lt; 30)</div><div class='add'>+</div><div class='add'>+/* Camera General Purpose */</div><div class='add'>+#define FLITE_REG_CIGENERAL			0xfc</div><div class='add'>+/* b0: 1 - camera B, 0 - camera A */</div><div class='add'>+#define FLITE_REG_CIGENERAL_CAM_B		(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* ----------------------------------------------------------------------------</div><div class='add'>+ * Function declarations</div><div class='add'>+ */</div><div class='add'>+void flite_hw_reset(struct fimc_lite *dev);</div><div class='add'>+void flite_hw_clear_pending_irq(struct fimc_lite *dev);</div><div class='add'>+u32 flite_hw_get_interrupt_source(struct fimc_lite *dev);</div><div class='add'>+void flite_hw_clear_last_capture_end(struct fimc_lite *dev);</div><div class='add'>+void flite_hw_set_interrupt_mask(struct fimc_lite *dev);</div><div class='add'>+void flite_hw_capture_start(struct fimc_lite *dev);</div><div class='add'>+void flite_hw_capture_stop(struct fimc_lite *dev);</div><div class='add'>+void flite_hw_set_camera_bus(struct fimc_lite *dev,</div><div class='add'>+			     struct s5p_fimc_isp_info *s_info);</div><div class='add'>+void flite_hw_set_camera_polarity(struct fimc_lite *dev,</div><div class='add'>+				  struct s5p_fimc_isp_info *cam);</div><div class='add'>+void flite_hw_set_window_offset(struct fimc_lite *dev, struct flite_frame *f);</div><div class='add'>+void flite_hw_set_source_format(struct fimc_lite *dev, struct flite_frame *f);</div><div class='add'>+</div><div class='add'>+void flite_hw_set_output_dma(struct fimc_lite *dev, struct flite_frame *f,</div><div class='add'>+			     bool enable);</div><div class='add'>+void flite_hw_set_dma_window(struct fimc_lite *dev, struct flite_frame *f);</div><div class='add'>+void flite_hw_set_test_pattern(struct fimc_lite *dev, bool on);</div><div class='add'>+void flite_hw_dump_regs(struct fimc_lite *dev, const char *label);</div><div class='add'>+</div><div class='add'>+static inline void flite_hw_set_output_addr(struct fimc_lite *dev, u32 paddr)</div><div class='add'>+{</div><div class='add'>+	writel(paddr, dev-&gt;regs + FLITE_REG_CIOSA);</div><div class='add'>+}</div><div class='add'>+#endif /* FIMC_LITE_REG_H */</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/fimc-lite.c b/drivers/media/video/s5p-fimc/fimc-lite.c<br/>new file mode 100644<br/>index 000000000000..400d701aef04<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-lite.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-lite.c</a></div><div class='hunk'>@@ -0,0 +1,1576 @@</div><div class='add'>+/*</div><div class='add'>+ * Samsung EXYNOS FIMC-LITE (camera host interface) driver</div><div class='add'>+*</div><div class='add'>+ * Copyright (C) 2012 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+#define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bug.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/videodev2.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;media/v4l2-device.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ioctl.h&gt;</div><div class='add'>+#include &lt;media/v4l2-mem2mem.h&gt;</div><div class='add'>+#include &lt;media/videobuf2-core.h&gt;</div><div class='add'>+#include &lt;media/videobuf2-dma-contig.h&gt;</div><div class='add'>+</div><div class='add'>+#include "fimc-mdevice.h"</div><div class='add'>+#include "fimc-core.h"</div><div class='add'>+#include "fimc-lite-reg.h"</div><div class='add'>+</div><div class='add'>+static int debug;</div><div class='add'>+module_param(debug, int, 0644);</div><div class='add'>+</div><div class='add'>+static const struct fimc_fmt fimc_lite_formats[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "YUV 4:2:2 packed, YCbYCr",</div><div class='add'>+		.fourcc		= V4L2_PIX_FMT_YUYV,</div><div class='add'>+		.depth		= { 16 },</div><div class='add'>+		.color		= FIMC_FMT_YCBYCR422,</div><div class='add'>+		.memplanes	= 1,</div><div class='add'>+		.mbus_code	= V4L2_MBUS_FMT_YUYV8_2X8,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "YUV 4:2:2 packed, CbYCrY",</div><div class='add'>+		.fourcc		= V4L2_PIX_FMT_UYVY,</div><div class='add'>+		.depth		= { 16 },</div><div class='add'>+		.color		= FIMC_FMT_CBYCRY422,</div><div class='add'>+		.memplanes	= 1,</div><div class='add'>+		.mbus_code	= V4L2_MBUS_FMT_UYVY8_2X8,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "YUV 4:2:2 packed, CrYCbY",</div><div class='add'>+		.fourcc		= V4L2_PIX_FMT_VYUY,</div><div class='add'>+		.depth		= { 16 },</div><div class='add'>+		.color		= FIMC_FMT_CRYCBY422,</div><div class='add'>+		.memplanes	= 1,</div><div class='add'>+		.mbus_code	= V4L2_MBUS_FMT_VYUY8_2X8,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "YUV 4:2:2 packed, YCrYCb",</div><div class='add'>+		.fourcc		= V4L2_PIX_FMT_YVYU,</div><div class='add'>+		.depth		= { 16 },</div><div class='add'>+		.color		= FIMC_FMT_YCRYCB422,</div><div class='add'>+		.memplanes	= 1,</div><div class='add'>+		.mbus_code	= V4L2_MBUS_FMT_YVYU8_2X8,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "RAW8 (GRBG)",</div><div class='add'>+		.fourcc		= V4L2_PIX_FMT_SGRBG8,</div><div class='add'>+		.depth		= { 8 },</div><div class='add'>+		.color		= FIMC_FMT_RAW8,</div><div class='add'>+		.memplanes	= 1,</div><div class='add'>+		.mbus_code	= V4L2_MBUS_FMT_SGRBG8_1X8,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "RAW10 (GRBG)",</div><div class='add'>+		.fourcc		= V4L2_PIX_FMT_SGRBG10,</div><div class='add'>+		.depth		= { 10 },</div><div class='add'>+		.color		= FIMC_FMT_RAW10,</div><div class='add'>+		.memplanes	= 1,</div><div class='add'>+		.mbus_code	= V4L2_MBUS_FMT_SGRBG10_1X10,</div><div class='add'>+	}, {</div><div class='add'>+		.name		= "RAW12 (GRBG)",</div><div class='add'>+		.fourcc		= V4L2_PIX_FMT_SGRBG12,</div><div class='add'>+		.depth		= { 12 },</div><div class='add'>+		.color		= FIMC_FMT_RAW12,</div><div class='add'>+		.memplanes	= 1,</div><div class='add'>+		.mbus_code	= V4L2_MBUS_FMT_SGRBG12_1X12,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code</div><div class='add'>+ * @pixelformat: fourcc to match, ignored if null</div><div class='add'>+ * @mbus_code: media bus code to match, ignored if null</div><div class='add'>+ * @index: index to the fimc_lite_formats array, ignored if negative</div><div class='add'>+ */</div><div class='add'>+static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,</div><div class='add'>+					const u32 *mbus_code, int index)</div><div class='add'>+{</div><div class='add'>+	const struct fimc_fmt *fmt, *def_fmt = NULL;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int id = 0;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= (int)ARRAY_SIZE(fimc_lite_formats))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(fimc_lite_formats); ++i) {</div><div class='add'>+		fmt = &amp;fimc_lite_formats[i];</div><div class='add'>+		if (pixelformat &amp;&amp; fmt-&gt;fourcc == *pixelformat)</div><div class='add'>+			return fmt;</div><div class='add'>+		if (mbus_code &amp;&amp; fmt-&gt;mbus_code == *mbus_code)</div><div class='add'>+			return fmt;</div><div class='add'>+		if (index == id)</div><div class='add'>+			def_fmt = fmt;</div><div class='add'>+		id++;</div><div class='add'>+	}</div><div class='add'>+	return def_fmt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_hw_init(struct fimc_lite *fimc)</div><div class='add'>+{</div><div class='add'>+	struct fimc_pipeline *pipeline = &amp;fimc-&gt;pipeline;</div><div class='add'>+	struct fimc_sensor_info *sensor;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (pipeline-&gt;subdevs[IDX_SENSOR] == NULL)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	if (fimc-&gt;fmt == NULL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	sensor = v4l2_get_subdev_hostdata(pipeline-&gt;subdevs[IDX_SENSOR]);</div><div class='add'>+	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='add'>+</div><div class='add'>+	flite_hw_set_camera_bus(fimc, sensor-&gt;pdata);</div><div class='add'>+	flite_hw_set_source_format(fimc, &amp;fimc-&gt;inp_frame);</div><div class='add'>+	flite_hw_set_window_offset(fimc, &amp;fimc-&gt;inp_frame);</div><div class='add'>+	flite_hw_set_output_dma(fimc, &amp;fimc-&gt;out_frame, true);</div><div class='add'>+	flite_hw_set_interrupt_mask(fimc);</div><div class='add'>+	flite_hw_set_test_pattern(fimc, fimc-&gt;test_pattern-&gt;val);</div><div class='add'>+</div><div class='add'>+	if (debug &gt; 0)</div><div class='add'>+		flite_hw_dump_regs(fimc, __func__);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Reinitialize the driver so it is ready to start the streaming again.</div><div class='add'>+ * Set fimc-&gt;state to indicate stream off and the hardware shut down state.</div><div class='add'>+ * If not suspending (@suspend is false), return any buffers to videobuf2.</div><div class='add'>+ * Otherwise put any owned buffers onto the pending buffers queue, so they</div><div class='add'>+ * can be re-spun when the device is being resumed. Also perform FIMC</div><div class='add'>+ * software reset and disable streaming on the whole pipeline if required.</div><div class='add'>+ */</div><div class='add'>+static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)</div><div class='add'>+{</div><div class='add'>+	struct flite_buffer *buf;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool streaming;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='add'>+	streaming = fimc-&gt;state &amp; (1 &lt;&lt; ST_SENSOR_STREAM);</div><div class='add'>+</div><div class='add'>+	fimc-&gt;state &amp;= ~(1 &lt;&lt; ST_FLITE_RUN | 1 &lt;&lt; ST_FLITE_OFF |</div><div class='add'>+			 1 &lt;&lt; ST_FLITE_STREAM | 1 &lt;&lt; ST_SENSOR_STREAM);</div><div class='add'>+	if (suspend)</div><div class='add'>+		fimc-&gt;state |= (1 &lt;&lt; ST_FLITE_SUSPENDED);</div><div class='add'>+	else</div><div class='add'>+		fimc-&gt;state &amp;= ~(1 &lt;&lt; ST_FLITE_PENDING |</div><div class='add'>+				 1 &lt;&lt; ST_FLITE_SUSPENDED);</div><div class='add'>+</div><div class='add'>+	/* Release unused buffers */</div><div class='add'>+	while (!suspend &amp;&amp; !list_empty(&amp;fimc-&gt;pending_buf_q)) {</div><div class='add'>+		buf = fimc_lite_pending_queue_pop(fimc);</div><div class='add'>+		vb2_buffer_done(&amp;buf-&gt;vb, VB2_BUF_STATE_ERROR);</div><div class='add'>+	}</div><div class='add'>+	/* If suspending put unused buffers onto pending queue */</div><div class='add'>+	while (!list_empty(&amp;fimc-&gt;active_buf_q)) {</div><div class='add'>+		buf = fimc_lite_active_queue_pop(fimc);</div><div class='add'>+		if (suspend)</div><div class='add'>+			fimc_lite_pending_queue_add(fimc, buf);</div><div class='add'>+		else</div><div class='add'>+			vb2_buffer_done(&amp;buf-&gt;vb, VB2_BUF_STATE_ERROR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+</div><div class='add'>+	flite_hw_reset(fimc);</div><div class='add'>+</div><div class='add'>+	if (!streaming)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return fimc_pipeline_s_stream(&amp;fimc-&gt;pipeline, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!fimc_lite_active(fimc))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='add'>+	set_bit(ST_FLITE_OFF, &amp;fimc-&gt;state);</div><div class='add'>+	flite_hw_capture_stop(fimc);</div><div class='add'>+	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+</div><div class='add'>+	wait_event_timeout(fimc-&gt;irq_queue,</div><div class='add'>+			   !test_bit(ST_FLITE_OFF, &amp;fimc-&gt;state),</div><div class='add'>+			   (2*HZ/10)); /* 200 ms */</div><div class='add'>+</div><div class='add'>+	return fimc_lite_reinit(fimc, suspend);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Must be called  with fimc.slock spinlock held. */</div><div class='add'>+static void fimc_lite_config_update(struct fimc_lite *fimc)</div><div class='add'>+{</div><div class='add'>+	flite_hw_set_window_offset(fimc, &amp;fimc-&gt;inp_frame);</div><div class='add'>+	flite_hw_set_dma_window(fimc, &amp;fimc-&gt;out_frame);</div><div class='add'>+	flite_hw_set_test_pattern(fimc, fimc-&gt;test_pattern-&gt;val);</div><div class='add'>+	clear_bit(ST_FLITE_CONFIG, &amp;fimc-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t flite_irq_handler(int irq, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = priv;</div><div class='add'>+	struct flite_buffer *vbuf;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct timeval *tv;</div><div class='add'>+	struct timespec ts;</div><div class='add'>+	u32 intsrc;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='add'>+</div><div class='add'>+	intsrc = flite_hw_get_interrupt_source(fimc);</div><div class='add'>+	flite_hw_clear_pending_irq(fimc);</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_bit(ST_FLITE_OFF, &amp;fimc-&gt;state)) {</div><div class='add'>+		wake_up(&amp;fimc-&gt;irq_queue);</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (intsrc &amp; FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {</div><div class='add'>+		clear_bit(ST_FLITE_RUN, &amp;fimc-&gt;state);</div><div class='add'>+		fimc-&gt;events.data_overflow++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (intsrc &amp; FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {</div><div class='add'>+		flite_hw_clear_last_capture_end(fimc);</div><div class='add'>+		clear_bit(ST_FLITE_STREAM, &amp;fimc-&gt;state);</div><div class='add'>+		wake_up(&amp;fimc-&gt;irq_queue);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fimc-&gt;out_path != FIMC_IO_DMA)</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='add'>+	if ((intsrc &amp; FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &amp;&amp;</div><div class='add'>+	    test_bit(ST_FLITE_RUN, &amp;fimc-&gt;state) &amp;&amp;</div><div class='add'>+	    !list_empty(&amp;fimc-&gt;active_buf_q) &amp;&amp;</div><div class='add'>+	    !list_empty(&amp;fimc-&gt;pending_buf_q)) {</div><div class='add'>+		vbuf = fimc_lite_active_queue_pop(fimc);</div><div class='add'>+		ktime_get_ts(&amp;ts);</div><div class='add'>+		tv = &amp;vbuf-&gt;vb.v4l2_buf.timestamp;</div><div class='add'>+		tv-&gt;tv_sec = ts.tv_sec;</div><div class='add'>+		tv-&gt;tv_usec = ts.tv_nsec / NSEC_PER_USEC;</div><div class='add'>+		vbuf-&gt;vb.v4l2_buf.sequence = fimc-&gt;frame_count++;</div><div class='add'>+		vb2_buffer_done(&amp;vbuf-&gt;vb, VB2_BUF_STATE_DONE);</div><div class='add'>+</div><div class='add'>+		vbuf = fimc_lite_pending_queue_pop(fimc);</div><div class='add'>+		flite_hw_set_output_addr(fimc, vbuf-&gt;paddr);</div><div class='add'>+		fimc_lite_active_queue_add(fimc, vbuf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (test_bit(ST_FLITE_CONFIG, &amp;fimc-&gt;state))</div><div class='add'>+		fimc_lite_config_update(fimc);</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;fimc-&gt;pending_buf_q)) {</div><div class='add'>+		flite_hw_capture_stop(fimc);</div><div class='add'>+		clear_bit(ST_FLITE_STREAM, &amp;fimc-&gt;state);</div><div class='add'>+	}</div><div class='add'>+done:</div><div class='add'>+	set_bit(ST_FLITE_RUN, &amp;fimc-&gt;state);</div><div class='add'>+	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int start_streaming(struct vb2_queue *q, unsigned int count)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = q-&gt;drv_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	fimc-&gt;frame_count = 0;</div><div class='add'>+</div><div class='add'>+	ret = fimc_lite_hw_init(fimc);</div><div class='add'>+	if (ret) {</div><div class='add'>+		fimc_lite_reinit(fimc, false);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_bit(ST_FLITE_PENDING, &amp;fimc-&gt;state);</div><div class='add'>+</div><div class='add'>+	if (!list_empty(&amp;fimc-&gt;active_buf_q) &amp;&amp;</div><div class='add'>+	    !test_and_set_bit(ST_FLITE_STREAM, &amp;fimc-&gt;state)) {</div><div class='add'>+		flite_hw_capture_start(fimc);</div><div class='add'>+</div><div class='add'>+		if (!test_and_set_bit(ST_SENSOR_STREAM, &amp;fimc-&gt;state))</div><div class='add'>+			fimc_pipeline_s_stream(&amp;fimc-&gt;pipeline, 1);</div><div class='add'>+	}</div><div class='add'>+	if (debug &gt; 0)</div><div class='add'>+		flite_hw_dump_regs(fimc, __func__);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stop_streaming(struct vb2_queue *q)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = q-&gt;drv_priv;</div><div class='add'>+</div><div class='add'>+	if (!fimc_lite_active(fimc))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return fimc_lite_stop_capture(fimc, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,</div><div class='add'>+		       unsigned int *num_buffers, unsigned int *num_planes,</div><div class='add'>+		       unsigned int sizes[], void *allocators[])</div><div class='add'>+{</div><div class='add'>+	const struct v4l2_pix_format_mplane *pixm = NULL;</div><div class='add'>+	struct fimc_lite *fimc = vq-&gt;drv_priv;</div><div class='add'>+	struct flite_frame *frame = &amp;fimc-&gt;out_frame;</div><div class='add'>+	const struct fimc_fmt *fmt = fimc-&gt;fmt;</div><div class='add'>+	unsigned long wh;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (pfmt) {</div><div class='add'>+		pixm = &amp;pfmt-&gt;fmt.pix_mp;</div><div class='add'>+		fmt = fimc_lite_find_format(&amp;pixm-&gt;pixelformat, NULL, -1);</div><div class='add'>+		wh = pixm-&gt;width * pixm-&gt;height;</div><div class='add'>+	} else {</div><div class='add'>+		wh = frame-&gt;f_width * frame-&gt;f_height;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fmt == NULL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*num_planes = fmt-&gt;memplanes;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fmt-&gt;memplanes; i++) {</div><div class='add'>+		unsigned int size = (wh * fmt-&gt;depth[i]) / 8;</div><div class='add'>+		if (pixm)</div><div class='add'>+			sizes[i] = max(size, pixm-&gt;plane_fmt[i].sizeimage);</div><div class='add'>+		else</div><div class='add'>+			sizes[i] = size;</div><div class='add'>+		allocators[i] = fimc-&gt;alloc_ctx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int buffer_prepare(struct vb2_buffer *vb)</div><div class='add'>+{</div><div class='add'>+	struct vb2_queue *vq = vb-&gt;vb2_queue;</div><div class='add'>+	struct fimc_lite *fimc = vq-&gt;drv_priv;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (fimc-&gt;fmt == NULL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fimc-&gt;fmt-&gt;memplanes; i++) {</div><div class='add'>+		unsigned long size = fimc-&gt;payload[i];</div><div class='add'>+</div><div class='add'>+		if (vb2_plane_size(vb, i) &lt; size) {</div><div class='add'>+			v4l2_err(fimc-&gt;vfd,</div><div class='add'>+				 "User buffer too small (%ld &lt; %ld)\n",</div><div class='add'>+				 vb2_plane_size(vb, i), size);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		vb2_set_plane_payload(vb, i, size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void buffer_queue(struct vb2_buffer *vb)</div><div class='add'>+{</div><div class='add'>+	struct flite_buffer *buf</div><div class='add'>+		= container_of(vb, struct flite_buffer, vb);</div><div class='add'>+	struct fimc_lite *fimc = vb2_get_drv_priv(vb-&gt;vb2_queue);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='add'>+	buf-&gt;paddr = vb2_dma_contig_plane_dma_addr(vb, 0);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ST_FLITE_SUSPENDED, &amp;fimc-&gt;state) &amp;&amp;</div><div class='add'>+	    !test_bit(ST_FLITE_STREAM, &amp;fimc-&gt;state) &amp;&amp;</div><div class='add'>+	    list_empty(&amp;fimc-&gt;active_buf_q)) {</div><div class='add'>+		flite_hw_set_output_addr(fimc, buf-&gt;paddr);</div><div class='add'>+		fimc_lite_active_queue_add(fimc, buf);</div><div class='add'>+	} else {</div><div class='add'>+		fimc_lite_pending_queue_add(fimc, buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vb2_is_streaming(&amp;fimc-&gt;vb_queue) &amp;&amp;</div><div class='add'>+	    !list_empty(&amp;fimc-&gt;pending_buf_q) &amp;&amp;</div><div class='add'>+	    !test_and_set_bit(ST_FLITE_STREAM, &amp;fimc-&gt;state)) {</div><div class='add'>+		flite_hw_capture_start(fimc);</div><div class='add'>+		spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+</div><div class='add'>+		if (!test_and_set_bit(ST_SENSOR_STREAM, &amp;fimc-&gt;state))</div><div class='add'>+			fimc_pipeline_s_stream(&amp;fimc-&gt;pipeline, 1);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_lock(struct vb2_queue *vq)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = vb2_get_drv_priv(vq);</div><div class='add'>+	mutex_lock(&amp;fimc-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_unlock(struct vb2_queue *vq)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = vb2_get_drv_priv(vq);</div><div class='add'>+	mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct vb2_ops fimc_lite_qops = {</div><div class='add'>+	.queue_setup	 = queue_setup,</div><div class='add'>+	.buf_prepare	 = buffer_prepare,</div><div class='add'>+	.buf_queue	 = buffer_queue,</div><div class='add'>+	.wait_prepare	 = fimc_unlock,</div><div class='add'>+	.wait_finish	 = fimc_lock,</div><div class='add'>+	.start_streaming = start_streaming,</div><div class='add'>+	.stop_streaming	 = stop_streaming,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='add'>+	memset(&amp;fimc-&gt;events, 0, sizeof(fimc-&gt;events));</div><div class='add'>+	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_open(struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+	int ret = v4l2_fh_open(file);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	set_bit(ST_FLITE_IN_USE, &amp;fimc-&gt;state);</div><div class='add'>+	pm_runtime_get_sync(&amp;fimc-&gt;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (++fimc-&gt;ref_count != 1 || fimc-&gt;out_path != FIMC_IO_DMA)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = fimc_pipeline_initialize(&amp;fimc-&gt;pipeline, &amp;fimc-&gt;vfd-&gt;entity,</div><div class='add'>+				       true);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		v4l2_err(fimc-&gt;vfd, "Video pipeline initialization failed\n");</div><div class='add'>+		pm_runtime_put_sync(&amp;fimc-&gt;pdev-&gt;dev);</div><div class='add'>+		fimc-&gt;ref_count--;</div><div class='add'>+		v4l2_fh_release(file);</div><div class='add'>+		clear_bit(ST_FLITE_IN_USE, &amp;fimc-&gt;state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fimc_lite_clear_event_counters(fimc);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_close(struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+</div><div class='add'>+	if (--fimc-&gt;ref_count == 0 &amp;&amp; fimc-&gt;out_path == FIMC_IO_DMA) {</div><div class='add'>+		clear_bit(ST_FLITE_IN_USE, &amp;fimc-&gt;state);</div><div class='add'>+		fimc_lite_stop_capture(fimc, false);</div><div class='add'>+		fimc_pipeline_shutdown(&amp;fimc-&gt;pipeline);</div><div class='add'>+		clear_bit(ST_FLITE_SUSPENDED, &amp;fimc-&gt;state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(&amp;fimc-&gt;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (fimc-&gt;ref_count == 0)</div><div class='add'>+		vb2_queue_release(&amp;fimc-&gt;vb_queue);</div><div class='add'>+</div><div class='add'>+	return v4l2_fh_release(file);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int fimc_lite_poll(struct file *file,</div><div class='add'>+				   struct poll_table_struct *wait)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+	return vb2_poll(&amp;fimc-&gt;vb_queue, file, wait);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_mmap(struct file *file, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+	return vb2_mmap(&amp;fimc-&gt;vb_queue, vma);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_file_operations fimc_lite_fops = {</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+	.open		= fimc_lite_open,</div><div class='add'>+	.release	= fimc_lite_close,</div><div class='add'>+	.poll		= fimc_lite_poll,</div><div class='add'>+	.unlocked_ioctl	= video_ioctl2,</div><div class='add'>+	.mmap		= fimc_lite_mmap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Format and crop negotiation helpers</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,</div><div class='add'>+					u32 *width, u32 *height,</div><div class='add'>+					u32 *code, u32 *fourcc, int pad)</div><div class='add'>+{</div><div class='add'>+	struct flite_variant *variant = fimc-&gt;variant;</div><div class='add'>+	const struct fimc_fmt *fmt;</div><div class='add'>+</div><div class='add'>+	fmt = fimc_lite_find_format(fourcc, code, 0);</div><div class='add'>+	if (WARN_ON(!fmt))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (code)</div><div class='add'>+		*code = fmt-&gt;mbus_code;</div><div class='add'>+	if (fourcc)</div><div class='add'>+		*fourcc = fmt-&gt;fourcc;</div><div class='add'>+</div><div class='add'>+	if (pad == FLITE_SD_PAD_SINK) {</div><div class='add'>+		v4l_bound_align_image(width, 8, variant-&gt;max_width,</div><div class='add'>+				      ffs(variant-&gt;out_width_align) - 1,</div><div class='add'>+				      height, 0, variant-&gt;max_height, 0, 0);</div><div class='add'>+	} else {</div><div class='add'>+		v4l_bound_align_image(width, 8, fimc-&gt;inp_frame.rect.width,</div><div class='add'>+				      ffs(variant-&gt;out_width_align) - 1,</div><div class='add'>+				      height, 0, fimc-&gt;inp_frame.rect.height,</div><div class='add'>+				      0, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	v4l2_dbg(1, debug, &amp;fimc-&gt;subdev, "code: 0x%x, %dx%d\n",</div><div class='add'>+		 code ? *code : 0, *width, *height);</div><div class='add'>+</div><div class='add'>+	return fmt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)</div><div class='add'>+{</div><div class='add'>+	struct flite_frame *frame = &amp;fimc-&gt;inp_frame;</div><div class='add'>+</div><div class='add'>+	v4l_bound_align_image(&amp;r-&gt;width, 0, frame-&gt;f_width, 0,</div><div class='add'>+			      &amp;r-&gt;height, 0, frame-&gt;f_height, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* Adjust left/top if cropping rectangle got out of bounds */</div><div class='add'>+	r-&gt;left = clamp_t(u32, r-&gt;left, 0, frame-&gt;f_width - r-&gt;width);</div><div class='add'>+	r-&gt;left = round_down(r-&gt;left, fimc-&gt;variant-&gt;win_hor_offs_align);</div><div class='add'>+	r-&gt;top  = clamp_t(u32, r-&gt;top, 0, frame-&gt;f_height - r-&gt;height);</div><div class='add'>+</div><div class='add'>+	v4l2_dbg(1, debug, &amp;fimc-&gt;subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d",</div><div class='add'>+		 r-&gt;left, r-&gt;top, r-&gt;width, r-&gt;height,</div><div class='add'>+		 frame-&gt;f_width, frame-&gt;f_height);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)</div><div class='add'>+{</div><div class='add'>+	struct flite_frame *frame = &amp;fimc-&gt;out_frame;</div><div class='add'>+	struct v4l2_rect *crop_rect = &amp;fimc-&gt;inp_frame.rect;</div><div class='add'>+</div><div class='add'>+	/* Scaling is not supported so we enforce compose rectangle size</div><div class='add'>+	   same as size of the sink crop rectangle. */</div><div class='add'>+	r-&gt;width = crop_rect-&gt;width;</div><div class='add'>+	r-&gt;height = crop_rect-&gt;height;</div><div class='add'>+</div><div class='add'>+	/* Adjust left/top if the composing rectangle got out of bounds */</div><div class='add'>+	r-&gt;left = clamp_t(u32, r-&gt;left, 0, frame-&gt;f_width - r-&gt;width);</div><div class='add'>+	r-&gt;left = round_down(r-&gt;left, fimc-&gt;variant-&gt;out_hor_offs_align);</div><div class='add'>+	r-&gt;top  = clamp_t(u32, r-&gt;top, 0, fimc-&gt;out_frame.f_height - r-&gt;height);</div><div class='add'>+</div><div class='add'>+	v4l2_dbg(1, debug, &amp;fimc-&gt;subdev, "(%d,%d)/%dx%d, source fmt: %dx%d",</div><div class='add'>+		 r-&gt;left, r-&gt;top, r-&gt;width, r-&gt;height,</div><div class='add'>+		 frame-&gt;f_width, frame-&gt;f_height);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Video node ioctl operations</div><div class='add'>+ */</div><div class='add'>+static int fimc_vidioc_querycap_capture(struct file *file, void *priv,</div><div class='add'>+					struct v4l2_capability *cap)</div><div class='add'>+{</div><div class='add'>+	strlcpy(cap-&gt;driver, FIMC_LITE_DRV_NAME, sizeof(cap-&gt;driver));</div><div class='add'>+	cap-&gt;bus_info[0] = 0;</div><div class='add'>+	cap-&gt;card[0] = 0;</div><div class='add'>+	cap-&gt;capabilities = V4L2_CAP_STREAMING;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,</div><div class='add'>+				     struct v4l2_fmtdesc *f)</div><div class='add'>+{</div><div class='add'>+	const struct fimc_fmt *fmt;</div><div class='add'>+</div><div class='add'>+	if (f-&gt;index &gt;= ARRAY_SIZE(fimc_lite_formats))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	fmt = &amp;fimc_lite_formats[f-&gt;index];</div><div class='add'>+	strlcpy(f-&gt;description, fmt-&gt;name, sizeof(f-&gt;description));</div><div class='add'>+	f-&gt;pixelformat = fmt-&gt;fourcc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,</div><div class='add'>+				  struct v4l2_format *f)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+	struct v4l2_pix_format_mplane *pixm = &amp;f-&gt;fmt.pix_mp;</div><div class='add'>+	struct v4l2_plane_pix_format *plane_fmt = &amp;pixm-&gt;plane_fmt[0];</div><div class='add'>+	struct flite_frame *frame = &amp;fimc-&gt;out_frame;</div><div class='add'>+	const struct fimc_fmt *fmt = fimc-&gt;fmt;</div><div class='add'>+</div><div class='add'>+	plane_fmt-&gt;bytesperline = (frame-&gt;f_width * fmt-&gt;depth[0]) / 8;</div><div class='add'>+	plane_fmt-&gt;sizeimage = plane_fmt-&gt;bytesperline * frame-&gt;f_height;</div><div class='add'>+</div><div class='add'>+	pixm-&gt;num_planes = fmt-&gt;memplanes;</div><div class='add'>+	pixm-&gt;pixelformat = fmt-&gt;fourcc;</div><div class='add'>+	pixm-&gt;width = frame-&gt;f_width;</div><div class='add'>+	pixm-&gt;height = frame-&gt;f_height;</div><div class='add'>+	pixm-&gt;field = V4L2_FIELD_NONE;</div><div class='add'>+	pixm-&gt;colorspace = V4L2_COLORSPACE_JPEG;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_try_fmt(struct fimc_lite *fimc,</div><div class='add'>+			     struct v4l2_pix_format_mplane *pixm,</div><div class='add'>+			     const struct fimc_fmt **ffmt)</div><div class='add'>+{</div><div class='add'>+	struct flite_variant *variant = fimc-&gt;variant;</div><div class='add'>+	u32 bpl = pixm-&gt;plane_fmt[0].bytesperline;</div><div class='add'>+	const struct fimc_fmt *fmt;</div><div class='add'>+</div><div class='add'>+	fmt = fimc_lite_find_format(&amp;pixm-&gt;pixelformat, NULL, 0);</div><div class='add'>+	if (WARN_ON(fmt == NULL))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (ffmt)</div><div class='add'>+		*ffmt = fmt;</div><div class='add'>+	v4l_bound_align_image(&amp;pixm-&gt;width, 8, variant-&gt;max_width,</div><div class='add'>+			      ffs(variant-&gt;out_width_align) - 1,</div><div class='add'>+			      &amp;pixm-&gt;height, 0, variant-&gt;max_height, 0, 0);</div><div class='add'>+</div><div class='add'>+	if ((bpl == 0 || ((bpl * 8) / fmt-&gt;depth[0]) &lt; pixm-&gt;width))</div><div class='add'>+		pixm-&gt;plane_fmt[0].bytesperline = (pixm-&gt;width *</div><div class='add'>+						   fmt-&gt;depth[0]) / 8;</div><div class='add'>+</div><div class='add'>+	if (pixm-&gt;plane_fmt[0].sizeimage == 0)</div><div class='add'>+		pixm-&gt;plane_fmt[0].sizeimage = (pixm-&gt;width * pixm-&gt;height *</div><div class='add'>+						fmt-&gt;depth[0]) / 8;</div><div class='add'>+	pixm-&gt;num_planes = fmt-&gt;memplanes;</div><div class='add'>+	pixm-&gt;pixelformat = fmt-&gt;fourcc;</div><div class='add'>+	pixm-&gt;colorspace = V4L2_COLORSPACE_JPEG;</div><div class='add'>+	pixm-&gt;field = V4L2_FIELD_NONE;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,</div><div class='add'>+				    struct v4l2_format *f)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+</div><div class='add'>+	return fimc_lite_try_fmt(fimc, &amp;f-&gt;fmt.pix_mp, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,</div><div class='add'>+				  struct v4l2_format *f)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_pix_format_mplane *pixm = &amp;f-&gt;fmt.pix_mp;</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+	struct flite_frame *frame = &amp;fimc-&gt;out_frame;</div><div class='add'>+	const struct fimc_fmt *fmt = NULL;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (vb2_is_busy(&amp;fimc-&gt;vb_queue))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	ret = fimc_lite_try_fmt(fimc, &amp;f-&gt;fmt.pix_mp, &amp;fmt);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	fimc-&gt;fmt = fmt;</div><div class='add'>+	fimc-&gt;payload[0] = max((pixm-&gt;width * pixm-&gt;height * fmt-&gt;depth[0]) / 8,</div><div class='add'>+			       pixm-&gt;plane_fmt[0].sizeimage);</div><div class='add'>+	frame-&gt;f_width = pixm-&gt;width;</div><div class='add'>+	frame-&gt;f_height = pixm-&gt;height;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_pipeline_validate(struct fimc_lite *fimc)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subdev *sd = &amp;fimc-&gt;subdev;</div><div class='add'>+	struct v4l2_subdev_format sink_fmt, src_fmt;</div><div class='add'>+	struct media_pad *pad;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		/* Retrieve format at the sink pad */</div><div class='add'>+		pad = &amp;sd-&gt;entity.pads[0];</div><div class='add'>+		if (!(pad-&gt;flags &amp; MEDIA_PAD_FL_SINK))</div><div class='add'>+			break;</div><div class='add'>+		/* Don't call FIMC subdev operation to avoid nested locking */</div><div class='add'>+		if (sd == &amp;fimc-&gt;subdev) {</div><div class='add'>+			struct flite_frame *ff = &amp;fimc-&gt;out_frame;</div><div class='add'>+			sink_fmt.format.width = ff-&gt;f_width;</div><div class='add'>+			sink_fmt.format.height = ff-&gt;f_height;</div><div class='add'>+			sink_fmt.format.code = fimc-&gt;fmt-&gt;mbus_code;</div><div class='add'>+		} else {</div><div class='add'>+			sink_fmt.pad = pad-&gt;index;</div><div class='add'>+			sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;</div><div class='add'>+			ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,</div><div class='add'>+					       &amp;sink_fmt);</div><div class='add'>+			if (ret &lt; 0 &amp;&amp; ret != -ENOIOCTLCMD)</div><div class='add'>+				return -EPIPE;</div><div class='add'>+		}</div><div class='add'>+		/* Retrieve format at the source pad */</div><div class='add'>+		pad = media_entity_remote_source(pad);</div><div class='add'>+		if (pad == NULL ||</div><div class='add'>+		    media_entity_type(pad-&gt;entity) != MEDIA_ENT_T_V4L2_SUBDEV)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		sd = media_entity_to_v4l2_subdev(pad-&gt;entity);</div><div class='add'>+		src_fmt.pad = pad-&gt;index;</div><div class='add'>+		src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;</div><div class='add'>+		ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &amp;src_fmt);</div><div class='add'>+		if (ret &lt; 0 &amp;&amp; ret != -ENOIOCTLCMD)</div><div class='add'>+			return -EPIPE;</div><div class='add'>+</div><div class='add'>+		if (src_fmt.format.width != sink_fmt.format.width ||</div><div class='add'>+		    src_fmt.format.height != sink_fmt.format.height ||</div><div class='add'>+		    src_fmt.format.code != sink_fmt.format.code)</div><div class='add'>+			return -EPIPE;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_streamon(struct file *file, void *priv,</div><div class='add'>+			      enum v4l2_buf_type type)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+	struct v4l2_subdev *sensor = fimc-&gt;pipeline.subdevs[IDX_SENSOR];</div><div class='add'>+	struct fimc_pipeline *p = &amp;fimc-&gt;pipeline;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (fimc_lite_active(fimc))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	media_entity_pipeline_start(&amp;sensor-&gt;entity, p-&gt;m_pipeline);</div><div class='add'>+</div><div class='add'>+	ret = fimc_pipeline_validate(fimc);</div><div class='add'>+	if (ret) {</div><div class='add'>+		media_entity_pipeline_stop(&amp;sensor-&gt;entity);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return vb2_streamon(&amp;fimc-&gt;vb_queue, type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_streamoff(struct file *file, void *priv,</div><div class='add'>+			       enum v4l2_buf_type type)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+	struct v4l2_subdev *sd = fimc-&gt;pipeline.subdevs[IDX_SENSOR];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = vb2_streamoff(&amp;fimc-&gt;vb_queue, type);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		media_entity_pipeline_stop(&amp;sd-&gt;entity);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_reqbufs(struct file *file, void *priv,</div><div class='add'>+			     struct v4l2_requestbuffers *reqbufs)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	reqbufs-&gt;count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs-&gt;count);</div><div class='add'>+	ret = vb2_reqbufs(&amp;fimc-&gt;vb_queue, reqbufs);</div><div class='add'>+	if (!ret &lt; 0)</div><div class='add'>+		fimc-&gt;reqbufs_count = reqbufs-&gt;count;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_querybuf(struct file *file, void *priv,</div><div class='add'>+			      struct v4l2_buffer *buf)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+</div><div class='add'>+	return vb2_querybuf(&amp;fimc-&gt;vb_queue, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_qbuf(struct file *file, void *priv,</div><div class='add'>+			  struct v4l2_buffer *buf)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+</div><div class='add'>+	return vb2_qbuf(&amp;fimc-&gt;vb_queue, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_dqbuf(struct file *file, void *priv,</div><div class='add'>+			   struct v4l2_buffer *buf)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+</div><div class='add'>+	return vb2_dqbuf(&amp;fimc-&gt;vb_queue, buf, file-&gt;f_flags &amp; O_NONBLOCK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_create_bufs(struct file *file, void *priv,</div><div class='add'>+				 struct v4l2_create_buffers *create)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+</div><div class='add'>+	return vb2_create_bufs(&amp;fimc-&gt;vb_queue, create);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_prepare_buf(struct file *file, void *priv,</div><div class='add'>+				 struct v4l2_buffer *b)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+</div><div class='add'>+	return vb2_prepare_buf(&amp;fimc-&gt;vb_queue, b);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */</div><div class='add'>+static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)</div><div class='add'>+{</div><div class='add'>+	if (a-&gt;left &lt; b-&gt;left || a-&gt;top &lt; b-&gt;top)</div><div class='add'>+		return 0;</div><div class='add'>+	if (a-&gt;left + a-&gt;width &gt; b-&gt;left + b-&gt;width)</div><div class='add'>+		return 0;</div><div class='add'>+	if (a-&gt;top + a-&gt;height &gt; b-&gt;top + b-&gt;height)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_g_selection(struct file *file, void *fh,</div><div class='add'>+				 struct v4l2_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+	struct flite_frame *f = &amp;fimc-&gt;out_frame;</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (sel-&gt;target) {</div><div class='add'>+	case V4L2_SEL_TGT_COMPOSE_BOUNDS:</div><div class='add'>+	case V4L2_SEL_TGT_COMPOSE_DEFAULT:</div><div class='add'>+		sel-&gt;r.left = 0;</div><div class='add'>+		sel-&gt;r.top = 0;</div><div class='add'>+		sel-&gt;r.width = f-&gt;f_width;</div><div class='add'>+		sel-&gt;r.height = f-&gt;f_height;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case V4L2_SEL_TGT_COMPOSE_ACTIVE:</div><div class='add'>+		sel-&gt;r = f-&gt;rect;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_s_selection(struct file *file, void *fh,</div><div class='add'>+				 struct v4l2_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = video_drvdata(file);</div><div class='add'>+	struct flite_frame *f = &amp;fimc-&gt;out_frame;</div><div class='add'>+	struct v4l2_rect rect = sel-&gt;r;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||</div><div class='add'>+	    sel-&gt;target != V4L2_SEL_TGT_COMPOSE_ACTIVE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	fimc_lite_try_compose(fimc, &amp;rect);</div><div class='add'>+</div><div class='add'>+	if ((sel-&gt;flags &amp; V4L2_SEL_FLAG_LE) &amp;&amp;</div><div class='add'>+	    !enclosed_rectangle(&amp;rect, &amp;sel-&gt;r))</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	if ((sel-&gt;flags &amp; V4L2_SEL_FLAG_GE) &amp;&amp;</div><div class='add'>+	    !enclosed_rectangle(&amp;sel-&gt;r, &amp;rect))</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	sel-&gt;r = rect;</div><div class='add'>+	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='add'>+	f-&gt;rect = rect;</div><div class='add'>+	set_bit(ST_FLITE_CONFIG, &amp;fimc-&gt;state);</div><div class='add'>+	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {</div><div class='add'>+	.vidioc_querycap		= fimc_vidioc_querycap_capture,</div><div class='add'>+	.vidioc_enum_fmt_vid_cap_mplane	= fimc_lite_enum_fmt_mplane,</div><div class='add'>+	.vidioc_try_fmt_vid_cap_mplane	= fimc_lite_try_fmt_mplane,</div><div class='add'>+	.vidioc_s_fmt_vid_cap_mplane	= fimc_lite_s_fmt_mplane,</div><div class='add'>+	.vidioc_g_fmt_vid_cap_mplane	= fimc_lite_g_fmt_mplane,</div><div class='add'>+	.vidioc_g_selection		= fimc_lite_g_selection,</div><div class='add'>+	.vidioc_s_selection		= fimc_lite_s_selection,</div><div class='add'>+	.vidioc_reqbufs			= fimc_lite_reqbufs,</div><div class='add'>+	.vidioc_querybuf		= fimc_lite_querybuf,</div><div class='add'>+	.vidioc_prepare_buf		= fimc_lite_prepare_buf,</div><div class='add'>+	.vidioc_create_bufs		= fimc_lite_create_bufs,</div><div class='add'>+	.vidioc_qbuf			= fimc_lite_qbuf,</div><div class='add'>+	.vidioc_dqbuf			= fimc_lite_dqbuf,</div><div class='add'>+	.vidioc_streamon		= fimc_lite_streamon,</div><div class='add'>+	.vidioc_streamoff		= fimc_lite_streamoff,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Capture subdev media entity operations */</div><div class='add'>+static int fimc_lite_link_setup(struct media_entity *entity,</div><div class='add'>+				const struct media_pad *local,</div><div class='add'>+				const struct media_pad *remote, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);</div><div class='add'>+	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+	unsigned int remote_ent_type = media_entity_type(remote-&gt;entity);</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(fimc == NULL))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	v4l2_dbg(1, debug, sd, "%s: %s --&gt; %s, flags: 0x%x. source_id: 0x%x",</div><div class='add'>+		 __func__, local-&gt;entity-&gt;name, remote-&gt;entity-&gt;name,</div><div class='add'>+		 flags, fimc-&gt;source_subdev_grp_id);</div><div class='add'>+</div><div class='add'>+	switch (local-&gt;index) {</div><div class='add'>+	case FIMC_SD_PAD_SINK:</div><div class='add'>+		if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		if (flags &amp; MEDIA_LNK_FL_ENABLED) {</div><div class='add'>+			if (fimc-&gt;source_subdev_grp_id != 0)</div><div class='add'>+				return -EBUSY;</div><div class='add'>+			fimc-&gt;source_subdev_grp_id = sd-&gt;grp_id;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		fimc-&gt;source_subdev_grp_id = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case FIMC_SD_PAD_SOURCE:</div><div class='add'>+		if (!(flags &amp; MEDIA_LNK_FL_ENABLED)) {</div><div class='add'>+			fimc-&gt;out_path = FIMC_IO_NONE;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)</div><div class='add'>+			fimc-&gt;out_path = FIMC_IO_ISP;</div><div class='add'>+		else</div><div class='add'>+			fimc-&gt;out_path = FIMC_IO_DMA;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		v4l2_err(sd, "Invalid pad index\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct media_entity_operations fimc_lite_subdev_media_ops = {</div><div class='add'>+	.link_setup = fimc_lite_link_setup,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,</div><div class='add'>+					   struct v4l2_subdev_fh *fh,</div><div class='add'>+					   struct v4l2_subdev_mbus_code_enum *code)</div><div class='add'>+{</div><div class='add'>+	const struct fimc_fmt *fmt;</div><div class='add'>+</div><div class='add'>+	fmt = fimc_lite_find_format(NULL, NULL, code-&gt;index);</div><div class='add'>+	if (!fmt)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	code-&gt;code = fmt-&gt;mbus_code;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,</div><div class='add'>+				    struct v4l2_subdev_fh *fh,</div><div class='add'>+				    struct v4l2_subdev_format *fmt)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+	struct v4l2_mbus_framefmt *mf = &amp;fmt-&gt;format;</div><div class='add'>+	struct flite_frame *f = &amp;fimc-&gt;out_frame;</div><div class='add'>+</div><div class='add'>+	if (fmt-&gt;which == V4L2_SUBDEV_FORMAT_TRY) {</div><div class='add'>+		mf = v4l2_subdev_get_try_format(fh, fmt-&gt;pad);</div><div class='add'>+		fmt-&gt;format = *mf;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	mf-&gt;colorspace = V4L2_COLORSPACE_JPEG;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;fimc-&gt;lock);</div><div class='add'>+	mf-&gt;code = fimc-&gt;fmt-&gt;mbus_code;</div><div class='add'>+</div><div class='add'>+	if (fmt-&gt;pad == FLITE_SD_PAD_SINK) {</div><div class='add'>+		/* full camera input frame size */</div><div class='add'>+		mf-&gt;width = f-&gt;f_width;</div><div class='add'>+		mf-&gt;height = f-&gt;f_height;</div><div class='add'>+	} else {</div><div class='add'>+		/* crop size */</div><div class='add'>+		mf-&gt;width = f-&gt;rect.width;</div><div class='add'>+		mf-&gt;height = f-&gt;rect.height;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,</div><div class='add'>+				    struct v4l2_subdev_fh *fh,</div><div class='add'>+				    struct v4l2_subdev_format *fmt)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+	struct v4l2_mbus_framefmt *mf = &amp;fmt-&gt;format;</div><div class='add'>+	struct flite_frame *sink = &amp;fimc-&gt;inp_frame;</div><div class='add'>+	const struct fimc_fmt *ffmt;</div><div class='add'>+</div><div class='add'>+	v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d",</div><div class='add'>+		 fmt-&gt;pad, mf-&gt;code, mf-&gt;width, mf-&gt;height);</div><div class='add'>+</div><div class='add'>+	mf-&gt;colorspace = V4L2_COLORSPACE_JPEG;</div><div class='add'>+	mutex_lock(&amp;fimc-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if ((fimc-&gt;out_path == FIMC_IO_ISP &amp;&amp; sd-&gt;entity.stream_count &gt; 0) ||</div><div class='add'>+	    (fimc-&gt;out_path == FIMC_IO_DMA &amp;&amp; vb2_is_busy(&amp;fimc-&gt;vb_queue))) {</div><div class='add'>+		mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ffmt = fimc_lite_try_format(fimc, &amp;mf-&gt;width, &amp;mf-&gt;height,</div><div class='add'>+				    &amp;mf-&gt;code, NULL, fmt-&gt;pad);</div><div class='add'>+</div><div class='add'>+	if (fmt-&gt;which == V4L2_SUBDEV_FORMAT_TRY) {</div><div class='add'>+		mf = v4l2_subdev_get_try_format(fh, fmt-&gt;pad);</div><div class='add'>+		*mf = fmt-&gt;format;</div><div class='add'>+		mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fmt-&gt;pad == FLITE_SD_PAD_SINK) {</div><div class='add'>+		sink-&gt;f_width = mf-&gt;width;</div><div class='add'>+		sink-&gt;f_height = mf-&gt;height;</div><div class='add'>+		fimc-&gt;fmt = ffmt;</div><div class='add'>+		/* Set sink crop rectangle */</div><div class='add'>+		sink-&gt;rect.width = mf-&gt;width;</div><div class='add'>+		sink-&gt;rect.height = mf-&gt;height;</div><div class='add'>+		sink-&gt;rect.left = 0;</div><div class='add'>+		sink-&gt;rect.top = 0;</div><div class='add'>+		/* Reset source crop rectangle */</div><div class='add'>+		fimc-&gt;out_frame.rect = sink-&gt;rect;</div><div class='add'>+	} else {</div><div class='add'>+		/* Allow changing format only on sink pad */</div><div class='add'>+		mf-&gt;code = fimc-&gt;fmt-&gt;mbus_code;</div><div class='add'>+		mf-&gt;width = sink-&gt;rect.width;</div><div class='add'>+		mf-&gt;height = sink-&gt;rect.height;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,</div><div class='add'>+					  struct v4l2_subdev_fh *fh,</div><div class='add'>+					  struct v4l2_subdev_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+	struct flite_frame *f = &amp;fimc-&gt;inp_frame;</div><div class='add'>+</div><div class='add'>+	if ((sel-&gt;target != V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL &amp;&amp;</div><div class='add'>+	     sel-&gt;target != V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS) ||</div><div class='add'>+	    sel-&gt;pad != FLITE_SD_PAD_SINK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;which == V4L2_SUBDEV_FORMAT_TRY) {</div><div class='add'>+		sel-&gt;r = *v4l2_subdev_get_try_crop(fh, sel-&gt;pad);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;fimc-&gt;lock);</div><div class='add'>+	if (sel-&gt;target == V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL) {</div><div class='add'>+		sel-&gt;r = f-&gt;rect;</div><div class='add'>+	} else {</div><div class='add'>+		sel-&gt;r.left = 0;</div><div class='add'>+		sel-&gt;r.top = 0;</div><div class='add'>+		sel-&gt;r.width = f-&gt;f_width;</div><div class='add'>+		sel-&gt;r.height = f-&gt;f_height;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+</div><div class='add'>+	v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d",</div><div class='add'>+		 __func__, f-&gt;rect.left, f-&gt;rect.top, f-&gt;rect.width,</div><div class='add'>+		 f-&gt;rect.height, f-&gt;f_width, f-&gt;f_height);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,</div><div class='add'>+					  struct v4l2_subdev_fh *fh,</div><div class='add'>+					  struct v4l2_subdev_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+	struct flite_frame *f = &amp;fimc-&gt;inp_frame;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;target != V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL ||</div><div class='add'>+	    sel-&gt;pad != FLITE_SD_PAD_SINK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;fimc-&gt;lock);</div><div class='add'>+	fimc_lite_try_crop(fimc, &amp;sel-&gt;r);</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;which == V4L2_SUBDEV_FORMAT_TRY) {</div><div class='add'>+		*v4l2_subdev_get_try_crop(fh, sel-&gt;pad) = sel-&gt;r;</div><div class='add'>+	} else {</div><div class='add'>+		unsigned long flags;</div><div class='add'>+		spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='add'>+		f-&gt;rect = sel-&gt;r;</div><div class='add'>+		/* Same crop rectangle on the source pad */</div><div class='add'>+		fimc-&gt;out_frame.rect = sel-&gt;r;</div><div class='add'>+		set_bit(ST_FLITE_CONFIG, &amp;fimc-&gt;state);</div><div class='add'>+		spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+</div><div class='add'>+	v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d",</div><div class='add'>+		 __func__, f-&gt;rect.left, f-&gt;rect.top, f-&gt;rect.width,</div><div class='add'>+		 f-&gt;rect.height, f-&gt;f_width, f-&gt;f_height);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+</div><div class='add'>+	if (fimc-&gt;out_path == FIMC_IO_DMA)</div><div class='add'>+		return -ENOIOCTLCMD;</div><div class='add'>+</div><div class='add'>+	/* TODO: */</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_subdev_s_power(struct v4l2_subdev *sd, int on)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+</div><div class='add'>+	if (fimc-&gt;out_path == FIMC_IO_DMA)</div><div class='add'>+		return -ENOIOCTLCMD;</div><div class='add'>+</div><div class='add'>+	/* TODO: */</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_log_status(struct v4l2_subdev *sd)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+</div><div class='add'>+	flite_hw_dump_regs(fimc, __func__);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+	struct vb2_queue *q = &amp;fimc-&gt;vb_queue;</div><div class='add'>+	struct video_device *vfd;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	fimc-&gt;fmt = &amp;fimc_lite_formats[0];</div><div class='add'>+	fimc-&gt;out_path = FIMC_IO_DMA;</div><div class='add'>+</div><div class='add'>+	vfd = video_device_alloc();</div><div class='add'>+	if (!vfd) {</div><div class='add'>+		v4l2_err(sd-&gt;v4l2_dev, "Failed to allocate video device\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(vfd-&gt;name, sizeof(vfd-&gt;name), "fimc-lite.%d.capture",</div><div class='add'>+		 fimc-&gt;index);</div><div class='add'>+</div><div class='add'>+	vfd-&gt;fops = &amp;fimc_lite_fops;</div><div class='add'>+	vfd-&gt;ioctl_ops = &amp;fimc_lite_ioctl_ops;</div><div class='add'>+	vfd-&gt;v4l2_dev = sd-&gt;v4l2_dev;</div><div class='add'>+	vfd-&gt;minor = -1;</div><div class='add'>+	vfd-&gt;release = video_device_release;</div><div class='add'>+	vfd-&gt;lock = &amp;fimc-&gt;lock;</div><div class='add'>+	fimc-&gt;vfd = vfd;</div><div class='add'>+	fimc-&gt;ref_count = 0;</div><div class='add'>+	fimc-&gt;reqbufs_count = 0;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;fimc-&gt;pending_buf_q);</div><div class='add'>+	INIT_LIST_HEAD(&amp;fimc-&gt;active_buf_q);</div><div class='add'>+</div><div class='add'>+	memset(q, 0, sizeof(*q));</div><div class='add'>+	q-&gt;type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;</div><div class='add'>+	q-&gt;io_modes = VB2_MMAP | VB2_USERPTR;</div><div class='add'>+	q-&gt;ops = &amp;fimc_lite_qops;</div><div class='add'>+	q-&gt;mem_ops = &amp;vb2_dma_contig_memops;</div><div class='add'>+	q-&gt;buf_struct_size = sizeof(struct flite_buffer);</div><div class='add'>+	q-&gt;drv_priv = fimc;</div><div class='add'>+</div><div class='add'>+	vb2_queue_init(q);</div><div class='add'>+</div><div class='add'>+	fimc-&gt;vd_pad.flags = MEDIA_PAD_FL_SINK;</div><div class='add'>+	ret = media_entity_init(&amp;vfd-&gt;entity, 1, &amp;fimc-&gt;vd_pad, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	video_set_drvdata(vfd, fimc);</div><div class='add'>+</div><div class='add'>+	ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_vd;</div><div class='add'>+</div><div class='add'>+	v4l2_info(sd-&gt;v4l2_dev, "Registered %s as /dev/%s\n",</div><div class='add'>+		  vfd-&gt;name, video_device_node_name(vfd));</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ err_vd:</div><div class='add'>+	media_entity_cleanup(&amp;vfd-&gt;entity);</div><div class='add'>+ err:</div><div class='add'>+	video_device_release(vfd);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+</div><div class='add'>+	if (fimc == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (fimc-&gt;vfd) {</div><div class='add'>+		video_unregister_device(fimc-&gt;vfd);</div><div class='add'>+		media_entity_cleanup(&amp;fimc-&gt;vfd-&gt;entity);</div><div class='add'>+		fimc-&gt;vfd = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {</div><div class='add'>+	.registered = fimc_lite_subdev_registered,</div><div class='add'>+	.unregistered = fimc_lite_subdev_unregistered,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {</div><div class='add'>+	.enum_mbus_code = fimc_lite_subdev_enum_mbus_code,</div><div class='add'>+	.get_selection = fimc_lite_subdev_get_selection,</div><div class='add'>+	.set_selection = fimc_lite_subdev_set_selection,</div><div class='add'>+	.get_fmt = fimc_lite_subdev_get_fmt,</div><div class='add'>+	.set_fmt = fimc_lite_subdev_set_fmt,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {</div><div class='add'>+	.s_stream = fimc_lite_subdev_s_stream,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {</div><div class='add'>+	.s_power = fimc_lite_subdev_s_power,</div><div class='add'>+	.log_status = fimc_lite_log_status,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct v4l2_subdev_ops fimc_lite_subdev_ops = {</div><div class='add'>+	.core = &amp;fimc_lite_core_ops,</div><div class='add'>+	.video = &amp;fimc_lite_subdev_video_ops,</div><div class='add'>+	.pad = &amp;fimc_lite_subdev_pad_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = container_of(ctrl-&gt;handler, struct fimc_lite,</div><div class='add'>+					      ctrl_handler);</div><div class='add'>+	set_bit(ST_FLITE_CONFIG, &amp;fimc-&gt;state);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {</div><div class='add'>+	.s_ctrl	= fimc_lite_s_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_config fimc_lite_ctrl = {</div><div class='add'>+	.ops	= &amp;fimc_lite_ctrl_ops,</div><div class='add'>+	.id	= V4L2_CTRL_CLASS_USER | 0x1001,</div><div class='add'>+	.type	= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='add'>+	.name	= "Test Pattern 640x480",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_ctrl_handler *handler = &amp;fimc-&gt;ctrl_handler;</div><div class='add'>+	struct v4l2_subdev *sd = &amp;fimc-&gt;subdev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	v4l2_subdev_init(sd, &amp;fimc_lite_subdev_ops);</div><div class='add'>+	sd-&gt;flags = V4L2_SUBDEV_FL_HAS_DEVNODE;</div><div class='add'>+	snprintf(sd-&gt;name, sizeof(sd-&gt;name), "FIMC-LITE.%d", fimc-&gt;index);</div><div class='add'>+</div><div class='add'>+	fimc-&gt;subdev_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;</div><div class='add'>+	fimc-&gt;subdev_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;</div><div class='add'>+	ret = media_entity_init(&amp;sd-&gt;entity, FIMC_SD_PADS_NUM,</div><div class='add'>+				fimc-&gt;subdev_pads, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_handler_init(handler, 1);</div><div class='add'>+	fimc-&gt;test_pattern = v4l2_ctrl_new_custom(handler, &amp;fimc_lite_ctrl,</div><div class='add'>+						  NULL);</div><div class='add'>+	if (handler-&gt;error) {</div><div class='add'>+		media_entity_cleanup(&amp;sd-&gt;entity);</div><div class='add'>+		return handler-&gt;error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sd-&gt;ctrl_handler = handler;</div><div class='add'>+	sd-&gt;internal_ops = &amp;fimc_lite_subdev_internal_ops;</div><div class='add'>+	sd-&gt;entity.ops = &amp;fimc_lite_subdev_media_ops;</div><div class='add'>+	v4l2_set_subdevdata(sd, fimc);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subdev *sd = &amp;fimc-&gt;subdev;</div><div class='add'>+</div><div class='add'>+	v4l2_device_unregister_subdev(sd);</div><div class='add'>+	media_entity_cleanup(&amp;sd-&gt;entity);</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;fimc-&gt;ctrl_handler);</div><div class='add'>+	v4l2_set_subdevdata(sd, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_lite_clk_put(struct fimc_lite *fimc)</div><div class='add'>+{</div><div class='add'>+	if (IS_ERR_OR_NULL(fimc-&gt;clock))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	clk_unprepare(fimc-&gt;clock);</div><div class='add'>+	clk_put(fimc-&gt;clock);</div><div class='add'>+	fimc-&gt;clock = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_clk_get(struct fimc_lite *fimc)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	fimc-&gt;clock = clk_get(&amp;fimc-&gt;pdev-&gt;dev, FLITE_CLK_NAME);</div><div class='add'>+	if (IS_ERR(fimc-&gt;clock))</div><div class='add'>+		return PTR_ERR(fimc-&gt;clock);</div><div class='add'>+</div><div class='add'>+	ret = clk_prepare(fimc-&gt;clock);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		clk_put(fimc-&gt;clock);</div><div class='add'>+		fimc-&gt;clock = NULL;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit fimc_lite_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct flite_drvdata *drv_data = fimc_lite_get_drvdata(pdev);</div><div class='add'>+	struct fimc_lite *fimc;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	fimc = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*fimc), GFP_KERNEL);</div><div class='add'>+	if (!fimc)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	fimc-&gt;index = pdev-&gt;id;</div><div class='add'>+	fimc-&gt;variant = drv_data-&gt;variant[fimc-&gt;index];</div><div class='add'>+	fimc-&gt;pdev = pdev;</div><div class='add'>+</div><div class='add'>+	init_waitqueue_head(&amp;fimc-&gt;irq_queue);</div><div class='add'>+	spin_lock_init(&amp;fimc-&gt;slock);</div><div class='add'>+	mutex_init(&amp;fimc-&gt;lock);</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	fimc-&gt;regs = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='add'>+	if (fimc-&gt;regs == NULL) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to obtain io memory\n");</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='add'>+	if (res == NULL) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to get IRQ resource\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = fimc_lite_clk_get(fimc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = devm_request_irq(&amp;pdev-&gt;dev, res-&gt;start, flite_irq_handler,</div><div class='add'>+			       0, dev_name(&amp;pdev-&gt;dev), fimc);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to install irq (%d)\n", ret);</div><div class='add'>+		goto err_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The video node will be created within the subdev's registered() op */</div><div class='add'>+	ret = fimc_lite_create_capture_subdev(fimc);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_clk;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, fimc);</div><div class='add'>+	pm_runtime_enable(&amp;pdev-&gt;dev);</div><div class='add'>+	ret = pm_runtime_get_sync(&amp;pdev-&gt;dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_sd;</div><div class='add'>+</div><div class='add'>+	fimc-&gt;alloc_ctx = vb2_dma_contig_init_ctx(&amp;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(fimc-&gt;alloc_ctx)) {</div><div class='add'>+		ret = PTR_ERR(fimc-&gt;alloc_ctx);</div><div class='add'>+		goto err_pm;</div><div class='add'>+	}</div><div class='add'>+	pm_runtime_put(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "FIMC-LITE.%d registered successfully\n",</div><div class='add'>+		fimc-&gt;index);</div><div class='add'>+	return 0;</div><div class='add'>+err_pm:</div><div class='add'>+	pm_runtime_put(&amp;pdev-&gt;dev);</div><div class='add'>+err_sd:</div><div class='add'>+	fimc_lite_unregister_capture_subdev(fimc);</div><div class='add'>+err_clk:</div><div class='add'>+	fimc_lite_clk_put(fimc);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_runtime_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	clk_enable(fimc-&gt;clock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_runtime_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	clk_disable(fimc-&gt;clock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int fimc_lite_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = dev_get_drvdata(dev);</div><div class='add'>+	struct flite_buffer *buf;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='add'>+	if (!test_and_clear_bit(ST_LPM, &amp;fimc-&gt;state) ||</div><div class='add'>+	    !test_bit(ST_FLITE_IN_USE, &amp;fimc-&gt;state)) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	flite_hw_reset(fimc);</div><div class='add'>+	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+</div><div class='add'>+	if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &amp;fimc-&gt;state))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;fimc-&gt;active_buf_q);</div><div class='add'>+	fimc_pipeline_initialize(&amp;fimc-&gt;pipeline, &amp;fimc-&gt;vfd-&gt;entity, false);</div><div class='add'>+	fimc_lite_hw_init(fimc);</div><div class='add'>+	clear_bit(ST_FLITE_SUSPENDED, &amp;fimc-&gt;state);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fimc-&gt;reqbufs_count; i++) {</div><div class='add'>+		if (list_empty(&amp;fimc-&gt;pending_buf_q))</div><div class='add'>+			break;</div><div class='add'>+		buf = fimc_lite_pending_queue_pop(fimc);</div><div class='add'>+		buffer_queue(&amp;buf-&gt;vb);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = dev_get_drvdata(dev);</div><div class='add'>+	bool suspend = test_bit(ST_FLITE_IN_USE, &amp;fimc-&gt;state);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (test_and_set_bit(ST_LPM, &amp;fimc-&gt;state))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = fimc_lite_stop_capture(fimc, suspend);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return fimc_pipeline_shutdown(&amp;fimc-&gt;pipeline);</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_PM_SLEEP */</div><div class='add'>+</div><div class='add'>+static int __devexit fimc_lite_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = platform_get_drvdata(pdev);</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	pm_runtime_disable(dev);</div><div class='add'>+	pm_runtime_set_suspended(dev);</div><div class='add'>+	fimc_lite_unregister_capture_subdev(fimc);</div><div class='add'>+	vb2_dma_contig_cleanup_ctx(fimc-&gt;alloc_ctx);</div><div class='add'>+	fimc_lite_clk_put(fimc);</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "Driver unloaded\n");</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct flite_variant fimc_lite0_variant_exynos4 = {</div><div class='add'>+	.max_width		= 8192,</div><div class='add'>+	.max_height		= 8192,</div><div class='add'>+	.out_width_align	= 8,</div><div class='add'>+	.win_hor_offs_align	= 2,</div><div class='add'>+	.out_hor_offs_align	= 8,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* EXYNOS4212, EXYNOS4412 */</div><div class='add'>+static struct flite_drvdata fimc_lite_drvdata_exynos4 = {</div><div class='add'>+	.variant = {</div><div class='add'>+		[0] = &amp;fimc_lite0_variant_exynos4,</div><div class='add'>+		[1] = &amp;fimc_lite0_variant_exynos4,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device_id fimc_lite_driver_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "exynos-fimc-lite",</div><div class='add'>+		.driver_data	= (unsigned long)&amp;fimc_lite_drvdata_exynos4,</div><div class='add'>+	},</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(platform, fimc_lite_driver_ids);</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops fimc_lite_pm_ops = {</div><div class='add'>+	SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)</div><div class='add'>+	SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,</div><div class='add'>+			   NULL)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_driver fimc_lite_driver = {</div><div class='add'>+	.probe		= fimc_lite_probe,</div><div class='add'>+	.remove		= __devexit_p(fimc_lite_remove),</div><div class='add'>+	.id_table	= fimc_lite_driver_ids,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name		= FIMC_LITE_DRV_NAME,</div><div class='add'>+		.owner		= THIS_MODULE,</div><div class='add'>+		.pm		= &amp;fimc_lite_pm_ops,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+module_platform_driver(fimc_lite_driver);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/fimc-lite.h b/drivers/media/video/s5p-fimc/fimc-lite.h<br/>new file mode 100644<br/>index 000000000000..44424eee81d8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-lite.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-lite.h</a></div><div class='hunk'>@@ -0,0 +1,213 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2012 Samsung Electronics Co., Ltd.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef FIMC_LITE_H_</div><div class='add'>+#define FIMC_LITE_H_</div><div class='add'>+</div><div class='add'>+#include &lt;asm/sizes.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/irqreturn.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/videodev2.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;media/media-entity.h&gt;</div><div class='add'>+#include &lt;media/videobuf2-core.h&gt;</div><div class='add'>+#include &lt;media/v4l2-device.h&gt;</div><div class='add'>+#include &lt;media/v4l2-mediabus.h&gt;</div><div class='add'>+#include &lt;media/s5p_fimc.h&gt;</div><div class='add'>+</div><div class='add'>+#include "fimc-core.h"</div><div class='add'>+</div><div class='add'>+#define FIMC_LITE_DRV_NAME	"exynos-fimc-lite"</div><div class='add'>+#define FLITE_CLK_NAME		"flite"</div><div class='add'>+#define FIMC_LITE_MAX_DEVS	2</div><div class='add'>+#define FLITE_REQ_BUFS_MIN	2</div><div class='add'>+</div><div class='add'>+/* Bit index definitions for struct fimc_lite::state */</div><div class='add'>+enum {</div><div class='add'>+	ST_FLITE_LPM,</div><div class='add'>+	ST_FLITE_PENDING,</div><div class='add'>+	ST_FLITE_RUN,</div><div class='add'>+	ST_FLITE_STREAM,</div><div class='add'>+	ST_FLITE_SUSPENDED,</div><div class='add'>+	ST_FLITE_OFF,</div><div class='add'>+	ST_FLITE_IN_USE,</div><div class='add'>+	ST_FLITE_CONFIG,</div><div class='add'>+	ST_SENSOR_STREAM,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FLITE_SD_PAD_SINK	0</div><div class='add'>+#define FLITE_SD_PAD_SOURCE	1</div><div class='add'>+#define FLITE_SD_PADS_NUM	2</div><div class='add'>+</div><div class='add'>+struct flite_variant {</div><div class='add'>+	unsigned short max_width;</div><div class='add'>+	unsigned short max_height;</div><div class='add'>+	unsigned short out_width_align;</div><div class='add'>+	unsigned short win_hor_offs_align;</div><div class='add'>+	unsigned short out_hor_offs_align;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct flite_drvdata {</div><div class='add'>+	struct flite_variant *variant[FIMC_LITE_MAX_DEVS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define fimc_lite_get_drvdata(_pdev) \</div><div class='add'>+	((struct flite_drvdata *) platform_get_device_id(_pdev)-&gt;driver_data)</div><div class='add'>+</div><div class='add'>+struct fimc_lite_events {</div><div class='add'>+	unsigned int data_overflow;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FLITE_MAX_PLANES	1</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct flite_frame - source/target frame properties</div><div class='add'>+ * @f_width: full pixel width</div><div class='add'>+ * @f_height: full pixel height</div><div class='add'>+ * @rect: crop/composition rectangle</div><div class='add'>+ */</div><div class='add'>+struct flite_frame {</div><div class='add'>+	u16 f_width;</div><div class='add'>+	u16 f_height;</div><div class='add'>+	struct v4l2_rect rect;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct flite_buffer - video buffer structure</div><div class='add'>+ * @vb:    vb2 buffer</div><div class='add'>+ * @list:  list head for the buffers queue</div><div class='add'>+ * @paddr: precalculated physical address</div><div class='add'>+ */</div><div class='add'>+struct flite_buffer {</div><div class='add'>+	struct vb2_buffer vb;</div><div class='add'>+	struct list_head list;</div><div class='add'>+	dma_addr_t paddr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct fimc_lite - fimc lite structure</div><div class='add'>+ * @pdev: pointer to FIMC-LITE platform device</div><div class='add'>+ * @variant: variant information for this IP</div><div class='add'>+ * @v4l2_dev: pointer to top the level v4l2_device</div><div class='add'>+ * @vfd: video device node</div><div class='add'>+ * @fh: v4l2 file handle</div><div class='add'>+ * @alloc_ctx: videobuf2 memory allocator context</div><div class='add'>+ * @subdev: FIMC-LITE subdev</div><div class='add'>+ * @vd_pad: media (sink) pad for the capture video node</div><div class='add'>+ * @subdev_pads: the subdev media pads</div><div class='add'>+ * @ctrl_handler: v4l2 control handler</div><div class='add'>+ * @test_pattern: test pattern controls</div><div class='add'>+ * @index: FIMC-LITE platform device index</div><div class='add'>+ * @pipeline: video capture pipeline data structure</div><div class='add'>+ * @slock: spinlock protecting this data structure and the hw registers</div><div class='add'>+ * @lock: mutex serializing video device and the subdev operations</div><div class='add'>+ * @clock: FIMC-LITE gate clock</div><div class='add'>+ * @regs: memory mapped io registers</div><div class='add'>+ * @irq_queue: interrupt handler waitqueue</div><div class='add'>+ * @fmt: pointer to color format description structure</div><div class='add'>+ * @payload: image size in bytes (w x h x bpp)</div><div class='add'>+ * @inp_frame: camera input frame structure</div><div class='add'>+ * @out_frame: DMA output frame structure</div><div class='add'>+ * @out_path: output data path (DMA or FIFO)</div><div class='add'>+ * @source_subdev_grp_id: source subdev group id</div><div class='add'>+ * @state: driver state flags</div><div class='add'>+ * @pending_buf_q: pending buffers queue head</div><div class='add'>+ * @active_buf_q: the queue head of buffers scheduled in hardware</div><div class='add'>+ * @vb_queue: vb2 buffers queue</div><div class='add'>+ * @active_buf_count: number of video buffers scheduled in hardware</div><div class='add'>+ * @frame_count: the captured frames counter</div><div class='add'>+ * @reqbufs_count: the number of buffers requested with REQBUFS ioctl</div><div class='add'>+ * @ref_count: driver's private reference counter</div><div class='add'>+ */</div><div class='add'>+struct fimc_lite {</div><div class='add'>+	struct platform_device	*pdev;</div><div class='add'>+	struct flite_variant	*variant;</div><div class='add'>+	struct v4l2_device	*v4l2_dev;</div><div class='add'>+	struct video_device	*vfd;</div><div class='add'>+	struct v4l2_fh		fh;</div><div class='add'>+	struct vb2_alloc_ctx	*alloc_ctx;</div><div class='add'>+	struct v4l2_subdev	subdev;</div><div class='add'>+	struct media_pad	vd_pad;</div><div class='add'>+	struct media_pad	subdev_pads[FLITE_SD_PADS_NUM];</div><div class='add'>+	struct v4l2_ctrl_handler ctrl_handler;</div><div class='add'>+	struct v4l2_ctrl	*test_pattern;</div><div class='add'>+	u32			index;</div><div class='add'>+	struct fimc_pipeline	pipeline;</div><div class='add'>+</div><div class='add'>+	struct mutex		lock;</div><div class='add'>+	spinlock_t		slock;</div><div class='add'>+</div><div class='add'>+	struct clk		*clock;</div><div class='add'>+	void __iomem		*regs;</div><div class='add'>+	wait_queue_head_t	irq_queue;</div><div class='add'>+</div><div class='add'>+	const struct fimc_fmt	*fmt;</div><div class='add'>+	unsigned long		payload[FLITE_MAX_PLANES];</div><div class='add'>+	struct flite_frame	inp_frame;</div><div class='add'>+	struct flite_frame	out_frame;</div><div class='add'>+	enum fimc_datapath	out_path;</div><div class='add'>+	unsigned int		source_subdev_grp_id;</div><div class='add'>+</div><div class='add'>+	unsigned long		state;</div><div class='add'>+	struct list_head	pending_buf_q;</div><div class='add'>+	struct list_head	active_buf_q;</div><div class='add'>+	struct vb2_queue	vb_queue;</div><div class='add'>+	unsigned int		frame_count;</div><div class='add'>+	unsigned int		reqbufs_count;</div><div class='add'>+	int			ref_count;</div><div class='add'>+</div><div class='add'>+	struct fimc_lite_events	events;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline bool fimc_lite_active(struct fimc_lite *fimc)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='add'>+	ret = fimc-&gt;state &amp; (1 &lt;&lt; ST_FLITE_RUN) ||</div><div class='add'>+		fimc-&gt;state &amp; (1 &lt;&lt; ST_FLITE_PENDING);</div><div class='add'>+	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void fimc_lite_active_queue_add(struct fimc_lite *dev,</div><div class='add'>+					 struct flite_buffer *buf)</div><div class='add'>+{</div><div class='add'>+	list_add_tail(&amp;buf-&gt;list, &amp;dev-&gt;active_buf_q);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct flite_buffer *fimc_lite_active_queue_pop(</div><div class='add'>+					struct fimc_lite *dev)</div><div class='add'>+{</div><div class='add'>+	struct flite_buffer *buf = list_entry(dev-&gt;active_buf_q.next,</div><div class='add'>+					      struct flite_buffer, list);</div><div class='add'>+	list_del(&amp;buf-&gt;list);</div><div class='add'>+	return buf;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void fimc_lite_pending_queue_add(struct fimc_lite *dev,</div><div class='add'>+					struct flite_buffer *buf)</div><div class='add'>+{</div><div class='add'>+	list_add_tail(&amp;buf-&gt;list, &amp;dev-&gt;pending_buf_q);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct flite_buffer *fimc_lite_pending_queue_pop(</div><div class='add'>+					struct fimc_lite *dev)</div><div class='add'>+{</div><div class='add'>+	struct flite_buffer *buf = list_entry(dev-&gt;pending_buf_q.next,</div><div class='add'>+					      struct flite_buffer, list);</div><div class='add'>+	list_del(&amp;buf-&gt;list);</div><div class='add'>+	return buf;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* FIMC_LITE_H_ */</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/fimc-m2m.c b/drivers/media/video/s5p-fimc/fimc-m2m.c<br/>new file mode 100644<br/>index 000000000000..4c58e0570962<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-m2m.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-m2m.c</a></div><div class='hunk'>@@ -0,0 +1,824 @@</div><div class='add'>+/*</div><div class='add'>+ * Samsung S5P/EXYNOS4 SoC series FIMC (video postprocessor) driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Sylwester Nawrocki, &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published</div><div class='add'>+ * by the Free Software Foundation, either version 2 of the License,</div><div class='add'>+ * or (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/bug.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ioctl.h&gt;</div><div class='add'>+#include &lt;media/videobuf2-core.h&gt;</div><div class='add'>+#include &lt;media/videobuf2-dma-contig.h&gt;</div><div class='add'>+</div><div class='add'>+#include "fimc-core.h"</div><div class='add'>+#include "fimc-reg.h"</div><div class='add'>+#include "fimc-mdevice.h"</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static unsigned int get_m2m_fmt_flags(unsigned int stream_type)</div><div class='add'>+{</div><div class='add'>+	if (stream_type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)</div><div class='add'>+		return FMT_FLAGS_M2M_IN;</div><div class='add'>+	else</div><div class='add'>+		return FMT_FLAGS_M2M_OUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fimc_m2m_job_finish(struct fimc_ctx *ctx, int vb_state)</div><div class='add'>+{</div><div class='add'>+	struct vb2_buffer *src_vb, *dst_vb;</div><div class='add'>+</div><div class='add'>+	if (!ctx || !ctx-&gt;m2m_ctx)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	src_vb = v4l2_m2m_src_buf_remove(ctx-&gt;m2m_ctx);</div><div class='add'>+	dst_vb = v4l2_m2m_dst_buf_remove(ctx-&gt;m2m_ctx);</div><div class='add'>+</div><div class='add'>+	if (src_vb &amp;&amp; dst_vb) {</div><div class='add'>+		v4l2_m2m_buf_done(src_vb, vb_state);</div><div class='add'>+		v4l2_m2m_buf_done(dst_vb, vb_state);</div><div class='add'>+		v4l2_m2m_job_finish(ctx-&gt;fimc_dev-&gt;m2m.m2m_dev,</div><div class='add'>+				    ctx-&gt;m2m_ctx);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Complete the transaction which has been scheduled for execution. */</div><div class='add'>+static int fimc_m2m_shutdown(struct fimc_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!fimc_m2m_pending(fimc))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	fimc_ctx_state_set(FIMC_CTX_SHUT, ctx);</div><div class='add'>+</div><div class='add'>+	ret = wait_event_timeout(fimc-&gt;irq_queue,</div><div class='add'>+			   !fimc_ctx_state_is_set(FIMC_CTX_SHUT, ctx),</div><div class='add'>+			   FIMC_SHUTDOWN_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	return ret == 0 ? -ETIMEDOUT : ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int start_streaming(struct vb2_queue *q, unsigned int count)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = q-&gt;drv_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pm_runtime_get_sync(&amp;ctx-&gt;fimc_dev-&gt;pdev-&gt;dev);</div><div class='add'>+	return ret &gt; 0 ? 0 : ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stop_streaming(struct vb2_queue *q)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = q-&gt;drv_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = fimc_m2m_shutdown(ctx);</div><div class='add'>+	if (ret == -ETIMEDOUT)</div><div class='add'>+		fimc_m2m_job_finish(ctx, VB2_BUF_STATE_ERROR);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(&amp;ctx-&gt;fimc_dev-&gt;pdev-&gt;dev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_device_run(void *priv)</div><div class='add'>+{</div><div class='add'>+	struct vb2_buffer *vb = NULL;</div><div class='add'>+	struct fimc_ctx *ctx = priv;</div><div class='add'>+	struct fimc_frame *sf, *df;</div><div class='add'>+	struct fimc_dev *fimc;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 ret;</div><div class='add'>+</div><div class='add'>+	if (WARN(!ctx, "Null context\n"))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fimc = ctx-&gt;fimc_dev;</div><div class='add'>+	spin_lock_irqsave(&amp;fimc-&gt;slock, flags);</div><div class='add'>+</div><div class='add'>+	set_bit(ST_M2M_PEND, &amp;fimc-&gt;state);</div><div class='add'>+	sf = &amp;ctx-&gt;s_frame;</div><div class='add'>+	df = &amp;ctx-&gt;d_frame;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;state &amp; FIMC_PARAMS) {</div><div class='add'>+		/* Prepare the DMA offsets for scaler */</div><div class='add'>+		fimc_prepare_dma_offset(ctx, sf);</div><div class='add'>+		fimc_prepare_dma_offset(ctx, df);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vb = v4l2_m2m_next_src_buf(ctx-&gt;m2m_ctx);</div><div class='add'>+	ret = fimc_prepare_addr(ctx, vb, sf, &amp;sf-&gt;paddr);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto dma_unlock;</div><div class='add'>+</div><div class='add'>+	vb = v4l2_m2m_next_dst_buf(ctx-&gt;m2m_ctx);</div><div class='add'>+	ret = fimc_prepare_addr(ctx, vb, df, &amp;df-&gt;paddr);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto dma_unlock;</div><div class='add'>+</div><div class='add'>+	/* Reconfigure hardware if the context has changed. */</div><div class='add'>+	if (fimc-&gt;m2m.ctx != ctx) {</div><div class='add'>+		ctx-&gt;state |= FIMC_PARAMS;</div><div class='add'>+		fimc-&gt;m2m.ctx = ctx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;state &amp; FIMC_PARAMS) {</div><div class='add'>+		fimc_set_yuv_order(ctx);</div><div class='add'>+		fimc_hw_set_input_path(ctx);</div><div class='add'>+		fimc_hw_set_in_dma(ctx);</div><div class='add'>+		ret = fimc_set_scaler_info(ctx);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto dma_unlock;</div><div class='add'>+		fimc_hw_set_prescaler(ctx);</div><div class='add'>+		fimc_hw_set_mainscaler(ctx);</div><div class='add'>+		fimc_hw_set_target_format(ctx);</div><div class='add'>+		fimc_hw_set_rotation(ctx);</div><div class='add'>+		fimc_hw_set_effect(ctx);</div><div class='add'>+		fimc_hw_set_out_dma(ctx);</div><div class='add'>+		if (fimc-&gt;variant-&gt;has_alpha)</div><div class='add'>+			fimc_hw_set_rgb_alpha(ctx);</div><div class='add'>+		fimc_hw_set_output_path(ctx);</div><div class='add'>+	}</div><div class='add'>+	fimc_hw_set_input_addr(fimc, &amp;sf-&gt;paddr);</div><div class='add'>+	fimc_hw_set_output_addr(fimc, &amp;df-&gt;paddr, -1);</div><div class='add'>+</div><div class='add'>+	fimc_activate_capture(ctx);</div><div class='add'>+	ctx-&gt;state &amp;= (FIMC_CTX_M2M | FIMC_CTX_CAP |</div><div class='add'>+		       FIMC_SRC_FMT | FIMC_DST_FMT);</div><div class='add'>+	fimc_hw_activate_input_dma(fimc, true);</div><div class='add'>+</div><div class='add'>+dma_unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;fimc-&gt;slock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_job_abort(void *priv)</div><div class='add'>+{</div><div class='add'>+	fimc_m2m_shutdown(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,</div><div class='add'>+			    unsigned int *num_buffers, unsigned int *num_planes,</div><div class='add'>+			    unsigned int sizes[], void *allocators[])</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = vb2_get_drv_priv(vq);</div><div class='add'>+	struct fimc_frame *f;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	f = ctx_get_frame(ctx, vq-&gt;type);</div><div class='add'>+	if (IS_ERR(f))</div><div class='add'>+		return PTR_ERR(f);</div><div class='add'>+	/*</div><div class='add'>+	 * Return number of non-contigous planes (plane buffers)</div><div class='add'>+	 * depending on the configured color format.</div><div class='add'>+	 */</div><div class='add'>+	if (!f-&gt;fmt)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*num_planes = f-&gt;fmt-&gt;memplanes;</div><div class='add'>+	for (i = 0; i &lt; f-&gt;fmt-&gt;memplanes; i++) {</div><div class='add'>+		sizes[i] = (f-&gt;f_width * f-&gt;f_height * f-&gt;fmt-&gt;depth[i]) / 8;</div><div class='add'>+		allocators[i] = ctx-&gt;fimc_dev-&gt;alloc_ctx;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_buf_prepare(struct vb2_buffer *vb)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = vb2_get_drv_priv(vb-&gt;vb2_queue);</div><div class='add'>+	struct fimc_frame *frame;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	frame = ctx_get_frame(ctx, vb-&gt;vb2_queue-&gt;type);</div><div class='add'>+	if (IS_ERR(frame))</div><div class='add'>+		return PTR_ERR(frame);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; frame-&gt;fmt-&gt;memplanes; i++)</div><div class='add'>+		vb2_set_plane_payload(vb, i, frame-&gt;payload[i]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_buf_queue(struct vb2_buffer *vb)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = vb2_get_drv_priv(vb-&gt;vb2_queue);</div><div class='add'>+</div><div class='add'>+	dbg("ctx: %p, ctx-&gt;state: 0x%x", ctx, ctx-&gt;state);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;m2m_ctx)</div><div class='add'>+		v4l2_m2m_buf_queue(ctx-&gt;m2m_ctx, vb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_lock(struct vb2_queue *vq)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = vb2_get_drv_priv(vq);</div><div class='add'>+	mutex_lock(&amp;ctx-&gt;fimc_dev-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fimc_unlock(struct vb2_queue *vq)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = vb2_get_drv_priv(vq);</div><div class='add'>+	mutex_unlock(&amp;ctx-&gt;fimc_dev-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct vb2_ops fimc_qops = {</div><div class='add'>+	.queue_setup	 = fimc_queue_setup,</div><div class='add'>+	.buf_prepare	 = fimc_buf_prepare,</div><div class='add'>+	.buf_queue	 = fimc_buf_queue,</div><div class='add'>+	.wait_prepare	 = fimc_unlock,</div><div class='add'>+	.wait_finish	 = fimc_lock,</div><div class='add'>+	.stop_streaming	 = stop_streaming,</div><div class='add'>+	.start_streaming = start_streaming,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * V4L2 ioctl handlers</div><div class='add'>+ */</div><div class='add'>+static int fimc_m2m_querycap(struct file *file, void *fh,</div><div class='add'>+			     struct v4l2_capability *cap)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='add'>+</div><div class='add'>+	strncpy(cap-&gt;driver, fimc-&gt;pdev-&gt;name, sizeof(cap-&gt;driver) - 1);</div><div class='add'>+	strncpy(cap-&gt;card, fimc-&gt;pdev-&gt;name, sizeof(cap-&gt;card) - 1);</div><div class='add'>+	cap-&gt;bus_info[0] = 0;</div><div class='add'>+	cap-&gt;capabilities = V4L2_CAP_STREAMING |</div><div class='add'>+		V4L2_CAP_VIDEO_CAPTURE_MPLANE | V4L2_CAP_VIDEO_OUTPUT_MPLANE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_enum_fmt_mplane(struct file *file, void *priv,</div><div class='add'>+				    struct v4l2_fmtdesc *f)</div><div class='add'>+{</div><div class='add'>+	struct fimc_fmt *fmt;</div><div class='add'>+</div><div class='add'>+	fmt = fimc_find_format(NULL, NULL, get_m2m_fmt_flags(f-&gt;type),</div><div class='add'>+			       f-&gt;index);</div><div class='add'>+	if (!fmt)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	strncpy(f-&gt;description, fmt-&gt;name, sizeof(f-&gt;description) - 1);</div><div class='add'>+	f-&gt;pixelformat = fmt-&gt;fourcc;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_g_fmt_mplane(struct file *file, void *fh,</div><div class='add'>+				 struct v4l2_format *f)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+	struct fimc_frame *frame = ctx_get_frame(ctx, f-&gt;type);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(frame))</div><div class='add'>+		return PTR_ERR(frame);</div><div class='add'>+</div><div class='add'>+	return fimc_fill_format(frame, f);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_try_fmt_mplane(struct fimc_ctx *ctx, struct v4l2_format *f)</div><div class='add'>+{</div><div class='add'>+	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='add'>+	struct fimc_variant *variant = fimc-&gt;variant;</div><div class='add'>+	struct v4l2_pix_format_mplane *pix = &amp;f-&gt;fmt.pix_mp;</div><div class='add'>+	struct fimc_fmt *fmt;</div><div class='add'>+	u32 max_w, mod_x, mod_y;</div><div class='add'>+</div><div class='add'>+	if (!IS_M2M(f-&gt;type))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dbg("w: %d, h: %d", pix-&gt;width, pix-&gt;height);</div><div class='add'>+</div><div class='add'>+	fmt = fimc_find_format(&amp;pix-&gt;pixelformat, NULL,</div><div class='add'>+			       get_m2m_fmt_flags(f-&gt;type), 0);</div><div class='add'>+	if (WARN(fmt == NULL, "Pixel format lookup failed"))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (pix-&gt;field == V4L2_FIELD_ANY)</div><div class='add'>+		pix-&gt;field = V4L2_FIELD_NONE;</div><div class='add'>+	else if (pix-&gt;field != V4L2_FIELD_NONE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (f-&gt;type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {</div><div class='add'>+		max_w = variant-&gt;pix_limit-&gt;scaler_dis_w;</div><div class='add'>+		mod_x = ffs(variant-&gt;min_inp_pixsize) - 1;</div><div class='add'>+	} else {</div><div class='add'>+		max_w = variant-&gt;pix_limit-&gt;out_rot_dis_w;</div><div class='add'>+		mod_x = ffs(variant-&gt;min_out_pixsize) - 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tiled_fmt(fmt)) {</div><div class='add'>+		mod_x = 6; /* 64 x 32 pixels tile */</div><div class='add'>+		mod_y = 5;</div><div class='add'>+	} else {</div><div class='add'>+		if (variant-&gt;min_vsize_align == 1)</div><div class='add'>+			mod_y = fimc_fmt_is_rgb(fmt-&gt;color) ? 0 : 1;</div><div class='add'>+		else</div><div class='add'>+			mod_y = ffs(variant-&gt;min_vsize_align) - 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	v4l_bound_align_image(&amp;pix-&gt;width, 16, max_w, mod_x,</div><div class='add'>+		&amp;pix-&gt;height, 8, variant-&gt;pix_limit-&gt;scaler_dis_w, mod_y, 0);</div><div class='add'>+</div><div class='add'>+	fimc_adjust_mplane_format(fmt, pix-&gt;width, pix-&gt;height, &amp;f-&gt;fmt.pix_mp);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_try_fmt_mplane(struct file *file, void *fh,</div><div class='add'>+				   struct v4l2_format *f)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+</div><div class='add'>+	return fimc_try_fmt_mplane(ctx, f);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_s_fmt_mplane(struct file *file, void *fh,</div><div class='add'>+				 struct v4l2_format *f)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='add'>+	struct vb2_queue *vq;</div><div class='add'>+	struct fimc_frame *frame;</div><div class='add'>+	struct v4l2_pix_format_mplane *pix;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = fimc_try_fmt_mplane(ctx, f);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	vq = v4l2_m2m_get_vq(ctx-&gt;m2m_ctx, f-&gt;type);</div><div class='add'>+</div><div class='add'>+	if (vb2_is_busy(vq)) {</div><div class='add'>+		v4l2_err(fimc-&gt;m2m.vfd, "queue (%d) busy\n", f-&gt;type);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (f-&gt;type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)</div><div class='add'>+		frame = &amp;ctx-&gt;s_frame;</div><div class='add'>+	else</div><div class='add'>+		frame = &amp;ctx-&gt;d_frame;</div><div class='add'>+</div><div class='add'>+	pix = &amp;f-&gt;fmt.pix_mp;</div><div class='add'>+	frame-&gt;fmt = fimc_find_format(&amp;pix-&gt;pixelformat, NULL,</div><div class='add'>+				      get_m2m_fmt_flags(f-&gt;type), 0);</div><div class='add'>+	if (!frame-&gt;fmt)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Update RGB Alpha control state and value range */</div><div class='add'>+	fimc_alpha_ctrl_update(ctx);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; frame-&gt;fmt-&gt;colplanes; i++) {</div><div class='add'>+		frame-&gt;payload[i] =</div><div class='add'>+			(pix-&gt;width * pix-&gt;height * frame-&gt;fmt-&gt;depth[i]) / 8;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fimc_fill_frame(frame, f);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;scaler.enabled = 1;</div><div class='add'>+</div><div class='add'>+	if (f-&gt;type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)</div><div class='add'>+		fimc_ctx_state_set(FIMC_PARAMS | FIMC_DST_FMT, ctx);</div><div class='add'>+	else</div><div class='add'>+		fimc_ctx_state_set(FIMC_PARAMS | FIMC_SRC_FMT, ctx);</div><div class='add'>+</div><div class='add'>+	dbg("f_w: %d, f_h: %d", frame-&gt;f_width, frame-&gt;f_height);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_reqbufs(struct file *file, void *fh,</div><div class='add'>+			    struct v4l2_requestbuffers *reqbufs)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+</div><div class='add'>+	return v4l2_m2m_reqbufs(file, ctx-&gt;m2m_ctx, reqbufs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_querybuf(struct file *file, void *fh,</div><div class='add'>+			     struct v4l2_buffer *buf)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+</div><div class='add'>+	return v4l2_m2m_querybuf(file, ctx-&gt;m2m_ctx, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_qbuf(struct file *file, void *fh,</div><div class='add'>+			 struct v4l2_buffer *buf)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+</div><div class='add'>+	return v4l2_m2m_qbuf(file, ctx-&gt;m2m_ctx, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_dqbuf(struct file *file, void *fh,</div><div class='add'>+			  struct v4l2_buffer *buf)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+</div><div class='add'>+	return v4l2_m2m_dqbuf(file, ctx-&gt;m2m_ctx, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_streamon(struct file *file, void *fh,</div><div class='add'>+			     enum v4l2_buf_type type)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+</div><div class='add'>+	/* The source and target color format need to be set */</div><div class='add'>+	if (V4L2_TYPE_IS_OUTPUT(type)) {</div><div class='add'>+		if (!fimc_ctx_state_is_set(FIMC_SRC_FMT, ctx))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	} else if (!fimc_ctx_state_is_set(FIMC_DST_FMT, ctx)) {</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return v4l2_m2m_streamon(file, ctx-&gt;m2m_ctx, type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_streamoff(struct file *file, void *fh,</div><div class='add'>+			    enum v4l2_buf_type type)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+</div><div class='add'>+	return v4l2_m2m_streamoff(file, ctx-&gt;m2m_ctx, type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_cropcap(struct file *file, void *fh,</div><div class='add'>+			    struct v4l2_cropcap *cr)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+	struct fimc_frame *frame;</div><div class='add'>+</div><div class='add'>+	frame = ctx_get_frame(ctx, cr-&gt;type);</div><div class='add'>+	if (IS_ERR(frame))</div><div class='add'>+		return PTR_ERR(frame);</div><div class='add'>+</div><div class='add'>+	cr-&gt;bounds.left = 0;</div><div class='add'>+	cr-&gt;bounds.top = 0;</div><div class='add'>+	cr-&gt;bounds.width = frame-&gt;o_width;</div><div class='add'>+	cr-&gt;bounds.height = frame-&gt;o_height;</div><div class='add'>+	cr-&gt;defrect = cr-&gt;bounds;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_g_crop(struct file *file, void *fh, struct v4l2_crop *cr)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+	struct fimc_frame *frame;</div><div class='add'>+</div><div class='add'>+	frame = ctx_get_frame(ctx, cr-&gt;type);</div><div class='add'>+	if (IS_ERR(frame))</div><div class='add'>+		return PTR_ERR(frame);</div><div class='add'>+</div><div class='add'>+	cr-&gt;c.left = frame-&gt;offs_h;</div><div class='add'>+	cr-&gt;c.top = frame-&gt;offs_v;</div><div class='add'>+	cr-&gt;c.width = frame-&gt;width;</div><div class='add'>+	cr-&gt;c.height = frame-&gt;height;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_try_crop(struct fimc_ctx *ctx, struct v4l2_crop *cr)</div><div class='add'>+{</div><div class='add'>+	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='add'>+	struct fimc_frame *f;</div><div class='add'>+	u32 min_size, halign, depth = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (cr-&gt;c.top &lt; 0 || cr-&gt;c.left &lt; 0) {</div><div class='add'>+		v4l2_err(fimc-&gt;m2m.vfd,</div><div class='add'>+			"doesn't support negative values for top &amp; left\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (cr-&gt;type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)</div><div class='add'>+		f = &amp;ctx-&gt;d_frame;</div><div class='add'>+	else if (cr-&gt;type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)</div><div class='add'>+		f = &amp;ctx-&gt;s_frame;</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	min_size = (f == &amp;ctx-&gt;s_frame) ?</div><div class='add'>+		fimc-&gt;variant-&gt;min_inp_pixsize : fimc-&gt;variant-&gt;min_out_pixsize;</div><div class='add'>+</div><div class='add'>+	/* Get pixel alignment constraints. */</div><div class='add'>+	if (fimc-&gt;variant-&gt;min_vsize_align == 1)</div><div class='add'>+		halign = fimc_fmt_is_rgb(f-&gt;fmt-&gt;color) ? 0 : 1;</div><div class='add'>+	else</div><div class='add'>+		halign = ffs(fimc-&gt;variant-&gt;min_vsize_align) - 1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; f-&gt;fmt-&gt;colplanes; i++)</div><div class='add'>+		depth += f-&gt;fmt-&gt;depth[i];</div><div class='add'>+</div><div class='add'>+	v4l_bound_align_image(&amp;cr-&gt;c.width, min_size, f-&gt;o_width,</div><div class='add'>+			      ffs(min_size) - 1,</div><div class='add'>+			      &amp;cr-&gt;c.height, min_size, f-&gt;o_height,</div><div class='add'>+			      halign, 64/(ALIGN(depth, 8)));</div><div class='add'>+</div><div class='add'>+	/* adjust left/top if cropping rectangle is out of bounds */</div><div class='add'>+	if (cr-&gt;c.left + cr-&gt;c.width &gt; f-&gt;o_width)</div><div class='add'>+		cr-&gt;c.left = f-&gt;o_width - cr-&gt;c.width;</div><div class='add'>+	if (cr-&gt;c.top + cr-&gt;c.height &gt; f-&gt;o_height)</div><div class='add'>+		cr-&gt;c.top = f-&gt;o_height - cr-&gt;c.height;</div><div class='add'>+</div><div class='add'>+	cr-&gt;c.left = round_down(cr-&gt;c.left, min_size);</div><div class='add'>+	cr-&gt;c.top  = round_down(cr-&gt;c.top, fimc-&gt;variant-&gt;hor_offs_align);</div><div class='add'>+</div><div class='add'>+	dbg("l:%d, t:%d, w:%d, h:%d, f_w: %d, f_h: %d",</div><div class='add'>+	    cr-&gt;c.left, cr-&gt;c.top, cr-&gt;c.width, cr-&gt;c.height,</div><div class='add'>+	    f-&gt;f_width, f-&gt;f_height);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_s_crop(struct file *file, void *fh, struct v4l2_crop *cr)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(fh);</div><div class='add'>+	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='add'>+	struct fimc_frame *f;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = fimc_m2m_try_crop(ctx, cr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	f = (cr-&gt;type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) ?</div><div class='add'>+		&amp;ctx-&gt;s_frame : &amp;ctx-&gt;d_frame;</div><div class='add'>+</div><div class='add'>+	/* Check to see if scaling ratio is within supported range */</div><div class='add'>+	if (fimc_ctx_state_is_set(FIMC_DST_FMT | FIMC_SRC_FMT, ctx)) {</div><div class='add'>+		if (cr-&gt;type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {</div><div class='add'>+			ret = fimc_check_scaler_ratio(ctx, cr-&gt;c.width,</div><div class='add'>+					cr-&gt;c.height, ctx-&gt;d_frame.width,</div><div class='add'>+					ctx-&gt;d_frame.height, ctx-&gt;rotation);</div><div class='add'>+		} else {</div><div class='add'>+			ret = fimc_check_scaler_ratio(ctx, ctx-&gt;s_frame.width,</div><div class='add'>+					ctx-&gt;s_frame.height, cr-&gt;c.width,</div><div class='add'>+					cr-&gt;c.height, ctx-&gt;rotation);</div><div class='add'>+		}</div><div class='add'>+		if (ret) {</div><div class='add'>+			v4l2_err(fimc-&gt;m2m.vfd, "Out of scaler range\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	f-&gt;offs_h = cr-&gt;c.left;</div><div class='add'>+	f-&gt;offs_v = cr-&gt;c.top;</div><div class='add'>+	f-&gt;width  = cr-&gt;c.width;</div><div class='add'>+	f-&gt;height = cr-&gt;c.height;</div><div class='add'>+</div><div class='add'>+	fimc_ctx_state_set(FIMC_PARAMS, ctx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ioctl_ops fimc_m2m_ioctl_ops = {</div><div class='add'>+	.vidioc_querycap		= fimc_m2m_querycap,</div><div class='add'>+	.vidioc_enum_fmt_vid_cap_mplane	= fimc_m2m_enum_fmt_mplane,</div><div class='add'>+	.vidioc_enum_fmt_vid_out_mplane	= fimc_m2m_enum_fmt_mplane,</div><div class='add'>+	.vidioc_g_fmt_vid_cap_mplane	= fimc_m2m_g_fmt_mplane,</div><div class='add'>+	.vidioc_g_fmt_vid_out_mplane	= fimc_m2m_g_fmt_mplane,</div><div class='add'>+	.vidioc_try_fmt_vid_cap_mplane	= fimc_m2m_try_fmt_mplane,</div><div class='add'>+	.vidioc_try_fmt_vid_out_mplane	= fimc_m2m_try_fmt_mplane,</div><div class='add'>+	.vidioc_s_fmt_vid_cap_mplane	= fimc_m2m_s_fmt_mplane,</div><div class='add'>+	.vidioc_s_fmt_vid_out_mplane	= fimc_m2m_s_fmt_mplane,</div><div class='add'>+	.vidioc_reqbufs			= fimc_m2m_reqbufs,</div><div class='add'>+	.vidioc_querybuf		= fimc_m2m_querybuf,</div><div class='add'>+	.vidioc_qbuf			= fimc_m2m_qbuf,</div><div class='add'>+	.vidioc_dqbuf			= fimc_m2m_dqbuf,</div><div class='add'>+	.vidioc_streamon		= fimc_m2m_streamon,</div><div class='add'>+	.vidioc_streamoff		= fimc_m2m_streamoff,</div><div class='add'>+	.vidioc_g_crop			= fimc_m2m_g_crop,</div><div class='add'>+	.vidioc_s_crop			= fimc_m2m_s_crop,</div><div class='add'>+	.vidioc_cropcap			= fimc_m2m_cropcap</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int queue_init(void *priv, struct vb2_queue *src_vq,</div><div class='add'>+		      struct vb2_queue *dst_vq)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	memset(src_vq, 0, sizeof(*src_vq));</div><div class='add'>+	src_vq-&gt;type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;</div><div class='add'>+	src_vq-&gt;io_modes = VB2_MMAP | VB2_USERPTR;</div><div class='add'>+	src_vq-&gt;drv_priv = ctx;</div><div class='add'>+	src_vq-&gt;ops = &amp;fimc_qops;</div><div class='add'>+	src_vq-&gt;mem_ops = &amp;vb2_dma_contig_memops;</div><div class='add'>+	src_vq-&gt;buf_struct_size = sizeof(struct v4l2_m2m_buffer);</div><div class='add'>+</div><div class='add'>+	ret = vb2_queue_init(src_vq);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	memset(dst_vq, 0, sizeof(*dst_vq));</div><div class='add'>+	dst_vq-&gt;type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;</div><div class='add'>+	dst_vq-&gt;io_modes = VB2_MMAP | VB2_USERPTR;</div><div class='add'>+	dst_vq-&gt;drv_priv = ctx;</div><div class='add'>+	dst_vq-&gt;ops = &amp;fimc_qops;</div><div class='add'>+	dst_vq-&gt;mem_ops = &amp;vb2_dma_contig_memops;</div><div class='add'>+	dst_vq-&gt;buf_struct_size = sizeof(struct v4l2_m2m_buffer);</div><div class='add'>+</div><div class='add'>+	return vb2_queue_init(dst_vq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_open(struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct fimc_dev *fimc = video_drvdata(file);</div><div class='add'>+	struct fimc_ctx *ctx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dbg("pid: %d, state: 0x%lx, refcnt: %d",</div><div class='add'>+	    task_pid_nr(current), fimc-&gt;state, fimc-&gt;vid_cap.refcnt);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Return if the corresponding video capture node</div><div class='add'>+	 * is already opened.</div><div class='add'>+	 */</div><div class='add'>+	if (fimc-&gt;vid_cap.refcnt &gt; 0)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	ctx = kzalloc(sizeof *ctx, GFP_KERNEL);</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	v4l2_fh_init(&amp;ctx-&gt;fh, fimc-&gt;m2m.vfd);</div><div class='add'>+	ctx-&gt;fimc_dev = fimc;</div><div class='add'>+</div><div class='add'>+	/* Default color format */</div><div class='add'>+	ctx-&gt;s_frame.fmt = fimc_get_format(0);</div><div class='add'>+	ctx-&gt;d_frame.fmt = fimc_get_format(0);</div><div class='add'>+</div><div class='add'>+	ret = fimc_ctrls_create(ctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error_fh;</div><div class='add'>+</div><div class='add'>+	/* Use separate control handler per file handle */</div><div class='add'>+	ctx-&gt;fh.ctrl_handler = &amp;ctx-&gt;ctrls.handler;</div><div class='add'>+	file-&gt;private_data = &amp;ctx-&gt;fh;</div><div class='add'>+	v4l2_fh_add(&amp;ctx-&gt;fh);</div><div class='add'>+</div><div class='add'>+	/* Setup the device context for memory-to-memory mode */</div><div class='add'>+	ctx-&gt;state = FIMC_CTX_M2M;</div><div class='add'>+	ctx-&gt;flags = 0;</div><div class='add'>+	ctx-&gt;in_path = FIMC_IO_DMA;</div><div class='add'>+	ctx-&gt;out_path = FIMC_IO_DMA;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;m2m_ctx = v4l2_m2m_ctx_init(fimc-&gt;m2m.m2m_dev, ctx, queue_init);</div><div class='add'>+	if (IS_ERR(ctx-&gt;m2m_ctx)) {</div><div class='add'>+		ret = PTR_ERR(ctx-&gt;m2m_ctx);</div><div class='add'>+		goto error_c;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fimc-&gt;m2m.refcnt++ == 0)</div><div class='add'>+		set_bit(ST_M2M_RUN, &amp;fimc-&gt;state);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_c:</div><div class='add'>+	fimc_ctrls_delete(ctx);</div><div class='add'>+error_fh:</div><div class='add'>+	v4l2_fh_del(&amp;ctx-&gt;fh);</div><div class='add'>+	v4l2_fh_exit(&amp;ctx-&gt;fh);</div><div class='add'>+	kfree(ctx);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_release(struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(file-&gt;private_data);</div><div class='add'>+	struct fimc_dev *fimc = ctx-&gt;fimc_dev;</div><div class='add'>+</div><div class='add'>+	dbg("pid: %d, state: 0x%lx, refcnt= %d",</div><div class='add'>+		task_pid_nr(current), fimc-&gt;state, fimc-&gt;m2m.refcnt);</div><div class='add'>+</div><div class='add'>+	v4l2_m2m_ctx_release(ctx-&gt;m2m_ctx);</div><div class='add'>+	fimc_ctrls_delete(ctx);</div><div class='add'>+	v4l2_fh_del(&amp;ctx-&gt;fh);</div><div class='add'>+	v4l2_fh_exit(&amp;ctx-&gt;fh);</div><div class='add'>+</div><div class='add'>+	if (--fimc-&gt;m2m.refcnt &lt;= 0)</div><div class='add'>+		clear_bit(ST_M2M_RUN, &amp;fimc-&gt;state);</div><div class='add'>+	kfree(ctx);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int fimc_m2m_poll(struct file *file,</div><div class='add'>+				  struct poll_table_struct *wait)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(file-&gt;private_data);</div><div class='add'>+</div><div class='add'>+	return v4l2_m2m_poll(file, ctx-&gt;m2m_ctx, wait);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int fimc_m2m_mmap(struct file *file, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	struct fimc_ctx *ctx = fh_to_ctx(file-&gt;private_data);</div><div class='add'>+</div><div class='add'>+	return v4l2_m2m_mmap(file, ctx-&gt;m2m_ctx, vma);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_file_operations fimc_m2m_fops = {</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+	.open		= fimc_m2m_open,</div><div class='add'>+	.release	= fimc_m2m_release,</div><div class='add'>+	.poll		= fimc_m2m_poll,</div><div class='add'>+	.unlocked_ioctl	= video_ioctl2,</div><div class='add'>+	.mmap		= fimc_m2m_mmap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct v4l2_m2m_ops m2m_ops = {</div><div class='add'>+	.device_run	= fimc_device_run,</div><div class='add'>+	.job_abort	= fimc_job_abort,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int fimc_register_m2m_device(struct fimc_dev *fimc,</div><div class='add'>+			     struct v4l2_device *v4l2_dev)</div><div class='add'>+{</div><div class='add'>+	struct video_device *vfd;</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!fimc)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	pdev = fimc-&gt;pdev;</div><div class='add'>+	fimc-&gt;v4l2_dev = v4l2_dev;</div><div class='add'>+</div><div class='add'>+	vfd = video_device_alloc();</div><div class='add'>+	if (!vfd) {</div><div class='add'>+		v4l2_err(v4l2_dev, "Failed to allocate video device\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vfd-&gt;fops = &amp;fimc_m2m_fops;</div><div class='add'>+	vfd-&gt;ioctl_ops = &amp;fimc_m2m_ioctl_ops;</div><div class='add'>+	vfd-&gt;v4l2_dev = v4l2_dev;</div><div class='add'>+	vfd-&gt;minor = -1;</div><div class='add'>+	vfd-&gt;release = video_device_release;</div><div class='add'>+	vfd-&gt;lock = &amp;fimc-&gt;lock;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vfd-&gt;flags);</div><div class='add'>+</div><div class='add'>+	snprintf(vfd-&gt;name, sizeof(vfd-&gt;name), "fimc.%d.m2m", fimc-&gt;id);</div><div class='add'>+	video_set_drvdata(vfd, fimc);</div><div class='add'>+</div><div class='add'>+	fimc-&gt;m2m.vfd = vfd;</div><div class='add'>+	fimc-&gt;m2m.m2m_dev = v4l2_m2m_init(&amp;m2m_ops);</div><div class='add'>+	if (IS_ERR(fimc-&gt;m2m.m2m_dev)) {</div><div class='add'>+		v4l2_err(v4l2_dev, "failed to initialize v4l2-m2m device\n");</div><div class='add'>+		ret = PTR_ERR(fimc-&gt;m2m.m2m_dev);</div><div class='add'>+		goto err_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = media_entity_init(&amp;vfd-&gt;entity, 0, NULL, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_me;</div><div class='add'>+</div><div class='add'>+	ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_vd;</div><div class='add'>+</div><div class='add'>+	v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",</div><div class='add'>+		  vfd-&gt;name, video_device_node_name(vfd));</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_vd:</div><div class='add'>+	media_entity_cleanup(&amp;vfd-&gt;entity);</div><div class='add'>+err_me:</div><div class='add'>+	v4l2_m2m_release(fimc-&gt;m2m.m2m_dev);</div><div class='add'>+err_init:</div><div class='add'>+	video_device_release(fimc-&gt;m2m.vfd);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fimc_unregister_m2m_device(struct fimc_dev *fimc)</div><div class='add'>+{</div><div class='add'>+	if (!fimc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (fimc-&gt;m2m.m2m_dev)</div><div class='add'>+		v4l2_m2m_release(fimc-&gt;m2m.m2m_dev);</div><div class='add'>+	if (fimc-&gt;m2m.vfd) {</div><div class='add'>+		media_entity_cleanup(&amp;fimc-&gt;m2m.vfd-&gt;entity);</div><div class='add'>+		/* Can also be called if video device wasn't registered */</div><div class='add'>+		video_unregister_device(fimc-&gt;m2m.vfd);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/fimc-mdevice.c b/drivers/media/video/s5p-fimc/fimc-mdevice.c<br/>index 62ed37e40149..6753c45631b8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-mdevice.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-fimc/fimc-mdevice.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-mdevice.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-mdevice.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include &lt;media/media-device.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fimc-core.h"</div><div class='add'>+#include "fimc-lite.h"</div><div class='ctx'> #include "fimc-mdevice.h"</div><div class='ctx'> #include "mipi-csis.h"</div><div class='ctx'> </div><div class='hunk'>@@ -37,22 +38,46 @@ static int __fimc_md_set_camclk(struct fimc_md *fmd,</div><div class='ctx'>  *</div><div class='ctx'>  * Caller holds the graph mutex.</div><div class='ctx'>  */</div><div class='del'>-void fimc_pipeline_prepare(struct fimc_dev *fimc, struct media_entity *me)</div><div class='add'>+void fimc_pipeline_prepare(struct fimc_pipeline *p, struct media_entity *me)</div><div class='ctx'> {</div><div class='del'>-	struct media_entity_graph graph;</div><div class='add'>+	struct media_pad *pad = &amp;me-&gt;pads[0];</div><div class='ctx'> 	struct v4l2_subdev *sd;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	media_entity_graph_walk_start(&amp;graph, me);</div><div class='add'>+	for (i = 0; i &lt; IDX_MAX; i++)</div><div class='add'>+		p-&gt;subdevs[i] = NULL;</div><div class='ctx'> </div><div class='del'>-	while ((me = media_entity_graph_walk_next(&amp;graph))) {</div><div class='del'>-		if (media_entity_type(me) != MEDIA_ENT_T_V4L2_SUBDEV)</div><div class='del'>-			continue;</div><div class='del'>-		sd = media_entity_to_v4l2_subdev(me);</div><div class='add'>+	while (1) {</div><div class='add'>+		if (!(pad-&gt;flags &amp; MEDIA_PAD_FL_SINK))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* source pad */</div><div class='add'>+		pad = media_entity_remote_source(pad);</div><div class='add'>+		if (pad == NULL ||</div><div class='add'>+		    media_entity_type(pad-&gt;entity) != MEDIA_ENT_T_V4L2_SUBDEV)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		sd = media_entity_to_v4l2_subdev(pad-&gt;entity);</div><div class='ctx'> </div><div class='del'>-		if (sd-&gt;grp_id == SENSOR_GROUP_ID)</div><div class='del'>-			fimc-&gt;pipeline.sensor = sd;</div><div class='del'>-		else if (sd-&gt;grp_id == CSIS_GROUP_ID)</div><div class='del'>-			fimc-&gt;pipeline.csis = sd;</div><div class='add'>+		switch (sd-&gt;grp_id) {</div><div class='add'>+		case SENSOR_GROUP_ID:</div><div class='add'>+			p-&gt;subdevs[IDX_SENSOR] = sd;</div><div class='add'>+			break;</div><div class='add'>+		case CSIS_GROUP_ID:</div><div class='add'>+			p-&gt;subdevs[IDX_CSIS] = sd;</div><div class='add'>+			break;</div><div class='add'>+		case FLITE_GROUP_ID:</div><div class='add'>+			p-&gt;subdevs[IDX_FLITE] = sd;</div><div class='add'>+			break;</div><div class='add'>+		case FIMC_GROUP_ID:</div><div class='add'>+			/* No need to control FIMC subdev through subdev ops */</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			pr_warn("%s: Unknown subdev grp_id: %#x\n",</div><div class='add'>+				__func__, sd-&gt;grp_id);</div><div class='add'>+		}</div><div class='add'>+		/* sink pad */</div><div class='add'>+		pad = &amp;sd-&gt;entity.pads[0];</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -85,30 +110,27 @@ static int __subdev_set_power(struct v4l2_subdev *sd, int on)</div><div class='ctx'> /**</div><div class='ctx'>  * fimc_pipeline_s_power - change power state of all pipeline subdevs</div><div class='ctx'>  * @fimc: fimc device terminating the pipeline</div><div class='del'>- * @state: 1 to enable power or 0 for power down</div><div class='add'>+ * @state: true to power on, false to power off</div><div class='ctx'>  *</div><div class='del'>- * Need to be called with the graph mutex held.</div><div class='add'>+ * Needs to be called with the graph mutex held.</div><div class='ctx'>  */</div><div class='del'>-int fimc_pipeline_s_power(struct fimc_dev *fimc, int state)</div><div class='add'>+int fimc_pipeline_s_power(struct fimc_pipeline *p, bool state)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (fimc-&gt;pipeline.sensor == NULL)</div><div class='add'>+	if (p-&gt;subdevs[IDX_SENSOR] == NULL)</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> </div><div class='del'>-	if (state) {</div><div class='del'>-		ret = __subdev_set_power(fimc-&gt;pipeline.csis, 1);</div><div class='del'>-		if (ret &amp;&amp; ret != -ENXIO)</div><div class='add'>+	for (i = 0; i &lt; IDX_MAX; i++) {</div><div class='add'>+		unsigned int idx = state ? (IDX_MAX - 1) - i : i;</div><div class='add'>+</div><div class='add'>+		ret = __subdev_set_power(p-&gt;subdevs[idx], state);</div><div class='add'>+		if (ret &lt; 0 &amp;&amp; ret != -ENXIO)</div><div class='ctx'> 			return ret;</div><div class='del'>-		return __subdev_set_power(fimc-&gt;pipeline.sensor, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = __subdev_set_power(fimc-&gt;pipeline.sensor, 0);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-	ret = __subdev_set_power(fimc-&gt;pipeline.csis, 0);</div><div class='del'>-</div><div class='del'>-	return ret == -ENXIO ? 0 : ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -119,32 +141,36 @@ int fimc_pipeline_s_power(struct fimc_dev *fimc, int state)</div><div class='ctx'>  *</div><div class='ctx'>  * This function must be called with the graph mutex held.</div><div class='ctx'>  */</div><div class='del'>-static int __fimc_pipeline_initialize(struct fimc_dev *fimc,</div><div class='add'>+static int __fimc_pipeline_initialize(struct fimc_pipeline *p,</div><div class='ctx'> 				      struct media_entity *me, bool prep)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (prep)</div><div class='del'>-		fimc_pipeline_prepare(fimc, me);</div><div class='del'>-	if (fimc-&gt;pipeline.sensor == NULL)</div><div class='add'>+		fimc_pipeline_prepare(p, me);</div><div class='add'>+</div><div class='add'>+	if (p-&gt;subdevs[IDX_SENSOR] == NULL)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	ret = fimc_md_set_camclk(fimc-&gt;pipeline.sensor, true);</div><div class='add'>+</div><div class='add'>+	ret = fimc_md_set_camclk(p-&gt;subdevs[IDX_SENSOR], true);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	return fimc_pipeline_s_power(fimc, 1);</div><div class='add'>+</div><div class='add'>+	return fimc_pipeline_s_power(p, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int fimc_pipeline_initialize(struct fimc_dev *fimc, struct media_entity *me,</div><div class='add'>+int fimc_pipeline_initialize(struct fimc_pipeline *p, struct media_entity *me,</div><div class='ctx'> 			     bool prep)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;me-&gt;parent-&gt;graph_mutex);</div><div class='del'>-	ret =  __fimc_pipeline_initialize(fimc, me, prep);</div><div class='add'>+	ret =  __fimc_pipeline_initialize(p, me, prep);</div><div class='ctx'> 	mutex_unlock(&amp;me-&gt;parent-&gt;graph_mutex);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(fimc_pipeline_initialize);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * __fimc_pipeline_shutdown - disable the sensor clock and pipeline power</div><div class='hunk'>@@ -154,52 +180,55 @@ int fimc_pipeline_initialize(struct fimc_dev *fimc, struct media_entity *me,</div><div class='ctx'>  * sensor clock.</div><div class='ctx'>  * Called with the graph mutex held.</div><div class='ctx'>  */</div><div class='del'>-int __fimc_pipeline_shutdown(struct fimc_dev *fimc)</div><div class='add'>+int __fimc_pipeline_shutdown(struct fimc_pipeline *p)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (fimc-&gt;pipeline.sensor) {</div><div class='del'>-		ret = fimc_pipeline_s_power(fimc, 0);</div><div class='del'>-		fimc_md_set_camclk(fimc-&gt;pipeline.sensor, false);</div><div class='add'>+	if (p-&gt;subdevs[IDX_SENSOR]) {</div><div class='add'>+		ret = fimc_pipeline_s_power(p, 0);</div><div class='add'>+		fimc_md_set_camclk(p-&gt;subdevs[IDX_SENSOR], false);</div><div class='ctx'> 	}</div><div class='ctx'> 	return ret == -ENXIO ? 0 : ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int fimc_pipeline_shutdown(struct fimc_dev *fimc)</div><div class='add'>+int fimc_pipeline_shutdown(struct fimc_pipeline *p)</div><div class='ctx'> {</div><div class='del'>-	struct media_entity *me = &amp;fimc-&gt;vid_cap.vfd-&gt;entity;</div><div class='add'>+	struct media_entity *me = &amp;p-&gt;subdevs[IDX_SENSOR]-&gt;entity;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;me-&gt;parent-&gt;graph_mutex);</div><div class='del'>-	ret = __fimc_pipeline_shutdown(fimc);</div><div class='add'>+	ret = __fimc_pipeline_shutdown(p);</div><div class='ctx'> 	mutex_unlock(&amp;me-&gt;parent-&gt;graph_mutex);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(fimc_pipeline_shutdown);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * fimc_pipeline_s_stream - invoke s_stream on pipeline subdevs</div><div class='del'>- * @fimc: fimc device terminating the pipeline</div><div class='add'>+ * @pipeline: video pipeline structure</div><div class='ctx'>  * @on: passed as the s_stream call argument</div><div class='ctx'>  */</div><div class='del'>-int fimc_pipeline_s_stream(struct fimc_dev *fimc, int on)</div><div class='add'>+int fimc_pipeline_s_stream(struct fimc_pipeline *p, bool on)</div><div class='ctx'> {</div><div class='del'>-	struct fimc_pipeline *p = &amp;fimc-&gt;pipeline;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int i, ret;</div><div class='ctx'> </div><div class='del'>-	if (p-&gt;sensor == NULL)</div><div class='add'>+	if (p-&gt;subdevs[IDX_SENSOR] == NULL)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if ((on &amp;&amp; p-&gt;csis) || !on)</div><div class='del'>-		ret = v4l2_subdev_call(on ? p-&gt;csis : p-&gt;sensor,</div><div class='del'>-				       video, s_stream, on);</div><div class='del'>-	if (ret &lt; 0 &amp;&amp; ret != -ENOIOCTLCMD)</div><div class='del'>-		return ret;</div><div class='del'>-	if ((!on &amp;&amp; p-&gt;csis) || on)</div><div class='del'>-		ret = v4l2_subdev_call(on ? p-&gt;sensor : p-&gt;csis,</div><div class='del'>-				       video, s_stream, on);</div><div class='del'>-	return ret == -ENOIOCTLCMD ? 0 : ret;</div><div class='add'>+	for (i = 0; i &lt; IDX_MAX; i++) {</div><div class='add'>+		unsigned int idx = on ? (IDX_MAX - 1) - i : i;</div><div class='add'>+</div><div class='add'>+		ret = v4l2_subdev_call(p-&gt;subdevs[idx], video, s_stream, on);</div><div class='add'>+</div><div class='add'>+		if (ret &lt; 0 &amp;&amp; ret != -ENOIOCTLCMD &amp;&amp; ret != -ENODEV)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(fimc_pipeline_s_stream);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Sensor subdevice helper functions</div><div class='hunk'>@@ -214,14 +243,20 @@ static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	adapter = i2c_get_adapter(s_info-&gt;pdata-&gt;i2c_bus_num);</div><div class='del'>-	if (!adapter)</div><div class='del'>-		return NULL;</div><div class='add'>+	if (!adapter) {</div><div class='add'>+		v4l2_warn(&amp;fmd-&gt;v4l2_dev,</div><div class='add'>+			  "Failed to get I2C adapter %d, deferring probe\n",</div><div class='add'>+			  s_info-&gt;pdata-&gt;i2c_bus_num);</div><div class='add'>+		return ERR_PTR(-EPROBE_DEFER);</div><div class='add'>+	}</div><div class='ctx'> 	sd = v4l2_i2c_new_subdev_board(&amp;fmd-&gt;v4l2_dev, adapter,</div><div class='ctx'> 				       s_info-&gt;pdata-&gt;board_info, NULL);</div><div class='ctx'> 	if (IS_ERR_OR_NULL(sd)) {</div><div class='ctx'> 		i2c_put_adapter(adapter);</div><div class='del'>-		v4l2_err(&amp;fmd-&gt;v4l2_dev, "Failed to acquire subdev\n");</div><div class='del'>-		return NULL;</div><div class='add'>+		v4l2_warn(&amp;fmd-&gt;v4l2_dev,</div><div class='add'>+			  "Failed to acquire subdev %s, deferring probe\n",</div><div class='add'>+			  s_info-&gt;pdata-&gt;board_info-&gt;type);</div><div class='add'>+		return ERR_PTR(-EPROBE_DEFER);</div><div class='ctx'> 	}</div><div class='ctx'> 	v4l2_set_subdev_hostdata(sd, s_info);</div><div class='ctx'> 	sd-&gt;grp_id = SENSOR_GROUP_ID;</div><div class='hunk'>@@ -269,13 +304,22 @@ static int fimc_md_register_sensor_entities(struct fimc_md *fmd)</div><div class='ctx'> </div><div class='ctx'> 	fmd-&gt;num_sensors = num_clients;</div><div class='ctx'> 	for (i = 0; i &lt; num_clients; i++) {</div><div class='add'>+		struct v4l2_subdev *sd;</div><div class='add'>+</div><div class='ctx'> 		fmd-&gt;sensor[i].pdata = &amp;pdata-&gt;isp_info[i];</div><div class='ctx'> 		ret = __fimc_md_set_camclk(fmd, &amp;fmd-&gt;sensor[i], true);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='del'>-		fmd-&gt;sensor[i].subdev =</div><div class='del'>-			fimc_md_register_sensor(fmd, &amp;fmd-&gt;sensor[i]);</div><div class='add'>+		sd = fimc_md_register_sensor(fmd, &amp;fmd-&gt;sensor[i]);</div><div class='ctx'> 		ret = __fimc_md_set_camclk(fmd, &amp;fmd-&gt;sensor[i], false);</div><div class='add'>+</div><div class='add'>+		if (!IS_ERR(sd)) {</div><div class='add'>+			fmd-&gt;sensor[i].subdev = sd;</div><div class='add'>+		} else {</div><div class='add'>+			fmd-&gt;sensor[i].subdev = NULL;</div><div class='add'>+			ret = PTR_ERR(sd);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -289,21 +333,50 @@ static int fimc_md_register_sensor_entities(struct fimc_md *fmd)</div><div class='ctx'> static int fimc_register_callback(struct device *dev, void *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *fimc = dev_get_drvdata(dev);</div><div class='add'>+	struct v4l2_subdev *sd = &amp;fimc-&gt;vid_cap.subdev;</div><div class='ctx'> 	struct fimc_md *fmd = p;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!fimc || !fimc-&gt;pdev)</div><div class='ctx'> 		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (fimc-&gt;pdev-&gt;id &lt; 0 || fimc-&gt;pdev-&gt;id &gt;= FIMC_MAX_DEVS)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	fmd-&gt;fimc[fimc-&gt;pdev-&gt;id] = fimc;</div><div class='del'>-	ret = fimc_register_m2m_device(fimc, &amp;fmd-&gt;v4l2_dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-	ret = fimc_register_capture_device(fimc, &amp;fmd-&gt;v4l2_dev);</div><div class='del'>-	if (!ret)</div><div class='del'>-		fimc-&gt;vid_cap.user_subdev_api = fmd-&gt;user_subdev_api;</div><div class='add'>+	sd-&gt;grp_id = FIMC_GROUP_ID;</div><div class='add'>+</div><div class='add'>+	ret = v4l2_device_register_subdev(&amp;fmd-&gt;v4l2_dev, sd);</div><div class='add'>+	if (ret) {</div><div class='add'>+		v4l2_err(&amp;fmd-&gt;v4l2_dev, "Failed to register FIMC.%d (%d)\n",</div><div class='add'>+			 fimc-&gt;id, ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fimc_lite_register_callback(struct device *dev, void *p)</div><div class='add'>+{</div><div class='add'>+	struct fimc_lite *fimc = dev_get_drvdata(dev);</div><div class='add'>+	struct v4l2_subdev *sd = &amp;fimc-&gt;subdev;</div><div class='add'>+	struct fimc_md *fmd = p;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (fimc == NULL)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (fimc-&gt;index &gt;= FIMC_LITE_MAX_DEVS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	fmd-&gt;fimc_lite[fimc-&gt;index] = fimc;</div><div class='add'>+	sd-&gt;grp_id = FLITE_GROUP_ID;</div><div class='add'>+</div><div class='add'>+	ret = v4l2_device_register_subdev(&amp;fmd-&gt;v4l2_dev, sd);</div><div class='add'>+	if (ret) {</div><div class='add'>+		v4l2_err(&amp;fmd-&gt;v4l2_dev,</div><div class='add'>+			 "Failed to register FIMC-LITE.%d (%d)\n",</div><div class='add'>+			 fimc-&gt;index, ret);</div><div class='add'>+	}</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -336,22 +409,56 @@ static int csis_register_callback(struct device *dev, void *p)</div><div class='ctx'>  */</div><div class='ctx'> static int fimc_md_register_platform_entities(struct fimc_md *fmd)</div><div class='ctx'> {</div><div class='add'>+	struct s5p_platform_fimc *pdata = fmd-&gt;pdev-&gt;dev.platform_data;</div><div class='ctx'> 	struct device_driver *driver;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, i;</div><div class='ctx'> </div><div class='ctx'> 	driver = driver_find(FIMC_MODULE_NAME, &amp;platform_bus_type);</div><div class='del'>-	if (!driver)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	if (!driver) {</div><div class='add'>+		v4l2_warn(&amp;fmd-&gt;v4l2_dev,</div><div class='add'>+			 "%s driver not found, deffering probe\n",</div><div class='add'>+			 FIMC_MODULE_NAME);</div><div class='add'>+		return -EPROBE_DEFER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = driver_for_each_device(driver, NULL, fmd,</div><div class='ctx'> 				     fimc_register_callback);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	driver = driver_find(CSIS_DRIVER_NAME, &amp;platform_bus_type);</div><div class='del'>-	if (driver)</div><div class='add'>+	driver = driver_find(FIMC_LITE_DRV_NAME, &amp;platform_bus_type);</div><div class='add'>+	if (driver &amp;&amp; try_module_get(driver-&gt;owner)) {</div><div class='ctx'> 		ret = driver_for_each_device(driver, NULL, fmd,</div><div class='del'>-					     csis_register_callback);</div><div class='del'>-	return ret;</div><div class='add'>+					     fimc_lite_register_callback);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		module_put(driver-&gt;owner);</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Check if there is any sensor on the MIPI-CSI2 bus and</div><div class='add'>+	 * if not skip the s5p-csis module loading.</div><div class='add'>+	 */</div><div class='add'>+	if (pdata == NULL)</div><div class='add'>+		return 0;</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;num_clients; i++) {</div><div class='add'>+		if (pdata-&gt;isp_info[i].bus_type == FIMC_MIPI_CSI2) {</div><div class='add'>+			ret = 1;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (!ret)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	driver = driver_find(CSIS_DRIVER_NAME, &amp;platform_bus_type);</div><div class='add'>+	if (!driver || !try_module_get(driver-&gt;owner)) {</div><div class='add'>+		v4l2_warn(&amp;fmd-&gt;v4l2_dev,</div><div class='add'>+			 "%s driver not found, deffering probe\n",</div><div class='add'>+			 CSIS_DRIVER_NAME);</div><div class='add'>+		return -EPROBE_DEFER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return driver_for_each_device(driver, NULL, fmd,</div><div class='add'>+				      csis_register_callback);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fimc_md_unregister_entities(struct fimc_md *fmd)</div><div class='hunk'>@@ -361,14 +468,20 @@ static void fimc_md_unregister_entities(struct fimc_md *fmd)</div><div class='ctx'> 	for (i = 0; i &lt; FIMC_MAX_DEVS; i++) {</div><div class='ctx'> 		if (fmd-&gt;fimc[i] == NULL)</div><div class='ctx'> 			continue;</div><div class='del'>-		fimc_unregister_m2m_device(fmd-&gt;fimc[i]);</div><div class='del'>-		fimc_unregister_capture_device(fmd-&gt;fimc[i]);</div><div class='add'>+		v4l2_device_unregister_subdev(&amp;fmd-&gt;fimc[i]-&gt;vid_cap.subdev);</div><div class='ctx'> 		fmd-&gt;fimc[i] = NULL;</div><div class='ctx'> 	}</div><div class='add'>+	for (i = 0; i &lt; FIMC_LITE_MAX_DEVS; i++) {</div><div class='add'>+		if (fmd-&gt;fimc_lite[i] == NULL)</div><div class='add'>+			continue;</div><div class='add'>+		v4l2_device_unregister_subdev(&amp;fmd-&gt;fimc_lite[i]-&gt;subdev);</div><div class='add'>+		fmd-&gt;fimc_lite[i] = NULL;</div><div class='add'>+	}</div><div class='ctx'> 	for (i = 0; i &lt; CSIS_MAX_ENTITIES; i++) {</div><div class='ctx'> 		if (fmd-&gt;csis[i].sd == NULL)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		v4l2_device_unregister_subdev(fmd-&gt;csis[i].sd);</div><div class='add'>+		module_put(fmd-&gt;csis[i].sd-&gt;owner);</div><div class='ctx'> 		fmd-&gt;csis[i].sd = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	for (i = 0; i &lt; fmd-&gt;num_sensors; i++) {</div><div class='hunk'>@@ -379,35 +492,6 @@ static void fimc_md_unregister_entities(struct fimc_md *fmd)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fimc_md_register_video_nodes(struct fimc_md *fmd)</div><div class='del'>-{</div><div class='del'>-	struct video_device *vdev;</div><div class='del'>-	int i, ret = 0;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; FIMC_MAX_DEVS &amp;&amp; !ret; i++) {</div><div class='del'>-		if (!fmd-&gt;fimc[i])</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		vdev = fmd-&gt;fimc[i]-&gt;m2m.vfd;</div><div class='del'>-		if (vdev) {</div><div class='del'>-			ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1);</div><div class='del'>-			if (ret)</div><div class='del'>-				break;</div><div class='del'>-			v4l2_info(&amp;fmd-&gt;v4l2_dev, "Registered %s as /dev/%s\n",</div><div class='del'>-				  vdev-&gt;name, video_device_node_name(vdev));</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		vdev = fmd-&gt;fimc[i]-&gt;vid_cap.vfd;</div><div class='del'>-		if (vdev == NULL)</div><div class='del'>-			continue;</div><div class='del'>-		ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1);</div><div class='del'>-		v4l2_info(&amp;fmd-&gt;v4l2_dev, "Registered %s as /dev/%s\n",</div><div class='del'>-			  vdev-&gt;name, video_device_node_name(vdev));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * __fimc_md_create_fimc_links - create links to all FIMC entities</div><div class='ctx'>  * @fmd: fimc media device</div><div class='hunk'>@@ -416,29 +500,29 @@ static int fimc_md_register_video_nodes(struct fimc_md *fmd)</div><div class='ctx'>  * @pad: the source entity pad index</div><div class='ctx'>  * @fimc_id: index of the fimc device for which link should be enabled</div><div class='ctx'>  */</div><div class='del'>-static int __fimc_md_create_fimc_links(struct fimc_md *fmd,</div><div class='del'>-				       struct media_entity *source,</div><div class='del'>-				       struct v4l2_subdev *sensor,</div><div class='del'>-				       int pad, int fimc_id)</div><div class='add'>+static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd,</div><div class='add'>+					    struct media_entity *source,</div><div class='add'>+					    struct v4l2_subdev *sensor,</div><div class='add'>+					    int pad, int fimc_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_sensor_info *s_info;</div><div class='ctx'> 	struct media_entity *sink;</div><div class='del'>-	unsigned int flags;</div><div class='add'>+	unsigned int flags = 0;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; FIMC_MAX_DEVS; i++) {</div><div class='ctx'> 		if (!fmd-&gt;fimc[i])</div><div class='del'>-			break;</div><div class='add'>+			continue;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Some FIMC variants are not fitted with camera capture</div><div class='ctx'> 		 * interface. Skip creating a link from sensor for those.</div><div class='ctx'> 		 */</div><div class='del'>-		if (sensor-&gt;grp_id == SENSOR_GROUP_ID &amp;&amp;</div><div class='del'>-		    !fmd-&gt;fimc[i]-&gt;variant-&gt;has_cam_if)</div><div class='add'>+		if (!fmd-&gt;fimc[i]-&gt;variant-&gt;has_cam_if)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		flags = (i == fimc_id) ? MEDIA_LNK_FL_ENABLED : 0;</div><div class='del'>-		sink = &amp;fmd-&gt;fimc[i]-&gt;vid_cap.subdev-&gt;entity;</div><div class='add'>+</div><div class='add'>+		sink = &amp;fmd-&gt;fimc[i]-&gt;vid_cap.subdev.entity;</div><div class='ctx'> 		ret = media_entity_create_link(source, pad, sink,</div><div class='ctx'> 					      FIMC_SD_PAD_SINK, flags);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -453,7 +537,7 @@ static int __fimc_md_create_fimc_links(struct fimc_md *fmd,</div><div class='ctx'> 		v4l2_info(&amp;fmd-&gt;v4l2_dev, "created link [%s] %c&gt; [%s]",</div><div class='ctx'> 			  source-&gt;name, flags ? '=' : '-', sink-&gt;name);</div><div class='ctx'> </div><div class='del'>-		if (flags == 0)</div><div class='add'>+		if (flags == 0 || sensor == NULL)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		s_info = v4l2_get_subdev_hostdata(sensor);</div><div class='ctx'> 		if (!WARN_ON(s_info == NULL)) {</div><div class='hunk'>@@ -463,9 +547,55 @@ static int __fimc_md_create_fimc_links(struct fimc_md *fmd,</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;fmd-&gt;slock, irq_flags);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FIMC_LITE_MAX_DEVS; i++) {</div><div class='add'>+		if (!fmd-&gt;fimc_lite[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		flags = (i == fimc_id) ? MEDIA_LNK_FL_ENABLED : 0;</div><div class='add'>+</div><div class='add'>+		sink = &amp;fmd-&gt;fimc_lite[i]-&gt;subdev.entity;</div><div class='add'>+		ret = media_entity_create_link(source, pad, sink,</div><div class='add'>+					       FLITE_SD_PAD_SINK, flags);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Notify FIMC-LITE subdev entity */</div><div class='add'>+		ret = media_entity_call(sink, link_setup, &amp;sink-&gt;pads[0],</div><div class='add'>+					&amp;source-&gt;pads[pad], flags);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		v4l2_info(&amp;fmd-&gt;v4l2_dev, "created link [%s] %c&gt; [%s]",</div><div class='add'>+			  source-&gt;name, flags ? '=' : '-', sink-&gt;name);</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Create links from FIMC-LITE source pads to other entities */</div><div class='add'>+static int __fimc_md_create_flite_source_links(struct fimc_md *fmd)</div><div class='add'>+{</div><div class='add'>+	struct media_entity *source, *sink;</div><div class='add'>+	unsigned int flags = MEDIA_LNK_FL_ENABLED;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FIMC_LITE_MAX_DEVS; i++) {</div><div class='add'>+		struct fimc_lite *fimc = fmd-&gt;fimc_lite[i];</div><div class='add'>+		if (fimc == NULL)</div><div class='add'>+			continue;</div><div class='add'>+		source = &amp;fimc-&gt;subdev.entity;</div><div class='add'>+		sink = &amp;fimc-&gt;vfd-&gt;entity;</div><div class='add'>+		/* FIMC-LITE's subdev and video node */</div><div class='add'>+		ret = media_entity_create_link(source, FIMC_SD_PAD_SOURCE,</div><div class='add'>+					       sink, 0, flags);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+		/* TODO: create links to other entities */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * fimc_md_create_links - create default links between registered entities</div><div class='ctx'>  *</div><div class='hunk'>@@ -522,8 +652,7 @@ static int fimc_md_create_links(struct fimc_md *fmd)</div><div class='ctx'> 			v4l2_info(&amp;fmd-&gt;v4l2_dev, "created link [%s] =&gt; [%s]",</div><div class='ctx'> 				  sensor-&gt;entity.name, csis-&gt;entity.name);</div><div class='ctx'> </div><div class='del'>-			source = &amp;csis-&gt;entity;</div><div class='del'>-			pad = CSIS_PAD_SOURCE;</div><div class='add'>+			source = NULL;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case FIMC_ITU_601...FIMC_ITU_656:</div><div class='hunk'>@@ -539,15 +668,27 @@ static int fimc_md_create_links(struct fimc_md *fmd)</div><div class='ctx'> 		if (source == NULL)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		ret = __fimc_md_create_fimc_links(fmd, source, sensor, pad,</div><div class='del'>-						  fimc_id++);</div><div class='add'>+		ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,</div><div class='add'>+						       pad, fimc_id++);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	fimc_id = 0;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(fmd-&gt;csis); i++) {</div><div class='add'>+		if (fmd-&gt;csis[i].sd == NULL)</div><div class='add'>+			continue;</div><div class='add'>+		source = &amp;fmd-&gt;csis[i].sd-&gt;entity;</div><div class='add'>+		pad = CSIS_PAD_SOURCE;</div><div class='add'>+</div><div class='add'>+		ret = __fimc_md_create_fimc_sink_links(fmd, source, NULL,</div><div class='add'>+						       pad, fimc_id++);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Create immutable links between each FIMC's subdev and video node */</div><div class='ctx'> 	flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;</div><div class='ctx'> 	for (i = 0; i &lt; FIMC_MAX_DEVS; i++) {</div><div class='ctx'> 		if (!fmd-&gt;fimc[i])</div><div class='ctx'> 			continue;</div><div class='del'>-		source = &amp;fmd-&gt;fimc[i]-&gt;vid_cap.subdev-&gt;entity;</div><div class='add'>+		source = &amp;fmd-&gt;fimc[i]-&gt;vid_cap.subdev.entity;</div><div class='ctx'> 		sink = &amp;fmd-&gt;fimc[i]-&gt;vid_cap.vfd-&gt;entity;</div><div class='ctx'> 		ret = media_entity_create_link(source, FIMC_SD_PAD_SOURCE,</div><div class='ctx'> 					      sink, 0, flags);</div><div class='hunk'>@@ -555,7 +696,7 @@ static int fimc_md_create_links(struct fimc_md *fmd)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return __fimc_md_create_flite_source_links(fmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -663,24 +804,40 @@ int fimc_md_set_camclk(struct v4l2_subdev *sd, bool on)</div><div class='ctx'> static int fimc_md_link_notify(struct media_pad *source,</div><div class='ctx'> 			       struct media_pad *sink, u32 flags)</div><div class='ctx'> {</div><div class='add'>+	struct fimc_lite *fimc_lite = NULL;</div><div class='add'>+	struct fimc_dev *fimc = NULL;</div><div class='add'>+	struct fimc_pipeline *pipeline;</div><div class='ctx'> 	struct v4l2_subdev *sd;</div><div class='del'>-	struct fimc_dev *fimc;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (media_entity_type(sink-&gt;entity) != MEDIA_ENT_T_V4L2_SUBDEV)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	sd = media_entity_to_v4l2_subdev(sink-&gt;entity);</div><div class='del'>-	fimc = v4l2_get_subdevdata(sd);</div><div class='ctx'> </div><div class='del'>-	if (!(flags &amp; MEDIA_LNK_FL_ENABLED)) {</div><div class='del'>-		ret = __fimc_pipeline_shutdown(fimc);</div><div class='del'>-		fimc-&gt;pipeline.sensor = NULL;</div><div class='del'>-		fimc-&gt;pipeline.csis = NULL;</div><div class='add'>+	switch (sd-&gt;grp_id) {</div><div class='add'>+	case FLITE_GROUP_ID:</div><div class='add'>+		fimc_lite = v4l2_get_subdevdata(sd);</div><div class='add'>+		pipeline = &amp;fimc_lite-&gt;pipeline;</div><div class='add'>+		break;</div><div class='add'>+	case FIMC_GROUP_ID:</div><div class='add'>+		fimc = v4l2_get_subdevdata(sd);</div><div class='add'>+		pipeline = &amp;fimc-&gt;pipeline;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		mutex_lock(&amp;fimc-&gt;lock);</div><div class='del'>-		fimc_ctrls_delete(fimc-&gt;vid_cap.ctx);</div><div class='del'>-		mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+	if (!(flags &amp; MEDIA_LNK_FL_ENABLED)) {</div><div class='add'>+		ret = __fimc_pipeline_shutdown(pipeline);</div><div class='add'>+		pipeline-&gt;subdevs[IDX_SENSOR] = NULL;</div><div class='add'>+		pipeline-&gt;subdevs[IDX_CSIS] = NULL;</div><div class='add'>+</div><div class='add'>+		if (fimc) {</div><div class='add'>+			mutex_lock(&amp;fimc-&gt;lock);</div><div class='add'>+			fimc_ctrls_delete(fimc-&gt;vid_cap.ctx);</div><div class='add'>+			mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+		}</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -688,14 +845,23 @@ static int fimc_md_link_notify(struct media_pad *source,</div><div class='ctx'> 	 * pipeline is already in use, i.e. its video node is opened.</div><div class='ctx'> 	 * Recreate the controls destroyed during the link deactivation.</div><div class='ctx'> 	 */</div><div class='del'>-	mutex_lock(&amp;fimc-&gt;lock);</div><div class='del'>-	if (fimc-&gt;vid_cap.refcnt &gt; 0) {</div><div class='del'>-		ret = __fimc_pipeline_initialize(fimc, source-&gt;entity, true);</div><div class='add'>+	if (fimc) {</div><div class='add'>+		mutex_lock(&amp;fimc-&gt;lock);</div><div class='add'>+		if (fimc-&gt;vid_cap.refcnt &gt; 0) {</div><div class='add'>+			ret = __fimc_pipeline_initialize(pipeline,</div><div class='add'>+							 source-&gt;entity, true);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			ret = fimc_capture_ctrls_create(fimc);</div><div class='add'>+		}</div><div class='add'>+		mutex_unlock(&amp;fimc-&gt;lock);</div><div class='add'>+	} else {</div><div class='add'>+		mutex_lock(&amp;fimc_lite-&gt;lock);</div><div class='add'>+		if (fimc_lite-&gt;ref_count &gt; 0) {</div><div class='add'>+			ret = __fimc_pipeline_initialize(pipeline,</div><div class='add'>+							 source-&gt;entity, true);</div><div class='add'>+		}</div><div class='add'>+		mutex_unlock(&amp;fimc_lite-&gt;lock);</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;fimc-&gt;lock);</div><div class='del'>-</div><div class='ctx'> 	return ret ? -EPIPE : ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -744,7 +910,7 @@ static ssize_t fimc_md_sysfs_store(struct device *dev,</div><div class='ctx'> static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO,</div><div class='ctx'> 		   fimc_md_sysfs_show, fimc_md_sysfs_store);</div><div class='ctx'> </div><div class='del'>-static int __devinit fimc_md_probe(struct platform_device *pdev)</div><div class='add'>+static int fimc_md_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct v4l2_device *v4l2_dev;</div><div class='ctx'> 	struct fimc_md *fmd;</div><div class='hunk'>@@ -776,42 +942,48 @@ static int __devinit fimc_md_probe(struct platform_device *pdev)</div><div class='ctx'> 	ret = media_device_register(&amp;fmd-&gt;media_dev);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		v4l2_err(v4l2_dev, "Failed to register media device: %d\n", ret);</div><div class='del'>-		goto err2;</div><div class='add'>+		goto err_md;</div><div class='ctx'> 	}</div><div class='ctx'> 	ret = fimc_md_get_clocks(fmd);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err3;</div><div class='add'>+		goto err_clk;</div><div class='ctx'> </div><div class='ctx'> 	fmd-&gt;user_subdev_api = false;</div><div class='add'>+</div><div class='add'>+	/* Protect the media graph while we're registering entities */</div><div class='add'>+	mutex_lock(&amp;fmd-&gt;media_dev.graph_mutex);</div><div class='add'>+</div><div class='ctx'> 	ret = fimc_md_register_platform_entities(fmd);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err3;</div><div class='add'>+		goto err_unlock;</div><div class='ctx'> </div><div class='ctx'> 	if (pdev-&gt;dev.platform_data) {</div><div class='ctx'> 		ret = fimc_md_register_sensor_entities(fmd);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto err3;</div><div class='add'>+			goto err_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> 	ret = fimc_md_create_links(fmd);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err3;</div><div class='add'>+		goto err_unlock;</div><div class='ctx'> 	ret = v4l2_device_register_subdev_nodes(&amp;fmd-&gt;v4l2_dev);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err3;</div><div class='del'>-	ret = fimc_md_register_video_nodes(fmd);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err3;</div><div class='add'>+		goto err_unlock;</div><div class='ctx'> </div><div class='ctx'> 	ret = device_create_file(&amp;pdev-&gt;dev, &amp;dev_attr_subdev_conf_mode);</div><div class='del'>-	if (!ret) {</div><div class='del'>-		platform_set_drvdata(pdev, fmd);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-err3:</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_unlock;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, fmd);</div><div class='add'>+	mutex_unlock(&amp;fmd-&gt;media_dev.graph_mutex);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unlock:</div><div class='add'>+	mutex_unlock(&amp;fmd-&gt;media_dev.graph_mutex);</div><div class='add'>+err_clk:</div><div class='ctx'> 	media_device_unregister(&amp;fmd-&gt;media_dev);</div><div class='ctx'> 	fimc_md_put_clocks(fmd);</div><div class='ctx'> 	fimc_md_unregister_entities(fmd);</div><div class='del'>-err2:</div><div class='add'>+err_md:</div><div class='ctx'> 	v4l2_device_unregister(&amp;fmd-&gt;v4l2_dev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -841,10 +1013,12 @@ static struct platform_driver fimc_md_driver = {</div><div class='ctx'> int __init fimc_md_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='add'>+</div><div class='ctx'> 	request_module("s5p-csis");</div><div class='ctx'> 	ret = fimc_register_driver();</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='add'>+</div><div class='ctx'> 	return platform_driver_register(&amp;fimc_md_driver);</div><div class='ctx'> }</div><div class='ctx'> void __exit fimc_md_exit(void)</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/fimc-mdevice.h b/drivers/media/video/s5p-fimc/fimc-mdevice.h<br/>index da3780823e7d..3b8a3492a176 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-mdevice.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-fimc/fimc-mdevice.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-mdevice.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-mdevice.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2011 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Copyright (C) 2011 - 2012 Samsung Electronics Co., Ltd.</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='hunk'>@@ -18,12 +18,15 @@</div><div class='ctx'> #include &lt;media/v4l2-subdev.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fimc-core.h"</div><div class='add'>+#include "fimc-lite.h"</div><div class='ctx'> #include "mipi-csis.h"</div><div class='ctx'> </div><div class='del'>-/* Group IDs of sensor, MIPI CSIS and the writeback subdevs. */</div><div class='add'>+/* Group IDs of sensor, MIPI-CSIS, FIMC-LITE and the writeback subdevs. */</div><div class='ctx'> #define SENSOR_GROUP_ID		(1 &lt;&lt; 8)</div><div class='ctx'> #define CSIS_GROUP_ID		(1 &lt;&lt; 9)</div><div class='ctx'> #define WRITEBACK_GROUP_ID	(1 &lt;&lt; 10)</div><div class='add'>+#define FIMC_GROUP_ID		(1 &lt;&lt; 11)</div><div class='add'>+#define FLITE_GROUP_ID		(1 &lt;&lt; 12)</div><div class='ctx'> </div><div class='ctx'> #define FIMC_MAX_SENSORS	8</div><div class='ctx'> #define FIMC_MAX_CAMCLKS	2</div><div class='hunk'>@@ -73,6 +76,7 @@ struct fimc_md {</div><div class='ctx'> 	struct fimc_sensor_info sensor[FIMC_MAX_SENSORS];</div><div class='ctx'> 	int num_sensors;</div><div class='ctx'> 	struct fimc_camclk_info camclk[FIMC_MAX_CAMCLKS];</div><div class='add'>+	struct fimc_lite *fimc_lite[FIMC_LITE_MAX_DEVS];</div><div class='ctx'> 	struct fimc_dev *fimc[FIMC_MAX_DEVS];</div><div class='ctx'> 	struct media_device media_dev;</div><div class='ctx'> 	struct v4l2_device v4l2_dev;</div><div class='hunk'>@@ -108,11 +112,11 @@ static inline void fimc_md_graph_unlock(struct fimc_dev *fimc)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int fimc_md_set_camclk(struct v4l2_subdev *sd, bool on);</div><div class='del'>-void fimc_pipeline_prepare(struct fimc_dev *fimc, struct media_entity *me);</div><div class='del'>-int fimc_pipeline_initialize(struct fimc_dev *fimc, struct media_entity *me,</div><div class='add'>+void fimc_pipeline_prepare(struct fimc_pipeline *p, struct media_entity *me);</div><div class='add'>+int fimc_pipeline_initialize(struct fimc_pipeline *p, struct media_entity *me,</div><div class='ctx'> 			     bool resume);</div><div class='del'>-int fimc_pipeline_shutdown(struct fimc_dev *fimc);</div><div class='del'>-int fimc_pipeline_s_power(struct fimc_dev *fimc, int state);</div><div class='del'>-int fimc_pipeline_s_stream(struct fimc_dev *fimc, int state);</div><div class='add'>+int fimc_pipeline_shutdown(struct fimc_pipeline *p);</div><div class='add'>+int fimc_pipeline_s_power(struct fimc_pipeline *p, bool state);</div><div class='add'>+int fimc_pipeline_s_stream(struct fimc_pipeline *p, bool state);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/fimc-reg.c b/drivers/media/video/s5p-fimc/fimc-reg.c<br/>index 15466d0529c1..1fc4ce8446f5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-reg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-fimc/fimc-reg.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-reg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-reg.c</a></div><div class='hunk'>@@ -1,9 +1,8 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Register interface file for Samsung Camera Interface (FIMC) driver</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2010 Samsung Electronics</div><div class='del'>- *</div><div class='del'>- * Sylwester Nawrocki, s.nawrocki@samsung.com</div><div class='add'>+ * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.</div><div class='add'>+ * Sylwester Nawrocki, &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License version 2 as</div><div class='hunk'>@@ -12,9 +11,9 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;mach/map.h&gt;</div><div class='ctx'> #include &lt;media/s5p_fimc.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "fimc-reg.h"</div><div class='ctx'> #include "fimc-core.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -22,19 +21,19 @@ void fimc_hw_reset(struct fimc_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	u32 cfg;</div><div class='ctx'> </div><div class='del'>-	cfg = readl(dev-&gt;regs + S5P_CISRCFMT);</div><div class='del'>-	cfg |= S5P_CISRCFMT_ITU601_8BIT;</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CISRCFMT);</div><div class='add'>+	cfg = readl(dev-&gt;regs + FIMC_REG_CISRCFMT);</div><div class='add'>+	cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CISRCFMT);</div><div class='ctx'> </div><div class='ctx'> 	/* Software reset. */</div><div class='del'>-	cfg = readl(dev-&gt;regs + S5P_CIGCTRL);</div><div class='del'>-	cfg |= (S5P_CIGCTRL_SWRST | S5P_CIGCTRL_IRQ_LEVEL);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIGCTRL);</div><div class='add'>+	cfg = readl(dev-&gt;regs + FIMC_REG_CIGCTRL);</div><div class='add'>+	cfg |= (FIMC_REG_CIGCTRL_SWRST | FIMC_REG_CIGCTRL_IRQ_LEVEL);</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIGCTRL);</div><div class='ctx'> 	udelay(10);</div><div class='ctx'> </div><div class='del'>-	cfg = readl(dev-&gt;regs + S5P_CIGCTRL);</div><div class='del'>-	cfg &amp;= ~S5P_CIGCTRL_SWRST;</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIGCTRL);</div><div class='add'>+	cfg = readl(dev-&gt;regs + FIMC_REG_CIGCTRL);</div><div class='add'>+	cfg &amp;= ~FIMC_REG_CIGCTRL_SWRST;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIGCTRL);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;variant-&gt;out_buf_count &gt; 4)</div><div class='ctx'> 		fimc_hw_set_dma_seq(dev, 0xF);</div><div class='hunk'>@@ -42,32 +41,32 @@ void fimc_hw_reset(struct fimc_dev *dev)</div><div class='ctx'> </div><div class='ctx'> static u32 fimc_hw_get_in_flip(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	u32 flip = S5P_MSCTRL_FLIP_NORMAL;</div><div class='add'>+	u32 flip = FIMC_REG_MSCTRL_FLIP_NORMAL;</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;hflip)</div><div class='del'>-		flip = S5P_MSCTRL_FLIP_X_MIRROR;</div><div class='add'>+		flip = FIMC_REG_MSCTRL_FLIP_X_MIRROR;</div><div class='ctx'> 	if (ctx-&gt;vflip)</div><div class='del'>-		flip = S5P_MSCTRL_FLIP_Y_MIRROR;</div><div class='add'>+		flip = FIMC_REG_MSCTRL_FLIP_Y_MIRROR;</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;rotation &lt;= 90)</div><div class='ctx'> 		return flip;</div><div class='ctx'> </div><div class='del'>-	return (flip ^ S5P_MSCTRL_FLIP_180) &amp; S5P_MSCTRL_FLIP_180;</div><div class='add'>+	return (flip ^ FIMC_REG_MSCTRL_FLIP_180) &amp; FIMC_REG_MSCTRL_FLIP_180;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 fimc_hw_get_target_flip(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	u32 flip = S5P_CITRGFMT_FLIP_NORMAL;</div><div class='add'>+	u32 flip = FIMC_REG_CITRGFMT_FLIP_NORMAL;</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;hflip)</div><div class='del'>-		flip |= S5P_CITRGFMT_FLIP_X_MIRROR;</div><div class='add'>+		flip |= FIMC_REG_CITRGFMT_FLIP_X_MIRROR;</div><div class='ctx'> 	if (ctx-&gt;vflip)</div><div class='del'>-		flip |= S5P_CITRGFMT_FLIP_Y_MIRROR;</div><div class='add'>+		flip |= FIMC_REG_CITRGFMT_FLIP_Y_MIRROR;</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;rotation &lt;= 90)</div><div class='ctx'> 		return flip;</div><div class='ctx'> </div><div class='del'>-	return (flip ^ S5P_CITRGFMT_FLIP_180) &amp; S5P_CITRGFMT_FLIP_180;</div><div class='add'>+	return (flip ^ FIMC_REG_CITRGFMT_FLIP_180) &amp; FIMC_REG_CITRGFMT_FLIP_180;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fimc_hw_set_rotation(struct fimc_ctx *ctx)</div><div class='hunk'>@@ -75,9 +74,9 @@ void fimc_hw_set_rotation(struct fimc_ctx *ctx)</div><div class='ctx'> 	u32 cfg, flip;</div><div class='ctx'> 	struct fimc_dev *dev = ctx-&gt;fimc_dev;</div><div class='ctx'> </div><div class='del'>-	cfg = readl(dev-&gt;regs + S5P_CITRGFMT);</div><div class='del'>-	cfg &amp;= ~(S5P_CITRGFMT_INROT90 | S5P_CITRGFMT_OUTROT90 |</div><div class='del'>-		 S5P_CITRGFMT_FLIP_180);</div><div class='add'>+	cfg = readl(dev-&gt;regs + FIMC_REG_CITRGFMT);</div><div class='add'>+	cfg &amp;= ~(FIMC_REG_CITRGFMT_INROT90 | FIMC_REG_CITRGFMT_OUTROT90 |</div><div class='add'>+		 FIMC_REG_CITRGFMT_FLIP_180);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The input and output rotator cannot work simultaneously.</div><div class='hunk'>@@ -85,21 +84,21 @@ void fimc_hw_set_rotation(struct fimc_ctx *ctx)</div><div class='ctx'> 	 * in direct fifo output mode.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (ctx-&gt;rotation == 90 || ctx-&gt;rotation == 270) {</div><div class='del'>-		if (ctx-&gt;out_path == FIMC_LCDFIFO)</div><div class='del'>-			cfg |= S5P_CITRGFMT_INROT90;</div><div class='add'>+		if (ctx-&gt;out_path == FIMC_IO_LCDFIFO)</div><div class='add'>+			cfg |= FIMC_REG_CITRGFMT_INROT90;</div><div class='ctx'> 		else</div><div class='del'>-			cfg |= S5P_CITRGFMT_OUTROT90;</div><div class='add'>+			cfg |= FIMC_REG_CITRGFMT_OUTROT90;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;out_path == FIMC_DMA) {</div><div class='add'>+	if (ctx-&gt;out_path == FIMC_IO_DMA) {</div><div class='ctx'> 		cfg |= fimc_hw_get_target_flip(ctx);</div><div class='del'>-		writel(cfg, dev-&gt;regs + S5P_CITRGFMT);</div><div class='add'>+		writel(cfg, dev-&gt;regs + FIMC_REG_CITRGFMT);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* LCD FIFO path */</div><div class='del'>-		flip = readl(dev-&gt;regs + S5P_MSCTRL);</div><div class='del'>-		flip &amp;= ~S5P_MSCTRL_FLIP_MASK;</div><div class='add'>+		flip = readl(dev-&gt;regs + FIMC_REG_MSCTRL);</div><div class='add'>+		flip &amp;= ~FIMC_REG_MSCTRL_FLIP_MASK;</div><div class='ctx'> 		flip |= fimc_hw_get_in_flip(ctx);</div><div class='del'>-		writel(flip, dev-&gt;regs + S5P_MSCTRL);</div><div class='add'>+		writel(flip, dev-&gt;regs + FIMC_REG_MSCTRL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -110,43 +109,40 @@ void fimc_hw_set_target_format(struct fimc_ctx *ctx)</div><div class='ctx'> 	struct fimc_frame *frame = &amp;ctx-&gt;d_frame;</div><div class='ctx'> </div><div class='ctx'> 	dbg("w= %d, h= %d color: %d", frame-&gt;width,</div><div class='del'>-		frame-&gt;height, frame-&gt;fmt-&gt;color);</div><div class='add'>+	    frame-&gt;height, frame-&gt;fmt-&gt;color);</div><div class='ctx'> </div><div class='del'>-	cfg = readl(dev-&gt;regs + S5P_CITRGFMT);</div><div class='del'>-	cfg &amp;= ~(S5P_CITRGFMT_FMT_MASK | S5P_CITRGFMT_HSIZE_MASK |</div><div class='del'>-		  S5P_CITRGFMT_VSIZE_MASK);</div><div class='add'>+	cfg = readl(dev-&gt;regs + FIMC_REG_CITRGFMT);</div><div class='add'>+	cfg &amp;= ~(FIMC_REG_CITRGFMT_FMT_MASK | FIMC_REG_CITRGFMT_HSIZE_MASK |</div><div class='add'>+		 FIMC_REG_CITRGFMT_VSIZE_MASK);</div><div class='ctx'> </div><div class='ctx'> 	switch (frame-&gt;fmt-&gt;color) {</div><div class='del'>-	case S5P_FIMC_RGB444...S5P_FIMC_RGB888:</div><div class='del'>-		cfg |= S5P_CITRGFMT_RGB;</div><div class='add'>+	case FIMC_FMT_RGB444...FIMC_FMT_RGB888:</div><div class='add'>+		cfg |= FIMC_REG_CITRGFMT_RGB;</div><div class='ctx'> 		break;</div><div class='del'>-	case S5P_FIMC_YCBCR420:</div><div class='del'>-		cfg |= S5P_CITRGFMT_YCBCR420;</div><div class='add'>+	case FIMC_FMT_YCBCR420:</div><div class='add'>+		cfg |= FIMC_REG_CITRGFMT_YCBCR420;</div><div class='ctx'> 		break;</div><div class='del'>-	case S5P_FIMC_YCBYCR422...S5P_FIMC_CRYCBY422:</div><div class='add'>+	case FIMC_FMT_YCBYCR422...FIMC_FMT_CRYCBY422:</div><div class='ctx'> 		if (frame-&gt;fmt-&gt;colplanes == 1)</div><div class='del'>-			cfg |= S5P_CITRGFMT_YCBCR422_1P;</div><div class='add'>+			cfg |= FIMC_REG_CITRGFMT_YCBCR422_1P;</div><div class='ctx'> 		else</div><div class='del'>-			cfg |= S5P_CITRGFMT_YCBCR422;</div><div class='add'>+			cfg |= FIMC_REG_CITRGFMT_YCBCR422;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;rotation == 90 || ctx-&gt;rotation == 270) {</div><div class='del'>-		cfg |= S5P_CITRGFMT_HSIZE(frame-&gt;height);</div><div class='del'>-		cfg |= S5P_CITRGFMT_VSIZE(frame-&gt;width);</div><div class='del'>-	} else {</div><div class='del'>-</div><div class='del'>-		cfg |= S5P_CITRGFMT_HSIZE(frame-&gt;width);</div><div class='del'>-		cfg |= S5P_CITRGFMT_VSIZE(frame-&gt;height);</div><div class='del'>-	}</div><div class='add'>+	if (ctx-&gt;rotation == 90 || ctx-&gt;rotation == 270)</div><div class='add'>+		cfg |= (frame-&gt;height &lt;&lt; 16) | frame-&gt;width;</div><div class='add'>+	else</div><div class='add'>+		cfg |= (frame-&gt;width &lt;&lt; 16) | frame-&gt;height;</div><div class='ctx'> </div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CITRGFMT);</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CITRGFMT);</div><div class='ctx'> </div><div class='del'>-	cfg = readl(dev-&gt;regs + S5P_CITAREA) &amp; ~S5P_CITAREA_MASK;</div><div class='add'>+	cfg = readl(dev-&gt;regs + FIMC_REG_CITAREA);</div><div class='add'>+	cfg &amp;= ~FIMC_REG_CITAREA_MASK;</div><div class='ctx'> 	cfg |= (frame-&gt;width * frame-&gt;height);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CITAREA);</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CITAREA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fimc_hw_set_out_dma_size(struct fimc_ctx *ctx)</div><div class='hunk'>@@ -155,87 +151,82 @@ static void fimc_hw_set_out_dma_size(struct fimc_ctx *ctx)</div><div class='ctx'> 	struct fimc_frame *frame = &amp;ctx-&gt;d_frame;</div><div class='ctx'> 	u32 cfg;</div><div class='ctx'> </div><div class='del'>-	cfg = S5P_ORIG_SIZE_HOR(frame-&gt;f_width);</div><div class='del'>-	cfg |= S5P_ORIG_SIZE_VER(frame-&gt;f_height);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_ORGOSIZE);</div><div class='add'>+	cfg = (frame-&gt;f_height &lt;&lt; 16) | frame-&gt;f_width;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_ORGOSIZE);</div><div class='ctx'> </div><div class='ctx'> 	/* Select color space conversion equation (HD/SD size).*/</div><div class='del'>-	cfg = readl(dev-&gt;regs + S5P_CIGCTRL);</div><div class='add'>+	cfg = readl(dev-&gt;regs + FIMC_REG_CIGCTRL);</div><div class='ctx'> 	if (frame-&gt;f_width &gt;= 1280) /* HD */</div><div class='del'>-		cfg |= S5P_CIGCTRL_CSC_ITU601_709;</div><div class='add'>+		cfg |= FIMC_REG_CIGCTRL_CSC_ITU601_709;</div><div class='ctx'> 	else	/* SD */</div><div class='del'>-		cfg &amp;= ~S5P_CIGCTRL_CSC_ITU601_709;</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIGCTRL);</div><div class='add'>+		cfg &amp;= ~FIMC_REG_CIGCTRL_CSC_ITU601_709;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIGCTRL);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fimc_hw_set_out_dma(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	u32 cfg;</div><div class='ctx'> 	struct fimc_dev *dev = ctx-&gt;fimc_dev;</div><div class='ctx'> 	struct fimc_frame *frame = &amp;ctx-&gt;d_frame;</div><div class='ctx'> 	struct fimc_dma_offset *offset = &amp;frame-&gt;dma_offset;</div><div class='ctx'> 	struct fimc_fmt *fmt = frame-&gt;fmt;</div><div class='add'>+	u32 cfg;</div><div class='ctx'> </div><div class='ctx'> 	/* Set the input dma offsets. */</div><div class='del'>-	cfg = 0;</div><div class='del'>-	cfg |= S5P_CIO_OFFS_HOR(offset-&gt;y_h);</div><div class='del'>-	cfg |= S5P_CIO_OFFS_VER(offset-&gt;y_v);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIOYOFF);</div><div class='add'>+	cfg = (offset-&gt;y_v &lt;&lt; 16) | offset-&gt;y_h;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIOYOFF);</div><div class='ctx'> </div><div class='del'>-	cfg = 0;</div><div class='del'>-	cfg |= S5P_CIO_OFFS_HOR(offset-&gt;cb_h);</div><div class='del'>-	cfg |= S5P_CIO_OFFS_VER(offset-&gt;cb_v);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIOCBOFF);</div><div class='add'>+	cfg = (offset-&gt;cb_v &lt;&lt; 16) | offset-&gt;cb_h;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIOCBOFF);</div><div class='ctx'> </div><div class='del'>-	cfg = 0;</div><div class='del'>-	cfg |= S5P_CIO_OFFS_HOR(offset-&gt;cr_h);</div><div class='del'>-	cfg |= S5P_CIO_OFFS_VER(offset-&gt;cr_v);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIOCROFF);</div><div class='add'>+	cfg = (offset-&gt;cr_v &lt;&lt; 16) | offset-&gt;cr_h;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIOCROFF);</div><div class='ctx'> </div><div class='ctx'> 	fimc_hw_set_out_dma_size(ctx);</div><div class='ctx'> </div><div class='ctx'> 	/* Configure chroma components order. */</div><div class='del'>-	cfg = readl(dev-&gt;regs + S5P_CIOCTRL);</div><div class='add'>+	cfg = readl(dev-&gt;regs + FIMC_REG_CIOCTRL);</div><div class='ctx'> </div><div class='del'>-	cfg &amp;= ~(S5P_CIOCTRL_ORDER2P_MASK | S5P_CIOCTRL_ORDER422_MASK |</div><div class='del'>-		 S5P_CIOCTRL_YCBCR_PLANE_MASK | S5P_CIOCTRL_RGB16FMT_MASK);</div><div class='add'>+	cfg &amp;= ~(FIMC_REG_CIOCTRL_ORDER2P_MASK |</div><div class='add'>+		 FIMC_REG_CIOCTRL_ORDER422_MASK |</div><div class='add'>+		 FIMC_REG_CIOCTRL_YCBCR_PLANE_MASK |</div><div class='add'>+		 FIMC_REG_CIOCTRL_RGB16FMT_MASK);</div><div class='ctx'> </div><div class='ctx'> 	if (fmt-&gt;colplanes == 1)</div><div class='ctx'> 		cfg |= ctx-&gt;out_order_1p;</div><div class='ctx'> 	else if (fmt-&gt;colplanes == 2)</div><div class='del'>-		cfg |= ctx-&gt;out_order_2p | S5P_CIOCTRL_YCBCR_2PLANE;</div><div class='add'>+		cfg |= ctx-&gt;out_order_2p | FIMC_REG_CIOCTRL_YCBCR_2PLANE;</div><div class='ctx'> 	else if (fmt-&gt;colplanes == 3)</div><div class='del'>-		cfg |= S5P_CIOCTRL_YCBCR_3PLANE;</div><div class='add'>+		cfg |= FIMC_REG_CIOCTRL_YCBCR_3PLANE;</div><div class='ctx'> </div><div class='del'>-	if (fmt-&gt;color == S5P_FIMC_RGB565)</div><div class='del'>-		cfg |= S5P_CIOCTRL_RGB565;</div><div class='del'>-	else if (fmt-&gt;color == S5P_FIMC_RGB555)</div><div class='del'>-		cfg |= S5P_CIOCTRL_ARGB1555;</div><div class='del'>-	else if (fmt-&gt;color == S5P_FIMC_RGB444)</div><div class='del'>-		cfg |= S5P_CIOCTRL_ARGB4444;</div><div class='add'>+	if (fmt-&gt;color == FIMC_FMT_RGB565)</div><div class='add'>+		cfg |= FIMC_REG_CIOCTRL_RGB565;</div><div class='add'>+	else if (fmt-&gt;color == FIMC_FMT_RGB555)</div><div class='add'>+		cfg |= FIMC_REG_CIOCTRL_ARGB1555;</div><div class='add'>+	else if (fmt-&gt;color == FIMC_FMT_RGB444)</div><div class='add'>+		cfg |= FIMC_REG_CIOCTRL_ARGB4444;</div><div class='ctx'> </div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIOCTRL);</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIOCTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fimc_hw_en_autoload(struct fimc_dev *dev, int enable)</div><div class='ctx'> {</div><div class='del'>-	u32 cfg = readl(dev-&gt;regs + S5P_ORGISIZE);</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FIMC_REG_ORGISIZE);</div><div class='ctx'> 	if (enable)</div><div class='del'>-		cfg |= S5P_CIREAL_ISIZE_AUTOLOAD_EN;</div><div class='add'>+		cfg |= FIMC_REG_CIREAL_ISIZE_AUTOLOAD_EN;</div><div class='ctx'> 	else</div><div class='del'>-		cfg &amp;= ~S5P_CIREAL_ISIZE_AUTOLOAD_EN;</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_ORGISIZE);</div><div class='add'>+		cfg &amp;= ~FIMC_REG_CIREAL_ISIZE_AUTOLOAD_EN;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_ORGISIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fimc_hw_en_lastirq(struct fimc_dev *dev, int enable)</div><div class='ctx'> {</div><div class='del'>-	u32 cfg = readl(dev-&gt;regs + S5P_CIOCTRL);</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FIMC_REG_CIOCTRL);</div><div class='ctx'> 	if (enable)</div><div class='del'>-		cfg |= S5P_CIOCTRL_LASTIRQ_ENABLE;</div><div class='add'>+		cfg |= FIMC_REG_CIOCTRL_LASTIRQ_ENABLE;</div><div class='ctx'> 	else</div><div class='del'>-		cfg &amp;= ~S5P_CIOCTRL_LASTIRQ_ENABLE;</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIOCTRL);</div><div class='add'>+		cfg &amp;= ~FIMC_REG_CIOCTRL_LASTIRQ_ENABLE;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIOCTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fimc_hw_set_prescaler(struct fimc_ctx *ctx)</div><div class='hunk'>@@ -245,15 +236,13 @@ void fimc_hw_set_prescaler(struct fimc_ctx *ctx)</div><div class='ctx'> 	u32 cfg, shfactor;</div><div class='ctx'> </div><div class='ctx'> 	shfactor = 10 - (sc-&gt;hfactor + sc-&gt;vfactor);</div><div class='add'>+	cfg = shfactor &lt;&lt; 28;</div><div class='ctx'> </div><div class='del'>-	cfg = S5P_CISCPRERATIO_SHFACTOR(shfactor);</div><div class='del'>-	cfg |= S5P_CISCPRERATIO_HOR(sc-&gt;pre_hratio);</div><div class='del'>-	cfg |= S5P_CISCPRERATIO_VER(sc-&gt;pre_vratio);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CISCPRERATIO);</div><div class='add'>+	cfg |= (sc-&gt;pre_hratio &lt;&lt; 16) | sc-&gt;pre_vratio;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CISCPRERATIO);</div><div class='ctx'> </div><div class='del'>-	cfg = S5P_CISCPREDST_WIDTH(sc-&gt;pre_dst_width);</div><div class='del'>-	cfg |= S5P_CISCPREDST_HEIGHT(sc-&gt;pre_dst_height);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CISCPREDST);</div><div class='add'>+	cfg = (sc-&gt;pre_dst_width &lt;&lt; 16) | sc-&gt;pre_dst_height;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CISCPREDST);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fimc_hw_set_scaler(struct fimc_ctx *ctx)</div><div class='hunk'>@@ -263,93 +252,95 @@ static void fimc_hw_set_scaler(struct fimc_ctx *ctx)</div><div class='ctx'> 	struct fimc_frame *src_frame = &amp;ctx-&gt;s_frame;</div><div class='ctx'> 	struct fimc_frame *dst_frame = &amp;ctx-&gt;d_frame;</div><div class='ctx'> </div><div class='del'>-	u32 cfg = readl(dev-&gt;regs + S5P_CISCCTRL);</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FIMC_REG_CISCCTRL);</div><div class='ctx'> </div><div class='del'>-	cfg &amp;= ~(S5P_CISCCTRL_CSCR2Y_WIDE | S5P_CISCCTRL_CSCY2R_WIDE |</div><div class='del'>-		 S5P_CISCCTRL_SCALEUP_H | S5P_CISCCTRL_SCALEUP_V |</div><div class='del'>-		 S5P_CISCCTRL_SCALERBYPASS | S5P_CISCCTRL_ONE2ONE |</div><div class='del'>-		 S5P_CISCCTRL_INRGB_FMT_MASK | S5P_CISCCTRL_OUTRGB_FMT_MASK |</div><div class='del'>-		 S5P_CISCCTRL_INTERLACE | S5P_CISCCTRL_RGB_EXT);</div><div class='add'>+	cfg &amp;= ~(FIMC_REG_CISCCTRL_CSCR2Y_WIDE | FIMC_REG_CISCCTRL_CSCY2R_WIDE |</div><div class='add'>+		 FIMC_REG_CISCCTRL_SCALEUP_H | FIMC_REG_CISCCTRL_SCALEUP_V |</div><div class='add'>+		 FIMC_REG_CISCCTRL_SCALERBYPASS | FIMC_REG_CISCCTRL_ONE2ONE |</div><div class='add'>+		 FIMC_REG_CISCCTRL_INRGB_FMT_MASK | FIMC_REG_CISCCTRL_OUTRGB_FMT_MASK |</div><div class='add'>+		 FIMC_REG_CISCCTRL_INTERLACE | FIMC_REG_CISCCTRL_RGB_EXT);</div><div class='ctx'> </div><div class='ctx'> 	if (!(ctx-&gt;flags &amp; FIMC_COLOR_RANGE_NARROW))</div><div class='del'>-		cfg |= (S5P_CISCCTRL_CSCR2Y_WIDE | S5P_CISCCTRL_CSCY2R_WIDE);</div><div class='add'>+		cfg |= (FIMC_REG_CISCCTRL_CSCR2Y_WIDE |</div><div class='add'>+			FIMC_REG_CISCCTRL_CSCY2R_WIDE);</div><div class='ctx'> </div><div class='ctx'> 	if (!sc-&gt;enabled)</div><div class='del'>-		cfg |= S5P_CISCCTRL_SCALERBYPASS;</div><div class='add'>+		cfg |= FIMC_REG_CISCCTRL_SCALERBYPASS;</div><div class='ctx'> </div><div class='ctx'> 	if (sc-&gt;scaleup_h)</div><div class='del'>-		cfg |= S5P_CISCCTRL_SCALEUP_H;</div><div class='add'>+		cfg |= FIMC_REG_CISCCTRL_SCALEUP_H;</div><div class='ctx'> </div><div class='ctx'> 	if (sc-&gt;scaleup_v)</div><div class='del'>-		cfg |= S5P_CISCCTRL_SCALEUP_V;</div><div class='add'>+		cfg |= FIMC_REG_CISCCTRL_SCALEUP_V;</div><div class='ctx'> </div><div class='ctx'> 	if (sc-&gt;copy_mode)</div><div class='del'>-		cfg |= S5P_CISCCTRL_ONE2ONE;</div><div class='add'>+		cfg |= FIMC_REG_CISCCTRL_ONE2ONE;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;in_path == FIMC_DMA) {</div><div class='add'>+	if (ctx-&gt;in_path == FIMC_IO_DMA) {</div><div class='ctx'> 		switch (src_frame-&gt;fmt-&gt;color) {</div><div class='del'>-		case S5P_FIMC_RGB565:</div><div class='del'>-			cfg |= S5P_CISCCTRL_INRGB_FMT_RGB565;</div><div class='add'>+		case FIMC_FMT_RGB565:</div><div class='add'>+			cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB565;</div><div class='ctx'> 			break;</div><div class='del'>-		case S5P_FIMC_RGB666:</div><div class='del'>-			cfg |= S5P_CISCCTRL_INRGB_FMT_RGB666;</div><div class='add'>+		case FIMC_FMT_RGB666:</div><div class='add'>+			cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB666;</div><div class='ctx'> 			break;</div><div class='del'>-		case S5P_FIMC_RGB888:</div><div class='del'>-			cfg |= S5P_CISCCTRL_INRGB_FMT_RGB888;</div><div class='add'>+		case FIMC_FMT_RGB888:</div><div class='add'>+			cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB888;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;out_path == FIMC_DMA) {</div><div class='add'>+	if (ctx-&gt;out_path == FIMC_IO_DMA) {</div><div class='ctx'> 		u32 color = dst_frame-&gt;fmt-&gt;color;</div><div class='ctx'> </div><div class='del'>-		if (color &gt;= S5P_FIMC_RGB444 &amp;&amp; color &lt;= S5P_FIMC_RGB565)</div><div class='del'>-			cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB565;</div><div class='del'>-		else if (color == S5P_FIMC_RGB666)</div><div class='del'>-			cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB666;</div><div class='del'>-		else if (color == S5P_FIMC_RGB888)</div><div class='del'>-			cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB888;</div><div class='add'>+		if (color &gt;= FIMC_FMT_RGB444 &amp;&amp; color &lt;= FIMC_FMT_RGB565)</div><div class='add'>+			cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB565;</div><div class='add'>+		else if (color == FIMC_FMT_RGB666)</div><div class='add'>+			cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB666;</div><div class='add'>+		else if (color == FIMC_FMT_RGB888)</div><div class='add'>+			cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB888;</div><div class='ctx'> 	} else {</div><div class='del'>-		cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB888;</div><div class='add'>+		cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB888;</div><div class='ctx'> </div><div class='ctx'> 		if (ctx-&gt;flags &amp; FIMC_SCAN_MODE_INTERLACED)</div><div class='del'>-			cfg |= S5P_CISCCTRL_INTERLACE;</div><div class='add'>+			cfg |= FIMC_REG_CISCCTRL_INTERLACE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CISCCTRL);</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CISCCTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fimc_hw_set_mainscaler(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *dev = ctx-&gt;fimc_dev;</div><div class='del'>-	struct samsung_fimc_variant *variant = dev-&gt;variant;</div><div class='add'>+	struct fimc_variant *variant = dev-&gt;variant;</div><div class='ctx'> 	struct fimc_scaler *sc = &amp;ctx-&gt;scaler;</div><div class='ctx'> 	u32 cfg;</div><div class='ctx'> </div><div class='ctx'> 	dbg("main_hratio= 0x%X  main_vratio= 0x%X",</div><div class='del'>-		sc-&gt;main_hratio, sc-&gt;main_vratio);</div><div class='add'>+	    sc-&gt;main_hratio, sc-&gt;main_vratio);</div><div class='ctx'> </div><div class='ctx'> 	fimc_hw_set_scaler(ctx);</div><div class='ctx'> </div><div class='del'>-	cfg = readl(dev-&gt;regs + S5P_CISCCTRL);</div><div class='del'>-	cfg &amp;= ~(S5P_CISCCTRL_MHRATIO_MASK | S5P_CISCCTRL_MVRATIO_MASK);</div><div class='add'>+	cfg = readl(dev-&gt;regs + FIMC_REG_CISCCTRL);</div><div class='add'>+	cfg &amp;= ~(FIMC_REG_CISCCTRL_MHRATIO_MASK |</div><div class='add'>+		 FIMC_REG_CISCCTRL_MVRATIO_MASK);</div><div class='ctx'> </div><div class='ctx'> 	if (variant-&gt;has_mainscaler_ext) {</div><div class='del'>-		cfg |= S5P_CISCCTRL_MHRATIO_EXT(sc-&gt;main_hratio);</div><div class='del'>-		cfg |= S5P_CISCCTRL_MVRATIO_EXT(sc-&gt;main_vratio);</div><div class='del'>-		writel(cfg, dev-&gt;regs + S5P_CISCCTRL);</div><div class='add'>+		cfg |= FIMC_REG_CISCCTRL_MHRATIO_EXT(sc-&gt;main_hratio);</div><div class='add'>+		cfg |= FIMC_REG_CISCCTRL_MVRATIO_EXT(sc-&gt;main_vratio);</div><div class='add'>+		writel(cfg, dev-&gt;regs + FIMC_REG_CISCCTRL);</div><div class='ctx'> </div><div class='del'>-		cfg = readl(dev-&gt;regs + S5P_CIEXTEN);</div><div class='add'>+		cfg = readl(dev-&gt;regs + FIMC_REG_CIEXTEN);</div><div class='ctx'> </div><div class='del'>-		cfg &amp;= ~(S5P_CIEXTEN_MVRATIO_EXT_MASK |</div><div class='del'>-			 S5P_CIEXTEN_MHRATIO_EXT_MASK);</div><div class='del'>-		cfg |= S5P_CIEXTEN_MHRATIO_EXT(sc-&gt;main_hratio);</div><div class='del'>-		cfg |= S5P_CIEXTEN_MVRATIO_EXT(sc-&gt;main_vratio);</div><div class='del'>-		writel(cfg, dev-&gt;regs + S5P_CIEXTEN);</div><div class='add'>+		cfg &amp;= ~(FIMC_REG_CIEXTEN_MVRATIO_EXT_MASK |</div><div class='add'>+			 FIMC_REG_CIEXTEN_MHRATIO_EXT_MASK);</div><div class='add'>+		cfg |= FIMC_REG_CIEXTEN_MHRATIO_EXT(sc-&gt;main_hratio);</div><div class='add'>+		cfg |= FIMC_REG_CIEXTEN_MVRATIO_EXT(sc-&gt;main_vratio);</div><div class='add'>+		writel(cfg, dev-&gt;regs + FIMC_REG_CIEXTEN);</div><div class='ctx'> 	} else {</div><div class='del'>-		cfg |= S5P_CISCCTRL_MHRATIO(sc-&gt;main_hratio);</div><div class='del'>-		cfg |= S5P_CISCCTRL_MVRATIO(sc-&gt;main_vratio);</div><div class='del'>-		writel(cfg, dev-&gt;regs + S5P_CISCCTRL);</div><div class='add'>+		cfg |= FIMC_REG_CISCCTRL_MHRATIO(sc-&gt;main_hratio);</div><div class='add'>+		cfg |= FIMC_REG_CISCCTRL_MVRATIO(sc-&gt;main_vratio);</div><div class='add'>+		writel(cfg, dev-&gt;regs + FIMC_REG_CISCCTRL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -357,40 +348,41 @@ void fimc_hw_en_capture(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *dev = ctx-&gt;fimc_dev;</div><div class='ctx'> </div><div class='del'>-	u32 cfg = readl(dev-&gt;regs + S5P_CIIMGCPT);</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FIMC_REG_CIIMGCPT);</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;out_path == FIMC_DMA) {</div><div class='add'>+	if (ctx-&gt;out_path == FIMC_IO_DMA) {</div><div class='ctx'> 		/* one shot mode */</div><div class='del'>-		cfg |= S5P_CIIMGCPT_CPT_FREN_ENABLE | S5P_CIIMGCPT_IMGCPTEN;</div><div class='add'>+		cfg |= FIMC_REG_CIIMGCPT_CPT_FREN_ENABLE |</div><div class='add'>+			FIMC_REG_CIIMGCPT_IMGCPTEN;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Continuous frame capture mode (freerun). */</div><div class='del'>-		cfg &amp;= ~(S5P_CIIMGCPT_CPT_FREN_ENABLE |</div><div class='del'>-			 S5P_CIIMGCPT_CPT_FRMOD_CNT);</div><div class='del'>-		cfg |= S5P_CIIMGCPT_IMGCPTEN;</div><div class='add'>+		cfg &amp;= ~(FIMC_REG_CIIMGCPT_CPT_FREN_ENABLE |</div><div class='add'>+			 FIMC_REG_CIIMGCPT_CPT_FRMOD_CNT);</div><div class='add'>+		cfg |= FIMC_REG_CIIMGCPT_IMGCPTEN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;scaler.enabled)</div><div class='del'>-		cfg |= S5P_CIIMGCPT_IMGCPTEN_SC;</div><div class='add'>+		cfg |= FIMC_REG_CIIMGCPT_IMGCPTEN_SC;</div><div class='ctx'> </div><div class='del'>-	writel(cfg | S5P_CIIMGCPT_IMGCPTEN, dev-&gt;regs + S5P_CIIMGCPT);</div><div class='add'>+	cfg |= FIMC_REG_CIIMGCPT_IMGCPTEN;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIIMGCPT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void fimc_hw_set_effect(struct fimc_ctx *ctx, bool active)</div><div class='add'>+void fimc_hw_set_effect(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *dev = ctx-&gt;fimc_dev;</div><div class='ctx'> 	struct fimc_effect *effect = &amp;ctx-&gt;effect;</div><div class='ctx'> 	u32 cfg = 0;</div><div class='ctx'> </div><div class='del'>-	if (active) {</div><div class='del'>-		cfg |= S5P_CIIMGEFF_IE_SC_AFTER | S5P_CIIMGEFF_IE_ENABLE;</div><div class='add'>+	if (effect-&gt;type != FIMC_REG_CIIMGEFF_FIN_BYPASS) {</div><div class='add'>+		cfg |= FIMC_REG_CIIMGEFF_IE_SC_AFTER |</div><div class='add'>+			FIMC_REG_CIIMGEFF_IE_ENABLE;</div><div class='ctx'> 		cfg |= effect-&gt;type;</div><div class='del'>-		if (effect-&gt;type == S5P_FIMC_EFFECT_ARBITRARY) {</div><div class='del'>-			cfg |= S5P_CIIMGEFF_PAT_CB(effect-&gt;pat_cb);</div><div class='del'>-			cfg |= S5P_CIIMGEFF_PAT_CR(effect-&gt;pat_cr);</div><div class='del'>-		}</div><div class='add'>+		if (effect-&gt;type == FIMC_REG_CIIMGEFF_FIN_ARBITRARY)</div><div class='add'>+			cfg |= (effect-&gt;pat_cb &lt;&lt; 13) | effect-&gt;pat_cr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIIMGEFF);</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIIMGEFF);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fimc_hw_set_rgb_alpha(struct fimc_ctx *ctx)</div><div class='hunk'>@@ -402,10 +394,10 @@ void fimc_hw_set_rgb_alpha(struct fimc_ctx *ctx)</div><div class='ctx'> 	if (!(frame-&gt;fmt-&gt;flags &amp; FMT_HAS_ALPHA))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	cfg = readl(dev-&gt;regs + S5P_CIOCTRL);</div><div class='del'>-	cfg &amp;= ~S5P_CIOCTRL_ALPHA_OUT_MASK;</div><div class='add'>+	cfg = readl(dev-&gt;regs + FIMC_REG_CIOCTRL);</div><div class='add'>+	cfg &amp;= ~FIMC_REG_CIOCTRL_ALPHA_OUT_MASK;</div><div class='ctx'> 	cfg |= (frame-&gt;alpha &lt;&lt; 4);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIOCTRL);</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIOCTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fimc_hw_set_in_dma_size(struct fimc_ctx *ctx)</div><div class='hunk'>@@ -415,16 +407,14 @@ static void fimc_hw_set_in_dma_size(struct fimc_ctx *ctx)</div><div class='ctx'> 	u32 cfg_o = 0;</div><div class='ctx'> 	u32 cfg_r = 0;</div><div class='ctx'> </div><div class='del'>-	if (FIMC_LCDFIFO == ctx-&gt;out_path)</div><div class='del'>-		cfg_r |= S5P_CIREAL_ISIZE_AUTOLOAD_EN;</div><div class='add'>+	if (FIMC_IO_LCDFIFO == ctx-&gt;out_path)</div><div class='add'>+		cfg_r |= FIMC_REG_CIREAL_ISIZE_AUTOLOAD_EN;</div><div class='ctx'> </div><div class='del'>-	cfg_o |= S5P_ORIG_SIZE_HOR(frame-&gt;f_width);</div><div class='del'>-	cfg_o |= S5P_ORIG_SIZE_VER(frame-&gt;f_height);</div><div class='del'>-	cfg_r |= S5P_CIREAL_ISIZE_WIDTH(frame-&gt;width);</div><div class='del'>-	cfg_r |= S5P_CIREAL_ISIZE_HEIGHT(frame-&gt;height);</div><div class='add'>+	cfg_o |= (frame-&gt;f_height &lt;&lt; 16) | frame-&gt;f_width;</div><div class='add'>+	cfg_r |= (frame-&gt;height &lt;&lt; 16) | frame-&gt;width;</div><div class='ctx'> </div><div class='del'>-	writel(cfg_o, dev-&gt;regs + S5P_ORGISIZE);</div><div class='del'>-	writel(cfg_r, dev-&gt;regs + S5P_CIREAL_ISIZE);</div><div class='add'>+	writel(cfg_o, dev-&gt;regs + FIMC_REG_ORGISIZE);</div><div class='add'>+	writel(cfg_r, dev-&gt;regs + FIMC_REG_CIREAL_ISIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fimc_hw_set_in_dma(struct fimc_ctx *ctx)</div><div class='hunk'>@@ -435,80 +425,77 @@ void fimc_hw_set_in_dma(struct fimc_ctx *ctx)</div><div class='ctx'> 	u32 cfg;</div><div class='ctx'> </div><div class='ctx'> 	/* Set the pixel offsets. */</div><div class='del'>-	cfg = S5P_CIO_OFFS_HOR(offset-&gt;y_h);</div><div class='del'>-	cfg |= S5P_CIO_OFFS_VER(offset-&gt;y_v);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIIYOFF);</div><div class='add'>+	cfg = (offset-&gt;y_v &lt;&lt; 16) | offset-&gt;y_h;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIIYOFF);</div><div class='ctx'> </div><div class='del'>-	cfg = S5P_CIO_OFFS_HOR(offset-&gt;cb_h);</div><div class='del'>-	cfg |= S5P_CIO_OFFS_VER(offset-&gt;cb_v);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIICBOFF);</div><div class='add'>+	cfg = (offset-&gt;cb_v &lt;&lt; 16) | offset-&gt;cb_h;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIICBOFF);</div><div class='ctx'> </div><div class='del'>-	cfg = S5P_CIO_OFFS_HOR(offset-&gt;cr_h);</div><div class='del'>-	cfg |= S5P_CIO_OFFS_VER(offset-&gt;cr_v);</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIICROFF);</div><div class='add'>+	cfg = (offset-&gt;cr_v &lt;&lt; 16) | offset-&gt;cr_h;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIICROFF);</div><div class='ctx'> </div><div class='ctx'> 	/* Input original and real size. */</div><div class='ctx'> 	fimc_hw_set_in_dma_size(ctx);</div><div class='ctx'> </div><div class='ctx'> 	/* Use DMA autoload only in FIFO mode. */</div><div class='del'>-	fimc_hw_en_autoload(dev, ctx-&gt;out_path == FIMC_LCDFIFO);</div><div class='add'>+	fimc_hw_en_autoload(dev, ctx-&gt;out_path == FIMC_IO_LCDFIFO);</div><div class='ctx'> </div><div class='ctx'> 	/* Set the input DMA to process single frame only. */</div><div class='del'>-	cfg = readl(dev-&gt;regs + S5P_MSCTRL);</div><div class='del'>-	cfg &amp;= ~(S5P_MSCTRL_INFORMAT_MASK</div><div class='del'>-		| S5P_MSCTRL_IN_BURST_COUNT_MASK</div><div class='del'>-		| S5P_MSCTRL_INPUT_MASK</div><div class='del'>-		| S5P_MSCTRL_C_INT_IN_MASK</div><div class='del'>-		| S5P_MSCTRL_2P_IN_ORDER_MASK);</div><div class='add'>+	cfg = readl(dev-&gt;regs + FIMC_REG_MSCTRL);</div><div class='add'>+	cfg &amp;= ~(FIMC_REG_MSCTRL_INFORMAT_MASK</div><div class='add'>+		 | FIMC_REG_MSCTRL_IN_BURST_COUNT_MASK</div><div class='add'>+		 | FIMC_REG_MSCTRL_INPUT_MASK</div><div class='add'>+		 | FIMC_REG_MSCTRL_C_INT_IN_MASK</div><div class='add'>+		 | FIMC_REG_MSCTRL_2P_IN_ORDER_MASK);</div><div class='ctx'> </div><div class='del'>-	cfg |= (S5P_MSCTRL_IN_BURST_COUNT(4)</div><div class='del'>-		| S5P_MSCTRL_INPUT_MEMORY</div><div class='del'>-		| S5P_MSCTRL_FIFO_CTRL_FULL);</div><div class='add'>+	cfg |= (FIMC_REG_MSCTRL_IN_BURST_COUNT(4)</div><div class='add'>+		| FIMC_REG_MSCTRL_INPUT_MEMORY</div><div class='add'>+		| FIMC_REG_MSCTRL_FIFO_CTRL_FULL);</div><div class='ctx'> </div><div class='ctx'> 	switch (frame-&gt;fmt-&gt;color) {</div><div class='del'>-	case S5P_FIMC_RGB565...S5P_FIMC_RGB888:</div><div class='del'>-		cfg |= S5P_MSCTRL_INFORMAT_RGB;</div><div class='add'>+	case FIMC_FMT_RGB565...FIMC_FMT_RGB888:</div><div class='add'>+		cfg |= FIMC_REG_MSCTRL_INFORMAT_RGB;</div><div class='ctx'> 		break;</div><div class='del'>-	case S5P_FIMC_YCBCR420:</div><div class='del'>-		cfg |= S5P_MSCTRL_INFORMAT_YCBCR420;</div><div class='add'>+	case FIMC_FMT_YCBCR420:</div><div class='add'>+		cfg |= FIMC_REG_MSCTRL_INFORMAT_YCBCR420;</div><div class='ctx'> </div><div class='ctx'> 		if (frame-&gt;fmt-&gt;colplanes == 2)</div><div class='del'>-			cfg |= ctx-&gt;in_order_2p | S5P_MSCTRL_C_INT_IN_2PLANE;</div><div class='add'>+			cfg |= ctx-&gt;in_order_2p | FIMC_REG_MSCTRL_C_INT_IN_2PLANE;</div><div class='ctx'> 		else</div><div class='del'>-			cfg |= S5P_MSCTRL_C_INT_IN_3PLANE;</div><div class='add'>+			cfg |= FIMC_REG_MSCTRL_C_INT_IN_3PLANE;</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='del'>-	case S5P_FIMC_YCBYCR422...S5P_FIMC_CRYCBY422:</div><div class='add'>+	case FIMC_FMT_YCBYCR422...FIMC_FMT_CRYCBY422:</div><div class='ctx'> 		if (frame-&gt;fmt-&gt;colplanes == 1) {</div><div class='ctx'> 			cfg |= ctx-&gt;in_order_1p</div><div class='del'>-				| S5P_MSCTRL_INFORMAT_YCBCR422_1P;</div><div class='add'>+				| FIMC_REG_MSCTRL_INFORMAT_YCBCR422_1P;</div><div class='ctx'> 		} else {</div><div class='del'>-			cfg |= S5P_MSCTRL_INFORMAT_YCBCR422;</div><div class='add'>+			cfg |= FIMC_REG_MSCTRL_INFORMAT_YCBCR422;</div><div class='ctx'> </div><div class='ctx'> 			if (frame-&gt;fmt-&gt;colplanes == 2)</div><div class='ctx'> 				cfg |= ctx-&gt;in_order_2p</div><div class='del'>-					| S5P_MSCTRL_C_INT_IN_2PLANE;</div><div class='add'>+					| FIMC_REG_MSCTRL_C_INT_IN_2PLANE;</div><div class='ctx'> 			else</div><div class='del'>-				cfg |= S5P_MSCTRL_C_INT_IN_3PLANE;</div><div class='add'>+				cfg |= FIMC_REG_MSCTRL_C_INT_IN_3PLANE;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_MSCTRL);</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_MSCTRL);</div><div class='ctx'> </div><div class='ctx'> 	/* Input/output DMA linear/tiled mode. */</div><div class='del'>-	cfg = readl(dev-&gt;regs + S5P_CIDMAPARAM);</div><div class='del'>-	cfg &amp;= ~S5P_CIDMAPARAM_TILE_MASK;</div><div class='add'>+	cfg = readl(dev-&gt;regs + FIMC_REG_CIDMAPARAM);</div><div class='add'>+	cfg &amp;= ~FIMC_REG_CIDMAPARAM_TILE_MASK;</div><div class='ctx'> </div><div class='ctx'> 	if (tiled_fmt(ctx-&gt;s_frame.fmt))</div><div class='del'>-		cfg |= S5P_CIDMAPARAM_R_64X32;</div><div class='add'>+		cfg |= FIMC_REG_CIDMAPARAM_R_64X32;</div><div class='ctx'> </div><div class='ctx'> 	if (tiled_fmt(ctx-&gt;d_frame.fmt))</div><div class='del'>-		cfg |= S5P_CIDMAPARAM_W_64X32;</div><div class='add'>+		cfg |= FIMC_REG_CIDMAPARAM_W_64X32;</div><div class='ctx'> </div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIDMAPARAM);</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIDMAPARAM);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -516,40 +503,40 @@ void fimc_hw_set_input_path(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *dev = ctx-&gt;fimc_dev;</div><div class='ctx'> </div><div class='del'>-	u32 cfg = readl(dev-&gt;regs + S5P_MSCTRL);</div><div class='del'>-	cfg &amp;= ~S5P_MSCTRL_INPUT_MASK;</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FIMC_REG_MSCTRL);</div><div class='add'>+	cfg &amp;= ~FIMC_REG_MSCTRL_INPUT_MASK;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;in_path == FIMC_DMA)</div><div class='del'>-		cfg |= S5P_MSCTRL_INPUT_MEMORY;</div><div class='add'>+	if (ctx-&gt;in_path == FIMC_IO_DMA)</div><div class='add'>+		cfg |= FIMC_REG_MSCTRL_INPUT_MEMORY;</div><div class='ctx'> 	else</div><div class='del'>-		cfg |= S5P_MSCTRL_INPUT_EXTCAM;</div><div class='add'>+		cfg |= FIMC_REG_MSCTRL_INPUT_EXTCAM;</div><div class='ctx'> </div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_MSCTRL);</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_MSCTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fimc_hw_set_output_path(struct fimc_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct fimc_dev *dev = ctx-&gt;fimc_dev;</div><div class='ctx'> </div><div class='del'>-	u32 cfg = readl(dev-&gt;regs + S5P_CISCCTRL);</div><div class='del'>-	cfg &amp;= ~S5P_CISCCTRL_LCDPATHEN_FIFO;</div><div class='del'>-	if (ctx-&gt;out_path == FIMC_LCDFIFO)</div><div class='del'>-		cfg |= S5P_CISCCTRL_LCDPATHEN_FIFO;</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CISCCTRL);</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FIMC_REG_CISCCTRL);</div><div class='add'>+	cfg &amp;= ~FIMC_REG_CISCCTRL_LCDPATHEN_FIFO;</div><div class='add'>+	if (ctx-&gt;out_path == FIMC_IO_LCDFIFO)</div><div class='add'>+		cfg |= FIMC_REG_CISCCTRL_LCDPATHEN_FIFO;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CISCCTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fimc_hw_set_input_addr(struct fimc_dev *dev, struct fimc_addr *paddr)</div><div class='ctx'> {</div><div class='del'>-	u32 cfg = readl(dev-&gt;regs + S5P_CIREAL_ISIZE);</div><div class='del'>-	cfg |= S5P_CIREAL_ISIZE_ADDR_CH_DIS;</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIREAL_ISIZE);</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FIMC_REG_CIREAL_ISIZE);</div><div class='add'>+	cfg |= FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIREAL_ISIZE);</div><div class='ctx'> </div><div class='del'>-	writel(paddr-&gt;y, dev-&gt;regs + S5P_CIIYSA(0));</div><div class='del'>-	writel(paddr-&gt;cb, dev-&gt;regs + S5P_CIICBSA(0));</div><div class='del'>-	writel(paddr-&gt;cr, dev-&gt;regs + S5P_CIICRSA(0));</div><div class='add'>+	writel(paddr-&gt;y, dev-&gt;regs + FIMC_REG_CIIYSA(0));</div><div class='add'>+	writel(paddr-&gt;cb, dev-&gt;regs + FIMC_REG_CIICBSA(0));</div><div class='add'>+	writel(paddr-&gt;cr, dev-&gt;regs + FIMC_REG_CIICRSA(0));</div><div class='ctx'> </div><div class='del'>-	cfg &amp;= ~S5P_CIREAL_ISIZE_ADDR_CH_DIS;</div><div class='del'>-	writel(cfg, dev-&gt;regs + S5P_CIREAL_ISIZE);</div><div class='add'>+	cfg &amp;= ~FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIREAL_ISIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fimc_hw_set_output_addr(struct fimc_dev *dev,</div><div class='hunk'>@@ -557,9 +544,9 @@ void fimc_hw_set_output_addr(struct fimc_dev *dev,</div><div class='ctx'> {</div><div class='ctx'> 	int i = (index == -1) ? 0 : index;</div><div class='ctx'> 	do {</div><div class='del'>-		writel(paddr-&gt;y, dev-&gt;regs + S5P_CIOYSA(i));</div><div class='del'>-		writel(paddr-&gt;cb, dev-&gt;regs + S5P_CIOCBSA(i));</div><div class='del'>-		writel(paddr-&gt;cr, dev-&gt;regs + S5P_CIOCRSA(i));</div><div class='add'>+		writel(paddr-&gt;y, dev-&gt;regs + FIMC_REG_CIOYSA(i));</div><div class='add'>+		writel(paddr-&gt;cb, dev-&gt;regs + FIMC_REG_CIOCBSA(i));</div><div class='add'>+		writel(paddr-&gt;cr, dev-&gt;regs + FIMC_REG_CIOCRSA(i));</div><div class='ctx'> 		dbg("dst_buf[%d]: 0x%X, cb: 0x%X, cr: 0x%X",</div><div class='ctx'> 		    i, paddr-&gt;y, paddr-&gt;cb, paddr-&gt;cr);</div><div class='ctx'> 	} while (index == -1 &amp;&amp; ++i &lt; FIMC_MAX_OUT_BUFS);</div><div class='hunk'>@@ -568,32 +555,45 @@ void fimc_hw_set_output_addr(struct fimc_dev *dev,</div><div class='ctx'> int fimc_hw_set_camera_polarity(struct fimc_dev *fimc,</div><div class='ctx'> 				struct s5p_fimc_isp_info *cam)</div><div class='ctx'> {</div><div class='del'>-	u32 cfg = readl(fimc-&gt;regs + S5P_CIGCTRL);</div><div class='add'>+	u32 cfg = readl(fimc-&gt;regs + FIMC_REG_CIGCTRL);</div><div class='ctx'> </div><div class='del'>-	cfg &amp;= ~(S5P_CIGCTRL_INVPOLPCLK | S5P_CIGCTRL_INVPOLVSYNC |</div><div class='del'>-		 S5P_CIGCTRL_INVPOLHREF | S5P_CIGCTRL_INVPOLHSYNC |</div><div class='del'>-		 S5P_CIGCTRL_INVPOLFIELD);</div><div class='add'>+	cfg &amp;= ~(FIMC_REG_CIGCTRL_INVPOLPCLK | FIMC_REG_CIGCTRL_INVPOLVSYNC |</div><div class='add'>+		 FIMC_REG_CIGCTRL_INVPOLHREF | FIMC_REG_CIGCTRL_INVPOLHSYNC |</div><div class='add'>+		 FIMC_REG_CIGCTRL_INVPOLFIELD);</div><div class='ctx'> </div><div class='ctx'> 	if (cam-&gt;flags &amp; V4L2_MBUS_PCLK_SAMPLE_FALLING)</div><div class='del'>-		cfg |= S5P_CIGCTRL_INVPOLPCLK;</div><div class='add'>+		cfg |= FIMC_REG_CIGCTRL_INVPOLPCLK;</div><div class='ctx'> </div><div class='ctx'> 	if (cam-&gt;flags &amp; V4L2_MBUS_VSYNC_ACTIVE_LOW)</div><div class='del'>-		cfg |= S5P_CIGCTRL_INVPOLVSYNC;</div><div class='add'>+		cfg |= FIMC_REG_CIGCTRL_INVPOLVSYNC;</div><div class='ctx'> </div><div class='ctx'> 	if (cam-&gt;flags &amp; V4L2_MBUS_HSYNC_ACTIVE_LOW)</div><div class='del'>-		cfg |= S5P_CIGCTRL_INVPOLHREF;</div><div class='add'>+		cfg |= FIMC_REG_CIGCTRL_INVPOLHREF;</div><div class='ctx'> </div><div class='ctx'> 	if (cam-&gt;flags &amp; V4L2_MBUS_HSYNC_ACTIVE_LOW)</div><div class='del'>-		cfg |= S5P_CIGCTRL_INVPOLHSYNC;</div><div class='add'>+		cfg |= FIMC_REG_CIGCTRL_INVPOLHSYNC;</div><div class='ctx'> </div><div class='ctx'> 	if (cam-&gt;flags &amp; V4L2_MBUS_FIELD_EVEN_LOW)</div><div class='del'>-		cfg |= S5P_CIGCTRL_INVPOLFIELD;</div><div class='add'>+		cfg |= FIMC_REG_CIGCTRL_INVPOLFIELD;</div><div class='ctx'> </div><div class='del'>-	writel(cfg, fimc-&gt;regs + S5P_CIGCTRL);</div><div class='add'>+	writel(cfg, fimc-&gt;regs + FIMC_REG_CIGCTRL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct mbus_pixfmt_desc {</div><div class='add'>+	u32 pixelcode;</div><div class='add'>+	u32 cisrcfmt;</div><div class='add'>+	u16 bus_width;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mbus_pixfmt_desc pix_desc[] = {</div><div class='add'>+	{ V4L2_MBUS_FMT_YUYV8_2X8, FIMC_REG_CISRCFMT_ORDER422_YCBYCR, 8 },</div><div class='add'>+	{ V4L2_MBUS_FMT_YVYU8_2X8, FIMC_REG_CISRCFMT_ORDER422_YCRYCB, 8 },</div><div class='add'>+	{ V4L2_MBUS_FMT_VYUY8_2X8, FIMC_REG_CISRCFMT_ORDER422_CRYCBY, 8 },</div><div class='add'>+	{ V4L2_MBUS_FMT_UYVY8_2X8, FIMC_REG_CISRCFMT_ORDER422_CBYCRY, 8 },</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int fimc_hw_set_camera_source(struct fimc_dev *fimc,</div><div class='ctx'> 			      struct s5p_fimc_isp_info *cam)</div><div class='ctx'> {</div><div class='hunk'>@@ -602,18 +602,6 @@ int fimc_hw_set_camera_source(struct fimc_dev *fimc,</div><div class='ctx'> 	u32 bus_width;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	static const struct {</div><div class='del'>-		u32 pixelcode;</div><div class='del'>-		u32 cisrcfmt;</div><div class='del'>-		u16 bus_width;</div><div class='del'>-	} pix_desc[] = {</div><div class='del'>-		{ V4L2_MBUS_FMT_YUYV8_2X8, S5P_CISRCFMT_ORDER422_YCBYCR, 8 },</div><div class='del'>-		{ V4L2_MBUS_FMT_YVYU8_2X8, S5P_CISRCFMT_ORDER422_YCRYCB, 8 },</div><div class='del'>-		{ V4L2_MBUS_FMT_VYUY8_2X8, S5P_CISRCFMT_ORDER422_CRYCBY, 8 },</div><div class='del'>-		{ V4L2_MBUS_FMT_UYVY8_2X8, S5P_CISRCFMT_ORDER422_CBYCRY, 8 },</div><div class='del'>-		/* TODO: Add pixel codes for 16-bit bus width */</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	if (cam-&gt;bus_type == FIMC_ITU_601 || cam-&gt;bus_type == FIMC_ITU_656) {</div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(pix_desc); i++) {</div><div class='ctx'> 			if (fimc-&gt;vid_cap.mf.code == pix_desc[i].pixelcode) {</div><div class='hunk'>@@ -632,41 +620,37 @@ int fimc_hw_set_camera_source(struct fimc_dev *fimc,</div><div class='ctx'> </div><div class='ctx'> 		if (cam-&gt;bus_type == FIMC_ITU_601) {</div><div class='ctx'> 			if (bus_width == 8)</div><div class='del'>-				cfg |= S5P_CISRCFMT_ITU601_8BIT;</div><div class='add'>+				cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT;</div><div class='ctx'> 			else if (bus_width == 16)</div><div class='del'>-				cfg |= S5P_CISRCFMT_ITU601_16BIT;</div><div class='add'>+				cfg |= FIMC_REG_CISRCFMT_ITU601_16BIT;</div><div class='ctx'> 		} /* else defaults to ITU-R BT.656 8-bit */</div><div class='ctx'> 	} else if (cam-&gt;bus_type == FIMC_MIPI_CSI2) {</div><div class='ctx'> 		if (fimc_fmt_is_jpeg(f-&gt;fmt-&gt;color))</div><div class='del'>-			cfg |= S5P_CISRCFMT_ITU601_8BIT;</div><div class='add'>+			cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cfg |= S5P_CISRCFMT_HSIZE(f-&gt;o_width) | S5P_CISRCFMT_VSIZE(f-&gt;o_height);</div><div class='del'>-	writel(cfg, fimc-&gt;regs + S5P_CISRCFMT);</div><div class='add'>+	cfg |= (f-&gt;o_width &lt;&lt; 16) | f-&gt;o_height;</div><div class='add'>+	writel(cfg, fimc-&gt;regs + FIMC_REG_CISRCFMT);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-int fimc_hw_set_camera_offset(struct fimc_dev *fimc, struct fimc_frame *f)</div><div class='add'>+void fimc_hw_set_camera_offset(struct fimc_dev *fimc, struct fimc_frame *f)</div><div class='ctx'> {</div><div class='ctx'> 	u32 hoff2, voff2;</div><div class='ctx'> </div><div class='del'>-	u32 cfg = readl(fimc-&gt;regs + S5P_CIWDOFST);</div><div class='add'>+	u32 cfg = readl(fimc-&gt;regs + FIMC_REG_CIWDOFST);</div><div class='ctx'> </div><div class='del'>-	cfg &amp;= ~(S5P_CIWDOFST_HOROFF_MASK | S5P_CIWDOFST_VEROFF_MASK);</div><div class='del'>-	cfg |=  S5P_CIWDOFST_OFF_EN |</div><div class='del'>-		S5P_CIWDOFST_HOROFF(f-&gt;offs_h) |</div><div class='del'>-		S5P_CIWDOFST_VEROFF(f-&gt;offs_v);</div><div class='add'>+	cfg &amp;= ~(FIMC_REG_CIWDOFST_HOROFF_MASK | FIMC_REG_CIWDOFST_VEROFF_MASK);</div><div class='add'>+	cfg |=  FIMC_REG_CIWDOFST_OFF_EN |</div><div class='add'>+		(f-&gt;offs_h &lt;&lt; 16) | f-&gt;offs_v;</div><div class='ctx'> </div><div class='del'>-	writel(cfg, fimc-&gt;regs + S5P_CIWDOFST);</div><div class='add'>+	writel(cfg, fimc-&gt;regs + FIMC_REG_CIWDOFST);</div><div class='ctx'> </div><div class='ctx'> 	/* See CIWDOFSTn register description in the datasheet for details. */</div><div class='ctx'> 	hoff2 = f-&gt;o_width - f-&gt;width - f-&gt;offs_h;</div><div class='ctx'> 	voff2 = f-&gt;o_height - f-&gt;height - f-&gt;offs_v;</div><div class='del'>-	cfg = S5P_CIWDOFST2_HOROFF(hoff2) | S5P_CIWDOFST2_VEROFF(voff2);</div><div class='del'>-</div><div class='del'>-	writel(cfg, fimc-&gt;regs + S5P_CIWDOFST2);</div><div class='del'>-	return 0;</div><div class='add'>+	cfg = (hoff2 &lt;&lt; 16) | voff2;</div><div class='add'>+	writel(cfg, fimc-&gt;regs + FIMC_REG_CIWDOFST2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int fimc_hw_set_camera_type(struct fimc_dev *fimc,</div><div class='hunk'>@@ -674,28 +658,29 @@ int fimc_hw_set_camera_type(struct fimc_dev *fimc,</div><div class='ctx'> {</div><div class='ctx'> 	u32 cfg, tmp;</div><div class='ctx'> 	struct fimc_vid_cap *vid_cap = &amp;fimc-&gt;vid_cap;</div><div class='add'>+	u32 csis_data_alignment = 32;</div><div class='ctx'> </div><div class='del'>-	cfg = readl(fimc-&gt;regs + S5P_CIGCTRL);</div><div class='add'>+	cfg = readl(fimc-&gt;regs + FIMC_REG_CIGCTRL);</div><div class='ctx'> </div><div class='ctx'> 	/* Select ITU B interface, disable Writeback path and test pattern. */</div><div class='del'>-	cfg &amp;= ~(S5P_CIGCTRL_TESTPAT_MASK | S5P_CIGCTRL_SELCAM_ITU_A |</div><div class='del'>-		S5P_CIGCTRL_SELCAM_MIPI | S5P_CIGCTRL_CAMIF_SELWB |</div><div class='del'>-		S5P_CIGCTRL_SELCAM_MIPI_A | S5P_CIGCTRL_CAM_JPEG);</div><div class='add'>+	cfg &amp;= ~(FIMC_REG_CIGCTRL_TESTPAT_MASK | FIMC_REG_CIGCTRL_SELCAM_ITU_A |</div><div class='add'>+		FIMC_REG_CIGCTRL_SELCAM_MIPI | FIMC_REG_CIGCTRL_CAMIF_SELWB |</div><div class='add'>+		FIMC_REG_CIGCTRL_SELCAM_MIPI_A | FIMC_REG_CIGCTRL_CAM_JPEG);</div><div class='ctx'> </div><div class='ctx'> 	if (cam-&gt;bus_type == FIMC_MIPI_CSI2) {</div><div class='del'>-		cfg |= S5P_CIGCTRL_SELCAM_MIPI;</div><div class='add'>+		cfg |= FIMC_REG_CIGCTRL_SELCAM_MIPI;</div><div class='ctx'> </div><div class='ctx'> 		if (cam-&gt;mux_id == 0)</div><div class='del'>-			cfg |= S5P_CIGCTRL_SELCAM_MIPI_A;</div><div class='add'>+			cfg |= FIMC_REG_CIGCTRL_SELCAM_MIPI_A;</div><div class='ctx'> </div><div class='ctx'> 		/* TODO: add remaining supported formats. */</div><div class='ctx'> 		switch (vid_cap-&gt;mf.code) {</div><div class='ctx'> 		case V4L2_MBUS_FMT_VYUY8_2X8:</div><div class='del'>-			tmp = S5P_CSIIMGFMT_YCBCR422_8BIT;</div><div class='add'>+			tmp = FIMC_REG_CSIIMGFMT_YCBCR422_8BIT;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case V4L2_MBUS_FMT_JPEG_1X8:</div><div class='del'>-			tmp = S5P_CSIIMGFMT_USER(1);</div><div class='del'>-			cfg |= S5P_CIGCTRL_CAM_JPEG;</div><div class='add'>+			tmp = FIMC_REG_CSIIMGFMT_USER(1);</div><div class='add'>+			cfg |= FIMC_REG_CIGCTRL_CAM_JPEG;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			v4l2_err(fimc-&gt;vid_cap.vfd,</div><div class='hunk'>@@ -703,21 +688,86 @@ int fimc_hw_set_camera_type(struct fimc_dev *fimc,</div><div class='ctx'> 				 vid_cap-&gt;mf.code);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-		tmp |= (cam-&gt;csi_data_align == 32) &lt;&lt; 8;</div><div class='add'>+		tmp |= (csis_data_alignment == 32) &lt;&lt; 8;</div><div class='ctx'> </div><div class='del'>-		writel(tmp, fimc-&gt;regs + S5P_CSIIMGFMT);</div><div class='add'>+		writel(tmp, fimc-&gt;regs + FIMC_REG_CSIIMGFMT);</div><div class='ctx'> </div><div class='ctx'> 	} else if (cam-&gt;bus_type == FIMC_ITU_601 ||</div><div class='ctx'> 		   cam-&gt;bus_type == FIMC_ITU_656) {</div><div class='ctx'> 		if (cam-&gt;mux_id == 0) /* ITU-A, ITU-B: 0, 1 */</div><div class='del'>-			cfg |= S5P_CIGCTRL_SELCAM_ITU_A;</div><div class='add'>+			cfg |= FIMC_REG_CIGCTRL_SELCAM_ITU_A;</div><div class='ctx'> 	} else if (cam-&gt;bus_type == FIMC_LCD_WB) {</div><div class='del'>-		cfg |= S5P_CIGCTRL_CAMIF_SELWB;</div><div class='add'>+		cfg |= FIMC_REG_CIGCTRL_CAMIF_SELWB;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		err("invalid camera bus type selected\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	writel(cfg, fimc-&gt;regs + S5P_CIGCTRL);</div><div class='add'>+	writel(cfg, fimc-&gt;regs + FIMC_REG_CIGCTRL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void fimc_hw_clear_irq(struct fimc_dev *dev)</div><div class='add'>+{</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FIMC_REG_CIGCTRL);</div><div class='add'>+	cfg |= FIMC_REG_CIGCTRL_IRQ_CLR;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIGCTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fimc_hw_enable_scaler(struct fimc_dev *dev, bool on)</div><div class='add'>+{</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FIMC_REG_CISCCTRL);</div><div class='add'>+	if (on)</div><div class='add'>+		cfg |= FIMC_REG_CISCCTRL_SCALERSTART;</div><div class='add'>+	else</div><div class='add'>+		cfg &amp;= ~FIMC_REG_CISCCTRL_SCALERSTART;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CISCCTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fimc_hw_activate_input_dma(struct fimc_dev *dev, bool on)</div><div class='add'>+{</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FIMC_REG_MSCTRL);</div><div class='add'>+	if (on)</div><div class='add'>+		cfg |= FIMC_REG_MSCTRL_ENVID;</div><div class='add'>+	else</div><div class='add'>+		cfg &amp;= ~FIMC_REG_MSCTRL_ENVID;</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_MSCTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fimc_hw_dis_capture(struct fimc_dev *dev)</div><div class='add'>+{</div><div class='add'>+	u32 cfg = readl(dev-&gt;regs + FIMC_REG_CIIMGCPT);</div><div class='add'>+	cfg &amp;= ~(FIMC_REG_CIIMGCPT_IMGCPTEN | FIMC_REG_CIIMGCPT_IMGCPTEN_SC);</div><div class='add'>+	writel(cfg, dev-&gt;regs + FIMC_REG_CIIMGCPT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Return an index to the buffer actually being written. */</div><div class='add'>+u32 fimc_hw_get_frame_index(struct fimc_dev *dev)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;variant-&gt;has_cistatus2) {</div><div class='add'>+		reg = readl(dev-&gt;regs + FIMC_REG_CISTATUS2) &amp; 0x3F;</div><div class='add'>+		return reg &gt; 0 ? --reg : reg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg = readl(dev-&gt;regs + FIMC_REG_CISTATUS);</div><div class='add'>+</div><div class='add'>+	return (reg &amp; FIMC_REG_CISTATUS_FRAMECNT_MASK) &gt;&gt;</div><div class='add'>+		FIMC_REG_CISTATUS_FRAMECNT_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Locking: the caller holds fimc-&gt;slock */</div><div class='add'>+void fimc_activate_capture(struct fimc_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	fimc_hw_enable_scaler(ctx-&gt;fimc_dev, ctx-&gt;scaler.enabled);</div><div class='add'>+	fimc_hw_en_capture(ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fimc_deactivate_capture(struct fimc_dev *fimc)</div><div class='add'>+{</div><div class='add'>+	fimc_hw_en_lastirq(fimc, true);</div><div class='add'>+	fimc_hw_dis_capture(fimc);</div><div class='add'>+	fimc_hw_enable_scaler(fimc, false);</div><div class='add'>+	fimc_hw_en_lastirq(fimc, false);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/fimc-reg.h b/drivers/media/video/s5p-fimc/fimc-reg.h<br/>new file mode 100644<br/>index 000000000000..579ac8ac03de<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/fimc-reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/fimc-reg.h</a></div><div class='hunk'>@@ -0,0 +1,326 @@</div><div class='add'>+/*</div><div class='add'>+ * Samsung camera host interface (FIMC) registers definition</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef FIMC_REG_H_</div><div class='add'>+#define FIMC_REG_H_</div><div class='add'>+</div><div class='add'>+#include "fimc-core.h"</div><div class='add'>+</div><div class='add'>+/* Input source format */</div><div class='add'>+#define FIMC_REG_CISRCFMT			0x00</div><div class='add'>+#define FIMC_REG_CISRCFMT_ITU601_8BIT		(1 &lt;&lt; 31)</div><div class='add'>+#define FIMC_REG_CISRCFMT_ITU601_16BIT		(1 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CISRCFMT_ORDER422_YCBYCR	(0 &lt;&lt; 14)</div><div class='add'>+#define FIMC_REG_CISRCFMT_ORDER422_YCRYCB	(1 &lt;&lt; 14)</div><div class='add'>+#define FIMC_REG_CISRCFMT_ORDER422_CBYCRY	(2 &lt;&lt; 14)</div><div class='add'>+#define FIMC_REG_CISRCFMT_ORDER422_CRYCBY	(3 &lt;&lt; 14)</div><div class='add'>+</div><div class='add'>+/* Window offset */</div><div class='add'>+#define FIMC_REG_CIWDOFST			0x04</div><div class='add'>+#define FIMC_REG_CIWDOFST_OFF_EN		(1 &lt;&lt; 31)</div><div class='add'>+#define FIMC_REG_CIWDOFST_CLROVFIY		(1 &lt;&lt; 30)</div><div class='add'>+#define FIMC_REG_CIWDOFST_CLROVRLB		(1 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CIWDOFST_HOROFF_MASK		(0x7ff &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_CIWDOFST_CLROVFICB		(1 &lt;&lt; 15)</div><div class='add'>+#define FIMC_REG_CIWDOFST_CLROVFICR		(1 &lt;&lt; 14)</div><div class='add'>+#define FIMC_REG_CIWDOFST_VEROFF_MASK		(0xfff &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* Global control */</div><div class='add'>+#define FIMC_REG_CIGCTRL			0x08</div><div class='add'>+#define FIMC_REG_CIGCTRL_SWRST			(1 &lt;&lt; 31)</div><div class='add'>+#define FIMC_REG_CIGCTRL_CAMRST_A		(1 &lt;&lt; 30)</div><div class='add'>+#define FIMC_REG_CIGCTRL_SELCAM_ITU_A		(1 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CIGCTRL_TESTPAT_NORMAL		(0 &lt;&lt; 27)</div><div class='add'>+#define FIMC_REG_CIGCTRL_TESTPAT_COLOR_BAR	(1 &lt;&lt; 27)</div><div class='add'>+#define FIMC_REG_CIGCTRL_TESTPAT_HOR_INC	(2 &lt;&lt; 27)</div><div class='add'>+#define FIMC_REG_CIGCTRL_TESTPAT_VER_INC	(3 &lt;&lt; 27)</div><div class='add'>+#define FIMC_REG_CIGCTRL_TESTPAT_MASK		(3 &lt;&lt; 27)</div><div class='add'>+#define FIMC_REG_CIGCTRL_TESTPAT_SHIFT		27</div><div class='add'>+#define FIMC_REG_CIGCTRL_INVPOLPCLK		(1 &lt;&lt; 26)</div><div class='add'>+#define FIMC_REG_CIGCTRL_INVPOLVSYNC		(1 &lt;&lt; 25)</div><div class='add'>+#define FIMC_REG_CIGCTRL_INVPOLHREF		(1 &lt;&lt; 24)</div><div class='add'>+#define FIMC_REG_CIGCTRL_IRQ_OVFEN		(1 &lt;&lt; 22)</div><div class='add'>+#define FIMC_REG_CIGCTRL_HREF_MASK		(1 &lt;&lt; 21)</div><div class='add'>+#define FIMC_REG_CIGCTRL_IRQ_LEVEL		(1 &lt;&lt; 20)</div><div class='add'>+#define FIMC_REG_CIGCTRL_IRQ_CLR		(1 &lt;&lt; 19)</div><div class='add'>+#define FIMC_REG_CIGCTRL_IRQ_ENABLE		(1 &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_CIGCTRL_SHDW_DISABLE		(1 &lt;&lt; 12)</div><div class='add'>+#define FIMC_REG_CIGCTRL_CAM_JPEG		(1 &lt;&lt; 8)</div><div class='add'>+#define FIMC_REG_CIGCTRL_SELCAM_MIPI_A		(1 &lt;&lt; 7)</div><div class='add'>+#define FIMC_REG_CIGCTRL_CAMIF_SELWB		(1 &lt;&lt; 6)</div><div class='add'>+/* 0 - ITU601; 1 - ITU709 */</div><div class='add'>+#define FIMC_REG_CIGCTRL_CSC_ITU601_709		(1 &lt;&lt; 5)</div><div class='add'>+#define FIMC_REG_CIGCTRL_INVPOLHSYNC		(1 &lt;&lt; 4)</div><div class='add'>+#define FIMC_REG_CIGCTRL_SELCAM_MIPI		(1 &lt;&lt; 3)</div><div class='add'>+#define FIMC_REG_CIGCTRL_INVPOLFIELD		(1 &lt;&lt; 1)</div><div class='add'>+#define FIMC_REG_CIGCTRL_INTERLACE		(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* Window offset 2 */</div><div class='add'>+#define FIMC_REG_CIWDOFST2			0x14</div><div class='add'>+#define FIMC_REG_CIWDOFST2_HOROFF_MASK		(0xfff &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_CIWDOFST2_VEROFF_MASK		(0xfff &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* Output DMA Y/Cb/Cr plane start addresses */</div><div class='add'>+#define FIMC_REG_CIOYSA(n)			(0x18 + (n) * 4)</div><div class='add'>+#define FIMC_REG_CIOCBSA(n)			(0x28 + (n) * 4)</div><div class='add'>+#define FIMC_REG_CIOCRSA(n)			(0x38 + (n) * 4)</div><div class='add'>+</div><div class='add'>+/* Target image format */</div><div class='add'>+#define FIMC_REG_CITRGFMT			0x48</div><div class='add'>+#define FIMC_REG_CITRGFMT_INROT90		(1 &lt;&lt; 31)</div><div class='add'>+#define FIMC_REG_CITRGFMT_YCBCR420		(0 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CITRGFMT_YCBCR422		(1 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CITRGFMT_YCBCR422_1P		(2 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CITRGFMT_RGB			(3 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CITRGFMT_FMT_MASK		(3 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CITRGFMT_HSIZE_MASK		(0xfff &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_CITRGFMT_FLIP_SHIFT		14</div><div class='add'>+#define FIMC_REG_CITRGFMT_FLIP_NORMAL		(0 &lt;&lt; 14)</div><div class='add'>+#define FIMC_REG_CITRGFMT_FLIP_X_MIRROR		(1 &lt;&lt; 14)</div><div class='add'>+#define FIMC_REG_CITRGFMT_FLIP_Y_MIRROR		(2 &lt;&lt; 14)</div><div class='add'>+#define FIMC_REG_CITRGFMT_FLIP_180		(3 &lt;&lt; 14)</div><div class='add'>+#define FIMC_REG_CITRGFMT_FLIP_MASK		(3 &lt;&lt; 14)</div><div class='add'>+#define FIMC_REG_CITRGFMT_OUTROT90		(1 &lt;&lt; 13)</div><div class='add'>+#define FIMC_REG_CITRGFMT_VSIZE_MASK		(0xfff &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* Output DMA control */</div><div class='add'>+#define FIMC_REG_CIOCTRL			0x4c</div><div class='add'>+#define FIMC_REG_CIOCTRL_ORDER422_MASK		(3 &lt;&lt; 0)</div><div class='add'>+#define FIMC_REG_CIOCTRL_ORDER422_CRYCBY	(0 &lt;&lt; 0)</div><div class='add'>+#define FIMC_REG_CIOCTRL_ORDER422_CBYCRY	(1 &lt;&lt; 0)</div><div class='add'>+#define FIMC_REG_CIOCTRL_ORDER422_YCRYCB	(2 &lt;&lt; 0)</div><div class='add'>+#define FIMC_REG_CIOCTRL_ORDER422_YCBYCR	(3 &lt;&lt; 0)</div><div class='add'>+#define FIMC_REG_CIOCTRL_LASTIRQ_ENABLE		(1 &lt;&lt; 2)</div><div class='add'>+#define FIMC_REG_CIOCTRL_YCBCR_3PLANE		(0 &lt;&lt; 3)</div><div class='add'>+#define FIMC_REG_CIOCTRL_YCBCR_2PLANE		(1 &lt;&lt; 3)</div><div class='add'>+#define FIMC_REG_CIOCTRL_YCBCR_PLANE_MASK	(1 &lt;&lt; 3)</div><div class='add'>+#define FIMC_REG_CIOCTRL_ALPHA_OUT_MASK		(0xff &lt;&lt; 4)</div><div class='add'>+#define FIMC_REG_CIOCTRL_RGB16FMT_MASK		(3 &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_CIOCTRL_RGB565			(0 &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_CIOCTRL_ARGB1555		(1 &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_CIOCTRL_ARGB4444		(2 &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_CIOCTRL_ORDER2P_SHIFT		24</div><div class='add'>+#define FIMC_REG_CIOCTRL_ORDER2P_MASK		(3 &lt;&lt; 24)</div><div class='add'>+#define FIMC_REG_CIOCTRL_ORDER422_2P_LSB_CRCB	(0 &lt;&lt; 24)</div><div class='add'>+</div><div class='add'>+/* Pre-scaler control 1 */</div><div class='add'>+#define FIMC_REG_CISCPRERATIO			0x50</div><div class='add'>+</div><div class='add'>+#define FIMC_REG_CISCPREDST			0x54</div><div class='add'>+</div><div class='add'>+/* Main scaler control */</div><div class='add'>+#define FIMC_REG_CISCCTRL			0x58</div><div class='add'>+#define FIMC_REG_CISCCTRL_SCALERBYPASS		(1 &lt;&lt; 31)</div><div class='add'>+#define FIMC_REG_CISCCTRL_SCALEUP_H		(1 &lt;&lt; 30)</div><div class='add'>+#define FIMC_REG_CISCCTRL_SCALEUP_V		(1 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CISCCTRL_CSCR2Y_WIDE		(1 &lt;&lt; 28)</div><div class='add'>+#define FIMC_REG_CISCCTRL_CSCY2R_WIDE		(1 &lt;&lt; 27)</div><div class='add'>+#define FIMC_REG_CISCCTRL_LCDPATHEN_FIFO	(1 &lt;&lt; 26)</div><div class='add'>+#define FIMC_REG_CISCCTRL_INTERLACE		(1 &lt;&lt; 25)</div><div class='add'>+#define FIMC_REG_CISCCTRL_SCALERSTART		(1 &lt;&lt; 15)</div><div class='add'>+#define FIMC_REG_CISCCTRL_INRGB_FMT_RGB565	(0 &lt;&lt; 13)</div><div class='add'>+#define FIMC_REG_CISCCTRL_INRGB_FMT_RGB666	(1 &lt;&lt; 13)</div><div class='add'>+#define FIMC_REG_CISCCTRL_INRGB_FMT_RGB888	(2 &lt;&lt; 13)</div><div class='add'>+#define FIMC_REG_CISCCTRL_INRGB_FMT_MASK	(3 &lt;&lt; 13)</div><div class='add'>+#define FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB565	(0 &lt;&lt; 11)</div><div class='add'>+#define FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB666	(1 &lt;&lt; 11)</div><div class='add'>+#define FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB888	(2 &lt;&lt; 11)</div><div class='add'>+#define FIMC_REG_CISCCTRL_OUTRGB_FMT_MASK	(3 &lt;&lt; 11)</div><div class='add'>+#define FIMC_REG_CISCCTRL_RGB_EXT		(1 &lt;&lt; 10)</div><div class='add'>+#define FIMC_REG_CISCCTRL_ONE2ONE		(1 &lt;&lt; 9)</div><div class='add'>+#define FIMC_REG_CISCCTRL_MHRATIO(x)		((x) &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_CISCCTRL_MVRATIO(x)		((x) &lt;&lt; 0)</div><div class='add'>+#define FIMC_REG_CISCCTRL_MHRATIO_MASK		(0x1ff &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_CISCCTRL_MVRATIO_MASK		(0x1ff &lt;&lt; 0)</div><div class='add'>+#define FIMC_REG_CISCCTRL_MHRATIO_EXT(x)	(((x) &gt;&gt; 6) &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_CISCCTRL_MVRATIO_EXT(x)	(((x) &gt;&gt; 6) &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* Target area */</div><div class='add'>+#define FIMC_REG_CITAREA			0x5c</div><div class='add'>+#define FIMC_REG_CITAREA_MASK			0x0fffffff</div><div class='add'>+</div><div class='add'>+/* General status */</div><div class='add'>+#define FIMC_REG_CISTATUS			0x64</div><div class='add'>+#define FIMC_REG_CISTATUS_OVFIY			(1 &lt;&lt; 31)</div><div class='add'>+#define FIMC_REG_CISTATUS_OVFICB		(1 &lt;&lt; 30)</div><div class='add'>+#define FIMC_REG_CISTATUS_OVFICR		(1 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CISTATUS_VSYNC			(1 &lt;&lt; 28)</div><div class='add'>+#define FIMC_REG_CISTATUS_FRAMECNT_MASK		(3 &lt;&lt; 26)</div><div class='add'>+#define FIMC_REG_CISTATUS_FRAMECNT_SHIFT	26</div><div class='add'>+#define FIMC_REG_CISTATUS_WINOFF_EN		(1 &lt;&lt; 25)</div><div class='add'>+#define FIMC_REG_CISTATUS_IMGCPT_EN		(1 &lt;&lt; 22)</div><div class='add'>+#define FIMC_REG_CISTATUS_IMGCPT_SCEN		(1 &lt;&lt; 21)</div><div class='add'>+#define FIMC_REG_CISTATUS_VSYNC_A		(1 &lt;&lt; 20)</div><div class='add'>+#define FIMC_REG_CISTATUS_VSYNC_B		(1 &lt;&lt; 19)</div><div class='add'>+#define FIMC_REG_CISTATUS_OVRLB			(1 &lt;&lt; 18)</div><div class='add'>+#define FIMC_REG_CISTATUS_FRAME_END		(1 &lt;&lt; 17)</div><div class='add'>+#define FIMC_REG_CISTATUS_LASTCAPT_END		(1 &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_CISTATUS_VVALID_A		(1 &lt;&lt; 15)</div><div class='add'>+#define FIMC_REG_CISTATUS_VVALID_B		(1 &lt;&lt; 14)</div><div class='add'>+</div><div class='add'>+/* Indexes to the last and the currently processed buffer. */</div><div class='add'>+#define FIMC_REG_CISTATUS2			0x68</div><div class='add'>+</div><div class='add'>+/* Image capture control */</div><div class='add'>+#define FIMC_REG_CIIMGCPT			0xc0</div><div class='add'>+#define FIMC_REG_CIIMGCPT_IMGCPTEN		(1 &lt;&lt; 31)</div><div class='add'>+#define FIMC_REG_CIIMGCPT_IMGCPTEN_SC		(1 &lt;&lt; 30)</div><div class='add'>+#define FIMC_REG_CIIMGCPT_CPT_FREN_ENABLE	(1 &lt;&lt; 25)</div><div class='add'>+#define FIMC_REG_CIIMGCPT_CPT_FRMOD_CNT		(1 &lt;&lt; 18)</div><div class='add'>+</div><div class='add'>+/* Frame capture sequence */</div><div class='add'>+#define FIMC_REG_CICPTSEQ			0xc4</div><div class='add'>+</div><div class='add'>+/* Image effect */</div><div class='add'>+#define FIMC_REG_CIIMGEFF			0xd0</div><div class='add'>+#define FIMC_REG_CIIMGEFF_IE_ENABLE		(1 &lt;&lt; 30)</div><div class='add'>+#define FIMC_REG_CIIMGEFF_IE_SC_BEFORE		(0 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CIIMGEFF_IE_SC_AFTER		(1 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CIIMGEFF_FIN_BYPASS		(0 &lt;&lt; 26)</div><div class='add'>+#define FIMC_REG_CIIMGEFF_FIN_ARBITRARY		(1 &lt;&lt; 26)</div><div class='add'>+#define FIMC_REG_CIIMGEFF_FIN_NEGATIVE		(2 &lt;&lt; 26)</div><div class='add'>+#define FIMC_REG_CIIMGEFF_FIN_ARTFREEZE		(3 &lt;&lt; 26)</div><div class='add'>+#define FIMC_REG_CIIMGEFF_FIN_EMBOSSING		(4 &lt;&lt; 26)</div><div class='add'>+#define FIMC_REG_CIIMGEFF_FIN_SILHOUETTE	(5 &lt;&lt; 26)</div><div class='add'>+#define FIMC_REG_CIIMGEFF_FIN_MASK		(7 &lt;&lt; 26)</div><div class='add'>+#define FIMC_REG_CIIMGEFF_PAT_CBCR_MASK		((0xff &lt;&lt; 13) | 0xff)</div><div class='add'>+</div><div class='add'>+/* Input DMA Y/Cb/Cr plane start address 0/1 */</div><div class='add'>+#define FIMC_REG_CIIYSA(n)			(0xd4 + (n) * 0x70)</div><div class='add'>+#define FIMC_REG_CIICBSA(n)			(0xd8 + (n) * 0x70)</div><div class='add'>+#define FIMC_REG_CIICRSA(n)			(0xdc + (n) * 0x70)</div><div class='add'>+</div><div class='add'>+/* Real input DMA image size */</div><div class='add'>+#define FIMC_REG_CIREAL_ISIZE			0xf8</div><div class='add'>+#define FIMC_REG_CIREAL_ISIZE_AUTOLOAD_EN	(1 &lt;&lt; 31)</div><div class='add'>+#define FIMC_REG_CIREAL_ISIZE_ADDR_CH_DIS	(1 &lt;&lt; 30)</div><div class='add'>+</div><div class='add'>+/* Input DMA control */</div><div class='add'>+#define FIMC_REG_MSCTRL				0xfc</div><div class='add'>+#define FIMC_REG_MSCTRL_IN_BURST_COUNT_MASK	(0xf &lt;&lt; 24)</div><div class='add'>+#define FIMC_REG_MSCTRL_2P_IN_ORDER_MASK	(3 &lt;&lt; 16)</div><div class='add'>+#define FIMC_REG_MSCTRL_2P_IN_ORDER_SHIFT	16</div><div class='add'>+#define FIMC_REG_MSCTRL_C_INT_IN_3PLANE		(0 &lt;&lt; 15)</div><div class='add'>+#define FIMC_REG_MSCTRL_C_INT_IN_2PLANE		(1 &lt;&lt; 15)</div><div class='add'>+#define FIMC_REG_MSCTRL_C_INT_IN_MASK		(1 &lt;&lt; 15)</div><div class='add'>+#define FIMC_REG_MSCTRL_FLIP_SHIFT		13</div><div class='add'>+#define FIMC_REG_MSCTRL_FLIP_MASK		(3 &lt;&lt; 13)</div><div class='add'>+#define FIMC_REG_MSCTRL_FLIP_NORMAL		(0 &lt;&lt; 13)</div><div class='add'>+#define FIMC_REG_MSCTRL_FLIP_X_MIRROR		(1 &lt;&lt; 13)</div><div class='add'>+#define FIMC_REG_MSCTRL_FLIP_Y_MIRROR		(2 &lt;&lt; 13)</div><div class='add'>+#define FIMC_REG_MSCTRL_FLIP_180		(3 &lt;&lt; 13)</div><div class='add'>+#define FIMC_REG_MSCTRL_FIFO_CTRL_FULL		(1 &lt;&lt; 12)</div><div class='add'>+#define FIMC_REG_MSCTRL_ORDER422_SHIFT		4</div><div class='add'>+#define FIMC_REG_MSCTRL_ORDER422_YCBYCR		(0 &lt;&lt; 4)</div><div class='add'>+#define FIMC_REG_MSCTRL_ORDER422_CBYCRY		(1 &lt;&lt; 4)</div><div class='add'>+#define FIMC_REG_MSCTRL_ORDER422_YCRYCB		(2 &lt;&lt; 4)</div><div class='add'>+#define FIMC_REG_MSCTRL_ORDER422_CRYCBY		(3 &lt;&lt; 4)</div><div class='add'>+#define FIMC_REG_MSCTRL_ORDER422_MASK		(3 &lt;&lt; 4)</div><div class='add'>+#define FIMC_REG_MSCTRL_INPUT_EXTCAM		(0 &lt;&lt; 3)</div><div class='add'>+#define FIMC_REG_MSCTRL_INPUT_MEMORY		(1 &lt;&lt; 3)</div><div class='add'>+#define FIMC_REG_MSCTRL_INPUT_MASK		(1 &lt;&lt; 3)</div><div class='add'>+#define FIMC_REG_MSCTRL_INFORMAT_YCBCR420	(0 &lt;&lt; 1)</div><div class='add'>+#define FIMC_REG_MSCTRL_INFORMAT_YCBCR422	(1 &lt;&lt; 1)</div><div class='add'>+#define FIMC_REG_MSCTRL_INFORMAT_YCBCR422_1P	(2 &lt;&lt; 1)</div><div class='add'>+#define FIMC_REG_MSCTRL_INFORMAT_RGB		(3 &lt;&lt; 1)</div><div class='add'>+#define FIMC_REG_MSCTRL_INFORMAT_MASK		(3 &lt;&lt; 1)</div><div class='add'>+#define FIMC_REG_MSCTRL_ENVID			(1 &lt;&lt; 0)</div><div class='add'>+#define FIMC_REG_MSCTRL_IN_BURST_COUNT(x)	((x) &lt;&lt; 24)</div><div class='add'>+</div><div class='add'>+/* Output DMA Y/Cb/Cr offset */</div><div class='add'>+#define FIMC_REG_CIOYOFF			0x168</div><div class='add'>+#define FIMC_REG_CIOCBOFF			0x16c</div><div class='add'>+#define FIMC_REG_CIOCROFF			0x170</div><div class='add'>+</div><div class='add'>+/* Input DMA Y/Cb/Cr offset */</div><div class='add'>+#define FIMC_REG_CIIYOFF			0x174</div><div class='add'>+#define FIMC_REG_CIICBOFF			0x178</div><div class='add'>+#define FIMC_REG_CIICROFF			0x17c</div><div class='add'>+</div><div class='add'>+/* Input DMA original image size */</div><div class='add'>+#define FIMC_REG_ORGISIZE			0x180</div><div class='add'>+</div><div class='add'>+/* Output DMA original image size */</div><div class='add'>+#define FIMC_REG_ORGOSIZE			0x184</div><div class='add'>+</div><div class='add'>+/* Real output DMA image size (extension register) */</div><div class='add'>+#define FIMC_REG_CIEXTEN			0x188</div><div class='add'>+#define FIMC_REG_CIEXTEN_MHRATIO_EXT(x)		(((x) &amp; 0x3f) &lt;&lt; 10)</div><div class='add'>+#define FIMC_REG_CIEXTEN_MVRATIO_EXT(x)		((x) &amp; 0x3f)</div><div class='add'>+#define FIMC_REG_CIEXTEN_MHRATIO_EXT_MASK	(0x3f &lt;&lt; 10)</div><div class='add'>+#define FIMC_REG_CIEXTEN_MVRATIO_EXT_MASK	0x3f</div><div class='add'>+</div><div class='add'>+#define FIMC_REG_CIDMAPARAM			0x18c</div><div class='add'>+#define FIMC_REG_CIDMAPARAM_R_LINEAR		(0 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CIDMAPARAM_R_64X32		(3 &lt;&lt; 29)</div><div class='add'>+#define FIMC_REG_CIDMAPARAM_W_LINEAR		(0 &lt;&lt; 13)</div><div class='add'>+#define FIMC_REG_CIDMAPARAM_W_64X32		(3 &lt;&lt; 13)</div><div class='add'>+#define FIMC_REG_CIDMAPARAM_TILE_MASK		((3 &lt;&lt; 29) | (3 &lt;&lt; 13))</div><div class='add'>+</div><div class='add'>+/* MIPI CSI image format */</div><div class='add'>+#define FIMC_REG_CSIIMGFMT			0x194</div><div class='add'>+#define FIMC_REG_CSIIMGFMT_YCBCR422_8BIT	0x1e</div><div class='add'>+#define FIMC_REG_CSIIMGFMT_RAW8			0x2a</div><div class='add'>+#define FIMC_REG_CSIIMGFMT_RAW10		0x2b</div><div class='add'>+#define FIMC_REG_CSIIMGFMT_RAW12		0x2c</div><div class='add'>+/* User defined formats. x = 0...16. */</div><div class='add'>+#define FIMC_REG_CSIIMGFMT_USER(x)		(0x30 + x - 1)</div><div class='add'>+</div><div class='add'>+/* Output frame buffer sequence mask */</div><div class='add'>+#define FIMC_REG_CIFCNTSEQ			0x1fc</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Function declarations</div><div class='add'>+ */</div><div class='add'>+void fimc_hw_reset(struct fimc_dev *fimc);</div><div class='add'>+void fimc_hw_set_rotation(struct fimc_ctx *ctx);</div><div class='add'>+void fimc_hw_set_target_format(struct fimc_ctx *ctx);</div><div class='add'>+void fimc_hw_set_out_dma(struct fimc_ctx *ctx);</div><div class='add'>+void fimc_hw_en_lastirq(struct fimc_dev *fimc, int enable);</div><div class='add'>+void fimc_hw_en_irq(struct fimc_dev *fimc, int enable);</div><div class='add'>+void fimc_hw_set_prescaler(struct fimc_ctx *ctx);</div><div class='add'>+void fimc_hw_set_mainscaler(struct fimc_ctx *ctx);</div><div class='add'>+void fimc_hw_en_capture(struct fimc_ctx *ctx);</div><div class='add'>+void fimc_hw_set_effect(struct fimc_ctx *ctx);</div><div class='add'>+void fimc_hw_set_rgb_alpha(struct fimc_ctx *ctx);</div><div class='add'>+void fimc_hw_set_in_dma(struct fimc_ctx *ctx);</div><div class='add'>+void fimc_hw_set_input_path(struct fimc_ctx *ctx);</div><div class='add'>+void fimc_hw_set_output_path(struct fimc_ctx *ctx);</div><div class='add'>+void fimc_hw_set_input_addr(struct fimc_dev *fimc, struct fimc_addr *paddr);</div><div class='add'>+void fimc_hw_set_output_addr(struct fimc_dev *fimc, struct fimc_addr *paddr,</div><div class='add'>+			     int index);</div><div class='add'>+int fimc_hw_set_camera_source(struct fimc_dev *fimc,</div><div class='add'>+			      struct s5p_fimc_isp_info *cam);</div><div class='add'>+void fimc_hw_set_camera_offset(struct fimc_dev *fimc, struct fimc_frame *f);</div><div class='add'>+int fimc_hw_set_camera_polarity(struct fimc_dev *fimc,</div><div class='add'>+				struct s5p_fimc_isp_info *cam);</div><div class='add'>+int fimc_hw_set_camera_type(struct fimc_dev *fimc,</div><div class='add'>+			    struct s5p_fimc_isp_info *cam);</div><div class='add'>+void fimc_hw_clear_irq(struct fimc_dev *dev);</div><div class='add'>+void fimc_hw_enable_scaler(struct fimc_dev *dev, bool on);</div><div class='add'>+void fimc_hw_activate_input_dma(struct fimc_dev *dev, bool on);</div><div class='add'>+void fimc_hw_dis_capture(struct fimc_dev *dev);</div><div class='add'>+u32 fimc_hw_get_frame_index(struct fimc_dev *dev);</div><div class='add'>+void fimc_activate_capture(struct fimc_ctx *ctx);</div><div class='add'>+void fimc_deactivate_capture(struct fimc_dev *fimc);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fimc_hw_set_dma_seq - configure output DMA buffer sequence</div><div class='add'>+ * @mask: bitmask for the DMA output buffer registers, set to 0 to skip buffer</div><div class='add'>+ * This function masks output DMA ring buffers, it allows to select which of</div><div class='add'>+ * the 32 available output buffer address registers will be used by the DMA</div><div class='add'>+ * engine.</div><div class='add'>+ */</div><div class='add'>+static inline void fimc_hw_set_dma_seq(struct fimc_dev *dev, u32 mask)</div><div class='add'>+{</div><div class='add'>+	writel(mask, dev-&gt;regs + FIMC_REG_CIFCNTSEQ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* FIMC_REG_H_ */</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/mipi-csis.c b/drivers/media/video/s5p-fimc/mipi-csis.c<br/>index f44f690397f7..2f73d9e3d0b7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/mipi-csis.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-fimc/mipi-csis.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/mipi-csis.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-fimc/mipi-csis.c</a></div><div class='hunk'>@@ -127,20 +127,24 @@ struct csis_state {</div><div class='ctx'>  *                       multiple of 2^pix_width_alignment</div><div class='ctx'>  * @code: corresponding media bus code</div><div class='ctx'>  * @fmt_reg: S5PCSIS_CONFIG register value</div><div class='add'>+ * @data_alignment: MIPI-CSI data alignment in bits</div><div class='ctx'>  */</div><div class='ctx'> struct csis_pix_format {</div><div class='ctx'> 	unsigned int pix_width_alignment;</div><div class='ctx'> 	enum v4l2_mbus_pixelcode code;</div><div class='ctx'> 	u32 fmt_reg;</div><div class='add'>+	u8 data_alignment;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct csis_pix_format s5pcsis_formats[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.code = V4L2_MBUS_FMT_VYUY8_2X8,</div><div class='ctx'> 		.fmt_reg = S5PCSIS_CFG_FMT_YCBCR422_8BIT,</div><div class='add'>+		.data_alignment = 32,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.code = V4L2_MBUS_FMT_JPEG_1X8,</div><div class='ctx'> 		.fmt_reg = S5PCSIS_CFG_FMT_USER(1),</div><div class='add'>+		.data_alignment = 32,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -239,7 +243,7 @@ static void s5pcsis_set_params(struct csis_state *state)</div><div class='ctx'> 	s5pcsis_set_hsync_settle(state, pdata-&gt;hs_settle);</div><div class='ctx'> </div><div class='ctx'> 	val = s5pcsis_read(state, S5PCSIS_CTRL);</div><div class='del'>-	if (pdata-&gt;alignment == 32)</div><div class='add'>+	if (state-&gt;csis_fmt-&gt;data_alignment == 32)</div><div class='ctx'> 		val |= S5PCSIS_CTRL_ALIGN_32BIT;</div><div class='ctx'> 	else /* 24-bits */</div><div class='ctx'> 		val &amp;= ~S5PCSIS_CTRL_ALIGN_32BIT;</div><div class='hunk'>@@ -711,19 +715,8 @@ static struct platform_driver s5pcsis_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init s5pcsis_init(void)</div><div class='del'>-{</div><div class='del'>-	return platform_driver_probe(&amp;s5pcsis_driver, s5pcsis_probe);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit s5pcsis_exit(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;s5pcsis_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(s5pcsis_init);</div><div class='del'>-module_exit(s5pcsis_exit);</div><div class='add'>+module_platform_driver(s5pcsis_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("S5P/EXYNOS4 MIPI CSI receiver driver");</div><div class='add'>+MODULE_DESCRIPTION("Samsung S5P/EXYNOS SoC MIPI-CSI2 receiver driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/media/video/s5p-fimc/regs-fimc.h b/drivers/media/video/s5p-fimc/regs-fimc.h<br/>deleted file mode 100644<br/>index c7a5bc51d571..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-fimc/regs-fimc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-fimc/regs-fimc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,301 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Register definition file for Samsung Camera Interface (FIMC) driver</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2010 Samsung Electronics</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef REGS_FIMC_H_</div><div class='del'>-#define REGS_FIMC_H_</div><div class='del'>-</div><div class='del'>-/* Input source format */</div><div class='del'>-#define S5P_CISRCFMT			0x00</div><div class='del'>-#define S5P_CISRCFMT_ITU601_8BIT	(1 &lt;&lt; 31)</div><div class='del'>-#define S5P_CISRCFMT_ITU601_16BIT	(1 &lt;&lt; 29)</div><div class='del'>-#define S5P_CISRCFMT_ORDER422_YCBYCR	(0 &lt;&lt; 14)</div><div class='del'>-#define S5P_CISRCFMT_ORDER422_YCRYCB	(1 &lt;&lt; 14)</div><div class='del'>-#define S5P_CISRCFMT_ORDER422_CBYCRY	(2 &lt;&lt; 14)</div><div class='del'>-#define S5P_CISRCFMT_ORDER422_CRYCBY	(3 &lt;&lt; 14)</div><div class='del'>-#define S5P_CISRCFMT_HSIZE(x)		((x) &lt;&lt; 16)</div><div class='del'>-#define S5P_CISRCFMT_VSIZE(x)		((x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* Window offset */</div><div class='del'>-#define S5P_CIWDOFST			0x04</div><div class='del'>-#define S5P_CIWDOFST_OFF_EN		(1 &lt;&lt; 31)</div><div class='del'>-#define S5P_CIWDOFST_CLROVFIY		(1 &lt;&lt; 30)</div><div class='del'>-#define S5P_CIWDOFST_CLROVRLB		(1 &lt;&lt; 29)</div><div class='del'>-#define S5P_CIWDOFST_HOROFF_MASK	(0x7ff &lt;&lt; 16)</div><div class='del'>-#define S5P_CIWDOFST_CLROVFICB		(1 &lt;&lt; 15)</div><div class='del'>-#define S5P_CIWDOFST_CLROVFICR		(1 &lt;&lt; 14)</div><div class='del'>-#define S5P_CIWDOFST_HOROFF(x)		((x) &lt;&lt; 16)</div><div class='del'>-#define S5P_CIWDOFST_VEROFF(x)		((x) &lt;&lt; 0)</div><div class='del'>-#define S5P_CIWDOFST_VEROFF_MASK	(0xfff &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* Global control */</div><div class='del'>-#define S5P_CIGCTRL			0x08</div><div class='del'>-#define S5P_CIGCTRL_SWRST		(1 &lt;&lt; 31)</div><div class='del'>-#define S5P_CIGCTRL_CAMRST_A		(1 &lt;&lt; 30)</div><div class='del'>-#define S5P_CIGCTRL_SELCAM_ITU_A	(1 &lt;&lt; 29)</div><div class='del'>-#define S5P_CIGCTRL_TESTPAT_NORMAL	(0 &lt;&lt; 27)</div><div class='del'>-#define S5P_CIGCTRL_TESTPAT_COLOR_BAR	(1 &lt;&lt; 27)</div><div class='del'>-#define S5P_CIGCTRL_TESTPAT_HOR_INC	(2 &lt;&lt; 27)</div><div class='del'>-#define S5P_CIGCTRL_TESTPAT_VER_INC	(3 &lt;&lt; 27)</div><div class='del'>-#define S5P_CIGCTRL_TESTPAT_MASK	(3 &lt;&lt; 27)</div><div class='del'>-#define S5P_CIGCTRL_TESTPAT_SHIFT	(27)</div><div class='del'>-#define S5P_CIGCTRL_INVPOLPCLK		(1 &lt;&lt; 26)</div><div class='del'>-#define S5P_CIGCTRL_INVPOLVSYNC		(1 &lt;&lt; 25)</div><div class='del'>-#define S5P_CIGCTRL_INVPOLHREF		(1 &lt;&lt; 24)</div><div class='del'>-#define S5P_CIGCTRL_IRQ_OVFEN		(1 &lt;&lt; 22)</div><div class='del'>-#define S5P_CIGCTRL_HREF_MASK		(1 &lt;&lt; 21)</div><div class='del'>-#define S5P_CIGCTRL_IRQ_LEVEL		(1 &lt;&lt; 20)</div><div class='del'>-#define S5P_CIGCTRL_IRQ_CLR		(1 &lt;&lt; 19)</div><div class='del'>-#define S5P_CIGCTRL_IRQ_ENABLE		(1 &lt;&lt; 16)</div><div class='del'>-#define S5P_CIGCTRL_SHDW_DISABLE	(1 &lt;&lt; 12)</div><div class='del'>-#define S5P_CIGCTRL_CAM_JPEG		(1 &lt;&lt; 8)</div><div class='del'>-#define S5P_CIGCTRL_SELCAM_MIPI_A	(1 &lt;&lt; 7)</div><div class='del'>-#define S5P_CIGCTRL_CAMIF_SELWB		(1 &lt;&lt; 6)</div><div class='del'>-/* 0 - ITU601; 1 - ITU709 */</div><div class='del'>-#define S5P_CIGCTRL_CSC_ITU601_709	(1 &lt;&lt; 5)</div><div class='del'>-#define S5P_CIGCTRL_INVPOLHSYNC		(1 &lt;&lt; 4)</div><div class='del'>-#define S5P_CIGCTRL_SELCAM_MIPI		(1 &lt;&lt; 3)</div><div class='del'>-#define S5P_CIGCTRL_INVPOLFIELD		(1 &lt;&lt; 1)</div><div class='del'>-#define S5P_CIGCTRL_INTERLACE		(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* Window offset 2 */</div><div class='del'>-#define S5P_CIWDOFST2			0x14</div><div class='del'>-#define S5P_CIWDOFST2_HOROFF_MASK	(0xfff &lt;&lt; 16)</div><div class='del'>-#define S5P_CIWDOFST2_VEROFF_MASK	(0xfff &lt;&lt; 0)</div><div class='del'>-#define S5P_CIWDOFST2_HOROFF(x)		((x) &lt;&lt; 16)</div><div class='del'>-#define S5P_CIWDOFST2_VEROFF(x)		((x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* Output DMA Y/Cb/Cr plane start addresses */</div><div class='del'>-#define S5P_CIOYSA(n)			(0x18 + (n) * 4)</div><div class='del'>-#define S5P_CIOCBSA(n)			(0x28 + (n) * 4)</div><div class='del'>-#define S5P_CIOCRSA(n)			(0x38 + (n) * 4)</div><div class='del'>-</div><div class='del'>-/* Target image format */</div><div class='del'>-#define S5P_CITRGFMT			0x48</div><div class='del'>-#define S5P_CITRGFMT_INROT90		(1 &lt;&lt; 31)</div><div class='del'>-#define S5P_CITRGFMT_YCBCR420		(0 &lt;&lt; 29)</div><div class='del'>-#define S5P_CITRGFMT_YCBCR422		(1 &lt;&lt; 29)</div><div class='del'>-#define S5P_CITRGFMT_YCBCR422_1P	(2 &lt;&lt; 29)</div><div class='del'>-#define S5P_CITRGFMT_RGB		(3 &lt;&lt; 29)</div><div class='del'>-#define S5P_CITRGFMT_FMT_MASK		(3 &lt;&lt; 29)</div><div class='del'>-#define S5P_CITRGFMT_HSIZE_MASK		(0xfff &lt;&lt; 16)</div><div class='del'>-#define S5P_CITRGFMT_FLIP_SHIFT		(14)</div><div class='del'>-#define S5P_CITRGFMT_FLIP_NORMAL	(0 &lt;&lt; 14)</div><div class='del'>-#define S5P_CITRGFMT_FLIP_X_MIRROR	(1 &lt;&lt; 14)</div><div class='del'>-#define S5P_CITRGFMT_FLIP_Y_MIRROR	(2 &lt;&lt; 14)</div><div class='del'>-#define S5P_CITRGFMT_FLIP_180		(3 &lt;&lt; 14)</div><div class='del'>-#define S5P_CITRGFMT_FLIP_MASK		(3 &lt;&lt; 14)</div><div class='del'>-#define S5P_CITRGFMT_OUTROT90		(1 &lt;&lt; 13)</div><div class='del'>-#define S5P_CITRGFMT_VSIZE_MASK		(0xfff &lt;&lt; 0)</div><div class='del'>-#define S5P_CITRGFMT_HSIZE(x)		((x) &lt;&lt; 16)</div><div class='del'>-#define S5P_CITRGFMT_VSIZE(x)		((x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* Output DMA control */</div><div class='del'>-#define S5P_CIOCTRL			0x4c</div><div class='del'>-#define S5P_CIOCTRL_ORDER422_MASK	(3 &lt;&lt; 0)</div><div class='del'>-#define S5P_CIOCTRL_ORDER422_CRYCBY	(0 &lt;&lt; 0)</div><div class='del'>-#define S5P_CIOCTRL_ORDER422_CBYCRY	(1 &lt;&lt; 0)</div><div class='del'>-#define S5P_CIOCTRL_ORDER422_YCRYCB	(2 &lt;&lt; 0)</div><div class='del'>-#define S5P_CIOCTRL_ORDER422_YCBYCR	(3 &lt;&lt; 0)</div><div class='del'>-#define S5P_CIOCTRL_LASTIRQ_ENABLE	(1 &lt;&lt; 2)</div><div class='del'>-#define S5P_CIOCTRL_YCBCR_3PLANE	(0 &lt;&lt; 3)</div><div class='del'>-#define S5P_CIOCTRL_YCBCR_2PLANE	(1 &lt;&lt; 3)</div><div class='del'>-#define S5P_CIOCTRL_YCBCR_PLANE_MASK	(1 &lt;&lt; 3)</div><div class='del'>-#define S5P_CIOCTRL_ALPHA_OUT_MASK	(0xff &lt;&lt; 4)</div><div class='del'>-#define S5P_CIOCTRL_RGB16FMT_MASK	(3 &lt;&lt; 16)</div><div class='del'>-#define S5P_CIOCTRL_RGB565		(0 &lt;&lt; 16)</div><div class='del'>-#define S5P_CIOCTRL_ARGB1555		(1 &lt;&lt; 16)</div><div class='del'>-#define S5P_CIOCTRL_ARGB4444		(2 &lt;&lt; 16)</div><div class='del'>-#define S5P_CIOCTRL_ORDER2P_SHIFT	(24)</div><div class='del'>-#define S5P_CIOCTRL_ORDER2P_MASK	(3 &lt;&lt; 24)</div><div class='del'>-#define S5P_CIOCTRL_ORDER422_2P_LSB_CRCB (0 &lt;&lt; 24)</div><div class='del'>-</div><div class='del'>-/* Pre-scaler control 1 */</div><div class='del'>-#define S5P_CISCPRERATIO		0x50</div><div class='del'>-#define S5P_CISCPRERATIO_SHFACTOR(x)	((x) &lt;&lt; 28)</div><div class='del'>-#define S5P_CISCPRERATIO_HOR(x)		((x) &lt;&lt; 16)</div><div class='del'>-#define S5P_CISCPRERATIO_VER(x)		((x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define S5P_CISCPREDST			0x54</div><div class='del'>-#define S5P_CISCPREDST_WIDTH(x)		((x) &lt;&lt; 16)</div><div class='del'>-#define S5P_CISCPREDST_HEIGHT(x)	((x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* Main scaler control */</div><div class='del'>-#define S5P_CISCCTRL			0x58</div><div class='del'>-#define S5P_CISCCTRL_SCALERBYPASS	(1 &lt;&lt; 31)</div><div class='del'>-#define S5P_CISCCTRL_SCALEUP_H		(1 &lt;&lt; 30)</div><div class='del'>-#define S5P_CISCCTRL_SCALEUP_V		(1 &lt;&lt; 29)</div><div class='del'>-#define S5P_CISCCTRL_CSCR2Y_WIDE	(1 &lt;&lt; 28)</div><div class='del'>-#define S5P_CISCCTRL_CSCY2R_WIDE	(1 &lt;&lt; 27)</div><div class='del'>-#define S5P_CISCCTRL_LCDPATHEN_FIFO	(1 &lt;&lt; 26)</div><div class='del'>-#define S5P_CISCCTRL_INTERLACE		(1 &lt;&lt; 25)</div><div class='del'>-#define S5P_CISCCTRL_SCALERSTART	(1 &lt;&lt; 15)</div><div class='del'>-#define S5P_CISCCTRL_INRGB_FMT_RGB565	(0 &lt;&lt; 13)</div><div class='del'>-#define S5P_CISCCTRL_INRGB_FMT_RGB666	(1 &lt;&lt; 13)</div><div class='del'>-#define S5P_CISCCTRL_INRGB_FMT_RGB888	(2 &lt;&lt; 13)</div><div class='del'>-#define S5P_CISCCTRL_INRGB_FMT_MASK	(3 &lt;&lt; 13)</div><div class='del'>-#define S5P_CISCCTRL_OUTRGB_FMT_RGB565	(0 &lt;&lt; 11)</div><div class='del'>-#define S5P_CISCCTRL_OUTRGB_FMT_RGB666	(1 &lt;&lt; 11)</div><div class='del'>-#define S5P_CISCCTRL_OUTRGB_FMT_RGB888	(2 &lt;&lt; 11)</div><div class='del'>-#define S5P_CISCCTRL_OUTRGB_FMT_MASK	(3 &lt;&lt; 11)</div><div class='del'>-#define S5P_CISCCTRL_RGB_EXT		(1 &lt;&lt; 10)</div><div class='del'>-#define S5P_CISCCTRL_ONE2ONE		(1 &lt;&lt; 9)</div><div class='del'>-#define S5P_CISCCTRL_MHRATIO(x)		((x) &lt;&lt; 16)</div><div class='del'>-#define S5P_CISCCTRL_MVRATIO(x)		((x) &lt;&lt; 0)</div><div class='del'>-#define S5P_CISCCTRL_MHRATIO_MASK	(0x1ff &lt;&lt; 16)</div><div class='del'>-#define S5P_CISCCTRL_MVRATIO_MASK	(0x1ff &lt;&lt; 0)</div><div class='del'>-#define S5P_CISCCTRL_MHRATIO_EXT(x)	(((x) &gt;&gt; 6) &lt;&lt; 16)</div><div class='del'>-#define S5P_CISCCTRL_MVRATIO_EXT(x)	(((x) &gt;&gt; 6) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* Target area */</div><div class='del'>-#define S5P_CITAREA			0x5c</div><div class='del'>-#define S5P_CITAREA_MASK		0x0fffffff</div><div class='del'>-</div><div class='del'>-/* General status */</div><div class='del'>-#define S5P_CISTATUS			0x64</div><div class='del'>-#define S5P_CISTATUS_OVFIY		(1 &lt;&lt; 31)</div><div class='del'>-#define S5P_CISTATUS_OVFICB		(1 &lt;&lt; 30)</div><div class='del'>-#define S5P_CISTATUS_OVFICR		(1 &lt;&lt; 29)</div><div class='del'>-#define S5P_CISTATUS_VSYNC		(1 &lt;&lt; 28)</div><div class='del'>-#define S5P_CISTATUS_FRAMECNT_MASK	(3 &lt;&lt; 26)</div><div class='del'>-#define S5P_CISTATUS_FRAMECNT_SHIFT	26</div><div class='del'>-#define S5P_CISTATUS_WINOFF_EN		(1 &lt;&lt; 25)</div><div class='del'>-#define S5P_CISTATUS_IMGCPT_EN		(1 &lt;&lt; 22)</div><div class='del'>-#define S5P_CISTATUS_IMGCPT_SCEN	(1 &lt;&lt; 21)</div><div class='del'>-#define S5P_CISTATUS_VSYNC_A		(1 &lt;&lt; 20)</div><div class='del'>-#define S5P_CISTATUS_VSYNC_B		(1 &lt;&lt; 19)</div><div class='del'>-#define S5P_CISTATUS_OVRLB		(1 &lt;&lt; 18)</div><div class='del'>-#define S5P_CISTATUS_FRAME_END		(1 &lt;&lt; 17)</div><div class='del'>-#define S5P_CISTATUS_LASTCAPT_END	(1 &lt;&lt; 16)</div><div class='del'>-#define S5P_CISTATUS_VVALID_A		(1 &lt;&lt; 15)</div><div class='del'>-#define S5P_CISTATUS_VVALID_B		(1 &lt;&lt; 14)</div><div class='del'>-</div><div class='del'>-/* Indexes to the last and the currently processed buffer. */</div><div class='del'>-#define S5P_CISTATUS2			0x68</div><div class='del'>-</div><div class='del'>-/* Image capture control */</div><div class='del'>-#define S5P_CIIMGCPT			0xc0</div><div class='del'>-#define S5P_CIIMGCPT_IMGCPTEN		(1 &lt;&lt; 31)</div><div class='del'>-#define S5P_CIIMGCPT_IMGCPTEN_SC	(1 &lt;&lt; 30)</div><div class='del'>-#define S5P_CIIMGCPT_CPT_FREN_ENABLE	(1 &lt;&lt; 25)</div><div class='del'>-#define S5P_CIIMGCPT_CPT_FRMOD_CNT	(1 &lt;&lt; 18)</div><div class='del'>-</div><div class='del'>-/* Frame capture sequence */</div><div class='del'>-#define S5P_CICPTSEQ			0xc4</div><div class='del'>-</div><div class='del'>-/* Image effect */</div><div class='del'>-#define S5P_CIIMGEFF			0xd0</div><div class='del'>-#define S5P_CIIMGEFF_IE_ENABLE		(1 &lt;&lt; 30)</div><div class='del'>-#define S5P_CIIMGEFF_IE_SC_BEFORE	(0 &lt;&lt; 29)</div><div class='del'>-#define S5P_CIIMGEFF_IE_SC_AFTER	(1 &lt;&lt; 29)</div><div class='del'>-#define S5P_CIIMGEFF_FIN_BYPASS		(0 &lt;&lt; 26)</div><div class='del'>-#define S5P_CIIMGEFF_FIN_ARBITRARY	(1 &lt;&lt; 26)</div><div class='del'>-#define S5P_CIIMGEFF_FIN_NEGATIVE	(2 &lt;&lt; 26)</div><div class='del'>-#define S5P_CIIMGEFF_FIN_ARTFREEZE	(3 &lt;&lt; 26)</div><div class='del'>-#define S5P_CIIMGEFF_FIN_EMBOSSING	(4 &lt;&lt; 26)</div><div class='del'>-#define S5P_CIIMGEFF_FIN_SILHOUETTE	(5 &lt;&lt; 26)</div><div class='del'>-#define S5P_CIIMGEFF_FIN_MASK		(7 &lt;&lt; 26)</div><div class='del'>-#define S5P_CIIMGEFF_PAT_CBCR_MASK	((0xff &lt; 13) | (0xff &lt; 0))</div><div class='del'>-#define S5P_CIIMGEFF_PAT_CB(x)		((x) &lt;&lt; 13)</div><div class='del'>-#define S5P_CIIMGEFF_PAT_CR(x)		((x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* Input DMA Y/Cb/Cr plane start address 0/1 */</div><div class='del'>-#define S5P_CIIYSA(n)			(0xd4 + (n) * 0x70)</div><div class='del'>-#define S5P_CIICBSA(n)			(0xd8 + (n) * 0x70)</div><div class='del'>-#define S5P_CIICRSA(n)			(0xdc + (n) * 0x70)</div><div class='del'>-</div><div class='del'>-/* Real input DMA image size */</div><div class='del'>-#define S5P_CIREAL_ISIZE		0xf8</div><div class='del'>-#define S5P_CIREAL_ISIZE_AUTOLOAD_EN	(1 &lt;&lt; 31)</div><div class='del'>-#define S5P_CIREAL_ISIZE_ADDR_CH_DIS	(1 &lt;&lt; 30)</div><div class='del'>-#define S5P_CIREAL_ISIZE_HEIGHT(x)	((x) &lt;&lt; 16)</div><div class='del'>-#define S5P_CIREAL_ISIZE_WIDTH(x)	((x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Input DMA control */</div><div class='del'>-#define S5P_MSCTRL			0xfc</div><div class='del'>-#define S5P_MSCTRL_IN_BURST_COUNT_MASK	(0xF &lt;&lt; 24)</div><div class='del'>-#define S5P_MSCTRL_2P_IN_ORDER_MASK	(3 &lt;&lt; 16)</div><div class='del'>-#define S5P_MSCTRL_2P_IN_ORDER_SHIFT	16</div><div class='del'>-#define S5P_MSCTRL_C_INT_IN_3PLANE	(0 &lt;&lt; 15)</div><div class='del'>-#define S5P_MSCTRL_C_INT_IN_2PLANE	(1 &lt;&lt; 15)</div><div class='del'>-#define S5P_MSCTRL_C_INT_IN_MASK	(1 &lt;&lt; 15)</div><div class='del'>-#define S5P_MSCTRL_FLIP_SHIFT		13</div><div class='del'>-#define S5P_MSCTRL_FLIP_MASK		(3 &lt;&lt; 13)</div><div class='del'>-#define S5P_MSCTRL_FLIP_NORMAL		(0 &lt;&lt; 13)</div><div class='del'>-#define S5P_MSCTRL_FLIP_X_MIRROR	(1 &lt;&lt; 13)</div><div class='del'>-#define S5P_MSCTRL_FLIP_Y_MIRROR	(2 &lt;&lt; 13)</div><div class='del'>-#define S5P_MSCTRL_FLIP_180		(3 &lt;&lt; 13)</div><div class='del'>-#define S5P_MSCTRL_FIFO_CTRL_FULL	(1 &lt;&lt; 12)</div><div class='del'>-#define S5P_MSCTRL_ORDER422_SHIFT	4</div><div class='del'>-#define S5P_MSCTRL_ORDER422_YCBYCR	(0 &lt;&lt; 4)</div><div class='del'>-#define S5P_MSCTRL_ORDER422_CBYCRY	(1 &lt;&lt; 4)</div><div class='del'>-#define S5P_MSCTRL_ORDER422_YCRYCB	(2 &lt;&lt; 4)</div><div class='del'>-#define S5P_MSCTRL_ORDER422_CRYCBY	(3 &lt;&lt; 4)</div><div class='del'>-#define S5P_MSCTRL_ORDER422_MASK	(3 &lt;&lt; 4)</div><div class='del'>-#define S5P_MSCTRL_INPUT_EXTCAM		(0 &lt;&lt; 3)</div><div class='del'>-#define S5P_MSCTRL_INPUT_MEMORY		(1 &lt;&lt; 3)</div><div class='del'>-#define S5P_MSCTRL_INPUT_MASK		(1 &lt;&lt; 3)</div><div class='del'>-#define S5P_MSCTRL_INFORMAT_YCBCR420	(0 &lt;&lt; 1)</div><div class='del'>-#define S5P_MSCTRL_INFORMAT_YCBCR422	(1 &lt;&lt; 1)</div><div class='del'>-#define S5P_MSCTRL_INFORMAT_YCBCR422_1P	(2 &lt;&lt; 1)</div><div class='del'>-#define S5P_MSCTRL_INFORMAT_RGB		(3 &lt;&lt; 1)</div><div class='del'>-#define S5P_MSCTRL_INFORMAT_MASK	(3 &lt;&lt; 1)</div><div class='del'>-#define S5P_MSCTRL_ENVID		(1 &lt;&lt; 0)</div><div class='del'>-#define S5P_MSCTRL_IN_BURST_COUNT(x)	((x) &lt;&lt; 24)</div><div class='del'>-</div><div class='del'>-/* Output DMA Y/Cb/Cr offset */</div><div class='del'>-#define S5P_CIOYOFF			0x168</div><div class='del'>-#define S5P_CIOCBOFF			0x16c</div><div class='del'>-#define S5P_CIOCROFF			0x170</div><div class='del'>-</div><div class='del'>-/* Input DMA Y/Cb/Cr offset */</div><div class='del'>-#define S5P_CIIYOFF			0x174</div><div class='del'>-#define S5P_CIICBOFF			0x178</div><div class='del'>-#define S5P_CIICROFF			0x17c</div><div class='del'>-</div><div class='del'>-#define S5P_CIO_OFFS_VER(x)		((x) &lt;&lt; 16)</div><div class='del'>-#define S5P_CIO_OFFS_HOR(x)		((x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* Input DMA original image size */</div><div class='del'>-#define S5P_ORGISIZE			0x180</div><div class='del'>-</div><div class='del'>-/* Output DMA original image size */</div><div class='del'>-#define S5P_ORGOSIZE			0x184</div><div class='del'>-</div><div class='del'>-#define S5P_ORIG_SIZE_VER(x)		((x) &lt;&lt; 16)</div><div class='del'>-#define S5P_ORIG_SIZE_HOR(x)		((x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* Real output DMA image size (extension register) */</div><div class='del'>-#define S5P_CIEXTEN			0x188</div><div class='del'>-#define S5P_CIEXTEN_MHRATIO_EXT(x)	(((x) &amp; 0x3f) &lt;&lt; 10)</div><div class='del'>-#define S5P_CIEXTEN_MVRATIO_EXT(x)	((x) &amp; 0x3f)</div><div class='del'>-#define S5P_CIEXTEN_MHRATIO_EXT_MASK	(0x3f &lt;&lt; 10)</div><div class='del'>-#define S5P_CIEXTEN_MVRATIO_EXT_MASK	0x3f</div><div class='del'>-</div><div class='del'>-#define S5P_CIDMAPARAM			0x18c</div><div class='del'>-#define S5P_CIDMAPARAM_R_LINEAR		(0 &lt;&lt; 29)</div><div class='del'>-#define S5P_CIDMAPARAM_R_64X32		(3 &lt;&lt; 29)</div><div class='del'>-#define S5P_CIDMAPARAM_W_LINEAR		(0 &lt;&lt; 13)</div><div class='del'>-#define S5P_CIDMAPARAM_W_64X32		(3 &lt;&lt; 13)</div><div class='del'>-#define S5P_CIDMAPARAM_TILE_MASK	((3 &lt;&lt; 29) | (3 &lt;&lt; 13))</div><div class='del'>-</div><div class='del'>-/* MIPI CSI image format */</div><div class='del'>-#define S5P_CSIIMGFMT			0x194</div><div class='del'>-#define S5P_CSIIMGFMT_YCBCR422_8BIT	0x1e</div><div class='del'>-#define S5P_CSIIMGFMT_RAW8		0x2a</div><div class='del'>-#define S5P_CSIIMGFMT_RAW10		0x2b</div><div class='del'>-#define S5P_CSIIMGFMT_RAW12		0x2c</div><div class='del'>-/* User defined formats. x = 0...16. */</div><div class='del'>-#define S5P_CSIIMGFMT_USER(x)		(0x30 + x - 1)</div><div class='del'>-</div><div class='del'>-/* Output frame buffer sequence mask */</div><div class='del'>-#define S5P_CIFCNTSEQ			0x1FC</div><div class='del'>-</div><div class='del'>-#endif /* REGS_FIMC_H_ */</div><div class='head'>diff --git a/drivers/media/video/s5p-g2d/g2d.c b/drivers/media/video/s5p-g2d/g2d.c<br/>index 789de74014e5..7c98ee7377ee 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-g2d/g2d.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-g2d/g2d.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-g2d/g2d.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-g2d/g2d.c</a></div><div class='hunk'>@@ -65,7 +65,7 @@ static struct g2d_fmt formats[] = {</div><div class='ctx'> };</div><div class='ctx'> #define NUM_FORMATS ARRAY_SIZE(formats)</div><div class='ctx'> </div><div class='del'>-struct g2d_frame def_frame = {</div><div class='add'>+static struct g2d_frame def_frame = {</div><div class='ctx'> 	.width		= DEFAULT_WIDTH,</div><div class='ctx'> 	.height		= DEFAULT_HEIGHT,</div><div class='ctx'> 	.c_width	= DEFAULT_WIDTH,</div><div class='hunk'>@@ -77,7 +77,7 @@ struct g2d_frame def_frame = {</div><div class='ctx'> 	.bottom		= DEFAULT_HEIGHT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct g2d_fmt *find_fmt(struct v4l2_format *f)</div><div class='add'>+static struct g2d_fmt *find_fmt(struct v4l2_format *f)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	for (i = 0; i &lt; NUM_FORMATS; i++) {</div><div class='hunk'>@@ -202,7 +202,7 @@ static const struct v4l2_ctrl_ops g2d_ctrl_ops = {</div><div class='ctx'> 	.s_ctrl		= g2d_s_ctrl,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int g2d_setup_ctrls(struct g2d_ctx *ctx)</div><div class='add'>+static int g2d_setup_ctrls(struct g2d_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct g2d_dev *dev = ctx-&gt;dev;</div><div class='ctx'> </div><div class='hunk'>@@ -546,11 +546,11 @@ static void job_abort(void *prv)</div><div class='ctx'> 	struct g2d_dev *dev = ctx-&gt;dev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;curr == 0) /* No job currently running */</div><div class='add'>+	if (dev-&gt;curr == NULL) /* No job currently running */</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	ret = wait_event_timeout(dev-&gt;irq_queue,</div><div class='del'>-		dev-&gt;curr == 0,</div><div class='add'>+		dev-&gt;curr == NULL,</div><div class='ctx'> 		msecs_to_jiffies(G2D_TIMEOUT));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -599,19 +599,19 @@ static irqreturn_t g2d_isr(int irq, void *prv)</div><div class='ctx'> 	g2d_clear_int(dev);</div><div class='ctx'> 	clk_disable(dev-&gt;gate);</div><div class='ctx'> </div><div class='del'>-	BUG_ON(ctx == 0);</div><div class='add'>+	BUG_ON(ctx == NULL);</div><div class='ctx'> </div><div class='ctx'> 	src = v4l2_m2m_src_buf_remove(ctx-&gt;m2m_ctx);</div><div class='ctx'> 	dst = v4l2_m2m_dst_buf_remove(ctx-&gt;m2m_ctx);</div><div class='ctx'> </div><div class='del'>-	BUG_ON(src == 0);</div><div class='del'>-	BUG_ON(dst == 0);</div><div class='add'>+	BUG_ON(src == NULL);</div><div class='add'>+	BUG_ON(dst == NULL);</div><div class='ctx'> </div><div class='ctx'> 	v4l2_m2m_buf_done(src, VB2_BUF_STATE_DONE);</div><div class='ctx'> 	v4l2_m2m_buf_done(dst, VB2_BUF_STATE_DONE);</div><div class='ctx'> 	v4l2_m2m_job_finish(dev-&gt;m2m_dev, ctx-&gt;m2m_ctx);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;curr = 0;</div><div class='add'>+	dev-&gt;curr = NULL;</div><div class='ctx'> 	wake_up(&amp;dev-&gt;irq_queue);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -674,42 +674,27 @@ static int g2d_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	dev = kzalloc(sizeof(*dev), GFP_KERNEL);</div><div class='add'>+	dev = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*dev), GFP_KERNEL);</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_init(&amp;dev-&gt;ctrl_lock);</div><div class='ctx'> 	mutex_init(&amp;dev-&gt;mutex);</div><div class='ctx'> 	atomic_set(&amp;dev-&gt;num_inst, 0);</div><div class='ctx'> 	init_waitqueue_head(&amp;dev-&gt;irq_queue);</div><div class='ctx'> </div><div class='ctx'> 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	if (!res) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to find registers\n");</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-		goto free_dev;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	dev-&gt;res_regs = request_mem_region(res-&gt;start, resource_size(res),</div><div class='del'>-						dev_name(&amp;pdev-&gt;dev));</div><div class='del'>-</div><div class='del'>-	if (!dev-&gt;res_regs) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to obtain register region\n");</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-		goto free_dev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;regs = ioremap(res-&gt;start, resource_size(res));</div><div class='del'>-	if (!dev-&gt;regs) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to map registers\n");</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-		goto rel_res_regs;</div><div class='add'>+	dev-&gt;regs = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='add'>+	if (dev-&gt;regs == NULL) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "Failed to obtain io memory\n");</div><div class='add'>+			return -ENOENT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;clk = clk_get(&amp;pdev-&gt;dev, "sclk_fimg2d");</div><div class='ctx'> 	if (IS_ERR_OR_NULL(dev-&gt;clk)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to get g2d clock\n");</div><div class='del'>-		ret = -ENXIO;</div><div class='del'>-		goto unmap_regs;</div><div class='add'>+		return -ENXIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = clk_prepare(dev-&gt;clk);</div><div class='hunk'>@@ -740,7 +725,8 @@ static int g2d_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;irq = res-&gt;start;</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(dev-&gt;irq, g2d_isr, 0, pdev-&gt;name, dev);</div><div class='add'>+	ret = devm_request_irq(&amp;pdev-&gt;dev, dev-&gt;irq, g2d_isr,</div><div class='add'>+						0, pdev-&gt;name, dev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to install IRQ\n");</div><div class='ctx'> 		goto put_clk_gate;</div><div class='hunk'>@@ -749,7 +735,7 @@ static int g2d_probe(struct platform_device *pdev)</div><div class='ctx'> 	dev-&gt;alloc_ctx = vb2_dma_contig_init_ctx(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (IS_ERR(dev-&gt;alloc_ctx)) {</div><div class='ctx'> 		ret = PTR_ERR(dev-&gt;alloc_ctx);</div><div class='del'>-		goto rel_irq;</div><div class='add'>+		goto unprep_clk_gate;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = v4l2_device_register(&amp;pdev-&gt;dev, &amp;dev-&gt;v4l2_dev);</div><div class='hunk'>@@ -762,6 +748,10 @@ static int g2d_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto unreg_v4l2_dev;</div><div class='ctx'> 	}</div><div class='ctx'> 	*vfd = g2d_videodev;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vfd-&gt;flags);</div><div class='ctx'> 	vfd-&gt;lock = &amp;dev-&gt;mutex;</div><div class='ctx'> 	ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -793,8 +783,6 @@ unreg_v4l2_dev:</div><div class='ctx'> 	v4l2_device_unregister(&amp;dev-&gt;v4l2_dev);</div><div class='ctx'> alloc_ctx_cleanup:</div><div class='ctx'> 	vb2_dma_contig_cleanup_ctx(dev-&gt;alloc_ctx);</div><div class='del'>-rel_irq:</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> unprep_clk_gate:</div><div class='ctx'> 	clk_unprepare(dev-&gt;gate);</div><div class='ctx'> put_clk_gate:</div><div class='hunk'>@@ -803,12 +791,7 @@ unprep_clk:</div><div class='ctx'> 	clk_unprepare(dev-&gt;clk);</div><div class='ctx'> put_clk:</div><div class='ctx'> 	clk_put(dev-&gt;clk);</div><div class='del'>-unmap_regs:</div><div class='del'>-	iounmap(dev-&gt;regs);</div><div class='del'>-rel_res_regs:</div><div class='del'>-	release_resource(dev-&gt;res_regs);</div><div class='del'>-free_dev:</div><div class='del'>-	kfree(dev);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -821,14 +804,10 @@ static int g2d_remove(struct platform_device *pdev)</div><div class='ctx'> 	video_unregister_device(dev-&gt;vfd);</div><div class='ctx'> 	v4l2_device_unregister(&amp;dev-&gt;v4l2_dev);</div><div class='ctx'> 	vb2_dma_contig_cleanup_ctx(dev-&gt;alloc_ctx);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 	clk_unprepare(dev-&gt;gate);</div><div class='ctx'> 	clk_put(dev-&gt;gate);</div><div class='ctx'> 	clk_unprepare(dev-&gt;clk);</div><div class='ctx'> 	clk_put(dev-&gt;clk);</div><div class='del'>-	iounmap(dev-&gt;regs);</div><div class='del'>-	release_resource(dev-&gt;res_regs);</div><div class='del'>-	kfree(dev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/s5p-g2d/g2d.h b/drivers/media/video/s5p-g2d/g2d.h<br/>index 1b82065aeaef..6b765b0216c5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-g2d/g2d.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-g2d/g2d.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-g2d/g2d.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-g2d/g2d.h</a></div><div class='hunk'>@@ -23,7 +23,6 @@ struct g2d_dev {</div><div class='ctx'> 	spinlock_t		ctrl_lock;</div><div class='ctx'> 	atomic_t		num_inst;</div><div class='ctx'> 	struct vb2_alloc_ctx	*alloc_ctx;</div><div class='del'>-	struct resource		*res_regs;</div><div class='ctx'> 	void __iomem		*regs;</div><div class='ctx'> 	struct clk		*clk;</div><div class='ctx'> 	struct clk		*gate;</div><div class='head'>diff --git a/drivers/media/video/s5p-jpeg/jpeg-core.c b/drivers/media/video/s5p-jpeg/jpeg-core.c<br/>index 5a49c307f9c1..28b5225d94f5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-jpeg/jpeg-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-jpeg/jpeg-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-jpeg/jpeg-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-jpeg/jpeg-core.c</a></div><div class='hunk'>@@ -813,7 +813,7 @@ static int s5p_jpeg_streamoff(struct file *file, void *priv,</div><div class='ctx'> 	return v4l2_m2m_streamoff(file, ctx-&gt;m2m_ctx, type);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int s5p_jpeg_g_selection(struct file *file, void *priv,</div><div class='add'>+static int s5p_jpeg_g_selection(struct file *file, void *priv,</div><div class='ctx'> 			 struct v4l2_selection *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct s5p_jpeg_ctx *ctx = fh_to_ctx(priv);</div><div class='hunk'>@@ -1290,7 +1290,7 @@ static int s5p_jpeg_probe(struct platform_device *pdev)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* JPEG IP abstraction struct */</div><div class='del'>-	jpeg = kzalloc(sizeof(struct s5p_jpeg), GFP_KERNEL);</div><div class='add'>+	jpeg = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct s5p_jpeg), GFP_KERNEL);</div><div class='ctx'> 	if (!jpeg)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -1300,43 +1300,25 @@ static int s5p_jpeg_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	/* memory-mapped registers */</div><div class='ctx'> 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	if (!res) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "cannot find IO resource\n");</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-		goto jpeg_alloc_rollback;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	jpeg-&gt;ioarea = request_mem_region(res-&gt;start, resource_size(res),</div><div class='del'>-					  pdev-&gt;name);</div><div class='del'>-	if (!jpeg-&gt;ioarea) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "cannot request IO\n");</div><div class='del'>-		ret = -ENXIO;</div><div class='del'>-		goto jpeg_alloc_rollback;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	jpeg-&gt;regs = ioremap(res-&gt;start, resource_size(res));</div><div class='del'>-	if (!jpeg-&gt;regs) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "cannot map IO\n");</div><div class='del'>-		ret = -ENXIO;</div><div class='del'>-		goto mem_region_rollback;</div><div class='add'>+	jpeg-&gt;regs = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='add'>+	if (jpeg-&gt;regs == NULL) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to obtain io memory\n");</div><div class='add'>+		return -ENOENT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;pdev-&gt;dev, "registers %p (%p, %p)\n",</div><div class='del'>-		jpeg-&gt;regs, jpeg-&gt;ioarea, res);</div><div class='del'>-</div><div class='ctx'> 	/* interrupt service routine registration */</div><div class='ctx'> 	jpeg-&gt;irq = ret = platform_get_irq(pdev, 0);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "cannot find IRQ\n");</div><div class='del'>-		goto ioremap_rollback;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(jpeg-&gt;irq, s5p_jpeg_irq, 0,</div><div class='del'>-			  dev_name(&amp;pdev-&gt;dev), jpeg);</div><div class='del'>-</div><div class='add'>+	ret = devm_request_irq(&amp;pdev-&gt;dev, jpeg-&gt;irq, s5p_jpeg_irq, 0,</div><div class='add'>+			dev_name(&amp;pdev-&gt;dev), jpeg);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "cannot claim IRQ %d\n", jpeg-&gt;irq);</div><div class='del'>-		goto ioremap_rollback;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* clocks */</div><div class='hunk'>@@ -1344,7 +1326,7 @@ static int s5p_jpeg_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (IS_ERR(jpeg-&gt;clk)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "cannot get clock\n");</div><div class='ctx'> 		ret = PTR_ERR(jpeg-&gt;clk);</div><div class='del'>-		goto request_irq_rollback;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "clock source %p\n", jpeg-&gt;clk);</div><div class='ctx'> 	clk_enable(jpeg-&gt;clk);</div><div class='hunk'>@@ -1386,6 +1368,10 @@ static int s5p_jpeg_probe(struct platform_device *pdev)</div><div class='ctx'> 	jpeg-&gt;vfd_encoder-&gt;release	= video_device_release;</div><div class='ctx'> 	jpeg-&gt;vfd_encoder-&gt;lock		= &amp;jpeg-&gt;lock;</div><div class='ctx'> 	jpeg-&gt;vfd_encoder-&gt;v4l2_dev	= &amp;jpeg-&gt;v4l2_dev;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;jpeg-&gt;vfd_encoder-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	ret = video_register_device(jpeg-&gt;vfd_encoder, VFL_TYPE_GRABBER, -1);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -1413,6 +1399,10 @@ static int s5p_jpeg_probe(struct platform_device *pdev)</div><div class='ctx'> 	jpeg-&gt;vfd_decoder-&gt;release	= video_device_release;</div><div class='ctx'> 	jpeg-&gt;vfd_decoder-&gt;lock		= &amp;jpeg-&gt;lock;</div><div class='ctx'> 	jpeg-&gt;vfd_decoder-&gt;v4l2_dev	= &amp;jpeg-&gt;v4l2_dev;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done by the driver,</div><div class='add'>+	   not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;jpeg-&gt;vfd_decoder-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	ret = video_register_device(jpeg-&gt;vfd_decoder, VFL_TYPE_GRABBER, -1);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -1456,18 +1446,6 @@ clk_get_rollback:</div><div class='ctx'> 	clk_disable(jpeg-&gt;clk);</div><div class='ctx'> 	clk_put(jpeg-&gt;clk);</div><div class='ctx'> </div><div class='del'>-request_irq_rollback:</div><div class='del'>-	free_irq(jpeg-&gt;irq, jpeg);</div><div class='del'>-</div><div class='del'>-ioremap_rollback:</div><div class='del'>-	iounmap(jpeg-&gt;regs);</div><div class='del'>-</div><div class='del'>-mem_region_rollback:</div><div class='del'>-	release_resource(jpeg-&gt;ioarea);</div><div class='del'>-	release_mem_region(jpeg-&gt;ioarea-&gt;start, resource_size(jpeg-&gt;ioarea));</div><div class='del'>-</div><div class='del'>-jpeg_alloc_rollback:</div><div class='del'>-	kfree(jpeg);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1488,14 +1466,6 @@ static int s5p_jpeg_remove(struct platform_device *pdev)</div><div class='ctx'> 	clk_disable(jpeg-&gt;clk);</div><div class='ctx'> 	clk_put(jpeg-&gt;clk);</div><div class='ctx'> </div><div class='del'>-	free_irq(jpeg-&gt;irq, jpeg);</div><div class='del'>-</div><div class='del'>-	iounmap(jpeg-&gt;regs);</div><div class='del'>-</div><div class='del'>-	release_resource(jpeg-&gt;ioarea);</div><div class='del'>-	release_mem_region(jpeg-&gt;ioarea-&gt;start, resource_size(jpeg-&gt;ioarea));</div><div class='del'>-	kfree(jpeg);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/s5p-jpeg/jpeg-core.h b/drivers/media/video/s5p-jpeg/jpeg-core.h<br/>index 38d7367f7a6d..9d0cd2b76f61 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-jpeg/jpeg-core.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-jpeg/jpeg-core.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-jpeg/jpeg-core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-jpeg/jpeg-core.h</a></div><div class='hunk'>@@ -54,7 +54,6 @@</div><div class='ctx'>  * @vfd_encoder:	video device node for encoder mem2mem mode</div><div class='ctx'>  * @vfd_decoder:	video device node for decoder mem2mem mode</div><div class='ctx'>  * @m2m_dev:		v4l2 mem2mem device data</div><div class='del'>- * @ioarea:		JPEG IP memory region</div><div class='ctx'>  * @regs:		JPEG IP registers mapping</div><div class='ctx'>  * @irq:		JPEG IP irq</div><div class='ctx'>  * @clk:		JPEG IP clock</div><div class='hunk'>@@ -70,7 +69,6 @@ struct s5p_jpeg {</div><div class='ctx'> 	struct video_device	*vfd_decoder;</div><div class='ctx'> 	struct v4l2_m2m_dev	*m2m_dev;</div><div class='ctx'> </div><div class='del'>-	struct resource		*ioarea;</div><div class='ctx'> 	void __iomem		*regs;</div><div class='ctx'> 	unsigned int		irq;</div><div class='ctx'> 	struct clk		*clk;</div><div class='head'>diff --git a/drivers/media/video/s5p-mfc/s5p_mfc.c b/drivers/media/video/s5p-mfc/s5p_mfc.c<br/>index 83fe461af263..9bb68e7b5ae8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-mfc/s5p_mfc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-mfc/s5p_mfc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-mfc/s5p_mfc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-mfc/s5p_mfc.c</a></div><div class='hunk'>@@ -70,7 +70,7 @@ static void wake_up_dev(struct s5p_mfc_dev *dev, unsigned int reason,</div><div class='ctx'> 	wake_up(&amp;dev-&gt;queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void s5p_mfc_watchdog(unsigned long arg)</div><div class='add'>+static void s5p_mfc_watchdog(unsigned long arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct s5p_mfc_dev *dev = (struct s5p_mfc_dev *)arg;</div><div class='ctx'> </div><div class='hunk'>@@ -373,7 +373,7 @@ static void s5p_mfc_handle_error(struct s5p_mfc_ctx *ctx,</div><div class='ctx'> </div><div class='ctx'> 	/* If no context is available then all necessary</div><div class='ctx'> 	 * processing has been done. */</div><div class='del'>-	if (ctx == 0)</div><div class='add'>+	if (ctx == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	dev = ctx-&gt;dev;</div><div class='hunk'>@@ -429,7 +429,7 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx,</div><div class='ctx'> 	struct s5p_mfc_dev *dev;</div><div class='ctx'> 	unsigned int guard_width, guard_height;</div><div class='ctx'> </div><div class='del'>-	if (ctx == 0)</div><div class='add'>+	if (ctx == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> 	dev = ctx-&gt;dev;</div><div class='ctx'> 	if (ctx-&gt;c_ops-&gt;post_seq_start) {</div><div class='hunk'>@@ -496,7 +496,7 @@ static void s5p_mfc_handle_init_buffers(struct s5p_mfc_ctx *ctx,</div><div class='ctx'> 	struct s5p_mfc_dev *dev;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (ctx == 0)</div><div class='add'>+	if (ctx == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> 	dev = ctx-&gt;dev;</div><div class='ctx'> 	s5p_mfc_clear_int_flags(dev);</div><div class='hunk'>@@ -772,7 +772,7 @@ err_queue_init:</div><div class='ctx'> err_init_hw:</div><div class='ctx'> 	s5p_mfc_release_firmware(dev);</div><div class='ctx'> err_alloc_fw:</div><div class='del'>-	dev-&gt;ctx[ctx-&gt;num] = 0;</div><div class='add'>+	dev-&gt;ctx[ctx-&gt;num] = NULL;</div><div class='ctx'> 	del_timer_sync(&amp;dev-&gt;watchdog_timer);</div><div class='ctx'> 	s5p_mfc_clock_off();</div><div class='ctx'> err_pwr_enable:</div><div class='hunk'>@@ -849,7 +849,7 @@ static int s5p_mfc_release(struct file *file)</div><div class='ctx'> 	}</div><div class='ctx'> 	mfc_debug(2, "Shutting down clock\n");</div><div class='ctx'> 	s5p_mfc_clock_off();</div><div class='del'>-	dev-&gt;ctx[ctx-&gt;num] = 0;</div><div class='add'>+	dev-&gt;ctx[ctx-&gt;num] = NULL;</div><div class='ctx'> 	s5p_mfc_dec_ctrls_delete(ctx);</div><div class='ctx'> 	v4l2_fh_del(&amp;ctx-&gt;fh);</div><div class='ctx'> 	v4l2_fh_exit(&amp;ctx-&gt;fh);</div><div class='hunk'>@@ -948,7 +948,7 @@ static int s5p_mfc_probe(struct platform_device *pdev)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s++\n", __func__);</div><div class='del'>-	dev = kzalloc(sizeof *dev, GFP_KERNEL);</div><div class='add'>+	dev = devm_kzalloc(&amp;pdev-&gt;dev, sizeof *dev, GFP_KERNEL);</div><div class='ctx'> 	if (!dev) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Not enough memory for MFC device\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -959,49 +959,35 @@ static int s5p_mfc_probe(struct platform_device *pdev)</div><div class='ctx'> 	dev-&gt;plat_dev = pdev;</div><div class='ctx'> 	if (!dev-&gt;plat_dev) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "No platform data specified\n");</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto err_dev;</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = s5p_mfc_init_pm(dev);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to get mfc clock source\n");</div><div class='del'>-		goto err_clk;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	if (res == NULL) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to get memory region resource\n");</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-		goto err_res;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	dev-&gt;mfc_mem = request_mem_region(res-&gt;start, resource_size(res),</div><div class='del'>-					  pdev-&gt;name);</div><div class='del'>-	if (dev-&gt;mfc_mem == NULL) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to get memory region\n");</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-		goto err_mem_reg;</div><div class='del'>-	}</div><div class='del'>-	dev-&gt;regs_base = ioremap(dev-&gt;mfc_mem-&gt;start, resource_size(dev-&gt;mfc_mem));</div><div class='add'>+	dev-&gt;regs_base = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='ctx'> 	if (dev-&gt;regs_base == NULL) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to ioremap address region\n");</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-		goto err_ioremap;</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to obtain io memory\n");</div><div class='add'>+		return -ENOENT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='ctx'> 	if (res == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to get irq resource\n");</div><div class='ctx'> 		ret = -ENOENT;</div><div class='del'>-		goto err_get_res;</div><div class='add'>+		goto err_res;</div><div class='ctx'> 	}</div><div class='ctx'> 	dev-&gt;irq = res-&gt;start;</div><div class='del'>-	ret = request_irq(dev-&gt;irq, s5p_mfc_irq, IRQF_DISABLED, pdev-&gt;name,</div><div class='del'>-									dev);</div><div class='add'>+	ret = devm_request_irq(&amp;pdev-&gt;dev, dev-&gt;irq, s5p_mfc_irq,</div><div class='add'>+					IRQF_DISABLED, pdev-&gt;name, dev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Failed to install irq (%d)\n", ret);</div><div class='del'>-		goto err_req_irq;</div><div class='add'>+		goto err_res;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;mem_dev_l = device_find_child(&amp;dev-&gt;plat_dev-&gt;dev, "s5p-mfc-l",</div><div class='hunk'>@@ -1009,20 +995,20 @@ static int s5p_mfc_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!dev-&gt;mem_dev_l) {</div><div class='ctx'> 		mfc_err("Mem child (L) device get failed\n");</div><div class='ctx'> 		ret = -ENODEV;</div><div class='del'>-		goto err_find_child;</div><div class='add'>+		goto err_res;</div><div class='ctx'> 	}</div><div class='ctx'> 	dev-&gt;mem_dev_r = device_find_child(&amp;dev-&gt;plat_dev-&gt;dev, "s5p-mfc-r",</div><div class='ctx'> 					   match_child);</div><div class='ctx'> 	if (!dev-&gt;mem_dev_r) {</div><div class='ctx'> 		mfc_err("Mem child (R) device get failed\n");</div><div class='ctx'> 		ret = -ENODEV;</div><div class='del'>-		goto err_find_child;</div><div class='add'>+		goto err_res;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;alloc_ctx[0] = vb2_dma_contig_init_ctx(dev-&gt;mem_dev_l);</div><div class='ctx'> 	if (IS_ERR_OR_NULL(dev-&gt;alloc_ctx[0])) {</div><div class='ctx'> 		ret = PTR_ERR(dev-&gt;alloc_ctx[0]);</div><div class='del'>-		goto err_mem_init_ctx_0;</div><div class='add'>+		goto err_res;</div><div class='ctx'> 	}</div><div class='ctx'> 	dev-&gt;alloc_ctx[1] = vb2_dma_contig_init_ctx(dev-&gt;mem_dev_r);</div><div class='ctx'> 	if (IS_ERR_OR_NULL(dev-&gt;alloc_ctx[1])) {</div><div class='hunk'>@@ -1048,6 +1034,10 @@ static int s5p_mfc_probe(struct platform_device *pdev)</div><div class='ctx'> 	vfd-&gt;ioctl_ops	= get_dec_v4l2_ioctl_ops();</div><div class='ctx'> 	vfd-&gt;release	= video_device_release,</div><div class='ctx'> 	vfd-&gt;lock	= &amp;dev-&gt;mfc_mutex;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vfd-&gt;flags);</div><div class='ctx'> 	vfd-&gt;v4l2_dev	= &amp;dev-&gt;v4l2_dev;</div><div class='ctx'> 	snprintf(vfd-&gt;name, sizeof(vfd-&gt;name), "%s", S5P_MFC_DEC_NAME);</div><div class='ctx'> 	dev-&gt;vfd_dec	= vfd;</div><div class='hunk'>@@ -1072,6 +1062,8 @@ static int s5p_mfc_probe(struct platform_device *pdev)</div><div class='ctx'> 	vfd-&gt;ioctl_ops	= get_enc_v4l2_ioctl_ops();</div><div class='ctx'> 	vfd-&gt;release	= video_device_release,</div><div class='ctx'> 	vfd-&gt;lock	= &amp;dev-&gt;mfc_mutex;</div><div class='add'>+	/* This should not be necessary */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vfd-&gt;flags);</div><div class='ctx'> 	vfd-&gt;v4l2_dev	= &amp;dev-&gt;v4l2_dev;</div><div class='ctx'> 	snprintf(vfd-&gt;name, sizeof(vfd-&gt;name), "%s", S5P_MFC_ENC_NAME);</div><div class='ctx'> 	dev-&gt;vfd_enc	= vfd;</div><div class='hunk'>@@ -1110,22 +1102,9 @@ err_v4l2_dev_reg:</div><div class='ctx'> 	vb2_dma_contig_cleanup_ctx(dev-&gt;alloc_ctx[1]);</div><div class='ctx'> err_mem_init_ctx_1:</div><div class='ctx'> 	vb2_dma_contig_cleanup_ctx(dev-&gt;alloc_ctx[0]);</div><div class='del'>-err_mem_init_ctx_0:</div><div class='del'>-err_find_child:</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-err_req_irq:</div><div class='del'>-err_get_res:</div><div class='del'>-	iounmap(dev-&gt;regs_base);</div><div class='del'>-	dev-&gt;regs_base = NULL;</div><div class='del'>-err_ioremap:</div><div class='del'>-	release_resource(dev-&gt;mfc_mem);</div><div class='del'>-	kfree(dev-&gt;mfc_mem);</div><div class='del'>-err_mem_reg:</div><div class='ctx'> err_res:</div><div class='ctx'> 	s5p_mfc_final_pm(dev);</div><div class='del'>-err_clk:</div><div class='del'>-err_dev:</div><div class='del'>-	kfree(dev);</div><div class='add'>+</div><div class='ctx'> 	pr_debug("%s-- with error\n", __func__);</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1148,15 +1127,7 @@ static int __devexit s5p_mfc_remove(struct platform_device *pdev)</div><div class='ctx'> 	vb2_dma_contig_cleanup_ctx(dev-&gt;alloc_ctx[0]);</div><div class='ctx'> 	vb2_dma_contig_cleanup_ctx(dev-&gt;alloc_ctx[1]);</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	iounmap(dev-&gt;regs_base);</div><div class='del'>-	if (dev-&gt;mfc_mem) {</div><div class='del'>-		release_resource(dev-&gt;mfc_mem);</div><div class='del'>-		kfree(dev-&gt;mfc_mem);</div><div class='del'>-		dev-&gt;mfc_mem = NULL;</div><div class='del'>-	}</div><div class='ctx'> 	s5p_mfc_final_pm(dev);</div><div class='del'>-	kfree(dev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_common.h b/drivers/media/video/s5p-mfc/s5p_mfc_common.h<br/>index 91146fa622e4..bd5706a6bad1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-mfc/s5p_mfc_common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-mfc/s5p_mfc_common.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-mfc/s5p_mfc_common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-mfc/s5p_mfc_common.h</a></div><div class='hunk'>@@ -185,7 +185,6 @@ struct s5p_mfc_pm {</div><div class='ctx'>  * @mem_dev_r:		child device of the right memory bank (1)</div><div class='ctx'>  * @regs_base:		base address of the MFC hw registers</div><div class='ctx'>  * @irq:		irq resource</div><div class='del'>- * @mfc_mem:		MFC registers memory resource</div><div class='ctx'>  * @dec_ctrl_handler:	control framework handler for decoding</div><div class='ctx'>  * @enc_ctrl_handler:	control framework handler for encoding</div><div class='ctx'>  * @pm:			power management control</div><div class='hunk'>@@ -221,7 +220,6 @@ struct s5p_mfc_dev {</div><div class='ctx'> 	struct device		*mem_dev_r;</div><div class='ctx'> 	void __iomem		*regs_base;</div><div class='ctx'> 	int			irq;</div><div class='del'>-	struct resource		*mfc_mem;</div><div class='ctx'> 	struct v4l2_ctrl_handler dec_ctrl_handler;</div><div class='ctx'> 	struct v4l2_ctrl_handler enc_ctrl_handler;</div><div class='ctx'> 	struct s5p_mfc_pm	pm;</div><div class='head'>diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.c<br/>index f2481a85e0a2..08a5cfeaa59e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-mfc/s5p_mfc_ctrl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-mfc/s5p_mfc_ctrl.c</a></div><div class='hunk'>@@ -52,7 +52,7 @@ int s5p_mfc_alloc_and_load_firmware(struct s5p_mfc_dev *dev)</div><div class='ctx'> 	s5p_mfc_bitproc_buf = vb2_dma_contig_memops.alloc(</div><div class='ctx'> 		dev-&gt;alloc_ctx[MFC_BANK1_ALLOC_CTX], dev-&gt;fw_size);</div><div class='ctx'> 	if (IS_ERR(s5p_mfc_bitproc_buf)) {</div><div class='del'>-		s5p_mfc_bitproc_buf = 0;</div><div class='add'>+		s5p_mfc_bitproc_buf = NULL;</div><div class='ctx'> 		mfc_err("Allocating bitprocessor buffer failed\n");</div><div class='ctx'> 		release_firmware(fw_blob);</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -63,7 +63,7 @@ int s5p_mfc_alloc_and_load_firmware(struct s5p_mfc_dev *dev)</div><div class='ctx'> 		mfc_err("The base memory for bank 1 is not aligned to 128KB\n");</div><div class='ctx'> 		vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf);</div><div class='ctx'> 		s5p_mfc_bitproc_phys = 0;</div><div class='del'>-		s5p_mfc_bitproc_buf = 0;</div><div class='add'>+		s5p_mfc_bitproc_buf = NULL;</div><div class='ctx'> 		release_firmware(fw_blob);</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -72,7 +72,7 @@ int s5p_mfc_alloc_and_load_firmware(struct s5p_mfc_dev *dev)</div><div class='ctx'> 		mfc_err("Bitprocessor memory remap failed\n");</div><div class='ctx'> 		vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf);</div><div class='ctx'> 		s5p_mfc_bitproc_phys = 0;</div><div class='del'>-		s5p_mfc_bitproc_buf = 0;</div><div class='add'>+		s5p_mfc_bitproc_buf = NULL;</div><div class='ctx'> 		release_firmware(fw_blob);</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -82,7 +82,7 @@ int s5p_mfc_alloc_and_load_firmware(struct s5p_mfc_dev *dev)</div><div class='ctx'> 	if (IS_ERR(b_base)) {</div><div class='ctx'> 		vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf);</div><div class='ctx'> 		s5p_mfc_bitproc_phys = 0;</div><div class='del'>-		s5p_mfc_bitproc_buf = 0;</div><div class='add'>+		s5p_mfc_bitproc_buf = NULL;</div><div class='ctx'> 		mfc_err("Allocating bank2 base failed\n");</div><div class='ctx'> 	release_firmware(fw_blob);</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -94,7 +94,7 @@ int s5p_mfc_alloc_and_load_firmware(struct s5p_mfc_dev *dev)</div><div class='ctx'> 		mfc_err("The base memory for bank 2 is not aligned to 128KB\n");</div><div class='ctx'> 		vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf);</div><div class='ctx'> 		s5p_mfc_bitproc_phys = 0;</div><div class='del'>-		s5p_mfc_bitproc_buf = 0;</div><div class='add'>+		s5p_mfc_bitproc_buf = NULL;</div><div class='ctx'> 		release_firmware(fw_blob);</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -126,7 +126,7 @@ int s5p_mfc_reload_firmware(struct s5p_mfc_dev *dev)</div><div class='ctx'> 		release_firmware(fw_blob);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='del'>-	if (s5p_mfc_bitproc_buf == 0 || s5p_mfc_bitproc_phys == 0) {</div><div class='add'>+	if (s5p_mfc_bitproc_buf == NULL || s5p_mfc_bitproc_phys == 0) {</div><div class='ctx'> 		mfc_err("MFC firmware is not allocated or was not mapped correctly\n");</div><div class='ctx'> 		release_firmware(fw_blob);</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -146,9 +146,9 @@ int s5p_mfc_release_firmware(struct s5p_mfc_dev *dev)</div><div class='ctx'> 	if (!s5p_mfc_bitproc_buf)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf);</div><div class='del'>-	s5p_mfc_bitproc_virt =  0;</div><div class='add'>+	s5p_mfc_bitproc_virt = NULL;</div><div class='ctx'> 	s5p_mfc_bitproc_phys = 0;</div><div class='del'>-	s5p_mfc_bitproc_buf = 0;</div><div class='add'>+	s5p_mfc_bitproc_buf = NULL;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_enc.c b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c<br/>index dff9dc798795..acedb2004be3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-mfc/s5p_mfc_enc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-mfc/s5p_mfc_enc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-mfc/s5p_mfc_enc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-mfc/s5p_mfc_enc.c</a></div><div class='hunk'>@@ -1436,7 +1436,8 @@ static const struct v4l2_ctrl_ops s5p_mfc_enc_ctrl_ops = {</div><div class='ctx'> 	.s_ctrl = s5p_mfc_enc_s_ctrl,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int vidioc_s_parm(struct file *file, void *priv, struct v4l2_streamparm *a)</div><div class='add'>+static int vidioc_s_parm(struct file *file, void *priv,</div><div class='add'>+			 struct v4l2_streamparm *a)</div><div class='ctx'> {</div><div class='ctx'> 	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);</div><div class='ctx'> </div><div class='hunk'>@@ -1452,7 +1453,8 @@ int vidioc_s_parm(struct file *file, void *priv, struct v4l2_streamparm *a)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int vidioc_g_parm(struct file *file, void *priv, struct v4l2_streamparm *a)</div><div class='add'>+static int vidioc_g_parm(struct file *file, void *priv,</div><div class='add'>+			 struct v4l2_streamparm *a)</div><div class='ctx'> {</div><div class='ctx'> 	struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_opr.c b/drivers/media/video/s5p-mfc/s5p_mfc_opr.c<br/>index e08b21c50ebf..e6217cbfa4a3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-mfc/s5p_mfc_opr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-mfc/s5p_mfc_opr.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-mfc/s5p_mfc_opr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-mfc/s5p_mfc_opr.c</a></div><div class='hunk'>@@ -43,7 +43,7 @@ int s5p_mfc_alloc_dec_temp_buffers(struct s5p_mfc_ctx *ctx)</div><div class='ctx'> 	ctx-&gt;desc_buf = vb2_dma_contig_memops.alloc(</div><div class='ctx'> 			dev-&gt;alloc_ctx[MFC_BANK1_ALLOC_CTX], DESC_BUF_SIZE);</div><div class='ctx'> 	if (IS_ERR_VALUE((int)ctx-&gt;desc_buf)) {</div><div class='del'>-		ctx-&gt;desc_buf = 0;</div><div class='add'>+		ctx-&gt;desc_buf = NULL;</div><div class='ctx'> 		mfc_err("Allocating DESC buffer failed\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -54,7 +54,7 @@ int s5p_mfc_alloc_dec_temp_buffers(struct s5p_mfc_ctx *ctx)</div><div class='ctx'> 	if (desc_virt == NULL) {</div><div class='ctx'> 		vb2_dma_contig_memops.put(ctx-&gt;desc_buf);</div><div class='ctx'> 		ctx-&gt;desc_phys = 0;</div><div class='del'>-		ctx-&gt;desc_buf = 0;</div><div class='add'>+		ctx-&gt;desc_buf = NULL;</div><div class='ctx'> 		mfc_err("Remapping DESC buffer failed\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -69,7 +69,7 @@ void s5p_mfc_release_dec_desc_buffer(struct s5p_mfc_ctx *ctx)</div><div class='ctx'> 	if (ctx-&gt;desc_phys) {</div><div class='ctx'> 		vb2_dma_contig_memops.put(ctx-&gt;desc_buf);</div><div class='ctx'> 		ctx-&gt;desc_phys = 0;</div><div class='del'>-		ctx-&gt;desc_buf = 0;</div><div class='add'>+		ctx-&gt;desc_buf = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -186,7 +186,7 @@ int s5p_mfc_alloc_codec_buffers(struct s5p_mfc_ctx *ctx)</div><div class='ctx'> 		ctx-&gt;bank1_buf = vb2_dma_contig_memops.alloc(</div><div class='ctx'> 		dev-&gt;alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx-&gt;bank1_size);</div><div class='ctx'> 		if (IS_ERR(ctx-&gt;bank1_buf)) {</div><div class='del'>-			ctx-&gt;bank1_buf = 0;</div><div class='add'>+			ctx-&gt;bank1_buf = NULL;</div><div class='ctx'> 			printk(KERN_ERR</div><div class='ctx'> 			       "Buf alloc for decoding failed (port A)\n");</div><div class='ctx'> 			return -ENOMEM;</div><div class='hunk'>@@ -200,7 +200,7 @@ int s5p_mfc_alloc_codec_buffers(struct s5p_mfc_ctx *ctx)</div><div class='ctx'> 		ctx-&gt;bank2_buf = vb2_dma_contig_memops.alloc(</div><div class='ctx'> 		dev-&gt;alloc_ctx[MFC_BANK2_ALLOC_CTX], ctx-&gt;bank2_size);</div><div class='ctx'> 		if (IS_ERR(ctx-&gt;bank2_buf)) {</div><div class='del'>-			ctx-&gt;bank2_buf = 0;</div><div class='add'>+			ctx-&gt;bank2_buf = NULL;</div><div class='ctx'> 			mfc_err("Buf alloc for decoding failed (port B)\n");</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -216,13 +216,13 @@ void s5p_mfc_release_codec_buffers(struct s5p_mfc_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	if (ctx-&gt;bank1_buf) {</div><div class='ctx'> 		vb2_dma_contig_memops.put(ctx-&gt;bank1_buf);</div><div class='del'>-		ctx-&gt;bank1_buf = 0;</div><div class='add'>+		ctx-&gt;bank1_buf = NULL;</div><div class='ctx'> 		ctx-&gt;bank1_phys = 0;</div><div class='ctx'> 		ctx-&gt;bank1_size = 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ctx-&gt;bank2_buf) {</div><div class='ctx'> 		vb2_dma_contig_memops.put(ctx-&gt;bank2_buf);</div><div class='del'>-		ctx-&gt;bank2_buf = 0;</div><div class='add'>+		ctx-&gt;bank2_buf = NULL;</div><div class='ctx'> 		ctx-&gt;bank2_phys = 0;</div><div class='ctx'> 		ctx-&gt;bank2_size = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -244,7 +244,7 @@ int s5p_mfc_alloc_instance_buffer(struct s5p_mfc_ctx *ctx)</div><div class='ctx'> 	if (IS_ERR(ctx-&gt;ctx_buf)) {</div><div class='ctx'> 		mfc_err("Allocating context buffer failed\n");</div><div class='ctx'> 		ctx-&gt;ctx_phys = 0;</div><div class='del'>-		ctx-&gt;ctx_buf = 0;</div><div class='add'>+		ctx-&gt;ctx_buf = NULL;</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	ctx-&gt;ctx_phys = s5p_mfc_mem_cookie(</div><div class='hunk'>@@ -256,7 +256,7 @@ int s5p_mfc_alloc_instance_buffer(struct s5p_mfc_ctx *ctx)</div><div class='ctx'> 		mfc_err("Remapping instance buffer failed\n");</div><div class='ctx'> 		vb2_dma_contig_memops.put(ctx-&gt;ctx_buf);</div><div class='ctx'> 		ctx-&gt;ctx_phys = 0;</div><div class='del'>-		ctx-&gt;ctx_buf = 0;</div><div class='add'>+		ctx-&gt;ctx_buf = NULL;</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Zero content of the allocated memory */</div><div class='hunk'>@@ -265,7 +265,7 @@ int s5p_mfc_alloc_instance_buffer(struct s5p_mfc_ctx *ctx)</div><div class='ctx'> 	if (s5p_mfc_init_shm(ctx) &lt; 0) {</div><div class='ctx'> 		vb2_dma_contig_memops.put(ctx-&gt;ctx_buf);</div><div class='ctx'> 		ctx-&gt;ctx_phys = 0;</div><div class='del'>-		ctx-&gt;ctx_buf = 0;</div><div class='add'>+		ctx-&gt;ctx_buf = NULL;</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -277,12 +277,12 @@ void s5p_mfc_release_instance_buffer(struct s5p_mfc_ctx *ctx)</div><div class='ctx'> 	if (ctx-&gt;ctx_buf) {</div><div class='ctx'> 		vb2_dma_contig_memops.put(ctx-&gt;ctx_buf);</div><div class='ctx'> 		ctx-&gt;ctx_phys = 0;</div><div class='del'>-		ctx-&gt;ctx_buf = 0;</div><div class='add'>+		ctx-&gt;ctx_buf = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ctx-&gt;shm_alloc) {</div><div class='ctx'> 		vb2_dma_contig_memops.put(ctx-&gt;shm_alloc);</div><div class='del'>-		ctx-&gt;shm_alloc = 0;</div><div class='del'>-		ctx-&gt;shm = 0;</div><div class='add'>+		ctx-&gt;shm_alloc = NULL;</div><div class='add'>+		ctx-&gt;shm = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -296,7 +296,7 @@ void s5p_mfc_set_dec_desc_buffer(struct s5p_mfc_ctx *ctx)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Set registers for shared buffer */</div><div class='del'>-void s5p_mfc_set_shared_buffer(struct s5p_mfc_ctx *ctx)</div><div class='add'>+static void s5p_mfc_set_shared_buffer(struct s5p_mfc_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct s5p_mfc_dev *dev = ctx-&gt;dev;</div><div class='ctx'> 	mfc_write(dev, ctx-&gt;shm_ofs, S5P_FIMV_SI_CH0_HOST_WR_ADR);</div><div class='head'>diff --git a/drivers/media/video/s5p-tv/hdmi_drv.c b/drivers/media/video/s5p-tv/hdmi_drv.c<br/>index 4865d25a0e57..20cb6eef2979 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/hdmi_drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-tv/hdmi_drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/hdmi_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/hdmi_drv.c</a></div><div class='hunk'>@@ -42,7 +42,23 @@ MODULE_DESCRIPTION("Samsung HDMI");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> /* default preset configured on probe */</div><div class='del'>-#define HDMI_DEFAULT_PRESET V4L2_DV_1080P60</div><div class='add'>+#define HDMI_DEFAULT_PRESET V4L2_DV_480P59_94</div><div class='add'>+</div><div class='add'>+struct hdmi_pulse {</div><div class='add'>+	u32 beg;</div><div class='add'>+	u32 end;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hdmi_timings {</div><div class='add'>+	struct hdmi_pulse hact;</div><div class='add'>+	u32 hsyn_pol; /* 0 - high, 1 - low */</div><div class='add'>+	struct hdmi_pulse hsyn;</div><div class='add'>+	u32 interlaced;</div><div class='add'>+	struct hdmi_pulse vact[2];</div><div class='add'>+	u32 vsyn_pol; /* 0 - high, 1 - low */</div><div class='add'>+	u32 vsyn_off;</div><div class='add'>+	struct hdmi_pulse vsyn[2];</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> struct hdmi_resources {</div><div class='ctx'> 	struct clk *hdmi;</div><div class='hunk'>@@ -70,64 +86,15 @@ struct hdmi_device {</div><div class='ctx'> 	/** subdev of MHL interface */</div><div class='ctx'> 	struct v4l2_subdev *mhl_sd;</div><div class='ctx'> 	/** configuration of current graphic mode */</div><div class='del'>-	const struct hdmi_preset_conf *cur_conf;</div><div class='add'>+	const struct hdmi_timings *cur_conf;</div><div class='add'>+	/** flag indicating that timings are dirty */</div><div class='add'>+	int cur_conf_dirty;</div><div class='ctx'> 	/** current preset */</div><div class='ctx'> 	u32 cur_preset;</div><div class='ctx'> 	/** other resources */</div><div class='ctx'> 	struct hdmi_resources res;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct hdmi_tg_regs {</div><div class='del'>-	u8 cmd;</div><div class='del'>-	u8 h_fsz_l;</div><div class='del'>-	u8 h_fsz_h;</div><div class='del'>-	u8 hact_st_l;</div><div class='del'>-	u8 hact_st_h;</div><div class='del'>-	u8 hact_sz_l;</div><div class='del'>-	u8 hact_sz_h;</div><div class='del'>-	u8 v_fsz_l;</div><div class='del'>-	u8 v_fsz_h;</div><div class='del'>-	u8 vsync_l;</div><div class='del'>-	u8 vsync_h;</div><div class='del'>-	u8 vsync2_l;</div><div class='del'>-	u8 vsync2_h;</div><div class='del'>-	u8 vact_st_l;</div><div class='del'>-	u8 vact_st_h;</div><div class='del'>-	u8 vact_sz_l;</div><div class='del'>-	u8 vact_sz_h;</div><div class='del'>-	u8 field_chg_l;</div><div class='del'>-	u8 field_chg_h;</div><div class='del'>-	u8 vact_st2_l;</div><div class='del'>-	u8 vact_st2_h;</div><div class='del'>-	u8 vsync_top_hdmi_l;</div><div class='del'>-	u8 vsync_top_hdmi_h;</div><div class='del'>-	u8 vsync_bot_hdmi_l;</div><div class='del'>-	u8 vsync_bot_hdmi_h;</div><div class='del'>-	u8 field_top_hdmi_l;</div><div class='del'>-	u8 field_top_hdmi_h;</div><div class='del'>-	u8 field_bot_hdmi_l;</div><div class='del'>-	u8 field_bot_hdmi_h;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct hdmi_core_regs {</div><div class='del'>-	u8 h_blank[2];</div><div class='del'>-	u8 v_blank[3];</div><div class='del'>-	u8 h_v_line[3];</div><div class='del'>-	u8 vsync_pol[1];</div><div class='del'>-	u8 int_pro_mode[1];</div><div class='del'>-	u8 v_blank_f[3];</div><div class='del'>-	u8 h_sync_gen[3];</div><div class='del'>-	u8 v_sync_gen1[3];</div><div class='del'>-	u8 v_sync_gen2[3];</div><div class='del'>-	u8 v_sync_gen3[3];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct hdmi_preset_conf {</div><div class='del'>-	struct hdmi_core_regs core;</div><div class='del'>-	struct hdmi_tg_regs tg;</div><div class='del'>-	struct v4l2_mbus_framefmt mbus_fmt;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct platform_device_id hdmi_driver_types[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name		= "s5pv210-hdmi",</div><div class='hunk'>@@ -165,6 +132,21 @@ void hdmi_writeb(struct hdmi_device *hdev, u32 reg_id, u8 value)</div><div class='ctx'> 	writeb(value, hdev-&gt;regs + reg_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline</div><div class='add'>+void hdmi_writebn(struct hdmi_device *hdev, u32 reg_id, int n, u32 value)</div><div class='add'>+{</div><div class='add'>+	switch (n) {</div><div class='add'>+	default:</div><div class='add'>+		writeb(value &gt;&gt; 24, hdev-&gt;regs + reg_id + 12);</div><div class='add'>+	case 3:</div><div class='add'>+		writeb(value &gt;&gt; 16, hdev-&gt;regs + reg_id + 8);</div><div class='add'>+	case 2:</div><div class='add'>+		writeb(value &gt;&gt;  8, hdev-&gt;regs + reg_id + 4);</div><div class='add'>+	case 1:</div><div class='add'>+		writeb(value &gt;&gt;  0, hdev-&gt;regs + reg_id + 0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u32 hdmi_read(struct hdmi_device *hdev, u32 reg_id)</div><div class='ctx'> {</div><div class='ctx'> 	return readl(hdev-&gt;regs + reg_id);</div><div class='hunk'>@@ -211,77 +193,72 @@ static void hdmi_reg_init(struct hdmi_device *hdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hdmi_timing_apply(struct hdmi_device *hdev,</div><div class='del'>-	const struct hdmi_preset_conf *conf)</div><div class='add'>+	const struct hdmi_timings *t)</div><div class='ctx'> {</div><div class='del'>-	const struct hdmi_core_regs *core = &amp;conf-&gt;core;</div><div class='del'>-	const struct hdmi_tg_regs *tg = &amp;conf-&gt;tg;</div><div class='del'>-</div><div class='ctx'> 	/* setting core registers */</div><div class='del'>-	hdmi_writeb(hdev, HDMI_H_BLANK_0, core-&gt;h_blank[0]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_H_BLANK_1, core-&gt;h_blank[1]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_BLANK_0, core-&gt;v_blank[0]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_BLANK_1, core-&gt;v_blank[1]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_BLANK_2, core-&gt;v_blank[2]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_H_V_LINE_0, core-&gt;h_v_line[0]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_H_V_LINE_1, core-&gt;h_v_line[1]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_H_V_LINE_2, core-&gt;h_v_line[2]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_VSYNC_POL, core-&gt;vsync_pol[0]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_INT_PRO_MODE, core-&gt;int_pro_mode[0]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_BLANK_F_0, core-&gt;v_blank_f[0]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_BLANK_F_1, core-&gt;v_blank_f[1]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_BLANK_F_2, core-&gt;v_blank_f[2]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_H_SYNC_GEN_0, core-&gt;h_sync_gen[0]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_H_SYNC_GEN_1, core-&gt;h_sync_gen[1]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_H_SYNC_GEN_2, core-&gt;h_sync_gen[2]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_SYNC_GEN_1_0, core-&gt;v_sync_gen1[0]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_SYNC_GEN_1_1, core-&gt;v_sync_gen1[1]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_SYNC_GEN_1_2, core-&gt;v_sync_gen1[2]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_SYNC_GEN_2_0, core-&gt;v_sync_gen2[0]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_SYNC_GEN_2_1, core-&gt;v_sync_gen2[1]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_SYNC_GEN_2_2, core-&gt;v_sync_gen2[2]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_SYNC_GEN_3_0, core-&gt;v_sync_gen3[0]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_SYNC_GEN_3_1, core-&gt;v_sync_gen3[1]);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_V_SYNC_GEN_3_2, core-&gt;v_sync_gen3[2]);</div><div class='add'>+	hdmi_writebn(hdev, HDMI_H_BLANK_0, 2, t-&gt;hact.beg);</div><div class='add'>+	hdmi_writebn(hdev, HDMI_H_SYNC_GEN_0, 3,</div><div class='add'>+		(t-&gt;hsyn_pol &lt;&lt; 20) | (t-&gt;hsyn.end &lt;&lt; 10) | t-&gt;hsyn.beg);</div><div class='add'>+	hdmi_writeb(hdev, HDMI_VSYNC_POL, t-&gt;vsyn_pol);</div><div class='add'>+	hdmi_writebn(hdev, HDMI_V_BLANK_0, 3,</div><div class='add'>+		(t-&gt;vact[0].beg &lt;&lt; 11) | t-&gt;vact[0].end);</div><div class='add'>+	hdmi_writebn(hdev, HDMI_V_SYNC_GEN_1_0, 3,</div><div class='add'>+		(t-&gt;vsyn[0].beg &lt;&lt; 12) | t-&gt;vsyn[0].end);</div><div class='add'>+	if (t-&gt;interlaced) {</div><div class='add'>+		u32 vsyn_trans = t-&gt;hsyn.beg + t-&gt;vsyn_off;</div><div class='add'>+</div><div class='add'>+		hdmi_writeb(hdev, HDMI_INT_PRO_MODE, 1);</div><div class='add'>+		hdmi_writebn(hdev, HDMI_H_V_LINE_0, 3,</div><div class='add'>+			(t-&gt;hact.end &lt;&lt; 12) | t-&gt;vact[1].end);</div><div class='add'>+		hdmi_writebn(hdev, HDMI_V_BLANK_F_0, 3,</div><div class='add'>+			(t-&gt;vact[1].end &lt;&lt; 11) | t-&gt;vact[1].beg);</div><div class='add'>+		hdmi_writebn(hdev, HDMI_V_SYNC_GEN_2_0, 3,</div><div class='add'>+			(t-&gt;vsyn[1].beg &lt;&lt; 12) | t-&gt;vsyn[1].end);</div><div class='add'>+		hdmi_writebn(hdev, HDMI_V_SYNC_GEN_3_0, 3,</div><div class='add'>+			(vsyn_trans &lt;&lt; 12) | vsyn_trans);</div><div class='add'>+	} else {</div><div class='add'>+		hdmi_writeb(hdev, HDMI_INT_PRO_MODE, 0);</div><div class='add'>+		hdmi_writebn(hdev, HDMI_H_V_LINE_0, 3,</div><div class='add'>+			(t-&gt;hact.end &lt;&lt; 12) | t-&gt;vact[0].end);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Timing generator registers */</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_H_FSZ_L, tg-&gt;h_fsz_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_H_FSZ_H, tg-&gt;h_fsz_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_HACT_ST_L, tg-&gt;hact_st_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_HACT_ST_H, tg-&gt;hact_st_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_HACT_SZ_L, tg-&gt;hact_sz_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_HACT_SZ_H, tg-&gt;hact_sz_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_V_FSZ_L, tg-&gt;v_fsz_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_V_FSZ_H, tg-&gt;v_fsz_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VSYNC_L, tg-&gt;vsync_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VSYNC_H, tg-&gt;vsync_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VSYNC2_L, tg-&gt;vsync2_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VSYNC2_H, tg-&gt;vsync2_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VACT_ST_L, tg-&gt;vact_st_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VACT_ST_H, tg-&gt;vact_st_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VACT_SZ_L, tg-&gt;vact_sz_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VACT_SZ_H, tg-&gt;vact_sz_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_FIELD_CHG_L, tg-&gt;field_chg_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_FIELD_CHG_H, tg-&gt;field_chg_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VACT_ST2_L, tg-&gt;vact_st2_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VACT_ST2_H, tg-&gt;vact_st2_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VSYNC_TOP_HDMI_L, tg-&gt;vsync_top_hdmi_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VSYNC_TOP_HDMI_H, tg-&gt;vsync_top_hdmi_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VSYNC_BOT_HDMI_L, tg-&gt;vsync_bot_hdmi_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_VSYNC_BOT_HDMI_H, tg-&gt;vsync_bot_hdmi_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_FIELD_TOP_HDMI_L, tg-&gt;field_top_hdmi_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_FIELD_TOP_HDMI_H, tg-&gt;field_top_hdmi_h);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_FIELD_BOT_HDMI_L, tg-&gt;field_bot_hdmi_l);</div><div class='del'>-	hdmi_writeb(hdev, HDMI_TG_FIELD_BOT_HDMI_H, tg-&gt;field_bot_hdmi_h);</div><div class='add'>+	hdmi_writebn(hdev, HDMI_TG_H_FSZ_L, 2, t-&gt;hact.end);</div><div class='add'>+	hdmi_writebn(hdev, HDMI_TG_HACT_ST_L, 2, t-&gt;hact.beg);</div><div class='add'>+	hdmi_writebn(hdev, HDMI_TG_HACT_SZ_L, 2, t-&gt;hact.end - t-&gt;hact.beg);</div><div class='add'>+	hdmi_writebn(hdev, HDMI_TG_VSYNC_L, 2, t-&gt;vsyn[0].beg);</div><div class='add'>+	hdmi_writebn(hdev, HDMI_TG_VACT_ST_L, 2, t-&gt;vact[0].beg);</div><div class='add'>+	hdmi_writebn(hdev, HDMI_TG_VACT_SZ_L, 2,</div><div class='add'>+		t-&gt;vact[0].end - t-&gt;vact[0].beg);</div><div class='add'>+	hdmi_writebn(hdev, HDMI_TG_VSYNC_TOP_HDMI_L, 2, t-&gt;vsyn[0].beg);</div><div class='add'>+	hdmi_writebn(hdev, HDMI_TG_FIELD_TOP_HDMI_L, 2, t-&gt;vsyn[0].beg);</div><div class='add'>+	if (t-&gt;interlaced) {</div><div class='add'>+		hdmi_write_mask(hdev, HDMI_TG_CMD, ~0, HDMI_TG_FIELD_EN);</div><div class='add'>+		hdmi_writebn(hdev, HDMI_TG_V_FSZ_L, 2, t-&gt;vact[1].end);</div><div class='add'>+		hdmi_writebn(hdev, HDMI_TG_VSYNC2_L, 2, t-&gt;vsyn[1].beg);</div><div class='add'>+		hdmi_writebn(hdev, HDMI_TG_FIELD_CHG_L, 2, t-&gt;vact[0].end);</div><div class='add'>+		hdmi_writebn(hdev, HDMI_TG_VACT_ST2_L, 2, t-&gt;vact[1].beg);</div><div class='add'>+		hdmi_writebn(hdev, HDMI_TG_VSYNC_BOT_HDMI_L, 2, t-&gt;vsyn[1].beg);</div><div class='add'>+		hdmi_writebn(hdev, HDMI_TG_FIELD_BOT_HDMI_L, 2, t-&gt;vsyn[1].beg);</div><div class='add'>+	} else {</div><div class='add'>+		hdmi_write_mask(hdev, HDMI_TG_CMD, 0, HDMI_TG_FIELD_EN);</div><div class='add'>+		hdmi_writebn(hdev, HDMI_TG_V_FSZ_L, 2, t-&gt;vact[0].end);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hdmi_conf_apply(struct hdmi_device *hdmi_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = hdmi_dev-&gt;dev;</div><div class='del'>-	const struct hdmi_preset_conf *conf = hdmi_dev-&gt;cur_conf;</div><div class='add'>+	const struct hdmi_timings *conf = hdmi_dev-&gt;cur_conf;</div><div class='ctx'> 	struct v4l2_dv_preset preset;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "%s\n", __func__);</div><div class='ctx'> </div><div class='add'>+	/* skip if conf is already synchronized with HW */</div><div class='add'>+	if (!hdmi_dev-&gt;cur_conf_dirty)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	/* reset hdmiphy */</div><div class='ctx'> 	hdmi_write_mask(hdmi_dev, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT);</div><div class='ctx'> 	mdelay(10);</div><div class='hunk'>@@ -307,6 +284,8 @@ static int hdmi_conf_apply(struct hdmi_device *hdmi_dev)</div><div class='ctx'> 	/* setting core registers */</div><div class='ctx'> 	hdmi_timing_apply(hdmi_dev, conf);</div><div class='ctx'> </div><div class='add'>+	hdmi_dev-&gt;cur_conf_dirty = 0;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -398,156 +377,126 @@ static void hdmi_dumpregs(struct hdmi_device *hdev, char *prefix)</div><div class='ctx'> #undef DUMPREG</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct hdmi_preset_conf hdmi_conf_480p = {</div><div class='del'>-	.core = {</div><div class='del'>-		.h_blank = {0x8a, 0x00},</div><div class='del'>-		.v_blank = {0x0d, 0x6a, 0x01},</div><div class='del'>-		.h_v_line = {0x0d, 0xa2, 0x35},</div><div class='del'>-		.vsync_pol = {0x01},</div><div class='del'>-		.int_pro_mode = {0x00},</div><div class='del'>-		.v_blank_f = {0x00, 0x00, 0x00},</div><div class='del'>-		.h_sync_gen = {0x0e, 0x30, 0x11},</div><div class='del'>-		.v_sync_gen1 = {0x0f, 0x90, 0x00},</div><div class='del'>-		/* other don't care */</div><div class='del'>-	},</div><div class='del'>-	.tg = {</div><div class='del'>-		0x00, /* cmd */</div><div class='del'>-		0x5a, 0x03, /* h_fsz */</div><div class='del'>-		0x8a, 0x00, 0xd0, 0x02, /* hact */</div><div class='del'>-		0x0d, 0x02, /* v_fsz */</div><div class='del'>-		0x01, 0x00, 0x33, 0x02, /* vsync */</div><div class='del'>-		0x2d, 0x00, 0xe0, 0x01, /* vact */</div><div class='del'>-		0x33, 0x02, /* field_chg */</div><div class='del'>-		0x49, 0x02, /* vact_st2 */</div><div class='del'>-		0x01, 0x00, 0x33, 0x02, /* vsync top/bot */</div><div class='del'>-		0x01, 0x00, 0x33, 0x02, /* field top/bot */</div><div class='del'>-	},</div><div class='del'>-	.mbus_fmt = {</div><div class='del'>-		.width = 720,</div><div class='del'>-		.height = 480,</div><div class='del'>-		.code = V4L2_MBUS_FMT_FIXED, /* means RGB888 */</div><div class='del'>-		.field = V4L2_FIELD_NONE,</div><div class='del'>-		.colorspace = V4L2_COLORSPACE_SRGB,</div><div class='del'>-	},</div><div class='add'>+static const struct hdmi_timings hdmi_timings_480p = {</div><div class='add'>+	.hact = { .beg = 138, .end = 858 },</div><div class='add'>+	.hsyn_pol = 1,</div><div class='add'>+	.hsyn = { .beg = 16, .end = 16 + 62 },</div><div class='add'>+	.interlaced = 0,</div><div class='add'>+	.vact[0] = { .beg = 42 + 3, .end = 522 + 3 },</div><div class='add'>+	.vsyn_pol = 1,</div><div class='add'>+	.vsyn[0] = { .beg = 6 + 3, .end = 12 + 3},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct hdmi_preset_conf hdmi_conf_720p60 = {</div><div class='del'>-	.core = {</div><div class='del'>-		.h_blank = {0x72, 0x01},</div><div class='del'>-		.v_blank = {0xee, 0xf2, 0x00},</div><div class='del'>-		.h_v_line = {0xee, 0x22, 0x67},</div><div class='del'>-		.vsync_pol = {0x00},</div><div class='del'>-		.int_pro_mode = {0x00},</div><div class='del'>-		.v_blank_f = {0x00, 0x00, 0x00}, /* don't care */</div><div class='del'>-		.h_sync_gen = {0x6c, 0x50, 0x02},</div><div class='del'>-		.v_sync_gen1 = {0x0a, 0x50, 0x00},</div><div class='del'>-		/* other don't care */</div><div class='del'>-	},</div><div class='del'>-	.tg = {</div><div class='del'>-		0x00, /* cmd */</div><div class='del'>-		0x72, 0x06, /* h_fsz */</div><div class='del'>-		0x72, 0x01, 0x00, 0x05, /* hact */</div><div class='del'>-		0xee, 0x02, /* v_fsz */</div><div class='del'>-		0x01, 0x00, 0x33, 0x02, /* vsync */</div><div class='del'>-		0x1e, 0x00, 0xd0, 0x02, /* vact */</div><div class='del'>-		0x33, 0x02, /* field_chg */</div><div class='del'>-		0x49, 0x02, /* vact_st2 */</div><div class='del'>-		0x01, 0x00, 0x33, 0x02, /* vsync top/bot */</div><div class='del'>-		0x01, 0x00, 0x33, 0x02, /* field top/bot */</div><div class='del'>-	},</div><div class='del'>-	.mbus_fmt = {</div><div class='del'>-		.width = 1280,</div><div class='del'>-		.height = 720,</div><div class='del'>-		.code = V4L2_MBUS_FMT_FIXED, /* means RGB888 */</div><div class='del'>-		.field = V4L2_FIELD_NONE,</div><div class='del'>-		.colorspace = V4L2_COLORSPACE_SRGB,</div><div class='del'>-	},</div><div class='add'>+static const struct hdmi_timings hdmi_timings_576p50 = {</div><div class='add'>+	.hact = { .beg = 144, .end = 864 },</div><div class='add'>+	.hsyn_pol = 1,</div><div class='add'>+	.hsyn = { .beg = 12, .end = 12 + 64 },</div><div class='add'>+	.interlaced = 0,</div><div class='add'>+	.vact[0] = { .beg = 44 + 5, .end = 620 + 5 },</div><div class='add'>+	.vsyn_pol = 1,</div><div class='add'>+	.vsyn[0] = { .beg = 0 + 5, .end = 5 + 5},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct hdmi_preset_conf hdmi_conf_1080p50 = {</div><div class='del'>-	.core = {</div><div class='del'>-		.h_blank = {0xd0, 0x02},</div><div class='del'>-		.v_blank = {0x65, 0x6c, 0x01},</div><div class='del'>-		.h_v_line = {0x65, 0x04, 0xa5},</div><div class='del'>-		.vsync_pol = {0x00},</div><div class='del'>-		.int_pro_mode = {0x00},</div><div class='del'>-		.v_blank_f = {0x00, 0x00, 0x00}, /* don't care */</div><div class='del'>-		.h_sync_gen = {0x0e, 0xea, 0x08},</div><div class='del'>-		.v_sync_gen1 = {0x09, 0x40, 0x00},</div><div class='del'>-		/* other don't care */</div><div class='del'>-	},</div><div class='del'>-	.tg = {</div><div class='del'>-		0x00, /* cmd */</div><div class='del'>-		0x98, 0x08, /* h_fsz */</div><div class='del'>-		0x18, 0x01, 0x80, 0x07, /* hact */</div><div class='del'>-		0x65, 0x04, /* v_fsz */</div><div class='del'>-		0x01, 0x00, 0x33, 0x02, /* vsync */</div><div class='del'>-		0x2d, 0x00, 0x38, 0x04, /* vact */</div><div class='del'>-		0x33, 0x02, /* field_chg */</div><div class='del'>-		0x49, 0x02, /* vact_st2 */</div><div class='del'>-		0x01, 0x00, 0x33, 0x02, /* vsync top/bot */</div><div class='del'>-		0x01, 0x00, 0x33, 0x02, /* field top/bot */</div><div class='del'>-	},</div><div class='del'>-	.mbus_fmt = {</div><div class='del'>-		.width = 1920,</div><div class='del'>-		.height = 1080,</div><div class='del'>-		.code = V4L2_MBUS_FMT_FIXED, /* means RGB888 */</div><div class='del'>-		.field = V4L2_FIELD_NONE,</div><div class='del'>-		.colorspace = V4L2_COLORSPACE_SRGB,</div><div class='del'>-	},</div><div class='add'>+static const struct hdmi_timings hdmi_timings_720p60 = {</div><div class='add'>+	.hact = { .beg = 370, .end = 1650 },</div><div class='add'>+	.hsyn_pol = 0,</div><div class='add'>+	.hsyn = { .beg = 110, .end = 110 + 40 },</div><div class='add'>+	.interlaced = 0,</div><div class='add'>+	.vact[0] = { .beg = 25 + 5, .end = 745 + 5 },</div><div class='add'>+	.vsyn_pol = 0,</div><div class='add'>+	.vsyn[0] = { .beg = 0 + 5, .end = 5 + 5},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct hdmi_preset_conf hdmi_conf_1080p60 = {</div><div class='del'>-	.core = {</div><div class='del'>-		.h_blank = {0x18, 0x01},</div><div class='del'>-		.v_blank = {0x65, 0x6c, 0x01},</div><div class='del'>-		.h_v_line = {0x65, 0x84, 0x89},</div><div class='del'>-		.vsync_pol = {0x00},</div><div class='del'>-		.int_pro_mode = {0x00},</div><div class='del'>-		.v_blank_f = {0x00, 0x00, 0x00}, /* don't care */</div><div class='del'>-		.h_sync_gen = {0x56, 0x08, 0x02},</div><div class='del'>-		.v_sync_gen1 = {0x09, 0x40, 0x00},</div><div class='del'>-		/* other don't care */</div><div class='del'>-	},</div><div class='del'>-	.tg = {</div><div class='del'>-		0x00, /* cmd */</div><div class='del'>-		0x98, 0x08, /* h_fsz */</div><div class='del'>-		0x18, 0x01, 0x80, 0x07, /* hact */</div><div class='del'>-		0x65, 0x04, /* v_fsz */</div><div class='del'>-		0x01, 0x00, 0x33, 0x02, /* vsync */</div><div class='del'>-		0x2d, 0x00, 0x38, 0x04, /* vact */</div><div class='del'>-		0x33, 0x02, /* field_chg */</div><div class='del'>-		0x48, 0x02, /* vact_st2 */</div><div class='del'>-		0x01, 0x00, 0x01, 0x00, /* vsync top/bot */</div><div class='del'>-		0x01, 0x00, 0x33, 0x02, /* field top/bot */</div><div class='del'>-	},</div><div class='del'>-	.mbus_fmt = {</div><div class='del'>-		.width = 1920,</div><div class='del'>-		.height = 1080,</div><div class='del'>-		.code = V4L2_MBUS_FMT_FIXED, /* means RGB888 */</div><div class='del'>-		.field = V4L2_FIELD_NONE,</div><div class='del'>-		.colorspace = V4L2_COLORSPACE_SRGB,</div><div class='del'>-	},</div><div class='add'>+static const struct hdmi_timings hdmi_timings_720p50 = {</div><div class='add'>+	.hact = { .beg = 700, .end = 1980 },</div><div class='add'>+	.hsyn_pol = 0,</div><div class='add'>+	.hsyn = { .beg = 440, .end = 440 + 40 },</div><div class='add'>+	.interlaced = 0,</div><div class='add'>+	.vact[0] = { .beg = 25 + 5, .end = 745 + 5 },</div><div class='add'>+	.vsyn_pol = 0,</div><div class='add'>+	.vsyn[0] = { .beg = 0 + 5, .end = 5 + 5},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hdmi_timings hdmi_timings_1080p24 = {</div><div class='add'>+	.hact = { .beg = 830, .end = 2750 },</div><div class='add'>+	.hsyn_pol = 0,</div><div class='add'>+	.hsyn = { .beg = 638, .end = 638 + 44 },</div><div class='add'>+	.interlaced = 0,</div><div class='add'>+	.vact[0] = { .beg = 41 + 4, .end = 1121 + 4 },</div><div class='add'>+	.vsyn_pol = 0,</div><div class='add'>+	.vsyn[0] = { .beg = 0 + 4, .end = 5 + 4},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hdmi_timings hdmi_timings_1080p60 = {</div><div class='add'>+	.hact = { .beg = 280, .end = 2200 },</div><div class='add'>+	.hsyn_pol = 0,</div><div class='add'>+	.hsyn = { .beg = 88, .end = 88 + 44 },</div><div class='add'>+	.interlaced = 0,</div><div class='add'>+	.vact[0] = { .beg = 41 + 4, .end = 1121 + 4 },</div><div class='add'>+	.vsyn_pol = 0,</div><div class='add'>+	.vsyn[0] = { .beg = 0 + 4, .end = 5 + 4},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hdmi_timings hdmi_timings_1080i60 = {</div><div class='add'>+	.hact = { .beg = 280, .end = 2200 },</div><div class='add'>+	.hsyn_pol = 0,</div><div class='add'>+	.hsyn = { .beg = 88, .end = 88 + 44 },</div><div class='add'>+	.interlaced = 1,</div><div class='add'>+	.vact[0] = { .beg = 20 + 2, .end = 560 + 2 },</div><div class='add'>+	.vact[1] = { .beg = 583 + 2, .end = 1123 + 2 },</div><div class='add'>+	.vsyn_pol = 0,</div><div class='add'>+	.vsyn_off = 1100,</div><div class='add'>+	.vsyn[0] = { .beg = 0 + 2, .end = 5 + 2},</div><div class='add'>+	.vsyn[1] = { .beg = 562 + 2, .end = 567 + 2},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hdmi_timings hdmi_timings_1080i50 = {</div><div class='add'>+	.hact = { .beg = 720, .end = 2640 },</div><div class='add'>+	.hsyn_pol = 0,</div><div class='add'>+	.hsyn = { .beg = 528, .end = 528 + 44 },</div><div class='add'>+	.interlaced = 1,</div><div class='add'>+	.vact[0] = { .beg = 20 + 2, .end = 560 + 2 },</div><div class='add'>+	.vact[1] = { .beg = 583 + 2, .end = 1123 + 2 },</div><div class='add'>+	.vsyn_pol = 0,</div><div class='add'>+	.vsyn_off = 1320,</div><div class='add'>+	.vsyn[0] = { .beg = 0 + 2, .end = 5 + 2},</div><div class='add'>+	.vsyn[1] = { .beg = 562 + 2, .end = 567 + 2},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hdmi_timings hdmi_timings_1080p50 = {</div><div class='add'>+	.hact = { .beg = 720, .end = 2640 },</div><div class='add'>+	.hsyn_pol = 0,</div><div class='add'>+	.hsyn = { .beg = 528, .end = 528 + 44 },</div><div class='add'>+	.interlaced = 0,</div><div class='add'>+	.vact[0] = { .beg = 41 + 4, .end = 1121 + 4 },</div><div class='add'>+	.vsyn_pol = 0,</div><div class='add'>+	.vsyn[0] = { .beg = 0 + 4, .end = 5 + 4},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct {</div><div class='ctx'> 	u32 preset;</div><div class='del'>-	const struct hdmi_preset_conf *conf;</div><div class='del'>-} hdmi_conf[] = {</div><div class='del'>-	{ V4L2_DV_480P59_94, &amp;hdmi_conf_480p },</div><div class='del'>-	{ V4L2_DV_720P59_94, &amp;hdmi_conf_720p60 },</div><div class='del'>-	{ V4L2_DV_1080P50, &amp;hdmi_conf_1080p50 },</div><div class='del'>-	{ V4L2_DV_1080P30, &amp;hdmi_conf_1080p60 },</div><div class='del'>-	{ V4L2_DV_1080P60, &amp;hdmi_conf_1080p60 },</div><div class='add'>+	const struct hdmi_timings *timings;</div><div class='add'>+} hdmi_timings[] = {</div><div class='add'>+	{ V4L2_DV_480P59_94, &amp;hdmi_timings_480p },</div><div class='add'>+	{ V4L2_DV_576P50, &amp;hdmi_timings_576p50 },</div><div class='add'>+	{ V4L2_DV_720P50, &amp;hdmi_timings_720p50 },</div><div class='add'>+	{ V4L2_DV_720P59_94, &amp;hdmi_timings_720p60 },</div><div class='add'>+	{ V4L2_DV_720P60, &amp;hdmi_timings_720p60 },</div><div class='add'>+	{ V4L2_DV_1080P24, &amp;hdmi_timings_1080p24 },</div><div class='add'>+	{ V4L2_DV_1080P30, &amp;hdmi_timings_1080p60 },</div><div class='add'>+	{ V4L2_DV_1080P50, &amp;hdmi_timings_1080p50 },</div><div class='add'>+	{ V4L2_DV_1080I50, &amp;hdmi_timings_1080i50 },</div><div class='add'>+	{ V4L2_DV_1080I60, &amp;hdmi_timings_1080i60 },</div><div class='add'>+	{ V4L2_DV_1080P60, &amp;hdmi_timings_1080p60 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct hdmi_preset_conf *hdmi_preset2conf(u32 preset)</div><div class='add'>+static const struct hdmi_timings *hdmi_preset2timings(u32 preset)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(hdmi_conf); ++i)</div><div class='del'>-		if (hdmi_conf[i].preset == preset)</div><div class='del'>-			return  hdmi_conf[i].conf;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hdmi_timings); ++i)</div><div class='add'>+		if (hdmi_timings[i].preset == preset)</div><div class='add'>+			return  hdmi_timings[i].timings;</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -559,6 +508,10 @@ static int hdmi_streamon(struct hdmi_device *hdev)</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "%s\n", __func__);</div><div class='ctx'> </div><div class='add'>+	ret = hdmi_conf_apply(hdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	ret = v4l2_subdev_call(hdev-&gt;phy_sd, video, s_stream, 1);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -671,14 +624,15 @@ static int hdmi_s_dv_preset(struct v4l2_subdev *sd,</div><div class='ctx'> {</div><div class='ctx'> 	struct hdmi_device *hdev = sd_to_hdmi_dev(sd);</div><div class='ctx'> 	struct device *dev = hdev-&gt;dev;</div><div class='del'>-	const struct hdmi_preset_conf *conf;</div><div class='add'>+	const struct hdmi_timings *conf;</div><div class='ctx'> </div><div class='del'>-	conf = hdmi_preset2conf(preset-&gt;preset);</div><div class='add'>+	conf = hdmi_preset2timings(preset-&gt;preset);</div><div class='ctx'> 	if (conf == NULL) {</div><div class='ctx'> 		dev_err(dev, "preset (%u) not supported\n", preset-&gt;preset);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	hdev-&gt;cur_conf = conf;</div><div class='add'>+	hdev-&gt;cur_conf_dirty = 1;</div><div class='ctx'> 	hdev-&gt;cur_preset = preset-&gt;preset;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -695,21 +649,32 @@ static int hdmi_g_mbus_fmt(struct v4l2_subdev *sd,</div><div class='ctx'> 	  struct v4l2_mbus_framefmt *fmt)</div><div class='ctx'> {</div><div class='ctx'> 	struct hdmi_device *hdev = sd_to_hdmi_dev(sd);</div><div class='del'>-	struct device *dev = hdev-&gt;dev;</div><div class='add'>+	const struct hdmi_timings *t = hdev-&gt;cur_conf;</div><div class='ctx'> </div><div class='del'>-	dev_dbg(dev, "%s\n", __func__);</div><div class='add'>+	dev_dbg(hdev-&gt;dev, "%s\n", __func__);</div><div class='ctx'> 	if (!hdev-&gt;cur_conf)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	*fmt = hdev-&gt;cur_conf-&gt;mbus_fmt;</div><div class='add'>+	memset(fmt, 0, sizeof *fmt);</div><div class='add'>+	fmt-&gt;width = t-&gt;hact.end - t-&gt;hact.beg;</div><div class='add'>+	fmt-&gt;height = t-&gt;vact[0].end - t-&gt;vact[0].beg;</div><div class='add'>+	fmt-&gt;code = V4L2_MBUS_FMT_FIXED; /* means RGB888 */</div><div class='add'>+	fmt-&gt;colorspace = V4L2_COLORSPACE_SRGB;</div><div class='add'>+	if (t-&gt;interlaced) {</div><div class='add'>+		fmt-&gt;field = V4L2_FIELD_INTERLACED;</div><div class='add'>+		fmt-&gt;height *= 2;</div><div class='add'>+	} else {</div><div class='add'>+		fmt-&gt;field = V4L2_FIELD_NONE;</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hdmi_enum_dv_presets(struct v4l2_subdev *sd,</div><div class='ctx'> 	struct v4l2_dv_enum_preset *preset)</div><div class='ctx'> {</div><div class='del'>-	if (preset-&gt;index &gt;= ARRAY_SIZE(hdmi_conf))</div><div class='add'>+	if (preset-&gt;index &gt;= ARRAY_SIZE(hdmi_timings))</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	return v4l_fill_dv_preset_info(hdmi_conf[preset-&gt;index].preset, preset);</div><div class='add'>+	return v4l_fill_dv_preset_info(hdmi_timings[preset-&gt;index].preset,</div><div class='add'>+		preset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct v4l2_subdev_core_ops hdmi_sd_core_ops = {</div><div class='hunk'>@@ -737,6 +702,8 @@ static int hdmi_runtime_suspend(struct device *dev)</div><div class='ctx'> 	dev_dbg(dev, "%s\n", __func__);</div><div class='ctx'> 	v4l2_subdev_call(hdev-&gt;mhl_sd, core, s_power, 0);</div><div class='ctx'> 	hdmi_resource_poweroff(&amp;hdev-&gt;res);</div><div class='add'>+	/* flag that device context is lost */</div><div class='add'>+	hdev-&gt;cur_conf_dirty = 1;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -750,10 +717,6 @@ static int hdmi_runtime_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	hdmi_resource_poweron(&amp;hdev-&gt;res);</div><div class='ctx'> </div><div class='del'>-	ret = hdmi_conf_apply(hdev);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='ctx'> 	/* starting MHL */</div><div class='ctx'> 	ret = v4l2_subdev_call(hdev-&gt;mhl_sd, core, s_power, 1);</div><div class='ctx'> 	if (hdev-&gt;mhl_sd &amp;&amp; ret)</div><div class='hunk'>@@ -993,7 +956,8 @@ static int __devinit hdmi_probe(struct platform_device *pdev)</div><div class='ctx'> 	strlcpy(sd-&gt;name, "s5p-hdmi", sizeof sd-&gt;name);</div><div class='ctx'> 	hdmi_dev-&gt;cur_preset = HDMI_DEFAULT_PRESET;</div><div class='ctx'> 	/* FIXME: missing fail preset is not supported */</div><div class='del'>-	hdmi_dev-&gt;cur_conf = hdmi_preset2conf(hdmi_dev-&gt;cur_preset);</div><div class='add'>+	hdmi_dev-&gt;cur_conf = hdmi_preset2timings(hdmi_dev-&gt;cur_preset);</div><div class='add'>+	hdmi_dev-&gt;cur_conf_dirty = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* storing subdev for call that have only access to struct device */</div><div class='ctx'> 	dev_set_drvdata(dev, sd);</div><div class='head'>diff --git a/drivers/media/video/s5p-tv/hdmiphy_drv.c b/drivers/media/video/s5p-tv/hdmiphy_drv.c<br/>index 0afef77747e5..f67b38631801 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/hdmiphy_drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-tv/hdmiphy_drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/hdmiphy_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/hdmiphy_drv.c</a></div><div class='hunk'>@@ -26,53 +26,188 @@ MODULE_DESCRIPTION("Samsung HDMI Physical interface driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> struct hdmiphy_conf {</div><div class='del'>-	u32 preset;</div><div class='add'>+	unsigned long pixclk;</div><div class='ctx'> 	const u8 *data;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const u8 hdmiphy_conf27[32] = {</div><div class='del'>-	0x01, 0x05, 0x00, 0xD8, 0x10, 0x1C, 0x30, 0x40,</div><div class='del'>-	0x6B, 0x10, 0x02, 0x51, 0xDf, 0xF2, 0x54, 0x87,</div><div class='del'>-	0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='del'>-	0x22, 0x40, 0xe3, 0x26, 0x00, 0x00, 0x00, 0x00,</div><div class='add'>+struct hdmiphy_ctx {</div><div class='add'>+	struct v4l2_subdev sd;</div><div class='add'>+	const struct hdmiphy_conf *conf_tab;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const u8 hdmiphy_conf74_175[32] = {</div><div class='del'>-	0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xef, 0x5B,</div><div class='del'>-	0x6D, 0x10, 0x01, 0x51, 0xef, 0xF3, 0x54, 0xb9,</div><div class='del'>-	0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='del'>-	0x22, 0x40, 0xa5, 0x26, 0x01, 0x00, 0x00, 0x00,</div><div class='add'>+static const struct hdmiphy_conf hdmiphy_conf_s5pv210[] = {</div><div class='add'>+	{ .pixclk = 27000000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x05, 0x00, 0xD8, 0x10, 0x1C, 0x30, 0x40,</div><div class='add'>+		0x6B, 0x10, 0x02, 0x52, 0xDF, 0xF2, 0x54, 0x87,</div><div class='add'>+		0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='add'>+		0x22, 0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 27027000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x05, 0x00, 0xD4, 0x10, 0x9C, 0x09, 0x64,</div><div class='add'>+		0x6B, 0x10, 0x02, 0x52, 0xDF, 0xF2, 0x54, 0x87,</div><div class='add'>+		0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='add'>+		0x22, 0x40, 0xE2, 0x26, 0x00, 0x00, 0x00, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 74176000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xEF, 0x5B,</div><div class='add'>+		0x6D, 0x10, 0x01, 0x52, 0xEF, 0xF3, 0x54, 0xB9,</div><div class='add'>+		0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='add'>+		0x22, 0x40, 0xA5, 0x26, 0x01, 0x00, 0x00, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 74250000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xF8, 0x40,</div><div class='add'>+		0x6A, 0x10, 0x01, 0x52, 0xFF, 0xF1, 0x54, 0xBA,</div><div class='add'>+		0x84, 0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='add'>+		0x22, 0x40, 0xA4, 0x26, 0x01, 0x00, 0x00, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ /* end marker */ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const u8 hdmiphy_conf74_25[32] = {</div><div class='del'>-	0x01, 0x05, 0x00, 0xd8, 0x10, 0x9c, 0xf8, 0x40,</div><div class='del'>-	0x6a, 0x10, 0x01, 0x51, 0xff, 0xf1, 0x54, 0xba,</div><div class='del'>-	0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xe0,</div><div class='del'>-	0x22, 0x40, 0xa4, 0x26, 0x01, 0x00, 0x00, 0x00,</div><div class='add'>+static const struct hdmiphy_conf hdmiphy_conf_exynos4210[] = {</div><div class='add'>+	{ .pixclk = 27000000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x05, 0x00, 0xD8, 0x10, 0x1C, 0x30, 0x40,</div><div class='add'>+		0x6B, 0x10, 0x02, 0x51, 0xDF, 0xF2, 0x54, 0x87,</div><div class='add'>+		0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='add'>+		0x22, 0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 27027000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x05, 0x00, 0xD4, 0x10, 0x9C, 0x09, 0x64,</div><div class='add'>+		0x6B, 0x10, 0x02, 0x51, 0xDF, 0xF2, 0x54, 0x87,</div><div class='add'>+		0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='add'>+		0x22, 0x40, 0xE2, 0x26, 0x00, 0x00, 0x00, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 74176000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xEF, 0x5B,</div><div class='add'>+		0x6D, 0x10, 0x01, 0x51, 0xEF, 0xF3, 0x54, 0xB9,</div><div class='add'>+		0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='add'>+		0x22, 0x40, 0xA5, 0x26, 0x01, 0x00, 0x00, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 74250000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xF8, 0x40,</div><div class='add'>+		0x6A, 0x10, 0x01, 0x51, 0xFF, 0xF1, 0x54, 0xBA,</div><div class='add'>+		0x84, 0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='add'>+		0x22, 0x40, 0xA4, 0x26, 0x01, 0x00, 0x00, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 148352000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xEF, 0x5B,</div><div class='add'>+		0x6D, 0x18, 0x00, 0x51, 0xEF, 0xF3, 0x54, 0xB9,</div><div class='add'>+		0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='add'>+		0x11, 0x40, 0xA5, 0x26, 0x02, 0x00, 0x00, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 148500000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xF8, 0x40,</div><div class='add'>+		0x6A, 0x18, 0x00, 0x51, 0xFF, 0xF1, 0x54, 0xBA,</div><div class='add'>+		0x84, 0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='add'>+		0x11, 0x40, 0xA4, 0x26, 0x02, 0x00, 0x00, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ /* end marker */ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const u8 hdmiphy_conf148_5[32] = {</div><div class='del'>-	0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xf8, 0x40,</div><div class='del'>-	0x6A, 0x18, 0x00, 0x51, 0xff, 0xF1, 0x54, 0xba,</div><div class='del'>-	0x84, 0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xE0,</div><div class='del'>-	0x22, 0x40, 0xa4, 0x26, 0x02, 0x00, 0x00, 0x00,</div><div class='add'>+static const struct hdmiphy_conf hdmiphy_conf_exynos4212[] = {</div><div class='add'>+	{ .pixclk = 27000000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x11, 0x2D, 0x75, 0x00, 0x01, 0x00, 0x08,</div><div class='add'>+		0x82, 0x00, 0x0E, 0xD9, 0x45, 0xA0, 0x34, 0xC0,</div><div class='add'>+		0x0B, 0x80, 0x12, 0x87, 0x08, 0x24, 0x24, 0x71,</div><div class='add'>+		0x54, 0xE3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 27027000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x91, 0x2D, 0x72, 0x00, 0x64, 0x12, 0x08,</div><div class='add'>+		0x43, 0x20, 0x0E, 0xD9, 0x45, 0xA0, 0x34, 0xC0,</div><div class='add'>+		0x0B, 0x80, 0x12, 0x87, 0x08, 0x24, 0x24, 0x71,</div><div class='add'>+		0x54, 0xE2, 0x24, 0x00, 0x00, 0x00, 0x01, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 74176000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x91, 0x3E, 0x35, 0x00, 0x5B, 0xDE, 0x08,</div><div class='add'>+		0x82, 0x20, 0x73, 0xD9, 0x45, 0xA0, 0x34, 0xC0,</div><div class='add'>+		0x0B, 0x80, 0x12, 0x87, 0x08, 0x24, 0x24, 0x52,</div><div class='add'>+		0x54, 0xA5, 0x24, 0x01, 0x00, 0x00, 0x01, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 74250000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x91, 0x3E, 0x35, 0x00, 0x40, 0xF0, 0x08,</div><div class='add'>+		0x82, 0x20, 0x73, 0xD9, 0x45, 0xA0, 0x34, 0xC0,</div><div class='add'>+		0x0B, 0x80, 0x12, 0x87, 0x08, 0x24, 0x24, 0x52,</div><div class='add'>+		0x54, 0xA4, 0x24, 0x01, 0x00, 0x00, 0x01, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 148500000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x91, 0x3E, 0x15, 0x00, 0x40, 0xF0, 0x08,</div><div class='add'>+		0x82, 0x20, 0x73, 0xD9, 0x45, 0xA0, 0x34, 0xC0,</div><div class='add'>+		0x0B, 0x80, 0x12, 0x87, 0x08, 0x24, 0x24, 0xA4,</div><div class='add'>+		0x54, 0x4A, 0x25, 0x03, 0x00, 0x00, 0x01, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ /* end marker */ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct hdmiphy_conf hdmiphy_conf[] = {</div><div class='del'>-	{ V4L2_DV_480P59_94, hdmiphy_conf27 },</div><div class='del'>-	{ V4L2_DV_1080P30, hdmiphy_conf74_175 },</div><div class='del'>-	{ V4L2_DV_720P59_94, hdmiphy_conf74_175 },</div><div class='del'>-	{ V4L2_DV_720P60, hdmiphy_conf74_25 },</div><div class='del'>-	{ V4L2_DV_1080P50, hdmiphy_conf148_5 },</div><div class='del'>-	{ V4L2_DV_1080P60, hdmiphy_conf148_5 },</div><div class='add'>+static const struct hdmiphy_conf hdmiphy_conf_exynos4412[] = {</div><div class='add'>+	{ .pixclk = 27000000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x11, 0x2D, 0x75, 0x40, 0x01, 0x00, 0x08,</div><div class='add'>+		0x82, 0x00, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, 0x80,</div><div class='add'>+		0x08, 0x80, 0x11, 0x84, 0x02, 0x22, 0x44, 0x86,</div><div class='add'>+		0x54, 0xE4, 0x24, 0x00, 0x00, 0x00, 0x01, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 27027000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x91, 0x2D, 0x72, 0x40, 0x64, 0x12, 0x08,</div><div class='add'>+		0x43, 0x20, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, 0x80,</div><div class='add'>+		0x08, 0x80, 0x11, 0x84, 0x02, 0x22, 0x44, 0x86,</div><div class='add'>+		0x54, 0xE3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 74176000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x91, 0x1F, 0x10, 0x40, 0x5B, 0xEF, 0x08,</div><div class='add'>+		0x81, 0x20, 0xB9, 0xD8, 0x45, 0xA0, 0xAC, 0x80,</div><div class='add'>+		0x08, 0x80, 0x11, 0x84, 0x02, 0x22, 0x44, 0x86,</div><div class='add'>+		0x54, 0xA6, 0x24, 0x01, 0x00, 0x00, 0x01, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 74250000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x91, 0x1F, 0x10, 0x40, 0x40, 0xF8, 0x08,</div><div class='add'>+		0x81, 0x20, 0xBA, 0xD8, 0x45, 0xA0, 0xAC, 0x80,</div><div class='add'>+		0x08, 0x80, 0x11, 0x84, 0x02, 0x22, 0x44, 0x86,</div><div class='add'>+		0x54, 0xA5, 0x24, 0x01, 0x00, 0x00, 0x01, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ .pixclk = 148500000, .data = (u8 [32]) {</div><div class='add'>+		0x01, 0x91, 0x1F, 0x00, 0x40, 0x40, 0xF8, 0x08,</div><div class='add'>+		0x81, 0x20, 0xBA, 0xD8, 0x45, 0xA0, 0xAC, 0x80,</div><div class='add'>+		0x08, 0x80, 0x11, 0x84, 0x02, 0x22, 0x44, 0x86,</div><div class='add'>+		0x54, 0x4B, 0x25, 0x03, 0x00, 0x00, 0x01, 0x00, }</div><div class='add'>+	},</div><div class='add'>+	{ /* end marker */ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const u8 *hdmiphy_preset2conf(u32 preset)</div><div class='add'>+static inline struct hdmiphy_ctx *sd_to_ctx(struct v4l2_subdev *sd)</div><div class='add'>+{</div><div class='add'>+	return container_of(sd, struct hdmiphy_ctx, sd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long hdmiphy_preset_to_pixclk(u32 preset)</div><div class='add'>+{</div><div class='add'>+	static const unsigned long pixclk[] = {</div><div class='add'>+		[V4L2_DV_480P59_94] =  27000000,</div><div class='add'>+		[V4L2_DV_576P50]    =  27000000,</div><div class='add'>+		[V4L2_DV_720P59_94] =  74176000,</div><div class='add'>+		[V4L2_DV_720P50]    =  74250000,</div><div class='add'>+		[V4L2_DV_720P60]    =  74250000,</div><div class='add'>+		[V4L2_DV_1080P24]   =  74250000,</div><div class='add'>+		[V4L2_DV_1080P30]   =  74250000,</div><div class='add'>+		[V4L2_DV_1080I50]   =  74250000,</div><div class='add'>+		[V4L2_DV_1080I60]   =  74250000,</div><div class='add'>+		[V4L2_DV_1080P50]   = 148500000,</div><div class='add'>+		[V4L2_DV_1080P60]   = 148500000,</div><div class='add'>+	};</div><div class='add'>+	if (preset &lt; ARRAY_SIZE(pixclk))</div><div class='add'>+		return pixclk[preset];</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u8 *hdmiphy_find_conf(u32 preset, const struct hdmiphy_conf *conf)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(hdmiphy_conf); ++i)</div><div class='del'>-		if (hdmiphy_conf[i].preset == preset)</div><div class='del'>-			return hdmiphy_conf[i].data;</div><div class='add'>+	unsigned long pixclk;</div><div class='add'>+</div><div class='add'>+	pixclk = hdmiphy_preset_to_pixclk(preset);</div><div class='add'>+	if (!pixclk)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	for (; conf-&gt;pixclk; ++conf)</div><div class='add'>+		if (conf-&gt;pixclk == pixclk)</div><div class='add'>+			return conf-&gt;data;</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -88,11 +223,12 @@ static int hdmiphy_s_dv_preset(struct v4l2_subdev *sd,</div><div class='ctx'> 	const u8 *data;</div><div class='ctx'> 	u8 buffer[32];</div><div class='ctx'> 	int ret;</div><div class='add'>+	struct hdmiphy_ctx *ctx = sd_to_ctx(sd);</div><div class='ctx'> 	struct i2c_client *client = v4l2_get_subdevdata(sd);</div><div class='ctx'> 	struct device *dev = &amp;client-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	dev_info(dev, "s_dv_preset(preset = %d)\n", preset-&gt;preset);</div><div class='del'>-	data = hdmiphy_preset2conf(preset-&gt;preset);</div><div class='add'>+	data = hdmiphy_find_conf(preset-&gt;preset, ctx-&gt;conf_tab);</div><div class='ctx'> 	if (!data) {</div><div class='ctx'> 		dev_err(dev, "format not supported\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -146,21 +282,36 @@ static const struct v4l2_subdev_ops hdmiphy_ops = {</div><div class='ctx'> static int __devinit hdmiphy_probe(struct i2c_client *client,</div><div class='ctx'> 	const struct i2c_device_id *id)</div><div class='ctx'> {</div><div class='del'>-	static struct v4l2_subdev sd;</div><div class='add'>+	struct hdmiphy_ctx *ctx;</div><div class='add'>+</div><div class='add'>+	ctx = kzalloc(sizeof *ctx, GFP_KERNEL);</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;conf_tab = (struct hdmiphy_conf *)id-&gt;driver_data;</div><div class='add'>+	v4l2_i2c_subdev_init(&amp;ctx-&gt;sd, client, &amp;hdmiphy_ops);</div><div class='ctx'> </div><div class='del'>-	v4l2_i2c_subdev_init(&amp;sd, client, &amp;hdmiphy_ops);</div><div class='ctx'> 	dev_info(&amp;client-&gt;dev, "probe successful\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit hdmiphy_remove(struct i2c_client *client)</div><div class='ctx'> {</div><div class='add'>+	struct v4l2_subdev *sd = i2c_get_clientdata(client);</div><div class='add'>+	struct hdmiphy_ctx *ctx = sd_to_ctx(sd);</div><div class='add'>+</div><div class='add'>+	kfree(ctx);</div><div class='ctx'> 	dev_info(&amp;client-&gt;dev, "remove successful\n");</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct i2c_device_id hdmiphy_id[] = {</div><div class='del'>-	{ "hdmiphy", 0 },</div><div class='add'>+	{ "hdmiphy", (unsigned long)hdmiphy_conf_exynos4210 },</div><div class='add'>+	{ "hdmiphy-s5pv210", (unsigned long)hdmiphy_conf_s5pv210 },</div><div class='add'>+	{ "hdmiphy-exynos4210", (unsigned long)hdmiphy_conf_exynos4210 },</div><div class='add'>+	{ "hdmiphy-exynos4212", (unsigned long)hdmiphy_conf_exynos4212 },</div><div class='add'>+	{ "hdmiphy-exynos4412", (unsigned long)hdmiphy_conf_exynos4412 },</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(i2c, hdmiphy_id);</div><div class='head'>diff --git a/drivers/media/video/s5p-tv/mixer.h b/drivers/media/video/s5p-tv/mixer.h<br/>index 1597078c4a50..ddb422e23550 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/mixer.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-tv/mixer.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/mixer.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/mixer.h</a></div><div class='hunk'>@@ -226,6 +226,7 @@ struct mxr_resources {</div><div class='ctx'> /* event flags used  */</div><div class='ctx'> enum mxr_devide_flags {</div><div class='ctx'> 	MXR_EVENT_VSYNC = 0,</div><div class='add'>+	MXR_EVENT_TOP = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /** drivers instance */</div><div class='hunk'>@@ -293,7 +294,7 @@ int __devinit mxr_acquire_video(struct mxr_device *mdev,</div><div class='ctx'> 	struct mxr_output_conf *output_cont, int output_count);</div><div class='ctx'> </div><div class='ctx'> /** releasing common video resources */</div><div class='del'>-void __devexit mxr_release_video(struct mxr_device *mdev);</div><div class='add'>+void mxr_release_video(struct mxr_device *mdev);</div><div class='ctx'> </div><div class='ctx'> struct mxr_layer *mxr_graph_layer_create(struct mxr_device *mdev, int idx);</div><div class='ctx'> struct mxr_layer *mxr_vp_layer_create(struct mxr_device *mdev, int idx);</div><div class='head'>diff --git a/drivers/media/video/s5p-tv/mixer_drv.c b/drivers/media/video/s5p-tv/mixer_drv.c<br/>index a2c0c25ad130..edca06592883 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/mixer_drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-tv/mixer_drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/mixer_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/mixer_drv.c</a></div><div class='hunk'>@@ -461,7 +461,7 @@ static struct platform_driver mxr_driver __refdata = {</div><div class='ctx'> static int __init mxr_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i, ret;</div><div class='del'>-	static const char banner[] __initdata = KERN_INFO</div><div class='add'>+	static const char banner[] __initconst = KERN_INFO</div><div class='ctx'> 		"Samsung TV Mixer driver, "</div><div class='ctx'> 		"(c) 2010-2011 Samsung Electronics Co., Ltd.\n";</div><div class='ctx'> 	printk(banner);</div><div class='head'>diff --git a/drivers/media/video/s5p-tv/mixer_reg.c b/drivers/media/video/s5p-tv/mixer_reg.c<br/>index 4800a3cbb297..3b1670a045f4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/mixer_reg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-tv/mixer_reg.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/mixer_reg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/mixer_reg.c</a></div><div class='hunk'>@@ -296,21 +296,25 @@ irqreturn_t mxr_irq_handler(int irq, void *dev_data)</div><div class='ctx'> 	/* wake up process waiting for VSYNC */</div><div class='ctx'> 	if (val &amp; MXR_INT_STATUS_VSYNC) {</div><div class='ctx'> 		set_bit(MXR_EVENT_VSYNC, &amp;mdev-&gt;event_flags);</div><div class='add'>+		/* toggle TOP field event if working in interlaced mode */</div><div class='add'>+		if (~mxr_read(mdev, MXR_CFG) &amp; MXR_CFG_SCAN_PROGRASSIVE)</div><div class='add'>+			change_bit(MXR_EVENT_TOP, &amp;mdev-&gt;event_flags);</div><div class='ctx'> 		wake_up(&amp;mdev-&gt;event_queue);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* clear interrupts */</div><div class='del'>-	if (~val &amp; MXR_INT_EN_VSYNC) {</div><div class='ctx'> 		/* vsync interrupt use different bit for read and clear */</div><div class='del'>-		val &amp;= ~MXR_INT_EN_VSYNC;</div><div class='add'>+		val &amp;= ~MXR_INT_STATUS_VSYNC;</div><div class='ctx'> 		val |= MXR_INT_CLEAR_VSYNC;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* clear interrupts */</div><div class='ctx'> 	mxr_write(mdev, MXR_INT_STATUS, val);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;mdev-&gt;reg_slock);</div><div class='ctx'> 	/* leave on non-vsync event */</div><div class='ctx'> 	if (~val &amp; MXR_INT_CLEAR_VSYNC)</div><div class='ctx'> 		return IRQ_HANDLED;</div><div class='add'>+	/* skip layer update on bottom field */</div><div class='add'>+	if (!test_bit(MXR_EVENT_TOP, &amp;mdev-&gt;event_flags))</div><div class='add'>+		return IRQ_HANDLED;</div><div class='ctx'> 	for (i = 0; i &lt; MXR_MAX_LAYERS; ++i)</div><div class='ctx'> 		mxr_irq_layer_handle(mdev-&gt;layer[i]);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='hunk'>@@ -333,6 +337,7 @@ void mxr_reg_streamon(struct mxr_device *mdev)</div><div class='ctx'> </div><div class='ctx'> 	/* start MIXER */</div><div class='ctx'> 	mxr_write_mask(mdev, MXR_STATUS, ~0, MXR_STATUS_REG_RUN);</div><div class='add'>+	set_bit(MXR_EVENT_TOP, &amp;mdev-&gt;event_flags);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;mdev-&gt;reg_slock, flags);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/media/video/s5p-tv/mixer_video.c b/drivers/media/video/s5p-tv/mixer_video.c<br/>index f7ca5cc143c6..33fde2a763ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/mixer_video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-tv/mixer_video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/mixer_video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/mixer_video.c</a></div><div class='hunk'>@@ -140,7 +140,7 @@ fail:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __devexit mxr_release_video(struct mxr_device *mdev)</div><div class='add'>+void mxr_release_video(struct mxr_device *mdev)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -853,8 +853,8 @@ static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,</div><div class='ctx'> 	*nplanes = fmt-&gt;num_subframes;</div><div class='ctx'> 	for (i = 0; i &lt; fmt-&gt;num_subframes; ++i) {</div><div class='ctx'> 		alloc_ctxs[i] = layer-&gt;mdev-&gt;alloc_ctx;</div><div class='del'>-		sizes[i] = PAGE_ALIGN(planes[i].sizeimage);</div><div class='del'>-		mxr_dbg(mdev, "size[%d] = %08lx\n", i, sizes[i]);</div><div class='add'>+		sizes[i] = planes[i].sizeimage;</div><div class='add'>+		mxr_dbg(mdev, "size[%d] = %08x\n", i, sizes[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (*nbuffers == 0)</div><div class='hunk'>@@ -1069,6 +1069,10 @@ struct mxr_layer *mxr_base_layer_create(struct mxr_device *mdev,</div><div class='ctx'> 	set_bit(V4L2_FL_USE_FH_PRIO, &amp;layer-&gt;vfd.flags);</div><div class='ctx'> </div><div class='ctx'> 	video_set_drvdata(&amp;layer-&gt;vfd, layer);</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;layer-&gt;vfd.flags);</div><div class='ctx'> 	layer-&gt;vfd.lock = &amp;layer-&gt;mutex;</div><div class='ctx'> 	layer-&gt;vfd.v4l2_dev = &amp;mdev-&gt;v4l2_dev;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/s5p-tv/regs-hdmi.h b/drivers/media/video/s5p-tv/regs-hdmi.h<br/>index 33247d13e4c0..a889d1f57f28 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/regs-hdmi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/s5p-tv/regs-hdmi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/s5p-tv/regs-hdmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/s5p-tv/regs-hdmi.h</a></div><div class='hunk'>@@ -140,6 +140,7 @@</div><div class='ctx'> #define HDMI_MODE_MASK			(3 &lt;&lt; 0)</div><div class='ctx'> </div><div class='ctx'> /* HDMI_TG_CMD */</div><div class='add'>+#define HDMI_TG_FIELD_EN		(1 &lt;&lt; 1)</div><div class='ctx'> #define HDMI_TG_EN			(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='ctx'> #endif /* SAMSUNG_REGS_HDMI_H */</div><div class='head'>diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c<br/>index 53aae5968ffb..bc08f1dbc293 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/saa7134/saa7134-cards.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/saa7134/saa7134-cards.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/saa7134/saa7134-cards.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7134/saa7134-cards.c</a></div><div class='hunk'>@@ -5080,6 +5080,36 @@ struct saa7134_board saa7134_boards[] = {</div><div class='ctx'> 			.gpio = 0x0200000,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='add'>+	[SAA7134_BOARD_ASUSTeK_PS3_100] = {</div><div class='add'>+		.name           = "Asus My Cinema PS3-100",</div><div class='add'>+		.audio_clock    = 0x00187de7,</div><div class='add'>+		.tuner_type     = TUNER_PHILIPS_TDA8290,</div><div class='add'>+		.radio_type     = UNSET,</div><div class='add'>+		.tuner_addr     = ADDR_UNSET,</div><div class='add'>+		.radio_addr     = ADDR_UNSET,</div><div class='add'>+		.tuner_config   = 2,</div><div class='add'>+		.gpiomask       = 1 &lt;&lt; 21,</div><div class='add'>+		.mpeg           = SAA7134_MPEG_DVB,</div><div class='add'>+		.inputs         = {{</div><div class='add'>+			.name = name_tv,</div><div class='add'>+			.vmux = 1,</div><div class='add'>+			.amux = TV,</div><div class='add'>+			.tv   = 1,</div><div class='add'>+		}, {</div><div class='add'>+			.name = name_comp,</div><div class='add'>+			.vmux = 0,</div><div class='add'>+			.amux = LINE2,</div><div class='add'>+		}, {</div><div class='add'>+			.name = name_svideo,</div><div class='add'>+			.vmux = 8,</div><div class='add'>+			.amux = LINE2,</div><div class='add'>+		} },</div><div class='add'>+		.radio = {</div><div class='add'>+			.name = name_radio,</div><div class='add'>+			.amux = TV,</div><div class='add'>+			.gpio = 0x0200000,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> 	[SAA7134_BOARD_REAL_ANGEL_220] = {</div><div class='ctx'> 		.name           = "Zogis Real Angel 220",</div><div class='ctx'> 		.audio_clock    = 0x00187de7,</div><div class='hunk'>@@ -6877,6 +6907,12 @@ struct pci_device_id saa7134_pci_tbl[] = {</div><div class='ctx'> 		.driver_data  = SAA7134_BOARD_ASUSTeK_TIGER_3IN1,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.vendor       = PCI_VENDOR_ID_PHILIPS,</div><div class='add'>+		.device       = PCI_DEVICE_ID_PHILIPS_SAA7133,</div><div class='add'>+		.subvendor    = 0x1043,</div><div class='add'>+		.subdevice    = 0x48cd,</div><div class='add'>+		.driver_data  = SAA7134_BOARD_ASUSTeK_PS3_100,</div><div class='add'>+	}, {</div><div class='add'>+		.vendor       = PCI_VENDOR_ID_PHILIPS,</div><div class='ctx'> 		.device       = PCI_DEVICE_ID_PHILIPS_SAA7134,</div><div class='ctx'> 		.subvendor    = 0x17de,</div><div class='ctx'> 		.subdevice    = 0x7128,</div><div class='hunk'>@@ -7347,6 +7383,7 @@ int saa7134_board_init1(struct saa7134_dev *dev)</div><div class='ctx'> 	case SAA7134_BOARD_KWORLD_TERMINATOR:</div><div class='ctx'> 	case SAA7134_BOARD_SEDNA_PC_TV_CARDBUS:</div><div class='ctx'> 	case SAA7134_BOARD_FLYDVBT_LR301:</div><div class='add'>+	case SAA7134_BOARD_ASUSTeK_PS3_100:</div><div class='ctx'> 	case SAA7134_BOARD_ASUSTeK_P7131_DUAL:</div><div class='ctx'> 	case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:</div><div class='ctx'> 	case SAA7134_BOARD_ASUSTeK_P7131_ANALOG:</div><div class='hunk'>@@ -7811,6 +7848,14 @@ int saa7134_board_init2(struct saa7134_dev *dev)</div><div class='ctx'> 		i2c_transfer(&amp;dev-&gt;i2c_adap, &amp;msg, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	case SAA7134_BOARD_ASUSTeK_PS3_100:</div><div class='add'>+	{</div><div class='add'>+		u8 data[] = { 0x3c, 0x33, 0x60};</div><div class='add'>+		struct i2c_msg msg = {.addr = 0x0b, .flags = 0, .buf = data,</div><div class='add'>+						       .len = sizeof(data)};</div><div class='add'>+		i2c_transfer(&amp;dev-&gt;i2c_adap, &amp;msg, 1);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> 	case SAA7134_BOARD_FLYDVB_TRIO:</div><div class='ctx'> 	{</div><div class='ctx'> 		u8 temp = 0;</div><div class='head'>diff --git a/drivers/media/video/saa7134/saa7134-dvb.c b/drivers/media/video/saa7134/saa7134-dvb.c<br/>index aaa5c97a7216..5dfd826d734e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/saa7134/saa7134-dvb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/saa7134/saa7134-dvb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/saa7134/saa7134-dvb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7134/saa7134-dvb.c</a></div><div class='hunk'>@@ -881,6 +881,20 @@ static struct tda1004x_config asus_tiger_3in1_config = {</div><div class='ctx'> 	.request_firmware = philips_tda1004x_request_firmware</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct tda1004x_config asus_ps3_100_config = {</div><div class='add'>+	.demod_address = 0x0b,</div><div class='add'>+	.invert        = 1,</div><div class='add'>+	.invert_oclk   = 0,</div><div class='add'>+	.xtal_freq     = TDA10046_XTAL_16M,</div><div class='add'>+	.agc_config    = TDA10046_AGC_TDA827X,</div><div class='add'>+	.gpio_config   = TDA10046_GP11_I,</div><div class='add'>+	.if_freq       = TDA10046_FREQ_045,</div><div class='add'>+	.i2c_gate      = 0x4b,</div><div class='add'>+	.tuner_address = 0x61,</div><div class='add'>+	.antenna_switch = 1,</div><div class='add'>+	.request_firmware = philips_tda1004x_request_firmware</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* ------------------------------------------------------------------</div><div class='ctx'>  * special case: this card uses saa713x GPIO22 for the mode switch</div><div class='ctx'>  */</div><div class='hunk'>@@ -1647,6 +1661,31 @@ static int dvb_init(struct saa7134_dev *dev)</div><div class='ctx'> 						&amp;dev-&gt;i2c_adap, 0, 0) == NULL) {</div><div class='ctx'> 					wprintk("%s: Asus Tiger 3in1, no lnbp21"</div><div class='ctx'> 						" found!\n", __func__);</div><div class='add'>+				       goto dettach_frontend;</div><div class='add'>+			       }</div><div class='add'>+		       }</div><div class='add'>+	       }</div><div class='add'>+	       break;</div><div class='add'>+	case SAA7134_BOARD_ASUSTeK_PS3_100:</div><div class='add'>+		if (!use_frontend) {     /* terrestrial */</div><div class='add'>+			if (configure_tda827x_fe(dev, &amp;asus_ps3_100_config,</div><div class='add'>+						 &amp;tda827x_cfg_2) &lt; 0)</div><div class='add'>+				goto dettach_frontend;</div><div class='add'>+	       } else {                /* satellite */</div><div class='add'>+			fe0-&gt;dvb.frontend = dvb_attach(tda10086_attach,</div><div class='add'>+						       &amp;flydvbs, &amp;dev-&gt;i2c_adap);</div><div class='add'>+			if (fe0-&gt;dvb.frontend) {</div><div class='add'>+				if (dvb_attach(tda826x_attach,</div><div class='add'>+					       fe0-&gt;dvb.frontend, 0x60,</div><div class='add'>+					       &amp;dev-&gt;i2c_adap, 0) == NULL) {</div><div class='add'>+					wprintk("%s: Asus My Cinema PS3-100, no "</div><div class='add'>+						"tda826x found!\n", __func__);</div><div class='add'>+					goto dettach_frontend;</div><div class='add'>+				}</div><div class='add'>+				if (dvb_attach(lnbp21_attach, fe0-&gt;dvb.frontend,</div><div class='add'>+					       &amp;dev-&gt;i2c_adap, 0, 0) == NULL) {</div><div class='add'>+					wprintk("%s: Asus My Cinema PS3-100, no lnbp21"</div><div class='add'>+						" found!\n", __func__);</div><div class='ctx'> 					goto dettach_frontend;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='head'>diff --git a/drivers/media/video/saa7134/saa7134-input.c b/drivers/media/video/saa7134/saa7134-input.c<br/>index 48d2878699b7..05c6e217d8a7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/saa7134/saa7134-input.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/saa7134/saa7134-input.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/saa7134/saa7134-input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7134/saa7134-input.c</a></div><div class='hunk'>@@ -753,6 +753,13 @@ int saa7134_input_init1(struct saa7134_dev *dev)</div><div class='ctx'> 		mask_keycode = 0xffff;</div><div class='ctx'> 		raw_decode   = true;</div><div class='ctx'> 		break;</div><div class='add'>+	case SAA7134_BOARD_ASUSTeK_PS3_100:</div><div class='add'>+		ir_codes     = RC_MAP_ASUS_PS3_100;</div><div class='add'>+		mask_keydown = 0x0040000;</div><div class='add'>+		mask_keyup   = 0x0040000;</div><div class='add'>+		mask_keycode = 0xffff;</div><div class='add'>+		raw_decode   = true;</div><div class='add'>+		break;</div><div class='ctx'> 	case SAA7134_BOARD_ENCORE_ENLTV:</div><div class='ctx'> 	case SAA7134_BOARD_ENCORE_ENLTV_FM:</div><div class='ctx'> 		ir_codes     = RC_MAP_ENCORE_ENLTV;</div><div class='head'>diff --git a/drivers/media/video/saa7134/saa7134-video.c b/drivers/media/video/saa7134/saa7134-video.c<br/>index 417034eb6ad2..6de10b1e7251 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/saa7134/saa7134-video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/saa7134/saa7134-video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/saa7134/saa7134-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7134/saa7134-video.c</a></div><div class='hunk'>@@ -2036,7 +2036,7 @@ static int saa7134_s_tuner(struct file *file, void *priv,</div><div class='ctx'> 	mode = dev-&gt;thread.mode;</div><div class='ctx'> 	if (UNSET == mode) {</div><div class='ctx'> 		rx   = saa7134_tvaudio_getstereo(dev);</div><div class='del'>-		mode = saa7134_tvaudio_rx2mode(t-&gt;rxsubchans);</div><div class='add'>+		mode = saa7134_tvaudio_rx2mode(rx);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (mode != t-&gt;audmode)</div><div class='ctx'> 		dev-&gt;thread.mode = t-&gt;audmode;</div><div class='head'>diff --git a/drivers/media/video/saa7134/saa7134.h b/drivers/media/video/saa7134/saa7134.h<br/>index f625060e6a0f..89c8333736a2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/saa7134/saa7134.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/saa7134/saa7134.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/saa7134/saa7134.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7134/saa7134.h</a></div><div class='hunk'>@@ -332,6 +332,7 @@ struct saa7134_card_ir {</div><div class='ctx'> #define SAA7134_BOARD_BEHOLD_503FM          187</div><div class='ctx'> #define SAA7134_BOARD_SENSORAY811_911       188</div><div class='ctx'> #define SAA7134_BOARD_KWORLD_PC150U         189</div><div class='add'>+#define SAA7134_BOARD_ASUSTeK_PS3_100      190</div><div class='ctx'> </div><div class='ctx'> #define SAA7134_MAXBOARDS 32</div><div class='ctx'> #define SAA7134_INPUT_MAX 8</div><div class='head'>diff --git a/drivers/media/video/saa7164/saa7164-vbi.c b/drivers/media/video/saa7164/saa7164-vbi.c<br/>index 273cf807401c..d8e6c8f14079 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/saa7164/saa7164-vbi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/saa7164/saa7164-vbi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/saa7164/saa7164-vbi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7164/saa7164-vbi.c</a></div><div class='hunk'>@@ -952,7 +952,7 @@ static int saa7164_vbi_start_streaming(struct saa7164_port *port)</div><div class='ctx'> </div><div class='ctx'> 		/* Stop the hardware, regardless */</div><div class='ctx'> 		result = saa7164_vbi_stop_port(port);</div><div class='del'>-		if ((result != SAA_OK) &amp;&amp; (result != SAA_ERR_ALREADY_STOPPED)) {</div><div class='add'>+		if (result != SAA_OK) {</div><div class='ctx'> 			printk(KERN_ERR "%s() pause/forced stop transition "</div><div class='ctx'> 				"failed, res = 0x%x\n", __func__, result);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -971,7 +971,7 @@ static int saa7164_vbi_start_streaming(struct saa7164_port *port)</div><div class='ctx'> 		/* Stop the hardware, regardless */</div><div class='ctx'> 		result = saa7164_vbi_acquire_port(port);</div><div class='ctx'> 		result = saa7164_vbi_stop_port(port);</div><div class='del'>-		if ((result != SAA_OK) &amp;&amp; (result != SAA_ERR_ALREADY_STOPPED)) {</div><div class='add'>+		if (result != SAA_OK) {</div><div class='ctx'> 			printk(KERN_ERR "%s() run/forced stop transition "</div><div class='ctx'> 				"failed, res = 0x%x\n", __func__, result);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/media/video/saa7164/saa7164.h b/drivers/media/video/saa7164/saa7164.h<br/>index 742b34103b5d..8d120e3baf70 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/saa7164/saa7164.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/saa7164/saa7164.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/saa7164/saa7164.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/saa7164/saa7164.h</a></div><div class='hunk'>@@ -611,11 +611,6 @@ extern unsigned int saa_debug;</div><div class='ctx'> 		printk(KERN_WARNING "%s: " fmt, dev-&gt;name, ## arg);\</div><div class='ctx'> 	} while (0)</div><div class='ctx'> </div><div class='del'>-#define log_err(fmt, arg...)\</div><div class='del'>-	do { \</div><div class='del'>-		printk(KERN_ERROR "%s: " fmt, dev-&gt;name, ## arg);\</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='ctx'> #define saa7164_readl(reg) readl(dev-&gt;lmmio + ((reg) &gt;&gt; 2))</div><div class='ctx'> #define saa7164_writel(reg, value) writel((value), dev-&gt;lmmio + ((reg) &gt;&gt; 2))</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c<br/>index 424dfacd263a..0baaf94db7e0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/sh_mobile_ceu_camera.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/sh_mobile_ceu_camera.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/sh_mobile_ceu_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/sh_mobile_ceu_camera.c</a></div><div class='hunk'>@@ -210,27 +210,33 @@ static int sh_mobile_ceu_videobuf_setup(struct vb2_queue *vq,</div><div class='ctx'> 	struct soc_camera_device *icd = container_of(vq, struct soc_camera_device, vb2_vidq);</div><div class='ctx'> 	struct soc_camera_host *ici = to_soc_camera_host(icd-&gt;parent);</div><div class='ctx'> 	struct sh_mobile_ceu_dev *pcdev = ici-&gt;priv;</div><div class='del'>-	int bytes_per_line;</div><div class='del'>-	unsigned int height;</div><div class='ctx'> </div><div class='ctx'> 	if (fmt) {</div><div class='ctx'> 		const struct soc_camera_format_xlate *xlate = soc_camera_xlate_by_fourcc(icd,</div><div class='ctx'> 								fmt-&gt;fmt.pix.pixelformat);</div><div class='add'>+		unsigned int bytes_per_line;</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='ctx'> 		if (!xlate)</div><div class='ctx'> 			return -EINVAL;</div><div class='del'>-		bytes_per_line = soc_mbus_bytes_per_line(fmt-&gt;fmt.pix.width,</div><div class='del'>-							 xlate-&gt;host_fmt);</div><div class='del'>-		height = fmt-&gt;fmt.pix.height;</div><div class='add'>+</div><div class='add'>+		ret = soc_mbus_bytes_per_line(fmt-&gt;fmt.pix.width,</div><div class='add'>+					      xlate-&gt;host_fmt);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		bytes_per_line = max_t(u32, fmt-&gt;fmt.pix.bytesperline, ret);</div><div class='add'>+</div><div class='add'>+		ret = soc_mbus_image_size(xlate-&gt;host_fmt, bytes_per_line,</div><div class='add'>+					  fmt-&gt;fmt.pix.height);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		sizes[0] = max_t(u32, fmt-&gt;fmt.pix.sizeimage, ret);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Called from VIDIOC_REQBUFS or in compatibility mode */</div><div class='del'>-		bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-						icd-&gt;current_fmt-&gt;host_fmt);</div><div class='del'>-		height = icd-&gt;user_height;</div><div class='add'>+		sizes[0] = icd-&gt;sizeimage;</div><div class='ctx'> 	}</div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		return bytes_per_line;</div><div class='del'>-</div><div class='del'>-	sizes[0] = bytes_per_line * height;</div><div class='ctx'> </div><div class='ctx'> 	alloc_ctxs[0] = pcdev-&gt;alloc_ctx;</div><div class='ctx'> </div><div class='hunk'>@@ -336,21 +342,15 @@ static int sh_mobile_ceu_capture(struct sh_mobile_ceu_dev *pcdev)</div><div class='ctx'> </div><div class='ctx'> 	ceu_write(pcdev, top1, phys_addr_top);</div><div class='ctx'> 	if (V4L2_FIELD_NONE != pcdev-&gt;field) {</div><div class='del'>-		if (planar)</div><div class='del'>-			phys_addr_bottom = phys_addr_top + icd-&gt;user_width;</div><div class='del'>-		else</div><div class='del'>-			phys_addr_bottom = phys_addr_top +</div><div class='del'>-				soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-							icd-&gt;current_fmt-&gt;host_fmt);</div><div class='add'>+		phys_addr_bottom = phys_addr_top + icd-&gt;bytesperline;</div><div class='ctx'> 		ceu_write(pcdev, bottom1, phys_addr_bottom);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (planar) {</div><div class='del'>-		phys_addr_top += icd-&gt;user_width *</div><div class='del'>-			icd-&gt;user_height;</div><div class='add'>+		phys_addr_top += icd-&gt;bytesperline * icd-&gt;user_height;</div><div class='ctx'> 		ceu_write(pcdev, top2, phys_addr_top);</div><div class='ctx'> 		if (V4L2_FIELD_NONE != pcdev-&gt;field) {</div><div class='del'>-			phys_addr_bottom = phys_addr_top + icd-&gt;user_width;</div><div class='add'>+			phys_addr_bottom = phys_addr_top + icd-&gt;bytesperline;</div><div class='ctx'> 			ceu_write(pcdev, bottom2, phys_addr_bottom);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -377,13 +377,8 @@ static void sh_mobile_ceu_videobuf_queue(struct vb2_buffer *vb)</div><div class='ctx'> 	struct sh_mobile_ceu_dev *pcdev = ici-&gt;priv;</div><div class='ctx'> 	struct sh_mobile_ceu_buffer *buf = to_ceu_vb(vb);</div><div class='ctx'> 	unsigned long size;</div><div class='del'>-	int bytes_per_line = soc_mbus_bytes_per_line(icd-&gt;user_width,</div><div class='del'>-						icd-&gt;current_fmt-&gt;host_fmt);</div><div class='ctx'> </div><div class='del'>-	if (bytes_per_line &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	size = icd-&gt;user_height * bytes_per_line;</div><div class='add'>+	size = icd-&gt;sizeimage;</div><div class='ctx'> </div><div class='ctx'> 	if (vb2_plane_size(vb, 0) &lt; size) {</div><div class='ctx'> 		dev_err(icd-&gt;parent, "Buffer #%d too small (%lu &lt; %lu)\n",</div><div class='hunk'>@@ -682,10 +677,7 @@ static void sh_mobile_ceu_set_rect(struct soc_camera_device *icd)</div><div class='ctx'> 			in_width *= 2;</div><div class='ctx'> 			left_offset *= 2;</div><div class='ctx'> 		}</div><div class='del'>-		cdwdr_width = width;</div><div class='ctx'> 	} else {</div><div class='del'>-		int bytes_per_line = soc_mbus_bytes_per_line(width,</div><div class='del'>-						icd-&gt;current_fmt-&gt;host_fmt);</div><div class='ctx'> 		unsigned int w_factor;</div><div class='ctx'> </div><div class='ctx'> 		switch (icd-&gt;current_fmt-&gt;host_fmt-&gt;packing) {</div><div class='hunk'>@@ -698,13 +690,10 @@ static void sh_mobile_ceu_set_rect(struct soc_camera_device *icd)</div><div class='ctx'> </div><div class='ctx'> 		in_width = cam-&gt;width * w_factor;</div><div class='ctx'> 		left_offset *= w_factor;</div><div class='del'>-</div><div class='del'>-		if (bytes_per_line &lt; 0)</div><div class='del'>-			cdwdr_width = width;</div><div class='del'>-		else</div><div class='del'>-			cdwdr_width = bytes_per_line;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	cdwdr_width = icd-&gt;bytesperline;</div><div class='add'>+</div><div class='ctx'> 	height = icd-&gt;user_height;</div><div class='ctx'> 	in_height = cam-&gt;height;</div><div class='ctx'> 	if (V4L2_FIELD_NONE != pcdev-&gt;field) {</div><div class='hunk'>@@ -881,11 +870,13 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd)</div><div class='ctx'> </div><div class='ctx'> 	value |= common_flags &amp; V4L2_MBUS_VSYNC_ACTIVE_LOW ? 1 &lt;&lt; 1 : 0;</div><div class='ctx'> 	value |= common_flags &amp; V4L2_MBUS_HSYNC_ACTIVE_LOW ? 1 &lt;&lt; 0 : 0;</div><div class='del'>-	value |= pcdev-&gt;is_16bit ? 1 &lt;&lt; 12 : 0;</div><div class='ctx'> </div><div class='del'>-	/* CSI2 mode */</div><div class='del'>-	if (pcdev-&gt;pdata-&gt;csi2)</div><div class='add'>+	if (pcdev-&gt;pdata-&gt;csi2) /* CSI2 mode */</div><div class='ctx'> 		value |= 3 &lt;&lt; 12;</div><div class='add'>+	else if (pcdev-&gt;is_16bit)</div><div class='add'>+		value |= 1 &lt;&lt; 12;</div><div class='add'>+	else if (pcdev-&gt;pdata-&gt;flags &amp; SH_CEU_FLAG_LOWER_8BIT)</div><div class='add'>+		value |= 2 &lt;&lt; 12;</div><div class='ctx'> </div><div class='ctx'> 	ceu_write(pcdev, CAMCR, value);</div><div class='ctx'> </div><div class='hunk'>@@ -964,24 +955,28 @@ static const struct soc_mbus_pixelfmt sh_mobile_ceu_formats[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_1_5X8,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PLANAR_2Y_C,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.fourcc			= V4L2_PIX_FMT_NV21,</div><div class='ctx'> 		.name			= "NV21",</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_1_5X8,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PLANAR_2Y_C,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.fourcc			= V4L2_PIX_FMT_NV16,</div><div class='ctx'> 		.name			= "NV16",</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PLANAR_Y_C,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.fourcc			= V4L2_PIX_FMT_NV61,</div><div class='ctx'> 		.name			= "NV61",</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PLANAR_Y_C,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1845,6 +1840,8 @@ static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define CEU_CHDW_MAX	8188U	/* Maximum line stride */</div><div class='add'>+</div><div class='ctx'> static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd,</div><div class='ctx'> 				 struct v4l2_format *f)</div><div class='ctx'> {</div><div class='hunk'>@@ -1863,8 +1860,12 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd,</div><div class='ctx'> </div><div class='ctx'> 	xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);</div><div class='ctx'> 	if (!xlate) {</div><div class='del'>-		dev_warn(icd-&gt;parent, "Format %x not found\n", pixfmt);</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		xlate = icd-&gt;current_fmt;</div><div class='add'>+		dev_dbg(icd-&gt;parent, "Format %x not found, keeping %x\n",</div><div class='add'>+			pixfmt, xlate-&gt;host_fmt-&gt;fourcc);</div><div class='add'>+		pixfmt = xlate-&gt;host_fmt-&gt;fourcc;</div><div class='add'>+		pix-&gt;pixelformat = pixfmt;</div><div class='add'>+		pix-&gt;colorspace = icd-&gt;colorspace;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* FIXME: calculate using depth and bus width */</div><div class='hunk'>@@ -1923,10 +1924,20 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd,</div><div class='ctx'> 			pix-&gt;width = width;</div><div class='ctx'> 		if (mf.height &gt; height)</div><div class='ctx'> 			pix-&gt;height = height;</div><div class='add'>+</div><div class='add'>+		pix-&gt;bytesperline = max(pix-&gt;bytesperline, pix-&gt;width);</div><div class='add'>+		pix-&gt;bytesperline = min(pix-&gt;bytesperline, CEU_CHDW_MAX);</div><div class='add'>+		pix-&gt;bytesperline &amp;= ~3;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		/* Configurable stride isn't supported in pass-through mode. */</div><div class='add'>+		pix-&gt;bytesperline  = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pix-&gt;width	&amp;= ~3;</div><div class='ctx'> 	pix-&gt;height	&amp;= ~3;</div><div class='add'>+	pix-&gt;sizeimage	= 0;</div><div class='ctx'> </div><div class='ctx'> 	dev_geo(icd-&gt;parent, "%s(): return %d, fmt 0x%x, %ux%u\n",</div><div class='ctx'> 		__func__, ret, pix-&gt;pixelformat, pix-&gt;width, pix-&gt;height);</div><div class='hunk'>@@ -2145,6 +2156,7 @@ static int __devinit sh_mobile_ceu_probe(struct platform_device *pdev)</div><div class='ctx'> 	pcdev-&gt;ici.nr = pdev-&gt;id;</div><div class='ctx'> 	pcdev-&gt;ici.drv_name = dev_name(&amp;pdev-&gt;dev);</div><div class='ctx'> 	pcdev-&gt;ici.ops = &amp;sh_mobile_ceu_host_ops;</div><div class='add'>+	pcdev-&gt;ici.capabilities = SOCAM_HOST_CAP_STRIDE;</div><div class='ctx'> </div><div class='ctx'> 	pcdev-&gt;alloc_ctx = vb2_dma_contig_init_ctx(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (IS_ERR(pcdev-&gt;alloc_ctx)) {</div><div class='head'>diff --git a/drivers/media/video/sh_vou.c b/drivers/media/video/sh_vou.c<br/>index 9644bd861abc..8fd1874382c6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/sh_vou.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/sh_vou.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/sh_vou.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/sh_vou.c</a></div><div class='hunk'>@@ -1390,6 +1390,10 @@ static int __devinit sh_vou_probe(struct platform_device *pdev)</div><div class='ctx'> 	vdev-&gt;v4l2_dev = &amp;vou_dev-&gt;v4l2_dev;</div><div class='ctx'> 	vdev-&gt;release = video_device_release;</div><div class='ctx'> 	vdev-&gt;lock = &amp;vou_dev-&gt;fop_lock;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	vou_dev-&gt;vdev = vdev;</div><div class='ctx'> 	video_set_drvdata(vdev, vou_dev);</div><div class='head'>diff --git a/drivers/media/video/smiapp-pll.c b/drivers/media/video/smiapp-pll.c<br/>new file mode 100644<br/>index 000000000000..a2e41a21dc65<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp-pll.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp-pll.c</a></div><div class='hunk'>@@ -0,0 +1,418 @@</div><div class='add'>+/*</div><div class='add'>+ * drivers/media/video/smiapp-pll.c</div><div class='add'>+ *</div><div class='add'>+ * Generic driver for SMIA/SMIA++ compliant camera modules</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011--2012 Nokia Corporation</div><div class='add'>+ * Contact: Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/gcd.h&gt;</div><div class='add'>+#include &lt;linux/lcm.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include "smiapp-pll.h"</div><div class='add'>+</div><div class='add'>+/* Return an even number or one. */</div><div class='add'>+static inline uint32_t clk_div_even(uint32_t a)</div><div class='add'>+{</div><div class='add'>+	return max_t(uint32_t, 1, a &amp; ~1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Return an even number or one. */</div><div class='add'>+static inline uint32_t clk_div_even_up(uint32_t a)</div><div class='add'>+{</div><div class='add'>+	if (a == 1)</div><div class='add'>+		return 1;</div><div class='add'>+	return (a + 1) &amp; ~1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline uint32_t is_one_or_even(uint32_t a)</div><div class='add'>+{</div><div class='add'>+	if (a == 1)</div><div class='add'>+		return 1;</div><div class='add'>+	if (a &amp; 1)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bounds_check(struct device *dev, uint32_t val,</div><div class='add'>+			uint32_t min, uint32_t max, char *str)</div><div class='add'>+{</div><div class='add'>+	if (val &gt;= min &amp;&amp; val &lt;= max)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev_warn(dev, "%s out of bounds: %d (%d--%d)\n", str, val, min, max);</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void print_pll(struct device *dev, struct smiapp_pll *pll)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(dev, "pre_pll_clk_div\t%d\n",  pll-&gt;pre_pll_clk_div);</div><div class='add'>+	dev_dbg(dev, "pll_multiplier \t%d\n",  pll-&gt;pll_multiplier);</div><div class='add'>+	if (pll-&gt;flags != SMIAPP_PLL_FLAG_NO_OP_CLOCKS) {</div><div class='add'>+		dev_dbg(dev, "op_sys_clk_div \t%d\n", pll-&gt;op_sys_clk_div);</div><div class='add'>+		dev_dbg(dev, "op_pix_clk_div \t%d\n", pll-&gt;op_pix_clk_div);</div><div class='add'>+	}</div><div class='add'>+	dev_dbg(dev, "vt_sys_clk_div \t%d\n",  pll-&gt;vt_sys_clk_div);</div><div class='add'>+	dev_dbg(dev, "vt_pix_clk_div \t%d\n",  pll-&gt;vt_pix_clk_div);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "ext_clk_freq_hz \t%d\n", pll-&gt;ext_clk_freq_hz);</div><div class='add'>+	dev_dbg(dev, "pll_ip_clk_freq_hz \t%d\n", pll-&gt;pll_ip_clk_freq_hz);</div><div class='add'>+	dev_dbg(dev, "pll_op_clk_freq_hz \t%d\n", pll-&gt;pll_op_clk_freq_hz);</div><div class='add'>+	if (pll-&gt;flags &amp; SMIAPP_PLL_FLAG_NO_OP_CLOCKS) {</div><div class='add'>+		dev_dbg(dev, "op_sys_clk_freq_hz \t%d\n",</div><div class='add'>+			pll-&gt;op_sys_clk_freq_hz);</div><div class='add'>+		dev_dbg(dev, "op_pix_clk_freq_hz \t%d\n",</div><div class='add'>+			pll-&gt;op_pix_clk_freq_hz);</div><div class='add'>+	}</div><div class='add'>+	dev_dbg(dev, "vt_sys_clk_freq_hz \t%d\n", pll-&gt;vt_sys_clk_freq_hz);</div><div class='add'>+	dev_dbg(dev, "vt_pix_clk_freq_hz \t%d\n", pll-&gt;vt_pix_clk_freq_hz);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,</div><div class='add'>+			 struct smiapp_pll *pll)</div><div class='add'>+{</div><div class='add'>+	uint32_t sys_div;</div><div class='add'>+	uint32_t best_pix_div = INT_MAX &gt;&gt; 1;</div><div class='add'>+	uint32_t vt_op_binning_div;</div><div class='add'>+	uint32_t lane_op_clock_ratio;</div><div class='add'>+	uint32_t mul, div;</div><div class='add'>+	uint32_t more_mul_min, more_mul_max;</div><div class='add'>+	uint32_t more_mul_factor;</div><div class='add'>+	uint32_t min_vt_div, max_vt_div, vt_div;</div><div class='add'>+	uint32_t min_sys_div, max_sys_div;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	if (pll-&gt;flags &amp; SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE)</div><div class='add'>+		lane_op_clock_ratio = pll-&gt;lanes;</div><div class='add'>+	else</div><div class='add'>+		lane_op_clock_ratio = 1;</div><div class='add'>+	dev_dbg(dev, "lane_op_clock_ratio: %d\n", lane_op_clock_ratio);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "binning: %dx%d\n", pll-&gt;binning_horizontal,</div><div class='add'>+		pll-&gt;binning_vertical);</div><div class='add'>+</div><div class='add'>+	/* CSI transfers 2 bits per clock per lane; thus times 2 */</div><div class='add'>+	pll-&gt;pll_op_clk_freq_hz = pll-&gt;link_freq * 2</div><div class='add'>+		* (pll-&gt;lanes / lane_op_clock_ratio);</div><div class='add'>+</div><div class='add'>+	/* Figure out limits for pre-pll divider based on extclk */</div><div class='add'>+	dev_dbg(dev, "min / max pre_pll_clk_div: %d / %d\n",</div><div class='add'>+		limits-&gt;min_pre_pll_clk_div, limits-&gt;max_pre_pll_clk_div);</div><div class='add'>+	limits-&gt;max_pre_pll_clk_div =</div><div class='add'>+		min_t(uint16_t, limits-&gt;max_pre_pll_clk_div,</div><div class='add'>+		      clk_div_even(pll-&gt;ext_clk_freq_hz /</div><div class='add'>+				   limits-&gt;min_pll_ip_freq_hz));</div><div class='add'>+	limits-&gt;min_pre_pll_clk_div =</div><div class='add'>+		max_t(uint16_t, limits-&gt;min_pre_pll_clk_div,</div><div class='add'>+		      clk_div_even_up(</div><div class='add'>+			      DIV_ROUND_UP(pll-&gt;ext_clk_freq_hz,</div><div class='add'>+					   limits-&gt;max_pll_ip_freq_hz)));</div><div class='add'>+	dev_dbg(dev, "pre-pll check: min / max pre_pll_clk_div: %d / %d\n",</div><div class='add'>+		limits-&gt;min_pre_pll_clk_div, limits-&gt;max_pre_pll_clk_div);</div><div class='add'>+</div><div class='add'>+	i = gcd(pll-&gt;pll_op_clk_freq_hz, pll-&gt;ext_clk_freq_hz);</div><div class='add'>+	mul = div_u64(pll-&gt;pll_op_clk_freq_hz, i);</div><div class='add'>+	div = pll-&gt;ext_clk_freq_hz / i;</div><div class='add'>+	dev_dbg(dev, "mul %d / div %d\n", mul, div);</div><div class='add'>+</div><div class='add'>+	limits-&gt;min_pre_pll_clk_div =</div><div class='add'>+		max_t(uint16_t, limits-&gt;min_pre_pll_clk_div,</div><div class='add'>+		      clk_div_even_up(</div><div class='add'>+			      DIV_ROUND_UP(mul * pll-&gt;ext_clk_freq_hz,</div><div class='add'>+					   limits-&gt;max_pll_op_freq_hz)));</div><div class='add'>+	dev_dbg(dev, "pll_op check: min / max pre_pll_clk_div: %d / %d\n",</div><div class='add'>+		limits-&gt;min_pre_pll_clk_div, limits-&gt;max_pre_pll_clk_div);</div><div class='add'>+</div><div class='add'>+	if (limits-&gt;min_pre_pll_clk_div &gt; limits-&gt;max_pre_pll_clk_div) {</div><div class='add'>+		dev_err(dev, "unable to compute pre_pll divisor\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pll-&gt;pre_pll_clk_div = limits-&gt;min_pre_pll_clk_div;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Get pre_pll_clk_div so that our pll_op_clk_freq_hz won't be</div><div class='add'>+	 * too high.</div><div class='add'>+	 */</div><div class='add'>+	dev_dbg(dev, "pre_pll_clk_div %d\n", pll-&gt;pre_pll_clk_div);</div><div class='add'>+</div><div class='add'>+	/* Don't go above max pll multiplier. */</div><div class='add'>+	more_mul_max = limits-&gt;max_pll_multiplier / mul;</div><div class='add'>+	dev_dbg(dev, "more_mul_max: max_pll_multiplier check: %d\n",</div><div class='add'>+		more_mul_max);</div><div class='add'>+	/* Don't go above max pll op frequency. */</div><div class='add'>+	more_mul_max =</div><div class='add'>+		min_t(int,</div><div class='add'>+		      more_mul_max,</div><div class='add'>+		      limits-&gt;max_pll_op_freq_hz</div><div class='add'>+		      / (pll-&gt;ext_clk_freq_hz / pll-&gt;pre_pll_clk_div * mul));</div><div class='add'>+	dev_dbg(dev, "more_mul_max: max_pll_op_freq_hz check: %d\n",</div><div class='add'>+		more_mul_max);</div><div class='add'>+	/* Don't go above the division capability of op sys clock divider. */</div><div class='add'>+	more_mul_max = min(more_mul_max,</div><div class='add'>+			   limits-&gt;max_op_sys_clk_div * pll-&gt;pre_pll_clk_div</div><div class='add'>+			   / div);</div><div class='add'>+	dev_dbg(dev, "more_mul_max: max_op_sys_clk_div check: %d\n",</div><div class='add'>+		more_mul_max);</div><div class='add'>+	/* Ensure we won't go above min_pll_multiplier. */</div><div class='add'>+	more_mul_max = min(more_mul_max,</div><div class='add'>+			   DIV_ROUND_UP(limits-&gt;max_pll_multiplier, mul));</div><div class='add'>+	dev_dbg(dev, "more_mul_max: min_pll_multiplier check: %d\n",</div><div class='add'>+		more_mul_max);</div><div class='add'>+</div><div class='add'>+	/* Ensure we won't go below min_pll_op_freq_hz. */</div><div class='add'>+	more_mul_min = DIV_ROUND_UP(limits-&gt;min_pll_op_freq_hz,</div><div class='add'>+				    pll-&gt;ext_clk_freq_hz / pll-&gt;pre_pll_clk_div</div><div class='add'>+				    * mul);</div><div class='add'>+	dev_dbg(dev, "more_mul_min: min_pll_op_freq_hz check: %d\n",</div><div class='add'>+		more_mul_min);</div><div class='add'>+	/* Ensure we won't go below min_pll_multiplier. */</div><div class='add'>+	more_mul_min = max(more_mul_min,</div><div class='add'>+			   DIV_ROUND_UP(limits-&gt;min_pll_multiplier, mul));</div><div class='add'>+	dev_dbg(dev, "more_mul_min: min_pll_multiplier check: %d\n",</div><div class='add'>+		more_mul_min);</div><div class='add'>+</div><div class='add'>+	if (more_mul_min &gt; more_mul_max) {</div><div class='add'>+		dev_warn(dev,</div><div class='add'>+			 "unable to compute more_mul_min and more_mul_max");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	more_mul_factor = lcm(div, pll-&gt;pre_pll_clk_div) / div;</div><div class='add'>+	dev_dbg(dev, "more_mul_factor: %d\n", more_mul_factor);</div><div class='add'>+	more_mul_factor = lcm(more_mul_factor, limits-&gt;min_op_sys_clk_div);</div><div class='add'>+	dev_dbg(dev, "more_mul_factor: min_op_sys_clk_div: %d\n",</div><div class='add'>+		more_mul_factor);</div><div class='add'>+	i = roundup(more_mul_min, more_mul_factor);</div><div class='add'>+	if (!is_one_or_even(i))</div><div class='add'>+		i &lt;&lt;= 1;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "final more_mul: %d\n", i);</div><div class='add'>+	if (i &gt; more_mul_max) {</div><div class='add'>+		dev_warn(dev, "final more_mul is bad, max %d", more_mul_max);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pll-&gt;pll_multiplier = mul * i;</div><div class='add'>+	pll-&gt;op_sys_clk_div = div * i / pll-&gt;pre_pll_clk_div;</div><div class='add'>+	dev_dbg(dev, "op_sys_clk_div: %d\n", pll-&gt;op_sys_clk_div);</div><div class='add'>+</div><div class='add'>+	pll-&gt;pll_ip_clk_freq_hz = pll-&gt;ext_clk_freq_hz</div><div class='add'>+		/ pll-&gt;pre_pll_clk_div;</div><div class='add'>+</div><div class='add'>+	pll-&gt;pll_op_clk_freq_hz = pll-&gt;pll_ip_clk_freq_hz</div><div class='add'>+		* pll-&gt;pll_multiplier;</div><div class='add'>+</div><div class='add'>+	/* Derive pll_op_clk_freq_hz. */</div><div class='add'>+	pll-&gt;op_sys_clk_freq_hz =</div><div class='add'>+		pll-&gt;pll_op_clk_freq_hz / pll-&gt;op_sys_clk_div;</div><div class='add'>+</div><div class='add'>+	pll-&gt;op_pix_clk_div = pll-&gt;bits_per_pixel;</div><div class='add'>+	dev_dbg(dev, "op_pix_clk_div: %d\n", pll-&gt;op_pix_clk_div);</div><div class='add'>+</div><div class='add'>+	pll-&gt;op_pix_clk_freq_hz =</div><div class='add'>+		pll-&gt;op_sys_clk_freq_hz / pll-&gt;op_pix_clk_div;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Some sensors perform analogue binning and some do this</div><div class='add'>+	 * digitally. The ones doing this digitally can be roughly be</div><div class='add'>+	 * found out using this formula. The ones doing this digitally</div><div class='add'>+	 * should run at higher clock rate, so smaller divisor is used</div><div class='add'>+	 * on video timing side.</div><div class='add'>+	 */</div><div class='add'>+	if (limits-&gt;min_line_length_pck_bin &gt; limits-&gt;min_line_length_pck</div><div class='add'>+	    / pll-&gt;binning_horizontal)</div><div class='add'>+		vt_op_binning_div = pll-&gt;binning_horizontal;</div><div class='add'>+	else</div><div class='add'>+		vt_op_binning_div = 1;</div><div class='add'>+	dev_dbg(dev, "vt_op_binning_div: %d\n", vt_op_binning_div);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Profile 2 supports vt_pix_clk_div E [4, 10]</div><div class='add'>+	 *</div><div class='add'>+	 * Horizontal binning can be used as a base for difference in</div><div class='add'>+	 * divisors. One must make sure that horizontal blanking is</div><div class='add'>+	 * enough to accommodate the CSI-2 sync codes.</div><div class='add'>+	 *</div><div class='add'>+	 * Take scaling factor into account as well.</div><div class='add'>+	 *</div><div class='add'>+	 * Find absolute limits for the factor of vt divider.</div><div class='add'>+	 */</div><div class='add'>+	dev_dbg(dev, "scale_m: %d\n", pll-&gt;scale_m);</div><div class='add'>+	min_vt_div = DIV_ROUND_UP(pll-&gt;op_pix_clk_div * pll-&gt;op_sys_clk_div</div><div class='add'>+				  * pll-&gt;scale_n,</div><div class='add'>+				  lane_op_clock_ratio * vt_op_binning_div</div><div class='add'>+				  * pll-&gt;scale_m);</div><div class='add'>+</div><div class='add'>+	/* Find smallest and biggest allowed vt divisor. */</div><div class='add'>+	dev_dbg(dev, "min_vt_div: %d\n", min_vt_div);</div><div class='add'>+	min_vt_div = max(min_vt_div,</div><div class='add'>+			 DIV_ROUND_UP(pll-&gt;pll_op_clk_freq_hz,</div><div class='add'>+				      limits-&gt;max_vt_pix_clk_freq_hz));</div><div class='add'>+	dev_dbg(dev, "min_vt_div: max_vt_pix_clk_freq_hz: %d\n",</div><div class='add'>+		min_vt_div);</div><div class='add'>+	min_vt_div = max_t(uint32_t, min_vt_div,</div><div class='add'>+			   limits-&gt;min_vt_pix_clk_div</div><div class='add'>+			   * limits-&gt;min_vt_sys_clk_div);</div><div class='add'>+	dev_dbg(dev, "min_vt_div: min_vt_clk_div: %d\n", min_vt_div);</div><div class='add'>+</div><div class='add'>+	max_vt_div = limits-&gt;max_vt_sys_clk_div * limits-&gt;max_vt_pix_clk_div;</div><div class='add'>+	dev_dbg(dev, "max_vt_div: %d\n", max_vt_div);</div><div class='add'>+	max_vt_div = min(max_vt_div,</div><div class='add'>+			 DIV_ROUND_UP(pll-&gt;pll_op_clk_freq_hz,</div><div class='add'>+				      limits-&gt;min_vt_pix_clk_freq_hz));</div><div class='add'>+	dev_dbg(dev, "max_vt_div: min_vt_pix_clk_freq_hz: %d\n",</div><div class='add'>+		max_vt_div);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Find limitsits for sys_clk_div. Not all values are possible</div><div class='add'>+	 * with all values of pix_clk_div.</div><div class='add'>+	 */</div><div class='add'>+	min_sys_div = limits-&gt;min_vt_sys_clk_div;</div><div class='add'>+	dev_dbg(dev, "min_sys_div: %d\n", min_sys_div);</div><div class='add'>+	min_sys_div = max(min_sys_div,</div><div class='add'>+			  DIV_ROUND_UP(min_vt_div,</div><div class='add'>+				       limits-&gt;max_vt_pix_clk_div));</div><div class='add'>+	dev_dbg(dev, "min_sys_div: max_vt_pix_clk_div: %d\n", min_sys_div);</div><div class='add'>+	min_sys_div = max(min_sys_div,</div><div class='add'>+			  pll-&gt;pll_op_clk_freq_hz</div><div class='add'>+			  / limits-&gt;max_vt_sys_clk_freq_hz);</div><div class='add'>+	dev_dbg(dev, "min_sys_div: max_pll_op_clk_freq_hz: %d\n", min_sys_div);</div><div class='add'>+	min_sys_div = clk_div_even_up(min_sys_div);</div><div class='add'>+	dev_dbg(dev, "min_sys_div: one or even: %d\n", min_sys_div);</div><div class='add'>+</div><div class='add'>+	max_sys_div = limits-&gt;max_vt_sys_clk_div;</div><div class='add'>+	dev_dbg(dev, "max_sys_div: %d\n", max_sys_div);</div><div class='add'>+	max_sys_div = min(max_sys_div,</div><div class='add'>+			  DIV_ROUND_UP(max_vt_div,</div><div class='add'>+				       limits-&gt;min_vt_pix_clk_div));</div><div class='add'>+	dev_dbg(dev, "max_sys_div: min_vt_pix_clk_div: %d\n", max_sys_div);</div><div class='add'>+	max_sys_div = min(max_sys_div,</div><div class='add'>+			  DIV_ROUND_UP(pll-&gt;pll_op_clk_freq_hz,</div><div class='add'>+				       limits-&gt;min_vt_pix_clk_freq_hz));</div><div class='add'>+	dev_dbg(dev, "max_sys_div: min_vt_pix_clk_freq_hz: %d\n", max_sys_div);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Find pix_div such that a legal pix_div * sys_div results</div><div class='add'>+	 * into a value which is not smaller than div, the desired</div><div class='add'>+	 * divisor.</div><div class='add'>+	 */</div><div class='add'>+	for (vt_div = min_vt_div; vt_div &lt;= max_vt_div;</div><div class='add'>+	     vt_div += 2 - (vt_div &amp; 1)) {</div><div class='add'>+		for (sys_div = min_sys_div;</div><div class='add'>+		     sys_div &lt;= max_sys_div;</div><div class='add'>+		     sys_div += 2 - (sys_div &amp; 1)) {</div><div class='add'>+			int pix_div = DIV_ROUND_UP(vt_div, sys_div);</div><div class='add'>+</div><div class='add'>+			if (pix_div &lt; limits-&gt;min_vt_pix_clk_div</div><div class='add'>+			    || pix_div &gt; limits-&gt;max_vt_pix_clk_div) {</div><div class='add'>+				dev_dbg(dev,</div><div class='add'>+					"pix_div %d too small or too big (%d--%d)\n",</div><div class='add'>+					pix_div,</div><div class='add'>+					limits-&gt;min_vt_pix_clk_div,</div><div class='add'>+					limits-&gt;max_vt_pix_clk_div);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* Check if this one is better. */</div><div class='add'>+			if (pix_div * sys_div</div><div class='add'>+			    &lt;= roundup(min_vt_div, best_pix_div))</div><div class='add'>+				best_pix_div = pix_div;</div><div class='add'>+		}</div><div class='add'>+		if (best_pix_div &lt; INT_MAX &gt;&gt; 1)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pll-&gt;vt_sys_clk_div = DIV_ROUND_UP(min_vt_div, best_pix_div);</div><div class='add'>+	pll-&gt;vt_pix_clk_div = best_pix_div;</div><div class='add'>+</div><div class='add'>+	pll-&gt;vt_sys_clk_freq_hz =</div><div class='add'>+		pll-&gt;pll_op_clk_freq_hz / pll-&gt;vt_sys_clk_div;</div><div class='add'>+	pll-&gt;vt_pix_clk_freq_hz =</div><div class='add'>+		pll-&gt;vt_sys_clk_freq_hz / pll-&gt;vt_pix_clk_div;</div><div class='add'>+</div><div class='add'>+	pll-&gt;pixel_rate_csi =</div><div class='add'>+		pll-&gt;op_pix_clk_freq_hz * lane_op_clock_ratio;</div><div class='add'>+</div><div class='add'>+	print_pll(dev, pll);</div><div class='add'>+</div><div class='add'>+	rval = bounds_check(dev, pll-&gt;pre_pll_clk_div,</div><div class='add'>+			    limits-&gt;min_pre_pll_clk_div,</div><div class='add'>+			    limits-&gt;max_pre_pll_clk_div, "pre_pll_clk_div");</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = bounds_check(</div><div class='add'>+			dev, pll-&gt;pll_ip_clk_freq_hz,</div><div class='add'>+			limits-&gt;min_pll_ip_freq_hz, limits-&gt;max_pll_ip_freq_hz,</div><div class='add'>+			"pll_ip_clk_freq_hz");</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = bounds_check(</div><div class='add'>+			dev, pll-&gt;pll_multiplier,</div><div class='add'>+			limits-&gt;min_pll_multiplier, limits-&gt;max_pll_multiplier,</div><div class='add'>+			"pll_multiplier");</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = bounds_check(</div><div class='add'>+			dev, pll-&gt;pll_op_clk_freq_hz,</div><div class='add'>+			limits-&gt;min_pll_op_freq_hz, limits-&gt;max_pll_op_freq_hz,</div><div class='add'>+			"pll_op_clk_freq_hz");</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = bounds_check(</div><div class='add'>+			dev, pll-&gt;op_sys_clk_div,</div><div class='add'>+			limits-&gt;min_op_sys_clk_div, limits-&gt;max_op_sys_clk_div,</div><div class='add'>+			"op_sys_clk_div");</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = bounds_check(</div><div class='add'>+			dev, pll-&gt;op_pix_clk_div,</div><div class='add'>+			limits-&gt;min_op_pix_clk_div, limits-&gt;max_op_pix_clk_div,</div><div class='add'>+			"op_pix_clk_div");</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = bounds_check(</div><div class='add'>+			dev, pll-&gt;op_sys_clk_freq_hz,</div><div class='add'>+			limits-&gt;min_op_sys_clk_freq_hz,</div><div class='add'>+			limits-&gt;max_op_sys_clk_freq_hz,</div><div class='add'>+			"op_sys_clk_freq_hz");</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = bounds_check(</div><div class='add'>+			dev, pll-&gt;op_pix_clk_freq_hz,</div><div class='add'>+			limits-&gt;min_op_pix_clk_freq_hz,</div><div class='add'>+			limits-&gt;max_op_pix_clk_freq_hz,</div><div class='add'>+			"op_pix_clk_freq_hz");</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = bounds_check(</div><div class='add'>+			dev, pll-&gt;vt_sys_clk_freq_hz,</div><div class='add'>+			limits-&gt;min_vt_sys_clk_freq_hz,</div><div class='add'>+			limits-&gt;max_vt_sys_clk_freq_hz,</div><div class='add'>+			"vt_sys_clk_freq_hz");</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = bounds_check(</div><div class='add'>+			dev, pll-&gt;vt_pix_clk_freq_hz,</div><div class='add'>+			limits-&gt;min_vt_pix_clk_freq_hz,</div><div class='add'>+			limits-&gt;max_vt_pix_clk_freq_hz,</div><div class='add'>+			"vt_pix_clk_freq_hz");</div><div class='add'>+</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(smiapp_pll_calculate);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Generic SMIA/SMIA++ PLL calculator");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/media/video/smiapp-pll.h b/drivers/media/video/smiapp-pll.h<br/>new file mode 100644<br/>index 000000000000..9eab63f23afb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp-pll.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp-pll.h</a></div><div class='hunk'>@@ -0,0 +1,103 @@</div><div class='add'>+/*</div><div class='add'>+ * drivers/media/video/smiapp-pll.h</div><div class='add'>+ *</div><div class='add'>+ * Generic driver for SMIA/SMIA++ compliant camera modules</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Nokia Corporation</div><div class='add'>+ * Contact: Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef SMIAPP_PLL_H</div><div class='add'>+#define SMIAPP_PLL_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+</div><div class='add'>+struct smiapp_pll {</div><div class='add'>+	uint8_t lanes;</div><div class='add'>+	uint8_t binning_horizontal;</div><div class='add'>+	uint8_t binning_vertical;</div><div class='add'>+	uint8_t scale_m;</div><div class='add'>+	uint8_t scale_n;</div><div class='add'>+	uint8_t bits_per_pixel;</div><div class='add'>+	uint16_t flags;</div><div class='add'>+	uint32_t link_freq;</div><div class='add'>+</div><div class='add'>+	uint16_t pre_pll_clk_div;</div><div class='add'>+	uint16_t pll_multiplier;</div><div class='add'>+	uint16_t op_sys_clk_div;</div><div class='add'>+	uint16_t op_pix_clk_div;</div><div class='add'>+	uint16_t vt_sys_clk_div;</div><div class='add'>+	uint16_t vt_pix_clk_div;</div><div class='add'>+</div><div class='add'>+	uint32_t ext_clk_freq_hz;</div><div class='add'>+	uint32_t pll_ip_clk_freq_hz;</div><div class='add'>+	uint32_t pll_op_clk_freq_hz;</div><div class='add'>+	uint32_t op_sys_clk_freq_hz;</div><div class='add'>+	uint32_t op_pix_clk_freq_hz;</div><div class='add'>+	uint32_t vt_sys_clk_freq_hz;</div><div class='add'>+	uint32_t vt_pix_clk_freq_hz;</div><div class='add'>+</div><div class='add'>+	uint32_t pixel_rate_csi;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct smiapp_pll_limits {</div><div class='add'>+	/* Strict PLL limits */</div><div class='add'>+	uint32_t min_ext_clk_freq_hz;</div><div class='add'>+	uint32_t max_ext_clk_freq_hz;</div><div class='add'>+	uint16_t min_pre_pll_clk_div;</div><div class='add'>+	uint16_t max_pre_pll_clk_div;</div><div class='add'>+	uint32_t min_pll_ip_freq_hz;</div><div class='add'>+	uint32_t max_pll_ip_freq_hz;</div><div class='add'>+	uint16_t min_pll_multiplier;</div><div class='add'>+	uint16_t max_pll_multiplier;</div><div class='add'>+	uint32_t min_pll_op_freq_hz;</div><div class='add'>+	uint32_t max_pll_op_freq_hz;</div><div class='add'>+</div><div class='add'>+	uint16_t min_vt_sys_clk_div;</div><div class='add'>+	uint16_t max_vt_sys_clk_div;</div><div class='add'>+	uint32_t min_vt_sys_clk_freq_hz;</div><div class='add'>+	uint32_t max_vt_sys_clk_freq_hz;</div><div class='add'>+	uint16_t min_vt_pix_clk_div;</div><div class='add'>+	uint16_t max_vt_pix_clk_div;</div><div class='add'>+	uint32_t min_vt_pix_clk_freq_hz;</div><div class='add'>+	uint32_t max_vt_pix_clk_freq_hz;</div><div class='add'>+</div><div class='add'>+	uint16_t min_op_sys_clk_div;</div><div class='add'>+	uint16_t max_op_sys_clk_div;</div><div class='add'>+	uint32_t min_op_sys_clk_freq_hz;</div><div class='add'>+	uint32_t max_op_sys_clk_freq_hz;</div><div class='add'>+	uint16_t min_op_pix_clk_div;</div><div class='add'>+	uint16_t max_op_pix_clk_div;</div><div class='add'>+	uint32_t min_op_pix_clk_freq_hz;</div><div class='add'>+	uint32_t max_op_pix_clk_freq_hz;</div><div class='add'>+</div><div class='add'>+	/* Other relevant limits */</div><div class='add'>+	uint32_t min_line_length_pck_bin;</div><div class='add'>+	uint32_t min_line_length_pck;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* op pix clock is for all lanes in total normally */</div><div class='add'>+#define SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE			(1 &lt;&lt; 0)</div><div class='add'>+#define SMIAPP_PLL_FLAG_NO_OP_CLOCKS				(1 &lt;&lt; 1)</div><div class='add'>+</div><div class='add'>+struct device;</div><div class='add'>+</div><div class='add'>+int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,</div><div class='add'>+			 struct smiapp_pll *pll);</div><div class='add'>+</div><div class='add'>+#endif /* SMIAPP_PLL_H */</div><div class='head'>diff --git a/drivers/media/video/smiapp/Kconfig b/drivers/media/video/smiapp/Kconfig<br/>new file mode 100644<br/>index 000000000000..f7b35ff443bf<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+config VIDEO_SMIAPP</div><div class='add'>+	tristate "SMIA++/SMIA sensor support"</div><div class='add'>+	depends on I2C &amp;&amp; VIDEO_V4L2 &amp;&amp; VIDEO_V4L2_SUBDEV_API</div><div class='add'>+	select VIDEO_SMIAPP_PLL</div><div class='add'>+	---help---</div><div class='add'>+	  This is a generic driver for SMIA++/SMIA camera modules.</div><div class='head'>diff --git a/drivers/media/video/smiapp/Makefile b/drivers/media/video/smiapp/Makefile<br/>new file mode 100644<br/>index 000000000000..36b0cfa2c541<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+smiapp-objs			+= smiapp-core.o smiapp-regs.o \</div><div class='add'>+				   smiapp-quirk.o smiapp-limits.o</div><div class='add'>+obj-$(CONFIG_VIDEO_SMIAPP)	+= smiapp.o</div><div class='add'>+</div><div class='add'>+ccflags-y += -Idrivers/media/video</div><div class='head'>diff --git a/drivers/media/video/smiapp/smiapp-core.c b/drivers/media/video/smiapp/smiapp-core.c<br/>new file mode 100644<br/>index 000000000000..f518026cb67b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp/smiapp-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-core.c</a></div><div class='hunk'>@@ -0,0 +1,2894 @@</div><div class='add'>+/*</div><div class='add'>+ * drivers/media/video/smiapp/smiapp-core.c</div><div class='add'>+ *</div><div class='add'>+ * Generic driver for SMIA/SMIA++ compliant camera modules</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2010--2012 Nokia Corporation</div><div class='add'>+ * Contact: Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Based on smiapp driver by Vimarsh Zutshi</div><div class='add'>+ * Based on jt8ev1.c by Vimarsh Zutshi</div><div class='add'>+ * Based on smia-sensor.c by Tuukka Toivonen &lt;tuukkat76@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;linux/v4l2-mediabus.h&gt;</div><div class='add'>+#include &lt;media/v4l2-device.h&gt;</div><div class='add'>+</div><div class='add'>+#include "smiapp.h"</div><div class='add'>+</div><div class='add'>+#define SMIAPP_ALIGN_DIM(dim, flags)		\</div><div class='add'>+	((flags) &amp; V4L2_SUBDEV_SEL_FLAG_SIZE_GE	\</div><div class='add'>+	 ? ALIGN((dim), 2)			\</div><div class='add'>+	 : (dim) &amp; ~1)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * smiapp_module_idents - supported camera modules</div><div class='add'>+ */</div><div class='add'>+static const struct smiapp_module_ident smiapp_module_idents[] = {</div><div class='add'>+	SMIAPP_IDENT_L(0x01, 0x022b, -1, "vs6555"),</div><div class='add'>+	SMIAPP_IDENT_L(0x01, 0x022e, -1, "vw6558"),</div><div class='add'>+	SMIAPP_IDENT_L(0x07, 0x7698, -1, "ovm7698"),</div><div class='add'>+	SMIAPP_IDENT_L(0x0b, 0x4242, -1, "smiapp-003"),</div><div class='add'>+	SMIAPP_IDENT_L(0x0c, 0x208a, -1, "tcm8330md"),</div><div class='add'>+	SMIAPP_IDENT_LQ(0x0c, 0x2134, -1, "tcm8500md", &amp;smiapp_tcm8500md_quirk),</div><div class='add'>+	SMIAPP_IDENT_L(0x0c, 0x213e, -1, "et8en2"),</div><div class='add'>+	SMIAPP_IDENT_L(0x0c, 0x2184, -1, "tcm8580md"),</div><div class='add'>+	SMIAPP_IDENT_LQ(0x0c, 0x560f, -1, "jt8ew9", &amp;smiapp_jt8ew9_quirk),</div><div class='add'>+	SMIAPP_IDENT_LQ(0x10, 0x4141, -1, "jt8ev1", &amp;smiapp_jt8ev1_quirk),</div><div class='add'>+	SMIAPP_IDENT_LQ(0x10, 0x4241, -1, "imx125es", &amp;smiapp_imx125es_quirk),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *</div><div class='add'>+ * Dynamic Capability Identification</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int smiapp_read_frame_fmt(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	u32 fmt_model_type, fmt_model_subtype, ncol_desc, nrow_desc;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int rval;</div><div class='add'>+	int line_count = 0;</div><div class='add'>+	int embedded_start = -1, embedded_end = -1;</div><div class='add'>+	int image_start = 0;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_read(sensor, SMIAPP_REG_U8_FRAME_FORMAT_MODEL_TYPE,</div><div class='add'>+			   &amp;fmt_model_type);</div><div class='add'>+	if (rval)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_read(sensor, SMIAPP_REG_U8_FRAME_FORMAT_MODEL_SUBTYPE,</div><div class='add'>+			   &amp;fmt_model_subtype);</div><div class='add'>+	if (rval)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	ncol_desc = (fmt_model_subtype</div><div class='add'>+		     &amp; SMIAPP_FRAME_FORMAT_MODEL_SUBTYPE_NCOLS_MASK)</div><div class='add'>+		&gt;&gt; SMIAPP_FRAME_FORMAT_MODEL_SUBTYPE_NCOLS_SHIFT;</div><div class='add'>+	nrow_desc = fmt_model_subtype</div><div class='add'>+		&amp; SMIAPP_FRAME_FORMAT_MODEL_SUBTYPE_NROWS_MASK;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "format_model_type %s\n",</div><div class='add'>+		fmt_model_type == SMIAPP_FRAME_FORMAT_MODEL_TYPE_2BYTE</div><div class='add'>+		? "2 byte" :</div><div class='add'>+		fmt_model_type == SMIAPP_FRAME_FORMAT_MODEL_TYPE_4BYTE</div><div class='add'>+		? "4 byte" : "is simply bad");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ncol_desc + nrow_desc; i++) {</div><div class='add'>+		u32 desc;</div><div class='add'>+		u32 pixelcode;</div><div class='add'>+		u32 pixels;</div><div class='add'>+		char *which;</div><div class='add'>+		char *what;</div><div class='add'>+</div><div class='add'>+		if (fmt_model_type == SMIAPP_FRAME_FORMAT_MODEL_TYPE_2BYTE) {</div><div class='add'>+			rval = smiapp_read(</div><div class='add'>+				sensor,</div><div class='add'>+				SMIAPP_REG_U16_FRAME_FORMAT_DESCRIPTOR_2(i),</div><div class='add'>+				&amp;desc);</div><div class='add'>+			if (rval)</div><div class='add'>+				return rval;</div><div class='add'>+</div><div class='add'>+			pixelcode =</div><div class='add'>+				(desc</div><div class='add'>+				 &amp; SMIAPP_FRAME_FORMAT_DESC_2_PIXELCODE_MASK)</div><div class='add'>+				&gt;&gt; SMIAPP_FRAME_FORMAT_DESC_2_PIXELCODE_SHIFT;</div><div class='add'>+			pixels = desc &amp; SMIAPP_FRAME_FORMAT_DESC_2_PIXELS_MASK;</div><div class='add'>+		} else if (fmt_model_type</div><div class='add'>+			   == SMIAPP_FRAME_FORMAT_MODEL_TYPE_4BYTE) {</div><div class='add'>+			rval = smiapp_read(</div><div class='add'>+				sensor,</div><div class='add'>+				SMIAPP_REG_U32_FRAME_FORMAT_DESCRIPTOR_4(i),</div><div class='add'>+				&amp;desc);</div><div class='add'>+			if (rval)</div><div class='add'>+				return rval;</div><div class='add'>+</div><div class='add'>+			pixelcode =</div><div class='add'>+				(desc</div><div class='add'>+				 &amp; SMIAPP_FRAME_FORMAT_DESC_4_PIXELCODE_MASK)</div><div class='add'>+				&gt;&gt; SMIAPP_FRAME_FORMAT_DESC_4_PIXELCODE_SHIFT;</div><div class='add'>+			pixels = desc &amp; SMIAPP_FRAME_FORMAT_DESC_4_PIXELS_MASK;</div><div class='add'>+		} else {</div><div class='add'>+			dev_dbg(&amp;client-&gt;dev,</div><div class='add'>+				"invalid frame format model type %d\n",</div><div class='add'>+				fmt_model_type);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (i &lt; ncol_desc)</div><div class='add'>+			which = "columns";</div><div class='add'>+		else</div><div class='add'>+			which = "rows";</div><div class='add'>+</div><div class='add'>+		switch (pixelcode) {</div><div class='add'>+		case SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_EMBEDDED:</div><div class='add'>+			what = "embedded";</div><div class='add'>+			break;</div><div class='add'>+		case SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_DUMMY:</div><div class='add'>+			what = "dummy";</div><div class='add'>+			break;</div><div class='add'>+		case SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_BLACK:</div><div class='add'>+			what = "black";</div><div class='add'>+			break;</div><div class='add'>+		case SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_DARK:</div><div class='add'>+			what = "dark";</div><div class='add'>+			break;</div><div class='add'>+		case SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_VISIBLE:</div><div class='add'>+			what = "visible";</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			what = "invalid";</div><div class='add'>+			dev_dbg(&amp;client-&gt;dev, "pixelcode %d\n", pixelcode);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev_dbg(&amp;client-&gt;dev, "%s pixels: %d %s\n",</div><div class='add'>+			what, pixels, which);</div><div class='add'>+</div><div class='add'>+		if (i &lt; ncol_desc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Handle row descriptors */</div><div class='add'>+		if (pixelcode</div><div class='add'>+		    == SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_EMBEDDED) {</div><div class='add'>+			embedded_start = line_count;</div><div class='add'>+		} else {</div><div class='add'>+			if (pixelcode == SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_VISIBLE</div><div class='add'>+			    || pixels &gt;= sensor-&gt;limits[SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES] / 2)</div><div class='add'>+				image_start = line_count;</div><div class='add'>+			if (embedded_start != -1 &amp;&amp; embedded_end == -1)</div><div class='add'>+				embedded_end = line_count;</div><div class='add'>+		}</div><div class='add'>+		line_count += pixels;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (embedded_start == -1 || embedded_end == -1) {</div><div class='add'>+		embedded_start = 0;</div><div class='add'>+		embedded_end = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "embedded data from lines %d to %d\n",</div><div class='add'>+		embedded_start, embedded_end);</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "image data starts at line %d\n", image_start);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_pll_configure(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_pll *pll = &amp;sensor-&gt;pll;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(</div><div class='add'>+		sensor, SMIAPP_REG_U16_VT_PIX_CLK_DIV, pll-&gt;vt_pix_clk_div);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(</div><div class='add'>+		sensor, SMIAPP_REG_U16_VT_SYS_CLK_DIV, pll-&gt;vt_sys_clk_div);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(</div><div class='add'>+		sensor, SMIAPP_REG_U16_PRE_PLL_CLK_DIV, pll-&gt;pre_pll_clk_div);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(</div><div class='add'>+		sensor, SMIAPP_REG_U16_PLL_MULTIPLIER, pll-&gt;pll_multiplier);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	/* Lane op clock ratio does not apply here. */</div><div class='add'>+	rval = smiapp_write(</div><div class='add'>+		sensor, SMIAPP_REG_U32_REQUESTED_LINK_BIT_RATE_MBPS,</div><div class='add'>+		DIV_ROUND_UP(pll-&gt;op_sys_clk_freq_hz, 1000000 / 256 / 256));</div><div class='add'>+	if (rval &lt; 0 || sensor-&gt;minfo.smiapp_profile == SMIAPP_PROFILE_0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(</div><div class='add'>+		sensor, SMIAPP_REG_U16_OP_PIX_CLK_DIV, pll-&gt;op_pix_clk_div);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	return smiapp_write(</div><div class='add'>+		sensor, SMIAPP_REG_U16_OP_SYS_CLK_DIV, pll-&gt;op_sys_clk_div);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_pll_update(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	struct smiapp_pll_limits lim = {</div><div class='add'>+		.min_pre_pll_clk_div = sensor-&gt;limits[SMIAPP_LIMIT_MIN_PRE_PLL_CLK_DIV],</div><div class='add'>+		.max_pre_pll_clk_div = sensor-&gt;limits[SMIAPP_LIMIT_MAX_PRE_PLL_CLK_DIV],</div><div class='add'>+		.min_pll_ip_freq_hz = sensor-&gt;limits[SMIAPP_LIMIT_MIN_PLL_IP_FREQ_HZ],</div><div class='add'>+		.max_pll_ip_freq_hz = sensor-&gt;limits[SMIAPP_LIMIT_MAX_PLL_IP_FREQ_HZ],</div><div class='add'>+		.min_pll_multiplier = sensor-&gt;limits[SMIAPP_LIMIT_MIN_PLL_MULTIPLIER],</div><div class='add'>+		.max_pll_multiplier = sensor-&gt;limits[SMIAPP_LIMIT_MAX_PLL_MULTIPLIER],</div><div class='add'>+		.min_pll_op_freq_hz = sensor-&gt;limits[SMIAPP_LIMIT_MIN_PLL_OP_FREQ_HZ],</div><div class='add'>+		.max_pll_op_freq_hz = sensor-&gt;limits[SMIAPP_LIMIT_MAX_PLL_OP_FREQ_HZ],</div><div class='add'>+</div><div class='add'>+		.min_op_sys_clk_div = sensor-&gt;limits[SMIAPP_LIMIT_MIN_OP_SYS_CLK_DIV],</div><div class='add'>+		.max_op_sys_clk_div = sensor-&gt;limits[SMIAPP_LIMIT_MAX_OP_SYS_CLK_DIV],</div><div class='add'>+		.min_op_pix_clk_div = sensor-&gt;limits[SMIAPP_LIMIT_MIN_OP_PIX_CLK_DIV],</div><div class='add'>+		.max_op_pix_clk_div = sensor-&gt;limits[SMIAPP_LIMIT_MAX_OP_PIX_CLK_DIV],</div><div class='add'>+		.min_op_sys_clk_freq_hz = sensor-&gt;limits[SMIAPP_LIMIT_MIN_OP_SYS_CLK_FREQ_HZ],</div><div class='add'>+		.max_op_sys_clk_freq_hz = sensor-&gt;limits[SMIAPP_LIMIT_MAX_OP_SYS_CLK_FREQ_HZ],</div><div class='add'>+		.min_op_pix_clk_freq_hz = sensor-&gt;limits[SMIAPP_LIMIT_MIN_OP_PIX_CLK_FREQ_HZ],</div><div class='add'>+		.max_op_pix_clk_freq_hz = sensor-&gt;limits[SMIAPP_LIMIT_MAX_OP_PIX_CLK_FREQ_HZ],</div><div class='add'>+</div><div class='add'>+		.min_vt_sys_clk_div = sensor-&gt;limits[SMIAPP_LIMIT_MIN_VT_SYS_CLK_DIV],</div><div class='add'>+		.max_vt_sys_clk_div = sensor-&gt;limits[SMIAPP_LIMIT_MAX_VT_SYS_CLK_DIV],</div><div class='add'>+		.min_vt_pix_clk_div = sensor-&gt;limits[SMIAPP_LIMIT_MIN_VT_PIX_CLK_DIV],</div><div class='add'>+		.max_vt_pix_clk_div = sensor-&gt;limits[SMIAPP_LIMIT_MAX_VT_PIX_CLK_DIV],</div><div class='add'>+		.min_vt_sys_clk_freq_hz = sensor-&gt;limits[SMIAPP_LIMIT_MIN_VT_SYS_CLK_FREQ_HZ],</div><div class='add'>+		.max_vt_sys_clk_freq_hz = sensor-&gt;limits[SMIAPP_LIMIT_MAX_VT_SYS_CLK_FREQ_HZ],</div><div class='add'>+		.min_vt_pix_clk_freq_hz = sensor-&gt;limits[SMIAPP_LIMIT_MIN_VT_PIX_CLK_FREQ_HZ],</div><div class='add'>+		.max_vt_pix_clk_freq_hz = sensor-&gt;limits[SMIAPP_LIMIT_MAX_VT_PIX_CLK_FREQ_HZ],</div><div class='add'>+</div><div class='add'>+		.min_line_length_pck_bin = sensor-&gt;limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN],</div><div class='add'>+		.min_line_length_pck = sensor-&gt;limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK],</div><div class='add'>+	};</div><div class='add'>+	struct smiapp_pll *pll = &amp;sensor-&gt;pll;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	memset(&amp;sensor-&gt;pll, 0, sizeof(sensor-&gt;pll));</div><div class='add'>+</div><div class='add'>+	pll-&gt;lanes = sensor-&gt;platform_data-&gt;lanes;</div><div class='add'>+	pll-&gt;ext_clk_freq_hz = sensor-&gt;platform_data-&gt;ext_clk;</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;minfo.smiapp_profile == SMIAPP_PROFILE_0) {</div><div class='add'>+		/*</div><div class='add'>+		 * Fill in operational clock divisors limits from the</div><div class='add'>+		 * video timing ones. On profile 0 sensors the</div><div class='add'>+		 * requirements regarding them are essentially the</div><div class='add'>+		 * same as on VT ones.</div><div class='add'>+		 */</div><div class='add'>+		lim.min_op_sys_clk_div = lim.min_vt_sys_clk_div;</div><div class='add'>+		lim.max_op_sys_clk_div = lim.max_vt_sys_clk_div;</div><div class='add'>+		lim.min_op_pix_clk_div = lim.min_vt_pix_clk_div;</div><div class='add'>+		lim.max_op_pix_clk_div = lim.max_vt_pix_clk_div;</div><div class='add'>+		lim.min_op_sys_clk_freq_hz = lim.min_vt_sys_clk_freq_hz;</div><div class='add'>+		lim.max_op_sys_clk_freq_hz = lim.max_vt_sys_clk_freq_hz;</div><div class='add'>+		lim.min_op_pix_clk_freq_hz = lim.min_vt_pix_clk_freq_hz;</div><div class='add'>+		lim.max_op_pix_clk_freq_hz = lim.max_vt_pix_clk_freq_hz;</div><div class='add'>+		/* Profile 0 sensors have no separate OP clock branch. */</div><div class='add'>+		pll-&gt;flags |= SMIAPP_PLL_FLAG_NO_OP_CLOCKS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (smiapp_needs_quirk(sensor,</div><div class='add'>+			       SMIAPP_QUIRK_FLAG_OP_PIX_CLOCK_PER_LANE))</div><div class='add'>+		pll-&gt;flags |= SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE;</div><div class='add'>+</div><div class='add'>+	pll-&gt;binning_horizontal = sensor-&gt;binning_horizontal;</div><div class='add'>+	pll-&gt;binning_vertical = sensor-&gt;binning_vertical;</div><div class='add'>+	pll-&gt;link_freq =</div><div class='add'>+		sensor-&gt;link_freq-&gt;qmenu_int[sensor-&gt;link_freq-&gt;val];</div><div class='add'>+	pll-&gt;scale_m = sensor-&gt;scale_m;</div><div class='add'>+	pll-&gt;scale_n = sensor-&gt;limits[SMIAPP_LIMIT_SCALER_N_MIN];</div><div class='add'>+	pll-&gt;bits_per_pixel = sensor-&gt;csi_format-&gt;compressed;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_pll_calculate(&amp;client-&gt;dev, &amp;lim, pll);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	sensor-&gt;pixel_rate_parray-&gt;cur.val64 = pll-&gt;vt_pix_clk_freq_hz;</div><div class='add'>+	sensor-&gt;pixel_rate_csi-&gt;cur.val64 = pll-&gt;pixel_rate_csi;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *</div><div class='add'>+ * V4L2 Controls handling</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void __smiapp_update_exposure_limits(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_ctrl *ctrl = sensor-&gt;exposure;</div><div class='add'>+	int max;</div><div class='add'>+</div><div class='add'>+	max = sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].height</div><div class='add'>+		+ sensor-&gt;vblank-&gt;val</div><div class='add'>+		- sensor-&gt;limits[SMIAPP_LIMIT_COARSE_INTEGRATION_TIME_MAX_MARGIN];</div><div class='add'>+</div><div class='add'>+	ctrl-&gt;maximum = max;</div><div class='add'>+	if (ctrl-&gt;default_value &gt; max)</div><div class='add'>+		ctrl-&gt;default_value = max;</div><div class='add'>+	if (ctrl-&gt;val &gt; max)</div><div class='add'>+		ctrl-&gt;val = max;</div><div class='add'>+	if (ctrl-&gt;cur.val &gt; max)</div><div class='add'>+		ctrl-&gt;cur.val = max;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Order matters.</div><div class='add'>+ *</div><div class='add'>+ * 1. Bits-per-pixel, descending.</div><div class='add'>+ * 2. Bits-per-pixel compressed, descending.</div><div class='add'>+ * 3. Pixel order, same as in pixel_order_str. Formats for all four pixel</div><div class='add'>+ *    orders must be defined.</div><div class='add'>+ */</div><div class='add'>+static const struct smiapp_csi_data_format smiapp_csi_data_formats[] = {</div><div class='add'>+	{ V4L2_MBUS_FMT_SGRBG12_1X12, 12, 12, SMIAPP_PIXEL_ORDER_GRBG, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SRGGB12_1X12, 12, 12, SMIAPP_PIXEL_ORDER_RGGB, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SBGGR12_1X12, 12, 12, SMIAPP_PIXEL_ORDER_BGGR, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SGBRG12_1X12, 12, 12, SMIAPP_PIXEL_ORDER_GBRG, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SGRBG10_1X10, 10, 10, SMIAPP_PIXEL_ORDER_GRBG, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SRGGB10_1X10, 10, 10, SMIAPP_PIXEL_ORDER_RGGB, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SBGGR10_1X10, 10, 10, SMIAPP_PIXEL_ORDER_BGGR, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SGBRG10_1X10, 10, 10, SMIAPP_PIXEL_ORDER_GBRG, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8, 10, 8, SMIAPP_PIXEL_ORDER_GRBG, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8, 10, 8, SMIAPP_PIXEL_ORDER_RGGB, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8, 10, 8, SMIAPP_PIXEL_ORDER_BGGR, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8, 10, 8, SMIAPP_PIXEL_ORDER_GBRG, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SGRBG8_1X8, 8, 8, SMIAPP_PIXEL_ORDER_GRBG, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SRGGB8_1X8, 8, 8, SMIAPP_PIXEL_ORDER_RGGB, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SBGGR8_1X8, 8, 8, SMIAPP_PIXEL_ORDER_BGGR, },</div><div class='add'>+	{ V4L2_MBUS_FMT_SGBRG8_1X8, 8, 8, SMIAPP_PIXEL_ORDER_GBRG, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const char *pixel_order_str[] = { "GRBG", "RGGB", "BGGR", "GBRG" };</div><div class='add'>+</div><div class='add'>+#define to_csi_format_idx(fmt) (((unsigned long)(fmt)			\</div><div class='add'>+				 - (unsigned long)smiapp_csi_data_formats) \</div><div class='add'>+				/ sizeof(*smiapp_csi_data_formats))</div><div class='add'>+</div><div class='add'>+static u32 smiapp_pixel_order(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	int flip = 0;</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;hflip) {</div><div class='add'>+		if (sensor-&gt;hflip-&gt;val)</div><div class='add'>+			flip |= SMIAPP_IMAGE_ORIENTATION_HFLIP;</div><div class='add'>+</div><div class='add'>+		if (sensor-&gt;vflip-&gt;val)</div><div class='add'>+			flip |= SMIAPP_IMAGE_ORIENTATION_VFLIP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flip ^= sensor-&gt;hvflip_inv_mask;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "flip %d\n", flip);</div><div class='add'>+	return sensor-&gt;default_pixel_order ^ flip;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void smiapp_update_mbus_formats(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	unsigned int csi_format_idx =</div><div class='add'>+		to_csi_format_idx(sensor-&gt;csi_format) &amp; ~3;</div><div class='add'>+	unsigned int internal_csi_format_idx =</div><div class='add'>+		to_csi_format_idx(sensor-&gt;internal_csi_format) &amp; ~3;</div><div class='add'>+	unsigned int pixel_order = smiapp_pixel_order(sensor);</div><div class='add'>+</div><div class='add'>+	sensor-&gt;mbus_frame_fmts =</div><div class='add'>+		sensor-&gt;default_mbus_frame_fmts &lt;&lt; pixel_order;</div><div class='add'>+	sensor-&gt;csi_format =</div><div class='add'>+		&amp;smiapp_csi_data_formats[csi_format_idx + pixel_order];</div><div class='add'>+	sensor-&gt;internal_csi_format =</div><div class='add'>+		&amp;smiapp_csi_data_formats[internal_csi_format_idx</div><div class='add'>+					 + pixel_order];</div><div class='add'>+</div><div class='add'>+	BUG_ON(max(internal_csi_format_idx, csi_format_idx) + pixel_order</div><div class='add'>+	       &gt;= ARRAY_SIZE(smiapp_csi_data_formats));</div><div class='add'>+	BUG_ON(min(internal_csi_format_idx, csi_format_idx) &lt; 0);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "new pixel order %s\n",</div><div class='add'>+		pixel_order_str[pixel_order]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_set_ctrl(struct v4l2_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct smiapp_subdev, ctrl_handler)</div><div class='add'>+			-&gt;sensor;</div><div class='add'>+	u32 orient = 0;</div><div class='add'>+	int exposure;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_ANALOGUE_GAIN:</div><div class='add'>+		return smiapp_write(</div><div class='add'>+			sensor,</div><div class='add'>+			SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_GLOBAL, ctrl-&gt;val);</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_EXPOSURE:</div><div class='add'>+		return smiapp_write(</div><div class='add'>+			sensor,</div><div class='add'>+			SMIAPP_REG_U16_COARSE_INTEGRATION_TIME, ctrl-&gt;val);</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_HFLIP:</div><div class='add'>+	case V4L2_CID_VFLIP:</div><div class='add'>+		if (sensor-&gt;streaming)</div><div class='add'>+			return -EBUSY;</div><div class='add'>+</div><div class='add'>+		if (sensor-&gt;hflip-&gt;val)</div><div class='add'>+			orient |= SMIAPP_IMAGE_ORIENTATION_HFLIP;</div><div class='add'>+</div><div class='add'>+		if (sensor-&gt;vflip-&gt;val)</div><div class='add'>+			orient |= SMIAPP_IMAGE_ORIENTATION_VFLIP;</div><div class='add'>+</div><div class='add'>+		orient ^= sensor-&gt;hvflip_inv_mask;</div><div class='add'>+		rval = smiapp_write(sensor,</div><div class='add'>+				    SMIAPP_REG_U8_IMAGE_ORIENTATION,</div><div class='add'>+				    orient);</div><div class='add'>+		if (rval &lt; 0)</div><div class='add'>+			return rval;</div><div class='add'>+</div><div class='add'>+		smiapp_update_mbus_formats(sensor);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_VBLANK:</div><div class='add'>+		exposure = sensor-&gt;exposure-&gt;val;</div><div class='add'>+</div><div class='add'>+		__smiapp_update_exposure_limits(sensor);</div><div class='add'>+</div><div class='add'>+		if (exposure &gt; sensor-&gt;exposure-&gt;maximum) {</div><div class='add'>+			sensor-&gt;exposure-&gt;val =</div><div class='add'>+				sensor-&gt;exposure-&gt;maximum;</div><div class='add'>+			rval = smiapp_set_ctrl(</div><div class='add'>+				sensor-&gt;exposure);</div><div class='add'>+			if (rval &lt; 0)</div><div class='add'>+				return rval;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return smiapp_write(</div><div class='add'>+			sensor, SMIAPP_REG_U16_FRAME_LENGTH_LINES,</div><div class='add'>+			sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].height</div><div class='add'>+			+ ctrl-&gt;val);</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_HBLANK:</div><div class='add'>+		return smiapp_write(</div><div class='add'>+			sensor, SMIAPP_REG_U16_LINE_LENGTH_PCK,</div><div class='add'>+			sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].width</div><div class='add'>+			+ ctrl-&gt;val);</div><div class='add'>+</div><div class='add'>+	case V4L2_CID_LINK_FREQ:</div><div class='add'>+		if (sensor-&gt;streaming)</div><div class='add'>+			return -EBUSY;</div><div class='add'>+</div><div class='add'>+		return smiapp_pll_update(sensor);</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops smiapp_ctrl_ops = {</div><div class='add'>+	.s_ctrl = smiapp_set_ctrl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int smiapp_init_controls(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	unsigned int max;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	rval = v4l2_ctrl_handler_init(&amp;sensor-&gt;pixel_array-&gt;ctrl_handler, 7);</div><div class='add'>+	if (rval)</div><div class='add'>+		return rval;</div><div class='add'>+	sensor-&gt;pixel_array-&gt;ctrl_handler.lock = &amp;sensor-&gt;mutex;</div><div class='add'>+</div><div class='add'>+	sensor-&gt;analog_gain = v4l2_ctrl_new_std(</div><div class='add'>+		&amp;sensor-&gt;pixel_array-&gt;ctrl_handler, &amp;smiapp_ctrl_ops,</div><div class='add'>+		V4L2_CID_ANALOGUE_GAIN,</div><div class='add'>+		sensor-&gt;limits[SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MIN],</div><div class='add'>+		sensor-&gt;limits[SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MAX],</div><div class='add'>+		max(sensor-&gt;limits[SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_STEP], 1U),</div><div class='add'>+		sensor-&gt;limits[SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MIN]);</div><div class='add'>+</div><div class='add'>+	/* Exposure limits will be updated soon, use just something here. */</div><div class='add'>+	sensor-&gt;exposure = v4l2_ctrl_new_std(</div><div class='add'>+		&amp;sensor-&gt;pixel_array-&gt;ctrl_handler, &amp;smiapp_ctrl_ops,</div><div class='add'>+		V4L2_CID_EXPOSURE, 0, 0, 1, 0);</div><div class='add'>+</div><div class='add'>+	sensor-&gt;hflip = v4l2_ctrl_new_std(</div><div class='add'>+		&amp;sensor-&gt;pixel_array-&gt;ctrl_handler, &amp;smiapp_ctrl_ops,</div><div class='add'>+		V4L2_CID_HFLIP, 0, 1, 1, 0);</div><div class='add'>+	sensor-&gt;vflip = v4l2_ctrl_new_std(</div><div class='add'>+		&amp;sensor-&gt;pixel_array-&gt;ctrl_handler, &amp;smiapp_ctrl_ops,</div><div class='add'>+		V4L2_CID_VFLIP, 0, 1, 1, 0);</div><div class='add'>+</div><div class='add'>+	sensor-&gt;vblank = v4l2_ctrl_new_std(</div><div class='add'>+		&amp;sensor-&gt;pixel_array-&gt;ctrl_handler, &amp;smiapp_ctrl_ops,</div><div class='add'>+		V4L2_CID_VBLANK, 0, 1, 1, 0);</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;vblank)</div><div class='add'>+		sensor-&gt;vblank-&gt;flags |= V4L2_CTRL_FLAG_UPDATE;</div><div class='add'>+</div><div class='add'>+	sensor-&gt;hblank = v4l2_ctrl_new_std(</div><div class='add'>+		&amp;sensor-&gt;pixel_array-&gt;ctrl_handler, &amp;smiapp_ctrl_ops,</div><div class='add'>+		V4L2_CID_HBLANK, 0, 1, 1, 0);</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;hblank)</div><div class='add'>+		sensor-&gt;hblank-&gt;flags |= V4L2_CTRL_FLAG_UPDATE;</div><div class='add'>+</div><div class='add'>+	sensor-&gt;pixel_rate_parray = v4l2_ctrl_new_std(</div><div class='add'>+		&amp;sensor-&gt;pixel_array-&gt;ctrl_handler, &amp;smiapp_ctrl_ops,</div><div class='add'>+		V4L2_CID_PIXEL_RATE, 0, 0, 1, 0);</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;pixel_array-&gt;ctrl_handler.error) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev,</div><div class='add'>+			"pixel array controls initialization failed (%d)\n",</div><div class='add'>+			sensor-&gt;pixel_array-&gt;ctrl_handler.error);</div><div class='add'>+		rval = sensor-&gt;pixel_array-&gt;ctrl_handler.error;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sensor-&gt;pixel_array-&gt;sd.ctrl_handler =</div><div class='add'>+		&amp;sensor-&gt;pixel_array-&gt;ctrl_handler;</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_cluster(2, &amp;sensor-&gt;hflip);</div><div class='add'>+</div><div class='add'>+	rval = v4l2_ctrl_handler_init(&amp;sensor-&gt;src-&gt;ctrl_handler, 0);</div><div class='add'>+	if (rval)</div><div class='add'>+		goto error;</div><div class='add'>+	sensor-&gt;src-&gt;ctrl_handler.lock = &amp;sensor-&gt;mutex;</div><div class='add'>+</div><div class='add'>+	for (max = 0; sensor-&gt;platform_data-&gt;op_sys_clock[max + 1]; max++);</div><div class='add'>+</div><div class='add'>+	sensor-&gt;link_freq = v4l2_ctrl_new_int_menu(</div><div class='add'>+		&amp;sensor-&gt;src-&gt;ctrl_handler, &amp;smiapp_ctrl_ops,</div><div class='add'>+		V4L2_CID_LINK_FREQ, max, 0,</div><div class='add'>+		sensor-&gt;platform_data-&gt;op_sys_clock);</div><div class='add'>+</div><div class='add'>+	sensor-&gt;pixel_rate_csi = v4l2_ctrl_new_std(</div><div class='add'>+		&amp;sensor-&gt;src-&gt;ctrl_handler, &amp;smiapp_ctrl_ops,</div><div class='add'>+		V4L2_CID_PIXEL_RATE, 0, 0, 1, 0);</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;src-&gt;ctrl_handler.error) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev,</div><div class='add'>+			"src controls initialization failed (%d)\n",</div><div class='add'>+			sensor-&gt;src-&gt;ctrl_handler.error);</div><div class='add'>+		rval = sensor-&gt;src-&gt;ctrl_handler.error;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sensor-&gt;src-&gt;sd.ctrl_handler =</div><div class='add'>+		&amp;sensor-&gt;src-&gt;ctrl_handler;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;sensor-&gt;pixel_array-&gt;ctrl_handler);</div><div class='add'>+	v4l2_ctrl_handler_free(&amp;sensor-&gt;src-&gt;ctrl_handler);</div><div class='add'>+</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void smiapp_free_controls(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sensor-&gt;ssds_used; i++)</div><div class='add'>+		v4l2_ctrl_handler_free(&amp;sensor-&gt;ssds[i].ctrl_handler);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_get_limits(struct smiapp_sensor *sensor, int const *limit,</div><div class='add'>+			     unsigned int n)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u32 val;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; n; i++) {</div><div class='add'>+		rval = smiapp_read(</div><div class='add'>+			sensor, smiapp_reg_limits[limit[i]].addr, &amp;val);</div><div class='add'>+		if (rval)</div><div class='add'>+			return rval;</div><div class='add'>+		sensor-&gt;limits[limit[i]] = val;</div><div class='add'>+		dev_dbg(&amp;client-&gt;dev, "0x%8.8x \"%s\" = %d, 0x%x\n",</div><div class='add'>+			smiapp_reg_limits[limit[i]].addr,</div><div class='add'>+			smiapp_reg_limits[limit[i]].what, val, val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_get_all_limits(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SMIAPP_LIMIT_LAST; i++) {</div><div class='add'>+		rval = smiapp_get_limits(sensor, &amp;i, 1);</div><div class='add'>+		if (rval &lt; 0)</div><div class='add'>+			return rval;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;limits[SMIAPP_LIMIT_SCALER_N_MIN] == 0)</div><div class='add'>+		smiapp_replace_limit(sensor, SMIAPP_LIMIT_SCALER_N_MIN, 16);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_get_limits_binning(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	static u32 const limits[] = {</div><div class='add'>+		SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES_BIN,</div><div class='add'>+		SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES_BIN,</div><div class='add'>+		SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN,</div><div class='add'>+		SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK_BIN,</div><div class='add'>+		SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN,</div><div class='add'>+		SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MIN_BIN,</div><div class='add'>+		SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MAX_MARGIN_BIN,</div><div class='add'>+	};</div><div class='add'>+	static u32 const limits_replace[] = {</div><div class='add'>+		SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES,</div><div class='add'>+		SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES,</div><div class='add'>+		SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK,</div><div class='add'>+		SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK,</div><div class='add'>+		SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK,</div><div class='add'>+		SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MIN,</div><div class='add'>+		SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MAX_MARGIN,</div><div class='add'>+	};</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;limits[SMIAPP_LIMIT_BINNING_CAPABILITY] ==</div><div class='add'>+	    SMIAPP_BINNING_CAPABILITY_NO) {</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(limits); i++)</div><div class='add'>+			sensor-&gt;limits[limits[i]] =</div><div class='add'>+				sensor-&gt;limits[limits_replace[i]];</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_get_limits(sensor, limits, ARRAY_SIZE(limits));</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Sanity check whether the binning limits are valid. If not,</div><div class='add'>+	 * use the non-binning ones.</div><div class='add'>+	 */</div><div class='add'>+	if (sensor-&gt;limits[SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES_BIN]</div><div class='add'>+	    &amp;&amp; sensor-&gt;limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN]</div><div class='add'>+	    &amp;&amp; sensor-&gt;limits[SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN])</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(limits); i++) {</div><div class='add'>+		dev_dbg(&amp;client-&gt;dev,</div><div class='add'>+			"replace limit 0x%8.8x \"%s\" = %d, 0x%x\n",</div><div class='add'>+			smiapp_reg_limits[limits[i]].addr,</div><div class='add'>+			smiapp_reg_limits[limits[i]].what,</div><div class='add'>+			sensor-&gt;limits[limits_replace[i]],</div><div class='add'>+			sensor-&gt;limits[limits_replace[i]]);</div><div class='add'>+		sensor-&gt;limits[limits[i]] =</div><div class='add'>+			sensor-&gt;limits[limits_replace[i]];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_get_mbus_formats(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	unsigned int type, n;</div><div class='add'>+	unsigned int i, pixel_order;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_read(</div><div class='add'>+		sensor, SMIAPP_REG_U8_DATA_FORMAT_MODEL_TYPE, &amp;type);</div><div class='add'>+	if (rval)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "data_format_model_type %d\n", type);</div><div class='add'>+</div><div class='add'>+	rval = smiapp_read(sensor, SMIAPP_REG_U8_PIXEL_ORDER,</div><div class='add'>+			   &amp;pixel_order);</div><div class='add'>+	if (rval)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	if (pixel_order &gt;= ARRAY_SIZE(pixel_order_str)) {</div><div class='add'>+		dev_dbg(&amp;client-&gt;dev, "bad pixel order %d\n", pixel_order);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "pixel order %d (%s)\n", pixel_order,</div><div class='add'>+		pixel_order_str[pixel_order]);</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case SMIAPP_DATA_FORMAT_MODEL_TYPE_NORMAL:</div><div class='add'>+		n = SMIAPP_DATA_FORMAT_MODEL_TYPE_NORMAL_N;</div><div class='add'>+		break;</div><div class='add'>+	case SMIAPP_DATA_FORMAT_MODEL_TYPE_EXTENDED:</div><div class='add'>+		n = SMIAPP_DATA_FORMAT_MODEL_TYPE_EXTENDED_N;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sensor-&gt;default_pixel_order = pixel_order;</div><div class='add'>+	sensor-&gt;mbus_frame_fmts = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; n; i++) {</div><div class='add'>+		unsigned int fmt, j;</div><div class='add'>+</div><div class='add'>+		rval = smiapp_read(</div><div class='add'>+			sensor,</div><div class='add'>+			SMIAPP_REG_U16_DATA_FORMAT_DESCRIPTOR(i), &amp;fmt);</div><div class='add'>+		if (rval)</div><div class='add'>+			return rval;</div><div class='add'>+</div><div class='add'>+		dev_dbg(&amp;client-&gt;dev, "bpp %d, compressed %d\n",</div><div class='add'>+			fmt &gt;&gt; 8, (u8)fmt);</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; ARRAY_SIZE(smiapp_csi_data_formats); j++) {</div><div class='add'>+			const struct smiapp_csi_data_format *f =</div><div class='add'>+				&amp;smiapp_csi_data_formats[j];</div><div class='add'>+</div><div class='add'>+			if (f-&gt;pixel_order != SMIAPP_PIXEL_ORDER_GRBG)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (f-&gt;width != fmt &gt;&gt; 8 || f-&gt;compressed != (u8)fmt)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			dev_dbg(&amp;client-&gt;dev, "jolly good! %d\n", j);</div><div class='add'>+</div><div class='add'>+			sensor-&gt;default_mbus_frame_fmts |= 1 &lt;&lt; j;</div><div class='add'>+			if (!sensor-&gt;csi_format) {</div><div class='add'>+				sensor-&gt;csi_format = f;</div><div class='add'>+				sensor-&gt;internal_csi_format = f;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!sensor-&gt;csi_format) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "no supported mbus code found\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	smiapp_update_mbus_formats(sensor);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void smiapp_update_blanking(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_ctrl *vblank = sensor-&gt;vblank;</div><div class='add'>+	struct v4l2_ctrl *hblank = sensor-&gt;hblank;</div><div class='add'>+</div><div class='add'>+	vblank-&gt;minimum =</div><div class='add'>+		max_t(int,</div><div class='add'>+		      sensor-&gt;limits[SMIAPP_LIMIT_MIN_FRAME_BLANKING_LINES],</div><div class='add'>+		      sensor-&gt;limits[SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES_BIN] -</div><div class='add'>+		      sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].height);</div><div class='add'>+	vblank-&gt;maximum =</div><div class='add'>+		sensor-&gt;limits[SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES_BIN] -</div><div class='add'>+		sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].height;</div><div class='add'>+</div><div class='add'>+	vblank-&gt;val = clamp_t(int, vblank-&gt;val,</div><div class='add'>+			      vblank-&gt;minimum, vblank-&gt;maximum);</div><div class='add'>+	vblank-&gt;default_value = vblank-&gt;minimum;</div><div class='add'>+	vblank-&gt;val = vblank-&gt;val;</div><div class='add'>+	vblank-&gt;cur.val = vblank-&gt;val;</div><div class='add'>+</div><div class='add'>+	hblank-&gt;minimum =</div><div class='add'>+		max_t(int,</div><div class='add'>+		      sensor-&gt;limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN] -</div><div class='add'>+		      sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].width,</div><div class='add'>+		      sensor-&gt;limits[SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN]);</div><div class='add'>+	hblank-&gt;maximum =</div><div class='add'>+		sensor-&gt;limits[SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK_BIN] -</div><div class='add'>+		sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].width;</div><div class='add'>+</div><div class='add'>+	hblank-&gt;val = clamp_t(int, hblank-&gt;val,</div><div class='add'>+			      hblank-&gt;minimum, hblank-&gt;maximum);</div><div class='add'>+	hblank-&gt;default_value = hblank-&gt;minimum;</div><div class='add'>+	hblank-&gt;val = hblank-&gt;val;</div><div class='add'>+	hblank-&gt;cur.val = hblank-&gt;val;</div><div class='add'>+</div><div class='add'>+	__smiapp_update_exposure_limits(sensor);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_update_mode(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	unsigned int binning_mode;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "frame size: %dx%d\n",</div><div class='add'>+		sensor-&gt;src-&gt;crop[SMIAPP_PAD_SRC].width,</div><div class='add'>+		sensor-&gt;src-&gt;crop[SMIAPP_PAD_SRC].height);</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "csi format width: %d\n",</div><div class='add'>+		sensor-&gt;csi_format-&gt;width);</div><div class='add'>+</div><div class='add'>+	/* Binning has to be set up here; it affects limits */</div><div class='add'>+	if (sensor-&gt;binning_horizontal == 1 &amp;&amp;</div><div class='add'>+	    sensor-&gt;binning_vertical == 1) {</div><div class='add'>+		binning_mode = 0;</div><div class='add'>+	} else {</div><div class='add'>+		u8 binning_type =</div><div class='add'>+			(sensor-&gt;binning_horizontal &lt;&lt; 4)</div><div class='add'>+			| sensor-&gt;binning_vertical;</div><div class='add'>+</div><div class='add'>+		rval = smiapp_write(</div><div class='add'>+			sensor, SMIAPP_REG_U8_BINNING_TYPE, binning_type);</div><div class='add'>+		if (rval &lt; 0)</div><div class='add'>+			return rval;</div><div class='add'>+</div><div class='add'>+		binning_mode = 1;</div><div class='add'>+	}</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U8_BINNING_MODE, binning_mode);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	/* Get updated limits due to binning */</div><div class='add'>+	rval = smiapp_get_limits_binning(sensor);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_pll_update(sensor);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	/* Output from pixel array, including blanking */</div><div class='add'>+	smiapp_update_blanking(sensor);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "vblank\t\t%d\n", sensor-&gt;vblank-&gt;val);</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "hblank\t\t%d\n", sensor-&gt;hblank-&gt;val);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "real timeperframe\t100/%d\n",</div><div class='add'>+		sensor-&gt;pll.vt_pix_clk_freq_hz /</div><div class='add'>+		((sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].width</div><div class='add'>+		  + sensor-&gt;hblank-&gt;val) *</div><div class='add'>+		 (sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].height</div><div class='add'>+		  + sensor-&gt;vblank-&gt;val) / 100));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *</div><div class='add'>+ * SMIA++ NVM handling</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static int smiapp_read_nvm(struct smiapp_sensor *sensor,</div><div class='add'>+			   unsigned char *nvm)</div><div class='add'>+{</div><div class='add'>+	u32 i, s, p, np, v;</div><div class='add'>+	int rval = 0, rval2;</div><div class='add'>+</div><div class='add'>+	np = sensor-&gt;nvm_size / SMIAPP_NVM_PAGE_SIZE;</div><div class='add'>+	for (p = 0; p &lt; np; p++) {</div><div class='add'>+		rval = smiapp_write(</div><div class='add'>+			sensor,</div><div class='add'>+			SMIAPP_REG_U8_DATA_TRANSFER_IF_1_PAGE_SELECT, p);</div><div class='add'>+		if (rval)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		rval = smiapp_write(sensor,</div><div class='add'>+				    SMIAPP_REG_U8_DATA_TRANSFER_IF_1_CTRL,</div><div class='add'>+				    SMIAPP_DATA_TRANSFER_IF_1_CTRL_EN |</div><div class='add'>+				    SMIAPP_DATA_TRANSFER_IF_1_CTRL_RD_EN);</div><div class='add'>+		if (rval)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; 1000; i++) {</div><div class='add'>+			rval = smiapp_read(</div><div class='add'>+				sensor,</div><div class='add'>+				SMIAPP_REG_U8_DATA_TRANSFER_IF_1_STATUS, &amp;s);</div><div class='add'>+</div><div class='add'>+			if (rval)</div><div class='add'>+				goto out;</div><div class='add'>+</div><div class='add'>+			if (s &amp; SMIAPP_DATA_TRANSFER_IF_1_STATUS_RD_READY)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			if (--i == 0) {</div><div class='add'>+				rval = -ETIMEDOUT;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; SMIAPP_NVM_PAGE_SIZE; i++) {</div><div class='add'>+			rval = smiapp_read(</div><div class='add'>+				sensor,</div><div class='add'>+				SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_0 + i,</div><div class='add'>+				&amp;v);</div><div class='add'>+			if (rval)</div><div class='add'>+				goto out;</div><div class='add'>+</div><div class='add'>+			*nvm++ = v;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rval2 = smiapp_write(sensor, SMIAPP_REG_U8_DATA_TRANSFER_IF_1_CTRL, 0);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+	else</div><div class='add'>+		return rval2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *</div><div class='add'>+ * SMIA++ CCI address control</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static int smiapp_change_cci_addr(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	int rval;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	client-&gt;addr = sensor-&gt;platform_data-&gt;i2c_addr_dfl;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor,</div><div class='add'>+			    SMIAPP_REG_U8_CCI_ADDRESS_CONTROL,</div><div class='add'>+			    sensor-&gt;platform_data-&gt;i2c_addr_alt &lt;&lt; 1);</div><div class='add'>+	if (rval)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	client-&gt;addr = sensor-&gt;platform_data-&gt;i2c_addr_alt;</div><div class='add'>+</div><div class='add'>+	/* verify addr change went ok */</div><div class='add'>+	rval = smiapp_read(sensor, SMIAPP_REG_U8_CCI_ADDRESS_CONTROL, &amp;val);</div><div class='add'>+	if (rval)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	if (val != sensor-&gt;platform_data-&gt;i2c_addr_alt &lt;&lt; 1)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *</div><div class='add'>+ * SMIA++ Mode Control</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static int smiapp_setup_flash_strobe(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_flash_strobe_parms *strobe_setup;</div><div class='add'>+	unsigned int ext_freq = sensor-&gt;platform_data-&gt;ext_clk;</div><div class='add'>+	u32 tmp;</div><div class='add'>+	u32 strobe_adjustment;</div><div class='add'>+	u32 strobe_width_high_rs;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	strobe_setup = sensor-&gt;platform_data-&gt;strobe_setup;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * How to calculate registers related to strobe length. Please</div><div class='add'>+	 * do not change, or if you do at least know what you're</div><div class='add'>+	 * doing. :-)</div><div class='add'>+	 *</div><div class='add'>+	 * Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt; 2010-10-25</div><div class='add'>+	 *</div><div class='add'>+	 * flash_strobe_length [us] / 10^6 = (tFlash_strobe_width_ctrl</div><div class='add'>+	 *	/ EXTCLK freq [Hz]) * flash_strobe_adjustment</div><div class='add'>+	 *</div><div class='add'>+	 * tFlash_strobe_width_ctrl E N, [1 - 0xffff]</div><div class='add'>+	 * flash_strobe_adjustment E N, [1 - 0xff]</div><div class='add'>+	 *</div><div class='add'>+	 * The formula above is written as below to keep it on one</div><div class='add'>+	 * line:</div><div class='add'>+	 *</div><div class='add'>+	 * l / 10^6 = w / e * a</div><div class='add'>+	 *</div><div class='add'>+	 * Let's mark w * a by x:</div><div class='add'>+	 *</div><div class='add'>+	 * x = w * a</div><div class='add'>+	 *</div><div class='add'>+	 * Thus, we get:</div><div class='add'>+	 *</div><div class='add'>+	 * x = l * e / 10^6</div><div class='add'>+	 *</div><div class='add'>+	 * The strobe width must be at least as long as requested,</div><div class='add'>+	 * thus rounding upwards is needed.</div><div class='add'>+	 *</div><div class='add'>+	 * x = (l * e + 10^6 - 1) / 10^6</div><div class='add'>+	 * -----------------------------</div><div class='add'>+	 *</div><div class='add'>+	 * Maximum possible accuracy is wanted at all times. Thus keep</div><div class='add'>+	 * a as small as possible.</div><div class='add'>+	 *</div><div class='add'>+	 * Calculate a, assuming maximum w, with rounding upwards:</div><div class='add'>+	 *</div><div class='add'>+	 * a = (x + (2^16 - 1) - 1) / (2^16 - 1)</div><div class='add'>+	 * -------------------------------------</div><div class='add'>+	 *</div><div class='add'>+	 * Thus, we also get w, with that a, with rounding upwards:</div><div class='add'>+	 *</div><div class='add'>+	 * w = (x + a - 1) / a</div><div class='add'>+	 * -------------------</div><div class='add'>+	 *</div><div class='add'>+	 * To get limits:</div><div class='add'>+	 *</div><div class='add'>+	 * x E [1, (2^16 - 1) * (2^8 - 1)]</div><div class='add'>+	 *</div><div class='add'>+	 * Substituting maximum x to the original formula (with rounding),</div><div class='add'>+	 * the maximum l is thus</div><div class='add'>+	 *</div><div class='add'>+	 * (2^16 - 1) * (2^8 - 1) * 10^6 = l * e + 10^6 - 1</div><div class='add'>+	 *</div><div class='add'>+	 * l = (10^6 * (2^16 - 1) * (2^8 - 1) - 10^6 + 1) / e</div><div class='add'>+	 * --------------------------------------------------</div><div class='add'>+	 *</div><div class='add'>+	 * flash_strobe_length must be clamped between 1 and</div><div class='add'>+	 * (10^6 * (2^16 - 1) * (2^8 - 1) - 10^6 + 1) / EXTCLK freq.</div><div class='add'>+	 *</div><div class='add'>+	 * Then,</div><div class='add'>+	 *</div><div class='add'>+	 * flash_strobe_adjustment = ((flash_strobe_length *</div><div class='add'>+	 *	EXTCLK freq + 10^6 - 1) / 10^6 + (2^16 - 1) - 1) / (2^16 - 1)</div><div class='add'>+	 *</div><div class='add'>+	 * tFlash_strobe_width_ctrl = ((flash_strobe_length *</div><div class='add'>+	 *	EXTCLK freq + 10^6 - 1) / 10^6 +</div><div class='add'>+	 *	flash_strobe_adjustment - 1) / flash_strobe_adjustment</div><div class='add'>+	 */</div><div class='add'>+	tmp = div_u64(1000000ULL * ((1 &lt;&lt; 16) - 1) * ((1 &lt;&lt; 8) - 1) -</div><div class='add'>+		      1000000 + 1, ext_freq);</div><div class='add'>+	strobe_setup-&gt;strobe_width_high_us =</div><div class='add'>+		clamp_t(u32, strobe_setup-&gt;strobe_width_high_us, 1, tmp);</div><div class='add'>+</div><div class='add'>+	tmp = div_u64(((u64)strobe_setup-&gt;strobe_width_high_us * (u64)ext_freq +</div><div class='add'>+			1000000 - 1), 1000000ULL);</div><div class='add'>+	strobe_adjustment = (tmp + (1 &lt;&lt; 16) - 1 - 1) / ((1 &lt;&lt; 16) - 1);</div><div class='add'>+	strobe_width_high_rs = (tmp + strobe_adjustment - 1) /</div><div class='add'>+				strobe_adjustment;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U8_FLASH_MODE_RS,</div><div class='add'>+			    strobe_setup-&gt;mode);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U8_FLASH_STROBE_ADJUSTMENT,</div><div class='add'>+			    strobe_adjustment);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(</div><div class='add'>+		sensor, SMIAPP_REG_U16_TFLASH_STROBE_WIDTH_HIGH_RS_CTRL,</div><div class='add'>+		strobe_width_high_rs);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U16_TFLASH_STROBE_DELAY_RS_CTRL,</div><div class='add'>+			    strobe_setup-&gt;strobe_delay);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U16_FLASH_STROBE_START_POINT,</div><div class='add'>+			    strobe_setup-&gt;stobe_start_point);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U8_FLASH_TRIGGER_RS,</div><div class='add'>+			    strobe_setup-&gt;trigger);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	sensor-&gt;platform_data-&gt;strobe_setup-&gt;trigger = 0;</div><div class='add'>+</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* -----------------------------------------------------------------------------</div><div class='add'>+ * Power management</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int smiapp_power_on(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	unsigned int sleep;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	rval = regulator_enable(sensor-&gt;vana);</div><div class='add'>+	if (rval) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "failed to enable vana regulator\n");</div><div class='add'>+		return rval;</div><div class='add'>+	}</div><div class='add'>+	usleep_range(1000, 1000);</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;set_xclk)</div><div class='add'>+		rval = sensor-&gt;platform_data-&gt;set_xclk(</div><div class='add'>+			&amp;sensor-&gt;src-&gt;sd, sensor-&gt;platform_data-&gt;ext_clk);</div><div class='add'>+	else</div><div class='add'>+		rval = clk_enable(sensor-&gt;ext_clk);</div><div class='add'>+	if (rval &lt; 0) {</div><div class='add'>+		dev_dbg(&amp;client-&gt;dev, "failed to set xclk\n");</div><div class='add'>+		goto out_xclk_fail;</div><div class='add'>+	}</div><div class='add'>+	usleep_range(1000, 1000);</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;xshutdown != SMIAPP_NO_XSHUTDOWN)</div><div class='add'>+		gpio_set_value(sensor-&gt;platform_data-&gt;xshutdown, 1);</div><div class='add'>+</div><div class='add'>+	sleep = SMIAPP_RESET_DELAY(sensor-&gt;platform_data-&gt;ext_clk);</div><div class='add'>+	usleep_range(sleep, sleep);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Failures to respond to the address change command have been noticed.</div><div class='add'>+	 * Those failures seem to be caused by the sensor requiring a longer</div><div class='add'>+	 * boot time than advertised. An additional 10ms delay seems to work</div><div class='add'>+	 * around the issue, but the SMIA++ I2C write retry hack makes the delay</div><div class='add'>+	 * unnecessary. The failures need to be investigated to find a proper</div><div class='add'>+	 * fix, and a delay will likely need to be added here if the I2C write</div><div class='add'>+	 * retry hack is reverted before the root cause of the boot time issue</div><div class='add'>+	 * is found.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;i2c_addr_alt) {</div><div class='add'>+		rval = smiapp_change_cci_addr(sensor);</div><div class='add'>+		if (rval) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev, "cci address change error\n");</div><div class='add'>+			goto out_cci_addr_fail;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U8_SOFTWARE_RESET,</div><div class='add'>+			    SMIAPP_SOFTWARE_RESET);</div><div class='add'>+	if (rval &lt; 0) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "software reset failed\n");</div><div class='add'>+		goto out_cci_addr_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;i2c_addr_alt) {</div><div class='add'>+		rval = smiapp_change_cci_addr(sensor);</div><div class='add'>+		if (rval) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev, "cci address change error\n");</div><div class='add'>+			goto out_cci_addr_fail;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U16_COMPRESSION_MODE,</div><div class='add'>+			    SMIAPP_COMPRESSION_MODE_SIMPLE_PREDICTOR);</div><div class='add'>+	if (rval) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "compression mode set failed\n");</div><div class='add'>+		goto out_cci_addr_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(</div><div class='add'>+		sensor, SMIAPP_REG_U16_EXTCLK_FREQUENCY_MHZ,</div><div class='add'>+		sensor-&gt;platform_data-&gt;ext_clk / (1000000 / (1 &lt;&lt; 8)));</div><div class='add'>+	if (rval) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "extclk frequency set failed\n");</div><div class='add'>+		goto out_cci_addr_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U8_CSI_LANE_MODE,</div><div class='add'>+			    sensor-&gt;platform_data-&gt;lanes - 1);</div><div class='add'>+	if (rval) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "csi lane mode set failed\n");</div><div class='add'>+		goto out_cci_addr_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U8_FAST_STANDBY_CTRL,</div><div class='add'>+			    SMIAPP_FAST_STANDBY_CTRL_IMMEDIATE);</div><div class='add'>+	if (rval) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "fast standby set failed\n");</div><div class='add'>+		goto out_cci_addr_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U8_CSI_SIGNALLING_MODE,</div><div class='add'>+			    sensor-&gt;platform_data-&gt;csi_signalling_mode);</div><div class='add'>+	if (rval) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "csi signalling mode set failed\n");</div><div class='add'>+		goto out_cci_addr_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* DPHY control done by sensor based on requested link rate */</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U8_DPHY_CTRL,</div><div class='add'>+			    SMIAPP_DPHY_CTRL_UI);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_call_quirk(sensor, post_poweron);</div><div class='add'>+	if (rval) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "post_poweron quirks failed\n");</div><div class='add'>+		goto out_cci_addr_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Are we still initialising...? If yes, return here. */</div><div class='add'>+	if (!sensor-&gt;pixel_array)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rval = v4l2_ctrl_handler_setup(</div><div class='add'>+		&amp;sensor-&gt;pixel_array-&gt;ctrl_handler);</div><div class='add'>+	if (rval)</div><div class='add'>+		goto out_cci_addr_fail;</div><div class='add'>+</div><div class='add'>+	rval = v4l2_ctrl_handler_setup(&amp;sensor-&gt;src-&gt;ctrl_handler);</div><div class='add'>+	if (rval)</div><div class='add'>+		goto out_cci_addr_fail;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;sensor-&gt;mutex);</div><div class='add'>+	rval = smiapp_update_mode(sensor);</div><div class='add'>+	mutex_unlock(&amp;sensor-&gt;mutex);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out_cci_addr_fail;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_cci_addr_fail:</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;xshutdown != SMIAPP_NO_XSHUTDOWN)</div><div class='add'>+		gpio_set_value(sensor-&gt;platform_data-&gt;xshutdown, 0);</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;set_xclk)</div><div class='add'>+		sensor-&gt;platform_data-&gt;set_xclk(&amp;sensor-&gt;src-&gt;sd, 0);</div><div class='add'>+	else</div><div class='add'>+		clk_disable(sensor-&gt;ext_clk);</div><div class='add'>+</div><div class='add'>+out_xclk_fail:</div><div class='add'>+	regulator_disable(sensor-&gt;vana);</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void smiapp_power_off(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Currently power/clock to lens are enable/disabled separately</div><div class='add'>+	 * but they are essentially the same signals. So if the sensor is</div><div class='add'>+	 * powered off while the lens is powered on the sensor does not</div><div class='add'>+	 * really see a power off and next time the cci address change</div><div class='add'>+	 * will fail. So do a soft reset explicitly here.</div><div class='add'>+	 */</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;i2c_addr_alt)</div><div class='add'>+		smiapp_write(sensor,</div><div class='add'>+			     SMIAPP_REG_U8_SOFTWARE_RESET,</div><div class='add'>+			     SMIAPP_SOFTWARE_RESET);</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;xshutdown != SMIAPP_NO_XSHUTDOWN)</div><div class='add'>+		gpio_set_value(sensor-&gt;platform_data-&gt;xshutdown, 0);</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;set_xclk)</div><div class='add'>+		sensor-&gt;platform_data-&gt;set_xclk(&amp;sensor-&gt;src-&gt;sd, 0);</div><div class='add'>+	else</div><div class='add'>+		clk_disable(sensor-&gt;ext_clk);</div><div class='add'>+	usleep_range(5000, 5000);</div><div class='add'>+	regulator_disable(sensor-&gt;vana);</div><div class='add'>+	sensor-&gt;streaming = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_set_power(struct v4l2_subdev *subdev, int on)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;sensor-&gt;power_mutex);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the power count is modified from 0 to != 0 or from != 0</div><div class='add'>+	 * to 0, update the power state.</div><div class='add'>+	 */</div><div class='add'>+	if (!sensor-&gt;power_count == !on)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (on) {</div><div class='add'>+		/* Power on and perform initialisation. */</div><div class='add'>+		ret = smiapp_power_on(sensor);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+	} else {</div><div class='add'>+		smiapp_power_off(sensor);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update the power count. */</div><div class='add'>+	sensor-&gt;power_count += on ? 1 : -1;</div><div class='add'>+	WARN_ON(sensor-&gt;power_count &lt; 0);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;sensor-&gt;power_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* -----------------------------------------------------------------------------</div><div class='add'>+ * Video stream management</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int smiapp_start_streaming(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;sensor-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U16_CSI_DATA_FORMAT,</div><div class='add'>+			    (sensor-&gt;csi_format-&gt;width &lt;&lt; 8) |</div><div class='add'>+			    sensor-&gt;csi_format-&gt;compressed);</div><div class='add'>+	if (rval)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_pll_configure(sensor);</div><div class='add'>+	if (rval)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Analog crop start coordinates */</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U16_X_ADDR_START,</div><div class='add'>+			    sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].left);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U16_Y_ADDR_START,</div><div class='add'>+			    sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].top);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Analog crop end coordinates */</div><div class='add'>+	rval = smiapp_write(</div><div class='add'>+		sensor, SMIAPP_REG_U16_X_ADDR_END,</div><div class='add'>+		sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].left</div><div class='add'>+		+ sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].width - 1);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(</div><div class='add'>+		sensor, SMIAPP_REG_U16_Y_ADDR_END,</div><div class='add'>+		sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].top</div><div class='add'>+		+ sensor-&gt;pixel_array-&gt;crop[SMIAPP_PA_PAD_SRC].height - 1);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Output from pixel array, including blanking, is set using</div><div class='add'>+	 * controls below. No need to set here.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* Digital crop */</div><div class='add'>+	if (sensor-&gt;limits[SMIAPP_LIMIT_DIGITAL_CROP_CAPABILITY]</div><div class='add'>+	    == SMIAPP_DIGITAL_CROP_CAPABILITY_INPUT_CROP) {</div><div class='add'>+		rval = smiapp_write(</div><div class='add'>+			sensor, SMIAPP_REG_U16_DIGITAL_CROP_X_OFFSET,</div><div class='add'>+			sensor-&gt;scaler-&gt;crop[SMIAPP_PAD_SINK].left);</div><div class='add'>+		if (rval &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		rval = smiapp_write(</div><div class='add'>+			sensor, SMIAPP_REG_U16_DIGITAL_CROP_Y_OFFSET,</div><div class='add'>+			sensor-&gt;scaler-&gt;crop[SMIAPP_PAD_SINK].top);</div><div class='add'>+		if (rval &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		rval = smiapp_write(</div><div class='add'>+			sensor, SMIAPP_REG_U16_DIGITAL_CROP_IMAGE_WIDTH,</div><div class='add'>+			sensor-&gt;scaler-&gt;crop[SMIAPP_PAD_SINK].width);</div><div class='add'>+		if (rval &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		rval = smiapp_write(</div><div class='add'>+			sensor, SMIAPP_REG_U16_DIGITAL_CROP_IMAGE_HEIGHT,</div><div class='add'>+			sensor-&gt;scaler-&gt;crop[SMIAPP_PAD_SINK].height);</div><div class='add'>+		if (rval &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Scaling */</div><div class='add'>+	if (sensor-&gt;limits[SMIAPP_LIMIT_SCALING_CAPABILITY]</div><div class='add'>+	    != SMIAPP_SCALING_CAPABILITY_NONE) {</div><div class='add'>+		rval = smiapp_write(sensor, SMIAPP_REG_U16_SCALING_MODE,</div><div class='add'>+				    sensor-&gt;scaling_mode);</div><div class='add'>+		if (rval &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		rval = smiapp_write(sensor, SMIAPP_REG_U16_SCALE_M,</div><div class='add'>+				    sensor-&gt;scale_m);</div><div class='add'>+		if (rval &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Output size from sensor */</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U16_X_OUTPUT_SIZE,</div><div class='add'>+			    sensor-&gt;src-&gt;crop[SMIAPP_PAD_SRC].width);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U16_Y_OUTPUT_SIZE,</div><div class='add'>+			    sensor-&gt;src-&gt;crop[SMIAPP_PAD_SRC].height);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if ((sensor-&gt;flash_capability &amp;</div><div class='add'>+	     (SMIAPP_FLASH_MODE_CAPABILITY_SINGLE_STROBE |</div><div class='add'>+	      SMIAPP_FLASH_MODE_CAPABILITY_MULTIPLE_STROBE)) &amp;&amp;</div><div class='add'>+	    sensor-&gt;platform_data-&gt;strobe_setup != NULL &amp;&amp;</div><div class='add'>+	    sensor-&gt;platform_data-&gt;strobe_setup-&gt;trigger != 0) {</div><div class='add'>+		rval = smiapp_setup_flash_strobe(sensor);</div><div class='add'>+		if (rval)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_call_quirk(sensor, pre_streamon);</div><div class='add'>+	if (rval) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "pre_streamon quirks failed\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U8_MODE_SELECT,</div><div class='add'>+			    SMIAPP_MODE_SELECT_STREAMING);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;sensor-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_stop_streaming(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;sensor-&gt;mutex);</div><div class='add'>+	rval = smiapp_write(sensor, SMIAPP_REG_U8_MODE_SELECT,</div><div class='add'>+			    SMIAPP_MODE_SELECT_SOFTWARE_STANDBY);</div><div class='add'>+	if (rval)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_call_quirk(sensor, post_streamoff);</div><div class='add'>+	if (rval)</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "post_streamoff quirks failed\n");</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;sensor-&gt;mutex);</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* -----------------------------------------------------------------------------</div><div class='add'>+ * V4L2 subdev video operations</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int smiapp_set_stream(struct v4l2_subdev *subdev, int enable)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;streaming == enable)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		sensor-&gt;streaming = 1;</div><div class='add'>+		rval = smiapp_start_streaming(sensor);</div><div class='add'>+		if (rval &lt; 0)</div><div class='add'>+			sensor-&gt;streaming = 0;</div><div class='add'>+	} else {</div><div class='add'>+		rval = smiapp_stop_streaming(sensor);</div><div class='add'>+		sensor-&gt;streaming = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_enum_mbus_code(struct v4l2_subdev *subdev,</div><div class='add'>+				 struct v4l2_subdev_fh *fh,</div><div class='add'>+				 struct v4l2_subdev_mbus_code_enum *code)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(subdev);</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int idx = -1;</div><div class='add'>+	int rval = -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;sensor-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	dev_err(&amp;client-&gt;dev, "subdev %s, pad %d, index %d\n",</div><div class='add'>+		subdev-&gt;name, code-&gt;pad, code-&gt;index);</div><div class='add'>+</div><div class='add'>+	if (subdev != &amp;sensor-&gt;src-&gt;sd || code-&gt;pad != SMIAPP_PAD_SRC) {</div><div class='add'>+		if (code-&gt;index)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		code-&gt;code = sensor-&gt;internal_csi_format-&gt;code;</div><div class='add'>+		rval = 0;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(smiapp_csi_data_formats); i++) {</div><div class='add'>+		if (sensor-&gt;mbus_frame_fmts &amp; (1 &lt;&lt; i))</div><div class='add'>+			idx++;</div><div class='add'>+</div><div class='add'>+		if (idx == code-&gt;index) {</div><div class='add'>+			code-&gt;code = smiapp_csi_data_formats[i].code;</div><div class='add'>+			dev_err(&amp;client-&gt;dev, "found index %d, i %d, code %x\n",</div><div class='add'>+				code-&gt;index, i, code-&gt;code);</div><div class='add'>+			rval = 0;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;sensor-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 __smiapp_get_mbus_code(struct v4l2_subdev *subdev,</div><div class='add'>+				  unsigned int pad)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+</div><div class='add'>+	if (subdev == &amp;sensor-&gt;src-&gt;sd &amp;&amp; pad == SMIAPP_PAD_SRC)</div><div class='add'>+		return sensor-&gt;csi_format-&gt;code;</div><div class='add'>+	else</div><div class='add'>+		return sensor-&gt;internal_csi_format-&gt;code;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __smiapp_get_format(struct v4l2_subdev *subdev,</div><div class='add'>+			       struct v4l2_subdev_fh *fh,</div><div class='add'>+			       struct v4l2_subdev_format *fmt)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_subdev *ssd = to_smiapp_subdev(subdev);</div><div class='add'>+</div><div class='add'>+	if (fmt-&gt;which == V4L2_SUBDEV_FORMAT_TRY) {</div><div class='add'>+		fmt-&gt;format = *v4l2_subdev_get_try_format(fh, fmt-&gt;pad);</div><div class='add'>+	} else {</div><div class='add'>+		struct v4l2_rect *r;</div><div class='add'>+</div><div class='add'>+		if (fmt-&gt;pad == ssd-&gt;source_pad)</div><div class='add'>+			r = &amp;ssd-&gt;crop[ssd-&gt;source_pad];</div><div class='add'>+		else</div><div class='add'>+			r = &amp;ssd-&gt;sink_fmt;</div><div class='add'>+</div><div class='add'>+		fmt-&gt;format.code = __smiapp_get_mbus_code(subdev, fmt-&gt;pad);</div><div class='add'>+		fmt-&gt;format.width = r-&gt;width;</div><div class='add'>+		fmt-&gt;format.height = r-&gt;height;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_get_format(struct v4l2_subdev *subdev,</div><div class='add'>+			     struct v4l2_subdev_fh *fh,</div><div class='add'>+			     struct v4l2_subdev_format *fmt)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;sensor-&gt;mutex);</div><div class='add'>+	rval = __smiapp_get_format(subdev, fh, fmt);</div><div class='add'>+	mutex_unlock(&amp;sensor-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void smiapp_get_crop_compose(struct v4l2_subdev *subdev,</div><div class='add'>+				    struct v4l2_subdev_fh *fh,</div><div class='add'>+				    struct v4l2_rect **crops,</div><div class='add'>+				    struct v4l2_rect **comps, int which)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_subdev *ssd = to_smiapp_subdev(subdev);</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	if (which == V4L2_SUBDEV_FORMAT_ACTIVE) {</div><div class='add'>+		if (crops)</div><div class='add'>+			for (i = 0; i &lt; subdev-&gt;entity.num_pads; i++)</div><div class='add'>+				crops[i] = &amp;ssd-&gt;crop[i];</div><div class='add'>+		if (comps)</div><div class='add'>+			*comps = &amp;ssd-&gt;compose;</div><div class='add'>+	} else {</div><div class='add'>+		if (crops) {</div><div class='add'>+			for (i = 0; i &lt; subdev-&gt;entity.num_pads; i++) {</div><div class='add'>+				crops[i] = v4l2_subdev_get_try_crop(fh, i);</div><div class='add'>+				BUG_ON(!crops[i]);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (comps) {</div><div class='add'>+			*comps = v4l2_subdev_get_try_compose(fh,</div><div class='add'>+							     SMIAPP_PAD_SINK);</div><div class='add'>+			BUG_ON(!*comps);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Changes require propagation only on sink pad. */</div><div class='add'>+static void smiapp_propagate(struct v4l2_subdev *subdev,</div><div class='add'>+			     struct v4l2_subdev_fh *fh, int which,</div><div class='add'>+			     int target)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	struct smiapp_subdev *ssd = to_smiapp_subdev(subdev);</div><div class='add'>+	struct v4l2_rect *comp, *crops[SMIAPP_PADS];</div><div class='add'>+</div><div class='add'>+	smiapp_get_crop_compose(subdev, fh, crops, &amp;comp, which);</div><div class='add'>+</div><div class='add'>+	switch (target) {</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL:</div><div class='add'>+		comp-&gt;width = crops[SMIAPP_PAD_SINK]-&gt;width;</div><div class='add'>+		comp-&gt;height = crops[SMIAPP_PAD_SINK]-&gt;height;</div><div class='add'>+		if (which == V4L2_SUBDEV_FORMAT_ACTIVE) {</div><div class='add'>+			if (ssd == sensor-&gt;scaler) {</div><div class='add'>+				sensor-&gt;scale_m =</div><div class='add'>+					sensor-&gt;limits[</div><div class='add'>+						SMIAPP_LIMIT_SCALER_N_MIN];</div><div class='add'>+				sensor-&gt;scaling_mode =</div><div class='add'>+					SMIAPP_SCALING_MODE_NONE;</div><div class='add'>+			} else if (ssd == sensor-&gt;binner) {</div><div class='add'>+				sensor-&gt;binning_horizontal = 1;</div><div class='add'>+				sensor-&gt;binning_vertical = 1;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		/* Fall through */</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_COMPOSE_ACTUAL:</div><div class='add'>+		*crops[SMIAPP_PAD_SRC] = *comp;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct smiapp_csi_data_format</div><div class='add'>+*smiapp_validate_csi_data_format(struct smiapp_sensor *sensor, u32 code)</div><div class='add'>+{</div><div class='add'>+	const struct smiapp_csi_data_format *csi_format = sensor-&gt;csi_format;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(smiapp_csi_data_formats); i++) {</div><div class='add'>+		if (sensor-&gt;mbus_frame_fmts &amp; (1 &lt;&lt; i)</div><div class='add'>+		    &amp;&amp; smiapp_csi_data_formats[i].code == code)</div><div class='add'>+			return &amp;smiapp_csi_data_formats[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return csi_format;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_set_format(struct v4l2_subdev *subdev,</div><div class='add'>+			     struct v4l2_subdev_fh *fh,</div><div class='add'>+			     struct v4l2_subdev_format *fmt)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	struct smiapp_subdev *ssd = to_smiapp_subdev(subdev);</div><div class='add'>+	struct v4l2_rect *crops[SMIAPP_PADS];</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;sensor-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Media bus code is changeable on src subdev's source pad. On</div><div class='add'>+	 * other source pads we just get format here.</div><div class='add'>+	 */</div><div class='add'>+	if (fmt-&gt;pad == ssd-&gt;source_pad) {</div><div class='add'>+		u32 code = fmt-&gt;format.code;</div><div class='add'>+		int rval = __smiapp_get_format(subdev, fh, fmt);</div><div class='add'>+</div><div class='add'>+		if (!rval &amp;&amp; subdev == &amp;sensor-&gt;src-&gt;sd) {</div><div class='add'>+			const struct smiapp_csi_data_format *csi_format =</div><div class='add'>+				smiapp_validate_csi_data_format(sensor, code);</div><div class='add'>+			if (fmt-&gt;which == V4L2_SUBDEV_FORMAT_ACTIVE)</div><div class='add'>+				sensor-&gt;csi_format = csi_format;</div><div class='add'>+			fmt-&gt;format.code = csi_format-&gt;code;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mutex_unlock(&amp;sensor-&gt;mutex);</div><div class='add'>+		return rval;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Sink pad. Width and height are changeable here. */</div><div class='add'>+	fmt-&gt;format.code = __smiapp_get_mbus_code(subdev, fmt-&gt;pad);</div><div class='add'>+	fmt-&gt;format.width &amp;= ~1;</div><div class='add'>+	fmt-&gt;format.height &amp;= ~1;</div><div class='add'>+</div><div class='add'>+	fmt-&gt;format.width =</div><div class='add'>+		clamp(fmt-&gt;format.width,</div><div class='add'>+		      sensor-&gt;limits[SMIAPP_LIMIT_MIN_X_OUTPUT_SIZE],</div><div class='add'>+		      sensor-&gt;limits[SMIAPP_LIMIT_MAX_X_OUTPUT_SIZE]);</div><div class='add'>+	fmt-&gt;format.height =</div><div class='add'>+		clamp(fmt-&gt;format.height,</div><div class='add'>+		      sensor-&gt;limits[SMIAPP_LIMIT_MIN_Y_OUTPUT_SIZE],</div><div class='add'>+		      sensor-&gt;limits[SMIAPP_LIMIT_MAX_Y_OUTPUT_SIZE]);</div><div class='add'>+</div><div class='add'>+	smiapp_get_crop_compose(subdev, fh, crops, NULL, fmt-&gt;which);</div><div class='add'>+</div><div class='add'>+	crops[ssd-&gt;sink_pad]-&gt;left = 0;</div><div class='add'>+	crops[ssd-&gt;sink_pad]-&gt;top = 0;</div><div class='add'>+	crops[ssd-&gt;sink_pad]-&gt;width = fmt-&gt;format.width;</div><div class='add'>+	crops[ssd-&gt;sink_pad]-&gt;height = fmt-&gt;format.height;</div><div class='add'>+	if (fmt-&gt;which == V4L2_SUBDEV_FORMAT_ACTIVE)</div><div class='add'>+		ssd-&gt;sink_fmt = *crops[ssd-&gt;sink_pad];</div><div class='add'>+	smiapp_propagate(subdev, fh, fmt-&gt;which,</div><div class='add'>+			 V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;sensor-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Calculate goodness of scaled image size compared to expected image</div><div class='add'>+ * size and flags provided.</div><div class='add'>+ */</div><div class='add'>+#define SCALING_GOODNESS		100000</div><div class='add'>+#define SCALING_GOODNESS_EXTREME	100000000</div><div class='add'>+static int scaling_goodness(struct v4l2_subdev *subdev, int w, int ask_w,</div><div class='add'>+			    int h, int ask_h, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(subdev);</div><div class='add'>+	int val = 0;</div><div class='add'>+</div><div class='add'>+	w &amp;= ~1;</div><div class='add'>+	ask_w &amp;= ~1;</div><div class='add'>+	h &amp;= ~1;</div><div class='add'>+	ask_h &amp;= ~1;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; V4L2_SUBDEV_SEL_FLAG_SIZE_GE) {</div><div class='add'>+		if (w &lt; ask_w)</div><div class='add'>+			val -= SCALING_GOODNESS;</div><div class='add'>+		if (h &lt; ask_h)</div><div class='add'>+			val -= SCALING_GOODNESS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; V4L2_SUBDEV_SEL_FLAG_SIZE_LE) {</div><div class='add'>+		if (w &gt; ask_w)</div><div class='add'>+			val -= SCALING_GOODNESS;</div><div class='add'>+		if (h &gt; ask_h)</div><div class='add'>+			val -= SCALING_GOODNESS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val -= abs(w - ask_w);</div><div class='add'>+	val -= abs(h - ask_h);</div><div class='add'>+</div><div class='add'>+	if (w &lt; sensor-&gt;limits[SMIAPP_LIMIT_MIN_X_OUTPUT_SIZE])</div><div class='add'>+		val -= SCALING_GOODNESS_EXTREME;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "w %d ask_w %d h %d ask_h %d goodness %d\n",</div><div class='add'>+		w, ask_h, h, ask_h, val);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void smiapp_set_compose_binner(struct v4l2_subdev *subdev,</div><div class='add'>+				      struct v4l2_subdev_fh *fh,</div><div class='add'>+				      struct v4l2_subdev_selection *sel,</div><div class='add'>+				      struct v4l2_rect **crops,</div><div class='add'>+				      struct v4l2_rect *comp)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	unsigned int i;</div><div class='add'>+	unsigned int binh = 1, binv = 1;</div><div class='add'>+	unsigned int best = scaling_goodness(</div><div class='add'>+		subdev,</div><div class='add'>+		crops[SMIAPP_PAD_SINK]-&gt;width, sel-&gt;r.width,</div><div class='add'>+		crops[SMIAPP_PAD_SINK]-&gt;height, sel-&gt;r.height, sel-&gt;flags);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sensor-&gt;nbinning_subtypes; i++) {</div><div class='add'>+		int this = scaling_goodness(</div><div class='add'>+			subdev,</div><div class='add'>+			crops[SMIAPP_PAD_SINK]-&gt;width</div><div class='add'>+			/ sensor-&gt;binning_subtypes[i].horizontal,</div><div class='add'>+			sel-&gt;r.width,</div><div class='add'>+			crops[SMIAPP_PAD_SINK]-&gt;height</div><div class='add'>+			/ sensor-&gt;binning_subtypes[i].vertical,</div><div class='add'>+			sel-&gt;r.height, sel-&gt;flags);</div><div class='add'>+</div><div class='add'>+		if (this &gt; best) {</div><div class='add'>+			binh = sensor-&gt;binning_subtypes[i].horizontal;</div><div class='add'>+			binv = sensor-&gt;binning_subtypes[i].vertical;</div><div class='add'>+			best = this;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (sel-&gt;which == V4L2_SUBDEV_FORMAT_ACTIVE) {</div><div class='add'>+		sensor-&gt;binning_vertical = binv;</div><div class='add'>+		sensor-&gt;binning_horizontal = binh;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sel-&gt;r.width = (crops[SMIAPP_PAD_SINK]-&gt;width / binh) &amp; ~1;</div><div class='add'>+	sel-&gt;r.height = (crops[SMIAPP_PAD_SINK]-&gt;height / binv) &amp; ~1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Calculate best scaling ratio and mode for given output resolution.</div><div class='add'>+ *</div><div class='add'>+ * Try all of these: horizontal ratio, vertical ratio and smallest</div><div class='add'>+ * size possible (horizontally).</div><div class='add'>+ *</div><div class='add'>+ * Also try whether horizontal scaler or full scaler gives a better</div><div class='add'>+ * result.</div><div class='add'>+ */</div><div class='add'>+static void smiapp_set_compose_scaler(struct v4l2_subdev *subdev,</div><div class='add'>+				      struct v4l2_subdev_fh *fh,</div><div class='add'>+				      struct v4l2_subdev_selection *sel,</div><div class='add'>+				      struct v4l2_rect **crops,</div><div class='add'>+				      struct v4l2_rect *comp)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(subdev);</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	u32 min, max, a, b, max_m;</div><div class='add'>+	u32 scale_m = sensor-&gt;limits[SMIAPP_LIMIT_SCALER_N_MIN];</div><div class='add'>+	int mode = SMIAPP_SCALING_MODE_HORIZONTAL;</div><div class='add'>+	u32 try[4];</div><div class='add'>+	u32 ntry = 0;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int best = INT_MIN;</div><div class='add'>+</div><div class='add'>+	sel-&gt;r.width = min_t(unsigned int, sel-&gt;r.width,</div><div class='add'>+			     crops[SMIAPP_PAD_SINK]-&gt;width);</div><div class='add'>+	sel-&gt;r.height = min_t(unsigned int, sel-&gt;r.height,</div><div class='add'>+			      crops[SMIAPP_PAD_SINK]-&gt;height);</div><div class='add'>+</div><div class='add'>+	a = crops[SMIAPP_PAD_SINK]-&gt;width</div><div class='add'>+		* sensor-&gt;limits[SMIAPP_LIMIT_SCALER_N_MIN] / sel-&gt;r.width;</div><div class='add'>+	b = crops[SMIAPP_PAD_SINK]-&gt;height</div><div class='add'>+		* sensor-&gt;limits[SMIAPP_LIMIT_SCALER_N_MIN] / sel-&gt;r.height;</div><div class='add'>+	max_m = crops[SMIAPP_PAD_SINK]-&gt;width</div><div class='add'>+		* sensor-&gt;limits[SMIAPP_LIMIT_SCALER_N_MIN]</div><div class='add'>+		/ sensor-&gt;limits[SMIAPP_LIMIT_MIN_X_OUTPUT_SIZE];</div><div class='add'>+</div><div class='add'>+	a = min(sensor-&gt;limits[SMIAPP_LIMIT_SCALER_M_MAX],</div><div class='add'>+		max(a, sensor-&gt;limits[SMIAPP_LIMIT_SCALER_M_MIN]));</div><div class='add'>+	b = min(sensor-&gt;limits[SMIAPP_LIMIT_SCALER_M_MAX],</div><div class='add'>+		max(b, sensor-&gt;limits[SMIAPP_LIMIT_SCALER_M_MIN]));</div><div class='add'>+	max_m = min(sensor-&gt;limits[SMIAPP_LIMIT_SCALER_M_MAX],</div><div class='add'>+		    max(max_m, sensor-&gt;limits[SMIAPP_LIMIT_SCALER_M_MIN]));</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "scaling: a %d b %d max_m %d\n", a, b, max_m);</div><div class='add'>+</div><div class='add'>+	min = min(max_m, min(a, b));</div><div class='add'>+	max = min(max_m, max(a, b));</div><div class='add'>+</div><div class='add'>+	try[ntry] = min;</div><div class='add'>+	ntry++;</div><div class='add'>+	if (min != max) {</div><div class='add'>+		try[ntry] = max;</div><div class='add'>+		ntry++;</div><div class='add'>+	}</div><div class='add'>+	if (max != max_m) {</div><div class='add'>+		try[ntry] = min + 1;</div><div class='add'>+		ntry++;</div><div class='add'>+		if (min != max) {</div><div class='add'>+			try[ntry] = max + 1;</div><div class='add'>+			ntry++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ntry; i++) {</div><div class='add'>+		int this = scaling_goodness(</div><div class='add'>+			subdev,</div><div class='add'>+			crops[SMIAPP_PAD_SINK]-&gt;width</div><div class='add'>+			/ try[i]</div><div class='add'>+			* sensor-&gt;limits[SMIAPP_LIMIT_SCALER_N_MIN],</div><div class='add'>+			sel-&gt;r.width,</div><div class='add'>+			crops[SMIAPP_PAD_SINK]-&gt;height,</div><div class='add'>+			sel-&gt;r.height,</div><div class='add'>+			sel-&gt;flags);</div><div class='add'>+</div><div class='add'>+		dev_dbg(&amp;client-&gt;dev, "trying factor %d (%d)\n", try[i], i);</div><div class='add'>+</div><div class='add'>+		if (this &gt; best) {</div><div class='add'>+			scale_m = try[i];</div><div class='add'>+			mode = SMIAPP_SCALING_MODE_HORIZONTAL;</div><div class='add'>+			best = this;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (sensor-&gt;limits[SMIAPP_LIMIT_SCALING_CAPABILITY]</div><div class='add'>+		    == SMIAPP_SCALING_CAPABILITY_HORIZONTAL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		this = scaling_goodness(</div><div class='add'>+			subdev, crops[SMIAPP_PAD_SINK]-&gt;width</div><div class='add'>+			/ try[i]</div><div class='add'>+			* sensor-&gt;limits[SMIAPP_LIMIT_SCALER_N_MIN],</div><div class='add'>+			sel-&gt;r.width,</div><div class='add'>+			crops[SMIAPP_PAD_SINK]-&gt;height</div><div class='add'>+			/ try[i]</div><div class='add'>+			* sensor-&gt;limits[SMIAPP_LIMIT_SCALER_N_MIN],</div><div class='add'>+			sel-&gt;r.height,</div><div class='add'>+			sel-&gt;flags);</div><div class='add'>+</div><div class='add'>+		if (this &gt; best) {</div><div class='add'>+			scale_m = try[i];</div><div class='add'>+			mode = SMIAPP_SCALING_MODE_BOTH;</div><div class='add'>+			best = this;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sel-&gt;r.width =</div><div class='add'>+		(crops[SMIAPP_PAD_SINK]-&gt;width</div><div class='add'>+		 / scale_m</div><div class='add'>+		 * sensor-&gt;limits[SMIAPP_LIMIT_SCALER_N_MIN]) &amp; ~1;</div><div class='add'>+	if (mode == SMIAPP_SCALING_MODE_BOTH)</div><div class='add'>+		sel-&gt;r.height =</div><div class='add'>+			(crops[SMIAPP_PAD_SINK]-&gt;height</div><div class='add'>+			 / scale_m</div><div class='add'>+			 * sensor-&gt;limits[SMIAPP_LIMIT_SCALER_N_MIN])</div><div class='add'>+			&amp; ~1;</div><div class='add'>+	else</div><div class='add'>+		sel-&gt;r.height = crops[SMIAPP_PAD_SINK]-&gt;height;</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;which == V4L2_SUBDEV_FORMAT_ACTIVE) {</div><div class='add'>+		sensor-&gt;scale_m = scale_m;</div><div class='add'>+		sensor-&gt;scaling_mode = mode;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+/* We're only called on source pads. This function sets scaling. */</div><div class='add'>+static int smiapp_set_compose(struct v4l2_subdev *subdev,</div><div class='add'>+			      struct v4l2_subdev_fh *fh,</div><div class='add'>+			      struct v4l2_subdev_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	struct smiapp_subdev *ssd = to_smiapp_subdev(subdev);</div><div class='add'>+	struct v4l2_rect *comp, *crops[SMIAPP_PADS];</div><div class='add'>+</div><div class='add'>+	smiapp_get_crop_compose(subdev, fh, crops, &amp;comp, sel-&gt;which);</div><div class='add'>+</div><div class='add'>+	sel-&gt;r.top = 0;</div><div class='add'>+	sel-&gt;r.left = 0;</div><div class='add'>+</div><div class='add'>+	if (ssd == sensor-&gt;binner)</div><div class='add'>+		smiapp_set_compose_binner(subdev, fh, sel, crops, comp);</div><div class='add'>+	else</div><div class='add'>+		smiapp_set_compose_scaler(subdev, fh, sel, crops, comp);</div><div class='add'>+</div><div class='add'>+	*comp = sel-&gt;r;</div><div class='add'>+	smiapp_propagate(subdev, fh, sel-&gt;which,</div><div class='add'>+			 V4L2_SUBDEV_SEL_TGT_COMPOSE_ACTUAL);</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;which == V4L2_SUBDEV_FORMAT_ACTIVE)</div><div class='add'>+		return smiapp_update_mode(sensor);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __smiapp_sel_supported(struct v4l2_subdev *subdev,</div><div class='add'>+				  struct v4l2_subdev_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	struct smiapp_subdev *ssd = to_smiapp_subdev(subdev);</div><div class='add'>+</div><div class='add'>+	/* We only implement crop in three places. */</div><div class='add'>+	switch (sel-&gt;target) {</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL:</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS:</div><div class='add'>+		if (ssd == sensor-&gt;pixel_array</div><div class='add'>+		    &amp;&amp; sel-&gt;pad == SMIAPP_PA_PAD_SRC)</div><div class='add'>+			return 0;</div><div class='add'>+		if (ssd == sensor-&gt;src</div><div class='add'>+		    &amp;&amp; sel-&gt;pad == SMIAPP_PAD_SRC)</div><div class='add'>+			return 0;</div><div class='add'>+		if (ssd == sensor-&gt;scaler</div><div class='add'>+		    &amp;&amp; sel-&gt;pad == SMIAPP_PAD_SINK</div><div class='add'>+		    &amp;&amp; sensor-&gt;limits[SMIAPP_LIMIT_DIGITAL_CROP_CAPABILITY]</div><div class='add'>+		    == SMIAPP_DIGITAL_CROP_CAPABILITY_INPUT_CROP)</div><div class='add'>+			return 0;</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_COMPOSE_ACTUAL:</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_COMPOSE_BOUNDS:</div><div class='add'>+		if (sel-&gt;pad == ssd-&gt;source_pad)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		if (ssd == sensor-&gt;binner)</div><div class='add'>+			return 0;</div><div class='add'>+		if (ssd == sensor-&gt;scaler</div><div class='add'>+		    &amp;&amp; sensor-&gt;limits[SMIAPP_LIMIT_SCALING_CAPABILITY]</div><div class='add'>+		    != SMIAPP_SCALING_CAPABILITY_NONE)</div><div class='add'>+			return 0;</div><div class='add'>+		/* Fall through */</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_set_crop(struct v4l2_subdev *subdev,</div><div class='add'>+			   struct v4l2_subdev_fh *fh,</div><div class='add'>+			   struct v4l2_subdev_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	struct smiapp_subdev *ssd = to_smiapp_subdev(subdev);</div><div class='add'>+	struct v4l2_rect *src_size, *crops[SMIAPP_PADS];</div><div class='add'>+	struct v4l2_rect _r;</div><div class='add'>+</div><div class='add'>+	smiapp_get_crop_compose(subdev, fh, crops, NULL, sel-&gt;which);</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;which == V4L2_SUBDEV_FORMAT_ACTIVE) {</div><div class='add'>+		if (sel-&gt;pad == ssd-&gt;sink_pad)</div><div class='add'>+			src_size = &amp;ssd-&gt;sink_fmt;</div><div class='add'>+		else</div><div class='add'>+			src_size = &amp;ssd-&gt;compose;</div><div class='add'>+	} else {</div><div class='add'>+		if (sel-&gt;pad == ssd-&gt;sink_pad) {</div><div class='add'>+			_r.left = 0;</div><div class='add'>+			_r.top = 0;</div><div class='add'>+			_r.width = v4l2_subdev_get_try_format(fh, sel-&gt;pad)</div><div class='add'>+				-&gt;width;</div><div class='add'>+			_r.height = v4l2_subdev_get_try_format(fh, sel-&gt;pad)</div><div class='add'>+				-&gt;height;</div><div class='add'>+			src_size = &amp;_r;</div><div class='add'>+		} else {</div><div class='add'>+			src_size =</div><div class='add'>+				v4l2_subdev_get_try_compose(</div><div class='add'>+					fh, ssd-&gt;sink_pad);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ssd == sensor-&gt;src &amp;&amp; sel-&gt;pad == SMIAPP_PAD_SRC) {</div><div class='add'>+		sel-&gt;r.left = 0;</div><div class='add'>+		sel-&gt;r.top = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sel-&gt;r.width = min(sel-&gt;r.width, src_size-&gt;width);</div><div class='add'>+	sel-&gt;r.height = min(sel-&gt;r.height, src_size-&gt;height);</div><div class='add'>+</div><div class='add'>+	sel-&gt;r.left = min(sel-&gt;r.left, src_size-&gt;width - sel-&gt;r.width);</div><div class='add'>+	sel-&gt;r.top = min(sel-&gt;r.top, src_size-&gt;height - sel-&gt;r.height);</div><div class='add'>+</div><div class='add'>+	*crops[sel-&gt;pad] = sel-&gt;r;</div><div class='add'>+</div><div class='add'>+	if (ssd != sensor-&gt;pixel_array &amp;&amp; sel-&gt;pad == SMIAPP_PAD_SINK)</div><div class='add'>+		smiapp_propagate(subdev, fh, sel-&gt;which,</div><div class='add'>+				 V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __smiapp_get_selection(struct v4l2_subdev *subdev,</div><div class='add'>+				  struct v4l2_subdev_fh *fh,</div><div class='add'>+				  struct v4l2_subdev_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	struct smiapp_subdev *ssd = to_smiapp_subdev(subdev);</div><div class='add'>+	struct v4l2_rect *comp, *crops[SMIAPP_PADS];</div><div class='add'>+	struct v4l2_rect sink_fmt;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = __smiapp_sel_supported(subdev, sel);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	smiapp_get_crop_compose(subdev, fh, crops, &amp;comp, sel-&gt;which);</div><div class='add'>+</div><div class='add'>+	if (sel-&gt;which == V4L2_SUBDEV_FORMAT_ACTIVE) {</div><div class='add'>+		sink_fmt = ssd-&gt;sink_fmt;</div><div class='add'>+	} else {</div><div class='add'>+		struct v4l2_mbus_framefmt *fmt =</div><div class='add'>+			v4l2_subdev_get_try_format(fh, ssd-&gt;sink_pad);</div><div class='add'>+</div><div class='add'>+		sink_fmt.left = 0;</div><div class='add'>+		sink_fmt.top = 0;</div><div class='add'>+		sink_fmt.width = fmt-&gt;width;</div><div class='add'>+		sink_fmt.height = fmt-&gt;height;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (sel-&gt;target) {</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS:</div><div class='add'>+		if (ssd == sensor-&gt;pixel_array) {</div><div class='add'>+			sel-&gt;r.width =</div><div class='add'>+				sensor-&gt;limits[SMIAPP_LIMIT_X_ADDR_MAX] + 1;</div><div class='add'>+			sel-&gt;r.height =</div><div class='add'>+				sensor-&gt;limits[SMIAPP_LIMIT_Y_ADDR_MAX] + 1;</div><div class='add'>+		} else if (sel-&gt;pad == ssd-&gt;sink_pad) {</div><div class='add'>+			sel-&gt;r = sink_fmt;</div><div class='add'>+		} else {</div><div class='add'>+			sel-&gt;r = *comp;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL:</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_COMPOSE_BOUNDS:</div><div class='add'>+		sel-&gt;r = *crops[sel-&gt;pad];</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_COMPOSE_ACTUAL:</div><div class='add'>+		sel-&gt;r = *comp;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_get_selection(struct v4l2_subdev *subdev,</div><div class='add'>+				struct v4l2_subdev_fh *fh,</div><div class='add'>+				struct v4l2_subdev_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;sensor-&gt;mutex);</div><div class='add'>+	rval = __smiapp_get_selection(subdev, fh, sel);</div><div class='add'>+	mutex_unlock(&amp;sensor-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+static int smiapp_set_selection(struct v4l2_subdev *subdev,</div><div class='add'>+				struct v4l2_subdev_fh *fh,</div><div class='add'>+				struct v4l2_subdev_selection *sel)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = __smiapp_sel_supported(subdev, sel);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;sensor-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	sel-&gt;r.left = max(0, sel-&gt;r.left &amp; ~1);</div><div class='add'>+	sel-&gt;r.top = max(0, sel-&gt;r.top &amp; ~1);</div><div class='add'>+	sel-&gt;r.width = max(0, SMIAPP_ALIGN_DIM(sel-&gt;r.width, sel-&gt;flags));</div><div class='add'>+	sel-&gt;r.height = max(0, SMIAPP_ALIGN_DIM(sel-&gt;r.height, sel-&gt;flags));</div><div class='add'>+</div><div class='add'>+	sel-&gt;r.width = max_t(unsigned int,</div><div class='add'>+			     sensor-&gt;limits[SMIAPP_LIMIT_MIN_X_OUTPUT_SIZE],</div><div class='add'>+			     sel-&gt;r.width);</div><div class='add'>+	sel-&gt;r.height = max_t(unsigned int,</div><div class='add'>+			      sensor-&gt;limits[SMIAPP_LIMIT_MIN_Y_OUTPUT_SIZE],</div><div class='add'>+			      sel-&gt;r.height);</div><div class='add'>+</div><div class='add'>+	switch (sel-&gt;target) {</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL:</div><div class='add'>+		ret = smiapp_set_crop(subdev, fh, sel);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_SUBDEV_SEL_TGT_COMPOSE_ACTUAL:</div><div class='add'>+		ret = smiapp_set_compose(subdev, fh, sel);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;sensor-&gt;mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_get_skip_frames(struct v4l2_subdev *subdev, u32 *frames)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+</div><div class='add'>+	*frames = sensor-&gt;frame_skip;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* -----------------------------------------------------------------------------</div><div class='add'>+ * sysfs attributes</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+smiapp_sysfs_nvm_read(struct device *dev, struct device_attribute *attr,</div><div class='add'>+		      char *buf)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subdev *subdev = i2c_get_clientdata(to_i2c_client(dev));</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(subdev);</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	unsigned int nbytes;</div><div class='add'>+</div><div class='add'>+	if (!sensor-&gt;dev_init_done)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (!sensor-&gt;nvm_size) {</div><div class='add'>+		/* NVM not read yet - read it now */</div><div class='add'>+		sensor-&gt;nvm_size = sensor-&gt;platform_data-&gt;nvm_size;</div><div class='add'>+		if (smiapp_set_power(subdev, 1) &lt; 0)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		if (smiapp_read_nvm(sensor, sensor-&gt;nvm)) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev, "nvm read failed\n");</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+		smiapp_set_power(subdev, 0);</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * NVM is still way below a PAGE_SIZE, so we can safely</div><div class='add'>+	 * assume this for now.</div><div class='add'>+	 */</div><div class='add'>+	nbytes = min_t(unsigned int, sensor-&gt;nvm_size, PAGE_SIZE);</div><div class='add'>+	memcpy(buf, sensor-&gt;nvm, nbytes);</div><div class='add'>+</div><div class='add'>+	return nbytes;</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR(nvm, S_IRUGO, smiapp_sysfs_nvm_read, NULL);</div><div class='add'>+</div><div class='add'>+/* -----------------------------------------------------------------------------</div><div class='add'>+ * V4L2 subdev core operations</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int smiapp_identify_module(struct v4l2_subdev *subdev)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(subdev);</div><div class='add'>+	struct smiapp_module_info *minfo = &amp;sensor-&gt;minfo;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int rval = 0;</div><div class='add'>+</div><div class='add'>+	minfo-&gt;name = SMIAPP_NAME;</div><div class='add'>+</div><div class='add'>+	/* Module info */</div><div class='add'>+	rval = smiapp_read_8only(sensor, SMIAPP_REG_U8_MANUFACTURER_ID,</div><div class='add'>+				 &amp;minfo-&gt;manufacturer_id);</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = smiapp_read_8only(sensor, SMIAPP_REG_U16_MODEL_ID,</div><div class='add'>+					 &amp;minfo-&gt;model_id);</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = smiapp_read_8only(sensor,</div><div class='add'>+					 SMIAPP_REG_U8_REVISION_NUMBER_MAJOR,</div><div class='add'>+					 &amp;minfo-&gt;revision_number_major);</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = smiapp_read_8only(sensor,</div><div class='add'>+					 SMIAPP_REG_U8_REVISION_NUMBER_MINOR,</div><div class='add'>+					 &amp;minfo-&gt;revision_number_minor);</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = smiapp_read_8only(sensor,</div><div class='add'>+					 SMIAPP_REG_U8_MODULE_DATE_YEAR,</div><div class='add'>+					 &amp;minfo-&gt;module_year);</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = smiapp_read_8only(sensor,</div><div class='add'>+					 SMIAPP_REG_U8_MODULE_DATE_MONTH,</div><div class='add'>+					 &amp;minfo-&gt;module_month);</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = smiapp_read_8only(sensor, SMIAPP_REG_U8_MODULE_DATE_DAY,</div><div class='add'>+					 &amp;minfo-&gt;module_day);</div><div class='add'>+</div><div class='add'>+	/* Sensor info */</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = smiapp_read_8only(sensor,</div><div class='add'>+					 SMIAPP_REG_U8_SENSOR_MANUFACTURER_ID,</div><div class='add'>+					 &amp;minfo-&gt;sensor_manufacturer_id);</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = smiapp_read_8only(sensor,</div><div class='add'>+					 SMIAPP_REG_U16_SENSOR_MODEL_ID,</div><div class='add'>+					 &amp;minfo-&gt;sensor_model_id);</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = smiapp_read_8only(sensor,</div><div class='add'>+					 SMIAPP_REG_U8_SENSOR_REVISION_NUMBER,</div><div class='add'>+					 &amp;minfo-&gt;sensor_revision_number);</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = smiapp_read_8only(sensor,</div><div class='add'>+					 SMIAPP_REG_U8_SENSOR_FIRMWARE_VERSION,</div><div class='add'>+					 &amp;minfo-&gt;sensor_firmware_version);</div><div class='add'>+</div><div class='add'>+	/* SMIA */</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = smiapp_read_8only(sensor, SMIAPP_REG_U8_SMIA_VERSION,</div><div class='add'>+					 &amp;minfo-&gt;smia_version);</div><div class='add'>+	if (!rval)</div><div class='add'>+		rval = smiapp_read_8only(sensor, SMIAPP_REG_U8_SMIAPP_VERSION,</div><div class='add'>+					 &amp;minfo-&gt;smiapp_version);</div><div class='add'>+</div><div class='add'>+	if (rval) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "sensor detection failed\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "module 0x%2.2x-0x%4.4x\n",</div><div class='add'>+		minfo-&gt;manufacturer_id, minfo-&gt;model_id);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev,</div><div class='add'>+		"module revision 0x%2.2x-0x%2.2x date %2.2d-%2.2d-%2.2d\n",</div><div class='add'>+		minfo-&gt;revision_number_major, minfo-&gt;revision_number_minor,</div><div class='add'>+		minfo-&gt;module_year, minfo-&gt;module_month, minfo-&gt;module_day);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "sensor 0x%2.2x-0x%4.4x\n",</div><div class='add'>+		minfo-&gt;sensor_manufacturer_id, minfo-&gt;sensor_model_id);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev,</div><div class='add'>+		"sensor revision 0x%2.2x firmware version 0x%2.2x\n",</div><div class='add'>+		minfo-&gt;sensor_revision_number, minfo-&gt;sensor_firmware_version);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "smia version %2.2d smiapp version %2.2d\n",</div><div class='add'>+		minfo-&gt;smia_version, minfo-&gt;smiapp_version);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Some modules have bad data in the lvalues below. Hope the</div><div class='add'>+	 * rvalues have better stuff. The lvalues are module</div><div class='add'>+	 * parameters whereas the rvalues are sensor parameters.</div><div class='add'>+	 */</div><div class='add'>+	if (!minfo-&gt;manufacturer_id &amp;&amp; !minfo-&gt;model_id) {</div><div class='add'>+		minfo-&gt;manufacturer_id = minfo-&gt;sensor_manufacturer_id;</div><div class='add'>+		minfo-&gt;model_id = minfo-&gt;sensor_model_id;</div><div class='add'>+		minfo-&gt;revision_number_major = minfo-&gt;sensor_revision_number;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(smiapp_module_idents); i++) {</div><div class='add'>+		if (smiapp_module_idents[i].manufacturer_id</div><div class='add'>+		    != minfo-&gt;manufacturer_id)</div><div class='add'>+			continue;</div><div class='add'>+		if (smiapp_module_idents[i].model_id != minfo-&gt;model_id)</div><div class='add'>+			continue;</div><div class='add'>+		if (smiapp_module_idents[i].flags</div><div class='add'>+		    &amp; SMIAPP_MODULE_IDENT_FLAG_REV_LE) {</div><div class='add'>+			if (smiapp_module_idents[i].revision_number_major</div><div class='add'>+			    &lt; minfo-&gt;revision_number_major)</div><div class='add'>+				continue;</div><div class='add'>+		} else {</div><div class='add'>+			if (smiapp_module_idents[i].revision_number_major</div><div class='add'>+			    != minfo-&gt;revision_number_major)</div><div class='add'>+				continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		minfo-&gt;name = smiapp_module_idents[i].name;</div><div class='add'>+		minfo-&gt;quirk = smiapp_module_idents[i].quirk;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i &gt;= ARRAY_SIZE(smiapp_module_idents))</div><div class='add'>+		dev_warn(&amp;client-&gt;dev,</div><div class='add'>+			 "no quirks for this module; let's hope it's fully compliant\n");</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "the sensor is called %s, ident %2.2x%4.4x%2.2x\n",</div><div class='add'>+		minfo-&gt;name, minfo-&gt;manufacturer_id, minfo-&gt;model_id,</div><div class='add'>+		minfo-&gt;revision_number_major);</div><div class='add'>+</div><div class='add'>+	strlcpy(subdev-&gt;name, sensor-&gt;minfo.name, sizeof(subdev-&gt;name));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_ops smiapp_ops;</div><div class='add'>+static const struct v4l2_subdev_internal_ops smiapp_internal_ops;</div><div class='add'>+static const struct media_entity_operations smiapp_entity_ops;</div><div class='add'>+</div><div class='add'>+static int smiapp_registered(struct v4l2_subdev *subdev)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(subdev);</div><div class='add'>+	struct smiapp_subdev *last = NULL;</div><div class='add'>+	u32 tmp;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	sensor-&gt;vana = regulator_get(&amp;client-&gt;dev, "VANA");</div><div class='add'>+	if (IS_ERR(sensor-&gt;vana)) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "could not get regulator for vana\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!sensor-&gt;platform_data-&gt;set_xclk) {</div><div class='add'>+		sensor-&gt;ext_clk = clk_get(&amp;client-&gt;dev,</div><div class='add'>+					  sensor-&gt;platform_data-&gt;ext_clk_name);</div><div class='add'>+		if (IS_ERR(sensor-&gt;ext_clk)) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev, "could not get clock %s\n",</div><div class='add'>+				sensor-&gt;platform_data-&gt;ext_clk_name);</div><div class='add'>+			rval = -ENODEV;</div><div class='add'>+			goto out_clk_get;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rval = clk_set_rate(sensor-&gt;ext_clk,</div><div class='add'>+				    sensor-&gt;platform_data-&gt;ext_clk);</div><div class='add'>+		if (rval &lt; 0) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev,</div><div class='add'>+				"unable to set clock %s freq to %u\n",</div><div class='add'>+				sensor-&gt;platform_data-&gt;ext_clk_name,</div><div class='add'>+				sensor-&gt;platform_data-&gt;ext_clk);</div><div class='add'>+			rval = -ENODEV;</div><div class='add'>+			goto out_clk_set_rate;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;xshutdown != SMIAPP_NO_XSHUTDOWN) {</div><div class='add'>+		if (gpio_request_one(sensor-&gt;platform_data-&gt;xshutdown, 0,</div><div class='add'>+				     "SMIA++ xshutdown") != 0) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev,</div><div class='add'>+				"unable to acquire reset gpio %d\n",</div><div class='add'>+				sensor-&gt;platform_data-&gt;xshutdown);</div><div class='add'>+			rval = -ENODEV;</div><div class='add'>+			goto out_clk_set_rate;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_power_on(sensor);</div><div class='add'>+	if (rval) {</div><div class='add'>+		rval = -ENODEV;</div><div class='add'>+		goto out_smiapp_power_on;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_identify_module(subdev);</div><div class='add'>+	if (rval) {</div><div class='add'>+		rval = -ENODEV;</div><div class='add'>+		goto out_power_off;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_get_all_limits(sensor);</div><div class='add'>+	if (rval) {</div><div class='add'>+		rval = -ENODEV;</div><div class='add'>+		goto out_power_off;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Handle Sensor Module orientation on the board.</div><div class='add'>+	 *</div><div class='add'>+	 * The application of H-FLIP and V-FLIP on the sensor is modified by</div><div class='add'>+	 * the sensor orientation on the board.</div><div class='add'>+	 *</div><div class='add'>+	 * For SMIAPP_BOARD_SENSOR_ORIENT_180 the default behaviour is to set</div><div class='add'>+	 * both H-FLIP and V-FLIP for normal operation which also implies</div><div class='add'>+	 * that a set/unset operation for user space HFLIP and VFLIP v4l2</div><div class='add'>+	 * controls will need to be internally inverted.</div><div class='add'>+	 *</div><div class='add'>+	 * Rotation also changes the bayer pattern.</div><div class='add'>+	 */</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;module_board_orient ==</div><div class='add'>+	    SMIAPP_MODULE_BOARD_ORIENT_180)</div><div class='add'>+		sensor-&gt;hvflip_inv_mask = SMIAPP_IMAGE_ORIENTATION_HFLIP |</div><div class='add'>+					  SMIAPP_IMAGE_ORIENTATION_VFLIP;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_get_mbus_formats(sensor);</div><div class='add'>+	if (rval) {</div><div class='add'>+		rval = -ENODEV;</div><div class='add'>+		goto out_power_off;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;limits[SMIAPP_LIMIT_BINNING_CAPABILITY]) {</div><div class='add'>+		u32 val;</div><div class='add'>+</div><div class='add'>+		rval = smiapp_read(sensor,</div><div class='add'>+				   SMIAPP_REG_U8_BINNING_SUBTYPES, &amp;val);</div><div class='add'>+		if (rval &lt; 0) {</div><div class='add'>+			rval = -ENODEV;</div><div class='add'>+			goto out_power_off;</div><div class='add'>+		}</div><div class='add'>+		sensor-&gt;nbinning_subtypes = min_t(u8, val,</div><div class='add'>+						  SMIAPP_BINNING_SUBTYPES);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; sensor-&gt;nbinning_subtypes; i++) {</div><div class='add'>+			rval = smiapp_read(</div><div class='add'>+				sensor, SMIAPP_REG_U8_BINNING_TYPE_n(i), &amp;val);</div><div class='add'>+			if (rval &lt; 0) {</div><div class='add'>+				rval = -ENODEV;</div><div class='add'>+				goto out_power_off;</div><div class='add'>+			}</div><div class='add'>+			sensor-&gt;binning_subtypes[i] =</div><div class='add'>+				*(struct smiapp_binning_subtype *)&amp;val;</div><div class='add'>+</div><div class='add'>+			dev_dbg(&amp;client-&gt;dev, "binning %xx%x\n",</div><div class='add'>+				sensor-&gt;binning_subtypes[i].horizontal,</div><div class='add'>+				sensor-&gt;binning_subtypes[i].vertical);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	sensor-&gt;binning_horizontal = 1;</div><div class='add'>+	sensor-&gt;binning_vertical = 1;</div><div class='add'>+</div><div class='add'>+	/* SMIA++ NVM initialization - it will be read from the sensor</div><div class='add'>+	 * when it is first requested by userspace.</div><div class='add'>+	 */</div><div class='add'>+	if (sensor-&gt;minfo.smiapp_version &amp;&amp; sensor-&gt;platform_data-&gt;nvm_size) {</div><div class='add'>+		sensor-&gt;nvm = kzalloc(sensor-&gt;platform_data-&gt;nvm_size,</div><div class='add'>+				      GFP_KERNEL);</div><div class='add'>+		if (sensor-&gt;nvm == NULL) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev, "nvm buf allocation failed\n");</div><div class='add'>+			rval = -ENOMEM;</div><div class='add'>+			goto out_power_off;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (device_create_file(&amp;client-&gt;dev, &amp;dev_attr_nvm) != 0) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev, "sysfs nvm entry failed\n");</div><div class='add'>+			rval = -EBUSY;</div><div class='add'>+			goto out_power_off;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rval = smiapp_call_quirk(sensor, limits);</div><div class='add'>+	if (rval) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "limits quirks failed\n");</div><div class='add'>+		goto out_nvm_release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We consider this as profile 0 sensor if any of these are zero. */</div><div class='add'>+	if (!sensor-&gt;limits[SMIAPP_LIMIT_MIN_OP_SYS_CLK_DIV] ||</div><div class='add'>+	    !sensor-&gt;limits[SMIAPP_LIMIT_MAX_OP_SYS_CLK_DIV] ||</div><div class='add'>+	    !sensor-&gt;limits[SMIAPP_LIMIT_MIN_OP_PIX_CLK_DIV] ||</div><div class='add'>+	    !sensor-&gt;limits[SMIAPP_LIMIT_MAX_OP_PIX_CLK_DIV]) {</div><div class='add'>+		sensor-&gt;minfo.smiapp_profile = SMIAPP_PROFILE_0;</div><div class='add'>+	} else if (sensor-&gt;limits[SMIAPP_LIMIT_SCALING_CAPABILITY]</div><div class='add'>+		   != SMIAPP_SCALING_CAPABILITY_NONE) {</div><div class='add'>+		if (sensor-&gt;limits[SMIAPP_LIMIT_SCALING_CAPABILITY]</div><div class='add'>+		    == SMIAPP_SCALING_CAPABILITY_HORIZONTAL)</div><div class='add'>+			sensor-&gt;minfo.smiapp_profile = SMIAPP_PROFILE_1;</div><div class='add'>+		else</div><div class='add'>+			sensor-&gt;minfo.smiapp_profile = SMIAPP_PROFILE_2;</div><div class='add'>+		sensor-&gt;scaler = &amp;sensor-&gt;ssds[sensor-&gt;ssds_used];</div><div class='add'>+		sensor-&gt;ssds_used++;</div><div class='add'>+	} else if (sensor-&gt;limits[SMIAPP_LIMIT_DIGITAL_CROP_CAPABILITY]</div><div class='add'>+		   == SMIAPP_DIGITAL_CROP_CAPABILITY_INPUT_CROP) {</div><div class='add'>+		sensor-&gt;scaler = &amp;sensor-&gt;ssds[sensor-&gt;ssds_used];</div><div class='add'>+		sensor-&gt;ssds_used++;</div><div class='add'>+	}</div><div class='add'>+	sensor-&gt;binner = &amp;sensor-&gt;ssds[sensor-&gt;ssds_used];</div><div class='add'>+	sensor-&gt;ssds_used++;</div><div class='add'>+	sensor-&gt;pixel_array = &amp;sensor-&gt;ssds[sensor-&gt;ssds_used];</div><div class='add'>+	sensor-&gt;ssds_used++;</div><div class='add'>+</div><div class='add'>+	sensor-&gt;scale_m = sensor-&gt;limits[SMIAPP_LIMIT_SCALER_N_MIN];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SMIAPP_SUBDEVS; i++) {</div><div class='add'>+		struct {</div><div class='add'>+			struct smiapp_subdev *ssd;</div><div class='add'>+			char *name;</div><div class='add'>+		} const __this[] = {</div><div class='add'>+			{ sensor-&gt;scaler, "scaler", },</div><div class='add'>+			{ sensor-&gt;binner, "binner", },</div><div class='add'>+			{ sensor-&gt;pixel_array, "pixel array", },</div><div class='add'>+		}, *_this = &amp;__this[i];</div><div class='add'>+		struct smiapp_subdev *this = _this-&gt;ssd;</div><div class='add'>+</div><div class='add'>+		if (!this)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (this != sensor-&gt;src)</div><div class='add'>+			v4l2_subdev_init(&amp;this-&gt;sd, &amp;smiapp_ops);</div><div class='add'>+</div><div class='add'>+		this-&gt;sensor = sensor;</div><div class='add'>+</div><div class='add'>+		if (this == sensor-&gt;pixel_array) {</div><div class='add'>+			this-&gt;npads = 1;</div><div class='add'>+		} else {</div><div class='add'>+			this-&gt;npads = 2;</div><div class='add'>+			this-&gt;source_pad = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		snprintf(this-&gt;sd.name,</div><div class='add'>+			 sizeof(this-&gt;sd.name), "%s %s",</div><div class='add'>+			 sensor-&gt;minfo.name, _this-&gt;name);</div><div class='add'>+</div><div class='add'>+		this-&gt;sink_fmt.width =</div><div class='add'>+			sensor-&gt;limits[SMIAPP_LIMIT_X_ADDR_MAX] + 1;</div><div class='add'>+		this-&gt;sink_fmt.height =</div><div class='add'>+			sensor-&gt;limits[SMIAPP_LIMIT_Y_ADDR_MAX] + 1;</div><div class='add'>+		this-&gt;compose.width = this-&gt;sink_fmt.width;</div><div class='add'>+		this-&gt;compose.height = this-&gt;sink_fmt.height;</div><div class='add'>+		this-&gt;crop[this-&gt;source_pad] = this-&gt;compose;</div><div class='add'>+		this-&gt;pads[this-&gt;source_pad].flags = MEDIA_PAD_FL_SOURCE;</div><div class='add'>+		if (this != sensor-&gt;pixel_array) {</div><div class='add'>+			this-&gt;crop[this-&gt;sink_pad] = this-&gt;compose;</div><div class='add'>+			this-&gt;pads[this-&gt;sink_pad].flags = MEDIA_PAD_FL_SINK;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		this-&gt;sd.entity.ops = &amp;smiapp_entity_ops;</div><div class='add'>+</div><div class='add'>+		if (last == NULL) {</div><div class='add'>+			last = this;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		this-&gt;sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;</div><div class='add'>+		this-&gt;sd.internal_ops = &amp;smiapp_internal_ops;</div><div class='add'>+		this-&gt;sd.owner = NULL;</div><div class='add'>+		v4l2_set_subdevdata(&amp;this-&gt;sd, client);</div><div class='add'>+</div><div class='add'>+		rval = media_entity_init(&amp;this-&gt;sd.entity,</div><div class='add'>+					 this-&gt;npads, this-&gt;pads, 0);</div><div class='add'>+		if (rval) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev,</div><div class='add'>+				"media_entity_init failed\n");</div><div class='add'>+			goto out_nvm_release;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rval = media_entity_create_link(&amp;this-&gt;sd.entity,</div><div class='add'>+						this-&gt;source_pad,</div><div class='add'>+						&amp;last-&gt;sd.entity,</div><div class='add'>+						last-&gt;sink_pad,</div><div class='add'>+						MEDIA_LNK_FL_ENABLED |</div><div class='add'>+						MEDIA_LNK_FL_IMMUTABLE);</div><div class='add'>+		if (rval) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev,</div><div class='add'>+				"media_entity_create_link failed\n");</div><div class='add'>+			goto out_nvm_release;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rval = v4l2_device_register_subdev(sensor-&gt;src-&gt;sd.v4l2_dev,</div><div class='add'>+						   &amp;this-&gt;sd);</div><div class='add'>+		if (rval) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev,</div><div class='add'>+				"v4l2_device_register_subdev failed\n");</div><div class='add'>+			goto out_nvm_release;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		last = this;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "profile %d\n", sensor-&gt;minfo.smiapp_profile);</div><div class='add'>+</div><div class='add'>+	sensor-&gt;pixel_array-&gt;sd.entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;</div><div class='add'>+</div><div class='add'>+	/* final steps */</div><div class='add'>+	smiapp_read_frame_fmt(sensor);</div><div class='add'>+	rval = smiapp_init_controls(sensor);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		goto out_nvm_release;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_update_mode(sensor);</div><div class='add'>+	if (rval) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "update mode failed\n");</div><div class='add'>+		goto out_nvm_release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sensor-&gt;streaming = false;</div><div class='add'>+	sensor-&gt;dev_init_done = true;</div><div class='add'>+</div><div class='add'>+	/* check flash capability */</div><div class='add'>+	rval = smiapp_read(sensor, SMIAPP_REG_U8_FLASH_MODE_CAPABILITY, &amp;tmp);</div><div class='add'>+	sensor-&gt;flash_capability = tmp;</div><div class='add'>+	if (rval)</div><div class='add'>+		goto out_nvm_release;</div><div class='add'>+</div><div class='add'>+	smiapp_power_off(sensor);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_nvm_release:</div><div class='add'>+	device_remove_file(&amp;client-&gt;dev, &amp;dev_attr_nvm);</div><div class='add'>+</div><div class='add'>+out_power_off:</div><div class='add'>+	kfree(sensor-&gt;nvm);</div><div class='add'>+	sensor-&gt;nvm = NULL;</div><div class='add'>+	smiapp_power_off(sensor);</div><div class='add'>+</div><div class='add'>+out_smiapp_power_on:</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;xshutdown != SMIAPP_NO_XSHUTDOWN)</div><div class='add'>+		gpio_free(sensor-&gt;platform_data-&gt;xshutdown);</div><div class='add'>+</div><div class='add'>+out_clk_set_rate:</div><div class='add'>+	clk_put(sensor-&gt;ext_clk);</div><div class='add'>+	sensor-&gt;ext_clk = NULL;</div><div class='add'>+</div><div class='add'>+out_clk_get:</div><div class='add'>+	regulator_put(sensor-&gt;vana);</div><div class='add'>+	sensor-&gt;vana = NULL;</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_subdev *ssd = to_smiapp_subdev(sd);</div><div class='add'>+	struct smiapp_sensor *sensor = ssd-&gt;sensor;</div><div class='add'>+	u32 mbus_code =</div><div class='add'>+		smiapp_csi_data_formats[smiapp_pixel_order(sensor)].code;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;sensor-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ssd-&gt;npads; i++) {</div><div class='add'>+		struct v4l2_mbus_framefmt *try_fmt =</div><div class='add'>+			v4l2_subdev_get_try_format(fh, i);</div><div class='add'>+		struct v4l2_rect *try_crop = v4l2_subdev_get_try_crop(fh, i);</div><div class='add'>+		struct v4l2_rect *try_comp;</div><div class='add'>+</div><div class='add'>+		try_fmt-&gt;width = sensor-&gt;limits[SMIAPP_LIMIT_X_ADDR_MAX] + 1;</div><div class='add'>+		try_fmt-&gt;height = sensor-&gt;limits[SMIAPP_LIMIT_Y_ADDR_MAX] + 1;</div><div class='add'>+		try_fmt-&gt;code = mbus_code;</div><div class='add'>+</div><div class='add'>+		try_crop-&gt;top = 0;</div><div class='add'>+		try_crop-&gt;left = 0;</div><div class='add'>+		try_crop-&gt;width = try_fmt-&gt;width;</div><div class='add'>+		try_crop-&gt;height = try_fmt-&gt;height;</div><div class='add'>+</div><div class='add'>+		if (ssd != sensor-&gt;pixel_array)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		try_comp = v4l2_subdev_get_try_compose(fh, i);</div><div class='add'>+		*try_comp = *try_crop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;sensor-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	return smiapp_set_power(sd, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)</div><div class='add'>+{</div><div class='add'>+	return smiapp_set_power(sd, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_video_ops smiapp_video_ops = {</div><div class='add'>+	.s_stream = smiapp_set_stream,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_core_ops smiapp_core_ops = {</div><div class='add'>+	.s_power = smiapp_set_power,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_pad_ops smiapp_pad_ops = {</div><div class='add'>+	.enum_mbus_code = smiapp_enum_mbus_code,</div><div class='add'>+	.get_fmt = smiapp_get_format,</div><div class='add'>+	.set_fmt = smiapp_set_format,</div><div class='add'>+	.get_selection = smiapp_get_selection,</div><div class='add'>+	.set_selection = smiapp_set_selection,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_sensor_ops smiapp_sensor_ops = {</div><div class='add'>+	.g_skip_frames = smiapp_get_skip_frames,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_ops smiapp_ops = {</div><div class='add'>+	.core = &amp;smiapp_core_ops,</div><div class='add'>+	.video = &amp;smiapp_video_ops,</div><div class='add'>+	.pad = &amp;smiapp_pad_ops,</div><div class='add'>+	.sensor = &amp;smiapp_sensor_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct media_entity_operations smiapp_entity_ops = {</div><div class='add'>+	.link_validate = v4l2_subdev_link_validate,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_internal_ops smiapp_internal_src_ops = {</div><div class='add'>+	.registered = smiapp_registered,</div><div class='add'>+	.open = smiapp_open,</div><div class='add'>+	.close = smiapp_close,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_subdev_internal_ops smiapp_internal_ops = {</div><div class='add'>+	.open = smiapp_open,</div><div class='add'>+	.close = smiapp_close,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* -----------------------------------------------------------------------------</div><div class='add'>+ * I2C Driver</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+</div><div class='add'>+static int smiapp_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = to_i2c_client(dev);</div><div class='add'>+	struct v4l2_subdev *subdev = i2c_get_clientdata(client);</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	bool streaming;</div><div class='add'>+</div><div class='add'>+	BUG_ON(mutex_is_locked(&amp;sensor-&gt;mutex));</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;power_count == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;streaming)</div><div class='add'>+		smiapp_stop_streaming(sensor);</div><div class='add'>+</div><div class='add'>+	streaming = sensor-&gt;streaming;</div><div class='add'>+</div><div class='add'>+	smiapp_power_off(sensor);</div><div class='add'>+</div><div class='add'>+	/* save state for resume */</div><div class='add'>+	sensor-&gt;streaming = streaming;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = to_i2c_client(dev);</div><div class='add'>+	struct v4l2_subdev *subdev = i2c_get_clientdata(client);</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;power_count == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rval = smiapp_power_on(sensor);</div><div class='add'>+	if (rval)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;streaming)</div><div class='add'>+		rval = smiapp_start_streaming(sensor);</div><div class='add'>+</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+#define smiapp_suspend	NULL</div><div class='add'>+#define smiapp_resume	NULL</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_PM */</div><div class='add'>+</div><div class='add'>+static int smiapp_probe(struct i2c_client *client,</div><div class='add'>+			const struct i2c_device_id *devid)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_sensor *sensor;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	if (client-&gt;dev.platform_data == NULL)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	sensor = kzalloc(sizeof(*sensor), GFP_KERNEL);</div><div class='add'>+	if (sensor == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	sensor-&gt;platform_data = client-&gt;dev.platform_data;</div><div class='add'>+	mutex_init(&amp;sensor-&gt;mutex);</div><div class='add'>+	mutex_init(&amp;sensor-&gt;power_mutex);</div><div class='add'>+	sensor-&gt;src = &amp;sensor-&gt;ssds[sensor-&gt;ssds_used];</div><div class='add'>+</div><div class='add'>+	v4l2_i2c_subdev_init(&amp;sensor-&gt;src-&gt;sd, client, &amp;smiapp_ops);</div><div class='add'>+	sensor-&gt;src-&gt;sd.internal_ops = &amp;smiapp_internal_src_ops;</div><div class='add'>+	sensor-&gt;src-&gt;sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;</div><div class='add'>+	sensor-&gt;src-&gt;sensor = sensor;</div><div class='add'>+</div><div class='add'>+	sensor-&gt;src-&gt;pads[0].flags = MEDIA_PAD_FL_SOURCE;</div><div class='add'>+	rval = media_entity_init(&amp;sensor-&gt;src-&gt;sd.entity, 2,</div><div class='add'>+				 sensor-&gt;src-&gt;pads, 0);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		kfree(sensor);</div><div class='add'>+</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __exit smiapp_remove(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subdev *subdev = i2c_get_clientdata(client);</div><div class='add'>+	struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;power_count) {</div><div class='add'>+		if (sensor-&gt;platform_data-&gt;xshutdown != SMIAPP_NO_XSHUTDOWN)</div><div class='add'>+			gpio_set_value(sensor-&gt;platform_data-&gt;xshutdown, 0);</div><div class='add'>+		if (sensor-&gt;platform_data-&gt;set_xclk)</div><div class='add'>+			sensor-&gt;platform_data-&gt;set_xclk(&amp;sensor-&gt;src-&gt;sd, 0);</div><div class='add'>+		else</div><div class='add'>+			clk_disable(sensor-&gt;ext_clk);</div><div class='add'>+		sensor-&gt;power_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sensor-&gt;nvm) {</div><div class='add'>+		device_remove_file(&amp;client-&gt;dev, &amp;dev_attr_nvm);</div><div class='add'>+		kfree(sensor-&gt;nvm);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sensor-&gt;ssds_used; i++) {</div><div class='add'>+		media_entity_cleanup(&amp;sensor-&gt;ssds[i].sd.entity);</div><div class='add'>+		v4l2_device_unregister_subdev(&amp;sensor-&gt;ssds[i].sd);</div><div class='add'>+	}</div><div class='add'>+	smiapp_free_controls(sensor);</div><div class='add'>+	if (sensor-&gt;platform_data-&gt;xshutdown != SMIAPP_NO_XSHUTDOWN)</div><div class='add'>+		gpio_free(sensor-&gt;platform_data-&gt;xshutdown);</div><div class='add'>+	if (sensor-&gt;ext_clk)</div><div class='add'>+		clk_put(sensor-&gt;ext_clk);</div><div class='add'>+	if (sensor-&gt;vana)</div><div class='add'>+		regulator_put(sensor-&gt;vana);</div><div class='add'>+</div><div class='add'>+	kfree(sensor);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id smiapp_id_table[] = {</div><div class='add'>+	{ SMIAPP_NAME, 0 },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, smiapp_id_table);</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops smiapp_pm_ops = {</div><div class='add'>+	.suspend	= smiapp_suspend,</div><div class='add'>+	.resume		= smiapp_resume,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct i2c_driver smiapp_i2c_driver = {</div><div class='add'>+	.driver	= {</div><div class='add'>+		.name = SMIAPP_NAME,</div><div class='add'>+		.pm = &amp;smiapp_pm_ops,</div><div class='add'>+	},</div><div class='add'>+	.probe	= smiapp_probe,</div><div class='add'>+	.remove	= __exit_p(smiapp_remove),</div><div class='add'>+	.id_table = smiapp_id_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_i2c_driver(smiapp_i2c_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Generic SMIA/SMIA++ camera module driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/media/video/smiapp/smiapp-limits.c b/drivers/media/video/smiapp/smiapp-limits.c<br/>new file mode 100644<br/>index 000000000000..0800e095724e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp/smiapp-limits.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-limits.c</a></div><div class='hunk'>@@ -0,0 +1,132 @@</div><div class='add'>+/*</div><div class='add'>+ * drivers/media/video/smiapp/smiapp-limits.c</div><div class='add'>+ *</div><div class='add'>+ * Generic driver for SMIA/SMIA++ compliant camera modules</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011--2012 Nokia Corporation</div><div class='add'>+ * Contact: Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "smiapp.h"</div><div class='add'>+</div><div class='add'>+struct smiapp_reg_limits smiapp_reg_limits[] = {</div><div class='add'>+	{ SMIAPP_REG_U16_ANALOGUE_GAIN_CAPABILITY, "analogue_gain_capability" }, /* 0 */</div><div class='add'>+	{ SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_MIN, "analogue_gain_code_min" },</div><div class='add'>+	{ SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_MAX, "analogue_gain_code_max" },</div><div class='add'>+	{ SMIAPP_REG_U8_THS_ZERO_MIN, "ths_zero_min" },</div><div class='add'>+	{ SMIAPP_REG_U8_TCLK_TRAIL_MIN, "tclk_trail_min" },</div><div class='add'>+	{ SMIAPP_REG_U16_INTEGRATION_TIME_CAPABILITY, "integration_time_capability" }, /* 5 */</div><div class='add'>+	{ SMIAPP_REG_U16_COARSE_INTEGRATION_TIME_MIN, "coarse_integration_time_min" },</div><div class='add'>+	{ SMIAPP_REG_U16_COARSE_INTEGRATION_TIME_MAX_MARGIN, "coarse_integration_time_max_margin" },</div><div class='add'>+	{ SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MIN, "fine_integration_time_min" },</div><div class='add'>+	{ SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MAX_MARGIN, "fine_integration_time_max_margin" },</div><div class='add'>+	{ SMIAPP_REG_U16_DIGITAL_GAIN_CAPABILITY, "digital_gain_capability" }, /* 10 */</div><div class='add'>+	{ SMIAPP_REG_U16_DIGITAL_GAIN_MIN, "digital_gain_min" },</div><div class='add'>+	{ SMIAPP_REG_U16_DIGITAL_GAIN_MAX, "digital_gain_max" },</div><div class='add'>+	{ SMIAPP_REG_F32_MIN_EXT_CLK_FREQ_HZ, "min_ext_clk_freq_hz" },</div><div class='add'>+	{ SMIAPP_REG_F32_MAX_EXT_CLK_FREQ_HZ, "max_ext_clk_freq_hz" },</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_PRE_PLL_CLK_DIV, "min_pre_pll_clk_div" }, /* 15 */</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_PRE_PLL_CLK_DIV, "max_pre_pll_clk_div" },</div><div class='add'>+	{ SMIAPP_REG_F32_MIN_PLL_IP_FREQ_HZ, "min_pll_ip_freq_hz" },</div><div class='add'>+	{ SMIAPP_REG_F32_MAX_PLL_IP_FREQ_HZ, "max_pll_ip_freq_hz" },</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_PLL_MULTIPLIER, "min_pll_multiplier" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_PLL_MULTIPLIER, "max_pll_multiplier" }, /* 20 */</div><div class='add'>+	{ SMIAPP_REG_F32_MIN_PLL_OP_FREQ_HZ, "min_pll_op_freq_hz" },</div><div class='add'>+	{ SMIAPP_REG_F32_MAX_PLL_OP_FREQ_HZ, "max_pll_op_freq_hz" },</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_VT_SYS_CLK_DIV, "min_vt_sys_clk_div" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_VT_SYS_CLK_DIV, "max_vt_sys_clk_div" },</div><div class='add'>+	{ SMIAPP_REG_F32_MIN_VT_SYS_CLK_FREQ_HZ, "min_vt_sys_clk_freq_hz" }, /* 25 */</div><div class='add'>+	{ SMIAPP_REG_F32_MAX_VT_SYS_CLK_FREQ_HZ, "max_vt_sys_clk_freq_hz" },</div><div class='add'>+	{ SMIAPP_REG_F32_MIN_VT_PIX_CLK_FREQ_HZ, "min_vt_pix_clk_freq_hz" },</div><div class='add'>+	{ SMIAPP_REG_F32_MAX_VT_PIX_CLK_FREQ_HZ, "max_vt_pix_clk_freq_hz" },</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_VT_PIX_CLK_DIV, "min_vt_pix_clk_div" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_VT_PIX_CLK_DIV, "max_vt_pix_clk_div" }, /* 30 */</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_FRAME_LENGTH_LINES, "min_frame_length_lines" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_FRAME_LENGTH_LINES, "max_frame_length_lines" },</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_LINE_LENGTH_PCK, "min_line_length_pck" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_LINE_LENGTH_PCK, "max_line_length_pck" },</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_LINE_BLANKING_PCK, "min_line_blanking_pck" }, /* 35 */</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_FRAME_BLANKING_LINES, "min_frame_blanking_lines" },</div><div class='add'>+	{ SMIAPP_REG_U8_MIN_LINE_LENGTH_PCK_STEP_SIZE, "min_line_length_pck_step_size" },</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_OP_SYS_CLK_DIV, "min_op_sys_clk_div" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_OP_SYS_CLK_DIV, "max_op_sys_clk_div" },</div><div class='add'>+	{ SMIAPP_REG_F32_MIN_OP_SYS_CLK_FREQ_HZ, "min_op_sys_clk_freq_hz" }, /* 40 */</div><div class='add'>+	{ SMIAPP_REG_F32_MAX_OP_SYS_CLK_FREQ_HZ, "max_op_sys_clk_freq_hz" },</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_OP_PIX_CLK_DIV, "min_op_pix_clk_div" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_OP_PIX_CLK_DIV, "max_op_pix_clk_div" },</div><div class='add'>+	{ SMIAPP_REG_F32_MIN_OP_PIX_CLK_FREQ_HZ, "min_op_pix_clk_freq_hz" },</div><div class='add'>+	{ SMIAPP_REG_F32_MAX_OP_PIX_CLK_FREQ_HZ, "max_op_pix_clk_freq_hz" }, /* 45 */</div><div class='add'>+	{ SMIAPP_REG_U16_X_ADDR_MIN, "x_addr_min" },</div><div class='add'>+	{ SMIAPP_REG_U16_Y_ADDR_MIN, "y_addr_min" },</div><div class='add'>+	{ SMIAPP_REG_U16_X_ADDR_MAX, "x_addr_max" },</div><div class='add'>+	{ SMIAPP_REG_U16_Y_ADDR_MAX, "y_addr_max" },</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_X_OUTPUT_SIZE, "min_x_output_size" }, /* 50 */</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_Y_OUTPUT_SIZE, "min_y_output_size" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_X_OUTPUT_SIZE, "max_x_output_size" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_Y_OUTPUT_SIZE, "max_y_output_size" },</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_EVEN_INC, "min_even_inc" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_EVEN_INC, "max_even_inc" }, /* 55 */</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_ODD_INC, "min_odd_inc" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_ODD_INC, "max_odd_inc" },</div><div class='add'>+	{ SMIAPP_REG_U16_SCALING_CAPABILITY, "scaling_capability" },</div><div class='add'>+	{ SMIAPP_REG_U16_SCALER_M_MIN, "scaler_m_min" },</div><div class='add'>+	{ SMIAPP_REG_U16_SCALER_M_MAX, "scaler_m_max" }, /* 60 */</div><div class='add'>+	{ SMIAPP_REG_U16_SCALER_N_MIN, "scaler_n_min" },</div><div class='add'>+	{ SMIAPP_REG_U16_SCALER_N_MAX, "scaler_n_max" },</div><div class='add'>+	{ SMIAPP_REG_U16_SPATIAL_SAMPLING_CAPABILITY, "spatial_sampling_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_DIGITAL_CROP_CAPABILITY, "digital_crop_capability" },</div><div class='add'>+	{ SMIAPP_REG_U16_COMPRESSION_CAPABILITY, "compression_capability" }, /* 65 */</div><div class='add'>+	{ SMIAPP_REG_U8_FIFO_SUPPORT_CAPABILITY, "fifo_support_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_DPHY_CTRL_CAPABILITY, "dphy_ctrl_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_CSI_LANE_MODE_CAPABILITY, "csi_lane_mode_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_CSI_SIGNALLING_MODE_CAPABILITY, "csi_signalling_mode_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_FAST_STANDBY_CAPABILITY, "fast_standby_capability" }, /* 70 */</div><div class='add'>+	{ SMIAPP_REG_U8_CCI_ADDRESS_CONTROL_CAPABILITY, "cci_address_control_capability" },</div><div class='add'>+	{ SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_1_LANE_MODE_MBPS, "max_per_lane_bitrate_1_lane_mode_mbps" },</div><div class='add'>+	{ SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_2_LANE_MODE_MBPS, "max_per_lane_bitrate_2_lane_mode_mbps" },</div><div class='add'>+	{ SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_3_LANE_MODE_MBPS, "max_per_lane_bitrate_3_lane_mode_mbps" },</div><div class='add'>+	{ SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_4_LANE_MODE_MBPS, "max_per_lane_bitrate_4_lane_mode_mbps" }, /* 75 */</div><div class='add'>+	{ SMIAPP_REG_U8_TEMP_SENSOR_CAPABILITY, "temp_sensor_capability" },</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_FRAME_LENGTH_LINES_BIN, "min_frame_length_lines_bin" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_FRAME_LENGTH_LINES_BIN, "max_frame_length_lines_bin" },</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_LINE_LENGTH_PCK_BIN, "min_line_length_pck_bin" },</div><div class='add'>+	{ SMIAPP_REG_U16_MAX_LINE_LENGTH_PCK_BIN, "max_line_length_pck_bin" }, /* 80 */</div><div class='add'>+	{ SMIAPP_REG_U16_MIN_LINE_BLANKING_PCK_BIN, "min_line_blanking_pck_bin" },</div><div class='add'>+	{ SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MIN_BIN, "fine_integration_time_min_bin" },</div><div class='add'>+	{ SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MAX_MARGIN_BIN, "fine_integration_time_max_margin_bin" },</div><div class='add'>+	{ SMIAPP_REG_U8_BINNING_CAPABILITY, "binning_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_BINNING_WEIGHTING_CAPABILITY, "binning_weighting_capability" }, /* 85 */</div><div class='add'>+	{ SMIAPP_REG_U8_DATA_TRANSFER_IF_CAPABILITY, "data_transfer_if_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_SHADING_CORRECTION_CAPABILITY, "shading_correction_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_GREEN_IMBALANCE_CAPABILITY, "green_imbalance_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_BLACK_LEVEL_CAPABILITY, "black_level_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_MODULE_SPECIFIC_CORRECTION_CAPABILITY, "module_specific_correction_capability" }, /* 90 */</div><div class='add'>+	{ SMIAPP_REG_U16_DEFECT_CORRECTION_CAPABILITY, "defect_correction_capability" },</div><div class='add'>+	{ SMIAPP_REG_U16_DEFECT_CORRECTION_CAPABILITY_2, "defect_correction_capability_2" },</div><div class='add'>+	{ SMIAPP_REG_U8_EDOF_CAPABILITY, "edof_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_COLOUR_FEEDBACK_CAPABILITY, "colour_feedback_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_ESTIMATION_MODE_CAPABILITY, "estimation_mode_capability" }, /* 95 */</div><div class='add'>+	{ SMIAPP_REG_U8_ESTIMATION_ZONE_CAPABILITY, "estimation_zone_capability" },</div><div class='add'>+	{ SMIAPP_REG_U16_CAPABILITY_TRDY_MIN, "capability_trdy_min" },</div><div class='add'>+	{ SMIAPP_REG_U8_FLASH_MODE_CAPABILITY, "flash_mode_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_ACTUATOR_CAPABILITY, "actuator_capability" },</div><div class='add'>+	{ SMIAPP_REG_U8_BRACKETING_LUT_CAPABILITY_1, "bracketing_lut_capability_1" }, /* 100 */</div><div class='add'>+	{ SMIAPP_REG_U8_BRACKETING_LUT_CAPABILITY_2, "bracketing_lut_capability_2" },</div><div class='add'>+	{ SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_STEP, "analogue_gain_code_step" },</div><div class='add'>+	{ 0, NULL },</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/media/video/smiapp/smiapp-limits.h b/drivers/media/video/smiapp/smiapp-limits.h<br/>new file mode 100644<br/>index 000000000000..7f4836bb78db<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp/smiapp-limits.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-limits.h</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+/*</div><div class='add'>+ * drivers/media/video/smiapp/smiapp-limits.h</div><div class='add'>+ *</div><div class='add'>+ * Generic driver for SMIA/SMIA++ compliant camera modules</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011--2012 Nokia Corporation</div><div class='add'>+ * Contact: Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define SMIAPP_LIMIT_ANALOGUE_GAIN_CAPABILITY			0</div><div class='add'>+#define SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MIN			1</div><div class='add'>+#define SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MAX			2</div><div class='add'>+#define SMIAPP_LIMIT_THS_ZERO_MIN				3</div><div class='add'>+#define SMIAPP_LIMIT_TCLK_TRAIL_MIN				4</div><div class='add'>+#define SMIAPP_LIMIT_INTEGRATION_TIME_CAPABILITY		5</div><div class='add'>+#define SMIAPP_LIMIT_COARSE_INTEGRATION_TIME_MIN		6</div><div class='add'>+#define SMIAPP_LIMIT_COARSE_INTEGRATION_TIME_MAX_MARGIN		7</div><div class='add'>+#define SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MIN			8</div><div class='add'>+#define SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MAX_MARGIN		9</div><div class='add'>+#define SMIAPP_LIMIT_DIGITAL_GAIN_CAPABILITY			10</div><div class='add'>+#define SMIAPP_LIMIT_DIGITAL_GAIN_MIN				11</div><div class='add'>+#define SMIAPP_LIMIT_DIGITAL_GAIN_MAX				12</div><div class='add'>+#define SMIAPP_LIMIT_MIN_EXT_CLK_FREQ_HZ			13</div><div class='add'>+#define SMIAPP_LIMIT_MAX_EXT_CLK_FREQ_HZ			14</div><div class='add'>+#define SMIAPP_LIMIT_MIN_PRE_PLL_CLK_DIV			15</div><div class='add'>+#define SMIAPP_LIMIT_MAX_PRE_PLL_CLK_DIV			16</div><div class='add'>+#define SMIAPP_LIMIT_MIN_PLL_IP_FREQ_HZ				17</div><div class='add'>+#define SMIAPP_LIMIT_MAX_PLL_IP_FREQ_HZ				18</div><div class='add'>+#define SMIAPP_LIMIT_MIN_PLL_MULTIPLIER				19</div><div class='add'>+#define SMIAPP_LIMIT_MAX_PLL_MULTIPLIER				20</div><div class='add'>+#define SMIAPP_LIMIT_MIN_PLL_OP_FREQ_HZ				21</div><div class='add'>+#define SMIAPP_LIMIT_MAX_PLL_OP_FREQ_HZ				22</div><div class='add'>+#define SMIAPP_LIMIT_MIN_VT_SYS_CLK_DIV				23</div><div class='add'>+#define SMIAPP_LIMIT_MAX_VT_SYS_CLK_DIV				24</div><div class='add'>+#define SMIAPP_LIMIT_MIN_VT_SYS_CLK_FREQ_HZ			25</div><div class='add'>+#define SMIAPP_LIMIT_MAX_VT_SYS_CLK_FREQ_HZ			26</div><div class='add'>+#define SMIAPP_LIMIT_MIN_VT_PIX_CLK_FREQ_HZ			27</div><div class='add'>+#define SMIAPP_LIMIT_MAX_VT_PIX_CLK_FREQ_HZ			28</div><div class='add'>+#define SMIAPP_LIMIT_MIN_VT_PIX_CLK_DIV				29</div><div class='add'>+#define SMIAPP_LIMIT_MAX_VT_PIX_CLK_DIV				30</div><div class='add'>+#define SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES			31</div><div class='add'>+#define SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES			32</div><div class='add'>+#define SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK			33</div><div class='add'>+#define SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK			34</div><div class='add'>+#define SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK			35</div><div class='add'>+#define SMIAPP_LIMIT_MIN_FRAME_BLANKING_LINES			36</div><div class='add'>+#define SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_STEP_SIZE		37</div><div class='add'>+#define SMIAPP_LIMIT_MIN_OP_SYS_CLK_DIV				38</div><div class='add'>+#define SMIAPP_LIMIT_MAX_OP_SYS_CLK_DIV				39</div><div class='add'>+#define SMIAPP_LIMIT_MIN_OP_SYS_CLK_FREQ_HZ			40</div><div class='add'>+#define SMIAPP_LIMIT_MAX_OP_SYS_CLK_FREQ_HZ			41</div><div class='add'>+#define SMIAPP_LIMIT_MIN_OP_PIX_CLK_DIV				42</div><div class='add'>+#define SMIAPP_LIMIT_MAX_OP_PIX_CLK_DIV				43</div><div class='add'>+#define SMIAPP_LIMIT_MIN_OP_PIX_CLK_FREQ_HZ			44</div><div class='add'>+#define SMIAPP_LIMIT_MAX_OP_PIX_CLK_FREQ_HZ			45</div><div class='add'>+#define SMIAPP_LIMIT_X_ADDR_MIN					46</div><div class='add'>+#define SMIAPP_LIMIT_Y_ADDR_MIN					47</div><div class='add'>+#define SMIAPP_LIMIT_X_ADDR_MAX					48</div><div class='add'>+#define SMIAPP_LIMIT_Y_ADDR_MAX					49</div><div class='add'>+#define SMIAPP_LIMIT_MIN_X_OUTPUT_SIZE				50</div><div class='add'>+#define SMIAPP_LIMIT_MIN_Y_OUTPUT_SIZE				51</div><div class='add'>+#define SMIAPP_LIMIT_MAX_X_OUTPUT_SIZE				52</div><div class='add'>+#define SMIAPP_LIMIT_MAX_Y_OUTPUT_SIZE				53</div><div class='add'>+#define SMIAPP_LIMIT_MIN_EVEN_INC				54</div><div class='add'>+#define SMIAPP_LIMIT_MAX_EVEN_INC				55</div><div class='add'>+#define SMIAPP_LIMIT_MIN_ODD_INC				56</div><div class='add'>+#define SMIAPP_LIMIT_MAX_ODD_INC				57</div><div class='add'>+#define SMIAPP_LIMIT_SCALING_CAPABILITY				58</div><div class='add'>+#define SMIAPP_LIMIT_SCALER_M_MIN				59</div><div class='add'>+#define SMIAPP_LIMIT_SCALER_M_MAX				60</div><div class='add'>+#define SMIAPP_LIMIT_SCALER_N_MIN				61</div><div class='add'>+#define SMIAPP_LIMIT_SCALER_N_MAX				62</div><div class='add'>+#define SMIAPP_LIMIT_SPATIAL_SAMPLING_CAPABILITY		63</div><div class='add'>+#define SMIAPP_LIMIT_DIGITAL_CROP_CAPABILITY			64</div><div class='add'>+#define SMIAPP_LIMIT_COMPRESSION_CAPABILITY			65</div><div class='add'>+#define SMIAPP_LIMIT_FIFO_SUPPORT_CAPABILITY			66</div><div class='add'>+#define SMIAPP_LIMIT_DPHY_CTRL_CAPABILITY			67</div><div class='add'>+#define SMIAPP_LIMIT_CSI_LANE_MODE_CAPABILITY			68</div><div class='add'>+#define SMIAPP_LIMIT_CSI_SIGNALLING_MODE_CAPABILITY		69</div><div class='add'>+#define SMIAPP_LIMIT_FAST_STANDBY_CAPABILITY			70</div><div class='add'>+#define SMIAPP_LIMIT_CCI_ADDRESS_CONTROL_CAPABILITY		71</div><div class='add'>+#define SMIAPP_LIMIT_MAX_PER_LANE_BITRATE_1_LANE_MODE_MBPS	72</div><div class='add'>+#define SMIAPP_LIMIT_MAX_PER_LANE_BITRATE_2_LANE_MODE_MBPS	73</div><div class='add'>+#define SMIAPP_LIMIT_MAX_PER_LANE_BITRATE_3_LANE_MODE_MBPS	74</div><div class='add'>+#define SMIAPP_LIMIT_MAX_PER_LANE_BITRATE_4_LANE_MODE_MBPS	75</div><div class='add'>+#define SMIAPP_LIMIT_TEMP_SENSOR_CAPABILITY			76</div><div class='add'>+#define SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES_BIN			77</div><div class='add'>+#define SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES_BIN			78</div><div class='add'>+#define SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN			79</div><div class='add'>+#define SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK_BIN			80</div><div class='add'>+#define SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN			81</div><div class='add'>+#define SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MIN_BIN		82</div><div class='add'>+#define SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MAX_MARGIN_BIN	83</div><div class='add'>+#define SMIAPP_LIMIT_BINNING_CAPABILITY				84</div><div class='add'>+#define SMIAPP_LIMIT_BINNING_WEIGHTING_CAPABILITY		85</div><div class='add'>+#define SMIAPP_LIMIT_DATA_TRANSFER_IF_CAPABILITY		86</div><div class='add'>+#define SMIAPP_LIMIT_SHADING_CORRECTION_CAPABILITY		87</div><div class='add'>+#define SMIAPP_LIMIT_GREEN_IMBALANCE_CAPABILITY			88</div><div class='add'>+#define SMIAPP_LIMIT_BLACK_LEVEL_CAPABILITY			89</div><div class='add'>+#define SMIAPP_LIMIT_MODULE_SPECIFIC_CORRECTION_CAPABILITY	90</div><div class='add'>+#define SMIAPP_LIMIT_DEFECT_CORRECTION_CAPABILITY		91</div><div class='add'>+#define SMIAPP_LIMIT_DEFECT_CORRECTION_CAPABILITY_2		92</div><div class='add'>+#define SMIAPP_LIMIT_EDOF_CAPABILITY				93</div><div class='add'>+#define SMIAPP_LIMIT_COLOUR_FEEDBACK_CAPABILITY			94</div><div class='add'>+#define SMIAPP_LIMIT_ESTIMATION_MODE_CAPABILITY			95</div><div class='add'>+#define SMIAPP_LIMIT_ESTIMATION_ZONE_CAPABILITY			96</div><div class='add'>+#define SMIAPP_LIMIT_CAPABILITY_TRDY_MIN			97</div><div class='add'>+#define SMIAPP_LIMIT_FLASH_MODE_CAPABILITY			98</div><div class='add'>+#define SMIAPP_LIMIT_ACTUATOR_CAPABILITY			99</div><div class='add'>+#define SMIAPP_LIMIT_BRACKETING_LUT_CAPABILITY_1		100</div><div class='add'>+#define SMIAPP_LIMIT_BRACKETING_LUT_CAPABILITY_2		101</div><div class='add'>+#define SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_STEP			102</div><div class='add'>+#define SMIAPP_LIMIT_LAST					103</div><div class='head'>diff --git a/drivers/media/video/smiapp/smiapp-quirk.c b/drivers/media/video/smiapp/smiapp-quirk.c<br/>new file mode 100644<br/>index 000000000000..55e87950dcea<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp/smiapp-quirk.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-quirk.c</a></div><div class='hunk'>@@ -0,0 +1,306 @@</div><div class='add'>+/*</div><div class='add'>+ * drivers/media/video/smiapp/smiapp-quirk.c</div><div class='add'>+ *</div><div class='add'>+ * Generic driver for SMIA/SMIA++ compliant camera modules</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011--2012 Nokia Corporation</div><div class='add'>+ * Contact: Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+</div><div class='add'>+#include "smiapp.h"</div><div class='add'>+</div><div class='add'>+static int smiapp_write_8(struct smiapp_sensor *sensor, u16 reg, u8 val)</div><div class='add'>+{</div><div class='add'>+	return smiapp_write(sensor, (SMIA_REG_8BIT &lt;&lt; 16) | reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smiapp_write_8s(struct smiapp_sensor *sensor,</div><div class='add'>+			   struct smiapp_reg_8 *regs, int len)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	for (; len &gt; 0; len--, regs++) {</div><div class='add'>+		rval = smiapp_write_8(sensor, regs-&gt;reg, regs-&gt;val);</div><div class='add'>+		if (rval &lt; 0) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev,</div><div class='add'>+				"error %d writing reg 0x%4.4x, val 0x%2.2x",</div><div class='add'>+				rval, regs-&gt;reg, regs-&gt;val);</div><div class='add'>+			return rval;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void smiapp_replace_limit(struct smiapp_sensor *sensor,</div><div class='add'>+			  u32 limit, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "quirk: 0x%8.8x \"%s\" = %d, 0x%x\n",</div><div class='add'>+		smiapp_reg_limits[limit].addr,</div><div class='add'>+		smiapp_reg_limits[limit].what, val, val);</div><div class='add'>+	sensor-&gt;limits[limit] = val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int smiapp_replace_limit_at(struct smiapp_sensor *sensor,</div><div class='add'>+			    u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; smiapp_reg_limits[i].addr; i++) {</div><div class='add'>+		if ((smiapp_reg_limits[i].addr &amp; 0xffff) != reg)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		smiapp_replace_limit(sensor, i, val);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "quirk: bad register 0x%4.4x\n", reg);</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool smiapp_quirk_reg(struct smiapp_sensor *sensor,</div><div class='add'>+		      u32 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	const struct smia_reg *sreg;</div><div class='add'>+</div><div class='add'>+	if (!sensor-&gt;minfo.quirk)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	sreg = sensor-&gt;minfo.quirk-&gt;regs;</div><div class='add'>+</div><div class='add'>+	if (!sreg)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	while (sreg-&gt;type) {</div><div class='add'>+		u16 type = reg &gt;&gt; 16;</div><div class='add'>+		u16 reg16 = reg;</div><div class='add'>+</div><div class='add'>+		if (sreg-&gt;type != type || sreg-&gt;reg != reg16) {</div><div class='add'>+			sreg++;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch ((u8)type) {</div><div class='add'>+		case SMIA_REG_8BIT:</div><div class='add'>+			dev_dbg(&amp;client-&gt;dev, "quirk: 0x%8.8x: 0x%2.2x\n",</div><div class='add'>+				reg, sreg-&gt;val);</div><div class='add'>+			break;</div><div class='add'>+		case SMIA_REG_16BIT:</div><div class='add'>+			dev_dbg(&amp;client-&gt;dev, "quirk: 0x%8.8x: 0x%4.4x\n",</div><div class='add'>+				reg, sreg-&gt;val);</div><div class='add'>+			break;</div><div class='add'>+		case SMIA_REG_32BIT:</div><div class='add'>+			dev_dbg(&amp;client-&gt;dev, "quirk: 0x%8.8x: 0x%8.8x\n",</div><div class='add'>+				reg, sreg-&gt;val);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*val = sreg-&gt;val;</div><div class='add'>+</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int jt8ew9_limits(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	if (sensor-&gt;minfo.revision_number_major &lt; 0x03)</div><div class='add'>+		sensor-&gt;frame_skip = 1;</div><div class='add'>+</div><div class='add'>+	/* Below 24 gain doesn't have effect at all, */</div><div class='add'>+	/* but ~59 is needed for full dynamic range */</div><div class='add'>+	smiapp_replace_limit(sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MIN, 59);</div><div class='add'>+	smiapp_replace_limit(</div><div class='add'>+		sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MAX, 6000);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int jt8ew9_post_poweron(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct smiapp_reg_8 regs[] = {</div><div class='add'>+		{ 0x30a3, 0xd8 }, /* Output port control : LVDS ports only */</div><div class='add'>+		{ 0x30ae, 0x00 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */</div><div class='add'>+		{ 0x30af, 0xd0 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */</div><div class='add'>+		{ 0x322d, 0x04 }, /* Adjusting Processing Image Size to Scaler Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3255, 0x0f }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3256, 0x15 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3258, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3259, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x325f, 0x7c }, /* Analog Gain Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3302, 0x06 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3304, 0x00 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3307, 0x22 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3308, 0x8d }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x331e, 0x0f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3320, 0x30 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3321, 0x11 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3322, 0x98 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3323, 0x64 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3325, 0x83 }, /* Read Out Timing Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3330, 0x18 }, /* Read Out Timing Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x333c, 0x01 }, /* Read Out Timing Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x3345, 0x2f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */</div><div class='add'>+		{ 0x33de, 0x38 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */</div><div class='add'>+		/* Taken from v03. No idea what the rest are. */</div><div class='add'>+		{ 0x32e0, 0x05 },</div><div class='add'>+		{ 0x32e1, 0x05 },</div><div class='add'>+		{ 0x32e2, 0x04 },</div><div class='add'>+		{ 0x32e5, 0x04 },</div><div class='add'>+		{ 0x32e6, 0x04 },</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct smiapp_quirk smiapp_jt8ew9_quirk = {</div><div class='add'>+	.limits = jt8ew9_limits,</div><div class='add'>+	.post_poweron = jt8ew9_post_poweron,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int imx125es_post_poweron(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	/* Taken from v02. No idea what the other two are. */</div><div class='add'>+	struct smiapp_reg_8 regs[] = {</div><div class='add'>+		/*</div><div class='add'>+		 * 0x3302: clk during frame blanking:</div><div class='add'>+		 * 0x00 - HS mode, 0x01 - LP11</div><div class='add'>+		 */</div><div class='add'>+		{ 0x3302, 0x01 },</div><div class='add'>+		{ 0x302d, 0x00 },</div><div class='add'>+		{ 0x3b08, 0x8c },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct smiapp_quirk smiapp_imx125es_quirk = {</div><div class='add'>+	.post_poweron = imx125es_post_poweron,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int jt8ev1_limits(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	smiapp_replace_limit(sensor, SMIAPP_LIMIT_X_ADDR_MAX, 4271);</div><div class='add'>+	smiapp_replace_limit(sensor,</div><div class='add'>+			     SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN, 184);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int jt8ev1_post_poweron(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	struct smiapp_reg_8 regs[] = {</div><div class='add'>+		{ 0x3031, 0xcd }, /* For digital binning (EQ_MONI) */</div><div class='add'>+		{ 0x30a3, 0xd0 }, /* FLASH STROBE enable */</div><div class='add'>+		{ 0x3237, 0x00 }, /* For control of pulse timing for ADC */</div><div class='add'>+		{ 0x3238, 0x43 },</div><div class='add'>+		{ 0x3301, 0x06 }, /* For analog bias for sensor */</div><div class='add'>+		{ 0x3302, 0x06 },</div><div class='add'>+		{ 0x3304, 0x00 },</div><div class='add'>+		{ 0x3305, 0x88 },</div><div class='add'>+		{ 0x332a, 0x14 },</div><div class='add'>+		{ 0x332c, 0x6b },</div><div class='add'>+		{ 0x3336, 0x01 },</div><div class='add'>+		{ 0x333f, 0x1f },</div><div class='add'>+		{ 0x3355, 0x00 },</div><div class='add'>+		{ 0x3356, 0x20 },</div><div class='add'>+		{ 0x33bf, 0x20 }, /* Adjust the FBC speed */</div><div class='add'>+		{ 0x33c9, 0x20 },</div><div class='add'>+		{ 0x33ce, 0x30 }, /* Adjust the parameter for logic function */</div><div class='add'>+		{ 0x33cf, 0xec }, /* For Black sun */</div><div class='add'>+		{ 0x3328, 0x80 }, /* Ugh. No idea what's this. */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	struct smiapp_reg_8 regs_96[] = {</div><div class='add'>+		{ 0x30ae, 0x00 }, /* For control of ADC clock */</div><div class='add'>+		{ 0x30af, 0xd0 },</div><div class='add'>+		{ 0x30b0, 0x01 },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rval = smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	switch (sensor-&gt;platform_data-&gt;ext_clk) {</div><div class='add'>+	case 9600000:</div><div class='add'>+		return smiapp_write_8s(sensor, regs_96,</div><div class='add'>+				       ARRAY_SIZE(regs_96));</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;client-&gt;dev, "no MSRs for %d Hz ext_clk\n",</div><div class='add'>+			 sensor-&gt;platform_data-&gt;ext_clk);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int jt8ev1_pre_streamon(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	return smiapp_write_8(sensor, 0x3328, 0x00);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int jt8ev1_post_streamoff(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	/* Workaround: allows fast standby to work properly */</div><div class='add'>+	rval = smiapp_write_8(sensor, 0x3205, 0x04);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	/* Wait for 1 ms + one line =&gt; 2 ms is likely enough */</div><div class='add'>+	usleep_range(2000, 2000);</div><div class='add'>+</div><div class='add'>+	/* Restore it */</div><div class='add'>+	rval = smiapp_write_8(sensor, 0x3205, 0x00);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	return smiapp_write_8(sensor, 0x3328, 0x80);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct smiapp_quirk smiapp_jt8ev1_quirk = {</div><div class='add'>+	.limits = jt8ev1_limits,</div><div class='add'>+	.post_poweron = jt8ev1_post_poweron,</div><div class='add'>+	.pre_streamon = jt8ev1_pre_streamon,</div><div class='add'>+	.post_streamoff = jt8ev1_post_streamoff,</div><div class='add'>+	.flags = SMIAPP_QUIRK_FLAG_OP_PIX_CLOCK_PER_LANE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tcm8500md_limits(struct smiapp_sensor *sensor)</div><div class='add'>+{</div><div class='add'>+	smiapp_replace_limit(sensor, SMIAPP_LIMIT_MIN_PLL_IP_FREQ_HZ, 2700000);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct smiapp_quirk smiapp_tcm8500md_quirk = {</div><div class='add'>+	.limits = tcm8500md_limits,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/media/video/smiapp/smiapp-quirk.h b/drivers/media/video/smiapp/smiapp-quirk.h<br/>new file mode 100644<br/>index 000000000000..f4dcaabaefe7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp/smiapp-quirk.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-quirk.h</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+/*</div><div class='add'>+ * drivers/media/video/smiapp/smiapp-quirk.h</div><div class='add'>+ *</div><div class='add'>+ * Generic driver for SMIA/SMIA++ compliant camera modules</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011--2012 Nokia Corporation</div><div class='add'>+ * Contact: Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __SMIAPP_QUIRK__</div><div class='add'>+#define __SMIAPP_QUIRK__</div><div class='add'>+</div><div class='add'>+struct smiapp_sensor;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct smiapp_quirk - quirks for sensors that deviate from SMIA++ standard</div><div class='add'>+ *</div><div class='add'>+ * @limits: Replace sensor-&gt;limits with values which can't be read from</div><div class='add'>+ *	    sensor registers. Called the first time the sensor is powered up.</div><div class='add'>+ * @post_poweron: Called always after the sensor has been fully powered on.</div><div class='add'>+ * @pre_streamon: Called just before streaming is enabled.</div><div class='add'>+ * @post_streamon: Called right after stopping streaming.</div><div class='add'>+ */</div><div class='add'>+struct smiapp_quirk {</div><div class='add'>+	int (*limits)(struct smiapp_sensor *sensor);</div><div class='add'>+	int (*post_poweron)(struct smiapp_sensor *sensor);</div><div class='add'>+	int (*pre_streamon)(struct smiapp_sensor *sensor);</div><div class='add'>+	int (*post_streamoff)(struct smiapp_sensor *sensor);</div><div class='add'>+	const struct smia_reg *regs;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* op pix clock is for all lanes in total normally */</div><div class='add'>+#define SMIAPP_QUIRK_FLAG_OP_PIX_CLOCK_PER_LANE			(1 &lt;&lt; 0)</div><div class='add'>+#define SMIAPP_QUIRK_FLAG_8BIT_READ_ONLY			(1 &lt;&lt; 1)</div><div class='add'>+</div><div class='add'>+struct smiapp_reg_8 {</div><div class='add'>+	u16 reg;</div><div class='add'>+	u8 val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void smiapp_replace_limit(struct smiapp_sensor *sensor,</div><div class='add'>+			  u32 limit, u32 val);</div><div class='add'>+bool smiapp_quirk_reg(struct smiapp_sensor *sensor,</div><div class='add'>+		      u32 reg, u32 *val);</div><div class='add'>+</div><div class='add'>+#define SMIAPP_MK_QUIRK_REG(_reg, _val) \</div><div class='add'>+	{				\</div><div class='add'>+		.type = (_reg &gt;&gt; 16),	\</div><div class='add'>+		.reg = (u16)_reg,	\</div><div class='add'>+		.val = _val,		\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define smiapp_call_quirk(_sensor, _quirk, ...)				\</div><div class='add'>+	(_sensor-&gt;minfo.quirk &amp;&amp;					\</div><div class='add'>+	 _sensor-&gt;minfo.quirk-&gt;_quirk ?					\</div><div class='add'>+	 _sensor-&gt;minfo.quirk-&gt;_quirk(_sensor, ##__VA_ARGS__) : 0)</div><div class='add'>+</div><div class='add'>+#define smiapp_needs_quirk(_sensor, _quirk)		\</div><div class='add'>+	(_sensor-&gt;minfo.quirk ?				\</div><div class='add'>+	 _sensor-&gt;minfo.quirk-&gt;flags &amp; _quirk : 0)</div><div class='add'>+</div><div class='add'>+extern const struct smiapp_quirk smiapp_jt8ev1_quirk;</div><div class='add'>+extern const struct smiapp_quirk smiapp_imx125es_quirk;</div><div class='add'>+extern const struct smiapp_quirk smiapp_jt8ew9_quirk;</div><div class='add'>+extern const struct smiapp_quirk smiapp_tcm8500md_quirk;</div><div class='add'>+</div><div class='add'>+#endif /* __SMIAPP_QUIRK__ */</div><div class='head'>diff --git a/drivers/media/video/smiapp/smiapp-reg-defs.h b/drivers/media/video/smiapp/smiapp-reg-defs.h<br/>new file mode 100644<br/>index 000000000000..a089eb8161e1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp/smiapp-reg-defs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-reg-defs.h</a></div><div class='hunk'>@@ -0,0 +1,503 @@</div><div class='add'>+/*</div><div class='add'>+ * drivers/media/video/smiapp/smiapp-reg-defs.h</div><div class='add'>+ *</div><div class='add'>+ * Generic driver for SMIA/SMIA++ compliant camera modules</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011--2012 Nokia Corporation</div><div class='add'>+ * Contact: Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#define SMIAPP_REG_MK_U8(r) ((SMIA_REG_8BIT &lt;&lt; 16) | (r))</div><div class='add'>+#define SMIAPP_REG_MK_U16(r) ((SMIA_REG_16BIT &lt;&lt; 16) | (r))</div><div class='add'>+#define SMIAPP_REG_MK_U32(r) ((SMIA_REG_32BIT &lt;&lt; 16) | (r))</div><div class='add'>+</div><div class='add'>+#define SMIAPP_REG_MK_F32(r) (SMIA_REG_FLAG_FLOAT | (SMIA_REG_32BIT &lt;&lt; 16) | (r))</div><div class='add'>+</div><div class='add'>+#define SMIAPP_REG_U16_MODEL_ID					SMIAPP_REG_MK_U16(0x0000)</div><div class='add'>+#define SMIAPP_REG_U8_REVISION_NUMBER_MAJOR			SMIAPP_REG_MK_U8(0x0002)</div><div class='add'>+#define SMIAPP_REG_U8_MANUFACTURER_ID				SMIAPP_REG_MK_U8(0x0003)</div><div class='add'>+#define SMIAPP_REG_U8_SMIA_VERSION				SMIAPP_REG_MK_U8(0x0004)</div><div class='add'>+#define SMIAPP_REG_U8_FRAME_COUNT				SMIAPP_REG_MK_U8(0x0005)</div><div class='add'>+#define SMIAPP_REG_U8_PIXEL_ORDER				SMIAPP_REG_MK_U8(0x0006)</div><div class='add'>+#define SMIAPP_REG_U16_DATA_PEDESTAL				SMIAPP_REG_MK_U16(0x0008)</div><div class='add'>+#define SMIAPP_REG_U8_PIXEL_DEPTH				SMIAPP_REG_MK_U8(0x000c)</div><div class='add'>+#define SMIAPP_REG_U8_REVISION_NUMBER_MINOR			SMIAPP_REG_MK_U8(0x0010)</div><div class='add'>+#define SMIAPP_REG_U8_SMIAPP_VERSION				SMIAPP_REG_MK_U8(0x0011)</div><div class='add'>+#define SMIAPP_REG_U8_MODULE_DATE_YEAR				SMIAPP_REG_MK_U8(0x0012)</div><div class='add'>+#define SMIAPP_REG_U8_MODULE_DATE_MONTH				SMIAPP_REG_MK_U8(0x0013)</div><div class='add'>+#define SMIAPP_REG_U8_MODULE_DATE_DAY				SMIAPP_REG_MK_U8(0x0014)</div><div class='add'>+#define SMIAPP_REG_U8_MODULE_DATE_PHASE				SMIAPP_REG_MK_U8(0x0015)</div><div class='add'>+#define SMIAPP_REG_U16_SENSOR_MODEL_ID				SMIAPP_REG_MK_U16(0x0016)</div><div class='add'>+#define SMIAPP_REG_U8_SENSOR_REVISION_NUMBER			SMIAPP_REG_MK_U8(0x0018)</div><div class='add'>+#define SMIAPP_REG_U8_SENSOR_MANUFACTURER_ID			SMIAPP_REG_MK_U8(0x0019)</div><div class='add'>+#define SMIAPP_REG_U8_SENSOR_FIRMWARE_VERSION			SMIAPP_REG_MK_U8(0x001a)</div><div class='add'>+#define SMIAPP_REG_U32_SERIAL_NUMBER				SMIAPP_REG_MK_U32(0x001c)</div><div class='add'>+#define SMIAPP_REG_U8_FRAME_FORMAT_MODEL_TYPE			SMIAPP_REG_MK_U8(0x0040)</div><div class='add'>+#define SMIAPP_REG_U8_FRAME_FORMAT_MODEL_SUBTYPE		SMIAPP_REG_MK_U8(0x0041)</div><div class='add'>+#define SMIAPP_REG_U16_FRAME_FORMAT_DESCRIPTOR_2(n)		SMIAPP_REG_MK_U16(0x0042 + ((n) &lt;&lt; 1)) /* 0 &lt;= n &lt;= 14 */</div><div class='add'>+#define SMIAPP_REG_U32_FRAME_FORMAT_DESCRIPTOR_4(n)		SMIAPP_REG_MK_U32(0x0060 + ((n) &lt;&lt; 2)) /* 0 &lt;= n &lt;= 7 */</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_CAPABILITY			SMIAPP_REG_MK_U16(0x0080)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_MIN			SMIAPP_REG_MK_U16(0x0084)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_MAX			SMIAPP_REG_MK_U16(0x0086)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_STEP			SMIAPP_REG_MK_U16(0x0088)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_TYPE			SMIAPP_REG_MK_U16(0x008a)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_M0				SMIAPP_REG_MK_U16(0x008c)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_C0				SMIAPP_REG_MK_U16(0x008e)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_M1				SMIAPP_REG_MK_U16(0x0090)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_C1				SMIAPP_REG_MK_U16(0x0092)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_FORMAT_MODEL_TYPE			SMIAPP_REG_MK_U8(0x00c0)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_FORMAT_MODEL_SUBTYPE			SMIAPP_REG_MK_U8(0x00c1)</div><div class='add'>+#define SMIAPP_REG_U16_DATA_FORMAT_DESCRIPTOR(n)		SMIAPP_REG_MK_U16(0x00c2 + ((n) &lt;&lt; 1))</div><div class='add'>+#define SMIAPP_REG_U8_MODE_SELECT				SMIAPP_REG_MK_U8(0x0100)</div><div class='add'>+#define SMIAPP_REG_U8_IMAGE_ORIENTATION				SMIAPP_REG_MK_U8(0x0101)</div><div class='add'>+#define SMIAPP_REG_U8_SOFTWARE_RESET				SMIAPP_REG_MK_U8(0x0103)</div><div class='add'>+#define SMIAPP_REG_U8_GROUPED_PARAMETER_HOLD			SMIAPP_REG_MK_U8(0x0104)</div><div class='add'>+#define SMIAPP_REG_U8_MASK_CORRUPTED_FRAMES			SMIAPP_REG_MK_U8(0x0105)</div><div class='add'>+#define SMIAPP_REG_U8_FAST_STANDBY_CTRL				SMIAPP_REG_MK_U8(0x0106)</div><div class='add'>+#define SMIAPP_REG_U8_CCI_ADDRESS_CONTROL			SMIAPP_REG_MK_U8(0x0107)</div><div class='add'>+#define SMIAPP_REG_U8_2ND_CCI_IF_CONTROL			SMIAPP_REG_MK_U8(0x0108)</div><div class='add'>+#define SMIAPP_REG_U8_2ND_CCI_ADDRESS_CONTROL			SMIAPP_REG_MK_U8(0x0109)</div><div class='add'>+#define SMIAPP_REG_U8_CSI_CHANNEL_IDENTIFIER			SMIAPP_REG_MK_U8(0x0110)</div><div class='add'>+#define SMIAPP_REG_U8_CSI_SIGNALLING_MODE			SMIAPP_REG_MK_U8(0x0111)</div><div class='add'>+#define SMIAPP_REG_U16_CSI_DATA_FORMAT				SMIAPP_REG_MK_U16(0x0112)</div><div class='add'>+#define SMIAPP_REG_U8_CSI_LANE_MODE				SMIAPP_REG_MK_U8(0x0114)</div><div class='add'>+#define SMIAPP_REG_U8_CSI2_10_TO_8_DT				SMIAPP_REG_MK_U8(0x0115)</div><div class='add'>+#define SMIAPP_REG_U8_CSI2_10_TO_7_DT				SMIAPP_REG_MK_U8(0x0116)</div><div class='add'>+#define SMIAPP_REG_U8_CSI2_10_TO_6_DT				SMIAPP_REG_MK_U8(0x0117)</div><div class='add'>+#define SMIAPP_REG_U8_CSI2_12_TO_8_DT				SMIAPP_REG_MK_U8(0x0118)</div><div class='add'>+#define SMIAPP_REG_U8_CSI2_12_TO_7_DT				SMIAPP_REG_MK_U8(0x0119)</div><div class='add'>+#define SMIAPP_REG_U8_CSI2_12_TO_6_DT				SMIAPP_REG_MK_U8(0x011a)</div><div class='add'>+#define SMIAPP_REG_U8_CSI2_14_TO_10_DT				SMIAPP_REG_MK_U8(0x011b)</div><div class='add'>+#define SMIAPP_REG_U8_CSI2_14_TO_8_DT				SMIAPP_REG_MK_U8(0x011c)</div><div class='add'>+#define SMIAPP_REG_U8_CSI2_16_TO_10_DT				SMIAPP_REG_MK_U8(0x011d)</div><div class='add'>+#define SMIAPP_REG_U8_CSI2_16_TO_8_DT				SMIAPP_REG_MK_U8(0x011e)</div><div class='add'>+#define SMIAPP_REG_U8_GAIN_MODE					SMIAPP_REG_MK_U8(0x0120)</div><div class='add'>+#define SMIAPP_REG_U16_VANA_VOLTAGE				SMIAPP_REG_MK_U16(0x0130)</div><div class='add'>+#define SMIAPP_REG_U16_VDIG_VOLTAGE				SMIAPP_REG_MK_U16(0x0132)</div><div class='add'>+#define SMIAPP_REG_U16_VIO_VOLTAGE				SMIAPP_REG_MK_U16(0x0134)</div><div class='add'>+#define SMIAPP_REG_U16_EXTCLK_FREQUENCY_MHZ			SMIAPP_REG_MK_U16(0x0136)</div><div class='add'>+#define SMIAPP_REG_U8_TEMP_SENSOR_CONTROL			SMIAPP_REG_MK_U8(0x0138)</div><div class='add'>+#define SMIAPP_REG_U8_TEMP_SENSOR_MODE				SMIAPP_REG_MK_U8(0x0139)</div><div class='add'>+#define SMIAPP_REG_U8_TEMP_SENSOR_OUTPUT			SMIAPP_REG_MK_U8(0x013a)</div><div class='add'>+#define SMIAPP_REG_U16_FINE_INTEGRATION_TIME			SMIAPP_REG_MK_U16(0x0200)</div><div class='add'>+#define SMIAPP_REG_U16_COARSE_INTEGRATION_TIME			SMIAPP_REG_MK_U16(0x0202)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_GLOBAL		SMIAPP_REG_MK_U16(0x0204)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_GREENR		SMIAPP_REG_MK_U16(0x0206)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_RED			SMIAPP_REG_MK_U16(0x0208)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_BLUE			SMIAPP_REG_MK_U16(0x020a)</div><div class='add'>+#define SMIAPP_REG_U16_ANALOGUE_GAIN_CODE_GREENB		SMIAPP_REG_MK_U16(0x020c)</div><div class='add'>+#define SMIAPP_REG_U16_DIGITAL_GAIN_GREENR			SMIAPP_REG_MK_U16(0x020e)</div><div class='add'>+#define SMIAPP_REG_U16_DIGITAL_GAIN_RED				SMIAPP_REG_MK_U16(0x0210)</div><div class='add'>+#define SMIAPP_REG_U16_DIGITAL_GAIN_BLUE			SMIAPP_REG_MK_U16(0x0212)</div><div class='add'>+#define SMIAPP_REG_U16_DIGITAL_GAIN_GREENB			SMIAPP_REG_MK_U16(0x0214)</div><div class='add'>+#define SMIAPP_REG_U16_VT_PIX_CLK_DIV				SMIAPP_REG_MK_U16(0x0300)</div><div class='add'>+#define SMIAPP_REG_U16_VT_SYS_CLK_DIV				SMIAPP_REG_MK_U16(0x0302)</div><div class='add'>+#define SMIAPP_REG_U16_PRE_PLL_CLK_DIV				SMIAPP_REG_MK_U16(0x0304)</div><div class='add'>+#define SMIAPP_REG_U16_PLL_MULTIPLIER				SMIAPP_REG_MK_U16(0x0306)</div><div class='add'>+#define SMIAPP_REG_U16_OP_PIX_CLK_DIV				SMIAPP_REG_MK_U16(0x0308)</div><div class='add'>+#define SMIAPP_REG_U16_OP_SYS_CLK_DIV				SMIAPP_REG_MK_U16(0x030a)</div><div class='add'>+#define SMIAPP_REG_U16_FRAME_LENGTH_LINES			SMIAPP_REG_MK_U16(0x0340)</div><div class='add'>+#define SMIAPP_REG_U16_LINE_LENGTH_PCK				SMIAPP_REG_MK_U16(0x0342)</div><div class='add'>+#define SMIAPP_REG_U16_X_ADDR_START				SMIAPP_REG_MK_U16(0x0344)</div><div class='add'>+#define SMIAPP_REG_U16_Y_ADDR_START				SMIAPP_REG_MK_U16(0x0346)</div><div class='add'>+#define SMIAPP_REG_U16_X_ADDR_END				SMIAPP_REG_MK_U16(0x0348)</div><div class='add'>+#define SMIAPP_REG_U16_Y_ADDR_END				SMIAPP_REG_MK_U16(0x034a)</div><div class='add'>+#define SMIAPP_REG_U16_X_OUTPUT_SIZE				SMIAPP_REG_MK_U16(0x034c)</div><div class='add'>+#define SMIAPP_REG_U16_Y_OUTPUT_SIZE				SMIAPP_REG_MK_U16(0x034e)</div><div class='add'>+#define SMIAPP_REG_U16_X_EVEN_INC				SMIAPP_REG_MK_U16(0x0380)</div><div class='add'>+#define SMIAPP_REG_U16_X_ODD_INC				SMIAPP_REG_MK_U16(0x0382)</div><div class='add'>+#define SMIAPP_REG_U16_Y_EVEN_INC				SMIAPP_REG_MK_U16(0x0384)</div><div class='add'>+#define SMIAPP_REG_U16_Y_ODD_INC				SMIAPP_REG_MK_U16(0x0386)</div><div class='add'>+#define SMIAPP_REG_U16_SCALING_MODE				SMIAPP_REG_MK_U16(0x0400)</div><div class='add'>+#define SMIAPP_REG_U16_SPATIAL_SAMPLING				SMIAPP_REG_MK_U16(0x0402)</div><div class='add'>+#define SMIAPP_REG_U16_SCALE_M					SMIAPP_REG_MK_U16(0x0404)</div><div class='add'>+#define SMIAPP_REG_U16_SCALE_N					SMIAPP_REG_MK_U16(0x0406)</div><div class='add'>+#define SMIAPP_REG_U16_DIGITAL_CROP_X_OFFSET			SMIAPP_REG_MK_U16(0x0408)</div><div class='add'>+#define SMIAPP_REG_U16_DIGITAL_CROP_Y_OFFSET			SMIAPP_REG_MK_U16(0x040a)</div><div class='add'>+#define SMIAPP_REG_U16_DIGITAL_CROP_IMAGE_WIDTH			SMIAPP_REG_MK_U16(0x040c)</div><div class='add'>+#define SMIAPP_REG_U16_DIGITAL_CROP_IMAGE_HEIGHT		SMIAPP_REG_MK_U16(0x040e)</div><div class='add'>+#define SMIAPP_REG_U16_COMPRESSION_MODE				SMIAPP_REG_MK_U16(0x0500)</div><div class='add'>+#define SMIAPP_REG_U16_TEST_PATTERN_MODE			SMIAPP_REG_MK_U16(0x0600)</div><div class='add'>+#define SMIAPP_REG_U16_TEST_DATA_RED				SMIAPP_REG_MK_U16(0x0602)</div><div class='add'>+#define SMIAPP_REG_U16_TEST_DATA_GREENR				SMIAPP_REG_MK_U16(0x0604)</div><div class='add'>+#define SMIAPP_REG_U16_TEST_DATA_BLUE				SMIAPP_REG_MK_U16(0x0606)</div><div class='add'>+#define SMIAPP_REG_U16_TEST_DATA_GREENB				SMIAPP_REG_MK_U16(0x0608)</div><div class='add'>+#define SMIAPP_REG_U16_HORIZONTAL_CURSOR_WIDTH			SMIAPP_REG_MK_U16(0x060a)</div><div class='add'>+#define SMIAPP_REG_U16_HORIZONTAL_CURSOR_POSITION		SMIAPP_REG_MK_U16(0x060c)</div><div class='add'>+#define SMIAPP_REG_U16_VERTICAL_CURSOR_WIDTH			SMIAPP_REG_MK_U16(0x060e)</div><div class='add'>+#define SMIAPP_REG_U16_VERTICAL_CURSOR_POSITION			SMIAPP_REG_MK_U16(0x0610)</div><div class='add'>+#define SMIAPP_REG_U16_FIFO_WATER_MARK_PIXELS			SMIAPP_REG_MK_U16(0x0700)</div><div class='add'>+#define SMIAPP_REG_U8_TCLK_POST					SMIAPP_REG_MK_U8(0x0800)</div><div class='add'>+#define SMIAPP_REG_U8_THS_PREPARE				SMIAPP_REG_MK_U8(0x0801)</div><div class='add'>+#define SMIAPP_REG_U8_THS_ZERO_MIN				SMIAPP_REG_MK_U8(0x0802)</div><div class='add'>+#define SMIAPP_REG_U8_THS_TRAIL					SMIAPP_REG_MK_U8(0x0803)</div><div class='add'>+#define SMIAPP_REG_U8_TCLK_TRAIL_MIN				SMIAPP_REG_MK_U8(0x0804)</div><div class='add'>+#define SMIAPP_REG_U8_TCLK_PREPARE				SMIAPP_REG_MK_U8(0x0805)</div><div class='add'>+#define SMIAPP_REG_U8_TCLK_ZERO					SMIAPP_REG_MK_U8(0x0806)</div><div class='add'>+#define SMIAPP_REG_U8_TLPX					SMIAPP_REG_MK_U8(0x0807)</div><div class='add'>+#define SMIAPP_REG_U8_DPHY_CTRL					SMIAPP_REG_MK_U8(0x0808)</div><div class='add'>+#define SMIAPP_REG_U32_REQUESTED_LINK_BIT_RATE_MBPS		SMIAPP_REG_MK_U32(0x0820)</div><div class='add'>+#define SMIAPP_REG_U8_BINNING_MODE				SMIAPP_REG_MK_U8(0x0900)</div><div class='add'>+#define SMIAPP_REG_U8_BINNING_TYPE				SMIAPP_REG_MK_U8(0x0901)</div><div class='add'>+#define SMIAPP_REG_U8_BINNING_WEIGHTING				SMIAPP_REG_MK_U8(0x0902)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_CTRL			SMIAPP_REG_MK_U8(0x0a00)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_STATUS			SMIAPP_REG_MK_U8(0x0a01)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_PAGE_SELECT		SMIAPP_REG_MK_U8(0x0a02)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_0			SMIAPP_REG_MK_U8(0x0a04)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_1			SMIAPP_REG_MK_U8(0x0a05)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_2			SMIAPP_REG_MK_U8(0x0a06)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_3			SMIAPP_REG_MK_U8(0x0a07)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_4			SMIAPP_REG_MK_U8(0x0a08)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_5			SMIAPP_REG_MK_U8(0x0a09)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_12		SMIAPP_REG_MK_U8(0x0a10)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_13		SMIAPP_REG_MK_U8(0x0a11)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_14		SMIAPP_REG_MK_U8(0x0a12)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_15		SMIAPP_REG_MK_U8(0x0a13)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_16		SMIAPP_REG_MK_U8(0x0a14)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_17		SMIAPP_REG_MK_U8(0x0a15)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_18		SMIAPP_REG_MK_U8(0x0a16)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_19		SMIAPP_REG_MK_U8(0x0a17)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_20		SMIAPP_REG_MK_U8(0x0a18)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_21		SMIAPP_REG_MK_U8(0x0a19)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_22		SMIAPP_REG_MK_U8(0x0a1a)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_23		SMIAPP_REG_MK_U8(0x0a1b)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_24		SMIAPP_REG_MK_U8(0x0a1c)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_25		SMIAPP_REG_MK_U8(0x0a1d)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_26		SMIAPP_REG_MK_U8(0x0a1e)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_27		SMIAPP_REG_MK_U8(0x0a1f)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_28		SMIAPP_REG_MK_U8(0x0a20)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_29		SMIAPP_REG_MK_U8(0x0a21)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_30		SMIAPP_REG_MK_U8(0x0a22)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_31		SMIAPP_REG_MK_U8(0x0a23)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_32		SMIAPP_REG_MK_U8(0x0a24)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_33		SMIAPP_REG_MK_U8(0x0a25)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_34		SMIAPP_REG_MK_U8(0x0a26)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_35		SMIAPP_REG_MK_U8(0x0a27)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_36		SMIAPP_REG_MK_U8(0x0a28)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_37		SMIAPP_REG_MK_U8(0x0a29)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_38		SMIAPP_REG_MK_U8(0x0a2a)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_39		SMIAPP_REG_MK_U8(0x0a2b)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_40		SMIAPP_REG_MK_U8(0x0a2c)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_41		SMIAPP_REG_MK_U8(0x0a2d)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_42		SMIAPP_REG_MK_U8(0x0a2e)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_43		SMIAPP_REG_MK_U8(0x0a2f)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_44		SMIAPP_REG_MK_U8(0x0a30)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_45		SMIAPP_REG_MK_U8(0x0a31)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_46		SMIAPP_REG_MK_U8(0x0a32)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_47		SMIAPP_REG_MK_U8(0x0a33)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_48		SMIAPP_REG_MK_U8(0x0a34)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_49		SMIAPP_REG_MK_U8(0x0a35)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_50		SMIAPP_REG_MK_U8(0x0a36)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_51		SMIAPP_REG_MK_U8(0x0a37)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_52		SMIAPP_REG_MK_U8(0x0a38)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_53		SMIAPP_REG_MK_U8(0x0a39)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_54		SMIAPP_REG_MK_U8(0x0a3a)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_55		SMIAPP_REG_MK_U8(0x0a3b)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_56		SMIAPP_REG_MK_U8(0x0a3c)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_57		SMIAPP_REG_MK_U8(0x0a3d)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_58		SMIAPP_REG_MK_U8(0x0a3e)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_59		SMIAPP_REG_MK_U8(0x0a3f)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_60		SMIAPP_REG_MK_U8(0x0a40)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_61		SMIAPP_REG_MK_U8(0x0a41)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_62		SMIAPP_REG_MK_U8(0x0a42)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_63		SMIAPP_REG_MK_U8(0x0a43)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_CTRL			SMIAPP_REG_MK_U8(0x0a44)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_STATUS			SMIAPP_REG_MK_U8(0x0a45)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_PAGE_SELECT		SMIAPP_REG_MK_U8(0x0a46)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_0			SMIAPP_REG_MK_U8(0x0a48)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_1			SMIAPP_REG_MK_U8(0x0a49)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_2			SMIAPP_REG_MK_U8(0x0a4a)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_3			SMIAPP_REG_MK_U8(0x0a4b)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_4			SMIAPP_REG_MK_U8(0x0a4c)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_5			SMIAPP_REG_MK_U8(0x0a4d)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_6			SMIAPP_REG_MK_U8(0x0a4e)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_7			SMIAPP_REG_MK_U8(0x0a4f)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_8			SMIAPP_REG_MK_U8(0x0a50)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_9			SMIAPP_REG_MK_U8(0x0a51)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_10		SMIAPP_REG_MK_U8(0x0a52)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_11		SMIAPP_REG_MK_U8(0x0a53)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_12		SMIAPP_REG_MK_U8(0x0a54)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_13		SMIAPP_REG_MK_U8(0x0a55)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_14		SMIAPP_REG_MK_U8(0x0a56)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_15		SMIAPP_REG_MK_U8(0x0a57)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_16		SMIAPP_REG_MK_U8(0x0a58)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_17		SMIAPP_REG_MK_U8(0x0a59)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_18		SMIAPP_REG_MK_U8(0x0a5a)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_19		SMIAPP_REG_MK_U8(0x0a5b)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_20		SMIAPP_REG_MK_U8(0x0a5c)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_21		SMIAPP_REG_MK_U8(0x0a5d)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_22		SMIAPP_REG_MK_U8(0x0a5e)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_23		SMIAPP_REG_MK_U8(0x0a5f)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_24		SMIAPP_REG_MK_U8(0x0a60)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_25		SMIAPP_REG_MK_U8(0x0a61)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_26		SMIAPP_REG_MK_U8(0x0a62)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_27		SMIAPP_REG_MK_U8(0x0a63)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_28		SMIAPP_REG_MK_U8(0x0a64)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_29		SMIAPP_REG_MK_U8(0x0a65)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_30		SMIAPP_REG_MK_U8(0x0a66)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_31		SMIAPP_REG_MK_U8(0x0a67)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_32		SMIAPP_REG_MK_U8(0x0a68)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_33		SMIAPP_REG_MK_U8(0x0a69)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_34		SMIAPP_REG_MK_U8(0x0a6a)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_35		SMIAPP_REG_MK_U8(0x0a6b)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_36		SMIAPP_REG_MK_U8(0x0a6c)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_37		SMIAPP_REG_MK_U8(0x0a6d)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_38		SMIAPP_REG_MK_U8(0x0a6e)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_39		SMIAPP_REG_MK_U8(0x0a6f)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_40		SMIAPP_REG_MK_U8(0x0a70)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_41		SMIAPP_REG_MK_U8(0x0a71)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_42		SMIAPP_REG_MK_U8(0x0a72)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_43		SMIAPP_REG_MK_U8(0x0a73)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_44		SMIAPP_REG_MK_U8(0x0a74)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_45		SMIAPP_REG_MK_U8(0x0a75)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_46		SMIAPP_REG_MK_U8(0x0a76)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_47		SMIAPP_REG_MK_U8(0x0a77)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_48		SMIAPP_REG_MK_U8(0x0a78)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_49		SMIAPP_REG_MK_U8(0x0a79)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_50		SMIAPP_REG_MK_U8(0x0a7a)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_51		SMIAPP_REG_MK_U8(0x0a7b)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_52		SMIAPP_REG_MK_U8(0x0a7c)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_53		SMIAPP_REG_MK_U8(0x0a7d)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_54		SMIAPP_REG_MK_U8(0x0a7e)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_55		SMIAPP_REG_MK_U8(0x0a7f)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_56		SMIAPP_REG_MK_U8(0x0a80)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_57		SMIAPP_REG_MK_U8(0x0a81)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_58		SMIAPP_REG_MK_U8(0x0a82)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_59		SMIAPP_REG_MK_U8(0x0a83)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_60		SMIAPP_REG_MK_U8(0x0a84)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_61		SMIAPP_REG_MK_U8(0x0a85)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_62		SMIAPP_REG_MK_U8(0x0a86)</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_2_DATA_63		SMIAPP_REG_MK_U8(0x0a87)</div><div class='add'>+#define SMIAPP_REG_U8_SHADING_CORRECTION_ENABLE			SMIAPP_REG_MK_U8(0x0b00)</div><div class='add'>+#define SMIAPP_REG_U8_LUMINANCE_CORRECTION_LEVEL		SMIAPP_REG_MK_U8(0x0b01)</div><div class='add'>+#define SMIAPP_REG_U8_GREEN_IMBALANCE_FILTER_ENABLE		SMIAPP_REG_MK_U8(0x0b02)</div><div class='add'>+#define SMIAPP_REG_U8_GREEN_IMBALANCE_FILTER_WEIGHT		SMIAPP_REG_MK_U8(0x0b03)</div><div class='add'>+#define SMIAPP_REG_U8_BLACK_LEVEL_CORRECTION_ENABLE		SMIAPP_REG_MK_U8(0x0b04)</div><div class='add'>+#define SMIAPP_REG_U8_MAPPED_COUPLET_CORRECT_ENABLE		SMIAPP_REG_MK_U8(0x0b05)</div><div class='add'>+#define SMIAPP_REG_U8_SINGLE_DEFECT_CORRECT_ENABLE		SMIAPP_REG_MK_U8(0x0b06)</div><div class='add'>+#define SMIAPP_REG_U8_SINGLE_DEFECT_CORRECT_WEIGHT		SMIAPP_REG_MK_U8(0x0b07)</div><div class='add'>+#define SMIAPP_REG_U8_DYNAMIC_COUPLET_CORRECT_ENABLE		SMIAPP_REG_MK_U8(0x0b08)</div><div class='add'>+#define SMIAPP_REG_U8_DYNAMIC_COUPLET_CORRECT_WEIGHT		SMIAPP_REG_MK_U8(0x0b09)</div><div class='add'>+#define SMIAPP_REG_U8_COMBINED_DEFECT_CORRECT_ENABLE		SMIAPP_REG_MK_U8(0x0b0a)</div><div class='add'>+#define SMIAPP_REG_U8_COMBINED_DEFECT_CORRECT_WEIGHT		SMIAPP_REG_MK_U8(0x0b0b)</div><div class='add'>+#define SMIAPP_REG_U8_MODULE_SPECIFIC_CORRECTION_ENABLE		SMIAPP_REG_MK_U8(0x0b0c)</div><div class='add'>+#define SMIAPP_REG_U8_MODULE_SPECIFIC_CORRECTION_WEIGHT		SMIAPP_REG_MK_U8(0x0b0d)</div><div class='add'>+#define SMIAPP_REG_U8_MAPPED_LINE_DEFECT_CORRECT_ENABLE		SMIAPP_REG_MK_U8(0x0b0e)</div><div class='add'>+#define SMIAPP_REG_U8_MAPPED_LINE_DEFECT_CORRECT_ADJUST		SMIAPP_REG_MK_U8(0x0b0f)</div><div class='add'>+#define SMIAPP_REG_U8_MAPPED_COUPLET_CORRECT_ADJUST		SMIAPP_REG_MK_U8(0x0b10)</div><div class='add'>+#define SMIAPP_REG_U8_MAPPED_TRIPLET_DEFECT_CORRECT_ENABLE	SMIAPP_REG_MK_U8(0x0b11)</div><div class='add'>+#define SMIAPP_REG_U8_MAPPED_TRIPLET_DEFECT_CORRECT_ADJUST	SMIAPP_REG_MK_U8(0x0b12)</div><div class='add'>+#define SMIAPP_REG_U8_DYNAMIC_TRIPLET_DEFECT_CORRECT_ENABLE	SMIAPP_REG_MK_U8(0x0b13)</div><div class='add'>+#define SMIAPP_REG_U8_DYNAMIC_TRIPLET_DEFECT_CORRECT_ADJUST	SMIAPP_REG_MK_U8(0x0b14)</div><div class='add'>+#define SMIAPP_REG_U8_DYNAMIC_LINE_DEFECT_CORRECT_ENABLE	SMIAPP_REG_MK_U8(0x0b15)</div><div class='add'>+#define SMIAPP_REG_U8_DYNAMIC_LINE_DEFECT_CORRECT_ADJUST	SMIAPP_REG_MK_U8(0x0b16)</div><div class='add'>+#define SMIAPP_REG_U8_EDOF_MODE					SMIAPP_REG_MK_U8(0x0b80)</div><div class='add'>+#define SMIAPP_REG_U8_SHARPNESS					SMIAPP_REG_MK_U8(0x0b83)</div><div class='add'>+#define SMIAPP_REG_U8_DENOISING					SMIAPP_REG_MK_U8(0x0b84)</div><div class='add'>+#define SMIAPP_REG_U8_MODULE_SPECIFIC				SMIAPP_REG_MK_U8(0x0b85)</div><div class='add'>+#define SMIAPP_REG_U16_DEPTH_OF_FIELD				SMIAPP_REG_MK_U16(0x0b86)</div><div class='add'>+#define SMIAPP_REG_U16_FOCUS_DISTANCE				SMIAPP_REG_MK_U16(0x0b88)</div><div class='add'>+#define SMIAPP_REG_U8_ESTIMATION_MODE_CTRL			SMIAPP_REG_MK_U8(0x0b8a)</div><div class='add'>+#define SMIAPP_REG_U16_COLOUR_TEMPERATURE			SMIAPP_REG_MK_U16(0x0b8c)</div><div class='add'>+#define SMIAPP_REG_U16_ABSOLUTE_GAIN_GREENR			SMIAPP_REG_MK_U16(0x0b8e)</div><div class='add'>+#define SMIAPP_REG_U16_ABSOLUTE_GAIN_RED			SMIAPP_REG_MK_U16(0x0b90)</div><div class='add'>+#define SMIAPP_REG_U16_ABSOLUTE_GAIN_BLUE			SMIAPP_REG_MK_U16(0x0b92)</div><div class='add'>+#define SMIAPP_REG_U16_ABSOLUTE_GAIN_GREENB			SMIAPP_REG_MK_U16(0x0b94)</div><div class='add'>+#define SMIAPP_REG_U8_ESTIMATION_ZONE_MODE			SMIAPP_REG_MK_U8(0x0bc0)</div><div class='add'>+#define SMIAPP_REG_U16_FIXED_ZONE_WEIGHTING			SMIAPP_REG_MK_U16(0x0bc2)</div><div class='add'>+#define SMIAPP_REG_U16_CUSTOM_ZONE_X_START			SMIAPP_REG_MK_U16(0x0bc4)</div><div class='add'>+#define SMIAPP_REG_U16_CUSTOM_ZONE_Y_START			SMIAPP_REG_MK_U16(0x0bc6)</div><div class='add'>+#define SMIAPP_REG_U16_CUSTOM_ZONE_WIDTH			SMIAPP_REG_MK_U16(0x0bc8)</div><div class='add'>+#define SMIAPP_REG_U16_CUSTOM_ZONE_HEIGHT			SMIAPP_REG_MK_U16(0x0bca)</div><div class='add'>+#define SMIAPP_REG_U8_GLOBAL_RESET_CTRL1			SMIAPP_REG_MK_U8(0x0c00)</div><div class='add'>+#define SMIAPP_REG_U8_GLOBAL_RESET_CTRL2			SMIAPP_REG_MK_U8(0x0c01)</div><div class='add'>+#define SMIAPP_REG_U8_GLOBAL_RESET_MODE_CONFIG_1		SMIAPP_REG_MK_U8(0x0c02)</div><div class='add'>+#define SMIAPP_REG_U8_GLOBAL_RESET_MODE_CONFIG_2		SMIAPP_REG_MK_U8(0x0c03)</div><div class='add'>+#define SMIAPP_REG_U16_TRDY_CTRL				SMIAPP_REG_MK_U16(0x0c04)</div><div class='add'>+#define SMIAPP_REG_U16_TRDOUT_CTRL				SMIAPP_REG_MK_U16(0x0c06)</div><div class='add'>+#define SMIAPP_REG_U16_TSHUTTER_STROBE_DELAY_CTRL		SMIAPP_REG_MK_U16(0x0c08)</div><div class='add'>+#define SMIAPP_REG_U16_TSHUTTER_STROBE_WIDTH_CTRL		SMIAPP_REG_MK_U16(0x0c0a)</div><div class='add'>+#define SMIAPP_REG_U16_TFLASH_STROBE_DELAY_CTRL			SMIAPP_REG_MK_U16(0x0c0c)</div><div class='add'>+#define SMIAPP_REG_U16_TFLASH_STROBE_WIDTH_HIGH_CTRL		SMIAPP_REG_MK_U16(0x0c0e)</div><div class='add'>+#define SMIAPP_REG_U16_TGRST_INTERVAL_CTRL			SMIAPP_REG_MK_U16(0x0c10)</div><div class='add'>+#define SMIAPP_REG_U8_FLASH_STROBE_ADJUSTMENT			SMIAPP_REG_MK_U8(0x0c12)</div><div class='add'>+#define SMIAPP_REG_U16_FLASH_STROBE_START_POINT			SMIAPP_REG_MK_U16(0x0c14)</div><div class='add'>+#define SMIAPP_REG_U16_TFLASH_STROBE_DELAY_RS_CTRL		SMIAPP_REG_MK_U16(0x0c16)</div><div class='add'>+#define SMIAPP_REG_U16_TFLASH_STROBE_WIDTH_HIGH_RS_CTRL		SMIAPP_REG_MK_U16(0x0c18)</div><div class='add'>+#define SMIAPP_REG_U8_FLASH_MODE_RS				SMIAPP_REG_MK_U8(0x0c1a)</div><div class='add'>+#define SMIAPP_REG_U8_FLASH_TRIGGER_RS				SMIAPP_REG_MK_U8(0x0c1b)</div><div class='add'>+#define SMIAPP_REG_U8_FLASH_STATUS				SMIAPP_REG_MK_U8(0x0c1c)</div><div class='add'>+#define SMIAPP_REG_U8_SA_STROBE_MODE				SMIAPP_REG_MK_U8(0x0c1d)</div><div class='add'>+#define SMIAPP_REG_U16_SA_STROBE_START_POINT			SMIAPP_REG_MK_U16(0x0c1e)</div><div class='add'>+#define SMIAPP_REG_U16_TSA_STROBE_DELAY_CTRL			SMIAPP_REG_MK_U16(0x0c20)</div><div class='add'>+#define SMIAPP_REG_U16_TSA_STROBE_WIDTH_CTRL			SMIAPP_REG_MK_U16(0x0c22)</div><div class='add'>+#define SMIAPP_REG_U8_SA_STROBE_TRIGGER				SMIAPP_REG_MK_U8(0x0c24)</div><div class='add'>+#define SMIAPP_REG_U8_SPECIAL_ACTUATOR_STATUS			SMIAPP_REG_MK_U8(0x0c25)</div><div class='add'>+#define SMIAPP_REG_U16_TFLASH_STROBE_WIDTH2_HIGH_RS_CTRL	SMIAPP_REG_MK_U16(0x0c26)</div><div class='add'>+#define SMIAPP_REG_U16_TFLASH_STROBE_WIDTH_LOW_RS_CTRL		SMIAPP_REG_MK_U16(0x0c28)</div><div class='add'>+#define SMIAPP_REG_U8_TFLASH_STROBE_COUNT_RS_CTRL		SMIAPP_REG_MK_U8(0x0c2a)</div><div class='add'>+#define SMIAPP_REG_U8_TFLASH_STROBE_COUNT_CTRL			SMIAPP_REG_MK_U8(0x0c2b)</div><div class='add'>+#define SMIAPP_REG_U16_TFLASH_STROBE_WIDTH2_HIGH_CTRL		SMIAPP_REG_MK_U16(0x0c2c)</div><div class='add'>+#define SMIAPP_REG_U16_TFLASH_STROBE_WIDTH_LOW_CTRL		SMIAPP_REG_MK_U16(0x0c2e)</div><div class='add'>+#define SMIAPP_REG_U8_LOW_LEVEL_CTRL				SMIAPP_REG_MK_U8(0x0c80)</div><div class='add'>+#define SMIAPP_REG_U16_MAIN_TRIGGER_REF_POINT			SMIAPP_REG_MK_U16(0x0c82)</div><div class='add'>+#define SMIAPP_REG_U16_MAIN_TRIGGER_T3				SMIAPP_REG_MK_U16(0x0c84)</div><div class='add'>+#define SMIAPP_REG_U8_MAIN_TRIGGER_COUNT			SMIAPP_REG_MK_U8(0x0c86)</div><div class='add'>+#define SMIAPP_REG_U16_PHASE1_TRIGGER_T3			SMIAPP_REG_MK_U16(0x0c88)</div><div class='add'>+#define SMIAPP_REG_U8_PHASE1_TRIGGER_COUNT			SMIAPP_REG_MK_U8(0x0c8a)</div><div class='add'>+#define SMIAPP_REG_U16_PHASE2_TRIGGER_T3			SMIAPP_REG_MK_U16(0x0c8c)</div><div class='add'>+#define SMIAPP_REG_U8_PHASE2_TRIGGER_COUNT			SMIAPP_REG_MK_U8(0x0c8e)</div><div class='add'>+#define SMIAPP_REG_U8_MECH_SHUTTER_CTRL				SMIAPP_REG_MK_U8(0x0d00)</div><div class='add'>+#define SMIAPP_REG_U8_OPERATION_MODE				SMIAPP_REG_MK_U8(0x0d01)</div><div class='add'>+#define SMIAPP_REG_U8_ACT_STATE1				SMIAPP_REG_MK_U8(0x0d02)</div><div class='add'>+#define SMIAPP_REG_U8_ACT_STATE2				SMIAPP_REG_MK_U8(0x0d03)</div><div class='add'>+#define SMIAPP_REG_U16_FOCUS_CHANGE				SMIAPP_REG_MK_U16(0x0d80)</div><div class='add'>+#define SMIAPP_REG_U16_FOCUS_CHANGE_CONTROL			SMIAPP_REG_MK_U16(0x0d82)</div><div class='add'>+#define SMIAPP_REG_U16_FOCUS_CHANGE_NUMBER_PHASE1		SMIAPP_REG_MK_U16(0x0d84)</div><div class='add'>+#define SMIAPP_REG_U16_FOCUS_CHANGE_NUMBER_PHASE2		SMIAPP_REG_MK_U16(0x0d86)</div><div class='add'>+#define SMIAPP_REG_U8_STROBE_COUNT_PHASE1			SMIAPP_REG_MK_U8(0x0d88)</div><div class='add'>+#define SMIAPP_REG_U8_STROBE_COUNT_PHASE2			SMIAPP_REG_MK_U8(0x0d89)</div><div class='add'>+#define SMIAPP_REG_U8_POSITION					SMIAPP_REG_MK_U8(0x0d8a)</div><div class='add'>+#define SMIAPP_REG_U8_BRACKETING_LUT_CONTROL			SMIAPP_REG_MK_U8(0x0e00)</div><div class='add'>+#define SMIAPP_REG_U8_BRACKETING_LUT_MODE			SMIAPP_REG_MK_U8(0x0e01)</div><div class='add'>+#define SMIAPP_REG_U8_BRACKETING_LUT_ENTRY_CONTROL		SMIAPP_REG_MK_U8(0x0e02)</div><div class='add'>+#define SMIAPP_REG_U8_LUT_PARAMETERS_START			SMIAPP_REG_MK_U8(0x0e10)</div><div class='add'>+#define SMIAPP_REG_U8_LUT_PARAMETERS_END			SMIAPP_REG_MK_U8(0x0eff)</div><div class='add'>+#define SMIAPP_REG_U16_INTEGRATION_TIME_CAPABILITY		SMIAPP_REG_MK_U16(0x1000)</div><div class='add'>+#define SMIAPP_REG_U16_COARSE_INTEGRATION_TIME_MIN		SMIAPP_REG_MK_U16(0x1004)</div><div class='add'>+#define SMIAPP_REG_U16_COARSE_INTEGRATION_TIME_MAX_MARGIN	SMIAPP_REG_MK_U16(0x1006)</div><div class='add'>+#define SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MIN		SMIAPP_REG_MK_U16(0x1008)</div><div class='add'>+#define SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MAX_MARGIN		SMIAPP_REG_MK_U16(0x100a)</div><div class='add'>+#define SMIAPP_REG_U16_DIGITAL_GAIN_CAPABILITY			SMIAPP_REG_MK_U16(0x1080)</div><div class='add'>+#define SMIAPP_REG_U16_DIGITAL_GAIN_MIN				SMIAPP_REG_MK_U16(0x1084)</div><div class='add'>+#define SMIAPP_REG_U16_DIGITAL_GAIN_MAX				SMIAPP_REG_MK_U16(0x1086)</div><div class='add'>+#define SMIAPP_REG_U16_DIGITAL_GAIN_STEP_SIZE			SMIAPP_REG_MK_U16(0x1088)</div><div class='add'>+#define SMIAPP_REG_F32_MIN_EXT_CLK_FREQ_HZ			SMIAPP_REG_MK_F32(0x1100)</div><div class='add'>+#define SMIAPP_REG_F32_MAX_EXT_CLK_FREQ_HZ			SMIAPP_REG_MK_F32(0x1104)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_PRE_PLL_CLK_DIV			SMIAPP_REG_MK_U16(0x1108)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_PRE_PLL_CLK_DIV			SMIAPP_REG_MK_U16(0x110a)</div><div class='add'>+#define SMIAPP_REG_F32_MIN_PLL_IP_FREQ_HZ			SMIAPP_REG_MK_F32(0x110c)</div><div class='add'>+#define SMIAPP_REG_F32_MAX_PLL_IP_FREQ_HZ			SMIAPP_REG_MK_F32(0x1110)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_PLL_MULTIPLIER			SMIAPP_REG_MK_U16(0x1114)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_PLL_MULTIPLIER			SMIAPP_REG_MK_U16(0x1116)</div><div class='add'>+#define SMIAPP_REG_F32_MIN_PLL_OP_FREQ_HZ			SMIAPP_REG_MK_F32(0x1118)</div><div class='add'>+#define SMIAPP_REG_F32_MAX_PLL_OP_FREQ_HZ			SMIAPP_REG_MK_F32(0x111c)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_VT_SYS_CLK_DIV			SMIAPP_REG_MK_U16(0x1120)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_VT_SYS_CLK_DIV			SMIAPP_REG_MK_U16(0x1122)</div><div class='add'>+#define SMIAPP_REG_F32_MIN_VT_SYS_CLK_FREQ_HZ			SMIAPP_REG_MK_F32(0x1124)</div><div class='add'>+#define SMIAPP_REG_F32_MAX_VT_SYS_CLK_FREQ_HZ			SMIAPP_REG_MK_F32(0x1128)</div><div class='add'>+#define SMIAPP_REG_F32_MIN_VT_PIX_CLK_FREQ_HZ			SMIAPP_REG_MK_F32(0x112c)</div><div class='add'>+#define SMIAPP_REG_F32_MAX_VT_PIX_CLK_FREQ_HZ			SMIAPP_REG_MK_F32(0x1130)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_VT_PIX_CLK_DIV			SMIAPP_REG_MK_U16(0x1134)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_VT_PIX_CLK_DIV			SMIAPP_REG_MK_U16(0x1136)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_FRAME_LENGTH_LINES			SMIAPP_REG_MK_U16(0x1140)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_FRAME_LENGTH_LINES			SMIAPP_REG_MK_U16(0x1142)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_LINE_LENGTH_PCK			SMIAPP_REG_MK_U16(0x1144)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_LINE_LENGTH_PCK			SMIAPP_REG_MK_U16(0x1146)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_LINE_BLANKING_PCK			SMIAPP_REG_MK_U16(0x1148)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_FRAME_BLANKING_LINES			SMIAPP_REG_MK_U16(0x114a)</div><div class='add'>+#define SMIAPP_REG_U8_MIN_LINE_LENGTH_PCK_STEP_SIZE		SMIAPP_REG_MK_U8(0x114c)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_OP_SYS_CLK_DIV			SMIAPP_REG_MK_U16(0x1160)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_OP_SYS_CLK_DIV			SMIAPP_REG_MK_U16(0x1162)</div><div class='add'>+#define SMIAPP_REG_F32_MIN_OP_SYS_CLK_FREQ_HZ			SMIAPP_REG_MK_F32(0x1164)</div><div class='add'>+#define SMIAPP_REG_F32_MAX_OP_SYS_CLK_FREQ_HZ			SMIAPP_REG_MK_F32(0x1168)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_OP_PIX_CLK_DIV			SMIAPP_REG_MK_U16(0x116c)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_OP_PIX_CLK_DIV			SMIAPP_REG_MK_U16(0x116e)</div><div class='add'>+#define SMIAPP_REG_F32_MIN_OP_PIX_CLK_FREQ_HZ			SMIAPP_REG_MK_F32(0x1170)</div><div class='add'>+#define SMIAPP_REG_F32_MAX_OP_PIX_CLK_FREQ_HZ			SMIAPP_REG_MK_F32(0x1174)</div><div class='add'>+#define SMIAPP_REG_U16_X_ADDR_MIN				SMIAPP_REG_MK_U16(0x1180)</div><div class='add'>+#define SMIAPP_REG_U16_Y_ADDR_MIN				SMIAPP_REG_MK_U16(0x1182)</div><div class='add'>+#define SMIAPP_REG_U16_X_ADDR_MAX				SMIAPP_REG_MK_U16(0x1184)</div><div class='add'>+#define SMIAPP_REG_U16_Y_ADDR_MAX				SMIAPP_REG_MK_U16(0x1186)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_X_OUTPUT_SIZE			SMIAPP_REG_MK_U16(0x1188)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_Y_OUTPUT_SIZE			SMIAPP_REG_MK_U16(0x118a)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_X_OUTPUT_SIZE			SMIAPP_REG_MK_U16(0x118c)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_Y_OUTPUT_SIZE			SMIAPP_REG_MK_U16(0x118e)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_EVEN_INC				SMIAPP_REG_MK_U16(0x11c0)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_EVEN_INC				SMIAPP_REG_MK_U16(0x11c2)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_ODD_INC				SMIAPP_REG_MK_U16(0x11c4)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_ODD_INC				SMIAPP_REG_MK_U16(0x11c6)</div><div class='add'>+#define SMIAPP_REG_U16_SCALING_CAPABILITY			SMIAPP_REG_MK_U16(0x1200)</div><div class='add'>+#define SMIAPP_REG_U16_SCALER_M_MIN				SMIAPP_REG_MK_U16(0x1204)</div><div class='add'>+#define SMIAPP_REG_U16_SCALER_M_MAX				SMIAPP_REG_MK_U16(0x1206)</div><div class='add'>+#define SMIAPP_REG_U16_SCALER_N_MIN				SMIAPP_REG_MK_U16(0x1208)</div><div class='add'>+#define SMIAPP_REG_U16_SCALER_N_MAX				SMIAPP_REG_MK_U16(0x120a)</div><div class='add'>+#define SMIAPP_REG_U16_SPATIAL_SAMPLING_CAPABILITY		SMIAPP_REG_MK_U16(0x120c)</div><div class='add'>+#define SMIAPP_REG_U8_DIGITAL_CROP_CAPABILITY			SMIAPP_REG_MK_U8(0x120e)</div><div class='add'>+#define SMIAPP_REG_U16_COMPRESSION_CAPABILITY			SMIAPP_REG_MK_U16(0x1300)</div><div class='add'>+#define SMIAPP_REG_U16_MATRIX_ELEMENT_REDINRED			SMIAPP_REG_MK_U16(0x1400)</div><div class='add'>+#define SMIAPP_REG_U16_MATRIX_ELEMENT_GREENINRED		SMIAPP_REG_MK_U16(0x1402)</div><div class='add'>+#define SMIAPP_REG_U16_MATRIX_ELEMENT_BLUEINRED			SMIAPP_REG_MK_U16(0x1404)</div><div class='add'>+#define SMIAPP_REG_U16_MATRIX_ELEMENT_REDINGREEN		SMIAPP_REG_MK_U16(0x1406)</div><div class='add'>+#define SMIAPP_REG_U16_MATRIX_ELEMENT_GREENINGREEN		SMIAPP_REG_MK_U16(0x1408)</div><div class='add'>+#define SMIAPP_REG_U16_MATRIX_ELEMENT_BLUEINGREEN		SMIAPP_REG_MK_U16(0x140a)</div><div class='add'>+#define SMIAPP_REG_U16_MATRIX_ELEMENT_REDINBLUE			SMIAPP_REG_MK_U16(0x140c)</div><div class='add'>+#define SMIAPP_REG_U16_MATRIX_ELEMENT_GREENINBLUE		SMIAPP_REG_MK_U16(0x140e)</div><div class='add'>+#define SMIAPP_REG_U16_MATRIX_ELEMENT_BLUEINBLUE		SMIAPP_REG_MK_U16(0x1410)</div><div class='add'>+#define SMIAPP_REG_U16_FIFO_SIZE_PIXELS				SMIAPP_REG_MK_U16(0x1500)</div><div class='add'>+#define SMIAPP_REG_U8_FIFO_SUPPORT_CAPABILITY			SMIAPP_REG_MK_U8(0x1502)</div><div class='add'>+#define SMIAPP_REG_U8_DPHY_CTRL_CAPABILITY			SMIAPP_REG_MK_U8(0x1600)</div><div class='add'>+#define SMIAPP_REG_U8_CSI_LANE_MODE_CAPABILITY			SMIAPP_REG_MK_U8(0x1601)</div><div class='add'>+#define SMIAPP_REG_U8_CSI_SIGNALLING_MODE_CAPABILITY		SMIAPP_REG_MK_U8(0x1602)</div><div class='add'>+#define SMIAPP_REG_U8_FAST_STANDBY_CAPABILITY			SMIAPP_REG_MK_U8(0x1603)</div><div class='add'>+#define SMIAPP_REG_U8_CCI_ADDRESS_CONTROL_CAPABILITY		SMIAPP_REG_MK_U8(0x1604)</div><div class='add'>+#define SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_1_LANE_MODE_MBPS	SMIAPP_REG_MK_U32(0x1608)</div><div class='add'>+#define SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_2_LANE_MODE_MBPS	SMIAPP_REG_MK_U32(0x160c)</div><div class='add'>+#define SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_3_LANE_MODE_MBPS	SMIAPP_REG_MK_U32(0x1610)</div><div class='add'>+#define SMIAPP_REG_U32_MAX_PER_LANE_BITRATE_4_LANE_MODE_MBPS	SMIAPP_REG_MK_U32(0x1614)</div><div class='add'>+#define SMIAPP_REG_U8_TEMP_SENSOR_CAPABILITY			SMIAPP_REG_MK_U8(0x1618)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_FRAME_LENGTH_LINES_BIN		SMIAPP_REG_MK_U16(0x1700)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_FRAME_LENGTH_LINES_BIN		SMIAPP_REG_MK_U16(0x1702)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_LINE_LENGTH_PCK_BIN			SMIAPP_REG_MK_U16(0x1704)</div><div class='add'>+#define SMIAPP_REG_U16_MAX_LINE_LENGTH_PCK_BIN			SMIAPP_REG_MK_U16(0x1706)</div><div class='add'>+#define SMIAPP_REG_U16_MIN_LINE_BLANKING_PCK_BIN		SMIAPP_REG_MK_U16(0x1708)</div><div class='add'>+#define SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MIN_BIN		SMIAPP_REG_MK_U16(0x170a)</div><div class='add'>+#define SMIAPP_REG_U16_FINE_INTEGRATION_TIME_MAX_MARGIN_BIN	SMIAPP_REG_MK_U16(0x170c)</div><div class='add'>+#define SMIAPP_REG_U8_BINNING_CAPABILITY			SMIAPP_REG_MK_U8(0x1710)</div><div class='add'>+#define SMIAPP_REG_U8_BINNING_WEIGHTING_CAPABILITY		SMIAPP_REG_MK_U8(0x1711)</div><div class='add'>+#define SMIAPP_REG_U8_BINNING_SUBTYPES				SMIAPP_REG_MK_U8(0x1712)</div><div class='add'>+#define SMIAPP_REG_U8_BINNING_TYPE_n(n)				SMIAPP_REG_MK_U8(0x1713 + (n)) /* 1 &lt;= n &lt;= 237 */</div><div class='add'>+#define SMIAPP_REG_U8_DATA_TRANSFER_IF_CAPABILITY		SMIAPP_REG_MK_U8(0x1800)</div><div class='add'>+#define SMIAPP_REG_U8_SHADING_CORRECTION_CAPABILITY		SMIAPP_REG_MK_U8(0x1900)</div><div class='add'>+#define SMIAPP_REG_U8_GREEN_IMBALANCE_CAPABILITY		SMIAPP_REG_MK_U8(0x1901)</div><div class='add'>+#define SMIAPP_REG_U8_BLACK_LEVEL_CAPABILITY			SMIAPP_REG_MK_U8(0x1902)</div><div class='add'>+#define SMIAPP_REG_U8_MODULE_SPECIFIC_CORRECTION_CAPABILITY	SMIAPP_REG_MK_U8(0x1903)</div><div class='add'>+#define SMIAPP_REG_U16_DEFECT_CORRECTION_CAPABILITY		SMIAPP_REG_MK_U16(0x1904)</div><div class='add'>+#define SMIAPP_REG_U16_DEFECT_CORRECTION_CAPABILITY_2		SMIAPP_REG_MK_U16(0x1906)</div><div class='add'>+#define SMIAPP_REG_U8_EDOF_CAPABILITY				SMIAPP_REG_MK_U8(0x1980)</div><div class='add'>+#define SMIAPP_REG_U8_ESTIMATION_FRAMES				SMIAPP_REG_MK_U8(0x1981)</div><div class='add'>+#define SMIAPP_REG_U8_SUPPORTS_SHARPNESS_ADJ			SMIAPP_REG_MK_U8(0x1982)</div><div class='add'>+#define SMIAPP_REG_U8_SUPPORTS_DENOISING_ADJ			SMIAPP_REG_MK_U8(0x1983)</div><div class='add'>+#define SMIAPP_REG_U8_SUPPORTS_MODULE_SPECIFIC_ADJ		SMIAPP_REG_MK_U8(0x1984)</div><div class='add'>+#define SMIAPP_REG_U8_SUPPORTS_DEPTH_OF_FIELD_ADJ		SMIAPP_REG_MK_U8(0x1985)</div><div class='add'>+#define SMIAPP_REG_U8_SUPPORTS_FOCUS_DISTANCE_ADJ		SMIAPP_REG_MK_U8(0x1986)</div><div class='add'>+#define SMIAPP_REG_U8_COLOUR_FEEDBACK_CAPABILITY		SMIAPP_REG_MK_U8(0x1987)</div><div class='add'>+#define SMIAPP_REG_U8_EDOF_SUPPORT_AB_NXM			SMIAPP_REG_MK_U8(0x1988)</div><div class='add'>+#define SMIAPP_REG_U8_ESTIMATION_MODE_CAPABILITY		SMIAPP_REG_MK_U8(0x19c0)</div><div class='add'>+#define SMIAPP_REG_U8_ESTIMATION_ZONE_CAPABILITY		SMIAPP_REG_MK_U8(0x19c1)</div><div class='add'>+#define SMIAPP_REG_U16_EST_DEPTH_OF_FIELD			SMIAPP_REG_MK_U16(0x19c2)</div><div class='add'>+#define SMIAPP_REG_U16_EST_FOCUS_DISTANCE			SMIAPP_REG_MK_U16(0x19c4)</div><div class='add'>+#define SMIAPP_REG_U16_CAPABILITY_TRDY_MIN			SMIAPP_REG_MK_U16(0x1a00)</div><div class='add'>+#define SMIAPP_REG_U8_FLASH_MODE_CAPABILITY			SMIAPP_REG_MK_U8(0x1a02)</div><div class='add'>+#define SMIAPP_REG_U16_MECH_SHUT_AND_ACT_START_ADDR		SMIAPP_REG_MK_U16(0x1b02)</div><div class='add'>+#define SMIAPP_REG_U8_ACTUATOR_CAPABILITY			SMIAPP_REG_MK_U8(0x1b04)</div><div class='add'>+#define SMIAPP_REG_U16_ACTUATOR_TYPE				SMIAPP_REG_MK_U16(0x1b40)</div><div class='add'>+#define SMIAPP_REG_U8_AF_DEVICE_ADDRESS				SMIAPP_REG_MK_U8(0x1b42)</div><div class='add'>+#define SMIAPP_REG_U16_FOCUS_CHANGE_ADDRESS			SMIAPP_REG_MK_U16(0x1b44)</div><div class='add'>+#define SMIAPP_REG_U8_BRACKETING_LUT_CAPABILITY_1		SMIAPP_REG_MK_U8(0x1c00)</div><div class='add'>+#define SMIAPP_REG_U8_BRACKETING_LUT_CAPABILITY_2		SMIAPP_REG_MK_U8(0x1c01)</div><div class='add'>+#define SMIAPP_REG_U8_BRACKETING_LUT_SIZE			SMIAPP_REG_MK_U8(0x1c02)</div><div class='head'>diff --git a/drivers/media/video/smiapp/smiapp-reg.h b/drivers/media/video/smiapp/smiapp-reg.h<br/>new file mode 100644<br/>index 000000000000..d0167aa17534<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp/smiapp-reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-reg.h</a></div><div class='hunk'>@@ -0,0 +1,122 @@</div><div class='add'>+/*</div><div class='add'>+ * drivers/media/video/smiapp/smiapp-reg.h</div><div class='add'>+ *</div><div class='add'>+ * Generic driver for SMIA/SMIA++ compliant camera modules</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011--2012 Nokia Corporation</div><div class='add'>+ * Contact: Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __SMIAPP_REG_H_</div><div class='add'>+#define __SMIAPP_REG_H_</div><div class='add'>+</div><div class='add'>+#include "smiapp-reg-defs.h"</div><div class='add'>+</div><div class='add'>+/* Bits for above register */</div><div class='add'>+#define SMIAPP_IMAGE_ORIENTATION_HFLIP		(1 &lt;&lt; 0)</div><div class='add'>+#define SMIAPP_IMAGE_ORIENTATION_VFLIP		(1 &lt;&lt; 1)</div><div class='add'>+</div><div class='add'>+#define SMIAPP_DATA_TRANSFER_IF_1_CTRL_EN		(1 &lt;&lt; 0)</div><div class='add'>+#define SMIAPP_DATA_TRANSFER_IF_1_CTRL_RD_EN		(0 &lt;&lt; 1)</div><div class='add'>+#define SMIAPP_DATA_TRANSFER_IF_1_CTRL_WR_EN		(1 &lt;&lt; 1)</div><div class='add'>+#define SMIAPP_DATA_TRANSFER_IF_1_CTRL_ERR_CLEAR	(1 &lt;&lt; 2)</div><div class='add'>+#define SMIAPP_DATA_TRANSFER_IF_1_STATUS_RD_READY	(1 &lt;&lt; 0)</div><div class='add'>+#define SMIAPP_DATA_TRANSFER_IF_1_STATUS_WR_READY	(1 &lt;&lt; 1)</div><div class='add'>+#define SMIAPP_DATA_TRANSFER_IF_1_STATUS_EDATA		(1 &lt;&lt; 2)</div><div class='add'>+#define SMIAPP_DATA_TRANSFER_IF_1_STATUS_EUSAGE		(1 &lt;&lt; 3)</div><div class='add'>+</div><div class='add'>+#define SMIAPP_SOFTWARE_RESET				(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+#define SMIAPP_FLASH_MODE_CAPABILITY_SINGLE_STROBE	(1 &lt;&lt; 0)</div><div class='add'>+#define SMIAPP_FLASH_MODE_CAPABILITY_MULTIPLE_STROBE	(1 &lt;&lt; 1)</div><div class='add'>+</div><div class='add'>+#define SMIAPP_DPHY_CTRL_AUTOMATIC			0</div><div class='add'>+/* DPHY control based on REQUESTED_LINK_BIT_RATE_MBPS */</div><div class='add'>+#define SMIAPP_DPHY_CTRL_UI				1</div><div class='add'>+#define SMIAPP_DPHY_CTRL_REGISTER			2</div><div class='add'>+</div><div class='add'>+#define SMIAPP_COMPRESSION_MODE_SIMPLE_PREDICTOR	1</div><div class='add'>+#define SMIAPP_COMPRESSION_MODE_ADVANCED_PREDICTOR	2</div><div class='add'>+</div><div class='add'>+#define SMIAPP_MODE_SELECT_SOFTWARE_STANDBY		0</div><div class='add'>+#define SMIAPP_MODE_SELECT_STREAMING			1</div><div class='add'>+</div><div class='add'>+#define SMIAPP_SCALING_MODE_NONE			0</div><div class='add'>+#define SMIAPP_SCALING_MODE_HORIZONTAL			1</div><div class='add'>+#define SMIAPP_SCALING_MODE_BOTH			2</div><div class='add'>+</div><div class='add'>+#define SMIAPP_SCALING_CAPABILITY_NONE			0</div><div class='add'>+#define SMIAPP_SCALING_CAPABILITY_HORIZONTAL		1</div><div class='add'>+#define SMIAPP_SCALING_CAPABILITY_BOTH			2 /* horizontal/both */</div><div class='add'>+</div><div class='add'>+/* digital crop right before scaler */</div><div class='add'>+#define SMIAPP_DIGITAL_CROP_CAPABILITY_NONE		0</div><div class='add'>+#define SMIAPP_DIGITAL_CROP_CAPABILITY_INPUT_CROP	1</div><div class='add'>+</div><div class='add'>+#define SMIAPP_BINNING_CAPABILITY_NO			0</div><div class='add'>+#define SMIAPP_BINNING_CAPABILITY_YES			1</div><div class='add'>+</div><div class='add'>+/* Maximum number of binning subtypes */</div><div class='add'>+#define SMIAPP_BINNING_SUBTYPES				253</div><div class='add'>+</div><div class='add'>+#define SMIAPP_PIXEL_ORDER_GRBG				0</div><div class='add'>+#define SMIAPP_PIXEL_ORDER_RGGB				1</div><div class='add'>+#define SMIAPP_PIXEL_ORDER_BGGR				2</div><div class='add'>+#define SMIAPP_PIXEL_ORDER_GBRG				3</div><div class='add'>+</div><div class='add'>+#define SMIAPP_DATA_FORMAT_MODEL_TYPE_NORMAL		1</div><div class='add'>+#define SMIAPP_DATA_FORMAT_MODEL_TYPE_EXTENDED		2</div><div class='add'>+#define SMIAPP_DATA_FORMAT_MODEL_TYPE_NORMAL_N		8</div><div class='add'>+#define SMIAPP_DATA_FORMAT_MODEL_TYPE_EXTENDED_N	16</div><div class='add'>+</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_MODEL_TYPE_2BYTE		0x01</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_MODEL_TYPE_4BYTE		0x02</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_MODEL_SUBTYPE_NROWS_MASK	0x0f</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_MODEL_SUBTYPE_NCOLS_MASK	0xf0</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_MODEL_SUBTYPE_NCOLS_SHIFT	4</div><div class='add'>+</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_DESC_2_PIXELCODE_MASK	0xf000</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_DESC_2_PIXELCODE_SHIFT	12</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_DESC_2_PIXELS_MASK		0x0fff</div><div class='add'>+</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_DESC_4_PIXELCODE_MASK	0xf0000000</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_DESC_4_PIXELCODE_SHIFT	28</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_DESC_4_PIXELS_MASK		0x0000ffff</div><div class='add'>+</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_EMBEDDED	1</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_DUMMY	2</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_BLACK	3</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_DARK		4</div><div class='add'>+#define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_VISIBLE	5</div><div class='add'>+</div><div class='add'>+#define SMIAPP_FAST_STANDBY_CTRL_COMPLETE_FRAMES	0</div><div class='add'>+#define SMIAPP_FAST_STANDBY_CTRL_IMMEDIATE		1</div><div class='add'>+</div><div class='add'>+/* Scaling N factor */</div><div class='add'>+#define SMIAPP_SCALE_N					16</div><div class='add'>+</div><div class='add'>+/* Image statistics registers */</div><div class='add'>+/* Registers 0x2000 to 0x2fff are reserved for future</div><div class='add'>+ * use for statistics features.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Manufacturer Specific Registers: 0x3000 to 0x3fff</div><div class='add'>+ * The manufacturer specifies these as a black box.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#endif /* __SMIAPP_REG_H_ */</div><div class='head'>diff --git a/drivers/media/video/smiapp/smiapp-regs.c b/drivers/media/video/smiapp/smiapp-regs.c<br/>new file mode 100644<br/>index 000000000000..b1812b17a407<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp/smiapp-regs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-regs.c</a></div><div class='hunk'>@@ -0,0 +1,273 @@</div><div class='add'>+/*</div><div class='add'>+ * drivers/media/video/smiapp/smiapp-regs.c</div><div class='add'>+ *</div><div class='add'>+ * Generic driver for SMIA/SMIA++ compliant camera modules</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011--2012 Nokia Corporation</div><div class='add'>+ * Contact: Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+</div><div class='add'>+#include "smiapp.h"</div><div class='add'>+#include "smiapp-regs.h"</div><div class='add'>+</div><div class='add'>+static uint32_t float_to_u32_mul_1000000(struct i2c_client *client,</div><div class='add'>+					 uint32_t phloat)</div><div class='add'>+{</div><div class='add'>+	int32_t exp;</div><div class='add'>+	uint64_t man;</div><div class='add'>+</div><div class='add'>+	if (phloat &gt;= 0x80000000) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "this is a negative number\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phloat == 0x7f800000)</div><div class='add'>+		return ~0; /* Inf. */</div><div class='add'>+</div><div class='add'>+	if ((phloat &amp; 0x7f800000) == 0x7f800000) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "NaN or other special number\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Valid cases begin here */</div><div class='add'>+	if (phloat == 0)</div><div class='add'>+		return 0; /* Valid zero */</div><div class='add'>+</div><div class='add'>+	if (phloat &gt; 0x4f800000)</div><div class='add'>+		return ~0; /* larger than 4294967295 */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Unbias exponent (note how phloat is now guaranteed to</div><div class='add'>+	 * have 0 in the high bit)</div><div class='add'>+	 */</div><div class='add'>+	exp = ((int32_t)phloat &gt;&gt; 23) - 127;</div><div class='add'>+</div><div class='add'>+	/* Extract mantissa, add missing '1' bit and it's in MHz */</div><div class='add'>+	man = ((phloat &amp; 0x7fffff) | 0x800000) * 1000000ULL;</div><div class='add'>+</div><div class='add'>+	if (exp &lt; 0)</div><div class='add'>+		man &gt;&gt;= -exp;</div><div class='add'>+	else</div><div class='add'>+		man &lt;&lt;= exp;</div><div class='add'>+</div><div class='add'>+	man &gt;&gt;= 23; /* Remove mantissa bias */</div><div class='add'>+</div><div class='add'>+	return man &amp; 0xffffffff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Read a 8/16/32-bit i2c register.  The value is returned in 'val'.</div><div class='add'>+ * Returns zero if successful, or non-zero otherwise.</div><div class='add'>+ */</div><div class='add'>+static int ____smiapp_read(struct smiapp_sensor *sensor, u16 reg,</div><div class='add'>+			   u16 len, u32 *val)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	struct i2c_msg msg;</div><div class='add'>+	unsigned char data[4];</div><div class='add'>+	u16 offset = reg;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	msg.addr = client-&gt;addr;</div><div class='add'>+	msg.flags = 0;</div><div class='add'>+	msg.len = 2;</div><div class='add'>+	msg.buf = data;</div><div class='add'>+</div><div class='add'>+	/* high byte goes out first */</div><div class='add'>+	data[0] = (u8) (offset &gt;&gt; 8);</div><div class='add'>+	data[1] = (u8) offset;</div><div class='add'>+	r = i2c_transfer(client-&gt;adapter, &amp;msg, 1);</div><div class='add'>+	if (r != 1) {</div><div class='add'>+		if (r &gt;= 0)</div><div class='add'>+			r = -EBUSY;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg.len = len;</div><div class='add'>+	msg.flags = I2C_M_RD;</div><div class='add'>+	r = i2c_transfer(client-&gt;adapter, &amp;msg, 1);</div><div class='add'>+	if (r != 1) {</div><div class='add'>+		if (r &gt;= 0)</div><div class='add'>+			r = -EBUSY;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*val = 0;</div><div class='add'>+	/* high byte comes first */</div><div class='add'>+	switch (len) {</div><div class='add'>+	case SMIA_REG_32BIT:</div><div class='add'>+		*val = (data[0] &lt;&lt; 24) + (data[1] &lt;&lt; 16) + (data[2] &lt;&lt; 8) +</div><div class='add'>+			data[3];</div><div class='add'>+		break;</div><div class='add'>+	case SMIA_REG_16BIT:</div><div class='add'>+		*val = (data[0] &lt;&lt; 8) + data[1];</div><div class='add'>+		break;</div><div class='add'>+	case SMIA_REG_8BIT:</div><div class='add'>+		*val = data[0];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	dev_err(&amp;client-&gt;dev, "read from offset 0x%x error %d\n", offset, r);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Read a register using 8-bit access only. */</div><div class='add'>+static int ____smiapp_read_8only(struct smiapp_sensor *sensor, u16 reg,</div><div class='add'>+				 u16 len, u32 *val)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	*val = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++) {</div><div class='add'>+		u32 val8;</div><div class='add'>+</div><div class='add'>+		rval = ____smiapp_read(sensor, reg + i, 1, &amp;val8);</div><div class='add'>+		if (rval &lt; 0)</div><div class='add'>+			return rval;</div><div class='add'>+		*val |= val8 &lt;&lt; ((len - i - 1) &lt;&lt; 3);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Read a 8/16/32-bit i2c register.  The value is returned in 'val'.</div><div class='add'>+ * Returns zero if successful, or non-zero otherwise.</div><div class='add'>+ */</div><div class='add'>+static int __smiapp_read(struct smiapp_sensor *sensor, u32 reg, u32 *val,</div><div class='add'>+			 bool only8)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	unsigned int len = (u8)(reg &gt;&gt; 16);</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	if (len != SMIA_REG_8BIT &amp;&amp; len != SMIA_REG_16BIT</div><div class='add'>+	    &amp;&amp; len != SMIA_REG_32BIT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (smiapp_quirk_reg(sensor, reg, val))</div><div class='add'>+		goto found_quirk;</div><div class='add'>+</div><div class='add'>+	if (len == SMIA_REG_8BIT &amp;&amp; !only8)</div><div class='add'>+		rval = ____smiapp_read(sensor, (u16)reg, len, val);</div><div class='add'>+	else</div><div class='add'>+		rval = ____smiapp_read_8only(sensor, (u16)reg, len, val);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+found_quirk:</div><div class='add'>+	if (reg &amp; SMIA_REG_FLAG_FLOAT)</div><div class='add'>+		*val = float_to_u32_mul_1000000(client, *val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int smiapp_read(struct smiapp_sensor *sensor, u32 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	return __smiapp_read(</div><div class='add'>+		sensor, reg, val,</div><div class='add'>+		smiapp_needs_quirk(sensor,</div><div class='add'>+				   SMIAPP_QUIRK_FLAG_8BIT_READ_ONLY));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int smiapp_read_8only(struct smiapp_sensor *sensor, u32 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	return __smiapp_read(sensor, reg, val, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Write to a 8/16-bit register.</div><div class='add'>+ * Returns zero if successful, or non-zero otherwise.</div><div class='add'>+ */</div><div class='add'>+int smiapp_write(struct smiapp_sensor *sensor, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(&amp;sensor-&gt;src-&gt;sd);</div><div class='add'>+	struct i2c_msg msg;</div><div class='add'>+	unsigned char data[6];</div><div class='add'>+	unsigned int retries;</div><div class='add'>+	unsigned int flags = reg &gt;&gt; 24;</div><div class='add'>+	unsigned int len = (u8)(reg &gt;&gt; 16);</div><div class='add'>+	u16 offset = reg;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if ((len != SMIA_REG_8BIT &amp;&amp; len != SMIA_REG_16BIT &amp;&amp;</div><div class='add'>+	     len != SMIA_REG_32BIT) || flags)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	msg.addr = client-&gt;addr;</div><div class='add'>+	msg.flags = 0; /* Write */</div><div class='add'>+	msg.len = 2 + len;</div><div class='add'>+	msg.buf = data;</div><div class='add'>+</div><div class='add'>+	/* high byte goes out first */</div><div class='add'>+	data[0] = (u8) (reg &gt;&gt; 8);</div><div class='add'>+	data[1] = (u8) (reg &amp; 0xff);</div><div class='add'>+</div><div class='add'>+	switch (len) {</div><div class='add'>+	case SMIA_REG_8BIT:</div><div class='add'>+		data[2] = val;</div><div class='add'>+		break;</div><div class='add'>+	case SMIA_REG_16BIT:</div><div class='add'>+		data[2] = val &gt;&gt; 8;</div><div class='add'>+		data[3] = val;</div><div class='add'>+		break;</div><div class='add'>+	case SMIA_REG_32BIT:</div><div class='add'>+		data[2] = val &gt;&gt; 24;</div><div class='add'>+		data[3] = val &gt;&gt; 16;</div><div class='add'>+		data[4] = val &gt;&gt; 8;</div><div class='add'>+		data[5] = val;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (retries = 0; retries &lt; 5; retries++) {</div><div class='add'>+		/*</div><div class='add'>+		 * Due to unknown reason sensor stops responding. This</div><div class='add'>+		 * loop is a temporaty solution until the root cause</div><div class='add'>+		 * is found.</div><div class='add'>+		 */</div><div class='add'>+		r = i2c_transfer(client-&gt;adapter, &amp;msg, 1);</div><div class='add'>+		if (r == 1) {</div><div class='add'>+			if (retries)</div><div class='add'>+				dev_err(&amp;client-&gt;dev,</div><div class='add'>+					"sensor i2c stall encountered. "</div><div class='add'>+					"retries: %d\n", retries);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		usleep_range(2000, 2000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_err(&amp;client-&gt;dev,</div><div class='add'>+		"wrote 0x%x to offset 0x%x error %d\n", val, offset, r);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/media/video/smiapp/smiapp-regs.h b/drivers/media/video/smiapp/smiapp-regs.h<br/>new file mode 100644<br/>index 000000000000..7f9013b47971<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp/smiapp-regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp-regs.h</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+/*</div><div class='add'>+ * include/media/smiapp/smiapp-regs.h</div><div class='add'>+ *</div><div class='add'>+ * Generic driver for SMIA/SMIA++ compliant camera modules</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011--2012 Nokia Corporation</div><div class='add'>+ * Contact: Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef SMIAPP_REGS_H</div><div class='add'>+#define SMIAPP_REGS_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/* Use upper 8 bits of the type field for flags */</div><div class='add'>+#define SMIA_REG_FLAG_FLOAT		(1 &lt;&lt; 24)</div><div class='add'>+</div><div class='add'>+#define SMIA_REG_8BIT			1</div><div class='add'>+#define SMIA_REG_16BIT			2</div><div class='add'>+#define SMIA_REG_32BIT			4</div><div class='add'>+struct smia_reg {</div><div class='add'>+	u16 type;</div><div class='add'>+	u16 reg;			/* 16-bit offset */</div><div class='add'>+	u32 val;			/* 8/16/32-bit value */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct smiapp_sensor;</div><div class='add'>+</div><div class='add'>+int smiapp_read(struct smiapp_sensor *sensor, u32 reg, u32 *val);</div><div class='add'>+int smiapp_read_8only(struct smiapp_sensor *sensor, u32 reg, u32 *val);</div><div class='add'>+int smiapp_write(struct smiapp_sensor *sensor, u32 reg, u32 val);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/media/video/smiapp/smiapp.h b/drivers/media/video/smiapp/smiapp.h<br/>new file mode 100644<br/>index 000000000000..587f7f11238d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/smiapp/smiapp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/smiapp/smiapp.h</a></div><div class='hunk'>@@ -0,0 +1,252 @@</div><div class='add'>+/*</div><div class='add'>+ * drivers/media/video/smiapp/smiapp.h</div><div class='add'>+ *</div><div class='add'>+ * Generic driver for SMIA/SMIA++ compliant camera modules</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2010--2012 Nokia Corporation</div><div class='add'>+ * Contact: Sakari Ailus &lt;sakari.ailus@maxwell.research.nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __SMIAPP_PRIV_H_</div><div class='add'>+#define __SMIAPP_PRIV_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='add'>+#include &lt;media/v4l2-subdev.h&gt;</div><div class='add'>+#include &lt;media/smiapp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "smiapp-pll.h"</div><div class='add'>+#include "smiapp-reg.h"</div><div class='add'>+#include "smiapp-regs.h"</div><div class='add'>+#include "smiapp-quirk.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Standard SMIA++ constants</div><div class='add'>+ */</div><div class='add'>+#define SMIA_VERSION_1			10</div><div class='add'>+#define SMIAPP_VERSION_0_8		8 /* Draft 0.8 */</div><div class='add'>+#define SMIAPP_VERSION_0_9		9 /* Draft 0.9 */</div><div class='add'>+#define SMIAPP_VERSION_1		10</div><div class='add'>+</div><div class='add'>+#define SMIAPP_PROFILE_0		0</div><div class='add'>+#define SMIAPP_PROFILE_1		1</div><div class='add'>+#define SMIAPP_PROFILE_2		2</div><div class='add'>+</div><div class='add'>+#define SMIAPP_NVM_PAGE_SIZE		64	/* bytes */</div><div class='add'>+</div><div class='add'>+#define SMIAPP_RESET_DELAY_CLOCKS	2400</div><div class='add'>+#define SMIAPP_RESET_DELAY(clk)				\</div><div class='add'>+	(1000 +	(SMIAPP_RESET_DELAY_CLOCKS * 1000	\</div><div class='add'>+		 + (clk) / 1000 - 1) / ((clk) / 1000))</div><div class='add'>+</div><div class='add'>+#include "smiapp-limits.h"</div><div class='add'>+</div><div class='add'>+struct smiapp_quirk;</div><div class='add'>+</div><div class='add'>+#define SMIAPP_MODULE_IDENT_FLAG_REV_LE		(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+struct smiapp_module_ident {</div><div class='add'>+	u8 manufacturer_id;</div><div class='add'>+	u16 model_id;</div><div class='add'>+	u8 revision_number_major;</div><div class='add'>+</div><div class='add'>+	u8 flags;</div><div class='add'>+</div><div class='add'>+	char *name;</div><div class='add'>+	const struct smiapp_quirk *quirk;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct smiapp_module_info {</div><div class='add'>+	u32 manufacturer_id;</div><div class='add'>+	u32 model_id;</div><div class='add'>+	u32 revision_number_major;</div><div class='add'>+	u32 revision_number_minor;</div><div class='add'>+</div><div class='add'>+	u32 module_year;</div><div class='add'>+	u32 module_month;</div><div class='add'>+	u32 module_day;</div><div class='add'>+</div><div class='add'>+	u32 sensor_manufacturer_id;</div><div class='add'>+	u32 sensor_model_id;</div><div class='add'>+	u32 sensor_revision_number;</div><div class='add'>+	u32 sensor_firmware_version;</div><div class='add'>+</div><div class='add'>+	u32 smia_version;</div><div class='add'>+	u32 smiapp_version;</div><div class='add'>+</div><div class='add'>+	u32 smiapp_profile;</div><div class='add'>+</div><div class='add'>+	char *name;</div><div class='add'>+	const struct smiapp_quirk *quirk;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define SMIAPP_IDENT_FQ(manufacturer, model, rev, fl, _name, _quirk)	\</div><div class='add'>+	{ .manufacturer_id = manufacturer,				\</div><div class='add'>+	  .model_id = model,						\</div><div class='add'>+	  .revision_number_major = rev,					\</div><div class='add'>+	  .flags = fl,							\</div><div class='add'>+	  .name = _name,						\</div><div class='add'>+	  .quirk = _quirk, }</div><div class='add'>+</div><div class='add'>+#define SMIAPP_IDENT_LQ(manufacturer, model, rev, _name, _quirk)	\</div><div class='add'>+	{ .manufacturer_id = manufacturer,				\</div><div class='add'>+	  .model_id = model,						\</div><div class='add'>+	  .revision_number_major = rev,					\</div><div class='add'>+	  .flags = SMIAPP_MODULE_IDENT_FLAG_REV_LE,			\</div><div class='add'>+	  .name = _name,						\</div><div class='add'>+	  .quirk = _quirk, }</div><div class='add'>+</div><div class='add'>+#define SMIAPP_IDENT_L(manufacturer, model, rev, _name)			\</div><div class='add'>+	{ .manufacturer_id = manufacturer,				\</div><div class='add'>+	  .model_id = model,						\</div><div class='add'>+	  .revision_number_major = rev,					\</div><div class='add'>+	  .flags = SMIAPP_MODULE_IDENT_FLAG_REV_LE,			\</div><div class='add'>+	  .name = _name, }</div><div class='add'>+</div><div class='add'>+#define SMIAPP_IDENT_Q(manufacturer, model, rev, _name, _quirk)		\</div><div class='add'>+	{ .manufacturer_id = manufacturer,				\</div><div class='add'>+	  .model_id = model,						\</div><div class='add'>+	  .revision_number_major = rev,					\</div><div class='add'>+	  .flags = 0,							\</div><div class='add'>+	  .name = _name,						\</div><div class='add'>+	  .quirk = _quirk, }</div><div class='add'>+</div><div class='add'>+#define SMIAPP_IDENT(manufacturer, model, rev, _name)			\</div><div class='add'>+	{ .manufacturer_id = manufacturer,				\</div><div class='add'>+	  .model_id = model,						\</div><div class='add'>+	  .revision_number_major = rev,					\</div><div class='add'>+	  .flags = 0,							\</div><div class='add'>+	  .name = _name, }</div><div class='add'>+</div><div class='add'>+struct smiapp_reg_limits {</div><div class='add'>+	u32 addr;</div><div class='add'>+	char *what;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct smiapp_reg_limits smiapp_reg_limits[];</div><div class='add'>+</div><div class='add'>+struct smiapp_csi_data_format {</div><div class='add'>+	u32 code;</div><div class='add'>+	u8 width;</div><div class='add'>+	u8 compressed;</div><div class='add'>+	u8 pixel_order;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define SMIAPP_SUBDEVS			3</div><div class='add'>+</div><div class='add'>+#define SMIAPP_PA_PAD_SRC		0</div><div class='add'>+#define SMIAPP_PAD_SINK			0</div><div class='add'>+#define SMIAPP_PAD_SRC			1</div><div class='add'>+#define SMIAPP_PADS			2</div><div class='add'>+</div><div class='add'>+struct smiapp_binning_subtype {</div><div class='add'>+	u8 horizontal:4;</div><div class='add'>+	u8 vertical:4;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct smiapp_subdev {</div><div class='add'>+	struct v4l2_subdev sd;</div><div class='add'>+	struct media_pad pads[2];</div><div class='add'>+	struct v4l2_rect sink_fmt;</div><div class='add'>+	struct v4l2_rect crop[2];</div><div class='add'>+	struct v4l2_rect compose; /* compose on sink */</div><div class='add'>+	unsigned short sink_pad;</div><div class='add'>+	unsigned short source_pad;</div><div class='add'>+	int npads;</div><div class='add'>+	struct smiapp_sensor *sensor;</div><div class='add'>+	struct v4l2_ctrl_handler ctrl_handler;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * struct smiapp_sensor - Main device structure</div><div class='add'>+ */</div><div class='add'>+struct smiapp_sensor {</div><div class='add'>+	/*</div><div class='add'>+	 * "mutex" is used to serialise access to all fields here</div><div class='add'>+	 * except v4l2_ctrls at the end of the struct. "mutex" is also</div><div class='add'>+	 * used to serialise access to file handle specific</div><div class='add'>+	 * information. The exception to this rule is the power_mutex</div><div class='add'>+	 * below.</div><div class='add'>+	 */</div><div class='add'>+	struct mutex mutex;</div><div class='add'>+	/*</div><div class='add'>+	 * power_mutex is used to serialise power management related</div><div class='add'>+	 * activities. Acquiring "mutex" at that time isn't necessary</div><div class='add'>+	 * since there are no other users anyway.</div><div class='add'>+	 */</div><div class='add'>+	struct mutex power_mutex;</div><div class='add'>+	struct smiapp_subdev ssds[SMIAPP_SUBDEVS];</div><div class='add'>+	u32 ssds_used;</div><div class='add'>+	struct smiapp_subdev *src;</div><div class='add'>+	struct smiapp_subdev *binner;</div><div class='add'>+	struct smiapp_subdev *scaler;</div><div class='add'>+	struct smiapp_subdev *pixel_array;</div><div class='add'>+	struct smiapp_platform_data *platform_data;</div><div class='add'>+	struct regulator *vana;</div><div class='add'>+	struct clk *ext_clk;</div><div class='add'>+	u32 limits[SMIAPP_LIMIT_LAST];</div><div class='add'>+	u8 nbinning_subtypes;</div><div class='add'>+	struct smiapp_binning_subtype binning_subtypes[SMIAPP_BINNING_SUBTYPES];</div><div class='add'>+	u32 mbus_frame_fmts;</div><div class='add'>+	const struct smiapp_csi_data_format *csi_format;</div><div class='add'>+	const struct smiapp_csi_data_format *internal_csi_format;</div><div class='add'>+	u32 default_mbus_frame_fmts;</div><div class='add'>+	int default_pixel_order;</div><div class='add'>+</div><div class='add'>+	u8 binning_horizontal;</div><div class='add'>+	u8 binning_vertical;</div><div class='add'>+</div><div class='add'>+	u8 scale_m;</div><div class='add'>+	u8 scaling_mode;</div><div class='add'>+</div><div class='add'>+	u8 hvflip_inv_mask; /* H/VFLIP inversion due to sensor orientation */</div><div class='add'>+	u8 flash_capability;</div><div class='add'>+	u8 frame_skip;</div><div class='add'>+</div><div class='add'>+	int power_count;</div><div class='add'>+</div><div class='add'>+	bool streaming;</div><div class='add'>+	bool dev_init_done;</div><div class='add'>+</div><div class='add'>+	u8 *nvm;		/* nvm memory buffer */</div><div class='add'>+	unsigned int nvm_size;	/* bytes */</div><div class='add'>+</div><div class='add'>+	struct smiapp_module_info minfo;</div><div class='add'>+</div><div class='add'>+	struct smiapp_pll pll;</div><div class='add'>+</div><div class='add'>+	/* Pixel array controls */</div><div class='add'>+	struct v4l2_ctrl *analog_gain;</div><div class='add'>+	struct v4l2_ctrl *exposure;</div><div class='add'>+	struct v4l2_ctrl *hflip;</div><div class='add'>+	struct v4l2_ctrl *vflip;</div><div class='add'>+	struct v4l2_ctrl *vblank;</div><div class='add'>+	struct v4l2_ctrl *hblank;</div><div class='add'>+	struct v4l2_ctrl *pixel_rate_parray;</div><div class='add'>+	/* src controls */</div><div class='add'>+	struct v4l2_ctrl *link_freq;</div><div class='add'>+	struct v4l2_ctrl *pixel_rate_csi;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define to_smiapp_subdev(_sd)				\</div><div class='add'>+	container_of(_sd, struct smiapp_subdev, sd)</div><div class='add'>+</div><div class='add'>+#define to_smiapp_sensor(_sd)	\</div><div class='add'>+	(to_smiapp_subdev(_sd)-&gt;sensor)</div><div class='add'>+</div><div class='add'>+#endif /* __SMIAPP_PRIV_H_ */</div><div class='head'>diff --git a/drivers/media/video/sn9c102/sn9c102_core.c b/drivers/media/video/sn9c102/sn9c102_core.c<br/>index c2882fa5be85..19ea780b16ff 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/sn9c102/sn9c102_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/sn9c102/sn9c102_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/sn9c102/sn9c102_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/sn9c102/sn9c102_core.c</a></div><div class='hunk'>@@ -995,10 +995,8 @@ static int sn9c102_stop_transfer(struct sn9c102_device* cam)</div><div class='ctx'> </div><div class='ctx'> static int sn9c102_stream_interrupt(struct sn9c102_device* cam)</div><div class='ctx'> {</div><div class='del'>-	long timeout;</div><div class='del'>-</div><div class='ctx'> 	cam-&gt;stream = STREAM_INTERRUPT;</div><div class='del'>-	timeout = wait_event_timeout(cam-&gt;wait_stream,</div><div class='add'>+	wait_event_timeout(cam-&gt;wait_stream,</div><div class='ctx'> 				     (cam-&gt;stream == STREAM_OFF) ||</div><div class='ctx'> 				     (cam-&gt;state &amp; DEV_DISCONNECTED),</div><div class='ctx'> 				     SN9C102_URB_TIMEOUT);</div><div class='head'>diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c<br/>index eb25756a07af..0421bf9453b4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/soc_camera.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/soc_camera.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/soc_camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/soc_camera.c</a></div><div class='hunk'>@@ -164,35 +164,38 @@ static int soc_camera_try_fmt(struct soc_camera_device *icd,</div><div class='ctx'> 			      struct v4l2_format *f)</div><div class='ctx'> {</div><div class='ctx'> 	struct soc_camera_host *ici = to_soc_camera_host(icd-&gt;parent);</div><div class='add'>+	const struct soc_camera_format_xlate *xlate;</div><div class='ctx'> 	struct v4l2_pix_format *pix = &amp;f-&gt;fmt.pix;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(icd-&gt;pdev, "TRY_FMT(%c%c%c%c, %ux%u)\n",</div><div class='ctx'> 		pixfmtstr(pix-&gt;pixelformat), pix-&gt;width, pix-&gt;height);</div><div class='ctx'> </div><div class='del'>-	pix-&gt;bytesperline = 0;</div><div class='del'>-	pix-&gt;sizeimage = 0;</div><div class='add'>+	if (!(ici-&gt;capabilities &amp; SOCAM_HOST_CAP_STRIDE)) {</div><div class='add'>+		pix-&gt;bytesperline = 0;</div><div class='add'>+		pix-&gt;sizeimage = 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = ici-&gt;ops-&gt;try_fmt(icd, f);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (!pix-&gt;sizeimage) {</div><div class='del'>-		if (!pix-&gt;bytesperline) {</div><div class='del'>-			const struct soc_camera_format_xlate *xlate;</div><div class='add'>+	xlate = soc_camera_xlate_by_fourcc(icd, pix-&gt;pixelformat);</div><div class='add'>+	if (!xlate)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-			xlate = soc_camera_xlate_by_fourcc(icd, pix-&gt;pixelformat);</div><div class='del'>-			if (!xlate)</div><div class='del'>-				return -EINVAL;</div><div class='add'>+	ret = soc_mbus_bytes_per_line(pix-&gt;width, xlate-&gt;host_fmt);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-			ret = soc_mbus_bytes_per_line(pix-&gt;width,</div><div class='del'>-						      xlate-&gt;host_fmt);</div><div class='del'>-			if (ret &gt; 0)</div><div class='del'>-				pix-&gt;bytesperline = ret;</div><div class='del'>-		}</div><div class='del'>-		if (pix-&gt;bytesperline)</div><div class='del'>-			pix-&gt;sizeimage = pix-&gt;bytesperline * pix-&gt;height;</div><div class='del'>-	}</div><div class='add'>+	pix-&gt;bytesperline = max_t(u32, pix-&gt;bytesperline, ret);</div><div class='add'>+</div><div class='add'>+	ret = soc_mbus_image_size(xlate-&gt;host_fmt, pix-&gt;bytesperline,</div><div class='add'>+				  pix-&gt;height);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pix-&gt;sizeimage = max_t(u32, pix-&gt;sizeimage, ret);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -257,13 +260,13 @@ static int soc_camera_g_std(struct file *file, void *priv, v4l2_std_id *a)</div><div class='ctx'> 	return v4l2_subdev_call(sd, core, g_std, a);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int soc_camera_enum_fsizes(struct file *file, void *fh,</div><div class='add'>+static int soc_camera_enum_framesizes(struct file *file, void *fh,</div><div class='ctx'> 					 struct v4l2_frmsizeenum *fsize)</div><div class='ctx'> {</div><div class='ctx'> 	struct soc_camera_device *icd = file-&gt;private_data;</div><div class='ctx'> 	struct soc_camera_host *ici = to_soc_camera_host(icd-&gt;parent);</div><div class='ctx'> </div><div class='del'>-	return ici-&gt;ops-&gt;enum_fsizes(icd, fsize);</div><div class='add'>+	return ici-&gt;ops-&gt;enum_framesizes(icd, fsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int soc_camera_reqbufs(struct file *file, void *priv,</div><div class='hunk'>@@ -530,7 +533,10 @@ static int soc_camera_open(struct file *file)</div><div class='ctx'> 		if (icl-&gt;reset)</div><div class='ctx'> 			icl-&gt;reset(icd-&gt;pdev);</div><div class='ctx'> </div><div class='add'>+		/* Don't mess with the host during probe */</div><div class='add'>+		mutex_lock(&amp;ici-&gt;host_lock);</div><div class='ctx'> 		ret = ici-&gt;ops-&gt;add(icd);</div><div class='add'>+		mutex_unlock(&amp;ici-&gt;host_lock);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			dev_err(icd-&gt;pdev, "Couldn't activate the camera: %d\n", ret);</div><div class='ctx'> 			goto eiciadd;</div><div class='hunk'>@@ -956,7 +962,7 @@ static void scan_add_host(struct soc_camera_host *ici)</div><div class='ctx'> {</div><div class='ctx'> 	struct soc_camera_device *icd;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;list_lock);</div><div class='add'>+	mutex_lock(&amp;ici-&gt;host_lock);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(icd, &amp;devices, list) {</div><div class='ctx'> 		if (icd-&gt;iface == ici-&gt;nr) {</div><div class='hunk'>@@ -967,7 +973,7 @@ static void scan_add_host(struct soc_camera_host *ici)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;list_lock);</div><div class='add'>+	mutex_unlock(&amp;ici-&gt;host_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_I2C_BOARDINFO</div><div class='hunk'>@@ -1241,8 +1247,8 @@ static int default_s_parm(struct soc_camera_device *icd,</div><div class='ctx'> 	return v4l2_subdev_call(sd, video, s_parm, parm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int default_enum_fsizes(struct soc_camera_device *icd,</div><div class='del'>-			  struct v4l2_frmsizeenum *fsize)</div><div class='add'>+static int default_enum_framesizes(struct soc_camera_device *icd,</div><div class='add'>+				   struct v4l2_frmsizeenum *fsize)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);</div><div class='hunk'>@@ -1256,7 +1262,7 @@ static int default_enum_fsizes(struct soc_camera_device *icd,</div><div class='ctx'> 	/* map xlate-code to pixel_format, sensor only handle xlate-code*/</div><div class='ctx'> 	fsize_mbus.pixel_format = xlate-&gt;code;</div><div class='ctx'> </div><div class='del'>-	ret = v4l2_subdev_call(sd, video, enum_mbus_fsizes, &amp;fsize_mbus);</div><div class='add'>+	ret = v4l2_subdev_call(sd, video, enum_framesizes, &amp;fsize_mbus);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1295,8 +1301,8 @@ int soc_camera_host_register(struct soc_camera_host *ici)</div><div class='ctx'> 		ici-&gt;ops-&gt;set_parm = default_s_parm;</div><div class='ctx'> 	if (!ici-&gt;ops-&gt;get_parm)</div><div class='ctx'> 		ici-&gt;ops-&gt;get_parm = default_g_parm;</div><div class='del'>-	if (!ici-&gt;ops-&gt;enum_fsizes)</div><div class='del'>-		ici-&gt;ops-&gt;enum_fsizes = default_enum_fsizes;</div><div class='add'>+	if (!ici-&gt;ops-&gt;enum_framesizes)</div><div class='add'>+		ici-&gt;ops-&gt;enum_framesizes = default_enum_framesizes;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;list_lock);</div><div class='ctx'> 	list_for_each_entry(ix, &amp;hosts, list) {</div><div class='hunk'>@@ -1313,6 +1319,7 @@ int soc_camera_host_register(struct soc_camera_host *ici)</div><div class='ctx'> 	list_add_tail(&amp;ici-&gt;list, &amp;hosts);</div><div class='ctx'> 	mutex_unlock(&amp;list_lock);</div><div class='ctx'> </div><div class='add'>+	mutex_init(&amp;ici-&gt;host_lock);</div><div class='ctx'> 	scan_add_host(ici);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1386,7 +1393,7 @@ static const struct v4l2_ioctl_ops soc_camera_ioctl_ops = {</div><div class='ctx'> 	.vidioc_s_input		 = soc_camera_s_input,</div><div class='ctx'> 	.vidioc_s_std		 = soc_camera_s_std,</div><div class='ctx'> 	.vidioc_g_std		 = soc_camera_g_std,</div><div class='del'>-	.vidioc_enum_framesizes  = soc_camera_enum_fsizes,</div><div class='add'>+	.vidioc_enum_framesizes  = soc_camera_enum_framesizes,</div><div class='ctx'> 	.vidioc_reqbufs		 = soc_camera_reqbufs,</div><div class='ctx'> 	.vidioc_querybuf	 = soc_camera_querybuf,</div><div class='ctx'> 	.vidioc_qbuf		 = soc_camera_qbuf,</div><div class='hunk'>@@ -1425,6 +1432,10 @@ static int video_dev_create(struct soc_camera_device *icd)</div><div class='ctx'> 	vdev-&gt;tvnorms		= V4L2_STD_UNKNOWN;</div><div class='ctx'> 	vdev-&gt;ctrl_handler	= &amp;icd-&gt;ctrl_handler;</div><div class='ctx'> 	vdev-&gt;lock		= &amp;icd-&gt;video_lock;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	icd-&gt;vdev = vdev;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/soc_mediabus.c b/drivers/media/video/soc_mediabus.c<br/>index cf7f2194ded4..89dce097a827 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/soc_mediabus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/soc_mediabus.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/soc_mediabus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/soc_mediabus.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_YVYU8_2X8,</div><div class='hunk'>@@ -33,6 +34,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_UYVY8_2X8,</div><div class='hunk'>@@ -42,6 +44,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_VYUY8_2X8,</div><div class='hunk'>@@ -51,6 +54,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE,</div><div class='hunk'>@@ -60,6 +64,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE,</div><div class='hunk'>@@ -69,6 +74,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_RGB565_2X8_LE,</div><div class='hunk'>@@ -78,6 +84,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_RGB565_2X8_BE,</div><div class='hunk'>@@ -87,6 +94,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SBGGR8_1X8,</div><div class='hunk'>@@ -96,6 +104,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_NONE,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SBGGR10_1X10,</div><div class='hunk'>@@ -105,6 +114,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 10,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_Y8_1X8,</div><div class='hunk'>@@ -114,6 +124,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_NONE,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_Y10_1X10,</div><div class='hunk'>@@ -123,6 +134,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 10,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE,</div><div class='hunk'>@@ -132,6 +144,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE,</div><div class='hunk'>@@ -141,6 +154,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADLO,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE,</div><div class='hunk'>@@ -150,6 +164,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_BE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE,</div><div class='hunk'>@@ -159,6 +174,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADLO,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_BE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_JPEG_1X8,</div><div class='hunk'>@@ -168,6 +184,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample        = 8,</div><div class='ctx'> 		.packing                = SOC_MBUS_PACKING_VARIABLE,</div><div class='ctx'> 		.order                  = SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE,</div><div class='hunk'>@@ -177,6 +194,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_2X8_PADHI,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_BE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_YUYV8_1_5X8,</div><div class='hunk'>@@ -186,6 +204,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_1_5X8,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_YVYU8_1_5X8,</div><div class='hunk'>@@ -195,6 +214,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_1_5X8,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_UYVY8_1X16,</div><div class='hunk'>@@ -204,6 +224,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 16,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_VYUY8_1X16,</div><div class='hunk'>@@ -213,6 +234,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 16,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_YUYV8_1X16,</div><div class='hunk'>@@ -222,6 +244,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 16,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_YVYU8_1X16,</div><div class='hunk'>@@ -231,6 +254,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 16,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SGRBG8_1X8,</div><div class='hunk'>@@ -240,6 +264,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_NONE,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8,</div><div class='hunk'>@@ -249,6 +274,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 8,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_NONE,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SGBRG10_1X10,</div><div class='hunk'>@@ -258,6 +284,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 10,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SGRBG10_1X10,</div><div class='hunk'>@@ -267,6 +294,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 10,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SRGGB10_1X10,</div><div class='hunk'>@@ -276,6 +304,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 10,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SBGGR12_1X12,</div><div class='hunk'>@@ -285,6 +314,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 12,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SGBRG12_1X12,</div><div class='hunk'>@@ -294,6 +324,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 12,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SGRBG12_1X12,</div><div class='hunk'>@@ -303,6 +334,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 12,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> }, {</div><div class='ctx'> 	.code = V4L2_MBUS_FMT_SRGGB12_1X12,</div><div class='hunk'>@@ -312,6 +344,7 @@ static const struct soc_mbus_lookup mbus_fmt[] = {</div><div class='ctx'> 		.bits_per_sample	= 12,</div><div class='ctx'> 		.packing		= SOC_MBUS_PACKING_EXTEND16,</div><div class='ctx'> 		.order			= SOC_MBUS_ORDER_LE,</div><div class='add'>+		.layout			= SOC_MBUS_LAYOUT_PACKED,</div><div class='ctx'> 	},</div><div class='ctx'> },</div><div class='ctx'> };</div><div class='hunk'>@@ -345,6 +378,9 @@ EXPORT_SYMBOL(soc_mbus_samples_per_pixel);</div><div class='ctx'> </div><div class='ctx'> s32 soc_mbus_bytes_per_line(u32 width, const struct soc_mbus_pixelfmt *mf)</div><div class='ctx'> {</div><div class='add'>+	if (mf-&gt;layout != SOC_MBUS_LAYOUT_PACKED)</div><div class='add'>+		return width * mf-&gt;bits_per_sample / 8;</div><div class='add'>+</div><div class='ctx'> 	switch (mf-&gt;packing) {</div><div class='ctx'> 	case SOC_MBUS_PACKING_NONE:</div><div class='ctx'> 		return width * mf-&gt;bits_per_sample / 8;</div><div class='hunk'>@@ -361,6 +397,24 @@ s32 soc_mbus_bytes_per_line(u32 width, const struct soc_mbus_pixelfmt *mf)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(soc_mbus_bytes_per_line);</div><div class='ctx'> </div><div class='add'>+s32 soc_mbus_image_size(const struct soc_mbus_pixelfmt *mf,</div><div class='add'>+			u32 bytes_per_line, u32 height)</div><div class='add'>+{</div><div class='add'>+	if (mf-&gt;layout == SOC_MBUS_LAYOUT_PACKED)</div><div class='add'>+		return bytes_per_line * height;</div><div class='add'>+</div><div class='add'>+	switch (mf-&gt;packing) {</div><div class='add'>+	case SOC_MBUS_PACKING_2X8_PADHI:</div><div class='add'>+	case SOC_MBUS_PACKING_2X8_PADLO:</div><div class='add'>+		return bytes_per_line * height * 2;</div><div class='add'>+	case SOC_MBUS_PACKING_1_5X8:</div><div class='add'>+		return bytes_per_line * height * 3 / 2;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(soc_mbus_image_size);</div><div class='add'>+</div><div class='ctx'> const struct soc_mbus_pixelfmt *soc_mbus_find_fmtdesc(</div><div class='ctx'> 	enum v4l2_mbus_pixelcode code,</div><div class='ctx'> 	const struct soc_mbus_lookup *lookup,</div><div class='head'>diff --git a/drivers/media/video/sta2x11_vip.c b/drivers/media/video/sta2x11_vip.c<br/>new file mode 100644<br/>index 000000000000..4c10205264d4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/sta2x11_vip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/sta2x11_vip.c</a></div><div class='hunk'>@@ -0,0 +1,1550 @@</div><div class='add'>+/*</div><div class='add'>+ * This is the driver for the STA2x11 Video Input Port.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2010       WindRiver Systems, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along with</div><div class='add'>+ * this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ *</div><div class='add'>+ * The full GNU General Public License is included in this distribution in</div><div class='add'>+ * the file called "COPYING".</div><div class='add'>+ *</div><div class='add'>+ * Author: Andreas Kies &lt;andreas.kies@windriver.com&gt;</div><div class='add'>+ *		Vlad Lungu &lt;vlad.lungu@windriver.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/videodev2.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kmod.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;media/v4l2-common.h&gt;</div><div class='add'>+#include &lt;media/v4l2-device.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ioctl.h&gt;</div><div class='add'>+#include &lt;media/videobuf-dma-contig.h&gt;</div><div class='add'>+</div><div class='add'>+#include "sta2x11_vip.h"</div><div class='add'>+</div><div class='add'>+#define DRV_NAME "sta2x11_vip"</div><div class='add'>+#define DRV_VERSION "1.3"</div><div class='add'>+</div><div class='add'>+#ifndef PCI_DEVICE_ID_STMICRO_VIP</div><div class='add'>+#define PCI_DEVICE_ID_STMICRO_VIP 0xCC0D</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define MAX_FRAMES 4</div><div class='add'>+</div><div class='add'>+/*Register offsets*/</div><div class='add'>+#define DVP_CTL		0x00</div><div class='add'>+#define DVP_TFO		0x04</div><div class='add'>+#define DVP_TFS		0x08</div><div class='add'>+#define DVP_BFO		0x0C</div><div class='add'>+#define DVP_BFS		0x10</div><div class='add'>+#define DVP_VTP         0x14</div><div class='add'>+#define DVP_VBP         0x18</div><div class='add'>+#define DVP_VMP		0x1C</div><div class='add'>+#define DVP_ITM		0x98</div><div class='add'>+#define DVP_ITS		0x9C</div><div class='add'>+#define DVP_STA		0xA0</div><div class='add'>+#define DVP_HLFLN	0xA8</div><div class='add'>+#define DVP_RGB		0xC0</div><div class='add'>+#define DVP_PKZ		0xF0</div><div class='add'>+</div><div class='add'>+/*Register fields*/</div><div class='add'>+#define DVP_CTL_ENA	0x00000001</div><div class='add'>+#define DVP_CTL_RST	0x80000000</div><div class='add'>+#define DVP_CTL_DIS	(~0x00040001)</div><div class='add'>+</div><div class='add'>+#define DVP_IT_VSB	0x00000008</div><div class='add'>+#define DVP_IT_VST	0x00000010</div><div class='add'>+#define DVP_IT_FIFO	0x00000020</div><div class='add'>+</div><div class='add'>+#define DVP_HLFLN_SD	0x00000001</div><div class='add'>+</div><div class='add'>+#define REG_WRITE(vip, reg, value) iowrite32((value), (vip-&gt;iomem)+(reg))</div><div class='add'>+#define REG_READ(vip, reg) ioread32((vip-&gt;iomem)+(reg))</div><div class='add'>+</div><div class='add'>+#define SAVE_COUNT 8</div><div class='add'>+#define AUX_COUNT 3</div><div class='add'>+#define IRQ_COUNT 1</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct sta2x11_vip - All internal data for one instance of device</div><div class='add'>+ * @v4l2_dev: device registered in v4l layer</div><div class='add'>+ * @video_dev: properties of our device</div><div class='add'>+ * @pdev: PCI device</div><div class='add'>+ * @adapter: contains I2C adapter information</div><div class='add'>+ * @register_save_area: All relevant register are saved here during suspend</div><div class='add'>+ * @decoder: contains information about video DAC</div><div class='add'>+ * @format: pixel format, fixed UYVY</div><div class='add'>+ * @std: video standard (e.g. PAL/NTSC)</div><div class='add'>+ * @input: input line for video signal ( 0 or 1 )</div><div class='add'>+ * @users: Number of open of device ( max. 1 )</div><div class='add'>+ * @disabled: Device is in power down state</div><div class='add'>+ * @mutex: ensures exclusive opening of device</div><div class='add'>+ * @slock: for excluse acces of registers</div><div class='add'>+ * @vb_vidq: queue maintained by videobuf layer</div><div class='add'>+ * @capture: linked list of capture buffer</div><div class='add'>+ * @active: struct videobuf_buffer currently beingg filled</div><div class='add'>+ * @started: device is ready to capture frame</div><div class='add'>+ * @closing: device will be shut down</div><div class='add'>+ * @tcount: Number of top frames</div><div class='add'>+ * @bcount: Number of bottom frames</div><div class='add'>+ * @overflow: Number of FIFO overflows</div><div class='add'>+ * @mem_spare: small buffer of unused frame</div><div class='add'>+ * @dma_spare: dma addres of mem_spare</div><div class='add'>+ * @iomem: hardware base address</div><div class='add'>+ * @config: I2C and gpio config from platform</div><div class='add'>+ *</div><div class='add'>+ * All non-local data is accessed via this structure.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct sta2x11_vip {</div><div class='add'>+	struct v4l2_device v4l2_dev;</div><div class='add'>+	struct video_device *video_dev;</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	struct i2c_adapter *adapter;</div><div class='add'>+	unsigned int register_save_area[IRQ_COUNT + SAVE_COUNT + AUX_COUNT];</div><div class='add'>+	struct v4l2_subdev *decoder;</div><div class='add'>+	struct v4l2_pix_format format;</div><div class='add'>+	v4l2_std_id std;</div><div class='add'>+	unsigned int input;</div><div class='add'>+	int users;</div><div class='add'>+	int disabled;</div><div class='add'>+	struct mutex mutex;	/* exclusive access during open */</div><div class='add'>+	spinlock_t slock;	/* spin lock for hardware and queue access */</div><div class='add'>+	struct videobuf_queue vb_vidq;</div><div class='add'>+	struct list_head capture;</div><div class='add'>+	struct videobuf_buffer *active;</div><div class='add'>+	int started, closing, tcount, bcount;</div><div class='add'>+	int overflow;</div><div class='add'>+	void *mem_spare;</div><div class='add'>+	dma_addr_t dma_spare;</div><div class='add'>+	void *iomem;</div><div class='add'>+	struct vip_config *config;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned int registers_to_save[AUX_COUNT] = {</div><div class='add'>+	DVP_HLFLN, DVP_RGB, DVP_PKZ</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct v4l2_pix_format formats_50[] = {</div><div class='add'>+	{			/*PAL interlaced */</div><div class='add'>+	 .width = 720,</div><div class='add'>+	 .height = 576,</div><div class='add'>+	 .pixelformat = V4L2_PIX_FMT_UYVY,</div><div class='add'>+	 .field = V4L2_FIELD_INTERLACED,</div><div class='add'>+	 .bytesperline = 720 * 2,</div><div class='add'>+	 .sizeimage = 720 * 2 * 576,</div><div class='add'>+	 .colorspace = V4L2_COLORSPACE_SMPTE170M},</div><div class='add'>+	{			/*PAL top */</div><div class='add'>+	 .width = 720,</div><div class='add'>+	 .height = 288,</div><div class='add'>+	 .pixelformat = V4L2_PIX_FMT_UYVY,</div><div class='add'>+	 .field = V4L2_FIELD_TOP,</div><div class='add'>+	 .bytesperline = 720 * 2,</div><div class='add'>+	 .sizeimage = 720 * 2 * 288,</div><div class='add'>+	 .colorspace = V4L2_COLORSPACE_SMPTE170M},</div><div class='add'>+	{			/*PAL bottom */</div><div class='add'>+	 .width = 720,</div><div class='add'>+	 .height = 288,</div><div class='add'>+	 .pixelformat = V4L2_PIX_FMT_UYVY,</div><div class='add'>+	 .field = V4L2_FIELD_BOTTOM,</div><div class='add'>+	 .bytesperline = 720 * 2,</div><div class='add'>+	 .sizeimage = 720 * 2 * 288,</div><div class='add'>+	 .colorspace = V4L2_COLORSPACE_SMPTE170M},</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct v4l2_pix_format formats_60[] = {</div><div class='add'>+	{			/*NTSC interlaced */</div><div class='add'>+	 .width = 720,</div><div class='add'>+	 .height = 480,</div><div class='add'>+	 .pixelformat = V4L2_PIX_FMT_UYVY,</div><div class='add'>+	 .field = V4L2_FIELD_INTERLACED,</div><div class='add'>+	 .bytesperline = 720 * 2,</div><div class='add'>+	 .sizeimage = 720 * 2 * 480,</div><div class='add'>+	 .colorspace = V4L2_COLORSPACE_SMPTE170M},</div><div class='add'>+	{			/*NTSC top */</div><div class='add'>+	 .width = 720,</div><div class='add'>+	 .height = 240,</div><div class='add'>+	 .pixelformat = V4L2_PIX_FMT_UYVY,</div><div class='add'>+	 .field = V4L2_FIELD_TOP,</div><div class='add'>+	 .bytesperline = 720 * 2,</div><div class='add'>+	 .sizeimage = 720 * 2 * 240,</div><div class='add'>+	 .colorspace = V4L2_COLORSPACE_SMPTE170M},</div><div class='add'>+	{			/*NTSC bottom */</div><div class='add'>+	 .width = 720,</div><div class='add'>+	 .height = 240,</div><div class='add'>+	 .pixelformat = V4L2_PIX_FMT_UYVY,</div><div class='add'>+	 .field = V4L2_FIELD_BOTTOM,</div><div class='add'>+	 .bytesperline = 720 * 2,</div><div class='add'>+	 .sizeimage = 720 * 2 * 240,</div><div class='add'>+	 .colorspace = V4L2_COLORSPACE_SMPTE170M},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * buf_setup - Get size and number of video buffer</div><div class='add'>+ * @vq: queue in videobuf</div><div class='add'>+ * @count: Number of buffers (1..MAX_FRAMES).</div><div class='add'>+ *		0 use default value.</div><div class='add'>+ * @size:  size of buffer in bytes</div><div class='add'>+ *</div><div class='add'>+ * returns size and number of buffers</div><div class='add'>+ * a preset value of 0 returns the default number.</div><div class='add'>+ * return value: 0, always succesfull.</div><div class='add'>+ */</div><div class='add'>+static int buf_setup(struct videobuf_queue *vq, unsigned int *count,</div><div class='add'>+		     unsigned int *size)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_vip *vip = vq-&gt;priv_data;</div><div class='add'>+</div><div class='add'>+	*size = vip-&gt;format.width * vip-&gt;format.height * 2;</div><div class='add'>+	if (0 == *count || MAX_FRAMES &lt; *count)</div><div class='add'>+		*count = MAX_FRAMES;</div><div class='add'>+	return 0;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * buf_prepare - prepare buffer for usage</div><div class='add'>+ * @vq: queue in videobuf layer</div><div class='add'>+ * @vb: buffer to be prepared</div><div class='add'>+ * @field: type of video data (interlaced/non-interlaced)</div><div class='add'>+ *</div><div class='add'>+ * Allocate or realloc buffer</div><div class='add'>+ * return value: 0, successful.</div><div class='add'>+ *</div><div class='add'>+ * -EINVAL, supplied buffer is too small.</div><div class='add'>+ *</div><div class='add'>+ *  other, buffer could not be locked.</div><div class='add'>+ */</div><div class='add'>+static int buf_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb,</div><div class='add'>+		       enum v4l2_field field)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_vip *vip = vq-&gt;priv_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vb-&gt;size = vip-&gt;format.width * vip-&gt;format.height * 2;</div><div class='add'>+	if ((0 != vb-&gt;baddr) &amp;&amp; (vb-&gt;bsize &lt; vb-&gt;size))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	vb-&gt;width = vip-&gt;format.width;</div><div class='add'>+	vb-&gt;height = vip-&gt;format.height;</div><div class='add'>+	vb-&gt;field = field;</div><div class='add'>+</div><div class='add'>+	if (VIDEOBUF_NEEDS_INIT == vb-&gt;state) {</div><div class='add'>+		ret = videobuf_iolock(vq, vb, NULL);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto fail;</div><div class='add'>+	}</div><div class='add'>+	vb-&gt;state = VIDEOBUF_PREPARED;</div><div class='add'>+	return 0;</div><div class='add'>+fail:</div><div class='add'>+	videobuf_dma_contig_free(vq, vb);</div><div class='add'>+	vb-&gt;state = VIDEOBUF_NEEDS_INIT;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * buf_queu - queue buffer for filling</div><div class='add'>+ * @vq: queue in videobuf layer</div><div class='add'>+ * @vb: buffer to be queued</div><div class='add'>+ *</div><div class='add'>+ * if capturing is already running, the buffer will be queued. Otherwise</div><div class='add'>+ * capture is started and the buffer is used directly.</div><div class='add'>+ */</div><div class='add'>+static void buf_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_vip *vip = vq-&gt;priv_data;</div><div class='add'>+	u32 dma;</div><div class='add'>+</div><div class='add'>+	vb-&gt;state = VIDEOBUF_QUEUED;</div><div class='add'>+</div><div class='add'>+	if (vip-&gt;active) {</div><div class='add'>+		list_add_tail(&amp;vb-&gt;queue, &amp;vip-&gt;capture);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vip-&gt;started = 1;</div><div class='add'>+	vip-&gt;tcount = 0;</div><div class='add'>+	vip-&gt;bcount = 0;</div><div class='add'>+	vip-&gt;active = vb;</div><div class='add'>+	vb-&gt;state = VIDEOBUF_ACTIVE;</div><div class='add'>+</div><div class='add'>+	dma = videobuf_to_dma_contig(vb);</div><div class='add'>+</div><div class='add'>+	REG_WRITE(vip, DVP_TFO, (0 &lt;&lt; 16) | (0));</div><div class='add'>+	/* despite of interlace mode, upper and lower frames start at zero */</div><div class='add'>+	REG_WRITE(vip, DVP_BFO, (0 &lt;&lt; 16) | (0));</div><div class='add'>+</div><div class='add'>+	switch (vip-&gt;format.field) {</div><div class='add'>+	case V4L2_FIELD_INTERLACED:</div><div class='add'>+		REG_WRITE(vip, DVP_TFS,</div><div class='add'>+			  ((vip-&gt;format.height / 2 - 1) &lt;&lt; 16) |</div><div class='add'>+			  (2 * vip-&gt;format.width - 1));</div><div class='add'>+		REG_WRITE(vip, DVP_BFS, ((vip-&gt;format.height / 2 - 1) &lt;&lt; 16) |</div><div class='add'>+			  (2 * vip-&gt;format.width - 1));</div><div class='add'>+		REG_WRITE(vip, DVP_VTP, dma);</div><div class='add'>+		REG_WRITE(vip, DVP_VBP, dma + vip-&gt;format.width * 2);</div><div class='add'>+		REG_WRITE(vip, DVP_VMP, 4 * vip-&gt;format.width);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_FIELD_TOP:</div><div class='add'>+		REG_WRITE(vip, DVP_TFS,</div><div class='add'>+			  ((vip-&gt;format.height - 1) &lt;&lt; 16) |</div><div class='add'>+			  (2 * vip-&gt;format.width - 1));</div><div class='add'>+		REG_WRITE(vip, DVP_BFS, ((0) &lt;&lt; 16) |</div><div class='add'>+			  (2 * vip-&gt;format.width - 1));</div><div class='add'>+		REG_WRITE(vip, DVP_VTP, dma);</div><div class='add'>+		REG_WRITE(vip, DVP_VBP, dma);</div><div class='add'>+		REG_WRITE(vip, DVP_VMP, 2 * vip-&gt;format.width);</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_FIELD_BOTTOM:</div><div class='add'>+		REG_WRITE(vip, DVP_TFS, ((0) &lt;&lt; 16) |</div><div class='add'>+			  (2 * vip-&gt;format.width - 1));</div><div class='add'>+		REG_WRITE(vip, DVP_BFS,</div><div class='add'>+			  ((vip-&gt;format.height) &lt;&lt; 16) |</div><div class='add'>+			  (2 * vip-&gt;format.width - 1));</div><div class='add'>+		REG_WRITE(vip, DVP_VTP, dma);</div><div class='add'>+		REG_WRITE(vip, DVP_VBP, dma);</div><div class='add'>+		REG_WRITE(vip, DVP_VMP, 2 * vip-&gt;format.width);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		pr_warning("VIP: unknown field format\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	REG_WRITE(vip, DVP_CTL, DVP_CTL_ENA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * buff_release - release buffer</div><div class='add'>+ * @vq: queue in videobuf layer</div><div class='add'>+ * @vb: buffer to be released</div><div class='add'>+ *</div><div class='add'>+ * release buffer in videobuf layer</div><div class='add'>+ */</div><div class='add'>+static void buf_release(struct videobuf_queue *vq, struct videobuf_buffer *vb)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	videobuf_dma_contig_free(vq, vb);</div><div class='add'>+	vb-&gt;state = VIDEOBUF_NEEDS_INIT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct videobuf_queue_ops vip_qops = {</div><div class='add'>+	.buf_setup = buf_setup,</div><div class='add'>+	.buf_prepare = buf_prepare,</div><div class='add'>+	.buf_queue = buf_queue,</div><div class='add'>+	.buf_release = buf_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vip_open - open video device</div><div class='add'>+ * @file: descriptor of device</div><div class='add'>+ *</div><div class='add'>+ * open device, make sure it is only opened once.</div><div class='add'>+ * return value: 0, no error.</div><div class='add'>+ *</div><div class='add'>+ * -EBUSY, device is already opened</div><div class='add'>+ *</div><div class='add'>+ * -ENOMEM, no memory for auxiliary DMA buffer</div><div class='add'>+ */</div><div class='add'>+static int vip_open(struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = video_devdata(file);</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;vip-&gt;mutex);</div><div class='add'>+	vip-&gt;users++;</div><div class='add'>+</div><div class='add'>+	if (vip-&gt;users &gt; 1) {</div><div class='add'>+		vip-&gt;users--;</div><div class='add'>+		mutex_unlock(&amp;vip-&gt;mutex);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	file-&gt;private_data = dev;</div><div class='add'>+	vip-&gt;overflow = 0;</div><div class='add'>+	vip-&gt;started = 0;</div><div class='add'>+	vip-&gt;closing = 0;</div><div class='add'>+	vip-&gt;active = NULL;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;vip-&gt;capture);</div><div class='add'>+	vip-&gt;mem_spare = dma_alloc_coherent(&amp;vip-&gt;pdev-&gt;dev, 64,</div><div class='add'>+					    &amp;vip-&gt;dma_spare, GFP_KERNEL);</div><div class='add'>+	if (!vip-&gt;mem_spare) {</div><div class='add'>+		vip-&gt;users--;</div><div class='add'>+		mutex_unlock(&amp;vip-&gt;mutex);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;vip-&gt;mutex);</div><div class='add'>+	videobuf_queue_dma_contig_init_cached(&amp;vip-&gt;vb_vidq,</div><div class='add'>+					      &amp;vip_qops,</div><div class='add'>+					      &amp;vip-&gt;pdev-&gt;dev,</div><div class='add'>+					      &amp;vip-&gt;slock,</div><div class='add'>+					      V4L2_BUF_TYPE_VIDEO_CAPTURE,</div><div class='add'>+					      V4L2_FIELD_INTERLACED,</div><div class='add'>+					      sizeof(struct videobuf_buffer),</div><div class='add'>+					      vip, NULL);</div><div class='add'>+	REG_READ(vip, DVP_ITS);</div><div class='add'>+	REG_WRITE(vip, DVP_HLFLN, DVP_HLFLN_SD);</div><div class='add'>+	REG_WRITE(vip, DVP_ITM, DVP_IT_VSB | DVP_IT_VST);</div><div class='add'>+	REG_WRITE(vip, DVP_CTL, DVP_CTL_RST);</div><div class='add'>+	REG_WRITE(vip, DVP_CTL, 0);</div><div class='add'>+	REG_READ(vip, DVP_ITS);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vip_close - close video device</div><div class='add'>+ * @file: descriptor of device</div><div class='add'>+ *</div><div class='add'>+ * close video device, wait until all pending operations are finished</div><div class='add'>+ * ( maximum FRAME_MAX buffers pending )</div><div class='add'>+ * Turn off interrupts.</div><div class='add'>+ *</div><div class='add'>+ * return value: 0, always succesful.</div><div class='add'>+ */</div><div class='add'>+static int vip_close(struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = video_devdata(file);</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	vip-&gt;closing = 1;</div><div class='add'>+	if (vip-&gt;active)</div><div class='add'>+		videobuf_waiton(&amp;vip-&gt;vb_vidq, vip-&gt;active, 0, 0);</div><div class='add'>+	spin_lock_irq(&amp;vip-&gt;slock);</div><div class='add'>+</div><div class='add'>+	REG_WRITE(vip, DVP_ITM, 0);</div><div class='add'>+	REG_WRITE(vip, DVP_CTL, DVP_CTL_RST);</div><div class='add'>+	REG_WRITE(vip, DVP_CTL, 0);</div><div class='add'>+	REG_READ(vip, DVP_ITS);</div><div class='add'>+</div><div class='add'>+	vip-&gt;started = 0;</div><div class='add'>+	vip-&gt;active = NULL;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;vip-&gt;slock);</div><div class='add'>+</div><div class='add'>+	videobuf_stop(&amp;vip-&gt;vb_vidq);</div><div class='add'>+	videobuf_mmap_free(&amp;vip-&gt;vb_vidq);</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(&amp;vip-&gt;pdev-&gt;dev, 64, vip-&gt;mem_spare, vip-&gt;dma_spare);</div><div class='add'>+	file-&gt;private_data = NULL;</div><div class='add'>+	mutex_lock(&amp;vip-&gt;mutex);</div><div class='add'>+	vip-&gt;users--;</div><div class='add'>+	mutex_unlock(&amp;vip-&gt;mutex);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vip_read - read from video input</div><div class='add'>+ * @file: descriptor of device</div><div class='add'>+ * @data: user buffer</div><div class='add'>+ * @count: number of bytes to be read</div><div class='add'>+ * @ppos: position within stream</div><div class='add'>+ *</div><div class='add'>+ * read video data from video device.</div><div class='add'>+ * handling is done in generic videobuf layer</div><div class='add'>+ * return value: provided by videobuf layer</div><div class='add'>+ */</div><div class='add'>+static ssize_t vip_read(struct file *file, char __user *data,</div><div class='add'>+			size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = file-&gt;private_data;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return videobuf_read_stream(&amp;vip-&gt;vb_vidq, data, count, ppos, 0,</div><div class='add'>+				    file-&gt;f_flags &amp; O_NONBLOCK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vip_mmap - map user buffer</div><div class='add'>+ * @file: descriptor of device</div><div class='add'>+ * @vma: user buffer</div><div class='add'>+ *</div><div class='add'>+ * map user space buffer into kernel mode, including DMA address.</div><div class='add'>+ * handling is done in generic videobuf layer.</div><div class='add'>+ * return value: provided by videobuf layer</div><div class='add'>+ */</div><div class='add'>+static int vip_mmap(struct file *file, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = file-&gt;private_data;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return videobuf_mmap_mapper(&amp;vip-&gt;vb_vidq, vma);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vip_poll - poll for event</div><div class='add'>+ * @file: descriptor of device</div><div class='add'>+ * @wait: contains events to be waited for</div><div class='add'>+ *</div><div class='add'>+ * wait for event related to video device.</div><div class='add'>+ * handling is done in generic videobuf layer.</div><div class='add'>+ * return value: provided by videobuf layer</div><div class='add'>+ */</div><div class='add'>+static unsigned int vip_poll(struct file *file, struct poll_table_struct *wait)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = file-&gt;private_data;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return videobuf_poll_stream(file, &amp;vip-&gt;vb_vidq, wait);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_querycap - return capabilities of device</div><div class='add'>+ * @file: descriptor of device (not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @cap: contains return values</div><div class='add'>+ *</div><div class='add'>+ * the capabilities of the device are returned</div><div class='add'>+ *</div><div class='add'>+ * return value: 0, no error.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_querycap(struct file *file, void *priv,</div><div class='add'>+			   struct v4l2_capability *cap)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	memset(cap, 0, sizeof(struct v4l2_capability));</div><div class='add'>+	strcpy(cap-&gt;driver, DRV_NAME);</div><div class='add'>+	strcpy(cap-&gt;card, DRV_NAME);</div><div class='add'>+	cap-&gt;version = 0;</div><div class='add'>+	snprintf(cap-&gt;bus_info, sizeof(cap-&gt;bus_info), "PCI:%s",</div><div class='add'>+		 pci_name(vip-&gt;pdev));</div><div class='add'>+	cap-&gt;capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |</div><div class='add'>+	    V4L2_CAP_STREAMING;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_s_std - set video standard</div><div class='add'>+ * @file: descriptor of device (not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @std: contains standard to be set</div><div class='add'>+ *</div><div class='add'>+ * the video standard is set</div><div class='add'>+ *</div><div class='add'>+ * return value: 0, no error.</div><div class='add'>+ *</div><div class='add'>+ * -EIO, no input signal detected</div><div class='add'>+ *</div><div class='add'>+ * other, returned from video DAC.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id *std)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+	v4l2_std_id oldstd = vip-&gt;std, newstd;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	if (V4L2_STD_ALL == *std) {</div><div class='add'>+		v4l2_subdev_call(vip-&gt;decoder, core, s_std, *std);</div><div class='add'>+		ssleep(2);</div><div class='add'>+		v4l2_subdev_call(vip-&gt;decoder, video, querystd, &amp;newstd);</div><div class='add'>+		v4l2_subdev_call(vip-&gt;decoder, video, g_input_status, &amp;status);</div><div class='add'>+		if (status &amp; V4L2_IN_ST_NO_SIGNAL)</div><div class='add'>+			return -EIO;</div><div class='add'>+		*std = vip-&gt;std = newstd;</div><div class='add'>+		if (oldstd != *std) {</div><div class='add'>+			if (V4L2_STD_525_60 &amp; (*std))</div><div class='add'>+				vip-&gt;format = formats_60[0];</div><div class='add'>+			else</div><div class='add'>+				vip-&gt;format = formats_50[0];</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (oldstd != *std) {</div><div class='add'>+		if (V4L2_STD_525_60 &amp; (*std))</div><div class='add'>+			vip-&gt;format = formats_60[0];</div><div class='add'>+		else</div><div class='add'>+			vip-&gt;format = formats_50[0];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return v4l2_subdev_call(vip-&gt;decoder, core, s_std, *std);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_g_std - get video standard</div><div class='add'>+ * @file: descriptor of device (not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @std: contains return values</div><div class='add'>+ *</div><div class='add'>+ * the current video standard is returned</div><div class='add'>+ *</div><div class='add'>+ * return value: 0, no error.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *std)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	*std = vip-&gt;std;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_querystd - get possible video standards</div><div class='add'>+ * @file: descriptor of device (not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @std: contains return values</div><div class='add'>+ *</div><div class='add'>+ * all possible video standards are returned</div><div class='add'>+ *</div><div class='add'>+ * return value: delivered by video DAC routine.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *std)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return v4l2_subdev_call(vip-&gt;decoder, video, querystd, std);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_queryctl - get possible control settings</div><div class='add'>+ * @file: descriptor of device (not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @ctrl: contains return values</div><div class='add'>+ *</div><div class='add'>+ * return possible values for a control</div><div class='add'>+ * return value: delivered by video DAC routine.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_queryctrl(struct file *file, void *priv,</div><div class='add'>+			    struct v4l2_queryctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return v4l2_subdev_call(vip-&gt;decoder, core, queryctrl, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_g_ctl - get control value</div><div class='add'>+ * @file: descriptor of device (not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @ctrl: contains return values</div><div class='add'>+ *</div><div class='add'>+ * return setting for a control value</div><div class='add'>+ * return value: delivered by video DAC routine.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_g_ctrl(struct file *file, void *priv,</div><div class='add'>+			 struct v4l2_control *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return v4l2_subdev_call(vip-&gt;decoder, core, g_ctrl, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_s_ctl - set control value</div><div class='add'>+ * @file: descriptor of device (not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @ctrl: contains value to be set</div><div class='add'>+ *</div><div class='add'>+ * set value for a specific control</div><div class='add'>+ * return value: delivered by video DAC routine.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_s_ctrl(struct file *file, void *priv,</div><div class='add'>+			 struct v4l2_control *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return v4l2_subdev_call(vip-&gt;decoder, core, s_ctrl, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_enum_input - return name of input line</div><div class='add'>+ * @file: descriptor of device (not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @inp: contains return values</div><div class='add'>+ *</div><div class='add'>+ * the user friendly name of the input line is returned</div><div class='add'>+ *</div><div class='add'>+ * return value: 0, no error.</div><div class='add'>+ *</div><div class='add'>+ * -EINVAL, input line number out of range</div><div class='add'>+ */</div><div class='add'>+static int vidioc_enum_input(struct file *file, void *priv,</div><div class='add'>+			     struct v4l2_input *inp)</div><div class='add'>+{</div><div class='add'>+	if (inp-&gt;index &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	inp-&gt;type = V4L2_INPUT_TYPE_CAMERA;</div><div class='add'>+	inp-&gt;std = V4L2_STD_ALL;</div><div class='add'>+	sprintf(inp-&gt;name, "Camera %u", inp-&gt;index);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_s_input - set input line</div><div class='add'>+ * @file: descriptor of device ( not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @i: new input line number</div><div class='add'>+ *</div><div class='add'>+ * the current active input line is set</div><div class='add'>+ *</div><div class='add'>+ * return value: 0, no error.</div><div class='add'>+ *</div><div class='add'>+ * -EINVAL, line number out of range</div><div class='add'>+ */</div><div class='add'>+static int vidioc_s_input(struct file *file, void *priv, unsigned int i)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (i &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	ret = v4l2_subdev_call(vip-&gt;decoder, video, s_routing, i, 0, 0);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		vip-&gt;input = i;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_g_input - return input line</div><div class='add'>+ * @file: descriptor of device ( not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @i: returned input line number</div><div class='add'>+ *</div><div class='add'>+ * the current active input line is returned</div><div class='add'>+ *</div><div class='add'>+ * return value: always 0.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	*i = vip-&gt;input;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_enum_fmt_vid_cap - return video capture format</div><div class='add'>+ * @file: descriptor of device ( not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @f: returned format information</div><div class='add'>+ *</div><div class='add'>+ * returns name and format of video capture</div><div class='add'>+ * Only UYVY is supported by hardware.</div><div class='add'>+ *</div><div class='add'>+ * return value: always 0.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,</div><div class='add'>+				   struct v4l2_fmtdesc *f)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	if (f-&gt;index != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	strcpy(f-&gt;description, "4:2:2, packed, UYVY");</div><div class='add'>+	f-&gt;pixelformat = V4L2_PIX_FMT_UYVY;</div><div class='add'>+	f-&gt;flags = 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_try_fmt_vid_cap - set video capture format</div><div class='add'>+ * @file: descriptor of device ( not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @f: new format</div><div class='add'>+ *</div><div class='add'>+ * new video format is set which includes width and</div><div class='add'>+ * field type. width is fixed to 720, no scaling.</div><div class='add'>+ * Only UYVY is supported by this hardware.</div><div class='add'>+ * the minimum height is 200, the maximum is 576 (PAL)</div><div class='add'>+ *</div><div class='add'>+ * return value: 0, no error</div><div class='add'>+ *</div><div class='add'>+ * -EINVAL, pixel or field format not supported</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,</div><div class='add'>+				  struct v4l2_format *f)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+	int interlace_lim;</div><div class='add'>+</div><div class='add'>+	if (V4L2_PIX_FMT_UYVY != f-&gt;fmt.pix.pixelformat)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (V4L2_STD_525_60 &amp; vip-&gt;std)</div><div class='add'>+		interlace_lim = 240;</div><div class='add'>+	else</div><div class='add'>+		interlace_lim = 288;</div><div class='add'>+</div><div class='add'>+	switch (f-&gt;fmt.pix.field) {</div><div class='add'>+	case V4L2_FIELD_ANY:</div><div class='add'>+		if (interlace_lim &lt; f-&gt;fmt.pix.height)</div><div class='add'>+			f-&gt;fmt.pix.field = V4L2_FIELD_INTERLACED;</div><div class='add'>+		else</div><div class='add'>+			f-&gt;fmt.pix.field = V4L2_FIELD_BOTTOM;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_FIELD_TOP:</div><div class='add'>+	case V4L2_FIELD_BOTTOM:</div><div class='add'>+		if (interlace_lim &lt; f-&gt;fmt.pix.height)</div><div class='add'>+			f-&gt;fmt.pix.height = interlace_lim;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_FIELD_INTERLACED:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	f-&gt;fmt.pix.height &amp;= ~1;</div><div class='add'>+	if (2 * interlace_lim &lt; f-&gt;fmt.pix.height)</div><div class='add'>+		f-&gt;fmt.pix.height = 2 * interlace_lim;</div><div class='add'>+	if (200 &gt; f-&gt;fmt.pix.height)</div><div class='add'>+		f-&gt;fmt.pix.height = 200;</div><div class='add'>+	f-&gt;fmt.pix.width = 720;</div><div class='add'>+	f-&gt;fmt.pix.bytesperline = f-&gt;fmt.pix.width * 2;</div><div class='add'>+	f-&gt;fmt.pix.sizeimage = f-&gt;fmt.pix.width * 2 * f-&gt;fmt.pix.height;</div><div class='add'>+	f-&gt;fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;</div><div class='add'>+	f-&gt;fmt.pix.priv = 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_s_fmt_vid_cap - set current video format parameters</div><div class='add'>+ * @file: descriptor of device ( not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @f: returned format information</div><div class='add'>+ *</div><div class='add'>+ * set new capture format</div><div class='add'>+ * return value: 0, no error</div><div class='add'>+ *</div><div class='add'>+ * other, delivered by video DAC routine.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,</div><div class='add'>+				struct v4l2_format *f)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = vidioc_try_fmt_vid_cap(file, priv, f);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;vip-&gt;format, &amp;f-&gt;fmt.pix, sizeof(struct v4l2_pix_format));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_g_fmt_vid_cap - get current video format parameters</div><div class='add'>+ * @file: descriptor of device ( not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @f: contains format information</div><div class='add'>+ *</div><div class='add'>+ * returns current video format parameters</div><div class='add'>+ *</div><div class='add'>+ * return value: 0, always successful</div><div class='add'>+ */</div><div class='add'>+static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,</div><div class='add'>+				struct v4l2_format *f)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;f-&gt;fmt.pix, &amp;vip-&gt;format, sizeof(struct v4l2_pix_format));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_reqfs - request buffer</div><div class='add'>+ * @file: descriptor of device ( not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @p: video buffer</div><div class='add'>+ *</div><div class='add'>+ * Handling is done in generic videobuf layer.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_reqbufs(struct file *file, void *priv,</div><div class='add'>+			  struct v4l2_requestbuffers *p)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return videobuf_reqbufs(&amp;vip-&gt;vb_vidq, p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_querybuf - query buffer</div><div class='add'>+ * @file: descriptor of device ( not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @p: video buffer</div><div class='add'>+ *</div><div class='add'>+ * query buffer state.</div><div class='add'>+ * Handling is done in generic videobuf layer.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_querybuf(struct file *file, void *priv, struct v4l2_buffer *p)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return videobuf_querybuf(&amp;vip-&gt;vb_vidq, p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_qbuf - queue a buffer</div><div class='add'>+ * @file: descriptor of device ( not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @p: video buffer</div><div class='add'>+ *</div><div class='add'>+ * Handling is done in generic videobuf layer.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *p)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return videobuf_qbuf(&amp;vip-&gt;vb_vidq, p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_dqbuf - dequeue a buffer</div><div class='add'>+ * @file: descriptor of device ( not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @p: video buffer</div><div class='add'>+ *</div><div class='add'>+ * Handling is done in generic videobuf layer.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *p)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return videobuf_dqbuf(&amp;vip-&gt;vb_vidq, p, file-&gt;f_flags &amp; O_NONBLOCK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_streamon - turn on streaming</div><div class='add'>+ * @file: descriptor of device ( not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @type: type of capture</div><div class='add'>+ *</div><div class='add'>+ * turn on streaming.</div><div class='add'>+ * Handling is done in generic videobuf layer.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_streamon(struct file *file, void *priv,</div><div class='add'>+			   enum v4l2_buf_type type)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return videobuf_streamon(&amp;vip-&gt;vb_vidq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vidioc_streamoff - turn off streaming</div><div class='add'>+ * @file: descriptor of device ( not used)</div><div class='add'>+ * @priv: points to current videodevice</div><div class='add'>+ * @type: type of capture</div><div class='add'>+ *</div><div class='add'>+ * turn off streaming.</div><div class='add'>+ * Handling is done in generic videobuf layer.</div><div class='add'>+ */</div><div class='add'>+static int vidioc_streamoff(struct file *file, void *priv,</div><div class='add'>+			    enum v4l2_buf_type type)</div><div class='add'>+{</div><div class='add'>+	struct video_device *dev = priv;</div><div class='add'>+	struct sta2x11_vip *vip = video_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return videobuf_streamoff(&amp;vip-&gt;vb_vidq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct v4l2_file_operations vip_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = vip_open,</div><div class='add'>+	.release = vip_close,</div><div class='add'>+	.ioctl = video_ioctl2,</div><div class='add'>+	.read = vip_read,</div><div class='add'>+	.mmap = vip_mmap,</div><div class='add'>+	.poll = vip_poll</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ioctl_ops vip_ioctl_ops = {</div><div class='add'>+	.vidioc_querycap = vidioc_querycap,</div><div class='add'>+	.vidioc_s_std = vidioc_s_std,</div><div class='add'>+	.vidioc_g_std = vidioc_g_std,</div><div class='add'>+	.vidioc_querystd = vidioc_querystd,</div><div class='add'>+	.vidioc_queryctrl = vidioc_queryctrl,</div><div class='add'>+	.vidioc_g_ctrl = vidioc_g_ctrl,</div><div class='add'>+	.vidioc_s_ctrl = vidioc_s_ctrl,</div><div class='add'>+	.vidioc_enum_input = vidioc_enum_input,</div><div class='add'>+	.vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,</div><div class='add'>+	.vidioc_s_input = vidioc_s_input,</div><div class='add'>+	.vidioc_g_input = vidioc_g_input,</div><div class='add'>+	.vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,</div><div class='add'>+	.vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,</div><div class='add'>+	.vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,</div><div class='add'>+	.vidioc_reqbufs = vidioc_reqbufs,</div><div class='add'>+	.vidioc_querybuf = vidioc_querybuf,</div><div class='add'>+	.vidioc_qbuf = vidioc_qbuf,</div><div class='add'>+	.vidioc_dqbuf = vidioc_dqbuf,</div><div class='add'>+	.vidioc_streamon = vidioc_streamon,</div><div class='add'>+	.vidioc_streamoff = vidioc_streamoff,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct video_device video_dev_template = {</div><div class='add'>+	.name = DRV_NAME,</div><div class='add'>+	.release = video_device_release,</div><div class='add'>+	.fops = &amp;vip_fops,</div><div class='add'>+	.ioctl_ops = &amp;vip_ioctl_ops,</div><div class='add'>+	.tvnorms = V4L2_STD_ALL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vip_irq - interrupt routine</div><div class='add'>+ * @irq: Number of interrupt ( not used, correct number is assumed )</div><div class='add'>+ * @vip: local data structure containing all information</div><div class='add'>+ *</div><div class='add'>+ * check for both frame interrupts set ( top and bottom ).</div><div class='add'>+ * check FIFO overflow, but limit number of log messages after open.</div><div class='add'>+ * signal a complete buffer if done.</div><div class='add'>+ * dequeue a new buffer if available.</div><div class='add'>+ * disable VIP if no buffer available.</div><div class='add'>+ *</div><div class='add'>+ * return value: IRQ_NONE, interrupt was not generated by VIP</div><div class='add'>+ *</div><div class='add'>+ * IRQ_HANDLED, interrupt done.</div><div class='add'>+ */</div><div class='add'>+static irqreturn_t vip_irq(int irq, struct sta2x11_vip *vip)</div><div class='add'>+{</div><div class='add'>+	u32 status, dma;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct videobuf_buffer *vb;</div><div class='add'>+</div><div class='add'>+	status = REG_READ(vip, DVP_ITS);</div><div class='add'>+</div><div class='add'>+	if (!status) {</div><div class='add'>+		pr_debug("VIP: irq ignored\n");</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!vip-&gt;started)</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+	if (status &amp; DVP_IT_VSB)</div><div class='add'>+		vip-&gt;bcount++;</div><div class='add'>+</div><div class='add'>+	if (status &amp; DVP_IT_VST)</div><div class='add'>+		vip-&gt;tcount++;</div><div class='add'>+</div><div class='add'>+	if ((DVP_IT_VSB | DVP_IT_VST) == (status &amp; (DVP_IT_VST | DVP_IT_VSB))) {</div><div class='add'>+		/* this is bad, we are too slow, hope the condition is gone</div><div class='add'>+		 * on the next frame */</div><div class='add'>+		pr_info("VIP: both irqs\n");</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (status &amp; DVP_IT_FIFO) {</div><div class='add'>+		if (5 &gt; vip-&gt;overflow++)</div><div class='add'>+			pr_info("VIP: fifo overflow\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (2 &gt; vip-&gt;tcount)</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+	if (status &amp; DVP_IT_VSB)</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;vip-&gt;slock, flags);</div><div class='add'>+</div><div class='add'>+	REG_WRITE(vip, DVP_CTL, REG_READ(vip, DVP_CTL) &amp; ~DVP_CTL_ENA);</div><div class='add'>+	if (vip-&gt;active) {</div><div class='add'>+		do_gettimeofday(&amp;vip-&gt;active-&gt;ts);</div><div class='add'>+		vip-&gt;active-&gt;field_count++;</div><div class='add'>+		vip-&gt;active-&gt;state = VIDEOBUF_DONE;</div><div class='add'>+		wake_up(&amp;vip-&gt;active-&gt;done);</div><div class='add'>+		vip-&gt;active = NULL;</div><div class='add'>+	}</div><div class='add'>+	if (!vip-&gt;closing) {</div><div class='add'>+		if (list_empty(&amp;vip-&gt;capture))</div><div class='add'>+			goto done;</div><div class='add'>+</div><div class='add'>+		vb = list_first_entry(&amp;vip-&gt;capture, struct videobuf_buffer,</div><div class='add'>+				      queue);</div><div class='add'>+		if (NULL == vb) {</div><div class='add'>+			pr_info("VIP: no buffer\n");</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+		vb-&gt;state = VIDEOBUF_ACTIVE;</div><div class='add'>+		list_del(&amp;vb-&gt;queue);</div><div class='add'>+		vip-&gt;active = vb;</div><div class='add'>+		dma = videobuf_to_dma_contig(vb);</div><div class='add'>+		switch (vip-&gt;format.field) {</div><div class='add'>+		case V4L2_FIELD_INTERLACED:</div><div class='add'>+			REG_WRITE(vip, DVP_VTP, dma);</div><div class='add'>+			REG_WRITE(vip, DVP_VBP, dma + vip-&gt;format.width * 2);</div><div class='add'>+			break;</div><div class='add'>+		case V4L2_FIELD_TOP:</div><div class='add'>+		case V4L2_FIELD_BOTTOM:</div><div class='add'>+			REG_WRITE(vip, DVP_VTP, dma);</div><div class='add'>+			REG_WRITE(vip, DVP_VBP, dma);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			pr_warning("VIP: unknown field format\n");</div><div class='add'>+			goto done;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		REG_WRITE(vip, DVP_CTL, REG_READ(vip, DVP_CTL) | DVP_CTL_ENA);</div><div class='add'>+	}</div><div class='add'>+done:</div><div class='add'>+	spin_unlock_irqrestore(&amp;vip-&gt;slock, flags);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vip_gpio_reserve - reserve gpio pin</div><div class='add'>+ * @dev: device</div><div class='add'>+ * @pin: GPIO pin number</div><div class='add'>+ * @dir: direction, input or output</div><div class='add'>+ * @name: GPIO pin name</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static int vip_gpio_reserve(struct device *dev, int pin, int dir,</div><div class='add'>+			    const char *name)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (pin == -1)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = gpio_request(pin, name);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Failed to allocate pin %d (%s)\n", pin, name);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = gpio_direction_output(pin, dir);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Failed to set direction for pin %d (%s)\n",</div><div class='add'>+			pin, name);</div><div class='add'>+		gpio_free(pin);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = gpio_export(pin, false);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Failed to export pin %d (%s)\n", pin, name);</div><div class='add'>+		gpio_free(pin);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vip_gpio_release - release gpio pin</div><div class='add'>+ * @dev: device</div><div class='add'>+ * @pin: GPIO pin number</div><div class='add'>+ * @name: GPIO pin name</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static void vip_gpio_release(struct device *dev, int pin, const char *name)</div><div class='add'>+{</div><div class='add'>+	if (pin != -1) {</div><div class='add'>+		dev_dbg(dev, "releasing pin %d (%s)\n",	pin, name);</div><div class='add'>+		gpio_unexport(pin);</div><div class='add'>+		gpio_free(pin);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * sta2x11_vip_init_one - init one instance of video device</div><div class='add'>+ * @pdev: PCI device</div><div class='add'>+ * @ent: (not used)</div><div class='add'>+ *</div><div class='add'>+ * allocate reset pins for DAC.</div><div class='add'>+ * Reset video DAC, this is done via reset line.</div><div class='add'>+ * allocate memory for managing device</div><div class='add'>+ * request interrupt</div><div class='add'>+ * map IO region</div><div class='add'>+ * register device</div><div class='add'>+ * find and initialize video DAC</div><div class='add'>+ *</div><div class='add'>+ * return value: 0, no error</div><div class='add'>+ *</div><div class='add'>+ * -ENOMEM, no memory</div><div class='add'>+ *</div><div class='add'>+ * -ENODEV, device could not be detected or registered</div><div class='add'>+ */</div><div class='add'>+static int __devinit sta2x11_vip_init_one(struct pci_dev *pdev,</div><div class='add'>+					  const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct sta2x11_vip *vip;</div><div class='add'>+	struct vip_config *config;</div><div class='add'>+</div><div class='add'>+	ret = pci_enable_device(pdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	config = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+	if (!config) {</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "VIP slot disabled\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = vip_gpio_reserve(&amp;pdev-&gt;dev, config-&gt;pwr_pin, 0,</div><div class='add'>+			       config-&gt;pwr_name);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto disable;</div><div class='add'>+</div><div class='add'>+	if (config-&gt;reset_pin &gt;= 0) {</div><div class='add'>+		ret = vip_gpio_reserve(&amp;pdev-&gt;dev, config-&gt;reset_pin, 0,</div><div class='add'>+				       config-&gt;reset_name);</div><div class='add'>+		if (ret) {</div><div class='add'>+			vip_gpio_release(&amp;pdev-&gt;dev, config-&gt;pwr_pin,</div><div class='add'>+					 config-&gt;pwr_name);</div><div class='add'>+			goto disable;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (config-&gt;pwr_pin != -1) {</div><div class='add'>+		/* Datasheet says 5ms between PWR and RST */</div><div class='add'>+		usleep_range(5000, 25000);</div><div class='add'>+		ret = gpio_direction_output(config-&gt;pwr_pin, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (config-&gt;reset_pin != -1) {</div><div class='add'>+		/* Datasheet says 5ms between PWR and RST */</div><div class='add'>+		usleep_range(5000, 25000);</div><div class='add'>+		ret = gpio_direction_output(config-&gt;reset_pin, 1);</div><div class='add'>+	}</div><div class='add'>+	usleep_range(5000, 25000);</div><div class='add'>+</div><div class='add'>+	vip = kzalloc(sizeof(struct sta2x11_vip), GFP_KERNEL);</div><div class='add'>+	if (!vip) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto release_gpios;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vip-&gt;pdev = pdev;</div><div class='add'>+	vip-&gt;std = V4L2_STD_PAL;</div><div class='add'>+	vip-&gt;format = formats_50[0];</div><div class='add'>+	vip-&gt;config = config;</div><div class='add'>+</div><div class='add'>+	if (v4l2_device_register(&amp;pdev-&gt;dev, &amp;vip-&gt;v4l2_dev))</div><div class='add'>+		goto free_mem;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "BAR #0 at 0x%lx 0x%lx irq %d\n",</div><div class='add'>+		(unsigned long)pci_resource_start(pdev, 0),</div><div class='add'>+		(unsigned long)pci_resource_len(pdev, 0), pdev-&gt;irq);</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	ret = pci_request_regions(pdev, DRV_NAME);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unreg;</div><div class='add'>+</div><div class='add'>+	vip-&gt;iomem = pci_iomap(pdev, 0, 0x100);</div><div class='add'>+	if (!vip-&gt;iomem) {</div><div class='add'>+		ret = -ENOMEM; /* FIXME */</div><div class='add'>+		goto release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_enable_msi(pdev);</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;vip-&gt;capture);</div><div class='add'>+	spin_lock_init(&amp;vip-&gt;slock);</div><div class='add'>+	mutex_init(&amp;vip-&gt;mutex);</div><div class='add'>+	vip-&gt;started = 0;</div><div class='add'>+	vip-&gt;disabled = 0;</div><div class='add'>+</div><div class='add'>+	ret = request_irq(pdev-&gt;irq,</div><div class='add'>+			  (irq_handler_t) vip_irq,</div><div class='add'>+			  IRQF_SHARED, DRV_NAME, vip);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "request_irq failed\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto unmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vip-&gt;video_dev = video_device_alloc();</div><div class='add'>+	if (!vip-&gt;video_dev) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto release_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*(vip-&gt;video_dev) = video_dev_template;</div><div class='add'>+	video_set_drvdata(vip-&gt;video_dev, vip);</div><div class='add'>+</div><div class='add'>+	ret = video_register_device(vip-&gt;video_dev, VFL_TYPE_GRABBER, -1);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto vrelease;</div><div class='add'>+</div><div class='add'>+	vip-&gt;adapter = i2c_get_adapter(vip-&gt;config-&gt;i2c_id);</div><div class='add'>+	if (!vip-&gt;adapter) {</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "no I2C adapter found\n");</div><div class='add'>+		goto vunreg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vip-&gt;decoder = v4l2_i2c_new_subdev(&amp;vip-&gt;v4l2_dev, vip-&gt;adapter,</div><div class='add'>+					   "adv7180", vip-&gt;config-&gt;i2c_addr,</div><div class='add'>+					   NULL);</div><div class='add'>+	if (!vip-&gt;decoder) {</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "no decoder found\n");</div><div class='add'>+		goto vunreg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i2c_put_adapter(vip-&gt;adapter);</div><div class='add'>+</div><div class='add'>+	v4l2_subdev_call(vip-&gt;decoder, core, init, 0);</div><div class='add'>+</div><div class='add'>+	pr_info("STA2X11 Video Input Port (VIP) loaded\n");</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+vunreg:</div><div class='add'>+	video_set_drvdata(vip-&gt;video_dev, NULL);</div><div class='add'>+vrelease:</div><div class='add'>+	if (video_is_registered(vip-&gt;video_dev))</div><div class='add'>+		video_unregister_device(vip-&gt;video_dev);</div><div class='add'>+	else</div><div class='add'>+		video_device_release(vip-&gt;video_dev);</div><div class='add'>+release_irq:</div><div class='add'>+	free_irq(pdev-&gt;irq, vip);</div><div class='add'>+	pci_disable_msi(pdev);</div><div class='add'>+unmap:</div><div class='add'>+	pci_iounmap(pdev, vip-&gt;iomem);</div><div class='add'>+	mutex_destroy(&amp;vip-&gt;mutex);</div><div class='add'>+release:</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+unreg:</div><div class='add'>+	v4l2_device_unregister(&amp;vip-&gt;v4l2_dev);</div><div class='add'>+free_mem:</div><div class='add'>+	kfree(vip);</div><div class='add'>+release_gpios:</div><div class='add'>+	vip_gpio_release(&amp;pdev-&gt;dev, config-&gt;reset_pin, config-&gt;reset_name);</div><div class='add'>+	vip_gpio_release(&amp;pdev-&gt;dev, config-&gt;pwr_pin, config-&gt;pwr_name);</div><div class='add'>+disable:</div><div class='add'>+	/*</div><div class='add'>+	 * do not call pci_disable_device on sta2x11 because it break all</div><div class='add'>+	 * other Bus masters on this EP</div><div class='add'>+	 */</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * sta2x11_vip_remove_one - release device</div><div class='add'>+ * @pdev: PCI device</div><div class='add'>+ *</div><div class='add'>+ * Undo everything done in .._init_one</div><div class='add'>+ *</div><div class='add'>+ * unregister video device</div><div class='add'>+ * free interrupt</div><div class='add'>+ * unmap ioadresses</div><div class='add'>+ * free memory</div><div class='add'>+ * free GPIO pins</div><div class='add'>+ */</div><div class='add'>+static void __devexit sta2x11_vip_remove_one(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);</div><div class='add'>+	struct sta2x11_vip *vip =</div><div class='add'>+	    container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);</div><div class='add'>+</div><div class='add'>+	video_set_drvdata(vip-&gt;video_dev, NULL);</div><div class='add'>+	video_unregister_device(vip-&gt;video_dev);</div><div class='add'>+	/*do not call video_device_release() here, is already done */</div><div class='add'>+	free_irq(pdev-&gt;irq, vip);</div><div class='add'>+	pci_disable_msi(pdev);</div><div class='add'>+	pci_iounmap(pdev, vip-&gt;iomem);</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+</div><div class='add'>+	v4l2_device_unregister(&amp;vip-&gt;v4l2_dev);</div><div class='add'>+	mutex_destroy(&amp;vip-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	vip_gpio_release(&amp;pdev-&gt;dev, vip-&gt;config-&gt;pwr_pin,</div><div class='add'>+			 vip-&gt;config-&gt;pwr_name);</div><div class='add'>+	vip_gpio_release(&amp;pdev-&gt;dev, vip-&gt;config-&gt;reset_pin,</div><div class='add'>+			 vip-&gt;config-&gt;reset_name);</div><div class='add'>+</div><div class='add'>+	kfree(vip);</div><div class='add'>+	/*</div><div class='add'>+	 * do not call pci_disable_device on sta2x11 because it break all</div><div class='add'>+	 * other Bus masters on this EP</div><div class='add'>+	 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * sta2x11_vip_suspend - set device into power save mode</div><div class='add'>+ * @pdev: PCI device</div><div class='add'>+ * @state: new state of device</div><div class='add'>+ *</div><div class='add'>+ * all relevant registers are saved and an attempt to set a new state is made.</div><div class='add'>+ *</div><div class='add'>+ * return value: 0 always indicate success,</div><div class='add'>+ * even if device could not be disabled. (workaround for hardware problem)</div><div class='add'>+ *</div><div class='add'>+ * reurn value : 0, always succesful, even if hardware does not not support</div><div class='add'>+ * power down mode.</div><div class='add'>+ */</div><div class='add'>+static int sta2x11_vip_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);</div><div class='add'>+	struct sta2x11_vip *vip =</div><div class='add'>+	    container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;vip-&gt;slock, flags);</div><div class='add'>+	vip-&gt;register_save_area[0] = REG_READ(vip, DVP_CTL);</div><div class='add'>+	REG_WRITE(vip, DVP_CTL, vip-&gt;register_save_area[0] &amp; DVP_CTL_DIS);</div><div class='add'>+	vip-&gt;register_save_area[SAVE_COUNT] = REG_READ(vip, DVP_ITM);</div><div class='add'>+	REG_WRITE(vip, DVP_ITM, 0);</div><div class='add'>+	for (i = 1; i &lt; SAVE_COUNT; i++)</div><div class='add'>+		vip-&gt;register_save_area[i] = REG_READ(vip, 4 * i);</div><div class='add'>+	for (i = 0; i &lt; AUX_COUNT; i++)</div><div class='add'>+		vip-&gt;register_save_area[SAVE_COUNT + IRQ_COUNT + i] =</div><div class='add'>+		    REG_READ(vip, registers_to_save[i]);</div><div class='add'>+	spin_unlock_irqrestore(&amp;vip-&gt;slock, flags);</div><div class='add'>+	/* save pci state */</div><div class='add'>+	pci_save_state(pdev);</div><div class='add'>+	if (pci_set_power_state(pdev, pci_choose_state(pdev, state))) {</div><div class='add'>+		/*</div><div class='add'>+		 * do not call pci_disable_device on sta2x11 because it</div><div class='add'>+		 * break all other Bus masters on this EP</div><div class='add'>+		 */</div><div class='add'>+		vip-&gt;disabled = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_info("VIP: suspend\n");</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * sta2x11_vip_resume - resume device operation</div><div class='add'>+ * @pdev : PCI device</div><div class='add'>+ *</div><div class='add'>+ * re-enable device, set PCI state to powered and restore registers.</div><div class='add'>+ * resume normal device operation afterwards.</div><div class='add'>+ *</div><div class='add'>+ * return value: 0, no error.</div><div class='add'>+ *</div><div class='add'>+ * other, could not set device to power on state.</div><div class='add'>+ */</div><div class='add'>+static int sta2x11_vip_resume(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);</div><div class='add'>+	struct sta2x11_vip *vip =</div><div class='add'>+	    container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	pr_info("VIP: resume\n");</div><div class='add'>+	/* restore pci state */</div><div class='add'>+	if (vip-&gt;disabled) {</div><div class='add'>+		ret = pci_enable_device(pdev);</div><div class='add'>+		if (ret) {</div><div class='add'>+			pr_warning("VIP: Can't enable device.\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		vip-&gt;disabled = 0;</div><div class='add'>+	}</div><div class='add'>+	ret = pci_set_power_state(pdev, PCI_D0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/*</div><div class='add'>+		 * do not call pci_disable_device on sta2x11 because it</div><div class='add'>+		 * break all other Bus masters on this EP</div><div class='add'>+		 */</div><div class='add'>+		pr_warning("VIP: Can't enable device.\n");</div><div class='add'>+		vip-&gt;disabled = 1;</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_restore_state(pdev);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;vip-&gt;slock, flags);</div><div class='add'>+	for (i = 1; i &lt; SAVE_COUNT; i++)</div><div class='add'>+		REG_WRITE(vip, 4 * i, vip-&gt;register_save_area[i]);</div><div class='add'>+	for (i = 0; i &lt; AUX_COUNT; i++)</div><div class='add'>+		REG_WRITE(vip, registers_to_save[i],</div><div class='add'>+			  vip-&gt;register_save_area[SAVE_COUNT + IRQ_COUNT + i]);</div><div class='add'>+	REG_WRITE(vip, DVP_CTL, vip-&gt;register_save_area[0]);</div><div class='add'>+	REG_WRITE(vip, DVP_ITM, vip-&gt;register_save_area[SAVE_COUNT]);</div><div class='add'>+	spin_unlock_irqrestore(&amp;vip-&gt;slock, flags);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static DEFINE_PCI_DEVICE_TABLE(sta2x11_vip_pci_tbl) = {</div><div class='add'>+	{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIP)},</div><div class='add'>+	{0,}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pci_driver sta2x11_vip_driver = {</div><div class='add'>+	.name = DRV_NAME,</div><div class='add'>+	.probe = sta2x11_vip_init_one,</div><div class='add'>+	.remove = __devexit_p(sta2x11_vip_remove_one),</div><div class='add'>+	.id_table = sta2x11_vip_pci_tbl,</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+	.suspend = sta2x11_vip_suspend,</div><div class='add'>+	.resume = sta2x11_vip_resume,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init sta2x11_vip_init_module(void)</div><div class='add'>+{</div><div class='add'>+	return pci_register_driver(&amp;sta2x11_vip_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit sta2x11_vip_exit_module(void)</div><div class='add'>+{</div><div class='add'>+	pci_unregister_driver(&amp;sta2x11_vip_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef MODULE</div><div class='add'>+module_init(sta2x11_vip_init_module);</div><div class='add'>+module_exit(sta2x11_vip_exit_module);</div><div class='add'>+#else</div><div class='add'>+late_initcall_sync(sta2x11_vip_init_module);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("STA2X11 Video Input Port driver");</div><div class='add'>+MODULE_AUTHOR("Wind River");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_SUPPORTED_DEVICE("sta2x11 video input");</div><div class='add'>+MODULE_VERSION(DRV_VERSION);</div><div class='add'>+MODULE_DEVICE_TABLE(pci, sta2x11_vip_pci_tbl);</div><div class='head'>diff --git a/drivers/media/video/sta2x11_vip.h b/drivers/media/video/sta2x11_vip.h<br/>new file mode 100644<br/>index 000000000000..4f81a13666eb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/sta2x11_vip.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/sta2x11_vip.h</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2011 Wind River Systems, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.</div><div class='add'>+ * See the GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA</div><div class='add'>+ *</div><div class='add'>+ * Author:  Anders Wallin &lt;anders.wallin@windriver.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __STA2X11_VIP_H</div><div class='add'>+#define __STA2X11_VIP_H</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct vip_config - video input configuration data</div><div class='add'>+ * @pwr_name: ADV powerdown name</div><div class='add'>+ * @pwr_pin: ADV powerdown pin</div><div class='add'>+ * @reset_name: ADV reset name</div><div class='add'>+ * @reset_pin: ADV reset pin</div><div class='add'>+ */</div><div class='add'>+struct vip_config {</div><div class='add'>+	const char *pwr_name;</div><div class='add'>+	int pwr_pin;</div><div class='add'>+	const char *reset_name;</div><div class='add'>+	int reset_pin;</div><div class='add'>+	int i2c_id;</div><div class='add'>+	int i2c_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* __STA2X11_VIP_H */</div><div class='head'>diff --git a/drivers/media/video/stk-webcam.c b/drivers/media/video/stk-webcam.c<br/>index d427f8436c70..86a0fc56c330 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/stk-webcam.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/stk-webcam.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/stk-webcam.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/stk-webcam.c</a></div><div class='hunk'>@@ -38,13 +38,13 @@</div><div class='ctx'> #include "stk-webcam.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static bool hflip = 1;</div><div class='add'>+static bool hflip;</div><div class='ctx'> module_param(hflip, bool, 0444);</div><div class='del'>-MODULE_PARM_DESC(hflip, "Horizontal image flip (mirror). Defaults to 1");</div><div class='add'>+MODULE_PARM_DESC(hflip, "Horizontal image flip (mirror). Defaults to 0");</div><div class='ctx'> </div><div class='del'>-static bool vflip = 1;</div><div class='add'>+static bool vflip;</div><div class='ctx'> module_param(vflip, bool, 0444);</div><div class='del'>-MODULE_PARM_DESC(vflip, "Vertical image flip. Defaults to 1");</div><div class='add'>+MODULE_PARM_DESC(vflip, "Vertical image flip. Defaults to 0");</div><div class='ctx'> </div><div class='ctx'> static int debug;</div><div class='ctx'> module_param(debug, int, 0444);</div><div class='head'>diff --git a/drivers/media/video/tda9840.c b/drivers/media/video/tda9840.c<br/>index 465d7086babf..3d7ddd93282d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/tda9840.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/tda9840.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/tda9840.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tda9840.c</a></div><div class='hunk'>@@ -66,29 +66,53 @@ static void tda9840_write(struct v4l2_subdev *sd, u8 reg, u8 val)</div><div class='ctx'> 				val, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int tda9840_status(struct v4l2_subdev *sd)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = v4l2_get_subdevdata(sd);</div><div class='add'>+	u8 byte;</div><div class='add'>+</div><div class='add'>+	if (1 != i2c_master_recv(client, &amp;byte, 1)) {</div><div class='add'>+		v4l2_dbg(1, debug, sd,</div><div class='add'>+			"i2c_master_recv() failed\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (byte &amp; 0x80) {</div><div class='add'>+		v4l2_dbg(1, debug, sd,</div><div class='add'>+			"TDA9840_DETECT: register contents invalid\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	v4l2_dbg(1, debug, sd, "TDA9840_DETECT: byte: 0x%02x\n", byte);</div><div class='add'>+	return byte &amp; 0x60;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int tda9840_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *t)</div><div class='ctx'> {</div><div class='add'>+	int stat = tda9840_status(sd);</div><div class='ctx'> 	int byte;</div><div class='ctx'> </div><div class='ctx'> 	if (t-&gt;index)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	switch (t-&gt;audmode) {</div><div class='del'>-	case V4L2_TUNER_MODE_STEREO:</div><div class='del'>-		byte = TDA9840_SET_STEREO;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_TUNER_MODE_LANG1_LANG2:</div><div class='del'>-		byte = TDA9840_SET_BOTH;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_TUNER_MODE_LANG1:</div><div class='del'>-		byte = TDA9840_SET_LANG1;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_TUNER_MODE_LANG2:</div><div class='del'>-		byte = TDA9840_SET_LANG2;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='add'>+	stat = stat &lt; 0 ? 0 : stat;</div><div class='add'>+	if (stat == 0 || stat == 0x60) /* mono input */</div><div class='ctx'> 		byte = TDA9840_SET_MONO;</div><div class='del'>-		break;</div><div class='add'>+	else if (stat == 0x40) /* stereo input */</div><div class='add'>+		byte = (t-&gt;audmode == V4L2_TUNER_MODE_MONO) ?</div><div class='add'>+			TDA9840_SET_MONO : TDA9840_SET_STEREO;</div><div class='add'>+	else { /* bilingual */</div><div class='add'>+		switch (t-&gt;audmode) {</div><div class='add'>+		case V4L2_TUNER_MODE_LANG1_LANG2:</div><div class='add'>+			byte = TDA9840_SET_BOTH;</div><div class='add'>+			break;</div><div class='add'>+		case V4L2_TUNER_MODE_LANG2:</div><div class='add'>+			byte = TDA9840_SET_LANG2;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			byte = TDA9840_SET_LANG1;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	v4l2_dbg(1, debug, sd, "TDA9840_SWITCH: 0x%02x\n", byte);</div><div class='ctx'> 	tda9840_write(sd, SWITCH, byte);</div><div class='hunk'>@@ -97,25 +121,14 @@ static int tda9840_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *t)</div><div class='ctx'> </div><div class='ctx'> static int tda9840_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *t)</div><div class='ctx'> {</div><div class='del'>-	struct i2c_client *client = v4l2_get_subdevdata(sd);</div><div class='del'>-	u8 byte;</div><div class='del'>-</div><div class='del'>-	t-&gt;rxsubchans = V4L2_TUNER_SUB_MONO;</div><div class='del'>-	if (1 != i2c_master_recv(client, &amp;byte, 1)) {</div><div class='del'>-		v4l2_dbg(1, debug, sd,</div><div class='del'>-			"i2c_master_recv() failed\n");</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='add'>+	int stat = tda9840_status(sd);</div><div class='ctx'> </div><div class='del'>-	if (byte &amp; 0x80) {</div><div class='del'>-		v4l2_dbg(1, debug, sd,</div><div class='del'>-			"TDA9840_DETECT: register contents invalid\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	if (stat &lt; 0)</div><div class='add'>+		return stat;</div><div class='ctx'> </div><div class='del'>-	v4l2_dbg(1, debug, sd, "TDA9840_DETECT: byte: 0x%02x\n", byte);</div><div class='add'>+	t-&gt;rxsubchans = V4L2_TUNER_SUB_MONO;</div><div class='ctx'> </div><div class='del'>-	switch (byte &amp; 0x60) {</div><div class='add'>+	switch (stat &amp; 0x60) {</div><div class='ctx'> 	case 0x00:</div><div class='ctx'> 		t-&gt;rxsubchans = V4L2_TUNER_SUB_MONO;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/media/video/tlg2300/pd-video.c b/drivers/media/video/tlg2300/pd-video.c<br/>index a794ae62aebf..bfbf9e56b0a4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/tlg2300/pd-video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/tlg2300/pd-video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/tlg2300/pd-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tlg2300/pd-video.c</a></div><div class='hunk'>@@ -150,7 +150,6 @@ static int vidioc_querycap(struct file *file, void *fh,</div><div class='ctx'> 	strcpy(cap-&gt;driver, "tele-video");</div><div class='ctx'> 	strcpy(cap-&gt;card, "Telegent Poseidon");</div><div class='ctx'> 	usb_make_path(p-&gt;udev, cap-&gt;bus_info, sizeof(cap-&gt;bus_info));</div><div class='del'>-	cap-&gt;version = KERNEL_VERSION(0, 0, 1);</div><div class='ctx'> 	cap-&gt;capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_TUNER |</div><div class='ctx'> 				V4L2_CAP_AUDIO | V4L2_CAP_STREAMING |</div><div class='ctx'> 				V4L2_CAP_READWRITE | V4L2_CAP_VBI_CAPTURE;</div><div class='head'>diff --git a/drivers/media/video/tm6000/tm6000-input.c b/drivers/media/video/tm6000/tm6000-input.c<br/>index 859eb90e4d56..e80b7e190471 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/tm6000/tm6000-input.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/tm6000/tm6000-input.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/tm6000/tm6000-input.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tm6000/tm6000-input.c</a></div><div class='hunk'>@@ -168,7 +168,6 @@ static void tm6000_ir_urb_received(struct urb *urb)</div><div class='ctx'> 	struct tm6000_IR *ir = dev-&gt;ir;</div><div class='ctx'> 	struct tm6000_ir_poll_result poll_result;</div><div class='ctx'> 	char *buf;</div><div class='del'>-	int rc;</div><div class='ctx'> </div><div class='ctx'> 	dprintk(2, "%s\n",__func__);</div><div class='ctx'> 	if (urb-&gt;status &lt; 0 || urb-&gt;actual_length &lt;= 0) {</div><div class='hunk'>@@ -192,7 +191,7 @@ static void tm6000_ir_urb_received(struct urb *urb)</div><div class='ctx'> 	dprintk(1, "%s, scancode: 0x%04x\n",__func__, poll_result.rc_data);</div><div class='ctx'> 	rc_keydown(ir-&gt;rc, poll_result.rc_data, 0);</div><div class='ctx'> </div><div class='del'>-	rc = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Flash the led. We can't do it here, as it is running on IRQ context.</div><div class='ctx'> 	 * So, use the scheduler to do it, in a few ms.</div><div class='head'>diff --git a/drivers/media/video/tm6000/tm6000-stds.c b/drivers/media/video/tm6000/tm6000-stds.c<br/>index 9dc0831d813f..5e28d6a2412f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/tm6000/tm6000-stds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/tm6000/tm6000-stds.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/tm6000/tm6000-stds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tm6000/tm6000-stds.c</a></div><div class='hunk'>@@ -338,7 +338,6 @@ static int tm6000_set_audio_std(struct tm6000_core *dev)</div><div class='ctx'> 	uint8_t areg_02 = 0x04; /* GC1 Fixed gain 0dB */</div><div class='ctx'> 	uint8_t areg_05 = 0x01; /* Auto 4.5 = M Japan, Auto 6.5 = DK */</div><div class='ctx'> 	uint8_t areg_06 = 0x02; /* Auto de-emphasis, mannual channel mode */</div><div class='del'>-	uint8_t nicam_flag = 0; /* No NICAM */</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;radio) {</div><div class='ctx'> 		tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00);</div><div class='hunk'>@@ -398,7 +397,6 @@ static int tm6000_set_audio_std(struct tm6000_core *dev)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			areg_05 = 0x07;</div><div class='ctx'> 		}</div><div class='del'>-		nicam_flag = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	/* other */</div><div class='ctx'> 	case 3:</div><div class='head'>diff --git a/drivers/media/video/tm6000/tm6000-video.c b/drivers/media/video/tm6000/tm6000-video.c<br/>index bc13db736e24..f7034df94e0a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/tm6000/tm6000-video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/tm6000/tm6000-video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/tm6000/tm6000-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tm6000/tm6000-video.c</a></div><div class='hunk'>@@ -169,7 +169,6 @@ static inline void get_next_buf(struct tm6000_dmaqueue *dma_q,</div><div class='ctx'> 			       struct tm6000_buffer   **buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct tm6000_core *dev = container_of(dma_q, struct tm6000_core, vidq);</div><div class='del'>-	char *outp;</div><div class='ctx'> </div><div class='ctx'> 	if (list_empty(&amp;dma_q-&gt;active)) {</div><div class='ctx'> 		dprintk(dev, V4L2_DEBUG_QUEUE, "No active queue to serve\n");</div><div class='hunk'>@@ -179,11 +178,6 @@ static inline void get_next_buf(struct tm6000_dmaqueue *dma_q,</div><div class='ctx'> </div><div class='ctx'> 	*buf = list_entry(dma_q-&gt;active.next,</div><div class='ctx'> 			struct tm6000_buffer, vb.queue);</div><div class='del'>-</div><div class='del'>-	/* Cleans up buffer - Useful for testing for frame/URB loss */</div><div class='del'>-	outp = videobuf_to_vmalloc(&amp;(*buf)-&gt;vb);</div><div class='del'>-</div><div class='del'>-	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -211,7 +205,7 @@ static int copy_streams(u8 *data, unsigned long len,</div><div class='ctx'> {</div><div class='ctx'> 	struct tm6000_dmaqueue  *dma_q = urb-&gt;context;</div><div class='ctx'> 	struct tm6000_core *dev = container_of(dma_q, struct tm6000_core, vidq);</div><div class='del'>-	u8 *ptr = data, *endp = data+len, c;</div><div class='add'>+	u8 *ptr = data, *endp = data+len;</div><div class='ctx'> 	unsigned long header = 0;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> 	unsigned int cmd, cpysize, pktsize, size, field, block, line, pos = 0;</div><div class='hunk'>@@ -264,7 +258,6 @@ static int copy_streams(u8 *data, unsigned long len,</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* split the header fields */</div><div class='del'>-			c = (header &gt;&gt; 24) &amp; 0xff;</div><div class='ctx'> 			size = ((header &amp; 0x7e) &lt;&lt; 1);</div><div class='ctx'> 			if (size &gt; 0)</div><div class='ctx'> 				size -= 4;</div><div class='hunk'>@@ -889,7 +882,6 @@ static int vidioc_querycap(struct file *file, void  *priv,</div><div class='ctx'> </div><div class='ctx'> 	strlcpy(cap-&gt;driver, "tm6000", sizeof(cap-&gt;driver));</div><div class='ctx'> 	strlcpy(cap-&gt;card, "Trident TVMaster TM5600/6000/6010", sizeof(cap-&gt;card));</div><div class='del'>-	cap-&gt;version = TM6000_VERSION;</div><div class='ctx'> 	cap-&gt;capabilities =	V4L2_CAP_VIDEO_CAPTURE |</div><div class='ctx'> 				V4L2_CAP_STREAMING     |</div><div class='ctx'> 				V4L2_CAP_AUDIO         |</div><div class='hunk'>@@ -1732,6 +1724,10 @@ static struct video_device *vdev_init(struct tm6000_core *dev,</div><div class='ctx'> 	vfd-&gt;release = video_device_release;</div><div class='ctx'> 	vfd-&gt;debug = tm6000_debug;</div><div class='ctx'> 	vfd-&gt;lock = &amp;dev-&gt;lock;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vfd-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	snprintf(vfd-&gt;name, sizeof(vfd-&gt;name), "%s %s", dev-&gt;name, type_name);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/tm6000/tm6000.h b/drivers/media/video/tm6000/tm6000.h<br/>index 27ba659cfa85..6df418658c9c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/tm6000/tm6000.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/tm6000/tm6000.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/tm6000/tm6000.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tm6000/tm6000.h</a></div><div class='hunk'>@@ -33,8 +33,6 @@</div><div class='ctx'> #include "dvb_frontend.h"</div><div class='ctx'> #include "dmxdev.h"</div><div class='ctx'> </div><div class='del'>-#define TM6000_VERSION KERNEL_VERSION(0, 0, 2)</div><div class='del'>-</div><div class='ctx'> /* Inputs */</div><div class='ctx'> enum tm6000_itype {</div><div class='ctx'> 	TM6000_INPUT_TV	= 1,</div><div class='head'>diff --git a/drivers/media/video/tuner-core.c b/drivers/media/video/tuner-core.c<br/>index a5c6397ad591..3e050e12153b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/tuner-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/tuner-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/tuner-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tuner-core.c</a></div><div class='hunk'>@@ -1241,8 +1241,10 @@ static int tuner_log_status(struct v4l2_subdev *sd)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tuner_suspend(struct i2c_client *c, pm_message_t state)</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int tuner_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct i2c_client *c = to_i2c_client(dev);</div><div class='ctx'> 	struct tuner *t = to_tuner(i2c_get_clientdata(c));</div><div class='ctx'> 	struct analog_demod_ops *analog_ops = &amp;t-&gt;fe.ops.analog_ops;</div><div class='ctx'> </div><div class='hunk'>@@ -1254,8 +1256,9 @@ static int tuner_suspend(struct i2c_client *c, pm_message_t state)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tuner_resume(struct i2c_client *c)</div><div class='add'>+static int tuner_resume(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct i2c_client *c = to_i2c_client(dev);</div><div class='ctx'> 	struct tuner *t = to_tuner(i2c_get_clientdata(c));</div><div class='ctx'> </div><div class='ctx'> 	tuner_dbg("resume\n");</div><div class='hunk'>@@ -1266,6 +1269,7 @@ static int tuner_resume(struct i2c_client *c)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static int tuner_command(struct i2c_client *client, unsigned cmd, void *arg)</div><div class='ctx'> {</div><div class='hunk'>@@ -1310,6 +1314,10 @@ static const struct v4l2_subdev_ops tuner_ops = {</div><div class='ctx'>  * I2C structs and module init functions</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+static const struct dev_pm_ops tuner_pm_ops = {</div><div class='add'>+	SET_SYSTEM_SLEEP_PM_OPS(tuner_suspend, tuner_resume)</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct i2c_device_id tuner_id[] = {</div><div class='ctx'> 	{ "tuner", }, /* autodetect */</div><div class='ctx'> 	{ }</div><div class='hunk'>@@ -1320,12 +1328,11 @@ static struct i2c_driver tuner_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 		.name	= "tuner",</div><div class='add'>+		.pm	= &amp;tuner_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= tuner_probe,</div><div class='ctx'> 	.remove		= tuner_remove,</div><div class='ctx'> 	.command	= tuner_command,</div><div class='del'>-	.suspend	= tuner_suspend,</div><div class='del'>-	.resume		= tuner_resume,</div><div class='ctx'> 	.id_table	= tuner_id,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/tvp5150.c b/drivers/media/video/tvp5150.c<br/>index 1326e11cf4a9..b7867427e5c4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/tvp5150.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/tvp5150.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/tvp5150.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tvp5150.c</a></div><div class='hunk'>@@ -822,7 +822,7 @@ static int tvp5150_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,</div><div class='ctx'> 	if (index)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	*code = V4L2_MBUS_FMT_YUYV8_2X8;</div><div class='add'>+	*code = V4L2_MBUS_FMT_UYVY8_2X8;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -830,23 +830,16 @@ static int tvp5150_mbus_fmt(struct v4l2_subdev *sd,</div><div class='ctx'> 			    struct v4l2_mbus_framefmt *f)</div><div class='ctx'> {</div><div class='ctx'> 	struct tvp5150 *decoder = to_tvp5150(sd);</div><div class='del'>-	v4l2_std_id std;</div><div class='ctx'> </div><div class='ctx'> 	if (f == NULL)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	tvp5150_reset(sd, 0);</div><div class='ctx'> </div><div class='del'>-	/* Calculate height and width based on current standard */</div><div class='del'>-	if (decoder-&gt;norm == V4L2_STD_ALL)</div><div class='del'>-		std = tvp5150_read_std(sd);</div><div class='del'>-	else</div><div class='del'>-		std = decoder-&gt;norm;</div><div class='del'>-</div><div class='ctx'> 	f-&gt;width = decoder-&gt;rect.width;</div><div class='ctx'> 	f-&gt;height = decoder-&gt;rect.height;</div><div class='ctx'> </div><div class='del'>-	f-&gt;code = V4L2_MBUS_FMT_YUYV8_2X8;</div><div class='add'>+	f-&gt;code = V4L2_MBUS_FMT_UYVY8_2X8;</div><div class='ctx'> 	f-&gt;field = V4L2_FIELD_SEQ_TB;</div><div class='ctx'> 	f-&gt;colorspace = V4L2_COLORSPACE_SMPTE170M;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/tvp7002.c b/drivers/media/video/tvp7002.c<br/>index d7676d85c4df..fb6a5b57eb83 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/tvp7002.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/tvp7002.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/tvp7002.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/tvp7002.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/v4l2-dv-timings.h&gt;</div><div class='ctx'> #include &lt;media/tvp7002.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-chip-ident.h&gt;</div><div class='hunk'>@@ -328,6 +329,7 @@ static const struct i2c_reg_value tvp7002_parms_720P50[] = {</div><div class='ctx'> /* Preset definition for handling device operation */</div><div class='ctx'> struct tvp7002_preset_definition {</div><div class='ctx'> 	u32 preset;</div><div class='add'>+	struct v4l2_dv_timings timings;</div><div class='ctx'> 	const struct i2c_reg_value *p_settings;</div><div class='ctx'> 	enum v4l2_colorspace color_space;</div><div class='ctx'> 	enum v4l2_field scanmode;</div><div class='hunk'>@@ -341,6 +343,7 @@ struct tvp7002_preset_definition {</div><div class='ctx'> static const struct tvp7002_preset_definition tvp7002_presets[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		V4L2_DV_720P60,</div><div class='add'>+		V4L2_DV_BT_CEA_1280X720P60,</div><div class='ctx'> 		tvp7002_parms_720P60,</div><div class='ctx'> 		V4L2_COLORSPACE_REC709,</div><div class='ctx'> 		V4L2_FIELD_NONE,</div><div class='hunk'>@@ -351,6 +354,7 @@ static const struct tvp7002_preset_definition tvp7002_presets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		V4L2_DV_1080I60,</div><div class='add'>+		V4L2_DV_BT_CEA_1920X1080I60,</div><div class='ctx'> 		tvp7002_parms_1080I60,</div><div class='ctx'> 		V4L2_COLORSPACE_REC709,</div><div class='ctx'> 		V4L2_FIELD_INTERLACED,</div><div class='hunk'>@@ -361,6 +365,7 @@ static const struct tvp7002_preset_definition tvp7002_presets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		V4L2_DV_1080I50,</div><div class='add'>+		V4L2_DV_BT_CEA_1920X1080I50,</div><div class='ctx'> 		tvp7002_parms_1080I50,</div><div class='ctx'> 		V4L2_COLORSPACE_REC709,</div><div class='ctx'> 		V4L2_FIELD_INTERLACED,</div><div class='hunk'>@@ -371,6 +376,7 @@ static const struct tvp7002_preset_definition tvp7002_presets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		V4L2_DV_720P50,</div><div class='add'>+		V4L2_DV_BT_CEA_1280X720P50,</div><div class='ctx'> 		tvp7002_parms_720P50,</div><div class='ctx'> 		V4L2_COLORSPACE_REC709,</div><div class='ctx'> 		V4L2_FIELD_NONE,</div><div class='hunk'>@@ -381,6 +387,7 @@ static const struct tvp7002_preset_definition tvp7002_presets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		V4L2_DV_1080P60,</div><div class='add'>+		V4L2_DV_BT_CEA_1920X1080P60,</div><div class='ctx'> 		tvp7002_parms_1080P60,</div><div class='ctx'> 		V4L2_COLORSPACE_REC709,</div><div class='ctx'> 		V4L2_FIELD_NONE,</div><div class='hunk'>@@ -391,6 +398,7 @@ static const struct tvp7002_preset_definition tvp7002_presets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		V4L2_DV_480P59_94,</div><div class='add'>+		V4L2_DV_BT_CEA_720X480P59_94,</div><div class='ctx'> 		tvp7002_parms_480P,</div><div class='ctx'> 		V4L2_COLORSPACE_SMPTE170M,</div><div class='ctx'> 		V4L2_FIELD_NONE,</div><div class='hunk'>@@ -401,6 +409,7 @@ static const struct tvp7002_preset_definition tvp7002_presets[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		V4L2_DV_576P50,</div><div class='add'>+		V4L2_DV_BT_CEA_720X576P50,</div><div class='ctx'> 		tvp7002_parms_576P,</div><div class='ctx'> 		V4L2_COLORSPACE_SMPTE170M,</div><div class='ctx'> 		V4L2_FIELD_NONE,</div><div class='hunk'>@@ -605,6 +614,35 @@ static int tvp7002_s_dv_preset(struct v4l2_subdev *sd,</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int tvp7002_s_dv_timings(struct v4l2_subdev *sd,</div><div class='add'>+					struct v4l2_dv_timings *dv_timings)</div><div class='add'>+{</div><div class='add'>+	struct tvp7002 *device = to_tvp7002(sd);</div><div class='add'>+	const struct v4l2_bt_timings *bt = &amp;dv_timings-&gt;bt;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (dv_timings-&gt;type != V4L2_DV_BT_656_1120)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	for (i = 0; i &lt; NUM_PRESETS; i++) {</div><div class='add'>+		const struct v4l2_bt_timings *t = &amp;tvp7002_presets[i].timings.bt;</div><div class='add'>+</div><div class='add'>+		if (!memcmp(bt, t, &amp;bt-&gt;standards - &amp;bt-&gt;width)) {</div><div class='add'>+			device-&gt;current_preset = &amp;tvp7002_presets[i];</div><div class='add'>+			return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tvp7002_g_dv_timings(struct v4l2_subdev *sd,</div><div class='add'>+					struct v4l2_dv_timings *dv_timings)</div><div class='add'>+{</div><div class='add'>+	struct tvp7002 *device = to_tvp7002(sd);</div><div class='add'>+</div><div class='add'>+	*dv_timings = device-&gt;current_preset-&gt;timings;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * tvp7002_s_ctrl() - Set a control</div><div class='ctx'>  * @ctrl: ptr to v4l2_ctrl struct</div><div class='hunk'>@@ -666,11 +704,9 @@ static int tvp7002_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *f</div><div class='ctx'>  * Returns the current DV preset by TVP7002. If no active input is</div><div class='ctx'>  * detected, returns -EINVAL</div><div class='ctx'>  */</div><div class='del'>-static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,</div><div class='del'>-						struct v4l2_dv_preset *qpreset)</div><div class='add'>+static int tvp7002_query_dv(struct v4l2_subdev *sd, int *index)</div><div class='ctx'> {</div><div class='ctx'> 	const struct tvp7002_preset_definition *presets = tvp7002_presets;</div><div class='del'>-	struct tvp7002 *device;</div><div class='ctx'> 	u8 progressive;</div><div class='ctx'> 	u32 lpfr;</div><div class='ctx'> 	u32 cpln;</div><div class='hunk'>@@ -679,12 +715,9 @@ static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,</div><div class='ctx'> 	u8 lpf_msb;</div><div class='ctx'> 	u8 cpl_lsb;</div><div class='ctx'> 	u8 cpl_msb;</div><div class='del'>-	int index;</div><div class='del'>-</div><div class='del'>-	/* Return invalid preset if no active input is detected */</div><div class='del'>-	qpreset-&gt;preset = V4L2_DV_INVALID;</div><div class='ctx'> </div><div class='del'>-	device = to_tvp7002(sd);</div><div class='add'>+	/* Return invalid index if no active input is detected */</div><div class='add'>+	*index = NUM_PRESETS;</div><div class='ctx'> </div><div class='ctx'> 	/* Read standards from device registers */</div><div class='ctx'> 	tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &amp;lpf_lsb, &amp;error);</div><div class='hunk'>@@ -705,8 +738,8 @@ static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,</div><div class='ctx'> 	progressive = (lpf_msb &amp; TVP7002_INPR_MASK) &gt;&gt; TVP7002_IP_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	/* Do checking of video modes */</div><div class='del'>-	for (index = 0; index &lt; NUM_PRESETS; index++, presets++)</div><div class='del'>-		if (lpfr  == presets-&gt;lines_per_frame &amp;&amp;</div><div class='add'>+	for (*index = 0; *index &lt; NUM_PRESETS; (*index)++, presets++)</div><div class='add'>+		if (lpfr == presets-&gt;lines_per_frame &amp;&amp;</div><div class='ctx'> 			progressive == presets-&gt;progressive) {</div><div class='ctx'> 			if (presets-&gt;cpl_min == 0xffff)</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -714,17 +747,42 @@ static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,</div><div class='ctx'> 				break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-	if (index == NUM_PRESETS) {</div><div class='add'>+	if (*index == NUM_PRESETS) {</div><div class='ctx'> 		v4l2_dbg(1, debug, sd, "detection failed: lpf = %x, cpl = %x\n",</div><div class='ctx'> 								lpfr, cpln);</div><div class='del'>-		return 0;</div><div class='add'>+		return -ENOLINK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Set values in found preset */</div><div class='del'>-	qpreset-&gt;preset = presets-&gt;preset;</div><div class='del'>-</div><div class='ctx'> 	/* Update lines per frame and clocks per line info */</div><div class='del'>-	v4l2_dbg(1, debug, sd, "detected preset: %d\n", presets-&gt;preset);</div><div class='add'>+	v4l2_dbg(1, debug, sd, "detected preset: %d\n", *index);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,</div><div class='add'>+					struct v4l2_dv_preset *qpreset)</div><div class='add'>+{</div><div class='add'>+	int index;</div><div class='add'>+	int err = tvp7002_query_dv(sd, &amp;index);</div><div class='add'>+</div><div class='add'>+	if (err || index == NUM_PRESETS) {</div><div class='add'>+		qpreset-&gt;preset = V4L2_DV_INVALID;</div><div class='add'>+		if (err == -ENOLINK)</div><div class='add'>+			err = 0;</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	qpreset-&gt;preset = tvp7002_presets[index].preset;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tvp7002_query_dv_timings(struct v4l2_subdev *sd,</div><div class='add'>+					struct v4l2_dv_timings *timings)</div><div class='add'>+{</div><div class='add'>+	int index;</div><div class='add'>+	int err = tvp7002_query_dv(sd, &amp;index);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	*timings = tvp7002_presets[index].timings;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -894,6 +952,17 @@ static int tvp7002_enum_dv_presets(struct v4l2_subdev *sd,</div><div class='ctx'> 	return v4l_fill_dv_preset_info(tvp7002_presets[preset-&gt;index].preset, preset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int tvp7002_enum_dv_timings(struct v4l2_subdev *sd,</div><div class='add'>+		struct v4l2_enum_dv_timings *timings)</div><div class='add'>+{</div><div class='add'>+	/* Check requested format index is within range */</div><div class='add'>+	if (timings-&gt;index &gt;= NUM_PRESETS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	timings-&gt;timings = tvp7002_presets[timings-&gt;index].timings;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct v4l2_ctrl_ops tvp7002_ctrl_ops = {</div><div class='ctx'> 	.s_ctrl = tvp7002_s_ctrl,</div><div class='ctx'> };</div><div class='hunk'>@@ -920,6 +989,10 @@ static const struct v4l2_subdev_video_ops tvp7002_video_ops = {</div><div class='ctx'> 	.enum_dv_presets = tvp7002_enum_dv_presets,</div><div class='ctx'> 	.s_dv_preset = tvp7002_s_dv_preset,</div><div class='ctx'> 	.query_dv_preset = tvp7002_query_dv_preset,</div><div class='add'>+	.g_dv_timings = tvp7002_g_dv_timings,</div><div class='add'>+	.s_dv_timings = tvp7002_s_dv_timings,</div><div class='add'>+	.enum_dv_timings = tvp7002_enum_dv_timings,</div><div class='add'>+	.query_dv_timings = tvp7002_query_dv_timings,</div><div class='ctx'> 	.s_stream = tvp7002_s_stream,</div><div class='ctx'> 	.g_mbus_fmt = tvp7002_mbus_fmt,</div><div class='ctx'> 	.try_mbus_fmt = tvp7002_mbus_fmt,</div><div class='head'>diff --git a/drivers/media/video/usbvision/usbvision-core.c b/drivers/media/video/usbvision/usbvision-core.c<br/>index f344411a4578..c9b2042f8bdf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/usbvision/usbvision-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/usbvision/usbvision-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/usbvision/usbvision-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/usbvision/usbvision-core.c</a></div><div class='hunk'>@@ -601,13 +601,12 @@ static int usbvision_decompress(struct usb_usbvision *usbvision, unsigned char *</div><div class='ctx'> 								unsigned char *decompressed, int *start_pos,</div><div class='ctx'> 								int *block_typestart_pos, int len)</div><div class='ctx'> {</div><div class='del'>-	int rest_pixel, idx, max_pos, pos, extra_pos, block_len, block_type_pos, block_type_len;</div><div class='add'>+	int rest_pixel, idx, pos, extra_pos, block_len, block_type_pos, block_type_len;</div><div class='ctx'> 	unsigned char block_byte, block_code, block_type, block_type_byte, integrator;</div><div class='ctx'> </div><div class='ctx'> 	integrator = 0;</div><div class='ctx'> 	pos = *start_pos;</div><div class='ctx'> 	block_type_pos = *block_typestart_pos;</div><div class='del'>-	max_pos = 396; /* pos + len; */</div><div class='ctx'> 	extra_pos = pos;</div><div class='ctx'> 	block_len = 0;</div><div class='ctx'> 	block_byte = 0;</div><div class='hunk'>@@ -702,7 +701,7 @@ static enum parse_state usbvision_parse_compress(struct usb_usbvision *usbvision</div><div class='ctx'> 	unsigned char strip_data[USBVISION_STRIP_LEN_MAX];</div><div class='ctx'> 	unsigned char strip_header[USBVISION_STRIP_HEADER_LEN];</div><div class='ctx'> 	int idx, idx_end, strip_len, strip_ptr, startblock_pos, block_pos, block_type_pos;</div><div class='del'>-	int clipmask_index, bytes_per_pixel, rc;</div><div class='add'>+	int clipmask_index;</div><div class='ctx'> 	int image_size;</div><div class='ctx'> 	unsigned char rv, gv, bv;</div><div class='ctx'> 	static unsigned char *Y, *U, *V;</div><div class='hunk'>@@ -769,7 +768,6 @@ static enum parse_state usbvision_parse_compress(struct usb_usbvision *usbvision</div><div class='ctx'> 		return parse_state_next_frame;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bytes_per_pixel = frame-&gt;v4l2_format.bytes_per_pixel;</div><div class='ctx'> 	clipmask_index = frame-&gt;curline * MAX_FRAME_WIDTH;</div><div class='ctx'> </div><div class='ctx'> 	scratch_get(usbvision, strip_data, strip_len);</div><div class='hunk'>@@ -781,14 +779,14 @@ static enum parse_state usbvision_parse_compress(struct usb_usbvision *usbvision</div><div class='ctx'> </div><div class='ctx'> 	usbvision-&gt;block_pos = block_pos;</div><div class='ctx'> </div><div class='del'>-	rc = usbvision_decompress(usbvision, strip_data, Y, &amp;block_pos, &amp;block_type_pos, idx_end);</div><div class='add'>+	usbvision_decompress(usbvision, strip_data, Y, &amp;block_pos, &amp;block_type_pos, idx_end);</div><div class='ctx'> 	if (strip_len &gt; usbvision-&gt;max_strip_len)</div><div class='ctx'> 		usbvision-&gt;max_strip_len = strip_len;</div><div class='ctx'> </div><div class='ctx'> 	if (frame-&gt;curline % 2)</div><div class='del'>-		rc = usbvision_decompress(usbvision, strip_data, V, &amp;block_pos, &amp;block_type_pos, idx_end / 2);</div><div class='add'>+		usbvision_decompress(usbvision, strip_data, V, &amp;block_pos, &amp;block_type_pos, idx_end / 2);</div><div class='ctx'> 	else</div><div class='del'>-		rc = usbvision_decompress(usbvision, strip_data, U, &amp;block_pos, &amp;block_type_pos, idx_end / 2);</div><div class='add'>+		usbvision_decompress(usbvision, strip_data, U, &amp;block_pos, &amp;block_type_pos, idx_end / 2);</div><div class='ctx'> </div><div class='ctx'> 	if (block_pos &gt; usbvision-&gt;comprblock_pos)</div><div class='ctx'> 		usbvision-&gt;comprblock_pos = block_pos;</div><div class='head'>diff --git a/drivers/media/video/usbvision/usbvision-video.c b/drivers/media/video/usbvision/usbvision-video.c<br/>index 5a74f5e07d7d..9bd8f084f348 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/usbvision/usbvision-video.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/usbvision/usbvision-video.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/usbvision/usbvision-video.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/usbvision/usbvision-video.c</a></div><div class='hunk'>@@ -1296,6 +1296,10 @@ static struct video_device *usbvision_vdev_init(struct usb_usbvision *usbvision,</div><div class='ctx'> 	if (NULL == vdev)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	*vdev = *vdev_template;</div><div class='add'>+	/* Locking in file operations other than ioctl should be done</div><div class='add'>+	   by the driver, not the V4L2 core.</div><div class='add'>+	   This driver needs auditing so that this flag can be removed. */</div><div class='add'>+	set_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags);</div><div class='ctx'> 	vdev-&gt;lock = &amp;usbvision-&gt;v4l2_lock;</div><div class='ctx'> 	vdev-&gt;v4l2_dev = &amp;usbvision-&gt;v4l2_dev;</div><div class='ctx'> 	snprintf(vdev-&gt;name, sizeof(vdev-&gt;name), "%s", name);</div><div class='head'>diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c<br/>index 0efd3b10b353..af26bbe6f76e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/uvc/uvc_ctrl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/uvc/uvc_ctrl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/uvc/uvc_ctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/uvc/uvc_ctrl.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/wait.h&gt;</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "uvcvideo.h"</div><div class='ctx'> </div><div class='hunk'>@@ -420,6 +421,8 @@ static struct uvc_control_mapping uvc_ctrl_mappings[] = {</div><div class='ctx'> 		.offset		= 0,</div><div class='ctx'> 		.v4l2_type	= V4L2_CTRL_TYPE_INTEGER,</div><div class='ctx'> 		.data_type	= UVC_CTRL_DATA_TYPE_SIGNED,</div><div class='add'>+		.master_id	= V4L2_CID_HUE_AUTO,</div><div class='add'>+		.master_manual	= 0,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.id		= V4L2_CID_SATURATION,</div><div class='hunk'>@@ -492,6 +495,7 @@ static struct uvc_control_mapping uvc_ctrl_mappings[] = {</div><div class='ctx'> 		.offset		= 0,</div><div class='ctx'> 		.v4l2_type	= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='ctx'> 		.data_type	= UVC_CTRL_DATA_TYPE_BOOLEAN,</div><div class='add'>+		.slave_ids	= { V4L2_CID_HUE, },</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.id		= V4L2_CID_EXPOSURE_AUTO,</div><div class='hunk'>@@ -504,6 +508,7 @@ static struct uvc_control_mapping uvc_ctrl_mappings[] = {</div><div class='ctx'> 		.data_type	= UVC_CTRL_DATA_TYPE_BITMASK,</div><div class='ctx'> 		.menu_info	= exposure_auto_controls,</div><div class='ctx'> 		.menu_count	= ARRAY_SIZE(exposure_auto_controls),</div><div class='add'>+		.slave_ids	= { V4L2_CID_EXPOSURE_ABSOLUTE, },</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.id		= V4L2_CID_EXPOSURE_AUTO_PRIORITY,</div><div class='hunk'>@@ -524,6 +529,8 @@ static struct uvc_control_mapping uvc_ctrl_mappings[] = {</div><div class='ctx'> 		.offset		= 0,</div><div class='ctx'> 		.v4l2_type	= V4L2_CTRL_TYPE_INTEGER,</div><div class='ctx'> 		.data_type	= UVC_CTRL_DATA_TYPE_UNSIGNED,</div><div class='add'>+		.master_id	= V4L2_CID_EXPOSURE_AUTO,</div><div class='add'>+		.master_manual	= V4L2_EXPOSURE_MANUAL,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.id		= V4L2_CID_AUTO_WHITE_BALANCE,</div><div class='hunk'>@@ -534,6 +541,7 @@ static struct uvc_control_mapping uvc_ctrl_mappings[] = {</div><div class='ctx'> 		.offset		= 0,</div><div class='ctx'> 		.v4l2_type	= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='ctx'> 		.data_type	= UVC_CTRL_DATA_TYPE_BOOLEAN,</div><div class='add'>+		.slave_ids	= { V4L2_CID_WHITE_BALANCE_TEMPERATURE, },</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.id		= V4L2_CID_WHITE_BALANCE_TEMPERATURE,</div><div class='hunk'>@@ -544,6 +552,8 @@ static struct uvc_control_mapping uvc_ctrl_mappings[] = {</div><div class='ctx'> 		.offset		= 0,</div><div class='ctx'> 		.v4l2_type	= V4L2_CTRL_TYPE_INTEGER,</div><div class='ctx'> 		.data_type	= UVC_CTRL_DATA_TYPE_UNSIGNED,</div><div class='add'>+		.master_id	= V4L2_CID_AUTO_WHITE_BALANCE,</div><div class='add'>+		.master_manual	= 0,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.id		= V4L2_CID_AUTO_WHITE_BALANCE,</div><div class='hunk'>@@ -554,6 +564,8 @@ static struct uvc_control_mapping uvc_ctrl_mappings[] = {</div><div class='ctx'> 		.offset		= 0,</div><div class='ctx'> 		.v4l2_type	= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='ctx'> 		.data_type	= UVC_CTRL_DATA_TYPE_BOOLEAN,</div><div class='add'>+		.slave_ids	= { V4L2_CID_BLUE_BALANCE,</div><div class='add'>+				    V4L2_CID_RED_BALANCE },</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.id		= V4L2_CID_BLUE_BALANCE,</div><div class='hunk'>@@ -564,6 +576,8 @@ static struct uvc_control_mapping uvc_ctrl_mappings[] = {</div><div class='ctx'> 		.offset		= 0,</div><div class='ctx'> 		.v4l2_type	= V4L2_CTRL_TYPE_INTEGER,</div><div class='ctx'> 		.data_type	= UVC_CTRL_DATA_TYPE_SIGNED,</div><div class='add'>+		.master_id	= V4L2_CID_AUTO_WHITE_BALANCE,</div><div class='add'>+		.master_manual	= 0,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.id		= V4L2_CID_RED_BALANCE,</div><div class='hunk'>@@ -574,6 +588,8 @@ static struct uvc_control_mapping uvc_ctrl_mappings[] = {</div><div class='ctx'> 		.offset		= 16,</div><div class='ctx'> 		.v4l2_type	= V4L2_CTRL_TYPE_INTEGER,</div><div class='ctx'> 		.data_type	= UVC_CTRL_DATA_TYPE_SIGNED,</div><div class='add'>+		.master_id	= V4L2_CID_AUTO_WHITE_BALANCE,</div><div class='add'>+		.master_manual	= 0,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.id		= V4L2_CID_FOCUS_ABSOLUTE,</div><div class='hunk'>@@ -584,6 +600,8 @@ static struct uvc_control_mapping uvc_ctrl_mappings[] = {</div><div class='ctx'> 		.offset		= 0,</div><div class='ctx'> 		.v4l2_type	= V4L2_CTRL_TYPE_INTEGER,</div><div class='ctx'> 		.data_type	= UVC_CTRL_DATA_TYPE_UNSIGNED,</div><div class='add'>+		.master_id	= V4L2_CID_FOCUS_AUTO,</div><div class='add'>+		.master_manual	= 0,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.id		= V4L2_CID_FOCUS_AUTO,</div><div class='hunk'>@@ -594,6 +612,7 @@ static struct uvc_control_mapping uvc_ctrl_mappings[] = {</div><div class='ctx'> 		.offset		= 0,</div><div class='ctx'> 		.v4l2_type	= V4L2_CTRL_TYPE_BOOLEAN,</div><div class='ctx'> 		.data_type	= UVC_CTRL_DATA_TYPE_BOOLEAN,</div><div class='add'>+		.slave_ids	= { V4L2_CID_FOCUS_ABSOLUTE, },</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.id		= V4L2_CID_IRIS_ABSOLUTE,</div><div class='hunk'>@@ -899,25 +918,54 @@ static int uvc_ctrl_populate_cache(struct uvc_video_chain *chain,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,</div><div class='del'>-	struct v4l2_queryctrl *v4l2_ctrl)</div><div class='add'>+static int __uvc_ctrl_get(struct uvc_video_chain *chain,</div><div class='add'>+	struct uvc_control *ctrl, struct uvc_control_mapping *mapping,</div><div class='add'>+	s32 *value)</div><div class='ctx'> {</div><div class='del'>-	struct uvc_control *ctrl;</div><div class='del'>-	struct uvc_control_mapping *mapping;</div><div class='ctx'> 	struct uvc_menu_info *menu;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = mutex_lock_interruptible(&amp;chain-&gt;ctrl_mutex);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return -ERESTARTSYS;</div><div class='add'>+	if ((ctrl-&gt;info.flags &amp; UVC_CTRL_FLAG_GET_CUR) == 0)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ctrl = uvc_find_control(chain, v4l2_ctrl-&gt;id, &amp;mapping);</div><div class='del'>-	if (ctrl == NULL) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto done;</div><div class='add'>+	if (!ctrl-&gt;loaded) {</div><div class='add'>+		ret = uvc_query_ctrl(chain-&gt;dev, UVC_GET_CUR, ctrl-&gt;entity-&gt;id,</div><div class='add'>+				chain-&gt;dev-&gt;intfnum, ctrl-&gt;info.selector,</div><div class='add'>+				uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT),</div><div class='add'>+				ctrl-&gt;info.size);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ctrl-&gt;loaded = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	*value = mapping-&gt;get(mapping, UVC_GET_CUR,</div><div class='add'>+		uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT));</div><div class='add'>+</div><div class='add'>+	if (mapping-&gt;v4l2_type == V4L2_CTRL_TYPE_MENU) {</div><div class='add'>+		menu = mapping-&gt;menu_info;</div><div class='add'>+		for (i = 0; i &lt; mapping-&gt;menu_count; ++i, ++menu) {</div><div class='add'>+			if (menu-&gt;value == *value) {</div><div class='add'>+				*value = i;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,</div><div class='add'>+	struct uvc_control *ctrl,</div><div class='add'>+	struct uvc_control_mapping *mapping,</div><div class='add'>+	struct v4l2_queryctrl *v4l2_ctrl)</div><div class='add'>+{</div><div class='add'>+	struct uvc_control_mapping *master_map = NULL;</div><div class='add'>+	struct uvc_control *master_ctrl = NULL;</div><div class='add'>+	struct uvc_menu_info *menu;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='ctx'> 	memset(v4l2_ctrl, 0, sizeof *v4l2_ctrl);</div><div class='ctx'> 	v4l2_ctrl-&gt;id = mapping-&gt;id;</div><div class='ctx'> 	v4l2_ctrl-&gt;type = mapping-&gt;v4l2_type;</div><div class='hunk'>@@ -929,10 +977,23 @@ int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,</div><div class='ctx'> 	if (!(ctrl-&gt;info.flags &amp; UVC_CTRL_FLAG_SET_CUR))</div><div class='ctx'> 		v4l2_ctrl-&gt;flags |= V4L2_CTRL_FLAG_READ_ONLY;</div><div class='ctx'> </div><div class='add'>+	if (mapping-&gt;master_id)</div><div class='add'>+		__uvc_find_control(ctrl-&gt;entity, mapping-&gt;master_id,</div><div class='add'>+				   &amp;master_map, &amp;master_ctrl, 0);</div><div class='add'>+	if (master_ctrl &amp;&amp; (master_ctrl-&gt;info.flags &amp; UVC_CTRL_FLAG_GET_CUR)) {</div><div class='add'>+		s32 val;</div><div class='add'>+		int ret = __uvc_ctrl_get(chain, master_ctrl, master_map, &amp;val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (val != mapping-&gt;master_manual)</div><div class='add'>+				v4l2_ctrl-&gt;flags |= V4L2_CTRL_FLAG_INACTIVE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!ctrl-&gt;cached) {</div><div class='del'>-		ret = uvc_ctrl_populate_cache(chain, ctrl);</div><div class='add'>+		int ret = uvc_ctrl_populate_cache(chain, ctrl);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto done;</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ctrl-&gt;info.flags &amp; UVC_CTRL_FLAG_GET_DEF) {</div><div class='hunk'>@@ -954,19 +1015,19 @@ int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		goto done;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	case V4L2_CTRL_TYPE_BOOLEAN:</div><div class='ctx'> 		v4l2_ctrl-&gt;minimum = 0;</div><div class='ctx'> 		v4l2_ctrl-&gt;maximum = 1;</div><div class='ctx'> 		v4l2_ctrl-&gt;step = 1;</div><div class='del'>-		goto done;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	case V4L2_CTRL_TYPE_BUTTON:</div><div class='ctx'> 		v4l2_ctrl-&gt;minimum = 0;</div><div class='ctx'> 		v4l2_ctrl-&gt;maximum = 0;</div><div class='ctx'> 		v4l2_ctrl-&gt;step = 0;</div><div class='del'>-		goto done;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -984,6 +1045,27 @@ int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,</div><div class='ctx'> 		v4l2_ctrl-&gt;step = mapping-&gt;get(mapping, UVC_GET_RES,</div><div class='ctx'> 				  uvc_ctrl_data(ctrl, UVC_CTRL_DATA_RES));</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,</div><div class='add'>+	struct v4l2_queryctrl *v4l2_ctrl)</div><div class='add'>+{</div><div class='add'>+	struct uvc_control *ctrl;</div><div class='add'>+	struct uvc_control_mapping *mapping;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mutex_lock_interruptible(&amp;chain-&gt;ctrl_mutex);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return -ERESTARTSYS;</div><div class='add'>+</div><div class='add'>+	ctrl = uvc_find_control(chain, v4l2_ctrl-&gt;id, &amp;mapping);</div><div class='add'>+	if (ctrl == NULL) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = __uvc_query_v4l2_ctrl(chain, ctrl, mapping, v4l2_ctrl);</div><div class='ctx'> done:</div><div class='ctx'> 	mutex_unlock(&amp;chain-&gt;ctrl_mutex);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1054,6 +1136,174 @@ done:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* --------------------------------------------------------------------------</div><div class='add'>+ * Ctrl event handling</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void uvc_ctrl_fill_event(struct uvc_video_chain *chain,</div><div class='add'>+	struct v4l2_event *ev,</div><div class='add'>+	struct uvc_control *ctrl,</div><div class='add'>+	struct uvc_control_mapping *mapping,</div><div class='add'>+	s32 value, u32 changes)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_queryctrl v4l2_ctrl;</div><div class='add'>+</div><div class='add'>+	__uvc_query_v4l2_ctrl(chain, ctrl, mapping, &amp;v4l2_ctrl);</div><div class='add'>+</div><div class='add'>+	memset(ev-&gt;reserved, 0, sizeof(ev-&gt;reserved));</div><div class='add'>+	ev-&gt;type = V4L2_EVENT_CTRL;</div><div class='add'>+	ev-&gt;id = v4l2_ctrl.id;</div><div class='add'>+	ev-&gt;u.ctrl.value = value;</div><div class='add'>+	ev-&gt;u.ctrl.changes = changes;</div><div class='add'>+	ev-&gt;u.ctrl.type = v4l2_ctrl.type;</div><div class='add'>+	ev-&gt;u.ctrl.flags = v4l2_ctrl.flags;</div><div class='add'>+	ev-&gt;u.ctrl.minimum = v4l2_ctrl.minimum;</div><div class='add'>+	ev-&gt;u.ctrl.maximum = v4l2_ctrl.maximum;</div><div class='add'>+	ev-&gt;u.ctrl.step = v4l2_ctrl.step;</div><div class='add'>+	ev-&gt;u.ctrl.default_value = v4l2_ctrl.default_value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void uvc_ctrl_send_event(struct uvc_fh *handle,</div><div class='add'>+	struct uvc_control *ctrl, struct uvc_control_mapping *mapping,</div><div class='add'>+	s32 value, u32 changes)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subscribed_event *sev;</div><div class='add'>+	struct v4l2_event ev;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;mapping-&gt;ev_subs))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	uvc_ctrl_fill_event(handle-&gt;chain, &amp;ev, ctrl, mapping, value, changes);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(sev, &amp;mapping-&gt;ev_subs, node) {</div><div class='add'>+		if (sev-&gt;fh &amp;&amp; (sev-&gt;fh != &amp;handle-&gt;vfh ||</div><div class='add'>+		    (sev-&gt;flags &amp; V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK) ||</div><div class='add'>+		    (changes &amp; V4L2_EVENT_CTRL_CH_FLAGS)))</div><div class='add'>+			v4l2_event_queue_fh(sev-&gt;fh, &amp;ev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void uvc_ctrl_send_slave_event(struct uvc_fh *handle,</div><div class='add'>+	struct uvc_control *master, u32 slave_id,</div><div class='add'>+	const struct v4l2_ext_control *xctrls, unsigned int xctrls_count)</div><div class='add'>+{</div><div class='add'>+	struct uvc_control_mapping *mapping = NULL;</div><div class='add'>+	struct uvc_control *ctrl = NULL;</div><div class='add'>+	u32 changes = V4L2_EVENT_CTRL_CH_FLAGS;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	s32 val = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We can skip sending an event for the slave if the slave</div><div class='add'>+	 * is being modified in the same transaction.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; xctrls_count; i++) {</div><div class='add'>+		if (xctrls[i].id == slave_id)</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__uvc_find_control(master-&gt;entity, slave_id, &amp;mapping, &amp;ctrl, 0);</div><div class='add'>+	if (ctrl == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (__uvc_ctrl_get(handle-&gt;chain, ctrl, mapping, &amp;val) == 0)</div><div class='add'>+		changes |= V4L2_EVENT_CTRL_CH_VALUE;</div><div class='add'>+</div><div class='add'>+	uvc_ctrl_send_event(handle, ctrl, mapping, val, changes);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void uvc_ctrl_send_events(struct uvc_fh *handle,</div><div class='add'>+	const struct v4l2_ext_control *xctrls, unsigned int xctrls_count)</div><div class='add'>+{</div><div class='add'>+	struct uvc_control_mapping *mapping;</div><div class='add'>+	struct uvc_control *ctrl;</div><div class='add'>+	u32 changes = V4L2_EVENT_CTRL_CH_VALUE;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	unsigned int j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; xctrls_count; ++i) {</div><div class='add'>+		ctrl = uvc_find_control(handle-&gt;chain, xctrls[i].id, &amp;mapping);</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; ARRAY_SIZE(mapping-&gt;slave_ids); ++j) {</div><div class='add'>+			if (!mapping-&gt;slave_ids[j])</div><div class='add'>+				break;</div><div class='add'>+			uvc_ctrl_send_slave_event(handle, ctrl,</div><div class='add'>+						  mapping-&gt;slave_ids[j],</div><div class='add'>+						  xctrls, xctrls_count);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If the master is being modified in the same transaction</div><div class='add'>+		 * flags may change too.</div><div class='add'>+		 */</div><div class='add'>+		if (mapping-&gt;master_id) {</div><div class='add'>+			for (j = 0; j &lt; xctrls_count; j++) {</div><div class='add'>+				if (xctrls[j].id == mapping-&gt;master_id) {</div><div class='add'>+					changes |= V4L2_EVENT_CTRL_CH_FLAGS;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		uvc_ctrl_send_event(handle, ctrl, mapping, xctrls[i].value,</div><div class='add'>+				    changes);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int uvc_ctrl_add_event(struct v4l2_subscribed_event *sev, unsigned elems)</div><div class='add'>+{</div><div class='add'>+	struct uvc_fh *handle = container_of(sev-&gt;fh, struct uvc_fh, vfh);</div><div class='add'>+	struct uvc_control_mapping *mapping;</div><div class='add'>+	struct uvc_control *ctrl;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mutex_lock_interruptible(&amp;handle-&gt;chain-&gt;ctrl_mutex);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return -ERESTARTSYS;</div><div class='add'>+</div><div class='add'>+	ctrl = uvc_find_control(handle-&gt;chain, sev-&gt;id, &amp;mapping);</div><div class='add'>+	if (ctrl == NULL) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	list_add_tail(&amp;sev-&gt;node, &amp;mapping-&gt;ev_subs);</div><div class='add'>+	if (sev-&gt;flags &amp; V4L2_EVENT_SUB_FL_SEND_INITIAL) {</div><div class='add'>+		struct v4l2_event ev;</div><div class='add'>+		u32 changes = V4L2_EVENT_CTRL_CH_FLAGS;</div><div class='add'>+		s32 val = 0;</div><div class='add'>+</div><div class='add'>+		if (__uvc_ctrl_get(handle-&gt;chain, ctrl, mapping, &amp;val) == 0)</div><div class='add'>+			changes |= V4L2_EVENT_CTRL_CH_VALUE;</div><div class='add'>+</div><div class='add'>+		uvc_ctrl_fill_event(handle-&gt;chain, &amp;ev, ctrl, mapping, val,</div><div class='add'>+				    changes);</div><div class='add'>+		/* Mark the queue as active, allowing this initial</div><div class='add'>+		   event to be accepted. */</div><div class='add'>+		sev-&gt;elems = elems;</div><div class='add'>+		v4l2_event_queue_fh(sev-&gt;fh, &amp;ev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	mutex_unlock(&amp;handle-&gt;chain-&gt;ctrl_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void uvc_ctrl_del_event(struct v4l2_subscribed_event *sev)</div><div class='add'>+{</div><div class='add'>+	struct uvc_fh *handle = container_of(sev-&gt;fh, struct uvc_fh, vfh);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;handle-&gt;chain-&gt;ctrl_mutex);</div><div class='add'>+	list_del(&amp;sev-&gt;node);</div><div class='add'>+	mutex_unlock(&amp;handle-&gt;chain-&gt;ctrl_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct v4l2_subscribed_event_ops uvc_ctrl_sub_ev_ops = {</div><div class='add'>+	.add = uvc_ctrl_add_event,</div><div class='add'>+	.del = uvc_ctrl_del_event,</div><div class='add'>+	.replace = v4l2_ctrl_replace,</div><div class='add'>+	.merge = v4l2_ctrl_merge,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* --------------------------------------------------------------------------</div><div class='ctx'>  * Control transactions</div><div class='hunk'>@@ -1101,9 +1351,12 @@ static int uvc_ctrl_commit_entity(struct uvc_device *dev,</div><div class='ctx'> </div><div class='ctx'> 		/* Reset the loaded flag for auto-update controls that were</div><div class='ctx'> 		 * marked as loaded in uvc_ctrl_get/uvc_ctrl_set to prevent</div><div class='del'>-		 * uvc_ctrl_get from using the cached value.</div><div class='add'>+		 * uvc_ctrl_get from using the cached value, and for write-only</div><div class='add'>+		 * controls to prevent uvc_ctrl_set from setting bits not</div><div class='add'>+		 * explicitly set by the user.</div><div class='ctx'> 		 */</div><div class='del'>-		if (ctrl-&gt;info.flags &amp; UVC_CTRL_FLAG_AUTO_UPDATE)</div><div class='add'>+		if (ctrl-&gt;info.flags &amp; UVC_CTRL_FLAG_AUTO_UPDATE ||</div><div class='add'>+		    !(ctrl-&gt;info.flags &amp; UVC_CTRL_FLAG_GET_CUR))</div><div class='ctx'> 			ctrl-&gt;loaded = 0;</div><div class='ctx'> </div><div class='ctx'> 		if (!ctrl-&gt;dirty)</div><div class='hunk'>@@ -1131,8 +1384,11 @@ static int uvc_ctrl_commit_entity(struct uvc_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __uvc_ctrl_commit(struct uvc_video_chain *chain, int rollback)</div><div class='add'>+int __uvc_ctrl_commit(struct uvc_fh *handle, int rollback,</div><div class='add'>+		      const struct v4l2_ext_control *xctrls,</div><div class='add'>+		      unsigned int xctrls_count)</div><div class='ctx'> {</div><div class='add'>+	struct uvc_video_chain *chain = handle-&gt;chain;</div><div class='ctx'> 	struct uvc_entity *entity;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1143,6 +1399,8 @@ int __uvc_ctrl_commit(struct uvc_video_chain *chain, int rollback)</div><div class='ctx'> 			goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!rollback)</div><div class='add'>+		uvc_ctrl_send_events(handle, xctrls, xctrls_count);</div><div class='ctx'> done:</div><div class='ctx'> 	mutex_unlock(&amp;chain-&gt;ctrl_mutex);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1153,39 +1411,12 @@ int uvc_ctrl_get(struct uvc_video_chain *chain,</div><div class='ctx'> {</div><div class='ctx'> 	struct uvc_control *ctrl;</div><div class='ctx'> 	struct uvc_control_mapping *mapping;</div><div class='del'>-	struct uvc_menu_info *menu;</div><div class='del'>-	unsigned int i;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ctrl = uvc_find_control(chain, xctrl-&gt;id, &amp;mapping);</div><div class='del'>-	if (ctrl == NULL || (ctrl-&gt;info.flags &amp; UVC_CTRL_FLAG_GET_CUR) == 0)</div><div class='add'>+	if (ctrl == NULL)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!ctrl-&gt;loaded) {</div><div class='del'>-		ret = uvc_query_ctrl(chain-&gt;dev, UVC_GET_CUR, ctrl-&gt;entity-&gt;id,</div><div class='del'>-				chain-&gt;dev-&gt;intfnum, ctrl-&gt;info.selector,</div><div class='del'>-				uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT),</div><div class='del'>-				ctrl-&gt;info.size);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ctrl-&gt;loaded = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	xctrl-&gt;value = mapping-&gt;get(mapping, UVC_GET_CUR,</div><div class='del'>-		uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT));</div><div class='del'>-</div><div class='del'>-	if (mapping-&gt;v4l2_type == V4L2_CTRL_TYPE_MENU) {</div><div class='del'>-		menu = mapping-&gt;menu_info;</div><div class='del'>-		for (i = 0; i &lt; mapping-&gt;menu_count; ++i, ++menu) {</div><div class='del'>-			if (menu-&gt;value == xctrl-&gt;value) {</div><div class='del'>-				xctrl-&gt;value = i;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return __uvc_ctrl_get(chain, ctrl, mapping, &amp;xctrl-&gt;value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int uvc_ctrl_set(struct uvc_video_chain *chain,</div><div class='hunk'>@@ -1641,6 +1872,8 @@ static int __uvc_ctrl_add_mapping(struct uvc_device *dev,</div><div class='ctx'> 	if (map == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	INIT_LIST_HEAD(&amp;map-&gt;ev_subs);</div><div class='add'>+</div><div class='ctx'> 	size = sizeof(*mapping-&gt;menu_info) * mapping-&gt;menu_count;</div><div class='ctx'> 	map-&gt;menu_info = kmemdup(mapping-&gt;menu_info, size, GFP_KERNEL);</div><div class='ctx'> 	if (map-&gt;menu_info == NULL) {</div><div class='hunk'>@@ -1653,7 +1886,6 @@ static int __uvc_ctrl_add_mapping(struct uvc_device *dev,</div><div class='ctx'> 	if (map-&gt;set == NULL)</div><div class='ctx'> 		map-&gt;set = uvc_set_le_value;</div><div class='ctx'> </div><div class='del'>-	map-&gt;ctrl = &amp;ctrl-&gt;info;</div><div class='ctx'> 	list_add_tail(&amp;map-&gt;list, &amp;ctrl-&gt;info.mappings);</div><div class='ctx'> 	uvc_trace(UVC_TRACE_CONTROL,</div><div class='ctx'> 		"Adding mapping '%s' to control %pUl/%u.\n",</div><div class='head'>diff --git a/drivers/media/video/uvc/uvc_queue.c b/drivers/media/video/uvc/uvc_queue.c<br/>index 8f54e24e3f35..9288fbd5001b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/uvc/uvc_queue.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/uvc/uvc_queue.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/uvc/uvc_queue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/uvc/uvc_queue.c</a></div><div class='hunk'>@@ -207,6 +207,19 @@ int uvc_queue_mmap(struct uvc_video_queue *queue, struct vm_area_struct *vma)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_MMU</div><div class='add'>+unsigned long uvc_queue_get_unmapped_area(struct uvc_video_queue *queue,</div><div class='add'>+		unsigned long pgoff)</div><div class='add'>+{</div><div class='add'>+	unsigned long ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;queue-&gt;mutex);</div><div class='add'>+	ret = vb2_get_unmapped_area(&amp;queue-&gt;queue, 0, 0, pgoff, 0);</div><div class='add'>+	mutex_unlock(&amp;queue-&gt;mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> unsigned int uvc_queue_poll(struct uvc_video_queue *queue, struct file *file,</div><div class='ctx'> 			    poll_table *wait)</div><div class='ctx'> {</div><div class='hunk'>@@ -237,36 +250,6 @@ int uvc_queue_allocated(struct uvc_video_queue *queue)</div><div class='ctx'> 	return allocated;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_MMU</div><div class='del'>-/*</div><div class='del'>- * Get unmapped area.</div><div class='del'>- *</div><div class='del'>- * NO-MMU arch need this function to make mmap() work correctly.</div><div class='del'>- */</div><div class='del'>-unsigned long uvc_queue_get_unmapped_area(struct uvc_video_queue *queue,</div><div class='del'>-		unsigned long pgoff)</div><div class='del'>-{</div><div class='del'>-	struct uvc_buffer *buffer;</div><div class='del'>-	unsigned int i;</div><div class='del'>-	unsigned long ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;queue-&gt;mutex);</div><div class='del'>-	for (i = 0; i &lt; queue-&gt;count; ++i) {</div><div class='del'>-		buffer = &amp;queue-&gt;buffer[i];</div><div class='del'>-		if ((buffer-&gt;buf.m.offset &gt;&gt; PAGE_SHIFT) == pgoff)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	if (i == queue-&gt;count) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-	ret = (unsigned long)buf-&gt;mem;</div><div class='del'>-done:</div><div class='del'>-	mutex_unlock(&amp;queue-&gt;mutex);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Enable or disable the video buffers queue.</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/media/video/uvc/uvc_v4l2.c b/drivers/media/video/uvc/uvc_v4l2.c<br/>index ff2cdddf9bc6..759bef8897e9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/uvc/uvc_v4l2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/uvc/uvc_v4l2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/uvc/uvc_v4l2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/uvc/uvc_v4l2.c</a></div><div class='hunk'>@@ -25,6 +25,8 @@</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;media/v4l2-common.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "uvcvideo.h"</div><div class='hunk'>@@ -505,6 +507,8 @@ static int uvc_v4l2_open(struct file *file)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	v4l2_fh_init(&amp;handle-&gt;vfh, stream-&gt;vdev);</div><div class='add'>+	v4l2_fh_add(&amp;handle-&gt;vfh);</div><div class='ctx'> 	handle-&gt;chain = stream-&gt;chain;</div><div class='ctx'> 	handle-&gt;stream = stream;</div><div class='ctx'> 	handle-&gt;state = UVC_HANDLE_PASSIVE;</div><div class='hunk'>@@ -528,6 +532,8 @@ static int uvc_v4l2_release(struct file *file)</div><div class='ctx'> </div><div class='ctx'> 	/* Release the file handle. */</div><div class='ctx'> 	uvc_dismiss_privileges(handle);</div><div class='add'>+	v4l2_fh_del(&amp;handle-&gt;vfh);</div><div class='add'>+	v4l2_fh_exit(&amp;handle-&gt;vfh);</div><div class='ctx'> 	kfree(handle);</div><div class='ctx'> 	file-&gt;private_data = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -584,7 +590,7 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='ctx'> 		ret = uvc_ctrl_get(chain, &amp;xctrl);</div><div class='del'>-		uvc_ctrl_rollback(chain);</div><div class='add'>+		uvc_ctrl_rollback(handle);</div><div class='ctx'> 		if (ret &gt;= 0)</div><div class='ctx'> 			ctrl-&gt;value = xctrl.value;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -605,10 +611,10 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)</div><div class='ctx'> </div><div class='ctx'> 		ret = uvc_ctrl_set(chain, &amp;xctrl);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='del'>-			uvc_ctrl_rollback(chain);</div><div class='add'>+			uvc_ctrl_rollback(handle);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='del'>-		ret = uvc_ctrl_commit(chain);</div><div class='add'>+		ret = uvc_ctrl_commit(handle, &amp;xctrl, 1);</div><div class='ctx'> 		if (ret == 0)</div><div class='ctx'> 			ctrl-&gt;value = xctrl.value;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -630,13 +636,13 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)</div><div class='ctx'> 		for (i = 0; i &lt; ctrls-&gt;count; ++ctrl, ++i) {</div><div class='ctx'> 			ret = uvc_ctrl_get(chain, ctrl);</div><div class='ctx'> 			if (ret &lt; 0) {</div><div class='del'>-				uvc_ctrl_rollback(chain);</div><div class='add'>+				uvc_ctrl_rollback(handle);</div><div class='ctx'> 				ctrls-&gt;error_idx = i;</div><div class='ctx'> 				return ret;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		ctrls-&gt;error_idx = 0;</div><div class='del'>-		ret = uvc_ctrl_rollback(chain);</div><div class='add'>+		ret = uvc_ctrl_rollback(handle);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -654,7 +660,7 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)</div><div class='ctx'> 		for (i = 0; i &lt; ctrls-&gt;count; ++ctrl, ++i) {</div><div class='ctx'> 			ret = uvc_ctrl_set(chain, ctrl);</div><div class='ctx'> 			if (ret &lt; 0) {</div><div class='del'>-				uvc_ctrl_rollback(chain);</div><div class='add'>+				uvc_ctrl_rollback(handle);</div><div class='ctx'> 				ctrls-&gt;error_idx = i;</div><div class='ctx'> 				return ret;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -663,9 +669,10 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)</div><div class='ctx'> 		ctrls-&gt;error_idx = 0;</div><div class='ctx'> </div><div class='ctx'> 		if (cmd == VIDIOC_S_EXT_CTRLS)</div><div class='del'>-			ret = uvc_ctrl_commit(chain);</div><div class='add'>+			ret = uvc_ctrl_commit(handle,</div><div class='add'>+					      ctrls-&gt;controls, ctrls-&gt;count);</div><div class='ctx'> 		else</div><div class='del'>-			ret = uvc_ctrl_rollback(chain);</div><div class='add'>+			ret = uvc_ctrl_rollback(handle);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -687,7 +694,7 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)</div><div class='ctx'> 					break;</div><div class='ctx'> 			}</div><div class='ctx'> 			pin = iterm-&gt;id;</div><div class='del'>-		} else if (pin &lt; selector-&gt;bNrInPins) {</div><div class='add'>+		} else if (index &lt; selector-&gt;bNrInPins) {</div><div class='ctx'> 			pin = selector-&gt;baSourceID[index];</div><div class='ctx'> 			list_for_each_entry(iterm, &amp;chain-&gt;entities, chain) {</div><div class='ctx'> 				if (!UVC_ENTITY_IS_ITERM(iterm))</div><div class='hunk'>@@ -990,6 +997,26 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg)</div><div class='ctx'> 		return uvc_video_enable(stream, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	case VIDIOC_SUBSCRIBE_EVENT:</div><div class='add'>+	{</div><div class='add'>+		struct v4l2_event_subscription *sub = arg;</div><div class='add'>+</div><div class='add'>+		switch (sub-&gt;type) {</div><div class='add'>+		case V4L2_EVENT_CTRL:</div><div class='add'>+			return v4l2_event_subscribe(&amp;handle-&gt;vfh, sub, 0,</div><div class='add'>+						    &amp;uvc_ctrl_sub_ev_ops);</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case VIDIOC_UNSUBSCRIBE_EVENT:</div><div class='add'>+		return v4l2_event_unsubscribe(&amp;handle-&gt;vfh, arg);</div><div class='add'>+</div><div class='add'>+	case VIDIOC_DQEVENT:</div><div class='add'>+		return v4l2_event_dequeue(&amp;handle-&gt;vfh, arg,</div><div class='add'>+					  file-&gt;f_flags &amp; O_NONBLOCK);</div><div class='add'>+</div><div class='ctx'> 	/* Analog video standards make no sense for digital cameras. */</div><div class='ctx'> 	case VIDIOC_ENUMSTD:</div><div class='ctx'> 	case VIDIOC_QUERYSTD:</div><div class='hunk'>@@ -1097,7 +1124,8 @@ static int uvc_v4l2_put_xu_mapping(const struct uvc_xu_control_mapping *kp,</div><div class='ctx'> 	    __put_user(kp-&gt;menu_count, &amp;up-&gt;menu_count))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	__clear_user(up-&gt;reserved, sizeof(up-&gt;reserved));</div><div class='add'>+	if (__clear_user(up-&gt;reserved, sizeof(up-&gt;reserved)))</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	if (kp-&gt;menu_count == 0)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1105,8 +1133,6 @@ static int uvc_v4l2_put_xu_mapping(const struct uvc_xu_control_mapping *kp,</div><div class='ctx'> 	if (get_user(p, &amp;up-&gt;menu_info))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	umenus = compat_ptr(p);</div><div class='del'>-	if (!access_ok(VERIFY_WRITE, umenus, kp-&gt;menu_count * sizeof(*umenus)))</div><div class='del'>-		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	if (copy_in_user(umenus, kmenus, kp-&gt;menu_count * sizeof(*umenus)))</div><div class='ctx'> 		return -EFAULT;</div><div class='head'>diff --git a/drivers/media/video/uvc/uvcvideo.h b/drivers/media/video/uvc/uvcvideo.h<br/>index 67f88d85bb16..7c3d082505b7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/uvc/uvcvideo.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/uvc/uvcvideo.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/uvc/uvcvideo.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/uvc/uvcvideo.h</a></div><div class='hunk'>@@ -13,6 +13,8 @@</div><div class='ctx'> #include &lt;linux/videodev2.h&gt;</div><div class='ctx'> #include &lt;media/media-device.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='add'>+#include &lt;media/v4l2-fh.h&gt;</div><div class='ctx'> #include &lt;media/videobuf2-core.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* --------------------------------------------------------------------------</div><div class='hunk'>@@ -153,8 +155,7 @@ struct uvc_control_info {</div><div class='ctx'> </div><div class='ctx'> struct uvc_control_mapping {</div><div class='ctx'> 	struct list_head list;</div><div class='del'>-</div><div class='del'>-	struct uvc_control_info *ctrl;</div><div class='add'>+	struct list_head ev_subs;</div><div class='ctx'> </div><div class='ctx'> 	__u32 id;</div><div class='ctx'> 	__u8 name[32];</div><div class='hunk'>@@ -169,6 +170,10 @@ struct uvc_control_mapping {</div><div class='ctx'> 	struct uvc_menu_info *menu_info;</div><div class='ctx'> 	__u32 menu_count;</div><div class='ctx'> </div><div class='add'>+	__u32 master_id;</div><div class='add'>+	__s32 master_manual;</div><div class='add'>+	__u32 slave_ids[2];</div><div class='add'>+</div><div class='ctx'> 	__s32 (*get) (struct uvc_control_mapping *mapping, __u8 query,</div><div class='ctx'> 		      const __u8 *data);</div><div class='ctx'> 	void (*set) (struct uvc_control_mapping *mapping, __s32 value,</div><div class='hunk'>@@ -524,6 +529,7 @@ enum uvc_handle_state {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct uvc_fh {</div><div class='add'>+	struct v4l2_fh vfh;</div><div class='ctx'> 	struct uvc_video_chain *chain;</div><div class='ctx'> 	struct uvc_streaming *stream;</div><div class='ctx'> 	enum uvc_handle_state state;</div><div class='hunk'>@@ -643,6 +649,8 @@ extern int uvc_status_suspend(struct uvc_device *dev);</div><div class='ctx'> extern int uvc_status_resume(struct uvc_device *dev);</div><div class='ctx'> </div><div class='ctx'> /* Controls */</div><div class='add'>+extern const struct v4l2_subscribed_event_ops uvc_ctrl_sub_ev_ops;</div><div class='add'>+</div><div class='ctx'> extern int uvc_query_v4l2_ctrl(struct uvc_video_chain *chain,</div><div class='ctx'> 		struct v4l2_queryctrl *v4l2_ctrl);</div><div class='ctx'> extern int uvc_query_v4l2_menu(struct uvc_video_chain *chain,</div><div class='hunk'>@@ -655,14 +663,18 @@ extern void uvc_ctrl_cleanup_device(struct uvc_device *dev);</div><div class='ctx'> extern int uvc_ctrl_resume_device(struct uvc_device *dev);</div><div class='ctx'> </div><div class='ctx'> extern int uvc_ctrl_begin(struct uvc_video_chain *chain);</div><div class='del'>-extern int __uvc_ctrl_commit(struct uvc_video_chain *chain, int rollback);</div><div class='del'>-static inline int uvc_ctrl_commit(struct uvc_video_chain *chain)</div><div class='add'>+extern int __uvc_ctrl_commit(struct uvc_fh *handle, int rollback,</div><div class='add'>+			const struct v4l2_ext_control *xctrls,</div><div class='add'>+			unsigned int xctrls_count);</div><div class='add'>+static inline int uvc_ctrl_commit(struct uvc_fh *handle,</div><div class='add'>+			const struct v4l2_ext_control *xctrls,</div><div class='add'>+			unsigned int xctrls_count)</div><div class='ctx'> {</div><div class='del'>-	return __uvc_ctrl_commit(chain, 0);</div><div class='add'>+	return __uvc_ctrl_commit(handle, 0, xctrls, xctrls_count);</div><div class='ctx'> }</div><div class='del'>-static inline int uvc_ctrl_rollback(struct uvc_video_chain *chain)</div><div class='add'>+static inline int uvc_ctrl_rollback(struct uvc_fh *handle)</div><div class='ctx'> {</div><div class='del'>-	return __uvc_ctrl_commit(chain, 1);</div><div class='add'>+	return __uvc_ctrl_commit(handle, 1, NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern int uvc_ctrl_get(struct uvc_video_chain *chain,</div><div class='head'>diff --git a/drivers/media/video/v4l2-compat-ioctl32.c b/drivers/media/video/v4l2-compat-ioctl32.c<br/>index 2829d256e4b7..5327ad3a6390 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/v4l2-compat-ioctl32.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/v4l2-compat-ioctl32.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/v4l2-compat-ioctl32.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/v4l2-compat-ioctl32.c</a></div><div class='hunk'>@@ -37,7 +37,7 @@ struct v4l2_clip32 {</div><div class='ctx'> </div><div class='ctx'> struct v4l2_window32 {</div><div class='ctx'> 	struct v4l2_rect        w;</div><div class='del'>-	enum v4l2_field  	field;</div><div class='add'>+	__u32		  	field;	/* enum v4l2_field */</div><div class='ctx'> 	__u32			chromakey;</div><div class='ctx'> 	compat_caddr_t		clips; /* actually struct v4l2_clip32 * */</div><div class='ctx'> 	__u32			clipcount;</div><div class='hunk'>@@ -147,7 +147,7 @@ static inline int put_v4l2_sliced_vbi_format(struct v4l2_sliced_vbi_format *kp,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct v4l2_format32 {</div><div class='del'>-	enum v4l2_buf_type type;</div><div class='add'>+	__u32	type;	/* enum v4l2_buf_type */</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct v4l2_pix_format	pix;</div><div class='ctx'> 		struct v4l2_pix_format_mplane	pix_mp;</div><div class='hunk'>@@ -170,7 +170,7 @@ struct v4l2_format32 {</div><div class='ctx'> struct v4l2_create_buffers32 {</div><div class='ctx'> 	__u32			index;</div><div class='ctx'> 	__u32			count;</div><div class='del'>-	enum v4l2_memory        memory;</div><div class='add'>+	__u32			memory;	/* enum v4l2_memory */</div><div class='ctx'> 	struct v4l2_format32	format;</div><div class='ctx'> 	__u32			reserved[8];</div><div class='ctx'> };</div><div class='hunk'>@@ -311,16 +311,16 @@ struct v4l2_plane32 {</div><div class='ctx'> </div><div class='ctx'> struct v4l2_buffer32 {</div><div class='ctx'> 	__u32			index;</div><div class='del'>-	enum v4l2_buf_type      type;</div><div class='add'>+	__u32			type;	/* enum v4l2_buf_type */</div><div class='ctx'> 	__u32			bytesused;</div><div class='ctx'> 	__u32			flags;</div><div class='del'>-	enum v4l2_field		field;</div><div class='add'>+	__u32			field;	/* enum v4l2_field */</div><div class='ctx'> 	struct compat_timeval	timestamp;</div><div class='ctx'> 	struct v4l2_timecode	timecode;</div><div class='ctx'> 	__u32			sequence;</div><div class='ctx'> </div><div class='ctx'> 	/* memory location */</div><div class='del'>-	enum v4l2_memory        memory;</div><div class='add'>+	__u32			memory;	/* enum v4l2_memory */</div><div class='ctx'> 	union {</div><div class='ctx'> 		__u32           offset;</div><div class='ctx'> 		compat_long_t   userptr;</div><div class='hunk'>@@ -1023,6 +1023,9 @@ long v4l2_compat_ioctl32(struct file *file, unsigned int cmd, unsigned long arg)</div><div class='ctx'> 	case VIDIOC_UNSUBSCRIBE_EVENT:</div><div class='ctx'> 	case VIDIOC_CREATE_BUFS32:</div><div class='ctx'> 	case VIDIOC_PREPARE_BUF32:</div><div class='add'>+	case VIDIOC_ENUM_DV_TIMINGS:</div><div class='add'>+	case VIDIOC_QUERY_DV_TIMINGS:</div><div class='add'>+	case VIDIOC_DV_TIMINGS_CAP:</div><div class='ctx'> 		ret = do_video_ioctl(file, cmd, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/v4l2-ctrls.c b/drivers/media/video/v4l2-ctrls.c<br/>index 18015c0a8d31..9abd9abd4502 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/v4l2-ctrls.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/v4l2-ctrls.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/v4l2-ctrls.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/v4l2-ctrls.c</a></div><div class='hunk'>@@ -230,6 +230,19 @@ const char * const *v4l2_ctrl_get_menu(u32 id)</div><div class='ctx'> 		"Aperture Priority Mode",</div><div class='ctx'> 		NULL</div><div class='ctx'> 	};</div><div class='add'>+	static const char * const camera_exposure_metering[] = {</div><div class='add'>+		"Average",</div><div class='add'>+		"Center Weighted",</div><div class='add'>+		"Spot",</div><div class='add'>+		NULL</div><div class='add'>+	};</div><div class='add'>+	static const char * const camera_auto_focus_range[] = {</div><div class='add'>+		"Auto",</div><div class='add'>+		"Normal",</div><div class='add'>+		"Macro",</div><div class='add'>+		"Infinity",</div><div class='add'>+		NULL</div><div class='add'>+	};</div><div class='ctx'> 	static const char * const colorfx[] = {</div><div class='ctx'> 		"None",</div><div class='ctx'> 		"Black &amp; White",</div><div class='hunk'>@@ -241,6 +254,47 @@ const char * const *v4l2_ctrl_get_menu(u32 id)</div><div class='ctx'> 		"Grass Green",</div><div class='ctx'> 		"Skin Whiten",</div><div class='ctx'> 		"Vivid",</div><div class='add'>+		"Aqua",</div><div class='add'>+		"Art Freeze",</div><div class='add'>+		"Silhouette",</div><div class='add'>+		"Solarization",</div><div class='add'>+		"Antique",</div><div class='add'>+		"Set Cb/Cr",</div><div class='add'>+		NULL</div><div class='add'>+	};</div><div class='add'>+	static const char * const auto_n_preset_white_balance[] = {</div><div class='add'>+		"Manual",</div><div class='add'>+		"Auto",</div><div class='add'>+		"Incandescent",</div><div class='add'>+		"Fluorescent",</div><div class='add'>+		"Fluorescent H",</div><div class='add'>+		"Horizon",</div><div class='add'>+		"Daylight",</div><div class='add'>+		"Flash",</div><div class='add'>+		"Cloudy",</div><div class='add'>+		"Shade",</div><div class='add'>+		NULL,</div><div class='add'>+	};</div><div class='add'>+	static const char * const camera_iso_sensitivity_auto[] = {</div><div class='add'>+		"Manual",</div><div class='add'>+		"Auto",</div><div class='add'>+		NULL</div><div class='add'>+	};</div><div class='add'>+	static const char * const scene_mode[] = {</div><div class='add'>+		"None",</div><div class='add'>+		"Backlight",</div><div class='add'>+		"Beach/Snow",</div><div class='add'>+		"Candle Light",</div><div class='add'>+		"Dusk/Dawn",</div><div class='add'>+		"Fall Colors",</div><div class='add'>+		"Fireworks",</div><div class='add'>+		"Landscape",</div><div class='add'>+		"Night",</div><div class='add'>+		"Party/Indoor",</div><div class='add'>+		"Portrait",</div><div class='add'>+		"Sports",</div><div class='add'>+		"Sunset",</div><div class='add'>+		"Text",</div><div class='ctx'> 		NULL</div><div class='ctx'> 	};</div><div class='ctx'> 	static const char * const tune_preemphasis[] = {</div><div class='hunk'>@@ -410,8 +464,18 @@ const char * const *v4l2_ctrl_get_menu(u32 id)</div><div class='ctx'> 		return camera_power_line_frequency;</div><div class='ctx'> 	case V4L2_CID_EXPOSURE_AUTO:</div><div class='ctx'> 		return camera_exposure_auto;</div><div class='add'>+	case V4L2_CID_EXPOSURE_METERING:</div><div class='add'>+		return camera_exposure_metering;</div><div class='add'>+	case V4L2_CID_AUTO_FOCUS_RANGE:</div><div class='add'>+		return camera_auto_focus_range;</div><div class='ctx'> 	case V4L2_CID_COLORFX:</div><div class='ctx'> 		return colorfx;</div><div class='add'>+	case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE:</div><div class='add'>+		return auto_n_preset_white_balance;</div><div class='add'>+	case V4L2_CID_ISO_SENSITIVITY_AUTO:</div><div class='add'>+		return camera_iso_sensitivity_auto;</div><div class='add'>+	case V4L2_CID_SCENE_MODE:</div><div class='add'>+		return scene_mode;</div><div class='ctx'> 	case V4L2_CID_TUNE_PREEMPHASIS:</div><div class='ctx'> 		return tune_preemphasis;</div><div class='ctx'> 	case V4L2_CID_FLASH_LED_MODE:</div><div class='hunk'>@@ -493,6 +557,7 @@ const char *v4l2_ctrl_get_name(u32 id)</div><div class='ctx'> 	case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE:	return "Min Number of Capture Buffers";</div><div class='ctx'> 	case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT:	return "Min Number of Output Buffers";</div><div class='ctx'> 	case V4L2_CID_ALPHA_COMPONENT:		return "Alpha Component";</div><div class='add'>+	case V4L2_CID_COLORFX_CBCR:		return "Color Effects, CbCr";</div><div class='ctx'> </div><div class='ctx'> 	/* MPEG controls */</div><div class='ctx'> 	/* Keep the order of the 'case's the same as in videodev2.h! */</div><div class='hunk'>@@ -590,13 +655,26 @@ const char *v4l2_ctrl_get_name(u32 id)</div><div class='ctx'> 	case V4L2_CID_TILT_ABSOLUTE:		return "Tilt, Absolute";</div><div class='ctx'> 	case V4L2_CID_FOCUS_ABSOLUTE:		return "Focus, Absolute";</div><div class='ctx'> 	case V4L2_CID_FOCUS_RELATIVE:		return "Focus, Relative";</div><div class='del'>-	case V4L2_CID_FOCUS_AUTO:		return "Focus, Automatic";</div><div class='add'>+	case V4L2_CID_FOCUS_AUTO:		return "Focus, Automatic Continuous";</div><div class='ctx'> 	case V4L2_CID_ZOOM_ABSOLUTE:		return "Zoom, Absolute";</div><div class='ctx'> 	case V4L2_CID_ZOOM_RELATIVE:		return "Zoom, Relative";</div><div class='ctx'> 	case V4L2_CID_ZOOM_CONTINUOUS:		return "Zoom, Continuous";</div><div class='ctx'> 	case V4L2_CID_PRIVACY:			return "Privacy";</div><div class='ctx'> 	case V4L2_CID_IRIS_ABSOLUTE:		return "Iris, Absolute";</div><div class='ctx'> 	case V4L2_CID_IRIS_RELATIVE:		return "Iris, Relative";</div><div class='add'>+	case V4L2_CID_AUTO_EXPOSURE_BIAS:	return "Auto Exposure, Bias";</div><div class='add'>+	case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: return "White Balance, Auto &amp; Preset";</div><div class='add'>+	case V4L2_CID_WIDE_DYNAMIC_RANGE:	return "Wide Dynamic Range";</div><div class='add'>+	case V4L2_CID_IMAGE_STABILIZATION:	return "Image Stabilization";</div><div class='add'>+	case V4L2_CID_ISO_SENSITIVITY:		return "ISO Sensitivity";</div><div class='add'>+	case V4L2_CID_ISO_SENSITIVITY_AUTO:	return "ISO Sensitivity, Auto";</div><div class='add'>+	case V4L2_CID_EXPOSURE_METERING:	return "Exposure, Metering Mode";</div><div class='add'>+	case V4L2_CID_SCENE_MODE:		return "Scene Mode";</div><div class='add'>+	case V4L2_CID_3A_LOCK:			return "3A Lock";</div><div class='add'>+	case V4L2_CID_AUTO_FOCUS_START:		return "Auto Focus, Start";</div><div class='add'>+	case V4L2_CID_AUTO_FOCUS_STOP:		return "Auto Focus, Stop";</div><div class='add'>+	case V4L2_CID_AUTO_FOCUS_STATUS:	return "Auto Focus, Status";</div><div class='add'>+	case V4L2_CID_AUTO_FOCUS_RANGE:		return "Auto Focus, Range";</div><div class='ctx'> </div><div class='ctx'> 	/* FM Radio Modulator control */</div><div class='ctx'> 	/* Keep the order of the 'case's the same as in videodev2.h! */</div><div class='hunk'>@@ -644,6 +722,17 @@ const char *v4l2_ctrl_get_name(u32 id)</div><div class='ctx'> 	case V4L2_CID_JPEG_COMPRESSION_QUALITY:	return "Compression Quality";</div><div class='ctx'> 	case V4L2_CID_JPEG_ACTIVE_MARKER:	return "Active Markers";</div><div class='ctx'> </div><div class='add'>+	/* Image source controls */</div><div class='add'>+	case V4L2_CID_IMAGE_SOURCE_CLASS:	return "Image Source Controls";</div><div class='add'>+	case V4L2_CID_VBLANK:			return "Vertical Blanking";</div><div class='add'>+	case V4L2_CID_HBLANK:			return "Horizontal Blanking";</div><div class='add'>+	case V4L2_CID_ANALOGUE_GAIN:		return "Analogue Gain";</div><div class='add'>+</div><div class='add'>+	/* Image processing controls */</div><div class='add'>+	case V4L2_CID_IMAGE_PROC_CLASS:		return "Image Processing Controls";</div><div class='add'>+	case V4L2_CID_LINK_FREQ:		return "Link Frequency";</div><div class='add'>+	case V4L2_CID_PIXEL_RATE:		return "Pixel Rate";</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -688,6 +777,8 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,</div><div class='ctx'> 	case V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM:</div><div class='ctx'> 	case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE:</div><div class='ctx'> 	case V4L2_CID_MPEG_VIDEO_MPEG4_QPEL:</div><div class='add'>+	case V4L2_CID_WIDE_DYNAMIC_RANGE:</div><div class='add'>+	case V4L2_CID_IMAGE_STABILIZATION:</div><div class='ctx'> 		*type = V4L2_CTRL_TYPE_BOOLEAN;</div><div class='ctx'> 		*min = 0;</div><div class='ctx'> 		*max = *step = 1;</div><div class='hunk'>@@ -696,6 +787,8 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,</div><div class='ctx'> 	case V4L2_CID_TILT_RESET:</div><div class='ctx'> 	case V4L2_CID_FLASH_STROBE:</div><div class='ctx'> 	case V4L2_CID_FLASH_STROBE_STOP:</div><div class='add'>+	case V4L2_CID_AUTO_FOCUS_START:</div><div class='add'>+	case V4L2_CID_AUTO_FOCUS_STOP:</div><div class='ctx'> 		*type = V4L2_CTRL_TYPE_BUTTON;</div><div class='ctx'> 		*flags |= V4L2_CTRL_FLAG_WRITE_ONLY;</div><div class='ctx'> 		*min = *max = *step = *def = 0;</div><div class='hunk'>@@ -719,7 +812,9 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,</div><div class='ctx'> 	case V4L2_CID_MPEG_STREAM_TYPE:</div><div class='ctx'> 	case V4L2_CID_MPEG_STREAM_VBI_FMT:</div><div class='ctx'> 	case V4L2_CID_EXPOSURE_AUTO:</div><div class='add'>+	case V4L2_CID_AUTO_FOCUS_RANGE:</div><div class='ctx'> 	case V4L2_CID_COLORFX:</div><div class='add'>+	case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE:</div><div class='ctx'> 	case V4L2_CID_TUNE_PREEMPHASIS:</div><div class='ctx'> 	case V4L2_CID_FLASH_LED_MODE:</div><div class='ctx'> 	case V4L2_CID_FLASH_STROBE_SOURCE:</div><div class='hunk'>@@ -733,18 +828,30 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,</div><div class='ctx'> 	case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL:</div><div class='ctx'> 	case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE:</div><div class='ctx'> 	case V4L2_CID_JPEG_CHROMA_SUBSAMPLING:</div><div class='add'>+	case V4L2_CID_ISO_SENSITIVITY_AUTO:</div><div class='add'>+	case V4L2_CID_EXPOSURE_METERING:</div><div class='add'>+	case V4L2_CID_SCENE_MODE:</div><div class='ctx'> 		*type = V4L2_CTRL_TYPE_MENU;</div><div class='ctx'> 		break;</div><div class='add'>+	case V4L2_CID_LINK_FREQ:</div><div class='add'>+		*type = V4L2_CTRL_TYPE_INTEGER_MENU;</div><div class='add'>+		break;</div><div class='ctx'> 	case V4L2_CID_RDS_TX_PS_NAME:</div><div class='ctx'> 	case V4L2_CID_RDS_TX_RADIO_TEXT:</div><div class='ctx'> 		*type = V4L2_CTRL_TYPE_STRING;</div><div class='ctx'> 		break;</div><div class='add'>+	case V4L2_CID_ISO_SENSITIVITY:</div><div class='add'>+	case V4L2_CID_AUTO_EXPOSURE_BIAS:</div><div class='add'>+		*type = V4L2_CTRL_TYPE_INTEGER_MENU;</div><div class='add'>+		break;</div><div class='ctx'> 	case V4L2_CID_USER_CLASS:</div><div class='ctx'> 	case V4L2_CID_CAMERA_CLASS:</div><div class='ctx'> 	case V4L2_CID_MPEG_CLASS:</div><div class='ctx'> 	case V4L2_CID_FM_TX_CLASS:</div><div class='ctx'> 	case V4L2_CID_FLASH_CLASS:</div><div class='ctx'> 	case V4L2_CID_JPEG_CLASS:</div><div class='add'>+	case V4L2_CID_IMAGE_SOURCE_CLASS:</div><div class='add'>+	case V4L2_CID_IMAGE_PROC_CLASS:</div><div class='ctx'> 		*type = V4L2_CTRL_TYPE_CTRL_CLASS;</div><div class='ctx'> 		/* You can neither read not write these */</div><div class='ctx'> 		*flags |= V4L2_CTRL_FLAG_READ_ONLY | V4L2_CTRL_FLAG_WRITE_ONLY;</div><div class='hunk'>@@ -759,6 +866,8 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_FLASH_FAULT:</div><div class='ctx'> 	case V4L2_CID_JPEG_ACTIVE_MARKER:</div><div class='add'>+	case V4L2_CID_3A_LOCK:</div><div class='add'>+	case V4L2_CID_AUTO_FOCUS_STATUS:</div><div class='ctx'> 		*type = V4L2_CTRL_TYPE_BITMASK;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE:</div><div class='hunk'>@@ -768,8 +877,12 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_MPEG_VIDEO_DEC_FRAME:</div><div class='ctx'> 	case V4L2_CID_MPEG_VIDEO_DEC_PTS:</div><div class='add'>+		*flags |= V4L2_CTRL_FLAG_VOLATILE;</div><div class='add'>+		/* Fall through */</div><div class='add'>+	case V4L2_CID_PIXEL_RATE:</div><div class='ctx'> 		*type = V4L2_CTRL_TYPE_INTEGER64;</div><div class='del'>-		*flags |= V4L2_CTRL_FLAG_READ_ONLY | V4L2_CTRL_FLAG_VOLATILE;</div><div class='add'>+		*flags |= V4L2_CTRL_FLAG_READ_ONLY;</div><div class='add'>+		*min = *max = *step = *def = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		*type = V4L2_CTRL_TYPE_INTEGER;</div><div class='hunk'>@@ -817,6 +930,7 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,</div><div class='ctx'> 		*flags |= V4L2_CTRL_FLAG_WRITE_ONLY;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_FLASH_STROBE_STATUS:</div><div class='add'>+	case V4L2_CID_AUTO_FOCUS_STATUS:</div><div class='ctx'> 	case V4L2_CID_FLASH_READY:</div><div class='ctx'> 		*flags |= V4L2_CTRL_FLAG_READ_ONLY;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -852,7 +966,8 @@ static void fill_event(struct v4l2_event *ev, struct v4l2_ctrl *ctrl, u32 change</div><div class='ctx'> 		ev-&gt;u.ctrl.value64 = ctrl-&gt;cur.val64;</div><div class='ctx'> 	ev-&gt;u.ctrl.minimum = ctrl-&gt;minimum;</div><div class='ctx'> 	ev-&gt;u.ctrl.maximum = ctrl-&gt;maximum;</div><div class='del'>-	if (ctrl-&gt;type == V4L2_CTRL_TYPE_MENU)</div><div class='add'>+	if (ctrl-&gt;type == V4L2_CTRL_TYPE_MENU</div><div class='add'>+	    || ctrl-&gt;type == V4L2_CTRL_TYPE_INTEGER_MENU)</div><div class='ctx'> 		ev-&gt;u.ctrl.step = 1;</div><div class='ctx'> 	else</div><div class='ctx'> 		ev-&gt;u.ctrl.step = ctrl-&gt;step;</div><div class='hunk'>@@ -1083,10 +1198,13 @@ static int validate_new_int(const struct v4l2_ctrl *ctrl, s32 *pval)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	case V4L2_CTRL_TYPE_MENU:</div><div class='add'>+	case V4L2_CTRL_TYPE_INTEGER_MENU:</div><div class='ctx'> 		if (val &lt; ctrl-&gt;minimum || val &gt; ctrl-&gt;maximum)</div><div class='ctx'> 			return -ERANGE;</div><div class='del'>-		if (ctrl-&gt;qmenu[val][0] == '\0' ||</div><div class='del'>-		    (ctrl-&gt;menu_skip_mask &amp; (1 &lt;&lt; val)))</div><div class='add'>+		if (ctrl-&gt;menu_skip_mask &amp; (1 &lt;&lt; val))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		if (ctrl-&gt;type == V4L2_CTRL_TYPE_MENU &amp;&amp;</div><div class='add'>+		    ctrl-&gt;qmenu[val][0] == '\0')</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1114,6 +1232,7 @@ static int validate_new(const struct v4l2_ctrl *ctrl, struct v4l2_ext_control *c</div><div class='ctx'> 	case V4L2_CTRL_TYPE_INTEGER:</div><div class='ctx'> 	case V4L2_CTRL_TYPE_BOOLEAN:</div><div class='ctx'> 	case V4L2_CTRL_TYPE_MENU:</div><div class='add'>+	case V4L2_CTRL_TYPE_INTEGER_MENU:</div><div class='ctx'> 	case V4L2_CTRL_TYPE_BITMASK:</div><div class='ctx'> 	case V4L2_CTRL_TYPE_BUTTON:</div><div class='ctx'> 	case V4L2_CTRL_TYPE_CTRL_CLASS:</div><div class='hunk'>@@ -1152,7 +1271,8 @@ static inline int handler_set_err(struct v4l2_ctrl_handler *hdl, int err)</div><div class='ctx'> int v4l2_ctrl_handler_init(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 			   unsigned nr_of_controls_hint)</div><div class='ctx'> {</div><div class='del'>-	mutex_init(&amp;hdl-&gt;lock);</div><div class='add'>+	hdl-&gt;lock = &amp;hdl-&gt;_lock;</div><div class='add'>+	mutex_init(hdl-&gt;lock);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;hdl-&gt;ctrls);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;hdl-&gt;ctrl_refs);</div><div class='ctx'> 	hdl-&gt;nr_of_buckets = 1 + nr_of_controls_hint / 8;</div><div class='hunk'>@@ -1173,7 +1293,7 @@ void v4l2_ctrl_handler_free(struct v4l2_ctrl_handler *hdl)</div><div class='ctx'> 	if (hdl == NULL || hdl-&gt;buckets == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_lock(hdl-&gt;lock);</div><div class='ctx'> 	/* Free all nodes */</div><div class='ctx'> 	list_for_each_entry_safe(ref, next_ref, &amp;hdl-&gt;ctrl_refs, node) {</div><div class='ctx'> 		list_del(&amp;ref-&gt;node);</div><div class='hunk'>@@ -1190,7 +1310,7 @@ void v4l2_ctrl_handler_free(struct v4l2_ctrl_handler *hdl)</div><div class='ctx'> 	hdl-&gt;buckets = NULL;</div><div class='ctx'> 	hdl-&gt;cached = NULL;</div><div class='ctx'> 	hdl-&gt;error = 0;</div><div class='del'>-	mutex_unlock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_unlock(hdl-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(v4l2_ctrl_handler_free);</div><div class='ctx'> </div><div class='hunk'>@@ -1255,9 +1375,9 @@ static struct v4l2_ctrl_ref *find_ref_lock(</div><div class='ctx'> 	struct v4l2_ctrl_ref *ref = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (hdl) {</div><div class='del'>-		mutex_lock(&amp;hdl-&gt;lock);</div><div class='add'>+		mutex_lock(hdl-&gt;lock);</div><div class='ctx'> 		ref = find_ref(hdl, id);</div><div class='del'>-		mutex_unlock(&amp;hdl-&gt;lock);</div><div class='add'>+		mutex_unlock(hdl-&gt;lock);</div><div class='ctx'> 	}</div><div class='ctx'> 	return ref;</div><div class='ctx'> }</div><div class='hunk'>@@ -1304,7 +1424,7 @@ static int handler_new_ref(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;new_ref-&gt;node);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_lock(hdl-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Add immediately at the end of the list if the list is empty, or if</div><div class='ctx'> 	   the last element in the list has a lower ID.</div><div class='hunk'>@@ -1334,7 +1454,7 @@ insert_in_hash:</div><div class='ctx'> 	hdl-&gt;buckets[bucket] = new_ref;</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='del'>-	mutex_unlock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_unlock(hdl-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1343,7 +1463,8 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 			const struct v4l2_ctrl_ops *ops,</div><div class='ctx'> 			u32 id, const char *name, enum v4l2_ctrl_type type,</div><div class='ctx'> 			s32 min, s32 max, u32 step, s32 def,</div><div class='del'>-			u32 flags, const char * const *qmenu, void *priv)</div><div class='add'>+			u32 flags, const char * const *qmenu,</div><div class='add'>+			const s64 *qmenu_int, void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct v4l2_ctrl *ctrl;</div><div class='ctx'> 	unsigned sz_extra = 0;</div><div class='hunk'>@@ -1356,6 +1477,7 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 	    (type == V4L2_CTRL_TYPE_INTEGER &amp;&amp; step == 0) ||</div><div class='ctx'> 	    (type == V4L2_CTRL_TYPE_BITMASK &amp;&amp; max == 0) ||</div><div class='ctx'> 	    (type == V4L2_CTRL_TYPE_MENU &amp;&amp; qmenu == NULL) ||</div><div class='add'>+	    (type == V4L2_CTRL_TYPE_INTEGER_MENU &amp;&amp; qmenu_int == NULL) ||</div><div class='ctx'> 	    (type == V4L2_CTRL_TYPE_STRING &amp;&amp; max == 0)) {</div><div class='ctx'> 		handler_set_err(hdl, -ERANGE);</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -1366,6 +1488,7 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 	}</div><div class='ctx'> 	if ((type == V4L2_CTRL_TYPE_INTEGER ||</div><div class='ctx'> 	     type == V4L2_CTRL_TYPE_MENU ||</div><div class='add'>+	     type == V4L2_CTRL_TYPE_INTEGER_MENU ||</div><div class='ctx'> 	     type == V4L2_CTRL_TYPE_BOOLEAN) &amp;&amp;</div><div class='ctx'> 	    (def &lt; min || def &gt; max)) {</div><div class='ctx'> 		handler_set_err(hdl, -ERANGE);</div><div class='hunk'>@@ -1400,7 +1523,10 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 	ctrl-&gt;minimum = min;</div><div class='ctx'> 	ctrl-&gt;maximum = max;</div><div class='ctx'> 	ctrl-&gt;step = step;</div><div class='del'>-	ctrl-&gt;qmenu = qmenu;</div><div class='add'>+	if (type == V4L2_CTRL_TYPE_MENU)</div><div class='add'>+		ctrl-&gt;qmenu = qmenu;</div><div class='add'>+	else if (type == V4L2_CTRL_TYPE_INTEGER_MENU)</div><div class='add'>+		ctrl-&gt;qmenu_int = qmenu_int;</div><div class='ctx'> 	ctrl-&gt;priv = priv;</div><div class='ctx'> 	ctrl-&gt;cur.val = ctrl-&gt;val = ctrl-&gt;default_value = def;</div><div class='ctx'> </div><div class='hunk'>@@ -1414,9 +1540,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 		kfree(ctrl);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='del'>-	mutex_lock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_lock(hdl-&gt;lock);</div><div class='ctx'> 	list_add_tail(&amp;ctrl-&gt;node, &amp;hdl-&gt;ctrls);</div><div class='del'>-	mutex_unlock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_unlock(hdl-&gt;lock);</div><div class='ctx'> 	return ctrl;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1427,6 +1553,7 @@ struct v4l2_ctrl *v4l2_ctrl_new_custom(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 	struct v4l2_ctrl *ctrl;</div><div class='ctx'> 	const char *name = cfg-&gt;name;</div><div class='ctx'> 	const char * const *qmenu = cfg-&gt;qmenu;</div><div class='add'>+	const s64 *qmenu_int = cfg-&gt;qmenu_int;</div><div class='ctx'> 	enum v4l2_ctrl_type type = cfg-&gt;type;</div><div class='ctx'> 	u32 flags = cfg-&gt;flags;</div><div class='ctx'> 	s32 min = cfg-&gt;min;</div><div class='hunk'>@@ -1438,18 +1565,24 @@ struct v4l2_ctrl *v4l2_ctrl_new_custom(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 		v4l2_ctrl_fill(cfg-&gt;id, &amp;name, &amp;type, &amp;min, &amp;max, &amp;step,</div><div class='ctx'> 								&amp;def, &amp;flags);</div><div class='ctx'> </div><div class='del'>-	is_menu = (cfg-&gt;type == V4L2_CTRL_TYPE_MENU);</div><div class='add'>+	is_menu = (cfg-&gt;type == V4L2_CTRL_TYPE_MENU ||</div><div class='add'>+		   cfg-&gt;type == V4L2_CTRL_TYPE_INTEGER_MENU);</div><div class='ctx'> 	if (is_menu)</div><div class='ctx'> 		WARN_ON(step);</div><div class='ctx'> 	else</div><div class='ctx'> 		WARN_ON(cfg-&gt;menu_skip_mask);</div><div class='del'>-	if (is_menu &amp;&amp; qmenu == NULL)</div><div class='add'>+	if (cfg-&gt;type == V4L2_CTRL_TYPE_MENU &amp;&amp; qmenu == NULL)</div><div class='ctx'> 		qmenu = v4l2_ctrl_get_menu(cfg-&gt;id);</div><div class='add'>+	else if (cfg-&gt;type == V4L2_CTRL_TYPE_INTEGER_MENU &amp;&amp;</div><div class='add'>+		 qmenu_int == NULL) {</div><div class='add'>+		handler_set_err(hdl, -EINVAL);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ctrl = v4l2_ctrl_new(hdl, cfg-&gt;ops, cfg-&gt;id, name,</div><div class='ctx'> 			type, min, max,</div><div class='ctx'> 			is_menu ? cfg-&gt;menu_skip_mask : step,</div><div class='del'>-			def, flags, qmenu, priv);</div><div class='add'>+			def, flags, qmenu, qmenu_int, priv);</div><div class='ctx'> 	if (ctrl)</div><div class='ctx'> 		ctrl-&gt;is_private = cfg-&gt;is_private;</div><div class='ctx'> 	return ctrl;</div><div class='hunk'>@@ -1466,12 +1599,13 @@ struct v4l2_ctrl *v4l2_ctrl_new_std(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 	u32 flags;</div><div class='ctx'> </div><div class='ctx'> 	v4l2_ctrl_fill(id, &amp;name, &amp;type, &amp;min, &amp;max, &amp;step, &amp;def, &amp;flags);</div><div class='del'>-	if (type == V4L2_CTRL_TYPE_MENU) {</div><div class='add'>+	if (type == V4L2_CTRL_TYPE_MENU</div><div class='add'>+	    || type == V4L2_CTRL_TYPE_INTEGER_MENU) {</div><div class='ctx'> 		handler_set_err(hdl, -EINVAL);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return v4l2_ctrl_new(hdl, ops, id, name, type,</div><div class='del'>-				    min, max, step, def, flags, NULL, NULL);</div><div class='add'>+			     min, max, step, def, flags, NULL, NULL, NULL);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(v4l2_ctrl_new_std);</div><div class='ctx'> </div><div class='hunk'>@@ -1493,10 +1627,31 @@ struct v4l2_ctrl *v4l2_ctrl_new_std_menu(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return v4l2_ctrl_new(hdl, ops, id, name, type,</div><div class='del'>-				    0, max, mask, def, flags, qmenu, NULL);</div><div class='add'>+			     0, max, mask, def, flags, qmenu, NULL, NULL);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(v4l2_ctrl_new_std_menu);</div><div class='ctx'> </div><div class='add'>+/* Helper function for standard integer menu controls */</div><div class='add'>+struct v4l2_ctrl *v4l2_ctrl_new_int_menu(struct v4l2_ctrl_handler *hdl,</div><div class='add'>+			const struct v4l2_ctrl_ops *ops,</div><div class='add'>+			u32 id, s32 max, s32 def, const s64 *qmenu_int)</div><div class='add'>+{</div><div class='add'>+	const char *name;</div><div class='add'>+	enum v4l2_ctrl_type type;</div><div class='add'>+	s32 min;</div><div class='add'>+	s32 step;</div><div class='add'>+	u32 flags;</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_fill(id, &amp;name, &amp;type, &amp;min, &amp;max, &amp;step, &amp;def, &amp;flags);</div><div class='add'>+	if (type != V4L2_CTRL_TYPE_INTEGER_MENU) {</div><div class='add'>+		handler_set_err(hdl, -EINVAL);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	return v4l2_ctrl_new(hdl, ops, id, name, type,</div><div class='add'>+			     0, max, 0, def, flags, NULL, qmenu_int, NULL);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(v4l2_ctrl_new_int_menu);</div><div class='add'>+</div><div class='ctx'> /* Add a control from another handler to this handler */</div><div class='ctx'> struct v4l2_ctrl *v4l2_ctrl_add_ctrl(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 					  struct v4l2_ctrl *ctrl)</div><div class='hunk'>@@ -1525,7 +1680,7 @@ int v4l2_ctrl_add_handler(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	if (hdl-&gt;error)</div><div class='ctx'> 		return hdl-&gt;error;</div><div class='del'>-	mutex_lock(&amp;add-&gt;lock);</div><div class='add'>+	mutex_lock(add-&gt;lock);</div><div class='ctx'> 	list_for_each_entry(ref, &amp;add-&gt;ctrl_refs, node) {</div><div class='ctx'> 		struct v4l2_ctrl *ctrl = ref-&gt;ctrl;</div><div class='ctx'> </div><div class='hunk'>@@ -1539,7 +1694,7 @@ int v4l2_ctrl_add_handler(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;add-&gt;lock);</div><div class='add'>+	mutex_unlock(add-&gt;lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(v4l2_ctrl_add_handler);</div><div class='hunk'>@@ -1659,6 +1814,9 @@ static void log_ctrl(const struct v4l2_ctrl *ctrl,</div><div class='ctx'> 	case V4L2_CTRL_TYPE_MENU:</div><div class='ctx'> 		printk(KERN_CONT "%s", ctrl-&gt;qmenu[ctrl-&gt;cur.val]);</div><div class='ctx'> 		break;</div><div class='add'>+	case V4L2_CTRL_TYPE_INTEGER_MENU:</div><div class='add'>+		printk(KERN_CONT "%lld", ctrl-&gt;qmenu_int[ctrl-&gt;cur.val]);</div><div class='add'>+		break;</div><div class='ctx'> 	case V4L2_CTRL_TYPE_BITMASK:</div><div class='ctx'> 		printk(KERN_CONT "0x%08x", ctrl-&gt;cur.val);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1700,11 +1858,11 @@ void v4l2_ctrl_handler_log_status(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 	len = strlen(prefix);</div><div class='ctx'> 	if (len &amp;&amp; prefix[len - 1] != ' ')</div><div class='ctx'> 		colon = ": ";</div><div class='del'>-	mutex_lock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_lock(hdl-&gt;lock);</div><div class='ctx'> 	list_for_each_entry(ctrl, &amp;hdl-&gt;ctrls, node)</div><div class='ctx'> 		if (!(ctrl-&gt;flags &amp; V4L2_CTRL_FLAG_DISABLED))</div><div class='ctx'> 			log_ctrl(ctrl, prefix, colon);</div><div class='del'>-	mutex_unlock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_unlock(hdl-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(v4l2_ctrl_handler_log_status);</div><div class='ctx'> </div><div class='hunk'>@@ -1716,7 +1874,7 @@ int v4l2_ctrl_handler_setup(struct v4l2_ctrl_handler *hdl)</div><div class='ctx'> </div><div class='ctx'> 	if (hdl == NULL)</div><div class='ctx'> 		return 0;</div><div class='del'>-	mutex_lock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_lock(hdl-&gt;lock);</div><div class='ctx'> 	list_for_each_entry(ctrl, &amp;hdl-&gt;ctrls, node)</div><div class='ctx'> 		ctrl-&gt;done = false;</div><div class='ctx'> </div><div class='hunk'>@@ -1741,7 +1899,7 @@ int v4l2_ctrl_handler_setup(struct v4l2_ctrl_handler *hdl)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_unlock(hdl-&gt;lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(v4l2_ctrl_handler_setup);</div><div class='hunk'>@@ -1756,7 +1914,7 @@ int v4l2_queryctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_queryctrl *qc)</div><div class='ctx'> 	if (hdl == NULL)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_lock(hdl-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Try to find it */</div><div class='ctx'> 	ref = find_ref(hdl, id);</div><div class='hunk'>@@ -1781,7 +1939,7 @@ int v4l2_queryctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_queryctrl *qc)</div><div class='ctx'> 					break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_unlock(hdl-&gt;lock);</div><div class='ctx'> 	if (!ref)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -1795,7 +1953,8 @@ int v4l2_queryctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_queryctrl *qc)</div><div class='ctx'> 	qc-&gt;minimum = ctrl-&gt;minimum;</div><div class='ctx'> 	qc-&gt;maximum = ctrl-&gt;maximum;</div><div class='ctx'> 	qc-&gt;default_value = ctrl-&gt;default_value;</div><div class='del'>-	if (ctrl-&gt;type == V4L2_CTRL_TYPE_MENU)</div><div class='add'>+	if (ctrl-&gt;type == V4L2_CTRL_TYPE_MENU</div><div class='add'>+	    || ctrl-&gt;type == V4L2_CTRL_TYPE_INTEGER_MENU)</div><div class='ctx'> 		qc-&gt;step = 1;</div><div class='ctx'> 	else</div><div class='ctx'> 		qc-&gt;step = ctrl-&gt;step;</div><div class='hunk'>@@ -1825,16 +1984,33 @@ int v4l2_querymenu(struct v4l2_ctrl_handler *hdl, struct v4l2_querymenu *qm)</div><div class='ctx'> </div><div class='ctx'> 	qm-&gt;reserved = 0;</div><div class='ctx'> 	/* Sanity checks */</div><div class='del'>-	if (ctrl-&gt;qmenu == NULL ||</div><div class='del'>-	    i &lt; ctrl-&gt;minimum || i &gt; ctrl-&gt;maximum)</div><div class='add'>+	switch (ctrl-&gt;type) {</div><div class='add'>+	case V4L2_CTRL_TYPE_MENU:</div><div class='add'>+		if (ctrl-&gt;qmenu == NULL)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	case V4L2_CTRL_TYPE_INTEGER_MENU:</div><div class='add'>+		if (ctrl-&gt;qmenu_int == NULL)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i &lt; ctrl-&gt;minimum || i &gt; ctrl-&gt;maximum)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	/* Use mask to see if this menu item should be skipped */</div><div class='ctx'> 	if (ctrl-&gt;menu_skip_mask &amp; (1 &lt;&lt; i))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	/* Empty menu items should also be skipped */</div><div class='del'>-	if (ctrl-&gt;qmenu[i] == NULL || ctrl-&gt;qmenu[i][0] == '\0')</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	strlcpy(qm-&gt;name, ctrl-&gt;qmenu[i], sizeof(qm-&gt;name));</div><div class='add'>+	if (ctrl-&gt;type == V4L2_CTRL_TYPE_MENU) {</div><div class='add'>+		if (ctrl-&gt;qmenu[i] == NULL || ctrl-&gt;qmenu[i][0] == '\0')</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		strlcpy(qm-&gt;name, ctrl-&gt;qmenu[i], sizeof(qm-&gt;name));</div><div class='add'>+	} else {</div><div class='add'>+		qm-&gt;value = ctrl-&gt;qmenu_int[i];</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(v4l2_querymenu);</div><div class='hunk'>@@ -1940,7 +2116,7 @@ static int prepare_ext_ctrls(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 	   belong to the same cluster. */</div><div class='ctx'> </div><div class='ctx'> 	/* This has to be done with the handler lock taken. */</div><div class='del'>-	mutex_lock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_lock(hdl-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/* First zero the helper field in the master control references */</div><div class='ctx'> 	for (i = 0; i &lt; cs-&gt;count; i++)</div><div class='hunk'>@@ -1962,7 +2138,7 @@ static int prepare_ext_ctrls(struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 		/* Point the mref helper to the current helper struct. */</div><div class='ctx'> 		mref-&gt;helper = h;</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;hdl-&gt;lock);</div><div class='add'>+	mutex_unlock(hdl-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1996,7 +2172,8 @@ int v4l2_g_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *cs</div><div class='ctx'> 		return class_check(hdl, cs-&gt;ctrl_class);</div><div class='ctx'> </div><div class='ctx'> 	if (cs-&gt;count &gt; ARRAY_SIZE(helper)) {</div><div class='del'>-		helpers = kmalloc(sizeof(helper[0]) * cs-&gt;count, GFP_KERNEL);</div><div class='add'>+		helpers = kmalloc_array(cs-&gt;count, sizeof(helper[0]),</div><div class='add'>+					GFP_KERNEL);</div><div class='ctx'> 		if (helpers == NULL)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2218,7 +2395,8 @@ static int try_set_ext_ctrls(struct v4l2_fh *fh, struct v4l2_ctrl_handler *hdl,</div><div class='ctx'> 		return class_check(hdl, cs-&gt;ctrl_class);</div><div class='ctx'> </div><div class='ctx'> 	if (cs-&gt;count &gt; ARRAY_SIZE(helper)) {</div><div class='del'>-		helpers = kmalloc(sizeof(helper[0]) * cs-&gt;count, GFP_KERNEL);</div><div class='add'>+		helpers = kmalloc_array(cs-&gt;count, sizeof(helper[0]),</div><div class='add'>+					GFP_KERNEL);</div><div class='ctx'> 		if (!helpers)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2381,9 +2559,13 @@ int v4l2_ctrl_s_ctrl(struct v4l2_ctrl *ctrl, s32 val)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(v4l2_ctrl_s_ctrl);</div><div class='ctx'> </div><div class='del'>-void v4l2_ctrl_add_event(struct v4l2_ctrl *ctrl,</div><div class='del'>-				struct v4l2_subscribed_event *sev)</div><div class='add'>+static int v4l2_ctrl_add_event(struct v4l2_subscribed_event *sev, unsigned elems)</div><div class='ctx'> {</div><div class='add'>+	struct v4l2_ctrl *ctrl = v4l2_ctrl_find(sev-&gt;fh-&gt;ctrl_handler, sev-&gt;id);</div><div class='add'>+</div><div class='add'>+	if (ctrl == NULL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	v4l2_ctrl_lock(ctrl);</div><div class='ctx'> 	list_add_tail(&amp;sev-&gt;node, &amp;ctrl-&gt;ev_subs);</div><div class='ctx'> 	if (ctrl-&gt;type != V4L2_CTRL_TYPE_CTRL_CLASS &amp;&amp;</div><div class='hunk'>@@ -2394,20 +2576,46 @@ void v4l2_ctrl_add_event(struct v4l2_ctrl *ctrl,</div><div class='ctx'> 		if (!(ctrl-&gt;flags &amp; V4L2_CTRL_FLAG_WRITE_ONLY))</div><div class='ctx'> 			changes |= V4L2_EVENT_CTRL_CH_VALUE;</div><div class='ctx'> 		fill_event(&amp;ev, ctrl, changes);</div><div class='add'>+		/* Mark the queue as active, allowing this initial</div><div class='add'>+		   event to be accepted. */</div><div class='add'>+		sev-&gt;elems = elems;</div><div class='ctx'> 		v4l2_event_queue_fh(sev-&gt;fh, &amp;ev);</div><div class='ctx'> 	}</div><div class='ctx'> 	v4l2_ctrl_unlock(ctrl);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(v4l2_ctrl_add_event);</div><div class='ctx'> </div><div class='del'>-void v4l2_ctrl_del_event(struct v4l2_ctrl *ctrl,</div><div class='del'>-				struct v4l2_subscribed_event *sev)</div><div class='add'>+static void v4l2_ctrl_del_event(struct v4l2_subscribed_event *sev)</div><div class='ctx'> {</div><div class='add'>+	struct v4l2_ctrl *ctrl = v4l2_ctrl_find(sev-&gt;fh-&gt;ctrl_handler, sev-&gt;id);</div><div class='add'>+</div><div class='ctx'> 	v4l2_ctrl_lock(ctrl);</div><div class='ctx'> 	list_del(&amp;sev-&gt;node);</div><div class='ctx'> 	v4l2_ctrl_unlock(ctrl);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(v4l2_ctrl_del_event);</div><div class='add'>+</div><div class='add'>+void v4l2_ctrl_replace(struct v4l2_event *old, const struct v4l2_event *new)</div><div class='add'>+{</div><div class='add'>+	u32 old_changes = old-&gt;u.ctrl.changes;</div><div class='add'>+</div><div class='add'>+	old-&gt;u.ctrl = new-&gt;u.ctrl;</div><div class='add'>+	old-&gt;u.ctrl.changes |= old_changes;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(v4l2_ctrl_replace);</div><div class='add'>+</div><div class='add'>+void v4l2_ctrl_merge(const struct v4l2_event *old, struct v4l2_event *new)</div><div class='add'>+{</div><div class='add'>+	new-&gt;u.ctrl.changes |= old-&gt;u.ctrl.changes;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(v4l2_ctrl_merge);</div><div class='add'>+</div><div class='add'>+const struct v4l2_subscribed_event_ops v4l2_ctrl_sub_ev_ops = {</div><div class='add'>+	.add = v4l2_ctrl_add_event,</div><div class='add'>+	.del = v4l2_ctrl_del_event,</div><div class='add'>+	.replace = v4l2_ctrl_replace,</div><div class='add'>+	.merge = v4l2_ctrl_merge,</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL(v4l2_ctrl_sub_ev_ops);</div><div class='ctx'> </div><div class='ctx'> int v4l2_ctrl_log_status(struct file *file, void *fh)</div><div class='ctx'> {</div><div class='hunk'>@@ -2425,7 +2633,7 @@ int v4l2_ctrl_subscribe_event(struct v4l2_fh *fh,</div><div class='ctx'> 				struct v4l2_event_subscription *sub)</div><div class='ctx'> {</div><div class='ctx'> 	if (sub-&gt;type == V4L2_EVENT_CTRL)</div><div class='del'>-		return v4l2_event_subscribe(fh, sub, 0);</div><div class='add'>+		return v4l2_event_subscribe(fh, sub, 0, &amp;v4l2_ctrl_sub_ev_ops);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(v4l2_ctrl_subscribe_event);</div><div class='head'>diff --git a/drivers/media/video/v4l2-dev.c b/drivers/media/video/v4l2-dev.c<br/>index 70bec548d904..5ccbd4629f9c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/v4l2-dev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/v4l2-dev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/v4l2-dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/v4l2-dev.c</a></div><div class='hunk'>@@ -274,11 +274,12 @@ static ssize_t v4l2_read(struct file *filp, char __user *buf,</div><div class='ctx'> </div><div class='ctx'> 	if (!vdev-&gt;fops-&gt;read)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	if (vdev-&gt;lock &amp;&amp; mutex_lock_interruptible(vdev-&gt;lock))</div><div class='add'>+	if (test_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags) &amp;&amp;</div><div class='add'>+	    mutex_lock_interruptible(vdev-&gt;lock))</div><div class='ctx'> 		return -ERESTARTSYS;</div><div class='ctx'> 	if (video_is_registered(vdev))</div><div class='ctx'> 		ret = vdev-&gt;fops-&gt;read(filp, buf, sz, off);</div><div class='del'>-	if (vdev-&gt;lock)</div><div class='add'>+	if (test_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags))</div><div class='ctx'> 		mutex_unlock(vdev-&gt;lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -291,11 +292,12 @@ static ssize_t v4l2_write(struct file *filp, const char __user *buf,</div><div class='ctx'> </div><div class='ctx'> 	if (!vdev-&gt;fops-&gt;write)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	if (vdev-&gt;lock &amp;&amp; mutex_lock_interruptible(vdev-&gt;lock))</div><div class='add'>+	if (test_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags) &amp;&amp;</div><div class='add'>+	    mutex_lock_interruptible(vdev-&gt;lock))</div><div class='ctx'> 		return -ERESTARTSYS;</div><div class='ctx'> 	if (video_is_registered(vdev))</div><div class='ctx'> 		ret = vdev-&gt;fops-&gt;write(filp, buf, sz, off);</div><div class='del'>-	if (vdev-&gt;lock)</div><div class='add'>+	if (test_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags))</div><div class='ctx'> 		mutex_unlock(vdev-&gt;lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -307,11 +309,11 @@ static unsigned int v4l2_poll(struct file *filp, struct poll_table_struct *poll)</div><div class='ctx'> </div><div class='ctx'> 	if (!vdev-&gt;fops-&gt;poll)</div><div class='ctx'> 		return DEFAULT_POLLMASK;</div><div class='del'>-	if (vdev-&gt;lock)</div><div class='add'>+	if (test_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags))</div><div class='ctx'> 		mutex_lock(vdev-&gt;lock);</div><div class='ctx'> 	if (video_is_registered(vdev))</div><div class='ctx'> 		ret = vdev-&gt;fops-&gt;poll(filp, poll);</div><div class='del'>-	if (vdev-&gt;lock)</div><div class='add'>+	if (test_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags))</div><div class='ctx'> 		mutex_unlock(vdev-&gt;lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -322,11 +324,19 @@ static long v4l2_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)</div><div class='ctx'> 	int ret = -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (vdev-&gt;fops-&gt;unlocked_ioctl) {</div><div class='del'>-		if (vdev-&gt;lock &amp;&amp; mutex_lock_interruptible(vdev-&gt;lock))</div><div class='del'>-			return -ERESTARTSYS;</div><div class='add'>+		bool locked = false;</div><div class='add'>+</div><div class='add'>+		if (vdev-&gt;lock) {</div><div class='add'>+			/* always lock unless the cmd is marked as "don't use lock" */</div><div class='add'>+			locked = !v4l2_is_known_ioctl(cmd) ||</div><div class='add'>+				 !test_bit(_IOC_NR(cmd), vdev-&gt;disable_locking);</div><div class='add'>+</div><div class='add'>+			if (locked &amp;&amp; mutex_lock_interruptible(vdev-&gt;lock))</div><div class='add'>+				return -ERESTARTSYS;</div><div class='add'>+		}</div><div class='ctx'> 		if (video_is_registered(vdev))</div><div class='ctx'> 			ret = vdev-&gt;fops-&gt;unlocked_ioctl(filp, cmd, arg);</div><div class='del'>-		if (vdev-&gt;lock)</div><div class='add'>+		if (locked)</div><div class='ctx'> 			mutex_unlock(vdev-&gt;lock);</div><div class='ctx'> 	} else if (vdev-&gt;fops-&gt;ioctl) {</div><div class='ctx'> 		/* This code path is a replacement for the BKL. It is a major</div><div class='hunk'>@@ -391,11 +401,12 @@ static int v4l2_mmap(struct file *filp, struct vm_area_struct *vm)</div><div class='ctx'> </div><div class='ctx'> 	if (!vdev-&gt;fops-&gt;mmap)</div><div class='ctx'> 		return ret;</div><div class='del'>-	if (vdev-&gt;lock &amp;&amp; mutex_lock_interruptible(vdev-&gt;lock))</div><div class='add'>+	if (test_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags) &amp;&amp;</div><div class='add'>+	    mutex_lock_interruptible(vdev-&gt;lock))</div><div class='ctx'> 		return -ERESTARTSYS;</div><div class='ctx'> 	if (video_is_registered(vdev))</div><div class='ctx'> 		ret = vdev-&gt;fops-&gt;mmap(filp, vm);</div><div class='del'>-	if (vdev-&gt;lock)</div><div class='add'>+	if (test_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags))</div><div class='ctx'> 		mutex_unlock(vdev-&gt;lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -418,7 +429,8 @@ static int v4l2_open(struct inode *inode, struct file *filp)</div><div class='ctx'> 	video_get(vdev);</div><div class='ctx'> 	mutex_unlock(&amp;videodev_lock);</div><div class='ctx'> 	if (vdev-&gt;fops-&gt;open) {</div><div class='del'>-		if (vdev-&gt;lock &amp;&amp; mutex_lock_interruptible(vdev-&gt;lock)) {</div><div class='add'>+		if (test_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags) &amp;&amp;</div><div class='add'>+		    mutex_lock_interruptible(vdev-&gt;lock)) {</div><div class='ctx'> 			ret = -ERESTARTSYS;</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -426,7 +438,7 @@ static int v4l2_open(struct inode *inode, struct file *filp)</div><div class='ctx'> 			ret = vdev-&gt;fops-&gt;open(filp);</div><div class='ctx'> 		else</div><div class='ctx'> 			ret = -ENODEV;</div><div class='del'>-		if (vdev-&gt;lock)</div><div class='add'>+		if (test_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags))</div><div class='ctx'> 			mutex_unlock(vdev-&gt;lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -444,10 +456,10 @@ static int v4l2_release(struct inode *inode, struct file *filp)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (vdev-&gt;fops-&gt;release) {</div><div class='del'>-		if (vdev-&gt;lock)</div><div class='add'>+		if (test_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags))</div><div class='ctx'> 			mutex_lock(vdev-&gt;lock);</div><div class='ctx'> 		vdev-&gt;fops-&gt;release(filp);</div><div class='del'>-		if (vdev-&gt;lock)</div><div class='add'>+		if (test_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags))</div><div class='ctx'> 			mutex_unlock(vdev-&gt;lock);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* decrease the refcount unconditionally since the release()</div><div class='hunk'>@@ -508,6 +520,175 @@ static int get_index(struct video_device *vdev)</div><div class='ctx'> 	return find_first_zero_bit(used, VIDEO_NUM_DEVICES);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define SET_VALID_IOCTL(ops, cmd, op)			\</div><div class='add'>+	if (ops-&gt;op)					\</div><div class='add'>+		set_bit(_IOC_NR(cmd), valid_ioctls)</div><div class='add'>+</div><div class='add'>+/* This determines which ioctls are actually implemented in the driver.</div><div class='add'>+   It's a one-time thing which simplifies video_ioctl2 as it can just do</div><div class='add'>+   a bit test.</div><div class='add'>+</div><div class='add'>+   Note that drivers can override this by setting bits to 1 in</div><div class='add'>+   vdev-&gt;valid_ioctls. If an ioctl is marked as 1 when this function is</div><div class='add'>+   called, then that ioctl will actually be marked as unimplemented.</div><div class='add'>+</div><div class='add'>+   It does that by first setting up the local valid_ioctls bitmap, and</div><div class='add'>+   at the end do a:</div><div class='add'>+</div><div class='add'>+   vdev-&gt;valid_ioctls = valid_ioctls &amp; ~(vdev-&gt;valid_ioctls)</div><div class='add'>+ */</div><div class='add'>+static void determine_valid_ioctls(struct video_device *vdev)</div><div class='add'>+{</div><div class='add'>+	DECLARE_BITMAP(valid_ioctls, BASE_VIDIOC_PRIVATE);</div><div class='add'>+	const struct v4l2_ioctl_ops *ops = vdev-&gt;ioctl_ops;</div><div class='add'>+</div><div class='add'>+	bitmap_zero(valid_ioctls, BASE_VIDIOC_PRIVATE);</div><div class='add'>+</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_QUERYCAP, vidioc_querycap);</div><div class='add'>+	if (ops-&gt;vidioc_g_priority ||</div><div class='add'>+			test_bit(V4L2_FL_USE_FH_PRIO, &amp;vdev-&gt;flags))</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_G_PRIORITY), valid_ioctls);</div><div class='add'>+	if (ops-&gt;vidioc_s_priority ||</div><div class='add'>+			test_bit(V4L2_FL_USE_FH_PRIO, &amp;vdev-&gt;flags))</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_S_PRIORITY), valid_ioctls);</div><div class='add'>+	if (ops-&gt;vidioc_enum_fmt_vid_cap ||</div><div class='add'>+	    ops-&gt;vidioc_enum_fmt_vid_out ||</div><div class='add'>+	    ops-&gt;vidioc_enum_fmt_vid_cap_mplane ||</div><div class='add'>+	    ops-&gt;vidioc_enum_fmt_vid_out_mplane ||</div><div class='add'>+	    ops-&gt;vidioc_enum_fmt_vid_overlay ||</div><div class='add'>+	    ops-&gt;vidioc_enum_fmt_type_private)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_ENUM_FMT), valid_ioctls);</div><div class='add'>+	if (ops-&gt;vidioc_g_fmt_vid_cap ||</div><div class='add'>+	    ops-&gt;vidioc_g_fmt_vid_out ||</div><div class='add'>+	    ops-&gt;vidioc_g_fmt_vid_cap_mplane ||</div><div class='add'>+	    ops-&gt;vidioc_g_fmt_vid_out_mplane ||</div><div class='add'>+	    ops-&gt;vidioc_g_fmt_vid_overlay ||</div><div class='add'>+	    ops-&gt;vidioc_g_fmt_vbi_cap ||</div><div class='add'>+	    ops-&gt;vidioc_g_fmt_vid_out_overlay ||</div><div class='add'>+	    ops-&gt;vidioc_g_fmt_vbi_out ||</div><div class='add'>+	    ops-&gt;vidioc_g_fmt_sliced_vbi_cap ||</div><div class='add'>+	    ops-&gt;vidioc_g_fmt_sliced_vbi_out ||</div><div class='add'>+	    ops-&gt;vidioc_g_fmt_type_private)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_G_FMT), valid_ioctls);</div><div class='add'>+	if (ops-&gt;vidioc_s_fmt_vid_cap ||</div><div class='add'>+	    ops-&gt;vidioc_s_fmt_vid_out ||</div><div class='add'>+	    ops-&gt;vidioc_s_fmt_vid_cap_mplane ||</div><div class='add'>+	    ops-&gt;vidioc_s_fmt_vid_out_mplane ||</div><div class='add'>+	    ops-&gt;vidioc_s_fmt_vid_overlay ||</div><div class='add'>+	    ops-&gt;vidioc_s_fmt_vbi_cap ||</div><div class='add'>+	    ops-&gt;vidioc_s_fmt_vid_out_overlay ||</div><div class='add'>+	    ops-&gt;vidioc_s_fmt_vbi_out ||</div><div class='add'>+	    ops-&gt;vidioc_s_fmt_sliced_vbi_cap ||</div><div class='add'>+	    ops-&gt;vidioc_s_fmt_sliced_vbi_out ||</div><div class='add'>+	    ops-&gt;vidioc_s_fmt_type_private)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_S_FMT), valid_ioctls);</div><div class='add'>+	if (ops-&gt;vidioc_try_fmt_vid_cap ||</div><div class='add'>+	    ops-&gt;vidioc_try_fmt_vid_out ||</div><div class='add'>+	    ops-&gt;vidioc_try_fmt_vid_cap_mplane ||</div><div class='add'>+	    ops-&gt;vidioc_try_fmt_vid_out_mplane ||</div><div class='add'>+	    ops-&gt;vidioc_try_fmt_vid_overlay ||</div><div class='add'>+	    ops-&gt;vidioc_try_fmt_vbi_cap ||</div><div class='add'>+	    ops-&gt;vidioc_try_fmt_vid_out_overlay ||</div><div class='add'>+	    ops-&gt;vidioc_try_fmt_vbi_out ||</div><div class='add'>+	    ops-&gt;vidioc_try_fmt_sliced_vbi_cap ||</div><div class='add'>+	    ops-&gt;vidioc_try_fmt_sliced_vbi_out ||</div><div class='add'>+	    ops-&gt;vidioc_try_fmt_type_private)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_TRY_FMT), valid_ioctls);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_REQBUFS, vidioc_reqbufs);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_QUERYBUF, vidioc_querybuf);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_QBUF, vidioc_qbuf);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_DQBUF, vidioc_dqbuf);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_OVERLAY, vidioc_overlay);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_FBUF, vidioc_g_fbuf);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_FBUF, vidioc_s_fbuf);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_STREAMON, vidioc_streamon);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_STREAMOFF, vidioc_streamoff);</div><div class='add'>+	if (vdev-&gt;tvnorms)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_ENUMSTD), valid_ioctls);</div><div class='add'>+	if (ops-&gt;vidioc_g_std || vdev-&gt;current_norm)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_G_STD), valid_ioctls);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_STD, vidioc_s_std);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_QUERYSTD, vidioc_querystd);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_ENUMINPUT, vidioc_enum_input);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_INPUT, vidioc_g_input);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_INPUT, vidioc_s_input);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_ENUMOUTPUT, vidioc_enum_output);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_OUTPUT, vidioc_g_output);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_OUTPUT, vidioc_s_output);</div><div class='add'>+	/* Note: the control handler can also be passed through the filehandle,</div><div class='add'>+	   and that can't be tested here. If the bit for these control ioctls</div><div class='add'>+	   is set, then the ioctl is valid. But if it is 0, then it can still</div><div class='add'>+	   be valid if the filehandle passed the control handler. */</div><div class='add'>+	if (vdev-&gt;ctrl_handler || ops-&gt;vidioc_queryctrl)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_QUERYCTRL), valid_ioctls);</div><div class='add'>+	if (vdev-&gt;ctrl_handler || ops-&gt;vidioc_g_ctrl || ops-&gt;vidioc_g_ext_ctrls)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_G_CTRL), valid_ioctls);</div><div class='add'>+	if (vdev-&gt;ctrl_handler || ops-&gt;vidioc_s_ctrl || ops-&gt;vidioc_s_ext_ctrls)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_S_CTRL), valid_ioctls);</div><div class='add'>+	if (vdev-&gt;ctrl_handler || ops-&gt;vidioc_g_ext_ctrls)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_G_EXT_CTRLS), valid_ioctls);</div><div class='add'>+	if (vdev-&gt;ctrl_handler || ops-&gt;vidioc_s_ext_ctrls)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_S_EXT_CTRLS), valid_ioctls);</div><div class='add'>+	if (vdev-&gt;ctrl_handler || ops-&gt;vidioc_try_ext_ctrls)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_TRY_EXT_CTRLS), valid_ioctls);</div><div class='add'>+	if (vdev-&gt;ctrl_handler || ops-&gt;vidioc_querymenu)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_QUERYMENU), valid_ioctls);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_ENUMAUDIO, vidioc_enumaudio);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_AUDIO, vidioc_g_audio);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_AUDIO, vidioc_s_audio);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_ENUMAUDOUT, vidioc_enumaudout);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_AUDOUT, vidioc_g_audout);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_AUDOUT, vidioc_s_audout);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_MODULATOR, vidioc_g_modulator);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_MODULATOR, vidioc_s_modulator);</div><div class='add'>+	if (ops-&gt;vidioc_g_crop || ops-&gt;vidioc_g_selection)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_G_CROP), valid_ioctls);</div><div class='add'>+	if (ops-&gt;vidioc_s_crop || ops-&gt;vidioc_s_selection)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_S_CROP), valid_ioctls);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_SELECTION, vidioc_g_selection);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_SELECTION, vidioc_s_selection);</div><div class='add'>+	if (ops-&gt;vidioc_cropcap || ops-&gt;vidioc_g_selection)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_CROPCAP), valid_ioctls);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_JPEGCOMP, vidioc_g_jpegcomp);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_JPEGCOMP, vidioc_s_jpegcomp);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_ENC_INDEX, vidioc_g_enc_index);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_ENCODER_CMD, vidioc_encoder_cmd);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_TRY_ENCODER_CMD, vidioc_try_encoder_cmd);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_DECODER_CMD, vidioc_decoder_cmd);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_TRY_DECODER_CMD, vidioc_try_decoder_cmd);</div><div class='add'>+	if (ops-&gt;vidioc_g_parm || vdev-&gt;current_norm)</div><div class='add'>+		set_bit(_IOC_NR(VIDIOC_G_PARM), valid_ioctls);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_PARM, vidioc_s_parm);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_TUNER, vidioc_g_tuner);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_TUNER, vidioc_s_tuner);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_FREQUENCY, vidioc_g_frequency);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_FREQUENCY, vidioc_s_frequency);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_SLICED_VBI_CAP, vidioc_g_sliced_vbi_cap);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_LOG_STATUS, vidioc_log_status);</div><div class='add'>+#ifdef CONFIG_VIDEO_ADV_DEBUG</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_DBG_G_REGISTER, vidioc_g_register);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_DBG_S_REGISTER, vidioc_s_register);</div><div class='add'>+#endif</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_DBG_G_CHIP_IDENT, vidioc_g_chip_ident);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_HW_FREQ_SEEK, vidioc_s_hw_freq_seek);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_ENUM_FRAMESIZES, vidioc_enum_framesizes);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_ENUM_FRAMEINTERVALS, vidioc_enum_frameintervals);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_ENUM_DV_PRESETS, vidioc_enum_dv_presets);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_DV_PRESET, vidioc_s_dv_preset);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_DV_PRESET, vidioc_g_dv_preset);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_QUERY_DV_PRESET, vidioc_query_dv_preset);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_S_DV_TIMINGS, vidioc_s_dv_timings);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_G_DV_TIMINGS, vidioc_g_dv_timings);</div><div class='add'>+	/* yes, really vidioc_subscribe_event */</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_DQEVENT, vidioc_subscribe_event);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_SUBSCRIBE_EVENT, vidioc_subscribe_event);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_UNSUBSCRIBE_EVENT, vidioc_unsubscribe_event);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_CREATE_BUFS, vidioc_create_bufs);</div><div class='add'>+	SET_VALID_IOCTL(ops, VIDIOC_PREPARE_BUF, vidioc_prepare_buf);</div><div class='add'>+	bitmap_andnot(vdev-&gt;valid_ioctls, valid_ioctls, vdev-&gt;valid_ioctls,</div><div class='add'>+			BASE_VIDIOC_PRIVATE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *	__video_register_device - register video4linux devices</div><div class='ctx'>  *	@vdev: video device structure we want to register</div><div class='hunk'>@@ -654,6 +835,13 @@ int __video_register_device(struct video_device *vdev, int type, int nr,</div><div class='ctx'> 	WARN_ON(video_device[vdev-&gt;minor] != NULL);</div><div class='ctx'> 	vdev-&gt;index = get_index(vdev);</div><div class='ctx'> 	mutex_unlock(&amp;videodev_lock);</div><div class='add'>+	/* if no lock was passed, then make sure the LOCK_ALL_FOPS bit is</div><div class='add'>+	   clear and warn if it wasn't. */</div><div class='add'>+	if (vdev-&gt;lock == NULL)</div><div class='add'>+		WARN_ON(test_and_clear_bit(V4L2_FL_LOCK_ALL_FOPS, &amp;vdev-&gt;flags));</div><div class='add'>+</div><div class='add'>+	if (vdev-&gt;ioctl_ops)</div><div class='add'>+		determine_valid_ioctls(vdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Part 3: Initialize the character device */</div><div class='ctx'> 	vdev-&gt;cdev = cdev_alloc();</div><div class='head'>diff --git a/drivers/media/video/v4l2-event.c b/drivers/media/video/v4l2-event.c<br/>index c26ad9637143..ef2a33c94045 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/v4l2-event.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/v4l2-event.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/v4l2-event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/v4l2-event.c</a></div><div class='hunk'>@@ -25,7 +25,6 @@</div><div class='ctx'> #include &lt;media/v4l2-dev.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-fh.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-event.h&gt;</div><div class='del'>-#include &lt;media/v4l2-ctrls.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -120,6 +119,14 @@ static void __v4l2_event_queue_fh(struct v4l2_fh *fh, const struct v4l2_event *e</div><div class='ctx'> 	if (sev == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If the event has been added to the fh-&gt;subscribed list, but its</div><div class='add'>+	 * add op has not completed yet elems will be 0, treat this as</div><div class='add'>+	 * not being subscribed.</div><div class='add'>+	 */</div><div class='add'>+	if (!sev-&gt;elems)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	/* Increase event sequence number on fh. */</div><div class='ctx'> 	fh-&gt;sequence++;</div><div class='ctx'> </div><div class='hunk'>@@ -132,14 +139,14 @@ static void __v4l2_event_queue_fh(struct v4l2_fh *fh, const struct v4l2_event *e</div><div class='ctx'> 		sev-&gt;first = sev_pos(sev, 1);</div><div class='ctx'> 		fh-&gt;navailable--;</div><div class='ctx'> 		if (sev-&gt;elems == 1) {</div><div class='del'>-			if (sev-&gt;replace) {</div><div class='del'>-				sev-&gt;replace(&amp;kev-&gt;event, ev);</div><div class='add'>+			if (sev-&gt;ops &amp;&amp; sev-&gt;ops-&gt;replace) {</div><div class='add'>+				sev-&gt;ops-&gt;replace(&amp;kev-&gt;event, ev);</div><div class='ctx'> 				copy_payload = false;</div><div class='ctx'> 			}</div><div class='del'>-		} else if (sev-&gt;merge) {</div><div class='add'>+		} else if (sev-&gt;ops &amp;&amp; sev-&gt;ops-&gt;merge) {</div><div class='ctx'> 			struct v4l2_kevent *second_oldest =</div><div class='ctx'> 				sev-&gt;events + sev_pos(sev, 0);</div><div class='del'>-			sev-&gt;merge(&amp;kev-&gt;event, &amp;second_oldest-&gt;event);</div><div class='add'>+			sev-&gt;ops-&gt;merge(&amp;kev-&gt;event, &amp;second_oldest-&gt;event);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -195,24 +202,11 @@ int v4l2_event_pending(struct v4l2_fh *fh)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(v4l2_event_pending);</div><div class='ctx'> </div><div class='del'>-static void ctrls_replace(struct v4l2_event *old, const struct v4l2_event *new)</div><div class='del'>-{</div><div class='del'>-	u32 old_changes = old-&gt;u.ctrl.changes;</div><div class='del'>-</div><div class='del'>-	old-&gt;u.ctrl = new-&gt;u.ctrl;</div><div class='del'>-	old-&gt;u.ctrl.changes |= old_changes;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ctrls_merge(const struct v4l2_event *old, struct v4l2_event *new)</div><div class='del'>-{</div><div class='del'>-	new-&gt;u.ctrl.changes |= old-&gt;u.ctrl.changes;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int v4l2_event_subscribe(struct v4l2_fh *fh,</div><div class='del'>-			 struct v4l2_event_subscription *sub, unsigned elems)</div><div class='add'>+			 struct v4l2_event_subscription *sub, unsigned elems,</div><div class='add'>+			 const struct v4l2_subscribed_event_ops *ops)</div><div class='ctx'> {</div><div class='ctx'> 	struct v4l2_subscribed_event *sev, *found_ev;</div><div class='del'>-	struct v4l2_ctrl *ctrl = NULL;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	unsigned i;</div><div class='ctx'> </div><div class='hunk'>@@ -221,11 +215,6 @@ int v4l2_event_subscribe(struct v4l2_fh *fh,</div><div class='ctx'> </div><div class='ctx'> 	if (elems &lt; 1)</div><div class='ctx'> 		elems = 1;</div><div class='del'>-	if (sub-&gt;type == V4L2_EVENT_CTRL) {</div><div class='del'>-		ctrl = v4l2_ctrl_find(fh-&gt;ctrl_handler, sub-&gt;id);</div><div class='del'>-		if (ctrl == NULL)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	sev = kzalloc(sizeof(*sev) + sizeof(struct v4l2_kevent) * elems, GFP_KERNEL);</div><div class='ctx'> 	if (!sev)</div><div class='hunk'>@@ -236,11 +225,7 @@ int v4l2_event_subscribe(struct v4l2_fh *fh,</div><div class='ctx'> 	sev-&gt;id = sub-&gt;id;</div><div class='ctx'> 	sev-&gt;flags = sub-&gt;flags;</div><div class='ctx'> 	sev-&gt;fh = fh;</div><div class='del'>-	sev-&gt;elems = elems;</div><div class='del'>-	if (ctrl) {</div><div class='del'>-		sev-&gt;replace = ctrls_replace;</div><div class='del'>-		sev-&gt;merge = ctrls_merge;</div><div class='del'>-	}</div><div class='add'>+	sev-&gt;ops = ops;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;fh-&gt;vdev-&gt;fh_lock, flags);</div><div class='ctx'> 	found_ev = v4l2_event_subscribed(fh, sub-&gt;type, sub-&gt;id);</div><div class='hunk'>@@ -248,11 +233,22 @@ int v4l2_event_subscribe(struct v4l2_fh *fh,</div><div class='ctx'> 		list_add(&amp;sev-&gt;list, &amp;fh-&gt;subscribed);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;fh-&gt;vdev-&gt;fh_lock, flags);</div><div class='ctx'> </div><div class='del'>-	/* v4l2_ctrl_add_event uses a mutex, so do this outside the spin lock */</div><div class='del'>-	if (found_ev)</div><div class='add'>+	if (found_ev) {</div><div class='ctx'> 		kfree(sev);</div><div class='del'>-	else if (ctrl)</div><div class='del'>-		v4l2_ctrl_add_event(ctrl, sev);</div><div class='add'>+		return 0; /* Already listening */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sev-&gt;ops &amp;&amp; sev-&gt;ops-&gt;add) {</div><div class='add'>+		int ret = sev-&gt;ops-&gt;add(sev, elems);</div><div class='add'>+		if (ret) {</div><div class='add'>+			sev-&gt;ops = NULL;</div><div class='add'>+			v4l2_event_unsubscribe(fh, sub);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Mark as ready for use */</div><div class='add'>+	sev-&gt;elems = elems;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -306,12 +302,9 @@ int v4l2_event_unsubscribe(struct v4l2_fh *fh,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;fh-&gt;vdev-&gt;fh_lock, flags);</div><div class='del'>-	if (sev &amp;&amp; sev-&gt;type == V4L2_EVENT_CTRL) {</div><div class='del'>-		struct v4l2_ctrl *ctrl = v4l2_ctrl_find(fh-&gt;ctrl_handler, sev-&gt;id);</div><div class='ctx'> </div><div class='del'>-		if (ctrl)</div><div class='del'>-			v4l2_ctrl_del_event(ctrl, sev);</div><div class='del'>-	}</div><div class='add'>+	if (sev &amp;&amp; sev-&gt;ops &amp;&amp; sev-&gt;ops-&gt;del)</div><div class='add'>+		sev-&gt;ops-&gt;del(sev);</div><div class='ctx'> </div><div class='ctx'> 	kfree(sev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/media/video/v4l2-ioctl.c b/drivers/media/video/v4l2-ioctl.c<br/>index 5b2ec1fd2d0a..91be4e871f43 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/v4l2-ioctl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/v4l2-ioctl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/v4l2-ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/v4l2-ioctl.c</a></div><div class='hunk'>@@ -55,19 +55,6 @@</div><div class='ctx'> 	memset((u8 *)(p) + offsetof(typeof(*(p)), field) + sizeof((p)-&gt;field), \</div><div class='ctx'> 	0, sizeof(*(p)) - offsetof(typeof(*(p)), field) - sizeof((p)-&gt;field))</div><div class='ctx'> </div><div class='del'>-#define have_fmt_ops(foo) (						\</div><div class='del'>-	ops-&gt;vidioc_##foo##_fmt_vid_cap ||				\</div><div class='del'>-	ops-&gt;vidioc_##foo##_fmt_vid_out ||				\</div><div class='del'>-	ops-&gt;vidioc_##foo##_fmt_vid_cap_mplane ||			\</div><div class='del'>-	ops-&gt;vidioc_##foo##_fmt_vid_out_mplane ||			\</div><div class='del'>-	ops-&gt;vidioc_##foo##_fmt_vid_overlay ||				\</div><div class='del'>-	ops-&gt;vidioc_##foo##_fmt_vbi_cap ||				\</div><div class='del'>-	ops-&gt;vidioc_##foo##_fmt_vid_out_overlay ||			\</div><div class='del'>-	ops-&gt;vidioc_##foo##_fmt_vbi_out ||				\</div><div class='del'>-	ops-&gt;vidioc_##foo##_fmt_sliced_vbi_cap ||			\</div><div class='del'>-	ops-&gt;vidioc_##foo##_fmt_sliced_vbi_out ||			\</div><div class='del'>-	ops-&gt;vidioc_##foo##_fmt_type_private)</div><div class='del'>-</div><div class='ctx'> struct std_descr {</div><div class='ctx'> 	v4l2_std_id std;</div><div class='ctx'> 	const char *descr;</div><div class='hunk'>@@ -195,93 +182,118 @@ static const char *v4l2_memory_names[] = {</div><div class='ctx'> </div><div class='ctx'> /* ------------------------------------------------------------------ */</div><div class='ctx'> /* debug help functions                                               */</div><div class='del'>-static const char *v4l2_ioctls[] = {</div><div class='del'>-	[_IOC_NR(VIDIOC_QUERYCAP)]         = "VIDIOC_QUERYCAP",</div><div class='del'>-	[_IOC_NR(VIDIOC_RESERVED)]         = "VIDIOC_RESERVED",</div><div class='del'>-	[_IOC_NR(VIDIOC_ENUM_FMT)]         = "VIDIOC_ENUM_FMT",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_FMT)]            = "VIDIOC_G_FMT",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_FMT)]            = "VIDIOC_S_FMT",</div><div class='del'>-	[_IOC_NR(VIDIOC_REQBUFS)]          = "VIDIOC_REQBUFS",</div><div class='del'>-	[_IOC_NR(VIDIOC_QUERYBUF)]         = "VIDIOC_QUERYBUF",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_FBUF)]           = "VIDIOC_G_FBUF",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_FBUF)]           = "VIDIOC_S_FBUF",</div><div class='del'>-	[_IOC_NR(VIDIOC_OVERLAY)]          = "VIDIOC_OVERLAY",</div><div class='del'>-	[_IOC_NR(VIDIOC_QBUF)]             = "VIDIOC_QBUF",</div><div class='del'>-	[_IOC_NR(VIDIOC_DQBUF)]            = "VIDIOC_DQBUF",</div><div class='del'>-	[_IOC_NR(VIDIOC_STREAMON)]         = "VIDIOC_STREAMON",</div><div class='del'>-	[_IOC_NR(VIDIOC_STREAMOFF)]        = "VIDIOC_STREAMOFF",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_PARM)]           = "VIDIOC_G_PARM",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_PARM)]           = "VIDIOC_S_PARM",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_STD)]            = "VIDIOC_G_STD",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_STD)]            = "VIDIOC_S_STD",</div><div class='del'>-	[_IOC_NR(VIDIOC_ENUMSTD)]          = "VIDIOC_ENUMSTD",</div><div class='del'>-	[_IOC_NR(VIDIOC_ENUMINPUT)]        = "VIDIOC_ENUMINPUT",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_CTRL)]           = "VIDIOC_G_CTRL",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_CTRL)]           = "VIDIOC_S_CTRL",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_TUNER)]          = "VIDIOC_G_TUNER",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_TUNER)]          = "VIDIOC_S_TUNER",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_AUDIO)]          = "VIDIOC_G_AUDIO",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_AUDIO)]          = "VIDIOC_S_AUDIO",</div><div class='del'>-	[_IOC_NR(VIDIOC_QUERYCTRL)]        = "VIDIOC_QUERYCTRL",</div><div class='del'>-	[_IOC_NR(VIDIOC_QUERYMENU)]        = "VIDIOC_QUERYMENU",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_INPUT)]          = "VIDIOC_G_INPUT",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_INPUT)]          = "VIDIOC_S_INPUT",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_OUTPUT)]         = "VIDIOC_G_OUTPUT",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_OUTPUT)]         = "VIDIOC_S_OUTPUT",</div><div class='del'>-	[_IOC_NR(VIDIOC_ENUMOUTPUT)]       = "VIDIOC_ENUMOUTPUT",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_AUDOUT)]         = "VIDIOC_G_AUDOUT",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_AUDOUT)]         = "VIDIOC_S_AUDOUT",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_MODULATOR)]      = "VIDIOC_G_MODULATOR",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_MODULATOR)]      = "VIDIOC_S_MODULATOR",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_FREQUENCY)]      = "VIDIOC_G_FREQUENCY",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_FREQUENCY)]      = "VIDIOC_S_FREQUENCY",</div><div class='del'>-	[_IOC_NR(VIDIOC_CROPCAP)]          = "VIDIOC_CROPCAP",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_CROP)]           = "VIDIOC_G_CROP",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_CROP)]           = "VIDIOC_S_CROP",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_SELECTION)]      = "VIDIOC_G_SELECTION",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_SELECTION)]      = "VIDIOC_S_SELECTION",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_JPEGCOMP)]       = "VIDIOC_G_JPEGCOMP",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_JPEGCOMP)]       = "VIDIOC_S_JPEGCOMP",</div><div class='del'>-	[_IOC_NR(VIDIOC_QUERYSTD)]         = "VIDIOC_QUERYSTD",</div><div class='del'>-	[_IOC_NR(VIDIOC_TRY_FMT)]          = "VIDIOC_TRY_FMT",</div><div class='del'>-	[_IOC_NR(VIDIOC_ENUMAUDIO)]        = "VIDIOC_ENUMAUDIO",</div><div class='del'>-	[_IOC_NR(VIDIOC_ENUMAUDOUT)]       = "VIDIOC_ENUMAUDOUT",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_PRIORITY)]       = "VIDIOC_G_PRIORITY",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_PRIORITY)]       = "VIDIOC_S_PRIORITY",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_SLICED_VBI_CAP)] = "VIDIOC_G_SLICED_VBI_CAP",</div><div class='del'>-	[_IOC_NR(VIDIOC_LOG_STATUS)]       = "VIDIOC_LOG_STATUS",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_EXT_CTRLS)]      = "VIDIOC_G_EXT_CTRLS",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_EXT_CTRLS)]      = "VIDIOC_S_EXT_CTRLS",</div><div class='del'>-	[_IOC_NR(VIDIOC_TRY_EXT_CTRLS)]    = "VIDIOC_TRY_EXT_CTRLS",</div><div class='del'>-#if 1</div><div class='del'>-	[_IOC_NR(VIDIOC_ENUM_FRAMESIZES)]  = "VIDIOC_ENUM_FRAMESIZES",</div><div class='del'>-	[_IOC_NR(VIDIOC_ENUM_FRAMEINTERVALS)] = "VIDIOC_ENUM_FRAMEINTERVALS",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_ENC_INDEX)] 	   = "VIDIOC_G_ENC_INDEX",</div><div class='del'>-	[_IOC_NR(VIDIOC_ENCODER_CMD)] 	   = "VIDIOC_ENCODER_CMD",</div><div class='del'>-	[_IOC_NR(VIDIOC_TRY_ENCODER_CMD)]  = "VIDIOC_TRY_ENCODER_CMD",</div><div class='del'>-</div><div class='del'>-	[_IOC_NR(VIDIOC_DECODER_CMD)]	   = "VIDIOC_DECODER_CMD",</div><div class='del'>-	[_IOC_NR(VIDIOC_TRY_DECODER_CMD)]  = "VIDIOC_TRY_DECODER_CMD",</div><div class='del'>-	[_IOC_NR(VIDIOC_DBG_S_REGISTER)]   = "VIDIOC_DBG_S_REGISTER",</div><div class='del'>-	[_IOC_NR(VIDIOC_DBG_G_REGISTER)]   = "VIDIOC_DBG_G_REGISTER",</div><div class='del'>-</div><div class='del'>-	[_IOC_NR(VIDIOC_DBG_G_CHIP_IDENT)] = "VIDIOC_DBG_G_CHIP_IDENT",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_HW_FREQ_SEEK)]   = "VIDIOC_S_HW_FREQ_SEEK",</div><div class='add'>+</div><div class='add'>+struct v4l2_ioctl_info {</div><div class='add'>+	unsigned int ioctl;</div><div class='add'>+	u16 flags;</div><div class='add'>+	const char * const name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This control needs a priority check */</div><div class='add'>+#define INFO_FL_PRIO	(1 &lt;&lt; 0)</div><div class='add'>+/* This control can be valid if the filehandle passes a control handler. */</div><div class='add'>+#define INFO_FL_CTRL	(1 &lt;&lt; 1)</div><div class='add'>+</div><div class='add'>+#define IOCTL_INFO(_ioctl, _flags) [_IOC_NR(_ioctl)] = {	\</div><div class='add'>+	.ioctl = _ioctl,					\</div><div class='add'>+	.flags = _flags,					\</div><div class='add'>+	.name = #_ioctl,					\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct v4l2_ioctl_info v4l2_ioctls[] = {</div><div class='add'>+	IOCTL_INFO(VIDIOC_QUERYCAP, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_ENUM_FMT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_FMT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_FMT, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_REQBUFS, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_QUERYBUF, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_FBUF, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_FBUF, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_OVERLAY, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_QBUF, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_DQBUF, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_STREAMON, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_STREAMOFF, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_PARM, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_PARM, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_STD, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_STD, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_ENUMSTD, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_ENUMINPUT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_CTRL, INFO_FL_CTRL),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_CTRL, INFO_FL_PRIO | INFO_FL_CTRL),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_TUNER, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_TUNER, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_AUDIO, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_AUDIO, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_QUERYCTRL, INFO_FL_CTRL),</div><div class='add'>+	IOCTL_INFO(VIDIOC_QUERYMENU, INFO_FL_CTRL),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_INPUT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_INPUT, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_OUTPUT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_OUTPUT, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_ENUMOUTPUT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_AUDOUT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_AUDOUT, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_MODULATOR, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_MODULATOR, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_FREQUENCY, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_FREQUENCY, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_CROPCAP, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_CROP, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_CROP, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_SELECTION, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_SELECTION, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_JPEGCOMP, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_JPEGCOMP, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_QUERYSTD, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_TRY_FMT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_ENUMAUDIO, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_ENUMAUDOUT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_PRIORITY, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_PRIORITY, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_SLICED_VBI_CAP, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_LOG_STATUS, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_EXT_CTRLS, INFO_FL_CTRL),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_EXT_CTRLS, INFO_FL_PRIO | INFO_FL_CTRL),</div><div class='add'>+	IOCTL_INFO(VIDIOC_TRY_EXT_CTRLS, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_ENUM_FRAMESIZES, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_ENUM_FRAMEINTERVALS, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_ENC_INDEX, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_ENCODER_CMD, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_TRY_ENCODER_CMD, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_DECODER_CMD, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_TRY_DECODER_CMD, 0),</div><div class='add'>+#ifdef CONFIG_VIDEO_ADV_DEBUG</div><div class='add'>+	IOCTL_INFO(VIDIOC_DBG_S_REGISTER, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_DBG_G_REGISTER, 0),</div><div class='ctx'> #endif</div><div class='del'>-	[_IOC_NR(VIDIOC_ENUM_DV_PRESETS)]  = "VIDIOC_ENUM_DV_PRESETS",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_DV_PRESET)]	   = "VIDIOC_S_DV_PRESET",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_DV_PRESET)]	   = "VIDIOC_G_DV_PRESET",</div><div class='del'>-	[_IOC_NR(VIDIOC_QUERY_DV_PRESET)]  = "VIDIOC_QUERY_DV_PRESET",</div><div class='del'>-	[_IOC_NR(VIDIOC_S_DV_TIMINGS)]     = "VIDIOC_S_DV_TIMINGS",</div><div class='del'>-	[_IOC_NR(VIDIOC_G_DV_TIMINGS)]     = "VIDIOC_G_DV_TIMINGS",</div><div class='del'>-	[_IOC_NR(VIDIOC_DQEVENT)]	   = "VIDIOC_DQEVENT",</div><div class='del'>-	[_IOC_NR(VIDIOC_SUBSCRIBE_EVENT)]  = "VIDIOC_SUBSCRIBE_EVENT",</div><div class='del'>-	[_IOC_NR(VIDIOC_UNSUBSCRIBE_EVENT)] = "VIDIOC_UNSUBSCRIBE_EVENT",</div><div class='del'>-	[_IOC_NR(VIDIOC_CREATE_BUFS)]      = "VIDIOC_CREATE_BUFS",</div><div class='del'>-	[_IOC_NR(VIDIOC_PREPARE_BUF)]      = "VIDIOC_PREPARE_BUF",</div><div class='add'>+	IOCTL_INFO(VIDIOC_DBG_G_CHIP_IDENT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_HW_FREQ_SEEK, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_ENUM_DV_PRESETS, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_DV_PRESET, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_DV_PRESET, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_QUERY_DV_PRESET, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_S_DV_TIMINGS, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_G_DV_TIMINGS, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_DQEVENT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_SUBSCRIBE_EVENT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_UNSUBSCRIBE_EVENT, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_CREATE_BUFS, INFO_FL_PRIO),</div><div class='add'>+	IOCTL_INFO(VIDIOC_PREPARE_BUF, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_ENUM_DV_TIMINGS, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_QUERY_DV_TIMINGS, 0),</div><div class='add'>+	IOCTL_INFO(VIDIOC_DV_TIMINGS_CAP, 0),</div><div class='ctx'> };</div><div class='ctx'> #define V4L2_IOCTLS ARRAY_SIZE(v4l2_ioctls)</div><div class='ctx'> </div><div class='add'>+bool v4l2_is_known_ioctl(unsigned int cmd)</div><div class='add'>+{</div><div class='add'>+	if (_IOC_NR(cmd) &gt;= V4L2_IOCTLS)</div><div class='add'>+		return false;</div><div class='add'>+	return v4l2_ioctls[_IOC_NR(cmd)].ioctl == cmd;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Common ioctl debug function. This function can be used by</div><div class='ctx'>    external ioctl messages as well as internal V4L ioctl */</div><div class='ctx'> void v4l_printk_ioctl(unsigned int cmd)</div><div class='hunk'>@@ -297,7 +309,7 @@ void v4l_printk_ioctl(unsigned int cmd)</div><div class='ctx'> 			type = "v4l2";</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		printk("%s", v4l2_ioctls[_IOC_NR(cmd)]);</div><div class='add'>+		printk("%s", v4l2_ioctls[_IOC_NR(cmd)].name);</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='ctx'> 		type = "unknown";</div><div class='hunk'>@@ -359,6 +371,34 @@ static inline void dbgrect(struct video_device *vfd, char *s,</div><div class='ctx'> 						r-&gt;width, r-&gt;height);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void dbgtimings(struct video_device *vfd,</div><div class='add'>+			const struct v4l2_dv_timings *p)</div><div class='add'>+{</div><div class='add'>+	switch (p-&gt;type) {</div><div class='add'>+	case V4L2_DV_BT_656_1120:</div><div class='add'>+		dbgarg2("bt-656/1120:interlaced=%d,"</div><div class='add'>+				" pixelclock=%lld,"</div><div class='add'>+				" width=%d, height=%d, polarities=%x,"</div><div class='add'>+				" hfrontporch=%d, hsync=%d,"</div><div class='add'>+				" hbackporch=%d, vfrontporch=%d,"</div><div class='add'>+				" vsync=%d, vbackporch=%d,"</div><div class='add'>+				" il_vfrontporch=%d, il_vsync=%d,"</div><div class='add'>+				" il_vbackporch=%d, standards=%x, flags=%x\n",</div><div class='add'>+				p-&gt;bt.interlaced, p-&gt;bt.pixelclock,</div><div class='add'>+				p-&gt;bt.width, p-&gt;bt.height,</div><div class='add'>+				p-&gt;bt.polarities, p-&gt;bt.hfrontporch,</div><div class='add'>+				p-&gt;bt.hsync, p-&gt;bt.hbackporch,</div><div class='add'>+				p-&gt;bt.vfrontporch, p-&gt;bt.vsync,</div><div class='add'>+				p-&gt;bt.vbackporch, p-&gt;bt.il_vfrontporch,</div><div class='add'>+				p-&gt;bt.il_vsync, p-&gt;bt.il_vbackporch,</div><div class='add'>+				p-&gt;bt.standards, p-&gt;bt.flags);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dbgarg2("Unknown type %d!\n", p-&gt;type);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void v4l_print_pix_fmt(struct video_device *vfd,</div><div class='ctx'> 						struct v4l2_pix_format *fmt)</div><div class='ctx'> {</div><div class='hunk'>@@ -504,7 +544,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	void *fh = file-&gt;private_data;</div><div class='ctx'> 	struct v4l2_fh *vfh = NULL;</div><div class='ctx'> 	int use_fh_prio = 0;</div><div class='del'>-	long ret_prio = 0;</div><div class='ctx'> 	long ret = -ENOTTY;</div><div class='ctx'> </div><div class='ctx'> 	if (ops == NULL) {</div><div class='hunk'>@@ -513,19 +552,30 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((vfd-&gt;debug &amp; V4L2_DEBUG_IOCTL) &amp;&amp;</div><div class='del'>-				!(vfd-&gt;debug &amp; V4L2_DEBUG_IOCTL_ARG)) {</div><div class='del'>-		v4l_print_ioctl(vfd-&gt;name, cmd);</div><div class='del'>-		printk(KERN_CONT "\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (test_bit(V4L2_FL_USES_V4L2_FH, &amp;vfd-&gt;flags)) {</div><div class='ctx'> 		vfh = file-&gt;private_data;</div><div class='ctx'> 		use_fh_prio = test_bit(V4L2_FL_USE_FH_PRIO, &amp;vfd-&gt;flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (use_fh_prio)</div><div class='del'>-		ret_prio = v4l2_prio_check(vfd-&gt;prio, vfh-&gt;prio);</div><div class='add'>+	if (v4l2_is_known_ioctl(cmd)) {</div><div class='add'>+		struct v4l2_ioctl_info *info = &amp;v4l2_ioctls[_IOC_NR(cmd)];</div><div class='add'>+</div><div class='add'>+	        if (!test_bit(_IOC_NR(cmd), vfd-&gt;valid_ioctls) &amp;&amp;</div><div class='add'>+		    !((info-&gt;flags &amp; INFO_FL_CTRL) &amp;&amp; vfh &amp;&amp; vfh-&gt;ctrl_handler))</div><div class='add'>+			return -ENOTTY;</div><div class='add'>+</div><div class='add'>+		if (use_fh_prio &amp;&amp; (info-&gt;flags &amp; INFO_FL_PRIO)) {</div><div class='add'>+			ret = v4l2_prio_check(vfd-&gt;prio, vfh-&gt;prio);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((vfd-&gt;debug &amp; V4L2_DEBUG_IOCTL) &amp;&amp;</div><div class='add'>+				!(vfd-&gt;debug &amp; V4L2_DEBUG_IOCTL_ARG)) {</div><div class='add'>+		v4l_print_ioctl(vfd-&gt;name, cmd);</div><div class='add'>+		printk(KERN_CONT "\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> </div><div class='hunk'>@@ -534,9 +584,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_capability *cap = (struct v4l2_capability *)arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_querycap)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		cap-&gt;version = LINUX_VERSION_CODE;</div><div class='ctx'> 		ret = ops-&gt;vidioc_querycap(file, fh, cap);</div><div class='ctx'> 		if (!ret)</div><div class='hunk'>@@ -570,14 +617,11 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		enum v4l2_priority *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_priority &amp;&amp; !use_fh_prio)</div><div class='del'>-			break;</div><div class='ctx'> 		dbgarg(cmd, "setting priority to %d\n", *p);</div><div class='ctx'> 		if (ops-&gt;vidioc_s_priority)</div><div class='ctx'> 			ret = ops-&gt;vidioc_s_priority(file, fh, *p);</div><div class='ctx'> 		else</div><div class='del'>-			ret = ret_prio ? ret_prio :</div><div class='del'>-				v4l2_prio_change(&amp;vfd-&gt;v4l2_dev-&gt;prio,</div><div class='add'>+			ret = v4l2_prio_change(&amp;vfd-&gt;v4l2_dev-&gt;prio,</div><div class='ctx'> 							&amp;vfh-&gt;prio, *p);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -587,6 +631,7 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_fmtdesc *f = arg;</div><div class='ctx'> </div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		switch (f-&gt;type) {</div><div class='ctx'> 		case V4L2_BUF_TYPE_VIDEO_CAPTURE:</div><div class='ctx'> 			if (likely(ops-&gt;vidioc_enum_fmt_vid_cap))</div><div class='hunk'>@@ -619,7 +664,7 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		if (likely (!ret))</div><div class='add'>+		if (likely(!ret))</div><div class='ctx'> 			dbgarg(cmd, "index=%d, type=%d, flags=%d, "</div><div class='ctx'> 				"pixelformat=%c%c%c%c, description='%s'\n",</div><div class='ctx'> 				f-&gt;index, f-&gt;type, f-&gt;flags,</div><div class='hunk'>@@ -628,14 +673,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 				(f-&gt;pixelformat &gt;&gt; 16) &amp; 0xff,</div><div class='ctx'> 				(f-&gt;pixelformat &gt;&gt; 24) &amp; 0xff,</div><div class='ctx'> 				f-&gt;description);</div><div class='del'>-		else if (ret == -ENOTTY &amp;&amp;</div><div class='del'>-			 (ops-&gt;vidioc_enum_fmt_vid_cap ||</div><div class='del'>-			  ops-&gt;vidioc_enum_fmt_vid_out ||</div><div class='del'>-			  ops-&gt;vidioc_enum_fmt_vid_cap_mplane ||</div><div class='del'>-			  ops-&gt;vidioc_enum_fmt_vid_out_mplane ||</div><div class='del'>-			  ops-&gt;vidioc_enum_fmt_vid_overlay ||</div><div class='del'>-			  ops-&gt;vidioc_enum_fmt_type_private))</div><div class='del'>-			ret = -EINVAL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	case VIDIOC_G_FMT:</div><div class='hunk'>@@ -645,6 +682,7 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 		/* FIXME: Should be one dump per type */</div><div class='ctx'> 		dbgarg(cmd, "type=%s\n", prt_names(f-&gt;type, v4l2_type_names));</div><div class='ctx'> </div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		switch (f-&gt;type) {</div><div class='ctx'> 		case V4L2_BUF_TYPE_VIDEO_CAPTURE:</div><div class='ctx'> 			if (ops-&gt;vidioc_g_fmt_vid_cap)</div><div class='hunk'>@@ -706,21 +744,12 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 								fh, f);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		if (unlikely(ret == -ENOTTY &amp;&amp; have_fmt_ops(g)))</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	case VIDIOC_S_FMT:</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_format *f = (struct v4l2_format *)arg;</div><div class='ctx'> </div><div class='del'>-		if (!have_fmt_ops(s))</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		/* FIXME: Should be one dump per type */</div><div class='hunk'>@@ -804,6 +833,7 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 		/* FIXME: Should be one dump per type */</div><div class='ctx'> 		dbgarg(cmd, "type=%s\n", prt_names(f-&gt;type,</div><div class='ctx'> 						v4l2_type_names));</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		switch (f-&gt;type) {</div><div class='ctx'> 		case V4L2_BUF_TYPE_VIDEO_CAPTURE:</div><div class='ctx'> 			CLEAR_AFTER_FIELD(f, fmt.pix);</div><div class='hunk'>@@ -876,8 +906,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 								fh, f);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		if (unlikely(ret == -ENOTTY &amp;&amp; have_fmt_ops(try)))</div><div class='del'>-			ret = -EINVAL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* FIXME: Those buf reqs could be handled here,</div><div class='hunk'>@@ -888,12 +916,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_requestbuffers *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_reqbufs)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		ret = check_fmt(ops, p-&gt;type);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -912,8 +934,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_buffer *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_querybuf)</div><div class='del'>-			break;</div><div class='ctx'> 		ret = check_fmt(ops, p-&gt;type);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -927,8 +947,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_buffer *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_qbuf)</div><div class='del'>-			break;</div><div class='ctx'> 		ret = check_fmt(ops, p-&gt;type);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -942,8 +960,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_buffer *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_dqbuf)</div><div class='del'>-			break;</div><div class='ctx'> 		ret = check_fmt(ops, p-&gt;type);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -957,12 +973,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		int *i = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_overlay)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		dbgarg(cmd, "value=%d\n", *i);</div><div class='ctx'> 		ret = ops-&gt;vidioc_overlay(file, fh, *i);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -971,8 +981,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_framebuffer *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_fbuf)</div><div class='del'>-			break;</div><div class='ctx'> 		ret = ops-&gt;vidioc_g_fbuf(file, fh, arg);</div><div class='ctx'> 		if (!ret) {</div><div class='ctx'> 			dbgarg(cmd, "capability=0x%x, flags=%d, base=0x%08lx\n",</div><div class='hunk'>@@ -986,12 +994,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_framebuffer *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_fbuf)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		dbgarg(cmd, "capability=0x%x, flags=%d, base=0x%08lx\n",</div><div class='ctx'> 			p-&gt;capability, p-&gt;flags, (unsigned long)p-&gt;base);</div><div class='ctx'> 		v4l_print_pix_fmt(vfd, &amp;p-&gt;fmt);</div><div class='hunk'>@@ -1002,12 +1004,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		enum v4l2_buf_type i = *(int *)arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_streamon)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		dbgarg(cmd, "type=%s\n", prt_names(i, v4l2_type_names));</div><div class='ctx'> 		ret = ops-&gt;vidioc_streamon(file, fh, i);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1016,12 +1012,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		enum v4l2_buf_type i = *(int *)arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_streamoff)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		dbgarg(cmd, "type=%s\n", prt_names(i, v4l2_type_names));</div><div class='ctx'> 		ret = ops-&gt;vidioc_streamoff(file, fh, i);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1091,13 +1081,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> </div><div class='ctx'> 		dbgarg(cmd, "std=%08Lx\n", (long long unsigned)*id);</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_std)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		norm = (*id) &amp; vfd-&gt;tvnorms;</div><div class='ctx'> 		if (vfd-&gt;tvnorms &amp;&amp; !norm)	/* Check if std is supported */</div><div class='hunk'>@@ -1115,8 +1098,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		v4l2_std_id *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_querystd)</div><div class='del'>-			break;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If nothing detected, it should return all supported</div><div class='ctx'> 		 * Drivers just need to mask the std argument, in order</div><div class='hunk'>@@ -1150,9 +1131,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 		if (ops-&gt;vidioc_s_dv_timings)</div><div class='ctx'> 			p-&gt;capabilities |= V4L2_IN_CAP_CUSTOM_TIMINGS;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_enum_input)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		ret = ops-&gt;vidioc_enum_input(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "index=%d, name=%s, type=%d, "</div><div class='hunk'>@@ -1168,8 +1146,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		unsigned int *i = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_input)</div><div class='del'>-			break;</div><div class='ctx'> 		ret = ops-&gt;vidioc_g_input(file, fh, i);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "value=%d\n", *i);</div><div class='hunk'>@@ -1179,12 +1155,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		unsigned int *i = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_input)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		dbgarg(cmd, "value=%d\n", *i);</div><div class='ctx'> 		ret = ops-&gt;vidioc_s_input(file, fh, *i);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1195,9 +1165,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_output *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_enum_output)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * We set the flags for CAP_PRESETS, CAP_CUSTOM_TIMINGS &amp;</div><div class='ctx'> 		 * CAP_STD here based on ioctl handler provided by the</div><div class='hunk'>@@ -1224,8 +1191,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		unsigned int *i = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_output)</div><div class='del'>-			break;</div><div class='ctx'> 		ret = ops-&gt;vidioc_g_output(file, fh, i);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "value=%d\n", *i);</div><div class='hunk'>@@ -1235,12 +1200,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		unsigned int *i = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_output)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		dbgarg(cmd, "value=%d\n", *i);</div><div class='ctx'> 		ret = ops-&gt;vidioc_s_output(file, fh, *i);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1310,10 +1269,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 		if (!(vfh &amp;&amp; vfh-&gt;ctrl_handler) &amp;&amp; !vfd-&gt;ctrl_handler &amp;&amp;</div><div class='ctx'> 			!ops-&gt;vidioc_s_ctrl &amp;&amp; !ops-&gt;vidioc_s_ext_ctrls)</div><div class='ctx'> 			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		dbgarg(cmd, "id=0x%x, value=%d\n", p-&gt;id, p-&gt;value);</div><div class='ctx'> </div><div class='hunk'>@@ -1369,10 +1324,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 		if (!(vfh &amp;&amp; vfh-&gt;ctrl_handler) &amp;&amp; !vfd-&gt;ctrl_handler &amp;&amp;</div><div class='ctx'> 				!ops-&gt;vidioc_s_ext_ctrls)</div><div class='ctx'> 			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		v4l_print_ext_ctrls(cmd, vfd, p, 1);</div><div class='ctx'> 		if (vfh &amp;&amp; vfh-&gt;ctrl_handler)</div><div class='ctx'> 			ret = v4l2_s_ext_ctrls(vfh, vfh-&gt;ctrl_handler, p);</div><div class='hunk'>@@ -1428,8 +1379,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_audio *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_enumaudio)</div><div class='del'>-			break;</div><div class='ctx'> 		ret = ops-&gt;vidioc_enumaudio(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "index=%d, name=%s, capability=0x%x, "</div><div class='hunk'>@@ -1443,9 +1392,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_audio *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_audio)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		ret = ops-&gt;vidioc_g_audio(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "index=%d, name=%s, capability=0x%x, "</div><div class='hunk'>@@ -1459,12 +1405,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_audio *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_audio)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		dbgarg(cmd, "index=%d, name=%s, capability=0x%x, "</div><div class='ctx'> 					"mode=0x%x\n", p-&gt;index, p-&gt;name,</div><div class='ctx'> 					p-&gt;capability, p-&gt;mode);</div><div class='hunk'>@@ -1475,8 +1415,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_audioout *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_enumaudout)</div><div class='del'>-			break;</div><div class='ctx'> 		dbgarg(cmd, "Enum for index=%d\n", p-&gt;index);</div><div class='ctx'> 		ret = ops-&gt;vidioc_enumaudout(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='hunk'>@@ -1489,9 +1427,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_audioout *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_audout)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		ret = ops-&gt;vidioc_g_audout(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg2("index=%d, name=%s, capability=%d, "</div><div class='hunk'>@@ -1503,12 +1438,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_audioout *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_audout)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		dbgarg(cmd, "index=%d, name=%s, capability=%d, "</div><div class='ctx'> 					"mode=%d\n", p-&gt;index, p-&gt;name,</div><div class='ctx'> 					p-&gt;capability, p-&gt;mode);</div><div class='hunk'>@@ -1520,8 +1449,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_modulator *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_modulator)</div><div class='del'>-			break;</div><div class='ctx'> 		ret = ops-&gt;vidioc_g_modulator(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "index=%d, name=%s, "</div><div class='hunk'>@@ -1536,12 +1463,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_modulator *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_modulator)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		dbgarg(cmd, "index=%d, name=%s, capability=%d, "</div><div class='ctx'> 				"rangelow=%d, rangehigh=%d, txsubchans=%d\n",</div><div class='ctx'> 				p-&gt;index, p-&gt;name, p-&gt;capability, p-&gt;rangelow,</div><div class='hunk'>@@ -1553,9 +1474,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_crop *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_crop &amp;&amp; !ops-&gt;vidioc_g_selection)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		dbgarg(cmd, "type=%s\n", prt_names(p-&gt;type, v4l2_type_names));</div><div class='ctx'> </div><div class='ctx'> 		if (ops-&gt;vidioc_g_crop) {</div><div class='hunk'>@@ -1587,13 +1505,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_crop *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_crop &amp;&amp; !ops-&gt;vidioc_s_selection)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		dbgarg(cmd, "type=%s\n", prt_names(p-&gt;type, v4l2_type_names));</div><div class='ctx'> 		dbgrect(vfd, "", &amp;p-&gt;c);</div><div class='ctx'> </div><div class='hunk'>@@ -1620,9 +1531,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_selection *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_selection)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		dbgarg(cmd, "type=%s\n", prt_names(p-&gt;type, v4l2_type_names));</div><div class='ctx'> </div><div class='ctx'> 		ret = ops-&gt;vidioc_g_selection(file, fh, p);</div><div class='hunk'>@@ -1634,13 +1542,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_selection *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_selection)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		dbgarg(cmd, "type=%s\n", prt_names(p-&gt;type, v4l2_type_names));</div><div class='ctx'> 		dbgrect(vfd, "", &amp;p-&gt;r);</div><div class='hunk'>@@ -1653,9 +1554,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 		struct v4l2_cropcap *p = arg;</div><div class='ctx'> </div><div class='ctx'> 		/*FIXME: Should also show v4l2_fract pixelaspect */</div><div class='del'>-		if (!ops-&gt;vidioc_cropcap &amp;&amp; !ops-&gt;vidioc_g_selection)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		dbgarg(cmd, "type=%s\n", prt_names(p-&gt;type, v4l2_type_names));</div><div class='ctx'> 		if (ops-&gt;vidioc_cropcap) {</div><div class='ctx'> 			ret = ops-&gt;vidioc_cropcap(file, fh, p);</div><div class='hunk'>@@ -1699,9 +1597,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_jpegcompression *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_jpegcomp)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		ret = ops-&gt;vidioc_g_jpegcomp(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "quality=%d, APPn=%d, "</div><div class='hunk'>@@ -1715,12 +1610,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_jpegcompression *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_jpegcomp)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		dbgarg(cmd, "quality=%d, APPn=%d, APP_len=%d, "</div><div class='ctx'> 					"COM_len=%d, jpeg_markers=%d\n",</div><div class='ctx'> 					p-&gt;quality, p-&gt;APPn, p-&gt;APP_len,</div><div class='hunk'>@@ -1732,8 +1621,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_enc_idx *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_enc_index)</div><div class='del'>-			break;</div><div class='ctx'> 		ret = ops-&gt;vidioc_g_enc_index(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "entries=%d, entries_cap=%d\n",</div><div class='hunk'>@@ -1744,12 +1631,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_encoder_cmd *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_encoder_cmd)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		ret = ops-&gt;vidioc_encoder_cmd(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "cmd=%d, flags=%x\n", p-&gt;cmd, p-&gt;flags);</div><div class='hunk'>@@ -1759,8 +1640,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_encoder_cmd *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_try_encoder_cmd)</div><div class='del'>-			break;</div><div class='ctx'> 		ret = ops-&gt;vidioc_try_encoder_cmd(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "cmd=%d, flags=%x\n", p-&gt;cmd, p-&gt;flags);</div><div class='hunk'>@@ -1770,12 +1649,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_decoder_cmd *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_decoder_cmd)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		ret = ops-&gt;vidioc_decoder_cmd(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "cmd=%d, flags=%x\n", p-&gt;cmd, p-&gt;flags);</div><div class='hunk'>@@ -1785,8 +1658,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_decoder_cmd *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_try_decoder_cmd)</div><div class='del'>-			break;</div><div class='ctx'> 		ret = ops-&gt;vidioc_try_decoder_cmd(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "cmd=%d, flags=%x\n", p-&gt;cmd, p-&gt;flags);</div><div class='hunk'>@@ -1796,8 +1667,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_streamparm *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_parm &amp;&amp; !vfd-&gt;current_norm)</div><div class='del'>-			break;</div><div class='ctx'> 		if (ops-&gt;vidioc_g_parm) {</div><div class='ctx'> 			ret = check_fmt(ops, p-&gt;type);</div><div class='ctx'> 			if (ret)</div><div class='hunk'>@@ -1825,12 +1694,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_streamparm *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_parm)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		ret = check_fmt(ops, p-&gt;type);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1843,9 +1706,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_tuner *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_tuner)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		p-&gt;type = (vfd-&gt;vfl_type == VFL_TYPE_RADIO) ?</div><div class='ctx'> 			V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;</div><div class='ctx'> 		ret = ops-&gt;vidioc_g_tuner(file, fh, p);</div><div class='hunk'>@@ -1864,12 +1724,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_tuner *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_tuner)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		p-&gt;type = (vfd-&gt;vfl_type == VFL_TYPE_RADIO) ?</div><div class='ctx'> 			V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;</div><div class='ctx'> 		dbgarg(cmd, "index=%d, name=%s, type=%d, "</div><div class='hunk'>@@ -1887,9 +1741,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_frequency *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_frequency)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		p-&gt;type = (vfd-&gt;vfl_type == VFL_TYPE_RADIO) ?</div><div class='ctx'> 			V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;</div><div class='ctx'> 		ret = ops-&gt;vidioc_g_frequency(file, fh, p);</div><div class='hunk'>@@ -1903,12 +1754,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 		struct v4l2_frequency *p = arg;</div><div class='ctx'> 		enum v4l2_tuner_type type;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_frequency)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		type = (vfd-&gt;vfl_type == VFL_TYPE_RADIO) ?</div><div class='ctx'> 			V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;</div><div class='ctx'> 		dbgarg(cmd, "tuner=%d, type=%d, frequency=%d\n",</div><div class='hunk'>@@ -1923,9 +1768,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_sliced_vbi_cap *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_sliced_vbi_cap)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		/* Clear up to type, everything after type is zerod already */</div><div class='ctx'> 		memset(p, 0, offsetof(struct v4l2_sliced_vbi_cap, type));</div><div class='ctx'> </div><div class='hunk'>@@ -1937,8 +1779,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	}</div><div class='ctx'> 	case VIDIOC_LOG_STATUS:</div><div class='ctx'> 	{</div><div class='del'>-		if (!ops-&gt;vidioc_log_status)</div><div class='del'>-			break;</div><div class='ctx'> 		if (vfd-&gt;v4l2_dev)</div><div class='ctx'> 			pr_info("%s: =================  START STATUS  =================\n",</div><div class='ctx'> 				vfd-&gt;v4l2_dev-&gt;name);</div><div class='hunk'>@@ -1948,38 +1788,34 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 				vfd-&gt;v4l2_dev-&gt;name);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-#ifdef CONFIG_VIDEO_ADV_DEBUG</div><div class='ctx'> 	case VIDIOC_DBG_G_REGISTER:</div><div class='ctx'> 	{</div><div class='add'>+#ifdef CONFIG_VIDEO_ADV_DEBUG</div><div class='ctx'> 		struct v4l2_dbg_register *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (ops-&gt;vidioc_g_register) {</div><div class='del'>-			if (!capable(CAP_SYS_ADMIN))</div><div class='del'>-				ret = -EPERM;</div><div class='del'>-			else</div><div class='del'>-				ret = ops-&gt;vidioc_g_register(file, fh, p);</div><div class='del'>-		}</div><div class='add'>+		if (!capable(CAP_SYS_ADMIN))</div><div class='add'>+			ret = -EPERM;</div><div class='add'>+		else</div><div class='add'>+			ret = ops-&gt;vidioc_g_register(file, fh, p);</div><div class='add'>+#endif</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	case VIDIOC_DBG_S_REGISTER:</div><div class='ctx'> 	{</div><div class='add'>+#ifdef CONFIG_VIDEO_ADV_DEBUG</div><div class='ctx'> 		struct v4l2_dbg_register *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (ops-&gt;vidioc_s_register) {</div><div class='del'>-			if (!capable(CAP_SYS_ADMIN))</div><div class='del'>-				ret = -EPERM;</div><div class='del'>-			else</div><div class='del'>-				ret = ops-&gt;vidioc_s_register(file, fh, p);</div><div class='del'>-		}</div><div class='add'>+		if (!capable(CAP_SYS_ADMIN))</div><div class='add'>+			ret = -EPERM;</div><div class='add'>+		else</div><div class='add'>+			ret = ops-&gt;vidioc_s_register(file, fh, p);</div><div class='add'>+#endif</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> 	case VIDIOC_DBG_G_CHIP_IDENT:</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_dbg_chip_ident *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_chip_ident)</div><div class='del'>-			break;</div><div class='ctx'> 		p-&gt;ident = V4L2_IDENT_NONE;</div><div class='ctx'> 		p-&gt;revision = 0;</div><div class='ctx'> 		ret = ops-&gt;vidioc_g_chip_ident(file, fh, p);</div><div class='hunk'>@@ -1992,12 +1828,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 		struct v4l2_hw_freq_seek *p = arg;</div><div class='ctx'> 		enum v4l2_tuner_type type;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_hw_freq_seek)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		type = (vfd-&gt;vfl_type == VFL_TYPE_RADIO) ?</div><div class='ctx'> 			V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;</div><div class='ctx'> 		dbgarg(cmd,</div><div class='hunk'>@@ -2013,9 +1843,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_frmsizeenum *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_enum_framesizes)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		ret = ops-&gt;vidioc_enum_framesizes(file, fh, p);</div><div class='ctx'> 		dbgarg(cmd,</div><div class='ctx'> 			"index=%d, pixelformat=%c%c%c%c, type=%d ",</div><div class='hunk'>@@ -2049,9 +1876,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_frmivalenum *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_enum_frameintervals)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		ret = ops-&gt;vidioc_enum_frameintervals(file, fh, p);</div><div class='ctx'> 		dbgarg(cmd,</div><div class='ctx'> 			"index=%d, pixelformat=%d, width=%d, height=%d, type=%d ",</div><div class='hunk'>@@ -2084,9 +1908,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_dv_enum_preset *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_enum_dv_presets)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		ret = ops-&gt;vidioc_enum_dv_presets(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd,</div><div class='hunk'>@@ -2100,13 +1921,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_dv_preset *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_dv_preset)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		dbgarg(cmd, "preset=%d\n", p-&gt;preset);</div><div class='ctx'> 		ret = ops-&gt;vidioc_s_dv_preset(file, fh, p);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2115,9 +1929,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_dv_preset *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_dv_preset)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		ret = ops-&gt;vidioc_g_dv_preset(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "preset=%d\n", p-&gt;preset);</div><div class='hunk'>@@ -2127,9 +1938,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_dv_preset *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_query_dv_preset)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		ret = ops-&gt;vidioc_query_dv_preset(file, fh, p);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			dbgarg(cmd, "preset=%d\n", p-&gt;preset);</div><div class='hunk'>@@ -2139,32 +1947,13 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_dv_timings *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_s_dv_timings)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		dbgtimings(vfd, p);</div><div class='ctx'> 		switch (p-&gt;type) {</div><div class='ctx'> 		case V4L2_DV_BT_656_1120:</div><div class='del'>-			dbgarg2("bt-656/1120:interlaced=%d, pixelclock=%lld,"</div><div class='del'>-				" width=%d, height=%d, polarities=%x,"</div><div class='del'>-				" hfrontporch=%d, hsync=%d, hbackporch=%d,"</div><div class='del'>-				" vfrontporch=%d, vsync=%d, vbackporch=%d,"</div><div class='del'>-				" il_vfrontporch=%d, il_vsync=%d,"</div><div class='del'>-				" il_vbackporch=%d\n",</div><div class='del'>-				p-&gt;bt.interlaced, p-&gt;bt.pixelclock,</div><div class='del'>-				p-&gt;bt.width, p-&gt;bt.height, p-&gt;bt.polarities,</div><div class='del'>-				p-&gt;bt.hfrontporch, p-&gt;bt.hsync,</div><div class='del'>-				p-&gt;bt.hbackporch, p-&gt;bt.vfrontporch,</div><div class='del'>-				p-&gt;bt.vsync, p-&gt;bt.vbackporch,</div><div class='del'>-				p-&gt;bt.il_vfrontporch, p-&gt;bt.il_vsync,</div><div class='del'>-				p-&gt;bt.il_vbackporch);</div><div class='ctx'> 			ret = ops-&gt;vidioc_s_dv_timings(file, fh, p);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			dbgarg2("Unknown type %d!\n", p-&gt;type);</div><div class='add'>+			ret = -EINVAL;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2173,43 +1962,68 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_dv_timings *p = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_g_dv_timings)</div><div class='add'>+		ret = ops-&gt;vidioc_g_dv_timings(file, fh, p);</div><div class='add'>+		if (!ret)</div><div class='add'>+			dbgtimings(vfd, p);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case VIDIOC_ENUM_DV_TIMINGS:</div><div class='add'>+	{</div><div class='add'>+		struct v4l2_enum_dv_timings *p = arg;</div><div class='add'>+</div><div class='add'>+		if (!ops-&gt;vidioc_enum_dv_timings)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		ret = ops-&gt;vidioc_g_dv_timings(file, fh, p);</div><div class='add'>+		ret = ops-&gt;vidioc_enum_dv_timings(file, fh, p);</div><div class='ctx'> 		if (!ret) {</div><div class='del'>-			switch (p-&gt;type) {</div><div class='del'>-			case V4L2_DV_BT_656_1120:</div><div class='del'>-				dbgarg2("bt-656/1120:interlaced=%d,"</div><div class='del'>-					" pixelclock=%lld,"</div><div class='del'>-					" width=%d, height=%d, polarities=%x,"</div><div class='del'>-					" hfrontporch=%d, hsync=%d,"</div><div class='del'>-					" hbackporch=%d, vfrontporch=%d,"</div><div class='del'>-					" vsync=%d, vbackporch=%d,"</div><div class='del'>-					" il_vfrontporch=%d, il_vsync=%d,"</div><div class='del'>-					" il_vbackporch=%d\n",</div><div class='del'>-					p-&gt;bt.interlaced, p-&gt;bt.pixelclock,</div><div class='del'>-					p-&gt;bt.width, p-&gt;bt.height,</div><div class='del'>-					p-&gt;bt.polarities, p-&gt;bt.hfrontporch,</div><div class='del'>-					p-&gt;bt.hsync, p-&gt;bt.hbackporch,</div><div class='del'>-					p-&gt;bt.vfrontporch, p-&gt;bt.vsync,</div><div class='del'>-					p-&gt;bt.vbackporch, p-&gt;bt.il_vfrontporch,</div><div class='del'>-					p-&gt;bt.il_vsync, p-&gt;bt.il_vbackporch);</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				dbgarg2("Unknown type %d!\n", p-&gt;type);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='add'>+			dbgarg(cmd, "index=%d: ", p-&gt;index);</div><div class='add'>+			dbgtimings(vfd, &amp;p-&gt;timings);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	case VIDIOC_DQEVENT:</div><div class='add'>+	case VIDIOC_QUERY_DV_TIMINGS:</div><div class='ctx'> 	{</div><div class='del'>-		struct v4l2_event *ev = arg;</div><div class='add'>+		struct v4l2_dv_timings *p = arg;</div><div class='add'>+</div><div class='add'>+		if (!ops-&gt;vidioc_query_dv_timings)</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_subscribe_event)</div><div class='add'>+		ret = ops-&gt;vidioc_query_dv_timings(file, fh, p);</div><div class='add'>+		if (!ret)</div><div class='add'>+			dbgtimings(vfd, p);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case VIDIOC_DV_TIMINGS_CAP:</div><div class='add'>+	{</div><div class='add'>+		struct v4l2_dv_timings_cap *p = arg;</div><div class='add'>+</div><div class='add'>+		if (!ops-&gt;vidioc_dv_timings_cap)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		ret = ops-&gt;vidioc_dv_timings_cap(file, fh, p);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+		switch (p-&gt;type) {</div><div class='add'>+		case V4L2_DV_BT_656_1120:</div><div class='add'>+			dbgarg(cmd,</div><div class='add'>+			       "type=%d, width=%u-%u, height=%u-%u, "</div><div class='add'>+			       "pixelclock=%llu-%llu, standards=%x, capabilities=%x ",</div><div class='add'>+			       p-&gt;type,</div><div class='add'>+			       p-&gt;bt.min_width, p-&gt;bt.max_width,</div><div class='add'>+			       p-&gt;bt.min_height, p-&gt;bt.max_height,</div><div class='add'>+			       p-&gt;bt.min_pixelclock, p-&gt;bt.max_pixelclock,</div><div class='add'>+			       p-&gt;bt.standards, p-&gt;bt.capabilities);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			dbgarg(cmd, "unknown type ");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case VIDIOC_DQEVENT:</div><div class='add'>+	{</div><div class='add'>+		struct v4l2_event *ev = arg;</div><div class='add'>+</div><div class='ctx'> 		ret = v4l2_event_dequeue(fh, ev, file-&gt;f_flags &amp; O_NONBLOCK);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			dbgarg(cmd, "no pending events?");</div><div class='hunk'>@@ -2226,9 +2040,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_event_subscription *sub = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_subscribe_event)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		ret = ops-&gt;vidioc_subscribe_event(fh, sub);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			dbgarg(cmd, "failed, ret=%ld", ret);</div><div class='hunk'>@@ -2241,9 +2052,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_event_subscription *sub = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_unsubscribe_event)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		ret = ops-&gt;vidioc_unsubscribe_event(fh, sub);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			dbgarg(cmd, "failed, ret=%ld", ret);</div><div class='hunk'>@@ -2256,12 +2064,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_create_buffers *create = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_create_bufs)</div><div class='del'>-			break;</div><div class='del'>-		if (ret_prio) {</div><div class='del'>-			ret = ret_prio;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		ret = check_fmt(ops, create-&gt;format.type);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -2275,8 +2077,6 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	{</div><div class='ctx'> 		struct v4l2_buffer *b = arg;</div><div class='ctx'> </div><div class='del'>-		if (!ops-&gt;vidioc_prepare_buf)</div><div class='del'>-			break;</div><div class='ctx'> 		ret = check_fmt(ops, b-&gt;type);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -2289,7 +2089,9 @@ static long __video_do_ioctl(struct file *file,</div><div class='ctx'> 	default:</div><div class='ctx'> 		if (!ops-&gt;vidioc_default)</div><div class='ctx'> 			break;</div><div class='del'>-		ret = ops-&gt;vidioc_default(file, fh, ret_prio &gt;= 0, cmd, arg);</div><div class='add'>+		ret = ops-&gt;vidioc_default(file, fh, use_fh_prio ?</div><div class='add'>+				v4l2_prio_check(vfd-&gt;prio, vfh-&gt;prio) &gt;= 0 : 0,</div><div class='add'>+				cmd, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	} /* switch */</div><div class='ctx'> </div><div class='hunk'>@@ -2463,7 +2265,9 @@ video_usercopy(struct file *file, unsigned int cmd, unsigned long arg,</div><div class='ctx'> 			err = -EFAULT;</div><div class='ctx'> 		goto out_array_args;</div><div class='ctx'> 	}</div><div class='del'>-	if (err &lt; 0)</div><div class='add'>+	/* VIDIOC_QUERY_DV_TIMINGS can return an error, but still have valid</div><div class='add'>+	   results that must be returned. */</div><div class='add'>+	if (err &lt; 0 &amp;&amp; cmd != VIDIOC_QUERY_DV_TIMINGS)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> out_array_args:</div><div class='head'>diff --git a/drivers/media/video/v4l2-subdev.c b/drivers/media/video/v4l2-subdev.c<br/>index 6fe88e965a8c..db6e859b93d4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/v4l2-subdev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/v4l2-subdev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/v4l2-subdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/v4l2-subdev.c</a></div><div class='hunk'>@@ -35,14 +35,9 @@</div><div class='ctx'> static int subdev_fh_init(struct v4l2_subdev_fh *fh, struct v4l2_subdev *sd)</div><div class='ctx'> {</div><div class='ctx'> #if defined(CONFIG_VIDEO_V4L2_SUBDEV_API)</div><div class='del'>-	/* Allocate try format and crop in the same memory block */</div><div class='del'>-	fh-&gt;try_fmt = kzalloc((sizeof(*fh-&gt;try_fmt) + sizeof(*fh-&gt;try_crop))</div><div class='del'>-			      * sd-&gt;entity.num_pads, GFP_KERNEL);</div><div class='del'>-	if (fh-&gt;try_fmt == NULL)</div><div class='add'>+	fh-&gt;pad = kzalloc(sizeof(*fh-&gt;pad) * sd-&gt;entity.num_pads, GFP_KERNEL);</div><div class='add'>+	if (fh-&gt;pad == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	fh-&gt;try_crop = (struct v4l2_rect *)</div><div class='del'>-		(fh-&gt;try_fmt + sd-&gt;entity.num_pads);</div><div class='ctx'> #endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -50,9 +45,8 @@ static int subdev_fh_init(struct v4l2_subdev_fh *fh, struct v4l2_subdev *sd)</div><div class='ctx'> static void subdev_fh_free(struct v4l2_subdev_fh *fh)</div><div class='ctx'> {</div><div class='ctx'> #if defined(CONFIG_VIDEO_V4L2_SUBDEV_API)</div><div class='del'>-	kfree(fh-&gt;try_fmt);</div><div class='del'>-	fh-&gt;try_fmt = NULL;</div><div class='del'>-	fh-&gt;try_crop = NULL;</div><div class='add'>+	kfree(fh-&gt;pad);</div><div class='add'>+	fh-&gt;pad = NULL;</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -234,6 +228,8 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg)</div><div class='ctx'> </div><div class='ctx'> 	case VIDIOC_SUBDEV_G_CROP: {</div><div class='ctx'> 		struct v4l2_subdev_crop *crop = arg;</div><div class='add'>+		struct v4l2_subdev_selection sel;</div><div class='add'>+		int rval;</div><div class='ctx'> </div><div class='ctx'> 		if (crop-&gt;which != V4L2_SUBDEV_FORMAT_TRY &amp;&amp;</div><div class='ctx'> 		    crop-&gt;which != V4L2_SUBDEV_FORMAT_ACTIVE)</div><div class='hunk'>@@ -242,11 +238,27 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg)</div><div class='ctx'> 		if (crop-&gt;pad &gt;= sd-&gt;entity.num_pads)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		return v4l2_subdev_call(sd, pad, get_crop, subdev_fh, crop);</div><div class='add'>+		rval = v4l2_subdev_call(sd, pad, get_crop, subdev_fh, crop);</div><div class='add'>+		if (rval != -ENOIOCTLCMD)</div><div class='add'>+			return rval;</div><div class='add'>+</div><div class='add'>+		memset(&amp;sel, 0, sizeof(sel));</div><div class='add'>+		sel.which = crop-&gt;which;</div><div class='add'>+		sel.pad = crop-&gt;pad;</div><div class='add'>+		sel.target = V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL;</div><div class='add'>+</div><div class='add'>+		rval = v4l2_subdev_call(</div><div class='add'>+			sd, pad, get_selection, subdev_fh, &amp;sel);</div><div class='add'>+</div><div class='add'>+		crop-&gt;rect = sel.r;</div><div class='add'>+</div><div class='add'>+		return rval;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	case VIDIOC_SUBDEV_S_CROP: {</div><div class='ctx'> 		struct v4l2_subdev_crop *crop = arg;</div><div class='add'>+		struct v4l2_subdev_selection sel;</div><div class='add'>+		int rval;</div><div class='ctx'> </div><div class='ctx'> 		if (crop-&gt;which != V4L2_SUBDEV_FORMAT_TRY &amp;&amp;</div><div class='ctx'> 		    crop-&gt;which != V4L2_SUBDEV_FORMAT_ACTIVE)</div><div class='hunk'>@@ -255,7 +267,22 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg)</div><div class='ctx'> 		if (crop-&gt;pad &gt;= sd-&gt;entity.num_pads)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		return v4l2_subdev_call(sd, pad, set_crop, subdev_fh, crop);</div><div class='add'>+		rval = v4l2_subdev_call(sd, pad, set_crop, subdev_fh, crop);</div><div class='add'>+		if (rval != -ENOIOCTLCMD)</div><div class='add'>+			return rval;</div><div class='add'>+</div><div class='add'>+		memset(&amp;sel, 0, sizeof(sel));</div><div class='add'>+		sel.which = crop-&gt;which;</div><div class='add'>+		sel.pad = crop-&gt;pad;</div><div class='add'>+		sel.target = V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL;</div><div class='add'>+		sel.r = crop-&gt;rect;</div><div class='add'>+</div><div class='add'>+		rval = v4l2_subdev_call(</div><div class='add'>+			sd, pad, set_selection, subdev_fh, &amp;sel);</div><div class='add'>+</div><div class='add'>+		crop-&gt;rect = sel.r;</div><div class='add'>+</div><div class='add'>+		return rval;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	case VIDIOC_SUBDEV_ENUM_MBUS_CODE: {</div><div class='hunk'>@@ -293,6 +320,34 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg)</div><div class='ctx'> 		return v4l2_subdev_call(sd, pad, enum_frame_interval, subdev_fh,</div><div class='ctx'> 					fie);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	case VIDIOC_SUBDEV_G_SELECTION: {</div><div class='add'>+		struct v4l2_subdev_selection *sel = arg;</div><div class='add'>+</div><div class='add'>+		if (sel-&gt;which != V4L2_SUBDEV_FORMAT_TRY &amp;&amp;</div><div class='add'>+		    sel-&gt;which != V4L2_SUBDEV_FORMAT_ACTIVE)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		if (sel-&gt;pad &gt;= sd-&gt;entity.num_pads)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		return v4l2_subdev_call(</div><div class='add'>+			sd, pad, get_selection, subdev_fh, sel);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case VIDIOC_SUBDEV_S_SELECTION: {</div><div class='add'>+		struct v4l2_subdev_selection *sel = arg;</div><div class='add'>+</div><div class='add'>+		if (sel-&gt;which != V4L2_SUBDEV_FORMAT_TRY &amp;&amp;</div><div class='add'>+		    sel-&gt;which != V4L2_SUBDEV_FORMAT_ACTIVE)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		if (sel-&gt;pad &gt;= sd-&gt;entity.num_pads)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		return v4l2_subdev_call(</div><div class='add'>+			sd, pad, set_selection, subdev_fh, sel);</div><div class='add'>+	}</div><div class='ctx'> #endif</div><div class='ctx'> 	default:</div><div class='ctx'> 		return v4l2_subdev_call(sd, core, ioctl, cmd, arg);</div><div class='hunk'>@@ -332,6 +387,70 @@ const struct v4l2_file_operations v4l2_subdev_fops = {</div><div class='ctx'> 	.poll = subdev_poll,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MEDIA_CONTROLLER</div><div class='add'>+int v4l2_subdev_link_validate_default(struct v4l2_subdev *sd,</div><div class='add'>+				      struct media_link *link,</div><div class='add'>+				      struct v4l2_subdev_format *source_fmt,</div><div class='add'>+				      struct v4l2_subdev_format *sink_fmt)</div><div class='add'>+{</div><div class='add'>+	if (source_fmt-&gt;format.width != sink_fmt-&gt;format.width</div><div class='add'>+	    || source_fmt-&gt;format.height != sink_fmt-&gt;format.height</div><div class='add'>+	    || source_fmt-&gt;format.code != sink_fmt-&gt;format.code)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(v4l2_subdev_link_validate_default);</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+v4l2_subdev_link_validate_get_format(struct media_pad *pad,</div><div class='add'>+				     struct v4l2_subdev_format *fmt)</div><div class='add'>+{</div><div class='add'>+	switch (media_entity_type(pad-&gt;entity)) {</div><div class='add'>+	case MEDIA_ENT_T_V4L2_SUBDEV:</div><div class='add'>+		fmt-&gt;which = V4L2_SUBDEV_FORMAT_ACTIVE;</div><div class='add'>+		fmt-&gt;pad = pad-&gt;index;</div><div class='add'>+		return v4l2_subdev_call(media_entity_to_v4l2_subdev(</div><div class='add'>+						pad-&gt;entity),</div><div class='add'>+					pad, get_fmt, NULL, fmt);</div><div class='add'>+	default:</div><div class='add'>+		WARN(1, "Driver bug! Wrong media entity type %d, entity %s\n",</div><div class='add'>+		     media_entity_type(pad-&gt;entity), pad-&gt;entity-&gt;name);</div><div class='add'>+		/* Fall through */</div><div class='add'>+	case MEDIA_ENT_T_DEVNODE_V4L:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int v4l2_subdev_link_validate(struct media_link *link)</div><div class='add'>+{</div><div class='add'>+	struct v4l2_subdev *sink;</div><div class='add'>+	struct v4l2_subdev_format sink_fmt, source_fmt;</div><div class='add'>+	int rval;</div><div class='add'>+</div><div class='add'>+	rval = v4l2_subdev_link_validate_get_format(</div><div class='add'>+		link-&gt;source, &amp;source_fmt);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rval = v4l2_subdev_link_validate_get_format(</div><div class='add'>+		link-&gt;sink, &amp;sink_fmt);</div><div class='add'>+	if (rval &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	sink = media_entity_to_v4l2_subdev(link-&gt;sink-&gt;entity);</div><div class='add'>+</div><div class='add'>+	rval = v4l2_subdev_call(sink, pad, link_validate, link,</div><div class='add'>+				&amp;source_fmt, &amp;sink_fmt);</div><div class='add'>+	if (rval != -ENOIOCTLCMD)</div><div class='add'>+		return rval;</div><div class='add'>+</div><div class='add'>+	return v4l2_subdev_link_validate_default(</div><div class='add'>+		sink, link, &amp;source_fmt, &amp;sink_fmt);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(v4l2_subdev_link_validate);</div><div class='add'>+#endif /* CONFIG_MEDIA_CONTROLLER */</div><div class='add'>+</div><div class='ctx'> void v4l2_subdev_init(struct v4l2_subdev *sd, const struct v4l2_subdev_ops *ops)</div><div class='ctx'> {</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;sd-&gt;list);</div><div class='head'>diff --git a/drivers/media/video/via-camera.c b/drivers/media/video/via-camera.c<br/>index 20f7237b8242..308e150a39bc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/via-camera.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/via-camera.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/via-camera.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/via-camera.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-chip-ident.h&gt;</div><div class='add'>+#include &lt;media/ov7670.h&gt;</div><div class='ctx'> #include &lt;media/videobuf-dma-sg.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='hunk'>@@ -1347,11 +1348,21 @@ static __devinit bool viacam_serial_is_enabled(void)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct ov7670_config sensor_cfg = {</div><div class='add'>+	/* The XO-1.5 (only known user) clocks the camera at 90MHz. */</div><div class='add'>+	.clock_speed = 90,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static __devinit int viacam_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct i2c_adapter *sensor_adapter;</div><div class='ctx'> 	struct viafb_dev *viadev = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct i2c_board_info ov7670_info = {</div><div class='add'>+		.type = "ov7670",</div><div class='add'>+		.addr = 0x42 &gt;&gt; 1,</div><div class='add'>+		.platform_data = &amp;sensor_cfg,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Note that there are actually two capture channels on</div><div class='hunk'>@@ -1433,8 +1444,8 @@ static __devinit int viacam_probe(struct platform_device *pdev)</div><div class='ctx'> 	 * is OLPC-specific.  0x42 assumption is ov7670-specific.</div><div class='ctx'> 	 */</div><div class='ctx'> 	sensor_adapter = viafb_find_i2c_adapter(VIA_PORT_31);</div><div class='del'>-	cam-&gt;sensor = v4l2_i2c_new_subdev(&amp;cam-&gt;v4l2_dev, sensor_adapter,</div><div class='del'>-			"ov7670", 0x42 &gt;&gt; 1, NULL);</div><div class='add'>+	cam-&gt;sensor = v4l2_i2c_new_subdev_board(&amp;cam-&gt;v4l2_dev, sensor_adapter,</div><div class='add'>+			&amp;ov7670_info, NULL);</div><div class='ctx'> 	if (cam-&gt;sensor == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unable to find the sensor!\n");</div><div class='ctx'> 		ret = -ENODEV;</div><div class='head'>diff --git a/drivers/media/video/videobuf-core.c b/drivers/media/video/videobuf-core.c<br/>index de4fa4eb8844..ffdf59cfe405 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/videobuf-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/videobuf-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/videobuf-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/videobuf-core.c</a></div><div class='hunk'>@@ -1129,6 +1129,7 @@ unsigned int videobuf_poll_stream(struct file *file,</div><div class='ctx'> 				  struct videobuf_queue *q,</div><div class='ctx'> 				  poll_table *wait)</div><div class='ctx'> {</div><div class='add'>+	unsigned long req_events = poll_requested_events(wait);</div><div class='ctx'> 	struct videobuf_buffer *buf = NULL;</div><div class='ctx'> 	unsigned int rc = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1137,7 +1138,7 @@ unsigned int videobuf_poll_stream(struct file *file,</div><div class='ctx'> 		if (!list_empty(&amp;q-&gt;stream))</div><div class='ctx'> 			buf = list_entry(q-&gt;stream.next,</div><div class='ctx'> 					 struct videobuf_buffer, stream);</div><div class='del'>-	} else {</div><div class='add'>+	} else if (req_events &amp; (POLLIN | POLLRDNORM)) {</div><div class='ctx'> 		if (!q-&gt;reading)</div><div class='ctx'> 			__videobuf_read_start(q);</div><div class='ctx'> 		if (!q-&gt;reading) {</div><div class='head'>diff --git a/drivers/media/video/videobuf-dma-contig.c b/drivers/media/video/videobuf-dma-contig.c<br/>index c9691115f2d2..b6b5cc1a43cb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/videobuf-dma-contig.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/videobuf-dma-contig.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/videobuf-dma-contig.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/videobuf-dma-contig.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@ struct videobuf_dma_contig_memory {</div><div class='ctx'> 	u32 magic;</div><div class='ctx'> 	void *vaddr;</div><div class='ctx'> 	dma_addr_t dma_handle;</div><div class='add'>+	bool cached;</div><div class='ctx'> 	unsigned long size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -37,8 +38,58 @@ struct videobuf_dma_contig_memory {</div><div class='ctx'> 		BUG();							    \</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-videobuf_vm_open(struct vm_area_struct *vma)</div><div class='add'>+static int __videobuf_dc_alloc(struct device *dev,</div><div class='add'>+			       struct videobuf_dma_contig_memory *mem,</div><div class='add'>+			       unsigned long size, unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	mem-&gt;size = size;</div><div class='add'>+	if (mem-&gt;cached) {</div><div class='add'>+		mem-&gt;vaddr = alloc_pages_exact(mem-&gt;size, flags | GFP_DMA);</div><div class='add'>+		if (mem-&gt;vaddr) {</div><div class='add'>+			int err;</div><div class='add'>+</div><div class='add'>+			mem-&gt;dma_handle = dma_map_single(dev, mem-&gt;vaddr,</div><div class='add'>+							 mem-&gt;size,</div><div class='add'>+							 DMA_FROM_DEVICE);</div><div class='add'>+			err = dma_mapping_error(dev, mem-&gt;dma_handle);</div><div class='add'>+			if (err) {</div><div class='add'>+				dev_err(dev, "dma_map_single failed\n");</div><div class='add'>+</div><div class='add'>+				free_pages_exact(mem-&gt;vaddr, mem-&gt;size);</div><div class='add'>+				mem-&gt;vaddr = 0;</div><div class='add'>+				return err;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else</div><div class='add'>+		mem-&gt;vaddr = dma_alloc_coherent(dev, mem-&gt;size,</div><div class='add'>+						&amp;mem-&gt;dma_handle, flags);</div><div class='add'>+</div><div class='add'>+	if (!mem-&gt;vaddr) {</div><div class='add'>+		dev_err(dev, "memory alloc size %ld failed\n", mem-&gt;size);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "dma mapped data is at %p (%ld)\n", mem-&gt;vaddr, mem-&gt;size);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __videobuf_dc_free(struct device *dev,</div><div class='add'>+			       struct videobuf_dma_contig_memory *mem)</div><div class='add'>+{</div><div class='add'>+	if (mem-&gt;cached) {</div><div class='add'>+		if (!mem-&gt;vaddr)</div><div class='add'>+			return;</div><div class='add'>+		dma_unmap_single(dev, mem-&gt;dma_handle, mem-&gt;size,</div><div class='add'>+				 DMA_FROM_DEVICE);</div><div class='add'>+		free_pages_exact(mem-&gt;vaddr, mem-&gt;size);</div><div class='add'>+	} else</div><div class='add'>+		dma_free_coherent(dev, mem-&gt;size, mem-&gt;vaddr, mem-&gt;dma_handle);</div><div class='add'>+</div><div class='add'>+	mem-&gt;vaddr = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void videobuf_vm_open(struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='ctx'> 	struct videobuf_mapping *map = vma-&gt;vm_private_data;</div><div class='ctx'> </div><div class='hunk'>@@ -91,12 +142,11 @@ static void videobuf_vm_close(struct vm_area_struct *vma)</div><div class='ctx'> 				dev_dbg(q-&gt;dev, "buf[%d] freeing %p\n",</div><div class='ctx'> 					i, mem-&gt;vaddr);</div><div class='ctx'> </div><div class='del'>-				dma_free_coherent(q-&gt;dev, mem-&gt;size,</div><div class='del'>-						  mem-&gt;vaddr, mem-&gt;dma_handle);</div><div class='add'>+				__videobuf_dc_free(q-&gt;dev, mem);</div><div class='ctx'> 				mem-&gt;vaddr = NULL;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			q-&gt;bufs[i]-&gt;map   = NULL;</div><div class='add'>+			q-&gt;bufs[i]-&gt;map = NULL;</div><div class='ctx'> 			q-&gt;bufs[i]-&gt;baddr = 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -107,8 +157,8 @@ static void videobuf_vm_close(struct vm_area_struct *vma)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct vm_operations_struct videobuf_vm_ops = {</div><div class='del'>-	.open     = videobuf_vm_open,</div><div class='del'>-	.close    = videobuf_vm_close,</div><div class='add'>+	.open	= videobuf_vm_open,</div><div class='add'>+	.close	= videobuf_vm_close,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -178,26 +228,38 @@ static int videobuf_dma_contig_user_get(struct videobuf_dma_contig_memory *mem,</div><div class='ctx'> 		pages_done++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>- out_up:</div><div class='add'>+out_up:</div><div class='ctx'> 	up_read(&amp;current-&gt;mm-&gt;mmap_sem);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct videobuf_buffer *__videobuf_alloc_vb(size_t size)</div><div class='add'>+static struct videobuf_buffer *__videobuf_alloc_vb(size_t size, bool cached)</div><div class='ctx'> {</div><div class='ctx'> 	struct videobuf_dma_contig_memory *mem;</div><div class='ctx'> 	struct videobuf_buffer *vb;</div><div class='ctx'> </div><div class='ctx'> 	vb = kzalloc(size + sizeof(*mem), GFP_KERNEL);</div><div class='ctx'> 	if (vb) {</div><div class='del'>-		mem = vb-&gt;priv = ((char *)vb) + size;</div><div class='add'>+		vb-&gt;priv = ((char *)vb) + size;</div><div class='add'>+		mem = vb-&gt;priv;</div><div class='ctx'> 		mem-&gt;magic = MAGIC_DC_MEM;</div><div class='add'>+		mem-&gt;cached = cached;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return vb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct videobuf_buffer *__videobuf_alloc_uncached(size_t size)</div><div class='add'>+{</div><div class='add'>+	return __videobuf_alloc_vb(size, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct videobuf_buffer *__videobuf_alloc_cached(size_t size)</div><div class='add'>+{</div><div class='add'>+	return __videobuf_alloc_vb(size, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void *__videobuf_to_vaddr(struct videobuf_buffer *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct videobuf_dma_contig_memory *mem = buf-&gt;priv;</div><div class='hunk'>@@ -235,28 +297,32 @@ static int __videobuf_iolock(struct videobuf_queue *q,</div><div class='ctx'> 			return videobuf_dma_contig_user_get(mem, vb);</div><div class='ctx'> </div><div class='ctx'> 		/* allocate memory for the read() method */</div><div class='del'>-		mem-&gt;size = PAGE_ALIGN(vb-&gt;size);</div><div class='del'>-		mem-&gt;vaddr = dma_alloc_coherent(q-&gt;dev, mem-&gt;size,</div><div class='del'>-						&amp;mem-&gt;dma_handle, GFP_KERNEL);</div><div class='del'>-		if (!mem-&gt;vaddr) {</div><div class='del'>-			dev_err(q-&gt;dev, "dma_alloc_coherent %ld failed\n",</div><div class='del'>-					 mem-&gt;size);</div><div class='add'>+		if (__videobuf_dc_alloc(q-&gt;dev, mem, PAGE_ALIGN(vb-&gt;size),</div><div class='add'>+					GFP_KERNEL))</div><div class='ctx'> 			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		dev_dbg(q-&gt;dev, "dma_alloc_coherent data is at %p (%ld)\n",</div><div class='del'>-			mem-&gt;vaddr, mem-&gt;size);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_MEMORY_OVERLAY:</div><div class='ctx'> 	default:</div><div class='del'>-		dev_dbg(q-&gt;dev, "%s memory method OVERLAY/unknown\n",</div><div class='del'>-			__func__);</div><div class='add'>+		dev_dbg(q-&gt;dev, "%s memory method OVERLAY/unknown\n", __func__);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int __videobuf_sync(struct videobuf_queue *q,</div><div class='add'>+			   struct videobuf_buffer *buf)</div><div class='add'>+{</div><div class='add'>+	struct videobuf_dma_contig_memory *mem = buf-&gt;priv;</div><div class='add'>+	BUG_ON(!mem);</div><div class='add'>+	MAGIC_CHECK(mem-&gt;magic, MAGIC_DC_MEM);</div><div class='add'>+</div><div class='add'>+	dma_sync_single_for_cpu(q-&gt;dev, mem-&gt;dma_handle, mem-&gt;size,</div><div class='add'>+				DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __videobuf_mmap_mapper(struct videobuf_queue *q,</div><div class='ctx'> 				  struct videobuf_buffer *buf,</div><div class='ctx'> 				  struct vm_area_struct *vma)</div><div class='hunk'>@@ -265,6 +331,8 @@ static int __videobuf_mmap_mapper(struct videobuf_queue *q,</div><div class='ctx'> 	struct videobuf_mapping *map;</div><div class='ctx'> 	int retval;</div><div class='ctx'> 	unsigned long size;</div><div class='add'>+	unsigned long pos, start = vma-&gt;vm_start;</div><div class='add'>+	struct page *page;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(q-&gt;dev, "%s\n", __func__);</div><div class='ctx'> </div><div class='hunk'>@@ -282,41 +350,50 @@ static int __videobuf_mmap_mapper(struct videobuf_queue *q,</div><div class='ctx'> 	BUG_ON(!mem);</div><div class='ctx'> 	MAGIC_CHECK(mem-&gt;magic, MAGIC_DC_MEM);</div><div class='ctx'> </div><div class='del'>-	mem-&gt;size = PAGE_ALIGN(buf-&gt;bsize);</div><div class='del'>-	mem-&gt;vaddr = dma_alloc_coherent(q-&gt;dev, mem-&gt;size,</div><div class='del'>-					&amp;mem-&gt;dma_handle, GFP_KERNEL);</div><div class='del'>-	if (!mem-&gt;vaddr) {</div><div class='del'>-		dev_err(q-&gt;dev, "dma_alloc_coherent size %ld failed\n",</div><div class='del'>-			mem-&gt;size);</div><div class='add'>+	if (__videobuf_dc_alloc(q-&gt;dev, mem, PAGE_ALIGN(buf-&gt;bsize),</div><div class='add'>+				GFP_KERNEL | __GFP_COMP))</div><div class='ctx'> 		goto error;</div><div class='del'>-	}</div><div class='del'>-	dev_dbg(q-&gt;dev, "dma_alloc_coherent data is at addr %p (size %ld)\n",</div><div class='del'>-		mem-&gt;vaddr, mem-&gt;size);</div><div class='ctx'> </div><div class='ctx'> 	/* Try to remap memory */</div><div class='ctx'> </div><div class='ctx'> 	size = vma-&gt;vm_end - vma-&gt;vm_start;</div><div class='ctx'> 	size = (size &lt; mem-&gt;size) ? size : mem-&gt;size;</div><div class='ctx'> </div><div class='del'>-	vma-&gt;vm_page_prot = pgprot_noncached(vma-&gt;vm_page_prot);</div><div class='del'>-	retval = remap_pfn_range(vma, vma-&gt;vm_start,</div><div class='del'>-				 mem-&gt;dma_handle &gt;&gt; PAGE_SHIFT,</div><div class='del'>-				 size, vma-&gt;vm_page_prot);</div><div class='del'>-	if (retval) {</div><div class='del'>-		dev_err(q-&gt;dev, "mmap: remap failed with error %d. ", retval);</div><div class='del'>-		dma_free_coherent(q-&gt;dev, mem-&gt;size,</div><div class='del'>-				  mem-&gt;vaddr, mem-&gt;dma_handle);</div><div class='del'>-		goto error;</div><div class='add'>+	if (!mem-&gt;cached)</div><div class='add'>+		vma-&gt;vm_page_prot = pgprot_noncached(vma-&gt;vm_page_prot);</div><div class='add'>+</div><div class='add'>+	pos = (unsigned long)mem-&gt;vaddr;</div><div class='add'>+</div><div class='add'>+	while (size &gt; 0) {</div><div class='add'>+		page = virt_to_page((void *)pos);</div><div class='add'>+		if (NULL == page) {</div><div class='add'>+			dev_err(q-&gt;dev, "mmap: virt_to_page failed\n");</div><div class='add'>+			__videobuf_dc_free(q-&gt;dev, mem);</div><div class='add'>+			goto error;</div><div class='add'>+		}</div><div class='add'>+		retval = vm_insert_page(vma, start, page);</div><div class='add'>+		if (retval) {</div><div class='add'>+			dev_err(q-&gt;dev, "mmap: insert failed with error %d\n",</div><div class='add'>+				retval);</div><div class='add'>+			__videobuf_dc_free(q-&gt;dev, mem);</div><div class='add'>+			goto error;</div><div class='add'>+		}</div><div class='add'>+		start += PAGE_SIZE;</div><div class='add'>+		pos += PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+		if (size &gt; PAGE_SIZE)</div><div class='add'>+			size -= PAGE_SIZE;</div><div class='add'>+		else</div><div class='add'>+			size = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vma-&gt;vm_ops          = &amp;videobuf_vm_ops;</div><div class='del'>-	vma-&gt;vm_flags       |= VM_DONTEXPAND;</div><div class='add'>+	vma-&gt;vm_ops = &amp;videobuf_vm_ops;</div><div class='add'>+	vma-&gt;vm_flags |= VM_DONTEXPAND;</div><div class='ctx'> 	vma-&gt;vm_private_data = map;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(q-&gt;dev, "mmap %p: q=%p %08lx-%08lx (%lx) pgoff %08lx buf %d\n",</div><div class='ctx'> 		map, q, vma-&gt;vm_start, vma-&gt;vm_end,</div><div class='del'>-		(long int)buf-&gt;bsize,</div><div class='del'>-		vma-&gt;vm_pgoff, buf-&gt;i);</div><div class='add'>+		(long int)buf-&gt;bsize, vma-&gt;vm_pgoff, buf-&gt;i);</div><div class='ctx'> </div><div class='ctx'> 	videobuf_vm_open(vma);</div><div class='ctx'> </div><div class='hunk'>@@ -328,12 +405,20 @@ error:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct videobuf_qtype_ops qops = {</div><div class='del'>-	.magic        = MAGIC_QTYPE_OPS,</div><div class='add'>+	.magic		= MAGIC_QTYPE_OPS,</div><div class='add'>+	.alloc_vb	= __videobuf_alloc_uncached,</div><div class='add'>+	.iolock		= __videobuf_iolock,</div><div class='add'>+	.mmap_mapper	= __videobuf_mmap_mapper,</div><div class='add'>+	.vaddr		= __videobuf_to_vaddr,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	.alloc_vb     = __videobuf_alloc_vb,</div><div class='del'>-	.iolock       = __videobuf_iolock,</div><div class='del'>-	.mmap_mapper  = __videobuf_mmap_mapper,</div><div class='del'>-	.vaddr        = __videobuf_to_vaddr,</div><div class='add'>+static struct videobuf_qtype_ops qops_cached = {</div><div class='add'>+	.magic		= MAGIC_QTYPE_OPS,</div><div class='add'>+	.alloc_vb	= __videobuf_alloc_cached,</div><div class='add'>+	.iolock		= __videobuf_iolock,</div><div class='add'>+	.sync		= __videobuf_sync,</div><div class='add'>+	.mmap_mapper	= __videobuf_mmap_mapper,</div><div class='add'>+	.vaddr		= __videobuf_to_vaddr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void videobuf_queue_dma_contig_init(struct videobuf_queue *q,</div><div class='hunk'>@@ -351,6 +436,20 @@ void videobuf_queue_dma_contig_init(struct videobuf_queue *q,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(videobuf_queue_dma_contig_init);</div><div class='ctx'> </div><div class='add'>+void videobuf_queue_dma_contig_init_cached(struct videobuf_queue *q,</div><div class='add'>+					   const struct videobuf_queue_ops *ops,</div><div class='add'>+					   struct device *dev,</div><div class='add'>+					   spinlock_t *irqlock,</div><div class='add'>+					   enum v4l2_buf_type type,</div><div class='add'>+					   enum v4l2_field field,</div><div class='add'>+					   unsigned int msize,</div><div class='add'>+					   void *priv, struct mutex *ext_lock)</div><div class='add'>+{</div><div class='add'>+	videobuf_queue_core_init(q, ops, dev, irqlock, type, field, msize,</div><div class='add'>+				 priv, &amp;qops_cached, ext_lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(videobuf_queue_dma_contig_init_cached);</div><div class='add'>+</div><div class='ctx'> dma_addr_t videobuf_to_dma_contig(struct videobuf_buffer *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct videobuf_dma_contig_memory *mem = buf-&gt;priv;</div><div class='hunk'>@@ -389,7 +488,7 @@ void videobuf_dma_contig_free(struct videobuf_queue *q,</div><div class='ctx'> </div><div class='ctx'> 	/* read() method */</div><div class='ctx'> 	if (mem-&gt;vaddr) {</div><div class='del'>-		dma_free_coherent(q-&gt;dev, mem-&gt;size, mem-&gt;vaddr, mem-&gt;dma_handle);</div><div class='add'>+		__videobuf_dc_free(q-&gt;dev, mem);</div><div class='ctx'> 		mem-&gt;vaddr = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/media/video/videobuf-dvb.c b/drivers/media/video/videobuf-dvb.c<br/>index 59cb54aa2946..94d83a41381b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/videobuf-dvb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/videobuf-dvb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/videobuf-dvb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/videobuf-dvb.c</a></div><div class='hunk'>@@ -45,7 +45,6 @@ static int videobuf_dvb_thread(void *data)</div><div class='ctx'> 	struct videobuf_dvb *dvb = data;</div><div class='ctx'> 	struct videobuf_buffer *buf;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int err;</div><div class='ctx'> 	void *outp;</div><div class='ctx'> </div><div class='ctx'> 	dprintk("dvb thread started\n");</div><div class='hunk'>@@ -57,7 +56,7 @@ static int videobuf_dvb_thread(void *data)</div><div class='ctx'> 		buf = list_entry(dvb-&gt;dvbq.stream.next,</div><div class='ctx'> 				 struct videobuf_buffer, stream);</div><div class='ctx'> 		list_del(&amp;buf-&gt;stream);</div><div class='del'>-		err = videobuf_waiton(&amp;dvb-&gt;dvbq, buf, 0, 1);</div><div class='add'>+		videobuf_waiton(&amp;dvb-&gt;dvbq, buf, 0, 1);</div><div class='ctx'> </div><div class='ctx'> 		/* no more feeds left or stop_feed() asked us to quit */</div><div class='ctx'> 		if (0 == dvb-&gt;nfeeds)</div><div class='head'>diff --git a/drivers/media/video/videobuf2-core.c b/drivers/media/video/videobuf2-core.c<br/>index 2e8f1df775b6..9d4e9edbd2e7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/videobuf2-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/videobuf2-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/videobuf2-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/videobuf2-core.c</a></div><div class='hunk'>@@ -19,6 +19,9 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;media/v4l2-dev.h&gt;</div><div class='add'>+#include &lt;media/v4l2-fh.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='ctx'> #include &lt;media/videobuf2-core.h&gt;</div><div class='ctx'> </div><div class='ctx'> static int debug;</div><div class='hunk'>@@ -1642,32 +1645,46 @@ static int __vb2_cleanup_fileio(struct vb2_queue *q);</div><div class='ctx'>  * For OUTPUT queues, if a buffer is ready to be dequeued, the file descriptor</div><div class='ctx'>  * will be reported as available for writing.</div><div class='ctx'>  *</div><div class='add'>+ * If the driver uses struct v4l2_fh, then vb2_poll() will also check for any</div><div class='add'>+ * pending events.</div><div class='add'>+ *</div><div class='ctx'>  * The return values from this function are intended to be directly returned</div><div class='ctx'>  * from poll handler in driver.</div><div class='ctx'>  */</div><div class='ctx'> unsigned int vb2_poll(struct vb2_queue *q, struct file *file, poll_table *wait)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned int ret;</div><div class='add'>+	struct video_device *vfd = video_devdata(file);</div><div class='add'>+	unsigned long req_events = poll_requested_events(wait);</div><div class='ctx'> 	struct vb2_buffer *vb = NULL;</div><div class='add'>+	unsigned int res = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (test_bit(V4L2_FL_USES_V4L2_FH, &amp;vfd-&gt;flags)) {</div><div class='add'>+		struct v4l2_fh *fh = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+		if (v4l2_event_pending(fh))</div><div class='add'>+			res = POLLPRI;</div><div class='add'>+		else if (req_events &amp; POLLPRI)</div><div class='add'>+			poll_wait(file, &amp;fh-&gt;wait, wait);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Start file I/O emulator only if streaming API has not been used yet.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (q-&gt;num_buffers == 0 &amp;&amp; q-&gt;fileio == NULL) {</div><div class='del'>-		if (!V4L2_TYPE_IS_OUTPUT(q-&gt;type) &amp;&amp; (q-&gt;io_modes &amp; VB2_READ)) {</div><div class='del'>-			ret = __vb2_init_fileio(q, 1);</div><div class='del'>-			if (ret)</div><div class='del'>-				return POLLERR;</div><div class='add'>+		if (!V4L2_TYPE_IS_OUTPUT(q-&gt;type) &amp;&amp; (q-&gt;io_modes &amp; VB2_READ) &amp;&amp;</div><div class='add'>+				(req_events &amp; (POLLIN | POLLRDNORM))) {</div><div class='add'>+			if (__vb2_init_fileio(q, 1))</div><div class='add'>+				return res | POLLERR;</div><div class='ctx'> 		}</div><div class='del'>-		if (V4L2_TYPE_IS_OUTPUT(q-&gt;type) &amp;&amp; (q-&gt;io_modes &amp; VB2_WRITE)) {</div><div class='del'>-			ret = __vb2_init_fileio(q, 0);</div><div class='del'>-			if (ret)</div><div class='del'>-				return POLLERR;</div><div class='add'>+		if (V4L2_TYPE_IS_OUTPUT(q-&gt;type) &amp;&amp; (q-&gt;io_modes &amp; VB2_WRITE) &amp;&amp;</div><div class='add'>+				(req_events &amp; (POLLOUT | POLLWRNORM))) {</div><div class='add'>+			if (__vb2_init_fileio(q, 0))</div><div class='add'>+				return res | POLLERR;</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Write to OUTPUT queue can be done immediately.</div><div class='ctx'> 			 */</div><div class='del'>-			return POLLOUT | POLLWRNORM;</div><div class='add'>+			return res | POLLOUT | POLLWRNORM;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1675,7 +1692,7 @@ unsigned int vb2_poll(struct vb2_queue *q, struct file *file, poll_table *wait)</div><div class='ctx'> 	 * There is nothing to wait for if no buffers have already been queued.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (list_empty(&amp;q-&gt;queued_list))</div><div class='del'>-		return POLLERR;</div><div class='add'>+		return res | POLLERR;</div><div class='ctx'> </div><div class='ctx'> 	poll_wait(file, &amp;q-&gt;done_wq, wait);</div><div class='ctx'> </div><div class='hunk'>@@ -1690,10 +1707,11 @@ unsigned int vb2_poll(struct vb2_queue *q, struct file *file, poll_table *wait)</div><div class='ctx'> </div><div class='ctx'> 	if (vb &amp;&amp; (vb-&gt;state == VB2_BUF_STATE_DONE</div><div class='ctx'> 			|| vb-&gt;state == VB2_BUF_STATE_ERROR)) {</div><div class='del'>-		return (V4L2_TYPE_IS_OUTPUT(q-&gt;type)) ? POLLOUT | POLLWRNORM :</div><div class='del'>-			POLLIN | POLLRDNORM;</div><div class='add'>+		return (V4L2_TYPE_IS_OUTPUT(q-&gt;type)) ?</div><div class='add'>+				res | POLLOUT | POLLWRNORM :</div><div class='add'>+				res | POLLIN | POLLRDNORM;</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+	return res;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(vb2_poll);</div><div class='ctx'> </div><div class='hunk'>@@ -1839,7 +1857,6 @@ static int __vb2_init_fileio(struct vb2_queue *q, int read)</div><div class='ctx'> 	 * (multiplane buffers are not supported).</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (q-&gt;bufs[0]-&gt;num_planes != 1) {</div><div class='del'>-		fileio-&gt;req.count = 0;</div><div class='ctx'> 		ret = -EBUSY;</div><div class='ctx'> 		goto err_reqbufs;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1886,6 +1903,7 @@ static int __vb2_init_fileio(struct vb2_queue *q, int read)</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'> err_reqbufs:</div><div class='add'>+	fileio-&gt;req.count = 0;</div><div class='ctx'> 	vb2_reqbufs(q, &amp;fileio-&gt;req);</div><div class='ctx'> </div><div class='ctx'> err_kfree:</div><div class='head'>diff --git a/drivers/media/video/videobuf2-dma-contig.c b/drivers/media/video/videobuf2-dma-contig.c<br/>index f17ad98fcc5f..4b7132660a93 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/videobuf2-dma-contig.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/videobuf2-dma-contig.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/videobuf2-dma-contig.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/videobuf2-dma-contig.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;media/videobuf2-core.h&gt;</div><div class='add'>+#include &lt;media/videobuf2-dma-contig.h&gt;</div><div class='ctx'> #include &lt;media/videobuf2-memops.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct vb2_dc_conf {</div><div class='hunk'>@@ -85,7 +86,7 @@ static void *vb2_dma_contig_vaddr(void *buf_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct vb2_dc_buf *buf = buf_priv;</div><div class='ctx'> 	if (!buf)</div><div class='del'>-		return 0;</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	return buf-&gt;vaddr;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/media/video/videobuf2-memops.c b/drivers/media/video/videobuf2-memops.c<br/>index c41cb60245d6..504cd4cbe29e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/videobuf2-memops.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/videobuf2-memops.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/videobuf2-memops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/videobuf2-memops.c</a></div><div class='hunk'>@@ -55,6 +55,7 @@ struct vm_area_struct *vb2_get_vma(struct vm_area_struct *vma)</div><div class='ctx'> </div><div class='ctx'> 	return vma_copy;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(vb2_get_vma);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * vb2_put_userptr() - release a userspace virtual memory area</div><div class='head'>diff --git a/drivers/media/video/vivi.c b/drivers/media/video/vivi.c<br/>index 5e8b0710105b..0960d7f0d394 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/vivi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/vivi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/vivi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/vivi.c</a></div><div class='hunk'>@@ -95,6 +95,16 @@ static struct vivi_fmt formats[] = {</div><div class='ctx'> 		.depth    = 16,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='add'>+		.name     = "4:2:2, packed, YVYU",</div><div class='add'>+		.fourcc   = V4L2_PIX_FMT_YVYU,</div><div class='add'>+		.depth    = 16,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name     = "4:2:2, packed, VYUY",</div><div class='add'>+		.fourcc   = V4L2_PIX_FMT_VYUY,</div><div class='add'>+		.depth    = 16,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		.name     = "RGB565 (LE)",</div><div class='ctx'> 		.fourcc   = V4L2_PIX_FMT_RGB565, /* gggbbbbb rrrrrggg */</div><div class='ctx'> 		.depth    = 16,</div><div class='hunk'>@@ -114,6 +124,26 @@ static struct vivi_fmt formats[] = {</div><div class='ctx'> 		.fourcc   = V4L2_PIX_FMT_RGB555X, /* arrrrrgg gggbbbbb */</div><div class='ctx'> 		.depth    = 16,</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.name     = "RGB24 (LE)",</div><div class='add'>+		.fourcc   = V4L2_PIX_FMT_RGB24, /* rgb */</div><div class='add'>+		.depth    = 24,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name     = "RGB24 (BE)",</div><div class='add'>+		.fourcc   = V4L2_PIX_FMT_BGR24, /* bgr */</div><div class='add'>+		.depth    = 24,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name     = "RGB32 (LE)",</div><div class='add'>+		.fourcc   = V4L2_PIX_FMT_RGB32, /* argb */</div><div class='add'>+		.depth    = 32,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name     = "RGB32 (BE)",</div><div class='add'>+		.fourcc   = V4L2_PIX_FMT_BGR32, /* bgra */</div><div class='add'>+		.depth    = 32,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct vivi_fmt *get_format(struct v4l2_format *f)</div><div class='hunk'>@@ -170,6 +200,7 @@ struct vivi_dev {</div><div class='ctx'> 		struct v4l2_ctrl	   *gain;</div><div class='ctx'> 	};</div><div class='ctx'> 	struct v4l2_ctrl	   *volume;</div><div class='add'>+	struct v4l2_ctrl	   *alpha;</div><div class='ctx'> 	struct v4l2_ctrl	   *button;</div><div class='ctx'> 	struct v4l2_ctrl	   *boolean;</div><div class='ctx'> 	struct v4l2_ctrl	   *int32;</div><div class='hunk'>@@ -177,6 +208,7 @@ struct vivi_dev {</div><div class='ctx'> 	struct v4l2_ctrl	   *menu;</div><div class='ctx'> 	struct v4l2_ctrl	   *string;</div><div class='ctx'> 	struct v4l2_ctrl	   *bitmask;</div><div class='add'>+	struct v4l2_ctrl	   *int_menu;</div><div class='ctx'> </div><div class='ctx'> 	spinlock_t                 slock;</div><div class='ctx'> 	struct mutex		   mutex;</div><div class='hunk'>@@ -203,8 +235,10 @@ struct vivi_dev {</div><div class='ctx'> 	enum v4l2_field		   field;</div><div class='ctx'> 	unsigned int		   field_count;</div><div class='ctx'> </div><div class='del'>-	u8 			   bars[9][3];</div><div class='del'>-	u8 			   line[MAX_WIDTH * 4];</div><div class='add'>+	u8			   bars[9][3];</div><div class='add'>+	u8			   line[MAX_WIDTH * 8];</div><div class='add'>+	unsigned int		   pixelsize;</div><div class='add'>+	u8			   alpha_component;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* ------------------------------------------------------------------</div><div class='hunk'>@@ -283,6 +317,8 @@ static void precalculate_bars(struct vivi_dev *dev)</div><div class='ctx'> 		switch (dev-&gt;fmt-&gt;fourcc) {</div><div class='ctx'> 		case V4L2_PIX_FMT_YUYV:</div><div class='ctx'> 		case V4L2_PIX_FMT_UYVY:</div><div class='add'>+		case V4L2_PIX_FMT_YVYU:</div><div class='add'>+		case V4L2_PIX_FMT_VYUY:</div><div class='ctx'> 			is_yuv = 1;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case V4L2_PIX_FMT_RGB565:</div><div class='hunk'>@@ -297,6 +333,11 @@ static void precalculate_bars(struct vivi_dev *dev)</div><div class='ctx'> 			g &gt;&gt;= 3;</div><div class='ctx'> 			b &gt;&gt;= 3;</div><div class='ctx'> 			break;</div><div class='add'>+		case V4L2_PIX_FMT_RGB24:</div><div class='add'>+		case V4L2_PIX_FMT_BGR24:</div><div class='add'>+		case V4L2_PIX_FMT_RGB32:</div><div class='add'>+		case V4L2_PIX_FMT_BGR32:</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (is_yuv) {</div><div class='hunk'>@@ -316,9 +357,11 @@ static void precalculate_bars(struct vivi_dev *dev)</div><div class='ctx'> #define TSTAMP_INPUT_X	10</div><div class='ctx'> #define TSTAMP_MIN_X	(54 + TSTAMP_INPUT_X)</div><div class='ctx'> </div><div class='del'>-static void gen_twopix(struct vivi_dev *dev, u8 *buf, int colorpos)</div><div class='add'>+/* 'odd' is true for pixels 1, 3, 5, etc. and false for pixels 0, 2, 4, etc. */</div><div class='add'>+static void gen_twopix(struct vivi_dev *dev, u8 *buf, int colorpos, bool odd)</div><div class='ctx'> {</div><div class='ctx'> 	u8 r_y, g_u, b_v;</div><div class='add'>+	u8 alpha = dev-&gt;alpha_component;</div><div class='ctx'> 	int color;</div><div class='ctx'> 	u8 *p;</div><div class='ctx'> </div><div class='hunk'>@@ -326,46 +369,56 @@ static void gen_twopix(struct vivi_dev *dev, u8 *buf, int colorpos)</div><div class='ctx'> 	g_u = dev-&gt;bars[colorpos][1]; /* G or precalculated U */</div><div class='ctx'> 	b_v = dev-&gt;bars[colorpos][2]; /* B or precalculated V */</div><div class='ctx'> </div><div class='del'>-	for (color = 0; color &lt; 4; color++) {</div><div class='add'>+	for (color = 0; color &lt; dev-&gt;pixelsize; color++) {</div><div class='ctx'> 		p = buf + color;</div><div class='ctx'> </div><div class='ctx'> 		switch (dev-&gt;fmt-&gt;fourcc) {</div><div class='ctx'> 		case V4L2_PIX_FMT_YUYV:</div><div class='ctx'> 			switch (color) {</div><div class='ctx'> 			case 0:</div><div class='del'>-			case 2:</div><div class='ctx'> 				*p = r_y;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case 1:</div><div class='del'>-				*p = g_u;</div><div class='del'>-				break;</div><div class='del'>-			case 3:</div><div class='del'>-				*p = b_v;</div><div class='add'>+				*p = odd ? b_v : g_u;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case V4L2_PIX_FMT_UYVY:</div><div class='ctx'> 			switch (color) {</div><div class='add'>+			case 0:</div><div class='add'>+				*p = odd ? b_v : g_u;</div><div class='add'>+				break;</div><div class='ctx'> 			case 1:</div><div class='del'>-			case 3:</div><div class='ctx'> 				*p = r_y;</div><div class='ctx'> 				break;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case V4L2_PIX_FMT_YVYU:</div><div class='add'>+			switch (color) {</div><div class='ctx'> 			case 0:</div><div class='del'>-				*p = g_u;</div><div class='add'>+				*p = r_y;</div><div class='ctx'> 				break;</div><div class='del'>-			case 2:</div><div class='del'>-				*p = b_v;</div><div class='add'>+			case 1:</div><div class='add'>+				*p = odd ? g_u : b_v;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case V4L2_PIX_FMT_VYUY:</div><div class='add'>+			switch (color) {</div><div class='add'>+			case 0:</div><div class='add'>+				*p = odd ? g_u : b_v;</div><div class='add'>+				break;</div><div class='add'>+			case 1:</div><div class='add'>+				*p = r_y;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case V4L2_PIX_FMT_RGB565:</div><div class='ctx'> 			switch (color) {</div><div class='ctx'> 			case 0:</div><div class='del'>-			case 2:</div><div class='ctx'> 				*p = (g_u &lt;&lt; 5) | b_v;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case 1:</div><div class='del'>-			case 3:</div><div class='ctx'> 				*p = (r_y &lt;&lt; 3) | (g_u &gt;&gt; 3);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -373,11 +426,9 @@ static void gen_twopix(struct vivi_dev *dev, u8 *buf, int colorpos)</div><div class='ctx'> 		case V4L2_PIX_FMT_RGB565X:</div><div class='ctx'> 			switch (color) {</div><div class='ctx'> 			case 0:</div><div class='del'>-			case 2:</div><div class='ctx'> 				*p = (r_y &lt;&lt; 3) | (g_u &gt;&gt; 3);</div><div class='ctx'> 				break;</div><div class='ctx'> 			case 1:</div><div class='del'>-			case 3:</div><div class='ctx'> 				*p = (g_u &lt;&lt; 5) | b_v;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -385,24 +436,78 @@ static void gen_twopix(struct vivi_dev *dev, u8 *buf, int colorpos)</div><div class='ctx'> 		case V4L2_PIX_FMT_RGB555:</div><div class='ctx'> 			switch (color) {</div><div class='ctx'> 			case 0:</div><div class='del'>-			case 2:</div><div class='ctx'> 				*p = (g_u &lt;&lt; 5) | b_v;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case 1:</div><div class='del'>-			case 3:</div><div class='del'>-				*p = (r_y &lt;&lt; 2) | (g_u &gt;&gt; 3);</div><div class='add'>+				*p = (alpha &amp; 0x80) | (r_y &lt;&lt; 2) | (g_u &gt;&gt; 3);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case V4L2_PIX_FMT_RGB555X:</div><div class='ctx'> 			switch (color) {</div><div class='ctx'> 			case 0:</div><div class='add'>+				*p = (alpha &amp; 0x80) | (r_y &lt;&lt; 2) | (g_u &gt;&gt; 3);</div><div class='add'>+				break;</div><div class='add'>+			case 1:</div><div class='add'>+				*p = (g_u &lt;&lt; 5) | b_v;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case V4L2_PIX_FMT_RGB24:</div><div class='add'>+			switch (color) {</div><div class='add'>+			case 0:</div><div class='add'>+				*p = r_y;</div><div class='add'>+				break;</div><div class='add'>+			case 1:</div><div class='add'>+				*p = g_u;</div><div class='add'>+				break;</div><div class='ctx'> 			case 2:</div><div class='del'>-				*p = (r_y &lt;&lt; 2) | (g_u &gt;&gt; 3);</div><div class='add'>+				*p = b_v;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case V4L2_PIX_FMT_BGR24:</div><div class='add'>+			switch (color) {</div><div class='add'>+			case 0:</div><div class='add'>+				*p = b_v;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case 1:</div><div class='add'>+				*p = g_u;</div><div class='add'>+				break;</div><div class='add'>+			case 2:</div><div class='add'>+				*p = r_y;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case V4L2_PIX_FMT_RGB32:</div><div class='add'>+			switch (color) {</div><div class='add'>+			case 0:</div><div class='add'>+				*p = alpha;</div><div class='add'>+				break;</div><div class='add'>+			case 1:</div><div class='add'>+				*p = r_y;</div><div class='add'>+				break;</div><div class='add'>+			case 2:</div><div class='add'>+				*p = g_u;</div><div class='add'>+				break;</div><div class='ctx'> 			case 3:</div><div class='del'>-				*p = (g_u &lt;&lt; 5) | b_v;</div><div class='add'>+				*p = b_v;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case V4L2_PIX_FMT_BGR32:</div><div class='add'>+			switch (color) {</div><div class='add'>+			case 0:</div><div class='add'>+				*p = b_v;</div><div class='add'>+				break;</div><div class='add'>+			case 1:</div><div class='add'>+				*p = g_u;</div><div class='add'>+				break;</div><div class='add'>+			case 2:</div><div class='add'>+				*p = r_y;</div><div class='add'>+				break;</div><div class='add'>+			case 3:</div><div class='add'>+				*p = alpha;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -414,10 +519,10 @@ static void precalculate_line(struct vivi_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int w;</div><div class='ctx'> </div><div class='del'>-	for (w = 0; w &lt; dev-&gt;width * 2; w += 2) {</div><div class='del'>-		int colorpos = (w / (dev-&gt;width / 8) % 8);</div><div class='add'>+	for (w = 0; w &lt; dev-&gt;width * 2; w++) {</div><div class='add'>+		int colorpos = w / (dev-&gt;width / 8) % 8;</div><div class='ctx'> </div><div class='del'>-		gen_twopix(dev, dev-&gt;line + w * 2, colorpos);</div><div class='add'>+		gen_twopix(dev, dev-&gt;line + w * dev-&gt;pixelsize, colorpos, w &amp; 1);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -433,7 +538,7 @@ static void gen_text(struct vivi_dev *dev, char *basep,</div><div class='ctx'> 	/* Print stream time */</div><div class='ctx'> 	for (line = y; line &lt; y + 16; line++) {</div><div class='ctx'> 		int j = 0;</div><div class='del'>-		char *pos = basep + line * dev-&gt;width * 2 + x * 2;</div><div class='add'>+		char *pos = basep + line * dev-&gt;width * dev-&gt;pixelsize + x * dev-&gt;pixelsize;</div><div class='ctx'> 		char *s;</div><div class='ctx'> </div><div class='ctx'> 		for (s = text; *s; s++) {</div><div class='hunk'>@@ -443,9 +548,9 @@ static void gen_text(struct vivi_dev *dev, char *basep,</div><div class='ctx'> 			for (i = 0; i &lt; 7; i++, j++) {</div><div class='ctx'> 				/* Draw white font on black background */</div><div class='ctx'> 				if (chr &amp; (1 &lt;&lt; (7 - i)))</div><div class='del'>-					gen_twopix(dev, pos + j * 2, WHITE);</div><div class='add'>+					gen_twopix(dev, pos + j * dev-&gt;pixelsize, WHITE, (x+y) &amp; 1);</div><div class='ctx'> 				else</div><div class='del'>-					gen_twopix(dev, pos + j * 2, TEXT_BLACK);</div><div class='add'>+					gen_twopix(dev, pos + j * dev-&gt;pixelsize, TEXT_BLACK, (x+y) &amp; 1);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -466,7 +571,9 @@ static void vivi_fillbuff(struct vivi_dev *dev, struct vivi_buffer *buf)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (h = 0; h &lt; hmax; h++)</div><div class='del'>-		memcpy(vbuf + h * wmax * 2, dev-&gt;line + (dev-&gt;mv_count % wmax) * 2, wmax * 2);</div><div class='add'>+		memcpy(vbuf + h * wmax * dev-&gt;pixelsize,</div><div class='add'>+		       dev-&gt;line + (dev-&gt;mv_count % wmax) * dev-&gt;pixelsize,</div><div class='add'>+		       wmax * dev-&gt;pixelsize);</div><div class='ctx'> </div><div class='ctx'> 	/* Updates stream time */</div><div class='ctx'> </div><div class='hunk'>@@ -484,15 +591,16 @@ static void vivi_fillbuff(struct vivi_dev *dev, struct vivi_buffer *buf)</div><div class='ctx'> 	gen_text(dev, vbuf, line++ * 16, 16, str);</div><div class='ctx'> </div><div class='ctx'> 	gain = v4l2_ctrl_g_ctrl(dev-&gt;gain);</div><div class='del'>-	mutex_lock(&amp;dev-&gt;ctrl_handler.lock);</div><div class='add'>+	mutex_lock(dev-&gt;ctrl_handler.lock);</div><div class='ctx'> 	snprintf(str, sizeof(str), " brightness %3d, contrast %3d, saturation %3d, hue %d ",</div><div class='ctx'> 			dev-&gt;brightness-&gt;cur.val,</div><div class='ctx'> 			dev-&gt;contrast-&gt;cur.val,</div><div class='ctx'> 			dev-&gt;saturation-&gt;cur.val,</div><div class='ctx'> 			dev-&gt;hue-&gt;cur.val);</div><div class='ctx'> 	gen_text(dev, vbuf, line++ * 16, 16, str);</div><div class='del'>-	snprintf(str, sizeof(str), " autogain %d, gain %3d, volume %3d ",</div><div class='del'>-			dev-&gt;autogain-&gt;cur.val, gain, dev-&gt;volume-&gt;cur.val);</div><div class='add'>+	snprintf(str, sizeof(str), " autogain %d, gain %3d, volume %3d, alpha 0x%02x ",</div><div class='add'>+			dev-&gt;autogain-&gt;cur.val, gain, dev-&gt;volume-&gt;cur.val,</div><div class='add'>+			dev-&gt;alpha-&gt;cur.val);</div><div class='ctx'> 	gen_text(dev, vbuf, line++ * 16, 16, str);</div><div class='ctx'> 	snprintf(str, sizeof(str), " int32 %d, int64 %lld, bitmask %08x ",</div><div class='ctx'> 			dev-&gt;int32-&gt;cur.val,</div><div class='hunk'>@@ -503,8 +611,12 @@ static void vivi_fillbuff(struct vivi_dev *dev, struct vivi_buffer *buf)</div><div class='ctx'> 			dev-&gt;boolean-&gt;cur.val,</div><div class='ctx'> 			dev-&gt;menu-&gt;qmenu[dev-&gt;menu-&gt;cur.val],</div><div class='ctx'> 			dev-&gt;string-&gt;cur.string);</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;ctrl_handler.lock);</div><div class='ctx'> 	gen_text(dev, vbuf, line++ * 16, 16, str);</div><div class='add'>+	snprintf(str, sizeof(str), " integer_menu %lld, value %d ",</div><div class='add'>+			dev-&gt;int_menu-&gt;qmenu_int[dev-&gt;int_menu-&gt;cur.val],</div><div class='add'>+			dev-&gt;int_menu-&gt;cur.val);</div><div class='add'>+	gen_text(dev, vbuf, line++ * 16, 16, str);</div><div class='add'>+	mutex_unlock(dev-&gt;ctrl_handler.lock);</div><div class='ctx'> 	if (dev-&gt;button_pressed) {</div><div class='ctx'> 		dev-&gt;button_pressed--;</div><div class='ctx'> 		snprintf(str, sizeof(str), " button pressed!");</div><div class='hunk'>@@ -657,7 +769,7 @@ static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,</div><div class='ctx'> 	struct vivi_dev *dev = vb2_get_drv_priv(vq);</div><div class='ctx'> 	unsigned long size;</div><div class='ctx'> </div><div class='del'>-	size = dev-&gt;width * dev-&gt;height * 2;</div><div class='add'>+	size = dev-&gt;width * dev-&gt;height * dev-&gt;pixelsize;</div><div class='ctx'> </div><div class='ctx'> 	if (0 == *nbuffers)</div><div class='ctx'> 		*nbuffers = 32;</div><div class='hunk'>@@ -721,7 +833,7 @@ static int buffer_prepare(struct vb2_buffer *vb)</div><div class='ctx'> 	    dev-&gt;height &lt; 32 || dev-&gt;height &gt; MAX_HEIGHT)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	size = dev-&gt;width * dev-&gt;height * 2;</div><div class='add'>+	size = dev-&gt;width * dev-&gt;height * dev-&gt;pixelsize;</div><div class='ctx'> 	if (vb2_plane_size(vb, 0) &lt; size) {</div><div class='ctx'> 		dprintk(dev, 1, "%s data will not fit into plane (%lu &lt; %lu)\n",</div><div class='ctx'> 				__func__, vb2_plane_size(vb, 0), size);</div><div class='hunk'>@@ -915,6 +1027,7 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;fmt = get_format(f);</div><div class='add'>+	dev-&gt;pixelsize = dev-&gt;fmt-&gt;depth / 8;</div><div class='ctx'> 	dev-&gt;width = f-&gt;fmt.pix.width;</div><div class='ctx'> 	dev-&gt;height = f-&gt;fmt.pix.height;</div><div class='ctx'> 	dev-&gt;field = f-&gt;fmt.pix.field;</div><div class='hunk'>@@ -1016,8 +1129,15 @@ static int vivi_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='ctx'> 	struct vivi_dev *dev = container_of(ctrl-&gt;handler, struct vivi_dev, ctrl_handler);</div><div class='ctx'> </div><div class='del'>-	if (ctrl == dev-&gt;button)</div><div class='del'>-		dev-&gt;button_pressed = 30;</div><div class='add'>+	switch (ctrl-&gt;id) {</div><div class='add'>+	case V4L2_CID_ALPHA_COMPONENT:</div><div class='add'>+		dev-&gt;alpha_component = ctrl-&gt;val;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		if (ctrl == dev-&gt;button)</div><div class='add'>+			dev-&gt;button_pressed = 30;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1039,17 +1159,10 @@ static unsigned int</div><div class='ctx'> vivi_poll(struct file *file, struct poll_table_struct *wait)</div><div class='ctx'> {</div><div class='ctx'> 	struct vivi_dev *dev = video_drvdata(file);</div><div class='del'>-	struct v4l2_fh *fh = file-&gt;private_data;</div><div class='ctx'> 	struct vb2_queue *q = &amp;dev-&gt;vb_vidq;</div><div class='del'>-	unsigned int res;</div><div class='ctx'> </div><div class='ctx'> 	dprintk(dev, 1, "%s\n", __func__);</div><div class='del'>-	res = vb2_poll(q, file, wait);</div><div class='del'>-	if (v4l2_event_pending(fh))</div><div class='del'>-		res |= POLLPRI;</div><div class='del'>-	else</div><div class='del'>-		poll_wait(file, &amp;fh-&gt;wait, wait);</div><div class='del'>-	return res;</div><div class='add'>+	return vb2_poll(q, file, wait);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vivi_close(struct file *file)</div><div class='hunk'>@@ -1165,6 +1278,22 @@ static const struct v4l2_ctrl_config vivi_ctrl_bitmask = {</div><div class='ctx'> 	.step = 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const s64 vivi_ctrl_int_menu_values[] = {</div><div class='add'>+	1, 1, 2, 3, 5, 8, 13, 21, 42,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_config vivi_ctrl_int_menu = {</div><div class='add'>+	.ops = &amp;vivi_ctrl_ops,</div><div class='add'>+	.id = VIVI_CID_CUSTOM_BASE + 7,</div><div class='add'>+	.name = "Integer menu",</div><div class='add'>+	.type = V4L2_CTRL_TYPE_INTEGER_MENU,</div><div class='add'>+	.min = 1,</div><div class='add'>+	.max = 8,</div><div class='add'>+	.def = 4,</div><div class='add'>+	.menu_skip_mask = 0x02,</div><div class='add'>+	.qmenu_int = vivi_ctrl_int_menu_values,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct v4l2_file_operations vivi_fops = {</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='ctx'> 	.open           = v4l2_fh_open,</div><div class='hunk'>@@ -1252,6 +1381,7 @@ static int __init vivi_create_instance(int inst)</div><div class='ctx'> 	dev-&gt;fmt = &amp;formats[0];</div><div class='ctx'> 	dev-&gt;width = 640;</div><div class='ctx'> 	dev-&gt;height = 480;</div><div class='add'>+	dev-&gt;pixelsize = dev-&gt;fmt-&gt;depth / 8;</div><div class='ctx'> 	hdl = &amp;dev-&gt;ctrl_handler;</div><div class='ctx'> 	v4l2_ctrl_handler_init(hdl, 11);</div><div class='ctx'> 	dev-&gt;volume = v4l2_ctrl_new_std(hdl, &amp;vivi_ctrl_ops,</div><div class='hunk'>@@ -1268,6 +1398,8 @@ static int __init vivi_create_instance(int inst)</div><div class='ctx'> 			V4L2_CID_AUTOGAIN, 0, 1, 1, 1);</div><div class='ctx'> 	dev-&gt;gain = v4l2_ctrl_new_std(hdl, &amp;vivi_ctrl_ops,</div><div class='ctx'> 			V4L2_CID_GAIN, 0, 255, 1, 100);</div><div class='add'>+	dev-&gt;alpha = v4l2_ctrl_new_std(hdl, &amp;vivi_ctrl_ops,</div><div class='add'>+			V4L2_CID_ALPHA_COMPONENT, 0, 255, 1, 0);</div><div class='ctx'> 	dev-&gt;button = v4l2_ctrl_new_custom(hdl, &amp;vivi_ctrl_button, NULL);</div><div class='ctx'> 	dev-&gt;int32 = v4l2_ctrl_new_custom(hdl, &amp;vivi_ctrl_int32, NULL);</div><div class='ctx'> 	dev-&gt;int64 = v4l2_ctrl_new_custom(hdl, &amp;vivi_ctrl_int64, NULL);</div><div class='hunk'>@@ -1275,6 +1407,7 @@ static int __init vivi_create_instance(int inst)</div><div class='ctx'> 	dev-&gt;menu = v4l2_ctrl_new_custom(hdl, &amp;vivi_ctrl_menu, NULL);</div><div class='ctx'> 	dev-&gt;string = v4l2_ctrl_new_custom(hdl, &amp;vivi_ctrl_string, NULL);</div><div class='ctx'> 	dev-&gt;bitmask = v4l2_ctrl_new_custom(hdl, &amp;vivi_ctrl_bitmask, NULL);</div><div class='add'>+	dev-&gt;int_menu = v4l2_ctrl_new_custom(hdl, &amp;vivi_ctrl_int_menu, NULL);</div><div class='ctx'> 	if (hdl-&gt;error) {</div><div class='ctx'> 		ret = hdl-&gt;error;</div><div class='ctx'> 		goto unreg_dev;</div><div class='head'>diff --git a/drivers/media/video/w9966.c b/drivers/media/video/w9966.c<br/>index 7fd7ac567e1a..db2a6003a1c3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/w9966.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/w9966.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/w9966.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/w9966.c</a></div><div class='hunk'>@@ -62,6 +62,9 @@</div><div class='ctx'> #include &lt;media/v4l2-common.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-ioctl.h&gt;</div><div class='ctx'> #include &lt;media/v4l2-device.h&gt;</div><div class='add'>+#include &lt;media/v4l2-fh.h&gt;</div><div class='add'>+#include &lt;media/v4l2-ctrls.h&gt;</div><div class='add'>+#include &lt;media/v4l2-event.h&gt;</div><div class='ctx'> #include &lt;linux/parport.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*#define DEBUG*/				/* Undef me for production */</div><div class='hunk'>@@ -104,6 +107,7 @@</div><div class='ctx'> </div><div class='ctx'> struct w9966 {</div><div class='ctx'> 	struct v4l2_device v4l2_dev;</div><div class='add'>+	struct v4l2_ctrl_handler hdl;</div><div class='ctx'> 	unsigned char dev_state;</div><div class='ctx'> 	unsigned char i2c_state;</div><div class='ctx'> 	unsigned short ppmode;</div><div class='hunk'>@@ -567,7 +571,8 @@ static int cam_querycap(struct file *file, void  *priv,</div><div class='ctx'> 	strlcpy(vcap-&gt;driver, cam-&gt;v4l2_dev.name, sizeof(vcap-&gt;driver));</div><div class='ctx'> 	strlcpy(vcap-&gt;card, W9966_DRIVERNAME, sizeof(vcap-&gt;card));</div><div class='ctx'> 	strlcpy(vcap-&gt;bus_info, "parport", sizeof(vcap-&gt;bus_info));</div><div class='del'>-	vcap-&gt;capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE;</div><div class='add'>+	vcap-&gt;device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE;</div><div class='add'>+	vcap-&gt;capabilities = vcap-&gt;device_caps | V4L2_CAP_DEVICE_CAPS;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -595,67 +600,25 @@ static int cam_s_input(struct file *file, void *fh, unsigned int inp)</div><div class='ctx'> 	return (inp &gt; 0) ? -EINVAL : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cam_queryctrl(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_queryctrl *qc)</div><div class='add'>+static int cam_s_ctrl(struct v4l2_ctrl *ctrl)</div><div class='ctx'> {</div><div class='del'>-	switch (qc-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, 0, 255, 1, 128);</div><div class='del'>-	case V4L2_CID_CONTRAST:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, -64, 64, 1, 64);</div><div class='del'>-	case V4L2_CID_SATURATION:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, -64, 64, 1, 64);</div><div class='del'>-	case V4L2_CID_HUE:</div><div class='del'>-		return v4l2_ctrl_query_fill(qc, -128, 127, 1, 0);</div><div class='del'>-	}</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cam_g_ctrl(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_control *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct w9966 *cam = video_drvdata(file);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (ctrl-&gt;id) {</div><div class='del'>-	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		ctrl-&gt;value = cam-&gt;brightness;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_CONTRAST:</div><div class='del'>-		ctrl-&gt;value = cam-&gt;contrast;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_SATURATION:</div><div class='del'>-		ctrl-&gt;value = cam-&gt;color;</div><div class='del'>-		break;</div><div class='del'>-	case V4L2_CID_HUE:</div><div class='del'>-		ctrl-&gt;value = cam-&gt;hue;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cam_s_ctrl(struct file *file, void *priv,</div><div class='del'>-					struct v4l2_control *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct w9966 *cam = video_drvdata(file);</div><div class='add'>+	struct w9966 *cam =</div><div class='add'>+		container_of(ctrl-&gt;handler, struct w9966, hdl);</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;cam-&gt;lock);</div><div class='ctx'> 	switch (ctrl-&gt;id) {</div><div class='ctx'> 	case V4L2_CID_BRIGHTNESS:</div><div class='del'>-		cam-&gt;brightness = ctrl-&gt;value;</div><div class='add'>+		cam-&gt;brightness = ctrl-&gt;val;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_CONTRAST:</div><div class='del'>-		cam-&gt;contrast = ctrl-&gt;value;</div><div class='add'>+		cam-&gt;contrast = ctrl-&gt;val;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_SATURATION:</div><div class='del'>-		cam-&gt;color = ctrl-&gt;value;</div><div class='add'>+		cam-&gt;color = ctrl-&gt;val;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case V4L2_CID_HUE:</div><div class='del'>-		cam-&gt;hue = ctrl-&gt;value;</div><div class='add'>+		cam-&gt;hue = ctrl-&gt;val;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -813,6 +776,9 @@ out:</div><div class='ctx'> </div><div class='ctx'> static const struct v4l2_file_operations w9966_fops = {</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='add'>+	.open		= v4l2_fh_open,</div><div class='add'>+	.release	= v4l2_fh_release,</div><div class='add'>+	.poll		= v4l2_ctrl_poll,</div><div class='ctx'> 	.unlocked_ioctl = video_ioctl2,</div><div class='ctx'> 	.read           = w9966_v4l_read,</div><div class='ctx'> };</div><div class='hunk'>@@ -822,13 +788,17 @@ static const struct v4l2_ioctl_ops w9966_ioctl_ops = {</div><div class='ctx'> 	.vidioc_g_input      		    = cam_g_input,</div><div class='ctx'> 	.vidioc_s_input      		    = cam_s_input,</div><div class='ctx'> 	.vidioc_enum_input   		    = cam_enum_input,</div><div class='del'>-	.vidioc_queryctrl 		    = cam_queryctrl,</div><div class='del'>-	.vidioc_g_ctrl  		    = cam_g_ctrl,</div><div class='del'>-	.vidioc_s_ctrl 			    = cam_s_ctrl,</div><div class='ctx'> 	.vidioc_enum_fmt_vid_cap 	    = cam_enum_fmt_vid_cap,</div><div class='ctx'> 	.vidioc_g_fmt_vid_cap 		    = cam_g_fmt_vid_cap,</div><div class='ctx'> 	.vidioc_s_fmt_vid_cap  		    = cam_s_fmt_vid_cap,</div><div class='ctx'> 	.vidioc_try_fmt_vid_cap  	    = cam_try_fmt_vid_cap,</div><div class='add'>+	.vidioc_log_status		    = v4l2_ctrl_log_status,</div><div class='add'>+	.vidioc_subscribe_event		    = v4l2_ctrl_subscribe_event,</div><div class='add'>+	.vidioc_unsubscribe_event	    = v4l2_event_unsubscribe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct v4l2_ctrl_ops cam_ctrl_ops = {</div><div class='add'>+	.s_ctrl = cam_s_ctrl,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -849,6 +819,20 @@ static int w9966_init(struct w9966 *cam, struct parport *port)</div><div class='ctx'> 		v4l2_err(v4l2_dev, "Could not register v4l2_device\n");</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	v4l2_ctrl_handler_init(&amp;cam-&gt;hdl, 4);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;cam-&gt;hdl, &amp;cam_ctrl_ops,</div><div class='add'>+			  V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;cam-&gt;hdl, &amp;cam_ctrl_ops,</div><div class='add'>+			  V4L2_CID_CONTRAST, -64, 64, 1, 64);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;cam-&gt;hdl, &amp;cam_ctrl_ops,</div><div class='add'>+			  V4L2_CID_SATURATION, -64, 64, 1, 64);</div><div class='add'>+	v4l2_ctrl_new_std(&amp;cam-&gt;hdl, &amp;cam_ctrl_ops,</div><div class='add'>+			  V4L2_CID_HUE, -128, 127, 1, 0);</div><div class='add'>+	if (cam-&gt;hdl.error) {</div><div class='add'>+		v4l2_err(v4l2_dev, "couldn't register controls\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='ctx'> 	cam-&gt;pport = port;</div><div class='ctx'> 	cam-&gt;brightness = 128;</div><div class='ctx'> 	cam-&gt;contrast = 64;</div><div class='hunk'>@@ -898,6 +882,8 @@ static int w9966_init(struct w9966 *cam, struct parport *port)</div><div class='ctx'> 	cam-&gt;vdev.fops = &amp;w9966_fops;</div><div class='ctx'> 	cam-&gt;vdev.ioctl_ops = &amp;w9966_ioctl_ops;</div><div class='ctx'> 	cam-&gt;vdev.release = video_device_release_empty;</div><div class='add'>+	cam-&gt;vdev.ctrl_handler = &amp;cam-&gt;hdl;</div><div class='add'>+	set_bit(V4L2_FL_USE_FH_PRIO, &amp;cam-&gt;vdev.flags);</div><div class='ctx'> 	video_set_drvdata(&amp;cam-&gt;vdev, cam);</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;cam-&gt;lock);</div><div class='hunk'>@@ -923,6 +909,8 @@ static void w9966_term(struct w9966 *cam)</div><div class='ctx'> 		w9966_set_state(cam, W9966_STATE_VDEV, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	v4l2_ctrl_handler_free(&amp;cam-&gt;hdl);</div><div class='add'>+</div><div class='ctx'> 	/* Terminate from IEEE1284 mode and release pdev block */</div><div class='ctx'> 	if (w9966_get_state(cam, W9966_STATE_PDEV, W9966_STATE_PDEV)) {</div><div class='ctx'> 		w9966_pdev_claim(cam);</div><div class='head'>diff --git a/drivers/media/video/zoran/zoran_device.c b/drivers/media/video/zoran/zoran_device.c<br/>index e86173bd1327..a4cd504b8eee 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/zoran/zoran_device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/zoran/zoran_device.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/zoran/zoran_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/zoran/zoran_device.c</a></div><div class='hunk'>@@ -542,11 +542,9 @@ void write_overlay_mask(struct zoran_fh *fh, struct v4l2_clip *vp, int count)</div><div class='ctx'> 	u32 *mask;</div><div class='ctx'> 	int x, y, width, height;</div><div class='ctx'> 	unsigned i, j, k;</div><div class='del'>-	u32 reg;</div><div class='ctx'> </div><div class='ctx'> 	/* fill mask with one bits */</div><div class='ctx'> 	memset(fh-&gt;overlay_mask, ~0, mask_line_size * 4 * BUZ_MAX_HEIGHT);</div><div class='del'>-	reg = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; count; ++i) {</div><div class='ctx'> 		/* pick up local copy of clip */</div><div class='head'>diff --git a/drivers/media/video/zoran/zoran_driver.c b/drivers/media/video/zoran/zoran_driver.c<br/>index 4c09ab781ec3..c57310931810 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/zoran/zoran_driver.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/zoran/zoran_driver.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/zoran/zoran_driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/zoran/zoran_driver.c</a></div><div class='hunk'>@@ -1131,8 +1131,14 @@ static int setup_fbuffer(struct zoran_fh *fh,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int setup_window(struct zoran_fh *fh, int x, int y, int width, int height,</div><div class='del'>-	struct v4l2_clip __user *clips, int clipcount, void __user *bitmap)</div><div class='add'>+static int setup_window(struct zoran_fh *fh,</div><div class='add'>+			int x,</div><div class='add'>+			int y,</div><div class='add'>+			int width,</div><div class='add'>+			int height,</div><div class='add'>+			struct v4l2_clip __user *clips,</div><div class='add'>+			unsigned int clipcount,</div><div class='add'>+			void __user *bitmap)</div><div class='ctx'> {</div><div class='ctx'> 	struct zoran *zr = fh-&gt;zr;</div><div class='ctx'> 	struct v4l2_clip *vcp = NULL;</div><div class='hunk'>@@ -1155,6 +1161,14 @@ static int setup_window(struct zoran_fh *fh, int x, int y, int width, int height</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (clipcount &gt; 2048) {</div><div class='add'>+		dprintk(1,</div><div class='add'>+			KERN_ERR</div><div class='add'>+			"%s: %s - invalid clipcount\n",</div><div class='add'>+			 ZR_DEVNAME(zr), __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The video front end needs 4-byte alinged line sizes, we correct that</div><div class='ctx'> 	 * silently here if necessary</div><div class='hunk'>@@ -1218,7 +1232,7 @@ static int setup_window(struct zoran_fh *fh, int x, int y, int width, int height</div><div class='ctx'> 				   (width * height + 7) / 8)) {</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> 		}</div><div class='del'>-	} else if (clipcount &gt; 0) {</div><div class='add'>+	} else if (clipcount) {</div><div class='ctx'> 		/* write our own bitmap from the clips */</div><div class='ctx'> 		vcp = vmalloc(sizeof(struct v4l2_clip) * (clipcount + 4));</div><div class='ctx'> 		if (vcp == NULL) {</div><div class='head'>diff --git a/drivers/media/video/zr364xx.c b/drivers/media/video/zr364xx.c<br/>index cd2e39fc4bf0..e44cb330bbc8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/media/video/zr364xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/media/video/zr364xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/media/video/zr364xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/media/video/zr364xx.c</a></div><div class='hunk'>@@ -507,14 +507,12 @@ static void zr364xx_fillbuff(struct zr364xx_camera *cam,</div><div class='ctx'> 	const char *tmpbuf;</div><div class='ctx'> 	char *vbuf = videobuf_to_vmalloc(&amp;buf-&gt;vb);</div><div class='ctx'> 	unsigned long last_frame;</div><div class='del'>-	struct zr364xx_framei *frm;</div><div class='ctx'> </div><div class='ctx'> 	if (!vbuf)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	last_frame = cam-&gt;last_frame;</div><div class='ctx'> 	if (last_frame != -1) {</div><div class='del'>-		frm = &amp;cam-&gt;buffer.frame[last_frame];</div><div class='ctx'> 		tmpbuf = (const char *)cam-&gt;buffer.frame[last_frame].lpvbits;</div><div class='ctx'> 		switch (buf-&gt;fmt-&gt;fourcc) {</div><div class='ctx'> 		case V4L2_PIX_FMT_JPEG:</div><div class='head'>diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig<br/>new file mode 100644<br/>index 000000000000..067f31174a0e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/memory/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/memory/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+#</div><div class='add'>+# Memory devices</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+menuconfig MEMORY</div><div class='add'>+	bool "Memory Controller drivers"</div><div class='add'>+</div><div class='add'>+if MEMORY</div><div class='add'>+</div><div class='add'>+config TI_EMIF</div><div class='add'>+	tristate "Texas Instruments EMIF driver"</div><div class='add'>+	depends on ARCH_OMAP2PLUS</div><div class='add'>+	select DDR</div><div class='add'>+	help</div><div class='add'>+	  This driver is for the EMIF module available in Texas Instruments</div><div class='add'>+	  SoCs. EMIF is an SDRAM controller that, based on its revision,</div><div class='add'>+	  supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.</div><div class='add'>+	  This driver takes care of only LPDDR2 memories presently. The</div><div class='add'>+	  functions of the driver includes re-configuring AC timing</div><div class='add'>+	  parameters and other settings during frequency, voltage and</div><div class='add'>+	  temperature changes</div><div class='add'>+</div><div class='add'>+config TEGRA20_MC</div><div class='add'>+	bool "Tegra20 Memory Controller(MC) driver"</div><div class='add'>+	default y</div><div class='add'>+	depends on ARCH_TEGRA_2x_SOC</div><div class='add'>+	help</div><div class='add'>+	  This driver is for the Memory Controller(MC) module available</div><div class='add'>+	  in Tegra20 SoCs, mainly for a address translation fault</div><div class='add'>+	  analysis, especially for IOMMU/GART(Graphics Address</div><div class='add'>+	  Relocation Table) module.</div><div class='add'>+</div><div class='add'>+config TEGRA30_MC</div><div class='add'>+	bool "Tegra30 Memory Controller(MC) driver"</div><div class='add'>+	default y</div><div class='add'>+	depends on ARCH_TEGRA_3x_SOC</div><div class='add'>+	help</div><div class='add'>+	  This driver is for the Memory Controller(MC) module available</div><div class='add'>+	  in Tegra30 SoCs, mainly for a address translation fault</div><div class='add'>+	  analysis, especially for IOMMU/SMMU(System Memory Management</div><div class='add'>+	  Unit) module.</div><div class='add'>+</div><div class='add'>+endif</div><div class='head'>diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile<br/>new file mode 100644<br/>index 000000000000..42b3ce9d80fc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/memory/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/memory/Makefile</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+#</div><div class='add'>+# Makefile for memory devices</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_TI_EMIF)		+= emif.o</div><div class='add'>+obj-$(CONFIG_TEGRA20_MC)	+= tegra20-mc.o</div><div class='add'>+obj-$(CONFIG_TEGRA30_MC)	+= tegra30-mc.o</div><div class='head'>diff --git a/drivers/memory/emif.c b/drivers/memory/emif.c<br/>new file mode 100644<br/>index 000000000000..33a4396b24cb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/memory/emif.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/memory/emif.c</a></div><div class='hunk'>@@ -0,0 +1,1670 @@</div><div class='add'>+/*</div><div class='add'>+ * EMIF driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Texas Instruments, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Aneesh V &lt;aneesh@ti.com&gt;</div><div class='add'>+ * Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/reboot.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/emif_plat.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;memory/jedec_ddr.h&gt;</div><div class='add'>+#include "emif.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct emif_data - Per device static data for driver's use</div><div class='add'>+ * @duplicate:			Whether the DDR devices attached to this EMIF</div><div class='add'>+ *				instance are exactly same as that on EMIF1. In</div><div class='add'>+ *				this case we can save some memory and processing</div><div class='add'>+ * @temperature_level:		Maximum temperature of LPDDR2 devices attached</div><div class='add'>+ *				to this EMIF - read from MR4 register. If there</div><div class='add'>+ *				are two devices attached to this EMIF, this</div><div class='add'>+ *				value is the maximum of the two temperature</div><div class='add'>+ *				levels.</div><div class='add'>+ * @node:			node in the device list</div><div class='add'>+ * @base:			base address of memory-mapped IO registers.</div><div class='add'>+ * @dev:			device pointer.</div><div class='add'>+ * @addressing			table with addressing information from the spec</div><div class='add'>+ * @regs_cache:			An array of 'struct emif_regs' that stores</div><div class='add'>+ *				calculated register values for different</div><div class='add'>+ *				frequencies, to avoid re-calculating them on</div><div class='add'>+ *				each DVFS transition.</div><div class='add'>+ * @curr_regs:			The set of register values used in the last</div><div class='add'>+ *				frequency change (i.e. corresponding to the</div><div class='add'>+ *				frequency in effect at the moment)</div><div class='add'>+ * @plat_data:			Pointer to saved platform data.</div><div class='add'>+ * @debugfs_root:		dentry to the root folder for EMIF in debugfs</div><div class='add'>+ */</div><div class='add'>+struct emif_data {</div><div class='add'>+	u8				duplicate;</div><div class='add'>+	u8				temperature_level;</div><div class='add'>+	u8				lpmode;</div><div class='add'>+	struct list_head		node;</div><div class='add'>+	unsigned long			irq_state;</div><div class='add'>+	void __iomem			*base;</div><div class='add'>+	struct device			*dev;</div><div class='add'>+	const struct lpddr2_addressing	*addressing;</div><div class='add'>+	struct emif_regs		*regs_cache[EMIF_MAX_NUM_FREQUENCIES];</div><div class='add'>+	struct emif_regs		*curr_regs;</div><div class='add'>+	struct emif_platform_data	*plat_data;</div><div class='add'>+	struct dentry			*debugfs_root;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct emif_data *emif1;</div><div class='add'>+static spinlock_t	emif_lock;</div><div class='add'>+static unsigned long	irq_state;</div><div class='add'>+static u32		t_ck; /* DDR clock period in ps */</div><div class='add'>+static LIST_HEAD(device_list);</div><div class='add'>+</div><div class='add'>+static void do_emif_regdump_show(struct seq_file *s, struct emif_data *emif,</div><div class='add'>+	struct emif_regs *regs)</div><div class='add'>+{</div><div class='add'>+	u32 type = emif-&gt;plat_data-&gt;device_info-&gt;type;</div><div class='add'>+	u32 ip_rev = emif-&gt;plat_data-&gt;ip_rev;</div><div class='add'>+</div><div class='add'>+	seq_printf(s, "EMIF register cache dump for %dMHz\n",</div><div class='add'>+		regs-&gt;freq/1000000);</div><div class='add'>+</div><div class='add'>+	seq_printf(s, "ref_ctrl_shdw\t: 0x%08x\n", regs-&gt;ref_ctrl_shdw);</div><div class='add'>+	seq_printf(s, "sdram_tim1_shdw\t: 0x%08x\n", regs-&gt;sdram_tim1_shdw);</div><div class='add'>+	seq_printf(s, "sdram_tim2_shdw\t: 0x%08x\n", regs-&gt;sdram_tim2_shdw);</div><div class='add'>+	seq_printf(s, "sdram_tim3_shdw\t: 0x%08x\n", regs-&gt;sdram_tim3_shdw);</div><div class='add'>+</div><div class='add'>+	if (ip_rev == EMIF_4D) {</div><div class='add'>+		seq_printf(s, "read_idle_ctrl_shdw_normal\t: 0x%08x\n",</div><div class='add'>+			regs-&gt;read_idle_ctrl_shdw_normal);</div><div class='add'>+		seq_printf(s, "read_idle_ctrl_shdw_volt_ramp\t: 0x%08x\n",</div><div class='add'>+			regs-&gt;read_idle_ctrl_shdw_volt_ramp);</div><div class='add'>+	} else if (ip_rev == EMIF_4D5) {</div><div class='add'>+		seq_printf(s, "dll_calib_ctrl_shdw_normal\t: 0x%08x\n",</div><div class='add'>+			regs-&gt;dll_calib_ctrl_shdw_normal);</div><div class='add'>+		seq_printf(s, "dll_calib_ctrl_shdw_volt_ramp\t: 0x%08x\n",</div><div class='add'>+			regs-&gt;dll_calib_ctrl_shdw_volt_ramp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (type == DDR_TYPE_LPDDR2_S2 || type == DDR_TYPE_LPDDR2_S4) {</div><div class='add'>+		seq_printf(s, "ref_ctrl_shdw_derated\t: 0x%08x\n",</div><div class='add'>+			regs-&gt;ref_ctrl_shdw_derated);</div><div class='add'>+		seq_printf(s, "sdram_tim1_shdw_derated\t: 0x%08x\n",</div><div class='add'>+			regs-&gt;sdram_tim1_shdw_derated);</div><div class='add'>+		seq_printf(s, "sdram_tim3_shdw_derated\t: 0x%08x\n",</div><div class='add'>+			regs-&gt;sdram_tim3_shdw_derated);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emif_regdump_show(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	struct emif_data	*emif	= s-&gt;private;</div><div class='add'>+	struct emif_regs	**regs_cache;</div><div class='add'>+	int			i;</div><div class='add'>+</div><div class='add'>+	if (emif-&gt;duplicate)</div><div class='add'>+		regs_cache = emif1-&gt;regs_cache;</div><div class='add'>+	else</div><div class='add'>+		regs_cache = emif-&gt;regs_cache;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; EMIF_MAX_NUM_FREQUENCIES &amp;&amp; regs_cache[i]; i++) {</div><div class='add'>+		do_emif_regdump_show(s, emif, regs_cache[i]);</div><div class='add'>+		seq_printf(s, "\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emif_regdump_open(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	return single_open(file, emif_regdump_show, inode-&gt;i_private);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations emif_regdump_fops = {</div><div class='add'>+	.open			= emif_regdump_open,</div><div class='add'>+	.read			= seq_read,</div><div class='add'>+	.release		= single_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int emif_mr4_show(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	struct emif_data *emif = s-&gt;private;</div><div class='add'>+</div><div class='add'>+	seq_printf(s, "MR4=%d\n", emif-&gt;temperature_level);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emif_mr4_open(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	return single_open(file, emif_mr4_show, inode-&gt;i_private);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations emif_mr4_fops = {</div><div class='add'>+	.open			= emif_mr4_open,</div><div class='add'>+	.read			= seq_read,</div><div class='add'>+	.release		= single_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init_or_module emif_debugfs_init(struct emif_data *emif)</div><div class='add'>+{</div><div class='add'>+	struct dentry	*dentry;</div><div class='add'>+	int		ret;</div><div class='add'>+</div><div class='add'>+	dentry = debugfs_create_dir(dev_name(emif-&gt;dev), NULL);</div><div class='add'>+	if (IS_ERR(dentry)) {</div><div class='add'>+		ret = PTR_ERR(dentry);</div><div class='add'>+		goto err0;</div><div class='add'>+	}</div><div class='add'>+	emif-&gt;debugfs_root = dentry;</div><div class='add'>+</div><div class='add'>+	dentry = debugfs_create_file("regcache_dump", S_IRUGO,</div><div class='add'>+			emif-&gt;debugfs_root, emif, &amp;emif_regdump_fops);</div><div class='add'>+	if (IS_ERR(dentry)) {</div><div class='add'>+		ret = PTR_ERR(dentry);</div><div class='add'>+		goto err1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dentry = debugfs_create_file("mr4", S_IRUGO,</div><div class='add'>+			emif-&gt;debugfs_root, emif, &amp;emif_mr4_fops);</div><div class='add'>+	if (IS_ERR(dentry)) {</div><div class='add'>+		ret = PTR_ERR(dentry);</div><div class='add'>+		goto err1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err1:</div><div class='add'>+	debugfs_remove_recursive(emif-&gt;debugfs_root);</div><div class='add'>+err0:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit emif_debugfs_exit(struct emif_data *emif)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive(emif-&gt;debugfs_root);</div><div class='add'>+	emif-&gt;debugfs_root = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Calculate the period of DDR clock from frequency value</div><div class='add'>+ */</div><div class='add'>+static void set_ddr_clk_period(u32 freq)</div><div class='add'>+{</div><div class='add'>+	/* Divide 10^12 by frequency to get period in ps */</div><div class='add'>+	t_ck = (u32)DIV_ROUND_UP_ULL(1000000000000ull, freq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Get bus width used by EMIF. Note that this may be different from the</div><div class='add'>+ * bus width of the DDR devices used. For instance two 16-bit DDR devices</div><div class='add'>+ * may be connected to a given CS of EMIF. In this case bus width as far</div><div class='add'>+ * as EMIF is concerned is 32, where as the DDR bus width is 16 bits.</div><div class='add'>+ */</div><div class='add'>+static u32 get_emif_bus_width(struct emif_data *emif)</div><div class='add'>+{</div><div class='add'>+	u32		width;</div><div class='add'>+	void __iomem	*base = emif-&gt;base;</div><div class='add'>+</div><div class='add'>+	width = (readl(base + EMIF_SDRAM_CONFIG) &amp; NARROW_MODE_MASK)</div><div class='add'>+			&gt;&gt; NARROW_MODE_SHIFT;</div><div class='add'>+	width = width == 0 ? 32 : 16;</div><div class='add'>+</div><div class='add'>+	return width;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Get the CL from SDRAM_CONFIG register</div><div class='add'>+ */</div><div class='add'>+static u32 get_cl(struct emif_data *emif)</div><div class='add'>+{</div><div class='add'>+	u32		cl;</div><div class='add'>+	void __iomem	*base = emif-&gt;base;</div><div class='add'>+</div><div class='add'>+	cl = (readl(base + EMIF_SDRAM_CONFIG) &amp; CL_MASK) &gt;&gt; CL_SHIFT;</div><div class='add'>+</div><div class='add'>+	return cl;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_lpmode(struct emif_data *emif, u8 lpmode)</div><div class='add'>+{</div><div class='add'>+	u32 temp;</div><div class='add'>+	void __iomem *base = emif-&gt;base;</div><div class='add'>+</div><div class='add'>+	temp = readl(base + EMIF_POWER_MANAGEMENT_CONTROL);</div><div class='add'>+	temp &amp;= ~LP_MODE_MASK;</div><div class='add'>+	temp |= (lpmode &lt;&lt; LP_MODE_SHIFT);</div><div class='add'>+	writel(temp, base + EMIF_POWER_MANAGEMENT_CONTROL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void do_freq_update(void)</div><div class='add'>+{</div><div class='add'>+	struct emif_data *emif;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Workaround for errata i728: Disable LPMODE during FREQ_UPDATE</div><div class='add'>+	 *</div><div class='add'>+	 * i728 DESCRIPTION:</div><div class='add'>+	 * The EMIF automatically puts the SDRAM into self-refresh mode</div><div class='add'>+	 * after the EMIF has not performed accesses during</div><div class='add'>+	 * EMIF_PWR_MGMT_CTRL[7:4] REG_SR_TIM number of DDR clock cycles</div><div class='add'>+	 * and the EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE bit field is set</div><div class='add'>+	 * to 0x2. If during a small window the following three events</div><div class='add'>+	 * occur:</div><div class='add'>+	 * - The SR_TIMING counter expires</div><div class='add'>+	 * - And frequency change is requested</div><div class='add'>+	 * - And OCP access is requested</div><div class='add'>+	 * Then it causes instable clock on the DDR interface.</div><div class='add'>+	 *</div><div class='add'>+	 * WORKAROUND</div><div class='add'>+	 * To avoid the occurrence of the three events, the workaround</div><div class='add'>+	 * is to disable the self-refresh when requesting a frequency</div><div class='add'>+	 * change. Before requesting a frequency change the software must</div><div class='add'>+	 * program EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE to 0x0. When the</div><div class='add'>+	 * frequency change has been done, the software can reprogram</div><div class='add'>+	 * EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE to 0x2</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry(emif, &amp;device_list, node) {</div><div class='add'>+		if (emif-&gt;lpmode == EMIF_LP_MODE_SELF_REFRESH)</div><div class='add'>+			set_lpmode(emif, EMIF_LP_MODE_DISABLE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: Do FREQ_UPDATE here when an API</div><div class='add'>+	 * is available for this as part of the new</div><div class='add'>+	 * clock framework</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(emif, &amp;device_list, node) {</div><div class='add'>+		if (emif-&gt;lpmode == EMIF_LP_MODE_SELF_REFRESH)</div><div class='add'>+			set_lpmode(emif, EMIF_LP_MODE_SELF_REFRESH);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Find addressing table entry based on the device's type and density */</div><div class='add'>+static const struct lpddr2_addressing *get_addressing_table(</div><div class='add'>+	const struct ddr_device_info *device_info)</div><div class='add'>+{</div><div class='add'>+	u32		index, type, density;</div><div class='add'>+</div><div class='add'>+	type = device_info-&gt;type;</div><div class='add'>+	density = device_info-&gt;density;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case DDR_TYPE_LPDDR2_S4:</div><div class='add'>+		index = density - 1;</div><div class='add'>+		break;</div><div class='add'>+	case DDR_TYPE_LPDDR2_S2:</div><div class='add'>+		switch (density) {</div><div class='add'>+		case DDR_DENSITY_1Gb:</div><div class='add'>+		case DDR_DENSITY_2Gb:</div><div class='add'>+			index = density + 3;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			index = density - 1;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return &amp;lpddr2_jedec_addressing_table[index];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Find the the right timing table from the array of timing</div><div class='add'>+ * tables of the device using DDR clock frequency</div><div class='add'>+ */</div><div class='add'>+static const struct lpddr2_timings *get_timings_table(struct emif_data *emif,</div><div class='add'>+		u32 freq)</div><div class='add'>+{</div><div class='add'>+	u32				i, min, max, freq_nearest;</div><div class='add'>+	const struct lpddr2_timings	*timings = NULL;</div><div class='add'>+	const struct lpddr2_timings	*timings_arr = emif-&gt;plat_data-&gt;timings;</div><div class='add'>+	struct				device *dev = emif-&gt;dev;</div><div class='add'>+</div><div class='add'>+	/* Start with a very high frequency - 1GHz */</div><div class='add'>+	freq_nearest = 1000000000;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Find the timings table such that:</div><div class='add'>+	 *  1. the frequency range covers the required frequency(safe) AND</div><div class='add'>+	 *  2. the max_freq is closest to the required frequency(optimal)</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; emif-&gt;plat_data-&gt;timings_arr_size; i++) {</div><div class='add'>+		max = timings_arr[i].max_freq;</div><div class='add'>+		min = timings_arr[i].min_freq;</div><div class='add'>+		if ((freq &gt;= min) &amp;&amp; (freq &lt;= max) &amp;&amp; (max &lt; freq_nearest)) {</div><div class='add'>+			freq_nearest = max;</div><div class='add'>+			timings = &amp;timings_arr[i];</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!timings)</div><div class='add'>+		dev_err(dev, "%s: couldn't find timings for - %dHz\n",</div><div class='add'>+			__func__, freq);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "%s: timings table: freq %d, speed bin freq %d\n",</div><div class='add'>+		__func__, freq, freq_nearest);</div><div class='add'>+</div><div class='add'>+	return timings;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_sdram_ref_ctrl_shdw(u32 freq,</div><div class='add'>+		const struct lpddr2_addressing *addressing)</div><div class='add'>+{</div><div class='add'>+	u32 ref_ctrl_shdw = 0, val = 0, freq_khz, t_refi;</div><div class='add'>+</div><div class='add'>+	/* Scale down frequency and t_refi to avoid overflow */</div><div class='add'>+	freq_khz = freq / 1000;</div><div class='add'>+	t_refi = addressing-&gt;tREFI_ns / 100;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * refresh rate to be set is 'tREFI(in us) * freq in MHz</div><div class='add'>+	 * division by 10000 to account for change in units</div><div class='add'>+	 */</div><div class='add'>+	val = t_refi * freq_khz / 10000;</div><div class='add'>+	ref_ctrl_shdw |= val &lt;&lt; REFRESH_RATE_SHIFT;</div><div class='add'>+</div><div class='add'>+	return ref_ctrl_shdw;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_sdram_tim_1_shdw(const struct lpddr2_timings *timings,</div><div class='add'>+		const struct lpddr2_min_tck *min_tck,</div><div class='add'>+		const struct lpddr2_addressing *addressing)</div><div class='add'>+{</div><div class='add'>+	u32 tim1 = 0, val = 0;</div><div class='add'>+</div><div class='add'>+	val = max(min_tck-&gt;tWTR, DIV_ROUND_UP(timings-&gt;tWTR, t_ck)) - 1;</div><div class='add'>+	tim1 |= val &lt;&lt; T_WTR_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (addressing-&gt;num_banks == B8)</div><div class='add'>+		val = DIV_ROUND_UP(timings-&gt;tFAW, t_ck*4);</div><div class='add'>+	else</div><div class='add'>+		val = max(min_tck-&gt;tRRD, DIV_ROUND_UP(timings-&gt;tRRD, t_ck));</div><div class='add'>+	tim1 |= (val - 1) &lt;&lt; T_RRD_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = DIV_ROUND_UP(timings-&gt;tRAS_min + timings-&gt;tRPab, t_ck) - 1;</div><div class='add'>+	tim1 |= val &lt;&lt; T_RC_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = max(min_tck-&gt;tRASmin, DIV_ROUND_UP(timings-&gt;tRAS_min, t_ck));</div><div class='add'>+	tim1 |= (val - 1) &lt;&lt; T_RAS_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = max(min_tck-&gt;tWR, DIV_ROUND_UP(timings-&gt;tWR, t_ck)) - 1;</div><div class='add'>+	tim1 |= val &lt;&lt; T_WR_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = max(min_tck-&gt;tRCD, DIV_ROUND_UP(timings-&gt;tRCD, t_ck)) - 1;</div><div class='add'>+	tim1 |= val &lt;&lt; T_RCD_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = max(min_tck-&gt;tRPab, DIV_ROUND_UP(timings-&gt;tRPab, t_ck)) - 1;</div><div class='add'>+	tim1 |= val &lt;&lt; T_RP_SHIFT;</div><div class='add'>+</div><div class='add'>+	return tim1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_sdram_tim_1_shdw_derated(const struct lpddr2_timings *timings,</div><div class='add'>+		const struct lpddr2_min_tck *min_tck,</div><div class='add'>+		const struct lpddr2_addressing *addressing)</div><div class='add'>+{</div><div class='add'>+	u32 tim1 = 0, val = 0;</div><div class='add'>+</div><div class='add'>+	val = max(min_tck-&gt;tWTR, DIV_ROUND_UP(timings-&gt;tWTR, t_ck)) - 1;</div><div class='add'>+	tim1 = val &lt;&lt; T_WTR_SHIFT;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * tFAW is approximately 4 times tRRD. So add 1875*4 = 7500ps</div><div class='add'>+	 * to tFAW for de-rating</div><div class='add'>+	 */</div><div class='add'>+	if (addressing-&gt;num_banks == B8) {</div><div class='add'>+		val = DIV_ROUND_UP(timings-&gt;tFAW + 7500, 4 * t_ck) - 1;</div><div class='add'>+	} else {</div><div class='add'>+		val = DIV_ROUND_UP(timings-&gt;tRRD + 1875, t_ck);</div><div class='add'>+		val = max(min_tck-&gt;tRRD, val) - 1;</div><div class='add'>+	}</div><div class='add'>+	tim1 |= val &lt;&lt; T_RRD_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = DIV_ROUND_UP(timings-&gt;tRAS_min + timings-&gt;tRPab + 1875, t_ck);</div><div class='add'>+	tim1 |= (val - 1) &lt;&lt; T_RC_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = DIV_ROUND_UP(timings-&gt;tRAS_min + 1875, t_ck);</div><div class='add'>+	val = max(min_tck-&gt;tRASmin, val) - 1;</div><div class='add'>+	tim1 |= val &lt;&lt; T_RAS_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = max(min_tck-&gt;tWR, DIV_ROUND_UP(timings-&gt;tWR, t_ck)) - 1;</div><div class='add'>+	tim1 |= val &lt;&lt; T_WR_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = max(min_tck-&gt;tRCD, DIV_ROUND_UP(timings-&gt;tRCD + 1875, t_ck));</div><div class='add'>+	tim1 |= (val - 1) &lt;&lt; T_RCD_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = max(min_tck-&gt;tRPab, DIV_ROUND_UP(timings-&gt;tRPab + 1875, t_ck));</div><div class='add'>+	tim1 |= (val - 1) &lt;&lt; T_RP_SHIFT;</div><div class='add'>+</div><div class='add'>+	return tim1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_sdram_tim_2_shdw(const struct lpddr2_timings *timings,</div><div class='add'>+		const struct lpddr2_min_tck *min_tck,</div><div class='add'>+		const struct lpddr2_addressing *addressing,</div><div class='add'>+		u32 type)</div><div class='add'>+{</div><div class='add'>+	u32 tim2 = 0, val = 0;</div><div class='add'>+</div><div class='add'>+	val = min_tck-&gt;tCKE - 1;</div><div class='add'>+	tim2 |= val &lt;&lt; T_CKE_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = max(min_tck-&gt;tRTP, DIV_ROUND_UP(timings-&gt;tRTP, t_ck)) - 1;</div><div class='add'>+	tim2 |= val &lt;&lt; T_RTP_SHIFT;</div><div class='add'>+</div><div class='add'>+	/* tXSNR = tRFCab_ps + 10 ns(tRFCab_ps for LPDDR2). */</div><div class='add'>+	val = DIV_ROUND_UP(addressing-&gt;tRFCab_ps + 10000, t_ck) - 1;</div><div class='add'>+	tim2 |= val &lt;&lt; T_XSNR_SHIFT;</div><div class='add'>+</div><div class='add'>+	/* XSRD same as XSNR for LPDDR2 */</div><div class='add'>+	tim2 |= val &lt;&lt; T_XSRD_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = max(min_tck-&gt;tXP, DIV_ROUND_UP(timings-&gt;tXP, t_ck)) - 1;</div><div class='add'>+	tim2 |= val &lt;&lt; T_XP_SHIFT;</div><div class='add'>+</div><div class='add'>+	return tim2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_sdram_tim_3_shdw(const struct lpddr2_timings *timings,</div><div class='add'>+		const struct lpddr2_min_tck *min_tck,</div><div class='add'>+		const struct lpddr2_addressing *addressing,</div><div class='add'>+		u32 type, u32 ip_rev, u32 derated)</div><div class='add'>+{</div><div class='add'>+	u32 tim3 = 0, val = 0, t_dqsck;</div><div class='add'>+</div><div class='add'>+	val = timings-&gt;tRAS_max_ns / addressing-&gt;tREFI_ns - 1;</div><div class='add'>+	val = val &gt; 0xF ? 0xF : val;</div><div class='add'>+	tim3 |= val &lt;&lt; T_RAS_MAX_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = DIV_ROUND_UP(addressing-&gt;tRFCab_ps, t_ck) - 1;</div><div class='add'>+	tim3 |= val &lt;&lt; T_RFC_SHIFT;</div><div class='add'>+</div><div class='add'>+	t_dqsck = (derated == EMIF_DERATED_TIMINGS) ?</div><div class='add'>+		timings-&gt;tDQSCK_max_derated : timings-&gt;tDQSCK_max;</div><div class='add'>+	if (ip_rev == EMIF_4D5)</div><div class='add'>+		val = DIV_ROUND_UP(t_dqsck + 1000, t_ck) - 1;</div><div class='add'>+	else</div><div class='add'>+		val = DIV_ROUND_UP(t_dqsck, t_ck) - 1;</div><div class='add'>+</div><div class='add'>+	tim3 |= val &lt;&lt; T_TDQSCKMAX_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = DIV_ROUND_UP(timings-&gt;tZQCS, t_ck) - 1;</div><div class='add'>+	tim3 |= val &lt;&lt; ZQ_ZQCS_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = DIV_ROUND_UP(timings-&gt;tCKESR, t_ck);</div><div class='add'>+	val = max(min_tck-&gt;tCKESR, val) - 1;</div><div class='add'>+	tim3 |= val &lt;&lt; T_CKESR_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (ip_rev == EMIF_4D5) {</div><div class='add'>+		tim3 |= (EMIF_T_CSTA - 1) &lt;&lt; T_CSTA_SHIFT;</div><div class='add'>+</div><div class='add'>+		val = DIV_ROUND_UP(EMIF_T_PDLL_UL, 128) - 1;</div><div class='add'>+		tim3 |= val &lt;&lt; T_PDLL_UL_SHIFT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return tim3;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_zq_config_reg(const struct lpddr2_addressing *addressing,</div><div class='add'>+		bool cs1_used, bool cal_resistors_per_cs)</div><div class='add'>+{</div><div class='add'>+	u32 zq = 0, val = 0;</div><div class='add'>+</div><div class='add'>+	val = EMIF_ZQCS_INTERVAL_US * 1000 / addressing-&gt;tREFI_ns;</div><div class='add'>+	zq |= val &lt;&lt; ZQ_REFINTERVAL_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = DIV_ROUND_UP(T_ZQCL_DEFAULT_NS, T_ZQCS_DEFAULT_NS) - 1;</div><div class='add'>+	zq |= val &lt;&lt; ZQ_ZQCL_MULT_SHIFT;</div><div class='add'>+</div><div class='add'>+	val = DIV_ROUND_UP(T_ZQINIT_DEFAULT_NS, T_ZQCL_DEFAULT_NS) - 1;</div><div class='add'>+	zq |= val &lt;&lt; ZQ_ZQINIT_MULT_SHIFT;</div><div class='add'>+</div><div class='add'>+	zq |= ZQ_SFEXITEN_ENABLE &lt;&lt; ZQ_SFEXITEN_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (cal_resistors_per_cs)</div><div class='add'>+		zq |= ZQ_DUALCALEN_ENABLE &lt;&lt; ZQ_DUALCALEN_SHIFT;</div><div class='add'>+	else</div><div class='add'>+		zq |= ZQ_DUALCALEN_DISABLE &lt;&lt; ZQ_DUALCALEN_SHIFT;</div><div class='add'>+</div><div class='add'>+	zq |= ZQ_CS0EN_MASK; /* CS0 is used for sure */</div><div class='add'>+</div><div class='add'>+	val = cs1_used ? 1 : 0;</div><div class='add'>+	zq |= val &lt;&lt; ZQ_CS1EN_SHIFT;</div><div class='add'>+</div><div class='add'>+	return zq;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_temp_alert_config(const struct lpddr2_addressing *addressing,</div><div class='add'>+		const struct emif_custom_configs *custom_configs, bool cs1_used,</div><div class='add'>+		u32 sdram_io_width, u32 emif_bus_width)</div><div class='add'>+{</div><div class='add'>+	u32 alert = 0, interval, devcnt;</div><div class='add'>+</div><div class='add'>+	if (custom_configs &amp;&amp; (custom_configs-&gt;mask &amp;</div><div class='add'>+				EMIF_CUSTOM_CONFIG_TEMP_ALERT_POLL_INTERVAL))</div><div class='add'>+		interval = custom_configs-&gt;temp_alert_poll_interval_ms;</div><div class='add'>+	else</div><div class='add'>+		interval = TEMP_ALERT_POLL_INTERVAL_DEFAULT_MS;</div><div class='add'>+</div><div class='add'>+	interval *= 1000000;			/* Convert to ns */</div><div class='add'>+	interval /= addressing-&gt;tREFI_ns;	/* Convert to refresh cycles */</div><div class='add'>+	alert |= (interval &lt;&lt; TA_REFINTERVAL_SHIFT);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * sdram_io_width is in 'log2(x) - 1' form. Convert emif_bus_width</div><div class='add'>+	 * also to this form and subtract to get TA_DEVCNT, which is</div><div class='add'>+	 * in log2(x) form.</div><div class='add'>+	 */</div><div class='add'>+	emif_bus_width = __fls(emif_bus_width) - 1;</div><div class='add'>+	devcnt = emif_bus_width - sdram_io_width;</div><div class='add'>+	alert |= devcnt &lt;&lt; TA_DEVCNT_SHIFT;</div><div class='add'>+</div><div class='add'>+	/* DEVWDT is in 'log2(x) - 3' form */</div><div class='add'>+	alert |= (sdram_io_width - 2) &lt;&lt; TA_DEVWDT_SHIFT;</div><div class='add'>+</div><div class='add'>+	alert |= 1 &lt;&lt; TA_SFEXITEN_SHIFT;</div><div class='add'>+	alert |= 1 &lt;&lt; TA_CS0EN_SHIFT;</div><div class='add'>+	alert |= (cs1_used ? 1 : 0) &lt;&lt; TA_CS1EN_SHIFT;</div><div class='add'>+</div><div class='add'>+	return alert;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_read_idle_ctrl_shdw(u8 volt_ramp)</div><div class='add'>+{</div><div class='add'>+	u32 idle = 0, val = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Maximum value in normal conditions and increased frequency</div><div class='add'>+	 * when voltage is ramping</div><div class='add'>+	 */</div><div class='add'>+	if (volt_ramp)</div><div class='add'>+		val = READ_IDLE_INTERVAL_DVFS / t_ck / 64 - 1;</div><div class='add'>+	else</div><div class='add'>+		val = 0x1FF;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * READ_IDLE_CTRL register in EMIF4D has same offset and fields</div><div class='add'>+	 * as DLL_CALIB_CTRL in EMIF4D5, so use the same shifts</div><div class='add'>+	 */</div><div class='add'>+	idle |= val &lt;&lt; DLL_CALIB_INTERVAL_SHIFT;</div><div class='add'>+	idle |= EMIF_READ_IDLE_LEN_VAL &lt;&lt; ACK_WAIT_SHIFT;</div><div class='add'>+</div><div class='add'>+	return idle;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_dll_calib_ctrl_shdw(u8 volt_ramp)</div><div class='add'>+{</div><div class='add'>+	u32 calib = 0, val = 0;</div><div class='add'>+</div><div class='add'>+	if (volt_ramp == DDR_VOLTAGE_RAMPING)</div><div class='add'>+		val = DLL_CALIB_INTERVAL_DVFS / t_ck / 16 - 1;</div><div class='add'>+	else</div><div class='add'>+		val = 0; /* Disabled when voltage is stable */</div><div class='add'>+</div><div class='add'>+	calib |= val &lt;&lt; DLL_CALIB_INTERVAL_SHIFT;</div><div class='add'>+	calib |= DLL_CALIB_ACK_WAIT_VAL &lt;&lt; ACK_WAIT_SHIFT;</div><div class='add'>+</div><div class='add'>+	return calib;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_ddr_phy_ctrl_1_attilaphy_4d(const struct lpddr2_timings *timings,</div><div class='add'>+	u32 freq, u8 RL)</div><div class='add'>+{</div><div class='add'>+	u32 phy = EMIF_DDR_PHY_CTRL_1_BASE_VAL_ATTILAPHY, val = 0;</div><div class='add'>+</div><div class='add'>+	val = RL + DIV_ROUND_UP(timings-&gt;tDQSCK_max, t_ck) - 1;</div><div class='add'>+	phy |= val &lt;&lt; READ_LATENCY_SHIFT_4D;</div><div class='add'>+</div><div class='add'>+	if (freq &lt;= 100000000)</div><div class='add'>+		val = EMIF_DLL_SLAVE_DLY_CTRL_100_MHZ_AND_LESS_ATTILAPHY;</div><div class='add'>+	else if (freq &lt;= 200000000)</div><div class='add'>+		val = EMIF_DLL_SLAVE_DLY_CTRL_200_MHZ_ATTILAPHY;</div><div class='add'>+	else</div><div class='add'>+		val = EMIF_DLL_SLAVE_DLY_CTRL_400_MHZ_ATTILAPHY;</div><div class='add'>+</div><div class='add'>+	phy |= val &lt;&lt; DLL_SLAVE_DLY_CTRL_SHIFT_4D;</div><div class='add'>+</div><div class='add'>+	return phy;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_phy_ctrl_1_intelliphy_4d5(u32 freq, u8 cl)</div><div class='add'>+{</div><div class='add'>+	u32 phy = EMIF_DDR_PHY_CTRL_1_BASE_VAL_INTELLIPHY, half_delay;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * DLL operates at 266 MHz. If DDR frequency is near 266 MHz,</div><div class='add'>+	 * half-delay is not needed else set half-delay</div><div class='add'>+	 */</div><div class='add'>+	if (freq &gt;= 265000000 &amp;&amp; freq &lt; 267000000)</div><div class='add'>+		half_delay = 0;</div><div class='add'>+	else</div><div class='add'>+		half_delay = 1;</div><div class='add'>+</div><div class='add'>+	phy |= half_delay &lt;&lt; DLL_HALF_DELAY_SHIFT_4D5;</div><div class='add'>+	phy |= ((cl + DIV_ROUND_UP(EMIF_PHY_TOTAL_READ_LATENCY_INTELLIPHY_PS,</div><div class='add'>+			t_ck) - 1) &lt;&lt; READ_LATENCY_SHIFT_4D5);</div><div class='add'>+</div><div class='add'>+	return phy;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_ext_phy_ctrl_2_intelliphy_4d5(void)</div><div class='add'>+{</div><div class='add'>+	u32 fifo_we_slave_ratio;</div><div class='add'>+</div><div class='add'>+	fifo_we_slave_ratio =  DIV_ROUND_CLOSEST(</div><div class='add'>+		EMIF_INTELLI_PHY_DQS_GATE_OPENING_DELAY_PS * 256 , t_ck);</div><div class='add'>+</div><div class='add'>+	return fifo_we_slave_ratio | fifo_we_slave_ratio &lt;&lt; 11 |</div><div class='add'>+		fifo_we_slave_ratio &lt;&lt; 22;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_ext_phy_ctrl_3_intelliphy_4d5(void)</div><div class='add'>+{</div><div class='add'>+	u32 fifo_we_slave_ratio;</div><div class='add'>+</div><div class='add'>+	fifo_we_slave_ratio =  DIV_ROUND_CLOSEST(</div><div class='add'>+		EMIF_INTELLI_PHY_DQS_GATE_OPENING_DELAY_PS * 256 , t_ck);</div><div class='add'>+</div><div class='add'>+	return fifo_we_slave_ratio &gt;&gt; 10 | fifo_we_slave_ratio &lt;&lt; 1 |</div><div class='add'>+		fifo_we_slave_ratio &lt;&lt; 12 | fifo_we_slave_ratio &lt;&lt; 23;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_ext_phy_ctrl_4_intelliphy_4d5(void)</div><div class='add'>+{</div><div class='add'>+	u32 fifo_we_slave_ratio;</div><div class='add'>+</div><div class='add'>+	fifo_we_slave_ratio =  DIV_ROUND_CLOSEST(</div><div class='add'>+		EMIF_INTELLI_PHY_DQS_GATE_OPENING_DELAY_PS * 256 , t_ck);</div><div class='add'>+</div><div class='add'>+	return fifo_we_slave_ratio &gt;&gt; 9 | fifo_we_slave_ratio &lt;&lt; 2 |</div><div class='add'>+		fifo_we_slave_ratio &lt;&lt; 13;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_pwr_mgmt_ctrl(u32 freq, struct emif_data *emif, u32 ip_rev)</div><div class='add'>+{</div><div class='add'>+	u32 pwr_mgmt_ctrl	= 0, timeout;</div><div class='add'>+	u32 lpmode		= EMIF_LP_MODE_SELF_REFRESH;</div><div class='add'>+	u32 timeout_perf	= EMIF_LP_MODE_TIMEOUT_PERFORMANCE;</div><div class='add'>+	u32 timeout_pwr		= EMIF_LP_MODE_TIMEOUT_POWER;</div><div class='add'>+	u32 freq_threshold	= EMIF_LP_MODE_FREQ_THRESHOLD;</div><div class='add'>+</div><div class='add'>+	struct emif_custom_configs *cust_cfgs = emif-&gt;plat_data-&gt;custom_configs;</div><div class='add'>+</div><div class='add'>+	if (cust_cfgs &amp;&amp; (cust_cfgs-&gt;mask &amp; EMIF_CUSTOM_CONFIG_LPMODE)) {</div><div class='add'>+		lpmode		= cust_cfgs-&gt;lpmode;</div><div class='add'>+		timeout_perf	= cust_cfgs-&gt;lpmode_timeout_performance;</div><div class='add'>+		timeout_pwr	= cust_cfgs-&gt;lpmode_timeout_power;</div><div class='add'>+		freq_threshold  = cust_cfgs-&gt;lpmode_freq_threshold;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Timeout based on DDR frequency */</div><div class='add'>+	timeout = freq &gt;= freq_threshold ? timeout_perf : timeout_pwr;</div><div class='add'>+</div><div class='add'>+	/* The value to be set in register is "log2(timeout) - 3" */</div><div class='add'>+	if (timeout &lt; 16) {</div><div class='add'>+		timeout = 0;</div><div class='add'>+	} else {</div><div class='add'>+		timeout = __fls(timeout) - 3;</div><div class='add'>+		if (timeout &amp; (timeout - 1))</div><div class='add'>+			timeout++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (lpmode) {</div><div class='add'>+	case EMIF_LP_MODE_CLOCK_STOP:</div><div class='add'>+		pwr_mgmt_ctrl = (timeout &lt;&lt; CS_TIM_SHIFT) |</div><div class='add'>+					SR_TIM_MASK | PD_TIM_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case EMIF_LP_MODE_SELF_REFRESH:</div><div class='add'>+		/* Workaround for errata i735 */</div><div class='add'>+		if (timeout &lt; 6)</div><div class='add'>+			timeout = 6;</div><div class='add'>+</div><div class='add'>+		pwr_mgmt_ctrl = (timeout &lt;&lt; SR_TIM_SHIFT) |</div><div class='add'>+					CS_TIM_MASK | PD_TIM_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case EMIF_LP_MODE_PWR_DN:</div><div class='add'>+		pwr_mgmt_ctrl = (timeout &lt;&lt; PD_TIM_SHIFT) |</div><div class='add'>+					CS_TIM_MASK | SR_TIM_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case EMIF_LP_MODE_DISABLE:</div><div class='add'>+	default:</div><div class='add'>+		pwr_mgmt_ctrl = CS_TIM_MASK |</div><div class='add'>+					PD_TIM_MASK | SR_TIM_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* No CS_TIM in EMIF_4D5 */</div><div class='add'>+	if (ip_rev == EMIF_4D5)</div><div class='add'>+		pwr_mgmt_ctrl &amp;= ~CS_TIM_MASK;</div><div class='add'>+</div><div class='add'>+	pwr_mgmt_ctrl |= lpmode &lt;&lt; LP_MODE_SHIFT;</div><div class='add'>+</div><div class='add'>+	return pwr_mgmt_ctrl;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Get the temperature level of the EMIF instance:</div><div class='add'>+ * Reads the MR4 register of attached SDRAM parts to find out the temperature</div><div class='add'>+ * level. If there are two parts attached(one on each CS), then the temperature</div><div class='add'>+ * level for the EMIF instance is the higher of the two temperatures.</div><div class='add'>+ */</div><div class='add'>+static void get_temperature_level(struct emif_data *emif)</div><div class='add'>+{</div><div class='add'>+	u32		temp, temperature_level;</div><div class='add'>+	void __iomem	*base;</div><div class='add'>+</div><div class='add'>+	base = emif-&gt;base;</div><div class='add'>+</div><div class='add'>+	/* Read mode register 4 */</div><div class='add'>+	writel(DDR_MR4, base + EMIF_LPDDR2_MODE_REG_CONFIG);</div><div class='add'>+	temperature_level = readl(base + EMIF_LPDDR2_MODE_REG_DATA);</div><div class='add'>+	temperature_level = (temperature_level &amp; MR4_SDRAM_REF_RATE_MASK) &gt;&gt;</div><div class='add'>+				MR4_SDRAM_REF_RATE_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (emif-&gt;plat_data-&gt;device_info-&gt;cs1_used) {</div><div class='add'>+		writel(DDR_MR4 | CS_MASK, base + EMIF_LPDDR2_MODE_REG_CONFIG);</div><div class='add'>+		temp = readl(base + EMIF_LPDDR2_MODE_REG_DATA);</div><div class='add'>+		temp = (temp &amp; MR4_SDRAM_REF_RATE_MASK)</div><div class='add'>+				&gt;&gt; MR4_SDRAM_REF_RATE_SHIFT;</div><div class='add'>+		temperature_level = max(temp, temperature_level);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* treat everything less than nominal(3) in MR4 as nominal */</div><div class='add'>+	if (unlikely(temperature_level &lt; SDRAM_TEMP_NOMINAL))</div><div class='add'>+		temperature_level = SDRAM_TEMP_NOMINAL;</div><div class='add'>+</div><div class='add'>+	/* if we get reserved value in MR4 persist with the existing value */</div><div class='add'>+	if (likely(temperature_level != SDRAM_TEMP_RESERVED_4))</div><div class='add'>+		emif-&gt;temperature_level = temperature_level;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Program EMIF shadow registers that are not dependent on temperature</div><div class='add'>+ * or voltage</div><div class='add'>+ */</div><div class='add'>+static void setup_registers(struct emif_data *emif, struct emif_regs *regs)</div><div class='add'>+{</div><div class='add'>+	void __iomem	*base = emif-&gt;base;</div><div class='add'>+</div><div class='add'>+	writel(regs-&gt;sdram_tim2_shdw, base + EMIF_SDRAM_TIMING_2_SHDW);</div><div class='add'>+	writel(regs-&gt;phy_ctrl_1_shdw, base + EMIF_DDR_PHY_CTRL_1_SHDW);</div><div class='add'>+</div><div class='add'>+	/* Settings specific for EMIF4D5 */</div><div class='add'>+	if (emif-&gt;plat_data-&gt;ip_rev != EMIF_4D5)</div><div class='add'>+		return;</div><div class='add'>+	writel(regs-&gt;ext_phy_ctrl_2_shdw, base + EMIF_EXT_PHY_CTRL_2_SHDW);</div><div class='add'>+	writel(regs-&gt;ext_phy_ctrl_3_shdw, base + EMIF_EXT_PHY_CTRL_3_SHDW);</div><div class='add'>+	writel(regs-&gt;ext_phy_ctrl_4_shdw, base + EMIF_EXT_PHY_CTRL_4_SHDW);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * When voltage ramps dll calibration and forced read idle should</div><div class='add'>+ * happen more often</div><div class='add'>+ */</div><div class='add'>+static void setup_volt_sensitive_regs(struct emif_data *emif,</div><div class='add'>+		struct emif_regs *regs, u32 volt_state)</div><div class='add'>+{</div><div class='add'>+	u32		calib_ctrl;</div><div class='add'>+	void __iomem	*base = emif-&gt;base;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * EMIF_READ_IDLE_CTRL in EMIF4D refers to the same register as</div><div class='add'>+	 * EMIF_DLL_CALIB_CTRL in EMIF4D5 and dll_calib_ctrl_shadow_*</div><div class='add'>+	 * is an alias of the respective read_idle_ctrl_shdw_* (members of</div><div class='add'>+	 * a union). So, the below code takes care of both cases</div><div class='add'>+	 */</div><div class='add'>+	if (volt_state == DDR_VOLTAGE_RAMPING)</div><div class='add'>+		calib_ctrl = regs-&gt;dll_calib_ctrl_shdw_volt_ramp;</div><div class='add'>+	else</div><div class='add'>+		calib_ctrl = regs-&gt;dll_calib_ctrl_shdw_normal;</div><div class='add'>+</div><div class='add'>+	writel(calib_ctrl, base + EMIF_DLL_CALIB_CTRL_SHDW);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * setup_temperature_sensitive_regs() - set the timings for temperature</div><div class='add'>+ * sensitive registers. This happens once at initialisation time based</div><div class='add'>+ * on the temperature at boot time and subsequently based on the temperature</div><div class='add'>+ * alert interrupt. Temperature alert can happen when the temperature</div><div class='add'>+ * increases or drops. So this function can have the effect of either</div><div class='add'>+ * derating the timings or going back to nominal values.</div><div class='add'>+ */</div><div class='add'>+static void setup_temperature_sensitive_regs(struct emif_data *emif,</div><div class='add'>+		struct emif_regs *regs)</div><div class='add'>+{</div><div class='add'>+	u32		tim1, tim3, ref_ctrl, type;</div><div class='add'>+	void __iomem	*base = emif-&gt;base;</div><div class='add'>+	u32		temperature;</div><div class='add'>+</div><div class='add'>+	type = emif-&gt;plat_data-&gt;device_info-&gt;type;</div><div class='add'>+</div><div class='add'>+	tim1 = regs-&gt;sdram_tim1_shdw;</div><div class='add'>+	tim3 = regs-&gt;sdram_tim3_shdw;</div><div class='add'>+	ref_ctrl = regs-&gt;ref_ctrl_shdw;</div><div class='add'>+</div><div class='add'>+	/* No de-rating for non-lpddr2 devices */</div><div class='add'>+	if (type != DDR_TYPE_LPDDR2_S2 &amp;&amp; type != DDR_TYPE_LPDDR2_S4)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	temperature = emif-&gt;temperature_level;</div><div class='add'>+	if (temperature == SDRAM_TEMP_HIGH_DERATE_REFRESH) {</div><div class='add'>+		ref_ctrl = regs-&gt;ref_ctrl_shdw_derated;</div><div class='add'>+	} else if (temperature == SDRAM_TEMP_HIGH_DERATE_REFRESH_AND_TIMINGS) {</div><div class='add'>+		tim1 = regs-&gt;sdram_tim1_shdw_derated;</div><div class='add'>+		tim3 = regs-&gt;sdram_tim3_shdw_derated;</div><div class='add'>+		ref_ctrl = regs-&gt;ref_ctrl_shdw_derated;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	writel(tim1, base + EMIF_SDRAM_TIMING_1_SHDW);</div><div class='add'>+	writel(tim3, base + EMIF_SDRAM_TIMING_3_SHDW);</div><div class='add'>+	writel(ref_ctrl, base + EMIF_SDRAM_REFRESH_CTRL_SHDW);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t handle_temp_alert(void __iomem *base, struct emif_data *emif)</div><div class='add'>+{</div><div class='add'>+	u32		old_temp_level;</div><div class='add'>+	irqreturn_t	ret = IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;emif_lock, irq_state);</div><div class='add'>+	old_temp_level = emif-&gt;temperature_level;</div><div class='add'>+	get_temperature_level(emif);</div><div class='add'>+</div><div class='add'>+	if (unlikely(emif-&gt;temperature_level == old_temp_level)) {</div><div class='add'>+		goto out;</div><div class='add'>+	} else if (!emif-&gt;curr_regs) {</div><div class='add'>+		dev_err(emif-&gt;dev, "temperature alert before registers are calculated, not de-rating timings\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (emif-&gt;temperature_level &lt; old_temp_level ||</div><div class='add'>+		emif-&gt;temperature_level == SDRAM_TEMP_VERY_HIGH_SHUTDOWN) {</div><div class='add'>+		/*</div><div class='add'>+		 * Temperature coming down - defer handling to thread OR</div><div class='add'>+		 * Temperature far too high - do kernel_power_off() from</div><div class='add'>+		 * thread context</div><div class='add'>+		 */</div><div class='add'>+		ret = IRQ_WAKE_THREAD;</div><div class='add'>+	} else {</div><div class='add'>+		/* Temperature is going up - handle immediately */</div><div class='add'>+		setup_temperature_sensitive_regs(emif, emif-&gt;curr_regs);</div><div class='add'>+		do_freq_update();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	spin_unlock_irqrestore(&amp;emif_lock, irq_state);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t emif_interrupt_handler(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	u32			interrupts;</div><div class='add'>+	struct emif_data	*emif = dev_id;</div><div class='add'>+	void __iomem		*base = emif-&gt;base;</div><div class='add'>+	struct device		*dev = emif-&gt;dev;</div><div class='add'>+	irqreturn_t		ret = IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+	/* Save the status and clear it */</div><div class='add'>+	interrupts = readl(base + EMIF_SYSTEM_OCP_INTERRUPT_STATUS);</div><div class='add'>+	writel(interrupts, base + EMIF_SYSTEM_OCP_INTERRUPT_STATUS);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Handle temperature alert</div><div class='add'>+	 * Temperature alert should be same for all ports</div><div class='add'>+	 * So, it's enough to process it only for one of the ports</div><div class='add'>+	 */</div><div class='add'>+	if (interrupts &amp; TA_SYS_MASK)</div><div class='add'>+		ret = handle_temp_alert(base, emif);</div><div class='add'>+</div><div class='add'>+	if (interrupts &amp; ERR_SYS_MASK)</div><div class='add'>+		dev_err(dev, "Access error from SYS port - %x\n", interrupts);</div><div class='add'>+</div><div class='add'>+	if (emif-&gt;plat_data-&gt;hw_caps &amp; EMIF_HW_CAPS_LL_INTERFACE) {</div><div class='add'>+		/* Save the status and clear it */</div><div class='add'>+		interrupts = readl(base + EMIF_LL_OCP_INTERRUPT_STATUS);</div><div class='add'>+		writel(interrupts, base + EMIF_LL_OCP_INTERRUPT_STATUS);</div><div class='add'>+</div><div class='add'>+		if (interrupts &amp; ERR_LL_MASK)</div><div class='add'>+			dev_err(dev, "Access error from LL port - %x\n",</div><div class='add'>+				interrupts);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t emif_threaded_isr(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct emif_data	*emif = dev_id;</div><div class='add'>+</div><div class='add'>+	if (emif-&gt;temperature_level == SDRAM_TEMP_VERY_HIGH_SHUTDOWN) {</div><div class='add'>+		dev_emerg(emif-&gt;dev, "SDRAM temperature exceeds operating limit.. Needs shut down!!!\n");</div><div class='add'>+		kernel_power_off();</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;emif_lock, irq_state);</div><div class='add'>+</div><div class='add'>+	if (emif-&gt;curr_regs) {</div><div class='add'>+		setup_temperature_sensitive_regs(emif, emif-&gt;curr_regs);</div><div class='add'>+		do_freq_update();</div><div class='add'>+	} else {</div><div class='add'>+		dev_err(emif-&gt;dev, "temperature alert before registers are calculated, not de-rating timings\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;emif_lock, irq_state);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clear_all_interrupts(struct emif_data *emif)</div><div class='add'>+{</div><div class='add'>+	void __iomem	*base = emif-&gt;base;</div><div class='add'>+</div><div class='add'>+	writel(readl(base + EMIF_SYSTEM_OCP_INTERRUPT_STATUS),</div><div class='add'>+		base + EMIF_SYSTEM_OCP_INTERRUPT_STATUS);</div><div class='add'>+	if (emif-&gt;plat_data-&gt;hw_caps &amp; EMIF_HW_CAPS_LL_INTERFACE)</div><div class='add'>+		writel(readl(base + EMIF_LL_OCP_INTERRUPT_STATUS),</div><div class='add'>+			base + EMIF_LL_OCP_INTERRUPT_STATUS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disable_and_clear_all_interrupts(struct emif_data *emif)</div><div class='add'>+{</div><div class='add'>+	void __iomem		*base = emif-&gt;base;</div><div class='add'>+</div><div class='add'>+	/* Disable all interrupts */</div><div class='add'>+	writel(readl(base + EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_SET),</div><div class='add'>+		base + EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_CLEAR);</div><div class='add'>+	if (emif-&gt;plat_data-&gt;hw_caps &amp; EMIF_HW_CAPS_LL_INTERFACE)</div><div class='add'>+		writel(readl(base + EMIF_LL_OCP_INTERRUPT_ENABLE_SET),</div><div class='add'>+			base + EMIF_LL_OCP_INTERRUPT_ENABLE_CLEAR);</div><div class='add'>+</div><div class='add'>+	/* Clear all interrupts */</div><div class='add'>+	clear_all_interrupts(emif);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init_or_module setup_interrupts(struct emif_data *emif, u32 irq)</div><div class='add'>+{</div><div class='add'>+	u32		interrupts, type;</div><div class='add'>+	void __iomem	*base = emif-&gt;base;</div><div class='add'>+</div><div class='add'>+	type = emif-&gt;plat_data-&gt;device_info-&gt;type;</div><div class='add'>+</div><div class='add'>+	clear_all_interrupts(emif);</div><div class='add'>+</div><div class='add'>+	/* Enable interrupts for SYS interface */</div><div class='add'>+	interrupts = EN_ERR_SYS_MASK;</div><div class='add'>+	if (type == DDR_TYPE_LPDDR2_S2 || type == DDR_TYPE_LPDDR2_S4)</div><div class='add'>+		interrupts |= EN_TA_SYS_MASK;</div><div class='add'>+	writel(interrupts, base + EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_SET);</div><div class='add'>+</div><div class='add'>+	/* Enable interrupts for LL interface */</div><div class='add'>+	if (emif-&gt;plat_data-&gt;hw_caps &amp; EMIF_HW_CAPS_LL_INTERFACE) {</div><div class='add'>+		/* TA need not be enabled for LL */</div><div class='add'>+		interrupts = EN_ERR_LL_MASK;</div><div class='add'>+		writel(interrupts, base + EMIF_LL_OCP_INTERRUPT_ENABLE_SET);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* setup IRQ handlers */</div><div class='add'>+	return devm_request_threaded_irq(emif-&gt;dev, irq,</div><div class='add'>+				    emif_interrupt_handler,</div><div class='add'>+				    emif_threaded_isr,</div><div class='add'>+				    0, dev_name(emif-&gt;dev),</div><div class='add'>+				    emif);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init_or_module emif_onetime_settings(struct emif_data *emif)</div><div class='add'>+{</div><div class='add'>+	u32				pwr_mgmt_ctrl, zq, temp_alert_cfg;</div><div class='add'>+	void __iomem			*base = emif-&gt;base;</div><div class='add'>+	const struct lpddr2_addressing	*addressing;</div><div class='add'>+	const struct ddr_device_info	*device_info;</div><div class='add'>+</div><div class='add'>+	device_info = emif-&gt;plat_data-&gt;device_info;</div><div class='add'>+	addressing = get_addressing_table(device_info);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Init power management settings</div><div class='add'>+	 * We don't know the frequency yet. Use a high frequency</div><div class='add'>+	 * value for a conservative timeout setting</div><div class='add'>+	 */</div><div class='add'>+	pwr_mgmt_ctrl = get_pwr_mgmt_ctrl(1000000000, emif,</div><div class='add'>+			emif-&gt;plat_data-&gt;ip_rev);</div><div class='add'>+	emif-&gt;lpmode = (pwr_mgmt_ctrl &amp; LP_MODE_MASK) &gt;&gt; LP_MODE_SHIFT;</div><div class='add'>+	writel(pwr_mgmt_ctrl, base + EMIF_POWER_MANAGEMENT_CONTROL);</div><div class='add'>+</div><div class='add'>+	/* Init ZQ calibration settings */</div><div class='add'>+	zq = get_zq_config_reg(addressing, device_info-&gt;cs1_used,</div><div class='add'>+		device_info-&gt;cal_resistors_per_cs);</div><div class='add'>+	writel(zq, base + EMIF_SDRAM_OUTPUT_IMPEDANCE_CALIBRATION_CONFIG);</div><div class='add'>+</div><div class='add'>+	/* Check temperature level temperature level*/</div><div class='add'>+	get_temperature_level(emif);</div><div class='add'>+	if (emif-&gt;temperature_level == SDRAM_TEMP_VERY_HIGH_SHUTDOWN)</div><div class='add'>+		dev_emerg(emif-&gt;dev, "SDRAM temperature exceeds operating limit.. Needs shut down!!!\n");</div><div class='add'>+</div><div class='add'>+	/* Init temperature polling */</div><div class='add'>+	temp_alert_cfg = get_temp_alert_config(addressing,</div><div class='add'>+		emif-&gt;plat_data-&gt;custom_configs, device_info-&gt;cs1_used,</div><div class='add'>+		device_info-&gt;io_width, get_emif_bus_width(emif));</div><div class='add'>+	writel(temp_alert_cfg, base + EMIF_TEMPERATURE_ALERT_CONFIG);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Program external PHY control registers that are not frequency</div><div class='add'>+	 * dependent</div><div class='add'>+	 */</div><div class='add'>+	if (emif-&gt;plat_data-&gt;phy_type != EMIF_PHY_TYPE_INTELLIPHY)</div><div class='add'>+		return;</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_1_VAL, base + EMIF_EXT_PHY_CTRL_1_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_5_VAL, base + EMIF_EXT_PHY_CTRL_5_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_6_VAL, base + EMIF_EXT_PHY_CTRL_6_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_7_VAL, base + EMIF_EXT_PHY_CTRL_7_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_8_VAL, base + EMIF_EXT_PHY_CTRL_8_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_9_VAL, base + EMIF_EXT_PHY_CTRL_9_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_10_VAL, base + EMIF_EXT_PHY_CTRL_10_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_11_VAL, base + EMIF_EXT_PHY_CTRL_11_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_12_VAL, base + EMIF_EXT_PHY_CTRL_12_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_13_VAL, base + EMIF_EXT_PHY_CTRL_13_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_14_VAL, base + EMIF_EXT_PHY_CTRL_14_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_15_VAL, base + EMIF_EXT_PHY_CTRL_15_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_16_VAL, base + EMIF_EXT_PHY_CTRL_16_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_17_VAL, base + EMIF_EXT_PHY_CTRL_17_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_18_VAL, base + EMIF_EXT_PHY_CTRL_18_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_19_VAL, base + EMIF_EXT_PHY_CTRL_19_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_20_VAL, base + EMIF_EXT_PHY_CTRL_20_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_21_VAL, base + EMIF_EXT_PHY_CTRL_21_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_22_VAL, base + EMIF_EXT_PHY_CTRL_22_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_23_VAL, base + EMIF_EXT_PHY_CTRL_23_SHDW);</div><div class='add'>+	writel(EMIF_EXT_PHY_CTRL_24_VAL, base + EMIF_EXT_PHY_CTRL_24_SHDW);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void get_default_timings(struct emif_data *emif)</div><div class='add'>+{</div><div class='add'>+	struct emif_platform_data *pd = emif-&gt;plat_data;</div><div class='add'>+</div><div class='add'>+	pd-&gt;timings		= lpddr2_jedec_timings;</div><div class='add'>+	pd-&gt;timings_arr_size	= ARRAY_SIZE(lpddr2_jedec_timings);</div><div class='add'>+</div><div class='add'>+	dev_warn(emif-&gt;dev, "%s: using default timings\n", __func__);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int is_dev_data_valid(u32 type, u32 density, u32 io_width, u32 phy_type,</div><div class='add'>+		u32 ip_rev, struct device *dev)</div><div class='add'>+{</div><div class='add'>+	int valid;</div><div class='add'>+</div><div class='add'>+	valid = (type == DDR_TYPE_LPDDR2_S4 ||</div><div class='add'>+			type == DDR_TYPE_LPDDR2_S2)</div><div class='add'>+		&amp;&amp; (density &gt;= DDR_DENSITY_64Mb</div><div class='add'>+			&amp;&amp; density &lt;= DDR_DENSITY_8Gb)</div><div class='add'>+		&amp;&amp; (io_width &gt;= DDR_IO_WIDTH_8</div><div class='add'>+			&amp;&amp; io_width &lt;= DDR_IO_WIDTH_32);</div><div class='add'>+</div><div class='add'>+	/* Combinations of EMIF and PHY revisions that we support today */</div><div class='add'>+	switch (ip_rev) {</div><div class='add'>+	case EMIF_4D:</div><div class='add'>+		valid = valid &amp;&amp; (phy_type == EMIF_PHY_TYPE_ATTILAPHY);</div><div class='add'>+		break;</div><div class='add'>+	case EMIF_4D5:</div><div class='add'>+		valid = valid &amp;&amp; (phy_type == EMIF_PHY_TYPE_INTELLIPHY);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		valid = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!valid)</div><div class='add'>+		dev_err(dev, "%s: invalid DDR details\n", __func__);</div><div class='add'>+	return valid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int is_custom_config_valid(struct emif_custom_configs *cust_cfgs,</div><div class='add'>+		struct device *dev)</div><div class='add'>+{</div><div class='add'>+	int valid = 1;</div><div class='add'>+</div><div class='add'>+	if ((cust_cfgs-&gt;mask &amp; EMIF_CUSTOM_CONFIG_LPMODE) &amp;&amp;</div><div class='add'>+		(cust_cfgs-&gt;lpmode != EMIF_LP_MODE_DISABLE))</div><div class='add'>+		valid = cust_cfgs-&gt;lpmode_freq_threshold &amp;&amp;</div><div class='add'>+			cust_cfgs-&gt;lpmode_timeout_performance &amp;&amp;</div><div class='add'>+			cust_cfgs-&gt;lpmode_timeout_power;</div><div class='add'>+</div><div class='add'>+	if (cust_cfgs-&gt;mask &amp; EMIF_CUSTOM_CONFIG_TEMP_ALERT_POLL_INTERVAL)</div><div class='add'>+		valid = valid &amp;&amp; cust_cfgs-&gt;temp_alert_poll_interval_ms;</div><div class='add'>+</div><div class='add'>+	if (!valid)</div><div class='add'>+		dev_warn(dev, "%s: invalid custom configs\n", __func__);</div><div class='add'>+</div><div class='add'>+	return valid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct emif_data *__init_or_module get_device_details(</div><div class='add'>+		struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	u32				size;</div><div class='add'>+	struct emif_data		*emif = NULL;</div><div class='add'>+	struct ddr_device_info		*dev_info;</div><div class='add'>+	struct emif_custom_configs	*cust_cfgs;</div><div class='add'>+	struct emif_platform_data	*pd;</div><div class='add'>+	struct device			*dev;</div><div class='add'>+	void				*temp;</div><div class='add'>+</div><div class='add'>+	pd = pdev-&gt;dev.platform_data;</div><div class='add'>+	dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (!(pd &amp;&amp; pd-&gt;device_info &amp;&amp; is_dev_data_valid(pd-&gt;device_info-&gt;type,</div><div class='add'>+			pd-&gt;device_info-&gt;density, pd-&gt;device_info-&gt;io_width,</div><div class='add'>+			pd-&gt;phy_type, pd-&gt;ip_rev, dev))) {</div><div class='add'>+		dev_err(dev, "%s: invalid device data\n", __func__);</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emif	= devm_kzalloc(dev, sizeof(*emif), GFP_KERNEL);</div><div class='add'>+	temp	= devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);</div><div class='add'>+	dev_info = devm_kzalloc(dev, sizeof(*dev_info), GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!emif || !pd || !dev_info) {</div><div class='add'>+		dev_err(dev, "%s:%d: allocation error\n", __func__, __LINE__);</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(temp, pd, sizeof(*pd));</div><div class='add'>+	pd = temp;</div><div class='add'>+	memcpy(dev_info, pd-&gt;device_info, sizeof(*dev_info));</div><div class='add'>+</div><div class='add'>+	pd-&gt;device_info		= dev_info;</div><div class='add'>+	emif-&gt;plat_data		= pd;</div><div class='add'>+	emif-&gt;dev		= dev;</div><div class='add'>+	emif-&gt;temperature_level	= SDRAM_TEMP_NOMINAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * For EMIF instances other than EMIF1 see if the devices connected</div><div class='add'>+	 * are exactly same as on EMIF1(which is typically the case). If so,</div><div class='add'>+	 * mark it as a duplicate of EMIF1 and skip copying timings data.</div><div class='add'>+	 * This will save some memory and some computation later.</div><div class='add'>+	 */</div><div class='add'>+	emif-&gt;duplicate = emif1 &amp;&amp; (memcmp(dev_info,</div><div class='add'>+		emif1-&gt;plat_data-&gt;device_info,</div><div class='add'>+		sizeof(struct ddr_device_info)) == 0);</div><div class='add'>+</div><div class='add'>+	if (emif-&gt;duplicate) {</div><div class='add'>+		pd-&gt;timings = NULL;</div><div class='add'>+		pd-&gt;min_tck = NULL;</div><div class='add'>+		goto out;</div><div class='add'>+	} else if (emif1) {</div><div class='add'>+		dev_warn(emif-&gt;dev, "%s: Non-symmetric DDR geometry\n",</div><div class='add'>+			__func__);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Copy custom configs - ignore allocation error, if any, as</div><div class='add'>+	 * custom_configs is not very critical</div><div class='add'>+	 */</div><div class='add'>+	cust_cfgs = pd-&gt;custom_configs;</div><div class='add'>+	if (cust_cfgs &amp;&amp; is_custom_config_valid(cust_cfgs, dev)) {</div><div class='add'>+		temp = devm_kzalloc(dev, sizeof(*cust_cfgs), GFP_KERNEL);</div><div class='add'>+		if (temp)</div><div class='add'>+			memcpy(temp, cust_cfgs, sizeof(*cust_cfgs));</div><div class='add'>+		else</div><div class='add'>+			dev_warn(dev, "%s:%d: allocation error\n", __func__,</div><div class='add'>+				__LINE__);</div><div class='add'>+		pd-&gt;custom_configs = temp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Copy timings and min-tck values from platform data. If it is not</div><div class='add'>+	 * available or if memory allocation fails, use JEDEC defaults</div><div class='add'>+	 */</div><div class='add'>+	size = sizeof(struct lpddr2_timings) * pd-&gt;timings_arr_size;</div><div class='add'>+	if (pd-&gt;timings) {</div><div class='add'>+		temp = devm_kzalloc(dev, size, GFP_KERNEL);</div><div class='add'>+		if (temp) {</div><div class='add'>+			memcpy(temp, pd-&gt;timings, sizeof(*pd-&gt;timings));</div><div class='add'>+			pd-&gt;timings = temp;</div><div class='add'>+		} else {</div><div class='add'>+			dev_warn(dev, "%s:%d: allocation error\n", __func__,</div><div class='add'>+				__LINE__);</div><div class='add'>+			get_default_timings(emif);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		get_default_timings(emif);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pd-&gt;min_tck) {</div><div class='add'>+		temp = devm_kzalloc(dev, sizeof(*pd-&gt;min_tck), GFP_KERNEL);</div><div class='add'>+		if (temp) {</div><div class='add'>+			memcpy(temp, pd-&gt;min_tck, sizeof(*pd-&gt;min_tck));</div><div class='add'>+			pd-&gt;min_tck = temp;</div><div class='add'>+		} else {</div><div class='add'>+			dev_warn(dev, "%s:%d: allocation error\n", __func__,</div><div class='add'>+				__LINE__);</div><div class='add'>+			pd-&gt;min_tck = &amp;lpddr2_jedec_min_tck;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		pd-&gt;min_tck = &amp;lpddr2_jedec_min_tck;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return emif;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init_or_module emif_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct emif_data	*emif;</div><div class='add'>+	struct resource		*res;</div><div class='add'>+	int			irq;</div><div class='add'>+</div><div class='add'>+	emif = get_device_details(pdev);</div><div class='add'>+	if (!emif) {</div><div class='add'>+		pr_err("%s: error getting device data\n", __func__);</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	list_add(&amp;emif-&gt;node, &amp;device_list);</div><div class='add'>+	emif-&gt;addressing = get_addressing_table(emif-&gt;plat_data-&gt;device_info);</div><div class='add'>+</div><div class='add'>+	/* Save pointers to each other in emif and device structures */</div><div class='add'>+	emif-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	platform_set_drvdata(pdev, emif);</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_err(emif-&gt;dev, "%s: error getting memory resource\n",</div><div class='add'>+			__func__);</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emif-&gt;base = devm_request_and_ioremap(emif-&gt;dev, res);</div><div class='add'>+	if (!emif-&gt;base) {</div><div class='add'>+		dev_err(emif-&gt;dev, "%s: devm_request_and_ioremap() failed\n",</div><div class='add'>+			__func__);</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0) {</div><div class='add'>+		dev_err(emif-&gt;dev, "%s: error getting IRQ resource - %d\n",</div><div class='add'>+			__func__, irq);</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emif_onetime_settings(emif);</div><div class='add'>+	emif_debugfs_init(emif);</div><div class='add'>+	disable_and_clear_all_interrupts(emif);</div><div class='add'>+	setup_interrupts(emif, irq);</div><div class='add'>+</div><div class='add'>+	/* One-time actions taken on probing the first device */</div><div class='add'>+	if (!emif1) {</div><div class='add'>+		emif1 = emif;</div><div class='add'>+		spin_lock_init(&amp;emif_lock);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * TODO: register notifiers for frequency and voltage</div><div class='add'>+		 * change here once the respective frameworks are</div><div class='add'>+		 * available</div><div class='add'>+		 */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev, "%s: device configured with addr = %p and IRQ%d\n",</div><div class='add'>+		__func__, emif-&gt;base, irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+error:</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __exit emif_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct emif_data *emif = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	emif_debugfs_exit(emif);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emif_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct emif_data	*emif = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	disable_and_clear_all_interrupts(emif);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_emif_reg_values(struct emif_data *emif, u32 freq,</div><div class='add'>+		struct emif_regs *regs)</div><div class='add'>+{</div><div class='add'>+	u32				cs1_used, ip_rev, phy_type;</div><div class='add'>+	u32				cl, type;</div><div class='add'>+	const struct lpddr2_timings	*timings;</div><div class='add'>+	const struct lpddr2_min_tck	*min_tck;</div><div class='add'>+	const struct ddr_device_info	*device_info;</div><div class='add'>+	const struct lpddr2_addressing	*addressing;</div><div class='add'>+	struct emif_data		*emif_for_calc;</div><div class='add'>+	struct device			*dev;</div><div class='add'>+	const struct emif_custom_configs *custom_configs;</div><div class='add'>+</div><div class='add'>+	dev = emif-&gt;dev;</div><div class='add'>+	/*</div><div class='add'>+	 * If the devices on this EMIF instance is duplicate of EMIF1,</div><div class='add'>+	 * use EMIF1 details for the calculation</div><div class='add'>+	 */</div><div class='add'>+	emif_for_calc	= emif-&gt;duplicate ? emif1 : emif;</div><div class='add'>+	timings		= get_timings_table(emif_for_calc, freq);</div><div class='add'>+	addressing	= emif_for_calc-&gt;addressing;</div><div class='add'>+	if (!timings || !addressing) {</div><div class='add'>+		dev_err(dev, "%s: not enough data available for %dHz",</div><div class='add'>+			__func__, freq);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	device_info	= emif_for_calc-&gt;plat_data-&gt;device_info;</div><div class='add'>+	type		= device_info-&gt;type;</div><div class='add'>+	cs1_used	= device_info-&gt;cs1_used;</div><div class='add'>+	ip_rev		= emif_for_calc-&gt;plat_data-&gt;ip_rev;</div><div class='add'>+	phy_type	= emif_for_calc-&gt;plat_data-&gt;phy_type;</div><div class='add'>+</div><div class='add'>+	min_tck		= emif_for_calc-&gt;plat_data-&gt;min_tck;</div><div class='add'>+	custom_configs	= emif_for_calc-&gt;plat_data-&gt;custom_configs;</div><div class='add'>+</div><div class='add'>+	set_ddr_clk_period(freq);</div><div class='add'>+</div><div class='add'>+	regs-&gt;ref_ctrl_shdw = get_sdram_ref_ctrl_shdw(freq, addressing);</div><div class='add'>+	regs-&gt;sdram_tim1_shdw = get_sdram_tim_1_shdw(timings, min_tck,</div><div class='add'>+			addressing);</div><div class='add'>+	regs-&gt;sdram_tim2_shdw = get_sdram_tim_2_shdw(timings, min_tck,</div><div class='add'>+			addressing, type);</div><div class='add'>+	regs-&gt;sdram_tim3_shdw = get_sdram_tim_3_shdw(timings, min_tck,</div><div class='add'>+		addressing, type, ip_rev, EMIF_NORMAL_TIMINGS);</div><div class='add'>+</div><div class='add'>+	cl = get_cl(emif);</div><div class='add'>+</div><div class='add'>+	if (phy_type == EMIF_PHY_TYPE_ATTILAPHY &amp;&amp; ip_rev == EMIF_4D) {</div><div class='add'>+		regs-&gt;phy_ctrl_1_shdw = get_ddr_phy_ctrl_1_attilaphy_4d(</div><div class='add'>+			timings, freq, cl);</div><div class='add'>+	} else if (phy_type == EMIF_PHY_TYPE_INTELLIPHY &amp;&amp; ip_rev == EMIF_4D5) {</div><div class='add'>+		regs-&gt;phy_ctrl_1_shdw = get_phy_ctrl_1_intelliphy_4d5(freq, cl);</div><div class='add'>+		regs-&gt;ext_phy_ctrl_2_shdw = get_ext_phy_ctrl_2_intelliphy_4d5();</div><div class='add'>+		regs-&gt;ext_phy_ctrl_3_shdw = get_ext_phy_ctrl_3_intelliphy_4d5();</div><div class='add'>+		regs-&gt;ext_phy_ctrl_4_shdw = get_ext_phy_ctrl_4_intelliphy_4d5();</div><div class='add'>+	} else {</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Only timeout values in pwr_mgmt_ctrl_shdw register */</div><div class='add'>+	regs-&gt;pwr_mgmt_ctrl_shdw =</div><div class='add'>+		get_pwr_mgmt_ctrl(freq, emif_for_calc, ip_rev) &amp;</div><div class='add'>+		(CS_TIM_MASK | SR_TIM_MASK | PD_TIM_MASK);</div><div class='add'>+</div><div class='add'>+	if (ip_rev &amp; EMIF_4D) {</div><div class='add'>+		regs-&gt;read_idle_ctrl_shdw_normal =</div><div class='add'>+			get_read_idle_ctrl_shdw(DDR_VOLTAGE_STABLE);</div><div class='add'>+</div><div class='add'>+		regs-&gt;read_idle_ctrl_shdw_volt_ramp =</div><div class='add'>+			get_read_idle_ctrl_shdw(DDR_VOLTAGE_RAMPING);</div><div class='add'>+	} else if (ip_rev &amp; EMIF_4D5) {</div><div class='add'>+		regs-&gt;dll_calib_ctrl_shdw_normal =</div><div class='add'>+			get_dll_calib_ctrl_shdw(DDR_VOLTAGE_STABLE);</div><div class='add'>+</div><div class='add'>+		regs-&gt;dll_calib_ctrl_shdw_volt_ramp =</div><div class='add'>+			get_dll_calib_ctrl_shdw(DDR_VOLTAGE_RAMPING);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (type == DDR_TYPE_LPDDR2_S2 || type == DDR_TYPE_LPDDR2_S4) {</div><div class='add'>+		regs-&gt;ref_ctrl_shdw_derated = get_sdram_ref_ctrl_shdw(freq / 4,</div><div class='add'>+			addressing);</div><div class='add'>+</div><div class='add'>+		regs-&gt;sdram_tim1_shdw_derated =</div><div class='add'>+			get_sdram_tim_1_shdw_derated(timings, min_tck,</div><div class='add'>+				addressing);</div><div class='add'>+</div><div class='add'>+		regs-&gt;sdram_tim3_shdw_derated = get_sdram_tim_3_shdw(timings,</div><div class='add'>+			min_tck, addressing, type, ip_rev,</div><div class='add'>+			EMIF_DERATED_TIMINGS);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regs-&gt;freq = freq;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * get_regs() - gets the cached emif_regs structure for a given EMIF instance</div><div class='add'>+ * given frequency(freq):</div><div class='add'>+ *</div><div class='add'>+ * As an optimisation, every EMIF instance other than EMIF1 shares the</div><div class='add'>+ * register cache with EMIF1 if the devices connected on this instance</div><div class='add'>+ * are same as that on EMIF1(indicated by the duplicate flag)</div><div class='add'>+ *</div><div class='add'>+ * If we do not have an entry corresponding to the frequency given, we</div><div class='add'>+ * allocate a new entry and calculate the values</div><div class='add'>+ *</div><div class='add'>+ * Upon finding the right reg dump, save it in curr_regs. It can be</div><div class='add'>+ * directly used for thermal de-rating and voltage ramping changes.</div><div class='add'>+ */</div><div class='add'>+static struct emif_regs *get_regs(struct emif_data *emif, u32 freq)</div><div class='add'>+{</div><div class='add'>+	int			i;</div><div class='add'>+	struct emif_regs	**regs_cache;</div><div class='add'>+	struct emif_regs	*regs = NULL;</div><div class='add'>+	struct device		*dev;</div><div class='add'>+</div><div class='add'>+	dev = emif-&gt;dev;</div><div class='add'>+	if (emif-&gt;curr_regs &amp;&amp; emif-&gt;curr_regs-&gt;freq == freq) {</div><div class='add'>+		dev_dbg(dev, "%s: using curr_regs - %u Hz", __func__, freq);</div><div class='add'>+		return emif-&gt;curr_regs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (emif-&gt;duplicate)</div><div class='add'>+		regs_cache = emif1-&gt;regs_cache;</div><div class='add'>+	else</div><div class='add'>+		regs_cache = emif-&gt;regs_cache;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; EMIF_MAX_NUM_FREQUENCIES &amp;&amp; regs_cache[i]; i++) {</div><div class='add'>+		if (regs_cache[i]-&gt;freq == freq) {</div><div class='add'>+			regs = regs_cache[i];</div><div class='add'>+			dev_dbg(dev,</div><div class='add'>+				"%s: reg dump found in reg cache for %u Hz\n",</div><div class='add'>+				__func__, freq);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we don't have an entry for this frequency in the cache create one</div><div class='add'>+	 * and calculate the values</div><div class='add'>+	 */</div><div class='add'>+	if (!regs) {</div><div class='add'>+		regs = devm_kzalloc(emif-&gt;dev, sizeof(*regs), GFP_ATOMIC);</div><div class='add'>+		if (!regs)</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		if (get_emif_reg_values(emif, freq, regs)) {</div><div class='add'>+			devm_kfree(emif-&gt;dev, regs);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Now look for an un-used entry in the cache and save the</div><div class='add'>+		 * newly created struct. If there are no free entries</div><div class='add'>+		 * over-write the last entry</div><div class='add'>+		 */</div><div class='add'>+		for (i = 0; i &lt; EMIF_MAX_NUM_FREQUENCIES &amp;&amp; regs_cache[i]; i++)</div><div class='add'>+			;</div><div class='add'>+</div><div class='add'>+		if (i &gt;= EMIF_MAX_NUM_FREQUENCIES) {</div><div class='add'>+			dev_warn(dev, "%s: regs_cache full - reusing a slot!!\n",</div><div class='add'>+				__func__);</div><div class='add'>+			i = EMIF_MAX_NUM_FREQUENCIES - 1;</div><div class='add'>+			devm_kfree(emif-&gt;dev, regs_cache[i]);</div><div class='add'>+		}</div><div class='add'>+		regs_cache[i] = regs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return regs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void do_volt_notify_handling(struct emif_data *emif, u32 volt_state)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(emif-&gt;dev, "%s: voltage notification : %d", __func__,</div><div class='add'>+		volt_state);</div><div class='add'>+</div><div class='add'>+	if (!emif-&gt;curr_regs) {</div><div class='add'>+		dev_err(emif-&gt;dev,</div><div class='add'>+			"%s: volt-notify before registers are ready: %d\n",</div><div class='add'>+			__func__, volt_state);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	setup_volt_sensitive_regs(emif, emif-&gt;curr_regs, volt_state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TODO: voltage notify handling should be hooked up to</div><div class='add'>+ * regulator framework as soon as the necessary support</div><div class='add'>+ * is available in mainline kernel. This function is un-used</div><div class='add'>+ * right now.</div><div class='add'>+ */</div><div class='add'>+static void __attribute__((unused)) volt_notify_handling(u32 volt_state)</div><div class='add'>+{</div><div class='add'>+	struct emif_data *emif;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;emif_lock, irq_state);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(emif, &amp;device_list, node)</div><div class='add'>+		do_volt_notify_handling(emif, volt_state);</div><div class='add'>+	do_freq_update();</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;emif_lock, irq_state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void do_freq_pre_notify_handling(struct emif_data *emif, u32 new_freq)</div><div class='add'>+{</div><div class='add'>+	struct emif_regs *regs;</div><div class='add'>+</div><div class='add'>+	regs = get_regs(emif, new_freq);</div><div class='add'>+	if (!regs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	emif-&gt;curr_regs = regs;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Update the shadow registers:</div><div class='add'>+	 * Temperature and voltage-ramp sensitive settings are also configured</div><div class='add'>+	 * in terms of DDR cycles. So, we need to update them too when there</div><div class='add'>+	 * is a freq change</div><div class='add'>+	 */</div><div class='add'>+	dev_dbg(emif-&gt;dev, "%s: setting up shadow registers for %uHz",</div><div class='add'>+		__func__, new_freq);</div><div class='add'>+	setup_registers(emif, regs);</div><div class='add'>+	setup_temperature_sensitive_regs(emif, regs);</div><div class='add'>+	setup_volt_sensitive_regs(emif, regs, DDR_VOLTAGE_STABLE);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Part of workaround for errata i728. See do_freq_update()</div><div class='add'>+	 * for more details</div><div class='add'>+	 */</div><div class='add'>+	if (emif-&gt;lpmode == EMIF_LP_MODE_SELF_REFRESH)</div><div class='add'>+		set_lpmode(emif, EMIF_LP_MODE_DISABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TODO: frequency notify handling should be hooked up to</div><div class='add'>+ * clock framework as soon as the necessary support is</div><div class='add'>+ * available in mainline kernel. This function is un-used</div><div class='add'>+ * right now.</div><div class='add'>+ */</div><div class='add'>+static void __attribute__((unused)) freq_pre_notify_handling(u32 new_freq)</div><div class='add'>+{</div><div class='add'>+	struct emif_data *emif;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * NOTE: we are taking the spin-lock here and releases it</div><div class='add'>+	 * only in post-notifier. This doesn't look good and</div><div class='add'>+	 * Sparse complains about it, but this seems to be</div><div class='add'>+	 * un-avoidable. We need to lock a sequence of events</div><div class='add'>+	 * that is split between EMIF and clock framework.</div><div class='add'>+	 *</div><div class='add'>+	 * 1. EMIF driver updates EMIF timings in shadow registers in the</div><div class='add'>+	 *    frequency pre-notify callback from clock framework</div><div class='add'>+	 * 2. clock framework sets up the registers for the new frequency</div><div class='add'>+	 * 3. clock framework initiates a hw-sequence that updates</div><div class='add'>+	 *    the frequency EMIF timings synchronously.</div><div class='add'>+	 *</div><div class='add'>+	 * All these 3 steps should be performed as an atomic operation</div><div class='add'>+	 * vis-a-vis similar sequence in the EMIF interrupt handler</div><div class='add'>+	 * for temperature events. Otherwise, there could be race</div><div class='add'>+	 * conditions that could result in incorrect EMIF timings for</div><div class='add'>+	 * a given frequency</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;emif_lock, irq_state);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(emif, &amp;device_list, node)</div><div class='add'>+		do_freq_pre_notify_handling(emif, new_freq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void do_freq_post_notify_handling(struct emif_data *emif)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Part of workaround for errata i728. See do_freq_update()</div><div class='add'>+	 * for more details</div><div class='add'>+	 */</div><div class='add'>+	if (emif-&gt;lpmode == EMIF_LP_MODE_SELF_REFRESH)</div><div class='add'>+		set_lpmode(emif, EMIF_LP_MODE_SELF_REFRESH);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TODO: frequency notify handling should be hooked up to</div><div class='add'>+ * clock framework as soon as the necessary support is</div><div class='add'>+ * available in mainline kernel. This function is un-used</div><div class='add'>+ * right now.</div><div class='add'>+ */</div><div class='add'>+static void __attribute__((unused)) freq_post_notify_handling(void)</div><div class='add'>+{</div><div class='add'>+	struct emif_data *emif;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(emif, &amp;device_list, node)</div><div class='add'>+		do_freq_post_notify_handling(emif);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Lock is done in pre-notify handler. See freq_pre_notify_handling()</div><div class='add'>+	 * for more details</div><div class='add'>+	 */</div><div class='add'>+	spin_unlock_irqrestore(&amp;emif_lock, irq_state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver emif_driver = {</div><div class='add'>+	.remove		= __exit_p(emif_remove),</div><div class='add'>+	.shutdown	= emif_shutdown,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "emif",</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init_or_module emif_register(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_probe(&amp;emif_driver, emif_probe);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit emif_unregister(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;emif_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(emif_register);</div><div class='add'>+module_exit(emif_unregister);</div><div class='add'>+MODULE_DESCRIPTION("TI EMIF SDRAM Controller Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_ALIAS("platform:emif");</div><div class='add'>+MODULE_AUTHOR("Texas Instruments Inc");</div><div class='head'>diff --git a/drivers/memory/emif.h b/drivers/memory/emif.h<br/>new file mode 100644<br/>index 000000000000..bfe08bae961a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/memory/emif.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/memory/emif.h</a></div><div class='hunk'>@@ -0,0 +1,589 @@</div><div class='add'>+/*</div><div class='add'>+ * Defines for the EMIF driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Texas Instruments, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Benoit Cousson (b-cousson@ti.com)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+#ifndef __EMIF_H</div><div class='add'>+#define __EMIF_H</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Maximum number of different frequencies supported by EMIF driver</div><div class='add'>+ * Determines the number of entries in the pointer array for register</div><div class='add'>+ * cache</div><div class='add'>+ */</div><div class='add'>+#define EMIF_MAX_NUM_FREQUENCIES			6</div><div class='add'>+</div><div class='add'>+/* State of the core voltage */</div><div class='add'>+#define DDR_VOLTAGE_STABLE				0</div><div class='add'>+#define DDR_VOLTAGE_RAMPING				1</div><div class='add'>+</div><div class='add'>+/* Defines for timing De-rating */</div><div class='add'>+#define EMIF_NORMAL_TIMINGS				0</div><div class='add'>+#define EMIF_DERATED_TIMINGS				1</div><div class='add'>+</div><div class='add'>+/* Length of the forced read idle period in terms of cycles */</div><div class='add'>+#define EMIF_READ_IDLE_LEN_VAL				5</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * forced read idle interval to be used when voltage</div><div class='add'>+ * is changed as part of DVFS/DPS - 1ms</div><div class='add'>+ */</div><div class='add'>+#define READ_IDLE_INTERVAL_DVFS				(1*1000000)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Forced read idle interval to be used when voltage is stable</div><div class='add'>+ * 50us - or maximum value will do</div><div class='add'>+ */</div><div class='add'>+#define READ_IDLE_INTERVAL_NORMAL			(50*1000000)</div><div class='add'>+</div><div class='add'>+/* DLL calibration interval when voltage is NOT stable - 1us */</div><div class='add'>+#define DLL_CALIB_INTERVAL_DVFS				(1*1000000)</div><div class='add'>+</div><div class='add'>+#define DLL_CALIB_ACK_WAIT_VAL				5</div><div class='add'>+</div><div class='add'>+/* Interval between ZQCS commands - hw team recommended value */</div><div class='add'>+#define EMIF_ZQCS_INTERVAL_US				(50*1000)</div><div class='add'>+/* Enable ZQ Calibration on exiting Self-refresh */</div><div class='add'>+#define ZQ_SFEXITEN_ENABLE				1</div><div class='add'>+/*</div><div class='add'>+ * ZQ Calibration simultaneously on both chip-selects:</div><div class='add'>+ * Needs one calibration resistor per CS</div><div class='add'>+ */</div><div class='add'>+#define	ZQ_DUALCALEN_DISABLE				0</div><div class='add'>+#define	ZQ_DUALCALEN_ENABLE				1</div><div class='add'>+</div><div class='add'>+#define T_ZQCS_DEFAULT_NS				90</div><div class='add'>+#define T_ZQCL_DEFAULT_NS				360</div><div class='add'>+#define T_ZQINIT_DEFAULT_NS				1000</div><div class='add'>+</div><div class='add'>+/* DPD_EN */</div><div class='add'>+#define DPD_DISABLE					0</div><div class='add'>+#define DPD_ENABLE					1</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Default values for the low-power entry to be used if not provided by user.</div><div class='add'>+ * OMAP4/5 has a hw bug(i735) due to which this value can not be less than 512</div><div class='add'>+ * Timeout values are in DDR clock 'cycles' and frequency threshold in Hz</div><div class='add'>+ */</div><div class='add'>+#define EMIF_LP_MODE_TIMEOUT_PERFORMANCE		2048</div><div class='add'>+#define EMIF_LP_MODE_TIMEOUT_POWER			512</div><div class='add'>+#define EMIF_LP_MODE_FREQ_THRESHOLD			400000000</div><div class='add'>+</div><div class='add'>+/* DDR_PHY_CTRL_1 values for EMIF4D - ATTILA PHY combination */</div><div class='add'>+#define EMIF_DDR_PHY_CTRL_1_BASE_VAL_ATTILAPHY		0x049FF000</div><div class='add'>+#define EMIF_DLL_SLAVE_DLY_CTRL_400_MHZ_ATTILAPHY	0x41</div><div class='add'>+#define EMIF_DLL_SLAVE_DLY_CTRL_200_MHZ_ATTILAPHY	0x80</div><div class='add'>+#define EMIF_DLL_SLAVE_DLY_CTRL_100_MHZ_AND_LESS_ATTILAPHY 0xFF</div><div class='add'>+</div><div class='add'>+/* DDR_PHY_CTRL_1 values for EMIF4D5 INTELLIPHY combination */</div><div class='add'>+#define EMIF_DDR_PHY_CTRL_1_BASE_VAL_INTELLIPHY		0x0E084200</div><div class='add'>+#define EMIF_PHY_TOTAL_READ_LATENCY_INTELLIPHY_PS	10000</div><div class='add'>+</div><div class='add'>+/* TEMP_ALERT_CONFIG - corresponding to temp gradient 5 C/s */</div><div class='add'>+#define TEMP_ALERT_POLL_INTERVAL_DEFAULT_MS		360</div><div class='add'>+</div><div class='add'>+#define EMIF_T_CSTA					3</div><div class='add'>+#define EMIF_T_PDLL_UL					128</div><div class='add'>+</div><div class='add'>+/* External PHY control registers magic values */</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_1_VAL				0x04020080</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_5_VAL				0x04010040</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_6_VAL				0x01004010</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_7_VAL				0x00001004</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_8_VAL				0x04010040</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_9_VAL				0x01004010</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_10_VAL			0x00001004</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_11_VAL			0x00000000</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_12_VAL			0x00000000</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_13_VAL			0x00000000</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_14_VAL			0x80080080</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_15_VAL			0x00800800</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_16_VAL			0x08102040</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_17_VAL			0x00000001</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_18_VAL			0x540A8150</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_19_VAL			0xA81502A0</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_20_VAL			0x002A0540</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_21_VAL			0x00000000</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_22_VAL			0x00000000</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_23_VAL			0x00000000</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_24_VAL			0x00000077</div><div class='add'>+</div><div class='add'>+#define EMIF_INTELLI_PHY_DQS_GATE_OPENING_DELAY_PS	1200</div><div class='add'>+</div><div class='add'>+/* Registers offset */</div><div class='add'>+#define EMIF_MODULE_ID_AND_REVISION			0x0000</div><div class='add'>+#define EMIF_STATUS					0x0004</div><div class='add'>+#define EMIF_SDRAM_CONFIG				0x0008</div><div class='add'>+#define EMIF_SDRAM_CONFIG_2				0x000c</div><div class='add'>+#define EMIF_SDRAM_REFRESH_CONTROL			0x0010</div><div class='add'>+#define EMIF_SDRAM_REFRESH_CTRL_SHDW			0x0014</div><div class='add'>+#define EMIF_SDRAM_TIMING_1				0x0018</div><div class='add'>+#define EMIF_SDRAM_TIMING_1_SHDW			0x001c</div><div class='add'>+#define EMIF_SDRAM_TIMING_2				0x0020</div><div class='add'>+#define EMIF_SDRAM_TIMING_2_SHDW			0x0024</div><div class='add'>+#define EMIF_SDRAM_TIMING_3				0x0028</div><div class='add'>+#define EMIF_SDRAM_TIMING_3_SHDW			0x002c</div><div class='add'>+#define EMIF_LPDDR2_NVM_TIMING				0x0030</div><div class='add'>+#define EMIF_LPDDR2_NVM_TIMING_SHDW			0x0034</div><div class='add'>+#define EMIF_POWER_MANAGEMENT_CONTROL			0x0038</div><div class='add'>+#define EMIF_POWER_MANAGEMENT_CTRL_SHDW			0x003c</div><div class='add'>+#define EMIF_LPDDR2_MODE_REG_DATA			0x0040</div><div class='add'>+#define EMIF_LPDDR2_MODE_REG_CONFIG			0x0050</div><div class='add'>+#define EMIF_OCP_CONFIG					0x0054</div><div class='add'>+#define EMIF_OCP_CONFIG_VALUE_1				0x0058</div><div class='add'>+#define EMIF_OCP_CONFIG_VALUE_2				0x005c</div><div class='add'>+#define EMIF_IODFT_TEST_LOGIC_GLOBAL_CONTROL		0x0060</div><div class='add'>+#define EMIF_IODFT_TEST_LOGIC_CTRL_MISR_RESULT		0x0064</div><div class='add'>+#define EMIF_IODFT_TEST_LOGIC_ADDRESS_MISR_RESULT	0x0068</div><div class='add'>+#define EMIF_IODFT_TEST_LOGIC_DATA_MISR_RESULT_1	0x006c</div><div class='add'>+#define EMIF_IODFT_TEST_LOGIC_DATA_MISR_RESULT_2	0x0070</div><div class='add'>+#define EMIF_IODFT_TEST_LOGIC_DATA_MISR_RESULT_3	0x0074</div><div class='add'>+#define EMIF_PERFORMANCE_COUNTER_1			0x0080</div><div class='add'>+#define EMIF_PERFORMANCE_COUNTER_2			0x0084</div><div class='add'>+#define EMIF_PERFORMANCE_COUNTER_CONFIG			0x0088</div><div class='add'>+#define EMIF_PERFORMANCE_COUNTER_MASTER_REGION_SELECT	0x008c</div><div class='add'>+#define EMIF_PERFORMANCE_COUNTER_TIME			0x0090</div><div class='add'>+#define EMIF_MISC_REG					0x0094</div><div class='add'>+#define EMIF_DLL_CALIB_CTRL				0x0098</div><div class='add'>+#define EMIF_DLL_CALIB_CTRL_SHDW			0x009c</div><div class='add'>+#define EMIF_END_OF_INTERRUPT				0x00a0</div><div class='add'>+#define EMIF_SYSTEM_OCP_INTERRUPT_RAW_STATUS		0x00a4</div><div class='add'>+#define EMIF_LL_OCP_INTERRUPT_RAW_STATUS		0x00a8</div><div class='add'>+#define EMIF_SYSTEM_OCP_INTERRUPT_STATUS		0x00ac</div><div class='add'>+#define EMIF_LL_OCP_INTERRUPT_STATUS			0x00b0</div><div class='add'>+#define EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_SET		0x00b4</div><div class='add'>+#define EMIF_LL_OCP_INTERRUPT_ENABLE_SET		0x00b8</div><div class='add'>+#define EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_CLEAR		0x00bc</div><div class='add'>+#define EMIF_LL_OCP_INTERRUPT_ENABLE_CLEAR		0x00c0</div><div class='add'>+#define EMIF_SDRAM_OUTPUT_IMPEDANCE_CALIBRATION_CONFIG	0x00c8</div><div class='add'>+#define EMIF_TEMPERATURE_ALERT_CONFIG			0x00cc</div><div class='add'>+#define EMIF_OCP_ERROR_LOG				0x00d0</div><div class='add'>+#define EMIF_READ_WRITE_LEVELING_RAMP_WINDOW		0x00d4</div><div class='add'>+#define EMIF_READ_WRITE_LEVELING_RAMP_CONTROL		0x00d8</div><div class='add'>+#define EMIF_READ_WRITE_LEVELING_CONTROL		0x00dc</div><div class='add'>+#define EMIF_DDR_PHY_CTRL_1				0x00e4</div><div class='add'>+#define EMIF_DDR_PHY_CTRL_1_SHDW			0x00e8</div><div class='add'>+#define EMIF_DDR_PHY_CTRL_2				0x00ec</div><div class='add'>+#define EMIF_PRIORITY_TO_CLASS_OF_SERVICE_MAPPING	0x0100</div><div class='add'>+#define EMIF_CONNECTION_ID_TO_CLASS_OF_SERVICE_1_MAPPING 0x0104</div><div class='add'>+#define EMIF_CONNECTION_ID_TO_CLASS_OF_SERVICE_2_MAPPING 0x0108</div><div class='add'>+#define EMIF_READ_WRITE_EXECUTION_THRESHOLD		0x0120</div><div class='add'>+#define EMIF_COS_CONFIG					0x0124</div><div class='add'>+#define EMIF_PHY_STATUS_1				0x0140</div><div class='add'>+#define EMIF_PHY_STATUS_2				0x0144</div><div class='add'>+#define EMIF_PHY_STATUS_3				0x0148</div><div class='add'>+#define EMIF_PHY_STATUS_4				0x014c</div><div class='add'>+#define EMIF_PHY_STATUS_5				0x0150</div><div class='add'>+#define EMIF_PHY_STATUS_6				0x0154</div><div class='add'>+#define EMIF_PHY_STATUS_7				0x0158</div><div class='add'>+#define EMIF_PHY_STATUS_8				0x015c</div><div class='add'>+#define EMIF_PHY_STATUS_9				0x0160</div><div class='add'>+#define EMIF_PHY_STATUS_10				0x0164</div><div class='add'>+#define EMIF_PHY_STATUS_11				0x0168</div><div class='add'>+#define EMIF_PHY_STATUS_12				0x016c</div><div class='add'>+#define EMIF_PHY_STATUS_13				0x0170</div><div class='add'>+#define EMIF_PHY_STATUS_14				0x0174</div><div class='add'>+#define EMIF_PHY_STATUS_15				0x0178</div><div class='add'>+#define EMIF_PHY_STATUS_16				0x017c</div><div class='add'>+#define EMIF_PHY_STATUS_17				0x0180</div><div class='add'>+#define EMIF_PHY_STATUS_18				0x0184</div><div class='add'>+#define EMIF_PHY_STATUS_19				0x0188</div><div class='add'>+#define EMIF_PHY_STATUS_20				0x018c</div><div class='add'>+#define EMIF_PHY_STATUS_21				0x0190</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_1				0x0200</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_1_SHDW			0x0204</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_2				0x0208</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_2_SHDW			0x020c</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_3				0x0210</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_3_SHDW			0x0214</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_4				0x0218</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_4_SHDW			0x021c</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_5				0x0220</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_5_SHDW			0x0224</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_6				0x0228</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_6_SHDW			0x022c</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_7				0x0230</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_7_SHDW			0x0234</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_8				0x0238</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_8_SHDW			0x023c</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_9				0x0240</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_9_SHDW			0x0244</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_10				0x0248</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_10_SHDW			0x024c</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_11				0x0250</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_11_SHDW			0x0254</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_12				0x0258</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_12_SHDW			0x025c</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_13				0x0260</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_13_SHDW			0x0264</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_14				0x0268</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_14_SHDW			0x026c</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_15				0x0270</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_15_SHDW			0x0274</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_16				0x0278</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_16_SHDW			0x027c</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_17				0x0280</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_17_SHDW			0x0284</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_18				0x0288</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_18_SHDW			0x028c</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_19				0x0290</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_19_SHDW			0x0294</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_20				0x0298</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_20_SHDW			0x029c</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_21				0x02a0</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_21_SHDW			0x02a4</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_22				0x02a8</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_22_SHDW			0x02ac</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_23				0x02b0</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_23_SHDW			0x02b4</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_24				0x02b8</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_24_SHDW			0x02bc</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_25				0x02c0</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_25_SHDW			0x02c4</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_26				0x02c8</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_26_SHDW			0x02cc</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_27				0x02d0</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_27_SHDW			0x02d4</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_28				0x02d8</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_28_SHDW			0x02dc</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_29				0x02e0</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_29_SHDW			0x02e4</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_30				0x02e8</div><div class='add'>+#define EMIF_EXT_PHY_CTRL_30_SHDW			0x02ec</div><div class='add'>+</div><div class='add'>+/* Registers shifts and masks */</div><div class='add'>+</div><div class='add'>+/* EMIF_MODULE_ID_AND_REVISION */</div><div class='add'>+#define SCHEME_SHIFT					30</div><div class='add'>+#define SCHEME_MASK					(0x3 &lt;&lt; 30)</div><div class='add'>+#define MODULE_ID_SHIFT					16</div><div class='add'>+#define MODULE_ID_MASK					(0xfff &lt;&lt; 16)</div><div class='add'>+#define RTL_VERSION_SHIFT				11</div><div class='add'>+#define RTL_VERSION_MASK				(0x1f &lt;&lt; 11)</div><div class='add'>+#define MAJOR_REVISION_SHIFT				8</div><div class='add'>+#define MAJOR_REVISION_MASK				(0x7 &lt;&lt; 8)</div><div class='add'>+#define MINOR_REVISION_SHIFT				0</div><div class='add'>+#define MINOR_REVISION_MASK				(0x3f &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* STATUS */</div><div class='add'>+#define BE_SHIFT					31</div><div class='add'>+#define BE_MASK						(1 &lt;&lt; 31)</div><div class='add'>+#define DUAL_CLK_MODE_SHIFT				30</div><div class='add'>+#define DUAL_CLK_MODE_MASK				(1 &lt;&lt; 30)</div><div class='add'>+#define FAST_INIT_SHIFT					29</div><div class='add'>+#define FAST_INIT_MASK					(1 &lt;&lt; 29)</div><div class='add'>+#define RDLVLGATETO_SHIFT				6</div><div class='add'>+#define RDLVLGATETO_MASK				(1 &lt;&lt; 6)</div><div class='add'>+#define RDLVLTO_SHIFT					5</div><div class='add'>+#define RDLVLTO_MASK					(1 &lt;&lt; 5)</div><div class='add'>+#define WRLVLTO_SHIFT					4</div><div class='add'>+#define WRLVLTO_MASK					(1 &lt;&lt; 4)</div><div class='add'>+#define PHY_DLL_READY_SHIFT				2</div><div class='add'>+#define PHY_DLL_READY_MASK				(1 &lt;&lt; 2)</div><div class='add'>+</div><div class='add'>+/* SDRAM_CONFIG */</div><div class='add'>+#define SDRAM_TYPE_SHIFT				29</div><div class='add'>+#define SDRAM_TYPE_MASK					(0x7 &lt;&lt; 29)</div><div class='add'>+#define IBANK_POS_SHIFT					27</div><div class='add'>+#define IBANK_POS_MASK					(0x3 &lt;&lt; 27)</div><div class='add'>+#define DDR_TERM_SHIFT					24</div><div class='add'>+#define DDR_TERM_MASK					(0x7 &lt;&lt; 24)</div><div class='add'>+#define DDR2_DDQS_SHIFT					23</div><div class='add'>+#define DDR2_DDQS_MASK					(1 &lt;&lt; 23)</div><div class='add'>+#define DYN_ODT_SHIFT					21</div><div class='add'>+#define DYN_ODT_MASK					(0x3 &lt;&lt; 21)</div><div class='add'>+#define DDR_DISABLE_DLL_SHIFT				20</div><div class='add'>+#define DDR_DISABLE_DLL_MASK				(1 &lt;&lt; 20)</div><div class='add'>+#define SDRAM_DRIVE_SHIFT				18</div><div class='add'>+#define SDRAM_DRIVE_MASK				(0x3 &lt;&lt; 18)</div><div class='add'>+#define CWL_SHIFT					16</div><div class='add'>+#define CWL_MASK					(0x3 &lt;&lt; 16)</div><div class='add'>+#define NARROW_MODE_SHIFT				14</div><div class='add'>+#define NARROW_MODE_MASK				(0x3 &lt;&lt; 14)</div><div class='add'>+#define CL_SHIFT					10</div><div class='add'>+#define CL_MASK						(0xf &lt;&lt; 10)</div><div class='add'>+#define ROWSIZE_SHIFT					7</div><div class='add'>+#define ROWSIZE_MASK					(0x7 &lt;&lt; 7)</div><div class='add'>+#define IBANK_SHIFT					4</div><div class='add'>+#define IBANK_MASK					(0x7 &lt;&lt; 4)</div><div class='add'>+#define EBANK_SHIFT					3</div><div class='add'>+#define EBANK_MASK					(1 &lt;&lt; 3)</div><div class='add'>+#define PAGESIZE_SHIFT					0</div><div class='add'>+#define PAGESIZE_MASK					(0x7 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* SDRAM_CONFIG_2 */</div><div class='add'>+#define CS1NVMEN_SHIFT					30</div><div class='add'>+#define CS1NVMEN_MASK					(1 &lt;&lt; 30)</div><div class='add'>+#define EBANK_POS_SHIFT					27</div><div class='add'>+#define EBANK_POS_MASK					(1 &lt;&lt; 27)</div><div class='add'>+#define RDBNUM_SHIFT					4</div><div class='add'>+#define RDBNUM_MASK					(0x3 &lt;&lt; 4)</div><div class='add'>+#define RDBSIZE_SHIFT					0</div><div class='add'>+#define RDBSIZE_MASK					(0x7 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* SDRAM_REFRESH_CONTROL */</div><div class='add'>+#define INITREF_DIS_SHIFT				31</div><div class='add'>+#define INITREF_DIS_MASK				(1 &lt;&lt; 31)</div><div class='add'>+#define SRT_SHIFT					29</div><div class='add'>+#define SRT_MASK					(1 &lt;&lt; 29)</div><div class='add'>+#define ASR_SHIFT					28</div><div class='add'>+#define ASR_MASK					(1 &lt;&lt; 28)</div><div class='add'>+#define PASR_SHIFT					24</div><div class='add'>+#define PASR_MASK					(0x7 &lt;&lt; 24)</div><div class='add'>+#define REFRESH_RATE_SHIFT				0</div><div class='add'>+#define REFRESH_RATE_MASK				(0xffff &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* SDRAM_TIMING_1 */</div><div class='add'>+#define T_RTW_SHIFT					29</div><div class='add'>+#define T_RTW_MASK					(0x7 &lt;&lt; 29)</div><div class='add'>+#define T_RP_SHIFT					25</div><div class='add'>+#define T_RP_MASK					(0xf &lt;&lt; 25)</div><div class='add'>+#define T_RCD_SHIFT					21</div><div class='add'>+#define T_RCD_MASK					(0xf &lt;&lt; 21)</div><div class='add'>+#define T_WR_SHIFT					17</div><div class='add'>+#define T_WR_MASK					(0xf &lt;&lt; 17)</div><div class='add'>+#define T_RAS_SHIFT					12</div><div class='add'>+#define T_RAS_MASK					(0x1f &lt;&lt; 12)</div><div class='add'>+#define T_RC_SHIFT					6</div><div class='add'>+#define T_RC_MASK					(0x3f &lt;&lt; 6)</div><div class='add'>+#define T_RRD_SHIFT					3</div><div class='add'>+#define T_RRD_MASK					(0x7 &lt;&lt; 3)</div><div class='add'>+#define T_WTR_SHIFT					0</div><div class='add'>+#define T_WTR_MASK					(0x7 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* SDRAM_TIMING_2 */</div><div class='add'>+#define T_XP_SHIFT					28</div><div class='add'>+#define T_XP_MASK					(0x7 &lt;&lt; 28)</div><div class='add'>+#define T_ODT_SHIFT					25</div><div class='add'>+#define T_ODT_MASK					(0x7 &lt;&lt; 25)</div><div class='add'>+#define T_XSNR_SHIFT					16</div><div class='add'>+#define T_XSNR_MASK					(0x1ff &lt;&lt; 16)</div><div class='add'>+#define T_XSRD_SHIFT					6</div><div class='add'>+#define T_XSRD_MASK					(0x3ff &lt;&lt; 6)</div><div class='add'>+#define T_RTP_SHIFT					3</div><div class='add'>+#define T_RTP_MASK					(0x7 &lt;&lt; 3)</div><div class='add'>+#define T_CKE_SHIFT					0</div><div class='add'>+#define T_CKE_MASK					(0x7 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* SDRAM_TIMING_3 */</div><div class='add'>+#define T_PDLL_UL_SHIFT					28</div><div class='add'>+#define T_PDLL_UL_MASK					(0xf &lt;&lt; 28)</div><div class='add'>+#define T_CSTA_SHIFT					24</div><div class='add'>+#define T_CSTA_MASK					(0xf &lt;&lt; 24)</div><div class='add'>+#define T_CKESR_SHIFT					21</div><div class='add'>+#define T_CKESR_MASK					(0x7 &lt;&lt; 21)</div><div class='add'>+#define ZQ_ZQCS_SHIFT					15</div><div class='add'>+#define ZQ_ZQCS_MASK					(0x3f &lt;&lt; 15)</div><div class='add'>+#define T_TDQSCKMAX_SHIFT				13</div><div class='add'>+#define T_TDQSCKMAX_MASK				(0x3 &lt;&lt; 13)</div><div class='add'>+#define T_RFC_SHIFT					4</div><div class='add'>+#define T_RFC_MASK					(0x1ff &lt;&lt; 4)</div><div class='add'>+#define T_RAS_MAX_SHIFT					0</div><div class='add'>+#define T_RAS_MAX_MASK					(0xf &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* POWER_MANAGEMENT_CONTROL */</div><div class='add'>+#define PD_TIM_SHIFT					12</div><div class='add'>+#define PD_TIM_MASK					(0xf &lt;&lt; 12)</div><div class='add'>+#define DPD_EN_SHIFT					11</div><div class='add'>+#define DPD_EN_MASK					(1 &lt;&lt; 11)</div><div class='add'>+#define LP_MODE_SHIFT					8</div><div class='add'>+#define LP_MODE_MASK					(0x7 &lt;&lt; 8)</div><div class='add'>+#define SR_TIM_SHIFT					4</div><div class='add'>+#define SR_TIM_MASK					(0xf &lt;&lt; 4)</div><div class='add'>+#define CS_TIM_SHIFT					0</div><div class='add'>+#define CS_TIM_MASK					(0xf &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* LPDDR2_MODE_REG_DATA */</div><div class='add'>+#define VALUE_0_SHIFT					0</div><div class='add'>+#define VALUE_0_MASK					(0x7f &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* LPDDR2_MODE_REG_CONFIG */</div><div class='add'>+#define CS_SHIFT					31</div><div class='add'>+#define CS_MASK						(1 &lt;&lt; 31)</div><div class='add'>+#define REFRESH_EN_SHIFT				30</div><div class='add'>+#define REFRESH_EN_MASK					(1 &lt;&lt; 30)</div><div class='add'>+#define ADDRESS_SHIFT					0</div><div class='add'>+#define ADDRESS_MASK					(0xff &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* OCP_CONFIG */</div><div class='add'>+#define SYS_THRESH_MAX_SHIFT				24</div><div class='add'>+#define SYS_THRESH_MAX_MASK				(0xf &lt;&lt; 24)</div><div class='add'>+#define MPU_THRESH_MAX_SHIFT				20</div><div class='add'>+#define MPU_THRESH_MAX_MASK				(0xf &lt;&lt; 20)</div><div class='add'>+#define LL_THRESH_MAX_SHIFT				16</div><div class='add'>+#define LL_THRESH_MAX_MASK				(0xf &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+/* PERFORMANCE_COUNTER_1 */</div><div class='add'>+#define COUNTER1_SHIFT					0</div><div class='add'>+#define COUNTER1_MASK					(0xffffffff &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* PERFORMANCE_COUNTER_2 */</div><div class='add'>+#define COUNTER2_SHIFT					0</div><div class='add'>+#define COUNTER2_MASK					(0xffffffff &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* PERFORMANCE_COUNTER_CONFIG */</div><div class='add'>+#define CNTR2_MCONNID_EN_SHIFT				31</div><div class='add'>+#define CNTR2_MCONNID_EN_MASK				(1 &lt;&lt; 31)</div><div class='add'>+#define CNTR2_REGION_EN_SHIFT				30</div><div class='add'>+#define CNTR2_REGION_EN_MASK				(1 &lt;&lt; 30)</div><div class='add'>+#define CNTR2_CFG_SHIFT					16</div><div class='add'>+#define CNTR2_CFG_MASK					(0xf &lt;&lt; 16)</div><div class='add'>+#define CNTR1_MCONNID_EN_SHIFT				15</div><div class='add'>+#define CNTR1_MCONNID_EN_MASK				(1 &lt;&lt; 15)</div><div class='add'>+#define CNTR1_REGION_EN_SHIFT				14</div><div class='add'>+#define CNTR1_REGION_EN_MASK				(1 &lt;&lt; 14)</div><div class='add'>+#define CNTR1_CFG_SHIFT					0</div><div class='add'>+#define CNTR1_CFG_MASK					(0xf &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* PERFORMANCE_COUNTER_MASTER_REGION_SELECT */</div><div class='add'>+#define MCONNID2_SHIFT					24</div><div class='add'>+#define MCONNID2_MASK					(0xff &lt;&lt; 24)</div><div class='add'>+#define REGION_SEL2_SHIFT				16</div><div class='add'>+#define REGION_SEL2_MASK				(0x3 &lt;&lt; 16)</div><div class='add'>+#define MCONNID1_SHIFT					8</div><div class='add'>+#define MCONNID1_MASK					(0xff &lt;&lt; 8)</div><div class='add'>+#define REGION_SEL1_SHIFT				0</div><div class='add'>+#define REGION_SEL1_MASK				(0x3 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* PERFORMANCE_COUNTER_TIME */</div><div class='add'>+#define TOTAL_TIME_SHIFT				0</div><div class='add'>+#define TOTAL_TIME_MASK					(0xffffffff &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* DLL_CALIB_CTRL */</div><div class='add'>+#define ACK_WAIT_SHIFT					16</div><div class='add'>+#define ACK_WAIT_MASK					(0xf &lt;&lt; 16)</div><div class='add'>+#define DLL_CALIB_INTERVAL_SHIFT			0</div><div class='add'>+#define DLL_CALIB_INTERVAL_MASK				(0x1ff &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* END_OF_INTERRUPT */</div><div class='add'>+#define EOI_SHIFT					0</div><div class='add'>+#define EOI_MASK					(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* SYSTEM_OCP_INTERRUPT_RAW_STATUS */</div><div class='add'>+#define DNV_SYS_SHIFT					2</div><div class='add'>+#define DNV_SYS_MASK					(1 &lt;&lt; 2)</div><div class='add'>+#define TA_SYS_SHIFT					1</div><div class='add'>+#define TA_SYS_MASK					(1 &lt;&lt; 1)</div><div class='add'>+#define ERR_SYS_SHIFT					0</div><div class='add'>+#define ERR_SYS_MASK					(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* LOW_LATENCY_OCP_INTERRUPT_RAW_STATUS */</div><div class='add'>+#define DNV_LL_SHIFT					2</div><div class='add'>+#define DNV_LL_MASK					(1 &lt;&lt; 2)</div><div class='add'>+#define TA_LL_SHIFT					1</div><div class='add'>+#define TA_LL_MASK					(1 &lt;&lt; 1)</div><div class='add'>+#define ERR_LL_SHIFT					0</div><div class='add'>+#define ERR_LL_MASK					(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* SYSTEM_OCP_INTERRUPT_ENABLE_SET */</div><div class='add'>+#define EN_DNV_SYS_SHIFT				2</div><div class='add'>+#define EN_DNV_SYS_MASK					(1 &lt;&lt; 2)</div><div class='add'>+#define EN_TA_SYS_SHIFT					1</div><div class='add'>+#define EN_TA_SYS_MASK					(1 &lt;&lt; 1)</div><div class='add'>+#define EN_ERR_SYS_SHIFT					0</div><div class='add'>+#define EN_ERR_SYS_MASK					(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* LOW_LATENCY_OCP_INTERRUPT_ENABLE_SET */</div><div class='add'>+#define EN_DNV_LL_SHIFT					2</div><div class='add'>+#define EN_DNV_LL_MASK					(1 &lt;&lt; 2)</div><div class='add'>+#define EN_TA_LL_SHIFT					1</div><div class='add'>+#define EN_TA_LL_MASK					(1 &lt;&lt; 1)</div><div class='add'>+#define EN_ERR_LL_SHIFT					0</div><div class='add'>+#define EN_ERR_LL_MASK					(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* SDRAM_OUTPUT_IMPEDANCE_CALIBRATION_CONFIG */</div><div class='add'>+#define ZQ_CS1EN_SHIFT					31</div><div class='add'>+#define ZQ_CS1EN_MASK					(1 &lt;&lt; 31)</div><div class='add'>+#define ZQ_CS0EN_SHIFT					30</div><div class='add'>+#define ZQ_CS0EN_MASK					(1 &lt;&lt; 30)</div><div class='add'>+#define ZQ_DUALCALEN_SHIFT				29</div><div class='add'>+#define ZQ_DUALCALEN_MASK				(1 &lt;&lt; 29)</div><div class='add'>+#define ZQ_SFEXITEN_SHIFT				28</div><div class='add'>+#define ZQ_SFEXITEN_MASK				(1 &lt;&lt; 28)</div><div class='add'>+#define ZQ_ZQINIT_MULT_SHIFT				18</div><div class='add'>+#define ZQ_ZQINIT_MULT_MASK				(0x3 &lt;&lt; 18)</div><div class='add'>+#define ZQ_ZQCL_MULT_SHIFT				16</div><div class='add'>+#define ZQ_ZQCL_MULT_MASK				(0x3 &lt;&lt; 16)</div><div class='add'>+#define ZQ_REFINTERVAL_SHIFT				0</div><div class='add'>+#define ZQ_REFINTERVAL_MASK				(0xffff &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* TEMPERATURE_ALERT_CONFIG */</div><div class='add'>+#define TA_CS1EN_SHIFT					31</div><div class='add'>+#define TA_CS1EN_MASK					(1 &lt;&lt; 31)</div><div class='add'>+#define TA_CS0EN_SHIFT					30</div><div class='add'>+#define TA_CS0EN_MASK					(1 &lt;&lt; 30)</div><div class='add'>+#define TA_SFEXITEN_SHIFT				28</div><div class='add'>+#define TA_SFEXITEN_MASK				(1 &lt;&lt; 28)</div><div class='add'>+#define TA_DEVWDT_SHIFT					26</div><div class='add'>+#define TA_DEVWDT_MASK					(0x3 &lt;&lt; 26)</div><div class='add'>+#define TA_DEVCNT_SHIFT					24</div><div class='add'>+#define TA_DEVCNT_MASK					(0x3 &lt;&lt; 24)</div><div class='add'>+#define TA_REFINTERVAL_SHIFT				0</div><div class='add'>+#define TA_REFINTERVAL_MASK				(0x3fffff &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* OCP_ERROR_LOG */</div><div class='add'>+#define MADDRSPACE_SHIFT				14</div><div class='add'>+#define MADDRSPACE_MASK					(0x3 &lt;&lt; 14)</div><div class='add'>+#define MBURSTSEQ_SHIFT					11</div><div class='add'>+#define MBURSTSEQ_MASK					(0x7 &lt;&lt; 11)</div><div class='add'>+#define MCMD_SHIFT					8</div><div class='add'>+#define MCMD_MASK					(0x7 &lt;&lt; 8)</div><div class='add'>+#define MCONNID_SHIFT					0</div><div class='add'>+#define MCONNID_MASK					(0xff &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* DDR_PHY_CTRL_1 - EMIF4D */</div><div class='add'>+#define DLL_SLAVE_DLY_CTRL_SHIFT_4D			4</div><div class='add'>+#define DLL_SLAVE_DLY_CTRL_MASK_4D			(0xFF &lt;&lt; 4)</div><div class='add'>+#define READ_LATENCY_SHIFT_4D				0</div><div class='add'>+#define READ_LATENCY_MASK_4D				(0xf &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* DDR_PHY_CTRL_1 - EMIF4D5 */</div><div class='add'>+#define DLL_HALF_DELAY_SHIFT_4D5			21</div><div class='add'>+#define DLL_HALF_DELAY_MASK_4D5				(1 &lt;&lt; 21)</div><div class='add'>+#define READ_LATENCY_SHIFT_4D5				0</div><div class='add'>+#define READ_LATENCY_MASK_4D5				(0x1f &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* DDR_PHY_CTRL_1_SHDW */</div><div class='add'>+#define DDR_PHY_CTRL_1_SHDW_SHIFT			5</div><div class='add'>+#define DDR_PHY_CTRL_1_SHDW_MASK			(0x7ffffff &lt;&lt; 5)</div><div class='add'>+#define READ_LATENCY_SHDW_SHIFT				0</div><div class='add'>+#define READ_LATENCY_SHDW_MASK				(0x1f &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+#ifndef __ASSEMBLY__</div><div class='add'>+/*</div><div class='add'>+ * Structure containing shadow of important registers in EMIF</div><div class='add'>+ * The calculation function fills in this structure to be later used for</div><div class='add'>+ * initialisation and DVFS</div><div class='add'>+ */</div><div class='add'>+struct emif_regs {</div><div class='add'>+	u32 freq;</div><div class='add'>+	u32 ref_ctrl_shdw;</div><div class='add'>+	u32 ref_ctrl_shdw_derated;</div><div class='add'>+	u32 sdram_tim1_shdw;</div><div class='add'>+	u32 sdram_tim1_shdw_derated;</div><div class='add'>+	u32 sdram_tim2_shdw;</div><div class='add'>+	u32 sdram_tim3_shdw;</div><div class='add'>+	u32 sdram_tim3_shdw_derated;</div><div class='add'>+	u32 pwr_mgmt_ctrl_shdw;</div><div class='add'>+	union {</div><div class='add'>+		u32 read_idle_ctrl_shdw_normal;</div><div class='add'>+		u32 dll_calib_ctrl_shdw_normal;</div><div class='add'>+	};</div><div class='add'>+	union {</div><div class='add'>+		u32 read_idle_ctrl_shdw_volt_ramp;</div><div class='add'>+		u32 dll_calib_ctrl_shdw_volt_ramp;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	u32 phy_ctrl_1_shdw;</div><div class='add'>+	u32 ext_phy_ctrl_2_shdw;</div><div class='add'>+	u32 ext_phy_ctrl_3_shdw;</div><div class='add'>+	u32 ext_phy_ctrl_4_shdw;</div><div class='add'>+};</div><div class='add'>+#endif /* __ASSEMBLY__ */</div><div class='add'>+#endif /* __EMIF_H */</div><div class='head'>diff --git a/drivers/memory/tegra20-mc.c b/drivers/memory/tegra20-mc.c<br/>new file mode 100644<br/>index 000000000000..3ed49c1c2b91<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/memory/tegra20-mc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/memory/tegra20-mc.c</a></div><div class='hunk'>@@ -0,0 +1,257 @@</div><div class='add'>+/*</div><div class='add'>+ * Tegra20 Memory Controller</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along with</div><div class='add'>+ * this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/ratelimit.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_NAME "tegra20-mc"</div><div class='add'>+</div><div class='add'>+#define MC_INTSTATUS			0x0</div><div class='add'>+#define MC_INTMASK			0x4</div><div class='add'>+</div><div class='add'>+#define MC_INT_ERR_SHIFT		6</div><div class='add'>+#define MC_INT_ERR_MASK			(0x1f &lt;&lt; MC_INT_ERR_SHIFT)</div><div class='add'>+#define MC_INT_DECERR_EMEM		BIT(MC_INT_ERR_SHIFT)</div><div class='add'>+#define MC_INT_INVALID_GART_PAGE	BIT(MC_INT_ERR_SHIFT + 1)</div><div class='add'>+#define MC_INT_SECURITY_VIOLATION	BIT(MC_INT_ERR_SHIFT + 2)</div><div class='add'>+#define MC_INT_ARBITRATION_EMEM		BIT(MC_INT_ERR_SHIFT + 3)</div><div class='add'>+</div><div class='add'>+#define MC_GART_ERROR_REQ		0x30</div><div class='add'>+#define MC_DECERR_EMEM_OTHERS_STATUS	0x58</div><div class='add'>+#define MC_SECURITY_VIOLATION_STATUS	0x74</div><div class='add'>+</div><div class='add'>+#define SECURITY_VIOLATION_TYPE		BIT(30)	/* 0=TRUSTZONE, 1=CARVEOUT */</div><div class='add'>+</div><div class='add'>+#define MC_CLIENT_ID_MASK		0x3f</div><div class='add'>+</div><div class='add'>+#define NUM_MC_REG_BANKS		2</div><div class='add'>+</div><div class='add'>+struct tegra20_mc {</div><div class='add'>+	void __iomem *regs[NUM_MC_REG_BANKS];</div><div class='add'>+	struct device *dev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32 mc_readl(struct tegra20_mc *mc, u32 offs)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	if (offs &lt; 0x24)</div><div class='add'>+		val = readl(mc-&gt;regs[0] + offs);</div><div class='add'>+	if (offs &lt; 0x400)</div><div class='add'>+		val = readl(mc-&gt;regs[1] + offs - 0x3c);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mc_writel(struct tegra20_mc *mc, u32 val, u32 offs)</div><div class='add'>+{</div><div class='add'>+	if (offs &lt; 0x24) {</div><div class='add'>+		writel(val, mc-&gt;regs[0] + offs);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (offs &lt; 0x400) {</div><div class='add'>+		writel(val, mc-&gt;regs[1] + offs - 0x3c);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const tegra20_mc_client[] = {</div><div class='add'>+	"cbr_display0a",</div><div class='add'>+	"cbr_display0ab",</div><div class='add'>+	"cbr_display0b",</div><div class='add'>+	"cbr_display0bb",</div><div class='add'>+	"cbr_display0c",</div><div class='add'>+	"cbr_display0cb",</div><div class='add'>+	"cbr_display1b",</div><div class='add'>+	"cbr_display1bb",</div><div class='add'>+	"cbr_eppup",</div><div class='add'>+	"cbr_g2pr",</div><div class='add'>+	"cbr_g2sr",</div><div class='add'>+	"cbr_mpeunifbr",</div><div class='add'>+	"cbr_viruv",</div><div class='add'>+	"csr_avpcarm7r",</div><div class='add'>+	"csr_displayhc",</div><div class='add'>+	"csr_displayhcb",</div><div class='add'>+	"csr_fdcdrd",</div><div class='add'>+	"csr_g2dr",</div><div class='add'>+	"csr_host1xdmar",</div><div class='add'>+	"csr_host1xr",</div><div class='add'>+	"csr_idxsrd",</div><div class='add'>+	"csr_mpcorer",</div><div class='add'>+	"csr_mpe_ipred",</div><div class='add'>+	"csr_mpeamemrd",</div><div class='add'>+	"csr_mpecsrd",</div><div class='add'>+	"csr_ppcsahbdmar",</div><div class='add'>+	"csr_ppcsahbslvr",</div><div class='add'>+	"csr_texsrd",</div><div class='add'>+	"csr_vdebsevr",</div><div class='add'>+	"csr_vdember",</div><div class='add'>+	"csr_vdemcer",</div><div class='add'>+	"csr_vdetper",</div><div class='add'>+	"cbw_eppu",</div><div class='add'>+	"cbw_eppv",</div><div class='add'>+	"cbw_eppy",</div><div class='add'>+	"cbw_mpeunifbw",</div><div class='add'>+	"cbw_viwsb",</div><div class='add'>+	"cbw_viwu",</div><div class='add'>+	"cbw_viwv",</div><div class='add'>+	"cbw_viwy",</div><div class='add'>+	"ccw_g2dw",</div><div class='add'>+	"csw_avpcarm7w",</div><div class='add'>+	"csw_fdcdwr",</div><div class='add'>+	"csw_host1xw",</div><div class='add'>+	"csw_ispw",</div><div class='add'>+	"csw_mpcorew",</div><div class='add'>+	"csw_mpecswr",</div><div class='add'>+	"csw_ppcsahbdmaw",</div><div class='add'>+	"csw_ppcsahbslvw",</div><div class='add'>+	"csw_vdebsevw",</div><div class='add'>+	"csw_vdembew",</div><div class='add'>+	"csw_vdetpmw",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void tegra20_mc_decode(struct tegra20_mc *mc, int n)</div><div class='add'>+{</div><div class='add'>+	u32 addr, req;</div><div class='add'>+	const char *client = "Unknown";</div><div class='add'>+	int idx, cid;</div><div class='add'>+	const struct reg_info {</div><div class='add'>+		u32 offset;</div><div class='add'>+		u32 write_bit;	/* 0=READ, 1=WRITE */</div><div class='add'>+		int cid_shift;</div><div class='add'>+		char *message;</div><div class='add'>+	} reg[] = {</div><div class='add'>+		{</div><div class='add'>+			.offset = MC_DECERR_EMEM_OTHERS_STATUS,</div><div class='add'>+			.write_bit = 31,</div><div class='add'>+			.message = "MC_DECERR",</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.offset	= MC_GART_ERROR_REQ,</div><div class='add'>+			.cid_shift = 1,</div><div class='add'>+			.message = "MC_GART_ERR",</div><div class='add'>+</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.offset = MC_SECURITY_VIOLATION_STATUS,</div><div class='add'>+			.write_bit = 31,</div><div class='add'>+			.message = "MC_SECURITY_ERR",</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	idx = n - MC_INT_ERR_SHIFT;</div><div class='add'>+	if ((idx &lt; 0) || (idx &gt;= ARRAY_SIZE(reg))) {</div><div class='add'>+		dev_err_ratelimited(mc-&gt;dev, "Unknown interrupt status %08lx\n",</div><div class='add'>+				    BIT(n));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	req = mc_readl(mc, reg[idx].offset);</div><div class='add'>+	cid = (req &gt;&gt; reg[idx].cid_shift) &amp; MC_CLIENT_ID_MASK;</div><div class='add'>+	if (cid &lt; ARRAY_SIZE(tegra20_mc_client))</div><div class='add'>+		client = tegra20_mc_client[cid];</div><div class='add'>+</div><div class='add'>+	addr = mc_readl(mc, reg[idx].offset + sizeof(u32));</div><div class='add'>+</div><div class='add'>+	dev_err_ratelimited(mc-&gt;dev, "%s (0x%08x): 0x%08x %s (%s %s)\n",</div><div class='add'>+			   reg[idx].message, req, addr, client,</div><div class='add'>+			   (req &amp; BIT(reg[idx].write_bit)) ? "write" : "read",</div><div class='add'>+			   (reg[idx].offset == MC_SECURITY_VIOLATION_STATUS) ?</div><div class='add'>+			   ((req &amp; SECURITY_VIOLATION_TYPE) ?</div><div class='add'>+			    "carveout" : "trustzone") : "");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id tegra20_mc_of_match[] __devinitconst = {</div><div class='add'>+	{ .compatible = "nvidia,tegra20-mc", },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static irqreturn_t tegra20_mc_isr(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	u32 stat, mask, bit;</div><div class='add'>+	struct tegra20_mc *mc = data;</div><div class='add'>+</div><div class='add'>+	stat = mc_readl(mc, MC_INTSTATUS);</div><div class='add'>+	mask = mc_readl(mc, MC_INTMASK);</div><div class='add'>+	mask &amp;= stat;</div><div class='add'>+	if (!mask)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	while ((bit = ffs(mask)) != 0)</div><div class='add'>+		tegra20_mc_decode(mc, bit - 1);</div><div class='add'>+	mc_writel(mc, stat, MC_INTSTATUS);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit tegra20_mc_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct resource *irq;</div><div class='add'>+	struct tegra20_mc *mc;</div><div class='add'>+	int i, err;</div><div class='add'>+	u32 intmask;</div><div class='add'>+</div><div class='add'>+	mc = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*mc), GFP_KERNEL);</div><div class='add'>+	if (!mc)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	mc-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mc-&gt;regs); i++) {</div><div class='add'>+		struct resource *res;</div><div class='add'>+</div><div class='add'>+		res = platform_get_resource(pdev, IORESOURCE_MEM, i);</div><div class='add'>+		if (!res)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		mc-&gt;regs[i] = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='add'>+		if (!mc-&gt;regs[i])</div><div class='add'>+			return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='add'>+	if (!irq)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	err = devm_request_irq(&amp;pdev-&gt;dev, irq-&gt;start, tegra20_mc_isr,</div><div class='add'>+			       IRQF_SHARED, dev_name(&amp;pdev-&gt;dev), mc);</div><div class='add'>+	if (err)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, mc);</div><div class='add'>+</div><div class='add'>+	intmask = MC_INT_INVALID_GART_PAGE |</div><div class='add'>+		MC_INT_DECERR_EMEM | MC_INT_SECURITY_VIOLATION;</div><div class='add'>+	mc_writel(mc, intmask, MC_INTMASK);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver tegra20_mc_driver = {</div><div class='add'>+	.probe = tegra20_mc_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DRV_NAME,</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = tegra20_mc_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(tegra20_mc_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Hiroshi DOYU &lt;hdoyu@nvidia.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Tegra20 MC driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_ALIAS("platform:" DRV_NAME);</div><div class='head'>diff --git a/drivers/memory/tegra30-mc.c b/drivers/memory/tegra30-mc.c<br/>new file mode 100644<br/>index 000000000000..e56ff04eb5cc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/memory/tegra30-mc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/memory/tegra30-mc.c</a></div><div class='hunk'>@@ -0,0 +1,382 @@</div><div class='add'>+/*</div><div class='add'>+ * Tegra30 Memory Controller</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along with</div><div class='add'>+ * this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/ratelimit.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_NAME "tegra30-mc"</div><div class='add'>+</div><div class='add'>+#define MC_INTSTATUS			0x0</div><div class='add'>+#define MC_INTMASK			0x4</div><div class='add'>+</div><div class='add'>+#define MC_INT_ERR_SHIFT		6</div><div class='add'>+#define MC_INT_ERR_MASK			(0x1f &lt;&lt; MC_INT_ERR_SHIFT)</div><div class='add'>+#define MC_INT_DECERR_EMEM		BIT(MC_INT_ERR_SHIFT)</div><div class='add'>+#define MC_INT_SECURITY_VIOLATION	BIT(MC_INT_ERR_SHIFT + 2)</div><div class='add'>+#define MC_INT_ARBITRATION_EMEM		BIT(MC_INT_ERR_SHIFT + 3)</div><div class='add'>+#define MC_INT_INVALID_SMMU_PAGE	BIT(MC_INT_ERR_SHIFT + 4)</div><div class='add'>+</div><div class='add'>+#define MC_ERR_STATUS			0x8</div><div class='add'>+#define MC_ERR_ADR			0xc</div><div class='add'>+</div><div class='add'>+#define MC_ERR_TYPE_SHIFT		28</div><div class='add'>+#define MC_ERR_TYPE_MASK		(7 &lt;&lt; MC_ERR_TYPE_SHIFT)</div><div class='add'>+#define MC_ERR_TYPE_DECERR_EMEM		2</div><div class='add'>+#define MC_ERR_TYPE_SECURITY_TRUSTZONE	3</div><div class='add'>+#define MC_ERR_TYPE_SECURITY_CARVEOUT	4</div><div class='add'>+#define MC_ERR_TYPE_INVALID_SMMU_PAGE	6</div><div class='add'>+</div><div class='add'>+#define MC_ERR_INVALID_SMMU_PAGE_SHIFT	25</div><div class='add'>+#define MC_ERR_INVALID_SMMU_PAGE_MASK	(7 &lt;&lt; MC_ERR_INVALID_SMMU_PAGE_SHIFT)</div><div class='add'>+#define MC_ERR_RW_SHIFT			16</div><div class='add'>+#define MC_ERR_RW			BIT(MC_ERR_RW_SHIFT)</div><div class='add'>+#define MC_ERR_SECURITY			BIT(MC_ERR_RW_SHIFT + 1)</div><div class='add'>+</div><div class='add'>+#define SECURITY_VIOLATION_TYPE		BIT(30)	/* 0=TRUSTZONE, 1=CARVEOUT */</div><div class='add'>+</div><div class='add'>+#define MC_EMEM_ARB_CFG			0x90</div><div class='add'>+#define MC_EMEM_ARB_OUTSTANDING_REQ	0x94</div><div class='add'>+#define MC_EMEM_ARB_TIMING_RCD		0x98</div><div class='add'>+#define MC_EMEM_ARB_TIMING_RP		0x9c</div><div class='add'>+#define MC_EMEM_ARB_TIMING_RC		0xa0</div><div class='add'>+#define MC_EMEM_ARB_TIMING_RAS		0xa4</div><div class='add'>+#define MC_EMEM_ARB_TIMING_FAW		0xa8</div><div class='add'>+#define MC_EMEM_ARB_TIMING_RRD		0xac</div><div class='add'>+#define MC_EMEM_ARB_TIMING_RAP2PRE	0xb0</div><div class='add'>+#define MC_EMEM_ARB_TIMING_WAP2PRE	0xb4</div><div class='add'>+#define MC_EMEM_ARB_TIMING_R2R		0xb8</div><div class='add'>+#define MC_EMEM_ARB_TIMING_W2W		0xbc</div><div class='add'>+#define MC_EMEM_ARB_TIMING_R2W		0xc0</div><div class='add'>+#define MC_EMEM_ARB_TIMING_W2R		0xc4</div><div class='add'>+</div><div class='add'>+#define MC_EMEM_ARB_DA_TURNS		0xd0</div><div class='add'>+#define MC_EMEM_ARB_DA_COVERS		0xd4</div><div class='add'>+#define MC_EMEM_ARB_MISC0		0xd8</div><div class='add'>+#define MC_EMEM_ARB_MISC1		0xdc</div><div class='add'>+</div><div class='add'>+#define MC_EMEM_ARB_RING3_THROTTLE	0xe4</div><div class='add'>+#define MC_EMEM_ARB_OVERRIDE		0xe8</div><div class='add'>+</div><div class='add'>+#define MC_TIMING_CONTROL		0xfc</div><div class='add'>+</div><div class='add'>+#define MC_CLIENT_ID_MASK		0x7f</div><div class='add'>+</div><div class='add'>+#define NUM_MC_REG_BANKS		4</div><div class='add'>+</div><div class='add'>+struct tegra30_mc {</div><div class='add'>+	void __iomem *regs[NUM_MC_REG_BANKS];</div><div class='add'>+	struct device *dev;</div><div class='add'>+	u32 ctx[0];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32 mc_readl(struct tegra30_mc *mc, u32 offs)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	if (offs &lt; 0x10)</div><div class='add'>+		val = readl(mc-&gt;regs[0] + offs);</div><div class='add'>+	if (offs &lt; 0x1f0)</div><div class='add'>+		val = readl(mc-&gt;regs[1] + offs - 0x3c);</div><div class='add'>+	if (offs &lt; 0x228)</div><div class='add'>+		val = readl(mc-&gt;regs[2] + offs - 0x200);</div><div class='add'>+	if (offs &lt; 0x400)</div><div class='add'>+		val = readl(mc-&gt;regs[3] + offs - 0x284);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mc_writel(struct tegra30_mc *mc, u32 val, u32 offs)</div><div class='add'>+{</div><div class='add'>+	if (offs &lt; 0x10) {</div><div class='add'>+		writel(val, mc-&gt;regs[0] + offs);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (offs &lt; 0x1f0) {</div><div class='add'>+		writel(val, mc-&gt;regs[1] + offs - 0x3c);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (offs &lt; 0x228) {</div><div class='add'>+		writel(val, mc-&gt;regs[2] + offs - 0x200);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (offs &lt; 0x400) {</div><div class='add'>+		writel(val, mc-&gt;regs[3] + offs - 0x284);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const tegra30_mc_client[] = {</div><div class='add'>+	"csr_ptcr",</div><div class='add'>+	"cbr_display0a",</div><div class='add'>+	"cbr_display0ab",</div><div class='add'>+	"cbr_display0b",</div><div class='add'>+	"cbr_display0bb",</div><div class='add'>+	"cbr_display0c",</div><div class='add'>+	"cbr_display0cb",</div><div class='add'>+	"cbr_display1b",</div><div class='add'>+	"cbr_display1bb",</div><div class='add'>+	"cbr_eppup",</div><div class='add'>+	"cbr_g2pr",</div><div class='add'>+	"cbr_g2sr",</div><div class='add'>+	"cbr_mpeunifbr",</div><div class='add'>+	"cbr_viruv",</div><div class='add'>+	"csr_afir",</div><div class='add'>+	"csr_avpcarm7r",</div><div class='add'>+	"csr_displayhc",</div><div class='add'>+	"csr_displayhcb",</div><div class='add'>+	"csr_fdcdrd",</div><div class='add'>+	"csr_fdcdrd2",</div><div class='add'>+	"csr_g2dr",</div><div class='add'>+	"csr_hdar",</div><div class='add'>+	"csr_host1xdmar",</div><div class='add'>+	"csr_host1xr",</div><div class='add'>+	"csr_idxsrd",</div><div class='add'>+	"csr_idxsrd2",</div><div class='add'>+	"csr_mpe_ipred",</div><div class='add'>+	"csr_mpeamemrd",</div><div class='add'>+	"csr_mpecsrd",</div><div class='add'>+	"csr_ppcsahbdmar",</div><div class='add'>+	"csr_ppcsahbslvr",</div><div class='add'>+	"csr_satar",</div><div class='add'>+	"csr_texsrd",</div><div class='add'>+	"csr_texsrd2",</div><div class='add'>+	"csr_vdebsevr",</div><div class='add'>+	"csr_vdember",</div><div class='add'>+	"csr_vdemcer",</div><div class='add'>+	"csr_vdetper",</div><div class='add'>+	"csr_mpcorelpr",</div><div class='add'>+	"csr_mpcorer",</div><div class='add'>+	"cbw_eppu",</div><div class='add'>+	"cbw_eppv",</div><div class='add'>+	"cbw_eppy",</div><div class='add'>+	"cbw_mpeunifbw",</div><div class='add'>+	"cbw_viwsb",</div><div class='add'>+	"cbw_viwu",</div><div class='add'>+	"cbw_viwv",</div><div class='add'>+	"cbw_viwy",</div><div class='add'>+	"ccw_g2dw",</div><div class='add'>+	"csw_afiw",</div><div class='add'>+	"csw_avpcarm7w",</div><div class='add'>+	"csw_fdcdwr",</div><div class='add'>+	"csw_fdcdwr2",</div><div class='add'>+	"csw_hdaw",</div><div class='add'>+	"csw_host1xw",</div><div class='add'>+	"csw_ispw",</div><div class='add'>+	"csw_mpcorelpw",</div><div class='add'>+	"csw_mpcorew",</div><div class='add'>+	"csw_mpecswr",</div><div class='add'>+	"csw_ppcsahbdmaw",</div><div class='add'>+	"csw_ppcsahbslvw",</div><div class='add'>+	"csw_sataw",</div><div class='add'>+	"csw_vdebsevw",</div><div class='add'>+	"csw_vdedbgw",</div><div class='add'>+	"csw_vdembew",</div><div class='add'>+	"csw_vdetpmw",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void tegra30_mc_decode(struct tegra30_mc *mc, int n)</div><div class='add'>+{</div><div class='add'>+	u32 err, addr;</div><div class='add'>+	const char * const mc_int_err[] = {</div><div class='add'>+		"MC_DECERR",</div><div class='add'>+		"Unknown",</div><div class='add'>+		"MC_SECURITY_ERR",</div><div class='add'>+		"MC_ARBITRATION_EMEM",</div><div class='add'>+		"MC_SMMU_ERR",</div><div class='add'>+	};</div><div class='add'>+	const char * const err_type[] = {</div><div class='add'>+		"Unknown",</div><div class='add'>+		"Unknown",</div><div class='add'>+		"DECERR_EMEM",</div><div class='add'>+		"SECURITY_TRUSTZONE",</div><div class='add'>+		"SECURITY_CARVEOUT",</div><div class='add'>+		"Unknown",</div><div class='add'>+		"INVALID_SMMU_PAGE",</div><div class='add'>+		"Unknown",</div><div class='add'>+	};</div><div class='add'>+	char attr[6];</div><div class='add'>+	int cid, perm, type, idx;</div><div class='add'>+	const char *client = "Unknown";</div><div class='add'>+</div><div class='add'>+	idx = n - MC_INT_ERR_SHIFT;</div><div class='add'>+	if ((idx &lt; 0) || (idx &gt;= ARRAY_SIZE(mc_int_err)) || (idx == 1)) {</div><div class='add'>+		dev_err_ratelimited(mc-&gt;dev, "Unknown interrupt status %08lx\n",</div><div class='add'>+				    BIT(n));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = readl(mc + MC_ERR_STATUS);</div><div class='add'>+</div><div class='add'>+	type = (err &amp; MC_ERR_TYPE_MASK) &gt;&gt; MC_ERR_TYPE_SHIFT;</div><div class='add'>+	perm = (err &amp; MC_ERR_INVALID_SMMU_PAGE_MASK) &gt;&gt;</div><div class='add'>+		MC_ERR_INVALID_SMMU_PAGE_SHIFT;</div><div class='add'>+	if (type == MC_ERR_TYPE_INVALID_SMMU_PAGE)</div><div class='add'>+		sprintf(attr, "%c-%c-%c",</div><div class='add'>+			(perm &amp; BIT(2)) ? 'R' : '-',</div><div class='add'>+			(perm &amp; BIT(1)) ? 'W' : '-',</div><div class='add'>+			(perm &amp; BIT(0)) ? 'S' : '-');</div><div class='add'>+	else</div><div class='add'>+		attr[0] = '\0';</div><div class='add'>+</div><div class='add'>+	cid = err &amp; MC_CLIENT_ID_MASK;</div><div class='add'>+	if (cid &lt; ARRAY_SIZE(tegra30_mc_client))</div><div class='add'>+		client = tegra30_mc_client[cid];</div><div class='add'>+</div><div class='add'>+	addr = readl(mc + MC_ERR_ADR);</div><div class='add'>+</div><div class='add'>+	dev_err_ratelimited(mc-&gt;dev, "%s (0x%08x): 0x%08x %s (%s %s %s %s)\n",</div><div class='add'>+			   mc_int_err[idx], err, addr, client,</div><div class='add'>+			   (err &amp; MC_ERR_SECURITY) ? "secure" : "non-secure",</div><div class='add'>+			   (err &amp; MC_ERR_RW) ? "write" : "read",</div><div class='add'>+			   err_type[type], attr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u32 tegra30_mc_ctx[] = {</div><div class='add'>+	MC_EMEM_ARB_CFG,</div><div class='add'>+	MC_EMEM_ARB_OUTSTANDING_REQ,</div><div class='add'>+	MC_EMEM_ARB_TIMING_RCD,</div><div class='add'>+	MC_EMEM_ARB_TIMING_RP,</div><div class='add'>+	MC_EMEM_ARB_TIMING_RC,</div><div class='add'>+	MC_EMEM_ARB_TIMING_RAS,</div><div class='add'>+	MC_EMEM_ARB_TIMING_FAW,</div><div class='add'>+	MC_EMEM_ARB_TIMING_RRD,</div><div class='add'>+	MC_EMEM_ARB_TIMING_RAP2PRE,</div><div class='add'>+	MC_EMEM_ARB_TIMING_WAP2PRE,</div><div class='add'>+	MC_EMEM_ARB_TIMING_R2R,</div><div class='add'>+	MC_EMEM_ARB_TIMING_W2W,</div><div class='add'>+	MC_EMEM_ARB_TIMING_R2W,</div><div class='add'>+	MC_EMEM_ARB_TIMING_W2R,</div><div class='add'>+	MC_EMEM_ARB_DA_TURNS,</div><div class='add'>+	MC_EMEM_ARB_DA_COVERS,</div><div class='add'>+	MC_EMEM_ARB_MISC0,</div><div class='add'>+	MC_EMEM_ARB_MISC1,</div><div class='add'>+	MC_EMEM_ARB_RING3_THROTTLE,</div><div class='add'>+	MC_EMEM_ARB_OVERRIDE,</div><div class='add'>+	MC_INTMASK,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tegra30_mc_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct tegra30_mc *mc = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tegra30_mc_ctx); i++)</div><div class='add'>+		mc-&gt;ctx[i] = mc_readl(mc, tegra30_mc_ctx[i]);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tegra30_mc_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct tegra30_mc *mc = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tegra30_mc_ctx); i++)</div><div class='add'>+		mc_writel(mc, mc-&gt;ctx[i], tegra30_mc_ctx[i]);</div><div class='add'>+</div><div class='add'>+	mc_writel(mc, 1, MC_TIMING_CONTROL);</div><div class='add'>+	/* Read-back to ensure that write reached */</div><div class='add'>+	mc_readl(mc, MC_TIMING_CONTROL);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static UNIVERSAL_DEV_PM_OPS(tegra30_mc_pm,</div><div class='add'>+			    tegra30_mc_suspend,</div><div class='add'>+			    tegra30_mc_resume, NULL);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id tegra30_mc_of_match[] __devinitconst = {</div><div class='add'>+	{ .compatible = "nvidia,tegra30-mc", },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static irqreturn_t tegra30_mc_isr(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	u32 stat, mask, bit;</div><div class='add'>+	struct tegra30_mc *mc = data;</div><div class='add'>+</div><div class='add'>+	stat = mc_readl(mc, MC_INTSTATUS);</div><div class='add'>+	mask = mc_readl(mc, MC_INTMASK);</div><div class='add'>+	mask &amp;= stat;</div><div class='add'>+	if (!mask)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	while ((bit = ffs(mask)) != 0)</div><div class='add'>+		tegra30_mc_decode(mc, bit - 1);</div><div class='add'>+	mc_writel(mc, stat, MC_INTSTATUS);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit tegra30_mc_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct resource *irq;</div><div class='add'>+	struct tegra30_mc *mc;</div><div class='add'>+	size_t bytes;</div><div class='add'>+	int err, i;</div><div class='add'>+	u32 intmask;</div><div class='add'>+</div><div class='add'>+	bytes = sizeof(*mc) + sizeof(u32) * ARRAY_SIZE(tegra30_mc_ctx);</div><div class='add'>+	mc = devm_kzalloc(&amp;pdev-&gt;dev, bytes, GFP_KERNEL);</div><div class='add'>+	if (!mc)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	mc-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mc-&gt;regs); i++) {</div><div class='add'>+		struct resource *res;</div><div class='add'>+</div><div class='add'>+		res = platform_get_resource(pdev, IORESOURCE_MEM, i);</div><div class='add'>+		if (!res)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		mc-&gt;regs[i] = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='add'>+		if (!mc-&gt;regs[i])</div><div class='add'>+			return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='add'>+	if (!irq)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	err = devm_request_irq(&amp;pdev-&gt;dev, irq-&gt;start, tegra30_mc_isr,</div><div class='add'>+			       IRQF_SHARED, dev_name(&amp;pdev-&gt;dev), mc);</div><div class='add'>+	if (err)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, mc);</div><div class='add'>+</div><div class='add'>+	intmask = MC_INT_INVALID_SMMU_PAGE |</div><div class='add'>+		MC_INT_DECERR_EMEM | MC_INT_SECURITY_VIOLATION;</div><div class='add'>+	mc_writel(mc, intmask, MC_INTMASK);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver tegra30_mc_driver = {</div><div class='add'>+	.probe = tegra30_mc_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DRV_NAME,</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = tegra30_mc_of_match,</div><div class='add'>+		.pm = &amp;tegra30_mc_pm,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(tegra30_mc_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Hiroshi DOYU &lt;hdoyu@nvidia.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Tegra30 MC driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_ALIAS("platform:" DRV_NAME);</div><div class='head'>diff --git a/drivers/message/fusion/mptbase.c b/drivers/message/fusion/mptbase.c<br/>index a5c591ffe395..d99db5623acf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/message/fusion/mptbase.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/message/fusion/mptbase.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/message/fusion/mptbase.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/message/fusion/mptbase.c</a></div><div class='hunk'>@@ -1653,7 +1653,6 @@ mpt_mapresources(MPT_ADAPTER *ioc)</div><div class='ctx'> 	unsigned long	 port;</div><div class='ctx'> 	u32		 msize;</div><div class='ctx'> 	u32		 psize;</div><div class='del'>-	u8		 revision;</div><div class='ctx'> 	int		 r = -ENODEV;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> </div><div class='hunk'>@@ -1670,8 +1669,6 @@ mpt_mapresources(MPT_ADAPTER *ioc)</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pci_read_config_byte(pdev, PCI_CLASS_REVISION, &amp;revision);</div><div class='del'>-</div><div class='ctx'> 	if (sizeof(dma_addr_t) &gt; 4) {</div><div class='ctx'> 		const uint64_t required_mask = dma_get_required_mask</div><div class='ctx'> 		    (&amp;pdev-&gt;dev);</div><div class='hunk'>@@ -1779,7 +1776,6 @@ mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	MPT_ADAPTER	*ioc;</div><div class='ctx'> 	u8		 cb_idx;</div><div class='ctx'> 	int		 r = -ENODEV;</div><div class='del'>-	u8		 revision;</div><div class='ctx'> 	u8		 pcixcmd;</div><div class='ctx'> 	static int	 mpt_ids = 0;</div><div class='ctx'> #ifdef CONFIG_PROC_FS</div><div class='hunk'>@@ -1887,8 +1883,8 @@ mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "facts @ %p, pfacts[0] @ %p\n",</div><div class='ctx'> 	    ioc-&gt;name, &amp;ioc-&gt;facts, &amp;ioc-&gt;pfacts[0]));</div><div class='ctx'> </div><div class='del'>-	pci_read_config_byte(pdev, PCI_CLASS_REVISION, &amp;revision);</div><div class='del'>-	mpt_get_product_name(pdev-&gt;vendor, pdev-&gt;device, revision, ioc-&gt;prod_name);</div><div class='add'>+	mpt_get_product_name(pdev-&gt;vendor, pdev-&gt;device, pdev-&gt;revision,</div><div class='add'>+			     ioc-&gt;prod_name);</div><div class='ctx'> </div><div class='ctx'> 	switch (pdev-&gt;device)</div><div class='ctx'> 	{</div><div class='hunk'>@@ -1903,7 +1899,7 @@ mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case MPI_MANUFACTPAGE_DEVICEID_FC929X:</div><div class='del'>-		if (revision &lt; XL_929) {</div><div class='add'>+		if (pdev-&gt;revision &lt; XL_929) {</div><div class='ctx'> 			/* 929X Chip Fix. Set Split transactions level</div><div class='ctx'> 		 	* for PCIX. Set MOST bits to zero.</div><div class='ctx'> 		 	*/</div><div class='hunk'>@@ -1934,7 +1930,7 @@ mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 		/* 1030 Chip Fix. Disable Split transactions</div><div class='ctx'> 		 * for PCIX. Set MOST bits to zero if Rev &lt; C0( = 8).</div><div class='ctx'> 		 */</div><div class='del'>-		if (revision &lt; C0_1030) {</div><div class='add'>+		if (pdev-&gt;revision &lt; C0_1030) {</div><div class='ctx'> 			pci_read_config_byte(pdev, 0x6a, &amp;pcixcmd);</div><div class='ctx'> 			pcixcmd &amp;= 0x8F;</div><div class='ctx'> 			pci_write_config_byte(pdev, 0x6a, pcixcmd);</div><div class='hunk'>@@ -6483,6 +6479,7 @@ mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)</div><div class='ctx'> 				printk(MYIOC_s_INFO_FMT "%s: host reset in"</div><div class='ctx'> 					" progress mpt_config timed out.!!\n",</div><div class='ctx'> 					__func__, ioc-&gt;name);</div><div class='add'>+				mutex_unlock(&amp;ioc-&gt;mptbase_cmds.mutex);</div><div class='ctx'> 				return -EFAULT;</div><div class='ctx'> 			}</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;ioc-&gt;taskmgmt_lock, flags);</div><div class='head'>diff --git a/drivers/message/fusion/mptctl.c b/drivers/message/fusion/mptctl.c<br/>index 6e6e16aab9da..b383b6961e59 100644<br/>--- a/<a href='/drm-misc/tree/drivers/message/fusion/mptctl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/message/fusion/mptctl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/message/fusion/mptctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/message/fusion/mptctl.c</a></div><div class='hunk'>@@ -1250,7 +1250,6 @@ mptctl_getiocinfo (unsigned long arg, unsigned int data_size)</div><div class='ctx'> 	int			iocnum;</div><div class='ctx'> 	unsigned int		port;</div><div class='ctx'> 	int			cim_rev;</div><div class='del'>-	u8			revision;</div><div class='ctx'> 	struct scsi_device 	*sdev;</div><div class='ctx'> 	VirtDevice		*vdevice;</div><div class='ctx'> </div><div class='hunk'>@@ -1324,8 +1323,7 @@ mptctl_getiocinfo (unsigned long arg, unsigned int data_size)</div><div class='ctx'> 	pdev = (struct pci_dev *) ioc-&gt;pcidev;</div><div class='ctx'> </div><div class='ctx'> 	karg-&gt;pciId = pdev-&gt;device;</div><div class='del'>-	pci_read_config_byte(pdev, PCI_CLASS_REVISION, &amp;revision);</div><div class='del'>-	karg-&gt;hwRev = revision;</div><div class='add'>+	karg-&gt;hwRev = pdev-&gt;revision;</div><div class='ctx'> 	karg-&gt;subSystemDevice = pdev-&gt;subsystem_device;</div><div class='ctx'> 	karg-&gt;subSystemVendor = pdev-&gt;subsystem_vendor;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/message/fusion/mptlan.h b/drivers/message/fusion/mptlan.h<br/>index c171afa93239..69e9d5463564 100644<br/>--- a/<a href='/drm-misc/tree/drivers/message/fusion/mptlan.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/message/fusion/mptlan.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/message/fusion/mptlan.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/message/fusion/mptlan.h</a></div><div class='hunk'>@@ -69,7 +69,6 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='del'>-// #include &lt;linux/trdevice.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='head'>diff --git a/drivers/message/i2o/i2o_proc.c b/drivers/message/i2o/i2o_proc.c<br/>index 6d115c7208ab..506c36f6e1db 100644<br/>--- a/<a href='/drm-misc/tree/drivers/message/i2o/i2o_proc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/message/i2o/i2o_proc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/message/i2o/i2o_proc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/message/i2o/i2o_proc.c</a></div><div class='hunk'>@@ -283,7 +283,6 @@ static char *bus_strings[] = {</div><div class='ctx'> 	"Local Bus",</div><div class='ctx'> 	"ISA",</div><div class='ctx'> 	"EISA",</div><div class='del'>-	"MCA",</div><div class='ctx'> 	"PCI",</div><div class='ctx'> 	"PCMCIA",</div><div class='ctx'> 	"NUBUS",</div><div class='hunk'>@@ -351,18 +350,6 @@ static int i2o_seq_show_hrt(struct seq_file *seq, void *v)</div><div class='ctx'> 					   EisaSlotNumber);</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='del'>-			case I2O_BUS_MCA:</div><div class='del'>-				seq_printf(seq, "     IOBase: %0#6x,",</div><div class='del'>-					   hrt-&gt;hrt_entry[i].bus.mca_bus.</div><div class='del'>-					   McaBaseIOPort);</div><div class='del'>-				seq_printf(seq, " MemoryBase: %0#10x,",</div><div class='del'>-					   hrt-&gt;hrt_entry[i].bus.mca_bus.</div><div class='del'>-					   McaBaseMemoryAddress);</div><div class='del'>-				seq_printf(seq, " Slot: %0#4x,",</div><div class='del'>-					   hrt-&gt;hrt_entry[i].bus.mca_bus.</div><div class='del'>-					   McaSlotNumber);</div><div class='del'>-				break;</div><div class='del'>-</div><div class='ctx'> 			case I2O_BUS_PCI:</div><div class='ctx'> 				seq_printf(seq, "     Bus: %0#4x",</div><div class='ctx'> 					   hrt-&gt;hrt_entry[i].bus.pci_bus.</div><div class='head'>diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig<br/>index 11e44386fa9b..e129c820df7d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/Kconfig</a></div><div class='hunk'>@@ -106,6 +106,19 @@ config UCB1400_CORE</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='ctx'> 	  module will be called ucb1400_core.</div><div class='ctx'> </div><div class='add'>+config MFD_LM3533</div><div class='add'>+	tristate "LM3533 Lighting Power chip"</div><div class='add'>+	depends on I2C</div><div class='add'>+	select MFD_CORE</div><div class='add'>+	select REGMAP_I2C</div><div class='add'>+	help</div><div class='add'>+	  Say yes here to enable support for National Semiconductor / TI</div><div class='add'>+	  LM3533 Lighting Power chips.</div><div class='add'>+</div><div class='add'>+	  This driver provides common support for accessing the device;</div><div class='add'>+	  additional drivers must be enabled in order to use the LED,</div><div class='add'>+	  backlight or ambient-light-sensor functionality of the device.</div><div class='add'>+</div><div class='ctx'> config TPS6105X</div><div class='ctx'> 	tristate "TPS61050/61052 Boost Converters"</div><div class='ctx'> 	depends on I2C</div><div class='hunk'>@@ -162,6 +175,7 @@ config MFD_TPS6586X</div><div class='ctx'> 	bool "TPS6586x Power Management chips"</div><div class='ctx'> 	depends on I2C=y &amp;&amp; GPIOLIB &amp;&amp; GENERIC_HARDIRQS</div><div class='ctx'> 	select MFD_CORE</div><div class='add'>+	depends on REGULATOR</div><div class='ctx'> 	help</div><div class='ctx'> 	  If you say yes here you get support for the TPS6586X series of</div><div class='ctx'> 	  Power Management chips.</div><div class='hunk'>@@ -176,8 +190,8 @@ config MFD_TPS65910</div><div class='ctx'> 	bool "TPS65910 Power Management chip"</div><div class='ctx'> 	depends on I2C=y &amp;&amp; GPIOLIB</div><div class='ctx'> 	select MFD_CORE</div><div class='del'>-	select GPIO_TPS65910</div><div class='ctx'> 	select REGMAP_I2C</div><div class='add'>+	select IRQ_DOMAIN</div><div class='ctx'> 	help</div><div class='ctx'> 	  if you say yes here you get support for the TPS65910 series of</div><div class='ctx'> 	  Power Management chips.</div><div class='hunk'>@@ -408,13 +422,26 @@ config PMIC_ADP5520</div><div class='ctx'> 	  individual components like LCD backlight, LEDs, GPIOs and Kepad</div><div class='ctx'> 	  under the corresponding menus.</div><div class='ctx'> </div><div class='add'>+config MFD_MAX77693</div><div class='add'>+	bool "Maxim Semiconductor MAX77693 PMIC Support"</div><div class='add'>+	depends on I2C=y &amp;&amp; GENERIC_HARDIRQS</div><div class='add'>+	select MFD_CORE</div><div class='add'>+	select REGMAP_I2C</div><div class='add'>+	help</div><div class='add'>+	  Say yes here to support for Maxim Semiconductor MAX77693.</div><div class='add'>+	  This is a companion Power Management IC with Flash, Haptic, Charger,</div><div class='add'>+	  and MUIC(Micro USB Interface Controller) controls on chip.</div><div class='add'>+	  This driver provides common support for accessing the device;</div><div class='add'>+	  additional drivers must be enabled in order to use the functionality</div><div class='add'>+	  of the device.</div><div class='add'>+</div><div class='ctx'> config MFD_MAX8925</div><div class='ctx'> 	bool "Maxim Semiconductor MAX8925 PMIC Support"</div><div class='ctx'> 	depends on I2C=y &amp;&amp; GENERIC_HARDIRQS</div><div class='ctx'> 	select MFD_CORE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to support for Maxim Semiconductor MAX8925. This is</div><div class='del'>-	  a Power Management IC. This driver provies common support for</div><div class='add'>+	  a Power Management IC. This driver provides common support for</div><div class='ctx'> 	  accessing the device, additional drivers must be enabled in order</div><div class='ctx'> 	  to use the functionality of the device.</div><div class='ctx'> </div><div class='hunk'>@@ -437,7 +464,7 @@ config MFD_MAX8998</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to support for Maxim Semiconductor MAX8998 and</div><div class='ctx'> 	  National Semiconductor LP3974. This is a Power Management IC.</div><div class='del'>-	  This driver provies common support for accessing the device,</div><div class='add'>+	  This driver provides common support for accessing the device,</div><div class='ctx'> 	  additional drivers must be enabled in order to use the functionality</div><div class='ctx'> 	  of the device.</div><div class='ctx'> </div><div class='hunk'>@@ -448,14 +475,14 @@ config MFD_S5M_CORE</div><div class='ctx'> 	select REGMAP_I2C</div><div class='ctx'> 	help</div><div class='ctx'> 	 Support for the Samsung Electronics S5M MFD series.</div><div class='del'>-	 This driver provies common support for accessing the device,</div><div class='add'>+	 This driver provides common support for accessing the device,</div><div class='ctx'> 	 additional drivers must be enabled in order to use the functionality</div><div class='ctx'> 	 of the device</div><div class='ctx'> </div><div class='ctx'> config MFD_WM8400</div><div class='del'>-	tristate "Support Wolfson Microelectronics WM8400"</div><div class='add'>+	bool "Support Wolfson Microelectronics WM8400"</div><div class='ctx'> 	select MFD_CORE</div><div class='del'>-	depends on I2C</div><div class='add'>+	depends on I2C=y</div><div class='ctx'> 	select REGMAP_I2C</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for the Wolfson Microelecronics WM8400 PMIC and audio</div><div class='hunk'>@@ -472,6 +499,7 @@ config MFD_WM831X_I2C</div><div class='ctx'> 	select MFD_CORE</div><div class='ctx'> 	select MFD_WM831X</div><div class='ctx'> 	select REGMAP_I2C</div><div class='add'>+	select IRQ_DOMAIN</div><div class='ctx'> 	depends on I2C=y &amp;&amp; GENERIC_HARDIRQS</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for the Wolfson Microelecronics WM831x and WM832x PMICs</div><div class='hunk'>@@ -484,6 +512,7 @@ config MFD_WM831X_SPI</div><div class='ctx'> 	select MFD_CORE</div><div class='ctx'> 	select MFD_WM831X</div><div class='ctx'> 	select REGMAP_SPI</div><div class='add'>+	select IRQ_DOMAIN</div><div class='ctx'> 	depends on SPI_MASTER &amp;&amp; GENERIC_HARDIRQS</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for the Wolfson Microelecronics WM831x and WM832x PMICs</div><div class='hunk'>@@ -596,17 +625,32 @@ config MFD_MC13783</div><div class='ctx'> 	tristate</div><div class='ctx'> </div><div class='ctx'> config MFD_MC13XXX</div><div class='del'>-	tristate "Support Freescale MC13783 and MC13892"</div><div class='del'>-	depends on SPI_MASTER</div><div class='add'>+	tristate</div><div class='add'>+	depends on SPI_MASTER || I2C</div><div class='ctx'> 	select MFD_CORE</div><div class='ctx'> 	select MFD_MC13783</div><div class='ctx'> 	help</div><div class='del'>-	  Support for the Freescale (Atlas) PMIC and audio CODECs</div><div class='del'>-	  MC13783 and MC13892.</div><div class='del'>-	  This driver provides common support for accessing  the device,</div><div class='add'>+	  Enable support for the Freescale MC13783 and MC13892 PMICs.</div><div class='add'>+	  This driver provides common support for accessing the device,</div><div class='ctx'> 	  additional drivers must be enabled in order to use the</div><div class='ctx'> 	  functionality of the device.</div><div class='ctx'> </div><div class='add'>+config MFD_MC13XXX_SPI</div><div class='add'>+	tristate "Freescale MC13783 and MC13892 SPI interface"</div><div class='add'>+	depends on SPI_MASTER</div><div class='add'>+	select REGMAP_SPI</div><div class='add'>+	select MFD_MC13XXX</div><div class='add'>+	help</div><div class='add'>+	  Select this if your MC13xxx is connected via an SPI bus.</div><div class='add'>+</div><div class='add'>+config MFD_MC13XXX_I2C</div><div class='add'>+	tristate "Freescale MC13892 I2C interface"</div><div class='add'>+	depends on I2C</div><div class='add'>+	select REGMAP_I2C</div><div class='add'>+	select MFD_MC13XXX</div><div class='add'>+	help</div><div class='add'>+	  Select this if your MC13xxx is connected via an I2C bus.</div><div class='add'>+</div><div class='ctx'> config ABX500_CORE</div><div class='ctx'> 	bool "ST-Ericsson ABX500 Mixed Signal Circuit register functions"</div><div class='ctx'> 	default y if ARCH_U300 || ARCH_U8500</div><div class='hunk'>@@ -648,26 +692,9 @@ config EZX_PCAP</div><div class='ctx'> 	  This enables the PCAP ASIC present on EZX Phones. This is</div><div class='ctx'> 	  needed for MMC, TouchScreen, Sound, USB, etc..</div><div class='ctx'> </div><div class='del'>-config AB5500_CORE</div><div class='del'>-	bool "ST-Ericsson AB5500 Mixed Signal Power Management chip"</div><div class='del'>-	depends on ABX500_CORE &amp;&amp; MFD_DB5500_PRCMU</div><div class='del'>-	select MFD_CORE</div><div class='del'>-	help</div><div class='del'>-	  Select this option to enable access to AB5500 power management</div><div class='del'>-	  chip. This connects to the db5500 chip via the I2C bus via PRCMU.</div><div class='del'>-	  This chip embeds various other multimedia funtionalities as well.</div><div class='del'>-</div><div class='del'>-config AB5500_DEBUG</div><div class='del'>-	bool "Enable debug info via debugfs"</div><div class='del'>-	depends on AB5500_CORE &amp;&amp; DEBUG_FS</div><div class='del'>-	default y if DEBUG_FS</div><div class='del'>-	help</div><div class='del'>-	  Select this option if you want debug information from the AB5500</div><div class='del'>-	  using the debug filesystem, debugfs.</div><div class='del'>-</div><div class='ctx'> config AB8500_CORE</div><div class='ctx'> 	bool "ST-Ericsson AB8500 Mixed Signal Power Management chip"</div><div class='del'>-	depends on GENERIC_HARDIRQS &amp;&amp; ABX500_CORE</div><div class='add'>+	depends on GENERIC_HARDIRQS &amp;&amp; ABX500_CORE &amp;&amp; MFD_DB8500_PRCMU</div><div class='ctx'> 	select MFD_CORE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this option to enable access to AB8500 power management</div><div class='hunk'>@@ -711,16 +738,6 @@ config MFD_DB8500_PRCMU</div><div class='ctx'> 	  system controller running an XP70 microprocessor, which is accessed</div><div class='ctx'> 	  through a register map.</div><div class='ctx'> </div><div class='del'>-config MFD_DB5500_PRCMU</div><div class='del'>-	bool "ST-Ericsson DB5500 Power Reset Control Management Unit"</div><div class='del'>-	depends on UX500_SOC_DB5500</div><div class='del'>-	select MFD_CORE</div><div class='del'>-	help</div><div class='del'>-	  Select this option to enable support for the DB5500 Power Reset</div><div class='del'>-	  and Control Management Unit. This is basically an autonomous</div><div class='del'>-	  system controller running an XP70 microprocessor, which is accessed</div><div class='del'>-	  through a register map.</div><div class='del'>-</div><div class='ctx'> config MFD_CS5535</div><div class='ctx'> 	tristate "Support for CS5535 and CS5536 southbridge core functions"</div><div class='ctx'> 	select MFD_CORE</div><div class='hunk'>@@ -748,6 +765,16 @@ config LPC_SCH</div><div class='ctx'> 	  LPC bridge function of the Intel SCH provides support for</div><div class='ctx'> 	  System Management Bus and General Purpose I/O.</div><div class='ctx'> </div><div class='add'>+config LPC_ICH</div><div class='add'>+	tristate "Intel ICH LPC"</div><div class='add'>+	depends on PCI</div><div class='add'>+	select MFD_CORE</div><div class='add'>+	help</div><div class='add'>+	  The LPC bridge function of the Intel ICH provides support for</div><div class='add'>+	  many functional units. This driver provides needed support for</div><div class='add'>+	  other drivers to control these functions, currently GPIO and</div><div class='add'>+	  watchdog.</div><div class='add'>+</div><div class='ctx'> config MFD_RDC321X</div><div class='ctx'> 	tristate "Support for RDC-R321x southbridge"</div><div class='ctx'> 	select MFD_CORE</div><div class='hunk'>@@ -880,6 +907,11 @@ config MFD_RC5T583</div><div class='ctx'> 	  Additional drivers must be enabled in order to use the</div><div class='ctx'> 	  different functionality of the device.</div><div class='ctx'> </div><div class='add'>+config MFD_STA2X11</div><div class='add'>+	bool "STA2X11 multi function device support"</div><div class='add'>+	depends on STA2X11</div><div class='add'>+	select MFD_CORE</div><div class='add'>+</div><div class='ctx'> config MFD_ANATOP</div><div class='ctx'> 	bool "Support for Freescale i.MX on-chip ANATOP controller"</div><div class='ctx'> 	depends on SOC_IMX6Q</div><div class='hunk'>@@ -888,6 +920,16 @@ config MFD_ANATOP</div><div class='ctx'> 	  MFD controller. This controller embeds regulator and</div><div class='ctx'> 	  thermal devices for Freescale i.MX platforms.</div><div class='ctx'> </div><div class='add'>+config MFD_PALMAS</div><div class='add'>+	bool "Support for the TI Palmas series chips"</div><div class='add'>+	select MFD_CORE</div><div class='add'>+	select REGMAP_I2C</div><div class='add'>+	select REGMAP_IRQ</div><div class='add'>+	depends on I2C=y</div><div class='add'>+	help</div><div class='add'>+	  If you say yes here you get support for the Palmas</div><div class='add'>+	  series of PMIC chips from Texas Instruments.</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile<br/>index 05fa538c5efe..75f6ed68a4b9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/Makefile</a></div><div class='hunk'>@@ -15,6 +15,7 @@ obj-$(CONFIG_MFD_DAVINCI_VOICECODEC)	+= davinci_voicecodec.o</div><div class='ctx'> obj-$(CONFIG_MFD_DM355EVM_MSP)	+= dm355evm_msp.o</div><div class='ctx'> obj-$(CONFIG_MFD_TI_SSP)	+= ti-ssp.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_MFD_STA2X11)	+= sta2x11-mfd.o</div><div class='ctx'> obj-$(CONFIG_MFD_STMPE)		+= stmpe.o</div><div class='ctx'> obj-$(CONFIG_STMPE_I2C)		+= stmpe-i2c.o</div><div class='ctx'> obj-$(CONFIG_STMPE_SPI)		+= stmpe-spi.o</div><div class='hunk'>@@ -54,6 +55,8 @@ obj-$(CONFIG_TWL6030_PWM)	+= twl6030-pwm.o</div><div class='ctx'> obj-$(CONFIG_TWL6040_CORE)	+= twl6040-core.o twl6040-irq.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_MFD_MC13XXX)	+= mc13xxx-core.o</div><div class='add'>+obj-$(CONFIG_MFD_MC13XXX_SPI)	+= mc13xxx-spi.o</div><div class='add'>+obj-$(CONFIG_MFD_MC13XXX_I2C)	+= mc13xxx-i2c.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_MFD_CORE)		+= mfd-core.o</div><div class='ctx'> </div><div class='hunk'>@@ -75,6 +78,7 @@ obj-$(CONFIG_PMIC_DA9052)	+= da9052-core.o</div><div class='ctx'> obj-$(CONFIG_MFD_DA9052_SPI)	+= da9052-spi.o</div><div class='ctx'> obj-$(CONFIG_MFD_DA9052_I2C)	+= da9052-i2c.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_MFD_MAX77693)	+= max77693.o max77693-irq.o</div><div class='ctx'> max8925-objs			:= max8925-core.o max8925-i2c.o</div><div class='ctx'> obj-$(CONFIG_MFD_MAX8925)	+= max8925.o</div><div class='ctx'> obj-$(CONFIG_MFD_MAX8997)	+= max8997.o max8997-irq.o</div><div class='hunk'>@@ -87,18 +91,15 @@ obj-$(CONFIG_PCF50633_GPIO)	+= pcf50633-gpio.o</div><div class='ctx'> obj-$(CONFIG_ABX500_CORE)	+= abx500-core.o</div><div class='ctx'> obj-$(CONFIG_AB3100_CORE)	+= ab3100-core.o</div><div class='ctx'> obj-$(CONFIG_AB3100_OTP)	+= ab3100-otp.o</div><div class='del'>-obj-$(CONFIG_AB5500_CORE)	+= ab5500-core.o</div><div class='del'>-obj-$(CONFIG_AB5500_DEBUG)	+= ab5500-debugfs.o</div><div class='del'>-obj-$(CONFIG_AB8500_CORE)	+= ab8500-core.o ab8500-sysctrl.o</div><div class='ctx'> obj-$(CONFIG_AB8500_DEBUG)	+= ab8500-debugfs.o</div><div class='ctx'> obj-$(CONFIG_AB8500_GPADC)	+= ab8500-gpadc.o</div><div class='ctx'> obj-$(CONFIG_MFD_DB8500_PRCMU)	+= db8500-prcmu.o</div><div class='del'>-# ab8500-i2c need to come after db8500-prcmu (which provides the channel)</div><div class='del'>-obj-$(CONFIG_AB8500_I2C_CORE)	+= ab8500-i2c.o</div><div class='del'>-obj-$(CONFIG_MFD_DB5500_PRCMU)	+= db5500-prcmu.o</div><div class='add'>+# ab8500-core need to come after db8500-prcmu (which provides the channel)</div><div class='add'>+obj-$(CONFIG_AB8500_CORE)	+= ab8500-core.o ab8500-sysctrl.o</div><div class='ctx'> obj-$(CONFIG_MFD_TIMBERDALE)    += timberdale.o</div><div class='ctx'> obj-$(CONFIG_PMIC_ADP5520)	+= adp5520.o</div><div class='ctx'> obj-$(CONFIG_LPC_SCH)		+= lpc_sch.o</div><div class='add'>+obj-$(CONFIG_LPC_ICH)		+= lpc_ich.o</div><div class='ctx'> obj-$(CONFIG_MFD_RDC321X)	+= rdc321x-southbridge.o</div><div class='ctx'> obj-$(CONFIG_MFD_JANZ_CMODIO)	+= janz-cmodio.o</div><div class='ctx'> obj-$(CONFIG_MFD_JZ4740_ADC)	+= jz4740-adc.o</div><div class='hunk'>@@ -113,6 +114,8 @@ obj-$(CONFIG_TPS65911_COMPARATOR)	+= tps65911-comparator.o</div><div class='ctx'> obj-$(CONFIG_MFD_TPS65090)	+= tps65090.o</div><div class='ctx'> obj-$(CONFIG_MFD_AAT2870_CORE)	+= aat2870-core.o</div><div class='ctx'> obj-$(CONFIG_MFD_INTEL_MSIC)	+= intel_msic.o</div><div class='add'>+obj-$(CONFIG_MFD_PALMAS)	+= palmas.o</div><div class='ctx'> obj-$(CONFIG_MFD_RC5T583)	+= rc5t583.o rc5t583-irq.o</div><div class='ctx'> obj-$(CONFIG_MFD_S5M_CORE)	+= s5m-core.o s5m-irq.o</div><div class='ctx'> obj-$(CONFIG_MFD_ANATOP)	+= anatop-mfd.o</div><div class='add'>+obj-$(CONFIG_MFD_LM3533)	+= lm3533-core.o lm3533-ctrlbank.o</div><div class='head'>diff --git a/drivers/mfd/ab5500-core.c b/drivers/mfd/ab5500-core.c<br/>deleted file mode 100644<br/>index 54d0fe40845f..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/ab5500-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/ab5500-core.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1439 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2007-2011 ST-Ericsson</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2</div><div class='del'>- * Low-level core for exclusive access to the AB5500 IC on the I2C bus</div><div class='del'>- * and some basic chip-configuration.</div><div class='del'>- * Author: Bengt Jonsson &lt;bengt.g.jonsson@stericsson.com&gt;</div><div class='del'>- * Author: Mattias Nilsson &lt;mattias.i.nilsson@stericsson.com&gt;</div><div class='del'>- * Author: Mattias Wallin &lt;mattias.wallin@stericsson.com&gt;</div><div class='del'>- * Author: Rickard Andersson &lt;rickard.andersson@stericsson.com&gt;</div><div class='del'>- * Author: Karl Komierowski  &lt;karl.komierowski@stericsson.com&gt;</div><div class='del'>- * Author: Bibek Basu &lt;bibek.basu@stericsson.com&gt;</div><div class='del'>- *</div><div class='del'>- * TODO: Event handling with irq_chip. Waiting for PRCMU fw support.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/random.h&gt;</div><div class='del'>-#include &lt;linux/mfd/abx500.h&gt;</div><div class='del'>-#include &lt;linux/mfd/abx500/ab5500.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/mfd/core.h&gt;</div><div class='del'>-#include &lt;linux/mfd/db5500-prcmu.h&gt;</div><div class='del'>-</div><div class='del'>-#include "ab5500-core.h"</div><div class='del'>-#include "ab5500-debugfs.h"</div><div class='del'>-</div><div class='del'>-#define AB5500_NUM_EVENT_REG 23</div><div class='del'>-#define AB5500_IT_LATCH0_REG 0x40</div><div class='del'>-#define AB5500_IT_MASK0_REG 0x60</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Permissible register ranges for reading and writing per device and bank.</div><div class='del'>- *</div><div class='del'>- * The ranges must be listed in increasing address order, and no overlaps are</div><div class='del'>- * allowed. It is assumed that write permission implies read permission</div><div class='del'>- * (i.e. only RO and RW permissions should be used).  Ranges with write</div><div class='del'>- * permission must not be split up.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define NO_RANGE {.count = 0, .range = NULL,}</div><div class='del'>-static struct ab5500_i2c_banks ab5500_bank_ranges[AB5500_NUM_DEVICES] = {</div><div class='del'>-	[AB5500_DEVID_USB] =  {</div><div class='del'>-		.nbanks = 1,</div><div class='del'>-		.bank = (struct ab5500_i2c_ranges []) {</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_USB,</div><div class='del'>-				.nranges = 12,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x01,</div><div class='del'>-						.last = 0x01,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x80,</div><div class='del'>-						.last = 0x83,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x87,</div><div class='del'>-						.last = 0x8A,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x8B,</div><div class='del'>-						.last = 0x8B,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x91,</div><div class='del'>-						.last = 0x92,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x93,</div><div class='del'>-						.last = 0x93,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x94,</div><div class='del'>-						.last = 0x94,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0xA8,</div><div class='del'>-						.last = 0xB0,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0xB2,</div><div class='del'>-						.last = 0xB2,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0xB4,</div><div class='del'>-						.last = 0xBC,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0xBF,</div><div class='del'>-						.last = 0xBF,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0xC1,</div><div class='del'>-						.last = 0xC5,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_ADC] =  {</div><div class='del'>-		.nbanks = 1,</div><div class='del'>-		.bank = (struct ab5500_i2c_ranges []) {</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_ADC,</div><div class='del'>-				.nranges = 6,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x1F,</div><div class='del'>-						.last = 0x22,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x23,</div><div class='del'>-						.last = 0x24,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x26,</div><div class='del'>-						.last = 0x2D,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x2F,</div><div class='del'>-						.last = 0x34,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x37,</div><div class='del'>-						.last = 0x57,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x58,</div><div class='del'>-						.last = 0x58,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_LEDS] =  {</div><div class='del'>-		.nbanks = 1,</div><div class='del'>-		.bank = (struct ab5500_i2c_ranges []) {</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_LED,</div><div class='del'>-				.nranges = 1,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x00,</div><div class='del'>-						.last = 0x0C,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_VIDEO] =   {</div><div class='del'>-		.nbanks = 1,</div><div class='del'>-		.bank = (struct ab5500_i2c_ranges []) {</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_VDENC,</div><div class='del'>-				.nranges = 12,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x00,</div><div class='del'>-						.last = 0x08,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x09,</div><div class='del'>-						.last = 0x09,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x0A,</div><div class='del'>-						.last = 0x12,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x15,</div><div class='del'>-						.last = 0x19,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x1B,</div><div class='del'>-						.last = 0x21,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x27,</div><div class='del'>-						.last = 0x2C,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x41,</div><div class='del'>-						.last = 0x41,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x45,</div><div class='del'>-						.last = 0x5B,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x5D,</div><div class='del'>-						.last = 0x5D,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x69,</div><div class='del'>-						.last = 0x69,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x6C,</div><div class='del'>-						.last = 0x6D,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x80,</div><div class='del'>-						.last = 0x81,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_REGULATORS] =   {</div><div class='del'>-		.nbanks = 2,</div><div class='del'>-		.bank =  (struct ab5500_i2c_ranges []) {</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_STARTUP,</div><div class='del'>-				.nranges = 12,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x00,</div><div class='del'>-						.last = 0x01,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x1F,</div><div class='del'>-						.last = 0x1F,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x2E,</div><div class='del'>-						.last = 0x2E,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x2F,</div><div class='del'>-						.last = 0x30,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x50,</div><div class='del'>-						.last = 0x51,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x60,</div><div class='del'>-						.last = 0x61,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x66,</div><div class='del'>-						.last = 0x8A,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x8C,</div><div class='del'>-						.last = 0x96,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0xAA,</div><div class='del'>-						.last = 0xB4,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0xB7,</div><div class='del'>-						.last = 0xBF,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0xC1,</div><div class='del'>-						.last = 0xCA,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0xD3,</div><div class='del'>-						.last = 0xE0,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_SIM_USBSIM,</div><div class='del'>-				.nranges = 1,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x13,</div><div class='del'>-						.last = 0x19,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_SIM] =   {</div><div class='del'>-		.nbanks = 1,</div><div class='del'>-		.bank = (struct ab5500_i2c_ranges []) {</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_SIM_USBSIM,</div><div class='del'>-				.nranges = 1,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x13,</div><div class='del'>-						.last = 0x19,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_RTC] =   {</div><div class='del'>-		.nbanks = 1,</div><div class='del'>-		.bank = (struct ab5500_i2c_ranges []) {</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_RTC,</div><div class='del'>-				.nranges = 2,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x00,</div><div class='del'>-						.last = 0x04,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x06,</div><div class='del'>-						.last = 0x0C,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_CHARGER] =   {</div><div class='del'>-		.nbanks = 1,</div><div class='del'>-		.bank = (struct ab5500_i2c_ranges []) {</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_CHG,</div><div class='del'>-				.nranges = 2,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x11,</div><div class='del'>-						.last = 0x11,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x12,</div><div class='del'>-						.last = 0x1B,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_FUELGAUGE] =   {</div><div class='del'>-		.nbanks = 1,</div><div class='del'>-		.bank = (struct ab5500_i2c_ranges []) {</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_FG_BATTCOM_ACC,</div><div class='del'>-				.nranges = 2,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x00,</div><div class='del'>-						.last = 0x0B,</div><div class='del'>-						.perm = AB5500_PERM_RO,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0x0C,</div><div class='del'>-						.last = 0x10,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_VIBRATOR] =   {</div><div class='del'>-		.nbanks = 1,</div><div class='del'>-		.bank = (struct ab5500_i2c_ranges []) {</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_VIBRA,</div><div class='del'>-				.nranges = 2,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x10,</div><div class='del'>-						.last = 0x13,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0xFE,</div><div class='del'>-						.last = 0xFE,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_CODEC] =   {</div><div class='del'>-		.nbanks = 1,</div><div class='del'>-		.bank = (struct ab5500_i2c_ranges []) {</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_AUDIO_HEADSETUSB,</div><div class='del'>-				.nranges = 2,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x00,</div><div class='del'>-						.last = 0x48,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-					{</div><div class='del'>-						.first = 0xEB,</div><div class='del'>-						.last = 0xFB,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_POWER] = {</div><div class='del'>-		.nbanks	= 2,</div><div class='del'>-		.bank	= (struct ab5500_i2c_ranges []) {</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_STARTUP,</div><div class='del'>-				.nranges = 1,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x30,</div><div class='del'>-						.last = 0x30,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.bankid = AB5500_BANK_VIT_IO_I2C_CLK_TST_OTP,</div><div class='del'>-				.nranges = 1,</div><div class='del'>-				.range = (struct ab5500_reg_range[]) {</div><div class='del'>-					{</div><div class='del'>-						.first = 0x01,</div><div class='del'>-						.last = 0x01,</div><div class='del'>-						.perm = AB5500_PERM_RW,</div><div class='del'>-					},</div><div class='del'>-				},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define AB5500_IRQ(bank, bit)	((bank) * 8 + (bit))</div><div class='del'>-</div><div class='del'>-/* I appologize for the resource names beeing a mix of upper case</div><div class='del'>- * and lower case but I want them to be exact as the documentation */</div><div class='del'>-static struct mfd_cell ab5500_devs[AB5500_NUM_DEVICES] = {</div><div class='del'>-	[AB5500_DEVID_LEDS] = {</div><div class='del'>-		.name = "ab5500-leds",</div><div class='del'>-		.id = AB5500_DEVID_LEDS,</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_POWER] = {</div><div class='del'>-		.name = "ab5500-power",</div><div class='del'>-		.id = AB5500_DEVID_POWER,</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_REGULATORS] = {</div><div class='del'>-		.name = "ab5500-regulator",</div><div class='del'>-		.id = AB5500_DEVID_REGULATORS,</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_SIM] = {</div><div class='del'>-		.name = "ab5500-sim",</div><div class='del'>-		.id = AB5500_DEVID_SIM,</div><div class='del'>-		.num_resources = 1,</div><div class='del'>-		.resources = (struct resource[]) {</div><div class='del'>-			{</div><div class='del'>-				.name = "SIMOFF",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(2, 0), /*rising*/</div><div class='del'>-				.end = AB5500_IRQ(2, 1), /*falling*/</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_RTC] = {</div><div class='del'>-		.name = "ab5500-rtc",</div><div class='del'>-		.id = AB5500_DEVID_RTC,</div><div class='del'>-		.num_resources = 1,</div><div class='del'>-		.resources = (struct resource[]) {</div><div class='del'>-			{</div><div class='del'>-				.name	= "RTC_Alarm",</div><div class='del'>-				.flags	= IORESOURCE_IRQ,</div><div class='del'>-				.start	= AB5500_IRQ(1, 7),</div><div class='del'>-				.end	= AB5500_IRQ(1, 7),</div><div class='del'>-			}</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_CHARGER] = {</div><div class='del'>-		.name = "ab5500-charger",</div><div class='del'>-		.id = AB5500_DEVID_CHARGER,</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_ADC] = {</div><div class='del'>-		.name = "ab5500-adc",</div><div class='del'>-		.id = AB5500_DEVID_ADC,</div><div class='del'>-		.num_resources = 10,</div><div class='del'>-		.resources = (struct resource[]) {</div><div class='del'>-			{</div><div class='del'>-				.name = "TRIGGER-0",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(0, 0),</div><div class='del'>-				.end = AB5500_IRQ(0, 0),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "TRIGGER-1",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(0, 1),</div><div class='del'>-				.end = AB5500_IRQ(0, 1),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "TRIGGER-2",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(0, 2),</div><div class='del'>-				.end = AB5500_IRQ(0, 2),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "TRIGGER-3",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(0, 3),</div><div class='del'>-				.end = AB5500_IRQ(0, 3),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "TRIGGER-4",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(0, 4),</div><div class='del'>-				.end = AB5500_IRQ(0, 4),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "TRIGGER-5",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(0, 5),</div><div class='del'>-				.end = AB5500_IRQ(0, 5),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "TRIGGER-6",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(0, 6),</div><div class='del'>-				.end = AB5500_IRQ(0, 6),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "TRIGGER-7",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(0, 7),</div><div class='del'>-				.end = AB5500_IRQ(0, 7),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "TRIGGER-VBAT",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(0, 8),</div><div class='del'>-				.end = AB5500_IRQ(0, 8),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "TRIGGER-VBAT-TXON",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(0, 9),</div><div class='del'>-				.end = AB5500_IRQ(0, 9),</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_FUELGAUGE] = {</div><div class='del'>-		.name = "ab5500-fuelgauge",</div><div class='del'>-		.id = AB5500_DEVID_FUELGAUGE,</div><div class='del'>-		.num_resources = 6,</div><div class='del'>-		.resources = (struct resource[]) {</div><div class='del'>-			{</div><div class='del'>-				.name = "Batt_attach",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(7, 5),</div><div class='del'>-				.end = AB5500_IRQ(7, 5),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "Batt_removal",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(7, 6),</div><div class='del'>-				.end = AB5500_IRQ(7, 6),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "UART_framing",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(7, 7),</div><div class='del'>-				.end = AB5500_IRQ(7, 7),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "UART_overrun",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(8, 0),</div><div class='del'>-				.end = AB5500_IRQ(8, 0),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "UART_Rdy_RX",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(8, 1),</div><div class='del'>-				.end = AB5500_IRQ(8, 1),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "UART_Rdy_TX",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(8, 2),</div><div class='del'>-				.end = AB5500_IRQ(8, 2),</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_VIBRATOR] = {</div><div class='del'>-		.name = "ab5500-vibrator",</div><div class='del'>-		.id = AB5500_DEVID_VIBRATOR,</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_CODEC] = {</div><div class='del'>-		.name = "ab5500-codec",</div><div class='del'>-		.id = AB5500_DEVID_CODEC,</div><div class='del'>-		.num_resources = 3,</div><div class='del'>-		.resources = (struct resource[]) {</div><div class='del'>-			{</div><div class='del'>-				.name = "audio_spkr1_ovc",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(9, 5),</div><div class='del'>-				.end = AB5500_IRQ(9, 5),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "audio_plllocked",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(9, 6),</div><div class='del'>-				.end = AB5500_IRQ(9, 6),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "audio_spkr2_ovc",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(17, 4),</div><div class='del'>-				.end = AB5500_IRQ(17, 4),</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_USB] = {</div><div class='del'>-		.name = "ab5500-usb",</div><div class='del'>-		.id = AB5500_DEVID_USB,</div><div class='del'>-		.num_resources = 36,</div><div class='del'>-		.resources = (struct resource[]) {</div><div class='del'>-			{</div><div class='del'>-				.name = "Link_Update",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(22, 1),</div><div class='del'>-				.end = AB5500_IRQ(22, 1),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "DCIO",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(8, 3),</div><div class='del'>-				.end = AB5500_IRQ(8, 4),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "VBUS_R",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(8, 5),</div><div class='del'>-				.end = AB5500_IRQ(8, 5),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "VBUS_F",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(8, 6),</div><div class='del'>-				.end = AB5500_IRQ(8, 6),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "CHGstate_10_PCVBUSchg",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(8, 7),</div><div class='del'>-				.end = AB5500_IRQ(8, 7),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "DCIOreverse_ovc",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(9, 0),</div><div class='del'>-				.end = AB5500_IRQ(9, 0),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "USBCharDetDone",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(9, 1),</div><div class='del'>-				.end = AB5500_IRQ(9, 1),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "DCIO_no_limit",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(9, 2),</div><div class='del'>-				.end = AB5500_IRQ(9, 2),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "USB_suspend",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(9, 3),</div><div class='del'>-				.end = AB5500_IRQ(9, 3),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "DCIOreverse_fwdcurrent",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(9, 4),</div><div class='del'>-				.end = AB5500_IRQ(9, 4),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "Vbus_Imeasmax_change",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(9, 5),</div><div class='del'>-				.end = AB5500_IRQ(9, 6),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "OVV",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(14, 5),</div><div class='del'>-				.end = AB5500_IRQ(14, 5),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "USBcharging_NOTok",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(15, 3),</div><div class='del'>-				.end = AB5500_IRQ(15, 3),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "usb_adp_sensoroff",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(15, 6),</div><div class='del'>-				.end = AB5500_IRQ(15, 6),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "usb_adp_probeplug",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(15, 7),</div><div class='del'>-				.end = AB5500_IRQ(15, 7),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "usb_adp_sinkerror",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(16, 0),</div><div class='del'>-				.end = AB5500_IRQ(16, 6),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "usb_adp_sourceerror",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(16, 1),</div><div class='del'>-				.end = AB5500_IRQ(16, 1),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "usb_idgnd_r",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(16, 2),</div><div class='del'>-				.end = AB5500_IRQ(16, 2),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "usb_idgnd_f",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(16, 3),</div><div class='del'>-				.end = AB5500_IRQ(16, 3),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "usb_iddetR1",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(16, 4),</div><div class='del'>-				.end = AB5500_IRQ(16, 5),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "usb_iddetR2",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(16, 6),</div><div class='del'>-				.end = AB5500_IRQ(16, 7),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "usb_iddetR3",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(17, 0),</div><div class='del'>-				.end = AB5500_IRQ(17, 1),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "usb_iddetR4",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(17, 2),</div><div class='del'>-				.end = AB5500_IRQ(17, 3),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "CharTempWindowOk",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(17, 7),</div><div class='del'>-				.end = AB5500_IRQ(18, 0),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "USB_SprDetect",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(18, 1),</div><div class='del'>-				.end = AB5500_IRQ(18, 1),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "usb_adp_probe_unplug",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(18, 2),</div><div class='del'>-				.end = AB5500_IRQ(18, 2),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "VBUSChDrop",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(18, 3),</div><div class='del'>-				.end = AB5500_IRQ(18, 4),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "dcio_char_rec_done",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(18, 5),</div><div class='del'>-				.end = AB5500_IRQ(18, 5),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "Charging_stopped_by_temp",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(18, 6),</div><div class='del'>-				.end = AB5500_IRQ(18, 6),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "CHGstate_11_SafeModeVBUS",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(21, 1),</div><div class='del'>-				.end = AB5500_IRQ(21, 2),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "CHGstate_12_comletedVBUS",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(21, 2),</div><div class='del'>-				.end = AB5500_IRQ(21, 2),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "CHGstate_13_completedVBUS",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(21, 3),</div><div class='del'>-				.end = AB5500_IRQ(21, 3),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "CHGstate_14_FullChgDCIO",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(21, 4),</div><div class='del'>-				.end = AB5500_IRQ(21, 4),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "CHGstate_15_SafeModeDCIO",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(21, 5),</div><div class='del'>-				.end = AB5500_IRQ(21, 5),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "CHGstate_16_OFFsuspendDCIO",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(21, 6),</div><div class='del'>-				.end = AB5500_IRQ(21, 6),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "CHGstate_17_completedDCIO",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(21, 7),</div><div class='del'>-				.end = AB5500_IRQ(21, 7),</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_OTP] = {</div><div class='del'>-		.name = "ab5500-otp",</div><div class='del'>-		.id = AB5500_DEVID_OTP,</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_VIDEO] = {</div><div class='del'>-		.name = "ab5500-video",</div><div class='del'>-		.id = AB5500_DEVID_VIDEO,</div><div class='del'>-		.num_resources = 1,</div><div class='del'>-		.resources = (struct resource[]) {</div><div class='del'>-			{</div><div class='del'>-				.name = "plugTVdet",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(22, 2),</div><div class='del'>-				.end = AB5500_IRQ(22, 2),</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_DBIECI] = {</div><div class='del'>-		.name = "ab5500-dbieci",</div><div class='del'>-		.id = AB5500_DEVID_DBIECI,</div><div class='del'>-		.num_resources = 10,</div><div class='del'>-		.resources = (struct resource[]) {</div><div class='del'>-			{</div><div class='del'>-				.name = "COLL",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(14, 0),</div><div class='del'>-				.end = AB5500_IRQ(14, 0),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "RESERR",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(14, 1),</div><div class='del'>-				.end = AB5500_IRQ(14, 1),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "FRAERR",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(14, 2),</div><div class='del'>-				.end = AB5500_IRQ(14, 2),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "COMERR",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(14, 3),</div><div class='del'>-				.end = AB5500_IRQ(14, 3),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "BSI_indicator",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(14, 4),</div><div class='del'>-				.end = AB5500_IRQ(14, 4),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "SPDSET",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(14, 6),</div><div class='del'>-				.end = AB5500_IRQ(14, 6),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "DSENT",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(14, 7),</div><div class='del'>-				.end = AB5500_IRQ(14, 7),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "DREC",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(15, 0),</div><div class='del'>-				.end = AB5500_IRQ(15, 0),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "ACCINT",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(15, 1),</div><div class='del'>-				.end = AB5500_IRQ(15, 1),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name = "NOPINT",</div><div class='del'>-				.flags = IORESOURCE_IRQ,</div><div class='del'>-				.start = AB5500_IRQ(15, 2),</div><div class='del'>-				.end = AB5500_IRQ(15, 2),</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_DEVID_ONSWA] = {</div><div class='del'>-		.name = "ab5500-onswa",</div><div class='del'>-		.id = AB5500_DEVID_ONSWA,</div><div class='del'>-		.num_resources = 2,</div><div class='del'>-		.resources = (struct resource[]) {</div><div class='del'>-			{</div><div class='del'>-				.name	= "ONSWAn_rising",</div><div class='del'>-				.flags	= IORESOURCE_IRQ,</div><div class='del'>-				.start	= AB5500_IRQ(1, 3),</div><div class='del'>-				.end	= AB5500_IRQ(1, 3),</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.name	= "ONSWAn_falling",</div><div class='del'>-				.flags	= IORESOURCE_IRQ,</div><div class='del'>-				.start	= AB5500_IRQ(1, 4),</div><div class='del'>-				.end	= AB5500_IRQ(1, 4),</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Functionality for getting/setting register values.</div><div class='del'>- */</div><div class='del'>-int ab5500_get_register_interruptible_raw(struct ab5500 *ab,</div><div class='del'>-					  u8 bank, u8 reg,</div><div class='del'>-					  u8 *value)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (bank &gt;= AB5500_NUM_BANKS)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	err = mutex_lock_interruptible(&amp;ab-&gt;access_mutex);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-	err = db5500_prcmu_abb_read(bankinfo[bank].slave_addr, reg, value, 1);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;ab-&gt;access_mutex);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int get_register_page_interruptible(struct ab5500 *ab, u8 bank,</div><div class='del'>-	u8 first_reg, u8 *regvals, u8 numregs)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (bank &gt;= AB5500_NUM_BANKS)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	err = mutex_lock_interruptible(&amp;ab-&gt;access_mutex);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	while (numregs) {</div><div class='del'>-		/* The hardware limit for get page is 4 */</div><div class='del'>-		u8 curnum = min_t(u8, numregs, 4u);</div><div class='del'>-</div><div class='del'>-		err = db5500_prcmu_abb_read(bankinfo[bank].slave_addr,</div><div class='del'>-					    first_reg, regvals, curnum);</div><div class='del'>-		if (err)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		numregs -= curnum;</div><div class='del'>-		first_reg += curnum;</div><div class='del'>-		regvals += curnum;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;ab-&gt;access_mutex);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int ab5500_mask_and_set_register_interruptible_raw(struct ab5500 *ab, u8 bank,</div><div class='del'>-	u8 reg, u8 bitmask, u8 bitvalues)</div><div class='del'>-{</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (bank &gt;= AB5500_NUM_BANKS)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (bitmask) {</div><div class='del'>-		u8 buf;</div><div class='del'>-</div><div class='del'>-		err = mutex_lock_interruptible(&amp;ab-&gt;access_mutex);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-		if (bitmask == 0xFF) /* No need to read in this case. */</div><div class='del'>-			buf = bitvalues;</div><div class='del'>-		else { /* Read and modify the register value. */</div><div class='del'>-			err = db5500_prcmu_abb_read(bankinfo[bank].slave_addr,</div><div class='del'>-				reg, &amp;buf, 1);</div><div class='del'>-			if (err)</div><div class='del'>-				return err;</div><div class='del'>-</div><div class='del'>-			buf = ((~bitmask &amp; buf) | (bitmask &amp; bitvalues));</div><div class='del'>-		}</div><div class='del'>-		/* Write the new value. */</div><div class='del'>-		err = db5500_prcmu_abb_write(bankinfo[bank].slave_addr, reg,</div><div class='del'>-					     &amp;buf, 1);</div><div class='del'>-</div><div class='del'>-		mutex_unlock(&amp;ab-&gt;access_mutex);</div><div class='del'>-	}</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-set_register_interruptible(struct ab5500 *ab, u8 bank, u8 reg, u8 value)</div><div class='del'>-{</div><div class='del'>-	return ab5500_mask_and_set_register_interruptible_raw(ab, bank, reg,</div><div class='del'>-							      0xff, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Read/write permission checking functions.</div><div class='del'>- */</div><div class='del'>-static const struct ab5500_i2c_ranges *get_bankref(u8 devid, u8 bank)</div><div class='del'>-{</div><div class='del'>-	u8 i;</div><div class='del'>-</div><div class='del'>-	if (devid &lt; AB5500_NUM_DEVICES) {</div><div class='del'>-		for (i = 0; i &lt; ab5500_bank_ranges[devid].nbanks; i++) {</div><div class='del'>-			if (ab5500_bank_ranges[devid].bank[i].bankid == bank)</div><div class='del'>-				return &amp;ab5500_bank_ranges[devid].bank[i];</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool page_write_allowed(u8 devid, u8 bank, u8 first_reg, u8 last_reg)</div><div class='del'>-{</div><div class='del'>-	u8 i; /* range loop index */</div><div class='del'>-	const struct ab5500_i2c_ranges *bankref;</div><div class='del'>-</div><div class='del'>-	bankref = get_bankref(devid, bank);</div><div class='del'>-	if (bankref == NULL || last_reg &lt; first_reg)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; bankref-&gt;nranges; i++) {</div><div class='del'>-		if (first_reg &lt; bankref-&gt;range[i].first)</div><div class='del'>-			break;</div><div class='del'>-		if ((last_reg &lt;= bankref-&gt;range[i].last) &amp;&amp;</div><div class='del'>-			(bankref-&gt;range[i].perm &amp; AB5500_PERM_WR))</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool reg_write_allowed(u8 devid, u8 bank, u8 reg)</div><div class='del'>-{</div><div class='del'>-	return page_write_allowed(devid, bank, reg, reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool page_read_allowed(u8 devid, u8 bank, u8 first_reg, u8 last_reg)</div><div class='del'>-{</div><div class='del'>-	u8 i;</div><div class='del'>-	const struct ab5500_i2c_ranges *bankref;</div><div class='del'>-</div><div class='del'>-	bankref = get_bankref(devid, bank);</div><div class='del'>-	if (bankref == NULL || last_reg &lt; first_reg)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* Find the range (if it exists in the list) that includes first_reg. */</div><div class='del'>-	for (i = 0; i &lt; bankref-&gt;nranges; i++) {</div><div class='del'>-		if (first_reg &lt; bankref-&gt;range[i].first)</div><div class='del'>-			return false;</div><div class='del'>-		if (first_reg &lt;= bankref-&gt;range[i].last)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	/* Make sure that the entire range up to and including last_reg is</div><div class='del'>-	 * readable. This may span several of the ranges in the list.</div><div class='del'>-	 */</div><div class='del'>-	while ((i &lt; bankref-&gt;nranges) &amp;&amp;</div><div class='del'>-		(bankref-&gt;range[i].perm &amp; AB5500_PERM_RD)) {</div><div class='del'>-		if (last_reg &lt;= bankref-&gt;range[i].last)</div><div class='del'>-			return true;</div><div class='del'>-		if ((++i &gt;= bankref-&gt;nranges) ||</div><div class='del'>-			(bankref-&gt;range[i].first !=</div><div class='del'>-				(bankref-&gt;range[i - 1].last + 1))) {</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool reg_read_allowed(u8 devid, u8 bank, u8 reg)</div><div class='del'>-{</div><div class='del'>-	return page_read_allowed(devid, bank, reg, reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The exported register access functionality.</div><div class='del'>- */</div><div class='del'>-static int ab5500_get_chip_id(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab = dev_get_drvdata(dev-&gt;parent);</div><div class='del'>-</div><div class='del'>-	return (int)ab-&gt;chip_id;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab5500_mask_and_set_register_interruptible(struct device *dev,</div><div class='del'>-		u8 bank, u8 reg, u8 bitmask, u8 bitvalues)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab;</div><div class='del'>-	struct platform_device *pdev = to_platform_device(dev);</div><div class='del'>-</div><div class='del'>-	if ((AB5500_NUM_BANKS &lt;= bank) ||</div><div class='del'>-		!reg_write_allowed(pdev-&gt;id, bank, reg))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ab = dev_get_drvdata(dev-&gt;parent);</div><div class='del'>-	return ab5500_mask_and_set_register_interruptible_raw(ab, bank, reg,</div><div class='del'>-		bitmask, bitvalues);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab5500_set_register_interruptible(struct device *dev, u8 bank,</div><div class='del'>-	u8 reg, u8 value)</div><div class='del'>-{</div><div class='del'>-	return ab5500_mask_and_set_register_interruptible(dev, bank, reg, 0xFF,</div><div class='del'>-		value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab5500_get_register_interruptible(struct device *dev, u8 bank,</div><div class='del'>-		u8 reg, u8 *value)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab;</div><div class='del'>-	struct platform_device *pdev = to_platform_device(dev);</div><div class='del'>-</div><div class='del'>-	if ((AB5500_NUM_BANKS &lt;= bank) ||</div><div class='del'>-		!reg_read_allowed(pdev-&gt;id, bank, reg))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ab = dev_get_drvdata(dev-&gt;parent);</div><div class='del'>-	return ab5500_get_register_interruptible_raw(ab, bank, reg, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab5500_get_register_page_interruptible(struct device *dev, u8 bank,</div><div class='del'>-		u8 first_reg, u8 *regvals, u8 numregs)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab;</div><div class='del'>-	struct platform_device *pdev = to_platform_device(dev);</div><div class='del'>-</div><div class='del'>-	if ((AB5500_NUM_BANKS &lt;= bank) ||</div><div class='del'>-		!page_read_allowed(pdev-&gt;id, bank,</div><div class='del'>-			first_reg, (first_reg + numregs - 1)))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ab = dev_get_drvdata(dev-&gt;parent);</div><div class='del'>-	return get_register_page_interruptible(ab, bank, first_reg, regvals,</div><div class='del'>-		numregs);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-ab5500_event_registers_startup_state_get(struct device *dev, u8 *event)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab;</div><div class='del'>-</div><div class='del'>-	ab = dev_get_drvdata(dev-&gt;parent);</div><div class='del'>-	if (!ab-&gt;startup_events_read)</div><div class='del'>-		return -EAGAIN; /* Try again later */</div><div class='del'>-</div><div class='del'>-	memcpy(event, ab-&gt;startup_events, AB5500_NUM_EVENT_REG);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct abx500_ops ab5500_ops = {</div><div class='del'>-	.get_chip_id = ab5500_get_chip_id,</div><div class='del'>-	.get_register = ab5500_get_register_interruptible,</div><div class='del'>-	.set_register = ab5500_set_register_interruptible,</div><div class='del'>-	.get_register_page = ab5500_get_register_page_interruptible,</div><div class='del'>-	.set_register_page = NULL,</div><div class='del'>-	.mask_and_set_register = ab5500_mask_and_set_register_interruptible,</div><div class='del'>-	.event_registers_startup_state_get =</div><div class='del'>-		ab5500_event_registers_startup_state_get,</div><div class='del'>-	.startup_irq_enabled = NULL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ab5500_setup : Basic set-up, datastructure creation/destruction</div><div class='del'>- *		  and I2C interface.This sets up a default config</div><div class='del'>- *		  in the AB5500 chip so that it will work as expected.</div><div class='del'>- * @ab :	  Pointer to ab5500 structure</div><div class='del'>- * @settings :    Pointer to struct abx500_init_settings</div><div class='del'>- * @size :        Size of init data</div><div class='del'>- */</div><div class='del'>-static int __init ab5500_setup(struct ab5500 *ab,</div><div class='del'>-	struct abx500_init_settings *settings, unsigned int size)</div><div class='del'>-{</div><div class='del'>-	int err = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; size; i++) {</div><div class='del'>-		err = ab5500_mask_and_set_register_interruptible_raw(ab,</div><div class='del'>-			settings[i].bank,</div><div class='del'>-			settings[i].reg,</div><div class='del'>-			0xFF, settings[i].setting);</div><div class='del'>-		if (err)</div><div class='del'>-			goto exit_no_setup;</div><div class='del'>-</div><div class='del'>-		/* If event mask register update the event mask in ab5500 */</div><div class='del'>-		if ((settings[i].bank == AB5500_BANK_IT) &amp;&amp;</div><div class='del'>-			(AB5500_MASK_BASE &lt;= settings[i].reg) &amp;&amp;</div><div class='del'>-			(settings[i].reg &lt;= AB5500_MASK_END)) {</div><div class='del'>-			ab-&gt;mask[settings[i].reg - AB5500_MASK_BASE] =</div><div class='del'>-				settings[i].setting;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-exit_no_setup:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct ab_family_id {</div><div class='del'>-	u8	id;</div><div class='del'>-	char	*name;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct ab_family_id ids[] __initdata = {</div><div class='del'>-	/* AB5500 */</div><div class='del'>-	{</div><div class='del'>-		.id = AB5500_1_0,</div><div class='del'>-		.name = "1.0"</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.id = AB5500_1_1,</div><div class='del'>-		.name = "1.1"</div><div class='del'>-	},</div><div class='del'>-	/* Terminator */</div><div class='del'>-	{</div><div class='del'>-		.id = 0x00,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init ab5500_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab;</div><div class='del'>-	struct ab5500_platform_data *ab5500_plf_data =</div><div class='del'>-		pdev-&gt;dev.platform_data;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	ab = kzalloc(sizeof(struct ab5500), GFP_KERNEL);</div><div class='del'>-	if (!ab) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-			"could not allocate ab5500 device\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Initialize data structure */</div><div class='del'>-	mutex_init(&amp;ab-&gt;access_mutex);</div><div class='del'>-	mutex_init(&amp;ab-&gt;irq_lock);</div><div class='del'>-	ab-&gt;dev = &amp;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	platform_set_drvdata(pdev, ab);</div><div class='del'>-</div><div class='del'>-	/* Read chip ID register */</div><div class='del'>-	err = ab5500_get_register_interruptible_raw(ab,</div><div class='del'>-					AB5500_BANK_VIT_IO_I2C_CLK_TST_OTP,</div><div class='del'>-					AB5500_CHIP_ID, &amp;ab-&gt;chip_id);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "could not communicate with the analog "</div><div class='del'>-			"baseband chip\n");</div><div class='del'>-		goto exit_no_detect;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; ids[i].id != 0x0; i++) {</div><div class='del'>-		if (ids[i].id == ab-&gt;chip_id) {</div><div class='del'>-			snprintf(&amp;ab-&gt;chip_name[0], sizeof(ab-&gt;chip_name) - 1,</div><div class='del'>-				"AB5500 %s", ids[i].name);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (ids[i].id == 0x0) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "unknown analog baseband chip id: 0x%x\n",</div><div class='del'>-			ab-&gt;chip_id);</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "driver not started!\n");</div><div class='del'>-		goto exit_no_detect;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Clear and mask all interrupts */</div><div class='del'>-	for (i = 0; i &lt; AB5500_NUM_IRQ_REGS; i++) {</div><div class='del'>-		u8 latchreg = AB5500_IT_LATCH0_REG + i;</div><div class='del'>-		u8 maskreg = AB5500_IT_MASK0_REG + i;</div><div class='del'>-		u8 val;</div><div class='del'>-</div><div class='del'>-		ab5500_get_register_interruptible_raw(ab, AB5500_BANK_IT,</div><div class='del'>-						      latchreg, &amp;val);</div><div class='del'>-		set_register_interruptible(ab, AB5500_BANK_IT, maskreg, 0xff);</div><div class='del'>-		ab-&gt;mask[i] = ab-&gt;oldmask[i] = 0xff;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = abx500_register_ops(&amp;pdev-&gt;dev, &amp;ab5500_ops);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "ab5500_register ops error\n");</div><div class='del'>-		goto exit_no_detect;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set up and register the platform devices. */</div><div class='del'>-	for (i = 0; i &lt; AB5500_NUM_DEVICES; i++) {</div><div class='del'>-		ab5500_devs[i].platform_data = ab5500_plf_data-&gt;dev_data[i];</div><div class='del'>-		ab5500_devs[i].pdata_size =</div><div class='del'>-			sizeof(ab5500_plf_data-&gt;dev_data[i]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = mfd_add_devices(&amp;pdev-&gt;dev, 0, ab5500_devs,</div><div class='del'>-		ARRAY_SIZE(ab5500_devs), NULL,</div><div class='del'>-		ab5500_plf_data-&gt;irq.base);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "ab5500_mfd_add_device error\n");</div><div class='del'>-		goto exit_no_detect;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = ab5500_setup(ab, ab5500_plf_data-&gt;init_settings,</div><div class='del'>-		ab5500_plf_data-&gt;init_settings_sz);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "ab5500_setup error\n");</div><div class='del'>-		goto exit_no_detect;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ab5500_setup_debugfs(ab);</div><div class='del'>-</div><div class='del'>-	dev_info(&amp;pdev-&gt;dev, "detected AB chip: %s\n", &amp;ab-&gt;chip_name[0]);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-exit_no_detect:</div><div class='del'>-	kfree(ab);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __exit ab5500_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab = platform_get_drvdata(pdev);</div><div class='del'>-</div><div class='del'>-	ab5500_remove_debugfs();</div><div class='del'>-	mfd_remove_devices(&amp;pdev-&gt;dev);</div><div class='del'>-	kfree(ab);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_driver ab5500_driver = {</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "ab5500-core",</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-	.remove  = __exit_p(ab5500_remove),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init ab5500_core_init(void)</div><div class='del'>-{</div><div class='del'>-	return platform_driver_probe(&amp;ab5500_driver, ab5500_probe);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ab5500_core_exit(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;ab5500_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-subsys_initcall(ab5500_core_init);</div><div class='del'>-module_exit(ab5500_core_exit);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Mattias Wallin &lt;mattias.wallin@stericsson.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("AB5500 core driver");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/mfd/ab5500-debugfs.c b/drivers/mfd/ab5500-debugfs.c<br/>deleted file mode 100644<br/>index 72006940937a..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/ab5500-debugfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/ab5500-debugfs.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,807 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2011 ST-Ericsson</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2</div><div class='del'>- * Debugfs support for the AB5500 MFD driver</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;linux/mfd/abx500.h&gt;</div><div class='del'>-#include &lt;linux/mfd/abx500/ab5500.h&gt;</div><div class='del'>-#include &lt;linux/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-#include "ab5500-core.h"</div><div class='del'>-#include "ab5500-debugfs.h"</div><div class='del'>-</div><div class='del'>-static struct ab5500_i2c_ranges ab5500_reg_ranges[AB5500_NUM_BANKS] = {</div><div class='del'>-	[AB5500_BANK_LED] = {</div><div class='del'>-		.bankid = AB5500_BANK_LED,</div><div class='del'>-		.nranges = 1,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x00,</div><div class='del'>-				.last = 0x0C,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_ADC] = {</div><div class='del'>-		.bankid = AB5500_BANK_ADC,</div><div class='del'>-		.nranges = 6,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x1F,</div><div class='del'>-				.last = 0x22,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x23,</div><div class='del'>-				.last = 0x24,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x26,</div><div class='del'>-				.last = 0x2D,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x2F,</div><div class='del'>-				.last = 0x34,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x37,</div><div class='del'>-				.last = 0x57,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x58,</div><div class='del'>-				.last = 0x58,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_RTC] = {</div><div class='del'>-		.bankid = AB5500_BANK_RTC,</div><div class='del'>-		.nranges = 2,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x00,</div><div class='del'>-				.last = 0x04,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x06,</div><div class='del'>-				.last = 0x0C,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_STARTUP] = {</div><div class='del'>-		.bankid = AB5500_BANK_STARTUP,</div><div class='del'>-		.nranges = 12,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x00,</div><div class='del'>-				.last = 0x01,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x1F,</div><div class='del'>-				.last = 0x1F,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x2E,</div><div class='del'>-				.last = 0x2E,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x2F,</div><div class='del'>-				.last = 0x30,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x50,</div><div class='del'>-				.last = 0x51,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x60,</div><div class='del'>-				.last = 0x61,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x66,</div><div class='del'>-				.last = 0x8A,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x8C,</div><div class='del'>-				.last = 0x96,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0xAA,</div><div class='del'>-				.last = 0xB4,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0xB7,</div><div class='del'>-				.last = 0xBF,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0xC1,</div><div class='del'>-				.last = 0xCA,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0xD3,</div><div class='del'>-				.last = 0xE0,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_DBI_ECI] = {</div><div class='del'>-		.bankid = AB5500_BANK_DBI_ECI,</div><div class='del'>-		.nranges = 3,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x00,</div><div class='del'>-				.last = 0x07,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x10,</div><div class='del'>-				.last = 0x10,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x13,</div><div class='del'>-				.last = 0x13,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_CHG] = {</div><div class='del'>-		.bankid = AB5500_BANK_CHG,</div><div class='del'>-		.nranges = 2,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x11,</div><div class='del'>-				.last = 0x11,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x12,</div><div class='del'>-				.last = 0x1B,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_FG_BATTCOM_ACC] = {</div><div class='del'>-		.bankid = AB5500_BANK_FG_BATTCOM_ACC,</div><div class='del'>-		.nranges = 2,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x00,</div><div class='del'>-				.last = 0x0B,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x0C,</div><div class='del'>-				.last = 0x10,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_USB] = {</div><div class='del'>-		.bankid = AB5500_BANK_USB,</div><div class='del'>-		.nranges = 12,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x01,</div><div class='del'>-				.last = 0x01,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x80,</div><div class='del'>-				.last = 0x83,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x87,</div><div class='del'>-				.last = 0x8A,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x8B,</div><div class='del'>-				.last = 0x8B,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x91,</div><div class='del'>-				.last = 0x92,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x93,</div><div class='del'>-				.last = 0x93,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x94,</div><div class='del'>-				.last = 0x94,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0xA8,</div><div class='del'>-				.last = 0xB0,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0xB2,</div><div class='del'>-				.last = 0xB2,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0xB4,</div><div class='del'>-				.last = 0xBC,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0xBF,</div><div class='del'>-				.last = 0xBF,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0xC1,</div><div class='del'>-				.last = 0xC5,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_IT] = {</div><div class='del'>-		.bankid = AB5500_BANK_IT,</div><div class='del'>-		.nranges = 4,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x00,</div><div class='del'>-				.last = 0x02,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x20,</div><div class='del'>-				.last = 0x36,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x40,</div><div class='del'>-				.last = 0x56,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x60,</div><div class='del'>-				.last = 0x76,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_VDDDIG_IO_I2C_CLK_TST] = {</div><div class='del'>-		.bankid = AB5500_BANK_VDDDIG_IO_I2C_CLK_TST,</div><div class='del'>-		.nranges = 7,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x02,</div><div class='del'>-				.last = 0x02,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x12,</div><div class='del'>-				.last = 0x12,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x30,</div><div class='del'>-				.last = 0x34,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x40,</div><div class='del'>-				.last = 0x44,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x50,</div><div class='del'>-				.last = 0x54,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x60,</div><div class='del'>-				.last = 0x64,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x70,</div><div class='del'>-				.last = 0x74,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_VIT_IO_I2C_CLK_TST_OTP] = {</div><div class='del'>-		.bankid = AB5500_BANK_VIT_IO_I2C_CLK_TST_OTP,</div><div class='del'>-		.nranges = 13,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x01,</div><div class='del'>-				.last = 0x01,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x02,</div><div class='del'>-				.last = 0x02,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x0D,</div><div class='del'>-				.last = 0x0F,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x1C,</div><div class='del'>-				.last = 0x1C,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x1E,</div><div class='del'>-				.last = 0x1E,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x20,</div><div class='del'>-				.last = 0x21,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x25,</div><div class='del'>-				.last = 0x25,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x28,</div><div class='del'>-				.last = 0x2A,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x30,</div><div class='del'>-				.last = 0x33,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x40,</div><div class='del'>-				.last = 0x43,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x50,</div><div class='del'>-				.last = 0x53,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x60,</div><div class='del'>-				.last = 0x63,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x70,</div><div class='del'>-				.last = 0x73,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_VIBRA] = {</div><div class='del'>-		.bankid = AB5500_BANK_VIBRA,</div><div class='del'>-		.nranges = 2,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x10,</div><div class='del'>-				.last = 0x13,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0xFE,</div><div class='del'>-				.last = 0xFE,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_AUDIO_HEADSETUSB] = {</div><div class='del'>-		.bankid = AB5500_BANK_AUDIO_HEADSETUSB,</div><div class='del'>-		.nranges = 2,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x00,</div><div class='del'>-				.last = 0x48,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0xEB,</div><div class='del'>-				.last = 0xFB,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_SIM_USBSIM] = {</div><div class='del'>-		.bankid = AB5500_BANK_SIM_USBSIM,</div><div class='del'>-		.nranges = 1,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x13,</div><div class='del'>-				.last = 0x19,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	[AB5500_BANK_VDENC] = {</div><div class='del'>-		.bankid = AB5500_BANK_VDENC,</div><div class='del'>-		.nranges = 12,</div><div class='del'>-		.range = (struct ab5500_reg_range[]) {</div><div class='del'>-			{</div><div class='del'>-				.first = 0x00,</div><div class='del'>-				.last = 0x08,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x09,</div><div class='del'>-				.last = 0x09,</div><div class='del'>-				.perm = AB5500_PERM_RO,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x0A,</div><div class='del'>-				.last = 0x12,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x15,</div><div class='del'>-				.last = 0x19,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x1B,</div><div class='del'>-				.last = 0x21,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x27,</div><div class='del'>-				.last = 0x2C,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x41,</div><div class='del'>-				.last = 0x41,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x45,</div><div class='del'>-				.last = 0x5B,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x5D,</div><div class='del'>-				.last = 0x5D,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x69,</div><div class='del'>-				.last = 0x69,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x6C,</div><div class='del'>-				.last = 0x6D,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-			{</div><div class='del'>-				.first = 0x80,</div><div class='del'>-				.last = 0x81,</div><div class='del'>-				.perm = AB5500_PERM_RW,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int ab5500_registers_print(struct seq_file *s, void *p)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab = s-&gt;private;</div><div class='del'>-	unsigned int i;</div><div class='del'>-	u8 bank = (u8)ab-&gt;debug_bank;</div><div class='del'>-</div><div class='del'>-	seq_printf(s, "ab5500 register values:\n");</div><div class='del'>-	for (bank = 0; bank &lt; AB5500_NUM_BANKS; bank++) {</div><div class='del'>-		seq_printf(s, " bank %u, %s (0x%x):\n", bank,</div><div class='del'>-				bankinfo[bank].name,</div><div class='del'>-				bankinfo[bank].slave_addr);</div><div class='del'>-		for (i = 0; i &lt; ab5500_reg_ranges[bank].nranges; i++) {</div><div class='del'>-			u8 reg;</div><div class='del'>-			int err;</div><div class='del'>-</div><div class='del'>-			for (reg = ab5500_reg_ranges[bank].range[i].first;</div><div class='del'>-				reg &lt;= ab5500_reg_ranges[bank].range[i].last;</div><div class='del'>-				reg++) {</div><div class='del'>-				u8 value;</div><div class='del'>-</div><div class='del'>-				err = ab5500_get_register_interruptible_raw(ab,</div><div class='del'>-								bank, reg,</div><div class='del'>-								&amp;value);</div><div class='del'>-				if (err &lt; 0) {</div><div class='del'>-					dev_err(ab-&gt;dev, "get_reg failed %d"</div><div class='del'>-						"bank 0x%x reg 0x%x\n",</div><div class='del'>-						err, bank, reg);</div><div class='del'>-					return err;</div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-				err = seq_printf(s, "[%d/0x%02X]: 0x%02X\n",</div><div class='del'>-						bank, reg, value);</div><div class='del'>-				if (err &lt; 0) {</div><div class='del'>-					dev_err(ab-&gt;dev,</div><div class='del'>-						"seq_printf overflow\n");</div><div class='del'>-					/*</div><div class='del'>-					 * Error is not returned here since</div><div class='del'>-					 * the output is wanted in any case</div><div class='del'>-					 */</div><div class='del'>-					return 0;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab5500_registers_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, ab5500_registers_print, inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations ab5500_registers_fops = {</div><div class='del'>-	.open = ab5500_registers_open,</div><div class='del'>-	.read = seq_read,</div><div class='del'>-	.llseek = seq_lseek,</div><div class='del'>-	.release = single_release,</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int ab5500_bank_print(struct seq_file *s, void *p)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab = s-&gt;private;</div><div class='del'>-</div><div class='del'>-	seq_printf(s, "%d\n", ab-&gt;debug_bank);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab5500_bank_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, ab5500_bank_print, inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t ab5500_bank_write(struct file *file,</div><div class='del'>-	const char __user *user_buf,</div><div class='del'>-	size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab = ((struct seq_file *)(file-&gt;private_data))-&gt;private;</div><div class='del'>-	char buf[32];</div><div class='del'>-	int buf_size;</div><div class='del'>-	unsigned long user_bank;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Get userspace string and assure termination */</div><div class='del'>-	buf_size = min(count, (sizeof(buf) - 1));</div><div class='del'>-	if (copy_from_user(buf, user_buf, buf_size))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	buf[buf_size] = 0;</div><div class='del'>-</div><div class='del'>-	err = strict_strtoul(buf, 0, &amp;user_bank);</div><div class='del'>-	if (err)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (user_bank &gt;= AB5500_NUM_BANKS) {</div><div class='del'>-		dev_err(ab-&gt;dev,</div><div class='del'>-			"debugfs error input &gt; number of banks\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ab-&gt;debug_bank = user_bank;</div><div class='del'>-</div><div class='del'>-	return buf_size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab5500_address_print(struct seq_file *s, void *p)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab = s-&gt;private;</div><div class='del'>-</div><div class='del'>-	seq_printf(s, "0x%02X\n", ab-&gt;debug_address);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab5500_address_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, ab5500_address_print, inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t ab5500_address_write(struct file *file,</div><div class='del'>-	const char __user *user_buf,</div><div class='del'>-	size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab = ((struct seq_file *)(file-&gt;private_data))-&gt;private;</div><div class='del'>-	char buf[32];</div><div class='del'>-	int buf_size;</div><div class='del'>-	unsigned long user_address;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Get userspace string and assure termination */</div><div class='del'>-	buf_size = min(count, (sizeof(buf) - 1));</div><div class='del'>-	if (copy_from_user(buf, user_buf, buf_size))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	buf[buf_size] = 0;</div><div class='del'>-</div><div class='del'>-	err = strict_strtoul(buf, 0, &amp;user_address);</div><div class='del'>-	if (err)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (user_address &gt; 0xff) {</div><div class='del'>-		dev_err(ab-&gt;dev,</div><div class='del'>-			"debugfs error input &gt; 0xff\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	ab-&gt;debug_address = user_address;</div><div class='del'>-	return buf_size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab5500_val_print(struct seq_file *s, void *p)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab = s-&gt;private;</div><div class='del'>-	int err;</div><div class='del'>-	u8 regvalue;</div><div class='del'>-</div><div class='del'>-	err = ab5500_get_register_interruptible_raw(ab, (u8)ab-&gt;debug_bank,</div><div class='del'>-		(u8)ab-&gt;debug_address, &amp;regvalue);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(ab-&gt;dev, "get_reg failed %d, bank 0x%x"</div><div class='del'>-			", reg 0x%x\n", err, ab-&gt;debug_bank,</div><div class='del'>-			ab-&gt;debug_address);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	seq_printf(s, "0x%02X\n", regvalue);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab5500_val_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, ab5500_val_print, inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t ab5500_val_write(struct file *file,</div><div class='del'>-	const char __user *user_buf,</div><div class='del'>-	size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct ab5500 *ab = ((struct seq_file *)(file-&gt;private_data))-&gt;private;</div><div class='del'>-	char buf[32];</div><div class='del'>-	int buf_size;</div><div class='del'>-	unsigned long user_val;</div><div class='del'>-	int err;</div><div class='del'>-	u8 regvalue;</div><div class='del'>-</div><div class='del'>-	/* Get userspace string and assure termination */</div><div class='del'>-	buf_size = min(count, (sizeof(buf)-1));</div><div class='del'>-	if (copy_from_user(buf, user_buf, buf_size))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	buf[buf_size] = 0;</div><div class='del'>-</div><div class='del'>-	err = strict_strtoul(buf, 0, &amp;user_val);</div><div class='del'>-	if (err)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (user_val &gt; 0xff) {</div><div class='del'>-		dev_err(ab-&gt;dev,</div><div class='del'>-			"debugfs error input &gt; 0xff\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	err = ab5500_mask_and_set_register_interruptible_raw(</div><div class='del'>-		ab, (u8)ab-&gt;debug_bank,</div><div class='del'>-		(u8)ab-&gt;debug_address, 0xFF, (u8)user_val);</div><div class='del'>-	if (err)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ab5500_get_register_interruptible_raw(ab, (u8)ab-&gt;debug_bank,</div><div class='del'>-		(u8)ab-&gt;debug_address, &amp;regvalue);</div><div class='del'>-	if (err)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return buf_size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations ab5500_bank_fops = {</div><div class='del'>-	.open = ab5500_bank_open,</div><div class='del'>-	.write = ab5500_bank_write,</div><div class='del'>-	.read = seq_read,</div><div class='del'>-	.llseek = seq_lseek,</div><div class='del'>-	.release = single_release,</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct file_operations ab5500_address_fops = {</div><div class='del'>-	.open = ab5500_address_open,</div><div class='del'>-	.write = ab5500_address_write,</div><div class='del'>-	.read = seq_read,</div><div class='del'>-	.llseek = seq_lseek,</div><div class='del'>-	.release = single_release,</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct file_operations ab5500_val_fops = {</div><div class='del'>-	.open = ab5500_val_open,</div><div class='del'>-	.write = ab5500_val_write,</div><div class='del'>-	.read = seq_read,</div><div class='del'>-	.llseek = seq_lseek,</div><div class='del'>-	.release = single_release,</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct dentry *ab5500_dir;</div><div class='del'>-static struct dentry *ab5500_reg_file;</div><div class='del'>-static struct dentry *ab5500_bank_file;</div><div class='del'>-static struct dentry *ab5500_address_file;</div><div class='del'>-static struct dentry *ab5500_val_file;</div><div class='del'>-</div><div class='del'>-void __init ab5500_setup_debugfs(struct ab5500 *ab)</div><div class='del'>-{</div><div class='del'>-	ab-&gt;debug_bank = AB5500_BANK_VIT_IO_I2C_CLK_TST_OTP;</div><div class='del'>-	ab-&gt;debug_address = AB5500_CHIP_ID;</div><div class='del'>-</div><div class='del'>-	ab5500_dir = debugfs_create_dir("ab5500", NULL);</div><div class='del'>-	if (!ab5500_dir)</div><div class='del'>-		goto exit_no_debugfs;</div><div class='del'>-</div><div class='del'>-	ab5500_reg_file = debugfs_create_file("all-bank-registers",</div><div class='del'>-		S_IRUGO, ab5500_dir, ab, &amp;ab5500_registers_fops);</div><div class='del'>-	if (!ab5500_reg_file)</div><div class='del'>-		goto exit_destroy_dir;</div><div class='del'>-</div><div class='del'>-	ab5500_bank_file = debugfs_create_file("register-bank",</div><div class='del'>-		(S_IRUGO | S_IWUGO), ab5500_dir, ab, &amp;ab5500_bank_fops);</div><div class='del'>-	if (!ab5500_bank_file)</div><div class='del'>-		goto exit_destroy_reg;</div><div class='del'>-</div><div class='del'>-	ab5500_address_file = debugfs_create_file("register-address",</div><div class='del'>-		(S_IRUGO | S_IWUGO), ab5500_dir, ab, &amp;ab5500_address_fops);</div><div class='del'>-	if (!ab5500_address_file)</div><div class='del'>-		goto exit_destroy_bank;</div><div class='del'>-</div><div class='del'>-	ab5500_val_file = debugfs_create_file("register-value",</div><div class='del'>-		(S_IRUGO | S_IWUGO), ab5500_dir, ab, &amp;ab5500_val_fops);</div><div class='del'>-	if (!ab5500_val_file)</div><div class='del'>-		goto exit_destroy_address;</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-</div><div class='del'>-exit_destroy_address:</div><div class='del'>-	debugfs_remove(ab5500_address_file);</div><div class='del'>-exit_destroy_bank:</div><div class='del'>-	debugfs_remove(ab5500_bank_file);</div><div class='del'>-exit_destroy_reg:</div><div class='del'>-	debugfs_remove(ab5500_reg_file);</div><div class='del'>-exit_destroy_dir:</div><div class='del'>-	debugfs_remove(ab5500_dir);</div><div class='del'>-exit_no_debugfs:</div><div class='del'>-	dev_err(ab-&gt;dev, "failed to create debugfs entries.\n");</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __exit ab5500_remove_debugfs(void)</div><div class='del'>-{</div><div class='del'>-	debugfs_remove(ab5500_val_file);</div><div class='del'>-	debugfs_remove(ab5500_address_file);</div><div class='del'>-	debugfs_remove(ab5500_bank_file);</div><div class='del'>-	debugfs_remove(ab5500_reg_file);</div><div class='del'>-	debugfs_remove(ab5500_dir);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/mfd/ab5500-debugfs.h b/drivers/mfd/ab5500-debugfs.h<br/>deleted file mode 100644<br/>index 7330a9b6afa6..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/ab5500-debugfs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/ab5500-debugfs.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2011 ST-Ericsson</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2</div><div class='del'>- * Debugfs interface to the AB5500 core driver</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-</div><div class='del'>-void ab5500_setup_debugfs(struct ab5500 *ab);</div><div class='del'>-void ab5500_remove_debugfs(void);</div><div class='del'>-</div><div class='del'>-#else /* !CONFIG_DEBUG_FS */</div><div class='del'>-</div><div class='del'>-static inline void ab5500_setup_debugfs(struct ab5500 *ab)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void ab5500_remove_debugfs(void)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c<br/>index 1f08704f7ae8..dac0e2998603 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/ab8500-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/ab8500-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/ab8500-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/ab8500-core.c</a></div><div class='hunk'>@@ -18,7 +18,10 @@</div><div class='ctx'> #include &lt;linux/mfd/core.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/abx500.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/abx500/ab8500.h&gt;</div><div class='add'>+#include &lt;linux/mfd/dbx500-prcmu.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/ab8500.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Interrupt register offsets</div><div class='hunk'>@@ -91,12 +94,24 @@</div><div class='ctx'> #define AB8500_IT_MASK23_REG		0x56</div><div class='ctx'> #define AB8500_IT_MASK24_REG		0x57</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * latch hierarchy registers</div><div class='add'>+ */</div><div class='add'>+#define AB8500_IT_LATCHHIER1_REG	0x60</div><div class='add'>+#define AB8500_IT_LATCHHIER2_REG	0x61</div><div class='add'>+#define AB8500_IT_LATCHHIER3_REG	0x62</div><div class='add'>+</div><div class='add'>+#define AB8500_IT_LATCHHIER_NUM		3</div><div class='add'>+</div><div class='ctx'> #define AB8500_REV_REG			0x80</div><div class='ctx'> #define AB8500_IC_NAME_REG		0x82</div><div class='ctx'> #define AB8500_SWITCH_OFF_STATUS	0x00</div><div class='ctx'> </div><div class='ctx'> #define AB8500_TURN_ON_STATUS		0x00</div><div class='ctx'> </div><div class='add'>+static bool no_bm; /* No battery management */</div><div class='add'>+module_param(no_bm, bool, S_IRUGO);</div><div class='add'>+</div><div class='ctx'> #define AB9540_MODEM_CTRL2_REG			0x23</div><div class='ctx'> #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT	BIT(2)</div><div class='ctx'> </div><div class='hunk'>@@ -125,6 +140,41 @@ static const char ab8500_version_str[][7] = {</div><div class='ctx'> 	[AB8500_VERSION_AB8540] = "AB8540",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int ab8500_i2c_write(struct ab8500 *ab8500, u16 addr, u8 data)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = prcmu_abb_write((u8)(addr &gt;&gt; 8), (u8)(addr &amp; 0xFF), &amp;data, 1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err(ab8500-&gt;dev, "prcmu i2c error %d\n", ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ab8500_i2c_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,</div><div class='add'>+	u8 data)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = prcmu_abb_write_masked((u8)(addr &gt;&gt; 8), (u8)(addr &amp; 0xFF), &amp;data,</div><div class='add'>+		&amp;mask, 1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err(ab8500-&gt;dev, "prcmu i2c error %d\n", ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ab8500_i2c_read(struct ab8500 *ab8500, u16 addr)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 data;</div><div class='add'>+</div><div class='add'>+	ret = prcmu_abb_read((u8)(addr &gt;&gt; 8), (u8)(addr &amp; 0xFF), &amp;data, 1);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(ab8500-&gt;dev, "prcmu i2c error %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	return (int)data;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ab8500_get_chip_id(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ab8500 *ab8500;</div><div class='hunk'>@@ -161,9 +211,13 @@ static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,</div><div class='ctx'> static int ab8500_set_register(struct device *dev, u8 bank,</div><div class='ctx'> 	u8 reg, u8 value)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='ctx'> 	struct ab8500 *ab8500 = dev_get_drvdata(dev-&gt;parent);</div><div class='ctx'> </div><div class='del'>-	return set_register_interruptible(ab8500, bank, reg, value);</div><div class='add'>+	atomic_inc(&amp;ab8500-&gt;transfer_ongoing);</div><div class='add'>+	ret = set_register_interruptible(ab8500, bank, reg, value);</div><div class='add'>+	atomic_dec(&amp;ab8500-&gt;transfer_ongoing);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,</div><div class='hunk'>@@ -192,9 +246,13 @@ static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,</div><div class='ctx'> static int ab8500_get_register(struct device *dev, u8 bank,</div><div class='ctx'> 	u8 reg, u8 *value)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='ctx'> 	struct ab8500 *ab8500 = dev_get_drvdata(dev-&gt;parent);</div><div class='ctx'> </div><div class='del'>-	return get_register_interruptible(ab8500, bank, reg, value);</div><div class='add'>+	atomic_inc(&amp;ab8500-&gt;transfer_ongoing);</div><div class='add'>+	ret = get_register_interruptible(ab8500, bank, reg, value);</div><div class='add'>+	atomic_dec(&amp;ab8500-&gt;transfer_ongoing);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,</div><div class='hunk'>@@ -241,11 +299,14 @@ out:</div><div class='ctx'> static int ab8500_mask_and_set_register(struct device *dev,</div><div class='ctx'> 	u8 bank, u8 reg, u8 bitmask, u8 bitvalues)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='ctx'> 	struct ab8500 *ab8500 = dev_get_drvdata(dev-&gt;parent);</div><div class='ctx'> </div><div class='del'>-	return mask_and_set_register_interruptible(ab8500, bank, reg,</div><div class='del'>-		bitmask, bitvalues);</div><div class='del'>-</div><div class='add'>+	atomic_inc(&amp;ab8500-&gt;transfer_ongoing);</div><div class='add'>+	ret= mask_and_set_register_interruptible(ab8500, bank, reg,</div><div class='add'>+						 bitmask, bitvalues);</div><div class='add'>+	atomic_dec(&amp;ab8500-&gt;transfer_ongoing);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct abx500_ops ab8500_ops = {</div><div class='hunk'>@@ -264,6 +325,7 @@ static void ab8500_irq_lock(struct irq_data *data)</div><div class='ctx'> 	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ab8500-&gt;irq_lock);</div><div class='add'>+	atomic_inc(&amp;ab8500-&gt;transfer_ongoing);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ab8500_irq_sync_unlock(struct irq_data *data)</div><div class='hunk'>@@ -292,7 +354,7 @@ static void ab8500_irq_sync_unlock(struct irq_data *data)</div><div class='ctx'> 		reg = AB8500_IT_MASK1_REG + ab8500-&gt;irq_reg_offset[i];</div><div class='ctx'> 		set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+	atomic_dec(&amp;ab8500-&gt;transfer_ongoing);</div><div class='ctx'> 	mutex_unlock(&amp;ab8500-&gt;irq_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -325,6 +387,90 @@ static struct irq_chip ab8500_irq_chip = {</div><div class='ctx'> 	.irq_unmask		= ab8500_irq_unmask,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,</div><div class='add'>+					int latch_offset, u8 latch_val)</div><div class='add'>+{</div><div class='add'>+	int int_bit = __ffs(latch_val);</div><div class='add'>+	int line, i;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		int_bit = __ffs(latch_val);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ab8500-&gt;mask_size; i++)</div><div class='add'>+			if (ab8500-&gt;irq_reg_offset[i] == latch_offset)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+		if (i &gt;= ab8500-&gt;mask_size) {</div><div class='add'>+			dev_err(ab8500-&gt;dev, "Register offset 0x%2x not declared\n",</div><div class='add'>+					latch_offset);</div><div class='add'>+			return -ENXIO;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		line = (i &lt;&lt; 3) + int_bit;</div><div class='add'>+		latch_val &amp;= ~(1 &lt;&lt; int_bit);</div><div class='add'>+</div><div class='add'>+		handle_nested_irq(ab8500-&gt;irq_base + line);</div><div class='add'>+	} while (latch_val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,</div><div class='add'>+					int hier_offset, u8 hier_val)</div><div class='add'>+{</div><div class='add'>+	int latch_bit, status;</div><div class='add'>+	u8 latch_offset, latch_val;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		latch_bit = __ffs(hier_val);</div><div class='add'>+		latch_offset = (hier_offset &lt;&lt; 3) + latch_bit;</div><div class='add'>+</div><div class='add'>+		/* Fix inconsistent ITFromLatch25 bit mapping... */</div><div class='add'>+		if (unlikely(latch_offset == 17))</div><div class='add'>+			latch_offset = 24;</div><div class='add'>+</div><div class='add'>+		status = get_register_interruptible(ab8500,</div><div class='add'>+				AB8500_INTERRUPT,</div><div class='add'>+				AB8500_IT_LATCH1_REG + latch_offset,</div><div class='add'>+				&amp;latch_val);</div><div class='add'>+		if (status &lt; 0 || latch_val == 0)</div><div class='add'>+			goto discard;</div><div class='add'>+</div><div class='add'>+		status = ab8500_handle_hierarchical_line(ab8500,</div><div class='add'>+				latch_offset, latch_val);</div><div class='add'>+		if (status &lt; 0)</div><div class='add'>+			return status;</div><div class='add'>+discard:</div><div class='add'>+		hier_val &amp;= ~(1 &lt;&lt; latch_bit);</div><div class='add'>+	} while (hier_val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)</div><div class='add'>+{</div><div class='add'>+	struct ab8500 *ab8500 = dev;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	dev_vdbg(ab8500-&gt;dev, "interrupt\n");</div><div class='add'>+</div><div class='add'>+	/*  Hierarchical interrupt version */</div><div class='add'>+	for (i = 0; i &lt; AB8500_IT_LATCHHIER_NUM; i++) {</div><div class='add'>+		int status;</div><div class='add'>+		u8 hier_val;</div><div class='add'>+</div><div class='add'>+		status = get_register_interruptible(ab8500, AB8500_INTERRUPT,</div><div class='add'>+			AB8500_IT_LATCHHIER1_REG + i, &amp;hier_val);</div><div class='add'>+		if (status &lt; 0 || hier_val == 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);</div><div class='add'>+		if (status &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static irqreturn_t ab8500_irq(int irq, void *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ab8500 *ab8500 = dev;</div><div class='hunk'>@@ -332,6 +478,8 @@ static irqreturn_t ab8500_irq(int irq, void *dev)</div><div class='ctx'> </div><div class='ctx'> 	dev_vdbg(ab8500-&gt;dev, "interrupt\n");</div><div class='ctx'> </div><div class='add'>+	atomic_inc(&amp;ab8500-&gt;transfer_ongoing);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; ab8500-&gt;mask_size; i++) {</div><div class='ctx'> 		int regoffset = ab8500-&gt;irq_reg_offset[i];</div><div class='ctx'> 		int status;</div><div class='hunk'>@@ -355,9 +503,10 @@ static irqreturn_t ab8500_irq(int irq, void *dev)</div><div class='ctx'> </div><div class='ctx'> 			handle_nested_irq(ab8500-&gt;irq_base + line);</div><div class='ctx'> 			value &amp;= ~(1 &lt;&lt; bit);</div><div class='add'>+</div><div class='ctx'> 		} while (value);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+	atomic_dec(&amp;ab8500-&gt;transfer_ongoing);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -411,6 +560,14 @@ static void ab8500_irq_remove(struct ab8500 *ab8500)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int ab8500_suspend(struct ab8500 *ab8500)</div><div class='add'>+{</div><div class='add'>+	if (atomic_read(&amp;ab8500-&gt;transfer_ongoing))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* AB8500 GPIO Resources */</div><div class='ctx'> static struct resource __devinitdata ab8500_gpio_resources[] = {</div><div class='ctx'> 	{</div><div class='hunk'>@@ -744,6 +901,39 @@ static struct resource __devinitdata ab8500_usb_resources[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct resource __devinitdata ab8505_iddet_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.name  = "KeyDeglitch",</div><div class='add'>+		.start = AB8505_INT_KEYDEGLITCH,</div><div class='add'>+		.end   = AB8505_INT_KEYDEGLITCH,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name  = "KP",</div><div class='add'>+		.start = AB8505_INT_KP,</div><div class='add'>+		.end   = AB8505_INT_KP,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name  = "IKP",</div><div class='add'>+		.start = AB8505_INT_IKP,</div><div class='add'>+		.end   = AB8505_INT_IKP,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name  = "IKR",</div><div class='add'>+		.start = AB8505_INT_IKR,</div><div class='add'>+		.end   = AB8505_INT_IKR,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name  = "KeyStuck",</div><div class='add'>+		.start = AB8505_INT_KEYSTUCK,</div><div class='add'>+		.end   = AB8505_INT_KEYSTUCK,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct resource __devinitdata ab8500_temp_resources[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name  = "AB8500_TEMP_WARM",</div><div class='hunk'>@@ -778,35 +968,11 @@ static struct mfd_cell __devinitdata abx500_common_devs[] = {</div><div class='ctx'> 		.resources = ab8500_rtc_resources,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "ab8500-charger",</div><div class='del'>-		.num_resources = ARRAY_SIZE(ab8500_charger_resources),</div><div class='del'>-		.resources = ab8500_charger_resources,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "ab8500-btemp",</div><div class='del'>-		.num_resources = ARRAY_SIZE(ab8500_btemp_resources),</div><div class='del'>-		.resources = ab8500_btemp_resources,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "ab8500-fg",</div><div class='del'>-		.num_resources = ARRAY_SIZE(ab8500_fg_resources),</div><div class='del'>-		.resources = ab8500_fg_resources,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name = "ab8500-chargalg",</div><div class='del'>-		.num_resources = ARRAY_SIZE(ab8500_chargalg_resources),</div><div class='del'>-		.resources = ab8500_chargalg_resources,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='ctx'> 		.name = "ab8500-acc-det",</div><div class='ctx'> 		.num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),</div><div class='ctx'> 		.resources = ab8500_av_acc_detect_resources,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "ab8500-codec",</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	{</div><div class='ctx'> 		.name = "ab8500-poweron-key",</div><div class='ctx'> 		.num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),</div><div class='ctx'> 		.resources = ab8500_poweronkey_db_resources,</div><div class='hunk'>@@ -834,6 +1000,29 @@ static struct mfd_cell __devinitdata abx500_common_devs[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct mfd_cell __devinitdata ab8500_bm_devs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "ab8500-charger",</div><div class='add'>+		.num_resources = ARRAY_SIZE(ab8500_charger_resources),</div><div class='add'>+		.resources = ab8500_charger_resources,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "ab8500-btemp",</div><div class='add'>+		.num_resources = ARRAY_SIZE(ab8500_btemp_resources),</div><div class='add'>+		.resources = ab8500_btemp_resources,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "ab8500-fg",</div><div class='add'>+		.num_resources = ARRAY_SIZE(ab8500_fg_resources),</div><div class='add'>+		.resources = ab8500_fg_resources,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "ab8500-chargalg",</div><div class='add'>+		.num_resources = ARRAY_SIZE(ab8500_chargalg_resources),</div><div class='add'>+		.resources = ab8500_chargalg_resources,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct mfd_cell __devinitdata ab8500_devs[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "ab8500-gpio",</div><div class='hunk'>@@ -845,6 +1034,9 @@ static struct mfd_cell __devinitdata ab8500_devs[] = {</div><div class='ctx'> 		.num_resources = ARRAY_SIZE(ab8500_usb_resources),</div><div class='ctx'> 		.resources = ab8500_usb_resources,</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.name = "ab8500-codec",</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct mfd_cell __devinitdata ab9540_devs[] = {</div><div class='hunk'>@@ -858,6 +1050,18 @@ static struct mfd_cell __devinitdata ab9540_devs[] = {</div><div class='ctx'> 		.num_resources = ARRAY_SIZE(ab8500_usb_resources),</div><div class='ctx'> 		.resources = ab8500_usb_resources,</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.name = "ab9540-codec",</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Device list common to ab9540 and ab8505 */</div><div class='add'>+static struct mfd_cell __devinitdata ab9540_ab8505_devs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "ab-iddet",</div><div class='add'>+		.num_resources = ARRAY_SIZE(ab8505_iddet_resources),</div><div class='add'>+		.resources = ab8505_iddet_resources,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static ssize_t show_chip_id(struct device *dev,</div><div class='hunk'>@@ -1003,18 +1207,66 @@ static struct attribute_group ab9540_attr_group = {</div><div class='ctx'> 	.attrs	= ab9540_sysfs_entries,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version)</div><div class='add'>+static const struct of_device_id ab8500_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "stericsson,ab8500",</div><div class='add'>+		.data = (void *)AB8500_VERSION_AB8500,</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit ab8500_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct ab8500_platform_data *plat = dev_get_platdata(ab8500-&gt;dev);</div><div class='add'>+	struct ab8500_platform_data *plat = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+	const struct platform_device_id *platid = platform_get_device_id(pdev);</div><div class='add'>+	enum ab8500_version version = AB8500_VERSION_UNDEFINED;</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct ab8500 *ab8500;</div><div class='add'>+	struct resource *resource;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u8 value;</div><div class='ctx'> </div><div class='add'>+	ab8500 = kzalloc(sizeof *ab8500, GFP_KERNEL);</div><div class='add'>+	if (!ab8500)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	if (plat)</div><div class='ctx'> 		ab8500-&gt;irq_base = plat-&gt;irq_base;</div><div class='add'>+	else if (np)</div><div class='add'>+		ret = of_property_read_u32(np, "stericsson,irq-base", &amp;ab8500-&gt;irq_base);</div><div class='add'>+</div><div class='add'>+	if (!ab8500-&gt;irq_base) {</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "couldn't find irq-base\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out_free_ab8500;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ab8500-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='add'>+	if (!resource) {</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto out_free_ab8500;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ab8500-&gt;irq = resource-&gt;start;</div><div class='add'>+</div><div class='add'>+	ab8500-&gt;read = ab8500_i2c_read;</div><div class='add'>+	ab8500-&gt;write = ab8500_i2c_write;</div><div class='add'>+	ab8500-&gt;write_masked = ab8500_i2c_write_masked;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;ab8500-&gt;lock);</div><div class='ctx'> 	mutex_init(&amp;ab8500-&gt;irq_lock);</div><div class='add'>+	atomic_set(&amp;ab8500-&gt;transfer_ongoing, 0);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, ab8500);</div><div class='add'>+</div><div class='add'>+	if (platid)</div><div class='add'>+		version = platid-&gt;driver_data;</div><div class='add'>+	else if (np)</div><div class='add'>+		version = (unsigned int)</div><div class='add'>+			of_match_device(ab8500_match, &amp;pdev-&gt;dev)-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 	if (version != AB8500_VERSION_UNDEFINED)</div><div class='ctx'> 		ab8500-&gt;version = version;</div><div class='hunk'>@@ -1022,7 +1274,7 @@ int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version)</div><div class='ctx'> 		ret = get_register_interruptible(ab8500, AB8500_MISC,</div><div class='ctx'> 			AB8500_IC_NAME_REG, &amp;value);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='add'>+			goto out_free_ab8500;</div><div class='ctx'> </div><div class='ctx'> 		ab8500-&gt;version = value;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1030,7 +1282,7 @@ int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version)</div><div class='ctx'> 	ret = get_register_interruptible(ab8500, AB8500_MISC,</div><div class='ctx'> 		AB8500_REV_REG, &amp;value);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+		goto out_free_ab8500;</div><div class='ctx'> </div><div class='ctx'> 	ab8500-&gt;chip_id = value;</div><div class='ctx'> </div><div class='hunk'>@@ -1105,30 +1357,57 @@ int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out_freeoldmask;</div><div class='ctx'> </div><div class='del'>-		ret = request_threaded_irq(ab8500-&gt;irq, NULL, ab8500_irq,</div><div class='del'>-					   IRQF_ONESHOT | IRQF_NO_SUSPEND,</div><div class='del'>-					   "ab8500", ab8500);</div><div class='add'>+		/*  Activate this feature only in ab9540 */</div><div class='add'>+		/*  till tests are done on ab8500 1p2 or later*/</div><div class='add'>+		if (is_ab9540(ab8500))</div><div class='add'>+			ret = request_threaded_irq(ab8500-&gt;irq, NULL,</div><div class='add'>+					ab8500_hierarchical_irq,</div><div class='add'>+					IRQF_ONESHOT | IRQF_NO_SUSPEND,</div><div class='add'>+					"ab8500", ab8500);</div><div class='add'>+		else</div><div class='add'>+			ret = request_threaded_irq(ab8500-&gt;irq, NULL,</div><div class='add'>+					ab8500_irq,</div><div class='add'>+					IRQF_ONESHOT | IRQF_NO_SUSPEND,</div><div class='add'>+					"ab8500", ab8500);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out_removeirq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = mfd_add_devices(ab8500-&gt;dev, 0, abx500_common_devs,</div><div class='del'>-			      ARRAY_SIZE(abx500_common_devs), NULL,</div><div class='del'>-			      ab8500-&gt;irq_base);</div><div class='add'>+	if (!np) {</div><div class='add'>+		ret = mfd_add_devices(ab8500-&gt;dev, 0, abx500_common_devs,</div><div class='add'>+				ARRAY_SIZE(abx500_common_devs), NULL,</div><div class='add'>+				ab8500-&gt;irq_base);</div><div class='ctx'> </div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_freeirq;</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_freeirq;</div><div class='add'>+</div><div class='add'>+		if (is_ab9540(ab8500))</div><div class='add'>+			ret = mfd_add_devices(ab8500-&gt;dev, 0, ab9540_devs,</div><div class='add'>+					ARRAY_SIZE(ab9540_devs), NULL,</div><div class='add'>+					ab8500-&gt;irq_base);</div><div class='add'>+		else</div><div class='add'>+			ret = mfd_add_devices(ab8500-&gt;dev, 0, ab8500_devs,</div><div class='add'>+					ARRAY_SIZE(ab8500_devs), NULL,</div><div class='add'>+					ab8500-&gt;irq_base);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_freeirq;</div><div class='ctx'> </div><div class='del'>-	if (is_ab9540(ab8500))</div><div class='del'>-		ret = mfd_add_devices(ab8500-&gt;dev, 0, ab9540_devs,</div><div class='del'>-			      ARRAY_SIZE(ab9540_devs), NULL,</div><div class='del'>-			      ab8500-&gt;irq_base);</div><div class='del'>-	else</div><div class='del'>-		ret = mfd_add_devices(ab8500-&gt;dev, 0, ab8500_devs,</div><div class='del'>-			      ARRAY_SIZE(ab9540_devs), NULL,</div><div class='del'>-			      ab8500-&gt;irq_base);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_freeirq;</div><div class='add'>+		if (is_ab9540(ab8500) || is_ab8505(ab8500))</div><div class='add'>+			ret = mfd_add_devices(ab8500-&gt;dev, 0, ab9540_ab8505_devs,</div><div class='add'>+					ARRAY_SIZE(ab9540_ab8505_devs), NULL,</div><div class='add'>+					ab8500-&gt;irq_base);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_freeirq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!no_bm) {</div><div class='add'>+		/* Add battery management devices */</div><div class='add'>+		ret = mfd_add_devices(ab8500-&gt;dev, 0, ab8500_bm_devs,</div><div class='add'>+				      ARRAY_SIZE(ab8500_bm_devs), NULL,</div><div class='add'>+				      ab8500-&gt;irq_base);</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_err(ab8500-&gt;dev, "error adding bm devices\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (is_ab9540(ab8500))</div><div class='ctx'> 		ret = sysfs_create_group(&amp;ab8500-&gt;dev-&gt;kobj,</div><div class='hunk'>@@ -1151,12 +1430,16 @@ out_freeoldmask:</div><div class='ctx'> 	kfree(ab8500-&gt;oldmask);</div><div class='ctx'> out_freemask:</div><div class='ctx'> 	kfree(ab8500-&gt;mask);</div><div class='add'>+out_free_ab8500:</div><div class='add'>+	kfree(ab8500);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __devexit ab8500_exit(struct ab8500 *ab8500)</div><div class='add'>+static int __devexit ab8500_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct ab8500 *ab8500 = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='ctx'> 	if (is_ab9540(ab8500))</div><div class='ctx'> 		sysfs_remove_group(&amp;ab8500-&gt;dev-&gt;kobj, &amp;ab9540_attr_group);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1168,10 +1451,42 @@ int __devexit ab8500_exit(struct ab8500 *ab8500)</div><div class='ctx'> 	}</div><div class='ctx'> 	kfree(ab8500-&gt;oldmask);</div><div class='ctx'> 	kfree(ab8500-&gt;mask);</div><div class='add'>+	kfree(ab8500);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct platform_device_id ab8500_id[] = {</div><div class='add'>+	{ "ab8500-core", AB8500_VERSION_AB8500 },</div><div class='add'>+	{ "ab8505-i2c", AB8500_VERSION_AB8505 },</div><div class='add'>+	{ "ab9540-i2c", AB8500_VERSION_AB9540 },</div><div class='add'>+	{ "ab8540-i2c", AB8500_VERSION_AB8540 },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_driver ab8500_core_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "ab8500-core",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = ab8500_match,</div><div class='add'>+	},</div><div class='add'>+	.probe	= ab8500_probe,</div><div class='add'>+	.remove	= __devexit_p(ab8500_remove),</div><div class='add'>+	.id_table = ab8500_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init ab8500_core_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;ab8500_core_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit ab8500_core_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;ab8500_core_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(ab8500_core_init);</div><div class='add'>+module_exit(ab8500_core_exit);</div><div class='add'>+</div><div class='ctx'> MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");</div><div class='ctx'> MODULE_DESCRIPTION("AB8500 MFD core");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/mfd/ab8500-debugfs.c b/drivers/mfd/ab8500-debugfs.c<br/>index 9a0211aa8897..50c4c89ab220 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/ab8500-debugfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/ab8500-debugfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/ab8500-debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/ab8500-debugfs.c</a></div><div class='hunk'>@@ -608,10 +608,16 @@ static int __devexit ab8500_debug_remove(struct platform_device *plf)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct of_device_id ab8500_debug_match[] = {</div><div class='add'>+        { .compatible = "stericsson,ab8500-debug", },</div><div class='add'>+        {}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct platform_driver ab8500_debug_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "ab8500-debug",</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = ab8500_debug_match,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe  = ab8500_debug_probe,</div><div class='ctx'> 	.remove = __devexit_p(ab8500_debug_remove)</div><div class='head'>diff --git a/drivers/mfd/ab8500-gpadc.c b/drivers/mfd/ab8500-gpadc.c<br/>index c39fc716e1dc..b86fd8e1ec3f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/ab8500-gpadc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/ab8500-gpadc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/ab8500-gpadc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/ab8500-gpadc.c</a></div><div class='hunk'>@@ -584,7 +584,7 @@ static int __devinit ab8500_gpadc_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	gpadc-&gt;irq = platform_get_irq_byname(pdev, "SW_CONV_END");</div><div class='ctx'> 	if (gpadc-&gt;irq &lt; 0) {</div><div class='del'>-		dev_err(gpadc-&gt;dev, "failed to get platform irq-%d\n",</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to get platform irq-%d\n",</div><div class='ctx'> 			gpadc-&gt;irq);</div><div class='ctx'> 		ret = gpadc-&gt;irq;</div><div class='ctx'> 		goto fail;</div><div class='hunk'>@@ -648,12 +648,18 @@ static int __devexit ab8500_gpadc_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct of_device_id ab8500_gpadc_match[] = {</div><div class='add'>+	{ .compatible = "stericsson,ab8500-gpadc", },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct platform_driver ab8500_gpadc_driver = {</div><div class='ctx'> 	.probe = ab8500_gpadc_probe,</div><div class='ctx'> 	.remove = __devexit_p(ab8500_gpadc_remove),</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "ab8500-gpadc",</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = ab8500_gpadc_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/ab8500-i2c.c b/drivers/mfd/ab8500-i2c.c<br/>deleted file mode 100644<br/>index b83045f102be..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/ab8500-i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/ab8500-i2c.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,128 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- * Author: Mattias Wallin &lt;mattias.wallin@stericsson.com&gt; for ST-Ericsson.</div><div class='del'>- * License Terms: GNU General Public License v2</div><div class='del'>- * This file was based on drivers/mfd/ab8500-spi.c</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/mfd/abx500/ab8500.h&gt;</div><div class='del'>-#include &lt;linux/mfd/dbx500-prcmu.h&gt;</div><div class='del'>-</div><div class='del'>-static int ab8500_i2c_write(struct ab8500 *ab8500, u16 addr, u8 data)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = prcmu_abb_write((u8)(addr &gt;&gt; 8), (u8)(addr &amp; 0xFF), &amp;data, 1);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		dev_err(ab8500-&gt;dev, "prcmu i2c error %d\n", ret);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab8500_i2c_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,</div><div class='del'>-	u8 data)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = prcmu_abb_write_masked((u8)(addr &gt;&gt; 8), (u8)(addr &amp; 0xFF), &amp;data,</div><div class='del'>-		&amp;mask, 1);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		dev_err(ab8500-&gt;dev, "prcmu i2c error %d\n", ret);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab8500_i2c_read(struct ab8500 *ab8500, u16 addr)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	u8 data;</div><div class='del'>-</div><div class='del'>-	ret = prcmu_abb_read((u8)(addr &gt;&gt; 8), (u8)(addr &amp; 0xFF), &amp;data, 1);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		dev_err(ab8500-&gt;dev, "prcmu i2c error %d\n", ret);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-	return (int)data;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __devinit ab8500_i2c_probe(struct platform_device *plf)</div><div class='del'>-{</div><div class='del'>-	const struct platform_device_id *platid = platform_get_device_id(plf);</div><div class='del'>-	struct ab8500 *ab8500;</div><div class='del'>-	struct resource *resource;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ab8500 = kzalloc(sizeof *ab8500, GFP_KERNEL);</div><div class='del'>-	if (!ab8500)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ab8500-&gt;dev = &amp;plf-&gt;dev;</div><div class='del'>-</div><div class='del'>-	resource = platform_get_resource(plf, IORESOURCE_IRQ, 0);</div><div class='del'>-	if (!resource) {</div><div class='del'>-		kfree(ab8500);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ab8500-&gt;irq = resource-&gt;start;</div><div class='del'>-</div><div class='del'>-	ab8500-&gt;read = ab8500_i2c_read;</div><div class='del'>-	ab8500-&gt;write = ab8500_i2c_write;</div><div class='del'>-	ab8500-&gt;write_masked = ab8500_i2c_write_masked;</div><div class='del'>-</div><div class='del'>-	platform_set_drvdata(plf, ab8500);</div><div class='del'>-</div><div class='del'>-	ret = ab8500_init(ab8500, platid-&gt;driver_data);</div><div class='del'>-	if (ret)</div><div class='del'>-		kfree(ab8500);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __devexit ab8500_i2c_remove(struct platform_device *plf)</div><div class='del'>-{</div><div class='del'>-	struct ab8500 *ab8500 = platform_get_drvdata(plf);</div><div class='del'>-</div><div class='del'>-	ab8500_exit(ab8500);</div><div class='del'>-	kfree(ab8500);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct platform_device_id ab8500_id[] = {</div><div class='del'>-	{ "ab8500-i2c", AB8500_VERSION_AB8500 },</div><div class='del'>-	{ "ab8505-i2c", AB8500_VERSION_AB8505 },</div><div class='del'>-	{ "ab9540-i2c", AB8500_VERSION_AB9540 },</div><div class='del'>-	{ "ab8540-i2c", AB8500_VERSION_AB8540 },</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_driver ab8500_i2c_driver = {</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "ab8500-i2c",</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-	.probe	= ab8500_i2c_probe,</div><div class='del'>-	.remove	= __devexit_p(ab8500_i2c_remove),</div><div class='del'>-	.id_table = ab8500_id,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init ab8500_i2c_init(void)</div><div class='del'>-{</div><div class='del'>-	return platform_driver_register(&amp;ab8500_i2c_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ab8500_i2c_exit(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;ab8500_i2c_driver);</div><div class='del'>-}</div><div class='del'>-arch_initcall(ab8500_i2c_init);</div><div class='del'>-module_exit(ab8500_i2c_exit);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Mattias WALLIN &lt;mattias.wallin@stericsson.com");</div><div class='del'>-MODULE_DESCRIPTION("AB8500 Core access via PRCMU I2C");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/mfd/ab8500-sysctrl.c b/drivers/mfd/ab8500-sysctrl.c<br/>index c28d4eb1eff0..5a3e51ccf258 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/ab8500-sysctrl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/ab8500-sysctrl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/ab8500-sysctrl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/ab8500-sysctrl.c</a></div><div class='hunk'>@@ -61,10 +61,16 @@ static int __devexit ab8500_sysctrl_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct of_device_id ab8500_sysctrl_match[] = {</div><div class='add'>+	{ .compatible = "stericsson,ab8500-sysctrl", },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct platform_driver ab8500_sysctrl_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "ab8500-sysctrl",</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = ab8500_sysctrl_match,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = ab8500_sysctrl_probe,</div><div class='ctx'> 	.remove = __devexit_p(ab8500_sysctrl_remove),</div><div class='head'>diff --git a/drivers/mfd/anatop-mfd.c b/drivers/mfd/anatop-mfd.c<br/>index 2af42480635e..6da06341f6c9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/anatop-mfd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/anatop-mfd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/anatop-mfd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/anatop-mfd.c</a></div><div class='hunk'>@@ -41,39 +41,26 @@</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/anatop.h&gt;</div><div class='ctx'> </div><div class='del'>-u32 anatop_get_bits(struct anatop *adata, u32 addr, int bit_shift,</div><div class='del'>-		    int bit_width)</div><div class='add'>+u32 anatop_read_reg(struct anatop *adata, u32 addr)</div><div class='ctx'> {</div><div class='del'>-	u32 val, mask;</div><div class='del'>-</div><div class='del'>-	if (bit_width == 32)</div><div class='del'>-		mask = ~0;</div><div class='del'>-	else</div><div class='del'>-		mask = (1 &lt;&lt; bit_width) - 1;</div><div class='del'>-</div><div class='del'>-	val = readl(adata-&gt;ioreg + addr);</div><div class='del'>-	val = (val &gt;&gt; bit_shift) &amp; mask;</div><div class='del'>-</div><div class='del'>-	return val;</div><div class='add'>+	return readl(adata-&gt;ioreg + addr);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(anatop_get_bits);</div><div class='add'>+EXPORT_SYMBOL_GPL(anatop_read_reg);</div><div class='ctx'> </div><div class='del'>-void anatop_set_bits(struct anatop *adata, u32 addr, int bit_shift,</div><div class='del'>-		     int bit_width, u32 data)</div><div class='add'>+void anatop_write_reg(struct anatop *adata, u32 addr, u32 data, u32 mask)</div><div class='ctx'> {</div><div class='del'>-	u32 val, mask;</div><div class='add'>+	u32 val;</div><div class='ctx'> </div><div class='del'>-	if (bit_width == 32)</div><div class='del'>-		mask = ~0;</div><div class='del'>-	else</div><div class='del'>-		mask = (1 &lt;&lt; bit_width) - 1;</div><div class='add'>+	data &amp;= mask;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;adata-&gt;reglock);</div><div class='del'>-	val = readl(adata-&gt;ioreg + addr) &amp; ~(mask &lt;&lt; bit_shift);</div><div class='del'>-	writel((data &lt;&lt; bit_shift) | val, adata-&gt;ioreg + addr);</div><div class='add'>+	val = readl(adata-&gt;ioreg + addr);</div><div class='add'>+	val &amp;= ~mask;</div><div class='add'>+	val |= data;</div><div class='add'>+	writel(val, adata-&gt;ioreg + addr);</div><div class='ctx'> 	spin_unlock(&amp;adata-&gt;reglock);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(anatop_set_bits);</div><div class='add'>+EXPORT_SYMBOL_GPL(anatop_write_reg);</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id of_anatop_match[] = {</div><div class='ctx'> 	{ .compatible = "fsl,imx6q-anatop", },</div><div class='head'>diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c<br/>index 1582c3d95257..383421bf5760 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/asic3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/asic3.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/asic3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/asic3.c</a></div><div class='hunk'>@@ -353,12 +353,28 @@ static int asic3_gpio_irq_type(struct irq_data *data, unsigned int type)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int asic3_gpio_irq_set_wake(struct irq_data *data, unsigned int on)</div><div class='add'>+{</div><div class='add'>+	struct asic3 *asic = irq_data_get_irq_chip_data(data);</div><div class='add'>+	u32 bank, index;</div><div class='add'>+	u16 bit;</div><div class='add'>+</div><div class='add'>+	bank = asic3_irq_to_bank(asic, data-&gt;irq);</div><div class='add'>+	index = asic3_irq_to_index(asic, data-&gt;irq);</div><div class='add'>+	bit = 1&lt;&lt;index;</div><div class='add'>+</div><div class='add'>+	asic3_set_register(asic, bank + ASIC3_GPIO_SLEEP_MASK, bit, !on);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct irq_chip asic3_gpio_irq_chip = {</div><div class='ctx'> 	.name		= "ASIC3-GPIO",</div><div class='ctx'> 	.irq_ack	= asic3_mask_gpio_irq,</div><div class='ctx'> 	.irq_mask	= asic3_mask_gpio_irq,</div><div class='ctx'> 	.irq_unmask	= asic3_unmask_gpio_irq,</div><div class='ctx'> 	.irq_set_type	= asic3_gpio_irq_type,</div><div class='add'>+	.irq_set_wake	= asic3_gpio_irq_set_wake,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_chip asic3_irq_chip = {</div><div class='hunk'>@@ -529,7 +545,7 @@ static int asic3_gpio_to_irq(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct asic3 *asic = container_of(chip, struct asic3, gpio);</div><div class='ctx'> </div><div class='del'>-	return (offset &lt; ASIC3_NUM_GPIOS) ? asic-&gt;irq_base + offset : -ENXIO;</div><div class='add'>+	return asic-&gt;irq_base + offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __init int asic3_gpio_probe(struct platform_device *pdev,</div><div class='hunk'>@@ -894,10 +910,13 @@ static int __init asic3_mfd_probe(struct platform_device *pdev,</div><div class='ctx'> 	asic3_mmc_resources[0].start &gt;&gt;= asic-&gt;bus_shift;</div><div class='ctx'> 	asic3_mmc_resources[0].end   &gt;&gt;= asic-&gt;bus_shift;</div><div class='ctx'> </div><div class='del'>-	ret = mfd_add_devices(&amp;pdev-&gt;dev, pdev-&gt;id,</div><div class='add'>+	if (pdata-&gt;clock_rate) {</div><div class='add'>+		ds1wm_pdata.clock_rate = pdata-&gt;clock_rate;</div><div class='add'>+		ret = mfd_add_devices(&amp;pdev-&gt;dev, pdev-&gt;id,</div><div class='ctx'> 			&amp;asic3_cell_ds1wm, 1, mem, asic-&gt;irq_base);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out;</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (mem_sdio &amp;&amp; (irq &gt;= 0)) {</div><div class='ctx'> 		ret = mfd_add_devices(&amp;pdev-&gt;dev, pdev-&gt;id,</div><div class='hunk'>@@ -1000,6 +1019,9 @@ static int __init asic3_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	asic3_mfd_probe(pdev, pdata, mem);</div><div class='ctx'> </div><div class='add'>+	asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT),</div><div class='add'>+		(ASIC3_EXTCF_CF0_BUF_EN|ASIC3_EXTCF_CF0_PWAIT_EN), 1);</div><div class='add'>+</div><div class='ctx'> 	dev_info(asic-&gt;dev, "ASIC3 Core driver\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1021,6 +1043,9 @@ static int __devexit asic3_remove(struct platform_device *pdev)</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct asic3 *asic = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='add'>+	asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT),</div><div class='add'>+		(ASIC3_EXTCF_CF0_BUF_EN|ASIC3_EXTCF_CF0_PWAIT_EN), 0);</div><div class='add'>+</div><div class='ctx'> 	asic3_mfd_remove(pdev);</div><div class='ctx'> </div><div class='ctx'> 	ret = asic3_gpio_remove(pdev);</div><div class='head'>diff --git a/drivers/mfd/cs5535-mfd.c b/drivers/mfd/cs5535-mfd.c<br/>index 315fef5d466a..3419e726de47 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/cs5535-mfd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/cs5535-mfd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/cs5535-mfd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/cs5535-mfd.c</a></div><div class='hunk'>@@ -186,18 +186,7 @@ static struct pci_driver cs5535_mfd_driver = {</div><div class='ctx'> 	.remove = __devexit_p(cs5535_mfd_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init cs5535_mfd_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;cs5535_mfd_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit cs5535_mfd_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;cs5535_mfd_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(cs5535_mfd_init);</div><div class='del'>-module_exit(cs5535_mfd_exit);</div><div class='add'>+module_pci_driver(cs5535_mfd_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Andres Salomon &lt;dilinger@queued.net&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("MFD driver for CS5535/CS5536 southbridge's ISA PCI device");</div><div class='head'>diff --git a/drivers/mfd/da9052-core.c b/drivers/mfd/da9052-core.c<br/>index 7ff313fe9fb1..1f1313c90573 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/da9052-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/da9052-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/da9052-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/da9052-core.c</a></div><div class='hunk'>@@ -318,6 +318,135 @@ static bool da9052_reg_volatile(struct device *dev, unsigned int reg)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * TBAT look-up table is computed from the R90 reg (8 bit register)</div><div class='add'>+ * reading as below. The battery temperature is in milliCentigrade</div><div class='add'>+ * TBAT = (1/(t1+1/298) - 273) * 1000 mC</div><div class='add'>+ * where t1 = (1/B)* ln(( ADCval * 2.5)/(R25*ITBAT*255))</div><div class='add'>+ * Default values are R25 = 10e3, B = 3380, ITBAT = 50e-6</div><div class='add'>+ * Example:</div><div class='add'>+ * R25=10E3, B=3380, ITBAT=50e-6, ADCVAL=62d calculates</div><div class='add'>+ * TBAT = 20015 mili degrees Centrigrade</div><div class='add'>+ *</div><div class='add'>+*/</div><div class='add'>+static const int32_t tbat_lookup[255] = {</div><div class='add'>+	183258, 144221, 124334, 111336, 101826, 94397, 88343, 83257,</div><div class='add'>+	78889, 75071, 71688, 68656, 65914, 63414, 61120, 59001,</div><div class='add'>+	570366, 55204, 53490, 51881, 50364, 48931, 47574, 46285,</div><div class='add'>+	45059, 43889, 42772, 41703, 40678, 39694, 38748, 37838,</div><div class='add'>+	36961, 36115, 35297, 34507, 33743, 33002, 32284, 31588,</div><div class='add'>+	30911, 30254, 29615, 28994, 28389, 27799, 27225, 26664,</div><div class='add'>+	26117, 25584, 25062, 24553, 24054, 23567, 23091, 22624,</div><div class='add'>+	22167, 21719, 21281, 20851, 20429, 20015, 19610, 19211,</div><div class='add'>+	18820, 18436, 18058, 17688, 17323, 16965, 16612, 16266,</div><div class='add'>+	15925, 15589, 15259, 14933, 14613, 14298, 13987, 13681,</div><div class='add'>+	13379, 13082, 12788, 12499, 12214, 11933, 11655, 11382,</div><div class='add'>+	11112, 10845, 10582, 10322, 10066, 9812, 9562, 9315,</div><div class='add'>+	9071, 8830, 8591, 8356, 8123, 7893, 7665, 7440,</div><div class='add'>+	7218, 6998, 6780, 6565, 6352, 6141, 5933, 5726,</div><div class='add'>+	5522, 5320, 5120, 4922, 4726, 4532, 4340, 4149,</div><div class='add'>+	3961, 3774, 3589, 3406, 3225, 3045, 2867, 2690,</div><div class='add'>+	2516, 2342, 2170, 2000, 1831, 1664, 1498, 1334,</div><div class='add'>+	1171, 1009, 849, 690, 532, 376, 221, 67,</div><div class='add'>+	-84, -236, -386, -535, -683, -830, -975, -1119,</div><div class='add'>+	-1263, -1405, -1546, -1686, -1825, -1964, -2101, -2237,</div><div class='add'>+	-2372, -2506, -2639, -2771, -2902, -3033, -3162, -3291,</div><div class='add'>+	-3418, -3545, -3671, -3796, -3920, -4044, -4166, -4288,</div><div class='add'>+	-4409, -4529, -4649, -4767, -4885, -5002, -5119, -5235,</div><div class='add'>+	-5349, -5464, -5577, -5690, -5802, -5913, -6024, -6134,</div><div class='add'>+	-6244, -6352, -6461, -6568, -6675, -6781, -6887, -6992,</div><div class='add'>+	-7096, -7200, -7303, -7406, -7508, -7609, -7710, -7810,</div><div class='add'>+	-7910, -8009, -8108, -8206, -8304, -8401, -8497, -8593,</div><div class='add'>+	-8689, -8784, -8878, -8972, -9066, -9159, -9251, -9343,</div><div class='add'>+	-9435, -9526, -9617, -9707, -9796, -9886, -9975, -10063,</div><div class='add'>+	-10151, -10238, -10325, -10412, -10839, -10923, -11007, -11090,</div><div class='add'>+	-11173, -11256, -11338, -11420, -11501, -11583, -11663, -11744,</div><div class='add'>+	-11823, -11903, -11982</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 chan_mux[DA9052_ADC_VBBAT + 1] = {</div><div class='add'>+	[DA9052_ADC_VDDOUT]	= DA9052_ADC_MAN_MUXSEL_VDDOUT,</div><div class='add'>+	[DA9052_ADC_ICH]	= DA9052_ADC_MAN_MUXSEL_ICH,</div><div class='add'>+	[DA9052_ADC_TBAT]	= DA9052_ADC_MAN_MUXSEL_TBAT,</div><div class='add'>+	[DA9052_ADC_VBAT]	= DA9052_ADC_MAN_MUXSEL_VBAT,</div><div class='add'>+	[DA9052_ADC_IN4]	= DA9052_ADC_MAN_MUXSEL_AD4,</div><div class='add'>+	[DA9052_ADC_IN5]	= DA9052_ADC_MAN_MUXSEL_AD5,</div><div class='add'>+	[DA9052_ADC_IN6]	= DA9052_ADC_MAN_MUXSEL_AD6,</div><div class='add'>+	[DA9052_ADC_VBBAT]	= DA9052_ADC_MAN_MUXSEL_VBBAT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned short calc_data;</div><div class='add'>+	unsigned short data;</div><div class='add'>+	unsigned char mux_sel;</div><div class='add'>+</div><div class='add'>+	if (channel &gt; DA9052_ADC_VBBAT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;da9052-&gt;auxadc_lock);</div><div class='add'>+</div><div class='add'>+	/* Channel gets activated on enabling the Conversion bit */</div><div class='add'>+	mux_sel = chan_mux[channel] | DA9052_ADC_MAN_MAN_CONV;</div><div class='add'>+</div><div class='add'>+	ret = da9052_reg_write(da9052, DA9052_ADC_MAN_REG, mux_sel);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* Wait for an interrupt */</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;da9052-&gt;done,</div><div class='add'>+					 msecs_to_jiffies(500))) {</div><div class='add'>+		dev_err(da9052-&gt;dev,</div><div class='add'>+			"timeout waiting for ADC conversion interrupt\n");</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = da9052_reg_read(da9052, DA9052_ADC_RES_H_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	calc_data = (unsigned short)ret;</div><div class='add'>+	data = calc_data &lt;&lt; 2;</div><div class='add'>+</div><div class='add'>+	ret = da9052_reg_read(da9052, DA9052_ADC_RES_L_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	calc_data = (unsigned short)(ret &amp; DA9052_ADC_RES_LSB);</div><div class='add'>+	data |= calc_data;</div><div class='add'>+</div><div class='add'>+	ret = data;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	mutex_unlock(&amp;da9052-&gt;auxadc_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(da9052_adc_manual_read);</div><div class='add'>+</div><div class='add'>+static irqreturn_t da9052_auxadc_irq(int irq, void *irq_data)</div><div class='add'>+{</div><div class='add'>+	struct da9052 *da9052 = irq_data;</div><div class='add'>+</div><div class='add'>+	complete(&amp;da9052-&gt;done);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int da9052_adc_read_temp(struct da9052 *da9052)</div><div class='add'>+{</div><div class='add'>+	int tbat;</div><div class='add'>+</div><div class='add'>+	tbat = da9052_reg_read(da9052, DA9052_TBAT_RES_REG);</div><div class='add'>+	if (tbat &lt;= 0)</div><div class='add'>+		return tbat;</div><div class='add'>+</div><div class='add'>+	/* ARRAY_SIZE check is not needed since TBAT is a 8-bit register */</div><div class='add'>+	return tbat_lookup[tbat - 1];</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(da9052_adc_read_temp);</div><div class='add'>+</div><div class='ctx'> static struct resource da9052_rtc_resource = {</div><div class='ctx'> 	.name = "ALM",</div><div class='ctx'> 	.start = DA9052_IRQ_ALARM,</div><div class='hunk'>@@ -646,6 +775,9 @@ int __devinit da9052_device_init(struct da9052 *da9052, u8 chip_id)</div><div class='ctx'> 	struct irq_desc *desc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	mutex_init(&amp;da9052-&gt;auxadc_lock);</div><div class='add'>+	init_completion(&amp;da9052-&gt;done);</div><div class='add'>+</div><div class='ctx'> 	if (pdata &amp;&amp; pdata-&gt;init != NULL)</div><div class='ctx'> 		pdata-&gt;init(da9052);</div><div class='ctx'> </div><div class='hunk'>@@ -659,12 +791,17 @@ int __devinit da9052_device_init(struct da9052 *da9052, u8 chip_id)</div><div class='ctx'> 	ret = regmap_add_irq_chip(da9052-&gt;regmap, da9052-&gt;chip_irq,</div><div class='ctx'> 				  IRQF_TRIGGER_LOW | IRQF_ONESHOT,</div><div class='ctx'> 				  da9052-&gt;irq_base, &amp;da9052_regmap_irq_chip,</div><div class='del'>-				  NULL);</div><div class='add'>+				  &amp;da9052-&gt;irq_data);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto regmap_err;</div><div class='ctx'> </div><div class='del'>-	desc = irq_to_desc(da9052-&gt;chip_irq);</div><div class='del'>-	da9052-&gt;irq_base = regmap_irq_chip_get_base(desc-&gt;action-&gt;dev_id);</div><div class='add'>+	da9052-&gt;irq_base = regmap_irq_chip_get_base(da9052-&gt;irq_data);</div><div class='add'>+</div><div class='add'>+	ret = request_threaded_irq(DA9052_IRQ_ADC_EOM, NULL, da9052_auxadc_irq,</div><div class='add'>+				   IRQF_TRIGGER_LOW | IRQF_ONESHOT,</div><div class='add'>+				   "adc irq", da9052);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		dev_err(da9052-&gt;dev, "DA9052 ADC IRQ failed ret=%d\n", ret);</div><div class='ctx'> </div><div class='ctx'> 	ret = mfd_add_devices(da9052-&gt;dev, -1, da9052_subdev_info,</div><div class='ctx'> 			      ARRAY_SIZE(da9052_subdev_info), NULL, 0);</div><div class='hunk'>@@ -674,6 +811,7 @@ int __devinit da9052_device_init(struct da9052 *da9052, u8 chip_id)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='add'>+	free_irq(DA9052_IRQ_ADC_EOM, da9052);</div><div class='ctx'> 	mfd_remove_devices(da9052-&gt;dev);</div><div class='ctx'> regmap_err:</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -681,8 +819,8 @@ regmap_err:</div><div class='ctx'> </div><div class='ctx'> void da9052_device_exit(struct da9052 *da9052)</div><div class='ctx'> {</div><div class='del'>-	regmap_del_irq_chip(da9052-&gt;chip_irq,</div><div class='del'>-			    irq_get_irq_data(da9052-&gt;irq_base)-&gt;chip_data);</div><div class='add'>+	free_irq(DA9052_IRQ_ADC_EOM, da9052);</div><div class='add'>+	regmap_del_irq_chip(da9052-&gt;chip_irq, da9052-&gt;irq_data);</div><div class='ctx'> 	mfd_remove_devices(da9052-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/da9052-i2c.c b/drivers/mfd/da9052-i2c.c<br/>index 36b88e395499..82c9d6450286 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/da9052-i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/da9052-i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/da9052-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/da9052-i2c.c</a></div><div class='hunk'>@@ -22,6 +22,11 @@</div><div class='ctx'> #include &lt;linux/mfd/da9052/da9052.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/da9052/reg.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int da9052_i2c_enable_multiwrite(struct da9052 *da9052)</div><div class='ctx'> {</div><div class='ctx'> 	int reg_val, ret;</div><div class='hunk'>@@ -41,13 +46,31 @@ static int da9052_i2c_enable_multiwrite(struct da9052 *da9052)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct i2c_device_id da9052_i2c_id[] = {</div><div class='add'>+	{"da9052", DA9052},</div><div class='add'>+	{"da9053-aa", DA9053_AA},</div><div class='add'>+	{"da9053-ba", DA9053_BA},</div><div class='add'>+	{"da9053-bb", DA9053_BB},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static const struct of_device_id dialog_dt_ids[] = {</div><div class='add'>+	{ .compatible = "dlg,da9052", .data = &amp;da9052_i2c_id[0] },</div><div class='add'>+	{ .compatible = "dlg,da9053-aa", .data = &amp;da9052_i2c_id[1] },</div><div class='add'>+	{ .compatible = "dlg,da9053-ab", .data = &amp;da9052_i2c_id[2] },</div><div class='add'>+	{ .compatible = "dlg,da9053-bb", .data = &amp;da9052_i2c_id[3] },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int __devinit da9052_i2c_probe(struct i2c_client *client,</div><div class='ctx'> 				       const struct i2c_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct da9052 *da9052;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	da9052 = kzalloc(sizeof(struct da9052), GFP_KERNEL);</div><div class='add'>+	da9052 = devm_kzalloc(&amp;client-&gt;dev, sizeof(struct da9052), GFP_KERNEL);</div><div class='ctx'> 	if (!da9052)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -55,8 +78,7 @@ static int __devinit da9052_i2c_probe(struct i2c_client *client,</div><div class='ctx'> 				     I2C_FUNC_SMBUS_BYTE_DATA)) {</div><div class='ctx'> 		dev_info(&amp;client-&gt;dev, "Error in %s:i2c_check_functionality\n",</div><div class='ctx'> 			 __func__);</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto err;</div><div class='add'>+		return  -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	da9052-&gt;dev = &amp;client-&gt;dev;</div><div class='hunk'>@@ -64,29 +86,39 @@ static int __devinit da9052_i2c_probe(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> 	i2c_set_clientdata(client, da9052);</div><div class='ctx'> </div><div class='del'>-	da9052-&gt;regmap = regmap_init_i2c(client, &amp;da9052_regmap_config);</div><div class='add'>+	da9052-&gt;regmap = devm_regmap_init_i2c(client, &amp;da9052_regmap_config);</div><div class='ctx'> 	if (IS_ERR(da9052-&gt;regmap)) {</div><div class='ctx'> 		ret = PTR_ERR(da9052-&gt;regmap);</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "Failed to allocate register map: %d\n",</div><div class='ctx'> 			ret);</div><div class='del'>-		goto err;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = da9052_i2c_enable_multiwrite(da9052);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto err_regmap;</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+	if (!id) {</div><div class='add'>+		struct device_node *np = client-&gt;dev.of_node;</div><div class='add'>+		const struct of_device_id *deviceid;</div><div class='add'>+</div><div class='add'>+		deviceid = of_match_node(dialog_dt_ids, np);</div><div class='add'>+		id = (const struct i2c_device_id *)deviceid-&gt;data;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (!id) {</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "id is null.\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = da9052_device_init(da9052, id-&gt;driver_data);</div><div class='ctx'> 	if (ret != 0)</div><div class='del'>-		goto err_regmap;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err_regmap:</div><div class='del'>-	regmap_exit(da9052-&gt;regmap);</div><div class='del'>-err:</div><div class='del'>-	kfree(da9052);</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit da9052_i2c_remove(struct i2c_client *client)</div><div class='hunk'>@@ -94,20 +126,9 @@ static int __devexit da9052_i2c_remove(struct i2c_client *client)</div><div class='ctx'> 	struct da9052 *da9052 = i2c_get_clientdata(client);</div><div class='ctx'> </div><div class='ctx'> 	da9052_device_exit(da9052);</div><div class='del'>-	regmap_exit(da9052-&gt;regmap);</div><div class='del'>-	kfree(da9052);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct i2c_device_id da9052_i2c_id[] = {</div><div class='del'>-	{"da9052", DA9052},</div><div class='del'>-	{"da9053-aa", DA9053_AA},</div><div class='del'>-	{"da9053-ba", DA9053_BA},</div><div class='del'>-	{"da9053-bb", DA9053_BB},</div><div class='del'>-	{}</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct i2c_driver da9052_i2c_driver = {</div><div class='ctx'> 	.probe = da9052_i2c_probe,</div><div class='ctx'> 	.remove = __devexit_p(da9052_i2c_remove),</div><div class='hunk'>@@ -115,6 +136,9 @@ static struct i2c_driver da9052_i2c_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "da9052",</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+		.of_match_table = dialog_dt_ids,</div><div class='add'>+#endif</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/da9052-spi.c b/drivers/mfd/da9052-spi.c<br/>index 6faf149e8d94..dbeadc5a6436 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/da9052-spi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/da9052-spi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/da9052-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/da9052-spi.c</a></div><div class='hunk'>@@ -25,8 +25,9 @@ static int __devinit da9052_spi_probe(struct spi_device *spi)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	const struct spi_device_id *id = spi_get_device_id(spi);</div><div class='del'>-	struct da9052 *da9052 = kzalloc(sizeof(struct da9052), GFP_KERNEL);</div><div class='add'>+	struct da9052 *da9052;</div><div class='ctx'> </div><div class='add'>+	da9052 = devm_kzalloc(&amp;spi-&gt;dev, sizeof(struct da9052), GFP_KERNEL);</div><div class='ctx'> 	if (!da9052)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -42,25 +43,19 @@ static int __devinit da9052_spi_probe(struct spi_device *spi)</div><div class='ctx'> 	da9052_regmap_config.read_flag_mask = 1;</div><div class='ctx'> 	da9052_regmap_config.write_flag_mask = 0;</div><div class='ctx'> </div><div class='del'>-	da9052-&gt;regmap = regmap_init_spi(spi, &amp;da9052_regmap_config);</div><div class='add'>+	da9052-&gt;regmap = devm_regmap_init_spi(spi, &amp;da9052_regmap_config);</div><div class='ctx'> 	if (IS_ERR(da9052-&gt;regmap)) {</div><div class='ctx'> 		ret = PTR_ERR(da9052-&gt;regmap);</div><div class='ctx'> 		dev_err(&amp;spi-&gt;dev, "Failed to allocate register map: %d\n",</div><div class='ctx'> 			ret);</div><div class='del'>-		goto err;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = da9052_device_init(da9052, id-&gt;driver_data);</div><div class='ctx'> 	if (ret != 0)</div><div class='del'>-		goto err_regmap;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err_regmap:</div><div class='del'>-	regmap_exit(da9052-&gt;regmap);</div><div class='del'>-err:</div><div class='del'>-	kfree(da9052);</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit da9052_spi_remove(struct spi_device *spi)</div><div class='hunk'>@@ -68,9 +63,6 @@ static int __devexit da9052_spi_remove(struct spi_device *spi)</div><div class='ctx'> 	struct da9052 *da9052 = dev_get_drvdata(&amp;spi-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	da9052_device_exit(da9052);</div><div class='del'>-	regmap_exit(da9052-&gt;regmap);</div><div class='del'>-	kfree(da9052);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -88,7 +80,6 @@ static struct spi_driver da9052_spi_driver = {</div><div class='ctx'> 	.id_table = da9052_spi_id,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "da9052",</div><div class='del'>-		.bus = &amp;spi_bus_type,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/mfd/db5500-prcmu.c b/drivers/mfd/db5500-prcmu.c<br/>deleted file mode 100644<br/>index bb115b2f04e9..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/db5500-prcmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/db5500-prcmu.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,451 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson SA 2010</div><div class='del'>- *</div><div class='del'>- * License Terms: GNU General Public License v2</div><div class='del'>- * Author: Mattias Nilsson &lt;mattias.i.nilsson@stericsson.com&gt;</div><div class='del'>- *</div><div class='del'>- * U5500 PRCM Unit interface driver</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/completion.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/mfd/dbx500-prcmu.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/irqs.h&gt;</div><div class='del'>-#include &lt;mach/db5500-regs.h&gt;</div><div class='del'>-#include "dbx500-prcmu-regs.h"</div><div class='del'>-</div><div class='del'>-#define _PRCM_MB_HEADER (tcdm_base + 0xFE8)</div><div class='del'>-#define PRCM_REQ_MB0_HEADER (_PRCM_MB_HEADER + 0x0)</div><div class='del'>-#define PRCM_REQ_MB1_HEADER (_PRCM_MB_HEADER + 0x1)</div><div class='del'>-#define PRCM_REQ_MB2_HEADER (_PRCM_MB_HEADER + 0x2)</div><div class='del'>-#define PRCM_REQ_MB3_HEADER (_PRCM_MB_HEADER + 0x3)</div><div class='del'>-#define PRCM_REQ_MB4_HEADER (_PRCM_MB_HEADER + 0x4)</div><div class='del'>-#define PRCM_REQ_MB5_HEADER (_PRCM_MB_HEADER + 0x5)</div><div class='del'>-#define PRCM_REQ_MB6_HEADER (_PRCM_MB_HEADER + 0x6)</div><div class='del'>-#define PRCM_REQ_MB7_HEADER (_PRCM_MB_HEADER + 0x7)</div><div class='del'>-#define PRCM_ACK_MB0_HEADER (_PRCM_MB_HEADER + 0x8)</div><div class='del'>-#define PRCM_ACK_MB1_HEADER (_PRCM_MB_HEADER + 0x9)</div><div class='del'>-#define PRCM_ACK_MB2_HEADER (_PRCM_MB_HEADER + 0xa)</div><div class='del'>-#define PRCM_ACK_MB3_HEADER (_PRCM_MB_HEADER + 0xb)</div><div class='del'>-#define PRCM_ACK_MB4_HEADER (_PRCM_MB_HEADER + 0xc)</div><div class='del'>-#define PRCM_ACK_MB5_HEADER (_PRCM_MB_HEADER + 0xd)</div><div class='del'>-#define PRCM_ACK_MB6_HEADER (_PRCM_MB_HEADER + 0xe)</div><div class='del'>-#define PRCM_ACK_MB7_HEADER (_PRCM_MB_HEADER + 0xf)</div><div class='del'>-</div><div class='del'>-/* Req Mailboxes */</div><div class='del'>-#define PRCM_REQ_MB0 (tcdm_base + 0xFD8)</div><div class='del'>-#define PRCM_REQ_MB1 (tcdm_base + 0xFCC)</div><div class='del'>-#define PRCM_REQ_MB2 (tcdm_base + 0xFC4)</div><div class='del'>-#define PRCM_REQ_MB3 (tcdm_base + 0xFC0)</div><div class='del'>-#define PRCM_REQ_MB4 (tcdm_base + 0xF98)</div><div class='del'>-#define PRCM_REQ_MB5 (tcdm_base + 0xF90)</div><div class='del'>-#define PRCM_REQ_MB6 (tcdm_base + 0xF8C)</div><div class='del'>-#define PRCM_REQ_MB7 (tcdm_base + 0xF84)</div><div class='del'>-</div><div class='del'>-/* Ack Mailboxes */</div><div class='del'>-#define PRCM_ACK_MB0 (tcdm_base + 0xF38)</div><div class='del'>-#define PRCM_ACK_MB1 (tcdm_base + 0xF30)</div><div class='del'>-#define PRCM_ACK_MB2 (tcdm_base + 0xF24)</div><div class='del'>-#define PRCM_ACK_MB3 (tcdm_base + 0xF20)</div><div class='del'>-#define PRCM_ACK_MB4 (tcdm_base + 0xF1C)</div><div class='del'>-#define PRCM_ACK_MB5 (tcdm_base + 0xF14)</div><div class='del'>-#define PRCM_ACK_MB6 (tcdm_base + 0xF0C)</div><div class='del'>-#define PRCM_ACK_MB7 (tcdm_base + 0xF08)</div><div class='del'>-</div><div class='del'>-enum mb_return_code {</div><div class='del'>-	RC_SUCCESS,</div><div class='del'>-	RC_FAIL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Mailbox 0 headers. */</div><div class='del'>-enum mb0_header {</div><div class='del'>-	/* request */</div><div class='del'>-	RMB0H_PWR_STATE_TRANS = 1,</div><div class='del'>-	RMB0H_WAKE_UP_CFG,</div><div class='del'>-	RMB0H_RD_WAKE_UP_ACK,</div><div class='del'>-	/* acknowledge */</div><div class='del'>-	AMB0H_WAKE_UP = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Mailbox 5 headers. */</div><div class='del'>-enum mb5_header {</div><div class='del'>-	MB5H_I2C_WRITE = 1,</div><div class='del'>-	MB5H_I2C_READ,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Request mailbox 5 fields. */</div><div class='del'>-#define PRCM_REQ_MB5_I2C_SLAVE (PRCM_REQ_MB5 + 0)</div><div class='del'>-#define PRCM_REQ_MB5_I2C_REG (PRCM_REQ_MB5 + 1)</div><div class='del'>-#define PRCM_REQ_MB5_I2C_SIZE (PRCM_REQ_MB5 + 2)</div><div class='del'>-#define PRCM_REQ_MB5_I2C_DATA (PRCM_REQ_MB5 + 4)</div><div class='del'>-</div><div class='del'>-/* Acknowledge mailbox 5 fields. */</div><div class='del'>-#define PRCM_ACK_MB5_RETURN_CODE (PRCM_ACK_MB5 + 0)</div><div class='del'>-#define PRCM_ACK_MB5_I2C_DATA (PRCM_ACK_MB5 + 4)</div><div class='del'>-</div><div class='del'>-#define NUM_MB 8</div><div class='del'>-#define MBOX_BIT BIT</div><div class='del'>-#define ALL_MBOX_BITS (MBOX_BIT(NUM_MB) - 1)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-* Used by MCDE to setup all necessary PRCMU registers</div><div class='del'>-*/</div><div class='del'>-#define PRCMU_RESET_DSIPLL			0x00004000</div><div class='del'>-#define PRCMU_UNCLAMP_DSIPLL			0x00400800</div><div class='del'>-</div><div class='del'>-/* HDMI CLK MGT PLLSW=001 (PLLSOC0), PLLDIV=0x8, = 50 Mhz*/</div><div class='del'>-#define PRCMU_DSI_CLOCK_SETTING			0x00000128</div><div class='del'>-/* TVCLK_MGT PLLSW=001 (PLLSOC0) PLLDIV=0x13, = 19.05 MHZ */</div><div class='del'>-#define PRCMU_DSI_LP_CLOCK_SETTING		0x00000135</div><div class='del'>-#define PRCMU_PLLDSI_FREQ_SETTING		0x00020121</div><div class='del'>-#define PRCMU_DSI_PLLOUT_SEL_SETTING		0x00000002</div><div class='del'>-#define PRCMU_ENABLE_ESCAPE_CLOCK_DIV		0x03000201</div><div class='del'>-#define PRCMU_DISABLE_ESCAPE_CLOCK_DIV		0x00000101</div><div class='del'>-</div><div class='del'>-#define PRCMU_ENABLE_PLLDSI			0x00000001</div><div class='del'>-#define PRCMU_DISABLE_PLLDSI			0x00000000</div><div class='del'>-</div><div class='del'>-#define PRCMU_DSI_RESET_SW			0x00000003</div><div class='del'>-#define PRCMU_RESOUTN0_PIN			0x00000001</div><div class='del'>-#define PRCMU_RESOUTN1_PIN			0x00000002</div><div class='del'>-#define PRCMU_RESOUTN2_PIN			0x00000004</div><div class='del'>-</div><div class='del'>-#define PRCMU_PLLDSI_LOCKP_LOCKED		0x3</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * mb0_transfer - state needed for mailbox 0 communication.</div><div class='del'>- * @lock:		The transaction lock.</div><div class='del'>- */</div><div class='del'>-static struct {</div><div class='del'>-	spinlock_t lock;</div><div class='del'>-} mb0_transfer;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * mb5_transfer - state needed for mailbox 5 communication.</div><div class='del'>- * @lock:	The transaction lock.</div><div class='del'>- * @work:	The transaction completion structure.</div><div class='del'>- * @ack:	Reply ("acknowledge") data.</div><div class='del'>- */</div><div class='del'>-static struct {</div><div class='del'>-	struct mutex lock;</div><div class='del'>-	struct completion work;</div><div class='del'>-	struct {</div><div class='del'>-		u8 header;</div><div class='del'>-		u8 status;</div><div class='del'>-		u8 value[4];</div><div class='del'>-	} ack;</div><div class='del'>-} mb5_transfer;</div><div class='del'>-</div><div class='del'>-/* PRCMU TCDM base IO address. */</div><div class='del'>-static __iomem void *tcdm_base;</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * db5500_prcmu_abb_read() - Read register value(s) from the ABB.</div><div class='del'>- * @slave:	The I2C slave address.</div><div class='del'>- * @reg:	The (start) register address.</div><div class='del'>- * @value:	The read out value(s).</div><div class='del'>- * @size:	The number of registers to read.</div><div class='del'>- *</div><div class='del'>- * Reads register value(s) from the ABB.</div><div class='del'>- * @size has to be &lt;= 4.</div><div class='del'>- */</div><div class='del'>-int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size)</div><div class='del'>-{</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	if ((size &lt; 1) || (4 &lt; size))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;mb5_transfer.lock);</div><div class='del'>-</div><div class='del'>-	while (readl(PRCM_MBOX_CPU_VAL) &amp; MBOX_BIT(5))</div><div class='del'>-		cpu_relax();</div><div class='del'>-	writeb(slave, PRCM_REQ_MB5_I2C_SLAVE);</div><div class='del'>-	writeb(reg, PRCM_REQ_MB5_I2C_REG);</div><div class='del'>-	writeb(size, PRCM_REQ_MB5_I2C_SIZE);</div><div class='del'>-	writeb(MB5H_I2C_READ, PRCM_REQ_MB5_HEADER);</div><div class='del'>-</div><div class='del'>-	writel(MBOX_BIT(5), PRCM_MBOX_CPU_SET);</div><div class='del'>-	wait_for_completion(&amp;mb5_transfer.work);</div><div class='del'>-</div><div class='del'>-	r = 0;</div><div class='del'>-	if ((mb5_transfer.ack.header == MB5H_I2C_READ) &amp;&amp;</div><div class='del'>-		(mb5_transfer.ack.status == RC_SUCCESS))</div><div class='del'>-		memcpy(value, mb5_transfer.ack.value, (size_t)size);</div><div class='del'>-	else</div><div class='del'>-		r = -EIO;</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;mb5_transfer.lock);</div><div class='del'>-</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * db5500_prcmu_abb_write() - Write register value(s) to the ABB.</div><div class='del'>- * @slave:	The I2C slave address.</div><div class='del'>- * @reg:	The (start) register address.</div><div class='del'>- * @value:	The value(s) to write.</div><div class='del'>- * @size:	The number of registers to write.</div><div class='del'>- *</div><div class='del'>- * Writes register value(s) to the ABB.</div><div class='del'>- * @size has to be &lt;= 4.</div><div class='del'>- */</div><div class='del'>-int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size)</div><div class='del'>-{</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	if ((size &lt; 1) || (4 &lt; size))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;mb5_transfer.lock);</div><div class='del'>-</div><div class='del'>-	while (readl(PRCM_MBOX_CPU_VAL) &amp; MBOX_BIT(5))</div><div class='del'>-		cpu_relax();</div><div class='del'>-	writeb(slave, PRCM_REQ_MB5_I2C_SLAVE);</div><div class='del'>-	writeb(reg, PRCM_REQ_MB5_I2C_REG);</div><div class='del'>-	writeb(size, PRCM_REQ_MB5_I2C_SIZE);</div><div class='del'>-	memcpy_toio(PRCM_REQ_MB5_I2C_DATA, value, size);</div><div class='del'>-	writeb(MB5H_I2C_WRITE, PRCM_REQ_MB5_HEADER);</div><div class='del'>-</div><div class='del'>-	writel(MBOX_BIT(5), PRCM_MBOX_CPU_SET);</div><div class='del'>-	wait_for_completion(&amp;mb5_transfer.work);</div><div class='del'>-</div><div class='del'>-	if ((mb5_transfer.ack.header == MB5H_I2C_WRITE) &amp;&amp;</div><div class='del'>-		(mb5_transfer.ack.status == RC_SUCCESS))</div><div class='del'>-		r = 0;</div><div class='del'>-	else</div><div class='del'>-		r = -EIO;</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;mb5_transfer.lock);</div><div class='del'>-</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int db5500_prcmu_enable_dsipll(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Enable DSIPLL_RESETN resets */</div><div class='del'>-	writel(PRCMU_RESET_DSIPLL, PRCM_APE_RESETN_CLR);</div><div class='del'>-	/* Unclamp DSIPLL in/out */</div><div class='del'>-	writel(PRCMU_UNCLAMP_DSIPLL, PRCM_MMIP_LS_CLAMP_CLR);</div><div class='del'>-	/* Set DSI PLL FREQ */</div><div class='del'>-	writel(PRCMU_PLLDSI_FREQ_SETTING, PRCM_PLLDSI_FREQ);</div><div class='del'>-	writel(PRCMU_DSI_PLLOUT_SEL_SETTING,</div><div class='del'>-		PRCM_DSI_PLLOUT_SEL);</div><div class='del'>-	/* Enable Escape clocks */</div><div class='del'>-	writel(PRCMU_ENABLE_ESCAPE_CLOCK_DIV, PRCM_DSITVCLK_DIV);</div><div class='del'>-</div><div class='del'>-	/* Start DSI PLL */</div><div class='del'>-	writel(PRCMU_ENABLE_PLLDSI, PRCM_PLLDSI_ENABLE);</div><div class='del'>-	/* Reset DSI PLL */</div><div class='del'>-	writel(PRCMU_DSI_RESET_SW, PRCM_DSI_SW_RESET);</div><div class='del'>-	for (i = 0; i &lt; 10; i++) {</div><div class='del'>-		if ((readl(PRCM_PLLDSI_LOCKP) &amp;</div><div class='del'>-			PRCMU_PLLDSI_LOCKP_LOCKED) == PRCMU_PLLDSI_LOCKP_LOCKED)</div><div class='del'>-			break;</div><div class='del'>-		udelay(100);</div><div class='del'>-	}</div><div class='del'>-	/* Release DSIPLL_RESETN */</div><div class='del'>-	writel(PRCMU_RESET_DSIPLL, PRCM_APE_RESETN_SET);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int db5500_prcmu_disable_dsipll(void)</div><div class='del'>-{</div><div class='del'>-	/* Disable dsi pll */</div><div class='del'>-	writel(PRCMU_DISABLE_PLLDSI, PRCM_PLLDSI_ENABLE);</div><div class='del'>-	/* Disable  escapeclock */</div><div class='del'>-	writel(PRCMU_DISABLE_ESCAPE_CLOCK_DIV, PRCM_DSITVCLK_DIV);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int db5500_prcmu_set_display_clocks(void)</div><div class='del'>-{</div><div class='del'>-	/* HDMI and TVCLK Should be handled somewhere else */</div><div class='del'>-	/* PLLDIV=8, PLLSW=2, CLKEN=1 */</div><div class='del'>-	writel(PRCMU_DSI_CLOCK_SETTING, PRCM_HDMICLK_MGT);</div><div class='del'>-	/* PLLDIV=14, PLLSW=2, CLKEN=1 */</div><div class='del'>-	writel(PRCMU_DSI_LP_CLOCK_SETTING, PRCM_TVCLK_MGT);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ack_dbb_wakeup(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mb0_transfer.lock, flags);</div><div class='del'>-</div><div class='del'>-	while (readl(PRCM_MBOX_CPU_VAL) &amp; MBOX_BIT(0))</div><div class='del'>-		cpu_relax();</div><div class='del'>-</div><div class='del'>-	writeb(RMB0H_RD_WAKE_UP_ACK, PRCM_REQ_MB0_HEADER);</div><div class='del'>-	writel(MBOX_BIT(0), PRCM_MBOX_CPU_SET);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;mb0_transfer.lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void print_unknown_header_warning(u8 n, u8 header)</div><div class='del'>-{</div><div class='del'>-	pr_warning("prcmu: Unknown message header (%d) in mailbox %d.\n",</div><div class='del'>-		header, n);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool read_mailbox_0(void)</div><div class='del'>-{</div><div class='del'>-	bool r;</div><div class='del'>-	u8 header;</div><div class='del'>-</div><div class='del'>-	header = readb(PRCM_ACK_MB0_HEADER);</div><div class='del'>-	switch (header) {</div><div class='del'>-	case AMB0H_WAKE_UP:</div><div class='del'>-		r = true;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		print_unknown_header_warning(0, header);</div><div class='del'>-		r = false;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	writel(MBOX_BIT(0), PRCM_ARM_IT1_CLR);</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool read_mailbox_1(void)</div><div class='del'>-{</div><div class='del'>-	writel(MBOX_BIT(1), PRCM_ARM_IT1_CLR);</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool read_mailbox_2(void)</div><div class='del'>-{</div><div class='del'>-	writel(MBOX_BIT(2), PRCM_ARM_IT1_CLR);</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool read_mailbox_3(void)</div><div class='del'>-{</div><div class='del'>-	writel(MBOX_BIT(3), PRCM_ARM_IT1_CLR);</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool read_mailbox_4(void)</div><div class='del'>-{</div><div class='del'>-	writel(MBOX_BIT(4), PRCM_ARM_IT1_CLR);</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool read_mailbox_5(void)</div><div class='del'>-{</div><div class='del'>-	u8 header;</div><div class='del'>-</div><div class='del'>-	header = readb(PRCM_ACK_MB5_HEADER);</div><div class='del'>-	switch (header) {</div><div class='del'>-	case MB5H_I2C_READ:</div><div class='del'>-		memcpy_fromio(mb5_transfer.ack.value, PRCM_ACK_MB5_I2C_DATA, 4);</div><div class='del'>-	case MB5H_I2C_WRITE:</div><div class='del'>-		mb5_transfer.ack.header = header;</div><div class='del'>-		mb5_transfer.ack.status = readb(PRCM_ACK_MB5_RETURN_CODE);</div><div class='del'>-		complete(&amp;mb5_transfer.work);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		print_unknown_header_warning(5, header);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	writel(MBOX_BIT(5), PRCM_ARM_IT1_CLR);</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool read_mailbox_6(void)</div><div class='del'>-{</div><div class='del'>-	writel(MBOX_BIT(6), PRCM_ARM_IT1_CLR);</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool read_mailbox_7(void)</div><div class='del'>-{</div><div class='del'>-	writel(MBOX_BIT(7), PRCM_ARM_IT1_CLR);</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool (* const read_mailbox[NUM_MB])(void) = {</div><div class='del'>-	read_mailbox_0,</div><div class='del'>-	read_mailbox_1,</div><div class='del'>-	read_mailbox_2,</div><div class='del'>-	read_mailbox_3,</div><div class='del'>-	read_mailbox_4,</div><div class='del'>-	read_mailbox_5,</div><div class='del'>-	read_mailbox_6,</div><div class='del'>-	read_mailbox_7</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static irqreturn_t prcmu_irq_handler(int irq, void *data)</div><div class='del'>-{</div><div class='del'>-	u32 bits;</div><div class='del'>-	u8 n;</div><div class='del'>-	irqreturn_t r;</div><div class='del'>-</div><div class='del'>-	bits = (readl(PRCM_ARM_IT1_VAL) &amp; ALL_MBOX_BITS);</div><div class='del'>-	if (unlikely(!bits))</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-</div><div class='del'>-	r = IRQ_HANDLED;</div><div class='del'>-	for (n = 0; bits; n++) {</div><div class='del'>-		if (bits &amp; MBOX_BIT(n)) {</div><div class='del'>-			bits -= MBOX_BIT(n);</div><div class='del'>-			if (read_mailbox[n]())</div><div class='del'>-				r = IRQ_WAKE_THREAD;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t prcmu_irq_thread_fn(int irq, void *data)</div><div class='del'>-{</div><div class='del'>-	ack_dbb_wakeup();</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __init db5500_prcmu_early_init(void)</div><div class='del'>-{</div><div class='del'>-	tcdm_base = __io_address(U5500_PRCMU_TCDM_BASE);</div><div class='del'>-	spin_lock_init(&amp;mb0_transfer.lock);</div><div class='del'>-	mutex_init(&amp;mb5_transfer.lock);</div><div class='del'>-	init_completion(&amp;mb5_transfer.work);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * prcmu_fw_init - arch init call for the Linux PRCMU fw init logic</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-int __init db5500_prcmu_init(void)</div><div class='del'>-{</div><div class='del'>-	int r = 0;</div><div class='del'>-</div><div class='del'>-	if (ux500_is_svp() || !cpu_is_u5500())</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	/* Clean up the mailbox interrupts after pre-kernel code. */</div><div class='del'>-	writel(ALL_MBOX_BITS, PRCM_ARM_IT1_CLR);</div><div class='del'>-</div><div class='del'>-	r = request_threaded_irq(IRQ_DB5500_PRCMU1, prcmu_irq_handler,</div><div class='del'>-		prcmu_irq_thread_fn, 0, "prcmu", NULL);</div><div class='del'>-	if (r &lt; 0) {</div><div class='del'>-		pr_err("prcmu: Failed to allocate IRQ_DB5500_PRCMU1.\n");</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-arch_initcall(db5500_prcmu_init);</div><div class='head'>diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c<br/>index 5be32489714f..50e83dc5dc49 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/db8500-prcmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/db8500-prcmu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/db8500-prcmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/db8500-prcmu.c</a></div><div class='hunk'>@@ -2720,6 +2720,7 @@ static struct regulator_consumer_supply db8500_vape_consumers[] = {</div><div class='ctx'> 	REGULATOR_SUPPLY("v-i2c", "nmk-i2c.1"),</div><div class='ctx'> 	REGULATOR_SUPPLY("v-i2c", "nmk-i2c.2"),</div><div class='ctx'> 	REGULATOR_SUPPLY("v-i2c", "nmk-i2c.3"),</div><div class='add'>+	REGULATOR_SUPPLY("v-i2c", "nmk-i2c.4"),</div><div class='ctx'> 	/* "v-mmc" changed to "vcore" in the mainline kernel */</div><div class='ctx'> 	REGULATOR_SUPPLY("vcore", "sdi0"),</div><div class='ctx'> 	REGULATOR_SUPPLY("vcore", "sdi1"),</div><div class='hunk'>@@ -2734,6 +2735,7 @@ static struct regulator_consumer_supply db8500_vape_consumers[] = {</div><div class='ctx'> 	REGULATOR_SUPPLY("vcore", "uart2"),</div><div class='ctx'> 	REGULATOR_SUPPLY("v-ape", "nmk-ske-keypad.0"),</div><div class='ctx'> 	REGULATOR_SUPPLY("v-hsi", "ste_hsi.0"),</div><div class='add'>+	REGULATOR_SUPPLY("vddvario", "smsc911x.0"),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_consumer_supply db8500_vsmps2_consumers[] = {</div><div class='hunk'>@@ -2958,9 +2960,10 @@ static struct mfd_cell db8500_prcmu_devs[] = {</div><div class='ctx'>  * prcmu_fw_init - arch init call for the Linux PRCMU fw init logic</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-static int __init db8500_prcmu_probe(struct platform_device *pdev)</div><div class='add'>+static int __devinit db8500_prcmu_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	int err = 0;</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	int irq = 0, err = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (ux500_is_svp())</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -2970,8 +2973,14 @@ static int __init db8500_prcmu_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* Clean up the mailbox interrupts after pre-kernel code. */</div><div class='ctx'> 	writel(ALL_MBOX_BITS, PRCM_ARM_IT1_CLR);</div><div class='ctx'> </div><div class='del'>-	err = request_threaded_irq(IRQ_DB8500_PRCMU1, prcmu_irq_handler,</div><div class='del'>-		prcmu_irq_thread_fn, IRQF_NO_SUSPEND, "prcmu", NULL);</div><div class='add'>+	if (np)</div><div class='add'>+		irq = platform_get_irq(pdev, 0);</div><div class='add'>+</div><div class='add'>+	if (!np || irq &lt;= 0)</div><div class='add'>+		irq = IRQ_DB8500_PRCMU1;</div><div class='add'>+</div><div class='add'>+	err = request_threaded_irq(irq, prcmu_irq_handler,</div><div class='add'>+	        prcmu_irq_thread_fn, IRQF_NO_SUSPEND, "prcmu", NULL);</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='ctx'> 		pr_err("prcmu: Failed to allocate IRQ_DB8500_PRCMU1.\n");</div><div class='ctx'> 		err = -EBUSY;</div><div class='hunk'>@@ -2981,14 +2990,16 @@ static int __init db8500_prcmu_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (cpu_is_u8500v20_or_later())</div><div class='ctx'> 		prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET);</div><div class='ctx'> </div><div class='del'>-	err = mfd_add_devices(&amp;pdev-&gt;dev, 0, db8500_prcmu_devs,</div><div class='del'>-			      ARRAY_SIZE(db8500_prcmu_devs), NULL,</div><div class='del'>-			      0);</div><div class='add'>+	if (!np) {</div><div class='add'>+		err = mfd_add_devices(&amp;pdev-&gt;dev, 0, db8500_prcmu_devs,</div><div class='add'>+				ARRAY_SIZE(db8500_prcmu_devs), NULL, 0);</div><div class='add'>+		if (err) {</div><div class='add'>+			pr_err("prcmu: Failed to add subdevices\n");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (err)</div><div class='del'>-		pr_err("prcmu: Failed to add subdevices\n");</div><div class='del'>-	else</div><div class='del'>-		pr_info("DB8500 PRCMU initialized\n");</div><div class='add'>+	pr_info("DB8500 PRCMU initialized\n");</div><div class='ctx'> </div><div class='ctx'> no_irq_return:</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -2999,11 +3010,12 @@ static struct platform_driver db8500_prcmu_driver = {</div><div class='ctx'> 		.name = "db8500-prcmu",</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 	},</div><div class='add'>+	.probe = db8500_prcmu_probe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init db8500_prcmu_init(void)</div><div class='ctx'> {</div><div class='del'>-	return platform_driver_probe(&amp;db8500_prcmu_driver, db8500_prcmu_probe);</div><div class='add'>+	return platform_driver_register(&amp;db8500_prcmu_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> arch_initcall(db8500_prcmu_init);</div><div class='head'>diff --git a/drivers/mfd/intel_msic.c b/drivers/mfd/intel_msic.c<br/>index b76657eb0c51..59df5584cb58 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/intel_msic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/intel_msic.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/intel_msic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/intel_msic.c</a></div><div class='hunk'>@@ -406,7 +406,7 @@ static int __devinit intel_msic_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	msic = kzalloc(sizeof(*msic), GFP_KERNEL);</div><div class='add'>+	msic = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*msic), GFP_KERNEL);</div><div class='ctx'> 	if (!msic)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -421,21 +421,13 @@ static int __devinit intel_msic_probe(struct platform_device *pdev)</div><div class='ctx'> 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	if (!res) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to get SRAM iomem resource\n");</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto fail_free_msic;</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	res = request_mem_region(res-&gt;start, resource_size(res), pdev-&gt;name);</div><div class='del'>-	if (!res) {</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto fail_free_msic;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	msic-&gt;irq_base = ioremap_nocache(res-&gt;start, resource_size(res));</div><div class='add'>+	msic-&gt;irq_base = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='ctx'> 	if (!msic-&gt;irq_base) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to map SRAM memory\n");</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto fail_release_region;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, msic);</div><div class='hunk'>@@ -443,7 +435,7 @@ static int __devinit intel_msic_probe(struct platform_device *pdev)</div><div class='ctx'> 	ret = intel_msic_init_devices(msic);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to initialize MSIC devices\n");</div><div class='del'>-		goto fail_unmap_mem;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "Intel MSIC version %c%d (vendor %#x)\n",</div><div class='hunk'>@@ -451,27 +443,14 @@ static int __devinit intel_msic_probe(struct platform_device *pdev)</div><div class='ctx'> 		 msic-&gt;vendor);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-fail_unmap_mem:</div><div class='del'>-	iounmap(msic-&gt;irq_base);</div><div class='del'>-fail_release_region:</div><div class='del'>-	release_mem_region(res-&gt;start, resource_size(res));</div><div class='del'>-fail_free_msic:</div><div class='del'>-	kfree(msic);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit intel_msic_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_msic *msic = platform_get_drvdata(pdev);</div><div class='del'>-	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> </div><div class='ctx'> 	intel_msic_remove_devices(msic);</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='del'>-	iounmap(msic-&gt;irq_base);</div><div class='del'>-	release_mem_region(res-&gt;start, resource_size(res));</div><div class='del'>-	kfree(msic);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/mfd/janz-cmodio.c b/drivers/mfd/janz-cmodio.c<br/>index a9223ed1b7c5..2ea99989551a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/janz-cmodio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/janz-cmodio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/janz-cmodio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/janz-cmodio.c</a></div><div class='hunk'>@@ -283,23 +283,8 @@ static struct pci_driver cmodio_pci_driver = {</div><div class='ctx'> 	.remove   = __devexit_p(cmodio_pci_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Module Init / Exit</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init cmodio_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;cmodio_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit cmodio_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;cmodio_pci_driver);</div><div class='del'>-}</div><div class='add'>+module_pci_driver(cmodio_pci_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Ira W. Snyder &lt;iws@ovro.caltech.edu&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Janz CMOD-IO PCI MODULbus Carrier Board Driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-module_init(cmodio_init);</div><div class='del'>-module_exit(cmodio_exit);</div><div class='head'>diff --git a/drivers/mfd/lm3533-core.c b/drivers/mfd/lm3533-core.c<br/>new file mode 100644<br/>index 000000000000..0b2879b87fd9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/lm3533-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/lm3533-core.c</a></div><div class='hunk'>@@ -0,0 +1,667 @@</div><div class='add'>+/*</div><div class='add'>+ * lm3533-core.c -- LM3533 Core</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2012 Texas Instruments</div><div class='add'>+ *</div><div class='add'>+ * Author: Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under  the terms of the GNU General  Public License as published by the</div><div class='add'>+ * Free Software Foundation;  either version 2 of the License, or (at your</div><div class='add'>+ * option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/mfd/core.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mfd/lm3533.h&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define LM3533_BOOST_OVP_MASK		0x06</div><div class='add'>+#define LM3533_BOOST_OVP_SHIFT		1</div><div class='add'>+</div><div class='add'>+#define LM3533_BOOST_FREQ_MASK		0x01</div><div class='add'>+#define LM3533_BOOST_FREQ_SHIFT		0</div><div class='add'>+</div><div class='add'>+#define LM3533_BL_ID_MASK		1</div><div class='add'>+#define LM3533_LED_ID_MASK		3</div><div class='add'>+#define LM3533_BL_ID_MAX		1</div><div class='add'>+#define LM3533_LED_ID_MAX		3</div><div class='add'>+</div><div class='add'>+#define LM3533_HVLED_ID_MAX		2</div><div class='add'>+#define LM3533_LVLED_ID_MAX		5</div><div class='add'>+</div><div class='add'>+#define LM3533_REG_OUTPUT_CONF1		0x10</div><div class='add'>+#define LM3533_REG_OUTPUT_CONF2		0x11</div><div class='add'>+#define LM3533_REG_BOOST_PWM		0x2c</div><div class='add'>+</div><div class='add'>+#define LM3533_REG_MAX			0xb2</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static struct mfd_cell lm3533_als_devs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name	= "lm3533-als",</div><div class='add'>+		.id	= -1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mfd_cell lm3533_bl_devs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name	= "lm3533-backlight",</div><div class='add'>+		.id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= "lm3533-backlight",</div><div class='add'>+		.id	= 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mfd_cell lm3533_led_devs[] = {</div><div class='add'>+	{</div><div class='add'>+		.name	= "lm3533-leds",</div><div class='add'>+		.id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= "lm3533-leds",</div><div class='add'>+		.id	= 1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= "lm3533-leds",</div><div class='add'>+		.id	= 2,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name	= "lm3533-leds",</div><div class='add'>+		.id	= 3,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int lm3533_read(struct lm3533 *lm3533, u8 reg, u8 *val)</div><div class='add'>+{</div><div class='add'>+	int tmp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(lm3533-&gt;regmap, reg, &amp;tmp);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(lm3533-&gt;dev, "failed to read register %02x: %d\n",</div><div class='add'>+								reg, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*val = tmp;</div><div class='add'>+</div><div class='add'>+	dev_dbg(lm3533-&gt;dev, "read [%02x]: %02x\n", reg, *val);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(lm3533_read);</div><div class='add'>+</div><div class='add'>+int lm3533_write(struct lm3533 *lm3533, u8 reg, u8 val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(lm3533-&gt;dev, "write [%02x]: %02x\n", reg, val);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(lm3533-&gt;regmap, reg, val);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(lm3533-&gt;dev, "failed to write register %02x: %d\n",</div><div class='add'>+								reg, ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(lm3533_write);</div><div class='add'>+</div><div class='add'>+int lm3533_update(struct lm3533 *lm3533, u8 reg, u8 val, u8 mask)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(lm3533-&gt;dev, "update [%02x]: %02x/%02x\n", reg, val, mask);</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(lm3533-&gt;regmap, reg, mask, val);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(lm3533-&gt;dev, "failed to update register %02x: %d\n",</div><div class='add'>+								reg, ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(lm3533_update);</div><div class='add'>+</div><div class='add'>+static int lm3533_set_boost_freq(struct lm3533 *lm3533,</div><div class='add'>+						enum lm3533_boost_freq freq)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_update(lm3533, LM3533_REG_BOOST_PWM,</div><div class='add'>+					freq &lt;&lt; LM3533_BOOST_FREQ_SHIFT,</div><div class='add'>+					LM3533_BOOST_FREQ_MASK);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(lm3533-&gt;dev, "failed to set boost frequency\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int lm3533_set_boost_ovp(struct lm3533 *lm3533,</div><div class='add'>+						enum lm3533_boost_ovp ovp)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_update(lm3533, LM3533_REG_BOOST_PWM,</div><div class='add'>+					ovp &lt;&lt; LM3533_BOOST_OVP_SHIFT,</div><div class='add'>+					LM3533_BOOST_OVP_MASK);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(lm3533-&gt;dev, "failed to set boost ovp\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * HVLED output config -- output hvled controlled by backlight bl</div><div class='add'>+ */</div><div class='add'>+static int lm3533_set_hvled_config(struct lm3533 *lm3533, u8 hvled, u8 bl)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+	u8 mask;</div><div class='add'>+	int shift;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (hvled == 0 || hvled &gt; LM3533_HVLED_ID_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (bl &gt; LM3533_BL_ID_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	shift = hvled - 1;</div><div class='add'>+	mask = LM3533_BL_ID_MASK &lt;&lt; shift;</div><div class='add'>+	val = bl &lt;&lt; shift;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_update(lm3533, LM3533_REG_OUTPUT_CONF1, val, mask);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(lm3533-&gt;dev, "failed to set hvled config\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * LVLED output config -- output lvled controlled by LED led</div><div class='add'>+ */</div><div class='add'>+static int lm3533_set_lvled_config(struct lm3533 *lm3533, u8 lvled, u8 led)</div><div class='add'>+{</div><div class='add'>+	u8 reg;</div><div class='add'>+	u8 val;</div><div class='add'>+	u8 mask;</div><div class='add'>+	int shift;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (lvled == 0 || lvled &gt; LM3533_LVLED_ID_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (led &gt; LM3533_LED_ID_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (lvled &lt; 4) {</div><div class='add'>+		reg = LM3533_REG_OUTPUT_CONF1;</div><div class='add'>+		shift = 2 * lvled;</div><div class='add'>+	} else {</div><div class='add'>+		reg = LM3533_REG_OUTPUT_CONF2;</div><div class='add'>+		shift = 2 * (lvled - 4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mask = LM3533_LED_ID_MASK &lt;&lt; shift;</div><div class='add'>+	val = led &lt;&lt; shift;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_update(lm3533, reg, val, mask);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(lm3533-&gt;dev, "failed to set lvled config\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lm3533_enable(struct lm3533 *lm3533)</div><div class='add'>+{</div><div class='add'>+	if (gpio_is_valid(lm3533-&gt;gpio_hwen))</div><div class='add'>+		gpio_set_value(lm3533-&gt;gpio_hwen, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lm3533_disable(struct lm3533 *lm3533)</div><div class='add'>+{</div><div class='add'>+	if (gpio_is_valid(lm3533-&gt;gpio_hwen))</div><div class='add'>+		gpio_set_value(lm3533-&gt;gpio_hwen, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum lm3533_attribute_type {</div><div class='add'>+	LM3533_ATTR_TYPE_BACKLIGHT,</div><div class='add'>+	LM3533_ATTR_TYPE_LED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct lm3533_device_attribute {</div><div class='add'>+	struct device_attribute dev_attr;</div><div class='add'>+	enum lm3533_attribute_type type;</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u8 id;</div><div class='add'>+		} output;</div><div class='add'>+	} u;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define to_lm3533_dev_attr(_attr) \</div><div class='add'>+	container_of(_attr, struct lm3533_device_attribute, dev_attr)</div><div class='add'>+</div><div class='add'>+static ssize_t show_output(struct device *dev,</div><div class='add'>+				struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct lm3533 *lm3533 = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_device_attribute *lattr = to_lm3533_dev_attr(attr);</div><div class='add'>+	int id = lattr-&gt;u.output.id;</div><div class='add'>+	u8 reg;</div><div class='add'>+	u8 val;</div><div class='add'>+	u8 mask;</div><div class='add'>+	int shift;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (lattr-&gt;type == LM3533_ATTR_TYPE_BACKLIGHT) {</div><div class='add'>+		reg = LM3533_REG_OUTPUT_CONF1;</div><div class='add'>+		shift = id - 1;</div><div class='add'>+		mask = LM3533_BL_ID_MASK &lt;&lt; shift;</div><div class='add'>+	} else {</div><div class='add'>+		if (id &lt; 4) {</div><div class='add'>+			reg = LM3533_REG_OUTPUT_CONF1;</div><div class='add'>+			shift = 2 * id;</div><div class='add'>+		} else {</div><div class='add'>+			reg = LM3533_REG_OUTPUT_CONF2;</div><div class='add'>+			shift = 2 * (id - 4);</div><div class='add'>+		}</div><div class='add'>+		mask = LM3533_LED_ID_MASK &lt;&lt; shift;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = lm3533_read(lm3533, reg, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = (val &amp; mask) &gt;&gt; shift;</div><div class='add'>+</div><div class='add'>+	return scnprintf(buf, PAGE_SIZE, "%u\n", val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_output(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					const char *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct lm3533 *lm3533 = dev_get_drvdata(dev);</div><div class='add'>+	struct lm3533_device_attribute *lattr = to_lm3533_dev_attr(attr);</div><div class='add'>+	int id = lattr-&gt;u.output.id;</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (kstrtou8(buf, 0, &amp;val))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (lattr-&gt;type == LM3533_ATTR_TYPE_BACKLIGHT)</div><div class='add'>+		ret = lm3533_set_hvled_config(lm3533, id, val);</div><div class='add'>+	else</div><div class='add'>+		ret = lm3533_set_lvled_config(lm3533, id, val);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define LM3533_OUTPUT_ATTR(_name, _mode, _show, _store, _type, _id) \</div><div class='add'>+	struct lm3533_device_attribute lm3533_dev_attr_##_name = \</div><div class='add'>+		{ .dev_attr	= __ATTR(_name, _mode, _show, _store), \</div><div class='add'>+		  .type		= _type, \</div><div class='add'>+		  .u.output	= { .id = _id }, }</div><div class='add'>+</div><div class='add'>+#define LM3533_OUTPUT_ATTR_RW(_name, _type, _id) \</div><div class='add'>+	LM3533_OUTPUT_ATTR(output_##_name, S_IRUGO | S_IWUSR, \</div><div class='add'>+					show_output, store_output, _type, _id)</div><div class='add'>+</div><div class='add'>+#define LM3533_OUTPUT_HVLED_ATTR_RW(_nr) \</div><div class='add'>+	LM3533_OUTPUT_ATTR_RW(hvled##_nr, LM3533_ATTR_TYPE_BACKLIGHT, _nr)</div><div class='add'>+#define LM3533_OUTPUT_LVLED_ATTR_RW(_nr) \</div><div class='add'>+	LM3533_OUTPUT_ATTR_RW(lvled##_nr, LM3533_ATTR_TYPE_LED, _nr)</div><div class='add'>+/*</div><div class='add'>+ * Output config:</div><div class='add'>+ *</div><div class='add'>+ * output_hvled&lt;nr&gt;	0-1</div><div class='add'>+ * output_lvled&lt;nr&gt;	0-3</div><div class='add'>+ */</div><div class='add'>+static LM3533_OUTPUT_HVLED_ATTR_RW(1);</div><div class='add'>+static LM3533_OUTPUT_HVLED_ATTR_RW(2);</div><div class='add'>+static LM3533_OUTPUT_LVLED_ATTR_RW(1);</div><div class='add'>+static LM3533_OUTPUT_LVLED_ATTR_RW(2);</div><div class='add'>+static LM3533_OUTPUT_LVLED_ATTR_RW(3);</div><div class='add'>+static LM3533_OUTPUT_LVLED_ATTR_RW(4);</div><div class='add'>+static LM3533_OUTPUT_LVLED_ATTR_RW(5);</div><div class='add'>+</div><div class='add'>+static struct attribute *lm3533_attributes[] = {</div><div class='add'>+	&amp;lm3533_dev_attr_output_hvled1.dev_attr.attr,</div><div class='add'>+	&amp;lm3533_dev_attr_output_hvled2.dev_attr.attr,</div><div class='add'>+	&amp;lm3533_dev_attr_output_lvled1.dev_attr.attr,</div><div class='add'>+	&amp;lm3533_dev_attr_output_lvled2.dev_attr.attr,</div><div class='add'>+	&amp;lm3533_dev_attr_output_lvled3.dev_attr.attr,</div><div class='add'>+	&amp;lm3533_dev_attr_output_lvled4.dev_attr.attr,</div><div class='add'>+	&amp;lm3533_dev_attr_output_lvled5.dev_attr.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define to_dev_attr(_attr) \</div><div class='add'>+	container_of(_attr, struct device_attribute, attr)</div><div class='add'>+</div><div class='add'>+static umode_t lm3533_attr_is_visible(struct kobject *kobj,</div><div class='add'>+					     struct attribute *attr, int n)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = container_of(kobj, struct device, kobj);</div><div class='add'>+	struct lm3533 *lm3533 = dev_get_drvdata(dev);</div><div class='add'>+	struct device_attribute *dattr = to_dev_attr(attr);</div><div class='add'>+	struct lm3533_device_attribute *lattr = to_lm3533_dev_attr(dattr);</div><div class='add'>+	enum lm3533_attribute_type type = lattr-&gt;type;</div><div class='add'>+	umode_t mode = attr-&gt;mode;</div><div class='add'>+</div><div class='add'>+	if (!lm3533-&gt;have_backlights &amp;&amp; type == LM3533_ATTR_TYPE_BACKLIGHT)</div><div class='add'>+		mode = 0;</div><div class='add'>+	else if (!lm3533-&gt;have_leds &amp;&amp; type == LM3533_ATTR_TYPE_LED)</div><div class='add'>+		mode = 0;</div><div class='add'>+</div><div class='add'>+	return mode;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute_group lm3533_attribute_group = {</div><div class='add'>+	.is_visible	= lm3533_attr_is_visible,</div><div class='add'>+	.attrs		= lm3533_attributes</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit lm3533_device_als_init(struct lm3533 *lm3533)</div><div class='add'>+{</div><div class='add'>+	struct lm3533_platform_data *pdata = lm3533-&gt;dev-&gt;platform_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;als)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	lm3533_als_devs[0].platform_data = pdata-&gt;als;</div><div class='add'>+	lm3533_als_devs[0].pdata_size = sizeof(*pdata-&gt;als);</div><div class='add'>+</div><div class='add'>+	ret = mfd_add_devices(lm3533-&gt;dev, 0, lm3533_als_devs, 1, NULL, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(lm3533-&gt;dev, "failed to add ALS device\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lm3533-&gt;have_als = 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit lm3533_device_bl_init(struct lm3533 *lm3533)</div><div class='add'>+{</div><div class='add'>+	struct lm3533_platform_data *pdata = lm3533-&gt;dev-&gt;platform_data;</div><div class='add'>+	int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;backlights || pdata-&gt;num_backlights == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;num_backlights &gt; ARRAY_SIZE(lm3533_bl_devs))</div><div class='add'>+		pdata-&gt;num_backlights = ARRAY_SIZE(lm3533_bl_devs);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;num_backlights; ++i) {</div><div class='add'>+		lm3533_bl_devs[i].platform_data = &amp;pdata-&gt;backlights[i];</div><div class='add'>+		lm3533_bl_devs[i].pdata_size = sizeof(pdata-&gt;backlights[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mfd_add_devices(lm3533-&gt;dev, 0, lm3533_bl_devs,</div><div class='add'>+					pdata-&gt;num_backlights, NULL, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(lm3533-&gt;dev, "failed to add backlight devices\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lm3533-&gt;have_backlights = 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit lm3533_device_led_init(struct lm3533 *lm3533)</div><div class='add'>+{</div><div class='add'>+	struct lm3533_platform_data *pdata = lm3533-&gt;dev-&gt;platform_data;</div><div class='add'>+	int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;leds || pdata-&gt;num_leds == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;num_leds &gt; ARRAY_SIZE(lm3533_led_devs))</div><div class='add'>+		pdata-&gt;num_leds = ARRAY_SIZE(lm3533_led_devs);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;num_leds; ++i) {</div><div class='add'>+		lm3533_led_devs[i].platform_data = &amp;pdata-&gt;leds[i];</div><div class='add'>+		lm3533_led_devs[i].pdata_size = sizeof(pdata-&gt;leds[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mfd_add_devices(lm3533-&gt;dev, 0, lm3533_led_devs,</div><div class='add'>+						pdata-&gt;num_leds, NULL, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(lm3533-&gt;dev, "failed to add LED devices\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lm3533-&gt;have_leds = 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit lm3533_device_setup(struct lm3533 *lm3533,</div><div class='add'>+					struct lm3533_platform_data *pdata)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_set_boost_freq(lm3533, pdata-&gt;boost_freq);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_set_boost_ovp(lm3533, pdata-&gt;boost_ovp);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit lm3533_device_init(struct lm3533 *lm3533)</div><div class='add'>+{</div><div class='add'>+	struct lm3533_platform_data *pdata = lm3533-&gt;dev-&gt;platform_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(lm3533-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	if (!pdata) {</div><div class='add'>+		dev_err(lm3533-&gt;dev, "no platform data\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lm3533-&gt;gpio_hwen = pdata-&gt;gpio_hwen;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(lm3533-&gt;dev, lm3533);</div><div class='add'>+</div><div class='add'>+	if (gpio_is_valid(lm3533-&gt;gpio_hwen)) {</div><div class='add'>+		ret = gpio_request_one(lm3533-&gt;gpio_hwen, GPIOF_OUT_INIT_LOW,</div><div class='add'>+								"lm3533-hwen");</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(lm3533-&gt;dev,</div><div class='add'>+				"failed to request HWEN GPIO %d\n",</div><div class='add'>+				lm3533-&gt;gpio_hwen);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lm3533_enable(lm3533);</div><div class='add'>+</div><div class='add'>+	ret = lm3533_device_setup(lm3533, pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_disable;</div><div class='add'>+</div><div class='add'>+	lm3533_device_als_init(lm3533);</div><div class='add'>+	lm3533_device_bl_init(lm3533);</div><div class='add'>+	lm3533_device_led_init(lm3533);</div><div class='add'>+</div><div class='add'>+	ret = sysfs_create_group(&amp;lm3533-&gt;dev-&gt;kobj, &amp;lm3533_attribute_group);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(lm3533-&gt;dev, "failed to create sysfs attributes\n");</div><div class='add'>+		goto err_unregister;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unregister:</div><div class='add'>+	mfd_remove_devices(lm3533-&gt;dev);</div><div class='add'>+err_disable:</div><div class='add'>+	lm3533_disable(lm3533);</div><div class='add'>+	if (gpio_is_valid(lm3533-&gt;gpio_hwen))</div><div class='add'>+		gpio_free(lm3533-&gt;gpio_hwen);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devexit lm3533_device_exit(struct lm3533 *lm3533)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(lm3533-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	sysfs_remove_group(&amp;lm3533-&gt;dev-&gt;kobj, &amp;lm3533_attribute_group);</div><div class='add'>+</div><div class='add'>+	mfd_remove_devices(lm3533-&gt;dev);</div><div class='add'>+	lm3533_disable(lm3533);</div><div class='add'>+	if (gpio_is_valid(lm3533-&gt;gpio_hwen))</div><div class='add'>+		gpio_free(lm3533-&gt;gpio_hwen);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool lm3533_readable_register(struct device *dev, unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case 0x10 ... 0x2c:</div><div class='add'>+	case 0x30 ... 0x38:</div><div class='add'>+	case 0x40 ... 0x45:</div><div class='add'>+	case 0x50 ... 0x57:</div><div class='add'>+	case 0x60 ... 0x6e:</div><div class='add'>+	case 0x70 ... 0x75:</div><div class='add'>+	case 0x80 ... 0x85:</div><div class='add'>+	case 0x90 ... 0x95:</div><div class='add'>+	case 0xa0 ... 0xa5:</div><div class='add'>+	case 0xb0 ... 0xb2:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool lm3533_volatile_register(struct device *dev, unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case 0x34 ... 0x36:	/* zone */</div><div class='add'>+	case 0x37 ... 0x38:	/* adc */</div><div class='add'>+	case 0xb0 ... 0xb1:	/* fault */</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool lm3533_precious_register(struct device *dev, unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case 0x34:		/* zone */</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct regmap_config regmap_config = {</div><div class='add'>+	.reg_bits	= 8,</div><div class='add'>+	.val_bits	= 8,</div><div class='add'>+	.max_register	= LM3533_REG_MAX,</div><div class='add'>+	.readable_reg	= lm3533_readable_register,</div><div class='add'>+	.volatile_reg	= lm3533_volatile_register,</div><div class='add'>+	.precious_reg	= lm3533_precious_register,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit lm3533_i2c_probe(struct i2c_client *i2c,</div><div class='add'>+					const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct lm3533 *lm3533;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;i2c-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	lm3533 = devm_kzalloc(&amp;i2c-&gt;dev, sizeof(*lm3533), GFP_KERNEL);</div><div class='add'>+	if (!lm3533)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	i2c_set_clientdata(i2c, lm3533);</div><div class='add'>+</div><div class='add'>+	lm3533-&gt;regmap = devm_regmap_init_i2c(i2c, &amp;regmap_config);</div><div class='add'>+	if (IS_ERR(lm3533-&gt;regmap))</div><div class='add'>+		return PTR_ERR(lm3533-&gt;regmap);</div><div class='add'>+</div><div class='add'>+	lm3533-&gt;dev = &amp;i2c-&gt;dev;</div><div class='add'>+	lm3533-&gt;irq = i2c-&gt;irq;</div><div class='add'>+</div><div class='add'>+	ret = lm3533_device_init(lm3533);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit lm3533_i2c_remove(struct i2c_client *i2c)</div><div class='add'>+{</div><div class='add'>+	struct lm3533 *lm3533 = i2c_get_clientdata(i2c);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;i2c-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	lm3533_device_exit(lm3533);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id lm3533_i2c_ids[] = {</div><div class='add'>+	{ "lm3533", 0 },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, lm3533_i2c_ids);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver lm3533_i2c_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		   .name = "lm3533",</div><div class='add'>+		   .owner = THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.id_table	= lm3533_i2c_ids,</div><div class='add'>+	.probe		= lm3533_i2c_probe,</div><div class='add'>+	.remove		= __devexit_p(lm3533_i2c_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init lm3533_i2c_init(void)</div><div class='add'>+{</div><div class='add'>+	return i2c_add_driver(&amp;lm3533_i2c_driver);</div><div class='add'>+}</div><div class='add'>+subsys_initcall(lm3533_i2c_init);</div><div class='add'>+</div><div class='add'>+static void __exit lm3533_i2c_exit(void)</div><div class='add'>+{</div><div class='add'>+	i2c_del_driver(&amp;lm3533_i2c_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(lm3533_i2c_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Johan Hovold &lt;jhovold@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("LM3533 Core");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/mfd/lm3533-ctrlbank.c b/drivers/mfd/lm3533-ctrlbank.c<br/>new file mode 100644<br/>index 000000000000..a4cb7a5220a7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/lm3533-ctrlbank.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/lm3533-ctrlbank.c</a></div><div class='hunk'>@@ -0,0 +1,148 @@</div><div class='add'>+/*</div><div class='add'>+ * lm3533-ctrlbank.c -- LM3533 Generic Control Bank interface</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2012 Texas Instruments</div><div class='add'>+ *</div><div class='add'>+ * Author: Johan Hovold &lt;jhovold@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under  the terms of the GNU General  Public License as published by the</div><div class='add'>+ * Free Software Foundation;  either version 2 of the License, or (at your</div><div class='add'>+ * option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mfd/lm3533.h&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define LM3533_MAX_CURRENT_MIN		5000</div><div class='add'>+#define LM3533_MAX_CURRENT_MAX		29800</div><div class='add'>+#define LM3533_MAX_CURRENT_STEP		800</div><div class='add'>+</div><div class='add'>+#define LM3533_BRIGHTNESS_MAX		255</div><div class='add'>+#define LM3533_PWM_MAX			0x3f</div><div class='add'>+</div><div class='add'>+#define LM3533_REG_PWM_BASE		0x14</div><div class='add'>+#define LM3533_REG_MAX_CURRENT_BASE	0x1f</div><div class='add'>+#define LM3533_REG_CTRLBANK_ENABLE	0x27</div><div class='add'>+#define LM3533_REG_BRIGHTNESS_BASE	0x40</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static inline u8 lm3533_ctrlbank_get_reg(struct lm3533_ctrlbank *cb, u8 base)</div><div class='add'>+{</div><div class='add'>+	return base + cb-&gt;id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lm3533_ctrlbank_enable(struct lm3533_ctrlbank *cb)</div><div class='add'>+{</div><div class='add'>+	u8 mask;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(cb-&gt;dev, "%s - %d\n", __func__, cb-&gt;id);</div><div class='add'>+</div><div class='add'>+	mask = 1 &lt;&lt; cb-&gt;id;</div><div class='add'>+	ret = lm3533_update(cb-&gt;lm3533, LM3533_REG_CTRLBANK_ENABLE,</div><div class='add'>+								mask, mask);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(cb-&gt;dev, "failed to enable ctrlbank %d\n", cb-&gt;id);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(lm3533_ctrlbank_enable);</div><div class='add'>+</div><div class='add'>+int lm3533_ctrlbank_disable(struct lm3533_ctrlbank *cb)</div><div class='add'>+{</div><div class='add'>+	u8 mask;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(cb-&gt;dev, "%s - %d\n", __func__, cb-&gt;id);</div><div class='add'>+</div><div class='add'>+	mask = 1 &lt;&lt; cb-&gt;id;</div><div class='add'>+	ret = lm3533_update(cb-&gt;lm3533, LM3533_REG_CTRLBANK_ENABLE, 0, mask);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(cb-&gt;dev, "failed to disable ctrlbank %d\n", cb-&gt;id);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(lm3533_ctrlbank_disable);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Full-scale current.</div><div class='add'>+ *</div><div class='add'>+ * imax		5000 - 29800 uA (800 uA step)</div><div class='add'>+ */</div><div class='add'>+int lm3533_ctrlbank_set_max_current(struct lm3533_ctrlbank *cb, u16 imax)</div><div class='add'>+{</div><div class='add'>+	u8 reg;</div><div class='add'>+	u8 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (imax &lt; LM3533_MAX_CURRENT_MIN || imax &gt; LM3533_MAX_CURRENT_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = (imax - LM3533_MAX_CURRENT_MIN) / LM3533_MAX_CURRENT_STEP;</div><div class='add'>+</div><div class='add'>+	reg = lm3533_ctrlbank_get_reg(cb, LM3533_REG_MAX_CURRENT_BASE);</div><div class='add'>+	ret = lm3533_write(cb-&gt;lm3533, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(cb-&gt;dev, "failed to set max current\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(lm3533_ctrlbank_set_max_current);</div><div class='add'>+</div><div class='add'>+#define lm3533_ctrlbank_set(_name, _NAME)				\</div><div class='add'>+int lm3533_ctrlbank_set_##_name(struct lm3533_ctrlbank *cb, u8 val)	\</div><div class='add'>+{									\</div><div class='add'>+	u8 reg;								\</div><div class='add'>+	int ret;							\</div><div class='add'>+									\</div><div class='add'>+	if (val &gt; LM3533_##_NAME##_MAX)					\</div><div class='add'>+		return -EINVAL;						\</div><div class='add'>+									\</div><div class='add'>+	reg = lm3533_ctrlbank_get_reg(cb, LM3533_REG_##_NAME##_BASE);	\</div><div class='add'>+	ret = lm3533_write(cb-&gt;lm3533, reg, val);			\</div><div class='add'>+	if (ret)							\</div><div class='add'>+		dev_err(cb-&gt;dev, "failed to set " #_name "\n");		\</div><div class='add'>+									\</div><div class='add'>+	return ret;							\</div><div class='add'>+}									\</div><div class='add'>+EXPORT_SYMBOL_GPL(lm3533_ctrlbank_set_##_name);</div><div class='add'>+</div><div class='add'>+#define lm3533_ctrlbank_get(_name, _NAME)				\</div><div class='add'>+int lm3533_ctrlbank_get_##_name(struct lm3533_ctrlbank *cb, u8 *val)	\</div><div class='add'>+{									\</div><div class='add'>+	u8 reg;								\</div><div class='add'>+	int ret;							\</div><div class='add'>+									\</div><div class='add'>+	reg = lm3533_ctrlbank_get_reg(cb, LM3533_REG_##_NAME##_BASE);	\</div><div class='add'>+	ret = lm3533_read(cb-&gt;lm3533, reg, val);			\</div><div class='add'>+	if (ret)							\</div><div class='add'>+		dev_err(cb-&gt;dev, "failed to get " #_name "\n");		\</div><div class='add'>+									\</div><div class='add'>+	return ret;							\</div><div class='add'>+}									\</div><div class='add'>+EXPORT_SYMBOL_GPL(lm3533_ctrlbank_get_##_name);</div><div class='add'>+</div><div class='add'>+lm3533_ctrlbank_set(brightness, BRIGHTNESS);</div><div class='add'>+lm3533_ctrlbank_get(brightness, BRIGHTNESS);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * PWM-input control mask:</div><div class='add'>+ *</div><div class='add'>+ *   bit 5 - PWM-input enabled in Zone 4</div><div class='add'>+ *   bit 4 - PWM-input enabled in Zone 3</div><div class='add'>+ *   bit 3 - PWM-input enabled in Zone 2</div><div class='add'>+ *   bit 2 - PWM-input enabled in Zone 1</div><div class='add'>+ *   bit 1 - PWM-input enabled in Zone 0</div><div class='add'>+ *   bit 0 - PWM-input enabled</div><div class='add'>+ */</div><div class='add'>+lm3533_ctrlbank_set(pwm, PWM);</div><div class='add'>+lm3533_ctrlbank_get(pwm, PWM);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Johan Hovold &lt;jhovold@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("LM3533 Control Bank interface");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c<br/>new file mode 100644<br/>index 000000000000..027cc8f86132<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/lpc_ich.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/lpc_ich.c</a></div><div class='hunk'>@@ -0,0 +1,888 @@</div><div class='add'>+/*</div><div class='add'>+ *  lpc_ich.c - LPC interface for Intel ICH</div><div class='add'>+ *</div><div class='add'>+ *  LPC bridge function of the Intel ICH contains many other</div><div class='add'>+ *  functional units, such as Interrupt controllers, Timers,</div><div class='add'>+ *  Power Management, System Management, GPIO, RTC, and LPC</div><div class='add'>+ *  Configuration Registers.</div><div class='add'>+ *</div><div class='add'>+ *  This driver is derived from lpc_sch.</div><div class='add'>+</div><div class='add'>+ *  Copyright (c) 2011 Extreme Engineering Solution, Inc.</div><div class='add'>+ *  Author: Aaron Sierra &lt;asierra@xes-inc.com&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *  it under the terms of the GNU General Public License 2 as published</div><div class='add'>+ *  by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ *  This program is distributed in the hope that it will be useful,</div><div class='add'>+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *  GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *  You should have received a copy of the GNU General Public License</div><div class='add'>+ *  along with this program; see the file COPYING.  If not, write to</div><div class='add'>+ *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ *</div><div class='add'>+ *  This driver supports the following I/O Controller hubs:</div><div class='add'>+ *	(See the intel documentation on http://developer.intel.com.)</div><div class='add'>+ *	document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO)</div><div class='add'>+ *	document number 290687-002, 298242-027: 82801BA (ICH2)</div><div class='add'>+ *	document number 290733-003, 290739-013: 82801CA (ICH3-S)</div><div class='add'>+ *	document number 290716-001, 290718-007: 82801CAM (ICH3-M)</div><div class='add'>+ *	document number 290744-001, 290745-025: 82801DB (ICH4)</div><div class='add'>+ *	document number 252337-001, 252663-008: 82801DBM (ICH4-M)</div><div class='add'>+ *	document number 273599-001, 273645-002: 82801E (C-ICH)</div><div class='add'>+ *	document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R)</div><div class='add'>+ *	document number 300641-004, 300884-013: 6300ESB</div><div class='add'>+ *	document number 301473-002, 301474-026: 82801F (ICH6)</div><div class='add'>+ *	document number 313082-001, 313075-006: 631xESB, 632xESB</div><div class='add'>+ *	document number 307013-003, 307014-024: 82801G (ICH7)</div><div class='add'>+ *	document number 322896-001, 322897-001: NM10</div><div class='add'>+ *	document number 313056-003, 313057-017: 82801H (ICH8)</div><div class='add'>+ *	document number 316972-004, 316973-012: 82801I (ICH9)</div><div class='add'>+ *	document number 319973-002, 319974-002: 82801J (ICH10)</div><div class='add'>+ *	document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH)</div><div class='add'>+ *	document number 320066-003, 320257-008: EP80597 (IICH)</div><div class='add'>+ *	document number 324645-001, 324646-001: Cougar Point (CPT)</div><div class='add'>+ *	document number TBD : Patsburg (PBG)</div><div class='add'>+ *	document number TBD : DH89xxCC</div><div class='add'>+ *	document number TBD : Panther Point</div><div class='add'>+ *	document number TBD : Lynx Point</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/mfd/core.h&gt;</div><div class='add'>+#include &lt;linux/mfd/lpc_ich.h&gt;</div><div class='add'>+</div><div class='add'>+#define ACPIBASE		0x40</div><div class='add'>+#define ACPIBASE_GPE_OFF	0x28</div><div class='add'>+#define ACPIBASE_GPE_END	0x2f</div><div class='add'>+#define ACPIBASE_SMI_OFF	0x30</div><div class='add'>+#define ACPIBASE_SMI_END	0x33</div><div class='add'>+#define ACPIBASE_TCO_OFF	0x60</div><div class='add'>+#define ACPIBASE_TCO_END	0x7f</div><div class='add'>+#define ACPICTRL		0x44</div><div class='add'>+</div><div class='add'>+#define ACPIBASE_GCS_OFF	0x3410</div><div class='add'>+#define ACPIBASE_GCS_END	0x3414</div><div class='add'>+</div><div class='add'>+#define GPIOBASE		0x48</div><div class='add'>+#define GPIOCTRL		0x4C</div><div class='add'>+</div><div class='add'>+#define RCBABASE		0xf0</div><div class='add'>+</div><div class='add'>+#define wdt_io_res(i) wdt_res(0, i)</div><div class='add'>+#define wdt_mem_res(i) wdt_res(ICH_RES_MEM_OFF, i)</div><div class='add'>+#define wdt_res(b, i) (&amp;wdt_ich_res[(b) + (i)])</div><div class='add'>+</div><div class='add'>+static int lpc_ich_acpi_save = -1;</div><div class='add'>+static int lpc_ich_gpio_save = -1;</div><div class='add'>+</div><div class='add'>+static struct resource wdt_ich_res[] = {</div><div class='add'>+	/* ACPI - TCO */</div><div class='add'>+	{</div><div class='add'>+		.flags = IORESOURCE_IO,</div><div class='add'>+	},</div><div class='add'>+	/* ACPI - SMI */</div><div class='add'>+	{</div><div class='add'>+		.flags = IORESOURCE_IO,</div><div class='add'>+	},</div><div class='add'>+	/* GCS */</div><div class='add'>+	{</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct resource gpio_ich_res[] = {</div><div class='add'>+	/* GPIO */</div><div class='add'>+	{</div><div class='add'>+		.flags = IORESOURCE_IO,</div><div class='add'>+	},</div><div class='add'>+	/* ACPI - GPE0 */</div><div class='add'>+	{</div><div class='add'>+		.flags = IORESOURCE_IO,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum lpc_cells {</div><div class='add'>+	LPC_WDT = 0,</div><div class='add'>+	LPC_GPIO,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mfd_cell lpc_ich_cells[] = {</div><div class='add'>+	[LPC_WDT] = {</div><div class='add'>+		.name = "iTCO_wdt",</div><div class='add'>+		.num_resources = ARRAY_SIZE(wdt_ich_res),</div><div class='add'>+		.resources = wdt_ich_res,</div><div class='add'>+		.ignore_resource_conflicts = true,</div><div class='add'>+	},</div><div class='add'>+	[LPC_GPIO] = {</div><div class='add'>+		.name = "gpio_ich",</div><div class='add'>+		.num_resources = ARRAY_SIZE(gpio_ich_res),</div><div class='add'>+		.resources = gpio_ich_res,</div><div class='add'>+		.ignore_resource_conflicts = true,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* chipset related info */</div><div class='add'>+enum lpc_chipsets {</div><div class='add'>+	LPC_ICH = 0,	/* ICH */</div><div class='add'>+	LPC_ICH0,	/* ICH0 */</div><div class='add'>+	LPC_ICH2,	/* ICH2 */</div><div class='add'>+	LPC_ICH2M,	/* ICH2-M */</div><div class='add'>+	LPC_ICH3,	/* ICH3-S */</div><div class='add'>+	LPC_ICH3M,	/* ICH3-M */</div><div class='add'>+	LPC_ICH4,	/* ICH4 */</div><div class='add'>+	LPC_ICH4M,	/* ICH4-M */</div><div class='add'>+	LPC_CICH,	/* C-ICH */</div><div class='add'>+	LPC_ICH5,	/* ICH5 &amp; ICH5R */</div><div class='add'>+	LPC_6300ESB,	/* 6300ESB */</div><div class='add'>+	LPC_ICH6,	/* ICH6 &amp; ICH6R */</div><div class='add'>+	LPC_ICH6M,	/* ICH6-M */</div><div class='add'>+	LPC_ICH6W,	/* ICH6W &amp; ICH6RW */</div><div class='add'>+	LPC_631XESB,	/* 631xESB/632xESB */</div><div class='add'>+	LPC_ICH7,	/* ICH7 &amp; ICH7R */</div><div class='add'>+	LPC_ICH7DH,	/* ICH7DH */</div><div class='add'>+	LPC_ICH7M,	/* ICH7-M &amp; ICH7-U */</div><div class='add'>+	LPC_ICH7MDH,	/* ICH7-M DH */</div><div class='add'>+	LPC_NM10,	/* NM10 */</div><div class='add'>+	LPC_ICH8,	/* ICH8 &amp; ICH8R */</div><div class='add'>+	LPC_ICH8DH,	/* ICH8DH */</div><div class='add'>+	LPC_ICH8DO,	/* ICH8DO */</div><div class='add'>+	LPC_ICH8M,	/* ICH8M */</div><div class='add'>+	LPC_ICH8ME,	/* ICH8M-E */</div><div class='add'>+	LPC_ICH9,	/* ICH9 */</div><div class='add'>+	LPC_ICH9R,	/* ICH9R */</div><div class='add'>+	LPC_ICH9DH,	/* ICH9DH */</div><div class='add'>+	LPC_ICH9DO,	/* ICH9DO */</div><div class='add'>+	LPC_ICH9M,	/* ICH9M */</div><div class='add'>+	LPC_ICH9ME,	/* ICH9M-E */</div><div class='add'>+	LPC_ICH10,	/* ICH10 */</div><div class='add'>+	LPC_ICH10R,	/* ICH10R */</div><div class='add'>+	LPC_ICH10D,	/* ICH10D */</div><div class='add'>+	LPC_ICH10DO,	/* ICH10DO */</div><div class='add'>+	LPC_PCH,	/* PCH Desktop Full Featured */</div><div class='add'>+	LPC_PCHM,	/* PCH Mobile Full Featured */</div><div class='add'>+	LPC_P55,	/* P55 */</div><div class='add'>+	LPC_PM55,	/* PM55 */</div><div class='add'>+	LPC_H55,	/* H55 */</div><div class='add'>+	LPC_QM57,	/* QM57 */</div><div class='add'>+	LPC_H57,	/* H57 */</div><div class='add'>+	LPC_HM55,	/* HM55 */</div><div class='add'>+	LPC_Q57,	/* Q57 */</div><div class='add'>+	LPC_HM57,	/* HM57 */</div><div class='add'>+	LPC_PCHMSFF,	/* PCH Mobile SFF Full Featured */</div><div class='add'>+	LPC_QS57,	/* QS57 */</div><div class='add'>+	LPC_3400,	/* 3400 */</div><div class='add'>+	LPC_3420,	/* 3420 */</div><div class='add'>+	LPC_3450,	/* 3450 */</div><div class='add'>+	LPC_EP80579,	/* EP80579 */</div><div class='add'>+	LPC_CPT,	/* Cougar Point */</div><div class='add'>+	LPC_CPTD,	/* Cougar Point Desktop */</div><div class='add'>+	LPC_CPTM,	/* Cougar Point Mobile */</div><div class='add'>+	LPC_PBG,	/* Patsburg */</div><div class='add'>+	LPC_DH89XXCC,	/* DH89xxCC */</div><div class='add'>+	LPC_PPT,	/* Panther Point */</div><div class='add'>+	LPC_LPT,	/* Lynx Point */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct lpc_ich_info lpc_chipset_info[] __devinitdata = {</div><div class='add'>+	[LPC_ICH] = {</div><div class='add'>+		.name = "ICH",</div><div class='add'>+		.iTCO_version = 1,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH0] = {</div><div class='add'>+		.name = "ICH0",</div><div class='add'>+		.iTCO_version = 1,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH2] = {</div><div class='add'>+		.name = "ICH2",</div><div class='add'>+		.iTCO_version = 1,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH2M] = {</div><div class='add'>+		.name = "ICH2-M",</div><div class='add'>+		.iTCO_version = 1,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH3] = {</div><div class='add'>+		.name = "ICH3-S",</div><div class='add'>+		.iTCO_version = 1,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH3M] = {</div><div class='add'>+		.name = "ICH3-M",</div><div class='add'>+		.iTCO_version = 1,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH4] = {</div><div class='add'>+		.name = "ICH4",</div><div class='add'>+		.iTCO_version = 1,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH4M] = {</div><div class='add'>+		.name = "ICH4-M",</div><div class='add'>+		.iTCO_version = 1,</div><div class='add'>+	},</div><div class='add'>+	[LPC_CICH] = {</div><div class='add'>+		.name = "C-ICH",</div><div class='add'>+		.iTCO_version = 1,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH5] = {</div><div class='add'>+		.name = "ICH5 or ICH5R",</div><div class='add'>+		.iTCO_version = 1,</div><div class='add'>+	},</div><div class='add'>+	[LPC_6300ESB] = {</div><div class='add'>+		.name = "6300ESB",</div><div class='add'>+		.iTCO_version = 1,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH6] = {</div><div class='add'>+		.name = "ICH6 or ICH6R",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V6_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH6M] = {</div><div class='add'>+		.name = "ICH6-M",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V6_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH6W] = {</div><div class='add'>+		.name = "ICH6W or ICH6RW",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V6_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_631XESB] = {</div><div class='add'>+		.name = "631xESB/632xESB",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V6_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH7] = {</div><div class='add'>+		.name = "ICH7 or ICH7R",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V7_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH7DH] = {</div><div class='add'>+		.name = "ICH7DH",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V7_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH7M] = {</div><div class='add'>+		.name = "ICH7-M or ICH7-U",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V7_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH7MDH] = {</div><div class='add'>+		.name = "ICH7-M DH",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V7_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_NM10] = {</div><div class='add'>+		.name = "NM10",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH8] = {</div><div class='add'>+		.name = "ICH8 or ICH8R",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V7_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH8DH] = {</div><div class='add'>+		.name = "ICH8DH",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V7_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH8DO] = {</div><div class='add'>+		.name = "ICH8DO",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V7_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH8M] = {</div><div class='add'>+		.name = "ICH8M",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V7_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH8ME] = {</div><div class='add'>+		.name = "ICH8M-E",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V7_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH9] = {</div><div class='add'>+		.name = "ICH9",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V9_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH9R] = {</div><div class='add'>+		.name = "ICH9R",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V9_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH9DH] = {</div><div class='add'>+		.name = "ICH9DH",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V9_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH9DO] = {</div><div class='add'>+		.name = "ICH9DO",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V9_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH9M] = {</div><div class='add'>+		.name = "ICH9M",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V9_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH9ME] = {</div><div class='add'>+		.name = "ICH9M-E",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V9_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH10] = {</div><div class='add'>+		.name = "ICH10",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V10CONS_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH10R] = {</div><div class='add'>+		.name = "ICH10R",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V10CONS_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH10D] = {</div><div class='add'>+		.name = "ICH10D",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V10CORP_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_ICH10DO] = {</div><div class='add'>+		.name = "ICH10DO",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V10CORP_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_PCH] = {</div><div class='add'>+		.name = "PCH Desktop Full Featured",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_PCHM] = {</div><div class='add'>+		.name = "PCH Mobile Full Featured",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_P55] = {</div><div class='add'>+		.name = "P55",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_PM55] = {</div><div class='add'>+		.name = "PM55",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_H55] = {</div><div class='add'>+		.name = "H55",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_QM57] = {</div><div class='add'>+		.name = "QM57",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_H57] = {</div><div class='add'>+		.name = "H57",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_HM55] = {</div><div class='add'>+		.name = "HM55",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_Q57] = {</div><div class='add'>+		.name = "Q57",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_HM57] = {</div><div class='add'>+		.name = "HM57",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_PCHMSFF] = {</div><div class='add'>+		.name = "PCH Mobile SFF Full Featured",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_QS57] = {</div><div class='add'>+		.name = "QS57",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_3400] = {</div><div class='add'>+		.name = "3400",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_3420] = {</div><div class='add'>+		.name = "3420",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_3450] = {</div><div class='add'>+		.name = "3450",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_EP80579] = {</div><div class='add'>+		.name = "EP80579",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+	},</div><div class='add'>+	[LPC_CPT] = {</div><div class='add'>+		.name = "Cougar Point",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_CPTD] = {</div><div class='add'>+		.name = "Cougar Point Desktop",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_CPTM] = {</div><div class='add'>+		.name = "Cougar Point Mobile",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+		.gpio_version = ICH_V5_GPIO,</div><div class='add'>+	},</div><div class='add'>+	[LPC_PBG] = {</div><div class='add'>+		.name = "Patsburg",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+	},</div><div class='add'>+	[LPC_DH89XXCC] = {</div><div class='add'>+		.name = "DH89xxCC",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+	},</div><div class='add'>+	[LPC_PPT] = {</div><div class='add'>+		.name = "Panther Point",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+	},</div><div class='add'>+	[LPC_LPT] = {</div><div class='add'>+		.name = "Lynx Point",</div><div class='add'>+		.iTCO_version = 2,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This data only exists for exporting the supported PCI ids</div><div class='add'>+ * via MODULE_DEVICE_TABLE.  We do not actually register a</div><div class='add'>+ * pci_driver, because the I/O Controller Hub has also other</div><div class='add'>+ * functions that probably will be registered by other drivers.</div><div class='add'>+ */</div><div class='add'>+static DEFINE_PCI_DEVICE_TABLE(lpc_ich_ids) = {</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2410), LPC_ICH},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2420), LPC_ICH0},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2440), LPC_ICH2},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x244c), LPC_ICH2M},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2480), LPC_ICH3},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x248c), LPC_ICH3M},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x24c0), LPC_ICH4},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x24cc), LPC_ICH4M},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2450), LPC_CICH},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x24d0), LPC_ICH5},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x25a1), LPC_6300ESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2640), LPC_ICH6},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2641), LPC_ICH6M},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2642), LPC_ICH6W},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2670), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2671), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2672), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2673), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2674), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2675), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2676), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2677), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2678), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2679), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x267a), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x267b), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x267c), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x267d), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x267e), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x267f), LPC_631XESB},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x27b8), LPC_ICH7},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x27b0), LPC_ICH7DH},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x27b9), LPC_ICH7M},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x27bd), LPC_ICH7MDH},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x27bc), LPC_NM10},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2810), LPC_ICH8},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2812), LPC_ICH8DH},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2814), LPC_ICH8DO},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2815), LPC_ICH8M},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2811), LPC_ICH8ME},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2916), LPC_ICH9R},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2912), LPC_ICH9DH},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2914), LPC_ICH9DO},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3a18), LPC_ICH10},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3a1a), LPC_ICH10D},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b00), LPC_PCH},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b01), LPC_PCHM},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b02), LPC_P55},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b03), LPC_PM55},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b06), LPC_H55},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b07), LPC_QM57},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b08), LPC_H57},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b09), LPC_HM55},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b0a), LPC_Q57},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b0b), LPC_HM57},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b0d), LPC_PCHMSFF},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b0f), LPC_QS57},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b12), LPC_3400},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b14), LPC_3420},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x3b16), LPC_3450},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c41), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c42), LPC_CPTD},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c43), LPC_CPTM},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c44), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c45), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c46), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c47), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c48), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c49), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c4a), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c4b), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c4c), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c4d), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c4e), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c4f), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c50), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c51), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c52), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c53), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c54), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c55), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c56), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c57), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c58), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c59), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c5a), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c5b), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c5c), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c5d), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c5e), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1c5f), LPC_CPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1d40), LPC_PBG},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1d41), LPC_PBG},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e40), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e41), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e42), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e43), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e44), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e45), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e46), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e47), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e48), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e49), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e4a), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e4b), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e4c), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e4d), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e4e), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e4f), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e50), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e51), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e52), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e53), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e54), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e55), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e56), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e57), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e58), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e59), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e5a), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e5b), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e5c), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e5d), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e5e), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x1e5f), LPC_PPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c40), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c41), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c42), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c43), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c44), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c45), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c46), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c47), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c48), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c49), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c4a), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c4b), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c4c), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c4d), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c4e), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c4f), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c50), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c51), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c52), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c53), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c54), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c55), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c56), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c57), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c58), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c59), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c5a), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c5b), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c5c), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c5d), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c5e), LPC_LPT},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x8c5f), LPC_LPT},</div><div class='add'>+	{ 0, },			/* End of list */</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, lpc_ich_ids);</div><div class='add'>+</div><div class='add'>+static void lpc_ich_restore_config_space(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	if (lpc_ich_acpi_save &gt;= 0) {</div><div class='add'>+		pci_write_config_byte(dev, ACPICTRL, lpc_ich_acpi_save);</div><div class='add'>+		lpc_ich_acpi_save = -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (lpc_ich_gpio_save &gt;= 0) {</div><div class='add'>+		pci_write_config_byte(dev, GPIOCTRL, lpc_ich_gpio_save);</div><div class='add'>+		lpc_ich_gpio_save = -1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devinit lpc_ich_enable_acpi_space(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	u8 reg_save;</div><div class='add'>+</div><div class='add'>+	pci_read_config_byte(dev, ACPICTRL, &amp;reg_save);</div><div class='add'>+	pci_write_config_byte(dev, ACPICTRL, reg_save | 0x10);</div><div class='add'>+	lpc_ich_acpi_save = reg_save;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devinit lpc_ich_enable_gpio_space(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	u8 reg_save;</div><div class='add'>+</div><div class='add'>+	pci_read_config_byte(dev, GPIOCTRL, &amp;reg_save);</div><div class='add'>+	pci_write_config_byte(dev, GPIOCTRL, reg_save | 0x10);</div><div class='add'>+	lpc_ich_gpio_save = reg_save;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devinit lpc_ich_finalize_cell(struct mfd_cell *cell,</div><div class='add'>+					const struct pci_device_id *id)</div><div class='add'>+{</div><div class='add'>+	cell-&gt;platform_data = &amp;lpc_chipset_info[id-&gt;driver_data];</div><div class='add'>+	cell-&gt;pdata_size = sizeof(struct lpc_ich_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit lpc_ich_init_gpio(struct pci_dev *dev,</div><div class='add'>+				const struct pci_device_id *id)</div><div class='add'>+{</div><div class='add'>+	u32 base_addr_cfg;</div><div class='add'>+	u32 base_addr;</div><div class='add'>+	int ret;</div><div class='add'>+	bool acpi_conflict = false;</div><div class='add'>+	struct resource *res;</div><div class='add'>+</div><div class='add'>+	/* Setup power management base register */</div><div class='add'>+	pci_read_config_dword(dev, ACPIBASE, &amp;base_addr_cfg);</div><div class='add'>+	base_addr = base_addr_cfg &amp; 0x0000ff80;</div><div class='add'>+	if (!base_addr) {</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "I/O space for ACPI uninitialized\n");</div><div class='add'>+		lpc_ich_cells[LPC_GPIO].num_resources--;</div><div class='add'>+		goto gpe0_done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = &amp;gpio_ich_res[ICH_RES_GPE0];</div><div class='add'>+	res-&gt;start = base_addr + ACPIBASE_GPE_OFF;</div><div class='add'>+	res-&gt;end = base_addr + ACPIBASE_GPE_END;</div><div class='add'>+	ret = acpi_check_resource_conflict(res);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/*</div><div class='add'>+		 * This isn't fatal for the GPIO, but we have to make sure that</div><div class='add'>+		 * the platform_device subsystem doesn't see this resource</div><div class='add'>+		 * or it will register an invalid region.</div><div class='add'>+		 */</div><div class='add'>+		lpc_ich_cells[LPC_GPIO].num_resources--;</div><div class='add'>+		acpi_conflict = true;</div><div class='add'>+	} else {</div><div class='add'>+		lpc_ich_enable_acpi_space(dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+gpe0_done:</div><div class='add'>+	/* Setup GPIO base register */</div><div class='add'>+	pci_read_config_dword(dev, GPIOBASE, &amp;base_addr_cfg);</div><div class='add'>+	base_addr = base_addr_cfg &amp; 0x0000ff80;</div><div class='add'>+	if (!base_addr) {</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "I/O space for GPIO uninitialized\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto gpio_done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Older devices provide fewer GPIO and have a smaller resource size. */</div><div class='add'>+	res = &amp;gpio_ich_res[ICH_RES_GPIO];</div><div class='add'>+	res-&gt;start = base_addr;</div><div class='add'>+	switch (lpc_chipset_info[id-&gt;driver_data].gpio_version) {</div><div class='add'>+	case ICH_V5_GPIO:</div><div class='add'>+	case ICH_V10CORP_GPIO:</div><div class='add'>+		res-&gt;end = res-&gt;start + 128 - 1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		res-&gt;end = res-&gt;start + 64 - 1;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = acpi_check_resource_conflict(res);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/* this isn't necessarily fatal for the GPIO */</div><div class='add'>+		acpi_conflict = true;</div><div class='add'>+		goto gpio_done;</div><div class='add'>+	}</div><div class='add'>+	lpc_ich_enable_gpio_space(dev);</div><div class='add'>+</div><div class='add'>+	lpc_ich_finalize_cell(&amp;lpc_ich_cells[LPC_GPIO], id);</div><div class='add'>+	ret = mfd_add_devices(&amp;dev-&gt;dev, -1, &amp;lpc_ich_cells[LPC_GPIO],</div><div class='add'>+				1, NULL, 0);</div><div class='add'>+</div><div class='add'>+gpio_done:</div><div class='add'>+	if (acpi_conflict)</div><div class='add'>+		pr_warn("Resource conflict(s) found affecting %s\n",</div><div class='add'>+				lpc_ich_cells[LPC_GPIO].name);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit lpc_ich_init_wdt(struct pci_dev *dev,</div><div class='add'>+				const struct pci_device_id *id)</div><div class='add'>+{</div><div class='add'>+	u32 base_addr_cfg;</div><div class='add'>+	u32 base_addr;</div><div class='add'>+	int ret;</div><div class='add'>+	bool acpi_conflict = false;</div><div class='add'>+	struct resource *res;</div><div class='add'>+</div><div class='add'>+	/* Setup power management base register */</div><div class='add'>+	pci_read_config_dword(dev, ACPIBASE, &amp;base_addr_cfg);</div><div class='add'>+	base_addr = base_addr_cfg &amp; 0x0000ff80;</div><div class='add'>+	if (!base_addr) {</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "I/O space for ACPI uninitialized\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto wdt_done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = wdt_io_res(ICH_RES_IO_TCO);</div><div class='add'>+	res-&gt;start = base_addr + ACPIBASE_TCO_OFF;</div><div class='add'>+	res-&gt;end = base_addr + ACPIBASE_TCO_END;</div><div class='add'>+	ret = acpi_check_resource_conflict(res);</div><div class='add'>+	if (ret) {</div><div class='add'>+		acpi_conflict = true;</div><div class='add'>+		goto wdt_done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = wdt_io_res(ICH_RES_IO_SMI);</div><div class='add'>+	res-&gt;start = base_addr + ACPIBASE_SMI_OFF;</div><div class='add'>+	res-&gt;end = base_addr + ACPIBASE_SMI_END;</div><div class='add'>+	ret = acpi_check_resource_conflict(res);</div><div class='add'>+	if (ret) {</div><div class='add'>+		acpi_conflict = true;</div><div class='add'>+		goto wdt_done;</div><div class='add'>+	}</div><div class='add'>+	lpc_ich_enable_acpi_space(dev);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Get the Memory-Mapped GCS register. To get access to it</div><div class='add'>+	 * we have to read RCBA from PCI Config space 0xf0 and use</div><div class='add'>+	 * it as base. GCS = RCBA + ICH6_GCS(0x3410).</div><div class='add'>+	 */</div><div class='add'>+	if (lpc_chipset_info[id-&gt;driver_data].iTCO_version == 2) {</div><div class='add'>+		pci_read_config_dword(dev, RCBABASE, &amp;base_addr_cfg);</div><div class='add'>+		base_addr = base_addr_cfg &amp; 0xffffc000;</div><div class='add'>+		if (!(base_addr_cfg &amp; 1)) {</div><div class='add'>+			pr_err("RCBA is disabled by hardware/BIOS, "</div><div class='add'>+					"device disabled\n");</div><div class='add'>+			ret = -ENODEV;</div><div class='add'>+			goto wdt_done;</div><div class='add'>+		}</div><div class='add'>+		res = wdt_mem_res(ICH_RES_MEM_GCS);</div><div class='add'>+		res-&gt;start = base_addr + ACPIBASE_GCS_OFF;</div><div class='add'>+		res-&gt;end = base_addr + ACPIBASE_GCS_END;</div><div class='add'>+		ret = acpi_check_resource_conflict(res);</div><div class='add'>+		if (ret) {</div><div class='add'>+			acpi_conflict = true;</div><div class='add'>+			goto wdt_done;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lpc_ich_finalize_cell(&amp;lpc_ich_cells[LPC_WDT], id);</div><div class='add'>+	ret = mfd_add_devices(&amp;dev-&gt;dev, -1, &amp;lpc_ich_cells[LPC_WDT],</div><div class='add'>+				1, NULL, 0);</div><div class='add'>+</div><div class='add'>+wdt_done:</div><div class='add'>+	if (acpi_conflict)</div><div class='add'>+		pr_warn("Resource conflict(s) found affecting %s\n",</div><div class='add'>+				lpc_ich_cells[LPC_WDT].name);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit lpc_ich_probe(struct pci_dev *dev,</div><div class='add'>+				const struct pci_device_id *id)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	bool cell_added = false;</div><div class='add'>+</div><div class='add'>+	ret = lpc_ich_init_wdt(dev, id);</div><div class='add'>+	if (!ret)</div><div class='add'>+		cell_added = true;</div><div class='add'>+</div><div class='add'>+	ret = lpc_ich_init_gpio(dev, id);</div><div class='add'>+	if (!ret)</div><div class='add'>+		cell_added = true;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We only care if at least one or none of the cells registered</div><div class='add'>+	 * successfully.</div><div class='add'>+	 */</div><div class='add'>+	if (!cell_added) {</div><div class='add'>+		lpc_ich_restore_config_space(dev);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devexit lpc_ich_remove(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	mfd_remove_devices(&amp;dev-&gt;dev);</div><div class='add'>+	lpc_ich_restore_config_space(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_driver lpc_ich_driver = {</div><div class='add'>+	.name		= "lpc_ich",</div><div class='add'>+	.id_table	= lpc_ich_ids,</div><div class='add'>+	.probe		= lpc_ich_probe,</div><div class='add'>+	.remove		= __devexit_p(lpc_ich_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init lpc_ich_init(void)</div><div class='add'>+{</div><div class='add'>+	return pci_register_driver(&amp;lpc_ich_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit lpc_ich_exit(void)</div><div class='add'>+{</div><div class='add'>+	pci_unregister_driver(&amp;lpc_ich_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(lpc_ich_init);</div><div class='add'>+module_exit(lpc_ich_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Aaron Sierra &lt;asierra@xes-inc.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("LPC interface for Intel ICH");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c<br/>index abc421364a45..9f20abc5e393 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/lpc_sch.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/lpc_sch.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/lpc_sch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/lpc_sch.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> </div><div class='ctx'> #define GPIOBASE	0x44</div><div class='ctx'> #define GPIO_IO_SIZE	64</div><div class='add'>+#define GPIO_IO_SIZE_CENTERTON	128</div><div class='ctx'> </div><div class='ctx'> #define WDTBASE		0x84</div><div class='ctx'> #define WDT_IO_SIZE	64</div><div class='hunk'>@@ -68,7 +69,7 @@ static struct resource wdt_sch_resource = {</div><div class='ctx'> </div><div class='ctx'> static struct mfd_cell tunnelcreek_cells[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.name = "tunnelcreek_wdt",</div><div class='add'>+		.name = "ie6xx_wdt",</div><div class='ctx'> 		.num_resources = 1,</div><div class='ctx'> 		.resources = &amp;wdt_sch_resource,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -77,6 +78,7 @@ static struct mfd_cell tunnelcreek_cells[] = {</div><div class='ctx'> static DEFINE_PCI_DEVICE_TABLE(lpc_sch_ids) = {</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) },</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) },</div><div class='add'>+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB) },</div><div class='ctx'> 	{ 0, }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, lpc_sch_ids);</div><div class='hunk'>@@ -115,7 +117,11 @@ static int __devinit lpc_sch_probe(struct pci_dev *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	gpio_sch_resource.start = base_addr;</div><div class='del'>-	gpio_sch_resource.end = base_addr + GPIO_IO_SIZE - 1;</div><div class='add'>+</div><div class='add'>+	if (id-&gt;device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB)</div><div class='add'>+		gpio_sch_resource.end = base_addr + GPIO_IO_SIZE_CENTERTON - 1;</div><div class='add'>+	else</div><div class='add'>+		gpio_sch_resource.end = base_addr + GPIO_IO_SIZE - 1;</div><div class='ctx'> </div><div class='ctx'> 	for (i=0; i &lt; ARRAY_SIZE(lpc_sch_cells); i++)</div><div class='ctx'> 		lpc_sch_cells[i].id = id-&gt;device;</div><div class='hunk'>@@ -125,7 +131,8 @@ static int __devinit lpc_sch_probe(struct pci_dev *dev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_dev;</div><div class='ctx'> </div><div class='del'>-	if (id-&gt;device == PCI_DEVICE_ID_INTEL_ITC_LPC) {</div><div class='add'>+	if (id-&gt;device == PCI_DEVICE_ID_INTEL_ITC_LPC</div><div class='add'>+	 || id-&gt;device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB) {</div><div class='ctx'> 		pci_read_config_dword(dev, WDTBASE, &amp;base_addr_cfg);</div><div class='ctx'> 		if (!(base_addr_cfg &amp; (1 &lt;&lt; 31))) {</div><div class='ctx'> 			dev_err(&amp;dev-&gt;dev, "Decode of the WDT I/O range disabled\n");</div><div class='hunk'>@@ -167,18 +174,7 @@ static struct pci_driver lpc_sch_driver = {</div><div class='ctx'> 	.remove		= __devexit_p(lpc_sch_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init lpc_sch_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;lpc_sch_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit lpc_sch_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;lpc_sch_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(lpc_sch_init);</div><div class='del'>-module_exit(lpc_sch_exit);</div><div class='add'>+module_pci_driver(lpc_sch_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Denis Turischev &lt;denis@compulab.co.il&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");</div><div class='head'>diff --git a/drivers/mfd/max77693-irq.c b/drivers/mfd/max77693-irq.c<br/>new file mode 100644<br/>index 000000000000..2b403569e0a6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/max77693-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/max77693-irq.c</a></div><div class='hunk'>@@ -0,0 +1,309 @@</div><div class='add'>+/*</div><div class='add'>+ * max77693-irq.c - Interrupt controller support for MAX77693</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Samsung Electronics Co.Ltd</div><div class='add'>+ * SangYoung Son &lt;hello.son@samsung.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is not provided / owned by Maxim Integrated Products.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='add'>+ *</div><div class='add'>+ * This driver is based on max8997-irq.c</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/mfd/max77693.h&gt;</div><div class='add'>+#include &lt;linux/mfd/max77693-private.h&gt;</div><div class='add'>+</div><div class='add'>+static const u8 max77693_mask_reg[] = {</div><div class='add'>+	[LED_INT] = MAX77693_LED_REG_FLASH_INT_MASK,</div><div class='add'>+	[TOPSYS_INT] = MAX77693_PMIC_REG_TOPSYS_INT_MASK,</div><div class='add'>+	[CHG_INT] = MAX77693_CHG_REG_CHG_INT_MASK,</div><div class='add'>+	[MUIC_INT1] = MAX77693_MUIC_REG_INTMASK1,</div><div class='add'>+	[MUIC_INT2] = MAX77693_MUIC_REG_INTMASK2,</div><div class='add'>+	[MUIC_INT3] = MAX77693_MUIC_REG_INTMASK3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regmap *max77693_get_regmap(struct max77693_dev *max77693,</div><div class='add'>+				enum max77693_irq_source src)</div><div class='add'>+{</div><div class='add'>+	switch (src) {</div><div class='add'>+	case LED_INT ... CHG_INT:</div><div class='add'>+		return max77693-&gt;regmap;</div><div class='add'>+	case MUIC_INT1 ... MUIC_INT3:</div><div class='add'>+		return max77693-&gt;regmap_muic;</div><div class='add'>+	default:</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct max77693_irq_data {</div><div class='add'>+	int mask;</div><div class='add'>+	enum max77693_irq_source group;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define DECLARE_IRQ(idx, _group, _mask)		\</div><div class='add'>+	[(idx)] = { .group = (_group), .mask = (_mask) }</div><div class='add'>+static const struct max77693_irq_data max77693_irqs[] = {</div><div class='add'>+	DECLARE_IRQ(MAX77693_LED_IRQ_FLED2_OPEN,	LED_INT, 1 &lt;&lt; 0),</div><div class='add'>+	DECLARE_IRQ(MAX77693_LED_IRQ_FLED2_SHORT,	LED_INT, 1 &lt;&lt; 1),</div><div class='add'>+	DECLARE_IRQ(MAX77693_LED_IRQ_FLED1_OPEN,	LED_INT, 1 &lt;&lt; 2),</div><div class='add'>+	DECLARE_IRQ(MAX77693_LED_IRQ_FLED1_SHORT,	LED_INT, 1 &lt;&lt; 3),</div><div class='add'>+	DECLARE_IRQ(MAX77693_LED_IRQ_MAX_FLASH,		LED_INT, 1 &lt;&lt; 4),</div><div class='add'>+</div><div class='add'>+	DECLARE_IRQ(MAX77693_TOPSYS_IRQ_T120C_INT,	TOPSYS_INT, 1 &lt;&lt; 0),</div><div class='add'>+	DECLARE_IRQ(MAX77693_TOPSYS_IRQ_T140C_INT,	TOPSYS_INT, 1 &lt;&lt; 1),</div><div class='add'>+	DECLARE_IRQ(MAX77693_TOPSYS_IRQ_LOWSYS_INT,	TOPSYS_INT, 1 &lt;&lt; 3),</div><div class='add'>+</div><div class='add'>+	DECLARE_IRQ(MAX77693_CHG_IRQ_BYP_I,		CHG_INT, 1 &lt;&lt; 0),</div><div class='add'>+	DECLARE_IRQ(MAX77693_CHG_IRQ_THM_I,		CHG_INT, 1 &lt;&lt; 2),</div><div class='add'>+	DECLARE_IRQ(MAX77693_CHG_IRQ_BAT_I,		CHG_INT, 1 &lt;&lt; 3),</div><div class='add'>+	DECLARE_IRQ(MAX77693_CHG_IRQ_CHG_I,		CHG_INT, 1 &lt;&lt; 4),</div><div class='add'>+	DECLARE_IRQ(MAX77693_CHG_IRQ_CHGIN_I,		CHG_INT, 1 &lt;&lt; 6),</div><div class='add'>+</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT1_ADC,		MUIC_INT1, 1 &lt;&lt; 0),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT1_ADC_LOW,	MUIC_INT1, 1 &lt;&lt; 1),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT1_ADC_ERR,	MUIC_INT1, 1 &lt;&lt; 2),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT1_ADC1K,	MUIC_INT1, 1 &lt;&lt; 3),</div><div class='add'>+</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT2_CHGTYP,	MUIC_INT2, 1 &lt;&lt; 0),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT2_CHGDETREUN,	MUIC_INT2, 1 &lt;&lt; 1),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT2_DCDTMR,	MUIC_INT2, 1 &lt;&lt; 2),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT2_DXOVP,	MUIC_INT2, 1 &lt;&lt; 3),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT2_VBVOLT,	MUIC_INT2, 1 &lt;&lt; 4),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT2_VIDRM,	MUIC_INT2, 1 &lt;&lt; 5),</div><div class='add'>+</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT3_EOC,		MUIC_INT3, 1 &lt;&lt; 0),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT3_CGMBC,	MUIC_INT3, 1 &lt;&lt; 1),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT3_OVP,		MUIC_INT3, 1 &lt;&lt; 2),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT3_MBCCHG_ERR,	MUIC_INT3, 1 &lt;&lt; 3),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT3_CHG_ENABLED,	MUIC_INT3, 1 &lt;&lt; 4),</div><div class='add'>+	DECLARE_IRQ(MAX77693_MUIC_IRQ_INT3_BAT_DET,	MUIC_INT3, 1 &lt;&lt; 5),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void max77693_irq_lock(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	struct max77693_dev *max77693 = irq_get_chip_data(data-&gt;irq);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;max77693-&gt;irqlock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void max77693_irq_sync_unlock(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	struct max77693_dev *max77693 = irq_get_chip_data(data-&gt;irq);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX77693_IRQ_GROUP_NR; i++) {</div><div class='add'>+		u8 mask_reg = max77693_mask_reg[i];</div><div class='add'>+		struct regmap *map = max77693_get_regmap(max77693, i);</div><div class='add'>+</div><div class='add'>+		if (mask_reg == MAX77693_REG_INVALID ||</div><div class='add'>+				IS_ERR_OR_NULL(map))</div><div class='add'>+			continue;</div><div class='add'>+		max77693-&gt;irq_masks_cache[i] = max77693-&gt;irq_masks_cur[i];</div><div class='add'>+</div><div class='add'>+		max77693_write_reg(map, max77693_mask_reg[i],</div><div class='add'>+				max77693-&gt;irq_masks_cur[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;max77693-&gt;irqlock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const inline struct max77693_irq_data *</div><div class='add'>+irq_to_max77693_irq(struct max77693_dev *max77693, int irq)</div><div class='add'>+{</div><div class='add'>+	return &amp;max77693_irqs[irq];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void max77693_irq_mask(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	struct max77693_dev *max77693 = irq_get_chip_data(data-&gt;irq);</div><div class='add'>+	const struct max77693_irq_data *irq_data =</div><div class='add'>+				irq_to_max77693_irq(max77693, data-&gt;irq);</div><div class='add'>+</div><div class='add'>+	if (irq_data-&gt;group &gt;= MUIC_INT1 &amp;&amp; irq_data-&gt;group &lt;= MUIC_INT3)</div><div class='add'>+		max77693-&gt;irq_masks_cur[irq_data-&gt;group] &amp;= ~irq_data-&gt;mask;</div><div class='add'>+	else</div><div class='add'>+		max77693-&gt;irq_masks_cur[irq_data-&gt;group] |= irq_data-&gt;mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void max77693_irq_unmask(struct irq_data *data)</div><div class='add'>+{</div><div class='add'>+	struct max77693_dev *max77693 = irq_get_chip_data(data-&gt;irq);</div><div class='add'>+	const struct max77693_irq_data *irq_data =</div><div class='add'>+	    irq_to_max77693_irq(max77693, data-&gt;irq);</div><div class='add'>+</div><div class='add'>+	if (irq_data-&gt;group &gt;= MUIC_INT1 &amp;&amp; irq_data-&gt;group &lt;= MUIC_INT3)</div><div class='add'>+		max77693-&gt;irq_masks_cur[irq_data-&gt;group] |= irq_data-&gt;mask;</div><div class='add'>+	else</div><div class='add'>+		max77693-&gt;irq_masks_cur[irq_data-&gt;group] &amp;= ~irq_data-&gt;mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_chip max77693_irq_chip = {</div><div class='add'>+	.name			= "max77693",</div><div class='add'>+	.irq_bus_lock		= max77693_irq_lock,</div><div class='add'>+	.irq_bus_sync_unlock	= max77693_irq_sync_unlock,</div><div class='add'>+	.irq_mask		= max77693_irq_mask,</div><div class='add'>+	.irq_unmask		= max77693_irq_unmask,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MAX77693_IRQSRC_CHG		(1 &lt;&lt; 0)</div><div class='add'>+#define MAX77693_IRQSRC_TOP		(1 &lt;&lt; 1)</div><div class='add'>+#define MAX77693_IRQSRC_FLASH		(1 &lt;&lt; 2)</div><div class='add'>+#define MAX77693_IRQSRC_MUIC		(1 &lt;&lt; 3)</div><div class='add'>+static irqreturn_t max77693_irq_thread(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct max77693_dev *max77693 = data;</div><div class='add'>+	u8 irq_reg[MAX77693_IRQ_GROUP_NR] = {};</div><div class='add'>+	u8 irq_src;</div><div class='add'>+	int ret;</div><div class='add'>+	int i, cur_irq;</div><div class='add'>+</div><div class='add'>+	ret = max77693_read_reg(max77693-&gt;regmap, MAX77693_PMIC_REG_INTSRC,</div><div class='add'>+				&amp;irq_src);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(max77693-&gt;dev, "Failed to read interrupt source: %d\n",</div><div class='add'>+				ret);</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (irq_src &amp; MAX77693_IRQSRC_CHG)</div><div class='add'>+		/* CHG_INT */</div><div class='add'>+		ret = max77693_read_reg(max77693-&gt;regmap, MAX77693_CHG_REG_CHG_INT,</div><div class='add'>+				&amp;irq_reg[CHG_INT]);</div><div class='add'>+</div><div class='add'>+	if (irq_src &amp; MAX77693_IRQSRC_TOP)</div><div class='add'>+		/* TOPSYS_INT */</div><div class='add'>+		ret = max77693_read_reg(max77693-&gt;regmap,</div><div class='add'>+			MAX77693_PMIC_REG_TOPSYS_INT, &amp;irq_reg[TOPSYS_INT]);</div><div class='add'>+</div><div class='add'>+	if (irq_src &amp; MAX77693_IRQSRC_FLASH)</div><div class='add'>+		/* LED_INT */</div><div class='add'>+		ret = max77693_read_reg(max77693-&gt;regmap,</div><div class='add'>+			MAX77693_LED_REG_FLASH_INT, &amp;irq_reg[LED_INT]);</div><div class='add'>+</div><div class='add'>+	if (irq_src &amp; MAX77693_IRQSRC_MUIC)</div><div class='add'>+		/* MUIC INT1 ~ INT3 */</div><div class='add'>+		max77693_bulk_read(max77693-&gt;regmap, MAX77693_MUIC_REG_INT1,</div><div class='add'>+			MAX77693_NUM_IRQ_MUIC_REGS, &amp;irq_reg[MUIC_INT1]);</div><div class='add'>+</div><div class='add'>+	/* Apply masking */</div><div class='add'>+	for (i = 0; i &lt; MAX77693_IRQ_GROUP_NR; i++) {</div><div class='add'>+		if (i &gt;= MUIC_INT1 &amp;&amp; i &lt;= MUIC_INT3)</div><div class='add'>+			irq_reg[i] &amp;= max77693-&gt;irq_masks_cur[i];</div><div class='add'>+		else</div><div class='add'>+			irq_reg[i] &amp;= ~max77693-&gt;irq_masks_cur[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Report */</div><div class='add'>+	for (i = 0; i &lt; MAX77693_IRQ_NR; i++) {</div><div class='add'>+		if (irq_reg[max77693_irqs[i].group] &amp; max77693_irqs[i].mask) {</div><div class='add'>+			cur_irq = irq_find_mapping(max77693-&gt;irq_domain, i);</div><div class='add'>+			if (cur_irq)</div><div class='add'>+				handle_nested_irq(cur_irq);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int max77693_irq_resume(struct max77693_dev *max77693)</div><div class='add'>+{</div><div class='add'>+	if (max77693-&gt;irq)</div><div class='add'>+		max77693_irq_thread(0, max77693);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77693_irq_domain_map(struct irq_domain *d, unsigned int irq,</div><div class='add'>+				irq_hw_number_t hw)</div><div class='add'>+{</div><div class='add'>+	struct max77693_dev *max77693 = d-&gt;host_data;</div><div class='add'>+</div><div class='add'>+	irq_set_chip_data(irq, max77693);</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;max77693_irq_chip, handle_edge_irq);</div><div class='add'>+	irq_set_nested_thread(irq, 1);</div><div class='add'>+#ifdef CONFIG_ARM</div><div class='add'>+	set_irq_flags(irq, IRQF_VALID);</div><div class='add'>+#else</div><div class='add'>+	irq_set_noprobe(irq);</div><div class='add'>+#endif</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_domain_ops max77693_irq_domain_ops = {</div><div class='add'>+	.map = max77693_irq_domain_map,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int max77693_irq_init(struct max77693_dev *max77693)</div><div class='add'>+{</div><div class='add'>+	struct irq_domain *domain;</div><div class='add'>+	int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;max77693-&gt;irqlock);</div><div class='add'>+</div><div class='add'>+	/* Mask individual interrupt sources */</div><div class='add'>+	for (i = 0; i &lt; MAX77693_IRQ_GROUP_NR; i++) {</div><div class='add'>+		struct regmap *map;</div><div class='add'>+		/* MUIC IRQ  0:MASK 1:NOT MASK */</div><div class='add'>+		/* Other IRQ 1:MASK 0:NOT MASK */</div><div class='add'>+		if (i &gt;= MUIC_INT1 &amp;&amp; i &lt;= MUIC_INT3) {</div><div class='add'>+			max77693-&gt;irq_masks_cur[i] = 0x00;</div><div class='add'>+			max77693-&gt;irq_masks_cache[i] = 0x00;</div><div class='add'>+		} else {</div><div class='add'>+			max77693-&gt;irq_masks_cur[i] = 0xff;</div><div class='add'>+			max77693-&gt;irq_masks_cache[i] = 0xff;</div><div class='add'>+		}</div><div class='add'>+		map = max77693_get_regmap(max77693, i);</div><div class='add'>+</div><div class='add'>+		if (IS_ERR_OR_NULL(map))</div><div class='add'>+			continue;</div><div class='add'>+		if (max77693_mask_reg[i] == MAX77693_REG_INVALID)</div><div class='add'>+			continue;</div><div class='add'>+		if (i &gt;= MUIC_INT1 &amp;&amp; i &lt;= MUIC_INT3)</div><div class='add'>+			max77693_write_reg(map, max77693_mask_reg[i], 0x00);</div><div class='add'>+		else</div><div class='add'>+			max77693_write_reg(map, max77693_mask_reg[i], 0xff);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	domain = irq_domain_add_linear(NULL, MAX77693_IRQ_NR,</div><div class='add'>+					&amp;max77693_irq_domain_ops, max77693);</div><div class='add'>+	if (!domain) {</div><div class='add'>+		dev_err(max77693-&gt;dev, "could not create irq domain\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+	max77693-&gt;irq_domain = domain;</div><div class='add'>+</div><div class='add'>+	ret = request_threaded_irq(max77693-&gt;irq, NULL, max77693_irq_thread,</div><div class='add'>+				   IRQF_TRIGGER_FALLING | IRQF_ONESHOT,</div><div class='add'>+				   "max77693-irq", max77693);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(max77693-&gt;dev, "Failed to request IRQ %d: %d\n",</div><div class='add'>+			max77693-&gt;irq, ret);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void max77693_irq_exit(struct max77693_dev *max77693)</div><div class='add'>+{</div><div class='add'>+	if (max77693-&gt;irq)</div><div class='add'>+		free_irq(max77693-&gt;irq, max77693);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/mfd/max77693.c b/drivers/mfd/max77693.c<br/>new file mode 100644<br/>index 000000000000..e9e4278722f3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/max77693.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/max77693.c</a></div><div class='hunk'>@@ -0,0 +1,249 @@</div><div class='add'>+/*</div><div class='add'>+ * max77693.c - mfd core driver for the MAX 77693</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Samsung Electronics</div><div class='add'>+ * SangYoung Son &lt;hello.son@smasung.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is not provided / owned by Maxim Integrated Products.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA</div><div class='add'>+ *</div><div class='add'>+ * This driver is based on max8997.c</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/mfd/core.h&gt;</div><div class='add'>+#include &lt;linux/mfd/max77693.h&gt;</div><div class='add'>+#include &lt;linux/mfd/max77693-private.h&gt;</div><div class='add'>+#include &lt;linux/regulator/machine.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+</div><div class='add'>+#define I2C_ADDR_PMIC	(0xCC &gt;&gt; 1)	/* Charger, Flash LED */</div><div class='add'>+#define I2C_ADDR_MUIC	(0x4A &gt;&gt; 1)</div><div class='add'>+#define I2C_ADDR_HAPTIC	(0x90 &gt;&gt; 1)</div><div class='add'>+</div><div class='add'>+static struct mfd_cell max77693_devs[] = {</div><div class='add'>+	{ .name = "max77693-pmic", },</div><div class='add'>+	{ .name = "max77693-charger", },</div><div class='add'>+	{ .name = "max77693-flash", },</div><div class='add'>+	{ .name = "max77693-muic", },</div><div class='add'>+	{ .name = "max77693-haptic", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int max77693_read_reg(struct regmap *map, u8 reg, u8 *dest)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(map, reg, &amp;val);</div><div class='add'>+	*dest = val;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(max77693_read_reg);</div><div class='add'>+</div><div class='add'>+int max77693_bulk_read(struct regmap *map, u8 reg, int count, u8 *buf)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_bulk_read(map, reg, buf, count);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(max77693_bulk_read);</div><div class='add'>+</div><div class='add'>+int max77693_write_reg(struct regmap *map, u8 reg, u8 value)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(map, reg, value);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(max77693_write_reg);</div><div class='add'>+</div><div class='add'>+int max77693_bulk_write(struct regmap *map, u8 reg, int count, u8 *buf)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_bulk_write(map, reg, buf, count);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(max77693_bulk_write);</div><div class='add'>+</div><div class='add'>+int max77693_update_reg(struct regmap *map, u8 reg, u8 val, u8 mask)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(map, reg, mask, val);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(max77693_update_reg);</div><div class='add'>+</div><div class='add'>+static const struct regmap_config max77693_regmap_config = {</div><div class='add'>+	.reg_bits = 8,</div><div class='add'>+	.val_bits = 8,</div><div class='add'>+	.max_register = MAX77693_PMIC_REG_END,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int max77693_i2c_probe(struct i2c_client *i2c,</div><div class='add'>+			      const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct max77693_dev *max77693;</div><div class='add'>+	struct max77693_platform_data *pdata = i2c-&gt;dev.platform_data;</div><div class='add'>+	u8 reg_data;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	max77693 = devm_kzalloc(&amp;i2c-&gt;dev,</div><div class='add'>+			sizeof(struct max77693_dev), GFP_KERNEL);</div><div class='add'>+	if (max77693 == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	max77693-&gt;regmap = devm_regmap_init_i2c(i2c, &amp;max77693_regmap_config);</div><div class='add'>+	if (IS_ERR(max77693-&gt;regmap)) {</div><div class='add'>+		ret = PTR_ERR(max77693-&gt;regmap);</div><div class='add'>+		dev_err(max77693-&gt;dev,"failed to allocate register map: %d\n",</div><div class='add'>+				ret);</div><div class='add'>+		goto err_regmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i2c_set_clientdata(i2c, max77693);</div><div class='add'>+	max77693-&gt;dev = &amp;i2c-&gt;dev;</div><div class='add'>+	max77693-&gt;i2c = i2c;</div><div class='add'>+	max77693-&gt;irq = i2c-&gt;irq;</div><div class='add'>+	max77693-&gt;type = id-&gt;driver_data;</div><div class='add'>+</div><div class='add'>+	if (!pdata)</div><div class='add'>+		goto err_regmap;</div><div class='add'>+</div><div class='add'>+	max77693-&gt;wakeup = pdata-&gt;wakeup;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;max77693-&gt;iolock);</div><div class='add'>+</div><div class='add'>+	if (max77693_read_reg(max77693-&gt;regmap,</div><div class='add'>+				MAX77693_PMIC_REG_PMIC_ID2, &amp;reg_data) &lt; 0) {</div><div class='add'>+		dev_err(max77693-&gt;dev, "device not found on this channel\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err_regmap;</div><div class='add'>+	} else</div><div class='add'>+		dev_info(max77693-&gt;dev, "device ID: 0x%x\n", reg_data);</div><div class='add'>+</div><div class='add'>+	max77693-&gt;muic = i2c_new_dummy(i2c-&gt;adapter, I2C_ADDR_MUIC);</div><div class='add'>+	i2c_set_clientdata(max77693-&gt;muic, max77693);</div><div class='add'>+</div><div class='add'>+	max77693-&gt;haptic = i2c_new_dummy(i2c-&gt;adapter, I2C_ADDR_HAPTIC);</div><div class='add'>+	i2c_set_clientdata(max77693-&gt;haptic, max77693);</div><div class='add'>+</div><div class='add'>+	ret = max77693_irq_init(max77693);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_mfd;</div><div class='add'>+</div><div class='add'>+	pm_runtime_set_active(max77693-&gt;dev);</div><div class='add'>+</div><div class='add'>+	ret = mfd_add_devices(max77693-&gt;dev, -1, max77693_devs,</div><div class='add'>+			ARRAY_SIZE(max77693_devs), NULL, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_mfd;</div><div class='add'>+</div><div class='add'>+	device_init_wakeup(max77693-&gt;dev, pdata-&gt;wakeup);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+err_mfd:</div><div class='add'>+	i2c_unregister_device(max77693-&gt;muic);</div><div class='add'>+	i2c_unregister_device(max77693-&gt;haptic);</div><div class='add'>+err_regmap:</div><div class='add'>+	kfree(max77693);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77693_i2c_remove(struct i2c_client *i2c)</div><div class='add'>+{</div><div class='add'>+	struct max77693_dev *max77693 = i2c_get_clientdata(i2c);</div><div class='add'>+</div><div class='add'>+	mfd_remove_devices(max77693-&gt;dev);</div><div class='add'>+	i2c_unregister_device(max77693-&gt;muic);</div><div class='add'>+	i2c_unregister_device(max77693-&gt;haptic);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id max77693_i2c_id[] = {</div><div class='add'>+	{ "max77693", TYPE_MAX77693 },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, max77693_i2c_id);</div><div class='add'>+</div><div class='add'>+static int max77693_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);</div><div class='add'>+	struct max77693_dev *max77693 = i2c_get_clientdata(i2c);</div><div class='add'>+</div><div class='add'>+	if (device_may_wakeup(dev))</div><div class='add'>+		irq_set_irq_wake(max77693-&gt;irq, 1);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77693_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);</div><div class='add'>+	struct max77693_dev *max77693 = i2c_get_clientdata(i2c);</div><div class='add'>+</div><div class='add'>+	if (device_may_wakeup(dev))</div><div class='add'>+		irq_set_irq_wake(max77693-&gt;irq, 0);</div><div class='add'>+	return max77693_irq_resume(max77693);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct dev_pm_ops max77693_pm = {</div><div class='add'>+	.suspend = max77693_suspend,</div><div class='add'>+	.resume = max77693_resume,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct i2c_driver max77693_i2c_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		   .name = "max77693",</div><div class='add'>+		   .owner = THIS_MODULE,</div><div class='add'>+		   .pm = &amp;max77693_pm,</div><div class='add'>+	},</div><div class='add'>+	.probe = max77693_i2c_probe,</div><div class='add'>+	.remove = max77693_i2c_remove,</div><div class='add'>+	.id_table = max77693_i2c_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init max77693_i2c_init(void)</div><div class='add'>+{</div><div class='add'>+	return i2c_add_driver(&amp;max77693_i2c_driver);</div><div class='add'>+}</div><div class='add'>+/* init early so consumer devices can complete system boot */</div><div class='add'>+subsys_initcall(max77693_i2c_init);</div><div class='add'>+</div><div class='add'>+static void __exit max77693_i2c_exit(void)</div><div class='add'>+{</div><div class='add'>+	i2c_del_driver(&amp;max77693_i2c_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(max77693_i2c_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("MAXIM 77693 multi-function core driver");</div><div class='add'>+MODULE_AUTHOR("SangYoung, Son &lt;hello.son@samsung.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c<br/>index 9fd4f63c45cc..f0ea3b8b3e4a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/mc13xxx-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/mc13xxx-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/mc13xxx-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/mc13xxx-core.c</a></div><div class='hunk'>@@ -15,24 +15,13 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/spi/spi.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/core.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/mc13xxx.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_device.h&gt;</div><div class='ctx'> #include &lt;linux/of_gpio.h&gt;</div><div class='ctx'> </div><div class='del'>-struct mc13xxx {</div><div class='del'>-	struct spi_device *spidev;</div><div class='del'>-	struct mutex lock;</div><div class='del'>-	int irq;</div><div class='del'>-	int flags;</div><div class='del'>-</div><div class='del'>-	irq_handler_t irqhandler[MC13XXX_NUM_IRQ];</div><div class='del'>-	void *irqdata[MC13XXX_NUM_IRQ];</div><div class='del'>-</div><div class='del'>-	int adcflags;</div><div class='del'>-};</div><div class='add'>+#include "mc13xxx.h"</div><div class='ctx'> </div><div class='ctx'> #define MC13XXX_IRQSTAT0	0</div><div class='ctx'> #define MC13XXX_IRQSTAT0_ADCDONEI	(1 &lt;&lt; 0)</div><div class='hunk'>@@ -139,34 +128,29 @@ struct mc13xxx {</div><div class='ctx'> </div><div class='ctx'> #define MC13XXX_ADC2		45</div><div class='ctx'> </div><div class='del'>-#define MC13XXX_NUMREGS 0x3f</div><div class='del'>-</div><div class='ctx'> void mc13xxx_lock(struct mc13xxx *mc13xxx)</div><div class='ctx'> {</div><div class='ctx'> 	if (!mutex_trylock(&amp;mc13xxx-&gt;lock)) {</div><div class='del'>-		dev_dbg(&amp;mc13xxx-&gt;spidev-&gt;dev, "wait for %s from %pf\n",</div><div class='add'>+		dev_dbg(mc13xxx-&gt;dev, "wait for %s from %pf\n",</div><div class='ctx'> 				__func__, __builtin_return_address(0));</div><div class='ctx'> </div><div class='ctx'> 		mutex_lock(&amp;mc13xxx-&gt;lock);</div><div class='ctx'> 	}</div><div class='del'>-	dev_dbg(&amp;mc13xxx-&gt;spidev-&gt;dev, "%s from %pf\n",</div><div class='add'>+	dev_dbg(mc13xxx-&gt;dev, "%s from %pf\n",</div><div class='ctx'> 			__func__, __builtin_return_address(0));</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mc13xxx_lock);</div><div class='ctx'> </div><div class='ctx'> void mc13xxx_unlock(struct mc13xxx *mc13xxx)</div><div class='ctx'> {</div><div class='del'>-	dev_dbg(&amp;mc13xxx-&gt;spidev-&gt;dev, "%s from %pf\n",</div><div class='add'>+	dev_dbg(mc13xxx-&gt;dev, "%s from %pf\n",</div><div class='ctx'> 			__func__, __builtin_return_address(0));</div><div class='ctx'> 	mutex_unlock(&amp;mc13xxx-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mc13xxx_unlock);</div><div class='ctx'> </div><div class='del'>-#define MC13XXX_REGOFFSET_SHIFT 25</div><div class='ctx'> int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val)</div><div class='ctx'> {</div><div class='del'>-	struct spi_transfer t;</div><div class='del'>-	struct spi_message m;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!mutex_is_locked(&amp;mc13xxx-&gt;lock));</div><div class='hunk'>@@ -174,84 +158,35 @@ int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val)</div><div class='ctx'> 	if (offset &gt; MC13XXX_NUMREGS)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	*val = offset &lt;&lt; MC13XXX_REGOFFSET_SHIFT;</div><div class='del'>-</div><div class='del'>-	memset(&amp;t, 0, sizeof(t));</div><div class='del'>-</div><div class='del'>-	t.tx_buf = val;</div><div class='del'>-	t.rx_buf = val;</div><div class='del'>-	t.len = sizeof(u32);</div><div class='del'>-</div><div class='del'>-	spi_message_init(&amp;m);</div><div class='del'>-	spi_message_add_tail(&amp;t, &amp;m);</div><div class='del'>-</div><div class='del'>-	ret = spi_sync(mc13xxx-&gt;spidev, &amp;m);</div><div class='del'>-</div><div class='del'>-	/* error in message.status implies error return from spi_sync */</div><div class='del'>-	BUG_ON(!ret &amp;&amp; m.status);</div><div class='add'>+	ret = regmap_read(mc13xxx-&gt;regmap, offset, val);</div><div class='add'>+	dev_vdbg(mc13xxx-&gt;dev, "[0x%02x] -&gt; 0x%06x\n", offset, *val);</div><div class='ctx'> </div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	*val &amp;= 0xffffff;</div><div class='del'>-</div><div class='del'>-	dev_vdbg(&amp;mc13xxx-&gt;spidev-&gt;dev, "[0x%02x] -&gt; 0x%06x\n", offset, *val);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mc13xxx_reg_read);</div><div class='ctx'> </div><div class='ctx'> int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val)</div><div class='ctx'> {</div><div class='del'>-	u32 buf;</div><div class='del'>-	struct spi_transfer t;</div><div class='del'>-	struct spi_message m;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='ctx'> 	BUG_ON(!mutex_is_locked(&amp;mc13xxx-&gt;lock));</div><div class='ctx'> </div><div class='del'>-	dev_vdbg(&amp;mc13xxx-&gt;spidev-&gt;dev, "[0x%02x] &lt;- 0x%06x\n", offset, val);</div><div class='add'>+	dev_vdbg(mc13xxx-&gt;dev, "[0x%02x] &lt;- 0x%06x\n", offset, val);</div><div class='ctx'> </div><div class='ctx'> 	if (offset &gt; MC13XXX_NUMREGS || val &gt; 0xffffff)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	buf = 1 &lt;&lt; 31 | offset &lt;&lt; MC13XXX_REGOFFSET_SHIFT | val;</div><div class='del'>-</div><div class='del'>-	memset(&amp;t, 0, sizeof(t));</div><div class='del'>-</div><div class='del'>-	t.tx_buf = &amp;buf;</div><div class='del'>-	t.rx_buf = &amp;buf;</div><div class='del'>-	t.len = sizeof(u32);</div><div class='del'>-</div><div class='del'>-	spi_message_init(&amp;m);</div><div class='del'>-	spi_message_add_tail(&amp;t, &amp;m);</div><div class='del'>-</div><div class='del'>-	ret = spi_sync(mc13xxx-&gt;spidev, &amp;m);</div><div class='del'>-</div><div class='del'>-	BUG_ON(!ret &amp;&amp; m.status);</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return regmap_write(mc13xxx-&gt;regmap, offset, val);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mc13xxx_reg_write);</div><div class='ctx'> </div><div class='ctx'> int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset,</div><div class='ctx'> 		u32 mask, u32 val)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	u32 valread;</div><div class='del'>-</div><div class='add'>+	BUG_ON(!mutex_is_locked(&amp;mc13xxx-&gt;lock));</div><div class='ctx'> 	BUG_ON(val &amp; ~mask);</div><div class='add'>+	dev_vdbg(mc13xxx-&gt;dev, "[0x%02x] &lt;- 0x%06x (mask: 0x%06x)\n",</div><div class='add'>+			offset, val, mask);</div><div class='ctx'> </div><div class='del'>-	ret = mc13xxx_reg_read(mc13xxx, offset, &amp;valread);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	valread = (valread &amp; ~mask) | val;</div><div class='del'>-</div><div class='del'>-	return mc13xxx_reg_write(mc13xxx, offset, valread);</div><div class='add'>+	return regmap_update_bits(mc13xxx-&gt;regmap, offset, mask, val);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mc13xxx_reg_rmw);</div><div class='ctx'> </div><div class='hunk'>@@ -439,7 +374,7 @@ static int mc13xxx_irq_handle(struct mc13xxx *mc13xxx,</div><div class='ctx'> 			if (handled == IRQ_HANDLED)</div><div class='ctx'> 				num_handled++;</div><div class='ctx'> 		} else {</div><div class='del'>-			dev_err(&amp;mc13xxx-&gt;spidev-&gt;dev,</div><div class='add'>+			dev_err(mc13xxx-&gt;dev,</div><div class='ctx'> 					"BUG: irq %u but no handler\n",</div><div class='ctx'> 					baseirq + irq);</div><div class='ctx'> </div><div class='hunk'>@@ -475,25 +410,23 @@ static irqreturn_t mc13xxx_irq_thread(int irq, void *data)</div><div class='ctx'> 	return IRQ_RETVAL(handled);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum mc13xxx_id {</div><div class='del'>-	MC13XXX_ID_MC13783,</div><div class='del'>-	MC13XXX_ID_MC13892,</div><div class='del'>-	MC13XXX_ID_INVALID,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const char *mc13xxx_chipname[] = {</div><div class='ctx'> 	[MC13XXX_ID_MC13783] = "mc13783",</div><div class='ctx'> 	[MC13XXX_ID_MC13892] = "mc13892",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define maskval(reg, mask)	(((reg) &amp; (mask)) &gt;&gt; __ffs(mask))</div><div class='del'>-static int mc13xxx_identify(struct mc13xxx *mc13xxx, enum mc13xxx_id *id)</div><div class='add'>+static int mc13xxx_identify(struct mc13xxx *mc13xxx)</div><div class='ctx'> {</div><div class='ctx'> 	u32 icid;</div><div class='ctx'> 	u32 revision;</div><div class='del'>-	const char *name;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Get the generation ID from register 46, as apparently some older</div><div class='add'>+	 * IC revisions only have this info at this location. Newer ICs seem to</div><div class='add'>+	 * have both.</div><div class='add'>+	 */</div><div class='ctx'> 	ret = mc13xxx_reg_read(mc13xxx, 46, &amp;icid);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -502,26 +435,23 @@ static int mc13xxx_identify(struct mc13xxx *mc13xxx, enum mc13xxx_id *id)</div><div class='ctx'> </div><div class='ctx'> 	switch (icid) {</div><div class='ctx'> 	case 2:</div><div class='del'>-		*id = MC13XXX_ID_MC13783;</div><div class='del'>-		name = "mc13783";</div><div class='add'>+		mc13xxx-&gt;ictype = MC13XXX_ID_MC13783;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 7:</div><div class='del'>-		*id = MC13XXX_ID_MC13892;</div><div class='del'>-		name = "mc13892";</div><div class='add'>+		mc13xxx-&gt;ictype = MC13XXX_ID_MC13892;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		*id = MC13XXX_ID_INVALID;</div><div class='add'>+		mc13xxx-&gt;ictype = MC13XXX_ID_INVALID;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (*id == MC13XXX_ID_MC13783 || *id == MC13XXX_ID_MC13892) {</div><div class='add'>+	if (mc13xxx-&gt;ictype == MC13XXX_ID_MC13783 ||</div><div class='add'>+			mc13xxx-&gt;ictype == MC13XXX_ID_MC13892) {</div><div class='ctx'> 		ret = mc13xxx_reg_read(mc13xxx, MC13XXX_REVISION, &amp;revision);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='ctx'> </div><div class='del'>-		dev_info(&amp;mc13xxx-&gt;spidev-&gt;dev, "%s: rev: %d.%d, "</div><div class='add'>+		dev_info(mc13xxx-&gt;dev, "%s: rev: %d.%d, "</div><div class='ctx'> 				"fin: %d, fab: %d, icid: %d/%d\n",</div><div class='del'>-				mc13xxx_chipname[*id],</div><div class='add'>+				mc13xxx_chipname[mc13xxx-&gt;ictype],</div><div class='ctx'> 				maskval(revision, MC13XXX_REVISION_REVFULL),</div><div class='ctx'> 				maskval(revision, MC13XXX_REVISION_REVMETAL),</div><div class='ctx'> 				maskval(revision, MC13XXX_REVISION_FIN),</div><div class='hunk'>@@ -530,26 +460,12 @@ static int mc13xxx_identify(struct mc13xxx *mc13xxx, enum mc13xxx_id *id)</div><div class='ctx'> 				maskval(revision, MC13XXX_REVISION_ICIDCODE));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (*id != MC13XXX_ID_INVALID) {</div><div class='del'>-		const struct spi_device_id *devid =</div><div class='del'>-			spi_get_device_id(mc13xxx-&gt;spidev);</div><div class='del'>-		if (!devid || devid-&gt;driver_data != *id)</div><div class='del'>-			dev_warn(&amp;mc13xxx-&gt;spidev-&gt;dev, "device id doesn't "</div><div class='del'>-					"match auto detection!\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return (mc13xxx-&gt;ictype == MC13XXX_ID_INVALID) ? -ENODEV : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *mc13xxx_get_chipname(struct mc13xxx *mc13xxx)</div><div class='ctx'> {</div><div class='del'>-	const struct spi_device_id *devid =</div><div class='del'>-		spi_get_device_id(mc13xxx-&gt;spidev);</div><div class='del'>-</div><div class='del'>-	if (!devid)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	return mc13xxx_chipname[devid-&gt;driver_data];</div><div class='add'>+	return mc13xxx_chipname[mc13xxx-&gt;ictype];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mc13xxx_get_flags(struct mc13xxx *mc13xxx)</div><div class='hunk'>@@ -592,7 +508,7 @@ int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode,</div><div class='ctx'> 	};</div><div class='ctx'> 	init_completion(&amp;adcdone_data.done);</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;mc13xxx-&gt;spidev-&gt;dev, "%s\n", __func__);</div><div class='add'>+	dev_dbg(mc13xxx-&gt;dev, "%s\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mc13xxx_lock(mc13xxx);</div><div class='ctx'> </div><div class='hunk'>@@ -637,7 +553,8 @@ int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode,</div><div class='ctx'> 	adc1 |= ato &lt;&lt; MC13783_ADC1_ATO_SHIFT;</div><div class='ctx'> 	if (atox)</div><div class='ctx'> 		adc1 |= MC13783_ADC1_ATOX;</div><div class='del'>-	dev_dbg(&amp;mc13xxx-&gt;spidev-&gt;dev, "%s: request irq\n", __func__);</div><div class='add'>+</div><div class='add'>+	dev_dbg(mc13xxx-&gt;dev, "%s: request irq\n", __func__);</div><div class='ctx'> 	mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE,</div><div class='ctx'> 			mc13xxx_handler_adcdone, __func__, &amp;adcdone_data);</div><div class='ctx'> 	mc13xxx_irq_ack(mc13xxx, MC13XXX_IRQ_ADCDONE);</div><div class='hunk'>@@ -695,7 +612,7 @@ static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx,</div><div class='ctx'> 	if (!cell.name)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	return mfd_add_devices(&amp;mc13xxx-&gt;spidev-&gt;dev, -1, &amp;cell, 1, NULL, 0);</div><div class='add'>+	return mfd_add_devices(mc13xxx-&gt;dev, -1, &amp;cell, 1, NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format)</div><div class='hunk'>@@ -706,7 +623,7 @@ static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format)</div><div class='ctx'> #ifdef CONFIG_OF</div><div class='ctx'> static int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)</div><div class='ctx'> {</div><div class='del'>-	struct device_node *np = mc13xxx-&gt;spidev-&gt;dev.of_node;</div><div class='add'>+	struct device_node *np = mc13xxx-&gt;dev-&gt;of_node;</div><div class='ctx'> </div><div class='ctx'> 	if (!np)</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -732,55 +649,15 @@ static inline int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static const struct spi_device_id mc13xxx_device_id[] = {</div><div class='del'>-	{</div><div class='del'>-		.name = "mc13783",</div><div class='del'>-		.driver_data = MC13XXX_ID_MC13783,</div><div class='del'>-	}, {</div><div class='del'>-		.name = "mc13892",</div><div class='del'>-		.driver_data = MC13XXX_ID_MC13892,</div><div class='del'>-	}, {</div><div class='del'>-		/* sentinel */</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(spi, mc13xxx_device_id);</div><div class='del'>-</div><div class='del'>-static const struct of_device_id mc13xxx_dt_ids[] = {</div><div class='del'>-	{ .compatible = "fsl,mc13783", .data = (void *) MC13XXX_ID_MC13783, },</div><div class='del'>-	{ .compatible = "fsl,mc13892", .data = (void *) MC13XXX_ID_MC13892, },</div><div class='del'>-	{ /* sentinel */ }</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(of, mc13xxx_dt_ids);</div><div class='del'>-</div><div class='del'>-static int mc13xxx_probe(struct spi_device *spi)</div><div class='add'>+int mc13xxx_common_init(struct mc13xxx *mc13xxx,</div><div class='add'>+		struct mc13xxx_platform_data *pdata, int irq)</div><div class='ctx'> {</div><div class='del'>-	const struct of_device_id *of_id;</div><div class='del'>-	struct spi_driver *sdrv = to_spi_driver(spi-&gt;dev.driver);</div><div class='del'>-	struct mc13xxx *mc13xxx;</div><div class='del'>-	struct mc13xxx_platform_data *pdata = dev_get_platdata(&amp;spi-&gt;dev);</div><div class='del'>-	enum mc13xxx_id id;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	of_id = of_match_device(mc13xxx_dt_ids, &amp;spi-&gt;dev);</div><div class='del'>-	if (of_id)</div><div class='del'>-		sdrv-&gt;id_table = &amp;mc13xxx_device_id[(enum mc13xxx_id) of_id-&gt;data];</div><div class='del'>-</div><div class='del'>-	mc13xxx = kzalloc(sizeof(*mc13xxx), GFP_KERNEL);</div><div class='del'>-	if (!mc13xxx)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	dev_set_drvdata(&amp;spi-&gt;dev, mc13xxx);</div><div class='del'>-	spi-&gt;mode = SPI_MODE_0 | SPI_CS_HIGH;</div><div class='del'>-	spi-&gt;bits_per_word = 32;</div><div class='del'>-	spi_setup(spi);</div><div class='del'>-</div><div class='del'>-	mc13xxx-&gt;spidev = spi;</div><div class='del'>-</div><div class='del'>-	mutex_init(&amp;mc13xxx-&gt;lock);</div><div class='ctx'> 	mc13xxx_lock(mc13xxx);</div><div class='ctx'> </div><div class='del'>-	ret = mc13xxx_identify(mc13xxx, &amp;id);</div><div class='del'>-	if (ret || id == MC13XXX_ID_INVALID)</div><div class='add'>+	ret = mc13xxx_identify(mc13xxx);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto err_revision;</div><div class='ctx'> </div><div class='ctx'> 	/* mask all irqs */</div><div class='hunk'>@@ -792,18 +669,19 @@ static int mc13xxx_probe(struct spi_device *spi)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_mask;</div><div class='ctx'> </div><div class='del'>-	ret = request_threaded_irq(spi-&gt;irq, NULL, mc13xxx_irq_thread,</div><div class='add'>+	ret = request_threaded_irq(irq, NULL, mc13xxx_irq_thread,</div><div class='ctx'> 			IRQF_ONESHOT | IRQF_TRIGGER_HIGH, "mc13xxx", mc13xxx);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='ctx'> err_mask:</div><div class='ctx'> err_revision:</div><div class='ctx'> 		mc13xxx_unlock(mc13xxx);</div><div class='del'>-		dev_set_drvdata(&amp;spi-&gt;dev, NULL);</div><div class='ctx'> 		kfree(mc13xxx);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mc13xxx-&gt;irq = irq;</div><div class='add'>+</div><div class='ctx'> 	mc13xxx_unlock(mc13xxx);</div><div class='ctx'> </div><div class='ctx'> 	if (mc13xxx_probe_flags_dt(mc13xxx) &lt; 0 &amp;&amp; pdata)</div><div class='hunk'>@@ -813,7 +691,8 @@ err_revision:</div><div class='ctx'> 		mc13xxx_add_subdevice(mc13xxx, "%s-adc");</div><div class='ctx'> </div><div class='ctx'> 	if (mc13xxx-&gt;flags &amp; MC13XXX_USE_CODEC)</div><div class='del'>-		mc13xxx_add_subdevice(mc13xxx, "%s-codec");</div><div class='add'>+		mc13xxx_add_subdevice_pdata(mc13xxx, "%s-codec",</div><div class='add'>+					pdata-&gt;codec, sizeof(*pdata-&gt;codec));</div><div class='ctx'> </div><div class='ctx'> 	if (mc13xxx-&gt;flags &amp; MC13XXX_USE_RTC)</div><div class='ctx'> 		mc13xxx_add_subdevice(mc13xxx, "%s-rtc");</div><div class='hunk'>@@ -837,42 +716,19 @@ err_revision:</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(mc13xxx_common_init);</div><div class='ctx'> </div><div class='del'>-static int __devexit mc13xxx_remove(struct spi_device *spi)</div><div class='add'>+void mc13xxx_common_cleanup(struct mc13xxx *mc13xxx)</div><div class='ctx'> {</div><div class='del'>-	struct mc13xxx *mc13xxx = dev_get_drvdata(&amp;spi-&gt;dev);</div><div class='add'>+	free_irq(mc13xxx-&gt;irq, mc13xxx);</div><div class='ctx'> </div><div class='del'>-	free_irq(mc13xxx-&gt;spidev-&gt;irq, mc13xxx);</div><div class='add'>+	mfd_remove_devices(mc13xxx-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	mfd_remove_devices(&amp;spi-&gt;dev);</div><div class='add'>+	regmap_exit(mc13xxx-&gt;regmap);</div><div class='ctx'> </div><div class='ctx'> 	kfree(mc13xxx);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct spi_driver mc13xxx_driver = {</div><div class='del'>-	.id_table = mc13xxx_device_id,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "mc13xxx",</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='del'>-		.of_match_table = mc13xxx_dt_ids,</div><div class='del'>-	},</div><div class='del'>-	.probe = mc13xxx_probe,</div><div class='del'>-	.remove = __devexit_p(mc13xxx_remove),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mc13xxx_init(void)</div><div class='del'>-{</div><div class='del'>-	return spi_register_driver(&amp;mc13xxx_driver);</div><div class='del'>-}</div><div class='del'>-subsys_initcall(mc13xxx_init);</div><div class='del'>-</div><div class='del'>-static void __exit mc13xxx_exit(void)</div><div class='del'>-{</div><div class='del'>-	spi_unregister_driver(&amp;mc13xxx_driver);</div><div class='ctx'> }</div><div class='del'>-module_exit(mc13xxx_exit);</div><div class='add'>+EXPORT_SYMBOL_GPL(mc13xxx_common_cleanup);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC");</div><div class='ctx'> MODULE_AUTHOR("Uwe Kleine-Koenig &lt;u.kleine-koenig@pengutronix.de&gt;");</div><div class='head'>diff --git a/drivers/mfd/mc13xxx-i2c.c b/drivers/mfd/mc13xxx-i2c.c<br/>new file mode 100644<br/>index 000000000000..d22501dad6a6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/mc13xxx-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/mc13xxx-i2c.c</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2009-2010 Creative Product Design</div><div class='add'>+ * Marc Reilly marc@cpdesign.com.au</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it under</div><div class='add'>+ * the terms of the GNU General Public License version 2 as published by the</div><div class='add'>+ * Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/mfd/core.h&gt;</div><div class='add'>+#include &lt;linux/mfd/mc13xxx.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of_gpio.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mc13xxx.h"</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id mc13xxx_i2c_device_id[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "mc13892",</div><div class='add'>+		.driver_data = MC13XXX_ID_MC13892,</div><div class='add'>+	}, {</div><div class='add'>+		/* sentinel */</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, mc13xxx_i2c_device_id);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mc13xxx_dt_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "fsl,mc13892",</div><div class='add'>+		.data = (void *) &amp;mc13xxx_i2c_device_id[0],</div><div class='add'>+	}, {</div><div class='add'>+		/* sentinel */</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, mc13xxx_dt_ids);</div><div class='add'>+</div><div class='add'>+static struct regmap_config mc13xxx_regmap_i2c_config = {</div><div class='add'>+	.reg_bits = 8,</div><div class='add'>+	.val_bits = 24,</div><div class='add'>+</div><div class='add'>+	.max_register = MC13XXX_NUMREGS,</div><div class='add'>+</div><div class='add'>+	.cache_type = REGCACHE_NONE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mc13xxx_i2c_probe(struct i2c_client *client,</div><div class='add'>+		const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	const struct of_device_id *of_id;</div><div class='add'>+	struct i2c_driver *idrv = to_i2c_driver(client-&gt;dev.driver);</div><div class='add'>+	struct mc13xxx *mc13xxx;</div><div class='add'>+	struct mc13xxx_platform_data *pdata = dev_get_platdata(&amp;client-&gt;dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	of_id = of_match_device(mc13xxx_dt_ids, &amp;client-&gt;dev);</div><div class='add'>+	if (of_id)</div><div class='add'>+		idrv-&gt;id_table = (const struct i2c_device_id*) of_id-&gt;data;</div><div class='add'>+</div><div class='add'>+	mc13xxx = kzalloc(sizeof(*mc13xxx), GFP_KERNEL);</div><div class='add'>+	if (!mc13xxx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;client-&gt;dev, mc13xxx);</div><div class='add'>+</div><div class='add'>+	mc13xxx-&gt;dev = &amp;client-&gt;dev;</div><div class='add'>+	mutex_init(&amp;mc13xxx-&gt;lock);</div><div class='add'>+</div><div class='add'>+	mc13xxx-&gt;regmap = regmap_init_i2c(client, &amp;mc13xxx_regmap_i2c_config);</div><div class='add'>+	if (IS_ERR(mc13xxx-&gt;regmap)) {</div><div class='add'>+		ret = PTR_ERR(mc13xxx-&gt;regmap);</div><div class='add'>+		dev_err(mc13xxx-&gt;dev, "Failed to initialize register map: %d\n",</div><div class='add'>+				ret);</div><div class='add'>+		dev_set_drvdata(&amp;client-&gt;dev, NULL);</div><div class='add'>+		kfree(mc13xxx);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mc13xxx_common_init(mc13xxx, pdata, client-&gt;irq);</div><div class='add'>+</div><div class='add'>+	if (ret == 0 &amp;&amp; (id-&gt;driver_data != mc13xxx-&gt;ictype))</div><div class='add'>+		dev_warn(mc13xxx-&gt;dev,</div><div class='add'>+				"device id doesn't match auto detection!\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit mc13xxx_i2c_remove(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct mc13xxx *mc13xxx = dev_get_drvdata(&amp;client-&gt;dev);</div><div class='add'>+</div><div class='add'>+	mc13xxx_common_cleanup(mc13xxx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct i2c_driver mc13xxx_i2c_driver = {</div><div class='add'>+	.id_table = mc13xxx_i2c_device_id,</div><div class='add'>+	.driver = {</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.name = "mc13xxx",</div><div class='add'>+		.of_match_table = mc13xxx_dt_ids,</div><div class='add'>+	},</div><div class='add'>+	.probe = mc13xxx_i2c_probe,</div><div class='add'>+	.remove = __devexit_p(mc13xxx_i2c_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init mc13xxx_i2c_init(void)</div><div class='add'>+{</div><div class='add'>+	return i2c_add_driver(&amp;mc13xxx_i2c_driver);</div><div class='add'>+}</div><div class='add'>+subsys_initcall(mc13xxx_i2c_init);</div><div class='add'>+</div><div class='add'>+static void __exit mc13xxx_i2c_exit(void)</div><div class='add'>+{</div><div class='add'>+	i2c_del_driver(&amp;mc13xxx_i2c_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(mc13xxx_i2c_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("i2c driver for Freescale MC13XXX PMIC");</div><div class='add'>+MODULE_AUTHOR("Marc Reilly &lt;marc@cpdesign.com.au");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/mfd/mc13xxx-spi.c b/drivers/mfd/mc13xxx-spi.c<br/>new file mode 100644<br/>index 000000000000..3fcdab3eb8eb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/mc13xxx-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/mc13xxx-spi.c</a></div><div class='hunk'>@@ -0,0 +1,140 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2009-2010 Pengutronix</div><div class='add'>+ * Uwe Kleine-Koenig &lt;u.kleine-koenig@pengutronix.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * loosely based on an earlier driver that has</div><div class='add'>+ * Copyright 2009 Pengutronix, Sascha Hauer &lt;s.hauer@pengutronix.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it under</div><div class='add'>+ * the terms of the GNU General Public License version 2 as published by the</div><div class='add'>+ * Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/mfd/core.h&gt;</div><div class='add'>+#include &lt;linux/mfd/mc13xxx.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of_gpio.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mc13xxx.h"</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id mc13xxx_device_id[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "mc13783",</div><div class='add'>+		.driver_data = MC13XXX_ID_MC13783,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "mc13892",</div><div class='add'>+		.driver_data = MC13XXX_ID_MC13892,</div><div class='add'>+	}, {</div><div class='add'>+		/* sentinel */</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(spi, mc13xxx_device_id);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mc13xxx_dt_ids[] = {</div><div class='add'>+	{ .compatible = "fsl,mc13783", .data = (void *) MC13XXX_ID_MC13783, },</div><div class='add'>+	{ .compatible = "fsl,mc13892", .data = (void *) MC13XXX_ID_MC13892, },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, mc13xxx_dt_ids);</div><div class='add'>+</div><div class='add'>+static struct regmap_config mc13xxx_regmap_spi_config = {</div><div class='add'>+	.reg_bits = 7,</div><div class='add'>+	.pad_bits = 1,</div><div class='add'>+	.val_bits = 24,</div><div class='add'>+</div><div class='add'>+	.max_register = MC13XXX_NUMREGS,</div><div class='add'>+</div><div class='add'>+	.cache_type = REGCACHE_NONE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mc13xxx_spi_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	const struct of_device_id *of_id;</div><div class='add'>+	struct spi_driver *sdrv = to_spi_driver(spi-&gt;dev.driver);</div><div class='add'>+	struct mc13xxx *mc13xxx;</div><div class='add'>+	struct mc13xxx_platform_data *pdata = dev_get_platdata(&amp;spi-&gt;dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	of_id = of_match_device(mc13xxx_dt_ids, &amp;spi-&gt;dev);</div><div class='add'>+	if (of_id)</div><div class='add'>+		sdrv-&gt;id_table = &amp;mc13xxx_device_id[(enum mc13xxx_id) of_id-&gt;data];</div><div class='add'>+</div><div class='add'>+	mc13xxx = kzalloc(sizeof(*mc13xxx), GFP_KERNEL);</div><div class='add'>+	if (!mc13xxx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;spi-&gt;dev, mc13xxx);</div><div class='add'>+	spi-&gt;mode = SPI_MODE_0 | SPI_CS_HIGH;</div><div class='add'>+	spi-&gt;bits_per_word = 32;</div><div class='add'>+</div><div class='add'>+	mc13xxx-&gt;dev = &amp;spi-&gt;dev;</div><div class='add'>+	mutex_init(&amp;mc13xxx-&gt;lock);</div><div class='add'>+</div><div class='add'>+	mc13xxx-&gt;regmap = regmap_init_spi(spi, &amp;mc13xxx_regmap_spi_config);</div><div class='add'>+	if (IS_ERR(mc13xxx-&gt;regmap)) {</div><div class='add'>+		ret = PTR_ERR(mc13xxx-&gt;regmap);</div><div class='add'>+		dev_err(mc13xxx-&gt;dev, "Failed to initialize register map: %d\n",</div><div class='add'>+				ret);</div><div class='add'>+		dev_set_drvdata(&amp;spi-&gt;dev, NULL);</div><div class='add'>+		kfree(mc13xxx);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mc13xxx_common_init(mc13xxx, pdata, spi-&gt;irq);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_set_drvdata(&amp;spi-&gt;dev, NULL);</div><div class='add'>+	} else {</div><div class='add'>+		const struct spi_device_id *devid =</div><div class='add'>+			spi_get_device_id(spi);</div><div class='add'>+		if (!devid || devid-&gt;driver_data != mc13xxx-&gt;ictype)</div><div class='add'>+			dev_warn(mc13xxx-&gt;dev,</div><div class='add'>+				"device id doesn't match auto detection!\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit mc13xxx_spi_remove(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct mc13xxx *mc13xxx = dev_get_drvdata(&amp;spi-&gt;dev);</div><div class='add'>+</div><div class='add'>+	mc13xxx_common_cleanup(mc13xxx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct spi_driver mc13xxx_spi_driver = {</div><div class='add'>+	.id_table = mc13xxx_device_id,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "mc13xxx",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = mc13xxx_dt_ids,</div><div class='add'>+	},</div><div class='add'>+	.probe = mc13xxx_spi_probe,</div><div class='add'>+	.remove = __devexit_p(mc13xxx_spi_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init mc13xxx_init(void)</div><div class='add'>+{</div><div class='add'>+	return spi_register_driver(&amp;mc13xxx_spi_driver);</div><div class='add'>+}</div><div class='add'>+subsys_initcall(mc13xxx_init);</div><div class='add'>+</div><div class='add'>+static void __exit mc13xxx_exit(void)</div><div class='add'>+{</div><div class='add'>+	spi_unregister_driver(&amp;mc13xxx_spi_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(mc13xxx_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC");</div><div class='add'>+MODULE_AUTHOR("Uwe Kleine-Koenig &lt;u.kleine-koenig@pengutronix.de&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/mfd/mc13xxx.h b/drivers/mfd/mc13xxx.h<br/>new file mode 100644<br/>index 000000000000..bbba06feea06<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/mc13xxx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/mc13xxx.h</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Creative Product Design</div><div class='add'>+ * Marc Reilly &lt;marc@cpdesign.com.au&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it under</div><div class='add'>+ * the terms of the GNU General Public License version 2 as published by the</div><div class='add'>+ * Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+#ifndef __DRIVERS_MFD_MC13XXX_H</div><div class='add'>+#define __DRIVERS_MFD_MC13XXX_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/mfd/mc13xxx.h&gt;</div><div class='add'>+</div><div class='add'>+enum mc13xxx_id {</div><div class='add'>+	MC13XXX_ID_MC13783,</div><div class='add'>+	MC13XXX_ID_MC13892,</div><div class='add'>+	MC13XXX_ID_INVALID,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MC13XXX_NUMREGS 0x3f</div><div class='add'>+</div><div class='add'>+struct mc13xxx {</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+</div><div class='add'>+	struct device *dev;</div><div class='add'>+	enum mc13xxx_id ictype;</div><div class='add'>+</div><div class='add'>+	struct mutex lock;</div><div class='add'>+	int irq;</div><div class='add'>+	int flags;</div><div class='add'>+</div><div class='add'>+	irq_handler_t irqhandler[MC13XXX_NUM_IRQ];</div><div class='add'>+	void *irqdata[MC13XXX_NUM_IRQ];</div><div class='add'>+</div><div class='add'>+	int adcflags;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mc13xxx_common_init(struct mc13xxx *mc13xxx,</div><div class='add'>+		struct mc13xxx_platform_data *pdata, int irq);</div><div class='add'>+</div><div class='add'>+void mc13xxx_common_cleanup(struct mc13xxx *mc13xxx);</div><div class='add'>+</div><div class='add'>+#endif /* __DRIVERS_MFD_MC13XXX_H */</div><div class='head'>diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c<br/>index c8aae6640e64..7e96bb229724 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/omap-usb-host.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/omap-usb-host.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/omap-usb-host.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/omap-usb-host.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;plat/cpu.h&gt;</div><div class='ctx'> #include &lt;plat/usb.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c<br/>new file mode 100644<br/>index 000000000000..00c0aba7eba0<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/palmas.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/palmas.c</a></div><div class='hunk'>@@ -0,0 +1,509 @@</div><div class='add'>+/*</div><div class='add'>+ * TI Palmas MFD Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2011-2012 Texas Instruments Inc.</div><div class='add'>+ *</div><div class='add'>+ * Author: Graeme Gregory &lt;gg@slimlogic.co.uk&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under  the terms of the GNU General  Public License as published by the</div><div class='add'>+ *  Free Software Foundation;  either version 2 of the License, or (at your</div><div class='add'>+ *  option) any later version.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/moduleparam.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/mfd/core.h&gt;</div><div class='add'>+#include &lt;linux/mfd/palmas.h&gt;</div><div class='add'>+</div><div class='add'>+static const struct resource gpadc_resource[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "EOC_SW",</div><div class='add'>+		.start = PALMAS_GPADC_EOC_SW_IRQ,</div><div class='add'>+		.end = PALMAS_GPADC_EOC_SW_IRQ,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct resource usb_resource[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "ID",</div><div class='add'>+		.start = PALMAS_ID_OTG_IRQ,</div><div class='add'>+		.end = PALMAS_ID_OTG_IRQ,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "ID_WAKEUP",</div><div class='add'>+		.start = PALMAS_ID_IRQ,</div><div class='add'>+		.end = PALMAS_ID_IRQ,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "VBUS",</div><div class='add'>+		.start = PALMAS_VBUS_OTG_IRQ,</div><div class='add'>+		.end = PALMAS_VBUS_OTG_IRQ,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "VBUS_WAKEUP",</div><div class='add'>+		.start = PALMAS_VBUS_IRQ,</div><div class='add'>+		.end = PALMAS_VBUS_IRQ,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct resource rtc_resource[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "RTC_ALARM",</div><div class='add'>+		.start = PALMAS_RTC_ALARM_IRQ,</div><div class='add'>+		.end = PALMAS_RTC_ALARM_IRQ,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct resource pwron_resource[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "PWRON_BUTTON",</div><div class='add'>+		.start = PALMAS_PWRON_IRQ,</div><div class='add'>+		.end = PALMAS_PWRON_IRQ,</div><div class='add'>+		.flags = IORESOURCE_IRQ,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum palmas_ids {</div><div class='add'>+	PALMAS_PMIC_ID,</div><div class='add'>+	PALMAS_GPIO_ID,</div><div class='add'>+	PALMAS_LEDS_ID,</div><div class='add'>+	PALMAS_WDT_ID,</div><div class='add'>+	PALMAS_RTC_ID,</div><div class='add'>+	PALMAS_PWRBUTTON_ID,</div><div class='add'>+	PALMAS_GPADC_ID,</div><div class='add'>+	PALMAS_RESOURCE_ID,</div><div class='add'>+	PALMAS_CLK_ID,</div><div class='add'>+	PALMAS_PWM_ID,</div><div class='add'>+	PALMAS_USB_ID,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mfd_cell palmas_children[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "palmas-pmic",</div><div class='add'>+		.id = PALMAS_PMIC_ID,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "palmas-gpio",</div><div class='add'>+		.id = PALMAS_GPIO_ID,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "palmas-leds",</div><div class='add'>+		.id = PALMAS_LEDS_ID,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "palmas-wdt",</div><div class='add'>+		.id = PALMAS_WDT_ID,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "palmas-rtc",</div><div class='add'>+		.num_resources = ARRAY_SIZE(rtc_resource),</div><div class='add'>+		.resources = rtc_resource,</div><div class='add'>+		.id = PALMAS_RTC_ID,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "palmas-pwrbutton",</div><div class='add'>+		.num_resources = ARRAY_SIZE(pwron_resource),</div><div class='add'>+		.resources = pwron_resource,</div><div class='add'>+		.id = PALMAS_PWRBUTTON_ID,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "palmas-gpadc",</div><div class='add'>+		.num_resources = ARRAY_SIZE(gpadc_resource),</div><div class='add'>+		.resources = gpadc_resource,</div><div class='add'>+		.id = PALMAS_GPADC_ID,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "palmas-resource",</div><div class='add'>+		.id = PALMAS_RESOURCE_ID,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "palmas-clk",</div><div class='add'>+		.id = PALMAS_CLK_ID,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "palmas-pwm",</div><div class='add'>+		.id = PALMAS_PWM_ID,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "palmas-usb",</div><div class='add'>+		.num_resources = ARRAY_SIZE(usb_resource),</div><div class='add'>+		.resources = usb_resource,</div><div class='add'>+		.id = PALMAS_USB_ID,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = {</div><div class='add'>+	{</div><div class='add'>+		.reg_bits = 8,</div><div class='add'>+		.val_bits = 8,</div><div class='add'>+		.max_register = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,</div><div class='add'>+					PALMAS_PRIMARY_SECONDARY_PAD3),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.reg_bits = 8,</div><div class='add'>+		.val_bits = 8,</div><div class='add'>+		.max_register = PALMAS_BASE_TO_REG(PALMAS_GPADC_BASE,</div><div class='add'>+					PALMAS_GPADC_SMPS_VSEL_MONITORING),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.reg_bits = 8,</div><div class='add'>+		.val_bits = 8,</div><div class='add'>+		.max_register = PALMAS_BASE_TO_REG(PALMAS_TRIM_GPADC_BASE,</div><div class='add'>+					PALMAS_GPADC_TRIM16),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_irq palmas_irqs[] = {</div><div class='add'>+	/* INT1 IRQs */</div><div class='add'>+	[PALMAS_CHARG_DET_N_VBUS_OVV_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_PWRON_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT1_STATUS_PWRON,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_LONG_PRESS_KEY_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT1_STATUS_LONG_PRESS_KEY,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_RPWRON_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT1_STATUS_RPWRON,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_PWRDOWN_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT1_STATUS_PWRDOWN,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_HOTDIE_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT1_STATUS_HOTDIE,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_VSYS_MON_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT1_STATUS_VSYS_MON,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_VBAT_MON_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT1_STATUS_VBAT_MON,</div><div class='add'>+	},</div><div class='add'>+	/* INT2 IRQs*/</div><div class='add'>+	[PALMAS_RTC_ALARM_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT2_STATUS_RTC_ALARM,</div><div class='add'>+		.reg_offset = 1,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_RTC_TIMER_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT2_STATUS_RTC_TIMER,</div><div class='add'>+		.reg_offset = 1,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_WDT_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT2_STATUS_WDT,</div><div class='add'>+		.reg_offset = 1,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_BATREMOVAL_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT2_STATUS_BATREMOVAL,</div><div class='add'>+		.reg_offset = 1,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_RESET_IN_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT2_STATUS_RESET_IN,</div><div class='add'>+		.reg_offset = 1,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_FBI_BB_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT2_STATUS_FBI_BB,</div><div class='add'>+		.reg_offset = 1,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_SHORT_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT2_STATUS_SHORT,</div><div class='add'>+		.reg_offset = 1,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_VAC_ACOK_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT2_STATUS_VAC_ACOK,</div><div class='add'>+		.reg_offset = 1,</div><div class='add'>+	},</div><div class='add'>+	/* INT3 IRQs */</div><div class='add'>+	[PALMAS_GPADC_AUTO_0_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT3_STATUS_GPADC_AUTO_0,</div><div class='add'>+		.reg_offset = 2,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_GPADC_AUTO_1_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT3_STATUS_GPADC_AUTO_1,</div><div class='add'>+		.reg_offset = 2,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_GPADC_EOC_SW_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT3_STATUS_GPADC_EOC_SW,</div><div class='add'>+		.reg_offset = 2,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_GPADC_EOC_RT_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT3_STATUS_GPADC_EOC_RT,</div><div class='add'>+		.reg_offset = 2,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_ID_OTG_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT3_STATUS_ID_OTG,</div><div class='add'>+		.reg_offset = 2,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_ID_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT3_STATUS_ID,</div><div class='add'>+		.reg_offset = 2,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_VBUS_OTG_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT3_STATUS_VBUS_OTG,</div><div class='add'>+		.reg_offset = 2,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_VBUS_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT3_STATUS_VBUS,</div><div class='add'>+		.reg_offset = 2,</div><div class='add'>+	},</div><div class='add'>+	/* INT4 IRQs */</div><div class='add'>+	[PALMAS_GPIO_0_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT4_STATUS_GPIO_0,</div><div class='add'>+		.reg_offset = 3,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_GPIO_1_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT4_STATUS_GPIO_1,</div><div class='add'>+		.reg_offset = 3,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_GPIO_2_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT4_STATUS_GPIO_2,</div><div class='add'>+		.reg_offset = 3,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_GPIO_3_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT4_STATUS_GPIO_3,</div><div class='add'>+		.reg_offset = 3,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_GPIO_4_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT4_STATUS_GPIO_4,</div><div class='add'>+		.reg_offset = 3,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_GPIO_5_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT4_STATUS_GPIO_5,</div><div class='add'>+		.reg_offset = 3,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_GPIO_6_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT4_STATUS_GPIO_6,</div><div class='add'>+		.reg_offset = 3,</div><div class='add'>+	},</div><div class='add'>+	[PALMAS_GPIO_7_IRQ] = {</div><div class='add'>+		.mask = PALMAS_INT4_STATUS_GPIO_7,</div><div class='add'>+		.reg_offset = 3,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regmap_irq_chip palmas_irq_chip = {</div><div class='add'>+	.name = "palmas",</div><div class='add'>+	.irqs = palmas_irqs,</div><div class='add'>+	.num_irqs = ARRAY_SIZE(palmas_irqs),</div><div class='add'>+</div><div class='add'>+	.num_regs = 4,</div><div class='add'>+	.irq_reg_stride = 5,</div><div class='add'>+	.status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,</div><div class='add'>+			PALMAS_INT1_STATUS),</div><div class='add'>+	.mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,</div><div class='add'>+			PALMAS_INT1_MASK),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit palmas_i2c_probe(struct i2c_client *i2c,</div><div class='add'>+			    const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct palmas *palmas;</div><div class='add'>+	struct palmas_platform_data *pdata;</div><div class='add'>+	int ret = 0, i;</div><div class='add'>+	unsigned int reg, addr;</div><div class='add'>+	int slave;</div><div class='add'>+	struct mfd_cell *children;</div><div class='add'>+</div><div class='add'>+	pdata = dev_get_platdata(&amp;i2c-&gt;dev);</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	palmas = devm_kzalloc(&amp;i2c-&gt;dev, sizeof(struct palmas), GFP_KERNEL);</div><div class='add'>+	if (palmas == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	i2c_set_clientdata(i2c, palmas);</div><div class='add'>+	palmas-&gt;dev = &amp;i2c-&gt;dev;</div><div class='add'>+	palmas-&gt;id = id-&gt;driver_data;</div><div class='add'>+	palmas-&gt;irq = i2c-&gt;irq;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PALMAS_NUM_CLIENTS; i++) {</div><div class='add'>+		if (i == 0)</div><div class='add'>+			palmas-&gt;i2c_clients[i] = i2c;</div><div class='add'>+		else {</div><div class='add'>+			palmas-&gt;i2c_clients[i] =</div><div class='add'>+					i2c_new_dummy(i2c-&gt;adapter,</div><div class='add'>+							i2c-&gt;addr + i);</div><div class='add'>+			if (!palmas-&gt;i2c_clients[i]) {</div><div class='add'>+				dev_err(palmas-&gt;dev,</div><div class='add'>+					"can't attach client %d\n", i);</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto err;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		palmas-&gt;regmap[i] = devm_regmap_init_i2c(palmas-&gt;i2c_clients[i],</div><div class='add'>+				&amp;palmas_regmap_config[i]);</div><div class='add'>+		if (IS_ERR(palmas-&gt;regmap[i])) {</div><div class='add'>+			ret = PTR_ERR(palmas-&gt;regmap[i]);</div><div class='add'>+			dev_err(palmas-&gt;dev,</div><div class='add'>+				"Failed to allocate regmap %d, err: %d\n",</div><div class='add'>+				i, ret);</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_add_irq_chip(palmas-&gt;regmap[1], palmas-&gt;irq,</div><div class='add'>+			IRQF_ONESHOT | IRQF_TRIGGER_LOW, -1, &amp;palmas_irq_chip,</div><div class='add'>+			&amp;palmas-&gt;irq_data);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE);</div><div class='add'>+	addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,</div><div class='add'>+			PALMAS_PRIMARY_SECONDARY_PAD1);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;mux_from_pdata) {</div><div class='add'>+		reg = pdata-&gt;pad1;</div><div class='add'>+		ret = regmap_write(palmas-&gt;regmap[slave], addr, reg);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+	} else {</div><div class='add'>+		ret = regmap_read(palmas-&gt;regmap[slave], addr, &amp;reg);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(reg &amp; PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0))</div><div class='add'>+		palmas-&gt;gpio_muxed |= PALMAS_GPIO_0_MUXED;</div><div class='add'>+	if (!(reg &amp; PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK))</div><div class='add'>+		palmas-&gt;gpio_muxed |= PALMAS_GPIO_1_MUXED;</div><div class='add'>+	else if ((reg &amp; PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==</div><div class='add'>+			(2 &lt;&lt; PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))</div><div class='add'>+		palmas-&gt;led_muxed |= PALMAS_LED1_MUXED;</div><div class='add'>+	else if ((reg &amp; PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==</div><div class='add'>+			(3 &lt;&lt; PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))</div><div class='add'>+		palmas-&gt;pwm_muxed |= PALMAS_PWM1_MUXED;</div><div class='add'>+	if (!(reg &amp; PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK))</div><div class='add'>+		palmas-&gt;gpio_muxed |= PALMAS_GPIO_2_MUXED;</div><div class='add'>+	else if ((reg &amp; PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==</div><div class='add'>+			(2 &lt;&lt; PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))</div><div class='add'>+		palmas-&gt;led_muxed |= PALMAS_LED2_MUXED;</div><div class='add'>+	else if ((reg &amp; PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==</div><div class='add'>+			(3 &lt;&lt; PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))</div><div class='add'>+		palmas-&gt;pwm_muxed |= PALMAS_PWM2_MUXED;</div><div class='add'>+	if (!(reg &amp; PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3))</div><div class='add'>+		palmas-&gt;gpio_muxed |= PALMAS_GPIO_3_MUXED;</div><div class='add'>+</div><div class='add'>+	addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,</div><div class='add'>+			PALMAS_PRIMARY_SECONDARY_PAD2);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;mux_from_pdata) {</div><div class='add'>+		reg = pdata-&gt;pad2;</div><div class='add'>+		ret = regmap_write(palmas-&gt;regmap[slave], addr, reg);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+	} else {</div><div class='add'>+		ret = regmap_read(palmas-&gt;regmap[slave], addr, &amp;reg);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(reg &amp; PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4))</div><div class='add'>+		palmas-&gt;gpio_muxed |= PALMAS_GPIO_4_MUXED;</div><div class='add'>+	if (!(reg &amp; PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK))</div><div class='add'>+		palmas-&gt;gpio_muxed |= PALMAS_GPIO_5_MUXED;</div><div class='add'>+	if (!(reg &amp; PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6))</div><div class='add'>+		palmas-&gt;gpio_muxed |= PALMAS_GPIO_6_MUXED;</div><div class='add'>+	if (!(reg &amp; PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK))</div><div class='add'>+		palmas-&gt;gpio_muxed |= PALMAS_GPIO_7_MUXED;</div><div class='add'>+</div><div class='add'>+	dev_info(palmas-&gt;dev, "Muxing GPIO %x, PWM %x, LED %x\n",</div><div class='add'>+			palmas-&gt;gpio_muxed, palmas-&gt;pwm_muxed,</div><div class='add'>+			palmas-&gt;led_muxed);</div><div class='add'>+</div><div class='add'>+	reg = pdata-&gt;power_ctrl;</div><div class='add'>+</div><div class='add'>+	slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);</div><div class='add'>+	addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_POWER_CTRL);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(palmas-&gt;regmap[slave], addr, reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	children = kmemdup(palmas_children, sizeof(palmas_children),</div><div class='add'>+			   GFP_KERNEL);</div><div class='add'>+	if (!children) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mfd_add_devices(palmas-&gt;dev, -1,</div><div class='add'>+			      children, ARRAY_SIZE(palmas_children),</div><div class='add'>+			      NULL, regmap_irq_chip_get_base(palmas-&gt;irq_data));</div><div class='add'>+	kfree(children);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	mfd_remove_devices(palmas-&gt;dev);</div><div class='add'>+	kfree(palmas);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_i2c_remove(struct i2c_client *i2c)</div><div class='add'>+{</div><div class='add'>+	struct palmas *palmas = i2c_get_clientdata(i2c);</div><div class='add'>+</div><div class='add'>+	mfd_remove_devices(palmas-&gt;dev);</div><div class='add'>+	regmap_del_irq_chip(palmas-&gt;irq, palmas-&gt;irq_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id palmas_i2c_id[] = {</div><div class='add'>+	{ "palmas", },</div><div class='add'>+	{ "twl6035", },</div><div class='add'>+	{ "twl6037", },</div><div class='add'>+	{ "tps65913", },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, palmas_i2c_id);</div><div class='add'>+</div><div class='add'>+static struct of_device_id __devinitdata of_palmas_match_tbl[] = {</div><div class='add'>+	{ .compatible = "ti,palmas", },</div><div class='add'>+	{ /* end */ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct i2c_driver palmas_i2c_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		   .name = "palmas",</div><div class='add'>+		   .of_match_table = of_palmas_match_tbl,</div><div class='add'>+		   .owner = THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe = palmas_i2c_probe,</div><div class='add'>+	.remove = palmas_i2c_remove,</div><div class='add'>+	.id_table = palmas_i2c_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init palmas_i2c_init(void)</div><div class='add'>+{</div><div class='add'>+	return i2c_add_driver(&amp;palmas_i2c_driver);</div><div class='add'>+}</div><div class='add'>+/* init early so consumer devices can complete system boot */</div><div class='add'>+subsys_initcall(palmas_i2c_init);</div><div class='add'>+</div><div class='add'>+static void __exit palmas_i2c_exit(void)</div><div class='add'>+{</div><div class='add'>+	i2c_del_driver(&amp;palmas_i2c_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(palmas_i2c_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Graeme Gregory &lt;gg@slimlogic.co.uk&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Palmas chip family multi-function driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/mfd/pcf50633-core.c b/drivers/mfd/pcf50633-core.c<br/>index 189c2f07b83f..29c122bf28ea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/pcf50633-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/pcf50633-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/pcf50633-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/pcf50633-core.c</a></div><div class='hunk'>@@ -204,7 +204,7 @@ static int __devinit pcf50633_probe(struct i2c_client *client,</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pcf = kzalloc(sizeof(*pcf), GFP_KERNEL);</div><div class='add'>+	pcf = devm_kzalloc(&amp;client-&gt;dev, sizeof(*pcf), GFP_KERNEL);</div><div class='ctx'> 	if (!pcf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -212,12 +212,11 @@ static int __devinit pcf50633_probe(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;pcf-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	pcf-&gt;regmap = regmap_init_i2c(client, &amp;pcf50633_regmap_config);</div><div class='add'>+	pcf-&gt;regmap = devm_regmap_init_i2c(client, &amp;pcf50633_regmap_config);</div><div class='ctx'> 	if (IS_ERR(pcf-&gt;regmap)) {</div><div class='ctx'> 		ret = PTR_ERR(pcf-&gt;regmap);</div><div class='del'>-		dev_err(pcf-&gt;dev, "Failed to allocate register map: %d\n",</div><div class='del'>-			ret);</div><div class='del'>-		goto err_free;</div><div class='add'>+		dev_err(pcf-&gt;dev, "Failed to allocate register map: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	i2c_set_clientdata(client, pcf);</div><div class='hunk'>@@ -228,7 +227,7 @@ static int __devinit pcf50633_probe(struct i2c_client *client,</div><div class='ctx'> 	if (version &lt; 0 || variant &lt; 0) {</div><div class='ctx'> 		dev_err(pcf-&gt;dev, "Unable to probe pcf50633\n");</div><div class='ctx'> 		ret = -ENODEV;</div><div class='del'>-		goto err_regmap;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_info(pcf-&gt;dev, "Probed device version %d variant %d\n",</div><div class='hunk'>@@ -237,16 +236,11 @@ static int __devinit pcf50633_probe(struct i2c_client *client,</div><div class='ctx'> 	pcf50633_irq_init(pcf, client-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	/* Create sub devices */</div><div class='del'>-	pcf50633_client_dev_register(pcf, "pcf50633-input",</div><div class='del'>-						&amp;pcf-&gt;input_pdev);</div><div class='del'>-	pcf50633_client_dev_register(pcf, "pcf50633-rtc",</div><div class='del'>-						&amp;pcf-&gt;rtc_pdev);</div><div class='del'>-	pcf50633_client_dev_register(pcf, "pcf50633-mbc",</div><div class='del'>-						&amp;pcf-&gt;mbc_pdev);</div><div class='del'>-	pcf50633_client_dev_register(pcf, "pcf50633-adc",</div><div class='del'>-						&amp;pcf-&gt;adc_pdev);</div><div class='del'>-	pcf50633_client_dev_register(pcf, "pcf50633-backlight",</div><div class='del'>-						&amp;pcf-&gt;bl_pdev);</div><div class='add'>+	pcf50633_client_dev_register(pcf, "pcf50633-input", &amp;pcf-&gt;input_pdev);</div><div class='add'>+	pcf50633_client_dev_register(pcf, "pcf50633-rtc", &amp;pcf-&gt;rtc_pdev);</div><div class='add'>+	pcf50633_client_dev_register(pcf, "pcf50633-mbc", &amp;pcf-&gt;mbc_pdev);</div><div class='add'>+	pcf50633_client_dev_register(pcf, "pcf50633-adc", &amp;pcf-&gt;adc_pdev);</div><div class='add'>+	pcf50633_client_dev_register(pcf, "pcf50633-backlight", &amp;pcf-&gt;bl_pdev);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; PCF50633_NUM_REGULATORS; i++) {</div><div class='hunk'>@@ -274,13 +268,6 @@ static int __devinit pcf50633_probe(struct i2c_client *client,</div><div class='ctx'> 		pdata-&gt;probe_done(pcf);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err_regmap:</div><div class='del'>-	regmap_exit(pcf-&gt;regmap);</div><div class='del'>-err_free:</div><div class='del'>-	kfree(pcf);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit pcf50633_remove(struct i2c_client *client)</div><div class='hunk'>@@ -300,9 +287,6 @@ static int __devexit pcf50633_remove(struct i2c_client *client)</div><div class='ctx'> 	for (i = 0; i &lt; PCF50633_NUM_REGULATORS; i++)</div><div class='ctx'> 		platform_device_unregister(pcf-&gt;regulator_pdev[i]);</div><div class='ctx'> </div><div class='del'>-	regmap_exit(pcf-&gt;regmap);</div><div class='del'>-	kfree(pcf);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/rc5t583.c b/drivers/mfd/rc5t583.c<br/>index 44afae0a69ce..cdc1df7fa0e9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/rc5t583.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/rc5t583.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/rc5t583.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/rc5t583.c</a></div><div class='hunk'>@@ -75,6 +75,7 @@ static struct deepsleep_control_data deepsleep_data[] = {</div><div class='ctx'> 	(RC5T583_EXT_PWRREQ1_CONTROL | RC5T583_EXT_PWRREQ2_CONTROL)</div><div class='ctx'> </div><div class='ctx'> static struct mfd_cell rc5t583_subdevs[] = {</div><div class='add'>+	{.name = "rc5t583-gpio",},</div><div class='ctx'> 	{.name = "rc5t583-regulator",},</div><div class='ctx'> 	{.name = "rc5t583-rtc",      },</div><div class='ctx'> 	{.name = "rc5t583-key",      }</div><div class='hunk'>@@ -267,7 +268,7 @@ static int __devinit rc5t583_i2c_probe(struct i2c_client *i2c,</div><div class='ctx'> 	rc5t583-&gt;dev = &amp;i2c-&gt;dev;</div><div class='ctx'> 	i2c_set_clientdata(i2c, rc5t583);</div><div class='ctx'> </div><div class='del'>-	rc5t583-&gt;regmap = regmap_init_i2c(i2c, &amp;rc5t583_regmap_config);</div><div class='add'>+	rc5t583-&gt;regmap = devm_regmap_init_i2c(i2c, &amp;rc5t583_regmap_config);</div><div class='ctx'> 	if (IS_ERR(rc5t583-&gt;regmap)) {</div><div class='ctx'> 		ret = PTR_ERR(rc5t583-&gt;regmap);</div><div class='ctx'> 		dev_err(&amp;i2c-&gt;dev, "regmap initialization failed: %d\n", ret);</div><div class='hunk'>@@ -276,7 +277,7 @@ static int __devinit rc5t583_i2c_probe(struct i2c_client *i2c,</div><div class='ctx'> </div><div class='ctx'> 	ret = rc5t583_clear_ext_power_req(rc5t583, pdata);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto err_irq_init;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (i2c-&gt;irq) {</div><div class='ctx'> 		ret = rc5t583_irq_init(rc5t583, i2c-&gt;irq, pdata-&gt;irq_base);</div><div class='hunk'>@@ -299,8 +300,6 @@ static int __devinit rc5t583_i2c_probe(struct i2c_client *i2c,</div><div class='ctx'> err_add_devs:</div><div class='ctx'> 	if (irq_init_success)</div><div class='ctx'> 		rc5t583_irq_exit(rc5t583);</div><div class='del'>-err_irq_init:</div><div class='del'>-	regmap_exit(rc5t583-&gt;regmap);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -310,7 +309,6 @@ static int  __devexit rc5t583_i2c_remove(struct i2c_client *i2c)</div><div class='ctx'> </div><div class='ctx'> 	mfd_remove_devices(rc5t583-&gt;dev);</div><div class='ctx'> 	rc5t583_irq_exit(rc5t583);</div><div class='del'>-	regmap_exit(rc5t583-&gt;regmap);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/rdc321x-southbridge.c b/drivers/mfd/rdc321x-southbridge.c<br/>index 809bd4a61089..685d61e431ad 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/rdc321x-southbridge.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/rdc321x-southbridge.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/rdc321x-southbridge.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/rdc321x-southbridge.c</a></div><div class='hunk'>@@ -108,18 +108,7 @@ static struct pci_driver rdc321x_sb_driver = {</div><div class='ctx'> 	.remove		= __devexit_p(rdc321x_sb_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init rdc321x_sb_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;rdc321x_sb_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit rdc321x_sb_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;rdc321x_sb_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(rdc321x_sb_init);</div><div class='del'>-module_exit(rdc321x_sb_exit);</div><div class='add'>+module_pci_driver(rdc321x_sb_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Florian Fainelli &lt;florian@openwrt.org&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/mfd/s5m-core.c b/drivers/mfd/s5m-core.c<br/>index 48949d998d10..dd170307e60e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/s5m-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/s5m-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/s5m-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/s5m-core.c</a></div><div class='hunk'>@@ -114,12 +114,12 @@ static int s5m87xx_i2c_probe(struct i2c_client *i2c,</div><div class='ctx'> 		s5m87xx-&gt;wakeup = pdata-&gt;wakeup;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	s5m87xx-&gt;regmap = regmap_init_i2c(i2c, &amp;s5m_regmap_config);</div><div class='add'>+	s5m87xx-&gt;regmap = devm_regmap_init_i2c(i2c, &amp;s5m_regmap_config);</div><div class='ctx'> 	if (IS_ERR(s5m87xx-&gt;regmap)) {</div><div class='ctx'> 		ret = PTR_ERR(s5m87xx-&gt;regmap);</div><div class='ctx'> 		dev_err(&amp;i2c-&gt;dev, "Failed to allocate register map: %d\n",</div><div class='ctx'> 			ret);</div><div class='del'>-		goto err;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	s5m87xx-&gt;rtc = i2c_new_dummy(i2c-&gt;adapter, RTC_I2C_ADDR);</div><div class='hunk'>@@ -159,7 +159,6 @@ err:</div><div class='ctx'> 	mfd_remove_devices(s5m87xx-&gt;dev);</div><div class='ctx'> 	s5m_irq_exit(s5m87xx);</div><div class='ctx'> 	i2c_unregister_device(s5m87xx-&gt;rtc);</div><div class='del'>-	regmap_exit(s5m87xx-&gt;regmap);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -170,7 +169,6 @@ static int s5m87xx_i2c_remove(struct i2c_client *i2c)</div><div class='ctx'> 	mfd_remove_devices(s5m87xx-&gt;dev);</div><div class='ctx'> 	s5m_irq_exit(s5m87xx);</div><div class='ctx'> 	i2c_unregister_device(s5m87xx-&gt;rtc);</div><div class='del'>-	regmap_exit(s5m87xx-&gt;regmap);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/sta2x11-mfd.c b/drivers/mfd/sta2x11-mfd.c<br/>new file mode 100644<br/>index 000000000000..d31fed07aefb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/sta2x11-mfd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/sta2x11-mfd.c</a></div><div class='hunk'>@@ -0,0 +1,467 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2009-2011 Wind River Systems, Inc.</div><div class='add'>+ * Copyright (c) 2011 ST Microelectronics (Alessandro Rubini)</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.</div><div class='add'>+ * See the GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mfd/core.h&gt;</div><div class='add'>+#include &lt;linux/mfd/sta2x11-mfd.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/sta2x11.h&gt;</div><div class='add'>+</div><div class='add'>+/* This describes STA2X11 MFD chip for us, we may have several */</div><div class='add'>+struct sta2x11_mfd {</div><div class='add'>+	struct sta2x11_instance *instance;</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	struct list_head list;</div><div class='add'>+	void __iomem *sctl_regs;</div><div class='add'>+	void __iomem *apbreg_regs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static LIST_HEAD(sta2x11_mfd_list);</div><div class='add'>+</div><div class='add'>+/* Three functions to act on the list */</div><div class='add'>+static struct sta2x11_mfd *sta2x11_mfd_find(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_instance *instance;</div><div class='add'>+	struct sta2x11_mfd *mfd;</div><div class='add'>+</div><div class='add'>+	if (!pdev &amp;&amp; !list_empty(&amp;sta2x11_mfd_list)) {</div><div class='add'>+		pr_warning("%s: Unspecified device, "</div><div class='add'>+			    "using first instance\n", __func__);</div><div class='add'>+		return list_entry(sta2x11_mfd_list.next,</div><div class='add'>+				  struct sta2x11_mfd, list);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	instance = sta2x11_get_instance(pdev);</div><div class='add'>+	if (!instance)</div><div class='add'>+		return NULL;</div><div class='add'>+	list_for_each_entry(mfd, &amp;sta2x11_mfd_list, list) {</div><div class='add'>+		if (mfd-&gt;instance == instance)</div><div class='add'>+			return mfd;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);</div><div class='add'>+	struct sta2x11_instance *instance;</div><div class='add'>+</div><div class='add'>+	if (mfd)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	instance = sta2x11_get_instance(pdev);</div><div class='add'>+	if (!instance)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	mfd = kzalloc(sizeof(*mfd), flags);</div><div class='add'>+	if (!mfd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	INIT_LIST_HEAD(&amp;mfd-&gt;list);</div><div class='add'>+	spin_lock_init(&amp;mfd-&gt;lock);</div><div class='add'>+	mfd-&gt;instance = instance;</div><div class='add'>+	list_add(&amp;mfd-&gt;list, &amp;sta2x11_mfd_list);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit mfd_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);</div><div class='add'>+</div><div class='add'>+	if (!mfd)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	list_del(&amp;mfd-&gt;list);</div><div class='add'>+	kfree(mfd);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* These two functions are exported and are not expected to fail */</div><div class='add'>+u32 sta2x11_sctl_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);</div><div class='add'>+	u32 r;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!mfd) {</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, ": can't access sctl regs\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	if (!mfd-&gt;sctl_regs) {</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, ": system ctl not initialized\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	spin_lock_irqsave(&amp;mfd-&gt;lock, flags);</div><div class='add'>+	r = readl(mfd-&gt;sctl_regs + reg);</div><div class='add'>+	r &amp;= ~mask;</div><div class='add'>+	r |= val;</div><div class='add'>+	if (mask)</div><div class='add'>+		writel(r, mfd-&gt;sctl_regs + reg);</div><div class='add'>+	spin_unlock_irqrestore(&amp;mfd-&gt;lock, flags);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(sta2x11_sctl_mask);</div><div class='add'>+</div><div class='add'>+u32 sta2x11_apbreg_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);</div><div class='add'>+	u32 r;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!mfd) {</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, ": can't access apb regs\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	if (!mfd-&gt;apbreg_regs) {</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, ": apb bridge not initialized\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	spin_lock_irqsave(&amp;mfd-&gt;lock, flags);</div><div class='add'>+	r = readl(mfd-&gt;apbreg_regs + reg);</div><div class='add'>+	r &amp;= ~mask;</div><div class='add'>+	r |= val;</div><div class='add'>+	if (mask)</div><div class='add'>+		writel(r, mfd-&gt;apbreg_regs + reg);</div><div class='add'>+	spin_unlock_irqrestore(&amp;mfd-&gt;lock, flags);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(sta2x11_apbreg_mask);</div><div class='add'>+</div><div class='add'>+/* Two debugfs files, for our registers (FIXME: one instance only) */</div><div class='add'>+#define REG(regname) {.name = #regname, .offset = SCTL_ ## regname}</div><div class='add'>+static struct debugfs_reg32 sta2x11_sctl_regs[] = {</div><div class='add'>+	REG(SCCTL), REG(ARMCFG), REG(SCPLLCTL), REG(SCPLLFCTRL),</div><div class='add'>+	REG(SCRESFRACT), REG(SCRESCTRL1), REG(SCRESXTRL2), REG(SCPEREN0),</div><div class='add'>+	REG(SCPEREN1), REG(SCPEREN2), REG(SCGRST), REG(SCPCIPMCR1),</div><div class='add'>+	REG(SCPCIPMCR2), REG(SCPCIPMSR1), REG(SCPCIPMSR2), REG(SCPCIPMSR3),</div><div class='add'>+	REG(SCINTREN), REG(SCRISR), REG(SCCLKSTAT0), REG(SCCLKSTAT1),</div><div class='add'>+	REG(SCCLKSTAT2), REG(SCRSTSTA),</div><div class='add'>+};</div><div class='add'>+#undef REG</div><div class='add'>+</div><div class='add'>+static struct debugfs_regset32 sctl_regset = {</div><div class='add'>+	.regs = sta2x11_sctl_regs,</div><div class='add'>+	.nregs = ARRAY_SIZE(sta2x11_sctl_regs),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define REG(regname) {.name = #regname, .offset = regname}</div><div class='add'>+static struct debugfs_reg32 sta2x11_apbreg_regs[] = {</div><div class='add'>+	REG(APBREG_BSR), REG(APBREG_PAER), REG(APBREG_PWAC), REG(APBREG_PRAC),</div><div class='add'>+	REG(APBREG_PCG), REG(APBREG_PUR), REG(APBREG_EMU_PCG),</div><div class='add'>+};</div><div class='add'>+#undef REG</div><div class='add'>+</div><div class='add'>+static struct debugfs_regset32 apbreg_regset = {</div><div class='add'>+	.regs = sta2x11_apbreg_regs,</div><div class='add'>+	.nregs = ARRAY_SIZE(sta2x11_apbreg_regs),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dentry *sta2x11_sctl_debugfs;</div><div class='add'>+static struct dentry *sta2x11_apbreg_debugfs;</div><div class='add'>+</div><div class='add'>+/* Probe for the two platform devices */</div><div class='add'>+static int sta2x11_sctl_probe(struct platform_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev **pdev;</div><div class='add'>+	struct sta2x11_mfd *mfd;</div><div class='add'>+	struct resource *res;</div><div class='add'>+</div><div class='add'>+	pdev = dev-&gt;dev.platform_data;</div><div class='add'>+	mfd = sta2x11_mfd_find(*pdev);</div><div class='add'>+	if (!mfd)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(dev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (!request_mem_region(res-&gt;start, resource_size(res),</div><div class='add'>+				"sta2x11-sctl"))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	mfd-&gt;sctl_regs = ioremap(res-&gt;start, resource_size(res));</div><div class='add'>+	if (!mfd-&gt;sctl_regs) {</div><div class='add'>+		release_mem_region(res-&gt;start, resource_size(res));</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	sctl_regset.base = mfd-&gt;sctl_regs;</div><div class='add'>+	sta2x11_sctl_debugfs = debugfs_create_regset32("sta2x11-sctl",</div><div class='add'>+						  S_IFREG | S_IRUGO,</div><div class='add'>+						  NULL, &amp;sctl_regset);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sta2x11_apbreg_probe(struct platform_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev **pdev;</div><div class='add'>+	struct sta2x11_mfd *mfd;</div><div class='add'>+	struct resource *res;</div><div class='add'>+</div><div class='add'>+	pdev = dev-&gt;dev.platform_data;</div><div class='add'>+	dev_dbg(&amp;dev-&gt;dev, "%s: pdata is %p\n", __func__, pdev);</div><div class='add'>+	dev_dbg(&amp;dev-&gt;dev, "%s: *pdata is %p\n", __func__, *pdev);</div><div class='add'>+</div><div class='add'>+	mfd = sta2x11_mfd_find(*pdev);</div><div class='add'>+	if (!mfd)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(dev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (!request_mem_region(res-&gt;start, resource_size(res),</div><div class='add'>+				"sta2x11-apbreg"))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	mfd-&gt;apbreg_regs = ioremap(res-&gt;start, resource_size(res));</div><div class='add'>+	if (!mfd-&gt;apbreg_regs) {</div><div class='add'>+		release_mem_region(res-&gt;start, resource_size(res));</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	dev_dbg(&amp;dev-&gt;dev, "%s: regbase %p\n", __func__, mfd-&gt;apbreg_regs);</div><div class='add'>+</div><div class='add'>+	apbreg_regset.base = mfd-&gt;apbreg_regs;</div><div class='add'>+	sta2x11_apbreg_debugfs = debugfs_create_regset32("sta2x11-apbreg",</div><div class='add'>+						  S_IFREG | S_IRUGO,</div><div class='add'>+						  NULL, &amp;apbreg_regset);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The two platform drivers */</div><div class='add'>+static struct platform_driver sta2x11_sctl_platform_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "sta2x11-sctl",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe		= sta2x11_sctl_probe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init sta2x11_sctl_init(void)</div><div class='add'>+{</div><div class='add'>+	pr_info("%s\n", __func__);</div><div class='add'>+	return platform_driver_register(&amp;sta2x11_sctl_platform_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver sta2x11_platform_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "sta2x11-apbreg",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe		= sta2x11_apbreg_probe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init sta2x11_apbreg_init(void)</div><div class='add'>+{</div><div class='add'>+	pr_info("%s\n", __func__);</div><div class='add'>+	return platform_driver_register(&amp;sta2x11_platform_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * What follows is the PCI device that hosts the above two pdevs.</div><div class='add'>+ * Each logic block is 4kB and they are all consecutive: we use this info.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Bar 0 */</div><div class='add'>+enum bar0_cells {</div><div class='add'>+	STA2X11_GPIO_0 = 0,</div><div class='add'>+	STA2X11_GPIO_1,</div><div class='add'>+	STA2X11_GPIO_2,</div><div class='add'>+	STA2X11_GPIO_3,</div><div class='add'>+	STA2X11_SCTL,</div><div class='add'>+	STA2X11_SCR,</div><div class='add'>+	STA2X11_TIME,</div><div class='add'>+};</div><div class='add'>+/* Bar 1 */</div><div class='add'>+enum bar1_cells {</div><div class='add'>+	STA2X11_APBREG = 0,</div><div class='add'>+};</div><div class='add'>+#define CELL_4K(_name, _cell) { \</div><div class='add'>+		.name = _name, \</div><div class='add'>+		.start = _cell * 4096, .end = _cell * 4096 + 4095, \</div><div class='add'>+		.flags = IORESOURCE_MEM, \</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+static const __devinitconst struct resource gpio_resources[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "sta2x11_gpio", /* 4 consecutive cells, 1 driver */</div><div class='add'>+		.start = 0,</div><div class='add'>+		.end = (4 * 4096) - 1,</div><div class='add'>+		.flags = IORESOURCE_MEM,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+static const __devinitconst struct resource sctl_resources[] = {</div><div class='add'>+	CELL_4K("sta2x11-sctl", STA2X11_SCTL),</div><div class='add'>+};</div><div class='add'>+static const __devinitconst struct resource scr_resources[] = {</div><div class='add'>+	CELL_4K("sta2x11-scr", STA2X11_SCR),</div><div class='add'>+};</div><div class='add'>+static const __devinitconst struct resource time_resources[] = {</div><div class='add'>+	CELL_4K("sta2x11-time", STA2X11_TIME),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const __devinitconst struct resource apbreg_resources[] = {</div><div class='add'>+	CELL_4K("sta2x11-apbreg", STA2X11_APBREG),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define DEV(_name, _r) \</div><div class='add'>+	{ .name = _name, .num_resources = ARRAY_SIZE(_r), .resources = _r, }</div><div class='add'>+</div><div class='add'>+static __devinitdata struct mfd_cell sta2x11_mfd_bar0[] = {</div><div class='add'>+	DEV("sta2x11-gpio", gpio_resources), /* offset 0: we add pdata later */</div><div class='add'>+	DEV("sta2x11-sctl", sctl_resources),</div><div class='add'>+	DEV("sta2x11-scr", scr_resources),</div><div class='add'>+	DEV("sta2x11-time", time_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __devinitdata struct mfd_cell sta2x11_mfd_bar1[] = {</div><div class='add'>+	DEV("sta2x11-apbreg", apbreg_resources),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int sta2x11_mfd_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='add'>+{</div><div class='add'>+	pci_save_state(pdev);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	pci_set_power_state(pdev, pci_choose_state(pdev, state));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sta2x11_mfd_resume(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pci_set_power_state(pdev, 0);</div><div class='add'>+	err = pci_enable_device(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	pci_restore_state(pdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit sta2x11_mfd_probe(struct pci_dev *pdev,</div><div class='add'>+				       const struct pci_device_id *pci_id)</div><div class='add'>+{</div><div class='add'>+	int err, i;</div><div class='add'>+	struct sta2x11_gpio_pdata *gpio_data;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	err = pci_enable_device(pdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Can't enable device.\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pci_enable_msi(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Enable msi failed\n");</div><div class='add'>+</div><div class='add'>+	/* Read gpio config data as pci device's platform data */</div><div class='add'>+	gpio_data = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+	if (!gpio_data)</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, "no gpio configuration\n");</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "%s, gpio_data = %p (%p)\n", __func__,</div><div class='add'>+		gpio_data, &amp;gpio_data);</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "%s, pdev = %p (%p)\n", __func__,</div><div class='add'>+		pdev, &amp;pdev);</div><div class='add'>+</div><div class='add'>+	/* platform data is the pci device for all of them */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(sta2x11_mfd_bar0); i++) {</div><div class='add'>+		sta2x11_mfd_bar0[i].pdata_size = sizeof(pdev);</div><div class='add'>+		sta2x11_mfd_bar0[i].platform_data = &amp;pdev;</div><div class='add'>+	}</div><div class='add'>+	sta2x11_mfd_bar1[0].pdata_size = sizeof(pdev);</div><div class='add'>+	sta2x11_mfd_bar1[0].platform_data = &amp;pdev;</div><div class='add'>+</div><div class='add'>+	/* Record this pdev before mfd_add_devices: their probe looks for it */</div><div class='add'>+	sta2x11_mfd_add(pdev, GFP_ATOMIC);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	err = mfd_add_devices(&amp;pdev-&gt;dev, -1,</div><div class='add'>+			      sta2x11_mfd_bar0,</div><div class='add'>+			      ARRAY_SIZE(sta2x11_mfd_bar0),</div><div class='add'>+			      &amp;pdev-&gt;resource[0],</div><div class='add'>+			      0);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "mfd_add_devices[0] failed: %d\n", err);</div><div class='add'>+		goto err_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mfd_add_devices(&amp;pdev-&gt;dev, -1,</div><div class='add'>+			      sta2x11_mfd_bar1,</div><div class='add'>+			      ARRAY_SIZE(sta2x11_mfd_bar1),</div><div class='add'>+			      &amp;pdev-&gt;resource[1],</div><div class='add'>+			      0);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "mfd_add_devices[1] failed: %d\n", err);</div><div class='add'>+		goto err_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_disable:</div><div class='add'>+	mfd_remove_devices(&amp;pdev-&gt;dev);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	pci_disable_msi(pdev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEFINE_PCI_DEVICE_TABLE(sta2x11_mfd_tbl) = {</div><div class='add'>+	{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_GPIO)},</div><div class='add'>+	{0,},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pci_driver sta2x11_mfd_driver = {</div><div class='add'>+	.name =		"sta2x11-mfd",</div><div class='add'>+	.id_table =	sta2x11_mfd_tbl,</div><div class='add'>+	.probe =	sta2x11_mfd_probe,</div><div class='add'>+	.suspend =	sta2x11_mfd_suspend,</div><div class='add'>+	.resume =	sta2x11_mfd_resume,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init sta2x11_mfd_init(void)</div><div class='add'>+{</div><div class='add'>+	pr_info("%s\n", __func__);</div><div class='add'>+	return pci_register_driver(&amp;sta2x11_mfd_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * All of this must be ready before "normal" devices like MMCI appear.</div><div class='add'>+ * But MFD (the pci device) can't be too early. The following choice</div><div class='add'>+ * prepares platform drivers very early and probe the PCI device later,</div><div class='add'>+ * but before other PCI devices.</div><div class='add'>+ */</div><div class='add'>+subsys_initcall(sta2x11_apbreg_init);</div><div class='add'>+subsys_initcall(sta2x11_sctl_init);</div><div class='add'>+rootfs_initcall(sta2x11_mfd_init);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_AUTHOR("Wind River");</div><div class='add'>+MODULE_DESCRIPTION("STA2x11 mfd for GPIO, SCTL and APBREG");</div><div class='add'>+MODULE_DEVICE_TABLE(pci, sta2x11_mfd_tbl);</div><div class='head'>diff --git a/drivers/mfd/stmpe-spi.c b/drivers/mfd/stmpe-spi.c<br/>index b58c43c7ea93..afd459013ecb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/stmpe-spi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/stmpe-spi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/stmpe-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/stmpe-spi.c</a></div><div class='hunk'>@@ -122,7 +122,6 @@ MODULE_DEVICE_TABLE(spi, stmpe_id);</div><div class='ctx'> static struct spi_driver stmpe_spi_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	= "stmpe-spi",</div><div class='del'>-		.bus	= &amp;spi_bus_type,</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> 		.pm	= &amp;stmpe_dev_pm_ops,</div><div class='head'>diff --git a/drivers/mfd/tps65090.c b/drivers/mfd/tps65090.c<br/>index a66d4df51293..396b9d1b6bd6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/tps65090.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/tps65090.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/tps65090.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/tps65090.c</a></div><div class='hunk'>@@ -78,17 +78,6 @@ static struct mfd_cell tps65090s[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct tps65090 {</div><div class='del'>-	struct mutex		lock;</div><div class='del'>-	struct device		*dev;</div><div class='del'>-	struct i2c_client	*client;</div><div class='del'>-	struct regmap		*rmap;</div><div class='del'>-	struct irq_chip		irq_chip;</div><div class='del'>-	struct mutex		irq_lock;</div><div class='del'>-	int			irq_base;</div><div class='del'>-	unsigned int		id;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> int tps65090_write(struct device *dev, int reg, uint8_t val)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65090 *tps = dev_get_drvdata(dev);</div><div class='hunk'>@@ -294,27 +283,24 @@ static int __devinit tps65090_i2c_probe(struct i2c_client *client,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tps65090-&gt;rmap = regmap_init_i2c(tps65090-&gt;client,</div><div class='del'>-		&amp;tps65090_regmap_config);</div><div class='add'>+	tps65090-&gt;rmap = devm_regmap_init_i2c(tps65090-&gt;client,</div><div class='add'>+					      &amp;tps65090_regmap_config);</div><div class='ctx'> 	if (IS_ERR(tps65090-&gt;rmap)) {</div><div class='del'>-		dev_err(&amp;client-&gt;dev, "regmap_init failed with err: %ld\n",</div><div class='del'>-			PTR_ERR(tps65090-&gt;rmap));</div><div class='add'>+		ret = PTR_ERR(tps65090-&gt;rmap);</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "regmap_init failed with err: %d\n", ret);</div><div class='ctx'> 		goto err_irq_exit;</div><div class='del'>-	};</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = mfd_add_devices(tps65090-&gt;dev, -1, tps65090s,</div><div class='ctx'> 		ARRAY_SIZE(tps65090s), NULL, 0);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "add mfd devices failed with err: %d\n",</div><div class='ctx'> 			ret);</div><div class='del'>-		goto err_regmap_exit;</div><div class='add'>+		goto err_irq_exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_regmap_exit:</div><div class='del'>-	regmap_exit(tps65090-&gt;rmap);</div><div class='del'>-</div><div class='ctx'> err_irq_exit:</div><div class='ctx'> 	if (client-&gt;irq)</div><div class='ctx'> 		free_irq(client-&gt;irq, tps65090);</div><div class='hunk'>@@ -327,29 +313,34 @@ static int __devexit tps65090_i2c_remove(struct i2c_client *client)</div><div class='ctx'> 	struct tps65090 *tps65090 = i2c_get_clientdata(client);</div><div class='ctx'> </div><div class='ctx'> 	mfd_remove_devices(tps65090-&gt;dev);</div><div class='del'>-	regmap_exit(tps65090-&gt;rmap);</div><div class='ctx'> 	if (client-&gt;irq)</div><div class='ctx'> 		free_irq(client-&gt;irq, tps65090);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static int tps65090_i2c_suspend(struct i2c_client *client, pm_message_t state)</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int tps65090_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct i2c_client *client = to_i2c_client(dev);</div><div class='ctx'> 	if (client-&gt;irq)</div><div class='ctx'> 		disable_irq(client-&gt;irq);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65090_i2c_resume(struct i2c_client *client)</div><div class='add'>+static int tps65090_resume(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct i2c_client *client = to_i2c_client(dev);</div><div class='ctx'> 	if (client-&gt;irq)</div><div class='ctx'> 		enable_irq(client-&gt;irq);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static const struct dev_pm_ops tps65090_pm_ops = {</div><div class='add'>+	SET_SYSTEM_SLEEP_PM_OPS(tps65090_suspend, tps65090_resume)</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct i2c_device_id tps65090_id_table[] = {</div><div class='ctx'> 	{ "tps65090", 0 },</div><div class='ctx'> 	{ },</div><div class='hunk'>@@ -360,13 +351,10 @@ static struct i2c_driver tps65090_driver = {</div><div class='ctx'> 	.driver	= {</div><div class='ctx'> 		.name	= "tps65090",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='add'>+		.pm	= &amp;tps65090_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= tps65090_i2c_probe,</div><div class='ctx'> 	.remove		= __devexit_p(tps65090_i2c_remove),</div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-	.suspend	= tps65090_i2c_suspend,</div><div class='del'>-	.resume		= tps65090_i2c_resume,</div><div class='del'>-#endif</div><div class='ctx'> 	.id_table	= tps65090_id_table,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/tps65217.c b/drivers/mfd/tps65217.c<br/>index f7d854e4cc62..db194e433c08 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/tps65217.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/tps65217.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/tps65217.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/tps65217.c</a></div><div class='hunk'>@@ -96,7 +96,7 @@ EXPORT_SYMBOL_GPL(tps65217_reg_write);</div><div class='ctx'>  * @val: Value to write.</div><div class='ctx'>  * @level: Password protected level</div><div class='ctx'>  */</div><div class='del'>-int tps65217_update_bits(struct tps65217 *tps, unsigned int reg,</div><div class='add'>+static int tps65217_update_bits(struct tps65217 *tps, unsigned int reg,</div><div class='ctx'> 		unsigned int mask, unsigned int val, unsigned int level)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -150,7 +150,7 @@ static int __devinit tps65217_probe(struct i2c_client *client,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	tps-&gt;pdata = pdata;</div><div class='del'>-	tps-&gt;regmap = regmap_init_i2c(client, &amp;tps65217_regmap_config);</div><div class='add'>+	tps-&gt;regmap = devm_regmap_init_i2c(client, &amp;tps65217_regmap_config);</div><div class='ctx'> 	if (IS_ERR(tps-&gt;regmap)) {</div><div class='ctx'> 		ret = PTR_ERR(tps-&gt;regmap);</div><div class='ctx'> 		dev_err(tps-&gt;dev, "Failed to allocate register map: %d\n",</div><div class='hunk'>@@ -163,9 +163,9 @@ static int __devinit tps65217_probe(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> 	ret = tps65217_reg_read(tps, TPS65217_REG_CHIPID, &amp;version);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		dev_err(tps-&gt;dev, "Failed to read revision"</div><div class='del'>-					" register: %d\n", ret);</div><div class='del'>-		goto err_regmap;</div><div class='add'>+		dev_err(tps-&gt;dev, "Failed to read revision register: %d\n",</div><div class='add'>+			ret);</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_info(tps-&gt;dev, "TPS65217 ID %#x version 1.%d\n",</div><div class='hunk'>@@ -190,11 +190,6 @@ static int __devinit tps65217_probe(struct i2c_client *client,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err_regmap:</div><div class='del'>-	regmap_exit(tps-&gt;regmap);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit tps65217_remove(struct i2c_client *client)</div><div class='hunk'>@@ -205,8 +200,6 @@ static int __devexit tps65217_remove(struct i2c_client *client)</div><div class='ctx'> 	for (i = 0; i &lt; TPS65217_NUM_REGULATOR; i++)</div><div class='ctx'> 		platform_device_unregister(tps-&gt;regulator_pdev[i]);</div><div class='ctx'> </div><div class='del'>-	regmap_exit(tps-&gt;regmap);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/tps6586x.c b/drivers/mfd/tps6586x.c<br/>index a5ddf31b60ca..c84b5506d5fb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/tps6586x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/tps6586x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/tps6586x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/tps6586x.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/regulator/of_regulator.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mfd/core.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/tps6586x.h&gt;</div><div class='hunk'>@@ -460,6 +461,7 @@ static int __devinit tps6586x_add_subdevs(struct tps6586x *tps6586x,</div><div class='ctx'> </div><div class='ctx'> 		pdev-&gt;dev.parent = tps6586x-&gt;dev;</div><div class='ctx'> 		pdev-&gt;dev.platform_data = subdev-&gt;platform_data;</div><div class='add'>+		pdev-&gt;dev.of_node = subdev-&gt;of_node;</div><div class='ctx'> </div><div class='ctx'> 		ret = platform_device_add(pdev);</div><div class='ctx'> 		if (ret) {</div><div class='hunk'>@@ -474,6 +476,86 @@ failed:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static struct of_regulator_match tps6586x_matches[] = {</div><div class='add'>+	{ .name = "sm0",     .driver_data = (void *)TPS6586X_ID_SM_0    },</div><div class='add'>+	{ .name = "sm1",     .driver_data = (void *)TPS6586X_ID_SM_1    },</div><div class='add'>+	{ .name = "sm2",     .driver_data = (void *)TPS6586X_ID_SM_2    },</div><div class='add'>+	{ .name = "ldo0",    .driver_data = (void *)TPS6586X_ID_LDO_0   },</div><div class='add'>+	{ .name = "ldo1",    .driver_data = (void *)TPS6586X_ID_LDO_1   },</div><div class='add'>+	{ .name = "ldo2",    .driver_data = (void *)TPS6586X_ID_LDO_2   },</div><div class='add'>+	{ .name = "ldo3",    .driver_data = (void *)TPS6586X_ID_LDO_3   },</div><div class='add'>+	{ .name = "ldo4",    .driver_data = (void *)TPS6586X_ID_LDO_4   },</div><div class='add'>+	{ .name = "ldo5",    .driver_data = (void *)TPS6586X_ID_LDO_5   },</div><div class='add'>+	{ .name = "ldo6",    .driver_data = (void *)TPS6586X_ID_LDO_6   },</div><div class='add'>+	{ .name = "ldo7",    .driver_data = (void *)TPS6586X_ID_LDO_7   },</div><div class='add'>+	{ .name = "ldo8",    .driver_data = (void *)TPS6586X_ID_LDO_8   },</div><div class='add'>+	{ .name = "ldo9",    .driver_data = (void *)TPS6586X_ID_LDO_9   },</div><div class='add'>+	{ .name = "ldo_rtc", .driver_data = (void *)TPS6586X_ID_LDO_RTC },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct tps6586x_platform_data *tps6586x_parse_dt(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	const unsigned int num = ARRAY_SIZE(tps6586x_matches);</div><div class='add'>+	struct device_node *np = client-&gt;dev.of_node;</div><div class='add'>+	struct tps6586x_platform_data *pdata;</div><div class='add'>+	struct tps6586x_subdev_info *devs;</div><div class='add'>+	struct device_node *regs;</div><div class='add'>+	unsigned int count;</div><div class='add'>+	unsigned int i, j;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	regs = of_find_node_by_name(np, "regulators");</div><div class='add'>+	if (!regs)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	err = of_regulator_match(&amp;client-&gt;dev, regs, tps6586x_matches, num);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		of_node_put(regs);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	of_node_put(regs);</div><div class='add'>+	count = err;</div><div class='add'>+</div><div class='add'>+	devs = devm_kzalloc(&amp;client-&gt;dev, count * sizeof(*devs), GFP_KERNEL);</div><div class='add'>+	if (!devs)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	for (i = 0, j = 0; i &lt; num &amp;&amp; j &lt; count; i++) {</div><div class='add'>+		if (!tps6586x_matches[i].init_data)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		devs[j].name = "tps6586x-regulator";</div><div class='add'>+		devs[j].platform_data = tps6586x_matches[i].init_data;</div><div class='add'>+		devs[j].id = (int)tps6586x_matches[i].driver_data;</div><div class='add'>+		devs[j].of_node = tps6586x_matches[i].of_node;</div><div class='add'>+		j++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata = devm_kzalloc(&amp;client-&gt;dev, sizeof(*pdata), GFP_KERNEL);</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;num_subdevs = count;</div><div class='add'>+	pdata-&gt;subdevs = devs;</div><div class='add'>+	pdata-&gt;gpio_base = -1;</div><div class='add'>+	pdata-&gt;irq_base = -1;</div><div class='add'>+</div><div class='add'>+	return pdata;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct of_device_id tps6586x_of_match[] = {</div><div class='add'>+	{ .compatible = "ti,tps6586x", },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+#else</div><div class='add'>+static struct tps6586x_platform_data *tps6586x_parse_dt(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int __devinit tps6586x_i2c_probe(struct i2c_client *client,</div><div class='ctx'> 					const struct i2c_device_id *id)</div><div class='ctx'> {</div><div class='hunk'>@@ -481,6 +563,9 @@ static int __devinit tps6586x_i2c_probe(struct i2c_client *client,</div><div class='ctx'> 	struct tps6586x *tps6586x;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (!pdata &amp;&amp; client-&gt;dev.of_node)</div><div class='add'>+		pdata = tps6586x_parse_dt(client);</div><div class='add'>+</div><div class='ctx'> 	if (!pdata) {</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "tps6586x requires platform data\n");</div><div class='ctx'> 		return -ENOTSUPP;</div><div class='hunk'>@@ -573,6 +658,7 @@ static struct i2c_driver tps6586x_driver = {</div><div class='ctx'> 	.driver	= {</div><div class='ctx'> 		.name	= "tps6586x",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='add'>+		.of_match_table = of_match_ptr(tps6586x_of_match),</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= tps6586x_i2c_probe,</div><div class='ctx'> 	.remove		= __devexit_p(tps6586x_i2c_remove),</div><div class='head'>diff --git a/drivers/mfd/tps65910-irq.c b/drivers/mfd/tps65910-irq.c<br/>index c9ed5c00a621..09aab3e4776d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/tps65910-irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/tps65910-irq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/tps65910-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/tps65910-irq.c</a></div><div class='hunk'>@@ -20,15 +20,10 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/tps65910.h&gt;</div><div class='ctx'> </div><div class='del'>-static inline int irq_to_tps65910_irq(struct tps65910 *tps65910,</div><div class='del'>-							int irq)</div><div class='del'>-{</div><div class='del'>-	return (irq - tps65910-&gt;irq_base);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This is a threaded IRQ handler so can access I2C/SPI.  Since all</div><div class='ctx'>  * interrupts are clear on read the IRQ line will be reasserted and</div><div class='hunk'>@@ -41,28 +36,28 @@ static inline int irq_to_tps65910_irq(struct tps65910 *tps65910,</div><div class='ctx'> static irqreturn_t tps65910_irq(int irq, void *irq_data)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65910 *tps65910 = irq_data;</div><div class='add'>+	unsigned int reg;</div><div class='ctx'> 	u32 irq_sts;</div><div class='ctx'> 	u32 irq_mask;</div><div class='del'>-	u8 reg;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	tps65910-&gt;read(tps65910, TPS65910_INT_STS, 1, &amp;reg);</div><div class='add'>+	tps65910_reg_read(tps65910, TPS65910_INT_STS, &amp;reg);</div><div class='ctx'> 	irq_sts = reg;</div><div class='del'>-	tps65910-&gt;read(tps65910, TPS65910_INT_STS2, 1, &amp;reg);</div><div class='add'>+	tps65910_reg_read(tps65910, TPS65910_INT_STS2, &amp;reg);</div><div class='ctx'> 	irq_sts |= reg &lt;&lt; 8;</div><div class='ctx'> 	switch (tps65910_chip_id(tps65910)) {</div><div class='ctx'> 	case TPS65911:</div><div class='del'>-		tps65910-&gt;read(tps65910, TPS65910_INT_STS3, 1, &amp;reg);</div><div class='add'>+		tps65910_reg_read(tps65910, TPS65910_INT_STS3, &amp;reg);</div><div class='ctx'> 		irq_sts |= reg &lt;&lt; 16;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tps65910-&gt;read(tps65910, TPS65910_INT_MSK, 1, &amp;reg);</div><div class='add'>+	tps65910_reg_read(tps65910, TPS65910_INT_MSK, &amp;reg);</div><div class='ctx'> 	irq_mask = reg;</div><div class='del'>-	tps65910-&gt;read(tps65910, TPS65910_INT_MSK2, 1, &amp;reg);</div><div class='add'>+	tps65910_reg_read(tps65910, TPS65910_INT_MSK2, &amp;reg);</div><div class='ctx'> 	irq_mask |= reg &lt;&lt; 8;</div><div class='ctx'> 	switch (tps65910_chip_id(tps65910)) {</div><div class='ctx'> 	case TPS65911:</div><div class='del'>-		tps65910-&gt;read(tps65910, TPS65910_INT_MSK3, 1, &amp;reg);</div><div class='add'>+		tps65910_reg_read(tps65910, TPS65910_INT_MSK3, &amp;reg);</div><div class='ctx'> 		irq_mask |= reg &lt;&lt; 16;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -76,19 +71,19 @@ static irqreturn_t tps65910_irq(int irq, void *irq_data)</div><div class='ctx'> 		if (!(irq_sts &amp; (1 &lt;&lt; i)))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		handle_nested_irq(tps65910-&gt;irq_base + i);</div><div class='add'>+		handle_nested_irq(irq_find_mapping(tps65910-&gt;domain, i));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Write the STS register back to clear IRQs we handled */</div><div class='ctx'> 	reg = irq_sts &amp; 0xFF;</div><div class='ctx'> 	irq_sts &gt;&gt;= 8;</div><div class='del'>-	tps65910-&gt;write(tps65910, TPS65910_INT_STS, 1, &amp;reg);</div><div class='add'>+	tps65910_reg_write(tps65910, TPS65910_INT_STS, reg);</div><div class='ctx'> 	reg = irq_sts &amp; 0xFF;</div><div class='del'>-	tps65910-&gt;write(tps65910, TPS65910_INT_STS2, 1, &amp;reg);</div><div class='add'>+	tps65910_reg_write(tps65910, TPS65910_INT_STS2, reg);</div><div class='ctx'> 	switch (tps65910_chip_id(tps65910)) {</div><div class='ctx'> 	case TPS65911:</div><div class='ctx'> 		reg = irq_sts &gt;&gt; 8;</div><div class='del'>-		tps65910-&gt;write(tps65910, TPS65910_INT_STS3, 1, &amp;reg);</div><div class='add'>+		tps65910_reg_write(tps65910, TPS65910_INT_STS3, reg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='hunk'>@@ -105,27 +100,27 @@ static void tps65910_irq_sync_unlock(struct irq_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);</div><div class='ctx'> 	u32 reg_mask;</div><div class='del'>-	u8 reg;</div><div class='add'>+	unsigned int reg;</div><div class='ctx'> </div><div class='del'>-	tps65910-&gt;read(tps65910, TPS65910_INT_MSK, 1, &amp;reg);</div><div class='add'>+	tps65910_reg_read(tps65910, TPS65910_INT_MSK, &amp;reg);</div><div class='ctx'> 	reg_mask = reg;</div><div class='del'>-	tps65910-&gt;read(tps65910, TPS65910_INT_MSK2, 1, &amp;reg);</div><div class='add'>+	tps65910_reg_read(tps65910, TPS65910_INT_MSK2, &amp;reg);</div><div class='ctx'> 	reg_mask |= reg &lt;&lt; 8;</div><div class='ctx'> 	switch (tps65910_chip_id(tps65910)) {</div><div class='ctx'> 	case TPS65911:</div><div class='del'>-		tps65910-&gt;read(tps65910, TPS65910_INT_MSK3, 1, &amp;reg);</div><div class='add'>+		tps65910_reg_read(tps65910, TPS65910_INT_MSK3, &amp;reg);</div><div class='ctx'> 		reg_mask |= reg &lt;&lt; 16;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (tps65910-&gt;irq_mask != reg_mask) {</div><div class='ctx'> 		reg = tps65910-&gt;irq_mask &amp; 0xFF;</div><div class='del'>-		tps65910-&gt;write(tps65910, TPS65910_INT_MSK, 1, &amp;reg);</div><div class='add'>+		tps65910_reg_write(tps65910, TPS65910_INT_MSK, reg);</div><div class='ctx'> 		reg = tps65910-&gt;irq_mask &gt;&gt; 8 &amp; 0xFF;</div><div class='del'>-		tps65910-&gt;write(tps65910, TPS65910_INT_MSK2, 1, &amp;reg);</div><div class='add'>+		tps65910_reg_write(tps65910, TPS65910_INT_MSK2, reg);</div><div class='ctx'> 		switch (tps65910_chip_id(tps65910)) {</div><div class='ctx'> 		case TPS65911:</div><div class='ctx'> 			reg = tps65910-&gt;irq_mask &gt;&gt; 16;</div><div class='del'>-			tps65910-&gt;write(tps65910, TPS65910_INT_MSK3, 1, &amp;reg);</div><div class='add'>+			tps65910_reg_write(tps65910, TPS65910_INT_MSK3, reg);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;tps65910-&gt;irq_lock);</div><div class='hunk'>@@ -135,14 +130,14 @@ static void tps65910_irq_enable(struct irq_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);</div><div class='ctx'> </div><div class='del'>-	tps65910-&gt;irq_mask &amp;= ~( 1 &lt;&lt; irq_to_tps65910_irq(tps65910, data-&gt;irq));</div><div class='add'>+	tps65910-&gt;irq_mask &amp;= ~(1 &lt;&lt; data-&gt;hwirq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void tps65910_irq_disable(struct irq_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);</div><div class='ctx'> </div><div class='del'>-	tps65910-&gt;irq_mask |= ( 1 &lt;&lt; irq_to_tps65910_irq(tps65910, data-&gt;irq));</div><div class='add'>+	tps65910-&gt;irq_mask |= (1 &lt;&lt; data-&gt;hwirq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='hunk'>@@ -164,10 +159,35 @@ static struct irq_chip tps65910_irq_chip = {</div><div class='ctx'> 	.irq_set_wake = tps65910_irq_set_wake,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int tps65910_irq_map(struct irq_domain *h, unsigned int virq,</div><div class='add'>+				irq_hw_number_t hw)</div><div class='add'>+{</div><div class='add'>+	struct tps65910 *tps65910 = h-&gt;host_data;</div><div class='add'>+</div><div class='add'>+	irq_set_chip_data(virq, tps65910);</div><div class='add'>+	irq_set_chip_and_handler(virq, &amp;tps65910_irq_chip, handle_edge_irq);</div><div class='add'>+	irq_set_nested_thread(virq, 1);</div><div class='add'>+</div><div class='add'>+	/* ARM needs us to explicitly flag the IRQ as valid</div><div class='add'>+	 * and will set them noprobe when we do so. */</div><div class='add'>+#ifdef CONFIG_ARM</div><div class='add'>+	set_irq_flags(virq, IRQF_VALID);</div><div class='add'>+#else</div><div class='add'>+	irq_set_noprobe(virq);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_domain_ops tps65910_domain_ops = {</div><div class='add'>+	.map	= tps65910_irq_map,</div><div class='add'>+	.xlate	= irq_domain_xlate_twocell,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int tps65910_irq_init(struct tps65910 *tps65910, int irq,</div><div class='ctx'> 		    struct tps65910_platform_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	int ret, cur_irq;</div><div class='add'>+	int ret;</div><div class='ctx'> 	int flags = IRQF_ONESHOT;</div><div class='ctx'> </div><div class='ctx'> 	if (!irq) {</div><div class='hunk'>@@ -175,17 +195,11 @@ int tps65910_irq_init(struct tps65910 *tps65910, int irq,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!pdata || !pdata-&gt;irq_base) {</div><div class='del'>-		dev_warn(tps65910-&gt;dev, "No interrupt support, no IRQ base\n");</div><div class='add'>+	if (!pdata) {</div><div class='add'>+		dev_warn(tps65910-&gt;dev, "No interrupt support, no pdata\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tps65910-&gt;irq_mask = 0xFFFFFF;</div><div class='del'>-</div><div class='del'>-	mutex_init(&amp;tps65910-&gt;irq_lock);</div><div class='del'>-	tps65910-&gt;chip_irq = irq;</div><div class='del'>-	tps65910-&gt;irq_base = pdata-&gt;irq_base;</div><div class='del'>-</div><div class='ctx'> 	switch (tps65910_chip_id(tps65910)) {</div><div class='ctx'> 	case TPS65910:</div><div class='ctx'> 		tps65910-&gt;irq_num = TPS65910_NUM_IRQ;</div><div class='hunk'>@@ -195,22 +209,36 @@ int tps65910_irq_init(struct tps65910 *tps65910, int irq,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Register with genirq */</div><div class='del'>-	for (cur_irq = tps65910-&gt;irq_base;</div><div class='del'>-	     cur_irq &lt; tps65910-&gt;irq_num + tps65910-&gt;irq_base;</div><div class='del'>-	     cur_irq++) {</div><div class='del'>-		irq_set_chip_data(cur_irq, tps65910);</div><div class='del'>-		irq_set_chip_and_handler(cur_irq, &amp;tps65910_irq_chip,</div><div class='del'>-					 handle_edge_irq);</div><div class='del'>-		irq_set_nested_thread(cur_irq, 1);</div><div class='del'>-</div><div class='del'>-		/* ARM needs us to explicitly flag the IRQ as valid</div><div class='del'>-		 * and will set them noprobe when we do so. */</div><div class='del'>-#ifdef CONFIG_ARM</div><div class='del'>-		set_irq_flags(cur_irq, IRQF_VALID);</div><div class='del'>-#else</div><div class='del'>-		irq_set_noprobe(cur_irq);</div><div class='del'>-#endif</div><div class='add'>+	if (pdata-&gt;irq_base &gt; 0) {</div><div class='add'>+		pdata-&gt;irq_base = irq_alloc_descs(pdata-&gt;irq_base, 0,</div><div class='add'>+					tps65910-&gt;irq_num, -1);</div><div class='add'>+		if (pdata-&gt;irq_base &lt; 0) {</div><div class='add'>+			dev_warn(tps65910-&gt;dev, "Failed to alloc IRQs: %d\n",</div><div class='add'>+					pdata-&gt;irq_base);</div><div class='add'>+			return pdata-&gt;irq_base;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tps65910-&gt;irq_mask = 0xFFFFFF;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;tps65910-&gt;irq_lock);</div><div class='add'>+	tps65910-&gt;chip_irq = irq;</div><div class='add'>+	tps65910-&gt;irq_base = pdata-&gt;irq_base;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;irq_base &gt; 0)</div><div class='add'>+		tps65910-&gt;domain = irq_domain_add_legacy(tps65910-&gt;dev-&gt;of_node,</div><div class='add'>+					tps65910-&gt;irq_num,</div><div class='add'>+					pdata-&gt;irq_base,</div><div class='add'>+					0,</div><div class='add'>+					&amp;tps65910_domain_ops, tps65910);</div><div class='add'>+	else</div><div class='add'>+		tps65910-&gt;domain = irq_domain_add_linear(tps65910-&gt;dev-&gt;of_node,</div><div class='add'>+					tps65910-&gt;irq_num,</div><div class='add'>+					&amp;tps65910_domain_ops, tps65910);</div><div class='add'>+</div><div class='add'>+	if (!tps65910-&gt;domain) {</div><div class='add'>+		dev_err(tps65910-&gt;dev, "Failed to create IRQ domain\n");</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = request_threaded_irq(irq, NULL, tps65910_irq, flags,</div><div class='head'>diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c<br/>index bf2b25ebf2ca..be9e07b77325 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/tps65910.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/tps65910.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/tps65910.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/tps65910.c</a></div><div class='hunk'>@@ -19,13 +19,16 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/core.h&gt;</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/tps65910.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='ctx'> </div><div class='ctx'> static struct mfd_cell tps65910s[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.name = "tps65910-gpio",</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		.name = "tps65910-pmic",</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='hunk'>@@ -37,30 +40,6 @@ static struct mfd_cell tps65910s[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int tps65910_i2c_read(struct tps65910 *tps65910, u8 reg,</div><div class='del'>-				  int bytes, void *dest)</div><div class='del'>-{</div><div class='del'>-	return regmap_bulk_read(tps65910-&gt;regmap, reg, dest, bytes);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tps65910_i2c_write(struct tps65910 *tps65910, u8 reg,</div><div class='del'>-				  int bytes, void *src)</div><div class='del'>-{</div><div class='del'>-	return regmap_bulk_write(tps65910-&gt;regmap, reg, src, bytes);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int tps65910_set_bits(struct tps65910 *tps65910, u8 reg, u8 mask)</div><div class='del'>-{</div><div class='del'>-	return regmap_update_bits(tps65910-&gt;regmap, reg, mask, mask);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(tps65910_set_bits);</div><div class='del'>-</div><div class='del'>-int tps65910_clear_bits(struct tps65910 *tps65910, u8 reg, u8 mask)</div><div class='del'>-{</div><div class='del'>-	return regmap_update_bits(tps65910-&gt;regmap, reg, mask, 0);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(tps65910_clear_bits);</div><div class='del'>-</div><div class='ctx'> static bool is_volatile_reg(struct device *dev, unsigned int reg)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65910 *tps65910 = dev_get_drvdata(dev);</div><div class='hunk'>@@ -85,80 +64,197 @@ static const struct regmap_config tps65910_regmap_config = {</div><div class='ctx'> 	.reg_bits = 8,</div><div class='ctx'> 	.val_bits = 8,</div><div class='ctx'> 	.volatile_reg = is_volatile_reg,</div><div class='del'>-	.max_register = TPS65910_MAX_REGISTER,</div><div class='del'>-	.num_reg_defaults_raw = TPS65910_MAX_REGISTER,</div><div class='add'>+	.max_register = TPS65910_MAX_REGISTER - 1,</div><div class='ctx'> 	.cache_type = REGCACHE_RBTREE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int tps65910_i2c_probe(struct i2c_client *i2c,</div><div class='del'>-			    const struct i2c_device_id *id)</div><div class='add'>+static int __devinit tps65910_sleepinit(struct tps65910 *tps65910,</div><div class='add'>+		struct tps65910_board *pmic_pdata)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = NULL;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	dev = tps65910-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (!pmic_pdata-&gt;en_dev_slp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* enabling SLEEP device state */</div><div class='add'>+	ret = tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL,</div><div class='add'>+				DEVCTRL_DEV_SLP_MASK);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "set dev_slp failed: %d\n", ret);</div><div class='add'>+		goto err_sleep_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Return if there is no sleep keepon data. */</div><div class='add'>+	if (!pmic_pdata-&gt;slp_keepon)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (pmic_pdata-&gt;slp_keepon-&gt;therm_keepon) {</div><div class='add'>+		ret = tps65910_reg_set_bits(tps65910,</div><div class='add'>+				TPS65910_SLEEP_KEEP_RES_ON,</div><div class='add'>+				SLEEP_KEEP_RES_ON_THERM_KEEPON_MASK);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(dev, "set therm_keepon failed: %d\n", ret);</div><div class='add'>+			goto disable_dev_slp;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pmic_pdata-&gt;slp_keepon-&gt;clkout32k_keepon) {</div><div class='add'>+		ret = tps65910_reg_set_bits(tps65910,</div><div class='add'>+				TPS65910_SLEEP_KEEP_RES_ON,</div><div class='add'>+				SLEEP_KEEP_RES_ON_CLKOUT32K_KEEPON_MASK);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(dev, "set clkout32k_keepon failed: %d\n", ret);</div><div class='add'>+			goto disable_dev_slp;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pmic_pdata-&gt;slp_keepon-&gt;i2chs_keepon) {</div><div class='add'>+		ret = tps65910_reg_set_bits(tps65910,</div><div class='add'>+				TPS65910_SLEEP_KEEP_RES_ON,</div><div class='add'>+				SLEEP_KEEP_RES_ON_I2CHS_KEEPON_MASK);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(dev, "set i2chs_keepon failed: %d\n", ret);</div><div class='add'>+			goto disable_dev_slp;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+disable_dev_slp:</div><div class='add'>+	tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,</div><div class='add'>+				DEVCTRL_DEV_SLP_MASK);</div><div class='add'>+</div><div class='add'>+err_sleep_init:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static struct of_device_id tps65910_of_match[] = {</div><div class='add'>+	{ .compatible = "ti,tps65910", .data = (void *)TPS65910},</div><div class='add'>+	{ .compatible = "ti,tps65911", .data = (void *)TPS65911},</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, tps65910_of_match);</div><div class='add'>+</div><div class='add'>+static struct tps65910_board *tps65910_parse_dt(struct i2c_client *client,</div><div class='add'>+						int *chip_id)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = client-&gt;dev.of_node;</div><div class='add'>+	struct tps65910_board *board_info;</div><div class='add'>+	unsigned int prop;</div><div class='add'>+	const struct of_device_id *match;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	match = of_match_device(tps65910_of_match, &amp;client-&gt;dev);</div><div class='add'>+	if (!match) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Failed to find matching dt id\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*chip_id  = (int)match-&gt;data;</div><div class='add'>+</div><div class='add'>+	board_info = devm_kzalloc(&amp;client-&gt;dev, sizeof(*board_info),</div><div class='add'>+			GFP_KERNEL);</div><div class='add'>+	if (!board_info) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Failed to allocate pdata\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(np, "ti,vmbch-threshold", &amp;prop);</div><div class='add'>+	if (!ret)</div><div class='add'>+		board_info-&gt;vmbch_threshold = prop;</div><div class='add'>+	else if (*chip_id == TPS65911)</div><div class='add'>+		dev_warn(&amp;client-&gt;dev, "VMBCH-Threshold not specified");</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(np, "ti,vmbch2-threshold", &amp;prop);</div><div class='add'>+	if (!ret)</div><div class='add'>+		board_info-&gt;vmbch2_threshold = prop;</div><div class='add'>+	else if (*chip_id == TPS65911)</div><div class='add'>+		dev_warn(&amp;client-&gt;dev, "VMBCH2-Threshold not specified");</div><div class='add'>+</div><div class='add'>+	board_info-&gt;irq = client-&gt;irq;</div><div class='add'>+	board_info-&gt;irq_base = -1;</div><div class='add'>+</div><div class='add'>+	return board_info;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline</div><div class='add'>+struct tps65910_board *tps65910_parse_dt(struct i2c_client *client,</div><div class='add'>+					 int *chip_id)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static __devinit int tps65910_i2c_probe(struct i2c_client *i2c,</div><div class='add'>+					const struct i2c_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65910 *tps65910;</div><div class='ctx'> 	struct tps65910_board *pmic_plat_data;</div><div class='add'>+	struct tps65910_board *of_pmic_plat_data = NULL;</div><div class='ctx'> 	struct tps65910_platform_data *init_data;</div><div class='ctx'> 	int ret = 0;</div><div class='add'>+	int chip_id = id-&gt;driver_data;</div><div class='ctx'> </div><div class='ctx'> 	pmic_plat_data = dev_get_platdata(&amp;i2c-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!pmic_plat_data &amp;&amp; i2c-&gt;dev.of_node) {</div><div class='add'>+		pmic_plat_data = tps65910_parse_dt(i2c, &amp;chip_id);</div><div class='add'>+		of_pmic_plat_data = pmic_plat_data;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!pmic_plat_data)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	init_data = kzalloc(sizeof(struct tps65910_platform_data), GFP_KERNEL);</div><div class='add'>+	init_data = devm_kzalloc(&amp;i2c-&gt;dev, sizeof(*init_data), GFP_KERNEL);</div><div class='ctx'> 	if (init_data == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	tps65910 = kzalloc(sizeof(struct tps65910), GFP_KERNEL);</div><div class='del'>-	if (tps65910 == NULL) {</div><div class='del'>-		kfree(init_data);</div><div class='add'>+	tps65910 = devm_kzalloc(&amp;i2c-&gt;dev, sizeof(*tps65910), GFP_KERNEL);</div><div class='add'>+	if (tps65910 == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='add'>+	tps65910-&gt;of_plat_data = of_pmic_plat_data;</div><div class='ctx'> 	i2c_set_clientdata(i2c, tps65910);</div><div class='ctx'> 	tps65910-&gt;dev = &amp;i2c-&gt;dev;</div><div class='ctx'> 	tps65910-&gt;i2c_client = i2c;</div><div class='del'>-	tps65910-&gt;id = id-&gt;driver_data;</div><div class='del'>-	tps65910-&gt;read = tps65910_i2c_read;</div><div class='del'>-	tps65910-&gt;write = tps65910_i2c_write;</div><div class='add'>+	tps65910-&gt;id = chip_id;</div><div class='ctx'> 	mutex_init(&amp;tps65910-&gt;io_mutex);</div><div class='ctx'> </div><div class='del'>-	tps65910-&gt;regmap = regmap_init_i2c(i2c, &amp;tps65910_regmap_config);</div><div class='add'>+	tps65910-&gt;regmap = devm_regmap_init_i2c(i2c, &amp;tps65910_regmap_config);</div><div class='ctx'> 	if (IS_ERR(tps65910-&gt;regmap)) {</div><div class='ctx'> 		ret = PTR_ERR(tps65910-&gt;regmap);</div><div class='ctx'> 		dev_err(&amp;i2c-&gt;dev, "regmap initialization failed: %d\n", ret);</div><div class='del'>-		goto regmap_err;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = mfd_add_devices(tps65910-&gt;dev, -1,</div><div class='ctx'> 			      tps65910s, ARRAY_SIZE(tps65910s),</div><div class='ctx'> 			      NULL, 0);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto err;</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;i2c-&gt;dev, "mfd_add_devices failed: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	init_data-&gt;irq = pmic_plat_data-&gt;irq;</div><div class='ctx'> 	init_data-&gt;irq_base = pmic_plat_data-&gt;irq_base;</div><div class='ctx'> </div><div class='del'>-	tps65910_gpio_init(tps65910, pmic_plat_data-&gt;gpio_base);</div><div class='del'>-</div><div class='ctx'> 	tps65910_irq_init(tps65910, init_data-&gt;irq, init_data);</div><div class='ctx'> </div><div class='del'>-	kfree(init_data);</div><div class='del'>-	return ret;</div><div class='add'>+	tps65910_sleepinit(tps65910, pmic_plat_data);</div><div class='ctx'> </div><div class='del'>-err:</div><div class='del'>-	regmap_exit(tps65910-&gt;regmap);</div><div class='del'>-regmap_err:</div><div class='del'>-	kfree(tps65910);</div><div class='del'>-	kfree(init_data);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65910_i2c_remove(struct i2c_client *i2c)</div><div class='add'>+static __devexit int tps65910_i2c_remove(struct i2c_client *i2c)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65910 *tps65910 = i2c_get_clientdata(i2c);</div><div class='ctx'> </div><div class='ctx'> 	tps65910_irq_exit(tps65910);</div><div class='ctx'> 	mfd_remove_devices(tps65910-&gt;dev);</div><div class='del'>-	regmap_exit(tps65910-&gt;regmap);</div><div class='del'>-	kfree(tps65910);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -175,9 +271,10 @@ static struct i2c_driver tps65910_i2c_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		   .name = "tps65910",</div><div class='ctx'> 		   .owner = THIS_MODULE,</div><div class='add'>+		   .of_match_table = of_match_ptr(tps65910_of_match),</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = tps65910_i2c_probe,</div><div class='del'>-	.remove = tps65910_i2c_remove,</div><div class='add'>+	.remove = __devexit_p(tps65910_i2c_remove),</div><div class='ctx'> 	.id_table = tps65910_i2c_id,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/tps65911-comparator.c b/drivers/mfd/tps65911-comparator.c<br/>index e7ff783aa31e..5a62e6bf89ae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/tps65911-comparator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/tps65911-comparator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/tps65911-comparator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/tps65911-comparator.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #define COMP1					1</div><div class='ctx'> #define COMP2					2</div><div class='ctx'> </div><div class='del'>-/* Comparator 1 voltage selection table in milivolts */</div><div class='add'>+/* Comparator 1 voltage selection table in millivolts */</div><div class='ctx'> static const u16 COMP_VSEL_TABLE[] = {</div><div class='ctx'> 	0, 2500, 2500, 2500, 2500, 2550, 2600, 2650,</div><div class='ctx'> 	2700, 2750, 2800, 2850, 2900, 2950, 3000, 3050,</div><div class='head'>diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c<br/>index 7c2267e71f8b..6fc90befa79e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/twl-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/twl-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/twl-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/twl-core.c</a></div><div class='hunk'>@@ -224,13 +224,6 @@</div><div class='ctx'> #define HIGH_PERF_SQ			(1 &lt;&lt; 3)</div><div class='ctx'> #define CK32K_LOWPWR_EN			(1 &lt;&lt; 7)</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* chip-specific feature flags, for i2c_device_id.driver_data */</div><div class='del'>-#define TWL4030_VAUX2		BIT(0)	/* pre-5030 voltage ranges */</div><div class='del'>-#define TPS_SUBSET		BIT(1)	/* tps659[23]0 have fewer LDOs */</div><div class='del'>-#define TWL5031			BIT(2)  /* twl5031 has different registers */</div><div class='del'>-#define TWL6030_CLASS		BIT(3)	/* TWL6030 class */</div><div class='del'>-</div><div class='ctx'> /*----------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='ctx'> /* is driver active, bound to a chip? */</div><div class='head'>diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c<br/>index 5d656e814358..ad733d76207a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/twl4030-irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/twl4030-irq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/twl4030-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/twl4030-irq.c</a></div><div class='hunk'>@@ -757,6 +757,7 @@ int twl4030_init_irq(struct device *dev, int irq_num)</div><div class='ctx'> 		dev_err(dev, "could not claim irq%d: %d\n", irq_num, status);</div><div class='ctx'> 		goto fail_rqirq;</div><div class='ctx'> 	}</div><div class='add'>+	enable_irq_wake(irq_num);</div><div class='ctx'> </div><div class='ctx'> 	return irq_base;</div><div class='ctx'> fail_rqirq:</div><div class='head'>diff --git a/drivers/mfd/twl6040-core.c b/drivers/mfd/twl6040-core.c<br/>index 2d6bedadca09..4ded9e7aa246 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/twl6040-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/twl6040-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/twl6040-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/twl6040-core.c</a></div><div class='hunk'>@@ -27,7 +27,12 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_gpio.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='hunk'>@@ -35,8 +40,24 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/core.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/twl6040.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)</div><div class='add'>+#define TWL6040_NUM_SUPPLIES	(2)</div><div class='add'>+</div><div class='add'>+static bool twl6040_has_vibra(struct twl6040_platform_data *pdata,</div><div class='add'>+			      struct device_node *node)</div><div class='add'>+{</div><div class='add'>+	if (pdata &amp;&amp; pdata-&gt;vibra)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+	if (of_find_node_by_name(node, "vibra"))</div><div class='add'>+		return true;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)</div><div class='ctx'> {</div><div class='hunk'>@@ -502,17 +523,18 @@ static int __devinit twl6040_probe(struct i2c_client *client,</div><div class='ctx'> 				     const struct i2c_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct twl6040_platform_data *pdata = client-&gt;dev.platform_data;</div><div class='add'>+	struct device_node *node = client-&gt;dev.of_node;</div><div class='ctx'> 	struct twl6040 *twl6040;</div><div class='ctx'> 	struct mfd_cell *cell = NULL;</div><div class='del'>-	int ret, children = 0;</div><div class='add'>+	int irq, ret, children = 0;</div><div class='ctx'> </div><div class='del'>-	if (!pdata) {</div><div class='add'>+	if (!pdata &amp;&amp; !node) {</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "Platform data is missing\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* In order to operate correctly we need valid interrupt config */</div><div class='del'>-	if (!client-&gt;irq || !pdata-&gt;irq_base) {</div><div class='add'>+	if (!client-&gt;irq) {</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "Invalid IRQ configuration\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -524,7 +546,7 @@ static int __devinit twl6040_probe(struct i2c_client *client,</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	twl6040-&gt;regmap = regmap_init_i2c(client, &amp;twl6040_regmap_config);</div><div class='add'>+	twl6040-&gt;regmap = devm_regmap_init_i2c(client, &amp;twl6040_regmap_config);</div><div class='ctx'> 	if (IS_ERR(twl6040-&gt;regmap)) {</div><div class='ctx'> 		ret = PTR_ERR(twl6040-&gt;regmap);</div><div class='ctx'> 		goto err;</div><div class='hunk'>@@ -532,9 +554,23 @@ static int __devinit twl6040_probe(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> 	i2c_set_clientdata(client, twl6040);</div><div class='ctx'> </div><div class='add'>+	twl6040-&gt;supplies[0].supply = "vio";</div><div class='add'>+	twl6040-&gt;supplies[1].supply = "v2v1";</div><div class='add'>+	ret = regulator_bulk_get(&amp;client-&gt;dev, TWL6040_NUM_SUPPLIES,</div><div class='add'>+				 twl6040-&gt;supplies);</div><div class='add'>+	if (ret != 0) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Failed to get supplies: %d\n", ret);</div><div class='add'>+		goto regulator_get_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040-&gt;supplies);</div><div class='add'>+	if (ret != 0) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Failed to enable supplies: %d\n", ret);</div><div class='add'>+		goto power_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	twl6040-&gt;dev = &amp;client-&gt;dev;</div><div class='ctx'> 	twl6040-&gt;irq = client-&gt;irq;</div><div class='del'>-	twl6040-&gt;irq_base = pdata-&gt;irq_base;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;twl6040-&gt;mutex);</div><div class='ctx'> 	mutex_init(&amp;twl6040-&gt;io_mutex);</div><div class='hunk'>@@ -543,22 +579,26 @@ static int __devinit twl6040_probe(struct i2c_client *client,</div><div class='ctx'> 	twl6040-&gt;rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);</div><div class='ctx'> </div><div class='ctx'> 	/* ERRATA: Automatic power-up is not possible in ES1.0 */</div><div class='del'>-	if (twl6040_get_revid(twl6040) &gt; TWL6040_REV_ES1_0)</div><div class='del'>-		twl6040-&gt;audpwron = pdata-&gt;audpwron_gpio;</div><div class='del'>-	else</div><div class='add'>+	if (twl6040_get_revid(twl6040) &gt; TWL6040_REV_ES1_0) {</div><div class='add'>+		if (pdata)</div><div class='add'>+			twl6040-&gt;audpwron = pdata-&gt;audpwron_gpio;</div><div class='add'>+		else</div><div class='add'>+			twl6040-&gt;audpwron = of_get_named_gpio(node,</div><div class='add'>+						"ti,audpwron-gpio", 0);</div><div class='add'>+	} else</div><div class='ctx'> 		twl6040-&gt;audpwron = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (gpio_is_valid(twl6040-&gt;audpwron)) {</div><div class='ctx'> 		ret = gpio_request_one(twl6040-&gt;audpwron, GPIOF_OUT_INIT_LOW,</div><div class='ctx'> 				       "audpwron");</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto gpio1_err;</div><div class='add'>+			goto gpio_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* codec interrupt */</div><div class='ctx'> 	ret = twl6040_irq_init(twl6040);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto gpio2_err;</div><div class='add'>+		goto irq_init_err;</div><div class='ctx'> </div><div class='ctx'> 	ret = request_threaded_irq(twl6040-&gt;irq_base + TWL6040_IRQ_READY,</div><div class='ctx'> 				   NULL, twl6040_naudint_handler, 0,</div><div class='hunk'>@@ -572,22 +612,27 @@ static int __devinit twl6040_probe(struct i2c_client *client,</div><div class='ctx'> 	/* dual-access registers controlled by I2C only */</div><div class='ctx'> 	twl6040_set_bits(twl6040, TWL6040_REG_ACCCTL, TWL6040_I2CSEL);</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;codec) {</div><div class='del'>-		int irq = twl6040-&gt;irq_base + TWL6040_IRQ_PLUG;</div><div class='del'>-</div><div class='del'>-		cell = &amp;twl6040-&gt;cells[children];</div><div class='del'>-		cell-&gt;name = "twl6040-codec";</div><div class='del'>-		twl6040_codec_rsrc[0].start = irq;</div><div class='del'>-		twl6040_codec_rsrc[0].end = irq;</div><div class='del'>-		cell-&gt;resources = twl6040_codec_rsrc;</div><div class='del'>-		cell-&gt;num_resources = ARRAY_SIZE(twl6040_codec_rsrc);</div><div class='add'>+	/*</div><div class='add'>+	 * The main functionality of twl6040 to provide audio on OMAP4+ systems.</div><div class='add'>+	 * We can add the ASoC codec child whenever this driver has been loaded.</div><div class='add'>+	 * The ASoC codec can work without pdata, pass the platform_data only if</div><div class='add'>+	 * it has been provided.</div><div class='add'>+	 */</div><div class='add'>+	irq = twl6040-&gt;irq_base + TWL6040_IRQ_PLUG;</div><div class='add'>+	cell = &amp;twl6040-&gt;cells[children];</div><div class='add'>+	cell-&gt;name = "twl6040-codec";</div><div class='add'>+	twl6040_codec_rsrc[0].start = irq;</div><div class='add'>+	twl6040_codec_rsrc[0].end = irq;</div><div class='add'>+	cell-&gt;resources = twl6040_codec_rsrc;</div><div class='add'>+	cell-&gt;num_resources = ARRAY_SIZE(twl6040_codec_rsrc);</div><div class='add'>+	if (pdata &amp;&amp; pdata-&gt;codec) {</div><div class='ctx'> 		cell-&gt;platform_data = pdata-&gt;codec;</div><div class='ctx'> 		cell-&gt;pdata_size = sizeof(*pdata-&gt;codec);</div><div class='del'>-		children++;</div><div class='ctx'> 	}</div><div class='add'>+	children++;</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;vibra) {</div><div class='del'>-		int irq = twl6040-&gt;irq_base + TWL6040_IRQ_VIB;</div><div class='add'>+	if (twl6040_has_vibra(pdata, node)) {</div><div class='add'>+		irq = twl6040-&gt;irq_base + TWL6040_IRQ_VIB;</div><div class='ctx'> </div><div class='ctx'> 		cell = &amp;twl6040-&gt;cells[children];</div><div class='ctx'> 		cell-&gt;name = "twl6040-vibra";</div><div class='hunk'>@@ -596,21 +641,17 @@ static int __devinit twl6040_probe(struct i2c_client *client,</div><div class='ctx'> 		cell-&gt;resources = twl6040_vibra_rsrc;</div><div class='ctx'> 		cell-&gt;num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);</div><div class='ctx'> </div><div class='del'>-		cell-&gt;platform_data = pdata-&gt;vibra;</div><div class='del'>-		cell-&gt;pdata_size = sizeof(*pdata-&gt;vibra);</div><div class='add'>+		if (pdata &amp;&amp; pdata-&gt;vibra) {</div><div class='add'>+			cell-&gt;platform_data = pdata-&gt;vibra;</div><div class='add'>+			cell-&gt;pdata_size = sizeof(*pdata-&gt;vibra);</div><div class='add'>+		}</div><div class='ctx'> 		children++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (children) {</div><div class='del'>-		ret = mfd_add_devices(&amp;client-&gt;dev, -1, twl6040-&gt;cells,</div><div class='del'>-				      children, NULL, 0);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto mfd_err;</div><div class='del'>-	} else {</div><div class='del'>-		dev_err(&amp;client-&gt;dev, "No platform data found for children\n");</div><div class='del'>-		ret = -ENODEV;</div><div class='add'>+	ret = mfd_add_devices(&amp;client-&gt;dev, -1, twl6040-&gt;cells, children,</div><div class='add'>+			      NULL, 0);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto mfd_err;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -618,12 +659,15 @@ mfd_err:</div><div class='ctx'> 	free_irq(twl6040-&gt;irq_base + TWL6040_IRQ_READY, twl6040);</div><div class='ctx'> irq_err:</div><div class='ctx'> 	twl6040_irq_exit(twl6040);</div><div class='del'>-gpio2_err:</div><div class='add'>+irq_init_err:</div><div class='ctx'> 	if (gpio_is_valid(twl6040-&gt;audpwron))</div><div class='ctx'> 		gpio_free(twl6040-&gt;audpwron);</div><div class='del'>-gpio1_err:</div><div class='add'>+gpio_err:</div><div class='add'>+	regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040-&gt;supplies);</div><div class='add'>+power_err:</div><div class='add'>+	regulator_bulk_free(TWL6040_NUM_SUPPLIES, twl6040-&gt;supplies);</div><div class='add'>+regulator_get_err:</div><div class='ctx'> 	i2c_set_clientdata(client, NULL);</div><div class='del'>-	regmap_exit(twl6040-&gt;regmap);</div><div class='ctx'> err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -643,7 +687,9 @@ static int __devexit twl6040_remove(struct i2c_client *client)</div><div class='ctx'> </div><div class='ctx'> 	mfd_remove_devices(&amp;client-&gt;dev);</div><div class='ctx'> 	i2c_set_clientdata(client, NULL);</div><div class='del'>-	regmap_exit(twl6040-&gt;regmap);</div><div class='add'>+</div><div class='add'>+	regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040-&gt;supplies);</div><div class='add'>+	regulator_bulk_free(TWL6040_NUM_SUPPLIES, twl6040-&gt;supplies);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/mfd/twl6040-irq.c b/drivers/mfd/twl6040-irq.c<br/>index b3f8ddaa28a8..4b42543da228 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/twl6040-irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/twl6040-irq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/twl6040-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/twl6040-irq.c</a></div><div class='hunk'>@@ -23,7 +23,10 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/core.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/twl6040.h&gt;</div><div class='hunk'>@@ -138,7 +141,8 @@ static irqreturn_t twl6040_irq_thread(int irq, void *data)</div><div class='ctx'> </div><div class='ctx'> int twl6040_irq_init(struct twl6040 *twl6040)</div><div class='ctx'> {</div><div class='del'>-	int cur_irq, ret;</div><div class='add'>+	struct device_node *node = twl6040-&gt;dev-&gt;of_node;</div><div class='add'>+	int i, nr_irqs, irq_base, ret;</div><div class='ctx'> 	u8 val;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;twl6040-&gt;irq_mutex);</div><div class='hunk'>@@ -148,21 +152,31 @@ int twl6040_irq_init(struct twl6040 *twl6040)</div><div class='ctx'> 	twl6040-&gt;irq_masks_cache = TWL6040_ALLINT_MSK;</div><div class='ctx'> 	twl6040_reg_write(twl6040, TWL6040_REG_INTMR, TWL6040_ALLINT_MSK);</div><div class='ctx'> </div><div class='add'>+	nr_irqs = ARRAY_SIZE(twl6040_irqs);</div><div class='add'>+</div><div class='add'>+	irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0);</div><div class='add'>+	if (IS_ERR_VALUE(irq_base)) {</div><div class='add'>+		dev_err(twl6040-&gt;dev, "Fail to allocate IRQ descs\n");</div><div class='add'>+		return irq_base;</div><div class='add'>+	}</div><div class='add'>+	twl6040-&gt;irq_base = irq_base;</div><div class='add'>+</div><div class='add'>+	irq_domain_add_legacy(node, ARRAY_SIZE(twl6040_irqs), irq_base, 0,</div><div class='add'>+			      &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+</div><div class='ctx'> 	/* Register them with genirq */</div><div class='del'>-	for (cur_irq = twl6040-&gt;irq_base;</div><div class='del'>-	     cur_irq &lt; twl6040-&gt;irq_base + ARRAY_SIZE(twl6040_irqs);</div><div class='del'>-	     cur_irq++) {</div><div class='del'>-		irq_set_chip_data(cur_irq, twl6040);</div><div class='del'>-		irq_set_chip_and_handler(cur_irq, &amp;twl6040_irq_chip,</div><div class='add'>+	for (i = irq_base; i &lt; irq_base + nr_irqs; i++) {</div><div class='add'>+		irq_set_chip_data(i, twl6040);</div><div class='add'>+		irq_set_chip_and_handler(i, &amp;twl6040_irq_chip,</div><div class='ctx'> 					 handle_level_irq);</div><div class='del'>-		irq_set_nested_thread(cur_irq, 1);</div><div class='add'>+		irq_set_nested_thread(i, 1);</div><div class='ctx'> </div><div class='ctx'> 		/* ARM needs us to explicitly flag the IRQ as valid</div><div class='ctx'> 		 * and will set them noprobe when we do so. */</div><div class='ctx'> #ifdef CONFIG_ARM</div><div class='del'>-		set_irq_flags(cur_irq, IRQF_VALID);</div><div class='add'>+		set_irq_flags(i, IRQF_VALID);</div><div class='ctx'> #else</div><div class='del'>-		irq_set_noprobe(cur_irq);</div><div class='add'>+		irq_set_noprobe(i);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/vx855.c b/drivers/mfd/vx855.c<br/>index b73cc15e0081..872aff21e4be 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/vx855.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/vx855.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/vx855.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/vx855.c</a></div><div class='hunk'>@@ -131,17 +131,7 @@ static struct pci_driver vx855_pci_driver = {</div><div class='ctx'> 	.remove		= __devexit_p(vx855_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int vx855_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;vx855_pci_driver);</div><div class='del'>-}</div><div class='del'>-module_init(vx855_init);</div><div class='del'>-</div><div class='del'>-static void vx855_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;vx855_pci_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(vx855_exit);</div><div class='add'>+module_pci_driver(vx855_pci_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Harald Welte &lt;HaraldWelte@viatech.com&gt;");</div><div class='head'>diff --git a/drivers/mfd/wm831x-auxadc.c b/drivers/mfd/wm831x-auxadc.c<br/>index 87210954a066..6ee3018d8653 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/wm831x-auxadc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/wm831x-auxadc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/wm831x-auxadc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm831x-auxadc.c</a></div><div class='hunk'>@@ -280,11 +280,11 @@ void wm831x_auxadc_init(struct wm831x *wm831x)</div><div class='ctx'> 	mutex_init(&amp;wm831x-&gt;auxadc_lock);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;wm831x-&gt;auxadc_pending);</div><div class='ctx'> </div><div class='del'>-	if (wm831x-&gt;irq &amp;&amp; wm831x-&gt;irq_base) {</div><div class='add'>+	if (wm831x-&gt;irq) {</div><div class='ctx'> 		wm831x-&gt;auxadc_read = wm831x_auxadc_read_irq;</div><div class='ctx'> </div><div class='del'>-		ret = request_threaded_irq(wm831x-&gt;irq_base +</div><div class='del'>-					   WM831X_IRQ_AUXADC_DATA,</div><div class='add'>+		ret = request_threaded_irq(wm831x_irq(wm831x,</div><div class='add'>+						      WM831X_IRQ_AUXADC_DATA),</div><div class='ctx'> 					   NULL, wm831x_auxadc_irq, 0,</div><div class='ctx'> 					   "auxadc", wm831x);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='head'>diff --git a/drivers/mfd/wm831x-core.c b/drivers/mfd/wm831x-core.c<br/>index 838056c3493a..946698fd2dc6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/wm831x-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/wm831x-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/wm831x-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm831x-core.c</a></div><div class='hunk'>@@ -614,8 +614,15 @@ int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(wm831x_set_bits);</div><div class='ctx'> </div><div class='add'>+static struct resource wm831x_io_parent = {</div><div class='add'>+	.start = 0,</div><div class='add'>+	.end   = 0xffffffff,</div><div class='add'>+	.flags = IORESOURCE_IO,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct resource wm831x_dcdc1_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_DC1_CONTROL_1,</div><div class='ctx'> 		.end   = WM831X_DC1_DVS_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -637,6 +644,7 @@ static struct resource wm831x_dcdc1_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_dcdc2_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_DC2_CONTROL_1,</div><div class='ctx'> 		.end   = WM831X_DC2_DVS_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -657,6 +665,7 @@ static struct resource wm831x_dcdc2_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_dcdc3_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_DC3_CONTROL_1,</div><div class='ctx'> 		.end   = WM831X_DC3_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -671,6 +680,7 @@ static struct resource wm831x_dcdc3_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_dcdc4_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_DC4_CONTROL,</div><div class='ctx'> 		.end   = WM831X_DC4_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -685,6 +695,7 @@ static struct resource wm831x_dcdc4_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm8320_dcdc4_buck_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_DC4_CONTROL,</div><div class='ctx'> 		.end   = WM832X_DC4_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -707,6 +718,7 @@ static struct resource wm831x_gpio_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_isink1_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_CURRENT_SINK_1,</div><div class='ctx'> 		.end   = WM831X_CURRENT_SINK_1,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -720,6 +732,7 @@ static struct resource wm831x_isink1_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_isink2_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_CURRENT_SINK_2,</div><div class='ctx'> 		.end   = WM831X_CURRENT_SINK_2,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -733,6 +746,7 @@ static struct resource wm831x_isink2_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_ldo1_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_LDO1_CONTROL,</div><div class='ctx'> 		.end   = WM831X_LDO1_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -747,6 +761,7 @@ static struct resource wm831x_ldo1_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_ldo2_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_LDO2_CONTROL,</div><div class='ctx'> 		.end   = WM831X_LDO2_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -761,6 +776,7 @@ static struct resource wm831x_ldo2_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_ldo3_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_LDO3_CONTROL,</div><div class='ctx'> 		.end   = WM831X_LDO3_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -775,6 +791,7 @@ static struct resource wm831x_ldo3_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_ldo4_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_LDO4_CONTROL,</div><div class='ctx'> 		.end   = WM831X_LDO4_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -789,6 +806,7 @@ static struct resource wm831x_ldo4_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_ldo5_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_LDO5_CONTROL,</div><div class='ctx'> 		.end   = WM831X_LDO5_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -803,6 +821,7 @@ static struct resource wm831x_ldo5_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_ldo6_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_LDO6_CONTROL,</div><div class='ctx'> 		.end   = WM831X_LDO6_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -817,6 +836,7 @@ static struct resource wm831x_ldo6_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_ldo7_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_LDO7_CONTROL,</div><div class='ctx'> 		.end   = WM831X_LDO7_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -831,6 +851,7 @@ static struct resource wm831x_ldo7_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_ldo8_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_LDO8_CONTROL,</div><div class='ctx'> 		.end   = WM831X_LDO8_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -845,6 +866,7 @@ static struct resource wm831x_ldo8_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_ldo9_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_LDO9_CONTROL,</div><div class='ctx'> 		.end   = WM831X_LDO9_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -859,6 +881,7 @@ static struct resource wm831x_ldo9_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_ldo10_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_LDO10_CONTROL,</div><div class='ctx'> 		.end   = WM831X_LDO10_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -873,6 +896,7 @@ static struct resource wm831x_ldo10_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_ldo11_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_LDO11_ON_CONTROL,</div><div class='ctx'> 		.end   = WM831X_LDO11_SLEEP_CONTROL,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -974,6 +998,7 @@ static struct resource wm831x_rtc_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_status1_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_STATUS_LED_1,</div><div class='ctx'> 		.end   = WM831X_STATUS_LED_1,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -982,6 +1007,7 @@ static struct resource wm831x_status1_resources[] = {</div><div class='ctx'> </div><div class='ctx'> static struct resource wm831x_status2_resources[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.parent = &amp;wm831x_io_parent,</div><div class='ctx'> 		.start = WM831X_STATUS_LED_2,</div><div class='ctx'> 		.end   = WM831X_STATUS_LED_2,</div><div class='ctx'> 		.flags = IORESOURCE_IO,</div><div class='hunk'>@@ -1787,27 +1813,27 @@ int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)</div><div class='ctx'> 	case WM8310:</div><div class='ctx'> 		ret = mfd_add_devices(wm831x-&gt;dev, wm831x_num,</div><div class='ctx'> 				      wm8310_devs, ARRAY_SIZE(wm8310_devs),</div><div class='del'>-				      NULL, wm831x-&gt;irq_base);</div><div class='add'>+				      NULL, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case WM8311:</div><div class='ctx'> 		ret = mfd_add_devices(wm831x-&gt;dev, wm831x_num,</div><div class='ctx'> 				      wm8311_devs, ARRAY_SIZE(wm8311_devs),</div><div class='del'>-				      NULL, wm831x-&gt;irq_base);</div><div class='add'>+				      NULL, 0);</div><div class='ctx'> 		if (!pdata || !pdata-&gt;disable_touch)</div><div class='ctx'> 			mfd_add_devices(wm831x-&gt;dev, wm831x_num,</div><div class='ctx'> 					touch_devs, ARRAY_SIZE(touch_devs),</div><div class='del'>-					NULL, wm831x-&gt;irq_base);</div><div class='add'>+					NULL, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case WM8312:</div><div class='ctx'> 		ret = mfd_add_devices(wm831x-&gt;dev, wm831x_num,</div><div class='ctx'> 				      wm8312_devs, ARRAY_SIZE(wm8312_devs),</div><div class='del'>-				      NULL, wm831x-&gt;irq_base);</div><div class='add'>+				      NULL, 0);</div><div class='ctx'> 		if (!pdata || !pdata-&gt;disable_touch)</div><div class='ctx'> 			mfd_add_devices(wm831x-&gt;dev, wm831x_num,</div><div class='ctx'> 					touch_devs, ARRAY_SIZE(touch_devs),</div><div class='del'>-					NULL, wm831x-&gt;irq_base);</div><div class='add'>+					NULL, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case WM8320:</div><div class='hunk'>@@ -1816,7 +1842,7 @@ int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)</div><div class='ctx'> 	case WM8326:</div><div class='ctx'> 		ret = mfd_add_devices(wm831x-&gt;dev, wm831x_num,</div><div class='ctx'> 				      wm8320_devs, ARRAY_SIZE(wm8320_devs),</div><div class='del'>-				      NULL, wm831x-&gt;irq_base);</div><div class='add'>+				      NULL, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1841,7 +1867,7 @@ int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)</div><div class='ctx'> 	if (ret &amp; WM831X_XTAL_ENA) {</div><div class='ctx'> 		ret = mfd_add_devices(wm831x-&gt;dev, wm831x_num,</div><div class='ctx'> 				      rtc_devs, ARRAY_SIZE(rtc_devs),</div><div class='del'>-				      NULL, wm831x-&gt;irq_base);</div><div class='add'>+				      NULL, 0);</div><div class='ctx'> 		if (ret != 0) {</div><div class='ctx'> 			dev_err(wm831x-&gt;dev, "Failed to add RTC: %d\n", ret);</div><div class='ctx'> 			goto err_irq;</div><div class='hunk'>@@ -1854,7 +1880,7 @@ int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)</div><div class='ctx'> 		/* Treat errors as non-critical */</div><div class='ctx'> 		ret = mfd_add_devices(wm831x-&gt;dev, wm831x_num, backlight_devs,</div><div class='ctx'> 				      ARRAY_SIZE(backlight_devs), NULL,</div><div class='del'>-				      wm831x-&gt;irq_base);</div><div class='add'>+				      0);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			dev_err(wm831x-&gt;dev, "Failed to add backlight: %d\n",</div><div class='ctx'> 				ret);</div><div class='hunk'>@@ -1883,8 +1909,7 @@ void wm831x_device_exit(struct wm831x *wm831x)</div><div class='ctx'> {</div><div class='ctx'> 	wm831x_otp_exit(wm831x);</div><div class='ctx'> 	mfd_remove_devices(wm831x-&gt;dev);</div><div class='del'>-	if (wm831x-&gt;irq_base)</div><div class='del'>-		free_irq(wm831x-&gt;irq_base + WM831X_IRQ_AUXADC_DATA, wm831x);</div><div class='add'>+	free_irq(wm831x_irq(wm831x, WM831X_IRQ_AUXADC_DATA), wm831x);</div><div class='ctx'> 	wm831x_irq_exit(wm831x);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mfd/wm831x-irq.c b/drivers/mfd/wm831x-irq.c<br/>index bec4d0539160..804e56ec99eb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/wm831x-irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/wm831x-irq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/wm831x-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm831x-irq.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/core.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mfd/wm831x/core.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/wm831x/pdata.h&gt;</div><div class='hunk'>@@ -328,7 +329,7 @@ static inline int irq_data_to_status_reg(struct wm831x_irq_data *irq_data)</div><div class='ctx'> static inline struct wm831x_irq_data *irq_to_wm831x_irq(struct wm831x *wm831x,</div><div class='ctx'> 							int irq)</div><div class='ctx'> {</div><div class='del'>-	return &amp;wm831x_irqs[irq - wm831x-&gt;irq_base];</div><div class='add'>+	return &amp;wm831x_irqs[irq];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void wm831x_irq_lock(struct irq_data *data)</div><div class='hunk'>@@ -374,7 +375,7 @@ static void wm831x_irq_enable(struct irq_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x *wm831x = irq_data_get_irq_chip_data(data);</div><div class='ctx'> 	struct wm831x_irq_data *irq_data = irq_to_wm831x_irq(wm831x,</div><div class='del'>-							     data-&gt;irq);</div><div class='add'>+							     data-&gt;hwirq);</div><div class='ctx'> </div><div class='ctx'> 	wm831x-&gt;irq_masks_cur[irq_data-&gt;reg - 1] &amp;= ~irq_data-&gt;mask;</div><div class='ctx'> }</div><div class='hunk'>@@ -383,7 +384,7 @@ static void wm831x_irq_disable(struct irq_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x *wm831x = irq_data_get_irq_chip_data(data);</div><div class='ctx'> 	struct wm831x_irq_data *irq_data = irq_to_wm831x_irq(wm831x,</div><div class='del'>-							     data-&gt;irq);</div><div class='add'>+							     data-&gt;hwirq);</div><div class='ctx'> </div><div class='ctx'> 	wm831x-&gt;irq_masks_cur[irq_data-&gt;reg - 1] |= irq_data-&gt;mask;</div><div class='ctx'> }</div><div class='hunk'>@@ -393,7 +394,7 @@ static int wm831x_irq_set_type(struct irq_data *data, unsigned int type)</div><div class='ctx'> 	struct wm831x *wm831x = irq_data_get_irq_chip_data(data);</div><div class='ctx'> 	int irq;</div><div class='ctx'> </div><div class='del'>-	irq = data-&gt;irq - wm831x-&gt;irq_base;</div><div class='add'>+	irq = data-&gt;hwirq;</div><div class='ctx'> </div><div class='ctx'> 	if (irq &lt; WM831X_IRQ_GPIO_1 || irq &gt; WM831X_IRQ_GPIO_11) {</div><div class='ctx'> 		/* Ignore internal-only IRQs */</div><div class='hunk'>@@ -412,22 +413,25 @@ static int wm831x_irq_set_type(struct irq_data *data, unsigned int type)</div><div class='ctx'> 	 * do the update here as we can be called with the bus lock</div><div class='ctx'> 	 * held.</div><div class='ctx'> 	 */</div><div class='add'>+	wm831x-&gt;gpio_level_low[irq] = false;</div><div class='add'>+	wm831x-&gt;gpio_level_high[irq] = false;</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case IRQ_TYPE_EDGE_BOTH:</div><div class='ctx'> 		wm831x-&gt;gpio_update[irq] = 0x10000 | WM831X_GPN_INT_MODE;</div><div class='del'>-		wm831x-&gt;gpio_level[irq] = false;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IRQ_TYPE_EDGE_RISING:</div><div class='ctx'> 		wm831x-&gt;gpio_update[irq] = 0x10000 | WM831X_GPN_POL;</div><div class='del'>-		wm831x-&gt;gpio_level[irq] = false;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IRQ_TYPE_EDGE_FALLING:</div><div class='ctx'> 		wm831x-&gt;gpio_update[irq] = 0x10000;</div><div class='del'>-		wm831x-&gt;gpio_level[irq] = false;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IRQ_TYPE_LEVEL_HIGH:</div><div class='ctx'> 		wm831x-&gt;gpio_update[irq] = 0x10000 | WM831X_GPN_POL;</div><div class='del'>-		wm831x-&gt;gpio_level[irq] = true;</div><div class='add'>+		wm831x-&gt;gpio_level_high[irq] = true;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_TYPE_LEVEL_LOW:</div><div class='add'>+		wm831x-&gt;gpio_update[irq] = 0x10000;</div><div class='add'>+		wm831x-&gt;gpio_level_low[irq] = true;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -469,9 +473,11 @@ static irqreturn_t wm831x_irq_thread(int irq, void *data)</div><div class='ctx'> 	 * descriptors.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (primary &amp; WM831X_TCHPD_INT)</div><div class='del'>-		handle_nested_irq(wm831x-&gt;irq_base + WM831X_IRQ_TCHPD);</div><div class='add'>+		handle_nested_irq(irq_find_mapping(wm831x-&gt;irq_domain,</div><div class='add'>+						   WM831X_IRQ_TCHPD));</div><div class='ctx'> 	if (primary &amp; WM831X_TCHDATA_INT)</div><div class='del'>-		handle_nested_irq(wm831x-&gt;irq_base + WM831X_IRQ_TCHDATA);</div><div class='add'>+		handle_nested_irq(irq_find_mapping(wm831x-&gt;irq_domain,</div><div class='add'>+						   WM831X_IRQ_TCHDATA));</div><div class='ctx'> 	primary &amp;= ~(WM831X_TCHDATA_EINT | WM831X_TCHPD_EINT);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(wm831x_irqs); i++) {</div><div class='hunk'>@@ -507,16 +513,29 @@ static irqreturn_t wm831x_irq_thread(int irq, void *data)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (*status &amp; wm831x_irqs[i].mask)</div><div class='del'>-			handle_nested_irq(wm831x-&gt;irq_base + i);</div><div class='add'>+			handle_nested_irq(irq_find_mapping(wm831x-&gt;irq_domain,</div><div class='add'>+							   i));</div><div class='ctx'> </div><div class='ctx'> 		/* Simulate an edge triggered IRQ by polling the input</div><div class='ctx'> 		 * status.  This is sucky but improves interoperability.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (primary == WM831X_GP_INT &amp;&amp;</div><div class='del'>-		    wm831x-&gt;gpio_level[i - WM831X_IRQ_GPIO_1]) {</div><div class='add'>+		    wm831x-&gt;gpio_level_high[i - WM831X_IRQ_GPIO_1]) {</div><div class='ctx'> 			ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL);</div><div class='ctx'> 			while (ret &amp; 1 &lt;&lt; (i - WM831X_IRQ_GPIO_1)) {</div><div class='del'>-				handle_nested_irq(wm831x-&gt;irq_base + i);</div><div class='add'>+				handle_nested_irq(irq_find_mapping(wm831x-&gt;irq_domain,</div><div class='add'>+								   i));</div><div class='add'>+				ret = wm831x_reg_read(wm831x,</div><div class='add'>+						      WM831X_GPIO_LEVEL);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (primary == WM831X_GP_INT &amp;&amp;</div><div class='add'>+		    wm831x-&gt;gpio_level_low[i - WM831X_IRQ_GPIO_1]) {</div><div class='add'>+			ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL);</div><div class='add'>+			while (!(ret &amp; 1 &lt;&lt; (i - WM831X_IRQ_GPIO_1))) {</div><div class='add'>+				handle_nested_irq(irq_find_mapping(wm831x-&gt;irq_domain,</div><div class='add'>+								   i));</div><div class='ctx'> 				ret = wm831x_reg_read(wm831x,</div><div class='ctx'> 						      WM831X_GPIO_LEVEL);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -527,10 +546,34 @@ out:</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int wm831x_irq_map(struct irq_domain *h, unsigned int virq,</div><div class='add'>+			  irq_hw_number_t hw)</div><div class='add'>+{</div><div class='add'>+	irq_set_chip_data(virq, h-&gt;host_data);</div><div class='add'>+	irq_set_chip_and_handler(virq, &amp;wm831x_irq_chip, handle_edge_irq);</div><div class='add'>+	irq_set_nested_thread(virq, 1);</div><div class='add'>+</div><div class='add'>+	/* ARM needs us to explicitly flag the IRQ as valid</div><div class='add'>+	 * and will set them noprobe when we do so. */</div><div class='add'>+#ifdef CONFIG_ARM</div><div class='add'>+	set_irq_flags(virq, IRQF_VALID);</div><div class='add'>+#else</div><div class='add'>+	irq_set_noprobe(virq);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_domain_ops wm831x_irq_domain_ops = {</div><div class='add'>+	.map	= wm831x_irq_map,</div><div class='add'>+	.xlate	= irq_domain_xlate_twocell,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int wm831x_irq_init(struct wm831x *wm831x, int irq)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x_pdata *pdata = wm831x-&gt;dev-&gt;platform_data;</div><div class='del'>-	int i, cur_irq, ret;</div><div class='add'>+	struct irq_domain *domain;</div><div class='add'>+	int i, ret, irq_base;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;wm831x-&gt;irq_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -543,18 +586,33 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Try to dynamically allocate IRQs if no base is specified */</div><div class='del'>-	if (!pdata || !pdata-&gt;irq_base)</div><div class='del'>-		wm831x-&gt;irq_base = -1;</div><div class='add'>+	if (pdata &amp;&amp; pdata-&gt;irq_base) {</div><div class='add'>+		irq_base = irq_alloc_descs(pdata-&gt;irq_base, 0,</div><div class='add'>+					   WM831X_NUM_IRQS, 0);</div><div class='add'>+		if (irq_base &lt; 0) {</div><div class='add'>+			dev_warn(wm831x-&gt;dev, "Failed to allocate IRQs: %d\n",</div><div class='add'>+				 irq_base);</div><div class='add'>+			irq_base = 0;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		irq_base = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (irq_base)</div><div class='add'>+		domain = irq_domain_add_legacy(wm831x-&gt;dev-&gt;of_node,</div><div class='add'>+					       ARRAY_SIZE(wm831x_irqs),</div><div class='add'>+					       irq_base, 0,</div><div class='add'>+					       &amp;wm831x_irq_domain_ops,</div><div class='add'>+					       wm831x);</div><div class='ctx'> 	else</div><div class='del'>-		wm831x-&gt;irq_base = pdata-&gt;irq_base;</div><div class='add'>+		domain = irq_domain_add_linear(wm831x-&gt;dev-&gt;of_node,</div><div class='add'>+					       ARRAY_SIZE(wm831x_irqs),</div><div class='add'>+					       &amp;wm831x_irq_domain_ops,</div><div class='add'>+					       wm831x);</div><div class='ctx'> </div><div class='del'>-	wm831x-&gt;irq_base = irq_alloc_descs(wm831x-&gt;irq_base, 0,</div><div class='del'>-					   WM831X_NUM_IRQS, 0);</div><div class='del'>-	if (wm831x-&gt;irq_base &lt; 0) {</div><div class='del'>-		dev_warn(wm831x-&gt;dev, "Failed to allocate IRQs: %d\n",</div><div class='del'>-			 wm831x-&gt;irq_base);</div><div class='del'>-		wm831x-&gt;irq_base = 0;</div><div class='del'>-		return 0;</div><div class='add'>+	if (!domain) {</div><div class='add'>+		dev_warn(wm831x-&gt;dev, "Failed to allocate IRQ domain\n");</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pdata &amp;&amp; pdata-&gt;irq_cmos)</div><div class='hunk'>@@ -565,38 +623,22 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq)</div><div class='ctx'> 	wm831x_set_bits(wm831x, WM831X_IRQ_CONFIG,</div><div class='ctx'> 			WM831X_IRQ_OD, i);</div><div class='ctx'> </div><div class='del'>-	/* Try to flag /IRQ as a wake source; there are a number of</div><div class='del'>-	 * unconditional wake sources in the PMIC so this isn't</div><div class='del'>-	 * conditional but we don't actually care *too* much if it</div><div class='del'>-	 * fails.</div><div class='del'>-	 */</div><div class='del'>-	ret = enable_irq_wake(irq);</div><div class='del'>-	if (ret != 0) {</div><div class='del'>-		dev_warn(wm831x-&gt;dev, "Can't enable IRQ as wake source: %d\n",</div><div class='del'>-			 ret);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	wm831x-&gt;irq = irq;</div><div class='del'>-</div><div class='del'>-	/* Register them with genirq */</div><div class='del'>-	for (cur_irq = wm831x-&gt;irq_base;</div><div class='del'>-	     cur_irq &lt; ARRAY_SIZE(wm831x_irqs) + wm831x-&gt;irq_base;</div><div class='del'>-	     cur_irq++) {</div><div class='del'>-		irq_set_chip_data(cur_irq, wm831x);</div><div class='del'>-		irq_set_chip_and_handler(cur_irq, &amp;wm831x_irq_chip,</div><div class='del'>-					 handle_edge_irq);</div><div class='del'>-		irq_set_nested_thread(cur_irq, 1);</div><div class='del'>-</div><div class='del'>-		/* ARM needs us to explicitly flag the IRQ as valid</div><div class='del'>-		 * and will set them noprobe when we do so. */</div><div class='del'>-#ifdef CONFIG_ARM</div><div class='del'>-		set_irq_flags(cur_irq, IRQF_VALID);</div><div class='del'>-#else</div><div class='del'>-		irq_set_noprobe(cur_irq);</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='add'>+	wm831x-&gt;irq_domain = domain;</div><div class='ctx'> </div><div class='ctx'> 	if (irq) {</div><div class='add'>+		/* Try to flag /IRQ as a wake source; there are a number of</div><div class='add'>+		 * unconditional wake sources in the PMIC so this isn't</div><div class='add'>+		 * conditional but we don't actually care *too* much if it</div><div class='add'>+		 * fails.</div><div class='add'>+		 */</div><div class='add'>+		ret = enable_irq_wake(irq);</div><div class='add'>+		if (ret != 0) {</div><div class='add'>+			dev_warn(wm831x-&gt;dev,</div><div class='add'>+				 "Can't enable IRQ as wake source: %d\n",</div><div class='add'>+				 ret);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		ret = request_threaded_irq(irq, NULL, wm831x_irq_thread,</div><div class='ctx'> 					   IRQF_TRIGGER_LOW | IRQF_ONESHOT,</div><div class='ctx'> 					   "wm831x", wm831x);</div><div class='head'>diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c<br/>index dd1caaac55e4..8a9b11ca076a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/wm8350-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/wm8350-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/wm8350-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm8350-core.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mfd/wm8350/core.h&gt;</div><div class='hunk'>@@ -74,7 +75,7 @@ static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,</div><div class='ctx'> 	int bytes = num_regs * 2;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(wm8350-&gt;dev, "volatile read\n");</div><div class='del'>-	ret = wm8350-&gt;read_dev(wm8350, reg, bytes, (char *)dest);</div><div class='add'>+	ret = regmap_raw_read(wm8350-&gt;regmap, reg, dest, bytes);</div><div class='ctx'> </div><div class='ctx'> 	for (i = reg; i &lt; reg + num_regs; i++) {</div><div class='ctx'> 		/* Cache is CPU endian */</div><div class='hunk'>@@ -96,9 +97,6 @@ static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	int bytes = num_regs * 2;</div><div class='ctx'> </div><div class='del'>-	if (wm8350-&gt;read_dev == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	if ((reg + num_regs - 1) &gt; WM8350_MAX_REGISTER) {</div><div class='ctx'> 		dev_err(wm8350-&gt;dev, "invalid reg %x\n",</div><div class='ctx'> 			reg + num_regs - 1);</div><div class='hunk'>@@ -149,9 +147,6 @@ static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)</div><div class='ctx'> 	int end = reg + num_regs;</div><div class='ctx'> 	int bytes = num_regs * 2;</div><div class='ctx'> </div><div class='del'>-	if (wm8350-&gt;write_dev == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	if ((reg + num_regs - 1) &gt; WM8350_MAX_REGISTER) {</div><div class='ctx'> 		dev_err(wm8350-&gt;dev, "invalid reg %x\n",</div><div class='ctx'> 			reg + num_regs - 1);</div><div class='hunk'>@@ -182,7 +177,7 @@ static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Actually write it out */</div><div class='del'>-	return wm8350-&gt;write_dev(wm8350, reg, bytes, (char *)src);</div><div class='add'>+	return regmap_raw_write(wm8350-&gt;regmap, reg, src, bytes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -515,9 +510,8 @@ static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode)</div><div class='ctx'> 	 * a PMIC so the device many not be in a virgin state and we</div><div class='ctx'> 	 * can't rely on the silicon values.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = wm8350-&gt;read_dev(wm8350, 0,</div><div class='del'>-			       sizeof(u16) * (WM8350_MAX_REGISTER + 1),</div><div class='del'>-			       wm8350-&gt;reg_cache);</div><div class='add'>+	ret = regmap_raw_read(wm8350-&gt;regmap, 0, wm8350-&gt;reg_cache,</div><div class='add'>+			      sizeof(u16) * (WM8350_MAX_REGISTER + 1));</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		dev_err(wm8350-&gt;dev,</div><div class='ctx'> 			"failed to read initial cache values\n");</div><div class='hunk'>@@ -570,35 +564,30 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq,</div><div class='ctx'> 		       struct wm8350_platform_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	u16 id1, id2, mask_rev;</div><div class='del'>-	u16 cust_id, mode, chip_rev;</div><div class='add'>+	unsigned int id1, id2, mask_rev;</div><div class='add'>+	unsigned int cust_id, mode, chip_rev;</div><div class='ctx'> </div><div class='ctx'> 	dev_set_drvdata(wm8350-&gt;dev, wm8350);</div><div class='ctx'> </div><div class='ctx'> 	/* get WM8350 revision and config mode */</div><div class='del'>-	ret = wm8350-&gt;read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &amp;id1);</div><div class='add'>+	ret = regmap_read(wm8350-&gt;regmap, WM8350_RESET_ID, &amp;id1);</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		dev_err(wm8350-&gt;dev, "Failed to read ID: %d\n", ret);</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = wm8350-&gt;read_dev(wm8350, WM8350_ID, sizeof(id2), &amp;id2);</div><div class='add'>+	ret = regmap_read(wm8350-&gt;regmap, WM8350_ID, &amp;id2);</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		dev_err(wm8350-&gt;dev, "Failed to read ID: %d\n", ret);</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = wm8350-&gt;read_dev(wm8350, WM8350_REVISION, sizeof(mask_rev),</div><div class='del'>-			       &amp;mask_rev);</div><div class='add'>+	ret = regmap_read(wm8350-&gt;regmap, WM8350_REVISION, &amp;mask_rev);</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		dev_err(wm8350-&gt;dev, "Failed to read revision: %d\n", ret);</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	id1 = be16_to_cpu(id1);</div><div class='del'>-	id2 = be16_to_cpu(id2);</div><div class='del'>-	mask_rev = be16_to_cpu(mask_rev);</div><div class='del'>-</div><div class='ctx'> 	if (id1 != 0x6143) {</div><div class='ctx'> 		dev_err(wm8350-&gt;dev,</div><div class='ctx'> 			"Device with ID %x is not a WM8350\n", id1);</div><div class='head'>diff --git a/drivers/mfd/wm8350-i2c.c b/drivers/mfd/wm8350-i2c.c<br/>index d955faaf27c4..a68aceb4e48c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/wm8350-i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/wm8350-i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/wm8350-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm8350-i2c.c</a></div><div class='hunk'>@@ -15,47 +15,18 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/wm8350/core.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='del'>-static int wm8350_i2c_read_device(struct wm8350 *wm8350, char reg,</div><div class='del'>-				  int bytes, void *dest)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = i2c_master_send(wm8350-&gt;i2c_client, &amp;reg, 1);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-	ret = i2c_master_recv(wm8350-&gt;i2c_client, dest, bytes);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-	if (ret != bytes)</div><div class='del'>-		return -EIO;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm8350_i2c_write_device(struct wm8350 *wm8350, char reg,</div><div class='del'>-				   int bytes, void *src)</div><div class='del'>-{</div><div class='del'>-	/* we add 1 byte for device register */</div><div class='del'>-	u8 msg[(WM8350_MAX_REGISTER &lt;&lt; 1) + 1];</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (bytes &gt; ((WM8350_MAX_REGISTER &lt;&lt; 1) + 1))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	msg[0] = reg;</div><div class='del'>-	memcpy(&amp;msg[1], src, bytes);</div><div class='del'>-	ret = i2c_master_send(wm8350-&gt;i2c_client, msg, bytes + 1);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-	if (ret != bytes + 1)</div><div class='del'>-		return -EIO;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+static const struct regmap_config wm8350_regmap = {</div><div class='add'>+	.reg_bits = 8,</div><div class='add'>+	.val_bits = 16,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static int wm8350_i2c_probe(struct i2c_client *i2c,</div><div class='ctx'> 			    const struct i2c_device_id *id)</div><div class='hunk'>@@ -67,20 +38,18 @@ static int wm8350_i2c_probe(struct i2c_client *i2c,</div><div class='ctx'> 	if (wm8350 == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	wm8350-&gt;regmap = devm_regmap_init_i2c(i2c, &amp;wm8350_regmap);</div><div class='add'>+	if (IS_ERR(wm8350-&gt;regmap)) {</div><div class='add'>+		ret = PTR_ERR(wm8350-&gt;regmap);</div><div class='add'>+		dev_err(&amp;i2c-&gt;dev, "Failed to allocate register map: %d\n",</div><div class='add'>+			ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	i2c_set_clientdata(i2c, wm8350);</div><div class='ctx'> 	wm8350-&gt;dev = &amp;i2c-&gt;dev;</div><div class='del'>-	wm8350-&gt;i2c_client = i2c;</div><div class='del'>-	wm8350-&gt;read_dev = wm8350_i2c_read_device;</div><div class='del'>-	wm8350-&gt;write_dev = wm8350_i2c_write_device;</div><div class='del'>-</div><div class='del'>-	ret = wm8350_device_init(wm8350, i2c-&gt;irq, i2c-&gt;dev.platform_data);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='ctx'> </div><div class='del'>-err:</div><div class='del'>-	return ret;</div><div class='add'>+	return wm8350_device_init(wm8350, i2c-&gt;irq, i2c-&gt;dev.platform_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int wm8350_i2c_remove(struct i2c_client *i2c)</div><div class='head'>diff --git a/drivers/mfd/wm8400-core.c b/drivers/mfd/wm8400-core.c<br/>index 1189a17f0f25..4b7d378551d5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/wm8400-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/wm8400-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/wm8400-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm8400-core.c</a></div><div class='hunk'>@@ -23,136 +23,16 @@</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='del'>-static struct {</div><div class='del'>-	u16  readable;    /* Mask of readable bits */</div><div class='del'>-	u16  writable;    /* Mask of writable bits */</div><div class='del'>-	u16  vol;         /* Mask of volatile bits */</div><div class='del'>-	int  is_codec;    /* Register controlled by codec reset */</div><div class='del'>-	u16  default_val; /* Value on reset */</div><div class='del'>-} reg_data[] = {</div><div class='del'>-	{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */</div><div class='del'>-	{ 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */</div><div class='del'>-	{ 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */</div><div class='del'>-	{ 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */</div><div class='del'>-	{ 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4  */</div><div class='del'>-	{ 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5  */</div><div class='del'>-	{ 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6  */</div><div class='del'>-	{ 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7  */</div><div class='del'>-	{ 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8  */</div><div class='del'>-	{ 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9  */</div><div class='del'>-	{ 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */</div><div class='del'>-	{ 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */</div><div class='del'>-	{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */</div><div class='del'>-	{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */</div><div class='del'>-	{ 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */</div><div class='del'>-	{ 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */</div><div class='del'>-	{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */</div><div class='del'>-	{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */</div><div class='del'>-	{ 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */</div><div class='del'>-	{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */</div><div class='del'>-	{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */</div><div class='del'>-	{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */</div><div class='del'>-	{ 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */</div><div class='del'>-	{ 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */</div><div class='del'>-	{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */</div><div class='del'>-	{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */</div><div class='del'>-	{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */</div><div class='del'>-	{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */</div><div class='del'>-	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */</div><div class='del'>-	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */</div><div class='del'>-	{ 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */</div><div class='del'>-	{ 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */</div><div class='del'>-	{ 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */</div><div class='del'>-	{ 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */</div><div class='del'>-	{ 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */</div><div class='del'>-	{ 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */</div><div class='del'>-	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */</div><div class='del'>-	{ 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */</div><div class='del'>-	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */</div><div class='del'>-	{ 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */</div><div class='del'>-	{ 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */</div><div class='del'>-	{ 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */</div><div class='del'>-	{ 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */</div><div class='del'>-	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */</div><div class='del'>-	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */</div><div class='del'>-	{ 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */</div><div class='del'>-	{ 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */</div><div class='del'>-	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */</div><div class='del'>-	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */</div><div class='del'>-	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */</div><div class='del'>-	{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */</div><div class='del'>-	{ 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */</div><div class='del'>-	{ 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */</div><div class='del'>-	{ 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */</div><div class='del'>-	{ 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */</div><div class='del'>-	{ 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */</div><div class='del'>-	{ 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */</div><div class='del'>-	{ 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */</div><div class='del'>-	{ 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */</div><div class='del'>-	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */</div><div class='del'>-	{ 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */</div><div class='del'>-	{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */</div><div class='del'>-	{ 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */</div><div class='del'>-	{ 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */</div><div class='del'>-	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */</div><div class='del'>-	{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */</div><div class='del'>-	{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */</div><div class='del'>-	{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */</div><div class='del'>-	{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */</div><div class='del'>-	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */</div><div class='del'>-	{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */</div><div class='del'>-	{ 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */</div><div class='del'>-	{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */</div><div class='del'>-	{ 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */</div><div class='del'>-	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */</div><div class='del'>-	{ 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */</div><div class='del'>-	{ 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */</div><div class='del'>-	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */</div><div class='del'>-	{ 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */</div><div class='del'>-	{ 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */</div><div class='del'>-	{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */</div><div class='del'>-	{ 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */</div><div class='del'>-	{ 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */</div><div class='del'>-	{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */</div><div class='del'>-	{ 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest)</div><div class='add'>+static bool wm8400_volatile(struct device *dev, unsigned int reg)</div><div class='ctx'> {</div><div class='del'>-	int i, ret = 0;</div><div class='del'>-</div><div class='del'>-	BUG_ON(reg + num_regs &gt; ARRAY_SIZE(wm8400-&gt;reg_cache));</div><div class='del'>-</div><div class='del'>-	/* If there are any volatile reads then read back the entire block */</div><div class='del'>-	for (i = reg; i &lt; reg + num_regs; i++)</div><div class='del'>-		if (reg_data[i].vol) {</div><div class='del'>-			ret = regmap_bulk_read(wm8400-&gt;regmap, reg, dest,</div><div class='del'>-					       num_regs);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	/* Otherwise use the cache */</div><div class='del'>-	memcpy(dest, &amp;wm8400-&gt;reg_cache[reg], num_regs * sizeof(u16));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,</div><div class='del'>-			u16 *src)</div><div class='del'>-{</div><div class='del'>-	int ret, i;</div><div class='del'>-</div><div class='del'>-	BUG_ON(reg + num_regs &gt; ARRAY_SIZE(wm8400-&gt;reg_cache));</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; num_regs; i++) {</div><div class='del'>-		BUG_ON(!reg_data[reg + i].writable);</div><div class='del'>-		wm8400-&gt;reg_cache[reg + i] = src[i];</div><div class='del'>-		ret = regmap_write(wm8400-&gt;regmap, reg, src[i]);</div><div class='del'>-		if (ret != 0)</div><div class='del'>-			return ret;</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case WM8400_INTERRUPT_STATUS_1:</div><div class='add'>+	case WM8400_INTERRUPT_LEVELS:</div><div class='add'>+	case WM8400_SHUTDOWN_REASON:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -165,13 +45,12 @@ static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,</div><div class='ctx'>  */</div><div class='ctx'> u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg)</div><div class='ctx'> {</div><div class='del'>-	u16 val;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;wm8400-&gt;io_lock);</div><div class='del'>-</div><div class='del'>-	wm8400_read(wm8400, reg, 1, &amp;val);</div><div class='add'>+	unsigned int val;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;wm8400-&gt;io_lock);</div><div class='add'>+	ret = regmap_read(wm8400-&gt;regmap, reg, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='hunk'>@@ -179,63 +58,10 @@ EXPORT_SYMBOL_GPL(wm8400_reg_read);</div><div class='ctx'> </div><div class='ctx'> int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;wm8400-&gt;io_lock);</div><div class='del'>-</div><div class='del'>-	ret = wm8400_read(wm8400, reg, count, data);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;wm8400-&gt;io_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return regmap_bulk_read(wm8400-&gt;regmap, reg, data, count);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(wm8400_block_read);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * wm8400_set_bits - Bitmask write</div><div class='del'>- *</div><div class='del'>- * @wm8400: Pointer to wm8400 control structure</div><div class='del'>- * @reg:    Register to access</div><div class='del'>- * @mask:   Mask of bits to change</div><div class='del'>- * @val:    Value to set for masked bits</div><div class='del'>- */</div><div class='del'>-int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val)</div><div class='del'>-{</div><div class='del'>-	u16 tmp;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;wm8400-&gt;io_lock);</div><div class='del'>-</div><div class='del'>-	ret = wm8400_read(wm8400, reg, 1, &amp;tmp);</div><div class='del'>-	tmp = (tmp &amp; ~mask) | val;</div><div class='del'>-	if (ret == 0)</div><div class='del'>-		ret = wm8400_write(wm8400, reg, 1, &amp;tmp);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;wm8400-&gt;io_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(wm8400_set_bits);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * wm8400_reset_codec_reg_cache - Reset cached codec registers to</div><div class='del'>- * their default values.</div><div class='del'>- */</div><div class='del'>-void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;wm8400-&gt;io_lock);</div><div class='del'>-</div><div class='del'>-	/* Reset all codec registers to their initial value */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(wm8400-&gt;reg_cache); i++)</div><div class='del'>-		if (reg_data[i].is_codec)</div><div class='del'>-			wm8400-&gt;reg_cache[i] = reg_data[i].default_val;</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;wm8400-&gt;io_lock);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);</div><div class='del'>-</div><div class='ctx'> static int wm8400_register_codec(struct wm8400 *wm8400)</div><div class='ctx'> {</div><div class='ctx'> 	struct mfd_cell cell = {</div><div class='hunk'>@@ -257,44 +83,24 @@ static int wm8400_register_codec(struct wm8400 *wm8400)</div><div class='ctx'> static int wm8400_init(struct wm8400 *wm8400,</div><div class='ctx'> 		       struct wm8400_platform_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	u16 reg;</div><div class='del'>-	int ret, i;</div><div class='del'>-</div><div class='del'>-	mutex_init(&amp;wm8400-&gt;io_lock);</div><div class='add'>+	unsigned int reg;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	dev_set_drvdata(wm8400-&gt;dev, wm8400);</div><div class='ctx'> </div><div class='ctx'> 	/* Check that this is actually a WM8400 */</div><div class='del'>-	ret = regmap_read(wm8400-&gt;regmap, WM8400_RESET_ID, &amp;i);</div><div class='add'>+	ret = regmap_read(wm8400-&gt;regmap, WM8400_RESET_ID, &amp;reg);</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		dev_err(wm8400-&gt;dev, "Chip ID register read failed\n");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='del'>-	if (i != reg_data[WM8400_RESET_ID].default_val) {</div><div class='del'>-		dev_err(wm8400-&gt;dev, "Device is not a WM8400, ID is %x\n", i);</div><div class='add'>+	if (reg != 0x6172) {</div><div class='add'>+		dev_err(wm8400-&gt;dev, "Device is not a WM8400, ID is %x\n",</div><div class='add'>+			reg);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* We don't know what state the hardware is in and since this</div><div class='del'>-	 * is a PMIC we can't reset it safely so initialise the register</div><div class='del'>-	 * cache from the hardware.</div><div class='del'>-	 */</div><div class='del'>-	ret = regmap_raw_read(wm8400-&gt;regmap, 0, wm8400-&gt;reg_cache,</div><div class='del'>-			      ARRAY_SIZE(wm8400-&gt;reg_cache));</div><div class='del'>-	if (ret != 0) {</div><div class='del'>-		dev_err(wm8400-&gt;dev, "Register cache read failed\n");</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(wm8400-&gt;reg_cache); i++)</div><div class='del'>-		wm8400-&gt;reg_cache[i] = be16_to_cpu(wm8400-&gt;reg_cache[i]);</div><div class='del'>-</div><div class='del'>-	/* If the codec is in reset use hard coded values */</div><div class='del'>-	if (!(wm8400-&gt;reg_cache[WM8400_POWER_MANAGEMENT_1] &amp; WM8400_CODEC_ENA))</div><div class='del'>-		for (i = 0; i &lt; ARRAY_SIZE(wm8400-&gt;reg_cache); i++)</div><div class='del'>-			if (reg_data[i].is_codec)</div><div class='del'>-				wm8400-&gt;reg_cache[i] = reg_data[i].default_val;</div><div class='del'>-</div><div class='del'>-	ret = wm8400_read(wm8400, WM8400_ID, 1, &amp;reg);</div><div class='add'>+	ret = regmap_read(wm8400-&gt;regmap, WM8400_ID, &amp;reg);</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		dev_err(wm8400-&gt;dev, "ID register read failed: %d\n", ret);</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -334,8 +140,22 @@ static const struct regmap_config wm8400_regmap_config = {</div><div class='ctx'> 	.reg_bits = 8,</div><div class='ctx'> 	.val_bits = 16,</div><div class='ctx'> 	.max_register = WM8400_REGISTER_COUNT - 1,</div><div class='add'>+</div><div class='add'>+	.volatile_reg = wm8400_volatile,</div><div class='add'>+</div><div class='add'>+	.cache_type = REGCACHE_RBTREE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * wm8400_reset_codec_reg_cache - Reset cached codec registers to</div><div class='add'>+ * their default values.</div><div class='add'>+ */</div><div class='add'>+void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)</div><div class='add'>+{</div><div class='add'>+	regmap_reinit_cache(wm8400-&gt;regmap, &amp;wm8400_regmap_config);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);</div><div class='add'>+</div><div class='ctx'> #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)</div><div class='ctx'> static int wm8400_i2c_probe(struct i2c_client *i2c,</div><div class='ctx'> 			    const struct i2c_device_id *id)</div><div class='head'>diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c<br/>index 9d7ca1e978fa..1e321d349777 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/wm8994-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/wm8994-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/wm8994-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm8994-core.c</a></div><div class='hunk'>@@ -500,7 +500,8 @@ static __devinit int wm8994_device_init(struct wm8994 *wm8994, int irq)</div><div class='ctx'> 			ret);</div><div class='ctx'> 		goto err_enable;</div><div class='ctx'> 	}</div><div class='del'>-	wm8994-&gt;revision = ret;</div><div class='add'>+	wm8994-&gt;revision = ret &amp; WM8994_CHIP_REV_MASK;</div><div class='add'>+	wm8994-&gt;cust_id = (ret &amp; WM8994_CUST_ID_MASK) &gt;&gt; WM8994_CUST_ID_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	switch (wm8994-&gt;type) {</div><div class='ctx'> 	case WM8994:</div><div class='hunk'>@@ -553,8 +554,8 @@ static __devinit int wm8994_device_init(struct wm8994 *wm8994, int irq)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_info(wm8994-&gt;dev, "%s revision %c\n", devname,</div><div class='del'>-		 'A' + wm8994-&gt;revision);</div><div class='add'>+	dev_info(wm8994-&gt;dev, "%s revision %c CUST_ID %02x\n", devname,</div><div class='add'>+		 'A' + wm8994-&gt;revision, wm8994-&gt;cust_id);</div><div class='ctx'> </div><div class='ctx'> 	switch (wm8994-&gt;type) {</div><div class='ctx'> 	case WM1811:</div><div class='hunk'>@@ -732,23 +733,7 @@ static struct i2c_driver wm8994_i2c_driver = {</div><div class='ctx'> 	.id_table = wm8994_i2c_id,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init wm8994_i2c_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = i2c_add_driver(&amp;wm8994_i2c_driver);</div><div class='del'>-	if (ret != 0)</div><div class='del'>-		pr_err("Failed to register wm8994 I2C driver: %d\n", ret);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-module_init(wm8994_i2c_init);</div><div class='del'>-</div><div class='del'>-static void __exit wm8994_i2c_exit(void)</div><div class='del'>-{</div><div class='del'>-	i2c_del_driver(&amp;wm8994_i2c_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(wm8994_i2c_exit);</div><div class='add'>+module_i2c_driver(wm8994_i2c_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Core support for the WM8994 audio CODEC");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/mfd/wm8994-irq.c b/drivers/mfd/wm8994-irq.c<br/>index 46b20c445ecf..f1837f669755 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/wm8994-irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/wm8994-irq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/wm8994-irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm8994-irq.c</a></div><div class='hunk'>@@ -147,12 +147,6 @@ int wm8994_irq_init(struct wm8994 *wm8994)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!wm8994-&gt;irq_base) {</div><div class='del'>-		dev_err(wm8994-&gt;dev,</div><div class='del'>-			"No interrupt base specified, no interrupts\n");</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	ret = regmap_add_irq_chip(wm8994-&gt;regmap, wm8994-&gt;irq,</div><div class='ctx'> 				  IRQF_TRIGGER_HIGH | IRQF_ONESHOT,</div><div class='ctx'> 				  wm8994-&gt;irq_base, &amp;wm8994_irq_chip,</div><div class='head'>diff --git a/drivers/mfd/wm8994-regmap.c b/drivers/mfd/wm8994-regmap.c<br/>index bfd25af6ecb1..52e9e2944940 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mfd/wm8994-regmap.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mfd/wm8994-regmap.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mfd/wm8994-regmap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mfd/wm8994-regmap.c</a></div><div class='hunk'>@@ -1122,7 +1122,6 @@ static bool wm8994_volatile_register(struct device *dev, unsigned int reg)</div><div class='ctx'> 	case WM8994_RATE_STATUS:</div><div class='ctx'> 	case WM8958_MIC_DETECT_3:</div><div class='ctx'> 	case WM8994_DC_SERVO_4E:</div><div class='del'>-	case WM8994_CHIP_REVISION:</div><div class='ctx'> 	case WM8994_INTERRUPT_STATUS_1:</div><div class='ctx'> 	case WM8994_INTERRUPT_STATUS_2:</div><div class='ctx'> 		return true;</div><div class='head'>diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig<br/>index c7795096d43b..2661f6e366f9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/misc/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/misc/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/Kconfig</a></div><div class='hunk'>@@ -452,14 +452,32 @@ config ARM_CHARLCD</div><div class='ctx'> 	  still useful.</div><div class='ctx'> </div><div class='ctx'> config BMP085</div><div class='del'>-	tristate "BMP085 digital pressure sensor"</div><div class='add'>+	bool</div><div class='add'>+	depends on SYSFS</div><div class='add'>+</div><div class='add'>+config BMP085_I2C</div><div class='add'>+	tristate "BMP085 digital pressure sensor on I2C"</div><div class='add'>+	select BMP085</div><div class='add'>+	select REGMAP_I2C</div><div class='ctx'> 	depends on I2C &amp;&amp; SYSFS</div><div class='ctx'> 	help</div><div class='del'>-	  If you say yes here you get support for the Bosch Sensortec</div><div class='del'>-	  BMP085 digital pressure sensor.</div><div class='add'>+	  Say Y here if you want to support Bosch Sensortec's digital pressure</div><div class='add'>+	  sensor hooked to an I2C bus.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='del'>-	  module will be called bmp085.</div><div class='add'>+	  module will be called bmp085-i2c.</div><div class='add'>+</div><div class='add'>+config BMP085_SPI</div><div class='add'>+	tristate "BMP085 digital pressure sensor on SPI"</div><div class='add'>+	select BMP085</div><div class='add'>+	select REGMAP_SPI</div><div class='add'>+	depends on SPI_MASTER &amp;&amp; SYSFS</div><div class='add'>+	help</div><div class='add'>+	  Say Y here if you want to support Bosch Sensortec's digital pressure</div><div class='add'>+	  sensor hooked to an SPI bus.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called bmp085-spi.</div><div class='ctx'> </div><div class='ctx'> config PCH_PHUB</div><div class='ctx'> 	tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) PHUB"</div><div class='hunk'>@@ -490,14 +508,6 @@ config USB_SWITCH_FSA9480</div><div class='ctx'> 	  stereo and mono audio, video, microphone and UART data to use</div><div class='ctx'> 	  a common connector port.</div><div class='ctx'> </div><div class='del'>-config MAX8997_MUIC</div><div class='del'>-	tristate "MAX8997 MUIC Support"</div><div class='del'>-	depends on MFD_MAX8997</div><div class='del'>-	help</div><div class='del'>-	  If you say yes here you get support for the MUIC device of</div><div class='del'>-	  Maxim MAX8997 PMIC.</div><div class='del'>-	  The MAX8997 MUIC is a USB port accessory detector and switch.</div><div class='del'>-</div><div class='ctx'> source "drivers/misc/c2port/Kconfig"</div><div class='ctx'> source "drivers/misc/eeprom/Kconfig"</div><div class='ctx'> source "drivers/misc/cb710/Kconfig"</div><div class='hunk'>@@ -506,4 +516,5 @@ source "drivers/misc/ti-st/Kconfig"</div><div class='ctx'> source "drivers/misc/lis3lv02d/Kconfig"</div><div class='ctx'> source "drivers/misc/carma/Kconfig"</div><div class='ctx'> source "drivers/misc/altera-stapl/Kconfig"</div><div class='add'>+source "drivers/misc/mei/Kconfig"</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile<br/>index 3e1d80106f04..456972faaeb3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/misc/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/misc/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/Makefile</a></div><div class='hunk'>@@ -11,6 +11,8 @@ obj-$(CONFIG_ATMEL_PWM)		+= atmel_pwm.o</div><div class='ctx'> obj-$(CONFIG_ATMEL_SSC)		+= atmel-ssc.o</div><div class='ctx'> obj-$(CONFIG_ATMEL_TCLIB)	+= atmel_tclib.o</div><div class='ctx'> obj-$(CONFIG_BMP085)		+= bmp085.o</div><div class='add'>+obj-$(CONFIG_BMP085_I2C)	+= bmp085-i2c.o</div><div class='add'>+obj-$(CONFIG_BMP085_SPI)	+= bmp085-spi.o</div><div class='ctx'> obj-$(CONFIG_ICS932S401)	+= ics932s401.o</div><div class='ctx'> obj-$(CONFIG_LKDTM)		+= lkdtm.o</div><div class='ctx'> obj-$(CONFIG_TIFM_CORE)       	+= tifm_core.o</div><div class='hunk'>@@ -48,4 +50,4 @@ obj-y				+= lis3lv02d/</div><div class='ctx'> obj-y				+= carma/</div><div class='ctx'> obj-$(CONFIG_USB_SWITCH_FSA9480) += fsa9480.o</div><div class='ctx'> obj-$(CONFIG_ALTERA_STAPL)	+=altera-stapl/</div><div class='del'>-obj-$(CONFIG_MAX8997_MUIC)	+= max8997-muic.o</div><div class='add'>+obj-$(CONFIG_INTEL_MEI)		+= mei/</div><div class='head'>diff --git a/drivers/misc/ab8500-pwm.c b/drivers/misc/ab8500-pwm.c<br/>index d7a9aa14e5d5..042a8fe4efaa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/misc/ab8500-pwm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/misc/ab8500-pwm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/ab8500-pwm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/ab8500-pwm.c</a></div><div class='hunk'>@@ -142,10 +142,16 @@ static int __devexit ab8500_pwm_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct of_device_id ab8500_pwm_match[] = {</div><div class='add'>+	{ .compatible = "stericsson,ab8500-pwm", },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct platform_driver ab8500_pwm_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "ab8500-pwm",</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = ab8500_pwm_match,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = ab8500_pwm_probe,</div><div class='ctx'> 	.remove = __devexit_p(ab8500_pwm_remove),</div><div class='head'>diff --git a/drivers/misc/ad525x_dpot.c b/drivers/misc/ad525x_dpot.c<br/>index 1d1d42615915..6938f1be664d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/misc/ad525x_dpot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/misc/ad525x_dpot.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/ad525x_dpot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/ad525x_dpot.c</a></div><div class='hunk'>@@ -749,7 +749,7 @@ exit:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ad_dpot_probe);</div><div class='ctx'> </div><div class='del'>-__devexit int ad_dpot_remove(struct device *dev)</div><div class='add'>+int ad_dpot_remove(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dpot_data *data = dev_get_drvdata(dev);</div><div class='ctx'> 	int i;</div><div class='head'>diff --git a/drivers/misc/bh1780gli.c b/drivers/misc/bh1780gli.c<br/>index 54f6f39f990a..f1f9877f3fdf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/misc/bh1780gli.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/misc/bh1780gli.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/bh1780gli.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/bh1780gli.c</a></div><div class='hunk'>@@ -248,7 +248,7 @@ static const struct i2c_device_id bh1780_id[] = {</div><div class='ctx'> </div><div class='ctx'> static struct i2c_driver bh1780_driver = {</div><div class='ctx'> 	.probe		= bh1780_probe,</div><div class='del'>-	.remove		= bh1780_remove,</div><div class='add'>+	.remove		= __devexit_p(bh1780_remove),</div><div class='ctx'> 	.id_table	= bh1780_id,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "bh1780",</div><div class='head'>diff --git a/drivers/misc/bmp085-i2c.c b/drivers/misc/bmp085-i2c.c<br/>new file mode 100644<br/>index 000000000000..9943971c13e3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/misc/bmp085-i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/bmp085-i2c.c</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2012  Bosch Sensortec GmbH</div><div class='add'>+ * Copyright (c) 2012  Unixphere AB</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include "bmp085.h"</div><div class='add'>+</div><div class='add'>+#define BMP085_I2C_ADDRESS	0x77</div><div class='add'>+</div><div class='add'>+static const unsigned short normal_i2c[] = { BMP085_I2C_ADDRESS,</div><div class='add'>+							I2C_CLIENT_END };</div><div class='add'>+</div><div class='add'>+static int bmp085_i2c_detect(struct i2c_client *client,</div><div class='add'>+			     struct i2c_board_info *info)</div><div class='add'>+{</div><div class='add'>+	if (client-&gt;addr != BMP085_I2C_ADDRESS)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return bmp085_detect(&amp;client-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit bmp085_i2c_probe(struct i2c_client *client,</div><div class='add'>+				      const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	struct regmap *regmap = devm_regmap_init_i2c(client,</div><div class='add'>+						     &amp;bmp085_regmap_config);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(regmap)) {</div><div class='add'>+		err = PTR_ERR(regmap);</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Failed to init regmap: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return bmp085_probe(&amp;client-&gt;dev, regmap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bmp085_i2c_remove(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	return bmp085_remove(&amp;client-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id bmp085_of_match[] = {</div><div class='add'>+	{ .compatible = "bosch,bmp085", },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, bmp085_of_match);</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id bmp085_id[] = {</div><div class='add'>+	{ BMP085_NAME, 0 },</div><div class='add'>+	{ "bmp180", 0 },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, bmp085_id);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver bmp085_i2c_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+		.name	= BMP085_NAME,</div><div class='add'>+		.of_match_table = bmp085_of_match</div><div class='add'>+	},</div><div class='add'>+	.id_table	= bmp085_id,</div><div class='add'>+	.probe		= bmp085_i2c_probe,</div><div class='add'>+	.remove		= __devexit_p(bmp085_i2c_remove),</div><div class='add'>+</div><div class='add'>+	.detect		= bmp085_i2c_detect,</div><div class='add'>+	.address_list	= normal_i2c</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_i2c_driver(bmp085_i2c_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Eric Andersson &lt;eric.andersson@unixphere.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("BMP085 I2C bus driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/misc/bmp085-spi.c b/drivers/misc/bmp085-spi.c<br/>new file mode 100644<br/>index 000000000000..78aaff9b5231<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/misc/bmp085-spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/bmp085-spi.c</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2012  Bosch Sensortec GmbH</div><div class='add'>+ * Copyright (c) 2012  Unixphere AB</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include "bmp085.h"</div><div class='add'>+</div><div class='add'>+static int __devinit bmp085_spi_probe(struct spi_device *client)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+</div><div class='add'>+	client-&gt;bits_per_word = 8;</div><div class='add'>+	err = spi_setup(client);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "spi_setup failed!\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap = devm_regmap_init_spi(client, &amp;bmp085_regmap_config);</div><div class='add'>+	if (IS_ERR(regmap)) {</div><div class='add'>+		err = PTR_ERR(regmap);</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Failed to init regmap: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return bmp085_probe(&amp;client-&gt;dev, regmap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bmp085_spi_remove(struct spi_device *client)</div><div class='add'>+{</div><div class='add'>+	return bmp085_remove(&amp;client-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id bmp085_of_match[] = {</div><div class='add'>+	{ .compatible = "bosch,bmp085", },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, bmp085_of_match);</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id bmp085_id[] = {</div><div class='add'>+	{ "bmp180", 0 },</div><div class='add'>+	{ "bmp181", 0 },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(spi, bmp085_id);</div><div class='add'>+</div><div class='add'>+static struct spi_driver bmp085_spi_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+		.name	= BMP085_NAME,</div><div class='add'>+		.of_match_table = bmp085_of_match</div><div class='add'>+	},</div><div class='add'>+	.id_table	= bmp085_id,</div><div class='add'>+	.probe		= bmp085_spi_probe,</div><div class='add'>+	.remove		= __devexit_p(bmp085_spi_remove)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init bmp085_spi_init(void)</div><div class='add'>+{</div><div class='add'>+	return spi_register_driver(&amp;bmp085_spi_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit bmp085_spi_exit(void)</div><div class='add'>+{</div><div class='add'>+	spi_unregister_driver(&amp;bmp085_spi_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Eric Andersson &lt;eric.andersson@unixphere.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("BMP085 SPI bus driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+module_init(bmp085_spi_init);</div><div class='add'>+module_exit(bmp085_spi_exit);</div><div class='head'>diff --git a/drivers/misc/bmp085.c b/drivers/misc/bmp085.c<br/>index 76c3064629f1..62e418293b7e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/misc/bmp085.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/misc/bmp085.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/bmp085.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/bmp085.c</a></div><div class='hunk'>@@ -1,62 +1,62 @@</div><div class='ctx'> /*  Copyright (c) 2010  Christoph Mair &lt;christoph.mair@gmail.com&gt;</div><div class='del'>-</div><div class='del'>-    This driver supports the bmp085 digital barometric pressure</div><div class='del'>-    and temperature sensor from Bosch Sensortec. The datasheet</div><div class='del'>-    is available from their website:</div><div class='del'>-    http://www.bosch-sensortec.com/content/language1/downloads/BST-BMP085-DS000-05.pdf</div><div class='del'>-</div><div class='del'>-    A pressure measurement is issued by reading from pressure0_input.</div><div class='del'>-    The return value ranges from 30000 to 110000 pascal with a resulution</div><div class='del'>-    of 1 pascal (0.01 millibar) which enables measurements from 9000m above</div><div class='del'>-    to 500m below sea level.</div><div class='del'>-</div><div class='del'>-    The temperature can be read from temp0_input. Values range from</div><div class='del'>-    -400 to 850 representing the ambient temperature in degree celsius</div><div class='del'>-    multiplied by 10.The resolution is 0.1 celsius.</div><div class='del'>-</div><div class='del'>-    Because ambient pressure is temperature dependent, a temperature</div><div class='del'>-    measurement will be executed automatically even if the user is reading</div><div class='del'>-    from pressure0_input. This happens if the last temperature measurement</div><div class='del'>-    has been executed more then one second ago.</div><div class='del'>-</div><div class='del'>-    To decrease RMS noise from pressure measurements, the bmp085 can</div><div class='del'>-    autonomously calculate the average of up to eight samples. This is</div><div class='del'>-    set up by writing to the oversampling sysfs file. Accepted values</div><div class='del'>-    are 0, 1, 2 and 3. 2^x when x is the value written to this file</div><div class='del'>-    specifies the number of samples used to calculate the ambient pressure.</div><div class='del'>-    RMS noise is specified with six pascal (without averaging) and decreases</div><div class='del'>-    down to 3 pascal when using an oversampling setting of 3.</div><div class='del'>-</div><div class='del'>-    This program is free software; you can redistribute it and/or modify</div><div class='del'>-    it under the terms of the GNU General Public License as published by</div><div class='del'>-    the Free Software Foundation; either version 2 of the License, or</div><div class='del'>-    (at your option) any later version.</div><div class='del'>-</div><div class='del'>-    This program is distributed in the hope that it will be useful,</div><div class='del'>-    but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>-    GNU General Public License for more details.</div><div class='del'>-</div><div class='del'>-    You should have received a copy of the GNU General Public License</div><div class='del'>-    along with this program; if not, write to the Free Software</div><div class='del'>-    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>-*/</div><div class='del'>-</div><div class='add'>+ *  Copyright (c) 2012  Bosch Sensortec GmbH</div><div class='add'>+ *  Copyright (c) 2012  Unixphere AB</div><div class='add'>+ *</div><div class='add'>+ *  This driver supports the bmp085 and bmp18x digital barometric pressure</div><div class='add'>+ *  and temperature sensors from Bosch Sensortec. The datasheets</div><div class='add'>+ *  are available from their website:</div><div class='add'>+ *  http://www.bosch-sensortec.com/content/language1/downloads/BST-BMP085-DS000-05.pdf</div><div class='add'>+ *  http://www.bosch-sensortec.com/content/language1/downloads/BST-BMP180-DS000-07.pdf</div><div class='add'>+ *</div><div class='add'>+ *  A pressure measurement is issued by reading from pressure0_input.</div><div class='add'>+ *  The return value ranges from 30000 to 110000 pascal with a resulution</div><div class='add'>+ *  of 1 pascal (0.01 millibar) which enables measurements from 9000m above</div><div class='add'>+ *  to 500m below sea level.</div><div class='add'>+ *</div><div class='add'>+ *  The temperature can be read from temp0_input. Values range from</div><div class='add'>+ *  -400 to 850 representing the ambient temperature in degree celsius</div><div class='add'>+ *  multiplied by 10.The resolution is 0.1 celsius.</div><div class='add'>+ *</div><div class='add'>+ *  Because ambient pressure is temperature dependent, a temperature</div><div class='add'>+ *  measurement will be executed automatically even if the user is reading</div><div class='add'>+ *  from pressure0_input. This happens if the last temperature measurement</div><div class='add'>+ *  has been executed more then one second ago.</div><div class='add'>+ *</div><div class='add'>+ *  To decrease RMS noise from pressure measurements, the bmp085 can</div><div class='add'>+ *  autonomously calculate the average of up to eight samples. This is</div><div class='add'>+ *  set up by writing to the oversampling sysfs file. Accepted values</div><div class='add'>+ *  are 0, 1, 2 and 3. 2^x when x is the value written to this file</div><div class='add'>+ *  specifies the number of samples used to calculate the ambient pressure.</div><div class='add'>+ *  RMS noise is specified with six pascal (without averaging) and decreases</div><div class='add'>+ *  down to 3 pascal when using an oversampling setting of 3.</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *  it under the terms of the GNU General Public License as published by</div><div class='add'>+ *  the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ *  (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *  This program is distributed in the hope that it will be useful,</div><div class='add'>+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ *  GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ *  You should have received a copy of the GNU General Public License</div><div class='add'>+ *  along with this program; if not, write to the Free Software</div><div class='add'>+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include "bmp085.h"</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-#define BMP085_I2C_ADDRESS		0x77</div><div class='ctx'> #define BMP085_CHIP_ID			0x55</div><div class='del'>-</div><div class='ctx'> #define BMP085_CALIBRATION_DATA_START	0xAA</div><div class='ctx'> #define BMP085_CALIBRATION_DATA_LENGTH	11	/* 16 bit values */</div><div class='ctx'> #define BMP085_CHIP_ID_REG		0xD0</div><div class='del'>-#define BMP085_VERSION_REG		0xD1</div><div class='ctx'> #define BMP085_CTRL_REG			0xF4</div><div class='ctx'> #define BMP085_TEMP_MEASUREMENT		0x2E</div><div class='ctx'> #define BMP085_PRESSURE_MEASUREMENT	0x34</div><div class='hunk'>@@ -65,12 +65,6 @@</div><div class='ctx'> #define BMP085_CONVERSION_REGISTER_XLSB	0xF8</div><div class='ctx'> #define BMP085_TEMP_CONVERSION_TIME	5</div><div class='ctx'> </div><div class='del'>-#define BMP085_CLIENT_NAME		"bmp085"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static const unsigned short normal_i2c[] = { BMP085_I2C_ADDRESS,</div><div class='del'>-							I2C_CLIENT_END };</div><div class='del'>-</div><div class='ctx'> struct bmp085_calibration_data {</div><div class='ctx'> 	s16 AC1, AC2, AC3;</div><div class='ctx'> 	u16 AC4, AC5, AC6;</div><div class='hunk'>@@ -78,35 +72,30 @@ struct bmp085_calibration_data {</div><div class='ctx'> 	s16 MB, MC, MD;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* Each client has this additional data */</div><div class='ctx'> struct bmp085_data {</div><div class='del'>-	struct i2c_client *client;</div><div class='del'>-	struct mutex lock;</div><div class='del'>-	struct bmp085_calibration_data calibration;</div><div class='del'>-	u32 raw_temperature;</div><div class='del'>-	u32 raw_pressure;</div><div class='del'>-	unsigned char oversampling_setting;</div><div class='add'>+	struct	device *dev;</div><div class='add'>+	struct  regmap *regmap;</div><div class='add'>+	struct	mutex lock;</div><div class='add'>+	struct	bmp085_calibration_data calibration;</div><div class='add'>+	u8	oversampling_setting;</div><div class='add'>+	u32	raw_temperature;</div><div class='add'>+	u32	raw_pressure;</div><div class='add'>+	u32	temp_measurement_period;</div><div class='ctx'> 	unsigned long last_temp_measurement;</div><div class='del'>-	s32 b6; /* calculated temperature correction coefficient */</div><div class='add'>+	u8	chip_id;</div><div class='add'>+	s32	b6; /* calculated temperature correction coefficient */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static s32 bmp085_read_calibration_data(struct i2c_client *client)</div><div class='add'>+static s32 bmp085_read_calibration_data(struct bmp085_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	u16 tmp[BMP085_CALIBRATION_DATA_LENGTH];</div><div class='del'>-	struct bmp085_data *data = i2c_get_clientdata(client);</div><div class='ctx'> 	struct bmp085_calibration_data *cali = &amp;(data-&gt;calibration);</div><div class='del'>-	s32 status = i2c_smbus_read_i2c_block_data(client,</div><div class='del'>-				BMP085_CALIBRATION_DATA_START,</div><div class='del'>-				BMP085_CALIBRATION_DATA_LENGTH*sizeof(u16),</div><div class='del'>-				(u8 *)tmp);</div><div class='add'>+	s32 status = regmap_bulk_read(data-&gt;regmap,</div><div class='add'>+				BMP085_CALIBRATION_DATA_START, (u8 *)tmp,</div><div class='add'>+				(BMP085_CALIBRATION_DATA_LENGTH &lt;&lt; 1));</div><div class='ctx'> 	if (status &lt; 0)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	if (status != BMP085_CALIBRATION_DATA_LENGTH*sizeof(u16))</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='ctx'> 	cali-&gt;AC1 =  be16_to_cpu(tmp[0]);</div><div class='ctx'> 	cali-&gt;AC2 =  be16_to_cpu(tmp[1]);</div><div class='ctx'> 	cali-&gt;AC3 =  be16_to_cpu(tmp[2]);</div><div class='hunk'>@@ -121,30 +110,26 @@ static s32 bmp085_read_calibration_data(struct i2c_client *client)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static s32 bmp085_update_raw_temperature(struct bmp085_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	u16 tmp;</div><div class='ctx'> 	s32 status;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;data-&gt;lock);</div><div class='del'>-	status = i2c_smbus_write_byte_data(data-&gt;client, BMP085_CTRL_REG,</div><div class='del'>-						BMP085_TEMP_MEASUREMENT);</div><div class='del'>-	if (status != 0) {</div><div class='del'>-		dev_err(&amp;data-&gt;client-&gt;dev,</div><div class='add'>+	status = regmap_write(data-&gt;regmap, BMP085_CTRL_REG,</div><div class='add'>+			      BMP085_TEMP_MEASUREMENT);</div><div class='add'>+	if (status &lt; 0) {</div><div class='add'>+		dev_err(data-&gt;dev,</div><div class='ctx'> 			"Error while requesting temperature measurement.\n");</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> 	msleep(BMP085_TEMP_CONVERSION_TIME);</div><div class='ctx'> </div><div class='del'>-	status = i2c_smbus_read_i2c_block_data(data-&gt;client,</div><div class='del'>-		BMP085_CONVERSION_REGISTER_MSB, sizeof(tmp), (u8 *)&amp;tmp);</div><div class='del'>-	if (status &lt; 0)</div><div class='del'>-		goto exit;</div><div class='del'>-	if (status != sizeof(tmp)) {</div><div class='del'>-		dev_err(&amp;data-&gt;client-&gt;dev,</div><div class='add'>+	status = regmap_bulk_read(data-&gt;regmap, BMP085_CONVERSION_REGISTER_MSB,</div><div class='add'>+				 &amp;tmp, sizeof(tmp));</div><div class='add'>+	if (status &lt; 0) {</div><div class='add'>+		dev_err(data-&gt;dev,</div><div class='ctx'> 			"Error while reading temperature measurement result\n");</div><div class='del'>-		status = -EIO;</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> 	data-&gt;raw_temperature = be16_to_cpu(tmp);</div><div class='hunk'>@@ -162,10 +147,11 @@ static s32 bmp085_update_raw_pressure(struct bmp085_data *data)</div><div class='ctx'> 	s32 status;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;data-&gt;lock);</div><div class='del'>-	status = i2c_smbus_write_byte_data(data-&gt;client, BMP085_CTRL_REG,</div><div class='del'>-		BMP085_PRESSURE_MEASUREMENT + (data-&gt;oversampling_setting&lt;&lt;6));</div><div class='del'>-	if (status != 0) {</div><div class='del'>-		dev_err(&amp;data-&gt;client-&gt;dev,</div><div class='add'>+	status = regmap_write(data-&gt;regmap, BMP085_CTRL_REG,</div><div class='add'>+			BMP085_PRESSURE_MEASUREMENT +</div><div class='add'>+			(data-&gt;oversampling_setting &lt;&lt; 6));</div><div class='add'>+	if (status &lt; 0) {</div><div class='add'>+		dev_err(data-&gt;dev,</div><div class='ctx'> 			"Error while requesting pressure measurement.\n");</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -174,14 +160,11 @@ static s32 bmp085_update_raw_pressure(struct bmp085_data *data)</div><div class='ctx'> 	msleep(2+(3 &lt;&lt; data-&gt;oversampling_setting));</div><div class='ctx'> </div><div class='ctx'> 	/* copy data into a u32 (4 bytes), but skip the first byte. */</div><div class='del'>-	status = i2c_smbus_read_i2c_block_data(data-&gt;client,</div><div class='del'>-			BMP085_CONVERSION_REGISTER_MSB, 3, ((u8 *)&amp;tmp)+1);</div><div class='del'>-	if (status &lt; 0)</div><div class='del'>-		goto exit;</div><div class='del'>-	if (status != 3) {</div><div class='del'>-		dev_err(&amp;data-&gt;client-&gt;dev,</div><div class='add'>+	status = regmap_bulk_read(data-&gt;regmap, BMP085_CONVERSION_REGISTER_MSB,</div><div class='add'>+				 ((u8 *)&amp;tmp)+1, 3);</div><div class='add'>+	if (status &lt; 0) {</div><div class='add'>+		dev_err(data-&gt;dev,</div><div class='ctx'> 			"Error while reading pressure measurement results\n");</div><div class='del'>-		status = -EIO;</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> 	data-&gt;raw_pressure = be32_to_cpu((tmp));</div><div class='hunk'>@@ -193,7 +176,6 @@ exit:</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This function starts the temperature measurement and returns the value</div><div class='ctx'>  * in tenth of a degree celsius.</div><div class='hunk'>@@ -205,7 +187,7 @@ static s32 bmp085_get_temperature(struct bmp085_data *data, int *temperature)</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	status = bmp085_update_raw_temperature(data);</div><div class='del'>-	if (status != 0)</div><div class='add'>+	if (status &lt; 0)</div><div class='ctx'> 		goto exit;</div><div class='ctx'> </div><div class='ctx'> 	x1 = ((data-&gt;raw_temperature - cali-&gt;AC6) * cali-&gt;AC5) &gt;&gt; 15;</div><div class='hunk'>@@ -222,8 +204,10 @@ exit:</div><div class='ctx'> /*</div><div class='ctx'>  * This function starts the pressure measurement and returns the value</div><div class='ctx'>  * in millibar. Since the pressure depends on the ambient temperature,</div><div class='del'>- * a temperature measurement is executed if the last known value is older</div><div class='del'>- * than one second.</div><div class='add'>+ * a temperature measurement is executed according to the given temperature</div><div class='add'>+ * measurement period (default is 1 sec boundary). This period could vary</div><div class='add'>+ * and needs to be adjusted according to the sensor environment, i.e. if big</div><div class='add'>+ * temperature variations then the temperature needs to be read out often.</div><div class='ctx'>  */</div><div class='ctx'> static s32 bmp085_get_pressure(struct bmp085_data *data, int *pressure)</div><div class='ctx'> {</div><div class='hunk'>@@ -234,16 +218,16 @@ static s32 bmp085_get_pressure(struct bmp085_data *data, int *pressure)</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	/* alt least every second force an update of the ambient temperature */</div><div class='del'>-	if (data-&gt;last_temp_measurement == 0 ||</div><div class='del'>-			time_is_before_jiffies(data-&gt;last_temp_measurement + 1*HZ)) {</div><div class='add'>+	if ((data-&gt;last_temp_measurement == 0) ||</div><div class='add'>+	    time_is_before_jiffies(data-&gt;last_temp_measurement + 1*HZ)) {</div><div class='ctx'> 		status = bmp085_get_temperature(data, NULL);</div><div class='del'>-		if (status != 0)</div><div class='del'>-			goto exit;</div><div class='add'>+		if (status &lt; 0)</div><div class='add'>+			return status;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	status = bmp085_update_raw_pressure(data);</div><div class='del'>-	if (status != 0)</div><div class='del'>-		goto exit;</div><div class='add'>+	if (status &lt; 0)</div><div class='add'>+		return status;</div><div class='ctx'> </div><div class='ctx'> 	x1 = (data-&gt;b6 * data-&gt;b6) &gt;&gt; 12;</div><div class='ctx'> 	x1 *= cali-&gt;B2;</div><div class='hunk'>@@ -274,15 +258,14 @@ static s32 bmp085_get_pressure(struct bmp085_data *data, int *pressure)</div><div class='ctx'> </div><div class='ctx'> 	*pressure = p;</div><div class='ctx'> </div><div class='del'>-exit:</div><div class='del'>-	return status;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This function sets the chip-internal oversampling. Valid values are 0..3.</div><div class='ctx'>  * The chip will use 2^oversampling samples for internal averaging.</div><div class='ctx'>  * This influences the measurement time and the accuracy; larger values</div><div class='del'>- * increase both. The datasheet gives on overview on how measurement time,</div><div class='add'>+ * increase both. The datasheet gives an overview on how measurement time,</div><div class='ctx'>  * accuracy and noise correlate.</div><div class='ctx'>  */</div><div class='ctx'> static void bmp085_set_oversampling(struct bmp085_data *data,</div><div class='hunk'>@@ -306,22 +289,25 @@ static ssize_t set_oversampling(struct device *dev,</div><div class='ctx'> 				struct device_attribute *attr,</div><div class='ctx'> 				const char *buf, size_t count)</div><div class='ctx'> {</div><div class='del'>-	struct i2c_client *client = to_i2c_client(dev);</div><div class='del'>-	struct bmp085_data *data = i2c_get_clientdata(client);</div><div class='add'>+	struct bmp085_data *data = dev_get_drvdata(dev);</div><div class='ctx'> 	unsigned long oversampling;</div><div class='del'>-	int success = strict_strtoul(buf, 10, &amp;oversampling);</div><div class='del'>-	if (success == 0) {</div><div class='add'>+	int err = kstrtoul(buf, 10, &amp;oversampling);</div><div class='add'>+</div><div class='add'>+	if (err == 0) {</div><div class='add'>+		mutex_lock(&amp;data-&gt;lock);</div><div class='ctx'> 		bmp085_set_oversampling(data, oversampling);</div><div class='add'>+		mutex_unlock(&amp;data-&gt;lock);</div><div class='ctx'> 		return count;</div><div class='ctx'> 	}</div><div class='del'>-	return success;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t show_oversampling(struct device *dev,</div><div class='ctx'> 				 struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct i2c_client *client = to_i2c_client(dev);</div><div class='del'>-	struct bmp085_data *data = i2c_get_clientdata(client);</div><div class='add'>+	struct bmp085_data *data = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='ctx'> 	return sprintf(buf, "%u\n", bmp085_get_oversampling(data));</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR(oversampling, S_IWUSR | S_IRUGO,</div><div class='hunk'>@@ -333,11 +319,10 @@ static ssize_t show_temperature(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	int temperature;</div><div class='ctx'> 	int status;</div><div class='del'>-	struct i2c_client *client = to_i2c_client(dev);</div><div class='del'>-	struct bmp085_data *data = i2c_get_clientdata(client);</div><div class='add'>+	struct bmp085_data *data = dev_get_drvdata(dev);</div><div class='ctx'> </div><div class='ctx'> 	status = bmp085_get_temperature(data, &amp;temperature);</div><div class='del'>-	if (status != 0)</div><div class='add'>+	if (status &lt; 0)</div><div class='ctx'> 		return status;</div><div class='ctx'> 	else</div><div class='ctx'> 		return sprintf(buf, "%d\n", temperature);</div><div class='hunk'>@@ -350,11 +335,10 @@ static ssize_t show_pressure(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	int pressure;</div><div class='ctx'> 	int status;</div><div class='del'>-	struct i2c_client *client = to_i2c_client(dev);</div><div class='del'>-	struct bmp085_data *data = i2c_get_clientdata(client);</div><div class='add'>+	struct bmp085_data *data = dev_get_drvdata(dev);</div><div class='ctx'> </div><div class='ctx'> 	status = bmp085_get_pressure(data, &amp;pressure);</div><div class='del'>-	if (status != 0)</div><div class='add'>+	if (status &lt; 0)</div><div class='ctx'> 		return status;</div><div class='ctx'> 	else</div><div class='ctx'> 		return sprintf(buf, "%d\n", pressure);</div><div class='hunk'>@@ -373,38 +357,70 @@ static const struct attribute_group bmp085_attr_group = {</div><div class='ctx'> 	.attrs = bmp085_attributes,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int bmp085_detect(struct i2c_client *client, struct i2c_board_info *info)</div><div class='add'>+int bmp085_detect(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	if (client-&gt;addr != BMP085_I2C_ADDRESS)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	struct bmp085_data *data = dev_get_drvdata(dev);</div><div class='add'>+	unsigned int id;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (i2c_smbus_read_byte_data(client, BMP085_CHIP_ID_REG) != BMP085_CHIP_ID)</div><div class='add'>+	ret = regmap_read(data-&gt;regmap, BMP085_CHIP_ID_REG, &amp;id);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (id != data-&gt;chip_id)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(bmp085_detect);</div><div class='ctx'> </div><div class='del'>-static int bmp085_init_client(struct i2c_client *client)</div><div class='add'>+static void __init bmp085_get_of_properties(struct bmp085_data *data)</div><div class='ctx'> {</div><div class='del'>-	unsigned char version;</div><div class='del'>-	int status;</div><div class='del'>-	struct bmp085_data *data = i2c_get_clientdata(client);</div><div class='del'>-	data-&gt;client = client;</div><div class='del'>-	status = bmp085_read_calibration_data(client);</div><div class='del'>-	if (status != 0)</div><div class='del'>-		goto exit;</div><div class='del'>-	version = i2c_smbus_read_byte_data(client, BMP085_VERSION_REG);</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+	struct device_node *np = data-&gt;dev-&gt;of_node;</div><div class='add'>+	u32 prop;</div><div class='add'>+</div><div class='add'>+	if (!np)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!of_property_read_u32(np, "chip-id", &amp;prop))</div><div class='add'>+		data-&gt;chip_id = prop &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	if (!of_property_read_u32(np, "temp-measurement-period", &amp;prop))</div><div class='add'>+		data-&gt;temp_measurement_period = (prop/100)*HZ;</div><div class='add'>+</div><div class='add'>+	if (!of_property_read_u32(np, "default-oversampling", &amp;prop))</div><div class='add'>+		data-&gt;oversampling_setting = prop &amp; 0xff;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bmp085_init_client(struct bmp085_data *data)</div><div class='add'>+{</div><div class='add'>+	int status = bmp085_read_calibration_data(data);</div><div class='add'>+</div><div class='add'>+	if (status &lt; 0)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='add'>+	/* default settings */</div><div class='add'>+	data-&gt;chip_id = BMP085_CHIP_ID;</div><div class='ctx'> 	data-&gt;last_temp_measurement = 0;</div><div class='add'>+	data-&gt;temp_measurement_period = 1*HZ;</div><div class='ctx'> 	data-&gt;oversampling_setting = 3;</div><div class='add'>+</div><div class='add'>+	bmp085_get_of_properties(data);</div><div class='add'>+</div><div class='ctx'> 	mutex_init(&amp;data-&gt;lock);</div><div class='del'>-	dev_info(&amp;data-&gt;client-&gt;dev, "BMP085 ver. %d.%d found.\n",</div><div class='del'>-			(version &amp; 0x0F), (version &amp; 0xF0) &gt;&gt; 4);</div><div class='del'>-exit:</div><div class='del'>-	return status;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __devinit bmp085_probe(struct i2c_client *client,</div><div class='del'>-			 const struct i2c_device_id *id)</div><div class='add'>+struct regmap_config bmp085_regmap_config = {</div><div class='add'>+	.reg_bits = 8,</div><div class='add'>+	.val_bits = 8</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL_GPL(bmp085_regmap_config);</div><div class='add'>+</div><div class='add'>+__devinit int bmp085_probe(struct device *dev, struct regmap *regmap)</div><div class='ctx'> {</div><div class='ctx'> 	struct bmp085_data *data;</div><div class='ctx'> 	int err = 0;</div><div class='hunk'>@@ -415,58 +431,48 @@ static int __devinit bmp085_probe(struct i2c_client *client,</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* default settings after POR */</div><div class='del'>-	data-&gt;oversampling_setting = 0x00;</div><div class='del'>-</div><div class='del'>-	i2c_set_clientdata(client, data);</div><div class='add'>+	dev_set_drvdata(dev, data);</div><div class='add'>+	data-&gt;dev = dev;</div><div class='add'>+	data-&gt;regmap = regmap;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize the BMP085 chip */</div><div class='del'>-	err = bmp085_init_client(client);</div><div class='del'>-	if (err != 0)</div><div class='add'>+	err = bmp085_init_client(data);</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		goto exit_free;</div><div class='ctx'> </div><div class='add'>+	err = bmp085_detect(dev);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err(dev, "%s: chip_id failed!\n", BMP085_NAME);</div><div class='add'>+		goto exit_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Register sysfs hooks */</div><div class='del'>-	err = sysfs_create_group(&amp;client-&gt;dev.kobj, &amp;bmp085_attr_group);</div><div class='add'>+	err = sysfs_create_group(&amp;dev-&gt;kobj, &amp;bmp085_attr_group);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto exit_free;</div><div class='ctx'> </div><div class='del'>-	dev_info(&amp;data-&gt;client-&gt;dev, "Successfully initialized bmp085!\n");</div><div class='del'>-	goto exit;</div><div class='add'>+	dev_info(dev, "Successfully initialized %s!\n", BMP085_NAME);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> exit_free:</div><div class='ctx'> 	kfree(data);</div><div class='ctx'> exit:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(bmp085_probe);</div><div class='ctx'> </div><div class='del'>-static int __devexit bmp085_remove(struct i2c_client *client)</div><div class='add'>+int bmp085_remove(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	sysfs_remove_group(&amp;client-&gt;dev.kobj, &amp;bmp085_attr_group);</div><div class='del'>-	kfree(i2c_get_clientdata(client));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	struct bmp085_data *data = dev_get_drvdata(dev);</div><div class='ctx'> </div><div class='del'>-static const struct i2c_device_id bmp085_id[] = {</div><div class='del'>-	{ "bmp085", 0 },</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(i2c, bmp085_id);</div><div class='del'>-</div><div class='del'>-static struct i2c_driver bmp085_driver = {</div><div class='del'>-	.driver = {</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='del'>-		.name	= "bmp085"</div><div class='del'>-	},</div><div class='del'>-	.id_table	= bmp085_id,</div><div class='del'>-	.probe		= bmp085_probe,</div><div class='del'>-	.remove		= __devexit_p(bmp085_remove),</div><div class='del'>-</div><div class='del'>-	.detect		= bmp085_detect,</div><div class='del'>-	.address_list	= normal_i2c</div><div class='del'>-};</div><div class='add'>+	sysfs_remove_group(&amp;data-&gt;dev-&gt;kobj, &amp;bmp085_attr_group);</div><div class='add'>+	kfree(data);</div><div class='ctx'> </div><div class='del'>-module_i2c_driver(bmp085_driver);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(bmp085_remove);</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Christoph Mair &lt;christoph.mair@gmail.com");</div><div class='add'>+MODULE_AUTHOR("Christoph Mair &lt;christoph.mair@gmail.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("BMP085 driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/misc/bmp085.h b/drivers/misc/bmp085.h<br/>new file mode 100644<br/>index 000000000000..2b8f615bca92<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/misc/bmp085.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/bmp085.h</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2012  Bosch Sensortec GmbH</div><div class='add'>+ * Copyright (c) 2012  Unixphere AB</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _BMP085_H</div><div class='add'>+#define _BMP085_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+</div><div class='add'>+#define BMP085_NAME		"bmp085"</div><div class='add'>+</div><div class='add'>+extern struct regmap_config bmp085_regmap_config;</div><div class='add'>+</div><div class='add'>+int bmp085_probe(struct device *dev, struct regmap *regmap);</div><div class='add'>+int bmp085_remove(struct device *dev);</div><div class='add'>+int bmp085_detect(struct device *dev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/misc/c2port/Kconfig b/drivers/misc/c2port/Kconfig<br/>index e46af9a5810d..33ee834e1b83 100644<br/>--- a/<a href='/drm-misc/tree/drivers/misc/c2port/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/misc/c2port/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/c2port/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/c2port/Kconfig</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> menuconfig C2PORT</div><div class='ctx'> 	tristate "Silicon Labs C2 port support (EXPERIMENTAL)"</div><div class='ctx'> 	depends on EXPERIMENTAL</div><div class='del'>-	default no</div><div class='add'>+	default n</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables support for Silicon Labs C2 port used to</div><div class='ctx'> 	  program Silicon micro controller chips (and other 8051 compatible).</div><div class='hunk'>@@ -23,8 +23,8 @@ if C2PORT</div><div class='ctx'> </div><div class='ctx'> config C2PORT_DURAMAR_2150</div><div class='ctx'> 	tristate "C2 port support for Eurotech's Duramar 2150 (EXPERIMENTAL)"</div><div class='del'>-	depends on X86 &amp;&amp; C2PORT</div><div class='del'>-	default no</div><div class='add'>+	depends on X86</div><div class='add'>+	default n</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables C2 support for the Eurotech's Duramar 2150</div><div class='ctx'> 	  on board micro controller.</div><div class='head'>diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c<br/>index 01ab3c9b4cf7..0842c2994ee2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/misc/eeprom/at25.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/misc/eeprom/at25.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/eeprom/at25.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/eeprom/at25.c</a></div><div class='hunk'>@@ -50,6 +50,7 @@ struct at25_data {</div><div class='ctx'> #define	AT25_SR_BP1	0x08</div><div class='ctx'> #define	AT25_SR_WPEN	0x80		/* writeprotect enable */</div><div class='ctx'> </div><div class='add'>+#define	AT25_INSTR_BIT3	0x08		/* Additional address bit in instr */</div><div class='ctx'> </div><div class='ctx'> #define EE_MAXADDRLEN	3		/* 24 bit addresses, up to 2 MBytes */</div><div class='ctx'> </div><div class='hunk'>@@ -75,6 +76,7 @@ at25_ee_read(</div><div class='ctx'> 	ssize_t			status;</div><div class='ctx'> 	struct spi_transfer	t[2];</div><div class='ctx'> 	struct spi_message	m;</div><div class='add'>+	u8			instr;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(offset &gt;= at25-&gt;bin.size))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -84,7 +86,12 @@ at25_ee_read(</div><div class='ctx'> 		return count;</div><div class='ctx'> </div><div class='ctx'> 	cp = command;</div><div class='del'>-	*cp++ = AT25_READ;</div><div class='add'>+</div><div class='add'>+	instr = AT25_READ;</div><div class='add'>+	if (at25-&gt;chip.flags &amp; EE_INSTR_BIT3_IS_ADDR)</div><div class='add'>+		if (offset &gt;= (1U &lt;&lt; (at25-&gt;addrlen * 8)))</div><div class='add'>+			instr |= AT25_INSTR_BIT3;</div><div class='add'>+	*cp++ = instr;</div><div class='ctx'> </div><div class='ctx'> 	/* 8/16/24-bit address is written MSB first */</div><div class='ctx'> 	switch (at25-&gt;addrlen) {</div><div class='hunk'>@@ -167,14 +174,14 @@ at25_ee_write(struct at25_data *at25, const char *buf, loff_t off,</div><div class='ctx'> 	/* For write, rollover is within the page ... so we write at</div><div class='ctx'> 	 * most one page, then manually roll over to the next page.</div><div class='ctx'> 	 */</div><div class='del'>-	bounce[0] = AT25_WRITE;</div><div class='ctx'> 	mutex_lock(&amp;at25-&gt;lock);</div><div class='ctx'> 	do {</div><div class='ctx'> 		unsigned long	timeout, retries;</div><div class='ctx'> 		unsigned	segment;</div><div class='ctx'> 		unsigned	offset = (unsigned) off;</div><div class='del'>-		u8		*cp = bounce + 1;</div><div class='add'>+		u8		*cp = bounce;</div><div class='ctx'> 		int		sr;</div><div class='add'>+		u8		instr;</div><div class='ctx'> </div><div class='ctx'> 		*cp = AT25_WREN;</div><div class='ctx'> 		status = spi_write(at25-&gt;spi, cp, 1);</div><div class='hunk'>@@ -184,6 +191,12 @@ at25_ee_write(struct at25_data *at25, const char *buf, loff_t off,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		instr = AT25_WRITE;</div><div class='add'>+		if (at25-&gt;chip.flags &amp; EE_INSTR_BIT3_IS_ADDR)</div><div class='add'>+			if (offset &gt;= (1U &lt;&lt; (at25-&gt;addrlen * 8)))</div><div class='add'>+				instr |= AT25_INSTR_BIT3;</div><div class='add'>+		*cp++ = instr;</div><div class='add'>+</div><div class='ctx'> 		/* 8/16/24-bit address is written MSB first */</div><div class='ctx'> 		switch (at25-&gt;addrlen) {</div><div class='ctx'> 		default:	/* case 3 */</div><div class='head'>diff --git a/drivers/staging/mei/Kconfig b/drivers/misc/mei/Kconfig<br/>index 47d78a72db2e..47d78a72db2e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/mei/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/Kconfig</a></div><div class='head'>diff --git a/drivers/staging/mei/Makefile b/drivers/misc/mei/Makefile<br/>index 57168db6c7e5..57168db6c7e5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/mei/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/Makefile</a></div><div class='head'>diff --git a/drivers/staging/mei/hw.h b/drivers/misc/mei/hw.h<br/>index 24c4c962819e..24c4c962819e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/hw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/hw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/mei/hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/hw.h</a></div><div class='head'>diff --git a/drivers/staging/mei/init.c b/drivers/misc/mei/init.c<br/>index eab711fb5fc4..a7d0bb0880ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/mei/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/init.c</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> #include "mei_dev.h"</div><div class='ctx'> #include "hw.h"</div><div class='ctx'> #include "interface.h"</div><div class='del'>-#include "mei.h"</div><div class='add'>+#include &lt;linux/mei.h&gt;</div><div class='ctx'> </div><div class='ctx'> const uuid_le mei_amthi_guid  = UUID_LE(0x12f80028, 0xb4b7, 0x4b2d, 0xac,</div><div class='ctx'> 						0xa8, 0x46, 0xe0, 0xff, 0x65,</div><div class='hunk'>@@ -200,7 +200,7 @@ int mei_hw_init(struct mei_device *dev)</div><div class='ctx'> 		if (!(dev-&gt;me_hw_state &amp; ME_RDY_HRA))</div><div class='ctx'> 			dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "ME turn off ME_RDY.\n");</div><div class='ctx'> </div><div class='del'>-		printk(KERN_ERR "mei: link layer initialization failed.\n");</div><div class='add'>+		dev_err(&amp;dev-&gt;pdev-&gt;dev, "link layer initialization failed.\n");</div><div class='ctx'> 		ret = -ENODEV;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/staging/mei/interface.c b/drivers/misc/mei/interface.c<br/>index 9a2cfafc52a6..428d21e36416 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/interface.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/interface.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/mei/interface.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/interface.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include "mei_dev.h"</div><div class='del'>-#include "mei.h"</div><div class='add'>+#include &lt;linux/mei.h&gt;</div><div class='ctx'> #include "interface.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/staging/mei/interface.h b/drivers/misc/mei/interface.h<br/>index fb90c6f8a759..ddff5d16616f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/interface.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/interface.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/mei/interface.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/interface.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> #ifndef _MEI_INTERFACE_H_</div><div class='ctx'> #define _MEI_INTERFACE_H_</div><div class='ctx'> </div><div class='del'>-#include "mei.h"</div><div class='add'>+#include &lt;linux/mei.h&gt;</div><div class='ctx'> #include "mei_dev.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -51,8 +51,7 @@ int mei_flow_ctrl_creds(struct mei_device *dev, struct mei_cl *cl);</div><div class='ctx'> </div><div class='ctx'> int mei_wd_send(struct mei_device *dev);</div><div class='ctx'> int mei_wd_stop(struct mei_device *dev, bool preserve);</div><div class='del'>-bool mei_wd_host_init(struct mei_device *dev);</div><div class='del'>-void mei_wd_set_start_timeout(struct mei_device *dev, u16 timeout);</div><div class='add'>+int mei_wd_host_init(struct mei_device *dev);</div><div class='ctx'> /*</div><div class='ctx'>  * mei_watchdog_register  - Registering watchdog interface</div><div class='ctx'>  *   once we got connection to the WD Client</div><div class='head'>diff --git a/drivers/staging/mei/interrupt.c b/drivers/misc/mei/interrupt.c<br/>index 2007d2447b1c..93936f1b75eb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/interrupt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/interrupt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/mei/interrupt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/interrupt.c</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mei_dev.h"</div><div class='del'>-#include "mei.h"</div><div class='add'>+#include &lt;linux/mei.h&gt;</div><div class='ctx'> #include "hw.h"</div><div class='ctx'> #include "interface.h"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/staging/mei/iorw.c b/drivers/misc/mei/iorw.c<br/>index 0a80dc4e62f3..f9cced69b65e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/iorw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/iorw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/mei/iorw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/iorw.c</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "mei_dev.h"</div><div class='ctx'> #include "hw.h"</div><div class='del'>-#include "mei.h"</div><div class='add'>+#include &lt;linux/mei.h&gt;</div><div class='ctx'> #include "interface.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/staging/mei/main.c b/drivers/misc/mei/main.c<br/>index 7c9321fa7bb1..c70333228337 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/mei/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/main.c</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -36,19 +38,10 @@</div><div class='ctx'> #include &lt;linux/miscdevice.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mei_dev.h"</div><div class='del'>-#include "mei.h"</div><div class='add'>+#include &lt;linux/mei.h&gt;</div><div class='ctx'> #include "interface.h"</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-#define MEI_READ_TIMEOUT 45</div><div class='del'>-#define MEI_DRIVER_NAME	"mei"</div><div class='del'>-#define MEI_DEV_NAME "mei"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *  mei driver strings</div><div class='del'>- */</div><div class='del'>-static char mei_driver_name[] = MEI_DRIVER_NAME;</div><div class='del'>-static const char mei_driver_string[] = "Intel(R) Management Engine Interface";</div><div class='add'>+static const char mei_driver_name[] = "mei";</div><div class='ctx'> </div><div class='ctx'> /* The device pointer */</div><div class='ctx'> /* Currently this driver works as long as there is only a single AMT device. */</div><div class='hunk'>@@ -931,7 +924,7 @@ static const struct file_operations mei_fops = {</div><div class='ctx'>  * Misc Device Struct</div><div class='ctx'>  */</div><div class='ctx'> static struct miscdevice  mei_misc_device = {</div><div class='del'>-		.name = MEI_DRIVER_NAME,</div><div class='add'>+		.name = "mei",</div><div class='ctx'> 		.fops = &amp;mei_fops,</div><div class='ctx'> 		.minor = MISC_DYNAMIC_MINOR,</div><div class='ctx'> };</div><div class='hunk'>@@ -958,7 +951,7 @@ static int __devinit mei_probe(struct pci_dev *pdev,</div><div class='ctx'> 	/* enable pci dev */</div><div class='ctx'> 	err = pci_enable_device(pdev);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		printk(KERN_ERR "mei: Failed to enable pci device.\n");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to enable pci device.\n");</div><div class='ctx'> 		goto end;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* set PCI host mastering  */</div><div class='hunk'>@@ -966,7 +959,7 @@ static int __devinit mei_probe(struct pci_dev *pdev,</div><div class='ctx'> 	/* pci request regions for mei driver */</div><div class='ctx'> 	err = pci_request_regions(pdev, mei_driver_name);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		printk(KERN_ERR "mei: Failed to get pci regions.\n");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to get pci regions.\n");</div><div class='ctx'> 		goto disable_device;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* allocates and initializes the mei dev structure */</div><div class='hunk'>@@ -978,7 +971,7 @@ static int __devinit mei_probe(struct pci_dev *pdev,</div><div class='ctx'> 	/* mapping  IO device memory */</div><div class='ctx'> 	dev-&gt;mem_addr = pci_iomap(pdev, 0, 0);</div><div class='ctx'> 	if (!dev-&gt;mem_addr) {</div><div class='del'>-		printk(KERN_ERR "mei: mapping I/O device memory failure.\n");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "mapping I/O device memory failure.\n");</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto free_device;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -997,13 +990,13 @@ static int __devinit mei_probe(struct pci_dev *pdev,</div><div class='ctx'> 			IRQF_SHARED, mei_driver_name, dev);</div><div class='ctx'> </div><div class='ctx'> 	if (err) {</div><div class='del'>-		printk(KERN_ERR "mei: request_threaded_irq failure. irq = %d\n",</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "request_threaded_irq failure. irq = %d\n",</div><div class='ctx'> 		       pdev-&gt;irq);</div><div class='ctx'> 		goto unmap_memory;</div><div class='ctx'> 	}</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;dev-&gt;timer_work, mei_timer);</div><div class='ctx'> 	if (mei_hw_init(dev)) {</div><div class='del'>-		printk(KERN_ERR "mei: Init hw failure.\n");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "init hw failure.\n");</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto release_irq;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1020,7 +1013,7 @@ static int __devinit mei_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;mei_mutex);</div><div class='ctx'> </div><div class='del'>-	pr_debug("mei: Driver initialization successful.\n");</div><div class='add'>+	pr_debug("initialization successful.\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1041,7 +1034,7 @@ disable_device:</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> end:</div><div class='ctx'> 	mutex_unlock(&amp;mei_mutex);</div><div class='del'>-	printk(KERN_ERR "mei: Driver initialization failed.\n");</div><div class='add'>+	dev_err(&amp;pdev-&gt;dev, "initialization failed.\n");</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1160,8 +1153,8 @@ static int mei_pci_resume(struct device *device)</div><div class='ctx'> 			IRQF_SHARED, mei_driver_name, dev);</div><div class='ctx'> </div><div class='ctx'> 	if (err) {</div><div class='del'>-		printk(KERN_ERR "mei: Request_irq failure. irq = %d\n",</div><div class='del'>-		       pdev-&gt;irq);</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "request_threaded_irq failed: irq = %d.\n",</div><div class='add'>+				pdev-&gt;irq);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1204,11 +1197,11 @@ static int __init mei_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	pr_debug("mei: %s\n", mei_driver_string);</div><div class='add'>+	pr_debug("loading.\n");</div><div class='ctx'> 	/* init pci module */</div><div class='ctx'> 	ret = pci_register_driver(&amp;mei_driver);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		printk(KERN_ERR "mei: Error registering driver.\n");</div><div class='add'>+		pr_err("error registering driver.\n");</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1226,7 +1219,7 @@ static void __exit mei_exit_module(void)</div><div class='ctx'> 	misc_deregister(&amp;mei_misc_device);</div><div class='ctx'> 	pci_unregister_driver(&amp;mei_driver);</div><div class='ctx'> </div><div class='del'>-	pr_debug("mei: Driver unloaded successfully.\n");</div><div class='add'>+	pr_debug("unloaded successfully.\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_exit(mei_exit_module);</div><div class='head'>diff --git a/drivers/staging/mei/mei_dev.h b/drivers/misc/mei/mei_dev.h<br/>index 10b1b4e2f8ac..63d7ee97c5fb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/mei_dev.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/mei_dev.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/mei/mei_dev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/mei_dev.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/watchdog.h&gt;</div><div class='del'>-#include "mei.h"</div><div class='add'>+#include &lt;linux/mei.h&gt;</div><div class='ctx'> #include "hw.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/staging/mei/wd.c b/drivers/misc/mei/wd.c<br/>index cf4c29d10e7f..6be5605707b4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/staging/mei/wd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/staging/mei/wd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/mei/wd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/mei/wd.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #include "mei_dev.h"</div><div class='ctx'> #include "hw.h"</div><div class='ctx'> #include "interface.h"</div><div class='del'>-#include "mei.h"</div><div class='add'>+#include &lt;linux/mei.h&gt;</div><div class='ctx'> </div><div class='ctx'> static const u8 mei_start_wd_params[] = { 0x02, 0x12, 0x13, 0x10 };</div><div class='ctx'> static const u8 mei_stop_wd_params[] = { 0x02, 0x02, 0x14, 0x10 };</div><div class='hunk'>@@ -45,23 +45,22 @@ const uuid_le mei_wd_guid = UUID_LE(0x05B79A6F, 0x4628, 0x4D7F, 0x89,</div><div class='ctx'> 						0x9D, 0xA9, 0x15, 0x14, 0xCB,</div><div class='ctx'> 						0x32, 0xAB);</div><div class='ctx'> </div><div class='del'>-void mei_wd_set_start_timeout(struct mei_device *dev, u16 timeout)</div><div class='add'>+static void mei_wd_set_start_timeout(struct mei_device *dev, u16 timeout)</div><div class='ctx'> {</div><div class='del'>-	dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "timeout=%d.\n", timeout);</div><div class='add'>+	dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "wd: set timeout=%d.\n", timeout);</div><div class='ctx'> 	memcpy(dev-&gt;wd_data, mei_start_wd_params, MEI_WD_PARAMS_SIZE);</div><div class='del'>-	memcpy(dev-&gt;wd_data + MEI_WD_PARAMS_SIZE,</div><div class='del'>-			&amp;timeout, sizeof(u16));</div><div class='add'>+	memcpy(dev-&gt;wd_data + MEI_WD_PARAMS_SIZE, &amp;timeout, sizeof(u16));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * host_init_wd - mei initialization wd.</div><div class='ctx'>  *</div><div class='ctx'>  * @dev: the device structure</div><div class='add'>+ * returns -ENENT if wd client cannot be found</div><div class='add'>+ *         -EIO if write has failed</div><div class='ctx'>  */</div><div class='del'>-bool mei_wd_host_init(struct mei_device *dev)</div><div class='add'>+int mei_wd_host_init(struct mei_device *dev)</div><div class='ctx'> {</div><div class='del'>-	bool ret = false;</div><div class='del'>-</div><div class='ctx'> 	mei_cl_init(&amp;dev-&gt;wd_cl, dev);</div><div class='ctx'> </div><div class='ctx'> 	/* look for WD client and connect to it */</div><div class='hunk'>@@ -72,25 +71,21 @@ bool mei_wd_host_init(struct mei_device *dev)</div><div class='ctx'> 	mei_find_me_client_update_filext(dev, &amp;dev-&gt;wd_cl,</div><div class='ctx'> 				&amp;mei_wd_guid, MEI_WD_HOST_CLIENT_ID);</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "check wd_cl\n");</div><div class='del'>-	if (MEI_FILE_CONNECTING == dev-&gt;wd_cl.state) {</div><div class='del'>-		if (mei_connect(dev, &amp;dev-&gt;wd_cl)) {</div><div class='del'>-			dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "Failed to connect to WD client\n");</div><div class='del'>-			dev-&gt;wd_cl.state = MEI_FILE_DISCONNECTED;</div><div class='del'>-			dev-&gt;wd_cl.host_client_id = 0;</div><div class='del'>-			ret = false;</div><div class='del'>-			goto end;</div><div class='del'>-		} else {</div><div class='del'>-			dev-&gt;wd_cl.timer_count = CONNECT_TIMEOUT;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "Failed to find WD client\n");</div><div class='del'>-		ret = false;</div><div class='del'>-		goto end;</div><div class='add'>+	dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "wd: check client\n");</div><div class='add'>+	if (MEI_FILE_CONNECTING != dev-&gt;wd_cl.state) {</div><div class='add'>+		dev_info(&amp;dev-&gt;pdev-&gt;dev, "wd: failed to find the client\n");</div><div class='add'>+		return -ENOENT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-end:</div><div class='del'>-	return ret;</div><div class='add'>+	if (mei_connect(dev, &amp;dev-&gt;wd_cl)) {</div><div class='add'>+		dev_err(&amp;dev-&gt;pdev-&gt;dev, "wd: failed to connect to the client\n");</div><div class='add'>+		dev-&gt;wd_cl.state = MEI_FILE_DISCONNECTED;</div><div class='add'>+		dev-&gt;wd_cl.host_client_id = 0;</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	dev-&gt;wd_cl.timer_count = CONNECT_TIMEOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -159,7 +154,7 @@ int mei_wd_stop(struct mei_device *dev, bool preserve)</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				goto out;</div><div class='ctx'> 		} else {</div><div class='del'>-			dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "send stop WD failed\n");</div><div class='add'>+			dev_err(&amp;dev-&gt;pdev-&gt;dev, "wd: send stop failed\n");</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		dev-&gt;wd_pending = false;</div><div class='hunk'>@@ -173,13 +168,13 @@ int mei_wd_stop(struct mei_device *dev, bool preserve)</div><div class='ctx'> 					dev-&gt;wd_stopped, 10 * HZ);</div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;device_lock);</div><div class='ctx'> 	if (dev-&gt;wd_stopped) {</div><div class='del'>-		dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "stop wd complete ret=%d.\n", ret);</div><div class='add'>+		dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "wd: stop completed ret=%d.\n", ret);</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			ret = -ETIMEDOUT;</div><div class='ctx'> 		dev_warn(&amp;dev-&gt;pdev-&gt;dev,</div><div class='del'>-			"stop wd failed to complete ret=%d.\n", ret);</div><div class='add'>+			"wd: stop failed to complete ret=%d.\n", ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (preserve)</div><div class='hunk'>@@ -208,13 +203,15 @@ static int mei_wd_ops_start(struct watchdog_device *wd_dev)</div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;device_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;mei_state != MEI_ENABLED) {</div><div class='del'>-		dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "mei_state != MEI_ENABLED  mei_state= %d\n",</div><div class='del'>-		    dev-&gt;mei_state);</div><div class='add'>+		dev_dbg(&amp;dev-&gt;pdev-&gt;dev,</div><div class='add'>+			"wd: mei_state != MEI_ENABLED  mei_state = %d\n",</div><div class='add'>+			dev-&gt;mei_state);</div><div class='ctx'> 		goto end_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;wd_cl.state != MEI_FILE_CONNECTED)	{</div><div class='del'>-		dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "MEI Driver is not connected to Watchdog Client\n");</div><div class='add'>+		dev_dbg(&amp;dev-&gt;pdev-&gt;dev,</div><div class='add'>+			"MEI Driver is not connected to Watchdog Client\n");</div><div class='ctx'> 		goto end_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -267,7 +264,7 @@ static int mei_wd_ops_ping(struct watchdog_device *wd_dev)</div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;device_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;wd_cl.state != MEI_FILE_CONNECTED) {</div><div class='del'>-		dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "wd is not connected.\n");</div><div class='add'>+		dev_err(&amp;dev-&gt;pdev-&gt;dev, "wd: not connected.\n");</div><div class='ctx'> 		ret = -ENODEV;</div><div class='ctx'> 		goto end;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -277,16 +274,17 @@ static int mei_wd_ops_ping(struct watchdog_device *wd_dev)</div><div class='ctx'> 		mei_flow_ctrl_creds(dev, &amp;dev-&gt;wd_cl) &gt; 0) {</div><div class='ctx'> </div><div class='ctx'> 		dev-&gt;mei_host_buffer_is_empty = false;</div><div class='del'>-		dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "sending watchdog ping\n");</div><div class='add'>+		dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "wd: sending ping\n");</div><div class='ctx'> </div><div class='ctx'> 		if (mei_wd_send(dev)) {</div><div class='del'>-			dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "wd send failed.\n");</div><div class='add'>+			dev_err(&amp;dev-&gt;pdev-&gt;dev, "wd: send failed.\n");</div><div class='ctx'> 			ret = -EIO;</div><div class='ctx'> 			goto end;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (mei_flow_ctrl_reduce(dev, &amp;dev-&gt;wd_cl)) {</div><div class='del'>-			dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "mei_flow_ctrl_reduce() failed.\n");</div><div class='add'>+			dev_err(&amp;dev-&gt;pdev-&gt;dev,</div><div class='add'>+				"wd: mei_flow_ctrl_reduce() failed.\n");</div><div class='ctx'> 			ret = -EIO;</div><div class='ctx'> 			goto end;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -346,7 +344,7 @@ static const struct watchdog_info wd_info = {</div><div class='ctx'> 		.options = WDIOF_KEEPALIVEPING,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct watchdog_device amt_wd_dev = {</div><div class='add'>+static struct watchdog_device amt_wd_dev = {</div><div class='ctx'> 		.info = &amp;wd_info,</div><div class='ctx'> 		.ops = &amp;wd_ops,</div><div class='ctx'> 		.timeout = AMT_WD_DEFAULT_TIMEOUT,</div><div class='hunk'>@@ -362,10 +360,12 @@ void  mei_watchdog_register(struct mei_device *dev)</div><div class='ctx'> 	dev-&gt;wd_due_counter = !!dev-&gt;wd_timeout;</div><div class='ctx'> </div><div class='ctx'> 	if (watchdog_register_device(&amp;amt_wd_dev)) {</div><div class='del'>-		dev_err(&amp;dev-&gt;pdev-&gt;dev, "unable to register watchdog device.\n");</div><div class='add'>+		dev_err(&amp;dev-&gt;pdev-&gt;dev,</div><div class='add'>+			"wd: unable to register watchdog device.\n");</div><div class='ctx'> 		dev-&gt;wd_interface_reg = false;</div><div class='ctx'> 	} else {</div><div class='del'>-		dev_dbg(&amp;dev-&gt;pdev-&gt;dev, "successfully register watchdog interface.\n");</div><div class='add'>+		dev_dbg(&amp;dev-&gt;pdev-&gt;dev,</div><div class='add'>+			"wd: successfully register watchdog interface.\n");</div><div class='ctx'> 		dev-&gt;wd_interface_reg = true;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c<br/>index 10fc4785dba7..9fbcacd703d5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/misc/pch_phub.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/misc/pch_phub.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/pch_phub.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/pch_phub.c</a></div><div class='hunk'>@@ -65,10 +65,6 @@</div><div class='ctx'> #define PCI_VENDOR_ID_ROHM			0x10db</div><div class='ctx'> #define PCI_DEVICE_ID_ROHM_ML7213_PHUB		0x801A</div><div class='ctx'> </div><div class='del'>-/* Macros for ML7213 */</div><div class='del'>-#define PCI_VENDOR_ID_ROHM			0x10db</div><div class='del'>-#define PCI_DEVICE_ID_ROHM_ML7213_PHUB		0x801A</div><div class='del'>-</div><div class='ctx'> /* Macros for ML7223 */</div><div class='ctx'> #define PCI_DEVICE_ID_ROHM_ML7223_mPHUB	0x8012 /* for Bus-m */</div><div class='ctx'> #define PCI_DEVICE_ID_ROHM_ML7223_nPHUB	0x8002 /* for Bus-n */</div><div class='head'>diff --git a/drivers/misc/pti.c b/drivers/misc/pti.c<br/>index 383133b201a1..b7eb545394b1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/misc/pti.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/misc/pti.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/misc/pti.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/misc/pti.c</a></div><div class='hunk'>@@ -888,7 +888,7 @@ static struct pci_driver pti_pci_driver = {</div><div class='ctx'> 	.name		= PCINAME,</div><div class='ctx'> 	.id_table	= pci_ids,</div><div class='ctx'> 	.probe		= pti_pci_probe,</div><div class='del'>-	.remove		= pti_pci_remove,</div><div class='add'>+	.remove		= __devexit_p(pti_pci_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c<br/>index dabec556ebb8..dd2d374dcc7a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/card/block.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/card/block.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/card/block.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/card/block.c</a></div><div class='hunk'>@@ -384,7 +384,7 @@ static int mmc_blk_ioctl_cmd(struct block_device *bdev,</div><div class='ctx'> 	md = mmc_blk_get(bdev-&gt;bd_disk);</div><div class='ctx'> 	if (!md) {</div><div class='ctx'> 		err = -EINVAL;</div><div class='del'>-		goto cmd_done;</div><div class='add'>+		goto cmd_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	card = md-&gt;queue.card;</div><div class='hunk'>@@ -483,6 +483,7 @@ cmd_rel_host:</div><div class='ctx'> </div><div class='ctx'> cmd_done:</div><div class='ctx'> 	mmc_blk_put(md);</div><div class='add'>+cmd_err:</div><div class='ctx'> 	kfree(idata-&gt;buf);</div><div class='ctx'> 	kfree(idata);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1283,7 +1284,7 @@ static int mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *rqc)</div><div class='ctx'> 	int ret = 1, disable_multi = 0, retry = 0, type;</div><div class='ctx'> 	enum mmc_blk_status status;</div><div class='ctx'> 	struct mmc_queue_req *mq_rq;</div><div class='del'>-	struct request *req;</div><div class='add'>+	struct request *req = rqc;</div><div class='ctx'> 	struct mmc_async_req *areq;</div><div class='ctx'> </div><div class='ctx'> 	if (!rqc &amp;&amp; !mq-&gt;mqrq_prev-&gt;req)</div><div class='hunk'>@@ -1291,6 +1292,16 @@ static int mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *rqc)</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		if (rqc) {</div><div class='add'>+			/*</div><div class='add'>+			 * When 4KB native sector is enabled, only 8 blocks</div><div class='add'>+			 * multiple read or write is allowed</div><div class='add'>+			 */</div><div class='add'>+			if ((brq-&gt;data.blocks &amp; 0x07) &amp;&amp;</div><div class='add'>+			    (card-&gt;ext_csd.data_sector_size == 4096)) {</div><div class='add'>+				pr_err("%s: Transfer size is not 4KB sector size aligned\n",</div><div class='add'>+					req-&gt;rq_disk-&gt;disk_name);</div><div class='add'>+				goto cmd_abort;</div><div class='add'>+			}</div><div class='ctx'> 			mmc_blk_rw_rq_prep(mq-&gt;mqrq_cur, card, 0, mq);</div><div class='ctx'> 			areq = &amp;mq-&gt;mqrq_cur-&gt;mmc_active;</div><div class='ctx'> 		} else</div><div class='hunk'>@@ -1538,7 +1549,12 @@ static struct mmc_blk_data *mmc_blk_alloc_req(struct mmc_card *card,</div><div class='ctx'> 	snprintf(md-&gt;disk-&gt;disk_name, sizeof(md-&gt;disk-&gt;disk_name),</div><div class='ctx'> 		 "mmcblk%d%s", md-&gt;name_idx, subname ? subname : "");</div><div class='ctx'> </div><div class='del'>-	blk_queue_logical_block_size(md-&gt;queue.queue, 512);</div><div class='add'>+	if (mmc_card_mmc(card))</div><div class='add'>+		blk_queue_logical_block_size(md-&gt;queue.queue,</div><div class='add'>+					     card-&gt;ext_csd.data_sector_size);</div><div class='add'>+	else</div><div class='add'>+		blk_queue_logical_block_size(md-&gt;queue.queue, 512);</div><div class='add'>+</div><div class='ctx'> 	set_capacity(md-&gt;disk, size);</div><div class='ctx'> </div><div class='ctx'> 	if (mmc_host_cmd23(card-&gt;host)) {</div><div class='head'>diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c<br/>index 996f8e36e23d..e360a979857d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/card/queue.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/card/queue.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/card/queue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/card/queue.c</a></div><div class='hunk'>@@ -96,7 +96,7 @@ static int mmc_queue_thread(void *d)</div><div class='ctx'>  * on any queue on this host, and attempt to issue it.  This may</div><div class='ctx'>  * not be the queue we were asked to process.</div><div class='ctx'>  */</div><div class='del'>-static void mmc_request(struct request_queue *q)</div><div class='add'>+static void mmc_request_fn(struct request_queue *q)</div><div class='ctx'> {</div><div class='ctx'> 	struct mmc_queue *mq = q-&gt;queuedata;</div><div class='ctx'> 	struct request *req;</div><div class='hunk'>@@ -171,12 +171,10 @@ int mmc_init_queue(struct mmc_queue *mq, struct mmc_card *card,</div><div class='ctx'> 		limit = *mmc_dev(host)-&gt;dma_mask;</div><div class='ctx'> </div><div class='ctx'> 	mq-&gt;card = card;</div><div class='del'>-	mq-&gt;queue = blk_init_queue(mmc_request, lock);</div><div class='add'>+	mq-&gt;queue = blk_init_queue(mmc_request_fn, lock);</div><div class='ctx'> 	if (!mq-&gt;queue)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	memset(&amp;mq-&gt;mqrq_cur, 0, sizeof(mq-&gt;mqrq_cur));</div><div class='del'>-	memset(&amp;mq-&gt;mqrq_prev, 0, sizeof(mq-&gt;mqrq_prev));</div><div class='ctx'> 	mq-&gt;mqrq_cur = mqrq_cur;</div><div class='ctx'> 	mq-&gt;mqrq_prev = mqrq_prev;</div><div class='ctx'> 	mq-&gt;queue-&gt;queuedata = mq;</div><div class='head'>diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c<br/>index c60cee92a2b2..9b68933f27e7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/core/bus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/core/bus.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/core/bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/core/bus.c</a></div><div class='hunk'>@@ -122,6 +122,7 @@ static int mmc_bus_remove(struct device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='ctx'> static int mmc_bus_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mmc_driver *drv = to_mmc_driver(dev-&gt;driver);</div><div class='hunk'>@@ -143,6 +144,7 @@ static int mmc_bus_resume(struct device *dev)</div><div class='ctx'> 		ret = drv-&gt;resume(card);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_RUNTIME</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mmc/core/cd-gpio.c b/drivers/mmc/core/cd-gpio.c<br/>index 2c14be73254c..f13e38deceac 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/core/cd-gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/core/cd-gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/core/cd-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/core/cd-gpio.c</a></div><div class='hunk'>@@ -73,6 +73,9 @@ void mmc_cd_gpio_free(struct mmc_host *host)</div><div class='ctx'> {</div><div class='ctx'> 	struct mmc_cd_gpio *cd = host-&gt;hotplug.handler_priv;</div><div class='ctx'> </div><div class='add'>+	if (!cd)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	free_irq(host-&gt;hotplug.irq, host);</div><div class='ctx'> 	gpio_free(cd-&gt;gpio);</div><div class='ctx'> 	kfree(cd);</div><div class='head'>diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c<br/>index ba821fe70bca..0b6141d29dbd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/core/core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/core/core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/core/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/core/core.c</a></div><div class='hunk'>@@ -42,6 +42,7 @@</div><div class='ctx'> #include "sdio_ops.h"</div><div class='ctx'> </div><div class='ctx'> static struct workqueue_struct *workqueue;</div><div class='add'>+static const unsigned freqs[] = { 400000, 300000, 200000, 100000 };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Enabling software CRCs on the data blocks can be a significant (30%)</div><div class='hunk'>@@ -1157,6 +1158,9 @@ static void mmc_power_up(struct mmc_host *host)</div><div class='ctx'> {</div><div class='ctx'> 	int bit;</div><div class='ctx'> </div><div class='add'>+	if (host-&gt;ios.power_mode == MMC_POWER_ON)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	mmc_host_clk_hold(host);</div><div class='ctx'> </div><div class='ctx'> 	/* If ocr is set, we use it */</div><div class='hunk'>@@ -1199,6 +1203,10 @@ static void mmc_power_up(struct mmc_host *host)</div><div class='ctx'> void mmc_power_off(struct mmc_host *host)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (host-&gt;ios.power_mode == MMC_POWER_OFF)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	mmc_host_clk_hold(host);</div><div class='ctx'> </div><div class='ctx'> 	host-&gt;ios.clock = 0;</div><div class='hunk'>@@ -2005,7 +2013,6 @@ EXPORT_SYMBOL(mmc_detect_card_removed);</div><div class='ctx'> </div><div class='ctx'> void mmc_rescan(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	static const unsigned freqs[] = { 400000, 300000, 200000, 100000 };</div><div class='ctx'> 	struct mmc_host *host =</div><div class='ctx'> 		container_of(work, struct mmc_host, detect.work);</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -2044,8 +2051,12 @@ void mmc_rescan(struct work_struct *work)</div><div class='ctx'> 	 */</div><div class='ctx'> 	mmc_bus_put(host);</div><div class='ctx'> </div><div class='del'>-	if (host-&gt;ops-&gt;get_cd &amp;&amp; host-&gt;ops-&gt;get_cd(host) == 0)</div><div class='add'>+	if (host-&gt;ops-&gt;get_cd &amp;&amp; host-&gt;ops-&gt;get_cd(host) == 0) {</div><div class='add'>+		mmc_claim_host(host);</div><div class='add'>+		mmc_power_off(host);</div><div class='add'>+		mmc_release_host(host);</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mmc_claim_host(host);</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(freqs); i++) {</div><div class='hunk'>@@ -2063,7 +2074,8 @@ void mmc_rescan(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> void mmc_start_host(struct mmc_host *host)</div><div class='ctx'> {</div><div class='del'>-	mmc_power_off(host);</div><div class='add'>+	host-&gt;f_init = max(freqs[0], host-&gt;f_min);</div><div class='add'>+	mmc_power_up(host);</div><div class='ctx'> 	mmc_detect_change(host, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c<br/>index 54df5adc0413..2d4a4b746750 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/core/mmc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/core/mmc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/core/mmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/core/mmc.c</a></div><div class='hunk'>@@ -235,6 +235,36 @@ static int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mmc_select_card_type(struct mmc_card *card)</div><div class='add'>+{</div><div class='add'>+	struct mmc_host *host = card-&gt;host;</div><div class='add'>+	u8 card_type = card-&gt;ext_csd.raw_card_type &amp; EXT_CSD_CARD_TYPE_MASK;</div><div class='add'>+	unsigned int caps = host-&gt;caps, caps2 = host-&gt;caps2;</div><div class='add'>+	unsigned int hs_max_dtr = 0;</div><div class='add'>+</div><div class='add'>+	if (card_type &amp; EXT_CSD_CARD_TYPE_26)</div><div class='add'>+		hs_max_dtr = MMC_HIGH_26_MAX_DTR;</div><div class='add'>+</div><div class='add'>+	if (caps &amp; MMC_CAP_MMC_HIGHSPEED &amp;&amp;</div><div class='add'>+			card_type &amp; EXT_CSD_CARD_TYPE_52)</div><div class='add'>+		hs_max_dtr = MMC_HIGH_52_MAX_DTR;</div><div class='add'>+</div><div class='add'>+	if ((caps &amp; MMC_CAP_1_8V_DDR &amp;&amp;</div><div class='add'>+			card_type &amp; EXT_CSD_CARD_TYPE_DDR_1_8V) ||</div><div class='add'>+	    (caps &amp; MMC_CAP_1_2V_DDR &amp;&amp;</div><div class='add'>+			card_type &amp; EXT_CSD_CARD_TYPE_DDR_1_2V))</div><div class='add'>+		hs_max_dtr = MMC_HIGH_DDR_MAX_DTR;</div><div class='add'>+</div><div class='add'>+	if ((caps2 &amp; MMC_CAP2_HS200_1_8V_SDR &amp;&amp;</div><div class='add'>+			card_type &amp; EXT_CSD_CARD_TYPE_SDR_1_8V) ||</div><div class='add'>+	    (caps2 &amp; MMC_CAP2_HS200_1_2V_SDR &amp;&amp;</div><div class='add'>+			card_type &amp; EXT_CSD_CARD_TYPE_SDR_1_2V))</div><div class='add'>+		hs_max_dtr = MMC_HS200_MAX_DTR;</div><div class='add'>+</div><div class='add'>+	card-&gt;ext_csd.hs_max_dtr = hs_max_dtr;</div><div class='add'>+	card-&gt;ext_csd.card_type = card_type;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Decode extended CSD.</div><div class='ctx'>  */</div><div class='hunk'>@@ -284,56 +314,9 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd)</div><div class='ctx'> 		if (card-&gt;ext_csd.sectors &gt; (2u * 1024 * 1024 * 1024) / 512)</div><div class='ctx'> 			mmc_card_set_blockaddr(card);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	card-&gt;ext_csd.raw_card_type = ext_csd[EXT_CSD_CARD_TYPE];</div><div class='del'>-	switch (ext_csd[EXT_CSD_CARD_TYPE] &amp; EXT_CSD_CARD_TYPE_MASK) {</div><div class='del'>-	case EXT_CSD_CARD_TYPE_SDR_ALL:</div><div class='del'>-	case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_8V:</div><div class='del'>-	case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_2V:</div><div class='del'>-	case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_52:</div><div class='del'>-		card-&gt;ext_csd.hs_max_dtr = 200000000;</div><div class='del'>-		card-&gt;ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_200;</div><div class='del'>-		break;</div><div class='del'>-	case EXT_CSD_CARD_TYPE_SDR_1_2V_ALL:</div><div class='del'>-	case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_8V:</div><div class='del'>-	case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_2V:</div><div class='del'>-	case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_52:</div><div class='del'>-		card-&gt;ext_csd.hs_max_dtr = 200000000;</div><div class='del'>-		card-&gt;ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_2V;</div><div class='del'>-		break;</div><div class='del'>-	case EXT_CSD_CARD_TYPE_SDR_1_8V_ALL:</div><div class='del'>-	case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_8V:</div><div class='del'>-	case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_2V:</div><div class='del'>-	case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_52:</div><div class='del'>-		card-&gt;ext_csd.hs_max_dtr = 200000000;</div><div class='del'>-		card-&gt;ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_8V;</div><div class='del'>-		break;</div><div class='del'>-	case EXT_CSD_CARD_TYPE_DDR_52 | EXT_CSD_CARD_TYPE_52 |</div><div class='del'>-	     EXT_CSD_CARD_TYPE_26:</div><div class='del'>-		card-&gt;ext_csd.hs_max_dtr = 52000000;</div><div class='del'>-		card-&gt;ext_csd.card_type = EXT_CSD_CARD_TYPE_DDR_52;</div><div class='del'>-		break;</div><div class='del'>-	case EXT_CSD_CARD_TYPE_DDR_1_2V | EXT_CSD_CARD_TYPE_52 |</div><div class='del'>-	     EXT_CSD_CARD_TYPE_26:</div><div class='del'>-		card-&gt;ext_csd.hs_max_dtr = 52000000;</div><div class='del'>-		card-&gt;ext_csd.card_type = EXT_CSD_CARD_TYPE_DDR_1_2V;</div><div class='del'>-		break;</div><div class='del'>-	case EXT_CSD_CARD_TYPE_DDR_1_8V | EXT_CSD_CARD_TYPE_52 |</div><div class='del'>-	     EXT_CSD_CARD_TYPE_26:</div><div class='del'>-		card-&gt;ext_csd.hs_max_dtr = 52000000;</div><div class='del'>-		card-&gt;ext_csd.card_type = EXT_CSD_CARD_TYPE_DDR_1_8V;</div><div class='del'>-		break;</div><div class='del'>-	case EXT_CSD_CARD_TYPE_52 | EXT_CSD_CARD_TYPE_26:</div><div class='del'>-		card-&gt;ext_csd.hs_max_dtr = 52000000;</div><div class='del'>-		break;</div><div class='del'>-	case EXT_CSD_CARD_TYPE_26:</div><div class='del'>-		card-&gt;ext_csd.hs_max_dtr = 26000000;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		/* MMC v4 spec says this cannot happen */</div><div class='del'>-		pr_warning("%s: card is mmc v4 but doesn't "</div><div class='del'>-			"support any high-speed modes.\n",</div><div class='del'>-			mmc_hostname(card-&gt;host));</div><div class='del'>-	}</div><div class='add'>+	mmc_select_card_type(card);</div><div class='ctx'> </div><div class='ctx'> 	card-&gt;ext_csd.raw_s_a_timeout = ext_csd[EXT_CSD_S_A_TIMEOUT];</div><div class='ctx'> 	card-&gt;ext_csd.raw_erase_timeout_mult =</div><div class='hunk'>@@ -533,6 +516,8 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			card-&gt;ext_csd.data_tag_unit_size = 0;</div><div class='ctx'> 		}</div><div class='add'>+	} else {</div><div class='add'>+		card-&gt;ext_csd.data_sector_size = 512;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -556,14 +541,10 @@ static int mmc_compare_ext_csds(struct mmc_card *card, unsigned bus_width)</div><div class='ctx'> 	err = mmc_get_ext_csd(card, &amp;bw_ext_csd);</div><div class='ctx'> </div><div class='ctx'> 	if (err || bw_ext_csd == NULL) {</div><div class='del'>-		if (bus_width != MMC_BUS_WIDTH_1)</div><div class='del'>-			err = -EINVAL;</div><div class='add'>+		err = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (bus_width == MMC_BUS_WIDTH_1)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	/* only compare read only fields */</div><div class='ctx'> 	err = !((card-&gt;ext_csd.raw_partition_support ==</div><div class='ctx'> 			bw_ext_csd[EXT_CSD_PARTITION_SUPPORT]) &amp;&amp;</div><div class='hunk'>@@ -736,6 +717,10 @@ static int mmc_select_powerclass(struct mmc_card *card,</div><div class='ctx'> 				 card-&gt;ext_csd.generic_cmd6_time);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (err)</div><div class='add'>+		pr_err("%s: power class selection for ext_csd_bus_width %d"</div><div class='add'>+		       " failed\n", mmc_hostname(card-&gt;host), bus_width);</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -745,7 +730,7 @@ static int mmc_select_powerclass(struct mmc_card *card,</div><div class='ctx'>  */</div><div class='ctx'> static int mmc_select_hs200(struct mmc_card *card)</div><div class='ctx'> {</div><div class='del'>-	int idx, err = 0;</div><div class='add'>+	int idx, err = -EINVAL;</div><div class='ctx'> 	struct mmc_host *host;</div><div class='ctx'> 	static unsigned ext_csd_bits[] = {</div><div class='ctx'> 		EXT_CSD_BUS_WIDTH_4,</div><div class='hunk'>@@ -761,10 +746,12 @@ static int mmc_select_hs200(struct mmc_card *card)</div><div class='ctx'> 	host = card-&gt;host;</div><div class='ctx'> </div><div class='ctx'> 	if (card-&gt;ext_csd.card_type &amp; EXT_CSD_CARD_TYPE_SDR_1_2V &amp;&amp;</div><div class='del'>-	    host-&gt;caps2 &amp; MMC_CAP2_HS200_1_2V_SDR)</div><div class='del'>-		if (mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120, 0))</div><div class='del'>-			err = mmc_set_signal_voltage(host,</div><div class='del'>-						     MMC_SIGNAL_VOLTAGE_180, 0);</div><div class='add'>+			host-&gt;caps2 &amp; MMC_CAP2_HS200_1_2V_SDR)</div><div class='add'>+		err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120, 0);</div><div class='add'>+</div><div class='add'>+	if (err &amp;&amp; card-&gt;ext_csd.card_type &amp; EXT_CSD_CARD_TYPE_SDR_1_8V &amp;&amp;</div><div class='add'>+			host-&gt;caps2 &amp; MMC_CAP2_HS200_1_8V_SDR)</div><div class='add'>+		err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* If fails try again during next card power cycle */</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -1117,9 +1104,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,</div><div class='ctx'> 				EXT_CSD_BUS_WIDTH_8 : EXT_CSD_BUS_WIDTH_4;</div><div class='ctx'> 		err = mmc_select_powerclass(card, ext_csd_bits, ext_csd);</div><div class='ctx'> 		if (err)</div><div class='del'>-			pr_warning("%s: power class selection to bus width %d"</div><div class='del'>-				   " failed\n", mmc_hostname(card-&gt;host),</div><div class='del'>-				   1 &lt;&lt; bus_width);</div><div class='add'>+			goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1151,10 +1136,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,</div><div class='ctx'> 			err = mmc_select_powerclass(card, ext_csd_bits[idx][0],</div><div class='ctx'> 						    ext_csd);</div><div class='ctx'> 			if (err)</div><div class='del'>-				pr_warning("%s: power class selection to "</div><div class='del'>-					   "bus width %d failed\n",</div><div class='del'>-					   mmc_hostname(card-&gt;host),</div><div class='del'>-					   1 &lt;&lt; bus_width);</div><div class='add'>+				goto err;</div><div class='ctx'> </div><div class='ctx'> 			err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,</div><div class='ctx'> 					 EXT_CSD_BUS_WIDTH,</div><div class='hunk'>@@ -1182,10 +1164,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,</div><div class='ctx'> 			err = mmc_select_powerclass(card, ext_csd_bits[idx][1],</div><div class='ctx'> 						    ext_csd);</div><div class='ctx'> 			if (err)</div><div class='del'>-				pr_warning("%s: power class selection to "</div><div class='del'>-					   "bus width %d ddr %d failed\n",</div><div class='del'>-					   mmc_hostname(card-&gt;host),</div><div class='del'>-					   1 &lt;&lt; bus_width, ddr);</div><div class='add'>+				goto err;</div><div class='ctx'> </div><div class='ctx'> 			err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,</div><div class='ctx'> 					 EXT_CSD_BUS_WIDTH,</div><div class='head'>diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c<br/>index 2c7c83f832d2..13d0e95380ab 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/core/sdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/core/sdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/core/sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/core/sdio.c</a></div><div class='hunk'>@@ -947,7 +947,7 @@ static int mmc_sdio_resume(struct mmc_host *host)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!err &amp;&amp; host-&gt;sdio_irqs)</div><div class='del'>-		mmc_signal_sdio_irq(host);</div><div class='add'>+		wake_up_process(host-&gt;sdio_irq_thread);</div><div class='ctx'> 	mmc_release_host(host);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/drivers/mmc/core/sdio_irq.c b/drivers/mmc/core/sdio_irq.c<br/>index f573e7f9f740..3d8ceb4084de 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/core/sdio_irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/core/sdio_irq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/core/sdio_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/core/sdio_irq.c</a></div><div class='hunk'>@@ -28,18 +28,20 @@</div><div class='ctx'> </div><div class='ctx'> #include "sdio_ops.h"</div><div class='ctx'> </div><div class='del'>-static int process_sdio_pending_irqs(struct mmc_card *card)</div><div class='add'>+static int process_sdio_pending_irqs(struct mmc_host *host)</div><div class='ctx'> {</div><div class='add'>+	struct mmc_card *card = host-&gt;card;</div><div class='ctx'> 	int i, ret, count;</div><div class='ctx'> 	unsigned char pending;</div><div class='ctx'> 	struct sdio_func *func;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Optimization, if there is only 1 function interrupt registered</div><div class='del'>-	 * call irq handler directly</div><div class='add'>+	 * and we know an IRQ was signaled then call irq handler directly.</div><div class='add'>+	 * Otherwise do the full probe.</div><div class='ctx'> 	 */</div><div class='ctx'> 	func = card-&gt;sdio_single_irq;</div><div class='del'>-	if (func) {</div><div class='add'>+	if (func &amp;&amp; host-&gt;sdio_irq_pending) {</div><div class='ctx'> 		func-&gt;irq_handler(func);</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -116,7 +118,8 @@ static int sdio_irq_thread(void *_host)</div><div class='ctx'> 		ret = __mmc_claim_host(host, &amp;host-&gt;sdio_irq_thread_abort);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='del'>-		ret = process_sdio_pending_irqs(host-&gt;card);</div><div class='add'>+		ret = process_sdio_pending_irqs(host);</div><div class='add'>+		host-&gt;sdio_irq_pending = false;</div><div class='ctx'> 		mmc_release_host(host);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='head'>diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig<br/>index 2bc06e7344db..aa131b32e3b2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/Kconfig</a></div><div class='hunk'>@@ -278,10 +278,13 @@ choice</div><div class='ctx'> 	  Choose which driver to use for the Atmel MCI Silicon</div><div class='ctx'> </div><div class='ctx'> config MMC_AT91</div><div class='del'>-	tristate "AT91 SD/MMC Card Interface support"</div><div class='add'>+	tristate "AT91 SD/MMC Card Interface support (DEPRECATED)"</div><div class='ctx'> 	depends on ARCH_AT91</div><div class='ctx'> 	help</div><div class='del'>-	  This selects the AT91 MCI controller.</div><div class='add'>+	  This selects the AT91 MCI controller. This driver will</div><div class='add'>+	  be removed soon (for more information have a look to</div><div class='add'>+	  Documentation/feature-removal-schedule.txt). Please use</div><div class='add'>+	  MMC_ATMEL_MCI.</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='hunk'>@@ -307,16 +310,6 @@ config MMC_ATMELMCI_DMA</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='del'>-config MMC_IMX</div><div class='del'>-	tristate "Motorola i.MX Multimedia Card Interface support"</div><div class='del'>-	depends on ARCH_MX1</div><div class='del'>-	help</div><div class='del'>-	  This selects the Motorola i.MX Multimedia card Interface.</div><div class='del'>-	  If you have a i.MX platform with a Multimedia Card slot,</div><div class='del'>-	  say Y or M here.</div><div class='del'>-</div><div class='del'>-	  If unsure, say N.</div><div class='del'>-</div><div class='ctx'> config MMC_MSM</div><div class='ctx'> 	tristate "Qualcomm SDCC Controller Support"</div><div class='ctx'> 	depends on MMC &amp;&amp; ARCH_MSM</div><div class='head'>diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile<br/>index 3e7e26d08073..8922b06be925 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/Makefile</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_MMC_ARMMMCI)	+= mmci.o</div><div class='ctx'> obj-$(CONFIG_MMC_PXA)		+= pxamci.o</div><div class='del'>-obj-$(CONFIG_MMC_IMX)		+= imxmmc.o</div><div class='ctx'> obj-$(CONFIG_MMC_MXC)		+= mxcmmc.o</div><div class='ctx'> obj-$(CONFIG_MMC_MXS)		+= mxs-mmc.o</div><div class='ctx'> obj-$(CONFIG_MMC_SDHCI)		+= sdhci.o</div><div class='head'>diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c<br/>index e94476beca18..420aca642b14 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/atmel-mci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/atmel-mci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/atmel-mci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/atmel-mci.c</a></div><div class='hunk'>@@ -45,19 +45,19 @@</div><div class='ctx'> #define ATMCI_DMA_THRESHOLD	16</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='del'>-	EVENT_CMD_COMPLETE = 0,</div><div class='add'>+	EVENT_CMD_RDY = 0,</div><div class='ctx'> 	EVENT_XFER_COMPLETE,</div><div class='del'>-	EVENT_DATA_COMPLETE,</div><div class='add'>+	EVENT_NOTBUSY,</div><div class='ctx'> 	EVENT_DATA_ERROR,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum atmel_mci_state {</div><div class='ctx'> 	STATE_IDLE = 0,</div><div class='ctx'> 	STATE_SENDING_CMD,</div><div class='del'>-	STATE_SENDING_DATA,</div><div class='del'>-	STATE_DATA_BUSY,</div><div class='add'>+	STATE_DATA_XFER,</div><div class='add'>+	STATE_WAITING_NOTBUSY,</div><div class='ctx'> 	STATE_SENDING_STOP,</div><div class='del'>-	STATE_DATA_ERROR,</div><div class='add'>+	STATE_END_REQUEST,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum atmci_xfer_dir {</div><div class='hunk'>@@ -78,6 +78,9 @@ struct atmel_mci_caps {</div><div class='ctx'> 	bool    has_highspeed;</div><div class='ctx'> 	bool    has_rwproof;</div><div class='ctx'> 	bool	has_odd_clk_div;</div><div class='add'>+	bool	has_bad_data_ordering;</div><div class='add'>+	bool	need_reset_after_xfer;</div><div class='add'>+	bool	need_blksz_mul_4;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct atmel_mci_dma {</div><div class='hunk'>@@ -91,6 +94,11 @@ struct atmel_mci_dma {</div><div class='ctx'>  * @regs: Pointer to MMIO registers.</div><div class='ctx'>  * @sg: Scatterlist entry currently being processed by PIO or PDC code.</div><div class='ctx'>  * @pio_offset: Offset into the current scatterlist entry.</div><div class='add'>+ * @buffer: Buffer used if we don't have the r/w proof capability. We</div><div class='add'>+ *      don't have the time to switch pdc buffers so we have to use only</div><div class='add'>+ *      one buffer for the full transaction.</div><div class='add'>+ * @buf_size: size of the buffer.</div><div class='add'>+ * @phys_buf_addr: buffer address needed for pdc.</div><div class='ctx'>  * @cur_slot: The slot which is currently using the controller.</div><div class='ctx'>  * @mrq: The request currently being processed on @cur_slot,</div><div class='ctx'>  *	or NULL if the controller is idle.</div><div class='hunk'>@@ -116,6 +124,7 @@ struct atmel_mci_dma {</div><div class='ctx'>  * @queue: List of slots waiting for access to the controller.</div><div class='ctx'>  * @need_clock_update: Update the clock rate before the next request.</div><div class='ctx'>  * @need_reset: Reset controller before next request.</div><div class='add'>+ * @timer: Timer to balance the data timeout error flag which cannot rise.</div><div class='ctx'>  * @mode_reg: Value of the MR register.</div><div class='ctx'>  * @cfg_reg: Value of the CFG register.</div><div class='ctx'>  * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus</div><div class='hunk'>@@ -166,6 +175,9 @@ struct atmel_mci {</div><div class='ctx'> </div><div class='ctx'> 	struct scatterlist	*sg;</div><div class='ctx'> 	unsigned int		pio_offset;</div><div class='add'>+	unsigned int		*buffer;</div><div class='add'>+	unsigned int		buf_size;</div><div class='add'>+	dma_addr_t		buf_phys_addr;</div><div class='ctx'> </div><div class='ctx'> 	struct atmel_mci_slot	*cur_slot;</div><div class='ctx'> 	struct mmc_request	*mrq;</div><div class='hunk'>@@ -189,6 +201,7 @@ struct atmel_mci {</div><div class='ctx'> </div><div class='ctx'> 	bool			need_clock_update;</div><div class='ctx'> 	bool			need_reset;</div><div class='add'>+	struct timer_list	timer;</div><div class='ctx'> 	u32			mode_reg;</div><div class='ctx'> 	u32			cfg_reg;</div><div class='ctx'> 	unsigned long		bus_hz;</div><div class='hunk'>@@ -480,6 +493,32 @@ err:</div><div class='ctx'> 	dev_err(&amp;mmc-&gt;class_dev, "failed to initialize debugfs for slot\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline unsigned int atmci_get_version(struct atmel_mci *host)</div><div class='add'>+{</div><div class='add'>+	return atmci_readl(host, ATMCI_VERSION) &amp; 0x00000fff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void atmci_timeout_timer(unsigned long data)</div><div class='add'>+{</div><div class='add'>+	struct atmel_mci *host;</div><div class='add'>+</div><div class='add'>+	host = (struct atmel_mci *)data;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;host-&gt;pdev-&gt;dev, "software timeout\n");</div><div class='add'>+</div><div class='add'>+	if (host-&gt;mrq-&gt;cmd-&gt;data) {</div><div class='add'>+		host-&gt;mrq-&gt;cmd-&gt;data-&gt;error = -ETIMEDOUT;</div><div class='add'>+		host-&gt;data = NULL;</div><div class='add'>+	} else {</div><div class='add'>+		host-&gt;mrq-&gt;cmd-&gt;error = -ETIMEDOUT;</div><div class='add'>+		host-&gt;cmd = NULL;</div><div class='add'>+	}</div><div class='add'>+	host-&gt;need_reset = 1;</div><div class='add'>+	host-&gt;state = STATE_END_REQUEST;</div><div class='add'>+	smp_wmb();</div><div class='add'>+	tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host,</div><div class='ctx'> 					unsigned int ns)</div><div class='ctx'> {</div><div class='hunk'>@@ -591,6 +630,7 @@ static void atmci_send_command(struct atmel_mci *host,</div><div class='ctx'> </div><div class='ctx'> static void atmci_send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)</div><div class='ctx'> {</div><div class='add'>+	dev_dbg(&amp;host-&gt;pdev-&gt;dev, "send stop command\n");</div><div class='ctx'> 	atmci_send_command(host, data-&gt;stop, host-&gt;stop_cmdr);</div><div class='ctx'> 	atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY);</div><div class='ctx'> }</div><div class='hunk'>@@ -603,6 +643,7 @@ static void atmci_pdc_set_single_buf(struct atmel_mci *host,</div><div class='ctx'> 	enum atmci_xfer_dir dir, enum atmci_pdc_buf buf_nb)</div><div class='ctx'> {</div><div class='ctx'> 	u32 pointer_reg, counter_reg;</div><div class='add'>+	unsigned int buf_size;</div><div class='ctx'> </div><div class='ctx'> 	if (dir == XFER_RECEIVE) {</div><div class='ctx'> 		pointer_reg = ATMEL_PDC_RPR;</div><div class='hunk'>@@ -617,8 +658,15 @@ static void atmci_pdc_set_single_buf(struct atmel_mci *host,</div><div class='ctx'> 		counter_reg += ATMEL_PDC_SCND_BUF_OFF;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	atmci_writel(host, pointer_reg, sg_dma_address(host-&gt;sg));</div><div class='del'>-	if (host-&gt;data_size &lt;= sg_dma_len(host-&gt;sg)) {</div><div class='add'>+	if (!host-&gt;caps.has_rwproof) {</div><div class='add'>+		buf_size = host-&gt;buf_size;</div><div class='add'>+		atmci_writel(host, pointer_reg, host-&gt;buf_phys_addr);</div><div class='add'>+	} else {</div><div class='add'>+		buf_size = sg_dma_len(host-&gt;sg);</div><div class='add'>+		atmci_writel(host, pointer_reg, sg_dma_address(host-&gt;sg));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (host-&gt;data_size &lt;= buf_size) {</div><div class='ctx'> 		if (host-&gt;data_size &amp; 0x3) {</div><div class='ctx'> 			/* If size is different from modulo 4, transfer bytes */</div><div class='ctx'> 			atmci_writel(host, counter_reg, host-&gt;data_size);</div><div class='hunk'>@@ -670,7 +718,20 @@ static void atmci_pdc_cleanup(struct atmel_mci *host)</div><div class='ctx'>  */</div><div class='ctx'> static void atmci_pdc_complete(struct atmel_mci *host)</div><div class='ctx'> {</div><div class='add'>+	int transfer_size = host-&gt;data-&gt;blocks * host-&gt;data-&gt;blksz;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='ctx'> 	atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);</div><div class='add'>+</div><div class='add'>+	if ((!host-&gt;caps.has_rwproof)</div><div class='add'>+	    &amp;&amp; (host-&gt;data-&gt;flags &amp; MMC_DATA_READ)) {</div><div class='add'>+		if (host-&gt;caps.has_bad_data_ordering)</div><div class='add'>+			for (i = 0; i &lt; transfer_size; i++)</div><div class='add'>+				host-&gt;buffer[i] = swab32(host-&gt;buffer[i]);</div><div class='add'>+		sg_copy_from_buffer(host-&gt;data-&gt;sg, host-&gt;data-&gt;sg_len,</div><div class='add'>+		                    host-&gt;buffer, transfer_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	atmci_pdc_cleanup(host);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -678,9 +739,10 @@ static void atmci_pdc_complete(struct atmel_mci *host)</div><div class='ctx'> 	 * to send the stop command or waiting for NBUSY in this case.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (host-&gt;data) {</div><div class='add'>+		dev_dbg(&amp;host-&gt;pdev-&gt;dev,</div><div class='add'>+		        "(%s) set pending xfer complete\n", __func__);</div><div class='ctx'> 		atmci_set_pending(host, EVENT_XFER_COMPLETE);</div><div class='ctx'> 		tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='del'>-		atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -716,6 +778,8 @@ static void atmci_dma_complete(void *arg)</div><div class='ctx'> 	 * to send the stop command or waiting for NBUSY in this case.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (data) {</div><div class='add'>+		dev_dbg(&amp;host-&gt;pdev-&gt;dev,</div><div class='add'>+		        "(%s) set pending xfer complete\n", __func__);</div><div class='ctx'> 		atmci_set_pending(host, EVENT_XFER_COMPLETE);</div><div class='ctx'> 		tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='ctx'> </div><div class='hunk'>@@ -791,6 +855,7 @@ atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data)</div><div class='ctx'> 	u32 iflags, tmp;</div><div class='ctx'> 	unsigned int sg_len;</div><div class='ctx'> 	enum dma_data_direction dir;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	data-&gt;error = -EINPROGRESS;</div><div class='ctx'> </div><div class='hunk'>@@ -806,7 +871,7 @@ atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data)</div><div class='ctx'> 		iflags |= ATMCI_ENDRX | ATMCI_RXBUFF;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dir = DMA_TO_DEVICE;</div><div class='del'>-		iflags |= ATMCI_ENDTX | ATMCI_TXBUFE;</div><div class='add'>+		iflags |= ATMCI_ENDTX | ATMCI_TXBUFE | ATMCI_BLKE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set BLKLEN */</div><div class='hunk'>@@ -818,6 +883,16 @@ atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data)</div><div class='ctx'> 	/* Configure PDC */</div><div class='ctx'> 	host-&gt;data_size = data-&gt;blocks * data-&gt;blksz;</div><div class='ctx'> 	sg_len = dma_map_sg(&amp;host-&gt;pdev-&gt;dev, data-&gt;sg, data-&gt;sg_len, dir);</div><div class='add'>+</div><div class='add'>+	if ((!host-&gt;caps.has_rwproof)</div><div class='add'>+	    &amp;&amp; (host-&gt;data-&gt;flags &amp; MMC_DATA_WRITE)) {</div><div class='add'>+		sg_copy_to_buffer(host-&gt;data-&gt;sg, host-&gt;data-&gt;sg_len,</div><div class='add'>+		                  host-&gt;buffer, host-&gt;data_size);</div><div class='add'>+		if (host-&gt;caps.has_bad_data_ordering)</div><div class='add'>+			for (i = 0; i &lt; host-&gt;data_size; i++)</div><div class='add'>+				host-&gt;buffer[i] = swab32(host-&gt;buffer[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (host-&gt;data_size)</div><div class='ctx'> 		atmci_pdc_set_both_buf(host,</div><div class='ctx'> 			((dir == DMA_FROM_DEVICE) ? XFER_RECEIVE : XFER_TRANSMIT));</div><div class='hunk'>@@ -931,6 +1006,8 @@ atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)</div><div class='ctx'> </div><div class='ctx'> static void atmci_stop_transfer(struct atmel_mci *host)</div><div class='ctx'> {</div><div class='add'>+	dev_dbg(&amp;host-&gt;pdev-&gt;dev,</div><div class='add'>+	        "(%s) set pending xfer complete\n", __func__);</div><div class='ctx'> 	atmci_set_pending(host, EVENT_XFER_COMPLETE);</div><div class='ctx'> 	atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);</div><div class='ctx'> }</div><div class='hunk'>@@ -940,8 +1017,7 @@ static void atmci_stop_transfer(struct atmel_mci *host)</div><div class='ctx'>  */</div><div class='ctx'> static void atmci_stop_transfer_pdc(struct atmel_mci *host)</div><div class='ctx'> {</div><div class='del'>-	atmci_set_pending(host, EVENT_XFER_COMPLETE);</div><div class='del'>-	atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);</div><div class='add'>+	atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void atmci_stop_transfer_dma(struct atmel_mci *host)</div><div class='hunk'>@@ -953,6 +1029,8 @@ static void atmci_stop_transfer_dma(struct atmel_mci *host)</div><div class='ctx'> 		atmci_dma_cleanup(host);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Data transfer was stopped by the interrupt handler */</div><div class='add'>+		dev_dbg(&amp;host-&gt;pdev-&gt;dev,</div><div class='add'>+		        "(%s) set pending xfer complete\n", __func__);</div><div class='ctx'> 		atmci_set_pending(host, EVENT_XFER_COMPLETE);</div><div class='ctx'> 		atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -977,9 +1055,12 @@ static void atmci_start_request(struct atmel_mci *host,</div><div class='ctx'> </div><div class='ctx'> 	host-&gt;pending_events = 0;</div><div class='ctx'> 	host-&gt;completed_events = 0;</div><div class='add'>+	host-&gt;cmd_status = 0;</div><div class='ctx'> 	host-&gt;data_status = 0;</div><div class='ctx'> </div><div class='del'>-	if (host-&gt;need_reset) {</div><div class='add'>+	dev_dbg(&amp;host-&gt;pdev-&gt;dev, "start request: cmd %u\n", mrq-&gt;cmd-&gt;opcode);</div><div class='add'>+</div><div class='add'>+	if (host-&gt;need_reset || host-&gt;caps.need_reset_after_xfer) {</div><div class='ctx'> 		iflags = atmci_readl(host, ATMCI_IMR);</div><div class='ctx'> 		iflags &amp;= (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB);</div><div class='ctx'> 		atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);</div><div class='hunk'>@@ -994,7 +1075,7 @@ static void atmci_start_request(struct atmel_mci *host,</div><div class='ctx'> </div><div class='ctx'> 	iflags = atmci_readl(host, ATMCI_IMR);</div><div class='ctx'> 	if (iflags &amp; ~(ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))</div><div class='del'>-		dev_warn(&amp;slot-&gt;mmc-&gt;class_dev, "WARNING: IMR=0x%08x\n",</div><div class='add'>+		dev_dbg(&amp;slot-&gt;mmc-&gt;class_dev, "WARNING: IMR=0x%08x\n",</div><div class='ctx'> 				iflags);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &amp;slot-&gt;flags))) {</div><div class='hunk'>@@ -1043,6 +1124,8 @@ static void atmci_start_request(struct atmel_mci *host,</div><div class='ctx'> 	 * prepared yet.)</div><div class='ctx'> 	 */</div><div class='ctx'> 	atmci_writel(host, ATMCI_IER, iflags);</div><div class='add'>+</div><div class='add'>+	mod_timer(&amp;host-&gt;timer, jiffies +  msecs_to_jiffies(2000));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void atmci_queue_request(struct atmel_mci *host,</div><div class='hunk'>@@ -1057,6 +1140,7 @@ static void atmci_queue_request(struct atmel_mci *host,</div><div class='ctx'> 		host-&gt;state = STATE_SENDING_CMD;</div><div class='ctx'> 		atmci_start_request(host, slot);</div><div class='ctx'> 	} else {</div><div class='add'>+		dev_dbg(&amp;host-&gt;pdev-&gt;dev, "queue request\n");</div><div class='ctx'> 		list_add_tail(&amp;slot-&gt;queue_node, &amp;host-&gt;queue);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_bh(&amp;host-&gt;lock);</div><div class='hunk'>@@ -1069,6 +1153,7 @@ static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)</div><div class='ctx'> 	struct mmc_data		*data;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(slot-&gt;mrq);</div><div class='add'>+	dev_dbg(&amp;host-&gt;pdev-&gt;dev, "MRQ: cmd %u\n", mrq-&gt;cmd-&gt;opcode);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We may "know" the card is gone even though there's still an</div><div class='hunk'>@@ -1308,6 +1393,8 @@ static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)</div><div class='ctx'> 		host-&gt;state = STATE_IDLE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	del_timer(&amp;host-&gt;timer);</div><div class='add'>+</div><div class='ctx'> 	spin_unlock(&amp;host-&gt;lock);</div><div class='ctx'> 	mmc_request_done(prev_mmc, mrq);</div><div class='ctx'> 	spin_lock(&amp;host-&gt;lock);</div><div class='hunk'>@@ -1330,21 +1417,13 @@ static void atmci_command_complete(struct atmel_mci *host,</div><div class='ctx'> 		cmd-&gt;error = -EILSEQ;</div><div class='ctx'> 	else if (status &amp; (ATMCI_RINDE | ATMCI_RDIRE | ATMCI_RENDE))</div><div class='ctx'> 		cmd-&gt;error = -EIO;</div><div class='del'>-	else</div><div class='del'>-		cmd-&gt;error = 0;</div><div class='del'>-</div><div class='del'>-	if (cmd-&gt;error) {</div><div class='del'>-		dev_dbg(&amp;host-&gt;pdev-&gt;dev,</div><div class='del'>-			"command error: status=0x%08x\n", status);</div><div class='del'>-</div><div class='del'>-		if (cmd-&gt;data) {</div><div class='del'>-			host-&gt;stop_transfer(host);</div><div class='del'>-			host-&gt;data = NULL;</div><div class='del'>-			atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY</div><div class='del'>-					| ATMCI_TXRDY | ATMCI_RXRDY</div><div class='del'>-					| ATMCI_DATA_ERROR_FLAGS);</div><div class='add'>+	else if (host-&gt;mrq-&gt;data &amp;&amp; (host-&gt;mrq-&gt;data-&gt;blksz &amp; 3)) {</div><div class='add'>+		if (host-&gt;caps.need_blksz_mul_4) {</div><div class='add'>+			cmd-&gt;error = -EINVAL;</div><div class='add'>+			host-&gt;need_reset = 1;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='add'>+	} else</div><div class='add'>+		cmd-&gt;error = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void atmci_detect_change(unsigned long data)</div><div class='hunk'>@@ -1407,23 +1486,21 @@ static void atmci_detect_change(unsigned long data)</div><div class='ctx'> 					break;</div><div class='ctx'> 				case STATE_SENDING_CMD:</div><div class='ctx'> 					mrq-&gt;cmd-&gt;error = -ENOMEDIUM;</div><div class='del'>-					if (!mrq-&gt;data)</div><div class='del'>-						break;</div><div class='del'>-					/* fall through */</div><div class='del'>-				case STATE_SENDING_DATA:</div><div class='add'>+					if (mrq-&gt;data)</div><div class='add'>+						host-&gt;stop_transfer(host);</div><div class='add'>+					break;</div><div class='add'>+				case STATE_DATA_XFER:</div><div class='ctx'> 					mrq-&gt;data-&gt;error = -ENOMEDIUM;</div><div class='ctx'> 					host-&gt;stop_transfer(host);</div><div class='ctx'> 					break;</div><div class='del'>-				case STATE_DATA_BUSY:</div><div class='del'>-				case STATE_DATA_ERROR:</div><div class='del'>-					if (mrq-&gt;data-&gt;error == -EINPROGRESS)</div><div class='del'>-						mrq-&gt;data-&gt;error = -ENOMEDIUM;</div><div class='del'>-					if (!mrq-&gt;stop)</div><div class='del'>-						break;</div><div class='del'>-					/* fall through */</div><div class='add'>+				case STATE_WAITING_NOTBUSY:</div><div class='add'>+					mrq-&gt;data-&gt;error = -ENOMEDIUM;</div><div class='add'>+					break;</div><div class='ctx'> 				case STATE_SENDING_STOP:</div><div class='ctx'> 					mrq-&gt;stop-&gt;error = -ENOMEDIUM;</div><div class='ctx'> 					break;</div><div class='add'>+				case STATE_END_REQUEST:</div><div class='add'>+					break;</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				atmci_request_end(host, mrq);</div><div class='hunk'>@@ -1451,7 +1528,6 @@ static void atmci_tasklet_func(unsigned long priv)</div><div class='ctx'> 	struct atmel_mci	*host = (struct atmel_mci *)priv;</div><div class='ctx'> 	struct mmc_request	*mrq = host-&gt;mrq;</div><div class='ctx'> 	struct mmc_data		*data = host-&gt;data;</div><div class='del'>-	struct mmc_command	*cmd = host-&gt;cmd;</div><div class='ctx'> 	enum atmel_mci_state	state = host-&gt;state;</div><div class='ctx'> 	enum atmel_mci_state	prev_state;</div><div class='ctx'> 	u32			status;</div><div class='hunk'>@@ -1467,107 +1543,186 @@ static void atmci_tasklet_func(unsigned long priv)</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		prev_state = state;</div><div class='add'>+		dev_dbg(&amp;host-&gt;pdev-&gt;dev, "FSM: state=%d\n", state);</div><div class='ctx'> </div><div class='ctx'> 		switch (state) {</div><div class='ctx'> 		case STATE_IDLE:</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case STATE_SENDING_CMD:</div><div class='add'>+			/*</div><div class='add'>+			 * Command has been sent, we are waiting for command</div><div class='add'>+			 * ready. Then we have three next states possible:</div><div class='add'>+			 * END_REQUEST by default, WAITING_NOTBUSY if it's a</div><div class='add'>+			 * command needing it or DATA_XFER if there is data.</div><div class='add'>+			 */</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "FSM: cmd ready?\n");</div><div class='ctx'> 			if (!atmci_test_and_clear_pending(host,</div><div class='del'>-						EVENT_CMD_COMPLETE))</div><div class='add'>+						EVENT_CMD_RDY))</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "set completed cmd ready\n");</div><div class='ctx'> 			host-&gt;cmd = NULL;</div><div class='del'>-			atmci_set_completed(host, EVENT_CMD_COMPLETE);</div><div class='add'>+			atmci_set_completed(host, EVENT_CMD_RDY);</div><div class='ctx'> 			atmci_command_complete(host, mrq-&gt;cmd);</div><div class='del'>-			if (!mrq-&gt;data || cmd-&gt;error) {</div><div class='del'>-				atmci_request_end(host, host-&gt;mrq);</div><div class='del'>-				goto unlock;</div><div class='del'>-			}</div><div class='add'>+			if (mrq-&gt;data) {</div><div class='add'>+				dev_dbg(&amp;host-&gt;pdev-&gt;dev,</div><div class='add'>+				        "command with data transfer");</div><div class='add'>+				/*</div><div class='add'>+				 * If there is a command error don't start</div><div class='add'>+				 * data transfer.</div><div class='add'>+				 */</div><div class='add'>+				if (mrq-&gt;cmd-&gt;error) {</div><div class='add'>+					host-&gt;stop_transfer(host);</div><div class='add'>+					host-&gt;data = NULL;</div><div class='add'>+					atmci_writel(host, ATMCI_IDR,</div><div class='add'>+					             ATMCI_TXRDY | ATMCI_RXRDY</div><div class='add'>+					             | ATMCI_DATA_ERROR_FLAGS);</div><div class='add'>+					state = STATE_END_REQUEST;</div><div class='add'>+				} else</div><div class='add'>+					state = STATE_DATA_XFER;</div><div class='add'>+			} else if ((!mrq-&gt;data) &amp;&amp; (mrq-&gt;cmd-&gt;flags &amp; MMC_RSP_BUSY)) {</div><div class='add'>+				dev_dbg(&amp;host-&gt;pdev-&gt;dev,</div><div class='add'>+				        "command response need waiting notbusy");</div><div class='add'>+				atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);</div><div class='add'>+				state = STATE_WAITING_NOTBUSY;</div><div class='add'>+			} else</div><div class='add'>+				state = STATE_END_REQUEST;</div><div class='ctx'> </div><div class='del'>-			prev_state = state = STATE_SENDING_DATA;</div><div class='del'>-			/* fall through */</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-		case STATE_SENDING_DATA:</div><div class='add'>+		case STATE_DATA_XFER:</div><div class='ctx'> 			if (atmci_test_and_clear_pending(host,</div><div class='ctx'> 						EVENT_DATA_ERROR)) {</div><div class='del'>-				host-&gt;stop_transfer(host);</div><div class='del'>-				if (data-&gt;stop)</div><div class='del'>-					atmci_send_stop_cmd(host, data);</div><div class='del'>-				state = STATE_DATA_ERROR;</div><div class='add'>+				dev_dbg(&amp;host-&gt;pdev-&gt;dev, "set completed data error\n");</div><div class='add'>+				atmci_set_completed(host, EVENT_DATA_ERROR);</div><div class='add'>+				state = STATE_END_REQUEST;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='add'>+			/*</div><div class='add'>+			 * A data transfer is in progress. The event expected</div><div class='add'>+			 * to move to the next state depends of data transfer</div><div class='add'>+			 * type (PDC or DMA). Once transfer done we can move</div><div class='add'>+			 * to the next step which is WAITING_NOTBUSY in write</div><div class='add'>+			 * case and directly SENDING_STOP in read case.</div><div class='add'>+			 */</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "FSM: xfer complete?\n");</div><div class='ctx'> 			if (!atmci_test_and_clear_pending(host,</div><div class='ctx'> 						EVENT_XFER_COMPLETE))</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev,</div><div class='add'>+			        "(%s) set completed xfer complete\n",</div><div class='add'>+				__func__);</div><div class='ctx'> 			atmci_set_completed(host, EVENT_XFER_COMPLETE);</div><div class='del'>-			prev_state = state = STATE_DATA_BUSY;</div><div class='del'>-			/* fall through */</div><div class='ctx'> </div><div class='del'>-		case STATE_DATA_BUSY:</div><div class='del'>-			if (!atmci_test_and_clear_pending(host,</div><div class='del'>-						EVENT_DATA_COMPLETE))</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			host-&gt;data = NULL;</div><div class='del'>-			atmci_set_completed(host, EVENT_DATA_COMPLETE);</div><div class='del'>-			status = host-&gt;data_status;</div><div class='del'>-			if (unlikely(status &amp; ATMCI_DATA_ERROR_FLAGS)) {</div><div class='del'>-				if (status &amp; ATMCI_DTOE) {</div><div class='del'>-					dev_dbg(&amp;host-&gt;pdev-&gt;dev,</div><div class='del'>-							"data timeout error\n");</div><div class='del'>-					data-&gt;error = -ETIMEDOUT;</div><div class='del'>-				} else if (status &amp; ATMCI_DCRCE) {</div><div class='del'>-					dev_dbg(&amp;host-&gt;pdev-&gt;dev,</div><div class='del'>-							"data CRC error\n");</div><div class='del'>-					data-&gt;error = -EILSEQ;</div><div class='del'>-				} else {</div><div class='del'>-					dev_dbg(&amp;host-&gt;pdev-&gt;dev,</div><div class='del'>-						"data FIFO error (status=%08x)\n",</div><div class='del'>-						status);</div><div class='del'>-					data-&gt;error = -EIO;</div><div class='del'>-				}</div><div class='add'>+			if (host-&gt;data-&gt;flags &amp; MMC_DATA_WRITE) {</div><div class='add'>+				atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);</div><div class='add'>+				state = STATE_WAITING_NOTBUSY;</div><div class='add'>+			} else if (host-&gt;mrq-&gt;stop) {</div><div class='add'>+				atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY);</div><div class='add'>+				atmci_send_stop_cmd(host, data);</div><div class='add'>+				state = STATE_SENDING_STOP;</div><div class='ctx'> 			} else {</div><div class='add'>+				host-&gt;data = NULL;</div><div class='ctx'> 				data-&gt;bytes_xfered = data-&gt;blocks * data-&gt;blksz;</div><div class='ctx'> 				data-&gt;error = 0;</div><div class='del'>-				atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS);</div><div class='add'>+				state = STATE_END_REQUEST;</div><div class='ctx'> 			}</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-			if (!data-&gt;stop) {</div><div class='del'>-				atmci_request_end(host, host-&gt;mrq);</div><div class='del'>-				goto unlock;</div><div class='del'>-			}</div><div class='add'>+		case STATE_WAITING_NOTBUSY:</div><div class='add'>+			/*</div><div class='add'>+			 * We can be in the state for two reasons: a command</div><div class='add'>+			 * requiring waiting not busy signal (stop command</div><div class='add'>+			 * included) or a write operation. In the latest case,</div><div class='add'>+			 * we need to send a stop command.</div><div class='add'>+			 */</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "FSM: not busy?\n");</div><div class='add'>+			if (!atmci_test_and_clear_pending(host,</div><div class='add'>+						EVENT_NOTBUSY))</div><div class='add'>+				break;</div><div class='ctx'> </div><div class='del'>-			prev_state = state = STATE_SENDING_STOP;</div><div class='del'>-			if (!data-&gt;error)</div><div class='del'>-				atmci_send_stop_cmd(host, data);</div><div class='del'>-			/* fall through */</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "set completed not busy\n");</div><div class='add'>+			atmci_set_completed(host, EVENT_NOTBUSY);</div><div class='add'>+</div><div class='add'>+			if (host-&gt;data) {</div><div class='add'>+				/*</div><div class='add'>+				 * For some commands such as CMD53, even if</div><div class='add'>+				 * there is data transfer, there is no stop</div><div class='add'>+				 * command to send.</div><div class='add'>+				 */</div><div class='add'>+				if (host-&gt;mrq-&gt;stop) {</div><div class='add'>+					atmci_writel(host, ATMCI_IER,</div><div class='add'>+					             ATMCI_CMDRDY);</div><div class='add'>+					atmci_send_stop_cmd(host, data);</div><div class='add'>+					state = STATE_SENDING_STOP;</div><div class='add'>+				} else {</div><div class='add'>+					host-&gt;data = NULL;</div><div class='add'>+					data-&gt;bytes_xfered = data-&gt;blocks</div><div class='add'>+					                     * data-&gt;blksz;</div><div class='add'>+					data-&gt;error = 0;</div><div class='add'>+					state = STATE_END_REQUEST;</div><div class='add'>+				}</div><div class='add'>+			} else</div><div class='add'>+				state = STATE_END_REQUEST;</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='ctx'> 		case STATE_SENDING_STOP:</div><div class='add'>+			/*</div><div class='add'>+			 * In this state, it is important to set host-&gt;data to</div><div class='add'>+			 * NULL (which is tested in the waiting notbusy state)</div><div class='add'>+			 * in order to go to the end request state instead of</div><div class='add'>+			 * sending stop again.</div><div class='add'>+			 */</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "FSM: cmd ready?\n");</div><div class='ctx'> 			if (!atmci_test_and_clear_pending(host,</div><div class='del'>-						EVENT_CMD_COMPLETE))</div><div class='add'>+						EVENT_CMD_RDY))</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "FSM: cmd ready\n");</div><div class='ctx'> 			host-&gt;cmd = NULL;</div><div class='add'>+			host-&gt;data = NULL;</div><div class='add'>+			data-&gt;bytes_xfered = data-&gt;blocks * data-&gt;blksz;</div><div class='add'>+			data-&gt;error = 0;</div><div class='ctx'> 			atmci_command_complete(host, mrq-&gt;stop);</div><div class='del'>-			atmci_request_end(host, host-&gt;mrq);</div><div class='del'>-			goto unlock;</div><div class='add'>+			if (mrq-&gt;stop-&gt;error) {</div><div class='add'>+				host-&gt;stop_transfer(host);</div><div class='add'>+				atmci_writel(host, ATMCI_IDR,</div><div class='add'>+				             ATMCI_TXRDY | ATMCI_RXRDY</div><div class='add'>+				             | ATMCI_DATA_ERROR_FLAGS);</div><div class='add'>+				state = STATE_END_REQUEST;</div><div class='add'>+			} else {</div><div class='add'>+				atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);</div><div class='add'>+				state = STATE_WAITING_NOTBUSY;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-		case STATE_DATA_ERROR:</div><div class='del'>-			if (!atmci_test_and_clear_pending(host,</div><div class='del'>-						EVENT_XFER_COMPLETE))</div><div class='del'>-				break;</div><div class='add'>+		case STATE_END_REQUEST:</div><div class='add'>+			atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY | ATMCI_RXRDY</div><div class='add'>+			                   | ATMCI_DATA_ERROR_FLAGS);</div><div class='add'>+			status = host-&gt;data_status;</div><div class='add'>+			if (unlikely(status)) {</div><div class='add'>+				host-&gt;stop_transfer(host);</div><div class='add'>+				host-&gt;data = NULL;</div><div class='add'>+				if (status &amp; ATMCI_DTOE) {</div><div class='add'>+					data-&gt;error = -ETIMEDOUT;</div><div class='add'>+				} else if (status &amp; ATMCI_DCRCE) {</div><div class='add'>+					data-&gt;error = -EILSEQ;</div><div class='add'>+				} else {</div><div class='add'>+					data-&gt;error = -EIO;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-			state = STATE_DATA_BUSY;</div><div class='add'>+			atmci_request_end(host, host-&gt;mrq);</div><div class='add'>+			state = STATE_IDLE;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	} while (state != prev_state);</div><div class='ctx'> </div><div class='ctx'> 	host-&gt;state = state;</div><div class='ctx'> </div><div class='del'>-unlock:</div><div class='ctx'> 	spin_unlock(&amp;host-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1620,9 +1775,6 @@ static void atmci_read_data_pio(struct atmel_mci *host)</div><div class='ctx'> 						| ATMCI_DATA_ERROR_FLAGS));</div><div class='ctx'> 			host-&gt;data_status = status;</div><div class='ctx'> 			data-&gt;bytes_xfered += nbytes;</div><div class='del'>-			smp_wmb();</div><div class='del'>-			atmci_set_pending(host, EVENT_DATA_ERROR);</div><div class='del'>-			tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	} while (status &amp; ATMCI_RXRDY);</div><div class='hunk'>@@ -1691,9 +1843,6 @@ static void atmci_write_data_pio(struct atmel_mci *host)</div><div class='ctx'> 						| ATMCI_DATA_ERROR_FLAGS));</div><div class='ctx'> 			host-&gt;data_status = status;</div><div class='ctx'> 			data-&gt;bytes_xfered += nbytes;</div><div class='del'>-			smp_wmb();</div><div class='del'>-			atmci_set_pending(host, EVENT_DATA_ERROR);</div><div class='del'>-			tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	} while (status &amp; ATMCI_TXRDY);</div><div class='hunk'>@@ -1711,16 +1860,6 @@ done:</div><div class='ctx'> 	atmci_set_pending(host, EVENT_XFER_COMPLETE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)</div><div class='del'>-{</div><div class='del'>-	atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY);</div><div class='del'>-</div><div class='del'>-	host-&gt;cmd_status = status;</div><div class='del'>-	smp_wmb();</div><div class='del'>-	atmci_set_pending(host, EVENT_CMD_COMPLETE);</div><div class='del'>-	tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status)</div><div class='ctx'> {</div><div class='ctx'> 	int	i;</div><div class='hunk'>@@ -1748,17 +1887,21 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		if (pending &amp; ATMCI_DATA_ERROR_FLAGS) {</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "IRQ: data error\n");</div><div class='ctx'> 			atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS</div><div class='del'>-					| ATMCI_RXRDY | ATMCI_TXRDY);</div><div class='del'>-			pending &amp;= atmci_readl(host, ATMCI_IMR);</div><div class='add'>+					| ATMCI_RXRDY | ATMCI_TXRDY</div><div class='add'>+					| ATMCI_ENDRX | ATMCI_ENDTX</div><div class='add'>+					| ATMCI_RXBUFF | ATMCI_TXBUFE);</div><div class='ctx'> </div><div class='ctx'> 			host-&gt;data_status = status;</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "set pending data error\n");</div><div class='ctx'> 			smp_wmb();</div><div class='ctx'> 			atmci_set_pending(host, EVENT_DATA_ERROR);</div><div class='ctx'> 			tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (pending &amp; ATMCI_TXBUFE) {</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "IRQ: tx buffer empty\n");</div><div class='ctx'> 			atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE);</div><div class='ctx'> 			atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);</div><div class='ctx'> 			/*</div><div class='hunk'>@@ -1774,6 +1917,7 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id)</div><div class='ctx'> 				atmci_pdc_complete(host);</div><div class='ctx'> 			}</div><div class='ctx'> 		} else if (pending &amp; ATMCI_ENDTX) {</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "IRQ: end of tx buffer\n");</div><div class='ctx'> 			atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);</div><div class='ctx'> </div><div class='ctx'> 			if (host-&gt;data_size) {</div><div class='hunk'>@@ -1784,6 +1928,7 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (pending &amp; ATMCI_RXBUFF) {</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "IRQ: rx buffer full\n");</div><div class='ctx'> 			atmci_writel(host, ATMCI_IDR, ATMCI_RXBUFF);</div><div class='ctx'> 			atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX);</div><div class='ctx'> 			/*</div><div class='hunk'>@@ -1799,6 +1944,7 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id)</div><div class='ctx'> 				atmci_pdc_complete(host);</div><div class='ctx'> 			}</div><div class='ctx'> 		} else if (pending &amp; ATMCI_ENDRX) {</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "IRQ: end of rx buffer\n");</div><div class='ctx'> 			atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX);</div><div class='ctx'> </div><div class='ctx'> 			if (host-&gt;data_size) {</div><div class='hunk'>@@ -1808,23 +1954,44 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * First mci IPs, so mainly the ones having pdc, have some</div><div class='add'>+		 * issues with the notbusy signal. You can't get it after</div><div class='add'>+		 * data transmission if you have not sent a stop command.</div><div class='add'>+		 * The appropriate workaround is to use the BLKE signal.</div><div class='add'>+		 */</div><div class='add'>+		if (pending &amp; ATMCI_BLKE) {</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "IRQ: blke\n");</div><div class='add'>+			atmci_writel(host, ATMCI_IDR, ATMCI_BLKE);</div><div class='add'>+			smp_wmb();</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "set pending notbusy\n");</div><div class='add'>+			atmci_set_pending(host, EVENT_NOTBUSY);</div><div class='add'>+			tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if (pending &amp; ATMCI_NOTBUSY) {</div><div class='del'>-			atmci_writel(host, ATMCI_IDR,</div><div class='del'>-					ATMCI_DATA_ERROR_FLAGS | ATMCI_NOTBUSY);</div><div class='del'>-			if (!host-&gt;data_status)</div><div class='del'>-				host-&gt;data_status = status;</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "IRQ: not_busy\n");</div><div class='add'>+			atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY);</div><div class='ctx'> 			smp_wmb();</div><div class='del'>-			atmci_set_pending(host, EVENT_DATA_COMPLETE);</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "set pending notbusy\n");</div><div class='add'>+			atmci_set_pending(host, EVENT_NOTBUSY);</div><div class='ctx'> 			tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		if (pending &amp; ATMCI_RXRDY)</div><div class='ctx'> 			atmci_read_data_pio(host);</div><div class='ctx'> 		if (pending &amp; ATMCI_TXRDY)</div><div class='ctx'> 			atmci_write_data_pio(host);</div><div class='ctx'> </div><div class='del'>-		if (pending &amp; ATMCI_CMDRDY)</div><div class='del'>-			atmci_cmd_interrupt(host, status);</div><div class='add'>+		if (pending &amp; ATMCI_CMDRDY) {</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "IRQ: cmd ready\n");</div><div class='add'>+			atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY);</div><div class='add'>+			host-&gt;cmd_status = status;</div><div class='add'>+			smp_wmb();</div><div class='add'>+			dev_dbg(&amp;host-&gt;pdev-&gt;dev, "set pending cmd rdy\n");</div><div class='add'>+			atmci_set_pending(host, EVENT_CMD_RDY);</div><div class='add'>+			tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if (pending &amp; (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))</div><div class='ctx'> 			atmci_sdio_interrupt(host, status);</div><div class='hunk'>@@ -1877,13 +2044,26 @@ static int __init atmci_init_slot(struct atmel_mci *host,</div><div class='ctx'> 		mmc-&gt;caps |= MMC_CAP_SDIO_IRQ;</div><div class='ctx'> 	if (host-&gt;caps.has_highspeed)</div><div class='ctx'> 		mmc-&gt;caps |= MMC_CAP_SD_HIGHSPEED;</div><div class='del'>-	if (slot_data-&gt;bus_width &gt;= 4)</div><div class='add'>+	/*</div><div class='add'>+	 * Without the read/write proof capability, it is strongly suggested to</div><div class='add'>+	 * use only one bit for data to prevent fifo underruns and overruns</div><div class='add'>+	 * which will corrupt data.</div><div class='add'>+	 */</div><div class='add'>+	if ((slot_data-&gt;bus_width &gt;= 4) &amp;&amp; host-&gt;caps.has_rwproof)</div><div class='ctx'> 		mmc-&gt;caps |= MMC_CAP_4_BIT_DATA;</div><div class='ctx'> </div><div class='del'>-	mmc-&gt;max_segs = 64;</div><div class='del'>-	mmc-&gt;max_req_size = 32768 * 512;</div><div class='del'>-	mmc-&gt;max_blk_size = 32768;</div><div class='del'>-	mmc-&gt;max_blk_count = 512;</div><div class='add'>+	if (atmci_get_version(host) &lt; 0x200) {</div><div class='add'>+		mmc-&gt;max_segs = 256;</div><div class='add'>+		mmc-&gt;max_blk_size = 4095;</div><div class='add'>+		mmc-&gt;max_blk_count = 256;</div><div class='add'>+		mmc-&gt;max_req_size = mmc-&gt;max_blk_size * mmc-&gt;max_blk_count;</div><div class='add'>+		mmc-&gt;max_seg_size = mmc-&gt;max_blk_size * mmc-&gt;max_segs;</div><div class='add'>+	} else {</div><div class='add'>+		mmc-&gt;max_segs = 64;</div><div class='add'>+		mmc-&gt;max_req_size = 32768 * 512;</div><div class='add'>+		mmc-&gt;max_blk_size = 32768;</div><div class='add'>+		mmc-&gt;max_blk_count = 512;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Assume card is present initially */</div><div class='ctx'> 	set_bit(ATMCI_CARD_PRESENT, &amp;slot-&gt;flags);</div><div class='hunk'>@@ -2007,11 +2187,6 @@ static bool atmci_configure_dma(struct atmel_mci *host)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int atmci_get_version(struct atmel_mci *host)</div><div class='del'>-{</div><div class='del'>-	return atmci_readl(host, ATMCI_VERSION) &amp; 0x00000fff;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * HSMCI (High Speed MCI) module is not fully compatible with MCI module.</div><div class='ctx'>  * HSMCI provides DMA support and a new config register but no more supports</div><div class='hunk'>@@ -2032,6 +2207,9 @@ static void __init atmci_get_cap(struct atmel_mci *host)</div><div class='ctx'> 	host-&gt;caps.has_highspeed = 0;</div><div class='ctx'> 	host-&gt;caps.has_rwproof = 0;</div><div class='ctx'> 	host-&gt;caps.has_odd_clk_div = 0;</div><div class='add'>+	host-&gt;caps.has_bad_data_ordering = 1;</div><div class='add'>+	host-&gt;caps.need_reset_after_xfer = 1;</div><div class='add'>+	host-&gt;caps.need_blksz_mul_4 = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* keep only major version number */</div><div class='ctx'> 	switch (version &amp; 0xf00) {</div><div class='hunk'>@@ -2051,7 +2229,11 @@ static void __init atmci_get_cap(struct atmel_mci *host)</div><div class='ctx'> 		host-&gt;caps.has_highspeed = 1;</div><div class='ctx'> 	case 0x200:</div><div class='ctx'> 		host-&gt;caps.has_rwproof = 1;</div><div class='add'>+		host-&gt;caps.need_blksz_mul_4 = 0;</div><div class='ctx'> 	case 0x100:</div><div class='add'>+		host-&gt;caps.has_bad_data_ordering = 0;</div><div class='add'>+		host-&gt;caps.need_reset_after_xfer = 0;</div><div class='add'>+	case 0x0:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		host-&gt;caps.has_pdc = 0;</div><div class='hunk'>@@ -2138,14 +2320,20 @@ static int __init atmci_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (pdata-&gt;slot[0].bus_width) {</div><div class='ctx'> 		ret = atmci_init_slot(host, &amp;pdata-&gt;slot[0],</div><div class='ctx'> 				0, ATMCI_SDCSEL_SLOT_A, ATMCI_SDIOIRQA);</div><div class='del'>-		if (!ret)</div><div class='add'>+		if (!ret) {</div><div class='ctx'> 			nr_slots++;</div><div class='add'>+			host-&gt;buf_size = host-&gt;slot[0]-&gt;mmc-&gt;max_req_size;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (pdata-&gt;slot[1].bus_width) {</div><div class='ctx'> 		ret = atmci_init_slot(host, &amp;pdata-&gt;slot[1],</div><div class='ctx'> 				1, ATMCI_SDCSEL_SLOT_B, ATMCI_SDIOIRQB);</div><div class='del'>-		if (!ret)</div><div class='add'>+		if (!ret) {</div><div class='ctx'> 			nr_slots++;</div><div class='add'>+			if (host-&gt;slot[1]-&gt;mmc-&gt;max_req_size &gt; host-&gt;buf_size)</div><div class='add'>+				host-&gt;buf_size =</div><div class='add'>+					host-&gt;slot[1]-&gt;mmc-&gt;max_req_size;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!nr_slots) {</div><div class='hunk'>@@ -2153,6 +2341,19 @@ static int __init atmci_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_init_slot;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!host-&gt;caps.has_rwproof) {</div><div class='add'>+		host-&gt;buffer = dma_alloc_coherent(&amp;pdev-&gt;dev, host-&gt;buf_size,</div><div class='add'>+		                                  &amp;host-&gt;buf_phys_addr,</div><div class='add'>+						  GFP_KERNEL);</div><div class='add'>+		if (!host-&gt;buffer) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "buffer allocation failed\n");</div><div class='add'>+			goto err_init_slot;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	setup_timer(&amp;host-&gt;timer, atmci_timeout_timer, (unsigned long)host);</div><div class='add'>+</div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev,</div><div class='ctx'> 			"Atmel MCI controller at 0x%08lx irq %d, %u slots\n",</div><div class='ctx'> 			host-&gt;mapbase, irq, nr_slots);</div><div class='hunk'>@@ -2179,6 +2380,10 @@ static int __exit atmci_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='add'>+	if (host-&gt;buffer)</div><div class='add'>+		dma_free_coherent(&amp;pdev-&gt;dev, host-&gt;buf_size,</div><div class='add'>+		                  host-&gt;buffer, host-&gt;buf_phys_addr);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; ATMCI_MAX_NR_SLOTS; i++) {</div><div class='ctx'> 		if (host-&gt;slot[i])</div><div class='ctx'> 			atmci_cleanup_slot(host-&gt;slot[i], i);</div><div class='head'>diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c<br/>index c1f3673ae1ef..7cf6c624bf73 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/davinci_mmc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/davinci_mmc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/davinci_mmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/davinci_mmc.c</a></div><div class='hunk'>@@ -1533,4 +1533,5 @@ module_exit(davinci_mmcsd_exit);</div><div class='ctx'> MODULE_AUTHOR("Texas Instruments India");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("MMC/SD driver for Davinci MMC controller");</div><div class='add'>+MODULE_ALIAS("platform:davinci_mmc");</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c<br/>index ab3fc4617107..9bbf45f8c538 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/dw_mmc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/dw_mmc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/dw_mmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/dw_mmc.c</a></div><div class='hunk'>@@ -100,8 +100,6 @@ struct dw_mci_slot {</div><div class='ctx'> 	int			last_detect_state;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct workqueue_struct *dw_mci_card_workqueue;</div><div class='del'>-</div><div class='ctx'> #if defined(CONFIG_DEBUG_FS)</div><div class='ctx'> static int dw_mci_req_show(struct seq_file *s, void *v)</div><div class='ctx'> {</div><div class='hunk'>@@ -859,10 +857,10 @@ static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb)</div><div class='ctx'> 	int_mask = mci_readl(host, INTMASK);</div><div class='ctx'> 	if (enb) {</div><div class='ctx'> 		mci_writel(host, INTMASK,</div><div class='del'>-			   (int_mask | (1 &lt;&lt; SDMMC_INT_SDIO(slot-&gt;id))));</div><div class='add'>+			   (int_mask | SDMMC_INT_SDIO(slot-&gt;id)));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		mci_writel(host, INTMASK,</div><div class='del'>-			   (int_mask &amp; ~(1 &lt;&lt; SDMMC_INT_SDIO(slot-&gt;id))));</div><div class='add'>+			   (int_mask &amp; ~SDMMC_INT_SDIO(slot-&gt;id)));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1605,7 +1603,7 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 		if (pending &amp; SDMMC_INT_CD) {</div><div class='ctx'> 			mci_writel(host, RINTSTS, SDMMC_INT_CD);</div><div class='del'>-			queue_work(dw_mci_card_workqueue, &amp;host-&gt;card_work);</div><div class='add'>+			queue_work(host-&gt;card_workqueue, &amp;host-&gt;card_work);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Handle SDIO Interrupts */</div><div class='hunk'>@@ -1844,7 +1842,7 @@ static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id)</div><div class='ctx'> 	 * Card may have been plugged in prior to boot so we</div><div class='ctx'> 	 * need to run the detect tasklet</div><div class='ctx'> 	 */</div><div class='del'>-	queue_work(dw_mci_card_workqueue, &amp;host-&gt;card_work);</div><div class='add'>+	queue_work(host-&gt;card_workqueue, &amp;host-&gt;card_work);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2021,9 +2019,9 @@ int dw_mci_probe(struct dw_mci *host)</div><div class='ctx'> 	mci_writel(host, CLKSRC, 0);</div><div class='ctx'> </div><div class='ctx'> 	tasklet_init(&amp;host-&gt;tasklet, dw_mci_tasklet_func, (unsigned long)host);</div><div class='del'>-	dw_mci_card_workqueue = alloc_workqueue("dw-mci-card",</div><div class='add'>+	host-&gt;card_workqueue = alloc_workqueue("dw-mci-card",</div><div class='ctx'> 			WQ_MEM_RECLAIM | WQ_NON_REENTRANT, 1);</div><div class='del'>-	if (!dw_mci_card_workqueue)</div><div class='add'>+	if (!host-&gt;card_workqueue)</div><div class='ctx'> 		goto err_dmaunmap;</div><div class='ctx'> 	INIT_WORK(&amp;host-&gt;card_work, dw_mci_work_routine_card);</div><div class='ctx'> 	ret = request_irq(host-&gt;irq, dw_mci_interrupt, host-&gt;irq_flags, "dw-mci", host);</div><div class='hunk'>@@ -2085,7 +2083,7 @@ err_init_slot:</div><div class='ctx'> 	free_irq(host-&gt;irq, host);</div><div class='ctx'> </div><div class='ctx'> err_workqueue:</div><div class='del'>-	destroy_workqueue(dw_mci_card_workqueue);</div><div class='add'>+	destroy_workqueue(host-&gt;card_workqueue);</div><div class='ctx'> </div><div class='ctx'> err_dmaunmap:</div><div class='ctx'> 	if (host-&gt;use_dma &amp;&amp; host-&gt;dma_ops-&gt;exit)</div><div class='hunk'>@@ -2119,7 +2117,7 @@ void dw_mci_remove(struct dw_mci *host)</div><div class='ctx'> 	mci_writel(host, CLKSRC, 0);</div><div class='ctx'> </div><div class='ctx'> 	free_irq(host-&gt;irq, host);</div><div class='del'>-	destroy_workqueue(dw_mci_card_workqueue);</div><div class='add'>+	destroy_workqueue(host-&gt;card_workqueue);</div><div class='ctx'> 	dma_free_coherent(&amp;host-&gt;dev, PAGE_SIZE, host-&gt;sg_cpu, host-&gt;sg_dma);</div><div class='ctx'> </div><div class='ctx'> 	if (host-&gt;use_dma &amp;&amp; host-&gt;dma_ops-&gt;exit)</div><div class='head'>diff --git a/drivers/mmc/host/imxmmc.c b/drivers/mmc/host/imxmmc.c<br/>deleted file mode 100644<br/>index ea0f3cedef21..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/imxmmc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/imxmmc.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1169 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/drivers/mmc/host/imxmmc.c - Motorola i.MX MMCI driver</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 2004 Sascha Hauer, Pengutronix &lt;sascha@saschahauer.de&gt;</div><div class='del'>- *  Copyright (C) 2006 Pavel Pisa, PiKRON &lt;ppisa@pikron.com&gt;</div><div class='del'>- *</div><div class='del'>- *  derived from pxamci.c by Russell King</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/blkdev.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/mmc/host.h&gt;</div><div class='del'>-#include &lt;linux/mmc/card.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/sizes.h&gt;</div><div class='del'>-#include &lt;mach/mmc.h&gt;</div><div class='del'>-#include &lt;mach/imx-dma.h&gt;</div><div class='del'>-</div><div class='del'>-#include "imxmmc.h"</div><div class='del'>-</div><div class='del'>-#define DRIVER_NAME "imx-mmc"</div><div class='del'>-</div><div class='del'>-#define IMXMCI_INT_MASK_DEFAULT (INT_MASK_BUF_READY | INT_MASK_DATA_TRAN | \</div><div class='del'>-				 INT_MASK_WRITE_OP_DONE | INT_MASK_END_CMD_RES | \</div><div class='del'>-				 INT_MASK_AUTO_CARD_DETECT | INT_MASK_DAT0_EN | INT_MASK_SDIO)</div><div class='del'>-</div><div class='del'>-struct imxmci_host {</div><div class='del'>-	struct mmc_host		*mmc;</div><div class='del'>-	spinlock_t		lock;</div><div class='del'>-	struct resource		*res;</div><div class='del'>-	void __iomem		*base;</div><div class='del'>-	int			irq;</div><div class='del'>-	imx_dmach_t		dma;</div><div class='del'>-	volatile unsigned int	imask;</div><div class='del'>-	unsigned int		power_mode;</div><div class='del'>-	unsigned int		present;</div><div class='del'>-	struct imxmmc_platform_data *pdata;</div><div class='del'>-</div><div class='del'>-	struct mmc_request	*req;</div><div class='del'>-	struct mmc_command	*cmd;</div><div class='del'>-	struct mmc_data		*data;</div><div class='del'>-</div><div class='del'>-	struct timer_list	timer;</div><div class='del'>-	struct tasklet_struct	tasklet;</div><div class='del'>-	unsigned int		status_reg;</div><div class='del'>-	unsigned long		pending_events;</div><div class='del'>-	/* Next two fields are there for CPU driven transfers to overcome SDHC deficiencies */</div><div class='del'>-	u16			*data_ptr;</div><div class='del'>-	unsigned int		data_cnt;</div><div class='del'>-	atomic_t		stuck_timeout;</div><div class='del'>-</div><div class='del'>-	unsigned int		dma_nents;</div><div class='del'>-	unsigned int		dma_size;</div><div class='del'>-	unsigned int		dma_dir;</div><div class='del'>-	int			dma_allocated;</div><div class='del'>-</div><div class='del'>-	unsigned char		actual_bus_width;</div><div class='del'>-</div><div class='del'>-	int			prev_cmd_code;</div><div class='del'>-</div><div class='del'>-	struct clk		*clk;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define IMXMCI_PEND_IRQ_b	0</div><div class='del'>-#define IMXMCI_PEND_DMA_END_b	1</div><div class='del'>-#define IMXMCI_PEND_DMA_ERR_b	2</div><div class='del'>-#define IMXMCI_PEND_WAIT_RESP_b	3</div><div class='del'>-#define IMXMCI_PEND_DMA_DATA_b	4</div><div class='del'>-#define IMXMCI_PEND_CPU_DATA_b	5</div><div class='del'>-#define IMXMCI_PEND_CARD_XCHG_b	6</div><div class='del'>-#define IMXMCI_PEND_SET_INIT_b	7</div><div class='del'>-#define IMXMCI_PEND_STARTED_b	8</div><div class='del'>-</div><div class='del'>-#define IMXMCI_PEND_IRQ_m	(1 &lt;&lt; IMXMCI_PEND_IRQ_b)</div><div class='del'>-#define IMXMCI_PEND_DMA_END_m	(1 &lt;&lt; IMXMCI_PEND_DMA_END_b)</div><div class='del'>-#define IMXMCI_PEND_DMA_ERR_m	(1 &lt;&lt; IMXMCI_PEND_DMA_ERR_b)</div><div class='del'>-#define IMXMCI_PEND_WAIT_RESP_m	(1 &lt;&lt; IMXMCI_PEND_WAIT_RESP_b)</div><div class='del'>-#define IMXMCI_PEND_DMA_DATA_m	(1 &lt;&lt; IMXMCI_PEND_DMA_DATA_b)</div><div class='del'>-#define IMXMCI_PEND_CPU_DATA_m	(1 &lt;&lt; IMXMCI_PEND_CPU_DATA_b)</div><div class='del'>-#define IMXMCI_PEND_CARD_XCHG_m	(1 &lt;&lt; IMXMCI_PEND_CARD_XCHG_b)</div><div class='del'>-#define IMXMCI_PEND_SET_INIT_m	(1 &lt;&lt; IMXMCI_PEND_SET_INIT_b)</div><div class='del'>-#define IMXMCI_PEND_STARTED_m	(1 &lt;&lt; IMXMCI_PEND_STARTED_b)</div><div class='del'>-</div><div class='del'>-static void imxmci_stop_clock(struct imxmci_host *host)</div><div class='del'>-{</div><div class='del'>-	int i = 0;</div><div class='del'>-	u16 reg;</div><div class='del'>-</div><div class='del'>-	reg = readw(host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-	writew(reg &amp; ~STR_STP_CLK_START_CLK, host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-	while (i &lt; 0x1000) {</div><div class='del'>-		if (!(i &amp; 0x7f)) {</div><div class='del'>-			reg = readw(host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-			writew(reg | STR_STP_CLK_STOP_CLK,</div><div class='del'>-					host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		reg = readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-		if (!(reg &amp; STATUS_CARD_BUS_CLK_RUN)) {</div><div class='del'>-			/* Check twice before cut */</div><div class='del'>-			reg = readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-			if (!(reg &amp; STATUS_CARD_BUS_CLK_RUN))</div><div class='del'>-				return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		i++;</div><div class='del'>-	}</div><div class='del'>-	dev_dbg(mmc_dev(host-&gt;mmc), "imxmci_stop_clock blocked, no luck\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int imxmci_start_clock(struct imxmci_host *host)</div><div class='del'>-{</div><div class='del'>-	unsigned int trials = 0;</div><div class='del'>-	unsigned int delay_limit = 128;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u16 reg;</div><div class='del'>-</div><div class='del'>-	reg = readw(host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-	writew(reg &amp; ~STR_STP_CLK_STOP_CLK, host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-</div><div class='del'>-	clear_bit(IMXMCI_PEND_STARTED_b, &amp;host-&gt;pending_events);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Command start of the clock, this usually succeeds in less</div><div class='del'>-	 * then 6 delay loops, but during card detection (low clockrate)</div><div class='del'>-	 * it takes up to 5000 delay loops and sometimes fails for the first time</div><div class='del'>-	 */</div><div class='del'>-	reg = readw(host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-	writew(reg | STR_STP_CLK_START_CLK, host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		unsigned int delay = delay_limit;</div><div class='del'>-</div><div class='del'>-		while (delay--) {</div><div class='del'>-			reg = readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-			if (reg &amp; STATUS_CARD_BUS_CLK_RUN) {</div><div class='del'>-				/* Check twice before cut */</div><div class='del'>-				reg = readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-				if (reg &amp; STATUS_CARD_BUS_CLK_RUN)</div><div class='del'>-					return 0;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (test_bit(IMXMCI_PEND_STARTED_b, &amp;host-&gt;pending_events))</div><div class='del'>-				return 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		local_irq_save(flags);</div><div class='del'>-		/*</div><div class='del'>-		 * Ensure, that request is not doubled under all possible circumstances.</div><div class='del'>-		 * It is possible, that cock running state is missed, because some other</div><div class='del'>-		 * IRQ or schedule delays this function execution and the clocks has</div><div class='del'>-		 * been already stopped by other means (response processing, SDHC HW)</div><div class='del'>-		 */</div><div class='del'>-		if (!test_bit(IMXMCI_PEND_STARTED_b, &amp;host-&gt;pending_events)) {</div><div class='del'>-			reg = readw(host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-			writew(reg | STR_STP_CLK_START_CLK,</div><div class='del'>-					host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-		}</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-</div><div class='del'>-	} while (++trials &lt; 256);</div><div class='del'>-</div><div class='del'>-	dev_err(mmc_dev(host-&gt;mmc), "imxmci_start_clock blocked, no luck\n");</div><div class='del'>-</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void imxmci_softreset(struct imxmci_host *host)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* reset sequence */</div><div class='del'>-	writew(0x08, host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-	writew(0x0D, host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 8; i++)</div><div class='del'>-		writew(0x05, host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-</div><div class='del'>-	writew(0xff, host-&gt;base + MMC_REG_RES_TO);</div><div class='del'>-	writew(512, host-&gt;base + MMC_REG_BLK_LEN);</div><div class='del'>-	writew(1, host-&gt;base + MMC_REG_NOB);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int imxmci_busy_wait_for_status(struct imxmci_host *host,</div><div class='del'>-				       unsigned int *pstat, unsigned int stat_mask,</div><div class='del'>-				       int timeout, const char *where)</div><div class='del'>-{</div><div class='del'>-	int loops = 0;</div><div class='del'>-</div><div class='del'>-	while (!(*pstat &amp; stat_mask)) {</div><div class='del'>-		loops += 2;</div><div class='del'>-		if (loops &gt;= timeout) {</div><div class='del'>-			dev_dbg(mmc_dev(host-&gt;mmc), "busy wait timeout in %s, STATUS = 0x%x (0x%x)\n",</div><div class='del'>-				where, *pstat, stat_mask);</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-		udelay(2);</div><div class='del'>-		*pstat |= readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-	}</div><div class='del'>-	if (!loops)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* The busy-wait is expected there for clock &lt;8MHz due to SDHC hardware flaws */</div><div class='del'>-	if (!(stat_mask &amp; STATUS_END_CMD_RESP) || (host-&gt;mmc-&gt;ios.clock &gt;= 8000000))</div><div class='del'>-		dev_info(mmc_dev(host-&gt;mmc), "busy wait for %d usec in %s, STATUS = 0x%x (0x%x)\n",</div><div class='del'>-			 loops, where, *pstat, stat_mask);</div><div class='del'>-	return loops;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)</div><div class='del'>-{</div><div class='del'>-	unsigned int nob = data-&gt;blocks;</div><div class='del'>-	unsigned int blksz = data-&gt;blksz;</div><div class='del'>-	unsigned int datasz = nob * blksz;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (data-&gt;flags &amp; MMC_DATA_STREAM)</div><div class='del'>-		nob = 0xffff;</div><div class='del'>-</div><div class='del'>-	host-&gt;data = data;</div><div class='del'>-	data-&gt;bytes_xfered = 0;</div><div class='del'>-</div><div class='del'>-	writew(nob, host-&gt;base + MMC_REG_NOB);</div><div class='del'>-	writew(blksz, host-&gt;base + MMC_REG_BLK_LEN);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * DMA cannot be used for small block sizes, we have to use CPU driven transfers otherwise.</div><div class='del'>-	 * We are in big troubles for non-512 byte transfers according to note in the paragraph</div><div class='del'>-	 * 20.6.7 of User Manual anyway, but we need to be able to transfer SCR at least.</div><div class='del'>-	 * The situation is even more complex in reality. The SDHC in not able to handle wll</div><div class='del'>-	 * partial FIFO fills and reads. The length has to be rounded up to burst size multiple.</div><div class='del'>-	 * This is required for SCR read at least.</div><div class='del'>-	 */</div><div class='del'>-	if (datasz &lt; 512) {</div><div class='del'>-		host-&gt;dma_size = datasz;</div><div class='del'>-		if (data-&gt;flags &amp; MMC_DATA_READ) {</div><div class='del'>-			host-&gt;dma_dir = DMA_FROM_DEVICE;</div><div class='del'>-</div><div class='del'>-			/* Hack to enable read SCR */</div><div class='del'>-			writew(1, host-&gt;base + MMC_REG_NOB);</div><div class='del'>-			writew(512, host-&gt;base + MMC_REG_BLK_LEN);</div><div class='del'>-		} else {</div><div class='del'>-			host-&gt;dma_dir = DMA_TO_DEVICE;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Convert back to virtual address */</div><div class='del'>-		host-&gt;data_ptr = (u16 *)sg_virt(data-&gt;sg);</div><div class='del'>-		host-&gt;data_cnt = 0;</div><div class='del'>-</div><div class='del'>-		clear_bit(IMXMCI_PEND_DMA_DATA_b, &amp;host-&gt;pending_events);</div><div class='del'>-		set_bit(IMXMCI_PEND_CPU_DATA_b, &amp;host-&gt;pending_events);</div><div class='del'>-</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (data-&gt;flags &amp; MMC_DATA_READ) {</div><div class='del'>-		host-&gt;dma_dir = DMA_FROM_DEVICE;</div><div class='del'>-		host-&gt;dma_nents = dma_map_sg(mmc_dev(host-&gt;mmc), data-&gt;sg,</div><div class='del'>-					     data-&gt;sg_len,  host-&gt;dma_dir);</div><div class='del'>-</div><div class='del'>-		imx_dma_setup_sg(host-&gt;dma, data-&gt;sg, data-&gt;sg_len, datasz,</div><div class='del'>-				 host-&gt;res-&gt;start + MMC_REG_BUFFER_ACCESS,</div><div class='del'>-				 DMA_MODE_READ);</div><div class='del'>-</div><div class='del'>-		/*imx_dma_setup_mem2dev_ccr(host-&gt;dma, DMA_MODE_READ, IMX_DMA_WIDTH_16, CCR_REN);*/</div><div class='del'>-		CCR(host-&gt;dma) = CCR_DMOD_LINEAR | CCR_DSIZ_32 | CCR_SMOD_FIFO | CCR_SSIZ_16 | CCR_REN;</div><div class='del'>-	} else {</div><div class='del'>-		host-&gt;dma_dir = DMA_TO_DEVICE;</div><div class='del'>-</div><div class='del'>-		host-&gt;dma_nents = dma_map_sg(mmc_dev(host-&gt;mmc), data-&gt;sg,</div><div class='del'>-					     data-&gt;sg_len,  host-&gt;dma_dir);</div><div class='del'>-</div><div class='del'>-		imx_dma_setup_sg(host-&gt;dma, data-&gt;sg, data-&gt;sg_len, datasz,</div><div class='del'>-				 host-&gt;res-&gt;start + MMC_REG_BUFFER_ACCESS,</div><div class='del'>-				 DMA_MODE_WRITE);</div><div class='del'>-</div><div class='del'>-		/*imx_dma_setup_mem2dev_ccr(host-&gt;dma, DMA_MODE_WRITE, IMX_DMA_WIDTH_16, CCR_REN);*/</div><div class='del'>-		CCR(host-&gt;dma) = CCR_SMOD_LINEAR | CCR_SSIZ_32 | CCR_DMOD_FIFO | CCR_DSIZ_16 | CCR_REN;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#if 1	/* This code is there only for consistency checking and can be disabled in future */</div><div class='del'>-	host-&gt;dma_size = 0;</div><div class='del'>-	for (i = 0; i &lt; host-&gt;dma_nents; i++)</div><div class='del'>-		host-&gt;dma_size += data-&gt;sg[i].length;</div><div class='del'>-</div><div class='del'>-	if (datasz &gt; host-&gt;dma_size) {</div><div class='del'>-		dev_err(mmc_dev(host-&gt;mmc), "imxmci_setup_data datasz 0x%x &gt; 0x%x dm_size\n",</div><div class='del'>-			datasz, host-&gt;dma_size);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	host-&gt;dma_size = datasz;</div><div class='del'>-</div><div class='del'>-	wmb();</div><div class='del'>-</div><div class='del'>-	set_bit(IMXMCI_PEND_DMA_DATA_b, &amp;host-&gt;pending_events);</div><div class='del'>-	clear_bit(IMXMCI_PEND_CPU_DATA_b, &amp;host-&gt;pending_events);</div><div class='del'>-</div><div class='del'>-	/* start DMA engine for read, write is delayed after initial response */</div><div class='del'>-	if (host-&gt;dma_dir == DMA_FROM_DEVICE)</div><div class='del'>-		imx_dma_enable(host-&gt;dma);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd, unsigned int cmdat)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u32 imask;</div><div class='del'>-</div><div class='del'>-	WARN_ON(host-&gt;cmd != NULL);</div><div class='del'>-	host-&gt;cmd = cmd;</div><div class='del'>-</div><div class='del'>-	/* Ensure, that clock are stopped else command programming and start fails */</div><div class='del'>-	imxmci_stop_clock(host);</div><div class='del'>-</div><div class='del'>-	if (cmd-&gt;flags &amp; MMC_RSP_BUSY)</div><div class='del'>-		cmdat |= CMD_DAT_CONT_BUSY;</div><div class='del'>-</div><div class='del'>-	switch (mmc_resp_type(cmd)) {</div><div class='del'>-	case MMC_RSP_R1: /* short CRC, OPCODE */</div><div class='del'>-	case MMC_RSP_R1B:/* short CRC, OPCODE, BUSY */</div><div class='del'>-		cmdat |= CMD_DAT_CONT_RESPONSE_FORMAT_R1;</div><div class='del'>-		break;</div><div class='del'>-	case MMC_RSP_R2: /* long 136 bit + CRC */</div><div class='del'>-		cmdat |= CMD_DAT_CONT_RESPONSE_FORMAT_R2;</div><div class='del'>-		break;</div><div class='del'>-	case MMC_RSP_R3: /* short */</div><div class='del'>-		cmdat |= CMD_DAT_CONT_RESPONSE_FORMAT_R3;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (test_and_clear_bit(IMXMCI_PEND_SET_INIT_b, &amp;host-&gt;pending_events))</div><div class='del'>-		cmdat |= CMD_DAT_CONT_INIT; /* This command needs init */</div><div class='del'>-</div><div class='del'>-	if (host-&gt;actual_bus_width == MMC_BUS_WIDTH_4)</div><div class='del'>-		cmdat |= CMD_DAT_CONT_BUS_WIDTH_4;</div><div class='del'>-</div><div class='del'>-	writew(cmd-&gt;opcode, host-&gt;base + MMC_REG_CMD);</div><div class='del'>-	writew(cmd-&gt;arg &gt;&gt; 16, host-&gt;base + MMC_REG_ARGH);</div><div class='del'>-	writew(cmd-&gt;arg &amp; 0xffff, host-&gt;base + MMC_REG_ARGL);</div><div class='del'>-	writew(cmdat, host-&gt;base + MMC_REG_CMD_DAT_CONT);</div><div class='del'>-</div><div class='del'>-	atomic_set(&amp;host-&gt;stuck_timeout, 0);</div><div class='del'>-	set_bit(IMXMCI_PEND_WAIT_RESP_b, &amp;host-&gt;pending_events);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	imask = IMXMCI_INT_MASK_DEFAULT;</div><div class='del'>-	imask &amp;= ~INT_MASK_END_CMD_RES;</div><div class='del'>-	if (cmdat &amp; CMD_DAT_CONT_DATA_ENABLE) {</div><div class='del'>-		/* imask &amp;= ~INT_MASK_BUF_READY; */</div><div class='del'>-		imask &amp;= ~INT_MASK_DATA_TRAN;</div><div class='del'>-		if (cmdat &amp; CMD_DAT_CONT_WRITE)</div><div class='del'>-			imask &amp;= ~INT_MASK_WRITE_OP_DONE;</div><div class='del'>-		if (test_bit(IMXMCI_PEND_CPU_DATA_b, &amp;host-&gt;pending_events))</div><div class='del'>-			imask &amp;= ~INT_MASK_BUF_READY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;host-&gt;lock, flags);</div><div class='del'>-	host-&gt;imask = imask;</div><div class='del'>-	writew(host-&gt;imask, host-&gt;base + MMC_REG_INT_MASK);</div><div class='del'>-	spin_unlock_irqrestore(&amp;host-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	dev_dbg(mmc_dev(host-&gt;mmc), "CMD%02d (0x%02x) mask set to 0x%04x\n",</div><div class='del'>-		cmd-&gt;opcode, cmd-&gt;opcode, imask);</div><div class='del'>-</div><div class='del'>-	imxmci_start_clock(host);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void imxmci_finish_request(struct imxmci_host *host, struct mmc_request *req)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;host-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	host-&gt;pending_events &amp;= ~(IMXMCI_PEND_WAIT_RESP_m | IMXMCI_PEND_DMA_END_m |</div><div class='del'>-				  IMXMCI_PEND_DMA_DATA_m | IMXMCI_PEND_CPU_DATA_m);</div><div class='del'>-</div><div class='del'>-	host-&gt;imask = IMXMCI_INT_MASK_DEFAULT;</div><div class='del'>-	writew(host-&gt;imask, host-&gt;base + MMC_REG_INT_MASK);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;host-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	if (req &amp;&amp; req-&gt;cmd)</div><div class='del'>-		host-&gt;prev_cmd_code = req-&gt;cmd-&gt;opcode;</div><div class='del'>-</div><div class='del'>-	host-&gt;req = NULL;</div><div class='del'>-	host-&gt;cmd = NULL;</div><div class='del'>-	host-&gt;data = NULL;</div><div class='del'>-	mmc_request_done(host-&gt;mmc, req);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int imxmci_finish_data(struct imxmci_host *host, unsigned int stat)</div><div class='del'>-{</div><div class='del'>-	struct mmc_data *data = host-&gt;data;</div><div class='del'>-	int data_error;</div><div class='del'>-</div><div class='del'>-	if (test_and_clear_bit(IMXMCI_PEND_DMA_DATA_b, &amp;host-&gt;pending_events)) {</div><div class='del'>-		imx_dma_disable(host-&gt;dma);</div><div class='del'>-		dma_unmap_sg(mmc_dev(host-&gt;mmc), data-&gt;sg, host-&gt;dma_nents,</div><div class='del'>-			     host-&gt;dma_dir);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (stat &amp; STATUS_ERR_MASK) {</div><div class='del'>-		dev_dbg(mmc_dev(host-&gt;mmc), "request failed. status: 0x%08x\n", stat);</div><div class='del'>-		if (stat &amp; (STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR))</div><div class='del'>-			data-&gt;error = -EILSEQ;</div><div class='del'>-		else if (stat &amp; STATUS_TIME_OUT_READ)</div><div class='del'>-			data-&gt;error = -ETIMEDOUT;</div><div class='del'>-		else</div><div class='del'>-			data-&gt;error = -EIO;</div><div class='del'>-	} else {</div><div class='del'>-		data-&gt;bytes_xfered = host-&gt;dma_size;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	data_error = data-&gt;error;</div><div class='del'>-</div><div class='del'>-	host-&gt;data = NULL;</div><div class='del'>-</div><div class='del'>-	return data_error;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat)</div><div class='del'>-{</div><div class='del'>-	struct mmc_command *cmd = host-&gt;cmd;</div><div class='del'>-	int i;</div><div class='del'>-	u32 a, b, c;</div><div class='del'>-	struct mmc_data *data = host-&gt;data;</div><div class='del'>-</div><div class='del'>-	if (!cmd)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	host-&gt;cmd = NULL;</div><div class='del'>-</div><div class='del'>-	if (stat &amp; STATUS_TIME_OUT_RESP) {</div><div class='del'>-		dev_dbg(mmc_dev(host-&gt;mmc), "CMD TIMEOUT\n");</div><div class='del'>-		cmd-&gt;error = -ETIMEDOUT;</div><div class='del'>-	} else if (stat &amp; STATUS_RESP_CRC_ERR &amp;&amp; cmd-&gt;flags &amp; MMC_RSP_CRC) {</div><div class='del'>-		dev_dbg(mmc_dev(host-&gt;mmc), "cmd crc error\n");</div><div class='del'>-		cmd-&gt;error = -EILSEQ;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cmd-&gt;flags &amp; MMC_RSP_PRESENT) {</div><div class='del'>-		if (cmd-&gt;flags &amp; MMC_RSP_136) {</div><div class='del'>-			for (i = 0; i &lt; 4; i++) {</div><div class='del'>-				a = readw(host-&gt;base + MMC_REG_RES_FIFO);</div><div class='del'>-				b = readw(host-&gt;base + MMC_REG_RES_FIFO);</div><div class='del'>-				cmd-&gt;resp[i] = a &lt;&lt; 16 | b;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			a = readw(host-&gt;base + MMC_REG_RES_FIFO);</div><div class='del'>-			b = readw(host-&gt;base + MMC_REG_RES_FIFO);</div><div class='del'>-			c = readw(host-&gt;base + MMC_REG_RES_FIFO);</div><div class='del'>-			cmd-&gt;resp[0] = a &lt;&lt; 24 | b &lt;&lt; 8 | c &gt;&gt; 8;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_dbg(mmc_dev(host-&gt;mmc), "RESP 0x%08x, 0x%08x, 0x%08x, 0x%08x, error %d\n",</div><div class='del'>-		cmd-&gt;resp[0], cmd-&gt;resp[1], cmd-&gt;resp[2], cmd-&gt;resp[3], cmd-&gt;error);</div><div class='del'>-</div><div class='del'>-	if (data &amp;&amp; !cmd-&gt;error &amp;&amp; !(stat &amp; STATUS_ERR_MASK)) {</div><div class='del'>-		if (host-&gt;req-&gt;data-&gt;flags &amp; MMC_DATA_WRITE) {</div><div class='del'>-</div><div class='del'>-			/* Wait for FIFO to be empty before starting DMA write */</div><div class='del'>-</div><div class='del'>-			stat = readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-			if (imxmci_busy_wait_for_status(host, &amp;stat,</div><div class='del'>-							STATUS_APPL_BUFF_FE,</div><div class='del'>-							40, "imxmci_cmd_done DMA WR") &lt; 0) {</div><div class='del'>-				cmd-&gt;error = -EIO;</div><div class='del'>-				imxmci_finish_data(host, stat);</div><div class='del'>-				if (host-&gt;req)</div><div class='del'>-					imxmci_finish_request(host, host-&gt;req);</div><div class='del'>-				dev_warn(mmc_dev(host-&gt;mmc), "STATUS = 0x%04x\n",</div><div class='del'>-					 stat);</div><div class='del'>-				return 0;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (test_bit(IMXMCI_PEND_DMA_DATA_b, &amp;host-&gt;pending_events))</div><div class='del'>-				imx_dma_enable(host-&gt;dma);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		struct mmc_request *req;</div><div class='del'>-		imxmci_stop_clock(host);</div><div class='del'>-		req = host-&gt;req;</div><div class='del'>-</div><div class='del'>-		if (data)</div><div class='del'>-			imxmci_finish_data(host, stat);</div><div class='del'>-</div><div class='del'>-		if (req)</div><div class='del'>-			imxmci_finish_request(host, req);</div><div class='del'>-		else</div><div class='del'>-			dev_warn(mmc_dev(host-&gt;mmc), "imxmci_cmd_done: no request to finish\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int imxmci_data_done(struct imxmci_host *host, unsigned int stat)</div><div class='del'>-{</div><div class='del'>-	struct mmc_data *data = host-&gt;data;</div><div class='del'>-	int data_error;</div><div class='del'>-</div><div class='del'>-	if (!data)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	data_error = imxmci_finish_data(host, stat);</div><div class='del'>-</div><div class='del'>-	if (host-&gt;req-&gt;stop) {</div><div class='del'>-		imxmci_stop_clock(host);</div><div class='del'>-		imxmci_start_cmd(host, host-&gt;req-&gt;stop, 0);</div><div class='del'>-	} else {</div><div class='del'>-		struct mmc_request *req;</div><div class='del'>-		req = host-&gt;req;</div><div class='del'>-		if (req)</div><div class='del'>-			imxmci_finish_request(host, req);</div><div class='del'>-		else</div><div class='del'>-			dev_warn(mmc_dev(host-&gt;mmc), "imxmci_data_done: no request to finish\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int burst_len;</div><div class='del'>-	int trans_done = 0;</div><div class='del'>-	unsigned int stat = *pstat;</div><div class='del'>-</div><div class='del'>-	if (host-&gt;actual_bus_width != MMC_BUS_WIDTH_4)</div><div class='del'>-		burst_len = 16;</div><div class='del'>-	else</div><div class='del'>-		burst_len = 64;</div><div class='del'>-</div><div class='del'>-	/* This is unfortunately required */</div><div class='del'>-	dev_dbg(mmc_dev(host-&gt;mmc), "imxmci_cpu_driven_data running STATUS = 0x%x\n",</div><div class='del'>-		stat);</div><div class='del'>-</div><div class='del'>-	udelay(20);	/* required for clocks &lt; 8MHz*/</div><div class='del'>-</div><div class='del'>-	if (host-&gt;dma_dir == DMA_FROM_DEVICE) {</div><div class='del'>-		imxmci_busy_wait_for_status(host, &amp;stat,</div><div class='del'>-					    STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE |</div><div class='del'>-					    STATUS_TIME_OUT_READ,</div><div class='del'>-					    50, "imxmci_cpu_driven_data read");</div><div class='del'>-</div><div class='del'>-		while ((stat &amp; (STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE)) &amp;&amp;</div><div class='del'>-		       !(stat &amp; STATUS_TIME_OUT_READ) &amp;&amp;</div><div class='del'>-		       (host-&gt;data_cnt &lt; 512)) {</div><div class='del'>-</div><div class='del'>-			udelay(20);	/* required for clocks &lt; 8MHz*/</div><div class='del'>-</div><div class='del'>-			for (i = burst_len; i &gt;= 2 ; i -= 2) {</div><div class='del'>-				u16 data;</div><div class='del'>-				data = readw(host-&gt;base + MMC_REG_BUFFER_ACCESS);</div><div class='del'>-				udelay(10);	/* required for clocks &lt; 8MHz*/</div><div class='del'>-				if (host-&gt;data_cnt+2 &lt;= host-&gt;dma_size) {</div><div class='del'>-					*(host-&gt;data_ptr++) = data;</div><div class='del'>-				} else {</div><div class='del'>-					if (host-&gt;data_cnt &lt; host-&gt;dma_size)</div><div class='del'>-						*(u8 *)(host-&gt;data_ptr) = data;</div><div class='del'>-				}</div><div class='del'>-				host-&gt;data_cnt += 2;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			stat = readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-</div><div class='del'>-			dev_dbg(mmc_dev(host-&gt;mmc), "imxmci_cpu_driven_data read %d burst %d STATUS = 0x%x\n",</div><div class='del'>-				host-&gt;data_cnt, burst_len, stat);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if ((stat &amp; STATUS_DATA_TRANS_DONE) &amp;&amp; (host-&gt;data_cnt &gt;= 512))</div><div class='del'>-			trans_done = 1;</div><div class='del'>-</div><div class='del'>-		if (host-&gt;dma_size &amp; 0x1ff)</div><div class='del'>-			stat &amp;= ~STATUS_CRC_READ_ERR;</div><div class='del'>-</div><div class='del'>-		if (stat &amp; STATUS_TIME_OUT_READ) {</div><div class='del'>-			dev_dbg(mmc_dev(host-&gt;mmc), "imxmci_cpu_driven_data read timeout STATUS = 0x%x\n",</div><div class='del'>-				stat);</div><div class='del'>-			trans_done = -1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-		imxmci_busy_wait_for_status(host, &amp;stat,</div><div class='del'>-					    STATUS_APPL_BUFF_FE,</div><div class='del'>-					    20, "imxmci_cpu_driven_data write");</div><div class='del'>-</div><div class='del'>-		while ((stat &amp; STATUS_APPL_BUFF_FE) &amp;&amp;</div><div class='del'>-		       (host-&gt;data_cnt &lt; host-&gt;dma_size)) {</div><div class='del'>-			if (burst_len &gt;= host-&gt;dma_size - host-&gt;data_cnt) {</div><div class='del'>-				burst_len = host-&gt;dma_size - host-&gt;data_cnt;</div><div class='del'>-				host-&gt;data_cnt = host-&gt;dma_size;</div><div class='del'>-				trans_done = 1;</div><div class='del'>-			} else {</div><div class='del'>-				host-&gt;data_cnt += burst_len;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			for (i = burst_len; i &gt; 0 ; i -= 2)</div><div class='del'>-				writew(*(host-&gt;data_ptr++), host-&gt;base + MMC_REG_BUFFER_ACCESS);</div><div class='del'>-</div><div class='del'>-			stat = readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-</div><div class='del'>-			dev_dbg(mmc_dev(host-&gt;mmc), "imxmci_cpu_driven_data write burst %d STATUS = 0x%x\n",</div><div class='del'>-				burst_len, stat);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*pstat = stat;</div><div class='del'>-</div><div class='del'>-	return trans_done;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void imxmci_dma_irq(int dma, void *devid)</div><div class='del'>-{</div><div class='del'>-	struct imxmci_host *host = devid;</div><div class='del'>-	u32 stat = readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-</div><div class='del'>-	atomic_set(&amp;host-&gt;stuck_timeout, 0);</div><div class='del'>-	host-&gt;status_reg = stat;</div><div class='del'>-	set_bit(IMXMCI_PEND_DMA_END_b, &amp;host-&gt;pending_events);</div><div class='del'>-	tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t imxmci_irq(int irq, void *devid)</div><div class='del'>-{</div><div class='del'>-	struct imxmci_host *host = devid;</div><div class='del'>-	u32 stat = readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-	int handled = 1;</div><div class='del'>-</div><div class='del'>-	writew(host-&gt;imask | INT_MASK_SDIO | INT_MASK_AUTO_CARD_DETECT,</div><div class='del'>-			host-&gt;base + MMC_REG_INT_MASK);</div><div class='del'>-</div><div class='del'>-	atomic_set(&amp;host-&gt;stuck_timeout, 0);</div><div class='del'>-	host-&gt;status_reg = stat;</div><div class='del'>-	set_bit(IMXMCI_PEND_IRQ_b, &amp;host-&gt;pending_events);</div><div class='del'>-	set_bit(IMXMCI_PEND_STARTED_b, &amp;host-&gt;pending_events);</div><div class='del'>-	tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='del'>-</div><div class='del'>-	return IRQ_RETVAL(handled);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void imxmci_tasklet_fnc(unsigned long data)</div><div class='del'>-{</div><div class='del'>-	struct imxmci_host *host = (struct imxmci_host *)data;</div><div class='del'>-	u32 stat;</div><div class='del'>-	unsigned int data_dir_mask = 0;	/* STATUS_WR_CRC_ERROR_CODE_MASK */</div><div class='del'>-	int timeout = 0;</div><div class='del'>-</div><div class='del'>-	if (atomic_read(&amp;host-&gt;stuck_timeout) &gt; 4) {</div><div class='del'>-		char *what;</div><div class='del'>-		timeout = 1;</div><div class='del'>-		stat = readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-		host-&gt;status_reg = stat;</div><div class='del'>-		if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &amp;host-&gt;pending_events))</div><div class='del'>-			if (test_bit(IMXMCI_PEND_DMA_DATA_b, &amp;host-&gt;pending_events))</div><div class='del'>-				what = "RESP+DMA";</div><div class='del'>-			else</div><div class='del'>-				what = "RESP";</div><div class='del'>-		else</div><div class='del'>-			if (test_bit(IMXMCI_PEND_DMA_DATA_b, &amp;host-&gt;pending_events))</div><div class='del'>-				if (test_bit(IMXMCI_PEND_DMA_END_b, &amp;host-&gt;pending_events))</div><div class='del'>-					what = "DATA";</div><div class='del'>-				else</div><div class='del'>-					what = "DMA";</div><div class='del'>-			else</div><div class='del'>-				what = "???";</div><div class='del'>-</div><div class='del'>-		dev_err(mmc_dev(host-&gt;mmc),</div><div class='del'>-			"%s TIMEOUT, hardware stucked STATUS = 0x%04x IMASK = 0x%04x\n",</div><div class='del'>-			what, stat,</div><div class='del'>-			readw(host-&gt;base + MMC_REG_INT_MASK));</div><div class='del'>-		dev_err(mmc_dev(host-&gt;mmc),</div><div class='del'>-			"CMD_DAT_CONT = 0x%04x, MMC_BLK_LEN = 0x%04x, MMC_NOB = 0x%04x, DMA_CCR = 0x%08x\n",</div><div class='del'>-			readw(host-&gt;base + MMC_REG_CMD_DAT_CONT),</div><div class='del'>-			readw(host-&gt;base + MMC_REG_BLK_LEN),</div><div class='del'>-			readw(host-&gt;base + MMC_REG_NOB),</div><div class='del'>-			CCR(host-&gt;dma));</div><div class='del'>-		dev_err(mmc_dev(host-&gt;mmc), "CMD%d, prevCMD%d, bus %d-bit, dma_size = 0x%x\n",</div><div class='del'>-			host-&gt;cmd ? host-&gt;cmd-&gt;opcode : 0,</div><div class='del'>-			host-&gt;prev_cmd_code,</div><div class='del'>-			1 &lt;&lt; host-&gt;actual_bus_width, host-&gt;dma_size);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!host-&gt;present || timeout)</div><div class='del'>-		host-&gt;status_reg = STATUS_TIME_OUT_RESP | STATUS_TIME_OUT_READ |</div><div class='del'>-			STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR;</div><div class='del'>-</div><div class='del'>-	if (test_bit(IMXMCI_PEND_IRQ_b, &amp;host-&gt;pending_events) || timeout) {</div><div class='del'>-		clear_bit(IMXMCI_PEND_IRQ_b, &amp;host-&gt;pending_events);</div><div class='del'>-</div><div class='del'>-		stat = readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-		/*</div><div class='del'>-		 * This is not required in theory, but there is chance to miss some flag</div><div class='del'>-		 * which clears automatically by mask write, FreeScale original code keeps</div><div class='del'>-		 * stat from IRQ time so do I</div><div class='del'>-		 */</div><div class='del'>-		stat |= host-&gt;status_reg;</div><div class='del'>-</div><div class='del'>-		if (test_bit(IMXMCI_PEND_CPU_DATA_b, &amp;host-&gt;pending_events))</div><div class='del'>-			stat &amp;= ~STATUS_CRC_READ_ERR;</div><div class='del'>-</div><div class='del'>-		if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &amp;host-&gt;pending_events)) {</div><div class='del'>-			imxmci_busy_wait_for_status(host, &amp;stat,</div><div class='del'>-						    STATUS_END_CMD_RESP | STATUS_ERR_MASK,</div><div class='del'>-						    20, "imxmci_tasklet_fnc resp (ERRATUM #4)");</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (stat &amp; (STATUS_END_CMD_RESP | STATUS_ERR_MASK)) {</div><div class='del'>-			if (test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &amp;host-&gt;pending_events))</div><div class='del'>-				imxmci_cmd_done(host, stat);</div><div class='del'>-			if (host-&gt;data &amp;&amp; (stat &amp; STATUS_ERR_MASK))</div><div class='del'>-				imxmci_data_done(host, stat);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (test_bit(IMXMCI_PEND_CPU_DATA_b, &amp;host-&gt;pending_events)) {</div><div class='del'>-			stat |= readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-			if (imxmci_cpu_driven_data(host, &amp;stat)) {</div><div class='del'>-				if (test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &amp;host-&gt;pending_events))</div><div class='del'>-					imxmci_cmd_done(host, stat);</div><div class='del'>-				atomic_clear_mask(IMXMCI_PEND_IRQ_m|IMXMCI_PEND_CPU_DATA_m,</div><div class='del'>-						  &amp;host-&gt;pending_events);</div><div class='del'>-				imxmci_data_done(host, stat);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (test_bit(IMXMCI_PEND_DMA_END_b, &amp;host-&gt;pending_events) &amp;&amp;</div><div class='del'>-	    !test_bit(IMXMCI_PEND_WAIT_RESP_b, &amp;host-&gt;pending_events)) {</div><div class='del'>-</div><div class='del'>-		stat = readw(host-&gt;base + MMC_REG_STATUS);</div><div class='del'>-		/* Same as above */</div><div class='del'>-		stat |= host-&gt;status_reg;</div><div class='del'>-</div><div class='del'>-		if (host-&gt;dma_dir == DMA_TO_DEVICE)</div><div class='del'>-			data_dir_mask = STATUS_WRITE_OP_DONE;</div><div class='del'>-		else</div><div class='del'>-			data_dir_mask = STATUS_DATA_TRANS_DONE;</div><div class='del'>-</div><div class='del'>-		if (stat &amp; data_dir_mask) {</div><div class='del'>-			clear_bit(IMXMCI_PEND_DMA_END_b, &amp;host-&gt;pending_events);</div><div class='del'>-			imxmci_data_done(host, stat);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (test_and_clear_bit(IMXMCI_PEND_CARD_XCHG_b, &amp;host-&gt;pending_events)) {</div><div class='del'>-</div><div class='del'>-		if (host-&gt;cmd)</div><div class='del'>-			imxmci_cmd_done(host, STATUS_TIME_OUT_RESP);</div><div class='del'>-</div><div class='del'>-		if (host-&gt;data)</div><div class='del'>-			imxmci_data_done(host, STATUS_TIME_OUT_READ |</div><div class='del'>-					 STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR);</div><div class='del'>-</div><div class='del'>-		if (host-&gt;req)</div><div class='del'>-			imxmci_finish_request(host, host-&gt;req);</div><div class='del'>-</div><div class='del'>-		mmc_detect_change(host-&gt;mmc, msecs_to_jiffies(100));</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void imxmci_request(struct mmc_host *mmc, struct mmc_request *req)</div><div class='del'>-{</div><div class='del'>-	struct imxmci_host *host = mmc_priv(mmc);</div><div class='del'>-	unsigned int cmdat;</div><div class='del'>-</div><div class='del'>-	WARN_ON(host-&gt;req != NULL);</div><div class='del'>-</div><div class='del'>-	host-&gt;req = req;</div><div class='del'>-</div><div class='del'>-	cmdat = 0;</div><div class='del'>-</div><div class='del'>-	if (req-&gt;data) {</div><div class='del'>-		imxmci_setup_data(host, req-&gt;data);</div><div class='del'>-</div><div class='del'>-		cmdat |= CMD_DAT_CONT_DATA_ENABLE;</div><div class='del'>-</div><div class='del'>-		if (req-&gt;data-&gt;flags &amp; MMC_DATA_WRITE)</div><div class='del'>-			cmdat |= CMD_DAT_CONT_WRITE;</div><div class='del'>-</div><div class='del'>-		if (req-&gt;data-&gt;flags &amp; MMC_DATA_STREAM)</div><div class='del'>-			cmdat |= CMD_DAT_CONT_STREAM_BLOCK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	imxmci_start_cmd(host, req-&gt;cmd, cmdat);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define CLK_RATE 19200000</div><div class='del'>-</div><div class='del'>-static void imxmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)</div><div class='del'>-{</div><div class='del'>-	struct imxmci_host *host = mmc_priv(mmc);</div><div class='del'>-	int prescaler;</div><div class='del'>-</div><div class='del'>-	if (ios-&gt;bus_width == MMC_BUS_WIDTH_4) {</div><div class='del'>-		host-&gt;actual_bus_width = MMC_BUS_WIDTH_4;</div><div class='del'>-		imx_gpio_mode(PB11_PF_SD_DAT3);</div><div class='del'>-		BLR(host-&gt;dma) = 0;	/* burst 64 byte read/write */</div><div class='del'>-	} else {</div><div class='del'>-		host-&gt;actual_bus_width = MMC_BUS_WIDTH_1;</div><div class='del'>-		imx_gpio_mode(GPIO_PORTB | GPIO_IN | GPIO_PUEN | 11);</div><div class='del'>-		BLR(host-&gt;dma) = 16;	/* burst 16 byte read/write */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (host-&gt;power_mode != ios-&gt;power_mode) {</div><div class='del'>-		switch (ios-&gt;power_mode) {</div><div class='del'>-		case MMC_POWER_OFF:</div><div class='del'>-			break;</div><div class='del'>-		case MMC_POWER_UP:</div><div class='del'>-			set_bit(IMXMCI_PEND_SET_INIT_b, &amp;host-&gt;pending_events);</div><div class='del'>-			break;</div><div class='del'>-		case MMC_POWER_ON:</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		host-&gt;power_mode = ios-&gt;power_mode;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ios-&gt;clock) {</div><div class='del'>-		unsigned int clk;</div><div class='del'>-		u16 reg;</div><div class='del'>-</div><div class='del'>-		/* The prescaler is 5 for PERCLK2 equal to 96MHz</div><div class='del'>-		 * then 96MHz / 5 = 19.2 MHz</div><div class='del'>-		 */</div><div class='del'>-		clk = clk_get_rate(host-&gt;clk);</div><div class='del'>-		prescaler = (clk + (CLK_RATE * 7) / 8) / CLK_RATE;</div><div class='del'>-		switch (prescaler) {</div><div class='del'>-		case 0:</div><div class='del'>-		case 1:	prescaler = 0;</div><div class='del'>-			break;</div><div class='del'>-		case 2:	prescaler = 1;</div><div class='del'>-			break;</div><div class='del'>-		case 3:	prescaler = 2;</div><div class='del'>-			break;</div><div class='del'>-		case 4:	prescaler = 4;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-		case 5:	prescaler = 5;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		dev_dbg(mmc_dev(host-&gt;mmc), "PERCLK2 %d MHz -&gt; prescaler %d\n",</div><div class='del'>-			clk, prescaler);</div><div class='del'>-</div><div class='del'>-		for (clk = 0; clk &lt; 8; clk++) {</div><div class='del'>-			int x;</div><div class='del'>-			x = CLK_RATE / (1 &lt;&lt; clk);</div><div class='del'>-			if (x &lt;= ios-&gt;clock)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* enable controller */</div><div class='del'>-		reg = readw(host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-		writew(reg | STR_STP_CLK_ENABLE,</div><div class='del'>-				host-&gt;base + MMC_REG_STR_STP_CLK);</div><div class='del'>-</div><div class='del'>-		imxmci_stop_clock(host);</div><div class='del'>-		writew((prescaler &lt;&lt; 3) | clk, host-&gt;base + MMC_REG_CLK_RATE);</div><div class='del'>-		/*</div><div class='del'>-		 * Under my understanding, clock should not be started there, because it would</div><div class='del'>-		 * initiate SDHC sequencer and send last or random command into card</div><div class='del'>-		 */</div><div class='del'>-		/* imxmci_start_clock(host); */</div><div class='del'>-</div><div class='del'>-		dev_dbg(mmc_dev(host-&gt;mmc),</div><div class='del'>-			"MMC_CLK_RATE: 0x%08x\n",</div><div class='del'>-			readw(host-&gt;base + MMC_REG_CLK_RATE));</div><div class='del'>-	} else {</div><div class='del'>-		imxmci_stop_clock(host);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int imxmci_get_ro(struct mmc_host *mmc)</div><div class='del'>-{</div><div class='del'>-	struct imxmci_host *host = mmc_priv(mmc);</div><div class='del'>-</div><div class='del'>-	if (host-&gt;pdata &amp;&amp; host-&gt;pdata-&gt;get_ro)</div><div class='del'>-		return !!host-&gt;pdata-&gt;get_ro(mmc_dev(mmc));</div><div class='del'>-	/*</div><div class='del'>-	 * Board doesn't support read only detection; let the mmc core</div><div class='del'>-	 * decide what to do.</div><div class='del'>-	 */</div><div class='del'>-	return -ENOSYS;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static const struct mmc_host_ops imxmci_ops = {</div><div class='del'>-	.request	= imxmci_request,</div><div class='del'>-	.set_ios	= imxmci_set_ios,</div><div class='del'>-	.get_ro		= imxmci_get_ro,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void imxmci_check_status(unsigned long data)</div><div class='del'>-{</div><div class='del'>-	struct imxmci_host *host = (struct imxmci_host *)data;</div><div class='del'>-</div><div class='del'>-	if (host-&gt;pdata &amp;&amp; host-&gt;pdata-&gt;card_present &amp;&amp;</div><div class='del'>-	    host-&gt;pdata-&gt;card_present(mmc_dev(host-&gt;mmc)) != host-&gt;present) {</div><div class='del'>-		host-&gt;present ^= 1;</div><div class='del'>-		dev_info(mmc_dev(host-&gt;mmc), "card %s\n",</div><div class='del'>-		      host-&gt;present ? "inserted" : "removed");</div><div class='del'>-</div><div class='del'>-		set_bit(IMXMCI_PEND_CARD_XCHG_b, &amp;host-&gt;pending_events);</div><div class='del'>-		tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &amp;host-&gt;pending_events) ||</div><div class='del'>-	    test_bit(IMXMCI_PEND_DMA_DATA_b, &amp;host-&gt;pending_events)) {</div><div class='del'>-		atomic_inc(&amp;host-&gt;stuck_timeout);</div><div class='del'>-		if (atomic_read(&amp;host-&gt;stuck_timeout) &gt; 4)</div><div class='del'>-			tasklet_schedule(&amp;host-&gt;tasklet);</div><div class='del'>-	} else {</div><div class='del'>-		atomic_set(&amp;host-&gt;stuck_timeout, 0);</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mod_timer(&amp;host-&gt;timer, jiffies + (HZ&gt;&gt;1));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init imxmci_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct mmc_host *mmc;</div><div class='del'>-	struct imxmci_host *host = NULL;</div><div class='del'>-	struct resource *r;</div><div class='del'>-	int ret = 0, irq;</div><div class='del'>-	u16 rev_no;</div><div class='del'>-</div><div class='del'>-	pr_info("i.MX mmc driver\n");</div><div class='del'>-</div><div class='del'>-	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	irq = platform_get_irq(pdev, 0);</div><div class='del'>-	if (!r || irq &lt; 0)</div><div class='del'>-		return -ENXIO;</div><div class='del'>-</div><div class='del'>-	r = request_mem_region(r-&gt;start, resource_size(r), pdev-&gt;name);</div><div class='del'>-	if (!r)</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	mmc = mmc_alloc_host(sizeof(struct imxmci_host), &amp;pdev-&gt;dev);</div><div class='del'>-	if (!mmc) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mmc-&gt;ops = &amp;imxmci_ops;</div><div class='del'>-	mmc-&gt;f_min = 150000;</div><div class='del'>-	mmc-&gt;f_max = CLK_RATE/2;</div><div class='del'>-	mmc-&gt;ocr_avail = MMC_VDD_32_33;</div><div class='del'>-	mmc-&gt;caps = MMC_CAP_4_BIT_DATA;</div><div class='del'>-</div><div class='del'>-	/* MMC core transfer sizes tunable parameters */</div><div class='del'>-	mmc-&gt;max_segs = 64;</div><div class='del'>-	mmc-&gt;max_seg_size = 64*512;	/* default PAGE_CACHE_SIZE */</div><div class='del'>-	mmc-&gt;max_req_size = 64*512;	/* default PAGE_CACHE_SIZE */</div><div class='del'>-	mmc-&gt;max_blk_size = 2048;</div><div class='del'>-	mmc-&gt;max_blk_count = 65535;</div><div class='del'>-</div><div class='del'>-	host = mmc_priv(mmc);</div><div class='del'>-	host-&gt;base = ioremap(r-&gt;start, resource_size(r));</div><div class='del'>-	if (!host-&gt;base) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	host-&gt;mmc = mmc;</div><div class='del'>-	host-&gt;dma_allocated = 0;</div><div class='del'>-	host-&gt;pdata = pdev-&gt;dev.platform_data;</div><div class='del'>-	if (!host-&gt;pdata)</div><div class='del'>-		dev_warn(&amp;pdev-&gt;dev, "No platform data provided!\n");</div><div class='del'>-</div><div class='del'>-	spin_lock_init(&amp;host-&gt;lock);</div><div class='del'>-	host-&gt;res = r;</div><div class='del'>-	host-&gt;irq = irq;</div><div class='del'>-</div><div class='del'>-	host-&gt;clk = clk_get(&amp;pdev-&gt;dev, "perclk2");</div><div class='del'>-	if (IS_ERR(host-&gt;clk)) {</div><div class='del'>-		ret = PTR_ERR(host-&gt;clk);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	clk_enable(host-&gt;clk);</div><div class='del'>-</div><div class='del'>-	imx_gpio_mode(PB8_PF_SD_DAT0);</div><div class='del'>-	imx_gpio_mode(PB9_PF_SD_DAT1);</div><div class='del'>-	imx_gpio_mode(PB10_PF_SD_DAT2);</div><div class='del'>-	/* Configured as GPIO with pull-up to ensure right MCC card mode */</div><div class='del'>-	/* Switched to PB11_PF_SD_DAT3 if 4 bit bus is configured */</div><div class='del'>-	imx_gpio_mode(GPIO_PORTB | GPIO_IN | GPIO_PUEN | 11);</div><div class='del'>-	/* imx_gpio_mode(PB11_PF_SD_DAT3); */</div><div class='del'>-	imx_gpio_mode(PB12_PF_SD_CLK);</div><div class='del'>-	imx_gpio_mode(PB13_PF_SD_CMD);</div><div class='del'>-</div><div class='del'>-	imxmci_softreset(host);</div><div class='del'>-</div><div class='del'>-	rev_no = readw(host-&gt;base + MMC_REG_REV_NO);</div><div class='del'>-	if (rev_no != 0x390) {</div><div class='del'>-		dev_err(mmc_dev(host-&gt;mmc), "wrong rev.no. 0x%08x. aborting.\n",</div><div class='del'>-			readw(host-&gt;base + MMC_REG_REV_NO));</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* recommended in data sheet */</div><div class='del'>-	writew(0x2db4, host-&gt;base + MMC_REG_READ_TO);</div><div class='del'>-</div><div class='del'>-	host-&gt;imask = IMXMCI_INT_MASK_DEFAULT;</div><div class='del'>-	writew(host-&gt;imask, host-&gt;base + MMC_REG_INT_MASK);</div><div class='del'>-</div><div class='del'>-	host-&gt;dma = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_LOW);</div><div class='del'>-	if(host-&gt;dma &lt; 0) {</div><div class='del'>-		dev_err(mmc_dev(host-&gt;mmc), "imx_dma_request_by_prio failed\n");</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	host-&gt;dma_allocated = 1;</div><div class='del'>-	imx_dma_setup_handlers(host-&gt;dma, imxmci_dma_irq, NULL, host);</div><div class='del'>-	RSSR(host-&gt;dma) = DMA_REQ_SDHC;</div><div class='del'>-</div><div class='del'>-	tasklet_init(&amp;host-&gt;tasklet, imxmci_tasklet_fnc, (unsigned long)host);</div><div class='del'>-	host-&gt;status_reg=0;</div><div class='del'>-	host-&gt;pending_events=0;</div><div class='del'>-</div><div class='del'>-	ret = request_irq(host-&gt;irq, imxmci_irq, 0, DRIVER_NAME, host);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (host-&gt;pdata &amp;&amp; host-&gt;pdata-&gt;card_present)</div><div class='del'>-		host-&gt;present = host-&gt;pdata-&gt;card_present(mmc_dev(mmc));</div><div class='del'>-	else	/* if there is no way to detect assume that card is present */</div><div class='del'>-		host-&gt;present = 1;</div><div class='del'>-</div><div class='del'>-	init_timer(&amp;host-&gt;timer);</div><div class='del'>-	host-&gt;timer.data = (unsigned long)host;</div><div class='del'>-	host-&gt;timer.function = imxmci_check_status;</div><div class='del'>-	add_timer(&amp;host-&gt;timer);</div><div class='del'>-	mod_timer(&amp;host-&gt;timer, jiffies + (HZ &gt;&gt; 1));</div><div class='del'>-</div><div class='del'>-	platform_set_drvdata(pdev, mmc);</div><div class='del'>-</div><div class='del'>-	mmc_add_host(mmc);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	if (host) {</div><div class='del'>-		if (host-&gt;dma_allocated) {</div><div class='del'>-			imx_dma_free(host-&gt;dma);</div><div class='del'>-			host-&gt;dma_allocated = 0;</div><div class='del'>-		}</div><div class='del'>-		if (host-&gt;clk) {</div><div class='del'>-			clk_disable(host-&gt;clk);</div><div class='del'>-			clk_put(host-&gt;clk);</div><div class='del'>-		}</div><div class='del'>-		if (host-&gt;base)</div><div class='del'>-			iounmap(host-&gt;base);</div><div class='del'>-	}</div><div class='del'>-	if (mmc)</div><div class='del'>-		mmc_free_host(mmc);</div><div class='del'>-	release_mem_region(r-&gt;start, resource_size(r));</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __exit imxmci_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct mmc_host *mmc = platform_get_drvdata(pdev);</div><div class='del'>-</div><div class='del'>-	platform_set_drvdata(pdev, NULL);</div><div class='del'>-</div><div class='del'>-	if (mmc) {</div><div class='del'>-		struct imxmci_host *host = mmc_priv(mmc);</div><div class='del'>-</div><div class='del'>-		tasklet_disable(&amp;host-&gt;tasklet);</div><div class='del'>-</div><div class='del'>-		del_timer_sync(&amp;host-&gt;timer);</div><div class='del'>-		mmc_remove_host(mmc);</div><div class='del'>-</div><div class='del'>-		free_irq(host-&gt;irq, host);</div><div class='del'>-		iounmap(host-&gt;base);</div><div class='del'>-		if (host-&gt;dma_allocated) {</div><div class='del'>-			imx_dma_free(host-&gt;dma);</div><div class='del'>-			host-&gt;dma_allocated = 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		tasklet_kill(&amp;host-&gt;tasklet);</div><div class='del'>-</div><div class='del'>-		clk_disable(host-&gt;clk);</div><div class='del'>-		clk_put(host-&gt;clk);</div><div class='del'>-</div><div class='del'>-		release_mem_region(host-&gt;res-&gt;start, resource_size(host-&gt;res));</div><div class='del'>-</div><div class='del'>-		mmc_free_host(mmc);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static int imxmci_suspend(struct platform_device *dev, pm_message_t state)</div><div class='del'>-{</div><div class='del'>-	struct mmc_host *mmc = platform_get_drvdata(dev);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (mmc)</div><div class='del'>-		ret = mmc_suspend_host(mmc);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int imxmci_resume(struct platform_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mmc_host *mmc = platform_get_drvdata(dev);</div><div class='del'>-	struct imxmci_host *host;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (mmc) {</div><div class='del'>-		host = mmc_priv(mmc);</div><div class='del'>-		if (host)</div><div class='del'>-			set_bit(IMXMCI_PEND_SET_INIT_b, &amp;host-&gt;pending_events);</div><div class='del'>-		ret = mmc_resume_host(mmc);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-#define imxmci_suspend  NULL</div><div class='del'>-#define imxmci_resume   NULL</div><div class='del'>-#endif /* CONFIG_PM */</div><div class='del'>-</div><div class='del'>-static struct platform_driver imxmci_driver = {</div><div class='del'>-	.remove		= __exit_p(imxmci_remove),</div><div class='del'>-	.suspend	= imxmci_suspend,</div><div class='del'>-	.resume		= imxmci_resume,</div><div class='del'>-	.driver		= {</div><div class='del'>-		.name		= DRIVER_NAME,</div><div class='del'>-		.owner		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init imxmci_init(void)</div><div class='del'>-{</div><div class='del'>-	return platform_driver_probe(&amp;imxmci_driver, imxmci_probe);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit imxmci_exit(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;imxmci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(imxmci_init);</div><div class='del'>-module_exit(imxmci_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver");</div><div class='del'>-MODULE_AUTHOR("Sascha Hauer, Pengutronix");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_ALIAS("platform:imx-mmc");</div><div class='head'>diff --git a/drivers/mmc/host/imxmmc.h b/drivers/mmc/host/imxmmc.h<br/>deleted file mode 100644<br/>index 09d5d4ee3a77..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/imxmmc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/imxmmc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,64 +0,0 @@</div><div class='del'>-#define MMC_REG_STR_STP_CLK		0x00</div><div class='del'>-#define MMC_REG_STATUS			0x04</div><div class='del'>-#define MMC_REG_CLK_RATE		0x08</div><div class='del'>-#define MMC_REG_CMD_DAT_CONT		0x0C</div><div class='del'>-#define MMC_REG_RES_TO			0x10</div><div class='del'>-#define MMC_REG_READ_TO			0x14</div><div class='del'>-#define MMC_REG_BLK_LEN			0x18</div><div class='del'>-#define MMC_REG_NOB			0x1C</div><div class='del'>-#define MMC_REG_REV_NO			0x20</div><div class='del'>-#define MMC_REG_INT_MASK		0x24</div><div class='del'>-#define MMC_REG_CMD			0x28</div><div class='del'>-#define MMC_REG_ARGH			0x2C</div><div class='del'>-#define MMC_REG_ARGL			0x30</div><div class='del'>-#define MMC_REG_RES_FIFO		0x34</div><div class='del'>-#define MMC_REG_BUFFER_ACCESS		0x38</div><div class='del'>-</div><div class='del'>-#define STR_STP_CLK_IPG_CLK_GATE_DIS    (1&lt;&lt;15)</div><div class='del'>-#define STR_STP_CLK_IPG_PERCLK_GATE_DIS (1&lt;&lt;14)</div><div class='del'>-#define STR_STP_CLK_ENDIAN              (1&lt;&lt;5)</div><div class='del'>-#define STR_STP_CLK_RESET               (1&lt;&lt;3)</div><div class='del'>-#define STR_STP_CLK_ENABLE              (1&lt;&lt;2)</div><div class='del'>-#define STR_STP_CLK_START_CLK           (1&lt;&lt;1)</div><div class='del'>-#define STR_STP_CLK_STOP_CLK            (1&lt;&lt;0)</div><div class='del'>-#define STATUS_CARD_PRESENCE            (1&lt;&lt;15)</div><div class='del'>-#define STATUS_SDIO_INT_ACTIVE          (1&lt;&lt;14)</div><div class='del'>-#define STATUS_END_CMD_RESP             (1&lt;&lt;13)</div><div class='del'>-#define STATUS_WRITE_OP_DONE            (1&lt;&lt;12)</div><div class='del'>-#define STATUS_DATA_TRANS_DONE          (1&lt;&lt;11)</div><div class='del'>-#define STATUS_WR_CRC_ERROR_CODE_MASK   (3&lt;&lt;10)</div><div class='del'>-#define STATUS_CARD_BUS_CLK_RUN         (1&lt;&lt;8)</div><div class='del'>-#define STATUS_APPL_BUFF_FF             (1&lt;&lt;7)</div><div class='del'>-#define STATUS_APPL_BUFF_FE             (1&lt;&lt;6)</div><div class='del'>-#define STATUS_RESP_CRC_ERR             (1&lt;&lt;5)</div><div class='del'>-#define STATUS_CRC_READ_ERR             (1&lt;&lt;3)</div><div class='del'>-#define STATUS_CRC_WRITE_ERR            (1&lt;&lt;2)</div><div class='del'>-#define STATUS_TIME_OUT_RESP            (1&lt;&lt;1)</div><div class='del'>-#define STATUS_TIME_OUT_READ            (1&lt;&lt;0)</div><div class='del'>-#define STATUS_ERR_MASK                 0x2f</div><div class='del'>-#define CLK_RATE_PRESCALER(x)           ((x) &amp; 0x7)</div><div class='del'>-#define CLK_RATE_CLK_RATE(x)            (((x) &amp; 0x7) &lt;&lt; 3)</div><div class='del'>-#define CMD_DAT_CONT_CMD_RESP_LONG_OFF  (1&lt;&lt;12)</div><div class='del'>-#define CMD_DAT_CONT_STOP_READWAIT      (1&lt;&lt;11)</div><div class='del'>-#define CMD_DAT_CONT_START_READWAIT     (1&lt;&lt;10)</div><div class='del'>-#define CMD_DAT_CONT_BUS_WIDTH_1        (0&lt;&lt;8)</div><div class='del'>-#define CMD_DAT_CONT_BUS_WIDTH_4        (2&lt;&lt;8)</div><div class='del'>-#define CMD_DAT_CONT_INIT               (1&lt;&lt;7)</div><div class='del'>-#define CMD_DAT_CONT_BUSY               (1&lt;&lt;6)</div><div class='del'>-#define CMD_DAT_CONT_STREAM_BLOCK       (1&lt;&lt;5)</div><div class='del'>-#define CMD_DAT_CONT_WRITE              (1&lt;&lt;4)</div><div class='del'>-#define CMD_DAT_CONT_DATA_ENABLE        (1&lt;&lt;3)</div><div class='del'>-#define CMD_DAT_CONT_RESPONSE_FORMAT_R1 (1)</div><div class='del'>-#define CMD_DAT_CONT_RESPONSE_FORMAT_R2 (2)</div><div class='del'>-#define CMD_DAT_CONT_RESPONSE_FORMAT_R3 (3)</div><div class='del'>-#define CMD_DAT_CONT_RESPONSE_FORMAT_R4 (4)</div><div class='del'>-#define CMD_DAT_CONT_RESPONSE_FORMAT_R5 (5)</div><div class='del'>-#define CMD_DAT_CONT_RESPONSE_FORMAT_R6 (6)</div><div class='del'>-#define INT_MASK_AUTO_CARD_DETECT       (1&lt;&lt;6)</div><div class='del'>-#define INT_MASK_DAT0_EN                (1&lt;&lt;5)</div><div class='del'>-#define INT_MASK_SDIO                   (1&lt;&lt;4)</div><div class='del'>-#define INT_MASK_BUF_READY              (1&lt;&lt;3)</div><div class='del'>-#define INT_MASK_END_CMD_RES            (1&lt;&lt;2)</div><div class='del'>-#define INT_MASK_WRITE_OP_DONE          (1&lt;&lt;1)</div><div class='del'>-#define INT_MASK_DATA_TRAN              (1&lt;&lt;0)</div><div class='del'>-#define INT_ALL                         (0x7f)</div><div class='head'>diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c<br/>index 032b84791a16..f0fcce40cd8d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/mmci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/mmci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/mmci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/mmci.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='hunk'>@@ -25,6 +26,7 @@</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/of_gpio.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/dmaengine.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='hunk'>@@ -94,6 +96,17 @@ static struct variant_data variant_u300 = {</div><div class='ctx'> 	.signal_direction	= true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct variant_data variant_nomadik = {</div><div class='add'>+	.fifosize		= 16 * 4,</div><div class='add'>+	.fifohalfsize		= 8 * 4,</div><div class='add'>+	.clkreg			= MCI_CLK_ENABLE,</div><div class='add'>+	.datalength_bits	= 24,</div><div class='add'>+	.sdio			= true,</div><div class='add'>+	.st_clkdiv		= true,</div><div class='add'>+	.pwrreg_powerup		= MCI_PWR_ON,</div><div class='add'>+	.signal_direction	= true,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct variant_data variant_ux500 = {</div><div class='ctx'> 	.fifosize		= 30 * 4,</div><div class='ctx'> 	.fifohalfsize		= 8 * 4,</div><div class='hunk'>@@ -1196,21 +1209,76 @@ static const struct mmc_host_ops mmci_ops = {</div><div class='ctx'> 	.get_cd		= mmci_get_cd,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static void mmci_dt_populate_generic_pdata(struct device_node *np,</div><div class='add'>+					struct mmci_platform_data *pdata)</div><div class='add'>+{</div><div class='add'>+	int bus_width = 0;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;gpio_wp = of_get_named_gpio(np, "wp-gpios", 0);</div><div class='add'>+	if (!pdata-&gt;gpio_wp)</div><div class='add'>+		pdata-&gt;gpio_wp = -1;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;gpio_cd = of_get_named_gpio(np, "cd-gpios", 0);</div><div class='add'>+	if (!pdata-&gt;gpio_cd)</div><div class='add'>+		pdata-&gt;gpio_cd = -1;</div><div class='add'>+</div><div class='add'>+	if (of_get_property(np, "cd-inverted", NULL))</div><div class='add'>+		pdata-&gt;cd_invert = true;</div><div class='add'>+	else</div><div class='add'>+		pdata-&gt;cd_invert = false;</div><div class='add'>+</div><div class='add'>+	of_property_read_u32(np, "max-frequency", &amp;pdata-&gt;f_max);</div><div class='add'>+	if (!pdata-&gt;f_max)</div><div class='add'>+		pr_warn("%s has no 'max-frequency' property\n", np-&gt;full_name);</div><div class='add'>+</div><div class='add'>+	if (of_get_property(np, "mmc-cap-mmc-highspeed", NULL))</div><div class='add'>+		pdata-&gt;capabilities |= MMC_CAP_MMC_HIGHSPEED;</div><div class='add'>+	if (of_get_property(np, "mmc-cap-sd-highspeed", NULL))</div><div class='add'>+		pdata-&gt;capabilities |= MMC_CAP_SD_HIGHSPEED;</div><div class='add'>+</div><div class='add'>+	of_property_read_u32(np, "bus-width", &amp;bus_width);</div><div class='add'>+	switch (bus_width) {</div><div class='add'>+	case 0 :</div><div class='add'>+		/* No bus-width supplied. */</div><div class='add'>+		break;</div><div class='add'>+	case 4 :</div><div class='add'>+		pdata-&gt;capabilities |= MMC_CAP_4_BIT_DATA;</div><div class='add'>+		break;</div><div class='add'>+	case 8 :</div><div class='add'>+		pdata-&gt;capabilities |= MMC_CAP_8_BIT_DATA;</div><div class='add'>+		break;</div><div class='add'>+	default :</div><div class='add'>+		pr_warn("%s: Unsupported bus width\n", np-&gt;full_name);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void mmci_dt_populate_generic_pdata(struct device_node *np,</div><div class='add'>+					struct mmci_platform_data *pdata)</div><div class='add'>+{</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int __devinit mmci_probe(struct amba_device *dev,</div><div class='ctx'> 	const struct amba_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct mmci_platform_data *plat = dev-&gt;dev.platform_data;</div><div class='add'>+	struct device_node *np = dev-&gt;dev.of_node;</div><div class='ctx'> 	struct variant_data *variant = id-&gt;data;</div><div class='ctx'> 	struct mmci_host *host;</div><div class='ctx'> 	struct mmc_host *mmc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/* must have platform data */</div><div class='del'>-	if (!plat) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out;</div><div class='add'>+	/* Must have platform data or Device Tree. */</div><div class='add'>+	if (!plat &amp;&amp; !np) {</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "No plat data or DT found\n");</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (np)</div><div class='add'>+		mmci_dt_populate_generic_pdata(np, plat);</div><div class='add'>+</div><div class='ctx'> 	ret = amba_request_regions(dev, DRIVER_NAME);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -1397,7 +1465,7 @@ static int __devinit mmci_probe(struct amba_device *dev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unmap;</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;irq[1] == NO_IRQ || !dev-&gt;irq[1])</div><div class='add'>+	if (!dev-&gt;irq[1])</div><div class='ctx'> 		host-&gt;singleirq = true;</div><div class='ctx'> 	else {</div><div class='ctx'> 		ret = request_irq(dev-&gt;irq[1], mmci_pio_irq, IRQF_SHARED,</div><div class='hunk'>@@ -1569,6 +1637,11 @@ static struct amba_id mmci_ids[] = {</div><div class='ctx'> 		.data	= &amp;variant_u300,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='add'>+		.id     = 0x10180180,</div><div class='add'>+		.mask   = 0xf0ffffff,</div><div class='add'>+		.data	= &amp;variant_nomadik,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		.id     = 0x00280180,</div><div class='ctx'> 		.mask   = 0x00ffffff,</div><div class='ctx'> 		.data	= &amp;variant_u300,</div><div class='head'>diff --git a/drivers/mmc/host/mvsdio.c b/drivers/mmc/host/mvsdio.c<br/>index eeb8cd125b0c..3b9136c1a475 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/mvsdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/mvsdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/mvsdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/mvsdio.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/mmc/host.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -51,6 +52,7 @@ struct mvsd_host {</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	int irq;</div><div class='add'>+	struct clk *clk;</div><div class='ctx'> 	int gpio_card_detect;</div><div class='ctx'> 	int gpio_write_protect;</div><div class='ctx'> };</div><div class='hunk'>@@ -770,6 +772,13 @@ static int __init mvsd_probe(struct platform_device *pdev)</div><div class='ctx'> 	} else</div><div class='ctx'> 		host-&gt;irq = irq;</div><div class='ctx'> </div><div class='add'>+	/* Not all platforms can gate the clock, so it is not</div><div class='add'>+	   an error if the clock does not exists. */</div><div class='add'>+	host-&gt;clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (!IS_ERR(host-&gt;clk)) {</div><div class='add'>+		clk_prepare_enable(host-&gt;clk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (mvsd_data-&gt;gpio_card_detect) {</div><div class='ctx'> 		ret = gpio_request(mvsd_data-&gt;gpio_card_detect,</div><div class='ctx'> 				   DRIVER_NAME " cd");</div><div class='hunk'>@@ -854,6 +863,11 @@ static int __exit mvsd_remove(struct platform_device *pdev)</div><div class='ctx'> 		mvsd_power_down(host);</div><div class='ctx'> 		iounmap(host-&gt;base);</div><div class='ctx'> 		release_resource(host-&gt;res);</div><div class='add'>+</div><div class='add'>+		if (!IS_ERR(host-&gt;clk)) {</div><div class='add'>+			clk_disable_unprepare(host-&gt;clk);</div><div class='add'>+			clk_put(host-&gt;clk);</div><div class='add'>+		}</div><div class='ctx'> 		mmc_free_host(mmc);</div><div class='ctx'> 	}</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='head'>diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c<br/>index b2058b432320..28ed52d58f7f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/mxcmmc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/mxcmmc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/mxcmmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/mxcmmc.c</a></div><div class='hunk'>@@ -136,7 +136,8 @@ struct mxcmci_host {</div><div class='ctx'> 	u16			rev_no;</div><div class='ctx'> 	unsigned int		cmdat;</div><div class='ctx'> </div><div class='del'>-	struct clk		*clk;</div><div class='add'>+	struct clk		*clk_ipg;</div><div class='add'>+	struct clk		*clk_per;</div><div class='ctx'> </div><div class='ctx'> 	int			clock;</div><div class='ctx'> </div><div class='hunk'>@@ -672,7 +673,7 @@ static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int divider;</div><div class='ctx'> 	int prescaler = 0;</div><div class='del'>-	unsigned int clk_in = clk_get_rate(host-&gt;clk);</div><div class='add'>+	unsigned int clk_in = clk_get_rate(host-&gt;clk_per);</div><div class='ctx'> </div><div class='ctx'> 	while (prescaler &lt;= 0x800) {</div><div class='ctx'> 		for (divider = 1; divider &lt;= 0xF; divider++) {</div><div class='hunk'>@@ -900,12 +901,20 @@ static int mxcmci_probe(struct platform_device *pdev)</div><div class='ctx'> 	host-&gt;res = r;</div><div class='ctx'> 	host-&gt;irq = irq;</div><div class='ctx'> </div><div class='del'>-	host-&gt;clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='del'>-	if (IS_ERR(host-&gt;clk)) {</div><div class='del'>-		ret = PTR_ERR(host-&gt;clk);</div><div class='add'>+	host-&gt;clk_ipg = devm_clk_get(&amp;pdev-&gt;dev, "ipg");</div><div class='add'>+	if (IS_ERR(host-&gt;clk_ipg)) {</div><div class='add'>+		ret = PTR_ERR(host-&gt;clk_ipg);</div><div class='ctx'> 		goto out_iounmap;</div><div class='ctx'> 	}</div><div class='del'>-	clk_enable(host-&gt;clk);</div><div class='add'>+</div><div class='add'>+	host-&gt;clk_per = devm_clk_get(&amp;pdev-&gt;dev, "per");</div><div class='add'>+	if (IS_ERR(host-&gt;clk_per)) {</div><div class='add'>+		ret = PTR_ERR(host-&gt;clk_per);</div><div class='add'>+		goto out_iounmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk_prepare_enable(host-&gt;clk_per);</div><div class='add'>+	clk_prepare_enable(host-&gt;clk_ipg);</div><div class='ctx'> </div><div class='ctx'> 	mxcmci_softreset(host);</div><div class='ctx'> </div><div class='hunk'>@@ -917,8 +926,8 @@ static int mxcmci_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto out_clk_put;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mmc-&gt;f_min = clk_get_rate(host-&gt;clk) &gt;&gt; 16;</div><div class='del'>-	mmc-&gt;f_max = clk_get_rate(host-&gt;clk) &gt;&gt; 1;</div><div class='add'>+	mmc-&gt;f_min = clk_get_rate(host-&gt;clk_per) &gt;&gt; 16;</div><div class='add'>+	mmc-&gt;f_max = clk_get_rate(host-&gt;clk_per) &gt;&gt; 1;</div><div class='ctx'> </div><div class='ctx'> 	/* recommended in data sheet */</div><div class='ctx'> 	writew(0x2db4, host-&gt;base + MMC_REG_READ_TO);</div><div class='hunk'>@@ -967,8 +976,8 @@ out_free_dma:</div><div class='ctx'> 	if (host-&gt;dma)</div><div class='ctx'> 		dma_release_channel(host-&gt;dma);</div><div class='ctx'> out_clk_put:</div><div class='del'>-	clk_disable(host-&gt;clk);</div><div class='del'>-	clk_put(host-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(host-&gt;clk_per);</div><div class='add'>+	clk_disable_unprepare(host-&gt;clk_ipg);</div><div class='ctx'> out_iounmap:</div><div class='ctx'> 	iounmap(host-&gt;base);</div><div class='ctx'> out_free:</div><div class='hunk'>@@ -999,8 +1008,8 @@ static int mxcmci_remove(struct platform_device *pdev)</div><div class='ctx'> 	if (host-&gt;dma)</div><div class='ctx'> 		dma_release_channel(host-&gt;dma);</div><div class='ctx'> </div><div class='del'>-	clk_disable(host-&gt;clk);</div><div class='del'>-	clk_put(host-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(host-&gt;clk_per);</div><div class='add'>+	clk_disable_unprepare(host-&gt;clk_ipg);</div><div class='ctx'> </div><div class='ctx'> 	release_mem_region(host-&gt;res-&gt;start, resource_size(host-&gt;res));</div><div class='ctx'> </div><div class='hunk'>@@ -1018,7 +1027,8 @@ static int mxcmci_suspend(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (mmc)</div><div class='ctx'> 		ret = mmc_suspend_host(mmc);</div><div class='del'>-	clk_disable(host-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(host-&gt;clk_per);</div><div class='add'>+	clk_disable_unprepare(host-&gt;clk_ipg);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1029,7 +1039,8 @@ static int mxcmci_resume(struct device *dev)</div><div class='ctx'> 	struct mxcmci_host *host = mmc_priv(mmc);</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	clk_enable(host-&gt;clk);</div><div class='add'>+	clk_prepare_enable(host-&gt;clk_per);</div><div class='add'>+	clk_prepare_enable(host-&gt;clk_ipg);</div><div class='ctx'> 	if (mmc)</div><div class='ctx'> 		ret = mmc_resume_host(mmc);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c<br/>index e3f5af96ab87..34a90266ab11 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/mxs-mmc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/mxs-mmc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/mxs-mmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/mxs-mmc.c</a></div><div class='hunk'>@@ -23,6 +23,9 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of_gpio.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='hunk'>@@ -39,18 +42,16 @@</div><div class='ctx'> #include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/fsl/mxs-dma.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/mxs.h&gt;</div><div class='del'>-#include &lt;mach/common.h&gt;</div><div class='del'>-#include &lt;mach/mmc.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='add'>+#include &lt;linux/stmp_device.h&gt;</div><div class='add'>+#include &lt;linux/mmc/mxs-mmc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DRIVER_NAME	"mxs-mmc"</div><div class='ctx'> </div><div class='ctx'> /* card detect polling timeout */</div><div class='ctx'> #define MXS_MMC_DETECT_TIMEOUT			(HZ/2)</div><div class='ctx'> </div><div class='del'>-#define SSP_VERSION_LATEST	4</div><div class='del'>-#define ssp_is_old()		(host-&gt;version &lt; SSP_VERSION_LATEST)</div><div class='add'>+#define ssp_is_old(host)	((host)-&gt;devid == IMX23_MMC)</div><div class='ctx'> </div><div class='ctx'> /* SSP registers */</div><div class='ctx'> #define HW_SSP_CTRL0				0x000</div><div class='hunk'>@@ -85,14 +86,14 @@</div><div class='ctx'> #define  BM_SSP_BLOCK_SIZE_BLOCK_COUNT		(0xffffff &lt;&lt; 4)</div><div class='ctx'> #define  BP_SSP_BLOCK_SIZE_BLOCK_SIZE		(0)</div><div class='ctx'> #define  BM_SSP_BLOCK_SIZE_BLOCK_SIZE		(0xf)</div><div class='del'>-#define HW_SSP_TIMING				(ssp_is_old() ? 0x050 : 0x070)</div><div class='add'>+#define HW_SSP_TIMING(h)			(ssp_is_old(h) ? 0x050 : 0x070)</div><div class='ctx'> #define  BP_SSP_TIMING_TIMEOUT			(16)</div><div class='ctx'> #define  BM_SSP_TIMING_TIMEOUT			(0xffff &lt;&lt; 16)</div><div class='ctx'> #define  BP_SSP_TIMING_CLOCK_DIVIDE		(8)</div><div class='ctx'> #define  BM_SSP_TIMING_CLOCK_DIVIDE		(0xff &lt;&lt; 8)</div><div class='ctx'> #define  BP_SSP_TIMING_CLOCK_RATE		(0)</div><div class='ctx'> #define  BM_SSP_TIMING_CLOCK_RATE		(0xff)</div><div class='del'>-#define HW_SSP_CTRL1				(ssp_is_old() ? 0x060 : 0x080)</div><div class='add'>+#define HW_SSP_CTRL1(h)				(ssp_is_old(h) ? 0x060 : 0x080)</div><div class='ctx'> #define  BM_SSP_CTRL1_SDIO_IRQ			(1 &lt;&lt; 31)</div><div class='ctx'> #define  BM_SSP_CTRL1_SDIO_IRQ_EN		(1 &lt;&lt; 30)</div><div class='ctx'> #define  BM_SSP_CTRL1_RESP_ERR_IRQ		(1 &lt;&lt; 29)</div><div class='hunk'>@@ -115,15 +116,13 @@</div><div class='ctx'> #define  BM_SSP_CTRL1_WORD_LENGTH		(0xf &lt;&lt; 4)</div><div class='ctx'> #define  BP_SSP_CTRL1_SSP_MODE			(0)</div><div class='ctx'> #define  BM_SSP_CTRL1_SSP_MODE			(0xf)</div><div class='del'>-#define HW_SSP_SDRESP0				(ssp_is_old() ? 0x080 : 0x0a0)</div><div class='del'>-#define HW_SSP_SDRESP1				(ssp_is_old() ? 0x090 : 0x0b0)</div><div class='del'>-#define HW_SSP_SDRESP2				(ssp_is_old() ? 0x0a0 : 0x0c0)</div><div class='del'>-#define HW_SSP_SDRESP3				(ssp_is_old() ? 0x0b0 : 0x0d0)</div><div class='del'>-#define HW_SSP_STATUS				(ssp_is_old() ? 0x0c0 : 0x100)</div><div class='add'>+#define HW_SSP_SDRESP0(h)			(ssp_is_old(h) ? 0x080 : 0x0a0)</div><div class='add'>+#define HW_SSP_SDRESP1(h)			(ssp_is_old(h) ? 0x090 : 0x0b0)</div><div class='add'>+#define HW_SSP_SDRESP2(h)			(ssp_is_old(h) ? 0x0a0 : 0x0c0)</div><div class='add'>+#define HW_SSP_SDRESP3(h)			(ssp_is_old(h) ? 0x0b0 : 0x0d0)</div><div class='add'>+#define HW_SSP_STATUS(h)			(ssp_is_old(h) ? 0x0c0 : 0x100)</div><div class='ctx'> #define  BM_SSP_STATUS_CARD_DETECT		(1 &lt;&lt; 28)</div><div class='ctx'> #define  BM_SSP_STATUS_SDIO_IRQ			(1 &lt;&lt; 17)</div><div class='del'>-#define HW_SSP_VERSION				(cpu_is_mx23() ? 0x110 : 0x130)</div><div class='del'>-#define  BP_SSP_VERSION_MAJOR			(24)</div><div class='ctx'> </div><div class='ctx'> #define BF_SSP(value, field)	(((value) &lt;&lt; BP_SSP_##field) &amp; BM_SSP_##field)</div><div class='ctx'> </div><div class='hunk'>@@ -138,6 +137,11 @@</div><div class='ctx'> </div><div class='ctx'> #define SSP_PIO_NUM	3</div><div class='ctx'> </div><div class='add'>+enum mxs_mmc_id {</div><div class='add'>+	IMX23_MMC,</div><div class='add'>+	IMX28_MMC,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mxs_mmc_host {</div><div class='ctx'> 	struct mmc_host			*mmc;</div><div class='ctx'> 	struct mmc_request		*mrq;</div><div class='hunk'>@@ -145,9 +149,7 @@ struct mxs_mmc_host {</div><div class='ctx'> 	struct mmc_data			*data;</div><div class='ctx'> </div><div class='ctx'> 	void __iomem			*base;</div><div class='del'>-	int				irq;</div><div class='del'>-	struct resource			*res;</div><div class='del'>-	struct resource			*dma_res;</div><div class='add'>+	int				dma_channel;</div><div class='ctx'> 	struct clk			*clk;</div><div class='ctx'> 	unsigned int			clk_rate;</div><div class='ctx'> </div><div class='hunk'>@@ -157,32 +159,28 @@ struct mxs_mmc_host {</div><div class='ctx'> 	enum dma_transfer_direction	slave_dirn;</div><div class='ctx'> 	u32				ssp_pio_words[SSP_PIO_NUM];</div><div class='ctx'> </div><div class='del'>-	unsigned int			version;</div><div class='add'>+	enum mxs_mmc_id			devid;</div><div class='ctx'> 	unsigned char			bus_width;</div><div class='ctx'> 	spinlock_t			lock;</div><div class='ctx'> 	int				sdio_irq_en;</div><div class='add'>+	int				wp_gpio;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int mxs_mmc_get_ro(struct mmc_host *mmc)</div><div class='ctx'> {</div><div class='ctx'> 	struct mxs_mmc_host *host = mmc_priv(mmc);</div><div class='del'>-	struct mxs_mmc_platform_data *pdata =</div><div class='del'>-		mmc_dev(host-&gt;mmc)-&gt;platform_data;</div><div class='del'>-</div><div class='del'>-	if (!pdata)</div><div class='del'>-		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	if (!gpio_is_valid(pdata-&gt;wp_gpio))</div><div class='add'>+	if (!gpio_is_valid(host-&gt;wp_gpio))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return gpio_get_value(pdata-&gt;wp_gpio);</div><div class='add'>+	return gpio_get_value(host-&gt;wp_gpio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mxs_mmc_get_cd(struct mmc_host *mmc)</div><div class='ctx'> {</div><div class='ctx'> 	struct mxs_mmc_host *host = mmc_priv(mmc);</div><div class='ctx'> </div><div class='del'>-	return !(readl(host-&gt;base + HW_SSP_STATUS) &amp;</div><div class='add'>+	return !(readl(host-&gt;base + HW_SSP_STATUS(host)) &amp;</div><div class='ctx'> 		 BM_SSP_STATUS_CARD_DETECT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -190,7 +188,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host)</div><div class='ctx'> {</div><div class='ctx'> 	u32 ctrl0, ctrl1;</div><div class='ctx'> </div><div class='del'>-	mxs_reset_block(host-&gt;base);</div><div class='add'>+	stmp_reset_block(host-&gt;base);</div><div class='ctx'> </div><div class='ctx'> 	ctrl0 = BM_SSP_CTRL0_IGNORE_CRC;</div><div class='ctx'> 	ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) |</div><div class='hunk'>@@ -206,7 +204,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host)</div><div class='ctx'> 	writel(BF_SSP(0xffff, TIMING_TIMEOUT) |</div><div class='ctx'> 	       BF_SSP(2, TIMING_CLOCK_DIVIDE) |</div><div class='ctx'> 	       BF_SSP(0, TIMING_CLOCK_RATE),</div><div class='del'>-	       host-&gt;base + HW_SSP_TIMING);</div><div class='add'>+	       host-&gt;base + HW_SSP_TIMING(host));</div><div class='ctx'> </div><div class='ctx'> 	if (host-&gt;sdio_irq_en) {</div><div class='ctx'> 		ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;</div><div class='hunk'>@@ -214,7 +212,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	writel(ctrl0, host-&gt;base + HW_SSP_CTRL0);</div><div class='del'>-	writel(ctrl1, host-&gt;base + HW_SSP_CTRL1);</div><div class='add'>+	writel(ctrl1, host-&gt;base + HW_SSP_CTRL1(host));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,</div><div class='hunk'>@@ -228,12 +226,12 @@ static void mxs_mmc_request_done(struct mxs_mmc_host *host)</div><div class='ctx'> </div><div class='ctx'> 	if (mmc_resp_type(cmd) &amp; MMC_RSP_PRESENT) {</div><div class='ctx'> 		if (mmc_resp_type(cmd) &amp; MMC_RSP_136) {</div><div class='del'>-			cmd-&gt;resp[3] = readl(host-&gt;base + HW_SSP_SDRESP0);</div><div class='del'>-			cmd-&gt;resp[2] = readl(host-&gt;base + HW_SSP_SDRESP1);</div><div class='del'>-			cmd-&gt;resp[1] = readl(host-&gt;base + HW_SSP_SDRESP2);</div><div class='del'>-			cmd-&gt;resp[0] = readl(host-&gt;base + HW_SSP_SDRESP3);</div><div class='add'>+			cmd-&gt;resp[3] = readl(host-&gt;base + HW_SSP_SDRESP0(host));</div><div class='add'>+			cmd-&gt;resp[2] = readl(host-&gt;base + HW_SSP_SDRESP1(host));</div><div class='add'>+			cmd-&gt;resp[1] = readl(host-&gt;base + HW_SSP_SDRESP2(host));</div><div class='add'>+			cmd-&gt;resp[0] = readl(host-&gt;base + HW_SSP_SDRESP3(host));</div><div class='ctx'> 		} else {</div><div class='del'>-			cmd-&gt;resp[0] = readl(host-&gt;base + HW_SSP_SDRESP0);</div><div class='add'>+			cmd-&gt;resp[0] = readl(host-&gt;base + HW_SSP_SDRESP0(host));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -276,9 +274,9 @@ static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;host-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	stat = readl(host-&gt;base + HW_SSP_CTRL1);</div><div class='add'>+	stat = readl(host-&gt;base + HW_SSP_CTRL1(host));</div><div class='ctx'> 	writel(stat &amp; MXS_MMC_IRQ_BITS,</div><div class='del'>-	       host-&gt;base + HW_SSP_CTRL1 + MXS_CLR_ADDR);</div><div class='add'>+	       host-&gt;base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_CLR);</div><div class='ctx'> </div><div class='ctx'> 	if ((stat &amp; BM_SSP_CTRL1_SDIO_IRQ) &amp;&amp; (stat &amp; BM_SSP_CTRL1_SDIO_IRQ_EN))</div><div class='ctx'> 		mmc_signal_sdio_irq(host-&gt;mmc);</div><div class='hunk'>@@ -484,7 +482,7 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host)</div><div class='ctx'> 		blocks = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* xfer count, block size and count need to be set differently */</div><div class='del'>-	if (ssp_is_old()) {</div><div class='add'>+	if (ssp_is_old(host)) {</div><div class='ctx'> 		ctrl0 |= BF_SSP(data_size, CTRL0_XFER_COUNT);</div><div class='ctx'> 		cmd0 |= BF_SSP(log2_blksz, CMD0_BLOCK_SIZE) |</div><div class='ctx'> 			BF_SSP(blocks - 1, CMD0_BLOCK_COUNT);</div><div class='hunk'>@@ -508,10 +506,10 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host)</div><div class='ctx'> </div><div class='ctx'> 	/* set the timeout count */</div><div class='ctx'> 	timeout = mxs_ns_to_ssp_ticks(host-&gt;clk_rate, data-&gt;timeout_ns);</div><div class='del'>-	val = readl(host-&gt;base + HW_SSP_TIMING);</div><div class='add'>+	val = readl(host-&gt;base + HW_SSP_TIMING(host));</div><div class='ctx'> 	val &amp;= ~(BM_SSP_TIMING_TIMEOUT);</div><div class='ctx'> 	val |= BF_SSP(timeout, TIMING_TIMEOUT);</div><div class='del'>-	writel(val, host-&gt;base + HW_SSP_TIMING);</div><div class='add'>+	writel(val, host-&gt;base + HW_SSP_TIMING(host));</div><div class='ctx'> </div><div class='ctx'> 	/* pio */</div><div class='ctx'> 	host-&gt;ssp_pio_words[0] = ctrl0;</div><div class='hunk'>@@ -597,11 +595,11 @@ static void mxs_mmc_set_clk_rate(struct mxs_mmc_host *host, unsigned int rate)</div><div class='ctx'> </div><div class='ctx'> 	ssp_sck = ssp_clk / clock_divide / (1 + clock_rate);</div><div class='ctx'> </div><div class='del'>-	val = readl(host-&gt;base + HW_SSP_TIMING);</div><div class='add'>+	val = readl(host-&gt;base + HW_SSP_TIMING(host));</div><div class='ctx'> 	val &amp;= ~(BM_SSP_TIMING_CLOCK_DIVIDE | BM_SSP_TIMING_CLOCK_RATE);</div><div class='ctx'> 	val |= BF_SSP(clock_divide, TIMING_CLOCK_DIVIDE);</div><div class='ctx'> 	val |= BF_SSP(clock_rate, TIMING_CLOCK_RATE);</div><div class='del'>-	writel(val, host-&gt;base + HW_SSP_TIMING);</div><div class='add'>+	writel(val, host-&gt;base + HW_SSP_TIMING(host));</div><div class='ctx'> </div><div class='ctx'> 	host-&gt;clk_rate = ssp_sck;</div><div class='ctx'> </div><div class='hunk'>@@ -636,18 +634,19 @@ static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,</div><div class='del'>-		       host-&gt;base + HW_SSP_CTRL0 + MXS_SET_ADDR);</div><div class='add'>+		       host-&gt;base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);</div><div class='ctx'> 		writel(BM_SSP_CTRL1_SDIO_IRQ_EN,</div><div class='del'>-		       host-&gt;base + HW_SSP_CTRL1 + MXS_SET_ADDR);</div><div class='add'>+		       host-&gt;base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_SET);</div><div class='ctx'> </div><div class='del'>-		if (readl(host-&gt;base + HW_SSP_STATUS) &amp; BM_SSP_STATUS_SDIO_IRQ)</div><div class='add'>+		if (readl(host-&gt;base + HW_SSP_STATUS(host)) &amp;</div><div class='add'>+				BM_SSP_STATUS_SDIO_IRQ)</div><div class='ctx'> 			mmc_signal_sdio_irq(host-&gt;mmc);</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='ctx'> 		writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,</div><div class='del'>-		       host-&gt;base + HW_SSP_CTRL0 + MXS_CLR_ADDR);</div><div class='add'>+		       host-&gt;base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);</div><div class='ctx'> 		writel(BM_SSP_CTRL1_SDIO_IRQ_EN,</div><div class='del'>-		       host-&gt;base + HW_SSP_CTRL1 + MXS_CLR_ADDR);</div><div class='add'>+		       host-&gt;base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_CLR);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;host-&gt;lock, flags);</div><div class='hunk'>@@ -668,7 +667,7 @@ static bool mxs_mmc_dma_filter(struct dma_chan *chan, void *param)</div><div class='ctx'> 	if (!mxs_dma_is_apbh(chan))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (chan-&gt;chan_id != host-&gt;dma_res-&gt;start)</div><div class='add'>+	if (chan-&gt;chan_id != host-&gt;dma_channel)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	chan-&gt;private = &amp;host-&gt;dma_data;</div><div class='hunk'>@@ -676,12 +675,36 @@ static bool mxs_mmc_dma_filter(struct dma_chan *chan, void *param)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct platform_device_id mxs_mmc_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "imx23-mmc",</div><div class='add'>+		.driver_data = IMX23_MMC,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "imx28-mmc",</div><div class='add'>+		.driver_data = IMX28_MMC,</div><div class='add'>+	}, {</div><div class='add'>+		/* sentinel */</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(platform, mxs_mmc_ids);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mxs_mmc_dt_ids[] = {</div><div class='add'>+	{ .compatible = "fsl,imx23-mmc", .data = (void *) IMX23_MMC, },</div><div class='add'>+	{ .compatible = "fsl,imx28-mmc", .data = (void *) IMX28_MMC, },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, mxs_mmc_dt_ids);</div><div class='add'>+</div><div class='ctx'> static int mxs_mmc_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	const struct of_device_id *of_id =</div><div class='add'>+			of_match_device(mxs_mmc_dt_ids, &amp;pdev-&gt;dev);</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='ctx'> 	struct mxs_mmc_host *host;</div><div class='ctx'> 	struct mmc_host *mmc;</div><div class='del'>-	struct resource *iores, *dmares, *r;</div><div class='add'>+	struct resource *iores, *dmares;</div><div class='ctx'> 	struct mxs_mmc_platform_data *pdata;</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='ctx'> 	int ret = 0, irq_err, irq_dma;</div><div class='ctx'> 	dma_cap_mask_t mask;</div><div class='ctx'> </div><div class='hunk'>@@ -689,40 +712,51 @@ static int mxs_mmc_probe(struct platform_device *pdev)</div><div class='ctx'> 	dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);</div><div class='ctx'> 	irq_err = platform_get_irq(pdev, 0);</div><div class='ctx'> 	irq_dma = platform_get_irq(pdev, 1);</div><div class='del'>-	if (!iores || !dmares || irq_err &lt; 0 || irq_dma &lt; 0)</div><div class='add'>+	if (!iores || irq_err &lt; 0 || irq_dma &lt; 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	r = request_mem_region(iores-&gt;start, resource_size(iores), pdev-&gt;name);</div><div class='del'>-	if (!r)</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='ctx'> 	mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &amp;pdev-&gt;dev);</div><div class='del'>-	if (!mmc) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out_release_mem;</div><div class='del'>-	}</div><div class='add'>+	if (!mmc)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	host = mmc_priv(mmc);</div><div class='del'>-	host-&gt;base = ioremap(r-&gt;start, resource_size(r));</div><div class='add'>+	host-&gt;base = devm_request_and_ioremap(&amp;pdev-&gt;dev, iores);</div><div class='ctx'> 	if (!host-&gt;base) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='add'>+		ret = -EADDRNOTAVAIL;</div><div class='ctx'> 		goto out_mmc_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* only major verion does matter */</div><div class='del'>-	host-&gt;version = readl(host-&gt;base + HW_SSP_VERSION) &gt;&gt;</div><div class='del'>-			BP_SSP_VERSION_MAJOR;</div><div class='add'>+	if (np) {</div><div class='add'>+		host-&gt;devid = (enum mxs_mmc_id) of_id-&gt;data;</div><div class='add'>+		/*</div><div class='add'>+		 * TODO: This is a temporary solution and should be changed</div><div class='add'>+		 * to use generic DMA binding later when the helpers get in.</div><div class='add'>+		 */</div><div class='add'>+		ret = of_property_read_u32(np, "fsl,ssp-dma-channel",</div><div class='add'>+					   &amp;host-&gt;dma_channel);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(mmc_dev(host-&gt;mmc),</div><div class='add'>+				"failed to get dma channel\n");</div><div class='add'>+			goto out_mmc_free;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		host-&gt;devid = pdev-&gt;id_entry-&gt;driver_data;</div><div class='add'>+		host-&gt;dma_channel = dmares-&gt;start;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	host-&gt;mmc = mmc;</div><div class='del'>-	host-&gt;res = r;</div><div class='del'>-	host-&gt;dma_res = dmares;</div><div class='del'>-	host-&gt;irq = irq_err;</div><div class='ctx'> 	host-&gt;sdio_irq_en = 0;</div><div class='ctx'> </div><div class='add'>+	pinctrl = devm_pinctrl_get_select_default(&amp;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(pinctrl)) {</div><div class='add'>+		ret = PTR_ERR(pinctrl);</div><div class='add'>+		goto out_mmc_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	host-&gt;clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='ctx'> 	if (IS_ERR(host-&gt;clk)) {</div><div class='ctx'> 		ret = PTR_ERR(host-&gt;clk);</div><div class='del'>-		goto out_iounmap;</div><div class='add'>+		goto out_mmc_free;</div><div class='ctx'> 	}</div><div class='ctx'> 	clk_prepare_enable(host-&gt;clk);</div><div class='ctx'> </div><div class='hunk'>@@ -744,11 +778,20 @@ static int mxs_mmc_probe(struct platform_device *pdev)</div><div class='ctx'> 		    MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL;</div><div class='ctx'> </div><div class='ctx'> 	pdata =	mmc_dev(host-&gt;mmc)-&gt;platform_data;</div><div class='del'>-	if (pdata) {</div><div class='add'>+	if (!pdata) {</div><div class='add'>+		u32 bus_width = 0;</div><div class='add'>+		of_property_read_u32(np, "bus-width", &amp;bus_width);</div><div class='add'>+		if (bus_width == 4)</div><div class='add'>+			mmc-&gt;caps |= MMC_CAP_4_BIT_DATA;</div><div class='add'>+		else if (bus_width == 8)</div><div class='add'>+			mmc-&gt;caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;</div><div class='add'>+		host-&gt;wp_gpio = of_get_named_gpio(np, "wp-gpios", 0);</div><div class='add'>+	} else {</div><div class='ctx'> 		if (pdata-&gt;flags &amp; SLOTF_8_BIT_CAPABLE)</div><div class='ctx'> 			mmc-&gt;caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;</div><div class='ctx'> 		if (pdata-&gt;flags &amp; SLOTF_4_BIT_CAPABLE)</div><div class='ctx'> 			mmc-&gt;caps |= MMC_CAP_4_BIT_DATA;</div><div class='add'>+		host-&gt;wp_gpio = pdata-&gt;wp_gpio;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mmc-&gt;f_min = 400000;</div><div class='hunk'>@@ -757,13 +800,14 @@ static int mxs_mmc_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	mmc-&gt;max_segs = 52;</div><div class='ctx'> 	mmc-&gt;max_blk_size = 1 &lt;&lt; 0xf;</div><div class='del'>-	mmc-&gt;max_blk_count = (ssp_is_old()) ? 0xff : 0xffffff;</div><div class='del'>-	mmc-&gt;max_req_size = (ssp_is_old()) ? 0xffff : 0xffffffff;</div><div class='add'>+	mmc-&gt;max_blk_count = (ssp_is_old(host)) ? 0xff : 0xffffff;</div><div class='add'>+	mmc-&gt;max_req_size = (ssp_is_old(host)) ? 0xffff : 0xffffffff;</div><div class='ctx'> 	mmc-&gt;max_seg_size = dma_get_max_seg_size(host-&gt;dmach-&gt;device-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, mmc);</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(host-&gt;irq, mxs_mmc_irq_handler, 0, DRIVER_NAME, host);</div><div class='add'>+	ret = devm_request_irq(&amp;pdev-&gt;dev, irq_err, mxs_mmc_irq_handler, 0,</div><div class='add'>+			       DRIVER_NAME, host);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_free_dma;</div><div class='ctx'> </div><div class='hunk'>@@ -771,26 +815,20 @@ static int mxs_mmc_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	ret = mmc_add_host(mmc);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out_free_irq;</div><div class='add'>+		goto out_free_dma;</div><div class='ctx'> </div><div class='ctx'> 	dev_info(mmc_dev(host-&gt;mmc), "initialized\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-out_free_irq:</div><div class='del'>-	free_irq(host-&gt;irq, host);</div><div class='ctx'> out_free_dma:</div><div class='ctx'> 	if (host-&gt;dmach)</div><div class='ctx'> 		dma_release_channel(host-&gt;dmach);</div><div class='ctx'> out_clk_put:</div><div class='ctx'> 	clk_disable_unprepare(host-&gt;clk);</div><div class='ctx'> 	clk_put(host-&gt;clk);</div><div class='del'>-out_iounmap:</div><div class='del'>-	iounmap(host-&gt;base);</div><div class='ctx'> out_mmc_free:</div><div class='ctx'> 	mmc_free_host(mmc);</div><div class='del'>-out_release_mem:</div><div class='del'>-	release_mem_region(iores-&gt;start, resource_size(iores));</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -798,12 +836,9 @@ static int mxs_mmc_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mmc_host *mmc = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct mxs_mmc_host *host = mmc_priv(mmc);</div><div class='del'>-	struct resource *res = host-&gt;res;</div><div class='ctx'> </div><div class='ctx'> 	mmc_remove_host(mmc);</div><div class='ctx'> </div><div class='del'>-	free_irq(host-&gt;irq, host);</div><div class='del'>-</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (host-&gt;dmach)</div><div class='hunk'>@@ -812,12 +847,8 @@ static int mxs_mmc_remove(struct platform_device *pdev)</div><div class='ctx'> 	clk_disable_unprepare(host-&gt;clk);</div><div class='ctx'> 	clk_put(host-&gt;clk);</div><div class='ctx'> </div><div class='del'>-	iounmap(host-&gt;base);</div><div class='del'>-</div><div class='ctx'> 	mmc_free_host(mmc);</div><div class='ctx'> </div><div class='del'>-	release_mem_region(res-&gt;start, resource_size(res));</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -857,11 +888,13 @@ static const struct dev_pm_ops mxs_mmc_pm_ops = {</div><div class='ctx'> static struct platform_driver mxs_mmc_driver = {</div><div class='ctx'> 	.probe		= mxs_mmc_probe,</div><div class='ctx'> 	.remove		= mxs_mmc_remove,</div><div class='add'>+	.id_table	= mxs_mmc_ids,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= DRIVER_NAME,</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> 		.pm	= &amp;mxs_mmc_pm_ops,</div><div class='add'>+		.of_match_table = mxs_mmc_dt_ids,</div><div class='ctx'> #endif</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c<br/>index 887c0e598cf3..552196c764d4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/omap.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/omap.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/omap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/omap.c</a></div><div class='hunk'>@@ -169,11 +169,11 @@ struct mmc_omap_host {</div><div class='ctx'> 	struct timer_list       clk_timer;</div><div class='ctx'> 	spinlock_t		clk_lock;     /* for changing enabled state */</div><div class='ctx'> 	unsigned int            fclk_enabled:1;</div><div class='add'>+	struct workqueue_struct *mmc_omap_wq;</div><div class='ctx'> </div><div class='ctx'> 	struct omap_mmc_platform_data *pdata;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct workqueue_struct *mmc_omap_wq;</div><div class='ctx'> </div><div class='ctx'> static void mmc_omap_fclk_offdelay(struct mmc_omap_slot *slot)</div><div class='ctx'> {</div><div class='hunk'>@@ -291,7 +291,7 @@ static void mmc_omap_release_slot(struct mmc_omap_slot *slot, int clk_enabled)</div><div class='ctx'> 		host-&gt;next_slot = new_slot;</div><div class='ctx'> 		host-&gt;mmc = new_slot-&gt;mmc;</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;host-&gt;slot_lock, flags);</div><div class='del'>-		queue_work(mmc_omap_wq, &amp;host-&gt;slot_release_work);</div><div class='add'>+		queue_work(host-&gt;mmc_omap_wq, &amp;host-&gt;slot_release_work);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -459,7 +459,7 @@ mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	host-&gt;stop_data = data;</div><div class='del'>-	queue_work(mmc_omap_wq, &amp;host-&gt;send_stop_work);</div><div class='add'>+	queue_work(host-&gt;mmc_omap_wq, &amp;host-&gt;send_stop_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -639,7 +639,7 @@ mmc_omap_cmd_timer(unsigned long data)</div><div class='ctx'> 		OMAP_MMC_WRITE(host, IE, 0);</div><div class='ctx'> 		disable_irq(host-&gt;irq);</div><div class='ctx'> 		host-&gt;abort = 1;</div><div class='del'>-		queue_work(mmc_omap_wq, &amp;host-&gt;cmd_abort_work);</div><div class='add'>+		queue_work(host-&gt;mmc_omap_wq, &amp;host-&gt;cmd_abort_work);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;host-&gt;slot_lock, flags);</div><div class='ctx'> }</div><div class='hunk'>@@ -828,7 +828,7 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)</div><div class='ctx'> 		host-&gt;abort = 1;</div><div class='ctx'> 		OMAP_MMC_WRITE(host, IE, 0);</div><div class='ctx'> 		disable_irq_nosync(host-&gt;irq);</div><div class='del'>-		queue_work(mmc_omap_wq, &amp;host-&gt;cmd_abort_work);</div><div class='add'>+		queue_work(host-&gt;mmc_omap_wq, &amp;host-&gt;cmd_abort_work);</div><div class='ctx'> 		return IRQ_HANDLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1389,13 +1389,13 @@ static void mmc_omap_remove_slot(struct mmc_omap_slot *slot)</div><div class='ctx'> </div><div class='ctx'> 	tasklet_kill(&amp;slot-&gt;cover_tasklet);</div><div class='ctx'> 	del_timer_sync(&amp;slot-&gt;cover_timer);</div><div class='del'>-	flush_workqueue(mmc_omap_wq);</div><div class='add'>+	flush_workqueue(slot-&gt;host-&gt;mmc_omap_wq);</div><div class='ctx'> </div><div class='ctx'> 	mmc_remove_host(mmc);</div><div class='ctx'> 	mmc_free_host(mmc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init mmc_omap_probe(struct platform_device *pdev)</div><div class='add'>+static int __devinit mmc_omap_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct omap_mmc_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='ctx'> 	struct mmc_omap_host *host = NULL;</div><div class='hunk'>@@ -1497,6 +1497,10 @@ static int __init mmc_omap_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	host-&gt;reg_shift = (cpu_is_omap7xx() ? 1 : 2);</div><div class='ctx'> </div><div class='add'>+	host-&gt;mmc_omap_wq = alloc_workqueue("mmc_omap", 0, 0);</div><div class='add'>+	if (!host-&gt;mmc_omap_wq)</div><div class='add'>+		goto err_plat_cleanup;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_plat_cleanup:</div><div class='hunk'>@@ -1518,7 +1522,7 @@ err_free_mem_region:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mmc_omap_remove(struct platform_device *pdev)</div><div class='add'>+static int __devexit mmc_omap_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mmc_omap_host *host = platform_get_drvdata(pdev);</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1542,6 +1546,7 @@ static int mmc_omap_remove(struct platform_device *pdev)</div><div class='ctx'> 	iounmap(host-&gt;virt_base);</div><div class='ctx'> 	release_mem_region(pdev-&gt;resource[0].start,</div><div class='ctx'> 			   pdev-&gt;resource[0].end - pdev-&gt;resource[0].start + 1);</div><div class='add'>+	destroy_workqueue(host-&gt;mmc_omap_wq);</div><div class='ctx'> </div><div class='ctx'> 	kfree(host);</div><div class='ctx'> </div><div class='hunk'>@@ -1599,7 +1604,8 @@ static int mmc_omap_resume(struct platform_device *pdev)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver mmc_omap_driver = {</div><div class='del'>-	.remove		= mmc_omap_remove,</div><div class='add'>+	.probe		= mmc_omap_probe,</div><div class='add'>+	.remove		= __devexit_p(mmc_omap_remove),</div><div class='ctx'> 	.suspend	= mmc_omap_suspend,</div><div class='ctx'> 	.resume		= mmc_omap_resume,</div><div class='ctx'> 	.driver		= {</div><div class='hunk'>@@ -1608,29 +1614,7 @@ static struct platform_driver mmc_omap_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init mmc_omap_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mmc_omap_wq = alloc_workqueue("mmc_omap", 0, 0);</div><div class='del'>-	if (!mmc_omap_wq)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ret = platform_driver_probe(&amp;mmc_omap_driver, mmc_omap_probe);</div><div class='del'>-	if (ret)</div><div class='del'>-		destroy_workqueue(mmc_omap_wq);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit mmc_omap_exit(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;mmc_omap_driver);</div><div class='del'>-	destroy_workqueue(mmc_omap_wq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(mmc_omap_init);</div><div class='del'>-module_exit(mmc_omap_exit);</div><div class='del'>-</div><div class='add'>+module_platform_driver(mmc_omap_driver);</div><div class='ctx'> MODULE_DESCRIPTION("OMAP Multimedia Card driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_ALIAS("platform:" DRIVER_NAME);</div><div class='head'>diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c<br/>index 56d4499d4388..9a7a60aeb19e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/omap_hsmmc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/omap_hsmmc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/omap_hsmmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/omap_hsmmc.c</a></div><div class='hunk'>@@ -85,12 +85,14 @@</div><div class='ctx'> #define BRR_ENABLE		(1 &lt;&lt; 5)</div><div class='ctx'> #define DTO_ENABLE		(1 &lt;&lt; 20)</div><div class='ctx'> #define INIT_STREAM		(1 &lt;&lt; 1)</div><div class='add'>+#define ACEN_ACMD12		(1 &lt;&lt; 2)</div><div class='ctx'> #define DP_SELECT		(1 &lt;&lt; 21)</div><div class='ctx'> #define DDIR			(1 &lt;&lt; 4)</div><div class='ctx'> #define DMA_EN			0x1</div><div class='ctx'> #define MSBS			(1 &lt;&lt; 5)</div><div class='ctx'> #define BCE			(1 &lt;&lt; 1)</div><div class='ctx'> #define FOUR_BIT		(1 &lt;&lt; 1)</div><div class='add'>+#define DDR			(1 &lt;&lt; 19)</div><div class='ctx'> #define DW8			(1 &lt;&lt; 5)</div><div class='ctx'> #define CC			0x1</div><div class='ctx'> #define TC			0x02</div><div class='hunk'>@@ -115,6 +117,7 @@</div><div class='ctx'> #define OMAP_MMC_MAX_CLOCK	52000000</div><div class='ctx'> #define DRIVER_NAME		"omap_hsmmc"</div><div class='ctx'> </div><div class='add'>+#define AUTO_CMD12		(1 &lt;&lt; 0)	/* Auto CMD12 support */</div><div class='ctx'> /*</div><div class='ctx'>  * One controller can have multiple slots, like on some omap boards using</div><div class='ctx'>  * omap.c controller driver. Luckily this is not currently done on any known</div><div class='hunk'>@@ -167,7 +170,6 @@ struct omap_hsmmc_host {</div><div class='ctx'> 	int			use_dma, dma_ch;</div><div class='ctx'> 	int			dma_line_tx, dma_line_rx;</div><div class='ctx'> 	int			slot_id;</div><div class='del'>-	int			got_dbclk;</div><div class='ctx'> 	int			response_busy;</div><div class='ctx'> 	int			context_loss;</div><div class='ctx'> 	int			vdd;</div><div class='hunk'>@@ -175,6 +177,7 @@ struct omap_hsmmc_host {</div><div class='ctx'> 	int			reqs_blocked;</div><div class='ctx'> 	int			use_reg;</div><div class='ctx'> 	int			req_in_progress;</div><div class='add'>+	unsigned int		flags;</div><div class='ctx'> 	struct omap_hsmmc_next	next_data;</div><div class='ctx'> </div><div class='ctx'> 	struct	omap_mmc_platform_data	*pdata;</div><div class='hunk'>@@ -520,6 +523,10 @@ static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host)</div><div class='ctx'> 	u32 con;</div><div class='ctx'> </div><div class='ctx'> 	con = OMAP_HSMMC_READ(host-&gt;base, CON);</div><div class='add'>+	if (ios-&gt;timing == MMC_TIMING_UHS_DDR50)</div><div class='add'>+		con |= DDR;	/* configure in DDR mode */</div><div class='add'>+	else</div><div class='add'>+		con &amp;= ~DDR;</div><div class='ctx'> 	switch (ios-&gt;bus_width) {</div><div class='ctx'> 	case MMC_BUS_WIDTH_8:</div><div class='ctx'> 		OMAP_HSMMC_WRITE(host-&gt;base, CON, con | DW8);</div><div class='hunk'>@@ -766,6 +773,8 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd,</div><div class='ctx'> 		cmdtype = 0x3;</div><div class='ctx'> </div><div class='ctx'> 	cmdreg = (cmd-&gt;opcode &lt;&lt; 24) | (resptype &lt;&lt; 16) | (cmdtype &lt;&lt; 22);</div><div class='add'>+	if ((host-&gt;flags &amp; AUTO_CMD12) &amp;&amp; mmc_op_multi(cmd-&gt;opcode))</div><div class='add'>+		cmdreg |= ACEN_ACMD12;</div><div class='ctx'> </div><div class='ctx'> 	if (data) {</div><div class='ctx'> 		cmdreg |= DP_SELECT | MSBS | BCE;</div><div class='hunk'>@@ -796,11 +805,12 @@ omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data)</div><div class='ctx'> static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq)</div><div class='ctx'> {</div><div class='ctx'> 	int dma_ch;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;host-&gt;irq_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;host-&gt;irq_lock, flags);</div><div class='ctx'> 	host-&gt;req_in_progress = 0;</div><div class='ctx'> 	dma_ch = host-&gt;dma_ch;</div><div class='del'>-	spin_unlock(&amp;host-&gt;irq_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;host-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	omap_hsmmc_disable_irq(host);</div><div class='ctx'> 	/* Do not complete the request if DMA is still in progress */</div><div class='hunk'>@@ -837,11 +847,14 @@ omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data)</div><div class='ctx'> 	else</div><div class='ctx'> 		data-&gt;bytes_xfered = 0;</div><div class='ctx'> </div><div class='del'>-	if (!data-&gt;stop) {</div><div class='add'>+	if (data-&gt;stop &amp;&amp; ((!(host-&gt;flags &amp; AUTO_CMD12)) || data-&gt;error)) {</div><div class='add'>+		omap_hsmmc_start_command(host, data-&gt;stop, NULL);</div><div class='add'>+	} else {</div><div class='add'>+		if (data-&gt;stop)</div><div class='add'>+			data-&gt;stop-&gt;resp[0] = OMAP_HSMMC_READ(host-&gt;base,</div><div class='add'>+							RSP76);</div><div class='ctx'> 		omap_hsmmc_request_done(host, data-&gt;mrq);</div><div class='del'>-		return;</div><div class='ctx'> 	}</div><div class='del'>-	omap_hsmmc_start_command(host, data-&gt;stop, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -874,13 +887,14 @@ omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd)</div><div class='ctx'> static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno)</div><div class='ctx'> {</div><div class='ctx'> 	int dma_ch;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	host-&gt;data-&gt;error = errno;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;host-&gt;irq_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;host-&gt;irq_lock, flags);</div><div class='ctx'> 	dma_ch = host-&gt;dma_ch;</div><div class='ctx'> 	host-&gt;dma_ch = -1;</div><div class='del'>-	spin_unlock(&amp;host-&gt;irq_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;host-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (host-&gt;use_dma &amp;&amp; dma_ch != -1) {</div><div class='ctx'> 		dma_unmap_sg(mmc_dev(host-&gt;mmc), host-&gt;data-&gt;sg,</div><div class='hunk'>@@ -1082,7 +1096,7 @@ static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd)</div><div class='ctx'> </div><div class='ctx'> 	/* Disable the clocks */</div><div class='ctx'> 	pm_runtime_put_sync(host-&gt;dev);</div><div class='del'>-	if (host-&gt;got_dbclk)</div><div class='add'>+	if (host-&gt;dbclk)</div><div class='ctx'> 		clk_disable(host-&gt;dbclk);</div><div class='ctx'> </div><div class='ctx'> 	/* Turn the power off */</div><div class='hunk'>@@ -1093,7 +1107,7 @@ static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd)</div><div class='ctx'> 		ret = mmc_slot(host).set_power(host-&gt;dev, host-&gt;slot_id, 1,</div><div class='ctx'> 					       vdd);</div><div class='ctx'> 	pm_runtime_get_sync(host-&gt;dev);</div><div class='del'>-	if (host-&gt;got_dbclk)</div><div class='add'>+	if (host-&gt;dbclk)</div><div class='ctx'> 		clk_enable(host-&gt;dbclk);</div><div class='ctx'> </div><div class='ctx'> 	if (ret != 0)</div><div class='hunk'>@@ -1234,6 +1248,7 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data)</div><div class='ctx'> 	struct omap_hsmmc_host *host = cb_data;</div><div class='ctx'> 	struct mmc_data *data;</div><div class='ctx'> 	int dma_ch, req_in_progress;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (!(ch_status &amp; OMAP_DMA_BLOCK_IRQ)) {</div><div class='ctx'> 		dev_warn(mmc_dev(host-&gt;mmc), "unexpected dma status %x\n",</div><div class='hunk'>@@ -1241,9 +1256,9 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;host-&gt;irq_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;host-&gt;irq_lock, flags);</div><div class='ctx'> 	if (host-&gt;dma_ch &lt; 0) {</div><div class='del'>-		spin_unlock(&amp;host-&gt;irq_lock);</div><div class='add'>+		spin_unlock_irqrestore(&amp;host-&gt;irq_lock, flags);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1253,7 +1268,7 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data)</div><div class='ctx'> 		/* Fire up the next transfer. */</div><div class='ctx'> 		omap_hsmmc_config_dma_params(host, data,</div><div class='ctx'> 					   data-&gt;sg + host-&gt;dma_sg_idx);</div><div class='del'>-		spin_unlock(&amp;host-&gt;irq_lock);</div><div class='add'>+		spin_unlock_irqrestore(&amp;host-&gt;irq_lock, flags);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1264,7 +1279,7 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data)</div><div class='ctx'> 	req_in_progress = host-&gt;req_in_progress;</div><div class='ctx'> 	dma_ch = host-&gt;dma_ch;</div><div class='ctx'> 	host-&gt;dma_ch = -1;</div><div class='del'>-	spin_unlock(&amp;host-&gt;irq_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;host-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	omap_free_dma(dma_ch);</div><div class='ctx'> </div><div class='hunk'>@@ -1766,7 +1781,7 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev)</div><div class='ctx'> 		pdata-&gt;slots[0].nonremovable = true;</div><div class='ctx'> 		pdata-&gt;slots[0].no_regulator_off_init = true;</div><div class='ctx'> 	}</div><div class='del'>-	of_property_read_u32(np, "ti,bus-width", &amp;bus_width);</div><div class='add'>+	of_property_read_u32(np, "bus-width", &amp;bus_width);</div><div class='ctx'> 	if (bus_width == 4)</div><div class='ctx'> 		pdata-&gt;slots[0].caps |= MMC_CAP_4_BIT_DATA;</div><div class='ctx'> 	else if (bus_width == 8)</div><div class='hunk'>@@ -1844,6 +1859,7 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)</div><div class='ctx'> 	host-&gt;mapbase	= res-&gt;start + pdata-&gt;reg_offset;</div><div class='ctx'> 	host-&gt;base	= ioremap(host-&gt;mapbase, SZ_4K);</div><div class='ctx'> 	host-&gt;power_mode = MMC_POWER_OFF;</div><div class='add'>+	host-&gt;flags	= AUTO_CMD12;</div><div class='ctx'> 	host-&gt;next_data.cookie = 1;</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, host);</div><div class='hunk'>@@ -1885,21 +1901,17 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	omap_hsmmc_context_save(host);</div><div class='ctx'> </div><div class='del'>-	if (cpu_is_omap2430()) {</div><div class='del'>-		host-&gt;dbclk = clk_get(&amp;pdev-&gt;dev, "mmchsdb_fck");</div><div class='del'>-		/*</div><div class='del'>-		 * MMC can still work without debounce clock.</div><div class='del'>-		 */</div><div class='del'>-		if (IS_ERR(host-&gt;dbclk))</div><div class='del'>-			dev_warn(mmc_dev(host-&gt;mmc),</div><div class='del'>-				"Failed to get debounce clock\n");</div><div class='del'>-		else</div><div class='del'>-			host-&gt;got_dbclk = 1;</div><div class='del'>-</div><div class='del'>-		if (host-&gt;got_dbclk)</div><div class='del'>-			if (clk_enable(host-&gt;dbclk) != 0)</div><div class='del'>-				dev_dbg(mmc_dev(host-&gt;mmc), "Enabling debounce"</div><div class='del'>-							" clk failed\n");</div><div class='add'>+	host-&gt;dbclk = clk_get(&amp;pdev-&gt;dev, "mmchsdb_fck");</div><div class='add'>+	/*</div><div class='add'>+	 * MMC can still work without debounce clock.</div><div class='add'>+	 */</div><div class='add'>+	if (IS_ERR(host-&gt;dbclk)) {</div><div class='add'>+		dev_warn(mmc_dev(host-&gt;mmc), "Failed to get debounce clk\n");</div><div class='add'>+		host-&gt;dbclk = NULL;</div><div class='add'>+	} else if (clk_enable(host-&gt;dbclk) != 0) {</div><div class='add'>+		dev_warn(mmc_dev(host-&gt;mmc), "Failed to enable debounce clk\n");</div><div class='add'>+		clk_put(host-&gt;dbclk);</div><div class='add'>+		host-&gt;dbclk = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Since we do only SG emulation, we can have as many segs</div><div class='hunk'>@@ -1969,7 +1981,7 @@ static int __devinit omap_hsmmc_probe(struct platform_device *pdev)</div><div class='ctx'> 		ret = request_threaded_irq(mmc_slot(host).card_detect_irq,</div><div class='ctx'> 					   NULL,</div><div class='ctx'> 					   omap_hsmmc_detect,</div><div class='del'>-					   IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,</div><div class='add'>+					   IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT,</div><div class='ctx'> 					   mmc_hostname(mmc), host);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_dbg(mmc_dev(host-&gt;mmc),</div><div class='hunk'>@@ -2019,7 +2031,7 @@ err_irq:</div><div class='ctx'> 	pm_runtime_put_sync(host-&gt;dev);</div><div class='ctx'> 	pm_runtime_disable(host-&gt;dev);</div><div class='ctx'> 	clk_put(host-&gt;fclk);</div><div class='del'>-	if (host-&gt;got_dbclk) {</div><div class='add'>+	if (host-&gt;dbclk) {</div><div class='ctx'> 		clk_disable(host-&gt;dbclk);</div><div class='ctx'> 		clk_put(host-&gt;dbclk);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2030,7 +2042,9 @@ err1:</div><div class='ctx'> err_alloc:</div><div class='ctx'> 	omap_hsmmc_gpio_free(pdata);</div><div class='ctx'> err:</div><div class='del'>-	release_mem_region(res-&gt;start, resource_size(res));</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (res)</div><div class='add'>+		release_mem_region(res-&gt;start, resource_size(res));</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2052,7 +2066,7 @@ static int __devexit omap_hsmmc_remove(struct platform_device *pdev)</div><div class='ctx'> 	pm_runtime_put_sync(host-&gt;dev);</div><div class='ctx'> 	pm_runtime_disable(host-&gt;dev);</div><div class='ctx'> 	clk_put(host-&gt;fclk);</div><div class='del'>-	if (host-&gt;got_dbclk) {</div><div class='add'>+	if (host-&gt;dbclk) {</div><div class='ctx'> 		clk_disable(host-&gt;dbclk);</div><div class='ctx'> 		clk_put(host-&gt;dbclk);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2110,7 +2124,7 @@ static int omap_hsmmc_suspend(struct device *dev)</div><div class='ctx'> 				OMAP_HSMMC_READ(host-&gt;base, HCTL) &amp; ~SDBP);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (host-&gt;got_dbclk)</div><div class='add'>+	if (host-&gt;dbclk)</div><div class='ctx'> 		clk_disable(host-&gt;dbclk);</div><div class='ctx'> err:</div><div class='ctx'> 	pm_runtime_put_sync(host-&gt;dev);</div><div class='hunk'>@@ -2131,7 +2145,7 @@ static int omap_hsmmc_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	pm_runtime_get_sync(host-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	if (host-&gt;got_dbclk)</div><div class='add'>+	if (host-&gt;dbclk)</div><div class='ctx'> 		clk_enable(host-&gt;dbclk);</div><div class='ctx'> </div><div class='ctx'> 	if (!(host-&gt;mmc-&gt;pm_flags &amp; MMC_PM_KEEP_POWER))</div><div class='head'>diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c<br/>index 8abdaf6697a8..ebbe984e5d00 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/sdhci-esdhc-imx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/sdhci-esdhc-imx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/sdhci-esdhc-imx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/sdhci-esdhc-imx.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_device.h&gt;</div><div class='ctx'> #include &lt;linux/of_gpio.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> #include &lt;mach/esdhc.h&gt;</div><div class='ctx'> #include "sdhci-pltfm.h"</div><div class='ctx'> #include "sdhci-esdhc.h"</div><div class='hunk'>@@ -68,7 +69,11 @@ struct pltfm_imx_data {</div><div class='ctx'> 	int flags;</div><div class='ctx'> 	u32 scratchpad;</div><div class='ctx'> 	enum imx_esdhc_type devtype;</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='ctx'> 	struct esdhc_platform_data boarddata;</div><div class='add'>+	struct clk *clk_ipg;</div><div class='add'>+	struct clk *clk_ahb;</div><div class='add'>+	struct clk *clk_per;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct platform_device_id imx_esdhc_devtype[] = {</div><div class='hunk'>@@ -402,7 +407,7 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,</div><div class='ctx'> 	if (!np)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (of_get_property(np, "fsl,card-wired", NULL))</div><div class='add'>+	if (of_get_property(np, "non-removable", NULL))</div><div class='ctx'> 		boarddata-&gt;cd_type = ESDHC_CD_PERMANENT;</div><div class='ctx'> </div><div class='ctx'> 	if (of_get_property(np, "fsl,cd-controller", NULL))</div><div class='hunk'>@@ -437,7 +442,6 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct sdhci_pltfm_host *pltfm_host;</div><div class='ctx'> 	struct sdhci_host *host;</div><div class='ctx'> 	struct esdhc_platform_data *boarddata;</div><div class='del'>-	struct clk *clk;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct pltfm_imx_data *imx_data;</div><div class='ctx'> </div><div class='hunk'>@@ -458,14 +462,35 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)</div><div class='ctx'> 	imx_data-&gt;devtype = pdev-&gt;id_entry-&gt;driver_data;</div><div class='ctx'> 	pltfm_host-&gt;priv = imx_data;</div><div class='ctx'> </div><div class='del'>-	clk = clk_get(mmc_dev(host-&gt;mmc), NULL);</div><div class='del'>-	if (IS_ERR(clk)) {</div><div class='del'>-		dev_err(mmc_dev(host-&gt;mmc), "clk err\n");</div><div class='del'>-		err = PTR_ERR(clk);</div><div class='add'>+	imx_data-&gt;clk_ipg = devm_clk_get(&amp;pdev-&gt;dev, "ipg");</div><div class='add'>+	if (IS_ERR(imx_data-&gt;clk_ipg)) {</div><div class='add'>+		err = PTR_ERR(imx_data-&gt;clk_ipg);</div><div class='ctx'> 		goto err_clk_get;</div><div class='ctx'> 	}</div><div class='del'>-	clk_prepare_enable(clk);</div><div class='del'>-	pltfm_host-&gt;clk = clk;</div><div class='add'>+</div><div class='add'>+	imx_data-&gt;clk_ahb = devm_clk_get(&amp;pdev-&gt;dev, "ahb");</div><div class='add'>+	if (IS_ERR(imx_data-&gt;clk_ahb)) {</div><div class='add'>+		err = PTR_ERR(imx_data-&gt;clk_ahb);</div><div class='add'>+		goto err_clk_get;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	imx_data-&gt;clk_per = devm_clk_get(&amp;pdev-&gt;dev, "per");</div><div class='add'>+	if (IS_ERR(imx_data-&gt;clk_per)) {</div><div class='add'>+		err = PTR_ERR(imx_data-&gt;clk_per);</div><div class='add'>+		goto err_clk_get;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pltfm_host-&gt;clk = imx_data-&gt;clk_per;</div><div class='add'>+</div><div class='add'>+	clk_prepare_enable(imx_data-&gt;clk_per);</div><div class='add'>+	clk_prepare_enable(imx_data-&gt;clk_ipg);</div><div class='add'>+	clk_prepare_enable(imx_data-&gt;clk_ahb);</div><div class='add'>+</div><div class='add'>+	imx_data-&gt;pinctrl = devm_pinctrl_get_select_default(&amp;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(imx_data-&gt;pinctrl)) {</div><div class='add'>+		err = PTR_ERR(imx_data-&gt;pinctrl);</div><div class='add'>+		goto pin_err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	host-&gt;quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;</div><div class='ctx'> </div><div class='hunk'>@@ -558,8 +583,10 @@ no_card_detect_irq:</div><div class='ctx'> 		gpio_free(boarddata-&gt;wp_gpio);</div><div class='ctx'> no_card_detect_pin:</div><div class='ctx'> no_board_data:</div><div class='del'>-	clk_disable_unprepare(pltfm_host-&gt;clk);</div><div class='del'>-	clk_put(pltfm_host-&gt;clk);</div><div class='add'>+pin_err:</div><div class='add'>+	clk_disable_unprepare(imx_data-&gt;clk_per);</div><div class='add'>+	clk_disable_unprepare(imx_data-&gt;clk_ipg);</div><div class='add'>+	clk_disable_unprepare(imx_data-&gt;clk_ahb);</div><div class='ctx'> err_clk_get:</div><div class='ctx'> 	kfree(imx_data);</div><div class='ctx'> err_imx_data:</div><div class='hunk'>@@ -585,8 +612,10 @@ static int __devexit sdhci_esdhc_imx_remove(struct platform_device *pdev)</div><div class='ctx'> 		gpio_free(boarddata-&gt;cd_gpio);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	clk_disable_unprepare(pltfm_host-&gt;clk);</div><div class='del'>-	clk_put(pltfm_host-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(imx_data-&gt;clk_per);</div><div class='add'>+	clk_disable_unprepare(imx_data-&gt;clk_ipg);</div><div class='add'>+	clk_disable_unprepare(imx_data-&gt;clk_ahb);</div><div class='add'>+</div><div class='ctx'> 	kfree(imx_data);</div><div class='ctx'> </div><div class='ctx'> 	sdhci_pltfm_free(pdev);</div><div class='head'>diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c<br/>index c5c2a48bdd94..d9a4ef4f1ed0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/sdhci-pltfm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/sdhci-pltfm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/sdhci-pltfm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/sdhci-pltfm.c</a></div><div class='hunk'>@@ -42,7 +42,8 @@ static struct sdhci_ops sdhci_pltfm_ops = {</div><div class='ctx'> #ifdef CONFIG_OF</div><div class='ctx'> static bool sdhci_of_wp_inverted(struct device_node *np)</div><div class='ctx'> {</div><div class='del'>-	if (of_get_property(np, "sdhci,wp-inverted", NULL))</div><div class='add'>+	if (of_get_property(np, "sdhci,wp-inverted", NULL) ||</div><div class='add'>+	    of_get_property(np, "wp-inverted", NULL))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	/* Old device trees don't have the wp-inverted property. */</div><div class='hunk'>@@ -59,13 +60,16 @@ void sdhci_get_of_property(struct platform_device *pdev)</div><div class='ctx'> 	struct sdhci_host *host = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);</div><div class='ctx'> 	const __be32 *clk;</div><div class='add'>+	u32 bus_width;</div><div class='ctx'> 	int size;</div><div class='ctx'> </div><div class='ctx'> 	if (of_device_is_available(np)) {</div><div class='ctx'> 		if (of_get_property(np, "sdhci,auto-cmd12", NULL))</div><div class='ctx'> 			host-&gt;quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;</div><div class='ctx'> </div><div class='del'>-		if (of_get_property(np, "sdhci,1-bit-only", NULL))</div><div class='add'>+		if (of_get_property(np, "sdhci,1-bit-only", NULL) ||</div><div class='add'>+		    (of_property_read_u32(np, "bus-width", &amp;bus_width) == 0 &amp;&amp;</div><div class='add'>+		    bus_width == 1))</div><div class='ctx'> 			host-&gt;quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;</div><div class='ctx'> </div><div class='ctx'> 		if (sdhci_of_wp_inverted(np))</div><div class='head'>diff --git a/drivers/mmc/host/sdhci-spear.c b/drivers/mmc/host/sdhci-spear.c<br/>index 6dfa82e03c7e..1fe32dfa7cd4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/sdhci-spear.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/sdhci-spear.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/sdhci-spear.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/sdhci-spear.c</a></div><div class='hunk'>@@ -75,8 +75,6 @@ static int __devinit sdhci_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct spear_sdhci *sdhci;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(pdev == NULL);</div><div class='del'>-</div><div class='ctx'> 	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	if (!iomem) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -84,18 +82,18 @@ static int __devinit sdhci_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!request_mem_region(iomem-&gt;start, resource_size(iomem),</div><div class='del'>-				"spear-sdhci")) {</div><div class='add'>+	if (!devm_request_mem_region(&amp;pdev-&gt;dev, iomem-&gt;start,</div><div class='add'>+				resource_size(iomem), "spear-sdhci")) {</div><div class='ctx'> 		ret = -EBUSY;</div><div class='ctx'> 		dev_dbg(&amp;pdev-&gt;dev, "cannot request region\n");</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sdhci = kzalloc(sizeof(*sdhci), GFP_KERNEL);</div><div class='add'>+	sdhci = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*sdhci), GFP_KERNEL);</div><div class='ctx'> 	if (!sdhci) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		dev_dbg(&amp;pdev-&gt;dev, "cannot allocate memory for sdhci\n");</div><div class='del'>-		goto err_kzalloc;</div><div class='add'>+		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* clk enable */</div><div class='hunk'>@@ -103,13 +101,13 @@ static int __devinit sdhci_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (IS_ERR(sdhci-&gt;clk)) {</div><div class='ctx'> 		ret = PTR_ERR(sdhci-&gt;clk);</div><div class='ctx'> 		dev_dbg(&amp;pdev-&gt;dev, "Error getting clock\n");</div><div class='del'>-		goto err_clk_get;</div><div class='add'>+		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = clk_enable(sdhci-&gt;clk);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_dbg(&amp;pdev-&gt;dev, "Error enabling clock\n");</div><div class='del'>-		goto err_clk_enb;</div><div class='add'>+		goto put_clk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* overwrite platform_data */</div><div class='hunk'>@@ -124,7 +122,7 @@ static int __devinit sdhci_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (IS_ERR(host)) {</div><div class='ctx'> 		ret = PTR_ERR(host);</div><div class='ctx'> 		dev_dbg(&amp;pdev-&gt;dev, "error allocating host\n");</div><div class='del'>-		goto err_alloc_host;</div><div class='add'>+		goto disable_clk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	host-&gt;hw_name = "sdhci";</div><div class='hunk'>@@ -132,17 +130,18 @@ static int __devinit sdhci_probe(struct platform_device *pdev)</div><div class='ctx'> 	host-&gt;irq = platform_get_irq(pdev, 0);</div><div class='ctx'> 	host-&gt;quirks = SDHCI_QUIRK_BROKEN_ADMA;</div><div class='ctx'> </div><div class='del'>-	host-&gt;ioaddr = ioremap(iomem-&gt;start, resource_size(iomem));</div><div class='add'>+	host-&gt;ioaddr = devm_ioremap(&amp;pdev-&gt;dev, iomem-&gt;start,</div><div class='add'>+			resource_size(iomem));</div><div class='ctx'> 	if (!host-&gt;ioaddr) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		dev_dbg(&amp;pdev-&gt;dev, "failed to remap registers\n");</div><div class='del'>-		goto err_ioremap;</div><div class='add'>+		goto free_host;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = sdhci_add_host(host);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_dbg(&amp;pdev-&gt;dev, "error adding host\n");</div><div class='del'>-		goto err_add_host;</div><div class='add'>+		goto free_host;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, host);</div><div class='hunk'>@@ -161,11 +160,12 @@ static int __devinit sdhci_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (sdhci-&gt;data-&gt;card_power_gpio &gt;= 0) {</div><div class='ctx'> 		int val = 0;</div><div class='ctx'> </div><div class='del'>-		ret = gpio_request(sdhci-&gt;data-&gt;card_power_gpio, "sdhci");</div><div class='add'>+		ret = devm_gpio_request(&amp;pdev-&gt;dev,</div><div class='add'>+				sdhci-&gt;data-&gt;card_power_gpio, "sdhci");</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			dev_dbg(&amp;pdev-&gt;dev, "gpio request fail: %d\n",</div><div class='ctx'> 					sdhci-&gt;data-&gt;card_power_gpio);</div><div class='del'>-			goto err_pgpio_request;</div><div class='add'>+			goto set_drvdata;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (sdhci-&gt;data-&gt;power_always_enb)</div><div class='hunk'>@@ -177,60 +177,48 @@ static int __devinit sdhci_probe(struct platform_device *pdev)</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_dbg(&amp;pdev-&gt;dev, "gpio set direction fail: %d\n",</div><div class='ctx'> 					sdhci-&gt;data-&gt;card_power_gpio);</div><div class='del'>-			goto err_pgpio_direction;</div><div class='add'>+			goto set_drvdata;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (sdhci-&gt;data-&gt;card_int_gpio &gt;= 0) {</div><div class='del'>-		ret = gpio_request(sdhci-&gt;data-&gt;card_int_gpio, "sdhci");</div><div class='add'>+		ret = devm_gpio_request(&amp;pdev-&gt;dev, sdhci-&gt;data-&gt;card_int_gpio,</div><div class='add'>+				"sdhci");</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			dev_dbg(&amp;pdev-&gt;dev, "gpio request fail: %d\n",</div><div class='ctx'> 					sdhci-&gt;data-&gt;card_int_gpio);</div><div class='del'>-			goto err_igpio_request;</div><div class='add'>+			goto set_drvdata;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ret = gpio_direction_input(sdhci-&gt;data-&gt;card_int_gpio);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_dbg(&amp;pdev-&gt;dev, "gpio set direction fail: %d\n",</div><div class='ctx'> 					sdhci-&gt;data-&gt;card_int_gpio);</div><div class='del'>-			goto err_igpio_direction;</div><div class='add'>+			goto set_drvdata;</div><div class='ctx'> 		}</div><div class='del'>-		ret = request_irq(gpio_to_irq(sdhci-&gt;data-&gt;card_int_gpio),</div><div class='add'>+		ret = devm_request_irq(&amp;pdev-&gt;dev,</div><div class='add'>+				gpio_to_irq(sdhci-&gt;data-&gt;card_int_gpio),</div><div class='ctx'> 				sdhci_gpio_irq, IRQF_TRIGGER_LOW,</div><div class='ctx'> 				mmc_hostname(host-&gt;mmc), pdev);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_dbg(&amp;pdev-&gt;dev, "gpio request irq fail: %d\n",</div><div class='ctx'> 					sdhci-&gt;data-&gt;card_int_gpio);</div><div class='del'>-			goto err_igpio_request_irq;</div><div class='add'>+			goto set_drvdata;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_igpio_request_irq:</div><div class='del'>-err_igpio_direction:</div><div class='del'>-	if (sdhci-&gt;data-&gt;card_int_gpio &gt;= 0)</div><div class='del'>-		gpio_free(sdhci-&gt;data-&gt;card_int_gpio);</div><div class='del'>-err_igpio_request:</div><div class='del'>-err_pgpio_direction:</div><div class='del'>-	if (sdhci-&gt;data-&gt;card_power_gpio &gt;= 0)</div><div class='del'>-		gpio_free(sdhci-&gt;data-&gt;card_power_gpio);</div><div class='del'>-err_pgpio_request:</div><div class='add'>+set_drvdata:</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> 	sdhci_remove_host(host, 1);</div><div class='del'>-err_add_host:</div><div class='del'>-	iounmap(host-&gt;ioaddr);</div><div class='del'>-err_ioremap:</div><div class='add'>+free_host:</div><div class='ctx'> 	sdhci_free_host(host);</div><div class='del'>-err_alloc_host:</div><div class='add'>+disable_clk:</div><div class='ctx'> 	clk_disable(sdhci-&gt;clk);</div><div class='del'>-err_clk_enb:</div><div class='add'>+put_clk:</div><div class='ctx'> 	clk_put(sdhci-&gt;clk);</div><div class='del'>-err_clk_get:</div><div class='del'>-	kfree(sdhci);</div><div class='del'>-err_kzalloc:</div><div class='del'>-	release_mem_region(iomem-&gt;start, resource_size(iomem));</div><div class='ctx'> err:</div><div class='ctx'> 	dev_err(&amp;pdev-&gt;dev, "spear-sdhci probe failed: %d\n", ret);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -239,35 +227,19 @@ err:</div><div class='ctx'> static int __devexit sdhci_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sdhci_host *host = platform_get_drvdata(pdev);</div><div class='del'>-	struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	struct spear_sdhci *sdhci = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='del'>-	int dead;</div><div class='add'>+	int dead = 0;</div><div class='ctx'> 	u32 scratch;</div><div class='ctx'> </div><div class='del'>-	if (sdhci-&gt;data) {</div><div class='del'>-		if (sdhci-&gt;data-&gt;card_int_gpio &gt;= 0) {</div><div class='del'>-			free_irq(gpio_to_irq(sdhci-&gt;data-&gt;card_int_gpio), pdev);</div><div class='del'>-			gpio_free(sdhci-&gt;data-&gt;card_int_gpio);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (sdhci-&gt;data-&gt;card_power_gpio &gt;= 0)</div><div class='del'>-			gpio_free(sdhci-&gt;data-&gt;card_power_gpio);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='del'>-	dead = 0;</div><div class='ctx'> 	scratch = readl(host-&gt;ioaddr + SDHCI_INT_STATUS);</div><div class='ctx'> 	if (scratch == (u32)-1)</div><div class='ctx'> 		dead = 1;</div><div class='ctx'> </div><div class='ctx'> 	sdhci_remove_host(host, dead);</div><div class='del'>-	iounmap(host-&gt;ioaddr);</div><div class='ctx'> 	sdhci_free_host(host);</div><div class='ctx'> 	clk_disable(sdhci-&gt;clk);</div><div class='ctx'> 	clk_put(sdhci-&gt;clk);</div><div class='del'>-	kfree(sdhci);</div><div class='del'>-	if (iomem)</div><div class='del'>-		release_mem_region(iomem-&gt;start, resource_size(iomem));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c<br/>index 53b26502f6e2..b38d8a78f6a0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/sdhci-tegra.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/sdhci-tegra.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/sdhci-tegra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/sdhci-tegra.c</a></div><div class='hunk'>@@ -32,8 +32,13 @@</div><div class='ctx'> </div><div class='ctx'> #include "sdhci-pltfm.h"</div><div class='ctx'> </div><div class='add'>+/* Tegra SDHOST controller vendor register definitions */</div><div class='add'>+#define SDHCI_TEGRA_VENDOR_MISC_CTRL		0x120</div><div class='add'>+#define SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300	0x20</div><div class='add'>+</div><div class='ctx'> #define NVQUIRK_FORCE_SDHCI_SPEC_200	BIT(0)</div><div class='ctx'> #define NVQUIRK_ENABLE_BLOCK_GAP_DET	BIT(1)</div><div class='add'>+#define NVQUIRK_ENABLE_SDHCI_SPEC_300	BIT(2)</div><div class='ctx'> </div><div class='ctx'> struct sdhci_tegra_soc_data {</div><div class='ctx'> 	struct sdhci_pltfm_data *pdata;</div><div class='hunk'>@@ -120,6 +125,25 @@ static irqreturn_t carddetect_irq(int irq, void *data)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void tegra_sdhci_reset_exit(struct sdhci_host *host, u8 mask)</div><div class='add'>+{</div><div class='add'>+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);</div><div class='add'>+	struct sdhci_tegra *tegra_host = pltfm_host-&gt;priv;</div><div class='add'>+	const struct sdhci_tegra_soc_data *soc_data = tegra_host-&gt;soc_data;</div><div class='add'>+</div><div class='add'>+	if (!(mask &amp; SDHCI_RESET_ALL))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Erratum: Enable SDHCI spec v3.00 support */</div><div class='add'>+	if (soc_data-&gt;nvquirks &amp; NVQUIRK_ENABLE_SDHCI_SPEC_300) {</div><div class='add'>+		u32 misc_ctrl;</div><div class='add'>+</div><div class='add'>+		misc_ctrl = sdhci_readb(host, SDHCI_TEGRA_VENDOR_MISC_CTRL);</div><div class='add'>+		misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300;</div><div class='add'>+		sdhci_writeb(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int tegra_sdhci_8bit(struct sdhci_host *host, int bus_width)</div><div class='ctx'> {</div><div class='ctx'> 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);</div><div class='hunk'>@@ -148,6 +172,7 @@ static struct sdhci_ops tegra_sdhci_ops = {</div><div class='ctx'> 	.read_w     = tegra_sdhci_readw,</div><div class='ctx'> 	.write_l    = tegra_sdhci_writel,</div><div class='ctx'> 	.platform_8bit_width = tegra_sdhci_8bit,</div><div class='add'>+	.platform_reset_exit = tegra_sdhci_reset_exit,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_TEGRA_2x_SOC</div><div class='hunk'>@@ -178,6 +203,7 @@ static struct sdhci_pltfm_data sdhci_tegra30_pdata = {</div><div class='ctx'> </div><div class='ctx'> static struct sdhci_tegra_soc_data soc_data_tegra30 = {</div><div class='ctx'> 	.pdata = &amp;sdhci_tegra30_pdata,</div><div class='add'>+	.nvquirks = NVQUIRK_ENABLE_SDHCI_SPEC_300,</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -269,7 +295,6 @@ static int __devinit sdhci_tegra_probe(struct platform_device *pdev)</div><div class='ctx'> 				"failed to allocate power gpio\n");</div><div class='ctx'> 			goto err_power_req;</div><div class='ctx'> 		}</div><div class='del'>-		tegra_gpio_enable(plat-&gt;power_gpio);</div><div class='ctx'> 		gpio_direction_output(plat-&gt;power_gpio, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -280,7 +305,6 @@ static int __devinit sdhci_tegra_probe(struct platform_device *pdev)</div><div class='ctx'> 				"failed to allocate cd gpio\n");</div><div class='ctx'> 			goto err_cd_req;</div><div class='ctx'> 		}</div><div class='del'>-		tegra_gpio_enable(plat-&gt;cd_gpio);</div><div class='ctx'> 		gpio_direction_input(plat-&gt;cd_gpio);</div><div class='ctx'> </div><div class='ctx'> 		rc = request_irq(gpio_to_irq(plat-&gt;cd_gpio), carddetect_irq,</div><div class='hunk'>@@ -301,7 +325,6 @@ static int __devinit sdhci_tegra_probe(struct platform_device *pdev)</div><div class='ctx'> 				"failed to allocate wp gpio\n");</div><div class='ctx'> 			goto err_wp_req;</div><div class='ctx'> 		}</div><div class='del'>-		tegra_gpio_enable(plat-&gt;wp_gpio);</div><div class='ctx'> 		gpio_direction_input(plat-&gt;wp_gpio);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -329,23 +352,17 @@ err_add_host:</div><div class='ctx'> 	clk_disable(pltfm_host-&gt;clk);</div><div class='ctx'> 	clk_put(pltfm_host-&gt;clk);</div><div class='ctx'> err_clk_get:</div><div class='del'>-	if (gpio_is_valid(plat-&gt;wp_gpio)) {</div><div class='del'>-		tegra_gpio_disable(plat-&gt;wp_gpio);</div><div class='add'>+	if (gpio_is_valid(plat-&gt;wp_gpio))</div><div class='ctx'> 		gpio_free(plat-&gt;wp_gpio);</div><div class='del'>-	}</div><div class='ctx'> err_wp_req:</div><div class='ctx'> 	if (gpio_is_valid(plat-&gt;cd_gpio))</div><div class='ctx'> 		free_irq(gpio_to_irq(plat-&gt;cd_gpio), host);</div><div class='ctx'> err_cd_irq_req:</div><div class='del'>-	if (gpio_is_valid(plat-&gt;cd_gpio)) {</div><div class='del'>-		tegra_gpio_disable(plat-&gt;cd_gpio);</div><div class='add'>+	if (gpio_is_valid(plat-&gt;cd_gpio))</div><div class='ctx'> 		gpio_free(plat-&gt;cd_gpio);</div><div class='del'>-	}</div><div class='ctx'> err_cd_req:</div><div class='del'>-	if (gpio_is_valid(plat-&gt;power_gpio)) {</div><div class='del'>-		tegra_gpio_disable(plat-&gt;power_gpio);</div><div class='add'>+	if (gpio_is_valid(plat-&gt;power_gpio))</div><div class='ctx'> 		gpio_free(plat-&gt;power_gpio);</div><div class='del'>-	}</div><div class='ctx'> err_power_req:</div><div class='ctx'> err_no_plat:</div><div class='ctx'> 	sdhci_pltfm_free(pdev);</div><div class='hunk'>@@ -362,21 +379,16 @@ static int __devexit sdhci_tegra_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	sdhci_remove_host(host, dead);</div><div class='ctx'> </div><div class='del'>-	if (gpio_is_valid(plat-&gt;wp_gpio)) {</div><div class='del'>-		tegra_gpio_disable(plat-&gt;wp_gpio);</div><div class='add'>+	if (gpio_is_valid(plat-&gt;wp_gpio))</div><div class='ctx'> 		gpio_free(plat-&gt;wp_gpio);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (gpio_is_valid(plat-&gt;cd_gpio)) {</div><div class='ctx'> 		free_irq(gpio_to_irq(plat-&gt;cd_gpio), host);</div><div class='del'>-		tegra_gpio_disable(plat-&gt;cd_gpio);</div><div class='ctx'> 		gpio_free(plat-&gt;cd_gpio);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (gpio_is_valid(plat-&gt;power_gpio)) {</div><div class='del'>-		tegra_gpio_disable(plat-&gt;power_gpio);</div><div class='add'>+	if (gpio_is_valid(plat-&gt;power_gpio))</div><div class='ctx'> 		gpio_free(plat-&gt;power_gpio);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	clk_disable(pltfm_host-&gt;clk);</div><div class='ctx'> 	clk_put(pltfm_host-&gt;clk);</div><div class='head'>diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c<br/>index ccefdebeff14..e626732aff77 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mmc/host/sdhci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mmc/host/sdhci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mmc/host/sdhci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mmc/host/sdhci.c</a></div><div class='hunk'>@@ -680,8 +680,8 @@ static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_command *cmd)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (count &gt;= 0xF) {</div><div class='del'>-		pr_warning("%s: Too large timeout requested for CMD%d!\n",</div><div class='del'>-		       mmc_hostname(host-&gt;mmc), cmd-&gt;opcode);</div><div class='add'>+		pr_warning("%s: Too large timeout 0x%x requested for CMD%d!\n",</div><div class='add'>+			   mmc_hostname(host-&gt;mmc), count, cmd-&gt;opcode);</div><div class='ctx'> 		count = 0xE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig<br/>index 5760c1a4b3f6..27143e042af5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/Kconfig</a></div><div class='hunk'>@@ -128,7 +128,7 @@ config MTD_AFS_PARTS</div><div class='ctx'> </div><div class='ctx'> config MTD_OF_PARTS</div><div class='ctx'> 	tristate "OpenFirmware partitioning information support"</div><div class='del'>-	default Y</div><div class='add'>+	default y</div><div class='ctx'> 	depends on OF</div><div class='ctx'> 	help</div><div class='ctx'> 	  This provides a partition parsing function which derives</div><div class='head'>diff --git a/drivers/mtd/bcm63xxpart.c b/drivers/mtd/bcm63xxpart.c<br/>index 608321ee056e..63d2a64331f7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/bcm63xxpart.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/bcm63xxpart.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/bcm63xxpart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/bcm63xxpart.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Copyright © 2006-2008  Florian Fainelli &lt;florian@openwrt.org&gt;</div><div class='ctx'>  *			  Mike Albon &lt;malbon@openwrt.org&gt;</div><div class='ctx'>  * Copyright © 2009-2010  Daniel Dickinson &lt;openwrt@cshore.neomailbox.net&gt;</div><div class='del'>- * Copyright © 2011 Jonas Gorski &lt;jonas.gorski@gmail.com&gt;</div><div class='add'>+ * Copyright © 2011-2012  Jonas Gorski &lt;jonas.gorski@gmail.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='hunk'>@@ -82,6 +82,7 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,</div><div class='ctx'> 	int namelen = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u32 computed_crc;</div><div class='add'>+	bool rootfs_first = false;</div><div class='ctx'> </div><div class='ctx'> 	if (bcm63xx_detect_cfe(master))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -109,6 +110,7 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,</div><div class='ctx'> 		char *boardid = &amp;(buf-&gt;board_id[0]);</div><div class='ctx'> 		char *tagversion = &amp;(buf-&gt;tag_version[0]);</div><div class='ctx'> </div><div class='add'>+		sscanf(buf-&gt;flash_image_start, "%u", &amp;rootfsaddr);</div><div class='ctx'> 		sscanf(buf-&gt;kernel_address, "%u", &amp;kerneladdr);</div><div class='ctx'> 		sscanf(buf-&gt;kernel_length, "%u", &amp;kernellen);</div><div class='ctx'> 		sscanf(buf-&gt;total_length, "%u", &amp;totallen);</div><div class='hunk'>@@ -117,10 +119,19 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,</div><div class='ctx'> 			tagversion, boardid);</div><div class='ctx'> </div><div class='ctx'> 		kerneladdr = kerneladdr - BCM63XX_EXTENDED_SIZE;</div><div class='del'>-		rootfsaddr = kerneladdr + kernellen;</div><div class='add'>+		rootfsaddr = rootfsaddr - BCM63XX_EXTENDED_SIZE;</div><div class='ctx'> 		spareaddr = roundup(totallen, master-&gt;erasesize) + cfelen;</div><div class='ctx'> 		sparelen = master-&gt;size - spareaddr - nvramlen;</div><div class='del'>-		rootfslen = spareaddr - rootfsaddr;</div><div class='add'>+</div><div class='add'>+		if (rootfsaddr &lt; kerneladdr) {</div><div class='add'>+			/* default Broadcom layout */</div><div class='add'>+			rootfslen = kerneladdr - rootfsaddr;</div><div class='add'>+			rootfs_first = true;</div><div class='add'>+		} else {</div><div class='add'>+			/* OpenWrt layout */</div><div class='add'>+			rootfsaddr = kerneladdr + kernellen;</div><div class='add'>+			rootfslen = spareaddr - rootfsaddr;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pr_warn("CFE boot tag CRC invalid (expected %08x, actual %08x)\n",</div><div class='ctx'> 			buf-&gt;header_crc, computed_crc);</div><div class='hunk'>@@ -156,18 +167,26 @@ static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,</div><div class='ctx'> 	curpart++;</div><div class='ctx'> </div><div class='ctx'> 	if (kernellen &gt; 0) {</div><div class='del'>-		parts[curpart].name = "kernel";</div><div class='del'>-		parts[curpart].offset = kerneladdr;</div><div class='del'>-		parts[curpart].size = kernellen;</div><div class='add'>+		int kernelpart = curpart;</div><div class='add'>+</div><div class='add'>+		if (rootfslen &gt; 0 &amp;&amp; rootfs_first)</div><div class='add'>+			kernelpart++;</div><div class='add'>+		parts[kernelpart].name = "kernel";</div><div class='add'>+		parts[kernelpart].offset = kerneladdr;</div><div class='add'>+		parts[kernelpart].size = kernellen;</div><div class='ctx'> 		curpart++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rootfslen &gt; 0) {</div><div class='del'>-		parts[curpart].name = "rootfs";</div><div class='del'>-		parts[curpart].offset = rootfsaddr;</div><div class='del'>-		parts[curpart].size = rootfslen;</div><div class='del'>-		if (sparelen &gt; 0)</div><div class='del'>-			parts[curpart].size += sparelen;</div><div class='add'>+		int rootfspart = curpart;</div><div class='add'>+</div><div class='add'>+		if (kernellen &gt; 0 &amp;&amp; rootfs_first)</div><div class='add'>+			rootfspart--;</div><div class='add'>+		parts[rootfspart].name = "rootfs";</div><div class='add'>+		parts[rootfspart].offset = rootfsaddr;</div><div class='add'>+		parts[rootfspart].size = rootfslen;</div><div class='add'>+		if (sparelen &gt; 0  &amp;&amp; !rootfs_first)</div><div class='add'>+			parts[rootfspart].size += sparelen;</div><div class='ctx'> 		curpart++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c<br/>index d02592e6a0f0..22d0493a026f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/chips/cfi_cmdset_0002.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/chips/cfi_cmdset_0002.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/chips/cfi_cmdset_0002.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/chips/cfi_cmdset_0002.c</a></div><div class='hunk'>@@ -317,7 +317,7 @@ static void fixup_s29gl064n_sectors(struct mtd_info *mtd)</div><div class='ctx'> </div><div class='ctx'> 	if ((cfi-&gt;cfiq-&gt;EraseRegionInfo[0] &amp; 0xffff) == 0x003f) {</div><div class='ctx'> 		cfi-&gt;cfiq-&gt;EraseRegionInfo[0] |= 0x0040;</div><div class='del'>-		pr_warning("%s: Bad S29GL064N CFI data, adjust from 64 to 128 sectors\n", mtd-&gt;name);</div><div class='add'>+		pr_warning("%s: Bad S29GL064N CFI data; adjust from 64 to 128 sectors\n", mtd-&gt;name);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -328,10 +328,23 @@ static void fixup_s29gl032n_sectors(struct mtd_info *mtd)</div><div class='ctx'> </div><div class='ctx'> 	if ((cfi-&gt;cfiq-&gt;EraseRegionInfo[1] &amp; 0xffff) == 0x007e) {</div><div class='ctx'> 		cfi-&gt;cfiq-&gt;EraseRegionInfo[1] &amp;= ~0x0040;</div><div class='del'>-		pr_warning("%s: Bad S29GL032N CFI data, adjust from 127 to 63 sectors\n", mtd-&gt;name);</div><div class='add'>+		pr_warning("%s: Bad S29GL032N CFI data; adjust from 127 to 63 sectors\n", mtd-&gt;name);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void fixup_s29ns512p_sectors(struct mtd_info *mtd)</div><div class='add'>+{</div><div class='add'>+	struct map_info *map = mtd-&gt;priv;</div><div class='add'>+	struct cfi_private *cfi = map-&gt;fldrv_priv;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 *  S29NS512P flash uses more than 8bits to report number of sectors,</div><div class='add'>+	 * which is not permitted by CFI.</div><div class='add'>+	 */</div><div class='add'>+	cfi-&gt;cfiq-&gt;EraseRegionInfo[0] = 0x020001ff;</div><div class='add'>+	pr_warning("%s: Bad S29NS512P CFI data; adjust to 512 sectors\n", mtd-&gt;name);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Used to fix CFI-Tables of chips without Extended Query Tables */</div><div class='ctx'> static struct cfi_fixup cfi_nopri_fixup_table[] = {</div><div class='ctx'> 	{ CFI_MFR_SST, 0x234a, fixup_sst39vf }, /* SST39VF1602 */</div><div class='hunk'>@@ -362,6 +375,7 @@ static struct cfi_fixup cfi_fixup_table[] = {</div><div class='ctx'> 	{ CFI_MFR_AMD, 0x1301, fixup_s29gl064n_sectors },</div><div class='ctx'> 	{ CFI_MFR_AMD, 0x1a00, fixup_s29gl032n_sectors },</div><div class='ctx'> 	{ CFI_MFR_AMD, 0x1a01, fixup_s29gl032n_sectors },</div><div class='add'>+	{ CFI_MFR_AMD, 0x3f00, fixup_s29ns512p_sectors },</div><div class='ctx'> 	{ CFI_MFR_SST, 0x536a, fixup_sst38vf640x_sectorsize }, /* SST38VF6402 */</div><div class='ctx'> 	{ CFI_MFR_SST, 0x536b, fixup_sst38vf640x_sectorsize }, /* SST38VF6401 */</div><div class='ctx'> 	{ CFI_MFR_SST, 0x536c, fixup_sst38vf640x_sectorsize }, /* SST38VF6404 */</div><div class='head'>diff --git a/drivers/mtd/cmdlinepart.c b/drivers/mtd/cmdlinepart.c<br/>index ddf9ec6d9168..4558e0f4d07f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/cmdlinepart.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/cmdlinepart.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/cmdlinepart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/cmdlinepart.c</a></div><div class='hunk'>@@ -70,7 +70,7 @@ struct cmdline_mtd_partition {</div><div class='ctx'> /* mtdpart_setup() parses into here */</div><div class='ctx'> static struct cmdline_mtd_partition *partitions;</div><div class='ctx'> </div><div class='del'>-/* the command line passed to mtdpart_setupd() */</div><div class='add'>+/* the command line passed to mtdpart_setup() */</div><div class='ctx'> static char *cmdline;</div><div class='ctx'> static int cmdline_parsed = 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/devices/block2mtd.c b/drivers/mtd/devices/block2mtd.c<br/>index a4a80b742e65..681e2ee0f2d6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/devices/block2mtd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/devices/block2mtd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/devices/block2mtd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/devices/block2mtd.c</a></div><div class='hunk'>@@ -52,8 +52,6 @@ static int _block2mtd_erase(struct block2mtd_dev *dev, loff_t to, size_t len)</div><div class='ctx'> </div><div class='ctx'> 	while (pages) {</div><div class='ctx'> 		page = page_read(mapping, index);</div><div class='del'>-		if (!page)</div><div class='del'>-			return -ENOMEM;</div><div class='ctx'> 		if (IS_ERR(page))</div><div class='ctx'> 			return PTR_ERR(page);</div><div class='ctx'> </div><div class='hunk'>@@ -112,8 +110,6 @@ static int block2mtd_read(struct mtd_info *mtd, loff_t from, size_t len,</div><div class='ctx'> 		len = len - cpylen;</div><div class='ctx'> </div><div class='ctx'> 		page = page_read(dev-&gt;blkdev-&gt;bd_inode-&gt;i_mapping, index);</div><div class='del'>-		if (!page)</div><div class='del'>-			return -ENOMEM;</div><div class='ctx'> 		if (IS_ERR(page))</div><div class='ctx'> 			return PTR_ERR(page);</div><div class='ctx'> </div><div class='hunk'>@@ -148,8 +144,6 @@ static int _block2mtd_write(struct block2mtd_dev *dev, const u_char *buf,</div><div class='ctx'> 		len = len - cpylen;</div><div class='ctx'> </div><div class='ctx'> 		page = page_read(mapping, index);</div><div class='del'>-		if (!page)</div><div class='del'>-			return -ENOMEM;</div><div class='ctx'> 		if (IS_ERR(page))</div><div class='ctx'> 			return PTR_ERR(page);</div><div class='ctx'> </div><div class='hunk'>@@ -271,7 +265,6 @@ static struct block2mtd_dev *add_device(char *devname, int erase_size)</div><div class='ctx'> 	dev-&gt;mtd.flags = MTD_CAP_RAM;</div><div class='ctx'> 	dev-&gt;mtd._erase = block2mtd_erase;</div><div class='ctx'> 	dev-&gt;mtd._write = block2mtd_write;</div><div class='del'>-	dev-&gt;mtd._writev = mtd_writev;</div><div class='ctx'> 	dev-&gt;mtd._sync = block2mtd_sync;</div><div class='ctx'> 	dev-&gt;mtd._read = block2mtd_read;</div><div class='ctx'> 	dev-&gt;mtd.priv = dev;</div><div class='head'>diff --git a/drivers/mtd/devices/docg3.c b/drivers/mtd/devices/docg3.c<br/>index 8272c02668d6..f70854d728fe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/devices/docg3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/devices/docg3.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/devices/docg3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/devices/docg3.c</a></div><div class='hunk'>@@ -227,7 +227,7 @@ static void doc_read_data_area(struct docg3 *docg3, void *buf, int len,</div><div class='ctx'> 	u8 data8, *dst8;</div><div class='ctx'> </div><div class='ctx'> 	doc_dbg("doc_read_data_area(buf=%p, len=%d)\n", buf, len);</div><div class='del'>-	cdr = len &amp; 0x3;</div><div class='add'>+	cdr = len &amp; 0x1;</div><div class='ctx'> 	len4 = len - cdr;</div><div class='ctx'> </div><div class='ctx'> 	if (first)</div><div class='hunk'>@@ -383,7 +383,7 @@ static void doc_set_device_id(struct docg3 *docg3, int id)</div><div class='ctx'>  * leveling counters are stored.  To access this last area of 4 bytes, a special</div><div class='ctx'>  * mode must be input to the flash ASIC.</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 if no error occured, -EIO else.</div><div class='add'>+ * Returns 0 if no error occurred, -EIO else.</div><div class='ctx'>  */</div><div class='ctx'> static int doc_set_extra_page_mode(struct docg3 *docg3)</div><div class='ctx'> {</div><div class='hunk'>@@ -681,7 +681,7 @@ out:</div><div class='ctx'>  *  - one read of 512 bytes at offset 0</div><div class='ctx'>  *  - one read of 512 bytes at offset 512 + 16</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 if successful, -EIO if a read error occured.</div><div class='add'>+ * Returns 0 if successful, -EIO if a read error occurred.</div><div class='ctx'>  */</div><div class='ctx'> static int doc_read_page_prepare(struct docg3 *docg3, int block0, int block1,</div><div class='ctx'> 				 int page, int offset)</div><div class='hunk'>@@ -732,12 +732,24 @@ err:</div><div class='ctx'>  * @len: the number of bytes to be read (must be a multiple of 4)</div><div class='ctx'>  * @buf: the buffer to be filled in (or NULL is forget bytes)</div><div class='ctx'>  * @first: 1 if first time read, DOC_READADDRESS should be set</div><div class='add'>+ * @last_odd: 1 if last read ended up on an odd byte</div><div class='add'>+ *</div><div class='add'>+ * Reads bytes from a prepared page. There is a trickery here : if the last read</div><div class='add'>+ * ended up on an odd offset in the 1024 bytes double page, ie. between the 2</div><div class='add'>+ * planes, the first byte must be read apart. If a word (16bit) read was used,</div><div class='add'>+ * the read would return the byte of plane 2 as low *and* high endian, which</div><div class='add'>+ * will mess the read.</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> static int doc_read_page_getbytes(struct docg3 *docg3, int len, u_char *buf,</div><div class='del'>-				  int first)</div><div class='add'>+				  int first, int last_odd)</div><div class='ctx'> {</div><div class='del'>-	doc_read_data_area(docg3, buf, len, first);</div><div class='add'>+	if (last_odd &amp;&amp; len &gt; 0) {</div><div class='add'>+		doc_read_data_area(docg3, buf, 1, first);</div><div class='add'>+		doc_read_data_area(docg3, buf ? buf + 1 : buf, len - 1, 0);</div><div class='add'>+	} else {</div><div class='add'>+		doc_read_data_area(docg3, buf, len, first);</div><div class='add'>+	}</div><div class='ctx'> 	doc_delay(docg3, 2);</div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='hunk'>@@ -839,7 +851,7 @@ static void calc_block_sector(loff_t from, int *block0, int *block1, int *page,</div><div class='ctx'>  *</div><div class='ctx'>  * Reads flash memory OOB area of pages.</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 if read successfull, of -EIO, -EINVAL if an error occured</div><div class='add'>+ * Returns 0 if read successful, of -EIO, -EINVAL if an error occurred</div><div class='ctx'>  */</div><div class='ctx'> static int doc_read_oob(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 			struct mtd_oob_ops *ops)</div><div class='hunk'>@@ -850,6 +862,7 @@ static int doc_read_oob(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 	u8 *buf = ops-&gt;datbuf;</div><div class='ctx'> 	size_t len, ooblen, nbdata, nboob;</div><div class='ctx'> 	u8 hwecc[DOC_ECC_BCH_SIZE], eccconf1;</div><div class='add'>+	int max_bitflips = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (buf)</div><div class='ctx'> 		len = ops-&gt;len;</div><div class='hunk'>@@ -876,7 +889,7 @@ static int doc_read_oob(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 	ret = 0;</div><div class='ctx'> 	skip = from % DOC_LAYOUT_PAGE_SIZE;</div><div class='ctx'> 	mutex_lock(&amp;docg3-&gt;cascade-&gt;lock);</div><div class='del'>-	while (!ret &amp;&amp; (len &gt; 0 || ooblen &gt; 0)) {</div><div class='add'>+	while (ret &gt;= 0 &amp;&amp; (len &gt; 0 || ooblen &gt; 0)) {</div><div class='ctx'> 		calc_block_sector(from - skip, &amp;block0, &amp;block1, &amp;page, &amp;ofs,</div><div class='ctx'> 			docg3-&gt;reliable);</div><div class='ctx'> 		nbdata = min_t(size_t, len, DOC_LAYOUT_PAGE_SIZE - skip);</div><div class='hunk'>@@ -887,20 +900,20 @@ static int doc_read_oob(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 		ret = doc_read_page_ecc_init(docg3, DOC_ECC_BCH_TOTAL_BYTES);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto err_in_read;</div><div class='del'>-		ret = doc_read_page_getbytes(docg3, skip, NULL, 1);</div><div class='add'>+		ret = doc_read_page_getbytes(docg3, skip, NULL, 1, 0);</div><div class='ctx'> 		if (ret &lt; skip)</div><div class='ctx'> 			goto err_in_read;</div><div class='del'>-		ret = doc_read_page_getbytes(docg3, nbdata, buf, 0);</div><div class='add'>+		ret = doc_read_page_getbytes(docg3, nbdata, buf, 0, skip % 2);</div><div class='ctx'> 		if (ret &lt; nbdata)</div><div class='ctx'> 			goto err_in_read;</div><div class='ctx'> 		doc_read_page_getbytes(docg3,</div><div class='ctx'> 				       DOC_LAYOUT_PAGE_SIZE - nbdata - skip,</div><div class='del'>-				       NULL, 0);</div><div class='del'>-		ret = doc_read_page_getbytes(docg3, nboob, oobbuf, 0);</div><div class='add'>+				       NULL, 0, (skip + nbdata) % 2);</div><div class='add'>+		ret = doc_read_page_getbytes(docg3, nboob, oobbuf, 0, 0);</div><div class='ctx'> 		if (ret &lt; nboob)</div><div class='ctx'> 			goto err_in_read;</div><div class='ctx'> 		doc_read_page_getbytes(docg3, DOC_LAYOUT_OOB_SIZE - nboob,</div><div class='del'>-				       NULL, 0);</div><div class='add'>+				       NULL, 0, nboob % 2);</div><div class='ctx'> </div><div class='ctx'> 		doc_get_bch_hw_ecc(docg3, hwecc);</div><div class='ctx'> 		eccconf1 = doc_register_readb(docg3, DOC_ECCCONF1);</div><div class='hunk'>@@ -936,7 +949,8 @@ static int doc_read_oob(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 			}</div><div class='ctx'> 			if (ret &gt; 0) {</div><div class='ctx'> 				mtd-&gt;ecc_stats.corrected += ret;</div><div class='del'>-				ret = -EUCLEAN;</div><div class='add'>+				max_bitflips = max(max_bitflips, ret);</div><div class='add'>+				ret = max_bitflips;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -971,7 +985,7 @@ err_in_read:</div><div class='ctx'>  * Reads flash memory pages. This function does not read the OOB chunk, but only</div><div class='ctx'>  * the page data.</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 if read successfull, of -EIO, -EINVAL if an error occured</div><div class='add'>+ * Returns 0 if read successful, of -EIO, -EINVAL if an error occurred</div><div class='ctx'>  */</div><div class='ctx'> static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,</div><div class='ctx'> 	     size_t *retlen, u_char *buf)</div><div class='hunk'>@@ -1004,7 +1018,7 @@ static int doc_reload_bbt(struct docg3 *docg3)</div><div class='ctx'> 						     DOC_LAYOUT_PAGE_SIZE);</div><div class='ctx'> 		if (!ret)</div><div class='ctx'> 			doc_read_page_getbytes(docg3, DOC_LAYOUT_PAGE_SIZE,</div><div class='del'>-					       buf, 1);</div><div class='add'>+					       buf, 1, 0);</div><div class='ctx'> 		buf += DOC_LAYOUT_PAGE_SIZE;</div><div class='ctx'> 	}</div><div class='ctx'> 	doc_read_page_finish(docg3);</div><div class='hunk'>@@ -1064,10 +1078,10 @@ static int doc_get_erase_count(struct docg3 *docg3, loff_t from)</div><div class='ctx'> 	ret = doc_reset_seq(docg3);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = doc_read_page_prepare(docg3, block0, block1, page,</div><div class='del'>-					    ofs + DOC_LAYOUT_WEAR_OFFSET);</div><div class='add'>+					    ofs + DOC_LAYOUT_WEAR_OFFSET, 0);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = doc_read_page_getbytes(docg3, DOC_LAYOUT_WEAR_SIZE,</div><div class='del'>-					     buf, 1);</div><div class='add'>+					     buf, 1, 0);</div><div class='ctx'> 	doc_read_page_finish(docg3);</div><div class='ctx'> </div><div class='ctx'> 	if (ret || (buf[0] != DOC_ERASE_MARK) || (buf[2] != DOC_ERASE_MARK))</div><div class='hunk'>@@ -1109,7 +1123,7 @@ static int doc_get_op_status(struct docg3 *docg3)</div><div class='ctx'>  * Wait for the chip to be ready again after erase or write operation, and check</div><div class='ctx'>  * erase/write status.</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 if erase successfull, -EIO if erase/write issue, -ETIMEOUT if</div><div class='add'>+ * Returns 0 if erase successful, -EIO if erase/write issue, -ETIMEOUT if</div><div class='ctx'>  * timeout</div><div class='ctx'>  */</div><div class='ctx'> static int doc_write_erase_wait_status(struct docg3 *docg3)</div><div class='hunk'>@@ -1186,7 +1200,7 @@ static int doc_erase_block(struct docg3 *docg3, int block0, int block1)</div><div class='ctx'>  * Erase a bunch of contiguous blocks, by pairs, as a "mtd" page of 1024 is</div><div class='ctx'>  * split into 2 pages of 512 bytes on 2 contiguous blocks.</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 if erase successful, -EINVAL if adressing error, -EIO if erase</div><div class='add'>+ * Returns 0 if erase successful, -EINVAL if addressing error, -EIO if erase</div><div class='ctx'>  * issue</div><div class='ctx'>  */</div><div class='ctx'> static int doc_erase(struct mtd_info *mtd, struct erase_info *info)</div><div class='hunk'>@@ -1397,7 +1411,7 @@ static int doc_backup_oob(struct docg3 *docg3, loff_t to,</div><div class='ctx'>  * Or provide data without OOB, and then a all zeroed OOB will be used (ECC will</div><div class='ctx'>  * still be filled in if asked for).</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 is successfull, EINVAL if length is not 14 bytes</div><div class='add'>+ * Returns 0 is successful, EINVAL if length is not 14 bytes</div><div class='ctx'>  */</div><div class='ctx'> static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,</div><div class='ctx'> 			 struct mtd_oob_ops *ops)</div><div class='hunk'>@@ -1945,7 +1959,7 @@ static void doc_release_device(struct mtd_info *mtd)</div><div class='ctx'>  * docg3_resume - Awakens docg3 floor</div><div class='ctx'>  * @pdev: platfrom device</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 (always successfull)</div><div class='add'>+ * Returns 0 (always successful)</div><div class='ctx'>  */</div><div class='ctx'> static int docg3_resume(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c<br/>index 1924d247c1cb..5d0d68c3fe27 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/devices/m25p80.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/devices/m25p80.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/devices/m25p80.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/devices/m25p80.c</a></div><div class='hunk'>@@ -639,12 +639,16 @@ static const struct spi_device_id m25p_ids[] = {</div><div class='ctx'> 	{ "en25q32b", INFO(0x1c3016, 0, 64 * 1024,  64, 0) },</div><div class='ctx'> 	{ "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) },</div><div class='ctx'> </div><div class='add'>+	/* Everspin */</div><div class='add'>+	{ "mr25h256", CAT25_INFO(  32 * 1024, 1, 256, 2) },</div><div class='add'>+</div><div class='ctx'> 	/* Intel/Numonyx -- xxxs33b */</div><div class='ctx'> 	{ "160s33b",  INFO(0x898911, 0, 64 * 1024,  32, 0) },</div><div class='ctx'> 	{ "320s33b",  INFO(0x898912, 0, 64 * 1024,  64, 0) },</div><div class='ctx'> 	{ "640s33b",  INFO(0x898913, 0, 64 * 1024, 128, 0) },</div><div class='ctx'> </div><div class='ctx'> 	/* Macronix */</div><div class='add'>+	{ "mx25l2005a",  INFO(0xc22012, 0, 64 * 1024,   4, SECT_4K) },</div><div class='ctx'> 	{ "mx25l4005a",  INFO(0xc22013, 0, 64 * 1024,   8, SECT_4K) },</div><div class='ctx'> 	{ "mx25l8005",   INFO(0xc22014, 0, 64 * 1024,  16, 0) },</div><div class='ctx'> 	{ "mx25l1606e",  INFO(0xc22015, 0, 64 * 1024,  32, SECT_4K) },</div><div class='hunk'>@@ -728,6 +732,7 @@ static const struct spi_device_id m25p_ids[] = {</div><div class='ctx'> 	{ "w25q32", INFO(0xef4016, 0, 64 * 1024,  64, SECT_4K) },</div><div class='ctx'> 	{ "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) },</div><div class='ctx'> 	{ "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },</div><div class='add'>+	{ "w25q80", INFO(0xef5014, 0, 64 * 1024,  16, SECT_4K) },</div><div class='ctx'> </div><div class='ctx'> 	/* Catalyst / On Semiconductor -- non-JEDEC */</div><div class='ctx'> 	{ "cat25c11", CAT25_INFO(  16, 8, 16, 1) },</div><div class='head'>diff --git a/drivers/mtd/devices/spear_smi.c b/drivers/mtd/devices/spear_smi.c<br/>index 797d43cd3550..67960362681e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/devices/spear_smi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/devices/spear_smi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/devices/spear_smi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/devices/spear_smi.c</a></div><div class='hunk'>@@ -990,9 +990,9 @@ static int __devinit spear_smi_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_clk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = clk_enable(dev-&gt;clk);</div><div class='add'>+	ret = clk_prepare_enable(dev-&gt;clk);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err_clk_enable;</div><div class='add'>+		goto err_clk_prepare_enable;</div><div class='ctx'> </div><div class='ctx'> 	ret = request_irq(irq, spear_smi_int_handler, 0, pdev-&gt;name, dev);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -1020,8 +1020,8 @@ err_bank_setup:</div><div class='ctx'> 	free_irq(irq, dev);</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> err_irq:</div><div class='del'>-	clk_disable(dev-&gt;clk);</div><div class='del'>-err_clk_enable:</div><div class='add'>+	clk_disable_unprepare(dev-&gt;clk);</div><div class='add'>+err_clk_prepare_enable:</div><div class='ctx'> 	clk_put(dev-&gt;clk);</div><div class='ctx'> err_clk:</div><div class='ctx'> 	iounmap(dev-&gt;io_base);</div><div class='hunk'>@@ -1074,7 +1074,7 @@ static int __devexit spear_smi_remove(struct platform_device *pdev)</div><div class='ctx'> 	irq = platform_get_irq(pdev, 0);</div><div class='ctx'> 	free_irq(irq, dev);</div><div class='ctx'> </div><div class='del'>-	clk_disable(dev-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(dev-&gt;clk);</div><div class='ctx'> 	clk_put(dev-&gt;clk);</div><div class='ctx'> 	iounmap(dev-&gt;io_base);</div><div class='ctx'> 	kfree(dev);</div><div class='hunk'>@@ -1091,7 +1091,7 @@ int spear_smi_suspend(struct platform_device *pdev, pm_message_t state)</div><div class='ctx'> 	struct spear_smi *dev = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	if (dev &amp;&amp; dev-&gt;clk)</div><div class='del'>-		clk_disable(dev-&gt;clk);</div><div class='add'>+		clk_disable_unprepare(dev-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1102,7 +1102,7 @@ int spear_smi_resume(struct platform_device *pdev)</div><div class='ctx'> 	int ret = -EPERM;</div><div class='ctx'> </div><div class='ctx'> 	if (dev &amp;&amp; dev-&gt;clk)</div><div class='del'>-		ret = clk_enable(dev-&gt;clk);</div><div class='add'>+		ret = clk_prepare_enable(dev-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		spear_smi_hw_init(dev);</div><div class='head'>diff --git a/drivers/mtd/lpddr/qinfo_probe.c b/drivers/mtd/lpddr/qinfo_probe.c<br/>index dbfe17baf046..45abed67f1ef 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/lpddr/qinfo_probe.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/lpddr/qinfo_probe.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/lpddr/qinfo_probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/lpddr/qinfo_probe.c</a></div><div class='hunk'>@@ -57,7 +57,7 @@ static struct qinfo_query_info qinfo_array[] = {</div><div class='ctx'> </div><div class='ctx'> static long lpddr_get_qinforec_pos(struct map_info *map, char *id_str)</div><div class='ctx'> {</div><div class='del'>-	int qinfo_lines = sizeof(qinfo_array)/sizeof(struct qinfo_query_info);</div><div class='add'>+	int qinfo_lines = ARRAY_SIZE(qinfo_array);</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int bankwidth = map_bankwidth(map) * 8;</div><div class='ctx'> 	int major, minor;</div><div class='head'>diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig<br/>index 8af67cfd671a..5ba2458e799a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/maps/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/maps/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/maps/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/maps/Kconfig</a></div><div class='hunk'>@@ -224,7 +224,7 @@ config MTD_CK804XROM</div><div class='ctx'> </div><div class='ctx'> config MTD_SCB2_FLASH</div><div class='ctx'> 	tristate "BIOS flash chip on Intel SCB2 boards"</div><div class='del'>-	depends on X86 &amp;&amp; MTD_JEDECPROBE</div><div class='add'>+	depends on X86 &amp;&amp; MTD_JEDECPROBE &amp;&amp; PCI</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for treating the BIOS flash chip on Intel SCB2 boards</div><div class='ctx'> 	  as an MTD device - with this you can reprogram your BIOS.</div><div class='head'>diff --git a/drivers/mtd/maps/intel_vr_nor.c b/drivers/mtd/maps/intel_vr_nor.c<br/>index 92e1f41634c7..93f03175c82d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/maps/intel_vr_nor.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/maps/intel_vr_nor.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/maps/intel_vr_nor.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/maps/intel_vr_nor.c</a></div><div class='hunk'>@@ -260,18 +260,7 @@ static struct pci_driver vr_nor_pci_driver = {</div><div class='ctx'> 	.id_table = vr_nor_pci_ids,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init vr_nor_mtd_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;vr_nor_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit vr_nor_mtd_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;vr_nor_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(vr_nor_mtd_init);</div><div class='del'>-module_exit(vr_nor_mtd_exit);</div><div class='add'>+module_pci_driver(vr_nor_pci_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Andy Lowe");</div><div class='ctx'> MODULE_DESCRIPTION("MTD map driver for NOR flash on Intel Vermilion Range");</div><div class='head'>diff --git a/drivers/mtd/maps/lantiq-flash.c b/drivers/mtd/maps/lantiq-flash.c<br/>index b5401e355745..c03456f17004 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/maps/lantiq-flash.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/maps/lantiq-flash.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/maps/lantiq-flash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/maps/lantiq-flash.c</a></div><div class='hunk'>@@ -19,9 +19,9 @@</div><div class='ctx'> #include &lt;linux/mtd/cfi.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/physmap.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;lantiq_soc.h&gt;</div><div class='del'>-#include &lt;lantiq_platform.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The NOR flash is connected to the same external bus unit (EBU) as PCI.</div><div class='hunk'>@@ -44,8 +44,9 @@ struct ltq_mtd {</div><div class='ctx'> 	struct map_info *map;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static char ltq_map_name[] = "ltq_nor";</div><div class='del'>-static const char *ltq_probe_types[] __devinitconst = { "cmdlinepart", NULL };</div><div class='add'>+static const char ltq_map_name[] = "ltq_nor";</div><div class='add'>+static const char *ltq_probe_types[] __devinitconst = {</div><div class='add'>+					"cmdlinepart", "ofpart", NULL };</div><div class='ctx'> </div><div class='ctx'> static map_word</div><div class='ctx'> ltq_read16(struct map_info *map, unsigned long adr)</div><div class='hunk'>@@ -108,42 +109,38 @@ ltq_copy_to(struct map_info *map, unsigned long to,</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ebu_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init</div><div class='add'>+static int __devinit</div><div class='ctx'> ltq_mtd_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct physmap_flash_data *ltq_mtd_data = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+	struct mtd_part_parser_data ppdata;</div><div class='ctx'> 	struct ltq_mtd *ltq_mtd;</div><div class='del'>-	struct resource *res;</div><div class='ctx'> 	struct cfi_private *cfi;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (of_machine_is_compatible("lantiq,falcon") &amp;&amp;</div><div class='add'>+			(ltq_boot_select() != BS_FLASH)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "invalid bootstrap options\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ltq_mtd = kzalloc(sizeof(struct ltq_mtd), GFP_KERNEL);</div><div class='ctx'> 	platform_set_drvdata(pdev, ltq_mtd);</div><div class='ctx'> </div><div class='ctx'> 	ltq_mtd-&gt;res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	if (!ltq_mtd-&gt;res) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to get memory resource");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to get memory resource\n");</div><div class='ctx'> 		err = -ENOENT;</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	res = devm_request_mem_region(&amp;pdev-&gt;dev, ltq_mtd-&gt;res-&gt;start,</div><div class='del'>-		resource_size(ltq_mtd-&gt;res), dev_name(&amp;pdev-&gt;dev));</div><div class='del'>-	if (!ltq_mtd-&gt;res) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to request mem resource");</div><div class='del'>-		err = -EBUSY;</div><div class='del'>-		goto err_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	ltq_mtd-&gt;map = kzalloc(sizeof(struct map_info), GFP_KERNEL);</div><div class='del'>-	ltq_mtd-&gt;map-&gt;phys = res-&gt;start;</div><div class='del'>-	ltq_mtd-&gt;map-&gt;size = resource_size(res);</div><div class='del'>-	ltq_mtd-&gt;map-&gt;virt = devm_ioremap_nocache(&amp;pdev-&gt;dev,</div><div class='del'>-				ltq_mtd-&gt;map-&gt;phys, ltq_mtd-&gt;map-&gt;size);</div><div class='add'>+	ltq_mtd-&gt;map-&gt;phys = ltq_mtd-&gt;res-&gt;start;</div><div class='add'>+	ltq_mtd-&gt;map-&gt;size = resource_size(ltq_mtd-&gt;res);</div><div class='add'>+	ltq_mtd-&gt;map-&gt;virt = devm_request_and_ioremap(&amp;pdev-&gt;dev, ltq_mtd-&gt;res);</div><div class='ctx'> 	if (!ltq_mtd-&gt;map-&gt;virt) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to ioremap!\n");</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_free;</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to remap mem resource\n");</div><div class='add'>+		err = -EBUSY;</div><div class='add'>+		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ltq_mtd-&gt;map-&gt;name = ltq_map_name;</div><div class='hunk'>@@ -169,9 +166,9 @@ ltq_mtd_probe(struct platform_device *pdev)</div><div class='ctx'> 	cfi-&gt;addr_unlock1 ^= 1;</div><div class='ctx'> 	cfi-&gt;addr_unlock2 ^= 1;</div><div class='ctx'> </div><div class='del'>-	err = mtd_device_parse_register(ltq_mtd-&gt;mtd, ltq_probe_types, NULL,</div><div class='del'>-					ltq_mtd_data-&gt;parts,</div><div class='del'>-					ltq_mtd_data-&gt;nr_parts);</div><div class='add'>+	ppdata.of_node = pdev-&gt;dev.of_node;</div><div class='add'>+	err = mtd_device_parse_register(ltq_mtd-&gt;mtd, ltq_probe_types,</div><div class='add'>+					&amp;ppdata, NULL, 0);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to add partitions\n");</div><div class='ctx'> 		goto err_destroy;</div><div class='hunk'>@@ -204,32 +201,23 @@ ltq_mtd_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct of_device_id ltq_mtd_match[] = {</div><div class='add'>+	{ .compatible = "lantiq,nor" },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ltq_mtd_match);</div><div class='add'>+</div><div class='ctx'> static struct platform_driver ltq_mtd_driver = {</div><div class='add'>+	.probe = ltq_mtd_probe,</div><div class='ctx'> 	.remove = __devexit_p(ltq_mtd_remove),</div><div class='ctx'> 	.driver = {</div><div class='del'>-		.name = "ltq_nor",</div><div class='add'>+		.name = "ltq-nor",</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = ltq_mtd_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init</div><div class='del'>-init_ltq_mtd(void)</div><div class='del'>-{</div><div class='del'>-	int ret = platform_driver_probe(&amp;ltq_mtd_driver, ltq_mtd_probe);</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		pr_err("ltq_nor: error registering platform driver");</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit</div><div class='del'>-exit_ltq_mtd(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;ltq_mtd_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(init_ltq_mtd);</div><div class='del'>-module_exit(exit_ltq_mtd);</div><div class='add'>+module_platform_driver(ltq_mtd_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("John Crispin &lt;blogic@openwrt.org&gt;");</div><div class='head'>diff --git a/drivers/mtd/maps/pci.c b/drivers/mtd/maps/pci.c<br/>index 1d005a3e9b41..f14ce0af763f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/maps/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/maps/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/maps/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/maps/pci.c</a></div><div class='hunk'>@@ -352,18 +352,7 @@ static struct pci_driver mtd_pci_driver = {</div><div class='ctx'> 	.id_table =	mtd_pci_ids,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init mtd_pci_maps_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;mtd_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit mtd_pci_maps_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;mtd_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(mtd_pci_maps_init);</div><div class='del'>-module_exit(mtd_pci_maps_exit);</div><div class='add'>+module_pci_driver(mtd_pci_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Russell King &lt;rmk@arm.linux.org.uk&gt;");</div><div class='head'>diff --git a/drivers/mtd/maps/scb2_flash.c b/drivers/mtd/maps/scb2_flash.c<br/>index 934a72c80078..9dcbc684abdb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/maps/scb2_flash.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/maps/scb2_flash.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/maps/scb2_flash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/maps/scb2_flash.c</a></div><div class='hunk'>@@ -234,20 +234,7 @@ static struct pci_driver scb2_flash_driver = {</div><div class='ctx'> 	.remove =   __devexit_p(scb2_flash_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init</div><div class='del'>-scb2_flash_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;scb2_flash_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit</div><div class='del'>-scb2_flash_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;scb2_flash_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(scb2_flash_init);</div><div class='del'>-module_exit(scb2_flash_exit);</div><div class='add'>+module_pci_driver(scb2_flash_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Tim Hockin &lt;thockin@sun.com&gt;");</div><div class='head'>diff --git a/drivers/mtd/maps/wr_sbc82xx_flash.c b/drivers/mtd/maps/wr_sbc82xx_flash.c<br/>index 71b0ba797912..e7534c82f93a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/maps/wr_sbc82xx_flash.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/maps/wr_sbc82xx_flash.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/maps/wr_sbc82xx_flash.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/maps/wr_sbc82xx_flash.c</a></div><div class='hunk'>@@ -59,7 +59,7 @@ static struct mtd_partition bigflash_parts[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char *part_probes[] __initdata = {"cmdlinepart", "RedBoot", NULL};</div><div class='add'>+static const char *part_probes[] __initconst = {"cmdlinepart", "RedBoot", NULL};</div><div class='ctx'> </div><div class='ctx'> #define init_sbc82xx_one_flash(map, br, or)			\</div><div class='ctx'> do {								\</div><div class='head'>diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c<br/>index 58fc65f5c817..f2f482bec573 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/mtdchar.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/mtdchar.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/mtdchar.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/mtdchar.c</a></div><div class='hunk'>@@ -376,7 +376,7 @@ static int otp_select_filemode(struct mtd_file_info *mfi, int mode)</div><div class='ctx'> 	 * Make a fake call to mtd_read_fact_prot_reg() to check if OTP</div><div class='ctx'> 	 * operations are supported.</div><div class='ctx'> 	 */</div><div class='del'>-	if (mtd_read_fact_prot_reg(mtd, -1, -1, &amp;retlen, NULL) == -EOPNOTSUPP)</div><div class='add'>+	if (mtd_read_fact_prot_reg(mtd, -1, 0, &amp;retlen, NULL) == -EOPNOTSUPP)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	switch (mode) {</div><div class='head'>diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c<br/>index c837507dfb1c..575730744fdb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/mtdcore.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/mtdcore.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/mtdcore.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/mtdcore.c</a></div><div class='hunk'>@@ -250,6 +250,43 @@ static ssize_t mtd_name_show(struct device *dev,</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR(name, S_IRUGO, mtd_name_show, NULL);</div><div class='ctx'> </div><div class='add'>+static ssize_t mtd_ecc_strength_show(struct device *dev,</div><div class='add'>+				     struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct mtd_info *mtd = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return snprintf(buf, PAGE_SIZE, "%u\n", mtd-&gt;ecc_strength);</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR(ecc_strength, S_IRUGO, mtd_ecc_strength_show, NULL);</div><div class='add'>+</div><div class='add'>+static ssize_t mtd_bitflip_threshold_show(struct device *dev,</div><div class='add'>+					  struct device_attribute *attr,</div><div class='add'>+					  char *buf)</div><div class='add'>+{</div><div class='add'>+	struct mtd_info *mtd = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return snprintf(buf, PAGE_SIZE, "%u\n", mtd-&gt;bitflip_threshold);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t mtd_bitflip_threshold_store(struct device *dev,</div><div class='add'>+					   struct device_attribute *attr,</div><div class='add'>+					   const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct mtd_info *mtd = dev_get_drvdata(dev);</div><div class='add'>+	unsigned int bitflip_threshold;</div><div class='add'>+	int retval;</div><div class='add'>+</div><div class='add'>+	retval = kstrtouint(buf, 0, &amp;bitflip_threshold);</div><div class='add'>+	if (retval)</div><div class='add'>+		return retval;</div><div class='add'>+</div><div class='add'>+	mtd-&gt;bitflip_threshold = bitflip_threshold;</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR(bitflip_threshold, S_IRUGO | S_IWUSR,</div><div class='add'>+		   mtd_bitflip_threshold_show,</div><div class='add'>+		   mtd_bitflip_threshold_store);</div><div class='add'>+</div><div class='ctx'> static struct attribute *mtd_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_type.attr,</div><div class='ctx'> 	&amp;dev_attr_flags.attr,</div><div class='hunk'>@@ -260,6 +297,8 @@ static struct attribute *mtd_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_oobsize.attr,</div><div class='ctx'> 	&amp;dev_attr_numeraseregions.attr,</div><div class='ctx'> 	&amp;dev_attr_name.attr,</div><div class='add'>+	&amp;dev_attr_ecc_strength.attr,</div><div class='add'>+	&amp;dev_attr_bitflip_threshold.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -322,6 +361,10 @@ int add_mtd_device(struct mtd_info *mtd)</div><div class='ctx'> 	mtd-&gt;index = i;</div><div class='ctx'> 	mtd-&gt;usecount = 0;</div><div class='ctx'> </div><div class='add'>+	/* default value if not set by driver */</div><div class='add'>+	if (mtd-&gt;bitflip_threshold == 0)</div><div class='add'>+		mtd-&gt;bitflip_threshold = mtd-&gt;ecc_strength;</div><div class='add'>+</div><div class='ctx'> 	if (is_power_of_2(mtd-&gt;erasesize))</div><div class='ctx'> 		mtd-&gt;erasesize_shift = ffs(mtd-&gt;erasesize) - 1;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -757,12 +800,24 @@ EXPORT_SYMBOL_GPL(mtd_get_unmapped_area);</div><div class='ctx'> int mtd_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen,</div><div class='ctx'> 	     u_char *buf)</div><div class='ctx'> {</div><div class='add'>+	int ret_code;</div><div class='ctx'> 	*retlen = 0;</div><div class='ctx'> 	if (from &lt; 0 || from &gt; mtd-&gt;size || len &gt; mtd-&gt;size - from)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (!len)</div><div class='ctx'> 		return 0;</div><div class='del'>-	return mtd-&gt;_read(mtd, from, len, retlen, buf);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In the absence of an error, drivers return a non-negative integer</div><div class='add'>+	 * representing the maximum number of bitflips that were corrected on</div><div class='add'>+	 * any one ecc region (if applicable; zero otherwise).</div><div class='add'>+	 */</div><div class='add'>+	ret_code = mtd-&gt;_read(mtd, from, len, retlen, buf);</div><div class='add'>+	if (unlikely(ret_code &lt; 0))</div><div class='add'>+		return ret_code;</div><div class='add'>+	if (mtd-&gt;ecc_strength == 0)</div><div class='add'>+		return 0;	/* device lacks ecc */</div><div class='add'>+	return ret_code &gt;= mtd-&gt;bitflip_threshold ? -EUCLEAN : 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(mtd_read);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c<br/>index 9651c06de0a9..d518e4db8a0b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/mtdpart.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/mtdpart.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/mtdpart.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/mtdpart.c</a></div><div class='hunk'>@@ -67,12 +67,12 @@ static int part_read(struct mtd_info *mtd, loff_t from, size_t len,</div><div class='ctx'> 	stats = part-&gt;master-&gt;ecc_stats;</div><div class='ctx'> 	res = part-&gt;master-&gt;_read(part-&gt;master, from + part-&gt;offset, len,</div><div class='ctx'> 				  retlen, buf);</div><div class='del'>-	if (unlikely(res)) {</div><div class='del'>-		if (mtd_is_bitflip(res))</div><div class='del'>-			mtd-&gt;ecc_stats.corrected += part-&gt;master-&gt;ecc_stats.corrected - stats.corrected;</div><div class='del'>-		if (mtd_is_eccerr(res))</div><div class='del'>-			mtd-&gt;ecc_stats.failed += part-&gt;master-&gt;ecc_stats.failed - stats.failed;</div><div class='del'>-	}</div><div class='add'>+	if (unlikely(mtd_is_eccerr(res)))</div><div class='add'>+		mtd-&gt;ecc_stats.failed +=</div><div class='add'>+			part-&gt;master-&gt;ecc_stats.failed - stats.failed;</div><div class='add'>+	else</div><div class='add'>+		mtd-&gt;ecc_stats.corrected +=</div><div class='add'>+			part-&gt;master-&gt;ecc_stats.corrected - stats.corrected;</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -517,6 +517,8 @@ static struct mtd_part *allocate_partition(struct mtd_info *master,</div><div class='ctx'> </div><div class='ctx'> 	slave-&gt;mtd.ecclayout = master-&gt;ecclayout;</div><div class='ctx'> 	slave-&gt;mtd.ecc_strength = master-&gt;ecc_strength;</div><div class='add'>+	slave-&gt;mtd.bitflip_threshold = master-&gt;bitflip_threshold;</div><div class='add'>+</div><div class='ctx'> 	if (master-&gt;_block_isbad) {</div><div class='ctx'> 		uint64_t offs = 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig<br/>index 7d17cecad69d..31bb7e5b504a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/Kconfig</a></div><div class='hunk'>@@ -115,6 +115,46 @@ config MTD_NAND_OMAP2</div><div class='ctx'>           Support for NAND flash on Texas Instruments OMAP2, OMAP3 and OMAP4</div><div class='ctx'> 	  platforms.</div><div class='ctx'> </div><div class='add'>+config MTD_NAND_OMAP_BCH</div><div class='add'>+	depends on MTD_NAND &amp;&amp; MTD_NAND_OMAP2 &amp;&amp; ARCH_OMAP3</div><div class='add'>+	bool "Enable support for hardware BCH error correction"</div><div class='add'>+	default n</div><div class='add'>+	select BCH</div><div class='add'>+	select BCH_CONST_PARAMS</div><div class='add'>+	help</div><div class='add'>+	 Support for hardware BCH error correction.</div><div class='add'>+</div><div class='add'>+choice</div><div class='add'>+	prompt "BCH error correction capability"</div><div class='add'>+	depends on MTD_NAND_OMAP_BCH</div><div class='add'>+</div><div class='add'>+config MTD_NAND_OMAP_BCH8</div><div class='add'>+	bool "8 bits / 512 bytes (recommended)"</div><div class='add'>+	help</div><div class='add'>+	 Support correcting up to 8 bitflips per 512-byte block.</div><div class='add'>+	 This will use 13 bytes of spare area per 512 bytes of page data.</div><div class='add'>+	 This is the recommended mode, as 4-bit mode does not work</div><div class='add'>+	 on some OMAP3 revisions, due to a hardware bug.</div><div class='add'>+</div><div class='add'>+config MTD_NAND_OMAP_BCH4</div><div class='add'>+	bool "4 bits / 512 bytes"</div><div class='add'>+	help</div><div class='add'>+	 Support correcting up to 4 bitflips per 512-byte block.</div><div class='add'>+	 This will use 7 bytes of spare area per 512 bytes of page data.</div><div class='add'>+	 Note that this mode does not work on some OMAP3 revisions, due to a</div><div class='add'>+	 hardware bug. Please check your OMAP datasheet before selecting this</div><div class='add'>+	 mode.</div><div class='add'>+</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='add'>+if MTD_NAND_OMAP_BCH</div><div class='add'>+config BCH_CONST_M</div><div class='add'>+	default 13</div><div class='add'>+config BCH_CONST_T</div><div class='add'>+	default 4 if MTD_NAND_OMAP_BCH4</div><div class='add'>+	default 8 if MTD_NAND_OMAP_BCH8</div><div class='add'>+endif</div><div class='add'>+</div><div class='ctx'> config MTD_NAND_IDS</div><div class='ctx'> 	tristate</div><div class='ctx'> </div><div class='hunk'>@@ -440,7 +480,7 @@ config MTD_NAND_NANDSIM</div><div class='ctx'> </div><div class='ctx'> config MTD_NAND_GPMI_NAND</div><div class='ctx'>         bool "GPMI NAND Flash Controller driver"</div><div class='del'>-        depends on MTD_NAND &amp;&amp; (SOC_IMX23 || SOC_IMX28)</div><div class='add'>+        depends on MTD_NAND &amp;&amp; (SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q)</div><div class='ctx'>         help</div><div class='ctx'> 	 Enables NAND Flash support for IMX23 or IMX28.</div><div class='ctx'> 	 The GPMI controller is very powerful, with the help of BCH</div><div class='head'>diff --git a/drivers/mtd/nand/alauda.c b/drivers/mtd/nand/alauda.c<br/>index 4f20e1d8bef1..60a0dfdb0808 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/alauda.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/alauda.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/alauda.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/alauda.c</a></div><div class='hunk'>@@ -414,7 +414,7 @@ static int alauda_bounce_read(struct mtd_info *mtd, loff_t from, size_t len,</div><div class='ctx'> 	}</div><div class='ctx'> 	err = 0;</div><div class='ctx'> 	if (corrected)</div><div class='del'>-		err = -EUCLEAN;</div><div class='add'>+		err = 1;	/* return max_bitflips per ecc step */</div><div class='ctx'> 	if (uncorrected)</div><div class='ctx'> 		err = -EBADMSG;</div><div class='ctx'> out:</div><div class='hunk'>@@ -446,7 +446,7 @@ static int alauda_read(struct mtd_info *mtd, loff_t from, size_t len,</div><div class='ctx'> 	}</div><div class='ctx'> 	err = 0;</div><div class='ctx'> 	if (corrected)</div><div class='del'>-		err = -EUCLEAN;</div><div class='add'>+		err = 1;	/* return max_bitflips per ecc step */</div><div class='ctx'> 	if (uncorrected)</div><div class='ctx'> 		err = -EBADMSG;</div><div class='ctx'> 	return err;</div><div class='head'>diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c<br/>index 73416951f4c1..861ca8f7e47d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/ams-delta.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/ams-delta.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/ams-delta.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/ams-delta.c</a></div><div class='hunk'>@@ -212,18 +212,17 @@ static int __devinit ams_delta_init(struct platform_device *pdev)</div><div class='ctx'> 	/* Link the private data with the MTD structure */</div><div class='ctx'> 	ams_delta_mtd-&gt;priv = this;</div><div class='ctx'> </div><div class='del'>-	if (!request_mem_region(res-&gt;start, resource_size(res),</div><div class='del'>-			dev_name(&amp;pdev-&gt;dev))) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "request_mem_region failed\n");</div><div class='del'>-		err = -EBUSY;</div><div class='del'>-		goto out_free;</div><div class='del'>-	}</div><div class='add'>+	/*</div><div class='add'>+	 * Don't try to request the memory region from here,</div><div class='add'>+	 * it should have been already requested from the</div><div class='add'>+	 * gpio-omap driver and requesting it again would fail.</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='ctx'> 	io_base = ioremap(res-&gt;start, resource_size(res));</div><div class='ctx'> 	if (io_base == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "ioremap failed\n");</div><div class='ctx'> 		err = -EIO;</div><div class='del'>-		goto out_release_io;</div><div class='add'>+		goto out_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	this-&gt;priv = io_base;</div><div class='hunk'>@@ -271,8 +270,6 @@ out_gpio:</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> 	gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);</div><div class='ctx'> 	iounmap(io_base);</div><div class='del'>-out_release_io:</div><div class='del'>-	release_mem_region(res-&gt;start, resource_size(res));</div><div class='ctx'> out_free:</div><div class='ctx'> 	kfree(ams_delta_mtd);</div><div class='ctx'>  out:</div><div class='hunk'>@@ -285,7 +282,6 @@ out_free:</div><div class='ctx'> static int __devexit ams_delta_cleanup(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *io_base = platform_get_drvdata(pdev);</div><div class='del'>-	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Release resources, unregister device */</div><div class='ctx'> 	nand_release(ams_delta_mtd);</div><div class='hunk'>@@ -293,7 +289,6 @@ static int __devexit ams_delta_cleanup(struct platform_device *pdev)</div><div class='ctx'> 	gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));</div><div class='ctx'> 	gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);</div><div class='ctx'> 	iounmap(io_base);</div><div class='del'>-	release_mem_region(res-&gt;start, resource_size(res));</div><div class='ctx'> </div><div class='ctx'> 	/* Free the MTD device structure */</div><div class='ctx'> 	kfree(ams_delta_mtd);</div><div class='head'>diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c<br/>index 2165576a1c67..97ac6712bb19 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/atmel_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/atmel_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/atmel_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/atmel_nand.c</a></div><div class='hunk'>@@ -324,9 +324,10 @@ static int atmel_nand_calculate(struct mtd_info *mtd,</div><div class='ctx'>  * mtd:        mtd info structure</div><div class='ctx'>  * chip:       nand chip info structure</div><div class='ctx'>  * buf:        buffer to store read data</div><div class='add'>+ * oob_required:    caller expects OOB data read to chip-&gt;oob_poi</div><div class='ctx'>  */</div><div class='del'>-static int atmel_nand_read_page(struct mtd_info *mtd,</div><div class='del'>-		struct nand_chip *chip, uint8_t *buf, int page)</div><div class='add'>+static int atmel_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='add'>+				uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	int eccsize = chip-&gt;ecc.size;</div><div class='ctx'> 	int eccbytes = chip-&gt;ecc.bytes;</div><div class='hunk'>@@ -335,6 +336,7 @@ static int atmel_nand_read_page(struct mtd_info *mtd,</div><div class='ctx'> 	uint8_t *oob = chip-&gt;oob_poi;</div><div class='ctx'> 	uint8_t *ecc_pos;</div><div class='ctx'> 	int stat;</div><div class='add'>+	unsigned int max_bitflips = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Errata: ALE is incorrectly wired up to the ECC controller</div><div class='hunk'>@@ -371,10 +373,12 @@ static int atmel_nand_read_page(struct mtd_info *mtd,</div><div class='ctx'> 	/* check if there's an error */</div><div class='ctx'> 	stat = chip-&gt;ecc.correct(mtd, p, oob, NULL);</div><div class='ctx'> </div><div class='del'>-	if (stat &lt; 0)</div><div class='add'>+	if (stat &lt; 0) {</div><div class='ctx'> 		mtd-&gt;ecc_stats.failed++;</div><div class='del'>-	else</div><div class='add'>+	} else {</div><div class='ctx'> 		mtd-&gt;ecc_stats.corrected += stat;</div><div class='add'>+		max_bitflips = max_t(unsigned int, max_bitflips, stat);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* get back to oob start (end of page) */</div><div class='ctx'> 	chip-&gt;cmdfunc(mtd, NAND_CMD_RNDOUT, mtd-&gt;writesize, -1);</div><div class='hunk'>@@ -382,7 +386,7 @@ static int atmel_nand_read_page(struct mtd_info *mtd,</div><div class='ctx'> 	/* read the oob */</div><div class='ctx'> 	chip-&gt;read_buf(mtd, oob, mtd-&gt;oobsize);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c<br/>index 73abbc3e093e..9f609d2dcf62 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/au1550nd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/au1550nd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/au1550nd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/au1550nd.c</a></div><div class='hunk'>@@ -508,8 +508,6 @@ static int __devinit au1550nd_probe(struct platform_device *pdev)</div><div class='ctx'> 	this-&gt;chip_delay = 30;</div><div class='ctx'> 	this-&gt;ecc.mode = NAND_ECC_SOFT;</div><div class='ctx'> </div><div class='del'>-	this-&gt;options = NAND_NO_AUTOINCR;</div><div class='del'>-</div><div class='ctx'> 	if (pd-&gt;devwidth)</div><div class='ctx'> 		this-&gt;options |= NAND_BUSWIDTH_16;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/nand/autcpu12.c b/drivers/mtd/nand/autcpu12.c<br/>index 2e42ec2e8ff4..04769a49a7cb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/autcpu12.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/autcpu12.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/autcpu12.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/autcpu12.c</a></div><div class='hunk'>@@ -102,10 +102,10 @@ static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd,</div><div class='ctx'> 		void __iomem *addr;</div><div class='ctx'> 		unsigned char bits;</div><div class='ctx'> </div><div class='del'>-		addr = CS89712_VIRT_BASE + AUTCPU12_SMC_PORT_OFFSET;</div><div class='del'>-		bits = (ctrl &amp; NAND_CLE) &lt;&lt; 4;</div><div class='add'>+		bits = clps_readb(AUTCPU12_SMC_PORT_OFFSET) &amp; ~0x30;</div><div class='add'>+		bits |= (ctrl &amp; NAND_CLE) &lt;&lt; 4;</div><div class='ctx'> 		bits |= (ctrl &amp; NAND_ALE) &lt;&lt; 2;</div><div class='del'>-		writeb((readb(addr) &amp; ~0x30) | bits, addr);</div><div class='add'>+		clps_writeb(bits, AUTCPU12_SMC_PORT_OFFSET);</div><div class='ctx'> </div><div class='ctx'> 		addr = autcpu12_fio_base + AUTCPU12_SMC_SELECT_OFFSET;</div><div class='ctx'> 		writeb((readb(addr) &amp; ~0x1) | (ctrl &amp; NAND_NCE), addr);</div><div class='hunk'>@@ -120,9 +120,7 @@ static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd,</div><div class='ctx'>  */</div><div class='ctx'> int autcpu12_device_ready(struct mtd_info *mtd)</div><div class='ctx'> {</div><div class='del'>-	void __iomem *addr = CS89712_VIRT_BASE + AUTCPU12_SMC_PORT_OFFSET;</div><div class='del'>-</div><div class='del'>-	return readb(addr) &amp; AUTCPU12_SMC_RDY;</div><div class='add'>+	return clps_readb(AUTCPU12_SMC_PORT_OFFSET) &amp; AUTCPU12_SMC_RDY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/mtd/nand/bcm_umi_bch.c b/drivers/mtd/nand/bcm_umi_bch.c<br/>index a930666d0687..5914bb32e001 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/bcm_umi_bch.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/bcm_umi_bch.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/bcm_umi_bch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/bcm_umi_bch.c</a></div><div class='hunk'>@@ -22,9 +22,9 @@</div><div class='ctx'> </div><div class='ctx'> /* ---- Private Function Prototypes -------------------------------------- */</div><div class='ctx'> static int bcm_umi_bch_read_page_hwecc(struct mtd_info *mtd,</div><div class='del'>-	struct nand_chip *chip, uint8_t *buf, int page);</div><div class='add'>+	struct nand_chip *chip, uint8_t *buf, int oob_required, int page);</div><div class='ctx'> static void bcm_umi_bch_write_page_hwecc(struct mtd_info *mtd,</div><div class='del'>-	struct nand_chip *chip, const uint8_t *buf);</div><div class='add'>+	struct nand_chip *chip, const uint8_t *buf, int oob_required);</div><div class='ctx'> </div><div class='ctx'> /* ---- Private Variables ------------------------------------------------ */</div><div class='ctx'> </div><div class='hunk'>@@ -103,11 +103,12 @@ static struct nand_ecclayout nand_hw_eccoob_4096 = {</div><div class='ctx'> *  @mtd:	mtd info structure</div><div class='ctx'> *  @chip:	nand chip info structure</div><div class='ctx'> *  @buf:	buffer to store read data</div><div class='add'>+*  @oob_required:	caller expects OOB data read to chip-&gt;oob_poi</div><div class='ctx'> *</div><div class='ctx'> ***************************************************************************/</div><div class='ctx'> static int bcm_umi_bch_read_page_hwecc(struct mtd_info *mtd,</div><div class='ctx'> 				       struct nand_chip *chip, uint8_t * buf,</div><div class='del'>-						 int page)</div><div class='add'>+				       int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	int sectorIdx = 0;</div><div class='ctx'> 	int eccsize = chip-&gt;ecc.size;</div><div class='hunk'>@@ -116,6 +117,7 @@ static int bcm_umi_bch_read_page_hwecc(struct mtd_info *mtd,</div><div class='ctx'> 	uint8_t eccCalc[NAND_ECC_NUM_BYTES];</div><div class='ctx'> 	int sectorOobSize = mtd-&gt;oobsize / eccsteps;</div><div class='ctx'> 	int stat;</div><div class='add'>+	unsigned int max_bitflips = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (sectorIdx = 0; sectorIdx &lt; eccsteps;</div><div class='ctx'> 			sectorIdx++, datap += eccsize) {</div><div class='hunk'>@@ -177,9 +179,10 @@ static int bcm_umi_bch_read_page_hwecc(struct mtd_info *mtd,</div><div class='ctx'> 			}</div><div class='ctx'> #endif</div><div class='ctx'> 			mtd-&gt;ecc_stats.corrected += stat;</div><div class='add'>+			max_bitflips = max_t(unsigned int, max_bitflips, stat);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+	return max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /****************************************************************************</div><div class='hunk'>@@ -188,10 +191,11 @@ static int bcm_umi_bch_read_page_hwecc(struct mtd_info *mtd,</div><div class='ctx'> *  @mtd:	mtd info structure</div><div class='ctx'> *  @chip:	nand chip info structure</div><div class='ctx'> *  @buf:	data buffer</div><div class='add'>+*  @oob_required:	must write chip-&gt;oob_poi to OOB</div><div class='ctx'> *</div><div class='ctx'> ***************************************************************************/</div><div class='ctx'> static void bcm_umi_bch_write_page_hwecc(struct mtd_info *mtd,</div><div class='del'>-	struct nand_chip *chip, const uint8_t *buf)</div><div class='add'>+	struct nand_chip *chip, const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	int sectorIdx = 0;</div><div class='ctx'> 	int eccsize = chip-&gt;ecc.size;</div><div class='head'>diff --git a/drivers/mtd/nand/bcm_umi_nand.c b/drivers/mtd/nand/bcm_umi_nand.c<br/>index 6908cdde3065..c855e7cd337b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/bcm_umi_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/bcm_umi_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/bcm_umi_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/bcm_umi_nand.c</a></div><div class='hunk'>@@ -341,7 +341,7 @@ static int bcm_umi_nand_verify_buf(struct mtd_info *mtd, const u_char * buf,</div><div class='ctx'> 	 * for MLC parts which may have permanently stuck bits.</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct nand_chip *chip = mtd-&gt;priv;</div><div class='del'>-	int ret = chip-&gt;ecc.read_page(mtd, chip, readbackbuf, 0);</div><div class='add'>+	int ret = chip-&gt;ecc.read_page(mtd, chip, readbackbuf, 0, 0);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	else {</div><div class='hunk'>@@ -476,12 +476,7 @@ static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)</div><div class='ctx'> 		this-&gt;badblock_pattern = &amp;largepage_bbt;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * FIXME: ecc strength value of 6 bits per 512 bytes of data is a</div><div class='del'>-	 * conservative guess, given 13 ecc bytes and using bch alg.</div><div class='del'>-	 * (Assume Galois field order m=15 to allow a margin of error.)</div><div class='del'>-	 */</div><div class='del'>-	this-&gt;ecc.strength = 6;</div><div class='add'>+	this-&gt;ecc.strength = 8;</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c<br/>index d7b86b925de5..3f1c18599cbd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/bf5xx_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/bf5xx_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/bf5xx_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/bf5xx_nand.c</a></div><div class='hunk'>@@ -558,7 +558,7 @@ static void bf5xx_nand_dma_write_buf(struct mtd_info *mtd,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bf5xx_nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-		uint8_t *buf, int page)</div><div class='add'>+		uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	bf5xx_nand_read_buf(mtd, buf, mtd-&gt;writesize);</div><div class='ctx'> 	bf5xx_nand_read_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='hunk'>@@ -567,7 +567,7 @@ static int bf5xx_nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bf5xx_nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-		const uint8_t *buf)</div><div class='add'>+		const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	bf5xx_nand_write_buf(mtd, buf, mtd-&gt;writesize);</div><div class='ctx'> 	bf5xx_nand_write_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='head'>diff --git a/drivers/mtd/nand/cafe_nand.c b/drivers/mtd/nand/cafe_nand.c<br/>index 2a96e1a12062..41371ba1a811 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/cafe_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/cafe_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/cafe_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/cafe_nand.c</a></div><div class='hunk'>@@ -364,25 +364,27 @@ static int cafe_nand_write_oob(struct mtd_info *mtd,</div><div class='ctx'> </div><div class='ctx'> /* Don't use -- use nand_read_oob_std for now */</div><div class='ctx'> static int cafe_nand_read_oob(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-			      int page, int sndcmd)</div><div class='add'>+			      int page)</div><div class='ctx'> {</div><div class='ctx'> 	chip-&gt;cmdfunc(mtd, NAND_CMD_READOOB, 0, page);</div><div class='ctx'> 	chip-&gt;read_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> /**</div><div class='ctx'>  * cafe_nand_read_page_syndrome - [REPLACEABLE] hardware ecc syndrome based page read</div><div class='ctx'>  * @mtd:	mtd info structure</div><div class='ctx'>  * @chip:	nand chip info structure</div><div class='ctx'>  * @buf:	buffer to store read data</div><div class='add'>+ * @oob_required:	caller expects OOB data read to chip-&gt;oob_poi</div><div class='ctx'>  *</div><div class='ctx'>  * The hw generator calculates the error syndrome automatically. Therefor</div><div class='ctx'>  * we need a special oob layout and handling.</div><div class='ctx'>  */</div><div class='ctx'> static int cafe_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-			       uint8_t *buf, int page)</div><div class='add'>+			       uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	struct cafe_priv *cafe = mtd-&gt;priv;</div><div class='add'>+	unsigned int max_bitflips = 0;</div><div class='ctx'> </div><div class='ctx'> 	cafe_dev_dbg(&amp;cafe-&gt;pdev-&gt;dev, "ECC result %08x SYN1,2 %08x\n",</div><div class='ctx'> 		     cafe_readl(cafe, NAND_ECC_RESULT),</div><div class='hunk'>@@ -449,10 +451,11 @@ static int cafe_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dev_dbg(&amp;cafe-&gt;pdev-&gt;dev, "Corrected %d symbol errors\n", n);</div><div class='ctx'> 			mtd-&gt;ecc_stats.corrected += n;</div><div class='add'>+			max_bitflips = max_t(unsigned int, max_bitflips, n);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct nand_ecclayout cafe_oobinfo_2048 = {</div><div class='hunk'>@@ -518,7 +521,8 @@ static struct nand_bbt_descr cafe_bbt_mirror_descr_512 = {</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static void cafe_nand_write_page_lowlevel(struct mtd_info *mtd,</div><div class='del'>-					  struct nand_chip *chip, const uint8_t *buf)</div><div class='add'>+					  struct nand_chip *chip,</div><div class='add'>+					  const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	struct cafe_priv *cafe = mtd-&gt;priv;</div><div class='ctx'> </div><div class='hunk'>@@ -530,16 +534,17 @@ static void cafe_nand_write_page_lowlevel(struct mtd_info *mtd,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cafe_nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				const uint8_t *buf, int page, int cached, int raw)</div><div class='add'>+				const uint8_t *buf, int oob_required, int page,</div><div class='add'>+				int cached, int raw)</div><div class='ctx'> {</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	chip-&gt;cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(raw))</div><div class='del'>-		chip-&gt;ecc.write_page_raw(mtd, chip, buf);</div><div class='add'>+		chip-&gt;ecc.write_page_raw(mtd, chip, buf, oob_required);</div><div class='ctx'> 	else</div><div class='del'>-		chip-&gt;ecc.write_page(mtd, chip, buf);</div><div class='add'>+		chip-&gt;ecc.write_page(mtd, chip, buf, oob_required);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Cached progamming disabled for now, Not sure if its worth the</div><div class='hunk'>@@ -685,7 +690,7 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	/* Enable the following for a flash based bad block table */</div><div class='ctx'> 	cafe-&gt;nand.bbt_options = NAND_BBT_USE_FLASH;</div><div class='del'>-	cafe-&gt;nand.options = NAND_NO_AUTOINCR | NAND_OWN_BUFFERS;</div><div class='add'>+	cafe-&gt;nand.options = NAND_OWN_BUFFERS;</div><div class='ctx'> </div><div class='ctx'> 	if (skipbbt) {</div><div class='ctx'> 		cafe-&gt;nand.options |= NAND_SKIP_BBTSCAN;</div><div class='hunk'>@@ -888,17 +893,7 @@ static struct pci_driver cafe_nand_pci_driver = {</div><div class='ctx'> 	.resume = cafe_nand_resume,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init cafe_nand_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;cafe_nand_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit cafe_nand_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;cafe_nand_pci_driver);</div><div class='del'>-}</div><div class='del'>-module_init(cafe_nand_init);</div><div class='del'>-module_exit(cafe_nand_exit);</div><div class='add'>+module_pci_driver(cafe_nand_pci_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("David Woodhouse &lt;dwmw2@infradead.org&gt;");</div><div class='head'>diff --git a/drivers/mtd/nand/cs553x_nand.c b/drivers/mtd/nand/cs553x_nand.c<br/>index 821c34c62500..adb6c3ef37fb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/cs553x_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/cs553x_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/cs553x_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/cs553x_nand.c</a></div><div class='hunk'>@@ -240,7 +240,6 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)</div><div class='ctx'> </div><div class='ctx'> 	/* Enable the following for a flash based bad block table */</div><div class='ctx'> 	this-&gt;bbt_options = NAND_BBT_USE_FLASH;</div><div class='del'>-	this-&gt;options = NAND_NO_AUTOINCR;</div><div class='ctx'> </div><div class='ctx'> 	/* Scan to find existence of the device */</div><div class='ctx'> 	if (nand_scan(new_mtd, 1)) {</div><div class='head'>diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c<br/>index a9e57d686297..0650aafa0dd2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/denali.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/denali.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/denali.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/denali.c</a></div><div class='hunk'>@@ -924,9 +924,10 @@ bool is_erased(uint8_t *buf, int len)</div><div class='ctx'> #define ECC_LAST_ERR(x)		((x) &amp; ERR_CORRECTION_INFO__LAST_ERR_INFO)</div><div class='ctx'> </div><div class='ctx'> static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,</div><div class='del'>-					uint32_t irq_status)</div><div class='add'>+		       uint32_t irq_status, unsigned int *max_bitflips)</div><div class='ctx'> {</div><div class='ctx'> 	bool check_erased_page = false;</div><div class='add'>+	unsigned int bitflips = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (irq_status &amp; INTR_STATUS__ECC_ERR) {</div><div class='ctx'> 		/* read the ECC errors. we'll ignore them for now */</div><div class='hunk'>@@ -965,6 +966,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,</div><div class='ctx'> 					/* correct the ECC error */</div><div class='ctx'> 					buf[offset] ^= err_correction_value;</div><div class='ctx'> 					denali-&gt;mtd.ecc_stats.corrected++;</div><div class='add'>+					bitflips++;</div><div class='ctx'> 				}</div><div class='ctx'> 			} else {</div><div class='ctx'> 				/* if the error is not correctable, need to</div><div class='hunk'>@@ -984,6 +986,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,</div><div class='ctx'> 		clear_interrupts(denali);</div><div class='ctx'> 		denali_set_intr_modes(denali, true);</div><div class='ctx'> 	}</div><div class='add'>+	*max_bitflips = bitflips;</div><div class='ctx'> 	return check_erased_page;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1084,7 +1087,7 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'>  * by write_page above.</div><div class='ctx'>  * */</div><div class='ctx'> static void denali_write_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				const uint8_t *buf)</div><div class='add'>+				const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	/* for regular page writes, we let HW handle all the ECC</div><div class='ctx'> 	 * data written to the device. */</div><div class='hunk'>@@ -1096,7 +1099,7 @@ static void denali_write_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'>  * write_page() function above.</div><div class='ctx'>  */</div><div class='ctx'> static void denali_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-					const uint8_t *buf)</div><div class='add'>+					const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	/* for raw page writes, we want to disable ECC and simply write</div><div class='ctx'> 	   whatever data is in the buffer. */</div><div class='hunk'>@@ -1110,17 +1113,17 @@ static int denali_write_oob(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int denali_read_oob(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-			   int page, int sndcmd)</div><div class='add'>+			   int page)</div><div class='ctx'> {</div><div class='ctx'> 	read_oob_data(mtd, chip-&gt;oob_poi, page);</div><div class='ctx'> </div><div class='del'>-	return 0; /* notify NAND core to send command to</div><div class='del'>-			   NAND device. */</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-			    uint8_t *buf, int page)</div><div class='add'>+			    uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='add'>+	unsigned int max_bitflips;</div><div class='ctx'> 	struct denali_nand_info *denali = mtd_to_denali(mtd);</div><div class='ctx'> </div><div class='ctx'> 	dma_addr_t addr = denali-&gt;buf.dma_buf;</div><div class='hunk'>@@ -1153,7 +1156,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> </div><div class='ctx'> 	memcpy(buf, denali-&gt;buf.buf, mtd-&gt;writesize);</div><div class='ctx'> </div><div class='del'>-	check_erased_page = handle_ecc(denali, buf, irq_status);</div><div class='add'>+	check_erased_page = handle_ecc(denali, buf, irq_status, &amp;max_bitflips);</div><div class='ctx'> 	denali_enable_dma(denali, false);</div><div class='ctx'> </div><div class='ctx'> 	if (check_erased_page) {</div><div class='hunk'>@@ -1167,11 +1170,11 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 				denali-&gt;mtd.ecc_stats.failed++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+	return max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				uint8_t *buf, int page)</div><div class='add'>+				uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	struct denali_nand_info *denali = mtd_to_denali(mtd);</div><div class='ctx'> </div><div class='hunk'>@@ -1702,17 +1705,4 @@ static struct pci_driver denali_pci_driver = {</div><div class='ctx'> 	.remove = denali_pci_remove,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __devinit denali_init(void)</div><div class='del'>-{</div><div class='del'>-	printk(KERN_INFO "Spectra MTD driver\n");</div><div class='del'>-	return pci_register_driver(&amp;denali_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Free memory */</div><div class='del'>-static void __devexit denali_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;denali_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(denali_init);</div><div class='del'>-module_exit(denali_exit);</div><div class='add'>+module_pci_driver(denali_pci_driver);</div><div class='head'>diff --git a/drivers/mtd/nand/docg4.c b/drivers/mtd/nand/docg4.c<br/>index b08202664543..a225e49a5623 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/docg4.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/docg4.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/docg4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/docg4.c</a></div><div class='hunk'>@@ -720,6 +720,7 @@ static int read_page(struct mtd_info *mtd, struct nand_chip *nand,</div><div class='ctx'> 	struct docg4_priv *doc = nand-&gt;priv;</div><div class='ctx'> 	void __iomem *docptr = doc-&gt;virtadr;</div><div class='ctx'> 	uint16_t status, edc_err, *buf16;</div><div class='add'>+	int bits_corrected = 0;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(doc-&gt;dev, "%s: page %08x\n", __func__, page);</div><div class='ctx'> </div><div class='hunk'>@@ -772,7 +773,7 @@ static int read_page(struct mtd_info *mtd, struct nand_chip *nand,</div><div class='ctx'> </div><div class='ctx'> 		/* If bitflips are reported, attempt to correct with ecc */</div><div class='ctx'> 		if (edc_err &amp; DOC_ECCCONF1_BCH_SYNDROM_ERR) {</div><div class='del'>-			int bits_corrected = correct_data(mtd, buf, page);</div><div class='add'>+			bits_corrected = correct_data(mtd, buf, page);</div><div class='ctx'> 			if (bits_corrected == -EBADMSG)</div><div class='ctx'> 				mtd-&gt;ecc_stats.failed++;</div><div class='ctx'> 			else</div><div class='hunk'>@@ -781,24 +782,24 @@ static int read_page(struct mtd_info *mtd, struct nand_chip *nand,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	writew(0, docptr + DOC_DATAEND);</div><div class='del'>-	return 0;</div><div class='add'>+	return bits_corrected;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static int docg4_read_page_raw(struct mtd_info *mtd, struct nand_chip *nand,</div><div class='del'>-			       uint8_t *buf, int page)</div><div class='add'>+			       uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	return read_page(mtd, nand, buf, page, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int docg4_read_page(struct mtd_info *mtd, struct nand_chip *nand,</div><div class='del'>-			   uint8_t *buf, int page)</div><div class='add'>+			   uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	return read_page(mtd, nand, buf, page, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int docg4_read_oob(struct mtd_info *mtd, struct nand_chip *nand,</div><div class='del'>-			  int page, int sndcmd)</div><div class='add'>+			  int page)</div><div class='ctx'> {</div><div class='ctx'> 	struct docg4_priv *doc = nand-&gt;priv;</div><div class='ctx'> 	void __iomem *docptr = doc-&gt;virtadr;</div><div class='hunk'>@@ -952,13 +953,13 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *nand,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void docg4_write_page_raw(struct mtd_info *mtd, struct nand_chip *nand,</div><div class='del'>-				 const uint8_t *buf)</div><div class='add'>+				 const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	return write_page(mtd, nand, buf, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void docg4_write_page(struct mtd_info *mtd, struct nand_chip *nand,</div><div class='del'>-			     const uint8_t *buf)</div><div class='add'>+			     const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	return write_page(mtd, nand, buf, true);</div><div class='ctx'> }</div><div class='hunk'>@@ -1002,7 +1003,7 @@ static int __init read_factory_bbt(struct mtd_info *mtd)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	read_page_prologue(mtd, g4_addr);</div><div class='del'>-	status = docg4_read_page(mtd, nand, buf, DOCG4_FACTORY_BBT_PAGE);</div><div class='add'>+	status = docg4_read_page(mtd, nand, buf, 0, DOCG4_FACTORY_BBT_PAGE);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto exit;</div><div class='ctx'> </div><div class='hunk'>@@ -1079,7 +1080,7 @@ static int docg4_block_markbad(struct mtd_info *mtd, loff_t ofs)</div><div class='ctx'> </div><div class='ctx'> 	/* write first page of block */</div><div class='ctx'> 	write_page_prologue(mtd, g4_addr);</div><div class='del'>-	docg4_write_page(mtd, nand, buf);</div><div class='add'>+	docg4_write_page(mtd, nand, buf, 1);</div><div class='ctx'> 	ret = pageprog(mtd);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		mtd-&gt;ecc_stats.badblocks++;</div><div class='hunk'>@@ -1192,8 +1193,7 @@ static void __init init_mtd_structs(struct mtd_info *mtd)</div><div class='ctx'> 	nand-&gt;ecc.prepad = 8;</div><div class='ctx'> 	nand-&gt;ecc.bytes	= 8;</div><div class='ctx'> 	nand-&gt;ecc.strength = DOCG4_T;</div><div class='del'>-	nand-&gt;options =</div><div class='del'>-		NAND_BUSWIDTH_16 | NAND_NO_SUBPAGE_WRITE | NAND_NO_AUTOINCR;</div><div class='add'>+	nand-&gt;options = NAND_BUSWIDTH_16 | NAND_NO_SUBPAGE_WRITE;</div><div class='ctx'> 	nand-&gt;IO_ADDR_R = nand-&gt;IO_ADDR_W = doc-&gt;virtadr + DOC_IOSPACE_DATA;</div><div class='ctx'> 	nand-&gt;controller = &amp;nand-&gt;hwcontrol;</div><div class='ctx'> 	spin_lock_init(&amp;nand-&gt;controller-&gt;lock);</div><div class='head'>diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c<br/>index 80b5264f0a32..784293806110 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/fsl_elbc_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/fsl_elbc_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/fsl_elbc_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/fsl_elbc_nand.c</a></div><div class='hunk'>@@ -75,6 +75,7 @@ struct fsl_elbc_fcm_ctrl {</div><div class='ctx'> 	unsigned int use_mdr;    /* Non zero if the MDR is to be set      */</div><div class='ctx'> 	unsigned int oob;        /* Non zero if operating on OOB data     */</div><div class='ctx'> 	unsigned int counter;	 /* counter for the initializations	  */</div><div class='add'>+	unsigned int max_bitflips;  /* Saved during READ0 cmd		  */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* These map to the positions used by the FCM hardware ECC generator */</div><div class='hunk'>@@ -253,6 +254,8 @@ static int fsl_elbc_run_command(struct mtd_info *mtd)</div><div class='ctx'> 	if (chip-&gt;ecc.mode != NAND_ECC_HW)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	elbc_fcm_ctrl-&gt;max_bitflips = 0;</div><div class='add'>+</div><div class='ctx'> 	if (elbc_fcm_ctrl-&gt;read_bytes == mtd-&gt;writesize + mtd-&gt;oobsize) {</div><div class='ctx'> 		uint32_t lteccr = in_be32(&amp;lbc-&gt;lteccr);</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -262,11 +265,16 @@ static int fsl_elbc_run_command(struct mtd_info *mtd)</div><div class='ctx'> 		 * bits 28-31 are uncorrectable errors, marked elsewhere.</div><div class='ctx'> 		 * for small page nand only 1 bit is used.</div><div class='ctx'> 		 * if the ELBC doesn't have the lteccr register it reads 0</div><div class='add'>+		 * FIXME: 4 bits can be corrected on NANDs with 2k pages, so</div><div class='add'>+		 * count the number of sub-pages with bitflips and update</div><div class='add'>+		 * ecc_stats.corrected accordingly.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (lteccr &amp; 0x000F000F)</div><div class='ctx'> 			out_be32(&amp;lbc-&gt;lteccr, 0x000F000F); /* clear lteccr */</div><div class='del'>-		if (lteccr &amp; 0x000F0000)</div><div class='add'>+		if (lteccr &amp; 0x000F0000) {</div><div class='ctx'> 			mtd-&gt;ecc_stats.corrected++;</div><div class='add'>+			elbc_fcm_ctrl-&gt;max_bitflips = 1;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -738,26 +746,28 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fsl_elbc_read_page(struct mtd_info *mtd,</div><div class='del'>-                              struct nand_chip *chip,</div><div class='del'>-			      uint8_t *buf,</div><div class='del'>-			      int page)</div><div class='add'>+static int fsl_elbc_read_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='add'>+			      uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='add'>+	struct fsl_elbc_mtd *priv = chip-&gt;priv;</div><div class='add'>+	struct fsl_lbc_ctrl *ctrl = priv-&gt;ctrl;</div><div class='add'>+	struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl-&gt;nand;</div><div class='add'>+</div><div class='ctx'> 	fsl_elbc_read_buf(mtd, buf, mtd-&gt;writesize);</div><div class='del'>-	fsl_elbc_read_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='add'>+	if (oob_required)</div><div class='add'>+		fsl_elbc_read_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='ctx'> </div><div class='ctx'> 	if (fsl_elbc_wait(mtd, chip) &amp; NAND_STATUS_FAIL)</div><div class='ctx'> 		mtd-&gt;ecc_stats.failed++;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return elbc_fcm_ctrl-&gt;max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* ECC will be calculated automatically, and errors will be detected in</div><div class='ctx'>  * waitfunc.</div><div class='ctx'>  */</div><div class='del'>-static void fsl_elbc_write_page(struct mtd_info *mtd,</div><div class='del'>-                                struct nand_chip *chip,</div><div class='del'>-                                const uint8_t *buf)</div><div class='add'>+static void fsl_elbc_write_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='add'>+				const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	fsl_elbc_write_buf(mtd, buf, mtd-&gt;writesize);</div><div class='ctx'> 	fsl_elbc_write_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='hunk'>@@ -795,7 +805,7 @@ static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv)</div><div class='ctx'> 	chip-&gt;bbt_md = &amp;bbt_mirror_descr;</div><div class='ctx'> </div><div class='ctx'> 	/* set up nand options */</div><div class='del'>-	chip-&gt;options = NAND_NO_READRDY | NAND_NO_AUTOINCR;</div><div class='add'>+	chip-&gt;options = NAND_NO_READRDY;</div><div class='ctx'> 	chip-&gt;bbt_options = NAND_BBT_USE_FLASH;</div><div class='ctx'> </div><div class='ctx'> 	chip-&gt;controller = &amp;elbc_fcm_ctrl-&gt;controller;</div><div class='hunk'>@@ -814,11 +824,6 @@ static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv)</div><div class='ctx'> 		chip-&gt;ecc.size = 512;</div><div class='ctx'> 		chip-&gt;ecc.bytes = 3;</div><div class='ctx'> 		chip-&gt;ecc.strength = 1;</div><div class='del'>-		/*</div><div class='del'>-		 * FIXME: can hardware ecc correct 4 bitflips if page size is</div><div class='del'>-		 * 2k?  Then does hardware report number of corrections for this</div><div class='del'>-		 * case?  If so, ecc_stats reporting needs to be fixed as well.</div><div class='del'>-		 */</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* otherwise fall back to default software ECC */</div><div class='ctx'> 		chip-&gt;ecc.mode = NAND_ECC_SOFT;</div><div class='head'>diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c<br/>index c30ac7b83d28..9602c1b7e27e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/fsl_ifc_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/fsl_ifc_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/fsl_ifc_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/fsl_ifc_nand.c</a></div><div class='hunk'>@@ -63,6 +63,7 @@ struct fsl_ifc_nand_ctrl {</div><div class='ctx'> 	unsigned int oob;	/* Non zero if operating on OOB data	*/</div><div class='ctx'> 	unsigned int eccread;	/* Non zero for a full-page ECC read	*/</div><div class='ctx'> 	unsigned int counter;	/* counter for the initializations	*/</div><div class='add'>+	unsigned int max_bitflips;  /* Saved during READ0 cmd		*/</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct fsl_ifc_nand_ctrl *ifc_nand_ctrl;</div><div class='hunk'>@@ -262,6 +263,8 @@ static void fsl_ifc_run_command(struct mtd_info *mtd)</div><div class='ctx'> 	if (ctrl-&gt;nand_stat &amp; IFC_NAND_EVTER_STAT_WPER)</div><div class='ctx'> 		dev_err(priv-&gt;dev, "NAND Flash Write Protect Error\n");</div><div class='ctx'> </div><div class='add'>+	nctrl-&gt;max_bitflips = 0;</div><div class='add'>+</div><div class='ctx'> 	if (nctrl-&gt;eccread) {</div><div class='ctx'> 		int errors;</div><div class='ctx'> 		int bufnum = nctrl-&gt;page &amp; priv-&gt;bufnum_mask;</div><div class='hunk'>@@ -290,6 +293,9 @@ static void fsl_ifc_run_command(struct mtd_info *mtd)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			mtd-&gt;ecc_stats.corrected += errors;</div><div class='add'>+			nctrl-&gt;max_bitflips = max_t(unsigned int,</div><div class='add'>+						    nctrl-&gt;max_bitflips,</div><div class='add'>+						    errors);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		nctrl-&gt;eccread = 0;</div><div class='hunk'>@@ -375,21 +381,31 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,</div><div class='ctx'> </div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* READID must read all 8 possible bytes */</div><div class='ctx'> 	case NAND_CMD_READID:</div><div class='add'>+	case NAND_CMD_PARAM: {</div><div class='add'>+		int timing = IFC_FIR_OP_RB;</div><div class='add'>+		if (command == NAND_CMD_PARAM)</div><div class='add'>+			timing = IFC_FIR_OP_RBCD;</div><div class='add'>+</div><div class='ctx'> 		out_be32(&amp;ifc-&gt;ifc_nand.nand_fir0,</div><div class='ctx'> 				(IFC_FIR_OP_CMD0 &lt;&lt; IFC_NAND_FIR0_OP0_SHIFT) |</div><div class='ctx'> 				(IFC_FIR_OP_UA  &lt;&lt; IFC_NAND_FIR0_OP1_SHIFT) |</div><div class='del'>-				(IFC_FIR_OP_RB &lt;&lt; IFC_NAND_FIR0_OP2_SHIFT));</div><div class='add'>+				(timing &lt;&lt; IFC_NAND_FIR0_OP2_SHIFT));</div><div class='ctx'> 		out_be32(&amp;ifc-&gt;ifc_nand.nand_fcr0,</div><div class='del'>-				NAND_CMD_READID &lt;&lt; IFC_NAND_FCR0_CMD0_SHIFT);</div><div class='del'>-		/* 8 bytes for manuf, device and exts */</div><div class='del'>-		out_be32(&amp;ifc-&gt;ifc_nand.nand_fbcr, 8);</div><div class='del'>-		ifc_nand_ctrl-&gt;read_bytes = 8;</div><div class='add'>+				command &lt;&lt; IFC_NAND_FCR0_CMD0_SHIFT);</div><div class='add'>+		out_be32(&amp;ifc-&gt;ifc_nand.row3, column);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * although currently it's 8 bytes for READID, we always read</div><div class='add'>+		 * the maximum 256 bytes(for PARAM)</div><div class='add'>+		 */</div><div class='add'>+		out_be32(&amp;ifc-&gt;ifc_nand.nand_fbcr, 256);</div><div class='add'>+		ifc_nand_ctrl-&gt;read_bytes = 256;</div><div class='ctx'> </div><div class='ctx'> 		set_addr(mtd, 0, 0, 0);</div><div class='ctx'> 		fsl_ifc_run_command(mtd);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* ERASE1 stores the block and page address */</div><div class='ctx'> 	case NAND_CMD_ERASE1:</div><div class='hunk'>@@ -682,15 +698,16 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)</div><div class='ctx'> 	return nand_fsr | NAND_STATUS_WP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fsl_ifc_read_page(struct mtd_info *mtd,</div><div class='del'>-			      struct nand_chip *chip,</div><div class='del'>-			      uint8_t *buf, int page)</div><div class='add'>+static int fsl_ifc_read_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='add'>+			     uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	struct fsl_ifc_mtd *priv = chip-&gt;priv;</div><div class='ctx'> 	struct fsl_ifc_ctrl *ctrl = priv-&gt;ctrl;</div><div class='add'>+	struct fsl_ifc_nand_ctrl *nctrl = ifc_nand_ctrl;</div><div class='ctx'> </div><div class='ctx'> 	fsl_ifc_read_buf(mtd, buf, mtd-&gt;writesize);</div><div class='del'>-	fsl_ifc_read_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='add'>+	if (oob_required)</div><div class='add'>+		fsl_ifc_read_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='ctx'> </div><div class='ctx'> 	if (ctrl-&gt;nand_stat &amp; IFC_NAND_EVTER_STAT_ECCER)</div><div class='ctx'> 		dev_err(priv-&gt;dev, "NAND Flash ECC Uncorrectable Error\n");</div><div class='hunk'>@@ -698,15 +715,14 @@ static int fsl_ifc_read_page(struct mtd_info *mtd,</div><div class='ctx'> 	if (ctrl-&gt;nand_stat != IFC_NAND_EVTER_STAT_OPC)</div><div class='ctx'> 		mtd-&gt;ecc_stats.failed++;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return nctrl-&gt;max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* ECC will be calculated automatically, and errors will be detected in</div><div class='ctx'>  * waitfunc.</div><div class='ctx'>  */</div><div class='del'>-static void fsl_ifc_write_page(struct mtd_info *mtd,</div><div class='del'>-				struct nand_chip *chip,</div><div class='del'>-				const uint8_t *buf)</div><div class='add'>+static void fsl_ifc_write_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='add'>+			       const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	fsl_ifc_write_buf(mtd, buf, mtd-&gt;writesize);</div><div class='ctx'> 	fsl_ifc_write_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='hunk'>@@ -789,7 +805,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)</div><div class='ctx'> 	out_be32(&amp;ifc-&gt;ifc_nand.ncfgr, 0x0);</div><div class='ctx'> </div><div class='ctx'> 	/* set up nand options */</div><div class='del'>-	chip-&gt;options = NAND_NO_READRDY | NAND_NO_AUTOINCR;</div><div class='add'>+	chip-&gt;options = NAND_NO_READRDY;</div><div class='ctx'> 	chip-&gt;bbt_options = NAND_BBT_USE_FLASH;</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -811,6 +827,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)</div><div class='ctx'> 	/* Hardware generates ECC per 512 Bytes */</div><div class='ctx'> 	chip-&gt;ecc.size = 512;</div><div class='ctx'> 	chip-&gt;ecc.bytes = 8;</div><div class='add'>+	chip-&gt;ecc.strength = 4;</div><div class='ctx'> </div><div class='ctx'> 	switch (csor &amp; CSOR_NAND_PGS_MASK) {</div><div class='ctx'> 	case CSOR_NAND_PGS_512:</div><div class='head'>diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c<br/>index 1b8330e1155a..38d26240d8b1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/fsmc_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/fsmc_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/fsmc_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/fsmc_nand.c</a></div><div class='hunk'>@@ -692,6 +692,7 @@ static void fsmc_write_buf_dma(struct mtd_info *mtd, const uint8_t *buf,</div><div class='ctx'>  * @mtd:	mtd info structure</div><div class='ctx'>  * @chip:	nand chip info structure</div><div class='ctx'>  * @buf:	buffer to store read data</div><div class='add'>+ * @oob_required:	caller expects OOB data read to chip-&gt;oob_poi</div><div class='ctx'>  * @page:	page number to read</div><div class='ctx'>  *</div><div class='ctx'>  * This routine is needed for fsmc version 8 as reading from NAND chip has to be</div><div class='hunk'>@@ -701,7 +702,7 @@ static void fsmc_write_buf_dma(struct mtd_info *mtd, const uint8_t *buf,</div><div class='ctx'>  * max of 8 bits)</div><div class='ctx'>  */</div><div class='ctx'> static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				 uint8_t *buf, int page)</div><div class='add'>+				 uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	struct fsmc_nand_data *host = container_of(mtd,</div><div class='ctx'> 					struct fsmc_nand_data, mtd);</div><div class='hunk'>@@ -720,6 +721,7 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 	 */</div><div class='ctx'> 	uint16_t ecc_oob[7];</div><div class='ctx'> 	uint8_t *oob = (uint8_t *)&amp;ecc_oob[0];</div><div class='add'>+	unsigned int max_bitflips = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0, s = 0; s &lt; eccsteps; s++, i += eccbytes, p += eccsize) {</div><div class='ctx'> 		chip-&gt;cmdfunc(mtd, NAND_CMD_READ0, s * eccsize, page);</div><div class='hunk'>@@ -748,13 +750,15 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 		chip-&gt;ecc.calculate(mtd, p, &amp;ecc_calc[i]);</div><div class='ctx'> </div><div class='ctx'> 		stat = chip-&gt;ecc.correct(mtd, p, &amp;ecc_code[i], &amp;ecc_calc[i]);</div><div class='del'>-		if (stat &lt; 0)</div><div class='add'>+		if (stat &lt; 0) {</div><div class='ctx'> 			mtd-&gt;ecc_stats.failed++;</div><div class='del'>-		else</div><div class='add'>+		} else {</div><div class='ctx'> 			mtd-&gt;ecc_stats.corrected += stat;</div><div class='add'>+			max_bitflips = max_t(unsigned int, max_bitflips, stat);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -994,9 +998,9 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)</div><div class='ctx'> 		return PTR_ERR(host-&gt;clk);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = clk_enable(host-&gt;clk);</div><div class='add'>+	ret = clk_prepare_enable(host-&gt;clk);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err_clk_enable;</div><div class='add'>+		goto err_clk_prepare_enable;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This device ID is actually a common AMBA ID as used on the</div><div class='hunk'>@@ -1176,8 +1180,8 @@ err_req_write_chnl:</div><div class='ctx'> 	if (host-&gt;mode == USE_DMA_ACCESS)</div><div class='ctx'> 		dma_release_channel(host-&gt;read_dma_chan);</div><div class='ctx'> err_req_read_chnl:</div><div class='del'>-	clk_disable(host-&gt;clk);</div><div class='del'>-err_clk_enable:</div><div class='add'>+	clk_disable_unprepare(host-&gt;clk);</div><div class='add'>+err_clk_prepare_enable:</div><div class='ctx'> 	clk_put(host-&gt;clk);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1198,7 +1202,7 @@ static int fsmc_nand_remove(struct platform_device *pdev)</div><div class='ctx'> 			dma_release_channel(host-&gt;write_dma_chan);</div><div class='ctx'> 			dma_release_channel(host-&gt;read_dma_chan);</div><div class='ctx'> 		}</div><div class='del'>-		clk_disable(host-&gt;clk);</div><div class='add'>+		clk_disable_unprepare(host-&gt;clk);</div><div class='ctx'> 		clk_put(host-&gt;clk);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1210,7 +1214,7 @@ static int fsmc_nand_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fsmc_nand_data *host = dev_get_drvdata(dev);</div><div class='ctx'> 	if (host)</div><div class='del'>-		clk_disable(host-&gt;clk);</div><div class='add'>+		clk_disable_unprepare(host-&gt;clk);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1218,7 +1222,7 @@ static int fsmc_nand_resume(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fsmc_nand_data *host = dev_get_drvdata(dev);</div><div class='ctx'> 	if (host) {</div><div class='del'>-		clk_enable(host-&gt;clk);</div><div class='add'>+		clk_prepare_enable(host-&gt;clk);</div><div class='ctx'> 		fsmc_nand_setup(host-&gt;regs_va, host-&gt;bank,</div><div class='ctx'> 				host-&gt;nand.options &amp; NAND_BUSWIDTH_16,</div><div class='ctx'> 				host-&gt;dev_timings);</div><div class='head'>diff --git a/drivers/mtd/nand/gpmi-nand/bch-regs.h b/drivers/mtd/nand/gpmi-nand/bch-regs.h<br/>index 4effb8c579db..a0924515c396 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/gpmi-nand/bch-regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/gpmi-nand/bch-regs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/gpmi-nand/bch-regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/gpmi-nand/bch-regs.h</a></div><div class='hunk'>@@ -51,15 +51,26 @@</div><div class='ctx'> </div><div class='ctx'> #define BP_BCH_FLASH0LAYOUT0_ECC0		12</div><div class='ctx'> #define BM_BCH_FLASH0LAYOUT0_ECC0	(0xf &lt;&lt; BP_BCH_FLASH0LAYOUT0_ECC0)</div><div class='del'>-#define BF_BCH_FLASH0LAYOUT0_ECC0(v)		\</div><div class='del'>-	(((v) &lt;&lt; BP_BCH_FLASH0LAYOUT0_ECC0) &amp; BM_BCH_FLASH0LAYOUT0_ECC0)</div><div class='add'>+#define MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0		11</div><div class='add'>+#define MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0	(0x1f &lt;&lt; MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)</div><div class='add'>+#define BF_BCH_FLASH0LAYOUT0_ECC0(v, x)				\</div><div class='add'>+	(GPMI_IS_MX6Q(x)					\</div><div class='add'>+		? (((v) &lt;&lt; MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)	\</div><div class='add'>+			&amp; MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0)	\</div><div class='add'>+		: (((v) &lt;&lt; BP_BCH_FLASH0LAYOUT0_ECC0)		\</div><div class='add'>+			&amp; BM_BCH_FLASH0LAYOUT0_ECC0)		\</div><div class='add'>+	)</div><div class='ctx'> </div><div class='ctx'> #define BP_BCH_FLASH0LAYOUT0_DATA0_SIZE		0</div><div class='ctx'> #define BM_BCH_FLASH0LAYOUT0_DATA0_SIZE		\</div><div class='ctx'> 			(0xfff &lt;&lt; BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)</div><div class='del'>-#define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v)	\</div><div class='del'>-	(((v) &lt;&lt; BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)\</div><div class='del'>-					 &amp; BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)</div><div class='add'>+#define MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE	\</div><div class='add'>+			(0x3ff &lt;&lt; BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)</div><div class='add'>+#define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v, x)				\</div><div class='add'>+	(GPMI_IS_MX6Q(x)						\</div><div class='add'>+		? (((v) &gt;&gt; 2) &amp; MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)	\</div><div class='add'>+		: ((v) &amp; BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)		\</div><div class='add'>+	)</div><div class='ctx'> </div><div class='ctx'> #define HW_BCH_FLASH0LAYOUT1			0x00000090</div><div class='ctx'> </div><div class='hunk'>@@ -72,13 +83,24 @@</div><div class='ctx'> </div><div class='ctx'> #define BP_BCH_FLASH0LAYOUT1_ECCN		12</div><div class='ctx'> #define BM_BCH_FLASH0LAYOUT1_ECCN	(0xf &lt;&lt; BP_BCH_FLASH0LAYOUT1_ECCN)</div><div class='del'>-#define BF_BCH_FLASH0LAYOUT1_ECCN(v)		\</div><div class='del'>-	(((v) &lt;&lt; BP_BCH_FLASH0LAYOUT1_ECCN) &amp; BM_BCH_FLASH0LAYOUT1_ECCN)</div><div class='add'>+#define MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN		11</div><div class='add'>+#define MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN	(0x1f &lt;&lt; MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)</div><div class='add'>+#define BF_BCH_FLASH0LAYOUT1_ECCN(v, x)				\</div><div class='add'>+	(GPMI_IS_MX6Q(x)					\</div><div class='add'>+		? (((v) &lt;&lt; MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)	\</div><div class='add'>+			&amp; MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN)	\</div><div class='add'>+		: (((v) &lt;&lt; BP_BCH_FLASH0LAYOUT1_ECCN)		\</div><div class='add'>+			&amp; BM_BCH_FLASH0LAYOUT1_ECCN)		\</div><div class='add'>+	)</div><div class='ctx'> </div><div class='ctx'> #define BP_BCH_FLASH0LAYOUT1_DATAN_SIZE		0</div><div class='ctx'> #define BM_BCH_FLASH0LAYOUT1_DATAN_SIZE		\</div><div class='ctx'> 			(0xfff &lt;&lt; BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)</div><div class='del'>-#define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v)	\</div><div class='del'>-	(((v) &lt;&lt; BP_BCH_FLASH0LAYOUT1_DATAN_SIZE) \</div><div class='del'>-					 &amp; BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)</div><div class='add'>+#define MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE	\</div><div class='add'>+			(0x3ff &lt;&lt; BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)</div><div class='add'>+#define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v, x)				\</div><div class='add'>+	(GPMI_IS_MX6Q(x)						\</div><div class='add'>+		? (((v) &gt;&gt; 2) &amp; MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)	\</div><div class='add'>+		: ((v) &amp; BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)		\</div><div class='add'>+	)</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c<br/>index e8ea7107932e..a1f43329ad43 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/gpmi-nand/gpmi-lib.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/gpmi-nand/gpmi-lib.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/gpmi-nand/gpmi-lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/gpmi-nand/gpmi-lib.c</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'> #include &lt;linux/mtd/gpmi-nand.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;mach/mxs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "gpmi-nand.h"</div><div class='ctx'> #include "gpmi-regs.h"</div><div class='hunk'>@@ -37,6 +36,8 @@ struct timing_threshod timing_default_threshold = {</div><div class='ctx'> 	.max_dll_delay_in_ns         = 16,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define MXS_SET_ADDR		0x4</div><div class='add'>+#define MXS_CLR_ADDR		0x8</div><div class='ctx'> /*</div><div class='ctx'>  * Clear the bit and poll it cleared.  This is usually called with</div><div class='ctx'>  * a reset address and mask being either SFTRST(bit 31) or CLKGATE</div><div class='hunk'>@@ -47,7 +48,7 @@ static int clear_poll_bit(void __iomem *addr, u32 mask)</div><div class='ctx'> 	int timeout = 0x400;</div><div class='ctx'> </div><div class='ctx'> 	/* clear the bit */</div><div class='del'>-	__mxs_clrl(mask, addr);</div><div class='add'>+	writel(mask, addr + MXS_CLR_ADDR);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * SFTRST needs 3 GPMI clocks to settle, the reference manual</div><div class='hunk'>@@ -92,11 +93,11 @@ static int gpmi_reset_block(void __iomem *reset_addr, bool just_enable)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='ctx'> 	/* clear CLKGATE */</div><div class='del'>-	__mxs_clrl(MODULE_CLKGATE, reset_addr);</div><div class='add'>+	writel(MODULE_CLKGATE, reset_addr + MXS_CLR_ADDR);</div><div class='ctx'> </div><div class='ctx'> 	if (!just_enable) {</div><div class='ctx'> 		/* set SFTRST to reset the block */</div><div class='del'>-		__mxs_setl(MODULE_SFTRST, reset_addr);</div><div class='add'>+		writel(MODULE_SFTRST, reset_addr + MXS_SET_ADDR);</div><div class='ctx'> 		udelay(1);</div><div class='ctx'> </div><div class='ctx'> 		/* poll CLKGATE becoming set */</div><div class='hunk'>@@ -223,13 +224,13 @@ int bch_set_geometry(struct gpmi_nand_data *this)</div><div class='ctx'> 	/* Configure layout 0. */</div><div class='ctx'> 	writel(BF_BCH_FLASH0LAYOUT0_NBLOCKS(block_count)</div><div class='ctx'> 			| BF_BCH_FLASH0LAYOUT0_META_SIZE(metadata_size)</div><div class='del'>-			| BF_BCH_FLASH0LAYOUT0_ECC0(ecc_strength)</div><div class='del'>-			| BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(block_size),</div><div class='add'>+			| BF_BCH_FLASH0LAYOUT0_ECC0(ecc_strength, this)</div><div class='add'>+			| BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(block_size, this),</div><div class='ctx'> 			r-&gt;bch_regs + HW_BCH_FLASH0LAYOUT0);</div><div class='ctx'> </div><div class='ctx'> 	writel(BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size)</div><div class='del'>-			| BF_BCH_FLASH0LAYOUT1_ECCN(ecc_strength)</div><div class='del'>-			| BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(block_size),</div><div class='add'>+			| BF_BCH_FLASH0LAYOUT1_ECCN(ecc_strength, this)</div><div class='add'>+			| BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(block_size, this),</div><div class='ctx'> 			r-&gt;bch_regs + HW_BCH_FLASH0LAYOUT1);</div><div class='ctx'> </div><div class='ctx'> 	/* Set *all* chip selects to use layout 0. */</div><div class='hunk'>@@ -255,11 +256,12 @@ static unsigned int ns_to_cycles(unsigned int time,</div><div class='ctx'> 	return max(k, min);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define DEF_MIN_PROP_DELAY	5</div><div class='add'>+#define DEF_MAX_PROP_DELAY	9</div><div class='ctx'> /* Apply timing to current hardware conditions. */</div><div class='ctx'> static int gpmi_nfc_compute_hardware_timing(struct gpmi_nand_data *this,</div><div class='ctx'> 					struct gpmi_nfc_hardware_timing *hw)</div><div class='ctx'> {</div><div class='del'>-	struct gpmi_nand_platform_data *pdata = this-&gt;pdata;</div><div class='ctx'> 	struct timing_threshod *nfc = &amp;timing_default_threshold;</div><div class='ctx'> 	struct nand_chip *nand = &amp;this-&gt;nand;</div><div class='ctx'> 	struct nand_timing target = this-&gt;timing;</div><div class='hunk'>@@ -276,8 +278,8 @@ static int gpmi_nfc_compute_hardware_timing(struct gpmi_nand_data *this,</div><div class='ctx'> 	int ideal_sample_delay_in_ns;</div><div class='ctx'> 	unsigned int sample_delay_factor;</div><div class='ctx'> 	int tEYE;</div><div class='del'>-	unsigned int min_prop_delay_in_ns = pdata-&gt;min_prop_delay_in_ns;</div><div class='del'>-	unsigned int max_prop_delay_in_ns = pdata-&gt;max_prop_delay_in_ns;</div><div class='add'>+	unsigned int min_prop_delay_in_ns = DEF_MIN_PROP_DELAY;</div><div class='add'>+	unsigned int max_prop_delay_in_ns = DEF_MAX_PROP_DELAY;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If there are multiple chips, we need to relax the timings to allow</div><div class='hunk'>@@ -803,7 +805,8 @@ int gpmi_is_ready(struct gpmi_nand_data *this, unsigned chip)</div><div class='ctx'> 	if (GPMI_IS_MX23(this)) {</div><div class='ctx'> 		mask = MX23_BM_GPMI_DEBUG_READY0 &lt;&lt; chip;</div><div class='ctx'> 		reg = readl(r-&gt;gpmi_regs + HW_GPMI_DEBUG);</div><div class='del'>-	} else if (GPMI_IS_MX28(this)) {</div><div class='add'>+	} else if (GPMI_IS_MX28(this) || GPMI_IS_MX6Q(this)) {</div><div class='add'>+		/* MX28 shares the same R/B register as MX6Q. */</div><div class='ctx'> 		mask = MX28_BF_GPMI_STAT_READY_BUSY(1 &lt;&lt; chip);</div><div class='ctx'> 		reg = readl(r-&gt;gpmi_regs + HW_GPMI_STAT);</div><div class='ctx'> 	} else</div><div class='head'>diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c<br/>index 9ec51cec2e14..a05b7b444d4f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/gpmi-nand/gpmi-nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/gpmi-nand/gpmi-nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/gpmi-nand/gpmi-nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/gpmi-nand/gpmi-nand.c</a></div><div class='hunk'>@@ -24,6 +24,9 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/gpmi-nand.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/partitions.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='ctx'> #include "gpmi-nand.h"</div><div class='ctx'> </div><div class='ctx'> /* add our owner bbt descriptor */</div><div class='hunk'>@@ -386,7 +389,7 @@ static void release_bch_irq(struct gpmi_nand_data *this)</div><div class='ctx'> static bool gpmi_dma_filter(struct dma_chan *chan, void *param)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpmi_nand_data *this = param;</div><div class='del'>-	struct resource *r = this-&gt;private;</div><div class='add'>+	int dma_channel = (int)this-&gt;private;</div><div class='ctx'> </div><div class='ctx'> 	if (!mxs_dma_is_apbh(chan))</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -398,7 +401,7 @@ static bool gpmi_dma_filter(struct dma_chan *chan, void *param)</div><div class='ctx'> 	 *	for mx28 :	MX28_DMA_GPMI0 ~ MX28_DMA_GPMI7</div><div class='ctx'> 	 *		(These eight channels share the same IRQ!)</div><div class='ctx'> 	 */</div><div class='del'>-	if (r-&gt;start &lt;= chan-&gt;chan_id &amp;&amp; chan-&gt;chan_id &lt;= r-&gt;end) {</div><div class='add'>+	if (dma_channel == chan-&gt;chan_id) {</div><div class='ctx'> 		chan-&gt;private = &amp;this-&gt;dma_data;</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -418,57 +421,45 @@ static void release_dma_channels(struct gpmi_nand_data *this)</div><div class='ctx'> static int __devinit acquire_dma_channels(struct gpmi_nand_data *this)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *pdev = this-&gt;pdev;</div><div class='del'>-	struct gpmi_nand_platform_data *pdata = this-&gt;pdata;</div><div class='del'>-	struct resources *res = &amp;this-&gt;resources;</div><div class='del'>-	struct resource *r, *r_dma;</div><div class='del'>-	unsigned int i;</div><div class='add'>+	struct resource *r_dma;</div><div class='add'>+	struct device_node *dn;</div><div class='add'>+	int dma_channel;</div><div class='add'>+	unsigned int ret;</div><div class='add'>+	struct dma_chan *dma_chan;</div><div class='add'>+	dma_cap_mask_t mask;</div><div class='add'>+</div><div class='add'>+	/* dma channel, we only use the first one. */</div><div class='add'>+	dn = pdev-&gt;dev.of_node;</div><div class='add'>+	ret = of_property_read_u32(dn, "fsl,gpmi-dma-channel", &amp;dma_channel);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("unable to get DMA channel from dt.\n");</div><div class='add'>+		goto acquire_err;</div><div class='add'>+	}</div><div class='add'>+	this-&gt;private = (void *)dma_channel;</div><div class='ctx'> </div><div class='del'>-	r = platform_get_resource_byname(pdev, IORESOURCE_DMA,</div><div class='del'>-					GPMI_NAND_DMA_CHANNELS_RES_NAME);</div><div class='add'>+	/* gpmi dma interrupt */</div><div class='ctx'> 	r_dma = platform_get_resource_byname(pdev, IORESOURCE_IRQ,</div><div class='ctx'> 					GPMI_NAND_DMA_INTERRUPT_RES_NAME);</div><div class='del'>-	if (!r || !r_dma) {</div><div class='add'>+	if (!r_dma) {</div><div class='ctx'> 		pr_err("Can't get resource for DMA\n");</div><div class='del'>-		return -ENXIO;</div><div class='add'>+		goto acquire_err;</div><div class='ctx'> 	}</div><div class='add'>+	this-&gt;dma_data.chan_irq = r_dma-&gt;start;</div><div class='ctx'> </div><div class='del'>-	/* used in gpmi_dma_filter() */</div><div class='del'>-	this-&gt;private = r;</div><div class='del'>-</div><div class='del'>-	for (i = r-&gt;start; i &lt;= r-&gt;end; i++) {</div><div class='del'>-		struct dma_chan *dma_chan;</div><div class='del'>-		dma_cap_mask_t mask;</div><div class='add'>+	/* request dma channel */</div><div class='add'>+	dma_cap_zero(mask);</div><div class='add'>+	dma_cap_set(DMA_SLAVE, mask);</div><div class='ctx'> </div><div class='del'>-		if (i - r-&gt;start &gt;= pdata-&gt;max_chip_count)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		dma_cap_zero(mask);</div><div class='del'>-		dma_cap_set(DMA_SLAVE, mask);</div><div class='del'>-</div><div class='del'>-		/* get the DMA interrupt */</div><div class='del'>-		if (r_dma-&gt;start == r_dma-&gt;end) {</div><div class='del'>-			/* only register the first. */</div><div class='del'>-			if (i == r-&gt;start)</div><div class='del'>-				this-&gt;dma_data.chan_irq = r_dma-&gt;start;</div><div class='del'>-			else</div><div class='del'>-				this-&gt;dma_data.chan_irq = NO_IRQ;</div><div class='del'>-		} else</div><div class='del'>-			this-&gt;dma_data.chan_irq = r_dma-&gt;start + (i - r-&gt;start);</div><div class='del'>-</div><div class='del'>-		dma_chan = dma_request_channel(mask, gpmi_dma_filter, this);</div><div class='del'>-		if (!dma_chan)</div><div class='del'>-			goto acquire_err;</div><div class='del'>-</div><div class='del'>-		/* fill the first empty item */</div><div class='del'>-		this-&gt;dma_chans[i - r-&gt;start] = dma_chan;</div><div class='add'>+	dma_chan = dma_request_channel(mask, gpmi_dma_filter, this);</div><div class='add'>+	if (!dma_chan) {</div><div class='add'>+		pr_err("dma_request_channel failed.\n");</div><div class='add'>+		goto acquire_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	res-&gt;dma_low_channel = r-&gt;start;</div><div class='del'>-	res-&gt;dma_high_channel = i;</div><div class='add'>+	this-&gt;dma_chans[0] = dma_chan;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> acquire_err:</div><div class='del'>-	pr_err("Can't acquire DMA channel %u\n", i);</div><div class='ctx'> 	release_dma_channels(this);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='hunk'>@@ -476,6 +467,7 @@ acquire_err:</div><div class='ctx'> static int __devinit acquire_resources(struct gpmi_nand_data *this)</div><div class='ctx'> {</div><div class='ctx'> 	struct resources *res = &amp;this-&gt;resources;</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME);</div><div class='hunk'>@@ -494,6 +486,12 @@ static int __devinit acquire_resources(struct gpmi_nand_data *this)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto exit_dma_channels;</div><div class='ctx'> </div><div class='add'>+	pinctrl = devm_pinctrl_get_select_default(&amp;this-&gt;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(pinctrl)) {</div><div class='add'>+		ret = PTR_ERR(pinctrl);</div><div class='add'>+		goto exit_pin;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	res-&gt;clock = clk_get(&amp;this-&gt;pdev-&gt;dev, NULL);</div><div class='ctx'> 	if (IS_ERR(res-&gt;clock)) {</div><div class='ctx'> 		pr_err("can not get the clock\n");</div><div class='hunk'>@@ -503,6 +501,7 @@ static int __devinit acquire_resources(struct gpmi_nand_data *this)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> exit_clock:</div><div class='add'>+exit_pin:</div><div class='ctx'> 	release_dma_channels(this);</div><div class='ctx'> exit_dma_channels:</div><div class='ctx'> 	release_bch_irq(this);</div><div class='hunk'>@@ -842,7 +841,7 @@ static void block_mark_swapping(struct gpmi_nand_data *this,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				uint8_t *buf, int page)</div><div class='add'>+				uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpmi_nand_data *this = chip-&gt;priv;</div><div class='ctx'> 	struct bch_geometry *nfc_geo = &amp;this-&gt;bch_geometry;</div><div class='hunk'>@@ -908,28 +907,31 @@ static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 		mtd-&gt;ecc_stats.corrected += corrected;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob() for</div><div class='del'>-	 * details about our policy for delivering the OOB.</div><div class='del'>-	 *</div><div class='del'>-	 * We fill the caller's buffer with set bits, and then copy the block</div><div class='del'>-	 * mark to th caller's buffer. Note that, if block mark swapping was</div><div class='del'>-	 * necessary, it has already been done, so we can rely on the first</div><div class='del'>-	 * byte of the auxiliary buffer to contain the block mark.</div><div class='del'>-	 */</div><div class='del'>-	memset(chip-&gt;oob_poi, ~0, mtd-&gt;oobsize);</div><div class='del'>-	chip-&gt;oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];</div><div class='add'>+	if (oob_required) {</div><div class='add'>+		/*</div><div class='add'>+		 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob()</div><div class='add'>+		 * for details about our policy for delivering the OOB.</div><div class='add'>+		 *</div><div class='add'>+		 * We fill the caller's buffer with set bits, and then copy the</div><div class='add'>+		 * block mark to th caller's buffer. Note that, if block mark</div><div class='add'>+		 * swapping was necessary, it has already been done, so we can</div><div class='add'>+		 * rely on the first byte of the auxiliary buffer to contain</div><div class='add'>+		 * the block mark.</div><div class='add'>+		 */</div><div class='add'>+		memset(chip-&gt;oob_poi, ~0, mtd-&gt;oobsize);</div><div class='add'>+		chip-&gt;oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];</div><div class='ctx'> </div><div class='del'>-	read_page_swap_end(this, buf, mtd-&gt;writesize,</div><div class='del'>-			this-&gt;payload_virt, this-&gt;payload_phys,</div><div class='del'>-			nfc_geo-&gt;payload_size,</div><div class='del'>-			payload_virt, payload_phys);</div><div class='add'>+		read_page_swap_end(this, buf, mtd-&gt;writesize,</div><div class='add'>+				this-&gt;payload_virt, this-&gt;payload_phys,</div><div class='add'>+				nfc_geo-&gt;payload_size,</div><div class='add'>+				payload_virt, payload_phys);</div><div class='add'>+	}</div><div class='ctx'> exit_nfc:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gpmi_ecc_write_page(struct mtd_info *mtd,</div><div class='del'>-				struct nand_chip *chip, const uint8_t *buf)</div><div class='add'>+static void gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='add'>+				const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpmi_nand_data *this = chip-&gt;priv;</div><div class='ctx'> 	struct bch_geometry *nfc_geo = &amp;this-&gt;bch_geometry;</div><div class='hunk'>@@ -1068,7 +1070,7 @@ exit_auxiliary:</div><div class='ctx'>  * this driver.</div><div class='ctx'>  */</div><div class='ctx'> static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				int page, int sndcmd)</div><div class='add'>+				int page)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpmi_nand_data *this = chip-&gt;priv;</div><div class='ctx'> </div><div class='hunk'>@@ -1091,11 +1093,7 @@ static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 		chip-&gt;oob_poi[0] = chip-&gt;read_byte(mtd);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Return true, indicating that the next call to this function must send</div><div class='del'>-	 * a command.</div><div class='del'>-	 */</div><div class='del'>-	return true;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -1309,7 +1307,7 @@ static int mx23_write_transcription_stamp(struct gpmi_nand_data *this)</div><div class='ctx'> 		/* Write the first page of the current stride. */</div><div class='ctx'> 		dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page);</div><div class='ctx'> 		chip-&gt;cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);</div><div class='del'>-		chip-&gt;ecc.write_page_raw(mtd, chip, buffer);</div><div class='add'>+		chip-&gt;ecc.write_page_raw(mtd, chip, buffer, 0);</div><div class='ctx'> 		chip-&gt;cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);</div><div class='ctx'> </div><div class='ctx'> 		/* Wait for the write to finish. */</div><div class='hunk'>@@ -1435,6 +1433,10 @@ static int gpmi_pre_bbt_scan(struct gpmi_nand_data  *this)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	/* Adjust the ECC strength according to the chip. */</div><div class='add'>+	this-&gt;nand.ecc.strength = this-&gt;bch_geometry.ecc_strength;</div><div class='add'>+	this-&gt;mtd.ecc_strength = this-&gt;bch_geometry.ecc_strength;</div><div class='add'>+</div><div class='ctx'> 	/* NAND boot init, depends on the gpmi_set_geometry(). */</div><div class='ctx'> 	return nand_boot_init(this);</div><div class='ctx'> }</div><div class='hunk'>@@ -1462,9 +1464,9 @@ void gpmi_nfc_exit(struct gpmi_nand_data *this)</div><div class='ctx'> </div><div class='ctx'> static int __devinit gpmi_nfc_init(struct gpmi_nand_data *this)</div><div class='ctx'> {</div><div class='del'>-	struct gpmi_nand_platform_data *pdata = this-&gt;pdata;</div><div class='ctx'> 	struct mtd_info  *mtd = &amp;this-&gt;mtd;</div><div class='ctx'> 	struct nand_chip *chip = &amp;this-&gt;nand;</div><div class='add'>+	struct mtd_part_parser_data ppdata = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* init current chip */</div><div class='hunk'>@@ -1493,6 +1495,7 @@ static int __devinit gpmi_nfc_init(struct gpmi_nand_data *this)</div><div class='ctx'> 	chip-&gt;options		|= NAND_NO_SUBPAGE_WRITE;</div><div class='ctx'> 	chip-&gt;ecc.mode		= NAND_ECC_HW;</div><div class='ctx'> 	chip-&gt;ecc.size		= 1;</div><div class='add'>+	chip-&gt;ecc.strength	= 8;</div><div class='ctx'> 	chip-&gt;ecc.layout	= &amp;gpmi_hw_ecclayout;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate a temporary DMA buffer for reading ID in the nand_scan() */</div><div class='hunk'>@@ -1502,14 +1505,14 @@ static int __devinit gpmi_nfc_init(struct gpmi_nand_data *this)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> </div><div class='del'>-	ret = nand_scan(mtd, pdata-&gt;max_chip_count);</div><div class='add'>+	ret = nand_scan(mtd, 1);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		pr_err("Chip scan failed\n");</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = mtd_device_parse_register(mtd, NULL, NULL,</div><div class='del'>-			pdata-&gt;partitions, pdata-&gt;partition_count);</div><div class='add'>+	ppdata.of_node = this-&gt;pdev-&gt;dev.of_node;</div><div class='add'>+	ret = mtd_device_parse_register(mtd, NULL, &amp;ppdata, NULL, 0);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1519,12 +1522,41 @@ err_out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct platform_device_id gpmi_ids[] = {</div><div class='add'>+	{ .name = "imx23-gpmi-nand", .driver_data = IS_MX23, },</div><div class='add'>+	{ .name = "imx28-gpmi-nand", .driver_data = IS_MX28, },</div><div class='add'>+	{ .name = "imx6q-gpmi-nand", .driver_data = IS_MX6Q, },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id gpmi_nand_id_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "fsl,imx23-gpmi-nand",</div><div class='add'>+		.data = (void *)&amp;gpmi_ids[IS_MX23]</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "fsl,imx28-gpmi-nand",</div><div class='add'>+		.data = (void *)&amp;gpmi_ids[IS_MX28]</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "fsl,imx6q-gpmi-nand",</div><div class='add'>+		.data = (void *)&amp;gpmi_ids[IS_MX6Q]</div><div class='add'>+	}, {}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);</div><div class='add'>+</div><div class='ctx'> static int __devinit gpmi_nand_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct gpmi_nand_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='ctx'> 	struct gpmi_nand_data *this;</div><div class='add'>+	const struct of_device_id *of_id;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	of_id = of_match_device(gpmi_nand_id_table, &amp;pdev-&gt;dev);</div><div class='add'>+	if (of_id) {</div><div class='add'>+		pdev-&gt;id_entry = of_id-&gt;data;</div><div class='add'>+	} else {</div><div class='add'>+		pr_err("Failed to find the right device id.\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	this = kzalloc(sizeof(*this), GFP_KERNEL);</div><div class='ctx'> 	if (!this) {</div><div class='ctx'> 		pr_err("Failed to allocate per-device memory\n");</div><div class='hunk'>@@ -1534,13 +1566,6 @@ static int __devinit gpmi_nand_probe(struct platform_device *pdev)</div><div class='ctx'> 	platform_set_drvdata(pdev, this);</div><div class='ctx'> 	this-&gt;pdev  = pdev;</div><div class='ctx'> 	this-&gt;dev   = &amp;pdev-&gt;dev;</div><div class='del'>-	this-&gt;pdata = pdata;</div><div class='del'>-</div><div class='del'>-	if (pdata-&gt;platform_init) {</div><div class='del'>-		ret = pdata-&gt;platform_init();</div><div class='del'>-		if (ret)</div><div class='del'>-			goto platform_init_error;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ret = acquire_resources(this);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -1558,7 +1583,6 @@ static int __devinit gpmi_nand_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> exit_nfc_init:</div><div class='ctx'> 	release_resources(this);</div><div class='del'>-platform_init_error:</div><div class='ctx'> exit_acquire_resources:</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> 	kfree(this);</div><div class='hunk'>@@ -1576,19 +1600,10 @@ static int __exit gpmi_nand_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct platform_device_id gpmi_ids[] = {</div><div class='del'>-	{</div><div class='del'>-		.name = "imx23-gpmi-nand",</div><div class='del'>-		.driver_data = IS_MX23,</div><div class='del'>-	}, {</div><div class='del'>-		.name = "imx28-gpmi-nand",</div><div class='del'>-		.driver_data = IS_MX28,</div><div class='del'>-	}, {},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct platform_driver gpmi_nand_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "gpmi-nand",</div><div class='add'>+		.of_match_table = gpmi_nand_id_table,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe   = gpmi_nand_probe,</div><div class='ctx'> 	.remove  = __exit_p(gpmi_nand_remove),</div><div class='head'>diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h<br/>index ec6180d4ff8f..ce5daa160920 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/gpmi-nand/gpmi-nand.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/gpmi-nand/gpmi-nand.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/gpmi-nand/gpmi-nand.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/gpmi-nand/gpmi-nand.h</a></div><div class='hunk'>@@ -266,8 +266,10 @@ extern int gpmi_read_page(struct gpmi_nand_data *,</div><div class='ctx'> #define STATUS_UNCORRECTABLE	0xfe</div><div class='ctx'> </div><div class='ctx'> /* Use the platform_id to distinguish different Archs. */</div><div class='del'>-#define IS_MX23			0x1</div><div class='del'>-#define IS_MX28			0x2</div><div class='add'>+#define IS_MX23			0x0</div><div class='add'>+#define IS_MX28			0x1</div><div class='add'>+#define IS_MX6Q			0x2</div><div class='ctx'> #define GPMI_IS_MX23(x)		((x)-&gt;pdev-&gt;id_entry-&gt;driver_data == IS_MX23)</div><div class='ctx'> #define GPMI_IS_MX28(x)		((x)-&gt;pdev-&gt;id_entry-&gt;driver_data == IS_MX28)</div><div class='add'>+#define GPMI_IS_MX6Q(x)		((x)-&gt;pdev-&gt;id_entry-&gt;driver_data == IS_MX6Q)</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/mtd/nand/h1910.c b/drivers/mtd/nand/h1910.c<br/>index 11e487813428..50166e93ba96 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/h1910.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/h1910.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/h1910.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/h1910.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #include &lt;linux/mtd/nand.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/partitions.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;	/* for CLPS7111_VIRT_BASE */</div><div class='add'>+#include &lt;mach/hardware.h&gt;</div><div class='ctx'> #include &lt;asm/sizes.h&gt;</div><div class='ctx'> #include &lt;mach/h1900-gpio.h&gt;</div><div class='ctx'> #include &lt;mach/ipaq.h&gt;</div><div class='hunk'>@@ -124,7 +124,6 @@ static int __init h1910_init(void)</div><div class='ctx'> 	/* 15 us command delay time */</div><div class='ctx'> 	this-&gt;chip_delay = 50;</div><div class='ctx'> 	this-&gt;ecc.mode = NAND_ECC_SOFT;</div><div class='del'>-	this-&gt;options = NAND_NO_AUTOINCR;</div><div class='ctx'> </div><div class='ctx'> 	/* Scan to find existence of the device */</div><div class='ctx'> 	if (nand_scan(h1910_nand_mtd, 1)) {</div><div class='head'>diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c<br/>index e4147e8acb7c..a6fa884ae49b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/jz4740_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/jz4740_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/jz4740_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/jz4740_nand.c</a></div><div class='hunk'>@@ -332,11 +332,7 @@ static int __devinit jz_nand_probe(struct platform_device *pdev)</div><div class='ctx'> 	chip-&gt;ecc.mode		= NAND_ECC_HW_OOB_FIRST;</div><div class='ctx'> 	chip-&gt;ecc.size		= 512;</div><div class='ctx'> 	chip-&gt;ecc.bytes		= 9;</div><div class='del'>-	chip-&gt;ecc.strength	= 2;</div><div class='del'>-	/*</div><div class='del'>-	 * FIXME: ecc_strength value of 2 bits per 512 bytes of data is a</div><div class='del'>-	 * conservative guess, given 9 ecc bytes and reed-solomon alg.</div><div class='del'>-	 */</div><div class='add'>+	chip-&gt;ecc.strength	= 4;</div><div class='ctx'> </div><div class='ctx'> 	if (pdata)</div><div class='ctx'> 		chip-&gt;ecc.layout = pdata-&gt;ecc_layout;</div><div class='head'>diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c<br/>index c240cf1af961..c259c24d7986 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/mpc5121_nfc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/mpc5121_nfc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/mpc5121_nfc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/mpc5121_nfc.c</a></div><div class='hunk'>@@ -734,7 +734,6 @@ static int __devinit mpc5121_nfc_probe(struct platform_device *op)</div><div class='ctx'> 	chip-&gt;write_buf = mpc5121_nfc_write_buf;</div><div class='ctx'> 	chip-&gt;verify_buf = mpc5121_nfc_verify_buf;</div><div class='ctx'> 	chip-&gt;select_chip = mpc5121_nfc_select_chip;</div><div class='del'>-	chip-&gt;options = NAND_NO_AUTOINCR;</div><div class='ctx'> 	chip-&gt;bbt_options = NAND_BBT_USE_FLASH;</div><div class='ctx'> 	chip-&gt;ecc.mode = NAND_ECC_SOFT;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c<br/>index cc0678a967c1..c58e6a93f445 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/mxc_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/mxc_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/mxc_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/mxc_nand.c</a></div><div class='hunk'>@@ -32,6 +32,8 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of_mtd.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach/flash.h&gt;</div><div class='ctx'> #include &lt;mach/mxc_nand.h&gt;</div><div class='hunk'>@@ -140,13 +142,47 @@</div><div class='ctx'> </div><div class='ctx'> #define NFC_V3_DELAY_LINE		(host-&gt;regs_ip + 0x34)</div><div class='ctx'> </div><div class='add'>+struct mxc_nand_host;</div><div class='add'>+</div><div class='add'>+struct mxc_nand_devtype_data {</div><div class='add'>+	void (*preset)(struct mtd_info *);</div><div class='add'>+	void (*send_cmd)(struct mxc_nand_host *, uint16_t, int);</div><div class='add'>+	void (*send_addr)(struct mxc_nand_host *, uint16_t, int);</div><div class='add'>+	void (*send_page)(struct mtd_info *, unsigned int);</div><div class='add'>+	void (*send_read_id)(struct mxc_nand_host *);</div><div class='add'>+	uint16_t (*get_dev_status)(struct mxc_nand_host *);</div><div class='add'>+	int (*check_int)(struct mxc_nand_host *);</div><div class='add'>+	void (*irq_control)(struct mxc_nand_host *, int);</div><div class='add'>+	u32 (*get_ecc_status)(struct mxc_nand_host *);</div><div class='add'>+	struct nand_ecclayout *ecclayout_512, *ecclayout_2k, *ecclayout_4k;</div><div class='add'>+	void (*select_chip)(struct mtd_info *mtd, int chip);</div><div class='add'>+	int (*correct_data)(struct mtd_info *mtd, u_char *dat,</div><div class='add'>+			u_char *read_ecc, u_char *calc_ecc);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * On i.MX21 the CONFIG2:INT bit cannot be read if interrupts are masked</div><div class='add'>+	 * (CONFIG1:INT_MSK is set). To handle this the driver uses</div><div class='add'>+	 * enable_irq/disable_irq_nosync instead of CONFIG1:INT_MSK</div><div class='add'>+	 */</div><div class='add'>+	int irqpending_quirk;</div><div class='add'>+	int needs_ip;</div><div class='add'>+</div><div class='add'>+	size_t regs_offset;</div><div class='add'>+	size_t spare0_offset;</div><div class='add'>+	size_t axi_offset;</div><div class='add'>+</div><div class='add'>+	int spare_len;</div><div class='add'>+	int eccbytes;</div><div class='add'>+	int eccsize;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mxc_nand_host {</div><div class='ctx'> 	struct mtd_info		mtd;</div><div class='ctx'> 	struct nand_chip	nand;</div><div class='ctx'> 	struct device		*dev;</div><div class='ctx'> </div><div class='del'>-	void			*spare0;</div><div class='del'>-	void			*main_area0;</div><div class='add'>+	void __iomem		*spare0;</div><div class='add'>+	void __iomem		*main_area0;</div><div class='ctx'> </div><div class='ctx'> 	void __iomem		*base;</div><div class='ctx'> 	void __iomem		*regs;</div><div class='hunk'>@@ -163,16 +199,9 @@ struct mxc_nand_host {</div><div class='ctx'> </div><div class='ctx'> 	uint8_t			*data_buf;</div><div class='ctx'> 	unsigned int		buf_start;</div><div class='del'>-	int			spare_len;</div><div class='del'>-</div><div class='del'>-	void			(*preset)(struct mtd_info *);</div><div class='del'>-	void			(*send_cmd)(struct mxc_nand_host *, uint16_t, int);</div><div class='del'>-	void			(*send_addr)(struct mxc_nand_host *, uint16_t, int);</div><div class='del'>-	void			(*send_page)(struct mtd_info *, unsigned int);</div><div class='del'>-	void			(*send_read_id)(struct mxc_nand_host *);</div><div class='del'>-	uint16_t		(*get_dev_status)(struct mxc_nand_host *);</div><div class='del'>-	int			(*check_int)(struct mxc_nand_host *);</div><div class='del'>-	void			(*irq_control)(struct mxc_nand_host *, int);</div><div class='add'>+</div><div class='add'>+	const struct mxc_nand_devtype_data *devtype_data;</div><div class='add'>+	struct mxc_nand_platform_data pdata;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* OOB placement block for use with hardware ecc generation */</div><div class='hunk'>@@ -242,21 +271,7 @@ static struct nand_ecclayout nandv2_hw_eccoob_4k = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char *part_probes[] = { "RedBoot", "cmdlinepart", NULL };</div><div class='del'>-</div><div class='del'>-static irqreturn_t mxc_nfc_irq(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct mxc_nand_host *host = dev_id;</div><div class='del'>-</div><div class='del'>-	if (!host-&gt;check_int(host))</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-</div><div class='del'>-	host-&gt;irq_control(host, 0);</div><div class='del'>-</div><div class='del'>-	complete(&amp;host-&gt;op_completion);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='add'>+static const char *part_probes[] = { "RedBoot", "cmdlinepart", "ofpart", NULL };</div><div class='ctx'> </div><div class='ctx'> static int check_int_v3(struct mxc_nand_host *host)</div><div class='ctx'> {</div><div class='hunk'>@@ -280,26 +295,12 @@ static int check_int_v1_v2(struct mxc_nand_host *host)</div><div class='ctx'> 	if (!(tmp &amp; NFC_V1_V2_CONFIG2_INT))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (!cpu_is_mx21())</div><div class='add'>+	if (!host-&gt;devtype_data-&gt;irqpending_quirk)</div><div class='ctx'> 		writew(tmp &amp; ~NFC_V1_V2_CONFIG2_INT, NFC_V1_V2_CONFIG2);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * It has been observed that the i.MX21 cannot read the CONFIG2:INT bit</div><div class='del'>- * if interrupts are masked (CONFIG1:INT_MSK is set). To handle this, the</div><div class='del'>- * driver can enable/disable the irq line rather than simply masking the</div><div class='del'>- * interrupts.</div><div class='del'>- */</div><div class='del'>-static void irq_control_mx21(struct mxc_nand_host *host, int activate)</div><div class='del'>-{</div><div class='del'>-	if (activate)</div><div class='del'>-		enable_irq(host-&gt;irq);</div><div class='del'>-	else</div><div class='del'>-		disable_irq_nosync(host-&gt;irq);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void irq_control_v1_v2(struct mxc_nand_host *host, int activate)</div><div class='ctx'> {</div><div class='ctx'> 	uint16_t tmp;</div><div class='hunk'>@@ -328,6 +329,47 @@ static void irq_control_v3(struct mxc_nand_host *host, int activate)</div><div class='ctx'> 	writel(tmp, NFC_V3_CONFIG2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void irq_control(struct mxc_nand_host *host, int activate)</div><div class='add'>+{</div><div class='add'>+	if (host-&gt;devtype_data-&gt;irqpending_quirk) {</div><div class='add'>+		if (activate)</div><div class='add'>+			enable_irq(host-&gt;irq);</div><div class='add'>+		else</div><div class='add'>+			disable_irq_nosync(host-&gt;irq);</div><div class='add'>+	} else {</div><div class='add'>+		host-&gt;devtype_data-&gt;irq_control(host, activate);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_ecc_status_v1(struct mxc_nand_host *host)</div><div class='add'>+{</div><div class='add'>+	return readw(NFC_V1_V2_ECC_STATUS_RESULT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_ecc_status_v2(struct mxc_nand_host *host)</div><div class='add'>+{</div><div class='add'>+	return readl(NFC_V1_V2_ECC_STATUS_RESULT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_ecc_status_v3(struct mxc_nand_host *host)</div><div class='add'>+{</div><div class='add'>+	return readl(NFC_V3_ECC_STATUS_RESULT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t mxc_nfc_irq(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct mxc_nand_host *host = dev_id;</div><div class='add'>+</div><div class='add'>+	if (!host-&gt;devtype_data-&gt;check_int(host))</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	irq_control(host, 0);</div><div class='add'>+</div><div class='add'>+	complete(&amp;host-&gt;op_completion);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* This function polls the NANDFC to wait for the basic operation to</div><div class='ctx'>  * complete by checking the INT bit of config2 register.</div><div class='ctx'>  */</div><div class='hunk'>@@ -336,14 +378,14 @@ static void wait_op_done(struct mxc_nand_host *host, int useirq)</div><div class='ctx'> 	int max_retries = 8000;</div><div class='ctx'> </div><div class='ctx'> 	if (useirq) {</div><div class='del'>-		if (!host-&gt;check_int(host)) {</div><div class='add'>+		if (!host-&gt;devtype_data-&gt;check_int(host)) {</div><div class='ctx'> 			INIT_COMPLETION(host-&gt;op_completion);</div><div class='del'>-			host-&gt;irq_control(host, 1);</div><div class='add'>+			irq_control(host, 1);</div><div class='ctx'> 			wait_for_completion(&amp;host-&gt;op_completion);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		while (max_retries-- &gt; 0) {</div><div class='del'>-			if (host-&gt;check_int(host))</div><div class='add'>+			if (host-&gt;devtype_data-&gt;check_int(host))</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			udelay(1);</div><div class='hunk'>@@ -374,7 +416,7 @@ static void send_cmd_v1_v2(struct mxc_nand_host *host, uint16_t cmd, int useirq)</div><div class='ctx'> 	writew(cmd, NFC_V1_V2_FLASH_CMD);</div><div class='ctx'> 	writew(NFC_CMD, NFC_V1_V2_CONFIG2);</div><div class='ctx'> </div><div class='del'>-	if (cpu_is_mx21() &amp;&amp; (cmd == NAND_CMD_RESET)) {</div><div class='add'>+	if (host-&gt;devtype_data-&gt;irqpending_quirk &amp;&amp; (cmd == NAND_CMD_RESET)) {</div><div class='ctx'> 		int max_retries = 100;</div><div class='ctx'> 		/* Reset completion is indicated by NFC_CONFIG2 */</div><div class='ctx'> 		/* being set to 0 */</div><div class='hunk'>@@ -433,13 +475,27 @@ static void send_page_v3(struct mtd_info *mtd, unsigned int ops)</div><div class='ctx'> 	wait_op_done(host, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void send_page_v1_v2(struct mtd_info *mtd, unsigned int ops)</div><div class='add'>+static void send_page_v2(struct mtd_info *mtd, unsigned int ops)</div><div class='add'>+{</div><div class='add'>+	struct nand_chip *nand_chip = mtd-&gt;priv;</div><div class='add'>+	struct mxc_nand_host *host = nand_chip-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* NANDFC buffer 0 is used for page read/write */</div><div class='add'>+	writew(host-&gt;active_cs &lt;&lt; 4, NFC_V1_V2_BUF_ADDR);</div><div class='add'>+</div><div class='add'>+	writew(ops, NFC_V1_V2_CONFIG2);</div><div class='add'>+</div><div class='add'>+	/* Wait for operation to complete */</div><div class='add'>+	wait_op_done(host, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void send_page_v1(struct mtd_info *mtd, unsigned int ops)</div><div class='ctx'> {</div><div class='ctx'> 	struct nand_chip *nand_chip = mtd-&gt;priv;</div><div class='ctx'> 	struct mxc_nand_host *host = nand_chip-&gt;priv;</div><div class='ctx'> 	int bufs, i;</div><div class='ctx'> </div><div class='del'>-	if (nfc_is_v1() &amp;&amp; mtd-&gt;writesize &gt; 512)</div><div class='add'>+	if (mtd-&gt;writesize &gt; 512)</div><div class='ctx'> 		bufs = 4;</div><div class='ctx'> 	else</div><div class='ctx'> 		bufs = 1;</div><div class='hunk'>@@ -463,7 +519,7 @@ static void send_read_id_v3(struct mxc_nand_host *host)</div><div class='ctx'> </div><div class='ctx'> 	wait_op_done(host, true);</div><div class='ctx'> </div><div class='del'>-	memcpy(host-&gt;data_buf, host-&gt;main_area0, 16);</div><div class='add'>+	memcpy_fromio(host-&gt;data_buf, host-&gt;main_area0, 16);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Request the NANDFC to perform a read of the NAND device ID. */</div><div class='hunk'>@@ -479,7 +535,7 @@ static void send_read_id_v1_v2(struct mxc_nand_host *host)</div><div class='ctx'> 	/* Wait for operation to complete */</div><div class='ctx'> 	wait_op_done(host, true);</div><div class='ctx'> </div><div class='del'>-	memcpy(host-&gt;data_buf, host-&gt;main_area0, 16);</div><div class='add'>+	memcpy_fromio(host-&gt;data_buf, host-&gt;main_area0, 16);</div><div class='ctx'> </div><div class='ctx'> 	if (this-&gt;options &amp; NAND_BUSWIDTH_16) {</div><div class='ctx'> 		/* compress the ID info */</div><div class='hunk'>@@ -555,7 +611,7 @@ static int mxc_nand_correct_data_v1(struct mtd_info *mtd, u_char *dat,</div><div class='ctx'> 	 * additional correction.  2-Bit errors cannot be corrected by</div><div class='ctx'> 	 * HW ECC, so we need to return failure</div><div class='ctx'> 	 */</div><div class='del'>-	uint16_t ecc_status = readw(NFC_V1_V2_ECC_STATUS_RESULT);</div><div class='add'>+	uint16_t ecc_status = get_ecc_status_v1(host);</div><div class='ctx'> </div><div class='ctx'> 	if (((ecc_status &amp; 0x3) == 2) || ((ecc_status &gt;&gt; 2) == 2)) {</div><div class='ctx'> 		pr_debug("MXC_NAND: HWECC uncorrectable 2-bit ECC error\n");</div><div class='hunk'>@@ -580,10 +636,7 @@ static int mxc_nand_correct_data_v2_v3(struct mtd_info *mtd, u_char *dat,</div><div class='ctx'> </div><div class='ctx'> 	no_subpages = mtd-&gt;writesize &gt;&gt; 9;</div><div class='ctx'> </div><div class='del'>-	if (nfc_is_v21())</div><div class='del'>-		ecc_stat = readl(NFC_V1_V2_ECC_STATUS_RESULT);</div><div class='del'>-	else</div><div class='del'>-		ecc_stat = readl(NFC_V3_ECC_STATUS_RESULT);</div><div class='add'>+	ecc_stat = host-&gt;devtype_data-&gt;get_ecc_status(host);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		err = ecc_stat &amp; ecc_bit_mask;</div><div class='hunk'>@@ -616,7 +669,7 @@ static u_char mxc_nand_read_byte(struct mtd_info *mtd)</div><div class='ctx'> </div><div class='ctx'> 	/* Check for status request */</div><div class='ctx'> 	if (host-&gt;status_request)</div><div class='del'>-		return host-&gt;get_dev_status(host) &amp; 0xFF;</div><div class='add'>+		return host-&gt;devtype_data-&gt;get_dev_status(host) &amp; 0xFF;</div><div class='ctx'> </div><div class='ctx'> 	ret = *(uint8_t *)(host-&gt;data_buf + host-&gt;buf_start);</div><div class='ctx'> 	host-&gt;buf_start++;</div><div class='hunk'>@@ -682,7 +735,28 @@ static int mxc_nand_verify_buf(struct mtd_info *mtd,</div><div class='ctx'> </div><div class='ctx'> /* This function is used by upper layer for select and</div><div class='ctx'>  * deselect of the NAND chip */</div><div class='del'>-static void mxc_nand_select_chip(struct mtd_info *mtd, int chip)</div><div class='add'>+static void mxc_nand_select_chip_v1_v3(struct mtd_info *mtd, int chip)</div><div class='add'>+{</div><div class='add'>+	struct nand_chip *nand_chip = mtd-&gt;priv;</div><div class='add'>+	struct mxc_nand_host *host = nand_chip-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (chip == -1) {</div><div class='add'>+		/* Disable the NFC clock */</div><div class='add'>+		if (host-&gt;clk_act) {</div><div class='add'>+			clk_disable_unprepare(host-&gt;clk);</div><div class='add'>+			host-&gt;clk_act = 0;</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!host-&gt;clk_act) {</div><div class='add'>+		/* Enable the NFC clock */</div><div class='add'>+		clk_prepare_enable(host-&gt;clk);</div><div class='add'>+		host-&gt;clk_act = 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mxc_nand_select_chip_v2(struct mtd_info *mtd, int chip)</div><div class='ctx'> {</div><div class='ctx'> 	struct nand_chip *nand_chip = mtd-&gt;priv;</div><div class='ctx'> 	struct mxc_nand_host *host = nand_chip-&gt;priv;</div><div class='hunk'>@@ -702,10 +776,8 @@ static void mxc_nand_select_chip(struct mtd_info *mtd, int chip)</div><div class='ctx'> 		host-&gt;clk_act = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (nfc_is_v21()) {</div><div class='del'>-		host-&gt;active_cs = chip;</div><div class='del'>-		writew(host-&gt;active_cs &lt;&lt; 4, NFC_V1_V2_BUF_ADDR);</div><div class='del'>-	}</div><div class='add'>+	host-&gt;active_cs = chip;</div><div class='add'>+	writew(host-&gt;active_cs &lt;&lt; 4, NFC_V1_V2_BUF_ADDR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -718,23 +790,23 @@ static void copy_spare(struct mtd_info *mtd, bool bfrom)</div><div class='ctx'> 	u16 i, j;</div><div class='ctx'> 	u16 n = mtd-&gt;writesize &gt;&gt; 9;</div><div class='ctx'> 	u8 *d = host-&gt;data_buf + mtd-&gt;writesize;</div><div class='del'>-	u8 *s = host-&gt;spare0;</div><div class='del'>-	u16 t = host-&gt;spare_len;</div><div class='add'>+	u8 __iomem *s = host-&gt;spare0;</div><div class='add'>+	u16 t = host-&gt;devtype_data-&gt;spare_len;</div><div class='ctx'> </div><div class='ctx'> 	j = (mtd-&gt;oobsize / n &gt;&gt; 1) &lt;&lt; 1;</div><div class='ctx'> </div><div class='ctx'> 	if (bfrom) {</div><div class='ctx'> 		for (i = 0; i &lt; n - 1; i++)</div><div class='del'>-			memcpy(d + i * j, s + i * t, j);</div><div class='add'>+			memcpy_fromio(d + i * j, s + i * t, j);</div><div class='ctx'> </div><div class='ctx'> 		/* the last section */</div><div class='del'>-		memcpy(d + i * j, s + i * t, mtd-&gt;oobsize - i * j);</div><div class='add'>+		memcpy_fromio(d + i * j, s + i * t, mtd-&gt;oobsize - i * j);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		for (i = 0; i &lt; n - 1; i++)</div><div class='del'>-			memcpy(&amp;s[i * t], &amp;d[i * j], j);</div><div class='add'>+			memcpy_toio(&amp;s[i * t], &amp;d[i * j], j);</div><div class='ctx'> </div><div class='ctx'> 		/* the last section */</div><div class='del'>-		memcpy(&amp;s[i * t], &amp;d[i * j], mtd-&gt;oobsize - i * j);</div><div class='add'>+		memcpy_toio(&amp;s[i * t], &amp;d[i * j], mtd-&gt;oobsize - i * j);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -751,34 +823,44 @@ static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr)</div><div class='ctx'> 		 * perform a read/write buf operation, the saved column</div><div class='ctx'> 		  * address is used to index into the full page.</div><div class='ctx'> 		 */</div><div class='del'>-		host-&gt;send_addr(host, 0, page_addr == -1);</div><div class='add'>+		host-&gt;devtype_data-&gt;send_addr(host, 0, page_addr == -1);</div><div class='ctx'> 		if (mtd-&gt;writesize &gt; 512)</div><div class='ctx'> 			/* another col addr cycle for 2k page */</div><div class='del'>-			host-&gt;send_addr(host, 0, false);</div><div class='add'>+			host-&gt;devtype_data-&gt;send_addr(host, 0, false);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Write out page address, if necessary */</div><div class='ctx'> 	if (page_addr != -1) {</div><div class='ctx'> 		/* paddr_0 - p_addr_7 */</div><div class='del'>-		host-&gt;send_addr(host, (page_addr &amp; 0xff), false);</div><div class='add'>+		host-&gt;devtype_data-&gt;send_addr(host, (page_addr &amp; 0xff), false);</div><div class='ctx'> </div><div class='ctx'> 		if (mtd-&gt;writesize &gt; 512) {</div><div class='ctx'> 			if (mtd-&gt;size &gt;= 0x10000000) {</div><div class='ctx'> 				/* paddr_8 - paddr_15 */</div><div class='del'>-				host-&gt;send_addr(host, (page_addr &gt;&gt; 8) &amp; 0xff, false);</div><div class='del'>-				host-&gt;send_addr(host, (page_addr &gt;&gt; 16) &amp; 0xff, true);</div><div class='add'>+				host-&gt;devtype_data-&gt;send_addr(host,</div><div class='add'>+						(page_addr &gt;&gt; 8) &amp; 0xff,</div><div class='add'>+						false);</div><div class='add'>+				host-&gt;devtype_data-&gt;send_addr(host,</div><div class='add'>+						(page_addr &gt;&gt; 16) &amp; 0xff,</div><div class='add'>+						true);</div><div class='ctx'> 			} else</div><div class='ctx'> 				/* paddr_8 - paddr_15 */</div><div class='del'>-				host-&gt;send_addr(host, (page_addr &gt;&gt; 8) &amp; 0xff, true);</div><div class='add'>+				host-&gt;devtype_data-&gt;send_addr(host,</div><div class='add'>+						(page_addr &gt;&gt; 8) &amp; 0xff, true);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* One more address cycle for higher density devices */</div><div class='ctx'> 			if (mtd-&gt;size &gt;= 0x4000000) {</div><div class='ctx'> 				/* paddr_8 - paddr_15 */</div><div class='del'>-				host-&gt;send_addr(host, (page_addr &gt;&gt; 8) &amp; 0xff, false);</div><div class='del'>-				host-&gt;send_addr(host, (page_addr &gt;&gt; 16) &amp; 0xff, true);</div><div class='add'>+				host-&gt;devtype_data-&gt;send_addr(host,</div><div class='add'>+						(page_addr &gt;&gt; 8) &amp; 0xff,</div><div class='add'>+						false);</div><div class='add'>+				host-&gt;devtype_data-&gt;send_addr(host,</div><div class='add'>+						(page_addr &gt;&gt; 16) &amp; 0xff,</div><div class='add'>+						true);</div><div class='ctx'> 			} else</div><div class='ctx'> 				/* paddr_8 - paddr_15 */</div><div class='del'>-				host-&gt;send_addr(host, (page_addr &gt;&gt; 8) &amp; 0xff, true);</div><div class='add'>+				host-&gt;devtype_data-&gt;send_addr(host,</div><div class='add'>+						(page_addr &gt;&gt; 8) &amp; 0xff, true);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -800,7 +882,35 @@ static int get_eccsize(struct mtd_info *mtd)</div><div class='ctx'> 		return 8;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void preset_v1_v2(struct mtd_info *mtd)</div><div class='add'>+static void preset_v1(struct mtd_info *mtd)</div><div class='add'>+{</div><div class='add'>+	struct nand_chip *nand_chip = mtd-&gt;priv;</div><div class='add'>+	struct mxc_nand_host *host = nand_chip-&gt;priv;</div><div class='add'>+	uint16_t config1 = 0;</div><div class='add'>+</div><div class='add'>+	if (nand_chip-&gt;ecc.mode == NAND_ECC_HW)</div><div class='add'>+		config1 |= NFC_V1_V2_CONFIG1_ECC_EN;</div><div class='add'>+</div><div class='add'>+	if (!host-&gt;devtype_data-&gt;irqpending_quirk)</div><div class='add'>+		config1 |= NFC_V1_V2_CONFIG1_INT_MSK;</div><div class='add'>+</div><div class='add'>+	host-&gt;eccsize = 1;</div><div class='add'>+</div><div class='add'>+	writew(config1, NFC_V1_V2_CONFIG1);</div><div class='add'>+	/* preset operation */</div><div class='add'>+</div><div class='add'>+	/* Unlock the internal RAM Buffer */</div><div class='add'>+	writew(0x2, NFC_V1_V2_CONFIG);</div><div class='add'>+</div><div class='add'>+	/* Blocks to be unlocked */</div><div class='add'>+	writew(0x0, NFC_V1_UNLOCKSTART_BLKADDR);</div><div class='add'>+	writew(0xffff, NFC_V1_UNLOCKEND_BLKADDR);</div><div class='add'>+</div><div class='add'>+	/* Unlock Block Command for given address range */</div><div class='add'>+	writew(0x4, NFC_V1_V2_WRPROT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void preset_v2(struct mtd_info *mtd)</div><div class='ctx'> {</div><div class='ctx'> 	struct nand_chip *nand_chip = mtd-&gt;priv;</div><div class='ctx'> 	struct mxc_nand_host *host = nand_chip-&gt;priv;</div><div class='hunk'>@@ -809,13 +919,12 @@ static void preset_v1_v2(struct mtd_info *mtd)</div><div class='ctx'> 	if (nand_chip-&gt;ecc.mode == NAND_ECC_HW)</div><div class='ctx'> 		config1 |= NFC_V1_V2_CONFIG1_ECC_EN;</div><div class='ctx'> </div><div class='del'>-	if (nfc_is_v21())</div><div class='del'>-		config1 |= NFC_V2_CONFIG1_FP_INT;</div><div class='add'>+	config1 |= NFC_V2_CONFIG1_FP_INT;</div><div class='ctx'> </div><div class='del'>-	if (!cpu_is_mx21())</div><div class='add'>+	if (!host-&gt;devtype_data-&gt;irqpending_quirk)</div><div class='ctx'> 		config1 |= NFC_V1_V2_CONFIG1_INT_MSK;</div><div class='ctx'> </div><div class='del'>-	if (nfc_is_v21() &amp;&amp; mtd-&gt;writesize) {</div><div class='add'>+	if (mtd-&gt;writesize) {</div><div class='ctx'> 		uint16_t pages_per_block = mtd-&gt;erasesize / mtd-&gt;writesize;</div><div class='ctx'> </div><div class='ctx'> 		host-&gt;eccsize = get_eccsize(mtd);</div><div class='hunk'>@@ -834,20 +943,14 @@ static void preset_v1_v2(struct mtd_info *mtd)</div><div class='ctx'> 	writew(0x2, NFC_V1_V2_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	/* Blocks to be unlocked */</div><div class='del'>-	if (nfc_is_v21()) {</div><div class='del'>-		writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR0);</div><div class='del'>-		writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR1);</div><div class='del'>-		writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR2);</div><div class='del'>-		writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR3);</div><div class='del'>-		writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR0);</div><div class='del'>-		writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR1);</div><div class='del'>-		writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR2);</div><div class='del'>-		writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR3);</div><div class='del'>-	} else if (nfc_is_v1()) {</div><div class='del'>-		writew(0x0, NFC_V1_UNLOCKSTART_BLKADDR);</div><div class='del'>-		writew(0xffff, NFC_V1_UNLOCKEND_BLKADDR);</div><div class='del'>-	} else</div><div class='del'>-		BUG();</div><div class='add'>+	writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR0);</div><div class='add'>+	writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR1);</div><div class='add'>+	writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR2);</div><div class='add'>+	writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR3);</div><div class='add'>+	writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR0);</div><div class='add'>+	writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR1);</div><div class='add'>+	writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR2);</div><div class='add'>+	writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR3);</div><div class='ctx'> </div><div class='ctx'> 	/* Unlock Block Command for given address range */</div><div class='ctx'> 	writew(0x4, NFC_V1_V2_WRPROT);</div><div class='hunk'>@@ -937,15 +1040,15 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,</div><div class='ctx'> 	/* Command pre-processing step */</div><div class='ctx'> 	switch (command) {</div><div class='ctx'> 	case NAND_CMD_RESET:</div><div class='del'>-		host-&gt;preset(mtd);</div><div class='del'>-		host-&gt;send_cmd(host, command, false);</div><div class='add'>+		host-&gt;devtype_data-&gt;preset(mtd);</div><div class='add'>+		host-&gt;devtype_data-&gt;send_cmd(host, command, false);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case NAND_CMD_STATUS:</div><div class='ctx'> 		host-&gt;buf_start = 0;</div><div class='ctx'> 		host-&gt;status_request = true;</div><div class='ctx'> </div><div class='del'>-		host-&gt;send_cmd(host, command, true);</div><div class='add'>+		host-&gt;devtype_data-&gt;send_cmd(host, command, true);</div><div class='ctx'> 		mxc_do_addr_cycle(mtd, column, page_addr);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -958,15 +1061,16 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,</div><div class='ctx'> </div><div class='ctx'> 		command = NAND_CMD_READ0; /* only READ0 is valid */</div><div class='ctx'> </div><div class='del'>-		host-&gt;send_cmd(host, command, false);</div><div class='add'>+		host-&gt;devtype_data-&gt;send_cmd(host, command, false);</div><div class='ctx'> 		mxc_do_addr_cycle(mtd, column, page_addr);</div><div class='ctx'> </div><div class='ctx'> 		if (mtd-&gt;writesize &gt; 512)</div><div class='del'>-			host-&gt;send_cmd(host, NAND_CMD_READSTART, true);</div><div class='add'>+			host-&gt;devtype_data-&gt;send_cmd(host,</div><div class='add'>+					NAND_CMD_READSTART, true);</div><div class='ctx'> </div><div class='del'>-		host-&gt;send_page(mtd, NFC_OUTPUT);</div><div class='add'>+		host-&gt;devtype_data-&gt;send_page(mtd, NFC_OUTPUT);</div><div class='ctx'> </div><div class='del'>-		memcpy(host-&gt;data_buf, host-&gt;main_area0, mtd-&gt;writesize);</div><div class='add'>+		memcpy_fromio(host-&gt;data_buf, host-&gt;main_area0, mtd-&gt;writesize);</div><div class='ctx'> 		copy_spare(mtd, true);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -977,28 +1081,28 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,</div><div class='ctx'> </div><div class='ctx'> 		host-&gt;buf_start = column;</div><div class='ctx'> </div><div class='del'>-		host-&gt;send_cmd(host, command, false);</div><div class='add'>+		host-&gt;devtype_data-&gt;send_cmd(host, command, false);</div><div class='ctx'> 		mxc_do_addr_cycle(mtd, column, page_addr);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case NAND_CMD_PAGEPROG:</div><div class='del'>-		memcpy(host-&gt;main_area0, host-&gt;data_buf, mtd-&gt;writesize);</div><div class='add'>+		memcpy_toio(host-&gt;main_area0, host-&gt;data_buf, mtd-&gt;writesize);</div><div class='ctx'> 		copy_spare(mtd, false);</div><div class='del'>-		host-&gt;send_page(mtd, NFC_INPUT);</div><div class='del'>-		host-&gt;send_cmd(host, command, true);</div><div class='add'>+		host-&gt;devtype_data-&gt;send_page(mtd, NFC_INPUT);</div><div class='add'>+		host-&gt;devtype_data-&gt;send_cmd(host, command, true);</div><div class='ctx'> 		mxc_do_addr_cycle(mtd, column, page_addr);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case NAND_CMD_READID:</div><div class='del'>-		host-&gt;send_cmd(host, command, true);</div><div class='add'>+		host-&gt;devtype_data-&gt;send_cmd(host, command, true);</div><div class='ctx'> 		mxc_do_addr_cycle(mtd, column, page_addr);</div><div class='del'>-		host-&gt;send_read_id(host);</div><div class='add'>+		host-&gt;devtype_data-&gt;send_read_id(host);</div><div class='ctx'> 		host-&gt;buf_start = column;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case NAND_CMD_ERASE1:</div><div class='ctx'> 	case NAND_CMD_ERASE2:</div><div class='del'>-		host-&gt;send_cmd(host, command, false);</div><div class='add'>+		host-&gt;devtype_data-&gt;send_cmd(host, command, false);</div><div class='ctx'> 		mxc_do_addr_cycle(mtd, column, page_addr);</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1032,15 +1136,191 @@ static struct nand_bbt_descr bbt_mirror_descr = {</div><div class='ctx'> 	.pattern = mirror_pattern,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* v1 + irqpending_quirk: i.MX21 */</div><div class='add'>+static const struct mxc_nand_devtype_data imx21_nand_devtype_data = {</div><div class='add'>+	.preset = preset_v1,</div><div class='add'>+	.send_cmd = send_cmd_v1_v2,</div><div class='add'>+	.send_addr = send_addr_v1_v2,</div><div class='add'>+	.send_page = send_page_v1,</div><div class='add'>+	.send_read_id = send_read_id_v1_v2,</div><div class='add'>+	.get_dev_status = get_dev_status_v1_v2,</div><div class='add'>+	.check_int = check_int_v1_v2,</div><div class='add'>+	.irq_control = irq_control_v1_v2,</div><div class='add'>+	.get_ecc_status = get_ecc_status_v1,</div><div class='add'>+	.ecclayout_512 = &amp;nandv1_hw_eccoob_smallpage,</div><div class='add'>+	.ecclayout_2k = &amp;nandv1_hw_eccoob_largepage,</div><div class='add'>+	.ecclayout_4k = &amp;nandv1_hw_eccoob_smallpage, /* XXX: needs fix */</div><div class='add'>+	.select_chip = mxc_nand_select_chip_v1_v3,</div><div class='add'>+	.correct_data = mxc_nand_correct_data_v1,</div><div class='add'>+	.irqpending_quirk = 1,</div><div class='add'>+	.needs_ip = 0,</div><div class='add'>+	.regs_offset = 0xe00,</div><div class='add'>+	.spare0_offset = 0x800,</div><div class='add'>+	.spare_len = 16,</div><div class='add'>+	.eccbytes = 3,</div><div class='add'>+	.eccsize = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* v1 + !irqpending_quirk: i.MX27, i.MX31 */</div><div class='add'>+static const struct mxc_nand_devtype_data imx27_nand_devtype_data = {</div><div class='add'>+	.preset = preset_v1,</div><div class='add'>+	.send_cmd = send_cmd_v1_v2,</div><div class='add'>+	.send_addr = send_addr_v1_v2,</div><div class='add'>+	.send_page = send_page_v1,</div><div class='add'>+	.send_read_id = send_read_id_v1_v2,</div><div class='add'>+	.get_dev_status = get_dev_status_v1_v2,</div><div class='add'>+	.check_int = check_int_v1_v2,</div><div class='add'>+	.irq_control = irq_control_v1_v2,</div><div class='add'>+	.get_ecc_status = get_ecc_status_v1,</div><div class='add'>+	.ecclayout_512 = &amp;nandv1_hw_eccoob_smallpage,</div><div class='add'>+	.ecclayout_2k = &amp;nandv1_hw_eccoob_largepage,</div><div class='add'>+	.ecclayout_4k = &amp;nandv1_hw_eccoob_smallpage, /* XXX: needs fix */</div><div class='add'>+	.select_chip = mxc_nand_select_chip_v1_v3,</div><div class='add'>+	.correct_data = mxc_nand_correct_data_v1,</div><div class='add'>+	.irqpending_quirk = 0,</div><div class='add'>+	.needs_ip = 0,</div><div class='add'>+	.regs_offset = 0xe00,</div><div class='add'>+	.spare0_offset = 0x800,</div><div class='add'>+	.axi_offset = 0,</div><div class='add'>+	.spare_len = 16,</div><div class='add'>+	.eccbytes = 3,</div><div class='add'>+	.eccsize = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* v21: i.MX25, i.MX35 */</div><div class='add'>+static const struct mxc_nand_devtype_data imx25_nand_devtype_data = {</div><div class='add'>+	.preset = preset_v2,</div><div class='add'>+	.send_cmd = send_cmd_v1_v2,</div><div class='add'>+	.send_addr = send_addr_v1_v2,</div><div class='add'>+	.send_page = send_page_v2,</div><div class='add'>+	.send_read_id = send_read_id_v1_v2,</div><div class='add'>+	.get_dev_status = get_dev_status_v1_v2,</div><div class='add'>+	.check_int = check_int_v1_v2,</div><div class='add'>+	.irq_control = irq_control_v1_v2,</div><div class='add'>+	.get_ecc_status = get_ecc_status_v2,</div><div class='add'>+	.ecclayout_512 = &amp;nandv2_hw_eccoob_smallpage,</div><div class='add'>+	.ecclayout_2k = &amp;nandv2_hw_eccoob_largepage,</div><div class='add'>+	.ecclayout_4k = &amp;nandv2_hw_eccoob_4k,</div><div class='add'>+	.select_chip = mxc_nand_select_chip_v2,</div><div class='add'>+	.correct_data = mxc_nand_correct_data_v2_v3,</div><div class='add'>+	.irqpending_quirk = 0,</div><div class='add'>+	.needs_ip = 0,</div><div class='add'>+	.regs_offset = 0x1e00,</div><div class='add'>+	.spare0_offset = 0x1000,</div><div class='add'>+	.axi_offset = 0,</div><div class='add'>+	.spare_len = 64,</div><div class='add'>+	.eccbytes = 9,</div><div class='add'>+	.eccsize = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* v3: i.MX51, i.MX53 */</div><div class='add'>+static const struct mxc_nand_devtype_data imx51_nand_devtype_data = {</div><div class='add'>+	.preset = preset_v3,</div><div class='add'>+	.send_cmd = send_cmd_v3,</div><div class='add'>+	.send_addr = send_addr_v3,</div><div class='add'>+	.send_page = send_page_v3,</div><div class='add'>+	.send_read_id = send_read_id_v3,</div><div class='add'>+	.get_dev_status = get_dev_status_v3,</div><div class='add'>+	.check_int = check_int_v3,</div><div class='add'>+	.irq_control = irq_control_v3,</div><div class='add'>+	.get_ecc_status = get_ecc_status_v3,</div><div class='add'>+	.ecclayout_512 = &amp;nandv2_hw_eccoob_smallpage,</div><div class='add'>+	.ecclayout_2k = &amp;nandv2_hw_eccoob_largepage,</div><div class='add'>+	.ecclayout_4k = &amp;nandv2_hw_eccoob_smallpage, /* XXX: needs fix */</div><div class='add'>+	.select_chip = mxc_nand_select_chip_v1_v3,</div><div class='add'>+	.correct_data = mxc_nand_correct_data_v2_v3,</div><div class='add'>+	.irqpending_quirk = 0,</div><div class='add'>+	.needs_ip = 1,</div><div class='add'>+	.regs_offset = 0,</div><div class='add'>+	.spare0_offset = 0x1000,</div><div class='add'>+	.axi_offset = 0x1e00,</div><div class='add'>+	.spare_len = 64,</div><div class='add'>+	.eccbytes = 0,</div><div class='add'>+	.eccsize = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF_MTD</div><div class='add'>+static const struct of_device_id mxcnd_dt_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "fsl,imx21-nand",</div><div class='add'>+		.data = &amp;imx21_nand_devtype_data,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "fsl,imx27-nand",</div><div class='add'>+		.data = &amp;imx27_nand_devtype_data,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "fsl,imx25-nand",</div><div class='add'>+		.data = &amp;imx25_nand_devtype_data,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "fsl,imx51-nand",</div><div class='add'>+		.data = &amp;imx51_nand_devtype_data,</div><div class='add'>+	},</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init mxcnd_probe_dt(struct mxc_nand_host *host)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = host-&gt;dev-&gt;of_node;</div><div class='add'>+	struct mxc_nand_platform_data *pdata = &amp;host-&gt;pdata;</div><div class='add'>+	const struct of_device_id *of_id =</div><div class='add'>+		of_match_device(mxcnd_dt_ids, host-&gt;dev);</div><div class='add'>+	int buswidth;</div><div class='add'>+</div><div class='add'>+	if (!np)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	if (of_get_nand_ecc_mode(np) &gt;= 0)</div><div class='add'>+		pdata-&gt;hw_ecc = 1;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;flash_bbt = of_get_nand_on_flash_bbt(np);</div><div class='add'>+</div><div class='add'>+	buswidth = of_get_nand_bus_width(np);</div><div class='add'>+	if (buswidth &lt; 0)</div><div class='add'>+		return buswidth;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;width = buswidth / 8;</div><div class='add'>+</div><div class='add'>+	host-&gt;devtype_data = of_id-&gt;data;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static int __init mxcnd_probe_dt(struct mxc_nand_host *host)</div><div class='add'>+{</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int __init mxcnd_probe_pdata(struct mxc_nand_host *host)</div><div class='add'>+{</div><div class='add'>+	struct mxc_nand_platform_data *pdata = host-&gt;dev-&gt;platform_data;</div><div class='add'>+</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	host-&gt;pdata = *pdata;</div><div class='add'>+</div><div class='add'>+	if (nfc_is_v1()) {</div><div class='add'>+		if (cpu_is_mx21())</div><div class='add'>+			host-&gt;devtype_data = &amp;imx21_nand_devtype_data;</div><div class='add'>+		else</div><div class='add'>+			host-&gt;devtype_data = &amp;imx27_nand_devtype_data;</div><div class='add'>+	} else if (nfc_is_v21()) {</div><div class='add'>+		host-&gt;devtype_data = &amp;imx25_nand_devtype_data;</div><div class='add'>+	} else if (nfc_is_v3_2()) {</div><div class='add'>+		host-&gt;devtype_data = &amp;imx51_nand_devtype_data;</div><div class='add'>+	} else</div><div class='add'>+		BUG();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init mxcnd_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct nand_chip *this;</div><div class='ctx'> 	struct mtd_info *mtd;</div><div class='del'>-	struct mxc_nand_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='ctx'> 	struct mxc_nand_host *host;</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	int err = 0;</div><div class='del'>-	struct nand_ecclayout *oob_smallpage, *oob_largepage;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate memory for MTD device structure and private data */</div><div class='ctx'> 	host = kzalloc(sizeof(struct mxc_nand_host) + NAND_MAX_PAGESIZE +</div><div class='hunk'>@@ -1065,7 +1345,6 @@ static int __init mxcnd_probe(struct platform_device *pdev)</div><div class='ctx'> 	this-&gt;priv = host;</div><div class='ctx'> 	this-&gt;dev_ready = mxc_nand_dev_ready;</div><div class='ctx'> 	this-&gt;cmdfunc = mxc_nand_command;</div><div class='del'>-	this-&gt;select_chip = mxc_nand_select_chip;</div><div class='ctx'> 	this-&gt;read_byte = mxc_nand_read_byte;</div><div class='ctx'> 	this-&gt;read_word = mxc_nand_read_word;</div><div class='ctx'> 	this-&gt;write_buf = mxc_nand_write_buf;</div><div class='hunk'>@@ -1078,7 +1357,7 @@ static int __init mxcnd_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto eclk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	clk_enable(host-&gt;clk);</div><div class='add'>+	clk_prepare_enable(host-&gt;clk);</div><div class='ctx'> 	host-&gt;clk_act = 1;</div><div class='ctx'> </div><div class='ctx'> 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='hunk'>@@ -1095,36 +1374,26 @@ static int __init mxcnd_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	host-&gt;main_area0 = host-&gt;base;</div><div class='ctx'> </div><div class='del'>-	if (nfc_is_v1() || nfc_is_v21()) {</div><div class='del'>-		host-&gt;preset = preset_v1_v2;</div><div class='del'>-		host-&gt;send_cmd = send_cmd_v1_v2;</div><div class='del'>-		host-&gt;send_addr = send_addr_v1_v2;</div><div class='del'>-		host-&gt;send_page = send_page_v1_v2;</div><div class='del'>-		host-&gt;send_read_id = send_read_id_v1_v2;</div><div class='del'>-		host-&gt;get_dev_status = get_dev_status_v1_v2;</div><div class='del'>-		host-&gt;check_int = check_int_v1_v2;</div><div class='del'>-		if (cpu_is_mx21())</div><div class='del'>-			host-&gt;irq_control = irq_control_mx21;</div><div class='del'>-		else</div><div class='del'>-			host-&gt;irq_control = irq_control_v1_v2;</div><div class='del'>-	}</div><div class='add'>+	err = mxcnd_probe_dt(host);</div><div class='add'>+	if (err &gt; 0)</div><div class='add'>+		err = mxcnd_probe_pdata(host);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto eirq;</div><div class='ctx'> </div><div class='del'>-	if (nfc_is_v21()) {</div><div class='del'>-		host-&gt;regs = host-&gt;base + 0x1e00;</div><div class='del'>-		host-&gt;spare0 = host-&gt;base + 0x1000;</div><div class='del'>-		host-&gt;spare_len = 64;</div><div class='del'>-		oob_smallpage = &amp;nandv2_hw_eccoob_smallpage;</div><div class='del'>-		oob_largepage = &amp;nandv2_hw_eccoob_largepage;</div><div class='del'>-		this-&gt;ecc.bytes = 9;</div><div class='del'>-	} else if (nfc_is_v1()) {</div><div class='del'>-		host-&gt;regs = host-&gt;base + 0xe00;</div><div class='del'>-		host-&gt;spare0 = host-&gt;base + 0x800;</div><div class='del'>-		host-&gt;spare_len = 16;</div><div class='del'>-		oob_smallpage = &amp;nandv1_hw_eccoob_smallpage;</div><div class='del'>-		oob_largepage = &amp;nandv1_hw_eccoob_largepage;</div><div class='del'>-		this-&gt;ecc.bytes = 3;</div><div class='del'>-		host-&gt;eccsize = 1;</div><div class='del'>-	} else if (nfc_is_v3_2()) {</div><div class='add'>+	if (host-&gt;devtype_data-&gt;regs_offset)</div><div class='add'>+		host-&gt;regs = host-&gt;base + host-&gt;devtype_data-&gt;regs_offset;</div><div class='add'>+	host-&gt;spare0 = host-&gt;base + host-&gt;devtype_data-&gt;spare0_offset;</div><div class='add'>+	if (host-&gt;devtype_data-&gt;axi_offset)</div><div class='add'>+		host-&gt;regs_axi = host-&gt;base + host-&gt;devtype_data-&gt;axi_offset;</div><div class='add'>+</div><div class='add'>+	this-&gt;ecc.bytes = host-&gt;devtype_data-&gt;eccbytes;</div><div class='add'>+	host-&gt;eccsize = host-&gt;devtype_data-&gt;eccsize;</div><div class='add'>+</div><div class='add'>+	this-&gt;select_chip = host-&gt;devtype_data-&gt;select_chip;</div><div class='add'>+	this-&gt;ecc.size = 512;</div><div class='add'>+	this-&gt;ecc.layout = host-&gt;devtype_data-&gt;ecclayout_512;</div><div class='add'>+</div><div class='add'>+	if (host-&gt;devtype_data-&gt;needs_ip) {</div><div class='ctx'> 		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);</div><div class='ctx'> 		if (!res) {</div><div class='ctx'> 			err = -ENODEV;</div><div class='hunk'>@@ -1135,42 +1404,22 @@ static int __init mxcnd_probe(struct platform_device *pdev)</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			goto eirq;</div><div class='ctx'> 		}</div><div class='del'>-		host-&gt;regs_axi = host-&gt;base + 0x1e00;</div><div class='del'>-		host-&gt;spare0 = host-&gt;base + 0x1000;</div><div class='del'>-		host-&gt;spare_len = 64;</div><div class='del'>-		host-&gt;preset = preset_v3;</div><div class='del'>-		host-&gt;send_cmd = send_cmd_v3;</div><div class='del'>-		host-&gt;send_addr = send_addr_v3;</div><div class='del'>-		host-&gt;send_page = send_page_v3;</div><div class='del'>-		host-&gt;send_read_id = send_read_id_v3;</div><div class='del'>-		host-&gt;check_int = check_int_v3;</div><div class='del'>-		host-&gt;get_dev_status = get_dev_status_v3;</div><div class='del'>-		host-&gt;irq_control = irq_control_v3;</div><div class='del'>-		oob_smallpage = &amp;nandv2_hw_eccoob_smallpage;</div><div class='del'>-		oob_largepage = &amp;nandv2_hw_eccoob_largepage;</div><div class='del'>-	} else</div><div class='del'>-		BUG();</div><div class='del'>-</div><div class='del'>-	this-&gt;ecc.size = 512;</div><div class='del'>-	this-&gt;ecc.layout = oob_smallpage;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;hw_ecc) {</div><div class='add'>+	if (host-&gt;pdata.hw_ecc) {</div><div class='ctx'> 		this-&gt;ecc.calculate = mxc_nand_calculate_ecc;</div><div class='ctx'> 		this-&gt;ecc.hwctl = mxc_nand_enable_hwecc;</div><div class='del'>-		if (nfc_is_v1())</div><div class='del'>-			this-&gt;ecc.correct = mxc_nand_correct_data_v1;</div><div class='del'>-		else</div><div class='del'>-			this-&gt;ecc.correct = mxc_nand_correct_data_v2_v3;</div><div class='add'>+		this-&gt;ecc.correct = host-&gt;devtype_data-&gt;correct_data;</div><div class='ctx'> 		this-&gt;ecc.mode = NAND_ECC_HW;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		this-&gt;ecc.mode = NAND_ECC_SOFT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* NAND bus width determines access funtions used by upper layer */</div><div class='del'>-	if (pdata-&gt;width == 2)</div><div class='add'>+	/* NAND bus width determines access functions used by upper layer */</div><div class='add'>+	if (host-&gt;pdata.width == 2)</div><div class='ctx'> 		this-&gt;options |= NAND_BUSWIDTH_16;</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;flash_bbt) {</div><div class='add'>+	if (host-&gt;pdata.flash_bbt) {</div><div class='ctx'> 		this-&gt;bbt_td = &amp;bbt_main_descr;</div><div class='ctx'> 		this-&gt;bbt_md = &amp;bbt_mirror_descr;</div><div class='ctx'> 		/* update flash based bbt */</div><div class='hunk'>@@ -1182,28 +1431,25 @@ static int __init mxcnd_probe(struct platform_device *pdev)</div><div class='ctx'> 	host-&gt;irq = platform_get_irq(pdev, 0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * mask the interrupt. For i.MX21 explicitely call</div><div class='del'>-	 * irq_control_v1_v2 to use the mask bit. We can't call</div><div class='del'>-	 * disable_irq_nosync() for an interrupt we do not own yet.</div><div class='add'>+	 * Use host-&gt;devtype_data-&gt;irq_control() here instead of irq_control()</div><div class='add'>+	 * because we must not disable_irq_nosync without having requested the</div><div class='add'>+	 * irq.</div><div class='ctx'> 	 */</div><div class='del'>-	if (cpu_is_mx21())</div><div class='del'>-		irq_control_v1_v2(host, 0);</div><div class='del'>-	else</div><div class='del'>-		host-&gt;irq_control(host, 0);</div><div class='add'>+	host-&gt;devtype_data-&gt;irq_control(host, 0);</div><div class='ctx'> </div><div class='ctx'> 	err = request_irq(host-&gt;irq, mxc_nfc_irq, IRQF_DISABLED, DRIVER_NAME, host);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto eirq;</div><div class='ctx'> </div><div class='del'>-	host-&gt;irq_control(host, 0);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * Now that the interrupt is disabled make sure the interrupt</div><div class='del'>-	 * mask bit is cleared on i.MX21. Otherwise we can't read</div><div class='del'>-	 * the interrupt status bit on this machine.</div><div class='add'>+	 * Now that we "own" the interrupt make sure the interrupt mask bit is</div><div class='add'>+	 * cleared on i.MX21. Otherwise we can't read the interrupt status bit</div><div class='add'>+	 * on this machine.</div><div class='ctx'> 	 */</div><div class='del'>-	if (cpu_is_mx21())</div><div class='del'>-		irq_control_v1_v2(host, 1);</div><div class='add'>+	if (host-&gt;devtype_data-&gt;irqpending_quirk) {</div><div class='add'>+		disable_irq_nosync(host-&gt;irq);</div><div class='add'>+		host-&gt;devtype_data-&gt;irq_control(host, 1);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* first scan to find the device and get the page size */</div><div class='ctx'> 	if (nand_scan_ident(mtd, nfc_is_v21() ? 4 : 1, NULL)) {</div><div class='hunk'>@@ -1212,18 +1458,12 @@ static int __init mxcnd_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Call preset again, with correct writesize this time */</div><div class='del'>-	host-&gt;preset(mtd);</div><div class='add'>+	host-&gt;devtype_data-&gt;preset(mtd);</div><div class='ctx'> </div><div class='ctx'> 	if (mtd-&gt;writesize == 2048)</div><div class='del'>-		this-&gt;ecc.layout = oob_largepage;</div><div class='del'>-	if (nfc_is_v21() &amp;&amp; mtd-&gt;writesize == 4096)</div><div class='del'>-		this-&gt;ecc.layout = &amp;nandv2_hw_eccoob_4k;</div><div class='del'>-</div><div class='del'>-	/* second phase scan */</div><div class='del'>-	if (nand_scan_tail(mtd)) {</div><div class='del'>-		err = -ENXIO;</div><div class='del'>-		goto escan;</div><div class='del'>-	}</div><div class='add'>+		this-&gt;ecc.layout = host-&gt;devtype_data-&gt;ecclayout_2k;</div><div class='add'>+	else if (mtd-&gt;writesize == 4096)</div><div class='add'>+		this-&gt;ecc.layout = host-&gt;devtype_data-&gt;ecclayout_4k;</div><div class='ctx'> </div><div class='ctx'> 	if (this-&gt;ecc.mode == NAND_ECC_HW) {</div><div class='ctx'> 		if (nfc_is_v1())</div><div class='hunk'>@@ -1232,9 +1472,19 @@ static int __init mxcnd_probe(struct platform_device *pdev)</div><div class='ctx'> 			this-&gt;ecc.strength = (host-&gt;eccsize == 4) ? 4 : 8;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* second phase scan */</div><div class='add'>+	if (nand_scan_tail(mtd)) {</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto escan;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Register the partitions */</div><div class='del'>-	mtd_device_parse_register(mtd, part_probes, NULL, pdata-&gt;parts,</div><div class='del'>-				  pdata-&gt;nr_parts);</div><div class='add'>+	mtd_device_parse_register(mtd, part_probes,</div><div class='add'>+			&amp;(struct mtd_part_parser_data){</div><div class='add'>+				.of_node = pdev-&gt;dev.of_node,</div><div class='add'>+			},</div><div class='add'>+			host-&gt;pdata.parts,</div><div class='add'>+			host-&gt;pdata.nr_parts);</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, host);</div><div class='ctx'> </div><div class='hunk'>@@ -1275,6 +1525,8 @@ static int __devexit mxcnd_remove(struct platform_device *pdev)</div><div class='ctx'> static struct platform_driver mxcnd_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		   .name = DRIVER_NAME,</div><div class='add'>+		   .owner = THIS_MODULE,</div><div class='add'>+		   .of_match_table = of_match_ptr(mxcnd_dt_ids),</div><div class='ctx'> 	},</div><div class='ctx'> 	.remove = __devexit_p(mxcnd_remove),</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c<br/>index 47b19c0bb070..d47586cf64ce 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/nand_base.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/nand_base.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/nand_base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/nand_base.c</a></div><div class='hunk'>@@ -1066,15 +1066,17 @@ EXPORT_SYMBOL(nand_lock);</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @buf: buffer to store read data</div><div class='add'>+ * @oob_required: caller requires OOB data read to chip-&gt;oob_poi</div><div class='ctx'>  * @page: page number to read</div><div class='ctx'>  *</div><div class='ctx'>  * Not for syndrome calculating ECC controllers, which use a special oob layout.</div><div class='ctx'>  */</div><div class='ctx'> static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-			      uint8_t *buf, int page)</div><div class='add'>+			      uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	chip-&gt;read_buf(mtd, buf, mtd-&gt;writesize);</div><div class='del'>-	chip-&gt;read_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='add'>+	if (oob_required)</div><div class='add'>+		chip-&gt;read_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1083,13 +1085,14 @@ static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @buf: buffer to store read data</div><div class='add'>+ * @oob_required: caller requires OOB data read to chip-&gt;oob_poi</div><div class='ctx'>  * @page: page number to read</div><div class='ctx'>  *</div><div class='ctx'>  * We need a special oob layout and handling even when OOB isn't used.</div><div class='ctx'>  */</div><div class='ctx'> static int nand_read_page_raw_syndrome(struct mtd_info *mtd,</div><div class='del'>-					struct nand_chip *chip,</div><div class='del'>-					uint8_t *buf, int page)</div><div class='add'>+				       struct nand_chip *chip, uint8_t *buf,</div><div class='add'>+				       int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	int eccsize = chip-&gt;ecc.size;</div><div class='ctx'> 	int eccbytes = chip-&gt;ecc.bytes;</div><div class='hunk'>@@ -1126,10 +1129,11 @@ static int nand_read_page_raw_syndrome(struct mtd_info *mtd,</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @buf: buffer to store read data</div><div class='add'>+ * @oob_required: caller requires OOB data read to chip-&gt;oob_poi</div><div class='ctx'>  * @page: page number to read</div><div class='ctx'>  */</div><div class='ctx'> static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				uint8_t *buf, int page)</div><div class='add'>+				uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	int i, eccsize = chip-&gt;ecc.size;</div><div class='ctx'> 	int eccbytes = chip-&gt;ecc.bytes;</div><div class='hunk'>@@ -1138,8 +1142,9 @@ static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 	uint8_t *ecc_calc = chip-&gt;buffers-&gt;ecccalc;</div><div class='ctx'> 	uint8_t *ecc_code = chip-&gt;buffers-&gt;ecccode;</div><div class='ctx'> 	uint32_t *eccpos = chip-&gt;ecc.layout-&gt;eccpos;</div><div class='add'>+	unsigned int max_bitflips = 0;</div><div class='ctx'> </div><div class='del'>-	chip-&gt;ecc.read_page_raw(mtd, chip, buf, page);</div><div class='add'>+	chip-&gt;ecc.read_page_raw(mtd, chip, buf, 1, page);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)</div><div class='ctx'> 		chip-&gt;ecc.calculate(mtd, p, &amp;ecc_calc[i]);</div><div class='hunk'>@@ -1154,12 +1159,14 @@ static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 		int stat;</div><div class='ctx'> </div><div class='ctx'> 		stat = chip-&gt;ecc.correct(mtd, p, &amp;ecc_code[i], &amp;ecc_calc[i]);</div><div class='del'>-		if (stat &lt; 0)</div><div class='add'>+		if (stat &lt; 0) {</div><div class='ctx'> 			mtd-&gt;ecc_stats.failed++;</div><div class='del'>-		else</div><div class='add'>+		} else {</div><div class='ctx'> 			mtd-&gt;ecc_stats.corrected += stat;</div><div class='add'>+			max_bitflips = max_t(unsigned int, max_bitflips, stat);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+	return max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1180,6 +1187,7 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 	int datafrag_len, eccfrag_len, aligned_len, aligned_pos;</div><div class='ctx'> 	int busw = (chip-&gt;options &amp; NAND_BUSWIDTH_16) ? 2 : 1;</div><div class='ctx'> 	int index = 0;</div><div class='add'>+	unsigned int max_bitflips = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Column address within the page aligned to ECC size (256bytes) */</div><div class='ctx'> 	start_step = data_offs / chip-&gt;ecc.size;</div><div class='hunk'>@@ -1244,12 +1252,14 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> </div><div class='ctx'> 		stat = chip-&gt;ecc.correct(mtd, p,</div><div class='ctx'> 			&amp;chip-&gt;buffers-&gt;ecccode[i], &amp;chip-&gt;buffers-&gt;ecccalc[i]);</div><div class='del'>-		if (stat &lt; 0)</div><div class='add'>+		if (stat &lt; 0) {</div><div class='ctx'> 			mtd-&gt;ecc_stats.failed++;</div><div class='del'>-		else</div><div class='add'>+		} else {</div><div class='ctx'> 			mtd-&gt;ecc_stats.corrected += stat;</div><div class='add'>+			max_bitflips = max_t(unsigned int, max_bitflips, stat);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+	return max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1257,12 +1267,13 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @buf: buffer to store read data</div><div class='add'>+ * @oob_required: caller requires OOB data read to chip-&gt;oob_poi</div><div class='ctx'>  * @page: page number to read</div><div class='ctx'>  *</div><div class='ctx'>  * Not for syndrome calculating ECC controllers which need a special oob layout.</div><div class='ctx'>  */</div><div class='ctx'> static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				uint8_t *buf, int page)</div><div class='add'>+				uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	int i, eccsize = chip-&gt;ecc.size;</div><div class='ctx'> 	int eccbytes = chip-&gt;ecc.bytes;</div><div class='hunk'>@@ -1271,6 +1282,7 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 	uint8_t *ecc_calc = chip-&gt;buffers-&gt;ecccalc;</div><div class='ctx'> 	uint8_t *ecc_code = chip-&gt;buffers-&gt;ecccode;</div><div class='ctx'> 	uint32_t *eccpos = chip-&gt;ecc.layout-&gt;eccpos;</div><div class='add'>+	unsigned int max_bitflips = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {</div><div class='ctx'> 		chip-&gt;ecc.hwctl(mtd, NAND_ECC_READ);</div><div class='hunk'>@@ -1289,12 +1301,14 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 		int stat;</div><div class='ctx'> </div><div class='ctx'> 		stat = chip-&gt;ecc.correct(mtd, p, &amp;ecc_code[i], &amp;ecc_calc[i]);</div><div class='del'>-		if (stat &lt; 0)</div><div class='add'>+		if (stat &lt; 0) {</div><div class='ctx'> 			mtd-&gt;ecc_stats.failed++;</div><div class='del'>-		else</div><div class='add'>+		} else {</div><div class='ctx'> 			mtd-&gt;ecc_stats.corrected += stat;</div><div class='add'>+			max_bitflips = max_t(unsigned int, max_bitflips, stat);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+	return max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1302,6 +1316,7 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @buf: buffer to store read data</div><div class='add'>+ * @oob_required: caller requires OOB data read to chip-&gt;oob_poi</div><div class='ctx'>  * @page: page number to read</div><div class='ctx'>  *</div><div class='ctx'>  * Hardware ECC for large page chips, require OOB to be read first. For this</div><div class='hunk'>@@ -1311,7 +1326,7 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'>  * the data area, by overwriting the NAND manufacturer bad block markings.</div><div class='ctx'>  */</div><div class='ctx'> static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,</div><div class='del'>-	struct nand_chip *chip, uint8_t *buf, int page)</div><div class='add'>+	struct nand_chip *chip, uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	int i, eccsize = chip-&gt;ecc.size;</div><div class='ctx'> 	int eccbytes = chip-&gt;ecc.bytes;</div><div class='hunk'>@@ -1320,6 +1335,7 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,</div><div class='ctx'> 	uint8_t *ecc_code = chip-&gt;buffers-&gt;ecccode;</div><div class='ctx'> 	uint32_t *eccpos = chip-&gt;ecc.layout-&gt;eccpos;</div><div class='ctx'> 	uint8_t *ecc_calc = chip-&gt;buffers-&gt;ecccalc;</div><div class='add'>+	unsigned int max_bitflips = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Read the OOB area first */</div><div class='ctx'> 	chip-&gt;cmdfunc(mtd, NAND_CMD_READOOB, 0, page);</div><div class='hunk'>@@ -1337,12 +1353,14 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,</div><div class='ctx'> 		chip-&gt;ecc.calculate(mtd, p, &amp;ecc_calc[i]);</div><div class='ctx'> </div><div class='ctx'> 		stat = chip-&gt;ecc.correct(mtd, p, &amp;ecc_code[i], NULL);</div><div class='del'>-		if (stat &lt; 0)</div><div class='add'>+		if (stat &lt; 0) {</div><div class='ctx'> 			mtd-&gt;ecc_stats.failed++;</div><div class='del'>-		else</div><div class='add'>+		} else {</div><div class='ctx'> 			mtd-&gt;ecc_stats.corrected += stat;</div><div class='add'>+			max_bitflips = max_t(unsigned int, max_bitflips, stat);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+	return max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1350,19 +1368,21 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @buf: buffer to store read data</div><div class='add'>+ * @oob_required: caller requires OOB data read to chip-&gt;oob_poi</div><div class='ctx'>  * @page: page number to read</div><div class='ctx'>  *</div><div class='ctx'>  * The hw generator calculates the error syndrome automatically. Therefore we</div><div class='ctx'>  * need a special oob layout and handling.</div><div class='ctx'>  */</div><div class='ctx'> static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				   uint8_t *buf, int page)</div><div class='add'>+				   uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	int i, eccsize = chip-&gt;ecc.size;</div><div class='ctx'> 	int eccbytes = chip-&gt;ecc.bytes;</div><div class='ctx'> 	int eccsteps = chip-&gt;ecc.steps;</div><div class='ctx'> 	uint8_t *p = buf;</div><div class='ctx'> 	uint8_t *oob = chip-&gt;oob_poi;</div><div class='add'>+	unsigned int max_bitflips = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {</div><div class='ctx'> 		int stat;</div><div class='hunk'>@@ -1379,10 +1399,12 @@ static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 		chip-&gt;read_buf(mtd, oob, eccbytes);</div><div class='ctx'> 		stat = chip-&gt;ecc.correct(mtd, p, oob, NULL);</div><div class='ctx'> </div><div class='del'>-		if (stat &lt; 0)</div><div class='add'>+		if (stat &lt; 0) {</div><div class='ctx'> 			mtd-&gt;ecc_stats.failed++;</div><div class='del'>-		else</div><div class='add'>+		} else {</div><div class='ctx'> 			mtd-&gt;ecc_stats.corrected += stat;</div><div class='add'>+			max_bitflips = max_t(unsigned int, max_bitflips, stat);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		oob += eccbytes;</div><div class='ctx'> </div><div class='hunk'>@@ -1397,7 +1419,7 @@ static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 	if (i)</div><div class='ctx'> 		chip-&gt;read_buf(mtd, oob, i);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1459,11 +1481,9 @@ static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,</div><div class='ctx'> static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 			    struct mtd_oob_ops *ops)</div><div class='ctx'> {</div><div class='del'>-	int chipnr, page, realpage, col, bytes, aligned;</div><div class='add'>+	int chipnr, page, realpage, col, bytes, aligned, oob_required;</div><div class='ctx'> 	struct nand_chip *chip = mtd-&gt;priv;</div><div class='ctx'> 	struct mtd_ecc_stats stats;</div><div class='del'>-	int blkcheck = (1 &lt;&lt; (chip-&gt;phys_erase_shift - chip-&gt;page_shift)) - 1;</div><div class='del'>-	int sndcmd = 1;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	uint32_t readlen = ops-&gt;len;</div><div class='ctx'> 	uint32_t oobreadlen = ops-&gt;ooblen;</div><div class='hunk'>@@ -1471,6 +1491,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 		mtd-&gt;oobavail : mtd-&gt;oobsize;</div><div class='ctx'> </div><div class='ctx'> 	uint8_t *bufpoi, *oob, *buf;</div><div class='add'>+	unsigned int max_bitflips = 0;</div><div class='ctx'> </div><div class='ctx'> 	stats = mtd-&gt;ecc_stats;</div><div class='ctx'> </div><div class='hunk'>@@ -1484,6 +1505,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> </div><div class='ctx'> 	buf = ops-&gt;datbuf;</div><div class='ctx'> 	oob = ops-&gt;oobbuf;</div><div class='add'>+	oob_required = oob ? 1 : 0;</div><div class='ctx'> </div><div class='ctx'> 	while (1) {</div><div class='ctx'> 		bytes = min(mtd-&gt;writesize - col, readlen);</div><div class='hunk'>@@ -1493,21 +1515,22 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 		if (realpage != chip-&gt;pagebuf || oob) {</div><div class='ctx'> 			bufpoi = aligned ? buf : chip-&gt;buffers-&gt;databuf;</div><div class='ctx'> </div><div class='del'>-			if (likely(sndcmd)) {</div><div class='del'>-				chip-&gt;cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);</div><div class='del'>-				sndcmd = 0;</div><div class='del'>-			}</div><div class='add'>+			chip-&gt;cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);</div><div class='ctx'> </div><div class='del'>-			/* Now read the page into the buffer */</div><div class='add'>+			/*</div><div class='add'>+			 * Now read the page into the buffer.  Absent an error,</div><div class='add'>+			 * the read methods return max bitflips per ecc step.</div><div class='add'>+			 */</div><div class='ctx'> 			if (unlikely(ops-&gt;mode == MTD_OPS_RAW))</div><div class='del'>-				ret = chip-&gt;ecc.read_page_raw(mtd, chip,</div><div class='del'>-							      bufpoi, page);</div><div class='add'>+				ret = chip-&gt;ecc.read_page_raw(mtd, chip, bufpoi,</div><div class='add'>+							      oob_required,</div><div class='add'>+							      page);</div><div class='ctx'> 			else if (!aligned &amp;&amp; NAND_SUBPAGE_READ(chip) &amp;&amp; !oob)</div><div class='ctx'> 				ret = chip-&gt;ecc.read_subpage(mtd, chip,</div><div class='ctx'> 							col, bytes, bufpoi);</div><div class='ctx'> 			else</div><div class='ctx'> 				ret = chip-&gt;ecc.read_page(mtd, chip, bufpoi,</div><div class='del'>-							  page);</div><div class='add'>+							  oob_required, page);</div><div class='ctx'> 			if (ret &lt; 0) {</div><div class='ctx'> 				if (!aligned)</div><div class='ctx'> 					/* Invalidate page cache */</div><div class='hunk'>@@ -1515,22 +1538,25 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='add'>+			max_bitflips = max_t(unsigned int, max_bitflips, ret);</div><div class='add'>+</div><div class='ctx'> 			/* Transfer not aligned data */</div><div class='ctx'> 			if (!aligned) {</div><div class='ctx'> 				if (!NAND_SUBPAGE_READ(chip) &amp;&amp; !oob &amp;&amp;</div><div class='ctx'> 				    !(mtd-&gt;ecc_stats.failed - stats.failed) &amp;&amp;</div><div class='del'>-				    (ops-&gt;mode != MTD_OPS_RAW))</div><div class='add'>+				    (ops-&gt;mode != MTD_OPS_RAW)) {</div><div class='ctx'> 					chip-&gt;pagebuf = realpage;</div><div class='del'>-				else</div><div class='add'>+					chip-&gt;pagebuf_bitflips = ret;</div><div class='add'>+				} else {</div><div class='ctx'> 					/* Invalidate page cache */</div><div class='ctx'> 					chip-&gt;pagebuf = -1;</div><div class='add'>+				}</div><div class='ctx'> 				memcpy(buf, chip-&gt;buffers-&gt;databuf + col, bytes);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			buf += bytes;</div><div class='ctx'> </div><div class='ctx'> 			if (unlikely(oob)) {</div><div class='del'>-</div><div class='ctx'> 				int toread = min(oobreadlen, max_oobsize);</div><div class='ctx'> </div><div class='ctx'> 				if (toread) {</div><div class='hunk'>@@ -1541,13 +1567,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (!(chip-&gt;options &amp; NAND_NO_READRDY)) {</div><div class='del'>-				/*</div><div class='del'>-				 * Apply delay or wait for ready/busy pin. Do</div><div class='del'>-				 * this before the AUTOINCR check, so no</div><div class='del'>-				 * problems arise if a chip which does auto</div><div class='del'>-				 * increment is marked as NOAUTOINCR by the</div><div class='del'>-				 * board driver.</div><div class='del'>-				 */</div><div class='add'>+				/* Apply delay or wait for ready/busy pin */</div><div class='ctx'> 				if (!chip-&gt;dev_ready)</div><div class='ctx'> 					udelay(chip-&gt;chip_delay);</div><div class='ctx'> 				else</div><div class='hunk'>@@ -1556,6 +1576,8 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 		} else {</div><div class='ctx'> 			memcpy(buf, chip-&gt;buffers-&gt;databuf + col, bytes);</div><div class='ctx'> 			buf += bytes;</div><div class='add'>+			max_bitflips = max_t(unsigned int, max_bitflips,</div><div class='add'>+					     chip-&gt;pagebuf_bitflips);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		readlen -= bytes;</div><div class='hunk'>@@ -1575,26 +1597,19 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 			chip-&gt;select_chip(mtd, -1);</div><div class='ctx'> 			chip-&gt;select_chip(mtd, chipnr);</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Check, if the chip supports auto page increment or if we</div><div class='del'>-		 * have hit a block boundary.</div><div class='del'>-		 */</div><div class='del'>-		if (!NAND_CANAUTOINCR(chip) || !(page &amp; blkcheck))</div><div class='del'>-			sndcmd = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ops-&gt;retlen = ops-&gt;len - (size_t) readlen;</div><div class='ctx'> 	if (oob)</div><div class='ctx'> 		ops-&gt;oobretlen = ops-&gt;ooblen - oobreadlen;</div><div class='ctx'> </div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (mtd-&gt;ecc_stats.failed - stats.failed)</div><div class='ctx'> 		return -EBADMSG;</div><div class='ctx'> </div><div class='del'>-	return  mtd-&gt;ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;</div><div class='add'>+	return max_bitflips;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1630,17 +1645,13 @@ static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @page: page number to read</div><div class='del'>- * @sndcmd: flag whether to issue read command or not</div><div class='ctx'>  */</div><div class='ctx'> static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-			     int page, int sndcmd)</div><div class='add'>+			     int page)</div><div class='ctx'> {</div><div class='del'>-	if (sndcmd) {</div><div class='del'>-		chip-&gt;cmdfunc(mtd, NAND_CMD_READOOB, 0, page);</div><div class='del'>-		sndcmd = 0;</div><div class='del'>-	}</div><div class='add'>+	chip-&gt;cmdfunc(mtd, NAND_CMD_READOOB, 0, page);</div><div class='ctx'> 	chip-&gt;read_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='del'>-	return sndcmd;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1649,10 +1660,9 @@ static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @page: page number to read</div><div class='del'>- * @sndcmd: flag whether to issue read command or not</div><div class='ctx'>  */</div><div class='ctx'> static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				  int page, int sndcmd)</div><div class='add'>+				  int page)</div><div class='ctx'> {</div><div class='ctx'> 	uint8_t *buf = chip-&gt;oob_poi;</div><div class='ctx'> 	int length = mtd-&gt;oobsize;</div><div class='hunk'>@@ -1679,7 +1689,7 @@ static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 	if (length &gt; 0)</div><div class='ctx'> 		chip-&gt;read_buf(mtd, bufpoi, length);</div><div class='ctx'> </div><div class='del'>-	return 1;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1775,13 +1785,13 @@ static int nand_write_oob_syndrome(struct mtd_info *mtd,</div><div class='ctx'> static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 			    struct mtd_oob_ops *ops)</div><div class='ctx'> {</div><div class='del'>-	int page, realpage, chipnr, sndcmd = 1;</div><div class='add'>+	int page, realpage, chipnr;</div><div class='ctx'> 	struct nand_chip *chip = mtd-&gt;priv;</div><div class='ctx'> 	struct mtd_ecc_stats stats;</div><div class='del'>-	int blkcheck = (1 &lt;&lt; (chip-&gt;phys_erase_shift - chip-&gt;page_shift)) - 1;</div><div class='ctx'> 	int readlen = ops-&gt;ooblen;</div><div class='ctx'> 	int len;</div><div class='ctx'> 	uint8_t *buf = ops-&gt;oobbuf;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: from = 0x%08Lx, len = %i\n",</div><div class='ctx'> 			__func__, (unsigned long long)from, readlen);</div><div class='hunk'>@@ -1817,20 +1827,18 @@ static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> </div><div class='ctx'> 	while (1) {</div><div class='ctx'> 		if (ops-&gt;mode == MTD_OPS_RAW)</div><div class='del'>-			sndcmd = chip-&gt;ecc.read_oob_raw(mtd, chip, page, sndcmd);</div><div class='add'>+			ret = chip-&gt;ecc.read_oob_raw(mtd, chip, page);</div><div class='ctx'> 		else</div><div class='del'>-			sndcmd = chip-&gt;ecc.read_oob(mtd, chip, page, sndcmd);</div><div class='add'>+			ret = chip-&gt;ecc.read_oob(mtd, chip, page);</div><div class='add'>+</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='ctx'> 		len = min(len, readlen);</div><div class='ctx'> 		buf = nand_transfer_oob(chip, buf, ops, len);</div><div class='ctx'> </div><div class='ctx'> 		if (!(chip-&gt;options &amp; NAND_NO_READRDY)) {</div><div class='del'>-			/*</div><div class='del'>-			 * Apply delay or wait for ready/busy pin. Do this</div><div class='del'>-			 * before the AUTOINCR check, so no problems arise if a</div><div class='del'>-			 * chip which does auto increment is marked as</div><div class='del'>-			 * NOAUTOINCR by the board driver.</div><div class='del'>-			 */</div><div class='add'>+			/* Apply delay or wait for ready/busy pin */</div><div class='ctx'> 			if (!chip-&gt;dev_ready)</div><div class='ctx'> 				udelay(chip-&gt;chip_delay);</div><div class='ctx'> 			else</div><div class='hunk'>@@ -1851,16 +1859,12 @@ static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 			chip-&gt;select_chip(mtd, -1);</div><div class='ctx'> 			chip-&gt;select_chip(mtd, chipnr);</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Check, if the chip supports auto page increment or if we</div><div class='del'>-		 * have hit a block boundary.</div><div class='del'>-		 */</div><div class='del'>-		if (!NAND_CANAUTOINCR(chip) || !(page &amp; blkcheck))</div><div class='del'>-			sndcmd = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ops-&gt;oobretlen = ops-&gt;ooblen;</div><div class='add'>+	ops-&gt;oobretlen = ops-&gt;ooblen - readlen;</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (mtd-&gt;ecc_stats.failed - stats.failed)</div><div class='ctx'> 		return -EBADMSG;</div><div class='hunk'>@@ -1919,14 +1923,16 @@ out:</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @buf: data buffer</div><div class='add'>+ * @oob_required: must write chip-&gt;oob_poi to OOB</div><div class='ctx'>  *</div><div class='ctx'>  * Not for syndrome calculating ECC controllers, which use a special oob layout.</div><div class='ctx'>  */</div><div class='ctx'> static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				const uint8_t *buf)</div><div class='add'>+				const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	chip-&gt;write_buf(mtd, buf, mtd-&gt;writesize);</div><div class='del'>-	chip-&gt;write_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='add'>+	if (oob_required)</div><div class='add'>+		chip-&gt;write_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1934,12 +1940,13 @@ static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @buf: data buffer</div><div class='add'>+ * @oob_required: must write chip-&gt;oob_poi to OOB</div><div class='ctx'>  *</div><div class='ctx'>  * We need a special oob layout and handling even when ECC isn't checked.</div><div class='ctx'>  */</div><div class='ctx'> static void nand_write_page_raw_syndrome(struct mtd_info *mtd,</div><div class='ctx'> 					struct nand_chip *chip,</div><div class='del'>-					const uint8_t *buf)</div><div class='add'>+					const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	int eccsize = chip-&gt;ecc.size;</div><div class='ctx'> 	int eccbytes = chip-&gt;ecc.bytes;</div><div class='hunk'>@@ -1973,9 +1980,10 @@ static void nand_write_page_raw_syndrome(struct mtd_info *mtd,</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @buf: data buffer</div><div class='add'>+ * @oob_required: must write chip-&gt;oob_poi to OOB</div><div class='ctx'>  */</div><div class='ctx'> static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				  const uint8_t *buf)</div><div class='add'>+				  const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	int i, eccsize = chip-&gt;ecc.size;</div><div class='ctx'> 	int eccbytes = chip-&gt;ecc.bytes;</div><div class='hunk'>@@ -1991,7 +1999,7 @@ static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 	for (i = 0; i &lt; chip-&gt;ecc.total; i++)</div><div class='ctx'> 		chip-&gt;oob_poi[eccpos[i]] = ecc_calc[i];</div><div class='ctx'> </div><div class='del'>-	chip-&gt;ecc.write_page_raw(mtd, chip, buf);</div><div class='add'>+	chip-&gt;ecc.write_page_raw(mtd, chip, buf, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1999,9 +2007,10 @@ static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @buf: data buffer</div><div class='add'>+ * @oob_required: must write chip-&gt;oob_poi to OOB</div><div class='ctx'>  */</div><div class='ctx'> static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				  const uint8_t *buf)</div><div class='add'>+				  const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	int i, eccsize = chip-&gt;ecc.size;</div><div class='ctx'> 	int eccbytes = chip-&gt;ecc.bytes;</div><div class='hunk'>@@ -2027,12 +2036,14 @@ static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'>  * @mtd: mtd info structure</div><div class='ctx'>  * @chip: nand chip info structure</div><div class='ctx'>  * @buf: data buffer</div><div class='add'>+ * @oob_required: must write chip-&gt;oob_poi to OOB</div><div class='ctx'>  *</div><div class='ctx'>  * The hw generator calculates the error syndrome automatically. Therefore we</div><div class='ctx'>  * need a special oob layout and handling.</div><div class='ctx'>  */</div><div class='ctx'> static void nand_write_page_syndrome(struct mtd_info *mtd,</div><div class='del'>-				    struct nand_chip *chip, const uint8_t *buf)</div><div class='add'>+				    struct nand_chip *chip,</div><div class='add'>+				    const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	int i, eccsize = chip-&gt;ecc.size;</div><div class='ctx'> 	int eccbytes = chip-&gt;ecc.bytes;</div><div class='hunk'>@@ -2071,21 +2082,23 @@ static void nand_write_page_syndrome(struct mtd_info *mtd,</div><div class='ctx'>  * @mtd: MTD device structure</div><div class='ctx'>  * @chip: NAND chip descriptor</div><div class='ctx'>  * @buf: the data to write</div><div class='add'>+ * @oob_required: must write chip-&gt;oob_poi to OOB</div><div class='ctx'>  * @page: page number to write</div><div class='ctx'>  * @cached: cached programming</div><div class='ctx'>  * @raw: use _raw version of write_page</div><div class='ctx'>  */</div><div class='ctx'> static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-			   const uint8_t *buf, int page, int cached, int raw)</div><div class='add'>+			   const uint8_t *buf, int oob_required, int page,</div><div class='add'>+			   int cached, int raw)</div><div class='ctx'> {</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	chip-&gt;cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(raw))</div><div class='del'>-		chip-&gt;ecc.write_page_raw(mtd, chip, buf);</div><div class='add'>+		chip-&gt;ecc.write_page_raw(mtd, chip, buf, oob_required);</div><div class='ctx'> 	else</div><div class='del'>-		chip-&gt;ecc.write_page(mtd, chip, buf);</div><div class='add'>+		chip-&gt;ecc.write_page(mtd, chip, buf, oob_required);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Cached progamming disabled for now. Not sure if it's worth the</div><div class='hunk'>@@ -2118,6 +2131,9 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> </div><div class='ctx'> 	if (chip-&gt;verify_buf(mtd, buf, mtd-&gt;writesize))</div><div class='ctx'> 		return -EIO;</div><div class='add'>+</div><div class='add'>+	/* Make sure the next page prog is preceded by a status read */</div><div class='add'>+	chip-&gt;cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);</div><div class='ctx'> #endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2202,6 +2218,7 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,</div><div class='ctx'> 	uint8_t *oob = ops-&gt;oobbuf;</div><div class='ctx'> 	uint8_t *buf = ops-&gt;datbuf;</div><div class='ctx'> 	int ret, subpage;</div><div class='add'>+	int oob_required = oob ? 1 : 0;</div><div class='ctx'> </div><div class='ctx'> 	ops-&gt;retlen = 0;</div><div class='ctx'> 	if (!writelen)</div><div class='hunk'>@@ -2264,8 +2281,8 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,</div><div class='ctx'> 			memset(chip-&gt;oob_poi, 0xff, mtd-&gt;oobsize);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ret = chip-&gt;write_page(mtd, chip, wbuf, page, cached,</div><div class='del'>-				       (ops-&gt;mode == MTD_OPS_RAW));</div><div class='add'>+		ret = chip-&gt;write_page(mtd, chip, wbuf, oob_required, page,</div><div class='add'>+				       cached, (ops-&gt;mode == MTD_OPS_RAW));</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -2898,8 +2915,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 		*busw = NAND_BUSWIDTH_16;</div><div class='ctx'> </div><div class='ctx'> 	chip-&gt;options &amp;= ~NAND_CHIPOPTIONS_MSK;</div><div class='del'>-	chip-&gt;options |= (NAND_NO_READRDY |</div><div class='del'>-			NAND_NO_AUTOINCR) &amp; NAND_CHIPOPTIONS_MSK;</div><div class='add'>+	chip-&gt;options |= NAND_NO_READRDY &amp; NAND_CHIPOPTIONS_MSK;</div><div class='ctx'> </div><div class='ctx'> 	pr_info("ONFI flash detected\n");</div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -3076,11 +3092,6 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,</div><div class='ctx'> 		chip-&gt;options &amp;= ~NAND_SAMSUNG_LP_OPTIONS;</div><div class='ctx'> ident_done:</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Set chip as a default. Board drivers can override it, if necessary.</div><div class='del'>-	 */</div><div class='del'>-	chip-&gt;options |= NAND_NO_AUTOINCR;</div><div class='del'>-</div><div class='ctx'> 	/* Try to identify manufacturer */</div><div class='ctx'> 	for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {</div><div class='ctx'> 		if (nand_manuf_ids[maf_idx].id == *maf_id)</div><div class='hunk'>@@ -3154,10 +3165,11 @@ ident_done:</div><div class='ctx'> 	if (mtd-&gt;writesize &gt; 512 &amp;&amp; chip-&gt;cmdfunc == nand_command)</div><div class='ctx'> 		chip-&gt;cmdfunc = nand_command_lp;</div><div class='ctx'> </div><div class='del'>-	pr_info("NAND device: Manufacturer ID:"</div><div class='del'>-		" 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, *dev_id,</div><div class='del'>-		nand_manuf_ids[maf_idx].name,</div><div class='del'>-		chip-&gt;onfi_version ? chip-&gt;onfi_params.model : type-&gt;name);</div><div class='add'>+	pr_info("NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s),"</div><div class='add'>+		" page size: %d, OOB size: %d\n",</div><div class='add'>+		*maf_id, *dev_id, nand_manuf_ids[maf_idx].name,</div><div class='add'>+		chip-&gt;onfi_version ? chip-&gt;onfi_params.model : type-&gt;name,</div><div class='add'>+		mtd-&gt;writesize, mtd-&gt;oobsize);</div><div class='ctx'> </div><div class='ctx'> 	return type;</div><div class='ctx'> }</div><div class='hunk'>@@ -3329,8 +3341,13 @@ int nand_scan_tail(struct mtd_info *mtd)</div><div class='ctx'> 		if (!chip-&gt;ecc.write_oob)</div><div class='ctx'> 			chip-&gt;ecc.write_oob = nand_write_oob_syndrome;</div><div class='ctx'> </div><div class='del'>-		if (mtd-&gt;writesize &gt;= chip-&gt;ecc.size)</div><div class='add'>+		if (mtd-&gt;writesize &gt;= chip-&gt;ecc.size) {</div><div class='add'>+			if (!chip-&gt;ecc.strength) {</div><div class='add'>+				pr_warn("Driver must set ecc.strength when using hardware ECC\n");</div><div class='add'>+				BUG();</div><div class='add'>+			}</div><div class='ctx'> 			break;</div><div class='add'>+		}</div><div class='ctx'> 		pr_warn("%d byte HW ECC not possible on "</div><div class='ctx'> 			   "%d byte page size, fallback to SW ECC\n",</div><div class='ctx'> 			   chip-&gt;ecc.size, mtd-&gt;writesize);</div><div class='hunk'>@@ -3385,7 +3402,7 @@ int nand_scan_tail(struct mtd_info *mtd)</div><div class='ctx'> 			BUG();</div><div class='ctx'> 		}</div><div class='ctx'> 		chip-&gt;ecc.strength =</div><div class='del'>-			chip-&gt;ecc.bytes*8 / fls(8*chip-&gt;ecc.size);</div><div class='add'>+			chip-&gt;ecc.bytes * 8 / fls(8 * chip-&gt;ecc.size);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case NAND_ECC_NONE:</div><div class='hunk'>@@ -3483,7 +3500,7 @@ int nand_scan_tail(struct mtd_info *mtd)</div><div class='ctx'> </div><div class='ctx'> 	/* propagate ecc info to mtd_info */</div><div class='ctx'> 	mtd-&gt;ecclayout = chip-&gt;ecc.layout;</div><div class='del'>-	mtd-&gt;ecc_strength = chip-&gt;ecc.strength * chip-&gt;ecc.steps;</div><div class='add'>+	mtd-&gt;ecc_strength = chip-&gt;ecc.strength;</div><div class='ctx'> </div><div class='ctx'> 	/* Check, if we should skip the bad block table scan */</div><div class='ctx'> 	if (chip-&gt;options &amp; NAND_SKIP_BBTSCAN)</div><div class='head'>diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c<br/>index 20a112f591fe..30d1319ff065 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/nand_bbt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/nand_bbt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/nand_bbt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/nand_bbt.c</a></div><div class='hunk'>@@ -324,6 +324,7 @@ static int scan_read_raw_oob(struct mtd_info *mtd, uint8_t *buf, loff_t offs,</div><div class='ctx'> </div><div class='ctx'> 		buf += mtd-&gt;oobsize + mtd-&gt;writesize;</div><div class='ctx'> 		len -= mtd-&gt;writesize;</div><div class='add'>+		offs += mtd-&gt;writesize;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c<br/>index af4fe8ca7b5e..621b70b7a159 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/nand_ids.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/nand_ids.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/nand_ids.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/nand_ids.c</a></div><div class='hunk'>@@ -70,7 +70,7 @@ struct nand_flash_dev nand_flash_ids[] = {</div><div class='ctx'> 	 * These are the new chips with large page size. The pagesize and the</div><div class='ctx'> 	 * erasesize is determined from the extended id bytes</div><div class='ctx'> 	 */</div><div class='del'>-#define LP_OPTIONS (NAND_SAMSUNG_LP_OPTIONS | NAND_NO_READRDY | NAND_NO_AUTOINCR)</div><div class='add'>+#define LP_OPTIONS (NAND_SAMSUNG_LP_OPTIONS | NAND_NO_READRDY)</div><div class='ctx'> #define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)</div><div class='ctx'> </div><div class='ctx'> 	/* 512 Megabit */</div><div class='hunk'>@@ -157,9 +157,7 @@ struct nand_flash_dev nand_flash_ids[] = {</div><div class='ctx'> 	 * writes possible, but not implemented now</div><div class='ctx'> 	 */</div><div class='ctx'> 	{"AND 128MiB 3,3V 8-bit",	0x01, 2048, 128, 0x4000,</div><div class='del'>-	 NAND_IS_AND | NAND_NO_AUTOINCR |NAND_NO_READRDY | NAND_4PAGE_ARRAY |</div><div class='del'>-	 BBT_AUTO_REFRESH</div><div class='del'>-	},</div><div class='add'>+	 NAND_IS_AND | NAND_NO_READRDY | NAND_4PAGE_ARRAY | BBT_AUTO_REFRESH},</div><div class='ctx'> </div><div class='ctx'> 	{NULL,}</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c<br/>index 261f478f8cc3..6cc8fbfabb8e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/nandsim.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/nandsim.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/nandsim.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/nandsim.c</a></div><div class='hunk'>@@ -268,7 +268,6 @@ MODULE_PARM_DESC(bch,		 "Enable BCH ecc and set how many bits should "</div><div class='ctx'> #define OPT_PAGE512      0x00000002 /* 512-byte  page chips */</div><div class='ctx'> #define OPT_PAGE2048     0x00000008 /* 2048-byte page chips */</div><div class='ctx'> #define OPT_SMARTMEDIA   0x00000010 /* SmartMedia technology chips */</div><div class='del'>-#define OPT_AUTOINCR     0x00000020 /* page number auto incrementation is possible */</div><div class='ctx'> #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */</div><div class='ctx'> #define OPT_PAGE4096     0x00000080 /* 4096-byte page chips */</div><div class='ctx'> #define OPT_LARGEPAGE    (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 &amp; 4096-byte page chips */</div><div class='hunk'>@@ -594,7 +593,7 @@ static int init_nandsim(struct mtd_info *mtd)</div><div class='ctx'> 		ns-&gt;options |= OPT_PAGE256;</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (ns-&gt;geom.pgsz == 512) {</div><div class='del'>-		ns-&gt;options |= (OPT_PAGE512 | OPT_AUTOINCR);</div><div class='add'>+		ns-&gt;options |= OPT_PAGE512;</div><div class='ctx'> 		if (ns-&gt;busw == 8)</div><div class='ctx'> 			ns-&gt;options |= OPT_PAGE512_8BIT;</div><div class='ctx'> 	} else if (ns-&gt;geom.pgsz == 2048) {</div><div class='hunk'>@@ -663,8 +662,6 @@ static int init_nandsim(struct mtd_info *mtd)</div><div class='ctx'>         for (i = 0; nand_flash_ids[i].name != NULL; i++) {</div><div class='ctx'>                 if (second_id_byte != nand_flash_ids[i].id)</div><div class='ctx'>                         continue;</div><div class='del'>-		if (!(nand_flash_ids[i].options &amp; NAND_NO_AUTOINCR))</div><div class='del'>-			ns-&gt;options |= OPT_AUTOINCR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ns-&gt;busw == 16)</div><div class='hunk'>@@ -1936,20 +1933,8 @@ static u_char ns_nand_read_byte(struct mtd_info *mtd)</div><div class='ctx'> 	if (ns-&gt;regs.count == ns-&gt;regs.num) {</div><div class='ctx'> 		NS_DBG("read_byte: all bytes were read\n");</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * The OPT_AUTOINCR allows to read next consecutive pages without</div><div class='del'>-		 * new read operation cycle.</div><div class='del'>-		 */</div><div class='del'>-		if ((ns-&gt;options &amp; OPT_AUTOINCR) &amp;&amp; NS_STATE(ns-&gt;state) == STATE_DATAOUT) {</div><div class='del'>-			ns-&gt;regs.count = 0;</div><div class='del'>-			if (ns-&gt;regs.row + 1 &lt; ns-&gt;geom.pgnum)</div><div class='del'>-				ns-&gt;regs.row += 1;</div><div class='del'>-			NS_DBG("read_byte: switch to the next page (%#x)\n", ns-&gt;regs.row);</div><div class='del'>-			do_state_action(ns, ACTION_CPY);</div><div class='del'>-		}</div><div class='del'>-		else if (NS_STATE(ns-&gt;nxstate) == STATE_READY)</div><div class='add'>+		if (NS_STATE(ns-&gt;nxstate) == STATE_READY)</div><div class='ctx'> 			switch_state(ns);</div><div class='del'>-</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return outb;</div><div class='hunk'>@@ -2203,14 +2188,7 @@ static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)</div><div class='ctx'> 	ns-&gt;regs.count += len;</div><div class='ctx'> </div><div class='ctx'> 	if (ns-&gt;regs.count == ns-&gt;regs.num) {</div><div class='del'>-		if ((ns-&gt;options &amp; OPT_AUTOINCR) &amp;&amp; NS_STATE(ns-&gt;state) == STATE_DATAOUT) {</div><div class='del'>-			ns-&gt;regs.count = 0;</div><div class='del'>-			if (ns-&gt;regs.row + 1 &lt; ns-&gt;geom.pgnum)</div><div class='del'>-				ns-&gt;regs.row += 1;</div><div class='del'>-			NS_DBG("read_buf: switch to the next page (%#x)\n", ns-&gt;regs.row);</div><div class='del'>-			do_state_action(ns, ACTION_CPY);</div><div class='del'>-		}</div><div class='del'>-		else if (NS_STATE(ns-&gt;nxstate) == STATE_READY)</div><div class='add'>+		if (NS_STATE(ns-&gt;nxstate) == STATE_READY)</div><div class='ctx'> 			switch_state(ns);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c<br/>index c2b0bba9d8b3..d7f681d0c9b9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/omap2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/omap2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/omap2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/omap2.c</a></div><div class='hunk'>@@ -21,6 +21,10 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MTD_NAND_OMAP_BCH</div><div class='add'>+#include &lt;linux/bch.h&gt;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #include &lt;plat/dma.h&gt;</div><div class='ctx'> #include &lt;plat/gpmc.h&gt;</div><div class='ctx'> #include &lt;plat/nand.h&gt;</div><div class='hunk'>@@ -127,6 +131,11 @@ struct omap_nand_info {</div><div class='ctx'> 	} iomode;</div><div class='ctx'> 	u_char				*buf;</div><div class='ctx'> 	int					buf_len;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MTD_NAND_OMAP_BCH</div><div class='add'>+	struct bch_control             *bch;</div><div class='add'>+	struct nand_ecclayout           ecclayout;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -402,7 +411,7 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,</div><div class='ctx'> 			PREFETCH_FIFOTHRESHOLD_MAX, 0x1, len, is_write);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		/* PFPW engine is busy, use cpu copy method */</div><div class='del'>-		goto out_copy;</div><div class='add'>+		goto out_copy_unmap;</div><div class='ctx'> </div><div class='ctx'> 	init_completion(&amp;info-&gt;comp);</div><div class='ctx'> </div><div class='hunk'>@@ -421,6 +430,8 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,</div><div class='ctx'> 	dma_unmap_single(&amp;info-&gt;pdev-&gt;dev, dma_addr, len, dir);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+out_copy_unmap:</div><div class='add'>+	dma_unmap_single(&amp;info-&gt;pdev-&gt;dev, dma_addr, len, dir);</div><div class='ctx'> out_copy:</div><div class='ctx'> 	if (info-&gt;nand.options &amp; NAND_BUSWIDTH_16)</div><div class='ctx'> 		is_write == 0 ? omap_read_buf16(mtd, (u_char *) addr, len)</div><div class='hunk'>@@ -879,7 +890,7 @@ static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip)</div><div class='ctx'> 	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,</div><div class='ctx'> 							mtd);</div><div class='ctx'> 	unsigned long timeo = jiffies;</div><div class='del'>-	int status = NAND_STATUS_FAIL, state = this-&gt;state;</div><div class='add'>+	int status, state = this-&gt;state;</div><div class='ctx'> </div><div class='ctx'> 	if (state == FL_ERASING)</div><div class='ctx'> 		timeo += (HZ * 400) / 1000;</div><div class='hunk'>@@ -894,6 +905,8 @@ static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip)</div><div class='ctx'> 			break;</div><div class='ctx'> 		cond_resched();</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	status = gpmc_nand_read(info-&gt;gpmc_cs, GPMC_NAND_DATA);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -925,6 +938,226 @@ static int omap_dev_ready(struct mtd_info *mtd)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MTD_NAND_OMAP_BCH</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * omap3_enable_hwecc_bch - Program OMAP3 GPMC to perform BCH ECC correction</div><div class='add'>+ * @mtd: MTD device structure</div><div class='add'>+ * @mode: Read/Write mode</div><div class='add'>+ */</div><div class='add'>+static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)</div><div class='add'>+{</div><div class='add'>+	int nerrors;</div><div class='add'>+	unsigned int dev_width;</div><div class='add'>+	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,</div><div class='add'>+						   mtd);</div><div class='add'>+	struct nand_chip *chip = mtd-&gt;priv;</div><div class='add'>+</div><div class='add'>+	nerrors = (info-&gt;nand.ecc.bytes == 13) ? 8 : 4;</div><div class='add'>+	dev_width = (chip-&gt;options &amp; NAND_BUSWIDTH_16) ? 1 : 0;</div><div class='add'>+	/*</div><div class='add'>+	 * Program GPMC to perform correction on one 512-byte sector at a time.</div><div class='add'>+	 * Using 4 sectors at a time (i.e. ecc.size = 2048) is also possible and</div><div class='add'>+	 * gives a slight (5%) performance gain (but requires additional code).</div><div class='add'>+	 */</div><div class='add'>+	(void)gpmc_enable_hwecc_bch(info-&gt;gpmc_cs, mode, dev_width, 1, nerrors);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * omap3_calculate_ecc_bch4 - Generate 7 bytes of ECC bytes</div><div class='add'>+ * @mtd: MTD device structure</div><div class='add'>+ * @dat: The pointer to data on which ecc is computed</div><div class='add'>+ * @ecc_code: The ecc_code buffer</div><div class='add'>+ */</div><div class='add'>+static int omap3_calculate_ecc_bch4(struct mtd_info *mtd, const u_char *dat,</div><div class='add'>+				    u_char *ecc_code)</div><div class='add'>+{</div><div class='add'>+	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,</div><div class='add'>+						   mtd);</div><div class='add'>+	return gpmc_calculate_ecc_bch4(info-&gt;gpmc_cs, dat, ecc_code);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * omap3_calculate_ecc_bch8 - Generate 13 bytes of ECC bytes</div><div class='add'>+ * @mtd: MTD device structure</div><div class='add'>+ * @dat: The pointer to data on which ecc is computed</div><div class='add'>+ * @ecc_code: The ecc_code buffer</div><div class='add'>+ */</div><div class='add'>+static int omap3_calculate_ecc_bch8(struct mtd_info *mtd, const u_char *dat,</div><div class='add'>+				    u_char *ecc_code)</div><div class='add'>+{</div><div class='add'>+	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,</div><div class='add'>+						   mtd);</div><div class='add'>+	return gpmc_calculate_ecc_bch8(info-&gt;gpmc_cs, dat, ecc_code);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * omap3_correct_data_bch - Decode received data and correct errors</div><div class='add'>+ * @mtd: MTD device structure</div><div class='add'>+ * @data: page data</div><div class='add'>+ * @read_ecc: ecc read from nand flash</div><div class='add'>+ * @calc_ecc: ecc read from HW ECC registers</div><div class='add'>+ */</div><div class='add'>+static int omap3_correct_data_bch(struct mtd_info *mtd, u_char *data,</div><div class='add'>+				  u_char *read_ecc, u_char *calc_ecc)</div><div class='add'>+{</div><div class='add'>+	int i, count;</div><div class='add'>+	/* cannot correct more than 8 errors */</div><div class='add'>+	unsigned int errloc[8];</div><div class='add'>+	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,</div><div class='add'>+						   mtd);</div><div class='add'>+</div><div class='add'>+	count = decode_bch(info-&gt;bch, NULL, 512, read_ecc, calc_ecc, NULL,</div><div class='add'>+			   errloc);</div><div class='add'>+	if (count &gt; 0) {</div><div class='add'>+		/* correct errors */</div><div class='add'>+		for (i = 0; i &lt; count; i++) {</div><div class='add'>+			/* correct data only, not ecc bytes */</div><div class='add'>+			if (errloc[i] &lt; 8*512)</div><div class='add'>+				data[errloc[i]/8] ^= 1 &lt;&lt; (errloc[i] &amp; 7);</div><div class='add'>+			pr_debug("corrected bitflip %u\n", errloc[i]);</div><div class='add'>+		}</div><div class='add'>+	} else if (count &lt; 0) {</div><div class='add'>+		pr_err("ecc unrecoverable error\n");</div><div class='add'>+	}</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * omap3_free_bch - Release BCH ecc resources</div><div class='add'>+ * @mtd: MTD device structure</div><div class='add'>+ */</div><div class='add'>+static void omap3_free_bch(struct mtd_info *mtd)</div><div class='add'>+{</div><div class='add'>+	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,</div><div class='add'>+						   mtd);</div><div class='add'>+	if (info-&gt;bch) {</div><div class='add'>+		free_bch(info-&gt;bch);</div><div class='add'>+		info-&gt;bch = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * omap3_init_bch - Initialize BCH ECC</div><div class='add'>+ * @mtd: MTD device structure</div><div class='add'>+ * @ecc_opt: OMAP ECC mode (OMAP_ECC_BCH4_CODE_HW or OMAP_ECC_BCH8_CODE_HW)</div><div class='add'>+ */</div><div class='add'>+static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)</div><div class='add'>+{</div><div class='add'>+	int ret, max_errors;</div><div class='add'>+	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,</div><div class='add'>+						   mtd);</div><div class='add'>+#ifdef CONFIG_MTD_NAND_OMAP_BCH8</div><div class='add'>+	const int hw_errors = 8;</div><div class='add'>+#else</div><div class='add'>+	const int hw_errors = 4;</div><div class='add'>+#endif</div><div class='add'>+	info-&gt;bch = NULL;</div><div class='add'>+</div><div class='add'>+	max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ? 8 : 4;</div><div class='add'>+	if (max_errors != hw_errors) {</div><div class='add'>+		pr_err("cannot configure %d-bit BCH ecc, only %d-bit supported",</div><div class='add'>+		       max_errors, hw_errors);</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* initialize GPMC BCH engine */</div><div class='add'>+	ret = gpmc_init_hwecc_bch(info-&gt;gpmc_cs, 1, max_errors);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	/* software bch library is only used to detect and locate errors */</div><div class='add'>+	info-&gt;bch = init_bch(13, max_errors, 0x201b /* hw polynomial */);</div><div class='add'>+	if (!info-&gt;bch)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	info-&gt;nand.ecc.size    = 512;</div><div class='add'>+	info-&gt;nand.ecc.hwctl   = omap3_enable_hwecc_bch;</div><div class='add'>+	info-&gt;nand.ecc.correct = omap3_correct_data_bch;</div><div class='add'>+	info-&gt;nand.ecc.mode    = NAND_ECC_HW;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The number of corrected errors in an ecc block that will trigger</div><div class='add'>+	 * block scrubbing defaults to the ecc strength (4 or 8).</div><div class='add'>+	 * Set mtd-&gt;bitflip_threshold here to define a custom threshold.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (max_errors == 8) {</div><div class='add'>+		info-&gt;nand.ecc.strength  = 8;</div><div class='add'>+		info-&gt;nand.ecc.bytes     = 13;</div><div class='add'>+		info-&gt;nand.ecc.calculate = omap3_calculate_ecc_bch8;</div><div class='add'>+	} else {</div><div class='add'>+		info-&gt;nand.ecc.strength  = 4;</div><div class='add'>+		info-&gt;nand.ecc.bytes     = 7;</div><div class='add'>+		info-&gt;nand.ecc.calculate = omap3_calculate_ecc_bch4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_info("enabling NAND BCH ecc with %d-bit correction\n", max_errors);</div><div class='add'>+	return 0;</div><div class='add'>+fail:</div><div class='add'>+	omap3_free_bch(mtd);</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * omap3_init_bch_tail - Build an oob layout for BCH ECC correction.</div><div class='add'>+ * @mtd: MTD device structure</div><div class='add'>+ */</div><div class='add'>+static int omap3_init_bch_tail(struct mtd_info *mtd)</div><div class='add'>+{</div><div class='add'>+	int i, steps;</div><div class='add'>+	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,</div><div class='add'>+						   mtd);</div><div class='add'>+	struct nand_ecclayout *layout = &amp;info-&gt;ecclayout;</div><div class='add'>+</div><div class='add'>+	/* build oob layout */</div><div class='add'>+	steps = mtd-&gt;writesize/info-&gt;nand.ecc.size;</div><div class='add'>+	layout-&gt;eccbytes = steps*info-&gt;nand.ecc.bytes;</div><div class='add'>+</div><div class='add'>+	/* do not bother creating special oob layouts for small page devices */</div><div class='add'>+	if (mtd-&gt;oobsize &lt; 64) {</div><div class='add'>+		pr_err("BCH ecc is not supported on small page devices\n");</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* reserve 2 bytes for bad block marker */</div><div class='add'>+	if (layout-&gt;eccbytes+2 &gt; mtd-&gt;oobsize) {</div><div class='add'>+		pr_err("no oob layout available for oobsize %d eccbytes %u\n",</div><div class='add'>+		       mtd-&gt;oobsize, layout-&gt;eccbytes);</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* put ecc bytes at oob tail */</div><div class='add'>+	for (i = 0; i &lt; layout-&gt;eccbytes; i++)</div><div class='add'>+		layout-&gt;eccpos[i] = mtd-&gt;oobsize-layout-&gt;eccbytes+i;</div><div class='add'>+</div><div class='add'>+	layout-&gt;oobfree[0].offset = 2;</div><div class='add'>+	layout-&gt;oobfree[0].length = mtd-&gt;oobsize-2-layout-&gt;eccbytes;</div><div class='add'>+	info-&gt;nand.ecc.layout = layout;</div><div class='add'>+</div><div class='add'>+	if (!(info-&gt;nand.options &amp; NAND_BUSWIDTH_16))</div><div class='add'>+		info-&gt;nand.badblock_pattern = &amp;bb_descrip_flashbased;</div><div class='add'>+	return 0;</div><div class='add'>+fail:</div><div class='add'>+	omap3_free_bch(mtd);</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)</div><div class='add'>+{</div><div class='add'>+	pr_err("CONFIG_MTD_NAND_OMAP_BCH is not enabled\n");</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+static int omap3_init_bch_tail(struct mtd_info *mtd)</div><div class='add'>+{</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+static void omap3_free_bch(struct mtd_info *mtd)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_MTD_NAND_OMAP_BCH */</div><div class='add'>+</div><div class='ctx'> static int __devinit omap_nand_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct omap_nand_info		*info;</div><div class='hunk'>@@ -1063,6 +1296,13 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)</div><div class='ctx'> 		info-&gt;nand.ecc.hwctl            = omap_enable_hwecc;</div><div class='ctx'> 		info-&gt;nand.ecc.correct          = omap_correct_data;</div><div class='ctx'> 		info-&gt;nand.ecc.mode             = NAND_ECC_HW;</div><div class='add'>+	} else if ((pdata-&gt;ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||</div><div class='add'>+		   (pdata-&gt;ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {</div><div class='add'>+		err = omap3_init_bch(&amp;info-&gt;mtd, pdata-&gt;ecc_opt);</div><div class='add'>+		if (err) {</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto out_release_mem_region;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* DIP switches on some boards change between 8 and 16 bit</div><div class='hunk'>@@ -1094,6 +1334,14 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)</div><div class='ctx'> 					(offset + omap_oobinfo.eccbytes);</div><div class='ctx'> </div><div class='ctx'> 		info-&gt;nand.ecc.layout = &amp;omap_oobinfo;</div><div class='add'>+	} else if ((pdata-&gt;ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||</div><div class='add'>+		   (pdata-&gt;ecc_opt == OMAP_ECC_BCH8_CODE_HW)) {</div><div class='add'>+		/* build OOB layout for BCH ECC correction */</div><div class='add'>+		err = omap3_init_bch_tail(&amp;info-&gt;mtd);</div><div class='add'>+		if (err) {</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto out_release_mem_region;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* second phase scan */</div><div class='hunk'>@@ -1122,6 +1370,7 @@ static int omap_nand_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct mtd_info *mtd = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,</div><div class='ctx'> 							mtd);</div><div class='add'>+	omap3_free_bch(&amp;info-&gt;mtd);</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> 	if (info-&gt;dma_ch != -1)</div><div class='head'>diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c<br/>index 1d3bfb26080c..513dc88a05ca 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/orion_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/orion_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/orion_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/orion_nand.c</a></div><div class='hunk'>@@ -13,9 +13,12 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/mtd.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/nand.h&gt;</div><div class='ctx'> #include &lt;linux/mtd/partitions.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/sizes.h&gt;</div><div class='ctx'> #include &lt;mach/hardware.h&gt;</div><div class='hunk'>@@ -74,11 +77,14 @@ static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)</div><div class='ctx'> static int __init orion_nand_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtd_info *mtd;</div><div class='add'>+	struct mtd_part_parser_data ppdata = {};</div><div class='ctx'> 	struct nand_chip *nc;</div><div class='ctx'> 	struct orion_nand_data *board;</div><div class='ctx'> 	struct resource *res;</div><div class='add'>+	struct clk *clk;</div><div class='ctx'> 	void __iomem *io_base;</div><div class='ctx'> 	int ret = 0;</div><div class='add'>+	u32 val = 0;</div><div class='ctx'> </div><div class='ctx'> 	nc = kzalloc(sizeof(struct nand_chip) + sizeof(struct mtd_info), GFP_KERNEL);</div><div class='ctx'> 	if (!nc) {</div><div class='hunk'>@@ -101,7 +107,32 @@ static int __init orion_nand_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto no_res;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	board = pdev-&gt;dev.platform_data;</div><div class='add'>+	if (pdev-&gt;dev.of_node) {</div><div class='add'>+		board = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct orion_nand_data),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+		if (!board) {</div><div class='add'>+			printk(KERN_ERR "orion_nand: failed to allocate board structure.\n");</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto no_res;</div><div class='add'>+		}</div><div class='add'>+		if (!of_property_read_u32(pdev-&gt;dev.of_node, "cle", &amp;val))</div><div class='add'>+			board-&gt;cle = (u8)val;</div><div class='add'>+		else</div><div class='add'>+			board-&gt;cle = 0;</div><div class='add'>+		if (!of_property_read_u32(pdev-&gt;dev.of_node, "ale", &amp;val))</div><div class='add'>+			board-&gt;ale = (u8)val;</div><div class='add'>+		else</div><div class='add'>+			board-&gt;ale = 1;</div><div class='add'>+		if (!of_property_read_u32(pdev-&gt;dev.of_node,</div><div class='add'>+						"bank-width", &amp;val))</div><div class='add'>+			board-&gt;width = (u8)val * 8;</div><div class='add'>+		else</div><div class='add'>+			board-&gt;width = 8;</div><div class='add'>+		if (!of_property_read_u32(pdev-&gt;dev.of_node,</div><div class='add'>+						"chip-delay", &amp;val))</div><div class='add'>+			board-&gt;chip_delay = (u8)val;</div><div class='add'>+	} else</div><div class='add'>+		board = pdev-&gt;dev.platform_data;</div><div class='ctx'> </div><div class='ctx'> 	mtd-&gt;priv = nc;</div><div class='ctx'> 	mtd-&gt;owner = THIS_MODULE;</div><div class='hunk'>@@ -115,6 +146,10 @@ static int __init orion_nand_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (board-&gt;chip_delay)</div><div class='ctx'> 		nc-&gt;chip_delay = board-&gt;chip_delay;</div><div class='ctx'> </div><div class='add'>+	WARN(board-&gt;width &gt; 16,</div><div class='add'>+		"%d bit bus width out of range",</div><div class='add'>+		board-&gt;width);</div><div class='add'>+</div><div class='ctx'> 	if (board-&gt;width == 16)</div><div class='ctx'> 		nc-&gt;options |= NAND_BUSWIDTH_16;</div><div class='ctx'> </div><div class='hunk'>@@ -123,14 +158,23 @@ static int __init orion_nand_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, mtd);</div><div class='ctx'> </div><div class='add'>+	/* Not all platforms can gate the clock, so it is not</div><div class='add'>+	   an error if the clock does not exists. */</div><div class='add'>+	clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (!IS_ERR(clk)) {</div><div class='add'>+		clk_prepare_enable(clk);</div><div class='add'>+		clk_put(clk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (nand_scan(mtd, 1)) {</div><div class='ctx'> 		ret = -ENXIO;</div><div class='ctx'> 		goto no_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mtd-&gt;name = "orion_nand";</div><div class='del'>-	ret = mtd_device_parse_register(mtd, NULL, NULL, board-&gt;parts,</div><div class='del'>-					board-&gt;nr_parts);</div><div class='add'>+	ppdata.of_node = pdev-&gt;dev.of_node;</div><div class='add'>+	ret = mtd_device_parse_register(mtd, NULL, &amp;ppdata,</div><div class='add'>+			board-&gt;parts, board-&gt;nr_parts);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		nand_release(mtd);</div><div class='ctx'> 		goto no_dev;</div><div class='hunk'>@@ -151,6 +195,7 @@ static int __devexit orion_nand_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtd_info *mtd = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct nand_chip *nc = mtd-&gt;priv;</div><div class='add'>+	struct clk *clk;</div><div class='ctx'> </div><div class='ctx'> 	nand_release(mtd);</div><div class='ctx'> </div><div class='hunk'>@@ -158,14 +203,28 @@ static int __devexit orion_nand_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	kfree(nc);</div><div class='ctx'> </div><div class='add'>+	clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (!IS_ERR(clk)) {</div><div class='add'>+		clk_disable_unprepare(clk);</div><div class='add'>+		clk_put(clk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static struct of_device_id orion_nand_of_match_table[] = {</div><div class='add'>+	{ .compatible = "mrvl,orion-nand", },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct platform_driver orion_nand_driver = {</div><div class='ctx'> 	.remove		= __devexit_p(orion_nand_remove),</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "orion_nand",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='add'>+		.of_match_table = of_match_ptr(orion_nand_of_match_table),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/nand/pasemi_nand.c b/drivers/mtd/nand/pasemi_nand.c<br/>index 974dbf8251c9..1440e51cedcc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/pasemi_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/pasemi_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/pasemi_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/pasemi_nand.c</a></div><div class='hunk'>@@ -155,7 +155,6 @@ static int __devinit pasemi_nand_probe(struct platform_device *ofdev)</div><div class='ctx'> 	chip-&gt;ecc.mode = NAND_ECC_SOFT;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable the following for a flash based bad block table */</div><div class='del'>-	chip-&gt;options = NAND_NO_AUTOINCR;</div><div class='ctx'> 	chip-&gt;bbt_options = NAND_BBT_USE_FLASH;</div><div class='ctx'> </div><div class='ctx'> 	/* Scan to find existence of the device */</div><div class='head'>diff --git a/drivers/mtd/nand/plat_nand.c b/drivers/mtd/nand/plat_nand.c<br/>index 6404e6e81b10..1bcb52040422 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/plat_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/plat_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/plat_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/plat_nand.c</a></div><div class='hunk'>@@ -23,14 +23,18 @@ struct plat_nand_data {</div><div class='ctx'> 	void __iomem		*io_base;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const char *part_probe_types[] = { "cmdlinepart", NULL };</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Probe for the NAND device.</div><div class='ctx'>  */</div><div class='ctx'> static int __devinit plat_nand_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_nand_data *pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct mtd_part_parser_data ppdata;</div><div class='ctx'> 	struct plat_nand_data *data;</div><div class='ctx'> 	struct resource *res;</div><div class='add'>+	const char **part_types;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;chip.nr_chips &lt; 1) {</div><div class='hunk'>@@ -75,6 +79,7 @@ static int __devinit plat_nand_probe(struct platform_device *pdev)</div><div class='ctx'> 	data-&gt;chip.select_chip = pdata-&gt;ctrl.select_chip;</div><div class='ctx'> 	data-&gt;chip.write_buf = pdata-&gt;ctrl.write_buf;</div><div class='ctx'> 	data-&gt;chip.read_buf = pdata-&gt;ctrl.read_buf;</div><div class='add'>+	data-&gt;chip.read_byte = pdata-&gt;ctrl.read_byte;</div><div class='ctx'> 	data-&gt;chip.chip_delay = pdata-&gt;chip.chip_delay;</div><div class='ctx'> 	data-&gt;chip.options |= pdata-&gt;chip.options;</div><div class='ctx'> 	data-&gt;chip.bbt_options |= pdata-&gt;chip.bbt_options;</div><div class='hunk'>@@ -98,8 +103,10 @@ static int __devinit plat_nand_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = mtd_device_parse_register(&amp;data-&gt;mtd,</div><div class='del'>-					pdata-&gt;chip.part_probe_types, NULL,</div><div class='add'>+	part_types = pdata-&gt;chip.part_probe_types ? : part_probe_types;</div><div class='add'>+</div><div class='add'>+	ppdata.of_node = pdev-&gt;dev.of_node;</div><div class='add'>+	err = mtd_device_parse_register(&amp;data-&gt;mtd, part_types, &amp;ppdata,</div><div class='ctx'> 					pdata-&gt;chip.partitions,</div><div class='ctx'> 					pdata-&gt;chip.nr_partitions);</div><div class='ctx'> </div><div class='hunk'>@@ -140,12 +147,19 @@ static int __devexit plat_nand_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct of_device_id plat_nand_match[] = {</div><div class='add'>+	{ .compatible = "gen_nand" },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, plat_nand_match);</div><div class='add'>+</div><div class='ctx'> static struct platform_driver plat_nand_driver = {</div><div class='del'>-	.probe		= plat_nand_probe,</div><div class='del'>-	.remove		= __devexit_p(plat_nand_remove),</div><div class='del'>-	.driver		= {</div><div class='del'>-		.name	= "gen_nand",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='add'>+	.probe	= plat_nand_probe,</div><div class='add'>+	.remove	= __devexit_p(plat_nand_remove),</div><div class='add'>+	.driver	= {</div><div class='add'>+		.name		= "gen_nand",</div><div class='add'>+		.owner		= THIS_MODULE,</div><div class='add'>+		.of_match_table = plat_nand_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c<br/>index def50caa6f84..252aaefcacfa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/pxa3xx_nand.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/pxa3xx_nand.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/pxa3xx_nand.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/pxa3xx_nand.c</a></div><div class='hunk'>@@ -682,14 +682,15 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pxa3xx_nand_write_page_hwecc(struct mtd_info *mtd,</div><div class='del'>-		struct nand_chip *chip, const uint8_t *buf)</div><div class='add'>+		struct nand_chip *chip, const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	chip-&gt;write_buf(mtd, buf, mtd-&gt;writesize);</div><div class='ctx'> 	chip-&gt;write_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pxa3xx_nand_read_page_hwecc(struct mtd_info *mtd,</div><div class='del'>-		struct nand_chip *chip, uint8_t *buf, int page)</div><div class='add'>+		struct nand_chip *chip, uint8_t *buf, int oob_required,</div><div class='add'>+		int page)</div><div class='ctx'> {</div><div class='ctx'> 	struct pxa3xx_nand_host *host = mtd-&gt;priv;</div><div class='ctx'> 	struct pxa3xx_nand_info *info = host-&gt;info_data;</div><div class='hunk'>@@ -1004,7 +1005,6 @@ KEEP_CONFIG:</div><div class='ctx'> 	chip-&gt;ecc.size = host-&gt;page_size;</div><div class='ctx'> 	chip-&gt;ecc.strength = 1;</div><div class='ctx'> </div><div class='del'>-	chip-&gt;options = NAND_NO_AUTOINCR;</div><div class='ctx'> 	chip-&gt;options |= NAND_NO_READRDY;</div><div class='ctx'> 	if (host-&gt;reg_ndcr &amp; NDCR_DWIDTH_M)</div><div class='ctx'> 		chip-&gt;options |= NAND_BUSWIDTH_16;</div><div class='head'>diff --git a/drivers/mtd/nand/r852.c b/drivers/mtd/nand/r852.c<br/>index c2040187c813..8cb627751c9c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/r852.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/r852.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/r852.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/r852.c</a></div><div class='hunk'>@@ -539,14 +539,11 @@ exit:</div><div class='ctx'>  * nand_read_oob_syndrome assumes we can send column address - we can't</div><div class='ctx'>  */</div><div class='ctx'> static int r852_read_oob(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-			     int page, int sndcmd)</div><div class='add'>+			     int page)</div><div class='ctx'> {</div><div class='del'>-	if (sndcmd) {</div><div class='del'>-		chip-&gt;cmdfunc(mtd, NAND_CMD_READOOB, 0, page);</div><div class='del'>-		sndcmd = 0;</div><div class='del'>-	}</div><div class='add'>+	chip-&gt;cmdfunc(mtd, NAND_CMD_READOOB, 0, page);</div><div class='ctx'> 	chip-&gt;read_buf(mtd, chip-&gt;oob_poi, mtd-&gt;oobsize);</div><div class='del'>-	return sndcmd;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1104,18 +1101,7 @@ static struct pci_driver r852_pci_driver = {</div><div class='ctx'> 	.driver.pm	= &amp;r852_pm_ops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static __init int r852_module_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;r852_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit r852_module_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;r852_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(r852_module_init);</div><div class='del'>-module_exit(r852_module_exit);</div><div class='add'>+module_pci_driver(r852_pci_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Maxim Levitsky &lt;maximlevitsky@gmail.com&gt;");</div><div class='head'>diff --git a/drivers/mtd/nand/sh_flctl.c b/drivers/mtd/nand/sh_flctl.c<br/>index e9b2b260de3a..aa9b8a5e0b8f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/sh_flctl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/sh_flctl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/sh_flctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/sh_flctl.c</a></div><div class='hunk'>@@ -344,7 +344,7 @@ static void set_cmd_regs(struct mtd_info *mtd, uint32_t cmd, uint32_t flcmcdr_va</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int flctl_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				uint8_t *buf, int page)</div><div class='add'>+				uint8_t *buf, int oob_required, int page)</div><div class='ctx'> {</div><div class='ctx'> 	int i, eccsize = chip-&gt;ecc.size;</div><div class='ctx'> 	int eccbytes = chip-&gt;ecc.bytes;</div><div class='hunk'>@@ -359,14 +359,14 @@ static int flctl_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='ctx'> 		if (flctl-&gt;hwecc_cant_correct[i])</div><div class='ctx'> 			mtd-&gt;ecc_stats.failed++;</div><div class='ctx'> 		else</div><div class='del'>-			mtd-&gt;ecc_stats.corrected += 0;</div><div class='add'>+			mtd-&gt;ecc_stats.corrected += 0; /* FIXME */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void flctl_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,</div><div class='del'>-				   const uint8_t *buf)</div><div class='add'>+				   const uint8_t *buf, int oob_required)</div><div class='ctx'> {</div><div class='ctx'> 	int i, eccsize = chip-&gt;ecc.size;</div><div class='ctx'> 	int eccbytes = chip-&gt;ecc.bytes;</div><div class='hunk'>@@ -881,8 +881,6 @@ static int __devinit flctl_probe(struct platform_device *pdev)</div><div class='ctx'> 	flctl-&gt;hwecc = pdata-&gt;has_hwecc;</div><div class='ctx'> 	flctl-&gt;holden = pdata-&gt;use_holden;</div><div class='ctx'> </div><div class='del'>-	nand-&gt;options = NAND_NO_AUTOINCR;</div><div class='del'>-</div><div class='ctx'> 	/* Set address of hardware control function */</div><div class='ctx'> 	/* 20 us command delay time */</div><div class='ctx'> 	nand-&gt;chip_delay = 20;</div><div class='head'>diff --git a/drivers/mtd/nand/sm_common.c b/drivers/mtd/nand/sm_common.c<br/>index 774c3c266713..082bcdcd6bcf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/nand/sm_common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/nand/sm_common.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/nand/sm_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/nand/sm_common.c</a></div><div class='hunk'>@@ -94,17 +94,16 @@ static struct nand_flash_dev nand_smartmedia_flash_ids[] = {</div><div class='ctx'> 	{NULL,}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define XD_TYPEM       (NAND_NO_AUTOINCR | NAND_BROKEN_XD)</div><div class='ctx'> static struct nand_flash_dev nand_xd_flash_ids[] = {</div><div class='ctx'> </div><div class='ctx'> 	{"xD 16MiB 3,3V",    0x73, 512, 16, 0x4000, 0},</div><div class='ctx'> 	{"xD 32MiB 3,3V",    0x75, 512, 32, 0x4000, 0},</div><div class='ctx'> 	{"xD 64MiB 3,3V",    0x76, 512, 64, 0x4000, 0},</div><div class='ctx'> 	{"xD 128MiB 3,3V",   0x79, 512, 128, 0x4000, 0},</div><div class='del'>-	{"xD 256MiB 3,3V",   0x71, 512, 256, 0x4000, XD_TYPEM},</div><div class='del'>-	{"xD 512MiB 3,3V",   0xdc, 512, 512, 0x4000, XD_TYPEM},</div><div class='del'>-	{"xD 1GiB 3,3V",     0xd3, 512, 1024, 0x4000, XD_TYPEM},</div><div class='del'>-	{"xD 2GiB 3,3V",     0xd5, 512, 2048, 0x4000, XD_TYPEM},</div><div class='add'>+	{"xD 256MiB 3,3V",   0x71, 512, 256, 0x4000, NAND_BROKEN_XD},</div><div class='add'>+	{"xD 512MiB 3,3V",   0xdc, 512, 512, 0x4000, NAND_BROKEN_XD},</div><div class='add'>+	{"xD 1GiB 3,3V",     0xd3, 512, 1024, 0x4000, NAND_BROKEN_XD},</div><div class='add'>+	{"xD 2GiB 3,3V",     0xd5, 512, 2048, 0x4000, NAND_BROKEN_XD},</div><div class='ctx'> 	{NULL,}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c<br/>index b3ce12ef359e..7153e0d27101 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/onenand/onenand_base.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/onenand/onenand_base.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/onenand/onenand_base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/onenand/onenand_base.c</a></div><div class='hunk'>@@ -1201,7 +1201,8 @@ static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 	if (mtd-&gt;ecc_stats.failed - stats.failed)</div><div class='ctx'> 		return -EBADMSG;</div><div class='ctx'> </div><div class='del'>-	return mtd-&gt;ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;</div><div class='add'>+	/* return max bitflips per ecc step; ONENANDs correct 1 bit only */</div><div class='add'>+	return mtd-&gt;ecc_stats.corrected != stats.corrected ? 1 : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1333,7 +1334,8 @@ static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,</div><div class='ctx'> 	if (mtd-&gt;ecc_stats.failed - stats.failed)</div><div class='ctx'> 		return -EBADMSG;</div><div class='ctx'> </div><div class='del'>-	return mtd-&gt;ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;</div><div class='add'>+	/* return max bitflips per ecc step; ONENANDs correct 1 bit only */</div><div class='add'>+	return mtd-&gt;ecc_stats.corrected != stats.corrected ? 1 : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/mtd/ubi/Kconfig b/drivers/mtd/ubi/Kconfig<br/>index 4dcc752a0c0b..738ee8dc16cd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/Kconfig</a></div><div class='hunk'>@@ -52,12 +52,4 @@ config MTD_UBI_GLUEBI</div><div class='ctx'> 	   work on top of UBI. Do not enable this unless you use legacy</div><div class='ctx'> 	   software.</div><div class='ctx'> </div><div class='del'>-config MTD_UBI_DEBUG</div><div class='del'>-	bool "UBI debugging"</div><div class='del'>-	depends on SYSFS</div><div class='del'>-	select DEBUG_FS</div><div class='del'>-	select KALLSYMS</div><div class='del'>-	help</div><div class='del'>-	  This option enables UBI debugging.</div><div class='del'>-</div><div class='ctx'> endif # MTD_UBI</div><div class='head'>diff --git a/drivers/mtd/ubi/Makefile b/drivers/mtd/ubi/Makefile<br/>index c9302a5452b0..a0803ac74712 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/Makefile</a></div><div class='hunk'>@@ -1,7 +1,6 @@</div><div class='ctx'> obj-$(CONFIG_MTD_UBI) += ubi.o</div><div class='ctx'> </div><div class='del'>-ubi-y += vtbl.o vmt.o upd.o build.o cdev.o kapi.o eba.o io.o wl.o scan.o</div><div class='del'>-ubi-y += misc.o</div><div class='add'>+ubi-y += vtbl.o vmt.o upd.o build.o cdev.o kapi.o eba.o io.o wl.o attach.o</div><div class='add'>+ubi-y += misc.o debug.o</div><div class='ctx'> </div><div class='del'>-ubi-$(CONFIG_MTD_UBI_DEBUG) += debug.o</div><div class='ctx'> obj-$(CONFIG_MTD_UBI_GLUEBI) += gluebi.o</div><div class='head'>diff --git a/drivers/mtd/ubi/scan.c b/drivers/mtd/ubi/attach.c<br/>index 12c43b44f815..bd27cbbb4066 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/scan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/scan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/attach.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/attach.c</a></div><div class='hunk'>@@ -19,21 +19,21 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * UBI scanning sub-system.</div><div class='add'>+ * UBI attaching sub-system.</div><div class='ctx'>  *</div><div class='del'>- * This sub-system is responsible for scanning the flash media, checking UBI</div><div class='del'>- * headers and providing complete information about the UBI flash image.</div><div class='add'>+ * This sub-system is responsible for attaching MTD devices and it also</div><div class='add'>+ * implements flash media scanning.</div><div class='ctx'>  *</div><div class='del'>- * The scanning information is represented by a &amp;struct ubi_scan_info' object.</div><div class='del'>- * Information about found volumes is represented by &amp;struct ubi_scan_volume</div><div class='add'>+ * The attaching information is represented by a &amp;struct ubi_attach_info'</div><div class='add'>+ * object. Information about volumes is represented by &amp;struct ubi_ainf_volume</div><div class='ctx'>  * objects which are kept in volume RB-tree with root at the @volumes field.</div><div class='ctx'>  * The RB-tree is indexed by the volume ID.</div><div class='ctx'>  *</div><div class='del'>- * Scanned logical eraseblocks are represented by &amp;struct ubi_scan_leb objects.</div><div class='del'>- * These objects are kept in per-volume RB-trees with the root at the</div><div class='del'>- * corresponding &amp;struct ubi_scan_volume object. To put it differently, we keep</div><div class='del'>- * an RB-tree of per-volume objects and each of these objects is the root of</div><div class='del'>- * RB-tree of per-eraseblock objects.</div><div class='add'>+ * Logical eraseblocks are represented by &amp;struct ubi_ainf_peb objects. These</div><div class='add'>+ * objects are kept in per-volume RB-trees with the root at the corresponding</div><div class='add'>+ * &amp;struct ubi_ainf_volume object. To put it differently, we keep an RB-tree of</div><div class='add'>+ * per-volume objects and each of these objects is the root of RB-tree of</div><div class='add'>+ * per-LEB objects.</div><div class='ctx'>  *</div><div class='ctx'>  * Corrupted physical eraseblocks are put to the @corr list, free physical</div><div class='ctx'>  * eraseblocks are put to the @free list and the physical eraseblock to be</div><div class='hunk'>@@ -51,28 +51,29 @@</div><div class='ctx'>  *</div><div class='ctx'>  * 1. Corruptions caused by power cuts. These are expected corruptions and UBI</div><div class='ctx'>  * tries to handle them gracefully, without printing too many warnings and</div><div class='del'>- * error messages. The idea is that we do not lose important data in these case</div><div class='del'>- * - we may lose only the data which was being written to the media just before</div><div class='del'>- * the power cut happened, and the upper layers (e.g., UBIFS) are supposed to</div><div class='del'>- * handle such data losses (e.g., by using the FS journal).</div><div class='add'>+ * error messages. The idea is that we do not lose important data in these</div><div class='add'>+ * cases - we may lose only the data which were being written to the media just</div><div class='add'>+ * before the power cut happened, and the upper layers (e.g., UBIFS) are</div><div class='add'>+ * supposed to handle such data losses (e.g., by using the FS journal).</div><div class='ctx'>  *</div><div class='ctx'>  * When UBI detects a corruption (CRC-32 mismatch) in a PEB, and it looks like</div><div class='ctx'>  * the reason is a power cut, UBI puts this PEB to the @erase list, and all</div><div class='ctx'>  * PEBs in the @erase list are scheduled for erasure later.</div><div class='ctx'>  *</div><div class='ctx'>  * 2. Unexpected corruptions which are not caused by power cuts. During</div><div class='del'>- * scanning, such PEBs are put to the @corr list and UBI preserves them.</div><div class='add'>+ * attaching, such PEBs are put to the @corr list and UBI preserves them.</div><div class='ctx'>  * Obviously, this lessens the amount of available PEBs, and if at some  point</div><div class='ctx'>  * UBI runs out of free PEBs, it switches to R/O mode. UBI also loudly informs</div><div class='ctx'>  * about such PEBs every time the MTD device is attached.</div><div class='ctx'>  *</div><div class='ctx'>  * However, it is difficult to reliably distinguish between these types of</div><div class='del'>- * corruptions and UBI's strategy is as follows. UBI assumes corruption type 2</div><div class='del'>- * if the VID header is corrupted and the data area does not contain all 0xFFs,</div><div class='del'>- * and there were no bit-flips or integrity errors while reading the data area.</div><div class='del'>- * Otherwise UBI assumes corruption type 1. So the decision criteria are as</div><div class='del'>- * follows.</div><div class='del'>- *   o If the data area contains only 0xFFs, there is no data, and it is safe</div><div class='add'>+ * corruptions and UBI's strategy is as follows (in case of attaching by</div><div class='add'>+ * scanning). UBI assumes corruption type 2 if the VID header is corrupted and</div><div class='add'>+ * the data area does not contain all 0xFFs, and there were no bit-flips or</div><div class='add'>+ * integrity errors (e.g., ECC errors in case of NAND) while reading the data</div><div class='add'>+ * area.  Otherwise UBI assumes corruption type 1. So the decision criteria</div><div class='add'>+ * are as follows.</div><div class='add'>+ *   o If the data area contains only 0xFFs, there are no data, and it is safe</div><div class='ctx'>  *     to just erase this PEB - this is corruption type 1.</div><div class='ctx'>  *   o If the data area has bit-flips or data integrity errors (ECC errors on</div><div class='ctx'>  *     NAND), it is probably a PEB which was being erased when power cut</div><div class='hunk'>@@ -88,11 +89,7 @@</div><div class='ctx'> #include &lt;linux/random.h&gt;</div><div class='ctx'> #include "ubi.h"</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MTD_UBI_DEBUG</div><div class='del'>-static int paranoid_check_si(struct ubi_device *ubi, struct ubi_scan_info *si);</div><div class='del'>-#else</div><div class='del'>-#define paranoid_check_si(ubi, si) 0</div><div class='del'>-#endif</div><div class='add'>+static int self_check_ai(struct ubi_device *ubi, struct ubi_attach_info *ai);</div><div class='ctx'> </div><div class='ctx'> /* Temporary variables used during scanning */</div><div class='ctx'> static struct ubi_ec_hdr *ech;</div><div class='hunk'>@@ -100,13 +97,18 @@ static struct ubi_vid_hdr *vidh;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * add_to_list - add physical eraseblock to a list.</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  * @pnum: physical eraseblock number to add</div><div class='add'>+ * @vol_id: the last used volume id for the PEB</div><div class='add'>+ * @lnum: the last used LEB number for the PEB</div><div class='ctx'>  * @ec: erase counter of the physical eraseblock</div><div class='ctx'>  * @to_head: if not zero, add to the head of the list</div><div class='ctx'>  * @list: the list to add to</div><div class='ctx'>  *</div><div class='del'>- * This function adds physical eraseblock @pnum to free, erase, or alien lists.</div><div class='add'>+ * This function allocates a 'struct ubi_ainf_peb' object for physical</div><div class='add'>+ * eraseblock @pnum and adds it to the "free", "erase", or "alien" lists.</div><div class='add'>+ * It stores the @lnum and @vol_id alongside, which can both be</div><div class='add'>+ * %UBI_UNKNOWN if they are not available, not readable, or not assigned.</div><div class='ctx'>  * If @to_head is not zero, PEB will be added to the head of the list, which</div><div class='ctx'>  * basically means it will be processed first later. E.g., we add corrupted</div><div class='ctx'>  * PEBs (corrupted due to power cuts) to the head of the erase list to make</div><div class='hunk'>@@ -114,65 +116,68 @@ static struct ubi_vid_hdr *vidh;</div><div class='ctx'>  * returns zero in case of success and a negative error code in case of</div><div class='ctx'>  * failure.</div><div class='ctx'>  */</div><div class='del'>-static int add_to_list(struct ubi_scan_info *si, int pnum, int ec, int to_head,</div><div class='del'>-		       struct list_head *list)</div><div class='add'>+static int add_to_list(struct ubi_attach_info *ai, int pnum, int vol_id,</div><div class='add'>+		       int lnum, int ec, int to_head, struct list_head *list)</div><div class='ctx'> {</div><div class='del'>-	struct ubi_scan_leb *seb;</div><div class='add'>+	struct ubi_ainf_peb *aeb;</div><div class='ctx'> </div><div class='del'>-	if (list == &amp;si-&gt;free) {</div><div class='add'>+	if (list == &amp;ai-&gt;free) {</div><div class='ctx'> 		dbg_bld("add to free: PEB %d, EC %d", pnum, ec);</div><div class='del'>-	} else if (list == &amp;si-&gt;erase) {</div><div class='add'>+	} else if (list == &amp;ai-&gt;erase) {</div><div class='ctx'> 		dbg_bld("add to erase: PEB %d, EC %d", pnum, ec);</div><div class='del'>-	} else if (list == &amp;si-&gt;alien) {</div><div class='add'>+	} else if (list == &amp;ai-&gt;alien) {</div><div class='ctx'> 		dbg_bld("add to alien: PEB %d, EC %d", pnum, ec);</div><div class='del'>-		si-&gt;alien_peb_count += 1;</div><div class='add'>+		ai-&gt;alien_peb_count += 1;</div><div class='ctx'> 	} else</div><div class='ctx'> 		BUG();</div><div class='ctx'> </div><div class='del'>-	seb = kmem_cache_alloc(si-&gt;scan_leb_slab, GFP_KERNEL);</div><div class='del'>-	if (!seb)</div><div class='add'>+	aeb = kmem_cache_alloc(ai-&gt;aeb_slab_cache, GFP_KERNEL);</div><div class='add'>+	if (!aeb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	seb-&gt;pnum = pnum;</div><div class='del'>-	seb-&gt;ec = ec;</div><div class='add'>+	aeb-&gt;pnum = pnum;</div><div class='add'>+	aeb-&gt;vol_id = vol_id;</div><div class='add'>+	aeb-&gt;lnum = lnum;</div><div class='add'>+	aeb-&gt;ec = ec;</div><div class='ctx'> 	if (to_head)</div><div class='del'>-		list_add(&amp;seb-&gt;u.list, list);</div><div class='add'>+		list_add(&amp;aeb-&gt;u.list, list);</div><div class='ctx'> 	else</div><div class='del'>-		list_add_tail(&amp;seb-&gt;u.list, list);</div><div class='add'>+		list_add_tail(&amp;aeb-&gt;u.list, list);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * add_corrupted - add a corrupted physical eraseblock.</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  * @pnum: physical eraseblock number to add</div><div class='ctx'>  * @ec: erase counter of the physical eraseblock</div><div class='ctx'>  *</div><div class='del'>- * This function adds corrupted physical eraseblock @pnum to the 'corr' list.</div><div class='del'>- * The corruption was presumably not caused by a power cut. Returns zero in</div><div class='del'>- * case of success and a negative error code in case of failure.</div><div class='add'>+ * This function allocates a 'struct ubi_ainf_peb' object for a corrupted</div><div class='add'>+ * physical eraseblock @pnum and adds it to the 'corr' list.  The corruption</div><div class='add'>+ * was presumably not caused by a power cut. Returns zero in case of success</div><div class='add'>+ * and a negative error code in case of failure.</div><div class='ctx'>  */</div><div class='del'>-static int add_corrupted(struct ubi_scan_info *si, int pnum, int ec)</div><div class='add'>+static int add_corrupted(struct ubi_attach_info *ai, int pnum, int ec)</div><div class='ctx'> {</div><div class='del'>-	struct ubi_scan_leb *seb;</div><div class='add'>+	struct ubi_ainf_peb *aeb;</div><div class='ctx'> </div><div class='ctx'> 	dbg_bld("add to corrupted: PEB %d, EC %d", pnum, ec);</div><div class='ctx'> </div><div class='del'>-	seb = kmem_cache_alloc(si-&gt;scan_leb_slab, GFP_KERNEL);</div><div class='del'>-	if (!seb)</div><div class='add'>+	aeb = kmem_cache_alloc(ai-&gt;aeb_slab_cache, GFP_KERNEL);</div><div class='add'>+	if (!aeb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	si-&gt;corr_peb_count += 1;</div><div class='del'>-	seb-&gt;pnum = pnum;</div><div class='del'>-	seb-&gt;ec = ec;</div><div class='del'>-	list_add(&amp;seb-&gt;u.list, &amp;si-&gt;corr);</div><div class='add'>+	ai-&gt;corr_peb_count += 1;</div><div class='add'>+	aeb-&gt;pnum = pnum;</div><div class='add'>+	aeb-&gt;ec = ec;</div><div class='add'>+	list_add(&amp;aeb-&gt;u.list, &amp;ai-&gt;corr);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * validate_vid_hdr - check volume identifier header.</div><div class='ctx'>  * @vid_hdr: the volume identifier header to check</div><div class='del'>- * @sv: information about the volume this logical eraseblock belongs to</div><div class='add'>+ * @av: information about the volume this logical eraseblock belongs to</div><div class='ctx'>  * @pnum: physical eraseblock number the VID header came from</div><div class='ctx'>  *</div><div class='ctx'>  * This function checks that data stored in @vid_hdr is consistent. Returns</div><div class='hunk'>@@ -184,15 +189,15 @@ static int add_corrupted(struct ubi_scan_info *si, int pnum, int ec)</div><div class='ctx'>  * headers of the same volume.</div><div class='ctx'>  */</div><div class='ctx'> static int validate_vid_hdr(const struct ubi_vid_hdr *vid_hdr,</div><div class='del'>-			    const struct ubi_scan_volume *sv, int pnum)</div><div class='add'>+			    const struct ubi_ainf_volume *av, int pnum)</div><div class='ctx'> {</div><div class='ctx'> 	int vol_type = vid_hdr-&gt;vol_type;</div><div class='ctx'> 	int vol_id = be32_to_cpu(vid_hdr-&gt;vol_id);</div><div class='ctx'> 	int used_ebs = be32_to_cpu(vid_hdr-&gt;used_ebs);</div><div class='ctx'> 	int data_pad = be32_to_cpu(vid_hdr-&gt;data_pad);</div><div class='ctx'> </div><div class='del'>-	if (sv-&gt;leb_count != 0) {</div><div class='del'>-		int sv_vol_type;</div><div class='add'>+	if (av-&gt;leb_count != 0) {</div><div class='add'>+		int av_vol_type;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * This is not the first logical eraseblock belonging to this</div><div class='hunk'>@@ -200,28 +205,28 @@ static int validate_vid_hdr(const struct ubi_vid_hdr *vid_hdr,</div><div class='ctx'> 		 * to the data in previous logical eraseblock headers.</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='del'>-		if (vol_id != sv-&gt;vol_id) {</div><div class='del'>-			dbg_err("inconsistent vol_id");</div><div class='add'>+		if (vol_id != av-&gt;vol_id) {</div><div class='add'>+			ubi_err("inconsistent vol_id");</div><div class='ctx'> 			goto bad;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (sv-&gt;vol_type == UBI_STATIC_VOLUME)</div><div class='del'>-			sv_vol_type = UBI_VID_STATIC;</div><div class='add'>+		if (av-&gt;vol_type == UBI_STATIC_VOLUME)</div><div class='add'>+			av_vol_type = UBI_VID_STATIC;</div><div class='ctx'> 		else</div><div class='del'>-			sv_vol_type = UBI_VID_DYNAMIC;</div><div class='add'>+			av_vol_type = UBI_VID_DYNAMIC;</div><div class='ctx'> </div><div class='del'>-		if (vol_type != sv_vol_type) {</div><div class='del'>-			dbg_err("inconsistent vol_type");</div><div class='add'>+		if (vol_type != av_vol_type) {</div><div class='add'>+			ubi_err("inconsistent vol_type");</div><div class='ctx'> 			goto bad;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (used_ebs != sv-&gt;used_ebs) {</div><div class='del'>-			dbg_err("inconsistent used_ebs");</div><div class='add'>+		if (used_ebs != av-&gt;used_ebs) {</div><div class='add'>+			ubi_err("inconsistent used_ebs");</div><div class='ctx'> 			goto bad;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (data_pad != sv-&gt;data_pad) {</div><div class='del'>-			dbg_err("inconsistent data_pad");</div><div class='add'>+		if (data_pad != av-&gt;data_pad) {</div><div class='add'>+			ubi_err("inconsistent data_pad");</div><div class='ctx'> 			goto bad;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -230,74 +235,74 @@ static int validate_vid_hdr(const struct ubi_vid_hdr *vid_hdr,</div><div class='ctx'> </div><div class='ctx'> bad:</div><div class='ctx'> 	ubi_err("inconsistent VID header at PEB %d", pnum);</div><div class='del'>-	ubi_dbg_dump_vid_hdr(vid_hdr);</div><div class='del'>-	ubi_dbg_dump_sv(sv);</div><div class='add'>+	ubi_dump_vid_hdr(vid_hdr);</div><div class='add'>+	ubi_dump_av(av);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * add_volume - add volume to the scanning information.</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * add_volume - add volume to the attaching information.</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  * @vol_id: ID of the volume to add</div><div class='ctx'>  * @pnum: physical eraseblock number</div><div class='ctx'>  * @vid_hdr: volume identifier header</div><div class='ctx'>  *</div><div class='ctx'>  * If the volume corresponding to the @vid_hdr logical eraseblock is already</div><div class='del'>- * present in the scanning information, this function does nothing. Otherwise</div><div class='del'>- * it adds corresponding volume to the scanning information. Returns a pointer</div><div class='del'>- * to the scanning volume object in case of success and a negative error code</div><div class='del'>- * in case of failure.</div><div class='add'>+ * present in the attaching information, this function does nothing. Otherwise</div><div class='add'>+ * it adds corresponding volume to the attaching information. Returns a pointer</div><div class='add'>+ * to the allocated "av" object in case of success and a negative error code in</div><div class='add'>+ * case of failure.</div><div class='ctx'>  */</div><div class='del'>-static struct ubi_scan_volume *add_volume(struct ubi_scan_info *si, int vol_id,</div><div class='del'>-					  int pnum,</div><div class='add'>+static struct ubi_ainf_volume *add_volume(struct ubi_attach_info *ai,</div><div class='add'>+					  int vol_id, int pnum,</div><div class='ctx'> 					  const struct ubi_vid_hdr *vid_hdr)</div><div class='ctx'> {</div><div class='del'>-	struct ubi_scan_volume *sv;</div><div class='del'>-	struct rb_node **p = &amp;si-&gt;volumes.rb_node, *parent = NULL;</div><div class='add'>+	struct ubi_ainf_volume *av;</div><div class='add'>+	struct rb_node **p = &amp;ai-&gt;volumes.rb_node, *parent = NULL;</div><div class='ctx'> </div><div class='ctx'> 	ubi_assert(vol_id == be32_to_cpu(vid_hdr-&gt;vol_id));</div><div class='ctx'> </div><div class='ctx'> 	/* Walk the volume RB-tree to look if this volume is already present */</div><div class='ctx'> 	while (*p) {</div><div class='ctx'> 		parent = *p;</div><div class='del'>-		sv = rb_entry(parent, struct ubi_scan_volume, rb);</div><div class='add'>+		av = rb_entry(parent, struct ubi_ainf_volume, rb);</div><div class='ctx'> </div><div class='del'>-		if (vol_id == sv-&gt;vol_id)</div><div class='del'>-			return sv;</div><div class='add'>+		if (vol_id == av-&gt;vol_id)</div><div class='add'>+			return av;</div><div class='ctx'> </div><div class='del'>-		if (vol_id &gt; sv-&gt;vol_id)</div><div class='add'>+		if (vol_id &gt; av-&gt;vol_id)</div><div class='ctx'> 			p = &amp;(*p)-&gt;rb_left;</div><div class='ctx'> 		else</div><div class='ctx'> 			p = &amp;(*p)-&gt;rb_right;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* The volume is absent - add it */</div><div class='del'>-	sv = kmalloc(sizeof(struct ubi_scan_volume), GFP_KERNEL);</div><div class='del'>-	if (!sv)</div><div class='add'>+	av = kmalloc(sizeof(struct ubi_ainf_volume), GFP_KERNEL);</div><div class='add'>+	if (!av)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	sv-&gt;highest_lnum = sv-&gt;leb_count = 0;</div><div class='del'>-	sv-&gt;vol_id = vol_id;</div><div class='del'>-	sv-&gt;root = RB_ROOT;</div><div class='del'>-	sv-&gt;used_ebs = be32_to_cpu(vid_hdr-&gt;used_ebs);</div><div class='del'>-	sv-&gt;data_pad = be32_to_cpu(vid_hdr-&gt;data_pad);</div><div class='del'>-	sv-&gt;compat = vid_hdr-&gt;compat;</div><div class='del'>-	sv-&gt;vol_type = vid_hdr-&gt;vol_type == UBI_VID_DYNAMIC ? UBI_DYNAMIC_VOLUME</div><div class='add'>+	av-&gt;highest_lnum = av-&gt;leb_count = 0;</div><div class='add'>+	av-&gt;vol_id = vol_id;</div><div class='add'>+	av-&gt;root = RB_ROOT;</div><div class='add'>+	av-&gt;used_ebs = be32_to_cpu(vid_hdr-&gt;used_ebs);</div><div class='add'>+	av-&gt;data_pad = be32_to_cpu(vid_hdr-&gt;data_pad);</div><div class='add'>+	av-&gt;compat = vid_hdr-&gt;compat;</div><div class='add'>+	av-&gt;vol_type = vid_hdr-&gt;vol_type == UBI_VID_DYNAMIC ? UBI_DYNAMIC_VOLUME</div><div class='ctx'> 							    : UBI_STATIC_VOLUME;</div><div class='del'>-	if (vol_id &gt; si-&gt;highest_vol_id)</div><div class='del'>-		si-&gt;highest_vol_id = vol_id;</div><div class='add'>+	if (vol_id &gt; ai-&gt;highest_vol_id)</div><div class='add'>+		ai-&gt;highest_vol_id = vol_id;</div><div class='ctx'> </div><div class='del'>-	rb_link_node(&amp;sv-&gt;rb, parent, p);</div><div class='del'>-	rb_insert_color(&amp;sv-&gt;rb, &amp;si-&gt;volumes);</div><div class='del'>-	si-&gt;vols_found += 1;</div><div class='add'>+	rb_link_node(&amp;av-&gt;rb, parent, p);</div><div class='add'>+	rb_insert_color(&amp;av-&gt;rb, &amp;ai-&gt;volumes);</div><div class='add'>+	ai-&gt;vols_found += 1;</div><div class='ctx'> 	dbg_bld("added volume %d", vol_id);</div><div class='del'>-	return sv;</div><div class='add'>+	return av;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * compare_lebs - find out which logical eraseblock is newer.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @seb: first logical eraseblock to compare</div><div class='add'>+ * @aeb: first logical eraseblock to compare</div><div class='ctx'>  * @pnum: physical eraseblock number of the second logical eraseblock to</div><div class='ctx'>  * compare</div><div class='ctx'>  * @vid_hdr: volume identifier header of the second logical eraseblock</div><div class='hunk'>@@ -306,7 +311,7 @@ static struct ubi_scan_volume *add_volume(struct ubi_scan_info *si, int vol_id,</div><div class='ctx'>  * case of success this function returns a positive value, in case of failure, a</div><div class='ctx'>  * negative error code is returned. The success return codes use the following</div><div class='ctx'>  * bits:</div><div class='del'>- *     o bit 0 is cleared: the first PEB (described by @seb) is newer than the</div><div class='add'>+ *     o bit 0 is cleared: the first PEB (described by @aeb) is newer than the</div><div class='ctx'>  *       second PEB (described by @pnum and @vid_hdr);</div><div class='ctx'>  *     o bit 0 is set: the second PEB is newer;</div><div class='ctx'>  *     o bit 1 is cleared: no bit-flips were detected in the newer LEB;</div><div class='hunk'>@@ -314,7 +319,7 @@ static struct ubi_scan_volume *add_volume(struct ubi_scan_info *si, int vol_id,</div><div class='ctx'>  *     o bit 2 is cleared: the older LEB is not corrupted;</div><div class='ctx'>  *     o bit 2 is set: the older LEB is corrupted.</div><div class='ctx'>  */</div><div class='del'>-static int compare_lebs(struct ubi_device *ubi, const struct ubi_scan_leb *seb,</div><div class='add'>+static int compare_lebs(struct ubi_device *ubi, const struct ubi_ainf_peb *aeb,</div><div class='ctx'> 			int pnum, const struct ubi_vid_hdr *vid_hdr)</div><div class='ctx'> {</div><div class='ctx'> 	void *buf;</div><div class='hunk'>@@ -323,7 +328,7 @@ static int compare_lebs(struct ubi_device *ubi, const struct ubi_scan_leb *seb,</div><div class='ctx'> 	struct ubi_vid_hdr *vh = NULL;</div><div class='ctx'> 	unsigned long long sqnum2 = be64_to_cpu(vid_hdr-&gt;sqnum);</div><div class='ctx'> </div><div class='del'>-	if (sqnum2 == seb-&gt;sqnum) {</div><div class='add'>+	if (sqnum2 == aeb-&gt;sqnum) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * This must be a really ancient UBI image which has been</div><div class='ctx'> 		 * created before sequence numbers support has been added. At</div><div class='hunk'>@@ -337,7 +342,7 @@ static int compare_lebs(struct ubi_device *ubi, const struct ubi_scan_leb *seb,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Obviously the LEB with lower sequence counter is older */</div><div class='del'>-	second_is_newer = !!(sqnum2 &gt; seb-&gt;sqnum);</div><div class='add'>+	second_is_newer = (sqnum2 &gt; aeb-&gt;sqnum);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Now we know which copy is newer. If the copy flag of the PEB with</div><div class='hunk'>@@ -356,7 +361,7 @@ static int compare_lebs(struct ubi_device *ubi, const struct ubi_scan_leb *seb,</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		if (!seb-&gt;copy_flag) {</div><div class='add'>+		if (!aeb-&gt;copy_flag) {</div><div class='ctx'> 			/* It is not a copy, so it is newer */</div><div class='ctx'> 			dbg_bld("first PEB %d is newer, copy_flag is unset",</div><div class='ctx'> 				pnum);</div><div class='hunk'>@@ -367,13 +372,13 @@ static int compare_lebs(struct ubi_device *ubi, const struct ubi_scan_leb *seb,</div><div class='ctx'> 		if (!vh)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-		pnum = seb-&gt;pnum;</div><div class='add'>+		pnum = aeb-&gt;pnum;</div><div class='ctx'> 		err = ubi_io_read_vid_hdr(ubi, pnum, vh, 0);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			if (err == UBI_IO_BITFLIPS)</div><div class='ctx'> 				bitflips = 1;</div><div class='ctx'> 			else {</div><div class='del'>-				dbg_err("VID of PEB %d header is bad, but it "</div><div class='add'>+				ubi_err("VID of PEB %d header is bad, but it "</div><div class='ctx'> 					"was OK earlier, err %d", pnum, err);</div><div class='ctx'> 				if (err &gt; 0)</div><div class='ctx'> 					err = -EIO;</div><div class='hunk'>@@ -429,9 +434,9 @@ out_free_vidh:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_scan_add_used - add physical eraseblock to the scanning information.</div><div class='add'>+ * ubi_add_to_av - add used physical eraseblock to the attaching information.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  * @pnum: the physical eraseblock number</div><div class='ctx'>  * @ec: erase counter</div><div class='ctx'>  * @vid_hdr: the volume identifier header</div><div class='hunk'>@@ -444,14 +449,13 @@ out_free_vidh:</div><div class='ctx'>  * to be picked, while the older one has to be dropped. This function returns</div><div class='ctx'>  * zero in case of success and a negative error code in case of failure.</div><div class='ctx'>  */</div><div class='del'>-int ubi_scan_add_used(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='del'>-		      int pnum, int ec, const struct ubi_vid_hdr *vid_hdr,</div><div class='del'>-		      int bitflips)</div><div class='add'>+int ubi_add_to_av(struct ubi_device *ubi, struct ubi_attach_info *ai, int pnum,</div><div class='add'>+		  int ec, const struct ubi_vid_hdr *vid_hdr, int bitflips)</div><div class='ctx'> {</div><div class='ctx'> 	int err, vol_id, lnum;</div><div class='ctx'> 	unsigned long long sqnum;</div><div class='del'>-	struct ubi_scan_volume *sv;</div><div class='del'>-	struct ubi_scan_leb *seb;</div><div class='add'>+	struct ubi_ainf_volume *av;</div><div class='add'>+	struct ubi_ainf_peb *aeb;</div><div class='ctx'> 	struct rb_node **p, *parent = NULL;</div><div class='ctx'> </div><div class='ctx'> 	vol_id = be32_to_cpu(vid_hdr-&gt;vol_id);</div><div class='hunk'>@@ -461,25 +465,25 @@ int ubi_scan_add_used(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 	dbg_bld("PEB %d, LEB %d:%d, EC %d, sqnum %llu, bitflips %d",</div><div class='ctx'> 		pnum, vol_id, lnum, ec, sqnum, bitflips);</div><div class='ctx'> </div><div class='del'>-	sv = add_volume(si, vol_id, pnum, vid_hdr);</div><div class='del'>-	if (IS_ERR(sv))</div><div class='del'>-		return PTR_ERR(sv);</div><div class='add'>+	av = add_volume(ai, vol_id, pnum, vid_hdr);</div><div class='add'>+	if (IS_ERR(av))</div><div class='add'>+		return PTR_ERR(av);</div><div class='ctx'> </div><div class='del'>-	if (si-&gt;max_sqnum &lt; sqnum)</div><div class='del'>-		si-&gt;max_sqnum = sqnum;</div><div class='add'>+	if (ai-&gt;max_sqnum &lt; sqnum)</div><div class='add'>+		ai-&gt;max_sqnum = sqnum;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Walk the RB-tree of logical eraseblocks of volume @vol_id to look</div><div class='ctx'> 	 * if this is the first instance of this logical eraseblock or not.</div><div class='ctx'> 	 */</div><div class='del'>-	p = &amp;sv-&gt;root.rb_node;</div><div class='add'>+	p = &amp;av-&gt;root.rb_node;</div><div class='ctx'> 	while (*p) {</div><div class='ctx'> 		int cmp_res;</div><div class='ctx'> </div><div class='ctx'> 		parent = *p;</div><div class='del'>-		seb = rb_entry(parent, struct ubi_scan_leb, u.rb);</div><div class='del'>-		if (lnum != seb-&gt;lnum) {</div><div class='del'>-			if (lnum &lt; seb-&gt;lnum)</div><div class='add'>+		aeb = rb_entry(parent, struct ubi_ainf_peb, u.rb);</div><div class='add'>+		if (lnum != aeb-&gt;lnum) {</div><div class='add'>+			if (lnum &lt; aeb-&gt;lnum)</div><div class='ctx'> 				p = &amp;(*p)-&gt;rb_left;</div><div class='ctx'> 			else</div><div class='ctx'> 				p = &amp;(*p)-&gt;rb_right;</div><div class='hunk'>@@ -491,8 +495,8 @@ int ubi_scan_add_used(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 		 * logical eraseblock present.</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='del'>-		dbg_bld("this LEB already exists: PEB %d, sqnum %llu, "</div><div class='del'>-			"EC %d", seb-&gt;pnum, seb-&gt;sqnum, seb-&gt;ec);</div><div class='add'>+		dbg_bld("this LEB already exists: PEB %d, sqnum %llu, EC %d",</div><div class='add'>+			aeb-&gt;pnum, aeb-&gt;sqnum, aeb-&gt;ec);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Make sure that the logical eraseblocks have different</div><div class='hunk'>@@ -507,11 +511,11 @@ int ubi_scan_add_used(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 		 * images, but refuse attaching old images with duplicated</div><div class='ctx'> 		 * logical eraseblocks because there was an unclean reboot.</div><div class='ctx'> 		 */</div><div class='del'>-		if (seb-&gt;sqnum == sqnum &amp;&amp; sqnum != 0) {</div><div class='add'>+		if (aeb-&gt;sqnum == sqnum &amp;&amp; sqnum != 0) {</div><div class='ctx'> 			ubi_err("two LEBs with same sequence number %llu",</div><div class='ctx'> 				sqnum);</div><div class='del'>-			ubi_dbg_dump_seb(seb, 0);</div><div class='del'>-			ubi_dbg_dump_vid_hdr(vid_hdr);</div><div class='add'>+			ubi_dump_aeb(aeb, 0);</div><div class='add'>+			ubi_dump_vid_hdr(vid_hdr);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -519,7 +523,7 @@ int ubi_scan_add_used(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 		 * Now we have to drop the older one and preserve the newer</div><div class='ctx'> 		 * one.</div><div class='ctx'> 		 */</div><div class='del'>-		cmp_res = compare_lebs(ubi, seb, pnum, vid_hdr);</div><div class='add'>+		cmp_res = compare_lebs(ubi, aeb, pnum, vid_hdr);</div><div class='ctx'> 		if (cmp_res &lt; 0)</div><div class='ctx'> 			return cmp_res;</div><div class='ctx'> </div><div class='hunk'>@@ -528,23 +532,26 @@ int ubi_scan_add_used(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 			 * This logical eraseblock is newer than the one</div><div class='ctx'> 			 * found earlier.</div><div class='ctx'> 			 */</div><div class='del'>-			err = validate_vid_hdr(vid_hdr, sv, pnum);</div><div class='add'>+			err = validate_vid_hdr(vid_hdr, av, pnum);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				return err;</div><div class='ctx'> </div><div class='del'>-			err = add_to_list(si, seb-&gt;pnum, seb-&gt;ec, cmp_res &amp; 4,</div><div class='del'>-					  &amp;si-&gt;erase);</div><div class='add'>+			err = add_to_list(ai, aeb-&gt;pnum, aeb-&gt;vol_id,</div><div class='add'>+					  aeb-&gt;lnum, aeb-&gt;ec, cmp_res &amp; 4,</div><div class='add'>+					  &amp;ai-&gt;erase);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				return err;</div><div class='ctx'> </div><div class='del'>-			seb-&gt;ec = ec;</div><div class='del'>-			seb-&gt;pnum = pnum;</div><div class='del'>-			seb-&gt;scrub = ((cmp_res &amp; 2) || bitflips);</div><div class='del'>-			seb-&gt;copy_flag = vid_hdr-&gt;copy_flag;</div><div class='del'>-			seb-&gt;sqnum = sqnum;</div><div class='add'>+			aeb-&gt;ec = ec;</div><div class='add'>+			aeb-&gt;pnum = pnum;</div><div class='add'>+			aeb-&gt;vol_id = vol_id;</div><div class='add'>+			aeb-&gt;lnum = lnum;</div><div class='add'>+			aeb-&gt;scrub = ((cmp_res &amp; 2) || bitflips);</div><div class='add'>+			aeb-&gt;copy_flag = vid_hdr-&gt;copy_flag;</div><div class='add'>+			aeb-&gt;sqnum = sqnum;</div><div class='ctx'> </div><div class='del'>-			if (sv-&gt;highest_lnum == lnum)</div><div class='del'>-				sv-&gt;last_data_size =</div><div class='add'>+			if (av-&gt;highest_lnum == lnum)</div><div class='add'>+				av-&gt;last_data_size =</div><div class='ctx'> 					be32_to_cpu(vid_hdr-&gt;data_size);</div><div class='ctx'> </div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -553,92 +560,64 @@ int ubi_scan_add_used(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 			 * This logical eraseblock is older than the one found</div><div class='ctx'> 			 * previously.</div><div class='ctx'> 			 */</div><div class='del'>-			return add_to_list(si, pnum, ec, cmp_res &amp; 4,</div><div class='del'>-					   &amp;si-&gt;erase);</div><div class='add'>+			return add_to_list(ai, pnum, vol_id, lnum, ec,</div><div class='add'>+					   cmp_res &amp; 4, &amp;ai-&gt;erase);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We've met this logical eraseblock for the first time, add it to the</div><div class='del'>-	 * scanning information.</div><div class='add'>+	 * attaching information.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	err = validate_vid_hdr(vid_hdr, sv, pnum);</div><div class='add'>+	err = validate_vid_hdr(vid_hdr, av, pnum);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	seb = kmem_cache_alloc(si-&gt;scan_leb_slab, GFP_KERNEL);</div><div class='del'>-	if (!seb)</div><div class='add'>+	aeb = kmem_cache_alloc(ai-&gt;aeb_slab_cache, GFP_KERNEL);</div><div class='add'>+	if (!aeb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	seb-&gt;ec = ec;</div><div class='del'>-	seb-&gt;pnum = pnum;</div><div class='del'>-	seb-&gt;lnum = lnum;</div><div class='del'>-	seb-&gt;scrub = bitflips;</div><div class='del'>-	seb-&gt;copy_flag = vid_hdr-&gt;copy_flag;</div><div class='del'>-	seb-&gt;sqnum = sqnum;</div><div class='del'>-</div><div class='del'>-	if (sv-&gt;highest_lnum &lt;= lnum) {</div><div class='del'>-		sv-&gt;highest_lnum = lnum;</div><div class='del'>-		sv-&gt;last_data_size = be32_to_cpu(vid_hdr-&gt;data_size);</div><div class='add'>+	aeb-&gt;ec = ec;</div><div class='add'>+	aeb-&gt;pnum = pnum;</div><div class='add'>+	aeb-&gt;vol_id = vol_id;</div><div class='add'>+	aeb-&gt;lnum = lnum;</div><div class='add'>+	aeb-&gt;scrub = bitflips;</div><div class='add'>+	aeb-&gt;copy_flag = vid_hdr-&gt;copy_flag;</div><div class='add'>+	aeb-&gt;sqnum = sqnum;</div><div class='add'>+</div><div class='add'>+	if (av-&gt;highest_lnum &lt;= lnum) {</div><div class='add'>+		av-&gt;highest_lnum = lnum;</div><div class='add'>+		av-&gt;last_data_size = be32_to_cpu(vid_hdr-&gt;data_size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sv-&gt;leb_count += 1;</div><div class='del'>-	rb_link_node(&amp;seb-&gt;u.rb, parent, p);</div><div class='del'>-	rb_insert_color(&amp;seb-&gt;u.rb, &amp;sv-&gt;root);</div><div class='add'>+	av-&gt;leb_count += 1;</div><div class='add'>+	rb_link_node(&amp;aeb-&gt;u.rb, parent, p);</div><div class='add'>+	rb_insert_color(&amp;aeb-&gt;u.rb, &amp;av-&gt;root);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_scan_find_sv - find volume in the scanning information.</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * ubi_find_av - find volume in the attaching information.</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  * @vol_id: the requested volume ID</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns a pointer to the volume description or %NULL if there</div><div class='del'>- * are no data about this volume in the scanning information.</div><div class='del'>- */</div><div class='del'>-struct ubi_scan_volume *ubi_scan_find_sv(const struct ubi_scan_info *si,</div><div class='del'>-					 int vol_id)</div><div class='del'>-{</div><div class='del'>-	struct ubi_scan_volume *sv;</div><div class='del'>-	struct rb_node *p = si-&gt;volumes.rb_node;</div><div class='del'>-</div><div class='del'>-	while (p) {</div><div class='del'>-		sv = rb_entry(p, struct ubi_scan_volume, rb);</div><div class='del'>-</div><div class='del'>-		if (vol_id == sv-&gt;vol_id)</div><div class='del'>-			return sv;</div><div class='del'>-</div><div class='del'>-		if (vol_id &gt; sv-&gt;vol_id)</div><div class='del'>-			p = p-&gt;rb_left;</div><div class='del'>-		else</div><div class='del'>-			p = p-&gt;rb_right;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ubi_scan_find_seb - find LEB in the volume scanning information.</div><div class='del'>- * @sv: a pointer to the volume scanning information</div><div class='del'>- * @lnum: the requested logical eraseblock</div><div class='del'>- *</div><div class='del'>- * This function returns a pointer to the scanning logical eraseblock or %NULL</div><div class='del'>- * if there are no data about it in the scanning volume information.</div><div class='add'>+ * are no data about this volume in the attaching information.</div><div class='ctx'>  */</div><div class='del'>-struct ubi_scan_leb *ubi_scan_find_seb(const struct ubi_scan_volume *sv,</div><div class='del'>-				       int lnum)</div><div class='add'>+struct ubi_ainf_volume *ubi_find_av(const struct ubi_attach_info *ai,</div><div class='add'>+				    int vol_id)</div><div class='ctx'> {</div><div class='del'>-	struct ubi_scan_leb *seb;</div><div class='del'>-	struct rb_node *p = sv-&gt;root.rb_node;</div><div class='add'>+	struct ubi_ainf_volume *av;</div><div class='add'>+	struct rb_node *p = ai-&gt;volumes.rb_node;</div><div class='ctx'> </div><div class='ctx'> 	while (p) {</div><div class='del'>-		seb = rb_entry(p, struct ubi_scan_leb, u.rb);</div><div class='add'>+		av = rb_entry(p, struct ubi_ainf_volume, rb);</div><div class='ctx'> </div><div class='del'>-		if (lnum == seb-&gt;lnum)</div><div class='del'>-			return seb;</div><div class='add'>+		if (vol_id == av-&gt;vol_id)</div><div class='add'>+			return av;</div><div class='ctx'> </div><div class='del'>-		if (lnum &gt; seb-&gt;lnum)</div><div class='add'>+		if (vol_id &gt; av-&gt;vol_id)</div><div class='ctx'> 			p = p-&gt;rb_left;</div><div class='ctx'> 		else</div><div class='ctx'> 			p = p-&gt;rb_right;</div><div class='hunk'>@@ -648,34 +627,34 @@ struct ubi_scan_leb *ubi_scan_find_seb(const struct ubi_scan_volume *sv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_scan_rm_volume - delete scanning information about a volume.</div><div class='del'>- * @si: scanning information</div><div class='del'>- * @sv: the volume scanning information to delete</div><div class='add'>+ * ubi_remove_av - delete attaching information about a volume.</div><div class='add'>+ * @ai: attaching information</div><div class='add'>+ * @av: the volume attaching information to delete</div><div class='ctx'>  */</div><div class='del'>-void ubi_scan_rm_volume(struct ubi_scan_info *si, struct ubi_scan_volume *sv)</div><div class='add'>+void ubi_remove_av(struct ubi_attach_info *ai, struct ubi_ainf_volume *av)</div><div class='ctx'> {</div><div class='ctx'> 	struct rb_node *rb;</div><div class='del'>-	struct ubi_scan_leb *seb;</div><div class='add'>+	struct ubi_ainf_peb *aeb;</div><div class='ctx'> </div><div class='del'>-	dbg_bld("remove scanning information about volume %d", sv-&gt;vol_id);</div><div class='add'>+	dbg_bld("remove attaching information about volume %d", av-&gt;vol_id);</div><div class='ctx'> </div><div class='del'>-	while ((rb = rb_first(&amp;sv-&gt;root))) {</div><div class='del'>-		seb = rb_entry(rb, struct ubi_scan_leb, u.rb);</div><div class='del'>-		rb_erase(&amp;seb-&gt;u.rb, &amp;sv-&gt;root);</div><div class='del'>-		list_add_tail(&amp;seb-&gt;u.list, &amp;si-&gt;erase);</div><div class='add'>+	while ((rb = rb_first(&amp;av-&gt;root))) {</div><div class='add'>+		aeb = rb_entry(rb, struct ubi_ainf_peb, u.rb);</div><div class='add'>+		rb_erase(&amp;aeb-&gt;u.rb, &amp;av-&gt;root);</div><div class='add'>+		list_add_tail(&amp;aeb-&gt;u.list, &amp;ai-&gt;erase);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rb_erase(&amp;sv-&gt;rb, &amp;si-&gt;volumes);</div><div class='del'>-	kfree(sv);</div><div class='del'>-	si-&gt;vols_found -= 1;</div><div class='add'>+	rb_erase(&amp;av-&gt;rb, &amp;ai-&gt;volumes);</div><div class='add'>+	kfree(av);</div><div class='add'>+	ai-&gt;vols_found -= 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_scan_erase_peb - erase a physical eraseblock.</div><div class='add'>+ * early_erase_peb - erase a physical eraseblock.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  * @pnum: physical eraseblock number to erase;</div><div class='del'>- * @ec: erase counter value to write (%UBI_SCAN_UNKNOWN_EC if it is unknown)</div><div class='add'>+ * @ec: erase counter value to write (%UBI_UNKNOWN if it is unknown)</div><div class='ctx'>  *</div><div class='ctx'>  * This function erases physical eraseblock 'pnum', and writes the erase</div><div class='ctx'>  * counter header to it. This function should only be used on UBI device</div><div class='hunk'>@@ -683,8 +662,8 @@ void ubi_scan_rm_volume(struct ubi_scan_info *si, struct ubi_scan_volume *sv)</div><div class='ctx'>  * This function returns zero in case of success and a negative error code in</div><div class='ctx'>  * case of failure.</div><div class='ctx'>  */</div><div class='del'>-int ubi_scan_erase_peb(struct ubi_device *ubi, const struct ubi_scan_info *si,</div><div class='del'>-		       int pnum, int ec)</div><div class='add'>+static int early_erase_peb(struct ubi_device *ubi,</div><div class='add'>+			   const struct ubi_attach_info *ai, int pnum, int ec)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct ubi_ec_hdr *ec_hdr;</div><div class='hunk'>@@ -716,9 +695,9 @@ out_free:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_scan_get_free_peb - get a free physical eraseblock.</div><div class='add'>+ * ubi_early_get_peb - get a free physical eraseblock.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns a free physical eraseblock. It is supposed to be</div><div class='ctx'>  * called on the UBI initialization stages when the wear-leveling sub-system is</div><div class='hunk'>@@ -726,20 +705,20 @@ out_free:</div><div class='ctx'>  * the lists, writes the EC header if it is needed, and removes it from the</div><div class='ctx'>  * list.</div><div class='ctx'>  *</div><div class='del'>- * This function returns scanning physical eraseblock information in case of</div><div class='del'>- * success and an error code in case of failure.</div><div class='add'>+ * This function returns a pointer to the "aeb" of the found free PEB in case</div><div class='add'>+ * of success and an error code in case of failure.</div><div class='ctx'>  */</div><div class='del'>-struct ubi_scan_leb *ubi_scan_get_free_peb(struct ubi_device *ubi,</div><div class='del'>-					   struct ubi_scan_info *si)</div><div class='add'>+struct ubi_ainf_peb *ubi_early_get_peb(struct ubi_device *ubi,</div><div class='add'>+				       struct ubi_attach_info *ai)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='del'>-	struct ubi_scan_leb *seb, *tmp_seb;</div><div class='add'>+	struct ubi_ainf_peb *aeb, *tmp_aeb;</div><div class='ctx'> </div><div class='del'>-	if (!list_empty(&amp;si-&gt;free)) {</div><div class='del'>-		seb = list_entry(si-&gt;free.next, struct ubi_scan_leb, u.list);</div><div class='del'>-		list_del(&amp;seb-&gt;u.list);</div><div class='del'>-		dbg_bld("return free PEB %d, EC %d", seb-&gt;pnum, seb-&gt;ec);</div><div class='del'>-		return seb;</div><div class='add'>+	if (!list_empty(&amp;ai-&gt;free)) {</div><div class='add'>+		aeb = list_entry(ai-&gt;free.next, struct ubi_ainf_peb, u.list);</div><div class='add'>+		list_del(&amp;aeb-&gt;u.list);</div><div class='add'>+		dbg_bld("return free PEB %d, EC %d", aeb-&gt;pnum, aeb-&gt;ec);</div><div class='add'>+		return aeb;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -748,18 +727,18 @@ struct ubi_scan_leb *ubi_scan_get_free_peb(struct ubi_device *ubi,</div><div class='ctx'> 	 * so forth. We don't want to take care about bad eraseblocks here -</div><div class='ctx'> 	 * they'll be handled later.</div><div class='ctx'> 	 */</div><div class='del'>-	list_for_each_entry_safe(seb, tmp_seb, &amp;si-&gt;erase, u.list) {</div><div class='del'>-		if (seb-&gt;ec == UBI_SCAN_UNKNOWN_EC)</div><div class='del'>-			seb-&gt;ec = si-&gt;mean_ec;</div><div class='add'>+	list_for_each_entry_safe(aeb, tmp_aeb, &amp;ai-&gt;erase, u.list) {</div><div class='add'>+		if (aeb-&gt;ec == UBI_UNKNOWN)</div><div class='add'>+			aeb-&gt;ec = ai-&gt;mean_ec;</div><div class='ctx'> </div><div class='del'>-		err = ubi_scan_erase_peb(ubi, si, seb-&gt;pnum, seb-&gt;ec+1);</div><div class='add'>+		err = early_erase_peb(ubi, ai, aeb-&gt;pnum, aeb-&gt;ec+1);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		seb-&gt;ec += 1;</div><div class='del'>-		list_del(&amp;seb-&gt;u.list);</div><div class='del'>-		dbg_bld("return PEB %d, EC %d", seb-&gt;pnum, seb-&gt;ec);</div><div class='del'>-		return seb;</div><div class='add'>+		aeb-&gt;ec += 1;</div><div class='add'>+		list_del(&amp;aeb-&gt;u.list);</div><div class='add'>+		dbg_bld("return PEB %d, EC %d", aeb-&gt;pnum, aeb-&gt;ec);</div><div class='add'>+		return aeb;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ubi_err("no free eraseblocks");</div><div class='hunk'>@@ -814,7 +793,7 @@ static int check_corruption(struct ubi_device *ubi, struct ubi_vid_hdr *vid_hdr,</div><div class='ctx'> 	ubi_err("PEB %d contains corrupted VID header, and the data does not "</div><div class='ctx'> 		"contain all 0xFF, this may be a non-UBI PEB or a severe VID "</div><div class='ctx'> 		"header corruption which requires manual inspection", pnum);</div><div class='del'>-	ubi_dbg_dump_vid_hdr(vid_hdr);</div><div class='add'>+	ubi_dump_vid_hdr(vid_hdr);</div><div class='ctx'> 	dbg_msg("hexdump of PEB %d offset %d, length %d",</div><div class='ctx'> 		pnum, ubi-&gt;leb_start, ubi-&gt;leb_size);</div><div class='ctx'> 	ubi_dbg_print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1,</div><div class='hunk'>@@ -827,16 +806,18 @@ out_unlock:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * process_eb - read, check UBI headers, and add them to scanning information.</div><div class='add'>+ * scan_peb - scan and process UBI headers of a PEB.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  * @pnum: the physical eraseblock number</div><div class='ctx'>  *</div><div class='del'>- * This function returns a zero if the physical eraseblock was successfully</div><div class='del'>- * handled and a negative error code in case of failure.</div><div class='add'>+ * This function reads UBI headers of PEB @pnum, checks them, and adds</div><div class='add'>+ * information about this PEB to the corresponding list or RB-tree in the</div><div class='add'>+ * "attaching info" structure. Returns zero if the physical eraseblock was</div><div class='add'>+ * successfully handled and a negative error code in case of failure.</div><div class='ctx'>  */</div><div class='del'>-static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='del'>-		      int pnum)</div><div class='add'>+static int scan_peb(struct ubi_device *ubi, struct ubi_attach_info *ai,</div><div class='add'>+		    int pnum)</div><div class='ctx'> {</div><div class='ctx'> 	long long uninitialized_var(ec);</div><div class='ctx'> 	int err, bitflips = 0, vol_id, ec_err = 0;</div><div class='hunk'>@@ -848,12 +829,7 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	else if (err) {</div><div class='del'>-		/*</div><div class='del'>-		 * FIXME: this is actually duty of the I/O sub-system to</div><div class='del'>-		 * initialize this, but MTD does not provide enough</div><div class='del'>-		 * information.</div><div class='del'>-		 */</div><div class='del'>-		si-&gt;bad_peb_count += 1;</div><div class='add'>+		ai-&gt;bad_peb_count += 1;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -867,13 +843,13 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 		bitflips = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UBI_IO_FF:</div><div class='del'>-		si-&gt;empty_peb_count += 1;</div><div class='del'>-		return add_to_list(si, pnum, UBI_SCAN_UNKNOWN_EC, 0,</div><div class='del'>-				   &amp;si-&gt;erase);</div><div class='add'>+		ai-&gt;empty_peb_count += 1;</div><div class='add'>+		return add_to_list(ai, pnum, UBI_UNKNOWN, UBI_UNKNOWN,</div><div class='add'>+				   UBI_UNKNOWN, 0, &amp;ai-&gt;erase);</div><div class='ctx'> 	case UBI_IO_FF_BITFLIPS:</div><div class='del'>-		si-&gt;empty_peb_count += 1;</div><div class='del'>-		return add_to_list(si, pnum, UBI_SCAN_UNKNOWN_EC, 1,</div><div class='del'>-				   &amp;si-&gt;erase);</div><div class='add'>+		ai-&gt;empty_peb_count += 1;</div><div class='add'>+		return add_to_list(ai, pnum, UBI_UNKNOWN, UBI_UNKNOWN,</div><div class='add'>+				   UBI_UNKNOWN, 1, &amp;ai-&gt;erase);</div><div class='ctx'> 	case UBI_IO_BAD_HDR_EBADMSG:</div><div class='ctx'> 	case UBI_IO_BAD_HDR:</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -882,7 +858,7 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 		 * moved and EC be re-created.</div><div class='ctx'> 		 */</div><div class='ctx'> 		ec_err = err;</div><div class='del'>-		ec = UBI_SCAN_UNKNOWN_EC;</div><div class='add'>+		ec = UBI_UNKNOWN;</div><div class='ctx'> 		bitflips = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -911,7 +887,7 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 			 */</div><div class='ctx'> 			ubi_err("erase counter overflow, max is %d",</div><div class='ctx'> 				UBI_MAX_ERASECOUNTER);</div><div class='del'>-			ubi_dbg_dump_ec_hdr(ech);</div><div class='add'>+			ubi_dump_ec_hdr(ech);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -933,7 +909,7 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 		    ubi-&gt;image_seq != image_seq) {</div><div class='ctx'> 			ubi_err("bad image sequence number %d in PEB %d, "</div><div class='ctx'> 				"expected %d", image_seq, pnum, ubi-&gt;image_seq);</div><div class='del'>-			ubi_dbg_dump_ec_hdr(ech);</div><div class='add'>+			ubi_dump_ec_hdr(ech);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -957,7 +933,7 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 			 * PEB, bit it is not marked as bad yet. This may also</div><div class='ctx'> 			 * be a result of power cut during erasure.</div><div class='ctx'> 			 */</div><div class='del'>-			si-&gt;maybe_bad_peb_count += 1;</div><div class='add'>+			ai-&gt;maybe_bad_peb_count += 1;</div><div class='ctx'> 	case UBI_IO_BAD_HDR:</div><div class='ctx'> 		if (ec_err)</div><div class='ctx'> 			/*</div><div class='hunk'>@@ -984,23 +960,27 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 			return err;</div><div class='ctx'> 		else if (!err)</div><div class='ctx'> 			/* This corruption is caused by a power cut */</div><div class='del'>-			err = add_to_list(si, pnum, ec, 1, &amp;si-&gt;erase);</div><div class='add'>+			err = add_to_list(ai, pnum, UBI_UNKNOWN,</div><div class='add'>+					  UBI_UNKNOWN, ec, 1, &amp;ai-&gt;erase);</div><div class='ctx'> 		else</div><div class='ctx'> 			/* This is an unexpected corruption */</div><div class='del'>-			err = add_corrupted(si, pnum, ec);</div><div class='add'>+			err = add_corrupted(ai, pnum, ec);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 		goto adjust_mean_ec;</div><div class='ctx'> 	case UBI_IO_FF_BITFLIPS:</div><div class='del'>-		err = add_to_list(si, pnum, ec, 1, &amp;si-&gt;erase);</div><div class='add'>+		err = add_to_list(ai, pnum, UBI_UNKNOWN, UBI_UNKNOWN,</div><div class='add'>+				  ec, 1, &amp;ai-&gt;erase);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 		goto adjust_mean_ec;</div><div class='ctx'> 	case UBI_IO_FF:</div><div class='ctx'> 		if (ec_err)</div><div class='del'>-			err = add_to_list(si, pnum, ec, 1, &amp;si-&gt;erase);</div><div class='add'>+			err = add_to_list(ai, pnum, UBI_UNKNOWN,</div><div class='add'>+					  UBI_UNKNOWN, ec, 1, &amp;ai-&gt;erase);</div><div class='ctx'> 		else</div><div class='del'>-			err = add_to_list(si, pnum, ec, 0, &amp;si-&gt;free);</div><div class='add'>+			err = add_to_list(ai, pnum, UBI_UNKNOWN,</div><div class='add'>+					  UBI_UNKNOWN, ec, 0, &amp;ai-&gt;free);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 		goto adjust_mean_ec;</div><div class='hunk'>@@ -1019,7 +999,8 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 		case UBI_COMPAT_DELETE:</div><div class='ctx'> 			ubi_msg("\"delete\" compatible internal volume %d:%d"</div><div class='ctx'> 				" found, will remove it", vol_id, lnum);</div><div class='del'>-			err = add_to_list(si, pnum, ec, 1, &amp;si-&gt;erase);</div><div class='add'>+			err = add_to_list(ai, pnum, vol_id, lnum,</div><div class='add'>+					  ec, 1, &amp;ai-&gt;erase);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				return err;</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -1034,7 +1015,8 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 		case UBI_COMPAT_PRESERVE:</div><div class='ctx'> 			ubi_msg("\"preserve\" compatible internal volume %d:%d"</div><div class='ctx'> 				" found", vol_id, lnum);</div><div class='del'>-			err = add_to_list(si, pnum, ec, 0, &amp;si-&gt;alien);</div><div class='add'>+			err = add_to_list(ai, pnum, vol_id, lnum,</div><div class='add'>+					  ec, 0, &amp;ai-&gt;alien);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				return err;</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -1049,40 +1031,40 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 	if (ec_err)</div><div class='ctx'> 		ubi_warn("valid VID header but corrupted EC header at PEB %d",</div><div class='ctx'> 			 pnum);</div><div class='del'>-	err = ubi_scan_add_used(ubi, si, pnum, ec, vidh, bitflips);</div><div class='add'>+	err = ubi_add_to_av(ubi, ai, pnum, ec, vidh, bitflips);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> adjust_mean_ec:</div><div class='ctx'> 	if (!ec_err) {</div><div class='del'>-		si-&gt;ec_sum += ec;</div><div class='del'>-		si-&gt;ec_count += 1;</div><div class='del'>-		if (ec &gt; si-&gt;max_ec)</div><div class='del'>-			si-&gt;max_ec = ec;</div><div class='del'>-		if (ec &lt; si-&gt;min_ec)</div><div class='del'>-			si-&gt;min_ec = ec;</div><div class='add'>+		ai-&gt;ec_sum += ec;</div><div class='add'>+		ai-&gt;ec_count += 1;</div><div class='add'>+		if (ec &gt; ai-&gt;max_ec)</div><div class='add'>+			ai-&gt;max_ec = ec;</div><div class='add'>+		if (ec &lt; ai-&gt;min_ec)</div><div class='add'>+			ai-&gt;min_ec = ec;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * check_what_we_have - check what PEB were found by scanning.</div><div class='add'>+ * late_analysis - analyze the overall situation with PEB.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  *</div><div class='del'>- * This is a helper function which takes a look what PEBs were found by</div><div class='del'>- * scanning, and decides whether the flash is empty and should be formatted and</div><div class='del'>- * whether there are too many corrupted PEBs and we should not attach this</div><div class='del'>- * MTD device. Returns zero if we should proceed with attaching the MTD device,</div><div class='del'>- * and %-EINVAL if we should not.</div><div class='add'>+ * This is a helper function which takes a look what PEBs we have after we</div><div class='add'>+ * gather information about all of them ("ai" is compete). It decides whether</div><div class='add'>+ * the flash is empty and should be formatted of whether there are too many</div><div class='add'>+ * corrupted PEBs and we should not attach this MTD device. Returns zero if we</div><div class='add'>+ * should proceed with attaching the MTD device, and %-EINVAL if we should not.</div><div class='ctx'>  */</div><div class='del'>-static int check_what_we_have(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='add'>+static int late_analysis(struct ubi_device *ubi, struct ubi_attach_info *ai)</div><div class='ctx'> {</div><div class='del'>-	struct ubi_scan_leb *seb;</div><div class='add'>+	struct ubi_ainf_peb *aeb;</div><div class='ctx'> 	int max_corr, peb_count;</div><div class='ctx'> </div><div class='del'>-	peb_count = ubi-&gt;peb_count - si-&gt;bad_peb_count - si-&gt;alien_peb_count;</div><div class='add'>+	peb_count = ubi-&gt;peb_count - ai-&gt;bad_peb_count - ai-&gt;alien_peb_count;</div><div class='ctx'> 	max_corr = peb_count / 20 ?: 8;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1090,25 +1072,25 @@ static int check_what_we_have(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> 	 * unclean reboots. However, many of them may indicate some problems</div><div class='ctx'> 	 * with the flash HW or driver.</div><div class='ctx'> 	 */</div><div class='del'>-	if (si-&gt;corr_peb_count) {</div><div class='add'>+	if (ai-&gt;corr_peb_count) {</div><div class='ctx'> 		ubi_err("%d PEBs are corrupted and preserved",</div><div class='del'>-			si-&gt;corr_peb_count);</div><div class='add'>+			ai-&gt;corr_peb_count);</div><div class='ctx'> 		printk(KERN_ERR "Corrupted PEBs are:");</div><div class='del'>-		list_for_each_entry(seb, &amp;si-&gt;corr, u.list)</div><div class='del'>-			printk(KERN_CONT " %d", seb-&gt;pnum);</div><div class='add'>+		list_for_each_entry(aeb, &amp;ai-&gt;corr, u.list)</div><div class='add'>+			printk(KERN_CONT " %d", aeb-&gt;pnum);</div><div class='ctx'> 		printk(KERN_CONT "\n");</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If too many PEBs are corrupted, we refuse attaching,</div><div class='ctx'> 		 * otherwise, only print a warning.</div><div class='ctx'> 		 */</div><div class='del'>-		if (si-&gt;corr_peb_count &gt;= max_corr) {</div><div class='add'>+		if (ai-&gt;corr_peb_count &gt;= max_corr) {</div><div class='ctx'> 			ubi_err("too many corrupted PEBs, refusing");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (si-&gt;empty_peb_count + si-&gt;maybe_bad_peb_count == peb_count) {</div><div class='add'>+	if (ai-&gt;empty_peb_count + ai-&gt;maybe_bad_peb_count == peb_count) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * All PEBs are empty, or almost all - a couple PEBs look like</div><div class='ctx'> 		 * they may be bad PEBs which were not marked as bad yet.</div><div class='hunk'>@@ -1124,8 +1106,8 @@ static int check_what_we_have(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> 		 * 2. Flash contains non-UBI data and we do not want to format</div><div class='ctx'> 		 *    it and destroy possibly important information.</div><div class='ctx'> 		 */</div><div class='del'>-		if (si-&gt;maybe_bad_peb_count &lt;= 2) {</div><div class='del'>-			si-&gt;is_empty = 1;</div><div class='add'>+		if (ai-&gt;maybe_bad_peb_count &lt;= 2) {</div><div class='add'>+			ai-&gt;is_empty = 1;</div><div class='ctx'> 			ubi_msg("empty MTD device detected");</div><div class='ctx'> 			get_random_bytes(&amp;ubi-&gt;image_seq,</div><div class='ctx'> 					 sizeof(ubi-&gt;image_seq));</div><div class='hunk'>@@ -1141,40 +1123,41 @@ static int check_what_we_have(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_scan - scan an MTD device.</div><div class='add'>+ * scan_all - scan entire MTD device.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  *</div><div class='ctx'>  * This function does full scanning of an MTD device and returns complete</div><div class='del'>- * information about it. In case of failure, an error code is returned.</div><div class='add'>+ * information about it in form of a "struct ubi_attach_info" object. In case</div><div class='add'>+ * of failure, an error code is returned.</div><div class='ctx'>  */</div><div class='del'>-struct ubi_scan_info *ubi_scan(struct ubi_device *ubi)</div><div class='add'>+static struct ubi_attach_info *scan_all(struct ubi_device *ubi)</div><div class='ctx'> {</div><div class='ctx'> 	int err, pnum;</div><div class='ctx'> 	struct rb_node *rb1, *rb2;</div><div class='del'>-	struct ubi_scan_volume *sv;</div><div class='del'>-	struct ubi_scan_leb *seb;</div><div class='del'>-	struct ubi_scan_info *si;</div><div class='add'>+	struct ubi_ainf_volume *av;</div><div class='add'>+	struct ubi_ainf_peb *aeb;</div><div class='add'>+	struct ubi_attach_info *ai;</div><div class='ctx'> </div><div class='del'>-	si = kzalloc(sizeof(struct ubi_scan_info), GFP_KERNEL);</div><div class='del'>-	if (!si)</div><div class='add'>+	ai = kzalloc(sizeof(struct ubi_attach_info), GFP_KERNEL);</div><div class='add'>+	if (!ai)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	INIT_LIST_HEAD(&amp;si-&gt;corr);</div><div class='del'>-	INIT_LIST_HEAD(&amp;si-&gt;free);</div><div class='del'>-	INIT_LIST_HEAD(&amp;si-&gt;erase);</div><div class='del'>-	INIT_LIST_HEAD(&amp;si-&gt;alien);</div><div class='del'>-	si-&gt;volumes = RB_ROOT;</div><div class='add'>+	INIT_LIST_HEAD(&amp;ai-&gt;corr);</div><div class='add'>+	INIT_LIST_HEAD(&amp;ai-&gt;free);</div><div class='add'>+	INIT_LIST_HEAD(&amp;ai-&gt;erase);</div><div class='add'>+	INIT_LIST_HEAD(&amp;ai-&gt;alien);</div><div class='add'>+	ai-&gt;volumes = RB_ROOT;</div><div class='ctx'> </div><div class='ctx'> 	err = -ENOMEM;</div><div class='del'>-	si-&gt;scan_leb_slab = kmem_cache_create("ubi_scan_leb_slab",</div><div class='del'>-					      sizeof(struct ubi_scan_leb),</div><div class='del'>-					      0, 0, NULL);</div><div class='del'>-	if (!si-&gt;scan_leb_slab)</div><div class='del'>-		goto out_si;</div><div class='add'>+	ai-&gt;aeb_slab_cache = kmem_cache_create("ubi_aeb_slab_cache",</div><div class='add'>+					       sizeof(struct ubi_ainf_peb),</div><div class='add'>+					       0, 0, NULL);</div><div class='add'>+	if (!ai-&gt;aeb_slab_cache)</div><div class='add'>+		goto out_ai;</div><div class='ctx'> </div><div class='ctx'> 	ech = kzalloc(ubi-&gt;ec_hdr_alsize, GFP_KERNEL);</div><div class='ctx'> 	if (!ech)</div><div class='del'>-		goto out_si;</div><div class='add'>+		goto out_ai;</div><div class='ctx'> </div><div class='ctx'> 	vidh = ubi_zalloc_vid_hdr(ubi, GFP_KERNEL);</div><div class='ctx'> 	if (!vidh)</div><div class='hunk'>@@ -1184,7 +1167,7 @@ struct ubi_scan_info *ubi_scan(struct ubi_device *ubi)</div><div class='ctx'> 		cond_resched();</div><div class='ctx'> </div><div class='ctx'> 		dbg_gen("process PEB %d", pnum);</div><div class='del'>-		err = process_eb(ubi, si, pnum);</div><div class='add'>+		err = scan_peb(ubi, ai, pnum);</div><div class='ctx'> 		if (err &lt; 0)</div><div class='ctx'> 			goto out_vidh;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1192,10 +1175,10 @@ struct ubi_scan_info *ubi_scan(struct ubi_device *ubi)</div><div class='ctx'> 	dbg_msg("scanning is finished");</div><div class='ctx'> </div><div class='ctx'> 	/* Calculate mean erase counter */</div><div class='del'>-	if (si-&gt;ec_count)</div><div class='del'>-		si-&gt;mean_ec = div_u64(si-&gt;ec_sum, si-&gt;ec_count);</div><div class='add'>+	if (ai-&gt;ec_count)</div><div class='add'>+		ai-&gt;mean_ec = div_u64(ai-&gt;ec_sum, ai-&gt;ec_count);</div><div class='ctx'> </div><div class='del'>-	err = check_what_we_have(ubi, si);</div><div class='add'>+	err = late_analysis(ubi, ai);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_vidh;</div><div class='ctx'> </div><div class='hunk'>@@ -1203,55 +1186,102 @@ struct ubi_scan_info *ubi_scan(struct ubi_device *ubi)</div><div class='ctx'> 	 * In case of unknown erase counter we use the mean erase counter</div><div class='ctx'> 	 * value.</div><div class='ctx'> 	 */</div><div class='del'>-	ubi_rb_for_each_entry(rb1, sv, &amp;si-&gt;volumes, rb) {</div><div class='del'>-		ubi_rb_for_each_entry(rb2, seb, &amp;sv-&gt;root, u.rb)</div><div class='del'>-			if (seb-&gt;ec == UBI_SCAN_UNKNOWN_EC)</div><div class='del'>-				seb-&gt;ec = si-&gt;mean_ec;</div><div class='add'>+	ubi_rb_for_each_entry(rb1, av, &amp;ai-&gt;volumes, rb) {</div><div class='add'>+		ubi_rb_for_each_entry(rb2, aeb, &amp;av-&gt;root, u.rb)</div><div class='add'>+			if (aeb-&gt;ec == UBI_UNKNOWN)</div><div class='add'>+				aeb-&gt;ec = ai-&gt;mean_ec;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(seb, &amp;si-&gt;free, u.list) {</div><div class='del'>-		if (seb-&gt;ec == UBI_SCAN_UNKNOWN_EC)</div><div class='del'>-			seb-&gt;ec = si-&gt;mean_ec;</div><div class='add'>+	list_for_each_entry(aeb, &amp;ai-&gt;free, u.list) {</div><div class='add'>+		if (aeb-&gt;ec == UBI_UNKNOWN)</div><div class='add'>+			aeb-&gt;ec = ai-&gt;mean_ec;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(seb, &amp;si-&gt;corr, u.list)</div><div class='del'>-		if (seb-&gt;ec == UBI_SCAN_UNKNOWN_EC)</div><div class='del'>-			seb-&gt;ec = si-&gt;mean_ec;</div><div class='add'>+	list_for_each_entry(aeb, &amp;ai-&gt;corr, u.list)</div><div class='add'>+		if (aeb-&gt;ec == UBI_UNKNOWN)</div><div class='add'>+			aeb-&gt;ec = ai-&gt;mean_ec;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(seb, &amp;si-&gt;erase, u.list)</div><div class='del'>-		if (seb-&gt;ec == UBI_SCAN_UNKNOWN_EC)</div><div class='del'>-			seb-&gt;ec = si-&gt;mean_ec;</div><div class='add'>+	list_for_each_entry(aeb, &amp;ai-&gt;erase, u.list)</div><div class='add'>+		if (aeb-&gt;ec == UBI_UNKNOWN)</div><div class='add'>+			aeb-&gt;ec = ai-&gt;mean_ec;</div><div class='ctx'> </div><div class='del'>-	err = paranoid_check_si(ubi, si);</div><div class='add'>+	err = self_check_ai(ubi, ai);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_vidh;</div><div class='ctx'> </div><div class='ctx'> 	ubi_free_vid_hdr(ubi, vidh);</div><div class='ctx'> 	kfree(ech);</div><div class='ctx'> </div><div class='del'>-	return si;</div><div class='add'>+	return ai;</div><div class='ctx'> </div><div class='ctx'> out_vidh:</div><div class='ctx'> 	ubi_free_vid_hdr(ubi, vidh);</div><div class='ctx'> out_ech:</div><div class='ctx'> 	kfree(ech);</div><div class='del'>-out_si:</div><div class='del'>-	ubi_scan_destroy_si(si);</div><div class='add'>+out_ai:</div><div class='add'>+	ubi_destroy_ai(ai);</div><div class='ctx'> 	return ERR_PTR(err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * destroy_sv - free the scanning volume information</div><div class='del'>- * @sv: scanning volume information</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * ubi_attach - attach an MTD device.</div><div class='add'>+ * @ubi: UBI device descriptor</div><div class='ctx'>  *</div><div class='del'>- * This function destroys the volume RB-tree (@sv-&gt;root) and the scanning</div><div class='del'>- * volume information.</div><div class='add'>+ * This function returns zero in case of success and a negative error code in</div><div class='add'>+ * case of failure.</div><div class='ctx'>  */</div><div class='del'>-static void destroy_sv(struct ubi_scan_info *si, struct ubi_scan_volume *sv)</div><div class='add'>+int ubi_attach(struct ubi_device *ubi)</div><div class='ctx'> {</div><div class='del'>-	struct ubi_scan_leb *seb;</div><div class='del'>-	struct rb_node *this = sv-&gt;root.rb_node;</div><div class='add'>+	int err;</div><div class='add'>+	struct ubi_attach_info *ai;</div><div class='add'>+</div><div class='add'>+	ai = scan_all(ubi);</div><div class='add'>+	if (IS_ERR(ai))</div><div class='add'>+		return PTR_ERR(ai);</div><div class='add'>+</div><div class='add'>+	ubi-&gt;bad_peb_count = ai-&gt;bad_peb_count;</div><div class='add'>+	ubi-&gt;good_peb_count = ubi-&gt;peb_count - ubi-&gt;bad_peb_count;</div><div class='add'>+	ubi-&gt;corr_peb_count = ai-&gt;corr_peb_count;</div><div class='add'>+	ubi-&gt;max_ec = ai-&gt;max_ec;</div><div class='add'>+	ubi-&gt;mean_ec = ai-&gt;mean_ec;</div><div class='add'>+	ubi_msg("max. sequence number:       %llu", ai-&gt;max_sqnum);</div><div class='add'>+</div><div class='add'>+	err = ubi_read_volume_table(ubi, ai);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_ai;</div><div class='add'>+</div><div class='add'>+	err = ubi_wl_init(ubi, ai);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_vtbl;</div><div class='add'>+</div><div class='add'>+	err = ubi_eba_init(ubi, ai);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_wl;</div><div class='add'>+</div><div class='add'>+	ubi_destroy_ai(ai);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_wl:</div><div class='add'>+	ubi_wl_close(ubi);</div><div class='add'>+out_vtbl:</div><div class='add'>+	ubi_free_internal_volumes(ubi);</div><div class='add'>+	vfree(ubi-&gt;vtbl);</div><div class='add'>+out_ai:</div><div class='add'>+	ubi_destroy_ai(ai);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * destroy_av - free volume attaching information.</div><div class='add'>+ * @av: volume attaching information</div><div class='add'>+ * @ai: attaching information</div><div class='add'>+ *</div><div class='add'>+ * This function destroys the volume attaching information.</div><div class='add'>+ */</div><div class='add'>+static void destroy_av(struct ubi_attach_info *ai, struct ubi_ainf_volume *av)</div><div class='add'>+{</div><div class='add'>+	struct ubi_ainf_peb *aeb;</div><div class='add'>+	struct rb_node *this = av-&gt;root.rb_node;</div><div class='ctx'> </div><div class='ctx'> 	while (this) {</div><div class='ctx'> 		if (this-&gt;rb_left)</div><div class='hunk'>@@ -1259,224 +1289,222 @@ static void destroy_sv(struct ubi_scan_info *si, struct ubi_scan_volume *sv)</div><div class='ctx'> 		else if (this-&gt;rb_right)</div><div class='ctx'> 			this = this-&gt;rb_right;</div><div class='ctx'> 		else {</div><div class='del'>-			seb = rb_entry(this, struct ubi_scan_leb, u.rb);</div><div class='add'>+			aeb = rb_entry(this, struct ubi_ainf_peb, u.rb);</div><div class='ctx'> 			this = rb_parent(this);</div><div class='ctx'> 			if (this) {</div><div class='del'>-				if (this-&gt;rb_left == &amp;seb-&gt;u.rb)</div><div class='add'>+				if (this-&gt;rb_left == &amp;aeb-&gt;u.rb)</div><div class='ctx'> 					this-&gt;rb_left = NULL;</div><div class='ctx'> 				else</div><div class='ctx'> 					this-&gt;rb_right = NULL;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			kmem_cache_free(si-&gt;scan_leb_slab, seb);</div><div class='add'>+			kmem_cache_free(ai-&gt;aeb_slab_cache, aeb);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	kfree(sv);</div><div class='add'>+	kfree(av);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_scan_destroy_si - destroy scanning information.</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * ubi_destroy_ai - destroy attaching information.</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  */</div><div class='del'>-void ubi_scan_destroy_si(struct ubi_scan_info *si)</div><div class='add'>+void ubi_destroy_ai(struct ubi_attach_info *ai)</div><div class='ctx'> {</div><div class='del'>-	struct ubi_scan_leb *seb, *seb_tmp;</div><div class='del'>-	struct ubi_scan_volume *sv;</div><div class='add'>+	struct ubi_ainf_peb *aeb, *aeb_tmp;</div><div class='add'>+	struct ubi_ainf_volume *av;</div><div class='ctx'> 	struct rb_node *rb;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry_safe(seb, seb_tmp, &amp;si-&gt;alien, u.list) {</div><div class='del'>-		list_del(&amp;seb-&gt;u.list);</div><div class='del'>-		kmem_cache_free(si-&gt;scan_leb_slab, seb);</div><div class='add'>+	list_for_each_entry_safe(aeb, aeb_tmp, &amp;ai-&gt;alien, u.list) {</div><div class='add'>+		list_del(&amp;aeb-&gt;u.list);</div><div class='add'>+		kmem_cache_free(ai-&gt;aeb_slab_cache, aeb);</div><div class='ctx'> 	}</div><div class='del'>-	list_for_each_entry_safe(seb, seb_tmp, &amp;si-&gt;erase, u.list) {</div><div class='del'>-		list_del(&amp;seb-&gt;u.list);</div><div class='del'>-		kmem_cache_free(si-&gt;scan_leb_slab, seb);</div><div class='add'>+	list_for_each_entry_safe(aeb, aeb_tmp, &amp;ai-&gt;erase, u.list) {</div><div class='add'>+		list_del(&amp;aeb-&gt;u.list);</div><div class='add'>+		kmem_cache_free(ai-&gt;aeb_slab_cache, aeb);</div><div class='ctx'> 	}</div><div class='del'>-	list_for_each_entry_safe(seb, seb_tmp, &amp;si-&gt;corr, u.list) {</div><div class='del'>-		list_del(&amp;seb-&gt;u.list);</div><div class='del'>-		kmem_cache_free(si-&gt;scan_leb_slab, seb);</div><div class='add'>+	list_for_each_entry_safe(aeb, aeb_tmp, &amp;ai-&gt;corr, u.list) {</div><div class='add'>+		list_del(&amp;aeb-&gt;u.list);</div><div class='add'>+		kmem_cache_free(ai-&gt;aeb_slab_cache, aeb);</div><div class='ctx'> 	}</div><div class='del'>-	list_for_each_entry_safe(seb, seb_tmp, &amp;si-&gt;free, u.list) {</div><div class='del'>-		list_del(&amp;seb-&gt;u.list);</div><div class='del'>-		kmem_cache_free(si-&gt;scan_leb_slab, seb);</div><div class='add'>+	list_for_each_entry_safe(aeb, aeb_tmp, &amp;ai-&gt;free, u.list) {</div><div class='add'>+		list_del(&amp;aeb-&gt;u.list);</div><div class='add'>+		kmem_cache_free(ai-&gt;aeb_slab_cache, aeb);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Destroy the volume RB-tree */</div><div class='del'>-	rb = si-&gt;volumes.rb_node;</div><div class='add'>+	rb = ai-&gt;volumes.rb_node;</div><div class='ctx'> 	while (rb) {</div><div class='ctx'> 		if (rb-&gt;rb_left)</div><div class='ctx'> 			rb = rb-&gt;rb_left;</div><div class='ctx'> 		else if (rb-&gt;rb_right)</div><div class='ctx'> 			rb = rb-&gt;rb_right;</div><div class='ctx'> 		else {</div><div class='del'>-			sv = rb_entry(rb, struct ubi_scan_volume, rb);</div><div class='add'>+			av = rb_entry(rb, struct ubi_ainf_volume, rb);</div><div class='ctx'> </div><div class='ctx'> 			rb = rb_parent(rb);</div><div class='ctx'> 			if (rb) {</div><div class='del'>-				if (rb-&gt;rb_left == &amp;sv-&gt;rb)</div><div class='add'>+				if (rb-&gt;rb_left == &amp;av-&gt;rb)</div><div class='ctx'> 					rb-&gt;rb_left = NULL;</div><div class='ctx'> 				else</div><div class='ctx'> 					rb-&gt;rb_right = NULL;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			destroy_sv(si, sv);</div><div class='add'>+			destroy_av(ai, av);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (si-&gt;scan_leb_slab)</div><div class='del'>-		kmem_cache_destroy(si-&gt;scan_leb_slab);</div><div class='add'>+	if (ai-&gt;aeb_slab_cache)</div><div class='add'>+		kmem_cache_destroy(ai-&gt;aeb_slab_cache);</div><div class='ctx'> </div><div class='del'>-	kfree(si);</div><div class='add'>+	kfree(ai);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MTD_UBI_DEBUG</div><div class='del'>-</div><div class='ctx'> /**</div><div class='del'>- * paranoid_check_si - check the scanning information.</div><div class='add'>+ * self_check_ai - check the attaching information.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  *</div><div class='del'>- * This function returns zero if the scanning information is all right, and a</div><div class='add'>+ * This function returns zero if the attaching information is all right, and a</div><div class='ctx'>  * negative error code if not or if an error occurred.</div><div class='ctx'>  */</div><div class='del'>-static int paranoid_check_si(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='add'>+static int self_check_ai(struct ubi_device *ubi, struct ubi_attach_info *ai)</div><div class='ctx'> {</div><div class='ctx'> 	int pnum, err, vols_found = 0;</div><div class='ctx'> 	struct rb_node *rb1, *rb2;</div><div class='del'>-	struct ubi_scan_volume *sv;</div><div class='del'>-	struct ubi_scan_leb *seb, *last_seb;</div><div class='add'>+	struct ubi_ainf_volume *av;</div><div class='add'>+	struct ubi_ainf_peb *aeb, *last_aeb;</div><div class='ctx'> 	uint8_t *buf;</div><div class='ctx'> </div><div class='ctx'> 	if (!ubi-&gt;dbg-&gt;chk_gen)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * At first, check that scanning information is OK.</div><div class='add'>+	 * At first, check that attaching information is OK.</div><div class='ctx'> 	 */</div><div class='del'>-	ubi_rb_for_each_entry(rb1, sv, &amp;si-&gt;volumes, rb) {</div><div class='add'>+	ubi_rb_for_each_entry(rb1, av, &amp;ai-&gt;volumes, rb) {</div><div class='ctx'> 		int leb_count = 0;</div><div class='ctx'> </div><div class='ctx'> 		cond_resched();</div><div class='ctx'> </div><div class='ctx'> 		vols_found += 1;</div><div class='ctx'> </div><div class='del'>-		if (si-&gt;is_empty) {</div><div class='add'>+		if (ai-&gt;is_empty) {</div><div class='ctx'> 			ubi_err("bad is_empty flag");</div><div class='del'>-			goto bad_sv;</div><div class='add'>+			goto bad_av;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (sv-&gt;vol_id &lt; 0 || sv-&gt;highest_lnum &lt; 0 ||</div><div class='del'>-		    sv-&gt;leb_count &lt; 0 || sv-&gt;vol_type &lt; 0 || sv-&gt;used_ebs &lt; 0 ||</div><div class='del'>-		    sv-&gt;data_pad &lt; 0 || sv-&gt;last_data_size &lt; 0) {</div><div class='add'>+		if (av-&gt;vol_id &lt; 0 || av-&gt;highest_lnum &lt; 0 ||</div><div class='add'>+		    av-&gt;leb_count &lt; 0 || av-&gt;vol_type &lt; 0 || av-&gt;used_ebs &lt; 0 ||</div><div class='add'>+		    av-&gt;data_pad &lt; 0 || av-&gt;last_data_size &lt; 0) {</div><div class='ctx'> 			ubi_err("negative values");</div><div class='del'>-			goto bad_sv;</div><div class='add'>+			goto bad_av;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (sv-&gt;vol_id &gt;= UBI_MAX_VOLUMES &amp;&amp;</div><div class='del'>-		    sv-&gt;vol_id &lt; UBI_INTERNAL_VOL_START) {</div><div class='add'>+		if (av-&gt;vol_id &gt;= UBI_MAX_VOLUMES &amp;&amp;</div><div class='add'>+		    av-&gt;vol_id &lt; UBI_INTERNAL_VOL_START) {</div><div class='ctx'> 			ubi_err("bad vol_id");</div><div class='del'>-			goto bad_sv;</div><div class='add'>+			goto bad_av;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (sv-&gt;vol_id &gt; si-&gt;highest_vol_id) {</div><div class='add'>+		if (av-&gt;vol_id &gt; ai-&gt;highest_vol_id) {</div><div class='ctx'> 			ubi_err("highest_vol_id is %d, but vol_id %d is there",</div><div class='del'>-				si-&gt;highest_vol_id, sv-&gt;vol_id);</div><div class='add'>+				ai-&gt;highest_vol_id, av-&gt;vol_id);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (sv-&gt;vol_type != UBI_DYNAMIC_VOLUME &amp;&amp;</div><div class='del'>-		    sv-&gt;vol_type != UBI_STATIC_VOLUME) {</div><div class='add'>+		if (av-&gt;vol_type != UBI_DYNAMIC_VOLUME &amp;&amp;</div><div class='add'>+		    av-&gt;vol_type != UBI_STATIC_VOLUME) {</div><div class='ctx'> 			ubi_err("bad vol_type");</div><div class='del'>-			goto bad_sv;</div><div class='add'>+			goto bad_av;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (sv-&gt;data_pad &gt; ubi-&gt;leb_size / 2) {</div><div class='add'>+		if (av-&gt;data_pad &gt; ubi-&gt;leb_size / 2) {</div><div class='ctx'> 			ubi_err("bad data_pad");</div><div class='del'>-			goto bad_sv;</div><div class='add'>+			goto bad_av;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		last_seb = NULL;</div><div class='del'>-		ubi_rb_for_each_entry(rb2, seb, &amp;sv-&gt;root, u.rb) {</div><div class='add'>+		last_aeb = NULL;</div><div class='add'>+		ubi_rb_for_each_entry(rb2, aeb, &amp;av-&gt;root, u.rb) {</div><div class='ctx'> 			cond_resched();</div><div class='ctx'> </div><div class='del'>-			last_seb = seb;</div><div class='add'>+			last_aeb = aeb;</div><div class='ctx'> 			leb_count += 1;</div><div class='ctx'> </div><div class='del'>-			if (seb-&gt;pnum &lt; 0 || seb-&gt;ec &lt; 0) {</div><div class='add'>+			if (aeb-&gt;pnum &lt; 0 || aeb-&gt;ec &lt; 0) {</div><div class='ctx'> 				ubi_err("negative values");</div><div class='del'>-				goto bad_seb;</div><div class='add'>+				goto bad_aeb;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (seb-&gt;ec &lt; si-&gt;min_ec) {</div><div class='del'>-				ubi_err("bad si-&gt;min_ec (%d), %d found",</div><div class='del'>-					si-&gt;min_ec, seb-&gt;ec);</div><div class='del'>-				goto bad_seb;</div><div class='add'>+			if (aeb-&gt;ec &lt; ai-&gt;min_ec) {</div><div class='add'>+				ubi_err("bad ai-&gt;min_ec (%d), %d found",</div><div class='add'>+					ai-&gt;min_ec, aeb-&gt;ec);</div><div class='add'>+				goto bad_aeb;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (seb-&gt;ec &gt; si-&gt;max_ec) {</div><div class='del'>-				ubi_err("bad si-&gt;max_ec (%d), %d found",</div><div class='del'>-					si-&gt;max_ec, seb-&gt;ec);</div><div class='del'>-				goto bad_seb;</div><div class='add'>+			if (aeb-&gt;ec &gt; ai-&gt;max_ec) {</div><div class='add'>+				ubi_err("bad ai-&gt;max_ec (%d), %d found",</div><div class='add'>+					ai-&gt;max_ec, aeb-&gt;ec);</div><div class='add'>+				goto bad_aeb;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (seb-&gt;pnum &gt;= ubi-&gt;peb_count) {</div><div class='add'>+			if (aeb-&gt;pnum &gt;= ubi-&gt;peb_count) {</div><div class='ctx'> 				ubi_err("too high PEB number %d, total PEBs %d",</div><div class='del'>-					seb-&gt;pnum, ubi-&gt;peb_count);</div><div class='del'>-				goto bad_seb;</div><div class='add'>+					aeb-&gt;pnum, ubi-&gt;peb_count);</div><div class='add'>+				goto bad_aeb;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (sv-&gt;vol_type == UBI_STATIC_VOLUME) {</div><div class='del'>-				if (seb-&gt;lnum &gt;= sv-&gt;used_ebs) {</div><div class='add'>+			if (av-&gt;vol_type == UBI_STATIC_VOLUME) {</div><div class='add'>+				if (aeb-&gt;lnum &gt;= av-&gt;used_ebs) {</div><div class='ctx'> 					ubi_err("bad lnum or used_ebs");</div><div class='del'>-					goto bad_seb;</div><div class='add'>+					goto bad_aeb;</div><div class='ctx'> 				}</div><div class='ctx'> 			} else {</div><div class='del'>-				if (sv-&gt;used_ebs != 0) {</div><div class='add'>+				if (av-&gt;used_ebs != 0) {</div><div class='ctx'> 					ubi_err("non-zero used_ebs");</div><div class='del'>-					goto bad_seb;</div><div class='add'>+					goto bad_aeb;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (seb-&gt;lnum &gt; sv-&gt;highest_lnum) {</div><div class='add'>+			if (aeb-&gt;lnum &gt; av-&gt;highest_lnum) {</div><div class='ctx'> 				ubi_err("incorrect highest_lnum or lnum");</div><div class='del'>-				goto bad_seb;</div><div class='add'>+				goto bad_aeb;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (sv-&gt;leb_count != leb_count) {</div><div class='add'>+		if (av-&gt;leb_count != leb_count) {</div><div class='ctx'> 			ubi_err("bad leb_count, %d objects in the tree",</div><div class='ctx'> 				leb_count);</div><div class='del'>-			goto bad_sv;</div><div class='add'>+			goto bad_av;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (!last_seb)</div><div class='add'>+		if (!last_aeb)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		seb = last_seb;</div><div class='add'>+		aeb = last_aeb;</div><div class='ctx'> </div><div class='del'>-		if (seb-&gt;lnum != sv-&gt;highest_lnum) {</div><div class='add'>+		if (aeb-&gt;lnum != av-&gt;highest_lnum) {</div><div class='ctx'> 			ubi_err("bad highest_lnum");</div><div class='del'>-			goto bad_seb;</div><div class='add'>+			goto bad_aeb;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (vols_found != si-&gt;vols_found) {</div><div class='del'>-		ubi_err("bad si-&gt;vols_found %d, should be %d",</div><div class='del'>-			si-&gt;vols_found, vols_found);</div><div class='add'>+	if (vols_found != ai-&gt;vols_found) {</div><div class='add'>+		ubi_err("bad ai-&gt;vols_found %d, should be %d",</div><div class='add'>+			ai-&gt;vols_found, vols_found);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Check that scanning information is correct */</div><div class='del'>-	ubi_rb_for_each_entry(rb1, sv, &amp;si-&gt;volumes, rb) {</div><div class='del'>-		last_seb = NULL;</div><div class='del'>-		ubi_rb_for_each_entry(rb2, seb, &amp;sv-&gt;root, u.rb) {</div><div class='add'>+	/* Check that attaching information is correct */</div><div class='add'>+	ubi_rb_for_each_entry(rb1, av, &amp;ai-&gt;volumes, rb) {</div><div class='add'>+		last_aeb = NULL;</div><div class='add'>+		ubi_rb_for_each_entry(rb2, aeb, &amp;av-&gt;root, u.rb) {</div><div class='ctx'> 			int vol_type;</div><div class='ctx'> </div><div class='ctx'> 			cond_resched();</div><div class='ctx'> </div><div class='del'>-			last_seb = seb;</div><div class='add'>+			last_aeb = aeb;</div><div class='ctx'> </div><div class='del'>-			err = ubi_io_read_vid_hdr(ubi, seb-&gt;pnum, vidh, 1);</div><div class='add'>+			err = ubi_io_read_vid_hdr(ubi, aeb-&gt;pnum, vidh, 1);</div><div class='ctx'> 			if (err &amp;&amp; err != UBI_IO_BITFLIPS) {</div><div class='ctx'> 				ubi_err("VID header is not OK (%d)", err);</div><div class='ctx'> 				if (err &gt; 0)</div><div class='hunk'>@@ -1486,52 +1514,52 @@ static int paranoid_check_si(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> </div><div class='ctx'> 			vol_type = vidh-&gt;vol_type == UBI_VID_DYNAMIC ?</div><div class='ctx'> 				   UBI_DYNAMIC_VOLUME : UBI_STATIC_VOLUME;</div><div class='del'>-			if (sv-&gt;vol_type != vol_type) {</div><div class='add'>+			if (av-&gt;vol_type != vol_type) {</div><div class='ctx'> 				ubi_err("bad vol_type");</div><div class='ctx'> 				goto bad_vid_hdr;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (seb-&gt;sqnum != be64_to_cpu(vidh-&gt;sqnum)) {</div><div class='del'>-				ubi_err("bad sqnum %llu", seb-&gt;sqnum);</div><div class='add'>+			if (aeb-&gt;sqnum != be64_to_cpu(vidh-&gt;sqnum)) {</div><div class='add'>+				ubi_err("bad sqnum %llu", aeb-&gt;sqnum);</div><div class='ctx'> 				goto bad_vid_hdr;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (sv-&gt;vol_id != be32_to_cpu(vidh-&gt;vol_id)) {</div><div class='del'>-				ubi_err("bad vol_id %d", sv-&gt;vol_id);</div><div class='add'>+			if (av-&gt;vol_id != be32_to_cpu(vidh-&gt;vol_id)) {</div><div class='add'>+				ubi_err("bad vol_id %d", av-&gt;vol_id);</div><div class='ctx'> 				goto bad_vid_hdr;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (sv-&gt;compat != vidh-&gt;compat) {</div><div class='add'>+			if (av-&gt;compat != vidh-&gt;compat) {</div><div class='ctx'> 				ubi_err("bad compat %d", vidh-&gt;compat);</div><div class='ctx'> 				goto bad_vid_hdr;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (seb-&gt;lnum != be32_to_cpu(vidh-&gt;lnum)) {</div><div class='del'>-				ubi_err("bad lnum %d", seb-&gt;lnum);</div><div class='add'>+			if (aeb-&gt;lnum != be32_to_cpu(vidh-&gt;lnum)) {</div><div class='add'>+				ubi_err("bad lnum %d", aeb-&gt;lnum);</div><div class='ctx'> 				goto bad_vid_hdr;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (sv-&gt;used_ebs != be32_to_cpu(vidh-&gt;used_ebs)) {</div><div class='del'>-				ubi_err("bad used_ebs %d", sv-&gt;used_ebs);</div><div class='add'>+			if (av-&gt;used_ebs != be32_to_cpu(vidh-&gt;used_ebs)) {</div><div class='add'>+				ubi_err("bad used_ebs %d", av-&gt;used_ebs);</div><div class='ctx'> 				goto bad_vid_hdr;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (sv-&gt;data_pad != be32_to_cpu(vidh-&gt;data_pad)) {</div><div class='del'>-				ubi_err("bad data_pad %d", sv-&gt;data_pad);</div><div class='add'>+			if (av-&gt;data_pad != be32_to_cpu(vidh-&gt;data_pad)) {</div><div class='add'>+				ubi_err("bad data_pad %d", av-&gt;data_pad);</div><div class='ctx'> 				goto bad_vid_hdr;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (!last_seb)</div><div class='add'>+		if (!last_aeb)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (sv-&gt;highest_lnum != be32_to_cpu(vidh-&gt;lnum)) {</div><div class='del'>-			ubi_err("bad highest_lnum %d", sv-&gt;highest_lnum);</div><div class='add'>+		if (av-&gt;highest_lnum != be32_to_cpu(vidh-&gt;lnum)) {</div><div class='add'>+			ubi_err("bad highest_lnum %d", av-&gt;highest_lnum);</div><div class='ctx'> 			goto bad_vid_hdr;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (sv-&gt;last_data_size != be32_to_cpu(vidh-&gt;data_size)) {</div><div class='del'>-			ubi_err("bad last_data_size %d", sv-&gt;last_data_size);</div><div class='add'>+		if (av-&gt;last_data_size != be32_to_cpu(vidh-&gt;data_size)) {</div><div class='add'>+			ubi_err("bad last_data_size %d", av-&gt;last_data_size);</div><div class='ctx'> 			goto bad_vid_hdr;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1553,21 +1581,21 @@ static int paranoid_check_si(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> 			buf[pnum] = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ubi_rb_for_each_entry(rb1, sv, &amp;si-&gt;volumes, rb)</div><div class='del'>-		ubi_rb_for_each_entry(rb2, seb, &amp;sv-&gt;root, u.rb)</div><div class='del'>-			buf[seb-&gt;pnum] = 1;</div><div class='add'>+	ubi_rb_for_each_entry(rb1, av, &amp;ai-&gt;volumes, rb)</div><div class='add'>+		ubi_rb_for_each_entry(rb2, aeb, &amp;av-&gt;root, u.rb)</div><div class='add'>+			buf[aeb-&gt;pnum] = 1;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(seb, &amp;si-&gt;free, u.list)</div><div class='del'>-		buf[seb-&gt;pnum] = 1;</div><div class='add'>+	list_for_each_entry(aeb, &amp;ai-&gt;free, u.list)</div><div class='add'>+		buf[aeb-&gt;pnum] = 1;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(seb, &amp;si-&gt;corr, u.list)</div><div class='del'>-		buf[seb-&gt;pnum] = 1;</div><div class='add'>+	list_for_each_entry(aeb, &amp;ai-&gt;corr, u.list)</div><div class='add'>+		buf[aeb-&gt;pnum] = 1;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(seb, &amp;si-&gt;erase, u.list)</div><div class='del'>-		buf[seb-&gt;pnum] = 1;</div><div class='add'>+	list_for_each_entry(aeb, &amp;ai-&gt;erase, u.list)</div><div class='add'>+		buf[aeb-&gt;pnum] = 1;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(seb, &amp;si-&gt;alien, u.list)</div><div class='del'>-		buf[seb-&gt;pnum] = 1;</div><div class='add'>+	list_for_each_entry(aeb, &amp;ai-&gt;alien, u.list)</div><div class='add'>+		buf[aeb-&gt;pnum] = 1;</div><div class='ctx'> </div><div class='ctx'> 	err = 0;</div><div class='ctx'> 	for (pnum = 0; pnum &lt; ubi-&gt;peb_count; pnum++)</div><div class='hunk'>@@ -1581,25 +1609,23 @@ static int paranoid_check_si(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-bad_seb:</div><div class='del'>-	ubi_err("bad scanning information about LEB %d", seb-&gt;lnum);</div><div class='del'>-	ubi_dbg_dump_seb(seb, 0);</div><div class='del'>-	ubi_dbg_dump_sv(sv);</div><div class='add'>+bad_aeb:</div><div class='add'>+	ubi_err("bad attaching information about LEB %d", aeb-&gt;lnum);</div><div class='add'>+	ubi_dump_aeb(aeb, 0);</div><div class='add'>+	ubi_dump_av(av);</div><div class='ctx'> 	goto out;</div><div class='ctx'> </div><div class='del'>-bad_sv:</div><div class='del'>-	ubi_err("bad scanning information about volume %d", sv-&gt;vol_id);</div><div class='del'>-	ubi_dbg_dump_sv(sv);</div><div class='add'>+bad_av:</div><div class='add'>+	ubi_err("bad attaching information about volume %d", av-&gt;vol_id);</div><div class='add'>+	ubi_dump_av(av);</div><div class='ctx'> 	goto out;</div><div class='ctx'> </div><div class='ctx'> bad_vid_hdr:</div><div class='del'>-	ubi_err("bad scanning information about volume %d", sv-&gt;vol_id);</div><div class='del'>-	ubi_dbg_dump_sv(sv);</div><div class='del'>-	ubi_dbg_dump_vid_hdr(vidh);</div><div class='add'>+	ubi_err("bad attaching information about volume %d", av-&gt;vol_id);</div><div class='add'>+	ubi_dump_av(av);</div><div class='add'>+	ubi_dump_vid_hdr(vidh);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	ubi_dbg_dump_stack();</div><div class='add'>+	dump_stack();</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MTD_UBI_DEBUG */</div><div class='head'>diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c<br/>index 0fde9fc7d2e5..2c5ed5ca9c33 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/build.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/build.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/build.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/build.c</a></div><div class='hunk'>@@ -27,10 +27,6 @@</div><div class='ctx'>  * module load parameters or the kernel boot parameters. If MTD devices were</div><div class='ctx'>  * specified, UBI does not attach any MTD device, but it is possible to do</div><div class='ctx'>  * later using the "UBI control device".</div><div class='del'>- *</div><div class='del'>- * At the moment we only attach UBI devices by scanning, which will become a</div><div class='del'>- * bottleneck when flashes reach certain large size. Then one may improve UBI</div><div class='del'>- * and add other methods, although it does not seem to be easy to do.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='hunk'>@@ -554,10 +550,10 @@ static void uif_close(struct ubi_device *ubi)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * free_internal_volumes - free internal volumes.</div><div class='add'>+ * ubi_free_internal_volumes - free internal volumes.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  */</div><div class='del'>-static void free_internal_volumes(struct ubi_device *ubi)</div><div class='add'>+void ubi_free_internal_volumes(struct ubi_device *ubi)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -569,59 +565,6 @@ static void free_internal_volumes(struct ubi_device *ubi)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * attach_by_scanning - attach an MTD device using scanning method.</div><div class='del'>- * @ubi: UBI device descriptor</div><div class='del'>- *</div><div class='del'>- * This function returns zero in case of success and a negative error code in</div><div class='del'>- * case of failure.</div><div class='del'>- *</div><div class='del'>- * Note, currently this is the only method to attach UBI devices. Hopefully in</div><div class='del'>- * the future we'll have more scalable attaching methods and avoid full media</div><div class='del'>- * scanning. But even in this case scanning will be needed as a fall-back</div><div class='del'>- * attaching method if there are some on-flash table corruptions.</div><div class='del'>- */</div><div class='del'>-static int attach_by_scanning(struct ubi_device *ubi)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	struct ubi_scan_info *si;</div><div class='del'>-</div><div class='del'>-	si = ubi_scan(ubi);</div><div class='del'>-	if (IS_ERR(si))</div><div class='del'>-		return PTR_ERR(si);</div><div class='del'>-</div><div class='del'>-	ubi-&gt;bad_peb_count = si-&gt;bad_peb_count;</div><div class='del'>-	ubi-&gt;good_peb_count = ubi-&gt;peb_count - ubi-&gt;bad_peb_count;</div><div class='del'>-	ubi-&gt;corr_peb_count = si-&gt;corr_peb_count;</div><div class='del'>-	ubi-&gt;max_ec = si-&gt;max_ec;</div><div class='del'>-	ubi-&gt;mean_ec = si-&gt;mean_ec;</div><div class='del'>-	ubi_msg("max. sequence number:       %llu", si-&gt;max_sqnum);</div><div class='del'>-</div><div class='del'>-	err = ubi_read_volume_table(ubi, si);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_si;</div><div class='del'>-</div><div class='del'>-	err = ubi_wl_init_scan(ubi, si);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_vtbl;</div><div class='del'>-</div><div class='del'>-	err = ubi_eba_init_scan(ubi, si);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_wl;</div><div class='del'>-</div><div class='del'>-	ubi_scan_destroy_si(si);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_wl:</div><div class='del'>-	ubi_wl_close(ubi);</div><div class='del'>-out_vtbl:</div><div class='del'>-	free_internal_volumes(ubi);</div><div class='del'>-	vfree(ubi-&gt;vtbl);</div><div class='del'>-out_si:</div><div class='del'>-	ubi_scan_destroy_si(si);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * io_init - initialize I/O sub-system for a given UBI device.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  *</div><div class='hunk'>@@ -790,11 +733,11 @@ static int io_init(struct ubi_device *ubi)</div><div class='ctx'> 	ubi_msg("data offset:                %d", ubi-&gt;leb_start);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Note, ideally, we have to initialize ubi-&gt;bad_peb_count here. But</div><div class='add'>+	 * Note, ideally, we have to initialize @ubi-&gt;bad_peb_count here. But</div><div class='ctx'> 	 * unfortunately, MTD does not provide this information. We should loop</div><div class='ctx'> 	 * over all physical eraseblocks and invoke mtd-&gt;block_is_bad() for</div><div class='del'>-	 * each physical eraseblock. So, we skip ubi-&gt;bad_peb_count</div><div class='del'>-	 * uninitialized and initialize it after scanning.</div><div class='add'>+	 * each physical eraseblock. So, we leave @ubi-&gt;bad_peb_count</div><div class='add'>+	 * uninitialized so far.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -805,7 +748,7 @@ static int io_init(struct ubi_device *ubi)</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @vol_id: ID of the volume to re-size</div><div class='ctx'>  *</div><div class='del'>- * This function re-sizes the volume marked by the @UBI_VTBL_AUTORESIZE_FLG in</div><div class='add'>+ * This function re-sizes the volume marked by the %UBI_VTBL_AUTORESIZE_FLG in</div><div class='ctx'>  * the volume table to the largest possible size. See comments in ubi-header.h</div><div class='ctx'>  * for more description of the flag. Returns zero in case of success and a</div><div class='ctx'>  * negative error code in case of failure.</div><div class='hunk'>@@ -881,7 +824,7 @@ int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num, int vid_hdr_offset)</div><div class='ctx'> 	for (i = 0; i &lt; UBI_MAX_DEVICES; i++) {</div><div class='ctx'> 		ubi = ubi_devices[i];</div><div class='ctx'> 		if (ubi &amp;&amp; mtd-&gt;index == ubi-&gt;mtd-&gt;index) {</div><div class='del'>-			dbg_err("mtd%d is already attached to ubi%d",</div><div class='add'>+			ubi_err("mtd%d is already attached to ubi%d",</div><div class='ctx'> 				mtd-&gt;index, i);</div><div class='ctx'> 			return -EEXIST;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -907,7 +850,7 @@ int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num, int vid_hdr_offset)</div><div class='ctx'> 			if (!ubi_devices[ubi_num])</div><div class='ctx'> 				break;</div><div class='ctx'> 		if (ubi_num == UBI_MAX_DEVICES) {</div><div class='del'>-			dbg_err("only %d UBI devices may be created",</div><div class='add'>+			ubi_err("only %d UBI devices may be created",</div><div class='ctx'> 				UBI_MAX_DEVICES);</div><div class='ctx'> 			return -ENFILE;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -917,7 +860,7 @@ int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num, int vid_hdr_offset)</div><div class='ctx'> </div><div class='ctx'> 		/* Make sure ubi_num is not busy */</div><div class='ctx'> 		if (ubi_devices[ubi_num]) {</div><div class='del'>-			dbg_err("ubi%d already exists", ubi_num);</div><div class='add'>+			ubi_err("ubi%d already exists", ubi_num);</div><div class='ctx'> 			return -EEXIST;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -937,7 +880,7 @@ int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num, int vid_hdr_offset)</div><div class='ctx'> 	spin_lock_init(&amp;ubi-&gt;volumes_lock);</div><div class='ctx'> </div><div class='ctx'> 	ubi_msg("attaching mtd%d to ubi%d", mtd-&gt;index, ubi_num);</div><div class='del'>-	dbg_msg("sizeof(struct ubi_scan_leb) %zu", sizeof(struct ubi_scan_leb));</div><div class='add'>+	dbg_msg("sizeof(struct ubi_ainf_peb) %zu", sizeof(struct ubi_ainf_peb));</div><div class='ctx'> 	dbg_msg("sizeof(struct ubi_wl_entry) %zu", sizeof(struct ubi_wl_entry));</div><div class='ctx'> </div><div class='ctx'> 	err = io_init(ubi);</div><div class='hunk'>@@ -953,9 +896,9 @@ int ubi_attach_mtd_dev(struct mtd_info *mtd, int ubi_num, int vid_hdr_offset)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> </div><div class='del'>-	err = attach_by_scanning(ubi);</div><div class='add'>+	err = ubi_attach(ubi);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dbg_err("failed to attach by scanning, error %d", err);</div><div class='add'>+		ubi_err("failed to attach mtd%d, error %d", mtd-&gt;index, err);</div><div class='ctx'> 		goto out_debugging;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1020,7 +963,7 @@ out_uif:</div><div class='ctx'> 	uif_close(ubi);</div><div class='ctx'> out_detach:</div><div class='ctx'> 	ubi_wl_close(ubi);</div><div class='del'>-	free_internal_volumes(ubi);</div><div class='add'>+	ubi_free_internal_volumes(ubi);</div><div class='ctx'> 	vfree(ubi-&gt;vtbl);</div><div class='ctx'> out_debugging:</div><div class='ctx'> 	ubi_debugging_exit_dev(ubi);</div><div class='hunk'>@@ -1092,7 +1035,7 @@ int ubi_detach_mtd_dev(int ubi_num, int anyway)</div><div class='ctx'> 	ubi_debugfs_exit_dev(ubi);</div><div class='ctx'> 	uif_close(ubi);</div><div class='ctx'> 	ubi_wl_close(ubi);</div><div class='del'>-	free_internal_volumes(ubi);</div><div class='add'>+	ubi_free_internal_volumes(ubi);</div><div class='ctx'> 	vfree(ubi-&gt;vtbl);</div><div class='ctx'> 	put_mtd_device(ubi-&gt;mtd);</div><div class='ctx'> 	ubi_debugging_exit_dev(ubi);</div><div class='head'>diff --git a/drivers/mtd/ubi/cdev.c b/drivers/mtd/ubi/cdev.c<br/>index ad76592fb2f4..acec85deb6af 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/cdev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/cdev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/cdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/cdev.c</a></div><div class='hunk'>@@ -63,7 +63,7 @@ static int get_exclusive(struct ubi_volume_desc *desc)</div><div class='ctx'> 	users = vol-&gt;readers + vol-&gt;writers + vol-&gt;exclusive;</div><div class='ctx'> 	ubi_assert(users &gt; 0);</div><div class='ctx'> 	if (users &gt; 1) {</div><div class='del'>-		dbg_err("%d users for volume %d", users, vol-&gt;vol_id);</div><div class='add'>+		ubi_err("%d users for volume %d", users, vol-&gt;vol_id);</div><div class='ctx'> 		err = -EBUSY;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		vol-&gt;readers = vol-&gt;writers = 0;</div><div class='hunk'>@@ -159,7 +159,7 @@ static loff_t vol_cdev_llseek(struct file *file, loff_t offset, int origin)</div><div class='ctx'> </div><div class='ctx'> 	if (vol-&gt;updating) {</div><div class='ctx'> 		/* Update is in progress, seeking is prohibited */</div><div class='del'>-		dbg_err("updating");</div><div class='add'>+		ubi_err("updating");</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -178,7 +178,7 @@ static loff_t vol_cdev_llseek(struct file *file, loff_t offset, int origin)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (new_offset &lt; 0 || new_offset &gt; vol-&gt;used_bytes) {</div><div class='del'>-		dbg_err("bad seek %lld", new_offset);</div><div class='add'>+		ubi_err("bad seek %lld", new_offset);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -216,11 +216,11 @@ static ssize_t vol_cdev_read(struct file *file, __user char *buf, size_t count,</div><div class='ctx'> 		count, *offp, vol-&gt;vol_id);</div><div class='ctx'> </div><div class='ctx'> 	if (vol-&gt;updating) {</div><div class='del'>-		dbg_err("updating");</div><div class='add'>+		ubi_err("updating");</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (vol-&gt;upd_marker) {</div><div class='del'>-		dbg_err("damaged volume, update marker is set");</div><div class='add'>+		ubi_err("damaged volume, update marker is set");</div><div class='ctx'> 		return -EBADF;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (*offp == vol-&gt;used_bytes || count == 0)</div><div class='hunk'>@@ -300,7 +300,7 @@ static ssize_t vol_cdev_direct_write(struct file *file, const char __user *buf,</div><div class='ctx'> </div><div class='ctx'> 	lnum = div_u64_rem(*offp, vol-&gt;usable_leb_size, &amp;off);</div><div class='ctx'> 	if (off &amp; (ubi-&gt;min_io_size - 1)) {</div><div class='del'>-		dbg_err("unaligned position");</div><div class='add'>+		ubi_err("unaligned position");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -309,7 +309,7 @@ static ssize_t vol_cdev_direct_write(struct file *file, const char __user *buf,</div><div class='ctx'> </div><div class='ctx'> 	/* We can write only in fractions of the minimum I/O unit */</div><div class='ctx'> 	if (count &amp; (ubi-&gt;min_io_size - 1)) {</div><div class='del'>-		dbg_err("unaligned write length");</div><div class='add'>+		ubi_err("unaligned write length");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -334,8 +334,7 @@ static ssize_t vol_cdev_direct_write(struct file *file, const char __user *buf,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		err = ubi_eba_write_leb(ubi, vol, lnum, tbuf, off, len,</div><div class='del'>-					UBI_UNKNOWN);</div><div class='add'>+		err = ubi_eba_write_leb(ubi, vol, lnum, tbuf, off, len);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -477,9 +476,6 @@ static long vol_cdev_ioctl(struct file *file, unsigned int cmd,</div><div class='ctx'> 		if (req.lnum &lt; 0 || req.lnum &gt;= vol-&gt;reserved_pebs ||</div><div class='ctx'> 		    req.bytes &lt; 0 || req.lnum &gt;= vol-&gt;usable_leb_size)</div><div class='ctx'> 			break;</div><div class='del'>-		if (req.dtype != UBI_LONGTERM &amp;&amp; req.dtype != UBI_SHORTTERM &amp;&amp;</div><div class='del'>-		    req.dtype != UBI_UNKNOWN)</div><div class='del'>-			break;</div><div class='ctx'> </div><div class='ctx'> 		err = get_exclusive(desc);</div><div class='ctx'> 		if (err &lt; 0)</div><div class='hunk'>@@ -518,7 +514,7 @@ static long vol_cdev_ioctl(struct file *file, unsigned int cmd,</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		err = ubi_wl_flush(ubi);</div><div class='add'>+		err = ubi_wl_flush(ubi, UBI_ALL, UBI_ALL);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -532,7 +528,7 @@ static long vol_cdev_ioctl(struct file *file, unsigned int cmd,</div><div class='ctx'> 			err = -EFAULT;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		err = ubi_leb_map(desc, req.lnum, req.dtype);</div><div class='add'>+		err = ubi_leb_map(desc, req.lnum);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -647,8 +643,8 @@ static int verify_mkvol_req(const struct ubi_device *ubi,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> bad:</div><div class='del'>-	dbg_err("bad volume creation request");</div><div class='del'>-	ubi_dbg_dump_mkvol_req(req);</div><div class='add'>+	ubi_err("bad volume creation request");</div><div class='add'>+	ubi_dump_mkvol_req(req);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -713,12 +709,12 @@ static int rename_volumes(struct ubi_device *ubi,</div><div class='ctx'> 	for (i = 0; i &lt; req-&gt;count - 1; i++) {</div><div class='ctx'> 		for (n = i + 1; n &lt; req-&gt;count; n++) {</div><div class='ctx'> 			if (req-&gt;ents[i].vol_id == req-&gt;ents[n].vol_id) {</div><div class='del'>-				dbg_err("duplicated volume id %d",</div><div class='add'>+				ubi_err("duplicated volume id %d",</div><div class='ctx'> 					req-&gt;ents[i].vol_id);</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (!strcmp(req-&gt;ents[i].name, req-&gt;ents[n].name)) {</div><div class='del'>-				dbg_err("duplicated volume name \"%s\"",</div><div class='add'>+				ubi_err("duplicated volume name \"%s\"",</div><div class='ctx'> 					req-&gt;ents[i].name);</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -741,7 +737,7 @@ static int rename_volumes(struct ubi_device *ubi,</div><div class='ctx'> 		re-&gt;desc = ubi_open_volume(ubi-&gt;ubi_num, vol_id, UBI_EXCLUSIVE);</div><div class='ctx'> 		if (IS_ERR(re-&gt;desc)) {</div><div class='ctx'> 			err = PTR_ERR(re-&gt;desc);</div><div class='del'>-			dbg_err("cannot open volume %d, error %d", vol_id, err);</div><div class='add'>+			ubi_err("cannot open volume %d, error %d", vol_id, err);</div><div class='ctx'> 			kfree(re);</div><div class='ctx'> 			goto out_free;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -800,7 +796,7 @@ static int rename_volumes(struct ubi_device *ubi,</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			/* The volume exists but busy, or an error occurred */</div><div class='del'>-			dbg_err("cannot open volume \"%s\", error %d",</div><div class='add'>+			ubi_err("cannot open volume \"%s\", error %d",</div><div class='ctx'> 				re-&gt;new_name, err);</div><div class='ctx'> 			goto out_free;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/mtd/ubi/debug.c b/drivers/mtd/ubi/debug.c<br/>index 61af9bb560ab..09d4f8d9d592 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/debug.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/debug.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/debug.c</a></div><div class='hunk'>@@ -18,24 +18,49 @@</div><div class='ctx'>  * Author: Artem Bityutskiy (Битюцкий Артём)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Here we keep all the UBI debugging stuff which should normally be disabled</div><div class='del'>- * and compiled-out, but it is extremely helpful when hunting bugs or doing big</div><div class='del'>- * changes.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_MTD_UBI_DEBUG</div><div class='del'>-</div><div class='ctx'> #include "ubi.h"</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ubi_dump_flash - dump a region of flash.</div><div class='add'>+ * @ubi: UBI device description object</div><div class='add'>+ * @pnum: the physical eraseblock number to dump</div><div class='add'>+ * @offset: the starting offset within the physical eraseblock to dump</div><div class='add'>+ * @len: the length of the region to dump</div><div class='add'>+ */</div><div class='add'>+void ubi_dump_flash(struct ubi_device *ubi, int pnum, int offset, int len)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	size_t read;</div><div class='add'>+	void *buf;</div><div class='add'>+	loff_t addr = (loff_t)pnum * ubi-&gt;peb_size + offset;</div><div class='add'>+</div><div class='add'>+	buf = vmalloc(len);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return;</div><div class='add'>+	err = mtd_read(ubi-&gt;mtd, addr, len, &amp;read, buf);</div><div class='add'>+	if (err &amp;&amp; err != -EUCLEAN) {</div><div class='add'>+		ubi_err("error %d while reading %d bytes from PEB %d:%d, "</div><div class='add'>+			"read %zd bytes", err, len, pnum, offset, read);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ubi_msg("dumping %d bytes of data from PEB %d, offset %d",</div><div class='add'>+		len, pnum, offset);</div><div class='add'>+	print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1, buf, len, 1);</div><div class='add'>+out:</div><div class='add'>+	vfree(buf);</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='del'>- * ubi_dbg_dump_ec_hdr - dump an erase counter header.</div><div class='add'>+ * ubi_dump_ec_hdr - dump an erase counter header.</div><div class='ctx'>  * @ec_hdr: the erase counter header to dump</div><div class='ctx'>  */</div><div class='del'>-void ubi_dbg_dump_ec_hdr(const struct ubi_ec_hdr *ec_hdr)</div><div class='add'>+void ubi_dump_ec_hdr(const struct ubi_ec_hdr *ec_hdr)</div><div class='ctx'> {</div><div class='ctx'> 	printk(KERN_DEBUG "Erase counter header dump:\n");</div><div class='ctx'> 	printk(KERN_DEBUG "\tmagic          %#08x\n",</div><div class='hunk'>@@ -57,10 +82,10 @@ void ubi_dbg_dump_ec_hdr(const struct ubi_ec_hdr *ec_hdr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_dbg_dump_vid_hdr - dump a volume identifier header.</div><div class='add'>+ * ubi_dump_vid_hdr - dump a volume identifier header.</div><div class='ctx'>  * @vid_hdr: the volume identifier header to dump</div><div class='ctx'>  */</div><div class='del'>-void ubi_dbg_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr)</div><div class='add'>+void ubi_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr)</div><div class='ctx'> {</div><div class='ctx'> 	printk(KERN_DEBUG "Volume identifier header dump:\n");</div><div class='ctx'> 	printk(KERN_DEBUG "\tmagic     %08x\n", be32_to_cpu(vid_hdr-&gt;magic));</div><div class='hunk'>@@ -82,10 +107,10 @@ void ubi_dbg_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_dbg_dump_vol_info- dump volume information.</div><div class='add'>+ * ubi_dump_vol_info - dump volume information.</div><div class='ctx'>  * @vol: UBI volume description object</div><div class='ctx'>  */</div><div class='del'>-void ubi_dbg_dump_vol_info(const struct ubi_volume *vol)</div><div class='add'>+void ubi_dump_vol_info(const struct ubi_volume *vol)</div><div class='ctx'> {</div><div class='ctx'> 	printk(KERN_DEBUG "Volume information dump:\n");</div><div class='ctx'> 	printk(KERN_DEBUG "\tvol_id          %d\n", vol-&gt;vol_id);</div><div class='hunk'>@@ -112,11 +137,11 @@ void ubi_dbg_dump_vol_info(const struct ubi_volume *vol)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_dbg_dump_vtbl_record - dump a &amp;struct ubi_vtbl_record object.</div><div class='add'>+ * ubi_dump_vtbl_record - dump a &amp;struct ubi_vtbl_record object.</div><div class='ctx'>  * @r: the object to dump</div><div class='ctx'>  * @idx: volume table index</div><div class='ctx'>  */</div><div class='del'>-void ubi_dbg_dump_vtbl_record(const struct ubi_vtbl_record *r, int idx)</div><div class='add'>+void ubi_dump_vtbl_record(const struct ubi_vtbl_record *r, int idx)</div><div class='ctx'> {</div><div class='ctx'> 	int name_len = be16_to_cpu(r-&gt;name_len);</div><div class='ctx'> </div><div class='hunk'>@@ -146,44 +171,44 @@ void ubi_dbg_dump_vtbl_record(const struct ubi_vtbl_record *r, int idx)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_dbg_dump_sv - dump a &amp;struct ubi_scan_volume object.</div><div class='del'>- * @sv: the object to dump</div><div class='add'>+ * ubi_dump_av - dump a &amp;struct ubi_ainf_volume object.</div><div class='add'>+ * @av: the object to dump</div><div class='ctx'>  */</div><div class='del'>-void ubi_dbg_dump_sv(const struct ubi_scan_volume *sv)</div><div class='add'>+void ubi_dump_av(const struct ubi_ainf_volume *av)</div><div class='ctx'> {</div><div class='del'>-	printk(KERN_DEBUG "Volume scanning information dump:\n");</div><div class='del'>-	printk(KERN_DEBUG "\tvol_id         %d\n", sv-&gt;vol_id);</div><div class='del'>-	printk(KERN_DEBUG "\thighest_lnum   %d\n", sv-&gt;highest_lnum);</div><div class='del'>-	printk(KERN_DEBUG "\tleb_count      %d\n", sv-&gt;leb_count);</div><div class='del'>-	printk(KERN_DEBUG "\tcompat         %d\n", sv-&gt;compat);</div><div class='del'>-	printk(KERN_DEBUG "\tvol_type       %d\n", sv-&gt;vol_type);</div><div class='del'>-	printk(KERN_DEBUG "\tused_ebs       %d\n", sv-&gt;used_ebs);</div><div class='del'>-	printk(KERN_DEBUG "\tlast_data_size %d\n", sv-&gt;last_data_size);</div><div class='del'>-	printk(KERN_DEBUG "\tdata_pad       %d\n", sv-&gt;data_pad);</div><div class='add'>+	printk(KERN_DEBUG "Volume attaching information dump:\n");</div><div class='add'>+	printk(KERN_DEBUG "\tvol_id         %d\n", av-&gt;vol_id);</div><div class='add'>+	printk(KERN_DEBUG "\thighest_lnum   %d\n", av-&gt;highest_lnum);</div><div class='add'>+	printk(KERN_DEBUG "\tleb_count      %d\n", av-&gt;leb_count);</div><div class='add'>+	printk(KERN_DEBUG "\tcompat         %d\n", av-&gt;compat);</div><div class='add'>+	printk(KERN_DEBUG "\tvol_type       %d\n", av-&gt;vol_type);</div><div class='add'>+	printk(KERN_DEBUG "\tused_ebs       %d\n", av-&gt;used_ebs);</div><div class='add'>+	printk(KERN_DEBUG "\tlast_data_size %d\n", av-&gt;last_data_size);</div><div class='add'>+	printk(KERN_DEBUG "\tdata_pad       %d\n", av-&gt;data_pad);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_dbg_dump_seb - dump a &amp;struct ubi_scan_leb object.</div><div class='del'>- * @seb: the object to dump</div><div class='add'>+ * ubi_dump_aeb - dump a &amp;struct ubi_ainf_peb object.</div><div class='add'>+ * @aeb: the object to dump</div><div class='ctx'>  * @type: object type: 0 - not corrupted, 1 - corrupted</div><div class='ctx'>  */</div><div class='del'>-void ubi_dbg_dump_seb(const struct ubi_scan_leb *seb, int type)</div><div class='add'>+void ubi_dump_aeb(const struct ubi_ainf_peb *aeb, int type)</div><div class='ctx'> {</div><div class='del'>-	printk(KERN_DEBUG "eraseblock scanning information dump:\n");</div><div class='del'>-	printk(KERN_DEBUG "\tec       %d\n", seb-&gt;ec);</div><div class='del'>-	printk(KERN_DEBUG "\tpnum     %d\n", seb-&gt;pnum);</div><div class='add'>+	printk(KERN_DEBUG "eraseblock attaching information dump:\n");</div><div class='add'>+	printk(KERN_DEBUG "\tec       %d\n", aeb-&gt;ec);</div><div class='add'>+	printk(KERN_DEBUG "\tpnum     %d\n", aeb-&gt;pnum);</div><div class='ctx'> 	if (type == 0) {</div><div class='del'>-		printk(KERN_DEBUG "\tlnum     %d\n", seb-&gt;lnum);</div><div class='del'>-		printk(KERN_DEBUG "\tscrub    %d\n", seb-&gt;scrub);</div><div class='del'>-		printk(KERN_DEBUG "\tsqnum    %llu\n", seb-&gt;sqnum);</div><div class='add'>+		printk(KERN_DEBUG "\tlnum     %d\n", aeb-&gt;lnum);</div><div class='add'>+		printk(KERN_DEBUG "\tscrub    %d\n", aeb-&gt;scrub);</div><div class='add'>+		printk(KERN_DEBUG "\tsqnum    %llu\n", aeb-&gt;sqnum);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_dbg_dump_mkvol_req - dump a &amp;struct ubi_mkvol_req object.</div><div class='add'>+ * ubi_dump_mkvol_req - dump a &amp;struct ubi_mkvol_req object.</div><div class='ctx'>  * @req: the object to dump</div><div class='ctx'>  */</div><div class='del'>-void ubi_dbg_dump_mkvol_req(const struct ubi_mkvol_req *req)</div><div class='add'>+void ubi_dump_mkvol_req(const struct ubi_mkvol_req *req)</div><div class='ctx'> {</div><div class='ctx'> 	char nm[17];</div><div class='ctx'> </div><div class='hunk'>@@ -200,38 +225,6 @@ void ubi_dbg_dump_mkvol_req(const struct ubi_mkvol_req *req)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_dbg_dump_flash - dump a region of flash.</div><div class='del'>- * @ubi: UBI device description object</div><div class='del'>- * @pnum: the physical eraseblock number to dump</div><div class='del'>- * @offset: the starting offset within the physical eraseblock to dump</div><div class='del'>- * @len: the length of the region to dump</div><div class='del'>- */</div><div class='del'>-void ubi_dbg_dump_flash(struct ubi_device *ubi, int pnum, int offset, int len)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	size_t read;</div><div class='del'>-	void *buf;</div><div class='del'>-	loff_t addr = (loff_t)pnum * ubi-&gt;peb_size + offset;</div><div class='del'>-</div><div class='del'>-	buf = vmalloc(len);</div><div class='del'>-	if (!buf)</div><div class='del'>-		return;</div><div class='del'>-	err = mtd_read(ubi-&gt;mtd, addr, len, &amp;read, buf);</div><div class='del'>-	if (err &amp;&amp; err != -EUCLEAN) {</div><div class='del'>-		ubi_err("error %d while reading %d bytes from PEB %d:%d, "</div><div class='del'>-			"read %zd bytes", err, len, pnum, offset, read);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dbg_msg("dumping %d bytes of data from PEB %d, offset %d",</div><div class='del'>-		len, pnum, offset);</div><div class='del'>-	print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1, buf, len, 1);</div><div class='del'>-out:</div><div class='del'>-	vfree(buf);</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ubi_debugging_init_dev - initialize debugging for an UBI device.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  *</div><div class='hunk'>@@ -271,6 +264,9 @@ static struct dentry *dfs_rootdir;</div><div class='ctx'>  */</div><div class='ctx'> int ubi_debugfs_init(void)</div><div class='ctx'> {</div><div class='add'>+	if (!IS_ENABLED(DEBUG_FS))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	dfs_rootdir = debugfs_create_dir("ubi", NULL);</div><div class='ctx'> 	if (IS_ERR_OR_NULL(dfs_rootdir)) {</div><div class='ctx'> 		int err = dfs_rootdir ? -ENODEV : PTR_ERR(dfs_rootdir);</div><div class='hunk'>@@ -288,7 +284,8 @@ int ubi_debugfs_init(void)</div><div class='ctx'>  */</div><div class='ctx'> void ubi_debugfs_exit(void)</div><div class='ctx'> {</div><div class='del'>-	debugfs_remove(dfs_rootdir);</div><div class='add'>+	if (IS_ENABLED(DEBUG_FS))</div><div class='add'>+		debugfs_remove(dfs_rootdir);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Read an UBI debugfs file */</div><div class='hunk'>@@ -410,6 +407,9 @@ int ubi_debugfs_init_dev(struct ubi_device *ubi)</div><div class='ctx'> 	struct dentry *dent;</div><div class='ctx'> 	struct ubi_debug_info *d = ubi-&gt;dbg;</div><div class='ctx'> </div><div class='add'>+	if (!IS_ENABLED(DEBUG_FS))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	n = snprintf(d-&gt;dfs_dir_name, UBI_DFS_DIR_LEN + 1, UBI_DFS_DIR_NAME,</div><div class='ctx'> 		     ubi-&gt;ubi_num);</div><div class='ctx'> 	if (n == UBI_DFS_DIR_LEN) {</div><div class='hunk'>@@ -477,7 +477,6 @@ out:</div><div class='ctx'>  */</div><div class='ctx'> void ubi_debugfs_exit_dev(struct ubi_device *ubi)</div><div class='ctx'> {</div><div class='del'>-	debugfs_remove_recursive(ubi-&gt;dbg-&gt;dfs_dir);</div><div class='add'>+	if (IS_ENABLED(DEBUG_FS))</div><div class='add'>+		debugfs_remove_recursive(ubi-&gt;dbg-&gt;dfs_dir);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MTD_UBI_DEBUG */</div><div class='head'>diff --git a/drivers/mtd/ubi/debug.h b/drivers/mtd/ubi/debug.h<br/>index ead2cd16ba75..d5d2645b51a7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/debug.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/debug.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/debug.h</a></div><div class='hunk'>@@ -21,21 +21,20 @@</div><div class='ctx'> #ifndef __UBI_DEBUG_H__</div><div class='ctx'> #define __UBI_DEBUG_H__</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MTD_UBI_DEBUG</div><div class='add'>+void ubi_dump_flash(struct ubi_device *ubi, int pnum, int offset, int len);</div><div class='add'>+void ubi_dump_ec_hdr(const struct ubi_ec_hdr *ec_hdr);</div><div class='add'>+void ubi_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr);</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/random.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define ubi_assert(expr)  do {                                               \</div><div class='ctx'> 	if (unlikely(!(expr))) {                                             \</div><div class='ctx'> 		printk(KERN_CRIT "UBI assert failed in %s at %u (pid %d)\n", \</div><div class='ctx'> 		       __func__, __LINE__, current-&gt;pid);                    \</div><div class='del'>-		ubi_dbg_dump_stack();                                        \</div><div class='add'>+		dump_stack();                                                \</div><div class='ctx'> 	}                                                                    \</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='del'>-#define dbg_err(fmt, ...) ubi_err(fmt, ##__VA_ARGS__)</div><div class='del'>-</div><div class='del'>-#define ubi_dbg_dump_stack() dump_stack()</div><div class='del'>-</div><div class='ctx'> #define ubi_dbg_print_hex_dump(l, ps, pt, r, g, b, len, a)  \</div><div class='ctx'> 		print_hex_dump(l, ps, pt, r, g, b, len, a)</div><div class='ctx'> </div><div class='hunk'>@@ -58,17 +57,13 @@</div><div class='ctx'> /* Initialization and build messages */</div><div class='ctx'> #define dbg_bld(fmt, ...) ubi_dbg_msg("bld", fmt, ##__VA_ARGS__)</div><div class='ctx'> </div><div class='del'>-void ubi_dbg_dump_ec_hdr(const struct ubi_ec_hdr *ec_hdr);</div><div class='del'>-void ubi_dbg_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr);</div><div class='del'>-void ubi_dbg_dump_vol_info(const struct ubi_volume *vol);</div><div class='del'>-void ubi_dbg_dump_vtbl_record(const struct ubi_vtbl_record *r, int idx);</div><div class='del'>-void ubi_dbg_dump_sv(const struct ubi_scan_volume *sv);</div><div class='del'>-void ubi_dbg_dump_seb(const struct ubi_scan_leb *seb, int type);</div><div class='del'>-void ubi_dbg_dump_mkvol_req(const struct ubi_mkvol_req *req);</div><div class='del'>-void ubi_dbg_dump_flash(struct ubi_device *ubi, int pnum, int offset, int len);</div><div class='del'>-int ubi_dbg_check_all_ff(struct ubi_device *ubi, int pnum, int offset, int len);</div><div class='del'>-int ubi_dbg_check_write(struct ubi_device *ubi, const void *buf, int pnum,</div><div class='del'>-			int offset, int len);</div><div class='add'>+void ubi_dump_vol_info(const struct ubi_volume *vol);</div><div class='add'>+void ubi_dump_vtbl_record(const struct ubi_vtbl_record *r, int idx);</div><div class='add'>+void ubi_dump_av(const struct ubi_ainf_volume *av);</div><div class='add'>+void ubi_dump_aeb(const struct ubi_ainf_peb *aeb, int type);</div><div class='add'>+void ubi_dump_mkvol_req(const struct ubi_mkvol_req *req);</div><div class='add'>+int ubi_self_check_all_ff(struct ubi_device *ubi, int pnum, int offset,</div><div class='add'>+			  int len);</div><div class='ctx'> int ubi_debugging_init_dev(struct ubi_device *ubi);</div><div class='ctx'> void ubi_debugging_exit_dev(struct ubi_device *ubi);</div><div class='ctx'> int ubi_debugfs_init(void);</div><div class='hunk'>@@ -167,73 +162,4 @@ static inline int ubi_dbg_is_erase_failure(const struct ubi_device *ubi)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-/* Use "if (0)" to make compiler check arguments even if debugging is off */</div><div class='del'>-#define ubi_assert(expr)  do {                                               \</div><div class='del'>-	if (0) {                                                             \</div><div class='del'>-		printk(KERN_CRIT "UBI assert failed in %s at %u (pid %d)\n", \</div><div class='del'>-		       __func__, __LINE__, current-&gt;pid);                    \</div><div class='del'>-	}                                                                    \</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define dbg_err(fmt, ...) do {                                               \</div><div class='del'>-	if (0)                                                               \</div><div class='del'>-		ubi_err(fmt, ##__VA_ARGS__);                                 \</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define ubi_dbg_msg(fmt, ...) do {                                           \</div><div class='del'>-	if (0)                                                               \</div><div class='del'>-		printk(KERN_DEBUG fmt "\n", ##__VA_ARGS__);                  \</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define dbg_msg(fmt, ...)  ubi_dbg_msg(fmt, ##__VA_ARGS__)</div><div class='del'>-#define dbg_gen(fmt, ...)  ubi_dbg_msg(fmt, ##__VA_ARGS__)</div><div class='del'>-#define dbg_eba(fmt, ...)  ubi_dbg_msg(fmt, ##__VA_ARGS__)</div><div class='del'>-#define dbg_wl(fmt, ...)   ubi_dbg_msg(fmt, ##__VA_ARGS__)</div><div class='del'>-#define dbg_io(fmt, ...)   ubi_dbg_msg(fmt, ##__VA_ARGS__)</div><div class='del'>-#define dbg_bld(fmt, ...)  ubi_dbg_msg(fmt, ##__VA_ARGS__)</div><div class='del'>-</div><div class='del'>-static inline void ubi_dbg_dump_stack(void)                          { return; }</div><div class='del'>-static inline void</div><div class='del'>-ubi_dbg_dump_ec_hdr(const struct ubi_ec_hdr *ec_hdr)                 { return; }</div><div class='del'>-static inline void</div><div class='del'>-ubi_dbg_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr)              { return; }</div><div class='del'>-static inline void</div><div class='del'>-ubi_dbg_dump_vol_info(const struct ubi_volume *vol)                  { return; }</div><div class='del'>-static inline void</div><div class='del'>-ubi_dbg_dump_vtbl_record(const struct ubi_vtbl_record *r, int idx)   { return; }</div><div class='del'>-static inline void ubi_dbg_dump_sv(const struct ubi_scan_volume *sv) { return; }</div><div class='del'>-static inline void ubi_dbg_dump_seb(const struct ubi_scan_leb *seb,</div><div class='del'>-				    int type)                        { return; }</div><div class='del'>-static inline void</div><div class='del'>-ubi_dbg_dump_mkvol_req(const struct ubi_mkvol_req *req)              { return; }</div><div class='del'>-static inline void ubi_dbg_dump_flash(struct ubi_device *ubi,</div><div class='del'>-				      int pnum, int offset, int len) { return; }</div><div class='del'>-static inline void</div><div class='del'>-ubi_dbg_print_hex_dump(const char *l, const char *ps, int pt, int r,</div><div class='del'>-		       int g, const void *b, size_t len, bool a)     { return; }</div><div class='del'>-static inline int ubi_dbg_check_all_ff(struct ubi_device *ubi,</div><div class='del'>-				       int pnum, int offset,</div><div class='del'>-				       int len)                    { return 0; }</div><div class='del'>-static inline int ubi_dbg_check_write(struct ubi_device *ubi,</div><div class='del'>-				      const void *buf, int pnum,</div><div class='del'>-				      int offset, int len)         { return 0; }</div><div class='del'>-</div><div class='del'>-static inline int ubi_debugging_init_dev(struct ubi_device *ubi)   { return 0; }</div><div class='del'>-static inline void ubi_debugging_exit_dev(struct ubi_device *ubi)  { return; }</div><div class='del'>-static inline int ubi_debugfs_init(void)                           { return 0; }</div><div class='del'>-static inline void ubi_debugfs_exit(void)                          { return; }</div><div class='del'>-static inline int ubi_debugfs_init_dev(struct ubi_device *ubi)     { return 0; }</div><div class='del'>-static inline void ubi_debugfs_exit_dev(struct ubi_device *ubi)    { return; }</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-ubi_dbg_is_bgt_disabled(const struct ubi_device *ubi)              { return 0; }</div><div class='del'>-static inline int ubi_dbg_is_bitflip(const struct ubi_device *ubi) { return 0; }</div><div class='del'>-static inline int</div><div class='del'>-ubi_dbg_is_write_failure(const struct ubi_device *ubi)             { return 0; }</div><div class='del'>-static inline int</div><div class='del'>-ubi_dbg_is_erase_failure(const struct ubi_device *ubi)             { return 0; }</div><div class='del'>-</div><div class='del'>-#endif /* !CONFIG_MTD_UBI_DEBUG */</div><div class='ctx'> #endif /* !__UBI_DEBUG_H__ */</div><div class='head'>diff --git a/drivers/mtd/ubi/eba.c b/drivers/mtd/ubi/eba.c<br/>index 2455d620d96b..b703ac7729cf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/eba.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/eba.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/eba.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/eba.c</a></div><div class='hunk'>@@ -341,7 +341,7 @@ int ubi_eba_unmap_leb(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='ctx'> 	dbg_eba("erase LEB %d:%d, PEB %d", vol_id, lnum, pnum);</div><div class='ctx'> </div><div class='ctx'> 	vol-&gt;eba_tbl[lnum] = UBI_LEB_UNMAPPED;</div><div class='del'>-	err = ubi_wl_put_peb(ubi, pnum, 0);</div><div class='add'>+	err = ubi_wl_put_peb(ubi, vol_id, lnum, pnum, 0);</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='ctx'> 	leb_write_unlock(ubi, vol_id, lnum);</div><div class='hunk'>@@ -507,7 +507,7 @@ static int recover_peb(struct ubi_device *ubi, int pnum, int vol_id, int lnum,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> retry:</div><div class='del'>-	new_pnum = ubi_wl_get_peb(ubi, UBI_UNKNOWN);</div><div class='add'>+	new_pnum = ubi_wl_get_peb(ubi);</div><div class='ctx'> 	if (new_pnum &lt; 0) {</div><div class='ctx'> 		ubi_free_vid_hdr(ubi, vid_hdr);</div><div class='ctx'> 		return new_pnum;</div><div class='hunk'>@@ -550,7 +550,7 @@ retry:</div><div class='ctx'> 	ubi_free_vid_hdr(ubi, vid_hdr);</div><div class='ctx'> </div><div class='ctx'> 	vol-&gt;eba_tbl[lnum] = new_pnum;</div><div class='del'>-	ubi_wl_put_peb(ubi, pnum, 1);</div><div class='add'>+	ubi_wl_put_peb(ubi, vol_id, lnum, pnum, 1);</div><div class='ctx'> </div><div class='ctx'> 	ubi_msg("data was successfully recovered");</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -558,7 +558,7 @@ retry:</div><div class='ctx'> out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;ubi-&gt;buf_mutex);</div><div class='ctx'> out_put:</div><div class='del'>-	ubi_wl_put_peb(ubi, new_pnum, 1);</div><div class='add'>+	ubi_wl_put_peb(ubi, vol_id, lnum, new_pnum, 1);</div><div class='ctx'> 	ubi_free_vid_hdr(ubi, vid_hdr);</div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='hunk'>@@ -568,7 +568,7 @@ write_error:</div><div class='ctx'> 	 * get another one.</div><div class='ctx'> 	 */</div><div class='ctx'> 	ubi_warn("failed to write to PEB %d", new_pnum);</div><div class='del'>-	ubi_wl_put_peb(ubi, new_pnum, 1);</div><div class='add'>+	ubi_wl_put_peb(ubi, vol_id, lnum, new_pnum, 1);</div><div class='ctx'> 	if (++tries &gt; UBI_IO_RETRIES) {</div><div class='ctx'> 		ubi_free_vid_hdr(ubi, vid_hdr);</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -585,7 +585,6 @@ write_error:</div><div class='ctx'>  * @buf: the data to write</div><div class='ctx'>  * @offset: offset within the logical eraseblock where to write</div><div class='ctx'>  * @len: how many bytes to write</div><div class='del'>- * @dtype: data type</div><div class='ctx'>  *</div><div class='ctx'>  * This function writes data to logical eraseblock @lnum of a dynamic volume</div><div class='ctx'>  * @vol. Returns zero in case of success and a negative error code in case</div><div class='hunk'>@@ -593,7 +592,7 @@ write_error:</div><div class='ctx'>  * written to the flash media, but may be some garbage.</div><div class='ctx'>  */</div><div class='ctx'> int ubi_eba_write_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,</div><div class='del'>-		      const void *buf, int offset, int len, int dtype)</div><div class='add'>+		      const void *buf, int offset, int len)</div><div class='ctx'> {</div><div class='ctx'> 	int err, pnum, tries = 0, vol_id = vol-&gt;vol_id;</div><div class='ctx'> 	struct ubi_vid_hdr *vid_hdr;</div><div class='hunk'>@@ -641,7 +640,7 @@ int ubi_eba_write_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,</div><div class='ctx'> 	vid_hdr-&gt;data_pad = cpu_to_be32(vol-&gt;data_pad);</div><div class='ctx'> </div><div class='ctx'> retry:</div><div class='del'>-	pnum = ubi_wl_get_peb(ubi, dtype);</div><div class='add'>+	pnum = ubi_wl_get_peb(ubi);</div><div class='ctx'> 	if (pnum &lt; 0) {</div><div class='ctx'> 		ubi_free_vid_hdr(ubi, vid_hdr);</div><div class='ctx'> 		leb_write_unlock(ubi, vol_id, lnum);</div><div class='hunk'>@@ -687,7 +686,7 @@ write_error:</div><div class='ctx'> 	 * eraseblock, so just put it and request a new one. We assume that if</div><div class='ctx'> 	 * this physical eraseblock went bad, the erase code will handle that.</div><div class='ctx'> 	 */</div><div class='del'>-	err = ubi_wl_put_peb(ubi, pnum, 1);</div><div class='add'>+	err = ubi_wl_put_peb(ubi, vol_id, lnum, pnum, 1);</div><div class='ctx'> 	if (err || ++tries &gt; UBI_IO_RETRIES) {</div><div class='ctx'> 		ubi_ro_mode(ubi);</div><div class='ctx'> 		leb_write_unlock(ubi, vol_id, lnum);</div><div class='hunk'>@@ -707,7 +706,6 @@ write_error:</div><div class='ctx'>  * @lnum: logical eraseblock number</div><div class='ctx'>  * @buf: data to write</div><div class='ctx'>  * @len: how many bytes to write</div><div class='del'>- * @dtype: data type</div><div class='ctx'>  * @used_ebs: how many logical eraseblocks will this volume contain</div><div class='ctx'>  *</div><div class='ctx'>  * This function writes data to logical eraseblock @lnum of static volume</div><div class='hunk'>@@ -724,8 +722,7 @@ write_error:</div><div class='ctx'>  * code in case of failure.</div><div class='ctx'>  */</div><div class='ctx'> int ubi_eba_write_leb_st(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='del'>-			 int lnum, const void *buf, int len, int dtype,</div><div class='del'>-			 int used_ebs)</div><div class='add'>+			 int lnum, const void *buf, int len, int used_ebs)</div><div class='ctx'> {</div><div class='ctx'> 	int err, pnum, tries = 0, data_size = len, vol_id = vol-&gt;vol_id;</div><div class='ctx'> 	struct ubi_vid_hdr *vid_hdr;</div><div class='hunk'>@@ -763,7 +760,7 @@ int ubi_eba_write_leb_st(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='ctx'> 	vid_hdr-&gt;data_crc = cpu_to_be32(crc);</div><div class='ctx'> </div><div class='ctx'> retry:</div><div class='del'>-	pnum = ubi_wl_get_peb(ubi, dtype);</div><div class='add'>+	pnum = ubi_wl_get_peb(ubi);</div><div class='ctx'> 	if (pnum &lt; 0) {</div><div class='ctx'> 		ubi_free_vid_hdr(ubi, vid_hdr);</div><div class='ctx'> 		leb_write_unlock(ubi, vol_id, lnum);</div><div class='hunk'>@@ -807,7 +804,7 @@ write_error:</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = ubi_wl_put_peb(ubi, pnum, 1);</div><div class='add'>+	err = ubi_wl_put_peb(ubi, vol_id, lnum, pnum, 1);</div><div class='ctx'> 	if (err || ++tries &gt; UBI_IO_RETRIES) {</div><div class='ctx'> 		ubi_ro_mode(ubi);</div><div class='ctx'> 		leb_write_unlock(ubi, vol_id, lnum);</div><div class='hunk'>@@ -827,7 +824,6 @@ write_error:</div><div class='ctx'>  * @lnum: logical eraseblock number</div><div class='ctx'>  * @buf: data to write</div><div class='ctx'>  * @len: how many bytes to write</div><div class='del'>- * @dtype: data type</div><div class='ctx'>  *</div><div class='ctx'>  * This function changes the contents of a logical eraseblock atomically. @buf</div><div class='ctx'>  * has to contain new logical eraseblock data, and @len - the length of the</div><div class='hunk'>@@ -839,7 +835,7 @@ write_error:</div><div class='ctx'>  * LEB change may be done at a time. This is ensured by @ubi-&gt;alc_mutex.</div><div class='ctx'>  */</div><div class='ctx'> int ubi_eba_atomic_leb_change(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='del'>-			      int lnum, const void *buf, int len, int dtype)</div><div class='add'>+			      int lnum, const void *buf, int len)</div><div class='ctx'> {</div><div class='ctx'> 	int err, pnum, tries = 0, vol_id = vol-&gt;vol_id;</div><div class='ctx'> 	struct ubi_vid_hdr *vid_hdr;</div><div class='hunk'>@@ -856,7 +852,7 @@ int ubi_eba_atomic_leb_change(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='ctx'> 		err = ubi_eba_unmap_leb(ubi, vol, lnum);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='del'>-		return ubi_eba_write_leb(ubi, vol, lnum, NULL, 0, 0, dtype);</div><div class='add'>+		return ubi_eba_write_leb(ubi, vol, lnum, NULL, 0, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	vid_hdr = ubi_zalloc_vid_hdr(ubi, GFP_NOFS);</div><div class='hunk'>@@ -881,7 +877,7 @@ int ubi_eba_atomic_leb_change(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='ctx'> 	vid_hdr-&gt;data_crc = cpu_to_be32(crc);</div><div class='ctx'> </div><div class='ctx'> retry:</div><div class='del'>-	pnum = ubi_wl_get_peb(ubi, dtype);</div><div class='add'>+	pnum = ubi_wl_get_peb(ubi);</div><div class='ctx'> 	if (pnum &lt; 0) {</div><div class='ctx'> 		err = pnum;</div><div class='ctx'> 		goto out_leb_unlock;</div><div class='hunk'>@@ -905,7 +901,7 @@ retry:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vol-&gt;eba_tbl[lnum] &gt;= 0) {</div><div class='del'>-		err = ubi_wl_put_peb(ubi, vol-&gt;eba_tbl[lnum], 0);</div><div class='add'>+		err = ubi_wl_put_peb(ubi, vol_id, lnum, vol-&gt;eba_tbl[lnum], 0);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto out_leb_unlock;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -930,7 +926,7 @@ write_error:</div><div class='ctx'> 		goto out_leb_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = ubi_wl_put_peb(ubi, pnum, 1);</div><div class='add'>+	err = ubi_wl_put_peb(ubi, vol_id, lnum, pnum, 1);</div><div class='ctx'> 	if (err || ++tries &gt; UBI_IO_RETRIES) {</div><div class='ctx'> 		ubi_ro_mode(ubi);</div><div class='ctx'> 		goto out_leb_unlock;</div><div class='hunk'>@@ -1171,7 +1167,7 @@ out_unlock_leb:</div><div class='ctx'>  * print_rsvd_warning - warn about not having enough reserved PEBs.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  *</div><div class='del'>- * This is a helper function for 'ubi_eba_init_scan()' which is called when UBI</div><div class='add'>+ * This is a helper function for 'ubi_eba_init()' which is called when UBI</div><div class='ctx'>  * cannot reserve enough PEBs for bad block handling. This function makes a</div><div class='ctx'>  * decision whether we have to print a warning or not. The algorithm is as</div><div class='ctx'>  * follows:</div><div class='hunk'>@@ -1186,13 +1182,13 @@ out_unlock_leb:</div><div class='ctx'>  * reported by real users.</div><div class='ctx'>  */</div><div class='ctx'> static void print_rsvd_warning(struct ubi_device *ubi,</div><div class='del'>-			       struct ubi_scan_info *si)</div><div class='add'>+			       struct ubi_attach_info *ai)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The 1 &lt;&lt; 18 (256KiB) number is picked randomly, just a reasonably</div><div class='ctx'> 	 * large number to distinguish between newly flashed and used images.</div><div class='ctx'> 	 */</div><div class='del'>-	if (si-&gt;max_sqnum &gt; (1 &lt;&lt; 18)) {</div><div class='add'>+	if (ai-&gt;max_sqnum &gt; (1 &lt;&lt; 18)) {</div><div class='ctx'> 		int min = ubi-&gt;beb_rsvd_level / 10;</div><div class='ctx'> </div><div class='ctx'> 		if (!min)</div><div class='hunk'>@@ -1209,19 +1205,19 @@ static void print_rsvd_warning(struct ubi_device *ubi,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_eba_init_scan - initialize the EBA sub-system using scanning information.</div><div class='add'>+ * ubi_eba_init - initialize the EBA sub-system using attaching information.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns zero in case of success and a negative error code in</div><div class='ctx'>  * case of failure.</div><div class='ctx'>  */</div><div class='del'>-int ubi_eba_init_scan(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='add'>+int ubi_eba_init(struct ubi_device *ubi, struct ubi_attach_info *ai)</div><div class='ctx'> {</div><div class='ctx'> 	int i, j, err, num_volumes;</div><div class='del'>-	struct ubi_scan_volume *sv;</div><div class='add'>+	struct ubi_ainf_volume *av;</div><div class='ctx'> 	struct ubi_volume *vol;</div><div class='del'>-	struct ubi_scan_leb *seb;</div><div class='add'>+	struct ubi_ainf_peb *aeb;</div><div class='ctx'> 	struct rb_node *rb;</div><div class='ctx'> </div><div class='ctx'> 	dbg_eba("initialize EBA sub-system");</div><div class='hunk'>@@ -1230,7 +1226,7 @@ int ubi_eba_init_scan(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> 	mutex_init(&amp;ubi-&gt;alc_mutex);</div><div class='ctx'> 	ubi-&gt;ltree = RB_ROOT;</div><div class='ctx'> </div><div class='del'>-	ubi-&gt;global_sqnum = si-&gt;max_sqnum + 1;</div><div class='add'>+	ubi-&gt;global_sqnum = ai-&gt;max_sqnum + 1;</div><div class='ctx'> 	num_volumes = ubi-&gt;vtbl_slots + UBI_INT_VOL_COUNT;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_volumes; i++) {</div><div class='hunk'>@@ -1250,18 +1246,18 @@ int ubi_eba_init_scan(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> 		for (j = 0; j &lt; vol-&gt;reserved_pebs; j++)</div><div class='ctx'> 			vol-&gt;eba_tbl[j] = UBI_LEB_UNMAPPED;</div><div class='ctx'> </div><div class='del'>-		sv = ubi_scan_find_sv(si, idx2vol_id(ubi, i));</div><div class='del'>-		if (!sv)</div><div class='add'>+		av = ubi_find_av(ai, idx2vol_id(ubi, i));</div><div class='add'>+		if (!av)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		ubi_rb_for_each_entry(rb, seb, &amp;sv-&gt;root, u.rb) {</div><div class='del'>-			if (seb-&gt;lnum &gt;= vol-&gt;reserved_pebs)</div><div class='add'>+		ubi_rb_for_each_entry(rb, aeb, &amp;av-&gt;root, u.rb) {</div><div class='add'>+			if (aeb-&gt;lnum &gt;= vol-&gt;reserved_pebs)</div><div class='ctx'> 				/*</div><div class='ctx'> 				 * This may happen in case of an unclean reboot</div><div class='ctx'> 				 * during re-size.</div><div class='ctx'> 				 */</div><div class='del'>-				ubi_scan_move_to_list(sv, seb, &amp;si-&gt;erase);</div><div class='del'>-			vol-&gt;eba_tbl[seb-&gt;lnum] = seb-&gt;pnum;</div><div class='add'>+				ubi_move_aeb_to_list(av, aeb, &amp;ai-&gt;erase);</div><div class='add'>+			vol-&gt;eba_tbl[aeb-&gt;lnum] = aeb-&gt;pnum;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1283,7 +1279,7 @@ int ubi_eba_init_scan(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> 		if (ubi-&gt;avail_pebs &lt; ubi-&gt;beb_rsvd_level) {</div><div class='ctx'> 			/* No enough free physical eraseblocks */</div><div class='ctx'> 			ubi-&gt;beb_rsvd_pebs = ubi-&gt;avail_pebs;</div><div class='del'>-			print_rsvd_warning(ubi, si);</div><div class='add'>+			print_rsvd_warning(ubi, ai);</div><div class='ctx'> 		} else</div><div class='ctx'> 			ubi-&gt;beb_rsvd_pebs = ubi-&gt;beb_rsvd_level;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/ubi/gluebi.c b/drivers/mtd/ubi/gluebi.c<br/>index 90b98822d9a4..4e44bee4c564 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/gluebi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/gluebi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/gluebi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/gluebi.c</a></div><div class='hunk'>@@ -227,7 +227,7 @@ static int gluebi_write(struct mtd_info *mtd, loff_t to, size_t len,</div><div class='ctx'> 		if (to_write &gt; total_written)</div><div class='ctx'> 			to_write = total_written;</div><div class='ctx'> </div><div class='del'>-		err = ubi_write(gluebi-&gt;desc, lnum, buf, offs, to_write);</div><div class='add'>+		err = ubi_leb_write(gluebi-&gt;desc, lnum, buf, offs, to_write);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/ubi/io.c b/drivers/mtd/ubi/io.c<br/>index 43f1a0011a55..a8d523794b52 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/io.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/io.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/io.c</a></div><div class='hunk'>@@ -91,21 +91,15 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include "ubi.h"</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MTD_UBI_DEBUG</div><div class='del'>-static int paranoid_check_not_bad(const struct ubi_device *ubi, int pnum);</div><div class='del'>-static int paranoid_check_peb_ec_hdr(const struct ubi_device *ubi, int pnum);</div><div class='del'>-static int paranoid_check_ec_hdr(const struct ubi_device *ubi, int pnum,</div><div class='del'>-				 const struct ubi_ec_hdr *ec_hdr);</div><div class='del'>-static int paranoid_check_peb_vid_hdr(const struct ubi_device *ubi, int pnum);</div><div class='del'>-static int paranoid_check_vid_hdr(const struct ubi_device *ubi, int pnum,</div><div class='del'>-				  const struct ubi_vid_hdr *vid_hdr);</div><div class='del'>-#else</div><div class='del'>-#define paranoid_check_not_bad(ubi, pnum) 0</div><div class='del'>-#define paranoid_check_peb_ec_hdr(ubi, pnum)  0</div><div class='del'>-#define paranoid_check_ec_hdr(ubi, pnum, ec_hdr)  0</div><div class='del'>-#define paranoid_check_peb_vid_hdr(ubi, pnum) 0</div><div class='del'>-#define paranoid_check_vid_hdr(ubi, pnum, vid_hdr) 0</div><div class='del'>-#endif</div><div class='add'>+static int self_check_not_bad(const struct ubi_device *ubi, int pnum);</div><div class='add'>+static int self_check_peb_ec_hdr(const struct ubi_device *ubi, int pnum);</div><div class='add'>+static int self_check_ec_hdr(const struct ubi_device *ubi, int pnum,</div><div class='add'>+			     const struct ubi_ec_hdr *ec_hdr);</div><div class='add'>+static int self_check_peb_vid_hdr(const struct ubi_device *ubi, int pnum);</div><div class='add'>+static int self_check_vid_hdr(const struct ubi_device *ubi, int pnum,</div><div class='add'>+			      const struct ubi_vid_hdr *vid_hdr);</div><div class='add'>+static int self_check_write(struct ubi_device *ubi, const void *buf, int pnum,</div><div class='add'>+			    int offset, int len);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ubi_io_read - read data from a physical eraseblock.</div><div class='hunk'>@@ -142,7 +136,7 @@ int ubi_io_read(const struct ubi_device *ubi, void *buf, int pnum, int offset,</div><div class='ctx'> 	ubi_assert(offset &gt;= 0 &amp;&amp; offset + len &lt;= ubi-&gt;peb_size);</div><div class='ctx'> 	ubi_assert(len &gt; 0);</div><div class='ctx'> </div><div class='del'>-	err = paranoid_check_not_bad(ubi, pnum);</div><div class='add'>+	err = self_check_not_bad(ubi, pnum);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -189,16 +183,16 @@ retry:</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (retries++ &lt; UBI_IO_RETRIES) {</div><div class='del'>-			dbg_io("error %d%s while reading %d bytes from PEB "</div><div class='del'>-			       "%d:%d, read only %zd bytes, retry",</div><div class='del'>-			       err, errstr, len, pnum, offset, read);</div><div class='add'>+			ubi_warn("error %d%s while reading %d bytes from PEB "</div><div class='add'>+				 "%d:%d, read only %zd bytes, retry",</div><div class='add'>+				 err, errstr, len, pnum, offset, read);</div><div class='ctx'> 			yield();</div><div class='ctx'> 			goto retry;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ubi_err("error %d%s while reading %d bytes from PEB %d:%d, "</div><div class='ctx'> 			"read %zd bytes", err, errstr, len, pnum, offset, read);</div><div class='del'>-		ubi_dbg_dump_stack();</div><div class='add'>+		dump_stack();</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The driver should never return -EBADMSG if it failed to read</div><div class='hunk'>@@ -257,14 +251,12 @@ int ubi_io_write(struct ubi_device *ubi, const void *buf, int pnum, int offset,</div><div class='ctx'> 		return -EROFS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* The below has to be compiled out if paranoid checks are disabled */</div><div class='del'>-</div><div class='del'>-	err = paranoid_check_not_bad(ubi, pnum);</div><div class='add'>+	err = self_check_not_bad(ubi, pnum);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* The area we are writing to has to contain all 0xFF bytes */</div><div class='del'>-	err = ubi_dbg_check_all_ff(ubi, pnum, offset, len);</div><div class='add'>+	err = ubi_self_check_all_ff(ubi, pnum, offset, len);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -273,18 +265,18 @@ int ubi_io_write(struct ubi_device *ubi, const void *buf, int pnum, int offset,</div><div class='ctx'> 		 * We write to the data area of the physical eraseblock. Make</div><div class='ctx'> 		 * sure it has valid EC and VID headers.</div><div class='ctx'> 		 */</div><div class='del'>-		err = paranoid_check_peb_ec_hdr(ubi, pnum);</div><div class='add'>+		err = self_check_peb_ec_hdr(ubi, pnum);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='del'>-		err = paranoid_check_peb_vid_hdr(ubi, pnum);</div><div class='add'>+		err = self_check_peb_vid_hdr(ubi, pnum);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ubi_dbg_is_write_failure(ubi)) {</div><div class='del'>-		dbg_err("cannot write %d bytes to PEB %d:%d "</div><div class='add'>+		ubi_err("cannot write %d bytes to PEB %d:%d "</div><div class='ctx'> 			"(emulated)", len, pnum, offset);</div><div class='del'>-		ubi_dbg_dump_stack();</div><div class='add'>+		dump_stack();</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -293,13 +285,13 @@ int ubi_io_write(struct ubi_device *ubi, const void *buf, int pnum, int offset,</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		ubi_err("error %d while writing %d bytes to PEB %d:%d, written "</div><div class='ctx'> 			"%zd bytes", err, len, pnum, offset, written);</div><div class='del'>-		ubi_dbg_dump_stack();</div><div class='del'>-		ubi_dbg_dump_flash(ubi, pnum, offset, len);</div><div class='add'>+		dump_stack();</div><div class='add'>+		ubi_dump_flash(ubi, pnum, offset, len);</div><div class='ctx'> 	} else</div><div class='ctx'> 		ubi_assert(written == len);</div><div class='ctx'> </div><div class='ctx'> 	if (!err) {</div><div class='del'>-		err = ubi_dbg_check_write(ubi, buf, pnum, offset, len);</div><div class='add'>+		err = self_check_write(ubi, buf, pnum, offset, len);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> </div><div class='hunk'>@@ -310,7 +302,7 @@ int ubi_io_write(struct ubi_device *ubi, const void *buf, int pnum, int offset,</div><div class='ctx'> 		offset += len;</div><div class='ctx'> 		len = ubi-&gt;peb_size - offset;</div><div class='ctx'> 		if (len)</div><div class='del'>-			err = ubi_dbg_check_all_ff(ubi, pnum, offset, len);</div><div class='add'>+			err = ubi_self_check_all_ff(ubi, pnum, offset, len);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -364,13 +356,13 @@ retry:</div><div class='ctx'> 	err = mtd_erase(ubi-&gt;mtd, &amp;ei);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		if (retries++ &lt; UBI_IO_RETRIES) {</div><div class='del'>-			dbg_io("error %d while erasing PEB %d, retry",</div><div class='del'>-			       err, pnum);</div><div class='add'>+			ubi_warn("error %d while erasing PEB %d, retry",</div><div class='add'>+				 err, pnum);</div><div class='ctx'> 			yield();</div><div class='ctx'> 			goto retry;</div><div class='ctx'> 		}</div><div class='ctx'> 		ubi_err("cannot erase PEB %d, error %d", pnum, err);</div><div class='del'>-		ubi_dbg_dump_stack();</div><div class='add'>+		dump_stack();</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -383,21 +375,21 @@ retry:</div><div class='ctx'> </div><div class='ctx'> 	if (ei.state == MTD_ERASE_FAILED) {</div><div class='ctx'> 		if (retries++ &lt; UBI_IO_RETRIES) {</div><div class='del'>-			dbg_io("error while erasing PEB %d, retry", pnum);</div><div class='add'>+			ubi_warn("error while erasing PEB %d, retry", pnum);</div><div class='ctx'> 			yield();</div><div class='ctx'> 			goto retry;</div><div class='ctx'> 		}</div><div class='ctx'> 		ubi_err("cannot erase PEB %d", pnum);</div><div class='del'>-		ubi_dbg_dump_stack();</div><div class='add'>+		dump_stack();</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = ubi_dbg_check_all_ff(ubi, pnum, 0, ubi-&gt;peb_size);</div><div class='add'>+	err = ubi_self_check_all_ff(ubi, pnum, 0, ubi-&gt;peb_size);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	if (ubi_dbg_is_erase_failure(ubi)) {</div><div class='del'>-		dbg_err("cannot erase PEB %d (emulated)", pnum);</div><div class='add'>+		ubi_err("cannot erase PEB %d (emulated)", pnum);</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -521,8 +513,7 @@ static int nor_erase_prepare(struct ubi_device *ubi, int pnum)</div><div class='ctx'> 	 * It is important to first invalidate the EC header, and then the VID</div><div class='ctx'> 	 * header. Otherwise a power cut may lead to valid EC header and</div><div class='ctx'> 	 * invalid VID header, in which case UBI will treat this PEB as</div><div class='del'>-	 * corrupted and will try to preserve it, and print scary warnings (see</div><div class='del'>-	 * the header comment in scan.c for more information).</div><div class='add'>+	 * corrupted and will try to preserve it, and print scary warnings.</div><div class='ctx'> 	 */</div><div class='ctx'> 	addr = (loff_t)pnum * ubi-&gt;peb_size;</div><div class='ctx'> 	err = mtd_write(ubi-&gt;mtd, addr, 4, &amp;written, (void *)&amp;data);</div><div class='hunk'>@@ -563,7 +554,7 @@ static int nor_erase_prepare(struct ubi_device *ubi, int pnum)</div><div class='ctx'> 	 */</div><div class='ctx'> 	ubi_err("cannot invalidate PEB %d, write returned %d read returned %d",</div><div class='ctx'> 		pnum, err, err1);</div><div class='del'>-	ubi_dbg_dump_flash(ubi, pnum, 0, ubi-&gt;peb_size);</div><div class='add'>+	ubi_dump_flash(ubi, pnum, 0, ubi-&gt;peb_size);</div><div class='ctx'> 	return -EIO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -589,7 +580,7 @@ int ubi_io_sync_erase(struct ubi_device *ubi, int pnum, int torture)</div><div class='ctx'> </div><div class='ctx'> 	ubi_assert(pnum &gt;= 0 &amp;&amp; pnum &lt; ubi-&gt;peb_count);</div><div class='ctx'> </div><div class='del'>-	err = paranoid_check_not_bad(ubi, pnum);</div><div class='add'>+	err = self_check_not_bad(ubi, pnum);</div><div class='ctx'> 	if (err != 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -721,8 +712,8 @@ static int validate_ec_hdr(const struct ubi_device *ubi,</div><div class='ctx'> </div><div class='ctx'> bad:</div><div class='ctx'> 	ubi_err("bad EC header");</div><div class='del'>-	ubi_dbg_dump_ec_hdr(ec_hdr);</div><div class='del'>-	ubi_dbg_dump_stack();</div><div class='add'>+	ubi_dump_ec_hdr(ec_hdr);</div><div class='add'>+	dump_stack();</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -803,7 +794,7 @@ int ubi_io_read_ec_hdr(struct ubi_device *ubi, int pnum,</div><div class='ctx'> 		if (verbose) {</div><div class='ctx'> 			ubi_warn("bad magic number at PEB %d: %08x instead of "</div><div class='ctx'> 				 "%08x", pnum, magic, UBI_EC_HDR_MAGIC);</div><div class='del'>-			ubi_dbg_dump_ec_hdr(ec_hdr);</div><div class='add'>+			ubi_dump_ec_hdr(ec_hdr);</div><div class='ctx'> 		}</div><div class='ctx'> 		dbg_bld("bad magic number at PEB %d: %08x instead of "</div><div class='ctx'> 			"%08x", pnum, magic, UBI_EC_HDR_MAGIC);</div><div class='hunk'>@@ -817,7 +808,7 @@ int ubi_io_read_ec_hdr(struct ubi_device *ubi, int pnum,</div><div class='ctx'> 		if (verbose) {</div><div class='ctx'> 			ubi_warn("bad EC header CRC at PEB %d, calculated "</div><div class='ctx'> 				 "%#08x, read %#08x", pnum, crc, hdr_crc);</div><div class='del'>-			ubi_dbg_dump_ec_hdr(ec_hdr);</div><div class='add'>+			ubi_dump_ec_hdr(ec_hdr);</div><div class='ctx'> 		}</div><div class='ctx'> 		dbg_bld("bad EC header CRC at PEB %d, calculated "</div><div class='ctx'> 			"%#08x, read %#08x", pnum, crc, hdr_crc);</div><div class='hunk'>@@ -874,7 +865,7 @@ int ubi_io_write_ec_hdr(struct ubi_device *ubi, int pnum,</div><div class='ctx'> 	crc = crc32(UBI_CRC32_INIT, ec_hdr, UBI_EC_HDR_SIZE_CRC);</div><div class='ctx'> 	ec_hdr-&gt;hdr_crc = cpu_to_be32(crc);</div><div class='ctx'> </div><div class='del'>-	err = paranoid_check_ec_hdr(ubi, pnum, ec_hdr);</div><div class='add'>+	err = self_check_ec_hdr(ubi, pnum, ec_hdr);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -905,40 +896,40 @@ static int validate_vid_hdr(const struct ubi_device *ubi,</div><div class='ctx'> 	int usable_leb_size = ubi-&gt;leb_size - data_pad;</div><div class='ctx'> </div><div class='ctx'> 	if (copy_flag != 0 &amp;&amp; copy_flag != 1) {</div><div class='del'>-		dbg_err("bad copy_flag");</div><div class='add'>+		ubi_err("bad copy_flag");</div><div class='ctx'> 		goto bad;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vol_id &lt; 0 || lnum &lt; 0 || data_size &lt; 0 || used_ebs &lt; 0 ||</div><div class='ctx'> 	    data_pad &lt; 0) {</div><div class='del'>-		dbg_err("negative values");</div><div class='add'>+		ubi_err("negative values");</div><div class='ctx'> 		goto bad;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vol_id &gt;= UBI_MAX_VOLUMES &amp;&amp; vol_id &lt; UBI_INTERNAL_VOL_START) {</div><div class='del'>-		dbg_err("bad vol_id");</div><div class='add'>+		ubi_err("bad vol_id");</div><div class='ctx'> 		goto bad;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vol_id &lt; UBI_INTERNAL_VOL_START &amp;&amp; compat != 0) {</div><div class='del'>-		dbg_err("bad compat");</div><div class='add'>+		ubi_err("bad compat");</div><div class='ctx'> 		goto bad;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vol_id &gt;= UBI_INTERNAL_VOL_START &amp;&amp; compat != UBI_COMPAT_DELETE &amp;&amp;</div><div class='ctx'> 	    compat != UBI_COMPAT_RO &amp;&amp; compat != UBI_COMPAT_PRESERVE &amp;&amp;</div><div class='ctx'> 	    compat != UBI_COMPAT_REJECT) {</div><div class='del'>-		dbg_err("bad compat");</div><div class='add'>+		ubi_err("bad compat");</div><div class='ctx'> 		goto bad;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vol_type != UBI_VID_DYNAMIC &amp;&amp; vol_type != UBI_VID_STATIC) {</div><div class='del'>-		dbg_err("bad vol_type");</div><div class='add'>+		ubi_err("bad vol_type");</div><div class='ctx'> 		goto bad;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (data_pad &gt;= ubi-&gt;leb_size / 2) {</div><div class='del'>-		dbg_err("bad data_pad");</div><div class='add'>+		ubi_err("bad data_pad");</div><div class='ctx'> 		goto bad;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -950,45 +941,45 @@ static int validate_vid_hdr(const struct ubi_device *ubi,</div><div class='ctx'> 		 * mapped logical eraseblocks.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (used_ebs == 0) {</div><div class='del'>-			dbg_err("zero used_ebs");</div><div class='add'>+			ubi_err("zero used_ebs");</div><div class='ctx'> 			goto bad;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (data_size == 0) {</div><div class='del'>-			dbg_err("zero data_size");</div><div class='add'>+			ubi_err("zero data_size");</div><div class='ctx'> 			goto bad;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (lnum &lt; used_ebs - 1) {</div><div class='ctx'> 			if (data_size != usable_leb_size) {</div><div class='del'>-				dbg_err("bad data_size");</div><div class='add'>+				ubi_err("bad data_size");</div><div class='ctx'> 				goto bad;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else if (lnum == used_ebs - 1) {</div><div class='ctx'> 			if (data_size == 0) {</div><div class='del'>-				dbg_err("bad data_size at last LEB");</div><div class='add'>+				ubi_err("bad data_size at last LEB");</div><div class='ctx'> 				goto bad;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='del'>-			dbg_err("too high lnum");</div><div class='add'>+			ubi_err("too high lnum");</div><div class='ctx'> 			goto bad;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (copy_flag == 0) {</div><div class='ctx'> 			if (data_crc != 0) {</div><div class='del'>-				dbg_err("non-zero data CRC");</div><div class='add'>+				ubi_err("non-zero data CRC");</div><div class='ctx'> 				goto bad;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (data_size != 0) {</div><div class='del'>-				dbg_err("non-zero data_size");</div><div class='add'>+				ubi_err("non-zero data_size");</div><div class='ctx'> 				goto bad;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (data_size == 0) {</div><div class='del'>-				dbg_err("zero data_size of copy");</div><div class='add'>+				ubi_err("zero data_size of copy");</div><div class='ctx'> 				goto bad;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		if (used_ebs != 0) {</div><div class='del'>-			dbg_err("bad used_ebs");</div><div class='add'>+			ubi_err("bad used_ebs");</div><div class='ctx'> 			goto bad;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -997,8 +988,8 @@ static int validate_vid_hdr(const struct ubi_device *ubi,</div><div class='ctx'> </div><div class='ctx'> bad:</div><div class='ctx'> 	ubi_err("bad VID header");</div><div class='del'>-	ubi_dbg_dump_vid_hdr(vid_hdr);</div><div class='del'>-	ubi_dbg_dump_stack();</div><div class='add'>+	ubi_dump_vid_hdr(vid_hdr);</div><div class='add'>+	dump_stack();</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1054,7 +1045,7 @@ int ubi_io_read_vid_hdr(struct ubi_device *ubi, int pnum,</div><div class='ctx'> 		if (verbose) {</div><div class='ctx'> 			ubi_warn("bad magic number at PEB %d: %08x instead of "</div><div class='ctx'> 				 "%08x", pnum, magic, UBI_VID_HDR_MAGIC);</div><div class='del'>-			ubi_dbg_dump_vid_hdr(vid_hdr);</div><div class='add'>+			ubi_dump_vid_hdr(vid_hdr);</div><div class='ctx'> 		}</div><div class='ctx'> 		dbg_bld("bad magic number at PEB %d: %08x instead of "</div><div class='ctx'> 			"%08x", pnum, magic, UBI_VID_HDR_MAGIC);</div><div class='hunk'>@@ -1068,7 +1059,7 @@ int ubi_io_read_vid_hdr(struct ubi_device *ubi, int pnum,</div><div class='ctx'> 		if (verbose) {</div><div class='ctx'> 			ubi_warn("bad CRC at PEB %d, calculated %#08x, "</div><div class='ctx'> 				 "read %#08x", pnum, crc, hdr_crc);</div><div class='del'>-			ubi_dbg_dump_vid_hdr(vid_hdr);</div><div class='add'>+			ubi_dump_vid_hdr(vid_hdr);</div><div class='ctx'> 		}</div><div class='ctx'> 		dbg_bld("bad CRC at PEB %d, calculated %#08x, "</div><div class='ctx'> 			"read %#08x", pnum, crc, hdr_crc);</div><div class='hunk'>@@ -1112,7 +1103,7 @@ int ubi_io_write_vid_hdr(struct ubi_device *ubi, int pnum,</div><div class='ctx'> 	dbg_io("write VID header to PEB %d", pnum);</div><div class='ctx'> 	ubi_assert(pnum &gt;= 0 &amp;&amp;  pnum &lt; ubi-&gt;peb_count);</div><div class='ctx'> </div><div class='del'>-	err = paranoid_check_peb_ec_hdr(ubi, pnum);</div><div class='add'>+	err = self_check_peb_ec_hdr(ubi, pnum);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -1121,7 +1112,7 @@ int ubi_io_write_vid_hdr(struct ubi_device *ubi, int pnum,</div><div class='ctx'> 	crc = crc32(UBI_CRC32_INIT, vid_hdr, UBI_VID_HDR_SIZE_CRC);</div><div class='ctx'> 	vid_hdr-&gt;hdr_crc = cpu_to_be32(crc);</div><div class='ctx'> </div><div class='del'>-	err = paranoid_check_vid_hdr(ubi, pnum, vid_hdr);</div><div class='add'>+	err = self_check_vid_hdr(ubi, pnum, vid_hdr);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -1131,17 +1122,15 @@ int ubi_io_write_vid_hdr(struct ubi_device *ubi, int pnum,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MTD_UBI_DEBUG</div><div class='del'>-</div><div class='ctx'> /**</div><div class='del'>- * paranoid_check_not_bad - ensure that a physical eraseblock is not bad.</div><div class='add'>+ * self_check_not_bad - ensure that a physical eraseblock is not bad.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @pnum: physical eraseblock number to check</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns zero if the physical eraseblock is good, %-EINVAL if</div><div class='ctx'>  * it is bad and a negative error code if an error occurred.</div><div class='ctx'>  */</div><div class='del'>-static int paranoid_check_not_bad(const struct ubi_device *ubi, int pnum)</div><div class='add'>+static int self_check_not_bad(const struct ubi_device *ubi, int pnum)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -1152,13 +1141,13 @@ static int paranoid_check_not_bad(const struct ubi_device *ubi, int pnum)</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	ubi_err("paranoid check failed for PEB %d", pnum);</div><div class='del'>-	ubi_dbg_dump_stack();</div><div class='add'>+	ubi_err("self-check failed for PEB %d", pnum);</div><div class='add'>+	dump_stack();</div><div class='ctx'> 	return err &gt; 0 ? -EINVAL : err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * paranoid_check_ec_hdr - check if an erase counter header is all right.</div><div class='add'>+ * self_check_ec_hdr - check if an erase counter header is all right.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @pnum: physical eraseblock number the erase counter header belongs to</div><div class='ctx'>  * @ec_hdr: the erase counter header to check</div><div class='hunk'>@@ -1166,8 +1155,8 @@ static int paranoid_check_not_bad(const struct ubi_device *ubi, int pnum)</div><div class='ctx'>  * This function returns zero if the erase counter header contains valid</div><div class='ctx'>  * values, and %-EINVAL if not.</div><div class='ctx'>  */</div><div class='del'>-static int paranoid_check_ec_hdr(const struct ubi_device *ubi, int pnum,</div><div class='del'>-				 const struct ubi_ec_hdr *ec_hdr)</div><div class='add'>+static int self_check_ec_hdr(const struct ubi_device *ubi, int pnum,</div><div class='add'>+			     const struct ubi_ec_hdr *ec_hdr)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	uint32_t magic;</div><div class='hunk'>@@ -1184,27 +1173,27 @@ static int paranoid_check_ec_hdr(const struct ubi_device *ubi, int pnum,</div><div class='ctx'> </div><div class='ctx'> 	err = validate_ec_hdr(ubi, ec_hdr);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		ubi_err("paranoid check failed for PEB %d", pnum);</div><div class='add'>+		ubi_err("self-check failed for PEB %d", pnum);</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='del'>-	ubi_dbg_dump_ec_hdr(ec_hdr);</div><div class='del'>-	ubi_dbg_dump_stack();</div><div class='add'>+	ubi_dump_ec_hdr(ec_hdr);</div><div class='add'>+	dump_stack();</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * paranoid_check_peb_ec_hdr - check erase counter header.</div><div class='add'>+ * self_check_peb_ec_hdr - check erase counter header.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @pnum: the physical eraseblock number to check</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns zero if the erase counter header is all right and and</div><div class='ctx'>  * a negative error code if not or if an error occurred.</div><div class='ctx'>  */</div><div class='del'>-static int paranoid_check_peb_ec_hdr(const struct ubi_device *ubi, int pnum)</div><div class='add'>+static int self_check_peb_ec_hdr(const struct ubi_device *ubi, int pnum)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	uint32_t crc, hdr_crc;</div><div class='hunk'>@@ -1225,14 +1214,14 @@ static int paranoid_check_peb_ec_hdr(const struct ubi_device *ubi, int pnum)</div><div class='ctx'> 	hdr_crc = be32_to_cpu(ec_hdr-&gt;hdr_crc);</div><div class='ctx'> 	if (hdr_crc != crc) {</div><div class='ctx'> 		ubi_err("bad CRC, calculated %#08x, read %#08x", crc, hdr_crc);</div><div class='del'>-		ubi_err("paranoid check failed for PEB %d", pnum);</div><div class='del'>-		ubi_dbg_dump_ec_hdr(ec_hdr);</div><div class='del'>-		ubi_dbg_dump_stack();</div><div class='add'>+		ubi_err("self-check failed for PEB %d", pnum);</div><div class='add'>+		ubi_dump_ec_hdr(ec_hdr);</div><div class='add'>+		dump_stack();</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = paranoid_check_ec_hdr(ubi, pnum, ec_hdr);</div><div class='add'>+	err = self_check_ec_hdr(ubi, pnum, ec_hdr);</div><div class='ctx'> </div><div class='ctx'> exit:</div><div class='ctx'> 	kfree(ec_hdr);</div><div class='hunk'>@@ -1240,7 +1229,7 @@ exit:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * paranoid_check_vid_hdr - check that a volume identifier header is all right.</div><div class='add'>+ * self_check_vid_hdr - check that a volume identifier header is all right.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @pnum: physical eraseblock number the volume identifier header belongs to</div><div class='ctx'>  * @vid_hdr: the volume identifier header to check</div><div class='hunk'>@@ -1248,8 +1237,8 @@ exit:</div><div class='ctx'>  * This function returns zero if the volume identifier header is all right, and</div><div class='ctx'>  * %-EINVAL if not.</div><div class='ctx'>  */</div><div class='del'>-static int paranoid_check_vid_hdr(const struct ubi_device *ubi, int pnum,</div><div class='del'>-				  const struct ubi_vid_hdr *vid_hdr)</div><div class='add'>+static int self_check_vid_hdr(const struct ubi_device *ubi, int pnum,</div><div class='add'>+			      const struct ubi_vid_hdr *vid_hdr)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	uint32_t magic;</div><div class='hunk'>@@ -1266,29 +1255,29 @@ static int paranoid_check_vid_hdr(const struct ubi_device *ubi, int pnum,</div><div class='ctx'> </div><div class='ctx'> 	err = validate_vid_hdr(ubi, vid_hdr);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		ubi_err("paranoid check failed for PEB %d", pnum);</div><div class='add'>+		ubi_err("self-check failed for PEB %d", pnum);</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='del'>-	ubi_err("paranoid check failed for PEB %d", pnum);</div><div class='del'>-	ubi_dbg_dump_vid_hdr(vid_hdr);</div><div class='del'>-	ubi_dbg_dump_stack();</div><div class='add'>+	ubi_err("self-check failed for PEB %d", pnum);</div><div class='add'>+	ubi_dump_vid_hdr(vid_hdr);</div><div class='add'>+	dump_stack();</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * paranoid_check_peb_vid_hdr - check volume identifier header.</div><div class='add'>+ * self_check_peb_vid_hdr - check volume identifier header.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @pnum: the physical eraseblock number to check</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns zero if the volume identifier header is all right,</div><div class='ctx'>  * and a negative error code if not or if an error occurred.</div><div class='ctx'>  */</div><div class='del'>-static int paranoid_check_peb_vid_hdr(const struct ubi_device *ubi, int pnum)</div><div class='add'>+static int self_check_peb_vid_hdr(const struct ubi_device *ubi, int pnum)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	uint32_t crc, hdr_crc;</div><div class='hunk'>@@ -1313,14 +1302,14 @@ static int paranoid_check_peb_vid_hdr(const struct ubi_device *ubi, int pnum)</div><div class='ctx'> 	if (hdr_crc != crc) {</div><div class='ctx'> 		ubi_err("bad VID header CRC at PEB %d, calculated %#08x, "</div><div class='ctx'> 			"read %#08x", pnum, crc, hdr_crc);</div><div class='del'>-		ubi_err("paranoid check failed for PEB %d", pnum);</div><div class='del'>-		ubi_dbg_dump_vid_hdr(vid_hdr);</div><div class='del'>-		ubi_dbg_dump_stack();</div><div class='add'>+		ubi_err("self-check failed for PEB %d", pnum);</div><div class='add'>+		ubi_dump_vid_hdr(vid_hdr);</div><div class='add'>+		dump_stack();</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = paranoid_check_vid_hdr(ubi, pnum, vid_hdr);</div><div class='add'>+	err = self_check_vid_hdr(ubi, pnum, vid_hdr);</div><div class='ctx'> </div><div class='ctx'> exit:</div><div class='ctx'> 	ubi_free_vid_hdr(ubi, vid_hdr);</div><div class='hunk'>@@ -1328,7 +1317,7 @@ exit:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_dbg_check_write - make sure write succeeded.</div><div class='add'>+ * self_check_write - make sure write succeeded.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @buf: buffer with data which were written</div><div class='ctx'>  * @pnum: physical eraseblock number the data were written to</div><div class='hunk'>@@ -1339,8 +1328,8 @@ exit:</div><div class='ctx'>  * the original data buffer - the data have to match. Returns zero if the data</div><div class='ctx'>  * match and a negative error code if not or in case of failure.</div><div class='ctx'>  */</div><div class='del'>-int ubi_dbg_check_write(struct ubi_device *ubi, const void *buf, int pnum,</div><div class='del'>-			int offset, int len)</div><div class='add'>+static int self_check_write(struct ubi_device *ubi, const void *buf, int pnum,</div><div class='add'>+			    int offset, int len)</div><div class='ctx'> {</div><div class='ctx'> 	int err, i;</div><div class='ctx'> 	size_t read;</div><div class='hunk'>@@ -1368,7 +1357,7 @@ int ubi_dbg_check_write(struct ubi_device *ubi, const void *buf, int pnum,</div><div class='ctx'> 		if (c == c1)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		ubi_err("paranoid check failed for PEB %d:%d, len %d",</div><div class='add'>+		ubi_err("self-check failed for PEB %d:%d, len %d",</div><div class='ctx'> 			pnum, offset, len);</div><div class='ctx'> 		ubi_msg("data differ at position %d", i);</div><div class='ctx'> 		dump_len = max_t(int, 128, len - i);</div><div class='hunk'>@@ -1380,7 +1369,7 @@ int ubi_dbg_check_write(struct ubi_device *ubi, const void *buf, int pnum,</div><div class='ctx'> 			i, i + dump_len);</div><div class='ctx'> 		print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1,</div><div class='ctx'> 			       buf1 + i, dump_len, 1);</div><div class='del'>-		ubi_dbg_dump_stack();</div><div class='add'>+		dump_stack();</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1394,7 +1383,7 @@ out_free:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_dbg_check_all_ff - check that a region of flash is empty.</div><div class='add'>+ * ubi_self_check_all_ff - check that a region of flash is empty.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @pnum: the physical eraseblock number to check</div><div class='ctx'>  * @offset: the starting offset within the physical eraseblock to check</div><div class='hunk'>@@ -1404,7 +1393,7 @@ out_free:</div><div class='ctx'>  * @offset of the physical eraseblock @pnum, and a negative error code if not</div><div class='ctx'>  * or if an error occurred.</div><div class='ctx'>  */</div><div class='del'>-int ubi_dbg_check_all_ff(struct ubi_device *ubi, int pnum, int offset, int len)</div><div class='add'>+int ubi_self_check_all_ff(struct ubi_device *ubi, int pnum, int offset, int len)</div><div class='ctx'> {</div><div class='ctx'> 	size_t read;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1438,14 +1427,12 @@ int ubi_dbg_check_all_ff(struct ubi_device *ubi, int pnum, int offset, int len)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='del'>-	ubi_err("paranoid check failed for PEB %d", pnum);</div><div class='add'>+	ubi_err("self-check failed for PEB %d", pnum);</div><div class='ctx'> 	ubi_msg("hex dump of the %d-%d region", offset, offset + len);</div><div class='ctx'> 	print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1, buf, len, 1);</div><div class='ctx'> 	err = -EINVAL;</div><div class='ctx'> error:</div><div class='del'>-	ubi_dbg_dump_stack();</div><div class='add'>+	dump_stack();</div><div class='ctx'> 	vfree(buf);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MTD_UBI_DEBUG */</div><div class='head'>diff --git a/drivers/mtd/ubi/kapi.c b/drivers/mtd/ubi/kapi.c<br/>index 9fdb35367fe0..3aac1acceeb4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/kapi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/kapi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/kapi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/kapi.c</a></div><div class='hunk'>@@ -221,7 +221,7 @@ out_free:</div><div class='ctx'> 	kfree(desc);</div><div class='ctx'> out_put_ubi:</div><div class='ctx'> 	ubi_put_device(ubi);</div><div class='del'>-	dbg_err("cannot open device %d, volume %d, error %d",</div><div class='add'>+	ubi_err("cannot open device %d, volume %d, error %d",</div><div class='ctx'> 		ubi_num, vol_id, err);</div><div class='ctx'> 	return ERR_PTR(err);</div><div class='ctx'> }</div><div class='hunk'>@@ -426,11 +426,9 @@ EXPORT_SYMBOL_GPL(ubi_leb_read);</div><div class='ctx'>  * @buf: data to write</div><div class='ctx'>  * @offset: offset within the logical eraseblock where to write</div><div class='ctx'>  * @len: how many bytes to write</div><div class='del'>- * @dtype: expected data type</div><div class='ctx'>  *</div><div class='ctx'>  * This function writes @len bytes of data from @buf to offset @offset of</div><div class='del'>- * logical eraseblock @lnum. The @dtype argument describes expected lifetime of</div><div class='del'>- * the data.</div><div class='add'>+ * logical eraseblock @lnum.</div><div class='ctx'>  *</div><div class='ctx'>  * This function takes care of physical eraseblock write failures. If write to</div><div class='ctx'>  * the physical eraseblock write operation fails, the logical eraseblock is</div><div class='hunk'>@@ -447,7 +445,7 @@ EXPORT_SYMBOL_GPL(ubi_leb_read);</div><div class='ctx'>  * returns immediately with %-EBADF code.</div><div class='ctx'>  */</div><div class='ctx'> int ubi_leb_write(struct ubi_volume_desc *desc, int lnum, const void *buf,</div><div class='del'>-		  int offset, int len, int dtype)</div><div class='add'>+		  int offset, int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct ubi_volume *vol = desc-&gt;vol;</div><div class='ctx'> 	struct ubi_device *ubi = vol-&gt;ubi;</div><div class='hunk'>@@ -466,17 +464,13 @@ int ubi_leb_write(struct ubi_volume_desc *desc, int lnum, const void *buf,</div><div class='ctx'> 	    offset &amp; (ubi-&gt;min_io_size - 1) || len &amp; (ubi-&gt;min_io_size - 1))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (dtype != UBI_LONGTERM &amp;&amp; dtype != UBI_SHORTTERM &amp;&amp;</div><div class='del'>-	    dtype != UBI_UNKNOWN)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	if (vol-&gt;upd_marker)</div><div class='ctx'> 		return -EBADF;</div><div class='ctx'> </div><div class='ctx'> 	if (len == 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return ubi_eba_write_leb(ubi, vol, lnum, buf, offset, len, dtype);</div><div class='add'>+	return ubi_eba_write_leb(ubi, vol, lnum, buf, offset, len);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ubi_leb_write);</div><div class='ctx'> </div><div class='hunk'>@@ -486,7 +480,6 @@ EXPORT_SYMBOL_GPL(ubi_leb_write);</div><div class='ctx'>  * @lnum: logical eraseblock number to change</div><div class='ctx'>  * @buf: data to write</div><div class='ctx'>  * @len: how many bytes to write</div><div class='del'>- * @dtype: expected data type</div><div class='ctx'>  *</div><div class='ctx'>  * This function changes the contents of a logical eraseblock atomically. @buf</div><div class='ctx'>  * has to contain new logical eraseblock data, and @len - the length of the</div><div class='hunk'>@@ -497,7 +490,7 @@ EXPORT_SYMBOL_GPL(ubi_leb_write);</div><div class='ctx'>  * code in case of failure.</div><div class='ctx'>  */</div><div class='ctx'> int ubi_leb_change(struct ubi_volume_desc *desc, int lnum, const void *buf,</div><div class='del'>-		   int len, int dtype)</div><div class='add'>+		   int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct ubi_volume *vol = desc-&gt;vol;</div><div class='ctx'> 	struct ubi_device *ubi = vol-&gt;ubi;</div><div class='hunk'>@@ -515,17 +508,13 @@ int ubi_leb_change(struct ubi_volume_desc *desc, int lnum, const void *buf,</div><div class='ctx'> 	    len &gt; vol-&gt;usable_leb_size || len &amp; (ubi-&gt;min_io_size - 1))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (dtype != UBI_LONGTERM &amp;&amp; dtype != UBI_SHORTTERM &amp;&amp;</div><div class='del'>-	    dtype != UBI_UNKNOWN)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	if (vol-&gt;upd_marker)</div><div class='ctx'> 		return -EBADF;</div><div class='ctx'> </div><div class='ctx'> 	if (len == 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return ubi_eba_atomic_leb_change(ubi, vol, lnum, buf, len, dtype);</div><div class='add'>+	return ubi_eba_atomic_leb_change(ubi, vol, lnum, buf, len);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ubi_leb_change);</div><div class='ctx'> </div><div class='hunk'>@@ -562,7 +551,7 @@ int ubi_leb_erase(struct ubi_volume_desc *desc, int lnum)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return ubi_wl_flush(ubi);</div><div class='add'>+	return ubi_wl_flush(ubi, vol-&gt;vol_id, lnum);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ubi_leb_erase);</div><div class='ctx'> </div><div class='hunk'>@@ -626,7 +615,6 @@ EXPORT_SYMBOL_GPL(ubi_leb_unmap);</div><div class='ctx'>  * ubi_leb_map - map logical eraseblock to a physical eraseblock.</div><div class='ctx'>  * @desc: volume descriptor</div><div class='ctx'>  * @lnum: logical eraseblock number</div><div class='del'>- * @dtype: expected data type</div><div class='ctx'>  *</div><div class='ctx'>  * This function maps an un-mapped logical eraseblock @lnum to a physical</div><div class='ctx'>  * eraseblock. This means, that after a successful invocation of this</div><div class='hunk'>@@ -639,7 +627,7 @@ EXPORT_SYMBOL_GPL(ubi_leb_unmap);</div><div class='ctx'>  * eraseblock is already mapped, and other negative error codes in case of</div><div class='ctx'>  * other failures.</div><div class='ctx'>  */</div><div class='del'>-int ubi_leb_map(struct ubi_volume_desc *desc, int lnum, int dtype)</div><div class='add'>+int ubi_leb_map(struct ubi_volume_desc *desc, int lnum)</div><div class='ctx'> {</div><div class='ctx'> 	struct ubi_volume *vol = desc-&gt;vol;</div><div class='ctx'> 	struct ubi_device *ubi = vol-&gt;ubi;</div><div class='hunk'>@@ -652,17 +640,13 @@ int ubi_leb_map(struct ubi_volume_desc *desc, int lnum, int dtype)</div><div class='ctx'> 	if (lnum &lt; 0 || lnum &gt;= vol-&gt;reserved_pebs)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (dtype != UBI_LONGTERM &amp;&amp; dtype != UBI_SHORTTERM &amp;&amp;</div><div class='del'>-	    dtype != UBI_UNKNOWN)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	if (vol-&gt;upd_marker)</div><div class='ctx'> 		return -EBADF;</div><div class='ctx'> </div><div class='ctx'> 	if (vol-&gt;eba_tbl[lnum] &gt;= 0)</div><div class='ctx'> 		return -EBADMSG;</div><div class='ctx'> </div><div class='del'>-	return ubi_eba_write_leb(ubi, vol, lnum, NULL, 0, 0, dtype);</div><div class='add'>+	return ubi_eba_write_leb(ubi, vol, lnum, NULL, 0, 0);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ubi_leb_map);</div><div class='ctx'> </div><div class='hunk'>@@ -720,6 +704,33 @@ int ubi_sync(int ubi_num)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ubi_sync);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ubi_flush - flush UBI work queue.</div><div class='add'>+ * @ubi_num: UBI device to flush work queue</div><div class='add'>+ * @vol_id: volume id to flush for</div><div class='add'>+ * @lnum: logical eraseblock number to flush for</div><div class='add'>+ *</div><div class='add'>+ * This function executes all pending works for a particular volume id / logical</div><div class='add'>+ * eraseblock number pair. If either value is set to %UBI_ALL, then it acts as</div><div class='add'>+ * a wildcard for all of the corresponding volume numbers or logical</div><div class='add'>+ * eraseblock numbers. It returns zero in case of success and a negative error</div><div class='add'>+ * code in case of failure.</div><div class='add'>+ */</div><div class='add'>+int ubi_flush(int ubi_num, int vol_id, int lnum)</div><div class='add'>+{</div><div class='add'>+	struct ubi_device *ubi;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	ubi = ubi_get_device(ubi_num);</div><div class='add'>+	if (!ubi)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	err = ubi_wl_flush(ubi, vol_id, lnum);</div><div class='add'>+	ubi_put_device(ubi);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ubi_flush);</div><div class='add'>+</div><div class='ctx'> BLOCKING_NOTIFIER_HEAD(ubi_notifiers);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/mtd/ubi/scan.h b/drivers/mtd/ubi/scan.h<br/>deleted file mode 100644<br/>index d48aef15ab5d..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/scan.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/scan.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,174 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) International Business Machines Corp., 2006</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See</div><div class='del'>- * the GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA</div><div class='del'>- *</div><div class='del'>- * Author: Artem Bityutskiy (Битюцкий Артём)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __UBI_SCAN_H__</div><div class='del'>-#define __UBI_SCAN_H__</div><div class='del'>-</div><div class='del'>-/* The erase counter value for this physical eraseblock is unknown */</div><div class='del'>-#define UBI_SCAN_UNKNOWN_EC (-1)</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct ubi_scan_leb - scanning information about a physical eraseblock.</div><div class='del'>- * @ec: erase counter (%UBI_SCAN_UNKNOWN_EC if it is unknown)</div><div class='del'>- * @pnum: physical eraseblock number</div><div class='del'>- * @lnum: logical eraseblock number</div><div class='del'>- * @scrub: if this physical eraseblock needs scrubbing</div><div class='del'>- * @copy_flag: this LEB is a copy (@copy_flag is set in VID header of this LEB)</div><div class='del'>- * @sqnum: sequence number</div><div class='del'>- * @u: unions RB-tree or @list links</div><div class='del'>- * @u.rb: link in the per-volume RB-tree of &amp;struct ubi_scan_leb objects</div><div class='del'>- * @u.list: link in one of the eraseblock lists</div><div class='del'>- *</div><div class='del'>- * One object of this type is allocated for each physical eraseblock during</div><div class='del'>- * scanning.</div><div class='del'>- */</div><div class='del'>-struct ubi_scan_leb {</div><div class='del'>-	int ec;</div><div class='del'>-	int pnum;</div><div class='del'>-	int lnum;</div><div class='del'>-	unsigned int scrub:1;</div><div class='del'>-	unsigned int copy_flag:1;</div><div class='del'>-	unsigned long long sqnum;</div><div class='del'>-	union {</div><div class='del'>-		struct rb_node rb;</div><div class='del'>-		struct list_head list;</div><div class='del'>-	} u;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct ubi_scan_volume - scanning information about a volume.</div><div class='del'>- * @vol_id: volume ID</div><div class='del'>- * @highest_lnum: highest logical eraseblock number in this volume</div><div class='del'>- * @leb_count: number of logical eraseblocks in this volume</div><div class='del'>- * @vol_type: volume type</div><div class='del'>- * @used_ebs: number of used logical eraseblocks in this volume (only for</div><div class='del'>- *            static volumes)</div><div class='del'>- * @last_data_size: amount of data in the last logical eraseblock of this</div><div class='del'>- *                  volume (always equivalent to the usable logical eraseblock</div><div class='del'>- *                  size in case of dynamic volumes)</div><div class='del'>- * @data_pad: how many bytes at the end of logical eraseblocks of this volume</div><div class='del'>- *            are not used (due to volume alignment)</div><div class='del'>- * @compat: compatibility flags of this volume</div><div class='del'>- * @rb: link in the volume RB-tree</div><div class='del'>- * @root: root of the RB-tree containing all the eraseblock belonging to this</div><div class='del'>- *        volume (&amp;struct ubi_scan_leb objects)</div><div class='del'>- *</div><div class='del'>- * One object of this type is allocated for each volume during scanning.</div><div class='del'>- */</div><div class='del'>-struct ubi_scan_volume {</div><div class='del'>-	int vol_id;</div><div class='del'>-	int highest_lnum;</div><div class='del'>-	int leb_count;</div><div class='del'>-	int vol_type;</div><div class='del'>-	int used_ebs;</div><div class='del'>-	int last_data_size;</div><div class='del'>-	int data_pad;</div><div class='del'>-	int compat;</div><div class='del'>-	struct rb_node rb;</div><div class='del'>-	struct rb_root root;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct ubi_scan_info - UBI scanning information.</div><div class='del'>- * @volumes: root of the volume RB-tree</div><div class='del'>- * @corr: list of corrupted physical eraseblocks</div><div class='del'>- * @free: list of free physical eraseblocks</div><div class='del'>- * @erase: list of physical eraseblocks which have to be erased</div><div class='del'>- * @alien: list of physical eraseblocks which should not be used by UBI (e.g.,</div><div class='del'>- *         those belonging to "preserve"-compatible internal volumes)</div><div class='del'>- * @corr_peb_count: count of PEBs in the @corr list</div><div class='del'>- * @empty_peb_count: count of PEBs which are presumably empty (contain only</div><div class='del'>- *                   0xFF bytes)</div><div class='del'>- * @alien_peb_count: count of PEBs in the @alien list</div><div class='del'>- * @bad_peb_count: count of bad physical eraseblocks</div><div class='del'>- * @maybe_bad_peb_count: count of bad physical eraseblocks which are not marked</div><div class='del'>- *                       as bad yet, but which look like bad</div><div class='del'>- * @vols_found: number of volumes found during scanning</div><div class='del'>- * @highest_vol_id: highest volume ID</div><div class='del'>- * @is_empty: flag indicating whether the MTD device is empty or not</div><div class='del'>- * @min_ec: lowest erase counter value</div><div class='del'>- * @max_ec: highest erase counter value</div><div class='del'>- * @max_sqnum: highest sequence number value</div><div class='del'>- * @mean_ec: mean erase counter value</div><div class='del'>- * @ec_sum: a temporary variable used when calculating @mean_ec</div><div class='del'>- * @ec_count: a temporary variable used when calculating @mean_ec</div><div class='del'>- * @scan_leb_slab: slab cache for &amp;struct ubi_scan_leb objects</div><div class='del'>- *</div><div class='del'>- * This data structure contains the result of scanning and may be used by other</div><div class='del'>- * UBI sub-systems to build final UBI data structures, further error-recovery</div><div class='del'>- * and so on.</div><div class='del'>- */</div><div class='del'>-struct ubi_scan_info {</div><div class='del'>-	struct rb_root volumes;</div><div class='del'>-	struct list_head corr;</div><div class='del'>-	struct list_head free;</div><div class='del'>-	struct list_head erase;</div><div class='del'>-	struct list_head alien;</div><div class='del'>-	int corr_peb_count;</div><div class='del'>-	int empty_peb_count;</div><div class='del'>-	int alien_peb_count;</div><div class='del'>-	int bad_peb_count;</div><div class='del'>-	int maybe_bad_peb_count;</div><div class='del'>-	int vols_found;</div><div class='del'>-	int highest_vol_id;</div><div class='del'>-	int is_empty;</div><div class='del'>-	int min_ec;</div><div class='del'>-	int max_ec;</div><div class='del'>-	unsigned long long max_sqnum;</div><div class='del'>-	int mean_ec;</div><div class='del'>-	uint64_t ec_sum;</div><div class='del'>-	int ec_count;</div><div class='del'>-	struct kmem_cache *scan_leb_slab;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ubi_device;</div><div class='del'>-struct ubi_vid_hdr;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ubi_scan_move_to_list - move a PEB from the volume tree to a list.</div><div class='del'>- *</div><div class='del'>- * @sv: volume scanning information</div><div class='del'>- * @seb: scanning eraseblock information</div><div class='del'>- * @list: the list to move to</div><div class='del'>- */</div><div class='del'>-static inline void ubi_scan_move_to_list(struct ubi_scan_volume *sv,</div><div class='del'>-					 struct ubi_scan_leb *seb,</div><div class='del'>-					 struct list_head *list)</div><div class='del'>-{</div><div class='del'>-		rb_erase(&amp;seb-&gt;u.rb, &amp;sv-&gt;root);</div><div class='del'>-		list_add_tail(&amp;seb-&gt;u.list, list);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int ubi_scan_add_used(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='del'>-		      int pnum, int ec, const struct ubi_vid_hdr *vid_hdr,</div><div class='del'>-		      int bitflips);</div><div class='del'>-struct ubi_scan_volume *ubi_scan_find_sv(const struct ubi_scan_info *si,</div><div class='del'>-					 int vol_id);</div><div class='del'>-struct ubi_scan_leb *ubi_scan_find_seb(const struct ubi_scan_volume *sv,</div><div class='del'>-				       int lnum);</div><div class='del'>-void ubi_scan_rm_volume(struct ubi_scan_info *si, struct ubi_scan_volume *sv);</div><div class='del'>-struct ubi_scan_leb *ubi_scan_get_free_peb(struct ubi_device *ubi,</div><div class='del'>-					   struct ubi_scan_info *si);</div><div class='del'>-int ubi_scan_erase_peb(struct ubi_device *ubi, const struct ubi_scan_info *si,</div><div class='del'>-		       int pnum, int ec);</div><div class='del'>-struct ubi_scan_info *ubi_scan(struct ubi_device *ubi);</div><div class='del'>-void ubi_scan_destroy_si(struct ubi_scan_info *si);</div><div class='del'>-</div><div class='del'>-#endif /* !__UBI_SCAN_H__ */</div><div class='head'>diff --git a/drivers/mtd/ubi/ubi-media.h b/drivers/mtd/ubi/ubi-media.h<br/>index 6fb8ec2174a5..468ffbc0eabd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/ubi-media.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/ubi-media.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/ubi-media.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/ubi-media.h</a></div><div class='hunk'>@@ -149,10 +149,10 @@ enum {</div><div class='ctx'>  * The @image_seq field is used to validate a UBI image that has been prepared</div><div class='ctx'>  * for a UBI device. The @image_seq value can be any value, but it must be the</div><div class='ctx'>  * same on all eraseblocks. UBI will ensure that all new erase counter headers</div><div class='del'>- * also contain this value, and will check the value when scanning at start-up.</div><div class='add'>+ * also contain this value, and will check the value when attaching the flash.</div><div class='ctx'>  * One way to make use of @image_seq is to increase its value by one every time</div><div class='ctx'>  * an image is flashed over an existing image, then, if the flashing does not</div><div class='del'>- * complete, UBI will detect the error when scanning.</div><div class='add'>+ * complete, UBI will detect the error when attaching the media.</div><div class='ctx'>  */</div><div class='ctx'> struct ubi_ec_hdr {</div><div class='ctx'> 	__be32  magic;</div><div class='hunk'>@@ -298,8 +298,8 @@ struct ubi_vid_hdr {</div><div class='ctx'> #define UBI_INT_VOL_COUNT 1</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Starting ID of internal volumes. There is reserved room for 4096 internal</div><div class='del'>- * volumes.</div><div class='add'>+ * Starting ID of internal volumes: 0x7fffefff.</div><div class='add'>+ * There is reserved room for 4096 internal volumes.</div><div class='ctx'>  */</div><div class='ctx'> #define UBI_INTERNAL_VOL_START (0x7FFFFFFF - 4096)</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/ubi/ubi.h b/drivers/mtd/ubi/ubi.h<br/>index b162790790a9..a1a81c9ea8ce 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/ubi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/ubi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/ubi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/ubi.h</a></div><div class='hunk'>@@ -43,7 +43,6 @@</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ubi-media.h"</div><div class='del'>-#include "scan.h"</div><div class='ctx'> </div><div class='ctx'> /* Maximum number of supported UBI devices */</div><div class='ctx'> #define UBI_MAX_DEVICES 32</div><div class='hunk'>@@ -66,7 +65,10 @@</div><div class='ctx'> /* Background thread name pattern */</div><div class='ctx'> #define UBI_BGT_NAME_PATTERN "ubi_bgt%dd"</div><div class='ctx'> </div><div class='del'>-/* This marker in the EBA table means that the LEB is um-mapped */</div><div class='add'>+/*</div><div class='add'>+ * This marker in the EBA table means that the LEB is um-mapped.</div><div class='add'>+ * NOTE! It has to have the same value as %UBI_ALL.</div><div class='add'>+ */</div><div class='ctx'> #define UBI_LEB_UNMAPPED -1</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -82,6 +84,9 @@</div><div class='ctx'>  */</div><div class='ctx'> #define UBI_PROT_QUEUE_LEN 10</div><div class='ctx'> </div><div class='add'>+/* The volume ID/LEB number/erase counter is unknown */</div><div class='add'>+#define UBI_UNKNOWN -1</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Error codes returned by the I/O sub-system.</div><div class='ctx'>  *</div><div class='hunk'>@@ -222,8 +227,6 @@ struct ubi_volume_desc;</div><div class='ctx'>  * @upd_ebs: how many eraseblocks are expected to be updated</div><div class='ctx'>  * @ch_lnum: LEB number which is being changing by the atomic LEB change</div><div class='ctx'>  *           operation</div><div class='del'>- * @ch_dtype: data persistency type which is being changing by the atomic LEB</div><div class='del'>- *            change operation</div><div class='ctx'>  * @upd_bytes: how many bytes are expected to be received for volume update or</div><div class='ctx'>  *             atomic LEB change</div><div class='ctx'>  * @upd_received: how many bytes were already received for volume update or</div><div class='hunk'>@@ -270,7 +273,6 @@ struct ubi_volume {</div><div class='ctx'> </div><div class='ctx'> 	int upd_ebs;</div><div class='ctx'> 	int ch_lnum;</div><div class='del'>-	int ch_dtype;</div><div class='ctx'> 	long long upd_bytes;</div><div class='ctx'> 	long long upd_received;</div><div class='ctx'> 	void *upd_buf;</div><div class='hunk'>@@ -477,6 +479,124 @@ struct ubi_device {</div><div class='ctx'> 	struct ubi_debug_info *dbg;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * struct ubi_ainf_peb - attach information about a physical eraseblock.</div><div class='add'>+ * @ec: erase counter (%UBI_UNKNOWN if it is unknown)</div><div class='add'>+ * @pnum: physical eraseblock number</div><div class='add'>+ * @vol_id: ID of the volume this LEB belongs to</div><div class='add'>+ * @lnum: logical eraseblock number</div><div class='add'>+ * @scrub: if this physical eraseblock needs scrubbing</div><div class='add'>+ * @copy_flag: this LEB is a copy (@copy_flag is set in VID header of this LEB)</div><div class='add'>+ * @sqnum: sequence number</div><div class='add'>+ * @u: unions RB-tree or @list links</div><div class='add'>+ * @u.rb: link in the per-volume RB-tree of &amp;struct ubi_ainf_peb objects</div><div class='add'>+ * @u.list: link in one of the eraseblock lists</div><div class='add'>+ *</div><div class='add'>+ * One object of this type is allocated for each physical eraseblock when</div><div class='add'>+ * attaching an MTD device. Note, if this PEB does not belong to any LEB /</div><div class='add'>+ * volume, the @vol_id and @lnum fields are initialized to %UBI_UNKNOWN.</div><div class='add'>+ */</div><div class='add'>+struct ubi_ainf_peb {</div><div class='add'>+	int ec;</div><div class='add'>+	int pnum;</div><div class='add'>+	int vol_id;</div><div class='add'>+	int lnum;</div><div class='add'>+	unsigned int scrub:1;</div><div class='add'>+	unsigned int copy_flag:1;</div><div class='add'>+	unsigned long long sqnum;</div><div class='add'>+	union {</div><div class='add'>+		struct rb_node rb;</div><div class='add'>+		struct list_head list;</div><div class='add'>+	} u;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ubi_ainf_volume - attaching information about a volume.</div><div class='add'>+ * @vol_id: volume ID</div><div class='add'>+ * @highest_lnum: highest logical eraseblock number in this volume</div><div class='add'>+ * @leb_count: number of logical eraseblocks in this volume</div><div class='add'>+ * @vol_type: volume type</div><div class='add'>+ * @used_ebs: number of used logical eraseblocks in this volume (only for</div><div class='add'>+ *            static volumes)</div><div class='add'>+ * @last_data_size: amount of data in the last logical eraseblock of this</div><div class='add'>+ *                  volume (always equivalent to the usable logical eraseblock</div><div class='add'>+ *                  size in case of dynamic volumes)</div><div class='add'>+ * @data_pad: how many bytes at the end of logical eraseblocks of this volume</div><div class='add'>+ *            are not used (due to volume alignment)</div><div class='add'>+ * @compat: compatibility flags of this volume</div><div class='add'>+ * @rb: link in the volume RB-tree</div><div class='add'>+ * @root: root of the RB-tree containing all the eraseblock belonging to this</div><div class='add'>+ *        volume (&amp;struct ubi_ainf_peb objects)</div><div class='add'>+ *</div><div class='add'>+ * One object of this type is allocated for each volume when attaching an MTD</div><div class='add'>+ * device.</div><div class='add'>+ */</div><div class='add'>+struct ubi_ainf_volume {</div><div class='add'>+	int vol_id;</div><div class='add'>+	int highest_lnum;</div><div class='add'>+	int leb_count;</div><div class='add'>+	int vol_type;</div><div class='add'>+	int used_ebs;</div><div class='add'>+	int last_data_size;</div><div class='add'>+	int data_pad;</div><div class='add'>+	int compat;</div><div class='add'>+	struct rb_node rb;</div><div class='add'>+	struct rb_root root;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ubi_attach_info - MTD device attaching information.</div><div class='add'>+ * @volumes: root of the volume RB-tree</div><div class='add'>+ * @corr: list of corrupted physical eraseblocks</div><div class='add'>+ * @free: list of free physical eraseblocks</div><div class='add'>+ * @erase: list of physical eraseblocks which have to be erased</div><div class='add'>+ * @alien: list of physical eraseblocks which should not be used by UBI (e.g.,</div><div class='add'>+ *         those belonging to "preserve"-compatible internal volumes)</div><div class='add'>+ * @corr_peb_count: count of PEBs in the @corr list</div><div class='add'>+ * @empty_peb_count: count of PEBs which are presumably empty (contain only</div><div class='add'>+ *                   0xFF bytes)</div><div class='add'>+ * @alien_peb_count: count of PEBs in the @alien list</div><div class='add'>+ * @bad_peb_count: count of bad physical eraseblocks</div><div class='add'>+ * @maybe_bad_peb_count: count of bad physical eraseblocks which are not marked</div><div class='add'>+ *                       as bad yet, but which look like bad</div><div class='add'>+ * @vols_found: number of volumes found</div><div class='add'>+ * @highest_vol_id: highest volume ID</div><div class='add'>+ * @is_empty: flag indicating whether the MTD device is empty or not</div><div class='add'>+ * @min_ec: lowest erase counter value</div><div class='add'>+ * @max_ec: highest erase counter value</div><div class='add'>+ * @max_sqnum: highest sequence number value</div><div class='add'>+ * @mean_ec: mean erase counter value</div><div class='add'>+ * @ec_sum: a temporary variable used when calculating @mean_ec</div><div class='add'>+ * @ec_count: a temporary variable used when calculating @mean_ec</div><div class='add'>+ * @aeb_slab_cache: slab cache for &amp;struct ubi_ainf_peb objects</div><div class='add'>+ *</div><div class='add'>+ * This data structure contains the result of attaching an MTD device and may</div><div class='add'>+ * be used by other UBI sub-systems to build final UBI data structures, further</div><div class='add'>+ * error-recovery and so on.</div><div class='add'>+ */</div><div class='add'>+struct ubi_attach_info {</div><div class='add'>+	struct rb_root volumes;</div><div class='add'>+	struct list_head corr;</div><div class='add'>+	struct list_head free;</div><div class='add'>+	struct list_head erase;</div><div class='add'>+	struct list_head alien;</div><div class='add'>+	int corr_peb_count;</div><div class='add'>+	int empty_peb_count;</div><div class='add'>+	int alien_peb_count;</div><div class='add'>+	int bad_peb_count;</div><div class='add'>+	int maybe_bad_peb_count;</div><div class='add'>+	int vols_found;</div><div class='add'>+	int highest_vol_id;</div><div class='add'>+	int is_empty;</div><div class='add'>+	int min_ec;</div><div class='add'>+	int max_ec;</div><div class='add'>+	unsigned long long max_sqnum;</div><div class='add'>+	int mean_ec;</div><div class='add'>+	uint64_t ec_sum;</div><div class='add'>+	int ec_count;</div><div class='add'>+	struct kmem_cache *aeb_slab_cache;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> </div><div class='ctx'> extern struct kmem_cache *ubi_wl_entry_slab;</div><div class='hunk'>@@ -487,12 +607,23 @@ extern struct class *ubi_class;</div><div class='ctx'> extern struct mutex ubi_devices_mutex;</div><div class='ctx'> extern struct blocking_notifier_head ubi_notifiers;</div><div class='ctx'> </div><div class='add'>+/* scan.c */</div><div class='add'>+int ubi_add_to_av(struct ubi_device *ubi, struct ubi_attach_info *ai, int pnum,</div><div class='add'>+		  int ec, const struct ubi_vid_hdr *vid_hdr, int bitflips);</div><div class='add'>+struct ubi_ainf_volume *ubi_find_av(const struct ubi_attach_info *ai,</div><div class='add'>+				    int vol_id);</div><div class='add'>+void ubi_remove_av(struct ubi_attach_info *ai, struct ubi_ainf_volume *av);</div><div class='add'>+struct ubi_ainf_peb *ubi_early_get_peb(struct ubi_device *ubi,</div><div class='add'>+				       struct ubi_attach_info *ai);</div><div class='add'>+int ubi_attach(struct ubi_device *ubi);</div><div class='add'>+void ubi_destroy_ai(struct ubi_attach_info *ai);</div><div class='add'>+</div><div class='ctx'> /* vtbl.c */</div><div class='ctx'> int ubi_change_vtbl_record(struct ubi_device *ubi, int idx,</div><div class='ctx'> 			   struct ubi_vtbl_record *vtbl_rec);</div><div class='ctx'> int ubi_vtbl_rename_volumes(struct ubi_device *ubi,</div><div class='ctx'> 			    struct list_head *rename_list);</div><div class='del'>-int ubi_read_volume_table(struct ubi_device *ubi, struct ubi_scan_info *si);</div><div class='add'>+int ubi_read_volume_table(struct ubi_device *ubi, struct ubi_attach_info *ai);</div><div class='ctx'> </div><div class='ctx'> /* vmt.c */</div><div class='ctx'> int ubi_create_volume(struct ubi_device *ubi, struct ubi_mkvol_req *req);</div><div class='hunk'>@@ -525,22 +656,22 @@ int ubi_eba_unmap_leb(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='ctx'> int ubi_eba_read_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,</div><div class='ctx'> 		     void *buf, int offset, int len, int check);</div><div class='ctx'> int ubi_eba_write_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,</div><div class='del'>-		      const void *buf, int offset, int len, int dtype);</div><div class='add'>+		      const void *buf, int offset, int len);</div><div class='ctx'> int ubi_eba_write_leb_st(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='del'>-			 int lnum, const void *buf, int len, int dtype,</div><div class='del'>-			 int used_ebs);</div><div class='add'>+			 int lnum, const void *buf, int len, int used_ebs);</div><div class='ctx'> int ubi_eba_atomic_leb_change(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='del'>-			      int lnum, const void *buf, int len, int dtype);</div><div class='add'>+			      int lnum, const void *buf, int len);</div><div class='ctx'> int ubi_eba_copy_leb(struct ubi_device *ubi, int from, int to,</div><div class='ctx'> 		     struct ubi_vid_hdr *vid_hdr);</div><div class='del'>-int ubi_eba_init_scan(struct ubi_device *ubi, struct ubi_scan_info *si);</div><div class='add'>+int ubi_eba_init(struct ubi_device *ubi, struct ubi_attach_info *ai);</div><div class='ctx'> </div><div class='ctx'> /* wl.c */</div><div class='del'>-int ubi_wl_get_peb(struct ubi_device *ubi, int dtype);</div><div class='del'>-int ubi_wl_put_peb(struct ubi_device *ubi, int pnum, int torture);</div><div class='del'>-int ubi_wl_flush(struct ubi_device *ubi);</div><div class='add'>+int ubi_wl_get_peb(struct ubi_device *ubi);</div><div class='add'>+int ubi_wl_put_peb(struct ubi_device *ubi, int vol_id, int lnum,</div><div class='add'>+		   int pnum, int torture);</div><div class='add'>+int ubi_wl_flush(struct ubi_device *ubi, int vol_id, int lnum);</div><div class='ctx'> int ubi_wl_scrub_peb(struct ubi_device *ubi, int pnum);</div><div class='del'>-int ubi_wl_init_scan(struct ubi_device *ubi, struct ubi_scan_info *si);</div><div class='add'>+int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai);</div><div class='ctx'> void ubi_wl_close(struct ubi_device *ubi);</div><div class='ctx'> int ubi_thread(void *u);</div><div class='ctx'> </div><div class='hunk'>@@ -573,6 +704,7 @@ int ubi_volume_notify(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='ctx'> int ubi_notify_all(struct ubi_device *ubi, int ntype,</div><div class='ctx'> 		   struct notifier_block *nb);</div><div class='ctx'> int ubi_enumerate_volumes(struct notifier_block *nb);</div><div class='add'>+void ubi_free_internal_volumes(struct ubi_device *ubi);</div><div class='ctx'> </div><div class='ctx'> /* kapi.c */</div><div class='ctx'> void ubi_do_get_device_info(struct ubi_device *ubi, struct ubi_device_info *di);</div><div class='hunk'>@@ -593,6 +725,21 @@ void ubi_do_get_volume_info(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='ctx'> 	     rb = rb_next(rb),                                               \</div><div class='ctx'> 	     pos = (rb ? container_of(rb, typeof(*pos), member) : NULL))</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * ubi_move_aeb_to_list - move a PEB from the volume tree to a list.</div><div class='add'>+ *</div><div class='add'>+ * @av: volume attaching information</div><div class='add'>+ * @aeb: attaching eraseblock information</div><div class='add'>+ * @list: the list to move to</div><div class='add'>+ */</div><div class='add'>+static inline void ubi_move_aeb_to_list(struct ubi_ainf_volume *av,</div><div class='add'>+					 struct ubi_ainf_peb *aeb,</div><div class='add'>+					 struct list_head *list)</div><div class='add'>+{</div><div class='add'>+		rb_erase(&amp;aeb-&gt;u.rb, &amp;av-&gt;root);</div><div class='add'>+		list_add_tail(&amp;aeb-&gt;u.list, list);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ubi_zalloc_vid_hdr - allocate a volume identifier header object.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='hunk'>@@ -667,7 +814,7 @@ static inline void ubi_ro_mode(struct ubi_device *ubi)</div><div class='ctx'> 	if (!ubi-&gt;ro_mode) {</div><div class='ctx'> 		ubi-&gt;ro_mode = 1;</div><div class='ctx'> 		ubi_warn("switch to read-only mode");</div><div class='del'>-		ubi_dbg_dump_stack();</div><div class='add'>+		dump_stack();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/mtd/ubi/upd.c b/drivers/mtd/ubi/upd.c<br/>index 425bf5a3edd4..9f2ebd8750e7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/upd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/upd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/upd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/upd.c</a></div><div class='hunk'>@@ -147,7 +147,7 @@ int ubi_start_update(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (bytes == 0) {</div><div class='del'>-		err = ubi_wl_flush(ubi);</div><div class='add'>+		err = ubi_wl_flush(ubi, UBI_ALL, UBI_ALL);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> </div><div class='hunk'>@@ -186,14 +186,12 @@ int ubi_start_leb_change(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='ctx'> 	dbg_gen("start changing LEB %d:%d, %u bytes",</div><div class='ctx'> 		vol-&gt;vol_id, req-&gt;lnum, req-&gt;bytes);</div><div class='ctx'> 	if (req-&gt;bytes == 0)</div><div class='del'>-		return ubi_eba_atomic_leb_change(ubi, vol, req-&gt;lnum, NULL, 0,</div><div class='del'>-						 req-&gt;dtype);</div><div class='add'>+		return ubi_eba_atomic_leb_change(ubi, vol, req-&gt;lnum, NULL, 0);</div><div class='ctx'> </div><div class='ctx'> 	vol-&gt;upd_bytes = req-&gt;bytes;</div><div class='ctx'> 	vol-&gt;upd_received = 0;</div><div class='ctx'> 	vol-&gt;changing_leb = 1;</div><div class='ctx'> 	vol-&gt;ch_lnum = req-&gt;lnum;</div><div class='del'>-	vol-&gt;ch_dtype = req-&gt;dtype;</div><div class='ctx'> </div><div class='ctx'> 	vol-&gt;upd_buf = vmalloc(req-&gt;bytes);</div><div class='ctx'> 	if (!vol-&gt;upd_buf)</div><div class='hunk'>@@ -246,8 +244,7 @@ static int write_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		err = ubi_eba_write_leb(ubi, vol, lnum, buf, 0, len,</div><div class='del'>-					UBI_UNKNOWN);</div><div class='add'>+		err = ubi_eba_write_leb(ubi, vol, lnum, buf, 0, len);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * When writing static volume, and this is the last logical</div><div class='hunk'>@@ -259,8 +256,7 @@ static int write_leb(struct ubi_device *ubi, struct ubi_volume *vol, int lnum,</div><div class='ctx'> 		 * contain zeros, not random trash.</div><div class='ctx'> 		 */</div><div class='ctx'> 		memset(buf + len, 0, vol-&gt;usable_leb_size - len);</div><div class='del'>-		err = ubi_eba_write_leb_st(ubi, vol, lnum, buf, len,</div><div class='del'>-					   UBI_UNKNOWN, used_ebs);</div><div class='add'>+		err = ubi_eba_write_leb_st(ubi, vol, lnum, buf, len, used_ebs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -365,7 +361,7 @@ int ubi_more_update_data(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='ctx'> </div><div class='ctx'> 	ubi_assert(vol-&gt;upd_received &lt;= vol-&gt;upd_bytes);</div><div class='ctx'> 	if (vol-&gt;upd_received == vol-&gt;upd_bytes) {</div><div class='del'>-		err = ubi_wl_flush(ubi);</div><div class='add'>+		err = ubi_wl_flush(ubi, UBI_ALL, UBI_ALL);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 		/* The update is finished, clear the update marker */</div><div class='hunk'>@@ -421,7 +417,7 @@ int ubi_more_leb_change_data(struct ubi_device *ubi, struct ubi_volume *vol,</div><div class='ctx'> 		       len - vol-&gt;upd_bytes);</div><div class='ctx'> 		len = ubi_calc_data_len(ubi, vol-&gt;upd_buf, len);</div><div class='ctx'> 		err = ubi_eba_atomic_leb_change(ubi, vol, vol-&gt;ch_lnum,</div><div class='del'>-						vol-&gt;upd_buf, len, UBI_UNKNOWN);</div><div class='add'>+						vol-&gt;upd_buf, len);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/mtd/ubi/vmt.c b/drivers/mtd/ubi/vmt.c<br/>index 863835f4aefe..0669cff8ac3c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/vmt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/vmt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/vmt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/vmt.c</a></div><div class='hunk'>@@ -29,11 +29,7 @@</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include "ubi.h"</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MTD_UBI_DEBUG</div><div class='del'>-static int paranoid_check_volumes(struct ubi_device *ubi);</div><div class='del'>-#else</div><div class='del'>-#define paranoid_check_volumes(ubi) 0</div><div class='del'>-#endif</div><div class='add'>+static int self_check_volumes(struct ubi_device *ubi);</div><div class='ctx'> </div><div class='ctx'> static ssize_t vol_attribute_show(struct device *dev,</div><div class='ctx'> 				  struct device_attribute *attr, char *buf);</div><div class='hunk'>@@ -227,7 +223,7 @@ int ubi_create_volume(struct ubi_device *ubi, struct ubi_mkvol_req *req)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 		if (vol_id == UBI_VOL_NUM_AUTO) {</div><div class='del'>-			dbg_err("out of volume IDs");</div><div class='add'>+			ubi_err("out of volume IDs");</div><div class='ctx'> 			err = -ENFILE;</div><div class='ctx'> 			goto out_unlock;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -241,7 +237,7 @@ int ubi_create_volume(struct ubi_device *ubi, struct ubi_mkvol_req *req)</div><div class='ctx'> 	/* Ensure that this volume does not exist */</div><div class='ctx'> 	err = -EEXIST;</div><div class='ctx'> 	if (ubi-&gt;volumes[vol_id]) {</div><div class='del'>-		dbg_err("volume %d already exists", vol_id);</div><div class='add'>+		ubi_err("volume %d already exists", vol_id);</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -250,7 +246,7 @@ int ubi_create_volume(struct ubi_device *ubi, struct ubi_mkvol_req *req)</div><div class='ctx'> 		if (ubi-&gt;volumes[i] &amp;&amp;</div><div class='ctx'> 		    ubi-&gt;volumes[i]-&gt;name_len == req-&gt;name_len &amp;&amp;</div><div class='ctx'> 		    !strcmp(ubi-&gt;volumes[i]-&gt;name, req-&gt;name)) {</div><div class='del'>-			dbg_err("volume \"%s\" exists (ID %d)", req-&gt;name, i);</div><div class='add'>+			ubi_err("volume \"%s\" exists (ID %d)", req-&gt;name, i);</div><div class='ctx'> 			goto out_unlock;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -261,9 +257,9 @@ int ubi_create_volume(struct ubi_device *ubi, struct ubi_mkvol_req *req)</div><div class='ctx'> </div><div class='ctx'> 	/* Reserve physical eraseblocks */</div><div class='ctx'> 	if (vol-&gt;reserved_pebs &gt; ubi-&gt;avail_pebs) {</div><div class='del'>-		dbg_err("not enough PEBs, only %d available", ubi-&gt;avail_pebs);</div><div class='add'>+		ubi_err("not enough PEBs, only %d available", ubi-&gt;avail_pebs);</div><div class='ctx'> 		if (ubi-&gt;corr_peb_count)</div><div class='del'>-			dbg_err("%d PEBs are corrupted and not used",</div><div class='add'>+			ubi_err("%d PEBs are corrupted and not used",</div><div class='ctx'> 				ubi-&gt;corr_peb_count);</div><div class='ctx'> 		err = -ENOSPC;</div><div class='ctx'> 		goto out_unlock;</div><div class='hunk'>@@ -284,7 +280,7 @@ int ubi_create_volume(struct ubi_device *ubi, struct ubi_mkvol_req *req)</div><div class='ctx'> 	 * Finish all pending erases because there may be some LEBs belonging</div><div class='ctx'> 	 * to the same volume ID.</div><div class='ctx'> 	 */</div><div class='del'>-	err = ubi_wl_flush(ubi);</div><div class='add'>+	err = ubi_wl_flush(ubi, vol_id, UBI_ALL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_acc;</div><div class='ctx'> </div><div class='hunk'>@@ -360,8 +356,7 @@ int ubi_create_volume(struct ubi_device *ubi, struct ubi_mkvol_req *req)</div><div class='ctx'> 	spin_unlock(&amp;ubi-&gt;volumes_lock);</div><div class='ctx'> </div><div class='ctx'> 	ubi_volume_notify(ubi, vol, UBI_VOLUME_ADDED);</div><div class='del'>-	if (paranoid_check_volumes(ubi))</div><div class='del'>-		dbg_err("check failed while creating volume %d", vol_id);</div><div class='add'>+	self_check_volumes(ubi);</div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='ctx'> out_sysfs:</div><div class='hunk'>@@ -461,8 +456,8 @@ int ubi_remove_volume(struct ubi_volume_desc *desc, int no_vtbl)</div><div class='ctx'> 	spin_unlock(&amp;ubi-&gt;volumes_lock);</div><div class='ctx'> </div><div class='ctx'> 	ubi_volume_notify(ubi, vol, UBI_VOLUME_REMOVED);</div><div class='del'>-	if (!no_vtbl &amp;&amp; paranoid_check_volumes(ubi))</div><div class='del'>-		dbg_err("check failed while removing volume %d", vol_id);</div><div class='add'>+	if (!no_vtbl)</div><div class='add'>+		self_check_volumes(ubi);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='hunk'>@@ -500,7 +495,7 @@ int ubi_resize_volume(struct ubi_volume_desc *desc, int reserved_pebs)</div><div class='ctx'> </div><div class='ctx'> 	if (vol-&gt;vol_type == UBI_STATIC_VOLUME &amp;&amp;</div><div class='ctx'> 	    reserved_pebs &lt; vol-&gt;used_ebs) {</div><div class='del'>-		dbg_err("too small size %d, %d LEBs contain data",</div><div class='add'>+		ubi_err("too small size %d, %d LEBs contain data",</div><div class='ctx'> 			reserved_pebs, vol-&gt;used_ebs);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -529,10 +524,10 @@ int ubi_resize_volume(struct ubi_volume_desc *desc, int reserved_pebs)</div><div class='ctx'> 	if (pebs &gt; 0) {</div><div class='ctx'> 		spin_lock(&amp;ubi-&gt;volumes_lock);</div><div class='ctx'> 		if (pebs &gt; ubi-&gt;avail_pebs) {</div><div class='del'>-			dbg_err("not enough PEBs: requested %d, available %d",</div><div class='add'>+			ubi_err("not enough PEBs: requested %d, available %d",</div><div class='ctx'> 				pebs, ubi-&gt;avail_pebs);</div><div class='ctx'> 			if (ubi-&gt;corr_peb_count)</div><div class='del'>-				dbg_err("%d PEBs are corrupted and not used",</div><div class='add'>+				ubi_err("%d PEBs are corrupted and not used",</div><div class='ctx'> 					ubi-&gt;corr_peb_count);</div><div class='ctx'> 			spin_unlock(&amp;ubi-&gt;volumes_lock);</div><div class='ctx'> 			err = -ENOSPC;</div><div class='hunk'>@@ -588,8 +583,7 @@ int ubi_resize_volume(struct ubi_volume_desc *desc, int reserved_pebs)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ubi_volume_notify(ubi, vol, UBI_VOLUME_RESIZED);</div><div class='del'>-	if (paranoid_check_volumes(ubi))</div><div class='del'>-		dbg_err("check failed while re-sizing volume %d", vol_id);</div><div class='add'>+	self_check_volumes(ubi);</div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='ctx'> out_acc:</div><div class='hunk'>@@ -638,8 +632,8 @@ int ubi_rename_volumes(struct ubi_device *ubi, struct list_head *rename_list)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!err &amp;&amp; paranoid_check_volumes(ubi))</div><div class='del'>-		;</div><div class='add'>+	if (!err)</div><div class='add'>+		self_check_volumes(ubi);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -686,8 +680,7 @@ int ubi_add_volume(struct ubi_device *ubi, struct ubi_volume *vol)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (paranoid_check_volumes(ubi))</div><div class='del'>-		dbg_err("check failed while adding volume %d", vol_id);</div><div class='add'>+	self_check_volumes(ubi);</div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='ctx'> out_cdev:</div><div class='hunk'>@@ -712,16 +705,14 @@ void ubi_free_volume(struct ubi_device *ubi, struct ubi_volume *vol)</div><div class='ctx'> 	volume_sysfs_close(vol);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MTD_UBI_DEBUG</div><div class='del'>-</div><div class='ctx'> /**</div><div class='del'>- * paranoid_check_volume - check volume information.</div><div class='add'>+ * self_check_volume - check volume information.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @vol_id: volume ID</div><div class='ctx'>  *</div><div class='ctx'>  * Returns zero if volume is all right and a a negative error code if not.</div><div class='ctx'>  */</div><div class='del'>-static int paranoid_check_volume(struct ubi_device *ubi, int vol_id)</div><div class='add'>+static int self_check_volume(struct ubi_device *ubi, int vol_id)</div><div class='ctx'> {</div><div class='ctx'> 	int idx = vol_id2idx(ubi, vol_id);</div><div class='ctx'> 	int reserved_pebs, alignment, data_pad, vol_type, name_len, upd_marker;</div><div class='hunk'>@@ -771,7 +762,7 @@ static int paranoid_check_volume(struct ubi_device *ubi, int vol_id)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vol-&gt;upd_marker &amp;&amp; vol-&gt;corrupted) {</div><div class='del'>-		dbg_err("update marker and corrupted simultaneously");</div><div class='add'>+		ubi_err("update marker and corrupted simultaneously");</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -853,22 +844,22 @@ static int paranoid_check_volume(struct ubi_device *ubi, int vol_id)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='del'>-	ubi_err("paranoid check failed for volume %d", vol_id);</div><div class='add'>+	ubi_err("self-check failed for volume %d", vol_id);</div><div class='ctx'> 	if (vol)</div><div class='del'>-		ubi_dbg_dump_vol_info(vol);</div><div class='del'>-	ubi_dbg_dump_vtbl_record(&amp;ubi-&gt;vtbl[vol_id], vol_id);</div><div class='add'>+		ubi_dump_vol_info(vol);</div><div class='add'>+	ubi_dump_vtbl_record(&amp;ubi-&gt;vtbl[vol_id], vol_id);</div><div class='ctx'> 	dump_stack();</div><div class='ctx'> 	spin_unlock(&amp;ubi-&gt;volumes_lock);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * paranoid_check_volumes - check information about all volumes.</div><div class='add'>+ * self_check_volumes - check information about all volumes.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  *</div><div class='ctx'>  * Returns zero if volumes are all right and a a negative error code if not.</div><div class='ctx'>  */</div><div class='del'>-static int paranoid_check_volumes(struct ubi_device *ubi)</div><div class='add'>+static int self_check_volumes(struct ubi_device *ubi)</div><div class='ctx'> {</div><div class='ctx'> 	int i, err = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -876,11 +867,10 @@ static int paranoid_check_volumes(struct ubi_device *ubi)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ubi-&gt;vtbl_slots; i++) {</div><div class='del'>-		err = paranoid_check_volume(ubi, i);</div><div class='add'>+		err = self_check_volume(ubi, i);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/mtd/ubi/vtbl.c b/drivers/mtd/ubi/vtbl.c<br/>index 17cec0c01544..437bc193e170 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/vtbl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/vtbl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/vtbl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/vtbl.c</a></div><div class='hunk'>@@ -37,16 +37,15 @@</div><div class='ctx'>  * LEB 1. This scheme guarantees recoverability from unclean reboots.</div><div class='ctx'>  *</div><div class='ctx'>  * In this UBI implementation the on-flash volume table does not contain any</div><div class='del'>- * information about how many data static volumes contain. This information may</div><div class='del'>- * be found from the scanning data.</div><div class='add'>+ * information about how much data static volumes contain.</div><div class='ctx'>  *</div><div class='ctx'>  * But it would still be beneficial to store this information in the volume</div><div class='ctx'>  * table. For example, suppose we have a static volume X, and all its physical</div><div class='ctx'>  * eraseblocks became bad for some reasons. Suppose we are attaching the</div><div class='del'>- * corresponding MTD device, the scanning has found no logical eraseblocks</div><div class='add'>+ * corresponding MTD device, for some reason we find no logical eraseblocks</div><div class='ctx'>  * corresponding to the volume X. According to the volume table volume X does</div><div class='ctx'>  * exist. So we don't know whether it is just empty or all its physical</div><div class='del'>- * eraseblocks went bad. So we cannot alarm the user about this corruption.</div><div class='add'>+ * eraseblocks went bad. So we cannot alarm the user properly.</div><div class='ctx'>  *</div><div class='ctx'>  * The volume table also stores so-called "update marker", which is used for</div><div class='ctx'>  * volume updates. Before updating the volume, the update marker is set, and</div><div class='hunk'>@@ -62,11 +61,7 @@</div><div class='ctx'> #include &lt;asm/div64.h&gt;</div><div class='ctx'> #include "ubi.h"</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MTD_UBI_DEBUG</div><div class='del'>-static void paranoid_vtbl_check(const struct ubi_device *ubi);</div><div class='del'>-#else</div><div class='del'>-#define paranoid_vtbl_check(ubi)</div><div class='del'>-#endif</div><div class='add'>+static void self_vtbl_check(const struct ubi_device *ubi);</div><div class='ctx'> </div><div class='ctx'> /* Empty volume table record */</div><div class='ctx'> static struct ubi_vtbl_record empty_vtbl_record;</div><div class='hunk'>@@ -106,12 +101,12 @@ int ubi_change_vtbl_record(struct ubi_device *ubi, int idx,</div><div class='ctx'> 			return err;</div><div class='ctx'> </div><div class='ctx'> 		err = ubi_eba_write_leb(ubi, layout_vol, i, ubi-&gt;vtbl, 0,</div><div class='del'>-					ubi-&gt;vtbl_size, UBI_LONGTERM);</div><div class='add'>+					ubi-&gt;vtbl_size);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	paranoid_vtbl_check(ubi);</div><div class='add'>+	self_vtbl_check(ubi);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -158,7 +153,7 @@ int ubi_vtbl_rename_volumes(struct ubi_device *ubi,</div><div class='ctx'> 			return err;</div><div class='ctx'> </div><div class='ctx'> 		err = ubi_eba_write_leb(ubi, layout_vol, i, ubi-&gt;vtbl, 0,</div><div class='del'>-					ubi-&gt;vtbl_size, UBI_LONGTERM);</div><div class='add'>+					ubi-&gt;vtbl_size);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -197,7 +192,7 @@ static int vtbl_check(const struct ubi_device *ubi,</div><div class='ctx'> 		if (be32_to_cpu(vtbl[i].crc) != crc) {</div><div class='ctx'> 			ubi_err("bad CRC at record %u: %#08x, not %#08x",</div><div class='ctx'> 				 i, crc, be32_to_cpu(vtbl[i].crc));</div><div class='del'>-			ubi_dbg_dump_vtbl_record(&amp;vtbl[i], i);</div><div class='add'>+			ubi_dump_vtbl_record(&amp;vtbl[i], i);</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -229,7 +224,7 @@ static int vtbl_check(const struct ubi_device *ubi,</div><div class='ctx'> </div><div class='ctx'> 		n = ubi-&gt;leb_size % alignment;</div><div class='ctx'> 		if (data_pad != n) {</div><div class='del'>-			dbg_err("bad data_pad, has to be %d", n);</div><div class='add'>+			ubi_err("bad data_pad, has to be %d", n);</div><div class='ctx'> 			err = 6;</div><div class='ctx'> 			goto bad;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -245,7 +240,7 @@ static int vtbl_check(const struct ubi_device *ubi,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (reserved_pebs &gt; ubi-&gt;good_peb_count) {</div><div class='del'>-			dbg_err("too large reserved_pebs %d, good PEBs %d",</div><div class='add'>+			ubi_err("too large reserved_pebs %d, good PEBs %d",</div><div class='ctx'> 				reserved_pebs, ubi-&gt;good_peb_count);</div><div class='ctx'> 			err = 9;</div><div class='ctx'> 			goto bad;</div><div class='hunk'>@@ -277,8 +272,8 @@ static int vtbl_check(const struct ubi_device *ubi,</div><div class='ctx'> 			    !strncmp(vtbl[i].name, vtbl[n].name, len1)) {</div><div class='ctx'> 				ubi_err("volumes %d and %d have the same name"</div><div class='ctx'> 					" \"%s\"", i, n, vtbl[i].name);</div><div class='del'>-				ubi_dbg_dump_vtbl_record(&amp;vtbl[i], i);</div><div class='del'>-				ubi_dbg_dump_vtbl_record(&amp;vtbl[n], n);</div><div class='add'>+				ubi_dump_vtbl_record(&amp;vtbl[i], i);</div><div class='add'>+				ubi_dump_vtbl_record(&amp;vtbl[n], n);</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -288,26 +283,26 @@ static int vtbl_check(const struct ubi_device *ubi,</div><div class='ctx'> </div><div class='ctx'> bad:</div><div class='ctx'> 	ubi_err("volume table check failed: record %d, error %d", i, err);</div><div class='del'>-	ubi_dbg_dump_vtbl_record(&amp;vtbl[i], i);</div><div class='add'>+	ubi_dump_vtbl_record(&amp;vtbl[i], i);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * create_vtbl - create a copy of volume table.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  * @copy: number of the volume table copy</div><div class='ctx'>  * @vtbl: contents of the volume table</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns zero in case of success and a negative error code in</div><div class='ctx'>  * case of failure.</div><div class='ctx'>  */</div><div class='del'>-static int create_vtbl(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='add'>+static int create_vtbl(struct ubi_device *ubi, struct ubi_attach_info *ai,</div><div class='ctx'> 		       int copy, void *vtbl)</div><div class='ctx'> {</div><div class='ctx'> 	int err, tries = 0;</div><div class='ctx'> 	struct ubi_vid_hdr *vid_hdr;</div><div class='del'>-	struct ubi_scan_leb *new_seb;</div><div class='add'>+	struct ubi_ainf_peb *new_aeb;</div><div class='ctx'> </div><div class='ctx'> 	ubi_msg("create volume table (copy #%d)", copy + 1);</div><div class='ctx'> </div><div class='hunk'>@@ -316,9 +311,9 @@ static int create_vtbl(struct ubi_device *ubi, struct ubi_scan_info *si,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> retry:</div><div class='del'>-	new_seb = ubi_scan_get_free_peb(ubi, si);</div><div class='del'>-	if (IS_ERR(new_seb)) {</div><div class='del'>-		err = PTR_ERR(new_seb);</div><div class='add'>+	new_aeb = ubi_early_get_peb(ubi, ai);</div><div class='add'>+	if (IS_ERR(new_aeb)) {</div><div class='add'>+		err = PTR_ERR(new_aeb);</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -328,25 +323,24 @@ retry:</div><div class='ctx'> 	vid_hdr-&gt;data_size = vid_hdr-&gt;used_ebs =</div><div class='ctx'> 			     vid_hdr-&gt;data_pad = cpu_to_be32(0);</div><div class='ctx'> 	vid_hdr-&gt;lnum = cpu_to_be32(copy);</div><div class='del'>-	vid_hdr-&gt;sqnum = cpu_to_be64(++si-&gt;max_sqnum);</div><div class='add'>+	vid_hdr-&gt;sqnum = cpu_to_be64(++ai-&gt;max_sqnum);</div><div class='ctx'> </div><div class='ctx'> 	/* The EC header is already there, write the VID header */</div><div class='del'>-	err = ubi_io_write_vid_hdr(ubi, new_seb-&gt;pnum, vid_hdr);</div><div class='add'>+	err = ubi_io_write_vid_hdr(ubi, new_aeb-&gt;pnum, vid_hdr);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto write_error;</div><div class='ctx'> </div><div class='ctx'> 	/* Write the layout volume contents */</div><div class='del'>-	err = ubi_io_write_data(ubi, vtbl, new_seb-&gt;pnum, 0, ubi-&gt;vtbl_size);</div><div class='add'>+	err = ubi_io_write_data(ubi, vtbl, new_aeb-&gt;pnum, 0, ubi-&gt;vtbl_size);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto write_error;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * And add it to the scanning information. Don't delete the old version</div><div class='del'>-	 * of this LEB as it will be deleted and freed in 'ubi_scan_add_used()'.</div><div class='add'>+	 * And add it to the attaching information. Don't delete the old version</div><div class='add'>+	 * of this LEB as it will be deleted and freed in 'ubi_add_to_av()'.</div><div class='ctx'> 	 */</div><div class='del'>-	err = ubi_scan_add_used(ubi, si, new_seb-&gt;pnum, new_seb-&gt;ec,</div><div class='del'>-				vid_hdr, 0);</div><div class='del'>-	kfree(new_seb);</div><div class='add'>+	err = ubi_add_to_av(ubi, ai, new_aeb-&gt;pnum, new_aeb-&gt;ec, vid_hdr, 0);</div><div class='add'>+	kfree(new_aeb);</div><div class='ctx'> 	ubi_free_vid_hdr(ubi, vid_hdr);</div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='hunk'>@@ -356,10 +350,10 @@ write_error:</div><div class='ctx'> 		 * Probably this physical eraseblock went bad, try to pick</div><div class='ctx'> 		 * another one.</div><div class='ctx'> 		 */</div><div class='del'>-		list_add(&amp;new_seb-&gt;u.list, &amp;si-&gt;erase);</div><div class='add'>+		list_add(&amp;new_aeb-&gt;u.list, &amp;ai-&gt;erase);</div><div class='ctx'> 		goto retry;</div><div class='ctx'> 	}</div><div class='del'>-	kfree(new_seb);</div><div class='add'>+	kfree(new_aeb);</div><div class='ctx'> out_free:</div><div class='ctx'> 	ubi_free_vid_hdr(ubi, vid_hdr);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -369,20 +363,20 @@ out_free:</div><div class='ctx'> /**</div><div class='ctx'>  * process_lvol - process the layout volume.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='del'>- * @sv: layout volume scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='add'>+ * @av: layout volume attaching information</div><div class='ctx'>  *</div><div class='ctx'>  * This function is responsible for reading the layout volume, ensuring it is</div><div class='ctx'>  * not corrupted, and recovering from corruptions if needed. Returns volume</div><div class='ctx'>  * table in case of success and a negative error code in case of failure.</div><div class='ctx'>  */</div><div class='ctx'> static struct ubi_vtbl_record *process_lvol(struct ubi_device *ubi,</div><div class='del'>-					    struct ubi_scan_info *si,</div><div class='del'>-					    struct ubi_scan_volume *sv)</div><div class='add'>+					    struct ubi_attach_info *ai,</div><div class='add'>+					    struct ubi_ainf_volume *av)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct rb_node *rb;</div><div class='del'>-	struct ubi_scan_leb *seb;</div><div class='add'>+	struct ubi_ainf_peb *aeb;</div><div class='ctx'> 	struct ubi_vtbl_record *leb[UBI_LAYOUT_VOLUME_EBS] = { NULL, NULL };</div><div class='ctx'> 	int leb_corrupted[UBI_LAYOUT_VOLUME_EBS] = {1, 1};</div><div class='ctx'> </div><div class='hunk'>@@ -414,14 +408,14 @@ static struct ubi_vtbl_record *process_lvol(struct ubi_device *ubi,</div><div class='ctx'> 	dbg_gen("check layout volume");</div><div class='ctx'> </div><div class='ctx'> 	/* Read both LEB 0 and LEB 1 into memory */</div><div class='del'>-	ubi_rb_for_each_entry(rb, seb, &amp;sv-&gt;root, u.rb) {</div><div class='del'>-		leb[seb-&gt;lnum] = vzalloc(ubi-&gt;vtbl_size);</div><div class='del'>-		if (!leb[seb-&gt;lnum]) {</div><div class='add'>+	ubi_rb_for_each_entry(rb, aeb, &amp;av-&gt;root, u.rb) {</div><div class='add'>+		leb[aeb-&gt;lnum] = vzalloc(ubi-&gt;vtbl_size);</div><div class='add'>+		if (!leb[aeb-&gt;lnum]) {</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			goto out_free;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		err = ubi_io_read_data(ubi, leb[seb-&gt;lnum], seb-&gt;pnum, 0,</div><div class='add'>+		err = ubi_io_read_data(ubi, leb[aeb-&gt;lnum], aeb-&gt;pnum, 0,</div><div class='ctx'> 				       ubi-&gt;vtbl_size);</div><div class='ctx'> 		if (err == UBI_IO_BITFLIPS || mtd_is_eccerr(err))</div><div class='ctx'> 			/*</div><div class='hunk'>@@ -429,12 +423,12 @@ static struct ubi_vtbl_record *process_lvol(struct ubi_device *ubi,</div><div class='ctx'> 			 * uncorrectable ECC error, but we have our own CRC and</div><div class='ctx'> 			 * the data will be checked later. If the data is OK,</div><div class='ctx'> 			 * the PEB will be scrubbed (because we set</div><div class='del'>-			 * seb-&gt;scrub). If the data is not OK, the contents of</div><div class='add'>+			 * aeb-&gt;scrub). If the data is not OK, the contents of</div><div class='ctx'> 			 * the PEB will be recovered from the second copy, and</div><div class='del'>-			 * seb-&gt;scrub will be cleared in</div><div class='del'>-			 * 'ubi_scan_add_used()'.</div><div class='add'>+			 * aeb-&gt;scrub will be cleared in</div><div class='add'>+			 * 'ubi_add_to_av()'.</div><div class='ctx'> 			 */</div><div class='del'>-			seb-&gt;scrub = 1;</div><div class='add'>+			aeb-&gt;scrub = 1;</div><div class='ctx'> 		else if (err)</div><div class='ctx'> 			goto out_free;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -453,7 +447,7 @@ static struct ubi_vtbl_record *process_lvol(struct ubi_device *ubi,</div><div class='ctx'> 						  ubi-&gt;vtbl_size);</div><div class='ctx'> 		if (leb_corrupted[1]) {</div><div class='ctx'> 			ubi_warn("volume table copy #2 is corrupted");</div><div class='del'>-			err = create_vtbl(ubi, si, 1, leb[0]);</div><div class='add'>+			err = create_vtbl(ubi, ai, 1, leb[0]);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				goto out_free;</div><div class='ctx'> 			ubi_msg("volume table was restored");</div><div class='hunk'>@@ -476,7 +470,7 @@ static struct ubi_vtbl_record *process_lvol(struct ubi_device *ubi,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ubi_warn("volume table copy #1 is corrupted");</div><div class='del'>-		err = create_vtbl(ubi, si, 0, leb[1]);</div><div class='add'>+		err = create_vtbl(ubi, ai, 0, leb[1]);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto out_free;</div><div class='ctx'> 		ubi_msg("volume table was restored");</div><div class='hunk'>@@ -494,13 +488,13 @@ out_free:</div><div class='ctx'> /**</div><div class='ctx'>  * create_empty_lvol - create empty layout volume.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns volume table contents in case of success and a</div><div class='ctx'>  * negative error code in case of failure.</div><div class='ctx'>  */</div><div class='ctx'> static struct ubi_vtbl_record *create_empty_lvol(struct ubi_device *ubi,</div><div class='del'>-						 struct ubi_scan_info *si)</div><div class='add'>+						 struct ubi_attach_info *ai)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct ubi_vtbl_record *vtbl;</div><div class='hunk'>@@ -515,7 +509,7 @@ static struct ubi_vtbl_record *create_empty_lvol(struct ubi_device *ubi,</div><div class='ctx'> 	for (i = 0; i &lt; UBI_LAYOUT_VOLUME_EBS; i++) {</div><div class='ctx'> 		int err;</div><div class='ctx'> </div><div class='del'>-		err = create_vtbl(ubi, si, i, vtbl);</div><div class='add'>+		err = create_vtbl(ubi, ai, i, vtbl);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			vfree(vtbl);</div><div class='ctx'> 			return ERR_PTR(err);</div><div class='hunk'>@@ -528,18 +522,19 @@ static struct ubi_vtbl_record *create_empty_lvol(struct ubi_device *ubi,</div><div class='ctx'> /**</div><div class='ctx'>  * init_volumes - initialize volume information for existing volumes.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: scanning information</div><div class='ctx'>  * @vtbl: volume table</div><div class='ctx'>  *</div><div class='ctx'>  * This function allocates volume description objects for existing volumes.</div><div class='ctx'>  * Returns zero in case of success and a negative error code in case of</div><div class='ctx'>  * failure.</div><div class='ctx'>  */</div><div class='del'>-static int init_volumes(struct ubi_device *ubi, const struct ubi_scan_info *si,</div><div class='add'>+static int init_volumes(struct ubi_device *ubi,</div><div class='add'>+			const struct ubi_attach_info *ai,</div><div class='ctx'> 			const struct ubi_vtbl_record *vtbl)</div><div class='ctx'> {</div><div class='ctx'> 	int i, reserved_pebs = 0;</div><div class='del'>-	struct ubi_scan_volume *sv;</div><div class='add'>+	struct ubi_ainf_volume *av;</div><div class='ctx'> 	struct ubi_volume *vol;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ubi-&gt;vtbl_slots; i++) {</div><div class='hunk'>@@ -595,8 +590,8 @@ static int init_volumes(struct ubi_device *ubi, const struct ubi_scan_info *si,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Static volumes only */</div><div class='del'>-		sv = ubi_scan_find_sv(si, i);</div><div class='del'>-		if (!sv) {</div><div class='add'>+		av = ubi_find_av(ai, i);</div><div class='add'>+		if (!av) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * No eraseblocks belonging to this volume found. We</div><div class='ctx'> 			 * don't actually know whether this static volume is</div><div class='hunk'>@@ -608,22 +603,22 @@ static int init_volumes(struct ubi_device *ubi, const struct ubi_scan_info *si,</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (sv-&gt;leb_count != sv-&gt;used_ebs) {</div><div class='add'>+		if (av-&gt;leb_count != av-&gt;used_ebs) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * We found a static volume which misses several</div><div class='ctx'> 			 * eraseblocks. Treat it as corrupted.</div><div class='ctx'> 			 */</div><div class='ctx'> 			ubi_warn("static volume %d misses %d LEBs - corrupted",</div><div class='del'>-				 sv-&gt;vol_id, sv-&gt;used_ebs - sv-&gt;leb_count);</div><div class='add'>+				 av-&gt;vol_id, av-&gt;used_ebs - av-&gt;leb_count);</div><div class='ctx'> 			vol-&gt;corrupted = 1;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		vol-&gt;used_ebs = sv-&gt;used_ebs;</div><div class='add'>+		vol-&gt;used_ebs = av-&gt;used_ebs;</div><div class='ctx'> 		vol-&gt;used_bytes =</div><div class='ctx'> 			(long long)(vol-&gt;used_ebs - 1) * vol-&gt;usable_leb_size;</div><div class='del'>-		vol-&gt;used_bytes += sv-&gt;last_data_size;</div><div class='del'>-		vol-&gt;last_eb_bytes = sv-&gt;last_data_size;</div><div class='add'>+		vol-&gt;used_bytes += av-&gt;last_data_size;</div><div class='add'>+		vol-&gt;last_eb_bytes = av-&gt;last_data_size;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* And add the layout volume */</div><div class='hunk'>@@ -664,105 +659,104 @@ static int init_volumes(struct ubi_device *ubi, const struct ubi_scan_info *si,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * check_sv - check volume scanning information.</div><div class='add'>+ * check_av - check volume attaching information.</div><div class='ctx'>  * @vol: UBI volume description object</div><div class='del'>- * @sv: volume scanning information</div><div class='add'>+ * @av: volume attaching information</div><div class='ctx'>  *</div><div class='del'>- * This function returns zero if the volume scanning information is consistent</div><div class='add'>+ * This function returns zero if the volume attaching information is consistent</div><div class='ctx'>  * to the data read from the volume tabla, and %-EINVAL if not.</div><div class='ctx'>  */</div><div class='del'>-static int check_sv(const struct ubi_volume *vol,</div><div class='del'>-		    const struct ubi_scan_volume *sv)</div><div class='add'>+static int check_av(const struct ubi_volume *vol,</div><div class='add'>+		    const struct ubi_ainf_volume *av)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (sv-&gt;highest_lnum &gt;= vol-&gt;reserved_pebs) {</div><div class='add'>+	if (av-&gt;highest_lnum &gt;= vol-&gt;reserved_pebs) {</div><div class='ctx'> 		err = 1;</div><div class='ctx'> 		goto bad;</div><div class='ctx'> 	}</div><div class='del'>-	if (sv-&gt;leb_count &gt; vol-&gt;reserved_pebs) {</div><div class='add'>+	if (av-&gt;leb_count &gt; vol-&gt;reserved_pebs) {</div><div class='ctx'> 		err = 2;</div><div class='ctx'> 		goto bad;</div><div class='ctx'> 	}</div><div class='del'>-	if (sv-&gt;vol_type != vol-&gt;vol_type) {</div><div class='add'>+	if (av-&gt;vol_type != vol-&gt;vol_type) {</div><div class='ctx'> 		err = 3;</div><div class='ctx'> 		goto bad;</div><div class='ctx'> 	}</div><div class='del'>-	if (sv-&gt;used_ebs &gt; vol-&gt;reserved_pebs) {</div><div class='add'>+	if (av-&gt;used_ebs &gt; vol-&gt;reserved_pebs) {</div><div class='ctx'> 		err = 4;</div><div class='ctx'> 		goto bad;</div><div class='ctx'> 	}</div><div class='del'>-	if (sv-&gt;data_pad != vol-&gt;data_pad) {</div><div class='add'>+	if (av-&gt;data_pad != vol-&gt;data_pad) {</div><div class='ctx'> 		err = 5;</div><div class='ctx'> 		goto bad;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> bad:</div><div class='del'>-	ubi_err("bad scanning information, error %d", err);</div><div class='del'>-	ubi_dbg_dump_sv(sv);</div><div class='del'>-	ubi_dbg_dump_vol_info(vol);</div><div class='add'>+	ubi_err("bad attaching information, error %d", err);</div><div class='add'>+	ubi_dump_av(av);</div><div class='add'>+	ubi_dump_vol_info(vol);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * check_scanning_info - check that scanning information.</div><div class='add'>+ * check_attaching_info - check that attaching information.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  *</div><div class='ctx'>  * Even though we protect on-flash data by CRC checksums, we still don't trust</div><div class='del'>- * the media. This function ensures that scanning information is consistent to</div><div class='del'>- * the information read from the volume table. Returns zero if the scanning</div><div class='add'>+ * the media. This function ensures that attaching information is consistent to</div><div class='add'>+ * the information read from the volume table. Returns zero if the attaching</div><div class='ctx'>  * information is OK and %-EINVAL if it is not.</div><div class='ctx'>  */</div><div class='del'>-static int check_scanning_info(const struct ubi_device *ubi,</div><div class='del'>-			       struct ubi_scan_info *si)</div><div class='add'>+static int check_attaching_info(const struct ubi_device *ubi,</div><div class='add'>+			       struct ubi_attach_info *ai)</div><div class='ctx'> {</div><div class='ctx'> 	int err, i;</div><div class='del'>-	struct ubi_scan_volume *sv;</div><div class='add'>+	struct ubi_ainf_volume *av;</div><div class='ctx'> 	struct ubi_volume *vol;</div><div class='ctx'> </div><div class='del'>-	if (si-&gt;vols_found &gt; UBI_INT_VOL_COUNT + ubi-&gt;vtbl_slots) {</div><div class='del'>-		ubi_err("scanning found %d volumes, maximum is %d + %d",</div><div class='del'>-			si-&gt;vols_found, UBI_INT_VOL_COUNT, ubi-&gt;vtbl_slots);</div><div class='add'>+	if (ai-&gt;vols_found &gt; UBI_INT_VOL_COUNT + ubi-&gt;vtbl_slots) {</div><div class='add'>+		ubi_err("found %d volumes while attaching, maximum is %d + %d",</div><div class='add'>+			ai-&gt;vols_found, UBI_INT_VOL_COUNT, ubi-&gt;vtbl_slots);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (si-&gt;highest_vol_id &gt;= ubi-&gt;vtbl_slots + UBI_INT_VOL_COUNT &amp;&amp;</div><div class='del'>-	    si-&gt;highest_vol_id &lt; UBI_INTERNAL_VOL_START) {</div><div class='del'>-		ubi_err("too large volume ID %d found by scanning",</div><div class='del'>-			si-&gt;highest_vol_id);</div><div class='add'>+	if (ai-&gt;highest_vol_id &gt;= ubi-&gt;vtbl_slots + UBI_INT_VOL_COUNT &amp;&amp;</div><div class='add'>+	    ai-&gt;highest_vol_id &lt; UBI_INTERNAL_VOL_START) {</div><div class='add'>+		ubi_err("too large volume ID %d found", ai-&gt;highest_vol_id);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ubi-&gt;vtbl_slots + UBI_INT_VOL_COUNT; i++) {</div><div class='ctx'> 		cond_resched();</div><div class='ctx'> </div><div class='del'>-		sv = ubi_scan_find_sv(si, i);</div><div class='add'>+		av = ubi_find_av(ai, i);</div><div class='ctx'> 		vol = ubi-&gt;volumes[i];</div><div class='ctx'> 		if (!vol) {</div><div class='del'>-			if (sv)</div><div class='del'>-				ubi_scan_rm_volume(si, sv);</div><div class='add'>+			if (av)</div><div class='add'>+				ubi_remove_av(ai, av);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (vol-&gt;reserved_pebs == 0) {</div><div class='ctx'> 			ubi_assert(i &lt; ubi-&gt;vtbl_slots);</div><div class='ctx'> </div><div class='del'>-			if (!sv)</div><div class='add'>+			if (!av)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='del'>-			 * During scanning we found a volume which does not</div><div class='add'>+			 * During attaching we found a volume which does not</div><div class='ctx'> 			 * exist according to the information in the volume</div><div class='ctx'> 			 * table. This must have happened due to an unclean</div><div class='ctx'> 			 * reboot while the volume was being removed. Discard</div><div class='ctx'> 			 * these eraseblocks.</div><div class='ctx'> 			 */</div><div class='del'>-			ubi_msg("finish volume %d removal", sv-&gt;vol_id);</div><div class='del'>-			ubi_scan_rm_volume(si, sv);</div><div class='del'>-		} else if (sv) {</div><div class='del'>-			err = check_sv(vol, sv);</div><div class='add'>+			ubi_msg("finish volume %d removal", av-&gt;vol_id);</div><div class='add'>+			ubi_remove_av(ai, av);</div><div class='add'>+		} else if (av) {</div><div class='add'>+			err = check_av(vol, av);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				return err;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -774,16 +768,16 @@ static int check_scanning_info(const struct ubi_device *ubi,</div><div class='ctx'> /**</div><div class='ctx'>  * ubi_read_volume_table - read the volume table.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  *</div><div class='ctx'>  * This function reads volume table, checks it, recover from errors if needed,</div><div class='ctx'>  * or creates it if needed. Returns zero in case of success and a negative</div><div class='ctx'>  * error code in case of failure.</div><div class='ctx'>  */</div><div class='del'>-int ubi_read_volume_table(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='add'>+int ubi_read_volume_table(struct ubi_device *ubi, struct ubi_attach_info *ai)</div><div class='ctx'> {</div><div class='ctx'> 	int i, err;</div><div class='del'>-	struct ubi_scan_volume *sv;</div><div class='add'>+	struct ubi_ainf_volume *av;</div><div class='ctx'> </div><div class='ctx'> 	empty_vtbl_record.crc = cpu_to_be32(0xf116c36b);</div><div class='ctx'> </div><div class='hunk'>@@ -798,8 +792,8 @@ int ubi_read_volume_table(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> 	ubi-&gt;vtbl_size = ubi-&gt;vtbl_slots * UBI_VTBL_RECORD_SIZE;</div><div class='ctx'> 	ubi-&gt;vtbl_size = ALIGN(ubi-&gt;vtbl_size, ubi-&gt;min_io_size);</div><div class='ctx'> </div><div class='del'>-	sv = ubi_scan_find_sv(si, UBI_LAYOUT_VOLUME_ID);</div><div class='del'>-	if (!sv) {</div><div class='add'>+	av = ubi_find_av(ai, UBI_LAYOUT_VOLUME_ID);</div><div class='add'>+	if (!av) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * No logical eraseblocks belonging to the layout volume were</div><div class='ctx'> 		 * found. This could mean that the flash is just empty. In</div><div class='hunk'>@@ -808,8 +802,8 @@ int ubi_read_volume_table(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> 		 * But if flash is not empty this must be a corruption or the</div><div class='ctx'> 		 * MTD device just contains garbage.</div><div class='ctx'> 		 */</div><div class='del'>-		if (si-&gt;is_empty) {</div><div class='del'>-			ubi-&gt;vtbl = create_empty_lvol(ubi, si);</div><div class='add'>+		if (ai-&gt;is_empty) {</div><div class='add'>+			ubi-&gt;vtbl = create_empty_lvol(ubi, ai);</div><div class='ctx'> 			if (IS_ERR(ubi-&gt;vtbl))</div><div class='ctx'> 				return PTR_ERR(ubi-&gt;vtbl);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -817,14 +811,14 @@ int ubi_read_volume_table(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		if (sv-&gt;leb_count &gt; UBI_LAYOUT_VOLUME_EBS) {</div><div class='add'>+		if (av-&gt;leb_count &gt; UBI_LAYOUT_VOLUME_EBS) {</div><div class='ctx'> 			/* This must not happen with proper UBI images */</div><div class='del'>-			dbg_err("too many LEBs (%d) in layout volume",</div><div class='del'>-				sv-&gt;leb_count);</div><div class='add'>+			ubi_err("too many LEBs (%d) in layout volume",</div><div class='add'>+				av-&gt;leb_count);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ubi-&gt;vtbl = process_lvol(ubi, si, sv);</div><div class='add'>+		ubi-&gt;vtbl = process_lvol(ubi, ai, av);</div><div class='ctx'> 		if (IS_ERR(ubi-&gt;vtbl))</div><div class='ctx'> 			return PTR_ERR(ubi-&gt;vtbl);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -835,15 +829,15 @@ int ubi_read_volume_table(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> 	 * The layout volume is OK, initialize the corresponding in-RAM data</div><div class='ctx'> 	 * structures.</div><div class='ctx'> 	 */</div><div class='del'>-	err = init_volumes(ubi, si, ubi-&gt;vtbl);</div><div class='add'>+	err = init_volumes(ubi, ai, ubi-&gt;vtbl);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Make sure that the scanning information is consistent to the</div><div class='add'>+	 * Make sure that the attaching information is consistent to the</div><div class='ctx'> 	 * information stored in the volume table.</div><div class='ctx'> 	 */</div><div class='del'>-	err = check_scanning_info(ubi, si);</div><div class='add'>+	err = check_attaching_info(ubi, ai);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> </div><div class='hunk'>@@ -858,21 +852,17 @@ out_free:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MTD_UBI_DEBUG</div><div class='del'>-</div><div class='ctx'> /**</div><div class='del'>- * paranoid_vtbl_check - check volume table.</div><div class='add'>+ * self_vtbl_check - check volume table.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  */</div><div class='del'>-static void paranoid_vtbl_check(const struct ubi_device *ubi)</div><div class='add'>+static void self_vtbl_check(const struct ubi_device *ubi)</div><div class='ctx'> {</div><div class='ctx'> 	if (!ubi-&gt;dbg-&gt;chk_gen)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (vtbl_check(ubi, ubi-&gt;vtbl)) {</div><div class='del'>-		ubi_err("paranoid check failed");</div><div class='add'>+		ubi_err("self-check failed");</div><div class='ctx'> 		BUG();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MTD_UBI_DEBUG */</div><div class='head'>diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c<br/>index 7c1a9bf8ac86..b6be644e7b85 100644<br/>--- a/<a href='/drm-misc/tree/drivers/mtd/ubi/wl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/mtd/ubi/wl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/mtd/ubi/wl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/mtd/ubi/wl.c</a></div><div class='hunk'>@@ -41,12 +41,6 @@</div><div class='ctx'>  * physical eraseblocks with low erase counter to free physical eraseblocks</div><div class='ctx'>  * with high erase counter.</div><div class='ctx'>  *</div><div class='del'>- * The 'ubi_wl_get_peb()' function accepts data type hints which help to pick</div><div class='del'>- * an "optimal" physical eraseblock. For example, when it is known that the</div><div class='del'>- * physical eraseblock will be "put" soon because it contains short-term data,</div><div class='del'>- * the WL sub-system may pick a free physical eraseblock with low erase</div><div class='del'>- * counter, and so forth.</div><div class='del'>- *</div><div class='ctx'>  * If the WL sub-system fails to erase a physical eraseblock, it marks it as</div><div class='ctx'>  * bad.</div><div class='ctx'>  *</div><div class='hunk'>@@ -70,8 +64,7 @@</div><div class='ctx'>  *    to the user; instead, we first want to let users fill them up with data;</div><div class='ctx'>  *</div><div class='ctx'>  *  o there is a chance that the user will put the physical eraseblock very</div><div class='del'>- *    soon, so it makes sense not to move it for some time, but wait; this is</div><div class='del'>- *    especially important in case of "short term" physical eraseblocks.</div><div class='add'>+ *    soon, so it makes sense not to move it for some time, but wait.</div><div class='ctx'>  *</div><div class='ctx'>  * Physical eraseblocks stay protected only for limited time. But the "time" is</div><div class='ctx'>  * measured in erase cycles in this case. This is implemented with help of the</div><div class='hunk'>@@ -147,6 +140,8 @@</div><div class='ctx'>  * @list: a link in the list of pending works</div><div class='ctx'>  * @func: worker function</div><div class='ctx'>  * @e: physical eraseblock to erase</div><div class='add'>+ * @vol_id: the volume ID on which this erasure is being performed</div><div class='add'>+ * @lnum: the logical eraseblock number</div><div class='ctx'>  * @torture: if the physical eraseblock has to be tortured</div><div class='ctx'>  *</div><div class='ctx'>  * The @func pointer points to the worker function. If the @cancel argument is</div><div class='hunk'>@@ -159,21 +154,16 @@ struct ubi_work {</div><div class='ctx'> 	int (*func)(struct ubi_device *ubi, struct ubi_work *wrk, int cancel);</div><div class='ctx'> 	/* The below fields are only relevant to erasure works */</div><div class='ctx'> 	struct ubi_wl_entry *e;</div><div class='add'>+	int vol_id;</div><div class='add'>+	int lnum;</div><div class='ctx'> 	int torture;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MTD_UBI_DEBUG</div><div class='del'>-static int paranoid_check_ec(struct ubi_device *ubi, int pnum, int ec);</div><div class='del'>-static int paranoid_check_in_wl_tree(const struct ubi_device *ubi,</div><div class='del'>-				     struct ubi_wl_entry *e,</div><div class='del'>-				     struct rb_root *root);</div><div class='del'>-static int paranoid_check_in_pq(const struct ubi_device *ubi,</div><div class='del'>-				struct ubi_wl_entry *e);</div><div class='del'>-#else</div><div class='del'>-#define paranoid_check_ec(ubi, pnum, ec) 0</div><div class='del'>-#define paranoid_check_in_wl_tree(ubi, e, root)</div><div class='del'>-#define paranoid_check_in_pq(ubi, e) 0</div><div class='del'>-#endif</div><div class='add'>+static int self_check_ec(struct ubi_device *ubi, int pnum, int ec);</div><div class='add'>+static int self_check_in_wl_tree(const struct ubi_device *ubi,</div><div class='add'>+				 struct ubi_wl_entry *e, struct rb_root *root);</div><div class='add'>+static int self_check_in_pq(const struct ubi_device *ubi,</div><div class='add'>+			    struct ubi_wl_entry *e);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * wl_tree_add - add a wear-leveling entry to a WL RB-tree.</div><div class='hunk'>@@ -383,19 +373,15 @@ static struct ubi_wl_entry *find_wl_entry(struct rb_root *root, int diff)</div><div class='ctx'> /**</div><div class='ctx'>  * ubi_wl_get_peb - get a physical eraseblock.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @dtype: type of data which will be stored in this physical eraseblock</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns a physical eraseblock in case of success and a</div><div class='ctx'>  * negative error code in case of failure. Might sleep.</div><div class='ctx'>  */</div><div class='del'>-int ubi_wl_get_peb(struct ubi_device *ubi, int dtype)</div><div class='add'>+int ubi_wl_get_peb(struct ubi_device *ubi)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct ubi_wl_entry *e, *first, *last;</div><div class='ctx'> </div><div class='del'>-	ubi_assert(dtype == UBI_LONGTERM || dtype == UBI_SHORTTERM ||</div><div class='del'>-		   dtype == UBI_UNKNOWN);</div><div class='del'>-</div><div class='ctx'> retry:</div><div class='ctx'> 	spin_lock(&amp;ubi-&gt;wl_lock);</div><div class='ctx'> 	if (!ubi-&gt;free.rb_node) {</div><div class='hunk'>@@ -413,45 +399,15 @@ retry:</div><div class='ctx'> 		goto retry;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (dtype) {</div><div class='del'>-	case UBI_LONGTERM:</div><div class='del'>-		/*</div><div class='del'>-		 * For long term data we pick a physical eraseblock with high</div><div class='del'>-		 * erase counter. But the highest erase counter we can pick is</div><div class='del'>-		 * bounded by the the lowest erase counter plus</div><div class='del'>-		 * %WL_FREE_MAX_DIFF.</div><div class='del'>-		 */</div><div class='del'>-		e = find_wl_entry(&amp;ubi-&gt;free, WL_FREE_MAX_DIFF);</div><div class='del'>-		break;</div><div class='del'>-	case UBI_UNKNOWN:</div><div class='del'>-		/*</div><div class='del'>-		 * For unknown data we pick a physical eraseblock with medium</div><div class='del'>-		 * erase counter. But we by no means can pick a physical</div><div class='del'>-		 * eraseblock with erase counter greater or equivalent than the</div><div class='del'>-		 * lowest erase counter plus %WL_FREE_MAX_DIFF/2.</div><div class='del'>-		 */</div><div class='del'>-		first = rb_entry(rb_first(&amp;ubi-&gt;free), struct ubi_wl_entry,</div><div class='del'>-					u.rb);</div><div class='del'>-		last = rb_entry(rb_last(&amp;ubi-&gt;free), struct ubi_wl_entry, u.rb);</div><div class='del'>-</div><div class='del'>-		if (last-&gt;ec - first-&gt;ec &lt; WL_FREE_MAX_DIFF)</div><div class='del'>-			e = rb_entry(ubi-&gt;free.rb_node,</div><div class='del'>-					struct ubi_wl_entry, u.rb);</div><div class='del'>-		else</div><div class='del'>-			e = find_wl_entry(&amp;ubi-&gt;free, WL_FREE_MAX_DIFF/2);</div><div class='del'>-		break;</div><div class='del'>-	case UBI_SHORTTERM:</div><div class='del'>-		/*</div><div class='del'>-		 * For short term data we pick a physical eraseblock with the</div><div class='del'>-		 * lowest erase counter as we expect it will be erased soon.</div><div class='del'>-		 */</div><div class='del'>-		e = rb_entry(rb_first(&amp;ubi-&gt;free), struct ubi_wl_entry, u.rb);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='add'>+	first = rb_entry(rb_first(&amp;ubi-&gt;free), struct ubi_wl_entry, u.rb);</div><div class='add'>+	last = rb_entry(rb_last(&amp;ubi-&gt;free), struct ubi_wl_entry, u.rb);</div><div class='add'>+</div><div class='add'>+	if (last-&gt;ec - first-&gt;ec &lt; WL_FREE_MAX_DIFF)</div><div class='add'>+		e = rb_entry(ubi-&gt;free.rb_node, struct ubi_wl_entry, u.rb);</div><div class='add'>+	else</div><div class='add'>+		e = find_wl_entry(&amp;ubi-&gt;free, WL_FREE_MAX_DIFF/2);</div><div class='ctx'> </div><div class='del'>-	paranoid_check_in_wl_tree(ubi, e, &amp;ubi-&gt;free);</div><div class='add'>+	self_check_in_wl_tree(ubi, e, &amp;ubi-&gt;free);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Move the physical eraseblock to the protection queue where it will</div><div class='hunk'>@@ -462,8 +418,8 @@ retry:</div><div class='ctx'> 	prot_queue_add(ubi, e);</div><div class='ctx'> 	spin_unlock(&amp;ubi-&gt;wl_lock);</div><div class='ctx'> </div><div class='del'>-	err = ubi_dbg_check_all_ff(ubi, e-&gt;pnum, ubi-&gt;vid_hdr_aloffset,</div><div class='del'>-				   ubi-&gt;peb_size - ubi-&gt;vid_hdr_aloffset);</div><div class='add'>+	err = ubi_self_check_all_ff(ubi, e-&gt;pnum, ubi-&gt;vid_hdr_aloffset,</div><div class='add'>+				    ubi-&gt;peb_size - ubi-&gt;vid_hdr_aloffset);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		ubi_err("new PEB %d does not contain all 0xFF bytes", e-&gt;pnum);</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -488,7 +444,7 @@ static int prot_queue_del(struct ubi_device *ubi, int pnum)</div><div class='ctx'> 	if (!e)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (paranoid_check_in_pq(ubi, e))</div><div class='add'>+	if (self_check_in_pq(ubi, e))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	list_del(&amp;e-&gt;u.list);</div><div class='hunk'>@@ -514,7 +470,7 @@ static int sync_erase(struct ubi_device *ubi, struct ubi_wl_entry *e,</div><div class='ctx'> </div><div class='ctx'> 	dbg_wl("erase PEB %d, old EC %llu", e-&gt;pnum, ec);</div><div class='ctx'> </div><div class='del'>-	err = paranoid_check_ec(ubi, e-&gt;pnum, e-&gt;ec);</div><div class='add'>+	err = self_check_ec(ubi, e-&gt;pnum, e-&gt;ec);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -627,13 +583,15 @@ static int erase_worker(struct ubi_device *ubi, struct ubi_work *wl_wrk,</div><div class='ctx'>  * schedule_erase - schedule an erase work.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @e: the WL entry of the physical eraseblock to erase</div><div class='add'>+ * @vol_id: the volume ID that last used this PEB</div><div class='add'>+ * @lnum: the last used logical eraseblock number for the PEB</div><div class='ctx'>  * @torture: if the physical eraseblock has to be tortured</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns zero in case of success and a %-ENOMEM in case of</div><div class='ctx'>  * failure.</div><div class='ctx'>  */</div><div class='ctx'> static int schedule_erase(struct ubi_device *ubi, struct ubi_wl_entry *e,</div><div class='del'>-			  int torture)</div><div class='add'>+			  int vol_id, int lnum, int torture)</div><div class='ctx'> {</div><div class='ctx'> 	struct ubi_work *wl_wrk;</div><div class='ctx'> </div><div class='hunk'>@@ -646,6 +604,8 @@ static int schedule_erase(struct ubi_device *ubi, struct ubi_wl_entry *e,</div><div class='ctx'> </div><div class='ctx'> 	wl_wrk-&gt;func = &amp;erase_worker;</div><div class='ctx'> 	wl_wrk-&gt;e = e;</div><div class='add'>+	wl_wrk-&gt;vol_id = vol_id;</div><div class='add'>+	wl_wrk-&gt;lnum = lnum;</div><div class='ctx'> 	wl_wrk-&gt;torture = torture;</div><div class='ctx'> </div><div class='ctx'> 	schedule_ubi_work(ubi, wl_wrk);</div><div class='hunk'>@@ -714,7 +674,7 @@ static int wear_leveling_worker(struct ubi_device *ubi, struct ubi_work *wrk,</div><div class='ctx'> 			       e1-&gt;ec, e2-&gt;ec);</div><div class='ctx'> 			goto out_cancel;</div><div class='ctx'> 		}</div><div class='del'>-		paranoid_check_in_wl_tree(ubi, e1, &amp;ubi-&gt;used);</div><div class='add'>+		self_check_in_wl_tree(ubi, e1, &amp;ubi-&gt;used);</div><div class='ctx'> 		rb_erase(&amp;e1-&gt;u.rb, &amp;ubi-&gt;used);</div><div class='ctx'> 		dbg_wl("move PEB %d EC %d to PEB %d EC %d",</div><div class='ctx'> 		       e1-&gt;pnum, e1-&gt;ec, e2-&gt;pnum, e2-&gt;ec);</div><div class='hunk'>@@ -723,12 +683,12 @@ static int wear_leveling_worker(struct ubi_device *ubi, struct ubi_work *wrk,</div><div class='ctx'> 		scrubbing = 1;</div><div class='ctx'> 		e1 = rb_entry(rb_first(&amp;ubi-&gt;scrub), struct ubi_wl_entry, u.rb);</div><div class='ctx'> 		e2 = find_wl_entry(&amp;ubi-&gt;free, WL_FREE_MAX_DIFF);</div><div class='del'>-		paranoid_check_in_wl_tree(ubi, e1, &amp;ubi-&gt;scrub);</div><div class='add'>+		self_check_in_wl_tree(ubi, e1, &amp;ubi-&gt;scrub);</div><div class='ctx'> 		rb_erase(&amp;e1-&gt;u.rb, &amp;ubi-&gt;scrub);</div><div class='ctx'> 		dbg_wl("scrub PEB %d to PEB %d", e1-&gt;pnum, e2-&gt;pnum);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	paranoid_check_in_wl_tree(ubi, e2, &amp;ubi-&gt;free);</div><div class='add'>+	self_check_in_wl_tree(ubi, e2, &amp;ubi-&gt;free);</div><div class='ctx'> 	rb_erase(&amp;e2-&gt;u.rb, &amp;ubi-&gt;free);</div><div class='ctx'> 	ubi-&gt;move_from = e1;</div><div class='ctx'> 	ubi-&gt;move_to = e2;</div><div class='hunk'>@@ -846,7 +806,7 @@ static int wear_leveling_worker(struct ubi_device *ubi, struct ubi_work *wrk,</div><div class='ctx'> 	ubi-&gt;move_to_put = ubi-&gt;wl_scheduled = 0;</div><div class='ctx'> 	spin_unlock(&amp;ubi-&gt;wl_lock);</div><div class='ctx'> </div><div class='del'>-	err = schedule_erase(ubi, e1, 0);</div><div class='add'>+	err = schedule_erase(ubi, e1, vol_id, lnum, 0);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		kmem_cache_free(ubi_wl_entry_slab, e1);</div><div class='ctx'> 		if (e2)</div><div class='hunk'>@@ -861,7 +821,7 @@ static int wear_leveling_worker(struct ubi_device *ubi, struct ubi_work *wrk,</div><div class='ctx'> 		 */</div><div class='ctx'> 		dbg_wl("PEB %d (LEB %d:%d) was put meanwhile, erase",</div><div class='ctx'> 		       e2-&gt;pnum, vol_id, lnum);</div><div class='del'>-		err = schedule_erase(ubi, e2, 0);</div><div class='add'>+		err = schedule_erase(ubi, e2, vol_id, lnum, 0);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			kmem_cache_free(ubi_wl_entry_slab, e2);</div><div class='ctx'> 			goto out_ro;</div><div class='hunk'>@@ -900,7 +860,7 @@ out_not_moved:</div><div class='ctx'> 	spin_unlock(&amp;ubi-&gt;wl_lock);</div><div class='ctx'> </div><div class='ctx'> 	ubi_free_vid_hdr(ubi, vid_hdr);</div><div class='del'>-	err = schedule_erase(ubi, e2, torture);</div><div class='add'>+	err = schedule_erase(ubi, e2, vol_id, lnum, torture);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		kmem_cache_free(ubi_wl_entry_slab, e2);</div><div class='ctx'> 		goto out_ro;</div><div class='hunk'>@@ -1019,6 +979,8 @@ static int erase_worker(struct ubi_device *ubi, struct ubi_work *wl_wrk,</div><div class='ctx'> {</div><div class='ctx'> 	struct ubi_wl_entry *e = wl_wrk-&gt;e;</div><div class='ctx'> 	int pnum = e-&gt;pnum, err, need;</div><div class='add'>+	int vol_id = wl_wrk-&gt;vol_id;</div><div class='add'>+	int lnum = wl_wrk-&gt;lnum;</div><div class='ctx'> </div><div class='ctx'> 	if (cancel) {</div><div class='ctx'> 		dbg_wl("cancel erasure of PEB %d EC %d", pnum, e-&gt;ec);</div><div class='hunk'>@@ -1027,7 +989,8 @@ static int erase_worker(struct ubi_device *ubi, struct ubi_work *wl_wrk,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dbg_wl("erase PEB %d EC %d", pnum, e-&gt;ec);</div><div class='add'>+	dbg_wl("erase PEB %d EC %d LEB %d:%d",</div><div class='add'>+	       pnum, e-&gt;ec, wl_wrk-&gt;vol_id, wl_wrk-&gt;lnum);</div><div class='ctx'> </div><div class='ctx'> 	err = sync_erase(ubi, e, wl_wrk-&gt;torture);</div><div class='ctx'> 	if (!err) {</div><div class='hunk'>@@ -1057,7 +1020,7 @@ static int erase_worker(struct ubi_device *ubi, struct ubi_work *wl_wrk,</div><div class='ctx'> 		int err1;</div><div class='ctx'> </div><div class='ctx'> 		/* Re-schedule the LEB for erasure */</div><div class='del'>-		err1 = schedule_erase(ubi, e, 0);</div><div class='add'>+		err1 = schedule_erase(ubi, e, vol_id, lnum, 0);</div><div class='ctx'> 		if (err1) {</div><div class='ctx'> 			err = err1;</div><div class='ctx'> 			goto out_ro;</div><div class='hunk'>@@ -1125,6 +1088,8 @@ out_ro:</div><div class='ctx'> /**</div><div class='ctx'>  * ubi_wl_put_peb - return a PEB to the wear-leveling sub-system.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='add'>+ * @vol_id: the volume ID that last used this PEB</div><div class='add'>+ * @lnum: the last used logical eraseblock number for the PEB</div><div class='ctx'>  * @pnum: physical eraseblock to return</div><div class='ctx'>  * @torture: if this physical eraseblock has to be tortured</div><div class='ctx'>  *</div><div class='hunk'>@@ -1133,7 +1098,8 @@ out_ro:</div><div class='ctx'>  * occurred to this @pnum and it has to be tested. This function returns zero</div><div class='ctx'>  * in case of success, and a negative error code in case of failure.</div><div class='ctx'>  */</div><div class='del'>-int ubi_wl_put_peb(struct ubi_device *ubi, int pnum, int torture)</div><div class='add'>+int ubi_wl_put_peb(struct ubi_device *ubi, int vol_id, int lnum,</div><div class='add'>+		   int pnum, int torture)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct ubi_wl_entry *e;</div><div class='hunk'>@@ -1175,13 +1141,13 @@ retry:</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (in_wl_tree(e, &amp;ubi-&gt;used)) {</div><div class='del'>-			paranoid_check_in_wl_tree(ubi, e, &amp;ubi-&gt;used);</div><div class='add'>+			self_check_in_wl_tree(ubi, e, &amp;ubi-&gt;used);</div><div class='ctx'> 			rb_erase(&amp;e-&gt;u.rb, &amp;ubi-&gt;used);</div><div class='ctx'> 		} else if (in_wl_tree(e, &amp;ubi-&gt;scrub)) {</div><div class='del'>-			paranoid_check_in_wl_tree(ubi, e, &amp;ubi-&gt;scrub);</div><div class='add'>+			self_check_in_wl_tree(ubi, e, &amp;ubi-&gt;scrub);</div><div class='ctx'> 			rb_erase(&amp;e-&gt;u.rb, &amp;ubi-&gt;scrub);</div><div class='ctx'> 		} else if (in_wl_tree(e, &amp;ubi-&gt;erroneous)) {</div><div class='del'>-			paranoid_check_in_wl_tree(ubi, e, &amp;ubi-&gt;erroneous);</div><div class='add'>+			self_check_in_wl_tree(ubi, e, &amp;ubi-&gt;erroneous);</div><div class='ctx'> 			rb_erase(&amp;e-&gt;u.rb, &amp;ubi-&gt;erroneous);</div><div class='ctx'> 			ubi-&gt;erroneous_peb_count -= 1;</div><div class='ctx'> 			ubi_assert(ubi-&gt;erroneous_peb_count &gt;= 0);</div><div class='hunk'>@@ -1199,7 +1165,7 @@ retry:</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock(&amp;ubi-&gt;wl_lock);</div><div class='ctx'> </div><div class='del'>-	err = schedule_erase(ubi, e, torture);</div><div class='add'>+	err = schedule_erase(ubi, e, vol_id, lnum, torture);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		spin_lock(&amp;ubi-&gt;wl_lock);</div><div class='ctx'> 		wl_tree_add(e, &amp;ubi-&gt;used);</div><div class='hunk'>@@ -1248,7 +1214,7 @@ retry:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (in_wl_tree(e, &amp;ubi-&gt;used)) {</div><div class='del'>-		paranoid_check_in_wl_tree(ubi, e, &amp;ubi-&gt;used);</div><div class='add'>+		self_check_in_wl_tree(ubi, e, &amp;ubi-&gt;used);</div><div class='ctx'> 		rb_erase(&amp;e-&gt;u.rb, &amp;ubi-&gt;used);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		int err;</div><div class='hunk'>@@ -1275,23 +1241,54 @@ retry:</div><div class='ctx'> /**</div><div class='ctx'>  * ubi_wl_flush - flush all pending works.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='add'>+ * @vol_id: the volume id to flush for</div><div class='add'>+ * @lnum: the logical eraseblock number to flush for</div><div class='ctx'>  *</div><div class='del'>- * This function returns zero in case of success and a negative error code in</div><div class='del'>- * case of failure.</div><div class='add'>+ * This function executes all pending works for a particular volume id /</div><div class='add'>+ * logical eraseblock number pair. If either value is set to %UBI_ALL, then it</div><div class='add'>+ * acts as a wildcard for all of the corresponding volume numbers or logical</div><div class='add'>+ * eraseblock numbers. It returns zero in case of success and a negative error</div><div class='add'>+ * code in case of failure.</div><div class='ctx'>  */</div><div class='del'>-int ubi_wl_flush(struct ubi_device *ubi)</div><div class='add'>+int ubi_wl_flush(struct ubi_device *ubi, int vol_id, int lnum)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int found = 1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Erase while the pending works queue is not empty, but not more than</div><div class='ctx'> 	 * the number of currently pending works.</div><div class='ctx'> 	 */</div><div class='del'>-	dbg_wl("flush (%d pending works)", ubi-&gt;works_count);</div><div class='del'>-	while (ubi-&gt;works_count) {</div><div class='del'>-		err = do_work(ubi);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='add'>+	dbg_wl("flush pending work for LEB %d:%d (%d pending works)",</div><div class='add'>+	       vol_id, lnum, ubi-&gt;works_count);</div><div class='add'>+</div><div class='add'>+	while (found) {</div><div class='add'>+		struct ubi_work *wrk;</div><div class='add'>+		found = 0;</div><div class='add'>+</div><div class='add'>+		down_read(&amp;ubi-&gt;work_sem);</div><div class='add'>+		spin_lock(&amp;ubi-&gt;wl_lock);</div><div class='add'>+		list_for_each_entry(wrk, &amp;ubi-&gt;works, list) {</div><div class='add'>+			if ((vol_id == UBI_ALL || wrk-&gt;vol_id == vol_id) &amp;&amp;</div><div class='add'>+			    (lnum == UBI_ALL || wrk-&gt;lnum == lnum)) {</div><div class='add'>+				list_del(&amp;wrk-&gt;list);</div><div class='add'>+				ubi-&gt;works_count -= 1;</div><div class='add'>+				ubi_assert(ubi-&gt;works_count &gt;= 0);</div><div class='add'>+				spin_unlock(&amp;ubi-&gt;wl_lock);</div><div class='add'>+</div><div class='add'>+				err = wrk-&gt;func(ubi, wrk, 0);</div><div class='add'>+				if (err) {</div><div class='add'>+					up_read(&amp;ubi-&gt;work_sem);</div><div class='add'>+					return err;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				spin_lock(&amp;ubi-&gt;wl_lock);</div><div class='add'>+				found = 1;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		spin_unlock(&amp;ubi-&gt;wl_lock);</div><div class='add'>+		up_read(&amp;ubi-&gt;work_sem);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1301,18 +1298,7 @@ int ubi_wl_flush(struct ubi_device *ubi)</div><div class='ctx'> 	down_write(&amp;ubi-&gt;work_sem);</div><div class='ctx'> 	up_write(&amp;ubi-&gt;work_sem);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * And in case last was the WL worker and it canceled the LEB</div><div class='del'>-	 * movement, flush again.</div><div class='del'>-	 */</div><div class='del'>-	while (ubi-&gt;works_count) {</div><div class='del'>-		dbg_wl("flush more (%d pending works)", ubi-&gt;works_count);</div><div class='del'>-		err = do_work(ubi);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1421,26 +1407,26 @@ static void cancel_pending(struct ubi_device *ubi)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ubi_wl_init_scan - initialize the WL sub-system using scanning information.</div><div class='add'>+ * ubi_wl_init - initialize the WL sub-system using attaching information.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='del'>- * @si: scanning information</div><div class='add'>+ * @ai: attaching information</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns zero in case of success, and a negative error code in</div><div class='ctx'>  * case of failure.</div><div class='ctx'>  */</div><div class='del'>-int ubi_wl_init_scan(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='add'>+int ubi_wl_init(struct ubi_device *ubi, struct ubi_attach_info *ai)</div><div class='ctx'> {</div><div class='ctx'> 	int err, i;</div><div class='ctx'> 	struct rb_node *rb1, *rb2;</div><div class='del'>-	struct ubi_scan_volume *sv;</div><div class='del'>-	struct ubi_scan_leb *seb, *tmp;</div><div class='add'>+	struct ubi_ainf_volume *av;</div><div class='add'>+	struct ubi_ainf_peb *aeb, *tmp;</div><div class='ctx'> 	struct ubi_wl_entry *e;</div><div class='ctx'> </div><div class='ctx'> 	ubi-&gt;used = ubi-&gt;erroneous = ubi-&gt;free = ubi-&gt;scrub = RB_ROOT;</div><div class='ctx'> 	spin_lock_init(&amp;ubi-&gt;wl_lock);</div><div class='ctx'> 	mutex_init(&amp;ubi-&gt;move_mutex);</div><div class='ctx'> 	init_rwsem(&amp;ubi-&gt;work_sem);</div><div class='del'>-	ubi-&gt;max_ec = si-&gt;max_ec;</div><div class='add'>+	ubi-&gt;max_ec = ai-&gt;max_ec;</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;ubi-&gt;works);</div><div class='ctx'> </div><div class='ctx'> 	sprintf(ubi-&gt;bgt_name, UBI_BGT_NAME_PATTERN, ubi-&gt;ubi_num);</div><div class='hunk'>@@ -1454,48 +1440,48 @@ int ubi_wl_init_scan(struct ubi_device *ubi, struct ubi_scan_info *si)</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;ubi-&gt;pq[i]);</div><div class='ctx'> 	ubi-&gt;pq_head = 0;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry_safe(seb, tmp, &amp;si-&gt;erase, u.list) {</div><div class='add'>+	list_for_each_entry_safe(aeb, tmp, &amp;ai-&gt;erase, u.list) {</div><div class='ctx'> 		cond_resched();</div><div class='ctx'> </div><div class='ctx'> 		e = kmem_cache_alloc(ubi_wl_entry_slab, GFP_KERNEL);</div><div class='ctx'> 		if (!e)</div><div class='ctx'> 			goto out_free;</div><div class='ctx'> </div><div class='del'>-		e-&gt;pnum = seb-&gt;pnum;</div><div class='del'>-		e-&gt;ec = seb-&gt;ec;</div><div class='add'>+		e-&gt;pnum = aeb-&gt;pnum;</div><div class='add'>+		e-&gt;ec = aeb-&gt;ec;</div><div class='ctx'> 		ubi-&gt;lookuptbl[e-&gt;pnum] = e;</div><div class='del'>-		if (schedule_erase(ubi, e, 0)) {</div><div class='add'>+		if (schedule_erase(ubi, e, aeb-&gt;vol_id, aeb-&gt;lnum, 0)) {</div><div class='ctx'> 			kmem_cache_free(ubi_wl_entry_slab, e);</div><div class='ctx'> 			goto out_free;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(seb, &amp;si-&gt;free, u.list) {</div><div class='add'>+	list_for_each_entry(aeb, &amp;ai-&gt;free, u.list) {</div><div class='ctx'> 		cond_resched();</div><div class='ctx'> </div><div class='ctx'> 		e = kmem_cache_alloc(ubi_wl_entry_slab, GFP_KERNEL);</div><div class='ctx'> 		if (!e)</div><div class='ctx'> 			goto out_free;</div><div class='ctx'> </div><div class='del'>-		e-&gt;pnum = seb-&gt;pnum;</div><div class='del'>-		e-&gt;ec = seb-&gt;ec;</div><div class='add'>+		e-&gt;pnum = aeb-&gt;pnum;</div><div class='add'>+		e-&gt;ec = aeb-&gt;ec;</div><div class='ctx'> 		ubi_assert(e-&gt;ec &gt;= 0);</div><div class='ctx'> 		wl_tree_add(e, &amp;ubi-&gt;free);</div><div class='ctx'> 		ubi-&gt;lookuptbl[e-&gt;pnum] = e;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ubi_rb_for_each_entry(rb1, sv, &amp;si-&gt;volumes, rb) {</div><div class='del'>-		ubi_rb_for_each_entry(rb2, seb, &amp;sv-&gt;root, u.rb) {</div><div class='add'>+	ubi_rb_for_each_entry(rb1, av, &amp;ai-&gt;volumes, rb) {</div><div class='add'>+		ubi_rb_for_each_entry(rb2, aeb, &amp;av-&gt;root, u.rb) {</div><div class='ctx'> 			cond_resched();</div><div class='ctx'> </div><div class='ctx'> 			e = kmem_cache_alloc(ubi_wl_entry_slab, GFP_KERNEL);</div><div class='ctx'> 			if (!e)</div><div class='ctx'> 				goto out_free;</div><div class='ctx'> </div><div class='del'>-			e-&gt;pnum = seb-&gt;pnum;</div><div class='del'>-			e-&gt;ec = seb-&gt;ec;</div><div class='add'>+			e-&gt;pnum = aeb-&gt;pnum;</div><div class='add'>+			e-&gt;ec = aeb-&gt;ec;</div><div class='ctx'> 			ubi-&gt;lookuptbl[e-&gt;pnum] = e;</div><div class='del'>-			if (!seb-&gt;scrub) {</div><div class='add'>+			if (!aeb-&gt;scrub) {</div><div class='ctx'> 				dbg_wl("add PEB %d EC %d to the used tree",</div><div class='ctx'> 				       e-&gt;pnum, e-&gt;ec);</div><div class='ctx'> 				wl_tree_add(e, &amp;ubi-&gt;used);</div><div class='hunk'>@@ -1567,10 +1553,8 @@ void ubi_wl_close(struct ubi_device *ubi)</div><div class='ctx'> 	kfree(ubi-&gt;lookuptbl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MTD_UBI_DEBUG</div><div class='del'>-</div><div class='ctx'> /**</div><div class='del'>- * paranoid_check_ec - make sure that the erase counter of a PEB is correct.</div><div class='add'>+ * self_check_ec - make sure that the erase counter of a PEB is correct.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @pnum: the physical eraseblock number to check</div><div class='ctx'>  * @ec: the erase counter to check</div><div class='hunk'>@@ -1579,7 +1563,7 @@ void ubi_wl_close(struct ubi_device *ubi)</div><div class='ctx'>  * is equivalent to @ec, and a negative error code if not or if an error</div><div class='ctx'>  * occurred.</div><div class='ctx'>  */</div><div class='del'>-static int paranoid_check_ec(struct ubi_device *ubi, int pnum, int ec)</div><div class='add'>+static int self_check_ec(struct ubi_device *ubi, int pnum, int ec)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	long long read_ec;</div><div class='hunk'>@@ -1601,9 +1585,9 @@ static int paranoid_check_ec(struct ubi_device *ubi, int pnum, int ec)</div><div class='ctx'> </div><div class='ctx'> 	read_ec = be64_to_cpu(ec_hdr-&gt;ec);</div><div class='ctx'> 	if (ec != read_ec) {</div><div class='del'>-		ubi_err("paranoid check failed for PEB %d", pnum);</div><div class='add'>+		ubi_err("self-check failed for PEB %d", pnum);</div><div class='ctx'> 		ubi_err("read EC is %lld, should be %d", read_ec, ec);</div><div class='del'>-		ubi_dbg_dump_stack();</div><div class='add'>+		dump_stack();</div><div class='ctx'> 		err = 1;</div><div class='ctx'> 	} else</div><div class='ctx'> 		err = 0;</div><div class='hunk'>@@ -1614,7 +1598,7 @@ out_free:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * paranoid_check_in_wl_tree - check that wear-leveling entry is in WL RB-tree.</div><div class='add'>+ * self_check_in_wl_tree - check that wear-leveling entry is in WL RB-tree.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @e: the wear-leveling entry to check</div><div class='ctx'>  * @root: the root of the tree</div><div class='hunk'>@@ -1622,9 +1606,8 @@ out_free:</div><div class='ctx'>  * This function returns zero if @e is in the @root RB-tree and %-EINVAL if it</div><div class='ctx'>  * is not.</div><div class='ctx'>  */</div><div class='del'>-static int paranoid_check_in_wl_tree(const struct ubi_device *ubi,</div><div class='del'>-				     struct ubi_wl_entry *e,</div><div class='del'>-				     struct rb_root *root)</div><div class='add'>+static int self_check_in_wl_tree(const struct ubi_device *ubi,</div><div class='add'>+				 struct ubi_wl_entry *e, struct rb_root *root)</div><div class='ctx'> {</div><div class='ctx'> 	if (!ubi-&gt;dbg-&gt;chk_gen)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1632,22 +1615,22 @@ static int paranoid_check_in_wl_tree(const struct ubi_device *ubi,</div><div class='ctx'> 	if (in_wl_tree(e, root))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ubi_err("paranoid check failed for PEB %d, EC %d, RB-tree %p ",</div><div class='add'>+	ubi_err("self-check failed for PEB %d, EC %d, RB-tree %p ",</div><div class='ctx'> 		e-&gt;pnum, e-&gt;ec, root);</div><div class='del'>-	ubi_dbg_dump_stack();</div><div class='add'>+	dump_stack();</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * paranoid_check_in_pq - check if wear-leveling entry is in the protection</div><div class='add'>+ * self_check_in_pq - check if wear-leveling entry is in the protection</div><div class='ctx'>  *                        queue.</div><div class='ctx'>  * @ubi: UBI device description object</div><div class='ctx'>  * @e: the wear-leveling entry to check</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns zero if @e is in @ubi-&gt;pq and %-EINVAL if it is not.</div><div class='ctx'>  */</div><div class='del'>-static int paranoid_check_in_pq(const struct ubi_device *ubi,</div><div class='del'>-				struct ubi_wl_entry *e)</div><div class='add'>+static int self_check_in_pq(const struct ubi_device *ubi,</div><div class='add'>+			    struct ubi_wl_entry *e)</div><div class='ctx'> {</div><div class='ctx'> 	struct ubi_wl_entry *p;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1660,10 +1643,8 @@ static int paranoid_check_in_pq(const struct ubi_device *ubi,</div><div class='ctx'> 			if (p == e)</div><div class='ctx'> 				return 0;</div><div class='ctx'> </div><div class='del'>-	ubi_err("paranoid check failed for PEB %d, EC %d, Protect queue",</div><div class='add'>+	ubi_err("self-check failed for PEB %d, EC %d, Protect queue",</div><div class='ctx'> 		e-&gt;pnum, e-&gt;ec);</div><div class='del'>-	ubi_dbg_dump_stack();</div><div class='add'>+	dump_stack();</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MTD_UBI_DEBUG */</div><div class='head'>diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig<br/>index b98285446a5a..0c2bd806950e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/Kconfig</a></div><div class='hunk'>@@ -66,10 +66,7 @@ config DUMMY</div><div class='ctx'> 	  &lt;http://www.tldp.org/docs.html#guide&gt;.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module</div><div class='del'>-	  will be called dummy.  If you want to use more than one dummy</div><div class='del'>-	  device at a time, you need to compile this driver as a module.</div><div class='del'>-	  Instead of 'dummy', the devices will then be called 'dummy0',</div><div class='del'>-	  'dummy1' etc.</div><div class='add'>+	  will be called dummy.</div><div class='ctx'> </div><div class='ctx'> config EQUALIZER</div><div class='ctx'> 	tristate "EQL (serial line load balancing) support"</div><div class='hunk'>@@ -285,8 +282,6 @@ source "drivers/net/slip/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/s390/net/Kconfig"</div><div class='ctx'> </div><div class='del'>-source "drivers/net/tokenring/Kconfig"</div><div class='del'>-</div><div class='ctx'> source "drivers/net/usb/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/net/wireless/Kconfig"</div><div class='head'>diff --git a/drivers/net/Makefile b/drivers/net/Makefile<br/>index a6b8ce11a22f..3d375ca128a6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/Makefile</a></div><div class='hunk'>@@ -50,7 +50,6 @@ obj-$(CONFIG_SLIP) += slip/</div><div class='ctx'> obj-$(CONFIG_SLHC) += slip/</div><div class='ctx'> obj-$(CONFIG_NET_SB1000) += sb1000.o</div><div class='ctx'> obj-$(CONFIG_SUNGEM_PHY) += sungem_phy.o</div><div class='del'>-obj-$(CONFIG_TR) += tokenring/</div><div class='ctx'> obj-$(CONFIG_WAN) += wan/</div><div class='ctx'> obj-$(CONFIG_WLAN) += wireless/</div><div class='ctx'> obj-$(CONFIG_WIMAX) += wimax/</div><div class='head'>diff --git a/drivers/net/Space.c b/drivers/net/Space.c<br/>index 88bbd8ffa7fe..e3f0faca98d0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/Space.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/Space.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/Space.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/Space.c</a></div><div class='hunk'>@@ -29,7 +29,6 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/netlink.h&gt;</div><div class='hunk'>@@ -134,22 +133,9 @@ static struct devprobe2 eisa_probes[] __initdata = {</div><div class='ctx'> 	{NULL, 0},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct devprobe2 mca_probes[] __initdata = {</div><div class='del'>-#ifdef CONFIG_NE2_MCA</div><div class='del'>-	{ne2_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_ELMC		/* 3c523 */</div><div class='del'>-	{elmc_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_ELMC_II		/* 3c527 */</div><div class='del'>-	{mc32_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-	{NULL, 0},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * ISA probes that touch addresses &lt; 0x400 (including those that also</div><div class='del'>- * look for EISA/PCI/MCA cards in addition to ISA cards).</div><div class='add'>+ * look for EISA/PCI cards in addition to ISA cards).</div><div class='ctx'>  */</div><div class='ctx'> static struct devprobe2 isa_probes[] __initdata = {</div><div class='ctx'> #if defined(CONFIG_HP100) &amp;&amp; defined(CONFIG_ISA)	/* ISA, EISA */</div><div class='hunk'>@@ -279,51 +265,10 @@ static void __init ethif_probe2(int unit)</div><div class='ctx'> </div><div class='ctx'> 	(void)(	probe_list2(unit, m68k_probes, base_addr == 0) &amp;&amp;</div><div class='ctx'> 		probe_list2(unit, eisa_probes, base_addr == 0) &amp;&amp;</div><div class='del'>-		probe_list2(unit, mca_probes, base_addr == 0) &amp;&amp;</div><div class='ctx'> 		probe_list2(unit, isa_probes, base_addr == 0) &amp;&amp;</div><div class='ctx'> 		probe_list2(unit, parport_probes, base_addr == 0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TR</div><div class='del'>-/* Token-ring device probe */</div><div class='del'>-extern int ibmtr_probe_card(struct net_device *);</div><div class='del'>-extern struct net_device *smctr_probe(int unit);</div><div class='del'>-</div><div class='del'>-static struct devprobe2 tr_probes2[] __initdata = {</div><div class='del'>-#ifdef CONFIG_SMCTR</div><div class='del'>-	{smctr_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-	{NULL, 0},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static __init int trif_probe(int unit)</div><div class='del'>-{</div><div class='del'>-	int err = -ENODEV;</div><div class='del'>-#ifdef CONFIG_IBMTR</div><div class='del'>-	struct net_device *dev = alloc_trdev(0);</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	sprintf(dev-&gt;name, "tr%d", unit);</div><div class='del'>-	netdev_boot_setup_check(dev);</div><div class='del'>-	err = ibmtr_probe_card(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-#endif</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init trif_probe2(int unit)</div><div class='del'>-{</div><div class='del'>-	unsigned long base_addr = netdev_boot_base("tr", unit);</div><div class='del'>-</div><div class='del'>-	if (base_addr == 1)</div><div class='del'>-		return;</div><div class='del'>-	probe_list2(unit, tr_probes2, base_addr == 0);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /*  Statically configured drivers -- order matters here. */</div><div class='ctx'> static int __init net_olddevs_init(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -333,11 +278,6 @@ static int __init net_olddevs_init(void)</div><div class='ctx'> 	for (num = 0; num &lt; 8; ++num)</div><div class='ctx'> 		sbni_probe(num);</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_TR</div><div class='del'>-	for (num = 0; num &lt; 8; ++num)</div><div class='del'>-		if (!trif_probe(num))</div><div class='del'>-			trif_probe2(num);</div><div class='del'>-#endif</div><div class='ctx'> 	for (num = 0; num &lt; 8; ++num)</div><div class='ctx'> 		ethif_probe2(num);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/bonding/bond_3ad.c b/drivers/net/bonding/bond_3ad.c<br/>index 793b00138275..3463b469e657 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/bonding/bond_3ad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/bonding/bond_3ad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/bonding/bond_3ad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/bonding/bond_3ad.c</a></div><div class='hunk'>@@ -2173,9 +2173,10 @@ re_arm:</div><div class='ctx'>  * received frames (loopback). Since only the payload is given to this</div><div class='ctx'>  * function, it check for loopback.</div><div class='ctx'>  */</div><div class='del'>-static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u16 length)</div><div class='add'>+static int bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u16 length)</div><div class='ctx'> {</div><div class='ctx'> 	struct port *port;</div><div class='add'>+	int ret = RX_HANDLER_ANOTHER;</div><div class='ctx'> </div><div class='ctx'> 	if (length &gt;= sizeof(struct lacpdu)) {</div><div class='ctx'> </div><div class='hunk'>@@ -2184,11 +2185,12 @@ static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u</div><div class='ctx'> 		if (!port-&gt;slave) {</div><div class='ctx'> 			pr_warning("%s: Warning: port of slave %s is uninitialized\n",</div><div class='ctx'> 				   slave-&gt;dev-&gt;name, slave-&gt;dev-&gt;master-&gt;name);</div><div class='del'>-			return;</div><div class='add'>+			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		switch (lacpdu-&gt;subtype) {</div><div class='ctx'> 		case AD_TYPE_LACPDU:</div><div class='add'>+			ret = RX_HANDLER_CONSUMED;</div><div class='ctx'> 			pr_debug("Received LACPDU on port %d\n",</div><div class='ctx'> 				 port-&gt;actor_port_number);</div><div class='ctx'> 			/* Protect against concurrent state machines */</div><div class='hunk'>@@ -2198,6 +2200,7 @@ static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case AD_TYPE_MARKER:</div><div class='add'>+			ret = RX_HANDLER_CONSUMED;</div><div class='ctx'> 			// No need to convert fields to Little Endian since we don't use the marker's fields.</div><div class='ctx'> </div><div class='ctx'> 			switch (((struct bond_marker *)lacpdu)-&gt;tlv_type) {</div><div class='hunk'>@@ -2219,6 +2222,7 @@ static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2456,18 +2460,20 @@ out:</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bond_3ad_lacpdu_recv(struct sk_buff *skb, struct bonding *bond,</div><div class='add'>+int bond_3ad_lacpdu_recv(struct sk_buff *skb, struct bonding *bond,</div><div class='ctx'> 			  struct slave *slave)</div><div class='ctx'> {</div><div class='add'>+	int ret = RX_HANDLER_ANOTHER;</div><div class='ctx'> 	if (skb-&gt;protocol != PKT_TYPE_LACPDU)</div><div class='del'>-		return;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!pskb_may_pull(skb, sizeof(struct lacpdu)))</div><div class='del'>-		return;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	read_lock(&amp;bond-&gt;lock);</div><div class='del'>-	bond_3ad_rx_indication((struct lacpdu *) skb-&gt;data, slave, skb-&gt;len);</div><div class='add'>+	ret = bond_3ad_rx_indication((struct lacpdu *) skb-&gt;data, slave, skb-&gt;len);</div><div class='ctx'> 	read_unlock(&amp;bond-&gt;lock);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/net/bonding/bond_3ad.h b/drivers/net/bonding/bond_3ad.h<br/>index 235b2cc58b28..5ee7e3c45db7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/bonding/bond_3ad.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/bonding/bond_3ad.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/bonding/bond_3ad.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/bonding/bond_3ad.h</a></div><div class='hunk'>@@ -274,7 +274,7 @@ void bond_3ad_adapter_duplex_changed(struct slave *slave);</div><div class='ctx'> void bond_3ad_handle_link_change(struct slave *slave, char link);</div><div class='ctx'> int  bond_3ad_get_active_agg_info(struct bonding *bond, struct ad_info *ad_info);</div><div class='ctx'> int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev);</div><div class='del'>-void bond_3ad_lacpdu_recv(struct sk_buff *skb, struct bonding *bond,</div><div class='add'>+int bond_3ad_lacpdu_recv(struct sk_buff *skb, struct bonding *bond,</div><div class='ctx'> 			  struct slave *slave);</div><div class='ctx'> int bond_3ad_set_carrier(struct bonding *bond);</div><div class='ctx'> void bond_3ad_update_lacp_rate(struct bonding *bond);</div><div class='head'>diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c<br/>index 9abfde479316..0f59c1564e53 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/bonding/bond_alb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/bonding/bond_alb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/bonding/bond_alb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/bonding/bond_alb.c</a></div><div class='hunk'>@@ -332,7 +332,7 @@ static void rlb_update_entry_from_arp(struct bonding *bond, struct arp_pkt *arp)</div><div class='ctx'> 	if ((client_info-&gt;assigned) &amp;&amp;</div><div class='ctx'> 	    (client_info-&gt;ip_src == arp-&gt;ip_dst) &amp;&amp;</div><div class='ctx'> 	    (client_info-&gt;ip_dst == arp-&gt;ip_src) &amp;&amp;</div><div class='del'>-	    (compare_ether_addr_64bits(client_info-&gt;mac_dst, arp-&gt;mac_src))) {</div><div class='add'>+	    (!ether_addr_equal_64bits(client_info-&gt;mac_dst, arp-&gt;mac_src))) {</div><div class='ctx'> 		/* update the clients MAC address */</div><div class='ctx'> 		memcpy(client_info-&gt;mac_dst, arp-&gt;mac_src, ETH_ALEN);</div><div class='ctx'> 		client_info-&gt;ntt = 1;</div><div class='hunk'>@@ -342,26 +342,26 @@ static void rlb_update_entry_from_arp(struct bonding *bond, struct arp_pkt *arp)</div><div class='ctx'> 	_unlock_rx_hashtbl_bh(bond);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rlb_arp_recv(struct sk_buff *skb, struct bonding *bond,</div><div class='add'>+static int rlb_arp_recv(struct sk_buff *skb, struct bonding *bond,</div><div class='ctx'> 			 struct slave *slave)</div><div class='ctx'> {</div><div class='ctx'> 	struct arp_pkt *arp;</div><div class='ctx'> </div><div class='ctx'> 	if (skb-&gt;protocol != cpu_to_be16(ETH_P_ARP))</div><div class='del'>-		return;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	arp = (struct arp_pkt *) skb-&gt;data;</div><div class='ctx'> 	if (!arp) {</div><div class='ctx'> 		pr_debug("Packet has no ARP data\n");</div><div class='del'>-		return;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!pskb_may_pull(skb, arp_hdr_len(bond-&gt;dev)))</div><div class='del'>-		return;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (skb-&gt;len &lt; sizeof(struct arp_pkt)) {</div><div class='ctx'> 		pr_debug("Packet is too small to be an ARP\n");</div><div class='del'>-		return;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (arp-&gt;op_code == htons(ARPOP_REPLY)) {</div><div class='hunk'>@@ -369,6 +369,8 @@ static void rlb_arp_recv(struct sk_buff *skb, struct bonding *bond,</div><div class='ctx'> 		rlb_update_entry_from_arp(bond, arp);</div><div class='ctx'> 		pr_debug("Server received an ARP Reply from client\n");</div><div class='ctx'> 	}</div><div class='add'>+out:</div><div class='add'>+	return RX_HANDLER_ANOTHER;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Caller must hold bond lock for read */</div><div class='hunk'>@@ -448,8 +450,8 @@ static void rlb_clear_slave(struct bonding *bond, struct slave *slave)</div><div class='ctx'> </div><div class='ctx'> 			if (assigned_slave) {</div><div class='ctx'> 				rx_hash_table[index].slave = assigned_slave;</div><div class='del'>-				if (compare_ether_addr_64bits(rx_hash_table[index].mac_dst,</div><div class='del'>-							      mac_bcast)) {</div><div class='add'>+				if (!ether_addr_equal_64bits(rx_hash_table[index].mac_dst,</div><div class='add'>+							     mac_bcast)) {</div><div class='ctx'> 					bond_info-&gt;rx_hashtbl[index].ntt = 1;</div><div class='ctx'> 					bond_info-&gt;rx_ntt = 1;</div><div class='ctx'> 					/* A slave has been removed from the</div><div class='hunk'>@@ -561,7 +563,7 @@ static void rlb_req_update_slave_clients(struct bonding *bond, struct slave *sla</div><div class='ctx'> 		client_info = &amp;(bond_info-&gt;rx_hashtbl[hash_index]);</div><div class='ctx'> </div><div class='ctx'> 		if ((client_info-&gt;slave == slave) &amp;&amp;</div><div class='del'>-		    compare_ether_addr_64bits(client_info-&gt;mac_dst, mac_bcast)) {</div><div class='add'>+		    !ether_addr_equal_64bits(client_info-&gt;mac_dst, mac_bcast)) {</div><div class='ctx'> 			client_info-&gt;ntt = 1;</div><div class='ctx'> 			ntt = 1;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -600,9 +602,9 @@ static void rlb_req_update_subnet_clients(struct bonding *bond, __be32 src_ip)</div><div class='ctx'> 		 * unicast mac address.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if ((client_info-&gt;ip_src == src_ip) &amp;&amp;</div><div class='del'>-		    compare_ether_addr_64bits(client_info-&gt;slave-&gt;dev-&gt;dev_addr,</div><div class='del'>-			   bond-&gt;dev-&gt;dev_addr) &amp;&amp;</div><div class='del'>-		    compare_ether_addr_64bits(client_info-&gt;mac_dst, mac_bcast)) {</div><div class='add'>+		    !ether_addr_equal_64bits(client_info-&gt;slave-&gt;dev-&gt;dev_addr,</div><div class='add'>+					     bond-&gt;dev-&gt;dev_addr) &amp;&amp;</div><div class='add'>+		    !ether_addr_equal_64bits(client_info-&gt;mac_dst, mac_bcast)) {</div><div class='ctx'> 			client_info-&gt;ntt = 1;</div><div class='ctx'> 			bond_info-&gt;rx_ntt = 1;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -629,7 +631,7 @@ static struct slave *rlb_choose_channel(struct sk_buff *skb, struct bonding *bon</div><div class='ctx'> 		if ((client_info-&gt;ip_src == arp-&gt;ip_src) &amp;&amp;</div><div class='ctx'> 		    (client_info-&gt;ip_dst == arp-&gt;ip_dst)) {</div><div class='ctx'> 			/* the entry is already assigned to this client */</div><div class='del'>-			if (compare_ether_addr_64bits(arp-&gt;mac_dst, mac_bcast)) {</div><div class='add'>+			if (!ether_addr_equal_64bits(arp-&gt;mac_dst, mac_bcast)) {</div><div class='ctx'> 				/* update mac address from arp */</div><div class='ctx'> 				memcpy(client_info-&gt;mac_dst, arp-&gt;mac_dst, ETH_ALEN);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -664,7 +666,7 @@ static struct slave *rlb_choose_channel(struct sk_buff *skb, struct bonding *bon</div><div class='ctx'> 		memcpy(client_info-&gt;mac_dst, arp-&gt;mac_dst, ETH_ALEN);</div><div class='ctx'> 		client_info-&gt;slave = assigned_slave;</div><div class='ctx'> </div><div class='del'>-		if (compare_ether_addr_64bits(client_info-&gt;mac_dst, mac_bcast)) {</div><div class='add'>+		if (!ether_addr_equal_64bits(client_info-&gt;mac_dst, mac_bcast)) {</div><div class='ctx'> 			client_info-&gt;ntt = 1;</div><div class='ctx'> 			bond-&gt;alb_info.rx_ntt = 1;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1009,18 +1011,18 @@ static void alb_change_hw_addr_on_detach(struct bonding *bond, struct slave *sla</div><div class='ctx'> 	int perm_curr_diff;</div><div class='ctx'> 	int perm_bond_diff;</div><div class='ctx'> </div><div class='del'>-	perm_curr_diff = compare_ether_addr_64bits(slave-&gt;perm_hwaddr,</div><div class='del'>-						   slave-&gt;dev-&gt;dev_addr);</div><div class='del'>-	perm_bond_diff = compare_ether_addr_64bits(slave-&gt;perm_hwaddr,</div><div class='del'>-						   bond-&gt;dev-&gt;dev_addr);</div><div class='add'>+	perm_curr_diff = !ether_addr_equal_64bits(slave-&gt;perm_hwaddr,</div><div class='add'>+						  slave-&gt;dev-&gt;dev_addr);</div><div class='add'>+	perm_bond_diff = !ether_addr_equal_64bits(slave-&gt;perm_hwaddr,</div><div class='add'>+						  bond-&gt;dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='ctx'> 	if (perm_curr_diff &amp;&amp; perm_bond_diff) {</div><div class='ctx'> 		struct slave *tmp_slave;</div><div class='ctx'> 		int i, found = 0;</div><div class='ctx'> </div><div class='ctx'> 		bond_for_each_slave(bond, tmp_slave, i) {</div><div class='del'>-			if (!compare_ether_addr_64bits(slave-&gt;perm_hwaddr,</div><div class='del'>-						       tmp_slave-&gt;dev-&gt;dev_addr)) {</div><div class='add'>+			if (ether_addr_equal_64bits(slave-&gt;perm_hwaddr,</div><div class='add'>+						    tmp_slave-&gt;dev-&gt;dev_addr)) {</div><div class='ctx'> 				found = 1;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1074,10 +1076,10 @@ static int alb_handle_addr_collision_on_attach(struct bonding *bond, struct slav</div><div class='ctx'> 	 * check uniqueness of slave's mac address against the other</div><div class='ctx'> 	 * slaves in the bond.</div><div class='ctx'> 	 */</div><div class='del'>-	if (compare_ether_addr_64bits(slave-&gt;perm_hwaddr, bond-&gt;dev-&gt;dev_addr)) {</div><div class='add'>+	if (!ether_addr_equal_64bits(slave-&gt;perm_hwaddr, bond-&gt;dev-&gt;dev_addr)) {</div><div class='ctx'> 		bond_for_each_slave(bond, tmp_slave1, i) {</div><div class='del'>-			if (!compare_ether_addr_64bits(tmp_slave1-&gt;dev-&gt;dev_addr,</div><div class='del'>-						       slave-&gt;dev-&gt;dev_addr)) {</div><div class='add'>+			if (ether_addr_equal_64bits(tmp_slave1-&gt;dev-&gt;dev_addr,</div><div class='add'>+						    slave-&gt;dev-&gt;dev_addr)) {</div><div class='ctx'> 				found = 1;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1099,8 +1101,8 @@ static int alb_handle_addr_collision_on_attach(struct bonding *bond, struct slav</div><div class='ctx'> 	bond_for_each_slave(bond, tmp_slave1, i) {</div><div class='ctx'> 		found = 0;</div><div class='ctx'> 		bond_for_each_slave(bond, tmp_slave2, j) {</div><div class='del'>-			if (!compare_ether_addr_64bits(tmp_slave1-&gt;perm_hwaddr,</div><div class='del'>-						       tmp_slave2-&gt;dev-&gt;dev_addr)) {</div><div class='add'>+			if (ether_addr_equal_64bits(tmp_slave1-&gt;perm_hwaddr,</div><div class='add'>+						    tmp_slave2-&gt;dev-&gt;dev_addr)) {</div><div class='ctx'> 				found = 1;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1115,8 +1117,8 @@ static int alb_handle_addr_collision_on_attach(struct bonding *bond, struct slav</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!has_bond_addr) {</div><div class='del'>-			if (!compare_ether_addr_64bits(tmp_slave1-&gt;dev-&gt;dev_addr,</div><div class='del'>-						       bond-&gt;dev-&gt;dev_addr)) {</div><div class='add'>+			if (ether_addr_equal_64bits(tmp_slave1-&gt;dev-&gt;dev_addr,</div><div class='add'>+						    bond-&gt;dev-&gt;dev_addr)) {</div><div class='ctx'> </div><div class='ctx'> 				has_bond_addr = tmp_slave1;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1257,7 +1259,7 @@ int bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='ctx'> 	case ETH_P_IP: {</div><div class='ctx'> 		const struct iphdr *iph = ip_hdr(skb);</div><div class='ctx'> </div><div class='del'>-		if (!compare_ether_addr_64bits(eth_data-&gt;h_dest, mac_bcast) ||</div><div class='add'>+		if (ether_addr_equal_64bits(eth_data-&gt;h_dest, mac_bcast) ||</div><div class='ctx'> 		    (iph-&gt;daddr == ip_bcast) ||</div><div class='ctx'> 		    (iph-&gt;protocol == IPPROTO_IGMP)) {</div><div class='ctx'> 			do_tx_balance = 0;</div><div class='hunk'>@@ -1271,7 +1273,7 @@ int bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='ctx'> 		/* IPv6 doesn't really use broadcast mac address, but leave</div><div class='ctx'> 		 * that here just in case.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!compare_ether_addr_64bits(eth_data-&gt;h_dest, mac_bcast)) {</div><div class='add'>+		if (ether_addr_equal_64bits(eth_data-&gt;h_dest, mac_bcast)) {</div><div class='ctx'> 			do_tx_balance = 0;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1279,7 +1281,7 @@ int bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='ctx'> 		/* IPv6 uses all-nodes multicast as an equivalent to</div><div class='ctx'> 		 * broadcasts in IPv4.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!compare_ether_addr_64bits(eth_data-&gt;h_dest, mac_v6_allmcast)) {</div><div class='add'>+		if (ether_addr_equal_64bits(eth_data-&gt;h_dest, mac_v6_allmcast)) {</div><div class='ctx'> 			do_tx_balance = 0;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1603,8 +1605,8 @@ void bond_alb_handle_active_change(struct bonding *bond, struct slave *new_slave</div><div class='ctx'> 		struct slave *tmp_slave;</div><div class='ctx'> 		/* find slave that is holding the bond's mac address */</div><div class='ctx'> 		bond_for_each_slave(bond, tmp_slave, i) {</div><div class='del'>-			if (!compare_ether_addr_64bits(tmp_slave-&gt;dev-&gt;dev_addr,</div><div class='del'>-						       bond-&gt;dev-&gt;dev_addr)) {</div><div class='add'>+			if (ether_addr_equal_64bits(tmp_slave-&gt;dev-&gt;dev_addr,</div><div class='add'>+						    bond-&gt;dev-&gt;dev_addr)) {</div><div class='ctx'> 				swap_slave = tmp_slave;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1681,8 +1683,8 @@ int bond_alb_set_mac_address(struct net_device *bond_dev, void *addr)</div><div class='ctx'> 	swap_slave = NULL;</div><div class='ctx'> </div><div class='ctx'> 	bond_for_each_slave(bond, slave, i) {</div><div class='del'>-		if (!compare_ether_addr_64bits(slave-&gt;dev-&gt;dev_addr,</div><div class='del'>-					       bond_dev-&gt;dev_addr)) {</div><div class='add'>+		if (ether_addr_equal_64bits(slave-&gt;dev-&gt;dev_addr,</div><div class='add'>+					    bond_dev-&gt;dev_addr)) {</div><div class='ctx'> 			swap_slave = slave;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c<br/>index 62d2409bb293..2ee8cf9e8a3b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/bonding/bond_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/bonding/bond_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/bonding/bond_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/bonding/bond_main.c</a></div><div class='hunk'>@@ -549,9 +549,9 @@ down:</div><div class='ctx'>  * Get link speed and duplex from the slave's base driver</div><div class='ctx'>  * using ethtool. If for some reason the call fails or the</div><div class='ctx'>  * values are invalid, set speed and duplex to -1,</div><div class='del'>- * and return error.</div><div class='add'>+ * and return.</div><div class='ctx'>  */</div><div class='del'>-static int bond_update_speed_duplex(struct slave *slave)</div><div class='add'>+static void bond_update_speed_duplex(struct slave *slave)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *slave_dev = slave-&gt;dev;</div><div class='ctx'> 	struct ethtool_cmd ecmd;</div><div class='hunk'>@@ -563,24 +563,24 @@ static int bond_update_speed_duplex(struct slave *slave)</div><div class='ctx'> </div><div class='ctx'> 	res = __ethtool_get_settings(slave_dev, &amp;ecmd);</div><div class='ctx'> 	if (res &lt; 0)</div><div class='del'>-		return -1;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	slave_speed = ethtool_cmd_speed(&amp;ecmd);</div><div class='ctx'> 	if (slave_speed == 0 || slave_speed == ((__u32) -1))</div><div class='del'>-		return -1;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	switch (ecmd.duplex) {</div><div class='ctx'> 	case DUPLEX_FULL:</div><div class='ctx'> 	case DUPLEX_HALF:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return -1;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	slave-&gt;speed = slave_speed;</div><div class='ctx'> 	slave-&gt;duplex = ecmd.duplex;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1444,8 +1444,9 @@ static rx_handler_result_t bond_handle_frame(struct sk_buff **pskb)</div><div class='ctx'> 	struct sk_buff *skb = *pskb;</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> 	struct bonding *bond;</div><div class='del'>-	void (*recv_probe)(struct sk_buff *, struct bonding *,</div><div class='add'>+	int (*recv_probe)(struct sk_buff *, struct bonding *,</div><div class='ctx'> 				struct slave *);</div><div class='add'>+	int ret = RX_HANDLER_ANOTHER;</div><div class='ctx'> </div><div class='ctx'> 	skb = skb_share_check(skb, GFP_ATOMIC);</div><div class='ctx'> 	if (unlikely(!skb))</div><div class='hunk'>@@ -1464,8 +1465,12 @@ static rx_handler_result_t bond_handle_frame(struct sk_buff **pskb)</div><div class='ctx'> 		struct sk_buff *nskb = skb_clone(skb, GFP_ATOMIC);</div><div class='ctx'> </div><div class='ctx'> 		if (likely(nskb)) {</div><div class='del'>-			recv_probe(nskb, bond, slave);</div><div class='add'>+			ret = recv_probe(nskb, bond, slave);</div><div class='ctx'> 			dev_kfree_skb(nskb);</div><div class='add'>+			if (ret == RX_HANDLER_CONSUMED) {</div><div class='add'>+				consume_skb(skb);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1487,7 +1492,7 @@ static rx_handler_result_t bond_handle_frame(struct sk_buff **pskb)</div><div class='ctx'> 		memcpy(eth_hdr(skb)-&gt;h_dest, bond-&gt;dev-&gt;dev_addr, ETH_ALEN);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return RX_HANDLER_ANOTHER;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* enslave device &lt;slave&gt; to bond device &lt;master&gt; */</div><div class='hunk'>@@ -1726,7 +1731,8 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> </div><div class='ctx'> 	read_lock(&amp;bond-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	new_slave-&gt;last_arp_rx = jiffies;</div><div class='add'>+	new_slave-&gt;last_arp_rx = jiffies -</div><div class='add'>+		(msecs_to_jiffies(bond-&gt;params.arp_interval) + 1);</div><div class='ctx'> </div><div class='ctx'> 	if (bond-&gt;params.miimon &amp;&amp; !bond-&gt;params.use_carrier) {</div><div class='ctx'> 		link_reporting = bond_check_dev_link(bond, slave_dev, 1);</div><div class='hunk'>@@ -1751,22 +1757,30 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* check for initial state */</div><div class='del'>-	if (!bond-&gt;params.miimon ||</div><div class='del'>-	    (bond_check_dev_link(bond, slave_dev, 0) == BMSR_LSTATUS)) {</div><div class='del'>-		if (bond-&gt;params.updelay) {</div><div class='del'>-			pr_debug("Initial state of slave_dev is BOND_LINK_BACK\n");</div><div class='del'>-			new_slave-&gt;link  = BOND_LINK_BACK;</div><div class='del'>-			new_slave-&gt;delay = bond-&gt;params.updelay;</div><div class='add'>+	if (bond-&gt;params.miimon) {</div><div class='add'>+		if (bond_check_dev_link(bond, slave_dev, 0) == BMSR_LSTATUS) {</div><div class='add'>+			if (bond-&gt;params.updelay) {</div><div class='add'>+				new_slave-&gt;link = BOND_LINK_BACK;</div><div class='add'>+				new_slave-&gt;delay = bond-&gt;params.updelay;</div><div class='add'>+			} else {</div><div class='add'>+				new_slave-&gt;link = BOND_LINK_UP;</div><div class='add'>+			}</div><div class='ctx'> 		} else {</div><div class='del'>-			pr_debug("Initial state of slave_dev is BOND_LINK_UP\n");</div><div class='del'>-			new_slave-&gt;link  = BOND_LINK_UP;</div><div class='add'>+			new_slave-&gt;link = BOND_LINK_DOWN;</div><div class='ctx'> 		}</div><div class='del'>-		new_slave-&gt;jiffies = jiffies;</div><div class='add'>+	} else if (bond-&gt;params.arp_interval) {</div><div class='add'>+		new_slave-&gt;link = (netif_carrier_ok(slave_dev) ?</div><div class='add'>+			BOND_LINK_UP : BOND_LINK_DOWN);</div><div class='ctx'> 	} else {</div><div class='del'>-		pr_debug("Initial state of slave_dev is BOND_LINK_DOWN\n");</div><div class='del'>-		new_slave-&gt;link  = BOND_LINK_DOWN;</div><div class='add'>+		new_slave-&gt;link = BOND_LINK_UP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (new_slave-&gt;link != BOND_LINK_DOWN)</div><div class='add'>+		new_slave-&gt;jiffies = jiffies;</div><div class='add'>+	pr_debug("Initial state of slave_dev is BOND_LINK_%s\n",</div><div class='add'>+		new_slave-&gt;link == BOND_LINK_DOWN ? "DOWN" :</div><div class='add'>+			(new_slave-&gt;link == BOND_LINK_UP ? "UP" : "BACK"));</div><div class='add'>+</div><div class='ctx'> 	bond_update_speed_duplex(new_slave);</div><div class='ctx'> </div><div class='ctx'> 	if (USES_PRIMARY(bond-&gt;params.mode) &amp;&amp; bond-&gt;params.primary[0]) {</div><div class='hunk'>@@ -1952,7 +1966,7 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> 	write_lock_bh(&amp;bond-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (!bond-&gt;params.fail_over_mac) {</div><div class='del'>-		if (!compare_ether_addr(bond_dev-&gt;dev_addr, slave-&gt;perm_hwaddr) &amp;&amp;</div><div class='add'>+		if (ether_addr_equal(bond_dev-&gt;dev_addr, slave-&gt;perm_hwaddr) &amp;&amp;</div><div class='ctx'> 		    bond-&gt;slave_cnt &gt; 1)</div><div class='ctx'> 			pr_warning("%s: Warning: the permanent HWaddr of %s - %pM - is still in use by %s. Set the HWaddr of %s to a different address to avoid conflicts.\n",</div><div class='ctx'> 				   bond_dev-&gt;name, slave_dev-&gt;name,</div><div class='hunk'>@@ -2723,7 +2737,7 @@ static void bond_validate_arp(struct bonding *bond, struct slave *slave, __be32</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bond_arp_rcv(struct sk_buff *skb, struct bonding *bond,</div><div class='add'>+static int bond_arp_rcv(struct sk_buff *skb, struct bonding *bond,</div><div class='ctx'> 			 struct slave *slave)</div><div class='ctx'> {</div><div class='ctx'> 	struct arphdr *arp;</div><div class='hunk'>@@ -2731,7 +2745,7 @@ static void bond_arp_rcv(struct sk_buff *skb, struct bonding *bond,</div><div class='ctx'> 	__be32 sip, tip;</div><div class='ctx'> </div><div class='ctx'> 	if (skb-&gt;protocol != __cpu_to_be16(ETH_P_ARP))</div><div class='del'>-		return;</div><div class='add'>+		return RX_HANDLER_ANOTHER;</div><div class='ctx'> </div><div class='ctx'> 	read_lock(&amp;bond-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -2776,6 +2790,7 @@ static void bond_arp_rcv(struct sk_buff *skb, struct bonding *bond,</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='ctx'> 	read_unlock(&amp;bond-&gt;lock);</div><div class='add'>+	return RX_HANDLER_ANOTHER;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -4820,12 +4835,9 @@ static int bond_validate(struct nlattr *tb[], struct nlattr *data[])</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bond_get_tx_queues(struct net *net, struct nlattr *tb[],</div><div class='del'>-			      unsigned int *num_queues,</div><div class='del'>-			      unsigned int *real_num_queues)</div><div class='add'>+static int bond_get_tx_queues(struct net *net, struct nlattr *tb[])</div><div class='ctx'> {</div><div class='del'>-	*num_queues = tx_queues;</div><div class='del'>-	return 0;</div><div class='add'>+	return tx_queues;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct rtnl_link_ops bond_link_ops __read_mostly = {</div><div class='head'>diff --git a/drivers/net/bonding/bonding.h b/drivers/net/bonding/bonding.h<br/>index 9f2bae6616d3..4581aa5ccaba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/bonding/bonding.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/bonding/bonding.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/bonding/bonding.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/bonding/bonding.h</a></div><div class='hunk'>@@ -218,7 +218,7 @@ struct bonding {</div><div class='ctx'> 	struct   slave *primary_slave;</div><div class='ctx'> 	bool     force_primary;</div><div class='ctx'> 	s32      slave_cnt; /* never change this value outside the attach/detach wrappers */</div><div class='del'>-	void     (*recv_probe)(struct sk_buff *, struct bonding *,</div><div class='add'>+	int     (*recv_probe)(struct sk_buff *, struct bonding *,</div><div class='ctx'> 			       struct slave *);</div><div class='ctx'> 	rwlock_t lock;</div><div class='ctx'> 	rwlock_t curr_slave_lock;</div><div class='head'>diff --git a/drivers/net/caif/caif_hsi.c b/drivers/net/caif/caif_hsi.c<br/>index 9c1c8cd5223f..1520814c77c7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/caif/caif_hsi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/caif/caif_hsi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/caif/caif_hsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/caif/caif_hsi.c</a></div><div class='hunk'>@@ -6,6 +6,8 @@</div><div class='ctx'>  * License terms: GNU General Public License (GPL) version 2.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='hunk'>@@ -19,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/if_arp.h&gt;</div><div class='ctx'> #include &lt;linux/timer.h&gt;</div><div class='ctx'> #include &lt;linux/rtnetlink.h&gt;</div><div class='add'>+#include &lt;linux/pkt_sched.h&gt;</div><div class='ctx'> #include &lt;net/caif/caif_layer.h&gt;</div><div class='ctx'> #include &lt;net/caif/caif_hsi.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -34,6 +37,10 @@ static int inactivity_timeout = 1000;</div><div class='ctx'> module_param(inactivity_timeout, int, S_IRUGO | S_IWUSR);</div><div class='ctx'> MODULE_PARM_DESC(inactivity_timeout, "Inactivity timeout on HSI, ms.");</div><div class='ctx'> </div><div class='add'>+static int aggregation_timeout = 1;</div><div class='add'>+module_param(aggregation_timeout, int, S_IRUGO | S_IWUSR);</div><div class='add'>+MODULE_PARM_DESC(aggregation_timeout, "Aggregation timeout on HSI, ms.");</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * HSI padding options.</div><div class='ctx'>  * Warning: must be a base of 2 (&amp; operation used) and can not be zero !</div><div class='hunk'>@@ -86,24 +93,84 @@ static void cfhsi_inactivity_tout(unsigned long arg)</div><div class='ctx'> 		queue_work(cfhsi-&gt;wq, &amp;cfhsi-&gt;wake_down_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void cfhsi_update_aggregation_stats(struct cfhsi *cfhsi,</div><div class='add'>+					   const struct sk_buff *skb,</div><div class='add'>+					   int direction)</div><div class='add'>+{</div><div class='add'>+	struct caif_payload_info *info;</div><div class='add'>+	int hpad, tpad, len;</div><div class='add'>+</div><div class='add'>+	info = (struct caif_payload_info *)&amp;skb-&gt;cb;</div><div class='add'>+	hpad = 1 + PAD_POW2((info-&gt;hdr_len + 1), hsi_head_align);</div><div class='add'>+	tpad = PAD_POW2((skb-&gt;len + hpad), hsi_tail_align);</div><div class='add'>+	len = skb-&gt;len + hpad + tpad;</div><div class='add'>+</div><div class='add'>+	if (direction &gt; 0)</div><div class='add'>+		cfhsi-&gt;aggregation_len += len;</div><div class='add'>+	else if (direction &lt; 0)</div><div class='add'>+		cfhsi-&gt;aggregation_len -= len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool cfhsi_can_send_aggregate(struct cfhsi *cfhsi)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (cfhsi-&gt;aggregation_timeout &lt; 0)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; CFHSI_PRIO_BEBK; ++i) {</div><div class='add'>+		if (cfhsi-&gt;qhead[i].qlen)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* TODO: Use aggregation_len instead */</div><div class='add'>+	if (cfhsi-&gt;qhead[CFHSI_PRIO_BEBK].qlen &gt;= CFHSI_MAX_PKTS)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *cfhsi_dequeue(struct cfhsi *cfhsi)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; CFHSI_PRIO_LAST; ++i) {</div><div class='add'>+		skb = skb_dequeue(&amp;cfhsi-&gt;qhead[i]);</div><div class='add'>+		if (skb)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cfhsi_tx_queue_len(struct cfhsi *cfhsi)</div><div class='add'>+{</div><div class='add'>+	int i, len = 0;</div><div class='add'>+	for (i = 0; i &lt; CFHSI_PRIO_LAST; ++i)</div><div class='add'>+		len += skb_queue_len(&amp;cfhsi-&gt;qhead[i]);</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void cfhsi_abort_tx(struct cfhsi *cfhsi)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='ctx'> 	for (;;) {</div><div class='ctx'> 		spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-		skb = skb_dequeue(&amp;cfhsi-&gt;qhead);</div><div class='add'>+		skb = cfhsi_dequeue(cfhsi);</div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		cfhsi-&gt;ndev-&gt;stats.tx_errors++;</div><div class='ctx'> 		cfhsi-&gt;ndev-&gt;stats.tx_dropped++;</div><div class='add'>+		cfhsi_update_aggregation_stats(cfhsi, skb, -1);</div><div class='ctx'> 		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='ctx'> 		kfree_skb(skb);</div><div class='ctx'> 	}</div><div class='ctx'> 	cfhsi-&gt;tx_state = CFHSI_TX_STATE_IDLE;</div><div class='ctx'> 	if (!test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='del'>-		mod_timer(&amp;cfhsi-&gt;timer,</div><div class='add'>+		mod_timer(&amp;cfhsi-&gt;inactivity_timer,</div><div class='ctx'> 			jiffies + cfhsi-&gt;inactivity_timeout);</div><div class='ctx'> 	spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='ctx'> }</div><div class='hunk'>@@ -169,7 +236,7 @@ static int cfhsi_tx_frm(struct cfhsi_desc *desc, struct cfhsi *cfhsi)</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	u8 *pfrm = desc-&gt;emb_frm + CFHSI_MAX_EMB_FRM_SZ;</div><div class='ctx'> </div><div class='del'>-	skb = skb_dequeue(&amp;cfhsi-&gt;qhead);</div><div class='add'>+	skb = cfhsi_dequeue(cfhsi);</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -196,11 +263,16 @@ static int cfhsi_tx_frm(struct cfhsi_desc *desc, struct cfhsi *cfhsi)</div><div class='ctx'> 			pemb += hpad;</div><div class='ctx'> </div><div class='ctx'> 			/* Update network statistics. */</div><div class='add'>+			spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='ctx'> 			cfhsi-&gt;ndev-&gt;stats.tx_packets++;</div><div class='ctx'> 			cfhsi-&gt;ndev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='add'>+			cfhsi_update_aggregation_stats(cfhsi, skb, -1);</div><div class='add'>+			spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 			/* Copy in embedded CAIF frame. */</div><div class='ctx'> 			skb_copy_bits(skb, 0, pemb, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+			/* Consume the SKB */</div><div class='ctx'> 			consume_skb(skb);</div><div class='ctx'> 			skb = NULL;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -214,7 +286,7 @@ static int cfhsi_tx_frm(struct cfhsi_desc *desc, struct cfhsi *cfhsi)</div><div class='ctx'> 		int tpad = 0;</div><div class='ctx'> </div><div class='ctx'> 		if (!skb)</div><div class='del'>-			skb = skb_dequeue(&amp;cfhsi-&gt;qhead);</div><div class='add'>+			skb = cfhsi_dequeue(cfhsi);</div><div class='ctx'> </div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -233,8 +305,11 @@ static int cfhsi_tx_frm(struct cfhsi_desc *desc, struct cfhsi *cfhsi)</div><div class='ctx'> 		pfrm += hpad;</div><div class='ctx'> </div><div class='ctx'> 		/* Update network statistics. */</div><div class='add'>+		spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='ctx'> 		cfhsi-&gt;ndev-&gt;stats.tx_packets++;</div><div class='ctx'> 		cfhsi-&gt;ndev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='add'>+		cfhsi_update_aggregation_stats(cfhsi, skb, -1);</div><div class='add'>+		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 		/* Copy in CAIF frame. */</div><div class='ctx'> 		skb_copy_bits(skb, 0, pfrm, skb-&gt;len);</div><div class='hunk'>@@ -244,6 +319,8 @@ static int cfhsi_tx_frm(struct cfhsi_desc *desc, struct cfhsi *cfhsi)</div><div class='ctx'> </div><div class='ctx'> 		/* Update frame pointer. */</div><div class='ctx'> 		pfrm += skb-&gt;len + tpad;</div><div class='add'>+</div><div class='add'>+		/* Consume the SKB */</div><div class='ctx'> 		consume_skb(skb);</div><div class='ctx'> 		skb = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -258,8 +335,7 @@ static int cfhsi_tx_frm(struct cfhsi_desc *desc, struct cfhsi *cfhsi)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check if we can piggy-back another descriptor. */</div><div class='del'>-	skb = skb_peek(&amp;cfhsi-&gt;qhead);</div><div class='del'>-	if (skb)</div><div class='add'>+	if (cfhsi_can_send_aggregate(cfhsi))</div><div class='ctx'> 		desc-&gt;header |= CFHSI_PIGGY_DESC;</div><div class='ctx'> 	else</div><div class='ctx'> 		desc-&gt;header &amp;= ~CFHSI_PIGGY_DESC;</div><div class='hunk'>@@ -267,61 +343,71 @@ static int cfhsi_tx_frm(struct cfhsi_desc *desc, struct cfhsi *cfhsi)</div><div class='ctx'> 	return CFHSI_DESC_SZ + pld_len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cfhsi_tx_done(struct cfhsi *cfhsi)</div><div class='add'>+static void cfhsi_start_tx(struct cfhsi *cfhsi)</div><div class='ctx'> {</div><div class='del'>-	struct cfhsi_desc *desc = NULL;</div><div class='del'>-	int len = 0;</div><div class='del'>-	int res;</div><div class='add'>+	struct cfhsi_desc *desc = (struct cfhsi_desc *)cfhsi-&gt;tx_buf;</div><div class='add'>+	int len, res;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;cfhsi-&gt;ndev-&gt;dev, "%s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	desc = (struct cfhsi_desc *)cfhsi-&gt;tx_buf;</div><div class='del'>-</div><div class='ctx'> 	do {</div><div class='del'>-		/*</div><div class='del'>-		 * Send flow on if flow off has been previously signalled</div><div class='del'>-		 * and number of packets is below low water mark.</div><div class='del'>-		 */</div><div class='del'>-		spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-		if (cfhsi-&gt;flow_off_sent &amp;&amp;</div><div class='del'>-				cfhsi-&gt;qhead.qlen &lt;= cfhsi-&gt;q_low_mark &amp;&amp;</div><div class='del'>-				cfhsi-&gt;cfdev.flowctrl) {</div><div class='del'>-</div><div class='del'>-			cfhsi-&gt;flow_off_sent = 0;</div><div class='del'>-			cfhsi-&gt;cfdev.flowctrl(cfhsi-&gt;ndev, ON);</div><div class='del'>-		}</div><div class='del'>-		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-</div><div class='ctx'> 		/* Create HSI frame. */</div><div class='del'>-		do {</div><div class='del'>-			len = cfhsi_tx_frm(desc, cfhsi);</div><div class='del'>-			if (!len) {</div><div class='del'>-				spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-				if (unlikely(skb_peek(&amp;cfhsi-&gt;qhead))) {</div><div class='del'>-					spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-					continue;</div><div class='del'>-				}</div><div class='del'>-				cfhsi-&gt;tx_state = CFHSI_TX_STATE_IDLE;</div><div class='del'>-				/* Start inactivity timer. */</div><div class='del'>-				mod_timer(&amp;cfhsi-&gt;timer,</div><div class='del'>-					jiffies + cfhsi-&gt;inactivity_timeout);</div><div class='add'>+		len = cfhsi_tx_frm(desc, cfhsi);</div><div class='add'>+		if (!len) {</div><div class='add'>+			spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='add'>+			if (unlikely(cfhsi_tx_queue_len(cfhsi))) {</div><div class='ctx'> 				spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-				goto done;</div><div class='add'>+				res = -EAGAIN;</div><div class='add'>+				continue;</div><div class='ctx'> 			}</div><div class='del'>-		} while (!len);</div><div class='add'>+			cfhsi-&gt;tx_state = CFHSI_TX_STATE_IDLE;</div><div class='add'>+			/* Start inactivity timer. */</div><div class='add'>+			mod_timer(&amp;cfhsi-&gt;inactivity_timer,</div><div class='add'>+				jiffies + cfhsi-&gt;inactivity_timeout);</div><div class='add'>+			spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* Set up new transfer. */</div><div class='ctx'> 		res = cfhsi-&gt;dev-&gt;cfhsi_tx(cfhsi-&gt;tx_buf, len, cfhsi-&gt;dev);</div><div class='del'>-		if (WARN_ON(res &lt; 0)) {</div><div class='add'>+		if (WARN_ON(res &lt; 0))</div><div class='ctx'> 			dev_err(&amp;cfhsi-&gt;ndev-&gt;dev, "%s: TX error %d.\n",</div><div class='ctx'> 				__func__, res);</div><div class='del'>-		}</div><div class='ctx'> 	} while (res &lt; 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cfhsi_tx_done(struct cfhsi *cfhsi)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(&amp;cfhsi-&gt;ndev-&gt;dev, "%s.\n", __func__);</div><div class='add'>+</div><div class='add'>+	if (test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Send flow on if flow off has been previously signalled</div><div class='add'>+	 * and number of packets is below low water mark.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='add'>+	if (cfhsi-&gt;flow_off_sent &amp;&amp;</div><div class='add'>+			cfhsi_tx_queue_len(cfhsi) &lt;= cfhsi-&gt;q_low_mark &amp;&amp;</div><div class='add'>+			cfhsi-&gt;cfdev.flowctrl) {</div><div class='add'>+</div><div class='add'>+		cfhsi-&gt;flow_off_sent = 0;</div><div class='add'>+		cfhsi-&gt;cfdev.flowctrl(cfhsi-&gt;ndev, ON);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cfhsi_can_send_aggregate(cfhsi)) {</div><div class='add'>+		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='add'>+		cfhsi_start_tx(cfhsi);</div><div class='add'>+	} else {</div><div class='add'>+		mod_timer(&amp;cfhsi-&gt;aggregation_timer,</div><div class='add'>+			jiffies + cfhsi-&gt;aggregation_timeout);</div><div class='add'>+		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-done:</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -560,7 +646,7 @@ static void cfhsi_rx_done(struct cfhsi *cfhsi)</div><div class='ctx'> </div><div class='ctx'> 	/* Update inactivity timer if pending. */</div><div class='ctx'> 	spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-	mod_timer_pending(&amp;cfhsi-&gt;timer,</div><div class='add'>+	mod_timer_pending(&amp;cfhsi-&gt;inactivity_timer,</div><div class='ctx'> 			jiffies + cfhsi-&gt;inactivity_timeout);</div><div class='ctx'> 	spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -793,12 +879,12 @@ wake_ack:</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	/* Resume transmit if queue is not empty. */</div><div class='del'>-	if (!skb_peek(&amp;cfhsi-&gt;qhead)) {</div><div class='add'>+	/* Resume transmit if queues are not empty. */</div><div class='add'>+	if (!cfhsi_tx_queue_len(cfhsi)) {</div><div class='ctx'> 		dev_dbg(&amp;cfhsi-&gt;ndev-&gt;dev, "%s: Peer wake, start timer.\n",</div><div class='ctx'> 			__func__);</div><div class='ctx'> 		/* Start inactivity timer. */</div><div class='del'>-		mod_timer(&amp;cfhsi-&gt;timer,</div><div class='add'>+		mod_timer(&amp;cfhsi-&gt;inactivity_timer,</div><div class='ctx'> 				jiffies + cfhsi-&gt;inactivity_timeout);</div><div class='ctx'> 		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -934,20 +1020,53 @@ static void cfhsi_wake_down_cb(struct cfhsi_drv *drv)</div><div class='ctx'> 	wake_up_interruptible(&amp;cfhsi-&gt;wake_down_wait);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void cfhsi_aggregation_tout(unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	struct cfhsi *cfhsi = (struct cfhsi *)arg;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;cfhsi-&gt;ndev-&gt;dev, "%s.\n",</div><div class='add'>+		__func__);</div><div class='add'>+</div><div class='add'>+	cfhsi_start_tx(cfhsi);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int cfhsi_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct cfhsi *cfhsi = NULL;</div><div class='ctx'> 	int start_xfer = 0;</div><div class='ctx'> 	int timer_active;</div><div class='add'>+	int prio;</div><div class='ctx'> </div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	cfhsi = netdev_priv(dev);</div><div class='ctx'> </div><div class='add'>+	switch (skb-&gt;priority) {</div><div class='add'>+	case TC_PRIO_BESTEFFORT:</div><div class='add'>+	case TC_PRIO_FILLER:</div><div class='add'>+	case TC_PRIO_BULK:</div><div class='add'>+		prio = CFHSI_PRIO_BEBK;</div><div class='add'>+		break;</div><div class='add'>+	case TC_PRIO_INTERACTIVE_BULK:</div><div class='add'>+		prio = CFHSI_PRIO_VI;</div><div class='add'>+		break;</div><div class='add'>+	case TC_PRIO_INTERACTIVE:</div><div class='add'>+		prio = CFHSI_PRIO_VO;</div><div class='add'>+		break;</div><div class='add'>+	case TC_PRIO_CONTROL:</div><div class='add'>+	default:</div><div class='add'>+		prio = CFHSI_PRIO_CTL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	skb_queue_tail(&amp;cfhsi-&gt;qhead, skb);</div><div class='add'>+	/* Update aggregation statistics  */</div><div class='add'>+	cfhsi_update_aggregation_stats(cfhsi, skb, 1);</div><div class='add'>+</div><div class='add'>+	/* Queue the SKB */</div><div class='add'>+	skb_queue_tail(&amp;cfhsi-&gt;qhead[prio], skb);</div><div class='ctx'> </div><div class='ctx'> 	/* Sanity check; xmit should not be called after unregister_netdev */</div><div class='ctx'> 	if (WARN_ON(test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))) {</div><div class='hunk'>@@ -958,7 +1077,7 @@ static int cfhsi_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Send flow off if number of packets is above high water mark. */</div><div class='ctx'> 	if (!cfhsi-&gt;flow_off_sent &amp;&amp;</div><div class='del'>-		cfhsi-&gt;qhead.qlen &gt; cfhsi-&gt;q_high_mark &amp;&amp;</div><div class='add'>+		cfhsi_tx_queue_len(cfhsi) &gt; cfhsi-&gt;q_high_mark &amp;&amp;</div><div class='ctx'> 		cfhsi-&gt;cfdev.flowctrl) {</div><div class='ctx'> 		cfhsi-&gt;flow_off_sent = 1;</div><div class='ctx'> 		cfhsi-&gt;cfdev.flowctrl(cfhsi-&gt;ndev, OFF);</div><div class='hunk'>@@ -970,12 +1089,18 @@ static int cfhsi_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!start_xfer) {</div><div class='add'>+		/* Send aggregate if it is possible */</div><div class='add'>+		bool aggregate_ready =</div><div class='add'>+			cfhsi_can_send_aggregate(cfhsi) &amp;&amp;</div><div class='add'>+			del_timer(&amp;cfhsi-&gt;aggregation_timer) &gt; 0;</div><div class='ctx'> 		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='add'>+		if (aggregate_ready)</div><div class='add'>+			cfhsi_start_tx(cfhsi);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Delete inactivity timer if started. */</div><div class='del'>-	timer_active = del_timer_sync(&amp;cfhsi-&gt;timer);</div><div class='add'>+	timer_active = del_timer_sync(&amp;cfhsi-&gt;inactivity_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1004,28 +1129,11 @@ static int cfhsi_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cfhsi_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfhsi_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops cfhsi_ops = {</div><div class='del'>-	.ndo_open = cfhsi_open,</div><div class='del'>-	.ndo_stop = cfhsi_close,</div><div class='del'>-	.ndo_start_xmit = cfhsi_xmit</div><div class='del'>-};</div><div class='add'>+static const struct net_device_ops cfhsi_ops;</div><div class='ctx'> </div><div class='ctx'> static void cfhsi_setup(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	int i;</div><div class='ctx'> 	struct cfhsi *cfhsi = netdev_priv(dev);</div><div class='ctx'> 	dev-&gt;features = 0;</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;cfhsi_ops;</div><div class='hunk'>@@ -1034,7 +1142,8 @@ static void cfhsi_setup(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;mtu = CFHSI_MAX_CAIF_FRAME_SZ;</div><div class='ctx'> 	dev-&gt;tx_queue_len = 0;</div><div class='ctx'> 	dev-&gt;destructor = free_netdev;</div><div class='del'>-	skb_queue_head_init(&amp;cfhsi-&gt;qhead);</div><div class='add'>+	for (i = 0; i &lt; CFHSI_PRIO_LAST; ++i)</div><div class='add'>+		skb_queue_head_init(&amp;cfhsi-&gt;qhead[i]);</div><div class='ctx'> 	cfhsi-&gt;cfdev.link_select = CAIF_LINK_HIGH_BANDW;</div><div class='ctx'> 	cfhsi-&gt;cfdev.use_frag = false;</div><div class='ctx'> 	cfhsi-&gt;cfdev.use_stx = false;</div><div class='hunk'>@@ -1046,7 +1155,7 @@ int cfhsi_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct cfhsi *cfhsi = NULL;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='del'>-	struct cfhsi_dev *dev;</div><div class='add'>+</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='ctx'> 	ndev = alloc_netdev(sizeof(struct cfhsi), "cfhsi%d", cfhsi_setup);</div><div class='hunk'>@@ -1057,6 +1166,34 @@ int cfhsi_probe(struct platform_device *pdev)</div><div class='ctx'> 	cfhsi-&gt;ndev = ndev;</div><div class='ctx'> 	cfhsi-&gt;pdev = pdev;</div><div class='ctx'> </div><div class='add'>+	/* Assign the HSI device. */</div><div class='add'>+	cfhsi-&gt;dev = pdev-&gt;dev.platform_data;</div><div class='add'>+</div><div class='add'>+	/* Assign the driver to this HSI device. */</div><div class='add'>+	cfhsi-&gt;dev-&gt;drv = &amp;cfhsi-&gt;drv;</div><div class='add'>+</div><div class='add'>+	/* Register network device. */</div><div class='add'>+	res = register_netdev(ndev);</div><div class='add'>+	if (res) {</div><div class='add'>+		dev_err(&amp;ndev-&gt;dev, "%s: Registration error: %d.\n",</div><div class='add'>+			__func__, res);</div><div class='add'>+		free_netdev(ndev);</div><div class='add'>+	}</div><div class='add'>+	/* Add CAIF HSI device to list. */</div><div class='add'>+	spin_lock(&amp;cfhsi_list_lock);</div><div class='add'>+	list_add_tail(&amp;cfhsi-&gt;list, &amp;cfhsi_list);</div><div class='add'>+	spin_unlock(&amp;cfhsi_list_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cfhsi_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct cfhsi *cfhsi = netdev_priv(ndev);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	clear_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits);</div><div class='add'>+</div><div class='ctx'> 	/* Initialize state vaiables. */</div><div class='ctx'> 	cfhsi-&gt;tx_state = CFHSI_TX_STATE_IDLE;</div><div class='ctx'> 	cfhsi-&gt;rx_state.state = CFHSI_RX_STATE_DESC;</div><div class='hunk'>@@ -1066,12 +1203,6 @@ int cfhsi_probe(struct platform_device *pdev)</div><div class='ctx'> 	cfhsi-&gt;q_low_mark = LOW_WATER_MARK;</div><div class='ctx'> 	cfhsi-&gt;q_high_mark = HIGH_WATER_MARK;</div><div class='ctx'> </div><div class='del'>-	/* Assign the HSI device. */</div><div class='del'>-	dev = (struct cfhsi_dev *)pdev-&gt;dev.platform_data;</div><div class='del'>-	cfhsi-&gt;dev = dev;</div><div class='del'>-</div><div class='del'>-	/* Assign the driver to this HSI device. */</div><div class='del'>-	dev-&gt;drv = &amp;cfhsi-&gt;drv;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Allocate a TX buffer with the size of a HSI packet descriptors</div><div class='hunk'>@@ -1111,6 +1242,9 @@ int cfhsi_probe(struct platform_device *pdev)</div><div class='ctx'> 		cfhsi-&gt;inactivity_timeout = NEXT_TIMER_MAX_DELTA;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Initialize aggregation timeout */</div><div class='add'>+	cfhsi-&gt;aggregation_timeout = aggregation_timeout;</div><div class='add'>+</div><div class='ctx'> 	/* Initialize recieve vaiables. */</div><div class='ctx'> 	cfhsi-&gt;rx_ptr = cfhsi-&gt;rx_buf;</div><div class='ctx'> 	cfhsi-&gt;rx_len = CFHSI_DESC_SZ;</div><div class='hunk'>@@ -1136,9 +1270,9 @@ int cfhsi_probe(struct platform_device *pdev)</div><div class='ctx'> 	clear_bit(CFHSI_AWAKE, &amp;cfhsi-&gt;bits);</div><div class='ctx'> </div><div class='ctx'> 	/* Create work thread. */</div><div class='del'>-	cfhsi-&gt;wq = create_singlethread_workqueue(pdev-&gt;name);</div><div class='add'>+	cfhsi-&gt;wq = create_singlethread_workqueue(cfhsi-&gt;pdev-&gt;name);</div><div class='ctx'> 	if (!cfhsi-&gt;wq) {</div><div class='del'>-		dev_err(&amp;ndev-&gt;dev, "%s: Failed to create work queue.\n",</div><div class='add'>+		dev_err(&amp;cfhsi-&gt;ndev-&gt;dev, "%s: Failed to create work queue.\n",</div><div class='ctx'> 			__func__);</div><div class='ctx'> 		res = -ENODEV;</div><div class='ctx'> 		goto err_create_wq;</div><div class='hunk'>@@ -1150,18 +1284,17 @@ int cfhsi_probe(struct platform_device *pdev)</div><div class='ctx'> 	init_waitqueue_head(&amp;cfhsi-&gt;flush_fifo_wait);</div><div class='ctx'> </div><div class='ctx'> 	/* Setup the inactivity timer. */</div><div class='del'>-	init_timer(&amp;cfhsi-&gt;timer);</div><div class='del'>-	cfhsi-&gt;timer.data = (unsigned long)cfhsi;</div><div class='del'>-	cfhsi-&gt;timer.function = cfhsi_inactivity_tout;</div><div class='add'>+	init_timer(&amp;cfhsi-&gt;inactivity_timer);</div><div class='add'>+	cfhsi-&gt;inactivity_timer.data = (unsigned long)cfhsi;</div><div class='add'>+	cfhsi-&gt;inactivity_timer.function = cfhsi_inactivity_tout;</div><div class='ctx'> 	/* Setup the slowpath RX timer. */</div><div class='ctx'> 	init_timer(&amp;cfhsi-&gt;rx_slowpath_timer);</div><div class='ctx'> 	cfhsi-&gt;rx_slowpath_timer.data = (unsigned long)cfhsi;</div><div class='ctx'> 	cfhsi-&gt;rx_slowpath_timer.function = cfhsi_rx_slowpath;</div><div class='del'>-</div><div class='del'>-	/* Add CAIF HSI device to list. */</div><div class='del'>-	spin_lock(&amp;cfhsi_list_lock);</div><div class='del'>-	list_add_tail(&amp;cfhsi-&gt;list, &amp;cfhsi_list);</div><div class='del'>-	spin_unlock(&amp;cfhsi_list_lock);</div><div class='add'>+	/* Setup the aggregation timer. */</div><div class='add'>+	init_timer(&amp;cfhsi-&gt;aggregation_timer);</div><div class='add'>+	cfhsi-&gt;aggregation_timer.data = (unsigned long)cfhsi;</div><div class='add'>+	cfhsi-&gt;aggregation_timer.function = cfhsi_aggregation_tout;</div><div class='ctx'> </div><div class='ctx'> 	/* Activate HSI interface. */</div><div class='ctx'> 	res = cfhsi-&gt;dev-&gt;cfhsi_up(cfhsi-&gt;dev);</div><div class='hunk'>@@ -1175,21 +1308,10 @@ int cfhsi_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* Flush FIFO */</div><div class='ctx'> 	res = cfhsi_flush_fifo(cfhsi);</div><div class='ctx'> 	if (res) {</div><div class='del'>-		dev_err(&amp;ndev-&gt;dev, "%s: Can't flush FIFO: %d.\n",</div><div class='add'>+		dev_err(&amp;cfhsi-&gt;ndev-&gt;dev, "%s: Can't flush FIFO: %d.\n",</div><div class='ctx'> 			__func__, res);</div><div class='ctx'> 		goto err_net_reg;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	/* Register network device. */</div><div class='del'>-	res = register_netdev(ndev);</div><div class='del'>-	if (res) {</div><div class='del'>-		dev_err(&amp;ndev-&gt;dev, "%s: Registration error: %d.\n",</div><div class='del'>-			__func__, res);</div><div class='del'>-		goto err_net_reg;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(ndev);</div><div class='del'>-</div><div class='ctx'> 	return res;</div><div class='ctx'> </div><div class='ctx'>  err_net_reg:</div><div class='hunk'>@@ -1203,18 +1325,14 @@ int cfhsi_probe(struct platform_device *pdev)</div><div class='ctx'>  err_alloc_rx:</div><div class='ctx'> 	kfree(cfhsi-&gt;tx_buf);</div><div class='ctx'>  err_alloc_tx:</div><div class='del'>-	free_netdev(ndev);</div><div class='del'>-</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cfhsi_shutdown(struct cfhsi *cfhsi)</div><div class='add'>+static int cfhsi_close(struct net_device *ndev)</div><div class='ctx'> {</div><div class='add'>+	struct cfhsi *cfhsi = netdev_priv(ndev);</div><div class='ctx'> 	u8 *tx_buf, *rx_buf, *flip_buf;</div><div class='ctx'> </div><div class='del'>-	/* Stop TXing */</div><div class='del'>-	netif_tx_stop_all_queues(cfhsi-&gt;ndev);</div><div class='del'>-</div><div class='ctx'> 	/* going to shutdown driver */</div><div class='ctx'> 	set_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits);</div><div class='ctx'> </div><div class='hunk'>@@ -1222,8 +1340,9 @@ static void cfhsi_shutdown(struct cfhsi *cfhsi)</div><div class='ctx'> 	flush_workqueue(cfhsi-&gt;wq);</div><div class='ctx'> </div><div class='ctx'> 	/* Delete timers if pending */</div><div class='del'>-	del_timer_sync(&amp;cfhsi-&gt;timer);</div><div class='add'>+	del_timer_sync(&amp;cfhsi-&gt;inactivity_timer);</div><div class='ctx'> 	del_timer_sync(&amp;cfhsi-&gt;rx_slowpath_timer);</div><div class='add'>+	del_timer_sync(&amp;cfhsi-&gt;aggregation_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Cancel pending RX request (if any) */</div><div class='ctx'> 	cfhsi-&gt;dev-&gt;cfhsi_rx_cancel(cfhsi-&gt;dev);</div><div class='hunk'>@@ -1241,15 +1360,19 @@ static void cfhsi_shutdown(struct cfhsi *cfhsi)</div><div class='ctx'> 	/* Deactivate interface */</div><div class='ctx'> 	cfhsi-&gt;dev-&gt;cfhsi_down(cfhsi-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	/* Finally unregister the network device. */</div><div class='del'>-	unregister_netdev(cfhsi-&gt;ndev);</div><div class='del'>-</div><div class='ctx'> 	/* Free buffers. */</div><div class='ctx'> 	kfree(tx_buf);</div><div class='ctx'> 	kfree(rx_buf);</div><div class='ctx'> 	kfree(flip_buf);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct net_device_ops cfhsi_ops = {</div><div class='add'>+	.ndo_open = cfhsi_open,</div><div class='add'>+	.ndo_stop = cfhsi_close,</div><div class='add'>+	.ndo_start_xmit = cfhsi_xmit</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int cfhsi_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct list_head *list_node;</div><div class='hunk'>@@ -1266,10 +1389,6 @@ int cfhsi_remove(struct platform_device *pdev)</div><div class='ctx'> 			/* Remove from list. */</div><div class='ctx'> 			list_del(list_node);</div><div class='ctx'> 			spin_unlock(&amp;cfhsi_list_lock);</div><div class='del'>-</div><div class='del'>-			/* Shutdown driver. */</div><div class='del'>-			cfhsi_shutdown(cfhsi);</div><div class='del'>-</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1300,8 +1419,7 @@ static void __exit cfhsi_exit_module(void)</div><div class='ctx'> 		list_del(list_node);</div><div class='ctx'> 		spin_unlock(&amp;cfhsi_list_lock);</div><div class='ctx'> </div><div class='del'>-		/* Shutdown driver. */</div><div class='del'>-		cfhsi_shutdown(cfhsi);</div><div class='add'>+		unregister_netdevice(cfhsi-&gt;ndev);</div><div class='ctx'> </div><div class='ctx'> 		spin_lock(&amp;cfhsi_list_lock);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1326,8 +1444,6 @@ static int __init cfhsi_init_module(void)</div><div class='ctx'> 		goto err_dev_register;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return result;</div><div class='del'>-</div><div class='ctx'>  err_dev_register:</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/caif/caif_shmcore.c b/drivers/net/caif/caif_shmcore.c<br/>index 5b2041319a32..bc497d718858 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/caif/caif_shmcore.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/caif/caif_shmcore.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/caif/caif_shmcore.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/caif/caif_shmcore.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/if_arp.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/caif/caif_device.h&gt;</div><div class='ctx'> #include &lt;net/caif/caif_shm.h&gt;</div><div class='hunk'>@@ -647,6 +648,9 @@ int caif_shmcore_probe(struct shmdev_layer *pshm_dev)</div><div class='ctx'> 		if (pshm_dev-&gt;shm_loopback)</div><div class='ctx'> 			tx_buf-&gt;desc_vptr = (unsigned char *)tx_buf-&gt;phy_addr;</div><div class='ctx'> 		else</div><div class='add'>+			/*</div><div class='add'>+			 * FIXME: the result of ioremap is not a pointer - arnd</div><div class='add'>+			 */</div><div class='ctx'> 			tx_buf-&gt;desc_vptr =</div><div class='ctx'> 					ioremap(tx_buf-&gt;phy_addr, TX_BUF_SZ);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c<br/>index c5fe3a3db8c9..f03d7a481a80 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/can/dev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/can/dev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/can/dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/dev.c</a></div><div class='hunk'>@@ -687,18 +687,19 @@ static int can_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;do_get_state)</div><div class='ctx'> 		priv-&gt;do_get_state(dev, &amp;state);</div><div class='del'>-	NLA_PUT_U32(skb, IFLA_CAN_STATE, state);</div><div class='del'>-	NLA_PUT(skb, IFLA_CAN_CTRLMODE, sizeof(cm), &amp;cm);</div><div class='del'>-	NLA_PUT_U32(skb, IFLA_CAN_RESTART_MS, priv-&gt;restart_ms);</div><div class='del'>-	NLA_PUT(skb, IFLA_CAN_BITTIMING,</div><div class='del'>-		sizeof(priv-&gt;bittiming), &amp;priv-&gt;bittiming);</div><div class='del'>-	NLA_PUT(skb, IFLA_CAN_CLOCK, sizeof(cm), &amp;priv-&gt;clock);</div><div class='del'>-	if (priv-&gt;do_get_berr_counter &amp;&amp; !priv-&gt;do_get_berr_counter(dev, &amp;bec))</div><div class='del'>-		NLA_PUT(skb, IFLA_CAN_BERR_COUNTER, sizeof(bec), &amp;bec);</div><div class='del'>-	if (priv-&gt;bittiming_const)</div><div class='del'>-		NLA_PUT(skb, IFLA_CAN_BITTIMING_CONST,</div><div class='del'>-			sizeof(*priv-&gt;bittiming_const), priv-&gt;bittiming_const);</div><div class='del'>-</div><div class='add'>+	if (nla_put_u32(skb, IFLA_CAN_STATE, state) ||</div><div class='add'>+	    nla_put(skb, IFLA_CAN_CTRLMODE, sizeof(cm), &amp;cm) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_RESTART_MS, priv-&gt;restart_ms) ||</div><div class='add'>+	    nla_put(skb, IFLA_CAN_BITTIMING,</div><div class='add'>+		    sizeof(priv-&gt;bittiming), &amp;priv-&gt;bittiming) ||</div><div class='add'>+	    nla_put(skb, IFLA_CAN_CLOCK, sizeof(cm), &amp;priv-&gt;clock) ||</div><div class='add'>+	    (priv-&gt;do_get_berr_counter &amp;&amp;</div><div class='add'>+	     !priv-&gt;do_get_berr_counter(dev, &amp;bec) &amp;&amp;</div><div class='add'>+	     nla_put(skb, IFLA_CAN_BERR_COUNTER, sizeof(bec), &amp;bec)) ||</div><div class='add'>+	    (priv-&gt;bittiming_const &amp;&amp;</div><div class='add'>+	     nla_put(skb, IFLA_CAN_BITTIMING_CONST,</div><div class='add'>+		     sizeof(*priv-&gt;bittiming_const), priv-&gt;bittiming_const)))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='hunk'>@@ -714,9 +715,9 @@ static int can_fill_xstats(struct sk_buff *skb, const struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct can_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, IFLA_INFO_XSTATS,</div><div class='del'>-		sizeof(priv-&gt;can_stats), &amp;priv-&gt;can_stats);</div><div class='del'>-</div><div class='add'>+	if (nla_put(skb, IFLA_INFO_XSTATS,</div><div class='add'>+		    sizeof(priv-&gt;can_stats), &amp;priv-&gt;can_stats))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='head'>diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c<br/>index 1efb08386c61..38c0690df5c8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/can/flexcan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/can/flexcan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/can/flexcan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/flexcan.c</a></div><div class='hunk'>@@ -35,6 +35,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME			"flexcan"</div><div class='ctx'> </div><div class='hunk'>@@ -927,11 +928,16 @@ static int __devinit flexcan_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct flexcan_priv *priv;</div><div class='ctx'> 	struct resource *mem;</div><div class='ctx'> 	struct clk *clk = NULL;</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> 	resource_size_t mem_size;</div><div class='ctx'> 	int err, irq;</div><div class='ctx'> 	u32 clock_freq = 0;</div><div class='ctx'> </div><div class='add'>+	pinctrl = devm_pinctrl_get_select_default(&amp;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(pinctrl))</div><div class='add'>+		return PTR_ERR(pinctrl);</div><div class='add'>+</div><div class='ctx'> 	if (pdev-&gt;dev.of_node) {</div><div class='ctx'> 		const u32 *clock_freq_p;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c<br/>index 2bb215e00eb1..1226297e7676 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/can/pch_can.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/can/pch_can.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/can/pch_can.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/pch_can.c</a></div><div class='hunk'>@@ -1274,17 +1274,7 @@ static struct pci_driver pch_can_pci_driver = {</div><div class='ctx'> 	.resume = pch_can_resume,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init pch_can_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;pch_can_pci_driver);</div><div class='del'>-}</div><div class='del'>-module_init(pch_can_pci_init);</div><div class='del'>-</div><div class='del'>-static void __exit pch_can_pci_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;pch_can_pci_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(pch_can_pci_exit);</div><div class='add'>+module_pci_driver(pch_can_pci_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Intel EG20T PCH CAN(Controller Area Network) Driver");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/can/sja1000/Kconfig b/drivers/net/can/sja1000/Kconfig<br/>index b60d6c5f29a0..03df9a8f2bbf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/can/sja1000/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/can/sja1000/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/can/sja1000/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/sja1000/Kconfig</a></div><div class='hunk'>@@ -75,7 +75,7 @@ config CAN_KVASER_PCI</div><div class='ctx'> 	tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards"</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	---help---</div><div class='del'>-	  This driver is for the the PCIcanx and PCIcan cards (1, 2 or</div><div class='add'>+	  This driver is for the PCIcanx and PCIcan cards (1, 2 or</div><div class='ctx'> 	  4 channel) from Kvaser (http://www.kvaser.com).</div><div class='ctx'> </div><div class='ctx'> config CAN_PLX_PCI</div><div class='head'>diff --git a/drivers/net/can/sja1000/ems_pci.c b/drivers/net/can/sja1000/ems_pci.c<br/>index 36f4f9780c30..5c6d412bafb5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/can/sja1000/ems_pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/can/sja1000/ems_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/can/sja1000/ems_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/sja1000/ems_pci.c</a></div><div class='hunk'>@@ -371,16 +371,4 @@ static struct pci_driver ems_pci_driver = {</div><div class='ctx'> 	.remove = ems_pci_del_card,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init ems_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;ems_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ems_pci_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;ems_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(ems_pci_init);</div><div class='del'>-module_exit(ems_pci_exit);</div><div class='del'>-</div><div class='add'>+module_pci_driver(ems_pci_driver);</div><div class='head'>diff --git a/drivers/net/can/sja1000/kvaser_pci.c b/drivers/net/can/sja1000/kvaser_pci.c<br/>index ed004cebd31f..23ed6ea4c7c3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/can/sja1000/kvaser_pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/can/sja1000/kvaser_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/can/sja1000/kvaser_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/sja1000/kvaser_pci.c</a></div><div class='hunk'>@@ -397,15 +397,4 @@ static struct pci_driver kvaser_pci_driver = {</div><div class='ctx'> 	.remove = __devexit_p(kvaser_pci_remove_one),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init kvaser_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;kvaser_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit kvaser_pci_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;kvaser_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(kvaser_pci_init);</div><div class='del'>-module_exit(kvaser_pci_exit);</div><div class='add'>+module_pci_driver(kvaser_pci_driver);</div><div class='head'>diff --git a/drivers/net/can/sja1000/peak_pci.c b/drivers/net/can/sja1000/peak_pci.c<br/>index 5f92b865f64b..f0a12962f7b6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/can/sja1000/peak_pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/can/sja1000/peak_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/can/sja1000/peak_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/sja1000/peak_pci.c</a></div><div class='hunk'>@@ -749,14 +749,4 @@ static struct pci_driver peak_pci_driver = {</div><div class='ctx'> 	.remove = __devexit_p(peak_pci_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init peak_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;peak_pci_driver);</div><div class='del'>-}</div><div class='del'>-module_init(peak_pci_init);</div><div class='del'>-</div><div class='del'>-static void __exit peak_pci_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;peak_pci_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(peak_pci_exit);</div><div class='add'>+module_pci_driver(peak_pci_driver);</div><div class='head'>diff --git a/drivers/net/can/sja1000/plx_pci.c b/drivers/net/can/sja1000/plx_pci.c<br/>index a227586ddd52..8bc95982840f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/can/sja1000/plx_pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/can/sja1000/plx_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/can/sja1000/plx_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/can/sja1000/plx_pci.c</a></div><div class='hunk'>@@ -609,15 +609,4 @@ static struct pci_driver plx_pci_driver = {</div><div class='ctx'> 	.remove = plx_pci_del_card,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init plx_pci_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;plx_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit plx_pci_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;plx_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(plx_pci_init);</div><div class='del'>-module_exit(plx_pci_exit);</div><div class='add'>+module_pci_driver(plx_pci_driver);</div><div class='head'>diff --git a/drivers/net/cris/eth_v10.c b/drivers/net/cris/eth_v10.c<br/>index ec03b401620a..9c755db6b16d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/cris/eth_v10.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/cris/eth_v10.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/cris/eth_v10.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/cris/eth_v10.c</a></div><div class='hunk'>@@ -1131,7 +1131,6 @@ static irqreturn_t</div><div class='ctx'> e100rxtx_interrupt(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = (struct net_device *)dev_id;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='ctx'> 	unsigned long irqbits;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/drivers/net/ethernet/3com/3c509.c b/drivers/net/ethernet/3com/3c509.c<br/>index 41719da2e178..1a8eef2c3d58 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/3com/3c509.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/3com/3c509.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/3com/3c509.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/3com/3c509.c</a></div><div class='hunk'>@@ -69,7 +69,6 @@</div><div class='ctx'> #define TX_TIMEOUT  (400*HZ/1000)</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='ctx'> #include &lt;linux/isa.h&gt;</div><div class='ctx'> #include &lt;linux/pnp.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='hunk'>@@ -102,7 +101,7 @@ static int el3_debug = 2;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* Used to do a global count of all the cards in the system.  Must be</div><div class='del'>- * a global variable so that the mca/eisa probe routines can increment</div><div class='add'>+ * a global variable so that the eisa probe routines can increment</div><div class='ctx'>  * it */</div><div class='ctx'> static int el3_cards = 0;</div><div class='ctx'> #define EL3_MAX_CARDS 8</div><div class='hunk'>@@ -163,7 +162,7 @@ enum RxFilter {</div><div class='ctx'>  */</div><div class='ctx'> #define SKB_QUEUE_SIZE	64</div><div class='ctx'> </div><div class='del'>-enum el3_cardtype { EL3_ISA, EL3_PNP, EL3_MCA, EL3_EISA };</div><div class='add'>+enum el3_cardtype { EL3_ISA, EL3_PNP, EL3_EISA };</div><div class='ctx'> </div><div class='ctx'> struct el3_private {</div><div class='ctx'> 	spinlock_t lock;</div><div class='hunk'>@@ -505,41 +504,6 @@ static struct eisa_driver el3_eisa_driver = {</div><div class='ctx'> static int eisa_registered;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-static int el3_mca_probe(struct device *dev);</div><div class='del'>-</div><div class='del'>-static short el3_mca_adapter_ids[] __initdata = {</div><div class='del'>-		0x627c,</div><div class='del'>-		0x627d,</div><div class='del'>-		0x62db,</div><div class='del'>-		0x62f6,</div><div class='del'>-		0x62f7,</div><div class='del'>-		0x0000</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static char *el3_mca_adapter_names[] __initdata = {</div><div class='del'>-		"3Com 3c529 EtherLink III (10base2)",</div><div class='del'>-		"3Com 3c529 EtherLink III (10baseT)",</div><div class='del'>-		"3Com 3c529 EtherLink III (test mode)",</div><div class='del'>-		"3Com 3c529 EtherLink III (TP or coax)",</div><div class='del'>-		"3Com 3c529 EtherLink III (TP)",</div><div class='del'>-		NULL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct mca_driver el3_mca_driver = {</div><div class='del'>-		.id_table = el3_mca_adapter_ids,</div><div class='del'>-		.driver = {</div><div class='del'>-				.name = "3c529",</div><div class='del'>-				.bus = &amp;mca_bus_type,</div><div class='del'>-				.probe = el3_mca_probe,</div><div class='del'>-				.remove = __devexit_p(el3_device_remove),</div><div class='del'>-				.suspend = el3_suspend,</div><div class='del'>-				.resume  = el3_resume,</div><div class='del'>-		},</div><div class='del'>-};</div><div class='del'>-static int mca_registered;</div><div class='del'>-#endif /* CONFIG_MCA */</div><div class='del'>-</div><div class='ctx'> static const struct net_device_ops netdev_ops = {</div><div class='ctx'> 	.ndo_open 		= el3_open,</div><div class='ctx'> 	.ndo_stop	 	= el3_close,</div><div class='hunk'>@@ -600,76 +564,6 @@ static void el3_common_remove (struct net_device *dev)</div><div class='ctx'> 	free_netdev (dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-static int __init el3_mca_probe(struct device *device)</div><div class='del'>-{</div><div class='del'>-	/* Based on Erik Nygren's (nygren@mit.edu) 3c529 patch,</div><div class='del'>-	 * heavily modified by Chris Beauregard</div><div class='del'>-	 * (cpbeaure@csclub.uwaterloo.ca) to support standard MCA</div><div class='del'>-	 * probing.</div><div class='del'>-	 *</div><div class='del'>-	 * redone for multi-card detection by ZP Gu (zpg@castle.net)</div><div class='del'>-	 * now works as a module */</div><div class='del'>-</div><div class='del'>-	short i;</div><div class='del'>-	int ioaddr, irq, if_port;</div><div class='del'>-	__be16 phys_addr[3];</div><div class='del'>-	struct net_device *dev = NULL;</div><div class='del'>-	u_char pos4, pos5;</div><div class='del'>-	struct mca_device *mdev = to_mca_device(device);</div><div class='del'>-	int slot = mdev-&gt;slot;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	pos4 = mca_device_read_stored_pos(mdev, 4);</div><div class='del'>-	pos5 = mca_device_read_stored_pos(mdev, 5);</div><div class='del'>-</div><div class='del'>-	ioaddr = ((short)((pos4&amp;0xfc)|0x02)) &lt;&lt; 8;</div><div class='del'>-	irq = pos5 &amp; 0x0f;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	pr_info("3c529: found %s at slot %d\n",</div><div class='del'>-		el3_mca_adapter_names[mdev-&gt;index], slot + 1);</div><div class='del'>-</div><div class='del'>-	/* claim the slot */</div><div class='del'>-	strncpy(mdev-&gt;name, el3_mca_adapter_names[mdev-&gt;index],</div><div class='del'>-			sizeof(mdev-&gt;name));</div><div class='del'>-	mca_device_set_claim(mdev, 1);</div><div class='del'>-</div><div class='del'>-	if_port = pos4 &amp; 0x03;</div><div class='del'>-</div><div class='del'>-	irq = mca_device_transform_irq(mdev, irq);</div><div class='del'>-	ioaddr = mca_device_transform_ioport(mdev, ioaddr);</div><div class='del'>-	if (el3_debug &gt; 2) {</div><div class='del'>-		pr_debug("3c529: irq %d  ioaddr 0x%x  ifport %d\n", irq, ioaddr, if_port);</div><div class='del'>-	}</div><div class='del'>-	EL3WINDOW(0);</div><div class='del'>-	for (i = 0; i &lt; 3; i++)</div><div class='del'>-		phys_addr[i] = htons(read_eeprom(ioaddr, i));</div><div class='del'>-</div><div class='del'>-	dev = alloc_etherdev(sizeof (struct el3_private));</div><div class='del'>-	if (dev == NULL) {</div><div class='del'>-		release_region(ioaddr, EL3_IO_EXTENT);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netdev_boot_setup_check(dev);</div><div class='del'>-</div><div class='del'>-	el3_dev_fill(dev, phys_addr, ioaddr, irq, if_port, EL3_MCA);</div><div class='del'>-	dev_set_drvdata(device, dev);</div><div class='del'>-	err = el3_common_init(dev);</div><div class='del'>-</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_set_drvdata(device, NULL);</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	el3_devs[el3_cards++] = dev;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_MCA */</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_EISA</div><div class='ctx'> static int __init el3_eisa_probe (struct device *device)</div><div class='ctx'> {</div><div class='hunk'>@@ -1547,11 +1441,6 @@ static int __init el3_init_module(void)</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		eisa_registered = 1;</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-	ret = mca_register_driver(&amp;el3_mca_driver);</div><div class='del'>-	if (!ret)</div><div class='del'>-		mca_registered = 1;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PNP</div><div class='ctx'> 	if (pnp_registered)</div><div class='hunk'>@@ -1563,10 +1452,6 @@ static int __init el3_init_module(void)</div><div class='ctx'> 	if (eisa_registered)</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-	if (mca_registered)</div><div class='del'>-		ret = 0;</div><div class='del'>-#endif</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1584,10 +1469,6 @@ static void __exit el3_cleanup_module(void)</div><div class='ctx'> 	if (eisa_registered)</div><div class='ctx'> 		eisa_driver_unregister(&amp;el3_eisa_driver);</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-	if (mca_registered)</div><div class='del'>-		mca_unregister_driver(&amp;el3_mca_driver);</div><div class='del'>-#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init (el3_init_module);</div><div class='head'>diff --git a/drivers/net/ethernet/3com/typhoon.c b/drivers/net/ethernet/3com/typhoon.c<br/>index 1234a14b2b73..b15366635147 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/3com/typhoon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/3com/typhoon.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/3com/typhoon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/3com/typhoon.c</a></div><div class='hunk'>@@ -2549,8 +2549,7 @@ typhoon_init(void)</div><div class='ctx'> static void __exit</div><div class='ctx'> typhoon_cleanup(void)</div><div class='ctx'> {</div><div class='del'>-	if (typhoon_fw)</div><div class='del'>-		release_firmware(typhoon_fw);</div><div class='add'>+	release_firmware(typhoon_fw);</div><div class='ctx'> 	pci_unregister_driver(&amp;typhoon_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/8390/Kconfig b/drivers/net/ethernet/8390/Kconfig<br/>index e04ade444247..2e538676924d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/8390/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/8390/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/8390/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/8390/Kconfig</a></div><div class='hunk'>@@ -60,6 +60,7 @@ config PCMCIA_AXNET</div><div class='ctx'> config AX88796</div><div class='ctx'> 	tristate "ASIX AX88796 NE2000 clone support"</div><div class='ctx'> 	depends on (ARM || MIPS || SUPERH)</div><div class='add'>+	select CRC32</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	select MDIO_BITBANG</div><div class='ctx'> 	---help---</div><div class='hunk'>@@ -181,18 +182,6 @@ config NE2000</div><div class='ctx'> 	  To compile this driver as a module, choose M here. The module</div><div class='ctx'> 	  will be called ne.</div><div class='ctx'> </div><div class='del'>-config NE2_MCA</div><div class='del'>-	tristate "NE/2 (ne2000 MCA version) support"</div><div class='del'>-	depends on MCA_LEGACY</div><div class='del'>-	select CRC32</div><div class='del'>-	---help---</div><div class='del'>-	  If you have a network (Ethernet) card of this type, say Y and read</div><div class='del'>-	  the Ethernet-HOWTO, available from</div><div class='del'>-	  &lt;http://www.tldp.org/docs.html#howto&gt;.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here. The module</div><div class='del'>-	  will be called ne2.</div><div class='del'>-</div><div class='ctx'> config NE2K_PCI</div><div class='ctx'> 	tristate "PCI NE2000 and clones support (see help)"</div><div class='ctx'> 	depends on PCI</div><div class='hunk'>@@ -266,18 +255,6 @@ config STNIC</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='del'>-config ULTRAMCA</div><div class='del'>-	tristate "SMC Ultra MCA support"</div><div class='del'>-	depends on MCA</div><div class='del'>-	select CRC32</div><div class='del'>-	---help---</div><div class='del'>-	  If you have a network (Ethernet) card of this type and are running</div><div class='del'>-	  an MCA based system (PS/2), say Y and read the Ethernet-HOWTO,</div><div class='del'>-	  available from &lt;http://www.tldp.org/docs.html#howto&gt;.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here. The module</div><div class='del'>-	  will be called smc-mca.</div><div class='del'>-</div><div class='ctx'> config ULTRA</div><div class='ctx'> 	tristate "SMC Ultra support"</div><div class='ctx'> 	depends on ISA</div><div class='head'>diff --git a/drivers/net/ethernet/8390/Makefile b/drivers/net/ethernet/8390/Makefile<br/>index 3337d7fb4344..d13790b7fd27 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/8390/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/8390/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/8390/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/8390/Makefile</a></div><div class='hunk'>@@ -24,6 +24,5 @@ obj-$(CONFIG_PCMCIA_PCNET) += pcnet_cs.o 8390.o</div><div class='ctx'> obj-$(CONFIG_STNIC) += stnic.o 8390.o</div><div class='ctx'> obj-$(CONFIG_ULTRA) += smc-ultra.o 8390.o</div><div class='ctx'> obj-$(CONFIG_ULTRA32) += smc-ultra32.o 8390.o</div><div class='del'>-obj-$(CONFIG_ULTRAMCA) += smc-mca.o 8390.o</div><div class='ctx'> obj-$(CONFIG_WD80x3) += wd.o 8390.o</div><div class='ctx'> obj-$(CONFIG_ZORRO8390) += zorro8390.o 8390.o</div><div class='head'>diff --git a/drivers/net/ethernet/8390/ax88796.c b/drivers/net/ethernet/8390/ax88796.c<br/>index 11476ca95e93..203ff9dccadb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/8390/ax88796.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/8390/ax88796.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/8390/ax88796.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/8390/ax88796.c</a></div><div class='hunk'>@@ -501,6 +501,7 @@ static const struct ethtool_ops ax_ethtool_ops = {</div><div class='ctx'> 	.get_settings		= ax_get_settings,</div><div class='ctx'> 	.set_settings		= ax_set_settings,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_AX88796_93CX6</div><div class='head'>diff --git a/drivers/net/ethernet/8390/etherh.c b/drivers/net/ethernet/8390/etherh.c<br/>index dbefd5658c14..8322c54972f3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/8390/etherh.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/8390/etherh.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/8390/etherh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/8390/etherh.c</a></div><div class='hunk'>@@ -635,6 +635,7 @@ static const struct ethtool_ops etherh_ethtool_ops = {</div><div class='ctx'> 	.get_settings	= etherh_get_settings,</div><div class='ctx'> 	.set_settings	= etherh_set_settings,</div><div class='ctx'> 	.get_drvinfo	= etherh_get_drvinfo,</div><div class='add'>+	.get_ts_info	= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops etherh_netdev_ops = {</div><div class='head'>diff --git a/drivers/net/ethernet/8390/ne2.c b/drivers/net/ethernet/8390/ne2.c<br/>deleted file mode 100644<br/>index ef85839f43d8..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/8390/ne2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/8390/ne2.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,798 +0,0 @@</div><div class='del'>-/* ne2.c: A NE/2 Ethernet Driver for Linux. */</div><div class='del'>-/*</div><div class='del'>-   Based on the NE2000 driver written by Donald Becker (1992-94).</div><div class='del'>-   modified by Wim Dumon (Apr 1996)</div><div class='del'>-</div><div class='del'>-   This software may be used and distributed according to the terms</div><div class='del'>-   of the GNU General Public License, incorporated herein by reference.</div><div class='del'>-</div><div class='del'>-   The author may be reached as wimpie@linux.cc.kuleuven.ac.be</div><div class='del'>-</div><div class='del'>-   Currently supported: NE/2</div><div class='del'>-   This patch was never tested on other MCA-ethernet adapters, but it</div><div class='del'>-   might work. Just give it a try and let me know if you have problems.</div><div class='del'>-   Also mail me if it really works, please!</div><div class='del'>-</div><div class='del'>-   Changelog:</div><div class='del'>-   Mon Feb  3 16:26:02 MET 1997</div><div class='del'>-   - adapted the driver to work with the 2.1.25 kernel</div><div class='del'>-   - multiple ne2 support (untested)</div><div class='del'>-   - module support (untested)</div><div class='del'>-</div><div class='del'>-   Fri Aug 28 00:18:36 CET 1998 (David Weinehall)</div><div class='del'>-   - fixed a few minor typos</div><div class='del'>-   - made the MODULE_PARM conditional (it only works with the v2.1.x kernels)</div><div class='del'>-   - fixed the module support (Now it's working...)</div><div class='del'>-</div><div class='del'>-   Mon Sep  7 19:01:44 CET 1998 (David Weinehall)</div><div class='del'>-   - added support for Arco Electronics AE/2-card (experimental)</div><div class='del'>-</div><div class='del'>-   Mon Sep 14 09:53:42 CET 1998 (David Weinehall)</div><div class='del'>-   - added support for Compex ENET-16MC/P (experimental)</div><div class='del'>-</div><div class='del'>-   Tue Sep 15 16:21:12 CET 1998 (David Weinehall, Magnus Jonsson, Tomas Ogren)</div><div class='del'>-   - Miscellaneous bugfixes</div><div class='del'>-</div><div class='del'>-   Tue Sep 19 16:21:12 CET 1998 (Magnus Jonsson)</div><div class='del'>-   - Cleanup</div><div class='del'>-</div><div class='del'>-   Wed Sep 23 14:33:34 CET 1998 (David Weinehall)</div><div class='del'>-   - Restructuring and rewriting for v2.1.x compliance</div><div class='del'>-</div><div class='del'>-   Wed Oct 14 17:19:21 CET 1998 (David Weinehall)</div><div class='del'>-   - Added code that unregisters irq and proc-info</div><div class='del'>-   - Version# bump</div><div class='del'>-</div><div class='del'>-   Mon Nov 16 15:28:23 CET 1998 (Wim Dumon)</div><div class='del'>-   - pass 'dev' as last parameter of request_irq in stead of 'NULL'</div><div class='del'>-</div><div class='del'>-   Wed Feb  7 21:24:00 CET 2001 (Alfred Arnold)</div><div class='del'>-   - added support for the D-Link DE-320CT</div><div class='del'>-</div><div class='del'>-   *    WARNING</div><div class='del'>-	-------</div><div class='del'>-	This is alpha-test software.  It is not guaranteed to work. As a</div><div class='del'>-	matter of fact, I'm quite sure there are *LOTS* of bugs in here. I</div><div class='del'>-	would like to hear from you if you use this driver, even if it works.</div><div class='del'>-	If it doesn't work, be sure to send me a mail with the problems !</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-static const char *version = "ne2.c:v0.91 Nov 16 1998 Wim Dumon &lt;wimpie@kotnet.org&gt;\n";</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/fcntl.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/mca-legacy.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-</div><div class='del'>-#include "8390.h"</div><div class='del'>-</div><div class='del'>-#define DRV_NAME "ne2"</div><div class='del'>-</div><div class='del'>-/* Some defines that people can play with if so inclined. */</div><div class='del'>-</div><div class='del'>-/* Do we perform extra sanity checks on stuff ? */</div><div class='del'>-/* #define NE_SANITY_CHECK */</div><div class='del'>-</div><div class='del'>-/* Do we implement the read before write bugfix ? */</div><div class='del'>-/* #define NE_RW_BUGFIX */</div><div class='del'>-</div><div class='del'>-/* Do we have a non std. amount of memory? (in units of 256 byte pages) */</div><div class='del'>-/* #define PACKETBUF_MEMSIZE	0x40 */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* ---- No user-serviceable parts below ---- */</div><div class='del'>-</div><div class='del'>-#define NE_BASE	 (dev-&gt;base_addr)</div><div class='del'>-#define NE_CMD	 	0x00</div><div class='del'>-#define NE_DATAPORT	0x10	/* NatSemi-defined port window offset. */</div><div class='del'>-#define NE_RESET	0x20	/* Issue a read to reset, a write to clear. */</div><div class='del'>-#define NE_IO_EXTENT	0x30</div><div class='del'>-</div><div class='del'>-#define NE1SM_START_PG	0x20	/* First page of TX buffer */</div><div class='del'>-#define NE1SM_STOP_PG 	0x40	/* Last page +1 of RX ring */</div><div class='del'>-#define NESM_START_PG	0x40	/* First page of TX buffer */</div><div class='del'>-#define NESM_STOP_PG	0x80	/* Last page +1 of RX ring */</div><div class='del'>-</div><div class='del'>-/* From the .ADF file: */</div><div class='del'>-static unsigned int addresses[7] __initdata =</div><div class='del'>-		{0x1000, 0x2020, 0x8020, 0xa0a0, 0xb0b0, 0xc0c0, 0xc3d0};</div><div class='del'>-static int irqs[4] __initdata = {3, 4, 5, 9};</div><div class='del'>-</div><div class='del'>-/* From the D-Link ADF file: */</div><div class='del'>-static unsigned int dlink_addresses[4] __initdata =</div><div class='del'>-                {0x300, 0x320, 0x340, 0x360};</div><div class='del'>-static int dlink_irqs[8] __initdata = {3, 4, 5, 9, 10, 11, 14, 15};</div><div class='del'>-</div><div class='del'>-struct ne2_adapters_t {</div><div class='del'>-	unsigned int	id;</div><div class='del'>-	char		*name;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct ne2_adapters_t ne2_adapters[] __initdata = {</div><div class='del'>-	{ 0x6354, "Arco Ethernet Adapter AE/2" },</div><div class='del'>-	{ 0x70DE, "Compex ENET-16 MC/P" },</div><div class='del'>-	{ 0x7154, "Novell Ethernet Adapter NE/2" },</div><div class='del'>-        { 0x56ea, "D-Link DE-320CT" },</div><div class='del'>-	{ 0x0000, NULL }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern int netcard_probe(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-static int ne2_probe1(struct net_device *dev, int slot);</div><div class='del'>-</div><div class='del'>-static void ne_reset_8390(struct net_device *dev);</div><div class='del'>-static void ne_get_8390_hdr(struct net_device *dev, struct e8390_pkt_hdr *hdr,</div><div class='del'>-		int ring_page);</div><div class='del'>-static void ne_block_input(struct net_device *dev, int count,</div><div class='del'>-		struct sk_buff *skb, int ring_offset);</div><div class='del'>-static void ne_block_output(struct net_device *dev, const int count,</div><div class='del'>-		const unsigned char *buf, const int start_page);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * special code to read the DE-320's MAC address EEPROM.  In contrast to a</div><div class='del'>- * standard NE design, this is a serial EEPROM (93C46) that has to be read</div><div class='del'>- * bit by bit.  The EEPROM cotrol port at base + 0x1e has the following</div><div class='del'>- * layout:</div><div class='del'>- *</div><div class='del'>- * Bit 0 = Data out (read from EEPROM)</div><div class='del'>- * Bit 1 = Data in  (write to EEPROM)</div><div class='del'>- * Bit 2 = Clock</div><div class='del'>- * Bit 3 = Chip Select</div><div class='del'>- * Bit 7 = ~50 kHz clock for defined delays</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void __init dlink_put_eeprom(unsigned char value, unsigned int addr)</div><div class='del'>-{</div><div class='del'>-	int z;</div><div class='del'>-	unsigned char v1, v2;</div><div class='del'>-</div><div class='del'>-	/* write the value to the NIC EEPROM register */</div><div class='del'>-</div><div class='del'>-	outb(value, addr + 0x1e);</div><div class='del'>-</div><div class='del'>-	/* now wait the clock line to toggle twice.  Effectively, we are</div><div class='del'>-	   waiting (at least) for one clock cycle */</div><div class='del'>-</div><div class='del'>-	for (z = 0; z &lt; 2; z++) {</div><div class='del'>-		do {</div><div class='del'>-			v1 = inb(addr + 0x1e);</div><div class='del'>-			v2 = inb(addr + 0x1e);</div><div class='del'>-		}</div><div class='del'>-		while (!((v1 ^ v2) &amp; 0x80));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init dlink_send_eeprom_bit(unsigned int bit, unsigned int addr)</div><div class='del'>-{</div><div class='del'>-	/* shift data bit into correct position */</div><div class='del'>-</div><div class='del'>-	bit = bit &lt;&lt; 1;</div><div class='del'>-</div><div class='del'>-	/* write value, keep clock line high for two cycles */</div><div class='del'>-</div><div class='del'>-	dlink_put_eeprom(0x09 | bit, addr);</div><div class='del'>-	dlink_put_eeprom(0x0d | bit, addr);</div><div class='del'>-	dlink_put_eeprom(0x0d | bit, addr);</div><div class='del'>-	dlink_put_eeprom(0x09 | bit, addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init dlink_send_eeprom_word(unsigned int value, unsigned int len, unsigned int addr)</div><div class='del'>-{</div><div class='del'>-	int z;</div><div class='del'>-</div><div class='del'>-	/* adjust bits so that they are left-aligned in a 16-bit-word */</div><div class='del'>-</div><div class='del'>-	value = value &lt;&lt; (16 - len);</div><div class='del'>-</div><div class='del'>-	/* shift bits out to the EEPROM */</div><div class='del'>-</div><div class='del'>-	for (z = 0; z &lt; len; z++) {</div><div class='del'>-		dlink_send_eeprom_bit((value &amp; 0x8000) &gt;&gt; 15, addr);</div><div class='del'>-		value = value &lt;&lt; 1;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int __init dlink_get_eeprom(unsigned int eeaddr, unsigned int addr)</div><div class='del'>-{</div><div class='del'>-	int z;</div><div class='del'>-	unsigned int value = 0;</div><div class='del'>-</div><div class='del'>-	/* pull the CS line low for a moment.  This resets the EEPROM-</div><div class='del'>-	   internal logic, and makes it ready for a new command. */</div><div class='del'>-</div><div class='del'>-	dlink_put_eeprom(0x01, addr);</div><div class='del'>-	dlink_put_eeprom(0x09, addr);</div><div class='del'>-</div><div class='del'>-	/* send one start bit, read command (1 - 0), plus the address to</div><div class='del'>-           the EEPROM */</div><div class='del'>-</div><div class='del'>-	dlink_send_eeprom_word(0x0180 | (eeaddr &amp; 0x3f), 9, addr);</div><div class='del'>-</div><div class='del'>-	/* get the data word.  We clock by sending 0s to the EEPROM, which</div><div class='del'>-	   get ignored during the read process */</div><div class='del'>-</div><div class='del'>-	for (z = 0; z &lt; 16; z++) {</div><div class='del'>-		dlink_send_eeprom_bit(0, addr);</div><div class='del'>-		value = (value &lt;&lt; 1) | (inb(addr + 0x1e) &amp; 0x01);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return value;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Note that at boot, this probe only picks up one card at a time.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init do_ne2_probe(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	static int current_mca_slot = -1;</div><div class='del'>-	int i;</div><div class='del'>-	int adapter_found = 0;</div><div class='del'>-</div><div class='del'>-	/* Do not check any supplied i/o locations.</div><div class='del'>-	   POS registers usually don't fail :) */</div><div class='del'>-</div><div class='del'>-	/* MCA cards have POS registers.</div><div class='del'>-	   Autodetecting MCA cards is extremely simple.</div><div class='del'>-	   Just search for the card. */</div><div class='del'>-</div><div class='del'>-	for(i = 0; (ne2_adapters[i].name != NULL) &amp;&amp; !adapter_found; i++) {</div><div class='del'>-		current_mca_slot =</div><div class='del'>-			mca_find_unused_adapter(ne2_adapters[i].id, 0);</div><div class='del'>-</div><div class='del'>-		if((current_mca_slot != MCA_NOTFOUND) &amp;&amp; !adapter_found) {</div><div class='del'>-			int res;</div><div class='del'>-			mca_set_adapter_name(current_mca_slot,</div><div class='del'>-					ne2_adapters[i].name);</div><div class='del'>-			mca_mark_as_used(current_mca_slot);</div><div class='del'>-</div><div class='del'>-			res = ne2_probe1(dev, current_mca_slot);</div><div class='del'>-			if (res)</div><div class='del'>-				mca_mark_as_unused(current_mca_slot);</div><div class='del'>-			return res;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifndef MODULE</div><div class='del'>-struct net_device * __init ne2_probe(int unit)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = alloc_eip_netdev();</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (!dev)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	sprintf(dev-&gt;name, "eth%d", unit);</div><div class='del'>-	netdev_boot_setup_check(dev);</div><div class='del'>-</div><div class='del'>-	err = do_ne2_probe(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-	return dev;</div><div class='del'>-out:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	return ERR_PTR(err);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int ne2_procinfo(char *buf, int slot, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int len=0;</div><div class='del'>-</div><div class='del'>-	len += sprintf(buf+len, "The NE/2 Ethernet Adapter\n" );</div><div class='del'>-	len += sprintf(buf+len, "Driver written by Wim Dumon ");</div><div class='del'>-	len += sprintf(buf+len, "&lt;wimpie@kotnet.org&gt;\n");</div><div class='del'>-	len += sprintf(buf+len, "Modified by ");</div><div class='del'>-	len += sprintf(buf+len, "David Weinehall &lt;tao@acc.umu.se&gt;\n");</div><div class='del'>-	len += sprintf(buf+len, "and by Magnus Jonsson &lt;bigfoot@acc.umu.se&gt;\n");</div><div class='del'>-	len += sprintf(buf+len, "Based on the original NE2000 drivers\n" );</div><div class='del'>-	len += sprintf(buf+len, "Base IO: %#x\n", (unsigned int)dev-&gt;base_addr);</div><div class='del'>-	len += sprintf(buf+len, "IRQ    : %d\n", dev-&gt;irq);</div><div class='del'>-	len += sprintf(buf+len, "HW addr : %pM\n", dev-&gt;dev_addr);</div><div class='del'>-</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init ne2_probe1(struct net_device *dev, int slot)</div><div class='del'>-{</div><div class='del'>-	int i, base_addr, irq, retval;</div><div class='del'>-	unsigned char POS;</div><div class='del'>-	unsigned char SA_prom[32];</div><div class='del'>-	const char *name = "NE/2";</div><div class='del'>-	int start_page, stop_page;</div><div class='del'>-	static unsigned version_printed;</div><div class='del'>-</div><div class='del'>-	if (ei_debug &amp;&amp; version_printed++ == 0)</div><div class='del'>-		printk(version);</div><div class='del'>-</div><div class='del'>-	printk("NE/2 ethercard found in slot %d:", slot);</div><div class='del'>-</div><div class='del'>-	/* Read base IO and IRQ from the POS-registers */</div><div class='del'>-	POS = mca_read_stored_pos(slot, 2);</div><div class='del'>-	if(!(POS % 2)) {</div><div class='del'>-		printk(" disabled.\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* handle different POS register structure for D-Link card */</div><div class='del'>-</div><div class='del'>-	if (mca_read_stored_pos(slot, 0) == 0xea) {</div><div class='del'>-		base_addr = dlink_addresses[(POS &gt;&gt; 5) &amp; 0x03];</div><div class='del'>-		irq = dlink_irqs[(POS &gt;&gt; 2) &amp; 0x07];</div><div class='del'>-	}</div><div class='del'>-        else {</div><div class='del'>-		i = (POS &amp; 0xE)&gt;&gt;1;</div><div class='del'>-		/* printk("Halleluja sdog, als er na de pijl een 1 staat is 1 - 1 == 0"</div><div class='del'>-	   	" en zou het moeten werken -&gt; %d\n", i);</div><div class='del'>-	   	The above line was for remote testing, thanx to sdog ... */</div><div class='del'>-		base_addr = addresses[i - 1];</div><div class='del'>-		irq = irqs[(POS &amp; 0x60)&gt;&gt;5];</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!request_region(base_addr, NE_IO_EXTENT, DRV_NAME))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-	printk("POS info : pos 2 = %#x ; base = %#x ; irq = %ld\n", POS,</div><div class='del'>-			base_addr, irq);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifndef CRYNWR_WAY</div><div class='del'>-	/* Reset the card the way they do it in the Crynwr packet driver */</div><div class='del'>-	for (i=0; i&lt;8; i++)</div><div class='del'>-		outb(0x0, base_addr + NE_RESET);</div><div class='del'>-	inb(base_addr + NE_RESET);</div><div class='del'>-	outb(0x21, base_addr + NE_CMD);</div><div class='del'>-	if (inb(base_addr + NE_CMD) != 0x21) {</div><div class='del'>-		printk("NE/2 adapter not responding\n");</div><div class='del'>-		retval = -ENODEV;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* In the crynwr sources they do a RAM-test here. I skip it. I suppose</div><div class='del'>-	   my RAM is okay.  Suppose your memory is broken.  Then this test</div><div class='del'>-	   should fail and you won't be able to use your card.  But if I do not</div><div class='del'>-	   test, you won't be able to use your card, neither.  So this test</div><div class='del'>-	   won't help you. */</div><div class='del'>-</div><div class='del'>-#else  /* _I_ never tested it this way .. Go ahead and try ...*/</div><div class='del'>-	/* Reset card. Who knows what dain-bramaged state it was left in. */</div><div class='del'>-	{</div><div class='del'>-		unsigned long reset_start_time = jiffies;</div><div class='del'>-</div><div class='del'>-		/* DON'T change these to inb_p/outb_p or reset will fail on</div><div class='del'>-		   clones.. */</div><div class='del'>-		outb(inb(base_addr + NE_RESET), base_addr + NE_RESET);</div><div class='del'>-</div><div class='del'>-		while ((inb_p(base_addr + EN0_ISR) &amp; ENISR_RESET) == 0)</div><div class='del'>-			if (time_after(jiffies, reset_start_time + 2*HZ/100)) {</div><div class='del'>-				printk(" not found (no reset ack).\n");</div><div class='del'>-				retval = -ENODEV;</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-		outb_p(0xff, base_addr + EN0_ISR);         /* Ack all intr. */</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* Read the 16 bytes of station address PROM.</div><div class='del'>-	   We must first initialize registers, similar to</div><div class='del'>-	   NS8390p_init(eifdev, 0).</div><div class='del'>-	   We can't reliably read the SAPROM address without this.</div><div class='del'>-	   (I learned the hard way!). */</div><div class='del'>-	{</div><div class='del'>-		struct {</div><div class='del'>-			unsigned char value, offset;</div><div class='del'>-		} program_seq[] = {</div><div class='del'>-						/* Select page 0 */</div><div class='del'>-			{E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD},</div><div class='del'>-			{0x49,	EN0_DCFG},  /* Set WORD-wide (0x49) access. */</div><div class='del'>-			{0x00,	EN0_RCNTLO},  /* Clear the count regs. */</div><div class='del'>-			{0x00,	EN0_RCNTHI},</div><div class='del'>-			{0x00,	EN0_IMR},  /* Mask completion irq. */</div><div class='del'>-			{0xFF,	EN0_ISR},</div><div class='del'>-			{E8390_RXOFF, EN0_RXCR},  /* 0x20  Set to monitor */</div><div class='del'>-			{E8390_TXOFF, EN0_TXCR},  /* 0x02  and loopback mode. */</div><div class='del'>-			{32,	EN0_RCNTLO},</div><div class='del'>-			{0x00,	EN0_RCNTHI},</div><div class='del'>-			{0x00,	EN0_RSARLO},  /* DMA starting at 0x0000. */</div><div class='del'>-			{0x00,	EN0_RSARHI},</div><div class='del'>-			{E8390_RREAD+E8390_START, E8390_CMD},</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; ARRAY_SIZE(program_seq); i++)</div><div class='del'>-			outb_p(program_seq[i].value, base_addr +</div><div class='del'>-				program_seq[i].offset);</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-	for(i = 0; i &lt; 6 /*sizeof(SA_prom)*/; i+=1) {</div><div class='del'>-		SA_prom[i] = inb(base_addr + NE_DATAPORT);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* I don't know whether the previous sequence includes the general</div><div class='del'>-           board reset procedure, so better don't omit it and just overwrite</div><div class='del'>-           the garbage read from a DE-320 with correct stuff. */</div><div class='del'>-</div><div class='del'>-	if (mca_read_stored_pos(slot, 0) == 0xea) {</div><div class='del'>-		unsigned int v;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; 3; i++) {</div><div class='del'>- 			v = dlink_get_eeprom(i, base_addr);</div><div class='del'>-			SA_prom[(i &lt;&lt; 1)    ] = v &amp; 0xff;</div><div class='del'>-			SA_prom[(i &lt;&lt; 1) + 1] = (v &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	start_page = NESM_START_PG;</div><div class='del'>-	stop_page = NESM_STOP_PG;</div><div class='del'>-</div><div class='del'>-	dev-&gt;irq=irq;</div><div class='del'>-</div><div class='del'>-	/* Snarf the interrupt now.  There's no point in waiting since we cannot</div><div class='del'>-	   share and the board will usually be enabled. */</div><div class='del'>-	retval = request_irq(dev-&gt;irq, eip_interrupt, 0, DRV_NAME, dev);</div><div class='del'>-	if (retval) {</div><div class='del'>-		printk (" unable to get IRQ %d (irqval=%d).\n",</div><div class='del'>-				dev-&gt;irq, retval);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr = base_addr;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = SA_prom[i];</div><div class='del'>-</div><div class='del'>-	printk(" %pM\n", dev-&gt;dev_addr);</div><div class='del'>-</div><div class='del'>-	printk("%s: %s found at %#x, using IRQ %d.\n",</div><div class='del'>-			dev-&gt;name, name, base_addr, dev-&gt;irq);</div><div class='del'>-</div><div class='del'>-	mca_set_adapter_procfn(slot, (MCA_ProcFn) ne2_procinfo, dev);</div><div class='del'>-</div><div class='del'>-	ei_status.name = name;</div><div class='del'>-	ei_status.tx_start_page = start_page;</div><div class='del'>-	ei_status.stop_page = stop_page;</div><div class='del'>-	ei_status.word16 = (2 == 2);</div><div class='del'>-</div><div class='del'>-	ei_status.rx_start_page = start_page + TX_PAGES;</div><div class='del'>-#ifdef PACKETBUF_MEMSIZE</div><div class='del'>-	/* Allow the packet buffer size to be overridden by know-it-alls. */</div><div class='del'>-	ei_status.stop_page = ei_status.tx_start_page + PACKETBUF_MEMSIZE;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	ei_status.reset_8390 = &amp;ne_reset_8390;</div><div class='del'>-	ei_status.block_input = &amp;ne_block_input;</div><div class='del'>-	ei_status.block_output = &amp;ne_block_output;</div><div class='del'>-	ei_status.get_8390_hdr = &amp;ne_get_8390_hdr;</div><div class='del'>-</div><div class='del'>-	ei_status.priv = slot;</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;eip_netdev_ops;</div><div class='del'>-	NS8390p_init(dev, 0);</div><div class='del'>-</div><div class='del'>-	retval = register_netdev(dev);</div><div class='del'>-	if (retval)</div><div class='del'>-		goto out1;</div><div class='del'>-	return 0;</div><div class='del'>-out1:</div><div class='del'>-	mca_set_adapter_procfn( ei_status.priv, NULL, NULL);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-out:</div><div class='del'>-	release_region(base_addr, NE_IO_EXTENT);</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Hard reset the card.  This used to pause for the same period that a</div><div class='del'>-   8390 reset command required, but that shouldn't be necessary. */</div><div class='del'>-static void ne_reset_8390(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long reset_start_time = jiffies;</div><div class='del'>-</div><div class='del'>-	if (ei_debug &gt; 1)</div><div class='del'>-		printk("resetting the 8390 t=%ld...", jiffies);</div><div class='del'>-</div><div class='del'>-	/* DON'T change these to inb_p/outb_p or reset will fail on clones. */</div><div class='del'>-	outb(inb(NE_BASE + NE_RESET), NE_BASE + NE_RESET);</div><div class='del'>-</div><div class='del'>-	ei_status.txing = 0;</div><div class='del'>-	ei_status.dmaing = 0;</div><div class='del'>-</div><div class='del'>-	/* This check _should_not_ be necessary, omit eventually. */</div><div class='del'>-	while ((inb_p(NE_BASE+EN0_ISR) &amp; ENISR_RESET) == 0)</div><div class='del'>-		if (time_after(jiffies, reset_start_time + 2*HZ/100)) {</div><div class='del'>-			printk("%s: ne_reset_8390() did not complete.\n",</div><div class='del'>-					dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	outb_p(ENISR_RESET, NE_BASE + EN0_ISR);	/* Ack intr. */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Grab the 8390 specific header. Similar to the block_input routine, but</div><div class='del'>-   we don't need to be concerned with ring wrap as the header will be at</div><div class='del'>-   the start of a page, so we optimize accordingly. */</div><div class='del'>-</div><div class='del'>-static void ne_get_8390_hdr(struct net_device *dev, struct e8390_pkt_hdr *hdr,</div><div class='del'>-		int ring_page)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	int nic_base = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-	/* This *shouldn't* happen.</div><div class='del'>-	   If it does, it's the last thing you'll see */</div><div class='del'>-	if (ei_status.dmaing) {</div><div class='del'>-		printk("%s: DMAing conflict in ne_get_8390_hdr "</div><div class='del'>-				"[DMAstat:%d][irqlock:%d].\n",</div><div class='del'>-				dev-&gt;name, ei_status.dmaing, ei_status.irqlock);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ei_status.dmaing |= 0x01;</div><div class='del'>-	outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);</div><div class='del'>-	outb_p(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);</div><div class='del'>-	outb_p(0, nic_base + EN0_RCNTHI);</div><div class='del'>-	outb_p(0, nic_base + EN0_RSARLO);		/* On page boundary */</div><div class='del'>-	outb_p(ring_page, nic_base + EN0_RSARHI);</div><div class='del'>-	outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD);</div><div class='del'>-</div><div class='del'>-	if (ei_status.word16)</div><div class='del'>-		insw(NE_BASE + NE_DATAPORT, hdr,</div><div class='del'>-				sizeof(struct e8390_pkt_hdr)&gt;&gt;1);</div><div class='del'>-	else</div><div class='del'>-		insb(NE_BASE + NE_DATAPORT, hdr,</div><div class='del'>-				sizeof(struct e8390_pkt_hdr));</div><div class='del'>-</div><div class='del'>-	outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */</div><div class='del'>-	ei_status.dmaing &amp;= ~0x01;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Block input and output, similar to the Crynwr packet driver.  If you</div><div class='del'>-   are porting to a new ethercard, look at the packet driver source for</div><div class='del'>-   hints. The NEx000 doesn't share the on-board packet memory -- you have</div><div class='del'>-   to put the packet out through the "remote DMA" dataport using outb. */</div><div class='del'>-</div><div class='del'>-static void ne_block_input(struct net_device *dev, int count, struct sk_buff *skb,</div><div class='del'>-		int ring_offset)</div><div class='del'>-{</div><div class='del'>-#ifdef NE_SANITY_CHECK</div><div class='del'>-	int xfer_count = count;</div><div class='del'>-#endif</div><div class='del'>-	int nic_base = dev-&gt;base_addr;</div><div class='del'>-	char *buf = skb-&gt;data;</div><div class='del'>-</div><div class='del'>-	/* This *shouldn't* happen.</div><div class='del'>-	   If it does, it's the last thing you'll see */</div><div class='del'>-	if (ei_status.dmaing) {</div><div class='del'>-		printk("%s: DMAing conflict in ne_block_input "</div><div class='del'>-				"[DMAstat:%d][irqlock:%d].\n",</div><div class='del'>-				dev-&gt;name, ei_status.dmaing, ei_status.irqlock);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	ei_status.dmaing |= 0x01;</div><div class='del'>-	outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);</div><div class='del'>-	outb_p(count &amp; 0xff, nic_base + EN0_RCNTLO);</div><div class='del'>-	outb_p(count &gt;&gt; 8, nic_base + EN0_RCNTHI);</div><div class='del'>-	outb_p(ring_offset &amp; 0xff, nic_base + EN0_RSARLO);</div><div class='del'>-	outb_p(ring_offset &gt;&gt; 8, nic_base + EN0_RSARHI);</div><div class='del'>-	outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD);</div><div class='del'>-	if (ei_status.word16) {</div><div class='del'>-		insw(NE_BASE + NE_DATAPORT,buf,count&gt;&gt;1);</div><div class='del'>-		if (count &amp; 0x01) {</div><div class='del'>-			buf[count-1] = inb(NE_BASE + NE_DATAPORT);</div><div class='del'>-#ifdef NE_SANITY_CHECK</div><div class='del'>-			xfer_count++;</div><div class='del'>-#endif</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		insb(NE_BASE + NE_DATAPORT, buf, count);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#ifdef NE_SANITY_CHECK</div><div class='del'>-	/* This was for the ALPHA version only, but enough people have</div><div class='del'>-	   been encountering problems so it is still here.  If you see</div><div class='del'>-	   this message you either 1) have a slightly incompatible clone</div><div class='del'>-	   or 2) have noise/speed problems with your bus. */</div><div class='del'>-	if (ei_debug &gt; 1) {	/* DMA termination address check... */</div><div class='del'>-		int addr, tries = 20;</div><div class='del'>-		do {</div><div class='del'>-			/* DON'T check for 'inb_p(EN0_ISR) &amp; ENISR_RDC' here</div><div class='del'>-			   -- it's broken for Rx on some cards! */</div><div class='del'>-			int high = inb_p(nic_base + EN0_RSARHI);</div><div class='del'>-			int low = inb_p(nic_base + EN0_RSARLO);</div><div class='del'>-			addr = (high &lt;&lt; 8) + low;</div><div class='del'>-			if (((ring_offset + xfer_count) &amp; 0xff) == low)</div><div class='del'>-				break;</div><div class='del'>-		} while (--tries &gt; 0);</div><div class='del'>-		if (tries &lt;= 0)</div><div class='del'>-			printk("%s: RX transfer address mismatch,"</div><div class='del'>-				"%#4.4x (expected) vs. %#4.4x (actual).\n",</div><div class='del'>-				dev-&gt;name, ring_offset + xfer_count, addr);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */</div><div class='del'>-	ei_status.dmaing &amp;= ~0x01;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ne_block_output(struct net_device *dev, int count,</div><div class='del'>-		const unsigned char *buf, const int start_page)</div><div class='del'>-{</div><div class='del'>-	int nic_base = NE_BASE;</div><div class='del'>-	unsigned long dma_start;</div><div class='del'>-#ifdef NE_SANITY_CHECK</div><div class='del'>-	int retries = 0;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* Round the count up for word writes. Do we need to do this?</div><div class='del'>-	   What effect will an odd byte count have on the 8390?</div><div class='del'>-	   I should check someday. */</div><div class='del'>-	if (ei_status.word16 &amp;&amp; (count &amp; 0x01))</div><div class='del'>-		count++;</div><div class='del'>-</div><div class='del'>-	/* This *shouldn't* happen.</div><div class='del'>-	   If it does, it's the last thing you'll see */</div><div class='del'>-	if (ei_status.dmaing) {</div><div class='del'>-		printk("%s: DMAing conflict in ne_block_output."</div><div class='del'>-				"[DMAstat:%d][irqlock:%d]\n",</div><div class='del'>-				dev-&gt;name, ei_status.dmaing, ei_status.irqlock);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	ei_status.dmaing |= 0x01;</div><div class='del'>-	/* We should already be in page 0, but to be safe... */</div><div class='del'>-	outb_p(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);</div><div class='del'>-</div><div class='del'>-#ifdef NE_SANITY_CHECK</div><div class='del'>-retry:</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef NE8390_RW_BUGFIX</div><div class='del'>-	/* Handle the read-before-write bug the same way as the</div><div class='del'>-	   Crynwr packet driver -- the NatSemi method doesn't work.</div><div class='del'>-	   Actually this doesn't always work either, but if you have</div><div class='del'>-	   problems with your NEx000 this is better than nothing! */</div><div class='del'>-	outb_p(0x42, nic_base + EN0_RCNTLO);</div><div class='del'>-	outb_p(0x00, nic_base + EN0_RCNTHI);</div><div class='del'>-	outb_p(0x42, nic_base + EN0_RSARLO);</div><div class='del'>-	outb_p(0x00, nic_base + EN0_RSARHI);</div><div class='del'>-	outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD);</div><div class='del'>-	/* Make certain that the dummy read has occurred. */</div><div class='del'>-	SLOW_DOWN_IO;</div><div class='del'>-	SLOW_DOWN_IO;</div><div class='del'>-	SLOW_DOWN_IO;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	outb_p(ENISR_RDC, nic_base + EN0_ISR);</div><div class='del'>-</div><div class='del'>-	/* Now the normal output. */</div><div class='del'>-	outb_p(count &amp; 0xff, nic_base + EN0_RCNTLO);</div><div class='del'>-	outb_p(count &gt;&gt; 8,   nic_base + EN0_RCNTHI);</div><div class='del'>-	outb_p(0x00, nic_base + EN0_RSARLO);</div><div class='del'>-	outb_p(start_page, nic_base + EN0_RSARHI);</div><div class='del'>-</div><div class='del'>-	outb_p(E8390_RWRITE+E8390_START, nic_base + NE_CMD);</div><div class='del'>-	if (ei_status.word16) {</div><div class='del'>-		outsw(NE_BASE + NE_DATAPORT, buf, count&gt;&gt;1);</div><div class='del'>-	} else {</div><div class='del'>-		outsb(NE_BASE + NE_DATAPORT, buf, count);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dma_start = jiffies;</div><div class='del'>-</div><div class='del'>-#ifdef NE_SANITY_CHECK</div><div class='del'>-	/* This was for the ALPHA version only, but enough people have</div><div class='del'>-	   been encountering problems so it is still here. */</div><div class='del'>-</div><div class='del'>-	if (ei_debug &gt; 1) {		/* DMA termination address check... */</div><div class='del'>-		int addr, tries = 20;</div><div class='del'>-		do {</div><div class='del'>-			int high = inb_p(nic_base + EN0_RSARHI);</div><div class='del'>-			int low = inb_p(nic_base + EN0_RSARLO);</div><div class='del'>-			addr = (high &lt;&lt; 8) + low;</div><div class='del'>-			if ((start_page &lt;&lt; 8) + count == addr)</div><div class='del'>-				break;</div><div class='del'>-		} while (--tries &gt; 0);</div><div class='del'>-		if (tries &lt;= 0) {</div><div class='del'>-			printk("%s: Tx packet transfer address mismatch,"</div><div class='del'>-					"%#4.4x (expected) vs. %#4.4x (actual).\n",</div><div class='del'>-					dev-&gt;name, (start_page &lt;&lt; 8) + count, addr);</div><div class='del'>-			if (retries++ == 0)</div><div class='del'>-				goto retry;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	while ((inb_p(nic_base + EN0_ISR) &amp; ENISR_RDC) == 0)</div><div class='del'>-		if (time_after(jiffies, dma_start + 2*HZ/100)) {		/* 20ms */</div><div class='del'>-			printk("%s: timeout waiting for Tx RDC.\n", dev-&gt;name);</div><div class='del'>-			ne_reset_8390(dev);</div><div class='del'>-			NS8390p_init(dev, 1);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */</div><div class='del'>-	ei_status.dmaing &amp;= ~0x01;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='del'>-#define MAX_NE_CARDS	4	/* Max number of NE cards per module */</div><div class='del'>-static struct net_device *dev_ne[MAX_NE_CARDS];</div><div class='del'>-static int io[MAX_NE_CARDS];</div><div class='del'>-static int irq[MAX_NE_CARDS];</div><div class='del'>-static int bad[MAX_NE_CARDS];	/* 0xbad = bad sig or no reset ack */</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-module_param_array(io, int, NULL, 0);</div><div class='del'>-module_param_array(irq, int, NULL, 0);</div><div class='del'>-module_param_array(bad, int, NULL, 0);</div><div class='del'>-MODULE_PARM_DESC(io, "(ignored)");</div><div class='del'>-MODULE_PARM_DESC(irq, "(ignored)");</div><div class='del'>-MODULE_PARM_DESC(bad, "(ignored)");</div><div class='del'>-</div><div class='del'>-/* Module code fixed by David Weinehall */</div><div class='del'>-</div><div class='del'>-int __init init_module(void)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	int this_dev, found = 0;</div><div class='del'>-</div><div class='del'>-	for (this_dev = 0; this_dev &lt; MAX_NE_CARDS; this_dev++) {</div><div class='del'>-		dev = alloc_eip_netdev();</div><div class='del'>-		if (!dev)</div><div class='del'>-			break;</div><div class='del'>-		dev-&gt;irq = irq[this_dev];</div><div class='del'>-		dev-&gt;mem_end = bad[this_dev];</div><div class='del'>-		dev-&gt;base_addr = io[this_dev];</div><div class='del'>-		if (do_ne2_probe(dev) == 0) {</div><div class='del'>-			dev_ne[found++] = dev;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	if (found)</div><div class='del'>-		return 0;</div><div class='del'>-	printk(KERN_WARNING "ne2.c: No NE/2 card found\n");</div><div class='del'>-	return -ENXIO;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cleanup_card(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	mca_mark_as_unused(ei_status.priv);</div><div class='del'>-	mca_set_adapter_procfn( ei_status.priv, NULL, NULL);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	release_region(dev-&gt;base_addr, NE_IO_EXTENT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __exit cleanup_module(void)</div><div class='del'>-{</div><div class='del'>-	int this_dev;</div><div class='del'>-</div><div class='del'>-	for (this_dev = 0; this_dev &lt; MAX_NE_CARDS; this_dev++) {</div><div class='del'>-		struct net_device *dev = dev_ne[this_dev];</div><div class='del'>-		if (dev) {</div><div class='del'>-			unregister_netdev(dev);</div><div class='del'>-			cleanup_card(dev);</div><div class='del'>-			free_netdev(dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-#endif /* MODULE */</div><div class='head'>diff --git a/drivers/net/ethernet/8390/smc-mca.c b/drivers/net/ethernet/8390/smc-mca.c<br/>deleted file mode 100644<br/>index 7a68590f2804..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/8390/smc-mca.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/8390/smc-mca.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,575 +0,0 @@</div><div class='del'>-/* smc-mca.c: A SMC Ultra ethernet driver for linux. */</div><div class='del'>-/*</div><div class='del'>-    Most of this driver, except for ultramca_probe is nearly</div><div class='del'>-    verbatim from smc-ultra.c by Donald Becker. The rest is</div><div class='del'>-    written and copyright 1996 by David Weis, weisd3458@uni.edu</div><div class='del'>-</div><div class='del'>-    This is a driver for the SMC Ultra and SMC EtherEZ ethercards.</div><div class='del'>-</div><div class='del'>-    This driver uses the cards in the 8390-compatible, shared memory mode.</div><div class='del'>-    Most of the run-time complexity is handled by the generic code in</div><div class='del'>-    8390.c.</div><div class='del'>-</div><div class='del'>-    This driver enables the shared memory only when doing the actual data</div><div class='del'>-    transfers to avoid a bug in early version of the card that corrupted</div><div class='del'>-    data transferred by a AHA1542.</div><div class='del'>-</div><div class='del'>-    This driver does not support the programmed-I/O data transfer mode of</div><div class='del'>-    the EtherEZ.  That support (if available) is smc-ez.c.  Nor does it</div><div class='del'>-    use the non-8390-compatible "Altego" mode. (No support currently planned.)</div><div class='del'>-</div><div class='del'>-    Changelog:</div><div class='del'>-</div><div class='del'>-    Paul Gortmaker	 : multiple card support for module users.</div><div class='del'>-    David Weis		 : Micro Channel-ized it.</div><div class='del'>-    Tom Sightler	 : Added support for IBM PS/2 Ethernet Adapter/A</div><div class='del'>-    Christopher Turcksin : Changed MCA-probe so that multiple adapters are</div><div class='del'>-			   found correctly (Jul 16, 1997)</div><div class='del'>-    Chris Beauregard	 : Tried to merge the two changes above (Dec 15, 1997)</div><div class='del'>-    Tom Sightler	 : Fixed minor detection bug caused by above merge</div><div class='del'>-    Tom Sightler	 : Added support for three more Western Digital</div><div class='del'>-			   MCA-adapters</div><div class='del'>-    Tom Sightler	 : Added support for 2.2.x mca_find_unused_adapter</div><div class='del'>-    Hartmut Schmidt	 : - Modified parameter detection to handle each</div><div class='del'>-			     card differently depending on a switch-list</div><div class='del'>-			   - 'card_ver' removed from the adapter list</div><div class='del'>-			   - Some minor bug fixes</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include "8390.h"</div><div class='del'>-</div><div class='del'>-#define DRV_NAME "smc-mca"</div><div class='del'>-</div><div class='del'>-static int ultramca_open(struct net_device *dev);</div><div class='del'>-static void ultramca_reset_8390(struct net_device *dev);</div><div class='del'>-static void ultramca_get_8390_hdr(struct net_device *dev,</div><div class='del'>-                                  struct e8390_pkt_hdr *hdr,</div><div class='del'>-                                  int ring_page);</div><div class='del'>-static void ultramca_block_input(struct net_device *dev, int count,</div><div class='del'>-                                 struct sk_buff *skb,</div><div class='del'>-                                 int ring_offset);</div><div class='del'>-static void ultramca_block_output(struct net_device *dev, int count,</div><div class='del'>-                                  const unsigned char *buf,</div><div class='del'>-                                  const int start_page);</div><div class='del'>-static int ultramca_close_card(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-#define START_PG        0x00    /* First page of TX buffer */</div><div class='del'>-</div><div class='del'>-#define ULTRA_CMDREG 0      /* Offset to ASIC command register. */</div><div class='del'>-#define ULTRA_RESET  0x80   /* Board reset, in ULTRA_CMDREG. */</div><div class='del'>-#define ULTRA_MEMENB 0x40   /* Enable the shared memory. */</div><div class='del'>-#define ULTRA_NIC_OFFSET 16 /* NIC register offset from the base_addr. */</div><div class='del'>-#define ULTRA_IO_EXTENT 32</div><div class='del'>-#define EN0_ERWCNT      0x08  /* Early receive warning count. */</div><div class='del'>-</div><div class='del'>-#define _61c8_SMC_Ethercard_PLUS_Elite_A_BNC_AUI_WD8013EP_A            0</div><div class='del'>-#define _61c9_SMC_Ethercard_PLUS_Elite_A_UTP_AUI_WD8013EP_A            1</div><div class='del'>-#define _6fc0_WD_Ethercard_PLUS_A_WD8003E_A_OR_WD8003ET_A              2</div><div class='del'>-#define _6fc1_WD_Starcard_PLUS_A_WD8003ST_A                            3</div><div class='del'>-#define _6fc2_WD_Ethercard_PLUS_10T_A_WD8003W_A                        4</div><div class='del'>-#define _efd4_IBM_PS2_Adapter_A_for_Ethernet_UTP_AUI_WD8013WP_A        5</div><div class='del'>-#define _efd5_IBM_PS2_Adapter_A_for_Ethernet_BNC_AUI_WD8013WP_A        6</div><div class='del'>-#define _efe5_IBM_PS2_Adapter_A_for_Ethernet                           7</div><div class='del'>-</div><div class='del'>-struct smc_mca_adapters_t {</div><div class='del'>-	unsigned int id;</div><div class='del'>-	char *name;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define MAX_ULTRAMCA_CARDS 4	/* Max number of Ultra cards per module */</div><div class='del'>-</div><div class='del'>-static int ultra_io[MAX_ULTRAMCA_CARDS];</div><div class='del'>-static int ultra_irq[MAX_ULTRAMCA_CARDS];</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-module_param_array(ultra_io, int, NULL, 0);</div><div class='del'>-module_param_array(ultra_irq, int, NULL, 0);</div><div class='del'>-MODULE_PARM_DESC(ultra_io, "SMC Ultra/EtherEZ MCA I/O base address(es)");</div><div class='del'>-MODULE_PARM_DESC(ultra_irq, "SMC Ultra/EtherEZ MCA IRQ number(s)");</div><div class='del'>-</div><div class='del'>-static const struct {</div><div class='del'>-  unsigned int base_addr;</div><div class='del'>-} addr_table[] = {</div><div class='del'>-    { 0x0800 },</div><div class='del'>-    { 0x1800 },</div><div class='del'>-    { 0x2800 },</div><div class='del'>-    { 0x3800 },</div><div class='del'>-    { 0x4800 },</div><div class='del'>-    { 0x5800 },</div><div class='del'>-    { 0x6800 },</div><div class='del'>-    { 0x7800 },</div><div class='del'>-    { 0x8800 },</div><div class='del'>-    { 0x9800 },</div><div class='del'>-    { 0xa800 },</div><div class='del'>-    { 0xb800 },</div><div class='del'>-    { 0xc800 },</div><div class='del'>-    { 0xd800 },</div><div class='del'>-    { 0xe800 },</div><div class='del'>-    { 0xf800 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define MEM_MASK 64</div><div class='del'>-</div><div class='del'>-static const struct {</div><div class='del'>-  unsigned char mem_index;</div><div class='del'>-  unsigned long mem_start;</div><div class='del'>-  unsigned char num_pages;</div><div class='del'>-} mem_table[] = {</div><div class='del'>-    { 16, 0x0c0000, 40 },</div><div class='del'>-    { 18, 0x0c4000, 40 },</div><div class='del'>-    { 20, 0x0c8000, 40 },</div><div class='del'>-    { 22, 0x0cc000, 40 },</div><div class='del'>-    { 24, 0x0d0000, 40 },</div><div class='del'>-    { 26, 0x0d4000, 40 },</div><div class='del'>-    { 28, 0x0d8000, 40 },</div><div class='del'>-    { 30, 0x0dc000, 40 },</div><div class='del'>-    {144, 0xfc0000, 40 },</div><div class='del'>-    {148, 0xfc8000, 40 },</div><div class='del'>-    {154, 0xfd0000, 40 },</div><div class='del'>-    {156, 0xfd8000, 40 },</div><div class='del'>-    {  0, 0x0c0000, 20 },</div><div class='del'>-    {  1, 0x0c2000, 20 },</div><div class='del'>-    {  2, 0x0c4000, 20 },</div><div class='del'>-    {  3, 0x0c6000, 20 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define IRQ_MASK 243</div><div class='del'>-static const struct {</div><div class='del'>-   unsigned char new_irq;</div><div class='del'>-   unsigned char old_irq;</div><div class='del'>-} irq_table[] = {</div><div class='del'>-   {  3,  3 },</div><div class='del'>-   {  4,  4 },</div><div class='del'>-   { 10, 10 },</div><div class='del'>-   { 14, 15 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static short smc_mca_adapter_ids[] __initdata = {</div><div class='del'>-	0x61c8,</div><div class='del'>-	0x61c9,</div><div class='del'>-	0x6fc0,</div><div class='del'>-	0x6fc1,</div><div class='del'>-	0x6fc2,</div><div class='del'>-	0xefd4,</div><div class='del'>-	0xefd5,</div><div class='del'>-	0xefe5,</div><div class='del'>-	0x0000</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static char *smc_mca_adapter_names[] __initdata = {</div><div class='del'>-	"SMC Ethercard PLUS Elite/A BNC/AUI (WD8013EP/A)",</div><div class='del'>-	"SMC Ethercard PLUS Elite/A UTP/AUI (WD8013WP/A)",</div><div class='del'>-	"WD Ethercard PLUS/A (WD8003E/A or WD8003ET/A)",</div><div class='del'>-	"WD Starcard PLUS/A (WD8003ST/A)",</div><div class='del'>-	"WD Ethercard PLUS 10T/A (WD8003W/A)",</div><div class='del'>-	"IBM PS/2 Adapter/A for Ethernet UTP/AUI (WD8013WP/A)",</div><div class='del'>-	"IBM PS/2 Adapter/A for Ethernet BNC/AUI (WD8013EP/A)",</div><div class='del'>-	"IBM PS/2 Adapter/A for Ethernet",</div><div class='del'>-	NULL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int ultra_found = 0;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops ultramca_netdev_ops = {</div><div class='del'>-	.ndo_open		= ultramca_open,</div><div class='del'>-	.ndo_stop		= ultramca_close_card,</div><div class='del'>-</div><div class='del'>-	.ndo_start_xmit		= ei_start_xmit,</div><div class='del'>-	.ndo_tx_timeout		= ei_tx_timeout,</div><div class='del'>-	.ndo_get_stats		= ei_get_stats,</div><div class='del'>-	.ndo_set_rx_mode	= ei_set_multicast_list,</div><div class='del'>-	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-	.ndo_poll_controller 	= ei_poll,</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init ultramca_probe(struct device *gen_dev)</div><div class='del'>-{</div><div class='del'>-	unsigned short ioaddr;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	unsigned char reg4, num_pages;</div><div class='del'>-	struct mca_device *mca_dev = to_mca_device(gen_dev);</div><div class='del'>-	char slot = mca_dev-&gt;slot;</div><div class='del'>-	unsigned char pos2 = 0xff, pos3 = 0xff, pos4 = 0xff, pos5 = 0xff;</div><div class='del'>-	int i, rc;</div><div class='del'>-	int adapter = mca_dev-&gt;index;</div><div class='del'>-	int tbase = 0;</div><div class='del'>-	int tirq = 0;</div><div class='del'>-	int base_addr = ultra_io[ultra_found];</div><div class='del'>-	int irq = ultra_irq[ultra_found];</div><div class='del'>-</div><div class='del'>-	if (base_addr || irq) {</div><div class='del'>-		printk(KERN_INFO "Probing for SMC MCA adapter");</div><div class='del'>-		if (base_addr) {</div><div class='del'>-			printk(KERN_INFO " at I/O address 0x%04x%c",</div><div class='del'>-			       base_addr, irq ? ' ' : '\n');</div><div class='del'>-		}</div><div class='del'>-		if (irq) {</div><div class='del'>-			printk(KERN_INFO "using irq %d\n", irq);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tirq = 0;</div><div class='del'>-	tbase = 0;</div><div class='del'>-</div><div class='del'>-	/* If we're trying to match a specificied irq or io address,</div><div class='del'>-	 * we'll reject the adapter found unless it's the one we're</div><div class='del'>-	 * looking for */</div><div class='del'>-</div><div class='del'>-	pos2 = mca_device_read_stored_pos(mca_dev, 2); /* io_addr */</div><div class='del'>-	pos3 = mca_device_read_stored_pos(mca_dev, 3); /* shared mem */</div><div class='del'>-	pos4 = mca_device_read_stored_pos(mca_dev, 4); /* ROM bios addr range */</div><div class='del'>-	pos5 = mca_device_read_stored_pos(mca_dev, 5); /* irq, media and RIPL */</div><div class='del'>-</div><div class='del'>-	/* Test the following conditions:</div><div class='del'>-	 * - If an irq parameter is supplied, compare it</div><div class='del'>-	 *   with the irq of the adapter we found</div><div class='del'>-	 * - If a base_addr paramater is given, compare it</div><div class='del'>-	 *   with the base_addr of the adapter we found</div><div class='del'>-	 * - Check that the irq and the base_addr of the</div><div class='del'>-	 *   adapter we found is not already in use by</div><div class='del'>-	 *   this driver</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	switch (mca_dev-&gt;index) {</div><div class='del'>-	case _61c8_SMC_Ethercard_PLUS_Elite_A_BNC_AUI_WD8013EP_A:</div><div class='del'>-	case _61c9_SMC_Ethercard_PLUS_Elite_A_UTP_AUI_WD8013EP_A:</div><div class='del'>-	case _efd4_IBM_PS2_Adapter_A_for_Ethernet_UTP_AUI_WD8013WP_A:</div><div class='del'>-	case _efd5_IBM_PS2_Adapter_A_for_Ethernet_BNC_AUI_WD8013WP_A:</div><div class='del'>-		{</div><div class='del'>-			tbase = addr_table[(pos2 &amp; 0xf0) &gt;&gt; 4].base_addr;</div><div class='del'>-			tirq  = irq_table[(pos5 &amp; 0xc) &gt;&gt; 2].new_irq;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	case _6fc0_WD_Ethercard_PLUS_A_WD8003E_A_OR_WD8003ET_A:</div><div class='del'>-	case _6fc1_WD_Starcard_PLUS_A_WD8003ST_A:</div><div class='del'>-	case _6fc2_WD_Ethercard_PLUS_10T_A_WD8003W_A:</div><div class='del'>-	case _efe5_IBM_PS2_Adapter_A_for_Ethernet:</div><div class='del'>-		{</div><div class='del'>-			tbase = ((pos2 &amp; 0x0fe) * 0x10);</div><div class='del'>-			tirq  = irq_table[(pos5 &amp; 3)].old_irq;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(!tirq || !tbase ||</div><div class='del'>-	   (irq &amp;&amp; irq != tirq) ||</div><div class='del'>-	   (base_addr &amp;&amp; tbase != base_addr))</div><div class='del'>-		/* FIXME: we're trying to force the ordering of the</div><div class='del'>-		 * devices here, there should be a way of getting this</div><div class='del'>-		 * to happen */</div><div class='del'>-		return -ENXIO;</div><div class='del'>-</div><div class='del'>-        /* Adapter found. */</div><div class='del'>-	dev  = alloc_ei_netdev();</div><div class='del'>-	if(!dev)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	SET_NETDEV_DEV(dev, gen_dev);</div><div class='del'>-	mca_device_set_name(mca_dev, smc_mca_adapter_names[adapter]);</div><div class='del'>-	mca_device_set_claim(mca_dev, 1);</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "smc_mca: %s found in slot %d\n",</div><div class='del'>-		       smc_mca_adapter_names[adapter], slot + 1);</div><div class='del'>-</div><div class='del'>-	ultra_found++;</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr = ioaddr = mca_device_transform_ioport(mca_dev, tbase);</div><div class='del'>-	dev-&gt;irq       = mca_device_transform_irq(mca_dev, tirq);</div><div class='del'>-	dev-&gt;mem_start = 0;</div><div class='del'>-	num_pages      = 40;</div><div class='del'>-</div><div class='del'>-	switch (adapter) {	/* card-# in const array above [hs] */</div><div class='del'>-		case _61c8_SMC_Ethercard_PLUS_Elite_A_BNC_AUI_WD8013EP_A:</div><div class='del'>-		case _61c9_SMC_Ethercard_PLUS_Elite_A_UTP_AUI_WD8013EP_A:</div><div class='del'>-		{</div><div class='del'>-			for (i = 0; i &lt; 16; i++) { /* taking 16 counts</div><div class='del'>-						    * up to 15 [hs] */</div><div class='del'>-				if (mem_table[i].mem_index == (pos3 &amp; ~MEM_MASK)) {</div><div class='del'>-					dev-&gt;mem_start = (unsigned long)</div><div class='del'>-					  mca_device_transform_memory(mca_dev, (void *)mem_table[i].mem_start);</div><div class='del'>-					num_pages = mem_table[i].num_pages;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		case _6fc0_WD_Ethercard_PLUS_A_WD8003E_A_OR_WD8003ET_A:</div><div class='del'>-		case _6fc1_WD_Starcard_PLUS_A_WD8003ST_A:</div><div class='del'>-		case _6fc2_WD_Ethercard_PLUS_10T_A_WD8003W_A:</div><div class='del'>-		case _efe5_IBM_PS2_Adapter_A_for_Ethernet:</div><div class='del'>-		{</div><div class='del'>-			dev-&gt;mem_start = (unsigned long)</div><div class='del'>-			  mca_device_transform_memory(mca_dev, (void *)((pos3 &amp; 0xfc) * 0x1000));</div><div class='del'>-			num_pages = 0x40;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		case _efd4_IBM_PS2_Adapter_A_for_Ethernet_UTP_AUI_WD8013WP_A:</div><div class='del'>-		case _efd5_IBM_PS2_Adapter_A_for_Ethernet_BNC_AUI_WD8013WP_A:</div><div class='del'>-		{</div><div class='del'>-			/* courtesy of gamera@quartz.ocn.ne.jp, pos3 indicates</div><div class='del'>-			 * the index of the 0x2000 step.</div><div class='del'>-			 * beware different number of pages [hs]</div><div class='del'>-			 */</div><div class='del'>-			dev-&gt;mem_start = (unsigned long)</div><div class='del'>-			  mca_device_transform_memory(mca_dev, (void *)(0xc0000 + (0x2000 * (pos3 &amp; 0xf))));</div><div class='del'>-			num_pages = 0x20 + (2 * (pos3 &amp; 0x10));</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* sanity check, shouldn't happen */</div><div class='del'>-	if (dev-&gt;mem_start == 0) {</div><div class='del'>-		rc = -ENODEV;</div><div class='del'>-		goto err_unclaim;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!request_region(ioaddr, ULTRA_IO_EXTENT, DRV_NAME)) {</div><div class='del'>-		rc = -ENODEV;</div><div class='del'>-		goto err_unclaim;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	reg4 = inb(ioaddr + 4) &amp; 0x7f;</div><div class='del'>-	outb(reg4, ioaddr + 4);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = inb(ioaddr + 8 + i);</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "smc_mca[%d]: Parameters: %#3x, %pM",</div><div class='del'>-	       slot + 1, ioaddr, dev-&gt;dev_addr);</div><div class='del'>-</div><div class='del'>-	/* Switch from the station address to the alternate register set</div><div class='del'>-	 * and read the useful registers there.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	outb(0x80 | reg4, ioaddr + 4);</div><div class='del'>-</div><div class='del'>-	/* Enable FINE16 mode to avoid BIOS ROM width mismatches @ reboot.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	outb(0x80 | inb(ioaddr + 0x0c), ioaddr + 0x0c);</div><div class='del'>-</div><div class='del'>-	/* Switch back to the station address register set so that</div><div class='del'>-	 * the MS-DOS driver can find the card after a warm boot.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	outb(reg4, ioaddr + 4);</div><div class='del'>-</div><div class='del'>-	dev_set_drvdata(gen_dev, dev);</div><div class='del'>-</div><div class='del'>-	/* The 8390 isn't at the base address, so fake the offset</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr = ioaddr + ULTRA_NIC_OFFSET;</div><div class='del'>-</div><div class='del'>-	ei_status.name = "SMC Ultra MCA";</div><div class='del'>-	ei_status.word16 = 1;</div><div class='del'>-	ei_status.tx_start_page = START_PG;</div><div class='del'>-	ei_status.rx_start_page = START_PG + TX_PAGES;</div><div class='del'>-	ei_status.stop_page = num_pages;</div><div class='del'>-</div><div class='del'>-	ei_status.mem = ioremap(dev-&gt;mem_start, (ei_status.stop_page - START_PG) * 256);</div><div class='del'>-	if (!ei_status.mem) {</div><div class='del'>-		rc = -ENOMEM;</div><div class='del'>-		goto err_release_region;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;mem_end = dev-&gt;mem_start + (ei_status.stop_page - START_PG) * 256;</div><div class='del'>-</div><div class='del'>-	printk(", IRQ %d memory %#lx-%#lx.\n",</div><div class='del'>-	dev-&gt;irq, dev-&gt;mem_start, dev-&gt;mem_end - 1);</div><div class='del'>-</div><div class='del'>-	ei_status.reset_8390 = &amp;ultramca_reset_8390;</div><div class='del'>-	ei_status.block_input = &amp;ultramca_block_input;</div><div class='del'>-	ei_status.block_output = &amp;ultramca_block_output;</div><div class='del'>-	ei_status.get_8390_hdr = &amp;ultramca_get_8390_hdr;</div><div class='del'>-</div><div class='del'>-	ei_status.priv = slot;</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;ultramca_netdev_ops;</div><div class='del'>-</div><div class='del'>-	NS8390_init(dev, 0);</div><div class='del'>-</div><div class='del'>-	rc = register_netdev(dev);</div><div class='del'>-	if (rc)</div><div class='del'>-		goto err_unmap;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_unmap:</div><div class='del'>-	iounmap(ei_status.mem);</div><div class='del'>-err_release_region:</div><div class='del'>-	release_region(ioaddr, ULTRA_IO_EXTENT);</div><div class='del'>-err_unclaim:</div><div class='del'>-	mca_device_set_claim(mca_dev, 0);</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ultramca_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int ioaddr = dev-&gt;base_addr - ULTRA_NIC_OFFSET; /* ASIC addr */</div><div class='del'>-	int retval;</div><div class='del'>-</div><div class='del'>-	if ((retval = request_irq(dev-&gt;irq, ei_interrupt, 0, dev-&gt;name, dev)))</div><div class='del'>-		return retval;</div><div class='del'>-</div><div class='del'>-	outb(ULTRA_MEMENB, ioaddr); /* Enable memory */</div><div class='del'>-	outb(0x80, ioaddr + 5);     /* ??? */</div><div class='del'>-	outb(0x01, ioaddr + 6);     /* Enable interrupts and memory. */</div><div class='del'>-	outb(0x04, ioaddr + 5);     /* ??? */</div><div class='del'>-</div><div class='del'>-	/* Set the early receive warning level in window 0 high enough not</div><div class='del'>-	 * to receive ERW interrupts.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/* outb_p(E8390_NODMA + E8390_PAGE0, dev-&gt;base_addr);</div><div class='del'>-	 * outb(0xff, dev-&gt;base_addr + EN0_ERWCNT);</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	ei_open(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ultramca_reset_8390(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int ioaddr = dev-&gt;base_addr - ULTRA_NIC_OFFSET; /* ASIC addr */</div><div class='del'>-</div><div class='del'>-	outb(ULTRA_RESET, ioaddr);</div><div class='del'>-	if (ei_debug &gt; 1)</div><div class='del'>-		printk("resetting Ultra, t=%ld...", jiffies);</div><div class='del'>-	ei_status.txing = 0;</div><div class='del'>-</div><div class='del'>-	outb(0x80, ioaddr + 5);     /* ??? */</div><div class='del'>-	outb(0x01, ioaddr + 6);     /* Enable interrupts and memory. */</div><div class='del'>-</div><div class='del'>-	if (ei_debug &gt; 1)</div><div class='del'>-		printk("reset done\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Grab the 8390 specific header. Similar to the block_input routine, but</div><div class='del'>- * we don't need to be concerned with ring wrap as the header will be at</div><div class='del'>- * the start of a page, so we optimize accordingly.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void ultramca_get_8390_hdr(struct net_device *dev, struct e8390_pkt_hdr *hdr, int ring_page)</div><div class='del'>-{</div><div class='del'>-	void __iomem *hdr_start = ei_status.mem + ((ring_page - START_PG) &lt;&lt; 8);</div><div class='del'>-</div><div class='del'>-#ifdef notdef</div><div class='del'>-	/* Officially this is what we are doing, but the readl() is faster */</div><div class='del'>-	memcpy_fromio(hdr, hdr_start, sizeof(struct e8390_pkt_hdr));</div><div class='del'>-#else</div><div class='del'>-	((unsigned int*)hdr)[0] = readl(hdr_start);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Block input and output are easy on shared memory ethercards, the only</div><div class='del'>- * complication is when the ring buffer wraps.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void ultramca_block_input(struct net_device *dev, int count, struct sk_buff *skb, int ring_offset)</div><div class='del'>-{</div><div class='del'>-	void __iomem *xfer_start = ei_status.mem + ring_offset - START_PG * 256;</div><div class='del'>-</div><div class='del'>-	if (ring_offset + count &gt; ei_status.stop_page * 256) {</div><div class='del'>-		/* We must wrap the input move. */</div><div class='del'>-		int semi_count = ei_status.stop_page * 256 - ring_offset;</div><div class='del'>-		memcpy_fromio(skb-&gt;data, xfer_start, semi_count);</div><div class='del'>-		count -= semi_count;</div><div class='del'>-		memcpy_fromio(skb-&gt;data + semi_count, ei_status.mem + TX_PAGES * 256, count);</div><div class='del'>-	} else {</div><div class='del'>-		memcpy_fromio(skb-&gt;data, xfer_start, count);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ultramca_block_output(struct net_device *dev, int count, const unsigned char *buf,</div><div class='del'>-                int start_page)</div><div class='del'>-{</div><div class='del'>-	void __iomem *shmem = ei_status.mem + ((start_page - START_PG) &lt;&lt; 8);</div><div class='del'>-</div><div class='del'>-	memcpy_toio(shmem, buf, count);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ultramca_close_card(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int ioaddr = dev-&gt;base_addr - ULTRA_NIC_OFFSET; /* ASIC addr */</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	if (ei_debug &gt; 1)</div><div class='del'>-		printk("%s: Shutting down ethercard.\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	outb(0x00, ioaddr + 6);     /* Disable interrupts. */</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-</div><div class='del'>-	NS8390_init(dev, 0);</div><div class='del'>-	/* We should someday disable shared memory and change to 8-bit mode</div><div class='del'>-         * "just in case"...</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ultramca_remove(struct device *gen_dev)</div><div class='del'>-{</div><div class='del'>-	struct mca_device *mca_dev = to_mca_device(gen_dev);</div><div class='del'>-	struct net_device *dev = dev_get_drvdata(gen_dev);</div><div class='del'>-</div><div class='del'>-	if (dev) {</div><div class='del'>-		/* NB: ultra_close_card() does free_irq */</div><div class='del'>-		int ioaddr = dev-&gt;base_addr - ULTRA_NIC_OFFSET;</div><div class='del'>-</div><div class='del'>-		unregister_netdev(dev);</div><div class='del'>-		mca_device_set_claim(mca_dev, 0);</div><div class='del'>-		release_region(ioaddr, ULTRA_IO_EXTENT);</div><div class='del'>-		iounmap(ei_status.mem);</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static struct mca_driver ultra_driver = {</div><div class='del'>-	.id_table = smc_mca_adapter_ids,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "smc-mca",</div><div class='del'>-		.bus = &amp;mca_bus_type,</div><div class='del'>-		.probe = ultramca_probe,</div><div class='del'>-		.remove = ultramca_remove,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init ultramca_init_module(void)</div><div class='del'>-{</div><div class='del'>-	if(!MCA_bus)</div><div class='del'>-		return -ENXIO;</div><div class='del'>-</div><div class='del'>-	mca_register_driver(&amp;ultra_driver);</div><div class='del'>-</div><div class='del'>-	return ultra_found ? 0 : -ENXIO;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ultramca_cleanup_module(void)</div><div class='del'>-{</div><div class='del'>-	mca_unregister_driver(&amp;ultra_driver);</div><div class='del'>-}</div><div class='del'>-module_init(ultramca_init_module);</div><div class='del'>-module_exit(ultramca_cleanup_module);</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig<br/>index c63a64cb6085..a11af5cc4844 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/Kconfig</a></div><div class='hunk'>@@ -174,6 +174,7 @@ source "drivers/net/ethernet/tile/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/toshiba/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/tundra/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/via/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/wiznet/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/xilinx/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/xircom/Kconfig"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile<br/>index 9676a5109d94..878ad32b93f2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/Makefile</a></div><div class='hunk'>@@ -73,5 +73,6 @@ obj-$(CONFIG_TILE_NET) += tile/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_TOSHIBA) += toshiba/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_VIA) += via/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_WIZNET) += wiznet/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/</div><div class='head'>diff --git a/drivers/net/ethernet/adaptec/starfire.c b/drivers/net/ethernet/adaptec/starfire.c<br/>index d896816512ca..d920a529ba22 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/adaptec/starfire.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/adaptec/starfire.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/adaptec/starfire.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/adaptec/starfire.c</a></div><div class='hunk'>@@ -114,15 +114,6 @@ static int rx_copybreak /* = 0 */;</div><div class='ctx'> #define DMA_BURST_SIZE 128</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/* Used to pass the media type, etc.</div><div class='del'>-   Both 'options[]' and 'full_duplex[]' exist for driver interoperability.</div><div class='del'>-   The media type is usually passed in 'options[]'.</div><div class='del'>-   These variables are deprecated, use ethtool instead. -Ion</div><div class='del'>-*/</div><div class='del'>-#define MAX_UNITS 8		/* More are supported, limit only on options */</div><div class='del'>-static int options[MAX_UNITS] = {0, };</div><div class='del'>-static int full_duplex[MAX_UNITS] = {0, };</div><div class='del'>-</div><div class='ctx'> /* Operational parameters that are set at compile time. */</div><div class='ctx'> </div><div class='ctx'> /* The "native" ring sizes are either 256 or 2048.</div><div class='hunk'>@@ -192,8 +183,6 @@ module_param(debug, int, 0);</div><div class='ctx'> module_param(rx_copybreak, int, 0);</div><div class='ctx'> module_param(intr_latency, int, 0);</div><div class='ctx'> module_param(small_frames, int, 0);</div><div class='del'>-module_param_array(options, int, NULL, 0);</div><div class='del'>-module_param_array(full_duplex, int, NULL, 0);</div><div class='ctx'> module_param(enable_hw_cksum, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(max_interrupt_work, "Maximum events handled per interrupt");</div><div class='ctx'> MODULE_PARM_DESC(mtu, "MTU (all boards)");</div><div class='hunk'>@@ -201,8 +190,6 @@ MODULE_PARM_DESC(debug, "Debug level (0-6)");</div><div class='ctx'> MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");</div><div class='ctx'> MODULE_PARM_DESC(intr_latency, "Maximum interrupt latency, in microseconds");</div><div class='ctx'> MODULE_PARM_DESC(small_frames, "Maximum size of receive frames that bypass interrupt latency (0,64,128,256,512)");</div><div class='del'>-MODULE_PARM_DESC(options, "Deprecated: Bits 0-3: media type, bit 17: full duplex");</div><div class='del'>-MODULE_PARM_DESC(full_duplex, "Deprecated: Forced full-duplex setting (0/1)");</div><div class='ctx'> MODULE_PARM_DESC(enable_hw_cksum, "Enable/disable hardware cksum support (0/1)");</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -657,10 +644,10 @@ static const struct net_device_ops netdev_ops = {</div><div class='ctx'> static int __devinit starfire_init_one(struct pci_dev *pdev,</div><div class='ctx'> 				       const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='add'>+	struct device *d = &amp;pdev-&gt;dev;</div><div class='ctx'> 	struct netdev_private *np;</div><div class='del'>-	int i, irq, option, chip_idx = ent-&gt;driver_data;</div><div class='add'>+	int i, irq, chip_idx = ent-&gt;driver_data;</div><div class='ctx'> 	struct net_device *dev;</div><div class='del'>-	static int card_idx = -1;</div><div class='ctx'> 	long ioaddr;</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> 	int drv_flags, io_size;</div><div class='hunk'>@@ -673,15 +660,13 @@ static int __devinit starfire_init_one(struct pci_dev *pdev,</div><div class='ctx'> 		printk(version);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	card_idx++;</div><div class='del'>-</div><div class='ctx'> 	if (pci_enable_device (pdev))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	ioaddr = pci_resource_start(pdev, 0);</div><div class='ctx'> 	io_size = pci_resource_len(pdev, 0);</div><div class='ctx'> 	if (!ioaddr || ((pci_resource_flags(pdev, 0) &amp; IORESOURCE_MEM) == 0)) {</div><div class='del'>-		printk(KERN_ERR DRV_NAME " %d: no PCI MEM resources, aborting\n", card_idx);</div><div class='add'>+		dev_err(d, "no PCI MEM resources, aborting\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -694,14 +679,14 @@ static int __devinit starfire_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	irq = pdev-&gt;irq;</div><div class='ctx'> </div><div class='ctx'> 	if (pci_request_regions (pdev, DRV_NAME)) {</div><div class='del'>-		printk(KERN_ERR DRV_NAME " %d: cannot reserve PCI resources, aborting\n", card_idx);</div><div class='add'>+		dev_err(d, "cannot reserve PCI resources, aborting\n");</div><div class='ctx'> 		goto err_out_free_netdev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	base = ioremap(ioaddr, io_size);</div><div class='ctx'> 	if (!base) {</div><div class='del'>-		printk(KERN_ERR DRV_NAME " %d: cannot remap %#x @ %#lx, aborting\n",</div><div class='del'>-			card_idx, io_size, ioaddr);</div><div class='add'>+		dev_err(d, "cannot remap %#x @ %#lx, aborting\n",</div><div class='add'>+			io_size, ioaddr);</div><div class='ctx'> 		goto err_out_free_res;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -753,9 +738,6 @@ static int __devinit starfire_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	/* wait a little longer */</div><div class='ctx'> 	udelay(1000);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = (unsigned long)base;</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-</div><div class='ctx'> 	np = netdev_priv(dev);</div><div class='ctx'> 	np-&gt;dev = dev;</div><div class='ctx'> 	np-&gt;base = base;</div><div class='hunk'>@@ -772,21 +754,6 @@ static int __devinit starfire_init_one(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	drv_flags = netdrv_tbl[chip_idx].drv_flags;</div><div class='ctx'> </div><div class='del'>-	option = card_idx &lt; MAX_UNITS ? options[card_idx] : 0;</div><div class='del'>-	if (dev-&gt;mem_start)</div><div class='del'>-		option = dev-&gt;mem_start;</div><div class='del'>-</div><div class='del'>-	/* The lower four bits are the media type. */</div><div class='del'>-	if (option &amp; 0x200)</div><div class='del'>-		np-&gt;mii_if.full_duplex = 1;</div><div class='del'>-</div><div class='del'>-	if (card_idx &lt; MAX_UNITS &amp;&amp; full_duplex[card_idx] &gt; 0)</div><div class='del'>-		np-&gt;mii_if.full_duplex = 1;</div><div class='del'>-</div><div class='del'>-	if (np-&gt;mii_if.full_duplex)</div><div class='del'>-		np-&gt;mii_if.force_media = 1;</div><div class='del'>-	else</div><div class='del'>-		np-&gt;mii_if.force_media = 0;</div><div class='ctx'> 	np-&gt;speed100 = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* timer resolution is 128 * 0.8us */</div><div class='hunk'>@@ -909,13 +876,14 @@ static int netdev_open(struct net_device *dev)</div><div class='ctx'> 	const __be32 *fw_rx_data, *fw_tx_data;</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='ctx'> 	int i, retval;</div><div class='ctx'> 	size_t tx_size, rx_size;</div><div class='ctx'> 	size_t tx_done_q_size, rx_done_q_size, tx_ring_size, rx_ring_size;</div><div class='ctx'> </div><div class='ctx'> 	/* Do we ever need to reset the chip??? */</div><div class='ctx'> </div><div class='del'>-	retval = request_irq(dev-&gt;irq, intr_handler, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	retval = request_irq(irq, intr_handler, IRQF_SHARED, dev-&gt;name, dev);</div><div class='ctx'> 	if (retval)</div><div class='ctx'> 		return retval;</div><div class='ctx'> </div><div class='hunk'>@@ -924,7 +892,7 @@ static int netdev_open(struct net_device *dev)</div><div class='ctx'> 	writel(1, ioaddr + PCIDeviceConfig);</div><div class='ctx'> 	if (debug &gt; 1)</div><div class='ctx'> 		printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",</div><div class='del'>-		       dev-&gt;name, dev-&gt;irq);</div><div class='add'>+		       dev-&gt;name, irq);</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate the various queues. */</div><div class='ctx'> 	if (!np-&gt;queue_mem) {</div><div class='hunk'>@@ -935,7 +903,7 @@ static int netdev_open(struct net_device *dev)</div><div class='ctx'> 		np-&gt;queue_mem_size = tx_done_q_size + rx_done_q_size + tx_ring_size + rx_ring_size;</div><div class='ctx'> 		np-&gt;queue_mem = pci_alloc_consistent(np-&gt;pci_dev, np-&gt;queue_mem_size, &amp;np-&gt;queue_mem_dma);</div><div class='ctx'> 		if (np-&gt;queue_mem == NULL) {</div><div class='del'>-			free_irq(dev-&gt;irq, dev);</div><div class='add'>+			free_irq(irq, dev);</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1962,7 +1930,7 @@ static int netdev_close(struct net_device *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(np-&gt;pci_dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Free all the skbuffs in the Rx queue. */</div><div class='ctx'> 	for (i = 0; i &lt; RX_RING_SIZE; i++) {</div><div class='head'>diff --git a/drivers/net/ethernet/adi/bfin_mac.c b/drivers/net/ethernet/adi/bfin_mac.c<br/>index ab4daeccdf98..f816426e1085 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/adi/bfin_mac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/adi/bfin_mac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/adi/bfin_mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/adi/bfin_mac.c</a></div><div class='hunk'>@@ -548,6 +548,25 @@ static int bfin_mac_ethtool_setwol(struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bfin_mac_ethtool_get_ts_info(struct net_device *dev,</div><div class='add'>+	struct ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	info-&gt;so_timestamping =</div><div class='add'>+		SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_SYS_HARDWARE;</div><div class='add'>+	info-&gt;phc_index = -1;</div><div class='add'>+	info-&gt;tx_types =</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_TX_OFF) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_TX_ON);</div><div class='add'>+	info-&gt;rx_filters =</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_EVENT);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ethtool_ops bfin_mac_ethtool_ops = {</div><div class='ctx'> 	.get_settings = bfin_mac_ethtool_getsettings,</div><div class='ctx'> 	.set_settings = bfin_mac_ethtool_setsettings,</div><div class='hunk'>@@ -555,6 +574,7 @@ static const struct ethtool_ops bfin_mac_ethtool_ops = {</div><div class='ctx'> 	.get_drvinfo = bfin_mac_ethtool_getdrvinfo,</div><div class='ctx'> 	.get_wol = bfin_mac_ethtool_getwol,</div><div class='ctx'> 	.set_wol = bfin_mac_ethtool_setwol,</div><div class='add'>+	.get_ts_info = bfin_mac_ethtool_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**************************************************************************/</div><div class='head'>diff --git a/drivers/net/ethernet/amd/ariadne.c b/drivers/net/ethernet/amd/ariadne.c<br/>index f4c228e4d76c..f2958df9a1e4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/amd/ariadne.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/amd/ariadne.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/amd/ariadne.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/amd/ariadne.c</a></div><div class='hunk'>@@ -213,10 +213,10 @@ static int ariadne_rx(struct net_device *dev)</div><div class='ctx'> 						(const void *)priv-&gt;rx_buff[entry],</div><div class='ctx'> 						pkt_len);</div><div class='ctx'> 			skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='del'>-			netdev_dbg(dev, "RX pkt type 0x%04x from %pM to %pM data 0x%08x len %d\n",</div><div class='add'>+			netdev_dbg(dev, "RX pkt type 0x%04x from %pM to %pM data %p len %u\n",</div><div class='ctx'> 				   ((u_short *)skb-&gt;data)[6],</div><div class='ctx'> 				   skb-&gt;data + 6, skb-&gt;data,</div><div class='del'>-				   (int)skb-&gt;data, (int)skb-&gt;len);</div><div class='add'>+				   skb-&gt;data, skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 			netif_rx(skb);</div><div class='ctx'> 			dev-&gt;stats.rx_packets++;</div><div class='hunk'>@@ -566,10 +566,10 @@ static netdev_tx_t ariadne_start_xmit(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	/* Fill in a Tx ring entry */</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(dev, "TX pkt type 0x%04x from %pM to %pM data 0x%08x len %d\n",</div><div class='add'>+	netdev_dbg(dev, "TX pkt type 0x%04x from %pM to %pM data %p len %u\n",</div><div class='ctx'> 		   ((u_short *)skb-&gt;data)[6],</div><div class='ctx'> 		   skb-&gt;data + 6, skb-&gt;data,</div><div class='del'>-		   (int)skb-&gt;data, (int)skb-&gt;len);</div><div class='add'>+		   skb-&gt;data, skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/amd/atarilance.c b/drivers/net/ethernet/amd/atarilance.c<br/>index 70ed79c46245..84219df72f51 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/amd/atarilance.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/amd/atarilance.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/amd/atarilance.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/amd/atarilance.c</a></div><div class='hunk'>@@ -558,21 +558,18 @@ static unsigned long __init lance_probe1( struct net_device *dev,</div><div class='ctx'> 			printk( "Lance: request for irq %d failed\n", IRQ_AUTO_5 );</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='del'>-		dev-&gt;irq = (unsigned short)IRQ_AUTO_5;</div><div class='add'>+		dev-&gt;irq = IRQ_AUTO_5;</div><div class='ctx'> 	}</div><div class='ctx'> 	else {</div><div class='del'>-		/* For VME-RieblCards, request a free VME int;</div><div class='del'>-		 * (This must be unsigned long, since dev-&gt;irq is short and the</div><div class='del'>-		 * IRQ_MACHSPEC bit would be cut off...)</div><div class='del'>-		 */</div><div class='del'>-		unsigned long irq = atari_register_vme_int();</div><div class='add'>+		/* For VME-RieblCards, request a free VME int */</div><div class='add'>+		unsigned int irq = atari_register_vme_int();</div><div class='ctx'> 		if (!irq) {</div><div class='ctx'> 			printk( "Lance: request for VME interrupt failed\n" );</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (request_irq(irq, lance_interrupt, IRQ_TYPE_PRIO,</div><div class='ctx'> 		            "Riebl-VME Ethernet", dev)) {</div><div class='del'>-			printk( "Lance: request for irq %ld failed\n", irq );</div><div class='add'>+			printk( "Lance: request for irq %u failed\n", irq );</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		dev-&gt;irq = irq;</div><div class='head'>diff --git a/drivers/net/ethernet/amd/depca.c b/drivers/net/ethernet/amd/depca.c<br/>index 86dd95766a64..c771de71612a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/amd/depca.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/amd/depca.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/amd/depca.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/amd/depca.c</a></div><div class='hunk'>@@ -155,23 +155,10 @@</div><div class='ctx'>     2 depca's in a PC).</div><div class='ctx'> </div><div class='ctx'>     ************************************************************************</div><div class='del'>-    Support for MCA EtherWORKS cards added 11-3-98.</div><div class='add'>+    Support for MCA EtherWORKS cards added 11-3-98. (MCA since deleted)</div><div class='ctx'>     Verified to work with up to 2 DE212 cards in a system (although not</div><div class='ctx'>       fully stress-tested).</div><div class='ctx'> </div><div class='del'>-    Currently known bugs/limitations:</div><div class='del'>-</div><div class='del'>-    Note:  with the MCA stuff as a module, it trusts the MCA configuration,</div><div class='del'>-           not the command line for IRQ and memory address.  You can</div><div class='del'>-           specify them if you want, but it will throw your values out.</div><div class='del'>-           You still have to pass the IO address it was configured as</div><div class='del'>-           though.</div><div class='del'>-</div><div class='del'>-    ************************************************************************</div><div class='del'>-    TO DO:</div><div class='del'>-    ------</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'>     Revision History</div><div class='ctx'>     ----------------</div><div class='ctx'> </div><div class='hunk'>@@ -261,10 +248,6 @@</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_EISA</div><div class='ctx'> #include &lt;linux/eisa.h&gt;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -360,44 +343,6 @@ static struct eisa_driver depca_eisa_driver = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-/*</div><div class='del'>-** Adapter ID for the MCA EtherWORKS DE210/212 adapter</div><div class='del'>-*/</div><div class='del'>-#define DE210_ID 0x628d</div><div class='del'>-#define DE212_ID 0x6def</div><div class='del'>-</div><div class='del'>-static short depca_mca_adapter_ids[] = {</div><div class='del'>-	DE210_ID,</div><div class='del'>-	DE212_ID,</div><div class='del'>-	0x0000</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static char *depca_mca_adapter_name[] = {</div><div class='del'>-	"DEC EtherWORKS MC Adapter (DE210)",</div><div class='del'>-	"DEC EtherWORKS MC Adapter (DE212)",</div><div class='del'>-	NULL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static enum depca_type depca_mca_adapter_type[] = {</div><div class='del'>-	de210,</div><div class='del'>-	de212,</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int depca_mca_probe (struct device *);</div><div class='del'>-</div><div class='del'>-static struct mca_driver depca_mca_driver = {</div><div class='del'>-	.id_table = depca_mca_adapter_ids,</div><div class='del'>-	.driver   = {</div><div class='del'>-		.name   = depca_string,</div><div class='del'>-		.bus    = &amp;mca_bus_type,</div><div class='del'>-		.probe  = depca_mca_probe,</div><div class='del'>-		.remove = __devexit_p(depca_device_remove),</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static int depca_isa_probe (struct platform_device *);</div><div class='ctx'> </div><div class='ctx'> static int __devexit depca_isa_remove(struct platform_device *pdev)</div><div class='hunk'>@@ -464,8 +409,7 @@ struct depca_private {</div><div class='ctx'> 	char adapter_name[DEPCA_STRLEN];	/* /proc/ioports string                  */</div><div class='ctx'> 	enum depca_type adapter;		/* Adapter type */</div><div class='ctx'> 	enum {</div><div class='del'>-                DEPCA_BUS_MCA = 1,</div><div class='del'>-                DEPCA_BUS_ISA,</div><div class='add'>+                DEPCA_BUS_ISA = 1,</div><div class='ctx'>                 DEPCA_BUS_EISA,</div><div class='ctx'>         } depca_bus;	        /* type of bus */</div><div class='ctx'> 	struct depca_init init_block;	/* Shadow Initialization block            */</div><div class='hunk'>@@ -624,12 +568,6 @@ static int __init depca_hw_init (struct net_device *dev, struct device *device)</div><div class='ctx'> 	       dev_name(device), depca_signature[lp-&gt;adapter], ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	switch (lp-&gt;depca_bus) {</div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-	case DEPCA_BUS_MCA:</div><div class='del'>-		printk(" (MCA slot %d)", to_mca_device(device)-&gt;slot + 1);</div><div class='del'>-		break;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_EISA</div><div class='ctx'> 	case DEPCA_BUS_EISA:</div><div class='ctx'> 		printk(" (EISA slot %d)", to_eisa_device(device)-&gt;slot);</div><div class='hunk'>@@ -661,10 +599,7 @@ static int __init depca_hw_init (struct net_device *dev, struct device *device)</div><div class='ctx'> 	if (nicsr &amp; BUF) {</div><div class='ctx'> 		nicsr &amp;= ~BS;	/* DEPCA RAM in top 32k */</div><div class='ctx'> 		netRAM -= 32;</div><div class='del'>-</div><div class='del'>-		/* Only EISA/ISA needs start address to be re-computed */</div><div class='del'>-		if (lp-&gt;depca_bus != DEPCA_BUS_MCA)</div><div class='del'>-			mem_start += 0x8000;</div><div class='add'>+		mem_start += 0x8000;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((mem_len = (NUM_RX_DESC * (sizeof(struct depca_rx_desc) + RX_BUFF_SZ) + NUM_TX_DESC * (sizeof(struct depca_tx_desc) + TX_BUFF_SZ) + sizeof(struct depca_init)))</div><div class='hunk'>@@ -1079,7 +1014,8 @@ static int depca_rx(struct net_device *dev)</div><div class='ctx'> 						} else {</div><div class='ctx'> 							lp-&gt;pktStats.multicast++;</div><div class='ctx'> 						}</div><div class='del'>-					} else if (compare_ether_addr(buf, dev-&gt;dev_addr) == 0) {</div><div class='add'>+					} else if (ether_addr_equal(buf,</div><div class='add'>+								    dev-&gt;dev_addr)) {</div><div class='ctx'> 						lp-&gt;pktStats.unicast++;</div><div class='ctx'> 					}</div><div class='ctx'> </div><div class='hunk'>@@ -1324,130 +1260,6 @@ static int __init depca_common_init (u_long ioaddr, struct net_device **devp)</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-/*</div><div class='del'>-** Microchannel bus I/O device probe</div><div class='del'>-*/</div><div class='del'>-static int __init depca_mca_probe(struct device *device)</div><div class='del'>-{</div><div class='del'>-	unsigned char pos[2];</div><div class='del'>-	unsigned char where;</div><div class='del'>-	unsigned long iobase, mem_start;</div><div class='del'>-	int irq, err;</div><div class='del'>-	struct mca_device *mdev = to_mca_device (device);</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct depca_private *lp;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	** Search for the adapter.  If an address has been given, search</div><div class='del'>-	** specifically for the card at that address.  Otherwise find the</div><div class='del'>-	** first card in the system.</div><div class='del'>-	*/</div><div class='del'>-</div><div class='del'>-	pos[0] = mca_device_read_stored_pos(mdev, 2);</div><div class='del'>-	pos[1] = mca_device_read_stored_pos(mdev, 3);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	** IO of card is handled by bits 1 and 2 of pos0.</div><div class='del'>-	**</div><div class='del'>-	**    bit2 bit1    IO</div><div class='del'>-	**       0    0    0x2c00</div><div class='del'>-	**       0    1    0x2c10</div><div class='del'>-	**       1    0    0x2c20</div><div class='del'>-	**       1    1    0x2c30</div><div class='del'>-	*/</div><div class='del'>-	where = (pos[0] &amp; 6) &gt;&gt; 1;</div><div class='del'>-	iobase = 0x2c00 + (0x10 * where);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	** Found the adapter we were looking for. Now start setting it up.</div><div class='del'>-	**</div><div class='del'>-	** First work on decoding the IRQ.  It's stored in the lower 4 bits</div><div class='del'>-	** of pos1.  Bits are as follows (from the ADF file):</div><div class='del'>-	**</div><div class='del'>-	**      Bits</div><div class='del'>-	**   3   2   1   0    IRQ</div><div class='del'>-	**   --------------------</div><div class='del'>-	**   0   0   1   0     5</div><div class='del'>-	**   0   0   0   1     9</div><div class='del'>-	**   0   1   0   0    10</div><div class='del'>-	**   1   0   0   0    11</div><div class='del'>-	*/</div><div class='del'>-	where = pos[1] &amp; 0x0f;</div><div class='del'>-	switch (where) {</div><div class='del'>-	case 1:</div><div class='del'>-		irq = 9;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		irq = 5;</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		irq = 10;</div><div class='del'>-		break;</div><div class='del'>-	case 8:</div><div class='del'>-		irq = 11;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		printk("%s: mca_probe IRQ error.  You should never get here (%d).\n", mdev-&gt;name, where);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	** Shared memory address of adapter is stored in bits 3-5 of pos0.</div><div class='del'>-	** They are mapped as follows:</div><div class='del'>-	**</div><div class='del'>-	**    Bit</div><div class='del'>-	**   5  4  3       Memory Addresses</div><div class='del'>-	**   0  0  0       C0000-CFFFF (64K)</div><div class='del'>-	**   1  0  0       C8000-CFFFF (32K)</div><div class='del'>-	**   0  0  1       D0000-DFFFF (64K)</div><div class='del'>-	**   1  0  1       D8000-DFFFF (32K)</div><div class='del'>-	**   0  1  0       E0000-EFFFF (64K)</div><div class='del'>-	**   1  1  0       E8000-EFFFF (32K)</div><div class='del'>-	*/</div><div class='del'>-	where = (pos[0] &amp; 0x18) &gt;&gt; 3;</div><div class='del'>-	mem_start = 0xc0000 + (where * 0x10000);</div><div class='del'>-	if (pos[0] &amp; 0x20) {</div><div class='del'>-		mem_start += 0x8000;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* claim the slot */</div><div class='del'>-	strncpy(mdev-&gt;name, depca_mca_adapter_name[mdev-&gt;index],</div><div class='del'>-		sizeof(mdev-&gt;name));</div><div class='del'>-	mca_device_set_claim(mdev, 1);</div><div class='del'>-</div><div class='del'>-        /*</div><div class='del'>-	** Get everything allocated and initialized...  (almost just</div><div class='del'>-	** like the ISA and EISA probes)</div><div class='del'>-	*/</div><div class='del'>-	irq = mca_device_transform_irq(mdev, irq);</div><div class='del'>-	iobase = mca_device_transform_ioport(mdev, iobase);</div><div class='del'>-</div><div class='del'>-	if ((err = depca_common_init (iobase, &amp;dev)))</div><div class='del'>-		goto out_unclaim;</div><div class='del'>-</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-	dev-&gt;base_addr = iobase;</div><div class='del'>-	lp = netdev_priv(dev);</div><div class='del'>-	lp-&gt;depca_bus = DEPCA_BUS_MCA;</div><div class='del'>-	lp-&gt;adapter = depca_mca_adapter_type[mdev-&gt;index];</div><div class='del'>-	lp-&gt;mem_start = mem_start;</div><div class='del'>-</div><div class='del'>-	if ((err = depca_hw_init(dev, device)))</div><div class='del'>-		goto out_free;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>- out_free:</div><div class='del'>-	free_netdev (dev);</div><div class='del'>-	release_region (iobase, DEPCA_TOTAL_SIZE);</div><div class='del'>- out_unclaim:</div><div class='del'>-	mca_device_set_claim(mdev, 0);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'> ** ISA bus I/O device probe</div><div class='ctx'> */</div><div class='hunk'>@@ -2058,15 +1870,10 @@ static int __init depca_module_init (void)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-	err = mca_register_driver(&amp;depca_mca_driver);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err;</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_EISA</div><div class='ctx'> 	err = eisa_driver_register(&amp;depca_eisa_driver);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_mca;</div><div class='add'>+		goto err_eisa;</div><div class='ctx'> #endif</div><div class='ctx'> 	err = platform_driver_register(&amp;depca_isa_driver);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -2078,11 +1885,6 @@ static int __init depca_module_init (void)</div><div class='ctx'> err_eisa:</div><div class='ctx'> #ifdef CONFIG_EISA</div><div class='ctx'> 	eisa_driver_unregister(&amp;depca_eisa_driver);</div><div class='del'>-err_mca:</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-	mca_unregister_driver(&amp;depca_mca_driver);</div><div class='del'>-err:</div><div class='ctx'> #endif</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -2090,9 +1892,6 @@ err:</div><div class='ctx'> static void __exit depca_module_exit (void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-#ifdef CONFIG_MCA</div><div class='del'>-        mca_unregister_driver (&amp;depca_mca_driver);</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_EISA</div><div class='ctx'>         eisa_driver_unregister (&amp;depca_eisa_driver);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c.h b/drivers/net/ethernet/atheros/atl1c/atl1c.h<br/>index ca70e16b6e2c..b2bf324631dc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atl1c/atl1c.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/atheros/atl1c/atl1c.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atl1c/atl1c.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atl1c/atl1c.h</a></div><div class='hunk'>@@ -74,8 +74,6 @@</div><div class='ctx'> </div><div class='ctx'> #define AT_RX_BUF_SIZE		(ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)</div><div class='ctx'> #define MAX_JUMBO_FRAME_SIZE	(6*1024)</div><div class='del'>-#define MAX_TSO_FRAME_SIZE      (7*1024)</div><div class='del'>-#define MAX_TX_OFFLOAD_THRESH	(9*1024)</div><div class='ctx'> </div><div class='ctx'> #define AT_MAX_RECEIVE_QUEUE    4</div><div class='ctx'> #define AT_DEF_RECEIVE_QUEUE	1</div><div class='hunk'>@@ -100,7 +98,7 @@</div><div class='ctx'> #define ATL1C_ASPM_L0s_ENABLE		0x0001</div><div class='ctx'> #define ATL1C_ASPM_L1_ENABLE		0x0002</div><div class='ctx'> </div><div class='del'>-#define AT_REGS_LEN	(75 * sizeof(u32))</div><div class='add'>+#define AT_REGS_LEN	(74 * sizeof(u32))</div><div class='ctx'> #define AT_EEPROM_LEN 	512</div><div class='ctx'> </div><div class='ctx'> #define ATL1C_GET_DESC(R, i, type)	(&amp;(((type *)((R)-&gt;desc))[i]))</div><div class='hunk'>@@ -297,20 +295,6 @@ enum atl1c_dma_req_block {</div><div class='ctx'> 	atl1c_dma_req_4096 = 5</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum atl1c_rss_mode {</div><div class='del'>-	atl1c_rss_mode_disable = 0,</div><div class='del'>-	atl1c_rss_sig_que = 1,</div><div class='del'>-	atl1c_rss_mul_que_sig_int = 2,</div><div class='del'>-	atl1c_rss_mul_que_mul_int = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum atl1c_rss_type {</div><div class='del'>-	atl1c_rss_disable = 0,</div><div class='del'>-	atl1c_rss_ipv4 = 1,</div><div class='del'>-	atl1c_rss_ipv4_tcp = 2,</div><div class='del'>-	atl1c_rss_ipv6 = 4,</div><div class='del'>-	atl1c_rss_ipv6_tcp = 8</div><div class='del'>-};</div><div class='ctx'> </div><div class='ctx'> enum atl1c_nic_type {</div><div class='ctx'> 	athr_l1c = 0,</div><div class='hunk'>@@ -388,7 +372,6 @@ struct atl1c_hw {</div><div class='ctx'> 	enum atl1c_dma_order dma_order;</div><div class='ctx'> 	enum atl1c_dma_rcb   rcb_value;</div><div class='ctx'> 	enum atl1c_dma_req_block dmar_block;</div><div class='del'>-	enum atl1c_dma_req_block dmaw_block;</div><div class='ctx'> </div><div class='ctx'> 	u16 device_id;</div><div class='ctx'> 	u16 vendor_id;</div><div class='hunk'>@@ -399,8 +382,6 @@ struct atl1c_hw {</div><div class='ctx'> 	u16 phy_id2;</div><div class='ctx'> </div><div class='ctx'> 	u32 intr_mask;</div><div class='del'>-	u8 dmaw_dly_cnt;</div><div class='del'>-	u8 dmar_dly_cnt;</div><div class='ctx'> </div><div class='ctx'> 	u8 preamble_len;</div><div class='ctx'> 	u16 max_frame_size;</div><div class='hunk'>@@ -440,10 +421,6 @@ struct atl1c_hw {</div><div class='ctx'> #define ATL1C_FPGA_VERSION              0x8000</div><div class='ctx'> 	u16 link_cap_flags;</div><div class='ctx'> #define ATL1C_LINK_CAP_1000M		0x0001</div><div class='del'>-	u16 cmb_tpd;</div><div class='del'>-	u16 cmb_rrd;</div><div class='del'>-	u16 cmb_rx_timer; /* 2us resolution */</div><div class='del'>-	u16 cmb_tx_timer;</div><div class='ctx'> 	u32 smb_timer;</div><div class='ctx'> </div><div class='ctx'> 	u16 rrd_thresh; /* Threshold of number of RRD produced to trigger</div><div class='hunk'>@@ -451,9 +428,6 @@ struct atl1c_hw {</div><div class='ctx'> 	u16 tpd_thresh;</div><div class='ctx'> 	u8 tpd_burst;   /* Number of TPD to prefetch in cache-aligned burst. */</div><div class='ctx'> 	u8 rfd_burst;</div><div class='del'>-	enum atl1c_rss_type rss_type;</div><div class='del'>-	enum atl1c_rss_mode rss_mode;</div><div class='del'>-	u8 rss_hash_bits;</div><div class='ctx'> 	u32 base_cpu;</div><div class='ctx'> 	u32 indirect_tab;</div><div class='ctx'> 	u8 mac_addr[ETH_ALEN];</div><div class='hunk'>@@ -462,12 +436,12 @@ struct atl1c_hw {</div><div class='ctx'> 	bool phy_configured;</div><div class='ctx'> 	bool re_autoneg;</div><div class='ctx'> 	bool emi_ca;</div><div class='add'>+	bool msi_lnkpatch;	/* link patch for specific platforms */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * atl1c_ring_header represents a single, contiguous block of DMA space</div><div class='del'>- * mapped for the three descriptor rings (tpd, rfd, rrd) and the two</div><div class='del'>- * message blocks (cmb, smb) described below</div><div class='add'>+ * mapped for the three descriptor rings (tpd, rfd, rrd) described below</div><div class='ctx'>  */</div><div class='ctx'> struct atl1c_ring_header {</div><div class='ctx'> 	void *desc;		/* virtual address */</div><div class='hunk'>@@ -541,16 +515,6 @@ struct atl1c_rrd_ring {</div><div class='ctx'> 	u16 next_to_clean;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct atl1c_cmb {</div><div class='del'>-	void *cmb;</div><div class='del'>-	dma_addr_t dma;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct atl1c_smb {</div><div class='del'>-	void *smb;</div><div class='del'>-	dma_addr_t dma;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* board specific private data structure */</div><div class='ctx'> struct atl1c_adapter {</div><div class='ctx'> 	struct net_device   *netdev;</div><div class='hunk'>@@ -586,11 +550,8 @@ struct atl1c_adapter {</div><div class='ctx'> 	/* All Descriptor memory */</div><div class='ctx'> 	struct atl1c_ring_header ring_header;</div><div class='ctx'> 	struct atl1c_tpd_ring tpd_ring[AT_MAX_TRANSMIT_QUEUE];</div><div class='del'>-	struct atl1c_rfd_ring rfd_ring[AT_MAX_RECEIVE_QUEUE];</div><div class='del'>-	struct atl1c_rrd_ring rrd_ring[AT_MAX_RECEIVE_QUEUE];</div><div class='del'>-	struct atl1c_cmb cmb;</div><div class='del'>-	struct atl1c_smb smb;</div><div class='del'>-	int num_rx_queues;</div><div class='add'>+	struct atl1c_rfd_ring rfd_ring;</div><div class='add'>+	struct atl1c_rrd_ring rrd_ring;</div><div class='ctx'> 	u32 bd_number;     /* board number;*/</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -618,8 +579,14 @@ struct atl1c_adapter {</div><div class='ctx'> #define AT_WRITE_REGW(a, reg, value) (\</div><div class='ctx'> 		writew((value), ((a)-&gt;hw_addr + reg)))</div><div class='ctx'> </div><div class='del'>-#define AT_READ_REGW(a, reg) (\</div><div class='del'>-		readw((a)-&gt;hw_addr + reg))</div><div class='add'>+#define AT_READ_REGW(a, reg, pdata) do {				\</div><div class='add'>+		if (unlikely((a)-&gt;hibernate)) {				\</div><div class='add'>+			readw((a)-&gt;hw_addr + reg);			\</div><div class='add'>+			*(u16 *)pdata = readw((a)-&gt;hw_addr + reg);	\</div><div class='add'>+		} else {						\</div><div class='add'>+			*(u16 *)pdata = readw((a)-&gt;hw_addr + reg);	\</div><div class='add'>+		}							\</div><div class='add'>+	} while (0)</div><div class='ctx'> </div><div class='ctx'> #define AT_WRITE_REG_ARRAY(a, reg, offset, value) ( \</div><div class='ctx'> 		writel((value), (((a)-&gt;hw_addr + reg) + ((offset) &lt;&lt; 2))))</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c b/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c<br/>index 0a9326aa58b5..859ea844ba0f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c</a></div><div class='hunk'>@@ -141,8 +141,7 @@ static void atl1c_get_regs(struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> 	memset(p, 0, AT_REGS_LEN);</div><div class='ctx'> </div><div class='del'>-	regs-&gt;version = 0;</div><div class='del'>-	AT_READ_REG(hw, REG_VPD_CAP, 		  p++);</div><div class='add'>+	regs-&gt;version = 1;</div><div class='ctx'> 	AT_READ_REG(hw, REG_PM_CTRL, 		  p++);</div><div class='ctx'> 	AT_READ_REG(hw, REG_MAC_HALF_DUPLX_CTRL,  p++);</div><div class='ctx'> 	AT_READ_REG(hw, REG_TWSI_CTRL, 		  p++);</div><div class='hunk'>@@ -154,7 +153,7 @@ static void atl1c_get_regs(struct net_device *netdev,</div><div class='ctx'> 	AT_READ_REG(hw, REG_LINK_CTRL, 		  p++);</div><div class='ctx'> 	AT_READ_REG(hw, REG_IDLE_STATUS, 	  p++);</div><div class='ctx'> 	AT_READ_REG(hw, REG_MDIO_CTRL, 		  p++);</div><div class='del'>-	AT_READ_REG(hw, REG_SERDES_LOCK, 	  p++);</div><div class='add'>+	AT_READ_REG(hw, REG_SERDES,		  p++);</div><div class='ctx'> 	AT_READ_REG(hw, REG_MAC_CTRL, 		  p++);</div><div class='ctx'> 	AT_READ_REG(hw, REG_MAC_IPG_IFG, 	  p++);</div><div class='ctx'> 	AT_READ_REG(hw, REG_MAC_STA_ADDR, 	  p++);</div><div class='hunk'>@@ -167,9 +166,9 @@ static void atl1c_get_regs(struct net_device *netdev,</div><div class='ctx'> 	AT_READ_REG(hw, REG_WOL_CTRL, 		  p++);</div><div class='ctx'> </div><div class='ctx'> 	atl1c_read_phy_reg(hw, MII_BMCR, &amp;phy_data);</div><div class='del'>-	regs_buff[73] =	(u32) phy_data;</div><div class='add'>+	regs_buff[AT_REGS_LEN/sizeof(u32) - 2] = (u32) phy_data;</div><div class='ctx'> 	atl1c_read_phy_reg(hw, MII_BMSR, &amp;phy_data);</div><div class='del'>-	regs_buff[74] = (u32) phy_data;</div><div class='add'>+	regs_buff[AT_REGS_LEN/sizeof(u32) - 1] = (u32) phy_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int atl1c_get_eeprom_len(struct net_device *netdev)</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.c b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.c<br/>index bd1667cbffa6..ff9c73859d45 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atl1c/atl1c_hw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/atheros/atl1c/atl1c_hw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atl1c/atl1c_hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atl1c/atl1c_hw.c</a></div><div class='hunk'>@@ -43,7 +43,7 @@ int atl1c_check_eeprom_exist(struct atl1c_hw *hw)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void atl1c_hw_set_mac_addr(struct atl1c_hw *hw)</div><div class='add'>+void atl1c_hw_set_mac_addr(struct atl1c_hw *hw, u8 *mac_addr)</div><div class='ctx'> {</div><div class='ctx'> 	u32 value;</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -51,35 +51,48 @@ void atl1c_hw_set_mac_addr(struct atl1c_hw *hw)</div><div class='ctx'> 	 * 0:  6AF600DC 1: 000B</div><div class='ctx'> 	 * low dword</div><div class='ctx'> 	 */</div><div class='del'>-	value = (((u32)hw-&gt;mac_addr[2]) &lt;&lt; 24) |</div><div class='del'>-		(((u32)hw-&gt;mac_addr[3]) &lt;&lt; 16) |</div><div class='del'>-		(((u32)hw-&gt;mac_addr[4]) &lt;&lt; 8)  |</div><div class='del'>-		(((u32)hw-&gt;mac_addr[5])) ;</div><div class='add'>+	value = mac_addr[2] &lt;&lt; 24 |</div><div class='add'>+		mac_addr[3] &lt;&lt; 16 |</div><div class='add'>+		mac_addr[4] &lt;&lt; 8  |</div><div class='add'>+		mac_addr[5];</div><div class='ctx'> 	AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value);</div><div class='ctx'> 	/* hight dword */</div><div class='del'>-	value = (((u32)hw-&gt;mac_addr[0]) &lt;&lt; 8) |</div><div class='del'>-		(((u32)hw-&gt;mac_addr[1])) ;</div><div class='add'>+	value = mac_addr[0] &lt;&lt; 8 |</div><div class='add'>+		mac_addr[1];</div><div class='ctx'> 	AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* read mac address from hardware register */</div><div class='add'>+static bool atl1c_read_current_addr(struct atl1c_hw *hw, u8 *eth_addr)</div><div class='add'>+{</div><div class='add'>+	u32 addr[2];</div><div class='add'>+</div><div class='add'>+	AT_READ_REG(hw, REG_MAC_STA_ADDR, &amp;addr[0]);</div><div class='add'>+	AT_READ_REG(hw, REG_MAC_STA_ADDR + 4, &amp;addr[1]);</div><div class='add'>+</div><div class='add'>+	*(u32 *) &amp;eth_addr[2] = htonl(addr[0]);</div><div class='add'>+	*(u16 *) &amp;eth_addr[0] = htons((u16)addr[1]);</div><div class='add'>+</div><div class='add'>+	return is_valid_ether_addr(eth_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * atl1c_get_permanent_address</div><div class='ctx'>  * return 0 if get valid mac address,</div><div class='ctx'>  */</div><div class='ctx'> static int atl1c_get_permanent_address(struct atl1c_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	u32 addr[2];</div><div class='ctx'> 	u32 i;</div><div class='ctx'> 	u32 otp_ctrl_data;</div><div class='ctx'> 	u32 twsi_ctrl_data;</div><div class='del'>-	u32 ltssm_ctrl_data;</div><div class='del'>-	u32 wol_data;</div><div class='del'>-	u8  eth_addr[ETH_ALEN];</div><div class='ctx'> 	u16 phy_data;</div><div class='ctx'> 	bool raise_vol = false;</div><div class='ctx'> </div><div class='add'>+	/* MAC-address from BIOS is the 1st priority */</div><div class='add'>+	if (atl1c_read_current_addr(hw, hw-&gt;perm_mac_addr))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	/* init */</div><div class='del'>-	addr[0] = addr[1] = 0;</div><div class='ctx'> 	AT_READ_REG(hw, REG_OTP_CTRL, &amp;otp_ctrl_data);</div><div class='ctx'> 	if (atl1c_check_eeprom_exist(hw)) {</div><div class='ctx'> 		if (hw-&gt;nic_type == athr_l1c || hw-&gt;nic_type == athr_l2c) {</div><div class='hunk'>@@ -91,33 +104,17 @@ static int atl1c_get_permanent_address(struct atl1c_hw *hw)</div><div class='ctx'> 				msleep(1);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		if (hw-&gt;nic_type == athr_l2c_b ||</div><div class='del'>-		    hw-&gt;nic_type == athr_l2c_b2 ||</div><div class='del'>-		    hw-&gt;nic_type == athr_l1d) {</div><div class='del'>-			atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x00);</div><div class='del'>-			if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &amp;phy_data))</div><div class='del'>-				goto out;</div><div class='del'>-			phy_data &amp;= 0xFF7F;</div><div class='del'>-			atl1c_write_phy_reg(hw, MII_DBG_DATA, phy_data);</div><div class='del'>-</div><div class='del'>-			atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x3B);</div><div class='del'>-			if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &amp;phy_data))</div><div class='del'>-				goto out;</div><div class='del'>-			phy_data |= 0x8;</div><div class='del'>-			atl1c_write_phy_reg(hw, MII_DBG_DATA, phy_data);</div><div class='add'>+		/* raise voltage temporally for l2cb */</div><div class='add'>+		if (hw-&gt;nic_type == athr_l2c_b || hw-&gt;nic_type == athr_l2c_b2) {</div><div class='add'>+			atl1c_read_phy_dbg(hw, MIIDBG_ANACTRL, &amp;phy_data);</div><div class='add'>+			phy_data &amp;= ~ANACTRL_HB_EN;</div><div class='add'>+			atl1c_write_phy_dbg(hw, MIIDBG_ANACTRL, phy_data);</div><div class='add'>+			atl1c_read_phy_dbg(hw, MIIDBG_VOLT_CTRL, &amp;phy_data);</div><div class='add'>+			phy_data |= VOLT_CTRL_SWLOWEST;</div><div class='add'>+			atl1c_write_phy_dbg(hw, MIIDBG_VOLT_CTRL, phy_data);</div><div class='ctx'> 			udelay(20);</div><div class='ctx'> 			raise_vol = true;</div><div class='ctx'> 		}</div><div class='del'>-		/* close open bit of ReadOnly*/</div><div class='del'>-		AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &amp;ltssm_ctrl_data);</div><div class='del'>-		ltssm_ctrl_data &amp;= ~LTSSM_ID_EN_WRO;</div><div class='del'>-		AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, ltssm_ctrl_data);</div><div class='del'>-</div><div class='del'>-		/* clear any WOL settings */</div><div class='del'>-		AT_WRITE_REG(hw, REG_WOL_CTRL, 0);</div><div class='del'>-		AT_READ_REG(hw, REG_WOL_CTRL, &amp;wol_data);</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> 		AT_READ_REG(hw, REG_TWSI_CTRL, &amp;twsi_ctrl_data);</div><div class='ctx'> 		twsi_ctrl_data |= TWSI_CTRL_SW_LDSTART;</div><div class='hunk'>@@ -138,37 +135,18 @@ static int atl1c_get_permanent_address(struct atl1c_hw *hw)</div><div class='ctx'> 		msleep(1);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (raise_vol) {</div><div class='del'>-		if (hw-&gt;nic_type == athr_l2c_b ||</div><div class='del'>-		    hw-&gt;nic_type == athr_l2c_b2 ||</div><div class='del'>-		    hw-&gt;nic_type == athr_l1d ||</div><div class='del'>-		    hw-&gt;nic_type == athr_l1d_2) {</div><div class='del'>-			atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x00);</div><div class='del'>-			if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &amp;phy_data))</div><div class='del'>-				goto out;</div><div class='del'>-			phy_data |= 0x80;</div><div class='del'>-			atl1c_write_phy_reg(hw, MII_DBG_DATA, phy_data);</div><div class='del'>-</div><div class='del'>-			atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x3B);</div><div class='del'>-			if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &amp;phy_data))</div><div class='del'>-				goto out;</div><div class='del'>-			phy_data &amp;= 0xFFF7;</div><div class='del'>-			atl1c_write_phy_reg(hw, MII_DBG_DATA, phy_data);</div><div class='del'>-			udelay(20);</div><div class='del'>-		}</div><div class='add'>+		atl1c_read_phy_dbg(hw, MIIDBG_ANACTRL, &amp;phy_data);</div><div class='add'>+		phy_data |= ANACTRL_HB_EN;</div><div class='add'>+		atl1c_write_phy_dbg(hw, MIIDBG_ANACTRL, phy_data);</div><div class='add'>+		atl1c_read_phy_dbg(hw, MIIDBG_VOLT_CTRL, &amp;phy_data);</div><div class='add'>+		phy_data &amp;= ~VOLT_CTRL_SWLOWEST;</div><div class='add'>+		atl1c_write_phy_dbg(hw, MIIDBG_VOLT_CTRL, phy_data);</div><div class='add'>+		udelay(20);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* maybe MAC-address is from BIOS */</div><div class='del'>-	AT_READ_REG(hw, REG_MAC_STA_ADDR, &amp;addr[0]);</div><div class='del'>-	AT_READ_REG(hw, REG_MAC_STA_ADDR + 4, &amp;addr[1]);</div><div class='del'>-	*(u32 *) &amp;eth_addr[2] = swab32(addr[0]);</div><div class='del'>-	*(u16 *) &amp;eth_addr[0] = swab16(*(u16 *)&amp;addr[1]);</div><div class='del'>-</div><div class='del'>-	if (is_valid_ether_addr(eth_addr)) {</div><div class='del'>-		memcpy(hw-&gt;perm_mac_addr, eth_addr, ETH_ALEN);</div><div class='add'>+	if (atl1c_read_current_addr(hw, hw-&gt;perm_mac_addr))</div><div class='ctx'> 		return 0;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -278,33 +256,158 @@ void atl1c_hash_set(struct atl1c_hw *hw, u32 hash_value)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Reads the value from a PHY register</div><div class='del'>- * hw - Struct containing variables accessed by shared code</div><div class='del'>- * reg_addr - address of the PHY register to read</div><div class='add'>+ * wait mdio module be idle</div><div class='add'>+ * return true: idle</div><div class='add'>+ *        false: still busy</div><div class='ctx'>  */</div><div class='del'>-int atl1c_read_phy_reg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data)</div><div class='add'>+bool atl1c_wait_mdio_idle(struct atl1c_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	val = ((u32)(reg_addr &amp; MDIO_REG_ADDR_MASK)) &lt;&lt; MDIO_REG_ADDR_SHIFT |</div><div class='del'>-		MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW |</div><div class='del'>-		MDIO_CLK_25_4 &lt;&lt; MDIO_CLK_SEL_SHIFT;</div><div class='add'>+	for (i = 0; i &lt; MDIO_MAX_AC_TO; i++) {</div><div class='add'>+		AT_READ_REG(hw, REG_MDIO_CTRL, &amp;val);</div><div class='add'>+		if (!(val &amp; (MDIO_CTRL_BUSY | MDIO_CTRL_START)))</div><div class='add'>+			break;</div><div class='add'>+		udelay(10);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return i != MDIO_MAX_AC_TO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void atl1c_stop_phy_polling(struct atl1c_hw *hw)</div><div class='add'>+{</div><div class='add'>+	if (!(hw-&gt;ctrl_flags &amp; ATL1C_FPGA_VERSION))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	AT_WRITE_REG(hw, REG_MDIO_CTRL, 0);</div><div class='add'>+	atl1c_wait_mdio_idle(hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void atl1c_start_phy_polling(struct atl1c_hw *hw, u16 clk_sel)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (!(hw-&gt;ctrl_flags &amp; ATL1C_FPGA_VERSION))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='add'>+	val = MDIO_CTRL_SPRES_PRMBL |</div><div class='add'>+		FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) |</div><div class='add'>+		FIELDX(MDIO_CTRL_REG, 1) |</div><div class='add'>+		MDIO_CTRL_START |</div><div class='add'>+		MDIO_CTRL_OP_READ;</div><div class='add'>+	AT_WRITE_REG(hw, REG_MDIO_CTRL, val);</div><div class='add'>+	atl1c_wait_mdio_idle(hw);</div><div class='add'>+	val |= MDIO_CTRL_AP_EN;</div><div class='add'>+	val &amp;= ~MDIO_CTRL_START;</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_MDIO_CTRL, val);</div><div class='add'>+	udelay(30);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MDIO_WAIT_TIMES; i++) {</div><div class='del'>-		udelay(2);</div><div class='del'>-		AT_READ_REG(hw, REG_MDIO_CTRL, &amp;val);</div><div class='del'>-		if (!(val &amp; (MDIO_START | MDIO_BUSY)))</div><div class='del'>-			break;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * atl1c_read_phy_core</div><div class='add'>+ * core funtion to read register in PHY via MDIO control regsiter.</div><div class='add'>+ * ext: extension register (see IEEE 802.3)</div><div class='add'>+ * dev: device address (see IEEE 802.3 DEVAD, PRTAD is fixed to 0)</div><div class='add'>+ * reg: reg to read</div><div class='add'>+ */</div><div class='add'>+int atl1c_read_phy_core(struct atl1c_hw *hw, bool ext, u8 dev,</div><div class='add'>+			u16 reg, u16 *phy_data)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	u16 clk_sel = MDIO_CTRL_CLK_25_4;</div><div class='add'>+</div><div class='add'>+	atl1c_stop_phy_polling(hw);</div><div class='add'>+</div><div class='add'>+	*phy_data = 0;</div><div class='add'>+</div><div class='add'>+	/* only l2c_b2 &amp; l1d_2 could use slow clock */</div><div class='add'>+	if ((hw-&gt;nic_type == athr_l2c_b2 || hw-&gt;nic_type == athr_l1d_2) &amp;&amp;</div><div class='add'>+		hw-&gt;hibernate)</div><div class='add'>+		clk_sel = MDIO_CTRL_CLK_25_128;</div><div class='add'>+	if (ext) {</div><div class='add'>+		val = FIELDX(MDIO_EXTN_DEVAD, dev) | FIELDX(MDIO_EXTN_REG, reg);</div><div class='add'>+		AT_WRITE_REG(hw, REG_MDIO_EXTN, val);</div><div class='add'>+		val = MDIO_CTRL_SPRES_PRMBL |</div><div class='add'>+			FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) |</div><div class='add'>+			MDIO_CTRL_START |</div><div class='add'>+			MDIO_CTRL_MODE_EXT |</div><div class='add'>+			MDIO_CTRL_OP_READ;</div><div class='add'>+	} else {</div><div class='add'>+		val = MDIO_CTRL_SPRES_PRMBL |</div><div class='add'>+			FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) |</div><div class='add'>+			FIELDX(MDIO_CTRL_REG, reg) |</div><div class='add'>+			MDIO_CTRL_START |</div><div class='add'>+			MDIO_CTRL_OP_READ;</div><div class='ctx'> 	}</div><div class='del'>-	if (!(val &amp; (MDIO_START | MDIO_BUSY))) {</div><div class='del'>-		*phy_data = (u16)val;</div><div class='del'>-		return 0;</div><div class='add'>+	AT_WRITE_REG(hw, REG_MDIO_CTRL, val);</div><div class='add'>+</div><div class='add'>+	if (!atl1c_wait_mdio_idle(hw))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	AT_READ_REG(hw, REG_MDIO_CTRL, &amp;val);</div><div class='add'>+	*phy_data = (u16)FIELD_GETX(val, MDIO_CTRL_DATA);</div><div class='add'>+</div><div class='add'>+	atl1c_start_phy_polling(hw, clk_sel);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * atl1c_write_phy_core</div><div class='add'>+ * core funtion to write to register in PHY via MDIO control regsiter.</div><div class='add'>+ * ext: extension register (see IEEE 802.3)</div><div class='add'>+ * dev: device address (see IEEE 802.3 DEVAD, PRTAD is fixed to 0)</div><div class='add'>+ * reg: reg to write</div><div class='add'>+ */</div><div class='add'>+int atl1c_write_phy_core(struct atl1c_hw *hw, bool ext, u8 dev,</div><div class='add'>+			u16 reg, u16 phy_data)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	u16 clk_sel = MDIO_CTRL_CLK_25_4;</div><div class='add'>+</div><div class='add'>+	atl1c_stop_phy_polling(hw);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	/* only l2c_b2 &amp; l1d_2 could use slow clock */</div><div class='add'>+	if ((hw-&gt;nic_type == athr_l2c_b2 || hw-&gt;nic_type == athr_l1d_2) &amp;&amp;</div><div class='add'>+		hw-&gt;hibernate)</div><div class='add'>+		clk_sel = MDIO_CTRL_CLK_25_128;</div><div class='add'>+</div><div class='add'>+	if (ext) {</div><div class='add'>+		val = FIELDX(MDIO_EXTN_DEVAD, dev) | FIELDX(MDIO_EXTN_REG, reg);</div><div class='add'>+		AT_WRITE_REG(hw, REG_MDIO_EXTN, val);</div><div class='add'>+		val = MDIO_CTRL_SPRES_PRMBL |</div><div class='add'>+			FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) |</div><div class='add'>+			FIELDX(MDIO_CTRL_DATA, phy_data) |</div><div class='add'>+			MDIO_CTRL_START |</div><div class='add'>+			MDIO_CTRL_MODE_EXT;</div><div class='add'>+	} else {</div><div class='add'>+		val = MDIO_CTRL_SPRES_PRMBL |</div><div class='add'>+			FIELDX(MDIO_CTRL_CLK_SEL, clk_sel) |</div><div class='add'>+			FIELDX(MDIO_CTRL_DATA, phy_data) |</div><div class='add'>+			FIELDX(MDIO_CTRL_REG, reg) |</div><div class='add'>+			MDIO_CTRL_START;</div><div class='ctx'> 	}</div><div class='add'>+	AT_WRITE_REG(hw, REG_MDIO_CTRL, val);</div><div class='ctx'> </div><div class='del'>-	return -1;</div><div class='add'>+	if (!atl1c_wait_mdio_idle(hw))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	atl1c_start_phy_polling(hw, clk_sel);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Reads the value from a PHY register</div><div class='add'>+ * hw - Struct containing variables accessed by shared code</div><div class='add'>+ * reg_addr - address of the PHY register to read</div><div class='add'>+ */</div><div class='add'>+int atl1c_read_phy_reg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data)</div><div class='add'>+{</div><div class='add'>+	return atl1c_read_phy_core(hw, false, 0, reg_addr, phy_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -315,27 +418,47 @@ int atl1c_read_phy_reg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data)</div><div class='ctx'>  */</div><div class='ctx'> int atl1c_write_phy_reg(struct atl1c_hw *hw, u32 reg_addr, u16 phy_data)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	u32 val;</div><div class='add'>+	return atl1c_write_phy_core(hw, false, 0, reg_addr, phy_data);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	val = ((u32)(phy_data &amp; MDIO_DATA_MASK)) &lt;&lt; MDIO_DATA_SHIFT   |</div><div class='del'>-	       (reg_addr &amp; MDIO_REG_ADDR_MASK) &lt;&lt; MDIO_REG_ADDR_SHIFT |</div><div class='del'>-	       MDIO_SUP_PREAMBLE | MDIO_START |</div><div class='del'>-	       MDIO_CLK_25_4 &lt;&lt; MDIO_CLK_SEL_SHIFT;</div><div class='add'>+/* read from PHY extension register */</div><div class='add'>+int atl1c_read_phy_ext(struct atl1c_hw *hw, u8 dev_addr,</div><div class='add'>+			u16 reg_addr, u16 *phy_data)</div><div class='add'>+{</div><div class='add'>+	return atl1c_read_phy_core(hw, true, dev_addr, reg_addr, phy_data);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	AT_WRITE_REG(hw, REG_MDIO_CTRL, val);</div><div class='add'>+/* write to PHY extension register */</div><div class='add'>+int atl1c_write_phy_ext(struct atl1c_hw *hw, u8 dev_addr,</div><div class='add'>+			u16 reg_addr, u16 phy_data)</div><div class='add'>+{</div><div class='add'>+	return atl1c_write_phy_core(hw, true, dev_addr, reg_addr, phy_data);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MDIO_WAIT_TIMES; i++) {</div><div class='del'>-		udelay(2);</div><div class='del'>-		AT_READ_REG(hw, REG_MDIO_CTRL, &amp;val);</div><div class='del'>-		if (!(val &amp; (MDIO_START | MDIO_BUSY)))</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='add'>+int atl1c_read_phy_dbg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	if (!(val &amp; (MDIO_START | MDIO_BUSY)))</div><div class='del'>-		return 0;</div><div class='add'>+	err = atl1c_write_phy_reg(hw, MII_DBG_ADDR, reg_addr);</div><div class='add'>+	if (unlikely(err))</div><div class='add'>+		return err;</div><div class='add'>+	else</div><div class='add'>+		err = atl1c_read_phy_reg(hw, MII_DBG_DATA, phy_data);</div><div class='ctx'> </div><div class='del'>-	return -1;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int atl1c_write_phy_dbg(struct atl1c_hw *hw, u16 reg_addr, u16 phy_data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = atl1c_write_phy_reg(hw, MII_DBG_ADDR, reg_addr);</div><div class='add'>+	if (unlikely(err))</div><div class='add'>+		return err;</div><div class='add'>+	else</div><div class='add'>+		err = atl1c_write_phy_reg(hw, MII_DBG_DATA, phy_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -380,119 +503,100 @@ static int atl1c_phy_setup_adv(struct atl1c_hw *hw)</div><div class='ctx'> </div><div class='ctx'> void atl1c_phy_disable(struct atl1c_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	AT_WRITE_REGW(hw, REG_GPHY_CTRL,</div><div class='del'>-			GPHY_CTRL_PW_WOL_DIS | GPHY_CTRL_EXT_RESET);</div><div class='add'>+	atl1c_power_saving(hw, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void atl1c_phy_magic_data(struct atl1c_hw *hw)</div><div class='del'>-{</div><div class='del'>-	u16 data;</div><div class='del'>-</div><div class='del'>-	data = ANA_LOOP_SEL_10BT | ANA_EN_MASK_TB | ANA_EN_10BT_IDLE |</div><div class='del'>-		((1 &amp; ANA_INTERVAL_SEL_TIMER_MASK) &lt;&lt;</div><div class='del'>-		ANA_INTERVAL_SEL_TIMER_SHIFT);</div><div class='del'>-</div><div class='del'>-	atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_18);</div><div class='del'>-	atl1c_write_phy_reg(hw, MII_DBG_DATA, data);</div><div class='del'>-</div><div class='del'>-	data = (2 &amp; ANA_SERDES_CDR_BW_MASK) | ANA_MS_PAD_DBG |</div><div class='del'>-		ANA_SERDES_EN_DEEM | ANA_SERDES_SEL_HSP | ANA_SERDES_EN_PLL |</div><div class='del'>-		ANA_SERDES_EN_LCKDT;</div><div class='del'>-</div><div class='del'>-	atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_5);</div><div class='del'>-	atl1c_write_phy_reg(hw, MII_DBG_DATA, data);</div><div class='del'>-</div><div class='del'>-	data = (44 &amp; ANA_LONG_CABLE_TH_100_MASK) |</div><div class='del'>-		((33 &amp; ANA_SHORT_CABLE_TH_100_MASK) &lt;&lt;</div><div class='del'>-		ANA_SHORT_CABLE_TH_100_SHIFT) | ANA_BP_BAD_LINK_ACCUM |</div><div class='del'>-		ANA_BP_SMALL_BW;</div><div class='del'>-</div><div class='del'>-	atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_54);</div><div class='del'>-	atl1c_write_phy_reg(hw, MII_DBG_DATA, data);</div><div class='del'>-</div><div class='del'>-	data = (11 &amp; ANA_IECHO_ADJ_MASK) | ((11 &amp; ANA_IECHO_ADJ_MASK) &lt;&lt;</div><div class='del'>-		ANA_IECHO_ADJ_2_SHIFT) | ((8 &amp; ANA_IECHO_ADJ_MASK) &lt;&lt;</div><div class='del'>-		ANA_IECHO_ADJ_1_SHIFT) | ((8 &amp; ANA_IECHO_ADJ_MASK) &lt;&lt;</div><div class='del'>-		ANA_IECHO_ADJ_0_SHIFT);</div><div class='del'>-</div><div class='del'>-	atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_4);</div><div class='del'>-	atl1c_write_phy_reg(hw, MII_DBG_DATA, data);</div><div class='del'>-</div><div class='del'>-	data = ANA_RESTART_CAL | ((7 &amp; ANA_MANUL_SWICH_ON_MASK) &lt;&lt;</div><div class='del'>-		ANA_MANUL_SWICH_ON_SHIFT) | ANA_MAN_ENABLE |</div><div class='del'>-		ANA_SEL_HSP | ANA_EN_HB | ANA_OEN_125M;</div><div class='del'>-</div><div class='del'>-	atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_0);</div><div class='del'>-	atl1c_write_phy_reg(hw, MII_DBG_DATA, data);</div><div class='del'>-</div><div class='del'>-	if (hw-&gt;ctrl_flags &amp; ATL1C_HIB_DISABLE) {</div><div class='del'>-		atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_41);</div><div class='del'>-		if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &amp;data) != 0)</div><div class='del'>-			return;</div><div class='del'>-		data &amp;= ~ANA_TOP_PS_EN;</div><div class='del'>-		atl1c_write_phy_reg(hw, MII_DBG_DATA, data);</div><div class='del'>-</div><div class='del'>-		atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_11);</div><div class='del'>-		if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &amp;data) != 0)</div><div class='del'>-			return;</div><div class='del'>-		data &amp;= ~ANA_PS_HIB_EN;</div><div class='del'>-		atl1c_write_phy_reg(hw, MII_DBG_DATA, data);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> int atl1c_phy_reset(struct atl1c_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1c_adapter *adapter = hw-&gt;adapter;</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='ctx'> 	u16 phy_data;</div><div class='del'>-	u32 phy_ctrl_data = GPHY_CTRL_DEFAULT;</div><div class='del'>-	u32 mii_ier_data = IER_LINK_UP | IER_LINK_DOWN;</div><div class='add'>+	u32 phy_ctrl_data, lpi_ctrl;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;ctrl_flags &amp; ATL1C_HIB_DISABLE)</div><div class='del'>-		phy_ctrl_data &amp;= ~GPHY_CTRL_HIB_EN;</div><div class='del'>-</div><div class='add'>+	/* reset PHY core */</div><div class='add'>+	AT_READ_REG(hw, REG_GPHY_CTRL, &amp;phy_ctrl_data);</div><div class='add'>+	phy_ctrl_data &amp;= ~(GPHY_CTRL_EXT_RESET | GPHY_CTRL_PHY_IDDQ |</div><div class='add'>+		GPHY_CTRL_GATE_25M_EN | GPHY_CTRL_PWDOWN_HW | GPHY_CTRL_CLS);</div><div class='add'>+	phy_ctrl_data |= GPHY_CTRL_SEL_ANA_RST;</div><div class='add'>+	if (!(hw-&gt;ctrl_flags &amp; ATL1C_HIB_DISABLE))</div><div class='add'>+		phy_ctrl_data |= (GPHY_CTRL_HIB_EN | GPHY_CTRL_HIB_PULSE);</div><div class='add'>+	else</div><div class='add'>+		phy_ctrl_data &amp;= ~(GPHY_CTRL_HIB_EN | GPHY_CTRL_HIB_PULSE);</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl_data);</div><div class='ctx'> 	AT_WRITE_FLUSH(hw);</div><div class='del'>-	msleep(40);</div><div class='del'>-	phy_ctrl_data |= GPHY_CTRL_EXT_RESET;</div><div class='del'>-	AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl_data);</div><div class='add'>+	udelay(10);</div><div class='add'>+	AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl_data | GPHY_CTRL_EXT_RESET);</div><div class='ctx'> 	AT_WRITE_FLUSH(hw);</div><div class='del'>-	msleep(10);</div><div class='add'>+	udelay(10 * GPHY_CTRL_EXT_RST_TO);	/* delay 800us */</div><div class='ctx'> </div><div class='add'>+	/* switch clock */</div><div class='ctx'> 	if (hw-&gt;nic_type == athr_l2c_b) {</div><div class='del'>-		atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x0A);</div><div class='del'>-		atl1c_read_phy_reg(hw, MII_DBG_DATA, &amp;phy_data);</div><div class='del'>-		atl1c_write_phy_reg(hw, MII_DBG_DATA, phy_data &amp; 0xDFFF);</div><div class='add'>+		atl1c_read_phy_dbg(hw, MIIDBG_CFGLPSPD, &amp;phy_data);</div><div class='add'>+		atl1c_write_phy_dbg(hw, MIIDBG_CFGLPSPD,</div><div class='add'>+			phy_data &amp; ~CFGLPSPD_RSTCNT_CLK125SW);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;nic_type == athr_l2c_b ||</div><div class='del'>-	    hw-&gt;nic_type == athr_l2c_b2 ||</div><div class='del'>-	    hw-&gt;nic_type == athr_l1d ||</div><div class='del'>-	    hw-&gt;nic_type == athr_l1d_2) {</div><div class='del'>-		atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x3B);</div><div class='del'>-		atl1c_read_phy_reg(hw, MII_DBG_DATA, &amp;phy_data);</div><div class='del'>-		atl1c_write_phy_reg(hw, MII_DBG_DATA, phy_data &amp; 0xFFF7);</div><div class='del'>-		msleep(20);</div><div class='add'>+	/* tx-half amplitude issue fix */</div><div class='add'>+	if (hw-&gt;nic_type == athr_l2c_b || hw-&gt;nic_type == athr_l2c_b2) {</div><div class='add'>+		atl1c_read_phy_dbg(hw, MIIDBG_CABLE1TH_DET, &amp;phy_data);</div><div class='add'>+		phy_data |= CABLE1TH_DET_EN;</div><div class='add'>+		atl1c_write_phy_dbg(hw, MIIDBG_CABLE1TH_DET, phy_data);</div><div class='ctx'> 	}</div><div class='del'>-	if (hw-&gt;nic_type == athr_l1d) {</div><div class='del'>-		atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x29);</div><div class='del'>-		atl1c_write_phy_reg(hw, MII_DBG_DATA, 0x929D);</div><div class='add'>+</div><div class='add'>+	/* clear bit3 of dbgport 3B to lower voltage */</div><div class='add'>+	if (!(hw-&gt;ctrl_flags &amp; ATL1C_HIB_DISABLE)) {</div><div class='add'>+		if (hw-&gt;nic_type == athr_l2c_b || hw-&gt;nic_type == athr_l2c_b2) {</div><div class='add'>+			atl1c_read_phy_dbg(hw, MIIDBG_VOLT_CTRL, &amp;phy_data);</div><div class='add'>+			phy_data &amp;= ~VOLT_CTRL_SWLOWEST;</div><div class='add'>+			atl1c_write_phy_dbg(hw, MIIDBG_VOLT_CTRL, phy_data);</div><div class='add'>+		}</div><div class='add'>+		/* power saving config */</div><div class='add'>+		phy_data =</div><div class='add'>+			hw-&gt;nic_type == athr_l1d || hw-&gt;nic_type == athr_l1d_2 ?</div><div class='add'>+			L1D_LEGCYPS_DEF : L1C_LEGCYPS_DEF;</div><div class='add'>+		atl1c_write_phy_dbg(hw, MIIDBG_LEGCYPS, phy_data);</div><div class='add'>+		/* hib */</div><div class='add'>+		atl1c_write_phy_dbg(hw, MIIDBG_SYSMODCTRL,</div><div class='add'>+			SYSMODCTRL_IECHOADJ_DEF);</div><div class='add'>+	} else {</div><div class='add'>+		/* disable pws */</div><div class='add'>+		atl1c_read_phy_dbg(hw, MIIDBG_LEGCYPS, &amp;phy_data);</div><div class='add'>+		atl1c_write_phy_dbg(hw, MIIDBG_LEGCYPS,</div><div class='add'>+			phy_data &amp; ~LEGCYPS_EN);</div><div class='add'>+		/* disable hibernate */</div><div class='add'>+		atl1c_read_phy_dbg(hw, MIIDBG_HIBNEG, &amp;phy_data);</div><div class='add'>+		atl1c_write_phy_dbg(hw, MIIDBG_HIBNEG,</div><div class='add'>+			phy_data &amp; HIBNEG_PSHIB_EN);</div><div class='ctx'> 	}</div><div class='del'>-	if (hw-&gt;nic_type == athr_l1c || hw-&gt;nic_type == athr_l2c_b2</div><div class='del'>-		|| hw-&gt;nic_type == athr_l2c) {</div><div class='del'>-		atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x29);</div><div class='del'>-		atl1c_write_phy_reg(hw, MII_DBG_DATA, 0xB6DD);</div><div class='add'>+	/* disable AZ(EEE) by default */</div><div class='add'>+	if (hw-&gt;nic_type == athr_l1d || hw-&gt;nic_type == athr_l1d_2 ||</div><div class='add'>+	    hw-&gt;nic_type == athr_l2c_b2) {</div><div class='add'>+		AT_READ_REG(hw, REG_LPI_CTRL, &amp;lpi_ctrl);</div><div class='add'>+		AT_WRITE_REG(hw, REG_LPI_CTRL, lpi_ctrl &amp; ~LPI_CTRL_EN);</div><div class='add'>+		atl1c_write_phy_ext(hw, MIIEXT_ANEG, MIIEXT_LOCAL_EEEADV, 0);</div><div class='add'>+		atl1c_write_phy_ext(hw, MIIEXT_PCS, MIIEXT_CLDCTRL3,</div><div class='add'>+			L2CB_CLDCTRL3);</div><div class='ctx'> 	}</div><div class='del'>-	err = atl1c_write_phy_reg(hw, MII_IER, mii_ier_data);</div><div class='add'>+</div><div class='add'>+	/* other debug port to set */</div><div class='add'>+	atl1c_write_phy_dbg(hw, MIIDBG_ANACTRL, ANACTRL_DEF);</div><div class='add'>+	atl1c_write_phy_dbg(hw, MIIDBG_SRDSYSMOD, SRDSYSMOD_DEF);</div><div class='add'>+	atl1c_write_phy_dbg(hw, MIIDBG_TST10BTCFG, TST10BTCFG_DEF);</div><div class='add'>+	/* UNH-IOL test issue, set bit7 */</div><div class='add'>+	atl1c_write_phy_dbg(hw, MIIDBG_TST100BTCFG,</div><div class='add'>+		TST100BTCFG_DEF | TST100BTCFG_LITCH_EN);</div><div class='add'>+</div><div class='add'>+	/* set phy interrupt mask */</div><div class='add'>+	phy_data = IER_LINK_UP | IER_LINK_DOWN;</div><div class='add'>+	err = atl1c_write_phy_reg(hw, MII_IER, phy_data);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		if (netif_msg_hw(adapter))</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev,</div><div class='ctx'> 				"Error enable PHY linkChange Interrupt\n");</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='del'>-	if (!(hw-&gt;ctrl_flags &amp; ATL1C_FPGA_VERSION))</div><div class='del'>-		atl1c_phy_magic_data(hw);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -589,7 +693,8 @@ int atl1c_get_speed_and_duplex(struct atl1c_hw *hw, u16 *speed, u16 *duplex)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int atl1c_phy_power_saving(struct atl1c_hw *hw)</div><div class='add'>+/* select one link mode to get lower power consumption */</div><div class='add'>+int atl1c_phy_to_ps_link(struct atl1c_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw-&gt;adapter;</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='hunk'>@@ -660,3 +765,101 @@ int atl1c_restart_autoneg(struct atl1c_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	return atl1c_write_phy_reg(hw, MII_BMCR, mii_bmcr_data);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int atl1c_power_saving(struct atl1c_hw *hw, u32 wufc)</div><div class='add'>+{</div><div class='add'>+	struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw-&gt;adapter;</div><div class='add'>+	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='add'>+	u32 master_ctrl, mac_ctrl, phy_ctrl;</div><div class='add'>+	u32 wol_ctrl, speed;</div><div class='add'>+	u16 phy_data;</div><div class='add'>+</div><div class='add'>+	wol_ctrl = 0;</div><div class='add'>+	speed = adapter-&gt;link_speed == SPEED_1000 ?</div><div class='add'>+		MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100;</div><div class='add'>+</div><div class='add'>+	AT_READ_REG(hw, REG_MASTER_CTRL, &amp;master_ctrl);</div><div class='add'>+	AT_READ_REG(hw, REG_MAC_CTRL, &amp;mac_ctrl);</div><div class='add'>+	AT_READ_REG(hw, REG_GPHY_CTRL, &amp;phy_ctrl);</div><div class='add'>+</div><div class='add'>+	master_ctrl &amp;= ~MASTER_CTRL_CLK_SEL_DIS;</div><div class='add'>+	mac_ctrl = FIELD_SETX(mac_ctrl, MAC_CTRL_SPEED, speed);</div><div class='add'>+	mac_ctrl &amp;= ~(MAC_CTRL_DUPLX | MAC_CTRL_RX_EN | MAC_CTRL_TX_EN);</div><div class='add'>+	if (adapter-&gt;link_duplex == FULL_DUPLEX)</div><div class='add'>+		mac_ctrl |= MAC_CTRL_DUPLX;</div><div class='add'>+	phy_ctrl &amp;= ~(GPHY_CTRL_EXT_RESET | GPHY_CTRL_CLS);</div><div class='add'>+	phy_ctrl |= GPHY_CTRL_SEL_ANA_RST | GPHY_CTRL_HIB_PULSE |</div><div class='add'>+		GPHY_CTRL_HIB_EN;</div><div class='add'>+	if (!wufc) { /* without WoL */</div><div class='add'>+		master_ctrl |= MASTER_CTRL_CLK_SEL_DIS;</div><div class='add'>+		phy_ctrl |= GPHY_CTRL_PHY_IDDQ | GPHY_CTRL_PWDOWN_HW;</div><div class='add'>+		AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl);</div><div class='add'>+		AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl);</div><div class='add'>+		AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl);</div><div class='add'>+		AT_WRITE_REG(hw, REG_WOL_CTRL, 0);</div><div class='add'>+		hw-&gt;phy_configured = false; /* re-init PHY when resume */</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	phy_ctrl |= GPHY_CTRL_EXT_RESET;</div><div class='add'>+	if (wufc &amp; AT_WUFC_MAG) {</div><div class='add'>+		mac_ctrl |= MAC_CTRL_RX_EN | MAC_CTRL_BC_EN;</div><div class='add'>+		wol_ctrl |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;</div><div class='add'>+		if (hw-&gt;nic_type == athr_l2c_b &amp;&amp; hw-&gt;revision_id == L2CB_V11)</div><div class='add'>+			wol_ctrl |= WOL_PATTERN_EN | WOL_PATTERN_PME_EN;</div><div class='add'>+	}</div><div class='add'>+	if (wufc &amp; AT_WUFC_LNKC) {</div><div class='add'>+		wol_ctrl |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;</div><div class='add'>+		if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {</div><div class='add'>+			dev_dbg(&amp;pdev-&gt;dev, "%s: write phy MII_IER faild.\n",</div><div class='add'>+				atl1c_driver_name);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/* clear PHY interrupt */</div><div class='add'>+	atl1c_read_phy_reg(hw, MII_ISR, &amp;phy_data);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "%s: suspend MAC=%x,MASTER=%x,PHY=0x%x,WOL=%x\n",</div><div class='add'>+		atl1c_driver_name, mac_ctrl, master_ctrl, phy_ctrl, wol_ctrl);</div><div class='add'>+	AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl);</div><div class='add'>+	AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl);</div><div class='add'>+	AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl);</div><div class='add'>+	AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* configure phy after Link change Event */</div><div class='add'>+void atl1c_post_phy_linkchg(struct atl1c_hw *hw, u16 link_speed)</div><div class='add'>+{</div><div class='add'>+	u16 phy_val;</div><div class='add'>+	bool adj_thresh = false;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;nic_type == athr_l2c_b || hw-&gt;nic_type == athr_l2c_b2 ||</div><div class='add'>+	    hw-&gt;nic_type == athr_l1d || hw-&gt;nic_type == athr_l1d_2)</div><div class='add'>+		adj_thresh = true;</div><div class='add'>+</div><div class='add'>+	if (link_speed != SPEED_0) { /* link up */</div><div class='add'>+		/* az with brcm, half-amp */</div><div class='add'>+		if (hw-&gt;nic_type == athr_l1d_2) {</div><div class='add'>+			atl1c_read_phy_ext(hw, MIIEXT_PCS, MIIEXT_CLDCTRL6,</div><div class='add'>+				&amp;phy_val);</div><div class='add'>+			phy_val = FIELD_GETX(phy_val, CLDCTRL6_CAB_LEN);</div><div class='add'>+			phy_val = phy_val &gt; CLDCTRL6_CAB_LEN_SHORT ?</div><div class='add'>+				AZ_ANADECT_LONG : AZ_ANADECT_DEF;</div><div class='add'>+			atl1c_write_phy_dbg(hw, MIIDBG_AZ_ANADECT, phy_val);</div><div class='add'>+		}</div><div class='add'>+		/* threshold adjust */</div><div class='add'>+		if (adj_thresh &amp;&amp; link_speed == SPEED_100 &amp;&amp; hw-&gt;msi_lnkpatch) {</div><div class='add'>+			atl1c_write_phy_dbg(hw, MIIDBG_MSE16DB, L1D_MSE16DB_UP);</div><div class='add'>+			atl1c_write_phy_dbg(hw, MIIDBG_SYSMODCTRL,</div><div class='add'>+				L1D_SYSMODCTRL_IECHOADJ_DEF);</div><div class='add'>+		}</div><div class='add'>+	} else { /* link down */</div><div class='add'>+		if (adj_thresh &amp;&amp; hw-&gt;msi_lnkpatch) {</div><div class='add'>+			atl1c_write_phy_dbg(hw, MIIDBG_SYSMODCTRL,</div><div class='add'>+				SYSMODCTRL_IECHOADJ_DEF);</div><div class='add'>+			atl1c_write_phy_dbg(hw, MIIDBG_MSE16DB,</div><div class='add'>+				L1D_MSE16DB_DOWN);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h b/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h<br/>index 655fc6c4a8a4..17d935bdde0a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/atheros/atl1c/atl1c_hw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atl1c/atl1c_hw.h</a></div><div class='hunk'>@@ -25,12 +25,18 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/mii.h&gt;</div><div class='ctx'> </div><div class='add'>+#define FIELD_GETX(_x, _name)   ((_x) &gt;&gt; (_name##_SHIFT) &amp; (_name##_MASK))</div><div class='add'>+#define FIELD_SETX(_x, _name, _v) \</div><div class='add'>+(((_x) &amp; ~((_name##_MASK) &lt;&lt; (_name##_SHIFT))) |\</div><div class='add'>+(((_v) &amp; (_name##_MASK)) &lt;&lt; (_name##_SHIFT)))</div><div class='add'>+#define FIELDX(_name, _v) (((_v) &amp; (_name##_MASK)) &lt;&lt; (_name##_SHIFT))</div><div class='add'>+</div><div class='ctx'> struct atl1c_adapter;</div><div class='ctx'> struct atl1c_hw;</div><div class='ctx'> </div><div class='ctx'> /* function prototype */</div><div class='ctx'> void atl1c_phy_disable(struct atl1c_hw *hw);</div><div class='del'>-void atl1c_hw_set_mac_addr(struct atl1c_hw *hw);</div><div class='add'>+void atl1c_hw_set_mac_addr(struct atl1c_hw *hw, u8 *mac_addr);</div><div class='ctx'> int atl1c_phy_reset(struct atl1c_hw *hw);</div><div class='ctx'> int atl1c_read_mac_addr(struct atl1c_hw *hw);</div><div class='ctx'> int atl1c_get_speed_and_duplex(struct atl1c_hw *hw, u16 *speed, u16 *duplex);</div><div class='hunk'>@@ -42,47 +48,45 @@ bool atl1c_read_eeprom(struct atl1c_hw *hw, u32 offset, u32 *p_value);</div><div class='ctx'> int atl1c_phy_init(struct atl1c_hw *hw);</div><div class='ctx'> int atl1c_check_eeprom_exist(struct atl1c_hw *hw);</div><div class='ctx'> int atl1c_restart_autoneg(struct atl1c_hw *hw);</div><div class='del'>-int atl1c_phy_power_saving(struct atl1c_hw *hw);</div><div class='add'>+int atl1c_phy_to_ps_link(struct atl1c_hw *hw);</div><div class='add'>+int atl1c_power_saving(struct atl1c_hw *hw, u32 wufc);</div><div class='add'>+bool atl1c_wait_mdio_idle(struct atl1c_hw *hw);</div><div class='add'>+void atl1c_stop_phy_polling(struct atl1c_hw *hw);</div><div class='add'>+void atl1c_start_phy_polling(struct atl1c_hw *hw, u16 clk_sel);</div><div class='add'>+int atl1c_read_phy_core(struct atl1c_hw *hw, bool ext, u8 dev,</div><div class='add'>+			u16 reg, u16 *phy_data);</div><div class='add'>+int atl1c_write_phy_core(struct atl1c_hw *hw, bool ext, u8 dev,</div><div class='add'>+			u16 reg, u16 phy_data);</div><div class='add'>+int atl1c_read_phy_ext(struct atl1c_hw *hw, u8 dev_addr,</div><div class='add'>+			u16 reg_addr, u16 *phy_data);</div><div class='add'>+int atl1c_write_phy_ext(struct atl1c_hw *hw, u8 dev_addr,</div><div class='add'>+			u16 reg_addr, u16 phy_data);</div><div class='add'>+int atl1c_read_phy_dbg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data);</div><div class='add'>+int atl1c_write_phy_dbg(struct atl1c_hw *hw, u16 reg_addr, u16 phy_data);</div><div class='add'>+void atl1c_post_phy_linkchg(struct atl1c_hw *hw, u16 link_speed);</div><div class='add'>+</div><div class='add'>+/* hw-ids */</div><div class='add'>+#define PCI_DEVICE_ID_ATTANSIC_L2C      0x1062</div><div class='add'>+#define PCI_DEVICE_ID_ATTANSIC_L1C      0x1063</div><div class='add'>+#define PCI_DEVICE_ID_ATHEROS_L2C_B	0x2060 /* AR8152 v1.1 Fast 10/100 */</div><div class='add'>+#define PCI_DEVICE_ID_ATHEROS_L2C_B2	0x2062 /* AR8152 v2.0 Fast 10/100 */</div><div class='add'>+#define PCI_DEVICE_ID_ATHEROS_L1D	0x1073 /* AR8151 v1.0 Gigabit 1000 */</div><div class='add'>+#define PCI_DEVICE_ID_ATHEROS_L1D_2_0	0x1083 /* AR8151 v2.0 Gigabit 1000 */</div><div class='add'>+#define L2CB_V10			0xc0</div><div class='add'>+#define L2CB_V11			0xc1</div><div class='add'>+</div><div class='ctx'> /* register definition */</div><div class='ctx'> #define REG_DEVICE_CAP              	0x5C</div><div class='ctx'> #define DEVICE_CAP_MAX_PAYLOAD_MASK     0x7</div><div class='ctx'> #define DEVICE_CAP_MAX_PAYLOAD_SHIFT    0</div><div class='ctx'> </div><div class='del'>-#define REG_DEVICE_CTRL			0x60</div><div class='del'>-#define DEVICE_CTRL_MAX_PAYLOAD_MASK    0x7</div><div class='del'>-#define DEVICE_CTRL_MAX_PAYLOAD_SHIFT   5</div><div class='del'>-#define DEVICE_CTRL_MAX_RREQ_SZ_MASK    0x7</div><div class='del'>-#define DEVICE_CTRL_MAX_RREQ_SZ_SHIFT   12</div><div class='add'>+#define DEVICE_CTRL_MAXRRS_MIN		2</div><div class='ctx'> </div><div class='ctx'> #define REG_LINK_CTRL			0x68</div><div class='ctx'> #define LINK_CTRL_L0S_EN		0x01</div><div class='ctx'> #define LINK_CTRL_L1_EN			0x02</div><div class='ctx'> #define LINK_CTRL_EXT_SYNC		0x80</div><div class='ctx'> </div><div class='del'>-#define REG_VPD_CAP			0x6C</div><div class='del'>-#define VPD_CAP_ID_MASK                 0xff</div><div class='del'>-#define VPD_CAP_ID_SHIFT                0</div><div class='del'>-#define VPD_CAP_NEXT_PTR_MASK           0xFF</div><div class='del'>-#define VPD_CAP_NEXT_PTR_SHIFT          8</div><div class='del'>-#define VPD_CAP_VPD_ADDR_MASK           0x7FFF</div><div class='del'>-#define VPD_CAP_VPD_ADDR_SHIFT          16</div><div class='del'>-#define VPD_CAP_VPD_FLAG                0x80000000</div><div class='del'>-</div><div class='del'>-#define REG_VPD_DATA                	0x70</div><div class='del'>-</div><div class='del'>-#define REG_PCIE_UC_SEVERITY		0x10C</div><div class='del'>-#define PCIE_UC_SERVRITY_TRN		0x00000001</div><div class='del'>-#define PCIE_UC_SERVRITY_DLP		0x00000010</div><div class='del'>-#define PCIE_UC_SERVRITY_PSN_TLP	0x00001000</div><div class='del'>-#define PCIE_UC_SERVRITY_FCP		0x00002000</div><div class='del'>-#define PCIE_UC_SERVRITY_CPL_TO		0x00004000</div><div class='del'>-#define PCIE_UC_SERVRITY_CA		0x00008000</div><div class='del'>-#define PCIE_UC_SERVRITY_UC		0x00010000</div><div class='del'>-#define PCIE_UC_SERVRITY_ROV		0x00020000</div><div class='del'>-#define PCIE_UC_SERVRITY_MLFP		0x00040000</div><div class='del'>-#define PCIE_UC_SERVRITY_ECRC		0x00080000</div><div class='del'>-#define PCIE_UC_SERVRITY_UR		0x00100000</div><div class='del'>-</div><div class='ctx'> #define REG_DEV_SERIALNUM_CTRL		0x200</div><div class='ctx'> #define REG_DEV_MAC_SEL_MASK		0x0 /* 0:EUI; 1:MAC */</div><div class='ctx'> #define REG_DEV_MAC_SEL_SHIFT		0</div><div class='hunk'>@@ -90,25 +94,17 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);</div><div class='ctx'> #define REG_DEV_SERIAL_NUM_EN_SHIFT	1</div><div class='ctx'> </div><div class='ctx'> #define REG_TWSI_CTRL               	0x218</div><div class='add'>+#define TWSI_CTLR_FREQ_MASK		0x3UL</div><div class='add'>+#define TWSI_CTRL_FREQ_SHIFT		24</div><div class='add'>+#define TWSI_CTRL_FREQ_100K		0</div><div class='add'>+#define TWSI_CTRL_FREQ_200K		1</div><div class='add'>+#define TWSI_CTRL_FREQ_300K		2</div><div class='add'>+#define TWSI_CTRL_FREQ_400K		3</div><div class='add'>+#define TWSI_CTRL_LD_EXIST		BIT(23)</div><div class='add'>+#define TWSI_CTRL_HW_LDSTAT		BIT(12)	/* 0:finish,1:in progress */</div><div class='add'>+#define TWSI_CTRL_SW_LDSTART            BIT(11)</div><div class='ctx'> #define TWSI_CTRL_LD_OFFSET_MASK        0xFF</div><div class='ctx'> #define TWSI_CTRL_LD_OFFSET_SHIFT       0</div><div class='del'>-#define TWSI_CTRL_LD_SLV_ADDR_MASK      0x7</div><div class='del'>-#define TWSI_CTRL_LD_SLV_ADDR_SHIFT     8</div><div class='del'>-#define TWSI_CTRL_SW_LDSTART            0x800</div><div class='del'>-#define TWSI_CTRL_HW_LDSTART            0x1000</div><div class='del'>-#define TWSI_CTRL_SMB_SLV_ADDR_MASK     0x7F</div><div class='del'>-#define TWSI_CTRL_SMB_SLV_ADDR_SHIFT    15</div><div class='del'>-#define TWSI_CTRL_LD_EXIST              0x400000</div><div class='del'>-#define TWSI_CTRL_READ_FREQ_SEL_MASK    0x3</div><div class='del'>-#define TWSI_CTRL_READ_FREQ_SEL_SHIFT   23</div><div class='del'>-#define TWSI_CTRL_FREQ_SEL_100K         0</div><div class='del'>-#define TWSI_CTRL_FREQ_SEL_200K         1</div><div class='del'>-#define TWSI_CTRL_FREQ_SEL_300K         2</div><div class='del'>-#define TWSI_CTRL_FREQ_SEL_400K         3</div><div class='del'>-#define TWSI_CTRL_SMB_SLV_ADDR</div><div class='del'>-#define TWSI_CTRL_WRITE_FREQ_SEL_MASK   0x3</div><div class='del'>-#define TWSI_CTRL_WRITE_FREQ_SEL_SHIFT  24</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> #define REG_PCIE_DEV_MISC_CTRL      	0x21C</div><div class='ctx'> #define PCIE_DEV_MISC_EXT_PIPE     	0x2</div><div class='hunk'>@@ -118,16 +114,23 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);</div><div class='ctx'> #define PCIE_DEV_MISC_SERDES_SEL_DIN   	0x10</div><div class='ctx'> </div><div class='ctx'> #define REG_PCIE_PHYMISC	    	0x1000</div><div class='del'>-#define PCIE_PHYMISC_FORCE_RCV_DET	0x4</div><div class='add'>+#define PCIE_PHYMISC_FORCE_RCV_DET	BIT(2)</div><div class='add'>+#define PCIE_PHYMISC_NFTS_MASK		0xFFUL</div><div class='add'>+#define PCIE_PHYMISC_NFTS_SHIFT		16</div><div class='ctx'> </div><div class='ctx'> #define REG_PCIE_PHYMISC2		0x1004</div><div class='del'>-#define PCIE_PHYMISC2_SERDES_CDR_MASK	0x3</div><div class='del'>-#define PCIE_PHYMISC2_SERDES_CDR_SHIFT	16</div><div class='del'>-#define PCIE_PHYMISC2_SERDES_TH_MASK	0x3</div><div class='del'>-#define PCIE_PHYMISC2_SERDES_TH_SHIFT	18</div><div class='add'>+#define PCIE_PHYMISC2_L0S_TH_MASK	0x3UL</div><div class='add'>+#define PCIE_PHYMISC2_L0S_TH_SHIFT	18</div><div class='add'>+#define L2CB1_PCIE_PHYMISC2_L0S_TH	3</div><div class='add'>+#define PCIE_PHYMISC2_CDR_BW_MASK	0x3UL</div><div class='add'>+#define PCIE_PHYMISC2_CDR_BW_SHIFT	16</div><div class='add'>+#define L2CB1_PCIE_PHYMISC2_CDR_BW	3</div><div class='ctx'> </div><div class='ctx'> #define REG_TWSI_DEBUG			0x1108</div><div class='del'>-#define TWSI_DEBUG_DEV_EXIST		0x20000000</div><div class='add'>+#define TWSI_DEBUG_DEV_EXIST		BIT(29)</div><div class='add'>+</div><div class='add'>+#define REG_DMA_DBG			0x1114</div><div class='add'>+#define DMA_DBG_VENDOR_MSG		BIT(0)</div><div class='ctx'> </div><div class='ctx'> #define REG_EEPROM_CTRL			0x12C0</div><div class='ctx'> #define EEPROM_CTRL_DATA_HI_MASK	0xFFFF</div><div class='hunk'>@@ -140,56 +143,81 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);</div><div class='ctx'> #define REG_EEPROM_DATA_LO		0x12C4</div><div class='ctx'> </div><div class='ctx'> #define REG_OTP_CTRL			0x12F0</div><div class='del'>-#define OTP_CTRL_CLK_EN			0x0002</div><div class='add'>+#define OTP_CTRL_CLK_EN			BIT(1)</div><div class='ctx'> </div><div class='ctx'> #define REG_PM_CTRL			0x12F8</div><div class='del'>-#define PM_CTRL_SDES_EN			0x00000001</div><div class='del'>-#define PM_CTRL_RBER_EN			0x00000002</div><div class='del'>-#define PM_CTRL_CLK_REQ_EN		0x00000004</div><div class='del'>-#define PM_CTRL_ASPM_L1_EN		0x00000008</div><div class='del'>-#define PM_CTRL_SERDES_L1_EN		0x00000010</div><div class='del'>-#define PM_CTRL_SERDES_PLL_L1_EN	0x00000020</div><div class='del'>-#define PM_CTRL_SERDES_PD_EX_L1		0x00000040</div><div class='del'>-#define PM_CTRL_SERDES_BUDS_RX_L1_EN	0x00000080</div><div class='del'>-#define PM_CTRL_L0S_ENTRY_TIMER_MASK	0xF</div><div class='del'>-#define PM_CTRL_L0S_ENTRY_TIMER_SHIFT	8</div><div class='del'>-#define PM_CTRL_ASPM_L0S_EN		0x00001000</div><div class='del'>-#define PM_CTRL_CLK_SWH_L1		0x00002000</div><div class='del'>-#define PM_CTRL_CLK_PWM_VER1_1		0x00004000</div><div class='del'>-#define PM_CTRL_RCVR_WT_TIMER		0x00008000</div><div class='del'>-#define PM_CTRL_L1_ENTRY_TIMER_MASK	0xF</div><div class='del'>-#define PM_CTRL_L1_ENTRY_TIMER_SHIFT	16</div><div class='del'>-#define PM_CTRL_PM_REQ_TIMER_MASK	0xF</div><div class='del'>-#define PM_CTRL_PM_REQ_TIMER_SHIFT	20</div><div class='del'>-#define PM_CTRL_LCKDET_TIMER_MASK	0xF</div><div class='add'>+#define PM_CTRL_HOTRST			BIT(31)</div><div class='add'>+#define PM_CTRL_MAC_ASPM_CHK		BIT(30)	/* L0s/L1 dis by MAC based on</div><div class='add'>+						 * thrghput(setting in 15A0) */</div><div class='add'>+#define PM_CTRL_SA_DLY_EN		BIT(29)</div><div class='add'>+#define PM_CTRL_L0S_BUFSRX_EN		BIT(28)</div><div class='add'>+#define PM_CTRL_LCKDET_TIMER_MASK	0xFUL</div><div class='ctx'> #define PM_CTRL_LCKDET_TIMER_SHIFT	24</div><div class='del'>-#define PM_CTRL_EN_BUFS_RX_L0S		0x10000000</div><div class='del'>-#define PM_CTRL_SA_DLY_EN		0x20000000</div><div class='del'>-#define PM_CTRL_MAC_ASPM_CHK		0x40000000</div><div class='del'>-#define PM_CTRL_HOTRST			0x80000000</div><div class='add'>+#define PM_CTRL_LCKDET_TIMER_DEF	0xC</div><div class='add'>+#define PM_CTRL_PM_REQ_TIMER_MASK	0xFUL</div><div class='add'>+#define PM_CTRL_PM_REQ_TIMER_SHIFT	20	/* pm_request_l1 time &gt; @</div><div class='add'>+						 * -&gt;L0s not L1 */</div><div class='add'>+#define PM_CTRL_PM_REQ_TO_DEF		0xF</div><div class='add'>+#define PMCTRL_TXL1_AFTER_L0S		BIT(19)	/* l1dv2.0+ */</div><div class='add'>+#define L1D_PMCTRL_L1_ENTRY_TM_MASK	7UL	/* l1dv2.0+, 3bits */</div><div class='add'>+#define L1D_PMCTRL_L1_ENTRY_TM_SHIFT	16</div><div class='add'>+#define L1D_PMCTRL_L1_ENTRY_TM_DIS	0</div><div class='add'>+#define L1D_PMCTRL_L1_ENTRY_TM_2US	1</div><div class='add'>+#define L1D_PMCTRL_L1_ENTRY_TM_4US	2</div><div class='add'>+#define L1D_PMCTRL_L1_ENTRY_TM_8US	3</div><div class='add'>+#define L1D_PMCTRL_L1_ENTRY_TM_16US	4</div><div class='add'>+#define L1D_PMCTRL_L1_ENTRY_TM_24US	5</div><div class='add'>+#define L1D_PMCTRL_L1_ENTRY_TM_32US	6</div><div class='add'>+#define L1D_PMCTRL_L1_ENTRY_TM_63US	7</div><div class='add'>+#define PM_CTRL_L1_ENTRY_TIMER_MASK	0xFUL  /* l1C 4bits */</div><div class='add'>+#define PM_CTRL_L1_ENTRY_TIMER_SHIFT	16</div><div class='add'>+#define L2CB1_PM_CTRL_L1_ENTRY_TM	7</div><div class='add'>+#define L1C_PM_CTRL_L1_ENTRY_TM		0xF</div><div class='add'>+#define PM_CTRL_RCVR_WT_TIMER		BIT(15)	/* 1:1us, 0:2ms */</div><div class='add'>+#define PM_CTRL_CLK_PWM_VER1_1		BIT(14)	/* 0:1.0a,1:1.1 */</div><div class='add'>+#define PM_CTRL_CLK_SWH_L1		BIT(13)	/* en pcie clk sw in L1 */</div><div class='add'>+#define PM_CTRL_ASPM_L0S_EN		BIT(12)</div><div class='add'>+#define PM_CTRL_RXL1_AFTER_L0S		BIT(11)	/* l1dv2.0+ */</div><div class='add'>+#define L1D_PMCTRL_L0S_TIMER_MASK	7UL	/* l1d2.0+, 3bits*/</div><div class='add'>+#define L1D_PMCTRL_L0S_TIMER_SHIFT	8</div><div class='add'>+#define PM_CTRL_L0S_ENTRY_TIMER_MASK	0xFUL	/* l1c, 4bits */</div><div class='add'>+#define PM_CTRL_L0S_ENTRY_TIMER_SHIFT	8</div><div class='add'>+#define PM_CTRL_SERDES_BUFS_RX_L1_EN	BIT(7)</div><div class='add'>+#define PM_CTRL_SERDES_PD_EX_L1		BIT(6)	/* power down serdes rx */</div><div class='add'>+#define PM_CTRL_SERDES_PLL_L1_EN	BIT(5)</div><div class='add'>+#define PM_CTRL_SERDES_L1_EN		BIT(4)</div><div class='add'>+#define PM_CTRL_ASPM_L1_EN		BIT(3)</div><div class='add'>+#define PM_CTRL_CLK_REQ_EN		BIT(2)</div><div class='add'>+#define PM_CTRL_RBER_EN			BIT(1)</div><div class='add'>+#define PM_CTRL_SPRSDWER_EN		BIT(0)</div><div class='ctx'> </div><div class='ctx'> #define REG_LTSSM_ID_CTRL		0x12FC</div><div class='ctx'> #define LTSSM_ID_EN_WRO			0x1000</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /* Selene Master Control Register */</div><div class='ctx'> #define REG_MASTER_CTRL			0x1400</div><div class='del'>-#define MASTER_CTRL_SOFT_RST            0x1</div><div class='del'>-#define MASTER_CTRL_TEST_MODE_MASK	0x3</div><div class='del'>-#define MASTER_CTRL_TEST_MODE_SHIFT	2</div><div class='del'>-#define MASTER_CTRL_BERT_START		0x10</div><div class='del'>-#define MASTER_CTRL_OOB_DIS_OFF		0x40</div><div class='del'>-#define MASTER_CTRL_SA_TIMER_EN		0x80</div><div class='del'>-#define MASTER_CTRL_MTIMER_EN           0x100</div><div class='del'>-#define MASTER_CTRL_MANUAL_INT          0x200</div><div class='del'>-#define MASTER_CTRL_TX_ITIMER_EN	0x400</div><div class='del'>-#define MASTER_CTRL_RX_ITIMER_EN	0x800</div><div class='del'>-#define MASTER_CTRL_CLK_SEL_DIS		0x1000</div><div class='del'>-#define MASTER_CTRL_CLK_SWH_MODE	0x2000</div><div class='del'>-#define MASTER_CTRL_INT_RDCLR		0x4000</div><div class='del'>-#define MASTER_CTRL_REV_NUM_SHIFT	16</div><div class='del'>-#define MASTER_CTRL_REV_NUM_MASK	0xff</div><div class='del'>-#define MASTER_CTRL_DEV_ID_SHIFT	24</div><div class='del'>-#define MASTER_CTRL_DEV_ID_MASK		0x7f</div><div class='del'>-#define MASTER_CTRL_OTP_SEL		0x80000000</div><div class='add'>+#define MASTER_CTRL_OTP_SEL		BIT(31)</div><div class='add'>+#define MASTER_DEV_NUM_MASK		0x7FUL</div><div class='add'>+#define MASTER_DEV_NUM_SHIFT		24</div><div class='add'>+#define MASTER_REV_NUM_MASK		0xFFUL</div><div class='add'>+#define MASTER_REV_NUM_SHIFT		16</div><div class='add'>+#define MASTER_CTRL_INT_RDCLR		BIT(14)</div><div class='add'>+#define MASTER_CTRL_CLK_SEL_DIS		BIT(12)	/* 1:alwys sel pclk from</div><div class='add'>+						 * serdes, not sw to 25M */</div><div class='add'>+#define MASTER_CTRL_RX_ITIMER_EN	BIT(11)	/* IRQ MODURATION FOR RX */</div><div class='add'>+#define MASTER_CTRL_TX_ITIMER_EN	BIT(10)	/* MODURATION FOR TX/RX */</div><div class='add'>+#define MASTER_CTRL_MANU_INT		BIT(9)	/* SOFT MANUAL INT */</div><div class='add'>+#define MASTER_CTRL_MANUTIMER_EN	BIT(8)</div><div class='add'>+#define MASTER_CTRL_SA_TIMER_EN		BIT(7)	/* SYS ALIVE TIMER EN */</div><div class='add'>+#define MASTER_CTRL_OOB_DIS		BIT(6)	/* OUT OF BOX DIS */</div><div class='add'>+#define MASTER_CTRL_WAKEN_25M		BIT(5)	/* WAKE WO. PCIE CLK */</div><div class='add'>+#define MASTER_CTRL_BERT_START		BIT(4)</div><div class='add'>+#define MASTER_PCIE_TSTMOD_MASK		3UL</div><div class='add'>+#define MASTER_PCIE_TSTMOD_SHIFT	2</div><div class='add'>+#define MASTER_PCIE_RST			BIT(1)</div><div class='add'>+#define MASTER_CTRL_SOFT_RST		BIT(0)	/* RST MAC &amp; DMA */</div><div class='add'>+#define DMA_MAC_RST_TO			50</div><div class='ctx'> </div><div class='ctx'> /* Timer Initial Value Register */</div><div class='ctx'> #define REG_MANUAL_TIMER_INIT       	0x1404</div><div class='hunk'>@@ -201,87 +229,85 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);</div><div class='ctx'> #define IRQ_MODRT_RX_TIMER_SHIFT	16</div><div class='ctx'> </div><div class='ctx'> #define REG_GPHY_CTRL               	0x140C</div><div class='del'>-#define GPHY_CTRL_EXT_RESET         	0x1</div><div class='del'>-#define GPHY_CTRL_RTL_MODE		0x2</div><div class='del'>-#define GPHY_CTRL_LED_MODE		0x4</div><div class='del'>-#define GPHY_CTRL_ANEG_NOW		0x8</div><div class='del'>-#define GPHY_CTRL_REV_ANEG		0x10</div><div class='del'>-#define GPHY_CTRL_GATE_25M_EN       	0x20</div><div class='del'>-#define GPHY_CTRL_LPW_EXIT          	0x40</div><div class='del'>-#define GPHY_CTRL_PHY_IDDQ          	0x80</div><div class='del'>-#define GPHY_CTRL_PHY_IDDQ_DIS      	0x100</div><div class='del'>-#define GPHY_CTRL_GIGA_DIS		0x200</div><div class='del'>-#define GPHY_CTRL_HIB_EN            	0x400</div><div class='del'>-#define GPHY_CTRL_HIB_PULSE         	0x800</div><div class='del'>-#define GPHY_CTRL_SEL_ANA_RST       	0x1000</div><div class='del'>-#define GPHY_CTRL_PHY_PLL_ON        	0x2000</div><div class='del'>-#define GPHY_CTRL_PWDOWN_HW		0x4000</div><div class='del'>-#define GPHY_CTRL_PHY_PLL_BYPASS	0x8000</div><div class='del'>-</div><div class='del'>-#define GPHY_CTRL_DEFAULT (		 \</div><div class='del'>-		GPHY_CTRL_SEL_ANA_RST	|\</div><div class='del'>-		GPHY_CTRL_HIB_PULSE	|\</div><div class='del'>-		GPHY_CTRL_HIB_EN)</div><div class='del'>-</div><div class='del'>-#define GPHY_CTRL_PW_WOL_DIS (		 \</div><div class='del'>-		GPHY_CTRL_SEL_ANA_RST	|\</div><div class='del'>-		GPHY_CTRL_HIB_PULSE	|\</div><div class='del'>-		GPHY_CTRL_HIB_EN	|\</div><div class='del'>-		GPHY_CTRL_PWDOWN_HW	|\</div><div class='del'>-		GPHY_CTRL_PHY_IDDQ)</div><div class='del'>-</div><div class='del'>-#define GPHY_CTRL_POWER_SAVING (	\</div><div class='del'>-		GPHY_CTRL_SEL_ANA_RST	|\</div><div class='del'>-		GPHY_CTRL_HIB_EN	|\</div><div class='del'>-		GPHY_CTRL_HIB_PULSE	|\</div><div class='del'>-		GPHY_CTRL_PWDOWN_HW	|\</div><div class='del'>-		GPHY_CTRL_PHY_IDDQ)</div><div class='add'>+#define GPHY_CTRL_ADDR_MASK		0x1FUL</div><div class='add'>+#define GPHY_CTRL_ADDR_SHIFT		19</div><div class='add'>+#define GPHY_CTRL_BP_VLTGSW		BIT(18)</div><div class='add'>+#define GPHY_CTRL_100AB_EN		BIT(17)</div><div class='add'>+#define GPHY_CTRL_10AB_EN		BIT(16)</div><div class='add'>+#define GPHY_CTRL_PHY_PLL_BYPASS	BIT(15)</div><div class='add'>+#define GPHY_CTRL_PWDOWN_HW		BIT(14)	/* affect MAC&amp;PHY, to low pw */</div><div class='add'>+#define GPHY_CTRL_PHY_PLL_ON		BIT(13)	/* 1:pll always on, 0:can sw */</div><div class='add'>+#define GPHY_CTRL_SEL_ANA_RST		BIT(12)</div><div class='add'>+#define GPHY_CTRL_HIB_PULSE		BIT(11)</div><div class='add'>+#define GPHY_CTRL_HIB_EN		BIT(10)</div><div class='add'>+#define GPHY_CTRL_GIGA_DIS		BIT(9)</div><div class='add'>+#define GPHY_CTRL_PHY_IDDQ_DIS		BIT(8)	/* pw on RST */</div><div class='add'>+#define GPHY_CTRL_PHY_IDDQ		BIT(7)	/* bit8 affect bit7 while rb */</div><div class='add'>+#define GPHY_CTRL_LPW_EXIT		BIT(6)</div><div class='add'>+#define GPHY_CTRL_GATE_25M_EN		BIT(5)</div><div class='add'>+#define GPHY_CTRL_REV_ANEG		BIT(4)</div><div class='add'>+#define GPHY_CTRL_ANEG_NOW		BIT(3)</div><div class='add'>+#define GPHY_CTRL_LED_MODE		BIT(2)</div><div class='add'>+#define GPHY_CTRL_RTL_MODE		BIT(1)</div><div class='add'>+#define GPHY_CTRL_EXT_RESET		BIT(0)	/* 1:out of DSP RST status */</div><div class='add'>+#define GPHY_CTRL_EXT_RST_TO		80	/* 800us atmost */</div><div class='add'>+#define GPHY_CTRL_CLS			(\</div><div class='add'>+	GPHY_CTRL_LED_MODE		|\</div><div class='add'>+	GPHY_CTRL_100AB_EN		|\</div><div class='add'>+	GPHY_CTRL_PHY_PLL_ON)</div><div class='add'>+</div><div class='ctx'> /* Block IDLE Status Register */</div><div class='del'>-#define REG_IDLE_STATUS  		0x1410</div><div class='del'>-#define IDLE_STATUS_MASK		0x00FF</div><div class='del'>-#define IDLE_STATUS_RXMAC_NO_IDLE      	0x1</div><div class='del'>-#define IDLE_STATUS_TXMAC_NO_IDLE      	0x2</div><div class='del'>-#define IDLE_STATUS_RXQ_NO_IDLE        	0x4</div><div class='del'>-#define IDLE_STATUS_TXQ_NO_IDLE        	0x8</div><div class='del'>-#define IDLE_STATUS_DMAR_NO_IDLE       	0x10</div><div class='del'>-#define IDLE_STATUS_DMAW_NO_IDLE       	0x20</div><div class='del'>-#define IDLE_STATUS_SMB_NO_IDLE        	0x40</div><div class='del'>-#define IDLE_STATUS_CMB_NO_IDLE        	0x80</div><div class='add'>+#define REG_IDLE_STATUS			0x1410</div><div class='add'>+#define IDLE_STATUS_SFORCE_MASK		0xFUL</div><div class='add'>+#define IDLE_STATUS_SFORCE_SHIFT	14</div><div class='add'>+#define IDLE_STATUS_CALIB_DONE		BIT(13)</div><div class='add'>+#define IDLE_STATUS_CALIB_RES_MASK	0x1FUL</div><div class='add'>+#define IDLE_STATUS_CALIB_RES_SHIFT	8</div><div class='add'>+#define IDLE_STATUS_CALIBERR_MASK	0xFUL</div><div class='add'>+#define IDLE_STATUS_CALIBERR_SHIFT	4</div><div class='add'>+#define IDLE_STATUS_TXQ_BUSY		BIT(3)</div><div class='add'>+#define IDLE_STATUS_RXQ_BUSY		BIT(2)</div><div class='add'>+#define IDLE_STATUS_TXMAC_BUSY		BIT(1)</div><div class='add'>+#define IDLE_STATUS_RXMAC_BUSY		BIT(0)</div><div class='add'>+#define IDLE_STATUS_MASK		(\</div><div class='add'>+	IDLE_STATUS_TXQ_BUSY		|\</div><div class='add'>+	IDLE_STATUS_RXQ_BUSY		|\</div><div class='add'>+	IDLE_STATUS_TXMAC_BUSY		|\</div><div class='add'>+	IDLE_STATUS_RXMAC_BUSY)</div><div class='ctx'> </div><div class='ctx'> /* MDIO Control Register */</div><div class='ctx'> #define REG_MDIO_CTRL           	0x1414</div><div class='del'>-#define MDIO_DATA_MASK          	0xffff  /* On MDIO write, the 16-bit</div><div class='del'>-						 * control data to write to PHY</div><div class='del'>-						 * MII management register */</div><div class='del'>-#define MDIO_DATA_SHIFT         	0       /* On MDIO read, the 16-bit</div><div class='del'>-						 * status data that was read</div><div class='del'>-						 * from the PHY MII management register */</div><div class='del'>-#define MDIO_REG_ADDR_MASK      	0x1f    /* MDIO register address */</div><div class='del'>-#define MDIO_REG_ADDR_SHIFT     	16</div><div class='del'>-#define MDIO_RW                 	0x200000  /* 1: read, 0: write */</div><div class='del'>-#define MDIO_SUP_PREAMBLE       	0x400000  /* Suppress preamble */</div><div class='del'>-#define MDIO_START              	0x800000  /* Write 1 to initiate the MDIO</div><div class='del'>-						   * master. And this bit is self</div><div class='del'>-						   * cleared after one cycle */</div><div class='del'>-#define MDIO_CLK_SEL_SHIFT      	24</div><div class='del'>-#define MDIO_CLK_25_4           	0</div><div class='del'>-#define MDIO_CLK_25_6           	2</div><div class='del'>-#define MDIO_CLK_25_8           	3</div><div class='del'>-#define MDIO_CLK_25_10          	4</div><div class='del'>-#define MDIO_CLK_25_14          	5</div><div class='del'>-#define MDIO_CLK_25_20          	6</div><div class='del'>-#define MDIO_CLK_25_28          	7</div><div class='del'>-#define MDIO_BUSY               	0x8000000</div><div class='del'>-#define MDIO_AP_EN              	0x10000000</div><div class='del'>-#define MDIO_WAIT_TIMES         	10</div><div class='del'>-</div><div class='del'>-/* MII PHY Status Register */</div><div class='del'>-#define REG_PHY_STATUS           	0x1418</div><div class='del'>-#define PHY_GENERAL_STATUS_MASK		0xFFFF</div><div class='del'>-#define PHY_STATUS_RECV_ENABLE		0x0001</div><div class='del'>-#define PHY_OE_PWSP_STATUS_MASK		0x07FF</div><div class='del'>-#define PHY_OE_PWSP_STATUS_SHIFT	16</div><div class='del'>-#define PHY_STATUS_LPW_STATE		0x80000000</div><div class='add'>+#define MDIO_CTRL_MODE_EXT		BIT(30)</div><div class='add'>+#define MDIO_CTRL_POST_READ		BIT(29)</div><div class='add'>+#define MDIO_CTRL_AP_EN			BIT(28)</div><div class='add'>+#define MDIO_CTRL_BUSY			BIT(27)</div><div class='add'>+#define MDIO_CTRL_CLK_SEL_MASK		0x7UL</div><div class='add'>+#define MDIO_CTRL_CLK_SEL_SHIFT		24</div><div class='add'>+#define MDIO_CTRL_CLK_25_4		0	/* 25MHz divide 4 */</div><div class='add'>+#define MDIO_CTRL_CLK_25_6		2</div><div class='add'>+#define MDIO_CTRL_CLK_25_8		3</div><div class='add'>+#define MDIO_CTRL_CLK_25_10		4</div><div class='add'>+#define MDIO_CTRL_CLK_25_32		5</div><div class='add'>+#define MDIO_CTRL_CLK_25_64		6</div><div class='add'>+#define MDIO_CTRL_CLK_25_128		7</div><div class='add'>+#define MDIO_CTRL_START			BIT(23)</div><div class='add'>+#define MDIO_CTRL_SPRES_PRMBL		BIT(22)</div><div class='add'>+#define MDIO_CTRL_OP_READ		BIT(21)	/* 1:read, 0:write */</div><div class='add'>+#define MDIO_CTRL_REG_MASK		0x1FUL</div><div class='add'>+#define MDIO_CTRL_REG_SHIFT		16</div><div class='add'>+#define MDIO_CTRL_DATA_MASK		0xFFFFUL</div><div class='add'>+#define MDIO_CTRL_DATA_SHIFT		0</div><div class='add'>+#define MDIO_MAX_AC_TO			120	/* 1.2ms timeout for slow clk */</div><div class='add'>+</div><div class='add'>+/* for extension reg access */</div><div class='add'>+#define REG_MDIO_EXTN			0x1448</div><div class='add'>+#define MDIO_EXTN_PORTAD_MASK		0x1FUL</div><div class='add'>+#define MDIO_EXTN_PORTAD_SHIFT		21</div><div class='add'>+#define MDIO_EXTN_DEVAD_MASK		0x1FUL</div><div class='add'>+#define MDIO_EXTN_DEVAD_SHIFT		16</div><div class='add'>+#define MDIO_EXTN_REG_MASK		0xFFFFUL</div><div class='add'>+#define MDIO_EXTN_REG_SHIFT		0</div><div class='add'>+</div><div class='ctx'> /* BIST Control and Status Register0 (for the Packet Memory) */</div><div class='ctx'> #define REG_BIST0_CTRL              	0x141c</div><div class='ctx'> #define BIST0_NOW                   	0x1</div><div class='hunk'>@@ -299,50 +325,81 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);</div><div class='ctx'> #define BIST1_FUSE_FLAG             	0x4</div><div class='ctx'> </div><div class='ctx'> /* SerDes Lock Detect Control and Status Register */</div><div class='del'>-#define REG_SERDES_LOCK            	0x1424</div><div class='del'>-#define SERDES_LOCK_DETECT          	0x1  /* SerDes lock detected. This signal</div><div class='del'>-					      * comes from Analog SerDes */</div><div class='del'>-#define SERDES_LOCK_DETECT_EN       	0x2  /* 1: Enable SerDes Lock detect function */</div><div class='del'>-#define SERDES_LOCK_STS_SELFB_PLL_SHIFT 0xE</div><div class='del'>-#define SERDES_LOCK_STS_SELFB_PLL_MASK  0x3</div><div class='del'>-#define SERDES_OVCLK_18_25		0x0</div><div class='del'>-#define SERDES_OVCLK_12_18		0x1</div><div class='del'>-#define SERDES_OVCLK_0_4		0x2</div><div class='del'>-#define SERDES_OVCLK_4_12		0x3</div><div class='del'>-#define SERDES_MAC_CLK_SLOWDOWN		0x20000</div><div class='del'>-#define SERDES_PYH_CLK_SLOWDOWN		0x40000</div><div class='add'>+#define REG_SERDES			0x1424</div><div class='add'>+#define SERDES_PHY_CLK_SLOWDOWN		BIT(18)</div><div class='add'>+#define SERDES_MAC_CLK_SLOWDOWN		BIT(17)</div><div class='add'>+#define SERDES_SELFB_PLL_MASK		0x3UL</div><div class='add'>+#define SERDES_SELFB_PLL_SHIFT		14</div><div class='add'>+#define SERDES_PHYCLK_SEL_GTX		BIT(13)	/* 1:gtx_clk, 0:25M */</div><div class='add'>+#define SERDES_PCIECLK_SEL_SRDS		BIT(12)	/* 1:serdes,0:25M */</div><div class='add'>+#define SERDES_BUFS_RX_EN		BIT(11)</div><div class='add'>+#define SERDES_PD_RX			BIT(10)</div><div class='add'>+#define SERDES_PLL_EN			BIT(9)</div><div class='add'>+#define SERDES_EN			BIT(8)</div><div class='add'>+#define SERDES_SELFB_PLL_SEL_CSR	BIT(6)	/* 0:state-machine,1:csr */</div><div class='add'>+#define SERDES_SELFB_PLL_CSR_MASK	0x3UL</div><div class='add'>+#define SERDES_SELFB_PLL_CSR_SHIFT	4</div><div class='add'>+#define SERDES_SELFB_PLL_CSR_4		3	/* 4-12% OV-CLK */</div><div class='add'>+#define SERDES_SELFB_PLL_CSR_0		2	/* 0-4% OV-CLK */</div><div class='add'>+#define SERDES_SELFB_PLL_CSR_12		1	/* 12-18% OV-CLK */</div><div class='add'>+#define SERDES_SELFB_PLL_CSR_18		0	/* 18-25% OV-CLK */</div><div class='add'>+#define SERDES_VCO_SLOW			BIT(3)</div><div class='add'>+#define SERDES_VCO_FAST			BIT(2)</div><div class='add'>+#define SERDES_LOCK_DETECT_EN		BIT(1)</div><div class='add'>+#define SERDES_LOCK_DETECT		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_LPI_DECISN_TIMER            0x143C</div><div class='add'>+#define L2CB_LPI_DESISN_TIMER		0x7D00</div><div class='add'>+</div><div class='add'>+#define REG_LPI_CTRL                    0x1440</div><div class='add'>+#define LPI_CTRL_CHK_DA			BIT(31)</div><div class='add'>+#define LPI_CTRL_ENH_TO_MASK		0x1FFFUL</div><div class='add'>+#define LPI_CTRL_ENH_TO_SHIFT		12</div><div class='add'>+#define LPI_CTRL_ENH_TH_MASK		0x1FUL</div><div class='add'>+#define LPI_CTRL_ENH_TH_SHIFT		6</div><div class='add'>+#define LPI_CTRL_ENH_EN			BIT(5)</div><div class='add'>+#define LPI_CTRL_CHK_RX			BIT(4)</div><div class='add'>+#define LPI_CTRL_CHK_STATE		BIT(3)</div><div class='add'>+#define LPI_CTRL_GMII			BIT(2)</div><div class='add'>+#define LPI_CTRL_TO_PHY			BIT(1)</div><div class='add'>+#define LPI_CTRL_EN			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_LPI_WAIT			0x1444</div><div class='add'>+#define LPI_WAIT_TIMER_MASK		0xFFFFUL</div><div class='add'>+#define LPI_WAIT_TIMER_SHIFT		0</div><div class='ctx'> </div><div class='ctx'> /* MAC Control Register  */</div><div class='ctx'> #define REG_MAC_CTRL         		0x1480</div><div class='del'>-#define MAC_CTRL_TX_EN			0x1</div><div class='del'>-#define MAC_CTRL_RX_EN			0x2</div><div class='del'>-#define MAC_CTRL_TX_FLOW		0x4</div><div class='del'>-#define MAC_CTRL_RX_FLOW            	0x8</div><div class='del'>-#define MAC_CTRL_LOOPBACK          	0x10</div><div class='del'>-#define MAC_CTRL_DUPLX              	0x20</div><div class='del'>-#define MAC_CTRL_ADD_CRC            	0x40</div><div class='del'>-#define MAC_CTRL_PAD                	0x80</div><div class='del'>-#define MAC_CTRL_LENCHK             	0x100</div><div class='del'>-#define MAC_CTRL_HUGE_EN            	0x200</div><div class='del'>-#define MAC_CTRL_PRMLEN_SHIFT       	10</div><div class='del'>-#define MAC_CTRL_PRMLEN_MASK        	0xf</div><div class='del'>-#define MAC_CTRL_RMV_VLAN           	0x4000</div><div class='del'>-#define MAC_CTRL_PROMIS_EN          	0x8000</div><div class='del'>-#define MAC_CTRL_TX_PAUSE           	0x10000</div><div class='del'>-#define MAC_CTRL_SCNT               	0x20000</div><div class='del'>-#define MAC_CTRL_SRST_TX            	0x40000</div><div class='del'>-#define MAC_CTRL_TX_SIMURST         	0x80000</div><div class='del'>-#define MAC_CTRL_SPEED_SHIFT        	20</div><div class='del'>-#define MAC_CTRL_SPEED_MASK         	0x3</div><div class='del'>-#define MAC_CTRL_DBG_TX_BKPRESURE   	0x400000</div><div class='del'>-#define MAC_CTRL_TX_HUGE            	0x800000</div><div class='del'>-#define MAC_CTRL_RX_CHKSUM_EN       	0x1000000</div><div class='del'>-#define MAC_CTRL_MC_ALL_EN          	0x2000000</div><div class='del'>-#define MAC_CTRL_BC_EN              	0x4000000</div><div class='del'>-#define MAC_CTRL_DBG                	0x8000000</div><div class='del'>-#define MAC_CTRL_SINGLE_PAUSE_EN	0x10000000</div><div class='del'>-#define MAC_CTRL_HASH_ALG_CRC32		0x20000000</div><div class='del'>-#define MAC_CTRL_SPEED_MODE_SW		0x40000000</div><div class='add'>+#define MAC_CTRL_SPEED_MODE_SW		BIT(30) /* 0:phy,1:sw */</div><div class='add'>+#define MAC_CTRL_HASH_ALG_CRC32		BIT(29) /* 1:legacy,0:lw_5b */</div><div class='add'>+#define MAC_CTRL_SINGLE_PAUSE_EN	BIT(28)</div><div class='add'>+#define MAC_CTRL_DBG			BIT(27)</div><div class='add'>+#define MAC_CTRL_BC_EN			BIT(26)</div><div class='add'>+#define MAC_CTRL_MC_ALL_EN		BIT(25)</div><div class='add'>+#define MAC_CTRL_RX_CHKSUM_EN		BIT(24)</div><div class='add'>+#define MAC_CTRL_TX_HUGE		BIT(23)</div><div class='add'>+#define MAC_CTRL_DBG_TX_BKPRESURE	BIT(22)</div><div class='add'>+#define MAC_CTRL_SPEED_MASK		3UL</div><div class='add'>+#define MAC_CTRL_SPEED_SHIFT		20</div><div class='add'>+#define MAC_CTRL_SPEED_10_100		1</div><div class='add'>+#define MAC_CTRL_SPEED_1000		2</div><div class='add'>+#define MAC_CTRL_TX_SIMURST		BIT(19)</div><div class='add'>+#define MAC_CTRL_SCNT			BIT(17)</div><div class='add'>+#define MAC_CTRL_TX_PAUSE		BIT(16)</div><div class='add'>+#define MAC_CTRL_PROMIS_EN		BIT(15)</div><div class='add'>+#define MAC_CTRL_RMV_VLAN		BIT(14)</div><div class='add'>+#define MAC_CTRL_PRMLEN_MASK		0xFUL</div><div class='add'>+#define MAC_CTRL_PRMLEN_SHIFT		10</div><div class='add'>+#define MAC_CTRL_HUGE_EN		BIT(9)</div><div class='add'>+#define MAC_CTRL_LENCHK			BIT(8)</div><div class='add'>+#define MAC_CTRL_PAD			BIT(7)</div><div class='add'>+#define MAC_CTRL_ADD_CRC		BIT(6)</div><div class='add'>+#define MAC_CTRL_DUPLX			BIT(5)</div><div class='add'>+#define MAC_CTRL_LOOPBACK		BIT(4)</div><div class='add'>+#define MAC_CTRL_RX_FLOW		BIT(3)</div><div class='add'>+#define MAC_CTRL_TX_FLOW		BIT(2)</div><div class='add'>+#define MAC_CTRL_RX_EN			BIT(1)</div><div class='add'>+#define MAC_CTRL_TX_EN			BIT(0)</div><div class='ctx'> </div><div class='ctx'> /* MAC IPG/IFG Control Register  */</div><div class='ctx'> #define REG_MAC_IPG_IFG             	0x1484</div><div class='hunk'>@@ -386,34 +443,53 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);</div><div class='ctx'> </div><div class='ctx'> /* Wake-On-Lan control register */</div><div class='ctx'> #define REG_WOL_CTRL                	0x14a0</div><div class='del'>-#define WOL_PATTERN_EN              	0x00000001</div><div class='del'>-#define WOL_PATTERN_PME_EN              0x00000002</div><div class='del'>-#define WOL_MAGIC_EN                    0x00000004</div><div class='del'>-#define WOL_MAGIC_PME_EN                0x00000008</div><div class='del'>-#define WOL_LINK_CHG_EN                 0x00000010</div><div class='del'>-#define WOL_LINK_CHG_PME_EN             0x00000020</div><div class='del'>-#define WOL_PATTERN_ST                  0x00000100</div><div class='del'>-#define WOL_MAGIC_ST                    0x00000200</div><div class='del'>-#define WOL_LINKCHG_ST                  0x00000400</div><div class='del'>-#define WOL_CLK_SWITCH_EN               0x00008000</div><div class='del'>-#define WOL_PT0_EN                      0x00010000</div><div class='del'>-#define WOL_PT1_EN                      0x00020000</div><div class='del'>-#define WOL_PT2_EN                      0x00040000</div><div class='del'>-#define WOL_PT3_EN                      0x00080000</div><div class='del'>-#define WOL_PT4_EN                      0x00100000</div><div class='del'>-#define WOL_PT5_EN                      0x00200000</div><div class='del'>-#define WOL_PT6_EN                      0x00400000</div><div class='add'>+#define WOL_PT7_MATCH			BIT(31)</div><div class='add'>+#define WOL_PT6_MATCH			BIT(30)</div><div class='add'>+#define WOL_PT5_MATCH			BIT(29)</div><div class='add'>+#define WOL_PT4_MATCH			BIT(28)</div><div class='add'>+#define WOL_PT3_MATCH			BIT(27)</div><div class='add'>+#define WOL_PT2_MATCH			BIT(26)</div><div class='add'>+#define WOL_PT1_MATCH			BIT(25)</div><div class='add'>+#define WOL_PT0_MATCH			BIT(24)</div><div class='add'>+#define WOL_PT7_EN			BIT(23)</div><div class='add'>+#define WOL_PT6_EN			BIT(22)</div><div class='add'>+#define WOL_PT5_EN			BIT(21)</div><div class='add'>+#define WOL_PT4_EN			BIT(20)</div><div class='add'>+#define WOL_PT3_EN			BIT(19)</div><div class='add'>+#define WOL_PT2_EN			BIT(18)</div><div class='add'>+#define WOL_PT1_EN			BIT(17)</div><div class='add'>+#define WOL_PT0_EN			BIT(16)</div><div class='add'>+#define WOL_LNKCHG_ST			BIT(10)</div><div class='add'>+#define WOL_MAGIC_ST			BIT(9)</div><div class='add'>+#define WOL_PATTERN_ST			BIT(8)</div><div class='add'>+#define WOL_OOB_EN			BIT(6)</div><div class='add'>+#define WOL_LINK_CHG_PME_EN		BIT(5)</div><div class='add'>+#define WOL_LINK_CHG_EN			BIT(4)</div><div class='add'>+#define WOL_MAGIC_PME_EN		BIT(3)</div><div class='add'>+#define WOL_MAGIC_EN			BIT(2)</div><div class='add'>+#define WOL_PATTERN_PME_EN		BIT(1)</div><div class='add'>+#define WOL_PATTERN_EN			BIT(0)</div><div class='ctx'> </div><div class='ctx'> /* WOL Length ( 2 DWORD ) */</div><div class='del'>-#define REG_WOL_PATTERN_LEN         	0x14a4</div><div class='del'>-#define WOL_PT_LEN_MASK                 0x7f</div><div class='del'>-#define WOL_PT0_LEN_SHIFT               0</div><div class='del'>-#define WOL_PT1_LEN_SHIFT               8</div><div class='del'>-#define WOL_PT2_LEN_SHIFT               16</div><div class='del'>-#define WOL_PT3_LEN_SHIFT               24</div><div class='del'>-#define WOL_PT4_LEN_SHIFT               0</div><div class='del'>-#define WOL_PT5_LEN_SHIFT               8</div><div class='del'>-#define WOL_PT6_LEN_SHIFT               16</div><div class='add'>+#define REG_WOL_PTLEN1			0x14A4</div><div class='add'>+#define WOL_PTLEN1_3_MASK		0xFFUL</div><div class='add'>+#define WOL_PTLEN1_3_SHIFT		24</div><div class='add'>+#define WOL_PTLEN1_2_MASK		0xFFUL</div><div class='add'>+#define WOL_PTLEN1_2_SHIFT		16</div><div class='add'>+#define WOL_PTLEN1_1_MASK		0xFFUL</div><div class='add'>+#define WOL_PTLEN1_1_SHIFT		8</div><div class='add'>+#define WOL_PTLEN1_0_MASK		0xFFUL</div><div class='add'>+#define WOL_PTLEN1_0_SHIFT		0</div><div class='add'>+</div><div class='add'>+#define REG_WOL_PTLEN2			0x14A8</div><div class='add'>+#define WOL_PTLEN2_7_MASK		0xFFUL</div><div class='add'>+#define WOL_PTLEN2_7_SHIFT		24</div><div class='add'>+#define WOL_PTLEN2_6_MASK		0xFFUL</div><div class='add'>+#define WOL_PTLEN2_6_SHIFT		16</div><div class='add'>+#define WOL_PTLEN2_5_MASK		0xFFUL</div><div class='add'>+#define WOL_PTLEN2_5_SHIFT		8</div><div class='add'>+#define WOL_PTLEN2_4_MASK		0xFFUL</div><div class='add'>+#define WOL_PTLEN2_4_SHIFT		0</div><div class='ctx'> </div><div class='ctx'> /* Internal SRAM Partition Register */</div><div class='ctx'> #define RFDX_HEAD_ADDR_MASK		0x03FF</div><div class='hunk'>@@ -458,66 +534,50 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);</div><div class='ctx'>  */</div><div class='ctx'> #define REG_RX_BASE_ADDR_HI		0x1540</div><div class='ctx'> #define REG_TX_BASE_ADDR_HI		0x1544</div><div class='del'>-#define REG_SMB_BASE_ADDR_HI		0x1548</div><div class='del'>-#define REG_SMB_BASE_ADDR_LO		0x154C</div><div class='ctx'> #define REG_RFD0_HEAD_ADDR_LO		0x1550</div><div class='del'>-#define REG_RFD1_HEAD_ADDR_LO		0x1554</div><div class='del'>-#define REG_RFD2_HEAD_ADDR_LO		0x1558</div><div class='del'>-#define REG_RFD3_HEAD_ADDR_LO		0x155C</div><div class='ctx'> #define REG_RFD_RING_SIZE		0x1560</div><div class='ctx'> #define RFD_RING_SIZE_MASK		0x0FFF</div><div class='ctx'> #define REG_RX_BUF_SIZE			0x1564</div><div class='ctx'> #define RX_BUF_SIZE_MASK		0xFFFF</div><div class='ctx'> #define REG_RRD0_HEAD_ADDR_LO		0x1568</div><div class='del'>-#define REG_RRD1_HEAD_ADDR_LO		0x156C</div><div class='del'>-#define REG_RRD2_HEAD_ADDR_LO		0x1570</div><div class='del'>-#define REG_RRD3_HEAD_ADDR_LO		0x1574</div><div class='ctx'> #define REG_RRD_RING_SIZE		0x1578</div><div class='ctx'> #define RRD_RING_SIZE_MASK		0x0FFF</div><div class='del'>-#define REG_HTPD_HEAD_ADDR_LO		0x157C</div><div class='del'>-#define REG_NTPD_HEAD_ADDR_LO		0x1580</div><div class='add'>+#define REG_TPD_PRI1_ADDR_LO		0x157C</div><div class='add'>+#define REG_TPD_PRI0_ADDR_LO		0x1580</div><div class='ctx'> #define REG_TPD_RING_SIZE		0x1584</div><div class='ctx'> #define TPD_RING_SIZE_MASK		0xFFFF</div><div class='del'>-#define REG_CMB_BASE_ADDR_LO		0x1588</div><div class='del'>-</div><div class='del'>-/* RSS about */</div><div class='del'>-#define REG_RSS_KEY0                    0x14B0</div><div class='del'>-#define REG_RSS_KEY1                    0x14B4</div><div class='del'>-#define REG_RSS_KEY2                    0x14B8</div><div class='del'>-#define REG_RSS_KEY3                    0x14BC</div><div class='del'>-#define REG_RSS_KEY4                    0x14C0</div><div class='del'>-#define REG_RSS_KEY5                    0x14C4</div><div class='del'>-#define REG_RSS_KEY6                    0x14C8</div><div class='del'>-#define REG_RSS_KEY7                    0x14CC</div><div class='del'>-#define REG_RSS_KEY8                    0x14D0</div><div class='del'>-#define REG_RSS_KEY9                    0x14D4</div><div class='del'>-#define REG_IDT_TABLE0                	0x14E0</div><div class='del'>-#define REG_IDT_TABLE1                  0x14E4</div><div class='del'>-#define REG_IDT_TABLE2                  0x14E8</div><div class='del'>-#define REG_IDT_TABLE3                  0x14EC</div><div class='del'>-#define REG_IDT_TABLE4                  0x14F0</div><div class='del'>-#define REG_IDT_TABLE5                  0x14F4</div><div class='del'>-#define REG_IDT_TABLE6                  0x14F8</div><div class='del'>-#define REG_IDT_TABLE7                  0x14FC</div><div class='del'>-#define REG_IDT_TABLE                   REG_IDT_TABLE0</div><div class='del'>-#define REG_RSS_HASH_VALUE              0x15B0</div><div class='del'>-#define REG_RSS_HASH_FLAG               0x15B4</div><div class='del'>-#define REG_BASE_CPU_NUMBER             0x15B8</div><div class='ctx'> </div><div class='ctx'> /* TXQ Control Register */</div><div class='del'>-#define REG_TXQ_CTRL                	0x1590</div><div class='del'>-#define	TXQ_NUM_TPD_BURST_MASK     	0xF</div><div class='del'>-#define TXQ_NUM_TPD_BURST_SHIFT    	0</div><div class='del'>-#define TXQ_CTRL_IP_OPTION_EN		0x10</div><div class='del'>-#define TXQ_CTRL_EN                     0x20</div><div class='del'>-#define TXQ_CTRL_ENH_MODE               0x40</div><div class='del'>-#define TXQ_CTRL_LS_8023_EN		0x80</div><div class='del'>-#define TXQ_TXF_BURST_NUM_SHIFT    	16</div><div class='del'>-#define TXQ_TXF_BURST_NUM_MASK     	0xFFFF</div><div class='add'>+#define REG_TXQ_CTRL			0x1590</div><div class='add'>+#define TXQ_TXF_BURST_NUM_MASK          0xFFFFUL</div><div class='add'>+#define TXQ_TXF_BURST_NUM_SHIFT		16</div><div class='add'>+#define L1C_TXQ_TXF_BURST_PREF          0x200</div><div class='add'>+#define L2CB_TXQ_TXF_BURST_PREF         0x40</div><div class='add'>+#define TXQ_CTRL_PEDING_CLR             BIT(8)</div><div class='add'>+#define TXQ_CTRL_LS_8023_EN             BIT(7)</div><div class='add'>+#define TXQ_CTRL_ENH_MODE               BIT(6)</div><div class='add'>+#define TXQ_CTRL_EN                     BIT(5)</div><div class='add'>+#define TXQ_CTRL_IP_OPTION_EN           BIT(4)</div><div class='add'>+#define TXQ_NUM_TPD_BURST_MASK          0xFUL</div><div class='add'>+#define TXQ_NUM_TPD_BURST_SHIFT         0</div><div class='add'>+#define TXQ_NUM_TPD_BURST_DEF           5</div><div class='add'>+#define TXQ_CFGV			(\</div><div class='add'>+	FIELDX(TXQ_NUM_TPD_BURST, TXQ_NUM_TPD_BURST_DEF) |\</div><div class='add'>+	TXQ_CTRL_ENH_MODE |\</div><div class='add'>+	TXQ_CTRL_LS_8023_EN |\</div><div class='add'>+	TXQ_CTRL_IP_OPTION_EN)</div><div class='add'>+#define L1C_TXQ_CFGV			(\</div><div class='add'>+	TXQ_CFGV |\</div><div class='add'>+	FIELDX(TXQ_TXF_BURST_NUM, L1C_TXQ_TXF_BURST_PREF))</div><div class='add'>+#define L2CB_TXQ_CFGV			(\</div><div class='add'>+	TXQ_CFGV |\</div><div class='add'>+	FIELDX(TXQ_TXF_BURST_NUM, L2CB_TXQ_TXF_BURST_PREF))</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /* Jumbo packet Threshold for task offload */</div><div class='ctx'> #define REG_TX_TSO_OFFLOAD_THRESH	0x1594 /* In 8-bytes */</div><div class='ctx'> #define TX_TSO_OFFLOAD_THRESH_MASK	0x07FF</div><div class='add'>+#define MAX_TSO_FRAME_SIZE		(7*1024)</div><div class='ctx'> </div><div class='ctx'> #define	REG_TXF_WATER_MARK		0x1598 /* In 8-bytes */</div><div class='ctx'> #define TXF_WATER_MARK_MASK		0x0FFF</div><div class='hunk'>@@ -537,26 +597,21 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);</div><div class='ctx'> #define ASPM_THRUPUT_LIMIT_NO		0x00</div><div class='ctx'> #define ASPM_THRUPUT_LIMIT_1M		0x01</div><div class='ctx'> #define ASPM_THRUPUT_LIMIT_10M		0x02</div><div class='del'>-#define ASPM_THRUPUT_LIMIT_100M		0x04</div><div class='del'>-#define RXQ1_CTRL_EN			0x10</div><div class='del'>-#define RXQ2_CTRL_EN			0x20</div><div class='del'>-#define RXQ3_CTRL_EN			0x40</div><div class='del'>-#define IPV6_CHKSUM_CTRL_EN		0x80</div><div class='del'>-#define RSS_HASH_BITS_MASK		0x00FF</div><div class='del'>-#define RSS_HASH_BITS_SHIFT		8</div><div class='del'>-#define RSS_HASH_IPV4			0x10000</div><div class='del'>-#define RSS_HASH_IPV4_TCP		0x20000</div><div class='del'>-#define RSS_HASH_IPV6			0x40000</div><div class='del'>-#define RSS_HASH_IPV6_TCP		0x80000</div><div class='add'>+#define ASPM_THRUPUT_LIMIT_100M		0x03</div><div class='add'>+#define IPV6_CHKSUM_CTRL_EN		BIT(7)</div><div class='ctx'> #define RXQ_RFD_BURST_NUM_MASK		0x003F</div><div class='ctx'> #define RXQ_RFD_BURST_NUM_SHIFT		20</div><div class='del'>-#define RSS_MODE_MASK			0x0003</div><div class='add'>+#define RXQ_NUM_RFD_PREF_DEF		8</div><div class='add'>+#define RSS_MODE_MASK			3UL</div><div class='ctx'> #define RSS_MODE_SHIFT			26</div><div class='del'>-#define RSS_NIP_QUEUE_SEL_MASK		0x1</div><div class='del'>-#define RSS_NIP_QUEUE_SEL_SHIFT		28</div><div class='del'>-#define RRS_HASH_CTRL_EN		0x20000000</div><div class='del'>-#define RX_CUT_THRU_EN			0x40000000</div><div class='del'>-#define RXQ_CTRL_EN			0x80000000</div><div class='add'>+#define RSS_MODE_DIS			0</div><div class='add'>+#define RSS_MODE_SQSI			1</div><div class='add'>+#define RSS_MODE_MQSI			2</div><div class='add'>+#define RSS_MODE_MQMI			3</div><div class='add'>+#define RSS_NIP_QUEUE_SEL		BIT(28) /* 0:q0, 1:table */</div><div class='add'>+#define RRS_HASH_CTRL_EN		BIT(29)</div><div class='add'>+#define RX_CUT_THRU_EN			BIT(30)</div><div class='add'>+#define RXQ_CTRL_EN			BIT(31)</div><div class='ctx'> </div><div class='ctx'> #define REG_RFD_FREE_THRESH		0x15A4</div><div class='ctx'> #define RFD_FREE_THRESH_MASK		0x003F</div><div class='hunk'>@@ -577,57 +632,45 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);</div><div class='ctx'> #define RXD_DMA_DOWN_TIMER_SHIFT	16</div><div class='ctx'> </div><div class='ctx'> /* DMA Engine Control Register */</div><div class='del'>-#define REG_DMA_CTRL                	0x15C0</div><div class='del'>-#define DMA_CTRL_DMAR_IN_ORDER          0x1</div><div class='del'>-#define DMA_CTRL_DMAR_ENH_ORDER         0x2</div><div class='del'>-#define DMA_CTRL_DMAR_OUT_ORDER         0x4</div><div class='del'>-#define DMA_CTRL_RCB_VALUE              0x8</div><div class='del'>-#define DMA_CTRL_DMAR_BURST_LEN_MASK    0x0007</div><div class='del'>-#define DMA_CTRL_DMAR_BURST_LEN_SHIFT   4</div><div class='del'>-#define DMA_CTRL_DMAW_BURST_LEN_MASK    0x0007</div><div class='del'>-#define DMA_CTRL_DMAW_BURST_LEN_SHIFT   7</div><div class='del'>-#define DMA_CTRL_DMAR_REQ_PRI           0x400</div><div class='del'>-#define DMA_CTRL_DMAR_DLY_CNT_MASK      0x001F</div><div class='del'>-#define DMA_CTRL_DMAR_DLY_CNT_SHIFT     11</div><div class='del'>-#define DMA_CTRL_DMAW_DLY_CNT_MASK      0x000F</div><div class='del'>-#define DMA_CTRL_DMAW_DLY_CNT_SHIFT     16</div><div class='del'>-#define DMA_CTRL_CMB_EN               	0x100000</div><div class='del'>-#define DMA_CTRL_SMB_EN			0x200000</div><div class='del'>-#define DMA_CTRL_CMB_NOW		0x400000</div><div class='del'>-#define MAC_CTRL_SMB_DIS		0x1000000</div><div class='del'>-#define DMA_CTRL_SMB_NOW		0x80000000</div><div class='del'>-</div><div class='del'>-/* CMB/SMB Control Register */</div><div class='add'>+#define REG_DMA_CTRL			0x15C0</div><div class='add'>+#define DMA_CTRL_SMB_NOW                BIT(31)</div><div class='add'>+#define DMA_CTRL_WPEND_CLR              BIT(30)</div><div class='add'>+#define DMA_CTRL_RPEND_CLR              BIT(29)</div><div class='add'>+#define DMA_CTRL_WDLY_CNT_MASK          0xFUL</div><div class='add'>+#define DMA_CTRL_WDLY_CNT_SHIFT         16</div><div class='add'>+#define DMA_CTRL_WDLY_CNT_DEF           4</div><div class='add'>+#define DMA_CTRL_RDLY_CNT_MASK          0x1FUL</div><div class='add'>+#define DMA_CTRL_RDLY_CNT_SHIFT         11</div><div class='add'>+#define DMA_CTRL_RDLY_CNT_DEF           15</div><div class='add'>+#define DMA_CTRL_RREQ_PRI_DATA          BIT(10)      /* 0:tpd, 1:data */</div><div class='add'>+#define DMA_CTRL_WREQ_BLEN_MASK         7UL</div><div class='add'>+#define DMA_CTRL_WREQ_BLEN_SHIFT        7</div><div class='add'>+#define DMA_CTRL_RREQ_BLEN_MASK         7UL</div><div class='add'>+#define DMA_CTRL_RREQ_BLEN_SHIFT        4</div><div class='add'>+#define L1C_CTRL_DMA_RCB_LEN128         BIT(3)   /* 0:64bytes,1:128bytes */</div><div class='add'>+#define DMA_CTRL_RORDER_MODE_MASK       7UL</div><div class='add'>+#define DMA_CTRL_RORDER_MODE_SHIFT      0</div><div class='add'>+#define DMA_CTRL_RORDER_MODE_OUT        4</div><div class='add'>+#define DMA_CTRL_RORDER_MODE_ENHANCE    2</div><div class='add'>+#define DMA_CTRL_RORDER_MODE_IN         1</div><div class='add'>+</div><div class='add'>+/* INT-triggle/SMB Control Register */</div><div class='ctx'> #define REG_SMB_STAT_TIMER		0x15C4	/* 2us resolution */</div><div class='ctx'> #define SMB_STAT_TIMER_MASK		0xFFFFFF</div><div class='del'>-#define REG_CMB_TPD_THRESH		0x15C8</div><div class='del'>-#define CMB_TPD_THRESH_MASK		0xFFFF</div><div class='del'>-#define REG_CMB_TX_TIMER		0x15CC	/* 2us resolution */</div><div class='del'>-#define CMB_TX_TIMER_MASK		0xFFFF</div><div class='add'>+#define REG_TINT_TPD_THRESH             0x15C8 /* tpd th to trig intrrupt */</div><div class='ctx'> </div><div class='ctx'> /* Mail box */</div><div class='ctx'> #define MB_RFDX_PROD_IDX_MASK		0xFFFF</div><div class='ctx'> #define REG_MB_RFD0_PROD_IDX		0x15E0</div><div class='del'>-#define REG_MB_RFD1_PROD_IDX		0x15E4</div><div class='del'>-#define REG_MB_RFD2_PROD_IDX		0x15E8</div><div class='del'>-#define REG_MB_RFD3_PROD_IDX		0x15EC</div><div class='ctx'> </div><div class='del'>-#define MB_PRIO_PROD_IDX_MASK		0xFFFF</div><div class='del'>-#define REG_MB_PRIO_PROD_IDX		0x15F0</div><div class='del'>-#define MB_HTPD_PROD_IDX_SHIFT		0</div><div class='del'>-#define MB_NTPD_PROD_IDX_SHIFT		16</div><div class='del'>-</div><div class='del'>-#define MB_PRIO_CONS_IDX_MASK		0xFFFF</div><div class='del'>-#define REG_MB_PRIO_CONS_IDX		0x15F4</div><div class='del'>-#define MB_HTPD_CONS_IDX_SHIFT		0</div><div class='del'>-#define MB_NTPD_CONS_IDX_SHIFT		16</div><div class='add'>+#define REG_TPD_PRI1_PIDX               0x15F0	/* 16bit,hi-tpd producer idx */</div><div class='add'>+#define REG_TPD_PRI0_PIDX		0x15F2	/* 16bit,lo-tpd producer idx */</div><div class='add'>+#define REG_TPD_PRI1_CIDX		0x15F4	/* 16bit,hi-tpd consumer idx */</div><div class='add'>+#define REG_TPD_PRI0_CIDX		0x15F6	/* 16bit,lo-tpd consumer idx */</div><div class='ctx'> </div><div class='ctx'> #define REG_MB_RFD01_CONS_IDX		0x15F8</div><div class='ctx'> #define MB_RFD0_CONS_IDX_MASK		0x0000FFFF</div><div class='ctx'> #define MB_RFD1_CONS_IDX_MASK		0xFFFF0000</div><div class='del'>-#define REG_MB_RFD23_CONS_IDX		0x15FC</div><div class='del'>-#define MB_RFD2_CONS_IDX_MASK		0x0000FFFF</div><div class='del'>-#define MB_RFD3_CONS_IDX_MASK		0xFFFF0000</div><div class='ctx'> </div><div class='ctx'> /* Interrupt Status Register */</div><div class='ctx'> #define REG_ISR    			0x1600</div><div class='hunk'>@@ -705,13 +748,6 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);</div><div class='ctx'> #define REG_INT_RETRIG_TIMER		0x1608</div><div class='ctx'> #define INT_RETRIG_TIMER_MASK		0xFFFF</div><div class='ctx'> </div><div class='del'>-#define REG_HDS_CTRL			0x160C</div><div class='del'>-#define HDS_CTRL_EN			0x0001</div><div class='del'>-#define HDS_CTRL_BACKFILLSIZE_SHIFT	8</div><div class='del'>-#define HDS_CTRL_BACKFILLSIZE_MASK	0x0FFF</div><div class='del'>-#define HDS_CTRL_MAX_HDRSIZE_SHIFT	20</div><div class='del'>-#define HDS_CTRL_MAC_HDRSIZE_MASK	0x0FFF</div><div class='del'>-</div><div class='ctx'> #define REG_MAC_RX_STATUS_BIN 		0x1700</div><div class='ctx'> #define REG_MAC_RX_STATUS_END 		0x175c</div><div class='ctx'> #define REG_MAC_TX_STATUS_BIN 		0x1760</div><div class='hunk'>@@ -796,73 +832,188 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);</div><div class='ctx'> #define MII_DBG_ADDR			0x1D</div><div class='ctx'> #define MII_DBG_DATA			0x1E</div><div class='ctx'> </div><div class='del'>-#define MII_ANA_CTRL_0			0x0</div><div class='del'>-#define ANA_RESTART_CAL			0x0001</div><div class='del'>-#define ANA_MANUL_SWICH_ON_SHIFT	0x1</div><div class='del'>-#define ANA_MANUL_SWICH_ON_MASK		0xF</div><div class='del'>-#define ANA_MAN_ENABLE			0x0020</div><div class='del'>-#define ANA_SEL_HSP			0x0040</div><div class='del'>-#define ANA_EN_HB			0x0080</div><div class='del'>-#define ANA_EN_HBIAS			0x0100</div><div class='del'>-#define ANA_OEN_125M			0x0200</div><div class='del'>-#define ANA_EN_LCKDT			0x0400</div><div class='del'>-#define ANA_LCKDT_PHY			0x0800</div><div class='del'>-#define ANA_AFE_MODE			0x1000</div><div class='del'>-#define ANA_VCO_SLOW			0x2000</div><div class='del'>-#define ANA_VCO_FAST			0x4000</div><div class='del'>-#define ANA_SEL_CLK125M_DSP		0x8000</div><div class='del'>-</div><div class='del'>-#define MII_ANA_CTRL_4			0x4</div><div class='del'>-#define ANA_IECHO_ADJ_MASK		0xF</div><div class='del'>-#define ANA_IECHO_ADJ_3_SHIFT		0</div><div class='del'>-#define ANA_IECHO_ADJ_2_SHIFT		4</div><div class='del'>-#define ANA_IECHO_ADJ_1_SHIFT		8</div><div class='del'>-#define ANA_IECHO_ADJ_0_SHIFT		12</div><div class='del'>-</div><div class='del'>-#define MII_ANA_CTRL_5			0x5</div><div class='del'>-#define ANA_SERDES_CDR_BW_SHIFT		0</div><div class='del'>-#define ANA_SERDES_CDR_BW_MASK		0x3</div><div class='del'>-#define ANA_MS_PAD_DBG			0x0004</div><div class='del'>-#define ANA_SPEEDUP_DBG			0x0008</div><div class='del'>-#define ANA_SERDES_TH_LOS_SHIFT		4</div><div class='del'>-#define ANA_SERDES_TH_LOS_MASK		0x3</div><div class='del'>-#define ANA_SERDES_EN_DEEM		0x0040</div><div class='del'>-#define ANA_SERDES_TXELECIDLE		0x0080</div><div class='del'>-#define ANA_SERDES_BEACON		0x0100</div><div class='del'>-#define ANA_SERDES_HALFTXDR		0x0200</div><div class='del'>-#define ANA_SERDES_SEL_HSP		0x0400</div><div class='del'>-#define ANA_SERDES_EN_PLL		0x0800</div><div class='del'>-#define ANA_SERDES_EN			0x1000</div><div class='del'>-#define ANA_SERDES_EN_LCKDT		0x2000</div><div class='del'>-</div><div class='del'>-#define MII_ANA_CTRL_11			0xB</div><div class='del'>-#define ANA_PS_HIB_EN			0x8000</div><div class='del'>-</div><div class='del'>-#define MII_ANA_CTRL_18			0x12</div><div class='del'>-#define ANA_TEST_MODE_10BT_01SHIFT	0</div><div class='del'>-#define ANA_TEST_MODE_10BT_01MASK	0x3</div><div class='del'>-#define ANA_LOOP_SEL_10BT		0x0004</div><div class='del'>-#define ANA_RGMII_MODE_SW		0x0008</div><div class='del'>-#define ANA_EN_LONGECABLE		0x0010</div><div class='del'>-#define ANA_TEST_MODE_10BT_2		0x0020</div><div class='del'>-#define ANA_EN_10BT_IDLE		0x0400</div><div class='del'>-#define ANA_EN_MASK_TB			0x0800</div><div class='del'>-#define ANA_TRIGGER_SEL_TIMER_SHIFT	12</div><div class='del'>-#define ANA_TRIGGER_SEL_TIMER_MASK	0x3</div><div class='del'>-#define ANA_INTERVAL_SEL_TIMER_SHIFT	14</div><div class='del'>-#define ANA_INTERVAL_SEL_TIMER_MASK	0x3</div><div class='del'>-</div><div class='del'>-#define MII_ANA_CTRL_41			0x29</div><div class='del'>-#define ANA_TOP_PS_EN			0x8000</div><div class='del'>-</div><div class='del'>-#define MII_ANA_CTRL_54			0x36</div><div class='del'>-#define ANA_LONG_CABLE_TH_100_SHIFT	0</div><div class='del'>-#define ANA_LONG_CABLE_TH_100_MASK	0x3F</div><div class='del'>-#define ANA_DESERVED			0x0040</div><div class='del'>-#define ANA_EN_LIT_CH			0x0080</div><div class='del'>-#define ANA_SHORT_CABLE_TH_100_SHIFT	8</div><div class='del'>-#define ANA_SHORT_CABLE_TH_100_MASK	0x3F</div><div class='del'>-#define ANA_BP_BAD_LINK_ACCUM		0x4000</div><div class='del'>-#define ANA_BP_SMALL_BW			0x8000</div><div class='add'>+/***************************** debug port *************************************/</div><div class='add'>+</div><div class='add'>+#define MIIDBG_ANACTRL                  0x00</div><div class='add'>+#define ANACTRL_CLK125M_DELAY_EN        0x8000</div><div class='add'>+#define ANACTRL_VCO_FAST                0x4000</div><div class='add'>+#define ANACTRL_VCO_SLOW                0x2000</div><div class='add'>+#define ANACTRL_AFE_MODE_EN             0x1000</div><div class='add'>+#define ANACTRL_LCKDET_PHY              0x800</div><div class='add'>+#define ANACTRL_LCKDET_EN               0x400</div><div class='add'>+#define ANACTRL_OEN_125M                0x200</div><div class='add'>+#define ANACTRL_HBIAS_EN                0x100</div><div class='add'>+#define ANACTRL_HB_EN                   0x80</div><div class='add'>+#define ANACTRL_SEL_HSP                 0x40</div><div class='add'>+#define ANACTRL_CLASSA_EN               0x20</div><div class='add'>+#define ANACTRL_MANUSWON_SWR_MASK       3U</div><div class='add'>+#define ANACTRL_MANUSWON_SWR_SHIFT      2</div><div class='add'>+#define ANACTRL_MANUSWON_SWR_2V         0</div><div class='add'>+#define ANACTRL_MANUSWON_SWR_1P9V       1</div><div class='add'>+#define ANACTRL_MANUSWON_SWR_1P8V       2</div><div class='add'>+#define ANACTRL_MANUSWON_SWR_1P7V       3</div><div class='add'>+#define ANACTRL_MANUSWON_BW3_4M         0x2</div><div class='add'>+#define ANACTRL_RESTART_CAL             0x1</div><div class='add'>+#define ANACTRL_DEF                     0x02EF</div><div class='add'>+</div><div class='add'>+#define MIIDBG_SYSMODCTRL               0x04</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_PFMH_PHY    0x8000</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_BIASGEN     0x4000</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_PFML_PHY    0x2000</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_PS_MASK     3U</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_PS_SHIFT    10</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_PS_40       3</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_PS_20       2</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_PS_0        1</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_10BT_100MV  0x40 /* 1:100mv, 0:200mv */</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_HLFAP_MASK  3U</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_HLFAP_SHIFT 4</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_VDFULBW     0x8</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_VDBIASHLF   0x4</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_VDAMPHLF    0x2</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_VDLANSW     0x1</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_DEF         0x88BB /* ???? */</div><div class='add'>+</div><div class='add'>+/* for l1d &amp; l2cb */</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_CUR_ADD     0x8000</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_CUR_MASK    7U</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_CUR_SHIFT   12</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_VOL_MASK    0xFU</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_VOL_SHIFT   8</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_VOL_17ALL   3</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_VOL_100M15  1</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_VOL_10M17   0</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_BIAS1_MASK  0xFU</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_BIAS1_SHIFT 4</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_BIAS2_MASK  0xFU</div><div class='add'>+#define SYSMODCTRL_IECHOADJ_BIAS2_SHIFT 0</div><div class='add'>+#define L1D_SYSMODCTRL_IECHOADJ_DEF     0x4FBB</div><div class='add'>+</div><div class='add'>+#define MIIDBG_SRDSYSMOD                0x05</div><div class='add'>+#define SRDSYSMOD_LCKDET_EN             0x2000</div><div class='add'>+#define SRDSYSMOD_PLL_EN                0x800</div><div class='add'>+#define SRDSYSMOD_SEL_HSP               0x400</div><div class='add'>+#define SRDSYSMOD_HLFTXDR               0x200</div><div class='add'>+#define SRDSYSMOD_TXCLK_DELAY_EN        0x100</div><div class='add'>+#define SRDSYSMOD_TXELECIDLE            0x80</div><div class='add'>+#define SRDSYSMOD_DEEMP_EN              0x40</div><div class='add'>+#define SRDSYSMOD_MS_PAD                0x4</div><div class='add'>+#define SRDSYSMOD_CDR_ADC_VLTG          0x2</div><div class='add'>+#define SRDSYSMOD_CDR_DAC_1MA           0x1</div><div class='add'>+#define SRDSYSMOD_DEF                   0x2C46</div><div class='add'>+</div><div class='add'>+#define MIIDBG_CFGLPSPD                 0x0A</div><div class='add'>+#define CFGLPSPD_RSTCNT_MASK            3U</div><div class='add'>+#define CFGLPSPD_RSTCNT_SHIFT           14</div><div class='add'>+#define CFGLPSPD_RSTCNT_CLK125SW        0x2000</div><div class='add'>+</div><div class='add'>+#define MIIDBG_HIBNEG                   0x0B</div><div class='add'>+#define HIBNEG_PSHIB_EN                 0x8000</div><div class='add'>+#define HIBNEG_WAKE_BOTH                0x4000</div><div class='add'>+#define HIBNEG_ONOFF_ANACHG_SUDEN       0x2000</div><div class='add'>+#define HIBNEG_HIB_PULSE                0x1000</div><div class='add'>+#define HIBNEG_GATE_25M_EN              0x800</div><div class='add'>+#define HIBNEG_RST_80U                  0x400</div><div class='add'>+#define HIBNEG_RST_TIMER_MASK           3U</div><div class='add'>+#define HIBNEG_RST_TIMER_SHIFT          8</div><div class='add'>+#define HIBNEG_GTX_CLK_DELAY_MASK       3U</div><div class='add'>+#define HIBNEG_GTX_CLK_DELAY_SHIFT      5</div><div class='add'>+#define HIBNEG_BYPSS_BRKTIMER           0x10</div><div class='add'>+#define HIBNEG_DEF                      0xBC40</div><div class='add'>+</div><div class='add'>+#define MIIDBG_TST10BTCFG               0x12</div><div class='add'>+#define TST10BTCFG_INTV_TIMER_MASK      3U</div><div class='add'>+#define TST10BTCFG_INTV_TIMER_SHIFT     14</div><div class='add'>+#define TST10BTCFG_TRIGER_TIMER_MASK    3U</div><div class='add'>+#define TST10BTCFG_TRIGER_TIMER_SHIFT   12</div><div class='add'>+#define TST10BTCFG_DIV_MAN_MLT3_EN      0x800</div><div class='add'>+#define TST10BTCFG_OFF_DAC_IDLE         0x400</div><div class='add'>+#define TST10BTCFG_LPBK_DEEP            0x4 /* 1:deep,0:shallow */</div><div class='add'>+#define TST10BTCFG_DEF                  0x4C04</div><div class='add'>+</div><div class='add'>+#define MIIDBG_AZ_ANADECT		0x15</div><div class='add'>+#define AZ_ANADECT_10BTRX_TH		0x8000</div><div class='add'>+#define AZ_ANADECT_BOTH_01CHNL		0x4000</div><div class='add'>+#define AZ_ANADECT_INTV_MASK		0x3FU</div><div class='add'>+#define AZ_ANADECT_INTV_SHIFT		8</div><div class='add'>+#define AZ_ANADECT_THRESH_MASK		0xFU</div><div class='add'>+#define AZ_ANADECT_THRESH_SHIFT		4</div><div class='add'>+#define AZ_ANADECT_CHNL_MASK		0xFU</div><div class='add'>+#define AZ_ANADECT_CHNL_SHIFT		0</div><div class='add'>+#define AZ_ANADECT_DEF			0x3220</div><div class='add'>+#define AZ_ANADECT_LONG                 0xb210</div><div class='add'>+</div><div class='add'>+#define MIIDBG_MSE16DB			0x18	/* l1d */</div><div class='add'>+#define L1D_MSE16DB_UP			0x05EA</div><div class='add'>+#define L1D_MSE16DB_DOWN		0x02EA</div><div class='add'>+</div><div class='add'>+#define MIIDBG_LEGCYPS                  0x29</div><div class='add'>+#define LEGCYPS_EN                      0x8000</div><div class='add'>+#define LEGCYPS_DAC_AMP1000_MASK        7U</div><div class='add'>+#define LEGCYPS_DAC_AMP1000_SHIFT       12</div><div class='add'>+#define LEGCYPS_DAC_AMP100_MASK         7U</div><div class='add'>+#define LEGCYPS_DAC_AMP100_SHIFT        9</div><div class='add'>+#define LEGCYPS_DAC_AMP10_MASK          7U</div><div class='add'>+#define LEGCYPS_DAC_AMP10_SHIFT         6</div><div class='add'>+#define LEGCYPS_UNPLUG_TIMER_MASK       7U</div><div class='add'>+#define LEGCYPS_UNPLUG_TIMER_SHIFT      3</div><div class='add'>+#define LEGCYPS_UNPLUG_DECT_EN          0x4</div><div class='add'>+#define LEGCYPS_ECNC_PS_EN              0x1</div><div class='add'>+#define L1D_LEGCYPS_DEF                 0x129D</div><div class='add'>+#define L1C_LEGCYPS_DEF                 0x36DD</div><div class='add'>+</div><div class='add'>+#define MIIDBG_TST100BTCFG              0x36</div><div class='add'>+#define TST100BTCFG_NORMAL_BW_EN        0x8000</div><div class='add'>+#define TST100BTCFG_BADLNK_BYPASS       0x4000</div><div class='add'>+#define TST100BTCFG_SHORTCABL_TH_MASK   0x3FU</div><div class='add'>+#define TST100BTCFG_SHORTCABL_TH_SHIFT  8</div><div class='add'>+#define TST100BTCFG_LITCH_EN            0x80</div><div class='add'>+#define TST100BTCFG_VLT_SW              0x40</div><div class='add'>+#define TST100BTCFG_LONGCABL_TH_MASK    0x3FU</div><div class='add'>+#define TST100BTCFG_LONGCABL_TH_SHIFT   0</div><div class='add'>+#define TST100BTCFG_DEF                 0xE12C</div><div class='add'>+</div><div class='add'>+#define MIIDBG_VOLT_CTRL                0x3B	/* only for l2cb 1 &amp; 2 */</div><div class='add'>+#define VOLT_CTRL_CABLE1TH_MASK         0x1FFU</div><div class='add'>+#define VOLT_CTRL_CABLE1TH_SHIFT        7</div><div class='add'>+#define VOLT_CTRL_AMPCTRL_MASK          3U</div><div class='add'>+#define VOLT_CTRL_AMPCTRL_SHIFT         5</div><div class='add'>+#define VOLT_CTRL_SW_BYPASS             0x10</div><div class='add'>+#define VOLT_CTRL_SWLOWEST              0x8</div><div class='add'>+#define VOLT_CTRL_DACAMP10_MASK         7U</div><div class='add'>+#define VOLT_CTRL_DACAMP10_SHIFT        0</div><div class='add'>+</div><div class='add'>+#define MIIDBG_CABLE1TH_DET             0x3E</div><div class='add'>+#define CABLE1TH_DET_EN                 0x8000</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/******* dev 3 *********/</div><div class='add'>+#define MIIEXT_PCS                      3</div><div class='add'>+</div><div class='add'>+#define MIIEXT_CLDCTRL3                 0x8003</div><div class='add'>+#define CLDCTRL3_BP_CABLE1TH_DET_GT     0x8000</div><div class='add'>+#define CLDCTRL3_AZ_DISAMP              0x1000</div><div class='add'>+#define L2CB_CLDCTRL3                   0x4D19</div><div class='add'>+#define L1D_CLDCTRL3                    0xDD19</div><div class='add'>+</div><div class='add'>+#define MIIEXT_CLDCTRL6			0x8006</div><div class='add'>+#define CLDCTRL6_CAB_LEN_MASK		0x1FFU</div><div class='add'>+#define CLDCTRL6_CAB_LEN_SHIFT          0</div><div class='add'>+#define CLDCTRL6_CAB_LEN_SHORT          0x50</div><div class='add'>+</div><div class='add'>+/********* dev 7 **********/</div><div class='add'>+#define MIIEXT_ANEG                     7</div><div class='add'>+</div><div class='add'>+#define MIIEXT_LOCAL_EEEADV             0x3C</div><div class='add'>+#define LOCAL_EEEADV_1000BT             0x4</div><div class='add'>+#define LOCAL_EEEADV_100BT              0x2</div><div class='add'>+</div><div class='add'>+#define MIIEXT_REMOTE_EEEADV            0x3D</div><div class='add'>+#define REMOTE_EEEADV_1000BT            0x4</div><div class='add'>+#define REMOTE_EEEADV_100BT             0x2</div><div class='add'>+</div><div class='add'>+#define MIIEXT_EEE_ANEG                 0x8000</div><div class='add'>+#define EEE_ANEG_1000M                  0x4</div><div class='add'>+#define EEE_ANEG_100M                   0x2</div><div class='ctx'> </div><div class='ctx'> #endif /*_ATL1C_HW_H_*/</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c<br/>index 1ef0c9275dee..9cc15701101b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atl1c/atl1c_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/atheros/atl1c/atl1c_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atl1c/atl1c_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atl1c/atl1c_main.c</a></div><div class='hunk'>@@ -24,14 +24,6 @@</div><div class='ctx'> #define ATL1C_DRV_VERSION "1.0.1.0-NAPI"</div><div class='ctx'> char atl1c_driver_name[] = "atl1c";</div><div class='ctx'> char atl1c_driver_version[] = ATL1C_DRV_VERSION;</div><div class='del'>-#define PCI_DEVICE_ID_ATTANSIC_L2C      0x1062</div><div class='del'>-#define PCI_DEVICE_ID_ATTANSIC_L1C      0x1063</div><div class='del'>-#define PCI_DEVICE_ID_ATHEROS_L2C_B	0x2060 /* AR8152 v1.1 Fast 10/100 */</div><div class='del'>-#define PCI_DEVICE_ID_ATHEROS_L2C_B2	0x2062 /* AR8152 v2.0 Fast 10/100 */</div><div class='del'>-#define PCI_DEVICE_ID_ATHEROS_L1D	0x1073 /* AR8151 v1.0 Gigabit 1000 */</div><div class='del'>-#define PCI_DEVICE_ID_ATHEROS_L1D_2_0	0x1083 /* AR8151 v2.0 Gigabit 1000 */</div><div class='del'>-#define L2CB_V10			0xc0</div><div class='del'>-#define L2CB_V11			0xc1</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * atl1c_pci_tbl - PCI Device ID Table</div><div class='hunk'>@@ -54,70 +46,72 @@ static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Jie Yang &lt;jie.yang@atheros.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");</div><div class='add'>+MODULE_AUTHOR("Jie Yang");</div><div class='add'>+MODULE_AUTHOR("Qualcomm Atheros Inc., &lt;nic-devel@qualcomm.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_VERSION(ATL1C_DRV_VERSION);</div><div class='ctx'> </div><div class='ctx'> static int atl1c_stop_mac(struct atl1c_hw *hw);</div><div class='del'>-static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);</div><div class='del'>-static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);</div><div class='ctx'> static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);</div><div class='del'>-static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);</div><div class='del'>-static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);</div><div class='del'>-static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,</div><div class='add'>+static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);</div><div class='add'>+static void atl1c_start_mac(struct atl1c_adapter *adapter);</div><div class='add'>+static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,</div><div class='ctx'> 		   int *work_done, int work_to_do);</div><div class='ctx'> static int atl1c_up(struct atl1c_adapter *adapter);</div><div class='ctx'> static void atl1c_down(struct atl1c_adapter *adapter);</div><div class='add'>+static int atl1c_reset_mac(struct atl1c_hw *hw);</div><div class='add'>+static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter);</div><div class='add'>+static int atl1c_configure(struct atl1c_adapter *adapter);</div><div class='add'>+static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter);</div><div class='ctx'> </div><div class='ctx'> static const u16 atl1c_pay_load_size[] = {</div><div class='ctx'> 	128, 256, 512, 1024, 2048, 4096,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =</div><div class='del'>-{</div><div class='del'>-	REG_MB_RFD0_PROD_IDX,</div><div class='del'>-	REG_MB_RFD1_PROD_IDX,</div><div class='del'>-	REG_MB_RFD2_PROD_IDX,</div><div class='del'>-	REG_MB_RFD3_PROD_IDX</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =</div><div class='del'>-{</div><div class='del'>-	REG_RFD0_HEAD_ADDR_LO,</div><div class='del'>-	REG_RFD1_HEAD_ADDR_LO,</div><div class='del'>-	REG_RFD2_HEAD_ADDR_LO,</div><div class='del'>-	REG_RFD3_HEAD_ADDR_LO</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =</div><div class='del'>-{</div><div class='del'>-	REG_RRD0_HEAD_ADDR_LO,</div><div class='del'>-	REG_RRD1_HEAD_ADDR_LO,</div><div class='del'>-	REG_RRD2_HEAD_ADDR_LO,</div><div class='del'>-	REG_RRD3_HEAD_ADDR_LO</div><div class='del'>-};</div><div class='ctx'> </div><div class='ctx'> static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |</div><div class='ctx'> 	NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;</div><div class='ctx'> static void atl1c_pcie_patch(struct atl1c_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	u32 data;</div><div class='add'>+	u32 mst_data, data;</div><div class='ctx'> </div><div class='del'>-	AT_READ_REG(hw, REG_PCIE_PHYMISC, &amp;data);</div><div class='del'>-	data |= PCIE_PHYMISC_FORCE_RCV_DET;</div><div class='del'>-	AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);</div><div class='add'>+	/* pclk sel could switch to 25M */</div><div class='add'>+	AT_READ_REG(hw, REG_MASTER_CTRL, &amp;mst_data);</div><div class='add'>+	mst_data &amp;= ~MASTER_CTRL_CLK_SEL_DIS;</div><div class='add'>+	AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);</div><div class='ctx'> </div><div class='add'>+	/* WoL/PCIE related settings */</div><div class='add'>+	if (hw-&gt;nic_type == athr_l1c || hw-&gt;nic_type == athr_l2c) {</div><div class='add'>+		AT_READ_REG(hw, REG_PCIE_PHYMISC, &amp;data);</div><div class='add'>+		data |= PCIE_PHYMISC_FORCE_RCV_DET;</div><div class='add'>+		AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);</div><div class='add'>+	} else { /* new dev set bit5 of MASTER */</div><div class='add'>+		if (!(mst_data &amp; MASTER_CTRL_WAKEN_25M))</div><div class='add'>+			AT_WRITE_REG(hw, REG_MASTER_CTRL,</div><div class='add'>+				mst_data | MASTER_CTRL_WAKEN_25M);</div><div class='add'>+	}</div><div class='add'>+	/* aspm/PCIE setting only for l2cb 1.0 */</div><div class='ctx'> 	if (hw-&gt;nic_type == athr_l2c_b &amp;&amp; hw-&gt;revision_id == L2CB_V10) {</div><div class='ctx'> 		AT_READ_REG(hw, REG_PCIE_PHYMISC2, &amp;data);</div><div class='del'>-</div><div class='del'>-		data &amp;= ~(PCIE_PHYMISC2_SERDES_CDR_MASK &lt;&lt;</div><div class='del'>-			PCIE_PHYMISC2_SERDES_CDR_SHIFT);</div><div class='del'>-		data |= 3 &lt;&lt; PCIE_PHYMISC2_SERDES_CDR_SHIFT;</div><div class='del'>-		data &amp;= ~(PCIE_PHYMISC2_SERDES_TH_MASK &lt;&lt;</div><div class='del'>-			PCIE_PHYMISC2_SERDES_TH_SHIFT);</div><div class='del'>-		data |= 3 &lt;&lt; PCIE_PHYMISC2_SERDES_TH_SHIFT;</div><div class='add'>+		data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,</div><div class='add'>+			L2CB1_PCIE_PHYMISC2_CDR_BW);</div><div class='add'>+		data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,</div><div class='add'>+			L2CB1_PCIE_PHYMISC2_L0S_TH);</div><div class='ctx'> 		AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);</div><div class='add'>+		/* extend L1 sync timer */</div><div class='add'>+		AT_READ_REG(hw, REG_LINK_CTRL, &amp;data);</div><div class='add'>+		data |= LINK_CTRL_EXT_SYNC;</div><div class='add'>+		AT_WRITE_REG(hw, REG_LINK_CTRL, data);</div><div class='add'>+	}</div><div class='add'>+	/* l2cb 1.x &amp; l1d 1.x */</div><div class='add'>+	if (hw-&gt;nic_type == athr_l2c_b || hw-&gt;nic_type == athr_l1d) {</div><div class='add'>+		AT_READ_REG(hw, REG_PM_CTRL, &amp;data);</div><div class='add'>+		data |= PM_CTRL_L0S_BUFSRX_EN;</div><div class='add'>+		AT_WRITE_REG(hw, REG_PM_CTRL, data);</div><div class='add'>+		/* clear vendor msg */</div><div class='add'>+		AT_READ_REG(hw, REG_DMA_DBG, &amp;data);</div><div class='add'>+		AT_WRITE_REG(hw, REG_DMA_DBG, data &amp; ~DMA_DBG_VENDOR_MSG);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -130,6 +124,7 @@ static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)</div><div class='ctx'> 	u32 data;</div><div class='ctx'> 	u32 pci_cmd;</div><div class='ctx'> 	struct pci_dev *pdev = hw-&gt;adapter-&gt;pdev;</div><div class='add'>+	int pos;</div><div class='ctx'> </div><div class='ctx'> 	AT_READ_REG(hw, PCI_COMMAND, &amp;pci_cmd);</div><div class='ctx'> 	pci_cmd &amp;= ~PCI_COMMAND_INTX_DISABLE;</div><div class='hunk'>@@ -142,14 +137,23 @@ static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)</div><div class='ctx'> 	 */</div><div class='ctx'> 	pci_enable_wake(pdev, PCI_D3hot, 0);</div><div class='ctx'> 	pci_enable_wake(pdev, PCI_D3cold, 0);</div><div class='add'>+	/* wol sts read-clear */</div><div class='add'>+	AT_READ_REG(hw, REG_WOL_CTRL, &amp;data);</div><div class='add'>+	AT_WRITE_REG(hw, REG_WOL_CTRL, 0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Mask some pcie error bits</div><div class='ctx'> 	 */</div><div class='del'>-	AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &amp;data);</div><div class='del'>-	data &amp;= ~PCIE_UC_SERVRITY_DLP;</div><div class='del'>-	data &amp;= ~PCIE_UC_SERVRITY_FCP;</div><div class='del'>-	AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);</div><div class='add'>+	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);</div><div class='add'>+	pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &amp;data);</div><div class='add'>+	data &amp;= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);</div><div class='add'>+	pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);</div><div class='add'>+	/* clear error status */</div><div class='add'>+	pci_write_config_word(pdev, pci_pcie_cap(pdev) + PCI_EXP_DEVSTA,</div><div class='add'>+			PCI_EXP_DEVSTA_NFED |</div><div class='add'>+			PCI_EXP_DEVSTA_FED |</div><div class='add'>+			PCI_EXP_DEVSTA_CED |</div><div class='add'>+			PCI_EXP_DEVSTA_URD);</div><div class='ctx'> </div><div class='ctx'> 	AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &amp;data);</div><div class='ctx'> 	data &amp;= ~LTSSM_ID_EN_WRO;</div><div class='hunk'>@@ -158,11 +162,6 @@ static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)</div><div class='ctx'> 	atl1c_pcie_patch(hw);</div><div class='ctx'> 	if (flag &amp; ATL1C_PCIE_L0S_L1_DISABLE)</div><div class='ctx'> 		atl1c_disable_l0s_l1(hw);</div><div class='del'>-	if (flag &amp; ATL1C_PCIE_PHY_RESET)</div><div class='del'>-		AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);</div><div class='del'>-	else</div><div class='del'>-		AT_WRITE_REG(hw, REG_GPHY_CTRL,</div><div class='del'>-			GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);</div><div class='ctx'> </div><div class='ctx'> 	msleep(5);</div><div class='ctx'> }</div><div class='hunk'>@@ -207,14 +206,14 @@ static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)</div><div class='ctx'>  * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads</div><div class='ctx'>  * of the idle status register until the device is actually idle</div><div class='ctx'>  */</div><div class='del'>-static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)</div><div class='add'>+static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)</div><div class='ctx'> {</div><div class='ctx'> 	int timeout;</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='ctx'> 	for (timeout = 0; timeout &lt; AT_HW_MAX_IDLE_DELAY; timeout++) {</div><div class='ctx'> 		AT_READ_REG(hw, REG_IDLE_STATUS, &amp;data);</div><div class='del'>-		if ((data &amp; IDLE_STATUS_MASK) == 0)</div><div class='add'>+		if ((data &amp; modu_ctrl) == 0)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		msleep(1);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -261,15 +260,16 @@ static void atl1c_check_link_status(struct atl1c_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	if ((phy_data &amp; BMSR_LSTATUS) == 0) {</div><div class='ctx'> 		/* link down */</div><div class='del'>-		hw-&gt;hibernate = true;</div><div class='del'>-		if (atl1c_stop_mac(hw) != 0)</div><div class='del'>-			if (netif_msg_hw(adapter))</div><div class='del'>-				dev_warn(&amp;pdev-&gt;dev, "stop mac failed\n");</div><div class='del'>-		atl1c_set_aspm(hw, false);</div><div class='ctx'> 		netif_carrier_off(netdev);</div><div class='ctx'> 		netif_stop_queue(netdev);</div><div class='del'>-		atl1c_phy_reset(hw);</div><div class='del'>-		atl1c_phy_init(&amp;adapter-&gt;hw);</div><div class='add'>+		hw-&gt;hibernate = true;</div><div class='add'>+		if (atl1c_reset_mac(hw) != 0)</div><div class='add'>+			if (netif_msg_hw(adapter))</div><div class='add'>+				dev_warn(&amp;pdev-&gt;dev, "reset mac failed\n");</div><div class='add'>+		atl1c_set_aspm(hw, SPEED_0);</div><div class='add'>+		atl1c_post_phy_linkchg(hw, SPEED_0);</div><div class='add'>+		atl1c_reset_dma_ring(adapter);</div><div class='add'>+		atl1c_configure(adapter);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Link Up */</div><div class='ctx'> 		hw-&gt;hibernate = false;</div><div class='hunk'>@@ -283,10 +283,9 @@ static void atl1c_check_link_status(struct atl1c_adapter *adapter)</div><div class='ctx'> 		    adapter-&gt;link_duplex != duplex) {</div><div class='ctx'> 			adapter-&gt;link_speed  = speed;</div><div class='ctx'> 			adapter-&gt;link_duplex = duplex;</div><div class='del'>-			atl1c_set_aspm(hw, true);</div><div class='del'>-			atl1c_enable_tx_ctrl(hw);</div><div class='del'>-			atl1c_enable_rx_ctrl(hw);</div><div class='del'>-			atl1c_setup_mac_ctrl(adapter);</div><div class='add'>+			atl1c_set_aspm(hw, speed);</div><div class='add'>+			atl1c_post_phy_linkchg(hw, speed);</div><div class='add'>+			atl1c_start_mac(adapter);</div><div class='ctx'> 			if (netif_msg_link(adapter))</div><div class='ctx'> 				dev_info(&amp;pdev-&gt;dev,</div><div class='ctx'> 					"%s: %s NIC Link is Up&lt;%d Mbps %s&gt;\n",</div><div class='hunk'>@@ -337,6 +336,9 @@ static void atl1c_common_task(struct work_struct *work)</div><div class='ctx'> 	adapter = container_of(work, struct atl1c_adapter, common_task);</div><div class='ctx'> 	netdev = adapter-&gt;netdev;</div><div class='ctx'> </div><div class='add'>+	if (test_bit(__AT_DOWN, &amp;adapter-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &amp;adapter-&gt;work_event)) {</div><div class='ctx'> 		netif_device_detach(netdev);</div><div class='ctx'> 		atl1c_down(adapter);</div><div class='hunk'>@@ -345,8 +347,11 @@ static void atl1c_common_task(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,</div><div class='del'>-		&amp;adapter-&gt;work_event))</div><div class='add'>+		&amp;adapter-&gt;work_event)) {</div><div class='add'>+		atl1c_irq_disable(adapter);</div><div class='ctx'> 		atl1c_check_link_status(adapter);</div><div class='add'>+		atl1c_irq_enable(adapter);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -470,7 +475,7 @@ static int atl1c_set_mac_addr(struct net_device *netdev, void *p)</div><div class='ctx'> 	memcpy(adapter-&gt;hw.mac_addr, addr-&gt;sa_data, netdev-&gt;addr_len);</div><div class='ctx'> 	netdev-&gt;addr_assign_type &amp;= ~NET_ADDR_RANDOM;</div><div class='ctx'> </div><div class='del'>-	atl1c_hw_set_mac_addr(&amp;adapter-&gt;hw);</div><div class='add'>+	atl1c_hw_set_mac_addr(&amp;adapter-&gt;hw, adapter-&gt;hw.mac_addr);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -523,11 +528,16 @@ static int atl1c_set_features(struct net_device *netdev,</div><div class='ctx'> static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1c_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct atl1c_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	int old_mtu   = netdev-&gt;mtu;</div><div class='ctx'> 	int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;</div><div class='ctx'> </div><div class='del'>-	if ((max_frame &lt; ETH_ZLEN + ETH_FCS_LEN) ||</div><div class='del'>-			(max_frame &gt; MAX_JUMBO_FRAME_SIZE)) {</div><div class='add'>+	/* Fast Ethernet controller doesn't support jumbo packet */</div><div class='add'>+	if (((hw-&gt;nic_type == athr_l2c ||</div><div class='add'>+	      hw-&gt;nic_type == athr_l2c_b ||</div><div class='add'>+	      hw-&gt;nic_type == athr_l2c_b2) &amp;&amp; new_mtu &gt; ETH_DATA_LEN) ||</div><div class='add'>+	      max_frame &lt; ETH_ZLEN + ETH_FCS_LEN ||</div><div class='add'>+	      max_frame &gt; MAX_JUMBO_FRAME_SIZE) {</div><div class='ctx'> 		if (netif_msg_link(adapter))</div><div class='ctx'> 			dev_warn(&amp;adapter-&gt;pdev-&gt;dev, "invalid MTU setting\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -543,14 +553,6 @@ static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 		netdev_update_features(netdev);</div><div class='ctx'> 		atl1c_up(adapter);</div><div class='ctx'> 		clear_bit(__AT_RESETTING, &amp;adapter-&gt;flags);</div><div class='del'>-		if (adapter-&gt;hw.ctrl_flags &amp; ATL1C_FPGA_VERSION) {</div><div class='del'>-			u32 phy_data;</div><div class='del'>-</div><div class='del'>-			AT_READ_REG(&amp;adapter-&gt;hw, 0x1414, &amp;phy_data);</div><div class='del'>-			phy_data |= 0x10000000;</div><div class='del'>-			AT_WRITE_REG(&amp;adapter-&gt;hw, 0x1414, phy_data);</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -563,7 +565,7 @@ static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)</div><div class='ctx'> 	struct atl1c_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	u16 result;</div><div class='ctx'> </div><div class='del'>-	atl1c_read_phy_reg(&amp;adapter-&gt;hw, reg_num &amp; MDIO_REG_ADDR_MASK, &amp;result);</div><div class='add'>+	atl1c_read_phy_reg(&amp;adapter-&gt;hw, reg_num, &amp;result);</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -572,7 +574,7 @@ static void atl1c_mdio_write(struct net_device *netdev, int phy_id,</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1c_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	atl1c_write_phy_reg(&amp;adapter-&gt;hw, reg_num &amp; MDIO_REG_ADDR_MASK, val);</div><div class='add'>+	atl1c_write_phy_reg(&amp;adapter-&gt;hw, reg_num, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -687,21 +689,15 @@ static void atl1c_set_mac_type(struct atl1c_hw *hw)</div><div class='ctx'> </div><div class='ctx'> static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	u32 phy_status_data;</div><div class='ctx'> 	u32 link_ctrl_data;</div><div class='ctx'> </div><div class='ctx'> 	atl1c_set_mac_type(hw);</div><div class='del'>-	AT_READ_REG(hw, REG_PHY_STATUS, &amp;phy_status_data);</div><div class='ctx'> 	AT_READ_REG(hw, REG_LINK_CTRL, &amp;link_ctrl_data);</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;ctrl_flags = ATL1C_INTR_MODRT_ENABLE  |</div><div class='ctx'> 			 ATL1C_TXQ_MODE_ENHANCE;</div><div class='del'>-	if (link_ctrl_data &amp; LINK_CTRL_L0S_EN)</div><div class='del'>-		hw-&gt;ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;</div><div class='del'>-	if (link_ctrl_data &amp; LINK_CTRL_L1_EN)</div><div class='del'>-		hw-&gt;ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;</div><div class='del'>-	if (link_ctrl_data &amp; LINK_CTRL_EXT_SYNC)</div><div class='del'>-		hw-&gt;ctrl_flags |= ATL1C_LINK_EXT_SYNC;</div><div class='add'>+	hw-&gt;ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |</div><div class='add'>+			  ATL1C_ASPM_L1_SUPPORT;</div><div class='ctx'> 	hw-&gt;ctrl_flags |= ATL1C_ASPM_CTRL_MON;</div><div class='ctx'> </div><div class='ctx'> 	if (hw-&gt;nic_type == athr_l1c ||</div><div class='hunk'>@@ -710,6 +706,55 @@ static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)</div><div class='ctx'> 		hw-&gt;link_cap_flags |= ATL1C_LINK_CAP_1000M;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+struct atl1c_platform_patch {</div><div class='add'>+	u16 pci_did;</div><div class='add'>+	u8  pci_revid;</div><div class='add'>+	u16 subsystem_vid;</div><div class='add'>+	u16 subsystem_did;</div><div class='add'>+	u32 patch_flag;</div><div class='add'>+#define ATL1C_LINK_PATCH	0x1</div><div class='add'>+};</div><div class='add'>+static const struct atl1c_platform_patch plats[] __devinitdata = {</div><div class='add'>+{0x2060, 0xC1, 0x1019, 0x8152, 0x1},</div><div class='add'>+{0x2060, 0xC1, 0x1019, 0x2060, 0x1},</div><div class='add'>+{0x2060, 0xC1, 0x1019, 0xE000, 0x1},</div><div class='add'>+{0x2062, 0xC0, 0x1019, 0x8152, 0x1},</div><div class='add'>+{0x2062, 0xC0, 0x1019, 0x2062, 0x1},</div><div class='add'>+{0x2062, 0xC0, 0x1458, 0xE000, 0x1},</div><div class='add'>+{0x2062, 0xC1, 0x1019, 0x8152, 0x1},</div><div class='add'>+{0x2062, 0xC1, 0x1019, 0x2062, 0x1},</div><div class='add'>+{0x2062, 0xC1, 0x1458, 0xE000, 0x1},</div><div class='add'>+{0x2062, 0xC1, 0x1565, 0x2802, 0x1},</div><div class='add'>+{0x2062, 0xC1, 0x1565, 0x2801, 0x1},</div><div class='add'>+{0x1073, 0xC0, 0x1019, 0x8151, 0x1},</div><div class='add'>+{0x1073, 0xC0, 0x1019, 0x1073, 0x1},</div><div class='add'>+{0x1073, 0xC0, 0x1458, 0xE000, 0x1},</div><div class='add'>+{0x1083, 0xC0, 0x1458, 0xE000, 0x1},</div><div class='add'>+{0x1083, 0xC0, 0x1019, 0x8151, 0x1},</div><div class='add'>+{0x1083, 0xC0, 0x1019, 0x1083, 0x1},</div><div class='add'>+{0x1083, 0xC0, 0x1462, 0x7680, 0x1},</div><div class='add'>+{0x1083, 0xC0, 0x1565, 0x2803, 0x1},</div><div class='add'>+{0},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __devinit atl1c_patch_assign(struct atl1c_hw *hw)</div><div class='add'>+{</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	hw-&gt;msi_lnkpatch = false;</div><div class='add'>+</div><div class='add'>+	while (plats[i].pci_did != 0) {</div><div class='add'>+		if (plats[i].pci_did == hw-&gt;device_id &amp;&amp;</div><div class='add'>+		    plats[i].pci_revid == hw-&gt;revision_id &amp;&amp;</div><div class='add'>+		    plats[i].subsystem_vid == hw-&gt;subsystem_vendor_id &amp;&amp;</div><div class='add'>+		    plats[i].subsystem_did == hw-&gt;subsystem_id) {</div><div class='add'>+			if (plats[i].patch_flag &amp; ATL1C_LINK_PATCH)</div><div class='add'>+				hw-&gt;msi_lnkpatch = true;</div><div class='add'>+		}</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> /*</div><div class='ctx'>  * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)</div><div class='ctx'>  * @adapter: board private structure to initialize</div><div class='hunk'>@@ -729,9 +774,8 @@ static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)</div><div class='ctx'> 	device_set_wakeup_enable(&amp;pdev-&gt;dev, false);</div><div class='ctx'> 	adapter-&gt;link_speed = SPEED_0;</div><div class='ctx'> 	adapter-&gt;link_duplex = FULL_DUPLEX;</div><div class='del'>-	adapter-&gt;num_rx_queues = AT_DEF_RECEIVE_QUEUE;</div><div class='ctx'> 	adapter-&gt;tpd_ring[0].count = 1024;</div><div class='del'>-	adapter-&gt;rfd_ring[0].count = 512;</div><div class='add'>+	adapter-&gt;rfd_ring.count = 512;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;vendor_id = pdev-&gt;vendor;</div><div class='ctx'> 	hw-&gt;device_id = pdev-&gt;device;</div><div class='hunk'>@@ -746,26 +790,18 @@ static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "set mac function pointers failed\n");</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='add'>+	atl1c_patch_assign(hw);</div><div class='add'>+</div><div class='ctx'> 	hw-&gt;intr_mask = IMR_NORMAL_MASK;</div><div class='ctx'> 	hw-&gt;phy_configured = false;</div><div class='ctx'> 	hw-&gt;preamble_len = 7;</div><div class='ctx'> 	hw-&gt;max_frame_size = adapter-&gt;netdev-&gt;mtu;</div><div class='del'>-	if (adapter-&gt;num_rx_queues &lt; 2) {</div><div class='del'>-		hw-&gt;rss_type = atl1c_rss_disable;</div><div class='del'>-		hw-&gt;rss_mode = atl1c_rss_mode_disable;</div><div class='del'>-	} else {</div><div class='del'>-		hw-&gt;rss_type = atl1c_rss_ipv4;</div><div class='del'>-		hw-&gt;rss_mode = atl1c_rss_mul_que_mul_int;</div><div class='del'>-		hw-&gt;rss_hash_bits = 16;</div><div class='del'>-	}</div><div class='ctx'> 	hw-&gt;autoneg_advertised = ADVERTISED_Autoneg;</div><div class='ctx'> 	hw-&gt;indirect_tab = 0xE4E4E4E4;</div><div class='ctx'> 	hw-&gt;base_cpu = 0;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;ict = 50000;		/* 100ms */</div><div class='ctx'> 	hw-&gt;smb_timer = 200000;	  	/* 400ms */</div><div class='del'>-	hw-&gt;cmb_tpd = 4;</div><div class='del'>-	hw-&gt;cmb_tx_timer = 1;		/* 2 us  */</div><div class='ctx'> 	hw-&gt;rx_imt = 200;</div><div class='ctx'> 	hw-&gt;tx_imt = 1000;</div><div class='ctx'> </div><div class='hunk'>@@ -773,9 +809,6 @@ static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)</div><div class='ctx'> 	hw-&gt;rfd_burst = 8;</div><div class='ctx'> 	hw-&gt;dma_order = atl1c_dma_ord_out;</div><div class='ctx'> 	hw-&gt;dmar_block = atl1c_dma_req_1024;</div><div class='del'>-	hw-&gt;dmaw_block = atl1c_dma_req_1024;</div><div class='del'>-	hw-&gt;dmar_dly_cnt = 15;</div><div class='del'>-	hw-&gt;dmaw_dly_cnt = 4;</div><div class='ctx'> </div><div class='ctx'> 	if (atl1c_alloc_queues(adapter)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unable to allocate memory for queues\n");</div><div class='hunk'>@@ -851,24 +884,22 @@ static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,</div><div class='ctx'>  */</div><div class='ctx'> static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	struct atl1c_rfd_ring *rfd_ring = adapter-&gt;rfd_ring;</div><div class='del'>-	struct atl1c_rrd_ring *rrd_ring = adapter-&gt;rrd_ring;</div><div class='add'>+	struct atl1c_rfd_ring *rfd_ring = &amp;adapter-&gt;rfd_ring;</div><div class='add'>+	struct atl1c_rrd_ring *rrd_ring = &amp;adapter-&gt;rrd_ring;</div><div class='ctx'> 	struct atl1c_buffer *buffer_info;</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='del'>-	int i, j;</div><div class='add'>+	int j;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++) {</div><div class='del'>-		for (j = 0; j &lt; rfd_ring[i].count; j++) {</div><div class='del'>-			buffer_info = &amp;rfd_ring[i].buffer_info[j];</div><div class='del'>-			atl1c_clean_buffer(pdev, buffer_info, 0);</div><div class='del'>-		}</div><div class='del'>-		/* zero out the descriptor ring */</div><div class='del'>-		memset(rfd_ring[i].desc, 0, rfd_ring[i].size);</div><div class='del'>-		rfd_ring[i].next_to_clean = 0;</div><div class='del'>-		rfd_ring[i].next_to_use = 0;</div><div class='del'>-		rrd_ring[i].next_to_use = 0;</div><div class='del'>-		rrd_ring[i].next_to_clean = 0;</div><div class='add'>+	for (j = 0; j &lt; rfd_ring-&gt;count; j++) {</div><div class='add'>+		buffer_info = &amp;rfd_ring-&gt;buffer_info[j];</div><div class='add'>+		atl1c_clean_buffer(pdev, buffer_info, 0);</div><div class='ctx'> 	}</div><div class='add'>+	/* zero out the descriptor ring */</div><div class='add'>+	memset(rfd_ring-&gt;desc, 0, rfd_ring-&gt;size);</div><div class='add'>+	rfd_ring-&gt;next_to_clean = 0;</div><div class='add'>+	rfd_ring-&gt;next_to_use = 0;</div><div class='add'>+	rrd_ring-&gt;next_to_use = 0;</div><div class='add'>+	rrd_ring-&gt;next_to_clean = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -877,8 +908,8 @@ static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)</div><div class='ctx'> static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1c_tpd_ring *tpd_ring = adapter-&gt;tpd_ring;</div><div class='del'>-	struct atl1c_rfd_ring *rfd_ring = adapter-&gt;rfd_ring;</div><div class='del'>-	struct atl1c_rrd_ring *rrd_ring = adapter-&gt;rrd_ring;</div><div class='add'>+	struct atl1c_rfd_ring *rfd_ring = &amp;adapter-&gt;rfd_ring;</div><div class='add'>+	struct atl1c_rrd_ring *rrd_ring = &amp;adapter-&gt;rrd_ring;</div><div class='ctx'> 	struct atl1c_buffer *buffer_info;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='hunk'>@@ -890,15 +921,13 @@ static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)</div><div class='ctx'> 			ATL1C_SET_BUFFER_STATE(&amp;buffer_info[i],</div><div class='ctx'> 					ATL1C_BUFFER_FREE);</div><div class='ctx'> 	}</div><div class='del'>-	for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++) {</div><div class='del'>-		rfd_ring[i].next_to_use = 0;</div><div class='del'>-		rfd_ring[i].next_to_clean = 0;</div><div class='del'>-		rrd_ring[i].next_to_use = 0;</div><div class='del'>-		rrd_ring[i].next_to_clean = 0;</div><div class='del'>-		for (j = 0; j &lt; rfd_ring[i].count; j++) {</div><div class='del'>-			buffer_info = &amp;rfd_ring[i].buffer_info[j];</div><div class='del'>-			ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);</div><div class='del'>-		}</div><div class='add'>+	rfd_ring-&gt;next_to_use = 0;</div><div class='add'>+	rfd_ring-&gt;next_to_clean = 0;</div><div class='add'>+	rrd_ring-&gt;next_to_use = 0;</div><div class='add'>+	rrd_ring-&gt;next_to_clean = 0;</div><div class='add'>+	for (j = 0; j &lt; rfd_ring-&gt;count; j++) {</div><div class='add'>+		buffer_info = &amp;rfd_ring-&gt;buffer_info[j];</div><div class='add'>+		ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -935,27 +964,23 @@ static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='ctx'> 	struct atl1c_tpd_ring *tpd_ring = adapter-&gt;tpd_ring;</div><div class='del'>-	struct atl1c_rfd_ring *rfd_ring = adapter-&gt;rfd_ring;</div><div class='del'>-	struct atl1c_rrd_ring *rrd_ring = adapter-&gt;rrd_ring;</div><div class='add'>+	struct atl1c_rfd_ring *rfd_ring = &amp;adapter-&gt;rfd_ring;</div><div class='add'>+	struct atl1c_rrd_ring *rrd_ring = &amp;adapter-&gt;rrd_ring;</div><div class='ctx'> 	struct atl1c_ring_header *ring_header = &amp;adapter-&gt;ring_header;</div><div class='del'>-	int num_rx_queues = adapter-&gt;num_rx_queues;</div><div class='ctx'> 	int size;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int count = 0;</div><div class='ctx'> 	int rx_desc_count = 0;</div><div class='ctx'> 	u32 offset = 0;</div><div class='ctx'> </div><div class='del'>-	rrd_ring[0].count = rfd_ring[0].count;</div><div class='add'>+	rrd_ring-&gt;count = rfd_ring-&gt;count;</div><div class='ctx'> 	for (i = 1; i &lt; AT_MAX_TRANSMIT_QUEUE; i++)</div><div class='ctx'> 		tpd_ring[i].count = tpd_ring[0].count;</div><div class='ctx'> </div><div class='del'>-	for (i = 1; i &lt; adapter-&gt;num_rx_queues; i++)</div><div class='del'>-		rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;</div><div class='del'>-</div><div class='ctx'> 	/* 2 tpd queue, one high priority queue,</div><div class='ctx'> 	 * another normal priority queue */</div><div class='ctx'> 	size = sizeof(struct atl1c_buffer) * (tpd_ring-&gt;count * 2 +</div><div class='del'>-		rfd_ring-&gt;count * num_rx_queues);</div><div class='add'>+		rfd_ring-&gt;count);</div><div class='ctx'> 	tpd_ring-&gt;buffer_info = kzalloc(size, GFP_KERNEL);</div><div class='ctx'> 	if (unlikely(!tpd_ring-&gt;buffer_info)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "kzalloc failed, size = %d\n",</div><div class='hunk'>@@ -968,12 +993,11 @@ static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)</div><div class='ctx'> 		count += tpd_ring[i].count;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; num_rx_queues; i++) {</div><div class='del'>-		rfd_ring[i].buffer_info =</div><div class='del'>-			(struct atl1c_buffer *) (tpd_ring-&gt;buffer_info + count);</div><div class='del'>-		count += rfd_ring[i].count;</div><div class='del'>-		rx_desc_count += rfd_ring[i].count;</div><div class='del'>-	}</div><div class='add'>+	rfd_ring-&gt;buffer_info =</div><div class='add'>+		(struct atl1c_buffer *) (tpd_ring-&gt;buffer_info + count);</div><div class='add'>+	count += rfd_ring-&gt;count;</div><div class='add'>+	rx_desc_count += rfd_ring-&gt;count;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * real ring DMA buffer</div><div class='ctx'> 	 * each ring/block may need up to 8 bytes for alignment, hence the</div><div class='hunk'>@@ -983,8 +1007,7 @@ static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)</div><div class='ctx'> 		sizeof(struct atl1c_tpd_desc) * tpd_ring-&gt;count * 2 +</div><div class='ctx'> 		sizeof(struct atl1c_rx_free_desc) * rx_desc_count +</div><div class='ctx'> 		sizeof(struct atl1c_recv_ret_status) * rx_desc_count +</div><div class='del'>-		sizeof(struct atl1c_hw_stats) +</div><div class='del'>-		8 * 4 + 8 * 2 * num_rx_queues;</div><div class='add'>+		8 * 4;</div><div class='ctx'> </div><div class='ctx'> 	ring_header-&gt;desc = pci_alloc_consistent(pdev, ring_header-&gt;size,</div><div class='ctx'> 				&amp;ring_header-&gt;dma);</div><div class='hunk'>@@ -1005,25 +1028,18 @@ static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)</div><div class='ctx'> 		offset += roundup(tpd_ring[i].size, 8);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* init RFD ring */</div><div class='del'>-	for (i = 0; i &lt; num_rx_queues; i++) {</div><div class='del'>-		rfd_ring[i].dma = ring_header-&gt;dma + offset;</div><div class='del'>-		rfd_ring[i].desc = (u8 *) ring_header-&gt;desc + offset;</div><div class='del'>-		rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *</div><div class='del'>-				rfd_ring[i].count;</div><div class='del'>-		offset += roundup(rfd_ring[i].size, 8);</div><div class='del'>-	}</div><div class='add'>+	rfd_ring-&gt;dma = ring_header-&gt;dma + offset;</div><div class='add'>+	rfd_ring-&gt;desc = (u8 *) ring_header-&gt;desc + offset;</div><div class='add'>+	rfd_ring-&gt;size = sizeof(struct atl1c_rx_free_desc) * rfd_ring-&gt;count;</div><div class='add'>+	offset += roundup(rfd_ring-&gt;size, 8);</div><div class='ctx'> </div><div class='ctx'> 	/* init RRD ring */</div><div class='del'>-	for (i = 0; i &lt; num_rx_queues; i++) {</div><div class='del'>-		rrd_ring[i].dma = ring_header-&gt;dma + offset;</div><div class='del'>-		rrd_ring[i].desc = (u8 *) ring_header-&gt;desc + offset;</div><div class='del'>-		rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *</div><div class='del'>-				rrd_ring[i].count;</div><div class='del'>-		offset += roundup(rrd_ring[i].size, 8);</div><div class='del'>-	}</div><div class='add'>+	rrd_ring-&gt;dma = ring_header-&gt;dma + offset;</div><div class='add'>+	rrd_ring-&gt;desc = (u8 *) ring_header-&gt;desc + offset;</div><div class='add'>+	rrd_ring-&gt;size = sizeof(struct atl1c_recv_ret_status) *</div><div class='add'>+		rrd_ring-&gt;count;</div><div class='add'>+	offset += roundup(rrd_ring-&gt;size, 8);</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;smb.dma = ring_header-&gt;dma + offset;</div><div class='del'>-	adapter-&gt;smb.smb = (u8 *)ring_header-&gt;desc + offset;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_nomem:</div><div class='hunk'>@@ -1034,26 +1050,20 @@ err_nomem:</div><div class='ctx'> static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1c_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-	struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)</div><div class='del'>-				adapter-&gt;rfd_ring;</div><div class='del'>-	struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)</div><div class='del'>-				adapter-&gt;rrd_ring;</div><div class='add'>+	struct atl1c_rfd_ring *rfd_ring = &amp;adapter-&gt;rfd_ring;</div><div class='add'>+	struct atl1c_rrd_ring *rrd_ring = &amp;adapter-&gt;rrd_ring;</div><div class='ctx'> 	struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)</div><div class='ctx'> 				adapter-&gt;tpd_ring;</div><div class='del'>-	struct atl1c_cmb *cmb = (struct atl1c_cmb *) &amp;adapter-&gt;cmb;</div><div class='del'>-	struct atl1c_smb *smb = (struct atl1c_smb *) &amp;adapter-&gt;smb;</div><div class='del'>-	int i;</div><div class='del'>-	u32 data;</div><div class='ctx'> </div><div class='ctx'> 	/* TPD */</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,</div><div class='ctx'> 			(u32)((tpd_ring[atl1c_trans_normal].dma &amp;</div><div class='ctx'> 				AT_DMA_HI_ADDR_MASK) &gt;&gt; 32));</div><div class='ctx'> 	/* just enable normal priority TX queue */</div><div class='del'>-	AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,</div><div class='add'>+	AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,</div><div class='ctx'> 			(u32)(tpd_ring[atl1c_trans_normal].dma &amp;</div><div class='ctx'> 				AT_DMA_LO_ADDR_MASK));</div><div class='del'>-	AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,</div><div class='add'>+	AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,</div><div class='ctx'> 			(u32)(tpd_ring[atl1c_trans_high].dma &amp;</div><div class='ctx'> 				AT_DMA_LO_ADDR_MASK));</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_TPD_RING_SIZE,</div><div class='hunk'>@@ -1062,31 +1072,21 @@ static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	/* RFD */</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,</div><div class='del'>-			(u32)((rfd_ring[0].dma &amp; AT_DMA_HI_ADDR_MASK) &gt;&gt; 32));</div><div class='del'>-	for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++)</div><div class='del'>-		AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],</div><div class='del'>-			(u32)(rfd_ring[i].dma &amp; AT_DMA_LO_ADDR_MASK));</div><div class='add'>+			(u32)((rfd_ring-&gt;dma &amp; AT_DMA_HI_ADDR_MASK) &gt;&gt; 32));</div><div class='add'>+	AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,</div><div class='add'>+			(u32)(rfd_ring-&gt;dma &amp; AT_DMA_LO_ADDR_MASK));</div><div class='ctx'> </div><div class='ctx'> 	AT_WRITE_REG(hw, REG_RFD_RING_SIZE,</div><div class='del'>-			rfd_ring[0].count &amp; RFD_RING_SIZE_MASK);</div><div class='add'>+			rfd_ring-&gt;count &amp; RFD_RING_SIZE_MASK);</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_RX_BUF_SIZE,</div><div class='ctx'> 			adapter-&gt;rx_buffer_len &amp; RX_BUF_SIZE_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* RRD */</div><div class='del'>-	for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++)</div><div class='del'>-		AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],</div><div class='del'>-			(u32)(rrd_ring[i].dma &amp; AT_DMA_LO_ADDR_MASK));</div><div class='add'>+	AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,</div><div class='add'>+			(u32)(rrd_ring-&gt;dma &amp; AT_DMA_LO_ADDR_MASK));</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_RRD_RING_SIZE,</div><div class='del'>-			(rrd_ring[0].count &amp; RRD_RING_SIZE_MASK));</div><div class='add'>+			(rrd_ring-&gt;count &amp; RRD_RING_SIZE_MASK));</div><div class='ctx'> </div><div class='del'>-	/* CMB */</div><div class='del'>-	AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb-&gt;dma &amp; AT_DMA_LO_ADDR_MASK);</div><div class='del'>-</div><div class='del'>-	/* SMB */</div><div class='del'>-	AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,</div><div class='del'>-			(u32)((smb-&gt;dma &amp; AT_DMA_HI_ADDR_MASK) &gt;&gt; 32));</div><div class='del'>-	AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,</div><div class='del'>-			(u32)(smb-&gt;dma &amp; AT_DMA_LO_ADDR_MASK));</div><div class='ctx'> 	if (hw-&gt;nic_type == athr_l2c_b) {</div><div class='ctx'> 		AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);</div><div class='ctx'> 		AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);</div><div class='hunk'>@@ -1097,13 +1097,6 @@ static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)</div><div class='ctx'> 		AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0);	/* TX watermark, to enter l1 state.*/</div><div class='ctx'> 		AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0);		/* RXD threshold.*/</div><div class='ctx'> 	}</div><div class='del'>-	if (hw-&gt;nic_type == athr_l2c_b || hw-&gt;nic_type == athr_l1d_2) {</div><div class='del'>-			/* Power Saving for L2c_B */</div><div class='del'>-		AT_READ_REG(hw, REG_SERDES_LOCK, &amp;data);</div><div class='del'>-		data |= SERDES_MAC_CLK_SLOWDOWN;</div><div class='del'>-		data |= SERDES_PYH_CLK_SLOWDOWN;</div><div class='del'>-		AT_WRITE_REG(hw, REG_SERDES_LOCK, data);</div><div class='del'>-	}</div><div class='ctx'> 	/* Load all of base address above */</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_LOAD_PTR, 1);</div><div class='ctx'> }</div><div class='hunk'>@@ -1111,32 +1104,26 @@ static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)</div><div class='ctx'> static void atl1c_configure_tx(struct atl1c_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1c_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-	u32 dev_ctrl_data;</div><div class='del'>-	u32 max_pay_load;</div><div class='add'>+	int max_pay_load;</div><div class='ctx'> 	u16 tx_offload_thresh;</div><div class='ctx'> 	u32 txq_ctrl_data;</div><div class='del'>-	u32 max_pay_load_data;</div><div class='ctx'> </div><div class='del'>-	tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;</div><div class='add'>+	tx_offload_thresh = MAX_TSO_FRAME_SIZE;</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,</div><div class='ctx'> 		(tx_offload_thresh &gt;&gt; 3) &amp; TX_TSO_OFFLOAD_THRESH_MASK);</div><div class='del'>-	AT_READ_REG(hw, REG_DEVICE_CTRL, &amp;dev_ctrl_data);</div><div class='del'>-	max_pay_load  = (dev_ctrl_data &gt;&gt; DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &amp;</div><div class='del'>-			DEVICE_CTRL_MAX_PAYLOAD_MASK;</div><div class='del'>-	hw-&gt;dmaw_block = min_t(u32, max_pay_load, hw-&gt;dmaw_block);</div><div class='del'>-	max_pay_load  = (dev_ctrl_data &gt;&gt; DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &amp;</div><div class='del'>-			DEVICE_CTRL_MAX_RREQ_SZ_MASK;</div><div class='add'>+	max_pay_load = pcie_get_readrq(adapter-&gt;pdev) &gt;&gt; 8;</div><div class='ctx'> 	hw-&gt;dmar_block = min_t(u32, max_pay_load, hw-&gt;dmar_block);</div><div class='del'>-</div><div class='del'>-	txq_ctrl_data = (hw-&gt;tpd_burst &amp; TXQ_NUM_TPD_BURST_MASK) &lt;&lt;</div><div class='del'>-			TXQ_NUM_TPD_BURST_SHIFT;</div><div class='del'>-	if (hw-&gt;ctrl_flags &amp; ATL1C_TXQ_MODE_ENHANCE)</div><div class='del'>-		txq_ctrl_data |= TXQ_CTRL_ENH_MODE;</div><div class='del'>-	max_pay_load_data = (atl1c_pay_load_size[hw-&gt;dmar_block] &amp;</div><div class='del'>-			TXQ_TXF_BURST_NUM_MASK) &lt;&lt; TXQ_TXF_BURST_NUM_SHIFT;</div><div class='del'>-	if (hw-&gt;nic_type == athr_l2c_b || hw-&gt;nic_type == athr_l2c_b2)</div><div class='del'>-		max_pay_load_data &gt;&gt;= 1;</div><div class='del'>-	txq_ctrl_data |= max_pay_load_data;</div><div class='add'>+	/*</div><div class='add'>+	 * if BIOS had changed the dam-read-max-length to an invalid value,</div><div class='add'>+	 * restore it to default value</div><div class='add'>+	 */</div><div class='add'>+	if (hw-&gt;dmar_block &lt; DEVICE_CTRL_MAXRRS_MIN) {</div><div class='add'>+		pcie_set_readrq(adapter-&gt;pdev, 128 &lt;&lt; DEVICE_CTRL_MAXRRS_MIN);</div><div class='add'>+		hw-&gt;dmar_block = DEVICE_CTRL_MAXRRS_MIN;</div><div class='add'>+	}</div><div class='add'>+	txq_ctrl_data =</div><div class='add'>+		hw-&gt;nic_type == athr_l2c_b || hw-&gt;nic_type == athr_l2c_b2 ?</div><div class='add'>+		L2CB_TXQ_CFGV : L1C_TXQ_CFGV;</div><div class='ctx'> </div><div class='ctx'> 	AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);</div><div class='ctx'> }</div><div class='hunk'>@@ -1151,34 +1138,13 @@ static void atl1c_configure_rx(struct atl1c_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	if (hw-&gt;ctrl_flags &amp; ATL1C_RX_IPV6_CHKSUM)</div><div class='ctx'> 		rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;</div><div class='del'>-	if (hw-&gt;rss_type == atl1c_rss_ipv4)</div><div class='del'>-		rxq_ctrl_data |= RSS_HASH_IPV4;</div><div class='del'>-	if (hw-&gt;rss_type == atl1c_rss_ipv4_tcp)</div><div class='del'>-		rxq_ctrl_data |= RSS_HASH_IPV4_TCP;</div><div class='del'>-	if (hw-&gt;rss_type == atl1c_rss_ipv6)</div><div class='del'>-		rxq_ctrl_data |= RSS_HASH_IPV6;</div><div class='del'>-	if (hw-&gt;rss_type == atl1c_rss_ipv6_tcp)</div><div class='del'>-		rxq_ctrl_data |= RSS_HASH_IPV6_TCP;</div><div class='del'>-	if (hw-&gt;rss_type != atl1c_rss_disable)</div><div class='del'>-		rxq_ctrl_data |= RRS_HASH_CTRL_EN;</div><div class='del'>-</div><div class='del'>-	rxq_ctrl_data |= (hw-&gt;rss_mode &amp; RSS_MODE_MASK) &lt;&lt;</div><div class='del'>-			RSS_MODE_SHIFT;</div><div class='del'>-	rxq_ctrl_data |= (hw-&gt;rss_hash_bits &amp; RSS_HASH_BITS_MASK) &lt;&lt;</div><div class='del'>-			RSS_HASH_BITS_SHIFT;</div><div class='del'>-	if (hw-&gt;ctrl_flags &amp; ATL1C_ASPM_CTRL_MON)</div><div class='del'>-		rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M &amp;</div><div class='del'>-			ASPM_THRUPUT_LIMIT_MASK) &lt;&lt; ASPM_THRUPUT_LIMIT_SHIFT;</div><div class='ctx'> </div><div class='del'>-	AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void atl1c_configure_rss(struct atl1c_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	struct atl1c_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	/* aspm for gigabit */</div><div class='add'>+	if (hw-&gt;nic_type != athr_l1d_2 &amp;&amp; (hw-&gt;device_id &amp; 1) != 0)</div><div class='add'>+		rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,</div><div class='add'>+			ASPM_THRUPUT_LIMIT_100M);</div><div class='ctx'> </div><div class='del'>-	AT_WRITE_REG(hw, REG_IDT_TABLE, hw-&gt;indirect_tab);</div><div class='del'>-	AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw-&gt;base_cpu);</div><div class='add'>+	AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void atl1c_configure_dma(struct atl1c_adapter *adapter)</div><div class='hunk'>@@ -1186,36 +1152,11 @@ static void atl1c_configure_dma(struct atl1c_adapter *adapter)</div><div class='ctx'> 	struct atl1c_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 dma_ctrl_data;</div><div class='ctx'> </div><div class='del'>-	dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;</div><div class='del'>-	if (hw-&gt;ctrl_flags &amp; ATL1C_CMB_ENABLE)</div><div class='del'>-		dma_ctrl_data |= DMA_CTRL_CMB_EN;</div><div class='del'>-	if (hw-&gt;ctrl_flags &amp; ATL1C_SMB_ENABLE)</div><div class='del'>-		dma_ctrl_data |= DMA_CTRL_SMB_EN;</div><div class='del'>-	else</div><div class='del'>-		dma_ctrl_data |= MAC_CTRL_SMB_DIS;</div><div class='del'>-</div><div class='del'>-	switch (hw-&gt;dma_order) {</div><div class='del'>-	case atl1c_dma_ord_in:</div><div class='del'>-		dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;</div><div class='del'>-		break;</div><div class='del'>-	case atl1c_dma_ord_enh:</div><div class='del'>-		dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;</div><div class='del'>-		break;</div><div class='del'>-	case atl1c_dma_ord_out:</div><div class='del'>-		dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dma_ctrl_data |= (((u32)hw-&gt;dmar_block) &amp; DMA_CTRL_DMAR_BURST_LEN_MASK)</div><div class='del'>-		&lt;&lt; DMA_CTRL_DMAR_BURST_LEN_SHIFT;</div><div class='del'>-	dma_ctrl_data |= (((u32)hw-&gt;dmaw_block) &amp; DMA_CTRL_DMAW_BURST_LEN_MASK)</div><div class='del'>-		&lt;&lt; DMA_CTRL_DMAW_BURST_LEN_SHIFT;</div><div class='del'>-	dma_ctrl_data |= (((u32)hw-&gt;dmar_dly_cnt) &amp; DMA_CTRL_DMAR_DLY_CNT_MASK)</div><div class='del'>-		&lt;&lt; DMA_CTRL_DMAR_DLY_CNT_SHIFT;</div><div class='del'>-	dma_ctrl_data |= (((u32)hw-&gt;dmaw_dly_cnt) &amp; DMA_CTRL_DMAW_DLY_CNT_MASK)</div><div class='del'>-		&lt;&lt; DMA_CTRL_DMAW_DLY_CNT_SHIFT;</div><div class='add'>+	dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |</div><div class='add'>+		DMA_CTRL_RREQ_PRI_DATA |</div><div class='add'>+		FIELDX(DMA_CTRL_RREQ_BLEN, hw-&gt;dmar_block) |</div><div class='add'>+		FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |</div><div class='add'>+		FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);</div><div class='ctx'> </div><div class='ctx'> 	AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);</div><div class='ctx'> }</div><div class='hunk'>@@ -1230,52 +1171,53 @@ static int atl1c_stop_mac(struct atl1c_hw *hw)</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='ctx'> 	AT_READ_REG(hw, REG_RXQ_CTRL, &amp;data);</div><div class='del'>-	data &amp;= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |</div><div class='del'>-		  RXQ3_CTRL_EN | RXQ_CTRL_EN);</div><div class='add'>+	data &amp;= ~RXQ_CTRL_EN;</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_RXQ_CTRL, data);</div><div class='ctx'> </div><div class='ctx'> 	AT_READ_REG(hw, REG_TXQ_CTRL, &amp;data);</div><div class='ctx'> 	data &amp;= ~TXQ_CTRL_EN;</div><div class='del'>-	AT_WRITE_REG(hw, REG_TWSI_CTRL, data);</div><div class='add'>+	AT_WRITE_REG(hw, REG_TXQ_CTRL, data);</div><div class='ctx'> </div><div class='del'>-	atl1c_wait_until_idle(hw);</div><div class='add'>+	atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);</div><div class='ctx'> </div><div class='ctx'> 	AT_READ_REG(hw, REG_MAC_CTRL, &amp;data);</div><div class='ctx'> 	data &amp;= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_MAC_CTRL, data);</div><div class='ctx'> </div><div class='del'>-	return (int)atl1c_wait_until_idle(hw);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)</div><div class='del'>-{</div><div class='del'>-	u32 data;</div><div class='del'>-</div><div class='del'>-	AT_READ_REG(hw, REG_RXQ_CTRL, &amp;data);</div><div class='del'>-	switch (hw-&gt;adapter-&gt;num_rx_queues) {</div><div class='del'>-	case 4:</div><div class='del'>-		data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-		data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		data |= RXQ1_CTRL_EN;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	data |= RXQ_CTRL_EN;</div><div class='del'>-	AT_WRITE_REG(hw, REG_RXQ_CTRL, data);</div><div class='add'>+	return (int)atl1c_wait_until_idle(hw,</div><div class='add'>+		IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)</div><div class='add'>+static void atl1c_start_mac(struct atl1c_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	u32 data;</div><div class='add'>+	struct atl1c_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u32 mac, txq, rxq;</div><div class='add'>+</div><div class='add'>+	hw-&gt;mac_duplex = adapter-&gt;link_duplex == FULL_DUPLEX ? true : false;</div><div class='add'>+	hw-&gt;mac_speed = adapter-&gt;link_speed == SPEED_1000 ?</div><div class='add'>+		atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;</div><div class='add'>+</div><div class='add'>+	AT_READ_REG(hw, REG_TXQ_CTRL, &amp;txq);</div><div class='add'>+	AT_READ_REG(hw, REG_RXQ_CTRL, &amp;rxq);</div><div class='add'>+	AT_READ_REG(hw, REG_MAC_CTRL, &amp;mac);</div><div class='add'>+</div><div class='add'>+	txq |= TXQ_CTRL_EN;</div><div class='add'>+	rxq |= RXQ_CTRL_EN;</div><div class='add'>+	mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |</div><div class='add'>+	       MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |</div><div class='add'>+	       MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |</div><div class='add'>+	       MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |</div><div class='add'>+	       MAC_CTRL_HASH_ALG_CRC32;</div><div class='add'>+	if (hw-&gt;mac_duplex)</div><div class='add'>+		mac |= MAC_CTRL_DUPLX;</div><div class='add'>+	else</div><div class='add'>+		mac &amp;= ~MAC_CTRL_DUPLX;</div><div class='add'>+	mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw-&gt;mac_speed);</div><div class='add'>+	mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw-&gt;preamble_len);</div><div class='ctx'> </div><div class='del'>-	AT_READ_REG(hw, REG_TXQ_CTRL, &amp;data);</div><div class='del'>-	data |= TXQ_CTRL_EN;</div><div class='del'>-	AT_WRITE_REG(hw, REG_TXQ_CTRL, data);</div><div class='add'>+	AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);</div><div class='add'>+	AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);</div><div class='add'>+	AT_WRITE_REG(hw, REG_MAC_CTRL, mac);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1287,10 +1229,7 @@ static int atl1c_reset_mac(struct atl1c_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw-&gt;adapter;</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='del'>-	u32 master_ctrl_data = 0;</div><div class='del'>-</div><div class='del'>-	AT_WRITE_REG(hw, REG_IMR, 0);</div><div class='del'>-	AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);</div><div class='add'>+	u32 ctrl_data = 0;</div><div class='ctx'> </div><div class='ctx'> 	atl1c_stop_mac(hw);</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1299,194 +1238,148 @@ static int atl1c_reset_mac(struct atl1c_hw *hw)</div><div class='ctx'> 	 * the current PCI configuration.  The global reset bit is self-</div><div class='ctx'> 	 * clearing, and should clear within a microsecond.</div><div class='ctx'> 	 */</div><div class='del'>-	AT_READ_REG(hw, REG_MASTER_CTRL, &amp;master_ctrl_data);</div><div class='del'>-	master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF;</div><div class='del'>-	AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST)</div><div class='del'>-			&amp; 0xFFFF));</div><div class='add'>+	AT_READ_REG(hw, REG_MASTER_CTRL, &amp;ctrl_data);</div><div class='add'>+	ctrl_data |= MASTER_CTRL_OOB_DIS;</div><div class='add'>+	AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);</div><div class='ctx'> </div><div class='ctx'> 	AT_WRITE_FLUSH(hw);</div><div class='ctx'> 	msleep(10);</div><div class='ctx'> 	/* Wait at least 10ms for All module to be Idle */</div><div class='ctx'> </div><div class='del'>-	if (atl1c_wait_until_idle(hw)) {</div><div class='add'>+	if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='ctx'> 			"MAC state machine can't be idle since"</div><div class='ctx'> 			" disabled for 10ms second\n");</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='add'>+	AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);</div><div class='add'>+</div><div class='add'>+	/* driver control speed/duplex */</div><div class='add'>+	AT_READ_REG(hw, REG_MAC_CTRL, &amp;ctrl_data);</div><div class='add'>+	AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);</div><div class='add'>+</div><div class='add'>+	/* clk switch setting */</div><div class='add'>+	AT_READ_REG(hw, REG_SERDES, &amp;ctrl_data);</div><div class='add'>+	switch (hw-&gt;nic_type) {</div><div class='add'>+	case athr_l2c_b:</div><div class='add'>+		ctrl_data &amp;= ~(SERDES_PHY_CLK_SLOWDOWN |</div><div class='add'>+				SERDES_MAC_CLK_SLOWDOWN);</div><div class='add'>+		AT_WRITE_REG(hw, REG_SERDES, ctrl_data);</div><div class='add'>+		break;</div><div class='add'>+	case athr_l2c_b2:</div><div class='add'>+	case athr_l1d_2:</div><div class='add'>+		ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;</div><div class='add'>+		AT_WRITE_REG(hw, REG_SERDES, ctrl_data);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	u32 pm_ctrl_data;</div><div class='add'>+	u16 ctrl_flags = hw-&gt;ctrl_flags;</div><div class='ctx'> </div><div class='del'>-	AT_READ_REG(hw, REG_PM_CTRL, &amp;pm_ctrl_data);</div><div class='del'>-	pm_ctrl_data &amp;= ~(PM_CTRL_L1_ENTRY_TIMER_MASK &lt;&lt;</div><div class='del'>-			PM_CTRL_L1_ENTRY_TIMER_SHIFT);</div><div class='del'>-	pm_ctrl_data &amp;= ~PM_CTRL_CLK_SWH_L1;</div><div class='del'>-	pm_ctrl_data &amp;= ~PM_CTRL_ASPM_L0S_EN;</div><div class='del'>-	pm_ctrl_data &amp;= ~PM_CTRL_ASPM_L1_EN;</div><div class='del'>-	pm_ctrl_data &amp;= ~PM_CTRL_MAC_ASPM_CHK;</div><div class='del'>-	pm_ctrl_data &amp;= ~PM_CTRL_SERDES_PD_EX_L1;</div><div class='del'>-</div><div class='del'>-	pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;</div><div class='del'>-	pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;</div><div class='del'>-	pm_ctrl_data |=	PM_CTRL_SERDES_L1_EN;</div><div class='del'>-	AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);</div><div class='add'>+	hw-&gt;ctrl_flags &amp;= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);</div><div class='add'>+	atl1c_set_aspm(hw, SPEED_0);</div><div class='add'>+	hw-&gt;ctrl_flags = ctrl_flags;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Set ASPM state.</div><div class='ctx'>  * Enable/disable L0s/L1 depend on link state.</div><div class='ctx'>  */</div><div class='del'>-static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)</div><div class='add'>+static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)</div><div class='ctx'> {</div><div class='ctx'> 	u32 pm_ctrl_data;</div><div class='del'>-	u32 link_ctrl_data;</div><div class='del'>-	u32 link_l1_timer = 0xF;</div><div class='add'>+	u32 link_l1_timer;</div><div class='ctx'> </div><div class='ctx'> 	AT_READ_REG(hw, REG_PM_CTRL, &amp;pm_ctrl_data);</div><div class='del'>-	AT_READ_REG(hw, REG_LINK_CTRL, &amp;link_ctrl_data);</div><div class='add'>+	pm_ctrl_data &amp;= ~(PM_CTRL_ASPM_L1_EN |</div><div class='add'>+			  PM_CTRL_ASPM_L0S_EN |</div><div class='add'>+			  PM_CTRL_MAC_ASPM_CHK);</div><div class='add'>+	/* L1 timer */</div><div class='add'>+	if (hw-&gt;nic_type == athr_l2c_b2 || hw-&gt;nic_type == athr_l1d_2) {</div><div class='add'>+		pm_ctrl_data &amp;= ~PMCTRL_TXL1_AFTER_L0S;</div><div class='add'>+		link_l1_timer =</div><div class='add'>+			link_speed == SPEED_1000 || link_speed == SPEED_100 ?</div><div class='add'>+			L1D_PMCTRL_L1_ENTRY_TM_16US : 1;</div><div class='add'>+		pm_ctrl_data = FIELD_SETX(pm_ctrl_data,</div><div class='add'>+			L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);</div><div class='add'>+	} else {</div><div class='add'>+		link_l1_timer = hw-&gt;nic_type == athr_l2c_b ?</div><div class='add'>+			L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;</div><div class='add'>+		if (link_speed != SPEED_1000 &amp;&amp; link_speed != SPEED_100)</div><div class='add'>+			link_l1_timer = 1;</div><div class='add'>+		pm_ctrl_data = FIELD_SETX(pm_ctrl_data,</div><div class='add'>+			PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	pm_ctrl_data &amp;= ~PM_CTRL_SERDES_PD_EX_L1;</div><div class='del'>-	pm_ctrl_data &amp;=  ~(PM_CTRL_L1_ENTRY_TIMER_MASK &lt;&lt;</div><div class='del'>-			PM_CTRL_L1_ENTRY_TIMER_SHIFT);</div><div class='del'>-	pm_ctrl_data &amp;= ~(PM_CTRL_LCKDET_TIMER_MASK &lt;&lt;</div><div class='del'>-			PM_CTRL_LCKDET_TIMER_SHIFT);</div><div class='del'>-	pm_ctrl_data |= AT_LCKDET_TIMER	&lt;&lt; PM_CTRL_LCKDET_TIMER_SHIFT;</div><div class='add'>+	/* L0S/L1 enable */</div><div class='add'>+	if ((hw-&gt;ctrl_flags &amp; ATL1C_ASPM_L0S_SUPPORT) &amp;&amp; link_speed != SPEED_0)</div><div class='add'>+		pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;</div><div class='add'>+	if (hw-&gt;ctrl_flags &amp; ATL1C_ASPM_L1_SUPPORT)</div><div class='add'>+		pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;</div><div class='ctx'> </div><div class='add'>+	/* l2cb &amp; l1d &amp; l2cb2 &amp; l1d2 */</div><div class='ctx'> 	if (hw-&gt;nic_type == athr_l2c_b || hw-&gt;nic_type == athr_l1d ||</div><div class='del'>-		hw-&gt;nic_type == athr_l2c_b2 || hw-&gt;nic_type == athr_l1d_2) {</div><div class='del'>-		link_ctrl_data &amp;= ~LINK_CTRL_EXT_SYNC;</div><div class='del'>-		if (!(hw-&gt;ctrl_flags &amp; ATL1C_APS_MODE_ENABLE)) {</div><div class='del'>-			if (hw-&gt;nic_type == athr_l2c_b &amp;&amp; hw-&gt;revision_id == L2CB_V10)</div><div class='del'>-				link_ctrl_data |= LINK_CTRL_EXT_SYNC;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data);</div><div class='del'>-</div><div class='del'>-		pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER;</div><div class='del'>-		pm_ctrl_data &amp;= ~(PM_CTRL_PM_REQ_TIMER_MASK &lt;&lt;</div><div class='del'>-			PM_CTRL_PM_REQ_TIMER_SHIFT);</div><div class='del'>-		pm_ctrl_data |= AT_ASPM_L1_TIMER &lt;&lt;</div><div class='del'>-			PM_CTRL_PM_REQ_TIMER_SHIFT;</div><div class='del'>-		pm_ctrl_data &amp;= ~PM_CTRL_SA_DLY_EN;</div><div class='del'>-		pm_ctrl_data &amp;= ~PM_CTRL_HOTRST;</div><div class='del'>-		pm_ctrl_data |= 1 &lt;&lt; PM_CTRL_L1_ENTRY_TIMER_SHIFT;</div><div class='del'>-		pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1;</div><div class='del'>-	}</div><div class='del'>-	pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;</div><div class='del'>-	if (linkup) {</div><div class='del'>-		pm_ctrl_data &amp;= ~PM_CTRL_ASPM_L1_EN;</div><div class='del'>-		pm_ctrl_data &amp;= ~PM_CTRL_ASPM_L0S_EN;</div><div class='del'>-		if (hw-&gt;ctrl_flags &amp; ATL1C_ASPM_L1_SUPPORT)</div><div class='del'>-			pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;</div><div class='del'>-		if (hw-&gt;ctrl_flags &amp; ATL1C_ASPM_L0S_SUPPORT)</div><div class='del'>-			pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;</div><div class='del'>-</div><div class='del'>-		if (hw-&gt;nic_type == athr_l2c_b || hw-&gt;nic_type == athr_l1d ||</div><div class='del'>-			hw-&gt;nic_type == athr_l2c_b2 || hw-&gt;nic_type == athr_l1d_2) {</div><div class='del'>-			if (hw-&gt;nic_type == athr_l2c_b)</div><div class='del'>-				if (!(hw-&gt;ctrl_flags &amp; ATL1C_APS_MODE_ENABLE))</div><div class='del'>-					pm_ctrl_data &amp;= ~PM_CTRL_ASPM_L0S_EN;</div><div class='del'>-			pm_ctrl_data &amp;= ~PM_CTRL_SERDES_L1_EN;</div><div class='del'>-			pm_ctrl_data &amp;= ~PM_CTRL_SERDES_PLL_L1_EN;</div><div class='del'>-			pm_ctrl_data &amp;= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;</div><div class='del'>-			pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;</div><div class='del'>-		if (hw-&gt;adapter-&gt;link_speed == SPEED_100 ||</div><div class='del'>-				hw-&gt;adapter-&gt;link_speed == SPEED_1000) {</div><div class='del'>-				pm_ctrl_data &amp;=  ~(PM_CTRL_L1_ENTRY_TIMER_MASK &lt;&lt;</div><div class='del'>-					PM_CTRL_L1_ENTRY_TIMER_SHIFT);</div><div class='del'>-				if (hw-&gt;nic_type == athr_l2c_b)</div><div class='del'>-					link_l1_timer = 7;</div><div class='del'>-				else if (hw-&gt;nic_type == athr_l2c_b2 ||</div><div class='del'>-					hw-&gt;nic_type == athr_l1d_2)</div><div class='del'>-					link_l1_timer = 4;</div><div class='del'>-				pm_ctrl_data |= link_l1_timer &lt;&lt;</div><div class='del'>-					PM_CTRL_L1_ENTRY_TIMER_SHIFT;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;</div><div class='del'>-			pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;</div><div class='del'>-			pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;</div><div class='del'>-			pm_ctrl_data &amp;= ~PM_CTRL_CLK_SWH_L1;</div><div class='add'>+	    hw-&gt;nic_type == athr_l2c_b2 || hw-&gt;nic_type == athr_l1d_2) {</div><div class='add'>+		pm_ctrl_data = FIELD_SETX(pm_ctrl_data,</div><div class='add'>+			PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);</div><div class='add'>+		pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |</div><div class='add'>+				PM_CTRL_SERDES_PD_EX_L1 |</div><div class='add'>+				PM_CTRL_CLK_SWH_L1;</div><div class='add'>+		pm_ctrl_data &amp;= ~(PM_CTRL_SERDES_L1_EN |</div><div class='add'>+				  PM_CTRL_SERDES_PLL_L1_EN |</div><div class='add'>+				  PM_CTRL_SERDES_BUFS_RX_L1_EN |</div><div class='add'>+				  PM_CTRL_SA_DLY_EN |</div><div class='add'>+				  PM_CTRL_HOTRST);</div><div class='add'>+		/* disable l0s if link down or l2cb */</div><div class='add'>+		if (link_speed == SPEED_0 || hw-&gt;nic_type == athr_l2c_b)</div><div class='ctx'> 			pm_ctrl_data &amp;= ~PM_CTRL_ASPM_L0S_EN;</div><div class='del'>-			pm_ctrl_data &amp;= ~PM_CTRL_ASPM_L1_EN;</div><div class='del'>-</div><div class='add'>+	} else { /* l1c */</div><div class='add'>+		pm_ctrl_data =</div><div class='add'>+			FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);</div><div class='add'>+		if (link_speed != SPEED_0) {</div><div class='add'>+			pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |</div><div class='add'>+					PM_CTRL_SERDES_PLL_L1_EN |</div><div class='add'>+					PM_CTRL_SERDES_BUFS_RX_L1_EN;</div><div class='add'>+			pm_ctrl_data &amp;= ~(PM_CTRL_SERDES_PD_EX_L1 |</div><div class='add'>+					  PM_CTRL_CLK_SWH_L1 |</div><div class='add'>+					  PM_CTRL_ASPM_L0S_EN |</div><div class='add'>+					  PM_CTRL_ASPM_L1_EN);</div><div class='add'>+		} else { /* link down */</div><div class='add'>+			pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;</div><div class='add'>+			pm_ctrl_data &amp;= ~(PM_CTRL_SERDES_L1_EN |</div><div class='add'>+					  PM_CTRL_SERDES_PLL_L1_EN |</div><div class='add'>+					  PM_CTRL_SERDES_BUFS_RX_L1_EN |</div><div class='add'>+					  PM_CTRL_ASPM_L0S_EN);</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		pm_ctrl_data &amp;= ~PM_CTRL_SERDES_L1_EN;</div><div class='del'>-		pm_ctrl_data &amp;= ~PM_CTRL_ASPM_L0S_EN;</div><div class='del'>-		pm_ctrl_data &amp;= ~PM_CTRL_SERDES_PLL_L1_EN;</div><div class='del'>-		pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;</div><div class='del'>-</div><div class='del'>-		if (hw-&gt;ctrl_flags &amp; ATL1C_ASPM_L1_SUPPORT)</div><div class='del'>-			pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;</div><div class='del'>-		else</div><div class='del'>-			pm_ctrl_data &amp;= ~PM_CTRL_ASPM_L1_EN;</div><div class='ctx'> 	}</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	struct atl1c_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-	struct net_device *netdev = adapter-&gt;netdev;</div><div class='del'>-	u32 mac_ctrl_data;</div><div class='del'>-</div><div class='del'>-	mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;</div><div class='del'>-	mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);</div><div class='del'>-</div><div class='del'>-	if (adapter-&gt;link_duplex == FULL_DUPLEX) {</div><div class='del'>-		hw-&gt;mac_duplex = true;</div><div class='del'>-		mac_ctrl_data |= MAC_CTRL_DUPLX;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (adapter-&gt;link_speed == SPEED_1000)</div><div class='del'>-		hw-&gt;mac_speed = atl1c_mac_speed_1000;</div><div class='del'>-	else</div><div class='del'>-		hw-&gt;mac_speed = atl1c_mac_speed_10_100;</div><div class='del'>-</div><div class='del'>-	mac_ctrl_data |= (hw-&gt;mac_speed &amp; MAC_CTRL_SPEED_MASK) &lt;&lt;</div><div class='del'>-			MAC_CTRL_SPEED_SHIFT;</div><div class='del'>-</div><div class='del'>-	mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);</div><div class='del'>-	mac_ctrl_data |= ((hw-&gt;preamble_len &amp; MAC_CTRL_PRMLEN_MASK) &lt;&lt;</div><div class='del'>-			MAC_CTRL_PRMLEN_SHIFT);</div><div class='del'>-</div><div class='del'>-	__atl1c_vlan_mode(netdev-&gt;features, &amp;mac_ctrl_data);</div><div class='del'>-</div><div class='del'>-	mac_ctrl_data |= MAC_CTRL_BC_EN;</div><div class='del'>-	if (netdev-&gt;flags &amp; IFF_PROMISC)</div><div class='del'>-		mac_ctrl_data |= MAC_CTRL_PROMIS_EN;</div><div class='del'>-	if (netdev-&gt;flags &amp; IFF_ALLMULTI)</div><div class='del'>-		mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;</div><div class='del'>-</div><div class='del'>-	mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;</div><div class='del'>-	if (hw-&gt;nic_type == athr_l1d || hw-&gt;nic_type == athr_l2c_b2 ||</div><div class='del'>-	    hw-&gt;nic_type == athr_l1d_2) {</div><div class='del'>-		mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW;</div><div class='del'>-		mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32;</div><div class='del'>-	}</div><div class='del'>-	AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * atl1c_configure - Configure Transmit&amp;Receive Unit after Reset</div><div class='ctx'>  * @adapter: board private structure</div><div class='ctx'>  *</div><div class='ctx'>  * Configure the Tx /Rx unit of the MAC after a reset.</div><div class='ctx'>  */</div><div class='del'>-static int atl1c_configure(struct atl1c_adapter *adapter)</div><div class='add'>+static int atl1c_configure_mac(struct atl1c_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1c_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 master_ctrl_data = 0;</div><div class='ctx'> 	u32 intr_modrt_data;</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='add'>+	AT_READ_REG(hw, REG_MASTER_CTRL, &amp;master_ctrl_data);</div><div class='add'>+	master_ctrl_data &amp;= ~(MASTER_CTRL_TX_ITIMER_EN |</div><div class='add'>+			      MASTER_CTRL_RX_ITIMER_EN |</div><div class='add'>+			      MASTER_CTRL_INT_RDCLR);</div><div class='ctx'> 	/* clear interrupt status */</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);</div><div class='ctx'> 	/*  Clear any WOL status */</div><div class='hunk'>@@ -1525,30 +1418,39 @@ static int atl1c_configure(struct atl1c_adapter *adapter)</div><div class='ctx'> 	master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;ctrl_flags &amp; ATL1C_CMB_ENABLE) {</div><div class='del'>-		AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,</div><div class='del'>-			hw-&gt;cmb_tpd &amp; CMB_TPD_THRESH_MASK);</div><div class='del'>-		AT_WRITE_REG(hw, REG_CMB_TX_TIMER,</div><div class='del'>-			hw-&gt;cmb_tx_timer &amp; CMB_TX_TIMER_MASK);</div><div class='del'>-	}</div><div class='add'>+	AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,</div><div class='add'>+		hw-&gt;smb_timer &amp; SMB_STAT_TIMER_MASK);</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;ctrl_flags &amp; ATL1C_SMB_ENABLE)</div><div class='del'>-		AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,</div><div class='del'>-			hw-&gt;smb_timer &amp; SMB_STAT_TIMER_MASK);</div><div class='ctx'> 	/* set MTU */</div><div class='ctx'> 	AT_WRITE_REG(hw, REG_MTU, hw-&gt;max_frame_size + ETH_HLEN +</div><div class='ctx'> 			VLAN_HLEN + ETH_FCS_LEN);</div><div class='del'>-	/* HDS, disable */</div><div class='del'>-	AT_WRITE_REG(hw, REG_HDS_CTRL, 0);</div><div class='ctx'> </div><div class='ctx'> 	atl1c_configure_tx(adapter);</div><div class='ctx'> 	atl1c_configure_rx(adapter);</div><div class='del'>-	atl1c_configure_rss(adapter);</div><div class='ctx'> 	atl1c_configure_dma(adapter);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int atl1c_configure(struct atl1c_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+	int num;</div><div class='add'>+</div><div class='add'>+	atl1c_init_ring_ptrs(adapter);</div><div class='add'>+	atl1c_set_multi(netdev);</div><div class='add'>+	atl1c_restore_vlan(adapter);</div><div class='add'>+</div><div class='add'>+	num = atl1c_alloc_rx_buffer(adapter);</div><div class='add'>+	if (unlikely(num == 0))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (atl1c_configure_mac(adapter))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	u16 hw_reg_addr = 0;</div><div class='hunk'>@@ -1635,16 +1537,11 @@ static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='ctx'> 	u16 next_to_clean = atomic_read(&amp;tpd_ring-&gt;next_to_clean);</div><div class='ctx'> 	u16 hw_next_to_clean;</div><div class='del'>-	u16 shift;</div><div class='del'>-	u32 data;</div><div class='add'>+	u16 reg;</div><div class='ctx'> </div><div class='del'>-	if (type == atl1c_trans_high)</div><div class='del'>-		shift = MB_HTPD_CONS_IDX_SHIFT;</div><div class='del'>-	else</div><div class='del'>-		shift = MB_NTPD_CONS_IDX_SHIFT;</div><div class='add'>+	reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;</div><div class='ctx'> </div><div class='del'>-	AT_READ_REG(&amp;adapter-&gt;hw, REG_MB_PRIO_CONS_IDX, &amp;data);</div><div class='del'>-	hw_next_to_clean = (data &gt;&gt; shift) &amp; MB_PRIO_PROD_IDX_MASK;</div><div class='add'>+	AT_READ_REGW(&amp;adapter-&gt;hw, reg, &amp;hw_next_to_clean);</div><div class='ctx'> </div><div class='ctx'> 	while (next_to_clean != hw_next_to_clean) {</div><div class='ctx'> 		buffer_info = &amp;tpd_ring-&gt;buffer_info[next_to_clean];</div><div class='hunk'>@@ -1746,9 +1643,9 @@ static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,</div><div class='ctx'> 	skb_checksum_none_assert(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)</div><div class='add'>+static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	struct atl1c_rfd_ring *rfd_ring = &amp;adapter-&gt;rfd_ring[ringid];</div><div class='add'>+	struct atl1c_rfd_ring *rfd_ring = &amp;adapter-&gt;rfd_ring;</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='ctx'> 	struct atl1c_buffer *buffer_info, *next_info;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='hunk'>@@ -1800,7 +1697,7 @@ static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid</div><div class='ctx'> 		/* TODO: update mailbox here */</div><div class='ctx'> 		wmb();</div><div class='ctx'> 		rfd_ring-&gt;next_to_use = rfd_next_to_use;</div><div class='del'>-		AT_WRITE_REG(&amp;adapter-&gt;hw, atl1c_rfd_prod_idx_regs[ringid],</div><div class='add'>+		AT_WRITE_REG(&amp;adapter-&gt;hw, REG_MB_RFD0_PROD_IDX,</div><div class='ctx'> 			rfd_ring-&gt;next_to_use &amp; MB_RFDX_PROD_IDX_MASK);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1839,7 +1736,7 @@ static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,</div><div class='ctx'> 	rfd_ring-&gt;next_to_clean = rfd_index;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,</div><div class='add'>+static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,</div><div class='ctx'> 		   int *work_done, int work_to_do)</div><div class='ctx'> {</div><div class='ctx'> 	u16 rfd_num, rfd_index;</div><div class='hunk'>@@ -1847,8 +1744,8 @@ static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,</div><div class='ctx'> 	u16 length;</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='ctx'> 	struct net_device *netdev  = adapter-&gt;netdev;</div><div class='del'>-	struct atl1c_rfd_ring *rfd_ring = &amp;adapter-&gt;rfd_ring[que];</div><div class='del'>-	struct atl1c_rrd_ring *rrd_ring = &amp;adapter-&gt;rrd_ring[que];</div><div class='add'>+	struct atl1c_rfd_ring *rfd_ring = &amp;adapter-&gt;rfd_ring;</div><div class='add'>+	struct atl1c_rrd_ring *rrd_ring = &amp;adapter-&gt;rrd_ring;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct atl1c_recv_ret_status *rrs;</div><div class='ctx'> 	struct atl1c_buffer *buffer_info;</div><div class='hunk'>@@ -1914,7 +1811,7 @@ rrs_checked:</div><div class='ctx'> 		count++;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (count)</div><div class='del'>-		atl1c_alloc_rx_buffer(adapter, que);</div><div class='add'>+		atl1c_alloc_rx_buffer(adapter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1931,7 +1828,7 @@ static int atl1c_clean(struct napi_struct *napi, int budget)</div><div class='ctx'> 	if (!netif_carrier_ok(adapter-&gt;netdev))</div><div class='ctx'> 		goto quit_polling;</div><div class='ctx'> 	/* just enable one RXQ */</div><div class='del'>-	atl1c_clean_rx_irq(adapter, 0, &amp;work_done, budget);</div><div class='add'>+	atl1c_clean_rx_irq(adapter, &amp;work_done, budget);</div><div class='ctx'> </div><div class='ctx'> 	if (work_done &lt; budget) {</div><div class='ctx'> quit_polling:</div><div class='hunk'>@@ -2206,23 +2103,10 @@ static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,</div><div class='ctx'> 			   struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1c_tpd_ring *tpd_ring = &amp;adapter-&gt;tpd_ring[type];</div><div class='del'>-	u32 prod_data;</div><div class='add'>+	u16 reg;</div><div class='ctx'> </div><div class='del'>-	AT_READ_REG(&amp;adapter-&gt;hw, REG_MB_PRIO_PROD_IDX, &amp;prod_data);</div><div class='del'>-	switch (type) {</div><div class='del'>-	case atl1c_trans_high:</div><div class='del'>-		prod_data &amp;= 0xFFFF0000;</div><div class='del'>-		prod_data |= tpd_ring-&gt;next_to_use &amp; 0xFFFF;</div><div class='del'>-		break;</div><div class='del'>-	case atl1c_trans_normal:</div><div class='del'>-		prod_data &amp;= 0x0000FFFF;</div><div class='del'>-		prod_data |= (tpd_ring-&gt;next_to_use &amp; 0xFFFF) &lt;&lt; 16;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	wmb();</div><div class='del'>-	AT_WRITE_REG(&amp;adapter-&gt;hw, REG_MB_PRIO_PROD_IDX, prod_data);</div><div class='add'>+	reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;</div><div class='add'>+	AT_WRITE_REGW(&amp;adapter-&gt;hw, reg, tpd_ring-&gt;next_to_use);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,</div><div class='hunk'>@@ -2307,8 +2191,7 @@ static int atl1c_request_irq(struct atl1c_adapter *adapter)</div><div class='ctx'> 				"Unable to allocate MSI interrupt Error: %d\n",</div><div class='ctx'> 				err);</div><div class='ctx'> 		adapter-&gt;have_msi = false;</div><div class='del'>-	} else</div><div class='del'>-		netdev-&gt;irq = pdev-&gt;irq;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!adapter-&gt;have_msi)</div><div class='ctx'> 		flags |= IRQF_SHARED;</div><div class='hunk'>@@ -2328,44 +2211,38 @@ static int atl1c_request_irq(struct atl1c_adapter *adapter)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	/* release tx-pending skbs and reset tx/rx ring index */</div><div class='add'>+	atl1c_clean_tx_ring(adapter, atl1c_trans_normal);</div><div class='add'>+	atl1c_clean_tx_ring(adapter, atl1c_trans_high);</div><div class='add'>+	atl1c_clean_rx_ring(adapter);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int atl1c_up(struct atl1c_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = adapter-&gt;netdev;</div><div class='del'>-	int num;</div><div class='ctx'> 	int err;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	netif_carrier_off(netdev);</div><div class='del'>-	atl1c_init_ring_ptrs(adapter);</div><div class='del'>-	atl1c_set_multi(netdev);</div><div class='del'>-	atl1c_restore_vlan(adapter);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++) {</div><div class='del'>-		num = atl1c_alloc_rx_buffer(adapter, i);</div><div class='del'>-		if (unlikely(num == 0)) {</div><div class='del'>-			err = -ENOMEM;</div><div class='del'>-			goto err_alloc_rx;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (atl1c_configure(adapter)) {</div><div class='del'>-		err = -EIO;</div><div class='add'>+	err = atl1c_configure(adapter);</div><div class='add'>+	if (unlikely(err))</div><div class='ctx'> 		goto err_up;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	err = atl1c_request_irq(adapter);</div><div class='ctx'> 	if (unlikely(err))</div><div class='ctx'> 		goto err_up;</div><div class='ctx'> </div><div class='add'>+	atl1c_check_link_status(adapter);</div><div class='ctx'> 	clear_bit(__AT_DOWN, &amp;adapter-&gt;flags);</div><div class='ctx'> 	napi_enable(&amp;adapter-&gt;napi);</div><div class='ctx'> 	atl1c_irq_enable(adapter);</div><div class='del'>-	atl1c_check_link_status(adapter);</div><div class='ctx'> 	netif_start_queue(netdev);</div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='ctx'> err_up:</div><div class='del'>-err_alloc_rx:</div><div class='ctx'> 	atl1c_clean_rx_ring(adapter);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -2383,15 +2260,15 @@ static void atl1c_down(struct atl1c_adapter *adapter)</div><div class='ctx'> 	napi_disable(&amp;adapter-&gt;napi);</div><div class='ctx'> 	atl1c_irq_disable(adapter);</div><div class='ctx'> 	atl1c_free_irq(adapter);</div><div class='add'>+	/* disable ASPM if device inactive */</div><div class='add'>+	atl1c_disable_l0s_l1(&amp;adapter-&gt;hw);</div><div class='ctx'> 	/* reset MAC to disable all RX/TX */</div><div class='ctx'> 	atl1c_reset_mac(&amp;adapter-&gt;hw);</div><div class='ctx'> 	msleep(1);</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;link_speed = SPEED_0;</div><div class='ctx'> 	adapter-&gt;link_duplex = -1;</div><div class='del'>-	atl1c_clean_tx_ring(adapter, atl1c_trans_normal);</div><div class='del'>-	atl1c_clean_tx_ring(adapter, atl1c_trans_high);</div><div class='del'>-	atl1c_clean_rx_ring(adapter);</div><div class='add'>+	atl1c_reset_dma_ring(adapter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2424,13 +2301,6 @@ static int atl1c_open(struct net_device *netdev)</div><div class='ctx'> 	if (unlikely(err))</div><div class='ctx'> 		goto err_up;</div><div class='ctx'> </div><div class='del'>-	if (adapter-&gt;hw.ctrl_flags &amp; ATL1C_FPGA_VERSION) {</div><div class='del'>-		u32 phy_data;</div><div class='del'>-</div><div class='del'>-		AT_READ_REG(&amp;adapter-&gt;hw, REG_MDIO_CTRL, &amp;phy_data);</div><div class='del'>-		phy_data |= MDIO_AP_EN;</div><div class='del'>-		AT_WRITE_REG(&amp;adapter-&gt;hw, REG_MDIO_CTRL, phy_data);</div><div class='del'>-	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_up:</div><div class='hunk'>@@ -2456,6 +2326,8 @@ static int atl1c_close(struct net_device *netdev)</div><div class='ctx'> 	struct atl1c_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(test_bit(__AT_RESETTING, &amp;adapter-&gt;flags));</div><div class='add'>+	set_bit(__AT_DOWN, &amp;adapter-&gt;flags);</div><div class='add'>+	cancel_work_sync(&amp;adapter-&gt;common_task);</div><div class='ctx'> 	atl1c_down(adapter);</div><div class='ctx'> 	atl1c_free_ring_resources(adapter);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2467,10 +2339,6 @@ static int atl1c_suspend(struct device *dev)</div><div class='ctx'> 	struct net_device *netdev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct atl1c_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct atl1c_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-	u32 mac_ctrl_data = 0;</div><div class='del'>-	u32 master_ctrl_data = 0;</div><div class='del'>-	u32 wol_ctrl_data = 0;</div><div class='del'>-	u16 mii_intr_status_data = 0;</div><div class='ctx'> 	u32 wufc = adapter-&gt;wol;</div><div class='ctx'> </div><div class='ctx'> 	atl1c_disable_l0s_l1(hw);</div><div class='hunk'>@@ -2481,75 +2349,10 @@ static int atl1c_suspend(struct device *dev)</div><div class='ctx'> 	netif_device_detach(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (wufc)</div><div class='del'>-		if (atl1c_phy_power_saving(hw) != 0)</div><div class='add'>+		if (atl1c_phy_to_ps_link(hw) != 0)</div><div class='ctx'> 			dev_dbg(&amp;pdev-&gt;dev, "phy power saving failed");</div><div class='ctx'> </div><div class='del'>-	AT_READ_REG(hw, REG_MASTER_CTRL, &amp;master_ctrl_data);</div><div class='del'>-	AT_READ_REG(hw, REG_MAC_CTRL, &amp;mac_ctrl_data);</div><div class='del'>-</div><div class='del'>-	master_ctrl_data &amp;= ~MASTER_CTRL_CLK_SEL_DIS;</div><div class='del'>-	mac_ctrl_data &amp;= ~(MAC_CTRL_PRMLEN_MASK &lt;&lt; MAC_CTRL_PRMLEN_SHIFT);</div><div class='del'>-	mac_ctrl_data |= (((u32)adapter-&gt;hw.preamble_len &amp;</div><div class='del'>-			MAC_CTRL_PRMLEN_MASK) &lt;&lt;</div><div class='del'>-			MAC_CTRL_PRMLEN_SHIFT);</div><div class='del'>-	mac_ctrl_data &amp;= ~(MAC_CTRL_SPEED_MASK &lt;&lt; MAC_CTRL_SPEED_SHIFT);</div><div class='del'>-	mac_ctrl_data &amp;= ~MAC_CTRL_DUPLX;</div><div class='del'>-</div><div class='del'>-	if (wufc) {</div><div class='del'>-		mac_ctrl_data |= MAC_CTRL_RX_EN;</div><div class='del'>-		if (adapter-&gt;link_speed == SPEED_1000 ||</div><div class='del'>-			adapter-&gt;link_speed == SPEED_0) {</div><div class='del'>-			mac_ctrl_data |= atl1c_mac_speed_1000 &lt;&lt;</div><div class='del'>-					MAC_CTRL_SPEED_SHIFT;</div><div class='del'>-			mac_ctrl_data |= MAC_CTRL_DUPLX;</div><div class='del'>-		} else</div><div class='del'>-			mac_ctrl_data |= atl1c_mac_speed_10_100 &lt;&lt;</div><div class='del'>-					MAC_CTRL_SPEED_SHIFT;</div><div class='del'>-</div><div class='del'>-		if (adapter-&gt;link_duplex == DUPLEX_FULL)</div><div class='del'>-			mac_ctrl_data |= MAC_CTRL_DUPLX;</div><div class='del'>-</div><div class='del'>-		/* turn on magic packet wol */</div><div class='del'>-		if (wufc &amp; AT_WUFC_MAG)</div><div class='del'>-			wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;</div><div class='del'>-</div><div class='del'>-		if (wufc &amp; AT_WUFC_LNKC) {</div><div class='del'>-			wol_ctrl_data |=  WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;</div><div class='del'>-			/* only link up can wake up */</div><div class='del'>-			if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {</div><div class='del'>-				dev_dbg(&amp;pdev-&gt;dev, "%s: read write phy "</div><div class='del'>-						  "register failed.\n",</div><div class='del'>-						  atl1c_driver_name);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		/* clear phy interrupt */</div><div class='del'>-		atl1c_read_phy_reg(hw, MII_ISR, &amp;mii_intr_status_data);</div><div class='del'>-		/* Config MAC Ctrl register */</div><div class='del'>-		__atl1c_vlan_mode(netdev-&gt;features, &amp;mac_ctrl_data);</div><div class='del'>-</div><div class='del'>-		/* magic packet maybe Broadcast&amp;multicast&amp;Unicast frame */</div><div class='del'>-		if (wufc &amp; AT_WUFC_MAG)</div><div class='del'>-			mac_ctrl_data |= MAC_CTRL_BC_EN;</div><div class='del'>-</div><div class='del'>-		dev_dbg(&amp;pdev-&gt;dev,</div><div class='del'>-			"%s: suspend MAC=0x%x\n",</div><div class='del'>-			atl1c_driver_name, mac_ctrl_data);</div><div class='del'>-		AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);</div><div class='del'>-		AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);</div><div class='del'>-		AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);</div><div class='del'>-</div><div class='del'>-		AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT |</div><div class='del'>-			GPHY_CTRL_EXT_RESET);</div><div class='del'>-	} else {</div><div class='del'>-		AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING);</div><div class='del'>-		master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS;</div><div class='del'>-		mac_ctrl_data |= atl1c_mac_speed_10_100 &lt;&lt; MAC_CTRL_SPEED_SHIFT;</div><div class='del'>-		mac_ctrl_data |= MAC_CTRL_DUPLX;</div><div class='del'>-		AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);</div><div class='del'>-		AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);</div><div class='del'>-		AT_WRITE_REG(hw, REG_WOL_CTRL, 0);</div><div class='del'>-		hw-&gt;phy_configured = false; /* re-init PHY when resume */</div><div class='del'>-	}</div><div class='add'>+	atl1c_power_saving(hw, wufc);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2562,8 +2365,7 @@ static int atl1c_resume(struct device *dev)</div><div class='ctx'> 	struct atl1c_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	AT_WRITE_REG(&amp;adapter-&gt;hw, REG_WOL_CTRL, 0);</div><div class='del'>-	atl1c_reset_pcie(&amp;adapter-&gt;hw, ATL1C_PCIE_L0S_L1_DISABLE |</div><div class='del'>-			ATL1C_PCIE_PHY_RESET);</div><div class='add'>+	atl1c_reset_pcie(&amp;adapter-&gt;hw, ATL1C_PCIE_L0S_L1_DISABLE);</div><div class='ctx'> </div><div class='ctx'> 	atl1c_phy_reset(&amp;adapter-&gt;hw);</div><div class='ctx'> 	atl1c_reset_mac(&amp;adapter-&gt;hw);</div><div class='hunk'>@@ -2616,7 +2418,6 @@ static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='ctx'> 	pci_set_drvdata(pdev, netdev);</div><div class='ctx'> </div><div class='del'>-	netdev-&gt;irq  = pdev-&gt;irq;</div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;atl1c_netdev_ops;</div><div class='ctx'> 	netdev-&gt;watchdog_timeo = AT_TX_WATCHDOG;</div><div class='ctx'> 	atl1c_set_ethtool_ops(netdev);</div><div class='hunk'>@@ -2706,14 +2507,13 @@ static int __devinit atl1c_probe(struct pci_dev *pdev,</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "cannot map device registers\n");</div><div class='ctx'> 		goto err_ioremap;</div><div class='ctx'> 	}</div><div class='del'>-	netdev-&gt;base_addr = (unsigned long)adapter-&gt;hw.hw_addr;</div><div class='ctx'> </div><div class='ctx'> 	/* init mii data */</div><div class='ctx'> 	adapter-&gt;mii.dev = netdev;</div><div class='ctx'> 	adapter-&gt;mii.mdio_read  = atl1c_mdio_read;</div><div class='ctx'> 	adapter-&gt;mii.mdio_write = atl1c_mdio_write;</div><div class='ctx'> 	adapter-&gt;mii.phy_id_mask = 0x1f;</div><div class='del'>-	adapter-&gt;mii.reg_num_mask = MDIO_REG_ADDR_MASK;</div><div class='add'>+	adapter-&gt;mii.reg_num_mask = MDIO_CTRL_REG_MASK;</div><div class='ctx'> 	netif_napi_add(netdev, &amp;adapter-&gt;napi, atl1c_clean, 64);</div><div class='ctx'> 	setup_timer(&amp;adapter-&gt;phy_config_timer, atl1c_phy_config,</div><div class='ctx'> 			(unsigned long)adapter);</div><div class='hunk'>@@ -2723,8 +2523,7 @@ static int __devinit atl1c_probe(struct pci_dev *pdev,</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "net device private data init failed\n");</div><div class='ctx'> 		goto err_sw_init;</div><div class='ctx'> 	}</div><div class='del'>-	atl1c_reset_pcie(&amp;adapter-&gt;hw, ATL1C_PCIE_L0S_L1_DISABLE |</div><div class='del'>-			ATL1C_PCIE_PHY_RESET);</div><div class='add'>+	atl1c_reset_pcie(&amp;adapter-&gt;hw, ATL1C_PCIE_L0S_L1_DISABLE);</div><div class='ctx'> </div><div class='ctx'> 	/* Init GPHY as early as possible due to power saving issue  */</div><div class='ctx'> 	atl1c_phy_reset(&amp;adapter-&gt;hw);</div><div class='hunk'>@@ -2752,7 +2551,7 @@ static int __devinit atl1c_probe(struct pci_dev *pdev,</div><div class='ctx'> 		dev_dbg(&amp;pdev-&gt;dev, "mac address : %pM\n",</div><div class='ctx'> 			adapter-&gt;hw.mac_addr);</div><div class='ctx'> </div><div class='del'>-	atl1c_hw_set_mac_addr(&amp;adapter-&gt;hw);</div><div class='add'>+	atl1c_hw_set_mac_addr(&amp;adapter-&gt;hw, adapter-&gt;hw.mac_addr);</div><div class='ctx'> 	INIT_WORK(&amp;adapter-&gt;common_task, atl1c_common_task);</div><div class='ctx'> 	adapter-&gt;work_event = 0;</div><div class='ctx'> 	err = register_netdev(netdev);</div><div class='hunk'>@@ -2796,6 +2595,8 @@ static void __devexit atl1c_remove(struct pci_dev *pdev)</div><div class='ctx'> 	struct atl1c_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(netdev);</div><div class='add'>+	/* restore permanent address */</div><div class='add'>+	atl1c_hw_set_mac_addr(&amp;adapter-&gt;hw, adapter-&gt;hw.perm_mac_addr);</div><div class='ctx'> 	atl1c_phy_disable(&amp;adapter-&gt;hw);</div><div class='ctx'> </div><div class='ctx'> 	iounmap(adapter-&gt;hw.hw_addr);</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atl1e/atl1e_main.c b/drivers/net/ethernet/atheros/atl1e/atl1e_main.c<br/>index 93ff2b231284..1220e511ced6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atl1e/atl1e_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/atheros/atl1e/atl1e_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atl1e/atl1e_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atl1e/atl1e_main.c</a></div><div class='hunk'>@@ -1883,27 +1883,24 @@ static int atl1e_request_irq(struct atl1e_adapter *adapter)</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;have_msi = true;</div><div class='del'>-	err = pci_enable_msi(adapter-&gt;pdev);</div><div class='add'>+	err = pci_enable_msi(pdev);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netdev_dbg(adapter-&gt;netdev,</div><div class='add'>+		netdev_dbg(netdev,</div><div class='ctx'> 			   "Unable to allocate MSI interrupt Error: %d\n", err);</div><div class='ctx'> 		adapter-&gt;have_msi = false;</div><div class='del'>-	} else</div><div class='del'>-		netdev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!adapter-&gt;have_msi)</div><div class='ctx'> 		flags |= IRQF_SHARED;</div><div class='del'>-	err = request_irq(adapter-&gt;pdev-&gt;irq, atl1e_intr, flags,</div><div class='del'>-			netdev-&gt;name, netdev);</div><div class='add'>+	err = request_irq(pdev-&gt;irq, atl1e_intr, flags, netdev-&gt;name, netdev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		netdev_dbg(adapter-&gt;netdev,</div><div class='ctx'> 			   "Unable to allocate interrupt Error: %d\n", err);</div><div class='ctx'> 		if (adapter-&gt;have_msi)</div><div class='del'>-			pci_disable_msi(adapter-&gt;pdev);</div><div class='add'>+			pci_disable_msi(pdev);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='del'>-	netdev_dbg(adapter-&gt;netdev, "atl1e_request_irq OK\n");</div><div class='add'>+	netdev_dbg(netdev, "atl1e_request_irq OK\n");</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2233,7 +2230,6 @@ static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='ctx'> 	pci_set_drvdata(pdev, netdev);</div><div class='ctx'> </div><div class='del'>-	netdev-&gt;irq  = pdev-&gt;irq;</div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;atl1e_netdev_ops;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;watchdog_timeo = AT_TX_WATCHDOG;</div><div class='hunk'>@@ -2319,7 +2315,6 @@ static int __devinit atl1e_probe(struct pci_dev *pdev,</div><div class='ctx'> 		netdev_err(netdev, "cannot map device registers\n");</div><div class='ctx'> 		goto err_ioremap;</div><div class='ctx'> 	}</div><div class='del'>-	netdev-&gt;base_addr = (unsigned long)adapter-&gt;hw.hw_addr;</div><div class='ctx'> </div><div class='ctx'> 	/* init mii data */</div><div class='ctx'> 	adapter-&gt;mii.dev = netdev;</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atlx/atl1.c b/drivers/net/ethernet/atheros/atlx/atl1.c<br/>index c926857e8205..5d10884e5080 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atlx/atl1.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/atheros/atlx/atl1.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atlx/atl1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atlx/atl1.c</a></div><div class='hunk'>@@ -266,7 +266,7 @@ static s32 atl1_reset_hw(struct atl1_hw *hw)</div><div class='ctx'> 	 * interrupts &amp; Clear any pending interrupt events</div><div class='ctx'> 	 */</div><div class='ctx'> 	/*</div><div class='del'>-	 * iowrite32(0, hw-&gt;hw_addr + REG_IMR);</div><div class='add'>+	 * atlx_irq_disable(adapter);</div><div class='ctx'> 	 * iowrite32(0xffffffff, hw-&gt;hw_addr + REG_ISR);</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='hunk'>@@ -1917,7 +1917,7 @@ next:</div><div class='ctx'> 	return num_alloc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void atl1_intr_rx(struct atl1_adapter *adapter)</div><div class='add'>+static int atl1_intr_rx(struct atl1_adapter *adapter, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	int i, count;</div><div class='ctx'> 	u16 length;</div><div class='hunk'>@@ -1933,7 +1933,7 @@ static void atl1_intr_rx(struct atl1_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	rrd_next_to_clean = atomic_read(&amp;rrd_ring-&gt;next_to_clean);</div><div class='ctx'> </div><div class='del'>-	while (1) {</div><div class='add'>+	while (count &lt; budget) {</div><div class='ctx'> 		rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);</div><div class='ctx'> 		i = 1;</div><div class='ctx'> 		if (likely(rrd-&gt;xsz.valid)) {	/* packet valid */</div><div class='hunk'>@@ -2032,7 +2032,7 @@ rrd_ok:</div><div class='ctx'> </div><div class='ctx'> 			__vlan_hwaccel_put_tag(skb, vlan_tag);</div><div class='ctx'> 		}</div><div class='del'>-		netif_rx(skb);</div><div class='add'>+		netif_receive_skb(skb);</div><div class='ctx'> </div><div class='ctx'> 		/* let protocol layer free skb */</div><div class='ctx'> 		buffer_info-&gt;skb = NULL;</div><div class='hunk'>@@ -2065,14 +2065,17 @@ rrd_ok:</div><div class='ctx'> 		iowrite32(value, adapter-&gt;hw.hw_addr + REG_MAILBOX);</div><div class='ctx'> 		spin_unlock(&amp;adapter-&gt;mb_lock);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void atl1_intr_tx(struct atl1_adapter *adapter)</div><div class='add'>+static int atl1_intr_tx(struct atl1_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1_tpd_ring *tpd_ring = &amp;adapter-&gt;tpd_ring;</div><div class='ctx'> 	struct atl1_buffer *buffer_info;</div><div class='ctx'> 	u16 sw_tpd_next_to_clean;</div><div class='ctx'> 	u16 cmb_tpd_next_to_clean;</div><div class='add'>+	int count = 0;</div><div class='ctx'> </div><div class='ctx'> 	sw_tpd_next_to_clean = atomic_read(&amp;tpd_ring-&gt;next_to_clean);</div><div class='ctx'> 	cmb_tpd_next_to_clean = le16_to_cpu(adapter-&gt;cmb.cmb-&gt;tpd_cons_idx);</div><div class='hunk'>@@ -2092,12 +2095,16 @@ static void atl1_intr_tx(struct atl1_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 		if (++sw_tpd_next_to_clean == tpd_ring-&gt;count)</div><div class='ctx'> 			sw_tpd_next_to_clean = 0;</div><div class='add'>+</div><div class='add'>+		count++;</div><div class='ctx'> 	}</div><div class='ctx'> 	atomic_set(&amp;tpd_ring-&gt;next_to_clean, sw_tpd_next_to_clean);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_queue_stopped(adapter-&gt;netdev) &amp;&amp;</div><div class='ctx'> 	    netif_carrier_ok(adapter-&gt;netdev))</div><div class='ctx'> 		netif_wake_queue(adapter-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)</div><div class='hunk'>@@ -2439,6 +2446,49 @@ static netdev_tx_t atl1_xmit_frame(struct sk_buff *skb,</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int atl1_rings_clean(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct atl1_adapter *adapter = container_of(napi, struct atl1_adapter, napi);</div><div class='add'>+	int work_done = atl1_intr_rx(adapter, budget);</div><div class='add'>+</div><div class='add'>+	if (atl1_intr_tx(adapter))</div><div class='add'>+		work_done = budget;</div><div class='add'>+</div><div class='add'>+	/* Let's come again to process some more packets */</div><div class='add'>+	if (work_done &gt;= budget)</div><div class='add'>+		return work_done;</div><div class='add'>+</div><div class='add'>+	napi_complete(napi);</div><div class='add'>+	/* re-enable Interrupt */</div><div class='add'>+	if (likely(adapter-&gt;int_enabled))</div><div class='add'>+		atlx_imr_set(adapter, IMR_NORMAL_MASK);</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int atl1_sched_rings_clean(struct atl1_adapter* adapter)</div><div class='add'>+{</div><div class='add'>+	if (!napi_schedule_prep(&amp;adapter-&gt;napi))</div><div class='add'>+		/* It is possible in case even the RX/TX ints are disabled via IMR</div><div class='add'>+		 * register the ISR bits are set anyway (but do not produce IRQ).</div><div class='add'>+		 * To handle such situation the napi functions used to check is</div><div class='add'>+		 * something scheduled or not.</div><div class='add'>+		 */</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	__napi_schedule(&amp;adapter-&gt;napi);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable RX/TX ints via IMR register if it is</div><div class='add'>+	 * allowed. NAPI handler must reenable them in same</div><div class='add'>+	 * way.</div><div class='add'>+	 */</div><div class='add'>+	if (!adapter-&gt;int_enabled)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	atlx_imr_set(adapter, IMR_NORXTX_MASK);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * atl1_intr - Interrupt Handler</div><div class='ctx'>  * @irq: interrupt number</div><div class='hunk'>@@ -2449,78 +2499,74 @@ static irqreturn_t atl1_intr(int irq, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1_adapter *adapter = netdev_priv(data);</div><div class='ctx'> 	u32 status;</div><div class='del'>-	int max_ints = 10;</div><div class='ctx'> </div><div class='ctx'> 	status = adapter-&gt;cmb.cmb-&gt;int_stats;</div><div class='ctx'> 	if (!status)</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='del'>-	do {</div><div class='del'>-		/* clear CMB interrupt status at once */</div><div class='del'>-		adapter-&gt;cmb.cmb-&gt;int_stats = 0;</div><div class='del'>-</div><div class='del'>-		if (status &amp; ISR_GPHY)	/* clear phy status */</div><div class='del'>-			atlx_clear_phy_int(adapter);</div><div class='add'>+	/* clear CMB interrupt status at once,</div><div class='add'>+	 * but leave rx/tx interrupt status in case it should be dropped</div><div class='add'>+	 * only if rx/tx processing queued. In other case interrupt</div><div class='add'>+	 * can be lost.</div><div class='add'>+	 */</div><div class='add'>+	adapter-&gt;cmb.cmb-&gt;int_stats = status &amp; (ISR_CMB_TX | ISR_CMB_RX);</div><div class='ctx'> </div><div class='del'>-		/* clear ISR status, and Enable CMB DMA/Disable Interrupt */</div><div class='del'>-		iowrite32(status | ISR_DIS_INT, adapter-&gt;hw.hw_addr + REG_ISR);</div><div class='add'>+	if (status &amp; ISR_GPHY)	/* clear phy status */</div><div class='add'>+		atlx_clear_phy_int(adapter);</div><div class='ctx'> </div><div class='del'>-		/* check if SMB intr */</div><div class='del'>-		if (status &amp; ISR_SMB)</div><div class='del'>-			atl1_inc_smb(adapter);</div><div class='add'>+	/* clear ISR status, and Enable CMB DMA/Disable Interrupt */</div><div class='add'>+	iowrite32(status | ISR_DIS_INT, adapter-&gt;hw.hw_addr + REG_ISR);</div><div class='ctx'> </div><div class='del'>-		/* check if PCIE PHY Link down */</div><div class='del'>-		if (status &amp; ISR_PHY_LINKDOWN) {</div><div class='del'>-			if (netif_msg_intr(adapter))</div><div class='del'>-				dev_printk(KERN_DEBUG, &amp;adapter-&gt;pdev-&gt;dev,</div><div class='del'>-					"pcie phy link down %x\n", status);</div><div class='del'>-			if (netif_running(adapter-&gt;netdev)) {	/* reset MAC */</div><div class='del'>-				iowrite32(0, adapter-&gt;hw.hw_addr + REG_IMR);</div><div class='del'>-				schedule_work(&amp;adapter-&gt;reset_dev_task);</div><div class='del'>-				return IRQ_HANDLED;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+	/* check if SMB intr */</div><div class='add'>+	if (status &amp; ISR_SMB)</div><div class='add'>+		atl1_inc_smb(adapter);</div><div class='ctx'> </div><div class='del'>-		/* check if DMA read/write error ? */</div><div class='del'>-		if (status &amp; (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {</div><div class='del'>-			if (netif_msg_intr(adapter))</div><div class='del'>-				dev_printk(KERN_DEBUG, &amp;adapter-&gt;pdev-&gt;dev,</div><div class='del'>-					"pcie DMA r/w error (status = 0x%x)\n",</div><div class='del'>-					status);</div><div class='del'>-			iowrite32(0, adapter-&gt;hw.hw_addr + REG_IMR);</div><div class='add'>+	/* check if PCIE PHY Link down */</div><div class='add'>+	if (status &amp; ISR_PHY_LINKDOWN) {</div><div class='add'>+		if (netif_msg_intr(adapter))</div><div class='add'>+			dev_printk(KERN_DEBUG, &amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				"pcie phy link down %x\n", status);</div><div class='add'>+		if (netif_running(adapter-&gt;netdev)) {	/* reset MAC */</div><div class='add'>+			atlx_irq_disable(adapter);</div><div class='ctx'> 			schedule_work(&amp;adapter-&gt;reset_dev_task);</div><div class='ctx'> 			return IRQ_HANDLED;</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* link event */</div><div class='del'>-		if (status &amp; ISR_GPHY) {</div><div class='del'>-			adapter-&gt;soft_stats.tx_carrier_errors++;</div><div class='del'>-			atl1_check_for_link(adapter);</div><div class='del'>-		}</div><div class='add'>+	/* check if DMA read/write error ? */</div><div class='add'>+	if (status &amp; (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {</div><div class='add'>+		if (netif_msg_intr(adapter))</div><div class='add'>+			dev_printk(KERN_DEBUG, &amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				"pcie DMA r/w error (status = 0x%x)\n",</div><div class='add'>+				status);</div><div class='add'>+		atlx_irq_disable(adapter);</div><div class='add'>+		schedule_work(&amp;adapter-&gt;reset_dev_task);</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* transmit event */</div><div class='del'>-		if (status &amp; ISR_CMB_TX)</div><div class='del'>-			atl1_intr_tx(adapter);</div><div class='del'>-</div><div class='del'>-		/* rx exception */</div><div class='del'>-		if (unlikely(status &amp; (ISR_RXF_OV | ISR_RFD_UNRUN |</div><div class='del'>-			ISR_RRD_OV | ISR_HOST_RFD_UNRUN |</div><div class='del'>-			ISR_HOST_RRD_OV | ISR_CMB_RX))) {</div><div class='del'>-			if (status &amp; (ISR_RXF_OV | ISR_RFD_UNRUN |</div><div class='del'>-				ISR_RRD_OV | ISR_HOST_RFD_UNRUN |</div><div class='del'>-				ISR_HOST_RRD_OV))</div><div class='del'>-				if (netif_msg_intr(adapter))</div><div class='del'>-					dev_printk(KERN_DEBUG,</div><div class='del'>-						&amp;adapter-&gt;pdev-&gt;dev,</div><div class='del'>-						"rx exception, ISR = 0x%x\n",</div><div class='del'>-						status);</div><div class='del'>-			atl1_intr_rx(adapter);</div><div class='del'>-		}</div><div class='add'>+	/* link event */</div><div class='add'>+	if (status &amp; ISR_GPHY) {</div><div class='add'>+		adapter-&gt;soft_stats.tx_carrier_errors++;</div><div class='add'>+		atl1_check_for_link(adapter);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (--max_ints &lt; 0)</div><div class='del'>-			break;</div><div class='add'>+	/* transmit or receive event */</div><div class='add'>+	if (status &amp; (ISR_CMB_TX | ISR_CMB_RX) &amp;&amp;</div><div class='add'>+	    atl1_sched_rings_clean(adapter))</div><div class='add'>+		adapter-&gt;cmb.cmb-&gt;int_stats = adapter-&gt;cmb.cmb-&gt;int_stats &amp;</div><div class='add'>+					      ~(ISR_CMB_TX | ISR_CMB_RX);</div><div class='ctx'> </div><div class='del'>-	} while ((status = adapter-&gt;cmb.cmb-&gt;int_stats));</div><div class='add'>+	/* rx exception */</div><div class='add'>+	if (unlikely(status &amp; (ISR_RXF_OV | ISR_RFD_UNRUN |</div><div class='add'>+		ISR_RRD_OV | ISR_HOST_RFD_UNRUN |</div><div class='add'>+		ISR_HOST_RRD_OV))) {</div><div class='add'>+		if (netif_msg_intr(adapter))</div><div class='add'>+			dev_printk(KERN_DEBUG,</div><div class='add'>+				&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				"rx exception, ISR = 0x%x\n",</div><div class='add'>+				status);</div><div class='add'>+		atl1_sched_rings_clean(adapter);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* re-enable Interrupt */</div><div class='ctx'> 	iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter-&gt;hw.hw_addr + REG_ISR);</div><div class='hunk'>@@ -2599,6 +2645,7 @@ static s32 atl1_up(struct atl1_adapter *adapter)</div><div class='ctx'> 	if (unlikely(err))</div><div class='ctx'> 		goto err_up;</div><div class='ctx'> </div><div class='add'>+	napi_enable(&amp;adapter-&gt;napi);</div><div class='ctx'> 	atlx_irq_enable(adapter);</div><div class='ctx'> 	atl1_check_link(adapter);</div><div class='ctx'> 	netif_start_queue(netdev);</div><div class='hunk'>@@ -2615,6 +2662,7 @@ static void atl1_down(struct atl1_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = adapter-&gt;netdev;</div><div class='ctx'> </div><div class='add'>+	napi_disable(&amp;adapter-&gt;napi);</div><div class='ctx'> 	netif_stop_queue(netdev);</div><div class='ctx'> 	del_timer_sync(&amp;adapter-&gt;phy_config_timer);</div><div class='ctx'> 	adapter-&gt;phy_timer_pending = false;</div><div class='hunk'>@@ -2971,6 +3019,7 @@ static int __devinit atl1_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;atl1_netdev_ops;</div><div class='ctx'> 	netdev-&gt;watchdog_timeo = 5 * HZ;</div><div class='add'>+	netif_napi_add(netdev, &amp;adapter-&gt;napi, atl1_rings_clean, 64);</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;ethtool_ops = &amp;atl1_ethtool_ops;</div><div class='ctx'> 	adapter-&gt;bd_number = cards_found;</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atlx/atl1.h b/drivers/net/ethernet/atheros/atlx/atl1.h<br/>index e04bf4d71e46..3bf79a56220d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atlx/atl1.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/atheros/atlx/atl1.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atlx/atl1.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atlx/atl1.h</a></div><div class='hunk'>@@ -275,13 +275,17 @@ static u32 atl1_check_link(struct atl1_adapter *adapter);</div><div class='ctx'> #define ISR_DIS_SMB				0x20000000</div><div class='ctx'> #define ISR_DIS_DMA				0x40000000</div><div class='ctx'> </div><div class='del'>-/* Normal Interrupt mask  */</div><div class='del'>-#define IMR_NORMAL_MASK	(\</div><div class='add'>+/* Normal Interrupt mask without RX/TX enabled */</div><div class='add'>+#define IMR_NORXTX_MASK	(\</div><div class='ctx'> 	ISR_SMB		|\</div><div class='ctx'> 	ISR_GPHY	|\</div><div class='ctx'> 	ISR_PHY_LINKDOWN|\</div><div class='ctx'> 	ISR_DMAR_TO_RST	|\</div><div class='del'>-	ISR_DMAW_TO_RST	|\</div><div class='add'>+	ISR_DMAW_TO_RST)</div><div class='add'>+</div><div class='add'>+/* Normal Interrupt mask  */</div><div class='add'>+#define IMR_NORMAL_MASK	(\</div><div class='add'>+	IMR_NORXTX_MASK	|\</div><div class='ctx'> 	ISR_CMB_TX	|\</div><div class='ctx'> 	ISR_CMB_RX)</div><div class='ctx'> </div><div class='hunk'>@@ -758,6 +762,7 @@ struct atl1_adapter {</div><div class='ctx'> 	u16 link_speed;</div><div class='ctx'> 	u16 link_duplex;</div><div class='ctx'> 	spinlock_t lock;</div><div class='add'>+	struct napi_struct napi;</div><div class='ctx'> 	struct work_struct reset_dev_task;</div><div class='ctx'> 	struct work_struct link_chg_task;</div><div class='ctx'> </div><div class='hunk'>@@ -781,6 +786,12 @@ struct atl1_adapter {</div><div class='ctx'> 	u16 ict;		/* interrupt clear timer (2us resolution */</div><div class='ctx'> 	struct mii_if_info mii;	/* MII interface info */</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Use this value to check is napi handler allowed to</div><div class='add'>+	 * enable ints or not</div><div class='add'>+	 */</div><div class='add'>+	bool int_enabled;</div><div class='add'>+</div><div class='ctx'> 	u32 bd_number;		/* board number */</div><div class='ctx'> 	bool pci_using_64;</div><div class='ctx'> 	struct atl1_hw hw;</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atlx/atlx.c b/drivers/net/ethernet/atheros/atlx/atlx.c<br/>index c9e9dc57986c..b4f3aa49a7fc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atlx/atlx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/atheros/atlx/atlx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/atheros/atlx/atlx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/atheros/atlx/atlx.c</a></div><div class='hunk'>@@ -155,14 +155,21 @@ static void atlx_set_multi(struct net_device *netdev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void atlx_imr_set(struct atlx_adapter *adapter,</div><div class='add'>+				unsigned int imr)</div><div class='add'>+{</div><div class='add'>+	iowrite32(imr, adapter-&gt;hw.hw_addr + REG_IMR);</div><div class='add'>+	ioread32(adapter-&gt;hw.hw_addr + REG_IMR);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * atlx_irq_enable - Enable default interrupt generation settings</div><div class='ctx'>  * @adapter: board private structure</div><div class='ctx'>  */</div><div class='ctx'> static void atlx_irq_enable(struct atlx_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	iowrite32(IMR_NORMAL_MASK, adapter-&gt;hw.hw_addr + REG_IMR);</div><div class='del'>-	ioread32(adapter-&gt;hw.hw_addr + REG_IMR);</div><div class='add'>+	atlx_imr_set(adapter, IMR_NORMAL_MASK);</div><div class='add'>+	adapter-&gt;int_enabled = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -171,8 +178,8 @@ static void atlx_irq_enable(struct atlx_adapter *adapter)</div><div class='ctx'>  */</div><div class='ctx'> static void atlx_irq_disable(struct atlx_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	iowrite32(0, adapter-&gt;hw.hw_addr + REG_IMR);</div><div class='del'>-	ioread32(adapter-&gt;hw.hw_addr + REG_IMR);</div><div class='add'>+	adapter-&gt;int_enabled = false;</div><div class='add'>+	atlx_imr_set(adapter, 0);</div><div class='ctx'> 	synchronize_irq(adapter-&gt;pdev-&gt;irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2.c b/drivers/net/ethernet/broadcom/bnx2.c<br/>index 8297e2868736..ac7b74488531 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2.c</a></div><div class='hunk'>@@ -3006,7 +3006,7 @@ error:</div><div class='ctx'> </div><div class='ctx'> 	dma_unmap_single(&amp;bp-&gt;pdev-&gt;dev, dma_addr, bp-&gt;rx_buf_use_size,</div><div class='ctx'> 			 PCI_DMA_FROMDEVICE);</div><div class='del'>-	skb = build_skb(data);</div><div class='add'>+	skb = build_skb(data, 0);</div><div class='ctx'> 	if (!skb) {</div><div class='ctx'> 		kfree(data);</div><div class='ctx'> 		goto error;</div><div class='hunk'>@@ -7343,8 +7343,7 @@ static struct {</div><div class='ctx'> 	{ "rx_fw_discards" },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define BNX2_NUM_STATS (sizeof(bnx2_stats_str_arr)/\</div><div class='del'>-			sizeof(bnx2_stats_str_arr[0]))</div><div class='add'>+#define BNX2_NUM_STATS ARRAY_SIZE(bnx2_stats_str_arr)</div><div class='ctx'> </div><div class='ctx'> #define STATS_OFFSET32(offset_name) (offsetof(struct statistics_block, offset_name) / 4)</div><div class='ctx'> </div><div class='hunk'>@@ -7976,7 +7975,6 @@ static int __devinit</div><div class='ctx'> bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2 *bp;</div><div class='del'>-	unsigned long mem_len;</div><div class='ctx'> 	int rc, i, j;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> 	u64 dma_mask, persist_dma_mask;</div><div class='hunk'>@@ -8036,13 +8034,8 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)</div><div class='ctx'> #endif</div><div class='ctx'> 	INIT_WORK(&amp;bp-&gt;reset_task, bnx2_reset_task);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = dev-&gt;mem_start = pci_resource_start(pdev, 0);</div><div class='del'>-	mem_len = MB_GET_CID_ADDR(TX_TSS_CID + TX_MAX_TSS_RINGS + 1);</div><div class='del'>-	dev-&gt;mem_end = dev-&gt;mem_start + mem_len;</div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-</div><div class='del'>-	bp-&gt;regview = ioremap_nocache(dev-&gt;base_addr, mem_len);</div><div class='del'>-</div><div class='add'>+	bp-&gt;regview = pci_iomap(pdev, 0, MB_GET_CID_ADDR(TX_TSS_CID +</div><div class='add'>+							 TX_MAX_TSS_RINGS + 1));</div><div class='ctx'> 	if (!bp-&gt;regview) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Cannot map register space, aborting\n");</div><div class='ctx'> 		rc = -ENOMEM;</div><div class='hunk'>@@ -8346,10 +8339,8 @@ err_out_unmap:</div><div class='ctx'> 		bp-&gt;flags &amp;= ~BNX2_FLAG_AER_ENABLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (bp-&gt;regview) {</div><div class='del'>-		iounmap(bp-&gt;regview);</div><div class='del'>-		bp-&gt;regview = NULL;</div><div class='del'>-	}</div><div class='add'>+	pci_iounmap(pdev, bp-&gt;regview);</div><div class='add'>+	bp-&gt;regview = NULL;</div><div class='ctx'> </div><div class='ctx'> err_out_release:</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='hunk'>@@ -8432,7 +8423,7 @@ static int __devinit</div><div class='ctx'> bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='ctx'> 	static int version_printed = 0;</div><div class='del'>-	struct net_device *dev = NULL;</div><div class='add'>+	struct net_device *dev;</div><div class='ctx'> 	struct bnx2 *bp;</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	char str[40];</div><div class='hunk'>@@ -8442,15 +8433,12 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	/* dev zeroed in init_etherdev */</div><div class='ctx'> 	dev = alloc_etherdev_mq(sizeof(*bp), TX_MAX_RINGS);</div><div class='del'>-</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	rc = bnx2_init_board(pdev, dev);</div><div class='del'>-	if (rc &lt; 0) {</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-		return rc;</div><div class='del'>-	}</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto err_free;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;bnx2_netdev_ops;</div><div class='ctx'> 	dev-&gt;watchdog_timeo = TX_TIMEOUT;</div><div class='hunk'>@@ -8480,22 +8468,21 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netdev_info(dev, "%s (%c%d) %s found at mem %lx, IRQ %d, node addr %pM\n",</div><div class='del'>-		    board_info[ent-&gt;driver_data].name,</div><div class='add'>+	netdev_info(dev, "%s (%c%d) %s found at mem %lx, IRQ %d, "</div><div class='add'>+		    "node addr %pM\n", board_info[ent-&gt;driver_data].name,</div><div class='ctx'> 		    ((CHIP_ID(bp) &amp; 0xf000) &gt;&gt; 12) + 'A',</div><div class='ctx'> 		    ((CHIP_ID(bp) &amp; 0x0ff0) &gt;&gt; 4),</div><div class='del'>-		    bnx2_bus_string(bp, str),</div><div class='del'>-		    dev-&gt;base_addr,</div><div class='del'>-		    bp-&gt;pdev-&gt;irq, dev-&gt;dev_addr);</div><div class='add'>+		    bnx2_bus_string(bp, str), (long)pci_resource_start(pdev, 0),</div><div class='add'>+		    pdev-&gt;irq, dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='del'>-	if (bp-&gt;regview)</div><div class='del'>-		iounmap(bp-&gt;regview);</div><div class='add'>+	iounmap(bp-&gt;regview);</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='add'>+err_free:</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='hunk'>@@ -8511,8 +8498,7 @@ bnx2_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 	del_timer_sync(&amp;bp-&gt;timer);</div><div class='ctx'> 	cancel_work_sync(&amp;bp-&gt;reset_task);</div><div class='ctx'> </div><div class='del'>-	if (bp-&gt;regview)</div><div class='del'>-		iounmap(bp-&gt;regview);</div><div class='add'>+	pci_iounmap(bp-&gt;pdev, bp-&gt;regview);</div><div class='ctx'> </div><div class='ctx'> 	kfree(bp-&gt;temp_stats_blk);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h<br/>index 2c9ee552dffc..e30e2a2f354c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x.h</a></div><div class='hunk'>@@ -23,13 +23,17 @@</div><div class='ctx'>  * (you will need to reboot afterwards) */</div><div class='ctx'> /* #define BNX2X_STOP_ON_ERROR */</div><div class='ctx'> </div><div class='del'>-#define DRV_MODULE_VERSION      "1.72.10-0"</div><div class='del'>-#define DRV_MODULE_RELDATE      "2012/02/20"</div><div class='add'>+#define DRV_MODULE_VERSION      "1.72.50-0"</div><div class='add'>+#define DRV_MODULE_RELDATE      "2012/04/23"</div><div class='ctx'> #define BNX2X_BC_VER            0x040200</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_DCB)</div><div class='ctx'> #define BCM_DCBNL</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#include "bnx2x_hsi.h"</div><div class='add'>+</div><div class='ctx'> #if defined(CONFIG_CNIC) || defined(CONFIG_CNIC_MODULE)</div><div class='ctx'> #define BCM_CNIC 1</div><div class='ctx'> #include "../cnic_if.h"</div><div class='hunk'>@@ -345,7 +349,6 @@ union db_prod {</div><div class='ctx'> #define SGE_PAGE_SIZE		PAGE_SIZE</div><div class='ctx'> #define SGE_PAGE_SHIFT		PAGE_SHIFT</div><div class='ctx'> #define SGE_PAGE_ALIGN(addr)	PAGE_ALIGN((typeof(PAGE_SIZE))(addr))</div><div class='del'>-#define SGE_PAGES		(SGE_PAGE_SIZE * PAGES_PER_SGE)</div><div class='ctx'> </div><div class='ctx'> /* SGE ring related macros */</div><div class='ctx'> #define NUM_RX_SGE_PAGES	2</div><div class='hunk'>@@ -815,6 +818,8 @@ struct bnx2x_common {</div><div class='ctx'> #define CHIP_NUM_57800_MF		0x16a5</div><div class='ctx'> #define CHIP_NUM_57810			0x168e</div><div class='ctx'> #define CHIP_NUM_57810_MF		0x16ae</div><div class='add'>+#define CHIP_NUM_57811			0x163d</div><div class='add'>+#define CHIP_NUM_57811_MF		0x163e</div><div class='ctx'> #define CHIP_NUM_57840			0x168d</div><div class='ctx'> #define CHIP_NUM_57840_MF		0x16ab</div><div class='ctx'> #define CHIP_IS_E1(bp)			(CHIP_NUM(bp) == CHIP_NUM_57710)</div><div class='hunk'>@@ -826,6 +831,8 @@ struct bnx2x_common {</div><div class='ctx'> #define CHIP_IS_57800_MF(bp)		(CHIP_NUM(bp) == CHIP_NUM_57800_MF)</div><div class='ctx'> #define CHIP_IS_57810(bp)		(CHIP_NUM(bp) == CHIP_NUM_57810)</div><div class='ctx'> #define CHIP_IS_57810_MF(bp)		(CHIP_NUM(bp) == CHIP_NUM_57810_MF)</div><div class='add'>+#define CHIP_IS_57811(bp)		(CHIP_NUM(bp) == CHIP_NUM_57811)</div><div class='add'>+#define CHIP_IS_57811_MF(bp)		(CHIP_NUM(bp) == CHIP_NUM_57811_MF)</div><div class='ctx'> #define CHIP_IS_57840(bp)		(CHIP_NUM(bp) == CHIP_NUM_57840)</div><div class='ctx'> #define CHIP_IS_57840_MF(bp)		(CHIP_NUM(bp) == CHIP_NUM_57840_MF)</div><div class='ctx'> #define CHIP_IS_E1H(bp)			(CHIP_IS_57711(bp) || \</div><div class='hunk'>@@ -836,6 +843,8 @@ struct bnx2x_common {</div><div class='ctx'> 					 CHIP_IS_57800_MF(bp) || \</div><div class='ctx'> 					 CHIP_IS_57810(bp) || \</div><div class='ctx'> 					 CHIP_IS_57810_MF(bp) || \</div><div class='add'>+					 CHIP_IS_57811(bp) || \</div><div class='add'>+					 CHIP_IS_57811_MF(bp) || \</div><div class='ctx'> 					 CHIP_IS_57840(bp) || \</div><div class='ctx'> 					 CHIP_IS_57840_MF(bp))</div><div class='ctx'> #define CHIP_IS_E1x(bp)			(CHIP_IS_E1((bp)) || CHIP_IS_E1H((bp)))</div><div class='hunk'>@@ -1053,6 +1062,13 @@ struct bnx2x_slowpath {</div><div class='ctx'> 		struct flow_control_configuration pfc_config;</div><div class='ctx'> 	} func_rdata;</div><div class='ctx'> </div><div class='add'>+	/* afex ramrod can not be a part of func_rdata union because these</div><div class='add'>+	 * events might arrive in parallel to other events from func_rdata.</div><div class='add'>+	 * Therefore, if they would have been defined in the same union,</div><div class='add'>+	 * data can get corrupted.</div><div class='add'>+	 */</div><div class='add'>+	struct afex_vif_list_ramrod_data func_afex_rdata;</div><div class='add'>+</div><div class='ctx'> 	/* used by dmae command executer */</div><div class='ctx'> 	struct dmae_command		dmae[MAX_DMAE_C];</div><div class='ctx'> </div><div class='hunk'>@@ -1169,6 +1185,7 @@ struct bnx2x_fw_stats_data {</div><div class='ctx'> enum {</div><div class='ctx'> 	BNX2X_SP_RTNL_SETUP_TC,</div><div class='ctx'> 	BNX2X_SP_RTNL_TX_TIMEOUT,</div><div class='add'>+	BNX2X_SP_RTNL_AFEX_F_UPDATE,</div><div class='ctx'> 	BNX2X_SP_RTNL_FAN_FAILURE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1222,7 +1239,6 @@ struct bnx2x {</div><div class='ctx'> #define ETH_MAX_JUMBO_PACKET_SIZE	9600</div><div class='ctx'> /* TCP with Timestamp Option (32) + IPv6 (40) */</div><div class='ctx'> #define ETH_MAX_TPA_HEADER_SIZE		72</div><div class='del'>-#define ETH_MIN_TPA_HEADER_SIZE		40</div><div class='ctx'> </div><div class='ctx'> 	/* Max supported alignment is 256 (8 shift) */</div><div class='ctx'> #define BNX2X_RX_ALIGN_SHIFT		min(8, L1_CACHE_SHIFT)</div><div class='hunk'>@@ -1300,6 +1316,7 @@ struct bnx2x {</div><div class='ctx'> #define NO_ISCSI_FLAG			(1 &lt;&lt; 14)</div><div class='ctx'> #define NO_FCOE_FLAG			(1 &lt;&lt; 15)</div><div class='ctx'> #define BC_SUPPORTS_PFC_STATS		(1 &lt;&lt; 17)</div><div class='add'>+#define USING_SINGLE_MSIX_FLAG		(1 &lt;&lt; 20)</div><div class='ctx'> </div><div class='ctx'> #define NO_ISCSI(bp)		((bp)-&gt;flags &amp; NO_ISCSI_FLAG)</div><div class='ctx'> #define NO_ISCSI_OOO(bp)	((bp)-&gt;flags &amp; NO_ISCSI_OOO_FLAG)</div><div class='hunk'>@@ -1329,21 +1346,20 @@ struct bnx2x {</div><div class='ctx'> 	struct bnx2x_common	common;</div><div class='ctx'> 	struct bnx2x_port	port;</div><div class='ctx'> </div><div class='del'>-	struct cmng_struct_per_port cmng;</div><div class='del'>-	u32			vn_weight_sum;</div><div class='add'>+	struct cmng_init	cmng;</div><div class='add'>+</div><div class='ctx'> 	u32			mf_config[E1HVN_MAX];</div><div class='del'>-	u32			mf2_config[E2_FUNC_MAX];</div><div class='add'>+	u32			mf_ext_config;</div><div class='ctx'> 	u32			path_has_ovlan; /* E3 */</div><div class='ctx'> 	u16			mf_ov;</div><div class='ctx'> 	u8			mf_mode;</div><div class='ctx'> #define IS_MF(bp)		(bp-&gt;mf_mode != 0)</div><div class='ctx'> #define IS_MF_SI(bp)		(bp-&gt;mf_mode == MULTI_FUNCTION_SI)</div><div class='ctx'> #define IS_MF_SD(bp)		(bp-&gt;mf_mode == MULTI_FUNCTION_SD)</div><div class='add'>+#define IS_MF_AFEX(bp)		(bp-&gt;mf_mode == MULTI_FUNCTION_AFEX)</div><div class='ctx'> </div><div class='ctx'> 	u8			wol;</div><div class='ctx'> </div><div class='del'>-	bool			gro_check;</div><div class='del'>-</div><div class='ctx'> 	int			rx_ring_size;</div><div class='ctx'> </div><div class='ctx'> 	u16			tx_quick_cons_trip_int;</div><div class='hunk'>@@ -1371,7 +1387,6 @@ struct bnx2x {</div><div class='ctx'> #define BNX2X_STATE_DIAG		0xe000</div><div class='ctx'> #define BNX2X_STATE_ERROR		0xf000</div><div class='ctx'> </div><div class='del'>-	int			multi_mode;</div><div class='ctx'> #define BNX2X_MAX_PRIORITY		8</div><div class='ctx'> #define BNX2X_MAX_ENTRIES_PER_PRI	16</div><div class='ctx'> #define BNX2X_MAX_COS			3</div><div class='hunk'>@@ -1582,6 +1597,9 @@ struct bnx2x {</div><div class='ctx'> 	struct dcbx_features			dcbx_remote_feat;</div><div class='ctx'> 	u32					dcbx_remote_flags;</div><div class='ctx'> #endif</div><div class='add'>+	/* AFEX: store default vlan used */</div><div class='add'>+	int					afex_def_vlan_tag;</div><div class='add'>+	enum mf_cfg_afex_vlan_mode		afex_vlan_mode;</div><div class='ctx'> 	u32					pending_max;</div><div class='ctx'> </div><div class='ctx'> 	/* multiple tx classes of service */</div><div class='hunk'>@@ -2138,9 +2156,16 @@ void bnx2x_notify_link_changed(struct bnx2x *bp);</div><div class='ctx'> #define IS_MF_ISCSI_SD(bp) (IS_MF_SD(bp) &amp;&amp; BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp))</div><div class='ctx'> #define IS_MF_FCOE_SD(bp) (IS_MF_SD(bp) &amp;&amp; BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp))</div><div class='ctx'> </div><div class='add'>+#define BNX2X_MF_EXT_PROTOCOL_FCOE(bp)  ((bp)-&gt;mf_ext_config &amp; \</div><div class='add'>+					 MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD)</div><div class='add'>+</div><div class='add'>+#define IS_MF_FCOE_AFEX(bp) (IS_MF_AFEX(bp) &amp;&amp; BNX2X_MF_EXT_PROTOCOL_FCOE(bp))</div><div class='ctx'> #define IS_MF_STORAGE_SD(bp) (IS_MF_SD(bp) &amp;&amp; \</div><div class='ctx'> 				(BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp) || \</div><div class='ctx'> 				 BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)))</div><div class='add'>+#else</div><div class='add'>+#define IS_MF_FCOE_AFEX(bp)	false</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> #endif /* bnx2x.h */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c<br/>index 4b054812713a..ad0743bf4bde 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> #include &lt;linux/ip.h&gt;</div><div class='ctx'> #include &lt;net/ipv6.h&gt;</div><div class='ctx'> #include &lt;net/ip6_checksum.h&gt;</div><div class='del'>-#include &lt;linux/firmware.h&gt;</div><div class='ctx'> #include &lt;linux/prefetch.h&gt;</div><div class='ctx'> #include "bnx2x_cmn.h"</div><div class='ctx'> #include "bnx2x_init.h"</div><div class='hunk'>@@ -329,16 +328,6 @@ static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue,</div><div class='ctx'> 		u16 gro_size = le16_to_cpu(cqe-&gt;pkt_len_or_gro_seg_len);</div><div class='ctx'> 		tpa_info-&gt;full_page =</div><div class='ctx'> 			SGE_PAGE_SIZE * PAGES_PER_SGE / gro_size * gro_size;</div><div class='del'>-		/*</div><div class='del'>-		 * FW 7.2.16 BUG workaround:</div><div class='del'>-		 * if SGE size is (exactly) multiple gro_size</div><div class='del'>-		 * fw will place one less frag on SGE.</div><div class='del'>-		 * the calculation is done only for potentially</div><div class='del'>-		 * dangerous MTUs.</div><div class='del'>-		 */</div><div class='del'>-		if (unlikely(bp-&gt;gro_check))</div><div class='del'>-			if (!(SGE_PAGE_SIZE * PAGES_PER_SGE % gro_size))</div><div class='del'>-				tpa_info-&gt;full_page -= gro_size;</div><div class='ctx'> 		tpa_info-&gt;gro_size = gro_size;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -369,8 +358,8 @@ static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue,</div><div class='ctx'>  * Approximate value of the MSS for this aggregation calculated using</div><div class='ctx'>  * the first packet of it.</div><div class='ctx'>  */</div><div class='del'>-static inline u16 bnx2x_set_lro_mss(struct bnx2x *bp, u16 parsing_flags,</div><div class='del'>-				    u16 len_on_bd)</div><div class='add'>+static u16 bnx2x_set_lro_mss(struct bnx2x *bp, u16 parsing_flags,</div><div class='add'>+			     u16 len_on_bd)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * TPA arrgregation won't have either IP options or TCP options</div><div class='hunk'>@@ -396,6 +385,36 @@ static inline u16 bnx2x_set_lro_mss(struct bnx2x *bp, u16 parsing_flags,</div><div class='ctx'> 	return len_on_bd - hdrs_len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bnx2x_alloc_rx_sge(struct bnx2x *bp,</div><div class='add'>+			      struct bnx2x_fastpath *fp, u16 index)</div><div class='add'>+{</div><div class='add'>+	struct page *page = alloc_pages(GFP_ATOMIC, PAGES_PER_SGE_SHIFT);</div><div class='add'>+	struct sw_rx_page *sw_buf = &amp;fp-&gt;rx_page_ring[index];</div><div class='add'>+	struct eth_rx_sge *sge = &amp;fp-&gt;rx_sge_ring[index];</div><div class='add'>+	dma_addr_t mapping;</div><div class='add'>+</div><div class='add'>+	if (unlikely(page == NULL)) {</div><div class='add'>+		BNX2X_ERR("Can't alloc sge\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mapping = dma_map_page(&amp;bp-&gt;pdev-&gt;dev, page, 0,</div><div class='add'>+			       SGE_PAGE_SIZE*PAGES_PER_SGE, DMA_FROM_DEVICE);</div><div class='add'>+	if (unlikely(dma_mapping_error(&amp;bp-&gt;pdev-&gt;dev, mapping))) {</div><div class='add'>+		__free_pages(page, PAGES_PER_SGE_SHIFT);</div><div class='add'>+		BNX2X_ERR("Can't map sge\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sw_buf-&gt;page = page;</div><div class='add'>+	dma_unmap_addr_set(sw_buf, mapping, mapping);</div><div class='add'>+</div><div class='add'>+	sge-&gt;addr_hi = cpu_to_le32(U64_HI(mapping));</div><div class='add'>+	sge-&gt;addr_lo = cpu_to_le32(U64_LO(mapping));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,</div><div class='ctx'> 			       struct bnx2x_agg_info *tpa_info,</div><div class='ctx'> 			       u16 pages,</div><div class='hunk'>@@ -494,11 +513,11 @@ static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,</div><div class='del'>-				  struct bnx2x_agg_info *tpa_info,</div><div class='del'>-				  u16 pages,</div><div class='del'>-				  struct eth_end_agg_rx_cqe *cqe,</div><div class='del'>-				  u16 cqe_idx)</div><div class='add'>+static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,</div><div class='add'>+			   struct bnx2x_agg_info *tpa_info,</div><div class='add'>+			   u16 pages,</div><div class='add'>+			   struct eth_end_agg_rx_cqe *cqe,</div><div class='add'>+			   u16 cqe_idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct sw_rx_bd *rx_buf = &amp;tpa_info-&gt;first_buf;</div><div class='ctx'> 	u8 pad = tpa_info-&gt;placement_offset;</div><div class='hunk'>@@ -524,7 +543,7 @@ static inline void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,</div><div class='ctx'> 	dma_unmap_single(&amp;bp-&gt;pdev-&gt;dev, dma_unmap_addr(rx_buf, mapping),</div><div class='ctx'> 			 fp-&gt;rx_buf_size, DMA_FROM_DEVICE);</div><div class='ctx'> 	if (likely(new_data))</div><div class='del'>-		skb = build_skb(data);</div><div class='add'>+		skb = build_skb(data, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (likely(skb)) {</div><div class='ctx'> #ifdef BNX2X_STOP_ON_ERROR</div><div class='hunk'>@@ -568,6 +587,36 @@ drop:</div><div class='ctx'> 	fp-&gt;eth_q_stats.rx_skb_alloc_failed++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bnx2x_alloc_rx_data(struct bnx2x *bp,</div><div class='add'>+			       struct bnx2x_fastpath *fp, u16 index)</div><div class='add'>+{</div><div class='add'>+	u8 *data;</div><div class='add'>+	struct sw_rx_bd *rx_buf = &amp;fp-&gt;rx_buf_ring[index];</div><div class='add'>+	struct eth_rx_bd *rx_bd = &amp;fp-&gt;rx_desc_ring[index];</div><div class='add'>+	dma_addr_t mapping;</div><div class='add'>+</div><div class='add'>+	data = kmalloc(fp-&gt;rx_buf_size + NET_SKB_PAD, GFP_ATOMIC);</div><div class='add'>+	if (unlikely(data == NULL))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mapping = dma_map_single(&amp;bp-&gt;pdev-&gt;dev, data + NET_SKB_PAD,</div><div class='add'>+				 fp-&gt;rx_buf_size,</div><div class='add'>+				 DMA_FROM_DEVICE);</div><div class='add'>+	if (unlikely(dma_mapping_error(&amp;bp-&gt;pdev-&gt;dev, mapping))) {</div><div class='add'>+		kfree(data);</div><div class='add'>+		BNX2X_ERR("Can't map rx data\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_buf-&gt;data = data;</div><div class='add'>+	dma_unmap_addr_set(rx_buf, mapping, mapping);</div><div class='add'>+</div><div class='add'>+	rx_bd-&gt;addr_hi = cpu_to_le32(U64_HI(mapping));</div><div class='add'>+	rx_bd-&gt;addr_lo = cpu_to_le32(U64_LO(mapping));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)</div><div class='ctx'> {</div><div class='hunk'>@@ -732,7 +781,7 @@ int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)</div><div class='ctx'> 						 dma_unmap_addr(rx_buf, mapping),</div><div class='ctx'> 						 fp-&gt;rx_buf_size,</div><div class='ctx'> 						 DMA_FROM_DEVICE);</div><div class='del'>-				skb = build_skb(data);</div><div class='add'>+				skb = build_skb(data, 0);</div><div class='ctx'> 				if (unlikely(!skb)) {</div><div class='ctx'> 					kfree(data);</div><div class='ctx'> 					fp-&gt;eth_q_stats.rx_skb_alloc_failed++;</div><div class='hunk'>@@ -881,8 +930,8 @@ u16 bnx2x_get_mf_speed(struct bnx2x *bp)</div><div class='ctx'>  *</div><div class='ctx'>  * It uses a none-atomic bit operations because is called under the mutex.</div><div class='ctx'>  */</div><div class='del'>-static inline void bnx2x_fill_report_data(struct bnx2x *bp,</div><div class='del'>-					  struct bnx2x_link_report_data *data)</div><div class='add'>+static void bnx2x_fill_report_data(struct bnx2x *bp,</div><div class='add'>+				   struct bnx2x_link_report_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	u16 line_speed = bnx2x_get_mf_speed(bp);</div><div class='ctx'> </div><div class='hunk'>@@ -1000,6 +1049,47 @@ void __bnx2x_link_report(struct bnx2x *bp)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnx2x_set_next_page_sgl(struct bnx2x_fastpath *fp)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt;= NUM_RX_SGE_PAGES; i++) {</div><div class='add'>+		struct eth_rx_sge *sge;</div><div class='add'>+</div><div class='add'>+		sge = &amp;fp-&gt;rx_sge_ring[RX_SGE_CNT * i - 2];</div><div class='add'>+		sge-&gt;addr_hi =</div><div class='add'>+			cpu_to_le32(U64_HI(fp-&gt;rx_sge_mapping +</div><div class='add'>+			BCM_PAGE_SIZE*(i % NUM_RX_SGE_PAGES)));</div><div class='add'>+</div><div class='add'>+		sge-&gt;addr_lo =</div><div class='add'>+			cpu_to_le32(U64_LO(fp-&gt;rx_sge_mapping +</div><div class='add'>+			BCM_PAGE_SIZE*(i % NUM_RX_SGE_PAGES)));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnx2x_free_tpa_pool(struct bnx2x *bp,</div><div class='add'>+				struct bnx2x_fastpath *fp, int last)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; last; i++) {</div><div class='add'>+		struct bnx2x_agg_info *tpa_info = &amp;fp-&gt;tpa_info[i];</div><div class='add'>+		struct sw_rx_bd *first_buf = &amp;tpa_info-&gt;first_buf;</div><div class='add'>+		u8 *data = first_buf-&gt;data;</div><div class='add'>+</div><div class='add'>+		if (data == NULL) {</div><div class='add'>+			DP(NETIF_MSG_IFDOWN, "tpa bin %d empty on free\n", i);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		if (tpa_info-&gt;tpa_state == BNX2X_TPA_START)</div><div class='add'>+			dma_unmap_single(&amp;bp-&gt;pdev-&gt;dev,</div><div class='add'>+					 dma_unmap_addr(first_buf, mapping),</div><div class='add'>+					 fp-&gt;rx_buf_size, DMA_FROM_DEVICE);</div><div class='add'>+		kfree(data);</div><div class='add'>+		first_buf-&gt;data = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void bnx2x_init_rx_rings(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int func = BP_FUNC(bp);</div><div class='hunk'>@@ -1212,16 +1302,15 @@ static void bnx2x_free_msix_irqs(struct bnx2x *bp, int nvecs)</div><div class='ctx'> </div><div class='ctx'> void bnx2x_free_irq(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='del'>-	if (bp-&gt;flags &amp; USING_MSIX_FLAG)</div><div class='add'>+	if (bp-&gt;flags &amp; USING_MSIX_FLAG &amp;&amp;</div><div class='add'>+	    !(bp-&gt;flags &amp; USING_SINGLE_MSIX_FLAG))</div><div class='ctx'> 		bnx2x_free_msix_irqs(bp, BNX2X_NUM_ETH_QUEUES(bp) +</div><div class='ctx'> 				     CNIC_PRESENT + 1);</div><div class='del'>-	else if (bp-&gt;flags &amp; USING_MSI_FLAG)</div><div class='del'>-		free_irq(bp-&gt;pdev-&gt;irq, bp-&gt;dev);</div><div class='ctx'> 	else</div><div class='del'>-		free_irq(bp-&gt;pdev-&gt;irq, bp-&gt;dev);</div><div class='add'>+		free_irq(bp-&gt;dev-&gt;irq, bp-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int bnx2x_enable_msix(struct bnx2x *bp)</div><div class='add'>+int __devinit bnx2x_enable_msix(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int msix_vec = 0, i, rc, req_cnt;</div><div class='ctx'> </div><div class='hunk'>@@ -1261,8 +1350,8 @@ int bnx2x_enable_msix(struct bnx2x *bp)</div><div class='ctx'> 		rc = pci_enable_msix(bp-&gt;pdev, &amp;bp-&gt;msix_table[0], rc);</div><div class='ctx'> </div><div class='ctx'> 		if (rc) {</div><div class='del'>-			BNX2X_DEV_INFO("MSI-X is not attainable  rc %d\n", rc);</div><div class='del'>-			return rc;</div><div class='add'>+			BNX2X_DEV_INFO("MSI-X is not attainable rc %d\n", rc);</div><div class='add'>+			goto no_msix;</div><div class='ctx'> 		}</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * decrease number of queues by number of unallocated entries</div><div class='hunk'>@@ -1270,18 +1359,34 @@ int bnx2x_enable_msix(struct bnx2x *bp)</div><div class='ctx'> 		bp-&gt;num_queues -= diff;</div><div class='ctx'> </div><div class='ctx'> 		BNX2X_DEV_INFO("New queue configuration set: %d\n",</div><div class='del'>-				  bp-&gt;num_queues);</div><div class='del'>-	} else if (rc) {</div><div class='del'>-		/* fall to INTx if not enough memory */</div><div class='del'>-		if (rc == -ENOMEM)</div><div class='del'>-			bp-&gt;flags |= DISABLE_MSI_FLAG;</div><div class='add'>+			       bp-&gt;num_queues);</div><div class='add'>+	} else if (rc &gt; 0) {</div><div class='add'>+		/* Get by with single vector */</div><div class='add'>+		rc = pci_enable_msix(bp-&gt;pdev, &amp;bp-&gt;msix_table[0], 1);</div><div class='add'>+		if (rc) {</div><div class='add'>+			BNX2X_DEV_INFO("Single MSI-X is not attainable rc %d\n",</div><div class='add'>+				       rc);</div><div class='add'>+			goto no_msix;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		BNX2X_DEV_INFO("Using single MSI-X vector\n");</div><div class='add'>+		bp-&gt;flags |= USING_SINGLE_MSIX_FLAG;</div><div class='add'>+</div><div class='add'>+	} else if (rc &lt; 0) {</div><div class='ctx'> 		BNX2X_DEV_INFO("MSI-X is not attainable  rc %d\n", rc);</div><div class='del'>-		return rc;</div><div class='add'>+		goto no_msix;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bp-&gt;flags |= USING_MSIX_FLAG;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+no_msix:</div><div class='add'>+	/* fall to INTx if not enough memory */</div><div class='add'>+	if (rc == -ENOMEM)</div><div class='add'>+		bp-&gt;flags |= DISABLE_MSI_FLAG;</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bnx2x_req_msix_irqs(struct bnx2x *bp)</div><div class='hunk'>@@ -1343,22 +1448,26 @@ int bnx2x_enable_msi(struct bnx2x *bp)</div><div class='ctx'> static int bnx2x_req_irq(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int rc;</div><div class='add'>+	unsigned int irq;</div><div class='ctx'> </div><div class='del'>-	if (bp-&gt;flags &amp; USING_MSI_FLAG)</div><div class='add'>+	if (bp-&gt;flags &amp; (USING_MSI_FLAG | USING_MSIX_FLAG))</div><div class='ctx'> 		flags = 0;</div><div class='ctx'> 	else</div><div class='ctx'> 		flags = IRQF_SHARED;</div><div class='ctx'> </div><div class='del'>-	rc = request_irq(bp-&gt;pdev-&gt;irq, bnx2x_interrupt, flags,</div><div class='del'>-			 bp-&gt;dev-&gt;name, bp-&gt;dev);</div><div class='del'>-	return rc;</div><div class='add'>+	if (bp-&gt;flags &amp; USING_MSIX_FLAG)</div><div class='add'>+		irq = bp-&gt;msix_table[0].vector;</div><div class='add'>+	else</div><div class='add'>+		irq = bp-&gt;pdev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	return request_irq(irq, bnx2x_interrupt, flags, bp-&gt;dev-&gt;name, bp-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_setup_irqs(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_setup_irqs(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = 0;</div><div class='del'>-	if (bp-&gt;flags &amp; USING_MSIX_FLAG) {</div><div class='add'>+	if (bp-&gt;flags &amp; USING_MSIX_FLAG &amp;&amp;</div><div class='add'>+	    !(bp-&gt;flags &amp; USING_SINGLE_MSIX_FLAG)) {</div><div class='ctx'> 		rc = bnx2x_req_msix_irqs(bp);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			return rc;</div><div class='hunk'>@@ -1371,15 +1480,20 @@ static inline int bnx2x_setup_irqs(struct bnx2x *bp)</div><div class='ctx'> 		}</div><div class='ctx'> 		if (bp-&gt;flags &amp; USING_MSI_FLAG) {</div><div class='ctx'> 			bp-&gt;dev-&gt;irq = bp-&gt;pdev-&gt;irq;</div><div class='del'>-			netdev_info(bp-&gt;dev, "using MSI  IRQ %d\n",</div><div class='del'>-			       bp-&gt;pdev-&gt;irq);</div><div class='add'>+			netdev_info(bp-&gt;dev, "using MSI IRQ %d\n",</div><div class='add'>+				    bp-&gt;dev-&gt;irq);</div><div class='add'>+		}</div><div class='add'>+		if (bp-&gt;flags &amp; USING_MSIX_FLAG) {</div><div class='add'>+			bp-&gt;dev-&gt;irq = bp-&gt;msix_table[0].vector;</div><div class='add'>+			netdev_info(bp-&gt;dev, "using MSIX IRQ %d\n",</div><div class='add'>+				    bp-&gt;dev-&gt;irq);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_napi_enable(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_napi_enable(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -1387,7 +1501,7 @@ static inline void bnx2x_napi_enable(struct bnx2x *bp)</div><div class='ctx'> 		napi_enable(&amp;bnx2x_fp(bp, i, napi));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_napi_disable(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_napi_disable(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -1437,24 +1551,15 @@ u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb)</div><div class='ctx'> 	return __skb_tx_hash(dev, skb, BNX2X_NUM_ETH_QUEUES(bp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> void bnx2x_set_num_queues(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='del'>-	switch (bp-&gt;multi_mode) {</div><div class='del'>-	case ETH_RSS_MODE_DISABLED:</div><div class='del'>-		bp-&gt;num_queues = 1;</div><div class='del'>-		break;</div><div class='del'>-	case ETH_RSS_MODE_REGULAR:</div><div class='del'>-		bp-&gt;num_queues = bnx2x_calc_num_queues(bp);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		bp-&gt;num_queues = 1;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	/* RSS queues */</div><div class='add'>+	bp-&gt;num_queues = bnx2x_calc_num_queues(bp);</div><div class='ctx'> </div><div class='ctx'> #ifdef BCM_CNIC</div><div class='del'>-	/* override in STORAGE SD mode */</div><div class='del'>-	if (IS_MF_STORAGE_SD(bp))</div><div class='add'>+	/* override in STORAGE SD modes */</div><div class='add'>+	if (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))</div><div class='ctx'> 		bp-&gt;num_queues = 1;</div><div class='ctx'> #endif</div><div class='ctx'> 	/* Add special queues */</div><div class='hunk'>@@ -1483,7 +1588,7 @@ void bnx2x_set_num_queues(struct bnx2x *bp)</div><div class='ctx'>  * bnx2x_setup_tc() takes care of the proper TC mappings so that __skb_tx_hash()</div><div class='ctx'>  * will return a proper Tx index if TC is enabled (netdev-&gt;num_tc &gt; 0).</div><div class='ctx'>  */</div><div class='del'>-static inline int bnx2x_set_real_num_queues(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_set_real_num_queues(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int rc, tx, rx;</div><div class='ctx'> </div><div class='hunk'>@@ -1515,7 +1620,7 @@ static inline int bnx2x_set_real_num_queues(struct bnx2x *bp)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_set_rx_buf_size(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_set_rx_buf_size(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -1543,22 +1648,19 @@ static inline void bnx2x_set_rx_buf_size(struct bnx2x *bp)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_init_rss_pf(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_init_rss_pf(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE] = {0};</div><div class='ctx'> 	u8 num_eth_queues = BNX2X_NUM_ETH_QUEUES(bp);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Prepare the inital contents fo the indirection table if RSS is</div><div class='add'>+	/* Prepare the initial contents fo the indirection table if RSS is</div><div class='ctx'> 	 * enabled</div><div class='ctx'> 	 */</div><div class='del'>-	if (bp-&gt;multi_mode != ETH_RSS_MODE_DISABLED) {</div><div class='del'>-		for (i = 0; i &lt; sizeof(ind_table); i++)</div><div class='del'>-			ind_table[i] =</div><div class='del'>-				bp-&gt;fp-&gt;cl_id +</div><div class='del'>-				ethtool_rxfh_indir_default(i, num_eth_queues);</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; i &lt; sizeof(ind_table); i++)</div><div class='add'>+		ind_table[i] =</div><div class='add'>+			bp-&gt;fp-&gt;cl_id +</div><div class='add'>+			ethtool_rxfh_indir_default(i, num_eth_queues);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * For 57710 and 57711 SEARCHER configuration (rss_keys) is</div><div class='hunk'>@@ -1568,11 +1670,12 @@ static inline int bnx2x_init_rss_pf(struct bnx2x *bp)</div><div class='ctx'> 	 * For 57712 and newer on the other hand it's a per-function</div><div class='ctx'> 	 * configuration.</div><div class='ctx'> 	 */</div><div class='del'>-	return bnx2x_config_rss_pf(bp, ind_table,</div><div class='del'>-				   bp-&gt;port.pmf || !CHIP_IS_E1x(bp));</div><div class='add'>+	return bnx2x_config_rss_eth(bp, ind_table,</div><div class='add'>+				    bp-&gt;port.pmf || !CHIP_IS_E1x(bp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int bnx2x_config_rss_pf(struct bnx2x *bp, u8 *ind_table, bool config_hash)</div><div class='add'>+int bnx2x_config_rss_pf(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj,</div><div class='add'>+			u8 *ind_table, bool config_hash)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x_config_rss_params params = {NULL};</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1584,58 +1687,35 @@ int bnx2x_config_rss_pf(struct bnx2x *bp, u8 *ind_table, bool config_hash)</div><div class='ctx'> 	 *      bp-&gt;multi_mode = ETH_RSS_MODE_DISABLED;</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	params.rss_obj = &amp;bp-&gt;rss_conf_obj;</div><div class='add'>+	params.rss_obj = rss_obj;</div><div class='ctx'> </div><div class='ctx'> 	__set_bit(RAMROD_COMP_WAIT, &amp;params.ramrod_flags);</div><div class='ctx'> </div><div class='del'>-	/* RSS mode */</div><div class='del'>-	switch (bp-&gt;multi_mode) {</div><div class='del'>-	case ETH_RSS_MODE_DISABLED:</div><div class='del'>-		__set_bit(BNX2X_RSS_MODE_DISABLED, &amp;params.rss_flags);</div><div class='del'>-		break;</div><div class='del'>-	case ETH_RSS_MODE_REGULAR:</div><div class='del'>-		__set_bit(BNX2X_RSS_MODE_REGULAR, &amp;params.rss_flags);</div><div class='del'>-		break;</div><div class='del'>-	case ETH_RSS_MODE_VLAN_PRI:</div><div class='del'>-		__set_bit(BNX2X_RSS_MODE_VLAN_PRI, &amp;params.rss_flags);</div><div class='del'>-		break;</div><div class='del'>-	case ETH_RSS_MODE_E1HOV_PRI:</div><div class='del'>-		__set_bit(BNX2X_RSS_MODE_E1HOV_PRI, &amp;params.rss_flags);</div><div class='del'>-		break;</div><div class='del'>-	case ETH_RSS_MODE_IP_DSCP:</div><div class='del'>-		__set_bit(BNX2X_RSS_MODE_IP_DSCP, &amp;params.rss_flags);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BNX2X_ERR("Unknown multi_mode: %d\n", bp-&gt;multi_mode);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	__set_bit(BNX2X_RSS_MODE_REGULAR, &amp;params.rss_flags);</div><div class='ctx'> </div><div class='del'>-	/* If RSS is enabled */</div><div class='del'>-	if (bp-&gt;multi_mode != ETH_RSS_MODE_DISABLED) {</div><div class='del'>-		/* RSS configuration */</div><div class='del'>-		__set_bit(BNX2X_RSS_IPV4, &amp;params.rss_flags);</div><div class='del'>-		__set_bit(BNX2X_RSS_IPV4_TCP, &amp;params.rss_flags);</div><div class='del'>-		__set_bit(BNX2X_RSS_IPV6, &amp;params.rss_flags);</div><div class='del'>-		__set_bit(BNX2X_RSS_IPV6_TCP, &amp;params.rss_flags);</div><div class='add'>+	/* RSS configuration */</div><div class='add'>+	__set_bit(BNX2X_RSS_IPV4, &amp;params.rss_flags);</div><div class='add'>+	__set_bit(BNX2X_RSS_IPV4_TCP, &amp;params.rss_flags);</div><div class='add'>+	__set_bit(BNX2X_RSS_IPV6, &amp;params.rss_flags);</div><div class='add'>+	__set_bit(BNX2X_RSS_IPV6_TCP, &amp;params.rss_flags);</div><div class='ctx'> </div><div class='del'>-		/* Hash bits */</div><div class='del'>-		params.rss_result_mask = MULTI_MASK;</div><div class='add'>+	/* Hash bits */</div><div class='add'>+	params.rss_result_mask = MULTI_MASK;</div><div class='ctx'> </div><div class='del'>-		memcpy(params.ind_table, ind_table, sizeof(params.ind_table));</div><div class='add'>+	memcpy(params.ind_table, ind_table, sizeof(params.ind_table));</div><div class='ctx'> </div><div class='del'>-		if (config_hash) {</div><div class='del'>-			/* RSS keys */</div><div class='del'>-			for (i = 0; i &lt; sizeof(params.rss_key) / 4; i++)</div><div class='del'>-				params.rss_key[i] = random32();</div><div class='add'>+	if (config_hash) {</div><div class='add'>+		/* RSS keys */</div><div class='add'>+		for (i = 0; i &lt; sizeof(params.rss_key) / 4; i++)</div><div class='add'>+			params.rss_key[i] = random32();</div><div class='ctx'> </div><div class='del'>-			__set_bit(BNX2X_RSS_SET_SRCH, &amp;params.rss_flags);</div><div class='del'>-		}</div><div class='add'>+		__set_bit(BNX2X_RSS_SET_SRCH, &amp;params.rss_flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return bnx2x_config_rss(bp, &amp;params);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_init_hw(struct bnx2x *bp, u32 load_code)</div><div class='add'>+static int bnx2x_init_hw(struct bnx2x *bp, u32 load_code)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x_func_state_params func_params = {NULL};</div><div class='ctx'> </div><div class='hunk'>@@ -1744,6 +1824,87 @@ bool bnx2x_test_firmware_version(struct bnx2x *bp, bool is_err)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * bnx2x_bz_fp - zero content of the fastpath structure.</div><div class='add'>+ *</div><div class='add'>+ * @bp:		driver handle</div><div class='add'>+ * @index:	fastpath index to be zeroed</div><div class='add'>+ *</div><div class='add'>+ * Makes sure the contents of the bp-&gt;fp[index].napi is kept</div><div class='add'>+ * intact.</div><div class='add'>+ */</div><div class='add'>+static void bnx2x_bz_fp(struct bnx2x *bp, int index)</div><div class='add'>+{</div><div class='add'>+	struct bnx2x_fastpath *fp = &amp;bp-&gt;fp[index];</div><div class='add'>+	struct napi_struct orig_napi = fp-&gt;napi;</div><div class='add'>+	/* bzero bnx2x_fastpath contents */</div><div class='add'>+	if (bp-&gt;stats_init)</div><div class='add'>+		memset(fp, 0, sizeof(*fp));</div><div class='add'>+	else {</div><div class='add'>+		/* Keep Queue statistics */</div><div class='add'>+		struct bnx2x_eth_q_stats *tmp_eth_q_stats;</div><div class='add'>+		struct bnx2x_eth_q_stats_old *tmp_eth_q_stats_old;</div><div class='add'>+</div><div class='add'>+		tmp_eth_q_stats = kzalloc(sizeof(struct bnx2x_eth_q_stats),</div><div class='add'>+					  GFP_KERNEL);</div><div class='add'>+		if (tmp_eth_q_stats)</div><div class='add'>+			memcpy(tmp_eth_q_stats, &amp;fp-&gt;eth_q_stats,</div><div class='add'>+			       sizeof(struct bnx2x_eth_q_stats));</div><div class='add'>+</div><div class='add'>+		tmp_eth_q_stats_old =</div><div class='add'>+			kzalloc(sizeof(struct bnx2x_eth_q_stats_old),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+		if (tmp_eth_q_stats_old)</div><div class='add'>+			memcpy(tmp_eth_q_stats_old, &amp;fp-&gt;eth_q_stats_old,</div><div class='add'>+			       sizeof(struct bnx2x_eth_q_stats_old));</div><div class='add'>+</div><div class='add'>+		memset(fp, 0, sizeof(*fp));</div><div class='add'>+</div><div class='add'>+		if (tmp_eth_q_stats) {</div><div class='add'>+			memcpy(&amp;fp-&gt;eth_q_stats, tmp_eth_q_stats,</div><div class='add'>+				   sizeof(struct bnx2x_eth_q_stats));</div><div class='add'>+			kfree(tmp_eth_q_stats);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (tmp_eth_q_stats_old) {</div><div class='add'>+			memcpy(&amp;fp-&gt;eth_q_stats_old, tmp_eth_q_stats_old,</div><div class='add'>+			       sizeof(struct bnx2x_eth_q_stats_old));</div><div class='add'>+			kfree(tmp_eth_q_stats_old);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Restore the NAPI object as it has been already initialized */</div><div class='add'>+	fp-&gt;napi = orig_napi;</div><div class='add'>+</div><div class='add'>+	fp-&gt;bp = bp;</div><div class='add'>+	fp-&gt;index = index;</div><div class='add'>+	if (IS_ETH_FP(fp))</div><div class='add'>+		fp-&gt;max_cos = bp-&gt;max_cos;</div><div class='add'>+	else</div><div class='add'>+		/* Special queues support only one CoS */</div><div class='add'>+		fp-&gt;max_cos = 1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * set the tpa flag for each queue. The tpa flag determines the queue</div><div class='add'>+	 * minimal size so it must be set prior to queue memory allocation</div><div class='add'>+	 */</div><div class='add'>+	fp-&gt;disable_tpa = !(bp-&gt;flags &amp; TPA_ENABLE_FLAG ||</div><div class='add'>+				  (bp-&gt;flags &amp; GRO_ENABLE_FLAG &amp;&amp;</div><div class='add'>+				   bnx2x_mtu_allows_gro(bp-&gt;dev-&gt;mtu)));</div><div class='add'>+	if (bp-&gt;flags &amp; TPA_ENABLE_FLAG)</div><div class='add'>+		fp-&gt;mode = TPA_MODE_LRO;</div><div class='add'>+	else if (bp-&gt;flags &amp; GRO_ENABLE_FLAG)</div><div class='add'>+		fp-&gt;mode = TPA_MODE_GRO;</div><div class='add'>+</div><div class='add'>+#ifdef BCM_CNIC</div><div class='add'>+	/* We don't want TPA on an FCoE L2 ring */</div><div class='add'>+	if (IS_FCOE_FP(fp))</div><div class='add'>+		fp-&gt;disable_tpa = 1;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /* must be called with rtnl_lock */</div><div class='ctx'> int bnx2x_nic_load(struct bnx2x *bp, int load_mode)</div><div class='ctx'> {</div><div class='hunk'>@@ -1911,8 +2072,14 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode)</div><div class='ctx'> 			SHMEM2_WR(bp, dcc_support,</div><div class='ctx'> 				  (SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV |</div><div class='ctx'> 				   SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV));</div><div class='add'>+		if (SHMEM2_HAS(bp, afex_driver_support))</div><div class='add'>+			SHMEM2_WR(bp, afex_driver_support,</div><div class='add'>+				  SHMEM_AFEX_SUPPORTED_VERSION_ONE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Set AFEX default VLAN tag to an invalid value */</div><div class='add'>+	bp-&gt;afex_def_vlan_tag = -1;</div><div class='add'>+</div><div class='ctx'> 	bp-&gt;state = BNX2X_STATE_OPENING_WAIT4_PORT;</div><div class='ctx'> 	rc = bnx2x_func_start(bp);</div><div class='ctx'> 	if (rc) {</div><div class='hunk'>@@ -2968,6 +3135,8 @@ netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	netdev_tx_sent_queue(txq, skb-&gt;len);</div><div class='ctx'> </div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='ctx'> 	txdata-&gt;tx_pkt_prod++;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make sure that the BD data is updated before updating the producer</div><div class='hunk'>@@ -3084,7 +3253,8 @@ int bnx2x_change_mac_addr(struct net_device *dev, void *p)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef BCM_CNIC</div><div class='del'>-	if (IS_MF_STORAGE_SD(bp) &amp;&amp; !is_zero_ether_addr(addr-&gt;sa_data)) {</div><div class='add'>+	if ((IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp)) &amp;&amp;</div><div class='add'>+	    !is_zero_ether_addr(addr-&gt;sa_data)) {</div><div class='ctx'> 		BNX2X_ERR("Can't configure non-zero address on iSCSI or FCoE functions in MF-SD mode\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3181,7 +3351,7 @@ void bnx2x_free_fp_mem(struct bnx2x *bp)</div><div class='ctx'> 		bnx2x_free_fp_mem_at(bp, i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void set_sb_shortcuts(struct bnx2x *bp, int index)</div><div class='add'>+static void set_sb_shortcuts(struct bnx2x *bp, int index)</div><div class='ctx'> {</div><div class='ctx'> 	union host_hc_status_block status_blk = bnx2x_fp(bp, index, status_blk);</div><div class='ctx'> 	if (!CHIP_IS_E1x(bp)) {</div><div class='hunk'>@@ -3197,6 +3367,63 @@ static inline void set_sb_shortcuts(struct bnx2x *bp, int index)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Returns the number of actually allocated BDs */</div><div class='add'>+static int bnx2x_alloc_rx_bds(struct bnx2x_fastpath *fp,</div><div class='add'>+			      int rx_ring_size)</div><div class='add'>+{</div><div class='add'>+	struct bnx2x *bp = fp-&gt;bp;</div><div class='add'>+	u16 ring_prod, cqe_ring_prod;</div><div class='add'>+	int i, failure_cnt = 0;</div><div class='add'>+</div><div class='add'>+	fp-&gt;rx_comp_cons = 0;</div><div class='add'>+	cqe_ring_prod = ring_prod = 0;</div><div class='add'>+</div><div class='add'>+	/* This routine is called only during fo init so</div><div class='add'>+	 * fp-&gt;eth_q_stats.rx_skb_alloc_failed = 0</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; rx_ring_size; i++) {</div><div class='add'>+		if (bnx2x_alloc_rx_data(bp, fp, ring_prod) &lt; 0) {</div><div class='add'>+			failure_cnt++;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		ring_prod = NEXT_RX_IDX(ring_prod);</div><div class='add'>+		cqe_ring_prod = NEXT_RCQ_IDX(cqe_ring_prod);</div><div class='add'>+		WARN_ON(ring_prod &lt;= (i - failure_cnt));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (failure_cnt)</div><div class='add'>+		BNX2X_ERR("was only able to allocate %d rx skbs on queue[%d]\n",</div><div class='add'>+			  i - failure_cnt, fp-&gt;index);</div><div class='add'>+</div><div class='add'>+	fp-&gt;rx_bd_prod = ring_prod;</div><div class='add'>+	/* Limit the CQE producer by the CQE ring size */</div><div class='add'>+	fp-&gt;rx_comp_prod = min_t(u16, NUM_RCQ_RINGS*RCQ_DESC_CNT,</div><div class='add'>+			       cqe_ring_prod);</div><div class='add'>+	fp-&gt;rx_pkt = fp-&gt;rx_calls = 0;</div><div class='add'>+</div><div class='add'>+	fp-&gt;eth_q_stats.rx_skb_alloc_failed += failure_cnt;</div><div class='add'>+</div><div class='add'>+	return i - failure_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnx2x_set_next_page_rx_cq(struct bnx2x_fastpath *fp)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt;= NUM_RCQ_RINGS; i++) {</div><div class='add'>+		struct eth_rx_cqe_next_page *nextpg;</div><div class='add'>+</div><div class='add'>+		nextpg = (struct eth_rx_cqe_next_page *)</div><div class='add'>+			&amp;fp-&gt;rx_comp_ring[RCQ_DESC_CNT * i - 1];</div><div class='add'>+		nextpg-&gt;addr_hi =</div><div class='add'>+			cpu_to_le32(U64_HI(fp-&gt;rx_comp_mapping +</div><div class='add'>+				   BCM_PAGE_SIZE*(i % NUM_RCQ_RINGS)));</div><div class='add'>+		nextpg-&gt;addr_lo =</div><div class='add'>+			cpu_to_le32(U64_LO(fp-&gt;rx_comp_mapping +</div><div class='add'>+				   BCM_PAGE_SIZE*(i % NUM_RCQ_RINGS)));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index)</div><div class='ctx'> {</div><div class='ctx'> 	union host_hc_status_block *sb;</div><div class='hunk'>@@ -3206,7 +3433,8 @@ static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index)</div><div class='ctx'> 	int rx_ring_size = 0;</div><div class='ctx'> </div><div class='ctx'> #ifdef BCM_CNIC</div><div class='del'>-	if (!bp-&gt;rx_ring_size &amp;&amp; IS_MF_STORAGE_SD(bp)) {</div><div class='add'>+	if (!bp-&gt;rx_ring_size &amp;&amp;</div><div class='add'>+	    (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))) {</div><div class='ctx'> 		rx_ring_size = MIN_RX_SIZE_NONTPA;</div><div class='ctx'> 		bp-&gt;rx_ring_size = rx_ring_size;</div><div class='ctx'> 	} else</div><div class='hunk'>@@ -3528,8 +3756,6 @@ int bnx2x_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 	 */</div><div class='ctx'> 	dev-&gt;mtu = new_mtu;</div><div class='ctx'> </div><div class='del'>-	bp-&gt;gro_check = bnx2x_need_gro_check(new_mtu);</div><div class='del'>-</div><div class='ctx'> 	return bnx2x_reload_if_running(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3687,9 +3913,9 @@ void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt,</div><div class='ctx'> 			CDU_REGION_NUMBER_XCM_AG, ETH_CONNECTION_TYPE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void storm_memset_hc_timeout(struct bnx2x *bp, u8 port,</div><div class='del'>-					     u8 fw_sb_id, u8 sb_index,</div><div class='del'>-					     u8 ticks)</div><div class='add'>+static void storm_memset_hc_timeout(struct bnx2x *bp, u8 port,</div><div class='add'>+				    u8 fw_sb_id, u8 sb_index,</div><div class='add'>+				    u8 ticks)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='ctx'> 	u32 addr = BAR_CSTRORM_INTMEM +</div><div class='hunk'>@@ -3700,9 +3926,9 @@ static inline void storm_memset_hc_timeout(struct bnx2x *bp, u8 port,</div><div class='ctx'> 	   port, fw_sb_id, sb_index, ticks);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void storm_memset_hc_disable(struct bnx2x *bp, u8 port,</div><div class='del'>-					     u16 fw_sb_id, u8 sb_index,</div><div class='del'>-					     u8 disable)</div><div class='add'>+static void storm_memset_hc_disable(struct bnx2x *bp, u8 port,</div><div class='add'>+				    u16 fw_sb_id, u8 sb_index,</div><div class='add'>+				    u8 disable)</div><div class='ctx'> {</div><div class='ctx'> 	u32 enable_flag = disable ? 0 : (1 &lt;&lt; HC_INDEX_DATA_HC_ENABLED_SHIFT);</div><div class='ctx'> 	u32 addr = BAR_CSTRORM_INTMEM +</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h<br/>index 5c27454d2ec2..7cd99b75347a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h</a></div><div class='hunk'>@@ -86,13 +86,15 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode);</div><div class='ctx'> void bnx2x_send_unload_done(struct bnx2x *bp);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * bnx2x_config_rss_pf - configure RSS parameters.</div><div class='add'>+ * bnx2x_config_rss_pf - configure RSS parameters in a PF.</div><div class='ctx'>  *</div><div class='ctx'>  * @bp:			driver handle</div><div class='add'>+ * @rss_obj		RSS object to use</div><div class='ctx'>  * @ind_table:		indirection table to configure</div><div class='ctx'>  * @config_hash:	re-configure RSS hash keys configuration</div><div class='ctx'>  */</div><div class='del'>-int bnx2x_config_rss_pf(struct bnx2x *bp, u8 *ind_table, bool config_hash);</div><div class='add'>+int bnx2x_config_rss_pf(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj,</div><div class='add'>+			u8 *ind_table, bool config_hash);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * bnx2x__init_func_obj - init function object</div><div class='hunk'>@@ -485,7 +487,7 @@ void bnx2x_netif_start(struct bnx2x *bp);</div><div class='ctx'>  * fills msix_table, requests vectors, updates num_queues</div><div class='ctx'>  * according to number of available vectors.</div><div class='ctx'>  */</div><div class='del'>-int bnx2x_enable_msix(struct bnx2x *bp);</div><div class='add'>+int __devinit bnx2x_enable_msix(struct bnx2x *bp);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * bnx2x_enable_msi - request msi mode from OS, updated internals accordingly</div><div class='hunk'>@@ -610,53 +612,6 @@ static inline void bnx2x_igu_ack_sb_gen(struct bnx2x *bp, u8 igu_sb_id,</div><div class='ctx'> 	barrier();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func,</div><div class='del'>-					  u8 idu_sb_id, bool is_Pf)</div><div class='del'>-{</div><div class='del'>-	u32 data, ctl, cnt = 100;</div><div class='del'>-	u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;</div><div class='del'>-	u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;</div><div class='del'>-	u32 igu_addr_ack = IGU_REG_CSTORM_TYPE_0_SB_CLEANUP + (idu_sb_id/32)*4;</div><div class='del'>-	u32 sb_bit =  1 &lt;&lt; (idu_sb_id%32);</div><div class='del'>-	u32 func_encode = func | (is_Pf ? 1 : 0) &lt;&lt; IGU_FID_ENCODE_IS_PF_SHIFT;</div><div class='del'>-	u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + idu_sb_id;</div><div class='del'>-</div><div class='del'>-	/* Not supported in BC mode */</div><div class='del'>-	if (CHIP_INT_MODE_IS_BC(bp))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	data = (IGU_USE_REGISTER_cstorm_type_0_sb_cleanup</div><div class='del'>-			&lt;&lt; IGU_REGULAR_CLEANUP_TYPE_SHIFT)	|</div><div class='del'>-		IGU_REGULAR_CLEANUP_SET				|</div><div class='del'>-		IGU_REGULAR_BCLEANUP;</div><div class='del'>-</div><div class='del'>-	ctl = addr_encode &lt;&lt; IGU_CTRL_REG_ADDRESS_SHIFT		|</div><div class='del'>-	      func_encode &lt;&lt; IGU_CTRL_REG_FID_SHIFT		|</div><div class='del'>-	      IGU_CTRL_CMD_TYPE_WR &lt;&lt; IGU_CTRL_REG_TYPE_SHIFT;</div><div class='del'>-</div><div class='del'>-	DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",</div><div class='del'>-			 data, igu_addr_data);</div><div class='del'>-	REG_WR(bp, igu_addr_data, data);</div><div class='del'>-	mmiowb();</div><div class='del'>-	barrier();</div><div class='del'>-	DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",</div><div class='del'>-			  ctl, igu_addr_ctl);</div><div class='del'>-	REG_WR(bp, igu_addr_ctl, ctl);</div><div class='del'>-	mmiowb();</div><div class='del'>-	barrier();</div><div class='del'>-</div><div class='del'>-	/* wait for clean up to finish */</div><div class='del'>-	while (!(REG_RD(bp, igu_addr_ack) &amp; sb_bit) &amp;&amp; --cnt)</div><div class='del'>-		msleep(20);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	if (!(REG_RD(bp, igu_addr_ack) &amp; sb_bit)) {</div><div class='del'>-		DP(NETIF_MSG_HW,</div><div class='del'>-		   "Unable to finish IGU cleanup: idu_sb_id %d offset %d bit %d (cnt %d)\n",</div><div class='del'>-			  idu_sb_id, idu_sb_id/32, idu_sb_id%32, cnt);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void bnx2x_hc_ack_sb(struct bnx2x *bp, u8 sb_id,</div><div class='ctx'> 				   u8 storm, u16 index, u8 op, u8 update)</div><div class='ctx'> {</div><div class='hunk'>@@ -843,7 +798,7 @@ static inline void bnx2x_disable_msi(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	if (bp-&gt;flags &amp; USING_MSIX_FLAG) {</div><div class='ctx'> 		pci_disable_msix(bp-&gt;pdev);</div><div class='del'>-		bp-&gt;flags &amp;= ~USING_MSIX_FLAG;</div><div class='add'>+		bp-&gt;flags &amp;= ~(USING_MSIX_FLAG | USING_SINGLE_MSIX_FLAG);</div><div class='ctx'> 	} else if (bp-&gt;flags &amp; USING_MSI_FLAG) {</div><div class='ctx'> 		pci_disable_msi(bp-&gt;pdev);</div><div class='ctx'> 		bp-&gt;flags &amp;= ~USING_MSI_FLAG;</div><div class='hunk'>@@ -883,66 +838,6 @@ static inline void bnx2x_init_sge_ring_bit_mask(struct bnx2x_fastpath *fp)</div><div class='ctx'> 	bnx2x_clear_sge_mask_next_elems(fp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_alloc_rx_sge(struct bnx2x *bp,</div><div class='del'>-				     struct bnx2x_fastpath *fp, u16 index)</div><div class='del'>-{</div><div class='del'>-	struct page *page = alloc_pages(GFP_ATOMIC, PAGES_PER_SGE_SHIFT);</div><div class='del'>-	struct sw_rx_page *sw_buf = &amp;fp-&gt;rx_page_ring[index];</div><div class='del'>-	struct eth_rx_sge *sge = &amp;fp-&gt;rx_sge_ring[index];</div><div class='del'>-	dma_addr_t mapping;</div><div class='del'>-</div><div class='del'>-	if (unlikely(page == NULL)) {</div><div class='del'>-		BNX2X_ERR("Can't alloc sge\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mapping = dma_map_page(&amp;bp-&gt;pdev-&gt;dev, page, 0,</div><div class='del'>-			       SGE_PAGE_SIZE*PAGES_PER_SGE, DMA_FROM_DEVICE);</div><div class='del'>-	if (unlikely(dma_mapping_error(&amp;bp-&gt;pdev-&gt;dev, mapping))) {</div><div class='del'>-		__free_pages(page, PAGES_PER_SGE_SHIFT);</div><div class='del'>-		BNX2X_ERR("Can't map sge\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sw_buf-&gt;page = page;</div><div class='del'>-	dma_unmap_addr_set(sw_buf, mapping, mapping);</div><div class='del'>-</div><div class='del'>-	sge-&gt;addr_hi = cpu_to_le32(U64_HI(mapping));</div><div class='del'>-	sge-&gt;addr_lo = cpu_to_le32(U64_LO(mapping));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int bnx2x_alloc_rx_data(struct bnx2x *bp,</div><div class='del'>-				      struct bnx2x_fastpath *fp, u16 index)</div><div class='del'>-{</div><div class='del'>-	u8 *data;</div><div class='del'>-	struct sw_rx_bd *rx_buf = &amp;fp-&gt;rx_buf_ring[index];</div><div class='del'>-	struct eth_rx_bd *rx_bd = &amp;fp-&gt;rx_desc_ring[index];</div><div class='del'>-	dma_addr_t mapping;</div><div class='del'>-</div><div class='del'>-	data = kmalloc(fp-&gt;rx_buf_size + NET_SKB_PAD, GFP_ATOMIC);</div><div class='del'>-	if (unlikely(data == NULL))</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	mapping = dma_map_single(&amp;bp-&gt;pdev-&gt;dev, data + NET_SKB_PAD,</div><div class='del'>-				 fp-&gt;rx_buf_size,</div><div class='del'>-				 DMA_FROM_DEVICE);</div><div class='del'>-	if (unlikely(dma_mapping_error(&amp;bp-&gt;pdev-&gt;dev, mapping))) {</div><div class='del'>-		kfree(data);</div><div class='del'>-		BNX2X_ERR("Can't map rx data\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rx_buf-&gt;data = data;</div><div class='del'>-	dma_unmap_addr_set(rx_buf, mapping, mapping);</div><div class='del'>-</div><div class='del'>-	rx_bd-&gt;addr_hi = cpu_to_le32(U64_HI(mapping));</div><div class='del'>-	rx_bd-&gt;addr_lo = cpu_to_le32(U64_LO(mapping));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* note that we are not allocating a new buffer,</div><div class='ctx'>  * we are just moving one from cons to prod</div><div class='ctx'>  * we are not creating a new mapping,</div><div class='hunk'>@@ -964,6 +859,19 @@ static inline void bnx2x_reuse_rx_data(struct bnx2x_fastpath *fp,</div><div class='ctx'> </div><div class='ctx'> /************************* Init ******************************************/</div><div class='ctx'> </div><div class='add'>+/* returns func by VN for current port */</div><div class='add'>+static inline int func_by_vn(struct bnx2x *bp, int vn)</div><div class='add'>+{</div><div class='add'>+	return 2 * vn + BP_PORT(bp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int bnx2x_config_rss_eth(struct bnx2x *bp, u8 *ind_table,</div><div class='add'>+				       bool config_hash)</div><div class='add'>+{</div><div class='add'>+	return bnx2x_config_rss_pf(bp, &amp;bp-&gt;rss_conf_obj, ind_table,</div><div class='add'>+				   config_hash);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * bnx2x_func_start - init function</div><div class='ctx'>  *</div><div class='hunk'>@@ -1027,66 +935,6 @@ static inline void bnx2x_free_rx_sge_range(struct bnx2x *bp,</div><div class='ctx'> 		bnx2x_free_rx_sge(bp, fp, i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_free_tpa_pool(struct bnx2x *bp,</div><div class='del'>-				       struct bnx2x_fastpath *fp, int last)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; last; i++) {</div><div class='del'>-		struct bnx2x_agg_info *tpa_info = &amp;fp-&gt;tpa_info[i];</div><div class='del'>-		struct sw_rx_bd *first_buf = &amp;tpa_info-&gt;first_buf;</div><div class='del'>-		u8 *data = first_buf-&gt;data;</div><div class='del'>-</div><div class='del'>-		if (data == NULL) {</div><div class='del'>-			DP(NETIF_MSG_IFDOWN, "tpa bin %d empty on free\n", i);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		if (tpa_info-&gt;tpa_state == BNX2X_TPA_START)</div><div class='del'>-			dma_unmap_single(&amp;bp-&gt;pdev-&gt;dev,</div><div class='del'>-					 dma_unmap_addr(first_buf, mapping),</div><div class='del'>-					 fp-&gt;rx_buf_size, DMA_FROM_DEVICE);</div><div class='del'>-		kfree(data);</div><div class='del'>-		first_buf-&gt;data = NULL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void bnx2x_init_tx_ring_one(struct bnx2x_fp_txdata *txdata)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 1; i &lt;= NUM_TX_RINGS; i++) {</div><div class='del'>-		struct eth_tx_next_bd *tx_next_bd =</div><div class='del'>-			&amp;txdata-&gt;tx_desc_ring[TX_DESC_CNT * i - 1].next_bd;</div><div class='del'>-</div><div class='del'>-		tx_next_bd-&gt;addr_hi =</div><div class='del'>-			cpu_to_le32(U64_HI(txdata-&gt;tx_desc_mapping +</div><div class='del'>-				    BCM_PAGE_SIZE*(i % NUM_TX_RINGS)));</div><div class='del'>-		tx_next_bd-&gt;addr_lo =</div><div class='del'>-			cpu_to_le32(U64_LO(txdata-&gt;tx_desc_mapping +</div><div class='del'>-				    BCM_PAGE_SIZE*(i % NUM_TX_RINGS)));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	SET_FLAG(txdata-&gt;tx_db.data.header.header, DOORBELL_HDR_DB_TYPE, 1);</div><div class='del'>-	txdata-&gt;tx_db.data.zero_fill1 = 0;</div><div class='del'>-	txdata-&gt;tx_db.data.prod = 0;</div><div class='del'>-</div><div class='del'>-	txdata-&gt;tx_pkt_prod = 0;</div><div class='del'>-	txdata-&gt;tx_pkt_cons = 0;</div><div class='del'>-	txdata-&gt;tx_bd_prod = 0;</div><div class='del'>-	txdata-&gt;tx_bd_cons = 0;</div><div class='del'>-	txdata-&gt;tx_pkt = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void bnx2x_init_tx_rings(struct bnx2x *bp)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	u8 cos;</div><div class='del'>-</div><div class='del'>-	for_each_tx_queue(bp, i)</div><div class='del'>-		for_each_cos_in_tx_queue(&amp;bp-&gt;fp[i], cos)</div><div class='del'>-			bnx2x_init_tx_ring_one(&amp;bp-&gt;fp[i].txdata[cos]);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void bnx2x_set_next_page_rx_bd(struct bnx2x_fastpath *fp)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1104,80 +952,6 @@ static inline void bnx2x_set_next_page_rx_bd(struct bnx2x_fastpath *fp)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_set_next_page_sgl(struct bnx2x_fastpath *fp)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 1; i &lt;= NUM_RX_SGE_PAGES; i++) {</div><div class='del'>-		struct eth_rx_sge *sge;</div><div class='del'>-</div><div class='del'>-		sge = &amp;fp-&gt;rx_sge_ring[RX_SGE_CNT * i - 2];</div><div class='del'>-		sge-&gt;addr_hi =</div><div class='del'>-			cpu_to_le32(U64_HI(fp-&gt;rx_sge_mapping +</div><div class='del'>-			BCM_PAGE_SIZE*(i % NUM_RX_SGE_PAGES)));</div><div class='del'>-</div><div class='del'>-		sge-&gt;addr_lo =</div><div class='del'>-			cpu_to_le32(U64_LO(fp-&gt;rx_sge_mapping +</div><div class='del'>-			BCM_PAGE_SIZE*(i % NUM_RX_SGE_PAGES)));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void bnx2x_set_next_page_rx_cq(struct bnx2x_fastpath *fp)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	for (i = 1; i &lt;= NUM_RCQ_RINGS; i++) {</div><div class='del'>-		struct eth_rx_cqe_next_page *nextpg;</div><div class='del'>-</div><div class='del'>-		nextpg = (struct eth_rx_cqe_next_page *)</div><div class='del'>-			&amp;fp-&gt;rx_comp_ring[RCQ_DESC_CNT * i - 1];</div><div class='del'>-		nextpg-&gt;addr_hi =</div><div class='del'>-			cpu_to_le32(U64_HI(fp-&gt;rx_comp_mapping +</div><div class='del'>-				   BCM_PAGE_SIZE*(i % NUM_RCQ_RINGS)));</div><div class='del'>-		nextpg-&gt;addr_lo =</div><div class='del'>-			cpu_to_le32(U64_LO(fp-&gt;rx_comp_mapping +</div><div class='del'>-				   BCM_PAGE_SIZE*(i % NUM_RCQ_RINGS)));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Returns the number of actually allocated BDs */</div><div class='del'>-static inline int bnx2x_alloc_rx_bds(struct bnx2x_fastpath *fp,</div><div class='del'>-				      int rx_ring_size)</div><div class='del'>-{</div><div class='del'>-	struct bnx2x *bp = fp-&gt;bp;</div><div class='del'>-	u16 ring_prod, cqe_ring_prod;</div><div class='del'>-	int i, failure_cnt = 0;</div><div class='del'>-</div><div class='del'>-	fp-&gt;rx_comp_cons = 0;</div><div class='del'>-	cqe_ring_prod = ring_prod = 0;</div><div class='del'>-</div><div class='del'>-	/* This routine is called only during fo init so</div><div class='del'>-	 * fp-&gt;eth_q_stats.rx_skb_alloc_failed = 0</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; rx_ring_size; i++) {</div><div class='del'>-		if (bnx2x_alloc_rx_data(bp, fp, ring_prod) &lt; 0) {</div><div class='del'>-			failure_cnt++;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		ring_prod = NEXT_RX_IDX(ring_prod);</div><div class='del'>-		cqe_ring_prod = NEXT_RCQ_IDX(cqe_ring_prod);</div><div class='del'>-		WARN_ON(ring_prod &lt;= (i - failure_cnt));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (failure_cnt)</div><div class='del'>-		BNX2X_ERR("was only able to allocate %d rx skbs on queue[%d]\n",</div><div class='del'>-			  i - failure_cnt, fp-&gt;index);</div><div class='del'>-</div><div class='del'>-	fp-&gt;rx_bd_prod = ring_prod;</div><div class='del'>-	/* Limit the CQE producer by the CQE ring size */</div><div class='del'>-	fp-&gt;rx_comp_prod = min_t(u16, NUM_RCQ_RINGS*RCQ_DESC_CNT,</div><div class='del'>-			       cqe_ring_prod);</div><div class='del'>-	fp-&gt;rx_pkt = fp-&gt;rx_calls = 0;</div><div class='del'>-</div><div class='del'>-	fp-&gt;eth_q_stats.rx_skb_alloc_failed += failure_cnt;</div><div class='del'>-</div><div class='del'>-	return i - failure_cnt;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Statistics ID are global per chip/path, while Client IDs for E1x are per</div><div class='ctx'>  * port.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1406,30 +1180,6 @@ static inline void __storm_memset_struct(struct bnx2x *bp,</div><div class='ctx'> 		REG_WR(bp, addr + (i * 4), data[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void storm_memset_func_cfg(struct bnx2x *bp,</div><div class='del'>-				struct tstorm_eth_function_common_config *tcfg,</div><div class='del'>-				u16 abs_fid)</div><div class='del'>-{</div><div class='del'>-	size_t size = sizeof(struct tstorm_eth_function_common_config);</div><div class='del'>-</div><div class='del'>-	u32 addr = BAR_TSTRORM_INTMEM +</div><div class='del'>-			TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(abs_fid);</div><div class='del'>-</div><div class='del'>-	__storm_memset_struct(bp, addr, size, (u32 *)tcfg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void storm_memset_cmng(struct bnx2x *bp,</div><div class='del'>-				struct cmng_struct_per_port *cmng,</div><div class='del'>-				u8 port)</div><div class='del'>-{</div><div class='del'>-	size_t size = sizeof(struct cmng_struct_per_port);</div><div class='del'>-</div><div class='del'>-	u32 addr = BAR_XSTRORM_INTMEM +</div><div class='del'>-			XSTORM_CMNG_PER_PORT_VARS_OFFSET(port);</div><div class='del'>-</div><div class='del'>-	__storm_memset_struct(bp, addr, size, (u32 *)cmng);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * bnx2x_wait_sp_comp - wait for the outstanding SP commands.</div><div class='ctx'>  *</div><div class='hunk'>@@ -1512,93 +1262,6 @@ static inline bool bnx2x_mtu_allows_gro(int mtu)</div><div class='ctx'> 	 */</div><div class='ctx'> 	return mtu &lt;= SGE_PAGE_SIZE &amp;&amp; (U_ETH_SGL_SIZE * fpp) &lt;= MAX_SKB_FRAGS;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static inline bool bnx2x_need_gro_check(int mtu)</div><div class='del'>-{</div><div class='del'>-	return (SGE_PAGES / (mtu - ETH_MAX_TPA_HEADER_SIZE - 1)) !=</div><div class='del'>-		(SGE_PAGES / (mtu - ETH_MIN_TPA_HEADER_SIZE + 1));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * bnx2x_bz_fp - zero content of the fastpath structure.</div><div class='del'>- *</div><div class='del'>- * @bp:		driver handle</div><div class='del'>- * @index:	fastpath index to be zeroed</div><div class='del'>- *</div><div class='del'>- * Makes sure the contents of the bp-&gt;fp[index].napi is kept</div><div class='del'>- * intact.</div><div class='del'>- */</div><div class='del'>-static inline void bnx2x_bz_fp(struct bnx2x *bp, int index)</div><div class='del'>-{</div><div class='del'>-	struct bnx2x_fastpath *fp = &amp;bp-&gt;fp[index];</div><div class='del'>-	struct napi_struct orig_napi = fp-&gt;napi;</div><div class='del'>-	/* bzero bnx2x_fastpath contents */</div><div class='del'>-	if (bp-&gt;stats_init)</div><div class='del'>-		memset(fp, 0, sizeof(*fp));</div><div class='del'>-	else {</div><div class='del'>-		/* Keep Queue statistics */</div><div class='del'>-		struct bnx2x_eth_q_stats *tmp_eth_q_stats;</div><div class='del'>-		struct bnx2x_eth_q_stats_old *tmp_eth_q_stats_old;</div><div class='del'>-</div><div class='del'>-		tmp_eth_q_stats = kzalloc(sizeof(struct bnx2x_eth_q_stats),</div><div class='del'>-					  GFP_KERNEL);</div><div class='del'>-		if (tmp_eth_q_stats)</div><div class='del'>-			memcpy(tmp_eth_q_stats, &amp;fp-&gt;eth_q_stats,</div><div class='del'>-			       sizeof(struct bnx2x_eth_q_stats));</div><div class='del'>-</div><div class='del'>-		tmp_eth_q_stats_old =</div><div class='del'>-			kzalloc(sizeof(struct bnx2x_eth_q_stats_old),</div><div class='del'>-				GFP_KERNEL);</div><div class='del'>-		if (tmp_eth_q_stats_old)</div><div class='del'>-			memcpy(tmp_eth_q_stats_old, &amp;fp-&gt;eth_q_stats_old,</div><div class='del'>-			       sizeof(struct bnx2x_eth_q_stats_old));</div><div class='del'>-</div><div class='del'>-		memset(fp, 0, sizeof(*fp));</div><div class='del'>-</div><div class='del'>-		if (tmp_eth_q_stats) {</div><div class='del'>-			memcpy(&amp;fp-&gt;eth_q_stats, tmp_eth_q_stats,</div><div class='del'>-				   sizeof(struct bnx2x_eth_q_stats));</div><div class='del'>-			kfree(tmp_eth_q_stats);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (tmp_eth_q_stats_old) {</div><div class='del'>-			memcpy(&amp;fp-&gt;eth_q_stats_old, tmp_eth_q_stats_old,</div><div class='del'>-			       sizeof(struct bnx2x_eth_q_stats_old));</div><div class='del'>-			kfree(tmp_eth_q_stats_old);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Restore the NAPI object as it has been already initialized */</div><div class='del'>-	fp-&gt;napi = orig_napi;</div><div class='del'>-</div><div class='del'>-	fp-&gt;bp = bp;</div><div class='del'>-	fp-&gt;index = index;</div><div class='del'>-	if (IS_ETH_FP(fp))</div><div class='del'>-		fp-&gt;max_cos = bp-&gt;max_cos;</div><div class='del'>-	else</div><div class='del'>-		/* Special queues support only one CoS */</div><div class='del'>-		fp-&gt;max_cos = 1;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * set the tpa flag for each queue. The tpa flag determines the queue</div><div class='del'>-	 * minimal size so it must be set prior to queue memory allocation</div><div class='del'>-	 */</div><div class='del'>-	fp-&gt;disable_tpa = !(bp-&gt;flags &amp; TPA_ENABLE_FLAG ||</div><div class='del'>-				  (bp-&gt;flags &amp; GRO_ENABLE_FLAG &amp;&amp;</div><div class='del'>-				   bnx2x_mtu_allows_gro(bp-&gt;dev-&gt;mtu)));</div><div class='del'>-	if (bp-&gt;flags &amp; TPA_ENABLE_FLAG)</div><div class='del'>-		fp-&gt;mode = TPA_MODE_LRO;</div><div class='del'>-	else if (bp-&gt;flags &amp; GRO_ENABLE_FLAG)</div><div class='del'>-		fp-&gt;mode = TPA_MODE_GRO;</div><div class='del'>-</div><div class='del'>-#ifdef BCM_CNIC</div><div class='del'>-	/* We don't want TPA on an FCoE L2 ring */</div><div class='del'>-	if (IS_FCOE_FP(fp))</div><div class='del'>-		fp-&gt;disable_tpa = 1;</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef BCM_CNIC</div><div class='ctx'> /**</div><div class='ctx'>  * bnx2x_get_iscsi_info - update iSCSI params according to licensing info.</div><div class='hunk'>@@ -1608,11 +1271,6 @@ static inline void bnx2x_bz_fp(struct bnx2x *bp, int index)</div><div class='ctx'>  */</div><div class='ctx'> void bnx2x_get_iscsi_info(struct bnx2x *bp);</div><div class='ctx'> #endif</div><div class='del'>-/* returns func by VN for current port */</div><div class='del'>-static inline int func_by_vn(struct bnx2x *bp, int vn)</div><div class='del'>-{</div><div class='del'>-	return 2 * vn + BP_PORT(bp);</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * bnx2x_link_sync_notify - send notification to other functions.</div><div class='hunk'>@@ -1667,7 +1325,8 @@ static inline bool bnx2x_is_valid_ether_addr(struct bnx2x *bp, u8 *addr)</div><div class='ctx'> 	if (is_valid_ether_addr(addr))</div><div class='ctx'> 		return true;</div><div class='ctx'> #ifdef BCM_CNIC</div><div class='del'>-	if (is_zero_ether_addr(addr) &amp;&amp; IS_MF_STORAGE_SD(bp))</div><div class='add'>+	if (is_zero_ether_addr(addr) &amp;&amp;</div><div class='add'>+	    (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp)))</div><div class='ctx'> 		return true;</div><div class='ctx'> #endif</div><div class='ctx'> 	return false;</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c<br/>index 2cc0a1703970..ddc18ee5c5ae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c</a></div><div class='hunk'>@@ -22,13 +22,10 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/crc32.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> #include "bnx2x.h"</div><div class='ctx'> #include "bnx2x_cmn.h"</div><div class='ctx'> #include "bnx2x_dump.h"</div><div class='ctx'> #include "bnx2x_init.h"</div><div class='del'>-#include "bnx2x_sp.h"</div><div class='ctx'> </div><div class='ctx'> /* Note: in the format strings below %s is replaced by the queue-name which is</div><div class='ctx'>  * either its index or 'fcoe' for the fcoe queue. Make sure the format string</div><div class='hunk'>@@ -595,8 +592,8 @@ static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='ctx'> #define IS_E3_ONLINE(info)	(((info) &amp; RI_E3_ONLINE) == RI_E3_ONLINE)</div><div class='ctx'> #define IS_E3B0_ONLINE(info)	(((info) &amp; RI_E3B0_ONLINE) == RI_E3B0_ONLINE)</div><div class='ctx'> </div><div class='del'>-static inline bool bnx2x_is_reg_online(struct bnx2x *bp,</div><div class='del'>-				       const struct reg_addr *reg_info)</div><div class='add'>+static bool bnx2x_is_reg_online(struct bnx2x *bp,</div><div class='add'>+				const struct reg_addr *reg_info)</div><div class='ctx'> {</div><div class='ctx'> 	if (CHIP_IS_E1(bp))</div><div class='ctx'> 		return IS_E1_ONLINE(reg_info-&gt;info);</div><div class='hunk'>@@ -613,7 +610,7 @@ static inline bool bnx2x_is_reg_online(struct bnx2x *bp,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /******* Paged registers info selectors ********/</div><div class='del'>-static inline const u32 *__bnx2x_get_page_addr_ar(struct bnx2x *bp)</div><div class='add'>+static const u32 *__bnx2x_get_page_addr_ar(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	if (CHIP_IS_E2(bp))</div><div class='ctx'> 		return page_vals_e2;</div><div class='hunk'>@@ -623,7 +620,7 @@ static inline const u32 *__bnx2x_get_page_addr_ar(struct bnx2x *bp)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 __bnx2x_get_page_reg_num(struct bnx2x *bp)</div><div class='add'>+static u32 __bnx2x_get_page_reg_num(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	if (CHIP_IS_E2(bp))</div><div class='ctx'> 		return PAGE_MODE_VALUES_E2;</div><div class='hunk'>@@ -633,7 +630,7 @@ static inline u32 __bnx2x_get_page_reg_num(struct bnx2x *bp)</div><div class='ctx'> 		return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline const u32 *__bnx2x_get_page_write_ar(struct bnx2x *bp)</div><div class='add'>+static const u32 *__bnx2x_get_page_write_ar(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	if (CHIP_IS_E2(bp))</div><div class='ctx'> 		return page_write_regs_e2;</div><div class='hunk'>@@ -643,7 +640,7 @@ static inline const u32 *__bnx2x_get_page_write_ar(struct bnx2x *bp)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 __bnx2x_get_page_write_num(struct bnx2x *bp)</div><div class='add'>+static u32 __bnx2x_get_page_write_num(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	if (CHIP_IS_E2(bp))</div><div class='ctx'> 		return PAGE_WRITE_REGS_E2;</div><div class='hunk'>@@ -653,7 +650,7 @@ static inline u32 __bnx2x_get_page_write_num(struct bnx2x *bp)</div><div class='ctx'> 		return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline const struct reg_addr *__bnx2x_get_page_read_ar(struct bnx2x *bp)</div><div class='add'>+static const struct reg_addr *__bnx2x_get_page_read_ar(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	if (CHIP_IS_E2(bp))</div><div class='ctx'> 		return page_read_regs_e2;</div><div class='hunk'>@@ -663,7 +660,7 @@ static inline const struct reg_addr *__bnx2x_get_page_read_ar(struct bnx2x *bp)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 __bnx2x_get_page_read_num(struct bnx2x *bp)</div><div class='add'>+static u32 __bnx2x_get_page_read_num(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	if (CHIP_IS_E2(bp))</div><div class='ctx'> 		return PAGE_READ_REGS_E2;</div><div class='hunk'>@@ -673,7 +670,7 @@ static inline u32 __bnx2x_get_page_read_num(struct bnx2x *bp)</div><div class='ctx'> 		return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int __bnx2x_get_regs_len(struct bnx2x *bp)</div><div class='add'>+static int __bnx2x_get_regs_len(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int num_pages = __bnx2x_get_page_reg_num(bp);</div><div class='ctx'> 	int page_write_num = __bnx2x_get_page_write_num(bp);</div><div class='hunk'>@@ -718,7 +715,7 @@ static int bnx2x_get_regs_len(struct net_device *dev)</div><div class='ctx'>  * ("read address"). There may be more than one write address per "page" and</div><div class='ctx'>  * more than one read address per write address.</div><div class='ctx'>  */</div><div class='del'>-static inline void bnx2x_read_pages_regs(struct bnx2x *bp, u32 *p)</div><div class='add'>+static void bnx2x_read_pages_regs(struct bnx2x *bp, u32 *p)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i, j, k, n;</div><div class='ctx'> 	/* addresses of the paged registers */</div><div class='hunk'>@@ -747,7 +744,7 @@ static inline void bnx2x_read_pages_regs(struct bnx2x *bp, u32 *p)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __bnx2x_get_regs(struct bnx2x *bp, u32 *p)</div><div class='add'>+static void __bnx2x_get_regs(struct bnx2x *bp, u32 *p)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i, j;</div><div class='ctx'> </div><div class='hunk'>@@ -1433,7 +1430,7 @@ static void bnx2x_get_ringparam(struct net_device *dev,</div><div class='ctx'> 	else</div><div class='ctx'> 		ering-&gt;rx_pending = MAX_RX_AVAIL;</div><div class='ctx'> </div><div class='del'>-	ering-&gt;tx_max_pending = MAX_TX_AVAIL;</div><div class='add'>+	ering-&gt;tx_max_pending = IS_MF_FCOE_AFEX(bp) ? 0 : MAX_TX_AVAIL;</div><div class='ctx'> 	ering-&gt;tx_pending = bp-&gt;tx_ring_size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1451,7 +1448,7 @@ static int bnx2x_set_ringparam(struct net_device *dev,</div><div class='ctx'> 	if ((ering-&gt;rx_pending &gt; MAX_RX_AVAIL) ||</div><div class='ctx'> 	    (ering-&gt;rx_pending &lt; (bp-&gt;disable_tpa ? MIN_RX_SIZE_NONTPA :</div><div class='ctx'> 						    MIN_RX_SIZE_TPA)) ||</div><div class='del'>-	    (ering-&gt;tx_pending &gt; MAX_TX_AVAIL) ||</div><div class='add'>+	    (ering-&gt;tx_pending &gt; (IS_MF_FCOE_AFEX(bp) ? 0 : MAX_TX_AVAIL)) ||</div><div class='ctx'> 	    (ering-&gt;tx_pending &lt;= MAX_SKB_FRAGS + 4)) {</div><div class='ctx'> 		DP(BNX2X_MSG_ETHTOOL, "Command parameters not supported\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -2212,7 +2209,7 @@ static void bnx2x_self_test(struct net_device *dev,</div><div class='ctx'> /* ethtool statistics are displayed for all regular ethernet queues and the</div><div class='ctx'>  * fcoe L2 queue if not disabled</div><div class='ctx'>  */</div><div class='del'>-static inline int bnx2x_num_stat_queues(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_num_stat_queues(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	return BNX2X_NUM_ETH_QUEUES(bp);</div><div class='ctx'> }</div><div class='hunk'>@@ -2396,10 +2393,7 @@ static int bnx2x_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,</div><div class='ctx'> </div><div class='ctx'> static u32 bnx2x_get_rxfh_indir_size(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct bnx2x *bp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	return (bp-&gt;multi_mode == ETH_RSS_MODE_DISABLED ?</div><div class='del'>-		0 : T_ETH_INDIRECTION_TABLE_SIZE);</div><div class='add'>+	return T_ETH_INDIRECTION_TABLE_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bnx2x_get_rxfh_indir(struct net_device *dev, u32 *indir)</div><div class='hunk'>@@ -2445,7 +2439,7 @@ static int bnx2x_set_rxfh_indir(struct net_device *dev, const u32 *indir)</div><div class='ctx'> 		ind_table[i] = indir[i] + bp-&gt;fp-&gt;cl_id;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return bnx2x_config_rss_pf(bp, ind_table, false);</div><div class='add'>+	return bnx2x_config_rss_eth(bp, ind_table, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops bnx2x_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h<br/>index b9b263323436..426f77aa721a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h</a></div><div class='hunk'>@@ -387,7 +387,7 @@</div><div class='ctx'> </div><div class='ctx'> #define STATS_QUERY_CMD_COUNT 16</div><div class='ctx'> </div><div class='del'>-#define NIV_LIST_TABLE_SIZE 4096</div><div class='add'>+#define AFEX_LIST_TABLE_SIZE 4096</div><div class='ctx'> </div><div class='ctx'> #define INVALID_VNIC_ID	0xFF</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h<br/>index dbff5915b81a..a440a8ba85f2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h</a></div><div class='hunk'>@@ -833,6 +833,7 @@ struct shared_feat_cfg {		 /* NVRAM Offset */</div><div class='ctx'> 		#define SHARED_FEAT_CFG_FORCE_SF_MODE_FORCED_SF      0x00000100</div><div class='ctx'> 		#define SHARED_FEAT_CFG_FORCE_SF_MODE_SPIO4          0x00000200</div><div class='ctx'> 		#define SHARED_FEAT_CFG_FORCE_SF_MODE_SWITCH_INDEPT  0x00000300</div><div class='add'>+		#define SHARED_FEAT_CFG_FORCE_SF_MODE_AFEX_MODE      0x00000400</div><div class='ctx'> </div><div class='ctx'> 	/* The interval in seconds between sending LLDP packets. Set to zero</div><div class='ctx'> 	   to disable the feature */</div><div class='hunk'>@@ -1235,6 +1236,8 @@ struct drv_func_mb {</div><div class='ctx'> 	#define REQ_BC_VER_4_VRFY_FIRST_PHY_OPT_MDL     0x00050006</div><div class='ctx'> 	#define DRV_MSG_CODE_VRFY_SPECIFIC_PHY_OPT_MDL  0xa1000000</div><div class='ctx'> 	#define REQ_BC_VER_4_VRFY_SPECIFIC_PHY_OPT_MDL  0x00050234</div><div class='add'>+	#define DRV_MSG_CODE_VRFY_AFEX_SUPPORTED        0xa2000000</div><div class='add'>+	#define REQ_BC_VER_4_VRFY_AFEX_SUPPORTED        0x00070002</div><div class='ctx'> 	#define REQ_BC_VER_4_SFP_TX_DISABLE_SUPPORTED   0x00070014</div><div class='ctx'> 	#define REQ_BC_VER_4_PFC_STATS_SUPPORTED        0x00070201</div><div class='ctx'> </div><div class='hunk'>@@ -1242,6 +1245,13 @@ struct drv_func_mb {</div><div class='ctx'> 	#define DRV_MSG_CODE_DCBX_PMF_DRV_OK            0xb2000000</div><div class='ctx'> </div><div class='ctx'> 	#define DRV_MSG_CODE_VF_DISABLED_DONE           0xc0000000</div><div class='add'>+</div><div class='add'>+	#define DRV_MSG_CODE_AFEX_DRIVER_SETMAC         0xd0000000</div><div class='add'>+	#define DRV_MSG_CODE_AFEX_LISTGET_ACK           0xd1000000</div><div class='add'>+	#define DRV_MSG_CODE_AFEX_LISTSET_ACK           0xd2000000</div><div class='add'>+	#define DRV_MSG_CODE_AFEX_STATSGET_ACK          0xd3000000</div><div class='add'>+	#define DRV_MSG_CODE_AFEX_VIFSET_ACK            0xd4000000</div><div class='add'>+</div><div class='ctx'> 	#define DRV_MSG_CODE_DRV_INFO_ACK               0xd8000000</div><div class='ctx'> 	#define DRV_MSG_CODE_DRV_INFO_NACK              0xd9000000</div><div class='ctx'> </div><div class='hunk'>@@ -1299,6 +1309,14 @@ struct drv_func_mb {</div><div class='ctx'> 	#define FW_MSG_CODE_VRFY_OPT_MDL_INVLD_IMG      0xa0200000</div><div class='ctx'> 	#define FW_MSG_CODE_VRFY_OPT_MDL_UNAPPROVED     0xa0300000</div><div class='ctx'> 	#define FW_MSG_CODE_VF_DISABLED_DONE            0xb0000000</div><div class='add'>+	#define FW_MSG_CODE_HW_SET_INVALID_IMAGE        0xb0100000</div><div class='add'>+</div><div class='add'>+	#define FW_MSG_CODE_AFEX_DRIVER_SETMAC_DONE     0xd0100000</div><div class='add'>+	#define FW_MSG_CODE_AFEX_LISTGET_ACK            0xd1100000</div><div class='add'>+	#define FW_MSG_CODE_AFEX_LISTSET_ACK            0xd2100000</div><div class='add'>+	#define FW_MSG_CODE_AFEX_STATSGET_ACK           0xd3100000</div><div class='add'>+	#define FW_MSG_CODE_AFEX_VIFSET_ACK             0xd4100000</div><div class='add'>+</div><div class='ctx'> 	#define FW_MSG_CODE_DRV_INFO_ACK                0xd8100000</div><div class='ctx'> 	#define FW_MSG_CODE_DRV_INFO_NACK               0xd9100000</div><div class='ctx'> </div><div class='hunk'>@@ -1357,6 +1375,12 @@ struct drv_func_mb {</div><div class='ctx'> </div><div class='ctx'> 	#define DRV_STATUS_DCBX_EVENT_MASK              0x000f0000</div><div class='ctx'> 	#define DRV_STATUS_DCBX_NEGOTIATION_RESULTS     0x00010000</div><div class='add'>+	#define DRV_STATUS_AFEX_EVENT_MASK              0x03f00000</div><div class='add'>+	#define DRV_STATUS_AFEX_LISTGET_REQ             0x00100000</div><div class='add'>+	#define DRV_STATUS_AFEX_LISTSET_REQ             0x00200000</div><div class='add'>+	#define DRV_STATUS_AFEX_STATSGET_REQ            0x00400000</div><div class='add'>+	#define DRV_STATUS_AFEX_VIFSET_REQ              0x00800000</div><div class='add'>+</div><div class='ctx'> 	#define DRV_STATUS_DRV_INFO_REQ                 0x04000000</div><div class='ctx'> </div><div class='ctx'> 	u32 virt_mac_upper;</div><div class='hunk'>@@ -1448,7 +1472,26 @@ struct func_mf_cfg {</div><div class='ctx'> 	#define FUNC_MF_CFG_E1HOV_TAG_SHIFT             0</div><div class='ctx'> 	#define FUNC_MF_CFG_E1HOV_TAG_DEFAULT         FUNC_MF_CFG_E1HOV_TAG_MASK</div><div class='ctx'> </div><div class='del'>-	u32 reserved[2];</div><div class='add'>+	/* afex default VLAN ID - 12 bits */</div><div class='add'>+	#define FUNC_MF_CFG_AFEX_VLAN_MASK              0x0fff0000</div><div class='add'>+	#define FUNC_MF_CFG_AFEX_VLAN_SHIFT             16</div><div class='add'>+</div><div class='add'>+	u32 afex_config;</div><div class='add'>+	#define FUNC_MF_CFG_AFEX_COS_FILTER_MASK                     0x000000ff</div><div class='add'>+	#define FUNC_MF_CFG_AFEX_COS_FILTER_SHIFT                    0</div><div class='add'>+	#define FUNC_MF_CFG_AFEX_MBA_ENABLED_MASK                    0x0000ff00</div><div class='add'>+	#define FUNC_MF_CFG_AFEX_MBA_ENABLED_SHIFT                   8</div><div class='add'>+	#define FUNC_MF_CFG_AFEX_MBA_ENABLED_VAL                     0x00000100</div><div class='add'>+	#define FUNC_MF_CFG_AFEX_VLAN_MODE_MASK                      0x000f0000</div><div class='add'>+	#define FUNC_MF_CFG_AFEX_VLAN_MODE_SHIFT                     16</div><div class='add'>+</div><div class='add'>+	u32 reserved;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mf_cfg_afex_vlan_mode {</div><div class='add'>+	FUNC_MF_CFG_AFEX_VLAN_TRUNK_MODE = 0,</div><div class='add'>+	FUNC_MF_CFG_AFEX_VLAN_ACCESS_MODE,</div><div class='add'>+	FUNC_MF_CFG_AFEX_VLAN_TRUNK_TAG_NATIVE_MODE</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* This structure is not applicable and should not be accessed on 57711 */</div><div class='hunk'>@@ -1945,18 +1988,29 @@ struct shmem2_region {</div><div class='ctx'> </div><div class='ctx'> 	u32 nvm_retain_bitmap_addr;			/* 0x0070 */</div><div class='ctx'> </div><div class='del'>-	u32	reserved1;	/* 0x0074 */</div><div class='add'>+	/* afex support of that driver */</div><div class='add'>+	u32 afex_driver_support;			/* 0x0074 */</div><div class='add'>+	#define SHMEM_AFEX_VERSION_MASK                  0x100f</div><div class='add'>+	#define SHMEM_AFEX_SUPPORTED_VERSION_ONE         0x1001</div><div class='add'>+	#define SHMEM_AFEX_REDUCED_DRV_LOADED            0x8000</div><div class='ctx'> </div><div class='del'>-	u32	reserved2[E2_FUNC_MAX];</div><div class='add'>+	/* driver receives addr in scratchpad to which it should respond */</div><div class='add'>+	u32 afex_scratchpad_addr_to_write[E2_FUNC_MAX];</div><div class='ctx'> </div><div class='del'>-	u32	reserved3[E2_FUNC_MAX];/* 0x0088 */</div><div class='del'>-	u32	reserved4[E2_FUNC_MAX];/* 0x0098 */</div><div class='add'>+	/* generic params from MCP to driver (value depends on the msg sent</div><div class='add'>+	 * to driver</div><div class='add'>+	 */</div><div class='add'>+	u32 afex_param1_to_driver[E2_FUNC_MAX];		/* 0x0088 */</div><div class='add'>+	u32 afex_param2_to_driver[E2_FUNC_MAX];		/* 0x0098 */</div><div class='ctx'> </div><div class='ctx'> 	u32 swim_base_addr;				/* 0x0108 */</div><div class='ctx'> 	u32 swim_funcs;</div><div class='ctx'> 	u32 swim_main_cb;</div><div class='ctx'> </div><div class='del'>-	u32	reserved5[2];</div><div class='add'>+	/* bitmap notifying which VIF profiles stored in nvram are enabled by</div><div class='add'>+	 * switch</div><div class='add'>+	 */</div><div class='add'>+	u32 afex_profiles_enabled[2];</div><div class='ctx'> </div><div class='ctx'> 	/* generic flags controlled by the driver */</div><div class='ctx'> 	u32 drv_flags;</div><div class='hunk'>@@ -2696,10 +2750,51 @@ union drv_info_to_mcp {</div><div class='ctx'> 	struct fcoe_stats_info	fcoe_stat;</div><div class='ctx'> 	struct iscsi_stats_info	iscsi_stat;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+/* stats collected for afex.</div><div class='add'>+ * NOTE: structure is exactly as expected to be received by the switch.</div><div class='add'>+ *       order must remain exactly as is unless protocol changes !</div><div class='add'>+ */</div><div class='add'>+struct afex_stats {</div><div class='add'>+	u32 tx_unicast_frames_hi;</div><div class='add'>+	u32 tx_unicast_frames_lo;</div><div class='add'>+	u32 tx_unicast_bytes_hi;</div><div class='add'>+	u32 tx_unicast_bytes_lo;</div><div class='add'>+	u32 tx_multicast_frames_hi;</div><div class='add'>+	u32 tx_multicast_frames_lo;</div><div class='add'>+	u32 tx_multicast_bytes_hi;</div><div class='add'>+	u32 tx_multicast_bytes_lo;</div><div class='add'>+	u32 tx_broadcast_frames_hi;</div><div class='add'>+	u32 tx_broadcast_frames_lo;</div><div class='add'>+	u32 tx_broadcast_bytes_hi;</div><div class='add'>+	u32 tx_broadcast_bytes_lo;</div><div class='add'>+	u32 tx_frames_discarded_hi;</div><div class='add'>+	u32 tx_frames_discarded_lo;</div><div class='add'>+	u32 tx_frames_dropped_hi;</div><div class='add'>+	u32 tx_frames_dropped_lo;</div><div class='add'>+</div><div class='add'>+	u32 rx_unicast_frames_hi;</div><div class='add'>+	u32 rx_unicast_frames_lo;</div><div class='add'>+	u32 rx_unicast_bytes_hi;</div><div class='add'>+	u32 rx_unicast_bytes_lo;</div><div class='add'>+	u32 rx_multicast_frames_hi;</div><div class='add'>+	u32 rx_multicast_frames_lo;</div><div class='add'>+	u32 rx_multicast_bytes_hi;</div><div class='add'>+	u32 rx_multicast_bytes_lo;</div><div class='add'>+	u32 rx_broadcast_frames_hi;</div><div class='add'>+	u32 rx_broadcast_frames_lo;</div><div class='add'>+	u32 rx_broadcast_bytes_hi;</div><div class='add'>+	u32 rx_broadcast_bytes_lo;</div><div class='add'>+	u32 rx_frames_discarded_hi;</div><div class='add'>+	u32 rx_frames_discarded_lo;</div><div class='add'>+	u32 rx_frames_dropped_hi;</div><div class='add'>+	u32 rx_frames_dropped_lo;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define BCM_5710_FW_MAJOR_VERSION			7</div><div class='ctx'> #define BCM_5710_FW_MINOR_VERSION			2</div><div class='del'>-#define BCM_5710_FW_REVISION_VERSION		16</div><div class='del'>-#define BCM_5710_FW_ENGINEERING_VERSION		0</div><div class='add'>+#define BCM_5710_FW_REVISION_VERSION			51</div><div class='add'>+#define BCM_5710_FW_ENGINEERING_VERSION			0</div><div class='ctx'> #define BCM_5710_FW_COMPILE_FLAGS			1</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -3389,7 +3484,7 @@ struct client_init_tx_data {</div><div class='ctx'> #define CLIENT_INIT_TX_DATA_RESERVED1 (0xFFF&lt;&lt;4)</div><div class='ctx'> #define CLIENT_INIT_TX_DATA_RESERVED1_SHIFT 4</div><div class='ctx'> 	u8 default_vlan_flg;</div><div class='del'>-	u8 reserved2;</div><div class='add'>+	u8 force_default_pri_flg;</div><div class='ctx'> 	__le32 reserved3;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -4375,8 +4470,21 @@ struct fcoe_statistics_params {</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * The data afex vif list ramrod need</div><div class='add'>+ */</div><div class='add'>+struct afex_vif_list_ramrod_data {</div><div class='add'>+	u8 afex_vif_list_command;</div><div class='add'>+	u8 func_bit_map;</div><div class='add'>+	__le16 vif_list_index;</div><div class='add'>+	u8 func_to_clear;</div><div class='add'>+	u8 echo;</div><div class='add'>+	__le16 reserved1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * cfc delete event data</div><div class='del'>-*/</div><div class='add'>+ */</div><div class='ctx'> struct cfc_del_event_data {</div><div class='ctx'> 	u32 cid;</div><div class='ctx'> 	u32 reserved0;</div><div class='hunk'>@@ -4448,6 +4556,65 @@ struct cmng_struct_per_port {</div><div class='ctx'> 	struct cmng_flags_per_port flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * a single rate shaping counter. can be used as protocol or vnic counter</div><div class='add'>+ */</div><div class='add'>+struct rate_shaping_counter {</div><div class='add'>+	u32 quota;</div><div class='add'>+#if defined(__BIG_ENDIAN)</div><div class='add'>+	u16 __reserved0;</div><div class='add'>+	u16 rate;</div><div class='add'>+#elif defined(__LITTLE_ENDIAN)</div><div class='add'>+	u16 rate;</div><div class='add'>+	u16 __reserved0;</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * per-vnic rate shaping variables</div><div class='add'>+ */</div><div class='add'>+struct rate_shaping_vars_per_vn {</div><div class='add'>+	struct rate_shaping_counter vn_counter;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * per-vnic fairness variables</div><div class='add'>+ */</div><div class='add'>+struct fairness_vars_per_vn {</div><div class='add'>+	u32 cos_credit_delta[MAX_COS_NUMBER];</div><div class='add'>+	u32 vn_credit_delta;</div><div class='add'>+	u32 __reserved0;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * cmng port init state</div><div class='add'>+ */</div><div class='add'>+struct cmng_vnic {</div><div class='add'>+	struct rate_shaping_vars_per_vn vnic_max_rate[4];</div><div class='add'>+	struct fairness_vars_per_vn vnic_min_rate[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * cmng port init state</div><div class='add'>+ */</div><div class='add'>+struct cmng_init {</div><div class='add'>+	struct cmng_struct_per_port port;</div><div class='add'>+	struct cmng_vnic vnic;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * driver parameters for congestion management init, all rates are in Mbps</div><div class='add'>+ */</div><div class='add'>+struct cmng_init_input {</div><div class='add'>+	u32 port_rate;</div><div class='add'>+	u16 vnic_min_rate[4];</div><div class='add'>+	u16 vnic_max_rate[4];</div><div class='add'>+	u16 cos_min_rate[MAX_COS_NUMBER];</div><div class='add'>+	u16 cos_to_pause_mask[MAX_COS_NUMBER];</div><div class='add'>+	struct cmng_flags_per_port flags;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Protocol-common command ID for slow path elements</div><div class='hunk'>@@ -4462,7 +4629,7 @@ enum common_spqe_cmd_id {</div><div class='ctx'> 	RAMROD_CMD_ID_COMMON_STAT_QUERY,</div><div class='ctx'> 	RAMROD_CMD_ID_COMMON_STOP_TRAFFIC,</div><div class='ctx'> 	RAMROD_CMD_ID_COMMON_START_TRAFFIC,</div><div class='del'>-	RAMROD_CMD_ID_COMMON_RESERVED1,</div><div class='add'>+	RAMROD_CMD_ID_COMMON_AFEX_VIF_LISTS,</div><div class='ctx'> 	MAX_COMMON_SPQE_CMD_ID</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -4670,6 +4837,17 @@ struct malicious_vf_event_data {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * vif list event data</div><div class='add'>+ */</div><div class='add'>+struct vif_list_event_data {</div><div class='add'>+	u8 func_bit_map;</div><div class='add'>+	u8 echo;</div><div class='add'>+	__le16 reserved0;</div><div class='add'>+	__le32 reserved1;</div><div class='add'>+	__le32 reserved2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * union for all event ring message types</div><div class='ctx'>  */</div><div class='ctx'> union event_data {</div><div class='hunk'>@@ -4678,6 +4856,7 @@ union event_data {</div><div class='ctx'> 	struct cfc_del_event_data cfc_del_event;</div><div class='ctx'> 	struct vf_flr_event_data vf_flr_event;</div><div class='ctx'> 	struct malicious_vf_event_data malicious_vf_event;</div><div class='add'>+	struct vif_list_event_data vif_list_event;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -4743,7 +4922,7 @@ enum event_ring_opcode {</div><div class='ctx'> 	EVENT_RING_OPCODE_FORWARD_SETUP,</div><div class='ctx'> 	EVENT_RING_OPCODE_RSS_UPDATE_RULES,</div><div class='ctx'> 	EVENT_RING_OPCODE_FUNCTION_UPDATE,</div><div class='del'>-	EVENT_RING_OPCODE_RESERVED1,</div><div class='add'>+	EVENT_RING_OPCODE_AFEX_VIF_LISTS,</div><div class='ctx'> 	EVENT_RING_OPCODE_SET_MAC,</div><div class='ctx'> 	EVENT_RING_OPCODE_CLASSIFICATION_RULES,</div><div class='ctx'> 	EVENT_RING_OPCODE_FILTERS_RULES,</div><div class='hunk'>@@ -4763,16 +4942,6 @@ enum fairness_mode {</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * per-vnic fairness variables</div><div class='del'>- */</div><div class='del'>-struct fairness_vars_per_vn {</div><div class='del'>-	u32 cos_credit_delta[MAX_COS_NUMBER];</div><div class='del'>-	u32 vn_credit_delta;</div><div class='del'>-	u32 __reserved0;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Priority and cos</div><div class='ctx'>  */</div><div class='ctx'> struct priority_cos {</div><div class='hunk'>@@ -4800,12 +4969,27 @@ struct flow_control_configuration {</div><div class='ctx'> struct function_start_data {</div><div class='ctx'> 	__le16 function_mode;</div><div class='ctx'> 	__le16 sd_vlan_tag;</div><div class='del'>-	u16 reserved;</div><div class='add'>+	__le16 vif_id;</div><div class='ctx'> 	u8 path_id;</div><div class='ctx'> 	u8 network_cos_mode;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+struct function_update_data {</div><div class='add'>+	u8 vif_id_change_flg;</div><div class='add'>+	u8 afex_default_vlan_change_flg;</div><div class='add'>+	u8 allowed_priorities_change_flg;</div><div class='add'>+	u8 network_cos_mode_change_flg;</div><div class='add'>+	__le16 vif_id;</div><div class='add'>+	__le16 afex_default_vlan;</div><div class='add'>+	u8 allowed_priorities;</div><div class='add'>+	u8 network_cos_mode;</div><div class='add'>+	u8 lb_mode_en;</div><div class='add'>+	u8 reserved0;</div><div class='add'>+	__le32 reserved1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * FW version stored in the Xstorm RAM</div><div class='ctx'>  */</div><div class='hunk'>@@ -5003,7 +5187,7 @@ enum mf_mode {</div><div class='ctx'> 	SINGLE_FUNCTION,</div><div class='ctx'> 	MULTI_FUNCTION_SD,</div><div class='ctx'> 	MULTI_FUNCTION_SI,</div><div class='del'>-	MULTI_FUNCTION_RESERVED,</div><div class='add'>+	MULTI_FUNCTION_AFEX,</div><div class='ctx'> 	MAX_MF_MODE</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -5128,6 +5312,7 @@ union protocol_common_specific_data {</div><div class='ctx'> 	u8 protocol_data[8];</div><div class='ctx'> 	struct regpair phy_address;</div><div class='ctx'> 	struct regpair mac_config_addr;</div><div class='add'>+	struct afex_vif_list_ramrod_data afex_vif_list_data;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -5140,29 +5325,6 @@ struct protocol_common_spe {</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * a single rate shaping counter. can be used as protocol or vnic counter</div><div class='del'>- */</div><div class='del'>-struct rate_shaping_counter {</div><div class='del'>-	u32 quota;</div><div class='del'>-#if defined(__BIG_ENDIAN)</div><div class='del'>-	u16 __reserved0;</div><div class='del'>-	u16 rate;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN)</div><div class='del'>-	u16 rate;</div><div class='del'>-	u16 __reserved0;</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * per-vnic rate shaping variables</div><div class='del'>- */</div><div class='del'>-struct rate_shaping_vars_per_vn {</div><div class='del'>-	struct rate_shaping_counter vn_counter;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * The send queue element</div><div class='ctx'>  */</div><div class='ctx'> struct slow_path_element {</div><div class='hunk'>@@ -5330,6 +5492,18 @@ enum vf_pf_channel_state {</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * vif_list_rule_kind</div><div class='add'>+ */</div><div class='add'>+enum vif_list_rule_kind {</div><div class='add'>+	VIF_LIST_RULE_SET,</div><div class='add'>+	VIF_LIST_RULE_GET,</div><div class='add'>+	VIF_LIST_RULE_CLEAR_ALL,</div><div class='add'>+	VIF_LIST_RULE_CLEAR_FUNC,</div><div class='add'>+	MAX_VIF_LIST_RULE_KIND</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * zone A per-queue data</div><div class='ctx'>  */</div><div class='ctx'> struct xstorm_queue_zone_data {</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h<br/>index 29f5c3cca31a..559c396d45cc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h</a></div><div class='hunk'>@@ -125,7 +125,7 @@ enum {</div><div class='ctx'> 	MODE_MF                        = 0x00000100,</div><div class='ctx'> 	MODE_MF_SD                     = 0x00000200,</div><div class='ctx'> 	MODE_MF_SI                     = 0x00000400,</div><div class='del'>-	MODE_MF_NIV                    = 0x00000800,</div><div class='add'>+	MODE_MF_AFEX                   = 0x00000800,</div><div class='ctx'> 	MODE_E3_A0                     = 0x00001000,</div><div class='ctx'> 	MODE_E3_B0                     = 0x00002000,</div><div class='ctx'> 	MODE_COS3                      = 0x00004000,</div><div class='hunk'>@@ -241,7 +241,8 @@ static inline void bnx2x_map_q_cos(struct bnx2x *bp, u32 q_num, u32 new_cos)</div><div class='ctx'> 			REG_WR(bp, reg_addr, reg_bit_map | q_bit_map);</div><div class='ctx'> </div><div class='ctx'> 			/* set/clear queue bit in command-queue bit map</div><div class='del'>-			(E2/E3A0 only, valid COS values are 0/1) */</div><div class='add'>+			 * (E2/E3A0 only, valid COS values are 0/1)</div><div class='add'>+			 */</div><div class='ctx'> 			if (!(INIT_MODE_FLAGS(bp) &amp; MODE_E3_B0)) {</div><div class='ctx'> 				reg_addr = BNX2X_Q_CMDQ_REG_ADDR(pf_q_num);</div><div class='ctx'> 				reg_bit_map = REG_RD(bp, reg_addr);</div><div class='hunk'>@@ -277,7 +278,215 @@ static inline void bnx2x_dcb_config_qm(struct bnx2x *bp, enum cos_mode mode,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/* Returns the index of start or end of a specific block stage in ops array*/</div><div class='add'>+/* congestion managment port init api description</div><div class='add'>+ * the api works as follows:</div><div class='add'>+ * the driver should pass the cmng_init_input struct, the port_init function</div><div class='add'>+ * will prepare the required internal ram structure which will be passed back</div><div class='add'>+ * to the driver (cmng_init) that will write it into the internal ram.</div><div class='add'>+ *</div><div class='add'>+ * IMPORTANT REMARKS:</div><div class='add'>+ * 1. the cmng_init struct does not represent the contiguous internal ram</div><div class='add'>+ *    structure. the driver should use the XSTORM_CMNG_PERPORT_VARS_OFFSET</div><div class='add'>+ *    offset in order to write the port sub struct and the</div><div class='add'>+ *    PFID_FROM_PORT_AND_VNIC offset for writing the vnic sub struct (in other</div><div class='add'>+ *    words - don't use memcpy!).</div><div class='add'>+ * 2. although the cmng_init struct is filled for the maximal vnic number</div><div class='add'>+ *    possible, the driver should only write the valid vnics into the internal</div><div class='add'>+ *    ram according to the appropriate port mode.</div><div class='add'>+ */</div><div class='add'>+#define BITS_TO_BYTES(x) ((x)/8)</div><div class='add'>+</div><div class='add'>+/* CMNG constants, as derived from system spec calculations */</div><div class='add'>+</div><div class='add'>+/* default MIN rate in case VNIC min rate is configured to zero- 100Mbps */</div><div class='add'>+#define DEF_MIN_RATE 100</div><div class='add'>+</div><div class='add'>+/* resolution of the rate shaping timer - 400 usec */</div><div class='add'>+#define RS_PERIODIC_TIMEOUT_USEC 400</div><div class='add'>+</div><div class='add'>+/* number of bytes in single QM arbitration cycle -</div><div class='add'>+ * coefficient for calculating the fairness timer</div><div class='add'>+ */</div><div class='add'>+#define QM_ARB_BYTES 160000</div><div class='add'>+</div><div class='add'>+/* resolution of Min algorithm 1:100 */</div><div class='add'>+#define MIN_RES 100</div><div class='add'>+</div><div class='add'>+/* how many bytes above threshold for</div><div class='add'>+ * the minimal credit of Min algorithm</div><div class='add'>+ */</div><div class='add'>+#define MIN_ABOVE_THRESH 32768</div><div class='add'>+</div><div class='add'>+/* Fairness algorithm integration time coefficient -</div><div class='add'>+ * for calculating the actual Tfair</div><div class='add'>+ */</div><div class='add'>+#define T_FAIR_COEF ((MIN_ABOVE_THRESH + QM_ARB_BYTES) * 8 * MIN_RES)</div><div class='add'>+</div><div class='add'>+/* Memory of fairness algorithm - 2 cycles */</div><div class='add'>+#define FAIR_MEM 2</div><div class='add'>+#define SAFC_TIMEOUT_USEC 52</div><div class='add'>+</div><div class='add'>+#define SDM_TICKS 4</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static inline void bnx2x_init_max(const struct cmng_init_input *input_data,</div><div class='add'>+				  u32 r_param, struct cmng_init *ram_data)</div><div class='add'>+{</div><div class='add'>+	u32 vnic;</div><div class='add'>+	struct cmng_vnic *vdata = &amp;ram_data-&gt;vnic;</div><div class='add'>+	struct cmng_struct_per_port *pdata = &amp;ram_data-&gt;port;</div><div class='add'>+	/* rate shaping per-port variables</div><div class='add'>+	 * 100 micro seconds in SDM ticks = 25</div><div class='add'>+	 * since each tick is 4 microSeconds</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	pdata-&gt;rs_vars.rs_periodic_timeout =</div><div class='add'>+	RS_PERIODIC_TIMEOUT_USEC / SDM_TICKS;</div><div class='add'>+</div><div class='add'>+	/* this is the threshold below which no timer arming will occur.</div><div class='add'>+	 * 1.25 coefficient is for the threshold to be a little bigger</div><div class='add'>+	 * then the real time to compensate for timer in-accuracy</div><div class='add'>+	 */</div><div class='add'>+	pdata-&gt;rs_vars.rs_threshold =</div><div class='add'>+	(5 * RS_PERIODIC_TIMEOUT_USEC * r_param)/4;</div><div class='add'>+</div><div class='add'>+	/* rate shaping per-vnic variables */</div><div class='add'>+	for (vnic = 0; vnic &lt; BNX2X_PORT2_MODE_NUM_VNICS; vnic++) {</div><div class='add'>+		/* global vnic counter */</div><div class='add'>+		vdata-&gt;vnic_max_rate[vnic].vn_counter.rate =</div><div class='add'>+		input_data-&gt;vnic_max_rate[vnic];</div><div class='add'>+		/* maximal Mbps for this vnic</div><div class='add'>+		 * the quota in each timer period - number of bytes</div><div class='add'>+		 * transmitted in this period</div><div class='add'>+		 */</div><div class='add'>+		vdata-&gt;vnic_max_rate[vnic].vn_counter.quota =</div><div class='add'>+			RS_PERIODIC_TIMEOUT_USEC *</div><div class='add'>+			(u32)vdata-&gt;vnic_max_rate[vnic].vn_counter.rate / 8;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void bnx2x_init_min(const struct cmng_init_input *input_data,</div><div class='add'>+				  u32 r_param, struct cmng_init *ram_data)</div><div class='add'>+{</div><div class='add'>+	u32 vnic, fair_periodic_timeout_usec, vnicWeightSum, tFair;</div><div class='add'>+	struct cmng_vnic *vdata = &amp;ram_data-&gt;vnic;</div><div class='add'>+	struct cmng_struct_per_port *pdata = &amp;ram_data-&gt;port;</div><div class='add'>+</div><div class='add'>+	/* this is the resolution of the fairness timer */</div><div class='add'>+	fair_periodic_timeout_usec = QM_ARB_BYTES / r_param;</div><div class='add'>+</div><div class='add'>+	/* fairness per-port variables</div><div class='add'>+	 * for 10G it is 1000usec. for 1G it is 10000usec.</div><div class='add'>+	 */</div><div class='add'>+	tFair = T_FAIR_COEF / input_data-&gt;port_rate;</div><div class='add'>+</div><div class='add'>+	/* this is the threshold below which we won't arm the timer anymore */</div><div class='add'>+	pdata-&gt;fair_vars.fair_threshold = QM_ARB_BYTES;</div><div class='add'>+</div><div class='add'>+	/* we multiply by 1e3/8 to get bytes/msec. We don't want the credits</div><div class='add'>+	 * to pass a credit of the T_FAIR*FAIR_MEM (algorithm resolution)</div><div class='add'>+	 */</div><div class='add'>+	pdata-&gt;fair_vars.upper_bound = r_param * tFair * FAIR_MEM;</div><div class='add'>+</div><div class='add'>+	/* since each tick is 4 microSeconds */</div><div class='add'>+	pdata-&gt;fair_vars.fairness_timeout =</div><div class='add'>+				fair_periodic_timeout_usec / SDM_TICKS;</div><div class='add'>+</div><div class='add'>+	/* calculate sum of weights */</div><div class='add'>+	vnicWeightSum = 0;</div><div class='add'>+</div><div class='add'>+	for (vnic = 0; vnic &lt; BNX2X_PORT2_MODE_NUM_VNICS; vnic++)</div><div class='add'>+		vnicWeightSum += input_data-&gt;vnic_min_rate[vnic];</div><div class='add'>+</div><div class='add'>+	/* global vnic counter */</div><div class='add'>+	if (vnicWeightSum &gt; 0) {</div><div class='add'>+		/* fairness per-vnic variables */</div><div class='add'>+		for (vnic = 0; vnic &lt; BNX2X_PORT2_MODE_NUM_VNICS; vnic++) {</div><div class='add'>+			/* this is the credit for each period of the fairness</div><div class='add'>+			 * algorithm - number of bytes in T_FAIR (this vnic</div><div class='add'>+			 * share of the port rate)</div><div class='add'>+			 */</div><div class='add'>+			vdata-&gt;vnic_min_rate[vnic].vn_credit_delta =</div><div class='add'>+				(u32)input_data-&gt;vnic_min_rate[vnic] * 100 *</div><div class='add'>+				(T_FAIR_COEF / (8 * 100 * vnicWeightSum));</div><div class='add'>+			if (vdata-&gt;vnic_min_rate[vnic].vn_credit_delta &lt;</div><div class='add'>+			    pdata-&gt;fair_vars.fair_threshold +</div><div class='add'>+			    MIN_ABOVE_THRESH) {</div><div class='add'>+				vdata-&gt;vnic_min_rate[vnic].vn_credit_delta =</div><div class='add'>+					pdata-&gt;fair_vars.fair_threshold +</div><div class='add'>+					MIN_ABOVE_THRESH;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void bnx2x_init_fw_wrr(const struct cmng_init_input *input_data,</div><div class='add'>+				     u32 r_param, struct cmng_init *ram_data)</div><div class='add'>+{</div><div class='add'>+	u32 vnic, cos;</div><div class='add'>+	u32 cosWeightSum = 0;</div><div class='add'>+	struct cmng_vnic *vdata = &amp;ram_data-&gt;vnic;</div><div class='add'>+	struct cmng_struct_per_port *pdata = &amp;ram_data-&gt;port;</div><div class='add'>+</div><div class='add'>+	for (cos = 0; cos &lt; MAX_COS_NUMBER; cos++)</div><div class='add'>+		cosWeightSum += input_data-&gt;cos_min_rate[cos];</div><div class='add'>+</div><div class='add'>+	if (cosWeightSum &gt; 0) {</div><div class='add'>+</div><div class='add'>+		for (vnic = 0; vnic &lt; BNX2X_PORT2_MODE_NUM_VNICS; vnic++) {</div><div class='add'>+			/* Since cos and vnic shouldn't work together the rate</div><div class='add'>+			 * to divide between the coses is the port rate.</div><div class='add'>+			 */</div><div class='add'>+			u32 *ccd = vdata-&gt;vnic_min_rate[vnic].cos_credit_delta;</div><div class='add'>+			for (cos = 0; cos &lt; MAX_COS_NUMBER; cos++) {</div><div class='add'>+				/* this is the credit for each period of</div><div class='add'>+				 * the fairness algorithm - number of bytes</div><div class='add'>+				 * in T_FAIR (this cos share of the vnic rate)</div><div class='add'>+				 */</div><div class='add'>+				ccd[cos] =</div><div class='add'>+				    (u32)input_data-&gt;cos_min_rate[cos] * 100 *</div><div class='add'>+				    (T_FAIR_COEF / (8 * 100 * cosWeightSum));</div><div class='add'>+				 if (ccd[cos] &lt; pdata-&gt;fair_vars.fair_threshold</div><div class='add'>+						+ MIN_ABOVE_THRESH) {</div><div class='add'>+					ccd[cos] =</div><div class='add'>+					    pdata-&gt;fair_vars.fair_threshold +</div><div class='add'>+					    MIN_ABOVE_THRESH;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void bnx2x_init_safc(const struct cmng_init_input *input_data,</div><div class='add'>+				   struct cmng_init *ram_data)</div><div class='add'>+{</div><div class='add'>+	/* in microSeconds */</div><div class='add'>+	ram_data-&gt;port.safc_vars.safc_timeout_usec = SAFC_TIMEOUT_USEC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Congestion management port init */</div><div class='add'>+static inline void bnx2x_init_cmng(const struct cmng_init_input *input_data,</div><div class='add'>+				   struct cmng_init *ram_data)</div><div class='add'>+{</div><div class='add'>+	u32 r_param;</div><div class='add'>+	memset(ram_data, 0, sizeof(struct cmng_init));</div><div class='add'>+</div><div class='add'>+	ram_data-&gt;port.flags = input_data-&gt;flags;</div><div class='add'>+</div><div class='add'>+	/* number of bytes transmitted in a rate of 10Gbps</div><div class='add'>+	 * in one usec = 1.25KB.</div><div class='add'>+	 */</div><div class='add'>+	r_param = BITS_TO_BYTES(input_data-&gt;port_rate);</div><div class='add'>+	bnx2x_init_max(input_data, r_param, ram_data);</div><div class='add'>+	bnx2x_init_min(input_data, r_param, ram_data);</div><div class='add'>+	bnx2x_init_fw_wrr(input_data, r_param, ram_data);</div><div class='add'>+	bnx2x_init_safc(input_data, ram_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Returns the index of start or end of a specific block stage in ops array */</div><div class='ctx'> #define BLOCK_OPS_IDX(block, stage, end) \</div><div class='ctx'> 			(2*(((block)*NUM_OF_INIT_PHASES) + (stage)) + (end))</div><div class='ctx'> </div><div class='hunk'>@@ -499,9 +708,7 @@ static inline void bnx2x_disable_blocks_parity(struct bnx2x *bp)</div><div class='ctx'> 	bnx2x_set_mcp_parity(bp, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * Clear the parity error status registers.</div><div class='del'>- */</div><div class='add'>+/* Clear the parity error status registers. */</div><div class='ctx'> static inline void bnx2x_clear_blocks_parity(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c<br/>index 64392ec410a3..a3fb7215cd89 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c</a></div><div class='hunk'>@@ -138,7 +138,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/* */</div><div class='ctx'> #define SFP_EEPROM_CON_TYPE_ADDR		0x2</div><div class='ctx'> 	#define SFP_EEPROM_CON_TYPE_VAL_LC	0x7</div><div class='ctx'> 	#define SFP_EEPROM_CON_TYPE_VAL_COPPER	0x21</div><div class='hunk'>@@ -404,8 +403,7 @@ static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)</div><div class='ctx'> </div><div class='ctx'> 	DP(NETIF_MSG_LINK, "ETS E2E3 disabled configuration\n");</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * mapping between entry  priority to client number (0,1,2 -debug and</div><div class='add'>+	/* mapping between entry  priority to client number (0,1,2 -debug and</div><div class='ctx'> 	 * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST)</div><div class='ctx'> 	 * 3bits client num.</div><div class='ctx'> 	 *   PRI4    |    PRI3    |    PRI2    |    PRI1    |    PRI0</div><div class='hunk'>@@ -413,8 +411,7 @@ static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, 0x4688);</div><div class='del'>-	/*</div><div class='del'>-	 * Bitmap of 5bits length. Each bit specifies whether the entry behaves</div><div class='add'>+	/* Bitmap of 5bits length. Each bit specifies whether the entry behaves</div><div class='ctx'> 	 * as strict.  Bits 0,1,2 - debug and management entries, 3 -</div><div class='ctx'> 	 * COS0 entry, 4 - COS1 entry.</div><div class='ctx'> 	 * COS1 | COS0 | DEBUG1 | DEBUG0 | MGMT</div><div class='hunk'>@@ -425,13 +422,11 @@ static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)</div><div class='ctx'> 	REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x7);</div><div class='ctx'> 	/* defines which entries (clients) are subjected to WFQ arbitration */</div><div class='ctx'> 	REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0);</div><div class='del'>-	/*</div><div class='del'>-	 * For strict priority entries defines the number of consecutive</div><div class='add'>+	/* For strict priority entries defines the number of consecutive</div><div class='ctx'> 	 * slots for the highest priority.</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100);</div><div class='del'>-	/*</div><div class='del'>-	 * mapping between the CREDIT_WEIGHT registers and actual client</div><div class='add'>+	/* mapping between the CREDIT_WEIGHT registers and actual client</div><div class='ctx'> 	 * numbers</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP, 0);</div><div class='hunk'>@@ -443,8 +438,7 @@ static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)</div><div class='ctx'> 	REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, 0);</div><div class='ctx'> 	/* ETS mode disable */</div><div class='ctx'> 	REG_WR(bp, PBF_REG_ETS_ENABLED, 0);</div><div class='del'>-	/*</div><div class='del'>-	 * If ETS mode is enabled (there is no strict priority) defines a WFQ</div><div class='add'>+	/* If ETS mode is enabled (there is no strict priority) defines a WFQ</div><div class='ctx'> 	 * weight for COS0/COS1.</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, PBF_REG_COS0_WEIGHT, 0x2710);</div><div class='hunk'>@@ -471,10 +465,9 @@ static u32 bnx2x_ets_get_min_w_val_nig(const struct link_vars *vars)</div><div class='ctx'> 			min_w_val = ETS_E3B0_NIG_MIN_W_VAL_UP_TO_10GBPS;</div><div class='ctx'> 	} else</div><div class='ctx'> 		min_w_val = ETS_E3B0_NIG_MIN_W_VAL_20GBPS;</div><div class='del'>-	/**</div><div class='del'>-	 *  If the link isn't up (static configuration for example ) The</div><div class='del'>-	 *  link will be according to 20GBPS.</div><div class='del'>-	*/</div><div class='add'>+	/* If the link isn't up (static configuration for example ) The</div><div class='add'>+	 * link will be according to 20GBPS.</div><div class='add'>+	 */</div><div class='ctx'> 	return min_w_val;</div><div class='ctx'> }</div><div class='ctx'> /******************************************************************************</div><div class='hunk'>@@ -538,8 +531,7 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='ctx'> 	const u8 port = params-&gt;port;</div><div class='ctx'> 	const u32 min_w_val = bnx2x_ets_get_min_w_val_nig(vars);</div><div class='del'>-	/**</div><div class='del'>-	 * mapping between entry  priority to client number (0,1,2 -debug and</div><div class='add'>+	/* Mapping between entry  priority to client number (0,1,2 -debug and</div><div class='ctx'> 	 * management clients, 3 - COS0 client, 4 - COS1, ... 8 -</div><div class='ctx'> 	 * COS5)(HIGHEST) 4bits client num.TODO_ETS - Should be done by</div><div class='ctx'> 	 * reset value or init tool</div><div class='hunk'>@@ -551,18 +543,14 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,</div><div class='ctx'> 		REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_LSB, 0x76543210);</div><div class='ctx'> 		REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_MSB, 0x8);</div><div class='ctx'> 	}</div><div class='del'>-	/**</div><div class='del'>-	* For strict priority entries defines the number of consecutive</div><div class='del'>-	* slots for the highest priority.</div><div class='del'>-	*/</div><div class='del'>-	/* TODO_ETS - Should be done by reset value or init tool */</div><div class='add'>+	/* For strict priority entries defines the number of consecutive</div><div class='add'>+	 * slots for the highest priority.</div><div class='add'>+	 */</div><div class='ctx'> 	REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS :</div><div class='ctx'> 		   NIG_REG_P1_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100);</div><div class='del'>-	/**</div><div class='del'>-	 * mapping between the CREDIT_WEIGHT registers and actual client</div><div class='add'>+	/* Mapping between the CREDIT_WEIGHT registers and actual client</div><div class='ctx'> 	 * numbers</div><div class='ctx'> 	 */</div><div class='del'>-	/* TODO_ETS - Should be done by reset value or init tool */</div><div class='ctx'> 	if (port) {</div><div class='ctx'> 		/*Port 1 has 6 COS*/</div><div class='ctx'> 		REG_WR(bp, NIG_REG_P1_TX_ARB_CLIENT_CREDIT_MAP2_LSB, 0x210543);</div><div class='hunk'>@@ -574,8 +562,7 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,</div><div class='ctx'> 		REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP2_MSB, 0x5);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/**</div><div class='del'>-	 * Bitmap of 5bits length. Each bit specifies whether the entry behaves</div><div class='add'>+	/* Bitmap of 5bits length. Each bit specifies whether the entry behaves</div><div class='ctx'> 	 * as strict.  Bits 0,1,2 - debug and management entries, 3 -</div><div class='ctx'> 	 * COS0 entry, 4 - COS1 entry.</div><div class='ctx'> 	 * COS1 | COS0 | DEBUG1 | DEBUG0 | MGMT</div><div class='hunk'>@@ -590,13 +577,12 @@ static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,</div><div class='ctx'> 	REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CLIENT_IS_SUBJECT2WFQ :</div><div class='ctx'> 		   NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0);</div><div class='ctx'> </div><div class='del'>-	/**</div><div class='del'>-	* Please notice the register address are note continuous and a</div><div class='del'>-	* for here is note appropriate.In 2 port mode port0 only COS0-5</div><div class='del'>-	* can be used. DEBUG1,DEBUG1,MGMT are never used for WFQ* In 4</div><div class='del'>-	* port mode port1 only COS0-2 can be used. DEBUG1,DEBUG1,MGMT</div><div class='del'>-	* are never used for WFQ</div><div class='del'>-	*/</div><div class='add'>+	/* Please notice the register address are note continuous and a</div><div class='add'>+	 * for here is note appropriate.In 2 port mode port0 only COS0-5</div><div class='add'>+	 * can be used. DEBUG1,DEBUG1,MGMT are never used for WFQ* In 4</div><div class='add'>+	 * port mode port1 only COS0-2 can be used. DEBUG1,DEBUG1,MGMT</div><div class='add'>+	 * are never used for WFQ</div><div class='add'>+	 */</div><div class='ctx'> 	REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_0 :</div><div class='ctx'> 		   NIG_REG_P0_TX_ARB_CREDIT_WEIGHT_0, 0x0);</div><div class='ctx'> 	REG_WR(bp, (port) ? NIG_REG_P1_TX_ARB_CREDIT_WEIGHT_1 :</div><div class='hunk'>@@ -633,10 +619,9 @@ static void bnx2x_ets_e3b0_set_credit_upper_bound_pbf(</div><div class='ctx'> 	u32 base_upper_bound = 0;</div><div class='ctx'> 	u8 max_cos = 0;</div><div class='ctx'> 	u8 i = 0;</div><div class='del'>-	/**</div><div class='del'>-	* In 2 port mode port0 has COS0-5 that can be used for WFQ.In 4</div><div class='del'>-	* port mode port1 has COS0-2 that can be used for WFQ.</div><div class='del'>-	*/</div><div class='add'>+	/* In 2 port mode port0 has COS0-5 that can be used for WFQ.In 4</div><div class='add'>+	 * port mode port1 has COS0-2 that can be used for WFQ.</div><div class='add'>+	 */</div><div class='ctx'> 	if (!port) {</div><div class='ctx'> 		base_upper_bound = PBF_REG_COS0_UPPER_BOUND_P0;</div><div class='ctx'> 		max_cos = DCBX_E3B0_MAX_NUM_COS_PORT0;</div><div class='hunk'>@@ -666,8 +651,7 @@ static void bnx2x_ets_e3b0_pbf_disabled(const struct link_params *params)</div><div class='ctx'> 	u32 base_weight = 0;</div><div class='ctx'> 	u8 max_cos = 0;</div><div class='ctx'> </div><div class='del'>-	/**</div><div class='del'>-	 * mapping between entry  priority to client number 0 - COS0</div><div class='add'>+	/* Mapping between entry  priority to client number 0 - COS0</div><div class='ctx'> 	 * client, 2 - COS1, ... 5 - COS5)(HIGHEST) 4bits client num.</div><div class='ctx'> 	 * TODO_ETS - Should be done by reset value or init tool</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -695,10 +679,9 @@ static void bnx2x_ets_e3b0_pbf_disabled(const struct link_params *params)</div><div class='ctx'> </div><div class='ctx'> 	REG_WR(bp, (port) ? PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P1 :</div><div class='ctx'> 		   PBF_REG_ETS_ARB_CLIENT_IS_SUBJECT2WFQ_P0 , 0);</div><div class='del'>-	/**</div><div class='del'>-	* In 2 port mode port0 has COS0-5 that can be used for WFQ.</div><div class='del'>-	* In 4 port mode port1 has COS0-2 that can be used for WFQ.</div><div class='del'>-	*/</div><div class='add'>+	/* In 2 port mode port0 has COS0-5 that can be used for WFQ.</div><div class='add'>+	 * In 4 port mode port1 has COS0-2 that can be used for WFQ.</div><div class='add'>+	 */</div><div class='ctx'> 	if (!port) {</div><div class='ctx'> 		base_weight = PBF_REG_COS0_WEIGHT_P0;</div><div class='ctx'> 		max_cos = DCBX_E3B0_MAX_NUM_COS_PORT0;</div><div class='hunk'>@@ -738,7 +721,7 @@ static int bnx2x_ets_e3b0_disabled(const struct link_params *params,</div><div class='ctx'> /******************************************************************************</div><div class='ctx'> * Description:</div><div class='ctx'> *	Disable will return basicly the values to init values.</div><div class='del'>-*.</div><div class='add'>+*</div><div class='ctx'> ******************************************************************************/</div><div class='ctx'> int bnx2x_ets_disabled(struct link_params *params,</div><div class='ctx'> 		      struct link_vars *vars)</div><div class='hunk'>@@ -867,7 +850,7 @@ static int bnx2x_ets_e3b0_set_cos_bw(struct bnx2x *bp,</div><div class='ctx'> /******************************************************************************</div><div class='ctx'> * Description:</div><div class='ctx'> *	Calculate the total BW.A value of 0 isn't legal.</div><div class='del'>-*.</div><div class='add'>+*</div><div class='ctx'> ******************************************************************************/</div><div class='ctx'> static int bnx2x_ets_e3b0_get_total_bw(</div><div class='ctx'> 	const struct link_params *params,</div><div class='hunk'>@@ -879,7 +862,6 @@ static int bnx2x_ets_e3b0_get_total_bw(</div><div class='ctx'> 	u8 is_bw_cos_exist = 0;</div><div class='ctx'> </div><div class='ctx'> 	*total_bw = 0 ;</div><div class='del'>-</div><div class='ctx'> 	/* Calculate total BW requested */</div><div class='ctx'> 	for (cos_idx = 0; cos_idx &lt; ets_params-&gt;num_of_cos; cos_idx++) {</div><div class='ctx'> 		if (ets_params-&gt;cos[cos_idx].state == bnx2x_cos_state_bw) {</div><div class='hunk'>@@ -887,10 +869,9 @@ static int bnx2x_ets_e3b0_get_total_bw(</div><div class='ctx'> 			if (!ets_params-&gt;cos[cos_idx].params.bw_params.bw) {</div><div class='ctx'> 				DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config BW"</div><div class='ctx'> 						   "was set to 0\n");</div><div class='del'>-				/*</div><div class='del'>-				 * This is to prevent a state when ramrods</div><div class='add'>+				/* This is to prevent a state when ramrods</div><div class='ctx'> 				 * can't be sent</div><div class='del'>-				*/</div><div class='add'>+				 */</div><div class='ctx'> 				ets_params-&gt;cos[cos_idx].params.bw_params.bw</div><div class='ctx'> 					 = 1;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -908,8 +889,7 @@ static int bnx2x_ets_e3b0_get_total_bw(</div><div class='ctx'> 		}</div><div class='ctx'> 		DP(NETIF_MSG_LINK,</div><div class='ctx'> 		   "bnx2x_ets_E3B0_config total BW should be 100\n");</div><div class='del'>-		/*</div><div class='del'>-		 * We can handle a case whre the BW isn't 100 this can happen</div><div class='add'>+		/* We can handle a case whre the BW isn't 100 this can happen</div><div class='ctx'> 		 * if the TC are joined.</div><div class='ctx'> 		 */</div><div class='ctx'> 	}</div><div class='hunk'>@@ -919,7 +899,7 @@ static int bnx2x_ets_e3b0_get_total_bw(</div><div class='ctx'> /******************************************************************************</div><div class='ctx'> * Description:</div><div class='ctx'> *	Invalidate all the sp_pri_to_cos.</div><div class='del'>-*.</div><div class='add'>+*</div><div class='ctx'> ******************************************************************************/</div><div class='ctx'> static void bnx2x_ets_e3b0_sp_pri_to_cos_init(u8 *sp_pri_to_cos)</div><div class='ctx'> {</div><div class='hunk'>@@ -931,7 +911,7 @@ static void bnx2x_ets_e3b0_sp_pri_to_cos_init(u8 *sp_pri_to_cos)</div><div class='ctx'> * Description:</div><div class='ctx'> *	Calculate and set the SP (ARB_PRIORITY_CLIENT) NIG and PBF registers</div><div class='ctx'> *	according to sp_pri_to_cos.</div><div class='del'>-*.</div><div class='add'>+*</div><div class='ctx'> ******************************************************************************/</div><div class='ctx'> static int bnx2x_ets_e3b0_sp_pri_to_cos_set(const struct link_params *params,</div><div class='ctx'> 					    u8 *sp_pri_to_cos, const u8 pri,</div><div class='hunk'>@@ -964,7 +944,7 @@ static int bnx2x_ets_e3b0_sp_pri_to_cos_set(const struct link_params *params,</div><div class='ctx'> * Description:</div><div class='ctx'> *	Returns the correct value according to COS and priority in</div><div class='ctx'> *	the sp_pri_cli register.</div><div class='del'>-*.</div><div class='add'>+*</div><div class='ctx'> ******************************************************************************/</div><div class='ctx'> static u64 bnx2x_e3b0_sp_get_pri_cli_reg(const u8 cos, const u8 cos_offset,</div><div class='ctx'> 					 const u8 pri_set,</div><div class='hunk'>@@ -981,7 +961,7 @@ static u64 bnx2x_e3b0_sp_get_pri_cli_reg(const u8 cos, const u8 cos_offset,</div><div class='ctx'> * Description:</div><div class='ctx'> *	Returns the correct value according to COS and priority in the</div><div class='ctx'> *	sp_pri_cli register for NIG.</div><div class='del'>-*.</div><div class='add'>+*</div><div class='ctx'> ******************************************************************************/</div><div class='ctx'> static u64 bnx2x_e3b0_sp_get_pri_cli_reg_nig(const u8 cos, const u8 pri_set)</div><div class='ctx'> {</div><div class='hunk'>@@ -997,7 +977,7 @@ static u64 bnx2x_e3b0_sp_get_pri_cli_reg_nig(const u8 cos, const u8 pri_set)</div><div class='ctx'> * Description:</div><div class='ctx'> *	Returns the correct value according to COS and priority in the</div><div class='ctx'> *	sp_pri_cli register for PBF.</div><div class='del'>-*.</div><div class='add'>+*</div><div class='ctx'> ******************************************************************************/</div><div class='ctx'> static u64 bnx2x_e3b0_sp_get_pri_cli_reg_pbf(const u8 cos, const u8 pri_set)</div><div class='ctx'> {</div><div class='hunk'>@@ -1013,7 +993,7 @@ static u64 bnx2x_e3b0_sp_get_pri_cli_reg_pbf(const u8 cos, const u8 pri_set)</div><div class='ctx'> * Description:</div><div class='ctx'> *	Calculate and set the SP (ARB_PRIORITY_CLIENT) NIG and PBF registers</div><div class='ctx'> *	according to sp_pri_to_cos.(which COS has higher priority)</div><div class='del'>-*.</div><div class='add'>+*</div><div class='ctx'> ******************************************************************************/</div><div class='ctx'> static int bnx2x_ets_e3b0_sp_set_pri_cli_reg(const struct link_params *params,</div><div class='ctx'> 					     u8 *sp_pri_to_cos)</div><div class='hunk'>@@ -1149,8 +1129,7 @@ int bnx2x_ets_e3b0_config(const struct link_params *params,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Upper bound is set according to current link speed (min_w_val</div><div class='add'>+	/* Upper bound is set according to current link speed (min_w_val</div><div class='ctx'> 	 * should be the same for upper bound and COS credit val).</div><div class='ctx'> 	 */</div><div class='ctx'> 	bnx2x_ets_e3b0_set_credit_upper_bound_nig(params, min_w_val_nig);</div><div class='hunk'>@@ -1160,8 +1139,7 @@ int bnx2x_ets_e3b0_config(const struct link_params *params,</div><div class='ctx'> 	for (cos_entry = 0; cos_entry &lt; ets_params-&gt;num_of_cos; cos_entry++) {</div><div class='ctx'> 		if (bnx2x_cos_state_bw == ets_params-&gt;cos[cos_entry].state) {</div><div class='ctx'> 			cos_bw_bitmap |= (1 &lt;&lt; cos_entry);</div><div class='del'>-			/*</div><div class='del'>-			 * The function also sets the BW in HW(not the mappin</div><div class='add'>+			/* The function also sets the BW in HW(not the mappin</div><div class='ctx'> 			 * yet)</div><div class='ctx'> 			 */</div><div class='ctx'> 			bnx2x_status = bnx2x_ets_e3b0_set_cos_bw(</div><div class='hunk'>@@ -1217,14 +1195,12 @@ static void bnx2x_ets_bw_limit_common(const struct link_params *params)</div><div class='ctx'> 	/* ETS disabled configuration */</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='ctx'> 	DP(NETIF_MSG_LINK, "ETS enabled BW limit configuration\n");</div><div class='del'>-	/*</div><div class='del'>-	 * defines which entries (clients) are subjected to WFQ arbitration</div><div class='add'>+	/* Defines which entries (clients) are subjected to WFQ arbitration</div><div class='ctx'> 	 * COS0 0x8</div><div class='ctx'> 	 * COS1 0x10</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0x18);</div><div class='del'>-	/*</div><div class='del'>-	 * mapping between the ARB_CREDIT_WEIGHT registers and actual</div><div class='add'>+	/* Mapping between the ARB_CREDIT_WEIGHT registers and actual</div><div class='ctx'> 	 * client numbers (WEIGHT_0 does not actually have to represent</div><div class='ctx'> 	 * client 0)</div><div class='ctx'> 	 *    PRI4    |    PRI3    |    PRI2    |    PRI1    |    PRI0</div><div class='hunk'>@@ -1242,8 +1218,7 @@ static void bnx2x_ets_bw_limit_common(const struct link_params *params)</div><div class='ctx'> </div><div class='ctx'> 	/* Defines the number of consecutive slots for the strict priority */</div><div class='ctx'> 	REG_WR(bp, PBF_REG_NUM_STRICT_ARB_SLOTS, 0);</div><div class='del'>-	/*</div><div class='del'>-	 * Bitmap of 5bits length. Each bit specifies whether the entry behaves</div><div class='add'>+	/* Bitmap of 5bits length. Each bit specifies whether the entry behaves</div><div class='ctx'> 	 * as strict.  Bits 0,1,2 - debug and management entries, 3 - COS0</div><div class='ctx'> 	 * entry, 4 - COS1 entry.</div><div class='ctx'> 	 * COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT</div><div class='hunk'>@@ -1298,8 +1273,7 @@ int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)</div><div class='ctx'> 	u32 val	= 0;</div><div class='ctx'> </div><div class='ctx'> 	DP(NETIF_MSG_LINK, "ETS enabled strict configuration\n");</div><div class='del'>-	/*</div><div class='del'>-	 * Bitmap of 5bits length. Each bit specifies whether the entry behaves</div><div class='add'>+	/* Bitmap of 5bits length. Each bit specifies whether the entry behaves</div><div class='ctx'> 	 * as strict.  Bits 0,1,2 - debug and management entries,</div><div class='ctx'> 	 * 3 - COS0 entry, 4 - COS1 entry.</div><div class='ctx'> 	 *  COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT</div><div class='hunk'>@@ -1307,8 +1281,7 @@ int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)</div><div class='ctx'> 	 * MCP and debug are strict</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x1F);</div><div class='del'>-	/*</div><div class='del'>-	 * For strict priority entries defines the number of consecutive slots</div><div class='add'>+	/* For strict priority entries defines the number of consecutive slots</div><div class='ctx'> 	 * for the highest priority.</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100);</div><div class='hunk'>@@ -1320,8 +1293,7 @@ int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)</div><div class='ctx'> 	/* Defines the number of consecutive slots for the strict priority */</div><div class='ctx'> 	REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, strict_cos);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * mapping between entry  priority to client number (0,1,2 -debug and</div><div class='add'>+	/* Mapping between entry  priority to client number (0,1,2 -debug and</div><div class='ctx'> 	 * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST)</div><div class='ctx'> 	 * 3bits client num.</div><div class='ctx'> 	 *   PRI4    |    PRI3    |    PRI2    |    PRI1    |    PRI0</div><div class='hunk'>@@ -1356,15 +1328,12 @@ static void bnx2x_update_pfc_xmac(struct link_params *params,</div><div class='ctx'> 	if (!(params-&gt;feature_config_flags &amp;</div><div class='ctx'> 	      FEATURE_CONFIG_PFC_ENABLED)) {</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * RX flow control - Process pause frame in receive direction</div><div class='add'>+		/* RX flow control - Process pause frame in receive direction</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (vars-&gt;flow_ctrl &amp; BNX2X_FLOW_CTRL_RX)</div><div class='ctx'> 			pause_val |= XMAC_PAUSE_CTRL_REG_RX_PAUSE_EN;</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * TX flow control - Send pause packet when buffer is full</div><div class='del'>-		 */</div><div class='add'>+		/* TX flow control - Send pause packet when buffer is full */</div><div class='ctx'> 		if (vars-&gt;flow_ctrl &amp; BNX2X_FLOW_CTRL_TX)</div><div class='ctx'> 			pause_val |= XMAC_PAUSE_CTRL_REG_TX_PAUSE_EN;</div><div class='ctx'> 	} else {/* PFC support */</div><div class='hunk'>@@ -1457,8 +1426,7 @@ void bnx2x_pfc_statistic(struct link_params *params, struct link_vars *vars,</div><div class='ctx'> static void bnx2x_set_mdio_clk(struct bnx2x *bp, u32 chip_id, u8 port)</div><div class='ctx'> {</div><div class='ctx'> 	u32 mode, emac_base;</div><div class='del'>-	/**</div><div class='del'>-	 * Set clause 45 mode, slow down the MDIO clock to 2.5MHz</div><div class='add'>+	/* Set clause 45 mode, slow down the MDIO clock to 2.5MHz</div><div class='ctx'> 	 * (a value of 49==0x31) and make sure that the AUTO poll is off</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='hunk'>@@ -1578,15 +1546,6 @@ static void bnx2x_umac_enable(struct link_params *params,</div><div class='ctx'> </div><div class='ctx'> 	DP(NETIF_MSG_LINK, "enabling UMAC\n");</div><div class='ctx'> </div><div class='del'>-	/**</div><div class='del'>-	 * This register determines on which events the MAC will assert</div><div class='del'>-	 * error on the i/f to the NIG along w/ EOP.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/**</div><div class='del'>-	 * BD REG_WR(bp, NIG_REG_P0_MAC_RSV_ERR_MASK +</div><div class='del'>-	 * params-&gt;port*0x14,      0xfffff.</div><div class='del'>-	 */</div><div class='ctx'> 	/* This register opens the gate for the UMAC despite its name */</div><div class='ctx'> 	REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params-&gt;port*4, 1);</div><div class='ctx'> </div><div class='hunk'>@@ -1649,8 +1608,7 @@ static void bnx2x_umac_enable(struct link_params *params,</div><div class='ctx'> 		val |= UMAC_COMMAND_CONFIG_REG_LOOP_ENA;</div><div class='ctx'> 	REG_WR(bp, umac_base + UMAC_REG_COMMAND_CONFIG, val);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Maximum Frame Length (RW). Defines a 14-Bit maximum frame</div><div class='add'>+	/* Maximum Frame Length (RW). Defines a 14-Bit maximum frame</div><div class='ctx'> 	 * length used by the MAC receive logic to check frames.</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, umac_base + UMAC_REG_MAXFR, 0x2710);</div><div class='hunk'>@@ -1666,8 +1624,7 @@ static void bnx2x_xmac_init(struct link_params *params, u32 max_speed)</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='ctx'> 	u32 is_port4mode = bnx2x_is_4_port_mode(bp);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * In 4-port mode, need to set the mode only once, so if XMAC is</div><div class='add'>+	/* In 4-port mode, need to set the mode only once, so if XMAC is</div><div class='ctx'> 	 * already out of reset, it means the mode has already been set,</div><div class='ctx'> 	 * and it must not* reset the XMAC again, since it controls both</div><div class='ctx'> 	 * ports of the path</div><div class='hunk'>@@ -1691,13 +1648,13 @@ static void bnx2x_xmac_init(struct link_params *params, u32 max_speed)</div><div class='ctx'> 	if (is_port4mode) {</div><div class='ctx'> 		DP(NETIF_MSG_LINK, "Init XMAC to 2 ports x 10G per path\n");</div><div class='ctx'> </div><div class='del'>-		/*  Set the number of ports on the system side to up to 2 */</div><div class='add'>+		/* Set the number of ports on the system side to up to 2 */</div><div class='ctx'> 		REG_WR(bp, MISC_REG_XMAC_CORE_PORT_MODE, 1);</div><div class='ctx'> </div><div class='ctx'> 		/* Set the number of ports on the Warp Core to 10G */</div><div class='ctx'> 		REG_WR(bp, MISC_REG_XMAC_PHY_PORT_MODE, 3);</div><div class='ctx'> 	} else {</div><div class='del'>-		/*  Set the number of ports on the system side to 1 */</div><div class='add'>+		/* Set the number of ports on the system side to 1 */</div><div class='ctx'> 		REG_WR(bp, MISC_REG_XMAC_CORE_PORT_MODE, 0);</div><div class='ctx'> 		if (max_speed == SPEED_10000) {</div><div class='ctx'> 			DP(NETIF_MSG_LINK,</div><div class='hunk'>@@ -1729,8 +1686,7 @@ static void bnx2x_xmac_disable(struct link_params *params)</div><div class='ctx'> </div><div class='ctx'> 	if (REG_RD(bp, MISC_REG_RESET_REG_2) &amp;</div><div class='ctx'> 	    MISC_REGISTERS_RESET_REG_2_XMAC) {</div><div class='del'>-		/*</div><div class='del'>-		 * Send an indication to change the state in the NIG back to XON</div><div class='add'>+		/* Send an indication to change the state in the NIG back to XON</div><div class='ctx'> 		 * Clearing this bit enables the next set of this bit to get</div><div class='ctx'> 		 * rising edge</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -1755,13 +1711,11 @@ static int bnx2x_xmac_enable(struct link_params *params,</div><div class='ctx'> </div><div class='ctx'> 	bnx2x_xmac_init(params, vars-&gt;line_speed);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * This register determines on which events the MAC will assert</div><div class='add'>+	/* This register determines on which events the MAC will assert</div><div class='ctx'> 	 * error on the i/f to the NIG along w/ EOP.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * This register tells the NIG whether to send traffic to UMAC</div><div class='add'>+	/* This register tells the NIG whether to send traffic to UMAC</div><div class='ctx'> 	 * or XMAC</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params-&gt;port*4, 0);</div><div class='hunk'>@@ -1863,8 +1817,7 @@ static int bnx2x_emac_enable(struct link_params *params,</div><div class='ctx'> 	val = REG_RD(bp, emac_base + EMAC_REG_EMAC_RX_MODE);</div><div class='ctx'> 	val |= EMAC_RX_MODE_KEEP_VLAN_TAG | EMAC_RX_MODE_PROMISCUOUS;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Setting this bit causes MAC control frames (except for pause</div><div class='add'>+	/* Setting this bit causes MAC control frames (except for pause</div><div class='ctx'> 	 * frames) to be passed on for processing. This setting has no</div><div class='ctx'> 	 * affect on the operation of the pause frames. This bit effects</div><div class='ctx'> 	 * all packets regardless of RX Parser packet sorting logic.</div><div class='hunk'>@@ -1963,8 +1916,7 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params,</div><div class='ctx'> 				   struct link_vars *vars,</div><div class='ctx'> 				   u8 is_lb)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * Set rx control: Strip CRC and enable BigMAC to relay</div><div class='add'>+	/* Set rx control: Strip CRC and enable BigMAC to relay</div><div class='ctx'> 	 * control packets to the system as well</div><div class='ctx'> 	 */</div><div class='ctx'> 	u32 wb_data[2];</div><div class='hunk'>@@ -2016,8 +1968,7 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params,</div><div class='ctx'> </div><div class='ctx'> 	REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, wb_data, 2);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Set Time (based unit is 512 bit time) between automatic</div><div class='add'>+	/* Set Time (based unit is 512 bit time) between automatic</div><div class='ctx'> 	 * re-sending of PP packets amd enable automatic re-send of</div><div class='ctx'> 	 * Per-Priroity Packet as long as pp_gen is asserted and</div><div class='ctx'> 	 * pp_disable is low.</div><div class='hunk'>@@ -2086,7 +2037,7 @@ static int bnx2x_pfc_brb_get_config_params(</div><div class='ctx'> 	config_val-&gt;default_class1.full_xon = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (CHIP_IS_E2(bp)) {</div><div class='del'>-		/*  class0 defaults */</div><div class='add'>+		/* Class0 defaults */</div><div class='ctx'> 		config_val-&gt;default_class0.pause_xoff =</div><div class='ctx'> 			DEFAULT0_E2_BRB_MAC_PAUSE_XOFF_THR;</div><div class='ctx'> 		config_val-&gt;default_class0.pause_xon =</div><div class='hunk'>@@ -2095,7 +2046,7 @@ static int bnx2x_pfc_brb_get_config_params(</div><div class='ctx'> 			DEFAULT0_E2_BRB_MAC_FULL_XOFF_THR;</div><div class='ctx'> 		config_val-&gt;default_class0.full_xon =</div><div class='ctx'> 			DEFAULT0_E2_BRB_MAC_FULL_XON_THR;</div><div class='del'>-		/*  pause able*/</div><div class='add'>+		/* Pause able*/</div><div class='ctx'> 		config_val-&gt;pauseable_th.pause_xoff =</div><div class='ctx'> 			PFC_E2_BRB_MAC_PAUSE_XOFF_THR_PAUSE;</div><div class='ctx'> 		config_val-&gt;pauseable_th.pause_xon =</div><div class='hunk'>@@ -2114,7 +2065,7 @@ static int bnx2x_pfc_brb_get_config_params(</div><div class='ctx'> 		config_val-&gt;non_pauseable_th.full_xon =</div><div class='ctx'> 			PFC_E2_BRB_MAC_FULL_XON_THR_NON_PAUSE;</div><div class='ctx'> 	} else if (CHIP_IS_E3A0(bp)) {</div><div class='del'>-		/*  class0 defaults */</div><div class='add'>+		/* Class0 defaults */</div><div class='ctx'> 		config_val-&gt;default_class0.pause_xoff =</div><div class='ctx'> 			DEFAULT0_E3A0_BRB_MAC_PAUSE_XOFF_THR;</div><div class='ctx'> 		config_val-&gt;default_class0.pause_xon =</div><div class='hunk'>@@ -2123,7 +2074,7 @@ static int bnx2x_pfc_brb_get_config_params(</div><div class='ctx'> 			DEFAULT0_E3A0_BRB_MAC_FULL_XOFF_THR;</div><div class='ctx'> 		config_val-&gt;default_class0.full_xon =</div><div class='ctx'> 			DEFAULT0_E3A0_BRB_MAC_FULL_XON_THR;</div><div class='del'>-		/*  pause able */</div><div class='add'>+		/* Pause able */</div><div class='ctx'> 		config_val-&gt;pauseable_th.pause_xoff =</div><div class='ctx'> 			PFC_E3A0_BRB_MAC_PAUSE_XOFF_THR_PAUSE;</div><div class='ctx'> 		config_val-&gt;pauseable_th.pause_xon =</div><div class='hunk'>@@ -2142,7 +2093,7 @@ static int bnx2x_pfc_brb_get_config_params(</div><div class='ctx'> 		config_val-&gt;non_pauseable_th.full_xon =</div><div class='ctx'> 			PFC_E3A0_BRB_MAC_FULL_XON_THR_NON_PAUSE;</div><div class='ctx'> 	} else if (CHIP_IS_E3B0(bp)) {</div><div class='del'>-		/*  class0 defaults */</div><div class='add'>+		/* Class0 defaults */</div><div class='ctx'> 		config_val-&gt;default_class0.pause_xoff =</div><div class='ctx'> 			DEFAULT0_E3B0_BRB_MAC_PAUSE_XOFF_THR;</div><div class='ctx'> 		config_val-&gt;default_class0.pause_xon =</div><div class='hunk'>@@ -2305,27 +2256,23 @@ static int bnx2x_update_pfc_brb(struct link_params *params,</div><div class='ctx'> 			reg_th_config = &amp;config_val.non_pauseable_th;</div><div class='ctx'> 	} else</div><div class='ctx'> 		reg_th_config = &amp;config_val.default_class0;</div><div class='del'>-	/*</div><div class='del'>-	 * The number of free blocks below which the pause signal to class 0</div><div class='add'>+	/* The number of free blocks below which the pause signal to class 0</div><div class='ctx'> 	 * of MAC #n is asserted. n=0,1</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, (port) ? BRB1_REG_PAUSE_0_XOFF_THRESHOLD_1 :</div><div class='ctx'> 	       BRB1_REG_PAUSE_0_XOFF_THRESHOLD_0 ,</div><div class='ctx'> 	       reg_th_config-&gt;pause_xoff);</div><div class='del'>-	/*</div><div class='del'>-	 * The number of free blocks above which the pause signal to class 0</div><div class='add'>+	/* The number of free blocks above which the pause signal to class 0</div><div class='ctx'> 	 * of MAC #n is de-asserted. n=0,1</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, (port) ? BRB1_REG_PAUSE_0_XON_THRESHOLD_1 :</div><div class='ctx'> 	       BRB1_REG_PAUSE_0_XON_THRESHOLD_0 , reg_th_config-&gt;pause_xon);</div><div class='del'>-	/*</div><div class='del'>-	 * The number of free blocks below which the full signal to class 0</div><div class='add'>+	/* The number of free blocks below which the full signal to class 0</div><div class='ctx'> 	 * of MAC #n is asserted. n=0,1</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, (port) ? BRB1_REG_FULL_0_XOFF_THRESHOLD_1 :</div><div class='ctx'> 	       BRB1_REG_FULL_0_XOFF_THRESHOLD_0 , reg_th_config-&gt;full_xoff);</div><div class='del'>-	/*</div><div class='del'>-	 * The number of free blocks above which the full signal to class 0</div><div class='add'>+	/* The number of free blocks above which the full signal to class 0</div><div class='ctx'> 	 * of MAC #n is de-asserted. n=0,1</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, (port) ? BRB1_REG_FULL_0_XON_THRESHOLD_1 :</div><div class='hunk'>@@ -2339,30 +2286,26 @@ static int bnx2x_update_pfc_brb(struct link_params *params,</div><div class='ctx'> 			reg_th_config = &amp;config_val.non_pauseable_th;</div><div class='ctx'> 	} else</div><div class='ctx'> 		reg_th_config = &amp;config_val.default_class1;</div><div class='del'>-	/*</div><div class='del'>-	 * The number of free blocks below which the pause signal to</div><div class='add'>+	/* The number of free blocks below which the pause signal to</div><div class='ctx'> 	 * class 1 of MAC #n is asserted. n=0,1</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, (port) ? BRB1_REG_PAUSE_1_XOFF_THRESHOLD_1 :</div><div class='ctx'> 	       BRB1_REG_PAUSE_1_XOFF_THRESHOLD_0,</div><div class='ctx'> 	       reg_th_config-&gt;pause_xoff);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The number of free blocks above which the pause signal to</div><div class='add'>+	/* The number of free blocks above which the pause signal to</div><div class='ctx'> 	 * class 1 of MAC #n is de-asserted. n=0,1</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, (port) ? BRB1_REG_PAUSE_1_XON_THRESHOLD_1 :</div><div class='ctx'> 	       BRB1_REG_PAUSE_1_XON_THRESHOLD_0,</div><div class='ctx'> 	       reg_th_config-&gt;pause_xon);</div><div class='del'>-	/*</div><div class='del'>-	 * The number of free blocks below which the full signal to</div><div class='add'>+	/* The number of free blocks below which the full signal to</div><div class='ctx'> 	 * class 1 of MAC #n is asserted. n=0,1</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, (port) ? BRB1_REG_FULL_1_XOFF_THRESHOLD_1 :</div><div class='ctx'> 	       BRB1_REG_FULL_1_XOFF_THRESHOLD_0,</div><div class='ctx'> 	       reg_th_config-&gt;full_xoff);</div><div class='del'>-	/*</div><div class='del'>-	 * The number of free blocks above which the full signal to</div><div class='add'>+	/* The number of free blocks above which the full signal to</div><div class='ctx'> 	 * class 1 of MAC #n is de-asserted. n=0,1</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, (port) ? BRB1_REG_FULL_1_XON_THRESHOLD_1 :</div><div class='hunk'>@@ -2379,49 +2322,41 @@ static int bnx2x_update_pfc_brb(struct link_params *params,</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_PER_CLASS_GUARANTY_MODE,</div><div class='ctx'> 			   e3b0_val.per_class_guaranty_mode);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * The hysteresis on the guarantied buffer space for the Lb</div><div class='add'>+		/* The hysteresis on the guarantied buffer space for the Lb</div><div class='ctx'> 		 * port before signaling XON.</div><div class='ctx'> 		 */</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_LB_GUARANTIED_HYST,</div><div class='ctx'> 			   e3b0_val.lb_guarantied_hyst);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * The number of free blocks below which the full signal to the</div><div class='add'>+		/* The number of free blocks below which the full signal to the</div><div class='ctx'> 		 * LB port is asserted.</div><div class='ctx'> 		 */</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_FULL_LB_XOFF_THRESHOLD,</div><div class='ctx'> 		       e3b0_val.full_lb_xoff_th);</div><div class='del'>-		/*</div><div class='del'>-		 * The number of free blocks above which the full signal to the</div><div class='add'>+		/* The number of free blocks above which the full signal to the</div><div class='ctx'> 		 * LB port is de-asserted.</div><div class='ctx'> 		 */</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_FULL_LB_XON_THRESHOLD,</div><div class='ctx'> 		       e3b0_val.full_lb_xon_threshold);</div><div class='del'>-		/*</div><div class='del'>-		 * The number of blocks guarantied for the MAC #n port. n=0,1</div><div class='add'>+		/* The number of blocks guarantied for the MAC #n port. n=0,1</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='del'>-		/* The number of blocks guarantied for the LB port.*/</div><div class='add'>+		/* The number of blocks guarantied for the LB port. */</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_LB_GUARANTIED,</div><div class='ctx'> 		       e3b0_val.lb_guarantied);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * The number of blocks guarantied for the MAC #n port.</div><div class='del'>-		 */</div><div class='add'>+		/* The number of blocks guarantied for the MAC #n port. */</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_MAC_GUARANTIED_0,</div><div class='ctx'> 		       2 * e3b0_val.mac_0_class_t_guarantied);</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_MAC_GUARANTIED_1,</div><div class='ctx'> 		       2 * e3b0_val.mac_1_class_t_guarantied);</div><div class='del'>-		/*</div><div class='del'>-		 * The number of blocks guarantied for class #t in MAC0. t=0,1</div><div class='add'>+		/* The number of blocks guarantied for class #t in MAC0. t=0,1</div><div class='ctx'> 		 */</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_MAC_0_CLASS_0_GUARANTIED,</div><div class='ctx'> 		       e3b0_val.mac_0_class_t_guarantied);</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_MAC_0_CLASS_1_GUARANTIED,</div><div class='ctx'> 		       e3b0_val.mac_0_class_t_guarantied);</div><div class='del'>-		/*</div><div class='del'>-		 * The hysteresis on the guarantied buffer space for class in</div><div class='add'>+		/* The hysteresis on the guarantied buffer space for class in</div><div class='ctx'> 		 * MAC0.  t=0,1</div><div class='ctx'> 		 */</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_MAC_0_CLASS_0_GUARANTIED_HYST,</div><div class='hunk'>@@ -2429,15 +2364,13 @@ static int bnx2x_update_pfc_brb(struct link_params *params,</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_MAC_0_CLASS_1_GUARANTIED_HYST,</div><div class='ctx'> 		       e3b0_val.mac_0_class_t_guarantied_hyst);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * The number of blocks guarantied for class #t in MAC1.t=0,1</div><div class='add'>+		/* The number of blocks guarantied for class #t in MAC1.t=0,1</div><div class='ctx'> 		 */</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_MAC_1_CLASS_0_GUARANTIED,</div><div class='ctx'> 		       e3b0_val.mac_1_class_t_guarantied);</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_MAC_1_CLASS_1_GUARANTIED,</div><div class='ctx'> 		       e3b0_val.mac_1_class_t_guarantied);</div><div class='del'>-		/*</div><div class='del'>-		 * The hysteresis on the guarantied buffer space for class #t</div><div class='add'>+		/* The hysteresis on the guarantied buffer space for class #t</div><div class='ctx'> 		 * in MAC1.  t=0,1</div><div class='ctx'> 		 */</div><div class='ctx'> 		REG_WR(bp, BRB1_REG_MAC_1_CLASS_0_GUARANTIED_HYST,</div><div class='hunk'>@@ -2520,15 +2453,13 @@ static void bnx2x_update_pfc_nig(struct link_params *params,</div><div class='ctx'> 		FEATURE_CONFIG_PFC_ENABLED;</div><div class='ctx'> 	DP(NETIF_MSG_LINK, "updating pfc nig parameters\n");</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * When NIG_LLH0_XCM_MASK_REG_LLHX_XCM_MASK_BCN bit is set</div><div class='add'>+	/* When NIG_LLH0_XCM_MASK_REG_LLHX_XCM_MASK_BCN bit is set</div><div class='ctx'> 	 * MAC control frames (that are not pause packets)</div><div class='ctx'> 	 * will be forwarded to the XCM.</div><div class='ctx'> 	 */</div><div class='ctx'> 	xcm_mask = REG_RD(bp, port ? NIG_REG_LLH1_XCM_MASK :</div><div class='ctx'> 			  NIG_REG_LLH0_XCM_MASK);</div><div class='del'>-	/*</div><div class='del'>-	 * nig params will override non PFC params, since it's possible to</div><div class='add'>+	/* NIG params will override non PFC params, since it's possible to</div><div class='ctx'> 	 * do transition from PFC to SAFC</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (set_pfc) {</div><div class='hunk'>@@ -2548,7 +2479,7 @@ static void bnx2x_update_pfc_nig(struct link_params *params,</div><div class='ctx'> 			llfc_out_en = nig_params-&gt;llfc_out_en;</div><div class='ctx'> 			llfc_enable = nig_params-&gt;llfc_enable;</div><div class='ctx'> 			pause_enable = nig_params-&gt;pause_enable;</div><div class='del'>-		} else  /*defaul non PFC mode - PAUSE */</div><div class='add'>+		} else  /* Default non PFC mode - PAUSE */</div><div class='ctx'> 			pause_enable = 1;</div><div class='ctx'> </div><div class='ctx'> 		xcm_mask |= (port ? NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN :</div><div class='hunk'>@@ -2608,8 +2539,7 @@ int bnx2x_update_pfc(struct link_params *params,</div><div class='ctx'> 		      struct link_vars *vars,</div><div class='ctx'> 		      struct bnx2x_nig_brb_pfc_port_params *pfc_params)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * The PFC and pause are orthogonal to one another, meaning when</div><div class='add'>+	/* The PFC and pause are orthogonal to one another, meaning when</div><div class='ctx'> 	 * PFC is enabled, the pause are disabled, and when PFC is</div><div class='ctx'> 	 * disabled, pause are set according to the pause result.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -3148,7 +3078,6 @@ static int bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,</div><div class='ctx'> 			      EMAC_MDIO_STATUS_10MB);</div><div class='ctx'> </div><div class='ctx'> 	/* address */</div><div class='del'>-</div><div class='ctx'> 	tmp = ((phy-&gt;addr &lt;&lt; 21) | (devad &lt;&lt; 16) | reg |</div><div class='ctx'> 	       EMAC_MDIO_COMM_COMMAND_ADDRESS |</div><div class='ctx'> 	       EMAC_MDIO_COMM_START_BUSY);</div><div class='hunk'>@@ -3337,8 +3266,7 @@ int bnx2x_phy_read(struct link_params *params, u8 phy_addr,</div><div class='ctx'> 		   u8 devad, u16 reg, u16 *ret_val)</div><div class='ctx'> {</div><div class='ctx'> 	u8 phy_index;</div><div class='del'>-	/*</div><div class='del'>-	 * Probe for the phy according to the given phy_addr, and execute</div><div class='add'>+	/* Probe for the phy according to the given phy_addr, and execute</div><div class='ctx'> 	 * the read request on it</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (phy_index = 0; phy_index &lt; params-&gt;num_phys; phy_index++) {</div><div class='hunk'>@@ -3355,8 +3283,7 @@ int bnx2x_phy_write(struct link_params *params, u8 phy_addr,</div><div class='ctx'> 		    u8 devad, u16 reg, u16 val)</div><div class='ctx'> {</div><div class='ctx'> 	u8 phy_index;</div><div class='del'>-	/*</div><div class='del'>-	 * Probe for the phy according to the given phy_addr, and execute</div><div class='add'>+	/* Probe for the phy according to the given phy_addr, and execute</div><div class='ctx'> 	 * the write request on it</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (phy_index = 0; phy_index &lt; params-&gt;num_phys; phy_index++) {</div><div class='hunk'>@@ -3382,7 +3309,7 @@ static u8 bnx2x_get_warpcore_lane(struct bnx2x_phy *phy,</div><div class='ctx'> 	if (bnx2x_is_4_port_mode(bp)) {</div><div class='ctx'> 		u32 port_swap, port_swap_ovr;</div><div class='ctx'> </div><div class='del'>-		/*figure out path swap value */</div><div class='add'>+		/* Figure out path swap value */</div><div class='ctx'> 		path_swap_ovr = REG_RD(bp, MISC_REG_FOUR_PORT_PATH_SWAP_OVWR);</div><div class='ctx'> 		if (path_swap_ovr &amp; 0x1)</div><div class='ctx'> 			path_swap = (path_swap_ovr &amp; 0x2);</div><div class='hunk'>@@ -3392,7 +3319,7 @@ static u8 bnx2x_get_warpcore_lane(struct bnx2x_phy *phy,</div><div class='ctx'> 		if (path_swap)</div><div class='ctx'> 			path = path ^ 1;</div><div class='ctx'> </div><div class='del'>-		/*figure out port swap value */</div><div class='add'>+		/* Figure out port swap value */</div><div class='ctx'> 		port_swap_ovr = REG_RD(bp, MISC_REG_FOUR_PORT_PORT_SWAP_OVWR);</div><div class='ctx'> 		if (port_swap_ovr &amp; 0x1)</div><div class='ctx'> 			port_swap = (port_swap_ovr &amp; 0x2);</div><div class='hunk'>@@ -3405,7 +3332,7 @@ static u8 bnx2x_get_warpcore_lane(struct bnx2x_phy *phy,</div><div class='ctx'> 		lane = (port&lt;&lt;1) + path;</div><div class='ctx'> 	} else { /* two port mode - no port swap */</div><div class='ctx'> </div><div class='del'>-		/*figure out path swap value */</div><div class='add'>+		/* Figure out path swap value */</div><div class='ctx'> 		path_swap_ovr =</div><div class='ctx'> 			REG_RD(bp, MISC_REG_TWO_PORT_PATH_SWAP_OVWR);</div><div class='ctx'> 		if (path_swap_ovr &amp; 0x1) {</div><div class='hunk'>@@ -3437,8 +3364,7 @@ static void bnx2x_set_aer_mmd(struct link_params *params,</div><div class='ctx'> </div><div class='ctx'> 	if (USES_WARPCORE(bp)) {</div><div class='ctx'> 		aer_val = bnx2x_get_warpcore_lane(phy, params);</div><div class='del'>-		/*</div><div class='del'>-		 * In Dual-lane mode, two lanes are joined together,</div><div class='add'>+		/* In Dual-lane mode, two lanes are joined together,</div><div class='ctx'> 		 * so in order to configure them, the AER broadcast method is</div><div class='ctx'> 		 * used here.</div><div class='ctx'> 		 * 0x200 is the broadcast address for lanes 0,1</div><div class='hunk'>@@ -3518,8 +3444,7 @@ static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy,</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='ctx'> 	*ieee_fc = MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX;</div><div class='del'>-	/**</div><div class='del'>-	 * resolve pause mode and advertisement Please refer to Table</div><div class='add'>+	/* Resolve pause mode and advertisement Please refer to Table</div><div class='ctx'> 	 * 28B-3 of the 802.3ab-1999 spec</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='hunk'>@@ -3642,6 +3567,7 @@ static void bnx2x_pause_resolve(struct link_vars *vars, u32 pause_result)</div><div class='ctx'> 		vars-&gt;link_status |= LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE;</div><div class='ctx'> 	if (pause_result &amp; (1&lt;&lt;1))</div><div class='ctx'> 		vars-&gt;link_status |= LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE;</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bnx2x_ext_phy_update_adv_fc(struct bnx2x_phy *phy,</div><div class='hunk'>@@ -3698,6 +3624,7 @@ static void bnx2x_ext_phy_update_adv_fc(struct bnx2x_phy *phy,</div><div class='ctx'> 	bnx2x_pause_resolve(vars, pause_result);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='add'>+</div><div class='ctx'> static u8 bnx2x_ext_phy_resolve_fc(struct bnx2x_phy *phy,</div><div class='ctx'> 				   struct link_params *params,</div><div class='ctx'> 				   struct link_vars *vars)</div><div class='hunk'>@@ -3819,9 +3746,7 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy,</div><div class='ctx'> </div><div class='ctx'> 	/* Advertise pause */</div><div class='ctx'> 	bnx2x_ext_phy_set_pause(params, phy, vars);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set KR Autoneg Work-Around flag for Warpcore version older than D108</div><div class='add'>+	/* Set KR Autoneg Work-Around flag for Warpcore version older than D108</div><div class='ctx'> 	 */</div><div class='ctx'> 	bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD,</div><div class='ctx'> 			MDIO_WC_REG_UC_INFO_B1_VERSION, &amp;val16);</div><div class='hunk'>@@ -3829,7 +3754,6 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy,</div><div class='ctx'> 		DP(NETIF_MSG_LINK, "Enable AN KR work-around\n");</div><div class='ctx'> 		vars-&gt;rx_tx_asic_rst = MAX_KR_LINK_RETRY;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD,</div><div class='ctx'> 			MDIO_WC_REG_DIGITAL5_MISC7, &amp;val16);</div><div class='ctx'> </div><div class='hunk'>@@ -3903,7 +3827,7 @@ static void bnx2x_warpcore_set_10G_KR(struct bnx2x_phy *phy,</div><div class='ctx'> 	bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD,</div><div class='ctx'> 			 MDIO_WC_REG_IEEE0BLK_AUTONEGNP, 0xB);</div><div class='ctx'> </div><div class='del'>-	/*Enable encoded forced speed */</div><div class='add'>+	/* Enable encoded forced speed */</div><div class='ctx'> 	bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,</div><div class='ctx'> 			 MDIO_WC_REG_SERDESDIGITAL_MISC2, 0x30);</div><div class='ctx'> </div><div class='hunk'>@@ -4265,8 +4189,7 @@ static int bnx2x_get_mod_abs_int_cfg(struct bnx2x *bp,</div><div class='ctx'> 				PORT_HW_CFG_E3_MOD_ABS_MASK) &gt;&gt;</div><div class='ctx'> 				PORT_HW_CFG_E3_MOD_ABS_SHIFT;</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Should not happen. This function called upon interrupt</div><div class='add'>+		/* Should not happen. This function called upon interrupt</div><div class='ctx'> 		 * triggered by GPIO ( since EPIO can only generate interrupts</div><div class='ctx'> 		 * to MCP).</div><div class='ctx'> 		 * So if this function was called and none of the GPIOs was set,</div><div class='hunk'>@@ -4366,7 +4289,7 @@ static void bnx2x_warpcore_config_runtime(struct bnx2x_phy *phy,</div><div class='ctx'> 					"link up, rx_tx_asic_rst 0x%x\n",</div><div class='ctx'> 					vars-&gt;rx_tx_asic_rst);</div><div class='ctx'> 			} else {</div><div class='del'>-				/*reset the lane to see if link comes up.*/</div><div class='add'>+				/* Reset the lane to see if link comes up.*/</div><div class='ctx'> 				bnx2x_warpcore_reset_lane(bp, phy, 1);</div><div class='ctx'> 				bnx2x_warpcore_reset_lane(bp, phy, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -4387,7 +4310,6 @@ static void bnx2x_warpcore_config_runtime(struct bnx2x_phy *phy,</div><div class='ctx'> 	} /*params-&gt;rx_tx_asic_rst*/</div><div class='ctx'> </div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> static void bnx2x_warpcore_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 				       struct link_params *params,</div><div class='ctx'> 				       struct link_vars *vars)</div><div class='hunk'>@@ -4545,7 +4467,7 @@ static void bnx2x_warpcore_link_reset(struct bnx2x_phy *phy,</div><div class='ctx'> 	/* Update those 1-copy registers */</div><div class='ctx'> 	CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK,</div><div class='ctx'> 			  MDIO_AER_BLOCK_AER_REG, 0);</div><div class='del'>-		/* Enable 1G MDIO (1-copy) */</div><div class='add'>+	/* Enable 1G MDIO (1-copy) */</div><div class='ctx'> 	bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD,</div><div class='ctx'> 			MDIO_WC_REG_XGXSBLK0_XGXSCONTROL,</div><div class='ctx'> 			&amp;val16);</div><div class='hunk'>@@ -4624,43 +4546,43 @@ void bnx2x_sync_link(struct link_params *params,</div><div class='ctx'> 		vars-&gt;duplex = DUPLEX_FULL;</div><div class='ctx'> 		switch (vars-&gt;link_status &amp;</div><div class='ctx'> 			LINK_STATUS_SPEED_AND_DUPLEX_MASK) {</div><div class='del'>-			case LINK_10THD:</div><div class='del'>-				vars-&gt;duplex = DUPLEX_HALF;</div><div class='del'>-				/* fall thru */</div><div class='del'>-			case LINK_10TFD:</div><div class='del'>-				vars-&gt;line_speed = SPEED_10;</div><div class='del'>-				break;</div><div class='add'>+		case LINK_10THD:</div><div class='add'>+			vars-&gt;duplex = DUPLEX_HALF;</div><div class='add'>+			/* Fall thru */</div><div class='add'>+		case LINK_10TFD:</div><div class='add'>+			vars-&gt;line_speed = SPEED_10;</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-			case LINK_100TXHD:</div><div class='del'>-				vars-&gt;duplex = DUPLEX_HALF;</div><div class='del'>-				/* fall thru */</div><div class='del'>-			case LINK_100T4:</div><div class='del'>-			case LINK_100TXFD:</div><div class='del'>-				vars-&gt;line_speed = SPEED_100;</div><div class='del'>-				break;</div><div class='add'>+		case LINK_100TXHD:</div><div class='add'>+			vars-&gt;duplex = DUPLEX_HALF;</div><div class='add'>+			/* Fall thru */</div><div class='add'>+		case LINK_100T4:</div><div class='add'>+		case LINK_100TXFD:</div><div class='add'>+			vars-&gt;line_speed = SPEED_100;</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-			case LINK_1000THD:</div><div class='del'>-				vars-&gt;duplex = DUPLEX_HALF;</div><div class='del'>-				/* fall thru */</div><div class='del'>-			case LINK_1000TFD:</div><div class='del'>-				vars-&gt;line_speed = SPEED_1000;</div><div class='del'>-				break;</div><div class='add'>+		case LINK_1000THD:</div><div class='add'>+			vars-&gt;duplex = DUPLEX_HALF;</div><div class='add'>+			/* Fall thru */</div><div class='add'>+		case LINK_1000TFD:</div><div class='add'>+			vars-&gt;line_speed = SPEED_1000;</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-			case LINK_2500THD:</div><div class='del'>-				vars-&gt;duplex = DUPLEX_HALF;</div><div class='del'>-				/* fall thru */</div><div class='del'>-			case LINK_2500TFD:</div><div class='del'>-				vars-&gt;line_speed = SPEED_2500;</div><div class='del'>-				break;</div><div class='add'>+		case LINK_2500THD:</div><div class='add'>+			vars-&gt;duplex = DUPLEX_HALF;</div><div class='add'>+			/* Fall thru */</div><div class='add'>+		case LINK_2500TFD:</div><div class='add'>+			vars-&gt;line_speed = SPEED_2500;</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-			case LINK_10GTFD:</div><div class='del'>-				vars-&gt;line_speed = SPEED_10000;</div><div class='del'>-				break;</div><div class='del'>-			case LINK_20GTFD:</div><div class='del'>-				vars-&gt;line_speed = SPEED_20000;</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				break;</div><div class='add'>+		case LINK_10GTFD:</div><div class='add'>+			vars-&gt;line_speed = SPEED_10000;</div><div class='add'>+			break;</div><div class='add'>+		case LINK_20GTFD:</div><div class='add'>+			vars-&gt;line_speed = SPEED_20000;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		vars-&gt;flow_ctrl = 0;</div><div class='ctx'> 		if (vars-&gt;link_status &amp; LINK_STATUS_TX_FLOW_CONTROL_ENABLED)</div><div class='hunk'>@@ -4835,9 +4757,8 @@ static void bnx2x_set_swap_lanes(struct link_params *params,</div><div class='ctx'> 				 struct bnx2x_phy *phy)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='del'>-	/*</div><div class='del'>-	 *  Each two bits represents a lane number:</div><div class='del'>-	 *  No swap is 0123 =&gt; 0x1b no need to enable the swap</div><div class='add'>+	/* Each two bits represents a lane number:</div><div class='add'>+	 * No swap is 0123 =&gt; 0x1b no need to enable the swap</div><div class='ctx'> 	 */</div><div class='ctx'> 	u16 rx_lane_swap, tx_lane_swap;</div><div class='ctx'> </div><div class='hunk'>@@ -5051,8 +4972,7 @@ static void bnx2x_program_serdes(struct bnx2x_phy *phy,</div><div class='ctx'> 			  MDIO_REG_BANK_COMBO_IEEE0,</div><div class='ctx'> 			  MDIO_COMBO_IEEE0_MII_CONTROL, reg_val);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * program speed</div><div class='add'>+	/* Program speed</div><div class='ctx'> 	 *  - needed only if the speed is greater than 1G (2.5G or 10G)</div><div class='ctx'> 	 */</div><div class='ctx'> 	CL22_RD_OVER_CL45(bp, phy,</div><div class='hunk'>@@ -5087,8 +5007,6 @@ static void bnx2x_set_brcm_cl37_advertisement(struct bnx2x_phy *phy,</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='ctx'> 	u16 val = 0;</div><div class='ctx'> </div><div class='del'>-	/* configure the 48 bits for BAM AN */</div><div class='del'>-</div><div class='ctx'> 	/* set extended capabilities */</div><div class='ctx'> 	if (phy-&gt;speed_cap_mask &amp; PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G)</div><div class='ctx'> 		val |= MDIO_OVER_1G_UP1_2_5G;</div><div class='hunk'>@@ -5234,11 +5152,8 @@ static void bnx2x_initialize_sgmii_process(struct bnx2x_phy *phy,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * link management</div><div class='add'>+/* Link management</div><div class='ctx'>  */</div><div class='del'>-</div><div class='ctx'> static int bnx2x_direct_parallel_detect_used(struct bnx2x_phy *phy,</div><div class='ctx'> 					     struct link_params *params)</div><div class='ctx'> {</div><div class='hunk'>@@ -5383,8 +5298,7 @@ static void bnx2x_check_fallback_to_cl37(struct bnx2x_phy *phy,</div><div class='ctx'> 			     "ustat_val(0x8371) = 0x%x\n", ustat_val);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	/*</div><div class='del'>-	 * Step 3: Check CL37 Message Pages received to indicate LP</div><div class='add'>+	/* Step 3: Check CL37 Message Pages received to indicate LP</div><div class='ctx'> 	 * supports only CL37</div><div class='ctx'> 	 */</div><div class='ctx'> 	CL22_RD_OVER_CL45(bp, phy,</div><div class='hunk'>@@ -5401,8 +5315,7 @@ static void bnx2x_check_fallback_to_cl37(struct bnx2x_phy *phy,</div><div class='ctx'> 			 cl37_fsm_received);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	/*</div><div class='del'>-	 * The combined cl37/cl73 fsm state information indicating that</div><div class='add'>+	/* The combined cl37/cl73 fsm state information indicating that</div><div class='ctx'> 	 * we are connected to a device which does not support cl73, but</div><div class='ctx'> 	 * does support cl37 BAM. In this case we disable cl73 and</div><div class='ctx'> 	 * restart cl37 auto-neg</div><div class='hunk'>@@ -5973,8 +5886,7 @@ static void bnx2x_rearm_latch_signal(struct bnx2x *bp, u8 port,</div><div class='ctx'> {</div><div class='ctx'> 	u32 latch_status = 0;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Disable the MI INT ( external phy int ) by writing 1 to the</div><div class='add'>+	/* Disable the MI INT ( external phy int ) by writing 1 to the</div><div class='ctx'> 	 * status register. Link down indication is high-active-signal,</div><div class='ctx'> 	 * so in this case we need to write the status to clear the XOR</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -6009,8 +5921,7 @@ static void bnx2x_link_int_ack(struct link_params *params,</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='ctx'> 	u8 port = params-&gt;port;</div><div class='ctx'> 	u32 mask;</div><div class='del'>-	/*</div><div class='del'>-	 * First reset all status we assume only one line will be</div><div class='add'>+	/* First reset all status we assume only one line will be</div><div class='ctx'> 	 * change at a time</div><div class='ctx'> 	 */</div><div class='ctx'> 	bnx2x_bits_dis(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4,</div><div class='hunk'>@@ -6024,8 +5935,7 @@ static void bnx2x_link_int_ack(struct link_params *params,</div><div class='ctx'> 			if (is_10g_plus)</div><div class='ctx'> 				mask = NIG_STATUS_XGXS0_LINK10G;</div><div class='ctx'> 			else if (params-&gt;switch_cfg == SWITCH_CFG_10G) {</div><div class='del'>-				/*</div><div class='del'>-				 * Disable the link interrupt by writing 1 to</div><div class='add'>+				/* Disable the link interrupt by writing 1 to</div><div class='ctx'> 				 * the relevant lane in the status register</div><div class='ctx'> 				 */</div><div class='ctx'> 				u32 ser_lane =</div><div class='hunk'>@@ -6227,8 +6137,7 @@ int bnx2x_set_led(struct link_params *params,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case LED_MODE_OPER:</div><div class='del'>-		/*</div><div class='del'>-		 * For all other phys, OPER mode is same as ON, so in case</div><div class='add'>+		/* For all other phys, OPER mode is same as ON, so in case</div><div class='ctx'> 		 * link is down, do nothing</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!vars-&gt;link_up)</div><div class='hunk'>@@ -6239,9 +6148,7 @@ int bnx2x_set_led(struct link_params *params,</div><div class='ctx'> 			 (params-&gt;phy[EXT_PHY1].type ==</div><div class='ctx'> 			  PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722)) &amp;&amp;</div><div class='ctx'> 		    CHIP_IS_E2(bp) &amp;&amp; params-&gt;num_phys == 2) {</div><div class='del'>-			/*</div><div class='del'>-			 * This is a work-around for E2+8727 Configurations</div><div class='del'>-			 */</div><div class='add'>+			/* This is a work-around for E2+8727 Configurations */</div><div class='ctx'> 			if (mode == LED_MODE_ON ||</div><div class='ctx'> 				speed == SPEED_10000){</div><div class='ctx'> 				REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0);</div><div class='hunk'>@@ -6250,8 +6157,7 @@ int bnx2x_set_led(struct link_params *params,</div><div class='ctx'> 				tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);</div><div class='ctx'> 				EMAC_WR(bp, EMAC_REG_EMAC_LED,</div><div class='ctx'> 					(tmp | EMAC_LED_OVERRIDE));</div><div class='del'>-				/*</div><div class='del'>-				 * return here without enabling traffic</div><div class='add'>+				/* Return here without enabling traffic</div><div class='ctx'> 				 * LED blink and setting rate in ON mode.</div><div class='ctx'> 				 * In oper mode, enabling LED blink</div><div class='ctx'> 				 * and setting rate is needed.</div><div class='hunk'>@@ -6260,8 +6166,7 @@ int bnx2x_set_led(struct link_params *params,</div><div class='ctx'> 					return rc;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else if (SINGLE_MEDIA_DIRECT(params)) {</div><div class='del'>-			/*</div><div class='del'>-			 * This is a work-around for HW issue found when link</div><div class='add'>+			/* This is a work-around for HW issue found when link</div><div class='ctx'> 			 * is up in CL73</div><div class='ctx'> 			 */</div><div class='ctx'> 			if ((!CHIP_IS_E3(bp)) ||</div><div class='hunk'>@@ -6310,10 +6215,7 @@ int bnx2x_set_led(struct link_params *params,</div><div class='ctx'> 		     (speed == SPEED_1000) ||</div><div class='ctx'> 		     (speed == SPEED_100) ||</div><div class='ctx'> 		     (speed == SPEED_10))) {</div><div class='del'>-			/*</div><div class='del'>-			 * On Everest 1 Ax chip versions for speeds less than</div><div class='del'>-			 * 10G LED scheme is different</div><div class='del'>-			 */</div><div class='add'>+			/* For speeds less than 10G LED scheme is different */</div><div class='ctx'> 			REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0</div><div class='ctx'> 			       + port*4, 1);</div><div class='ctx'> 			REG_WR(bp, NIG_REG_LED_CONTROL_TRAFFIC_P0 +</div><div class='hunk'>@@ -6333,8 +6235,7 @@ int bnx2x_set_led(struct link_params *params,</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This function comes to reflect the actual link state read DIRECTLY from the</div><div class='add'>+/* This function comes to reflect the actual link state read DIRECTLY from the</div><div class='ctx'>  * HW</div><div class='ctx'>  */</div><div class='ctx'> int bnx2x_test_link(struct link_params *params, struct link_vars *vars,</div><div class='hunk'>@@ -6422,16 +6323,14 @@ static int bnx2x_link_initialize(struct link_params *params,</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> 	u8 phy_index, non_ext_phy;</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='del'>-	/*</div><div class='del'>-	 * In case of external phy existence, the line speed would be the</div><div class='add'>+	/* In case of external phy existence, the line speed would be the</div><div class='ctx'> 	 * line speed linked up by the external phy. In case it is direct</div><div class='ctx'> 	 * only, then the line_speed during initialization will be</div><div class='ctx'> 	 * equal to the req_line_speed</div><div class='ctx'> 	 */</div><div class='ctx'> 	vars-&gt;line_speed = params-&gt;phy[INT_PHY].req_line_speed;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Initialize the internal phy in case this is a direct board</div><div class='add'>+	/* Initialize the internal phy in case this is a direct board</div><div class='ctx'> 	 * (no external phys), or this board has external phy which requires</div><div class='ctx'> 	 * to first.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -6463,8 +6362,7 @@ static int bnx2x_link_initialize(struct link_params *params,</div><div class='ctx'> 	} else {</div><div class='ctx'> 		for (phy_index = EXT_PHY1; phy_index &lt; params-&gt;num_phys;</div><div class='ctx'> 		      phy_index++) {</div><div class='del'>-			/*</div><div class='del'>-			 * No need to initialize second phy in case of first</div><div class='add'>+			/* No need to initialize second phy in case of first</div><div class='ctx'> 			 * phy only selection. In case of second phy, we do</div><div class='ctx'> 			 * need to initialize the first phy, since they are</div><div class='ctx'> 			 * connected.</div><div class='hunk'>@@ -6492,7 +6390,6 @@ static int bnx2x_link_initialize(struct link_params *params,</div><div class='ctx'> 			NIG_STATUS_XGXS0_LINK_STATUS |</div><div class='ctx'> 			NIG_STATUS_SERDES0_LINK_STATUS |</div><div class='ctx'> 			NIG_MASK_MI_INT));</div><div class='del'>-	bnx2x_update_mng(params, vars-&gt;link_status);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6577,7 +6474,7 @@ static int bnx2x_update_link_up(struct link_params *params,</div><div class='ctx'> 				u8 link_10g)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='del'>-	u8 port = params-&gt;port;</div><div class='add'>+	u8 phy_idx, port = params-&gt;port;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='ctx'> 	vars-&gt;link_status |= (LINK_STATUS_LINK_UP |</div><div class='hunk'>@@ -6641,11 +6538,18 @@ static int bnx2x_update_link_up(struct link_params *params,</div><div class='ctx'> </div><div class='ctx'> 	/* update shared memory */</div><div class='ctx'> 	bnx2x_update_mng(params, vars-&gt;link_status);</div><div class='add'>+</div><div class='add'>+	/* Check remote fault */</div><div class='add'>+	for (phy_idx = INT_PHY; phy_idx &lt; MAX_PHYS; phy_idx++) {</div><div class='add'>+		if (params-&gt;phy[phy_idx].flags &amp; FLAGS_TX_ERROR_CHECK) {</div><div class='add'>+			bnx2x_check_half_open_conn(params, vars, 0);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	msleep(20);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='del'>-/*</div><div class='del'>- * The bnx2x_link_update function should be called upon link</div><div class='add'>+/* The bnx2x_link_update function should be called upon link</div><div class='ctx'>  * interrupt.</div><div class='ctx'>  * Link is considered up as follows:</div><div class='ctx'>  * - DIRECT_SINGLE_MEDIA - Only XGXS link (internal link) needs</div><div class='hunk'>@@ -6702,8 +6606,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)</div><div class='ctx'> 	if (!CHIP_IS_E3(bp))</div><div class='ctx'> 		REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 0);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Step 1:</div><div class='add'>+	/* Step 1:</div><div class='ctx'> 	 * Check external link change only for external phys, and apply</div><div class='ctx'> 	 * priority selection between them in case the link on both phys</div><div class='ctx'> 	 * is up. Note that instead of the common vars, a temporary</div><div class='hunk'>@@ -6734,23 +6637,20 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)</div><div class='ctx'> 			switch (bnx2x_phy_selection(params)) {</div><div class='ctx'> 			case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT:</div><div class='ctx'> 			case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY:</div><div class='del'>-			/*</div><div class='del'>-			 * In this option, the first PHY makes sure to pass the</div><div class='add'>+			/* In this option, the first PHY makes sure to pass the</div><div class='ctx'> 			 * traffic through itself only.</div><div class='ctx'> 			 * Its not clear how to reset the link on the second phy</div><div class='ctx'> 			 */</div><div class='ctx'> 				active_external_phy = EXT_PHY1;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY:</div><div class='del'>-			/*</div><div class='del'>-			 * In this option, the first PHY makes sure to pass the</div><div class='add'>+			/* In this option, the first PHY makes sure to pass the</div><div class='ctx'> 			 * traffic through the second PHY.</div><div class='ctx'> 			 */</div><div class='ctx'> 				active_external_phy = EXT_PHY2;</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='del'>-			/*</div><div class='del'>-			 * Link indication on both PHYs with the following cases</div><div class='add'>+			/* Link indication on both PHYs with the following cases</div><div class='ctx'> 			 * is invalid:</div><div class='ctx'> 			 * - FIRST_PHY means that second phy wasn't initialized,</div><div class='ctx'> 			 * hence its link is expected to be down</div><div class='hunk'>@@ -6767,8 +6667,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	prev_line_speed = vars-&gt;line_speed;</div><div class='del'>-	/*</div><div class='del'>-	 * Step 2:</div><div class='add'>+	/* Step 2:</div><div class='ctx'> 	 * Read the status of the internal phy. In case of</div><div class='ctx'> 	 * DIRECT_SINGLE_MEDIA board, this link is the external link,</div><div class='ctx'> 	 * otherwise this is the link between the 577xx and the first</div><div class='hunk'>@@ -6778,8 +6677,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)</div><div class='ctx'> 		params-&gt;phy[INT_PHY].read_status(</div><div class='ctx'> 			&amp;params-&gt;phy[INT_PHY],</div><div class='ctx'> 			params, vars);</div><div class='del'>-	/*</div><div class='del'>-	 * The INT_PHY flow control reside in the vars. This include the</div><div class='add'>+	/* The INT_PHY flow control reside in the vars. This include the</div><div class='ctx'> 	 * case where the speed or flow control are not set to AUTO.</div><div class='ctx'> 	 * Otherwise, the active external phy flow control result is set</div><div class='ctx'> 	 * to the vars. The ext_phy_line_speed is needed to check if the</div><div class='hunk'>@@ -6788,14 +6686,12 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (active_external_phy &gt; INT_PHY) {</div><div class='ctx'> 		vars-&gt;flow_ctrl = phy_vars[active_external_phy].flow_ctrl;</div><div class='del'>-		/*</div><div class='del'>-		 * Link speed is taken from the XGXS. AN and FC result from</div><div class='add'>+		/* Link speed is taken from the XGXS. AN and FC result from</div><div class='ctx'> 		 * the external phy.</div><div class='ctx'> 		 */</div><div class='ctx'> 		vars-&gt;link_status |= phy_vars[active_external_phy].link_status;</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * if active_external_phy is first PHY and link is up - disable</div><div class='add'>+		/* if active_external_phy is first PHY and link is up - disable</div><div class='ctx'> 		 * disable TX on second external PHY</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (active_external_phy == EXT_PHY1) {</div><div class='hunk'>@@ -6832,8 +6728,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)</div><div class='ctx'> 	DP(NETIF_MSG_LINK, "vars-&gt;flow_ctrl = 0x%x, vars-&gt;link_status = 0x%x,"</div><div class='ctx'> 		   " ext_phy_line_speed = %d\n", vars-&gt;flow_ctrl,</div><div class='ctx'> 		   vars-&gt;link_status, ext_phy_line_speed);</div><div class='del'>-	/*</div><div class='del'>-	 * Upon link speed change set the NIG into drain mode. Comes to</div><div class='add'>+	/* Upon link speed change set the NIG into drain mode. Comes to</div><div class='ctx'> 	 * deals with possible FIFO glitch due to clk change when speed</div><div class='ctx'> 	 * is decreased without link down indicator</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -6858,8 +6753,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)</div><div class='ctx'> </div><div class='ctx'> 	bnx2x_link_int_ack(params, vars, link_10g_plus);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * In case external phy link is up, and internal link is down</div><div class='add'>+	/* In case external phy link is up, and internal link is down</div><div class='ctx'> 	 * (not initialized yet probably after link initialization, it</div><div class='ctx'> 	 * needs to be initialized.</div><div class='ctx'> 	 * Note that after link down-up as result of cable plug, the xgxs</div><div class='hunk'>@@ -6887,8 +6781,7 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)</div><div class='ctx'> 						vars);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	/*</div><div class='del'>-	 * Link is up only if both local phy and external phy (in case of</div><div class='add'>+	/* Link is up only if both local phy and external phy (in case of</div><div class='ctx'> 	 * non-direct board) are up and no fault detected on active PHY.</div><div class='ctx'> 	 */</div><div class='ctx'> 	vars-&gt;link_up = (vars-&gt;phy_link_up &amp;&amp;</div><div class='hunk'>@@ -6907,6 +6800,10 @@ int bnx2x_link_update(struct link_params *params, struct link_vars *vars)</div><div class='ctx'> 	else</div><div class='ctx'> 		rc = bnx2x_update_link_down(params, vars);</div><div class='ctx'> </div><div class='add'>+	/* Update MCP link status was changed */</div><div class='add'>+	if (params-&gt;feature_config_flags &amp; FEATURE_CONFIG_BC_SUPPORTS_AFEX)</div><div class='add'>+		bnx2x_fw_command(bp, DRV_MSG_CODE_LINK_STATUS_CHANGED, 0);</div><div class='add'>+</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7120,8 +7017,7 @@ static int bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)</div><div class='ctx'> 	}</div><div class='ctx'> 	/* XAUI workaround in 8073 A0: */</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * After loading the boot ROM and restarting Autoneg, poll</div><div class='add'>+	/* After loading the boot ROM and restarting Autoneg, poll</div><div class='ctx'> 	 * Dev1, Reg $C820:</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='hunk'>@@ -7130,8 +7026,7 @@ static int bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)</div><div class='ctx'> 				MDIO_PMA_DEVAD,</div><div class='ctx'> 				MDIO_PMA_REG_8073_SPEED_LINK_STATUS,</div><div class='ctx'> 				&amp;val);</div><div class='del'>-		  /*</div><div class='del'>-		   * If bit [14] = 0 or bit [13] = 0, continue on with</div><div class='add'>+		  /* If bit [14] = 0 or bit [13] = 0, continue on with</div><div class='ctx'> 		   * system initialization (XAUI work-around not required, as</div><div class='ctx'> 		   * these bits indicate 2.5G or 1G link up).</div><div class='ctx'> 		   */</div><div class='hunk'>@@ -7140,8 +7035,7 @@ static int bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		} else if (!(val &amp; (1&lt;&lt;15))) {</div><div class='ctx'> 			DP(NETIF_MSG_LINK, "bit 15 went off\n");</div><div class='del'>-			/*</div><div class='del'>-			 * If bit 15 is 0, then poll Dev1, Reg $C841 until it's</div><div class='add'>+			/* If bit 15 is 0, then poll Dev1, Reg $C841 until it's</div><div class='ctx'> 			 * MSB (bit15) goes to 1 (indicating that the XAUI</div><div class='ctx'> 			 * workaround has completed), then continue on with</div><div class='ctx'> 			 * system initialization.</div><div class='hunk'>@@ -7291,8 +7185,7 @@ static int bnx2x_8073_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 			val = (1&lt;&lt;7);</div><div class='ctx'> 		} else if (phy-&gt;req_line_speed ==  SPEED_2500) {</div><div class='ctx'> 			val = (1&lt;&lt;5);</div><div class='del'>-			/*</div><div class='del'>-			 * Note that 2.5G works only when used with 1G</div><div class='add'>+			/* Note that 2.5G works only when used with 1G</div><div class='ctx'> 			 * advertisement</div><div class='ctx'> 			 */</div><div class='ctx'> 		} else</div><div class='hunk'>@@ -7343,8 +7236,7 @@ static int bnx2x_8073_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 	/* Add support for CL37 (passive mode) III */</div><div class='ctx'> 	bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The SNR will improve about 2db by changing BW and FEE main</div><div class='add'>+	/* The SNR will improve about 2db by changing BW and FEE main</div><div class='ctx'> 	 * tap. Rest commands are executed after link is up</div><div class='ctx'> 	 * Change FFE main cursor to 5 in EDC register</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -7431,8 +7323,7 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy,</div><div class='ctx'> </div><div class='ctx'> 	link_up = (((val1 &amp; 4) == 4) || (an1000_status &amp; (1&lt;&lt;1)));</div><div class='ctx'> 	if (link_up &amp;&amp; bnx2x_8073_is_snr_needed(bp, phy)) {</div><div class='del'>-		/*</div><div class='del'>-		 * The SNR will improve about 2dbby changing the BW and FEE main</div><div class='add'>+		/* The SNR will improve about 2dbby changing the BW and FEE main</div><div class='ctx'> 		 * tap. The 1st write to change FFE main tap is set before</div><div class='ctx'> 		 * restart AN. Change PLL Bandwidth in EDC register</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -7479,8 +7370,7 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy,</div><div class='ctx'> 			bnx2x_cl45_read(bp, phy,</div><div class='ctx'> 					MDIO_XS_DEVAD,</div><div class='ctx'> 					MDIO_XS_REG_8073_RX_CTRL_PCIE, &amp;val1);</div><div class='del'>-			/*</div><div class='del'>-			 * Set bit 3 to invert Rx in 1G mode and clear this bit</div><div class='add'>+			/* Set bit 3 to invert Rx in 1G mode and clear this bit</div><div class='ctx'> 			 * when it`s in 10G mode.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (vars-&gt;line_speed == SPEED_1000) {</div><div class='hunk'>@@ -7602,8 +7492,7 @@ static void bnx2x_set_disable_pmd_transmit(struct link_params *params,</div><div class='ctx'> 					   u8 pmd_dis)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='del'>-	/*</div><div class='del'>-	 * Disable transmitter only for bootcodes which can enable it afterwards</div><div class='add'>+	/* Disable transmitter only for bootcodes which can enable it afterwards</div><div class='ctx'> 	 * (for D3 link)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (pmd_dis) {</div><div class='hunk'>@@ -7780,9 +7669,6 @@ static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy,</div><div class='ctx'> 	u32 data_array[4];</div><div class='ctx'> 	u16 addr32;</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='del'>-	/*DP(NETIF_MSG_LINK, "bnx2x_direct_read_sfp_module_eeprom:"</div><div class='del'>-					" addr %d, cnt %d\n",</div><div class='del'>-					addr, byte_cnt);*/</div><div class='ctx'> 	if (byte_cnt &gt; 16) {</div><div class='ctx'> 		DP(NETIF_MSG_LINK,</div><div class='ctx'> 		   "Reading from eeprom is limited to 16 bytes\n");</div><div class='hunk'>@@ -7847,8 +7733,7 @@ static int bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,</div><div class='ctx'> 			 MDIO_PMA_DEVAD,</div><div class='ctx'> 			 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL,</div><div class='ctx'> 			 0x8002);</div><div class='del'>-	/*</div><div class='del'>-	 * Wait appropriate time for two-wire command to finish before</div><div class='add'>+	/* Wait appropriate time for two-wire command to finish before</div><div class='ctx'> 	 * polling the status register</div><div class='ctx'> 	 */</div><div class='ctx'> 	msleep(1);</div><div class='hunk'>@@ -7941,8 +7826,7 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy,</div><div class='ctx'> 	{</div><div class='ctx'> 		u8 copper_module_type;</div><div class='ctx'> 		phy-&gt;media_type = ETH_PHY_DA_TWINAX;</div><div class='del'>-		/*</div><div class='del'>-		 * Check if its active cable (includes SFP+ module)</div><div class='add'>+		/* Check if its active cable (includes SFP+ module)</div><div class='ctx'> 		 * of passive cable</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (bnx2x_read_sfp_module_eeprom(phy,</div><div class='hunk'>@@ -8019,8 +7903,7 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy,</div><div class='ctx'> 	DP(NETIF_MSG_LINK, "EDC mode is set to 0x%x\n", *edc_mode);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-/*</div><div class='del'>- * This function read the relevant field from the module (SFP+), and verify it</div><div class='add'>+/* This function read the relevant field from the module (SFP+), and verify it</div><div class='ctx'>  * is compliant with this board</div><div class='ctx'>  */</div><div class='ctx'> static int bnx2x_verify_sfp_module(struct bnx2x_phy *phy,</div><div class='hunk'>@@ -8102,8 +7985,7 @@ static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy,</div><div class='ctx'> 	u8 val;</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='ctx'> 	u16 timeout;</div><div class='del'>-	/*</div><div class='del'>-	 * Initialization time after hot-plug may take up to 300ms for</div><div class='add'>+	/* Initialization time after hot-plug may take up to 300ms for</div><div class='ctx'> 	 * some phys type ( e.g. JDSU )</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='hunk'>@@ -8125,8 +8007,7 @@ static void bnx2x_8727_power_module(struct bnx2x *bp,</div><div class='ctx'> 				    u8 is_power_up) {</div><div class='ctx'> 	/* Make sure GPIOs are not using for LED mode */</div><div class='ctx'> 	u16 val;</div><div class='del'>-	/*</div><div class='del'>-	 * In the GPIO register, bit 4 is use to determine if the GPIOs are</div><div class='add'>+	/* In the GPIO register, bit 4 is use to determine if the GPIOs are</div><div class='ctx'> 	 * operating as INPUT or as OUTPUT. Bit 1 is for input, and 0 for</div><div class='ctx'> 	 * output</div><div class='ctx'> 	 * Bits 0-1 determine the GPIOs value for OUTPUT in case bit 4 val is 0</div><div class='hunk'>@@ -8142,8 +8023,7 @@ static void bnx2x_8727_power_module(struct bnx2x *bp,</div><div class='ctx'> 	if (is_power_up)</div><div class='ctx'> 		val = (1&lt;&lt;4);</div><div class='ctx'> 	else</div><div class='del'>-		/*</div><div class='del'>-		 * Set GPIO control to OUTPUT, and set the power bit</div><div class='add'>+		/* Set GPIO control to OUTPUT, and set the power bit</div><div class='ctx'> 		 * to according to the is_power_up</div><div class='ctx'> 		 */</div><div class='ctx'> 		val = (1&lt;&lt;1);</div><div class='hunk'>@@ -8177,8 +8057,7 @@ static int bnx2x_8726_set_limiting_mode(struct bnx2x *bp,</div><div class='ctx'> </div><div class='ctx'> 		DP(NETIF_MSG_LINK, "Setting LRM MODE\n");</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Changing to LRM mode takes quite few seconds. So do it only</div><div class='add'>+		/* Changing to LRM mode takes quite few seconds. So do it only</div><div class='ctx'> 		 * if current mode is limiting (default is LRM)</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (cur_limiting_mode != EDC_MODE_LIMITING)</div><div class='hunk'>@@ -8313,8 +8192,7 @@ static void bnx2x_set_sfp_module_fault_led(struct link_params *params,</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='ctx'> 	DP(NETIF_MSG_LINK, "Setting SFP+ module fault LED to %d\n", gpio_mode);</div><div class='ctx'> 	if (CHIP_IS_E3(bp)) {</div><div class='del'>-		/*</div><div class='del'>-		 * Low ==&gt; if SFP+ module is supported otherwise</div><div class='add'>+		/* Low ==&gt; if SFP+ module is supported otherwise</div><div class='ctx'> 		 * High ==&gt; if SFP+ module is not on the approved vendor list</div><div class='ctx'> 		 */</div><div class='ctx'> 		bnx2x_set_e3_module_fault_led(params, gpio_mode);</div><div class='hunk'>@@ -8339,8 +8217,7 @@ static void bnx2x_warpcore_power_module(struct link_params *params,</div><div class='ctx'> 		return;</div><div class='ctx'> 	DP(NETIF_MSG_LINK, "Setting SFP+ module power to %d using pin cfg %d\n",</div><div class='ctx'> 		       power, pin_cfg);</div><div class='del'>-	/*</div><div class='del'>-	 * Low ==&gt; corresponding SFP+ module is powered</div><div class='add'>+	/* Low ==&gt; corresponding SFP+ module is powered</div><div class='ctx'> 	 * high ==&gt; the SFP+ module is powered down</div><div class='ctx'> 	 */</div><div class='ctx'> 	bnx2x_set_cfg_pin(bp, pin_cfg, power ^ 1);</div><div class='hunk'>@@ -8474,14 +8351,12 @@ int bnx2x_sfp_module_detection(struct bnx2x_phy *phy,</div><div class='ctx'> 		bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_LOW);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Check and set limiting mode / LRM mode on 8726. On 8727 it</div><div class='add'>+	/* Check and set limiting mode / LRM mode on 8726. On 8727 it</div><div class='ctx'> 	 * is done automatically</div><div class='ctx'> 	 */</div><div class='ctx'> 	bnx2x_set_limiting_mode(params, phy, edc_mode);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Enable transmit for this module if the module is approved, or</div><div class='add'>+	/* Enable transmit for this module if the module is approved, or</div><div class='ctx'> 	 * if unapproved modules should also enable the Tx laser</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (rc == 0 ||</div><div class='hunk'>@@ -8536,8 +8411,7 @@ void bnx2x_handle_module_detect_int(struct link_params *params)</div><div class='ctx'> 		bnx2x_set_gpio_int(bp, gpio_num,</div><div class='ctx'> 				   MISC_REGISTERS_GPIO_INT_OUTPUT_SET,</div><div class='ctx'> 				   gpio_port);</div><div class='del'>-		/*</div><div class='del'>-		 * Module was plugged out.</div><div class='add'>+		/* Module was plugged out.</div><div class='ctx'> 		 * Disable transmit for this module</div><div class='ctx'> 		 */</div><div class='ctx'> 		phy-&gt;media_type = ETH_PHY_NOT_PRESENT;</div><div class='hunk'>@@ -8607,8 +8481,7 @@ static u8 bnx2x_8706_8726_read_status(struct bnx2x_phy *phy,</div><div class='ctx'> </div><div class='ctx'> 	DP(NETIF_MSG_LINK, "8706/8726 rx_sd 0x%x pcs_status 0x%x 1Gbps"</div><div class='ctx'> 			" link_status 0x%x\n", rx_sd, pcs_status, val2);</div><div class='del'>-	/*</div><div class='del'>-	 * link is up if both bit 0 of pmd_rx_sd and bit 0 of pcs_status</div><div class='add'>+	/* Link is up if both bit 0 of pmd_rx_sd and bit 0 of pcs_status</div><div class='ctx'> 	 * are set, or if the autoneg bit 1 is set</div><div class='ctx'> 	 */</div><div class='ctx'> 	link_up = ((rx_sd &amp; pcs_status &amp; 0x1) || (val2 &amp; (1&lt;&lt;1)));</div><div class='hunk'>@@ -8722,8 +8595,7 @@ static u8 bnx2x_8706_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 	}</div><div class='ctx'> 	bnx2x_save_bcm_spirom_ver(bp, phy, params-&gt;port);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If TX Laser is controlled by GPIO_0, do not let PHY go into low</div><div class='add'>+	/* If TX Laser is controlled by GPIO_0, do not let PHY go into low</div><div class='ctx'> 	 * power mode, if TX Laser is disabled</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='hunk'>@@ -8833,8 +8705,7 @@ static int bnx2x_8726_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> </div><div class='ctx'> 	bnx2x_8726_external_rom_boot(phy, params);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Need to call module detected on initialization since the module</div><div class='add'>+	/* Need to call module detected on initialization since the module</div><div class='ctx'> 	 * detection triggered by actual module insertion might occur before</div><div class='ctx'> 	 * driver is loaded, and when driver is loaded, it reset all</div><div class='ctx'> 	 * registers, including the transmitter</div><div class='hunk'>@@ -8871,8 +8742,7 @@ static int bnx2x_8726_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 				 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000);</div><div class='ctx'> 		bnx2x_cl45_write(bp, phy,</div><div class='ctx'> 				MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200);</div><div class='del'>-		/*</div><div class='del'>-		 * Enable RX-ALARM control to receive interrupt for 1G speed</div><div class='add'>+		/* Enable RX-ALARM control to receive interrupt for 1G speed</div><div class='ctx'> 		 * change</div><div class='ctx'> 		 */</div><div class='ctx'> 		bnx2x_cl45_write(bp, phy,</div><div class='hunk'>@@ -8973,8 +8843,7 @@ static void bnx2x_8727_hw_reset(struct bnx2x_phy *phy,</div><div class='ctx'> 				struct link_params *params) {</div><div class='ctx'> 	u32 swap_val, swap_override;</div><div class='ctx'> 	u8 port;</div><div class='del'>-	/*</div><div class='del'>-	 * The PHY reset is controlled by GPIO 1. Fake the port number</div><div class='add'>+	/* The PHY reset is controlled by GPIO 1. Fake the port number</div><div class='ctx'> 	 * to cancel the swap done in set_gpio()</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='hunk'>@@ -9012,14 +8881,12 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 	bnx2x_cl45_write(bp, phy,</div><div class='ctx'> 			 MDIO_PMA_DEVAD, MDIO_PMA_LASI_CTRL, lasi_ctrl_val);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Initially configure MOD_ABS to interrupt when module is</div><div class='add'>+	/* Initially configure MOD_ABS to interrupt when module is</div><div class='ctx'> 	 * presence( bit 8)</div><div class='ctx'> 	 */</div><div class='ctx'> 	bnx2x_cl45_read(bp, phy,</div><div class='ctx'> 			MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, &amp;mod_abs);</div><div class='del'>-	/*</div><div class='del'>-	 * Set EDC off by setting OPTXLOS signal input to low (bit 9).</div><div class='add'>+	/* Set EDC off by setting OPTXLOS signal input to low (bit 9).</div><div class='ctx'> 	 * When the EDC is off it locks onto a reference clock and avoids</div><div class='ctx'> 	 * becoming 'lost'</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -9040,8 +8907,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 	if (phy-&gt;flags &amp; FLAGS_NOC)</div><div class='ctx'> 		val |= (3&lt;&lt;5);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Set 8727 GPIOs to input to allow reading from the 8727 GPIO0</div><div class='add'>+	/* Set 8727 GPIOs to input to allow reading from the 8727 GPIO0</div><div class='ctx'> 	 * status which reflect SFP+ module over-current</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!(phy-&gt;flags &amp; FLAGS_NOC))</div><div class='hunk'>@@ -9067,8 +8933,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 		bnx2x_cl45_read(bp, phy,</div><div class='ctx'> 				MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, &amp;tmp1);</div><div class='ctx'> 		DP(NETIF_MSG_LINK, "1.7 = 0x%x\n", tmp1);</div><div class='del'>-		/*</div><div class='del'>-		 * Power down the XAUI until link is up in case of dual-media</div><div class='add'>+		/* Power down the XAUI until link is up in case of dual-media</div><div class='ctx'> 		 * and 1G</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (DUAL_MEDIA(params)) {</div><div class='hunk'>@@ -9093,8 +8958,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 		bnx2x_cl45_write(bp, phy,</div><div class='ctx'> 				 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300);</div><div class='ctx'> 	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * Since the 8727 has only single reset pin, need to set the 10G</div><div class='add'>+		/* Since the 8727 has only single reset pin, need to set the 10G</div><div class='ctx'> 		 * registers although it is default</div><div class='ctx'> 		 */</div><div class='ctx'> 		bnx2x_cl45_write(bp, phy,</div><div class='hunk'>@@ -9109,8 +8973,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 				 0x0008);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Set 2-wire transfer rate of SFP+ module EEPROM</div><div class='add'>+	/* Set 2-wire transfer rate of SFP+ module EEPROM</div><div class='ctx'> 	 * to 100Khz since some DACs(direct attached cables) do</div><div class='ctx'> 	 * not work at 400Khz.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -9133,8 +8996,7 @@ static int bnx2x_8727_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 				 phy-&gt;tx_preemphasis[1]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If TX Laser is controlled by GPIO_0, do not let PHY go into low</div><div class='add'>+	/* If TX Laser is controlled by GPIO_0, do not let PHY go into low</div><div class='ctx'> 	 * power mode, if TX Laser is disabled</div><div class='ctx'> 	 */</div><div class='ctx'> 	tx_en_mode = REG_RD(bp, params-&gt;shmem_base +</div><div class='hunk'>@@ -9180,8 +9042,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,</div><div class='ctx'> 		DP(NETIF_MSG_LINK,</div><div class='ctx'> 		   "MOD_ABS indication show module is absent\n");</div><div class='ctx'> 		phy-&gt;media_type = ETH_PHY_NOT_PRESENT;</div><div class='del'>-		/*</div><div class='del'>-		 * 1. Set mod_abs to detect next module</div><div class='add'>+		/* 1. Set mod_abs to detect next module</div><div class='ctx'> 		 *    presence event</div><div class='ctx'> 		 * 2. Set EDC off by setting OPTXLOS signal input to low</div><div class='ctx'> 		 *    (bit 9).</div><div class='hunk'>@@ -9195,8 +9056,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,</div><div class='ctx'> 				 MDIO_PMA_DEVAD,</div><div class='ctx'> 				 MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Clear RX alarm since it stays up as long as</div><div class='add'>+		/* Clear RX alarm since it stays up as long as</div><div class='ctx'> 		 * the mod_abs wasn't changed</div><div class='ctx'> 		 */</div><div class='ctx'> 		bnx2x_cl45_read(bp, phy,</div><div class='hunk'>@@ -9207,8 +9067,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,</div><div class='ctx'> 		/* Module is present */</div><div class='ctx'> 		DP(NETIF_MSG_LINK,</div><div class='ctx'> 		   "MOD_ABS indication show module is present\n");</div><div class='del'>-		/*</div><div class='del'>-		 * First disable transmitter, and if the module is ok, the</div><div class='add'>+		/* First disable transmitter, and if the module is ok, the</div><div class='ctx'> 		 * module_detection will enable it</div><div class='ctx'> 		 * 1. Set mod_abs to detect next module absent event ( bit 8)</div><div class='ctx'> 		 * 2. Restore the default polarity of the OPRXLOS signal and</div><div class='hunk'>@@ -9222,8 +9081,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,</div><div class='ctx'> 				 MDIO_PMA_DEVAD,</div><div class='ctx'> 				 MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Clear RX alarm since it stays up as long as the mod_abs</div><div class='add'>+		/* Clear RX alarm since it stays up as long as the mod_abs</div><div class='ctx'> 		 * wasn't changed. This is need to be done before calling the</div><div class='ctx'> 		 * module detection, otherwise it will clear* the link update</div><div class='ctx'> 		 * alarm</div><div class='hunk'>@@ -9284,8 +9142,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,</div><div class='ctx'> 	bnx2x_cl45_read(bp, phy,</div><div class='ctx'> 			MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &amp;val1);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If a module is present and there is need to check</div><div class='add'>+	/* If a module is present and there is need to check</div><div class='ctx'> 	 * for over current</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!(phy-&gt;flags &amp; FLAGS_NOC) &amp;&amp; !(rx_alarm_status &amp; (1&lt;&lt;5))) {</div><div class='hunk'>@@ -9350,8 +9207,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,</div><div class='ctx'> 			MDIO_PMA_DEVAD,</div><div class='ctx'> 			MDIO_PMA_REG_8073_SPEED_LINK_STATUS, &amp;link_status);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Bits 0..2 --&gt; speed detected,</div><div class='add'>+	/* Bits 0..2 --&gt; speed detected,</div><div class='ctx'> 	 * Bits 13..15--&gt; link is down</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((link_status &amp; (1&lt;&lt;2)) &amp;&amp; (!(link_status &amp; (1&lt;&lt;15)))) {</div><div class='hunk'>@@ -9394,8 +9250,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,</div><div class='ctx'> 		bnx2x_cl45_read(bp, phy,</div><div class='ctx'> 				MDIO_PMA_DEVAD,</div><div class='ctx'> 				MDIO_PMA_REG_8727_PCS_GP, &amp;val1);</div><div class='del'>-		/*</div><div class='del'>-		 * In case of dual-media board and 1G, power up the XAUI side,</div><div class='add'>+		/* In case of dual-media board and 1G, power up the XAUI side,</div><div class='ctx'> 		 * otherwise power it down. For 10G it is done automatically</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (link_up)</div><div class='hunk'>@@ -9561,8 +9416,7 @@ static int bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 		/* Save spirom version */</div><div class='ctx'> 		bnx2x_save_848xx_spirom_version(phy, bp, params-&gt;port);</div><div class='ctx'> 	}</div><div class='del'>-	/*</div><div class='del'>-	 * This phy uses the NIG latch mechanism since link indication</div><div class='add'>+	/* This phy uses the NIG latch mechanism since link indication</div><div class='ctx'> 	 * arrives through its LED4 and not via its LASI signal, so we</div><div class='ctx'> 	 * get steady signal instead of clear on read</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -9667,8 +9521,7 @@ static int bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 	if (phy-&gt;req_duplex == DUPLEX_FULL)</div><div class='ctx'> 		autoneg_val |= (1&lt;&lt;8);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Always write this if this is not 84833.</div><div class='add'>+	/* Always write this if this is not 84833.</div><div class='ctx'> 	 * For 84833, write it only when it's a forced speed.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((phy-&gt;type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) ||</div><div class='hunk'>@@ -9916,8 +9769,7 @@ static int bnx2x_848x3_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 	/* Wait for GPHY to come out of reset */</div><div class='ctx'> 	msleep(50);</div><div class='ctx'> 	if (phy-&gt;type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) {</div><div class='del'>-		/*</div><div class='del'>-		 * BCM84823 requires that XGXS links up first @ 10G for normal</div><div class='add'>+		/* BCM84823 requires that XGXS links up first @ 10G for normal</div><div class='ctx'> 		 * behavior.</div><div class='ctx'> 		 */</div><div class='ctx'> 		u16 temp;</div><div class='hunk'>@@ -10393,8 +10245,7 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * This is a workaround for E3+84833 until autoneg</div><div class='add'>+	/* This is a workaround for E3+84833 until autoneg</div><div class='ctx'> 	 * restart is fixed in f/w</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (CHIP_IS_E3(bp)) {</div><div class='hunk'>@@ -10418,8 +10269,7 @@ static int bnx2x_54618se_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 	DP(NETIF_MSG_LINK, "54618SE cfg init\n");</div><div class='ctx'> 	usleep_range(1000, 1000);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * This works with E3 only, no need to check the chip</div><div class='add'>+	/* This works with E3 only, no need to check the chip</div><div class='ctx'> 	 * before determining the port.</div><div class='ctx'> 	 */</div><div class='ctx'> 	port = params-&gt;port;</div><div class='hunk'>@@ -10441,7 +10291,7 @@ static int bnx2x_54618se_config_init(struct bnx2x_phy *phy,</div><div class='ctx'> 			 MDIO_PMA_REG_CTRL, 0x8000);</div><div class='ctx'> 	bnx2x_wait_reset_complete(bp, phy, params);</div><div class='ctx'> </div><div class='del'>-	/*wait for GPHY to reset */</div><div class='add'>+	/* Wait for GPHY to reset */</div><div class='ctx'> 	msleep(50);</div><div class='ctx'> </div><div class='ctx'> 	/* Configure LED4: set to INTR (0x6). */</div><div class='hunk'>@@ -10647,13 +10497,11 @@ static void bnx2x_54618se_link_reset(struct bnx2x_phy *phy,</div><div class='ctx'> 	u32 cfg_pin;</div><div class='ctx'> 	u8 port;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * In case of no EPIO routed to reset the GPHY, put it</div><div class='add'>+	/* In case of no EPIO routed to reset the GPHY, put it</div><div class='ctx'> 	 * in low power mode.</div><div class='ctx'> 	 */</div><div class='ctx'> 	bnx2x_cl22_write(bp, phy, MDIO_PMA_REG_CTRL, 0x800);</div><div class='del'>-	/*</div><div class='del'>-	 * This works with E3 only, no need to check the chip</div><div class='add'>+	/* This works with E3 only, no need to check the chip</div><div class='ctx'> 	 * before determining the port.</div><div class='ctx'> 	 */</div><div class='ctx'> 	port = params-&gt;port;</div><div class='hunk'>@@ -10762,7 +10610,7 @@ static u8 bnx2x_54618se_read_status(struct bnx2x_phy *phy,</div><div class='ctx'> 		bnx2x_ext_phy_resolve_fc(phy, params, vars);</div><div class='ctx'> </div><div class='ctx'> 		if (vars-&gt;link_status &amp; LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) {</div><div class='del'>-			/* report LP advertised speeds */</div><div class='add'>+			/* Report LP advertised speeds */</div><div class='ctx'> 			bnx2x_cl22_read(bp, phy, 0x5, &amp;val);</div><div class='ctx'> </div><div class='ctx'> 			if (val &amp; (1&lt;&lt;5))</div><div class='hunk'>@@ -10827,8 +10675,7 @@ static void bnx2x_54618se_config_loopback(struct bnx2x_phy *phy,</div><div class='ctx'> 	/* This register opens the gate for the UMAC despite its name */</div><div class='ctx'> 	REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params-&gt;port*4, 1);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Maximum Frame Length (RW). Defines a 14-Bit maximum frame</div><div class='add'>+	/* Maximum Frame Length (RW). Defines a 14-Bit maximum frame</div><div class='ctx'> 	 * length used by the MAC receive logic to check frames.</div><div class='ctx'> 	 */</div><div class='ctx'> 	REG_WR(bp, umac_base + UMAC_REG_MAXFR, 0x2710);</div><div class='hunk'>@@ -11101,22 +10948,23 @@ static struct bnx2x_phy phy_warpcore = {</div><div class='ctx'> 	.type		= PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT,</div><div class='ctx'> 	.addr		= 0xff,</div><div class='ctx'> 	.def_md_devad	= 0,</div><div class='del'>-	.flags		= FLAGS_HW_LOCK_REQUIRED,</div><div class='add'>+	.flags		= (FLAGS_HW_LOCK_REQUIRED |</div><div class='add'>+			   FLAGS_TX_ERROR_CHECK),</div><div class='ctx'> 	.rx_preemphasis	= {0xffff, 0xffff, 0xffff, 0xffff},</div><div class='ctx'> 	.tx_preemphasis	= {0xffff, 0xffff, 0xffff, 0xffff},</div><div class='ctx'> 	.mdio_ctrl	= 0,</div><div class='ctx'> 	.supported	= (SUPPORTED_10baseT_Half |</div><div class='del'>-			     SUPPORTED_10baseT_Full |</div><div class='del'>-			     SUPPORTED_100baseT_Half |</div><div class='del'>-			     SUPPORTED_100baseT_Full |</div><div class='del'>-			     SUPPORTED_1000baseT_Full |</div><div class='del'>-			     SUPPORTED_10000baseT_Full |</div><div class='del'>-			     SUPPORTED_20000baseKR2_Full |</div><div class='del'>-			     SUPPORTED_20000baseMLD2_Full |</div><div class='del'>-			     SUPPORTED_FIBRE |</div><div class='del'>-			     SUPPORTED_Autoneg |</div><div class='del'>-			     SUPPORTED_Pause |</div><div class='del'>-			     SUPPORTED_Asym_Pause),</div><div class='add'>+			   SUPPORTED_10baseT_Full |</div><div class='add'>+			   SUPPORTED_100baseT_Half |</div><div class='add'>+			   SUPPORTED_100baseT_Full |</div><div class='add'>+			   SUPPORTED_1000baseT_Full |</div><div class='add'>+			   SUPPORTED_10000baseT_Full |</div><div class='add'>+			   SUPPORTED_20000baseKR2_Full |</div><div class='add'>+			   SUPPORTED_20000baseMLD2_Full |</div><div class='add'>+			   SUPPORTED_FIBRE |</div><div class='add'>+			   SUPPORTED_Autoneg |</div><div class='add'>+			   SUPPORTED_Pause |</div><div class='add'>+			   SUPPORTED_Asym_Pause),</div><div class='ctx'> 	.media_type	= ETH_PHY_UNSPECIFIED,</div><div class='ctx'> 	.ver_addr	= 0,</div><div class='ctx'> 	.req_flow_ctrl	= 0,</div><div class='hunk'>@@ -11258,7 +11106,8 @@ static struct bnx2x_phy phy_8726 = {</div><div class='ctx'> 	.addr		= 0xff,</div><div class='ctx'> 	.def_md_devad	= 0,</div><div class='ctx'> 	.flags		= (FLAGS_HW_LOCK_REQUIRED |</div><div class='del'>-			   FLAGS_INIT_XGXS_FIRST),</div><div class='add'>+			   FLAGS_INIT_XGXS_FIRST |</div><div class='add'>+			   FLAGS_TX_ERROR_CHECK),</div><div class='ctx'> 	.rx_preemphasis	= {0xffff, 0xffff, 0xffff, 0xffff},</div><div class='ctx'> 	.tx_preemphasis	= {0xffff, 0xffff, 0xffff, 0xffff},</div><div class='ctx'> 	.mdio_ctrl	= 0,</div><div class='hunk'>@@ -11289,7 +11138,8 @@ static struct bnx2x_phy phy_8727 = {</div><div class='ctx'> 	.type		= PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727,</div><div class='ctx'> 	.addr		= 0xff,</div><div class='ctx'> 	.def_md_devad	= 0,</div><div class='del'>-	.flags		= FLAGS_FAN_FAILURE_DET_REQ,</div><div class='add'>+	.flags		= (FLAGS_FAN_FAILURE_DET_REQ |</div><div class='add'>+			   FLAGS_TX_ERROR_CHECK),</div><div class='ctx'> 	.rx_preemphasis	= {0xffff, 0xffff, 0xffff, 0xffff},</div><div class='ctx'> 	.tx_preemphasis	= {0xffff, 0xffff, 0xffff, 0xffff},</div><div class='ctx'> 	.mdio_ctrl	= 0,</div><div class='hunk'>@@ -11354,8 +11204,9 @@ static struct bnx2x_phy phy_84823 = {</div><div class='ctx'> 	.type		= PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823,</div><div class='ctx'> 	.addr		= 0xff,</div><div class='ctx'> 	.def_md_devad	= 0,</div><div class='del'>-	.flags		= FLAGS_FAN_FAILURE_DET_REQ |</div><div class='del'>-			  FLAGS_REARM_LATCH_SIGNAL,</div><div class='add'>+	.flags		= (FLAGS_FAN_FAILURE_DET_REQ |</div><div class='add'>+			   FLAGS_REARM_LATCH_SIGNAL |</div><div class='add'>+			   FLAGS_TX_ERROR_CHECK),</div><div class='ctx'> 	.rx_preemphasis	= {0xffff, 0xffff, 0xffff, 0xffff},</div><div class='ctx'> 	.tx_preemphasis	= {0xffff, 0xffff, 0xffff, 0xffff},</div><div class='ctx'> 	.mdio_ctrl	= 0,</div><div class='hunk'>@@ -11390,8 +11241,9 @@ static struct bnx2x_phy phy_84833 = {</div><div class='ctx'> 	.type		= PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833,</div><div class='ctx'> 	.addr		= 0xff,</div><div class='ctx'> 	.def_md_devad	= 0,</div><div class='del'>-	.flags		= FLAGS_FAN_FAILURE_DET_REQ |</div><div class='del'>-			    FLAGS_REARM_LATCH_SIGNAL,</div><div class='add'>+	.flags		= (FLAGS_FAN_FAILURE_DET_REQ |</div><div class='add'>+			   FLAGS_REARM_LATCH_SIGNAL |</div><div class='add'>+			   FLAGS_TX_ERROR_CHECK),</div><div class='ctx'> 	.rx_preemphasis	= {0xffff, 0xffff, 0xffff, 0xffff},</div><div class='ctx'> 	.tx_preemphasis	= {0xffff, 0xffff, 0xffff, 0xffff},</div><div class='ctx'> 	.mdio_ctrl	= 0,</div><div class='hunk'>@@ -11466,9 +11318,8 @@ static void bnx2x_populate_preemphasis(struct bnx2x *bp, u32 shmem_base,</div><div class='ctx'> 	/* Get the 4 lanes xgxs config rx and tx */</div><div class='ctx'> 	u32 rx = 0, tx = 0, i;</div><div class='ctx'> 	for (i = 0; i &lt; 2; i++) {</div><div class='del'>-		/*</div><div class='del'>-		 * INT_PHY and EXT_PHY1 share the same value location in the</div><div class='del'>-		 * shmem. When num_phys is greater than 1, than this value</div><div class='add'>+		/* INT_PHY and EXT_PHY1 share the same value location in</div><div class='add'>+		 * the shmem. When num_phys is greater than 1, than this value</div><div class='ctx'> 		 * applies only to EXT_PHY1</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (phy_index == INT_PHY || phy_index == EXT_PHY1) {</div><div class='hunk'>@@ -11546,8 +11397,7 @@ static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,</div><div class='ctx'> 					offsetof(struct shmem_region, dev_info.</div><div class='ctx'> 					port_hw_config[port].default_cfg)) &amp;</div><div class='ctx'> 				 PORT_HW_CFG_NET_SERDES_IF_MASK);</div><div class='del'>-		/*</div><div class='del'>-		 * Set the appropriate supported and flags indications per</div><div class='add'>+		/* Set the appropriate supported and flags indications per</div><div class='ctx'> 		 * interface type of the chip</div><div class='ctx'> 		 */</div><div class='ctx'> 		switch (serdes_net_if) {</div><div class='hunk'>@@ -11605,8 +11455,7 @@ static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Enable MDC/MDIO work-around for E3 A0 since free running MDC</div><div class='add'>+		/* Enable MDC/MDIO work-around for E3 A0 since free running MDC</div><div class='ctx'> 		 * was not set as expected. For B0, ECO will be enabled so there</div><div class='ctx'> 		 * won't be an issue there</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -11719,8 +11568,7 @@ static int bnx2x_populate_ext_phy(struct bnx2x *bp,</div><div class='ctx'> 	phy-&gt;addr = XGXS_EXT_PHY_ADDR(ext_phy_config);</div><div class='ctx'> 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The shmem address of the phy version is located on different</div><div class='add'>+	/* The shmem address of the phy version is located on different</div><div class='ctx'> 	 * structures. In case this structure is too old, do not set</div><div class='ctx'> 	 * the address</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -11754,8 +11602,7 @@ static int bnx2x_populate_ext_phy(struct bnx2x *bp,</div><div class='ctx'> </div><div class='ctx'> 	if ((phy-&gt;type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) &amp;&amp;</div><div class='ctx'> 	    (phy-&gt;ver_addr)) {</div><div class='del'>-		/*</div><div class='del'>-		 * Remove 100Mb link supported for BCM84833 when phy fw</div><div class='add'>+		/* Remove 100Mb link supported for BCM84833 when phy fw</div><div class='ctx'> 		 * version lower than or equal to 1.39</div><div class='ctx'> 		 */</div><div class='ctx'> 		u32 raw_ver = REG_RD(bp, phy-&gt;ver_addr);</div><div class='hunk'>@@ -11765,8 +11612,7 @@ static int bnx2x_populate_ext_phy(struct bnx2x *bp,</div><div class='ctx'> 					    SUPPORTED_100baseT_Full);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * In case mdc/mdio_access of the external phy is different than the</div><div class='add'>+	/* In case mdc/mdio_access of the external phy is different than the</div><div class='ctx'> 	 * mdc/mdio access of the XGXS, a HW lock must be taken in each access</div><div class='ctx'> 	 * to prevent one port interfere with another port's CL45 operations.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -11936,13 +11782,16 @@ int bnx2x_phy_probe(struct link_params *params)</div><div class='ctx'> 		if (phy-&gt;type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		if (params-&gt;feature_config_flags &amp;</div><div class='add'>+		    FEATURE_CONFIG_DISABLE_REMOTE_FAULT_DET)</div><div class='add'>+			phy-&gt;flags &amp;= ~FLAGS_TX_ERROR_CHECK;</div><div class='add'>+</div><div class='ctx'> 		sync_offset = params-&gt;shmem_base +</div><div class='ctx'> 			offsetof(struct shmem_region,</div><div class='ctx'> 			dev_info.port_hw_config[params-&gt;port].media_type);</div><div class='ctx'> 		media_types = REG_RD(bp, sync_offset);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Update media type for non-PMF sync only for the first time</div><div class='add'>+		/* Update media type for non-PMF sync only for the first time</div><div class='ctx'> 		 * In case the media type changes afterwards, it will be updated</div><div class='ctx'> 		 * using the update_status function</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -12016,8 +11865,7 @@ void bnx2x_init_xmac_loopback(struct link_params *params,</div><div class='ctx'> 	vars-&gt;flow_ctrl = BNX2X_FLOW_CTRL_NONE;</div><div class='ctx'> 	vars-&gt;mac_type = MAC_TYPE_XMAC;</div><div class='ctx'> 	vars-&gt;phy_flags = PHY_XGXS_FLAG;</div><div class='del'>-	/*</div><div class='del'>-	 * Set WC to loopback mode since link is required to provide clock</div><div class='add'>+	/* Set WC to loopback mode since link is required to provide clock</div><div class='ctx'> 	 * to the XMAC in 20G mode</div><div class='ctx'> 	 */</div><div class='ctx'> 	bnx2x_set_aer_mmd(params, &amp;params-&gt;phy[0]);</div><div class='hunk'>@@ -12162,6 +12010,7 @@ int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)</div><div class='ctx'> 		bnx2x_link_int_enable(params);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	bnx2x_update_mng(params, vars-&gt;link_status);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -12302,7 +12151,8 @@ static int bnx2x_8073_common_init_phy(struct bnx2x *bp,</div><div class='ctx'> 				NIG_MASK_MI_INT));</div><div class='ctx'> </div><div class='ctx'> 		/* Need to take the phy out of low power mode in order</div><div class='del'>-			to write to access its registers */</div><div class='add'>+		 * to write to access its registers</div><div class='add'>+		 */</div><div class='ctx'> 		bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,</div><div class='ctx'> 			       MISC_REGISTERS_GPIO_OUTPUT_HIGH,</div><div class='ctx'> 			       port);</div><div class='hunk'>@@ -12350,8 +12200,7 @@ static int bnx2x_8073_common_init_phy(struct bnx2x *bp,</div><div class='ctx'> 				 (val | 1&lt;&lt;10));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Toggle Transmitter: Power down and then up with 600ms delay</div><div class='add'>+	/* Toggle Transmitter: Power down and then up with 600ms delay</div><div class='ctx'> 	 * between</div><div class='ctx'> 	 */</div><div class='ctx'> 	msleep(600);</div><div class='hunk'>@@ -12494,8 +12343,7 @@ static int bnx2x_8727_common_init_phy(struct bnx2x *bp,</div><div class='ctx'> 	reset_gpio = MISC_REGISTERS_GPIO_1;</div><div class='ctx'> 	port = 1;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Retrieve the reset gpio/port which control the reset.</div><div class='add'>+	/* Retrieve the reset gpio/port which control the reset.</div><div class='ctx'> 	 * Default is GPIO1, PORT1</div><div class='ctx'> 	 */</div><div class='ctx'> 	bnx2x_get_ext_phy_reset_gpio(bp, shmem_base_path[0],</div><div class='hunk'>@@ -12670,8 +12518,7 @@ static int bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[],</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726:</div><div class='del'>-		/*</div><div class='del'>-		 * GPIO1 affects both ports, so there's need to pull</div><div class='add'>+		/* GPIO1 affects both ports, so there's need to pull</div><div class='ctx'> 		 * it for single port alone</div><div class='ctx'> 		 */</div><div class='ctx'> 		rc = bnx2x_8726_common_init_phy(bp, shmem_base_path,</div><div class='hunk'>@@ -12679,8 +12526,7 @@ static int bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[],</div><div class='ctx'> 						phy_index, chip_id);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833:</div><div class='del'>-		/*</div><div class='del'>-		 * GPIO3's are linked, and so both need to be toggled</div><div class='add'>+		/* GPIO3's are linked, and so both need to be toggled</div><div class='ctx'> 		 * to obtain required 2us pulse.</div><div class='ctx'> 		 */</div><div class='ctx'> 		rc = bnx2x_84833_common_init_phy(bp, shmem_base_path,</div><div class='hunk'>@@ -12779,7 +12625,8 @@ static void bnx2x_check_over_curr(struct link_params *params,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bnx2x_analyze_link_error(struct link_params *params,</div><div class='del'>-				     struct link_vars *vars, u32 lss_status)</div><div class='add'>+				     struct link_vars *vars, u32 lss_status,</div><div class='add'>+				     u8 notify)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='ctx'> 	/* Compare new value with previous value */</div><div class='hunk'>@@ -12793,8 +12640,7 @@ static void bnx2x_analyze_link_error(struct link_params *params,</div><div class='ctx'> 	DP(NETIF_MSG_LINK, "Link changed:%x %x-&gt;%x\n", vars-&gt;link_up,</div><div class='ctx'> 		       half_open_conn, lss_status);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * a. Update shmem-&gt;link_status accordingly</div><div class='add'>+	/* a. Update shmem-&gt;link_status accordingly</div><div class='ctx'> 	 * b. Update link_vars-&gt;link_up</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (lss_status) {</div><div class='hunk'>@@ -12802,8 +12648,10 @@ static void bnx2x_analyze_link_error(struct link_params *params,</div><div class='ctx'> 		vars-&gt;link_status &amp;= ~LINK_STATUS_LINK_UP;</div><div class='ctx'> 		vars-&gt;link_up = 0;</div><div class='ctx'> 		vars-&gt;phy_flags |= PHY_HALF_OPEN_CONN_FLAG;</div><div class='del'>-		/*</div><div class='del'>-		 * Set LED mode to off since the PHY doesn't know about these</div><div class='add'>+</div><div class='add'>+		/* activate nig drain */</div><div class='add'>+		REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params-&gt;port*4, 1);</div><div class='add'>+		/* Set LED mode to off since the PHY doesn't know about these</div><div class='ctx'> 		 * errors</div><div class='ctx'> 		 */</div><div class='ctx'> 		led_mode = LED_MODE_OFF;</div><div class='hunk'>@@ -12813,7 +12661,11 @@ static void bnx2x_analyze_link_error(struct link_params *params,</div><div class='ctx'> 		vars-&gt;link_up = 1;</div><div class='ctx'> 		vars-&gt;phy_flags &amp;= ~PHY_HALF_OPEN_CONN_FLAG;</div><div class='ctx'> 		led_mode = LED_MODE_OPER;</div><div class='add'>+</div><div class='add'>+		/* Clear nig drain */</div><div class='add'>+		REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params-&gt;port*4, 0);</div><div class='ctx'> 	}</div><div class='add'>+	bnx2x_sync_link(params, vars);</div><div class='ctx'> 	/* Update the LED according to the link state */</div><div class='ctx'> 	bnx2x_set_led(params, vars, led_mode, SPEED_10000);</div><div class='ctx'> </div><div class='hunk'>@@ -12822,7 +12674,8 @@ static void bnx2x_analyze_link_error(struct link_params *params,</div><div class='ctx'> </div><div class='ctx'> 	/* C. Trigger General Attention */</div><div class='ctx'> 	vars-&gt;periodic_flags |= PERIODIC_FLAGS_LINK_EVENT;</div><div class='del'>-	bnx2x_notify_link_changed(bp);</div><div class='add'>+	if (notify)</div><div class='add'>+		bnx2x_notify_link_changed(bp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='hunk'>@@ -12834,22 +12687,23 @@ static void bnx2x_analyze_link_error(struct link_params *params,</div><div class='ctx'> *	a fault, for example, due to break in the TX side of fiber.</div><div class='ctx'> *</div><div class='ctx'> ******************************************************************************/</div><div class='del'>-static void bnx2x_check_half_open_conn(struct link_params *params,</div><div class='del'>-				       struct link_vars *vars)</div><div class='add'>+int bnx2x_check_half_open_conn(struct link_params *params,</div><div class='add'>+				struct link_vars *vars,</div><div class='add'>+				u8 notify)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x *bp = params-&gt;bp;</div><div class='ctx'> 	u32 lss_status = 0;</div><div class='ctx'> 	u32 mac_base;</div><div class='ctx'> 	/* In case link status is physically up @ 10G do */</div><div class='del'>-	if ((vars-&gt;phy_flags &amp; PHY_PHYSICAL_LINK_FLAG) == 0)</div><div class='del'>-		return;</div><div class='add'>+	if (((vars-&gt;phy_flags &amp; PHY_PHYSICAL_LINK_FLAG) == 0) ||</div><div class='add'>+	    (REG_RD(bp, NIG_REG_EGRESS_EMAC0_PORT + params-&gt;port*4)))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (CHIP_IS_E3(bp) &amp;&amp;</div><div class='ctx'> 	    (REG_RD(bp, MISC_REG_RESET_REG_2) &amp;</div><div class='ctx'> 	      (MISC_REGISTERS_RESET_REG_2_XMAC))) {</div><div class='ctx'> 		/* Check E3 XMAC */</div><div class='del'>-		/*</div><div class='del'>-		 * Note that link speed cannot be queried here, since it may be</div><div class='add'>+		/* Note that link speed cannot be queried here, since it may be</div><div class='ctx'> 		 * zero while link is down. In case UMAC is active, LSS will</div><div class='ctx'> 		 * simply not be set</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -12863,7 +12717,7 @@ static void bnx2x_check_half_open_conn(struct link_params *params,</div><div class='ctx'> 		if (REG_RD(bp, mac_base + XMAC_REG_RX_LSS_STATUS))</div><div class='ctx'> 			lss_status = 1;</div><div class='ctx'> </div><div class='del'>-		bnx2x_analyze_link_error(params, vars, lss_status);</div><div class='add'>+		bnx2x_analyze_link_error(params, vars, lss_status, notify);</div><div class='ctx'> 	} else if (REG_RD(bp, MISC_REG_RESET_REG_2) &amp;</div><div class='ctx'> 		   (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 &lt;&lt; params-&gt;port)) {</div><div class='ctx'> 		/* Check E1X / E2 BMAC */</div><div class='hunk'>@@ -12880,18 +12734,21 @@ static void bnx2x_check_half_open_conn(struct link_params *params,</div><div class='ctx'> 		REG_RD_DMAE(bp, mac_base + lss_status_reg, wb_data, 2);</div><div class='ctx'> 		lss_status = (wb_data[0] &gt; 0);</div><div class='ctx'> </div><div class='del'>-		bnx2x_analyze_link_error(params, vars, lss_status);</div><div class='add'>+		bnx2x_analyze_link_error(params, vars, lss_status, notify);</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void bnx2x_period_func(struct link_params *params, struct link_vars *vars)</div><div class='ctx'> {</div><div class='del'>-	struct bnx2x *bp = params-&gt;bp;</div><div class='ctx'> 	u16 phy_idx;</div><div class='add'>+	struct bnx2x *bp = params-&gt;bp;</div><div class='ctx'> 	for (phy_idx = INT_PHY; phy_idx &lt; MAX_PHYS; phy_idx++) {</div><div class='ctx'> 		if (params-&gt;phy[phy_idx].flags &amp; FLAGS_TX_ERROR_CHECK) {</div><div class='ctx'> 			bnx2x_set_aer_mmd(params, &amp;params-&gt;phy[phy_idx]);</div><div class='del'>-			bnx2x_check_half_open_conn(params, vars);</div><div class='add'>+			if (bnx2x_check_half_open_conn(params, vars, 1) !=</div><div class='add'>+			    0)</div><div class='add'>+				DP(NETIF_MSG_LINK, "Fault detection failed\n");</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h<br/>index 763535ee4832..ea4371f4335f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h</a></div><div class='hunk'>@@ -254,8 +254,10 @@ struct link_params {</div><div class='ctx'> #define FEATURE_CONFIG_PFC_ENABLED			(1&lt;&lt;1)</div><div class='ctx'> #define FEATURE_CONFIG_BC_SUPPORTS_OPT_MDL_VRFY		(1&lt;&lt;2)</div><div class='ctx'> #define FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY	(1&lt;&lt;3)</div><div class='add'>+#define FEATURE_CONFIG_BC_SUPPORTS_AFEX			(1&lt;&lt;8)</div><div class='ctx'> #define FEATURE_CONFIG_AUTOGREEEN_ENABLED			(1&lt;&lt;9)</div><div class='ctx'> #define FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED		(1&lt;&lt;10)</div><div class='add'>+#define FEATURE_CONFIG_DISABLE_REMOTE_FAULT_DET		(1&lt;&lt;11)</div><div class='ctx'> 	/* Will be populated during common init */</div><div class='ctx'> 	struct bnx2x_phy phy[MAX_PHYS];</div><div class='ctx'> </div><div class='hunk'>@@ -495,4 +497,6 @@ int bnx2x_sfp_module_detection(struct bnx2x_phy *phy,</div><div class='ctx'> </div><div class='ctx'> void bnx2x_period_func(struct link_params *params, struct link_vars *vars);</div><div class='ctx'> </div><div class='add'>+int bnx2x_check_half_open_conn(struct link_params *params,</div><div class='add'>+			       struct link_vars *vars, u8 notify);</div><div class='ctx'> #endif /* BNX2X_LINK_H */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c<br/>index e077d2508727..f755a665dab3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c</a></div><div class='hunk'>@@ -39,7 +39,6 @@</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/mii.h&gt;</div><div class='del'>-#include &lt;linux/if.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;net/ip.h&gt;</div><div class='ctx'> #include &lt;net/ipv6.h&gt;</div><div class='hunk'>@@ -93,15 +92,11 @@ MODULE_FIRMWARE(FW_FILE_NAME_E1);</div><div class='ctx'> MODULE_FIRMWARE(FW_FILE_NAME_E1H);</div><div class='ctx'> MODULE_FIRMWARE(FW_FILE_NAME_E2);</div><div class='ctx'> </div><div class='del'>-static int multi_mode = 1;</div><div class='del'>-module_param(multi_mode, int, 0);</div><div class='del'>-MODULE_PARM_DESC(multi_mode, " Multi queue mode "</div><div class='del'>-			     "(0 Disable; 1 Enable (default))");</div><div class='ctx'> </div><div class='ctx'> int num_queues;</div><div class='ctx'> module_param(num_queues, int, 0);</div><div class='del'>-MODULE_PARM_DESC(num_queues, " Number of queues for multi_mode=1"</div><div class='del'>-				" (default is as a number of CPUs)");</div><div class='add'>+MODULE_PARM_DESC(num_queues,</div><div class='add'>+		 " Set number of queues (default is as a number of CPUs)");</div><div class='ctx'> </div><div class='ctx'> static int disable_tpa;</div><div class='ctx'> module_param(disable_tpa, int, 0);</div><div class='hunk'>@@ -141,7 +136,9 @@ enum bnx2x_board_type {</div><div class='ctx'> 	BCM57810,</div><div class='ctx'> 	BCM57810_MF,</div><div class='ctx'> 	BCM57840,</div><div class='del'>-	BCM57840_MF</div><div class='add'>+	BCM57840_MF,</div><div class='add'>+	BCM57811,</div><div class='add'>+	BCM57811_MF</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* indexed by board_type, above */</div><div class='hunk'>@@ -158,8 +155,9 @@ static struct {</div><div class='ctx'> 	{ "Broadcom NetXtreme II BCM57810 10 Gigabit Ethernet" },</div><div class='ctx'> 	{ "Broadcom NetXtreme II BCM57810 10 Gigabit Ethernet Multi Function" },</div><div class='ctx'> 	{ "Broadcom NetXtreme II BCM57840 10/20 Gigabit Ethernet" },</div><div class='del'>-	{ "Broadcom NetXtreme II BCM57840 10/20 Gigabit "</div><div class='del'>-						"Ethernet Multi Function"}</div><div class='add'>+	{ "Broadcom NetXtreme II BCM57840 10/20 Gigabit Ethernet Multi Function"},</div><div class='add'>+	{ "Broadcom NetXtreme II BCM57811 10 Gigabit Ethernet"},</div><div class='add'>+	{ "Broadcom NetXtreme II BCM57811 10 Gigabit Ethernet Multi Function"},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifndef PCI_DEVICE_ID_NX2_57710</div><div class='hunk'>@@ -195,6 +193,12 @@ static struct {</div><div class='ctx'> #ifndef PCI_DEVICE_ID_NX2_57840_MF</div><div class='ctx'> #define PCI_DEVICE_ID_NX2_57840_MF	CHIP_NUM_57840_MF</div><div class='ctx'> #endif</div><div class='add'>+#ifndef PCI_DEVICE_ID_NX2_57811</div><div class='add'>+#define PCI_DEVICE_ID_NX2_57811		CHIP_NUM_57811</div><div class='add'>+#endif</div><div class='add'>+#ifndef PCI_DEVICE_ID_NX2_57811_MF</div><div class='add'>+#define PCI_DEVICE_ID_NX2_57811_MF	CHIP_NUM_57811_MF</div><div class='add'>+#endif</div><div class='ctx'> static DEFINE_PCI_DEVICE_TABLE(bnx2x_pci_tbl) = {</div><div class='ctx'> 	{ PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57710), BCM57710 },</div><div class='ctx'> 	{ PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57711), BCM57711 },</div><div class='hunk'>@@ -207,6 +211,8 @@ static DEFINE_PCI_DEVICE_TABLE(bnx2x_pci_tbl) = {</div><div class='ctx'> 	{ PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57810_MF), BCM57810_MF },</div><div class='ctx'> 	{ PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57840), BCM57840 },</div><div class='ctx'> 	{ PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57840_MF), BCM57840_MF },</div><div class='add'>+	{ PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57811), BCM57811 },</div><div class='add'>+	{ PCI_VDEVICE(BROADCOM, PCI_DEVICE_ID_NX2_57811_MF), BCM57811_MF },</div><div class='ctx'> 	{ 0 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -220,15 +226,15 @@ static LIST_HEAD(bnx2x_prev_list);</div><div class='ctx'> * General service functions</div><div class='ctx'> ****************************************************************************/</div><div class='ctx'> </div><div class='del'>-static inline void __storm_memset_dma_mapping(struct bnx2x *bp,</div><div class='add'>+static void __storm_memset_dma_mapping(struct bnx2x *bp,</div><div class='ctx'> 				       u32 addr, dma_addr_t mapping)</div><div class='ctx'> {</div><div class='ctx'> 	REG_WR(bp,  addr, U64_LO(mapping));</div><div class='ctx'> 	REG_WR(bp,  addr + 4, U64_HI(mapping));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void storm_memset_spq_addr(struct bnx2x *bp,</div><div class='del'>-					 dma_addr_t mapping, u16 abs_fid)</div><div class='add'>+static void storm_memset_spq_addr(struct bnx2x *bp,</div><div class='add'>+				  dma_addr_t mapping, u16 abs_fid)</div><div class='ctx'> {</div><div class='ctx'> 	u32 addr = XSEM_REG_FAST_MEMORY +</div><div class='ctx'> 			XSTORM_SPQ_PAGE_BASE_OFFSET(abs_fid);</div><div class='hunk'>@@ -236,8 +242,8 @@ static inline void storm_memset_spq_addr(struct bnx2x *bp,</div><div class='ctx'> 	__storm_memset_dma_mapping(bp, addr, mapping);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,</div><div class='del'>-					 u16 pf_id)</div><div class='add'>+static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,</div><div class='add'>+				  u16 pf_id)</div><div class='ctx'> {</div><div class='ctx'> 	REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),</div><div class='ctx'> 		pf_id);</div><div class='hunk'>@@ -249,8 +255,8 @@ static inline void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,</div><div class='ctx'> 		pf_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,</div><div class='del'>-					u8 enable)</div><div class='add'>+static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,</div><div class='add'>+				 u8 enable)</div><div class='ctx'> {</div><div class='ctx'> 	REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),</div><div class='ctx'> 		enable);</div><div class='hunk'>@@ -262,8 +268,8 @@ static inline void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,</div><div class='ctx'> 		enable);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void storm_memset_eq_data(struct bnx2x *bp,</div><div class='del'>-				struct event_ring_data *eq_data,</div><div class='add'>+static void storm_memset_eq_data(struct bnx2x *bp,</div><div class='add'>+				 struct event_ring_data *eq_data,</div><div class='ctx'> 				u16 pfid)</div><div class='ctx'> {</div><div class='ctx'> 	size_t size = sizeof(struct event_ring_data);</div><div class='hunk'>@@ -273,8 +279,8 @@ static inline void storm_memset_eq_data(struct bnx2x *bp,</div><div class='ctx'> 	__storm_memset_struct(bp, addr, size, (u32 *)eq_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void storm_memset_eq_prod(struct bnx2x *bp, u16 eq_prod,</div><div class='del'>-					u16 pfid)</div><div class='add'>+static void storm_memset_eq_prod(struct bnx2x *bp, u16 eq_prod,</div><div class='add'>+				 u16 pfid)</div><div class='ctx'> {</div><div class='ctx'> 	u32 addr = BAR_CSTRORM_INTMEM + CSTORM_EVENT_RING_PROD_OFFSET(pfid);</div><div class='ctx'> 	REG_WR16(bp, addr, eq_prod);</div><div class='hunk'>@@ -309,67 +315,6 @@ static u32 bnx2x_reg_rd_ind(struct bnx2x *bp, u32 addr)</div><div class='ctx'> #define DMAE_DP_DST_PCI		"pci dst_addr [%x:%08x]"</div><div class='ctx'> #define DMAE_DP_DST_NONE	"dst_addr [none]"</div><div class='ctx'> </div><div class='del'>-static void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae,</div><div class='del'>-			  int msglvl)</div><div class='del'>-{</div><div class='del'>-	u32 src_type = dmae-&gt;opcode &amp; DMAE_COMMAND_SRC;</div><div class='del'>-</div><div class='del'>-	switch (dmae-&gt;opcode &amp; DMAE_COMMAND_DST) {</div><div class='del'>-	case DMAE_CMD_DST_PCI:</div><div class='del'>-		if (src_type == DMAE_CMD_SRC_PCI)</div><div class='del'>-			DP(msglvl, "DMAE: opcode 0x%08x\n"</div><div class='del'>-			   "src [%x:%08x], len [%d*4], dst [%x:%08x]\n"</div><div class='del'>-			   "comp_addr [%x:%08x], comp_val 0x%08x\n",</div><div class='del'>-			   dmae-&gt;opcode, dmae-&gt;src_addr_hi, dmae-&gt;src_addr_lo,</div><div class='del'>-			   dmae-&gt;len, dmae-&gt;dst_addr_hi, dmae-&gt;dst_addr_lo,</div><div class='del'>-			   dmae-&gt;comp_addr_hi, dmae-&gt;comp_addr_lo,</div><div class='del'>-			   dmae-&gt;comp_val);</div><div class='del'>-		else</div><div class='del'>-			DP(msglvl, "DMAE: opcode 0x%08x\n"</div><div class='del'>-			   "src [%08x], len [%d*4], dst [%x:%08x]\n"</div><div class='del'>-			   "comp_addr [%x:%08x], comp_val 0x%08x\n",</div><div class='del'>-			   dmae-&gt;opcode, dmae-&gt;src_addr_lo &gt;&gt; 2,</div><div class='del'>-			   dmae-&gt;len, dmae-&gt;dst_addr_hi, dmae-&gt;dst_addr_lo,</div><div class='del'>-			   dmae-&gt;comp_addr_hi, dmae-&gt;comp_addr_lo,</div><div class='del'>-			   dmae-&gt;comp_val);</div><div class='del'>-		break;</div><div class='del'>-	case DMAE_CMD_DST_GRC:</div><div class='del'>-		if (src_type == DMAE_CMD_SRC_PCI)</div><div class='del'>-			DP(msglvl, "DMAE: opcode 0x%08x\n"</div><div class='del'>-			   "src [%x:%08x], len [%d*4], dst_addr [%08x]\n"</div><div class='del'>-			   "comp_addr [%x:%08x], comp_val 0x%08x\n",</div><div class='del'>-			   dmae-&gt;opcode, dmae-&gt;src_addr_hi, dmae-&gt;src_addr_lo,</div><div class='del'>-			   dmae-&gt;len, dmae-&gt;dst_addr_lo &gt;&gt; 2,</div><div class='del'>-			   dmae-&gt;comp_addr_hi, dmae-&gt;comp_addr_lo,</div><div class='del'>-			   dmae-&gt;comp_val);</div><div class='del'>-		else</div><div class='del'>-			DP(msglvl, "DMAE: opcode 0x%08x\n"</div><div class='del'>-			   "src [%08x], len [%d*4], dst [%08x]\n"</div><div class='del'>-			   "comp_addr [%x:%08x], comp_val 0x%08x\n",</div><div class='del'>-			   dmae-&gt;opcode, dmae-&gt;src_addr_lo &gt;&gt; 2,</div><div class='del'>-			   dmae-&gt;len, dmae-&gt;dst_addr_lo &gt;&gt; 2,</div><div class='del'>-			   dmae-&gt;comp_addr_hi, dmae-&gt;comp_addr_lo,</div><div class='del'>-			   dmae-&gt;comp_val);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		if (src_type == DMAE_CMD_SRC_PCI)</div><div class='del'>-			DP(msglvl, "DMAE: opcode 0x%08x\n"</div><div class='del'>-			   "src_addr [%x:%08x]  len [%d * 4]  dst_addr [none]\n"</div><div class='del'>-			   "comp_addr [%x:%08x]  comp_val 0x%08x\n",</div><div class='del'>-			   dmae-&gt;opcode, dmae-&gt;src_addr_hi, dmae-&gt;src_addr_lo,</div><div class='del'>-			   dmae-&gt;len, dmae-&gt;comp_addr_hi, dmae-&gt;comp_addr_lo,</div><div class='del'>-			   dmae-&gt;comp_val);</div><div class='del'>-		else</div><div class='del'>-			DP(msglvl, "DMAE: opcode 0x%08x\n"</div><div class='del'>-			   "src_addr [%08x]  len [%d * 4]  dst_addr [none]\n"</div><div class='del'>-			   "comp_addr [%x:%08x]  comp_val 0x%08x\n",</div><div class='del'>-			   dmae-&gt;opcode, dmae-&gt;src_addr_lo &gt;&gt; 2,</div><div class='del'>-			   dmae-&gt;len, dmae-&gt;comp_addr_hi, dmae-&gt;comp_addr_lo,</div><div class='del'>-			   dmae-&gt;comp_val);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /* copy command into DMAE command memory and set DMAE command go */</div><div class='ctx'> void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx)</div><div class='hunk'>@@ -506,8 +451,6 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,</div><div class='ctx'> 	dmae.dst_addr_hi = 0;</div><div class='ctx'> 	dmae.len = len32;</div><div class='ctx'> </div><div class='del'>-	bnx2x_dp_dmae(bp, &amp;dmae, BNX2X_MSG_OFF);</div><div class='del'>-</div><div class='ctx'> 	/* issue the command and wait for completion */</div><div class='ctx'> 	bnx2x_issue_dmae_with_comp(bp, &amp;dmae);</div><div class='ctx'> }</div><div class='hunk'>@@ -540,8 +483,6 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32)</div><div class='ctx'> 	dmae.dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_data));</div><div class='ctx'> 	dmae.len = len32;</div><div class='ctx'> </div><div class='del'>-	bnx2x_dp_dmae(bp, &amp;dmae, BNX2X_MSG_OFF);</div><div class='del'>-</div><div class='ctx'> 	/* issue the command and wait for completion */</div><div class='ctx'> 	bnx2x_issue_dmae_with_comp(bp, &amp;dmae);</div><div class='ctx'> }</div><div class='hunk'>@@ -562,27 +503,6 @@ static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr,</div><div class='ctx'> 	bnx2x_write_dmae(bp, phys_addr + offset, addr + offset, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* used only for slowpath so not inlined */</div><div class='del'>-static void bnx2x_wb_wr(struct bnx2x *bp, int reg, u32 val_hi, u32 val_lo)</div><div class='del'>-{</div><div class='del'>-	u32 wb_write[2];</div><div class='del'>-</div><div class='del'>-	wb_write[0] = val_hi;</div><div class='del'>-	wb_write[1] = val_lo;</div><div class='del'>-	REG_WR_DMAE(bp, reg, wb_write, 2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef USE_WB_RD</div><div class='del'>-static u64 bnx2x_wb_rd(struct bnx2x *bp, int reg)</div><div class='del'>-{</div><div class='del'>-	u32 wb_data[2];</div><div class='del'>-</div><div class='del'>-	REG_RD_DMAE(bp, reg, wb_data, 2);</div><div class='del'>-</div><div class='del'>-	return HILO_U64(wb_data[0], wb_data[1]);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static int bnx2x_mc_assert(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	char last_idx;</div><div class='hunk'>@@ -756,7 +676,7 @@ void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl)</div><div class='ctx'> 	printk("%s" "end of fw dump\n", lvl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_fw_dump(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_fw_dump(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	bnx2x_fw_dump_lvl(bp, KERN_ERR);</div><div class='ctx'> }</div><div class='hunk'>@@ -1076,8 +996,8 @@ static void bnx2x_pbf_pN_cmd_flushed(struct bnx2x *bp,</div><div class='ctx'> 	   poll_count-cur_cnt, FLR_WAIT_INTERVAL, regs-&gt;pN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 bnx2x_flr_clnup_reg_poll(struct bnx2x *bp, u32 reg,</div><div class='del'>-				     u32 expected, u32 poll_count)</div><div class='add'>+static u32 bnx2x_flr_clnup_reg_poll(struct bnx2x *bp, u32 reg,</div><div class='add'>+				    u32 expected, u32 poll_count)</div><div class='ctx'> {</div><div class='ctx'> 	u32 cur_cnt = poll_count;</div><div class='ctx'> 	u32 val;</div><div class='hunk'>@@ -1088,8 +1008,8 @@ static inline u32 bnx2x_flr_clnup_reg_poll(struct bnx2x *bp, u32 reg,</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_flr_clnup_poll_hw_counter(struct bnx2x *bp, u32 reg,</div><div class='del'>-						  char *msg, u32 poll_cnt)</div><div class='add'>+static int bnx2x_flr_clnup_poll_hw_counter(struct bnx2x *bp, u32 reg,</div><div class='add'>+					   char *msg, u32 poll_cnt)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val = bnx2x_flr_clnup_reg_poll(bp, reg, 0, poll_cnt);</div><div class='ctx'> 	if (val != 0) {</div><div class='hunk'>@@ -1186,7 +1106,7 @@ static void bnx2x_tx_hw_flushed(struct bnx2x *bp, u32 poll_count)</div><div class='ctx'> 	(((index) &lt;&lt; SDM_OP_GEN_AGG_VECT_IDX_SHIFT) &amp; SDM_OP_GEN_AGG_VECT_IDX)</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func,</div><div class='add'>+static int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func,</div><div class='ctx'> 					 u32 poll_cnt)</div><div class='ctx'> {</div><div class='ctx'> 	struct sdm_op_gen op_gen = {0};</div><div class='hunk'>@@ -1220,7 +1140,7 @@ static inline int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u8 bnx2x_is_pcie_pending(struct pci_dev *dev)</div><div class='add'>+static u8 bnx2x_is_pcie_pending(struct pci_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int pos;</div><div class='ctx'> 	u16 status;</div><div class='hunk'>@@ -1361,14 +1281,17 @@ static void bnx2x_hc_int_enable(struct bnx2x *bp)</div><div class='ctx'> 	int port = BP_PORT(bp);</div><div class='ctx'> 	u32 addr = port ? HC_REG_CONFIG_1 : HC_REG_CONFIG_0;</div><div class='ctx'> 	u32 val = REG_RD(bp, addr);</div><div class='del'>-	int msix = (bp-&gt;flags &amp; USING_MSIX_FLAG) ? 1 : 0;</div><div class='del'>-	int msi = (bp-&gt;flags &amp; USING_MSI_FLAG) ? 1 : 0;</div><div class='add'>+	bool msix = (bp-&gt;flags &amp; USING_MSIX_FLAG) ? true : false;</div><div class='add'>+	bool single_msix = (bp-&gt;flags &amp; USING_SINGLE_MSIX_FLAG) ? true : false;</div><div class='add'>+	bool msi = (bp-&gt;flags &amp; USING_MSI_FLAG) ? true : false;</div><div class='ctx'> </div><div class='ctx'> 	if (msix) {</div><div class='ctx'> 		val &amp;= ~(HC_CONFIG_0_REG_SINGLE_ISR_EN_0 |</div><div class='ctx'> 			 HC_CONFIG_0_REG_INT_LINE_EN_0);</div><div class='ctx'> 		val |= (HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0 |</div><div class='ctx'> 			HC_CONFIG_0_REG_ATTN_BIT_EN_0);</div><div class='add'>+		if (single_msix)</div><div class='add'>+			val |= HC_CONFIG_0_REG_SINGLE_ISR_EN_0;</div><div class='ctx'> 	} else if (msi) {</div><div class='ctx'> 		val &amp;= ~HC_CONFIG_0_REG_INT_LINE_EN_0;</div><div class='ctx'> 		val |= (HC_CONFIG_0_REG_SINGLE_ISR_EN_0 |</div><div class='hunk'>@@ -1425,8 +1348,9 @@ static void bnx2x_hc_int_enable(struct bnx2x *bp)</div><div class='ctx'> static void bnx2x_igu_int_enable(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='del'>-	int msix = (bp-&gt;flags &amp; USING_MSIX_FLAG) ? 1 : 0;</div><div class='del'>-	int msi = (bp-&gt;flags &amp; USING_MSI_FLAG) ? 1 : 0;</div><div class='add'>+	bool msix = (bp-&gt;flags &amp; USING_MSIX_FLAG) ? true : false;</div><div class='add'>+	bool single_msix = (bp-&gt;flags &amp; USING_SINGLE_MSIX_FLAG) ? true : false;</div><div class='add'>+	bool msi = (bp-&gt;flags &amp; USING_MSI_FLAG) ? true : false;</div><div class='ctx'> </div><div class='ctx'> 	val = REG_RD(bp, IGU_REG_PF_CONFIGURATION);</div><div class='ctx'> </div><div class='hunk'>@@ -1436,6 +1360,9 @@ static void bnx2x_igu_int_enable(struct bnx2x *bp)</div><div class='ctx'> 		val |= (IGU_PF_CONF_FUNC_EN |</div><div class='ctx'> 			IGU_PF_CONF_MSI_MSIX_EN |</div><div class='ctx'> 			IGU_PF_CONF_ATTN_BIT_EN);</div><div class='add'>+</div><div class='add'>+		if (single_msix)</div><div class='add'>+			val |= IGU_PF_CONF_SINGLE_ISR_EN;</div><div class='ctx'> 	} else if (msi) {</div><div class='ctx'> 		val &amp;= ~IGU_PF_CONF_INT_LINE_EN;</div><div class='ctx'> 		val |= (IGU_PF_CONF_FUNC_EN |</div><div class='hunk'>@@ -1455,6 +1382,9 @@ static void bnx2x_igu_int_enable(struct bnx2x *bp)</div><div class='ctx'> </div><div class='ctx'> 	REG_WR(bp, IGU_REG_PF_CONFIGURATION, val);</div><div class='ctx'> </div><div class='add'>+	if (val &amp; IGU_PF_CONF_INT_LINE_EN)</div><div class='add'>+		pci_intx(bp-&gt;pdev, true);</div><div class='add'>+</div><div class='ctx'> 	barrier();</div><div class='ctx'> </div><div class='ctx'> 	/* init leading/trailing edge */</div><div class='hunk'>@@ -1623,7 +1553,7 @@ static bool bnx2x_trylock_hw_lock(struct bnx2x *bp, u32 resource)</div><div class='ctx'>  * Returns the recovery leader resource id according to the engine this function</div><div class='ctx'>  * belongs to. Currently only only 2 engines is supported.</div><div class='ctx'>  */</div><div class='del'>-static inline int bnx2x_get_leader_lock_resource(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_get_leader_lock_resource(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	if (BP_PATH(bp))</div><div class='ctx'> 		return HW_LOCK_RESOURCE_RECOVERY_LEADER_1;</div><div class='hunk'>@@ -1636,9 +1566,9 @@ static inline int bnx2x_get_leader_lock_resource(struct bnx2x *bp)</div><div class='ctx'>  *</div><div class='ctx'>  * @bp: driver handle</div><div class='ctx'>  *</div><div class='del'>- * Tries to aquire a leader lock for cuurent engine.</div><div class='add'>+ * Tries to aquire a leader lock for current engine.</div><div class='ctx'>  */</div><div class='del'>-static inline bool bnx2x_trylock_leader_lock(struct bnx2x *bp)</div><div class='add'>+static bool bnx2x_trylock_leader_lock(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	return bnx2x_trylock_hw_lock(bp, bnx2x_get_leader_lock_resource(bp));</div><div class='ctx'> }</div><div class='hunk'>@@ -1719,6 +1649,27 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe)</div><div class='ctx'> </div><div class='ctx'> 	DP(BNX2X_MSG_SP, "bp-&gt;cq_spq_left %x\n", atomic_read(&amp;bp-&gt;cq_spq_left));</div><div class='ctx'> </div><div class='add'>+	if ((drv_cmd == BNX2X_Q_CMD_UPDATE) &amp;&amp; (IS_FCOE_FP(fp)) &amp;&amp;</div><div class='add'>+	    (!!test_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &amp;bp-&gt;sp_state))) {</div><div class='add'>+		/* if Q update ramrod is completed for last Q in AFEX vif set</div><div class='add'>+		 * flow, then ACK MCP at the end</div><div class='add'>+		 *</div><div class='add'>+		 * mark pending ACK to MCP bit.</div><div class='add'>+		 * prevent case that both bits are cleared.</div><div class='add'>+		 * At the end of load/unload driver checks that</div><div class='add'>+		 * sp_state is cleaerd, and this order prevents</div><div class='add'>+		 * races</div><div class='add'>+		 */</div><div class='add'>+		smp_mb__before_clear_bit();</div><div class='add'>+		set_bit(BNX2X_AFEX_PENDING_VIFSET_MCP_ACK, &amp;bp-&gt;sp_state);</div><div class='add'>+		wmb();</div><div class='add'>+		clear_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &amp;bp-&gt;sp_state);</div><div class='add'>+		smp_mb__after_clear_bit();</div><div class='add'>+</div><div class='add'>+		/* schedule workqueue to send ack to MCP */</div><div class='add'>+		queue_delayed_work(bnx2x_wq, &amp;bp-&gt;sp_task, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2229,40 +2180,6 @@ u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bnx2x_init_port_minmax(struct bnx2x *bp)</div><div class='del'>-{</div><div class='del'>-	u32 r_param = bp-&gt;link_vars.line_speed / 8;</div><div class='del'>-	u32 fair_periodic_timeout_usec;</div><div class='del'>-	u32 t_fair;</div><div class='del'>-</div><div class='del'>-	memset(&amp;(bp-&gt;cmng.rs_vars), 0,</div><div class='del'>-	       sizeof(struct rate_shaping_vars_per_port));</div><div class='del'>-	memset(&amp;(bp-&gt;cmng.fair_vars), 0, sizeof(struct fairness_vars_per_port));</div><div class='del'>-</div><div class='del'>-	/* 100 usec in SDM ticks = 25 since each tick is 4 usec */</div><div class='del'>-	bp-&gt;cmng.rs_vars.rs_periodic_timeout = RS_PERIODIC_TIMEOUT_USEC / 4;</div><div class='del'>-</div><div class='del'>-	/* this is the threshold below which no timer arming will occur</div><div class='del'>-	   1.25 coefficient is for the threshold to be a little bigger</div><div class='del'>-	   than the real time, to compensate for timer in-accuracy */</div><div class='del'>-	bp-&gt;cmng.rs_vars.rs_threshold =</div><div class='del'>-				(RS_PERIODIC_TIMEOUT_USEC * r_param * 5) / 4;</div><div class='del'>-</div><div class='del'>-	/* resolution of fairness timer */</div><div class='del'>-	fair_periodic_timeout_usec = QM_ARB_BYTES / r_param;</div><div class='del'>-	/* for 10G it is 1000usec. for 1G it is 10000usec. */</div><div class='del'>-	t_fair = T_FAIR_COEF / bp-&gt;link_vars.line_speed;</div><div class='del'>-</div><div class='del'>-	/* this is the threshold below which we won't arm the timer anymore */</div><div class='del'>-	bp-&gt;cmng.fair_vars.fair_threshold = QM_ARB_BYTES;</div><div class='del'>-</div><div class='del'>-	/* we multiply by 1e3/8 to get bytes/msec.</div><div class='del'>-	   We don't want the credits to pass a credit</div><div class='del'>-	   of the t_fair*FAIR_MEM (algorithm resolution) */</div><div class='del'>-	bp-&gt;cmng.fair_vars.upper_bound = r_param * t_fair * FAIR_MEM;</div><div class='del'>-	/* since each tick is 4 usec */</div><div class='del'>-	bp-&gt;cmng.fair_vars.fairness_timeout = fair_periodic_timeout_usec / 4;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /* Calculates the sum of vn_min_rates.</div><div class='ctx'>    It's needed for further normalizing of the min_rates.</div><div class='hunk'>@@ -2273,12 +2190,12 @@ static void bnx2x_init_port_minmax(struct bnx2x *bp)</div><div class='ctx'>      In the later case fainess algorithm should be deactivated.</div><div class='ctx'>      If not all min_rates are zero then those that are zeroes will be set to 1.</div><div class='ctx'>  */</div><div class='del'>-static void bnx2x_calc_vn_weight_sum(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_calc_vn_min(struct bnx2x *bp,</div><div class='add'>+				      struct cmng_init_input *input)</div><div class='ctx'> {</div><div class='ctx'> 	int all_zero = 1;</div><div class='ctx'> 	int vn;</div><div class='ctx'> </div><div class='del'>-	bp-&gt;vn_weight_sum = 0;</div><div class='ctx'> 	for (vn = VN_0; vn &lt; BP_MAX_VN_NUM(bp); vn++) {</div><div class='ctx'> 		u32 vn_cfg = bp-&gt;mf_config[vn];</div><div class='ctx'> 		u32 vn_min_rate = ((vn_cfg &amp; FUNC_MF_CFG_MIN_BW_MASK) &gt;&gt;</div><div class='hunk'>@@ -2286,106 +2203,56 @@ static void bnx2x_calc_vn_weight_sum(struct bnx2x *bp)</div><div class='ctx'> </div><div class='ctx'> 		/* Skip hidden vns */</div><div class='ctx'> 		if (vn_cfg &amp; FUNC_MF_CFG_FUNC_HIDE)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='add'>+			vn_min_rate = 0;</div><div class='ctx'> 		/* If min rate is zero - set it to 1 */</div><div class='del'>-		if (!vn_min_rate)</div><div class='add'>+		else if (!vn_min_rate)</div><div class='ctx'> 			vn_min_rate = DEF_MIN_RATE;</div><div class='ctx'> 		else</div><div class='ctx'> 			all_zero = 0;</div><div class='ctx'> </div><div class='del'>-		bp-&gt;vn_weight_sum += vn_min_rate;</div><div class='add'>+		input-&gt;vnic_min_rate[vn] = vn_min_rate;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* if ETS or all min rates are zeros - disable fairness */</div><div class='ctx'> 	if (BNX2X_IS_ETS_ENABLED(bp)) {</div><div class='del'>-		bp-&gt;cmng.flags.cmng_enables &amp;=</div><div class='add'>+		input-&gt;flags.cmng_enables &amp;=</div><div class='ctx'> 					~CMNG_FLAGS_PER_PORT_FAIRNESS_VN;</div><div class='ctx'> 		DP(NETIF_MSG_IFUP, "Fairness will be disabled due to ETS\n");</div><div class='ctx'> 	} else if (all_zero) {</div><div class='del'>-		bp-&gt;cmng.flags.cmng_enables &amp;=</div><div class='add'>+		input-&gt;flags.cmng_enables &amp;=</div><div class='ctx'> 					~CMNG_FLAGS_PER_PORT_FAIRNESS_VN;</div><div class='del'>-		DP(NETIF_MSG_IFUP, "All MIN values are zeroes"</div><div class='del'>-		   "  fairness will be disabled\n");</div><div class='add'>+		DP(NETIF_MSG_IFUP,</div><div class='add'>+		   "All MIN values are zeroes fairness will be disabled\n");</div><div class='ctx'> 	} else</div><div class='del'>-		bp-&gt;cmng.flags.cmng_enables |=</div><div class='add'>+		input-&gt;flags.cmng_enables |=</div><div class='ctx'> 					CMNG_FLAGS_PER_PORT_FAIRNESS_VN;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bnx2x_init_vn_minmax(struct bnx2x *bp, int vn)</div><div class='add'>+static void bnx2x_calc_vn_max(struct bnx2x *bp, int vn,</div><div class='add'>+				    struct cmng_init_input *input)</div><div class='ctx'> {</div><div class='del'>-	struct rate_shaping_vars_per_vn m_rs_vn;</div><div class='del'>-	struct fairness_vars_per_vn m_fair_vn;</div><div class='add'>+	u16 vn_max_rate;</div><div class='ctx'> 	u32 vn_cfg = bp-&gt;mf_config[vn];</div><div class='del'>-	int func = func_by_vn(bp, vn);</div><div class='del'>-	u16 vn_min_rate, vn_max_rate;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='del'>-	/* If function is hidden - set min and max to zeroes */</div><div class='del'>-	if (vn_cfg &amp; FUNC_MF_CFG_FUNC_HIDE) {</div><div class='del'>-		vn_min_rate = 0;</div><div class='add'>+	if (vn_cfg &amp; FUNC_MF_CFG_FUNC_HIDE)</div><div class='ctx'> 		vn_max_rate = 0;</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='add'>+	else {</div><div class='ctx'> 		u32 maxCfg = bnx2x_extract_max_cfg(bp, vn_cfg);</div><div class='ctx'> </div><div class='del'>-		vn_min_rate = ((vn_cfg &amp; FUNC_MF_CFG_MIN_BW_MASK) &gt;&gt;</div><div class='del'>-				FUNC_MF_CFG_MIN_BW_SHIFT) * 100;</div><div class='del'>-		/* If fairness is enabled (not all min rates are zeroes) and</div><div class='del'>-		   if current min rate is zero - set it to 1.</div><div class='del'>-		   This is a requirement of the algorithm. */</div><div class='del'>-		if (bp-&gt;vn_weight_sum &amp;&amp; (vn_min_rate == 0))</div><div class='del'>-			vn_min_rate = DEF_MIN_RATE;</div><div class='del'>-</div><div class='del'>-		if (IS_MF_SI(bp))</div><div class='add'>+		if (IS_MF_SI(bp)) {</div><div class='ctx'> 			/* maxCfg in percents of linkspeed */</div><div class='ctx'> 			vn_max_rate = (bp-&gt;link_vars.line_speed * maxCfg) / 100;</div><div class='del'>-		else</div><div class='add'>+		} else /* SD modes */</div><div class='ctx'> 			/* maxCfg is absolute in 100Mb units */</div><div class='ctx'> 			vn_max_rate = maxCfg * 100;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	DP(NETIF_MSG_IFUP,</div><div class='del'>-	   "func %d: vn_min_rate %d  vn_max_rate %d  vn_weight_sum %d\n",</div><div class='del'>-	   func, vn_min_rate, vn_max_rate, bp-&gt;vn_weight_sum);</div><div class='del'>-</div><div class='del'>-	memset(&amp;m_rs_vn, 0, sizeof(struct rate_shaping_vars_per_vn));</div><div class='del'>-	memset(&amp;m_fair_vn, 0, sizeof(struct fairness_vars_per_vn));</div><div class='del'>-</div><div class='del'>-	/* global vn counter - maximal Mbps for this vn */</div><div class='del'>-	m_rs_vn.vn_counter.rate = vn_max_rate;</div><div class='del'>-</div><div class='del'>-	/* quota - number of bytes transmitted in this period */</div><div class='del'>-	m_rs_vn.vn_counter.quota =</div><div class='del'>-				(vn_max_rate * RS_PERIODIC_TIMEOUT_USEC) / 8;</div><div class='del'>-</div><div class='del'>-	if (bp-&gt;vn_weight_sum) {</div><div class='del'>-		/* credit for each period of the fairness algorithm:</div><div class='del'>-		   number of bytes in T_FAIR (the vn share the port rate).</div><div class='del'>-		   vn_weight_sum should not be larger than 10000, thus</div><div class='del'>-		   T_FAIR_COEF / (8 * vn_weight_sum) will always be greater</div><div class='del'>-		   than zero */</div><div class='del'>-		m_fair_vn.vn_credit_delta =</div><div class='del'>-			max_t(u32, (vn_min_rate * (T_FAIR_COEF /</div><div class='del'>-						   (8 * bp-&gt;vn_weight_sum))),</div><div class='del'>-			      (bp-&gt;cmng.fair_vars.fair_threshold +</div><div class='del'>-							MIN_ABOVE_THRESH));</div><div class='del'>-		DP(NETIF_MSG_IFUP, "m_fair_vn.vn_credit_delta %d\n",</div><div class='del'>-		   m_fair_vn.vn_credit_delta);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Store it to internal memory */</div><div class='del'>-	for (i = 0; i &lt; sizeof(struct rate_shaping_vars_per_vn)/4; i++)</div><div class='del'>-		REG_WR(bp, BAR_XSTRORM_INTMEM +</div><div class='del'>-		       XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(func) + i * 4,</div><div class='del'>-		       ((u32 *)(&amp;m_rs_vn))[i]);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; sizeof(struct fairness_vars_per_vn)/4; i++)</div><div class='del'>-		REG_WR(bp, BAR_XSTRORM_INTMEM +</div><div class='del'>-		       XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(func) + i * 4,</div><div class='del'>-		       ((u32 *)(&amp;m_fair_vn))[i]);</div><div class='add'>+	DP(NETIF_MSG_IFUP, "vn %d: vn_max_rate %d\n", vn, vn_max_rate);</div><div class='add'>+</div><div class='add'>+	input-&gt;vnic_max_rate[vn] = vn_max_rate;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> static int bnx2x_get_cmng_fns_mode(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	if (CHIP_REV_IS_SLOW(bp))</div><div class='hunk'>@@ -2423,38 +2290,42 @@ void bnx2x_read_mf_cfg(struct bnx2x *bp)</div><div class='ctx'> 		bp-&gt;mf_config[vn] =</div><div class='ctx'> 			MF_CFG_RD(bp, func_mf_config[func].config);</div><div class='ctx'> 	}</div><div class='add'>+	if (bp-&gt;mf_config[BP_VN(bp)] &amp; FUNC_MF_CFG_FUNC_DISABLED) {</div><div class='add'>+		DP(NETIF_MSG_IFUP, "mf_cfg function disabled\n");</div><div class='add'>+		bp-&gt;flags |= MF_FUNC_DIS;</div><div class='add'>+	} else {</div><div class='add'>+		DP(NETIF_MSG_IFUP, "mf_cfg function enabled\n");</div><div class='add'>+		bp-&gt;flags &amp;= ~MF_FUNC_DIS;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type)</div><div class='ctx'> {</div><div class='add'>+	struct cmng_init_input input;</div><div class='add'>+	memset(&amp;input, 0, sizeof(struct cmng_init_input));</div><div class='add'>+</div><div class='add'>+	input.port_rate = bp-&gt;link_vars.line_speed;</div><div class='ctx'> </div><div class='ctx'> 	if (cmng_type == CMNG_FNS_MINMAX) {</div><div class='ctx'> 		int vn;</div><div class='ctx'> </div><div class='del'>-		/* clear cmng_enables */</div><div class='del'>-		bp-&gt;cmng.flags.cmng_enables = 0;</div><div class='del'>-</div><div class='ctx'> 		/* read mf conf from shmem */</div><div class='ctx'> 		if (read_cfg)</div><div class='ctx'> 			bnx2x_read_mf_cfg(bp);</div><div class='ctx'> </div><div class='del'>-		/* Init rate shaping and fairness contexts */</div><div class='del'>-		bnx2x_init_port_minmax(bp);</div><div class='del'>-</div><div class='ctx'> 		/* vn_weight_sum and enable fairness if not 0 */</div><div class='del'>-		bnx2x_calc_vn_weight_sum(bp);</div><div class='add'>+		bnx2x_calc_vn_min(bp, &amp;input);</div><div class='ctx'> </div><div class='ctx'> 		/* calculate and set min-max rate for each vn */</div><div class='ctx'> 		if (bp-&gt;port.pmf)</div><div class='ctx'> 			for (vn = VN_0; vn &lt; BP_MAX_VN_NUM(bp); vn++)</div><div class='del'>-				bnx2x_init_vn_minmax(bp, vn);</div><div class='add'>+				bnx2x_calc_vn_max(bp, vn, &amp;input);</div><div class='ctx'> </div><div class='ctx'> 		/* always enable rate shaping and fairness */</div><div class='del'>-		bp-&gt;cmng.flags.cmng_enables |=</div><div class='add'>+		input.flags.cmng_enables |=</div><div class='ctx'> 					CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN;</div><div class='del'>-		if (!bp-&gt;vn_weight_sum)</div><div class='del'>-			DP(NETIF_MSG_IFUP, "All MIN values are zeroes"</div><div class='del'>-				   "  fairness will be disabled\n");</div><div class='add'>+</div><div class='add'>+		bnx2x_init_cmng(&amp;input, &amp;bp-&gt;cmng);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2463,6 +2334,35 @@ static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type)</div><div class='ctx'> 	   "rate shaping and fairness are disabled\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void storm_memset_cmng(struct bnx2x *bp,</div><div class='add'>+			      struct cmng_init *cmng,</div><div class='add'>+			      u8 port)</div><div class='add'>+{</div><div class='add'>+	int vn;</div><div class='add'>+	size_t size = sizeof(struct cmng_struct_per_port);</div><div class='add'>+</div><div class='add'>+	u32 addr = BAR_XSTRORM_INTMEM +</div><div class='add'>+			XSTORM_CMNG_PER_PORT_VARS_OFFSET(port);</div><div class='add'>+</div><div class='add'>+	__storm_memset_struct(bp, addr, size, (u32 *)&amp;cmng-&gt;port);</div><div class='add'>+</div><div class='add'>+	for (vn = VN_0; vn &lt; BP_MAX_VN_NUM(bp); vn++) {</div><div class='add'>+		int func = func_by_vn(bp, vn);</div><div class='add'>+</div><div class='add'>+		addr = BAR_XSTRORM_INTMEM +</div><div class='add'>+		       XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(func);</div><div class='add'>+		size = sizeof(struct rate_shaping_vars_per_vn);</div><div class='add'>+		__storm_memset_struct(bp, addr, size,</div><div class='add'>+				      (u32 *)&amp;cmng-&gt;vnic.vnic_max_rate[vn]);</div><div class='add'>+</div><div class='add'>+		addr = BAR_XSTRORM_INTMEM +</div><div class='add'>+		       XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(func);</div><div class='add'>+		size = sizeof(struct fairness_vars_per_vn);</div><div class='add'>+		__storm_memset_struct(bp, addr, size,</div><div class='add'>+				      (u32 *)&amp;cmng-&gt;vnic.vnic_min_rate[vn]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* This function is called upon link interrupt */</div><div class='ctx'> static void bnx2x_link_attn(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='hunk'>@@ -2535,6 +2435,190 @@ void bnx2x__link_status_update(struct bnx2x *bp)</div><div class='ctx'> 	bnx2x_link_report(bp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bnx2x_afex_func_update(struct bnx2x *bp, u16 vifid,</div><div class='add'>+				  u16 vlan_val, u8 allowed_prio)</div><div class='add'>+{</div><div class='add'>+	struct bnx2x_func_state_params func_params = {0};</div><div class='add'>+	struct bnx2x_func_afex_update_params *f_update_params =</div><div class='add'>+		&amp;func_params.params.afex_update;</div><div class='add'>+</div><div class='add'>+	func_params.f_obj = &amp;bp-&gt;func_obj;</div><div class='add'>+	func_params.cmd = BNX2X_F_CMD_AFEX_UPDATE;</div><div class='add'>+</div><div class='add'>+	/* no need to wait for RAMROD completion, so don't</div><div class='add'>+	 * set RAMROD_COMP_WAIT flag</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	f_update_params-&gt;vif_id = vifid;</div><div class='add'>+	f_update_params-&gt;afex_default_vlan = vlan_val;</div><div class='add'>+	f_update_params-&gt;allowed_priorities = allowed_prio;</div><div class='add'>+</div><div class='add'>+	/* if ramrod can not be sent, response to MCP immediately */</div><div class='add'>+	if (bnx2x_func_state_change(bp, &amp;func_params) &lt; 0)</div><div class='add'>+		bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnx2x_afex_handle_vif_list_cmd(struct bnx2x *bp, u8 cmd_type,</div><div class='add'>+					  u16 vif_index, u8 func_bit_map)</div><div class='add'>+{</div><div class='add'>+	struct bnx2x_func_state_params func_params = {0};</div><div class='add'>+	struct bnx2x_func_afex_viflists_params *update_params =</div><div class='add'>+		&amp;func_params.params.afex_viflists;</div><div class='add'>+	int rc;</div><div class='add'>+	u32 drv_msg_code;</div><div class='add'>+</div><div class='add'>+	/* validate only LIST_SET and LIST_GET are received from switch */</div><div class='add'>+	if ((cmd_type != VIF_LIST_RULE_GET) &amp;&amp; (cmd_type != VIF_LIST_RULE_SET))</div><div class='add'>+		BNX2X_ERR("BUG! afex_handle_vif_list_cmd invalid type 0x%x\n",</div><div class='add'>+			  cmd_type);</div><div class='add'>+</div><div class='add'>+	func_params.f_obj = &amp;bp-&gt;func_obj;</div><div class='add'>+	func_params.cmd = BNX2X_F_CMD_AFEX_VIFLISTS;</div><div class='add'>+</div><div class='add'>+	/* set parameters according to cmd_type */</div><div class='add'>+	update_params-&gt;afex_vif_list_command = cmd_type;</div><div class='add'>+	update_params-&gt;vif_list_index = cpu_to_le16(vif_index);</div><div class='add'>+	update_params-&gt;func_bit_map =</div><div class='add'>+		(cmd_type == VIF_LIST_RULE_GET) ? 0 : func_bit_map;</div><div class='add'>+	update_params-&gt;func_to_clear = 0;</div><div class='add'>+	drv_msg_code =</div><div class='add'>+		(cmd_type == VIF_LIST_RULE_GET) ?</div><div class='add'>+		DRV_MSG_CODE_AFEX_LISTGET_ACK :</div><div class='add'>+		DRV_MSG_CODE_AFEX_LISTSET_ACK;</div><div class='add'>+</div><div class='add'>+	/* if ramrod can not be sent, respond to MCP immediately for</div><div class='add'>+	 * SET and GET requests (other are not triggered from MCP)</div><div class='add'>+	 */</div><div class='add'>+	rc = bnx2x_func_state_change(bp, &amp;func_params);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		bnx2x_fw_command(bp, drv_msg_code, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnx2x_handle_afex_cmd(struct bnx2x *bp, u32 cmd)</div><div class='add'>+{</div><div class='add'>+	struct afex_stats afex_stats;</div><div class='add'>+	u32 func = BP_ABS_FUNC(bp);</div><div class='add'>+	u32 mf_config;</div><div class='add'>+	u16 vlan_val;</div><div class='add'>+	u32 vlan_prio;</div><div class='add'>+	u16 vif_id;</div><div class='add'>+	u8 allowed_prio;</div><div class='add'>+	u8 vlan_mode;</div><div class='add'>+	u32 addr_to_write, vifid, addrs, stats_type, i;</div><div class='add'>+</div><div class='add'>+	if (cmd &amp; DRV_STATUS_AFEX_LISTGET_REQ) {</div><div class='add'>+		vifid = SHMEM2_RD(bp, afex_param1_to_driver[BP_FW_MB_IDX(bp)]);</div><div class='add'>+		DP(BNX2X_MSG_MCP,</div><div class='add'>+		   "afex: got MCP req LISTGET_REQ for vifid 0x%x\n", vifid);</div><div class='add'>+		bnx2x_afex_handle_vif_list_cmd(bp, VIF_LIST_RULE_GET, vifid, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cmd &amp; DRV_STATUS_AFEX_LISTSET_REQ) {</div><div class='add'>+		vifid = SHMEM2_RD(bp, afex_param1_to_driver[BP_FW_MB_IDX(bp)]);</div><div class='add'>+		addrs = SHMEM2_RD(bp, afex_param2_to_driver[BP_FW_MB_IDX(bp)]);</div><div class='add'>+		DP(BNX2X_MSG_MCP,</div><div class='add'>+		   "afex: got MCP req LISTSET_REQ for vifid 0x%x addrs 0x%x\n",</div><div class='add'>+		   vifid, addrs);</div><div class='add'>+		bnx2x_afex_handle_vif_list_cmd(bp, VIF_LIST_RULE_SET, vifid,</div><div class='add'>+					       addrs);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cmd &amp; DRV_STATUS_AFEX_STATSGET_REQ) {</div><div class='add'>+		addr_to_write = SHMEM2_RD(bp,</div><div class='add'>+			afex_scratchpad_addr_to_write[BP_FW_MB_IDX(bp)]);</div><div class='add'>+		stats_type = SHMEM2_RD(bp,</div><div class='add'>+			afex_param1_to_driver[BP_FW_MB_IDX(bp)]);</div><div class='add'>+</div><div class='add'>+		DP(BNX2X_MSG_MCP,</div><div class='add'>+		   "afex: got MCP req STATSGET_REQ, write to addr 0x%x\n",</div><div class='add'>+		   addr_to_write);</div><div class='add'>+</div><div class='add'>+		bnx2x_afex_collect_stats(bp, (void *)&amp;afex_stats, stats_type);</div><div class='add'>+</div><div class='add'>+		/* write response to scratchpad, for MCP */</div><div class='add'>+		for (i = 0; i &lt; (sizeof(struct afex_stats)/sizeof(u32)); i++)</div><div class='add'>+			REG_WR(bp, addr_to_write + i*sizeof(u32),</div><div class='add'>+			       *(((u32 *)(&amp;afex_stats))+i));</div><div class='add'>+</div><div class='add'>+		/* send ack message to MCP */</div><div class='add'>+		bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_STATSGET_ACK, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cmd &amp; DRV_STATUS_AFEX_VIFSET_REQ) {</div><div class='add'>+		mf_config = MF_CFG_RD(bp, func_mf_config[func].config);</div><div class='add'>+		bp-&gt;mf_config[BP_VN(bp)] = mf_config;</div><div class='add'>+		DP(BNX2X_MSG_MCP,</div><div class='add'>+		   "afex: got MCP req VIFSET_REQ, mf_config 0x%x\n",</div><div class='add'>+		   mf_config);</div><div class='add'>+</div><div class='add'>+		/* if VIF_SET is "enabled" */</div><div class='add'>+		if (!(mf_config &amp; FUNC_MF_CFG_FUNC_DISABLED)) {</div><div class='add'>+			/* set rate limit directly to internal RAM */</div><div class='add'>+			struct cmng_init_input cmng_input;</div><div class='add'>+			struct rate_shaping_vars_per_vn m_rs_vn;</div><div class='add'>+			size_t size = sizeof(struct rate_shaping_vars_per_vn);</div><div class='add'>+			u32 addr = BAR_XSTRORM_INTMEM +</div><div class='add'>+			    XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(BP_FUNC(bp));</div><div class='add'>+</div><div class='add'>+			bp-&gt;mf_config[BP_VN(bp)] = mf_config;</div><div class='add'>+</div><div class='add'>+			bnx2x_calc_vn_max(bp, BP_VN(bp), &amp;cmng_input);</div><div class='add'>+			m_rs_vn.vn_counter.rate =</div><div class='add'>+				cmng_input.vnic_max_rate[BP_VN(bp)];</div><div class='add'>+			m_rs_vn.vn_counter.quota =</div><div class='add'>+				(m_rs_vn.vn_counter.rate *</div><div class='add'>+				 RS_PERIODIC_TIMEOUT_USEC) / 8;</div><div class='add'>+</div><div class='add'>+			__storm_memset_struct(bp, addr, size, (u32 *)&amp;m_rs_vn);</div><div class='add'>+</div><div class='add'>+			/* read relevant values from mf_cfg struct in shmem */</div><div class='add'>+			vif_id =</div><div class='add'>+				(MF_CFG_RD(bp, func_mf_config[func].e1hov_tag) &amp;</div><div class='add'>+				 FUNC_MF_CFG_E1HOV_TAG_MASK) &gt;&gt;</div><div class='add'>+				FUNC_MF_CFG_E1HOV_TAG_SHIFT;</div><div class='add'>+			vlan_val =</div><div class='add'>+				(MF_CFG_RD(bp, func_mf_config[func].e1hov_tag) &amp;</div><div class='add'>+				 FUNC_MF_CFG_AFEX_VLAN_MASK) &gt;&gt;</div><div class='add'>+				FUNC_MF_CFG_AFEX_VLAN_SHIFT;</div><div class='add'>+			vlan_prio = (mf_config &amp;</div><div class='add'>+				     FUNC_MF_CFG_TRANSMIT_PRIORITY_MASK) &gt;&gt;</div><div class='add'>+				    FUNC_MF_CFG_TRANSMIT_PRIORITY_SHIFT;</div><div class='add'>+			vlan_val |= (vlan_prio &lt;&lt; VLAN_PRIO_SHIFT);</div><div class='add'>+			vlan_mode =</div><div class='add'>+				(MF_CFG_RD(bp,</div><div class='add'>+					   func_mf_config[func].afex_config) &amp;</div><div class='add'>+				 FUNC_MF_CFG_AFEX_VLAN_MODE_MASK) &gt;&gt;</div><div class='add'>+				FUNC_MF_CFG_AFEX_VLAN_MODE_SHIFT;</div><div class='add'>+			allowed_prio =</div><div class='add'>+				(MF_CFG_RD(bp,</div><div class='add'>+					   func_mf_config[func].afex_config) &amp;</div><div class='add'>+				 FUNC_MF_CFG_AFEX_COS_FILTER_MASK) &gt;&gt;</div><div class='add'>+				FUNC_MF_CFG_AFEX_COS_FILTER_SHIFT;</div><div class='add'>+</div><div class='add'>+			/* send ramrod to FW, return in case of failure */</div><div class='add'>+			if (bnx2x_afex_func_update(bp, vif_id, vlan_val,</div><div class='add'>+						   allowed_prio))</div><div class='add'>+				return;</div><div class='add'>+</div><div class='add'>+			bp-&gt;afex_def_vlan_tag = vlan_val;</div><div class='add'>+			bp-&gt;afex_vlan_mode = vlan_mode;</div><div class='add'>+		} else {</div><div class='add'>+			/* notify link down because BP-&gt;flags is disabled */</div><div class='add'>+			bnx2x_link_report(bp);</div><div class='add'>+</div><div class='add'>+			/* send INVALID VIF ramrod to FW */</div><div class='add'>+			bnx2x_afex_func_update(bp, 0xFFFF, 0, 0);</div><div class='add'>+</div><div class='add'>+			/* Reset the default afex VLAN */</div><div class='add'>+			bp-&gt;afex_def_vlan_tag = -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bnx2x_pmf_update(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int port = BP_PORT(bp);</div><div class='hunk'>@@ -2619,6 +2703,18 @@ u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+static void storm_memset_func_cfg(struct bnx2x *bp,</div><div class='add'>+				 struct tstorm_eth_function_common_config *tcfg,</div><div class='add'>+				 u16 abs_fid)</div><div class='add'>+{</div><div class='add'>+	size_t size = sizeof(struct tstorm_eth_function_common_config);</div><div class='add'>+</div><div class='add'>+	u32 addr = BAR_TSTRORM_INTMEM +</div><div class='add'>+			TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(abs_fid);</div><div class='add'>+</div><div class='add'>+	__storm_memset_struct(bp, addr, size, (u32 *)tcfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p)</div><div class='ctx'> {</div><div class='ctx'> 	if (CHIP_IS_E1x(bp)) {</div><div class='hunk'>@@ -2648,9 +2744,9 @@ void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p)</div><div class='ctx'>  *</div><div class='ctx'>  * Return the flags that are common for the Tx-only and not normal connections.</div><div class='ctx'>  */</div><div class='del'>-static inline unsigned long bnx2x_get_common_flags(struct bnx2x *bp,</div><div class='del'>-						   struct bnx2x_fastpath *fp,</div><div class='del'>-						   bool zero_stats)</div><div class='add'>+static unsigned long bnx2x_get_common_flags(struct bnx2x *bp,</div><div class='add'>+					    struct bnx2x_fastpath *fp,</div><div class='add'>+					    bool zero_stats)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2670,9 +2766,9 @@ static inline unsigned long bnx2x_get_common_flags(struct bnx2x *bp,</div><div class='ctx'> 	return flags;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long bnx2x_get_q_flags(struct bnx2x *bp,</div><div class='del'>-					      struct bnx2x_fastpath *fp,</div><div class='del'>-					      bool leading)</div><div class='add'>+static unsigned long bnx2x_get_q_flags(struct bnx2x *bp,</div><div class='add'>+				       struct bnx2x_fastpath *fp,</div><div class='add'>+				       bool leading)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2680,8 +2776,11 @@ static inline unsigned long bnx2x_get_q_flags(struct bnx2x *bp,</div><div class='ctx'> 	if (IS_MF_SD(bp))</div><div class='ctx'> 		__set_bit(BNX2X_Q_FLG_OV, &amp;flags);</div><div class='ctx'> </div><div class='del'>-	if (IS_FCOE_FP(fp))</div><div class='add'>+	if (IS_FCOE_FP(fp)) {</div><div class='ctx'> 		__set_bit(BNX2X_Q_FLG_FCOE, &amp;flags);</div><div class='add'>+		/* For FCoE - force usage of default priority (for afex) */</div><div class='add'>+		__set_bit(BNX2X_Q_FLG_FORCE_DEFAULT_PRI, &amp;flags);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!fp-&gt;disable_tpa) {</div><div class='ctx'> 		__set_bit(BNX2X_Q_FLG_TPA, &amp;flags);</div><div class='hunk'>@@ -2698,6 +2797,10 @@ static inline unsigned long bnx2x_get_q_flags(struct bnx2x *bp,</div><div class='ctx'> 	/* Always set HW VLAN stripping */</div><div class='ctx'> 	__set_bit(BNX2X_Q_FLG_VLAN, &amp;flags);</div><div class='ctx'> </div><div class='add'>+	/* configure silent vlan removal */</div><div class='add'>+	if (IS_MF_AFEX(bp))</div><div class='add'>+		__set_bit(BNX2X_Q_FLG_SILENT_VLAN_REM, &amp;flags);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	return flags | bnx2x_get_common_flags(bp, fp, true);</div><div class='ctx'> }</div><div class='hunk'>@@ -2800,6 +2903,13 @@ static void bnx2x_pf_rx_q_prep(struct bnx2x *bp,</div><div class='ctx'> 		rxq_init-&gt;sb_cq_index = HC_SP_INDEX_ETH_FCOE_RX_CQ_CONS;</div><div class='ctx'> 	else</div><div class='ctx'> 		rxq_init-&gt;sb_cq_index = HC_INDEX_ETH_RX_CQ_CONS;</div><div class='add'>+	/* configure silent vlan removal</div><div class='add'>+	 * if multi function mode is afex, then mask default vlan</div><div class='add'>+	 */</div><div class='add'>+	if (IS_MF_AFEX(bp)) {</div><div class='add'>+		rxq_init-&gt;silent_removal_value = bp-&gt;afex_def_vlan_tag;</div><div class='add'>+		rxq_init-&gt;silent_removal_mask = VLAN_VID_MASK;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bnx2x_pf_tx_q_prep(struct bnx2x *bp,</div><div class='hunk'>@@ -3051,7 +3161,7 @@ static void bnx2x_drv_info_iscsi_stat(struct bnx2x *bp)</div><div class='ctx'>  *	configure FW</div><div class='ctx'>  *	notify others function about the change</div><div class='ctx'>  */</div><div class='del'>-static inline void bnx2x_config_mf_bw(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_config_mf_bw(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	if (bp-&gt;link_vars.link_up) {</div><div class='ctx'> 		bnx2x_cmng_fns_init(bp, true, CMNG_FNS_MINMAX);</div><div class='hunk'>@@ -3060,7 +3170,7 @@ static inline void bnx2x_config_mf_bw(struct bnx2x *bp)</div><div class='ctx'> 	storm_memset_cmng(bp, &amp;bp-&gt;cmng, BP_PORT(bp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_set_mf_bw(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_set_mf_bw(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	bnx2x_config_mf_bw(bp);</div><div class='ctx'> 	bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW_ACK, 0);</div><div class='hunk'>@@ -3147,7 +3257,7 @@ static void bnx2x_dcc_event(struct bnx2x *bp, u32 dcc_event)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* must be called under the spq lock */</div><div class='del'>-static inline struct eth_spe *bnx2x_sp_get_next(struct bnx2x *bp)</div><div class='add'>+static struct eth_spe *bnx2x_sp_get_next(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct eth_spe *next_spe = bp-&gt;spq_prod_bd;</div><div class='ctx'> </div><div class='hunk'>@@ -3163,7 +3273,7 @@ static inline struct eth_spe *bnx2x_sp_get_next(struct bnx2x *bp)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* must be called under the spq lock */</div><div class='del'>-static inline void bnx2x_sp_prod_update(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_sp_prod_update(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int func = BP_FUNC(bp);</div><div class='ctx'> </div><div class='hunk'>@@ -3185,7 +3295,7 @@ static inline void bnx2x_sp_prod_update(struct bnx2x *bp)</div><div class='ctx'>  * @cmd:	command to check</div><div class='ctx'>  * @cmd_type:	command type</div><div class='ctx'>  */</div><div class='del'>-static inline bool bnx2x_is_contextless_ramrod(int cmd, int cmd_type)</div><div class='add'>+static bool bnx2x_is_contextless_ramrod(int cmd, int cmd_type)</div><div class='ctx'> {</div><div class='ctx'> 	if ((cmd_type == NONE_CONNECTION_TYPE) ||</div><div class='ctx'> 	    (cmd == RAMROD_CMD_ID_ETH_FORWARD_SETUP) ||</div><div class='hunk'>@@ -3319,7 +3429,7 @@ static void bnx2x_release_alr(struct bnx2x *bp)</div><div class='ctx'> #define BNX2X_DEF_SB_ATT_IDX	0x0001</div><div class='ctx'> #define BNX2X_DEF_SB_IDX	0x0002</div><div class='ctx'> </div><div class='del'>-static inline u16 bnx2x_update_dsb_idx(struct bnx2x *bp)</div><div class='add'>+static u16 bnx2x_update_dsb_idx(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct host_sp_status_block *def_sb = bp-&gt;def_status_blk;</div><div class='ctx'> 	u16 rc = 0;</div><div class='hunk'>@@ -3451,7 +3561,7 @@ static void bnx2x_attn_int_asserted(struct bnx2x *bp, u32 asserted)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_fan_failure(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_fan_failure(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int port = BP_PORT(bp);</div><div class='ctx'> 	u32 ext_phy_config;</div><div class='hunk'>@@ -3481,7 +3591,7 @@ static inline void bnx2x_fan_failure(struct bnx2x *bp)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn)</div><div class='add'>+static void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn)</div><div class='ctx'> {</div><div class='ctx'> 	int port = BP_PORT(bp);</div><div class='ctx'> 	int reg_offset;</div><div class='hunk'>@@ -3521,7 +3631,7 @@ static inline void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_attn_int_deasserted1(struct bnx2x *bp, u32 attn)</div><div class='add'>+static void bnx2x_attn_int_deasserted1(struct bnx2x *bp, u32 attn)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -3552,7 +3662,7 @@ static inline void bnx2x_attn_int_deasserted1(struct bnx2x *bp, u32 attn)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_attn_int_deasserted2(struct bnx2x *bp, u32 attn)</div><div class='add'>+static void bnx2x_attn_int_deasserted2(struct bnx2x *bp, u32 attn)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -3596,7 +3706,7 @@ static inline void bnx2x_attn_int_deasserted2(struct bnx2x *bp, u32 attn)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn)</div><div class='add'>+static void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -3606,6 +3716,7 @@ static inline void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn)</div><div class='ctx'> 			int func = BP_FUNC(bp);</div><div class='ctx'> </div><div class='ctx'> 			REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_12 + func*4, 0);</div><div class='add'>+			bnx2x_read_mf_cfg(bp);</div><div class='ctx'> 			bp-&gt;mf_config[BP_VN(bp)] = MF_CFG_RD(bp,</div><div class='ctx'> 					func_mf_config[BP_ABS_FUNC(bp)].config);</div><div class='ctx'> 			val = SHMEM_RD(bp,</div><div class='hunk'>@@ -3628,6 +3739,9 @@ static inline void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn)</div><div class='ctx'> 				/* start dcbx state machine */</div><div class='ctx'> 				bnx2x_dcbx_set_params(bp,</div><div class='ctx'> 					BNX2X_DCBX_STATE_NEG_RECEIVED);</div><div class='add'>+			if (val &amp; DRV_STATUS_AFEX_EVENT_MASK)</div><div class='add'>+				bnx2x_handle_afex_cmd(bp,</div><div class='add'>+					val &amp; DRV_STATUS_AFEX_EVENT_MASK);</div><div class='ctx'> 			if (bp-&gt;link_vars.periodic_flags &amp;</div><div class='ctx'> 			    PERIODIC_FLAGS_LINK_EVENT) {</div><div class='ctx'> 				/*  sync with link */</div><div class='hunk'>@@ -3722,7 +3836,7 @@ void bnx2x_set_reset_global(struct bnx2x *bp)</div><div class='ctx'>  *</div><div class='ctx'>  * Should be run under rtnl lock</div><div class='ctx'>  */</div><div class='del'>-static inline void bnx2x_clear_reset_global(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_clear_reset_global(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG);</div><div class='hunk'>@@ -3736,7 +3850,7 @@ static inline void bnx2x_clear_reset_global(struct bnx2x *bp)</div><div class='ctx'>  *</div><div class='ctx'>  * should be run under rtnl lock</div><div class='ctx'>  */</div><div class='del'>-static inline bool bnx2x_reset_is_global(struct bnx2x *bp)</div><div class='add'>+static bool bnx2x_reset_is_global(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val	= REG_RD(bp, BNX2X_RECOVERY_GLOB_REG);</div><div class='ctx'> </div><div class='hunk'>@@ -3749,7 +3863,7 @@ static inline bool bnx2x_reset_is_global(struct bnx2x *bp)</div><div class='ctx'>  *</div><div class='ctx'>  * Should be run under rtnl lock</div><div class='ctx'>  */</div><div class='del'>-static inline void bnx2x_set_reset_done(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_set_reset_done(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	u32 bit = BP_PATH(bp) ?</div><div class='hunk'>@@ -3874,7 +3988,7 @@ bool bnx2x_clear_pf_load(struct bnx2x *bp)</div><div class='ctx'>  *</div><div class='ctx'>  * should be run under rtnl lock</div><div class='ctx'>  */</div><div class='del'>-static inline bool bnx2x_get_load_status(struct bnx2x *bp, int engine)</div><div class='add'>+static bool bnx2x_get_load_status(struct bnx2x *bp, int engine)</div><div class='ctx'> {</div><div class='ctx'> 	u32 mask = (engine ? BNX2X_PATH1_LOAD_CNT_MASK :</div><div class='ctx'> 			     BNX2X_PATH0_LOAD_CNT_MASK);</div><div class='hunk'>@@ -3895,7 +4009,7 @@ static inline bool bnx2x_get_load_status(struct bnx2x *bp, int engine)</div><div class='ctx'> /*</div><div class='ctx'>  * Reset the load status for the current engine.</div><div class='ctx'>  */</div><div class='del'>-static inline void bnx2x_clear_load_status(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_clear_load_status(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	u32 mask = (BP_PATH(bp) ? BNX2X_PATH1_LOAD_CNT_MASK :</div><div class='hunk'>@@ -3906,13 +4020,13 @@ static inline void bnx2x_clear_load_status(struct bnx2x *bp)</div><div class='ctx'> 	bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RECOVERY_REG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void _print_next_block(int idx, const char *blk)</div><div class='add'>+static void _print_next_block(int idx, const char *blk)</div><div class='ctx'> {</div><div class='ctx'> 	pr_cont("%s%s", idx ? ", " : "", blk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_check_blocks_with_parity0(u32 sig, int par_num,</div><div class='del'>-						  bool print)</div><div class='add'>+static int bnx2x_check_blocks_with_parity0(u32 sig, int par_num,</div><div class='add'>+					   bool print)</div><div class='ctx'> {</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> 	u32 cur_bit = 0;</div><div class='hunk'>@@ -3959,8 +4073,8 @@ static inline int bnx2x_check_blocks_with_parity0(u32 sig, int par_num,</div><div class='ctx'> 	return par_num;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_check_blocks_with_parity1(u32 sig, int par_num,</div><div class='del'>-						  bool *global, bool print)</div><div class='add'>+static int bnx2x_check_blocks_with_parity1(u32 sig, int par_num,</div><div class='add'>+					   bool *global, bool print)</div><div class='ctx'> {</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> 	u32 cur_bit = 0;</div><div class='hunk'>@@ -4045,8 +4159,8 @@ static inline int bnx2x_check_blocks_with_parity1(u32 sig, int par_num,</div><div class='ctx'> 	return par_num;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_check_blocks_with_parity2(u32 sig, int par_num,</div><div class='del'>-						  bool print)</div><div class='add'>+static int bnx2x_check_blocks_with_parity2(u32 sig, int par_num,</div><div class='add'>+					   bool print)</div><div class='ctx'> {</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> 	u32 cur_bit = 0;</div><div class='hunk'>@@ -4097,8 +4211,8 @@ static inline int bnx2x_check_blocks_with_parity2(u32 sig, int par_num,</div><div class='ctx'> 	return par_num;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_check_blocks_with_parity3(u32 sig, int par_num,</div><div class='del'>-						  bool *global, bool print)</div><div class='add'>+static int bnx2x_check_blocks_with_parity3(u32 sig, int par_num,</div><div class='add'>+					   bool *global, bool print)</div><div class='ctx'> {</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> 	u32 cur_bit = 0;</div><div class='hunk'>@@ -4139,8 +4253,8 @@ static inline int bnx2x_check_blocks_with_parity3(u32 sig, int par_num,</div><div class='ctx'> 	return par_num;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_check_blocks_with_parity4(u32 sig, int par_num,</div><div class='del'>-						  bool print)</div><div class='add'>+static int bnx2x_check_blocks_with_parity4(u32 sig, int par_num,</div><div class='add'>+					   bool print)</div><div class='ctx'> {</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> 	u32 cur_bit = 0;</div><div class='hunk'>@@ -4166,8 +4280,8 @@ static inline int bnx2x_check_blocks_with_parity4(u32 sig, int par_num,</div><div class='ctx'> 	return par_num;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool bnx2x_parity_attn(struct bnx2x *bp, bool *global, bool print,</div><div class='del'>-				     u32 *sig)</div><div class='add'>+static bool bnx2x_parity_attn(struct bnx2x *bp, bool *global, bool print,</div><div class='add'>+			      u32 *sig)</div><div class='ctx'> {</div><div class='ctx'> 	if ((sig[0] &amp; HW_PRTY_ASSERT_SET_0) ||</div><div class='ctx'> 	    (sig[1] &amp; HW_PRTY_ASSERT_SET_1) ||</div><div class='hunk'>@@ -4238,7 +4352,7 @@ bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_attn_int_deasserted4(struct bnx2x *bp, u32 attn)</div><div class='add'>+static void bnx2x_attn_int_deasserted4(struct bnx2x *bp, u32 attn)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	if (attn &amp; AEU_INPUTS_ATTN_BITS_PGLUE_HW_INTERRUPT) {</div><div class='hunk'>@@ -4430,7 +4544,7 @@ void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment,</div><div class='ctx'> 			     igu_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_update_eq_prod(struct bnx2x *bp, u16 prod)</div><div class='add'>+static void bnx2x_update_eq_prod(struct bnx2x *bp, u16 prod)</div><div class='ctx'> {</div><div class='ctx'> 	/* No memory barriers */</div><div class='ctx'> 	storm_memset_eq_prod(bp, prod, BP_FUNC(bp));</div><div class='hunk'>@@ -4461,7 +4575,7 @@ static int  bnx2x_cnic_handle_cfc_del(struct bnx2x *bp, u32 cid,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_handle_mcast_eqe(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_handle_mcast_eqe(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x_mcast_ramrod_params rparam;</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -4486,8 +4600,8 @@ static inline void bnx2x_handle_mcast_eqe(struct bnx2x *bp)</div><div class='ctx'> 	netif_addr_unlock_bh(bp-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_handle_classification_eqe(struct bnx2x *bp,</div><div class='del'>-						   union event_ring_elem *elem)</div><div class='add'>+static void bnx2x_handle_classification_eqe(struct bnx2x *bp,</div><div class='add'>+					    union event_ring_elem *elem)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ramrod_flags = 0;</div><div class='ctx'> 	int rc = 0;</div><div class='hunk'>@@ -4534,7 +4648,7 @@ static inline void bnx2x_handle_classification_eqe(struct bnx2x *bp,</div><div class='ctx'> static void bnx2x_set_iscsi_eth_rx_mode(struct bnx2x *bp, bool start);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	netif_addr_lock_bh(bp-&gt;dev);</div><div class='ctx'> </div><div class='hunk'>@@ -4555,7 +4669,94 @@ static inline void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp)</div><div class='ctx'> 	netif_addr_unlock_bh(bp-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct bnx2x_queue_sp_obj *bnx2x_cid_to_q_obj(</div><div class='add'>+static void bnx2x_after_afex_vif_lists(struct bnx2x *bp,</div><div class='add'>+					      union event_ring_elem *elem)</div><div class='add'>+{</div><div class='add'>+	if (elem-&gt;message.data.vif_list_event.echo == VIF_LIST_RULE_GET) {</div><div class='add'>+		DP(BNX2X_MSG_SP,</div><div class='add'>+		   "afex: ramrod completed VIF LIST_GET, addrs 0x%x\n",</div><div class='add'>+		   elem-&gt;message.data.vif_list_event.func_bit_map);</div><div class='add'>+		bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_LISTGET_ACK,</div><div class='add'>+			elem-&gt;message.data.vif_list_event.func_bit_map);</div><div class='add'>+	} else if (elem-&gt;message.data.vif_list_event.echo ==</div><div class='add'>+		   VIF_LIST_RULE_SET) {</div><div class='add'>+		DP(BNX2X_MSG_SP, "afex: ramrod completed VIF LIST_SET\n");</div><div class='add'>+		bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_LISTSET_ACK, 0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* called with rtnl_lock */</div><div class='add'>+static void bnx2x_after_function_update(struct bnx2x *bp)</div><div class='add'>+{</div><div class='add'>+	int q, rc;</div><div class='add'>+	struct bnx2x_fastpath *fp;</div><div class='add'>+	struct bnx2x_queue_state_params queue_params = {NULL};</div><div class='add'>+	struct bnx2x_queue_update_params *q_update_params =</div><div class='add'>+		&amp;queue_params.params.update;</div><div class='add'>+</div><div class='add'>+	/* Send Q update command with afex vlan removal values	for all Qs */</div><div class='add'>+	queue_params.cmd = BNX2X_Q_CMD_UPDATE;</div><div class='add'>+</div><div class='add'>+	/* set silent vlan removal values according to vlan mode */</div><div class='add'>+	__set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,</div><div class='add'>+		  &amp;q_update_params-&gt;update_flags);</div><div class='add'>+	__set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,</div><div class='add'>+		  &amp;q_update_params-&gt;update_flags);</div><div class='add'>+	__set_bit(RAMROD_COMP_WAIT, &amp;queue_params.ramrod_flags);</div><div class='add'>+</div><div class='add'>+	/* in access mode mark mask and value are 0 to strip all vlans */</div><div class='add'>+	if (bp-&gt;afex_vlan_mode == FUNC_MF_CFG_AFEX_VLAN_ACCESS_MODE) {</div><div class='add'>+		q_update_params-&gt;silent_removal_value = 0;</div><div class='add'>+		q_update_params-&gt;silent_removal_mask = 0;</div><div class='add'>+	} else {</div><div class='add'>+		q_update_params-&gt;silent_removal_value =</div><div class='add'>+			(bp-&gt;afex_def_vlan_tag &amp; VLAN_VID_MASK);</div><div class='add'>+		q_update_params-&gt;silent_removal_mask = VLAN_VID_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_eth_queue(bp, q) {</div><div class='add'>+		/* Set the appropriate Queue object */</div><div class='add'>+		fp = &amp;bp-&gt;fp[q];</div><div class='add'>+		queue_params.q_obj = &amp;fp-&gt;q_obj;</div><div class='add'>+</div><div class='add'>+		/* send the ramrod */</div><div class='add'>+		rc = bnx2x_queue_state_change(bp, &amp;queue_params);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			BNX2X_ERR("Failed to config silent vlan rem for Q %d\n",</div><div class='add'>+				  q);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#ifdef BCM_CNIC</div><div class='add'>+	if (!NO_FCOE(bp)) {</div><div class='add'>+		fp = &amp;bp-&gt;fp[FCOE_IDX];</div><div class='add'>+		queue_params.q_obj = &amp;fp-&gt;q_obj;</div><div class='add'>+</div><div class='add'>+		/* clear pending completion bit */</div><div class='add'>+		__clear_bit(RAMROD_COMP_WAIT, &amp;queue_params.ramrod_flags);</div><div class='add'>+</div><div class='add'>+		/* mark latest Q bit */</div><div class='add'>+		smp_mb__before_clear_bit();</div><div class='add'>+		set_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &amp;bp-&gt;sp_state);</div><div class='add'>+		smp_mb__after_clear_bit();</div><div class='add'>+</div><div class='add'>+		/* send Q update ramrod for FCoE Q */</div><div class='add'>+		rc = bnx2x_queue_state_change(bp, &amp;queue_params);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			BNX2X_ERR("Failed to config silent vlan rem for Q %d\n",</div><div class='add'>+				  q);</div><div class='add'>+	} else {</div><div class='add'>+		/* If no FCoE ring - ACK MCP now */</div><div class='add'>+		bnx2x_link_report(bp);</div><div class='add'>+		bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0);</div><div class='add'>+	}</div><div class='add'>+#else</div><div class='add'>+	/* If no FCoE ring - ACK MCP now */</div><div class='add'>+	bnx2x_link_report(bp);</div><div class='add'>+	bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0);</div><div class='add'>+#endif /* BCM_CNIC */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct bnx2x_queue_sp_obj *bnx2x_cid_to_q_obj(</div><div class='ctx'> 	struct bnx2x *bp, u32 cid)</div><div class='ctx'> {</div><div class='ctx'> 	DP(BNX2X_MSG_SP, "retrieving fp from cid %d\n", cid);</div><div class='hunk'>@@ -4653,6 +4854,28 @@ static void bnx2x_eq_int(struct bnx2x *bp)</div><div class='ctx'> 				break;</div><div class='ctx'> 			bnx2x_dcbx_set_params(bp, BNX2X_DCBX_STATE_TX_RELEASED);</div><div class='ctx'> 			goto next_spqe;</div><div class='add'>+		case EVENT_RING_OPCODE_FUNCTION_UPDATE:</div><div class='add'>+			DP(BNX2X_MSG_SP | BNX2X_MSG_MCP,</div><div class='add'>+			   "AFEX: ramrod completed FUNCTION_UPDATE\n");</div><div class='add'>+			f_obj-&gt;complete_cmd(bp, f_obj, BNX2X_F_CMD_AFEX_UPDATE);</div><div class='add'>+</div><div class='add'>+			/* We will perform the Queues update from sp_rtnl task</div><div class='add'>+			 * as all Queue SP operations should run under</div><div class='add'>+			 * rtnl_lock.</div><div class='add'>+			 */</div><div class='add'>+			smp_mb__before_clear_bit();</div><div class='add'>+			set_bit(BNX2X_SP_RTNL_AFEX_F_UPDATE,</div><div class='add'>+				&amp;bp-&gt;sp_rtnl_state);</div><div class='add'>+			smp_mb__after_clear_bit();</div><div class='add'>+</div><div class='add'>+			schedule_delayed_work(&amp;bp-&gt;sp_rtnl_task, 0);</div><div class='add'>+			goto next_spqe;</div><div class='add'>+</div><div class='add'>+		case EVENT_RING_OPCODE_AFEX_VIF_LISTS:</div><div class='add'>+			f_obj-&gt;complete_cmd(bp, f_obj,</div><div class='add'>+					    BNX2X_F_CMD_AFEX_VIFLISTS);</div><div class='add'>+			bnx2x_after_afex_vif_lists(bp, elem);</div><div class='add'>+			goto next_spqe;</div><div class='ctx'> 		case EVENT_RING_OPCODE_FUNCTION_START:</div><div class='ctx'> 			DP(BNX2X_MSG_SP | NETIF_MSG_IFUP,</div><div class='ctx'> 			   "got FUNC_START ramrod\n");</div><div class='hunk'>@@ -4784,6 +5007,13 @@ static void bnx2x_sp_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	bnx2x_ack_sb(bp, bp-&gt;igu_dsb_id, ATTENTION_ID,</div><div class='ctx'> 	     le16_to_cpu(bp-&gt;def_att_idx), IGU_INT_ENABLE, 1);</div><div class='add'>+</div><div class='add'>+	/* afex - poll to check if VIFSET_ACK should be sent to MFW */</div><div class='add'>+	if (test_and_clear_bit(BNX2X_AFEX_PENDING_VIFSET_MCP_ACK,</div><div class='add'>+			       &amp;bp-&gt;sp_state)) {</div><div class='add'>+		bnx2x_link_report(bp);</div><div class='add'>+		bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance)</div><div class='hunk'>@@ -4870,7 +5100,7 @@ static void bnx2x_timer(unsigned long data)</div><div class='ctx'>  * nic init service functions</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_fill(struct bnx2x *bp, u32 addr, int fill, u32 len)</div><div class='add'>+static void bnx2x_fill(struct bnx2x *bp, u32 addr, int fill, u32 len)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i;</div><div class='ctx'> 	if (!(len%4) &amp;&amp; !(addr%4))</div><div class='hunk'>@@ -4883,10 +5113,10 @@ static inline void bnx2x_fill(struct bnx2x *bp, u32 addr, int fill, u32 len)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* helper: writes FP SP data to FW - data_size in dwords */</div><div class='del'>-static inline void bnx2x_wr_fp_sb_data(struct bnx2x *bp,</div><div class='del'>-				       int fw_sb_id,</div><div class='del'>-				       u32 *sb_data_p,</div><div class='del'>-				       u32 data_size)</div><div class='add'>+static void bnx2x_wr_fp_sb_data(struct bnx2x *bp,</div><div class='add'>+				int fw_sb_id,</div><div class='add'>+				u32 *sb_data_p,</div><div class='add'>+				u32 data_size)</div><div class='ctx'> {</div><div class='ctx'> 	int index;</div><div class='ctx'> 	for (index = 0; index &lt; data_size; index++)</div><div class='hunk'>@@ -4896,7 +5126,7 @@ static inline void bnx2x_wr_fp_sb_data(struct bnx2x *bp,</div><div class='ctx'> 			*(sb_data_p + index));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_zero_fp_sb(struct bnx2x *bp, int fw_sb_id)</div><div class='add'>+static void bnx2x_zero_fp_sb(struct bnx2x *bp, int fw_sb_id)</div><div class='ctx'> {</div><div class='ctx'> 	u32 *sb_data_p;</div><div class='ctx'> 	u32 data_size = 0;</div><div class='hunk'>@@ -4929,7 +5159,7 @@ static inline void bnx2x_zero_fp_sb(struct bnx2x *bp, int fw_sb_id)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* helper:  writes SP SB data to FW */</div><div class='del'>-static inline void bnx2x_wr_sp_sb_data(struct bnx2x *bp,</div><div class='add'>+static void bnx2x_wr_sp_sb_data(struct bnx2x *bp,</div><div class='ctx'> 		struct hc_sp_status_block_data *sp_sb_data)</div><div class='ctx'> {</div><div class='ctx'> 	int func = BP_FUNC(bp);</div><div class='hunk'>@@ -4941,7 +5171,7 @@ static inline void bnx2x_wr_sp_sb_data(struct bnx2x *bp,</div><div class='ctx'> 			*((u32 *)sp_sb_data + i));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_zero_sp_sb(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_zero_sp_sb(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int func = BP_FUNC(bp);</div><div class='ctx'> 	struct hc_sp_status_block_data sp_sb_data;</div><div class='hunk'>@@ -4962,8 +5192,7 @@ static inline void bnx2x_zero_sp_sb(struct bnx2x *bp)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static inline</div><div class='del'>-void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm,</div><div class='add'>+static void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm,</div><div class='ctx'> 					   int igu_sb_id, int igu_seg_id)</div><div class='ctx'> {</div><div class='ctx'> 	hc_sm-&gt;igu_sb_id = igu_sb_id;</div><div class='hunk'>@@ -4974,8 +5203,7 @@ void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm,</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* allocates state machine ids. */</div><div class='del'>-static inline</div><div class='del'>-void bnx2x_map_sb_state_machines(struct hc_index_data *index_data)</div><div class='add'>+static void bnx2x_map_sb_state_machines(struct hc_index_data *index_data)</div><div class='ctx'> {</div><div class='ctx'> 	/* zero out state machine indices */</div><div class='ctx'> 	/* rx indices */</div><div class='hunk'>@@ -5383,7 +5611,7 @@ static inline u8 bnx2x_fp_fw_sb_id(struct bnx2x_fastpath *fp)</div><div class='ctx'> 	return fp-&gt;bp-&gt;base_fw_ndsb + fp-&gt;index + CNIC_PRESENT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u8 bnx2x_fp_cl_id(struct bnx2x_fastpath *fp)</div><div class='add'>+static u8 bnx2x_fp_cl_id(struct bnx2x_fastpath *fp)</div><div class='ctx'> {</div><div class='ctx'> 	if (CHIP_IS_E1x(fp-&gt;bp))</div><div class='ctx'> 		return BP_L_ID(fp-&gt;bp) + fp-&gt;index;</div><div class='hunk'>@@ -5444,6 +5672,43 @@ static void bnx2x_init_eth_fp(struct bnx2x *bp, int fp_idx)</div><div class='ctx'> 	bnx2x_update_fpsb_idx(fp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnx2x_init_tx_ring_one(struct bnx2x_fp_txdata *txdata)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt;= NUM_TX_RINGS; i++) {</div><div class='add'>+		struct eth_tx_next_bd *tx_next_bd =</div><div class='add'>+			&amp;txdata-&gt;tx_desc_ring[TX_DESC_CNT * i - 1].next_bd;</div><div class='add'>+</div><div class='add'>+		tx_next_bd-&gt;addr_hi =</div><div class='add'>+			cpu_to_le32(U64_HI(txdata-&gt;tx_desc_mapping +</div><div class='add'>+				    BCM_PAGE_SIZE*(i % NUM_TX_RINGS)));</div><div class='add'>+		tx_next_bd-&gt;addr_lo =</div><div class='add'>+			cpu_to_le32(U64_LO(txdata-&gt;tx_desc_mapping +</div><div class='add'>+				    BCM_PAGE_SIZE*(i % NUM_TX_RINGS)));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	SET_FLAG(txdata-&gt;tx_db.data.header.header, DOORBELL_HDR_DB_TYPE, 1);</div><div class='add'>+	txdata-&gt;tx_db.data.zero_fill1 = 0;</div><div class='add'>+	txdata-&gt;tx_db.data.prod = 0;</div><div class='add'>+</div><div class='add'>+	txdata-&gt;tx_pkt_prod = 0;</div><div class='add'>+	txdata-&gt;tx_pkt_cons = 0;</div><div class='add'>+	txdata-&gt;tx_bd_prod = 0;</div><div class='add'>+	txdata-&gt;tx_bd_cons = 0;</div><div class='add'>+	txdata-&gt;tx_pkt = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnx2x_init_tx_rings(struct bnx2x *bp)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	u8 cos;</div><div class='add'>+</div><div class='add'>+	for_each_tx_queue(bp, i)</div><div class='add'>+		for_each_cos_in_tx_queue(&amp;bp-&gt;fp[i], cos)</div><div class='add'>+			bnx2x_init_tx_ring_one(&amp;bp-&gt;fp[i].txdata[cos]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void bnx2x_nic_init(struct bnx2x *bp, u32 load_code)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -5968,7 +6233,7 @@ void bnx2x_pf_disable(struct bnx2x *bp)</div><div class='ctx'> 	REG_WR(bp, CFC_REG_WEAK_ENABLE_PF, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x__common_init_phy(struct bnx2x *bp)</div><div class='add'>+static void bnx2x__common_init_phy(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	u32 shmem_base[2], shmem2_base[2];</div><div class='ctx'> 	shmem_base[0] =  bp-&gt;common.shmem_base;</div><div class='hunk'>@@ -6255,12 +6520,24 @@ static int bnx2x_init_hw_common(struct bnx2x *bp)</div><div class='ctx'> 	if (!CHIP_IS_E1(bp))</div><div class='ctx'> 		REG_WR(bp, PRS_REG_E1HOV_MODE, bp-&gt;path_has_ovlan);</div><div class='ctx'> </div><div class='del'>-	if (!CHIP_IS_E1x(bp) &amp;&amp; !CHIP_IS_E3B0(bp))</div><div class='del'>-		/* Bit-map indicating which L2 hdrs may appear</div><div class='del'>-		 * after the basic Ethernet header</div><div class='del'>-		 */</div><div class='del'>-		REG_WR(bp, PRS_REG_HDRS_AFTER_BASIC,</div><div class='del'>-		       bp-&gt;path_has_ovlan ? 7 : 6);</div><div class='add'>+	if (!CHIP_IS_E1x(bp) &amp;&amp; !CHIP_IS_E3B0(bp)) {</div><div class='add'>+		if (IS_MF_AFEX(bp)) {</div><div class='add'>+			/* configure that VNTag and VLAN headers must be</div><div class='add'>+			 * received in afex mode</div><div class='add'>+			 */</div><div class='add'>+			REG_WR(bp, PRS_REG_HDRS_AFTER_BASIC, 0xE);</div><div class='add'>+			REG_WR(bp, PRS_REG_MUST_HAVE_HDRS, 0xA);</div><div class='add'>+			REG_WR(bp, PRS_REG_HDRS_AFTER_TAG_0, 0x6);</div><div class='add'>+			REG_WR(bp, PRS_REG_TAG_ETHERTYPE_0, 0x8926);</div><div class='add'>+			REG_WR(bp, PRS_REG_TAG_LEN_0, 0x4);</div><div class='add'>+		} else {</div><div class='add'>+			/* Bit-map indicating which L2 hdrs may appear</div><div class='add'>+			 * after the basic Ethernet header</div><div class='add'>+			 */</div><div class='add'>+			REG_WR(bp, PRS_REG_HDRS_AFTER_BASIC,</div><div class='add'>+			       bp-&gt;path_has_ovlan ? 7 : 6);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	bnx2x_init_block(bp, BLOCK_TSDM, PHASE_COMMON);</div><div class='ctx'> 	bnx2x_init_block(bp, BLOCK_CSDM, PHASE_COMMON);</div><div class='hunk'>@@ -6294,9 +6571,21 @@ static int bnx2x_init_hw_common(struct bnx2x *bp)</div><div class='ctx'> 	bnx2x_init_block(bp, BLOCK_XPB, PHASE_COMMON);</div><div class='ctx'> 	bnx2x_init_block(bp, BLOCK_PBF, PHASE_COMMON);</div><div class='ctx'> </div><div class='del'>-	if (!CHIP_IS_E1x(bp))</div><div class='del'>-		REG_WR(bp, PBF_REG_HDRS_AFTER_BASIC,</div><div class='del'>-		       bp-&gt;path_has_ovlan ? 7 : 6);</div><div class='add'>+	if (!CHIP_IS_E1x(bp)) {</div><div class='add'>+		if (IS_MF_AFEX(bp)) {</div><div class='add'>+			/* configure that VNTag and VLAN headers must be</div><div class='add'>+			 * sent in afex mode</div><div class='add'>+			 */</div><div class='add'>+			REG_WR(bp, PBF_REG_HDRS_AFTER_BASIC, 0xE);</div><div class='add'>+			REG_WR(bp, PBF_REG_MUST_HAVE_HDRS, 0xA);</div><div class='add'>+			REG_WR(bp, PBF_REG_HDRS_AFTER_TAG_0, 0x6);</div><div class='add'>+			REG_WR(bp, PBF_REG_TAG_ETHERTYPE_0, 0x8926);</div><div class='add'>+			REG_WR(bp, PBF_REG_TAG_LEN_0, 0x4);</div><div class='add'>+		} else {</div><div class='add'>+			REG_WR(bp, PBF_REG_HDRS_AFTER_BASIC,</div><div class='add'>+			       bp-&gt;path_has_ovlan ? 7 : 6);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	REG_WR(bp, SRC_REG_SOFT_RST, 1);</div><div class='ctx'> </div><div class='hunk'>@@ -6514,15 +6803,29 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	bnx2x_init_block(bp, BLOCK_PRS, init_phase);</div><div class='del'>-	if (CHIP_IS_E3B0(bp))</div><div class='del'>-		/* Ovlan exists only if we are in multi-function +</div><div class='del'>-		 * switch-dependent mode, in switch-independent there</div><div class='del'>-		 * is no ovlan headers</div><div class='del'>-		 */</div><div class='del'>-		REG_WR(bp, BP_PORT(bp) ?</div><div class='del'>-		       PRS_REG_HDRS_AFTER_BASIC_PORT_1 :</div><div class='del'>-		       PRS_REG_HDRS_AFTER_BASIC_PORT_0,</div><div class='del'>-		       (bp-&gt;path_has_ovlan ? 7 : 6));</div><div class='add'>+	if (CHIP_IS_E3B0(bp)) {</div><div class='add'>+		if (IS_MF_AFEX(bp)) {</div><div class='add'>+			/* configure headers for AFEX mode */</div><div class='add'>+			REG_WR(bp, BP_PORT(bp) ?</div><div class='add'>+			       PRS_REG_HDRS_AFTER_BASIC_PORT_1 :</div><div class='add'>+			       PRS_REG_HDRS_AFTER_BASIC_PORT_0, 0xE);</div><div class='add'>+			REG_WR(bp, BP_PORT(bp) ?</div><div class='add'>+			       PRS_REG_HDRS_AFTER_TAG_0_PORT_1 :</div><div class='add'>+			       PRS_REG_HDRS_AFTER_TAG_0_PORT_0, 0x6);</div><div class='add'>+			REG_WR(bp, BP_PORT(bp) ?</div><div class='add'>+			       PRS_REG_MUST_HAVE_HDRS_PORT_1 :</div><div class='add'>+			       PRS_REG_MUST_HAVE_HDRS_PORT_0, 0xA);</div><div class='add'>+		} else {</div><div class='add'>+			/* Ovlan exists only if we are in multi-function +</div><div class='add'>+			 * switch-dependent mode, in switch-independent there</div><div class='add'>+			 * is no ovlan headers</div><div class='add'>+			 */</div><div class='add'>+			REG_WR(bp, BP_PORT(bp) ?</div><div class='add'>+			       PRS_REG_HDRS_AFTER_BASIC_PORT_1 :</div><div class='add'>+			       PRS_REG_HDRS_AFTER_BASIC_PORT_0,</div><div class='add'>+			       (bp-&gt;path_has_ovlan ? 7 : 6));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	bnx2x_init_block(bp, BLOCK_TSDM, init_phase);</div><div class='ctx'> 	bnx2x_init_block(bp, BLOCK_CSDM, init_phase);</div><div class='hunk'>@@ -6584,10 +6887,15 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)</div><div class='ctx'> 		/* Bit-map indicating which L2 hdrs may appear after the</div><div class='ctx'> 		 * basic Ethernet header</div><div class='ctx'> 		 */</div><div class='del'>-		REG_WR(bp, BP_PORT(bp) ?</div><div class='del'>-			   NIG_REG_P1_HDRS_AFTER_BASIC :</div><div class='del'>-			   NIG_REG_P0_HDRS_AFTER_BASIC,</div><div class='del'>-			   IS_MF_SD(bp) ? 7 : 6);</div><div class='add'>+		if (IS_MF_AFEX(bp))</div><div class='add'>+			REG_WR(bp, BP_PORT(bp) ?</div><div class='add'>+			       NIG_REG_P1_HDRS_AFTER_BASIC :</div><div class='add'>+			       NIG_REG_P0_HDRS_AFTER_BASIC, 0xE);</div><div class='add'>+		else</div><div class='add'>+			REG_WR(bp, BP_PORT(bp) ?</div><div class='add'>+			       NIG_REG_P1_HDRS_AFTER_BASIC :</div><div class='add'>+			       NIG_REG_P0_HDRS_AFTER_BASIC,</div><div class='add'>+			       IS_MF_SD(bp) ? 7 : 6);</div><div class='ctx'> </div><div class='ctx'> 		if (CHIP_IS_E3(bp))</div><div class='ctx'> 			REG_WR(bp, BP_PORT(bp) ?</div><div class='hunk'>@@ -6609,6 +6917,7 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)</div><div class='ctx'> 				val = 1;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case MULTI_FUNCTION_SI:</div><div class='add'>+			case MULTI_FUNCTION_AFEX:</div><div class='ctx'> 				val = 2;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -6640,21 +6949,71 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)</div><div class='ctx'> static void bnx2x_ilt_wr(struct bnx2x *bp, u32 index, dma_addr_t addr)</div><div class='ctx'> {</div><div class='ctx'> 	int reg;</div><div class='add'>+	u32 wb_write[2];</div><div class='ctx'> </div><div class='ctx'> 	if (CHIP_IS_E1(bp))</div><div class='ctx'> 		reg = PXP2_REG_RQ_ONCHIP_AT + index*8;</div><div class='ctx'> 	else</div><div class='ctx'> 		reg = PXP2_REG_RQ_ONCHIP_AT_B0 + index*8;</div><div class='ctx'> </div><div class='del'>-	bnx2x_wb_wr(bp, reg, ONCHIP_ADDR1(addr), ONCHIP_ADDR2(addr));</div><div class='add'>+	wb_write[0] = ONCHIP_ADDR1(addr);</div><div class='add'>+	wb_write[1] = ONCHIP_ADDR2(addr);</div><div class='add'>+	REG_WR_DMAE(bp, reg, wb_write, 2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id)</div><div class='add'>+static void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func,</div><div class='add'>+				   u8 idu_sb_id, bool is_Pf)</div><div class='add'>+{</div><div class='add'>+	u32 data, ctl, cnt = 100;</div><div class='add'>+	u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;</div><div class='add'>+	u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;</div><div class='add'>+	u32 igu_addr_ack = IGU_REG_CSTORM_TYPE_0_SB_CLEANUP + (idu_sb_id/32)*4;</div><div class='add'>+	u32 sb_bit =  1 &lt;&lt; (idu_sb_id%32);</div><div class='add'>+	u32 func_encode = func | (is_Pf ? 1 : 0) &lt;&lt; IGU_FID_ENCODE_IS_PF_SHIFT;</div><div class='add'>+	u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + idu_sb_id;</div><div class='add'>+</div><div class='add'>+	/* Not supported in BC mode */</div><div class='add'>+	if (CHIP_INT_MODE_IS_BC(bp))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	data = (IGU_USE_REGISTER_cstorm_type_0_sb_cleanup</div><div class='add'>+			&lt;&lt; IGU_REGULAR_CLEANUP_TYPE_SHIFT)	|</div><div class='add'>+		IGU_REGULAR_CLEANUP_SET				|</div><div class='add'>+		IGU_REGULAR_BCLEANUP;</div><div class='add'>+</div><div class='add'>+	ctl = addr_encode &lt;&lt; IGU_CTRL_REG_ADDRESS_SHIFT		|</div><div class='add'>+	      func_encode &lt;&lt; IGU_CTRL_REG_FID_SHIFT		|</div><div class='add'>+	      IGU_CTRL_CMD_TYPE_WR &lt;&lt; IGU_CTRL_REG_TYPE_SHIFT;</div><div class='add'>+</div><div class='add'>+	DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",</div><div class='add'>+			 data, igu_addr_data);</div><div class='add'>+	REG_WR(bp, igu_addr_data, data);</div><div class='add'>+	mmiowb();</div><div class='add'>+	barrier();</div><div class='add'>+	DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",</div><div class='add'>+			  ctl, igu_addr_ctl);</div><div class='add'>+	REG_WR(bp, igu_addr_ctl, ctl);</div><div class='add'>+	mmiowb();</div><div class='add'>+	barrier();</div><div class='add'>+</div><div class='add'>+	/* wait for clean up to finish */</div><div class='add'>+	while (!(REG_RD(bp, igu_addr_ack) &amp; sb_bit) &amp;&amp; --cnt)</div><div class='add'>+		msleep(20);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	if (!(REG_RD(bp, igu_addr_ack) &amp; sb_bit)) {</div><div class='add'>+		DP(NETIF_MSG_HW,</div><div class='add'>+		   "Unable to finish IGU cleanup: idu_sb_id %d offset %d bit %d (cnt %d)\n",</div><div class='add'>+			  idu_sb_id, idu_sb_id/32, idu_sb_id%32, cnt);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnx2x_igu_clear_sb(struct bnx2x *bp, u8 idu_sb_id)</div><div class='ctx'> {</div><div class='ctx'> 	bnx2x_igu_clear_sb_gen(bp, BP_FUNC(bp), idu_sb_id, true /*PF*/);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_clear_func_ilt(struct bnx2x *bp, u32 func)</div><div class='add'>+static void bnx2x_clear_func_ilt(struct bnx2x *bp, u32 func)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i, base = FUNC_ILT_BASE(func);</div><div class='ctx'> 	for (i = base; i &lt; base + ILT_PER_FUNC; i++)</div><div class='hunk'>@@ -7005,7 +7364,7 @@ void bnx2x_free_mem(struct bnx2x *bp)</div><div class='ctx'> 		       BCM_PAGE_SIZE * NUM_EQ_PAGES);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_alloc_fw_stats_mem(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_alloc_fw_stats_mem(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int num_groups;</div><div class='ctx'> 	int is_fcoe_stats = NO_FCOE(bp) ? 0 : 1;</div><div class='hunk'>@@ -7192,7 +7551,8 @@ int bnx2x_set_eth_mac(struct bnx2x *bp, bool set)</div><div class='ctx'> 	unsigned long ramrod_flags = 0;</div><div class='ctx'> </div><div class='ctx'> #ifdef BCM_CNIC</div><div class='del'>-	if (is_zero_ether_addr(bp-&gt;dev-&gt;dev_addr) &amp;&amp; IS_MF_STORAGE_SD(bp)) {</div><div class='add'>+	if (is_zero_ether_addr(bp-&gt;dev-&gt;dev_addr) &amp;&amp;</div><div class='add'>+	    (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))) {</div><div class='ctx'> 		DP(NETIF_MSG_IFUP | NETIF_MSG_IFDOWN,</div><div class='ctx'> 		   "Ignoring Zero MAC for STORAGE SD mode\n");</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -7230,7 +7590,7 @@ static void __devinit bnx2x_set_int_mode(struct bnx2x *bp)</div><div class='ctx'> 		BNX2X_DEV_INFO("set number of queues to 1\n");</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		/* Set number of queues according to bp-&gt;multi_mode value */</div><div class='add'>+		/* Set number of queues for MSI-X mode */</div><div class='ctx'> 		bnx2x_set_num_queues(bp);</div><div class='ctx'> </div><div class='ctx'> 		BNX2X_DEV_INFO("set number of queues to %d\n", bp-&gt;num_queues);</div><div class='hunk'>@@ -7239,15 +7599,17 @@ static void __devinit bnx2x_set_int_mode(struct bnx2x *bp)</div><div class='ctx'> 		 * so try to enable MSI-X with the requested number of fp's</div><div class='ctx'> 		 * and fallback to MSI or legacy INTx with one fp</div><div class='ctx'> 		 */</div><div class='del'>-		if (bnx2x_enable_msix(bp)) {</div><div class='del'>-			/* failed to enable MSI-X */</div><div class='del'>-			BNX2X_DEV_INFO("Failed to enable MSI-X (%d), set number of queues to %d\n",</div><div class='add'>+		if (bnx2x_enable_msix(bp) ||</div><div class='add'>+		    bp-&gt;flags &amp; USING_SINGLE_MSIX_FLAG) {</div><div class='add'>+			/* failed to enable multiple MSI-X */</div><div class='add'>+			BNX2X_DEV_INFO("Failed to enable multiple MSI-X (%d), set number of queues to %d\n",</div><div class='ctx'> 				       bp-&gt;num_queues, 1 + NON_ETH_CONTEXT_USE);</div><div class='ctx'> </div><div class='ctx'> 			bp-&gt;num_queues = 1 + NON_ETH_CONTEXT_USE;</div><div class='ctx'> </div><div class='ctx'> 			/* Try to enable MSI */</div><div class='del'>-			if (!(bp-&gt;flags &amp; DISABLE_MSI_FLAG))</div><div class='add'>+			if (!(bp-&gt;flags &amp; USING_SINGLE_MSIX_FLAG) &amp;&amp;</div><div class='add'>+			    !(bp-&gt;flags &amp; DISABLE_MSI_FLAG))</div><div class='ctx'> 				bnx2x_enable_msi(bp);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -7368,7 +7730,7 @@ void bnx2x_ilt_set_info(struct bnx2x *bp)</div><div class='ctx'>  *      - HC configuration</div><div class='ctx'>  *      - Queue's CDU context</div><div class='ctx'>  */</div><div class='del'>-static inline void bnx2x_pf_q_prep_init(struct bnx2x *bp,</div><div class='add'>+static void bnx2x_pf_q_prep_init(struct bnx2x *bp,</div><div class='ctx'> 	struct bnx2x_fastpath *fp, struct bnx2x_queue_init_params *init_params)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='hunk'>@@ -7718,7 +8080,7 @@ static void bnx2x_reset_port(struct bnx2x *bp)</div><div class='ctx'> 	/* TODO: Close Doorbell port? */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_reset_hw(struct bnx2x *bp, u32 load_code)</div><div class='add'>+static int bnx2x_reset_hw(struct bnx2x *bp, u32 load_code)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x_func_state_params func_params = {NULL};</div><div class='ctx'> </div><div class='hunk'>@@ -7733,7 +8095,7 @@ static inline int bnx2x_reset_hw(struct bnx2x *bp, u32 load_code)</div><div class='ctx'> 	return bnx2x_func_state_change(bp, &amp;func_params);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_func_stop(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_func_stop(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x_func_state_params func_params = {NULL};</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -7848,7 +8210,7 @@ void bnx2x_send_unload_done(struct bnx2x *bp)</div><div class='ctx'> 		bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_func_wait_started(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_func_wait_started(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int tout = 50;</div><div class='ctx'> 	int msix = (bp-&gt;flags &amp; USING_MSIX_FLAG) ? 1 : 0;</div><div class='hunk'>@@ -8158,7 +8520,7 @@ static void bnx2x_reset_mcp_prep(struct bnx2x *bp, u32 *magic_val)</div><div class='ctx'>  *</div><div class='ctx'>  * @bp:	driver handle</div><div class='ctx'>  */</div><div class='del'>-static inline void bnx2x_mcp_wait_one(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_mcp_wait_one(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	/* special handling for emulation and FPGA,</div><div class='ctx'> 	   wait 10 times longer */</div><div class='hunk'>@@ -8494,7 +8856,7 @@ exit_leader_reset:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_recovery_failed(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_recovery_failed(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	netdev_err(bp-&gt;dev, "Recovery has failed. Power cycle is needed.\n");</div><div class='ctx'> </div><div class='hunk'>@@ -8727,7 +9089,8 @@ sp_rtnl_not_reset:</div><div class='ctx'> #endif</div><div class='ctx'> 	if (test_and_clear_bit(BNX2X_SP_RTNL_SETUP_TC, &amp;bp-&gt;sp_rtnl_state))</div><div class='ctx'> 		bnx2x_setup_tc(bp-&gt;dev, bp-&gt;dcbx_port_params.ets.num_of_cos);</div><div class='del'>-</div><div class='add'>+	if (test_and_clear_bit(BNX2X_SP_RTNL_AFEX_F_UPDATE, &amp;bp-&gt;sp_rtnl_state))</div><div class='add'>+		bnx2x_after_function_update(bp);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * in case of fan failure we need to reset id if the "stop on error"</div><div class='ctx'> 	 * debug flag is set, since we trying to prevent permanent overheating</div><div class='hunk'>@@ -9122,13 +9485,34 @@ static int __devinit bnx2x_prev_unload_common(struct bnx2x *bp)</div><div class='ctx'> 	return bnx2x_prev_mcp_done(bp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* previous driver DMAE transaction may have occurred when pre-boot stage ended</div><div class='add'>+ * and boot began, or when kdump kernel was loaded. Either case would invalidate</div><div class='add'>+ * the addresses of the transaction, resulting in was-error bit set in the pci</div><div class='add'>+ * causing all hw-to-host pcie transactions to timeout. If this happened we want</div><div class='add'>+ * to clear the interrupt which detected this from the pglueb and the was done</div><div class='add'>+ * bit</div><div class='add'>+ */</div><div class='add'>+static void __devinit bnx2x_prev_interrupted_dmae(struct bnx2x *bp)</div><div class='add'>+{</div><div class='add'>+	u32 val = REG_RD(bp, PGLUE_B_REG_PGLUE_B_INT_STS);</div><div class='add'>+	if (val &amp; PGLUE_B_PGLUE_B_INT_STS_REG_WAS_ERROR_ATTN) {</div><div class='add'>+		BNX2X_ERR("was error bit was found to be set in pglueb upon startup. Clearing");</div><div class='add'>+		REG_WR(bp, PGLUE_B_REG_WAS_ERROR_PF_7_0_CLR, 1 &lt;&lt; BP_FUNC(bp));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __devinit bnx2x_prev_unload(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int time_counter = 10;</div><div class='ctx'> 	u32 rc, fw, hw_lock_reg, hw_lock_val;</div><div class='ctx'> 	BNX2X_DEV_INFO("Entering Previous Unload Flow\n");</div><div class='ctx'> </div><div class='del'>-       /* Release previously held locks */</div><div class='add'>+	/* clear hw from errors which may have resulted from an interrupted</div><div class='add'>+	 * dmae transaction.</div><div class='add'>+	 */</div><div class='add'>+	bnx2x_prev_interrupted_dmae(bp);</div><div class='add'>+</div><div class='add'>+	/* Release previously held locks */</div><div class='ctx'> 	hw_lock_reg = (BP_FUNC(bp) &lt;= 5) ?</div><div class='ctx'> 		      (MISC_REG_DRIVER_CONTROL_1 + BP_FUNC(bp) * 8) :</div><div class='ctx'> 		      (MISC_REG_DRIVER_CONTROL_7 + (BP_FUNC(bp) - 6) * 8);</div><div class='hunk'>@@ -9201,6 +9585,17 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp)</div><div class='ctx'> 	id |= (val &amp; 0xf);</div><div class='ctx'> 	bp-&gt;common.chip_id = id;</div><div class='ctx'> </div><div class='add'>+	/* force 57811 according to MISC register */</div><div class='add'>+	if (REG_RD(bp, MISC_REG_CHIP_TYPE) &amp; MISC_REG_CHIP_TYPE_57811_MASK) {</div><div class='add'>+		if (CHIP_IS_57810(bp))</div><div class='add'>+			bp-&gt;common.chip_id = (CHIP_NUM_57811 &lt;&lt; 16) |</div><div class='add'>+				(bp-&gt;common.chip_id &amp; 0x0000FFFF);</div><div class='add'>+		else if (CHIP_IS_57810_MF(bp))</div><div class='add'>+			bp-&gt;common.chip_id = (CHIP_NUM_57811_MF &lt;&lt; 16) |</div><div class='add'>+				(bp-&gt;common.chip_id &amp; 0x0000FFFF);</div><div class='add'>+		bp-&gt;common.chip_id |= 0x1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Set doorbell size */</div><div class='ctx'> 	bp-&gt;db_size = (1 &lt;&lt; BNX2X_DB_SHIFT);</div><div class='ctx'> </div><div class='hunk'>@@ -9293,7 +9688,9 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp)</div><div class='ctx'> 	bp-&gt;link_params.feature_config_flags |=</div><div class='ctx'> 		(val &gt;= REQ_BC_VER_4_VRFY_SPECIFIC_PHY_OPT_MDL) ?</div><div class='ctx'> 		FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY : 0;</div><div class='del'>-</div><div class='add'>+	bp-&gt;link_params.feature_config_flags |=</div><div class='add'>+		(val &gt;= REQ_BC_VER_4_VRFY_AFEX_SUPPORTED) ?</div><div class='add'>+		FEATURE_CONFIG_BC_SUPPORTS_AFEX : 0;</div><div class='ctx'> 	bp-&gt;link_params.feature_config_flags |=</div><div class='ctx'> 		(val &gt;= REQ_BC_VER_4_SFP_TX_DISABLE_SUPPORTED) ?</div><div class='ctx'> 		FEATURE_CONFIG_BC_SUPPORTS_SFP_TX_DISABLED : 0;</div><div class='hunk'>@@ -9925,6 +10322,9 @@ static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp)</div><div class='ctx'> </div><div class='ctx'> 			} else</div><div class='ctx'> 				bp-&gt;flags |= NO_FCOE_FLAG;</div><div class='add'>+</div><div class='add'>+			bp-&gt;mf_ext_config = cfg;</div><div class='add'>+</div><div class='ctx'> 		} else { /* SD MODE */</div><div class='ctx'> 			if (IS_MF_STORAGE_SD(bp)) {</div><div class='ctx'> 				if (BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp)) {</div><div class='hunk'>@@ -9946,6 +10346,11 @@ static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp)</div><div class='ctx'> 				memset(bp-&gt;dev-&gt;dev_addr, 0, ETH_ALEN);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		if (IS_MF_FCOE_AFEX(bp))</div><div class='add'>+			/* use FIP MAC as primary MAC */</div><div class='add'>+			memcpy(bp-&gt;dev-&gt;dev_addr, fip_mac, ETH_ALEN);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* in SF read MACs from port configuration */</div><div class='hunk'>@@ -10118,6 +10523,19 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp)</div><div class='ctx'> 				} else</div><div class='ctx'> 					BNX2X_DEV_INFO("illegal MAC address for SI\n");</div><div class='ctx'> 				break;</div><div class='add'>+			case SHARED_FEAT_CFG_FORCE_SF_MODE_AFEX_MODE:</div><div class='add'>+				if ((!CHIP_IS_E1x(bp)) &amp;&amp;</div><div class='add'>+				    (MF_CFG_RD(bp, func_mf_config[func].</div><div class='add'>+					       mac_upper) != 0xffff) &amp;&amp;</div><div class='add'>+				    (SHMEM2_HAS(bp,</div><div class='add'>+						afex_driver_support))) {</div><div class='add'>+					bp-&gt;mf_mode = MULTI_FUNCTION_AFEX;</div><div class='add'>+					bp-&gt;mf_config[vn] = MF_CFG_RD(bp,</div><div class='add'>+						func_mf_config[func].config);</div><div class='add'>+				} else {</div><div class='add'>+					BNX2X_DEV_INFO("can not configure afex mode\n");</div><div class='add'>+				}</div><div class='add'>+				break;</div><div class='ctx'> 			case SHARED_FEAT_CFG_FORCE_SF_MODE_MF_ALLOWED:</div><div class='ctx'> 				/* get OV configuration */</div><div class='ctx'> 				val = MF_CFG_RD(bp,</div><div class='hunk'>@@ -10158,6 +10576,9 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp)</div><div class='ctx'> 				return -EPERM;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='add'>+		case MULTI_FUNCTION_AFEX:</div><div class='add'>+			BNX2X_DEV_INFO("func %d is in MF afex mode\n", func);</div><div class='add'>+			break;</div><div class='ctx'> 		case MULTI_FUNCTION_SI:</div><div class='ctx'> 			BNX2X_DEV_INFO("func %d is in MF switch-independent mode\n",</div><div class='ctx'> 				       func);</div><div class='hunk'>@@ -10325,6 +10746,9 @@ static void __devinit bnx2x_set_modes_bitmap(struct bnx2x *bp)</div><div class='ctx'> 		case MULTI_FUNCTION_SI:</div><div class='ctx'> 			SET_FLAGS(flags, MODE_MF_SI);</div><div class='ctx'> 			break;</div><div class='add'>+		case MULTI_FUNCTION_AFEX:</div><div class='add'>+			SET_FLAGS(flags, MODE_MF_AFEX);</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else</div><div class='ctx'> 		SET_FLAGS(flags, MODE_SF);</div><div class='hunk'>@@ -10384,12 +10808,10 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)</div><div class='ctx'> 	if (BP_NOMCP(bp) &amp;&amp; (func == 0))</div><div class='ctx'> 		dev_err(&amp;bp-&gt;pdev-&gt;dev, "MCP disabled, must load devices in order!\n");</div><div class='ctx'> </div><div class='del'>-	bp-&gt;multi_mode = multi_mode;</div><div class='del'>-</div><div class='ctx'> 	bp-&gt;disable_tpa = disable_tpa;</div><div class='ctx'> </div><div class='ctx'> #ifdef BCM_CNIC</div><div class='del'>-	bp-&gt;disable_tpa |= IS_MF_STORAGE_SD(bp);</div><div class='add'>+	bp-&gt;disable_tpa |= IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* Set TPA flags */</div><div class='hunk'>@@ -10408,7 +10830,7 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)</div><div class='ctx'> </div><div class='ctx'> 	bp-&gt;mrrs = mrrs;</div><div class='ctx'> </div><div class='del'>-	bp-&gt;tx_ring_size = MAX_TX_AVAIL;</div><div class='add'>+	bp-&gt;tx_ring_size = IS_MF_FCOE_AFEX(bp) ? 0 : MAX_TX_AVAIL;</div><div class='ctx'> </div><div class='ctx'> 	/* make sure that the numbers are in the right granularity */</div><div class='ctx'> 	bp-&gt;tx_ticks = (50 / BNX2X_BTR) * BNX2X_BTR;</div><div class='hunk'>@@ -10439,8 +10861,6 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)</div><div class='ctx'> 	if (CHIP_IS_E3B0(bp))</div><div class='ctx'> 		bp-&gt;max_cos = BNX2X_MULTI_TX_COS_E3B0;</div><div class='ctx'> </div><div class='del'>-	bp-&gt;gro_check = bnx2x_need_gro_check(bp-&gt;dev-&gt;mtu);</div><div class='del'>-</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -10530,8 +10950,8 @@ static int bnx2x_close(struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_init_mcast_macs_list(struct bnx2x *bp,</div><div class='del'>-					 struct bnx2x_mcast_ramrod_params *p)</div><div class='add'>+static int bnx2x_init_mcast_macs_list(struct bnx2x *bp,</div><div class='add'>+				      struct bnx2x_mcast_ramrod_params *p)</div><div class='ctx'> {</div><div class='ctx'> 	int mc_count = netdev_mc_count(bp-&gt;dev);</div><div class='ctx'> 	struct bnx2x_mcast_list_elem *mc_mac =</div><div class='hunk'>@@ -10554,7 +10974,7 @@ static inline int bnx2x_init_mcast_macs_list(struct bnx2x *bp,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_free_mcast_macs_list(</div><div class='add'>+static void bnx2x_free_mcast_macs_list(</div><div class='ctx'> 	struct bnx2x_mcast_ramrod_params *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x_mcast_list_elem *mc_mac =</div><div class='hunk'>@@ -10572,7 +10992,7 @@ static inline void bnx2x_free_mcast_macs_list(</div><div class='ctx'>  *</div><div class='ctx'>  * We will use zero (0) as a MAC type for these MACs.</div><div class='ctx'>  */</div><div class='del'>-static inline int bnx2x_set_uc_list(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_set_uc_list(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	struct net_device *dev = bp-&gt;dev;</div><div class='hunk'>@@ -10603,7 +11023,7 @@ static inline int bnx2x_set_uc_list(struct bnx2x *bp)</div><div class='ctx'> 				 BNX2X_UC_LIST_MAC, &amp;ramrod_flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_set_mc_list(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_set_mc_list(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = bp-&gt;dev;</div><div class='ctx'> 	struct bnx2x_mcast_ramrod_params rparam = {NULL};</div><div class='hunk'>@@ -10789,7 +11209,7 @@ static const struct net_device_ops bnx2x_netdev_ops = {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline int bnx2x_set_coherency_mask(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_set_coherency_mask(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;bp-&gt;pdev-&gt;dev;</div><div class='ctx'> </div><div class='hunk'>@@ -11055,7 +11475,7 @@ static int bnx2x_check_firmware(struct bnx2x *bp)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void be32_to_cpu_n(const u8 *_source, u8 *_target, u32 n)</div><div class='add'>+static void be32_to_cpu_n(const u8 *_source, u8 *_target, u32 n)</div><div class='ctx'> {</div><div class='ctx'> 	const __be32 *source = (const __be32 *)_source;</div><div class='ctx'> 	u32 *target = (u32 *)_target;</div><div class='hunk'>@@ -11069,7 +11489,7 @@ static inline void be32_to_cpu_n(const u8 *_source, u8 *_target, u32 n)</div><div class='ctx'>    Ops array is stored in the following format:</div><div class='ctx'>    {op(8bit), offset(24bit, big endian), data(32bit, big endian)}</div><div class='ctx'>  */</div><div class='del'>-static inline void bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n)</div><div class='add'>+static void bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n)</div><div class='ctx'> {</div><div class='ctx'> 	const __be32 *source = (const __be32 *)_source;</div><div class='ctx'> 	struct raw_op *target = (struct raw_op *)_target;</div><div class='hunk'>@@ -11087,7 +11507,7 @@ static inline void bnx2x_prep_ops(const u8 *_source, u8 *_target, u32 n)</div><div class='ctx'>  * IRO array is stored in the following format:</div><div class='ctx'>  * {base(24bit), m1(16bit), m2(16bit), m3(16bit), size(16bit) }</div><div class='ctx'>  */</div><div class='del'>-static inline void bnx2x_prep_iro(const u8 *_source, u8 *_target, u32 n)</div><div class='add'>+static void bnx2x_prep_iro(const u8 *_source, u8 *_target, u32 n)</div><div class='ctx'> {</div><div class='ctx'> 	const __be32 *source = (const __be32 *)_source;</div><div class='ctx'> 	struct iro *target = (struct iro *)_target;</div><div class='hunk'>@@ -11107,7 +11527,7 @@ static inline void bnx2x_prep_iro(const u8 *_source, u8 *_target, u32 n)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void be16_to_cpu_n(const u8 *_source, u8 *_target, u32 n)</div><div class='add'>+static void be16_to_cpu_n(const u8 *_source, u8 *_target, u32 n)</div><div class='ctx'> {</div><div class='ctx'> 	const __be16 *source = (const __be16 *)_source;</div><div class='ctx'> 	u16 *target = (u16 *)_target;</div><div class='hunk'>@@ -11244,11 +11664,13 @@ void bnx2x__init_func_obj(struct bnx2x *bp)</div><div class='ctx'> 	bnx2x_init_func_obj(bp, &amp;bp-&gt;func_obj,</div><div class='ctx'> 			    bnx2x_sp(bp, func_rdata),</div><div class='ctx'> 			    bnx2x_sp_mapping(bp, func_rdata),</div><div class='add'>+			    bnx2x_sp(bp, func_afex_rdata),</div><div class='add'>+			    bnx2x_sp_mapping(bp, func_afex_rdata),</div><div class='ctx'> 			    &amp;bnx2x_func_sp_drv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* must be called after sriov-enable */</div><div class='del'>-static inline int bnx2x_set_qm_cid_count(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_set_qm_cid_count(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int cid_count = BNX2X_L2_CID_COUNT(bp);</div><div class='ctx'> </div><div class='hunk'>@@ -11264,7 +11686,7 @@ static inline int bnx2x_set_qm_cid_count(struct bnx2x *bp)</div><div class='ctx'>  * @dev:	pci device</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-static inline int bnx2x_get_num_non_def_sbs(struct pci_dev *pdev)</div><div class='add'>+static int bnx2x_get_num_non_def_sbs(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	int pos;</div><div class='ctx'> 	u16 control;</div><div class='hunk'>@@ -11325,6 +11747,8 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	case BCM57810_MF:</div><div class='ctx'> 	case BCM57840:</div><div class='ctx'> 	case BCM57840_MF:</div><div class='add'>+	case BCM57811:</div><div class='add'>+	case BCM57811_MF:</div><div class='ctx'> 		max_cos_est = BNX2X_MULTI_TX_COS_E3B0;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -11738,7 +12162,7 @@ module_exit(bnx2x_cleanup);</div><div class='ctx'>  * This function will wait until the ramdord completion returns.</div><div class='ctx'>  * Return 0 if success, -ENODEV if ramrod doesn't return.</div><div class='ctx'>  */</div><div class='del'>-static inline int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp)</div><div class='add'>+static int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ramrod_flags = 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h<br/>index c25803b9c0ca..bbd387492a80 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h</a></div><div class='hunk'>@@ -1483,6 +1483,11 @@</div><div class='ctx'>    starts at 0x0 for the A0 tape-out and increments by one for each</div><div class='ctx'>    all-layer tape-out. */</div><div class='ctx'> #define MISC_REG_CHIP_REV					 0xa40c</div><div class='add'>+/* [R 14] otp_misc_do[100:0] spare bits collection: 13:11-</div><div class='add'>+ * otp_misc_do[100:98]; 10:7 - otp_misc_do[87:84]; 6:3 - otp_misc_do[75:72];</div><div class='add'>+ * 2:1 - otp_misc_do[51:50]; 0 - otp_misc_do[1]. */</div><div class='add'>+#define MISC_REG_CHIP_TYPE					 0xac60</div><div class='add'>+#define MISC_REG_CHIP_TYPE_57811_MASK				 (1&lt;&lt;1)</div><div class='ctx'> /* [RW 32] The following driver registers(1...16) represent 16 drivers and</div><div class='ctx'>    32 clients. Each client can be controlled by one driver only. One in each</div><div class='ctx'>    bit represent that this driver control the appropriate client (Ex: bit 5</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c<br/>index 513573321625..6c14b4a4e82c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c</a></div><div class='hunk'>@@ -633,14 +633,17 @@ static inline u8 bnx2x_vlan_mac_get_rx_tx_flag(struct bnx2x_vlan_mac_obj *o)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static inline void bnx2x_set_mac_in_nig(struct bnx2x *bp,</div><div class='del'>-				 bool add, unsigned char *dev_addr, int index)</div><div class='add'>+void bnx2x_set_mac_in_nig(struct bnx2x *bp,</div><div class='add'>+			  bool add, unsigned char *dev_addr, int index)</div><div class='ctx'> {</div><div class='ctx'> 	u32 wb_data[2];</div><div class='ctx'> 	u32 reg_offset = BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM :</div><div class='ctx'> 			 NIG_REG_LLH0_FUNC_MEM;</div><div class='ctx'> </div><div class='del'>-	if (!IS_MF_SI(bp) || index &gt; BNX2X_LLH_CAM_MAX_PF_LINE)</div><div class='add'>+	if (!IS_MF_SI(bp) &amp;&amp; !IS_MF_AFEX(bp))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (index &gt; BNX2X_LLH_CAM_MAX_PF_LINE)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	DP(BNX2X_MSG_SP, "Going to %s LLH configuration at entry %d\n",</div><div class='hunk'>@@ -4090,12 +4093,6 @@ static int bnx2x_setup_rss(struct bnx2x *bp,</div><div class='ctx'> 		rss_mode = ETH_RSS_MODE_DISABLED;</div><div class='ctx'> 	else if (test_bit(BNX2X_RSS_MODE_REGULAR, &amp;p-&gt;rss_flags))</div><div class='ctx'> 		rss_mode = ETH_RSS_MODE_REGULAR;</div><div class='del'>-	else if (test_bit(BNX2X_RSS_MODE_VLAN_PRI, &amp;p-&gt;rss_flags))</div><div class='del'>-		rss_mode = ETH_RSS_MODE_VLAN_PRI;</div><div class='del'>-	else if (test_bit(BNX2X_RSS_MODE_E1HOV_PRI, &amp;p-&gt;rss_flags))</div><div class='del'>-		rss_mode = ETH_RSS_MODE_E1HOV_PRI;</div><div class='del'>-	else if (test_bit(BNX2X_RSS_MODE_IP_DSCP, &amp;p-&gt;rss_flags))</div><div class='del'>-		rss_mode = ETH_RSS_MODE_IP_DSCP;</div><div class='ctx'> </div><div class='ctx'> 	data-&gt;rss_mode = rss_mode;</div><div class='ctx'> </div><div class='hunk'>@@ -4404,6 +4401,9 @@ static void bnx2x_q_fill_init_tx_data(struct bnx2x_queue_sp_obj *o,</div><div class='ctx'> 		test_bit(BNX2X_Q_FLG_TX_SWITCH, flags);</div><div class='ctx'> 	tx_data-&gt;anti_spoofing_flg =</div><div class='ctx'> 		test_bit(BNX2X_Q_FLG_ANTI_SPOOF, flags);</div><div class='add'>+	tx_data-&gt;force_default_pri_flg =</div><div class='add'>+		test_bit(BNX2X_Q_FLG_FORCE_DEFAULT_PRI, flags);</div><div class='add'>+</div><div class='ctx'> 	tx_data-&gt;tx_status_block_id = params-&gt;fw_sb_id;</div><div class='ctx'> 	tx_data-&gt;tx_sb_index_number = params-&gt;sb_cq_index;</div><div class='ctx'> 	tx_data-&gt;tss_leading_client_id = params-&gt;tss_leading_cl_id;</div><div class='hunk'>@@ -5331,6 +5331,17 @@ static int bnx2x_func_chk_transition(struct bnx2x *bp,</div><div class='ctx'> 	case BNX2X_F_STATE_STARTED:</div><div class='ctx'> 		if (cmd == BNX2X_F_CMD_STOP)</div><div class='ctx'> 			next_state = BNX2X_F_STATE_INITIALIZED;</div><div class='add'>+		/* afex ramrods can be sent only in started mode, and only</div><div class='add'>+		 * if not pending for function_stop ramrod completion</div><div class='add'>+		 * for these events - next state remained STARTED.</div><div class='add'>+		 */</div><div class='add'>+		else if ((cmd == BNX2X_F_CMD_AFEX_UPDATE) &amp;&amp;</div><div class='add'>+			 (!test_bit(BNX2X_F_CMD_STOP, &amp;o-&gt;pending)))</div><div class='add'>+			next_state = BNX2X_F_STATE_STARTED;</div><div class='add'>+</div><div class='add'>+		else if ((cmd == BNX2X_F_CMD_AFEX_VIFLISTS) &amp;&amp;</div><div class='add'>+			 (!test_bit(BNX2X_F_CMD_STOP, &amp;o-&gt;pending)))</div><div class='add'>+			next_state = BNX2X_F_STATE_STARTED;</div><div class='ctx'> 		else if (cmd == BNX2X_F_CMD_TX_STOP)</div><div class='ctx'> 			next_state = BNX2X_F_STATE_TX_STOPPED;</div><div class='ctx'> </div><div class='hunk'>@@ -5618,6 +5629,83 @@ static inline int bnx2x_func_send_start(struct bnx2x *bp,</div><div class='ctx'> 			     U64_LO(data_mapping), NONE_CONNECTION_TYPE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int bnx2x_func_send_afex_update(struct bnx2x *bp,</div><div class='add'>+					 struct bnx2x_func_state_params *params)</div><div class='add'>+{</div><div class='add'>+	struct bnx2x_func_sp_obj *o = params-&gt;f_obj;</div><div class='add'>+	struct function_update_data *rdata =</div><div class='add'>+		(struct function_update_data *)o-&gt;afex_rdata;</div><div class='add'>+	dma_addr_t data_mapping = o-&gt;afex_rdata_mapping;</div><div class='add'>+	struct bnx2x_func_afex_update_params *afex_update_params =</div><div class='add'>+		&amp;params-&gt;params.afex_update;</div><div class='add'>+</div><div class='add'>+	memset(rdata, 0, sizeof(*rdata));</div><div class='add'>+</div><div class='add'>+	/* Fill the ramrod data with provided parameters */</div><div class='add'>+	rdata-&gt;vif_id_change_flg = 1;</div><div class='add'>+	rdata-&gt;vif_id = cpu_to_le16(afex_update_params-&gt;vif_id);</div><div class='add'>+	rdata-&gt;afex_default_vlan_change_flg = 1;</div><div class='add'>+	rdata-&gt;afex_default_vlan =</div><div class='add'>+		cpu_to_le16(afex_update_params-&gt;afex_default_vlan);</div><div class='add'>+	rdata-&gt;allowed_priorities_change_flg = 1;</div><div class='add'>+	rdata-&gt;allowed_priorities = afex_update_params-&gt;allowed_priorities;</div><div class='add'>+</div><div class='add'>+	/*  No need for an explicit memory barrier here as long we would</div><div class='add'>+	 *  need to ensure the ordering of writing to the SPQ element</div><div class='add'>+	 *  and updating of the SPQ producer which involves a memory</div><div class='add'>+	 *  read and we will have to put a full memory barrier there</div><div class='add'>+	 *  (inside bnx2x_sp_post()).</div><div class='add'>+	 */</div><div class='add'>+	DP(BNX2X_MSG_SP,</div><div class='add'>+	   "afex: sending func_update vif_id 0x%x dvlan 0x%x prio 0x%x\n",</div><div class='add'>+	   rdata-&gt;vif_id,</div><div class='add'>+	   rdata-&gt;afex_default_vlan, rdata-&gt;allowed_priorities);</div><div class='add'>+</div><div class='add'>+	return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_UPDATE, 0,</div><div class='add'>+			     U64_HI(data_mapping),</div><div class='add'>+			     U64_LO(data_mapping), NONE_CONNECTION_TYPE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static</div><div class='add'>+inline int bnx2x_func_send_afex_viflists(struct bnx2x *bp,</div><div class='add'>+					 struct bnx2x_func_state_params *params)</div><div class='add'>+{</div><div class='add'>+	struct bnx2x_func_sp_obj *o = params-&gt;f_obj;</div><div class='add'>+	struct afex_vif_list_ramrod_data *rdata =</div><div class='add'>+		(struct afex_vif_list_ramrod_data *)o-&gt;afex_rdata;</div><div class='add'>+	struct bnx2x_func_afex_viflists_params *afex_viflist_params =</div><div class='add'>+		&amp;params-&gt;params.afex_viflists;</div><div class='add'>+	u64 *p_rdata = (u64 *)rdata;</div><div class='add'>+</div><div class='add'>+	memset(rdata, 0, sizeof(*rdata));</div><div class='add'>+</div><div class='add'>+	/* Fill the ramrod data with provided parameters */</div><div class='add'>+	rdata-&gt;vif_list_index = afex_viflist_params-&gt;vif_list_index;</div><div class='add'>+	rdata-&gt;func_bit_map = afex_viflist_params-&gt;func_bit_map;</div><div class='add'>+	rdata-&gt;afex_vif_list_command =</div><div class='add'>+		afex_viflist_params-&gt;afex_vif_list_command;</div><div class='add'>+	rdata-&gt;func_to_clear = afex_viflist_params-&gt;func_to_clear;</div><div class='add'>+</div><div class='add'>+	/* send in echo type of sub command */</div><div class='add'>+	rdata-&gt;echo = afex_viflist_params-&gt;afex_vif_list_command;</div><div class='add'>+</div><div class='add'>+	/*  No need for an explicit memory barrier here as long we would</div><div class='add'>+	 *  need to ensure the ordering of writing to the SPQ element</div><div class='add'>+	 *  and updating of the SPQ producer which involves a memory</div><div class='add'>+	 *  read and we will have to put a full memory barrier there</div><div class='add'>+	 *  (inside bnx2x_sp_post()).</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	DP(BNX2X_MSG_SP, "afex: ramrod lists, cmd 0x%x index 0x%x func_bit_map 0x%x func_to_clr 0x%x\n",</div><div class='add'>+	   rdata-&gt;afex_vif_list_command, rdata-&gt;vif_list_index,</div><div class='add'>+	   rdata-&gt;func_bit_map, rdata-&gt;func_to_clear);</div><div class='add'>+</div><div class='add'>+	/* this ramrod sends data directly and not through DMA mapping */</div><div class='add'>+	return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_AFEX_VIF_LISTS, 0,</div><div class='add'>+			     U64_HI(*p_rdata), U64_LO(*p_rdata),</div><div class='add'>+			     NONE_CONNECTION_TYPE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int bnx2x_func_send_stop(struct bnx2x *bp,</div><div class='ctx'> 				       struct bnx2x_func_state_params *params)</div><div class='ctx'> {</div><div class='hunk'>@@ -5669,6 +5757,10 @@ static int bnx2x_func_send_cmd(struct bnx2x *bp,</div><div class='ctx'> 		return bnx2x_func_send_stop(bp, params);</div><div class='ctx'> 	case BNX2X_F_CMD_HW_RESET:</div><div class='ctx'> 		return bnx2x_func_hw_reset(bp, params);</div><div class='add'>+	case BNX2X_F_CMD_AFEX_UPDATE:</div><div class='add'>+		return bnx2x_func_send_afex_update(bp, params);</div><div class='add'>+	case BNX2X_F_CMD_AFEX_VIFLISTS:</div><div class='add'>+		return bnx2x_func_send_afex_viflists(bp, params);</div><div class='ctx'> 	case BNX2X_F_CMD_TX_STOP:</div><div class='ctx'> 		return bnx2x_func_send_tx_stop(bp, params);</div><div class='ctx'> 	case BNX2X_F_CMD_TX_START:</div><div class='hunk'>@@ -5682,6 +5774,7 @@ static int bnx2x_func_send_cmd(struct bnx2x *bp,</div><div class='ctx'> void bnx2x_init_func_obj(struct bnx2x *bp,</div><div class='ctx'> 			 struct bnx2x_func_sp_obj *obj,</div><div class='ctx'> 			 void *rdata, dma_addr_t rdata_mapping,</div><div class='add'>+			 void *afex_rdata, dma_addr_t afex_rdata_mapping,</div><div class='ctx'> 			 struct bnx2x_func_sp_drv_ops *drv_iface)</div><div class='ctx'> {</div><div class='ctx'> 	memset(obj, 0, sizeof(*obj));</div><div class='hunk'>@@ -5690,7 +5783,8 @@ void bnx2x_init_func_obj(struct bnx2x *bp,</div><div class='ctx'> </div><div class='ctx'> 	obj-&gt;rdata = rdata;</div><div class='ctx'> 	obj-&gt;rdata_mapping = rdata_mapping;</div><div class='del'>-</div><div class='add'>+	obj-&gt;afex_rdata = afex_rdata;</div><div class='add'>+	obj-&gt;afex_rdata_mapping = afex_rdata_mapping;</div><div class='ctx'> 	obj-&gt;send_cmd = bnx2x_func_send_cmd;</div><div class='ctx'> 	obj-&gt;check_transition = bnx2x_func_chk_transition;</div><div class='ctx'> 	obj-&gt;complete_cmd = bnx2x_func_comp_cmd;</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h<br/>index 61a7670adfcd..efd80bdd0dfe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h</a></div><div class='hunk'>@@ -62,6 +62,8 @@ enum {</div><div class='ctx'> 	BNX2X_FILTER_MCAST_PENDING,</div><div class='ctx'> 	BNX2X_FILTER_MCAST_SCHED,</div><div class='ctx'> 	BNX2X_FILTER_RSS_CONF_PENDING,</div><div class='add'>+	BNX2X_AFEX_FCOE_Q_UPDATE_PENDING,</div><div class='add'>+	BNX2X_AFEX_PENDING_VIFSET_MCP_ACK</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bnx2x_raw_obj {</div><div class='hunk'>@@ -432,6 +434,8 @@ enum {</div><div class='ctx'> 	BNX2X_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+void bnx2x_set_mac_in_nig(struct bnx2x *bp,</div><div class='add'>+			  bool add, unsigned char *dev_addr, int index);</div><div class='ctx'> </div><div class='ctx'> /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */</div><div class='ctx'> </div><div class='hunk'>@@ -685,9 +689,6 @@ enum {</div><div class='ctx'> 	/* RSS_MODE bits are mutually exclusive */</div><div class='ctx'> 	BNX2X_RSS_MODE_DISABLED,</div><div class='ctx'> 	BNX2X_RSS_MODE_REGULAR,</div><div class='del'>-	BNX2X_RSS_MODE_VLAN_PRI,</div><div class='del'>-	BNX2X_RSS_MODE_E1HOV_PRI,</div><div class='del'>-	BNX2X_RSS_MODE_IP_DSCP,</div><div class='ctx'> </div><div class='ctx'> 	BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */</div><div class='ctx'> </div><div class='hunk'>@@ -801,7 +802,8 @@ enum {</div><div class='ctx'> 	BNX2X_Q_FLG_TX_SWITCH,</div><div class='ctx'> 	BNX2X_Q_FLG_TX_SEC,</div><div class='ctx'> 	BNX2X_Q_FLG_ANTI_SPOOF,</div><div class='del'>-	BNX2X_Q_FLG_SILENT_VLAN_REM</div><div class='add'>+	BNX2X_Q_FLG_SILENT_VLAN_REM,</div><div class='add'>+	BNX2X_Q_FLG_FORCE_DEFAULT_PRI</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Queue type options: queue type may be a compination of below. */</div><div class='hunk'>@@ -963,6 +965,11 @@ struct bnx2x_queue_state_params {</div><div class='ctx'> 	} params;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct bnx2x_viflist_params {</div><div class='add'>+	u8 echo_res;</div><div class='add'>+	u8 func_bit_map_res;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct bnx2x_queue_sp_obj {</div><div class='ctx'> 	u32		cids[BNX2X_MULTI_TX_COS];</div><div class='ctx'> 	u8		cl_id;</div><div class='hunk'>@@ -1045,6 +1052,8 @@ enum bnx2x_func_cmd {</div><div class='ctx'> 	BNX2X_F_CMD_START,</div><div class='ctx'> 	BNX2X_F_CMD_STOP,</div><div class='ctx'> 	BNX2X_F_CMD_HW_RESET,</div><div class='add'>+	BNX2X_F_CMD_AFEX_UPDATE,</div><div class='add'>+	BNX2X_F_CMD_AFEX_VIFLISTS,</div><div class='ctx'> 	BNX2X_F_CMD_TX_STOP,</div><div class='ctx'> 	BNX2X_F_CMD_TX_START,</div><div class='ctx'> 	BNX2X_F_CMD_MAX,</div><div class='hunk'>@@ -1089,6 +1098,18 @@ struct bnx2x_func_start_params {</div><div class='ctx'> 	u8 network_cos_mode;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct bnx2x_func_afex_update_params {</div><div class='add'>+	u16 vif_id;</div><div class='add'>+	u16 afex_default_vlan;</div><div class='add'>+	u8 allowed_priorities;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnx2x_func_afex_viflists_params {</div><div class='add'>+	u16 vif_list_index;</div><div class='add'>+	u8 func_bit_map;</div><div class='add'>+	u8 afex_vif_list_command;</div><div class='add'>+	u8 func_to_clear;</div><div class='add'>+};</div><div class='ctx'> struct bnx2x_func_tx_start_params {</div><div class='ctx'> 	struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];</div><div class='ctx'> 	u8 dcb_enabled;</div><div class='hunk'>@@ -1110,6 +1131,8 @@ struct bnx2x_func_state_params {</div><div class='ctx'> 		struct bnx2x_func_hw_init_params hw_init;</div><div class='ctx'> 		struct bnx2x_func_hw_reset_params hw_reset;</div><div class='ctx'> 		struct bnx2x_func_start_params start;</div><div class='add'>+		struct bnx2x_func_afex_update_params afex_update;</div><div class='add'>+		struct bnx2x_func_afex_viflists_params afex_viflists;</div><div class='ctx'> 		struct bnx2x_func_tx_start_params tx_start;</div><div class='ctx'> 	} params;</div><div class='ctx'> };</div><div class='hunk'>@@ -1154,6 +1177,13 @@ struct bnx2x_func_sp_obj {</div><div class='ctx'> 	void			*rdata;</div><div class='ctx'> 	dma_addr_t		rdata_mapping;</div><div class='ctx'> </div><div class='add'>+	/* Buffer to use as a afex ramrod data and its mapping.</div><div class='add'>+	 * This can't be same rdata as above because afex ramrod requests</div><div class='add'>+	 * can arrive to the object in parallel to other ramrod requests.</div><div class='add'>+	 */</div><div class='add'>+	void			*afex_rdata;</div><div class='add'>+	dma_addr_t		afex_rdata_mapping;</div><div class='add'>+</div><div class='ctx'> 	/* this mutex validates that when pending flag is taken, the next</div><div class='ctx'> 	 * ramrod to be sent will be the one set the pending bit</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1197,6 +1227,7 @@ union bnx2x_qable_obj {</div><div class='ctx'> void bnx2x_init_func_obj(struct bnx2x *bp,</div><div class='ctx'> 			 struct bnx2x_func_sp_obj *obj,</div><div class='ctx'> 			 void *rdata, dma_addr_t rdata_mapping,</div><div class='add'>+			 void *afex_rdata, dma_addr_t afex_rdata_mapping,</div><div class='ctx'> 			 struct bnx2x_func_sp_drv_ops *drv_iface);</div><div class='ctx'> </div><div class='ctx'> int bnx2x_func_state_change(struct bnx2x *bp,</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c<br/>index e1c9310fb07c..1e2785cd11d0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c</a></div><div class='hunk'>@@ -1316,7 +1316,7 @@ static void bnx2x_port_stats_base_init(struct bnx2x *bp)</div><div class='ctx'>  *</div><div class='ctx'>  * @param bp</div><div class='ctx'>  */</div><div class='del'>-static inline void bnx2x_prep_fw_stats_req(struct bnx2x *bp)</div><div class='add'>+static void bnx2x_prep_fw_stats_req(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int first_queue_query_index;</div><div class='hunk'>@@ -1561,3 +1561,274 @@ void bnx2x_save_statistics(struct bnx2x *bp)</div><div class='ctx'> 		UPDATE_FW_STAT_OLD(mac_discard);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats,</div><div class='add'>+			      u32 stats_type)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats;</div><div class='add'>+	struct bnx2x_eth_stats *estats = &amp;bp-&gt;eth_stats;</div><div class='add'>+	struct per_queue_stats *fcoe_q_stats =</div><div class='add'>+		&amp;bp-&gt;fw_stats_data-&gt;queue_stats[FCOE_IDX];</div><div class='add'>+</div><div class='add'>+	struct tstorm_per_queue_stats *fcoe_q_tstorm_stats =</div><div class='add'>+		&amp;fcoe_q_stats-&gt;tstorm_queue_statistics;</div><div class='add'>+</div><div class='add'>+	struct ustorm_per_queue_stats *fcoe_q_ustorm_stats =</div><div class='add'>+		&amp;fcoe_q_stats-&gt;ustorm_queue_statistics;</div><div class='add'>+</div><div class='add'>+	struct xstorm_per_queue_stats *fcoe_q_xstorm_stats =</div><div class='add'>+		&amp;fcoe_q_stats-&gt;xstorm_queue_statistics;</div><div class='add'>+</div><div class='add'>+	struct fcoe_statistics_params *fw_fcoe_stat =</div><div class='add'>+		&amp;bp-&gt;fw_stats_data-&gt;fcoe;</div><div class='add'>+</div><div class='add'>+	memset(afex_stats, 0, sizeof(struct afex_stats));</div><div class='add'>+</div><div class='add'>+	for_each_eth_queue(bp, i) {</div><div class='add'>+		struct bnx2x_fastpath *fp = &amp;bp-&gt;fp[i];</div><div class='add'>+		struct bnx2x_eth_q_stats *qstats = &amp;fp-&gt;eth_q_stats;</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_unicast_bytes_hi,</div><div class='add'>+		       qstats-&gt;total_unicast_bytes_received_hi,</div><div class='add'>+		       afex_stats-&gt;rx_unicast_bytes_lo,</div><div class='add'>+		       qstats-&gt;total_unicast_bytes_received_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_broadcast_bytes_hi,</div><div class='add'>+		       qstats-&gt;total_broadcast_bytes_received_hi,</div><div class='add'>+		       afex_stats-&gt;rx_broadcast_bytes_lo,</div><div class='add'>+		       qstats-&gt;total_broadcast_bytes_received_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_multicast_bytes_hi,</div><div class='add'>+		       qstats-&gt;total_multicast_bytes_received_hi,</div><div class='add'>+		       afex_stats-&gt;rx_multicast_bytes_lo,</div><div class='add'>+		       qstats-&gt;total_multicast_bytes_received_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_unicast_frames_hi,</div><div class='add'>+		       qstats-&gt;total_unicast_packets_received_hi,</div><div class='add'>+		       afex_stats-&gt;rx_unicast_frames_lo,</div><div class='add'>+		       qstats-&gt;total_unicast_packets_received_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_broadcast_frames_hi,</div><div class='add'>+		       qstats-&gt;total_broadcast_packets_received_hi,</div><div class='add'>+		       afex_stats-&gt;rx_broadcast_frames_lo,</div><div class='add'>+		       qstats-&gt;total_broadcast_packets_received_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_multicast_frames_hi,</div><div class='add'>+		       qstats-&gt;total_multicast_packets_received_hi,</div><div class='add'>+		       afex_stats-&gt;rx_multicast_frames_lo,</div><div class='add'>+		       qstats-&gt;total_multicast_packets_received_lo);</div><div class='add'>+</div><div class='add'>+		/* sum to rx_frames_discarded all discraded</div><div class='add'>+		 * packets due to size, ttl0 and checksum</div><div class='add'>+		 */</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_frames_discarded_hi,</div><div class='add'>+		       qstats-&gt;total_packets_received_checksum_discarded_hi,</div><div class='add'>+		       afex_stats-&gt;rx_frames_discarded_lo,</div><div class='add'>+		       qstats-&gt;total_packets_received_checksum_discarded_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_frames_discarded_hi,</div><div class='add'>+		       qstats-&gt;total_packets_received_ttl0_discarded_hi,</div><div class='add'>+		       afex_stats-&gt;rx_frames_discarded_lo,</div><div class='add'>+		       qstats-&gt;total_packets_received_ttl0_discarded_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_frames_discarded_hi,</div><div class='add'>+		       qstats-&gt;etherstatsoverrsizepkts_hi,</div><div class='add'>+		       afex_stats-&gt;rx_frames_discarded_lo,</div><div class='add'>+		       qstats-&gt;etherstatsoverrsizepkts_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_frames_dropped_hi,</div><div class='add'>+		       qstats-&gt;no_buff_discard_hi,</div><div class='add'>+		       afex_stats-&gt;rx_frames_dropped_lo,</div><div class='add'>+		       qstats-&gt;no_buff_discard_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;tx_unicast_bytes_hi,</div><div class='add'>+		       qstats-&gt;total_unicast_bytes_transmitted_hi,</div><div class='add'>+		       afex_stats-&gt;tx_unicast_bytes_lo,</div><div class='add'>+		       qstats-&gt;total_unicast_bytes_transmitted_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;tx_broadcast_bytes_hi,</div><div class='add'>+		       qstats-&gt;total_broadcast_bytes_transmitted_hi,</div><div class='add'>+		       afex_stats-&gt;tx_broadcast_bytes_lo,</div><div class='add'>+		       qstats-&gt;total_broadcast_bytes_transmitted_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;tx_multicast_bytes_hi,</div><div class='add'>+		       qstats-&gt;total_multicast_bytes_transmitted_hi,</div><div class='add'>+		       afex_stats-&gt;tx_multicast_bytes_lo,</div><div class='add'>+		       qstats-&gt;total_multicast_bytes_transmitted_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;tx_unicast_frames_hi,</div><div class='add'>+		       qstats-&gt;total_unicast_packets_transmitted_hi,</div><div class='add'>+		       afex_stats-&gt;tx_unicast_frames_lo,</div><div class='add'>+		       qstats-&gt;total_unicast_packets_transmitted_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;tx_broadcast_frames_hi,</div><div class='add'>+		       qstats-&gt;total_broadcast_packets_transmitted_hi,</div><div class='add'>+		       afex_stats-&gt;tx_broadcast_frames_lo,</div><div class='add'>+		       qstats-&gt;total_broadcast_packets_transmitted_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;tx_multicast_frames_hi,</div><div class='add'>+		       qstats-&gt;total_multicast_packets_transmitted_hi,</div><div class='add'>+		       afex_stats-&gt;tx_multicast_frames_lo,</div><div class='add'>+		       qstats-&gt;total_multicast_packets_transmitted_lo);</div><div class='add'>+</div><div class='add'>+		ADD_64(afex_stats-&gt;tx_frames_dropped_hi,</div><div class='add'>+		       qstats-&gt;total_transmitted_dropped_packets_error_hi,</div><div class='add'>+		       afex_stats-&gt;tx_frames_dropped_lo,</div><div class='add'>+		       qstats-&gt;total_transmitted_dropped_packets_error_lo);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* now add FCoE statistics which are collected separately</div><div class='add'>+	 * (both offloaded and non offloaded)</div><div class='add'>+	 */</div><div class='add'>+	if (!NO_FCOE(bp)) {</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_unicast_bytes_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_unicast_bytes_lo,</div><div class='add'>+			  fw_fcoe_stat-&gt;rx_stat0.fcoe_rx_byte_cnt);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_unicast_bytes_hi,</div><div class='add'>+			  fcoe_q_tstorm_stats-&gt;rcv_ucast_bytes.hi,</div><div class='add'>+			  afex_stats-&gt;rx_unicast_bytes_lo,</div><div class='add'>+			  fcoe_q_tstorm_stats-&gt;rcv_ucast_bytes.lo);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_broadcast_bytes_hi,</div><div class='add'>+			  fcoe_q_tstorm_stats-&gt;rcv_bcast_bytes.hi,</div><div class='add'>+			  afex_stats-&gt;rx_broadcast_bytes_lo,</div><div class='add'>+			  fcoe_q_tstorm_stats-&gt;rcv_bcast_bytes.lo);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_multicast_bytes_hi,</div><div class='add'>+			  fcoe_q_tstorm_stats-&gt;rcv_mcast_bytes.hi,</div><div class='add'>+			  afex_stats-&gt;rx_multicast_bytes_lo,</div><div class='add'>+			  fcoe_q_tstorm_stats-&gt;rcv_mcast_bytes.lo);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_unicast_frames_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_unicast_frames_lo,</div><div class='add'>+			  fw_fcoe_stat-&gt;rx_stat0.fcoe_rx_pkt_cnt);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_unicast_frames_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_unicast_frames_lo,</div><div class='add'>+			  fcoe_q_tstorm_stats-&gt;rcv_ucast_pkts);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_broadcast_frames_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_broadcast_frames_lo,</div><div class='add'>+			  fcoe_q_tstorm_stats-&gt;rcv_bcast_pkts);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_multicast_frames_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_multicast_frames_lo,</div><div class='add'>+			  fcoe_q_tstorm_stats-&gt;rcv_ucast_pkts);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_frames_discarded_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_frames_discarded_lo,</div><div class='add'>+			  fcoe_q_tstorm_stats-&gt;checksum_discard);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_frames_discarded_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_frames_discarded_lo,</div><div class='add'>+			  fcoe_q_tstorm_stats-&gt;pkts_too_big_discard);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_frames_discarded_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_frames_discarded_lo,</div><div class='add'>+			  fcoe_q_tstorm_stats-&gt;ttl0_discard);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE16(afex_stats-&gt;rx_frames_dropped_hi,</div><div class='add'>+			    LE16_0,</div><div class='add'>+			    afex_stats-&gt;rx_frames_dropped_lo,</div><div class='add'>+			    fcoe_q_tstorm_stats-&gt;no_buff_discard);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_frames_dropped_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_frames_dropped_lo,</div><div class='add'>+			  fcoe_q_ustorm_stats-&gt;ucast_no_buff_pkts);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_frames_dropped_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_frames_dropped_lo,</div><div class='add'>+			  fcoe_q_ustorm_stats-&gt;mcast_no_buff_pkts);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_frames_dropped_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_frames_dropped_lo,</div><div class='add'>+			  fcoe_q_ustorm_stats-&gt;bcast_no_buff_pkts);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_frames_dropped_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_frames_dropped_lo,</div><div class='add'>+			  fw_fcoe_stat-&gt;rx_stat1.fcoe_rx_drop_pkt_cnt);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;rx_frames_dropped_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;rx_frames_dropped_lo,</div><div class='add'>+			  fw_fcoe_stat-&gt;rx_stat2.fcoe_rx_drop_pkt_cnt);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;tx_unicast_bytes_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;tx_unicast_bytes_lo,</div><div class='add'>+			  fw_fcoe_stat-&gt;tx_stat.fcoe_tx_byte_cnt);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;tx_unicast_bytes_hi,</div><div class='add'>+			  fcoe_q_xstorm_stats-&gt;ucast_bytes_sent.hi,</div><div class='add'>+			  afex_stats-&gt;tx_unicast_bytes_lo,</div><div class='add'>+			  fcoe_q_xstorm_stats-&gt;ucast_bytes_sent.lo);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;tx_broadcast_bytes_hi,</div><div class='add'>+			  fcoe_q_xstorm_stats-&gt;bcast_bytes_sent.hi,</div><div class='add'>+			  afex_stats-&gt;tx_broadcast_bytes_lo,</div><div class='add'>+			  fcoe_q_xstorm_stats-&gt;bcast_bytes_sent.lo);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;tx_multicast_bytes_hi,</div><div class='add'>+			  fcoe_q_xstorm_stats-&gt;mcast_bytes_sent.hi,</div><div class='add'>+			  afex_stats-&gt;tx_multicast_bytes_lo,</div><div class='add'>+			  fcoe_q_xstorm_stats-&gt;mcast_bytes_sent.lo);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;tx_unicast_frames_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;tx_unicast_frames_lo,</div><div class='add'>+			  fw_fcoe_stat-&gt;tx_stat.fcoe_tx_pkt_cnt);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;tx_unicast_frames_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;tx_unicast_frames_lo,</div><div class='add'>+			  fcoe_q_xstorm_stats-&gt;ucast_pkts_sent);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;tx_broadcast_frames_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;tx_broadcast_frames_lo,</div><div class='add'>+			  fcoe_q_xstorm_stats-&gt;bcast_pkts_sent);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;tx_multicast_frames_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;tx_multicast_frames_lo,</div><div class='add'>+			  fcoe_q_xstorm_stats-&gt;mcast_pkts_sent);</div><div class='add'>+</div><div class='add'>+		ADD_64_LE(afex_stats-&gt;tx_frames_dropped_hi,</div><div class='add'>+			  LE32_0,</div><div class='add'>+			  afex_stats-&gt;tx_frames_dropped_lo,</div><div class='add'>+			  fcoe_q_xstorm_stats-&gt;error_drop_pkts);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* if port stats are requested, add them to the PMF</div><div class='add'>+	 * stats, as anyway they will be accumulated by the</div><div class='add'>+	 * MCP before sent to the switch</div><div class='add'>+	 */</div><div class='add'>+	if ((bp-&gt;port.pmf) &amp;&amp; (stats_type == VICSTATST_UIF_INDEX)) {</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_frames_dropped_hi,</div><div class='add'>+		       0,</div><div class='add'>+		       afex_stats-&gt;rx_frames_dropped_lo,</div><div class='add'>+		       estats-&gt;mac_filter_discard);</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_frames_dropped_hi,</div><div class='add'>+		       0,</div><div class='add'>+		       afex_stats-&gt;rx_frames_dropped_lo,</div><div class='add'>+		       estats-&gt;brb_truncate_discard);</div><div class='add'>+		ADD_64(afex_stats-&gt;rx_frames_discarded_hi,</div><div class='add'>+		       0,</div><div class='add'>+		       afex_stats-&gt;rx_frames_discarded_lo,</div><div class='add'>+		       estats-&gt;mac_discard);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h<br/>index 2b46e1eb7fd1..93e689fdfeda 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h</a></div><div class='hunk'>@@ -338,6 +338,18 @@ struct bnx2x_fw_port_stats_old {</div><div class='ctx'> 		s_hi += a_hi + ((s_lo &lt; a_lo) ? 1 : 0); \</div><div class='ctx'> 	} while (0)</div><div class='ctx'> </div><div class='add'>+#define LE32_0 ((__force __le32) 0)</div><div class='add'>+#define LE16_0 ((__force __le16) 0)</div><div class='add'>+</div><div class='add'>+/* The _force is for cases where high value is 0 */</div><div class='add'>+#define ADD_64_LE(s_hi, a_hi_le, s_lo, a_lo_le) \</div><div class='add'>+		ADD_64(s_hi, le32_to_cpu(a_hi_le), \</div><div class='add'>+		       s_lo, le32_to_cpu(a_lo_le))</div><div class='add'>+</div><div class='add'>+#define ADD_64_LE16(s_hi, a_hi_le, s_lo, a_lo_le) \</div><div class='add'>+		ADD_64(s_hi, le16_to_cpu(a_hi_le), \</div><div class='add'>+		       s_lo, le16_to_cpu(a_lo_le))</div><div class='add'>+</div><div class='ctx'> /* difference = minuend - subtrahend */</div><div class='ctx'> #define DIFF_64(d_hi, m_hi, s_hi, d_lo, m_lo, s_lo) \</div><div class='ctx'> 	do { \</div><div class='hunk'>@@ -529,4 +541,7 @@ void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event);</div><div class='ctx'>  * @bp:		driver handle</div><div class='ctx'>  */</div><div class='ctx'> void bnx2x_save_statistics(struct bnx2x *bp);</div><div class='add'>+</div><div class='add'>+void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats,</div><div class='add'>+			      u32 stats_type);</div><div class='ctx'> #endif /* BNX2X_STATS_H */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c<br/>index 062ac333fde6..edeeb516807a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/tg3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/broadcom/tg3.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/broadcom/tg3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/broadcom/tg3.c</a></div><div class='hunk'>@@ -879,8 +879,13 @@ static inline unsigned int tg3_has_work(struct tg3_napi *tnapi)</div><div class='ctx'> 		if (sblk-&gt;status &amp; SD_STATUS_LINK_CHG)</div><div class='ctx'> 			work_exists = 1;</div><div class='ctx'> 	}</div><div class='del'>-	/* check for RX/TX work to do */</div><div class='del'>-	if (sblk-&gt;idx[0].tx_consumer != tnapi-&gt;tx_cons ||</div><div class='add'>+</div><div class='add'>+	/* check for TX work to do */</div><div class='add'>+	if (sblk-&gt;idx[0].tx_consumer != tnapi-&gt;tx_cons)</div><div class='add'>+		work_exists = 1;</div><div class='add'>+</div><div class='add'>+	/* check for RX work to do */</div><div class='add'>+	if (tnapi-&gt;rx_rcb_prod_idx &amp;&amp;</div><div class='ctx'> 	    *(tnapi-&gt;rx_rcb_prod_idx) != tnapi-&gt;rx_rcb_ptr)</div><div class='ctx'> 		work_exists = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -5617,17 +5622,29 @@ static void tg3_tx(struct tg3_napi *tnapi)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void tg3_frag_free(bool is_frag, void *data)</div><div class='add'>+{</div><div class='add'>+	if (is_frag)</div><div class='add'>+		put_page(virt_to_head_page(data));</div><div class='add'>+	else</div><div class='add'>+		kfree(data);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void tg3_rx_data_free(struct tg3 *tp, struct ring_info *ri, u32 map_sz)</div><div class='ctx'> {</div><div class='add'>+	unsigned int skb_size = SKB_DATA_ALIGN(map_sz + TG3_RX_OFFSET(tp)) +</div><div class='add'>+		   SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='add'>+</div><div class='ctx'> 	if (!ri-&gt;data)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	pci_unmap_single(tp-&gt;pdev, dma_unmap_addr(ri, mapping),</div><div class='ctx'> 			 map_sz, PCI_DMA_FROMDEVICE);</div><div class='del'>-	kfree(ri-&gt;data);</div><div class='add'>+	tg3_frag_free(skb_size &lt;= PAGE_SIZE, ri-&gt;data);</div><div class='ctx'> 	ri-&gt;data = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> /* Returns size of skb allocated or &lt; 0 on error.</div><div class='ctx'>  *</div><div class='ctx'>  * We only need to fill in the address because the other members</div><div class='hunk'>@@ -5640,7 +5657,8 @@ static void tg3_rx_data_free(struct tg3 *tp, struct ring_info *ri, u32 map_sz)</div><div class='ctx'>  * (to fetch the error flags, vlan tag, checksum, and opaque cookie).</div><div class='ctx'>  */</div><div class='ctx'> static int tg3_alloc_rx_data(struct tg3 *tp, struct tg3_rx_prodring_set *tpr,</div><div class='del'>-			    u32 opaque_key, u32 dest_idx_unmasked)</div><div class='add'>+			     u32 opaque_key, u32 dest_idx_unmasked,</div><div class='add'>+			     unsigned int *frag_size)</div><div class='ctx'> {</div><div class='ctx'> 	struct tg3_rx_buffer_desc *desc;</div><div class='ctx'> 	struct ring_info *map;</div><div class='hunk'>@@ -5675,7 +5693,13 @@ static int tg3_alloc_rx_data(struct tg3 *tp, struct tg3_rx_prodring_set *tpr,</div><div class='ctx'> 	 */</div><div class='ctx'> 	skb_size = SKB_DATA_ALIGN(data_size + TG3_RX_OFFSET(tp)) +</div><div class='ctx'> 		   SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='del'>-	data = kmalloc(skb_size, GFP_ATOMIC);</div><div class='add'>+	if (skb_size &lt;= PAGE_SIZE) {</div><div class='add'>+		data = netdev_alloc_frag(skb_size);</div><div class='add'>+		*frag_size = skb_size;</div><div class='add'>+	} else {</div><div class='add'>+		data = kmalloc(skb_size, GFP_ATOMIC);</div><div class='add'>+		*frag_size = 0;</div><div class='add'>+	}</div><div class='ctx'> 	if (!data)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -5683,8 +5707,8 @@ static int tg3_alloc_rx_data(struct tg3 *tp, struct tg3_rx_prodring_set *tpr,</div><div class='ctx'> 				 data + TG3_RX_OFFSET(tp),</div><div class='ctx'> 				 data_size,</div><div class='ctx'> 				 PCI_DMA_FROMDEVICE);</div><div class='del'>-	if (pci_dma_mapping_error(tp-&gt;pdev, mapping)) {</div><div class='del'>-		kfree(data);</div><div class='add'>+	if (unlikely(pci_dma_mapping_error(tp-&gt;pdev, mapping))) {</div><div class='add'>+		tg3_frag_free(skb_size &lt;= PAGE_SIZE, data);</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5835,18 +5859,19 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)</div><div class='ctx'> </div><div class='ctx'> 		if (len &gt; TG3_RX_COPY_THRESH(tp)) {</div><div class='ctx'> 			int skb_size;</div><div class='add'>+			unsigned int frag_size;</div><div class='ctx'> </div><div class='ctx'> 			skb_size = tg3_alloc_rx_data(tp, tpr, opaque_key,</div><div class='del'>-						    *post_ptr);</div><div class='add'>+						    *post_ptr, &amp;frag_size);</div><div class='ctx'> 			if (skb_size &lt; 0)</div><div class='ctx'> 				goto drop_it;</div><div class='ctx'> </div><div class='ctx'> 			pci_unmap_single(tp-&gt;pdev, dma_addr, skb_size,</div><div class='ctx'> 					 PCI_DMA_FROMDEVICE);</div><div class='ctx'> </div><div class='del'>-			skb = build_skb(data);</div><div class='add'>+			skb = build_skb(data, frag_size);</div><div class='ctx'> 			if (!skb) {</div><div class='del'>-				kfree(data);</div><div class='add'>+				tg3_frag_free(frag_size != 0, data);</div><div class='ctx'> 				goto drop_it_no_recycle;</div><div class='ctx'> 			}</div><div class='ctx'> 			skb_reserve(skb, TG3_RX_OFFSET(tp));</div><div class='hunk'>@@ -6124,6 +6149,9 @@ static int tg3_poll_work(struct tg3_napi *tnapi, int work_done, int budget)</div><div class='ctx'> 			return work_done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!tnapi-&gt;rx_rcb_prod_idx)</div><div class='add'>+		return work_done;</div><div class='add'>+</div><div class='ctx'> 	/* run RX thread, within the bounds set by NAPI.</div><div class='ctx'> 	 * All RX "locking" is done by ensuring outside</div><div class='ctx'> 	 * code synchronizes with tg3-&gt;napi.poll()</div><div class='hunk'>@@ -7279,7 +7307,10 @@ static int tg3_rx_prodring_alloc(struct tg3 *tp,</div><div class='ctx'> </div><div class='ctx'> 	/* Now allocate fresh SKBs for each rx ring. */</div><div class='ctx'> 	for (i = 0; i &lt; tp-&gt;rx_pending; i++) {</div><div class='del'>-		if (tg3_alloc_rx_data(tp, tpr, RXD_OPAQUE_RING_STD, i) &lt; 0) {</div><div class='add'>+		unsigned int frag_size;</div><div class='add'>+</div><div class='add'>+		if (tg3_alloc_rx_data(tp, tpr, RXD_OPAQUE_RING_STD, i,</div><div class='add'>+				      &amp;frag_size) &lt; 0) {</div><div class='ctx'> 			netdev_warn(tp-&gt;dev,</div><div class='ctx'> 				    "Using a smaller RX standard ring. Only "</div><div class='ctx'> 				    "%d out of %d buffers were allocated "</div><div class='hunk'>@@ -7311,7 +7342,10 @@ static int tg3_rx_prodring_alloc(struct tg3 *tp,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; tp-&gt;rx_jumbo_pending; i++) {</div><div class='del'>-		if (tg3_alloc_rx_data(tp, tpr, RXD_OPAQUE_RING_JUMBO, i) &lt; 0) {</div><div class='add'>+		unsigned int frag_size;</div><div class='add'>+</div><div class='add'>+		if (tg3_alloc_rx_data(tp, tpr, RXD_OPAQUE_RING_JUMBO, i,</div><div class='add'>+				      &amp;frag_size) &lt; 0) {</div><div class='ctx'> 			netdev_warn(tp-&gt;dev,</div><div class='ctx'> 				    "Using a smaller RX jumbo ring. Only %d "</div><div class='ctx'> 				    "out of %d buffers were allocated "</div><div class='hunk'>@@ -7567,6 +7601,12 @@ static int tg3_alloc_consistent(struct tg3 *tp)</div><div class='ctx'> 		 */</div><div class='ctx'> 		switch (i) {</div><div class='ctx'> 		default:</div><div class='add'>+			if (tg3_flag(tp, ENABLE_RSS)) {</div><div class='add'>+				tnapi-&gt;rx_rcb_prod_idx = NULL;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			/* Fall through */</div><div class='add'>+		case 1:</div><div class='ctx'> 			tnapi-&gt;rx_rcb_prod_idx = &amp;sblk-&gt;idx[0].rx_producer;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 2:</div><div class='hunk'>@@ -12234,6 +12274,7 @@ static const struct ethtool_ops tg3_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size    = tg3_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh_indir		= tg3_get_rxfh_indir,</div><div class='ctx'> 	.set_rxfh_indir		= tg3_set_rxfh_indir,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct rtnl_link_stats64 *tg3_get_stats64(struct net_device *dev,</div><div class='hunk'>@@ -15842,8 +15883,7 @@ static void __devexit tg3_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 	if (dev) {</div><div class='ctx'> 		struct tg3 *tp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-		if (tp-&gt;fw)</div><div class='del'>-			release_firmware(tp-&gt;fw);</div><div class='add'>+		release_firmware(tp-&gt;fw);</div><div class='ctx'> </div><div class='ctx'> 		tg3_reset_task_cancel(tp);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/brocade/bna/bfa_ioc.c b/drivers/net/ethernet/brocade/bna/bfa_ioc.c<br/>index 77977d735dd7..0b640fafbda3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/brocade/bna/bfa_ioc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/brocade/bna/bfa_ioc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/brocade/bna/bfa_ioc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/brocade/bna/bfa_ioc.c</a></div><div class='hunk'>@@ -70,7 +70,6 @@ static void bfa_ioc_reset(struct bfa_ioc *ioc, bool force);</div><div class='ctx'> static void bfa_ioc_mbox_poll(struct bfa_ioc *ioc);</div><div class='ctx'> static void bfa_ioc_mbox_flush(struct bfa_ioc *ioc);</div><div class='ctx'> static void bfa_ioc_recover(struct bfa_ioc *ioc);</div><div class='del'>-static void bfa_ioc_check_attr_wwns(struct bfa_ioc *ioc);</div><div class='ctx'> static void bfa_ioc_event_notify(struct bfa_ioc *, enum bfa_ioc_event);</div><div class='ctx'> static void bfa_ioc_disable_comp(struct bfa_ioc *ioc);</div><div class='ctx'> static void bfa_ioc_lpu_stop(struct bfa_ioc *ioc);</div><div class='hunk'>@@ -346,8 +345,6 @@ bfa_ioc_sm_getattr(struct bfa_ioc *ioc, enum ioc_event event)</div><div class='ctx'> 	switch (event) {</div><div class='ctx'> 	case IOC_E_FWRSP_GETATTR:</div><div class='ctx'> 		del_timer(&amp;ioc-&gt;ioc_timer);</div><div class='del'>-		bfa_ioc_check_attr_wwns(ioc);</div><div class='del'>-		bfa_ioc_hb_monitor(ioc);</div><div class='ctx'> 		bfa_fsm_set_state(ioc, bfa_ioc_sm_op);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -380,6 +377,7 @@ bfa_ioc_sm_op_entry(struct bfa_ioc *ioc)</div><div class='ctx'> {</div><div class='ctx'> 	ioc-&gt;cbfn-&gt;enable_cbfn(ioc-&gt;bfa, BFA_STATUS_OK);</div><div class='ctx'> 	bfa_ioc_event_notify(ioc, BFA_IOC_E_ENABLED);</div><div class='add'>+	bfa_ioc_hb_monitor(ioc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1207,27 +1205,62 @@ bfa_nw_ioc_sem_release(void __iomem *sem_reg)</div><div class='ctx'> 	writel(1, sem_reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Clear fwver hdr */</div><div class='add'>+static void</div><div class='add'>+bfa_ioc_fwver_clear(struct bfa_ioc *ioc)</div><div class='add'>+{</div><div class='add'>+	u32 pgnum, pgoff, loff = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	pgnum = PSS_SMEM_PGNUM(ioc-&gt;ioc_regs.smem_pg0, loff);</div><div class='add'>+	pgoff = PSS_SMEM_PGOFF(loff);</div><div class='add'>+	writel(pgnum, ioc-&gt;ioc_regs.host_page_num_fn);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; (sizeof(struct bfi_ioc_image_hdr) / sizeof(u32)); i++) {</div><div class='add'>+		writel(0, ioc-&gt;ioc_regs.smem_page_start + loff);</div><div class='add'>+		loff += sizeof(u32);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> bfa_ioc_hw_sem_init(struct bfa_ioc *ioc)</div><div class='ctx'> {</div><div class='ctx'> 	struct bfi_ioc_image_hdr fwhdr;</div><div class='del'>-	u32 fwstate = readl(ioc-&gt;ioc_regs.ioc_fwstate);</div><div class='add'>+	u32 fwstate, r32;</div><div class='ctx'> </div><div class='del'>-	if (fwstate == BFI_IOC_UNINIT)</div><div class='add'>+	/* Spin on init semaphore to serialize. */</div><div class='add'>+	r32 = readl(ioc-&gt;ioc_regs.ioc_init_sem_reg);</div><div class='add'>+	while (r32 &amp; 0x1) {</div><div class='add'>+		udelay(20);</div><div class='add'>+		r32 = readl(ioc-&gt;ioc_regs.ioc_init_sem_reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fwstate = readl(ioc-&gt;ioc_regs.ioc_fwstate);</div><div class='add'>+	if (fwstate == BFI_IOC_UNINIT) {</div><div class='add'>+		writel(1, ioc-&gt;ioc_regs.ioc_init_sem_reg);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	bfa_nw_ioc_fwver_get(ioc, &amp;fwhdr);</div><div class='ctx'> </div><div class='del'>-	if (swab32(fwhdr.exec) == BFI_FWBOOT_TYPE_NORMAL)</div><div class='add'>+	if (swab32(fwhdr.exec) == BFI_FWBOOT_TYPE_NORMAL) {</div><div class='add'>+		writel(1, ioc-&gt;ioc_regs.ioc_init_sem_reg);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	bfa_ioc_fwver_clear(ioc);</div><div class='ctx'> 	writel(BFI_IOC_UNINIT, ioc-&gt;ioc_regs.ioc_fwstate);</div><div class='add'>+	writel(BFI_IOC_UNINIT, ioc-&gt;ioc_regs.alt_ioc_fwstate);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Try to lock and then unlock the semaphore.</div><div class='ctx'> 	 */</div><div class='ctx'> 	readl(ioc-&gt;ioc_regs.ioc_sem_reg);</div><div class='ctx'> 	writel(1, ioc-&gt;ioc_regs.ioc_sem_reg);</div><div class='add'>+</div><div class='add'>+	/* Unlock init semaphore */</div><div class='add'>+	writel(1, ioc-&gt;ioc_regs.ioc_init_sem_reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1585,11 +1618,6 @@ bfa_ioc_download_fw(struct bfa_ioc *ioc, u32 boot_type,</div><div class='ctx'> 	u32 i;</div><div class='ctx'> 	u32 asicmode;</div><div class='ctx'> </div><div class='del'>-	/**</div><div class='del'>-	 * Initialize LMEM first before code download</div><div class='del'>-	 */</div><div class='del'>-	bfa_ioc_lmem_init(ioc);</div><div class='del'>-</div><div class='ctx'> 	fwimg = bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), chunkno);</div><div class='ctx'> </div><div class='ctx'> 	pgnum = bfa_ioc_smem_pgnum(ioc, loff);</div><div class='hunk'>@@ -1914,6 +1942,10 @@ bfa_ioc_pll_init(struct bfa_ioc *ioc)</div><div class='ctx'> 	bfa_ioc_pll_init_asic(ioc);</div><div class='ctx'> </div><div class='ctx'> 	ioc-&gt;pllinit = true;</div><div class='add'>+</div><div class='add'>+	/* Initialize LMEM */</div><div class='add'>+	bfa_ioc_lmem_init(ioc);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 *  release semaphore.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -2513,13 +2545,6 @@ bfa_ioc_recover(struct bfa_ioc *ioc)</div><div class='ctx'> 	bfa_fsm_send_event(ioc, IOC_E_HBFAIL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-bfa_ioc_check_attr_wwns(struct bfa_ioc *ioc)</div><div class='del'>-{</div><div class='del'>-	if (bfa_ioc_get_type(ioc) == BFA_IOC_TYPE_LL)</div><div class='del'>-		return;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * @dg hal_iocpf_pvt BFA IOC PF private functions</div><div class='ctx'>  * @{</div><div class='head'>diff --git a/drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c b/drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c<br/>index 348479bbfa3a..b6b036a143ae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c</a></div><div class='hunk'>@@ -199,9 +199,9 @@ bfa_ioc_ct_notify_fail(struct bfa_ioc *ioc)</div><div class='ctx'>  * Host to LPU mailbox message addresses</div><div class='ctx'>  */</div><div class='ctx'> static const struct {</div><div class='del'>-	u32 	hfn_mbox;</div><div class='del'>-	u32 	lpu_mbox;</div><div class='del'>-	u32 	hfn_pgn;</div><div class='add'>+	u32	hfn_mbox;</div><div class='add'>+	u32	lpu_mbox;</div><div class='add'>+	u32	hfn_pgn;</div><div class='ctx'> } ct_fnreg[] = {</div><div class='ctx'> 	{ HOSTFN0_LPU_MBOX0_0, LPU_HOSTFN0_MBOX0_0, HOST_PAGE_NUM_FN0 },</div><div class='ctx'> 	{ HOSTFN1_LPU_MBOX0_8, LPU_HOSTFN1_MBOX0_8, HOST_PAGE_NUM_FN1 },</div><div class='hunk'>@@ -803,17 +803,72 @@ bfa_ioc_ct2_mac_reset(void __iomem *rb)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define CT2_NFC_MAX_DELAY       1000</div><div class='add'>+#define CT2_NFC_VER_VALID       0x143</div><div class='add'>+#define BFA_IOC_PLL_POLL        1000000</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+bfa_ioc_ct2_nfc_halted(void __iomem *rb)</div><div class='add'>+{</div><div class='add'>+	volatile u32 r32;</div><div class='add'>+</div><div class='add'>+	r32 = readl(rb + CT2_NFC_CSR_SET_REG);</div><div class='add'>+	if (r32 &amp; __NFC_CONTROLLER_HALTED)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+bfa_ioc_ct2_nfc_resume(void __iomem *rb)</div><div class='add'>+{</div><div class='add'>+	volatile u32 r32;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	writel(__HALT_NFC_CONTROLLER, rb + CT2_NFC_CSR_CLR_REG);</div><div class='add'>+	for (i = 0; i &lt; CT2_NFC_MAX_DELAY; i++) {</div><div class='add'>+		r32 = readl(rb + CT2_NFC_CSR_SET_REG);</div><div class='add'>+		if (!(r32 &amp; __NFC_CONTROLLER_HALTED))</div><div class='add'>+			return;</div><div class='add'>+		udelay(1000);</div><div class='add'>+	}</div><div class='add'>+	BUG_ON(1);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static enum bfa_status</div><div class='ctx'> bfa_ioc_ct2_pll_init(void __iomem *rb, enum bfi_asic_mode asic_mode)</div><div class='ctx'> {</div><div class='ctx'> 	volatile u32 wgn, r32;</div><div class='del'>-	int i;</div><div class='add'>+	u32 nfc_ver, i;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Initialize PLL if not already done by NFC</div><div class='del'>-	 */</div><div class='ctx'> 	wgn = readl(rb + CT2_WGN_STATUS);</div><div class='del'>-	if (!(wgn &amp; __GLBL_PF_VF_CFG_RDY)) {</div><div class='add'>+</div><div class='add'>+	nfc_ver = readl(rb + CT2_RSC_GPR15_REG);</div><div class='add'>+</div><div class='add'>+	if ((wgn == (__A2T_AHB_LOAD | __WGN_READY)) &amp;&amp;</div><div class='add'>+		(nfc_ver &gt;= CT2_NFC_VER_VALID)) {</div><div class='add'>+		if (bfa_ioc_ct2_nfc_halted(rb))</div><div class='add'>+			bfa_ioc_ct2_nfc_resume(rb);</div><div class='add'>+		writel(__RESET_AND_START_SCLK_LCLK_PLLS,</div><div class='add'>+				rb + CT2_CSI_FW_CTL_SET_REG);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; BFA_IOC_PLL_POLL; i++) {</div><div class='add'>+			r32 = readl(rb + CT2_APP_PLL_LCLK_CTL_REG);</div><div class='add'>+			if (r32 &amp; __RESET_AND_START_SCLK_LCLK_PLLS)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+		BUG_ON(!(r32 &amp; __RESET_AND_START_SCLK_LCLK_PLLS));</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; BFA_IOC_PLL_POLL; i++) {</div><div class='add'>+			r32 = readl(rb + CT2_APP_PLL_LCLK_CTL_REG);</div><div class='add'>+			if (!(r32 &amp; __RESET_AND_START_SCLK_LCLK_PLLS))</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+		BUG_ON(r32 &amp; __RESET_AND_START_SCLK_LCLK_PLLS);</div><div class='add'>+		udelay(1000);</div><div class='add'>+</div><div class='add'>+		r32 = readl(rb + CT2_CSI_FW_CTL_REG);</div><div class='add'>+		BUG_ON(r32 &amp; __RESET_AND_START_SCLK_LCLK_PLLS);</div><div class='add'>+	} else {</div><div class='ctx'> 		writel(__HALT_NFC_CONTROLLER, (rb + CT2_NFC_CSR_SET_REG));</div><div class='ctx'> 		for (i = 0; i &lt; CT2_NFC_MAX_DELAY; i++) {</div><div class='ctx'> 			r32 = readl(rb + CT2_NFC_CSR_SET_REG);</div><div class='hunk'>@@ -821,53 +876,48 @@ bfa_ioc_ct2_pll_init(void __iomem *rb, enum bfi_asic_mode asic_mode)</div><div class='ctx'> 				break;</div><div class='ctx'> 			udelay(1000);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		bfa_ioc_ct2_mac_reset(rb);</div><div class='add'>+		bfa_ioc_ct2_sclk_init(rb);</div><div class='add'>+		bfa_ioc_ct2_lclk_init(rb);</div><div class='add'>+</div><div class='add'>+		/* release soft reset on s_clk &amp; l_clk */</div><div class='add'>+		r32 = readl((rb + CT2_APP_PLL_SCLK_CTL_REG));</div><div class='add'>+		writel(r32 &amp; ~__APP_PLL_SCLK_LOGIC_SOFT_RESET,</div><div class='add'>+				rb + CT2_APP_PLL_SCLK_CTL_REG);</div><div class='add'>+		r32 = readl((rb + CT2_APP_PLL_LCLK_CTL_REG));</div><div class='add'>+		writel(r32 &amp; ~__APP_PLL_LCLK_LOGIC_SOFT_RESET,</div><div class='add'>+				rb + CT2_APP_PLL_LCLK_CTL_REG);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Announce flash device presence, if flash was corrupted. */</div><div class='add'>+	if (wgn == (__WGN_READY | __GLBL_PF_VF_CFG_RDY)) {</div><div class='add'>+		r32 = readl((rb + PSS_GPIO_OUT_REG));</div><div class='add'>+		writel(r32 &amp; ~1, rb + PSS_GPIO_OUT_REG);</div><div class='add'>+		r32 = readl((rb + PSS_GPIO_OE_REG));</div><div class='add'>+		writel(r32 | 1, rb + PSS_GPIO_OE_REG);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Mask the interrupts and clear any</div><div class='ctx'> 	 * pending interrupts left by BIOS/EFI</div><div class='ctx'> 	 */</div><div class='del'>-</div><div class='ctx'> 	writel(1, (rb + CT2_LPU0_HOSTFN_MBOX0_MSK));</div><div class='ctx'> 	writel(1, (rb + CT2_LPU1_HOSTFN_MBOX0_MSK));</div><div class='ctx'> </div><div class='del'>-	r32 = readl((rb + CT2_LPU0_HOSTFN_CMD_STAT));</div><div class='del'>-	if (r32 == 1) {</div><div class='del'>-		writel(1, (rb + CT2_LPU0_HOSTFN_CMD_STAT));</div><div class='del'>-		readl((rb + CT2_LPU0_HOSTFN_CMD_STAT));</div><div class='del'>-	}</div><div class='del'>-	r32 = readl((rb + CT2_LPU1_HOSTFN_CMD_STAT));</div><div class='del'>-	if (r32 == 1) {</div><div class='del'>-		writel(1, (rb + CT2_LPU1_HOSTFN_CMD_STAT));</div><div class='del'>-		readl((rb + CT2_LPU1_HOSTFN_CMD_STAT));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bfa_ioc_ct2_mac_reset(rb);</div><div class='del'>-	bfa_ioc_ct2_sclk_init(rb);</div><div class='del'>-	bfa_ioc_ct2_lclk_init(rb);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * release soft reset on s_clk &amp; l_clk</div><div class='del'>-	 */</div><div class='del'>-	r32 = readl((rb + CT2_APP_PLL_SCLK_CTL_REG));</div><div class='del'>-	writel((r32 &amp; ~__APP_PLL_SCLK_LOGIC_SOFT_RESET),</div><div class='del'>-			(rb + CT2_APP_PLL_SCLK_CTL_REG));</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * release soft reset on s_clk &amp; l_clk</div><div class='del'>-	 */</div><div class='del'>-	r32 = readl((rb + CT2_APP_PLL_LCLK_CTL_REG));</div><div class='del'>-	writel(r32 &amp; ~__APP_PLL_LCLK_LOGIC_SOFT_RESET,</div><div class='del'>-		      (rb + CT2_APP_PLL_LCLK_CTL_REG));</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Announce flash device presence, if flash was corrupted.</div><div class='del'>-	 */</div><div class='del'>-	if (wgn == (__WGN_READY | __GLBL_PF_VF_CFG_RDY)) {</div><div class='del'>-		r32 = readl((rb + PSS_GPIO_OUT_REG));</div><div class='del'>-		writel((r32 &amp; ~1), (rb + PSS_GPIO_OUT_REG));</div><div class='del'>-		r32 = readl((rb + PSS_GPIO_OE_REG));</div><div class='del'>-		writel((r32 | 1), (rb + PSS_GPIO_OE_REG));</div><div class='add'>+	/* For first time initialization, no need to clear interrupts */</div><div class='add'>+	r32 = readl(rb + HOST_SEM5_REG);</div><div class='add'>+	if (r32 &amp; 0x1) {</div><div class='add'>+		r32 = readl((rb + CT2_LPU0_HOSTFN_CMD_STAT));</div><div class='add'>+		if (r32 == 1) {</div><div class='add'>+			writel(1, (rb + CT2_LPU0_HOSTFN_CMD_STAT));</div><div class='add'>+			readl((rb + CT2_LPU0_HOSTFN_CMD_STAT));</div><div class='add'>+		}</div><div class='add'>+		r32 = readl((rb + CT2_LPU1_HOSTFN_CMD_STAT));</div><div class='add'>+		if (r32 == 1) {</div><div class='add'>+			writel(1, (rb + CT2_LPU1_HOSTFN_CMD_STAT));</div><div class='add'>+			readl((rb + CT2_LPU1_HOSTFN_CMD_STAT));</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bfa_ioc_ct2_mem_init(rb);</div><div class='head'>diff --git a/drivers/net/ethernet/brocade/bna/bfi_reg.h b/drivers/net/ethernet/brocade/bna/bfi_reg.h<br/>index efacff3ab51d..0e094fe46dfd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/brocade/bna/bfi_reg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/brocade/bna/bfi_reg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/brocade/bna/bfi_reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/brocade/bna/bfi_reg.h</a></div><div class='hunk'>@@ -339,10 +339,16 @@ enum {</div><div class='ctx'> #define __A2T_AHB_LOAD			0x00000800</div><div class='ctx'> #define __WGN_READY			0x00000400</div><div class='ctx'> #define __GLBL_PF_VF_CFG_RDY		0x00000200</div><div class='add'>+#define CT2_NFC_CSR_CLR_REG             0x00027420</div><div class='ctx'> #define CT2_NFC_CSR_SET_REG		0x00027424</div><div class='ctx'> #define __HALT_NFC_CONTROLLER		0x00000002</div><div class='ctx'> #define __NFC_CONTROLLER_HALTED		0x00001000</div><div class='ctx'> </div><div class='add'>+#define CT2_RSC_GPR15_REG		0x0002765c</div><div class='add'>+#define CT2_CSI_FW_CTL_REG              0x00027080</div><div class='add'>+#define __RESET_AND_START_SCLK_LCLK_PLLS 0x00010000</div><div class='add'>+#define CT2_CSI_FW_CTL_SET_REG          0x00027088</div><div class='add'>+</div><div class='ctx'> #define CT2_CSI_MAC0_CONTROL_REG	0x000270d0</div><div class='ctx'> #define __CSI_MAC_RESET			0x00000010</div><div class='ctx'> #define __CSI_MAC_AHB_RESET		0x00000008</div><div class='head'>diff --git a/drivers/net/ethernet/brocade/bna/bnad.c b/drivers/net/ethernet/brocade/bna/bnad.c<br/>index ff78f770dec9..67cd2ed0306a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/brocade/bna/bnad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/brocade/bna/bnad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/brocade/bna/bnad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/brocade/bna/bnad.c</a></div><div class='hunk'>@@ -80,8 +80,6 @@ do {								\</div><div class='ctx'> 	(sizeof(struct bnad_skb_unmap) * ((_depth) - 1));	\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='del'>-#define BNAD_TXRX_SYNC_MDELAY	250	/* 250 msecs */</div><div class='del'>-</div><div class='ctx'> static void</div><div class='ctx'> bnad_add_to_list(struct bnad *bnad)</div><div class='ctx'> {</div><div class='hunk'>@@ -103,7 +101,7 @@ bnad_remove_from_list(struct bnad *bnad)</div><div class='ctx'>  * Reinitialize completions in CQ, once Rx is taken down</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='del'>-bnad_cq_cmpl_init(struct bnad *bnad, struct bna_ccb *ccb)</div><div class='add'>+bnad_cq_cleanup(struct bnad *bnad, struct bna_ccb *ccb)</div><div class='ctx'> {</div><div class='ctx'> 	struct bna_cq_entry *cmpl, *next_cmpl;</div><div class='ctx'> 	unsigned int wi_range, wis = 0, ccb_prod = 0;</div><div class='hunk'>@@ -141,7 +139,8 @@ bnad_pci_unmap_skb(struct device *pdev, struct bnad_skb_unmap *array,</div><div class='ctx'> </div><div class='ctx'> 	for (j = 0; j &lt; frag; j++) {</div><div class='ctx'> 		dma_unmap_page(pdev, dma_unmap_addr(&amp;array[index], dma_addr),</div><div class='del'>-			  skb_frag_size(&amp;skb_shinfo(skb)-&gt;frags[j]), DMA_TO_DEVICE);</div><div class='add'>+			  skb_frag_size(&amp;skb_shinfo(skb)-&gt;frags[j]),</div><div class='add'>+						DMA_TO_DEVICE);</div><div class='ctx'> 		dma_unmap_addr_set(&amp;array[index], dma_addr, 0);</div><div class='ctx'> 		BNA_QE_INDX_ADD(index, 1, depth);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -155,7 +154,7 @@ bnad_pci_unmap_skb(struct device *pdev, struct bnad_skb_unmap *array,</div><div class='ctx'>  * so DMA unmap &amp; freeing is fine.</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='del'>-bnad_free_all_txbufs(struct bnad *bnad,</div><div class='add'>+bnad_txq_cleanup(struct bnad *bnad,</div><div class='ctx'> 		 struct bna_tcb *tcb)</div><div class='ctx'> {</div><div class='ctx'> 	u32		unmap_cons;</div><div class='hunk'>@@ -183,13 +182,12 @@ bnad_free_all_txbufs(struct bnad *bnad,</div><div class='ctx'> /* Data Path Handlers */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * bnad_free_txbufs : Frees the Tx bufs on Tx completion</div><div class='add'>+ * bnad_txcmpl_process : Frees the Tx bufs on Tx completion</div><div class='ctx'>  * Can be called in a) Interrupt context</div><div class='ctx'>  *		    b) Sending context</div><div class='del'>- *		    c) Tasklet context</div><div class='ctx'>  */</div><div class='ctx'> static u32</div><div class='del'>-bnad_free_txbufs(struct bnad *bnad,</div><div class='add'>+bnad_txcmpl_process(struct bnad *bnad,</div><div class='ctx'> 		 struct bna_tcb *tcb)</div><div class='ctx'> {</div><div class='ctx'> 	u32		unmap_cons, sent_packets = 0, sent_bytes = 0;</div><div class='hunk'>@@ -198,13 +196,7 @@ bnad_free_txbufs(struct bnad *bnad,</div><div class='ctx'> 	struct bnad_skb_unmap *unmap_array;</div><div class='ctx'> 	struct sk_buff		*skb;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Just return if TX is stopped. This check is useful</div><div class='del'>-	 * when bnad_free_txbufs() runs out of a tasklet scheduled</div><div class='del'>-	 * before bnad_cb_tx_cleanup() cleared BNAD_TXQ_TX_STARTED bit</div><div class='del'>-	 * but this routine runs actually after the cleanup has been</div><div class='del'>-	 * executed.</div><div class='del'>-	 */</div><div class='add'>+	/* Just return if TX is stopped */</div><div class='ctx'> 	if (!test_bit(BNAD_TXQ_TX_STARTED, &amp;tcb-&gt;flags))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -243,57 +235,8 @@ bnad_free_txbufs(struct bnad *bnad,</div><div class='ctx'> 	return sent_packets;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Tx Free Tasklet function */</div><div class='del'>-/* Frees for all the tcb's in all the Tx's */</div><div class='del'>-/*</div><div class='del'>- * Scheduled from sending context, so that</div><div class='del'>- * the fat Tx lock is not held for too long</div><div class='del'>- * in the sending context.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-bnad_tx_free_tasklet(unsigned long bnad_ptr)</div><div class='del'>-{</div><div class='del'>-	struct bnad *bnad = (struct bnad *)bnad_ptr;</div><div class='del'>-	struct bna_tcb *tcb;</div><div class='del'>-	u32		acked = 0;</div><div class='del'>-	int			i, j;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; bnad-&gt;num_tx; i++) {</div><div class='del'>-		for (j = 0; j &lt; bnad-&gt;num_txq_per_tx; j++) {</div><div class='del'>-			tcb = bnad-&gt;tx_info[i].tcb[j];</div><div class='del'>-			if (!tcb)</div><div class='del'>-				continue;</div><div class='del'>-			if (((u16) (*tcb-&gt;hw_consumer_index) !=</div><div class='del'>-				tcb-&gt;consumer_index) &amp;&amp;</div><div class='del'>-				(!test_and_set_bit(BNAD_TXQ_FREE_SENT,</div><div class='del'>-						  &amp;tcb-&gt;flags))) {</div><div class='del'>-				acked = bnad_free_txbufs(bnad, tcb);</div><div class='del'>-				if (likely(test_bit(BNAD_TXQ_TX_STARTED,</div><div class='del'>-					&amp;tcb-&gt;flags)))</div><div class='del'>-					bna_ib_ack(tcb-&gt;i_dbell, acked);</div><div class='del'>-				smp_mb__before_clear_bit();</div><div class='del'>-				clear_bit(BNAD_TXQ_FREE_SENT, &amp;tcb-&gt;flags);</div><div class='del'>-			}</div><div class='del'>-			if (unlikely(!test_bit(BNAD_TXQ_TX_STARTED,</div><div class='del'>-						&amp;tcb-&gt;flags)))</div><div class='del'>-				continue;</div><div class='del'>-			if (netif_queue_stopped(bnad-&gt;netdev)) {</div><div class='del'>-				if (acked &amp;&amp; netif_carrier_ok(bnad-&gt;netdev) &amp;&amp;</div><div class='del'>-					BNA_QE_FREE_CNT(tcb, tcb-&gt;q_depth) &gt;=</div><div class='del'>-						BNAD_NETIF_WAKE_THRESHOLD) {</div><div class='del'>-					netif_wake_queue(bnad-&gt;netdev);</div><div class='del'>-					/* TODO */</div><div class='del'>-					/* Counters for individual TxQs? */</div><div class='del'>-					BNAD_UPDATE_CTR(bnad,</div><div class='del'>-						netif_queue_wakeup);</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static u32</div><div class='del'>-bnad_tx(struct bnad *bnad, struct bna_tcb *tcb)</div><div class='add'>+bnad_tx_complete(struct bnad *bnad, struct bna_tcb *tcb)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = bnad-&gt;netdev;</div><div class='ctx'> 	u32 sent = 0;</div><div class='hunk'>@@ -301,7 +244,7 @@ bnad_tx(struct bnad *bnad, struct bna_tcb *tcb)</div><div class='ctx'> 	if (test_and_set_bit(BNAD_TXQ_FREE_SENT, &amp;tcb-&gt;flags))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	sent = bnad_free_txbufs(bnad, tcb);</div><div class='add'>+	sent = bnad_txcmpl_process(bnad, tcb);</div><div class='ctx'> 	if (sent) {</div><div class='ctx'> 		if (netif_queue_stopped(netdev) &amp;&amp;</div><div class='ctx'> 		    netif_carrier_ok(netdev) &amp;&amp;</div><div class='hunk'>@@ -330,13 +273,13 @@ bnad_msix_tx(int irq, void *data)</div><div class='ctx'> 	struct bna_tcb *tcb = (struct bna_tcb *)data;</div><div class='ctx'> 	struct bnad *bnad = tcb-&gt;bnad;</div><div class='ctx'> </div><div class='del'>-	bnad_tx(bnad, tcb);</div><div class='add'>+	bnad_tx_complete(bnad, tcb);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-bnad_reset_rcb(struct bnad *bnad, struct bna_rcb *rcb)</div><div class='add'>+bnad_rcb_cleanup(struct bnad *bnad, struct bna_rcb *rcb)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnad_unmap_q *unmap_q = rcb-&gt;unmap_q;</div><div class='ctx'> </div><div class='hunk'>@@ -348,7 +291,7 @@ bnad_reset_rcb(struct bnad *bnad, struct bna_rcb *rcb)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-bnad_free_all_rxbufs(struct bnad *bnad, struct bna_rcb *rcb)</div><div class='add'>+bnad_rxq_cleanup(struct bnad *bnad, struct bna_rcb *rcb)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnad_unmap_q *unmap_q;</div><div class='ctx'> 	struct bnad_skb_unmap *unmap_array;</div><div class='hunk'>@@ -369,11 +312,11 @@ bnad_free_all_rxbufs(struct bnad *bnad, struct bna_rcb *rcb)</div><div class='ctx'> 				 DMA_FROM_DEVICE);</div><div class='ctx'> 		dev_kfree_skb(skb);</div><div class='ctx'> 	}</div><div class='del'>-	bnad_reset_rcb(bnad, rcb);</div><div class='add'>+	bnad_rcb_cleanup(bnad, rcb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-bnad_alloc_n_post_rxbufs(struct bnad *bnad, struct bna_rcb *rcb)</div><div class='add'>+bnad_rxq_post(struct bnad *bnad, struct bna_rcb *rcb)</div><div class='ctx'> {</div><div class='ctx'> 	u16 to_alloc, alloced, unmap_prod, wi_range;</div><div class='ctx'> 	struct bnad_unmap_q *unmap_q = rcb-&gt;unmap_q;</div><div class='hunk'>@@ -434,14 +377,14 @@ bnad_refill_rxq(struct bnad *bnad, struct bna_rcb *rcb)</div><div class='ctx'> 	if (!test_and_set_bit(BNAD_RXQ_REFILL, &amp;rcb-&gt;flags)) {</div><div class='ctx'> 		if (BNA_QE_FREE_CNT(unmap_q, unmap_q-&gt;q_depth)</div><div class='ctx'> 			 &gt;&gt; BNAD_RXQ_REFILL_THRESHOLD_SHIFT)</div><div class='del'>-			bnad_alloc_n_post_rxbufs(bnad, rcb);</div><div class='add'>+			bnad_rxq_post(bnad, rcb);</div><div class='ctx'> 		smp_mb__before_clear_bit();</div><div class='ctx'> 		clear_bit(BNAD_RXQ_REFILL, &amp;rcb-&gt;flags);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32</div><div class='del'>-bnad_poll_cq(struct bnad *bnad, struct bna_ccb *ccb, int budget)</div><div class='add'>+bnad_cq_process(struct bnad *bnad, struct bna_ccb *ccb, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct bna_cq_entry *cmpl, *next_cmpl;</div><div class='ctx'> 	struct bna_rcb *rcb = NULL;</div><div class='hunk'>@@ -453,12 +396,8 @@ bnad_poll_cq(struct bnad *bnad, struct bna_ccb *ccb, int budget)</div><div class='ctx'> 	struct bna_pkt_rate *pkt_rt = &amp;ccb-&gt;pkt_rate;</div><div class='ctx'> 	struct bnad_rx_ctrl *rx_ctrl = (struct bnad_rx_ctrl *)(ccb-&gt;ctrl);</div><div class='ctx'> </div><div class='del'>-	set_bit(BNAD_FP_IN_RX_PATH, &amp;rx_ctrl-&gt;flags);</div><div class='del'>-</div><div class='del'>-	if (!test_bit(BNAD_RXQ_STARTED, &amp;ccb-&gt;rcb[0]-&gt;flags)) {</div><div class='del'>-		clear_bit(BNAD_FP_IN_RX_PATH, &amp;rx_ctrl-&gt;flags);</div><div class='add'>+	if (!test_bit(BNAD_RXQ_STARTED, &amp;ccb-&gt;rcb[0]-&gt;flags))</div><div class='ctx'> 		return 0;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	prefetch(bnad-&gt;netdev);</div><div class='ctx'> 	BNA_CQ_QPGE_PTR_GET(ccb-&gt;producer_index, ccb-&gt;sw_qpt, cmpl,</div><div class='hunk'>@@ -533,9 +472,8 @@ bnad_poll_cq(struct bnad *bnad, struct bna_ccb *ccb, int budget)</div><div class='ctx'> </div><div class='ctx'> 		if (skb-&gt;ip_summed == CHECKSUM_UNNECESSARY)</div><div class='ctx'> 			napi_gro_receive(&amp;rx_ctrl-&gt;napi, skb);</div><div class='del'>-		else {</div><div class='add'>+		else</div><div class='ctx'> 			netif_receive_skb(skb);</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> next:</div><div class='ctx'> 		cmpl-&gt;valid = 0;</div><div class='hunk'>@@ -646,7 +584,7 @@ bnad_isr(int irq, void *data)</div><div class='ctx'> 		for (j = 0; j &lt; bnad-&gt;num_txq_per_tx; j++) {</div><div class='ctx'> 			tcb = bnad-&gt;tx_info[i].tcb[j];</div><div class='ctx'> 			if (tcb &amp;&amp; test_bit(BNAD_TXQ_TX_STARTED, &amp;tcb-&gt;flags))</div><div class='del'>-				bnad_tx(bnad, bnad-&gt;tx_info[i].tcb[j]);</div><div class='add'>+				bnad_tx_complete(bnad, bnad-&gt;tx_info[i].tcb[j]);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Rx processing */</div><div class='hunk'>@@ -839,20 +777,9 @@ bnad_cb_tcb_destroy(struct bnad *bnad, struct bna_tcb *tcb)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnad_tx_info *tx_info =</div><div class='ctx'> 			(struct bnad_tx_info *)tcb-&gt;txq-&gt;tx-&gt;priv;</div><div class='del'>-	struct bnad_unmap_q *unmap_q = tcb-&gt;unmap_q;</div><div class='del'>-</div><div class='del'>-	while (test_and_set_bit(BNAD_TXQ_FREE_SENT, &amp;tcb-&gt;flags))</div><div class='del'>-		cpu_relax();</div><div class='del'>-</div><div class='del'>-	bnad_free_all_txbufs(bnad, tcb);</div><div class='del'>-</div><div class='del'>-	unmap_q-&gt;producer_index = 0;</div><div class='del'>-	unmap_q-&gt;consumer_index = 0;</div><div class='del'>-</div><div class='del'>-	smp_mb__before_clear_bit();</div><div class='del'>-	clear_bit(BNAD_TXQ_FREE_SENT, &amp;tcb-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	tx_info-&gt;tcb[tcb-&gt;id] = NULL;</div><div class='add'>+	tcb-&gt;priv = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -866,12 +793,6 @@ bnad_cb_rcb_setup(struct bnad *bnad, struct bna_rcb *rcb)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-bnad_cb_rcb_destroy(struct bnad *bnad, struct bna_rcb *rcb)</div><div class='del'>-{</div><div class='del'>-	bnad_free_all_rxbufs(bnad, rcb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='ctx'> bnad_cb_ccb_setup(struct bnad *bnad, struct bna_ccb *ccb)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnad_rx_info *rx_info =</div><div class='hunk'>@@ -916,7 +837,6 @@ bnad_cb_tx_resume(struct bnad *bnad, struct bna_tx *tx)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnad_tx_info *tx_info = (struct bnad_tx_info *)tx-&gt;priv;</div><div class='ctx'> 	struct bna_tcb *tcb;</div><div class='del'>-	struct bnad_unmap_q *unmap_q;</div><div class='ctx'> 	u32 txq_id;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -926,23 +846,9 @@ bnad_cb_tx_resume(struct bnad *bnad, struct bna_tx *tx)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		txq_id = tcb-&gt;id;</div><div class='ctx'> </div><div class='del'>-		unmap_q = tcb-&gt;unmap_q;</div><div class='del'>-</div><div class='del'>-		if (test_bit(BNAD_TXQ_TX_STARTED, &amp;tcb-&gt;flags))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		while (test_and_set_bit(BNAD_TXQ_FREE_SENT, &amp;tcb-&gt;flags))</div><div class='del'>-			cpu_relax();</div><div class='del'>-</div><div class='del'>-		bnad_free_all_txbufs(bnad, tcb);</div><div class='del'>-</div><div class='del'>-		unmap_q-&gt;producer_index = 0;</div><div class='del'>-		unmap_q-&gt;consumer_index = 0;</div><div class='del'>-</div><div class='del'>-		smp_mb__before_clear_bit();</div><div class='del'>-		clear_bit(BNAD_TXQ_FREE_SENT, &amp;tcb-&gt;flags);</div><div class='del'>-</div><div class='add'>+		BUG_ON(test_bit(BNAD_TXQ_TX_STARTED, &amp;tcb-&gt;flags));</div><div class='ctx'> 		set_bit(BNAD_TXQ_TX_STARTED, &amp;tcb-&gt;flags);</div><div class='add'>+		BUG_ON(*(tcb-&gt;hw_consumer_index) != 0);</div><div class='ctx'> </div><div class='ctx'> 		if (netif_carrier_ok(bnad-&gt;netdev)) {</div><div class='ctx'> 			printk(KERN_INFO "bna: %s %d TXQ_STARTED\n",</div><div class='hunk'>@@ -963,6 +869,54 @@ bnad_cb_tx_resume(struct bnad *bnad, struct bna_tx *tx)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Free all TxQs buffers and then notify TX_E_CLEANUP_DONE to Tx fsm.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+bnad_tx_cleanup(struct delayed_work *work)</div><div class='add'>+{</div><div class='add'>+	struct bnad_tx_info *tx_info =</div><div class='add'>+		container_of(work, struct bnad_tx_info, tx_cleanup_work);</div><div class='add'>+	struct bnad *bnad = NULL;</div><div class='add'>+	struct bnad_unmap_q *unmap_q;</div><div class='add'>+	struct bna_tcb *tcb;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	uint32_t i, pending = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BNAD_MAX_TXQ_PER_TX; i++) {</div><div class='add'>+		tcb = tx_info-&gt;tcb[i];</div><div class='add'>+		if (!tcb)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		bnad = tcb-&gt;bnad;</div><div class='add'>+</div><div class='add'>+		if (test_and_set_bit(BNAD_TXQ_FREE_SENT, &amp;tcb-&gt;flags)) {</div><div class='add'>+			pending++;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		bnad_txq_cleanup(bnad, tcb);</div><div class='add'>+</div><div class='add'>+		unmap_q = tcb-&gt;unmap_q;</div><div class='add'>+		unmap_q-&gt;producer_index = 0;</div><div class='add'>+		unmap_q-&gt;consumer_index = 0;</div><div class='add'>+</div><div class='add'>+		smp_mb__before_clear_bit();</div><div class='add'>+		clear_bit(BNAD_TXQ_FREE_SENT, &amp;tcb-&gt;flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pending) {</div><div class='add'>+		queue_delayed_work(bnad-&gt;work_q, &amp;tx_info-&gt;tx_cleanup_work,</div><div class='add'>+			msecs_to_jiffies(1));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;bnad-&gt;bna_lock, flags);</div><div class='add'>+	bna_tx_cleanup_complete(tx_info-&gt;tx);</div><div class='add'>+	spin_unlock_irqrestore(&amp;bnad-&gt;bna_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> bnad_cb_tx_cleanup(struct bnad *bnad, struct bna_tx *tx)</div><div class='ctx'> {</div><div class='hunk'>@@ -976,8 +930,7 @@ bnad_cb_tx_cleanup(struct bnad *bnad, struct bna_tx *tx)</div><div class='ctx'> 			continue;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mdelay(BNAD_TXRX_SYNC_MDELAY);</div><div class='del'>-	bna_tx_cleanup_complete(tx);</div><div class='add'>+	queue_delayed_work(bnad-&gt;work_q, &amp;tx_info-&gt;tx_cleanup_work, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1001,6 +954,44 @@ bnad_cb_rx_stall(struct bnad *bnad, struct bna_rx *rx)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Free all RxQs buffers and then notify RX_E_CLEANUP_DONE to Rx fsm.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+bnad_rx_cleanup(void *work)</div><div class='add'>+{</div><div class='add'>+	struct bnad_rx_info *rx_info =</div><div class='add'>+		container_of(work, struct bnad_rx_info, rx_cleanup_work);</div><div class='add'>+	struct bnad_rx_ctrl *rx_ctrl;</div><div class='add'>+	struct bnad *bnad = NULL;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	uint32_t i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BNAD_MAX_RXP_PER_RX; i++) {</div><div class='add'>+		rx_ctrl = &amp;rx_info-&gt;rx_ctrl[i];</div><div class='add'>+</div><div class='add'>+		if (!rx_ctrl-&gt;ccb)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		bnad = rx_ctrl-&gt;ccb-&gt;bnad;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Wait till the poll handler has exited</div><div class='add'>+		 * and nothing can be scheduled anymore</div><div class='add'>+		 */</div><div class='add'>+		napi_disable(&amp;rx_ctrl-&gt;napi);</div><div class='add'>+</div><div class='add'>+		bnad_cq_cleanup(bnad, rx_ctrl-&gt;ccb);</div><div class='add'>+		bnad_rxq_cleanup(bnad, rx_ctrl-&gt;ccb-&gt;rcb[0]);</div><div class='add'>+		if (rx_ctrl-&gt;ccb-&gt;rcb[1])</div><div class='add'>+			bnad_rxq_cleanup(bnad, rx_ctrl-&gt;ccb-&gt;rcb[1]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;bnad-&gt;bna_lock, flags);</div><div class='add'>+	bna_rx_cleanup_complete(rx_info-&gt;rx);</div><div class='add'>+	spin_unlock_irqrestore(&amp;bnad-&gt;bna_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> bnad_cb_rx_cleanup(struct bnad *bnad, struct bna_rx *rx)</div><div class='ctx'> {</div><div class='hunk'>@@ -1009,8 +1000,6 @@ bnad_cb_rx_cleanup(struct bnad *bnad, struct bna_rx *rx)</div><div class='ctx'> 	struct bnad_rx_ctrl *rx_ctrl;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	mdelay(BNAD_TXRX_SYNC_MDELAY);</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; BNAD_MAX_RXP_PER_RX; i++) {</div><div class='ctx'> 		rx_ctrl = &amp;rx_info-&gt;rx_ctrl[i];</div><div class='ctx'> 		ccb = rx_ctrl-&gt;ccb;</div><div class='hunk'>@@ -1021,12 +1010,9 @@ bnad_cb_rx_cleanup(struct bnad *bnad, struct bna_rx *rx)</div><div class='ctx'> </div><div class='ctx'> 		if (ccb-&gt;rcb[1])</div><div class='ctx'> 			clear_bit(BNAD_RXQ_STARTED, &amp;ccb-&gt;rcb[1]-&gt;flags);</div><div class='del'>-</div><div class='del'>-		while (test_bit(BNAD_FP_IN_RX_PATH, &amp;rx_ctrl-&gt;flags))</div><div class='del'>-			cpu_relax();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bna_rx_cleanup_complete(rx);</div><div class='add'>+	queue_work(bnad-&gt;work_q, &amp;rx_info-&gt;rx_cleanup_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1046,13 +1032,12 @@ bnad_cb_rx_post(struct bnad *bnad, struct bna_rx *rx)</div><div class='ctx'> 		if (!ccb)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		bnad_cq_cmpl_init(bnad, ccb);</div><div class='add'>+		napi_enable(&amp;rx_ctrl-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; BNAD_MAX_RXQ_PER_RXP; j++) {</div><div class='ctx'> 			rcb = ccb-&gt;rcb[j];</div><div class='ctx'> 			if (!rcb)</div><div class='ctx'> 				continue;</div><div class='del'>-			bnad_free_all_rxbufs(bnad, rcb);</div><div class='ctx'> </div><div class='ctx'> 			set_bit(BNAD_RXQ_STARTED, &amp;rcb-&gt;flags);</div><div class='ctx'> 			set_bit(BNAD_RXQ_POST_OK, &amp;rcb-&gt;flags);</div><div class='hunk'>@@ -1063,7 +1048,7 @@ bnad_cb_rx_post(struct bnad *bnad, struct bna_rx *rx)</div><div class='ctx'> 			if (!test_and_set_bit(BNAD_RXQ_REFILL, &amp;rcb-&gt;flags)) {</div><div class='ctx'> 				if (BNA_QE_FREE_CNT(unmap_q, unmap_q-&gt;q_depth)</div><div class='ctx'> 					&gt;&gt; BNAD_RXQ_REFILL_THRESHOLD_SHIFT)</div><div class='del'>-					bnad_alloc_n_post_rxbufs(bnad, rcb);</div><div class='add'>+					bnad_rxq_post(bnad, rcb);</div><div class='ctx'> 					smp_mb__before_clear_bit();</div><div class='ctx'> 				clear_bit(BNAD_RXQ_REFILL, &amp;rcb-&gt;flags);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1687,7 +1672,7 @@ bnad_napi_poll_rx(struct napi_struct *napi, int budget)</div><div class='ctx'> 	if (!netif_carrier_ok(bnad-&gt;netdev))</div><div class='ctx'> 		goto poll_exit;</div><div class='ctx'> </div><div class='del'>-	rcvd = bnad_poll_cq(bnad, rx_ctrl-&gt;ccb, budget);</div><div class='add'>+	rcvd = bnad_cq_process(bnad, rx_ctrl-&gt;ccb, budget);</div><div class='ctx'> 	if (rcvd &gt;= budget)</div><div class='ctx'> 		return rcvd;</div><div class='ctx'> </div><div class='hunk'>@@ -1704,7 +1689,7 @@ poll_exit:</div><div class='ctx'> </div><div class='ctx'> #define BNAD_NAPI_POLL_QUOTA		64</div><div class='ctx'> static void</div><div class='del'>-bnad_napi_init(struct bnad *bnad, u32 rx_id)</div><div class='add'>+bnad_napi_add(struct bnad *bnad, u32 rx_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnad_rx_ctrl *rx_ctrl;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1718,34 +1703,18 @@ bnad_napi_init(struct bnad *bnad, u32 rx_id)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-bnad_napi_enable(struct bnad *bnad, u32 rx_id)</div><div class='del'>-{</div><div class='del'>-	struct bnad_rx_ctrl *rx_ctrl;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Initialize &amp; enable NAPI */</div><div class='del'>-	for (i = 0; i &lt;	bnad-&gt;num_rxp_per_rx; i++) {</div><div class='del'>-		rx_ctrl = &amp;bnad-&gt;rx_info[rx_id].rx_ctrl[i];</div><div class='del'>-</div><div class='del'>-		napi_enable(&amp;rx_ctrl-&gt;napi);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-bnad_napi_disable(struct bnad *bnad, u32 rx_id)</div><div class='add'>+bnad_napi_delete(struct bnad *bnad, u32 rx_id)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* First disable and then clean up */</div><div class='del'>-	for (i = 0; i &lt; bnad-&gt;num_rxp_per_rx; i++) {</div><div class='del'>-		napi_disable(&amp;bnad-&gt;rx_info[rx_id].rx_ctrl[i].napi);</div><div class='add'>+	for (i = 0; i &lt; bnad-&gt;num_rxp_per_rx; i++)</div><div class='ctx'> 		netif_napi_del(&amp;bnad-&gt;rx_info[rx_id].rx_ctrl[i].napi);</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Should be held with conf_lock held */</div><div class='ctx'> void</div><div class='del'>-bnad_cleanup_tx(struct bnad *bnad, u32 tx_id)</div><div class='add'>+bnad_destroy_tx(struct bnad *bnad, u32 tx_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnad_tx_info *tx_info = &amp;bnad-&gt;tx_info[tx_id];</div><div class='ctx'> 	struct bna_res_info *res_info = &amp;bnad-&gt;tx_res_info[tx_id].res_info[0];</div><div class='hunk'>@@ -1764,9 +1733,6 @@ bnad_cleanup_tx(struct bnad *bnad, u32 tx_id)</div><div class='ctx'> 		bnad_tx_msix_unregister(bnad, tx_info,</div><div class='ctx'> 			bnad-&gt;num_txq_per_tx);</div><div class='ctx'> </div><div class='del'>-	if (0 == tx_id)</div><div class='del'>-		tasklet_kill(&amp;bnad-&gt;tx_free_tasklet);</div><div class='del'>-</div><div class='ctx'> 	spin_lock_irqsave(&amp;bnad-&gt;bna_lock, flags);</div><div class='ctx'> 	bna_tx_destroy(tx_info-&gt;tx);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bnad-&gt;bna_lock, flags);</div><div class='hunk'>@@ -1832,6 +1798,9 @@ bnad_setup_tx(struct bnad *bnad, u32 tx_id)</div><div class='ctx'> 		goto err_return;</div><div class='ctx'> 	tx_info-&gt;tx = tx;</div><div class='ctx'> </div><div class='add'>+	INIT_DELAYED_WORK(&amp;tx_info-&gt;tx_cleanup_work,</div><div class='add'>+			(work_func_t)bnad_tx_cleanup);</div><div class='add'>+</div><div class='ctx'> 	/* Register ISR for the Tx object */</div><div class='ctx'> 	if (intr_info-&gt;intr_type == BNA_INTR_T_MSIX) {</div><div class='ctx'> 		err = bnad_tx_msix_register(bnad, tx_info,</div><div class='hunk'>@@ -1896,7 +1865,7 @@ bnad_rx_ctrl_init(struct bnad *bnad, u32 rx_id)</div><div class='ctx'> </div><div class='ctx'> /* Called with mutex_lock(&amp;bnad-&gt;conf_mutex) held */</div><div class='ctx'> void</div><div class='del'>-bnad_cleanup_rx(struct bnad *bnad, u32 rx_id)</div><div class='add'>+bnad_destroy_rx(struct bnad *bnad, u32 rx_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnad_rx_info *rx_info = &amp;bnad-&gt;rx_info[rx_id];</div><div class='ctx'> 	struct bna_rx_config *rx_config = &amp;bnad-&gt;rx_config[rx_id];</div><div class='hunk'>@@ -1928,7 +1897,7 @@ bnad_cleanup_rx(struct bnad *bnad, u32 rx_id)</div><div class='ctx'> 	if (rx_info-&gt;rx_ctrl[0].ccb-&gt;intr_type == BNA_INTR_T_MSIX)</div><div class='ctx'> 		bnad_rx_msix_unregister(bnad, rx_info, rx_config-&gt;num_paths);</div><div class='ctx'> </div><div class='del'>-	bnad_napi_disable(bnad, rx_id);</div><div class='add'>+	bnad_napi_delete(bnad, rx_id);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;bnad-&gt;bna_lock, flags);</div><div class='ctx'> 	bna_rx_destroy(rx_info-&gt;rx);</div><div class='hunk'>@@ -1952,7 +1921,7 @@ bnad_setup_rx(struct bnad *bnad, u32 rx_id)</div><div class='ctx'> 	struct bna_rx_config *rx_config = &amp;bnad-&gt;rx_config[rx_id];</div><div class='ctx'> 	static const struct bna_rx_event_cbfn rx_cbfn = {</div><div class='ctx'> 		.rcb_setup_cbfn = bnad_cb_rcb_setup,</div><div class='del'>-		.rcb_destroy_cbfn = bnad_cb_rcb_destroy,</div><div class='add'>+		.rcb_destroy_cbfn = NULL,</div><div class='ctx'> 		.ccb_setup_cbfn = bnad_cb_ccb_setup,</div><div class='ctx'> 		.ccb_destroy_cbfn = bnad_cb_ccb_destroy,</div><div class='ctx'> 		.rx_stall_cbfn = bnad_cb_rx_stall,</div><div class='hunk'>@@ -1998,11 +1967,14 @@ bnad_setup_rx(struct bnad *bnad, u32 rx_id)</div><div class='ctx'> 	rx_info-&gt;rx = rx;</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bnad-&gt;bna_lock, flags);</div><div class='ctx'> </div><div class='add'>+	INIT_WORK(&amp;rx_info-&gt;rx_cleanup_work,</div><div class='add'>+			(work_func_t)(bnad_rx_cleanup));</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Init NAPI, so that state is set to NAPI_STATE_SCHED,</div><div class='ctx'> 	 * so that IRQ handler cannot schedule NAPI at this point.</div><div class='ctx'> 	 */</div><div class='del'>-	bnad_napi_init(bnad, rx_id);</div><div class='add'>+	bnad_napi_add(bnad, rx_id);</div><div class='ctx'> </div><div class='ctx'> 	/* Register ISR for the Rx object */</div><div class='ctx'> 	if (intr_info-&gt;intr_type == BNA_INTR_T_MSIX) {</div><div class='hunk'>@@ -2028,13 +2000,10 @@ bnad_setup_rx(struct bnad *bnad, u32 rx_id)</div><div class='ctx'> 	bna_rx_enable(rx);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bnad-&gt;bna_lock, flags);</div><div class='ctx'> </div><div class='del'>-	/* Enable scheduling of NAPI */</div><div class='del'>-	bnad_napi_enable(bnad, rx_id);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_return:</div><div class='del'>-	bnad_cleanup_rx(bnad, rx_id);</div><div class='add'>+	bnad_destroy_rx(bnad, rx_id);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2519,7 +2488,7 @@ bnad_open(struct net_device *netdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> cleanup_tx:</div><div class='del'>-	bnad_cleanup_tx(bnad, 0);</div><div class='add'>+	bnad_destroy_tx(bnad, 0);</div><div class='ctx'> </div><div class='ctx'> err_return:</div><div class='ctx'> 	mutex_unlock(&amp;bnad-&gt;conf_mutex);</div><div class='hunk'>@@ -2546,8 +2515,8 @@ bnad_stop(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	wait_for_completion(&amp;bnad-&gt;bnad_completions.enet_comp);</div><div class='ctx'> </div><div class='del'>-	bnad_cleanup_tx(bnad, 0);</div><div class='del'>-	bnad_cleanup_rx(bnad, 0);</div><div class='add'>+	bnad_destroy_tx(bnad, 0);</div><div class='add'>+	bnad_destroy_rx(bnad, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Synchronize mailbox IRQ */</div><div class='ctx'> 	bnad_mbox_irq_sync(bnad);</div><div class='hunk'>@@ -2620,7 +2589,7 @@ bnad_start_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 		if ((u16) (*tcb-&gt;hw_consumer_index) !=</div><div class='ctx'> 		    tcb-&gt;consumer_index &amp;&amp;</div><div class='ctx'> 		    !test_and_set_bit(BNAD_TXQ_FREE_SENT, &amp;tcb-&gt;flags)) {</div><div class='del'>-			acked = bnad_free_txbufs(bnad, tcb);</div><div class='add'>+			acked = bnad_txcmpl_process(bnad, tcb);</div><div class='ctx'> 			if (likely(test_bit(BNAD_TXQ_TX_STARTED, &amp;tcb-&gt;flags)))</div><div class='ctx'> 				bna_ib_ack(tcb-&gt;i_dbell, acked);</div><div class='ctx'> 			smp_mb__before_clear_bit();</div><div class='hunk'>@@ -2843,9 +2812,6 @@ bnad_start_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 	bna_txq_prod_indx_doorbell(tcb);</div><div class='ctx'> 	smp_mb();</div><div class='ctx'> </div><div class='del'>-	if ((u16) (*tcb-&gt;hw_consumer_index) != tcb-&gt;consumer_index)</div><div class='del'>-		tasklet_schedule(&amp;bnad-&gt;tx_free_tasklet);</div><div class='del'>-</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3127,8 +3093,8 @@ bnad_netdev_init(struct bnad *bnad, bool using_dac)</div><div class='ctx'> /*</div><div class='ctx'>  * 1. Initialize the bnad structure</div><div class='ctx'>  * 2. Setup netdev pointer in pci_dev</div><div class='del'>- * 3. Initialze Tx free tasklet</div><div class='del'>- * 4. Initialize no. of TxQ &amp; CQs &amp; MSIX vectors</div><div class='add'>+ * 3. Initialize no. of TxQ &amp; CQs &amp; MSIX vectors</div><div class='add'>+ * 4. Initialize work queue.</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='ctx'> bnad_init(struct bnad *bnad,</div><div class='hunk'>@@ -3171,8 +3137,11 @@ bnad_init(struct bnad *bnad,</div><div class='ctx'> 	bnad-&gt;tx_coalescing_timeo = BFI_TX_COALESCING_TIMEO;</div><div class='ctx'> 	bnad-&gt;rx_coalescing_timeo = BFI_RX_COALESCING_TIMEO;</div><div class='ctx'> </div><div class='del'>-	tasklet_init(&amp;bnad-&gt;tx_free_tasklet, bnad_tx_free_tasklet,</div><div class='del'>-		     (unsigned long)bnad);</div><div class='add'>+	sprintf(bnad-&gt;wq_name, "%s_wq_%d", BNAD_NAME, bnad-&gt;id);</div><div class='add'>+	bnad-&gt;work_q = create_singlethread_workqueue(bnad-&gt;wq_name);</div><div class='add'>+</div><div class='add'>+	if (!bnad-&gt;work_q)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3185,6 +3154,12 @@ bnad_init(struct bnad *bnad,</div><div class='ctx'> static void</div><div class='ctx'> bnad_uninit(struct bnad *bnad)</div><div class='ctx'> {</div><div class='add'>+	if (bnad-&gt;work_q) {</div><div class='add'>+		flush_workqueue(bnad-&gt;work_q);</div><div class='add'>+		destroy_workqueue(bnad-&gt;work_q);</div><div class='add'>+		bnad-&gt;work_q = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (bnad-&gt;bar0)</div><div class='ctx'> 		iounmap(bnad-&gt;bar0);</div><div class='ctx'> 	pci_set_drvdata(bnad-&gt;pcidev, NULL);</div><div class='hunk'>@@ -3304,7 +3279,6 @@ bnad_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize bnad structure</div><div class='ctx'> 	 * Setup relation between pci_dev &amp; netdev</div><div class='del'>-	 * Init Tx free tasklet</div><div class='ctx'> 	 */</div><div class='ctx'> 	err = bnad_init(bnad, pdev, netdev);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -3546,9 +3520,7 @@ static void __exit</div><div class='ctx'> bnad_module_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	pci_unregister_driver(&amp;bnad_pci_driver);</div><div class='del'>-</div><div class='del'>-	if (bfi_fw)</div><div class='del'>-		release_firmware(bfi_fw);</div><div class='add'>+	release_firmware(bfi_fw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(bnad_module_init);</div><div class='head'>diff --git a/drivers/net/ethernet/brocade/bna/bnad.h b/drivers/net/ethernet/brocade/bna/bnad.h<br/>index 55824d92699f..72742be11277 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/brocade/bna/bnad.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/brocade/bna/bnad.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/brocade/bna/bnad.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/brocade/bna/bnad.h</a></div><div class='hunk'>@@ -71,7 +71,7 @@ struct bnad_rx_ctrl {</div><div class='ctx'> #define BNAD_NAME			"bna"</div><div class='ctx'> #define BNAD_NAME_LEN			64</div><div class='ctx'> </div><div class='del'>-#define BNAD_VERSION			"3.0.2.2"</div><div class='add'>+#define BNAD_VERSION			"3.0.23.0"</div><div class='ctx'> </div><div class='ctx'> #define BNAD_MAILBOX_MSIX_INDEX		0</div><div class='ctx'> #define BNAD_MAILBOX_MSIX_VECTORS	1</div><div class='hunk'>@@ -210,6 +210,7 @@ struct bnad_tx_info {</div><div class='ctx'> 	struct bna_tx *tx; /* 1:1 between tx_info &amp; tx */</div><div class='ctx'> 	struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX];</div><div class='ctx'> 	u32 tx_id;</div><div class='add'>+	struct delayed_work tx_cleanup_work;</div><div class='ctx'> } ____cacheline_aligned;</div><div class='ctx'> </div><div class='ctx'> struct bnad_rx_info {</div><div class='hunk'>@@ -217,6 +218,7 @@ struct bnad_rx_info {</div><div class='ctx'> </div><div class='ctx'> 	struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXP_PER_RX];</div><div class='ctx'> 	u32 rx_id;</div><div class='add'>+	struct work_struct rx_cleanup_work;</div><div class='ctx'> } ____cacheline_aligned;</div><div class='ctx'> </div><div class='ctx'> /* Unmap queues for Tx / Rx cleanup */</div><div class='hunk'>@@ -318,7 +320,7 @@ struct bnad {</div><div class='ctx'> 	/* Burnt in MAC address */</div><div class='ctx'> 	mac_t			perm_addr;</div><div class='ctx'> </div><div class='del'>-	struct tasklet_struct	tx_free_tasklet;</div><div class='add'>+	struct workqueue_struct *work_q;</div><div class='ctx'> </div><div class='ctx'> 	/* Statistics */</div><div class='ctx'> 	struct bnad_stats stats;</div><div class='hunk'>@@ -328,6 +330,7 @@ struct bnad {</div><div class='ctx'> 	char			adapter_name[BNAD_NAME_LEN];</div><div class='ctx'> 	char			port_name[BNAD_NAME_LEN];</div><div class='ctx'> 	char			mbox_irq_name[BNAD_NAME_LEN];</div><div class='add'>+	char			wq_name[BNAD_NAME_LEN];</div><div class='ctx'> </div><div class='ctx'> 	/* debugfs specific data */</div><div class='ctx'> 	char	*regdata;</div><div class='hunk'>@@ -370,8 +373,8 @@ extern void bnad_rx_coalescing_timeo_set(struct bnad *bnad);</div><div class='ctx'> </div><div class='ctx'> extern int bnad_setup_rx(struct bnad *bnad, u32 rx_id);</div><div class='ctx'> extern int bnad_setup_tx(struct bnad *bnad, u32 tx_id);</div><div class='del'>-extern void bnad_cleanup_tx(struct bnad *bnad, u32 tx_id);</div><div class='del'>-extern void bnad_cleanup_rx(struct bnad *bnad, u32 rx_id);</div><div class='add'>+extern void bnad_destroy_tx(struct bnad *bnad, u32 tx_id);</div><div class='add'>+extern void bnad_destroy_rx(struct bnad *bnad, u32 rx_id);</div><div class='ctx'> </div><div class='ctx'> /* Timer start/stop protos */</div><div class='ctx'> extern void bnad_dim_timer_start(struct bnad *bnad);</div><div class='head'>diff --git a/drivers/net/ethernet/brocade/bna/bnad_ethtool.c b/drivers/net/ethernet/brocade/bna/bnad_ethtool.c<br/>index ab753d7334a6..40e1e84f4984 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/brocade/bna/bnad_ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/brocade/bna/bnad_ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/brocade/bna/bnad_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/brocade/bna/bnad_ethtool.c</a></div><div class='hunk'>@@ -464,7 +464,7 @@ bnad_set_ringparam(struct net_device *netdev,</div><div class='ctx'> 		for (i = 0; i &lt; bnad-&gt;num_rx; i++) {</div><div class='ctx'> 			if (!bnad-&gt;rx_info[i].rx)</div><div class='ctx'> 				continue;</div><div class='del'>-			bnad_cleanup_rx(bnad, i);</div><div class='add'>+			bnad_destroy_rx(bnad, i);</div><div class='ctx'> 			current_err = bnad_setup_rx(bnad, i);</div><div class='ctx'> 			if (current_err &amp;&amp; !err)</div><div class='ctx'> 				err = current_err;</div><div class='hunk'>@@ -492,7 +492,7 @@ bnad_set_ringparam(struct net_device *netdev,</div><div class='ctx'> 		for (i = 0; i &lt; bnad-&gt;num_tx; i++) {</div><div class='ctx'> 			if (!bnad-&gt;tx_info[i].tx)</div><div class='ctx'> 				continue;</div><div class='del'>-			bnad_cleanup_tx(bnad, i);</div><div class='add'>+			bnad_destroy_tx(bnad, i);</div><div class='ctx'> 			current_err = bnad_setup_tx(bnad, i);</div><div class='ctx'> 			if (current_err &amp;&amp; !err)</div><div class='ctx'> 				err = current_err;</div><div class='hunk'>@@ -539,7 +539,7 @@ bnad_set_pauseparam(struct net_device *netdev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-bnad_get_strings(struct net_device *netdev, u32 stringset, u8 * string)</div><div class='add'>+bnad_get_strings(struct net_device *netdev, u32 stringset, u8 *string)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnad *bnad = netdev_priv(netdev);</div><div class='ctx'> 	int i, j, q_num;</div><div class='head'>diff --git a/drivers/net/ethernet/cadence/at91_ether.c b/drivers/net/ethernet/cadence/at91_ether.c<br/>index 906117016fc4..77884191a8c6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/cadence/at91_ether.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/cadence/at91_ether.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/cadence/at91_ether.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/cadence/at91_ether.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='hunk'>@@ -51,21 +52,17 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Read from a EMAC register.</div><div class='ctx'>  */</div><div class='del'>-static inline unsigned long at91_emac_read(unsigned int reg)</div><div class='add'>+static inline unsigned long at91_emac_read(struct at91_private *lp, unsigned int reg)</div><div class='ctx'> {</div><div class='del'>-	void __iomem *emac_base = (void __iomem *)AT91_VA_BASE_EMAC;</div><div class='del'>-</div><div class='del'>-	return __raw_readl(emac_base + reg);</div><div class='add'>+	return __raw_readl(lp-&gt;emac_base + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Write to a EMAC register.</div><div class='ctx'>  */</div><div class='del'>-static inline void at91_emac_write(unsigned int reg, unsigned long value)</div><div class='add'>+static inline void at91_emac_write(struct at91_private *lp, unsigned int reg, unsigned long value)</div><div class='ctx'> {</div><div class='del'>-	void __iomem *emac_base = (void __iomem *)AT91_VA_BASE_EMAC;</div><div class='del'>-</div><div class='del'>-	__raw_writel(value, emac_base + reg);</div><div class='add'>+	__raw_writel(value, lp-&gt;emac_base + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* ........................... PHY INTERFACE ........................... */</div><div class='hunk'>@@ -75,32 +72,33 @@ static inline void at91_emac_write(unsigned int reg, unsigned long value)</div><div class='ctx'>  * When not called from an interrupt-handler, access to the PHY must be</div><div class='ctx'>  *  protected by a spinlock.</div><div class='ctx'>  */</div><div class='del'>-static void enable_mdi(void)</div><div class='add'>+static void enable_mdi(struct at91_private *lp)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ctl;</div><div class='ctx'> </div><div class='del'>-	ctl = at91_emac_read(AT91_EMAC_CTL);</div><div class='del'>-	at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_MPE);	/* enable management port */</div><div class='add'>+	ctl = at91_emac_read(lp, AT91_EMAC_CTL);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_MPE);	/* enable management port */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Disable the MDIO bit in the MAC control register</div><div class='ctx'>  */</div><div class='del'>-static void disable_mdi(void)</div><div class='add'>+static void disable_mdi(struct at91_private *lp)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ctl;</div><div class='ctx'> </div><div class='del'>-	ctl = at91_emac_read(AT91_EMAC_CTL);</div><div class='del'>-	at91_emac_write(AT91_EMAC_CTL, ctl &amp; ~AT91_EMAC_MPE);	/* disable management port */</div><div class='add'>+	ctl = at91_emac_read(lp, AT91_EMAC_CTL);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_CTL, ctl &amp; ~AT91_EMAC_MPE);	/* disable management port */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Wait until the PHY operation is complete.</div><div class='ctx'>  */</div><div class='del'>-static inline void at91_phy_wait(void) {</div><div class='add'>+static inline void at91_phy_wait(struct at91_private *lp)</div><div class='add'>+{</div><div class='ctx'> 	unsigned long timeout = jiffies + 2;</div><div class='ctx'> </div><div class='del'>-	while (!(at91_emac_read(AT91_EMAC_SR) &amp; AT91_EMAC_SR_IDLE)) {</div><div class='add'>+	while (!(at91_emac_read(lp, AT91_EMAC_SR) &amp; AT91_EMAC_SR_IDLE)) {</div><div class='ctx'> 		if (time_after(jiffies, timeout)) {</div><div class='ctx'> 			printk("at91_ether: MIO timeout\n");</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -113,28 +111,28 @@ static inline void at91_phy_wait(void) {</div><div class='ctx'>  * Write value to the a PHY register</div><div class='ctx'>  * Note: MDI interface is assumed to already have been enabled.</div><div class='ctx'>  */</div><div class='del'>-static void write_phy(unsigned char phy_addr, unsigned char address, unsigned int value)</div><div class='add'>+static void write_phy(struct at91_private *lp, unsigned char phy_addr, unsigned char address, unsigned int value)</div><div class='ctx'> {</div><div class='del'>-	at91_emac_write(AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_W</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_W</div><div class='ctx'> 		| ((phy_addr &amp; 0x1f) &lt;&lt; 23) | (address &lt;&lt; 18) | (value &amp; AT91_EMAC_DATA));</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until IDLE bit in Network Status register is cleared */</div><div class='del'>-	at91_phy_wait();</div><div class='add'>+	at91_phy_wait(lp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Read value stored in a PHY register.</div><div class='ctx'>  * Note: MDI interface is assumed to already have been enabled.</div><div class='ctx'>  */</div><div class='del'>-static void read_phy(unsigned char phy_addr, unsigned char address, unsigned int *value)</div><div class='add'>+static void read_phy(struct at91_private *lp, unsigned char phy_addr, unsigned char address, unsigned int *value)</div><div class='ctx'> {</div><div class='del'>-	at91_emac_write(AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_R</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_R</div><div class='ctx'> 		| ((phy_addr &amp; 0x1f) &lt;&lt; 23) | (address &lt;&lt; 18));</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until IDLE bit in Network Status register is cleared */</div><div class='del'>-	at91_phy_wait();</div><div class='add'>+	at91_phy_wait(lp);</div><div class='ctx'> </div><div class='del'>-	*value = at91_emac_read(AT91_EMAC_MAN) &amp; AT91_EMAC_DATA;</div><div class='add'>+	*value = at91_emac_read(lp, AT91_EMAC_MAN) &amp; AT91_EMAC_DATA;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* ........................... PHY MANAGEMENT .......................... */</div><div class='hunk'>@@ -158,13 +156,13 @@ static void update_linkspeed(struct net_device *dev, int silent)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Link up, or auto-negotiation still in progress */</div><div class='del'>-	read_phy(lp-&gt;phy_address, MII_BMSR, &amp;bmsr);</div><div class='del'>-	read_phy(lp-&gt;phy_address, MII_BMCR, &amp;bmcr);</div><div class='add'>+	read_phy(lp, lp-&gt;phy_address, MII_BMSR, &amp;bmsr);</div><div class='add'>+	read_phy(lp, lp-&gt;phy_address, MII_BMCR, &amp;bmcr);</div><div class='ctx'> 	if (bmcr &amp; BMCR_ANENABLE) {				/* AutoNegotiation is enabled */</div><div class='ctx'> 		if (!(bmsr &amp; BMSR_ANEGCOMPLETE))</div><div class='ctx'> 			return;			/* Do nothing - another interrupt generated when negotiation complete */</div><div class='ctx'> </div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_LPA, &amp;lpa);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_LPA, &amp;lpa);</div><div class='ctx'> 		if ((lpa &amp; LPA_100FULL) || (lpa &amp; LPA_100HALF)) speed = SPEED_100;</div><div class='ctx'> 		else speed = SPEED_10;</div><div class='ctx'> 		if ((lpa &amp; LPA_100FULL) || (lpa &amp; LPA_10FULL)) duplex = DUPLEX_FULL;</div><div class='hunk'>@@ -175,7 +173,7 @@ static void update_linkspeed(struct net_device *dev, int silent)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Update the MAC */</div><div class='del'>-	mac_cfg = at91_emac_read(AT91_EMAC_CFG) &amp; ~(AT91_EMAC_SPD | AT91_EMAC_FD);</div><div class='add'>+	mac_cfg = at91_emac_read(lp, AT91_EMAC_CFG) &amp; ~(AT91_EMAC_SPD | AT91_EMAC_FD);</div><div class='ctx'> 	if (speed == SPEED_100) {</div><div class='ctx'> 		if (duplex == DUPLEX_FULL)		/* 100 Full Duplex */</div><div class='ctx'> 			mac_cfg |= AT91_EMAC_SPD | AT91_EMAC_FD;</div><div class='hunk'>@@ -186,7 +184,7 @@ static void update_linkspeed(struct net_device *dev, int silent)</div><div class='ctx'> 			mac_cfg |= AT91_EMAC_FD;</div><div class='ctx'> 		else {}					/* 10 Half Duplex */</div><div class='ctx'> 	}</div><div class='del'>-	at91_emac_write(AT91_EMAC_CFG, mac_cfg);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_CFG, mac_cfg);</div><div class='ctx'> </div><div class='ctx'> 	if (!silent)</div><div class='ctx'> 		printk(KERN_INFO "%s: Link now %i-%s\n", dev-&gt;name, speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex");</div><div class='hunk'>@@ -207,34 +205,34 @@ static irqreturn_t at91ether_phy_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	 * level-triggering.  We therefore have to check if the PHY actually has</div><div class='ctx'> 	 * an IRQ pending.</div><div class='ctx'> 	 */</div><div class='del'>-	enable_mdi();</div><div class='add'>+	enable_mdi(lp);</div><div class='ctx'> 	if ((lp-&gt;phy_type == MII_DM9161_ID) || (lp-&gt;phy_type == MII_DM9161A_ID)) {</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_DSINTR_REG, &amp;phy);	/* ack interrupt in Davicom PHY */</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_DSINTR_REG, &amp;phy);	/* ack interrupt in Davicom PHY */</div><div class='ctx'> 		if (!(phy &amp; (1 &lt;&lt; 0)))</div><div class='ctx'> 			goto done;</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_LXT971A_ID) {</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_ISINTS_REG, &amp;phy);	/* ack interrupt in Intel PHY */</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_ISINTS_REG, &amp;phy);	/* ack interrupt in Intel PHY */</div><div class='ctx'> 		if (!(phy &amp; (1 &lt;&lt; 2)))</div><div class='ctx'> 			goto done;</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_BCM5221_ID) {</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_BCMINTR_REG, &amp;phy);	/* ack interrupt in Broadcom PHY */</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_BCMINTR_REG, &amp;phy);	/* ack interrupt in Broadcom PHY */</div><div class='ctx'> 		if (!(phy &amp; (1 &lt;&lt; 0)))</div><div class='ctx'> 			goto done;</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_KS8721_ID) {</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_TPISTATUS, &amp;phy);		/* ack interrupt in Micrel PHY */</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_TPISTATUS, &amp;phy);		/* ack interrupt in Micrel PHY */</div><div class='ctx'> 		if (!(phy &amp; ((1 &lt;&lt; 2) | 1)))</div><div class='ctx'> 			goto done;</div><div class='ctx'> 	}</div><div class='del'>-	else if (lp-&gt;phy_type == MII_T78Q21x3_ID) {			/* ack interrupt in Teridian PHY */</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_T78Q21INT_REG, &amp;phy);</div><div class='add'>+	else if (lp-&gt;phy_type == MII_T78Q21x3_ID) {					/* ack interrupt in Teridian PHY */</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_T78Q21INT_REG, &amp;phy);</div><div class='ctx'> 		if (!(phy &amp; ((1 &lt;&lt; 2) | 1)))</div><div class='ctx'> 			goto done;</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_DP83848_ID) {</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_DPPHYSTS_REG, &amp;phy);	/* ack interrupt in DP83848 PHY */</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_DPPHYSTS_REG, &amp;phy);	/* ack interrupt in DP83848 PHY */</div><div class='ctx'> 		if (!(phy &amp; (1 &lt;&lt; 7)))</div><div class='ctx'> 			goto done;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -242,7 +240,7 @@ static irqreturn_t at91ether_phy_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	update_linkspeed(dev, 0);</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='del'>-	disable_mdi();</div><div class='add'>+	disable_mdi(lp);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -265,7 +263,7 @@ static void enable_phyirq(struct net_device *dev)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq_number = lp-&gt;board_data.phy_irq_pin;</div><div class='add'>+	irq_number = gpio_to_irq(lp-&gt;board_data.phy_irq_pin);</div><div class='ctx'> 	status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev-&gt;name, dev);</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status);</div><div class='hunk'>@@ -273,41 +271,41 @@ static void enable_phyirq(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	enable_mdi();</div><div class='add'>+	enable_mdi(lp);</div><div class='ctx'> </div><div class='ctx'> 	if ((lp-&gt;phy_type == MII_DM9161_ID) || (lp-&gt;phy_type == MII_DM9161A_ID)) {	/* for Davicom PHY */</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_DSINTR_REG, &amp;dsintr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_DSINTR_REG, &amp;dsintr);</div><div class='ctx'> 		dsintr = dsintr &amp; ~0xf00;		/* clear bits 8..11 */</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_DSINTR_REG, dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_DSINTR_REG, dsintr);</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_LXT971A_ID) {	/* for Intel PHY */</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_ISINTE_REG, &amp;dsintr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_ISINTE_REG, &amp;dsintr);</div><div class='ctx'> 		dsintr = dsintr | 0xf2;			/* set bits 1, 4..7 */</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_ISINTE_REG, dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_ISINTE_REG, dsintr);</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_BCM5221_ID) {	/* for Broadcom PHY */</div><div class='ctx'> 		dsintr = (1 &lt;&lt; 15) | ( 1 &lt;&lt; 14);</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_BCMINTR_REG, dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_BCMINTR_REG, dsintr);</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_KS8721_ID) {	/* for Micrel PHY */</div><div class='ctx'> 		dsintr = (1 &lt;&lt; 10) | ( 1 &lt;&lt; 8);</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_TPISTATUS, dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_TPISTATUS, dsintr);</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_T78Q21x3_ID) {	/* for Teridian PHY */</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_T78Q21INT_REG, &amp;dsintr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_T78Q21INT_REG, &amp;dsintr);</div><div class='ctx'> 		dsintr = dsintr | 0x500;		/* set bits 8, 10 */</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_T78Q21INT_REG, dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_T78Q21INT_REG, dsintr);</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_DP83848_ID) {	/* National Semiconductor DP83848 PHY */</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_DPMISR_REG, &amp;dsintr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_DPMISR_REG, &amp;dsintr);</div><div class='ctx'> 		dsintr = dsintr | 0x3c;			/* set bits 2..5 */</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_DPMISR_REG, dsintr);</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_DPMICR_REG, &amp;dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_DPMISR_REG, dsintr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_DPMICR_REG, &amp;dsintr);</div><div class='ctx'> 		dsintr = dsintr | 0x3;			/* set bits 0,1 */</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_DPMICR_REG, dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_DPMICR_REG, dsintr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	disable_mdi();</div><div class='add'>+	disable_mdi(lp);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -326,46 +324,46 @@ static void disable_phyirq(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	enable_mdi();</div><div class='add'>+	enable_mdi(lp);</div><div class='ctx'> </div><div class='ctx'> 	if ((lp-&gt;phy_type == MII_DM9161_ID) || (lp-&gt;phy_type == MII_DM9161A_ID)) {	/* for Davicom PHY */</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_DSINTR_REG, &amp;dsintr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_DSINTR_REG, &amp;dsintr);</div><div class='ctx'> 		dsintr = dsintr | 0xf00;			/* set bits 8..11 */</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_DSINTR_REG, dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_DSINTR_REG, dsintr);</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_LXT971A_ID) {	/* for Intel PHY */</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_ISINTE_REG, &amp;dsintr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_ISINTE_REG, &amp;dsintr);</div><div class='ctx'> 		dsintr = dsintr &amp; ~0xf2;			/* clear bits 1, 4..7 */</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_ISINTE_REG, dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_ISINTE_REG, dsintr);</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_BCM5221_ID) {	/* for Broadcom PHY */</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_BCMINTR_REG, &amp;dsintr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_BCMINTR_REG, &amp;dsintr);</div><div class='ctx'> 		dsintr = ~(1 &lt;&lt; 14);</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_BCMINTR_REG, dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_BCMINTR_REG, dsintr);</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_KS8721_ID) {	/* for Micrel PHY */</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_TPISTATUS, &amp;dsintr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_TPISTATUS, &amp;dsintr);</div><div class='ctx'> 		dsintr = ~((1 &lt;&lt; 10) | (1 &lt;&lt; 8));</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_TPISTATUS, dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_TPISTATUS, dsintr);</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_T78Q21x3_ID) {	/* for Teridian PHY */</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_T78Q21INT_REG, &amp;dsintr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_T78Q21INT_REG, &amp;dsintr);</div><div class='ctx'> 		dsintr = dsintr &amp; ~0x500;			/* clear bits 8, 10 */</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_T78Q21INT_REG, dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_T78Q21INT_REG, dsintr);</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (lp-&gt;phy_type == MII_DP83848_ID) {	/* National Semiconductor DP83848 PHY */</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_DPMICR_REG, &amp;dsintr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_DPMICR_REG, &amp;dsintr);</div><div class='ctx'> 		dsintr = dsintr &amp; ~0x3;				/* clear bits 0, 1 */</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_DPMICR_REG, dsintr);</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_DPMISR_REG, &amp;dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_DPMICR_REG, dsintr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_DPMISR_REG, &amp;dsintr);</div><div class='ctx'> 		dsintr = dsintr &amp; ~0x3c;			/* clear bits 2..5 */</div><div class='del'>-		write_phy(lp-&gt;phy_address, MII_DPMISR_REG, dsintr);</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_DPMISR_REG, dsintr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	disable_mdi();</div><div class='add'>+	disable_mdi(lp);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	irq_number = lp-&gt;board_data.phy_irq_pin;</div><div class='add'>+	irq_number = gpio_to_irq(lp-&gt;board_data.phy_irq_pin);</div><div class='ctx'> 	free_irq(irq_number, dev);			/* Free interrupt handler */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -379,17 +377,17 @@ static void reset_phy(struct net_device *dev)</div><div class='ctx'> 	unsigned int bmcr;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	enable_mdi();</div><div class='add'>+	enable_mdi(lp);</div><div class='ctx'> </div><div class='ctx'> 	/* Perform PHY reset */</div><div class='del'>-	write_phy(lp-&gt;phy_address, MII_BMCR, BMCR_RESET);</div><div class='add'>+	write_phy(lp, lp-&gt;phy_address, MII_BMCR, BMCR_RESET);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until PHY reset is complete */</div><div class='ctx'> 	do {</div><div class='del'>-		read_phy(lp-&gt;phy_address, MII_BMCR, &amp;bmcr);</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_BMCR, &amp;bmcr);</div><div class='ctx'> 	} while (!(bmcr &amp; BMCR_RESET));</div><div class='ctx'> </div><div class='del'>-	disable_mdi();</div><div class='add'>+	disable_mdi(lp);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -399,13 +397,37 @@ static void at91ether_check_link(unsigned long dev_id)</div><div class='ctx'> 	struct net_device *dev = (struct net_device *) dev_id;</div><div class='ctx'> 	struct at91_private *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	enable_mdi();</div><div class='add'>+	enable_mdi(lp);</div><div class='ctx'> 	update_linkspeed(dev, 1);</div><div class='del'>-	disable_mdi();</div><div class='add'>+	disable_mdi(lp);</div><div class='ctx'> </div><div class='ctx'> 	mod_timer(&amp;lp-&gt;check_timer, jiffies + LINK_POLL_INTERVAL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Perform any PHY-specific initialization.</div><div class='add'>+ */</div><div class='add'>+static void __init initialize_phy(struct at91_private *lp)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='add'>+	enable_mdi(lp);</div><div class='add'>+</div><div class='add'>+	if ((lp-&gt;phy_type == MII_DM9161_ID) || (lp-&gt;phy_type == MII_DM9161A_ID)) {</div><div class='add'>+		read_phy(lp, lp-&gt;phy_address, MII_DSCR_REG, &amp;val);</div><div class='add'>+		if ((val &amp; (1 &lt;&lt; 10)) == 0)			/* DSCR bit 10 is 0 -- fiber mode */</div><div class='add'>+			lp-&gt;phy_media = PORT_FIBRE;</div><div class='add'>+	} else if (machine_is_csb337()) {</div><div class='add'>+		/* mix link activity status into LED2 link state */</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_LEDCTRL_REG, 0x0d22);</div><div class='add'>+	} else if (machine_is_ecbat91())</div><div class='add'>+		write_phy(lp, lp-&gt;phy_address, MII_LEDCTRL_REG, 0x156A);</div><div class='add'>+</div><div class='add'>+	disable_mdi(lp);</div><div class='add'>+	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* ......................... ADDRESS MANAGEMENT ........................ */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -454,17 +476,19 @@ static short __init unpack_mac_address(struct net_device *dev, unsigned int hi,</div><div class='ctx'>  */</div><div class='ctx'> static void __init get_mac_address(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct at91_private *lp = netdev_priv(dev);</div><div class='add'>+</div><div class='ctx'> 	/* Check Specific-Address 1 */</div><div class='del'>-	if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA1H), at91_emac_read(AT91_EMAC_SA1L)))</div><div class='add'>+	if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA1H), at91_emac_read(lp, AT91_EMAC_SA1L)))</div><div class='ctx'> 		return;</div><div class='ctx'> 	/* Check Specific-Address 2 */</div><div class='del'>-	if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA2H), at91_emac_read(AT91_EMAC_SA2L)))</div><div class='add'>+	if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA2H), at91_emac_read(lp, AT91_EMAC_SA2L)))</div><div class='ctx'> 		return;</div><div class='ctx'> 	/* Check Specific-Address 3 */</div><div class='del'>-	if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA3H), at91_emac_read(AT91_EMAC_SA3L)))</div><div class='add'>+	if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA3H), at91_emac_read(lp, AT91_EMAC_SA3L)))</div><div class='ctx'> 		return;</div><div class='ctx'> 	/* Check Specific-Address 4 */</div><div class='del'>-	if (unpack_mac_address(dev, at91_emac_read(AT91_EMAC_SA4H), at91_emac_read(AT91_EMAC_SA4L)))</div><div class='add'>+	if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA4H), at91_emac_read(lp, AT91_EMAC_SA4L)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_ERR "at91_ether: Your bootloader did not configure a MAC address.\n");</div><div class='hunk'>@@ -475,11 +499,13 @@ static void __init get_mac_address(struct net_device *dev)</div><div class='ctx'>  */</div><div class='ctx'> static void update_mac_address(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	at91_emac_write(AT91_EMAC_SA1L, (dev-&gt;dev_addr[3] &lt;&lt; 24) | (dev-&gt;dev_addr[2] &lt;&lt; 16) | (dev-&gt;dev_addr[1] &lt;&lt; 8) | (dev-&gt;dev_addr[0]));</div><div class='del'>-	at91_emac_write(AT91_EMAC_SA1H, (dev-&gt;dev_addr[5] &lt;&lt; 8) | (dev-&gt;dev_addr[4]));</div><div class='add'>+	struct at91_private *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	at91_emac_write(AT91_EMAC_SA2L, 0);</div><div class='del'>-	at91_emac_write(AT91_EMAC_SA2H, 0);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_SA1L, (dev-&gt;dev_addr[3] &lt;&lt; 24) | (dev-&gt;dev_addr[2] &lt;&lt; 16) | (dev-&gt;dev_addr[1] &lt;&lt; 8) | (dev-&gt;dev_addr[0]));</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_SA1H, (dev-&gt;dev_addr[5] &lt;&lt; 8) | (dev-&gt;dev_addr[4]));</div><div class='add'>+</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_SA2L, 0);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_SA2H, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -559,6 +585,7 @@ static int hash_get_index(__u8 *addr)</div><div class='ctx'>  */</div><div class='ctx'> static void at91ether_sethashtable(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct at91_private *lp = netdev_priv(dev);</div><div class='ctx'> 	struct netdev_hw_addr *ha;</div><div class='ctx'> 	unsigned long mc_filter[2];</div><div class='ctx'> 	unsigned int bitnr;</div><div class='hunk'>@@ -570,8 +597,8 @@ static void at91ether_sethashtable(struct net_device *dev)</div><div class='ctx'> 		mc_filter[bitnr &gt;&gt; 5] |= 1 &lt;&lt; (bitnr &amp; 31);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	at91_emac_write(AT91_EMAC_HSL, mc_filter[0]);</div><div class='del'>-	at91_emac_write(AT91_EMAC_HSH, mc_filter[1]);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_HSL, mc_filter[0]);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_HSH, mc_filter[1]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -579,9 +606,10 @@ static void at91ether_sethashtable(struct net_device *dev)</div><div class='ctx'>  */</div><div class='ctx'> static void at91ether_set_multicast_list(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct at91_private *lp = netdev_priv(dev);</div><div class='ctx'> 	unsigned long cfg;</div><div class='ctx'> </div><div class='del'>-	cfg = at91_emac_read(AT91_EMAC_CFG);</div><div class='add'>+	cfg = at91_emac_read(lp, AT91_EMAC_CFG);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;flags &amp; IFF_PROMISC)			/* Enable promiscuous mode */</div><div class='ctx'> 		cfg |= AT91_EMAC_CAF;</div><div class='hunk'>@@ -589,34 +617,37 @@ static void at91ether_set_multicast_list(struct net_device *dev)</div><div class='ctx'> 		cfg &amp;= ~AT91_EMAC_CAF;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;flags &amp; IFF_ALLMULTI) {		/* Enable all multicast mode */</div><div class='del'>-		at91_emac_write(AT91_EMAC_HSH, -1);</div><div class='del'>-		at91_emac_write(AT91_EMAC_HSL, -1);</div><div class='add'>+		at91_emac_write(lp, AT91_EMAC_HSH, -1);</div><div class='add'>+		at91_emac_write(lp, AT91_EMAC_HSL, -1);</div><div class='ctx'> 		cfg |= AT91_EMAC_MTI;</div><div class='ctx'> 	} else if (!netdev_mc_empty(dev)) { /* Enable specific multicasts */</div><div class='ctx'> 		at91ether_sethashtable(dev);</div><div class='ctx'> 		cfg |= AT91_EMAC_MTI;</div><div class='ctx'> 	} else if (dev-&gt;flags &amp; (~IFF_ALLMULTI)) {	/* Disable all multicast mode */</div><div class='del'>-		at91_emac_write(AT91_EMAC_HSH, 0);</div><div class='del'>-		at91_emac_write(AT91_EMAC_HSL, 0);</div><div class='add'>+		at91_emac_write(lp, AT91_EMAC_HSH, 0);</div><div class='add'>+		at91_emac_write(lp, AT91_EMAC_HSL, 0);</div><div class='ctx'> 		cfg &amp;= ~AT91_EMAC_MTI;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	at91_emac_write(AT91_EMAC_CFG, cfg);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_CFG, cfg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* ......................... ETHTOOL SUPPORT ........................... */</div><div class='ctx'> </div><div class='ctx'> static int mdio_read(struct net_device *dev, int phy_id, int location)</div><div class='ctx'> {</div><div class='add'>+	struct at91_private *lp = netdev_priv(dev);</div><div class='ctx'> 	unsigned int value;</div><div class='ctx'> </div><div class='del'>-	read_phy(phy_id, location, &amp;value);</div><div class='add'>+	read_phy(lp, phy_id, location, &amp;value);</div><div class='ctx'> 	return value;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mdio_write(struct net_device *dev, int phy_id, int location, int value)</div><div class='ctx'> {</div><div class='del'>-	write_phy(phy_id, location, value);</div><div class='add'>+	struct at91_private *lp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	write_phy(lp, phy_id, location, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int at91ether_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='hunk'>@@ -625,11 +656,11 @@ static int at91ether_get_settings(struct net_device *dev, struct ethtool_cmd *cm</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	enable_mdi();</div><div class='add'>+	enable_mdi(lp);</div><div class='ctx'> </div><div class='ctx'> 	ret = mii_ethtool_gset(&amp;lp-&gt;mii, cmd);</div><div class='ctx'> </div><div class='del'>-	disable_mdi();</div><div class='add'>+	disable_mdi(lp);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (lp-&gt;phy_media == PORT_FIBRE) {		/* override media type since mii.c doesn't know */</div><div class='hunk'>@@ -646,11 +677,11 @@ static int at91ether_set_settings(struct net_device *dev, struct ethtool_cmd *cm</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	enable_mdi();</div><div class='add'>+	enable_mdi(lp);</div><div class='ctx'> </div><div class='ctx'> 	ret = mii_ethtool_sset(&amp;lp-&gt;mii, cmd);</div><div class='ctx'> </div><div class='del'>-	disable_mdi();</div><div class='add'>+	disable_mdi(lp);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -662,11 +693,11 @@ static int at91ether_nwayreset(struct net_device *dev)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	enable_mdi();</div><div class='add'>+	enable_mdi(lp);</div><div class='ctx'> </div><div class='ctx'> 	ret = mii_nway_restart(&amp;lp-&gt;mii);</div><div class='ctx'> </div><div class='del'>-	disable_mdi();</div><div class='add'>+	disable_mdi(lp);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -696,9 +727,9 @@ static int at91ether_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	enable_mdi();</div><div class='add'>+	enable_mdi(lp);</div><div class='ctx'> 	res = generic_mii_ioctl(&amp;lp-&gt;mii, if_mii(rq), cmd, NULL);</div><div class='del'>-	disable_mdi();</div><div class='add'>+	disable_mdi(lp);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return res;</div><div class='hunk'>@@ -731,11 +762,11 @@ static void at91ether_start(struct net_device *dev)</div><div class='ctx'> 	lp-&gt;rxBuffIndex = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Program address of descriptor list in Rx Buffer Queue register */</div><div class='del'>-	at91_emac_write(AT91_EMAC_RBQP, (unsigned long) dlist_phys);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_RBQP, (unsigned long) dlist_phys);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable Receive and Transmit */</div><div class='del'>-	ctl = at91_emac_read(AT91_EMAC_CTL);</div><div class='del'>-	at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_RE | AT91_EMAC_TE);</div><div class='add'>+	ctl = at91_emac_read(lp, AT91_EMAC_CTL);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_RE | AT91_EMAC_TE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -752,8 +783,8 @@ static int at91ether_open(struct net_device *dev)</div><div class='ctx'> 	clk_enable(lp-&gt;ether_clk);		/* Re-enable Peripheral clock */</div><div class='ctx'> </div><div class='ctx'> 	/* Clear internal statistics */</div><div class='del'>-	ctl = at91_emac_read(AT91_EMAC_CTL);</div><div class='del'>-	at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_CSR);</div><div class='add'>+	ctl = at91_emac_read(lp, AT91_EMAC_CTL);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_CSR);</div><div class='ctx'> </div><div class='ctx'> 	/* Update the MAC address (incase user has changed it) */</div><div class='ctx'> 	update_mac_address(dev);</div><div class='hunk'>@@ -762,15 +793,15 @@ static int at91ether_open(struct net_device *dev)</div><div class='ctx'> 	enable_phyirq(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable MAC interrupts */</div><div class='del'>-	at91_emac_write(AT91_EMAC_IER, AT91_EMAC_RCOM | AT91_EMAC_RBNA</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_IER, AT91_EMAC_RCOM | AT91_EMAC_RBNA</div><div class='ctx'> 				| AT91_EMAC_TUND | AT91_EMAC_RTRY | AT91_EMAC_TCOM</div><div class='ctx'> 				| AT91_EMAC_ROVR | AT91_EMAC_ABT);</div><div class='ctx'> </div><div class='ctx'> 	/* Determine current link speed */</div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	enable_mdi();</div><div class='add'>+	enable_mdi(lp);</div><div class='ctx'> 	update_linkspeed(dev, 0);</div><div class='del'>-	disable_mdi();</div><div class='add'>+	disable_mdi(lp);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	at91ether_start(dev);</div><div class='hunk'>@@ -787,14 +818,14 @@ static int at91ether_close(struct net_device *dev)</div><div class='ctx'> 	unsigned long ctl;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable Receiver and Transmitter */</div><div class='del'>-	ctl = at91_emac_read(AT91_EMAC_CTL);</div><div class='del'>-	at91_emac_write(AT91_EMAC_CTL, ctl &amp; ~(AT91_EMAC_TE | AT91_EMAC_RE));</div><div class='add'>+	ctl = at91_emac_read(lp, AT91_EMAC_CTL);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_CTL, ctl &amp; ~(AT91_EMAC_TE | AT91_EMAC_RE));</div><div class='ctx'> </div><div class='ctx'> 	/* Disable PHY interrupt */</div><div class='ctx'> 	disable_phyirq(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable MAC interrupts */</div><div class='del'>-	at91_emac_write(AT91_EMAC_IDR, AT91_EMAC_RCOM | AT91_EMAC_RBNA</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_IDR, AT91_EMAC_RCOM | AT91_EMAC_RBNA</div><div class='ctx'> 				| AT91_EMAC_TUND | AT91_EMAC_RTRY | AT91_EMAC_TCOM</div><div class='ctx'> 				| AT91_EMAC_ROVR | AT91_EMAC_ABT);</div><div class='ctx'> </div><div class='hunk'>@@ -812,7 +843,7 @@ static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct at91_private *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (at91_emac_read(AT91_EMAC_TSR) &amp; AT91_EMAC_TSR_BNQ) {</div><div class='add'>+	if (at91_emac_read(lp, AT91_EMAC_TSR) &amp; AT91_EMAC_TSR_BNQ) {</div><div class='ctx'> 		netif_stop_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 		/* Store packet information (to free when Tx completed) */</div><div class='hunk'>@@ -822,9 +853,9 @@ static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		dev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 		/* Set address of the data in the Transmit Address register */</div><div class='del'>-		at91_emac_write(AT91_EMAC_TAR, lp-&gt;skb_physaddr);</div><div class='add'>+		at91_emac_write(lp, AT91_EMAC_TAR, lp-&gt;skb_physaddr);</div><div class='ctx'> 		/* Set length of the packet in the Transmit Control register */</div><div class='del'>-		at91_emac_write(AT91_EMAC_TCR, skb-&gt;len);</div><div class='add'>+		at91_emac_write(lp, AT91_EMAC_TCR, skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='ctx'> 		printk(KERN_ERR "at91_ether.c: at91ether_start_xmit() called, but device is busy!\n");</div><div class='hunk'>@@ -841,31 +872,32 @@ static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'>  */</div><div class='ctx'> static struct net_device_stats *at91ether_stats(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct at91_private *lp = netdev_priv(dev);</div><div class='ctx'> 	int ale, lenerr, seqe, lcol, ecol;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='del'>-		dev-&gt;stats.rx_packets += at91_emac_read(AT91_EMAC_OK);		/* Good frames received */</div><div class='del'>-		ale = at91_emac_read(AT91_EMAC_ALE);</div><div class='add'>+		dev-&gt;stats.rx_packets += at91_emac_read(lp, AT91_EMAC_OK);	/* Good frames received */</div><div class='add'>+		ale = at91_emac_read(lp, AT91_EMAC_ALE);</div><div class='ctx'> 		dev-&gt;stats.rx_frame_errors += ale;				/* Alignment errors */</div><div class='del'>-		lenerr = at91_emac_read(AT91_EMAC_ELR) + at91_emac_read(AT91_EMAC_USF);</div><div class='add'>+		lenerr = at91_emac_read(lp, AT91_EMAC_ELR) + at91_emac_read(lp, AT91_EMAC_USF);</div><div class='ctx'> 		dev-&gt;stats.rx_length_errors += lenerr;				/* Excessive Length or Undersize Frame error */</div><div class='del'>-		seqe = at91_emac_read(AT91_EMAC_SEQE);</div><div class='add'>+		seqe = at91_emac_read(lp, AT91_EMAC_SEQE);</div><div class='ctx'> 		dev-&gt;stats.rx_crc_errors += seqe;				/* CRC error */</div><div class='del'>-		dev-&gt;stats.rx_fifo_errors += at91_emac_read(AT91_EMAC_DRFC);	/* Receive buffer not available */</div><div class='add'>+		dev-&gt;stats.rx_fifo_errors += at91_emac_read(lp, AT91_EMAC_DRFC);/* Receive buffer not available */</div><div class='ctx'> 		dev-&gt;stats.rx_errors += (ale + lenerr + seqe</div><div class='del'>-			+ at91_emac_read(AT91_EMAC_CDE) + at91_emac_read(AT91_EMAC_RJB));</div><div class='add'>+			+ at91_emac_read(lp, AT91_EMAC_CDE) + at91_emac_read(lp, AT91_EMAC_RJB));</div><div class='ctx'> </div><div class='del'>-		dev-&gt;stats.tx_packets += at91_emac_read(AT91_EMAC_FRA);		/* Frames successfully transmitted */</div><div class='del'>-		dev-&gt;stats.tx_fifo_errors += at91_emac_read(AT91_EMAC_TUE);	/* Transmit FIFO underruns */</div><div class='del'>-		dev-&gt;stats.tx_carrier_errors += at91_emac_read(AT91_EMAC_CSE);	/* Carrier Sense errors */</div><div class='del'>-		dev-&gt;stats.tx_heartbeat_errors += at91_emac_read(AT91_EMAC_SQEE);/* Heartbeat error */</div><div class='add'>+		dev-&gt;stats.tx_packets += at91_emac_read(lp, AT91_EMAC_FRA);	/* Frames successfully transmitted */</div><div class='add'>+		dev-&gt;stats.tx_fifo_errors += at91_emac_read(lp, AT91_EMAC_TUE);	/* Transmit FIFO underruns */</div><div class='add'>+		dev-&gt;stats.tx_carrier_errors += at91_emac_read(lp, AT91_EMAC_CSE);	/* Carrier Sense errors */</div><div class='add'>+		dev-&gt;stats.tx_heartbeat_errors += at91_emac_read(lp, AT91_EMAC_SQEE);/* Heartbeat error */</div><div class='ctx'> </div><div class='del'>-		lcol = at91_emac_read(AT91_EMAC_LCOL);</div><div class='del'>-		ecol = at91_emac_read(AT91_EMAC_ECOL);</div><div class='add'>+		lcol = at91_emac_read(lp, AT91_EMAC_LCOL);</div><div class='add'>+		ecol = at91_emac_read(lp, AT91_EMAC_ECOL);</div><div class='ctx'> 		dev-&gt;stats.tx_window_errors += lcol;			/* Late collisions */</div><div class='ctx'> 		dev-&gt;stats.tx_aborted_errors += ecol;			/* 16 collisions */</div><div class='ctx'> </div><div class='del'>-		dev-&gt;stats.collisions += (at91_emac_read(AT91_EMAC_SCOL) + at91_emac_read(AT91_EMAC_MCOL) + lcol + ecol);</div><div class='add'>+		dev-&gt;stats.collisions += (at91_emac_read(lp, AT91_EMAC_SCOL) + at91_emac_read(lp, AT91_EMAC_MCOL) + lcol + ecol);</div><div class='ctx'> 	}</div><div class='ctx'> 	return &amp;dev-&gt;stats;</div><div class='ctx'> }</div><div class='hunk'>@@ -922,7 +954,7 @@ static irqreturn_t at91ether_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	/* MAC Interrupt Status register indicates what interrupts are pending.</div><div class='ctx'> 	   It is automatically cleared once read. */</div><div class='del'>-	intstatus = at91_emac_read(AT91_EMAC_ISR);</div><div class='add'>+	intstatus = at91_emac_read(lp, AT91_EMAC_ISR);</div><div class='ctx'> </div><div class='ctx'> 	if (intstatus &amp; AT91_EMAC_RCOM)		/* Receive complete */</div><div class='ctx'> 		at91ether_rx(dev);</div><div class='hunk'>@@ -942,9 +974,9 @@ static irqreturn_t at91ether_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	/* Work-around for Errata #11 */</div><div class='ctx'> 	if (intstatus &amp; AT91_EMAC_RBNA) {</div><div class='del'>-		ctl = at91_emac_read(AT91_EMAC_CTL);</div><div class='del'>-		at91_emac_write(AT91_EMAC_CTL, ctl &amp; ~AT91_EMAC_RE);</div><div class='del'>-		at91_emac_write(AT91_EMAC_CTL, ctl | AT91_EMAC_RE);</div><div class='add'>+		ctl = at91_emac_read(lp, AT91_EMAC_CTL);</div><div class='add'>+		at91_emac_write(lp, AT91_EMAC_CTL, ctl &amp; ~AT91_EMAC_RE);</div><div class='add'>+		at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_RE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (intstatus &amp; AT91_EMAC_ROVR)</div><div class='hunk'>@@ -980,189 +1012,199 @@ static const struct net_device_ops at91ether_netdev_ops = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Initialize the ethernet interface</div><div class='add'>+ * Detect the PHY type, and its address.</div><div class='ctx'>  */</div><div class='del'>-static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_address,</div><div class='del'>-			struct platform_device *pdev, struct clk *ether_clk)</div><div class='add'>+static int __init at91ether_phy_detect(struct at91_private *lp)</div><div class='add'>+{</div><div class='add'>+	unsigned int phyid1, phyid2;</div><div class='add'>+	unsigned long phy_id;</div><div class='add'>+	unsigned short phy_address = 0;</div><div class='add'>+</div><div class='add'>+	while (phy_address &lt; PHY_MAX_ADDR) {</div><div class='add'>+		/* Read the PHY ID registers */</div><div class='add'>+		enable_mdi(lp);</div><div class='add'>+		read_phy(lp, phy_address, MII_PHYSID1, &amp;phyid1);</div><div class='add'>+		read_phy(lp, phy_address, MII_PHYSID2, &amp;phyid2);</div><div class='add'>+		disable_mdi(lp);</div><div class='add'>+</div><div class='add'>+		phy_id = (phyid1 &lt;&lt; 16) | (phyid2 &amp; 0xfff0);</div><div class='add'>+		switch (phy_id) {</div><div class='add'>+			case MII_DM9161_ID:		/* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */</div><div class='add'>+			case MII_DM9161A_ID:		/* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */</div><div class='add'>+			case MII_LXT971A_ID:		/* Intel LXT971A: PHY_ID1 = 0x13, PHY_ID2 = 78E0 */</div><div class='add'>+			case MII_RTL8201_ID:		/* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */</div><div class='add'>+			case MII_BCM5221_ID:		/* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */</div><div class='add'>+			case MII_DP83847_ID:		/* National Semiconductor DP83847:  */</div><div class='add'>+			case MII_DP83848_ID:		/* National Semiconductor DP83848:  */</div><div class='add'>+			case MII_AC101L_ID:		/* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */</div><div class='add'>+			case MII_KS8721_ID:		/* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */</div><div class='add'>+			case MII_T78Q21x3_ID:		/* Teridian 78Q21x3: PHY_ID1 = 0x0E, PHY_ID2 = 7237 */</div><div class='add'>+			case MII_LAN83C185_ID:		/* SMSC LAN83C185: PHY_ID1 = 0x0007, PHY_ID2 = 0xC0A1 */</div><div class='add'>+				/* store detected values */</div><div class='add'>+				lp-&gt;phy_type = phy_id;		/* Type of PHY connected */</div><div class='add'>+				lp-&gt;phy_address = phy_address;	/* MDI address of PHY */</div><div class='add'>+				return 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		phy_address++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;		/* not detected */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Detect MAC &amp; PHY and perform ethernet interface initialization</div><div class='add'>+ */</div><div class='add'>+static int __init at91ether_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct macb_platform_data *board_data = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct resource *regs;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct at91_private *lp;</div><div class='del'>-	unsigned int val;</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='add'>+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!regs)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='ctx'> 	dev = alloc_etherdev(sizeof(struct at91_private));</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = AT91_VA_BASE_EMAC;</div><div class='del'>-	dev-&gt;irq = AT91RM9200_ID_EMAC;</div><div class='add'>+	lp = netdev_priv(dev);</div><div class='add'>+	lp-&gt;board_data = *board_data;</div><div class='add'>+	spin_lock_init(&amp;lp-&gt;lock);</div><div class='add'>+</div><div class='add'>+	dev-&gt;base_addr = regs-&gt;start;		/* physical base address */</div><div class='add'>+	lp-&gt;emac_base = ioremap(regs-&gt;start, regs-&gt;end - regs-&gt;start + 1);</div><div class='add'>+	if (!lp-&gt;emac_base) {</div><div class='add'>+		res = -ENOMEM;</div><div class='add'>+		goto err_free_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Clock */</div><div class='add'>+	lp-&gt;ether_clk = clk_get(&amp;pdev-&gt;dev, "ether_clk");</div><div class='add'>+	if (IS_ERR(lp-&gt;ether_clk)) {</div><div class='add'>+		res = -ENODEV;</div><div class='add'>+		goto err_ioumap;</div><div class='add'>+	}</div><div class='add'>+	clk_enable(lp-&gt;ether_clk);</div><div class='ctx'> </div><div class='ctx'> 	/* Install the interrupt handler */</div><div class='add'>+	dev-&gt;irq = platform_get_irq(pdev, 0);</div><div class='ctx'> 	if (request_irq(dev-&gt;irq, at91ether_interrupt, 0, dev-&gt;name, dev)) {</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-		return -EBUSY;</div><div class='add'>+		res = -EBUSY;</div><div class='add'>+		goto err_disable_clock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate memory for DMA Receive descriptors */</div><div class='del'>-	lp = netdev_priv(dev);</div><div class='ctx'> 	lp-&gt;dlist = (struct recv_desc_bufs *) dma_alloc_coherent(NULL, sizeof(struct recv_desc_bufs), (dma_addr_t *) &amp;lp-&gt;dlist_phys, GFP_KERNEL);</div><div class='ctx'> 	if (lp-&gt;dlist == NULL) {</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		res = -ENOMEM;</div><div class='add'>+		goto err_free_irq;</div><div class='ctx'> 	}</div><div class='del'>-	lp-&gt;board_data = *board_data;</div><div class='del'>-	lp-&gt;ether_clk = ether_clk;</div><div class='del'>-	platform_set_drvdata(pdev, dev);</div><div class='del'>-</div><div class='del'>-	spin_lock_init(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	ether_setup(dev);</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;at91ether_netdev_ops;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;at91ether_ethtool_ops;</div><div class='del'>-</div><div class='add'>+	platform_set_drvdata(pdev, dev);</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	get_mac_address(dev);		/* Get ethernet address and store it in dev-&gt;dev_addr */</div><div class='ctx'> 	update_mac_address(dev);	/* Program ethernet address into MAC */</div><div class='ctx'> </div><div class='del'>-	at91_emac_write(AT91_EMAC_CTL, 0);</div><div class='add'>+	at91_emac_write(lp, AT91_EMAC_CTL, 0);</div><div class='ctx'> </div><div class='del'>-	if (lp-&gt;board_data.is_rmii)</div><div class='del'>-		at91_emac_write(AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG | AT91_EMAC_RMII);</div><div class='add'>+	if (board_data-&gt;is_rmii)</div><div class='add'>+		at91_emac_write(lp, AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG | AT91_EMAC_RMII);</div><div class='ctx'> 	else</div><div class='del'>-		at91_emac_write(AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG);</div><div class='add'>+		at91_emac_write(lp, AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG);</div><div class='ctx'> </div><div class='del'>-	/* Perform PHY-specific initialization */</div><div class='del'>-	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	enable_mdi();</div><div class='del'>-	if ((phy_type == MII_DM9161_ID) || (lp-&gt;phy_type == MII_DM9161A_ID)) {</div><div class='del'>-		read_phy(phy_address, MII_DSCR_REG, &amp;val);</div><div class='del'>-		if ((val &amp; (1 &lt;&lt; 10)) == 0)			/* DSCR bit 10 is 0 -- fiber mode */</div><div class='del'>-			lp-&gt;phy_media = PORT_FIBRE;</div><div class='del'>-	} else if (machine_is_csb337()) {</div><div class='del'>-		/* mix link activity status into LED2 link state */</div><div class='del'>-		write_phy(phy_address, MII_LEDCTRL_REG, 0x0d22);</div><div class='del'>-	} else if (machine_is_ecbat91())</div><div class='del'>-		write_phy(phy_address, MII_LEDCTRL_REG, 0x156A);</div><div class='add'>+	/* Detect PHY */</div><div class='add'>+	if (!at91ether_phy_detect(lp)) {</div><div class='add'>+		printk(KERN_ERR "at91_ether: Could not detect ethernet PHY\n");</div><div class='add'>+		res = -ENODEV;</div><div class='add'>+		goto err_free_dmamem;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	disable_mdi();</div><div class='del'>-	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='add'>+	initialize_phy(lp);</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;mii.dev = dev;		/* Support for ethtool */</div><div class='ctx'> 	lp-&gt;mii.mdio_read = mdio_read;</div><div class='ctx'> 	lp-&gt;mii.mdio_write = mdio_write;</div><div class='del'>-	lp-&gt;mii.phy_id = phy_address;</div><div class='add'>+	lp-&gt;mii.phy_id = lp-&gt;phy_address;</div><div class='ctx'> 	lp-&gt;mii.phy_id_mask = 0x1f;</div><div class='ctx'> 	lp-&gt;mii.reg_num_mask = 0x1f;</div><div class='ctx'> </div><div class='del'>-	lp-&gt;phy_type = phy_type;	/* Type of PHY connected */</div><div class='del'>-	lp-&gt;phy_address = phy_address;	/* MDI address of PHY */</div><div class='del'>-</div><div class='ctx'> 	/* Register the network interface */</div><div class='ctx'> 	res = register_netdev(dev);</div><div class='del'>-	if (res) {</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-		dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp-&gt;dlist, (dma_addr_t)lp-&gt;dlist_phys);</div><div class='del'>-		return res;</div><div class='del'>-	}</div><div class='add'>+	if (res)</div><div class='add'>+		goto err_free_dmamem;</div><div class='ctx'> </div><div class='ctx'> 	/* Determine current link speed */</div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	enable_mdi();</div><div class='add'>+	enable_mdi(lp);</div><div class='ctx'> 	update_linkspeed(dev, 0);</div><div class='del'>-	disable_mdi();</div><div class='add'>+	disable_mdi(lp);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> 	netif_carrier_off(dev);		/* will be enabled in open() */</div><div class='ctx'> </div><div class='ctx'> 	/* If board has no PHY IRQ, use a timer to poll the PHY */</div><div class='del'>-	if (!gpio_is_valid(lp-&gt;board_data.phy_irq_pin)) {</div><div class='add'>+	if (gpio_is_valid(lp-&gt;board_data.phy_irq_pin)) {</div><div class='add'>+		gpio_request(board_data-&gt;phy_irq_pin, "ethernet_phy");</div><div class='add'>+	} else {</div><div class='add'>+		/* If board has no PHY IRQ, use a timer to poll the PHY */</div><div class='ctx'> 		init_timer(&amp;lp-&gt;check_timer);</div><div class='ctx'> 		lp-&gt;check_timer.data = (unsigned long)dev;</div><div class='ctx'> 		lp-&gt;check_timer.function = at91ether_check_link;</div><div class='del'>-	} else if (lp-&gt;board_data.phy_irq_pin &gt;= 32)</div><div class='del'>-		gpio_request(lp-&gt;board_data.phy_irq_pin, "ethernet_phy");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Display ethernet banner */</div><div class='ctx'> 	printk(KERN_INFO "%s: AT91 ethernet at 0x%08x int=%d %s%s (%pM)\n",</div><div class='ctx'> 	       dev-&gt;name, (uint) dev-&gt;base_addr, dev-&gt;irq,</div><div class='del'>-	       at91_emac_read(AT91_EMAC_CFG) &amp; AT91_EMAC_SPD ? "100-" : "10-",</div><div class='del'>-	       at91_emac_read(AT91_EMAC_CFG) &amp; AT91_EMAC_FD ? "FullDuplex" : "HalfDuplex",</div><div class='add'>+	       at91_emac_read(lp, AT91_EMAC_CFG) &amp; AT91_EMAC_SPD ? "100-" : "10-",</div><div class='add'>+	       at91_emac_read(lp, AT91_EMAC_CFG) &amp; AT91_EMAC_FD ? "FullDuplex" : "HalfDuplex",</div><div class='ctx'> 	       dev-&gt;dev_addr);</div><div class='del'>-	if ((phy_type == MII_DM9161_ID) || (lp-&gt;phy_type == MII_DM9161A_ID))</div><div class='add'>+	if ((lp-&gt;phy_type == MII_DM9161_ID) || (lp-&gt;phy_type == MII_DM9161A_ID))</div><div class='ctx'> 		printk(KERN_INFO "%s: Davicom 9161 PHY %s\n", dev-&gt;name, (lp-&gt;phy_media == PORT_FIBRE) ? "(Fiber)" : "(Copper)");</div><div class='del'>-	else if (phy_type == MII_LXT971A_ID)</div><div class='add'>+	else if (lp-&gt;phy_type == MII_LXT971A_ID)</div><div class='ctx'> 		printk(KERN_INFO "%s: Intel LXT971A PHY\n", dev-&gt;name);</div><div class='del'>-	else if (phy_type == MII_RTL8201_ID)</div><div class='add'>+	else if (lp-&gt;phy_type == MII_RTL8201_ID)</div><div class='ctx'> 		printk(KERN_INFO "%s: Realtek RTL8201(B)L PHY\n", dev-&gt;name);</div><div class='del'>-	else if (phy_type == MII_BCM5221_ID)</div><div class='add'>+	else if (lp-&gt;phy_type == MII_BCM5221_ID)</div><div class='ctx'> 		printk(KERN_INFO "%s: Broadcom BCM5221 PHY\n", dev-&gt;name);</div><div class='del'>-	else if (phy_type == MII_DP83847_ID)</div><div class='add'>+	else if (lp-&gt;phy_type == MII_DP83847_ID)</div><div class='ctx'> 		printk(KERN_INFO "%s: National Semiconductor DP83847 PHY\n", dev-&gt;name);</div><div class='del'>-	else if (phy_type == MII_DP83848_ID)</div><div class='add'>+	else if (lp-&gt;phy_type == MII_DP83848_ID)</div><div class='ctx'> 		printk(KERN_INFO "%s: National Semiconductor DP83848 PHY\n", dev-&gt;name);</div><div class='del'>-	else if (phy_type == MII_AC101L_ID)</div><div class='add'>+	else if (lp-&gt;phy_type == MII_AC101L_ID)</div><div class='ctx'> 		printk(KERN_INFO "%s: Altima AC101L PHY\n", dev-&gt;name);</div><div class='del'>-	else if (phy_type == MII_KS8721_ID)</div><div class='add'>+	else if (lp-&gt;phy_type == MII_KS8721_ID)</div><div class='ctx'> 		printk(KERN_INFO "%s: Micrel KS8721 PHY\n", dev-&gt;name);</div><div class='del'>-	else if (phy_type == MII_T78Q21x3_ID)</div><div class='add'>+	else if (lp-&gt;phy_type == MII_T78Q21x3_ID)</div><div class='ctx'> 		printk(KERN_INFO "%s: Teridian 78Q21x3 PHY\n", dev-&gt;name);</div><div class='del'>-	else if (phy_type == MII_LAN83C185_ID)</div><div class='add'>+	else if (lp-&gt;phy_type == MII_LAN83C185_ID)</div><div class='ctx'> 		printk(KERN_INFO "%s: SMSC LAN83C185 PHY\n", dev-&gt;name);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Detect MAC and PHY and perform initialization</div><div class='del'>- */</div><div class='del'>-static int __init at91ether_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	unsigned int phyid1, phyid2;</div><div class='del'>-	int detected = -1;</div><div class='del'>-	unsigned long phy_id;</div><div class='del'>-	unsigned short phy_address = 0;</div><div class='del'>-	struct clk *ether_clk;</div><div class='del'>-</div><div class='del'>-	ether_clk = clk_get(&amp;pdev-&gt;dev, "ether_clk");</div><div class='del'>-	if (IS_ERR(ether_clk)) {</div><div class='del'>-		printk(KERN_ERR "at91_ether: no clock defined\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-	clk_enable(ether_clk);					/* Enable Peripheral clock */</div><div class='del'>-</div><div class='del'>-	while ((detected != 0) &amp;&amp; (phy_address &lt; 32)) {</div><div class='del'>-		/* Read the PHY ID registers */</div><div class='del'>-		enable_mdi();</div><div class='del'>-		read_phy(phy_address, MII_PHYSID1, &amp;phyid1);</div><div class='del'>-		read_phy(phy_address, MII_PHYSID2, &amp;phyid2);</div><div class='del'>-		disable_mdi();</div><div class='del'>-</div><div class='del'>-		phy_id = (phyid1 &lt;&lt; 16) | (phyid2 &amp; 0xfff0);</div><div class='del'>-		switch (phy_id) {</div><div class='del'>-			case MII_DM9161_ID:		/* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */</div><div class='del'>-			case MII_DM9161A_ID:		/* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */</div><div class='del'>-			case MII_LXT971A_ID:		/* Intel LXT971A: PHY_ID1 = 0x13, PHY_ID2 = 78E0 */</div><div class='del'>-			case MII_RTL8201_ID:		/* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */</div><div class='del'>-			case MII_BCM5221_ID:		/* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */</div><div class='del'>-			case MII_DP83847_ID:		/* National Semiconductor DP83847:  */</div><div class='del'>-			case MII_DP83848_ID:		/* National Semiconductor DP83848:  */</div><div class='del'>-			case MII_AC101L_ID:		/* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */</div><div class='del'>-			case MII_KS8721_ID:		/* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */</div><div class='del'>-			case MII_T78Q21x3_ID:		/* Teridian 78Q21x3: PHY_ID1 = 0x0E, PHY_ID2 = 7237 */</div><div class='del'>-			case MII_LAN83C185_ID:		/* SMSC LAN83C185: PHY_ID1 = 0x0007, PHY_ID2 = 0xC0A1 */</div><div class='del'>-				detected = at91ether_setup(phy_id, phy_address, pdev, ether_clk);</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='add'>+	clk_disable(lp-&gt;ether_clk);					/* Disable Peripheral clock */</div><div class='ctx'> </div><div class='del'>-		phy_address++;</div><div class='del'>-	}</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='del'>-	clk_disable(ether_clk);					/* Disable Peripheral clock */</div><div class='ctx'> </div><div class='del'>-	return detected;</div><div class='add'>+err_free_dmamem:</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+	dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp-&gt;dlist, (dma_addr_t)lp-&gt;dlist_phys);</div><div class='add'>+err_free_irq:</div><div class='add'>+	free_irq(dev-&gt;irq, dev);</div><div class='add'>+err_disable_clock:</div><div class='add'>+	clk_disable(lp-&gt;ether_clk);</div><div class='add'>+	clk_put(lp-&gt;ether_clk);</div><div class='add'>+err_ioumap:</div><div class='add'>+	iounmap(lp-&gt;emac_base);</div><div class='add'>+err_free_dev:</div><div class='add'>+	free_netdev(dev);</div><div class='add'>+	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit at91ether_remove(struct platform_device *pdev)</div><div class='hunk'>@@ -1170,8 +1212,7 @@ static int __devexit at91ether_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct at91_private *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (gpio_is_valid(lp-&gt;board_data.phy_irq_pin) &amp;&amp;</div><div class='del'>-	    lp-&gt;board_data.phy_irq_pin &gt;= 32)</div><div class='add'>+	if (gpio_is_valid(lp-&gt;board_data.phy_irq_pin))</div><div class='ctx'> 		gpio_free(lp-&gt;board_data.phy_irq_pin);</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(dev);</div><div class='hunk'>@@ -1193,7 +1234,7 @@ static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg)</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(net_dev)) {</div><div class='ctx'> 		if (gpio_is_valid(lp-&gt;board_data.phy_irq_pin)) {</div><div class='del'>-			int phy_irq = lp-&gt;board_data.phy_irq_pin;</div><div class='add'>+			int phy_irq = gpio_to_irq(lp-&gt;board_data.phy_irq_pin);</div><div class='ctx'> 			disable_irq(phy_irq);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1217,7 +1258,7 @@ static int at91ether_resume(struct platform_device *pdev)</div><div class='ctx'> 		netif_start_queue(net_dev);</div><div class='ctx'> </div><div class='ctx'> 		if (gpio_is_valid(lp-&gt;board_data.phy_irq_pin)) {</div><div class='del'>-			int phy_irq = lp-&gt;board_data.phy_irq_pin;</div><div class='add'>+			int phy_irq = gpio_to_irq(lp-&gt;board_data.phy_irq_pin);</div><div class='ctx'> 			enable_irq(phy_irq);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/cadence/at91_ether.h b/drivers/net/ethernet/cadence/at91_ether.h<br/>index 3725fbb0defe..0ef6328fa7f8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/cadence/at91_ether.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/cadence/at91_ether.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/cadence/at91_ether.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/cadence/at91_ether.h</a></div><div class='hunk'>@@ -88,6 +88,7 @@ struct at91_private</div><div class='ctx'> 	struct macb_platform_data board_data;	/* board-specific</div><div class='ctx'> 						 * configuration (shared with</div><div class='ctx'> 						 * macb for common data */</div><div class='add'>+	void __iomem *emac_base;		/* base register address */</div><div class='ctx'> 	struct clk *ether_clk;			/* clock */</div><div class='ctx'> </div><div class='ctx'> 	/* PHY */</div><div class='head'>diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c<br/>index c4834c23be35..1466bc4e3dda 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/cadence/macb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/cadence/macb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/cadence/macb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/cadence/macb.c</a></div><div class='hunk'>@@ -1213,6 +1213,7 @@ static const struct ethtool_ops macb_ethtool_ops = {</div><div class='ctx'> 	.set_settings		= macb_set_settings,</div><div class='ctx'> 	.get_drvinfo		= macb_get_drvinfo,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c b/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c<br/>index 63bfdd10bd6d..abb6ce7c1b7e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c</a></div><div class='hunk'>@@ -1150,6 +1150,48 @@ release_tpsram:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * t3_synchronize_rx - wait for current Rx processing on a port to complete</div><div class='add'>+ * @adap: the adapter</div><div class='add'>+ * @p: the port</div><div class='add'>+ *</div><div class='add'>+ * Ensures that current Rx processing on any of the queues associated with</div><div class='add'>+ * the given port completes before returning.  We do this by acquiring and</div><div class='add'>+ * releasing the locks of the response queues associated with the port.</div><div class='add'>+ */</div><div class='add'>+static void t3_synchronize_rx(struct adapter *adap, const struct port_info *p)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = p-&gt;first_qset; i &lt; p-&gt;first_qset + p-&gt;nqsets; i++) {</div><div class='add'>+		struct sge_rspq *q = &amp;adap-&gt;sge.qs[i].rspq;</div><div class='add'>+</div><div class='add'>+		spin_lock_irq(&amp;q-&gt;lock);</div><div class='add'>+		spin_unlock_irq(&amp;q-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cxgb_vlan_mode(struct net_device *dev, netdev_features_t features)</div><div class='add'>+{</div><div class='add'>+	struct port_info *pi = netdev_priv(dev);</div><div class='add'>+	struct adapter *adapter = pi-&gt;adapter;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;params.rev &gt; 0) {</div><div class='add'>+		t3_set_vlan_accel(adapter, 1 &lt;&lt; pi-&gt;port_id,</div><div class='add'>+				  features &amp; NETIF_F_HW_VLAN_RX);</div><div class='add'>+	} else {</div><div class='add'>+		/* single control for all ports */</div><div class='add'>+		unsigned int i, have_vlans = features &amp; NETIF_F_HW_VLAN_RX;</div><div class='add'>+</div><div class='add'>+		for_each_port(adapter, i)</div><div class='add'>+			have_vlans |=</div><div class='add'>+				adapter-&gt;port[i]-&gt;features &amp; NETIF_F_HW_VLAN_RX;</div><div class='add'>+</div><div class='add'>+		t3_set_vlan_accel(adapter, 1, have_vlans);</div><div class='add'>+	}</div><div class='add'>+	t3_synchronize_rx(adapter, pi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  *	cxgb_up - enable the adapter</div><div class='ctx'>  *	@adapter: adapter being enabled</div><div class='ctx'>  *</div><div class='hunk'>@@ -1161,7 +1203,7 @@ release_tpsram:</div><div class='ctx'>  */</div><div class='ctx'> static int cxgb_up(struct adapter *adap)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='add'>+	int i, err;</div><div class='ctx'> </div><div class='ctx'> 	if (!(adap-&gt;flags &amp; FULL_INIT_DONE)) {</div><div class='ctx'> 		err = t3_check_fw_version(adap);</div><div class='hunk'>@@ -1198,6 +1240,9 @@ static int cxgb_up(struct adapter *adap)</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='add'>+		for_each_port(adap, i)</div><div class='add'>+			cxgb_vlan_mode(adap-&gt;port[i], adap-&gt;port[i]-&gt;features);</div><div class='add'>+</div><div class='ctx'> 		setup_rss(adap);</div><div class='ctx'> 		if (!(adap-&gt;flags &amp; NAPI_INIT))</div><div class='ctx'> 			init_napi(adap);</div><div class='hunk'>@@ -2508,48 +2553,6 @@ static int cxgb_set_mac_addr(struct net_device *dev, void *p)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * t3_synchronize_rx - wait for current Rx processing on a port to complete</div><div class='del'>- * @adap: the adapter</div><div class='del'>- * @p: the port</div><div class='del'>- *</div><div class='del'>- * Ensures that current Rx processing on any of the queues associated with</div><div class='del'>- * the given port completes before returning.  We do this by acquiring and</div><div class='del'>- * releasing the locks of the response queues associated with the port.</div><div class='del'>- */</div><div class='del'>-static void t3_synchronize_rx(struct adapter *adap, const struct port_info *p)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = p-&gt;first_qset; i &lt; p-&gt;first_qset + p-&gt;nqsets; i++) {</div><div class='del'>-		struct sge_rspq *q = &amp;adap-&gt;sge.qs[i].rspq;</div><div class='del'>-</div><div class='del'>-		spin_lock_irq(&amp;q-&gt;lock);</div><div class='del'>-		spin_unlock_irq(&amp;q-&gt;lock);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cxgb_vlan_mode(struct net_device *dev, netdev_features_t features)</div><div class='del'>-{</div><div class='del'>-	struct port_info *pi = netdev_priv(dev);</div><div class='del'>-	struct adapter *adapter = pi-&gt;adapter;</div><div class='del'>-</div><div class='del'>-	if (adapter-&gt;params.rev &gt; 0) {</div><div class='del'>-		t3_set_vlan_accel(adapter, 1 &lt;&lt; pi-&gt;port_id,</div><div class='del'>-				  features &amp; NETIF_F_HW_VLAN_RX);</div><div class='del'>-	} else {</div><div class='del'>-		/* single control for all ports */</div><div class='del'>-		unsigned int i, have_vlans = features &amp; NETIF_F_HW_VLAN_RX;</div><div class='del'>-</div><div class='del'>-		for_each_port(adapter, i)</div><div class='del'>-			have_vlans |=</div><div class='del'>-				adapter-&gt;port[i]-&gt;features &amp; NETIF_F_HW_VLAN_RX;</div><div class='del'>-</div><div class='del'>-		t3_set_vlan_accel(adapter, 1, have_vlans);</div><div class='del'>-	}</div><div class='del'>-	t3_synchronize_rx(adapter, pi);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static netdev_features_t cxgb_fix_features(struct net_device *dev,</div><div class='ctx'> 	netdev_features_t features)</div><div class='ctx'> {</div><div class='hunk'>@@ -3353,9 +3356,6 @@ static int __devinit init_one(struct pci_dev *pdev,</div><div class='ctx'> 	err = sysfs_create_group(&amp;adapter-&gt;port[0]-&gt;dev.kobj,</div><div class='ctx'> 				 &amp;cxgb3_attr_group);</div><div class='ctx'> </div><div class='del'>-	for_each_port(adapter, i)</div><div class='del'>-		cxgb_vlan_mode(adapter-&gt;port[i], adapter-&gt;port[i]-&gt;features);</div><div class='del'>-</div><div class='ctx'> 	print_port_info(adapter, ai);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h<br/>index 0fe18850c838..ec2dafe8ae5b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/chelsio/cxgb4/cxgb4.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/cxgb4.h</a></div><div class='hunk'>@@ -51,6 +51,8 @@</div><div class='ctx'> #define FW_VERSION_MINOR 1</div><div class='ctx'> #define FW_VERSION_MICRO 0</div><div class='ctx'> </div><div class='add'>+#define CH_WARN(adap, fmt, ...) dev_warn(adap-&gt;pdev_dev, fmt, ## __VA_ARGS__)</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> 	MAX_NPORTS = 4,     /* max # of ports */</div><div class='ctx'> 	SERNUM_LEN = 24,    /* Serial # length */</div><div class='hunk'>@@ -64,6 +66,15 @@ enum {</div><div class='ctx'> 	MEM_MC</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum {</div><div class='add'>+	MEMWIN0_APERTURE = 65536,</div><div class='add'>+	MEMWIN0_BASE     = 0x30000,</div><div class='add'>+	MEMWIN1_APERTURE = 32768,</div><div class='add'>+	MEMWIN1_BASE     = 0x28000,</div><div class='add'>+	MEMWIN2_APERTURE = 2048,</div><div class='add'>+	MEMWIN2_BASE     = 0x1b800,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum dev_master {</div><div class='ctx'> 	MASTER_CANT,</div><div class='ctx'> 	MASTER_MAY,</div><div class='hunk'>@@ -403,6 +414,9 @@ struct sge_txq {</div><div class='ctx'> 	struct tx_sw_desc *sdesc;   /* address of SW Tx descriptor ring */</div><div class='ctx'> 	struct sge_qstat *stat;     /* queue status entry */</div><div class='ctx'> 	dma_addr_t    phys_addr;    /* physical address of the ring */</div><div class='add'>+	spinlock_t db_lock;</div><div class='add'>+	int db_disabled;</div><div class='add'>+	unsigned short db_pidx;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct sge_eth_txq {                /* state for an SGE Ethernet Tx queue */</div><div class='hunk'>@@ -475,6 +489,7 @@ struct adapter {</div><div class='ctx'> 	void __iomem *regs;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> 	struct device *pdev_dev;</div><div class='add'>+	unsigned int mbox;</div><div class='ctx'> 	unsigned int fn;</div><div class='ctx'> 	unsigned int flags;</div><div class='ctx'> </div><div class='hunk'>@@ -504,6 +519,8 @@ struct adapter {</div><div class='ctx'> 	void **tid_release_head;</div><div class='ctx'> 	spinlock_t tid_release_lock;</div><div class='ctx'> 	struct work_struct tid_release_task;</div><div class='add'>+	struct work_struct db_full_task;</div><div class='add'>+	struct work_struct db_drop_task;</div><div class='ctx'> 	bool tid_release_task_busy;</div><div class='ctx'> </div><div class='ctx'> 	struct dentry *debugfs_root;</div><div class='hunk'>@@ -605,6 +622,7 @@ irqreturn_t t4_sge_intr_msix(int irq, void *cookie);</div><div class='ctx'> void t4_sge_init(struct adapter *adap);</div><div class='ctx'> void t4_sge_start(struct adapter *adap);</div><div class='ctx'> void t4_sge_stop(struct adapter *adap);</div><div class='add'>+extern int dbfifo_int_thresh;</div><div class='ctx'> </div><div class='ctx'> #define for_each_port(adapter, iter) \</div><div class='ctx'> 	for (iter = 0; iter &lt; (adapter)-&gt;params.nports; ++iter)</div><div class='hunk'>@@ -719,4 +737,9 @@ int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,</div><div class='ctx'> int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,</div><div class='ctx'> 		    unsigned int vf, unsigned int eqid);</div><div class='ctx'> int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);</div><div class='add'>+void t4_db_full(struct adapter *adapter);</div><div class='add'>+void t4_db_dropped(struct adapter *adapter);</div><div class='add'>+int t4_mem_win_read_len(struct adapter *adap, u32 addr, __be32 *data, int len);</div><div class='add'>+int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox,</div><div class='add'>+			 u32 addr, u32 val);</div><div class='ctx'> #endif /* __CXGB4_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c<br/>index b126b98065a9..e1f96fbb48c1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c</a></div><div class='hunk'>@@ -149,15 +149,6 @@ static unsigned int pfvfres_pmask(struct adapter *adapter,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='del'>-	MEMWIN0_APERTURE = 65536,</div><div class='del'>-	MEMWIN0_BASE     = 0x30000,</div><div class='del'>-	MEMWIN1_APERTURE = 32768,</div><div class='del'>-	MEMWIN1_BASE     = 0x28000,</div><div class='del'>-	MEMWIN2_APERTURE = 2048,</div><div class='del'>-	MEMWIN2_BASE     = 0x1b800,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='ctx'> 	MAX_TXQ_ENTRIES      = 16384,</div><div class='ctx'> 	MAX_CTRL_TXQ_ENTRIES = 1024,</div><div class='ctx'> 	MAX_RSPQ_ENTRIES     = 16384,</div><div class='hunk'>@@ -371,6 +362,15 @@ static int set_addr_filters(const struct net_device *dev, bool sleep)</div><div class='ctx'> 				uhash | mhash, sleep);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int dbfifo_int_thresh = 10; /* 10 == 640 entry threshold */</div><div class='add'>+module_param(dbfifo_int_thresh, int, 0644);</div><div class='add'>+MODULE_PARM_DESC(dbfifo_int_thresh, "doorbell fifo interrupt threshold");</div><div class='add'>+</div><div class='add'>+int dbfifo_drain_delay = 1000; /* usecs to sleep while draining the dbfifo */</div><div class='add'>+module_param(dbfifo_drain_delay, int, 0644);</div><div class='add'>+MODULE_PARM_DESC(dbfifo_drain_delay,</div><div class='add'>+		 "usecs to sleep while draining the dbfifo");</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Set Rx properties of a port, such as promiscruity, address filters, and MTU.</div><div class='ctx'>  * If @mtu is -1 it is left unchanged.</div><div class='hunk'>@@ -389,6 +389,8 @@ static int set_rxmode(struct net_device *dev, int mtu, bool sleep_ok)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct workqueue_struct *workq;</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *	link_start - enable a port</div><div class='ctx'>  *	@dev: the port to enable</div><div class='hunk'>@@ -2196,7 +2198,7 @@ static void cxgb4_queue_tid_release(struct tid_info *t, unsigned int chan,</div><div class='ctx'> 	adap-&gt;tid_release_head = (void **)((uintptr_t)p | chan);</div><div class='ctx'> 	if (!adap-&gt;tid_release_task_busy) {</div><div class='ctx'> 		adap-&gt;tid_release_task_busy = true;</div><div class='del'>-		schedule_work(&amp;adap-&gt;tid_release_task);</div><div class='add'>+		queue_work(workq, &amp;adap-&gt;tid_release_task);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_bh(&amp;adap-&gt;tid_release_lock);</div><div class='ctx'> }</div><div class='hunk'>@@ -2366,6 +2368,16 @@ unsigned int cxgb4_port_chan(const struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(cxgb4_port_chan);</div><div class='ctx'> </div><div class='add'>+unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo)</div><div class='add'>+{</div><div class='add'>+	struct adapter *adap = netdev2adap(dev);</div><div class='add'>+	u32 v;</div><div class='add'>+</div><div class='add'>+	v = t4_read_reg(adap, A_SGE_DBFIFO_STATUS);</div><div class='add'>+	return lpfifo ? G_LP_COUNT(v) : G_HP_COUNT(v);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(cxgb4_dbfifo_count);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *	cxgb4_port_viid - get the VI id of a port</div><div class='ctx'>  *	@dev: the net device for the port</div><div class='hunk'>@@ -2413,6 +2425,59 @@ void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(cxgb4_iscsi_init);</div><div class='ctx'> </div><div class='add'>+int cxgb4_flush_eq_cache(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct adapter *adap = netdev2adap(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = t4_fwaddrspace_write(adap, adap-&gt;mbox,</div><div class='add'>+				   0xe1000000 + A_SGE_CTXT_CMD, 0x20000000);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(cxgb4_flush_eq_cache);</div><div class='add'>+</div><div class='add'>+static int read_eq_indices(struct adapter *adap, u16 qid, u16 *pidx, u16 *cidx)</div><div class='add'>+{</div><div class='add'>+	u32 addr = t4_read_reg(adap, A_SGE_DBQ_CTXT_BADDR) + 24 * qid + 8;</div><div class='add'>+	__be64 indices;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = t4_mem_win_read_len(adap, addr, (__be32 *)&amp;indices, 8);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		indices = be64_to_cpu(indices);</div><div class='add'>+		*cidx = (indices &gt;&gt; 25) &amp; 0xffff;</div><div class='add'>+		*pidx = (indices &gt;&gt; 9) &amp; 0xffff;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx,</div><div class='add'>+			u16 size)</div><div class='add'>+{</div><div class='add'>+	struct adapter *adap = netdev2adap(dev);</div><div class='add'>+	u16 hw_pidx, hw_cidx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = read_eq_indices(adap, qid, &amp;hw_pidx, &amp;hw_cidx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (pidx != hw_pidx) {</div><div class='add'>+		u16 delta;</div><div class='add'>+</div><div class='add'>+		if (pidx &gt;= hw_pidx)</div><div class='add'>+			delta = pidx - hw_pidx;</div><div class='add'>+		else</div><div class='add'>+			delta = size - hw_pidx + pidx;</div><div class='add'>+		wmb();</div><div class='add'>+		t4_write_reg(adap, MYPF_REG(A_SGE_PF_KDOORBELL),</div><div class='add'>+			     V_QID(qid) | V_PIDX(delta));</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(cxgb4_sync_txq_pidx);</div><div class='add'>+</div><div class='ctx'> static struct pci_driver cxgb4_driver;</div><div class='ctx'> </div><div class='ctx'> static void check_neigh_update(struct neighbour *neigh)</div><div class='hunk'>@@ -2446,6 +2511,144 @@ static struct notifier_block cxgb4_netevent_nb = {</div><div class='ctx'> 	.notifier_call = netevent_cb</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void drain_db_fifo(struct adapter *adap, int usecs)</div><div class='add'>+{</div><div class='add'>+	u32 v;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		set_current_state(TASK_UNINTERRUPTIBLE);</div><div class='add'>+		schedule_timeout(usecs_to_jiffies(usecs));</div><div class='add'>+		v = t4_read_reg(adap, A_SGE_DBFIFO_STATUS);</div><div class='add'>+		if (G_LP_COUNT(v) == 0 &amp;&amp; G_HP_COUNT(v) == 0)</div><div class='add'>+			break;</div><div class='add'>+	} while (1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disable_txq_db(struct sge_txq *q)</div><div class='add'>+{</div><div class='add'>+	spin_lock_irq(&amp;q-&gt;db_lock);</div><div class='add'>+	q-&gt;db_disabled = 1;</div><div class='add'>+	spin_unlock_irq(&amp;q-&gt;db_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enable_txq_db(struct sge_txq *q)</div><div class='add'>+{</div><div class='add'>+	spin_lock_irq(&amp;q-&gt;db_lock);</div><div class='add'>+	q-&gt;db_disabled = 0;</div><div class='add'>+	spin_unlock_irq(&amp;q-&gt;db_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disable_dbs(struct adapter *adap)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for_each_ethrxq(&amp;adap-&gt;sge, i)</div><div class='add'>+		disable_txq_db(&amp;adap-&gt;sge.ethtxq[i].q);</div><div class='add'>+	for_each_ofldrxq(&amp;adap-&gt;sge, i)</div><div class='add'>+		disable_txq_db(&amp;adap-&gt;sge.ofldtxq[i].q);</div><div class='add'>+	for_each_port(adap, i)</div><div class='add'>+		disable_txq_db(&amp;adap-&gt;sge.ctrlq[i].q);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enable_dbs(struct adapter *adap)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for_each_ethrxq(&amp;adap-&gt;sge, i)</div><div class='add'>+		enable_txq_db(&amp;adap-&gt;sge.ethtxq[i].q);</div><div class='add'>+	for_each_ofldrxq(&amp;adap-&gt;sge, i)</div><div class='add'>+		enable_txq_db(&amp;adap-&gt;sge.ofldtxq[i].q);</div><div class='add'>+	for_each_port(adap, i)</div><div class='add'>+		enable_txq_db(&amp;adap-&gt;sge.ctrlq[i].q);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sync_txq_pidx(struct adapter *adap, struct sge_txq *q)</div><div class='add'>+{</div><div class='add'>+	u16 hw_pidx, hw_cidx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;q-&gt;db_lock);</div><div class='add'>+	ret = read_eq_indices(adap, (u16)q-&gt;cntxt_id, &amp;hw_pidx, &amp;hw_cidx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+	if (q-&gt;db_pidx != hw_pidx) {</div><div class='add'>+		u16 delta;</div><div class='add'>+</div><div class='add'>+		if (q-&gt;db_pidx &gt;= hw_pidx)</div><div class='add'>+			delta = q-&gt;db_pidx - hw_pidx;</div><div class='add'>+		else</div><div class='add'>+			delta = q-&gt;size - hw_pidx + q-&gt;db_pidx;</div><div class='add'>+		wmb();</div><div class='add'>+		t4_write_reg(adap, MYPF_REG(A_SGE_PF_KDOORBELL),</div><div class='add'>+				V_QID(q-&gt;cntxt_id) | V_PIDX(delta));</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	q-&gt;db_disabled = 0;</div><div class='add'>+	spin_unlock_bh(&amp;q-&gt;db_lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		CH_WARN(adap, "DB drop recovery failed.\n");</div><div class='add'>+}</div><div class='add'>+static void recover_all_queues(struct adapter *adap)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for_each_ethrxq(&amp;adap-&gt;sge, i)</div><div class='add'>+		sync_txq_pidx(adap, &amp;adap-&gt;sge.ethtxq[i].q);</div><div class='add'>+	for_each_ofldrxq(&amp;adap-&gt;sge, i)</div><div class='add'>+		sync_txq_pidx(adap, &amp;adap-&gt;sge.ofldtxq[i].q);</div><div class='add'>+	for_each_port(adap, i)</div><div class='add'>+		sync_txq_pidx(adap, &amp;adap-&gt;sge.ctrlq[i].q);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void notify_rdma_uld(struct adapter *adap, enum cxgb4_control cmd)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;uld_mutex);</div><div class='add'>+	if (adap-&gt;uld_handle[CXGB4_ULD_RDMA])</div><div class='add'>+		ulds[CXGB4_ULD_RDMA].control(adap-&gt;uld_handle[CXGB4_ULD_RDMA],</div><div class='add'>+				cmd);</div><div class='add'>+	mutex_unlock(&amp;uld_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void process_db_full(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct adapter *adap;</div><div class='add'>+</div><div class='add'>+	adap = container_of(work, struct adapter, db_full_task);</div><div class='add'>+</div><div class='add'>+	notify_rdma_uld(adap, CXGB4_CONTROL_DB_FULL);</div><div class='add'>+	drain_db_fifo(adap, dbfifo_drain_delay);</div><div class='add'>+	t4_set_reg_field(adap, A_SGE_INT_ENABLE3,</div><div class='add'>+			F_DBFIFO_HP_INT | F_DBFIFO_LP_INT,</div><div class='add'>+			F_DBFIFO_HP_INT | F_DBFIFO_LP_INT);</div><div class='add'>+	notify_rdma_uld(adap, CXGB4_CONTROL_DB_EMPTY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void process_db_drop(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct adapter *adap;</div><div class='add'>+</div><div class='add'>+	adap = container_of(work, struct adapter, db_drop_task);</div><div class='add'>+</div><div class='add'>+	t4_set_reg_field(adap, A_SGE_DOORBELL_CONTROL, F_DROPPED_DB, 0);</div><div class='add'>+	disable_dbs(adap);</div><div class='add'>+	notify_rdma_uld(adap, CXGB4_CONTROL_DB_DROP);</div><div class='add'>+	drain_db_fifo(adap, 1);</div><div class='add'>+	recover_all_queues(adap);</div><div class='add'>+	enable_dbs(adap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void t4_db_full(struct adapter *adap)</div><div class='add'>+{</div><div class='add'>+	t4_set_reg_field(adap, A_SGE_INT_ENABLE3,</div><div class='add'>+			F_DBFIFO_HP_INT | F_DBFIFO_LP_INT, 0);</div><div class='add'>+	queue_work(workq, &amp;adap-&gt;db_full_task);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void t4_db_dropped(struct adapter *adap)</div><div class='add'>+{</div><div class='add'>+	queue_work(workq, &amp;adap-&gt;db_drop_task);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void uld_attach(struct adapter *adap, unsigned int uld)</div><div class='ctx'> {</div><div class='ctx'> 	void *handle;</div><div class='hunk'>@@ -2479,6 +2682,7 @@ static void uld_attach(struct adapter *adap, unsigned int uld)</div><div class='ctx'> 	lli.gts_reg = adap-&gt;regs + MYPF_REG(SGE_PF_GTS);</div><div class='ctx'> 	lli.db_reg = adap-&gt;regs + MYPF_REG(SGE_PF_KDOORBELL);</div><div class='ctx'> 	lli.fw_vers = adap-&gt;params.fw_vers;</div><div class='add'>+	lli.dbfifo_int_thresh = dbfifo_int_thresh;</div><div class='ctx'> </div><div class='ctx'> 	handle = ulds[uld].add(&amp;lli);</div><div class='ctx'> 	if (IS_ERR(handle)) {</div><div class='hunk'>@@ -2649,6 +2853,8 @@ static void cxgb_down(struct adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	t4_intr_disable(adapter);</div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;tid_release_task);</div><div class='add'>+	cancel_work_sync(&amp;adapter-&gt;db_full_task);</div><div class='add'>+	cancel_work_sync(&amp;adapter-&gt;db_drop_task);</div><div class='ctx'> 	adapter-&gt;tid_release_task_busy = false;</div><div class='ctx'> 	adapter-&gt;tid_release_head = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -3593,6 +3799,7 @@ static int __devinit init_one(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;pdev = pdev;</div><div class='ctx'> 	adapter-&gt;pdev_dev = &amp;pdev-&gt;dev;</div><div class='add'>+	adapter-&gt;mbox = func;</div><div class='ctx'> 	adapter-&gt;fn = func;</div><div class='ctx'> 	adapter-&gt;msg_enable = dflt_msg_enable;</div><div class='ctx'> 	memset(adapter-&gt;chan_map, 0xff, sizeof(adapter-&gt;chan_map));</div><div class='hunk'>@@ -3601,6 +3808,8 @@ static int __devinit init_one(struct pci_dev *pdev,</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;tid_release_lock);</div><div class='ctx'> </div><div class='ctx'> 	INIT_WORK(&amp;adapter-&gt;tid_release_task, process_tid_release_list);</div><div class='add'>+	INIT_WORK(&amp;adapter-&gt;db_full_task, process_db_full);</div><div class='add'>+	INIT_WORK(&amp;adapter-&gt;db_drop_task, process_db_drop);</div><div class='ctx'> </div><div class='ctx'> 	err = t4_prep_adapter(adapter);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -3788,6 +3997,10 @@ static int __init cxgb4_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	workq = create_singlethread_workqueue("cxgb4");</div><div class='add'>+	if (!workq)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	/* Debugfs support is optional, just warn if this fails */</div><div class='ctx'> 	cxgb4_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL);</div><div class='ctx'> 	if (!cxgb4_debugfs_root)</div><div class='hunk'>@@ -3803,6 +4016,8 @@ static void __exit cxgb4_cleanup_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	pci_unregister_driver(&amp;cxgb4_driver);</div><div class='ctx'> 	debugfs_remove(cxgb4_debugfs_root);  /* NULL ok */</div><div class='add'>+	flush_workqueue(workq);</div><div class='add'>+	destroy_workqueue(workq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(cxgb4_init_module);</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h<br/>index b1d39b8d141a..d79980c5fc63 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h</a></div><div class='hunk'>@@ -163,6 +163,12 @@ enum cxgb4_state {</div><div class='ctx'> 	CXGB4_STATE_DETACH</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum cxgb4_control {</div><div class='add'>+	CXGB4_CONTROL_DB_FULL,</div><div class='add'>+	CXGB4_CONTROL_DB_EMPTY,</div><div class='add'>+	CXGB4_CONTROL_DB_DROP,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct pci_dev;</div><div class='ctx'> struct l2t_data;</div><div class='ctx'> struct net_device;</div><div class='hunk'>@@ -212,6 +218,7 @@ struct cxgb4_lld_info {</div><div class='ctx'> 	unsigned short ucq_density;          /* # of user CQs/page */</div><div class='ctx'> 	void __iomem *gts_reg;               /* address of GTS register */</div><div class='ctx'> 	void __iomem *db_reg;                /* address of kernel doorbell */</div><div class='add'>+	int dbfifo_int_thresh;		     /* doorbell fifo int threshold */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct cxgb4_uld_info {</div><div class='hunk'>@@ -220,11 +227,13 @@ struct cxgb4_uld_info {</div><div class='ctx'> 	int (*rx_handler)(void *handle, const __be64 *rsp,</div><div class='ctx'> 			  const struct pkt_gl *gl);</div><div class='ctx'> 	int (*state_change)(void *handle, enum cxgb4_state new_state);</div><div class='add'>+	int (*control)(void *handle, enum cxgb4_control control, ...);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p);</div><div class='ctx'> int cxgb4_unregister_uld(enum cxgb4_uld type);</div><div class='ctx'> int cxgb4_ofld_send(struct net_device *dev, struct sk_buff *skb);</div><div class='add'>+unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo);</div><div class='ctx'> unsigned int cxgb4_port_chan(const struct net_device *dev);</div><div class='ctx'> unsigned int cxgb4_port_viid(const struct net_device *dev);</div><div class='ctx'> unsigned int cxgb4_port_idx(const struct net_device *dev);</div><div class='hunk'>@@ -236,4 +245,6 @@ void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask,</div><div class='ctx'> 		      const unsigned int *pgsz_order);</div><div class='ctx'> struct sk_buff *cxgb4_pktgl_to_skb(const struct pkt_gl *gl,</div><div class='ctx'> 				   unsigned int skb_len, unsigned int pull_len);</div><div class='add'>+int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx, u16 size);</div><div class='add'>+int cxgb4_flush_eq_cache(struct net_device *dev);</div><div class='ctx'> #endif  /* !__CXGB4_OFLD_H */</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/sge.c b/drivers/net/ethernet/chelsio/cxgb4/sge.c<br/>index 2dae7959f000..e111d974afd8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/sge.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/chelsio/cxgb4/sge.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/sge.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/sge.c</a></div><div class='hunk'>@@ -767,8 +767,13 @@ static void write_sgl(const struct sk_buff *skb, struct sge_txq *q,</div><div class='ctx'> static inline void ring_tx_db(struct adapter *adap, struct sge_txq *q, int n)</div><div class='ctx'> {</div><div class='ctx'> 	wmb();            /* write descriptors before telling HW */</div><div class='del'>-	t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL),</div><div class='del'>-		     QID(q-&gt;cntxt_id) | PIDX(n));</div><div class='add'>+	spin_lock(&amp;q-&gt;db_lock);</div><div class='add'>+	if (!q-&gt;db_disabled) {</div><div class='add'>+		t4_write_reg(adap, MYPF_REG(A_SGE_PF_KDOORBELL),</div><div class='add'>+			     V_QID(q-&gt;cntxt_id) | V_PIDX(n));</div><div class='add'>+	}</div><div class='add'>+	q-&gt;db_pidx = q-&gt;pidx;</div><div class='add'>+	spin_unlock(&amp;q-&gt;db_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2081,6 +2086,7 @@ static void init_txq(struct adapter *adap, struct sge_txq *q, unsigned int id)</div><div class='ctx'> 	q-&gt;stops = q-&gt;restarts = 0;</div><div class='ctx'> 	q-&gt;stat = (void *)&amp;q-&gt;desc[q-&gt;size];</div><div class='ctx'> 	q-&gt;cntxt_id = id;</div><div class='add'>+	spin_lock_init(&amp;q-&gt;db_lock);</div><div class='ctx'> 	adap-&gt;sge.egr_map[id - adap-&gt;sge.egr_start] = q;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2415,6 +2421,18 @@ void t4_sge_init(struct adapter *adap)</div><div class='ctx'> 			 RXPKTCPLMODE |</div><div class='ctx'> 			 (STAT_LEN == 128 ? EGRSTATUSPAGESIZE : 0));</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Set up to drop DOORBELL writes when the DOORBELL FIFO overflows</div><div class='add'>+	 * and generate an interrupt when this occurs so we can recover.</div><div class='add'>+	 */</div><div class='add'>+	t4_set_reg_field(adap, A_SGE_DBFIFO_STATUS,</div><div class='add'>+			V_HP_INT_THRESH(M_HP_INT_THRESH) |</div><div class='add'>+			V_LP_INT_THRESH(M_LP_INT_THRESH),</div><div class='add'>+			V_HP_INT_THRESH(dbfifo_int_thresh) |</div><div class='add'>+			V_LP_INT_THRESH(dbfifo_int_thresh));</div><div class='add'>+	t4_set_reg_field(adap, A_SGE_DOORBELL_CONTROL, F_ENABLE_DROP,</div><div class='add'>+			F_ENABLE_DROP);</div><div class='add'>+</div><div class='ctx'> 	for (i = v = 0; i &lt; 32; i += 4)</div><div class='ctx'> 		v |= (PAGE_SHIFT - 10) &lt;&lt; i;</div><div class='ctx'> 	t4_write_reg(adap, SGE_HOST_PAGE_SIZE, v);</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c<br/>index d1ec111aebd8..32e1dd566a14 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/chelsio/cxgb4/t4_hw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/t4_hw.c</a></div><div class='hunk'>@@ -868,11 +868,14 @@ int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port)</div><div class='ctx'> 	return t4_wr_mbox(adap, mbox, &amp;c, sizeof(c), NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+typedef void (*int_handler_t)(struct adapter *adap);</div><div class='add'>+</div><div class='ctx'> struct intr_info {</div><div class='ctx'> 	unsigned int mask;       /* bits to check in interrupt status */</div><div class='ctx'> 	const char *msg;         /* message to print or NULL */</div><div class='ctx'> 	short stat_idx;          /* stat counter to increment or -1 */</div><div class='ctx'> 	unsigned short fatal;    /* whether the condition reported is fatal */</div><div class='add'>+	int_handler_t int_handler; /* platform-specific int handler */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -905,6 +908,8 @@ static int t4_handle_intr_status(struct adapter *adapter, unsigned int reg,</div><div class='ctx'> 		} else if (acts-&gt;msg &amp;&amp; printk_ratelimit())</div><div class='ctx'> 			dev_warn(adapter-&gt;pdev_dev, "%s (0x%x)\n", acts-&gt;msg,</div><div class='ctx'> 				 status &amp; acts-&gt;mask);</div><div class='add'>+		if (acts-&gt;int_handler)</div><div class='add'>+			acts-&gt;int_handler(adapter);</div><div class='ctx'> 		mask |= acts-&gt;mask;</div><div class='ctx'> 	}</div><div class='ctx'> 	status &amp;= mask;</div><div class='hunk'>@@ -1013,7 +1018,9 @@ static void sge_intr_handler(struct adapter *adapter)</div><div class='ctx'> 		{ ERR_INVALID_CIDX_INC,</div><div class='ctx'> 		  "SGE GTS CIDX increment too large", -1, 0 },</div><div class='ctx'> 		{ ERR_CPL_OPCODE_0, "SGE received 0-length CPL", -1, 0 },</div><div class='del'>-		{ ERR_DROPPED_DB, "SGE doorbell dropped", -1, 0 },</div><div class='add'>+		{ F_DBFIFO_LP_INT, NULL, -1, 0, t4_db_full },</div><div class='add'>+		{ F_DBFIFO_HP_INT, NULL, -1, 0, t4_db_full },</div><div class='add'>+		{ F_ERR_DROPPED_DB, NULL, -1, 0, t4_db_dropped },</div><div class='ctx'> 		{ ERR_DATA_CPL_ON_HIGH_QID1 | ERR_DATA_CPL_ON_HIGH_QID0,</div><div class='ctx'> 		  "SGE IQID &gt; 1023 received CPL for FL", -1, 0 },</div><div class='ctx'> 		{ ERR_BAD_DB_PIDX3, "SGE DBP 3 pidx increment too large", -1,</div><div class='hunk'>@@ -1034,10 +1041,10 @@ static void sge_intr_handler(struct adapter *adapter)</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	v = (u64)t4_read_reg(adapter, SGE_INT_CAUSE1) |</div><div class='del'>-	    ((u64)t4_read_reg(adapter, SGE_INT_CAUSE2) &lt;&lt; 32);</div><div class='add'>+		((u64)t4_read_reg(adapter, SGE_INT_CAUSE2) &lt;&lt; 32);</div><div class='ctx'> 	if (v) {</div><div class='ctx'> 		dev_alert(adapter-&gt;pdev_dev, "SGE parity error (%#llx)\n",</div><div class='del'>-			 (unsigned long long)v);</div><div class='add'>+				(unsigned long long)v);</div><div class='ctx'> 		t4_write_reg(adapter, SGE_INT_CAUSE1, v);</div><div class='ctx'> 		t4_write_reg(adapter, SGE_INT_CAUSE2, v &gt;&gt; 32);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1513,6 +1520,7 @@ void t4_intr_enable(struct adapter *adapter)</div><div class='ctx'> 		     ERR_BAD_DB_PIDX2 | ERR_BAD_DB_PIDX1 |</div><div class='ctx'> 		     ERR_BAD_DB_PIDX0 | ERR_ING_CTXT_PRIO |</div><div class='ctx'> 		     ERR_EGR_CTXT_PRIO | INGRESS_SIZE_ERR |</div><div class='add'>+		     F_DBFIFO_HP_INT | F_DBFIFO_LP_INT |</div><div class='ctx'> 		     EGRESS_SIZE_ERR);</div><div class='ctx'> 	t4_write_reg(adapter, MYPF_REG(PL_PF_INT_ENABLE), PF_INTR_MASK);</div><div class='ctx'> 	t4_set_reg_field(adapter, PL_INT_MAP0, 0, 1 &lt;&lt; pf);</div><div class='hunk'>@@ -1986,6 +1994,54 @@ int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,</div><div class='ctx'> 	(var).retval_len16 = htonl(FW_LEN16(var)); \</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='add'>+int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox,</div><div class='add'>+			  u32 addr, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct fw_ldst_cmd c;</div><div class='add'>+</div><div class='add'>+	memset(&amp;c, 0, sizeof(c));</div><div class='add'>+	c.op_to_addrspace = htonl(V_FW_CMD_OP(FW_LDST_CMD) | F_FW_CMD_REQUEST |</div><div class='add'>+			    F_FW_CMD_WRITE |</div><div class='add'>+			    V_FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_FIRMWARE));</div><div class='add'>+	c.cycles_to_len16 = htonl(FW_LEN16(c));</div><div class='add'>+	c.u.addrval.addr = htonl(addr);</div><div class='add'>+	c.u.addrval.val = htonl(val);</div><div class='add'>+</div><div class='add'>+	return t4_wr_mbox(adap, mbox, &amp;c, sizeof(c), NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ *     t4_mem_win_read_len - read memory through PCIE memory window</div><div class='add'>+ *     @adap: the adapter</div><div class='add'>+ *     @addr: address of first byte requested aligned on 32b.</div><div class='add'>+ *     @data: len bytes to hold the data read</div><div class='add'>+ *     @len: amount of data to read from window.  Must be &lt;=</div><div class='add'>+ *            MEMWIN0_APERATURE after adjusting for 16B alignment</div><div class='add'>+ *            requirements of the the memory window.</div><div class='add'>+ *</div><div class='add'>+ *     Read len bytes of data from MC starting at @addr.</div><div class='add'>+ */</div><div class='add'>+int t4_mem_win_read_len(struct adapter *adap, u32 addr, __be32 *data, int len)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int off;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Align on a 16B boundary.</div><div class='add'>+	 */</div><div class='add'>+	off = addr &amp; 15;</div><div class='add'>+	if ((addr &amp; 3) || (len + off) &gt; MEMWIN0_APERTURE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	t4_write_reg(adap, A_PCIE_MEM_ACCESS_OFFSET, addr &amp; ~15);</div><div class='add'>+	t4_read_reg(adap, A_PCIE_MEM_ACCESS_OFFSET);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i += 4)</div><div class='add'>+		*data++ = t4_read_reg(adap, (MEMWIN0_BASE + off + i));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *	t4_mdio_rd - read a PHY register through MDIO</div><div class='ctx'>  *	@adap: the adapter</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h<br/>index 0adc5bcec7c4..111fc323f155 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/chelsio/cxgb4/t4_regs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/t4_regs.h</a></div><div class='hunk'>@@ -190,6 +190,59 @@</div><div class='ctx'> #define SGE_DEBUG_DATA_LOW 0x10d4</div><div class='ctx'> #define SGE_INGRESS_QUEUES_PER_PAGE_PF 0x10f4</div><div class='ctx'> </div><div class='add'>+#define S_LP_INT_THRESH    12</div><div class='add'>+#define V_LP_INT_THRESH(x) ((x) &lt;&lt; S_LP_INT_THRESH)</div><div class='add'>+#define S_HP_INT_THRESH    28</div><div class='add'>+#define V_HP_INT_THRESH(x) ((x) &lt;&lt; S_HP_INT_THRESH)</div><div class='add'>+#define A_SGE_DBFIFO_STATUS 0x10a4</div><div class='add'>+</div><div class='add'>+#define S_ENABLE_DROP    13</div><div class='add'>+#define V_ENABLE_DROP(x) ((x) &lt;&lt; S_ENABLE_DROP)</div><div class='add'>+#define F_ENABLE_DROP    V_ENABLE_DROP(1U)</div><div class='add'>+#define A_SGE_DOORBELL_CONTROL 0x10a8</div><div class='add'>+</div><div class='add'>+#define A_SGE_CTXT_CMD 0x11fc</div><div class='add'>+#define A_SGE_DBQ_CTXT_BADDR 0x1084</div><div class='add'>+</div><div class='add'>+#define A_SGE_PF_KDOORBELL 0x0</div><div class='add'>+</div><div class='add'>+#define S_QID 15</div><div class='add'>+#define V_QID(x) ((x) &lt;&lt; S_QID)</div><div class='add'>+</div><div class='add'>+#define S_PIDX 0</div><div class='add'>+#define V_PIDX(x) ((x) &lt;&lt; S_PIDX)</div><div class='add'>+</div><div class='add'>+#define M_LP_COUNT 0x7ffU</div><div class='add'>+#define S_LP_COUNT 0</div><div class='add'>+#define G_LP_COUNT(x) (((x) &gt;&gt; S_LP_COUNT) &amp; M_LP_COUNT)</div><div class='add'>+</div><div class='add'>+#define M_HP_COUNT 0x7ffU</div><div class='add'>+#define S_HP_COUNT 16</div><div class='add'>+#define G_HP_COUNT(x) (((x) &gt;&gt; S_HP_COUNT) &amp; M_HP_COUNT)</div><div class='add'>+</div><div class='add'>+#define A_SGE_INT_ENABLE3 0x1040</div><div class='add'>+</div><div class='add'>+#define S_DBFIFO_HP_INT 8</div><div class='add'>+#define V_DBFIFO_HP_INT(x) ((x) &lt;&lt; S_DBFIFO_HP_INT)</div><div class='add'>+#define F_DBFIFO_HP_INT V_DBFIFO_HP_INT(1U)</div><div class='add'>+</div><div class='add'>+#define S_DBFIFO_LP_INT 7</div><div class='add'>+#define V_DBFIFO_LP_INT(x) ((x) &lt;&lt; S_DBFIFO_LP_INT)</div><div class='add'>+#define F_DBFIFO_LP_INT V_DBFIFO_LP_INT(1U)</div><div class='add'>+</div><div class='add'>+#define S_DROPPED_DB 0</div><div class='add'>+#define V_DROPPED_DB(x) ((x) &lt;&lt; S_DROPPED_DB)</div><div class='add'>+#define F_DROPPED_DB V_DROPPED_DB(1U)</div><div class='add'>+</div><div class='add'>+#define S_ERR_DROPPED_DB 18</div><div class='add'>+#define V_ERR_DROPPED_DB(x) ((x) &lt;&lt; S_ERR_DROPPED_DB)</div><div class='add'>+#define F_ERR_DROPPED_DB V_ERR_DROPPED_DB(1U)</div><div class='add'>+</div><div class='add'>+#define A_PCIE_MEM_ACCESS_OFFSET 0x306c</div><div class='add'>+</div><div class='add'>+#define M_HP_INT_THRESH 0xfU</div><div class='add'>+#define M_LP_INT_THRESH 0xfU</div><div class='add'>+</div><div class='ctx'> #define PCIE_PF_CLI 0x44</div><div class='ctx'> #define PCIE_INT_CAUSE 0x3004</div><div class='ctx'> #define  UNXSPLCPLERR  0x20000000U</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h<br/>index edcfd7ec7802..ad53f796b574 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h</a></div><div class='hunk'>@@ -1620,4 +1620,19 @@ struct fw_hdr {</div><div class='ctx'> #define FW_HDR_FW_VER_MINOR_GET(x) (((x) &gt;&gt; 16) &amp; 0xff)</div><div class='ctx'> #define FW_HDR_FW_VER_MICRO_GET(x) (((x) &gt;&gt; 8) &amp; 0xff)</div><div class='ctx'> #define FW_HDR_FW_VER_BUILD_GET(x) (((x) &gt;&gt; 0) &amp; 0xff)</div><div class='add'>+</div><div class='add'>+#define S_FW_CMD_OP 24</div><div class='add'>+#define V_FW_CMD_OP(x) ((x) &lt;&lt; S_FW_CMD_OP)</div><div class='add'>+</div><div class='add'>+#define S_FW_CMD_REQUEST 23</div><div class='add'>+#define V_FW_CMD_REQUEST(x) ((x) &lt;&lt; S_FW_CMD_REQUEST)</div><div class='add'>+#define F_FW_CMD_REQUEST V_FW_CMD_REQUEST(1U)</div><div class='add'>+</div><div class='add'>+#define S_FW_CMD_WRITE 21</div><div class='add'>+#define V_FW_CMD_WRITE(x) ((x) &lt;&lt; S_FW_CMD_WRITE)</div><div class='add'>+#define F_FW_CMD_WRITE V_FW_CMD_WRITE(1U)</div><div class='add'>+</div><div class='add'>+#define S_FW_LDST_CMD_ADDRSPACE 0</div><div class='add'>+#define V_FW_LDST_CMD_ADDRSPACE(x) ((x) &lt;&lt; S_FW_LDST_CMD_ADDRSPACE)</div><div class='add'>+</div><div class='ctx'> #endif /* _T4FW_INTERFACE_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/cirrus/cs89x0.c b/drivers/net/ethernet/cirrus/cs89x0.c<br/>index b9406cbfc180..845b2020f291 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/cirrus/cs89x0.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/cirrus/cs89x0.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/cirrus/cs89x0.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/cirrus/cs89x0.c</a></div><div class='hunk'>@@ -1,105 +1,27 @@</div><div class='ctx'> /* cs89x0.c: A Crystal Semiconductor (Now Cirrus Logic) CS89[02]0</div><div class='del'>- *  driver for linux.</div><div class='add'>+ *           driver for linux.</div><div class='add'>+ * Written 1996 by Russell Nelson, with reference to skeleton.c</div><div class='add'>+ * written 1993-1994 by Donald Becker.</div><div class='add'>+ *</div><div class='add'>+ * This software may be used and distributed according to the terms</div><div class='add'>+ * of the GNU General Public License, incorporated herein by reference.</div><div class='add'>+ *</div><div class='add'>+ * The author may be reached at nelson@crynwr.com, Crynwr</div><div class='add'>+ * Software, 521 Pleasant Valley Rd., Potsdam, NY 13676</div><div class='add'>+ *</div><div class='add'>+ * Other contributors:</div><div class='add'>+ * Mike Cruse        : mcruse@cti-ltd.com</div><div class='add'>+ * Russ Nelson</div><div class='add'>+ * Melody Lee        : ethernet@crystal.cirrus.com</div><div class='add'>+ * Alan Cox</div><div class='add'>+ * Andrew Morton</div><div class='add'>+ * Oskar Schirmer    : oskar@scara.com</div><div class='add'>+ * Deepak Saxena     : dsaxena@plexity.net</div><div class='add'>+ * Dmitry Pervushin  : dpervushin@ru.mvista.com</div><div class='add'>+ * Deepak Saxena     : dsaxena@plexity.net</div><div class='add'>+ * Domenico Andreoli : cavokz@gmail.com</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>-	Written 1996 by Russell Nelson, with reference to skeleton.c</div><div class='del'>-	written 1993-1994 by Donald Becker.</div><div class='del'>-</div><div class='del'>-	This software may be used and distributed according to the terms</div><div class='del'>-	of the GNU General Public License, incorporated herein by reference.</div><div class='del'>-</div><div class='del'>-        The author may be reached at nelson@crynwr.com, Crynwr</div><div class='del'>-        Software, 521 Pleasant Valley Rd., Potsdam, NY 13676</div><div class='del'>-</div><div class='del'>-  Changelog:</div><div class='del'>-</div><div class='del'>-  Mike Cruse        : mcruse@cti-ltd.com</div><div class='del'>-                    : Changes for Linux 2.0 compatibility.</div><div class='del'>-                    : Added dev_id parameter in net_interrupt(),</div><div class='del'>-                    : request_irq() and free_irq(). Just NULL for now.</div><div class='del'>-</div><div class='del'>-  Mike Cruse        : Added MOD_INC_USE_COUNT and MOD_DEC_USE_COUNT macros</div><div class='del'>-                    : in net_open() and net_close() so kerneld would know</div><div class='del'>-                    : that the module is in use and wouldn't eject the</div><div class='del'>-                    : driver prematurely.</div><div class='del'>-</div><div class='del'>-  Mike Cruse        : Rewrote init_module() and cleanup_module using 8390.c</div><div class='del'>-                    : as an example. Disabled autoprobing in init_module(),</div><div class='del'>-                    : not a good thing to do to other devices while Linux</div><div class='del'>-                    : is running from all accounts.</div><div class='del'>-</div><div class='del'>-  Russ Nelson       : Jul 13 1998.  Added RxOnly DMA support.</div><div class='del'>-</div><div class='del'>-  Melody Lee        : Aug 10 1999.  Changes for Linux 2.2.5 compatibility.</div><div class='del'>-                    : email: ethernet@crystal.cirrus.com</div><div class='del'>-</div><div class='del'>-  Alan Cox          : Removed 1.2 support, added 2.1 extra counters.</div><div class='del'>-</div><div class='del'>-  Andrew Morton     : Kernel 2.3.48</div><div class='del'>-                    : Handle kmalloc() failures</div><div class='del'>-                    : Other resource allocation fixes</div><div class='del'>-                    : Add SMP locks</div><div class='del'>-                    : Integrate Russ Nelson's ALLOW_DMA functionality back in.</div><div class='del'>-                    : If ALLOW_DMA is true, make DMA runtime selectable</div><div class='del'>-                    : Folded in changes from Cirrus (Melody Lee</div><div class='del'>-                    : &lt;klee@crystal.cirrus.com&gt;)</div><div class='del'>-                    : Don't call netif_wake_queue() in net_send_packet()</div><div class='del'>-                    : Fixed an out-of-mem bug in dma_rx()</div><div class='del'>-                    : Updated Documentation/networking/cs89x0.txt</div><div class='del'>-</div><div class='del'>-  Andrew Morton     : Kernel 2.3.99-pre1</div><div class='del'>-                    : Use skb_reserve to longword align IP header (two places)</div><div class='del'>-                    : Remove a delay loop from dma_rx()</div><div class='del'>-                    : Replace '100' with HZ</div><div class='del'>-                    : Clean up a couple of skb API abuses</div><div class='del'>-                    : Added 'cs89x0_dma=N' kernel boot option</div><div class='del'>-                    : Correctly initialise lp-&gt;lock in non-module compile</div><div class='del'>-</div><div class='del'>-  Andrew Morton     : Kernel 2.3.99-pre4-1</div><div class='del'>-                    : MOD_INC/DEC race fix (see</div><div class='del'>-                    : http://www.uwsg.indiana.edu/hypermail/linux/kernel/0003.3/1532.html)</div><div class='del'>-</div><div class='del'>-  Andrew Morton     : Kernel 2.4.0-test7-pre2</div><div class='del'>-                    : Enhanced EEPROM support to cover more devices,</div><div class='del'>-                    :   abstracted IRQ mapping to support CONFIG_ARCH_CLPS7500 arch</div><div class='del'>-                    :   (Jason Gunthorpe &lt;jgg@ualberta.ca&gt;)</div><div class='del'>-</div><div class='del'>-  Andrew Morton     : Kernel 2.4.0-test11-pre4</div><div class='del'>-                    : Use dev-&gt;name in request_*() (Andrey Panin)</div><div class='del'>-                    : Fix an error-path memleak in init_module()</div><div class='del'>-                    : Preserve return value from request_irq()</div><div class='del'>-                    : Fix type of `media' module parm (Keith Owens)</div><div class='del'>-                    : Use SET_MODULE_OWNER()</div><div class='del'>-                    : Tidied up strange request_irq() abuse in net_open().</div><div class='del'>-</div><div class='del'>-  Andrew Morton     : Kernel 2.4.3-pre1</div><div class='del'>-                    : Request correct number of pages for DMA (Hugh Dickens)</div><div class='del'>-                    : Select PP_ChipID _after_ unregister_netdev in cleanup_module()</div><div class='del'>-                    :  because unregister_netdev() calls get_stats.</div><div class='del'>-                    : Make `version[]' __initdata</div><div class='del'>-                    : Uninlined the read/write reg/word functions.</div><div class='del'>-</div><div class='del'>-  Oskar Schirmer    : oskar@scara.com</div><div class='del'>-                    : HiCO.SH4 (superh) support added (irq#1, cs89x0_media=)</div><div class='del'>-</div><div class='del'>-  Deepak Saxena     : dsaxena@plexity.net</div><div class='del'>-                    : Intel IXDP2x01 (XScale ixp2x00 NPU) platform support</div><div class='del'>-</div><div class='del'>-  Dmitry Pervushin  : dpervushin@ru.mvista.com</div><div class='del'>-                    : PNX010X platform support</div><div class='del'>-</div><div class='del'>-  Deepak Saxena     : dsaxena@plexity.net</div><div class='del'>-                    : Intel IXDP2351 platform support</div><div class='del'>-</div><div class='del'>-  Dmitry Pervushin  : dpervushin@ru.mvista.com</div><div class='del'>-                    : PNX010X platform support</div><div class='del'>-</div><div class='del'>-  Domenico Andreoli : cavokz@gmail.com</div><div class='del'>-                    : QQ2440 platform support</div><div class='del'>-</div><div class='del'>-*/</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Set this to zero to disable DMA code</div><div class='hunk'>@@ -119,14 +41,12 @@</div><div class='ctx'>  */</div><div class='ctx'> #define DEBUGGING	1</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>-  Sources:</div><div class='del'>-</div><div class='del'>-	Crynwr packet driver epktisa.</div><div class='del'>-</div><div class='del'>-	Crystal Semiconductor data sheets.</div><div class='add'>+/* Sources:</div><div class='add'>+ *	Crynwr packet driver epktisa.</div><div class='add'>+ *	Crystal Semiconductor data sheets.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-*/</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/printk.h&gt;</div><div class='hunk'>@@ -147,8 +67,8 @@</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='ctx'> #if ALLOW_DMA</div><div class='hunk'>@@ -157,35 +77,55 @@</div><div class='ctx'> </div><div class='ctx'> #include "cs89x0.h"</div><div class='ctx'> </div><div class='add'>+#define cs89_dbg(val, level, fmt, ...)				\</div><div class='add'>+do {								\</div><div class='add'>+	if (val &lt;= net_debug)					\</div><div class='add'>+		pr_##level(fmt, ##__VA_ARGS__);			\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='ctx'> static char version[] __initdata =</div><div class='del'>-"cs89x0.c: v2.4.3-pre1 Russell Nelson &lt;nelson@crynwr.com&gt;, Andrew Morton\n";</div><div class='add'>+	"v2.4.3-pre1 Russell Nelson &lt;nelson@crynwr.com&gt;, Andrew Morton";</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME "cs89x0"</div><div class='ctx'> </div><div class='ctx'> /* First, a few definitions that the brave might change.</div><div class='del'>-   A zero-terminated list of I/O addresses to be probed. Some special flags..</div><div class='del'>-      Addr &amp; 1 = Read back the address port, look for signature and reset</div><div class='del'>-                 the page window before probing</div><div class='del'>-      Addr &amp; 3 = Reset the page window and probe</div><div class='del'>-   The CLPS eval board has the Cirrus chip at 0x80090300, in ARM IO space,</div><div class='del'>-   but it is possible that a Cirrus board could be plugged into the ISA</div><div class='del'>-   slots. */</div><div class='add'>+ * A zero-terminated list of I/O addresses to be probed. Some special flags..</div><div class='add'>+ * Addr &amp; 1 = Read back the address port, look for signature and reset</div><div class='add'>+ * the page window before probing</div><div class='add'>+ * Addr &amp; 3 = Reset the page window and probe</div><div class='add'>+ * The CLPS eval board has the Cirrus chip at 0x80090300, in ARM IO space,</div><div class='add'>+ * but it is possible that a Cirrus board could be plugged into the ISA</div><div class='add'>+ * slots.</div><div class='add'>+ */</div><div class='ctx'> /* The cs8900 has 4 IRQ pins, software selectable. cs8900_irq_map maps</div><div class='del'>-   them to system IRQ numbers. This mapping is card specific and is set to</div><div class='del'>-   the configuration of the Cirrus Eval board for this chip. */</div><div class='add'>+ * them to system IRQ numbers. This mapping is card specific and is set to</div><div class='add'>+ * the configuration of the Cirrus Eval board for this chip.</div><div class='add'>+ */</div><div class='ctx'> #if defined(CONFIG_MACH_IXDP2351)</div><div class='ctx'> #define CS89x0_NONISA_IRQ</div><div class='del'>-static unsigned int netcard_portlist[] __used __initdata = {IXDP2351_VIRT_CS8900_BASE, 0};</div><div class='del'>-static unsigned int cs8900_irq_map[] = {IRQ_IXDP2351_CS8900, 0, 0, 0};</div><div class='add'>+static unsigned int netcard_portlist[] __used __initdata = {</div><div class='add'>+	IXDP2351_VIRT_CS8900_BASE, 0</div><div class='add'>+};</div><div class='add'>+static unsigned int cs8900_irq_map[] = {</div><div class='add'>+	IRQ_IXDP2351_CS8900, 0, 0, 0</div><div class='add'>+};</div><div class='ctx'> #elif defined(CONFIG_ARCH_IXDP2X01)</div><div class='ctx'> #define CS89x0_NONISA_IRQ</div><div class='del'>-static unsigned int netcard_portlist[] __used __initdata = {IXDP2X01_CS8900_VIRT_BASE, 0};</div><div class='del'>-static unsigned int cs8900_irq_map[] = {IRQ_IXDP2X01_CS8900, 0, 0, 0};</div><div class='add'>+static unsigned int netcard_portlist[] __used __initdata = {</div><div class='add'>+	IXDP2X01_CS8900_VIRT_BASE, 0</div><div class='add'>+};</div><div class='add'>+static unsigned int cs8900_irq_map[] = {</div><div class='add'>+	IRQ_IXDP2X01_CS8900, 0, 0, 0</div><div class='add'>+};</div><div class='ctx'> #else</div><div class='ctx'> #ifndef CONFIG_CS89x0_PLATFORM</div><div class='del'>-static unsigned int netcard_portlist[] __used __initdata =</div><div class='del'>-   { 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0};</div><div class='del'>-static unsigned int cs8900_irq_map[] = {10,11,12,5};</div><div class='add'>+static unsigned int netcard_portlist[] __used __initdata = {</div><div class='add'>+	0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240,</div><div class='add'>+	0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0</div><div class='add'>+};</div><div class='add'>+static unsigned int cs8900_irq_map[] = {</div><div class='add'>+	10, 11, 12, 5</div><div class='add'>+};</div><div class='ctx'> #endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -222,6 +162,8 @@ struct net_local {</div><div class='ctx'> 	int send_underrun;	/* keep track of how many underruns in a row we get */</div><div class='ctx'> 	int force;		/* force various values; see FORCE* above. */</div><div class='ctx'> 	spinlock_t lock;</div><div class='add'>+	void __iomem *virt_addr;/* CS89x0 virtual address. */</div><div class='add'>+	unsigned long size;	/* Length of CS89x0 memory region. */</div><div class='ctx'> #if ALLOW_DMA</div><div class='ctx'> 	int use_dma;		/* Flag: we're using dma */</div><div class='ctx'> 	int dma;		/* DMA channel */</div><div class='hunk'>@@ -230,119 +172,42 @@ struct net_local {</div><div class='ctx'> 	unsigned char *end_dma_buff;	/* points to the end of the buffer */</div><div class='ctx'> 	unsigned char *rx_dma_ptr;	/* points to the next packet  */</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CS89x0_PLATFORM</div><div class='del'>-	void __iomem *virt_addr;/* Virtual address for accessing the CS89x0. */</div><div class='del'>-	unsigned long phys_addr;/* Physical address for accessing the CS89x0. */</div><div class='del'>-	unsigned long size;	/* Length of CS89x0 memory region. */</div><div class='del'>-#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Index to functions, as function prototypes. */</div><div class='del'>-</div><div class='del'>-static int cs89x0_probe1(struct net_device *dev, unsigned long ioaddr, int modular);</div><div class='del'>-static int net_open(struct net_device *dev);</div><div class='del'>-static netdev_tx_t net_send_packet(struct sk_buff *skb, struct net_device *dev);</div><div class='del'>-static irqreturn_t net_interrupt(int irq, void *dev_id);</div><div class='del'>-static void set_multicast_list(struct net_device *dev);</div><div class='del'>-static void net_timeout(struct net_device *dev);</div><div class='del'>-static void net_rx(struct net_device *dev);</div><div class='del'>-static int net_close(struct net_device *dev);</div><div class='del'>-static struct net_device_stats *net_get_stats(struct net_device *dev);</div><div class='del'>-static void reset_chip(struct net_device *dev);</div><div class='del'>-static int get_eeprom_data(struct net_device *dev, int off, int len, int *buffer);</div><div class='del'>-static int get_eeprom_cksum(int off, int len, int *buffer);</div><div class='del'>-static int set_mac_address(struct net_device *dev, void *addr);</div><div class='del'>-static void count_rx_errors(int status, struct net_device *dev);</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-static void net_poll_controller(struct net_device *dev);</div><div class='del'>-#endif</div><div class='del'>-#if ALLOW_DMA</div><div class='del'>-static void get_dma_channel(struct net_device *dev);</div><div class='del'>-static void release_dma_buff(struct net_local *lp);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* Example routines you must write ;-&gt;. */</div><div class='ctx'> #define tx_done(dev) 1</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Permit 'cs89x0_dma=N' in the kernel boot environment</div><div class='ctx'>  */</div><div class='del'>-#if !defined(MODULE) &amp;&amp; (ALLOW_DMA != 0)</div><div class='add'>+#if !defined(MODULE)</div><div class='add'>+#if ALLOW_DMA</div><div class='ctx'> static int g_cs89x0_dma;</div><div class='ctx'> </div><div class='ctx'> static int __init dma_fn(char *str)</div><div class='ctx'> {</div><div class='del'>-	g_cs89x0_dma = simple_strtol(str,NULL,0);</div><div class='add'>+	g_cs89x0_dma = simple_strtol(str, NULL, 0);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> __setup("cs89x0_dma=", dma_fn);</div><div class='del'>-#endif	/* !defined(MODULE) &amp;&amp; (ALLOW_DMA != 0) */</div><div class='add'>+#endif	/* ALLOW_DMA */</div><div class='ctx'> </div><div class='del'>-#ifndef MODULE</div><div class='ctx'> static int g_cs89x0_media__force;</div><div class='ctx'> </div><div class='ctx'> static int __init media_fn(char *str)</div><div class='ctx'> {</div><div class='del'>-	if (!strcmp(str, "rj45")) g_cs89x0_media__force = FORCE_RJ45;</div><div class='del'>-	else if (!strcmp(str, "aui")) g_cs89x0_media__force = FORCE_AUI;</div><div class='del'>-	else if (!strcmp(str, "bnc")) g_cs89x0_media__force = FORCE_BNC;</div><div class='add'>+	if (!strcmp(str, "rj45"))</div><div class='add'>+		g_cs89x0_media__force = FORCE_RJ45;</div><div class='add'>+	else if (!strcmp(str, "aui"))</div><div class='add'>+		g_cs89x0_media__force = FORCE_AUI;</div><div class='add'>+	else if (!strcmp(str, "bnc"))</div><div class='add'>+		g_cs89x0_media__force = FORCE_BNC;</div><div class='add'>+</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> __setup("cs89x0_media=", media_fn);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_CS89x0_PLATFORM</div><div class='del'>-/* Check for a network adaptor of this type, and return '0' iff one exists.</div><div class='del'>-   If dev-&gt;base_addr == 0, probe all likely locations.</div><div class='del'>-   If dev-&gt;base_addr == 1, always return failure.</div><div class='del'>-   If dev-&gt;base_addr == 2, allocate space for the device and return success</div><div class='del'>-   (detachable devices only).</div><div class='del'>-   Return 0 on success.</div><div class='del'>-   */</div><div class='del'>-</div><div class='del'>-struct net_device * __init cs89x0_probe(int unit)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = alloc_etherdev(sizeof(struct net_local));</div><div class='del'>-	unsigned *port;</div><div class='del'>-	int err = 0;</div><div class='del'>-	int irq;</div><div class='del'>-	int io;</div><div class='del'>-</div><div class='del'>-	if (!dev)</div><div class='del'>-		return ERR_PTR(-ENODEV);</div><div class='del'>-</div><div class='del'>-	sprintf(dev-&gt;name, "eth%d", unit);</div><div class='del'>-	netdev_boot_setup_check(dev);</div><div class='del'>-	io = dev-&gt;base_addr;</div><div class='del'>-	irq = dev-&gt;irq;</div><div class='del'>-</div><div class='del'>-	if (net_debug)</div><div class='del'>-		printk("cs89x0:cs89x0_probe(0x%x)\n", io);</div><div class='del'>-</div><div class='del'>-	if (io &gt; 0x1ff)	{	/* Check a single specified location. */</div><div class='del'>-		err = cs89x0_probe1(dev, io, 0);</div><div class='del'>-	} else if (io != 0) {	/* Don't probe at all. */</div><div class='del'>-		err = -ENXIO;</div><div class='del'>-	} else {</div><div class='del'>-		for (port = netcard_portlist; *port; port++) {</div><div class='del'>-			if (cs89x0_probe1(dev, *port, 0) == 0)</div><div class='del'>-				break;</div><div class='del'>-			dev-&gt;irq = irq;</div><div class='del'>-		}</div><div class='del'>-		if (!*port)</div><div class='del'>-			err = -ENODEV;</div><div class='del'>-	}</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-	return dev;</div><div class='del'>-out:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	printk(KERN_WARNING "cs89x0: no cs8900 or cs8920 detected.  Be sure to disable PnP with SETUP\n");</div><div class='del'>-	return ERR_PTR(err);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_MACH_IXDP2351)</div><div class='hunk'>@@ -369,36 +234,22 @@ writeword(unsigned long base_addr, int portno, u16 value)</div><div class='ctx'> {</div><div class='ctx'> 	__raw_writel(value, base_addr + (portno &lt;&lt; 1));</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-static u16</div><div class='del'>-readword(unsigned long base_addr, int portno)</div><div class='del'>-{</div><div class='del'>-	return inw(base_addr + portno);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-writeword(unsigned long base_addr, int portno, u16 value)</div><div class='del'>-{</div><div class='del'>-	outw(value, base_addr + portno);</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-readwords(unsigned long base_addr, int portno, void *buf, int length)</div><div class='add'>+static void readwords(struct net_local *lp, int portno, void *buf, int length)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *buf8 = (u8 *)buf;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		u16 tmp16;</div><div class='ctx'> </div><div class='del'>-		tmp16 = readword(base_addr, portno);</div><div class='add'>+		tmp16 = ioread16(lp-&gt;virt_addr + portno);</div><div class='ctx'> 		*buf8++ = (u8)tmp16;</div><div class='ctx'> 		*buf8++ = (u8)(tmp16 &gt;&gt; 8);</div><div class='ctx'> 	} while (--length);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-writewords(unsigned long base_addr, int portno, void *buf, int length)</div><div class='add'>+static void writewords(struct net_local *lp, int portno, void *buf, int length)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *buf8 = (u8 *)buf;</div><div class='ctx'> </div><div class='hunk'>@@ -407,32 +258,37 @@ writewords(unsigned long base_addr, int portno, void *buf, int length)</div><div class='ctx'> </div><div class='ctx'> 		tmp16 = *buf8++;</div><div class='ctx'> 		tmp16 |= (*buf8++) &lt;&lt; 8;</div><div class='del'>-		writeword(base_addr, portno, tmp16);</div><div class='add'>+		iowrite16(tmp16, lp-&gt;virt_addr + portno);</div><div class='ctx'> 	} while (--length);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u16</div><div class='ctx'> readreg(struct net_device *dev, u16 regno)</div><div class='ctx'> {</div><div class='del'>-	writeword(dev-&gt;base_addr, ADD_PORT, regno);</div><div class='del'>-	return readword(dev-&gt;base_addr, DATA_PORT);</div><div class='add'>+	struct net_local *lp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	iowrite16(regno, lp-&gt;virt_addr + ADD_PORT);</div><div class='add'>+	return ioread16(lp-&gt;virt_addr + DATA_PORT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> writereg(struct net_device *dev, u16 regno, u16 value)</div><div class='ctx'> {</div><div class='del'>-	writeword(dev-&gt;base_addr, ADD_PORT, regno);</div><div class='del'>-	writeword(dev-&gt;base_addr, DATA_PORT, value);</div><div class='add'>+	struct net_local *lp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	iowrite16(regno, lp-&gt;virt_addr + ADD_PORT);</div><div class='add'>+	iowrite16(value, lp-&gt;virt_addr + DATA_PORT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init</div><div class='ctx'> wait_eeprom_ready(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int timeout = jiffies;</div><div class='del'>-	/* check to see if the EEPROM is ready, a timeout is used -</div><div class='del'>-	   just in case EEPROM is ready when SI_BUSY in the</div><div class='del'>-	   PP_SelfST is clear */</div><div class='del'>-	while(readreg(dev, PP_SelfST) &amp; SI_BUSY)</div><div class='add'>+	/* check to see if the EEPROM is ready,</div><div class='add'>+	 * a timeout is used just in case EEPROM is ready when</div><div class='add'>+	 * SI_BUSY in the PP_SelfST is clear</div><div class='add'>+	 */</div><div class='add'>+	while (readreg(dev, PP_SelfST) &amp; SI_BUSY)</div><div class='ctx'> 		if (jiffies - timeout &gt;= 40)</div><div class='ctx'> 			return -1;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -443,17 +299,19 @@ get_eeprom_data(struct net_device *dev, int off, int len, int *buffer)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (net_debug &gt; 3) printk("EEPROM data from %x for %x:\n",off,len);</div><div class='add'>+	cs89_dbg(3, info, "EEPROM data from %x for %x:", off, len);</div><div class='ctx'> 	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		if (wait_eeprom_ready(dev) &lt; 0) return -1;</div><div class='add'>+		if (wait_eeprom_ready(dev) &lt; 0)</div><div class='add'>+			return -1;</div><div class='ctx'> 		/* Now send the EEPROM read command and EEPROM location to read */</div><div class='ctx'> 		writereg(dev, PP_EECMD, (off + i) | EEPROM_READ_CMD);</div><div class='del'>-		if (wait_eeprom_ready(dev) &lt; 0) return -1;</div><div class='add'>+		if (wait_eeprom_ready(dev) &lt; 0)</div><div class='add'>+			return -1;</div><div class='ctx'> 		buffer[i] = readreg(dev, PP_EEData);</div><div class='del'>-		if (net_debug &gt; 3) printk("%04x ", buffer[i]);</div><div class='add'>+		cs89_dbg(3, cont, " %04x", buffer[i]);</div><div class='ctx'> 	}</div><div class='del'>-	if (net_debug &gt; 3) printk("\n");</div><div class='del'>-        return 0;</div><div class='add'>+	cs89_dbg(3, cont, "\n");</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int  __init</div><div class='hunk'>@@ -470,341 +328,52 @@ get_eeprom_cksum(int off, int len, int *buffer)</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-/*</div><div class='del'>- * Polling receive - used by netconsole and other diagnostic tools</div><div class='del'>- * to allow network i/o with interrupts disabled.</div><div class='del'>- */</div><div class='del'>-static void net_poll_controller(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='del'>-	net_interrupt(dev-&gt;irq, dev);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops net_ops = {</div><div class='del'>-	.ndo_open		= net_open,</div><div class='del'>-	.ndo_stop		= net_close,</div><div class='del'>-	.ndo_tx_timeout		= net_timeout,</div><div class='del'>-	.ndo_start_xmit 	= net_send_packet,</div><div class='del'>-	.ndo_get_stats		= net_get_stats,</div><div class='del'>-	.ndo_set_rx_mode	= set_multicast_list,</div><div class='del'>-	.ndo_set_mac_address 	= set_mac_address,</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-	.ndo_poll_controller	= net_poll_controller,</div><div class='del'>-#endif</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='del'>-	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* This is the real probe routine.  Linux has a history of friendly device</div><div class='del'>-   probes on the ISA bus.  A good device probes avoids doing writes, and</div><div class='del'>-   verifies that the correct device exists and functions.</div><div class='del'>-   Return 0 on success.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init</div><div class='del'>-cs89x0_probe1(struct net_device *dev, unsigned long ioaddr, int modular)</div><div class='add'>+static void</div><div class='add'>+write_irq(struct net_device *dev, int chip_type, int irq)</div><div class='ctx'> {</div><div class='del'>-	struct net_local *lp = netdev_priv(dev);</div><div class='del'>-	static unsigned version_printed;</div><div class='ctx'> 	int i;</div><div class='del'>-	int tmp;</div><div class='del'>-	unsigned rev_type = 0;</div><div class='del'>-	int eeprom_buff[CHKSUM_LEN];</div><div class='del'>-	int retval;</div><div class='del'>-</div><div class='del'>-	/* Initialize the device structure. */</div><div class='del'>-	if (!modular) {</div><div class='del'>-		memset(lp, 0, sizeof(*lp));</div><div class='del'>-		spin_lock_init(&amp;lp-&gt;lock);</div><div class='del'>-#ifndef MODULE</div><div class='del'>-#if ALLOW_DMA</div><div class='del'>-		if (g_cs89x0_dma) {</div><div class='del'>-			lp-&gt;use_dma = 1;</div><div class='del'>-			lp-&gt;dma = g_cs89x0_dma;</div><div class='del'>-			lp-&gt;dmasize = 16;	/* Could make this an option... */</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-		lp-&gt;force = g_cs89x0_media__force;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	/* Grab the region so we can find another board if autoIRQ fails. */</div><div class='del'>-	/* WTF is going on here? */</div><div class='del'>-	if (!request_region(ioaddr &amp; ~3, NETCARD_IO_EXTENT, DRV_NAME)) {</div><div class='del'>-		printk(KERN_ERR "%s: request_region(0x%lx, 0x%x) failed\n",</div><div class='del'>-				DRV_NAME, ioaddr, NETCARD_IO_EXTENT);</div><div class='del'>-		retval = -EBUSY;</div><div class='del'>-		goto out1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* if they give us an odd I/O address, then do ONE write to</div><div class='del'>-           the address port, to get it back to address zero, where we</div><div class='del'>-           expect to find the EISA signature word. An IO with a base of 0x3</div><div class='del'>-	   will skip the test for the ADD_PORT. */</div><div class='del'>-	if (ioaddr &amp; 1) {</div><div class='del'>-		if (net_debug &gt; 1)</div><div class='del'>-			printk(KERN_INFO "%s: odd ioaddr 0x%lx\n", dev-&gt;name, ioaddr);</div><div class='del'>-	        if ((ioaddr &amp; 2) != 2)</div><div class='del'>-	        	if ((readword(ioaddr &amp; ~3, ADD_PORT) &amp; ADD_MASK) != ADD_SIG) {</div><div class='del'>-				printk(KERN_ERR "%s: bad signature 0x%x\n",</div><div class='del'>-					dev-&gt;name, readword(ioaddr &amp; ~3, ADD_PORT));</div><div class='del'>-		        	retval = -ENODEV;</div><div class='del'>-				goto out2;</div><div class='del'>-			}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ioaddr &amp;= ~3;</div><div class='del'>-	printk(KERN_DEBUG "PP_addr at %lx[%x]: 0x%x\n",</div><div class='del'>-			ioaddr, ADD_PORT, readword(ioaddr, ADD_PORT));</div><div class='del'>-	writeword(ioaddr, ADD_PORT, PP_ChipID);</div><div class='del'>-</div><div class='del'>-	tmp = readword(ioaddr, DATA_PORT);</div><div class='del'>-	if (tmp != CHIP_EISA_ID_SIG) {</div><div class='del'>-		printk(KERN_DEBUG "%s: incorrect signature at %lx[%x]: 0x%x!="</div><div class='del'>-			CHIP_EISA_ID_SIG_STR "\n",</div><div class='del'>-			dev-&gt;name, ioaddr, DATA_PORT, tmp);</div><div class='del'>-  		retval = -ENODEV;</div><div class='del'>-  		goto out2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Fill in the 'dev' fields. */</div><div class='del'>-	dev-&gt;base_addr = ioaddr;</div><div class='del'>-</div><div class='del'>-	/* get the chip type */</div><div class='del'>-	rev_type = readreg(dev, PRODUCT_ID_ADD);</div><div class='del'>-	lp-&gt;chip_type = rev_type &amp;~ REVISON_BITS;</div><div class='del'>-	lp-&gt;chip_revision = ((rev_type &amp; REVISON_BITS) &gt;&gt; 8) + 'A';</div><div class='del'>-</div><div class='del'>-	/* Check the chip type and revision in order to set the correct send command</div><div class='del'>-	CS8920 revision C and CS8900 revision F can use the faster send. */</div><div class='del'>-	lp-&gt;send_cmd = TX_AFTER_381;</div><div class='del'>-	if (lp-&gt;chip_type == CS8900 &amp;&amp; lp-&gt;chip_revision &gt;= 'F')</div><div class='del'>-		lp-&gt;send_cmd = TX_NOW;</div><div class='del'>-	if (lp-&gt;chip_type != CS8900 &amp;&amp; lp-&gt;chip_revision &gt;= 'C')</div><div class='del'>-		lp-&gt;send_cmd = TX_NOW;</div><div class='del'>-</div><div class='del'>-	if (net_debug  &amp;&amp;  version_printed++ == 0)</div><div class='del'>-		printk(version);</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "%s: cs89%c0%s rev %c found at %#3lx ",</div><div class='del'>-	       dev-&gt;name,</div><div class='del'>-	       lp-&gt;chip_type==CS8900?'0':'2',</div><div class='del'>-	       lp-&gt;chip_type==CS8920M?"M":"",</div><div class='del'>-	       lp-&gt;chip_revision,</div><div class='del'>-	       dev-&gt;base_addr);</div><div class='del'>-</div><div class='del'>-	reset_chip(dev);</div><div class='del'>-</div><div class='del'>-        /* Here we read the current configuration of the chip. If there</div><div class='del'>-	   is no Extended EEPROM then the idea is to not disturb the chip</div><div class='del'>-	   configuration, it should have been correctly setup by automatic</div><div class='del'>-	   EEPROM read on reset. So, if the chip says it read the EEPROM</div><div class='del'>-	   the driver will always do *something* instead of complain that</div><div class='del'>-	   adapter_cnf is 0. */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-        if ((readreg(dev, PP_SelfST) &amp; (EEPROM_OK | EEPROM_PRESENT)) ==</div><div class='del'>-	      (EEPROM_OK|EEPROM_PRESENT)) {</div><div class='del'>-	        /* Load the MAC. */</div><div class='del'>-		for (i=0; i &lt; ETH_ALEN/2; i++) {</div><div class='del'>-	                unsigned int Addr;</div><div class='del'>-			Addr = readreg(dev, PP_IA+i*2);</div><div class='del'>-		        dev-&gt;dev_addr[i*2] = Addr &amp; 0xFF;</div><div class='del'>-		        dev-&gt;dev_addr[i*2+1] = Addr &gt;&gt; 8;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	   	/* Load the Adapter Configuration.</div><div class='del'>-		   Note:  Barring any more specific information from some</div><div class='del'>-		   other source (ie EEPROM+Schematics), we would not know</div><div class='del'>-		   how to operate a 10Base2 interface on the AUI port.</div><div class='del'>-		   However, since we  do read the status of HCB1 and use</div><div class='del'>-		   settings that always result in calls to control_dc_dc(dev,0)</div><div class='del'>-		   a BNC interface should work if the enable pin</div><div class='del'>-		   (dc/dc converter) is on HCB1. It will be called AUI</div><div class='del'>-		   however. */</div><div class='del'>-</div><div class='del'>-		lp-&gt;adapter_cnf = 0;</div><div class='del'>-		i = readreg(dev, PP_LineCTL);</div><div class='del'>-		/* Preserve the setting of the HCB1 pin. */</div><div class='del'>-		if ((i &amp; (HCB1 | HCB1_ENBL)) ==  (HCB1 | HCB1_ENBL))</div><div class='del'>-			lp-&gt;adapter_cnf |= A_CNF_DC_DC_POLARITY;</div><div class='del'>-		/* Save the sqelch bit */</div><div class='del'>-		if ((i &amp; LOW_RX_SQUELCH) == LOW_RX_SQUELCH)</div><div class='del'>-			lp-&gt;adapter_cnf |= A_CNF_EXTND_10B_2 | A_CNF_LOW_RX_SQUELCH;</div><div class='del'>-		/* Check if the card is in 10Base-t only mode */</div><div class='del'>-		if ((i &amp; (AUI_ONLY | AUTO_AUI_10BASET)) == 0)</div><div class='del'>-			lp-&gt;adapter_cnf |=  A_CNF_10B_T | A_CNF_MEDIA_10B_T;</div><div class='del'>-		/* Check if the card is in AUI only mode */</div><div class='del'>-		if ((i &amp; (AUI_ONLY | AUTO_AUI_10BASET)) == AUI_ONLY)</div><div class='del'>-			lp-&gt;adapter_cnf |=  A_CNF_AUI | A_CNF_MEDIA_AUI;</div><div class='del'>-		/* Check if the card is in Auto mode. */</div><div class='del'>-		if ((i &amp; (AUI_ONLY | AUTO_AUI_10BASET)) == AUTO_AUI_10BASET)</div><div class='del'>-			lp-&gt;adapter_cnf |=  A_CNF_AUI | A_CNF_10B_T |</div><div class='del'>-			A_CNF_MEDIA_AUI | A_CNF_MEDIA_10B_T | A_CNF_MEDIA_AUTO;</div><div class='del'>-</div><div class='del'>-		if (net_debug &gt; 1)</div><div class='del'>-			printk(KERN_INFO "%s: PP_LineCTL=0x%x, adapter_cnf=0x%x\n",</div><div class='del'>-					dev-&gt;name, i, lp-&gt;adapter_cnf);</div><div class='del'>-</div><div class='del'>-		/* IRQ. Other chips already probe, see below. */</div><div class='del'>-		if (lp-&gt;chip_type == CS8900)</div><div class='del'>-			lp-&gt;isa_config = readreg(dev, PP_CS8900_ISAINT) &amp; INT_NO_MASK;</div><div class='del'>-</div><div class='del'>-		printk( "[Cirrus EEPROM] ");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-        printk("\n");</div><div class='del'>-</div><div class='del'>-	/* First check to see if an EEPROM is attached. */</div><div class='del'>-</div><div class='del'>-	if ((readreg(dev, PP_SelfST) &amp; EEPROM_PRESENT) == 0)</div><div class='del'>-		printk(KERN_WARNING "cs89x0: No EEPROM, relying on command line....\n");</div><div class='del'>-	else if (get_eeprom_data(dev, START_EEPROM_DATA,CHKSUM_LEN,eeprom_buff) &lt; 0) {</div><div class='del'>-		printk(KERN_WARNING "\ncs89x0: EEPROM read failed, relying on command line.\n");</div><div class='del'>-        } else if (get_eeprom_cksum(START_EEPROM_DATA,CHKSUM_LEN,eeprom_buff) &lt; 0) {</div><div class='del'>-		/* Check if the chip was able to read its own configuration starting</div><div class='del'>-		   at 0 in the EEPROM*/</div><div class='del'>-		if ((readreg(dev, PP_SelfST) &amp; (EEPROM_OK | EEPROM_PRESENT)) !=</div><div class='del'>-		    (EEPROM_OK|EEPROM_PRESENT))</div><div class='del'>-                	printk(KERN_WARNING "cs89x0: Extended EEPROM checksum bad and no Cirrus EEPROM, relying on command line\n");</div><div class='del'>-</div><div class='del'>-        } else {</div><div class='del'>-		/* This reads an extended EEPROM that is not documented</div><div class='del'>-		   in the CS8900 datasheet. */</div><div class='del'>-</div><div class='del'>-                /* get transmission control word  but keep the autonegotiation bits */</div><div class='del'>-                if (!lp-&gt;auto_neg_cnf) lp-&gt;auto_neg_cnf = eeprom_buff[AUTO_NEG_CNF_OFFSET/2];</div><div class='del'>-                /* Store adapter configuration */</div><div class='del'>-                if (!lp-&gt;adapter_cnf) lp-&gt;adapter_cnf = eeprom_buff[ADAPTER_CNF_OFFSET/2];</div><div class='del'>-                /* Store ISA configuration */</div><div class='del'>-                lp-&gt;isa_config = eeprom_buff[ISA_CNF_OFFSET/2];</div><div class='del'>-                dev-&gt;mem_start = eeprom_buff[PACKET_PAGE_OFFSET/2] &lt;&lt; 8;</div><div class='del'>-</div><div class='del'>-                /* eeprom_buff has 32-bit ints, so we can't just memcpy it */</div><div class='del'>-                /* store the initial memory base address */</div><div class='del'>-                for (i = 0; i &lt; ETH_ALEN/2; i++) {</div><div class='del'>-                        dev-&gt;dev_addr[i*2] = eeprom_buff[i];</div><div class='del'>-                        dev-&gt;dev_addr[i*2+1] = eeprom_buff[i] &gt;&gt; 8;</div><div class='del'>-                }</div><div class='del'>-		if (net_debug &gt; 1)</div><div class='del'>-			printk(KERN_DEBUG "%s: new adapter_cnf: 0x%x\n",</div><div class='del'>-				dev-&gt;name, lp-&gt;adapter_cnf);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* allow them to force multiple transceivers.  If they force multiple, autosense */</div><div class='del'>-        {</div><div class='del'>-		int count = 0;</div><div class='del'>-		if (lp-&gt;force &amp; FORCE_RJ45)	{lp-&gt;adapter_cnf |= A_CNF_10B_T; count++; }</div><div class='del'>-		if (lp-&gt;force &amp; FORCE_AUI) 	{lp-&gt;adapter_cnf |= A_CNF_AUI; count++; }</div><div class='del'>-		if (lp-&gt;force &amp; FORCE_BNC)	{lp-&gt;adapter_cnf |= A_CNF_10B_2; count++; }</div><div class='del'>-		if (count &gt; 1)			{lp-&gt;adapter_cnf |= A_CNF_MEDIA_AUTO; }</div><div class='del'>-		else if (lp-&gt;force &amp; FORCE_RJ45){lp-&gt;adapter_cnf |= A_CNF_MEDIA_10B_T; }</div><div class='del'>-		else if (lp-&gt;force &amp; FORCE_AUI)	{lp-&gt;adapter_cnf |= A_CNF_MEDIA_AUI; }</div><div class='del'>-		else if (lp-&gt;force &amp; FORCE_BNC)	{lp-&gt;adapter_cnf |= A_CNF_MEDIA_10B_2; }</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	if (net_debug &gt; 1)</div><div class='del'>-		printk(KERN_DEBUG "%s: after force 0x%x, adapter_cnf=0x%x\n",</div><div class='del'>-			dev-&gt;name, lp-&gt;force, lp-&gt;adapter_cnf);</div><div class='del'>-</div><div class='del'>-        /* FIXME: We don't let you set dc-dc polarity or low RX squelch from the command line: add it here */</div><div class='del'>-</div><div class='del'>-        /* FIXME: We don't let you set the IMM bit from the command line: add it to lp-&gt;auto_neg_cnf here */</div><div class='del'>-</div><div class='del'>-        /* FIXME: we don't set the Ethernet address on the command line.  Use</div><div class='del'>-           ifconfig IFACE hw ether AABBCCDDEEFF */</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "cs89x0 media %s%s%s",</div><div class='del'>-	       (lp-&gt;adapter_cnf &amp; A_CNF_10B_T)?"RJ-45,":"",</div><div class='del'>-	       (lp-&gt;adapter_cnf &amp; A_CNF_AUI)?"AUI,":"",</div><div class='del'>-	       (lp-&gt;adapter_cnf &amp; A_CNF_10B_2)?"BNC,":"");</div><div class='del'>-</div><div class='del'>-	lp-&gt;irq_map = 0xffff;</div><div class='ctx'> </div><div class='del'>-	/* If this is a CS8900 then no pnp soft */</div><div class='del'>-	if (lp-&gt;chip_type != CS8900 &amp;&amp;</div><div class='del'>-	    /* Check if the ISA IRQ has been set  */</div><div class='del'>-		(i = readreg(dev, PP_CS8920_ISAINT) &amp; 0xff,</div><div class='del'>-		 (i != 0 &amp;&amp; i &lt; CS8920_NO_INTS))) {</div><div class='del'>-		if (!dev-&gt;irq)</div><div class='del'>-			dev-&gt;irq = i;</div><div class='del'>-	} else {</div><div class='del'>-		i = lp-&gt;isa_config &amp; INT_NO_MASK;</div><div class='add'>+	if (chip_type == CS8900) {</div><div class='ctx'> #ifndef CONFIG_CS89x0_PLATFORM</div><div class='del'>-		if (lp-&gt;chip_type == CS8900) {</div><div class='del'>-#ifdef CS89x0_NONISA_IRQ</div><div class='del'>-		        i = cs8900_irq_map[0];</div><div class='add'>+		/* Search the mapping table for the corresponding IRQ pin. */</div><div class='add'>+		for (i = 0; i != ARRAY_SIZE(cs8900_irq_map); i++)</div><div class='add'>+			if (cs8900_irq_map[i] == irq)</div><div class='add'>+				break;</div><div class='add'>+		/* Not found */</div><div class='add'>+		if (i == ARRAY_SIZE(cs8900_irq_map))</div><div class='add'>+			i = 3;</div><div class='ctx'> #else</div><div class='del'>-			/* Translate the IRQ using the IRQ mapping table. */</div><div class='del'>-			if (i &gt;= ARRAY_SIZE(cs8900_irq_map))</div><div class='del'>-				printk("\ncs89x0: invalid ISA interrupt number %d\n", i);</div><div class='del'>-			else</div><div class='del'>-				i = cs8900_irq_map[i];</div><div class='del'>-</div><div class='del'>-			lp-&gt;irq_map = CS8900_IRQ_MAP; /* fixed IRQ map for CS8900 */</div><div class='del'>-		} else {</div><div class='del'>-			int irq_map_buff[IRQ_MAP_LEN/2];</div><div class='del'>-</div><div class='del'>-			if (get_eeprom_data(dev, IRQ_MAP_EEPROM_DATA,</div><div class='del'>-					    IRQ_MAP_LEN/2,</div><div class='del'>-					    irq_map_buff) &gt;= 0) {</div><div class='del'>-				if ((irq_map_buff[0] &amp; 0xff) == PNP_IRQ_FRMT)</div><div class='del'>-					lp-&gt;irq_map = (irq_map_buff[0]&gt;&gt;8) | (irq_map_buff[1] &lt;&lt; 8);</div><div class='del'>-			}</div><div class='del'>-#endif</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-		if (!dev-&gt;irq)</div><div class='del'>-			dev-&gt;irq = i;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk(" IRQ %d", dev-&gt;irq);</div><div class='del'>-</div><div class='del'>-#if ALLOW_DMA</div><div class='del'>-	if (lp-&gt;use_dma) {</div><div class='del'>-		get_dma_channel(dev);</div><div class='del'>-		printk(", DMA %d", dev-&gt;dma);</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='add'>+		/* INTRQ0 pin is used for interrupt generation. */</div><div class='add'>+		i = 0;</div><div class='ctx'> #endif</div><div class='del'>-	{</div><div class='del'>-		printk(", programmed I/O");</div><div class='add'>+		writereg(dev, PP_CS8900_ISAINT, i);</div><div class='add'>+	} else {</div><div class='add'>+		writereg(dev, PP_CS8920_ISAINT, irq);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	/* print the ethernet address. */</div><div class='del'>-	printk(", MAC %pM", dev-&gt;dev_addr);</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops	= &amp;net_ops;</div><div class='del'>-	dev-&gt;watchdog_timeo = HZ;</div><div class='del'>-</div><div class='del'>-	printk("\n");</div><div class='del'>-	if (net_debug)</div><div class='del'>-		printk("cs89x0_probe1() successful\n");</div><div class='del'>-</div><div class='del'>-	retval = register_netdev(dev);</div><div class='del'>-	if (retval)</div><div class='del'>-		goto out3;</div><div class='del'>-	return 0;</div><div class='del'>-out3:</div><div class='del'>-	writeword(dev-&gt;base_addr, ADD_PORT, PP_ChipID);</div><div class='del'>-out2:</div><div class='del'>-	release_region(ioaddr &amp; ~3, NETCARD_IO_EXTENT);</div><div class='del'>-out1:</div><div class='del'>-	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+count_rx_errors(int status, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;stats.rx_errors++;</div><div class='add'>+	if (status &amp; RX_RUNT)</div><div class='add'>+		dev-&gt;stats.rx_length_errors++;</div><div class='add'>+	if (status &amp; RX_EXTRA_DATA)</div><div class='add'>+		dev-&gt;stats.rx_length_errors++;</div><div class='add'>+	if ((status &amp; RX_CRC_ERROR) &amp;&amp; !(status &amp; (RX_EXTRA_DATA | RX_RUNT)))</div><div class='add'>+		/* per str 172 */</div><div class='add'>+		dev-&gt;stats.rx_crc_errors++;</div><div class='add'>+	if (status &amp; RX_DRIBBLE)</div><div class='add'>+		dev-&gt;stats.rx_frame_errors++;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*********************************</div><div class='ctx'>  * This page contains DMA routines</div><div class='del'>-**********************************/</div><div class='add'>+ *********************************/</div><div class='ctx'> </div><div class='ctx'> #if ALLOW_DMA</div><div class='ctx'> </div><div class='del'>-#define dma_page_eq(ptr1, ptr2) ((long)(ptr1)&gt;&gt;17 == (long)(ptr2)&gt;&gt;17)</div><div class='add'>+#define dma_page_eq(ptr1, ptr2) ((long)(ptr1) &gt;&gt; 17 == (long)(ptr2) &gt;&gt; 17)</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> get_dma_channel(struct net_device *dev)</div><div class='hunk'>@@ -833,11 +402,10 @@ write_dma(struct net_device *dev, int chip_type, int dma)</div><div class='ctx'> 	struct net_local *lp = netdev_priv(dev);</div><div class='ctx'> 	if ((lp-&gt;isa_config &amp; ANY_ISA_DMA) == 0)</div><div class='ctx'> 		return;</div><div class='del'>-	if (chip_type == CS8900) {</div><div class='del'>-		writereg(dev, PP_CS8900_ISADMA, dma-5);</div><div class='del'>-	} else {</div><div class='add'>+	if (chip_type == CS8900)</div><div class='add'>+		writereg(dev, PP_CS8900_ISADMA, dma - 5);</div><div class='add'>+	else</div><div class='ctx'> 		writereg(dev, PP_CS8920_ISADMA, dma);</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -847,18 +415,15 @@ set_dma_cfg(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (lp-&gt;use_dma) {</div><div class='ctx'> 		if ((lp-&gt;isa_config &amp; ANY_ISA_DMA) == 0) {</div><div class='del'>-			if (net_debug &gt; 3)</div><div class='del'>-				printk("set_dma_cfg(): no DMA\n");</div><div class='add'>+			cs89_dbg(3, err, "set_dma_cfg(): no DMA\n");</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (lp-&gt;isa_config &amp; ISA_RxDMA) {</div><div class='ctx'> 			lp-&gt;curr_rx_cfg |= RX_DMA_ONLY;</div><div class='del'>-			if (net_debug &gt; 3)</div><div class='del'>-				printk("set_dma_cfg(): RX_DMA_ONLY\n");</div><div class='add'>+			cs89_dbg(3, info, "set_dma_cfg(): RX_DMA_ONLY\n");</div><div class='ctx'> 		} else {</div><div class='ctx'> 			lp-&gt;curr_rx_cfg |= AUTO_RX_DMA;	/* not that we support it... */</div><div class='del'>-			if (net_debug &gt; 3)</div><div class='del'>-				printk("set_dma_cfg(): AUTO_RX_DMA\n");</div><div class='add'>+			cs89_dbg(3, info, "set_dma_cfg(): AUTO_RX_DMA\n");</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -868,7 +433,7 @@ dma_bufcfg(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_local *lp = netdev_priv(dev);</div><div class='ctx'> 	if (lp-&gt;use_dma)</div><div class='del'>-		return (lp-&gt;isa_config &amp; ANY_ISA_DMA)? RX_DMA_ENBL : 0;</div><div class='add'>+		return (lp-&gt;isa_config &amp; ANY_ISA_DMA) ? RX_DMA_ENBL : 0;</div><div class='ctx'> 	else</div><div class='ctx'> 		return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -898,13 +463,13 @@ dma_rx(struct net_device *dev)</div><div class='ctx'> 	int status, length;</div><div class='ctx'> 	unsigned char *bp = lp-&gt;rx_dma_ptr;</div><div class='ctx'> </div><div class='del'>-	status = bp[0] + (bp[1]&lt;&lt;8);</div><div class='del'>-	length = bp[2] + (bp[3]&lt;&lt;8);</div><div class='add'>+	status = bp[0] + (bp[1] &lt;&lt; 8);</div><div class='add'>+	length = bp[2] + (bp[3] &lt;&lt; 8);</div><div class='ctx'> 	bp += 4;</div><div class='del'>-	if (net_debug &gt; 5) {</div><div class='del'>-		printk(	"%s: receiving DMA packet at %lx, status %x, length %x\n",</div><div class='del'>-			dev-&gt;name, (unsigned long)bp, status, length);</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	cs89_dbg(5, debug, "%s: receiving DMA packet at %lx, status %x, length %x\n",</div><div class='add'>+		 dev-&gt;name, (unsigned long)bp, status, length);</div><div class='add'>+</div><div class='ctx'> 	if ((status &amp; RX_OK) == 0) {</div><div class='ctx'> 		count_rx_errors(status, dev);</div><div class='ctx'> 		goto skip_this_frame;</div><div class='hunk'>@@ -913,14 +478,16 @@ dma_rx(struct net_device *dev)</div><div class='ctx'> 	/* Malloc up new buffer. */</div><div class='ctx'> 	skb = netdev_alloc_skb(dev, length + 2);</div><div class='ctx'> 	if (skb == NULL) {</div><div class='del'>-		if (net_debug)	/* I don't think we want to do this to a stressed system */</div><div class='del'>-			printk("%s: Memory squeeze, dropping packet.\n", dev-&gt;name);</div><div class='add'>+		/* I don't think we want to do this to a stressed system */</div><div class='add'>+		cs89_dbg(0, err, "%s: Memory squeeze, dropping packet\n",</div><div class='add'>+			 dev-&gt;name);</div><div class='ctx'> 		dev-&gt;stats.rx_dropped++;</div><div class='ctx'> </div><div class='ctx'> 		/* AKPM: advance bp to the next frame */</div><div class='ctx'> skip_this_frame:</div><div class='ctx'> 		bp += (length + 3) &amp; ~3;</div><div class='del'>-		if (bp &gt;= lp-&gt;end_dma_buff) bp -= lp-&gt;dmasize*1024;</div><div class='add'>+		if (bp &gt;= lp-&gt;end_dma_buff)</div><div class='add'>+			bp -= lp-&gt;dmasize * 1024;</div><div class='ctx'> 		lp-&gt;rx_dma_ptr = bp;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -928,63 +495,38 @@ skip_this_frame:</div><div class='ctx'> </div><div class='ctx'> 	if (bp + length &gt; lp-&gt;end_dma_buff) {</div><div class='ctx'> 		int semi_cnt = lp-&gt;end_dma_buff - bp;</div><div class='del'>-		memcpy(skb_put(skb,semi_cnt), bp, semi_cnt);</div><div class='del'>-		memcpy(skb_put(skb,length - semi_cnt), lp-&gt;dma_buff,</div><div class='add'>+		memcpy(skb_put(skb, semi_cnt), bp, semi_cnt);</div><div class='add'>+		memcpy(skb_put(skb, length - semi_cnt), lp-&gt;dma_buff,</div><div class='ctx'> 		       length - semi_cnt);</div><div class='ctx'> 	} else {</div><div class='del'>-		memcpy(skb_put(skb,length), bp, length);</div><div class='add'>+		memcpy(skb_put(skb, length), bp, length);</div><div class='ctx'> 	}</div><div class='ctx'> 	bp += (length + 3) &amp; ~3;</div><div class='del'>-	if (bp &gt;= lp-&gt;end_dma_buff) bp -= lp-&gt;dmasize*1024;</div><div class='add'>+	if (bp &gt;= lp-&gt;end_dma_buff)</div><div class='add'>+		bp -= lp-&gt;dmasize*1024;</div><div class='ctx'> 	lp-&gt;rx_dma_ptr = bp;</div><div class='ctx'> </div><div class='del'>-	if (net_debug &gt; 3) {</div><div class='del'>-		printk(	"%s: received %d byte DMA packet of type %x\n",</div><div class='del'>-			dev-&gt;name, length,</div><div class='del'>-			(skb-&gt;data[ETH_ALEN+ETH_ALEN] &lt;&lt; 8) | skb-&gt;data[ETH_ALEN+ETH_ALEN+1]);</div><div class='del'>-	}</div><div class='del'>-        skb-&gt;protocol=eth_type_trans(skb,dev);</div><div class='add'>+	cs89_dbg(3, info, "%s: received %d byte DMA packet of type %x\n",</div><div class='add'>+		 dev-&gt;name, length,</div><div class='add'>+		 ((skb-&gt;data[ETH_ALEN + ETH_ALEN] &lt;&lt; 8) |</div><div class='add'>+		  skb-&gt;data[ETH_ALEN + ETH_ALEN + 1]));</div><div class='add'>+</div><div class='add'>+	skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> 	dev-&gt;stats.rx_packets++;</div><div class='ctx'> 	dev-&gt;stats.rx_bytes += length;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif	/* ALLOW_DMA */</div><div class='del'>-</div><div class='del'>-static void __init reset_chip(struct net_device *dev)</div><div class='add'>+static void release_dma_buff(struct net_local *lp)</div><div class='ctx'> {</div><div class='del'>-#if !defined(CONFIG_MACH_MX31ADS)</div><div class='del'>-#if !defined(CS89x0_NONISA_IRQ)</div><div class='del'>-	struct net_local *lp = netdev_priv(dev);</div><div class='del'>-	int ioaddr = dev-&gt;base_addr;</div><div class='del'>-#endif /* CS89x0_NONISA_IRQ */</div><div class='del'>-	int reset_start_time;</div><div class='del'>-</div><div class='del'>-	writereg(dev, PP_SelfCTL, readreg(dev, PP_SelfCTL) | POWER_ON_RESET);</div><div class='del'>-</div><div class='del'>-	/* wait 30 ms */</div><div class='del'>-	msleep(30);</div><div class='del'>-</div><div class='del'>-#if !defined(CS89x0_NONISA_IRQ)</div><div class='del'>-	if (lp-&gt;chip_type != CS8900) {</div><div class='del'>-		/* Hardware problem requires PNP registers to be reconfigured after a reset */</div><div class='del'>-		writeword(ioaddr, ADD_PORT, PP_CS8920_ISAINT);</div><div class='del'>-		outb(dev-&gt;irq, ioaddr + DATA_PORT);</div><div class='del'>-		outb(0,      ioaddr + DATA_PORT + 1);</div><div class='del'>-</div><div class='del'>-		writeword(ioaddr, ADD_PORT, PP_CS8920_ISAMemB);</div><div class='del'>-		outb((dev-&gt;mem_start &gt;&gt; 16) &amp; 0xff, ioaddr + DATA_PORT);</div><div class='del'>-		outb((dev-&gt;mem_start &gt;&gt; 8) &amp; 0xff,   ioaddr + DATA_PORT + 1);</div><div class='add'>+	if (lp-&gt;dma_buff) {</div><div class='add'>+		free_pages((unsigned long)(lp-&gt;dma_buff),</div><div class='add'>+			   get_order(lp-&gt;dmasize * 1024));</div><div class='add'>+		lp-&gt;dma_buff = NULL;</div><div class='ctx'> 	}</div><div class='del'>-#endif /* CS89x0_NONISA_IRQ */</div><div class='del'>-</div><div class='del'>-	/* Wait until the chip is reset */</div><div class='del'>-	reset_start_time = jiffies;</div><div class='del'>-	while( (readreg(dev, PP_SelfST) &amp; INIT_DONE) == 0 &amp;&amp; jiffies - reset_start_time &lt; 2)</div><div class='del'>-		;</div><div class='del'>-#endif /* !CONFIG_MACH_MX31ADS */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#endif	/* ALLOW_DMA */</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> control_dc_dc(struct net_device *dev, int on_not_off)</div><div class='hunk'>@@ -993,8 +535,9 @@ control_dc_dc(struct net_device *dev, int on_not_off)</div><div class='ctx'> 	unsigned int selfcontrol;</div><div class='ctx'> 	int timenow = jiffies;</div><div class='ctx'> 	/* control the DC to DC convertor in the SelfControl register.</div><div class='del'>-	   Note: This is hooked up to a general purpose pin, might not</div><div class='del'>-	   always be a DC to DC convertor. */</div><div class='add'>+	 * Note: This is hooked up to a general purpose pin, might not</div><div class='add'>+	 * always be a DC to DC convertor.</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='ctx'> 	selfcontrol = HCB1_ENBL; /* Enable the HCB1 bit as an output */</div><div class='ctx'> 	if (((lp-&gt;adapter_cnf &amp; A_CNF_DC_DC_POLARITY) != 0) ^ on_not_off)</div><div class='hunk'>@@ -1008,6 +551,49 @@ control_dc_dc(struct net_device *dev, int on_not_off)</div><div class='ctx'> 		;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* send a test packet - return true if carrier bits are ok */</div><div class='add'>+static int</div><div class='add'>+send_test_pkt(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_local *lp = netdev_priv(dev);</div><div class='add'>+	char test_packet[] = {</div><div class='add'>+		0, 0, 0, 0, 0, 0,  0, 0, 0, 0, 0, 0,</div><div class='add'>+		0, 46,		/* A 46 in network order */</div><div class='add'>+		0, 0,		/* DSAP=0 &amp; SSAP=0 fields */</div><div class='add'>+		0xf3, 0		/* Control (Test Req + P bit set) */</div><div class='add'>+	};</div><div class='add'>+	long timenow = jiffies;</div><div class='add'>+</div><div class='add'>+	writereg(dev, PP_LineCTL, readreg(dev, PP_LineCTL) | SERIAL_TX_ON);</div><div class='add'>+</div><div class='add'>+	memcpy(test_packet,            dev-&gt;dev_addr, ETH_ALEN);</div><div class='add'>+	memcpy(test_packet + ETH_ALEN, dev-&gt;dev_addr, ETH_ALEN);</div><div class='add'>+</div><div class='add'>+	iowrite16(TX_AFTER_ALL, lp-&gt;virt_addr + TX_CMD_PORT);</div><div class='add'>+	iowrite16(ETH_ZLEN, lp-&gt;virt_addr + TX_LEN_PORT);</div><div class='add'>+</div><div class='add'>+	/* Test to see if the chip has allocated memory for the packet */</div><div class='add'>+	while (jiffies - timenow &lt; 5)</div><div class='add'>+		if (readreg(dev, PP_BusST) &amp; READY_FOR_TX_NOW)</div><div class='add'>+			break;</div><div class='add'>+	if (jiffies - timenow &gt;= 5)</div><div class='add'>+		return 0;	/* this shouldn't happen */</div><div class='add'>+</div><div class='add'>+	/* Write the contents of the packet */</div><div class='add'>+	writewords(lp, TX_FRAME_PORT, test_packet, (ETH_ZLEN + 1) &gt;&gt; 1);</div><div class='add'>+</div><div class='add'>+	cs89_dbg(1, debug, "Sending test packet ");</div><div class='add'>+	/* wait a couple of jiffies for packet to be received */</div><div class='add'>+	for (timenow = jiffies; jiffies - timenow &lt; 3;)</div><div class='add'>+		;</div><div class='add'>+	if ((readreg(dev, PP_TxEvent) &amp; TX_SEND_OK_BITS) == TX_OK) {</div><div class='add'>+		cs89_dbg(1, cont, "succeeded\n");</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	cs89_dbg(1, cont, "failed\n");</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define DETECTED_NONE  0</div><div class='ctx'> #define DETECTED_RJ45H 1</div><div class='ctx'> #define DETECTED_RJ45F 2</div><div class='hunk'>@@ -1021,40 +607,46 @@ detect_tp(struct net_device *dev)</div><div class='ctx'> 	int timenow = jiffies;</div><div class='ctx'> 	int fdx;</div><div class='ctx'> </div><div class='del'>-	if (net_debug &gt; 1) printk("%s: Attempting TP\n", dev-&gt;name);</div><div class='add'>+	cs89_dbg(1, debug, "%s: Attempting TP\n", dev-&gt;name);</div><div class='ctx'> </div><div class='del'>-        /* If connected to another full duplex capable 10-Base-T card the link pulses</div><div class='del'>-           seem to be lost when the auto detect bit in the LineCTL is set.</div><div class='del'>-           To overcome this the auto detect bit will be cleared whilst testing the</div><div class='del'>-           10-Base-T interface.  This would not be necessary for the sparrow chip but</div><div class='del'>-           is simpler to do it anyway. */</div><div class='del'>-	writereg(dev, PP_LineCTL, lp-&gt;linectl &amp;~ AUI_ONLY);</div><div class='add'>+	/* If connected to another full duplex capable 10-Base-T card</div><div class='add'>+	 * the link pulses seem to be lost when the auto detect bit in</div><div class='add'>+	 * the LineCTL is set.  To overcome this the auto detect bit will</div><div class='add'>+	 * be cleared whilst testing the 10-Base-T interface.  This would</div><div class='add'>+	 * not be necessary for the sparrow chip but is simpler to do it</div><div class='add'>+	 * anyway.</div><div class='add'>+	 */</div><div class='add'>+	writereg(dev, PP_LineCTL, lp-&gt;linectl &amp; ~AUI_ONLY);</div><div class='ctx'> 	control_dc_dc(dev, 0);</div><div class='ctx'> </div><div class='del'>-        /* Delay for the hardware to work out if the TP cable is present - 150ms */</div><div class='del'>-	for (timenow = jiffies; jiffies - timenow &lt; 15; )</div><div class='del'>-                ;</div><div class='add'>+	/* Delay for the hardware to work out if the TP cable is present</div><div class='add'>+	 * - 150ms</div><div class='add'>+	 */</div><div class='add'>+	for (timenow = jiffies; jiffies - timenow &lt; 15;)</div><div class='add'>+		;</div><div class='ctx'> 	if ((readreg(dev, PP_LineST) &amp; LINK_OK) == 0)</div><div class='ctx'> 		return DETECTED_NONE;</div><div class='ctx'> </div><div class='ctx'> 	if (lp-&gt;chip_type == CS8900) {</div><div class='del'>-                switch (lp-&gt;force &amp; 0xf0) {</div><div class='add'>+		switch (lp-&gt;force &amp; 0xf0) {</div><div class='ctx'> #if 0</div><div class='del'>-                case FORCE_AUTO:</div><div class='del'>-			printk("%s: cs8900 doesn't autonegotiate\n",dev-&gt;name);</div><div class='del'>-                        return DETECTED_NONE;</div><div class='add'>+		case FORCE_AUTO:</div><div class='add'>+			pr_info("%s: cs8900 doesn't autonegotiate\n",</div><div class='add'>+				dev-&gt;name);</div><div class='add'>+			return DETECTED_NONE;</div><div class='ctx'> #endif</div><div class='del'>-		/* CS8900 doesn't support AUTO, change to HALF*/</div><div class='del'>-                case FORCE_AUTO:</div><div class='add'>+			/* CS8900 doesn't support AUTO, change to HALF*/</div><div class='add'>+		case FORCE_AUTO:</div><div class='ctx'> 			lp-&gt;force &amp;= ~FORCE_AUTO;</div><div class='del'>-                        lp-&gt;force |= FORCE_HALF;</div><div class='add'>+			lp-&gt;force |= FORCE_HALF;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FORCE_HALF:</div><div class='ctx'> 			break;</div><div class='del'>-                case FORCE_FULL:</div><div class='del'>-			writereg(dev, PP_TestCTL, readreg(dev, PP_TestCTL) | FDX_8900);</div><div class='add'>+		case FORCE_FULL:</div><div class='add'>+			writereg(dev, PP_TestCTL,</div><div class='add'>+				 readreg(dev, PP_TestCTL) | FDX_8900);</div><div class='ctx'> 			break;</div><div class='del'>-                }</div><div class='add'>+		}</div><div class='ctx'> 		fdx = readreg(dev, PP_TestCTL) &amp; FDX_8900;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		switch (lp-&gt;force &amp; 0xf0) {</div><div class='hunk'>@@ -1067,15 +659,15 @@ detect_tp(struct net_device *dev)</div><div class='ctx'> 		case FORCE_FULL:</div><div class='ctx'> 			lp-&gt;auto_neg_cnf = RE_NEG_NOW | ALLOW_FDX;</div><div class='ctx'> 			break;</div><div class='del'>-                }</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		writereg(dev, PP_AutoNegCTL, lp-&gt;auto_neg_cnf &amp; AUTO_NEG_MASK);</div><div class='ctx'> </div><div class='ctx'> 		if ((lp-&gt;auto_neg_cnf &amp; AUTO_NEG_BITS) == AUTO_NEG_ENABLE) {</div><div class='del'>-			printk(KERN_INFO "%s: negotiating duplex...\n",dev-&gt;name);</div><div class='add'>+			pr_info("%s: negotiating duplex...\n", dev-&gt;name);</div><div class='ctx'> 			while (readreg(dev, PP_AutoNegST) &amp; AUTO_NEG_BUSY) {</div><div class='ctx'> 				if (jiffies - timenow &gt; 4000) {</div><div class='del'>-					printk(KERN_ERR "**** Full / half duplex auto-negotiation timed out ****\n");</div><div class='add'>+					pr_err("**** Full / half duplex auto-negotiation timed out ****\n");</div><div class='ctx'> 					break;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1088,56 +680,31 @@ detect_tp(struct net_device *dev)</div><div class='ctx'> 		return DETECTED_RJ45H;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* send a test packet - return true if carrier bits are ok */</div><div class='ctx'> static int</div><div class='del'>-send_test_pkt(struct net_device *dev)</div><div class='add'>+detect_bnc(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	char test_packet[] = { 0,0,0,0,0,0, 0,0,0,0,0,0,</div><div class='del'>-				 0, 46, /* A 46 in network order */</div><div class='del'>-				 0, 0, /* DSAP=0 &amp; SSAP=0 fields */</div><div class='del'>-				 0xf3, 0 /* Control (Test Req + P bit set) */ };</div><div class='del'>-	long timenow = jiffies;</div><div class='del'>-</div><div class='del'>-	writereg(dev, PP_LineCTL, readreg(dev, PP_LineCTL) | SERIAL_TX_ON);</div><div class='del'>-</div><div class='del'>-	memcpy(test_packet,          dev-&gt;dev_addr, ETH_ALEN);</div><div class='del'>-	memcpy(test_packet+ETH_ALEN, dev-&gt;dev_addr, ETH_ALEN);</div><div class='del'>-</div><div class='del'>-        writeword(dev-&gt;base_addr, TX_CMD_PORT, TX_AFTER_ALL);</div><div class='del'>-        writeword(dev-&gt;base_addr, TX_LEN_PORT, ETH_ZLEN);</div><div class='add'>+	struct net_local *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	/* Test to see if the chip has allocated memory for the packet */</div><div class='del'>-	while (jiffies - timenow &lt; 5)</div><div class='del'>-		if (readreg(dev, PP_BusST) &amp; READY_FOR_TX_NOW)</div><div class='del'>-			break;</div><div class='del'>-	if (jiffies - timenow &gt;= 5)</div><div class='del'>-		return 0;	/* this shouldn't happen */</div><div class='add'>+	cs89_dbg(1, debug, "%s: Attempting BNC\n", dev-&gt;name);</div><div class='add'>+	control_dc_dc(dev, 1);</div><div class='ctx'> </div><div class='del'>-	/* Write the contents of the packet */</div><div class='del'>-	writewords(dev-&gt;base_addr, TX_FRAME_PORT,test_packet,(ETH_ZLEN+1) &gt;&gt;1);</div><div class='add'>+	writereg(dev, PP_LineCTL, (lp-&gt;linectl &amp; ~AUTO_AUI_10BASET) | AUI_ONLY);</div><div class='ctx'> </div><div class='del'>-	if (net_debug &gt; 1) printk("Sending test packet ");</div><div class='del'>-	/* wait a couple of jiffies for packet to be received */</div><div class='del'>-	for (timenow = jiffies; jiffies - timenow &lt; 3; )</div><div class='del'>-                ;</div><div class='del'>-        if ((readreg(dev, PP_TxEvent) &amp; TX_SEND_OK_BITS) == TX_OK) {</div><div class='del'>-                if (net_debug &gt; 1) printk("succeeded\n");</div><div class='del'>-                return 1;</div><div class='del'>-        }</div><div class='del'>-	if (net_debug &gt; 1) printk("failed\n");</div><div class='del'>-	return 0;</div><div class='add'>+	if (send_test_pkt(dev))</div><div class='add'>+		return DETECTED_BNC;</div><div class='add'>+	else</div><div class='add'>+		return DETECTED_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int</div><div class='ctx'> detect_aui(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_local *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (net_debug &gt; 1) printk("%s: Attempting AUI\n", dev-&gt;name);</div><div class='add'>+	cs89_dbg(1, debug, "%s: Attempting AUI\n", dev-&gt;name);</div><div class='ctx'> 	control_dc_dc(dev, 0);</div><div class='ctx'> </div><div class='del'>-	writereg(dev, PP_LineCTL, (lp-&gt;linectl &amp;~ AUTO_AUI_10BASET) | AUI_ONLY);</div><div class='add'>+	writereg(dev, PP_LineCTL, (lp-&gt;linectl &amp; ~AUTO_AUI_10BASET) | AUI_ONLY);</div><div class='ctx'> </div><div class='ctx'> 	if (send_test_pkt(dev))</div><div class='ctx'> 		return DETECTED_AUI;</div><div class='hunk'>@@ -1145,45 +712,154 @@ detect_aui(struct net_device *dev)</div><div class='ctx'> 		return DETECTED_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-detect_bnc(struct net_device *dev)</div><div class='add'>+/* We have a good packet(s), get it/them out of the buffers. */</div><div class='add'>+static void</div><div class='add'>+net_rx(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_local *lp = netdev_priv(dev);</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int status, length;</div><div class='ctx'> </div><div class='del'>-	if (net_debug &gt; 1) printk("%s: Attempting BNC\n", dev-&gt;name);</div><div class='del'>-	control_dc_dc(dev, 1);</div><div class='add'>+	status = ioread16(lp-&gt;virt_addr + RX_FRAME_PORT);</div><div class='add'>+	length = ioread16(lp-&gt;virt_addr + RX_FRAME_PORT);</div><div class='ctx'> </div><div class='del'>-	writereg(dev, PP_LineCTL, (lp-&gt;linectl &amp;~ AUTO_AUI_10BASET) | AUI_ONLY);</div><div class='add'>+	if ((status &amp; RX_OK) == 0) {</div><div class='add'>+		count_rx_errors(status, dev);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (send_test_pkt(dev))</div><div class='del'>-		return DETECTED_BNC;</div><div class='del'>-	else</div><div class='del'>-		return DETECTED_NONE;</div><div class='add'>+	/* Malloc up new buffer. */</div><div class='add'>+	skb = netdev_alloc_skb(dev, length + 2);</div><div class='add'>+	if (skb == NULL) {</div><div class='add'>+#if 0		/* Again, this seems a cruel thing to do */</div><div class='add'>+		pr_warn("%s: Memory squeeze, dropping packet\n", dev-&gt;name);</div><div class='add'>+#endif</div><div class='add'>+		dev-&gt;stats.rx_dropped++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	skb_reserve(skb, 2);	/* longword align L3 header */</div><div class='add'>+</div><div class='add'>+	readwords(lp, RX_FRAME_PORT, skb_put(skb, length), length &gt;&gt; 1);</div><div class='add'>+	if (length &amp; 1)</div><div class='add'>+		skb-&gt;data[length-1] = ioread16(lp-&gt;virt_addr + RX_FRAME_PORT);</div><div class='add'>+</div><div class='add'>+	cs89_dbg(3, debug, "%s: received %d byte packet of type %x\n",</div><div class='add'>+		 dev-&gt;name, length,</div><div class='add'>+		 (skb-&gt;data[ETH_ALEN + ETH_ALEN] &lt;&lt; 8) |</div><div class='add'>+		 skb-&gt;data[ETH_ALEN + ETH_ALEN + 1]);</div><div class='add'>+</div><div class='add'>+	skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+	dev-&gt;stats.rx_packets++;</div><div class='add'>+	dev-&gt;stats.rx_bytes += length;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* The typical workload of the driver:</div><div class='add'>+ * Handle the network interface interrupts.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-write_irq(struct net_device *dev, int chip_type, int irq)</div><div class='add'>+static irqreturn_t net_interrupt(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	struct net_device *dev = dev_id;</div><div class='add'>+	struct net_local *lp;</div><div class='add'>+	int status;</div><div class='add'>+	int handled = 0;</div><div class='ctx'> </div><div class='del'>-	if (chip_type == CS8900) {</div><div class='del'>-#ifndef CONFIG_CS89x0_PLATFORM</div><div class='del'>-		/* Search the mapping table for the corresponding IRQ pin. */</div><div class='del'>-		for (i = 0; i != ARRAY_SIZE(cs8900_irq_map); i++)</div><div class='del'>-			if (cs8900_irq_map[i] == irq)</div><div class='del'>-				break;</div><div class='del'>-		/* Not found */</div><div class='del'>-		if (i == ARRAY_SIZE(cs8900_irq_map))</div><div class='del'>-			i = 3;</div><div class='del'>-#else</div><div class='del'>-		/* INTRQ0 pin is used for interrupt generation. */</div><div class='del'>-		i = 0;</div><div class='add'>+	lp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	/* we MUST read all the events out of the ISQ, otherwise we'll never</div><div class='add'>+	 * get interrupted again.  As a consequence, we can't have any limit</div><div class='add'>+	 * on the number of times we loop in the interrupt handler.  The</div><div class='add'>+	 * hardware guarantees that eventually we'll run out of events.  Of</div><div class='add'>+	 * course, if you're on a slow machine, and packets are arriving</div><div class='add'>+	 * faster than you can read them off, you're screwed.  Hasta la</div><div class='add'>+	 * vista, baby!</div><div class='add'>+	 */</div><div class='add'>+	while ((status = ioread16(lp-&gt;virt_addr + ISQ_PORT))) {</div><div class='add'>+		cs89_dbg(4, debug, "%s: event=%04x\n", dev-&gt;name, status);</div><div class='add'>+		handled = 1;</div><div class='add'>+		switch (status &amp; ISQ_EVENT_MASK) {</div><div class='add'>+		case ISQ_RECEIVER_EVENT:</div><div class='add'>+			/* Got a packet(s). */</div><div class='add'>+			net_rx(dev);</div><div class='add'>+			break;</div><div class='add'>+		case ISQ_TRANSMITTER_EVENT:</div><div class='add'>+			dev-&gt;stats.tx_packets++;</div><div class='add'>+			netif_wake_queue(dev);	/* Inform upper layers. */</div><div class='add'>+			if ((status &amp; (TX_OK |</div><div class='add'>+				       TX_LOST_CRS |</div><div class='add'>+				       TX_SQE_ERROR |</div><div class='add'>+				       TX_LATE_COL |</div><div class='add'>+				       TX_16_COL)) != TX_OK) {</div><div class='add'>+				if ((status &amp; TX_OK) == 0)</div><div class='add'>+					dev-&gt;stats.tx_errors++;</div><div class='add'>+				if (status &amp; TX_LOST_CRS)</div><div class='add'>+					dev-&gt;stats.tx_carrier_errors++;</div><div class='add'>+				if (status &amp; TX_SQE_ERROR)</div><div class='add'>+					dev-&gt;stats.tx_heartbeat_errors++;</div><div class='add'>+				if (status &amp; TX_LATE_COL)</div><div class='add'>+					dev-&gt;stats.tx_window_errors++;</div><div class='add'>+				if (status &amp; TX_16_COL)</div><div class='add'>+					dev-&gt;stats.tx_aborted_errors++;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case ISQ_BUFFER_EVENT:</div><div class='add'>+			if (status &amp; READY_FOR_TX) {</div><div class='add'>+				/* we tried to transmit a packet earlier,</div><div class='add'>+				 * but inexplicably ran out of buffers.</div><div class='add'>+				 * That shouldn't happen since we only ever</div><div class='add'>+				 * load one packet.  Shrug.  Do the right</div><div class='add'>+				 * thing anyway.</div><div class='add'>+				 */</div><div class='add'>+				netif_wake_queue(dev);	/* Inform upper layers. */</div><div class='add'>+			}</div><div class='add'>+			if (status &amp; TX_UNDERRUN) {</div><div class='add'>+				cs89_dbg(0, err, "%s: transmit underrun\n",</div><div class='add'>+					 dev-&gt;name);</div><div class='add'>+				lp-&gt;send_underrun++;</div><div class='add'>+				if (lp-&gt;send_underrun == 3)</div><div class='add'>+					lp-&gt;send_cmd = TX_AFTER_381;</div><div class='add'>+				else if (lp-&gt;send_underrun == 6)</div><div class='add'>+					lp-&gt;send_cmd = TX_AFTER_ALL;</div><div class='add'>+				/* transmit cycle is done, although</div><div class='add'>+				 * frame wasn't transmitted - this</div><div class='add'>+				 * avoids having to wait for the upper</div><div class='add'>+				 * layers to timeout on us, in the</div><div class='add'>+				 * event of a tx underrun</div><div class='add'>+				 */</div><div class='add'>+				netif_wake_queue(dev);	/* Inform upper layers. */</div><div class='add'>+			}</div><div class='add'>+#if ALLOW_DMA</div><div class='add'>+			if (lp-&gt;use_dma &amp;&amp; (status &amp; RX_DMA)) {</div><div class='add'>+				int count = readreg(dev, PP_DmaFrameCnt);</div><div class='add'>+				while (count) {</div><div class='add'>+					cs89_dbg(5, debug,</div><div class='add'>+						 "%s: receiving %d DMA frames\n",</div><div class='add'>+						 dev-&gt;name, count);</div><div class='add'>+					if (count &gt; 1)</div><div class='add'>+						cs89_dbg(2, debug,</div><div class='add'>+							 "%s: receiving %d DMA frames\n",</div><div class='add'>+							 dev-&gt;name, count);</div><div class='add'>+					dma_rx(dev);</div><div class='add'>+					if (--count == 0)</div><div class='add'>+						count = readreg(dev, PP_DmaFrameCnt);</div><div class='add'>+					if (count &gt; 0)</div><div class='add'>+						cs89_dbg(2, debug,</div><div class='add'>+							 "%s: continuing with %d DMA frames\n",</div><div class='add'>+							 dev-&gt;name, count);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='ctx'> #endif</div><div class='del'>-		writereg(dev, PP_CS8900_ISAINT, i);</div><div class='del'>-	} else {</div><div class='del'>-		writereg(dev, PP_CS8920_ISAINT, irq);</div><div class='add'>+			break;</div><div class='add'>+		case ISQ_RX_MISS_EVENT:</div><div class='add'>+			dev-&gt;stats.rx_missed_errors += (status &gt;&gt; 6);</div><div class='add'>+			break;</div><div class='add'>+		case ISQ_TX_COL_EVENT:</div><div class='add'>+			dev-&gt;stats.collisions += (status &gt;&gt; 6);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='add'>+	return IRQ_RETVAL(handled);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Open/initialize the board.  This is called (in the current kernel)</div><div class='hunk'>@@ -1192,7 +868,7 @@ write_irq(struct net_device *dev, int chip_type, int irq)</div><div class='ctx'>    This routine should set everything up anew at each open, even</div><div class='ctx'>    registers that "should" only need to be set once at boot, so that</div><div class='ctx'>    there is non-reboot way to recover if something goes wrong.</div><div class='del'>-   */</div><div class='add'>+*/</div><div class='ctx'> </div><div class='ctx'> /* AKPM: do we need to do any locking here? */</div><div class='ctx'> </div><div class='hunk'>@@ -1208,14 +884,15 @@ net_open(struct net_device *dev)</div><div class='ctx'> 		/* Allow interrupts to be generated by the chip */</div><div class='ctx'> /* Cirrus' release had this: */</div><div class='ctx'> #if 0</div><div class='del'>-		writereg(dev, PP_BusCTL, readreg(dev, PP_BusCTL)|ENABLE_IRQ );</div><div class='add'>+		writereg(dev, PP_BusCTL, readreg(dev, PP_BusCTL) | ENABLE_IRQ);</div><div class='ctx'> #endif</div><div class='ctx'> /* And 2.3.47 had this: */</div><div class='ctx'> 		writereg(dev, PP_BusCTL, ENABLE_IRQ | MEMORY_ON);</div><div class='ctx'> </div><div class='ctx'> 		for (i = 2; i &lt; CS8920_NO_INTS; i++) {</div><div class='ctx'> 			if ((1 &lt;&lt; i) &amp; lp-&gt;irq_map) {</div><div class='del'>-				if (request_irq(i, net_interrupt, 0, dev-&gt;name, dev) == 0) {</div><div class='add'>+				if (request_irq(i, net_interrupt, 0, dev-&gt;name,</div><div class='add'>+						dev) == 0) {</div><div class='ctx'> 					dev-&gt;irq = i;</div><div class='ctx'> 					write_irq(dev, lp-&gt;chip_type, i);</div><div class='ctx'> 					/* writereg(dev, PP_BufCFG, GENERATE_SW_INTERRUPT); */</div><div class='hunk'>@@ -1226,23 +903,21 @@ net_open(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 		if (i &gt;= CS8920_NO_INTS) {</div><div class='ctx'> 			writereg(dev, PP_BusCTL, 0);	/* disable interrupts. */</div><div class='del'>-			printk(KERN_ERR "cs89x0: can't get an interrupt\n");</div><div class='add'>+			pr_err("can't get an interrupt\n");</div><div class='ctx'> 			ret = -EAGAIN;</div><div class='ctx'> 			goto bad_out;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-	{</div><div class='add'>+	} else {</div><div class='ctx'> #if !defined(CS89x0_NONISA_IRQ) &amp;&amp; !defined(CONFIG_CS89x0_PLATFORM)</div><div class='ctx'> 		if (((1 &lt;&lt; dev-&gt;irq) &amp; lp-&gt;irq_map) == 0) {</div><div class='del'>-			printk(KERN_ERR "%s: IRQ %d is not in our map of allowable IRQs, which is %x\n",</div><div class='del'>-                               dev-&gt;name, dev-&gt;irq, lp-&gt;irq_map);</div><div class='add'>+			pr_err("%s: IRQ %d is not in our map of allowable IRQs, which is %x\n",</div><div class='add'>+			       dev-&gt;name, dev-&gt;irq, lp-&gt;irq_map);</div><div class='ctx'> 			ret = -EAGAIN;</div><div class='ctx'> 			goto bad_out;</div><div class='ctx'> 		}</div><div class='ctx'> #endif</div><div class='ctx'> /* FIXME: Cirrus' release had this: */</div><div class='del'>-		writereg(dev, PP_BusCTL, readreg(dev, PP_BusCTL)|ENABLE_IRQ );</div><div class='add'>+		writereg(dev, PP_BusCTL, readreg(dev, PP_BusCTL)|ENABLE_IRQ);</div><div class='ctx'> /* And 2.3.47 had this: */</div><div class='ctx'> #if 0</div><div class='ctx'> 		writereg(dev, PP_BusCTL, ENABLE_IRQ | MEMORY_ON);</div><div class='hunk'>@@ -1250,147 +925,168 @@ net_open(struct net_device *dev)</div><div class='ctx'> 		write_irq(dev, lp-&gt;chip_type, dev-&gt;irq);</div><div class='ctx'> 		ret = request_irq(dev-&gt;irq, net_interrupt, 0, dev-&gt;name, dev);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			printk(KERN_ERR "cs89x0: request_irq(%d) failed\n", dev-&gt;irq);</div><div class='add'>+			pr_err("request_irq(%d) failed\n", dev-&gt;irq);</div><div class='ctx'> 			goto bad_out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #if ALLOW_DMA</div><div class='del'>-	if (lp-&gt;use_dma) {</div><div class='del'>-		if (lp-&gt;isa_config &amp; ANY_ISA_DMA) {</div><div class='del'>-			unsigned long flags;</div><div class='del'>-			lp-&gt;dma_buff = (unsigned char *)__get_dma_pages(GFP_KERNEL,</div><div class='del'>-							get_order(lp-&gt;dmasize * 1024));</div><div class='del'>-</div><div class='del'>-			if (!lp-&gt;dma_buff) {</div><div class='del'>-				printk(KERN_ERR "%s: cannot get %dK memory for DMA\n", dev-&gt;name, lp-&gt;dmasize);</div><div class='del'>-				goto release_irq;</div><div class='del'>-			}</div><div class='del'>-			if (net_debug &gt; 1) {</div><div class='del'>-				printk(	"%s: dma %lx %lx\n",</div><div class='del'>-					dev-&gt;name,</div><div class='del'>-					(unsigned long)lp-&gt;dma_buff,</div><div class='del'>-					(unsigned long)isa_virt_to_bus(lp-&gt;dma_buff));</div><div class='del'>-			}</div><div class='del'>-			if ((unsigned long) lp-&gt;dma_buff &gt;= MAX_DMA_ADDRESS ||</div><div class='del'>-			    !dma_page_eq(lp-&gt;dma_buff, lp-&gt;dma_buff+lp-&gt;dmasize*1024-1)) {</div><div class='del'>-				printk(KERN_ERR "%s: not usable as DMA buffer\n", dev-&gt;name);</div><div class='del'>-				goto release_irq;</div><div class='del'>-			}</div><div class='del'>-			memset(lp-&gt;dma_buff, 0, lp-&gt;dmasize * 1024);	/* Why? */</div><div class='del'>-			if (request_dma(dev-&gt;dma, dev-&gt;name)) {</div><div class='del'>-				printk(KERN_ERR "%s: cannot get dma channel %d\n", dev-&gt;name, dev-&gt;dma);</div><div class='del'>-				goto release_irq;</div><div class='del'>-			}</div><div class='del'>-			write_dma(dev, lp-&gt;chip_type, dev-&gt;dma);</div><div class='del'>-			lp-&gt;rx_dma_ptr = lp-&gt;dma_buff;</div><div class='del'>-			lp-&gt;end_dma_buff = lp-&gt;dma_buff + lp-&gt;dmasize*1024;</div><div class='del'>-			spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='del'>-			disable_dma(dev-&gt;dma);</div><div class='del'>-			clear_dma_ff(dev-&gt;dma);</div><div class='del'>-			set_dma_mode(dev-&gt;dma, DMA_RX_MODE); /* auto_init as well */</div><div class='del'>-			set_dma_addr(dev-&gt;dma, isa_virt_to_bus(lp-&gt;dma_buff));</div><div class='del'>-			set_dma_count(dev-&gt;dma, lp-&gt;dmasize*1024);</div><div class='del'>-			enable_dma(dev-&gt;dma);</div><div class='del'>-			spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+	if (lp-&gt;use_dma &amp;&amp; (lp-&gt;isa_config &amp; ANY_ISA_DMA)) {</div><div class='add'>+		unsigned long flags;</div><div class='add'>+		lp-&gt;dma_buff = (unsigned char *)__get_dma_pages(GFP_KERNEL,</div><div class='add'>+								get_order(lp-&gt;dmasize * 1024));</div><div class='add'>+		if (!lp-&gt;dma_buff) {</div><div class='add'>+			pr_err("%s: cannot get %dK memory for DMA\n",</div><div class='add'>+			       dev-&gt;name, lp-&gt;dmasize);</div><div class='add'>+			goto release_irq;</div><div class='add'>+		}</div><div class='add'>+		cs89_dbg(1, debug, "%s: dma %lx %lx\n",</div><div class='add'>+			 dev-&gt;name,</div><div class='add'>+			 (unsigned long)lp-&gt;dma_buff,</div><div class='add'>+			 (unsigned long)isa_virt_to_bus(lp-&gt;dma_buff));</div><div class='add'>+		if ((unsigned long)lp-&gt;dma_buff &gt;= MAX_DMA_ADDRESS ||</div><div class='add'>+		    !dma_page_eq(lp-&gt;dma_buff,</div><div class='add'>+				 lp-&gt;dma_buff + lp-&gt;dmasize * 1024 - 1)) {</div><div class='add'>+			pr_err("%s: not usable as DMA buffer\n", dev-&gt;name);</div><div class='add'>+			goto release_irq;</div><div class='ctx'> 		}</div><div class='add'>+		memset(lp-&gt;dma_buff, 0, lp-&gt;dmasize * 1024);	/* Why? */</div><div class='add'>+		if (request_dma(dev-&gt;dma, dev-&gt;name)) {</div><div class='add'>+			pr_err("%s: cannot get dma channel %d\n",</div><div class='add'>+			       dev-&gt;name, dev-&gt;dma);</div><div class='add'>+			goto release_irq;</div><div class='add'>+		}</div><div class='add'>+		write_dma(dev, lp-&gt;chip_type, dev-&gt;dma);</div><div class='add'>+		lp-&gt;rx_dma_ptr = lp-&gt;dma_buff;</div><div class='add'>+		lp-&gt;end_dma_buff = lp-&gt;dma_buff + lp-&gt;dmasize * 1024;</div><div class='add'>+		spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='add'>+		disable_dma(dev-&gt;dma);</div><div class='add'>+		clear_dma_ff(dev-&gt;dma);</div><div class='add'>+		set_dma_mode(dev-&gt;dma, DMA_RX_MODE); /* auto_init as well */</div><div class='add'>+		set_dma_addr(dev-&gt;dma, isa_virt_to_bus(lp-&gt;dma_buff));</div><div class='add'>+		set_dma_count(dev-&gt;dma, lp-&gt;dmasize * 1024);</div><div class='add'>+		enable_dma(dev-&gt;dma);</div><div class='add'>+		spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> #endif	/* ALLOW_DMA */</div><div class='ctx'> </div><div class='ctx'> 	/* set the Ethernet address */</div><div class='del'>-	for (i=0; i &lt; ETH_ALEN/2; i++)</div><div class='del'>-		writereg(dev, PP_IA+i*2, dev-&gt;dev_addr[i*2] | (dev-&gt;dev_addr[i*2+1] &lt;&lt; 8));</div><div class='add'>+	for (i = 0; i &lt; ETH_ALEN / 2; i++)</div><div class='add'>+		writereg(dev, PP_IA + i * 2,</div><div class='add'>+			 (dev-&gt;dev_addr[i * 2] |</div><div class='add'>+			  (dev-&gt;dev_addr[i * 2 + 1] &lt;&lt; 8)));</div><div class='ctx'> </div><div class='ctx'> 	/* while we're testing the interface, leave interrupts disabled */</div><div class='ctx'> 	writereg(dev, PP_BusCTL, MEMORY_ON);</div><div class='ctx'> </div><div class='ctx'> 	/* Set the LineCTL quintuplet based on adapter configuration read from EEPROM */</div><div class='del'>-	if ((lp-&gt;adapter_cnf &amp; A_CNF_EXTND_10B_2) &amp;&amp; (lp-&gt;adapter_cnf &amp; A_CNF_LOW_RX_SQUELCH))</div><div class='del'>-                lp-&gt;linectl = LOW_RX_SQUELCH;</div><div class='add'>+	if ((lp-&gt;adapter_cnf &amp; A_CNF_EXTND_10B_2) &amp;&amp;</div><div class='add'>+	    (lp-&gt;adapter_cnf &amp; A_CNF_LOW_RX_SQUELCH))</div><div class='add'>+		lp-&gt;linectl = LOW_RX_SQUELCH;</div><div class='ctx'> 	else</div><div class='del'>-                lp-&gt;linectl = 0;</div><div class='del'>-</div><div class='del'>-        /* check to make sure that they have the "right" hardware available */</div><div class='del'>-	switch(lp-&gt;adapter_cnf &amp; A_CNF_MEDIA_TYPE) {</div><div class='del'>-	case A_CNF_MEDIA_10B_T: result = lp-&gt;adapter_cnf &amp; A_CNF_10B_T; break;</div><div class='del'>-	case A_CNF_MEDIA_AUI:   result = lp-&gt;adapter_cnf &amp; A_CNF_AUI; break;</div><div class='del'>-	case A_CNF_MEDIA_10B_2: result = lp-&gt;adapter_cnf &amp; A_CNF_10B_2; break;</div><div class='del'>-        default: result = lp-&gt;adapter_cnf &amp; (A_CNF_10B_T | A_CNF_AUI | A_CNF_10B_2);</div><div class='del'>-        }</div><div class='del'>-        if (!result) {</div><div class='del'>-                printk(KERN_ERR "%s: EEPROM is configured for unavailable media\n", dev-&gt;name);</div><div class='add'>+		lp-&gt;linectl = 0;</div><div class='add'>+</div><div class='add'>+	/* check to make sure that they have the "right" hardware available */</div><div class='add'>+	switch (lp-&gt;adapter_cnf &amp; A_CNF_MEDIA_TYPE) {</div><div class='add'>+	case A_CNF_MEDIA_10B_T:</div><div class='add'>+		result = lp-&gt;adapter_cnf &amp; A_CNF_10B_T;</div><div class='add'>+		break;</div><div class='add'>+	case A_CNF_MEDIA_AUI:</div><div class='add'>+		result = lp-&gt;adapter_cnf &amp; A_CNF_AUI;</div><div class='add'>+		break;</div><div class='add'>+	case A_CNF_MEDIA_10B_2:</div><div class='add'>+		result = lp-&gt;adapter_cnf &amp; A_CNF_10B_2;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		result = lp-&gt;adapter_cnf &amp; (A_CNF_10B_T |</div><div class='add'>+					    A_CNF_AUI |</div><div class='add'>+					    A_CNF_10B_2);</div><div class='add'>+	}</div><div class='add'>+	if (!result) {</div><div class='add'>+		pr_err("%s: EEPROM is configured for unavailable media\n",</div><div class='add'>+		       dev-&gt;name);</div><div class='ctx'> release_dma:</div><div class='ctx'> #if ALLOW_DMA</div><div class='ctx'> 		free_dma(dev-&gt;dma);</div><div class='ctx'> release_irq:</div><div class='ctx'> 		release_dma_buff(lp);</div><div class='ctx'> #endif</div><div class='del'>-                writereg(dev, PP_LineCTL, readreg(dev, PP_LineCTL) &amp; ~(SERIAL_TX_ON | SERIAL_RX_ON));</div><div class='del'>-                free_irq(dev-&gt;irq, dev);</div><div class='add'>+		writereg(dev, PP_LineCTL,</div><div class='add'>+			 readreg(dev, PP_LineCTL) &amp; ~(SERIAL_TX_ON | SERIAL_RX_ON));</div><div class='add'>+		free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 		ret = -EAGAIN;</div><div class='ctx'> 		goto bad_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-        /* set the hardware to the configured choice */</div><div class='del'>-	switch(lp-&gt;adapter_cnf &amp; A_CNF_MEDIA_TYPE) {</div><div class='add'>+	/* set the hardware to the configured choice */</div><div class='add'>+	switch (lp-&gt;adapter_cnf &amp; A_CNF_MEDIA_TYPE) {</div><div class='ctx'> 	case A_CNF_MEDIA_10B_T:</div><div class='del'>-                result = detect_tp(dev);</div><div class='del'>-                if (result==DETECTED_NONE) {</div><div class='del'>-                        printk(KERN_WARNING "%s: 10Base-T (RJ-45) has no cable\n", dev-&gt;name);</div><div class='del'>-                        if (lp-&gt;auto_neg_cnf &amp; IMM_BIT) /* check "ignore missing media" bit */</div><div class='del'>-                                result = DETECTED_RJ45H; /* Yes! I don't care if I see a link pulse */</div><div class='del'>-                }</div><div class='add'>+		result = detect_tp(dev);</div><div class='add'>+		if (result == DETECTED_NONE) {</div><div class='add'>+			pr_warn("%s: 10Base-T (RJ-45) has no cable\n",</div><div class='add'>+				dev-&gt;name);</div><div class='add'>+			if (lp-&gt;auto_neg_cnf &amp; IMM_BIT) /* check "ignore missing media" bit */</div><div class='add'>+				result = DETECTED_RJ45H; /* Yes! I don't care if I see a link pulse */</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case A_CNF_MEDIA_AUI:</div><div class='del'>-                result = detect_aui(dev);</div><div class='del'>-                if (result==DETECTED_NONE) {</div><div class='del'>-                        printk(KERN_WARNING "%s: 10Base-5 (AUI) has no cable\n", dev-&gt;name);</div><div class='del'>-                        if (lp-&gt;auto_neg_cnf &amp; IMM_BIT) /* check "ignore missing media" bit */</div><div class='del'>-                                result = DETECTED_AUI; /* Yes! I don't care if I see a carrrier */</div><div class='del'>-                }</div><div class='add'>+		result = detect_aui(dev);</div><div class='add'>+		if (result == DETECTED_NONE) {</div><div class='add'>+			pr_warn("%s: 10Base-5 (AUI) has no cable\n", dev-&gt;name);</div><div class='add'>+			if (lp-&gt;auto_neg_cnf &amp; IMM_BIT) /* check "ignore missing media" bit */</div><div class='add'>+				result = DETECTED_AUI; /* Yes! I don't care if I see a carrrier */</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case A_CNF_MEDIA_10B_2:</div><div class='del'>-                result = detect_bnc(dev);</div><div class='del'>-                if (result==DETECTED_NONE) {</div><div class='del'>-                        printk(KERN_WARNING "%s: 10Base-2 (BNC) has no cable\n", dev-&gt;name);</div><div class='del'>-                        if (lp-&gt;auto_neg_cnf &amp; IMM_BIT) /* check "ignore missing media" bit */</div><div class='del'>-                                result = DETECTED_BNC; /* Yes! I don't care if I can xmit a packet */</div><div class='del'>-                }</div><div class='add'>+		result = detect_bnc(dev);</div><div class='add'>+		if (result == DETECTED_NONE) {</div><div class='add'>+			pr_warn("%s: 10Base-2 (BNC) has no cable\n", dev-&gt;name);</div><div class='add'>+			if (lp-&gt;auto_neg_cnf &amp; IMM_BIT) /* check "ignore missing media" bit */</div><div class='add'>+				result = DETECTED_BNC; /* Yes! I don't care if I can xmit a packet */</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case A_CNF_MEDIA_AUTO:</div><div class='ctx'> 		writereg(dev, PP_LineCTL, lp-&gt;linectl | AUTO_AUI_10BASET);</div><div class='del'>-		if (lp-&gt;adapter_cnf &amp; A_CNF_10B_T)</div><div class='del'>-			if ((result = detect_tp(dev)) != DETECTED_NONE)</div><div class='add'>+		if (lp-&gt;adapter_cnf &amp; A_CNF_10B_T) {</div><div class='add'>+			result = detect_tp(dev);</div><div class='add'>+			if (result != DETECTED_NONE)</div><div class='ctx'> 				break;</div><div class='del'>-		if (lp-&gt;adapter_cnf &amp; A_CNF_AUI)</div><div class='del'>-			if ((result = detect_aui(dev)) != DETECTED_NONE)</div><div class='add'>+		}</div><div class='add'>+		if (lp-&gt;adapter_cnf &amp; A_CNF_AUI) {</div><div class='add'>+			result = detect_aui(dev);</div><div class='add'>+			if (result != DETECTED_NONE)</div><div class='ctx'> 				break;</div><div class='del'>-		if (lp-&gt;adapter_cnf &amp; A_CNF_10B_2)</div><div class='del'>-			if ((result = detect_bnc(dev)) != DETECTED_NONE)</div><div class='add'>+		}</div><div class='add'>+		if (lp-&gt;adapter_cnf &amp; A_CNF_10B_2) {</div><div class='add'>+			result = detect_bnc(dev);</div><div class='add'>+			if (result != DETECTED_NONE)</div><div class='ctx'> 				break;</div><div class='del'>-		printk(KERN_ERR "%s: no media detected\n", dev-&gt;name);</div><div class='add'>+		}</div><div class='add'>+		pr_err("%s: no media detected\n", dev-&gt;name);</div><div class='ctx'> 		goto release_dma;</div><div class='ctx'> 	}</div><div class='del'>-	switch(result) {</div><div class='add'>+	switch (result) {</div><div class='ctx'> 	case DETECTED_NONE:</div><div class='del'>-		printk(KERN_ERR "%s: no network cable attached to configured media\n", dev-&gt;name);</div><div class='add'>+		pr_err("%s: no network cable attached to configured media\n",</div><div class='add'>+		       dev-&gt;name);</div><div class='ctx'> 		goto release_dma;</div><div class='ctx'> 	case DETECTED_RJ45H:</div><div class='del'>-		printk(KERN_INFO "%s: using half-duplex 10Base-T (RJ-45)\n", dev-&gt;name);</div><div class='add'>+		pr_info("%s: using half-duplex 10Base-T (RJ-45)\n", dev-&gt;name);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DETECTED_RJ45F:</div><div class='del'>-		printk(KERN_INFO "%s: using full-duplex 10Base-T (RJ-45)\n", dev-&gt;name);</div><div class='add'>+		pr_info("%s: using full-duplex 10Base-T (RJ-45)\n", dev-&gt;name);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DETECTED_AUI:</div><div class='del'>-		printk(KERN_INFO "%s: using 10Base-5 (AUI)\n", dev-&gt;name);</div><div class='add'>+		pr_info("%s: using 10Base-5 (AUI)\n", dev-&gt;name);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DETECTED_BNC:</div><div class='del'>-		printk(KERN_INFO "%s: using 10Base-2 (BNC)\n", dev-&gt;name);</div><div class='add'>+		pr_info("%s: using 10Base-2 (BNC)\n", dev-&gt;name);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Turn on both receive and transmit operations */</div><div class='del'>-	writereg(dev, PP_LineCTL, readreg(dev, PP_LineCTL) | SERIAL_RX_ON | SERIAL_TX_ON);</div><div class='add'>+	writereg(dev, PP_LineCTL,</div><div class='add'>+		 readreg(dev, PP_LineCTL) | SERIAL_RX_ON | SERIAL_TX_ON);</div><div class='ctx'> </div><div class='ctx'> 	/* Receive only error free packets addressed to this card */</div><div class='ctx'> 	lp-&gt;rx_mode = 0;</div><div class='hunk'>@@ -1405,358 +1101,653 @@ release_irq:</div><div class='ctx'> #endif</div><div class='ctx'> 	writereg(dev, PP_RxCFG, lp-&gt;curr_rx_cfg);</div><div class='ctx'> </div><div class='del'>-	writereg(dev, PP_TxCFG, TX_LOST_CRS_ENBL | TX_SQE_ERROR_ENBL | TX_OK_ENBL |</div><div class='del'>-		TX_LATE_COL_ENBL | TX_JBR_ENBL | TX_ANY_COL_ENBL | TX_16_COL_ENBL);</div><div class='add'>+	writereg(dev, PP_TxCFG, (TX_LOST_CRS_ENBL |</div><div class='add'>+				 TX_SQE_ERROR_ENBL |</div><div class='add'>+				 TX_OK_ENBL |</div><div class='add'>+				 TX_LATE_COL_ENBL |</div><div class='add'>+				 TX_JBR_ENBL |</div><div class='add'>+				 TX_ANY_COL_ENBL |</div><div class='add'>+				 TX_16_COL_ENBL));</div><div class='ctx'> </div><div class='del'>-	writereg(dev, PP_BufCFG, READY_FOR_TX_ENBL | RX_MISS_COUNT_OVRFLOW_ENBL |</div><div class='add'>+	writereg(dev, PP_BufCFG, (READY_FOR_TX_ENBL |</div><div class='add'>+				  RX_MISS_COUNT_OVRFLOW_ENBL |</div><div class='ctx'> #if ALLOW_DMA</div><div class='del'>-		dma_bufcfg(dev) |</div><div class='add'>+				  dma_bufcfg(dev) |</div><div class='ctx'> #endif</div><div class='del'>-		TX_COL_COUNT_OVRFLOW_ENBL | TX_UNDERRUN_ENBL);</div><div class='add'>+				  TX_COL_COUNT_OVRFLOW_ENBL |</div><div class='add'>+				  TX_UNDERRUN_ENBL));</div><div class='ctx'> </div><div class='ctx'> 	/* now that we've got our act together, enable everything */</div><div class='del'>-	writereg(dev, PP_BusCTL, ENABLE_IRQ</div><div class='del'>-		 | (dev-&gt;mem_start?MEMORY_ON : 0) /* turn memory on */</div><div class='add'>+	writereg(dev, PP_BusCTL, (ENABLE_IRQ</div><div class='add'>+				  | (dev-&gt;mem_start ? MEMORY_ON : 0) /* turn memory on */</div><div class='ctx'> #if ALLOW_DMA</div><div class='del'>-		 | dma_busctl(dev)</div><div class='add'>+				  | dma_busctl(dev)</div><div class='ctx'> #endif</div><div class='del'>-                 );</div><div class='del'>-        netif_start_queue(dev);</div><div class='del'>-	if (net_debug &gt; 1)</div><div class='del'>-		printk("cs89x0: net_open() succeeded\n");</div><div class='add'>+			 ));</div><div class='add'>+	netif_start_queue(dev);</div><div class='add'>+	cs89_dbg(1, debug, "net_open() succeeded\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> bad_out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* The inverse routine to net_open(). */</div><div class='add'>+static int</div><div class='add'>+net_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+#if ALLOW_DMA</div><div class='add'>+	struct net_local *lp = netdev_priv(dev);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+	writereg(dev, PP_RxCFG, 0);</div><div class='add'>+	writereg(dev, PP_TxCFG, 0);</div><div class='add'>+	writereg(dev, PP_BufCFG, 0);</div><div class='add'>+	writereg(dev, PP_BusCTL, 0);</div><div class='add'>+</div><div class='add'>+	free_irq(dev-&gt;irq, dev);</div><div class='add'>+</div><div class='add'>+#if ALLOW_DMA</div><div class='add'>+	if (lp-&gt;use_dma &amp;&amp; lp-&gt;dma) {</div><div class='add'>+		free_dma(dev-&gt;dma);</div><div class='add'>+		release_dma_buff(lp);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* Update the statistics here. */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Get the current statistics.</div><div class='add'>+ * This may be called with the card open or closed.</div><div class='add'>+ */</div><div class='add'>+static struct net_device_stats *</div><div class='add'>+net_get_stats(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_local *lp = netdev_priv(dev);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='add'>+	/* Update the statistics from the device registers. */</div><div class='add'>+	dev-&gt;stats.rx_missed_errors += (readreg(dev, PP_RxMiss) &gt;&gt; 6);</div><div class='add'>+	dev-&gt;stats.collisions += (readreg(dev, PP_TxCol) &gt;&gt; 6);</div><div class='add'>+	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return &amp;dev-&gt;stats;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void net_timeout(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	/* If we get here, some higher level has decided we are broken.</div><div class='ctx'> 	   There should really be a "kick me" function call instead. */</div><div class='del'>-	if (net_debug &gt; 0) printk("%s: transmit timed out, %s?\n", dev-&gt;name,</div><div class='del'>-		   tx_done(dev) ? "IRQ conflict ?" : "network cable problem");</div><div class='add'>+	cs89_dbg(0, err, "%s: transmit timed out, %s?\n",</div><div class='add'>+		 dev-&gt;name,</div><div class='add'>+		 tx_done(dev) ? "IRQ conflict" : "network cable problem");</div><div class='ctx'> 	/* Try to restart the adaptor. */</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static netdev_tx_t net_send_packet(struct sk_buff *skb,struct net_device *dev)</div><div class='add'>+static netdev_tx_t net_send_packet(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_local *lp = netdev_priv(dev);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (net_debug &gt; 3) {</div><div class='del'>-		printk("%s: sent %d byte packet of type %x\n",</div><div class='del'>-			dev-&gt;name, skb-&gt;len,</div><div class='del'>-			(skb-&gt;data[ETH_ALEN+ETH_ALEN] &lt;&lt; 8) | skb-&gt;data[ETH_ALEN+ETH_ALEN+1]);</div><div class='del'>-	}</div><div class='add'>+	cs89_dbg(3, debug, "%s: sent %d byte packet of type %x\n",</div><div class='add'>+		 dev-&gt;name, skb-&gt;len,</div><div class='add'>+		 ((skb-&gt;data[ETH_ALEN + ETH_ALEN] &lt;&lt; 8) |</div><div class='add'>+		  skb-&gt;data[ETH_ALEN + ETH_ALEN + 1]));</div><div class='ctx'> </div><div class='ctx'> 	/* keep the upload from being interrupted, since we</div><div class='del'>-                  ask the chip to start transmitting before the</div><div class='del'>-                  whole packet has been completely uploaded. */</div><div class='add'>+	 * ask the chip to start transmitting before the</div><div class='add'>+	 * whole packet has been completely uploaded.</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* initiate a transmit sequence */</div><div class='del'>-	writeword(dev-&gt;base_addr, TX_CMD_PORT, lp-&gt;send_cmd);</div><div class='del'>-	writeword(dev-&gt;base_addr, TX_LEN_PORT, skb-&gt;len);</div><div class='add'>+	iowrite16(lp-&gt;send_cmd, lp-&gt;virt_addr + TX_CMD_PORT);</div><div class='add'>+	iowrite16(skb-&gt;len, lp-&gt;virt_addr + TX_LEN_PORT);</div><div class='ctx'> </div><div class='ctx'> 	/* Test to see if the chip has allocated memory for the packet */</div><div class='ctx'> 	if ((readreg(dev, PP_BusST) &amp; READY_FOR_TX_NOW) == 0) {</div><div class='del'>-		/*</div><div class='del'>-		 * Gasp!  It hasn't.  But that shouldn't happen since</div><div class='add'>+		/* Gasp!  It hasn't.  But that shouldn't happen since</div><div class='ctx'> 		 * we're waiting for TxOk, so return 1 and requeue this packet.</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='ctx'> 		spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='del'>-		if (net_debug) printk("cs89x0: Tx buffer not free!\n");</div><div class='add'>+		cs89_dbg(0, err, "Tx buffer not free!\n");</div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Write the contents of the packet */</div><div class='del'>-	writewords(dev-&gt;base_addr, TX_FRAME_PORT,skb-&gt;data,(skb-&gt;len+1) &gt;&gt;1);</div><div class='add'>+	writewords(lp, TX_FRAME_PORT, skb-&gt;data, (skb-&gt;len + 1) &gt;&gt; 1);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	dev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='del'>-	dev_kfree_skb (skb);</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * We DO NOT call netif_wake_queue() here.</div><div class='add'>+	/* We DO NOT call netif_wake_queue() here.</div><div class='ctx'> 	 * We also DO NOT call netif_start_queue().</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Either of these would cause another bottom half run through</div><div class='del'>-	 * net_send_packet() before this packet has fully gone out.  That causes</div><div class='del'>-	 * us to hit the "Gasp!" above and the send is rescheduled.  it runs like</div><div class='del'>-	 * a dog.  We just return and wait for the Tx completion interrupt handler</div><div class='del'>-	 * to restart the netdevice layer</div><div class='add'>+	 * net_send_packet() before this packet has fully gone out.</div><div class='add'>+	 * That causes us to hit the "Gasp!" above and the send is rescheduled.</div><div class='add'>+	 * it runs like a dog.  We just return and wait for the Tx completion</div><div class='add'>+	 * interrupt handler to restart the netdevice layer</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* The typical workload of the driver:</div><div class='del'>-   Handle the network interface interrupts. */</div><div class='add'>+static void set_multicast_list(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_local *lp = netdev_priv(dev);</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-static irqreturn_t net_interrupt(int irq, void *dev_id)</div><div class='add'>+	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='add'>+	if (dev-&gt;flags &amp; IFF_PROMISC)</div><div class='add'>+		lp-&gt;rx_mode = RX_ALL_ACCEPT;</div><div class='add'>+	else if ((dev-&gt;flags &amp; IFF_ALLMULTI) || !netdev_mc_empty(dev))</div><div class='add'>+		/* The multicast-accept list is initialized to accept-all,</div><div class='add'>+		 * and we rely on higher-level filtering for now.</div><div class='add'>+		 */</div><div class='add'>+		lp-&gt;rx_mode = RX_MULTCAST_ACCEPT;</div><div class='add'>+	else</div><div class='add'>+		lp-&gt;rx_mode = 0;</div><div class='add'>+</div><div class='add'>+	writereg(dev, PP_RxCTL, DEF_RX_ACCEPT | lp-&gt;rx_mode);</div><div class='add'>+</div><div class='add'>+	/* in promiscuous mode, we accept errored packets,</div><div class='add'>+	 * so we have to enable interrupts on them also</div><div class='add'>+	 */</div><div class='add'>+	writereg(dev, PP_RxCFG,</div><div class='add'>+		 (lp-&gt;curr_rx_cfg |</div><div class='add'>+		  (lp-&gt;rx_mode == RX_ALL_ACCEPT)</div><div class='add'>+		  ? (RX_CRC_ERROR_ENBL | RX_RUNT_ENBL | RX_EXTRA_DATA_ENBL)</div><div class='add'>+		  : 0));</div><div class='add'>+	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_mac_address(struct net_device *dev, void *p)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = dev_id;</div><div class='del'>-	struct net_local *lp;</div><div class='del'>-	int ioaddr, status;</div><div class='del'>- 	int handled = 0;</div><div class='add'>+	int i;</div><div class='add'>+	struct sockaddr *addr = p;</div><div class='ctx'> </div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='del'>-	lp = netdev_priv(dev);</div><div class='add'>+	if (netif_running(dev))</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	/* we MUST read all the events out of the ISQ, otherwise we'll never</div><div class='del'>-           get interrupted again.  As a consequence, we can't have any limit</div><div class='del'>-           on the number of times we loop in the interrupt handler.  The</div><div class='del'>-           hardware guarantees that eventually we'll run out of events.  Of</div><div class='del'>-           course, if you're on a slow machine, and packets are arriving</div><div class='del'>-           faster than you can read them off, you're screwed.  Hasta la</div><div class='del'>-           vista, baby!  */</div><div class='del'>-	while ((status = readword(dev-&gt;base_addr, ISQ_PORT))) {</div><div class='del'>-		if (net_debug &gt; 4)printk("%s: event=%04x\n", dev-&gt;name, status);</div><div class='del'>-		handled = 1;</div><div class='del'>-		switch(status &amp; ISQ_EVENT_MASK) {</div><div class='del'>-		case ISQ_RECEIVER_EVENT:</div><div class='del'>-			/* Got a packet(s). */</div><div class='del'>-			net_rx(dev);</div><div class='del'>-			break;</div><div class='del'>-		case ISQ_TRANSMITTER_EVENT:</div><div class='del'>-			dev-&gt;stats.tx_packets++;</div><div class='del'>-			netif_wake_queue(dev);	/* Inform upper layers. */</div><div class='del'>-			if ((status &amp; (	TX_OK |</div><div class='del'>-					TX_LOST_CRS |</div><div class='del'>-					TX_SQE_ERROR |</div><div class='del'>-					TX_LATE_COL |</div><div class='del'>-					TX_16_COL)) != TX_OK) {</div><div class='del'>-				if ((status &amp; TX_OK) == 0)</div><div class='del'>-					dev-&gt;stats.tx_errors++;</div><div class='del'>-				if (status &amp; TX_LOST_CRS)</div><div class='del'>-					dev-&gt;stats.tx_carrier_errors++;</div><div class='del'>-				if (status &amp; TX_SQE_ERROR)</div><div class='del'>-					dev-&gt;stats.tx_heartbeat_errors++;</div><div class='del'>-				if (status &amp; TX_LATE_COL)</div><div class='del'>-					dev-&gt;stats.tx_window_errors++;</div><div class='del'>-				if (status &amp; TX_16_COL)</div><div class='del'>-					dev-&gt;stats.tx_aborted_errors++;</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case ISQ_BUFFER_EVENT:</div><div class='del'>-			if (status &amp; READY_FOR_TX) {</div><div class='del'>-				/* we tried to transmit a packet earlier,</div><div class='del'>-                                   but inexplicably ran out of buffers.</div><div class='del'>-                                   That shouldn't happen since we only ever</div><div class='del'>-                                   load one packet.  Shrug.  Do the right</div><div class='del'>-                                   thing anyway. */</div><div class='del'>-				netif_wake_queue(dev);	/* Inform upper layers. */</div><div class='del'>-			}</div><div class='del'>-			if (status &amp; TX_UNDERRUN) {</div><div class='del'>-				if (net_debug &gt; 0) printk("%s: transmit underrun\n", dev-&gt;name);</div><div class='del'>-                                lp-&gt;send_underrun++;</div><div class='del'>-                                if (lp-&gt;send_underrun == 3) lp-&gt;send_cmd = TX_AFTER_381;</div><div class='del'>-                                else if (lp-&gt;send_underrun == 6) lp-&gt;send_cmd = TX_AFTER_ALL;</div><div class='del'>-				/* transmit cycle is done, although</div><div class='del'>-				   frame wasn't transmitted - this</div><div class='del'>-				   avoids having to wait for the upper</div><div class='del'>-				   layers to timeout on us, in the</div><div class='del'>-				   event of a tx underrun */</div><div class='del'>-				netif_wake_queue(dev);	/* Inform upper layers. */</div><div class='del'>-                        }</div><div class='del'>-#if ALLOW_DMA</div><div class='del'>-			if (lp-&gt;use_dma &amp;&amp; (status &amp; RX_DMA)) {</div><div class='del'>-				int count = readreg(dev, PP_DmaFrameCnt);</div><div class='del'>-				while(count) {</div><div class='del'>-					if (net_debug &gt; 5)</div><div class='del'>-						printk("%s: receiving %d DMA frames\n", dev-&gt;name, count);</div><div class='del'>-					if (net_debug &gt; 2 &amp;&amp; count &gt;1)</div><div class='del'>-						printk("%s: receiving %d DMA frames\n", dev-&gt;name, count);</div><div class='del'>-					dma_rx(dev);</div><div class='del'>-					if (--count == 0)</div><div class='del'>-						count = readreg(dev, PP_DmaFrameCnt);</div><div class='del'>-					if (net_debug &gt; 2 &amp;&amp; count &gt; 0)</div><div class='del'>-						printk("%s: continuing with %d DMA frames\n", dev-&gt;name, count);</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-#endif</div><div class='del'>-			break;</div><div class='del'>-		case ISQ_RX_MISS_EVENT:</div><div class='del'>-			dev-&gt;stats.rx_missed_errors += (status &gt;&gt; 6);</div><div class='del'>-			break;</div><div class='del'>-		case ISQ_TX_COL_EVENT:</div><div class='del'>-			dev-&gt;stats.collisions += (status &gt;&gt; 6);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return IRQ_RETVAL(handled);</div><div class='add'>+	memcpy(dev-&gt;dev_addr, addr-&gt;sa_data, dev-&gt;addr_len);</div><div class='add'>+</div><div class='add'>+	cs89_dbg(0, debug, "%s: Setting MAC address to %pM\n",</div><div class='add'>+		 dev-&gt;name, dev-&gt;dev_addr);</div><div class='add'>+</div><div class='add'>+	/* set the Ethernet address */</div><div class='add'>+	for (i = 0; i &lt; ETH_ALEN / 2; i++)</div><div class='add'>+		writereg(dev, PP_IA + i * 2,</div><div class='add'>+			 (dev-&gt;dev_addr[i * 2] |</div><div class='add'>+			  (dev-&gt;dev_addr[i * 2 + 1] &lt;&lt; 8)));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-count_rx_errors(int status, struct net_device *dev)</div><div class='add'>+#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='add'>+/*</div><div class='add'>+ * Polling receive - used by netconsole and other diagnostic tools</div><div class='add'>+ * to allow network i/o with interrupts disabled.</div><div class='add'>+ */</div><div class='add'>+static void net_poll_controller(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	dev-&gt;stats.rx_errors++;</div><div class='del'>-	if (status &amp; RX_RUNT)</div><div class='del'>-		dev-&gt;stats.rx_length_errors++;</div><div class='del'>-	if (status &amp; RX_EXTRA_DATA)</div><div class='del'>-		dev-&gt;stats.rx_length_errors++;</div><div class='del'>-	if ((status &amp; RX_CRC_ERROR) &amp;&amp; !(status &amp; (RX_EXTRA_DATA|RX_RUNT)))</div><div class='del'>-		/* per str 172 */</div><div class='del'>-		dev-&gt;stats.rx_crc_errors++;</div><div class='del'>-	if (status &amp; RX_DRIBBLE)</div><div class='del'>-		dev-&gt;stats.rx_frame_errors++;</div><div class='add'>+	disable_irq(dev-&gt;irq);</div><div class='add'>+	net_interrupt(dev-&gt;irq, dev);</div><div class='add'>+	enable_irq(dev-&gt;irq);</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-/* We have a good packet(s), get it/them out of the buffers. */</div><div class='del'>-static void</div><div class='del'>-net_rx(struct net_device *dev)</div><div class='add'>+static const struct net_device_ops net_ops = {</div><div class='add'>+	.ndo_open		= net_open,</div><div class='add'>+	.ndo_stop		= net_close,</div><div class='add'>+	.ndo_tx_timeout		= net_timeout,</div><div class='add'>+	.ndo_start_xmit		= net_send_packet,</div><div class='add'>+	.ndo_get_stats		= net_get_stats,</div><div class='add'>+	.ndo_set_rx_mode	= set_multicast_list,</div><div class='add'>+	.ndo_set_mac_address	= set_mac_address,</div><div class='add'>+#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='add'>+	.ndo_poll_controller	= net_poll_controller,</div><div class='add'>+#endif</div><div class='add'>+	.ndo_change_mtu		= eth_change_mtu,</div><div class='add'>+	.ndo_validate_addr	= eth_validate_addr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init reset_chip(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	int status, length;</div><div class='add'>+#if !defined(CONFIG_MACH_MX31ADS)</div><div class='add'>+#if !defined(CS89x0_NONISA_IRQ)</div><div class='add'>+	struct net_local *lp = netdev_priv(dev);</div><div class='add'>+#endif /* CS89x0_NONISA_IRQ */</div><div class='add'>+	int reset_start_time;</div><div class='ctx'> </div><div class='del'>-	int ioaddr = dev-&gt;base_addr;</div><div class='del'>-	status = readword(ioaddr, RX_FRAME_PORT);</div><div class='del'>-	length = readword(ioaddr, RX_FRAME_PORT);</div><div class='add'>+	writereg(dev, PP_SelfCTL, readreg(dev, PP_SelfCTL) | POWER_ON_RESET);</div><div class='ctx'> </div><div class='del'>-	if ((status &amp; RX_OK) == 0) {</div><div class='del'>-		count_rx_errors(status, dev);</div><div class='del'>-		return;</div><div class='add'>+	/* wait 30 ms */</div><div class='add'>+	msleep(30);</div><div class='add'>+</div><div class='add'>+#if !defined(CS89x0_NONISA_IRQ)</div><div class='add'>+	if (lp-&gt;chip_type != CS8900) {</div><div class='add'>+		/* Hardware problem requires PNP registers to be reconfigured after a reset */</div><div class='add'>+		iowrite16(PP_CS8920_ISAINT, lp-&gt;virt_addr + ADD_PORT);</div><div class='add'>+		iowrite8(dev-&gt;irq, lp-&gt;virt_addr + DATA_PORT);</div><div class='add'>+		iowrite8(0, lp-&gt;virt_addr + DATA_PORT + 1);</div><div class='add'>+</div><div class='add'>+		iowrite16(PP_CS8920_ISAMemB, lp-&gt;virt_addr + ADD_PORT);</div><div class='add'>+		iowrite8((dev-&gt;mem_start &gt;&gt; 16) &amp; 0xff,</div><div class='add'>+			 lp-&gt;virt_addr + DATA_PORT);</div><div class='add'>+		iowrite8((dev-&gt;mem_start &gt;&gt; 8) &amp; 0xff,</div><div class='add'>+			 lp-&gt;virt_addr + DATA_PORT + 1);</div><div class='ctx'> 	}</div><div class='add'>+#endif /* CS89x0_NONISA_IRQ */</div><div class='ctx'> </div><div class='del'>-	/* Malloc up new buffer. */</div><div class='del'>-	skb = netdev_alloc_skb(dev, length + 2);</div><div class='del'>-	if (skb == NULL) {</div><div class='del'>-#if 0		/* Again, this seems a cruel thing to do */</div><div class='del'>-		printk(KERN_WARNING "%s: Memory squeeze, dropping packet.\n", dev-&gt;name);</div><div class='add'>+	/* Wait until the chip is reset */</div><div class='add'>+	reset_start_time = jiffies;</div><div class='add'>+	while ((readreg(dev, PP_SelfST) &amp; INIT_DONE) == 0 &amp;&amp;</div><div class='add'>+	       jiffies - reset_start_time &lt; 2)</div><div class='add'>+		;</div><div class='add'>+#endif /* !CONFIG_MACH_MX31ADS */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This is the real probe routine.</div><div class='add'>+ * Linux has a history of friendly device probes on the ISA bus.</div><div class='add'>+ * A good device probes avoids doing writes, and</div><div class='add'>+ * verifies that the correct device exists and functions.</div><div class='add'>+ * Return 0 on success.</div><div class='add'>+ */</div><div class='add'>+static int __init</div><div class='add'>+cs89x0_probe1(struct net_device *dev, void __iomem *ioaddr, int modular)</div><div class='add'>+{</div><div class='add'>+	struct net_local *lp = netdev_priv(dev);</div><div class='add'>+	int i;</div><div class='add'>+	int tmp;</div><div class='add'>+	unsigned rev_type = 0;</div><div class='add'>+	int eeprom_buff[CHKSUM_LEN];</div><div class='add'>+	int retval;</div><div class='add'>+</div><div class='add'>+	/* Initialize the device structure. */</div><div class='add'>+	if (!modular) {</div><div class='add'>+		memset(lp, 0, sizeof(*lp));</div><div class='add'>+		spin_lock_init(&amp;lp-&gt;lock);</div><div class='add'>+#ifndef MODULE</div><div class='add'>+#if ALLOW_DMA</div><div class='add'>+		if (g_cs89x0_dma) {</div><div class='add'>+			lp-&gt;use_dma = 1;</div><div class='add'>+			lp-&gt;dma = g_cs89x0_dma;</div><div class='add'>+			lp-&gt;dmasize = 16;	/* Could make this an option... */</div><div class='add'>+		}</div><div class='add'>+#endif</div><div class='add'>+		lp-&gt;force = g_cs89x0_media__force;</div><div class='ctx'> #endif</div><div class='del'>-		dev-&gt;stats.rx_dropped++;</div><div class='del'>-		return;</div><div class='ctx'> 	}</div><div class='del'>-	skb_reserve(skb, 2);	/* longword align L3 header */</div><div class='ctx'> </div><div class='del'>-	readwords(ioaddr, RX_FRAME_PORT, skb_put(skb, length), length &gt;&gt; 1);</div><div class='del'>-	if (length &amp; 1)</div><div class='del'>-		skb-&gt;data[length-1] = readword(ioaddr, RX_FRAME_PORT);</div><div class='add'>+	pr_debug("PP_addr at %p[%x]: 0x%x\n",</div><div class='add'>+		 ioaddr, ADD_PORT, ioread16(ioaddr + ADD_PORT));</div><div class='add'>+	iowrite16(PP_ChipID, ioaddr + ADD_PORT);</div><div class='ctx'> </div><div class='del'>-	if (net_debug &gt; 3) {</div><div class='del'>-		printk(	"%s: received %d byte packet of type %x\n",</div><div class='del'>-			dev-&gt;name, length,</div><div class='del'>-			(skb-&gt;data[ETH_ALEN+ETH_ALEN] &lt;&lt; 8) | skb-&gt;data[ETH_ALEN+ETH_ALEN+1]);</div><div class='add'>+	tmp = ioread16(ioaddr + DATA_PORT);</div><div class='add'>+	if (tmp != CHIP_EISA_ID_SIG) {</div><div class='add'>+		pr_debug("%s: incorrect signature at %p[%x]: 0x%x!="</div><div class='add'>+			 CHIP_EISA_ID_SIG_STR "\n",</div><div class='add'>+			 dev-&gt;name, ioaddr, DATA_PORT, tmp);</div><div class='add'>+		retval = -ENODEV;</div><div class='add'>+		goto out1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-        skb-&gt;protocol=eth_type_trans(skb,dev);</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-	dev-&gt;stats.rx_packets++;</div><div class='del'>-	dev-&gt;stats.rx_bytes += length;</div><div class='del'>-}</div><div class='add'>+	lp-&gt;virt_addr = ioaddr;</div><div class='ctx'> </div><div class='del'>-#if ALLOW_DMA</div><div class='del'>-static void release_dma_buff(struct net_local *lp)</div><div class='del'>-{</div><div class='del'>-	if (lp-&gt;dma_buff) {</div><div class='del'>-		free_pages((unsigned long)(lp-&gt;dma_buff), get_order(lp-&gt;dmasize * 1024));</div><div class='del'>-		lp-&gt;dma_buff = NULL;</div><div class='add'>+	/* get the chip type */</div><div class='add'>+	rev_type = readreg(dev, PRODUCT_ID_ADD);</div><div class='add'>+	lp-&gt;chip_type = rev_type &amp; ~REVISON_BITS;</div><div class='add'>+	lp-&gt;chip_revision = ((rev_type &amp; REVISON_BITS) &gt;&gt; 8) + 'A';</div><div class='add'>+</div><div class='add'>+	/* Check the chip type and revision in order to set the correct</div><div class='add'>+	 * send command.  CS8920 revision C and CS8900 revision F can use</div><div class='add'>+	 * the faster send.</div><div class='add'>+	 */</div><div class='add'>+	lp-&gt;send_cmd = TX_AFTER_381;</div><div class='add'>+	if (lp-&gt;chip_type == CS8900 &amp;&amp; lp-&gt;chip_revision &gt;= 'F')</div><div class='add'>+		lp-&gt;send_cmd = TX_NOW;</div><div class='add'>+	if (lp-&gt;chip_type != CS8900 &amp;&amp; lp-&gt;chip_revision &gt;= 'C')</div><div class='add'>+		lp-&gt;send_cmd = TX_NOW;</div><div class='add'>+</div><div class='add'>+	pr_info_once("%s\n", version);</div><div class='add'>+</div><div class='add'>+	pr_info("%s: cs89%c0%s rev %c found at %p ",</div><div class='add'>+		dev-&gt;name,</div><div class='add'>+		lp-&gt;chip_type == CS8900  ? '0' : '2',</div><div class='add'>+		lp-&gt;chip_type == CS8920M ? "M" : "",</div><div class='add'>+		lp-&gt;chip_revision,</div><div class='add'>+		lp-&gt;virt_addr);</div><div class='add'>+</div><div class='add'>+	reset_chip(dev);</div><div class='add'>+</div><div class='add'>+	/* Here we read the current configuration of the chip.</div><div class='add'>+	 * If there is no Extended EEPROM then the idea is to not disturb</div><div class='add'>+	 * the chip configuration, it should have been correctly setup by</div><div class='add'>+	 * automatic EEPROM read on reset. So, if the chip says it read</div><div class='add'>+	 * the EEPROM the driver will always do *something* instead of</div><div class='add'>+	 * complain that adapter_cnf is 0.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if ((readreg(dev, PP_SelfST) &amp; (EEPROM_OK | EEPROM_PRESENT)) ==</div><div class='add'>+	    (EEPROM_OK | EEPROM_PRESENT)) {</div><div class='add'>+		/* Load the MAC. */</div><div class='add'>+		for (i = 0; i &lt; ETH_ALEN / 2; i++) {</div><div class='add'>+			unsigned int Addr;</div><div class='add'>+			Addr = readreg(dev, PP_IA + i * 2);</div><div class='add'>+			dev-&gt;dev_addr[i * 2] = Addr &amp; 0xFF;</div><div class='add'>+			dev-&gt;dev_addr[i * 2 + 1] = Addr &gt;&gt; 8;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Load the Adapter Configuration.</div><div class='add'>+		 * Note:  Barring any more specific information from some</div><div class='add'>+		 * other source (ie EEPROM+Schematics), we would not know</div><div class='add'>+		 * how to operate a 10Base2 interface on the AUI port.</div><div class='add'>+		 * However, since we  do read the status of HCB1 and use</div><div class='add'>+		 * settings that always result in calls to control_dc_dc(dev,0)</div><div class='add'>+		 * a BNC interface should work if the enable pin</div><div class='add'>+		 * (dc/dc converter) is on HCB1.</div><div class='add'>+		 * It will be called AUI however.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		lp-&gt;adapter_cnf = 0;</div><div class='add'>+		i = readreg(dev, PP_LineCTL);</div><div class='add'>+		/* Preserve the setting of the HCB1 pin. */</div><div class='add'>+		if ((i &amp; (HCB1 | HCB1_ENBL)) == (HCB1 | HCB1_ENBL))</div><div class='add'>+			lp-&gt;adapter_cnf |= A_CNF_DC_DC_POLARITY;</div><div class='add'>+		/* Save the sqelch bit */</div><div class='add'>+		if ((i &amp; LOW_RX_SQUELCH) == LOW_RX_SQUELCH)</div><div class='add'>+			lp-&gt;adapter_cnf |= A_CNF_EXTND_10B_2 | A_CNF_LOW_RX_SQUELCH;</div><div class='add'>+		/* Check if the card is in 10Base-t only mode */</div><div class='add'>+		if ((i &amp; (AUI_ONLY | AUTO_AUI_10BASET)) == 0)</div><div class='add'>+			lp-&gt;adapter_cnf |=  A_CNF_10B_T | A_CNF_MEDIA_10B_T;</div><div class='add'>+		/* Check if the card is in AUI only mode */</div><div class='add'>+		if ((i &amp; (AUI_ONLY | AUTO_AUI_10BASET)) == AUI_ONLY)</div><div class='add'>+			lp-&gt;adapter_cnf |=  A_CNF_AUI | A_CNF_MEDIA_AUI;</div><div class='add'>+		/* Check if the card is in Auto mode. */</div><div class='add'>+		if ((i &amp; (AUI_ONLY | AUTO_AUI_10BASET)) == AUTO_AUI_10BASET)</div><div class='add'>+			lp-&gt;adapter_cnf |=  A_CNF_AUI | A_CNF_10B_T |</div><div class='add'>+				A_CNF_MEDIA_AUI | A_CNF_MEDIA_10B_T | A_CNF_MEDIA_AUTO;</div><div class='add'>+</div><div class='add'>+		cs89_dbg(1, info, "%s: PP_LineCTL=0x%x, adapter_cnf=0x%x\n",</div><div class='add'>+			 dev-&gt;name, i, lp-&gt;adapter_cnf);</div><div class='add'>+</div><div class='add'>+		/* IRQ. Other chips already probe, see below. */</div><div class='add'>+		if (lp-&gt;chip_type == CS8900)</div><div class='add'>+			lp-&gt;isa_config = readreg(dev, PP_CS8900_ISAINT) &amp; INT_NO_MASK;</div><div class='add'>+</div><div class='add'>+		pr_cont("[Cirrus EEPROM] ");</div><div class='ctx'> 	}</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-/* The inverse routine to net_open(). */</div><div class='del'>-static int</div><div class='del'>-net_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-#if ALLOW_DMA</div><div class='del'>-	struct net_local *lp = netdev_priv(dev);</div><div class='del'>-#endif</div><div class='add'>+	pr_cont("\n");</div><div class='ctx'> </div><div class='del'>-	netif_stop_queue(dev);</div><div class='add'>+	/* First check to see if an EEPROM is attached. */</div><div class='ctx'> </div><div class='del'>-	writereg(dev, PP_RxCFG, 0);</div><div class='del'>-	writereg(dev, PP_TxCFG, 0);</div><div class='del'>-	writereg(dev, PP_BufCFG, 0);</div><div class='del'>-	writereg(dev, PP_BusCTL, 0);</div><div class='add'>+	if ((readreg(dev, PP_SelfST) &amp; EEPROM_PRESENT) == 0)</div><div class='add'>+		pr_warn("No EEPROM, relying on command line....\n");</div><div class='add'>+	else if (get_eeprom_data(dev, START_EEPROM_DATA, CHKSUM_LEN, eeprom_buff) &lt; 0) {</div><div class='add'>+		pr_warn("EEPROM read failed, relying on command line\n");</div><div class='add'>+	} else if (get_eeprom_cksum(START_EEPROM_DATA, CHKSUM_LEN, eeprom_buff) &lt; 0) {</div><div class='add'>+		/* Check if the chip was able to read its own configuration starting</div><div class='add'>+		   at 0 in the EEPROM*/</div><div class='add'>+		if ((readreg(dev, PP_SelfST) &amp; (EEPROM_OK | EEPROM_PRESENT)) !=</div><div class='add'>+		    (EEPROM_OK | EEPROM_PRESENT))</div><div class='add'>+			pr_warn("Extended EEPROM checksum bad and no Cirrus EEPROM, relying on command line\n");</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	} else {</div><div class='add'>+		/* This reads an extended EEPROM that is not documented</div><div class='add'>+		 * in the CS8900 datasheet.</div><div class='add'>+		 */</div><div class='ctx'> </div><div class='del'>-#if ALLOW_DMA</div><div class='del'>-	if (lp-&gt;use_dma &amp;&amp; lp-&gt;dma) {</div><div class='del'>-		free_dma(dev-&gt;dma);</div><div class='del'>-		release_dma_buff(lp);</div><div class='add'>+		/* get transmission control word  but keep the autonegotiation bits */</div><div class='add'>+		if (!lp-&gt;auto_neg_cnf)</div><div class='add'>+			lp-&gt;auto_neg_cnf = eeprom_buff[AUTO_NEG_CNF_OFFSET / 2];</div><div class='add'>+		/* Store adapter configuration */</div><div class='add'>+		if (!lp-&gt;adapter_cnf)</div><div class='add'>+			lp-&gt;adapter_cnf = eeprom_buff[ADAPTER_CNF_OFFSET / 2];</div><div class='add'>+		/* Store ISA configuration */</div><div class='add'>+		lp-&gt;isa_config = eeprom_buff[ISA_CNF_OFFSET / 2];</div><div class='add'>+		dev-&gt;mem_start = eeprom_buff[PACKET_PAGE_OFFSET / 2] &lt;&lt; 8;</div><div class='add'>+</div><div class='add'>+		/* eeprom_buff has 32-bit ints, so we can't just memcpy it */</div><div class='add'>+		/* store the initial memory base address */</div><div class='add'>+		for (i = 0; i &lt; ETH_ALEN / 2; i++) {</div><div class='add'>+			dev-&gt;dev_addr[i * 2] = eeprom_buff[i];</div><div class='add'>+			dev-&gt;dev_addr[i * 2 + 1] = eeprom_buff[i] &gt;&gt; 8;</div><div class='add'>+		}</div><div class='add'>+		cs89_dbg(1, debug, "%s: new adapter_cnf: 0x%x\n",</div><div class='add'>+			 dev-&gt;name, lp-&gt;adapter_cnf);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* allow them to force multiple transceivers.  If they force multiple, autosense */</div><div class='add'>+	{</div><div class='add'>+		int count = 0;</div><div class='add'>+		if (lp-&gt;force &amp; FORCE_RJ45) {</div><div class='add'>+			lp-&gt;adapter_cnf |= A_CNF_10B_T;</div><div class='add'>+			count++;</div><div class='add'>+		}</div><div class='add'>+		if (lp-&gt;force &amp; FORCE_AUI) {</div><div class='add'>+			lp-&gt;adapter_cnf |= A_CNF_AUI;</div><div class='add'>+			count++;</div><div class='add'>+		}</div><div class='add'>+		if (lp-&gt;force &amp; FORCE_BNC) {</div><div class='add'>+			lp-&gt;adapter_cnf |= A_CNF_10B_2;</div><div class='add'>+			count++;</div><div class='add'>+		}</div><div class='add'>+		if (count &gt; 1)</div><div class='add'>+			lp-&gt;adapter_cnf |= A_CNF_MEDIA_AUTO;</div><div class='add'>+		else if (lp-&gt;force &amp; FORCE_RJ45)</div><div class='add'>+			lp-&gt;adapter_cnf |= A_CNF_MEDIA_10B_T;</div><div class='add'>+		else if (lp-&gt;force &amp; FORCE_AUI)</div><div class='add'>+			lp-&gt;adapter_cnf |= A_CNF_MEDIA_AUI;</div><div class='add'>+		else if (lp-&gt;force &amp; FORCE_BNC)</div><div class='add'>+			lp-&gt;adapter_cnf |= A_CNF_MEDIA_10B_2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cs89_dbg(1, debug, "%s: after force 0x%x, adapter_cnf=0x%x\n",</div><div class='add'>+		 dev-&gt;name, lp-&gt;force, lp-&gt;adapter_cnf);</div><div class='add'>+</div><div class='add'>+	/* FIXME: We don't let you set dc-dc polarity or low RX squelch from the command line: add it here */</div><div class='add'>+</div><div class='add'>+	/* FIXME: We don't let you set the IMM bit from the command line: add it to lp-&gt;auto_neg_cnf here */</div><div class='add'>+</div><div class='add'>+	/* FIXME: we don't set the Ethernet address on the command line.  Use</div><div class='add'>+	 * ifconfig IFACE hw ether AABBCCDDEEFF</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	pr_info("media %s%s%s",</div><div class='add'>+		(lp-&gt;adapter_cnf &amp; A_CNF_10B_T) ? "RJ-45," : "",</div><div class='add'>+		(lp-&gt;adapter_cnf &amp; A_CNF_AUI) ? "AUI," : "",</div><div class='add'>+		(lp-&gt;adapter_cnf &amp; A_CNF_10B_2) ? "BNC," : "");</div><div class='add'>+</div><div class='add'>+	lp-&gt;irq_map = 0xffff;</div><div class='add'>+</div><div class='add'>+	/* If this is a CS8900 then no pnp soft */</div><div class='add'>+	if (lp-&gt;chip_type != CS8900 &amp;&amp;</div><div class='add'>+	    /* Check if the ISA IRQ has been set  */</div><div class='add'>+	    (i = readreg(dev, PP_CS8920_ISAINT) &amp; 0xff,</div><div class='add'>+	     (i != 0 &amp;&amp; i &lt; CS8920_NO_INTS))) {</div><div class='add'>+		if (!dev-&gt;irq)</div><div class='add'>+			dev-&gt;irq = i;</div><div class='add'>+	} else {</div><div class='add'>+		i = lp-&gt;isa_config &amp; INT_NO_MASK;</div><div class='add'>+#ifndef CONFIG_CS89x0_PLATFORM</div><div class='add'>+		if (lp-&gt;chip_type == CS8900) {</div><div class='add'>+#ifdef CS89x0_NONISA_IRQ</div><div class='add'>+			i = cs8900_irq_map[0];</div><div class='add'>+#else</div><div class='add'>+			/* Translate the IRQ using the IRQ mapping table. */</div><div class='add'>+			if (i &gt;= ARRAY_SIZE(cs8900_irq_map))</div><div class='add'>+				pr_err("invalid ISA interrupt number %d\n", i);</div><div class='add'>+			else</div><div class='add'>+				i = cs8900_irq_map[i];</div><div class='add'>+</div><div class='add'>+			lp-&gt;irq_map = CS8900_IRQ_MAP; /* fixed IRQ map for CS8900 */</div><div class='add'>+		} else {</div><div class='add'>+			int irq_map_buff[IRQ_MAP_LEN/2];</div><div class='add'>+</div><div class='add'>+			if (get_eeprom_data(dev, IRQ_MAP_EEPROM_DATA,</div><div class='add'>+					    IRQ_MAP_LEN / 2,</div><div class='add'>+					    irq_map_buff) &gt;= 0) {</div><div class='add'>+				if ((irq_map_buff[0] &amp; 0xff) == PNP_IRQ_FRMT)</div><div class='add'>+					lp-&gt;irq_map = ((irq_map_buff[0] &gt;&gt; 8) |</div><div class='add'>+						       (irq_map_buff[1] &lt;&lt; 8));</div><div class='add'>+			}</div><div class='ctx'> #endif</div><div class='add'>+		}</div><div class='add'>+#endif</div><div class='add'>+		if (!dev-&gt;irq)</div><div class='add'>+			dev-&gt;irq = i;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* Update the statistics here. */</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	pr_cont(" IRQ %d", dev-&gt;irq);</div><div class='ctx'> </div><div class='del'>-/* Get the current statistics.	This may be called with the card open or</div><div class='del'>-   closed. */</div><div class='del'>-static struct net_device_stats *</div><div class='del'>-net_get_stats(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *lp = netdev_priv(dev);</div><div class='del'>-	unsigned long flags;</div><div class='add'>+#if ALLOW_DMA</div><div class='add'>+	if (lp-&gt;use_dma) {</div><div class='add'>+		get_dma_channel(dev);</div><div class='add'>+		pr_cont(", DMA %d", dev-&gt;dma);</div><div class='add'>+	} else</div><div class='add'>+#endif</div><div class='add'>+		pr_cont(", programmed I/O");</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='del'>-	/* Update the statistics from the device registers. */</div><div class='del'>-	dev-&gt;stats.rx_missed_errors += (readreg(dev, PP_RxMiss) &gt;&gt; 6);</div><div class='del'>-	dev-&gt;stats.collisions += (readreg(dev, PP_TxCol) &gt;&gt; 6);</div><div class='del'>-	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+	/* print the ethernet address. */</div><div class='add'>+	pr_cont(", MAC %pM\n", dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='del'>-	return &amp;dev-&gt;stats;</div><div class='add'>+	dev-&gt;netdev_ops	= &amp;net_ops;</div><div class='add'>+	dev-&gt;watchdog_timeo = HZ;</div><div class='add'>+</div><div class='add'>+	cs89_dbg(0, info, "cs89x0_probe1() successful\n");</div><div class='add'>+</div><div class='add'>+	retval = register_netdev(dev);</div><div class='add'>+	if (retval)</div><div class='add'>+		goto out2;</div><div class='add'>+	return 0;</div><div class='add'>+out2:</div><div class='add'>+	iowrite16(PP_ChipID, lp-&gt;virt_addr + ADD_PORT);</div><div class='add'>+out1:</div><div class='add'>+	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void set_multicast_list(struct net_device *dev)</div><div class='add'>+#ifndef CONFIG_CS89x0_PLATFORM</div><div class='add'>+/*</div><div class='add'>+ * This function converts the I/O port addres used by the cs89x0_probe() and</div><div class='add'>+ * init_module() functions to the I/O memory address used by the</div><div class='add'>+ * cs89x0_probe1() function.</div><div class='add'>+ */</div><div class='add'>+static int __init</div><div class='add'>+cs89x0_ioport_probe(struct net_device *dev, unsigned long ioport, int modular)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_local *lp = netdev_priv(dev);</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+	void __iomem *io_mem;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='del'>-	if(dev-&gt;flags&amp;IFF_PROMISC)</div><div class='del'>-	{</div><div class='del'>-		lp-&gt;rx_mode = RX_ALL_ACCEPT;</div><div class='add'>+	if (!lp)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev-&gt;base_addr = ioport;</div><div class='add'>+</div><div class='add'>+	if (!request_region(ioport, NETCARD_IO_EXTENT, DRV_NAME)) {</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='del'>-	else if ((dev-&gt;flags &amp; IFF_ALLMULTI) || !netdev_mc_empty(dev))</div><div class='del'>-	{</div><div class='del'>-		/* The multicast-accept list is initialized to accept-all, and we</div><div class='del'>-		   rely on higher-level filtering for now. */</div><div class='del'>-		lp-&gt;rx_mode = RX_MULTCAST_ACCEPT;</div><div class='add'>+</div><div class='add'>+	io_mem = ioport_map(ioport &amp; ~3, NETCARD_IO_EXTENT);</div><div class='add'>+	if (!io_mem) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto release;</div><div class='ctx'> 	}</div><div class='del'>-	else</div><div class='del'>-		lp-&gt;rx_mode = 0;</div><div class='ctx'> </div><div class='del'>-	writereg(dev, PP_RxCTL, DEF_RX_ACCEPT | lp-&gt;rx_mode);</div><div class='add'>+	/* if they give us an odd I/O address, then do ONE write to</div><div class='add'>+	 * the address port, to get it back to address zero, where we</div><div class='add'>+	 * expect to find the EISA signature word. An IO with a base of 0x3</div><div class='add'>+	 * will skip the test for the ADD_PORT.</div><div class='add'>+	 */</div><div class='add'>+	if (ioport &amp; 1) {</div><div class='add'>+		cs89_dbg(1, info, "%s: odd ioaddr 0x%lx\n", dev-&gt;name, ioport);</div><div class='add'>+		if ((ioport &amp; 2) != 2) {</div><div class='add'>+			if ((ioread16(io_mem + ADD_PORT) &amp; ADD_MASK) !=</div><div class='add'>+			    ADD_SIG) {</div><div class='add'>+				pr_err("%s: bad signature 0x%x\n",</div><div class='add'>+				       dev-&gt;name, ioread16(io_mem + ADD_PORT));</div><div class='add'>+				ret = -ENODEV;</div><div class='add'>+				goto unmap;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* in promiscuous mode, we accept errored packets, so we have to enable interrupts on them also */</div><div class='del'>-	writereg(dev, PP_RxCFG, lp-&gt;curr_rx_cfg |</div><div class='del'>-	     (lp-&gt;rx_mode == RX_ALL_ACCEPT? (RX_CRC_ERROR_ENBL|RX_RUNT_ENBL|RX_EXTRA_DATA_ENBL) : 0));</div><div class='del'>-	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+	ret = cs89x0_probe1(dev, io_mem, modular);</div><div class='add'>+	if (!ret)</div><div class='add'>+		goto out;</div><div class='add'>+unmap:</div><div class='add'>+	ioport_unmap(io_mem);</div><div class='add'>+release:</div><div class='add'>+	release_region(ioport, NETCARD_IO_EXTENT);</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifndef MODULE</div><div class='add'>+/* Check for a network adaptor of this type, and return '0' iff one exists.</div><div class='add'>+ * If dev-&gt;base_addr == 0, probe all likely locations.</div><div class='add'>+ * If dev-&gt;base_addr == 1, always return failure.</div><div class='add'>+ * If dev-&gt;base_addr == 2, allocate space for the device and return success</div><div class='add'>+ * (detachable devices only).</div><div class='add'>+ * Return 0 on success.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-static int set_mac_address(struct net_device *dev, void *p)</div><div class='add'>+struct net_device * __init cs89x0_probe(int unit)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	struct sockaddr *addr = p;</div><div class='del'>-</div><div class='del'>-	if (netif_running(dev))</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	struct net_device *dev = alloc_etherdev(sizeof(struct net_local));</div><div class='add'>+	unsigned *port;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int irq;</div><div class='add'>+	int io;</div><div class='ctx'> </div><div class='del'>-	memcpy(dev-&gt;dev_addr, addr-&gt;sa_data, dev-&gt;addr_len);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='ctx'> </div><div class='del'>-	if (net_debug)</div><div class='del'>-		printk("%s: Setting MAC address to %pM.\n",</div><div class='del'>-		       dev-&gt;name, dev-&gt;dev_addr);</div><div class='add'>+	sprintf(dev-&gt;name, "eth%d", unit);</div><div class='add'>+	netdev_boot_setup_check(dev);</div><div class='add'>+	io = dev-&gt;base_addr;</div><div class='add'>+	irq = dev-&gt;irq;</div><div class='ctx'> </div><div class='del'>-	/* set the Ethernet address */</div><div class='del'>-	for (i=0; i &lt; ETH_ALEN/2; i++)</div><div class='del'>-		writereg(dev, PP_IA+i*2, dev-&gt;dev_addr[i*2] | (dev-&gt;dev_addr[i*2+1] &lt;&lt; 8));</div><div class='add'>+	cs89_dbg(0, info, "cs89x0_probe(0x%x)\n", io);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	if (io &gt; 0x1ff)	{	/* Check a single specified location. */</div><div class='add'>+		err = cs89x0_ioport_probe(dev, io, 0);</div><div class='add'>+	} else if (io != 0) {	/* Don't probe at all. */</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+	} else {</div><div class='add'>+		for (port = netcard_portlist; *port; port++) {</div><div class='add'>+			if (cs89x0_ioport_probe(dev, *port, 0) == 0)</div><div class='add'>+				break;</div><div class='add'>+			dev-&gt;irq = irq;</div><div class='add'>+		}</div><div class='add'>+		if (!*port)</div><div class='add'>+			err = -ENODEV;</div><div class='add'>+	}</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+	return dev;</div><div class='add'>+out:</div><div class='add'>+	free_netdev(dev);</div><div class='add'>+	pr_warn("no cs8900 or cs8920 detected.  Be sure to disable PnP with SETUP\n");</div><div class='add'>+	return ERR_PTR(err);</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #if defined(MODULE) &amp;&amp; !defined(CONFIG_CS89x0_PLATFORM)</div><div class='ctx'> </div><div class='ctx'> static struct net_device *dev_cs89x0;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Support the 'debug' module parm even if we're compiled for non-debug to</div><div class='add'>+/* Support the 'debug' module parm even if we're compiled for non-debug to</div><div class='ctx'>  * avoid breaking someone's startup scripts</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -1764,11 +1755,11 @@ static int io;</div><div class='ctx'> static int irq;</div><div class='ctx'> static int debug;</div><div class='ctx'> static char media[8];</div><div class='del'>-static int duplex=-1;</div><div class='add'>+static int duplex = -1;</div><div class='ctx'> </div><div class='ctx'> static int use_dma;			/* These generate unused var warnings if ALLOW_DMA = 0 */</div><div class='ctx'> static int dma;</div><div class='del'>-static int dmasize=16;			/* or 64 */</div><div class='add'>+static int dmasize = 16;		/* or 64 */</div><div class='ctx'> </div><div class='ctx'> module_param(io, int, 0);</div><div class='ctx'> module_param(irq, int, 0);</div><div class='hunk'>@@ -1801,32 +1792,28 @@ MODULE_PARM_DESC(use_dma , "(ignored)");</div><div class='ctx'> MODULE_AUTHOR("Mike Cruse, Russwll Nelson &lt;nelson@crynwr.com&gt;, Andrew Morton");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /*</div><div class='del'>-* media=t             - specify media type</div><div class='del'>-   or media=2</div><div class='del'>-   or media=aui</div><div class='del'>-   or medai=auto</div><div class='del'>-* duplex=0            - specify forced half/full/autonegotiate duplex</div><div class='del'>-* debug=#             - debug level</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-* Default Chip Configuration:</div><div class='del'>-  * DMA Burst = enabled</div><div class='del'>-  * IOCHRDY Enabled = enabled</div><div class='del'>-    * UseSA = enabled</div><div class='del'>-    * CS8900 defaults to half-duplex if not specified on command-line</div><div class='del'>-    * CS8920 defaults to autoneg if not specified on command-line</div><div class='del'>-    * Use reset defaults for other config parameters</div><div class='del'>-</div><div class='del'>-* Assumptions:</div><div class='del'>-  * media type specified is supported (circuitry is present)</div><div class='del'>-  * if memory address is &gt; 1MB, then required mem decode hw is present</div><div class='del'>-  * if 10B-2, then agent other than driver will enable DC/DC converter</div><div class='del'>-    (hw or software util)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-*/</div><div class='add'>+ * media=t             - specify media type</div><div class='add'>+ * or media=2</div><div class='add'>+ * or media=aui</div><div class='add'>+ * or medai=auto</div><div class='add'>+ * duplex=0            - specify forced half/full/autonegotiate duplex</div><div class='add'>+ * debug=#             - debug level</div><div class='add'>+ *</div><div class='add'>+ * Default Chip Configuration:</div><div class='add'>+ * DMA Burst = enabled</div><div class='add'>+ * IOCHRDY Enabled = enabled</div><div class='add'>+ * UseSA = enabled</div><div class='add'>+ * CS8900 defaults to half-duplex if not specified on command-line</div><div class='add'>+ * CS8920 defaults to autoneg if not specified on command-line</div><div class='add'>+ * Use reset defaults for other config parameters</div><div class='add'>+ *</div><div class='add'>+ * Assumptions:</div><div class='add'>+ * media type specified is supported (circuitry is present)</div><div class='add'>+ * if memory address is &gt; 1MB, then required mem decode hw is present</div><div class='add'>+ * if 10B-2, then agent other than driver will enable DC/DC converter</div><div class='add'>+ * (hw or software util)</div><div class='add'>+ */</div><div class='ctx'> </div><div class='ctx'> int __init init_module(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -1856,8 +1843,8 @@ int __init init_module(void)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='del'>-        /* boy, they'd better get these right */</div><div class='del'>-        if (!strcmp(media, "rj45"))</div><div class='add'>+	/* boy, they'd better get these right */</div><div class='add'>+	if (!strcmp(media, "rj45"))</div><div class='ctx'> 		lp-&gt;adapter_cnf = A_CNF_MEDIA_10B_T | A_CNF_10B_T;</div><div class='ctx'> 	else if (!strcmp(media, "aui"))</div><div class='ctx'> 		lp-&gt;adapter_cnf = A_CNF_MEDIA_AUI   | A_CNF_AUI;</div><div class='hunk'>@@ -1866,27 +1853,28 @@ int __init init_module(void)</div><div class='ctx'> 	else</div><div class='ctx'> 		lp-&gt;adapter_cnf = A_CNF_MEDIA_10B_T | A_CNF_10B_T;</div><div class='ctx'> </div><div class='del'>-        if (duplex==-1)</div><div class='add'>+	if (duplex == -1)</div><div class='ctx'> 		lp-&gt;auto_neg_cnf = AUTO_NEG_ENABLE;</div><div class='ctx'> </div><div class='del'>-        if (io == 0) {</div><div class='del'>-                printk(KERN_ERR "cs89x0.c: Module autoprobing not allowed.\n");</div><div class='del'>-                printk(KERN_ERR "cs89x0.c: Append io=0xNNN\n");</div><div class='del'>-                ret = -EPERM;</div><div class='add'>+	if (io == 0) {</div><div class='add'>+		pr_err("Module autoprobing not allowed\n");</div><div class='add'>+		pr_err("Append io=0xNNN\n");</div><div class='add'>+		ret = -EPERM;</div><div class='ctx'> 		goto out;</div><div class='del'>-        } else if (io &lt;= 0x1ff) {</div><div class='add'>+	} else if (io &lt;= 0x1ff) {</div><div class='ctx'> 		ret = -ENXIO;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #if ALLOW_DMA</div><div class='ctx'> 	if (use_dma &amp;&amp; dmasize != 16 &amp;&amp; dmasize != 64) {</div><div class='del'>-		printk(KERN_ERR "cs89x0.c: dma size must be either 16K or 64K, not %dK\n", dmasize);</div><div class='add'>+		pr_err("dma size must be either 16K or 64K, not %dK\n",</div><div class='add'>+		       dmasize);</div><div class='ctx'> 		ret = -EPERM;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='del'>-	ret = cs89x0_probe1(dev, io, 1);</div><div class='add'>+	ret = cs89x0_ioport_probe(dev, io, 1);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -1900,8 +1888,11 @@ out:</div><div class='ctx'> void __exit</div><div class='ctx'> cleanup_module(void)</div><div class='ctx'> {</div><div class='add'>+	struct net_local *lp = netdev_priv(dev_cs89x0);</div><div class='add'>+</div><div class='ctx'> 	unregister_netdev(dev_cs89x0);</div><div class='del'>-	writeword(dev_cs89x0-&gt;base_addr, ADD_PORT, PP_ChipID);</div><div class='add'>+	iowrite16(PP_ChipID, lp-&gt;virt_addr + ADD_PORT);</div><div class='add'>+	ioport_unmap(lp-&gt;virt_addr);</div><div class='ctx'> 	release_region(dev_cs89x0-&gt;base_addr, NETCARD_IO_EXTENT);</div><div class='ctx'> 	free_netdev(dev_cs89x0);</div><div class='ctx'> }</div><div class='hunk'>@@ -1913,6 +1904,7 @@ static int __init cs89x0_platform_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct net_device *dev = alloc_etherdev(sizeof(struct net_local));</div><div class='ctx'> 	struct net_local *lp;</div><div class='ctx'> 	struct resource *mem_res;</div><div class='add'>+	void __iomem *virt_addr;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!dev)</div><div class='hunk'>@@ -1923,29 +1915,28 @@ static int __init cs89x0_platform_probe(struct platform_device *pdev)</div><div class='ctx'> 	mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	dev-&gt;irq = platform_get_irq(pdev, 0);</div><div class='ctx'> 	if (mem_res == NULL || dev-&gt;irq &lt;= 0) {</div><div class='del'>-		dev_warn(&amp;dev-&gt;dev, "memory/interrupt resource missing.\n");</div><div class='add'>+		dev_warn(&amp;dev-&gt;dev, "memory/interrupt resource missing\n");</div><div class='ctx'> 		err = -ENXIO;</div><div class='ctx'> 		goto free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lp-&gt;phys_addr = mem_res-&gt;start;</div><div class='ctx'> 	lp-&gt;size = resource_size(mem_res);</div><div class='del'>-	if (!request_mem_region(lp-&gt;phys_addr, lp-&gt;size, DRV_NAME)) {</div><div class='del'>-		dev_warn(&amp;dev-&gt;dev, "request_mem_region() failed.\n");</div><div class='add'>+	if (!request_mem_region(mem_res-&gt;start, lp-&gt;size, DRV_NAME)) {</div><div class='add'>+		dev_warn(&amp;dev-&gt;dev, "request_mem_region() failed\n");</div><div class='ctx'> 		err = -EBUSY;</div><div class='ctx'> 		goto free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lp-&gt;virt_addr = ioremap(lp-&gt;phys_addr, lp-&gt;size);</div><div class='del'>-	if (!lp-&gt;virt_addr) {</div><div class='del'>-		dev_warn(&amp;dev-&gt;dev, "ioremap() failed.\n");</div><div class='add'>+	virt_addr = ioremap(mem_res-&gt;start, lp-&gt;size);</div><div class='add'>+	if (!virt_addr) {</div><div class='add'>+		dev_warn(&amp;dev-&gt;dev, "ioremap() failed\n");</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto release;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = cs89x0_probe1(dev, (unsigned long)lp-&gt;virt_addr, 0);</div><div class='add'>+	err = cs89x0_probe1(dev, virt_addr, 0);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_warn(&amp;dev-&gt;dev, "no cs8900 or cs8920 detected.\n");</div><div class='add'>+		dev_warn(&amp;dev-&gt;dev, "no cs8900 or cs8920 detected\n");</div><div class='ctx'> 		goto unmap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1953,9 +1944,9 @@ static int __init cs89x0_platform_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> unmap:</div><div class='del'>-	iounmap(lp-&gt;virt_addr);</div><div class='add'>+	iounmap(virt_addr);</div><div class='ctx'> release:</div><div class='del'>-	release_mem_region(lp-&gt;phys_addr, lp-&gt;size);</div><div class='add'>+	release_mem_region(mem_res-&gt;start, lp-&gt;size);</div><div class='ctx'> free:</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1965,10 +1956,16 @@ static int cs89x0_platform_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct net_local *lp = netdev_priv(dev);</div><div class='add'>+	struct resource *mem_res;</div><div class='ctx'> </div><div class='add'>+	/* This platform_get_resource() call will not return NULL, because</div><div class='add'>+	 * the same call in cs89x0_platform_probe() has returned a non NULL</div><div class='add'>+	 * value.</div><div class='add'>+	 */</div><div class='add'>+	mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	unregister_netdev(dev);</div><div class='ctx'> 	iounmap(lp-&gt;virt_addr);</div><div class='del'>-	release_mem_region(lp-&gt;phys_addr, lp-&gt;size);</div><div class='add'>+	release_mem_region(mem_res-&gt;start, lp-&gt;size);</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1996,13 +1993,3 @@ static void __exit cs89x0_cleanup(void)</div><div class='ctx'> module_exit(cs89x0_cleanup);</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_CS89x0_PLATFORM */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Local variables:</div><div class='del'>- *  version-control: t</div><div class='del'>- *  kept-new-versions: 5</div><div class='del'>- *  c-indent-level: 8</div><div class='del'>- *  tab-width: 8</div><div class='del'>- * End:</div><div class='del'>- *</div><div class='del'>- */</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethernet/cisco/enic/enic_main.c<br/>index 77b4e873f91c..8132c785cea8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/cisco/enic/enic_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/cisco/enic/enic_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/cisco/enic/enic_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/cisco/enic/enic_main.c</a></div><div class='hunk'>@@ -944,8 +944,7 @@ static void enic_update_multicast_addr_list(struct enic *enic)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;mc_count; i++) {</div><div class='ctx'> 		for (j = 0; j &lt; mc_count; j++)</div><div class='del'>-			if (compare_ether_addr(enic-&gt;mc_addr[i],</div><div class='del'>-				mc_addr[j]) == 0)</div><div class='add'>+			if (ether_addr_equal(enic-&gt;mc_addr[i], mc_addr[j]))</div><div class='ctx'> 				break;</div><div class='ctx'> 		if (j == mc_count)</div><div class='ctx'> 			enic_dev_del_addr(enic, enic-&gt;mc_addr[i]);</div><div class='hunk'>@@ -953,8 +952,7 @@ static void enic_update_multicast_addr_list(struct enic *enic)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; mc_count; i++) {</div><div class='ctx'> 		for (j = 0; j &lt; enic-&gt;mc_count; j++)</div><div class='del'>-			if (compare_ether_addr(mc_addr[i],</div><div class='del'>-				enic-&gt;mc_addr[j]) == 0)</div><div class='add'>+			if (ether_addr_equal(mc_addr[i], enic-&gt;mc_addr[j]))</div><div class='ctx'> 				break;</div><div class='ctx'> 		if (j == enic-&gt;mc_count)</div><div class='ctx'> 			enic_dev_add_addr(enic, mc_addr[i]);</div><div class='hunk'>@@ -999,8 +997,7 @@ static void enic_update_unicast_addr_list(struct enic *enic)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;uc_count; i++) {</div><div class='ctx'> 		for (j = 0; j &lt; uc_count; j++)</div><div class='del'>-			if (compare_ether_addr(enic-&gt;uc_addr[i],</div><div class='del'>-				uc_addr[j]) == 0)</div><div class='add'>+			if (ether_addr_equal(enic-&gt;uc_addr[i], uc_addr[j]))</div><div class='ctx'> 				break;</div><div class='ctx'> 		if (j == uc_count)</div><div class='ctx'> 			enic_dev_del_addr(enic, enic-&gt;uc_addr[i]);</div><div class='hunk'>@@ -1008,8 +1005,7 @@ static void enic_update_unicast_addr_list(struct enic *enic)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; uc_count; i++) {</div><div class='ctx'> 		for (j = 0; j &lt; enic-&gt;uc_count; j++)</div><div class='del'>-			if (compare_ether_addr(uc_addr[i],</div><div class='del'>-				enic-&gt;uc_addr[j]) == 0)</div><div class='add'>+			if (ether_addr_equal(uc_addr[i], enic-&gt;uc_addr[j]))</div><div class='ctx'> 				break;</div><div class='ctx'> 		if (j == enic-&gt;uc_count)</div><div class='ctx'> 			enic_dev_add_addr(enic, uc_addr[i]);</div><div class='hunk'>@@ -1193,18 +1189,16 @@ static int enic_get_vf_port(struct net_device *netdev, int vf,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	NLA_PUT_U16(skb, IFLA_PORT_REQUEST, pp-&gt;request);</div><div class='del'>-	NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);</div><div class='del'>-	if (pp-&gt;set &amp; ENIC_SET_NAME)</div><div class='del'>-		NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,</div><div class='del'>-			pp-&gt;name);</div><div class='del'>-	if (pp-&gt;set &amp; ENIC_SET_INSTANCE)</div><div class='del'>-		NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,</div><div class='del'>-			pp-&gt;instance_uuid);</div><div class='del'>-	if (pp-&gt;set &amp; ENIC_SET_HOST)</div><div class='del'>-		NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,</div><div class='del'>-			pp-&gt;host_uuid);</div><div class='del'>-</div><div class='add'>+	if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp-&gt;request) ||</div><div class='add'>+	    nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||</div><div class='add'>+	    ((pp-&gt;set &amp; ENIC_SET_NAME) &amp;&amp;</div><div class='add'>+	     nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp-&gt;name)) ||</div><div class='add'>+	    ((pp-&gt;set &amp; ENIC_SET_INSTANCE) &amp;&amp;</div><div class='add'>+	     nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,</div><div class='add'>+		     pp-&gt;instance_uuid)) ||</div><div class='add'>+	    ((pp-&gt;set &amp; ENIC_SET_HOST) &amp;&amp;</div><div class='add'>+	     nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp-&gt;host_uuid)))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic_pp.c b/drivers/net/ethernet/cisco/enic/enic_pp.c<br/>index dafea1ecb7b1..43464f0a4f99 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/cisco/enic/enic_pp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/cisco/enic/enic_pp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/cisco/enic/enic_pp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/cisco/enic/enic_pp.c</a></div><div class='hunk'>@@ -184,7 +184,7 @@ static int (*enic_pp_handlers[])(struct enic *enic, int vf,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const int enic_pp_handlers_count =</div><div class='del'>-			sizeof(enic_pp_handlers)/sizeof(*enic_pp_handlers);</div><div class='add'>+			ARRAY_SIZE(enic_pp_handlers);</div><div class='ctx'> </div><div class='ctx'> static int enic_pp_preassociate(struct enic *enic, int vf,</div><div class='ctx'> 	struct enic_port_profile *prev_pp, int *restore_pp)</div><div class='head'>diff --git a/drivers/net/ethernet/davicom/Kconfig b/drivers/net/ethernet/davicom/Kconfig<br/>index 972b62b31837..9745fe5e8039 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/davicom/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/davicom/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/davicom/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/davicom/Kconfig</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> config DM9000</div><div class='ctx'> 	tristate "DM9000 support"</div><div class='del'>-	depends on ARM || BLACKFIN || MIPS</div><div class='add'>+	depends on ARM || BLACKFIN || MIPS || COLDFIRE</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select NET_CORE</div><div class='ctx'> 	select MII</div><div class='head'>diff --git a/drivers/net/ethernet/dec/ewrk3.c b/drivers/net/ethernet/dec/ewrk3.c<br/>index 1879f84a25a3..17ae8c619680 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/dec/ewrk3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/dec/ewrk3.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/dec/ewrk3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/ewrk3.c</a></div><div class='hunk'>@@ -1016,7 +1016,8 @@ static int ewrk3_rx(struct net_device *dev)</div><div class='ctx'> 							} else {</div><div class='ctx'> 								lp-&gt;pktStats.multicast++;</div><div class='ctx'> 							}</div><div class='del'>-						} else if (compare_ether_addr(p, dev-&gt;dev_addr) == 0) {</div><div class='add'>+						} else if (ether_addr_equal(p,</div><div class='add'>+									    dev-&gt;dev_addr)) {</div><div class='ctx'> 							lp-&gt;pktStats.unicast++;</div><div class='ctx'> 						}</div><div class='ctx'> 						lp-&gt;pktStats.bins[0]++;		/* Duplicates stats.rx_packets */</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/de2104x.c b/drivers/net/ethernet/dec/tulip/de2104x.c<br/>index 68f1c39184df..61cc09342865 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/de2104x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/dec/tulip/de2104x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/de2104x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/de2104x.c</a></div><div class='hunk'>@@ -1380,6 +1380,7 @@ static void de_free_rings (struct de_private *de)</div><div class='ctx'> static int de_open (struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct de_private *de = netdev_priv(dev);</div><div class='add'>+	const int irq = de-&gt;pdev-&gt;irq;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(de, ifup, dev, "enabling interface\n");</div><div class='hunk'>@@ -1394,10 +1395,9 @@ static int de_open (struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	dw32(IntrMask, 0);</div><div class='ctx'> </div><div class='del'>-	rc = request_irq(dev-&gt;irq, de_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	rc = request_irq(irq, de_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='ctx'> 	if (rc) {</div><div class='del'>-		netdev_err(dev, "IRQ %d request failure, err=%d\n",</div><div class='del'>-			   dev-&gt;irq, rc);</div><div class='add'>+		netdev_err(dev, "IRQ %d request failure, err=%d\n", irq, rc);</div><div class='ctx'> 		goto err_out_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1413,7 +1413,7 @@ static int de_open (struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_out_free_irq:</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(irq, dev);</div><div class='ctx'> err_out_free:</div><div class='ctx'> 	de_free_rings(de);</div><div class='ctx'> 	return rc;</div><div class='hunk'>@@ -1434,7 +1434,7 @@ static int de_close (struct net_device *dev)</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;de-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(de-&gt;pdev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	de_free_rings(de);</div><div class='ctx'> 	de_adapter_sleep(de);</div><div class='hunk'>@@ -1444,6 +1444,7 @@ static int de_close (struct net_device *dev)</div><div class='ctx'> static void de_tx_timeout (struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct de_private *de = netdev_priv(dev);</div><div class='add'>+	const int irq = de-&gt;pdev-&gt;irq;</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(dev, "NIC status %08x mode %08x sia %08x desc %u/%u/%u\n",</div><div class='ctx'> 		   dr32(MacStatus), dr32(MacMode), dr32(SIAStatus),</div><div class='hunk'>@@ -1451,7 +1452,7 @@ static void de_tx_timeout (struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	del_timer_sync(&amp;de-&gt;media_timer);</div><div class='ctx'> </div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='add'>+	disable_irq(irq);</div><div class='ctx'> 	spin_lock_irq(&amp;de-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	de_stop_hw(de);</div><div class='hunk'>@@ -1459,12 +1460,12 @@ static void de_tx_timeout (struct net_device *dev)</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(&amp;de-&gt;lock);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> </div><div class='ctx'> 	/* Update the error counts. */</div><div class='ctx'> 	__de_get_stats(de);</div><div class='ctx'> </div><div class='del'>-	synchronize_irq(dev-&gt;irq);</div><div class='add'>+	synchronize_irq(irq);</div><div class='ctx'> 	de_clean_rings(de);</div><div class='ctx'> </div><div class='ctx'> 	de_init_rings(de);</div><div class='hunk'>@@ -2024,8 +2025,6 @@ static int __devinit de_init_one (struct pci_dev *pdev,</div><div class='ctx'> 		goto err_out_res;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-</div><div class='ctx'> 	/* obtain and check validity of PCI I/O address */</div><div class='ctx'> 	pciaddr = pci_resource_start(pdev, 1);</div><div class='ctx'> 	if (!pciaddr) {</div><div class='hunk'>@@ -2050,7 +2049,6 @@ static int __devinit de_init_one (struct pci_dev *pdev,</div><div class='ctx'> 		       pciaddr, pci_name(pdev));</div><div class='ctx'> 		goto err_out_res;</div><div class='ctx'> 	}</div><div class='del'>-	dev-&gt;base_addr = (unsigned long) regs;</div><div class='ctx'> 	de-&gt;regs = regs;</div><div class='ctx'> </div><div class='ctx'> 	de_adapter_wake(de);</div><div class='hunk'>@@ -2078,11 +2076,9 @@ static int __devinit de_init_one (struct pci_dev *pdev,</div><div class='ctx'> 		goto err_out_iomap;</div><div class='ctx'> </div><div class='ctx'> 	/* print info about board and interface just registered */</div><div class='del'>-	netdev_info(dev, "%s at 0x%lx, %pM, IRQ %d\n",</div><div class='add'>+	netdev_info(dev, "%s at %p, %pM, IRQ %d\n",</div><div class='ctx'> 		    de-&gt;de21040 ? "21040" : "21041",</div><div class='del'>-		    dev-&gt;base_addr,</div><div class='del'>-		    dev-&gt;dev_addr,</div><div class='del'>-		    dev-&gt;irq);</div><div class='add'>+		    regs, dev-&gt;dev_addr, pdev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata(pdev, dev);</div><div class='ctx'> </div><div class='hunk'>@@ -2130,9 +2126,11 @@ static int de_suspend (struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	if (netif_running (dev)) {</div><div class='add'>+		const int irq = pdev-&gt;irq;</div><div class='add'>+</div><div class='ctx'> 		del_timer_sync(&amp;de-&gt;media_timer);</div><div class='ctx'> </div><div class='del'>-		disable_irq(dev-&gt;irq);</div><div class='add'>+		disable_irq(irq);</div><div class='ctx'> 		spin_lock_irq(&amp;de-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 		de_stop_hw(de);</div><div class='hunk'>@@ -2141,12 +2139,12 @@ static int de_suspend (struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> 		netif_carrier_off(dev);</div><div class='ctx'> </div><div class='ctx'> 		spin_unlock_irq(&amp;de-&gt;lock);</div><div class='del'>-		enable_irq(dev-&gt;irq);</div><div class='add'>+		enable_irq(irq);</div><div class='ctx'> </div><div class='ctx'> 		/* Update the error counts. */</div><div class='ctx'> 		__de_get_stats(de);</div><div class='ctx'> </div><div class='del'>-		synchronize_irq(dev-&gt;irq);</div><div class='add'>+		synchronize_irq(irq);</div><div class='ctx'> 		de_clean_rings(de);</div><div class='ctx'> </div><div class='ctx'> 		de_adapter_sleep(de);</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/de4x5.c b/drivers/net/ethernet/dec/tulip/de4x5.c<br/>index 18b106cc6d2b..d3cd489d11a2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/de4x5.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/dec/tulip/de4x5.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/de4x5.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/de4x5.c</a></div><div class='hunk'>@@ -1874,7 +1874,7 @@ de4x5_local_stats(struct net_device *dev, char *buf, int pkt_len)</div><div class='ctx'> 	} else {</div><div class='ctx'> 	    lp-&gt;pktStats.multicast++;</div><div class='ctx'> 	}</div><div class='del'>-    } else if (compare_ether_addr(buf, dev-&gt;dev_addr) == 0) {</div><div class='add'>+    } else if (ether_addr_equal(buf, dev-&gt;dev_addr)) {</div><div class='ctx'>         lp-&gt;pktStats.unicast++;</div><div class='ctx'>     }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/dmfe.c b/drivers/net/ethernet/dec/tulip/dmfe.c<br/>index 1eccf4945485..4d6fe604fa64 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/dmfe.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/dec/tulip/dmfe.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/dmfe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/dmfe.c</a></div><div class='hunk'>@@ -150,6 +150,12 @@</div><div class='ctx'> #define DMFE_TX_TIMEOUT ((3*HZ)/2)	/* tx packet time-out time 1.5 s" */</div><div class='ctx'> #define DMFE_TX_KICK 	(HZ/2)	/* tx packet Kick-out time 0.5 s" */</div><div class='ctx'> </div><div class='add'>+#define dw32(reg, val)	iowrite32(val, ioaddr + (reg))</div><div class='add'>+#define dw16(reg, val)	iowrite16(val, ioaddr + (reg))</div><div class='add'>+#define dr32(reg)	ioread32(ioaddr + (reg))</div><div class='add'>+#define dr16(reg)	ioread16(ioaddr + (reg))</div><div class='add'>+#define dr8(reg)	ioread8(ioaddr + (reg))</div><div class='add'>+</div><div class='ctx'> #define DMFE_DBUG(dbug_now, msg, value)			\</div><div class='ctx'> 	do {						\</div><div class='ctx'> 		if (dmfe_debug || (dbug_now))		\</div><div class='hunk'>@@ -178,14 +184,6 @@</div><div class='ctx'> </div><div class='ctx'> #define SROM_V41_CODE   0x14</div><div class='ctx'> </div><div class='del'>-#define SROM_CLK_WRITE(data, ioaddr) \</div><div class='del'>-	outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr); \</div><div class='del'>-	udelay(5); \</div><div class='del'>-	outl(data|CR9_SROM_READ|CR9_SRCS|CR9_SRCLK,ioaddr); \</div><div class='del'>-	udelay(5); \</div><div class='del'>-	outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr); \</div><div class='del'>-	udelay(5);</div><div class='del'>-</div><div class='ctx'> #define __CHK_IO_SIZE(pci_id, dev_rev) \</div><div class='ctx'>  (( ((pci_id)==PCI_DM9132_ID) || ((dev_rev) &gt;= 0x30) ) ? \</div><div class='ctx'> 	DM9102A_IO_SIZE: DM9102_IO_SIZE)</div><div class='hunk'>@@ -213,11 +211,11 @@ struct rx_desc {</div><div class='ctx'> struct dmfe_board_info {</div><div class='ctx'> 	u32 chip_id;			/* Chip vendor/Device ID */</div><div class='ctx'> 	u8 chip_revision;		/* Chip revision */</div><div class='del'>-	struct DEVICE *next_dev;	/* next device */</div><div class='add'>+	struct net_device *next_dev;	/* next device */</div><div class='ctx'> 	struct pci_dev *pdev;		/* PCI device */</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> </div><div class='del'>-	long ioaddr;			/* I/O base address */</div><div class='add'>+	void __iomem *ioaddr;		/* I/O base address */</div><div class='ctx'> 	u32 cr0_data;</div><div class='ctx'> 	u32 cr5_data;</div><div class='ctx'> 	u32 cr6_data;</div><div class='hunk'>@@ -320,20 +318,20 @@ static netdev_tx_t dmfe_start_xmit(struct sk_buff *, struct DEVICE *);</div><div class='ctx'> static int dmfe_stop(struct DEVICE *);</div><div class='ctx'> static void dmfe_set_filter_mode(struct DEVICE *);</div><div class='ctx'> static const struct ethtool_ops netdev_ethtool_ops;</div><div class='del'>-static u16 read_srom_word(long ,int);</div><div class='add'>+static u16 read_srom_word(void __iomem *, int);</div><div class='ctx'> static irqreturn_t dmfe_interrupt(int , void *);</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> static void poll_dmfe (struct net_device *dev);</div><div class='ctx'> #endif</div><div class='del'>-static void dmfe_descriptor_init(struct net_device *, unsigned long);</div><div class='add'>+static void dmfe_descriptor_init(struct net_device *);</div><div class='ctx'> static void allocate_rx_buffer(struct net_device *);</div><div class='del'>-static void update_cr6(u32, unsigned long);</div><div class='add'>+static void update_cr6(u32, void __iomem *);</div><div class='ctx'> static void send_filter_frame(struct DEVICE *);</div><div class='ctx'> static void dm9132_id_table(struct DEVICE *);</div><div class='del'>-static u16 phy_read(unsigned long, u8, u8, u32);</div><div class='del'>-static void phy_write(unsigned long, u8, u8, u16, u32);</div><div class='del'>-static void phy_write_1bit(unsigned long, u32);</div><div class='del'>-static u16 phy_read_1bit(unsigned long);</div><div class='add'>+static u16 phy_read(void __iomem *, u8, u8, u32);</div><div class='add'>+static void phy_write(void __iomem *, u8, u8, u16, u32);</div><div class='add'>+static void phy_write_1bit(void __iomem *, u32);</div><div class='add'>+static u16 phy_read_1bit(void __iomem *);</div><div class='ctx'> static u8 dmfe_sense_speed(struct dmfe_board_info *);</div><div class='ctx'> static void dmfe_process_mode(struct dmfe_board_info *);</div><div class='ctx'> static void dmfe_timer(unsigned long);</div><div class='hunk'>@@ -462,14 +460,16 @@ static int __devinit dmfe_init_one (struct pci_dev *pdev,</div><div class='ctx'> 	db-&gt;buf_pool_dma_start = db-&gt;buf_pool_dma_ptr;</div><div class='ctx'> </div><div class='ctx'> 	db-&gt;chip_id = ent-&gt;driver_data;</div><div class='del'>-	db-&gt;ioaddr = pci_resource_start(pdev, 0);</div><div class='add'>+	/* IO type range. */</div><div class='add'>+	db-&gt;ioaddr = pci_iomap(pdev, 0, 0);</div><div class='add'>+	if (!db-&gt;ioaddr)</div><div class='add'>+		goto err_out_free_buf;</div><div class='add'>+</div><div class='ctx'> 	db-&gt;chip_revision = pdev-&gt;revision;</div><div class='ctx'> 	db-&gt;wol_mode = 0;</div><div class='ctx'> </div><div class='ctx'> 	db-&gt;pdev = pdev;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = db-&gt;ioaddr;</div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> 	pci_set_drvdata(pdev, dev);</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;netdev_ops;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;netdev_ethtool_ops;</div><div class='hunk'>@@ -484,9 +484,10 @@ static int __devinit dmfe_init_one (struct pci_dev *pdev,</div><div class='ctx'> 		db-&gt;chip_type = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* read 64 word srom data */</div><div class='del'>-	for (i = 0; i &lt; 64; i++)</div><div class='add'>+	for (i = 0; i &lt; 64; i++) {</div><div class='ctx'> 		((__le16 *) db-&gt;srom)[i] =</div><div class='ctx'> 			cpu_to_le16(read_srom_word(db-&gt;ioaddr, i));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set Node address */</div><div class='ctx'> 	for (i = 0; i &lt; 6; i++)</div><div class='hunk'>@@ -494,16 +495,18 @@ static int __devinit dmfe_init_one (struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdev (dev);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_out_free_buf;</div><div class='add'>+		goto err_out_unmap;</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;dev-&gt;dev, "Davicom DM%04lx at pci%s, %pM, irq %d\n",</div><div class='ctx'> 		 ent-&gt;driver_data &gt;&gt; 16,</div><div class='del'>-		 pci_name(pdev), dev-&gt;dev_addr, dev-&gt;irq);</div><div class='add'>+		 pci_name(pdev), dev-&gt;dev_addr, pdev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_out_unmap:</div><div class='add'>+	pci_iounmap(pdev, db-&gt;ioaddr);</div><div class='ctx'> err_out_free_buf:</div><div class='ctx'> 	pci_free_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4,</div><div class='ctx'> 			    db-&gt;buf_pool_ptr, db-&gt;buf_pool_dma_ptr);</div><div class='hunk'>@@ -532,7 +535,7 @@ static void __devexit dmfe_remove_one (struct pci_dev *pdev)</div><div class='ctx'>  	if (dev) {</div><div class='ctx'> </div><div class='ctx'> 		unregister_netdev(dev);</div><div class='del'>-</div><div class='add'>+		pci_iounmap(db-&gt;pdev, db-&gt;ioaddr);</div><div class='ctx'> 		pci_free_consistent(db-&gt;pdev, sizeof(struct tx_desc) *</div><div class='ctx'> 					DESC_ALL_CNT + 0x20, db-&gt;desc_pool_ptr,</div><div class='ctx'>  					db-&gt;desc_pool_dma_ptr);</div><div class='hunk'>@@ -555,13 +558,13 @@ static void __devexit dmfe_remove_one (struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> static int dmfe_open(struct DEVICE *dev)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='ctx'> 	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='add'>+	const int irq = db-&gt;pdev-&gt;irq;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	DMFE_DBUG(0, "dmfe_open", 0);</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(dev-&gt;irq, dmfe_interrupt,</div><div class='del'>-			  IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	ret = request_irq(irq, dmfe_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -615,14 +618,14 @@ static int dmfe_open(struct DEVICE *dev)</div><div class='ctx'> static void dmfe_init_dm910x(struct DEVICE *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='del'>-	unsigned long ioaddr = db-&gt;ioaddr;</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	DMFE_DBUG(0, "dmfe_init_dm910x()", 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset DM910x MAC controller */</div><div class='del'>-	outl(DM910X_RESET, ioaddr + DCR0);	/* RESET MAC */</div><div class='add'>+	dw32(DCR0, DM910X_RESET);	/* RESET MAC */</div><div class='ctx'> 	udelay(100);</div><div class='del'>-	outl(db-&gt;cr0_data, ioaddr + DCR0);</div><div class='add'>+	dw32(DCR0, db-&gt;cr0_data);</div><div class='ctx'> 	udelay(5);</div><div class='ctx'> </div><div class='ctx'> 	/* Phy addr : DM910(A)2/DM9132/9801, phy address = 1 */</div><div class='hunk'>@@ -633,12 +636,12 @@ static void dmfe_init_dm910x(struct DEVICE *dev)</div><div class='ctx'> 	db-&gt;media_mode = dmfe_media_mode;</div><div class='ctx'> </div><div class='ctx'> 	/* RESET Phyxcer Chip by GPR port bit 7 */</div><div class='del'>-	outl(0x180, ioaddr + DCR12);		/* Let bit 7 output port */</div><div class='add'>+	dw32(DCR12, 0x180);		/* Let bit 7 output port */</div><div class='ctx'> 	if (db-&gt;chip_id == PCI_DM9009_ID) {</div><div class='del'>-		outl(0x80, ioaddr + DCR12);	/* Issue RESET signal */</div><div class='add'>+		dw32(DCR12, 0x80);	/* Issue RESET signal */</div><div class='ctx'> 		mdelay(300);			/* Delay 300 ms */</div><div class='ctx'> 	}</div><div class='del'>-	outl(0x0, ioaddr + DCR12);	/* Clear RESET signal */</div><div class='add'>+	dw32(DCR12, 0x0);	/* Clear RESET signal */</div><div class='ctx'> </div><div class='ctx'> 	/* Process Phyxcer Media Mode */</div><div class='ctx'> 	if ( !(db-&gt;media_mode &amp; 0x10) )	/* Force 1M mode */</div><div class='hunk'>@@ -649,7 +652,7 @@ static void dmfe_init_dm910x(struct DEVICE *dev)</div><div class='ctx'> 		db-&gt;op_mode = db-&gt;media_mode; 	/* Force Mode */</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize Transmit/Receive decriptor and CR3/4 */</div><div class='del'>-	dmfe_descriptor_init(dev, ioaddr);</div><div class='add'>+	dmfe_descriptor_init(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Init CR6 to program DM910x operation */</div><div class='ctx'> 	update_cr6(db-&gt;cr6_data, ioaddr);</div><div class='hunk'>@@ -662,10 +665,10 @@ static void dmfe_init_dm910x(struct DEVICE *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Init CR7, interrupt active bit */</div><div class='ctx'> 	db-&gt;cr7_data = CR7_DEFAULT;</div><div class='del'>-	outl(db-&gt;cr7_data, ioaddr + DCR7);</div><div class='add'>+	dw32(DCR7, db-&gt;cr7_data);</div><div class='ctx'> </div><div class='ctx'> 	/* Init CR15, Tx jabber and Rx watchdog timer */</div><div class='del'>-	outl(db-&gt;cr15_data, ioaddr + DCR15);</div><div class='add'>+	dw32(DCR15, db-&gt;cr15_data);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable DM910X Tx/Rx function */</div><div class='ctx'> 	db-&gt;cr6_data |= CR6_RXSC | CR6_TXSC | 0x40000;</div><div class='hunk'>@@ -682,6 +685,7 @@ static netdev_tx_t dmfe_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 					 struct DEVICE *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	struct tx_desc *txptr;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -707,7 +711,7 @@ static netdev_tx_t dmfe_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Disable NIC interrupt */</div><div class='del'>-	outl(0, dev-&gt;base_addr + DCR7);</div><div class='add'>+	dw32(DCR7, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* transmit this packet */</div><div class='ctx'> 	txptr = db-&gt;tx_insert_ptr;</div><div class='hunk'>@@ -721,11 +725,11 @@ static netdev_tx_t dmfe_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	if ( (!db-&gt;tx_queue_cnt) &amp;&amp; (db-&gt;tx_packet_cnt &lt; TX_MAX_SEND_CNT) ) {</div><div class='ctx'> 		txptr-&gt;tdes0 = cpu_to_le32(0x80000000);	/* Set owner bit */</div><div class='ctx'> 		db-&gt;tx_packet_cnt++;			/* Ready to send */</div><div class='del'>-		outl(0x1, dev-&gt;base_addr + DCR1);	/* Issue Tx polling */</div><div class='add'>+		dw32(DCR1, 0x1);			/* Issue Tx polling */</div><div class='ctx'> 		dev-&gt;trans_start = jiffies;		/* saved time stamp */</div><div class='ctx'> 	} else {</div><div class='ctx'> 		db-&gt;tx_queue_cnt++;			/* queue TX packet */</div><div class='del'>-		outl(0x1, dev-&gt;base_addr + DCR1);	/* Issue Tx polling */</div><div class='add'>+		dw32(DCR1, 0x1);			/* Issue Tx polling */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Tx resource check */</div><div class='hunk'>@@ -734,7 +738,7 @@ static netdev_tx_t dmfe_start_xmit(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	/* Restore CR7 to enable interrupt */</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;db-&gt;lock, flags);</div><div class='del'>-	outl(db-&gt;cr7_data, dev-&gt;base_addr + DCR7);</div><div class='add'>+	dw32(DCR7, db-&gt;cr7_data);</div><div class='ctx'> </div><div class='ctx'> 	/* free this SKB */</div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='hunk'>@@ -751,7 +755,7 @@ static netdev_tx_t dmfe_start_xmit(struct sk_buff *skb,</div><div class='ctx'> static int dmfe_stop(struct DEVICE *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='del'>-	unsigned long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	DMFE_DBUG(0, "dmfe_stop", 0);</div><div class='ctx'> </div><div class='hunk'>@@ -762,12 +766,12 @@ static int dmfe_stop(struct DEVICE *dev)</div><div class='ctx'> 	del_timer_sync(&amp;db-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset &amp; stop DM910X board */</div><div class='del'>-	outl(DM910X_RESET, ioaddr + DCR0);</div><div class='del'>-	udelay(5);</div><div class='del'>-	phy_write(db-&gt;ioaddr, db-&gt;phy_addr, 0, 0x8000, db-&gt;chip_id);</div><div class='add'>+	dw32(DCR0, DM910X_RESET);</div><div class='add'>+	udelay(100);</div><div class='add'>+	phy_write(ioaddr, db-&gt;phy_addr, 0, 0x8000, db-&gt;chip_id);</div><div class='ctx'> </div><div class='ctx'> 	/* free interrupt */</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(db-&gt;pdev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	/* free allocated rx buffer */</div><div class='ctx'> 	dmfe_free_rxbuffer(db);</div><div class='hunk'>@@ -794,7 +798,7 @@ static irqreturn_t dmfe_interrupt(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct DEVICE *dev = dev_id;</div><div class='ctx'> 	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='del'>-	unsigned long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	DMFE_DBUG(0, "dmfe_interrupt()", 0);</div><div class='hunk'>@@ -802,15 +806,15 @@ static irqreturn_t dmfe_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	spin_lock_irqsave(&amp;db-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* Got DM910X status */</div><div class='del'>-	db-&gt;cr5_data = inl(ioaddr + DCR5);</div><div class='del'>-	outl(db-&gt;cr5_data, ioaddr + DCR5);</div><div class='add'>+	db-&gt;cr5_data = dr32(DCR5);</div><div class='add'>+	dw32(DCR5, db-&gt;cr5_data);</div><div class='ctx'> 	if ( !(db-&gt;cr5_data &amp; 0xc1) ) {</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;db-&gt;lock, flags);</div><div class='ctx'> 		return IRQ_HANDLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Disable all interrupt in CR7 to solve the interrupt edge problem */</div><div class='del'>-	outl(0, ioaddr + DCR7);</div><div class='add'>+	dw32(DCR7, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Check system status */</div><div class='ctx'> 	if (db-&gt;cr5_data &amp; 0x2000) {</div><div class='hunk'>@@ -838,11 +842,11 @@ static irqreturn_t dmfe_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	if (db-&gt;dm910x_chk_mode &amp; 0x2) {</div><div class='ctx'> 		db-&gt;dm910x_chk_mode = 0x4;</div><div class='ctx'> 		db-&gt;cr6_data |= 0x100;</div><div class='del'>-		update_cr6(db-&gt;cr6_data, db-&gt;ioaddr);</div><div class='add'>+		update_cr6(db-&gt;cr6_data, ioaddr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Restore CR7 to enable interrupt mask */</div><div class='del'>-	outl(db-&gt;cr7_data, ioaddr + DCR7);</div><div class='add'>+	dw32(DCR7, db-&gt;cr7_data);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;db-&gt;lock, flags);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='hunk'>@@ -858,11 +862,14 @@ static irqreturn_t dmfe_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> static void poll_dmfe (struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='add'>+	const int irq = db-&gt;pdev-&gt;irq;</div><div class='add'>+</div><div class='ctx'> 	/* disable_irq here is not very nice, but with the lockless</div><div class='ctx'> 	   interrupt handler we have no other choice. */</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='del'>-	dmfe_interrupt (dev-&gt;irq, dev);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	disable_irq(irq);</div><div class='add'>+	dmfe_interrupt (irq, dev);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -873,7 +880,7 @@ static void poll_dmfe (struct net_device *dev)</div><div class='ctx'> static void dmfe_free_tx_pkt(struct DEVICE *dev, struct dmfe_board_info * db)</div><div class='ctx'> {</div><div class='ctx'> 	struct tx_desc *txptr;</div><div class='del'>-	unsigned long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	u32 tdes0;</div><div class='ctx'> </div><div class='ctx'> 	txptr = db-&gt;tx_remove_ptr;</div><div class='hunk'>@@ -897,7 +904,7 @@ static void dmfe_free_tx_pkt(struct DEVICE *dev, struct dmfe_board_info * db)</div><div class='ctx'> 					db-&gt;tx_fifo_underrun++;</div><div class='ctx'> 					if ( !(db-&gt;cr6_data &amp; CR6_SFT) ) {</div><div class='ctx'> 						db-&gt;cr6_data = db-&gt;cr6_data | CR6_SFT;</div><div class='del'>-						update_cr6(db-&gt;cr6_data, db-&gt;ioaddr);</div><div class='add'>+						update_cr6(db-&gt;cr6_data, ioaddr);</div><div class='ctx'> 					}</div><div class='ctx'> 				}</div><div class='ctx'> 				if (tdes0 &amp; 0x0100)</div><div class='hunk'>@@ -924,7 +931,7 @@ static void dmfe_free_tx_pkt(struct DEVICE *dev, struct dmfe_board_info * db)</div><div class='ctx'> 		txptr-&gt;tdes0 = cpu_to_le32(0x80000000);	/* Set owner bit */</div><div class='ctx'> 		db-&gt;tx_packet_cnt++;			/* Ready to send */</div><div class='ctx'> 		db-&gt;tx_queue_cnt--;</div><div class='del'>-		outl(0x1, ioaddr + DCR1);		/* Issue Tx polling */</div><div class='add'>+		dw32(DCR1, 0x1);			/* Issue Tx polling */</div><div class='ctx'> 		dev-&gt;trans_start = jiffies;		/* saved time stamp */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1087,12 +1094,7 @@ static void dmfe_ethtool_get_drvinfo(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='ctx'> 	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='del'>-	if (np-&gt;pdev)</div><div class='del'>-		strlcpy(info-&gt;bus_info, pci_name(np-&gt;pdev),</div><div class='del'>-			sizeof(info-&gt;bus_info));</div><div class='del'>-	else</div><div class='del'>-		sprintf(info-&gt;bus_info, "EISA 0x%lx %d",</div><div class='del'>-			dev-&gt;base_addr, dev-&gt;irq);</div><div class='add'>+	strlcpy(info-&gt;bus_info, pci_name(np-&gt;pdev), sizeof(info-&gt;bus_info));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dmfe_ethtool_set_wol(struct net_device *dev,</div><div class='hunk'>@@ -1132,10 +1134,11 @@ static const struct ethtool_ops netdev_ethtool_ops = {</div><div class='ctx'> </div><div class='ctx'> static void dmfe_timer(unsigned long data)</div><div class='ctx'> {</div><div class='add'>+	struct net_device *dev = (struct net_device *)data;</div><div class='add'>+	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	u32 tmp_cr8;</div><div class='ctx'> 	unsigned char tmp_cr12;</div><div class='del'>-	struct DEVICE *dev = (struct DEVICE *) data;</div><div class='del'>-	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='ctx'>  	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	int link_ok, link_ok_phy;</div><div class='hunk'>@@ -1148,11 +1151,10 @@ static void dmfe_timer(unsigned long data)</div><div class='ctx'> 		db-&gt;first_in_callback = 1;</div><div class='ctx'> 		if (db-&gt;chip_type &amp;&amp; (db-&gt;chip_id==PCI_DM9102_ID)) {</div><div class='ctx'> 			db-&gt;cr6_data &amp;= ~0x40000;</div><div class='del'>-			update_cr6(db-&gt;cr6_data, db-&gt;ioaddr);</div><div class='del'>-			phy_write(db-&gt;ioaddr,</div><div class='del'>-				  db-&gt;phy_addr, 0, 0x1000, db-&gt;chip_id);</div><div class='add'>+			update_cr6(db-&gt;cr6_data, ioaddr);</div><div class='add'>+			phy_write(ioaddr, db-&gt;phy_addr, 0, 0x1000, db-&gt;chip_id);</div><div class='ctx'> 			db-&gt;cr6_data |= 0x40000;</div><div class='del'>-			update_cr6(db-&gt;cr6_data, db-&gt;ioaddr);</div><div class='add'>+			update_cr6(db-&gt;cr6_data, ioaddr);</div><div class='ctx'> 			db-&gt;timer.expires = DMFE_TIMER_WUT + HZ * 2;</div><div class='ctx'> 			add_timer(&amp;db-&gt;timer);</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;db-&gt;lock, flags);</div><div class='hunk'>@@ -1167,7 +1169,7 @@ static void dmfe_timer(unsigned long data)</div><div class='ctx'> 		db-&gt;dm910x_chk_mode = 0x4;</div><div class='ctx'> </div><div class='ctx'> 	/* Dynamic reset DM910X : system error or transmit time-out */</div><div class='del'>-	tmp_cr8 = inl(db-&gt;ioaddr + DCR8);</div><div class='add'>+	tmp_cr8 = dr32(DCR8);</div><div class='ctx'> 	if ( (db-&gt;interval_rx_cnt==0) &amp;&amp; (tmp_cr8) ) {</div><div class='ctx'> 		db-&gt;reset_cr8++;</div><div class='ctx'> 		db-&gt;wait_reset = 1;</div><div class='hunk'>@@ -1177,7 +1179,7 @@ static void dmfe_timer(unsigned long data)</div><div class='ctx'> 	/* TX polling kick monitor */</div><div class='ctx'> 	if ( db-&gt;tx_packet_cnt &amp;&amp;</div><div class='ctx'> 	     time_after(jiffies, dev_trans_start(dev) + DMFE_TX_KICK) ) {</div><div class='del'>-		outl(0x1, dev-&gt;base_addr + DCR1);   /* Tx polling again */</div><div class='add'>+		dw32(DCR1, 0x1);   /* Tx polling again */</div><div class='ctx'> </div><div class='ctx'> 		/* TX Timeout */</div><div class='ctx'> 		if (time_after(jiffies, dev_trans_start(dev) + DMFE_TX_TIMEOUT) ) {</div><div class='hunk'>@@ -1200,9 +1202,9 @@ static void dmfe_timer(unsigned long data)</div><div class='ctx'> </div><div class='ctx'> 	/* Link status check, Dynamic media type change */</div><div class='ctx'> 	if (db-&gt;chip_id == PCI_DM9132_ID)</div><div class='del'>-		tmp_cr12 = inb(db-&gt;ioaddr + DCR9 + 3);	/* DM9132 */</div><div class='add'>+		tmp_cr12 = dr8(DCR9 + 3);	/* DM9132 */</div><div class='ctx'> 	else</div><div class='del'>-		tmp_cr12 = inb(db-&gt;ioaddr + DCR12);	/* DM9102/DM9102A */</div><div class='add'>+		tmp_cr12 = dr8(DCR12);		/* DM9102/DM9102A */</div><div class='ctx'> </div><div class='ctx'> 	if ( ((db-&gt;chip_id == PCI_DM9102_ID) &amp;&amp;</div><div class='ctx'> 		(db-&gt;chip_revision == 0x30)) ||</div><div class='hunk'>@@ -1251,7 +1253,7 @@ static void dmfe_timer(unsigned long data)</div><div class='ctx'> 			/* 10/100M link failed, used 1M Home-Net */</div><div class='ctx'> 			db-&gt;cr6_data|=0x00040000;	/* bit18=1, MII */</div><div class='ctx'> 			db-&gt;cr6_data&amp;=~0x00000200;	/* bit9=0, HD mode */</div><div class='del'>-			update_cr6(db-&gt;cr6_data, db-&gt;ioaddr);</div><div class='add'>+			update_cr6(db-&gt;cr6_data, ioaddr);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (!netif_carrier_ok(dev)) {</div><div class='ctx'> </div><div class='hunk'>@@ -1288,17 +1290,18 @@ static void dmfe_timer(unsigned long data)</div><div class='ctx'>  *	Re-initialize DM910X board</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void dmfe_dynamic_reset(struct DEVICE *dev)</div><div class='add'>+static void dmfe_dynamic_reset(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	DMFE_DBUG(0, "dmfe_dynamic_reset()", 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Sopt MAC controller */</div><div class='ctx'> 	db-&gt;cr6_data &amp;= ~(CR6_RXSC | CR6_TXSC);	/* Disable Tx/Rx */</div><div class='del'>-	update_cr6(db-&gt;cr6_data, dev-&gt;base_addr);</div><div class='del'>-	outl(0, dev-&gt;base_addr + DCR7);		/* Disable Interrupt */</div><div class='del'>-	outl(inl(dev-&gt;base_addr + DCR5), dev-&gt;base_addr + DCR5);</div><div class='add'>+	update_cr6(db-&gt;cr6_data, ioaddr);</div><div class='add'>+	dw32(DCR7, 0);				/* Disable Interrupt */</div><div class='add'>+	dw32(DCR5, dr32(DCR5));</div><div class='ctx'> </div><div class='ctx'> 	/* Disable upper layer interface */</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='hunk'>@@ -1364,9 +1367,10 @@ static void dmfe_reuse_skb(struct dmfe_board_info *db, struct sk_buff * skb)</div><div class='ctx'>  *	Using Chain structure, and allocate Tx/Rx buffer</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void dmfe_descriptor_init(struct net_device *dev, unsigned long ioaddr)</div><div class='add'>+static void dmfe_descriptor_init(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	struct tx_desc *tmp_tx;</div><div class='ctx'> 	struct rx_desc *tmp_rx;</div><div class='ctx'> 	unsigned char *tmp_buf;</div><div class='hunk'>@@ -1379,7 +1383,7 @@ static void dmfe_descriptor_init(struct net_device *dev, unsigned long ioaddr)</div><div class='ctx'> 	/* tx descriptor start pointer */</div><div class='ctx'> 	db-&gt;tx_insert_ptr = db-&gt;first_tx_desc;</div><div class='ctx'> 	db-&gt;tx_remove_ptr = db-&gt;first_tx_desc;</div><div class='del'>-	outl(db-&gt;first_tx_desc_dma, ioaddr + DCR4);     /* TX DESC address */</div><div class='add'>+	dw32(DCR4, db-&gt;first_tx_desc_dma);     /* TX DESC address */</div><div class='ctx'> </div><div class='ctx'> 	/* rx descriptor start pointer */</div><div class='ctx'> 	db-&gt;first_rx_desc = (void *)db-&gt;first_tx_desc +</div><div class='hunk'>@@ -1389,7 +1393,7 @@ static void dmfe_descriptor_init(struct net_device *dev, unsigned long ioaddr)</div><div class='ctx'> 			sizeof(struct tx_desc) * TX_DESC_CNT;</div><div class='ctx'> 	db-&gt;rx_insert_ptr = db-&gt;first_rx_desc;</div><div class='ctx'> 	db-&gt;rx_ready_ptr = db-&gt;first_rx_desc;</div><div class='del'>-	outl(db-&gt;first_rx_desc_dma, ioaddr + DCR3);	/* RX DESC address */</div><div class='add'>+	dw32(DCR3, db-&gt;first_rx_desc_dma);		/* RX DESC address */</div><div class='ctx'> </div><div class='ctx'> 	/* Init Transmit chain */</div><div class='ctx'> 	tmp_buf = db-&gt;buf_pool_start;</div><div class='hunk'>@@ -1431,14 +1435,14 @@ static void dmfe_descriptor_init(struct net_device *dev, unsigned long ioaddr)</div><div class='ctx'>  *	Firstly stop DM910X , then written value and start</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void update_cr6(u32 cr6_data, unsigned long ioaddr)</div><div class='add'>+static void update_cr6(u32 cr6_data, void __iomem *ioaddr)</div><div class='ctx'> {</div><div class='ctx'> 	u32 cr6_tmp;</div><div class='ctx'> </div><div class='ctx'> 	cr6_tmp = cr6_data &amp; ~0x2002;           /* stop Tx/Rx */</div><div class='del'>-	outl(cr6_tmp, ioaddr + DCR6);</div><div class='add'>+	dw32(DCR6, cr6_tmp);</div><div class='ctx'> 	udelay(5);</div><div class='del'>-	outl(cr6_data, ioaddr + DCR6);</div><div class='add'>+	dw32(DCR6, cr6_data);</div><div class='ctx'> 	udelay(5);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1448,24 +1452,19 @@ static void update_cr6(u32 cr6_data, unsigned long ioaddr)</div><div class='ctx'>  *	This setup frame initialize DM910X address filter mode</div><div class='ctx'> */</div><div class='ctx'> </div><div class='del'>-static void dm9132_id_table(struct DEVICE *dev)</div><div class='add'>+static void dm9132_id_table(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr + 0xc0;</div><div class='add'>+	u16 *addrptr = (u16 *)dev-&gt;dev_addr;</div><div class='ctx'> 	struct netdev_hw_addr *ha;</div><div class='del'>-	u16 * addrptr;</div><div class='del'>-	unsigned long ioaddr = dev-&gt;base_addr+0xc0;		/* ID Table */</div><div class='del'>-	u32 hash_val;</div><div class='ctx'> 	u16 i, hash_table[4];</div><div class='ctx'> </div><div class='del'>-	DMFE_DBUG(0, "dm9132_id_table()", 0);</div><div class='del'>-</div><div class='ctx'> 	/* Node address */</div><div class='del'>-	addrptr = (u16 *) dev-&gt;dev_addr;</div><div class='del'>-	outw(addrptr[0], ioaddr);</div><div class='del'>-	ioaddr += 4;</div><div class='del'>-	outw(addrptr[1], ioaddr);</div><div class='del'>-	ioaddr += 4;</div><div class='del'>-	outw(addrptr[2], ioaddr);</div><div class='del'>-	ioaddr += 4;</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		dw16(0, addrptr[i]);</div><div class='add'>+		ioaddr += 4;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Clear Hash Table */</div><div class='ctx'> 	memset(hash_table, 0, sizeof(hash_table));</div><div class='hunk'>@@ -1475,13 +1474,14 @@ static void dm9132_id_table(struct DEVICE *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* the multicast address in Hash Table : 64 bits */</div><div class='ctx'> 	netdev_for_each_mc_addr(ha, dev) {</div><div class='del'>-		hash_val = cal_CRC((char *) ha-&gt;addr, 6, 0) &amp; 0x3f;</div><div class='add'>+		u32 hash_val = cal_CRC((char *)ha-&gt;addr, 6, 0) &amp; 0x3f;</div><div class='add'>+</div><div class='ctx'> 		hash_table[hash_val / 16] |= (u16) 1 &lt;&lt; (hash_val % 16);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Write the hash table to MAC MD table */</div><div class='ctx'> 	for (i = 0; i &lt; 4; i++, ioaddr += 4)</div><div class='del'>-		outw(hash_table[i], ioaddr);</div><div class='add'>+		dw16(0, hash_table[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1490,7 +1490,7 @@ static void dm9132_id_table(struct DEVICE *dev)</div><div class='ctx'>  *	This setup frame initialize DM910X address filter mode</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void send_filter_frame(struct DEVICE *dev)</div><div class='add'>+static void send_filter_frame(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='ctx'> 	struct netdev_hw_addr *ha;</div><div class='hunk'>@@ -1535,12 +1535,14 @@ static void send_filter_frame(struct DEVICE *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Resource Check and Send the setup packet */</div><div class='ctx'> 	if (!db-&gt;tx_packet_cnt) {</div><div class='add'>+		void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='add'>+</div><div class='ctx'> 		/* Resource Empty */</div><div class='ctx'> 		db-&gt;tx_packet_cnt++;</div><div class='ctx'> 		txptr-&gt;tdes0 = cpu_to_le32(0x80000000);</div><div class='del'>-		update_cr6(db-&gt;cr6_data | 0x2000, dev-&gt;base_addr);</div><div class='del'>-		outl(0x1, dev-&gt;base_addr + DCR1);	/* Issue Tx polling */</div><div class='del'>-		update_cr6(db-&gt;cr6_data, dev-&gt;base_addr);</div><div class='add'>+		update_cr6(db-&gt;cr6_data | 0x2000, ioaddr);</div><div class='add'>+		dw32(DCR1, 0x1);	/* Issue Tx polling */</div><div class='add'>+		update_cr6(db-&gt;cr6_data, ioaddr);</div><div class='ctx'> 		dev-&gt;trans_start = jiffies;</div><div class='ctx'> 	} else</div><div class='ctx'> 		db-&gt;tx_queue_cnt++;	/* Put in TX queue */</div><div class='hunk'>@@ -1575,43 +1577,59 @@ static void allocate_rx_buffer(struct net_device *dev)</div><div class='ctx'> 	db-&gt;rx_insert_ptr = rxptr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void srom_clk_write(void __iomem *ioaddr, u32 data)</div><div class='add'>+{</div><div class='add'>+	static const u32 cmd[] = {</div><div class='add'>+		CR9_SROM_READ | CR9_SRCS,</div><div class='add'>+		CR9_SROM_READ | CR9_SRCS | CR9_SRCLK,</div><div class='add'>+		CR9_SROM_READ | CR9_SRCS</div><div class='add'>+	};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(cmd); i++) {</div><div class='add'>+		dw32(DCR9, data | cmd[i]);</div><div class='add'>+		udelay(5);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  *	Read one word data from the serial ROM</div><div class='ctx'>  */</div><div class='del'>-</div><div class='del'>-static u16 read_srom_word(long ioaddr, int offset)</div><div class='add'>+static u16 read_srom_word(void __iomem *ioaddr, int offset)</div><div class='ctx'> {</div><div class='add'>+	u16 srom_data;</div><div class='ctx'> 	int i;</div><div class='del'>-	u16 srom_data = 0;</div><div class='del'>-	long cr9_ioaddr = ioaddr + DCR9;</div><div class='ctx'> </div><div class='del'>-	outl(CR9_SROM_READ, cr9_ioaddr);</div><div class='del'>-	outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr);</div><div class='add'>+	dw32(DCR9, CR9_SROM_READ);</div><div class='add'>+	udelay(5);</div><div class='add'>+	dw32(DCR9, CR9_SROM_READ | CR9_SRCS);</div><div class='add'>+	udelay(5);</div><div class='ctx'> </div><div class='ctx'> 	/* Send the Read Command 110b */</div><div class='del'>-	SROM_CLK_WRITE(SROM_DATA_1, cr9_ioaddr);</div><div class='del'>-	SROM_CLK_WRITE(SROM_DATA_1, cr9_ioaddr);</div><div class='del'>-	SROM_CLK_WRITE(SROM_DATA_0, cr9_ioaddr);</div><div class='add'>+	srom_clk_write(ioaddr, SROM_DATA_1);</div><div class='add'>+	srom_clk_write(ioaddr, SROM_DATA_1);</div><div class='add'>+	srom_clk_write(ioaddr, SROM_DATA_0);</div><div class='ctx'> </div><div class='ctx'> 	/* Send the offset */</div><div class='ctx'> 	for (i = 5; i &gt;= 0; i--) {</div><div class='ctx'> 		srom_data = (offset &amp; (1 &lt;&lt; i)) ? SROM_DATA_1 : SROM_DATA_0;</div><div class='del'>-		SROM_CLK_WRITE(srom_data, cr9_ioaddr);</div><div class='add'>+		srom_clk_write(ioaddr, srom_data);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr);</div><div class='add'>+	dw32(DCR9, CR9_SROM_READ | CR9_SRCS);</div><div class='add'>+	udelay(5);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 16; i &gt; 0; i--) {</div><div class='del'>-		outl(CR9_SROM_READ | CR9_SRCS | CR9_SRCLK, cr9_ioaddr);</div><div class='add'>+		dw32(DCR9, CR9_SROM_READ | CR9_SRCS | CR9_SRCLK);</div><div class='ctx'> 		udelay(5);</div><div class='ctx'> 		srom_data = (srom_data &lt;&lt; 1) |</div><div class='del'>-				((inl(cr9_ioaddr) &amp; CR9_CRDOUT) ? 1 : 0);</div><div class='del'>-		outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr);</div><div class='add'>+				((dr32(DCR9) &amp; CR9_CRDOUT) ? 1 : 0);</div><div class='add'>+		dw32(DCR9, CR9_SROM_READ | CR9_SRCS);</div><div class='ctx'> 		udelay(5);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	outl(CR9_SROM_READ, cr9_ioaddr);</div><div class='add'>+	dw32(DCR9, CR9_SROM_READ);</div><div class='add'>+	udelay(5);</div><div class='ctx'> 	return srom_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1620,13 +1638,14 @@ static u16 read_srom_word(long ioaddr, int offset)</div><div class='ctx'>  *	Auto sense the media mode</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static u8 dmfe_sense_speed(struct dmfe_board_info * db)</div><div class='add'>+static u8 dmfe_sense_speed(struct dmfe_board_info *db)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	u8 ErrFlag = 0;</div><div class='ctx'> 	u16 phy_mode;</div><div class='ctx'> </div><div class='ctx'> 	/* CR6 bit18=0, select 10/100M */</div><div class='del'>-	update_cr6( (db-&gt;cr6_data &amp; ~0x40000), db-&gt;ioaddr);</div><div class='add'>+	update_cr6(db-&gt;cr6_data &amp; ~0x40000, ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	phy_mode = phy_read(db-&gt;ioaddr, db-&gt;phy_addr, 1, db-&gt;chip_id);</div><div class='ctx'> 	phy_mode = phy_read(db-&gt;ioaddr, db-&gt;phy_addr, 1, db-&gt;chip_id);</div><div class='hunk'>@@ -1665,11 +1684,12 @@ static u8 dmfe_sense_speed(struct dmfe_board_info * db)</div><div class='ctx'> </div><div class='ctx'> static void dmfe_set_phyxcer(struct dmfe_board_info *db)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	u16 phy_reg;</div><div class='ctx'> </div><div class='ctx'> 	/* Select 10/100M phyxcer */</div><div class='ctx'> 	db-&gt;cr6_data &amp;= ~0x40000;</div><div class='del'>-	update_cr6(db-&gt;cr6_data, db-&gt;ioaddr);</div><div class='add'>+	update_cr6(db-&gt;cr6_data, ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	/* DM9009 Chip: Phyxcer reg18 bit12=0 */</div><div class='ctx'> 	if (db-&gt;chip_id == PCI_DM9009_ID) {</div><div class='hunk'>@@ -1765,18 +1785,15 @@ static void dmfe_process_mode(struct dmfe_board_info *db)</div><div class='ctx'>  *	Write a word to Phy register</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset,</div><div class='add'>+static void phy_write(void __iomem *ioaddr, u8 phy_addr, u8 offset,</div><div class='ctx'> 		      u16 phy_data, u32 chip_id)</div><div class='ctx'> {</div><div class='ctx'> 	u16 i;</div><div class='del'>-	unsigned long ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	if (chip_id == PCI_DM9132_ID) {</div><div class='del'>-		ioaddr = iobase + 0x80 + offset * 4;</div><div class='del'>-		outw(phy_data, ioaddr);</div><div class='add'>+		dw16(0x80 + offset * 4, phy_data);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* DM9102/DM9102A Chip */</div><div class='del'>-		ioaddr = iobase + DCR9;</div><div class='ctx'> </div><div class='ctx'> 		/* Send 33 synchronization clock to Phy controller */</div><div class='ctx'> 		for (i = 0; i &lt; 35; i++)</div><div class='hunk'>@@ -1816,19 +1833,16 @@ static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset,</div><div class='ctx'>  *	Read a word data from phy register</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, u32 chip_id)</div><div class='add'>+static u16 phy_read(void __iomem *ioaddr, u8 phy_addr, u8 offset, u32 chip_id)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u16 phy_data;</div><div class='del'>-	unsigned long ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	if (chip_id == PCI_DM9132_ID) {</div><div class='ctx'> 		/* DM9132 Chip */</div><div class='del'>-		ioaddr = iobase + 0x80 + offset * 4;</div><div class='del'>-		phy_data = inw(ioaddr);</div><div class='add'>+		phy_data = dr16(0x80 + offset * 4);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* DM9102/DM9102A Chip */</div><div class='del'>-		ioaddr = iobase + DCR9;</div><div class='ctx'> </div><div class='ctx'> 		/* Send 33 synchronization clock to Phy controller */</div><div class='ctx'> 		for (i = 0; i &lt; 35; i++)</div><div class='hunk'>@@ -1870,13 +1884,13 @@ static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, u32 chip_id)</div><div class='ctx'>  *	Write one bit data to Phy Controller</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void phy_write_1bit(unsigned long ioaddr, u32 phy_data)</div><div class='add'>+static void phy_write_1bit(void __iomem *ioaddr, u32 phy_data)</div><div class='ctx'> {</div><div class='del'>-	outl(phy_data, ioaddr);			/* MII Clock Low */</div><div class='add'>+	dw32(DCR9, phy_data);		/* MII Clock Low */</div><div class='ctx'> 	udelay(1);</div><div class='del'>-	outl(phy_data | MDCLKH, ioaddr);	/* MII Clock High */</div><div class='add'>+	dw32(DCR9, phy_data | MDCLKH);	/* MII Clock High */</div><div class='ctx'> 	udelay(1);</div><div class='del'>-	outl(phy_data, ioaddr);			/* MII Clock Low */</div><div class='add'>+	dw32(DCR9, phy_data);		/* MII Clock Low */</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1885,14 +1899,14 @@ static void phy_write_1bit(unsigned long ioaddr, u32 phy_data)</div><div class='ctx'>  *	Read one bit phy data from PHY controller</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static u16 phy_read_1bit(unsigned long ioaddr)</div><div class='add'>+static u16 phy_read_1bit(void __iomem *ioaddr)</div><div class='ctx'> {</div><div class='ctx'> 	u16 phy_data;</div><div class='ctx'> </div><div class='del'>-	outl(0x50000, ioaddr);</div><div class='add'>+	dw32(DCR9, 0x50000);</div><div class='ctx'> 	udelay(1);</div><div class='del'>-	phy_data = ( inl(ioaddr) &gt;&gt; 19 ) &amp; 0x1;</div><div class='del'>-	outl(0x40000, ioaddr);</div><div class='add'>+	phy_data = (dr32(DCR9) &gt;&gt; 19) &amp; 0x1;</div><div class='add'>+	dw32(DCR9, 0x40000);</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> </div><div class='ctx'> 	return phy_data;</div><div class='hunk'>@@ -1978,7 +1992,7 @@ static void dmfe_parse_srom(struct dmfe_board_info * db)</div><div class='ctx'> </div><div class='ctx'> 	/* Check DM9801 or DM9802 present or not */</div><div class='ctx'> 	db-&gt;HPNA_present = 0;</div><div class='del'>-	update_cr6(db-&gt;cr6_data|0x40000, db-&gt;ioaddr);</div><div class='add'>+	update_cr6(db-&gt;cr6_data | 0x40000, db-&gt;ioaddr);</div><div class='ctx'> 	tmp_reg = phy_read(db-&gt;ioaddr, db-&gt;phy_addr, 3, db-&gt;chip_id);</div><div class='ctx'> 	if ( ( tmp_reg &amp; 0xfff0 ) == 0xb900 ) {</div><div class='ctx'> 		/* DM9801 or DM9802 present */</div><div class='hunk'>@@ -2095,6 +2109,7 @@ static int dmfe_suspend(struct pci_dev *pci_dev, pm_message_t state)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(pci_dev);</div><div class='ctx'> 	struct dmfe_board_info *db = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable upper layer interface */</div><div class='hunk'>@@ -2102,11 +2117,11 @@ static int dmfe_suspend(struct pci_dev *pci_dev, pm_message_t state)</div><div class='ctx'> </div><div class='ctx'> 	/* Disable Tx/Rx */</div><div class='ctx'> 	db-&gt;cr6_data &amp;= ~(CR6_RXSC | CR6_TXSC);</div><div class='del'>-	update_cr6(db-&gt;cr6_data, dev-&gt;base_addr);</div><div class='add'>+	update_cr6(db-&gt;cr6_data, ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable Interrupt */</div><div class='del'>-	outl(0, dev-&gt;base_addr + DCR7);</div><div class='del'>-	outl(inl (dev-&gt;base_addr + DCR5), dev-&gt;base_addr + DCR5);</div><div class='add'>+	dw32(DCR7, 0);</div><div class='add'>+	dw32(DCR5, dr32(DCR5));</div><div class='ctx'> </div><div class='ctx'> 	/* Fre RX buffers */</div><div class='ctx'> 	dmfe_free_rxbuffer(db);</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/tulip_core.c b/drivers/net/ethernet/dec/tulip/tulip_core.c<br/>index fea3641d9398..c4f37aca2269 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/tulip_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/dec/tulip/tulip_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/tulip_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/tulip_core.c</a></div><div class='hunk'>@@ -328,7 +328,7 @@ static void tulip_up(struct net_device *dev)</div><div class='ctx'> 	udelay(100);</div><div class='ctx'> </div><div class='ctx'> 	if (tulip_debug &gt; 1)</div><div class='del'>-		netdev_dbg(dev, "tulip_up(), irq==%d\n", dev-&gt;irq);</div><div class='add'>+		netdev_dbg(dev, "tulip_up(), irq==%d\n", tp-&gt;pdev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	iowrite32(tp-&gt;rx_ring_dma, ioaddr + CSR3);</div><div class='ctx'> 	iowrite32(tp-&gt;tx_ring_dma, ioaddr + CSR4);</div><div class='hunk'>@@ -515,11 +515,13 @@ media_picked:</div><div class='ctx'> static int</div><div class='ctx'> tulip_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct tulip_private *tp = netdev_priv(dev);</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='ctx'> 	tulip_init_ring (dev);</div><div class='ctx'> </div><div class='del'>-	retval = request_irq(dev-&gt;irq, tulip_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	retval = request_irq(tp-&gt;pdev-&gt;irq, tulip_interrupt, IRQF_SHARED,</div><div class='add'>+			     dev-&gt;name, dev);</div><div class='ctx'> 	if (retval)</div><div class='ctx'> 		goto free_ring;</div><div class='ctx'> </div><div class='hunk'>@@ -841,7 +843,7 @@ static int tulip_close (struct net_device *dev)</div><div class='ctx'> 		netdev_dbg(dev, "Shutting down ethercard, status was %02x\n",</div><div class='ctx'> 			   ioread32 (ioaddr + CSR5));</div><div class='ctx'> </div><div class='del'>-	free_irq (dev-&gt;irq, dev);</div><div class='add'>+	free_irq (tp-&gt;pdev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	tulip_free_ring (dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1489,8 +1491,6 @@ static int __devinit tulip_init_one (struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	INIT_WORK(&amp;tp-&gt;media_work, tulip_tbl[tp-&gt;chip_id].media_task);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = (unsigned long)ioaddr;</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_TULIP_MWI</div><div class='ctx'> 	if (!force_csr0 &amp;&amp; (tp-&gt;flags &amp; HAS_PCI_MWI))</div><div class='ctx'> 		tulip_mwi_config (pdev, dev);</div><div class='hunk'>@@ -1650,7 +1650,6 @@ static int __devinit tulip_init_one (struct pci_dev *pdev,</div><div class='ctx'> 	for (i = 0; i &lt; 6; i++)</div><div class='ctx'> 		last_phys_addr[i] = dev-&gt;dev_addr[i];</div><div class='ctx'> 	last_irq = irq;</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='ctx'> </div><div class='ctx'> 	/* The lower four bits are the media type. */</div><div class='ctx'> 	if (board_idx &gt;= 0  &amp;&amp;  board_idx &lt; MAX_UNITS) {</div><div class='hunk'>@@ -1858,7 +1857,8 @@ static int tulip_suspend (struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> 	tulip_down(dev);</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(dev);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	/* FIXME: it needlessly adds an error path. */</div><div class='add'>+	free_irq(tp-&gt;pdev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> save_state:</div><div class='ctx'> 	pci_save_state(pdev);</div><div class='hunk'>@@ -1900,7 +1900,9 @@ static int tulip_resume(struct pci_dev *pdev)</div><div class='ctx'> 		return retval;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((retval = request_irq(dev-&gt;irq, tulip_interrupt, IRQF_SHARED, dev-&gt;name, dev))) {</div><div class='add'>+	retval = request_irq(pdev-&gt;irq, tulip_interrupt, IRQF_SHARED,</div><div class='add'>+			     dev-&gt;name, dev);</div><div class='add'>+	if (retval) {</div><div class='ctx'> 		pr_err("request_irq failed in resume\n");</div><div class='ctx'> 		return retval;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1960,11 +1962,14 @@ static void __devexit tulip_remove_one (struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> static void poll_tulip (struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct tulip_private *tp = netdev_priv(dev);</div><div class='add'>+	const int irq = tp-&gt;pdev-&gt;irq;</div><div class='add'>+</div><div class='ctx'> 	/* disable_irq here is not very nice, but with the lockless</div><div class='ctx'> 	   interrupt handler we have no other choice. */</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='del'>-	tulip_interrupt (dev-&gt;irq, dev);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	disable_irq(irq);</div><div class='add'>+	tulip_interrupt (irq, dev);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/uli526x.c b/drivers/net/ethernet/dec/tulip/uli526x.c<br/>index fc4001f6a5e4..75d45f8a37dc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/uli526x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/dec/tulip/uli526x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/uli526x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/uli526x.c</a></div><div class='hunk'>@@ -42,6 +42,8 @@</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='ctx'> #include &lt;asm/uaccess.h&gt;</div><div class='ctx'> </div><div class='add'>+#define uw32(reg, val)	iowrite32(val, ioaddr + (reg))</div><div class='add'>+#define ur32(reg)	ioread32(ioaddr + (reg))</div><div class='ctx'> </div><div class='ctx'> /* Board/System/Debug information/definition ---------------- */</div><div class='ctx'> #define PCI_ULI5261_ID  0x526110B9	/* ULi M5261 ID*/</div><div class='hunk'>@@ -110,14 +112,6 @@ do {								\</div><div class='ctx'> </div><div class='ctx'> #define SROM_V41_CODE   0x14</div><div class='ctx'> </div><div class='del'>-#define SROM_CLK_WRITE(data, ioaddr)					\</div><div class='del'>-		outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr);		\</div><div class='del'>-		udelay(5);						\</div><div class='del'>-		outl(data|CR9_SROM_READ|CR9_SRCS|CR9_SRCLK,ioaddr);	\</div><div class='del'>-		udelay(5);						\</div><div class='del'>-		outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr);		\</div><div class='del'>-		udelay(5);</div><div class='del'>-</div><div class='ctx'> /* Structure/enum declaration ------------------------------- */</div><div class='ctx'> struct tx_desc {</div><div class='ctx'>         __le32 tdes0, tdes1, tdes2, tdes3; /* Data for the card */</div><div class='hunk'>@@ -132,12 +126,15 @@ struct rx_desc {</div><div class='ctx'> } __attribute__(( aligned(32) ));</div><div class='ctx'> </div><div class='ctx'> struct uli526x_board_info {</div><div class='del'>-	u32 chip_id;			/* Chip vendor/Device ID */</div><div class='add'>+	struct uli_phy_ops {</div><div class='add'>+		void (*write)(struct uli526x_board_info *, u8, u8, u16);</div><div class='add'>+		u16 (*read)(struct uli526x_board_info *, u8, u8);</div><div class='add'>+	} phy;</div><div class='ctx'> 	struct net_device *next_dev;	/* next device */</div><div class='ctx'> 	struct pci_dev *pdev;		/* PCI device */</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> </div><div class='del'>-	long ioaddr;			/* I/O base address */</div><div class='add'>+	void __iomem *ioaddr;		/* I/O base address */</div><div class='ctx'> 	u32 cr0_data;</div><div class='ctx'> 	u32 cr5_data;</div><div class='ctx'> 	u32 cr6_data;</div><div class='hunk'>@@ -227,21 +224,21 @@ static netdev_tx_t uli526x_start_xmit(struct sk_buff *,</div><div class='ctx'> static int uli526x_stop(struct net_device *);</div><div class='ctx'> static void uli526x_set_filter_mode(struct net_device *);</div><div class='ctx'> static const struct ethtool_ops netdev_ethtool_ops;</div><div class='del'>-static u16 read_srom_word(long, int);</div><div class='add'>+static u16 read_srom_word(struct uli526x_board_info *, int);</div><div class='ctx'> static irqreturn_t uli526x_interrupt(int, void *);</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> static void uli526x_poll(struct net_device *dev);</div><div class='ctx'> #endif</div><div class='del'>-static void uli526x_descriptor_init(struct net_device *, unsigned long);</div><div class='add'>+static void uli526x_descriptor_init(struct net_device *, void __iomem *);</div><div class='ctx'> static void allocate_rx_buffer(struct net_device *);</div><div class='del'>-static void update_cr6(u32, unsigned long);</div><div class='add'>+static void update_cr6(u32, void __iomem *);</div><div class='ctx'> static void send_filter_frame(struct net_device *, int);</div><div class='del'>-static u16 phy_read(unsigned long, u8, u8, u32);</div><div class='del'>-static u16 phy_readby_cr10(unsigned long, u8, u8);</div><div class='del'>-static void phy_write(unsigned long, u8, u8, u16, u32);</div><div class='del'>-static void phy_writeby_cr10(unsigned long, u8, u8, u16);</div><div class='del'>-static void phy_write_1bit(unsigned long, u32, u32);</div><div class='del'>-static u16 phy_read_1bit(unsigned long, u32);</div><div class='add'>+static u16 phy_readby_cr9(struct uli526x_board_info *, u8, u8);</div><div class='add'>+static u16 phy_readby_cr10(struct uli526x_board_info *, u8, u8);</div><div class='add'>+static void phy_writeby_cr9(struct uli526x_board_info *, u8, u8, u16);</div><div class='add'>+static void phy_writeby_cr10(struct uli526x_board_info *, u8, u8, u16);</div><div class='add'>+static void phy_write_1bit(struct uli526x_board_info *db, u32);</div><div class='add'>+static u16 phy_read_1bit(struct uli526x_board_info *db);</div><div class='ctx'> static u8 uli526x_sense_speed(struct uli526x_board_info *);</div><div class='ctx'> static void uli526x_process_mode(struct uli526x_board_info *);</div><div class='ctx'> static void uli526x_timer(unsigned long);</div><div class='hunk'>@@ -253,6 +250,18 @@ static void uli526x_free_rxbuffer(struct uli526x_board_info *);</div><div class='ctx'> static void uli526x_init(struct net_device *);</div><div class='ctx'> static void uli526x_set_phyxcer(struct uli526x_board_info *);</div><div class='ctx'> </div><div class='add'>+static void srom_clk_write(struct uli526x_board_info *db, u32 data)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='add'>+</div><div class='add'>+	uw32(DCR9, data | CR9_SROM_READ | CR9_SRCS);</div><div class='add'>+	udelay(5);</div><div class='add'>+	uw32(DCR9, data | CR9_SROM_READ | CR9_SRCS | CR9_SRCLK);</div><div class='add'>+	udelay(5);</div><div class='add'>+	uw32(DCR9, data | CR9_SROM_READ | CR9_SRCS);</div><div class='add'>+	udelay(5);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* ULI526X network board routine ---------------------------- */</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops netdev_ops = {</div><div class='hunk'>@@ -277,6 +286,7 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct uli526x_board_info *db;	/* board information structure */</div><div class='ctx'> 	struct net_device *dev;</div><div class='add'>+	void __iomem *ioaddr;</div><div class='ctx'> 	int i, err;</div><div class='ctx'> </div><div class='ctx'> 	ULI526X_DBUG(0, "uli526x_init_one()", 0);</div><div class='hunk'>@@ -313,9 +323,9 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev,</div><div class='ctx'> 		goto err_out_disable;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pci_request_regions(pdev, DRV_NAME)) {</div><div class='add'>+	err = pci_request_regions(pdev, DRV_NAME);</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		pr_err("Failed to request PCI regions\n");</div><div class='del'>-		err = -ENODEV;</div><div class='ctx'> 		goto err_out_disable;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -323,32 +333,41 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev,</div><div class='ctx'> 	db = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate Tx/Rx descriptor memory */</div><div class='add'>+	err = -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	db-&gt;desc_pool_ptr = pci_alloc_consistent(pdev, sizeof(struct tx_desc) * DESC_ALL_CNT + 0x20, &amp;db-&gt;desc_pool_dma_ptr);</div><div class='del'>-	if(db-&gt;desc_pool_ptr == NULL)</div><div class='del'>-	{</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_out_nomem;</div><div class='del'>-	}</div><div class='add'>+	if (!db-&gt;desc_pool_ptr)</div><div class='add'>+		goto err_out_release;</div><div class='add'>+</div><div class='ctx'> 	db-&gt;buf_pool_ptr = pci_alloc_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, &amp;db-&gt;buf_pool_dma_ptr);</div><div class='del'>-	if(db-&gt;buf_pool_ptr == NULL)</div><div class='del'>-	{</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_out_nomem;</div><div class='del'>-	}</div><div class='add'>+	if (!db-&gt;buf_pool_ptr)</div><div class='add'>+		goto err_out_free_tx_desc;</div><div class='ctx'> </div><div class='ctx'> 	db-&gt;first_tx_desc = (struct tx_desc *) db-&gt;desc_pool_ptr;</div><div class='ctx'> 	db-&gt;first_tx_desc_dma = db-&gt;desc_pool_dma_ptr;</div><div class='ctx'> 	db-&gt;buf_pool_start = db-&gt;buf_pool_ptr;</div><div class='ctx'> 	db-&gt;buf_pool_dma_start = db-&gt;buf_pool_dma_ptr;</div><div class='ctx'> </div><div class='del'>-	db-&gt;chip_id = ent-&gt;driver_data;</div><div class='del'>-	db-&gt;ioaddr = pci_resource_start(pdev, 0);</div><div class='add'>+	switch (ent-&gt;driver_data) {</div><div class='add'>+	case PCI_ULI5263_ID:</div><div class='add'>+		db-&gt;phy.write	= phy_writeby_cr10;</div><div class='add'>+		db-&gt;phy.read	= phy_readby_cr10;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		db-&gt;phy.write	= phy_writeby_cr9;</div><div class='add'>+		db-&gt;phy.read	= phy_readby_cr9;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* IO region. */</div><div class='add'>+	ioaddr = pci_iomap(pdev, 0, 0);</div><div class='add'>+	if (!ioaddr)</div><div class='add'>+		goto err_out_free_tx_buf;</div><div class='ctx'> </div><div class='add'>+	db-&gt;ioaddr = ioaddr;</div><div class='ctx'> 	db-&gt;pdev = pdev;</div><div class='ctx'> 	db-&gt;init = 1;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = db-&gt;ioaddr;</div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> 	pci_set_drvdata(pdev, dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Register some necessary functions */</div><div class='hunk'>@@ -360,24 +379,24 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	/* read 64 word srom data */</div><div class='ctx'> 	for (i = 0; i &lt; 64; i++)</div><div class='del'>-		((__le16 *) db-&gt;srom)[i] = cpu_to_le16(read_srom_word(db-&gt;ioaddr, i));</div><div class='add'>+		((__le16 *) db-&gt;srom)[i] = cpu_to_le16(read_srom_word(db, i));</div><div class='ctx'> </div><div class='ctx'> 	/* Set Node address */</div><div class='ctx'> 	if(((u16 *) db-&gt;srom)[0] == 0xffff || ((u16 *) db-&gt;srom)[0] == 0)		/* SROM absent, so read MAC address from ID Table */</div><div class='ctx'> 	{</div><div class='del'>-		outl(0x10000, db-&gt;ioaddr + DCR0);	//Diagnosis mode</div><div class='del'>-		outl(0x1c0, db-&gt;ioaddr + DCR13);	//Reset dianostic pointer port</div><div class='del'>-		outl(0, db-&gt;ioaddr + DCR14);		//Clear reset port</div><div class='del'>-		outl(0x10, db-&gt;ioaddr + DCR14);		//Reset ID Table pointer</div><div class='del'>-		outl(0, db-&gt;ioaddr + DCR14);		//Clear reset port</div><div class='del'>-		outl(0, db-&gt;ioaddr + DCR13);		//Clear CR13</div><div class='del'>-		outl(0x1b0, db-&gt;ioaddr + DCR13);	//Select ID Table access port</div><div class='add'>+		uw32(DCR0, 0x10000);	//Diagnosis mode</div><div class='add'>+		uw32(DCR13, 0x1c0);	//Reset dianostic pointer port</div><div class='add'>+		uw32(DCR14, 0);		//Clear reset port</div><div class='add'>+		uw32(DCR14, 0x10);	//Reset ID Table pointer</div><div class='add'>+		uw32(DCR14, 0);		//Clear reset port</div><div class='add'>+		uw32(DCR13, 0);		//Clear CR13</div><div class='add'>+		uw32(DCR13, 0x1b0);	//Select ID Table access port</div><div class='ctx'> 		//Read MAC address from CR14</div><div class='ctx'> 		for (i = 0; i &lt; 6; i++)</div><div class='del'>-			dev-&gt;dev_addr[i] = inl(db-&gt;ioaddr + DCR14);</div><div class='add'>+			dev-&gt;dev_addr[i] = ur32(DCR14);</div><div class='ctx'> 		//Read end</div><div class='del'>-		outl(0, db-&gt;ioaddr + DCR13);	//Clear CR13</div><div class='del'>-		outl(0, db-&gt;ioaddr + DCR0);		//Clear CR0</div><div class='add'>+		uw32(DCR13, 0);		//Clear CR13</div><div class='add'>+		uw32(DCR0, 0);		//Clear CR0</div><div class='ctx'> 		udelay(10);</div><div class='ctx'> 	}</div><div class='ctx'> 	else		/*Exist SROM*/</div><div class='hunk'>@@ -387,26 +406,26 @@ static int __devinit uli526x_init_one (struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> 	err = register_netdev (dev);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_out_res;</div><div class='add'>+		goto err_out_unmap;</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(dev, "ULi M%04lx at pci%s, %pM, irq %d\n",</div><div class='ctx'> 		    ent-&gt;driver_data &gt;&gt; 16, pci_name(pdev),</div><div class='del'>-		    dev-&gt;dev_addr, dev-&gt;irq);</div><div class='add'>+		    dev-&gt;dev_addr, pdev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_out_res:</div><div class='add'>+err_out_unmap:</div><div class='add'>+	pci_iounmap(pdev, db-&gt;ioaddr);</div><div class='add'>+err_out_free_tx_buf:</div><div class='add'>+	pci_free_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4,</div><div class='add'>+			    db-&gt;buf_pool_ptr, db-&gt;buf_pool_dma_ptr);</div><div class='add'>+err_out_free_tx_desc:</div><div class='add'>+	pci_free_consistent(pdev, sizeof(struct tx_desc) * DESC_ALL_CNT + 0x20,</div><div class='add'>+			    db-&gt;desc_pool_ptr, db-&gt;desc_pool_dma_ptr);</div><div class='add'>+err_out_release:</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='del'>-err_out_nomem:</div><div class='del'>-	if(db-&gt;desc_pool_ptr)</div><div class='del'>-		pci_free_consistent(pdev, sizeof(struct tx_desc) * DESC_ALL_CNT + 0x20,</div><div class='del'>-			db-&gt;desc_pool_ptr, db-&gt;desc_pool_dma_ptr);</div><div class='del'>-</div><div class='del'>-	if(db-&gt;buf_pool_ptr != NULL)</div><div class='del'>-		pci_free_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4,</div><div class='del'>-			db-&gt;buf_pool_ptr, db-&gt;buf_pool_dma_ptr);</div><div class='ctx'> err_out_disable:</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> err_out_free:</div><div class='hunk'>@@ -422,19 +441,17 @@ static void __devexit uli526x_remove_one (struct pci_dev *pdev)</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct uli526x_board_info *db = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	ULI526X_DBUG(0, "uli526x_remove_one()", 0);</div><div class='del'>-</div><div class='add'>+	unregister_netdev(dev);</div><div class='add'>+	pci_iounmap(pdev, db-&gt;ioaddr);</div><div class='ctx'> 	pci_free_consistent(db-&gt;pdev, sizeof(struct tx_desc) *</div><div class='ctx'> 				DESC_ALL_CNT + 0x20, db-&gt;desc_pool_ptr,</div><div class='ctx'>  				db-&gt;desc_pool_dma_ptr);</div><div class='ctx'> 	pci_free_consistent(db-&gt;pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4,</div><div class='ctx'> 				db-&gt;buf_pool_ptr, db-&gt;buf_pool_dma_ptr);</div><div class='del'>-	unregister_netdev(dev);</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='del'>-	free_netdev(dev);	/* free board information */</div><div class='del'>-	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='del'>-	ULI526X_DBUG(0, "uli526x_remove_one() exit", 0);</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+	free_netdev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -468,7 +485,8 @@ static int uli526x_open(struct net_device *dev)</div><div class='ctx'> 	/* Initialize ULI526X board */</div><div class='ctx'> 	uli526x_init(dev);</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(dev-&gt;irq, uli526x_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	ret = request_irq(db-&gt;pdev-&gt;irq, uli526x_interrupt, IRQF_SHARED,</div><div class='add'>+			  dev-&gt;name, dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -496,57 +514,57 @@ static int uli526x_open(struct net_device *dev)</div><div class='ctx'> static void uli526x_init(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct uli526x_board_info *db = netdev_priv(dev);</div><div class='del'>-	unsigned long ioaddr = db-&gt;ioaddr;</div><div class='add'>+	struct uli_phy_ops *phy = &amp;db-&gt;phy;</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	u8	phy_tmp;</div><div class='ctx'> 	u8	timeout;</div><div class='del'>-	u16	phy_value;</div><div class='ctx'> 	u16 phy_reg_reset;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	ULI526X_DBUG(0, "uli526x_init()", 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset M526x MAC controller */</div><div class='del'>-	outl(ULI526X_RESET, ioaddr + DCR0);	/* RESET MAC */</div><div class='add'>+	uw32(DCR0, ULI526X_RESET);	/* RESET MAC */</div><div class='ctx'> 	udelay(100);</div><div class='del'>-	outl(db-&gt;cr0_data, ioaddr + DCR0);</div><div class='add'>+	uw32(DCR0, db-&gt;cr0_data);</div><div class='ctx'> 	udelay(5);</div><div class='ctx'> </div><div class='ctx'> 	/* Phy addr : In some boards,M5261/M5263 phy address != 1 */</div><div class='ctx'> 	db-&gt;phy_addr = 1;</div><div class='del'>-	for(phy_tmp=0;phy_tmp&lt;32;phy_tmp++)</div><div class='del'>-	{</div><div class='del'>-		phy_value=phy_read(db-&gt;ioaddr,phy_tmp,3,db-&gt;chip_id);//peer add</div><div class='del'>-		if(phy_value != 0xffff&amp;&amp;phy_value!=0)</div><div class='del'>-		{</div><div class='add'>+	for (phy_tmp = 0; phy_tmp &lt; 32; phy_tmp++) {</div><div class='add'>+		u16 phy_value;</div><div class='add'>+</div><div class='add'>+		phy_value = phy-&gt;read(db, phy_tmp, 3);	//peer add</div><div class='add'>+		if (phy_value != 0xffff &amp;&amp; phy_value != 0) {</div><div class='ctx'> 			db-&gt;phy_addr = phy_tmp;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if(phy_tmp == 32)</div><div class='add'>+</div><div class='add'>+	if (phy_tmp == 32)</div><div class='ctx'> 		pr_warn("Can not find the phy address!!!\n");</div><div class='ctx'> 	/* Parser SROM and media mode */</div><div class='ctx'> 	db-&gt;media_mode = uli526x_media_mode;</div><div class='ctx'> </div><div class='ctx'> 	/* phyxcer capability setting */</div><div class='del'>-	phy_reg_reset = phy_read(db-&gt;ioaddr, db-&gt;phy_addr, 0, db-&gt;chip_id);</div><div class='add'>+	phy_reg_reset = phy-&gt;read(db, db-&gt;phy_addr, 0);</div><div class='ctx'> 	phy_reg_reset = (phy_reg_reset | 0x8000);</div><div class='del'>-	phy_write(db-&gt;ioaddr, db-&gt;phy_addr, 0, phy_reg_reset, db-&gt;chip_id);</div><div class='add'>+	phy-&gt;write(db, db-&gt;phy_addr, 0, phy_reg_reset);</div><div class='ctx'> </div><div class='ctx'> 	/* See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management</div><div class='ctx'> 	 * functions") or phy data sheet for details on phy reset</div><div class='ctx'> 	 */</div><div class='ctx'> 	udelay(500);</div><div class='ctx'> 	timeout = 10;</div><div class='del'>-	while (timeout-- &amp;&amp;</div><div class='del'>-		phy_read(db-&gt;ioaddr, db-&gt;phy_addr, 0, db-&gt;chip_id) &amp; 0x8000)</div><div class='del'>-			udelay(100);</div><div class='add'>+	while (timeout-- &amp;&amp; phy-&gt;read(db, db-&gt;phy_addr, 0) &amp; 0x8000)</div><div class='add'>+		udelay(100);</div><div class='ctx'> </div><div class='ctx'> 	/* Process Phyxcer Media Mode */</div><div class='ctx'> 	uli526x_set_phyxcer(db);</div><div class='ctx'> </div><div class='ctx'> 	/* Media Mode Process */</div><div class='ctx'> 	if ( !(db-&gt;media_mode &amp; ULI526X_AUTO) )</div><div class='del'>-		db-&gt;op_mode = db-&gt;media_mode; 	/* Force Mode */</div><div class='add'>+		db-&gt;op_mode = db-&gt;media_mode;		/* Force Mode */</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize Transmit/Receive decriptor and CR3/4 */</div><div class='ctx'> 	uli526x_descriptor_init(dev, ioaddr);</div><div class='hunk'>@@ -559,10 +577,10 @@ static void uli526x_init(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Init CR7, interrupt active bit */</div><div class='ctx'> 	db-&gt;cr7_data = CR7_DEFAULT;</div><div class='del'>-	outl(db-&gt;cr7_data, ioaddr + DCR7);</div><div class='add'>+	uw32(DCR7, db-&gt;cr7_data);</div><div class='ctx'> </div><div class='ctx'> 	/* Init CR15, Tx jabber and Rx watchdog timer */</div><div class='del'>-	outl(db-&gt;cr15_data, ioaddr + DCR15);</div><div class='add'>+	uw32(DCR15, db-&gt;cr15_data);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable ULI526X Tx/Rx function */</div><div class='ctx'> 	db-&gt;cr6_data |= CR6_RXSC | CR6_TXSC;</div><div class='hunk'>@@ -579,6 +597,7 @@ static netdev_tx_t uli526x_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 					    struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct uli526x_board_info *db = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	struct tx_desc *txptr;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -604,7 +623,7 @@ static netdev_tx_t uli526x_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Disable NIC interrupt */</div><div class='del'>-	outl(0, dev-&gt;base_addr + DCR7);</div><div class='add'>+	uw32(DCR7, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* transmit this packet */</div><div class='ctx'> 	txptr = db-&gt;tx_insert_ptr;</div><div class='hunk'>@@ -615,10 +634,10 @@ static netdev_tx_t uli526x_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	db-&gt;tx_insert_ptr = txptr-&gt;next_tx_desc;</div><div class='ctx'> </div><div class='ctx'> 	/* Transmit Packet Process */</div><div class='del'>-	if ( (db-&gt;tx_packet_cnt &lt; TX_DESC_CNT) ) {</div><div class='add'>+	if (db-&gt;tx_packet_cnt &lt; TX_DESC_CNT) {</div><div class='ctx'> 		txptr-&gt;tdes0 = cpu_to_le32(0x80000000);	/* Set owner bit */</div><div class='ctx'> 		db-&gt;tx_packet_cnt++;			/* Ready to send */</div><div class='del'>-		outl(0x1, dev-&gt;base_addr + DCR1);	/* Issue Tx polling */</div><div class='add'>+		uw32(DCR1, 0x1);			/* Issue Tx polling */</div><div class='ctx'> 		dev-&gt;trans_start = jiffies;		/* saved time stamp */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -628,7 +647,7 @@ static netdev_tx_t uli526x_start_xmit(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	/* Restore CR7 to enable interrupt */</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;db-&gt;lock, flags);</div><div class='del'>-	outl(db-&gt;cr7_data, dev-&gt;base_addr + DCR7);</div><div class='add'>+	uw32(DCR7, db-&gt;cr7_data);</div><div class='ctx'> </div><div class='ctx'> 	/* free this SKB */</div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='hunk'>@@ -645,9 +664,7 @@ static netdev_tx_t uli526x_start_xmit(struct sk_buff *skb,</div><div class='ctx'> static int uli526x_stop(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct uli526x_board_info *db = netdev_priv(dev);</div><div class='del'>-	unsigned long ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-	ULI526X_DBUG(0, "uli526x_stop", 0);</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	/* disable system */</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='hunk'>@@ -656,12 +673,12 @@ static int uli526x_stop(struct net_device *dev)</div><div class='ctx'> 	del_timer_sync(&amp;db-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset &amp; stop ULI526X board */</div><div class='del'>-	outl(ULI526X_RESET, ioaddr + DCR0);</div><div class='add'>+	uw32(DCR0, ULI526X_RESET);</div><div class='ctx'> 	udelay(5);</div><div class='del'>-	phy_write(db-&gt;ioaddr, db-&gt;phy_addr, 0, 0x8000, db-&gt;chip_id);</div><div class='add'>+	db-&gt;phy.write(db, db-&gt;phy_addr, 0, 0x8000);</div><div class='ctx'> </div><div class='ctx'> 	/* free interrupt */</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(db-&gt;pdev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	/* free allocated rx buffer */</div><div class='ctx'> 	uli526x_free_rxbuffer(db);</div><div class='hunk'>@@ -679,18 +696,18 @@ static irqreturn_t uli526x_interrupt(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = dev_id;</div><div class='ctx'> 	struct uli526x_board_info *db = netdev_priv(dev);</div><div class='del'>-	unsigned long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;db-&gt;lock, flags);</div><div class='del'>-	outl(0, ioaddr + DCR7);</div><div class='add'>+	uw32(DCR7, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Got ULI526X status */</div><div class='del'>-	db-&gt;cr5_data = inl(ioaddr + DCR5);</div><div class='del'>-	outl(db-&gt;cr5_data, ioaddr + DCR5);</div><div class='add'>+	db-&gt;cr5_data = ur32(DCR5);</div><div class='add'>+	uw32(DCR5, db-&gt;cr5_data);</div><div class='ctx'> 	if ( !(db-&gt;cr5_data &amp; 0x180c1) ) {</div><div class='ctx'> 		/* Restore CR7 to enable interrupt mask */</div><div class='del'>-		outl(db-&gt;cr7_data, ioaddr + DCR7);</div><div class='add'>+		uw32(DCR7, db-&gt;cr7_data);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;db-&gt;lock, flags);</div><div class='ctx'> 		return IRQ_HANDLED;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -718,7 +735,7 @@ static irqreturn_t uli526x_interrupt(int irq, void *dev_id)</div><div class='ctx'> 		uli526x_free_tx_pkt(dev, db);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore CR7 to enable interrupt mask */</div><div class='del'>-	outl(db-&gt;cr7_data, ioaddr + DCR7);</div><div class='add'>+	uw32(DCR7, db-&gt;cr7_data);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;db-&gt;lock, flags);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='hunk'>@@ -727,8 +744,10 @@ static irqreturn_t uli526x_interrupt(int irq, void *dev_id)</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> static void uli526x_poll(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct uli526x_board_info *db = netdev_priv(dev);</div><div class='add'>+</div><div class='ctx'> 	/* ISR grabs the irqsave lock, so this should be safe */</div><div class='del'>-	uli526x_interrupt(dev-&gt;irq, dev);</div><div class='add'>+	uli526x_interrupt(db-&gt;pdev-&gt;irq, dev);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -962,12 +981,7 @@ static void netdev_get_drvinfo(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='ctx'> 	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='del'>-	if (np-&gt;pdev)</div><div class='del'>-		strlcpy(info-&gt;bus_info, pci_name(np-&gt;pdev),</div><div class='del'>-			sizeof(info-&gt;bus_info));</div><div class='del'>-	else</div><div class='del'>-		sprintf(info-&gt;bus_info, "EISA 0x%lx %d",</div><div class='del'>-			dev-&gt;base_addr, dev-&gt;irq);</div><div class='add'>+	strlcpy(info-&gt;bus_info, pci_name(np-&gt;pdev), sizeof(info-&gt;bus_info));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int netdev_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) {</div><div class='hunk'>@@ -1007,18 +1021,20 @@ static const struct ethtool_ops netdev_ethtool_ops = {</div><div class='ctx'> </div><div class='ctx'> static void uli526x_timer(unsigned long data)</div><div class='ctx'> {</div><div class='del'>-	u32 tmp_cr8;</div><div class='del'>-	unsigned char tmp_cr12=0;</div><div class='ctx'> 	struct net_device *dev = (struct net_device *) data;</div><div class='ctx'> 	struct uli526x_board_info *db = netdev_priv(dev);</div><div class='add'>+	struct uli_phy_ops *phy = &amp;db-&gt;phy;</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'>  	unsigned long flags;</div><div class='add'>+	u8 tmp_cr12 = 0;</div><div class='add'>+	u32 tmp_cr8;</div><div class='ctx'> </div><div class='ctx'> 	//ULI526X_DBUG(0, "uli526x_timer()", 0);</div><div class='ctx'> 	spin_lock_irqsave(&amp;db-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/* Dynamic reset ULI526X : system error or transmit time-out */</div><div class='del'>-	tmp_cr8 = inl(db-&gt;ioaddr + DCR8);</div><div class='add'>+	tmp_cr8 = ur32(DCR8);</div><div class='ctx'> 	if ( (db-&gt;interval_rx_cnt==0) &amp;&amp; (tmp_cr8) ) {</div><div class='ctx'> 		db-&gt;reset_cr8++;</div><div class='ctx'> 		db-&gt;wait_reset = 1;</div><div class='hunk'>@@ -1028,7 +1044,7 @@ static void uli526x_timer(unsigned long data)</div><div class='ctx'> 	/* TX polling kick monitor */</div><div class='ctx'> 	if ( db-&gt;tx_packet_cnt &amp;&amp;</div><div class='ctx'> 	     time_after(jiffies, dev_trans_start(dev) + ULI526X_TX_KICK) ) {</div><div class='del'>-		outl(0x1, dev-&gt;base_addr + DCR1);   // Tx polling again</div><div class='add'>+		uw32(DCR1, 0x1);   // Tx polling again</div><div class='ctx'> </div><div class='ctx'> 		// TX Timeout</div><div class='ctx'> 		if ( time_after(jiffies, dev_trans_start(dev) + ULI526X_TX_TIMEOUT) ) {</div><div class='hunk'>@@ -1049,7 +1065,7 @@ static void uli526x_timer(unsigned long data)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Link status check, Dynamic media type change */</div><div class='del'>-	if((phy_read(db-&gt;ioaddr, db-&gt;phy_addr, 5, db-&gt;chip_id) &amp; 0x01e0)!=0)</div><div class='add'>+	if ((phy-&gt;read(db, db-&gt;phy_addr, 5) &amp; 0x01e0)!=0)</div><div class='ctx'> 		tmp_cr12 = 3;</div><div class='ctx'> </div><div class='ctx'> 	if ( !(tmp_cr12 &amp; 0x3) &amp;&amp; !db-&gt;link_failed ) {</div><div class='hunk'>@@ -1062,7 +1078,7 @@ static void uli526x_timer(unsigned long data)</div><div class='ctx'> 		/* For Force 10/100M Half/Full mode: Enable Auto-Nego mode */</div><div class='ctx'> 		/* AUTO don't need */</div><div class='ctx'> 		if ( !(db-&gt;media_mode &amp; 0x8) )</div><div class='del'>-			phy_write(db-&gt;ioaddr, db-&gt;phy_addr, 0, 0x1000, db-&gt;chip_id);</div><div class='add'>+			phy-&gt;write(db, db-&gt;phy_addr, 0, 0x1000);</div><div class='ctx'> </div><div class='ctx'> 		/* AUTO mode, if INT phyxcer link failed, select EXT device */</div><div class='ctx'> 		if (db-&gt;media_mode &amp; ULI526X_AUTO) {</div><div class='hunk'>@@ -1119,12 +1135,13 @@ static void uli526x_timer(unsigned long data)</div><div class='ctx'> static void uli526x_reset_prepare(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct uli526x_board_info *db = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	/* Sopt MAC controller */</div><div class='ctx'> 	db-&gt;cr6_data &amp;= ~(CR6_RXSC | CR6_TXSC);	/* Disable Tx/Rx */</div><div class='del'>-	update_cr6(db-&gt;cr6_data, dev-&gt;base_addr);</div><div class='del'>-	outl(0, dev-&gt;base_addr + DCR7);		/* Disable Interrupt */</div><div class='del'>-	outl(inl(dev-&gt;base_addr + DCR5), dev-&gt;base_addr + DCR5);</div><div class='add'>+	update_cr6(db-&gt;cr6_data, ioaddr);</div><div class='add'>+	uw32(DCR7, 0);				/* Disable Interrupt */</div><div class='add'>+	uw32(DCR5, ur32(DCR5));</div><div class='ctx'> </div><div class='ctx'> 	/* Disable upper layer interface */</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='hunk'>@@ -1289,7 +1306,7 @@ static void uli526x_reuse_skb(struct uli526x_board_info *db, struct sk_buff * sk</div><div class='ctx'>  *	Using Chain structure, and allocate Tx/Rx buffer</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void uli526x_descriptor_init(struct net_device *dev, unsigned long ioaddr)</div><div class='add'>+static void uli526x_descriptor_init(struct net_device *dev, void __iomem *ioaddr)</div><div class='ctx'> {</div><div class='ctx'> 	struct uli526x_board_info *db = netdev_priv(dev);</div><div class='ctx'> 	struct tx_desc *tmp_tx;</div><div class='hunk'>@@ -1304,14 +1321,14 @@ static void uli526x_descriptor_init(struct net_device *dev, unsigned long ioaddr</div><div class='ctx'> 	/* tx descriptor start pointer */</div><div class='ctx'> 	db-&gt;tx_insert_ptr = db-&gt;first_tx_desc;</div><div class='ctx'> 	db-&gt;tx_remove_ptr = db-&gt;first_tx_desc;</div><div class='del'>-	outl(db-&gt;first_tx_desc_dma, ioaddr + DCR4);     /* TX DESC address */</div><div class='add'>+	uw32(DCR4, db-&gt;first_tx_desc_dma);	/* TX DESC address */</div><div class='ctx'> </div><div class='ctx'> 	/* rx descriptor start pointer */</div><div class='ctx'> 	db-&gt;first_rx_desc = (void *)db-&gt;first_tx_desc + sizeof(struct tx_desc) * TX_DESC_CNT;</div><div class='ctx'> 	db-&gt;first_rx_desc_dma =  db-&gt;first_tx_desc_dma + sizeof(struct tx_desc) * TX_DESC_CNT;</div><div class='ctx'> 	db-&gt;rx_insert_ptr = db-&gt;first_rx_desc;</div><div class='ctx'> 	db-&gt;rx_ready_ptr = db-&gt;first_rx_desc;</div><div class='del'>-	outl(db-&gt;first_rx_desc_dma, ioaddr + DCR3);	/* RX DESC address */</div><div class='add'>+	uw32(DCR3, db-&gt;first_rx_desc_dma);	/* RX DESC address */</div><div class='ctx'> </div><div class='ctx'> 	/* Init Transmit chain */</div><div class='ctx'> 	tmp_buf = db-&gt;buf_pool_start;</div><div class='hunk'>@@ -1352,11 +1369,9 @@ static void uli526x_descriptor_init(struct net_device *dev, unsigned long ioaddr</div><div class='ctx'>  *	Update CR6 value</div><div class='ctx'>  *	Firstly stop ULI526X, then written value and start</div><div class='ctx'>  */</div><div class='del'>-</div><div class='del'>-static void update_cr6(u32 cr6_data, unsigned long ioaddr)</div><div class='add'>+static void update_cr6(u32 cr6_data, void __iomem *ioaddr)</div><div class='ctx'> {</div><div class='del'>-</div><div class='del'>-	outl(cr6_data, ioaddr + DCR6);</div><div class='add'>+	uw32(DCR6, cr6_data);</div><div class='ctx'> 	udelay(5);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1375,6 +1390,7 @@ static void update_cr6(u32 cr6_data, unsigned long ioaddr)</div><div class='ctx'> static void send_filter_frame(struct net_device *dev, int mc_cnt)</div><div class='ctx'> {</div><div class='ctx'> 	struct uli526x_board_info *db = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	struct netdev_hw_addr *ha;</div><div class='ctx'> 	struct tx_desc *txptr;</div><div class='ctx'> 	u16 * addrptr;</div><div class='hunk'>@@ -1420,9 +1436,9 @@ static void send_filter_frame(struct net_device *dev, int mc_cnt)</div><div class='ctx'> 		/* Resource Empty */</div><div class='ctx'> 		db-&gt;tx_packet_cnt++;</div><div class='ctx'> 		txptr-&gt;tdes0 = cpu_to_le32(0x80000000);</div><div class='del'>-		update_cr6(db-&gt;cr6_data | 0x2000, dev-&gt;base_addr);</div><div class='del'>-		outl(0x1, dev-&gt;base_addr + DCR1);	/* Issue Tx polling */</div><div class='del'>-		update_cr6(db-&gt;cr6_data, dev-&gt;base_addr);</div><div class='add'>+		update_cr6(db-&gt;cr6_data | 0x2000, ioaddr);</div><div class='add'>+		uw32(DCR1, 0x1);	/* Issue Tx polling */</div><div class='add'>+		update_cr6(db-&gt;cr6_data, ioaddr);</div><div class='ctx'> 		dev-&gt;trans_start = jiffies;</div><div class='ctx'> 	} else</div><div class='ctx'> 		netdev_err(dev, "No Tx resource - Send_filter_frame!\n");</div><div class='hunk'>@@ -1465,37 +1481,38 @@ static void allocate_rx_buffer(struct net_device *dev)</div><div class='ctx'>  *	Read one word data from the serial ROM</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static u16 read_srom_word(long ioaddr, int offset)</div><div class='add'>+static u16 read_srom_word(struct uli526x_board_info *db, int offset)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	u16 srom_data = 0;</div><div class='del'>-	long cr9_ioaddr = ioaddr + DCR9;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	outl(CR9_SROM_READ, cr9_ioaddr);</div><div class='del'>-	outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr);</div><div class='add'>+	uw32(DCR9, CR9_SROM_READ);</div><div class='add'>+	uw32(DCR9, CR9_SROM_READ | CR9_SRCS);</div><div class='ctx'> </div><div class='ctx'> 	/* Send the Read Command 110b */</div><div class='del'>-	SROM_CLK_WRITE(SROM_DATA_1, cr9_ioaddr);</div><div class='del'>-	SROM_CLK_WRITE(SROM_DATA_1, cr9_ioaddr);</div><div class='del'>-	SROM_CLK_WRITE(SROM_DATA_0, cr9_ioaddr);</div><div class='add'>+	srom_clk_write(db, SROM_DATA_1);</div><div class='add'>+	srom_clk_write(db, SROM_DATA_1);</div><div class='add'>+	srom_clk_write(db, SROM_DATA_0);</div><div class='ctx'> </div><div class='ctx'> 	/* Send the offset */</div><div class='ctx'> 	for (i = 5; i &gt;= 0; i--) {</div><div class='ctx'> 		srom_data = (offset &amp; (1 &lt;&lt; i)) ? SROM_DATA_1 : SROM_DATA_0;</div><div class='del'>-		SROM_CLK_WRITE(srom_data, cr9_ioaddr);</div><div class='add'>+		srom_clk_write(db, srom_data);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr);</div><div class='add'>+	uw32(DCR9, CR9_SROM_READ | CR9_SRCS);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 16; i &gt; 0; i--) {</div><div class='del'>-		outl(CR9_SROM_READ | CR9_SRCS | CR9_SRCLK, cr9_ioaddr);</div><div class='add'>+		uw32(DCR9, CR9_SROM_READ | CR9_SRCS | CR9_SRCLK);</div><div class='ctx'> 		udelay(5);</div><div class='del'>-		srom_data = (srom_data &lt;&lt; 1) | ((inl(cr9_ioaddr) &amp; CR9_CRDOUT) ? 1 : 0);</div><div class='del'>-		outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr);</div><div class='add'>+		srom_data = (srom_data &lt;&lt; 1) |</div><div class='add'>+			    ((ur32(DCR9) &amp; CR9_CRDOUT) ? 1 : 0);</div><div class='add'>+		uw32(DCR9, CR9_SROM_READ | CR9_SRCS);</div><div class='ctx'> 		udelay(5);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	outl(CR9_SROM_READ, cr9_ioaddr);</div><div class='add'>+	uw32(DCR9, CR9_SROM_READ);</div><div class='ctx'> 	return srom_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1506,15 +1523,16 @@ static u16 read_srom_word(long ioaddr, int offset)</div><div class='ctx'> </div><div class='ctx'> static u8 uli526x_sense_speed(struct uli526x_board_info * db)</div><div class='ctx'> {</div><div class='add'>+	struct uli_phy_ops *phy = &amp;db-&gt;phy;</div><div class='ctx'> 	u8 ErrFlag = 0;</div><div class='ctx'> 	u16 phy_mode;</div><div class='ctx'> </div><div class='del'>-	phy_mode = phy_read(db-&gt;ioaddr, db-&gt;phy_addr, 1, db-&gt;chip_id);</div><div class='del'>-	phy_mode = phy_read(db-&gt;ioaddr, db-&gt;phy_addr, 1, db-&gt;chip_id);</div><div class='add'>+	phy_mode = phy-&gt;read(db, db-&gt;phy_addr, 1);</div><div class='add'>+	phy_mode = phy-&gt;read(db, db-&gt;phy_addr, 1);</div><div class='ctx'> </div><div class='ctx'> 	if ( (phy_mode &amp; 0x24) == 0x24 ) {</div><div class='ctx'> </div><div class='del'>-		phy_mode = ((phy_read(db-&gt;ioaddr, db-&gt;phy_addr, 5, db-&gt;chip_id) &amp; 0x01e0)&lt;&lt;7);</div><div class='add'>+		phy_mode = ((phy-&gt;read(db, db-&gt;phy_addr, 5) &amp; 0x01e0)&lt;&lt;7);</div><div class='ctx'> 		if(phy_mode&amp;0x8000)</div><div class='ctx'> 			phy_mode = 0x8000;</div><div class='ctx'> 		else if(phy_mode&amp;0x4000)</div><div class='hunk'>@@ -1549,10 +1567,11 @@ static u8 uli526x_sense_speed(struct uli526x_board_info * db)</div><div class='ctx'> </div><div class='ctx'> static void uli526x_set_phyxcer(struct uli526x_board_info *db)</div><div class='ctx'> {</div><div class='add'>+	struct uli_phy_ops *phy = &amp;db-&gt;phy;</div><div class='ctx'> 	u16 phy_reg;</div><div class='ctx'> </div><div class='ctx'> 	/* Phyxcer capability setting */</div><div class='del'>-	phy_reg = phy_read(db-&gt;ioaddr, db-&gt;phy_addr, 4, db-&gt;chip_id) &amp; ~0x01e0;</div><div class='add'>+	phy_reg = phy-&gt;read(db, db-&gt;phy_addr, 4) &amp; ~0x01e0;</div><div class='ctx'> </div><div class='ctx'> 	if (db-&gt;media_mode &amp; ULI526X_AUTO) {</div><div class='ctx'> 		/* AUTO Mode */</div><div class='hunk'>@@ -1573,10 +1592,10 @@ static void uli526x_set_phyxcer(struct uli526x_board_info *db)</div><div class='ctx'> 		phy_reg|=db-&gt;PHY_reg4;</div><div class='ctx'> 		db-&gt;media_mode|=ULI526X_AUTO;</div><div class='ctx'> 	}</div><div class='del'>-	phy_write(db-&gt;ioaddr, db-&gt;phy_addr, 4, phy_reg, db-&gt;chip_id);</div><div class='add'>+	phy-&gt;write(db, db-&gt;phy_addr, 4, phy_reg);</div><div class='ctx'> </div><div class='ctx'>  	/* Restart Auto-Negotiation */</div><div class='del'>-	phy_write(db-&gt;ioaddr, db-&gt;phy_addr, 0, 0x1200, db-&gt;chip_id);</div><div class='add'>+	phy-&gt;write(db, db-&gt;phy_addr, 0, 0x1200);</div><div class='ctx'> 	udelay(50);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1590,6 +1609,7 @@ static void uli526x_set_phyxcer(struct uli526x_board_info *db)</div><div class='ctx'> </div><div class='ctx'> static void uli526x_process_mode(struct uli526x_board_info *db)</div><div class='ctx'> {</div><div class='add'>+	struct uli_phy_ops *phy = &amp;db-&gt;phy;</div><div class='ctx'> 	u16 phy_reg;</div><div class='ctx'> </div><div class='ctx'> 	/* Full Duplex Mode Check */</div><div class='hunk'>@@ -1601,10 +1621,10 @@ static void uli526x_process_mode(struct uli526x_board_info *db)</div><div class='ctx'> 	update_cr6(db-&gt;cr6_data, db-&gt;ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	/* 10/100M phyxcer force mode need */</div><div class='del'>-	if ( !(db-&gt;media_mode &amp; 0x8)) {</div><div class='add'>+	if (!(db-&gt;media_mode &amp; 0x8)) {</div><div class='ctx'> 		/* Forece Mode */</div><div class='del'>-		phy_reg = phy_read(db-&gt;ioaddr, db-&gt;phy_addr, 6, db-&gt;chip_id);</div><div class='del'>-		if ( !(phy_reg &amp; 0x1) ) {</div><div class='add'>+		phy_reg = phy-&gt;read(db, db-&gt;phy_addr, 6);</div><div class='add'>+		if (!(phy_reg &amp; 0x1)) {</div><div class='ctx'> 			/* parter without N-Way capability */</div><div class='ctx'> 			phy_reg = 0x0;</div><div class='ctx'> 			switch(db-&gt;op_mode) {</div><div class='hunk'>@@ -1613,148 +1633,126 @@ static void uli526x_process_mode(struct uli526x_board_info *db)</div><div class='ctx'> 			case ULI526X_100MHF: phy_reg = 0x2000; break;</div><div class='ctx'> 			case ULI526X_100MFD: phy_reg = 0x2100; break;</div><div class='ctx'> 			}</div><div class='del'>-			phy_write(db-&gt;ioaddr, db-&gt;phy_addr, 0, phy_reg, db-&gt;chip_id);</div><div class='add'>+			phy-&gt;write(db, db-&gt;phy_addr, 0, phy_reg);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- *	Write a word to Phy register</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset, u16 phy_data, u32 chip_id)</div><div class='add'>+/* M5261/M5263 Chip */</div><div class='add'>+static void phy_writeby_cr9(struct uli526x_board_info *db, u8 phy_addr,</div><div class='add'>+			    u8 offset, u16 phy_data)</div><div class='ctx'> {</div><div class='ctx'> 	u16 i;</div><div class='del'>-	unsigned long ioaddr;</div><div class='del'>-</div><div class='del'>-	if(chip_id == PCI_ULI5263_ID)</div><div class='del'>-	{</div><div class='del'>-		phy_writeby_cr10(iobase, phy_addr, offset, phy_data);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	/* M5261/M5263 Chip */</div><div class='del'>-	ioaddr = iobase + DCR9;</div><div class='ctx'> </div><div class='ctx'> 	/* Send 33 synchronization clock to Phy controller */</div><div class='ctx'> 	for (i = 0; i &lt; 35; i++)</div><div class='del'>-		phy_write_1bit(ioaddr, PHY_DATA_1, chip_id);</div><div class='add'>+		phy_write_1bit(db, PHY_DATA_1);</div><div class='ctx'> </div><div class='ctx'> 	/* Send start command(01) to Phy */</div><div class='del'>-	phy_write_1bit(ioaddr, PHY_DATA_0, chip_id);</div><div class='del'>-	phy_write_1bit(ioaddr, PHY_DATA_1, chip_id);</div><div class='add'>+	phy_write_1bit(db, PHY_DATA_0);</div><div class='add'>+	phy_write_1bit(db, PHY_DATA_1);</div><div class='ctx'> </div><div class='ctx'> 	/* Send write command(01) to Phy */</div><div class='del'>-	phy_write_1bit(ioaddr, PHY_DATA_0, chip_id);</div><div class='del'>-	phy_write_1bit(ioaddr, PHY_DATA_1, chip_id);</div><div class='add'>+	phy_write_1bit(db, PHY_DATA_0);</div><div class='add'>+	phy_write_1bit(db, PHY_DATA_1);</div><div class='ctx'> </div><div class='ctx'> 	/* Send Phy address */</div><div class='ctx'> 	for (i = 0x10; i &gt; 0; i = i &gt;&gt; 1)</div><div class='del'>-		phy_write_1bit(ioaddr, phy_addr &amp; i ? PHY_DATA_1 : PHY_DATA_0, chip_id);</div><div class='add'>+		phy_write_1bit(db, phy_addr &amp; i ? PHY_DATA_1 : PHY_DATA_0);</div><div class='ctx'> </div><div class='ctx'> 	/* Send register address */</div><div class='ctx'> 	for (i = 0x10; i &gt; 0; i = i &gt;&gt; 1)</div><div class='del'>-		phy_write_1bit(ioaddr, offset &amp; i ? PHY_DATA_1 : PHY_DATA_0, chip_id);</div><div class='add'>+		phy_write_1bit(db, offset &amp; i ? PHY_DATA_1 : PHY_DATA_0);</div><div class='ctx'> </div><div class='ctx'> 	/* written trasnition */</div><div class='del'>-	phy_write_1bit(ioaddr, PHY_DATA_1, chip_id);</div><div class='del'>-	phy_write_1bit(ioaddr, PHY_DATA_0, chip_id);</div><div class='add'>+	phy_write_1bit(db, PHY_DATA_1);</div><div class='add'>+	phy_write_1bit(db, PHY_DATA_0);</div><div class='ctx'> </div><div class='ctx'> 	/* Write a word data to PHY controller */</div><div class='del'>-	for ( i = 0x8000; i &gt; 0; i &gt;&gt;= 1)</div><div class='del'>-		phy_write_1bit(ioaddr, phy_data &amp; i ? PHY_DATA_1 : PHY_DATA_0, chip_id);</div><div class='del'>-</div><div class='add'>+	for (i = 0x8000; i &gt; 0; i &gt;&gt;= 1)</div><div class='add'>+		phy_write_1bit(db, phy_data &amp; i ? PHY_DATA_1 : PHY_DATA_0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	Read a word data from phy register</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, u32 chip_id)</div><div class='add'>+static u16 phy_readby_cr9(struct uli526x_board_info *db, u8 phy_addr, u8 offset)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='ctx'> 	u16 phy_data;</div><div class='del'>-	unsigned long ioaddr;</div><div class='del'>-</div><div class='del'>-	if(chip_id == PCI_ULI5263_ID)</div><div class='del'>-		return phy_readby_cr10(iobase, phy_addr, offset);</div><div class='del'>-	/* M5261/M5263 Chip */</div><div class='del'>-	ioaddr = iobase + DCR9;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Send 33 synchronization clock to Phy controller */</div><div class='ctx'> 	for (i = 0; i &lt; 35; i++)</div><div class='del'>-		phy_write_1bit(ioaddr, PHY_DATA_1, chip_id);</div><div class='add'>+		phy_write_1bit(db, PHY_DATA_1);</div><div class='ctx'> </div><div class='ctx'> 	/* Send start command(01) to Phy */</div><div class='del'>-	phy_write_1bit(ioaddr, PHY_DATA_0, chip_id);</div><div class='del'>-	phy_write_1bit(ioaddr, PHY_DATA_1, chip_id);</div><div class='add'>+	phy_write_1bit(db, PHY_DATA_0);</div><div class='add'>+	phy_write_1bit(db, PHY_DATA_1);</div><div class='ctx'> </div><div class='ctx'> 	/* Send read command(10) to Phy */</div><div class='del'>-	phy_write_1bit(ioaddr, PHY_DATA_1, chip_id);</div><div class='del'>-	phy_write_1bit(ioaddr, PHY_DATA_0, chip_id);</div><div class='add'>+	phy_write_1bit(db, PHY_DATA_1);</div><div class='add'>+	phy_write_1bit(db, PHY_DATA_0);</div><div class='ctx'> </div><div class='ctx'> 	/* Send Phy address */</div><div class='ctx'> 	for (i = 0x10; i &gt; 0; i = i &gt;&gt; 1)</div><div class='del'>-		phy_write_1bit(ioaddr, phy_addr &amp; i ? PHY_DATA_1 : PHY_DATA_0, chip_id);</div><div class='add'>+		phy_write_1bit(db, phy_addr &amp; i ? PHY_DATA_1 : PHY_DATA_0);</div><div class='ctx'> </div><div class='ctx'> 	/* Send register address */</div><div class='ctx'> 	for (i = 0x10; i &gt; 0; i = i &gt;&gt; 1)</div><div class='del'>-		phy_write_1bit(ioaddr, offset &amp; i ? PHY_DATA_1 : PHY_DATA_0, chip_id);</div><div class='add'>+		phy_write_1bit(db, offset &amp; i ? PHY_DATA_1 : PHY_DATA_0);</div><div class='ctx'> </div><div class='ctx'> 	/* Skip transition state */</div><div class='del'>-	phy_read_1bit(ioaddr, chip_id);</div><div class='add'>+	phy_read_1bit(db);</div><div class='ctx'> </div><div class='ctx'> 	/* read 16bit data */</div><div class='ctx'> 	for (phy_data = 0, i = 0; i &lt; 16; i++) {</div><div class='ctx'> 		phy_data &lt;&lt;= 1;</div><div class='del'>-		phy_data |= phy_read_1bit(ioaddr, chip_id);</div><div class='add'>+		phy_data |= phy_read_1bit(db);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return phy_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u16 phy_readby_cr10(unsigned long iobase, u8 phy_addr, u8 offset)</div><div class='add'>+static u16 phy_readby_cr10(struct uli526x_board_info *db, u8 phy_addr,</div><div class='add'>+			   u8 offset)</div><div class='ctx'> {</div><div class='del'>-	unsigned long ioaddr,cr10_value;</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='add'>+	u32 cr10_value = phy_addr;</div><div class='ctx'> </div><div class='del'>-	ioaddr = iobase + DCR10;</div><div class='del'>-	cr10_value = phy_addr;</div><div class='del'>-	cr10_value = (cr10_value&lt;&lt;5) + offset;</div><div class='del'>-	cr10_value = (cr10_value&lt;&lt;16) + 0x08000000;</div><div class='del'>-	outl(cr10_value,ioaddr);</div><div class='add'>+	cr10_value = (cr10_value &lt;&lt;  5) + offset;</div><div class='add'>+	cr10_value = (cr10_value &lt;&lt; 16) + 0x08000000;</div><div class='add'>+	uw32(DCR10, cr10_value);</div><div class='ctx'> 	udelay(1);</div><div class='del'>-	while(1)</div><div class='del'>-	{</div><div class='del'>-		cr10_value = inl(ioaddr);</div><div class='del'>-		if(cr10_value&amp;0x10000000)</div><div class='add'>+	while (1) {</div><div class='add'>+		cr10_value = ur32(DCR10);</div><div class='add'>+		if (cr10_value &amp; 0x10000000)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> 	return cr10_value &amp; 0x0ffff;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void phy_writeby_cr10(unsigned long iobase, u8 phy_addr, u8 offset, u16 phy_data)</div><div class='add'>+static void phy_writeby_cr10(struct uli526x_board_info *db, u8 phy_addr,</div><div class='add'>+			     u8 offset, u16 phy_data)</div><div class='ctx'> {</div><div class='del'>-	unsigned long ioaddr,cr10_value;</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='add'>+	u32 cr10_value = phy_addr;</div><div class='ctx'> </div><div class='del'>-	ioaddr = iobase + DCR10;</div><div class='del'>-	cr10_value = phy_addr;</div><div class='del'>-	cr10_value = (cr10_value&lt;&lt;5) + offset;</div><div class='del'>-	cr10_value = (cr10_value&lt;&lt;16) + 0x04000000 + phy_data;</div><div class='del'>-	outl(cr10_value,ioaddr);</div><div class='add'>+	cr10_value = (cr10_value &lt;&lt;  5) + offset;</div><div class='add'>+	cr10_value = (cr10_value &lt;&lt; 16) + 0x04000000 + phy_data;</div><div class='add'>+	uw32(DCR10, cr10_value);</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> }</div><div class='ctx'> /*</div><div class='ctx'>  *	Write one bit data to Phy Controller</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void phy_write_1bit(unsigned long ioaddr, u32 phy_data, u32 chip_id)</div><div class='add'>+static void phy_write_1bit(struct uli526x_board_info *db, u32 data)</div><div class='ctx'> {</div><div class='del'>-	outl(phy_data , ioaddr);			/* MII Clock Low */</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='add'>+</div><div class='add'>+	uw32(DCR9, data);		/* MII Clock Low */</div><div class='ctx'> 	udelay(1);</div><div class='del'>-	outl(phy_data  | MDCLKH, ioaddr);	/* MII Clock High */</div><div class='add'>+	uw32(DCR9, data | MDCLKH);	/* MII Clock High */</div><div class='ctx'> 	udelay(1);</div><div class='del'>-	outl(phy_data , ioaddr);			/* MII Clock Low */</div><div class='add'>+	uw32(DCR9, data);		/* MII Clock Low */</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1763,14 +1761,15 @@ static void phy_write_1bit(unsigned long ioaddr, u32 phy_data, u32 chip_id)</div><div class='ctx'>  *	Read one bit phy data from PHY controller</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static u16 phy_read_1bit(unsigned long ioaddr, u32 chip_id)</div><div class='add'>+static u16 phy_read_1bit(struct uli526x_board_info *db)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	u16 phy_data;</div><div class='ctx'> </div><div class='del'>-	outl(0x50000 , ioaddr);</div><div class='add'>+	uw32(DCR9, 0x50000);</div><div class='ctx'> 	udelay(1);</div><div class='del'>-	phy_data = ( inl(ioaddr) &gt;&gt; 19 ) &amp; 0x1;</div><div class='del'>-	outl(0x40000 , ioaddr);</div><div class='add'>+	phy_data = (ur32(DCR9) &gt;&gt; 19) &amp; 0x1;</div><div class='add'>+	uw32(DCR9, 0x40000);</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> </div><div class='ctx'> 	return phy_data;</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/winbond-840.c b/drivers/net/ethernet/dec/tulip/winbond-840.c<br/>index 2ac6fff0363a..4d1ffca83c82 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/winbond-840.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/dec/tulip/winbond-840.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/winbond-840.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/winbond-840.c</a></div><div class='hunk'>@@ -400,9 +400,6 @@ static int __devinit w840_probe1 (struct pci_dev *pdev,</div><div class='ctx'> 	   No hold time required! */</div><div class='ctx'> 	iowrite32(0x00000001, ioaddr + PCIBusCfg);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = (unsigned long)ioaddr;</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-</div><div class='ctx'> 	np = netdev_priv(dev);</div><div class='ctx'> 	np-&gt;pci_dev = pdev;</div><div class='ctx'> 	np-&gt;chip_id = chip_idx;</div><div class='hunk'>@@ -635,17 +632,18 @@ static int netdev_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = np-&gt;base_addr;</div><div class='add'>+	const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	iowrite32(0x00000001, ioaddr + PCIBusCfg);		/* Reset */</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(dev);</div><div class='del'>-	i = request_irq(dev-&gt;irq, intr_handler, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	i = request_irq(irq, intr_handler, IRQF_SHARED, dev-&gt;name, dev);</div><div class='ctx'> 	if (i)</div><div class='ctx'> 		goto out_err;</div><div class='ctx'> </div><div class='ctx'> 	if (debug &gt; 1)</div><div class='del'>-		netdev_dbg(dev, "w89c840_open() irq %d\n", dev-&gt;irq);</div><div class='add'>+		netdev_dbg(dev, "w89c840_open() irq %d\n", irq);</div><div class='ctx'> </div><div class='ctx'> 	if((i=alloc_ringdesc(dev)))</div><div class='ctx'> 		goto out_err;</div><div class='hunk'>@@ -932,6 +930,7 @@ static void tx_timeout(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = np-&gt;base_addr;</div><div class='add'>+	const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='ctx'> </div><div class='ctx'> 	dev_warn(&amp;dev-&gt;dev, "Transmit timed out, status %08x, resetting...\n",</div><div class='ctx'> 		 ioread32(ioaddr + IntrStatus));</div><div class='hunk'>@@ -951,7 +950,7 @@ static void tx_timeout(struct net_device *dev)</div><div class='ctx'> 	       np-&gt;cur_tx, np-&gt;dirty_tx, np-&gt;tx_full, np-&gt;tx_q_bytes);</div><div class='ctx'> 	printk(KERN_DEBUG "Tx Descriptor addr %xh\n", ioread32(ioaddr+0x4C));</div><div class='ctx'> </div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='add'>+	disable_irq(irq);</div><div class='ctx'> 	spin_lock_irq(&amp;np-&gt;lock);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Under high load dirty_tx and the internal tx descriptor pointer</div><div class='hunk'>@@ -966,7 +965,7 @@ static void tx_timeout(struct net_device *dev)</div><div class='ctx'> 	init_rxtx_rings(dev);</div><div class='ctx'> 	init_registers(dev);</div><div class='ctx'> 	spin_unlock_irq(&amp;np-&gt;lock);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> </div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> 	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='hunk'>@@ -1500,7 +1499,7 @@ static int netdev_close(struct net_device *dev)</div><div class='ctx'> 	iowrite32(0x0000, ioaddr + IntrEnable);</div><div class='ctx'> 	spin_unlock_irq(&amp;np-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(np-&gt;pci_dev-&gt;irq, dev);</div><div class='ctx'> 	wmb();</div><div class='ctx'> 	netif_device_attach(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1589,7 +1588,7 @@ static int w840_suspend (struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> 		iowrite32(0, ioaddr + IntrEnable);</div><div class='ctx'> 		spin_unlock_irq(&amp;np-&gt;lock);</div><div class='ctx'> </div><div class='del'>-		synchronize_irq(dev-&gt;irq);</div><div class='add'>+		synchronize_irq(np-&gt;pci_dev-&gt;irq);</div><div class='ctx'> 		netif_tx_disable(dev);</div><div class='ctx'> </div><div class='ctx'> 		np-&gt;stats.rx_missed_errors += ioread32(ioaddr + RxMissed) &amp; 0xffff;</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/xircom_cb.c b/drivers/net/ethernet/dec/tulip/xircom_cb.c<br/>index fdb329fe6e8e..138bf83bc98e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/xircom_cb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/dec/tulip/xircom_cb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/dec/tulip/xircom_cb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dec/tulip/xircom_cb.c</a></div><div class='hunk'>@@ -41,7 +41,9 @@ MODULE_DESCRIPTION("Xircom Cardbus ethernet driver");</div><div class='ctx'> MODULE_AUTHOR("Arjan van de Ven &lt;arjanv@redhat.com&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='del'>-</div><div class='add'>+#define xw32(reg, val)	iowrite32(val, ioaddr + (reg))</div><div class='add'>+#define xr32(reg)	ioread32(ioaddr + (reg))</div><div class='add'>+#define xr8(reg)	ioread8(ioaddr + (reg))</div><div class='ctx'> </div><div class='ctx'> /* IO registers on the card, offsets */</div><div class='ctx'> #define CSR0	0x00</div><div class='hunk'>@@ -83,7 +85,7 @@ struct xircom_private {</div><div class='ctx'> </div><div class='ctx'> 	struct sk_buff *tx_skb[4];</div><div class='ctx'> </div><div class='del'>-	unsigned long io_port;</div><div class='add'>+	void __iomem *ioaddr;</div><div class='ctx'> 	int open;</div><div class='ctx'> </div><div class='ctx'> 	/* transmit_used is the rotating counter that indicates which transmit</div><div class='hunk'>@@ -137,7 +139,7 @@ static int link_status(struct xircom_private *card);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static DEFINE_PCI_DEVICE_TABLE(xircom_pci_table) = {</div><div class='del'>-	{0x115D, 0x0003, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='add'>+	{ PCI_VDEVICE(XIRCOM, 0x0003), },</div><div class='ctx'> 	{0,},</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, xircom_pci_table);</div><div class='hunk'>@@ -146,9 +148,7 @@ static struct pci_driver xircom_ops = {</div><div class='ctx'> 	.name		= "xircom_cb",</div><div class='ctx'> 	.id_table	= xircom_pci_table,</div><div class='ctx'> 	.probe		= xircom_probe,</div><div class='del'>-	.remove		= xircom_remove,</div><div class='del'>-	.suspend =NULL,</div><div class='del'>-	.resume =NULL</div><div class='add'>+	.remove		= __devexit_p(xircom_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -192,15 +192,18 @@ static const struct net_device_ops netdev_ops = {</div><div class='ctx'>  */</div><div class='ctx'> static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> {</div><div class='add'>+	struct device *d = &amp;pdev-&gt;dev;</div><div class='ctx'> 	struct net_device *dev = NULL;</div><div class='ctx'> 	struct xircom_private *private;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	unsigned short tmp16;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	/* First do the PCI initialisation */</div><div class='ctx'> </div><div class='del'>-	if (pci_enable_device(pdev))</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	rc = pci_enable_device(pdev);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/* disable all powermanagement */</div><div class='ctx'> 	pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000);</div><div class='hunk'>@@ -211,11 +214,13 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_</div><div class='ctx'> 	pci_read_config_word (pdev,PCI_STATUS, &amp;tmp16);</div><div class='ctx'> 	pci_write_config_word (pdev, PCI_STATUS,tmp16);</div><div class='ctx'> </div><div class='del'>-	if (!request_region(pci_resource_start(pdev, 0), 128, "xircom_cb")) {</div><div class='add'>+	rc = pci_request_regions(pdev, "xircom_cb");</div><div class='add'>+	if (rc &lt; 0) {</div><div class='ctx'> 		pr_err("%s: failed to allocate io-region\n", __func__);</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		goto err_disable;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	rc = -ENOMEM;</div><div class='ctx'> 	/*</div><div class='ctx'> 	   Before changing the hardware, allocate the memory.</div><div class='ctx'> 	   This way, we can fail gracefully if not enough memory</div><div class='hunk'>@@ -223,17 +228,21 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_</div><div class='ctx'> 	 */</div><div class='ctx'> 	dev = alloc_etherdev(sizeof(struct xircom_private));</div><div class='ctx'> 	if (!dev)</div><div class='del'>-		goto device_fail;</div><div class='add'>+		goto err_release;</div><div class='ctx'> </div><div class='ctx'> 	private = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate the send/receive buffers */</div><div class='del'>-	private-&gt;rx_buffer = pci_alloc_consistent(pdev,8192,&amp;private-&gt;rx_dma_handle);</div><div class='add'>+	private-&gt;rx_buffer = dma_alloc_coherent(d, 8192,</div><div class='add'>+						&amp;private-&gt;rx_dma_handle,</div><div class='add'>+						GFP_KERNEL);</div><div class='ctx'> 	if (private-&gt;rx_buffer == NULL) {</div><div class='ctx'> 		pr_err("%s: no memory for rx buffer\n", __func__);</div><div class='ctx'> 		goto rx_buf_fail;</div><div class='ctx'> 	}</div><div class='del'>-	private-&gt;tx_buffer = pci_alloc_consistent(pdev,8192,&amp;private-&gt;tx_dma_handle);</div><div class='add'>+	private-&gt;tx_buffer = dma_alloc_coherent(d, 8192,</div><div class='add'>+						&amp;private-&gt;tx_dma_handle,</div><div class='add'>+						GFP_KERNEL);</div><div class='ctx'> 	if (private-&gt;tx_buffer == NULL) {</div><div class='ctx'> 		pr_err("%s: no memory for tx buffer\n", __func__);</div><div class='ctx'> 		goto tx_buf_fail;</div><div class='hunk'>@@ -244,10 +253,13 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_</div><div class='ctx'> </div><div class='ctx'> 	private-&gt;dev = dev;</div><div class='ctx'> 	private-&gt;pdev = pdev;</div><div class='del'>-	private-&gt;io_port = pci_resource_start(pdev, 0);</div><div class='add'>+</div><div class='add'>+	/* IO range. */</div><div class='add'>+	private-&gt;ioaddr = pci_iomap(pdev, 0, 0);</div><div class='add'>+	if (!private-&gt;ioaddr)</div><div class='add'>+		goto reg_fail;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_init(&amp;private-&gt;lock);</div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-	dev-&gt;base_addr = private-&gt;io_port;</div><div class='ctx'> </div><div class='ctx'> 	initialize_card(private);</div><div class='ctx'> 	read_mac_address(private);</div><div class='hunk'>@@ -256,9 +268,10 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;netdev_ops;</div><div class='ctx'> 	pci_set_drvdata(pdev, dev);</div><div class='ctx'> </div><div class='del'>-	if (register_netdev(dev)) {</div><div class='add'>+	rc = register_netdev(dev);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='ctx'> 		pr_err("%s: netdevice registration failed\n", __func__);</div><div class='del'>-		goto reg_fail;</div><div class='add'>+		goto err_unmap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(dev, "Xircom cardbus revision %i at irq %i\n",</div><div class='hunk'>@@ -273,17 +286,23 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;private-&gt;lock,flags);</div><div class='ctx'> </div><div class='ctx'> 	trigger_receive(private);</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='add'>+err_unmap:</div><div class='add'>+	pci_iounmap(pdev, private-&gt;ioaddr);</div><div class='ctx'> reg_fail:</div><div class='del'>-	kfree(private-&gt;tx_buffer);</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+	dma_free_coherent(d, 8192, private-&gt;tx_buffer, private-&gt;tx_dma_handle);</div><div class='ctx'> tx_buf_fail:</div><div class='del'>-	kfree(private-&gt;rx_buffer);</div><div class='add'>+	dma_free_coherent(d, 8192, private-&gt;rx_buffer, private-&gt;rx_dma_handle);</div><div class='ctx'> rx_buf_fail:</div><div class='ctx'> 	free_netdev(dev);</div><div class='del'>-device_fail:</div><div class='del'>-	return -ENODEV;</div><div class='add'>+err_release:</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+err_disable:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -297,25 +316,28 @@ static void __devexit xircom_remove(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct xircom_private *card = netdev_priv(dev);</div><div class='add'>+	struct device *d = &amp;pdev-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	pci_free_consistent(pdev,8192,card-&gt;rx_buffer,card-&gt;rx_dma_handle);</div><div class='del'>-	pci_free_consistent(pdev,8192,card-&gt;tx_buffer,card-&gt;tx_dma_handle);</div><div class='del'>-</div><div class='del'>-	release_region(dev-&gt;base_addr, 128);</div><div class='ctx'> 	unregister_netdev(dev);</div><div class='del'>-	free_netdev(dev);</div><div class='add'>+	pci_iounmap(pdev, card-&gt;ioaddr);</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='add'>+	dma_free_coherent(d, 8192, card-&gt;tx_buffer, card-&gt;tx_dma_handle);</div><div class='add'>+	dma_free_coherent(d, 8192, card-&gt;rx_buffer, card-&gt;rx_dma_handle);</div><div class='add'>+	free_netdev(dev);</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t xircom_interrupt(int irq, void *dev_instance)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = (struct net_device *) dev_instance;</div><div class='ctx'> 	struct xircom_private *card = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned int status;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;card-&gt;lock);</div><div class='del'>-	status = inl(card-&gt;io_port+CSR5);</div><div class='add'>+	status = xr32(CSR5);</div><div class='ctx'> </div><div class='ctx'> #if defined DEBUG &amp;&amp; DEBUG &gt; 1</div><div class='ctx'> 	print_binary(status);</div><div class='hunk'>@@ -345,7 +367,7 @@ static irqreturn_t xircom_interrupt(int irq, void *dev_instance)</div><div class='ctx'> 	/* Clear all remaining interrupts */</div><div class='ctx'> 	status |= 0xffffffff; /* FIXME: make this clear only the</div><div class='ctx'> 				        real existing bits */</div><div class='del'>-	outl(status,card-&gt;io_port+CSR5);</div><div class='add'>+	xw32(CSR5, status);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	for (i=0;i&lt;NUMDESCRIPTORS;i++)</div><div class='hunk'>@@ -423,11 +445,11 @@ static netdev_tx_t xircom_start_xmit(struct sk_buff *skb,</div><div class='ctx'> static int xircom_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xircom_private *xp = netdev_priv(dev);</div><div class='add'>+	const int irq = xp-&gt;pdev-&gt;irq;</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='del'>-	netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n",</div><div class='del'>-		    dev-&gt;irq);</div><div class='del'>-	retval = request_irq(dev-&gt;irq, xircom_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n", irq);</div><div class='add'>+	retval = request_irq(irq, xircom_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='ctx'> 	if (retval)</div><div class='ctx'> 		return retval;</div><div class='ctx'> </div><div class='hunk'>@@ -459,7 +481,7 @@ static int xircom_close(struct net_device *dev)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;card-&gt;lock,flags);</div><div class='ctx'> </div><div class='ctx'> 	card-&gt;open = 0;</div><div class='del'>-	free_irq(dev-&gt;irq,dev);</div><div class='add'>+	free_irq(card-&gt;pdev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -469,35 +491,39 @@ static int xircom_close(struct net_device *dev)</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> static void xircom_poll_controller(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='del'>-	xircom_interrupt(dev-&gt;irq, dev);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	struct xircom_private *xp = netdev_priv(dev);</div><div class='add'>+	const int irq = xp-&gt;pdev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	disable_irq(irq);</div><div class='add'>+	xircom_interrupt(irq, dev);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static void initialize_card(struct xircom_private *card)</div><div class='ctx'> {</div><div class='del'>-	unsigned int val;</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* First: reset the card */</div><div class='del'>-	val = inl(card-&gt;io_port + CSR0);</div><div class='add'>+	val = xr32(CSR0);</div><div class='ctx'> 	val |= 0x01;		/* Software reset */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR0);</div><div class='add'>+	xw32(CSR0, val);</div><div class='ctx'> </div><div class='ctx'> 	udelay(100);		/* give the card some time to reset */</div><div class='ctx'> </div><div class='del'>-	val = inl(card-&gt;io_port + CSR0);</div><div class='add'>+	val = xr32(CSR0);</div><div class='ctx'> 	val &amp;= ~0x01;		/* disable Software reset */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR0);</div><div class='add'>+	xw32(CSR0, val);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	val = 0;		/* Value 0x00 is a safe and conservative value</div><div class='ctx'> 				   for the PCI configuration settings */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR0);</div><div class='add'>+	xw32(CSR0, val);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	disable_all_interrupts(card);</div><div class='hunk'>@@ -515,10 +541,9 @@ ignored; I chose zero.</div><div class='ctx'> */</div><div class='ctx'> static void trigger_transmit(struct xircom_private *card)</div><div class='ctx'> {</div><div class='del'>-	unsigned int val;</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> </div><div class='del'>-	val = 0;</div><div class='del'>-	outl(val, card-&gt;io_port + CSR1);</div><div class='add'>+	xw32(CSR1, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -530,10 +555,9 @@ ignored; I chose zero.</div><div class='ctx'> */</div><div class='ctx'> static void trigger_receive(struct xircom_private *card)</div><div class='ctx'> {</div><div class='del'>-	unsigned int val;</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> </div><div class='del'>-	val = 0;</div><div class='del'>-	outl(val, card-&gt;io_port + CSR2);</div><div class='add'>+	xw32(CSR2, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -542,6 +566,7 @@ descriptors and programs the addresses into the card.</div><div class='ctx'> */</div><div class='ctx'> static void setup_descriptors(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	u32 address;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -571,7 +596,7 @@ static void setup_descriptors(struct xircom_private *card)</div><div class='ctx'> 	wmb();</div><div class='ctx'> 	/* Write the receive descriptor ring address to the card */</div><div class='ctx'> 	address = card-&gt;rx_dma_handle;</div><div class='del'>-	outl(address, card-&gt;io_port + CSR3);	/* Receive descr list address */</div><div class='add'>+	xw32(CSR3, address);	/* Receive descr list address */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/* transmit descriptors */</div><div class='hunk'>@@ -596,7 +621,7 @@ static void setup_descriptors(struct xircom_private *card)</div><div class='ctx'> 	wmb();</div><div class='ctx'> 	/* wite the transmit descriptor ring to the card */</div><div class='ctx'> 	address = card-&gt;tx_dma_handle;</div><div class='del'>-	outl(address, card-&gt;io_port + CSR4);	/* xmit descr list address */</div><div class='add'>+	xw32(CSR4, address);	/* xmit descr list address */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -605,11 +630,12 @@ valid by setting the address in the card to 0x00.</div><div class='ctx'> */</div><div class='ctx'> static void remove_descriptors(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='ctx'> 	val = 0;</div><div class='del'>-	outl(val, card-&gt;io_port + CSR3);	/* Receive descriptor address */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR4);	/* Send descriptor address */</div><div class='add'>+	xw32(CSR3, val);	/* Receive descriptor address */</div><div class='add'>+	xw32(CSR4, val);	/* Send descriptor address */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -620,17 +646,17 @@ This function also clears the status-bit.</div><div class='ctx'> */</div><div class='ctx'> static int link_status_changed(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	val = inl(card-&gt;io_port + CSR5);	/* Status register */</div><div class='del'>-</div><div class='del'>-	if ((val &amp; (1 &lt;&lt; 27)) == 0)		/* no change */</div><div class='add'>+	val = xr32(CSR5);	/* Status register */</div><div class='add'>+	if (!(val &amp; (1 &lt;&lt; 27)))	/* no change */</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* clear the event by writing a 1 to the bit in the</div><div class='ctx'> 	   status register. */</div><div class='ctx'> 	val = (1 &lt;&lt; 27);</div><div class='del'>-	outl(val, card-&gt;io_port + CSR5);</div><div class='add'>+	xw32(CSR5, val);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -642,11 +668,9 @@ in a non-stopped state.</div><div class='ctx'> */</div><div class='ctx'> static int transmit_active(struct xircom_private *card)</div><div class='ctx'> {</div><div class='del'>-	unsigned int val;</div><div class='del'>-</div><div class='del'>-	val = inl(card-&gt;io_port + CSR5);	/* Status register */</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> </div><div class='del'>-	if ((val &amp; (7 &lt;&lt; 20)) == 0)		/* transmitter disabled */</div><div class='add'>+	if (!(xr32(CSR5) &amp; (7 &lt;&lt; 20)))	/* transmitter disabled */</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -658,11 +682,9 @@ in a non-stopped state.</div><div class='ctx'> */</div><div class='ctx'> static int receive_active(struct xircom_private *card)</div><div class='ctx'> {</div><div class='del'>-	unsigned int val;</div><div class='del'>-</div><div class='del'>-	val = inl(card-&gt;io_port + CSR5);	/* Status register */</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> </div><div class='del'>-	if ((val &amp; (7 &lt;&lt; 17)) == 0)		/* receiver disabled */</div><div class='add'>+	if (!(xr32(CSR5) &amp; (7 &lt;&lt; 17)))	/* receiver disabled */</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -680,10 +702,11 @@ must be called with the lock held and interrupts disabled.</div><div class='ctx'> */</div><div class='ctx'> static void activate_receiver(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> 	int counter;</div><div class='ctx'> </div><div class='del'>-	val = inl(card-&gt;io_port + CSR6);	/* Operation mode */</div><div class='add'>+	val = xr32(CSR6);	/* Operation mode */</div><div class='ctx'> </div><div class='ctx'> 	/* If the "active" bit is set and the receiver is already</div><div class='ctx'> 	   active, no need to do the expensive thing */</div><div class='hunk'>@@ -692,7 +715,7 @@ static void activate_receiver(struct xircom_private *card)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	val = val &amp; ~2;		/* disable the receiver */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR6);</div><div class='add'>+	xw32(CSR6, val);</div><div class='ctx'> </div><div class='ctx'> 	counter = 10;</div><div class='ctx'> 	while (counter &gt; 0) {</div><div class='hunk'>@@ -706,9 +729,9 @@ static void activate_receiver(struct xircom_private *card)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* enable the receiver */</div><div class='del'>-	val = inl(card-&gt;io_port + CSR6);	/* Operation mode */</div><div class='del'>-	val = val | 2;				/* enable the receiver */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR6);</div><div class='add'>+	val = xr32(CSR6);	/* Operation mode */</div><div class='add'>+	val = val | 2;		/* enable the receiver */</div><div class='add'>+	xw32(CSR6, val);</div><div class='ctx'> </div><div class='ctx'> 	/* now wait for the card to activate again */</div><div class='ctx'> 	counter = 10;</div><div class='hunk'>@@ -733,12 +756,13 @@ must be called with the lock held and interrupts disabled.</div><div class='ctx'> */</div><div class='ctx'> static void deactivate_receiver(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> 	int counter;</div><div class='ctx'> </div><div class='del'>-	val = inl(card-&gt;io_port + CSR6);	/* Operation mode */</div><div class='del'>-	val = val &amp; ~2;				/* disable the receiver */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR6);</div><div class='add'>+	val = xr32(CSR6);	/* Operation mode */</div><div class='add'>+	val = val &amp; ~2;		/* disable the receiver */</div><div class='add'>+	xw32(CSR6, val);</div><div class='ctx'> </div><div class='ctx'> 	counter = 10;</div><div class='ctx'> 	while (counter &gt; 0) {</div><div class='hunk'>@@ -765,10 +789,11 @@ must be called with the lock held and interrupts disabled.</div><div class='ctx'> */</div><div class='ctx'> static void activate_transmitter(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> 	int counter;</div><div class='ctx'> </div><div class='del'>-	val = inl(card-&gt;io_port + CSR6);	/* Operation mode */</div><div class='add'>+	val = xr32(CSR6);	/* Operation mode */</div><div class='ctx'> </div><div class='ctx'> 	/* If the "active" bit is set and the receiver is already</div><div class='ctx'> 	   active, no need to do the expensive thing */</div><div class='hunk'>@@ -776,7 +801,7 @@ static void activate_transmitter(struct xircom_private *card)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	val = val &amp; ~(1 &lt;&lt; 13);	/* disable the transmitter */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR6);</div><div class='add'>+	xw32(CSR6, val);</div><div class='ctx'> </div><div class='ctx'> 	counter = 10;</div><div class='ctx'> 	while (counter &gt; 0) {</div><div class='hunk'>@@ -791,9 +816,9 @@ static void activate_transmitter(struct xircom_private *card)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* enable the transmitter */</div><div class='del'>-	val = inl(card-&gt;io_port + CSR6);	/* Operation mode */</div><div class='add'>+	val = xr32(CSR6);	/* Operation mode */</div><div class='ctx'> 	val = val | (1 &lt;&lt; 13);	/* enable the transmitter */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR6);</div><div class='add'>+	xw32(CSR6, val);</div><div class='ctx'> </div><div class='ctx'> 	/* now wait for the card to activate again */</div><div class='ctx'> 	counter = 10;</div><div class='hunk'>@@ -818,12 +843,13 @@ must be called with the lock held and interrupts disabled.</div><div class='ctx'> */</div><div class='ctx'> static void deactivate_transmitter(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> 	int counter;</div><div class='ctx'> </div><div class='del'>-	val = inl(card-&gt;io_port + CSR6);	/* Operation mode */</div><div class='add'>+	val = xr32(CSR6);	/* Operation mode */</div><div class='ctx'> 	val = val &amp; ~2;		/* disable the transmitter */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR6);</div><div class='add'>+	xw32(CSR6, val);</div><div class='ctx'> </div><div class='ctx'> 	counter = 20;</div><div class='ctx'> 	while (counter &gt; 0) {</div><div class='hunk'>@@ -846,11 +872,12 @@ must be called with the lock held and interrupts disabled.</div><div class='ctx'> */</div><div class='ctx'> static void enable_transmit_interrupt(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	val = inl(card-&gt;io_port + CSR7);	/* Interrupt enable register */</div><div class='del'>-	val |= 1;				/* enable the transmit interrupt */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR7);</div><div class='add'>+	val = xr32(CSR7);	/* Interrupt enable register */</div><div class='add'>+	val |= 1;		/* enable the transmit interrupt */</div><div class='add'>+	xw32(CSR7, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -861,11 +888,12 @@ must be called with the lock held and interrupts disabled.</div><div class='ctx'> */</div><div class='ctx'> static void enable_receive_interrupt(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	val = inl(card-&gt;io_port + CSR7);	/* Interrupt enable register */</div><div class='del'>-	val = val | (1 &lt;&lt; 6);			/* enable the receive interrupt */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR7);</div><div class='add'>+	val = xr32(CSR7);	/* Interrupt enable register */</div><div class='add'>+	val = val | (1 &lt;&lt; 6);	/* enable the receive interrupt */</div><div class='add'>+	xw32(CSR7, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -875,11 +903,12 @@ must be called with the lock held and interrupts disabled.</div><div class='ctx'> */</div><div class='ctx'> static void enable_link_interrupt(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	val = inl(card-&gt;io_port + CSR7);	/* Interrupt enable register */</div><div class='del'>-	val = val | (1 &lt;&lt; 27);			/* enable the link status chage interrupt */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR7);</div><div class='add'>+	val = xr32(CSR7);	/* Interrupt enable register */</div><div class='add'>+	val = val | (1 &lt;&lt; 27);	/* enable the link status chage interrupt */</div><div class='add'>+	xw32(CSR7, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -891,10 +920,9 @@ must be called with the lock held and interrupts disabled.</div><div class='ctx'> */</div><div class='ctx'> static void disable_all_interrupts(struct xircom_private *card)</div><div class='ctx'> {</div><div class='del'>-	unsigned int val;</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> </div><div class='del'>-	val = 0;				/* disable all interrupts */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR7);</div><div class='add'>+	xw32(CSR7, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -904,9 +932,10 @@ must be called with the lock held and interrupts disabled.</div><div class='ctx'> */</div><div class='ctx'> static void enable_common_interrupts(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	val = inl(card-&gt;io_port + CSR7);	/* Interrupt enable register */</div><div class='add'>+	val = xr32(CSR7);	/* Interrupt enable register */</div><div class='ctx'> 	val |= (1&lt;&lt;16); /* Normal Interrupt Summary */</div><div class='ctx'> 	val |= (1&lt;&lt;15); /* Abnormal Interrupt Summary */</div><div class='ctx'> 	val |= (1&lt;&lt;13); /* Fatal bus error */</div><div class='hunk'>@@ -915,7 +944,7 @@ static void enable_common_interrupts(struct xircom_private *card)</div><div class='ctx'> 	val |= (1&lt;&lt;5);  /* Transmit Underflow */</div><div class='ctx'> 	val |= (1&lt;&lt;2);  /* Transmit Buffer Unavailable */</div><div class='ctx'> 	val |= (1&lt;&lt;1);  /* Transmit Process Stopped */</div><div class='del'>-	outl(val, card-&gt;io_port + CSR7);</div><div class='add'>+	xw32(CSR7, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -925,11 +954,12 @@ must be called with the lock held and interrupts disabled.</div><div class='ctx'> */</div><div class='ctx'> static int enable_promisc(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	val = inl(card-&gt;io_port + CSR6);</div><div class='add'>+	val = xr32(CSR6);</div><div class='ctx'> 	val = val | (1 &lt;&lt; 6);</div><div class='del'>-	outl(val, card-&gt;io_port + CSR6);</div><div class='add'>+	xw32(CSR6, val);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -944,13 +974,16 @@ Must be called in locked state with interrupts disabled</div><div class='ctx'> */</div><div class='ctx'> static int link_status(struct xircom_private *card)</div><div class='ctx'> {</div><div class='del'>-	unsigned int val;</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='add'>+	u8 val;</div><div class='ctx'> </div><div class='del'>-	val = inb(card-&gt;io_port + CSR12);</div><div class='add'>+	val = xr8(CSR12);</div><div class='ctx'> </div><div class='del'>-	if (!(val&amp;(1&lt;&lt;2)))  /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */</div><div class='add'>+	/* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */</div><div class='add'>+	if (!(val &amp; (1 &lt;&lt; 2)))</div><div class='ctx'> 		return 10;</div><div class='del'>-	if (!(val&amp;(1&lt;&lt;1)))  /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */</div><div class='add'>+	/* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */</div><div class='add'>+	if (!(val &amp; (1 &lt;&lt; 1)))</div><div class='ctx'> 		return 100;</div><div class='ctx'> </div><div class='ctx'> 	/* If we get here -&gt; no link at all */</div><div class='hunk'>@@ -969,29 +1002,31 @@ static int link_status(struct xircom_private *card)</div><div class='ctx'>  */</div><div class='ctx'> static void read_mac_address(struct xircom_private *card)</div><div class='ctx'> {</div><div class='del'>-	unsigned char j, tuple, link, data_id, data_count;</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	u8 link;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	outl(1 &lt;&lt; 12, card-&gt;io_port + CSR9);	/* enable boot rom access */</div><div class='add'>+	xw32(CSR9, 1 &lt;&lt; 12);	/* enable boot rom access */</div><div class='ctx'> 	for (i = 0x100; i &lt; 0x1f7; i += link + 2) {</div><div class='del'>-		outl(i, card-&gt;io_port + CSR10);</div><div class='del'>-		tuple = inl(card-&gt;io_port + CSR9) &amp; 0xff;</div><div class='del'>-		outl(i + 1, card-&gt;io_port + CSR10);</div><div class='del'>-		link = inl(card-&gt;io_port + CSR9) &amp; 0xff;</div><div class='del'>-		outl(i + 2, card-&gt;io_port + CSR10);</div><div class='del'>-		data_id = inl(card-&gt;io_port + CSR9) &amp; 0xff;</div><div class='del'>-		outl(i + 3, card-&gt;io_port + CSR10);</div><div class='del'>-		data_count = inl(card-&gt;io_port + CSR9) &amp; 0xff;</div><div class='add'>+		u8 tuple, data_id, data_count;</div><div class='add'>+</div><div class='add'>+		xw32(CSR10, i);</div><div class='add'>+		tuple = xr32(CSR9);</div><div class='add'>+		xw32(CSR10, i + 1);</div><div class='add'>+		link = xr32(CSR9);</div><div class='add'>+		xw32(CSR10, i + 2);</div><div class='add'>+		data_id = xr32(CSR9);</div><div class='add'>+		xw32(CSR10, i + 3);</div><div class='add'>+		data_count = xr32(CSR9);</div><div class='ctx'> 		if ((tuple == 0x22) &amp;&amp; (data_id == 0x04) &amp;&amp; (data_count == 0x06)) {</div><div class='del'>-			/*</div><div class='del'>-			 * This is it.  We have the data we want.</div><div class='del'>-			 */</div><div class='add'>+			int j;</div><div class='add'>+</div><div class='ctx'> 			for (j = 0; j &lt; 6; j++) {</div><div class='del'>-				outl(i + j + 4, card-&gt;io_port + CSR10);</div><div class='del'>-				card-&gt;dev-&gt;dev_addr[j] = inl(card-&gt;io_port + CSR9) &amp; 0xff;</div><div class='add'>+				xw32(CSR10, i + j + 4);</div><div class='add'>+				card-&gt;dev-&gt;dev_addr[j] = xr32(CSR9) &amp; 0xff;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		} else if (link == 0) {</div><div class='hunk'>@@ -1010,6 +1045,7 @@ static void read_mac_address(struct xircom_private *card)</div><div class='ctx'>  */</div><div class='ctx'> static void transceiver_voodoo(struct xircom_private *card)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = card-&gt;ioaddr;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	/* disable all powermanagement */</div><div class='hunk'>@@ -1019,14 +1055,14 @@ static void transceiver_voodoo(struct xircom_private *card)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	outl(0x0008, card-&gt;io_port + CSR15);</div><div class='del'>-        udelay(25);</div><div class='del'>-        outl(0xa8050000, card-&gt;io_port + CSR15);</div><div class='del'>-        udelay(25);</div><div class='del'>-        outl(0xa00f0000, card-&gt;io_port + CSR15);</div><div class='del'>-        udelay(25);</div><div class='add'>+	xw32(CSR15, 0x0008);</div><div class='add'>+	udelay(25);</div><div class='add'>+	xw32(CSR15, 0xa8050000);</div><div class='add'>+	udelay(25);</div><div class='add'>+	xw32(CSR15, 0xa00f0000);</div><div class='add'>+	udelay(25);</div><div class='ctx'> </div><div class='del'>-        spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	netif_start_queue(card-&gt;dev);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/dlink/dl2k.c b/drivers/net/ethernet/dlink/dl2k.c<br/>index b2dc2c81a147..a059f0c27e28 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/dlink/dl2k.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/dlink/dl2k.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/dlink/dl2k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dlink/dl2k.c</a></div><div class='hunk'>@@ -16,6 +16,13 @@</div><div class='ctx'> #include "dl2k.h"</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> </div><div class='add'>+#define dw32(reg, val)	iowrite32(val, ioaddr + (reg))</div><div class='add'>+#define dw16(reg, val)	iowrite16(val, ioaddr + (reg))</div><div class='add'>+#define dw8(reg, val)	iowrite8(val, ioaddr + (reg))</div><div class='add'>+#define dr32(reg)	ioread32(ioaddr + (reg))</div><div class='add'>+#define dr16(reg)	ioread16(ioaddr + (reg))</div><div class='add'>+#define dr8(reg)	ioread8(ioaddr + (reg))</div><div class='add'>+</div><div class='ctx'> static char version[] __devinitdata =</div><div class='ctx'>       KERN_INFO DRV_NAME " " DRV_VERSION " " DRV_RELDATE "\n";</div><div class='ctx'> #define MAX_UNITS 8</div><div class='hunk'>@@ -49,8 +56,13 @@ module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */</div><div class='ctx'> /* Enable the default interrupts */</div><div class='ctx'> #define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \</div><div class='ctx'>        UpdateStats | LinkEvent)</div><div class='del'>-#define EnableInt() \</div><div class='del'>-writew(DEFAULT_INTR, ioaddr + IntEnable)</div><div class='add'>+</div><div class='add'>+static void dl2k_enable_int(struct netdev_private *np)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='add'>+</div><div class='add'>+	dw16(IntEnable, DEFAULT_INTR);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static const int max_intrloop = 50;</div><div class='ctx'> static const int multicast_filter_limit = 0x40;</div><div class='hunk'>@@ -73,7 +85,7 @@ static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);</div><div class='ctx'> static int rio_close (struct net_device *dev);</div><div class='ctx'> static int find_miiphy (struct net_device *dev);</div><div class='ctx'> static int parse_eeprom (struct net_device *dev);</div><div class='del'>-static int read_eeprom (long ioaddr, int eep_addr);</div><div class='add'>+static int read_eeprom (struct netdev_private *, int eep_addr);</div><div class='ctx'> static int mii_wait_link (struct net_device *dev, int wait);</div><div class='ctx'> static int mii_set_media (struct net_device *dev);</div><div class='ctx'> static int mii_get_media (struct net_device *dev);</div><div class='hunk'>@@ -106,7 +118,7 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	static int card_idx;</div><div class='ctx'> 	int chip_idx = ent-&gt;driver_data;</div><div class='ctx'> 	int err, irq;</div><div class='del'>-	long ioaddr;</div><div class='add'>+	void __iomem *ioaddr;</div><div class='ctx'> 	static int version_printed;</div><div class='ctx'> 	void *ring_space;</div><div class='ctx'> 	dma_addr_t ring_dma;</div><div class='hunk'>@@ -124,26 +136,29 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto err_out_disable;</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master (pdev);</div><div class='add'>+</div><div class='add'>+	err = -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	dev = alloc_etherdev (sizeof (*np));</div><div class='del'>-	if (!dev) {</div><div class='del'>-		err = -ENOMEM;</div><div class='add'>+	if (!dev)</div><div class='ctx'> 		goto err_out_res;</div><div class='del'>-	}</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-#ifdef MEM_MAPPING</div><div class='del'>-	ioaddr = pci_resource_start (pdev, 1);</div><div class='del'>-	ioaddr = (long) ioremap (ioaddr, RIO_IO_SIZE);</div><div class='del'>-	if (!ioaddr) {</div><div class='del'>-		err = -ENOMEM;</div><div class='add'>+	np = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	/* IO registers range. */</div><div class='add'>+	ioaddr = pci_iomap(pdev, 0, 0);</div><div class='add'>+	if (!ioaddr)</div><div class='ctx'> 		goto err_out_dev;</div><div class='del'>-	}</div><div class='del'>-#else</div><div class='del'>-	ioaddr = pci_resource_start (pdev, 0);</div><div class='add'>+	np-&gt;eeprom_addr = ioaddr;</div><div class='add'>+</div><div class='add'>+#ifdef MEM_MAPPING</div><div class='add'>+	/* MM registers range. */</div><div class='add'>+	ioaddr = pci_iomap(pdev, 1, 0);</div><div class='add'>+	if (!ioaddr)</div><div class='add'>+		goto err_out_iounmap;</div><div class='ctx'> #endif</div><div class='del'>-	dev-&gt;base_addr = ioaddr;</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-	np = netdev_priv(dev);</div><div class='add'>+	np-&gt;ioaddr = ioaddr;</div><div class='ctx'> 	np-&gt;chip_id = chip_idx;</div><div class='ctx'> 	np-&gt;pdev = pdev;</div><div class='ctx'> 	spin_lock_init (&amp;np-&gt;tx_lock);</div><div class='hunk'>@@ -239,7 +254,7 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto err_out_unmap_rx;</div><div class='ctx'> </div><div class='ctx'> 	/* Fiber device? */</div><div class='del'>-	np-&gt;phy_media = (readw(ioaddr + ASICCtrl) &amp; PhyMedia) ? 1 : 0;</div><div class='add'>+	np-&gt;phy_media = (dr16(ASICCtrl) &amp; PhyMedia) ? 1 : 0;</div><div class='ctx'> 	np-&gt;link_status = 0;</div><div class='ctx'> 	/* Set media and reset PHY */</div><div class='ctx'> 	if (np-&gt;phy_media) {</div><div class='hunk'>@@ -276,22 +291,20 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		printk(KERN_INFO "vlan(id):\t%d\n", np-&gt;vlan);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-      err_out_unmap_rx:</div><div class='add'>+err_out_unmap_rx:</div><div class='ctx'> 	pci_free_consistent (pdev, RX_TOTAL_SIZE, np-&gt;rx_ring, np-&gt;rx_ring_dma);</div><div class='del'>-      err_out_unmap_tx:</div><div class='add'>+err_out_unmap_tx:</div><div class='ctx'> 	pci_free_consistent (pdev, TX_TOTAL_SIZE, np-&gt;tx_ring, np-&gt;tx_ring_dma);</div><div class='del'>-      err_out_iounmap:</div><div class='add'>+err_out_iounmap:</div><div class='ctx'> #ifdef MEM_MAPPING</div><div class='del'>-	iounmap ((void *) ioaddr);</div><div class='del'>-</div><div class='del'>-      err_out_dev:</div><div class='add'>+	pci_iounmap(pdev, np-&gt;ioaddr);</div><div class='ctx'> #endif</div><div class='add'>+	pci_iounmap(pdev, np-&gt;eeprom_addr);</div><div class='add'>+err_out_dev:</div><div class='ctx'> 	free_netdev (dev);</div><div class='del'>-</div><div class='del'>-      err_out_res:</div><div class='add'>+err_out_res:</div><div class='ctx'> 	pci_release_regions (pdev);</div><div class='del'>-</div><div class='del'>-      err_out_disable:</div><div class='add'>+err_out_disable:</div><div class='ctx'> 	pci_disable_device (pdev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -299,11 +312,9 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> static int</div><div class='ctx'> find_miiphy (struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	int i, phy_found = 0;</div><div class='del'>-	struct netdev_private *np;</div><div class='del'>-	long ioaddr;</div><div class='ctx'> 	np = netdev_priv(dev);</div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	np-&gt;phy_addr = 1;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 31; i &gt;= 0; i--) {</div><div class='hunk'>@@ -323,26 +334,19 @@ find_miiphy (struct net_device *dev)</div><div class='ctx'> static int</div><div class='ctx'> parse_eeprom (struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='ctx'> 	int i, j;</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	u8 sromdata[256];</div><div class='ctx'> 	u8 *psib;</div><div class='ctx'> 	u32 crc;</div><div class='ctx'> 	PSROM_t psrom = (PSROM_t) sromdata;</div><div class='del'>-	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	int cid, next;</div><div class='ctx'> </div><div class='del'>-#ifdef	MEM_MAPPING</div><div class='del'>-	ioaddr = pci_resource_start (np-&gt;pdev, 0);</div><div class='del'>-#endif</div><div class='del'>-	/* Read eeprom */</div><div class='del'>-	for (i = 0; i &lt; 128; i++) {</div><div class='del'>-		((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom (ioaddr, i));</div><div class='del'>-	}</div><div class='del'>-#ifdef	MEM_MAPPING</div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='del'>-#endif</div><div class='add'>+	for (i = 0; i &lt; 128; i++)</div><div class='add'>+		((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom(np, i));</div><div class='add'>+</div><div class='ctx'> 	if (np-&gt;pdev-&gt;vendor == PCI_VENDOR_ID_DLINK) {	/* D-Link Only */</div><div class='ctx'> 		/* Check CRC */</div><div class='ctx'> 		crc = ~ether_crc_le (256 - 4, sromdata);</div><div class='hunk'>@@ -378,8 +382,7 @@ parse_eeprom (struct net_device *dev)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		case 2:	/* Duplex Polarity */</div><div class='ctx'> 			np-&gt;duplex_polarity = psib[i];</div><div class='del'>-			writeb (readb (ioaddr + PhyCtrl) | psib[i],</div><div class='del'>-				ioaddr + PhyCtrl);</div><div class='add'>+			dw8(PhyCtrl, dr8(PhyCtrl) | psib[i]);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 3:	/* Wake Polarity */</div><div class='ctx'> 			np-&gt;wake_polarity = psib[i];</div><div class='hunk'>@@ -407,59 +410,57 @@ static int</div><div class='ctx'> rio_open (struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='add'>+	const int irq = np-&gt;pdev-&gt;irq;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u16 macctrl;</div><div class='ctx'> </div><div class='del'>-	i = request_irq (dev-&gt;irq, rio_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	i = request_irq(irq, rio_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='ctx'> 	if (i)</div><div class='ctx'> 		return i;</div><div class='ctx'> </div><div class='ctx'> 	/* Reset all logic functions */</div><div class='del'>-	writew (GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset,</div><div class='del'>-		ioaddr + ASICCtrl + 2);</div><div class='add'>+	dw16(ASICCtrl + 2,</div><div class='add'>+	     GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset);</div><div class='ctx'> 	mdelay(10);</div><div class='ctx'> </div><div class='ctx'> 	/* DebugCtrl bit 4, 5, 9 must set */</div><div class='del'>-	writel (readl (ioaddr + DebugCtrl) | 0x0230, ioaddr + DebugCtrl);</div><div class='add'>+	dw32(DebugCtrl, dr32(DebugCtrl) | 0x0230);</div><div class='ctx'> </div><div class='ctx'> 	/* Jumbo frame */</div><div class='ctx'> 	if (np-&gt;jumbo != 0)</div><div class='del'>-		writew (MAX_JUMBO+14, ioaddr + MaxFrameSize);</div><div class='add'>+		dw16(MaxFrameSize, MAX_JUMBO+14);</div><div class='ctx'> </div><div class='ctx'> 	alloc_list (dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Get station address */</div><div class='ctx'> 	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		writeb (dev-&gt;dev_addr[i], ioaddr + StationAddr0 + i);</div><div class='add'>+		dw8(StationAddr0 + i, dev-&gt;dev_addr[i]);</div><div class='ctx'> </div><div class='ctx'> 	set_multicast (dev);</div><div class='ctx'> 	if (np-&gt;coalesce) {</div><div class='del'>-		writel (np-&gt;rx_coalesce | np-&gt;rx_timeout &lt;&lt; 16,</div><div class='del'>-			ioaddr + RxDMAIntCtrl);</div><div class='add'>+		dw32(RxDMAIntCtrl, np-&gt;rx_coalesce | np-&gt;rx_timeout &lt;&lt; 16);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Set RIO to poll every N*320nsec. */</div><div class='del'>-	writeb (0x20, ioaddr + RxDMAPollPeriod);</div><div class='del'>-	writeb (0xff, ioaddr + TxDMAPollPeriod);</div><div class='del'>-	writeb (0x30, ioaddr + RxDMABurstThresh);</div><div class='del'>-	writeb (0x30, ioaddr + RxDMAUrgentThresh);</div><div class='del'>-	writel (0x0007ffff, ioaddr + RmonStatMask);</div><div class='add'>+	dw8(RxDMAPollPeriod, 0x20);</div><div class='add'>+	dw8(TxDMAPollPeriod, 0xff);</div><div class='add'>+	dw8(RxDMABurstThresh, 0x30);</div><div class='add'>+	dw8(RxDMAUrgentThresh, 0x30);</div><div class='add'>+	dw32(RmonStatMask, 0x0007ffff);</div><div class='ctx'> 	/* clear statistics */</div><div class='ctx'> 	clear_stats (dev);</div><div class='ctx'> </div><div class='ctx'> 	/* VLAN supported */</div><div class='ctx'> 	if (np-&gt;vlan) {</div><div class='ctx'> 		/* priority field in RxDMAIntCtrl  */</div><div class='del'>-		writel (readl(ioaddr + RxDMAIntCtrl) | 0x7 &lt;&lt; 10,</div><div class='del'>-			ioaddr + RxDMAIntCtrl);</div><div class='add'>+		dw32(RxDMAIntCtrl, dr32(RxDMAIntCtrl) | 0x7 &lt;&lt; 10);</div><div class='ctx'> 		/* VLANId */</div><div class='del'>-		writew (np-&gt;vlan, ioaddr + VLANId);</div><div class='add'>+		dw16(VLANId, np-&gt;vlan);</div><div class='ctx'> 		/* Length/Type should be 0x8100 */</div><div class='del'>-		writel (0x8100 &lt;&lt; 16 | np-&gt;vlan, ioaddr + VLANTag);</div><div class='add'>+		dw32(VLANTag, 0x8100 &lt;&lt; 16 | np-&gt;vlan);</div><div class='ctx'> 		/* Enable AutoVLANuntagging, but disable AutoVLANtagging.</div><div class='ctx'> 		   VLAN information tagged by TFC' VID, CFI fields. */</div><div class='del'>-		writel (readl (ioaddr + MACCtrl) | AutoVLANuntagging,</div><div class='del'>-			ioaddr + MACCtrl);</div><div class='add'>+		dw32(MACCtrl, dr32(MACCtrl) | AutoVLANuntagging);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	init_timer (&amp;np-&gt;timer);</div><div class='hunk'>@@ -469,20 +470,18 @@ rio_open (struct net_device *dev)</div><div class='ctx'> 	add_timer (&amp;np-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Start Tx/Rx */</div><div class='del'>-	writel (readl (ioaddr + MACCtrl) | StatsEnable | RxEnable | TxEnable,</div><div class='del'>-			ioaddr + MACCtrl);</div><div class='add'>+	dw32(MACCtrl, dr32(MACCtrl) | StatsEnable | RxEnable | TxEnable);</div><div class='ctx'> </div><div class='ctx'> 	macctrl = 0;</div><div class='ctx'> 	macctrl |= (np-&gt;vlan) ? AutoVLANuntagging : 0;</div><div class='ctx'> 	macctrl |= (np-&gt;full_duplex) ? DuplexSelect : 0;</div><div class='ctx'> 	macctrl |= (np-&gt;tx_flow) ? TxFlowControlEnable : 0;</div><div class='ctx'> 	macctrl |= (np-&gt;rx_flow) ? RxFlowControlEnable : 0;</div><div class='del'>-	writew(macctrl,	ioaddr + MACCtrl);</div><div class='add'>+	dw16(MACCtrl, macctrl);</div><div class='ctx'> </div><div class='ctx'> 	netif_start_queue (dev);</div><div class='ctx'> </div><div class='del'>-	/* Enable default interrupts */</div><div class='del'>-	EnableInt ();</div><div class='add'>+	dl2k_enable_int(np);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -533,10 +532,11 @@ rio_timer (unsigned long data)</div><div class='ctx'> static void</div><div class='ctx'> rio_tx_timeout (struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n",</div><div class='del'>-		dev-&gt;name, readl (ioaddr + TxStatus));</div><div class='add'>+		dev-&gt;name, dr32(TxStatus));</div><div class='ctx'> 	rio_free_tx(dev, 0);</div><div class='ctx'> 	dev-&gt;if_port = 0;</div><div class='ctx'> 	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='hunk'>@@ -547,6 +547,7 @@ static void</div><div class='ctx'> alloc_list (struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	np-&gt;cur_rx = np-&gt;cur_tx = 0;</div><div class='hunk'>@@ -594,24 +595,23 @@ alloc_list (struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set RFDListPtr */</div><div class='del'>-	writel (np-&gt;rx_ring_dma, dev-&gt;base_addr + RFDListPtr0);</div><div class='del'>-	writel (0, dev-&gt;base_addr + RFDListPtr1);</div><div class='add'>+	dw32(RFDListPtr0, np-&gt;rx_ring_dma);</div><div class='add'>+	dw32(RFDListPtr1, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t</div><div class='ctx'> start_xmit (struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='ctx'> 	struct netdev_desc *txdesc;</div><div class='ctx'> 	unsigned entry;</div><div class='del'>-	u32 ioaddr;</div><div class='ctx'> 	u64 tfc_vlan_tag = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (np-&gt;link_status == 0) {	/* Link Down */</div><div class='ctx'> 		dev_kfree_skb(skb);</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> 	}</div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	entry = np-&gt;cur_tx % TX_RING_SIZE;</div><div class='ctx'> 	np-&gt;tx_skbuff[entry] = skb;</div><div class='ctx'> 	txdesc = &amp;np-&gt;tx_ring[entry];</div><div class='hunk'>@@ -646,9 +646,9 @@ start_xmit (struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 					      (1 &lt;&lt; FragCountShift));</div><div class='ctx'> </div><div class='ctx'> 	/* TxDMAPollNow */</div><div class='del'>-	writel (readl (ioaddr + DMACtrl) | 0x00001000, ioaddr + DMACtrl);</div><div class='add'>+	dw32(DMACtrl, dr32(DMACtrl) | 0x00001000);</div><div class='ctx'> 	/* Schedule ISR */</div><div class='del'>-	writel(10000, ioaddr + CountDown);</div><div class='add'>+	dw32(CountDown, 10000);</div><div class='ctx'> 	np-&gt;cur_tx = (np-&gt;cur_tx + 1) % TX_RING_SIZE;</div><div class='ctx'> 	if ((np-&gt;cur_tx - np-&gt;old_tx + TX_RING_SIZE) % TX_RING_SIZE</div><div class='ctx'> 			&lt; TX_QUEUE_LEN - 1 &amp;&amp; np-&gt;speed != 10) {</div><div class='hunk'>@@ -658,10 +658,10 @@ start_xmit (struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* The first TFDListPtr */</div><div class='del'>-	if (readl (dev-&gt;base_addr + TFDListPtr0) == 0) {</div><div class='del'>-		writel (np-&gt;tx_ring_dma + entry * sizeof (struct netdev_desc),</div><div class='del'>-			dev-&gt;base_addr + TFDListPtr0);</div><div class='del'>-		writel (0, dev-&gt;base_addr + TFDListPtr1);</div><div class='add'>+	if (!dr32(TFDListPtr0)) {</div><div class='add'>+		dw32(TFDListPtr0, np-&gt;tx_ring_dma +</div><div class='add'>+		     entry * sizeof (struct netdev_desc));</div><div class='add'>+		dw32(TFDListPtr1, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='hunk'>@@ -671,17 +671,15 @@ static irqreturn_t</div><div class='ctx'> rio_interrupt (int irq, void *dev_instance)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = dev_instance;</div><div class='del'>-	struct netdev_private *np;</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='ctx'> 	unsigned int_status;</div><div class='del'>-	long ioaddr;</div><div class='ctx'> 	int cnt = max_intrloop;</div><div class='ctx'> 	int handled = 0;</div><div class='ctx'> </div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='del'>-	np = netdev_priv(dev);</div><div class='ctx'> 	while (1) {</div><div class='del'>-		int_status = readw (ioaddr + IntStatus);</div><div class='del'>-		writew (int_status, ioaddr + IntStatus);</div><div class='add'>+		int_status = dr16(IntStatus);</div><div class='add'>+		dw16(IntStatus, int_status);</div><div class='ctx'> 		int_status &amp;= DEFAULT_INTR;</div><div class='ctx'> 		if (int_status == 0 || --cnt &lt; 0)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -692,7 +690,7 @@ rio_interrupt (int irq, void *dev_instance)</div><div class='ctx'> 		/* TxDMAComplete interrupt */</div><div class='ctx'> 		if ((int_status &amp; (TxDMAComplete|IntRequested))) {</div><div class='ctx'> 			int tx_status;</div><div class='del'>-			tx_status = readl (ioaddr + TxStatus);</div><div class='add'>+			tx_status = dr32(TxStatus);</div><div class='ctx'> 			if (tx_status &amp; 0x01)</div><div class='ctx'> 				tx_error (dev, tx_status);</div><div class='ctx'> 			/* Free used tx skbuffs */</div><div class='hunk'>@@ -705,7 +703,7 @@ rio_interrupt (int irq, void *dev_instance)</div><div class='ctx'> 			rio_error (dev, int_status);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (np-&gt;cur_tx != np-&gt;old_tx)</div><div class='del'>-		writel (100, ioaddr + CountDown);</div><div class='add'>+		dw32(CountDown, 100);</div><div class='ctx'> 	return IRQ_RETVAL(handled);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -765,13 +763,11 @@ rio_free_tx (struct net_device *dev, int irq)</div><div class='ctx'> static void</div><div class='ctx'> tx_error (struct net_device *dev, int tx_status)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_private *np;</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='ctx'> 	int frame_id;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	np = netdev_priv(dev);</div><div class='del'>-</div><div class='ctx'> 	frame_id = (tx_status &amp; 0xffff0000);</div><div class='ctx'> 	printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",</div><div class='ctx'> 		dev-&gt;name, tx_status, frame_id);</div><div class='hunk'>@@ -779,23 +775,21 @@ tx_error (struct net_device *dev, int tx_status)</div><div class='ctx'> 	/* Ttransmit Underrun */</div><div class='ctx'> 	if (tx_status &amp; 0x10) {</div><div class='ctx'> 		np-&gt;stats.tx_fifo_errors++;</div><div class='del'>-		writew (readw (ioaddr + TxStartThresh) + 0x10,</div><div class='del'>-			ioaddr + TxStartThresh);</div><div class='add'>+		dw16(TxStartThresh, dr16(TxStartThresh) + 0x10);</div><div class='ctx'> 		/* Transmit Underrun need to set TxReset, DMARest, FIFOReset */</div><div class='del'>-		writew (TxReset | DMAReset | FIFOReset | NetworkReset,</div><div class='del'>-			ioaddr + ASICCtrl + 2);</div><div class='add'>+		dw16(ASICCtrl + 2,</div><div class='add'>+		     TxReset | DMAReset | FIFOReset | NetworkReset);</div><div class='ctx'> 		/* Wait for ResetBusy bit clear */</div><div class='ctx'> 		for (i = 50; i &gt; 0; i--) {</div><div class='del'>-			if ((readw (ioaddr + ASICCtrl + 2) &amp; ResetBusy) == 0)</div><div class='add'>+			if (!(dr16(ASICCtrl + 2) &amp; ResetBusy))</div><div class='ctx'> 				break;</div><div class='ctx'> 			mdelay (1);</div><div class='ctx'> 		}</div><div class='ctx'> 		rio_free_tx (dev, 1);</div><div class='ctx'> 		/* Reset TFDListPtr */</div><div class='del'>-		writel (np-&gt;tx_ring_dma +</div><div class='del'>-			np-&gt;old_tx * sizeof (struct netdev_desc),</div><div class='del'>-			dev-&gt;base_addr + TFDListPtr0);</div><div class='del'>-		writel (0, dev-&gt;base_addr + TFDListPtr1);</div><div class='add'>+		dw32(TFDListPtr0, np-&gt;tx_ring_dma +</div><div class='add'>+		     np-&gt;old_tx * sizeof (struct netdev_desc));</div><div class='add'>+		dw32(TFDListPtr1, 0);</div><div class='ctx'> </div><div class='ctx'> 		/* Let TxStartThresh stay default value */</div><div class='ctx'> 	}</div><div class='hunk'>@@ -803,10 +797,10 @@ tx_error (struct net_device *dev, int tx_status)</div><div class='ctx'> 	if (tx_status &amp; 0x04) {</div><div class='ctx'> 		np-&gt;stats.tx_fifo_errors++;</div><div class='ctx'> 		/* TxReset and clear FIFO */</div><div class='del'>-		writew (TxReset | FIFOReset, ioaddr + ASICCtrl + 2);</div><div class='add'>+		dw16(ASICCtrl + 2, TxReset | FIFOReset);</div><div class='ctx'> 		/* Wait reset done */</div><div class='ctx'> 		for (i = 50; i &gt; 0; i--) {</div><div class='del'>-			if ((readw (ioaddr + ASICCtrl + 2) &amp; ResetBusy) == 0)</div><div class='add'>+			if (!(dr16(ASICCtrl + 2) &amp; ResetBusy))</div><div class='ctx'> 				break;</div><div class='ctx'> 			mdelay (1);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -821,7 +815,7 @@ tx_error (struct net_device *dev, int tx_status)</div><div class='ctx'> 		np-&gt;stats.collisions++;</div><div class='ctx'> #endif</div><div class='ctx'> 	/* Restart the Tx */</div><div class='del'>-	writel (readw (dev-&gt;base_addr + MACCtrl) | TxEnable, ioaddr + MACCtrl);</div><div class='add'>+	dw32(MACCtrl, dr16(MACCtrl) | TxEnable);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -931,8 +925,8 @@ receive_packet (struct net_device *dev)</div><div class='ctx'> static void</div><div class='ctx'> rio_error (struct net_device *dev, int int_status)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='ctx'> 	u16 macctrl;</div><div class='ctx'> </div><div class='ctx'> 	/* Link change event */</div><div class='hunk'>@@ -954,7 +948,7 @@ rio_error (struct net_device *dev, int int_status)</div><div class='ctx'> 				TxFlowControlEnable : 0;</div><div class='ctx'> 			macctrl |= (np-&gt;rx_flow) ?</div><div class='ctx'> 				RxFlowControlEnable : 0;</div><div class='del'>-			writew(macctrl,	ioaddr + MACCtrl);</div><div class='add'>+			dw16(MACCtrl, macctrl);</div><div class='ctx'> 			np-&gt;link_status = 1;</div><div class='ctx'> 			netif_carrier_on(dev);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -974,7 +968,7 @@ rio_error (struct net_device *dev, int int_status)</div><div class='ctx'> 	if (int_status &amp; HostError) {</div><div class='ctx'> 		printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n",</div><div class='ctx'> 			dev-&gt;name, int_status);</div><div class='del'>-		writew (GlobalReset | HostReset, ioaddr + ASICCtrl + 2);</div><div class='add'>+		dw16(ASICCtrl + 2, GlobalReset | HostReset);</div><div class='ctx'> 		mdelay (500);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -982,8 +976,8 @@ rio_error (struct net_device *dev, int int_status)</div><div class='ctx'> static struct net_device_stats *</div><div class='ctx'> get_stats (struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='ctx'> #ifdef MEM_MAPPING</div><div class='ctx'> 	int i;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -992,106 +986,107 @@ get_stats (struct net_device *dev)</div><div class='ctx'> 	/* All statistics registers need to be acknowledged,</div><div class='ctx'> 	   else statistic overflow could cause problems */</div><div class='ctx'> </div><div class='del'>-	np-&gt;stats.rx_packets += readl (ioaddr + FramesRcvOk);</div><div class='del'>-	np-&gt;stats.tx_packets += readl (ioaddr + FramesXmtOk);</div><div class='del'>-	np-&gt;stats.rx_bytes += readl (ioaddr + OctetRcvOk);</div><div class='del'>-	np-&gt;stats.tx_bytes += readl (ioaddr + OctetXmtOk);</div><div class='add'>+	np-&gt;stats.rx_packets += dr32(FramesRcvOk);</div><div class='add'>+	np-&gt;stats.tx_packets += dr32(FramesXmtOk);</div><div class='add'>+	np-&gt;stats.rx_bytes += dr32(OctetRcvOk);</div><div class='add'>+	np-&gt;stats.tx_bytes += dr32(OctetXmtOk);</div><div class='ctx'> </div><div class='del'>-	np-&gt;stats.multicast = readl (ioaddr + McstFramesRcvdOk);</div><div class='del'>-	np-&gt;stats.collisions += readl (ioaddr + SingleColFrames)</div><div class='del'>-			     +  readl (ioaddr + MultiColFrames);</div><div class='add'>+	np-&gt;stats.multicast = dr32(McstFramesRcvdOk);</div><div class='add'>+	np-&gt;stats.collisions += dr32(SingleColFrames)</div><div class='add'>+			     +  dr32(MultiColFrames);</div><div class='ctx'> </div><div class='ctx'> 	/* detailed tx errors */</div><div class='del'>-	stat_reg = readw (ioaddr + FramesAbortXSColls);</div><div class='add'>+	stat_reg = dr16(FramesAbortXSColls);</div><div class='ctx'> 	np-&gt;stats.tx_aborted_errors += stat_reg;</div><div class='ctx'> 	np-&gt;stats.tx_errors += stat_reg;</div><div class='ctx'> </div><div class='del'>-	stat_reg = readw (ioaddr + CarrierSenseErrors);</div><div class='add'>+	stat_reg = dr16(CarrierSenseErrors);</div><div class='ctx'> 	np-&gt;stats.tx_carrier_errors += stat_reg;</div><div class='ctx'> 	np-&gt;stats.tx_errors += stat_reg;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear all other statistic register. */</div><div class='del'>-	readl (ioaddr + McstOctetXmtOk);</div><div class='del'>-	readw (ioaddr + BcstFramesXmtdOk);</div><div class='del'>-	readl (ioaddr + McstFramesXmtdOk);</div><div class='del'>-	readw (ioaddr + BcstFramesRcvdOk);</div><div class='del'>-	readw (ioaddr + MacControlFramesRcvd);</div><div class='del'>-	readw (ioaddr + FrameTooLongErrors);</div><div class='del'>-	readw (ioaddr + InRangeLengthErrors);</div><div class='del'>-	readw (ioaddr + FramesCheckSeqErrors);</div><div class='del'>-	readw (ioaddr + FramesLostRxErrors);</div><div class='del'>-	readl (ioaddr + McstOctetXmtOk);</div><div class='del'>-	readl (ioaddr + BcstOctetXmtOk);</div><div class='del'>-	readl (ioaddr + McstFramesXmtdOk);</div><div class='del'>-	readl (ioaddr + FramesWDeferredXmt);</div><div class='del'>-	readl (ioaddr + LateCollisions);</div><div class='del'>-	readw (ioaddr + BcstFramesXmtdOk);</div><div class='del'>-	readw (ioaddr + MacControlFramesXmtd);</div><div class='del'>-	readw (ioaddr + FramesWEXDeferal);</div><div class='add'>+	dr32(McstOctetXmtOk);</div><div class='add'>+	dr16(BcstFramesXmtdOk);</div><div class='add'>+	dr32(McstFramesXmtdOk);</div><div class='add'>+	dr16(BcstFramesRcvdOk);</div><div class='add'>+	dr16(MacControlFramesRcvd);</div><div class='add'>+	dr16(FrameTooLongErrors);</div><div class='add'>+	dr16(InRangeLengthErrors);</div><div class='add'>+	dr16(FramesCheckSeqErrors);</div><div class='add'>+	dr16(FramesLostRxErrors);</div><div class='add'>+	dr32(McstOctetXmtOk);</div><div class='add'>+	dr32(BcstOctetXmtOk);</div><div class='add'>+	dr32(McstFramesXmtdOk);</div><div class='add'>+	dr32(FramesWDeferredXmt);</div><div class='add'>+	dr32(LateCollisions);</div><div class='add'>+	dr16(BcstFramesXmtdOk);</div><div class='add'>+	dr16(MacControlFramesXmtd);</div><div class='add'>+	dr16(FramesWEXDeferal);</div><div class='ctx'> </div><div class='ctx'> #ifdef MEM_MAPPING</div><div class='ctx'> 	for (i = 0x100; i &lt;= 0x150; i += 4)</div><div class='del'>-		readl (ioaddr + i);</div><div class='add'>+		dr32(i);</div><div class='ctx'> #endif</div><div class='del'>-	readw (ioaddr + TxJumboFrames);</div><div class='del'>-	readw (ioaddr + RxJumboFrames);</div><div class='del'>-	readw (ioaddr + TCPCheckSumErrors);</div><div class='del'>-	readw (ioaddr + UDPCheckSumErrors);</div><div class='del'>-	readw (ioaddr + IPCheckSumErrors);</div><div class='add'>+	dr16(TxJumboFrames);</div><div class='add'>+	dr16(RxJumboFrames);</div><div class='add'>+	dr16(TCPCheckSumErrors);</div><div class='add'>+	dr16(UDPCheckSumErrors);</div><div class='add'>+	dr16(IPCheckSumErrors);</div><div class='ctx'> 	return &amp;np-&gt;stats;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> clear_stats (struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='ctx'> #ifdef MEM_MAPPING</div><div class='ctx'> 	int i;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* All statistics registers need to be acknowledged,</div><div class='ctx'> 	   else statistic overflow could cause problems */</div><div class='del'>-	readl (ioaddr + FramesRcvOk);</div><div class='del'>-	readl (ioaddr + FramesXmtOk);</div><div class='del'>-	readl (ioaddr + OctetRcvOk);</div><div class='del'>-	readl (ioaddr + OctetXmtOk);</div><div class='del'>-</div><div class='del'>-	readl (ioaddr + McstFramesRcvdOk);</div><div class='del'>-	readl (ioaddr + SingleColFrames);</div><div class='del'>-	readl (ioaddr + MultiColFrames);</div><div class='del'>-	readl (ioaddr + LateCollisions);</div><div class='add'>+	dr32(FramesRcvOk);</div><div class='add'>+	dr32(FramesXmtOk);</div><div class='add'>+	dr32(OctetRcvOk);</div><div class='add'>+	dr32(OctetXmtOk);</div><div class='add'>+</div><div class='add'>+	dr32(McstFramesRcvdOk);</div><div class='add'>+	dr32(SingleColFrames);</div><div class='add'>+	dr32(MultiColFrames);</div><div class='add'>+	dr32(LateCollisions);</div><div class='ctx'> 	/* detailed rx errors */</div><div class='del'>-	readw (ioaddr + FrameTooLongErrors);</div><div class='del'>-	readw (ioaddr + InRangeLengthErrors);</div><div class='del'>-	readw (ioaddr + FramesCheckSeqErrors);</div><div class='del'>-	readw (ioaddr + FramesLostRxErrors);</div><div class='add'>+	dr16(FrameTooLongErrors);</div><div class='add'>+	dr16(InRangeLengthErrors);</div><div class='add'>+	dr16(FramesCheckSeqErrors);</div><div class='add'>+	dr16(FramesLostRxErrors);</div><div class='ctx'> </div><div class='ctx'> 	/* detailed tx errors */</div><div class='del'>-	readw (ioaddr + FramesAbortXSColls);</div><div class='del'>-	readw (ioaddr + CarrierSenseErrors);</div><div class='add'>+	dr16(FramesAbortXSColls);</div><div class='add'>+	dr16(CarrierSenseErrors);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear all other statistic register. */</div><div class='del'>-	readl (ioaddr + McstOctetXmtOk);</div><div class='del'>-	readw (ioaddr + BcstFramesXmtdOk);</div><div class='del'>-	readl (ioaddr + McstFramesXmtdOk);</div><div class='del'>-	readw (ioaddr + BcstFramesRcvdOk);</div><div class='del'>-	readw (ioaddr + MacControlFramesRcvd);</div><div class='del'>-	readl (ioaddr + McstOctetXmtOk);</div><div class='del'>-	readl (ioaddr + BcstOctetXmtOk);</div><div class='del'>-	readl (ioaddr + McstFramesXmtdOk);</div><div class='del'>-	readl (ioaddr + FramesWDeferredXmt);</div><div class='del'>-	readw (ioaddr + BcstFramesXmtdOk);</div><div class='del'>-	readw (ioaddr + MacControlFramesXmtd);</div><div class='del'>-	readw (ioaddr + FramesWEXDeferal);</div><div class='add'>+	dr32(McstOctetXmtOk);</div><div class='add'>+	dr16(BcstFramesXmtdOk);</div><div class='add'>+	dr32(McstFramesXmtdOk);</div><div class='add'>+	dr16(BcstFramesRcvdOk);</div><div class='add'>+	dr16(MacControlFramesRcvd);</div><div class='add'>+	dr32(McstOctetXmtOk);</div><div class='add'>+	dr32(BcstOctetXmtOk);</div><div class='add'>+	dr32(McstFramesXmtdOk);</div><div class='add'>+	dr32(FramesWDeferredXmt);</div><div class='add'>+	dr16(BcstFramesXmtdOk);</div><div class='add'>+	dr16(MacControlFramesXmtd);</div><div class='add'>+	dr16(FramesWEXDeferal);</div><div class='ctx'> #ifdef MEM_MAPPING</div><div class='ctx'> 	for (i = 0x100; i &lt;= 0x150; i += 4)</div><div class='del'>-		readl (ioaddr + i);</div><div class='add'>+		dr32(i);</div><div class='ctx'> #endif</div><div class='del'>-	readw (ioaddr + TxJumboFrames);</div><div class='del'>-	readw (ioaddr + RxJumboFrames);</div><div class='del'>-	readw (ioaddr + TCPCheckSumErrors);</div><div class='del'>-	readw (ioaddr + UDPCheckSumErrors);</div><div class='del'>-	readw (ioaddr + IPCheckSumErrors);</div><div class='add'>+	dr16(TxJumboFrames);</div><div class='add'>+	dr16(RxJumboFrames);</div><div class='add'>+	dr16(TCPCheckSumErrors);</div><div class='add'>+	dr16(UDPCheckSumErrors);</div><div class='add'>+	dr16(IPCheckSumErrors);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1114,10 +1109,10 @@ change_mtu (struct net_device *dev, int new_mtu)</div><div class='ctx'> static void</div><div class='ctx'> set_multicast (struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='ctx'> 	u32 hash_table[2];</div><div class='ctx'> 	u16 rx_mode = 0;</div><div class='del'>-	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	hash_table[0] = hash_table[1] = 0;</div><div class='ctx'> 	/* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */</div><div class='hunk'>@@ -1153,9 +1148,9 @@ set_multicast (struct net_device *dev)</div><div class='ctx'> 		rx_mode |= ReceiveVLANMatch;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	writel (hash_table[0], ioaddr + HashTable0);</div><div class='del'>-	writel (hash_table[1], ioaddr + HashTable1);</div><div class='del'>-	writew (rx_mode, ioaddr + ReceiveMode);</div><div class='add'>+	dw32(HashTable0, hash_table[0]);</div><div class='add'>+	dw32(HashTable1, hash_table[1]);</div><div class='add'>+	dw16(ReceiveMode, rx_mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)</div><div class='hunk'>@@ -1259,55 +1254,21 @@ rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	int phy_addr;</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='del'>-	struct mii_data *miidata = (struct mii_data *) &amp;rq-&gt;ifr_ifru;</div><div class='del'>-</div><div class='del'>-	struct netdev_desc *desc;</div><div class='del'>-	int i;</div><div class='add'>+	struct mii_ioctl_data *miidata = if_mii(rq);</div><div class='ctx'> </div><div class='ctx'> 	phy_addr = np-&gt;phy_addr;</div><div class='ctx'> 	switch (cmd) {</div><div class='del'>-	case SIOCDEVPRIVATE:</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SIOCDEVPRIVATE + 1:</div><div class='del'>-		miidata-&gt;out_value = mii_read (dev, phy_addr, miidata-&gt;reg_num);</div><div class='del'>-		break;</div><div class='del'>-	case SIOCDEVPRIVATE + 2:</div><div class='del'>-		mii_write (dev, phy_addr, miidata-&gt;reg_num, miidata-&gt;in_value);</div><div class='del'>-		break;</div><div class='del'>-	case SIOCDEVPRIVATE + 3:</div><div class='add'>+	case SIOCGMIIPHY:</div><div class='add'>+		miidata-&gt;phy_id = phy_addr;</div><div class='ctx'> 		break;</div><div class='del'>-	case SIOCDEVPRIVATE + 4:</div><div class='add'>+	case SIOCGMIIREG:</div><div class='add'>+		miidata-&gt;val_out = mii_read (dev, phy_addr, miidata-&gt;reg_num);</div><div class='ctx'> 		break;</div><div class='del'>-	case SIOCDEVPRIVATE + 5:</div><div class='del'>-		netif_stop_queue (dev);</div><div class='del'>-		break;</div><div class='del'>-	case SIOCDEVPRIVATE + 6:</div><div class='del'>-		netif_wake_queue (dev);</div><div class='del'>-		break;</div><div class='del'>-	case SIOCDEVPRIVATE + 7:</div><div class='del'>-		printk</div><div class='del'>-		    ("tx_full=%x cur_tx=%lx old_tx=%lx cur_rx=%lx old_rx=%lx\n",</div><div class='del'>-		     netif_queue_stopped(dev), np-&gt;cur_tx, np-&gt;old_tx, np-&gt;cur_rx,</div><div class='del'>-		     np-&gt;old_rx);</div><div class='add'>+	case SIOCSMIIREG:</div><div class='add'>+		if (!capable(CAP_NET_ADMIN))</div><div class='add'>+			return -EPERM;</div><div class='add'>+		mii_write (dev, phy_addr, miidata-&gt;reg_num, miidata-&gt;val_in);</div><div class='ctx'> 		break;</div><div class='del'>-	case SIOCDEVPRIVATE + 8:</div><div class='del'>-		printk("TX ring:\n");</div><div class='del'>-		for (i = 0; i &lt; TX_RING_SIZE; i++) {</div><div class='del'>-			desc = &amp;np-&gt;tx_ring[i];</div><div class='del'>-			printk</div><div class='del'>-			    ("%02x:cur:%08x next:%08x status:%08x frag1:%08x frag0:%08x",</div><div class='del'>-			     i,</div><div class='del'>-			     (u32) (np-&gt;tx_ring_dma + i * sizeof (*desc)),</div><div class='del'>-			     (u32)le64_to_cpu(desc-&gt;next_desc),</div><div class='del'>-			     (u32)le64_to_cpu(desc-&gt;status),</div><div class='del'>-			     (u32)(le64_to_cpu(desc-&gt;fraginfo) &gt;&gt; 32),</div><div class='del'>-			     (u32)le64_to_cpu(desc-&gt;fraginfo));</div><div class='del'>-			printk ("\n");</div><div class='del'>-		}</div><div class='del'>-		printk ("\n");</div><div class='del'>-		break;</div><div class='del'>-</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1318,15 +1279,15 @@ rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'> #define EEP_BUSY 0x8000</div><div class='ctx'> /* Read the EEPROM word */</div><div class='ctx'> /* We use I/O instruction to read/write eeprom to avoid fail on some machines */</div><div class='del'>-static int</div><div class='del'>-read_eeprom (long ioaddr, int eep_addr)</div><div class='add'>+static int read_eeprom(struct netdev_private *np, int eep_addr)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = np-&gt;eeprom_addr;</div><div class='ctx'> 	int i = 1000;</div><div class='del'>-	outw (EEP_READ | (eep_addr &amp; 0xff), ioaddr + EepromCtrl);</div><div class='add'>+</div><div class='add'>+	dw16(EepromCtrl, EEP_READ | (eep_addr &amp; 0xff));</div><div class='ctx'> 	while (i-- &gt; 0) {</div><div class='del'>-		if (!(inw (ioaddr + EepromCtrl) &amp; EEP_BUSY)) {</div><div class='del'>-			return inw (ioaddr + EepromData);</div><div class='del'>-		}</div><div class='add'>+		if (!(dr16(EepromCtrl) &amp; EEP_BUSY))</div><div class='add'>+			return dr16(EepromData);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1336,38 +1297,40 @@ enum phy_ctrl_bits {</div><div class='ctx'> 	MII_DUPLEX = 0x08,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define mii_delay() readb(ioaddr)</div><div class='add'>+#define mii_delay() dr8(PhyCtrl)</div><div class='ctx'> static void</div><div class='ctx'> mii_sendbit (struct net_device *dev, u32 data)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr + PhyCtrl;</div><div class='del'>-	data = (data) ? MII_DATA1 : 0;</div><div class='del'>-	data |= MII_WRITE;</div><div class='del'>-	data |= (readb (ioaddr) &amp; 0xf8) | MII_WRITE;</div><div class='del'>-	writeb (data, ioaddr);</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='add'>+</div><div class='add'>+	data = ((data) ? MII_DATA1 : 0) | (dr8(PhyCtrl) &amp; 0xf8) | MII_WRITE;</div><div class='add'>+	dw8(PhyCtrl, data);</div><div class='ctx'> 	mii_delay ();</div><div class='del'>-	writeb (data | MII_CLK, ioaddr);</div><div class='add'>+	dw8(PhyCtrl, data | MII_CLK);</div><div class='ctx'> 	mii_delay ();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> mii_getbit (struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr + PhyCtrl;</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='ctx'> 	u8 data;</div><div class='ctx'> </div><div class='del'>-	data = (readb (ioaddr) &amp; 0xf8) | MII_READ;</div><div class='del'>-	writeb (data, ioaddr);</div><div class='add'>+	data = (dr8(PhyCtrl) &amp; 0xf8) | MII_READ;</div><div class='add'>+	dw8(PhyCtrl, data);</div><div class='ctx'> 	mii_delay ();</div><div class='del'>-	writeb (data | MII_CLK, ioaddr);</div><div class='add'>+	dw8(PhyCtrl, data | MII_CLK);</div><div class='ctx'> 	mii_delay ();</div><div class='del'>-	return ((readb (ioaddr) &gt;&gt; 1) &amp; 1);</div><div class='add'>+	return (dr8(PhyCtrl) &gt;&gt; 1) &amp; 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> mii_send_bits (struct net_device *dev, u32 data, int len)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+</div><div class='ctx'> 	for (i = len - 1; i &gt;= 0; i--) {</div><div class='ctx'> 		mii_sendbit (dev, data &amp; (1 &lt;&lt; i));</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1721,28 +1684,29 @@ mii_set_media_pcs (struct net_device *dev)</div><div class='ctx'> static int</div><div class='ctx'> rio_close (struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='add'>+</div><div class='add'>+	struct pci_dev *pdev = np-&gt;pdev;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue (dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable interrupts */</div><div class='del'>-	writew (0, ioaddr + IntEnable);</div><div class='add'>+	dw16(IntEnable, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop Tx and Rx logics */</div><div class='del'>-	writel (TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl);</div><div class='add'>+	dw32(MACCtrl, TxDisable | RxDisable | StatsDisable);</div><div class='ctx'> </div><div class='del'>-	free_irq (dev-&gt;irq, dev);</div><div class='add'>+	free_irq(pdev-&gt;irq, dev);</div><div class='ctx'> 	del_timer_sync (&amp;np-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Free all the skbuffs in the queue. */</div><div class='ctx'> 	for (i = 0; i &lt; RX_RING_SIZE; i++) {</div><div class='ctx'> 		skb = np-&gt;rx_skbuff[i];</div><div class='ctx'> 		if (skb) {</div><div class='del'>-			pci_unmap_single(np-&gt;pdev,</div><div class='del'>-					 desc_to_dma(&amp;np-&gt;rx_ring[i]),</div><div class='add'>+			pci_unmap_single(pdev, desc_to_dma(&amp;np-&gt;rx_ring[i]),</div><div class='ctx'> 					 skb-&gt;len, PCI_DMA_FROMDEVICE);</div><div class='ctx'> 			dev_kfree_skb (skb);</div><div class='ctx'> 			np-&gt;rx_skbuff[i] = NULL;</div><div class='hunk'>@@ -1753,8 +1717,7 @@ rio_close (struct net_device *dev)</div><div class='ctx'> 	for (i = 0; i &lt; TX_RING_SIZE; i++) {</div><div class='ctx'> 		skb = np-&gt;tx_skbuff[i];</div><div class='ctx'> 		if (skb) {</div><div class='del'>-			pci_unmap_single(np-&gt;pdev,</div><div class='del'>-					 desc_to_dma(&amp;np-&gt;tx_ring[i]),</div><div class='add'>+			pci_unmap_single(pdev, desc_to_dma(&amp;np-&gt;tx_ring[i]),</div><div class='ctx'> 					 skb-&gt;len, PCI_DMA_TODEVICE);</div><div class='ctx'> 			dev_kfree_skb (skb);</div><div class='ctx'> 			np-&gt;tx_skbuff[i] = NULL;</div><div class='hunk'>@@ -1778,8 +1741,9 @@ rio_remove1 (struct pci_dev *pdev)</div><div class='ctx'> 		pci_free_consistent (pdev, TX_TOTAL_SIZE, np-&gt;tx_ring,</div><div class='ctx'> 				     np-&gt;tx_ring_dma);</div><div class='ctx'> #ifdef MEM_MAPPING</div><div class='del'>-		iounmap ((char *) (dev-&gt;base_addr));</div><div class='add'>+		pci_iounmap(pdev, np-&gt;ioaddr);</div><div class='ctx'> #endif</div><div class='add'>+		pci_iounmap(pdev, np-&gt;eeprom_addr);</div><div class='ctx'> 		free_netdev (dev);</div><div class='ctx'> 		pci_release_regions (pdev);</div><div class='ctx'> 		pci_disable_device (pdev);</div><div class='head'>diff --git a/drivers/net/ethernet/dlink/dl2k.h b/drivers/net/ethernet/dlink/dl2k.h<br/>index ba0adcafa55a..3699565704c7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/dlink/dl2k.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/dlink/dl2k.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/dlink/dl2k.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dlink/dl2k.h</a></div><div class='hunk'>@@ -42,23 +42,6 @@</div><div class='ctx'> #define TX_TOTAL_SIZE	TX_RING_SIZE*sizeof(struct netdev_desc)</div><div class='ctx'> #define RX_TOTAL_SIZE	RX_RING_SIZE*sizeof(struct netdev_desc)</div><div class='ctx'> </div><div class='del'>-/* This driver was written to use PCI memory space, however x86-oriented</div><div class='del'>-   hardware often uses I/O space accesses. */</div><div class='del'>-#ifndef MEM_MAPPING</div><div class='del'>-#undef readb</div><div class='del'>-#undef readw</div><div class='del'>-#undef readl</div><div class='del'>-#undef writeb</div><div class='del'>-#undef writew</div><div class='del'>-#undef writel</div><div class='del'>-#define readb inb</div><div class='del'>-#define readw inw</div><div class='del'>-#define readl inl</div><div class='del'>-#define writeb outb</div><div class='del'>-#define writew outw</div><div class='del'>-#define writel outl</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* Offsets to the device registers.</div><div class='ctx'>    Unlike software-only systems, device drivers interact with complex hardware.</div><div class='ctx'>    It's not useful to define symbolic names for every register bit in the</div><div class='hunk'>@@ -365,13 +348,6 @@ struct ioctl_data {</div><div class='ctx'> 	char *data;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct mii_data {</div><div class='del'>-	__u16 reserved;</div><div class='del'>-	__u16 reg_num;</div><div class='del'>-	__u16 in_value;</div><div class='del'>-	__u16 out_value;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* The Rx and Tx buffer descriptors. */</div><div class='ctx'> struct netdev_desc {</div><div class='ctx'> 	__le64 next_desc;</div><div class='hunk'>@@ -391,6 +367,8 @@ struct netdev_private {</div><div class='ctx'> 	dma_addr_t tx_ring_dma;</div><div class='ctx'> 	dma_addr_t rx_ring_dma;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='add'>+	void __iomem *ioaddr;</div><div class='add'>+	void __iomem *eeprom_addr;</div><div class='ctx'> 	spinlock_t tx_lock;</div><div class='ctx'> 	spinlock_t rx_lock;</div><div class='ctx'> 	struct net_device_stats stats;</div><div class='head'>diff --git a/drivers/net/ethernet/dlink/sundance.c b/drivers/net/ethernet/dlink/sundance.c<br/>index d783f4f96ec0..d7bb52a7bda1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/dlink/sundance.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/dlink/sundance.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/dlink/sundance.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dlink/sundance.c</a></div><div class='hunk'>@@ -522,9 +522,6 @@ static int __devinit sundance_probe1 (struct pci_dev *pdev,</div><div class='ctx'> 			cpu_to_le16(eeprom_read(ioaddr, i + EEPROM_SA_OFFSET));</div><div class='ctx'> 	memcpy(dev-&gt;perm_addr, dev-&gt;dev_addr, dev-&gt;addr_len);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = (unsigned long)ioaddr;</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-</div><div class='ctx'> 	np = netdev_priv(dev);</div><div class='ctx'> 	np-&gt;base = ioaddr;</div><div class='ctx'> 	np-&gt;pci_dev = pdev;</div><div class='hunk'>@@ -828,18 +825,19 @@ static int netdev_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Do we need to reset the chip??? */</div><div class='ctx'> </div><div class='del'>-	i = request_irq(dev-&gt;irq, intr_handler, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	i = request_irq(irq, intr_handler, IRQF_SHARED, dev-&gt;name, dev);</div><div class='ctx'> 	if (i)</div><div class='ctx'> 		return i;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_msg_ifup(np))</div><div class='del'>-		printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",</div><div class='del'>-			   dev-&gt;name, dev-&gt;irq);</div><div class='add'>+		printk(KERN_DEBUG "%s: netdev_open() irq %d\n", dev-&gt;name, irq);</div><div class='add'>+</div><div class='ctx'> 	init_ring(dev);</div><div class='ctx'> </div><div class='ctx'> 	iowrite32(np-&gt;rx_ring_dma, ioaddr + RxListPtr);</div><div class='hunk'>@@ -1814,7 +1812,7 @@ static int netdev_close(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* __i386__ debugging only */</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(np-&gt;pci_dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	del_timer_sync(&amp;np-&gt;timer);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/dnet.c b/drivers/net/ethernet/dnet.c<br/>index b276469f74e9..290b26f868c9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/dnet.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/dnet.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/dnet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/dnet.c</a></div><div class='hunk'>@@ -815,6 +815,7 @@ static const struct ethtool_ops dnet_ethtool_ops = {</div><div class='ctx'> 	.set_settings		= dnet_set_settings,</div><div class='ctx'> 	.get_drvinfo		= dnet_get_drvinfo,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops dnet_netdev_ops = {</div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/Makefile b/drivers/net/ethernet/emulex/benet/Makefile<br/>index a60cd8051135..1a91b276940d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/emulex/benet/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/Makefile</a></div><div class='hunk'>@@ -4,4 +4,4 @@</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_BE2NET) += be2net.o</div><div class='ctx'> </div><div class='del'>-be2net-y :=  be_main.o be_cmds.o be_ethtool.o</div><div class='add'>+be2net-y :=  be_main.o be_cmds.o be_ethtool.o be_roce.o</div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be.h b/drivers/net/ethernet/emulex/benet/be.h<br/>index 9576ac002c23..c5c4c0e83bd1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/emulex/benet/be.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be.h</a></div><div class='hunk'>@@ -32,8 +32,9 @@</div><div class='ctx'> #include &lt;linux/u64_stats_sync.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "be_hw.h"</div><div class='add'>+#include "be_roce.h"</div><div class='ctx'> </div><div class='del'>-#define DRV_VER			"4.2.116u"</div><div class='add'>+#define DRV_VER			"4.2.220u"</div><div class='ctx'> #define DRV_NAME		"be2net"</div><div class='ctx'> #define BE_NAME			"ServerEngines BladeEngine2 10Gbps NIC"</div><div class='ctx'> #define BE3_NAME		"ServerEngines BladeEngine3 10Gbps NIC"</div><div class='hunk'>@@ -102,7 +103,8 @@ static inline char *nic_name(struct pci_dev *pdev)</div><div class='ctx'> #define MAX_RX_QS		(MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */</div><div class='ctx'> </div><div class='ctx'> #define MAX_TX_QS		8</div><div class='del'>-#define MAX_MSIX_VECTORS	MAX_RSS_QS</div><div class='add'>+#define MAX_ROCE_EQS		5</div><div class='add'>+#define MAX_MSIX_VECTORS	(MAX_RSS_QS + MAX_ROCE_EQS) /* RSS qs + RoCE */</div><div class='ctx'> #define BE_TX_BUDGET		256</div><div class='ctx'> #define BE_NAPI_WEIGHT		64</div><div class='ctx'> #define MAX_RX_POST		BE_NAPI_WEIGHT /* Frags posted at a time */</div><div class='hunk'>@@ -162,6 +164,11 @@ static inline void queue_head_inc(struct be_queue_info *q)</div><div class='ctx'> 	index_inc(&amp;q-&gt;head, q-&gt;len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void index_dec(u16 *index, u16 limit)</div><div class='add'>+{</div><div class='add'>+	*index = MODULO((*index - 1), limit);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void queue_tail_inc(struct be_queue_info *q)</div><div class='ctx'> {</div><div class='ctx'> 	index_inc(&amp;q-&gt;tail, q-&gt;len);</div><div class='hunk'>@@ -308,11 +315,33 @@ struct be_vf_cfg {</div><div class='ctx'> 	u32 tx_rate;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum vf_state {</div><div class='add'>+	ENABLED = 0,</div><div class='add'>+	ASSIGNED = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define BE_FLAGS_LINK_STATUS_INIT		1</div><div class='ctx'> #define BE_FLAGS_WORKER_SCHEDULED		(1 &lt;&lt; 3)</div><div class='ctx'> #define BE_UC_PMAC_COUNT		30</div><div class='ctx'> #define BE_VF_UC_PMAC_COUNT		2</div><div class='ctx'> </div><div class='add'>+struct phy_info {</div><div class='add'>+	u8 transceiver;</div><div class='add'>+	u8 autoneg;</div><div class='add'>+	u8 fc_autoneg;</div><div class='add'>+	u8 port_type;</div><div class='add'>+	u16 phy_type;</div><div class='add'>+	u16 interface_type;</div><div class='add'>+	u32 misc_params;</div><div class='add'>+	u16 auto_speeds_supported;</div><div class='add'>+	u16 fixed_speeds_supported;</div><div class='add'>+	int link_speed;</div><div class='add'>+	int forced_port_speed;</div><div class='add'>+	u32 dac_cable_len;</div><div class='add'>+	u32 advertising;</div><div class='add'>+	u32 supported;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct be_adapter {</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='hunk'>@@ -377,29 +406,41 @@ struct be_adapter {</div><div class='ctx'> 	u32 rx_fc;		/* Rx flow control */</div><div class='ctx'> 	u32 tx_fc;		/* Tx flow control */</div><div class='ctx'> 	bool stats_cmd_sent;</div><div class='del'>-	int link_speed;</div><div class='del'>-	u8 port_type;</div><div class='del'>-	u8 transceiver;</div><div class='del'>-	u8 autoneg;</div><div class='ctx'> 	u8 generation;		/* BladeEngine ASIC generation */</div><div class='add'>+	u32 if_type;</div><div class='add'>+	struct {</div><div class='add'>+		u8 __iomem *base;	/* Door Bell */</div><div class='add'>+		u32 size;</div><div class='add'>+		u32 total_size;</div><div class='add'>+		u64 io_addr;</div><div class='add'>+	} roce_db;</div><div class='add'>+	u32 num_msix_roce_vec;</div><div class='add'>+	struct ocrdma_dev *ocrdma_dev;</div><div class='add'>+	struct list_head entry;</div><div class='add'>+</div><div class='ctx'> 	u32 flash_status;</div><div class='ctx'> 	struct completion flash_compl;</div><div class='ctx'> </div><div class='del'>-	u32 num_vfs;</div><div class='del'>-	u8 is_virtfn;</div><div class='add'>+	u32 num_vfs;		/* Number of VFs provisioned by PF driver */</div><div class='add'>+	u32 dev_num_vfs;	/* Number of VFs supported by HW */</div><div class='add'>+	u8 virtfn;</div><div class='ctx'> 	struct be_vf_cfg *vf_cfg;</div><div class='ctx'> 	bool be3_native;</div><div class='ctx'> 	u32 sli_family;</div><div class='ctx'> 	u8 hba_port_num;</div><div class='ctx'> 	u16 pvid;</div><div class='add'>+	struct phy_info phy;</div><div class='ctx'> 	u8 wol_cap;</div><div class='ctx'> 	bool wol;</div><div class='ctx'> 	u32 max_pmac_cnt;	/* Max secondary UC MACs programmable */</div><div class='ctx'> 	u32 uc_macs;		/* Count of secondary UC MAC programmed */</div><div class='add'>+	u32 msg_enable;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define be_physfn(adapter) (!adapter-&gt;is_virtfn)</div><div class='add'>+#define be_physfn(adapter)		(!adapter-&gt;virtfn)</div><div class='ctx'> #define	sriov_enabled(adapter)		(adapter-&gt;num_vfs &gt; 0)</div><div class='add'>+#define	sriov_want(adapter)		(adapter-&gt;dev_num_vfs &amp;&amp; num_vfs &amp;&amp; \</div><div class='add'>+					 be_physfn(adapter))</div><div class='ctx'> #define for_all_vfs(adapter, vf_cfg, i)					\</div><div class='ctx'> 	for (i = 0, vf_cfg = &amp;adapter-&gt;vf_cfg[i]; i &lt; adapter-&gt;num_vfs;	\</div><div class='ctx'> 		i++, vf_cfg++)</div><div class='hunk'>@@ -413,6 +454,10 @@ struct be_adapter {</div><div class='ctx'> #define lancer_chip(adapter)	((adapter-&gt;pdev-&gt;device == OC_DEVICE_ID3) || \</div><div class='ctx'> 				 (adapter-&gt;pdev-&gt;device == OC_DEVICE_ID4))</div><div class='ctx'> </div><div class='add'>+#define be_roce_supported(adapter) ((adapter-&gt;if_type == SLI_INTF_TYPE_3 || \</div><div class='add'>+				adapter-&gt;sli_family == SKYHAWK_SLI_FAMILY) &amp;&amp; \</div><div class='add'>+				(adapter-&gt;function_mode &amp; RDMA_ENABLED))</div><div class='add'>+</div><div class='ctx'> extern const struct ethtool_ops be_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> #define msix_enabled(adapter)		(adapter-&gt;num_msix_vec &gt; 0)</div><div class='hunk'>@@ -528,14 +573,6 @@ static inline u8 is_udp_pkt(struct sk_buff *skb)</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void be_check_sriov_fn_type(struct be_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	u32 sli_intf;</div><div class='del'>-</div><div class='del'>-	pci_read_config_dword(adapter-&gt;pdev, SLI_INTF_REG_OFFSET, &amp;sli_intf);</div><div class='del'>-	adapter-&gt;is_virtfn = (sli_intf &amp; SLI_INTF_FT_MASK) ? 1 : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)</div><div class='ctx'> {</div><div class='ctx'> 	u32 addr;</div><div class='hunk'>@@ -577,10 +614,31 @@ static inline bool be_is_wol_excluded(struct be_adapter *adapter)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool be_type_2_3(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return (adapter-&gt;if_type == SLI_INTF_TYPE_2 ||</div><div class='add'>+		adapter-&gt;if_type == SLI_INTF_TYPE_3) ? true : false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,</div><div class='ctx'> 		u16 num_popped);</div><div class='ctx'> extern void be_link_status_update(struct be_adapter *adapter, u8 link_status);</div><div class='ctx'> extern void be_parse_stats(struct be_adapter *adapter);</div><div class='ctx'> extern int be_load_fw(struct be_adapter *adapter, u8 *func);</div><div class='ctx'> extern bool be_is_wol_supported(struct be_adapter *adapter);</div><div class='add'>+extern bool be_pause_supported(struct be_adapter *adapter);</div><div class='add'>+extern u32 be_get_fw_log_level(struct be_adapter *adapter);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * internal function to initialize-cleanup roce device.</div><div class='add'>+ */</div><div class='add'>+extern void be_roce_dev_add(struct be_adapter *);</div><div class='add'>+extern void be_roce_dev_remove(struct be_adapter *);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * internal function to open-close roce device during ifup-ifdown.</div><div class='add'>+ */</div><div class='add'>+extern void be_roce_dev_open(struct be_adapter *);</div><div class='add'>+extern void be_roce_dev_close(struct be_adapter *);</div><div class='add'>+</div><div class='ctx'> #endif				/* BE_H */</div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be_cmds.c b/drivers/net/ethernet/emulex/benet/be_cmds.c<br/>index 67b030d72df1..8d06ea381741 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be_cmds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/emulex/benet/be_cmds.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be_cmds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_cmds.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'>  * Costa Mesa, CA 92626</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include "be.h"</div><div class='ctx'> #include "be_cmds.h"</div><div class='ctx'> </div><div class='hunk'>@@ -61,10 +62,21 @@ static inline void be_mcc_compl_use(struct be_mcc_compl *compl)</div><div class='ctx'> 	compl-&gt;flags = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1)</div><div class='add'>+{</div><div class='add'>+	unsigned long addr;</div><div class='add'>+</div><div class='add'>+	addr = tag1;</div><div class='add'>+	addr = ((addr &lt;&lt; 16) &lt;&lt; 16) | tag0;</div><div class='add'>+	return (void *)addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int be_mcc_compl_process(struct be_adapter *adapter,</div><div class='del'>-	struct be_mcc_compl *compl)</div><div class='add'>+				struct be_mcc_compl *compl)</div><div class='ctx'> {</div><div class='ctx'> 	u16 compl_status, extd_status;</div><div class='add'>+	struct be_cmd_resp_hdr *resp_hdr;</div><div class='add'>+	u8 opcode = 0, subsystem = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Just swap the status to host endian; mcc tag is opaquely copied</div><div class='ctx'> 	 * from mcc_wrb */</div><div class='hunk'>@@ -73,32 +85,36 @@ static int be_mcc_compl_process(struct be_adapter *adapter,</div><div class='ctx'> 	compl_status = (compl-&gt;status &gt;&gt; CQE_STATUS_COMPL_SHIFT) &amp;</div><div class='ctx'> 				CQE_STATUS_COMPL_MASK;</div><div class='ctx'> </div><div class='del'>-	if (((compl-&gt;tag0 == OPCODE_COMMON_WRITE_FLASHROM) ||</div><div class='del'>-		(compl-&gt;tag0 == OPCODE_COMMON_WRITE_OBJECT)) &amp;&amp;</div><div class='del'>-		(compl-&gt;tag1 == CMD_SUBSYSTEM_COMMON)) {</div><div class='add'>+	resp_hdr = be_decode_resp_hdr(compl-&gt;tag0, compl-&gt;tag1);</div><div class='add'>+</div><div class='add'>+	if (resp_hdr) {</div><div class='add'>+		opcode = resp_hdr-&gt;opcode;</div><div class='add'>+		subsystem = resp_hdr-&gt;subsystem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (((opcode == OPCODE_COMMON_WRITE_FLASHROM) ||</div><div class='add'>+	     (opcode == OPCODE_COMMON_WRITE_OBJECT)) &amp;&amp;</div><div class='add'>+	    (subsystem == CMD_SUBSYSTEM_COMMON)) {</div><div class='ctx'> 		adapter-&gt;flash_status = compl_status;</div><div class='ctx'> 		complete(&amp;adapter-&gt;flash_compl);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (compl_status == MCC_STATUS_SUCCESS) {</div><div class='del'>-		if (((compl-&gt;tag0 == OPCODE_ETH_GET_STATISTICS) ||</div><div class='del'>-			 (compl-&gt;tag0 == OPCODE_ETH_GET_PPORT_STATS)) &amp;&amp;</div><div class='del'>-			(compl-&gt;tag1 == CMD_SUBSYSTEM_ETH)) {</div><div class='add'>+		if (((opcode == OPCODE_ETH_GET_STATISTICS) ||</div><div class='add'>+		     (opcode == OPCODE_ETH_GET_PPORT_STATS)) &amp;&amp;</div><div class='add'>+		    (subsystem == CMD_SUBSYSTEM_ETH)) {</div><div class='ctx'> 			be_parse_stats(adapter);</div><div class='ctx'> 			adapter-&gt;stats_cmd_sent = false;</div><div class='ctx'> 		}</div><div class='del'>-		if (compl-&gt;tag0 ==</div><div class='del'>-				OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES) {</div><div class='del'>-			struct be_mcc_wrb *mcc_wrb =</div><div class='del'>-				queue_index_node(&amp;adapter-&gt;mcc_obj.q,</div><div class='del'>-						compl-&gt;tag1);</div><div class='add'>+		if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES &amp;&amp;</div><div class='add'>+		    subsystem == CMD_SUBSYSTEM_COMMON) {</div><div class='ctx'> 			struct be_cmd_resp_get_cntl_addnl_attribs *resp =</div><div class='del'>-				embedded_payload(mcc_wrb);</div><div class='add'>+				(void *)resp_hdr;</div><div class='ctx'> 			adapter-&gt;drv_stats.be_on_die_temperature =</div><div class='ctx'> 				resp-&gt;on_die_temperature;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		if (compl-&gt;tag0 == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES)</div><div class='add'>+		if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES)</div><div class='ctx'> 			be_get_temp_freq = 0;</div><div class='ctx'> </div><div class='ctx'> 		if (compl_status == MCC_STATUS_NOT_SUPPORTED ||</div><div class='hunk'>@@ -108,13 +124,13 @@ static int be_mcc_compl_process(struct be_adapter *adapter,</div><div class='ctx'> 		if (compl_status == MCC_STATUS_UNAUTHORIZED_REQUEST) {</div><div class='ctx'> 			dev_warn(&amp;adapter-&gt;pdev-&gt;dev, "This domain(VM) is not "</div><div class='ctx'> 				"permitted to execute this cmd (opcode %d)\n",</div><div class='del'>-				compl-&gt;tag0);</div><div class='add'>+				opcode);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			extd_status = (compl-&gt;status &gt;&gt; CQE_STATUS_EXTD_SHIFT) &amp;</div><div class='ctx'> 					CQE_STATUS_EXTD_MASK;</div><div class='ctx'> 			dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Cmd (opcode %d) failed:"</div><div class='ctx'> 				"status %d, extd-status %d\n",</div><div class='del'>-				compl-&gt;tag0, compl_status, extd_status);</div><div class='add'>+				opcode, compl_status, extd_status);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> done:</div><div class='hunk'>@@ -126,7 +142,7 @@ static void be_async_link_state_process(struct be_adapter *adapter,</div><div class='ctx'> 		struct be_async_event_link_state *evt)</div><div class='ctx'> {</div><div class='ctx'> 	/* When link status changes, link speed must be re-queried from FW */</div><div class='del'>-	adapter-&gt;link_speed = -1;</div><div class='add'>+	adapter-&gt;phy.link_speed = -1;</div><div class='ctx'> </div><div class='ctx'> 	/* For the initial link status do not rely on the ASYNC event as</div><div class='ctx'> 	 * it may not be received in some cases.</div><div class='hunk'>@@ -153,7 +169,7 @@ static void be_async_grp5_qos_speed_process(struct be_adapter *adapter,</div><div class='ctx'> {</div><div class='ctx'> 	if (evt-&gt;physical_port == adapter-&gt;port_num) {</div><div class='ctx'> 		/* qos_link_speed is in units of 10 Mbps */</div><div class='del'>-		adapter-&gt;link_speed = evt-&gt;qos_link_speed * 10;</div><div class='add'>+		adapter-&gt;phy.link_speed = evt-&gt;qos_link_speed * 10;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -286,7 +302,7 @@ static int be_mcc_wait_compl(struct be_adapter *adapter)</div><div class='ctx'> 	if (i == mcc_timeout) {</div><div class='ctx'> 		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "FW not responding\n");</div><div class='ctx'> 		adapter-&gt;fw_timeout = true;</div><div class='del'>-		return -1;</div><div class='add'>+		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='hunk'>@@ -294,8 +310,26 @@ static int be_mcc_wait_compl(struct be_adapter *adapter)</div><div class='ctx'> /* Notify MCC requests and wait for completion */</div><div class='ctx'> static int be_mcc_notify_wait(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='add'>+	int status;</div><div class='add'>+	struct be_mcc_wrb *wrb;</div><div class='add'>+	struct be_mcc_obj *mcc_obj = &amp;adapter-&gt;mcc_obj;</div><div class='add'>+	u16 index = mcc_obj-&gt;q.head;</div><div class='add'>+	struct be_cmd_resp_hdr *resp;</div><div class='add'>+</div><div class='add'>+	index_dec(&amp;index, mcc_obj-&gt;q.len);</div><div class='add'>+	wrb = queue_index_node(&amp;mcc_obj-&gt;q, index);</div><div class='add'>+</div><div class='add'>+	resp = be_decode_resp_hdr(wrb-&gt;tag0, wrb-&gt;tag1);</div><div class='add'>+</div><div class='ctx'> 	be_mcc_notify(adapter);</div><div class='del'>-	return be_mcc_wait_compl(adapter);</div><div class='add'>+</div><div class='add'>+	status = be_mcc_wait_compl(adapter);</div><div class='add'>+	if (status == -EIO)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	status = resp-&gt;status;</div><div class='add'>+out:</div><div class='add'>+	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db)</div><div class='hunk'>@@ -435,14 +469,17 @@ static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,</div><div class='ctx'> 				struct be_mcc_wrb *wrb, struct be_dma_mem *mem)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_sge *sge;</div><div class='add'>+	unsigned long addr = (unsigned long)req_hdr;</div><div class='add'>+	u64 req_addr = addr;</div><div class='ctx'> </div><div class='ctx'> 	req_hdr-&gt;opcode = opcode;</div><div class='ctx'> 	req_hdr-&gt;subsystem = subsystem;</div><div class='ctx'> 	req_hdr-&gt;request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr));</div><div class='ctx'> 	req_hdr-&gt;version = 0;</div><div class='ctx'> </div><div class='del'>-	wrb-&gt;tag0 = opcode;</div><div class='del'>-	wrb-&gt;tag1 = subsystem;</div><div class='add'>+	wrb-&gt;tag0 = req_addr &amp; 0xFFFFFFFF;</div><div class='add'>+	wrb-&gt;tag1 = upper_32_bits(req_addr);</div><div class='add'>+</div><div class='ctx'> 	wrb-&gt;payload_length = cmd_len;</div><div class='ctx'> 	if (mem) {</div><div class='ctx'> 		wrb-&gt;embedded |= (1 &amp; MCC_WRB_SGE_CNT_MASK) &lt;&lt;</div><div class='hunk'>@@ -1221,7 +1258,7 @@ int lancer_cmd_get_pport_stats(struct be_adapter *adapter,</div><div class='ctx'> 			OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd-&gt;size, wrb,</div><div class='ctx'> 			nonemb_cmd);</div><div class='ctx'> </div><div class='del'>-	req-&gt;cmd_params.params.pport_num = cpu_to_le16(adapter-&gt;port_num);</div><div class='add'>+	req-&gt;cmd_params.params.pport_num = cpu_to_le16(adapter-&gt;hba_port_num);</div><div class='ctx'> 	req-&gt;cmd_params.params.reset_stats = 0;</div><div class='ctx'> </div><div class='ctx'> 	be_mcc_notify(adapter);</div><div class='hunk'>@@ -1283,13 +1320,10 @@ int be_cmd_get_die_temperature(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_mcc_wrb *wrb;</div><div class='ctx'> 	struct be_cmd_req_get_cntl_addnl_attribs *req;</div><div class='del'>-	u16 mccq_index;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='del'>-	mccq_index = adapter-&gt;mcc_obj.q.head;</div><div class='del'>-</div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='ctx'> 		status = -EBUSY;</div><div class='hunk'>@@ -1301,8 +1335,6 @@ int be_cmd_get_die_temperature(struct be_adapter *adapter)</div><div class='ctx'> 		OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req),</div><div class='ctx'> 		wrb, NULL);</div><div class='ctx'> </div><div class='del'>-	wrb-&gt;tag1 = mccq_index;</div><div class='del'>-</div><div class='ctx'> 	be_mcc_notify(adapter);</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='hunk'>@@ -1824,18 +1856,16 @@ int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd,</div><div class='ctx'> 	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (!wait_for_completion_timeout(&amp;adapter-&gt;flash_compl,</div><div class='del'>-			msecs_to_jiffies(12000)))</div><div class='add'>+					 msecs_to_jiffies(30000)))</div><div class='ctx'> 		status = -1;</div><div class='ctx'> 	else</div><div class='ctx'> 		status = adapter-&gt;flash_status;</div><div class='ctx'> </div><div class='ctx'> 	resp = embedded_payload(wrb);</div><div class='del'>-	if (!status) {</div><div class='add'>+	if (!status)</div><div class='ctx'> 		*data_written = le32_to_cpu(resp-&gt;actual_write_len);</div><div class='del'>-	} else {</div><div class='add'>+	else</div><div class='ctx'> 		*addn_status = resp-&gt;additional_status;</div><div class='del'>-		status = resp-&gt;status;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> </div><div class='hunk'>@@ -1950,7 +1980,7 @@ int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,</div><div class='ctx'> 	be_wrb_cmd_hdr_prepare(&amp;req-&gt;hdr, CMD_SUBSYSTEM_COMMON,</div><div class='ctx'> 		OPCODE_COMMON_READ_FLASHROM, sizeof(*req)+4, wrb, NULL);</div><div class='ctx'> </div><div class='del'>-	req-&gt;params.op_type = cpu_to_le32(IMG_TYPE_REDBOOT);</div><div class='add'>+	req-&gt;params.op_type = cpu_to_le32(OPTYPE_REDBOOT);</div><div class='ctx'> 	req-&gt;params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT);</div><div class='ctx'> 	req-&gt;params.offset = cpu_to_le32(offset);</div><div class='ctx'> 	req-&gt;params.data_buf_size = cpu_to_le32(0x4);</div><div class='hunk'>@@ -2136,8 +2166,7 @@ err:</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int be_cmd_get_phy_info(struct be_adapter *adapter,</div><div class='del'>-				struct be_phy_info *phy_info)</div><div class='add'>+int be_cmd_get_phy_info(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_mcc_wrb *wrb;</div><div class='ctx'> 	struct be_cmd_req_get_phy_info *req;</div><div class='hunk'>@@ -2170,9 +2199,15 @@ int be_cmd_get_phy_info(struct be_adapter *adapter,</div><div class='ctx'> 	if (!status) {</div><div class='ctx'> 		struct be_phy_info *resp_phy_info =</div><div class='ctx'> 				cmd.va + sizeof(struct be_cmd_req_hdr);</div><div class='del'>-		phy_info-&gt;phy_type = le16_to_cpu(resp_phy_info-&gt;phy_type);</div><div class='del'>-		phy_info-&gt;interface_type =</div><div class='add'>+		adapter-&gt;phy.phy_type = le16_to_cpu(resp_phy_info-&gt;phy_type);</div><div class='add'>+		adapter-&gt;phy.interface_type =</div><div class='ctx'> 			le16_to_cpu(resp_phy_info-&gt;interface_type);</div><div class='add'>+		adapter-&gt;phy.auto_speeds_supported =</div><div class='add'>+			le16_to_cpu(resp_phy_info-&gt;auto_speeds_supported);</div><div class='add'>+		adapter-&gt;phy.fixed_speeds_supported =</div><div class='add'>+			le16_to_cpu(resp_phy_info-&gt;fixed_speeds_supported);</div><div class='add'>+		adapter-&gt;phy.misc_params =</div><div class='add'>+			le32_to_cpu(resp_phy_info-&gt;misc_params);</div><div class='ctx'> 	}</div><div class='ctx'> 	pci_free_consistent(adapter-&gt;pdev, cmd.size,</div><div class='ctx'> 				cmd.va, cmd.dma);</div><div class='hunk'>@@ -2555,4 +2590,98 @@ err:</div><div class='ctx'> 	mutex_unlock(&amp;adapter-&gt;mbox_lock);</div><div class='ctx'> 	pci_free_consistent(adapter-&gt;pdev, cmd.size, cmd.va, cmd.dma);</div><div class='ctx'> 	return status;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,</div><div class='add'>+				   struct be_dma_mem *cmd)</div><div class='add'>+{</div><div class='add'>+	struct be_mcc_wrb *wrb;</div><div class='add'>+	struct be_cmd_req_get_ext_fat_caps *req;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	if (mutex_lock_interruptible(&amp;adapter-&gt;mbox_lock))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	wrb = wrb_from_mbox(adapter);</div><div class='add'>+	if (!wrb) {</div><div class='add'>+		status = -EBUSY;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	req = cmd-&gt;va;</div><div class='add'>+	be_wrb_cmd_hdr_prepare(&amp;req-&gt;hdr, CMD_SUBSYSTEM_COMMON,</div><div class='add'>+			       OPCODE_COMMON_GET_EXT_FAT_CAPABILITES,</div><div class='add'>+			       cmd-&gt;size, wrb, cmd);</div><div class='add'>+	req-&gt;parameter_type = cpu_to_le32(1);</div><div class='add'>+</div><div class='add'>+	status = be_mbox_notify_wait(adapter);</div><div class='add'>+err:</div><div class='add'>+	mutex_unlock(&amp;adapter-&gt;mbox_lock);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,</div><div class='add'>+				   struct be_dma_mem *cmd,</div><div class='add'>+				   struct be_fat_conf_params *configs)</div><div class='add'>+{</div><div class='add'>+	struct be_mcc_wrb *wrb;</div><div class='add'>+	struct be_cmd_req_set_ext_fat_caps *req;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+</div><div class='add'>+	wrb = wrb_from_mccq(adapter);</div><div class='add'>+	if (!wrb) {</div><div class='add'>+		status = -EBUSY;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	req = cmd-&gt;va;</div><div class='add'>+	memcpy(&amp;req-&gt;set_params, configs, sizeof(struct be_fat_conf_params));</div><div class='add'>+	be_wrb_cmd_hdr_prepare(&amp;req-&gt;hdr, CMD_SUBSYSTEM_COMMON,</div><div class='add'>+			       OPCODE_COMMON_SET_EXT_FAT_CAPABILITES,</div><div class='add'>+			       cmd-&gt;size, wrb, cmd);</div><div class='add'>+</div><div class='add'>+	status = be_mcc_notify_wait(adapter);</div><div class='add'>+err:</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload,</div><div class='add'>+			int wrb_payload_size, u16 *cmd_status, u16 *ext_status)</div><div class='add'>+{</div><div class='add'>+	struct be_adapter *adapter = netdev_priv(netdev_handle);</div><div class='add'>+	struct be_mcc_wrb *wrb;</div><div class='add'>+	struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *) wrb_payload;</div><div class='add'>+	struct be_cmd_req_hdr *req;</div><div class='add'>+	struct be_cmd_resp_hdr *resp;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+</div><div class='add'>+	wrb = wrb_from_mccq(adapter);</div><div class='add'>+	if (!wrb) {</div><div class='add'>+		status = -EBUSY;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	req = embedded_payload(wrb);</div><div class='add'>+	resp = embedded_payload(wrb);</div><div class='add'>+</div><div class='add'>+	be_wrb_cmd_hdr_prepare(req, hdr-&gt;subsystem,</div><div class='add'>+			       hdr-&gt;opcode, wrb_payload_size, wrb, NULL);</div><div class='add'>+	memcpy(req, wrb_payload, wrb_payload_size);</div><div class='add'>+	be_dws_cpu_to_le(req, wrb_payload_size);</div><div class='add'>+</div><div class='add'>+	status = be_mcc_notify_wait(adapter);</div><div class='add'>+	if (cmd_status)</div><div class='add'>+		*cmd_status = (status &amp; 0xffff);</div><div class='add'>+	if (ext_status)</div><div class='add'>+		*ext_status = 0;</div><div class='add'>+	memcpy(wrb_payload, resp, sizeof(*resp) + resp-&gt;response_length);</div><div class='add'>+	be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp-&gt;response_length);</div><div class='add'>+err:</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	return status;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(be_roce_mcc_cmd);</div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be_cmds.h b/drivers/net/ethernet/emulex/benet/be_cmds.h<br/>index d5b680c56af0..9625bf420c16 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be_cmds.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/emulex/benet/be_cmds.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be_cmds.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_cmds.h</a></div><div class='hunk'>@@ -189,6 +189,8 @@ struct be_mcc_mailbox {</div><div class='ctx'> #define OPCODE_COMMON_GET_PHY_DETAILS			102</div><div class='ctx'> #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP		103</div><div class='ctx'> #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES	121</div><div class='add'>+#define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES		125</div><div class='add'>+#define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES		126</div><div class='ctx'> #define OPCODE_COMMON_GET_MAC_LIST			147</div><div class='ctx'> #define OPCODE_COMMON_SET_MAC_LIST			148</div><div class='ctx'> #define OPCODE_COMMON_GET_HSW_CONFIG			152</div><div class='hunk'>@@ -225,8 +227,12 @@ struct be_cmd_req_hdr {</div><div class='ctx'> #define RESP_HDR_INFO_OPCODE_SHIFT	0	/* bits 0 - 7 */</div><div class='ctx'> #define RESP_HDR_INFO_SUBSYS_SHIFT	8 	/* bits 8 - 15 */</div><div class='ctx'> struct be_cmd_resp_hdr {</div><div class='del'>-	u32 info;		/* dword 0 */</div><div class='del'>-	u32 status;		/* dword 1 */</div><div class='add'>+	u8 opcode;		/* dword 0 */</div><div class='add'>+	u8 subsystem;		/* dword 0 */</div><div class='add'>+	u8 rsvd[2];		/* dword 0 */</div><div class='add'>+	u8 status;		/* dword 1 */</div><div class='add'>+	u8 add_status;		/* dword 1 */</div><div class='add'>+	u8 rsvd1[2];		/* dword 1 */</div><div class='ctx'> 	u32 response_length;	/* dword 2 */</div><div class='ctx'> 	u32 actual_resp_len;	/* dword 3 */</div><div class='ctx'> };</div><div class='hunk'>@@ -1056,6 +1062,7 @@ struct be_cmd_resp_modify_eq_delay {</div><div class='ctx'> /* The HW can come up in either of the following multi-channel modes</div><div class='ctx'>  * based on the skew/IPL.</div><div class='ctx'>  */</div><div class='add'>+#define RDMA_ENABLED				0x4</div><div class='ctx'> #define FLEX10_MODE				0x400</div><div class='ctx'> #define VNIC_MODE				0x20000</div><div class='ctx'> #define UMC_ENABLED				0x1000000</div><div class='hunk'>@@ -1309,9 +1316,36 @@ enum {</div><div class='ctx'> 	PHY_TYPE_KX4_10GB,</div><div class='ctx'> 	PHY_TYPE_BASET_10GB,</div><div class='ctx'> 	PHY_TYPE_BASET_1GB,</div><div class='add'>+	PHY_TYPE_BASEX_1GB,</div><div class='add'>+	PHY_TYPE_SGMII,</div><div class='ctx'> 	PHY_TYPE_DISABLED = 255</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define BE_SUPPORTED_SPEED_NONE		0</div><div class='add'>+#define BE_SUPPORTED_SPEED_10MBPS	1</div><div class='add'>+#define BE_SUPPORTED_SPEED_100MBPS	2</div><div class='add'>+#define BE_SUPPORTED_SPEED_1GBPS	4</div><div class='add'>+#define BE_SUPPORTED_SPEED_10GBPS	8</div><div class='add'>+</div><div class='add'>+#define BE_AN_EN			0x2</div><div class='add'>+#define BE_PAUSE_SYM_EN			0x80</div><div class='add'>+</div><div class='add'>+/* MAC speed valid values */</div><div class='add'>+#define SPEED_DEFAULT  0x0</div><div class='add'>+#define SPEED_FORCED_10GB  0x1</div><div class='add'>+#define SPEED_FORCED_1GB  0x2</div><div class='add'>+#define SPEED_AUTONEG_10GB  0x3</div><div class='add'>+#define SPEED_AUTONEG_1GB  0x4</div><div class='add'>+#define SPEED_AUTONEG_100MB  0x5</div><div class='add'>+#define SPEED_AUTONEG_10GB_1GB 0x6</div><div class='add'>+#define SPEED_AUTONEG_10GB_1GB_100MB 0x7</div><div class='add'>+#define SPEED_AUTONEG_1GB_100MB  0x8</div><div class='add'>+#define SPEED_AUTONEG_10MB  0x9</div><div class='add'>+#define SPEED_AUTONEG_1GB_100MB_10MB 0xa</div><div class='add'>+#define SPEED_AUTONEG_100MB_10MB 0xb</div><div class='add'>+#define SPEED_FORCED_100MB  0xc</div><div class='add'>+#define SPEED_FORCED_10MB  0xd</div><div class='add'>+</div><div class='ctx'> struct be_cmd_req_get_phy_info {</div><div class='ctx'> 	struct be_cmd_req_hdr hdr;</div><div class='ctx'> 	u8 rsvd0[24];</div><div class='hunk'>@@ -1321,7 +1355,11 @@ struct be_phy_info {</div><div class='ctx'> 	u16 phy_type;</div><div class='ctx'> 	u16 interface_type;</div><div class='ctx'> 	u32 misc_params;</div><div class='del'>-	u32 future_use[4];</div><div class='add'>+	u16 ext_phy_details;</div><div class='add'>+	u16 rsvd;</div><div class='add'>+	u16 auto_speeds_supported;</div><div class='add'>+	u16 fixed_speeds_supported;</div><div class='add'>+	u32 future_use[2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct be_cmd_resp_get_phy_info {</div><div class='hunk'>@@ -1567,6 +1605,56 @@ static inline void *be_erx_stats_from_cmd(struct be_adapter *adapter)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+/************** get fat capabilites *******************/</div><div class='add'>+#define MAX_MODULES 27</div><div class='add'>+#define MAX_MODES 4</div><div class='add'>+#define MODE_UART 0</div><div class='add'>+#define FW_LOG_LEVEL_DEFAULT 48</div><div class='add'>+#define FW_LOG_LEVEL_FATAL 64</div><div class='add'>+</div><div class='add'>+struct ext_fat_mode {</div><div class='add'>+	u8 mode;</div><div class='add'>+	u8 rsvd0;</div><div class='add'>+	u16 port_mask;</div><div class='add'>+	u32 dbg_lvl;</div><div class='add'>+	u64 fun_mask;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ext_fat_modules {</div><div class='add'>+	u8 modules_str[32];</div><div class='add'>+	u32 modules_id;</div><div class='add'>+	u32 num_modes;</div><div class='add'>+	struct ext_fat_mode trace_lvl[MAX_MODES];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct be_fat_conf_params {</div><div class='add'>+	u32 max_log_entries;</div><div class='add'>+	u32 log_entry_size;</div><div class='add'>+	u8 log_type;</div><div class='add'>+	u8 max_log_funs;</div><div class='add'>+	u8 max_log_ports;</div><div class='add'>+	u8 rsvd0;</div><div class='add'>+	u32 supp_modes;</div><div class='add'>+	u32 num_modules;</div><div class='add'>+	struct ext_fat_modules module[MAX_MODULES];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct be_cmd_req_get_ext_fat_caps {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	u32 parameter_type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct be_cmd_resp_get_ext_fat_caps {</div><div class='add'>+	struct be_cmd_resp_hdr hdr;</div><div class='add'>+	struct be_fat_conf_params get_params;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct be_cmd_req_set_ext_fat_caps {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	struct be_fat_conf_params set_params;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> extern int be_pci_fnum_get(struct be_adapter *adapter);</div><div class='ctx'> extern int be_cmd_POST(struct be_adapter *adapter);</div><div class='ctx'> extern int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,</div><div class='hunk'>@@ -1655,8 +1743,7 @@ extern int be_cmd_get_seeprom_data(struct be_adapter *adapter,</div><div class='ctx'> 				struct be_dma_mem *nonemb_cmd);</div><div class='ctx'> extern int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,</div><div class='ctx'> 				u8 loopback_type, u8 enable);</div><div class='del'>-extern int be_cmd_get_phy_info(struct be_adapter *adapter,</div><div class='del'>-				struct be_phy_info *phy_info);</div><div class='add'>+extern int be_cmd_get_phy_info(struct be_adapter *adapter);</div><div class='ctx'> extern int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain);</div><div class='ctx'> extern void be_detect_dump_ue(struct be_adapter *adapter);</div><div class='ctx'> extern int be_cmd_get_die_temperature(struct be_adapter *adapter);</div><div class='hunk'>@@ -1673,4 +1760,9 @@ extern int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid,</div><div class='ctx'> extern int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid,</div><div class='ctx'> 			u32 domain, u16 intf_id);</div><div class='ctx'> extern int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter);</div><div class='add'>+extern int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,</div><div class='add'>+					  struct be_dma_mem *cmd);</div><div class='add'>+extern int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,</div><div class='add'>+					  struct be_dma_mem *cmd,</div><div class='add'>+					  struct be_fat_conf_params *cfgs);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be_ethtool.c b/drivers/net/ethernet/emulex/benet/be_ethtool.c<br/>index c1ff73cb0e62..63e51d476900 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be_ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/emulex/benet/be_ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_ethtool.c</a></div><div class='hunk'>@@ -433,102 +433,193 @@ static int be_get_sset_count(struct net_device *netdev, int stringset)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 be_get_port_type(u32 phy_type, u32 dac_cable_len)</div><div class='add'>+{</div><div class='add'>+	u32 port;</div><div class='add'>+</div><div class='add'>+	switch (phy_type) {</div><div class='add'>+	case PHY_TYPE_BASET_1GB:</div><div class='add'>+	case PHY_TYPE_BASEX_1GB:</div><div class='add'>+	case PHY_TYPE_SGMII:</div><div class='add'>+		port = PORT_TP;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_TYPE_SFP_PLUS_10GB:</div><div class='add'>+		port = dac_cable_len ? PORT_DA : PORT_FIBRE;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_TYPE_XFP_10GB:</div><div class='add'>+	case PHY_TYPE_SFP_1GB:</div><div class='add'>+		port = PORT_FIBRE;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_TYPE_BASET_10GB:</div><div class='add'>+		port = PORT_TP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		port = PORT_OTHER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return port;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 convert_to_et_setting(u32 if_type, u32 if_speeds)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	switch (if_type) {</div><div class='add'>+	case PHY_TYPE_BASET_1GB:</div><div class='add'>+	case PHY_TYPE_BASEX_1GB:</div><div class='add'>+	case PHY_TYPE_SGMII:</div><div class='add'>+		val |= SUPPORTED_TP;</div><div class='add'>+		if (if_speeds &amp; BE_SUPPORTED_SPEED_1GBPS)</div><div class='add'>+			val |= SUPPORTED_1000baseT_Full;</div><div class='add'>+		if (if_speeds &amp; BE_SUPPORTED_SPEED_100MBPS)</div><div class='add'>+			val |= SUPPORTED_100baseT_Full;</div><div class='add'>+		if (if_speeds &amp; BE_SUPPORTED_SPEED_10MBPS)</div><div class='add'>+			val |= SUPPORTED_10baseT_Full;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_TYPE_KX4_10GB:</div><div class='add'>+		val |= SUPPORTED_Backplane;</div><div class='add'>+		if (if_speeds &amp; BE_SUPPORTED_SPEED_1GBPS)</div><div class='add'>+			val |= SUPPORTED_1000baseKX_Full;</div><div class='add'>+		if (if_speeds &amp; BE_SUPPORTED_SPEED_10GBPS)</div><div class='add'>+			val |= SUPPORTED_10000baseKX4_Full;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_TYPE_KR_10GB:</div><div class='add'>+		val |= SUPPORTED_Backplane |</div><div class='add'>+				SUPPORTED_10000baseKR_Full;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_TYPE_SFP_PLUS_10GB:</div><div class='add'>+	case PHY_TYPE_XFP_10GB:</div><div class='add'>+	case PHY_TYPE_SFP_1GB:</div><div class='add'>+		val |= SUPPORTED_FIBRE;</div><div class='add'>+		if (if_speeds &amp; BE_SUPPORTED_SPEED_10GBPS)</div><div class='add'>+			val |= SUPPORTED_10000baseT_Full;</div><div class='add'>+		if (if_speeds &amp; BE_SUPPORTED_SPEED_1GBPS)</div><div class='add'>+			val |= SUPPORTED_1000baseT_Full;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_TYPE_BASET_10GB:</div><div class='add'>+		val |= SUPPORTED_TP;</div><div class='add'>+		if (if_speeds &amp; BE_SUPPORTED_SPEED_10GBPS)</div><div class='add'>+			val |= SUPPORTED_10000baseT_Full;</div><div class='add'>+		if (if_speeds &amp; BE_SUPPORTED_SPEED_1GBPS)</div><div class='add'>+			val |= SUPPORTED_1000baseT_Full;</div><div class='add'>+		if (if_speeds &amp; BE_SUPPORTED_SPEED_100MBPS)</div><div class='add'>+			val |= SUPPORTED_100baseT_Full;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		val |= SUPPORTED_TP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int convert_to_et_speed(u32 be_speed)</div><div class='add'>+{</div><div class='add'>+	int et_speed = SPEED_10000;</div><div class='add'>+</div><div class='add'>+	switch (be_speed) {</div><div class='add'>+	case PHY_LINK_SPEED_10MBPS:</div><div class='add'>+		et_speed = SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_LINK_SPEED_100MBPS:</div><div class='add'>+		et_speed = SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_LINK_SPEED_1GBPS:</div><div class='add'>+		et_speed = SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_LINK_SPEED_10GBPS:</div><div class='add'>+		et_speed = SPEED_10000;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return et_speed;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool be_pause_supported(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return (adapter-&gt;phy.interface_type == PHY_TYPE_SFP_PLUS_10GB ||</div><div class='add'>+		adapter-&gt;phy.interface_type == PHY_TYPE_XFP_10GB) ?</div><div class='add'>+		false : true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int be_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	struct be_phy_info phy_info;</div><div class='del'>-	u8 mac_speed = 0;</div><div class='add'>+	u8 port_speed = 0;</div><div class='ctx'> 	u16 link_speed = 0;</div><div class='ctx'> 	u8 link_status;</div><div class='add'>+	u32 et_speed = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	if ((adapter-&gt;link_speed &lt; 0) || (!(netdev-&gt;flags &amp; IFF_UP))) {</div><div class='del'>-		status = be_cmd_link_status_query(adapter, &amp;mac_speed,</div><div class='del'>-						  &amp;link_speed, &amp;link_status, 0);</div><div class='del'>-		if (!status)</div><div class='del'>-			be_link_status_update(adapter, link_status);</div><div class='del'>-</div><div class='del'>-		/* link_speed is in units of 10 Mbps */</div><div class='del'>-		if (link_speed) {</div><div class='del'>-			ethtool_cmd_speed_set(ecmd, link_speed*10);</div><div class='add'>+	if (adapter-&gt;phy.link_speed &lt; 0 || !(netdev-&gt;flags &amp; IFF_UP)) {</div><div class='add'>+		if (adapter-&gt;phy.forced_port_speed &lt; 0) {</div><div class='add'>+			status = be_cmd_link_status_query(adapter, &amp;port_speed,</div><div class='add'>+						&amp;link_speed, &amp;link_status, 0);</div><div class='add'>+			if (!status)</div><div class='add'>+				be_link_status_update(adapter, link_status);</div><div class='add'>+			if (link_speed)</div><div class='add'>+				et_speed = link_speed * 10;</div><div class='add'>+			else if (link_status)</div><div class='add'>+				et_speed = convert_to_et_speed(port_speed);</div><div class='ctx'> 		} else {</div><div class='del'>-			switch (mac_speed) {</div><div class='del'>-			case PHY_LINK_SPEED_10MBPS:</div><div class='del'>-				ethtool_cmd_speed_set(ecmd, SPEED_10);</div><div class='del'>-				break;</div><div class='del'>-			case PHY_LINK_SPEED_100MBPS:</div><div class='del'>-				ethtool_cmd_speed_set(ecmd, SPEED_100);</div><div class='del'>-				break;</div><div class='del'>-			case PHY_LINK_SPEED_1GBPS:</div><div class='del'>-				ethtool_cmd_speed_set(ecmd, SPEED_1000);</div><div class='del'>-				break;</div><div class='del'>-			case PHY_LINK_SPEED_10GBPS:</div><div class='del'>-				ethtool_cmd_speed_set(ecmd, SPEED_10000);</div><div class='del'>-				break;</div><div class='del'>-			case PHY_LINK_SPEED_ZERO:</div><div class='del'>-				ethtool_cmd_speed_set(ecmd, 0);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='add'>+			et_speed = adapter-&gt;phy.forced_port_speed;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		status = be_cmd_get_phy_info(adapter, &amp;phy_info);</div><div class='del'>-		if (!status) {</div><div class='del'>-			switch (phy_info.interface_type) {</div><div class='del'>-			case PHY_TYPE_XFP_10GB:</div><div class='del'>-			case PHY_TYPE_SFP_1GB:</div><div class='del'>-			case PHY_TYPE_SFP_PLUS_10GB:</div><div class='del'>-				ecmd-&gt;port = PORT_FIBRE;</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				ecmd-&gt;port = PORT_TP;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='add'>+		ethtool_cmd_speed_set(ecmd, et_speed);</div><div class='add'>+</div><div class='add'>+		status = be_cmd_get_phy_info(adapter);</div><div class='add'>+		if (status)</div><div class='add'>+			return status;</div><div class='add'>+</div><div class='add'>+		ecmd-&gt;supported =</div><div class='add'>+			convert_to_et_setting(adapter-&gt;phy.interface_type,</div><div class='add'>+					adapter-&gt;phy.auto_speeds_supported |</div><div class='add'>+					adapter-&gt;phy.fixed_speeds_supported);</div><div class='add'>+		ecmd-&gt;advertising =</div><div class='add'>+			convert_to_et_setting(adapter-&gt;phy.interface_type,</div><div class='add'>+					adapter-&gt;phy.auto_speeds_supported);</div><div class='add'>+</div><div class='add'>+		ecmd-&gt;port = be_get_port_type(adapter-&gt;phy.interface_type,</div><div class='add'>+					      adapter-&gt;phy.dac_cable_len);</div><div class='add'>+</div><div class='add'>+		if (adapter-&gt;phy.auto_speeds_supported) {</div><div class='add'>+			ecmd-&gt;supported |= SUPPORTED_Autoneg;</div><div class='add'>+			ecmd-&gt;autoneg = AUTONEG_ENABLE;</div><div class='add'>+			ecmd-&gt;advertising |= ADVERTISED_Autoneg;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			switch (phy_info.interface_type) {</div><div class='del'>-			case PHY_TYPE_KR_10GB:</div><div class='del'>-			case PHY_TYPE_KX4_10GB:</div><div class='del'>-				ecmd-&gt;autoneg = AUTONEG_ENABLE;</div><div class='add'>+		if (be_pause_supported(adapter)) {</div><div class='add'>+			ecmd-&gt;supported |= SUPPORTED_Pause;</div><div class='add'>+			ecmd-&gt;advertising |= ADVERTISED_Pause;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (adapter-&gt;phy.interface_type) {</div><div class='add'>+		case PHY_TYPE_KR_10GB:</div><div class='add'>+		case PHY_TYPE_KX4_10GB:</div><div class='ctx'> 			ecmd-&gt;transceiver = XCVR_INTERNAL;</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				ecmd-&gt;autoneg = AUTONEG_DISABLE;</div><div class='del'>-				ecmd-&gt;transceiver = XCVR_EXTERNAL;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			ecmd-&gt;transceiver = XCVR_EXTERNAL;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Save for future use */</div><div class='del'>-		adapter-&gt;link_speed = ethtool_cmd_speed(ecmd);</div><div class='del'>-		adapter-&gt;port_type = ecmd-&gt;port;</div><div class='del'>-		adapter-&gt;transceiver = ecmd-&gt;transceiver;</div><div class='del'>-		adapter-&gt;autoneg = ecmd-&gt;autoneg;</div><div class='add'>+		adapter-&gt;phy.link_speed = ethtool_cmd_speed(ecmd);</div><div class='add'>+		adapter-&gt;phy.port_type = ecmd-&gt;port;</div><div class='add'>+		adapter-&gt;phy.transceiver = ecmd-&gt;transceiver;</div><div class='add'>+		adapter-&gt;phy.autoneg = ecmd-&gt;autoneg;</div><div class='add'>+		adapter-&gt;phy.advertising = ecmd-&gt;advertising;</div><div class='add'>+		adapter-&gt;phy.supported = ecmd-&gt;supported;</div><div class='ctx'> 	} else {</div><div class='del'>-		ethtool_cmd_speed_set(ecmd, adapter-&gt;link_speed);</div><div class='del'>-		ecmd-&gt;port = adapter-&gt;port_type;</div><div class='del'>-		ecmd-&gt;transceiver = adapter-&gt;transceiver;</div><div class='del'>-		ecmd-&gt;autoneg = adapter-&gt;autoneg;</div><div class='add'>+		ethtool_cmd_speed_set(ecmd, adapter-&gt;phy.link_speed);</div><div class='add'>+		ecmd-&gt;port = adapter-&gt;phy.port_type;</div><div class='add'>+		ecmd-&gt;transceiver = adapter-&gt;phy.transceiver;</div><div class='add'>+		ecmd-&gt;autoneg = adapter-&gt;phy.autoneg;</div><div class='add'>+		ecmd-&gt;advertising = adapter-&gt;phy.advertising;</div><div class='add'>+		ecmd-&gt;supported = adapter-&gt;phy.supported;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ecmd-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+	ecmd-&gt;duplex = netif_carrier_ok(netdev) ? DUPLEX_FULL : DUPLEX_UNKNOWN;</div><div class='ctx'> 	ecmd-&gt;phy_address = adapter-&gt;port_num;</div><div class='del'>-	switch (ecmd-&gt;port) {</div><div class='del'>-	case PORT_FIBRE:</div><div class='del'>-		ecmd-&gt;supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);</div><div class='del'>-		break;</div><div class='del'>-	case PORT_TP:</div><div class='del'>-		ecmd-&gt;supported = (SUPPORTED_10000baseT_Full | SUPPORTED_TP);</div><div class='del'>-		break;</div><div class='del'>-	case PORT_AUI:</div><div class='del'>-		ecmd-&gt;supported = (SUPPORTED_10000baseT_Full | SUPPORTED_AUI);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ecmd-&gt;autoneg) {</div><div class='del'>-		ecmd-&gt;supported |= SUPPORTED_1000baseT_Full;</div><div class='del'>-		ecmd-&gt;supported |= SUPPORTED_Autoneg;</div><div class='del'>-		ecmd-&gt;advertising |= (ADVERTISED_10000baseT_Full |</div><div class='del'>-				ADVERTISED_1000baseT_Full);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -548,7 +639,7 @@ be_get_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)</div><div class='ctx'> 	struct be_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	be_cmd_get_flow_control(adapter, &amp;ecmd-&gt;tx_pause, &amp;ecmd-&gt;rx_pause);</div><div class='del'>-	ecmd-&gt;autoneg = 0;</div><div class='add'>+	ecmd-&gt;autoneg = adapter-&gt;phy.fc_autoneg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -702,7 +793,7 @@ be_self_test(struct net_device *netdev, struct ethtool_test *test, u64 *data)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (be_test_ddr_dma(adapter) != 0) {</div><div class='add'>+	if (!lancer_chip(adapter) &amp;&amp; be_test_ddr_dma(adapter) != 0) {</div><div class='ctx'> 		data[3] = 1;</div><div class='ctx'> 		test-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -787,6 +878,81 @@ be_read_eeprom(struct net_device *netdev, struct ethtool_eeprom *eeprom,</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 be_get_msg_level(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct be_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (lancer_chip(adapter)) {</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Operation not supported\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return adapter-&gt;msg_enable;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void be_set_fw_log_level(struct be_adapter *adapter, u32 level)</div><div class='add'>+{</div><div class='add'>+	struct be_dma_mem extfat_cmd;</div><div class='add'>+	struct be_fat_conf_params *cfgs;</div><div class='add'>+	int status;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	memset(&amp;extfat_cmd, 0, sizeof(struct be_dma_mem));</div><div class='add'>+	extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps);</div><div class='add'>+	extfat_cmd.va = pci_alloc_consistent(adapter-&gt;pdev, extfat_cmd.size,</div><div class='add'>+					     &amp;extfat_cmd.dma);</div><div class='add'>+	if (!extfat_cmd.va) {</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "%s: Memory allocation failure\n",</div><div class='add'>+			__func__);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	status = be_cmd_get_ext_fat_capabilites(adapter, &amp;extfat_cmd);</div><div class='add'>+	if (!status) {</div><div class='add'>+		cfgs = (struct be_fat_conf_params *)(extfat_cmd.va +</div><div class='add'>+					sizeof(struct be_cmd_resp_hdr));</div><div class='add'>+		for (i = 0; i &lt; cfgs-&gt;num_modules; i++) {</div><div class='add'>+			for (j = 0; j &lt; cfgs-&gt;module[i].num_modes; j++) {</div><div class='add'>+				if (cfgs-&gt;module[i].trace_lvl[j].mode ==</div><div class='add'>+								MODE_UART)</div><div class='add'>+					cfgs-&gt;module[i].trace_lvl[j].dbg_lvl =</div><div class='add'>+							cpu_to_le32(level);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		status = be_cmd_set_ext_fat_capabilites(adapter, &amp;extfat_cmd,</div><div class='add'>+							cfgs);</div><div class='add'>+		if (status)</div><div class='add'>+			dev_err(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				"Message level set failed\n");</div><div class='add'>+	} else {</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Message level get failed\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_free_consistent(adapter-&gt;pdev, extfat_cmd.size, extfat_cmd.va,</div><div class='add'>+			    extfat_cmd.dma);</div><div class='add'>+err:</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void be_set_msg_level(struct net_device *netdev, u32 level)</div><div class='add'>+{</div><div class='add'>+	struct be_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (lancer_chip(adapter)) {</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Operation not supported\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;msg_enable == level)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if ((level &amp; NETIF_MSG_HW) != (adapter-&gt;msg_enable &amp; NETIF_MSG_HW))</div><div class='add'>+		be_set_fw_log_level(adapter, level &amp; NETIF_MSG_HW ?</div><div class='add'>+				    FW_LOG_LEVEL_DEFAULT : FW_LOG_LEVEL_FATAL);</div><div class='add'>+	adapter-&gt;msg_enable = level;</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct ethtool_ops be_ethtool_ops = {</div><div class='ctx'> 	.get_settings = be_get_settings,</div><div class='ctx'> 	.get_drvinfo = be_get_drvinfo,</div><div class='hunk'>@@ -802,6 +968,8 @@ const struct ethtool_ops be_ethtool_ops = {</div><div class='ctx'> 	.set_pauseparam = be_set_pauseparam,</div><div class='ctx'> 	.get_strings = be_get_stat_strings,</div><div class='ctx'> 	.set_phys_id = be_set_phys_id,</div><div class='add'>+	.get_msglevel = be_get_msg_level,</div><div class='add'>+	.set_msglevel = be_set_msg_level,</div><div class='ctx'> 	.get_sset_count = be_get_sset_count,</div><div class='ctx'> 	.get_ethtool_stats = be_get_ethtool_stats,</div><div class='ctx'> 	.get_regs_len = be_get_reg_len,</div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be_hw.h b/drivers/net/ethernet/emulex/benet/be_hw.h<br/>index f2c89e3ccabd..d9fb0c501fa1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be_hw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/emulex/benet/be_hw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be_hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_hw.h</a></div><div class='hunk'>@@ -58,6 +58,8 @@</div><div class='ctx'> </div><div class='ctx'> #define SLI_PORT_CONTROL_IP_MASK	0x08000000</div><div class='ctx'> </div><div class='add'>+#define PCICFG_CUST_SCRATCHPAD_CSR	0x1EC</div><div class='add'>+</div><div class='ctx'> /********* Memory BAR register ************/</div><div class='ctx'> #define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 	0xfc</div><div class='ctx'> /* Host Interrupt Enable, if set interrupts are enabled although "PCI Interrupt</div><div class='hunk'>@@ -98,11 +100,13 @@</div><div class='ctx'> #define SLI_INTF_REV_SHIFT			4</div><div class='ctx'> #define SLI_INTF_FT_MASK			0x00000001</div><div class='ctx'> </div><div class='add'>+#define SLI_INTF_TYPE_2		2</div><div class='add'>+#define SLI_INTF_TYPE_3		3</div><div class='ctx'> </div><div class='ctx'> /* SLI family */</div><div class='ctx'> #define BE_SLI_FAMILY		0x0</div><div class='ctx'> #define LANCER_A0_SLI_FAMILY	0xA</div><div class='del'>-</div><div class='add'>+#define SKYHAWK_SLI_FAMILY      0x2</div><div class='ctx'> </div><div class='ctx'> /********* ISR0 Register offset **********/</div><div class='ctx'> #define CEV_ISR0_OFFSET 			0xC18</div><div class='hunk'>@@ -162,22 +166,23 @@</div><div class='ctx'> #define QUERY_FAT	1</div><div class='ctx'> </div><div class='ctx'> /* Flashrom related descriptors */</div><div class='add'>+#define MAX_FLASH_COMP			32</div><div class='ctx'> #define IMAGE_TYPE_FIRMWARE		160</div><div class='ctx'> #define IMAGE_TYPE_BOOTCODE		224</div><div class='ctx'> #define IMAGE_TYPE_OPTIONROM		32</div><div class='ctx'> </div><div class='ctx'> #define NUM_FLASHDIR_ENTRIES		32</div><div class='ctx'> </div><div class='del'>-#define IMG_TYPE_ISCSI_ACTIVE		0</div><div class='del'>-#define IMG_TYPE_REDBOOT		1</div><div class='del'>-#define IMG_TYPE_BIOS			2</div><div class='del'>-#define IMG_TYPE_PXE_BIOS		3</div><div class='del'>-#define IMG_TYPE_FCOE_BIOS		8</div><div class='del'>-#define IMG_TYPE_ISCSI_BACKUP		9</div><div class='del'>-#define IMG_TYPE_FCOE_FW_ACTIVE		10</div><div class='del'>-#define IMG_TYPE_FCOE_FW_BACKUP 	11</div><div class='del'>-#define IMG_TYPE_NCSI_FW		13</div><div class='del'>-#define IMG_TYPE_PHY_FW			99</div><div class='add'>+#define OPTYPE_ISCSI_ACTIVE		0</div><div class='add'>+#define OPTYPE_REDBOOT			1</div><div class='add'>+#define OPTYPE_BIOS			2</div><div class='add'>+#define OPTYPE_PXE_BIOS			3</div><div class='add'>+#define OPTYPE_FCOE_BIOS		8</div><div class='add'>+#define OPTYPE_ISCSI_BACKUP		9</div><div class='add'>+#define OPTYPE_FCOE_FW_ACTIVE		10</div><div class='add'>+#define OPTYPE_FCOE_FW_BACKUP		11</div><div class='add'>+#define OPTYPE_NCSI_FW			13</div><div class='add'>+#define OPTYPE_PHY_FW			99</div><div class='ctx'> #define TN_8022				13</div><div class='ctx'> </div><div class='ctx'> #define ILLEGAL_IOCTL_REQ		2</div><div class='hunk'>@@ -223,6 +228,24 @@</div><div class='ctx'> #define FLASH_REDBOOT_START_g3             (262144)</div><div class='ctx'> #define FLASH_PHY_FW_START_g3		   1310720</div><div class='ctx'> </div><div class='add'>+#define IMAGE_NCSI			16</div><div class='add'>+#define IMAGE_OPTION_ROM_PXE		32</div><div class='add'>+#define IMAGE_OPTION_ROM_FCoE		33</div><div class='add'>+#define IMAGE_OPTION_ROM_ISCSI		34</div><div class='add'>+#define IMAGE_FLASHISM_JUMPVECTOR	48</div><div class='add'>+#define IMAGE_FLASH_ISM			49</div><div class='add'>+#define IMAGE_JUMP_VECTOR		50</div><div class='add'>+#define IMAGE_FIRMWARE_iSCSI		160</div><div class='add'>+#define IMAGE_FIRMWARE_COMP_iSCSI	161</div><div class='add'>+#define IMAGE_FIRMWARE_FCoE		162</div><div class='add'>+#define IMAGE_FIRMWARE_COMP_FCoE	163</div><div class='add'>+#define IMAGE_FIRMWARE_BACKUP_iSCSI	176</div><div class='add'>+#define IMAGE_FIRMWARE_BACKUP_COMP_iSCSI 177</div><div class='add'>+#define IMAGE_FIRMWARE_BACKUP_FCoE	178</div><div class='add'>+#define IMAGE_FIRMWARE_BACKUP_COMP_FCoE 179</div><div class='add'>+#define IMAGE_FIRMWARE_PHY		192</div><div class='add'>+#define IMAGE_BOOT_CODE			224</div><div class='add'>+</div><div class='ctx'> /************* Rx Packet Type Encoding **************/</div><div class='ctx'> #define BE_UNICAST_PACKET		0</div><div class='ctx'> #define BE_MULTICAST_PACKET		1</div><div class='hunk'>@@ -445,6 +468,7 @@ struct flash_comp {</div><div class='ctx'> 	unsigned long offset;</div><div class='ctx'> 	int optype;</div><div class='ctx'> 	int size;</div><div class='add'>+	int img_type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct image_hdr {</div><div class='hunk'>@@ -481,17 +505,19 @@ struct flash_section_hdr {</div><div class='ctx'> 	u32 format_rev;</div><div class='ctx'> 	u32 cksum;</div><div class='ctx'> 	u32 antidote;</div><div class='del'>-	u32 build_no;</div><div class='del'>-	u8 id_string[64];</div><div class='del'>-	u32 active_entry_mask;</div><div class='del'>-	u32 valid_entry_mask;</div><div class='del'>-	u32 org_content_mask;</div><div class='del'>-	u32 rsvd0;</div><div class='del'>-	u32 rsvd1;</div><div class='del'>-	u32 rsvd2;</div><div class='del'>-	u32 rsvd3;</div><div class='del'>-	u32 rsvd4;</div><div class='del'>-};</div><div class='add'>+	u32 num_images;</div><div class='add'>+	u8 id_string[128];</div><div class='add'>+	u32 rsvd[4];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct flash_section_hdr_g2 {</div><div class='add'>+	u32 format_rev;</div><div class='add'>+	u32 cksum;</div><div class='add'>+	u32 antidote;</div><div class='add'>+	u32 build_num;</div><div class='add'>+	u8 id_string[128];</div><div class='add'>+	u32 rsvd[8];</div><div class='add'>+} __packed;</div><div class='ctx'> </div><div class='ctx'> struct flash_section_entry {</div><div class='ctx'> 	u32 type;</div><div class='hunk'>@@ -503,10 +529,16 @@ struct flash_section_entry {</div><div class='ctx'> 	u32 rsvd0;</div><div class='ctx'> 	u32 rsvd1;</div><div class='ctx'> 	u8 ver_data[32];</div><div class='del'>-};</div><div class='add'>+} __packed;</div><div class='ctx'> </div><div class='ctx'> struct flash_section_info {</div><div class='ctx'> 	u8 cookie[32];</div><div class='ctx'> 	struct flash_section_hdr fsec_hdr;</div><div class='ctx'> 	struct flash_section_entry fsec_entry[32];</div><div class='del'>-};</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct flash_section_info_g2 {</div><div class='add'>+	u8 cookie[32];</div><div class='add'>+	struct flash_section_hdr_g2 fsec_hdr;</div><div class='add'>+	struct flash_section_entry fsec_entry[32];</div><div class='add'>+} __packed;</div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be_main.c b/drivers/net/ethernet/emulex/benet/be_main.c<br/>index 528a886bc2cd..08efd308d78a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/emulex/benet/be_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_main.c</a></div><div class='hunk'>@@ -421,6 +421,9 @@ void be_parse_stats(struct be_adapter *adapter)</div><div class='ctx'> 		populate_be2_stats(adapter);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (lancer_chip(adapter))</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='ctx'> 	/* as erx_v1 is longer than v0, ok to use v1 defn for v0 access */</div><div class='ctx'> 	for_all_rx_queues(adapter, rxo, i) {</div><div class='ctx'> 		/* below erx HW counter can actually wrap around after</div><div class='hunk'>@@ -429,6 +432,8 @@ void be_parse_stats(struct be_adapter *adapter)</div><div class='ctx'> 		accumulate_16bit_val(&amp;rx_stats(rxo)-&gt;rx_drops_no_frags,</div><div class='ctx'> 				(u16)erx-&gt;rx_drops_no_fragments[rxo-&gt;q.id]);</div><div class='ctx'> 	}</div><div class='add'>+done:</div><div class='add'>+	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct rtnl_link_stats64 *be_get_stats64(struct net_device *netdev,</div><div class='hunk'>@@ -797,22 +802,30 @@ static int be_vid_config(struct be_adapter *adapter, bool vf, u32 vf_num)</div><div class='ctx'> 	if (adapter-&gt;promiscuous)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (adapter-&gt;vlans_added &lt;= adapter-&gt;max_vlans)  {</div><div class='del'>-		/* Construct VLAN Table to give to HW */</div><div class='del'>-		for (i = 0; i &lt; VLAN_N_VID; i++) {</div><div class='del'>-			if (adapter-&gt;vlan_tag[i]) {</div><div class='del'>-				vtag[ntags] = cpu_to_le16(i);</div><div class='del'>-				ntags++;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		status = be_cmd_vlan_config(adapter, adapter-&gt;if_handle,</div><div class='del'>-					vtag, ntags, 1, 0);</div><div class='del'>-	} else {</div><div class='del'>-		status = be_cmd_vlan_config(adapter, adapter-&gt;if_handle,</div><div class='del'>-					NULL, 0, 1, 1);</div><div class='add'>+	if (adapter-&gt;vlans_added &gt; adapter-&gt;max_vlans)</div><div class='add'>+		goto set_vlan_promisc;</div><div class='add'>+</div><div class='add'>+	/* Construct VLAN Table to give to HW */</div><div class='add'>+	for (i = 0; i &lt; VLAN_N_VID; i++)</div><div class='add'>+		if (adapter-&gt;vlan_tag[i])</div><div class='add'>+			vtag[ntags++] = cpu_to_le16(i);</div><div class='add'>+</div><div class='add'>+	status = be_cmd_vlan_config(adapter, adapter-&gt;if_handle,</div><div class='add'>+				    vtag, ntags, 1, 0);</div><div class='add'>+</div><div class='add'>+	/* Set to VLAN promisc mode as setting VLAN filter failed */</div><div class='add'>+	if (status) {</div><div class='add'>+		dev_info(&amp;adapter-&gt;pdev-&gt;dev, "Exhausted VLAN HW filters.\n");</div><div class='add'>+		dev_info(&amp;adapter-&gt;pdev-&gt;dev, "Disabling HW VLAN filtering.\n");</div><div class='add'>+		goto set_vlan_promisc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='add'>+</div><div class='add'>+set_vlan_promisc:</div><div class='add'>+	status = be_cmd_vlan_config(adapter, adapter-&gt;if_handle,</div><div class='add'>+				    NULL, 0, 1, 1);</div><div class='add'>+	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int be_vlan_add_vid(struct net_device *netdev, u16 vid)</div><div class='hunk'>@@ -862,6 +875,7 @@ ret:</div><div class='ctx'> static void be_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (netdev-&gt;flags &amp; IFF_PROMISC) {</div><div class='ctx'> 		be_cmd_rx_filter(adapter, IFF_PROMISC, ON);</div><div class='hunk'>@@ -908,7 +922,14 @@ static void be_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	be_cmd_rx_filter(adapter, IFF_MULTICAST, ON);</div><div class='add'>+	status = be_cmd_rx_filter(adapter, IFF_MULTICAST, ON);</div><div class='add'>+</div><div class='add'>+	/* Set to MCAST promisc mode if setting MULTICAST address fails */</div><div class='add'>+	if (status) {</div><div class='add'>+		dev_info(&amp;adapter-&gt;pdev-&gt;dev, "Exhausted multicast HW filters.\n");</div><div class='add'>+		dev_info(&amp;adapter-&gt;pdev-&gt;dev, "Disabling HW multicast filtering.\n");</div><div class='add'>+		be_cmd_rx_filter(adapter, IFF_ALLMULTI, ON);</div><div class='add'>+	}</div><div class='ctx'> done:</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='hunk'>@@ -1028,6 +1049,29 @@ static int be_set_vf_tx_rate(struct net_device *netdev,</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int be_find_vfs(struct be_adapter *adapter, int vf_state)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *dev, *pdev = adapter-&gt;pdev;</div><div class='add'>+	int vfs = 0, assigned_vfs = 0, pos, vf_fn;</div><div class='add'>+	u16 offset, stride;</div><div class='add'>+</div><div class='add'>+	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);</div><div class='add'>+	pci_read_config_word(pdev, pos + PCI_SRIOV_VF_OFFSET, &amp;offset);</div><div class='add'>+	pci_read_config_word(pdev, pos + PCI_SRIOV_VF_STRIDE, &amp;stride);</div><div class='add'>+</div><div class='add'>+	dev = pci_get_device(pdev-&gt;vendor, PCI_ANY_ID, NULL);</div><div class='add'>+	while (dev) {</div><div class='add'>+		vf_fn = (pdev-&gt;devfn + offset + stride * vfs) &amp; 0xFFFF;</div><div class='add'>+		if (dev-&gt;is_virtfn &amp;&amp; dev-&gt;devfn == vf_fn) {</div><div class='add'>+			vfs++;</div><div class='add'>+			if (dev-&gt;dev_flags &amp; PCI_DEV_FLAGS_ASSIGNED)</div><div class='add'>+				assigned_vfs++;</div><div class='add'>+		}</div><div class='add'>+		dev = pci_get_device(pdev-&gt;vendor, PCI_ANY_ID, dev);</div><div class='add'>+	}</div><div class='add'>+	return (vf_state == ASSIGNED) ? assigned_vfs : vfs;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void be_eqd_update(struct be_adapter *adapter, struct be_eq_obj *eqo)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_rx_stats *stats = rx_stats(&amp;adapter-&gt;rx_obj[eqo-&gt;idx]);</div><div class='hunk'>@@ -1238,6 +1282,7 @@ static void be_rx_compl_process(struct be_rx_obj *rxo,</div><div class='ctx'> 		skb_checksum_none_assert(skb);</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;protocol = eth_type_trans(skb, netdev);</div><div class='add'>+	skb_record_rx_queue(skb, rxo - &amp;adapter-&gt;rx_obj[0]);</div><div class='ctx'> 	if (netdev-&gt;features &amp; NETIF_F_RXHASH)</div><div class='ctx'> 		skb-&gt;rxhash = rxcp-&gt;rss_hash;</div><div class='ctx'> </div><div class='hunk'>@@ -1294,6 +1339,7 @@ void be_rx_compl_process_gro(struct be_rx_obj *rxo, struct napi_struct *napi,</div><div class='ctx'> 	skb-&gt;len = rxcp-&gt;pkt_size;</div><div class='ctx'> 	skb-&gt;data_len = rxcp-&gt;pkt_size;</div><div class='ctx'> 	skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+	skb_record_rx_queue(skb, rxo - &amp;adapter-&gt;rx_obj[0]);</div><div class='ctx'> 	if (adapter-&gt;netdev-&gt;features &amp; NETIF_F_RXHASH)</div><div class='ctx'> 		skb-&gt;rxhash = rxcp-&gt;rss_hash;</div><div class='ctx'> </div><div class='hunk'>@@ -1555,7 +1601,9 @@ static int event_handle(struct be_eq_obj *eqo)</div><div class='ctx'> 	if (!num)</div><div class='ctx'> 		rearm = true;</div><div class='ctx'> </div><div class='del'>-	be_eq_notify(eqo-&gt;adapter, eqo-&gt;q.id, rearm, true, num);</div><div class='add'>+	if (num || msix_enabled(eqo-&gt;adapter))</div><div class='add'>+		be_eq_notify(eqo-&gt;adapter, eqo-&gt;q.id, rearm, true, num);</div><div class='add'>+</div><div class='ctx'> 	if (num)</div><div class='ctx'> 		napi_schedule(&amp;eqo-&gt;napi);</div><div class='ctx'> </div><div class='hunk'>@@ -1764,9 +1812,9 @@ static void be_tx_queues_destroy(struct be_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> static int be_num_txqs_want(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	if (sriov_enabled(adapter) || be_is_mc(adapter) ||</div><div class='del'>-		lancer_chip(adapter) || !be_physfn(adapter) ||</div><div class='del'>-		adapter-&gt;generation == BE_GEN2)</div><div class='add'>+	if (sriov_want(adapter) || be_is_mc(adapter) ||</div><div class='add'>+	    lancer_chip(adapter) || !be_physfn(adapter) ||</div><div class='add'>+	    adapter-&gt;generation == BE_GEN2)</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	else</div><div class='ctx'> 		return MAX_TX_QS;</div><div class='hunk'>@@ -2093,7 +2141,7 @@ static void be_msix_disable(struct be_adapter *adapter)</div><div class='ctx'> static uint be_num_rss_want(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	if ((adapter-&gt;function_caps &amp; BE_FUNCTION_CAPS_RSS) &amp;&amp;</div><div class='del'>-	     adapter-&gt;num_vfs == 0 &amp;&amp; be_physfn(adapter) &amp;&amp;</div><div class='add'>+	     !sriov_want(adapter) &amp;&amp; be_physfn(adapter) &amp;&amp;</div><div class='ctx'> 	     !be_is_mc(adapter))</div><div class='ctx'> 		return (adapter-&gt;be3_native) ? BE3_MAX_RSS_QS : BE2_MAX_RSS_QS;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -2103,10 +2151,17 @@ static uint be_num_rss_want(struct be_adapter *adapter)</div><div class='ctx'> static void be_msix_enable(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> #define BE_MIN_MSIX_VECTORS		1</div><div class='del'>-	int i, status, num_vec;</div><div class='add'>+	int i, status, num_vec, num_roce_vec = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* If RSS queues are not used, need a vec for default RX Q */</div><div class='ctx'> 	num_vec = min(be_num_rss_want(adapter), num_online_cpus());</div><div class='add'>+	if (be_roce_supported(adapter)) {</div><div class='add'>+		num_roce_vec = min_t(u32, MAX_ROCE_MSIX_VECTORS,</div><div class='add'>+					(num_online_cpus() + 1));</div><div class='add'>+		num_roce_vec = min(num_roce_vec, MAX_ROCE_EQS);</div><div class='add'>+		num_vec += num_roce_vec;</div><div class='add'>+		num_vec = min(num_vec, MAX_MSIX_VECTORS);</div><div class='add'>+	}</div><div class='ctx'> 	num_vec = max(num_vec, BE_MIN_MSIX_VECTORS);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_vec; i++)</div><div class='hunk'>@@ -2123,55 +2178,18 @@ static void be_msix_enable(struct be_adapter *adapter)</div><div class='ctx'> 	}</div><div class='ctx'> 	return;</div><div class='ctx'> done:</div><div class='del'>-	adapter-&gt;num_msix_vec = num_vec;</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int be_sriov_enable(struct be_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	be_check_sriov_fn_type(adapter);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PCI_IOV</div><div class='del'>-	if (be_physfn(adapter) &amp;&amp; num_vfs) {</div><div class='del'>-		int status, pos;</div><div class='del'>-		u16 dev_vfs;</div><div class='del'>-</div><div class='del'>-		pos = pci_find_ext_capability(adapter-&gt;pdev,</div><div class='del'>-						PCI_EXT_CAP_ID_SRIOV);</div><div class='del'>-		pci_read_config_word(adapter-&gt;pdev,</div><div class='del'>-				     pos + PCI_SRIOV_TOTAL_VF, &amp;dev_vfs);</div><div class='del'>-</div><div class='del'>-		adapter-&gt;num_vfs = min_t(u16, num_vfs, dev_vfs);</div><div class='del'>-		if (adapter-&gt;num_vfs != num_vfs)</div><div class='del'>-			dev_info(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='del'>-				 "Device supports %d VFs and not %d\n",</div><div class='del'>-				 adapter-&gt;num_vfs, num_vfs);</div><div class='del'>-</div><div class='del'>-		status = pci_enable_sriov(adapter-&gt;pdev, adapter-&gt;num_vfs);</div><div class='del'>-		if (status)</div><div class='del'>-			adapter-&gt;num_vfs = 0;</div><div class='del'>-</div><div class='del'>-		if (adapter-&gt;num_vfs) {</div><div class='del'>-			adapter-&gt;vf_cfg = kcalloc(num_vfs,</div><div class='del'>-						sizeof(struct be_vf_cfg),</div><div class='del'>-						GFP_KERNEL);</div><div class='del'>-			if (!adapter-&gt;vf_cfg)</div><div class='del'>-				return -ENOMEM;</div><div class='add'>+	if (be_roce_supported(adapter)) {</div><div class='add'>+		if (num_vec &gt; num_roce_vec) {</div><div class='add'>+			adapter-&gt;num_msix_vec = num_vec - num_roce_vec;</div><div class='add'>+			adapter-&gt;num_msix_roce_vec =</div><div class='add'>+				num_vec - adapter-&gt;num_msix_vec;</div><div class='add'>+		} else {</div><div class='add'>+			adapter-&gt;num_msix_vec = num_vec;</div><div class='add'>+			adapter-&gt;num_msix_roce_vec = 0;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void be_sriov_disable(struct be_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_PCI_IOV</div><div class='del'>-	if (sriov_enabled(adapter)) {</div><div class='del'>-		pci_disable_sriov(adapter-&gt;pdev);</div><div class='del'>-		kfree(adapter-&gt;vf_cfg);</div><div class='del'>-		adapter-&gt;num_vfs = 0;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='add'>+	} else</div><div class='add'>+		adapter-&gt;num_msix_vec = num_vec;</div><div class='add'>+	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int be_msix_vec_get(struct be_adapter *adapter,</div><div class='hunk'>@@ -2282,6 +2300,8 @@ static int be_close(struct net_device *netdev)</div><div class='ctx'> 	struct be_eq_obj *eqo;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	be_roce_dev_close(adapter);</div><div class='add'>+</div><div class='ctx'> 	be_async_mcc_disable(adapter);</div><div class='ctx'> </div><div class='ctx'> 	if (!lancer_chip(adapter))</div><div class='hunk'>@@ -2390,6 +2410,7 @@ static int be_open(struct net_device *netdev)</div><div class='ctx'> 	if (!status)</div><div class='ctx'> 		be_link_status_update(adapter, link_status);</div><div class='ctx'> </div><div class='add'>+	be_roce_dev_open(adapter);</div><div class='ctx'> 	return 0;</div><div class='ctx'> err:</div><div class='ctx'> 	be_close(adapter-&gt;netdev);</div><div class='hunk'>@@ -2475,6 +2496,11 @@ static void be_vf_clear(struct be_adapter *adapter)</div><div class='ctx'> 	struct be_vf_cfg *vf_cfg;</div><div class='ctx'> 	u32 vf;</div><div class='ctx'> </div><div class='add'>+	if (be_find_vfs(adapter, ASSIGNED)) {</div><div class='add'>+		dev_warn(&amp;adapter-&gt;pdev-&gt;dev, "VFs are assigned to VMs\n");</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for_all_vfs(adapter, vf_cfg, vf) {</div><div class='ctx'> 		if (lancer_chip(adapter))</div><div class='ctx'> 			be_cmd_set_mac_list(adapter, NULL, 0, vf + 1);</div><div class='hunk'>@@ -2484,6 +2510,10 @@ static void be_vf_clear(struct be_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 		be_cmd_if_destroy(adapter, vf_cfg-&gt;if_handle, vf + 1);</div><div class='ctx'> 	}</div><div class='add'>+	pci_disable_sriov(adapter-&gt;pdev);</div><div class='add'>+done:</div><div class='add'>+	kfree(adapter-&gt;vf_cfg);</div><div class='add'>+	adapter-&gt;num_vfs = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int be_clear(struct be_adapter *adapter)</div><div class='hunk'>@@ -2513,29 +2543,60 @@ static int be_clear(struct be_adapter *adapter)</div><div class='ctx'> 	be_cmd_fw_clean(adapter);</div><div class='ctx'> </div><div class='ctx'> 	be_msix_disable(adapter);</div><div class='del'>-	kfree(adapter-&gt;pmac_id);</div><div class='add'>+	pci_write_config_dword(adapter-&gt;pdev, PCICFG_CUST_SCRATCHPAD_CSR, 0);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void be_vf_setup_init(struct be_adapter *adapter)</div><div class='add'>+static int be_vf_setup_init(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_vf_cfg *vf_cfg;</div><div class='ctx'> 	int vf;</div><div class='ctx'> </div><div class='add'>+	adapter-&gt;vf_cfg = kcalloc(adapter-&gt;num_vfs, sizeof(*vf_cfg),</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (!adapter-&gt;vf_cfg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	for_all_vfs(adapter, vf_cfg, vf) {</div><div class='ctx'> 		vf_cfg-&gt;if_handle = -1;</div><div class='ctx'> 		vf_cfg-&gt;pmac_id = -1;</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int be_vf_setup(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_vf_cfg *vf_cfg;</div><div class='add'>+	struct device *dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='ctx'> 	u32 cap_flags, en_flags, vf;</div><div class='ctx'> 	u16 def_vlan, lnk_speed;</div><div class='del'>-	int status;</div><div class='add'>+	int status, enabled_vfs;</div><div class='add'>+</div><div class='add'>+	enabled_vfs = be_find_vfs(adapter, ENABLED);</div><div class='add'>+	if (enabled_vfs) {</div><div class='add'>+		dev_warn(dev, "%d VFs are already enabled\n", enabled_vfs);</div><div class='add'>+		dev_warn(dev, "Ignoring num_vfs=%d setting\n", num_vfs);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (num_vfs &gt; adapter-&gt;dev_num_vfs) {</div><div class='add'>+		dev_warn(dev, "Device supports %d VFs and not %d\n",</div><div class='add'>+			 adapter-&gt;dev_num_vfs, num_vfs);</div><div class='add'>+		num_vfs = adapter-&gt;dev_num_vfs;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	be_vf_setup_init(adapter);</div><div class='add'>+	status = pci_enable_sriov(adapter-&gt;pdev, num_vfs);</div><div class='add'>+	if (!status) {</div><div class='add'>+		adapter-&gt;num_vfs = num_vfs;</div><div class='add'>+	} else {</div><div class='add'>+		/* Platform doesn't support SRIOV though device supports it */</div><div class='add'>+		dev_warn(dev, "SRIOV enable failed\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = be_vf_setup_init(adapter);</div><div class='add'>+	if (status)</div><div class='add'>+		goto err;</div><div class='ctx'> </div><div class='ctx'> 	cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |</div><div class='ctx'> 				BE_IF_FLAGS_MULTICAST;</div><div class='hunk'>@@ -2546,9 +2607,11 @@ static int be_vf_setup(struct be_adapter *adapter)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	status = be_vf_eth_addr_config(adapter);</div><div class='del'>-	if (status)</div><div class='del'>-		goto err;</div><div class='add'>+	if (!enabled_vfs) {</div><div class='add'>+		status = be_vf_eth_addr_config(adapter);</div><div class='add'>+		if (status)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	for_all_vfs(adapter, vf_cfg, vf) {</div><div class='ctx'> 		status = be_cmd_link_status_query(adapter, NULL, &amp;lnk_speed,</div><div class='hunk'>@@ -2571,11 +2634,12 @@ err:</div><div class='ctx'> static void be_setup_init(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	adapter-&gt;vlan_prio_bmap = 0xff;</div><div class='del'>-	adapter-&gt;link_speed = -1;</div><div class='add'>+	adapter-&gt;phy.link_speed = -1;</div><div class='ctx'> 	adapter-&gt;if_handle = -1;</div><div class='ctx'> 	adapter-&gt;be3_native = false;</div><div class='ctx'> 	adapter-&gt;promiscuous = false;</div><div class='ctx'> 	adapter-&gt;eq_next_idx = 0;</div><div class='add'>+	adapter-&gt;phy.forced_port_speed = -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int be_add_mac_from_list(struct be_adapter *adapter, u8 *mac)</div><div class='hunk'>@@ -2604,9 +2668,25 @@ do_none:</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Routine to query per function resource limits */</div><div class='add'>+static int be_get_config(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int pos;</div><div class='add'>+	u16 dev_num_vfs;</div><div class='add'>+</div><div class='add'>+	pos = pci_find_ext_capability(adapter-&gt;pdev, PCI_EXT_CAP_ID_SRIOV);</div><div class='add'>+	if (pos) {</div><div class='add'>+		pci_read_config_word(adapter-&gt;pdev, pos + PCI_SRIOV_TOTAL_VF,</div><div class='add'>+				     &amp;dev_num_vfs);</div><div class='add'>+		adapter-&gt;dev_num_vfs = dev_num_vfs;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int be_setup(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+	struct device *dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='ctx'> 	u32 cap_flags, en_flags;</div><div class='ctx'> 	u32 tx_fc, rx_fc;</div><div class='ctx'> 	int status;</div><div class='hunk'>@@ -2614,6 +2694,8 @@ static int be_setup(struct be_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	be_setup_init(adapter);</div><div class='ctx'> </div><div class='add'>+	be_get_config(adapter);</div><div class='add'>+</div><div class='ctx'> 	be_cmd_req_native_mode(adapter);</div><div class='ctx'> </div><div class='ctx'> 	be_msix_enable(adapter);</div><div class='hunk'>@@ -2680,36 +2762,33 @@ static int be_setup(struct be_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	be_cmd_get_fw_ver(adapter, adapter-&gt;fw_ver, NULL);</div><div class='ctx'> </div><div class='del'>-	status = be_vid_config(adapter, false, 0);</div><div class='del'>-	if (status)</div><div class='del'>-		goto err;</div><div class='add'>+	be_vid_config(adapter, false, 0);</div><div class='ctx'> </div><div class='ctx'> 	be_set_rx_mode(adapter-&gt;netdev);</div><div class='ctx'> </div><div class='del'>-	status = be_cmd_get_flow_control(adapter, &amp;tx_fc, &amp;rx_fc);</div><div class='del'>-	/* For Lancer: It is legal for this cmd to fail on VF */</div><div class='del'>-	if (status &amp;&amp; (be_physfn(adapter) || !lancer_chip(adapter)))</div><div class='del'>-		goto err;</div><div class='add'>+	be_cmd_get_flow_control(adapter, &amp;tx_fc, &amp;rx_fc);</div><div class='ctx'> </div><div class='del'>-	if (rx_fc != adapter-&gt;rx_fc || tx_fc != adapter-&gt;tx_fc) {</div><div class='del'>-		status = be_cmd_set_flow_control(adapter, adapter-&gt;tx_fc,</div><div class='add'>+	if (rx_fc != adapter-&gt;rx_fc || tx_fc != adapter-&gt;tx_fc)</div><div class='add'>+		be_cmd_set_flow_control(adapter, adapter-&gt;tx_fc,</div><div class='ctx'> 					adapter-&gt;rx_fc);</div><div class='del'>-		/* For Lancer: It is legal for this cmd to fail on VF */</div><div class='del'>-		if (status &amp;&amp; (be_physfn(adapter) || !lancer_chip(adapter)))</div><div class='del'>-			goto err;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	pcie_set_readrq(adapter-&gt;pdev, 4096);</div><div class='ctx'> </div><div class='del'>-	if (sriov_enabled(adapter)) {</div><div class='del'>-		status = be_vf_setup(adapter);</div><div class='del'>-		if (status)</div><div class='del'>-			goto err;</div><div class='add'>+	if (be_physfn(adapter) &amp;&amp; num_vfs) {</div><div class='add'>+		if (adapter-&gt;dev_num_vfs)</div><div class='add'>+			be_vf_setup(adapter);</div><div class='add'>+		else</div><div class='add'>+			dev_warn(dev, "device doesn't support SRIOV\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	be_cmd_get_phy_info(adapter);</div><div class='add'>+	if (be_pause_supported(adapter))</div><div class='add'>+		adapter-&gt;phy.fc_autoneg = 1;</div><div class='add'>+</div><div class='ctx'> 	schedule_delayed_work(&amp;adapter-&gt;work, msecs_to_jiffies(1000));</div><div class='ctx'> 	adapter-&gt;flags |= BE_FLAGS_WORKER_SCHEDULED;</div><div class='ctx'> </div><div class='add'>+	pci_write_config_dword(adapter-&gt;pdev, PCICFG_CUST_SCRATCHPAD_CSR, 1);</div><div class='ctx'> 	return 0;</div><div class='ctx'> err:</div><div class='ctx'> 	be_clear(adapter);</div><div class='hunk'>@@ -2731,6 +2810,8 @@ static void be_netpoll(struct net_device *netdev)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define FW_FILE_HDR_SIGN 	"ServerEngines Corp. "</div><div class='add'>+char flash_cookie[2][16] =      {"*** SE FLAS", "H DIRECTORY *** "};</div><div class='add'>+</div><div class='ctx'> static bool be_flash_redboot(struct be_adapter *adapter,</div><div class='ctx'> 			const u8 *p, u32 img_start, int image_size,</div><div class='ctx'> 			int hdr_size)</div><div class='hunk'>@@ -2760,71 +2841,105 @@ static bool be_flash_redboot(struct be_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> static bool phy_flashing_required(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	int status = 0;</div><div class='del'>-	struct be_phy_info phy_info;</div><div class='add'>+	return (adapter-&gt;phy.phy_type == TN_8022 &amp;&amp;</div><div class='add'>+		adapter-&gt;phy.interface_type == PHY_TYPE_BASET_10GB);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	status = be_cmd_get_phy_info(adapter, &amp;phy_info);</div><div class='del'>-	if (status)</div><div class='del'>-		return false;</div><div class='del'>-	if ((phy_info.phy_type == TN_8022) &amp;&amp;</div><div class='del'>-		(phy_info.interface_type == PHY_TYPE_BASET_10GB)) {</div><div class='del'>-		return true;</div><div class='add'>+static bool is_comp_in_ufi(struct be_adapter *adapter,</div><div class='add'>+			   struct flash_section_info *fsec, int type)</div><div class='add'>+{</div><div class='add'>+	int i = 0, img_type = 0;</div><div class='add'>+	struct flash_section_info_g2 *fsec_g2 = NULL;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;generation != BE_GEN3)</div><div class='add'>+		fsec_g2 = (struct flash_section_info_g2 *)fsec;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX_FLASH_COMP; i++) {</div><div class='add'>+		if (fsec_g2)</div><div class='add'>+			img_type = le32_to_cpu(fsec_g2-&gt;fsec_entry[i].type);</div><div class='add'>+		else</div><div class='add'>+			img_type = le32_to_cpu(fsec-&gt;fsec_entry[i].type);</div><div class='add'>+</div><div class='add'>+		if (img_type == type)</div><div class='add'>+			return true;</div><div class='ctx'> 	}</div><div class='ctx'> 	return false;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct flash_section_info *get_fsec_info(struct be_adapter *adapter,</div><div class='add'>+					 int header_size,</div><div class='add'>+					 const struct firmware *fw)</div><div class='add'>+{</div><div class='add'>+	struct flash_section_info *fsec = NULL;</div><div class='add'>+	const u8 *p = fw-&gt;data;</div><div class='add'>+</div><div class='add'>+	p += header_size;</div><div class='add'>+	while (p &lt; (fw-&gt;data + fw-&gt;size)) {</div><div class='add'>+		fsec = (struct flash_section_info *)p;</div><div class='add'>+		if (!memcmp(flash_cookie, fsec-&gt;cookie, sizeof(flash_cookie)))</div><div class='add'>+			return fsec;</div><div class='add'>+		p += 32;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int be_flash_data(struct be_adapter *adapter,</div><div class='del'>-			const struct firmware *fw,</div><div class='del'>-			struct be_dma_mem *flash_cmd, int num_of_images)</div><div class='add'>+			 const struct firmware *fw,</div><div class='add'>+			 struct be_dma_mem *flash_cmd,</div><div class='add'>+			 int num_of_images)</div><div class='ctx'> </div><div class='ctx'> {</div><div class='ctx'> 	int status = 0, i, filehdr_size = 0;</div><div class='add'>+	int img_hdrs_size = (num_of_images * sizeof(struct image_hdr));</div><div class='ctx'> 	u32 total_bytes = 0, flash_op;</div><div class='ctx'> 	int num_bytes;</div><div class='ctx'> 	const u8 *p = fw-&gt;data;</div><div class='ctx'> 	struct be_cmd_write_flashrom *req = flash_cmd-&gt;va;</div><div class='ctx'> 	const struct flash_comp *pflashcomp;</div><div class='del'>-	int num_comp;</div><div class='del'>-</div><div class='del'>-	static const struct flash_comp gen3_flash_types[10] = {</div><div class='del'>-		{ FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,</div><div class='del'>-			FLASH_IMAGE_MAX_SIZE_g3},</div><div class='del'>-		{ FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,</div><div class='del'>-			FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},</div><div class='del'>-		{ FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,</div><div class='del'>-			FLASH_BIOS_IMAGE_MAX_SIZE_g3},</div><div class='del'>-		{ FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,</div><div class='del'>-			FLASH_BIOS_IMAGE_MAX_SIZE_g3},</div><div class='del'>-		{ FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,</div><div class='del'>-			FLASH_BIOS_IMAGE_MAX_SIZE_g3},</div><div class='del'>-		{ FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,</div><div class='del'>-			FLASH_IMAGE_MAX_SIZE_g3},</div><div class='del'>-		{ FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,</div><div class='del'>-			FLASH_IMAGE_MAX_SIZE_g3},</div><div class='del'>-		{ FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,</div><div class='del'>-			FLASH_IMAGE_MAX_SIZE_g3},</div><div class='del'>-		{ FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,</div><div class='del'>-			FLASH_NCSI_IMAGE_MAX_SIZE_g3},</div><div class='del'>-		{ FLASH_PHY_FW_START_g3, IMG_TYPE_PHY_FW,</div><div class='del'>-			FLASH_PHY_FW_IMAGE_MAX_SIZE_g3}</div><div class='add'>+	int num_comp, hdr_size;</div><div class='add'>+	struct flash_section_info *fsec = NULL;</div><div class='add'>+</div><div class='add'>+	struct flash_comp gen3_flash_types[] = {</div><div class='add'>+		{ FLASH_iSCSI_PRIMARY_IMAGE_START_g3, OPTYPE_ISCSI_ACTIVE,</div><div class='add'>+			FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_iSCSI},</div><div class='add'>+		{ FLASH_REDBOOT_START_g3, OPTYPE_REDBOOT,</div><div class='add'>+			FLASH_REDBOOT_IMAGE_MAX_SIZE_g3, IMAGE_BOOT_CODE},</div><div class='add'>+		{ FLASH_iSCSI_BIOS_START_g3, OPTYPE_BIOS,</div><div class='add'>+			FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_ISCSI},</div><div class='add'>+		{ FLASH_PXE_BIOS_START_g3, OPTYPE_PXE_BIOS,</div><div class='add'>+			FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_PXE},</div><div class='add'>+		{ FLASH_FCoE_BIOS_START_g3, OPTYPE_FCOE_BIOS,</div><div class='add'>+			FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_FCoE},</div><div class='add'>+		{ FLASH_iSCSI_BACKUP_IMAGE_START_g3, OPTYPE_ISCSI_BACKUP,</div><div class='add'>+			FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_iSCSI},</div><div class='add'>+		{ FLASH_FCoE_PRIMARY_IMAGE_START_g3, OPTYPE_FCOE_FW_ACTIVE,</div><div class='add'>+			FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_FCoE},</div><div class='add'>+		{ FLASH_FCoE_BACKUP_IMAGE_START_g3, OPTYPE_FCOE_FW_BACKUP,</div><div class='add'>+			FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_FCoE},</div><div class='add'>+		{ FLASH_NCSI_START_g3, OPTYPE_NCSI_FW,</div><div class='add'>+			FLASH_NCSI_IMAGE_MAX_SIZE_g3, IMAGE_NCSI},</div><div class='add'>+		{ FLASH_PHY_FW_START_g3, OPTYPE_PHY_FW,</div><div class='add'>+			FLASH_PHY_FW_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_PHY}</div><div class='ctx'> 	};</div><div class='del'>-	static const struct flash_comp gen2_flash_types[8] = {</div><div class='del'>-		{ FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,</div><div class='del'>-			FLASH_IMAGE_MAX_SIZE_g2},</div><div class='del'>-		{ FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,</div><div class='del'>-			FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},</div><div class='del'>-		{ FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,</div><div class='del'>-			FLASH_BIOS_IMAGE_MAX_SIZE_g2},</div><div class='del'>-		{ FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,</div><div class='del'>-			FLASH_BIOS_IMAGE_MAX_SIZE_g2},</div><div class='del'>-		{ FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,</div><div class='del'>-			FLASH_BIOS_IMAGE_MAX_SIZE_g2},</div><div class='del'>-		{ FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,</div><div class='del'>-			FLASH_IMAGE_MAX_SIZE_g2},</div><div class='del'>-		{ FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,</div><div class='del'>-			FLASH_IMAGE_MAX_SIZE_g2},</div><div class='del'>-		{ FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,</div><div class='del'>-			 FLASH_IMAGE_MAX_SIZE_g2}</div><div class='add'>+</div><div class='add'>+	struct flash_comp gen2_flash_types[] = {</div><div class='add'>+		{ FLASH_iSCSI_PRIMARY_IMAGE_START_g2, OPTYPE_ISCSI_ACTIVE,</div><div class='add'>+			FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_iSCSI},</div><div class='add'>+		{ FLASH_REDBOOT_START_g2, OPTYPE_REDBOOT,</div><div class='add'>+			FLASH_REDBOOT_IMAGE_MAX_SIZE_g2, IMAGE_BOOT_CODE},</div><div class='add'>+		{ FLASH_iSCSI_BIOS_START_g2, OPTYPE_BIOS,</div><div class='add'>+			FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_ISCSI},</div><div class='add'>+		{ FLASH_PXE_BIOS_START_g2, OPTYPE_PXE_BIOS,</div><div class='add'>+			FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_PXE},</div><div class='add'>+		{ FLASH_FCoE_BIOS_START_g2, OPTYPE_FCOE_BIOS,</div><div class='add'>+			FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_FCoE},</div><div class='add'>+		{ FLASH_iSCSI_BACKUP_IMAGE_START_g2, OPTYPE_ISCSI_BACKUP,</div><div class='add'>+			FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_iSCSI},</div><div class='add'>+		{ FLASH_FCoE_PRIMARY_IMAGE_START_g2, OPTYPE_FCOE_FW_ACTIVE,</div><div class='add'>+			FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_FCoE},</div><div class='add'>+		{ FLASH_FCoE_BACKUP_IMAGE_START_g2, OPTYPE_FCOE_FW_BACKUP,</div><div class='add'>+			 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_FCoE}</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;generation == BE_GEN3) {</div><div class='hunk'>@@ -2836,22 +2951,37 @@ static int be_flash_data(struct be_adapter *adapter,</div><div class='ctx'> 		filehdr_size = sizeof(struct flash_file_hdr_g2);</div><div class='ctx'> 		num_comp = ARRAY_SIZE(gen2_flash_types);</div><div class='ctx'> 	}</div><div class='add'>+	/* Get flash section info*/</div><div class='add'>+	fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw);</div><div class='add'>+	if (!fsec) {</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+			"Invalid Cookie. UFI corrupted ?\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='ctx'> 	for (i = 0; i &lt; num_comp; i++) {</div><div class='del'>-		if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &amp;&amp;</div><div class='del'>-				memcmp(adapter-&gt;fw_ver, "3.102.148.0", 11) &lt; 0)</div><div class='add'>+		if (!is_comp_in_ufi(adapter, fsec, pflashcomp[i].img_type))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if ((pflashcomp[i].optype == OPTYPE_NCSI_FW) &amp;&amp;</div><div class='add'>+		    memcmp(adapter-&gt;fw_ver, "3.102.148.0", 11) &lt; 0)</div><div class='ctx'> 			continue;</div><div class='del'>-		if (pflashcomp[i].optype == IMG_TYPE_PHY_FW) {</div><div class='add'>+</div><div class='add'>+		if (pflashcomp[i].optype == OPTYPE_PHY_FW) {</div><div class='ctx'> 			if (!phy_flashing_required(adapter))</div><div class='ctx'> 				continue;</div><div class='ctx'> 		}</div><div class='del'>-		if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &amp;&amp;</div><div class='del'>-			(!be_flash_redboot(adapter, fw-&gt;data,</div><div class='del'>-			pflashcomp[i].offset, pflashcomp[i].size, filehdr_size +</div><div class='del'>-			(num_of_images * sizeof(struct image_hdr)))))</div><div class='add'>+</div><div class='add'>+		hdr_size = filehdr_size +</div><div class='add'>+			   (num_of_images * sizeof(struct image_hdr));</div><div class='add'>+</div><div class='add'>+		if ((pflashcomp[i].optype == OPTYPE_REDBOOT) &amp;&amp;</div><div class='add'>+		    (!be_flash_redboot(adapter, fw-&gt;data, pflashcomp[i].offset,</div><div class='add'>+				       pflashcomp[i].size, hdr_size)))</div><div class='ctx'> 			continue;</div><div class='add'>+</div><div class='add'>+		/* Flash the component */</div><div class='ctx'> 		p = fw-&gt;data;</div><div class='del'>-		p += filehdr_size + pflashcomp[i].offset</div><div class='del'>-			+ (num_of_images * sizeof(struct image_hdr));</div><div class='add'>+		p += filehdr_size + pflashcomp[i].offset + img_hdrs_size;</div><div class='ctx'> 		if (p + pflashcomp[i].size &gt; fw-&gt;data + fw-&gt;size)</div><div class='ctx'> 			return -1;</div><div class='ctx'> 		total_bytes = pflashcomp[i].size;</div><div class='hunk'>@@ -2862,12 +2992,12 @@ static int be_flash_data(struct be_adapter *adapter,</div><div class='ctx'> 				num_bytes = total_bytes;</div><div class='ctx'> 			total_bytes -= num_bytes;</div><div class='ctx'> 			if (!total_bytes) {</div><div class='del'>-				if (pflashcomp[i].optype == IMG_TYPE_PHY_FW)</div><div class='add'>+				if (pflashcomp[i].optype == OPTYPE_PHY_FW)</div><div class='ctx'> 					flash_op = FLASHROM_OPER_PHY_FLASH;</div><div class='ctx'> 				else</div><div class='ctx'> 					flash_op = FLASHROM_OPER_FLASH;</div><div class='ctx'> 			} else {</div><div class='del'>-				if (pflashcomp[i].optype == IMG_TYPE_PHY_FW)</div><div class='add'>+				if (pflashcomp[i].optype == OPTYPE_PHY_FW)</div><div class='ctx'> 					flash_op = FLASHROM_OPER_PHY_SAVE;</div><div class='ctx'> 				else</div><div class='ctx'> 					flash_op = FLASHROM_OPER_SAVE;</div><div class='hunk'>@@ -2879,7 +3009,7 @@ static int be_flash_data(struct be_adapter *adapter,</div><div class='ctx'> 			if (status) {</div><div class='ctx'> 				if ((status == ILLEGAL_IOCTL_REQ) &amp;&amp;</div><div class='ctx'> 					(pflashcomp[i].optype ==</div><div class='del'>-						IMG_TYPE_PHY_FW))</div><div class='add'>+						OPTYPE_PHY_FW))</div><div class='ctx'> 					break;</div><div class='ctx'> 				dev_err(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='ctx'> 					"cmd to write to flash rom failed.\n");</div><div class='hunk'>@@ -3122,6 +3252,24 @@ static void be_unmap_pci_bars(struct be_adapter *adapter)</div><div class='ctx'> 		iounmap(adapter-&gt;csr);</div><div class='ctx'> 	if (adapter-&gt;db)</div><div class='ctx'> 		iounmap(adapter-&gt;db);</div><div class='add'>+	if (adapter-&gt;roce_db.base)</div><div class='add'>+		pci_iounmap(adapter-&gt;pdev, adapter-&gt;roce_db.base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lancer_roce_map_pci_bars(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='add'>+	u8 __iomem *addr;</div><div class='add'>+</div><div class='add'>+	addr = pci_iomap(pdev, 2, 0);</div><div class='add'>+	if (addr == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;roce_db.base = addr;</div><div class='add'>+	adapter-&gt;roce_db.io_addr = pci_resource_start(pdev, 2);</div><div class='add'>+	adapter-&gt;roce_db.size = 8192;</div><div class='add'>+	adapter-&gt;roce_db.total_size = pci_resource_len(pdev, 2);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int be_map_pci_bars(struct be_adapter *adapter)</div><div class='hunk'>@@ -3130,11 +3278,18 @@ static int be_map_pci_bars(struct be_adapter *adapter)</div><div class='ctx'> 	int db_reg;</div><div class='ctx'> </div><div class='ctx'> 	if (lancer_chip(adapter)) {</div><div class='del'>-		addr = ioremap_nocache(pci_resource_start(adapter-&gt;pdev, 0),</div><div class='del'>-			pci_resource_len(adapter-&gt;pdev, 0));</div><div class='del'>-		if (addr == NULL)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		adapter-&gt;db = addr;</div><div class='add'>+		if (be_type_2_3(adapter)) {</div><div class='add'>+			addr = ioremap_nocache(</div><div class='add'>+					pci_resource_start(adapter-&gt;pdev, 0),</div><div class='add'>+					pci_resource_len(adapter-&gt;pdev, 0));</div><div class='add'>+			if (addr == NULL)</div><div class='add'>+				return -ENOMEM;</div><div class='add'>+			adapter-&gt;db = addr;</div><div class='add'>+		}</div><div class='add'>+		if (adapter-&gt;if_type == SLI_INTF_TYPE_3) {</div><div class='add'>+			if (lancer_roce_map_pci_bars(adapter))</div><div class='add'>+				goto pci_map_err;</div><div class='add'>+		}</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3159,14 +3314,19 @@ static int be_map_pci_bars(struct be_adapter *adapter)</div><div class='ctx'> 	if (addr == NULL)</div><div class='ctx'> 		goto pci_map_err;</div><div class='ctx'> 	adapter-&gt;db = addr;</div><div class='del'>-</div><div class='add'>+	if (adapter-&gt;sli_family == SKYHAWK_SLI_FAMILY) {</div><div class='add'>+		adapter-&gt;roce_db.size = 4096;</div><div class='add'>+		adapter-&gt;roce_db.io_addr =</div><div class='add'>+				pci_resource_start(adapter-&gt;pdev, db_reg);</div><div class='add'>+		adapter-&gt;roce_db.total_size =</div><div class='add'>+				pci_resource_len(adapter-&gt;pdev, db_reg);</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> pci_map_err:</div><div class='ctx'> 	be_unmap_pci_bars(adapter);</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static void be_ctrl_cleanup(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_dma_mem *mem = &amp;adapter-&gt;mbox_mem_alloced;</div><div class='hunk'>@@ -3272,6 +3432,8 @@ static void __devexit be_remove(struct pci_dev *pdev)</div><div class='ctx'> 	if (!adapter)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	be_roce_dev_remove(adapter);</div><div class='add'>+</div><div class='ctx'> 	unregister_netdev(adapter-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 	be_clear(adapter);</div><div class='hunk'>@@ -3280,8 +3442,6 @@ static void __devexit be_remove(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	be_ctrl_cleanup(adapter);</div><div class='ctx'> </div><div class='del'>-	be_sriov_disable(adapter);</div><div class='del'>-</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='hunk'>@@ -3295,9 +3455,43 @@ bool be_is_wol_supported(struct be_adapter *adapter)</div><div class='ctx'> 		!be_is_wol_excluded(adapter)) ? true : false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int be_get_config(struct be_adapter *adapter)</div><div class='add'>+u32 be_get_fw_log_level(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='add'>+	struct be_dma_mem extfat_cmd;</div><div class='add'>+	struct be_fat_conf_params *cfgs;</div><div class='ctx'> 	int status;</div><div class='add'>+	u32 level = 0;</div><div class='add'>+	int j;</div><div class='add'>+</div><div class='add'>+	memset(&amp;extfat_cmd, 0, sizeof(struct be_dma_mem));</div><div class='add'>+	extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps);</div><div class='add'>+	extfat_cmd.va = pci_alloc_consistent(adapter-&gt;pdev, extfat_cmd.size,</div><div class='add'>+					     &amp;extfat_cmd.dma);</div><div class='add'>+</div><div class='add'>+	if (!extfat_cmd.va) {</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "%s: Memory allocation failure\n",</div><div class='add'>+			__func__);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = be_cmd_get_ext_fat_capabilites(adapter, &amp;extfat_cmd);</div><div class='add'>+	if (!status) {</div><div class='add'>+		cfgs = (struct be_fat_conf_params *)(extfat_cmd.va +</div><div class='add'>+						sizeof(struct be_cmd_resp_hdr));</div><div class='add'>+		for (j = 0; j &lt; cfgs-&gt;module[0].num_modes; j++) {</div><div class='add'>+			if (cfgs-&gt;module[0].trace_lvl[j].mode == MODE_UART)</div><div class='add'>+				level = cfgs-&gt;module[0].trace_lvl[j].dbg_lvl;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	pci_free_consistent(adapter-&gt;pdev, extfat_cmd.size, extfat_cmd.va,</div><div class='add'>+			    extfat_cmd.dma);</div><div class='add'>+err:</div><div class='add'>+	return level;</div><div class='add'>+}</div><div class='add'>+static int be_get_initial_config(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	u32 level;</div><div class='ctx'> </div><div class='ctx'> 	status = be_cmd_query_fw_cfg(adapter, &amp;adapter-&gt;port_num,</div><div class='ctx'> 			&amp;adapter-&gt;function_mode, &amp;adapter-&gt;function_caps);</div><div class='hunk'>@@ -3335,10 +3529,13 @@ static int be_get_config(struct be_adapter *adapter)</div><div class='ctx'> 	if (be_is_wol_supported(adapter))</div><div class='ctx'> 		adapter-&gt;wol = true;</div><div class='ctx'> </div><div class='add'>+	level = be_get_fw_log_level(adapter);</div><div class='add'>+	adapter-&gt;msg_enable = level &lt;= FW_LOG_LEVEL_DEFAULT ? NETIF_MSG_HW : 0;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int be_dev_family_check(struct be_adapter *adapter)</div><div class='add'>+static int be_dev_type_check(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='ctx'> 	u32 sli_intf = 0, if_type;</div><div class='hunk'>@@ -3350,17 +3547,27 @@ static int be_dev_family_check(struct be_adapter *adapter)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BE_DEVICE_ID2:</div><div class='ctx'> 	case OC_DEVICE_ID2:</div><div class='del'>-	case OC_DEVICE_ID5:</div><div class='ctx'> 		adapter-&gt;generation = BE_GEN3;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case OC_DEVICE_ID3:</div><div class='ctx'> 	case OC_DEVICE_ID4:</div><div class='ctx'> 		pci_read_config_dword(pdev, SLI_INTF_REG_OFFSET, &amp;sli_intf);</div><div class='add'>+		adapter-&gt;if_type = (sli_intf &amp; SLI_INTF_IF_TYPE_MASK) &gt;&gt;</div><div class='add'>+						SLI_INTF_IF_TYPE_SHIFT;</div><div class='ctx'> 		if_type = (sli_intf &amp; SLI_INTF_IF_TYPE_MASK) &gt;&gt;</div><div class='ctx'> 						SLI_INTF_IF_TYPE_SHIFT;</div><div class='del'>-</div><div class='ctx'> 		if (((sli_intf &amp; SLI_INTF_VALID_MASK) != SLI_INTF_VALID) ||</div><div class='del'>-			if_type != 0x02) {</div><div class='add'>+			!be_type_2_3(adapter)) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "SLI_INTF reg val is not valid\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		adapter-&gt;sli_family = ((sli_intf &amp; SLI_INTF_FAMILY_MASK) &gt;&gt;</div><div class='add'>+					 SLI_INTF_FAMILY_SHIFT);</div><div class='add'>+		adapter-&gt;generation = BE_GEN3;</div><div class='add'>+		break;</div><div class='add'>+	case OC_DEVICE_ID5:</div><div class='add'>+		pci_read_config_dword(pdev, SLI_INTF_REG_OFFSET, &amp;sli_intf);</div><div class='add'>+		if ((sli_intf &amp; SLI_INTF_VALID_MASK) != SLI_INTF_VALID) {</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev, "SLI_INTF reg val is not valid\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3371,6 +3578,9 @@ static int be_dev_family_check(struct be_adapter *adapter)</div><div class='ctx'> 	default:</div><div class='ctx'> 		adapter-&gt;generation = 0;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	pci_read_config_dword(adapter-&gt;pdev, SLI_INTF_REG_OFFSET, &amp;sli_intf);</div><div class='add'>+	adapter-&gt;virtfn = (sli_intf &amp; SLI_INTF_FT_MASK) ? 1 : 0;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3514,6 +3724,14 @@ reschedule:</div><div class='ctx'> 	schedule_delayed_work(&amp;adapter-&gt;work, msecs_to_jiffies(1000));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool be_reset_required(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	pci_read_config_dword(adapter-&gt;pdev, PCICFG_CUST_SCRATCHPAD_CSR, &amp;reg);</div><div class='add'>+	return reg;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __devinit be_probe(struct pci_dev *pdev,</div><div class='ctx'> 			const struct pci_device_id *pdev_id)</div><div class='ctx'> {</div><div class='hunk'>@@ -3539,7 +3757,7 @@ static int __devinit be_probe(struct pci_dev *pdev,</div><div class='ctx'> 	adapter-&gt;pdev = pdev;</div><div class='ctx'> 	pci_set_drvdata(pdev, adapter);</div><div class='ctx'> </div><div class='del'>-	status = be_dev_family_check(adapter);</div><div class='add'>+	status = be_dev_type_check(adapter);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto free_netdev;</div><div class='ctx'> </div><div class='hunk'>@@ -3557,13 +3775,9 @@ static int __devinit be_probe(struct pci_dev *pdev,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	status = be_sriov_enable(adapter);</div><div class='del'>-	if (status)</div><div class='del'>-		goto free_netdev;</div><div class='del'>-</div><div class='ctx'> 	status = be_ctrl_init(adapter);</div><div class='ctx'> 	if (status)</div><div class='del'>-		goto disable_sriov;</div><div class='add'>+		goto free_netdev;</div><div class='ctx'> </div><div class='ctx'> 	if (lancer_chip(adapter)) {</div><div class='ctx'> 		status = lancer_wait_ready(adapter);</div><div class='hunk'>@@ -3590,9 +3804,11 @@ static int __devinit be_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto ctrl_clean;</div><div class='ctx'> </div><div class='del'>-	status = be_cmd_reset_function(adapter);</div><div class='del'>-	if (status)</div><div class='del'>-		goto ctrl_clean;</div><div class='add'>+	if (be_reset_required(adapter)) {</div><div class='add'>+		status = be_cmd_reset_function(adapter);</div><div class='add'>+		if (status)</div><div class='add'>+			goto ctrl_clean;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* The INTR bit may be set in the card when probed by a kdump kernel</div><div class='ctx'> 	 * after a crash.</div><div class='hunk'>@@ -3604,7 +3820,7 @@ static int __devinit be_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto ctrl_clean;</div><div class='ctx'> </div><div class='del'>-	status = be_get_config(adapter);</div><div class='add'>+	status = be_get_initial_config(adapter);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto stats_clean;</div><div class='ctx'> </div><div class='hunk'>@@ -3620,6 +3836,8 @@ static int __devinit be_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (status != 0)</div><div class='ctx'> 		goto unsetup;</div><div class='ctx'> </div><div class='add'>+	be_roce_dev_add(adapter);</div><div class='add'>+</div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "%s: %s port %d\n", netdev-&gt;name, nic_name(pdev),</div><div class='ctx'> 		adapter-&gt;port_num);</div><div class='ctx'> </div><div class='hunk'>@@ -3633,8 +3851,6 @@ stats_clean:</div><div class='ctx'> 	be_stats_cleanup(adapter);</div><div class='ctx'> ctrl_clean:</div><div class='ctx'> 	be_ctrl_cleanup(adapter);</div><div class='del'>-disable_sriov:</div><div class='del'>-	be_sriov_disable(adapter);</div><div class='ctx'> free_netdev:</div><div class='ctx'> 	free_netdev(netdev);</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='hunk'>@@ -3749,6 +3965,11 @@ static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> </div><div class='add'>+	/* The error could cause the FW to trigger a flash debug dump.</div><div class='add'>+	 * Resetting the card while flash dump is in progress</div><div class='add'>+	 * can cause it not to recover; wait for it to finish</div><div class='add'>+	 */</div><div class='add'>+	ssleep(30);</div><div class='ctx'> 	return PCI_ERS_RESULT_NEED_RESET;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be_roce.c b/drivers/net/ethernet/emulex/benet/be_roce.c<br/>new file mode 100644<br/>index 000000000000..deecc44b3617<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be_roce.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_roce.c</a></div><div class='hunk'>@@ -0,0 +1,182 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2005 - 2011 Emulex</div><div class='add'>+ * All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License version 2</div><div class='add'>+ * as published by the Free Software Foundation. The full GNU General</div><div class='add'>+ * Public License is included in this distribution in the file called COPYING.</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ * linux-drivers@emulex.com</div><div class='add'>+ *</div><div class='add'>+ * Emulex</div><div class='add'>+ * 3333 Susan Street</div><div class='add'>+ * Costa Mesa, CA 92626</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include "be.h"</div><div class='add'>+#include "be_cmds.h"</div><div class='add'>+</div><div class='add'>+static struct ocrdma_driver *ocrdma_drv;</div><div class='add'>+static LIST_HEAD(be_adapter_list);</div><div class='add'>+static DEFINE_MUTEX(be_adapter_list_lock);</div><div class='add'>+</div><div class='add'>+static void _be_roce_dev_add(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct be_dev_info dev_info;</div><div class='add'>+	int i, num_vec;</div><div class='add'>+	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='add'>+</div><div class='add'>+	if (!ocrdma_drv)</div><div class='add'>+		return;</div><div class='add'>+	if (pdev-&gt;device == OC_DEVICE_ID5) {</div><div class='add'>+		/* only msix is supported on these devices */</div><div class='add'>+		if (!msix_enabled(adapter))</div><div class='add'>+			return;</div><div class='add'>+		/* DPP region address and length */</div><div class='add'>+		dev_info.dpp_unmapped_addr = pci_resource_start(pdev, 2);</div><div class='add'>+		dev_info.dpp_unmapped_len = pci_resource_len(pdev, 2);</div><div class='add'>+	} else {</div><div class='add'>+		dev_info.dpp_unmapped_addr = 0;</div><div class='add'>+		dev_info.dpp_unmapped_len = 0;</div><div class='add'>+	}</div><div class='add'>+	dev_info.pdev = adapter-&gt;pdev;</div><div class='add'>+	if (adapter-&gt;sli_family == SKYHAWK_SLI_FAMILY)</div><div class='add'>+		dev_info.db = adapter-&gt;db;</div><div class='add'>+	else</div><div class='add'>+		dev_info.db = adapter-&gt;roce_db.base;</div><div class='add'>+	dev_info.unmapped_db = adapter-&gt;roce_db.io_addr;</div><div class='add'>+	dev_info.db_page_size = adapter-&gt;roce_db.size;</div><div class='add'>+	dev_info.db_total_size = adapter-&gt;roce_db.total_size;</div><div class='add'>+	dev_info.netdev = adapter-&gt;netdev;</div><div class='add'>+	memcpy(dev_info.mac_addr, adapter-&gt;netdev-&gt;dev_addr, ETH_ALEN);</div><div class='add'>+	dev_info.dev_family = adapter-&gt;sli_family;</div><div class='add'>+	if (msix_enabled(adapter)) {</div><div class='add'>+		/* provide all the vectors, so that EQ creation response</div><div class='add'>+		 * can decide which one to use.</div><div class='add'>+		 */</div><div class='add'>+		num_vec = adapter-&gt;num_msix_vec + adapter-&gt;num_msix_roce_vec;</div><div class='add'>+		dev_info.intr_mode = BE_INTERRUPT_MODE_MSIX;</div><div class='add'>+		dev_info.msix.num_vectors = min(num_vec, MAX_ROCE_MSIX_VECTORS);</div><div class='add'>+		/* provide start index of the vector,</div><div class='add'>+		 * so in case of linear usage,</div><div class='add'>+		 * it can use the base as starting point.</div><div class='add'>+		 */</div><div class='add'>+		dev_info.msix.start_vector = adapter-&gt;num_evt_qs;</div><div class='add'>+		for (i = 0; i &lt; dev_info.msix.num_vectors; i++) {</div><div class='add'>+			dev_info.msix.vector_list[i] =</div><div class='add'>+			    adapter-&gt;msix_entries[i].vector;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		dev_info.msix.num_vectors = 0;</div><div class='add'>+		dev_info.intr_mode = BE_INTERRUPT_MODE_INTX;</div><div class='add'>+	}</div><div class='add'>+	adapter-&gt;ocrdma_dev = ocrdma_drv-&gt;add(&amp;dev_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void be_roce_dev_add(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (be_roce_supported(adapter)) {</div><div class='add'>+		INIT_LIST_HEAD(&amp;adapter-&gt;entry);</div><div class='add'>+		mutex_lock(&amp;be_adapter_list_lock);</div><div class='add'>+		list_add_tail(&amp;adapter-&gt;entry, &amp;be_adapter_list);</div><div class='add'>+</div><div class='add'>+		/* invoke add() routine of roce driver only if</div><div class='add'>+		 * valid driver registered with add method and add() is not yet</div><div class='add'>+		 * invoked on a given adapter.</div><div class='add'>+		 */</div><div class='add'>+		_be_roce_dev_add(adapter);</div><div class='add'>+		mutex_unlock(&amp;be_adapter_list_lock);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void _be_roce_dev_remove(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (ocrdma_drv &amp;&amp; ocrdma_drv-&gt;remove &amp;&amp; adapter-&gt;ocrdma_dev)</div><div class='add'>+		ocrdma_drv-&gt;remove(adapter-&gt;ocrdma_dev);</div><div class='add'>+	adapter-&gt;ocrdma_dev = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void be_roce_dev_remove(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (be_roce_supported(adapter)) {</div><div class='add'>+		mutex_lock(&amp;be_adapter_list_lock);</div><div class='add'>+		_be_roce_dev_remove(adapter);</div><div class='add'>+		list_del(&amp;adapter-&gt;entry);</div><div class='add'>+		mutex_unlock(&amp;be_adapter_list_lock);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void _be_roce_dev_open(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (ocrdma_drv &amp;&amp; adapter-&gt;ocrdma_dev &amp;&amp;</div><div class='add'>+	    ocrdma_drv-&gt;state_change_handler)</div><div class='add'>+		ocrdma_drv-&gt;state_change_handler(adapter-&gt;ocrdma_dev, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void be_roce_dev_open(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (be_roce_supported(adapter)) {</div><div class='add'>+		mutex_lock(&amp;be_adapter_list_lock);</div><div class='add'>+		_be_roce_dev_open(adapter);</div><div class='add'>+		mutex_unlock(&amp;be_adapter_list_lock);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void _be_roce_dev_close(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (ocrdma_drv &amp;&amp; adapter-&gt;ocrdma_dev &amp;&amp;</div><div class='add'>+	    ocrdma_drv-&gt;state_change_handler)</div><div class='add'>+		ocrdma_drv-&gt;state_change_handler(adapter-&gt;ocrdma_dev, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void be_roce_dev_close(struct be_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (be_roce_supported(adapter)) {</div><div class='add'>+		mutex_lock(&amp;be_adapter_list_lock);</div><div class='add'>+		_be_roce_dev_close(adapter);</div><div class='add'>+		mutex_unlock(&amp;be_adapter_list_lock);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int be_roce_register_driver(struct ocrdma_driver *drv)</div><div class='add'>+{</div><div class='add'>+	struct be_adapter *dev;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;be_adapter_list_lock);</div><div class='add'>+	if (ocrdma_drv) {</div><div class='add'>+		mutex_unlock(&amp;be_adapter_list_lock);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	ocrdma_drv = drv;</div><div class='add'>+	list_for_each_entry(dev, &amp;be_adapter_list, entry) {</div><div class='add'>+		struct net_device *netdev;</div><div class='add'>+		_be_roce_dev_add(dev);</div><div class='add'>+		netdev = dev-&gt;netdev;</div><div class='add'>+		if (netif_running(netdev) &amp;&amp; netif_oper_up(netdev))</div><div class='add'>+			_be_roce_dev_open(dev);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;be_adapter_list_lock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(be_roce_register_driver);</div><div class='add'>+</div><div class='add'>+void be_roce_unregister_driver(struct ocrdma_driver *drv)</div><div class='add'>+{</div><div class='add'>+	struct be_adapter *dev;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;be_adapter_list_lock);</div><div class='add'>+	list_for_each_entry(dev, &amp;be_adapter_list, entry) {</div><div class='add'>+		if (dev-&gt;ocrdma_dev)</div><div class='add'>+			_be_roce_dev_remove(dev);</div><div class='add'>+	}</div><div class='add'>+	ocrdma_drv = NULL;</div><div class='add'>+	mutex_unlock(&amp;be_adapter_list_lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(be_roce_unregister_driver);</div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be_roce.h b/drivers/net/ethernet/emulex/benet/be_roce.h<br/>new file mode 100644<br/>index 000000000000..db4ea8081c07<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/emulex/benet/be_roce.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/emulex/benet/be_roce.h</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2005 - 2011 Emulex</div><div class='add'>+ * All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License version 2</div><div class='add'>+ * as published by the Free Software Foundation. The full GNU General</div><div class='add'>+ * Public License is included in this distribution in the file called COPYING.</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ * linux-drivers@emulex.com</div><div class='add'>+ *</div><div class='add'>+ * Emulex</div><div class='add'>+ * 3333 Susan Street</div><div class='add'>+ * Costa Mesa, CA 92626</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef BE_ROCE_H</div><div class='add'>+#define BE_ROCE_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+</div><div class='add'>+struct ocrdma_dev;</div><div class='add'>+</div><div class='add'>+enum be_interrupt_mode {</div><div class='add'>+	BE_INTERRUPT_MODE_MSIX	= 0,</div><div class='add'>+	BE_INTERRUPT_MODE_INTX	= 1,</div><div class='add'>+	BE_INTERRUPT_MODE_MSI	= 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MAX_ROCE_MSIX_VECTORS   16</div><div class='add'>+struct be_dev_info {</div><div class='add'>+	u8 __iomem *db;</div><div class='add'>+	u64 unmapped_db;</div><div class='add'>+	u32 db_page_size;</div><div class='add'>+	u32 db_total_size;</div><div class='add'>+	u64 dpp_unmapped_addr;</div><div class='add'>+	u32 dpp_unmapped_len;</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	u8 mac_addr[ETH_ALEN];</div><div class='add'>+	u32 dev_family;</div><div class='add'>+	enum be_interrupt_mode intr_mode;</div><div class='add'>+	struct {</div><div class='add'>+		int num_vectors;</div><div class='add'>+		int start_vector;</div><div class='add'>+		u32 vector_list[MAX_ROCE_MSIX_VECTORS];</div><div class='add'>+	} msix;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ocrdma driver register's the callback functions with nic driver. */</div><div class='add'>+struct ocrdma_driver {</div><div class='add'>+	unsigned char name[32];</div><div class='add'>+	struct ocrdma_dev *(*add) (struct be_dev_info *dev_info);</div><div class='add'>+	void (*remove) (struct ocrdma_dev *);</div><div class='add'>+	void (*state_change_handler) (struct ocrdma_dev *, u32 new_state);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	BE_DEV_UP	= 0,</div><div class='add'>+	BE_DEV_DOWN	= 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* APIs for RoCE driver to register callback handlers,</div><div class='add'>+ * which will be invoked when device is added, removed, ifup, ifdown</div><div class='add'>+ */</div><div class='add'>+int be_roce_register_driver(struct ocrdma_driver *drv);</div><div class='add'>+void be_roce_unregister_driver(struct ocrdma_driver *drv);</div><div class='add'>+</div><div class='add'>+/* API for RoCE driver to issue mailbox commands */</div><div class='add'>+int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload,</div><div class='add'>+		    int wrb_payload_size, u16 *cmd_status, u16 *ext_status);</div><div class='add'>+</div><div class='add'>+#endif /* BE_ROCE_H */</div><div class='head'>diff --git a/drivers/net/ethernet/fealnx.c b/drivers/net/ethernet/fealnx.c<br/>index 1637b9862292..9d71c9cc300b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/fealnx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/fealnx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/fealnx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/fealnx.c</a></div><div class='hunk'>@@ -545,9 +545,6 @@ static int __devinit fealnx_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	/* Reset the chip to erase previous misconfiguration. */</div><div class='ctx'> 	iowrite32(0x00000001, ioaddr + BCR);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = (unsigned long)ioaddr;</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-</div><div class='ctx'> 	/* Make certain the descriptor lists are aligned. */</div><div class='ctx'> 	np = netdev_priv(dev);</div><div class='ctx'> 	np-&gt;mem = ioaddr;</div><div class='hunk'>@@ -832,11 +829,13 @@ static int netdev_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = np-&gt;mem;</div><div class='del'>-	int i;</div><div class='add'>+	const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='add'>+	int rc, i;</div><div class='ctx'> </div><div class='ctx'> 	iowrite32(0x00000001, ioaddr + BCR);	/* Reset */</div><div class='ctx'> </div><div class='del'>-	if (request_irq(dev-&gt;irq, intr_handler, IRQF_SHARED, dev-&gt;name, dev))</div><div class='add'>+	rc = request_irq(irq, intr_handler, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	if (rc)</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 3; i++)</div><div class='hunk'>@@ -924,8 +923,7 @@ static int netdev_open(struct net_device *dev)</div><div class='ctx'> 	np-&gt;reset_timer.data = (unsigned long) dev;</div><div class='ctx'> 	np-&gt;reset_timer.function = reset_timer;</div><div class='ctx'> 	np-&gt;reset_timer_armed = 0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1910,7 +1908,7 @@ static int netdev_close(struct net_device *dev)</div><div class='ctx'> 	del_timer_sync(&amp;np-&gt;timer);</div><div class='ctx'> 	del_timer_sync(&amp;np-&gt;reset_timer);</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(np-&gt;pci_dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Free all the skbuffs in the Rx queue. */</div><div class='ctx'> 	for (i = 0; i &lt; RX_RING_SIZE; i++) {</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fec.c b/drivers/net/ethernet/freescale/fec.c<br/>index a12b3f5bc025..ff7f4c5115a1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/fec.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/freescale/fec.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/fec.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/fec.c</a></div><div class='hunk'>@@ -48,6 +48,7 @@</div><div class='ctx'> #include &lt;linux/of_device.h&gt;</div><div class='ctx'> #include &lt;linux/of_gpio.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -206,7 +207,8 @@ struct fec_enet_private {</div><div class='ctx'> </div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> </div><div class='del'>-	struct clk *clk;</div><div class='add'>+	struct clk *clk_ipg;</div><div class='add'>+	struct clk *clk_ahb;</div><div class='ctx'> </div><div class='ctx'> 	/* The saved address of a sent-in-place packet/buffer, for skfree(). */</div><div class='ctx'> 	unsigned char *tx_bounce[TX_RING_SIZE];</div><div class='hunk'>@@ -1064,7 +1066,7 @@ static int fec_enet_mii_init(struct platform_device *pdev)</div><div class='ctx'> 	 * Reference Manual has an error on this, and gets fixed on i.MX6Q</div><div class='ctx'> 	 * document.</div><div class='ctx'> 	 */</div><div class='del'>-	fep-&gt;phy_speed = DIV_ROUND_UP(clk_get_rate(fep-&gt;clk), 5000000);</div><div class='add'>+	fep-&gt;phy_speed = DIV_ROUND_UP(clk_get_rate(fep-&gt;clk_ahb), 5000000);</div><div class='ctx'> 	if (id_entry-&gt;driver_data &amp; FEC_QUIRK_ENET_MAC)</div><div class='ctx'> 		fep-&gt;phy_speed--;</div><div class='ctx'> 	fep-&gt;phy_speed &lt;&lt;= 1;</div><div class='hunk'>@@ -1161,6 +1163,7 @@ static const struct ethtool_ops fec_enet_ethtool_ops = {</div><div class='ctx'> 	.set_settings		= fec_enet_set_settings,</div><div class='ctx'> 	.get_drvinfo		= fec_enet_get_drvinfo,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)</div><div class='hunk'>@@ -1542,6 +1545,7 @@ fec_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct resource *r;</div><div class='ctx'> 	const struct of_device_id *of_id;</div><div class='ctx'> 	static int dev_id;</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='ctx'> </div><div class='ctx'> 	of_id = of_match_device(fec_dt_ids, &amp;pdev-&gt;dev);</div><div class='ctx'> 	if (of_id)</div><div class='hunk'>@@ -1609,12 +1613,26 @@ fec_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fep-&gt;clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='del'>-	if (IS_ERR(fep-&gt;clk)) {</div><div class='del'>-		ret = PTR_ERR(fep-&gt;clk);</div><div class='add'>+	pinctrl = devm_pinctrl_get_select_default(&amp;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(pinctrl)) {</div><div class='add'>+		ret = PTR_ERR(pinctrl);</div><div class='add'>+		goto failed_pin;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fep-&gt;clk_ipg = devm_clk_get(&amp;pdev-&gt;dev, "ipg");</div><div class='add'>+	if (IS_ERR(fep-&gt;clk_ipg)) {</div><div class='add'>+		ret = PTR_ERR(fep-&gt;clk_ipg);</div><div class='add'>+		goto failed_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fep-&gt;clk_ahb = devm_clk_get(&amp;pdev-&gt;dev, "ahb");</div><div class='add'>+	if (IS_ERR(fep-&gt;clk_ahb)) {</div><div class='add'>+		ret = PTR_ERR(fep-&gt;clk_ahb);</div><div class='ctx'> 		goto failed_clk;</div><div class='ctx'> 	}</div><div class='del'>-	clk_prepare_enable(fep-&gt;clk);</div><div class='add'>+</div><div class='add'>+	clk_prepare_enable(fep-&gt;clk_ahb);</div><div class='add'>+	clk_prepare_enable(fep-&gt;clk_ipg);</div><div class='ctx'> </div><div class='ctx'> 	ret = fec_enet_init(ndev);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -1637,8 +1655,9 @@ failed_register:</div><div class='ctx'> 	fec_enet_mii_remove(fep);</div><div class='ctx'> failed_mii_init:</div><div class='ctx'> failed_init:</div><div class='del'>-	clk_disable_unprepare(fep-&gt;clk);</div><div class='del'>-	clk_put(fep-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(fep-&gt;clk_ahb);</div><div class='add'>+	clk_disable_unprepare(fep-&gt;clk_ipg);</div><div class='add'>+failed_pin:</div><div class='ctx'> failed_clk:</div><div class='ctx'> 	for (i = 0; i &lt; FEC_IRQ_NUM; i++) {</div><div class='ctx'> 		irq = platform_get_irq(pdev, i);</div><div class='hunk'>@@ -1670,8 +1689,8 @@ fec_drv_remove(struct platform_device *pdev)</div><div class='ctx'> 		if (irq &gt; 0)</div><div class='ctx'> 			free_irq(irq, ndev);</div><div class='ctx'> 	}</div><div class='del'>-	clk_disable_unprepare(fep-&gt;clk);</div><div class='del'>-	clk_put(fep-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(fep-&gt;clk_ahb);</div><div class='add'>+	clk_disable_unprepare(fep-&gt;clk_ipg);</div><div class='ctx'> 	iounmap(fep-&gt;hwp);</div><div class='ctx'> 	free_netdev(ndev);</div><div class='ctx'> </div><div class='hunk'>@@ -1695,7 +1714,8 @@ fec_suspend(struct device *dev)</div><div class='ctx'> 		fec_stop(ndev);</div><div class='ctx'> 		netif_device_detach(ndev);</div><div class='ctx'> 	}</div><div class='del'>-	clk_disable_unprepare(fep-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(fep-&gt;clk_ahb);</div><div class='add'>+	clk_disable_unprepare(fep-&gt;clk_ipg);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1706,7 +1726,8 @@ fec_resume(struct device *dev)</div><div class='ctx'> 	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='ctx'> 	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='ctx'> </div><div class='del'>-	clk_prepare_enable(fep-&gt;clk);</div><div class='add'>+	clk_prepare_enable(fep-&gt;clk_ahb);</div><div class='add'>+	clk_prepare_enable(fep-&gt;clk_ipg);</div><div class='ctx'> 	if (netif_running(ndev)) {</div><div class='ctx'> 		fec_restart(ndev, fep-&gt;full_duplex);</div><div class='ctx'> 		netif_device_attach(ndev);</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fec_mpc52xx.c b/drivers/net/ethernet/freescale/fec_mpc52xx.c<br/>index 7b34d8c698da..2933d08b036e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/fec_mpc52xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/freescale/fec_mpc52xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/fec_mpc52xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/fec_mpc52xx.c</a></div><div class='hunk'>@@ -437,7 +437,7 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id)</div><div class='ctx'> 		length = status &amp; BCOM_FEC_RX_BD_LEN_MASK;</div><div class='ctx'> 		skb_put(rskb, length - 4);	/* length without CRC32 */</div><div class='ctx'> 		rskb-&gt;protocol = eth_type_trans(rskb, dev);</div><div class='del'>-		if (!skb_defer_rx_timestamp(skb))</div><div class='add'>+		if (!skb_defer_rx_timestamp(rskb))</div><div class='ctx'> 			netif_rx(rskb);</div><div class='ctx'> </div><div class='ctx'> 		spin_lock(&amp;priv-&gt;lock);</div><div class='hunk'>@@ -811,6 +811,7 @@ static const struct ethtool_ops mpc52xx_fec_ethtool_ops = {</div><div class='ctx'> 	.get_link = ethtool_op_get_link,</div><div class='ctx'> 	.get_msglevel = mpc52xx_fec_get_msglevel,</div><div class='ctx'> 	.set_msglevel = mpc52xx_fec_set_msglevel,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c<br/>index e4e6cd2c5f82..2b7633f766d9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c</a></div><div class='hunk'>@@ -963,6 +963,7 @@ static const struct ethtool_ops fs_ethtool_ops = {</div><div class='ctx'> 	.get_msglevel = fs_get_msglevel,</div><div class='ctx'> 	.set_msglevel = fs_set_msglevel,</div><div class='ctx'> 	.get_regs = fs_get_regs,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int fs_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c<br/>index e7bed5303997..0741aded9eb0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/gianfar.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/freescale/gianfar.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/gianfar.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/gianfar.c</a></div><div class='hunk'>@@ -136,7 +136,7 @@ static void gfar_netpoll(struct net_device *dev);</div><div class='ctx'> int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit);</div><div class='ctx'> static int gfar_clean_tx_ring(struct gfar_priv_tx_q *tx_queue);</div><div class='ctx'> static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,</div><div class='del'>-			      int amount_pull);</div><div class='add'>+			      int amount_pull, struct napi_struct *napi);</div><div class='ctx'> void gfar_halt(struct net_device *dev);</div><div class='ctx'> static void gfar_halt_nodisable(struct net_device *dev);</div><div class='ctx'> void gfar_start(struct net_device *dev);</div><div class='hunk'>@@ -1082,7 +1082,7 @@ static int gfar_probe(struct platform_device *ofdev)</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;features &amp; NETIF_F_IP_CSUM ||</div><div class='ctx'> 			priv-&gt;device_flags &amp; FSL_GIANFAR_DEV_HAS_TIMER)</div><div class='del'>-		dev-&gt;hard_header_len += GMAC_FCB_LEN;</div><div class='add'>+		dev-&gt;needed_headroom = GMAC_FCB_LEN;</div><div class='ctx'> </div><div class='ctx'> 	/* Program the isrg regs only if number of grps &gt; 1 */</div><div class='ctx'> 	if (priv-&gt;num_grps &gt; 1) {</div><div class='hunk'>@@ -2675,12 +2675,12 @@ static inline void gfar_rx_checksum(struct sk_buff *skb, struct rxfcb *fcb)</div><div class='ctx'> /* gfar_process_frame() -- handle one incoming packet if skb</div><div class='ctx'>  * isn't NULL.  */</div><div class='ctx'> static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,</div><div class='del'>-			      int amount_pull)</div><div class='add'>+			      int amount_pull, struct napi_struct *napi)</div><div class='ctx'> {</div><div class='ctx'> 	struct gfar_private *priv = netdev_priv(dev);</div><div class='ctx'> 	struct rxfcb *fcb = NULL;</div><div class='ctx'> </div><div class='del'>-	int ret;</div><div class='add'>+	gro_result_t ret;</div><div class='ctx'> </div><div class='ctx'> 	/* fcb is at the beginning if exists */</div><div class='ctx'> 	fcb = (struct rxfcb *)skb-&gt;data;</div><div class='hunk'>@@ -2719,9 +2719,9 @@ static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,</div><div class='ctx'> 		__vlan_hwaccel_put_tag(skb, fcb-&gt;vlctl);</div><div class='ctx'> </div><div class='ctx'> 	/* Send the packet up the stack */</div><div class='del'>-	ret = netif_receive_skb(skb);</div><div class='add'>+	ret = napi_gro_receive(napi, skb);</div><div class='ctx'> </div><div class='del'>-	if (NET_RX_DROP == ret)</div><div class='add'>+	if (GRO_DROP == ret)</div><div class='ctx'> 		priv-&gt;extra_stats.kernel_dropped++;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2783,7 +2783,8 @@ int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit)</div><div class='ctx'> 				skb_put(skb, pkt_len);</div><div class='ctx'> 				rx_queue-&gt;stats.rx_bytes += pkt_len;</div><div class='ctx'> 				skb_record_rx_queue(skb, rx_queue-&gt;qindex);</div><div class='del'>-				gfar_process_frame(dev, skb, amount_pull);</div><div class='add'>+				gfar_process_frame(dev, skb, amount_pull,</div><div class='add'>+						&amp;rx_queue-&gt;grp-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 			} else {</div><div class='ctx'> 				netif_warn(priv, rx_err, dev, "Missing skb!\n");</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/gianfar.h b/drivers/net/ethernet/freescale/gianfar.h<br/>index 4c9f8d487dbb..2136c7ff5e6d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/gianfar.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/freescale/gianfar.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/gianfar.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/gianfar.h</a></div><div class='hunk'>@@ -1210,4 +1210,7 @@ struct filer_table {</div><div class='ctx'> 	struct gfar_filer_entry fe[MAX_FILER_CACHE_IDX + 20];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* The gianfar_ptp module will set this variable */</div><div class='add'>+extern int gfar_phc_index;</div><div class='add'>+</div><div class='ctx'> #endif /* __GIANFAR_H */</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/gianfar_ethtool.c b/drivers/net/ethernet/freescale/gianfar_ethtool.c<br/>index 8d74efd04bb9..8a025570d97e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/gianfar_ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/freescale/gianfar_ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/gianfar_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/gianfar_ethtool.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='hunk'>@@ -1739,6 +1740,34 @@ static int gfar_get_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int gfar_phc_index = -1;</div><div class='add'>+</div><div class='add'>+static int gfar_get_ts_info(struct net_device *dev,</div><div class='add'>+			    struct ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct gfar_private *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;device_flags &amp; FSL_GIANFAR_DEV_HAS_TIMER)) {</div><div class='add'>+		info-&gt;so_timestamping =</div><div class='add'>+			SOF_TIMESTAMPING_RX_SOFTWARE |</div><div class='add'>+			SOF_TIMESTAMPING_SOFTWARE;</div><div class='add'>+		info-&gt;phc_index = -1;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	info-&gt;so_timestamping =</div><div class='add'>+		SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+	info-&gt;phc_index = gfar_phc_index;</div><div class='add'>+	info-&gt;tx_types =</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_TX_OFF) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_TX_ON);</div><div class='add'>+	info-&gt;rx_filters =</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_ALL);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct ethtool_ops gfar_ethtool_ops = {</div><div class='ctx'> 	.get_settings = gfar_gsettings,</div><div class='ctx'> 	.set_settings = gfar_ssettings,</div><div class='hunk'>@@ -1761,4 +1790,5 @@ const struct ethtool_ops gfar_ethtool_ops = {</div><div class='ctx'> #endif</div><div class='ctx'> 	.set_rxnfc = gfar_set_nfc,</div><div class='ctx'> 	.get_rxnfc = gfar_get_nfc,</div><div class='add'>+	.get_ts_info = gfar_get_ts_info,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/gianfar_ptp.c b/drivers/net/ethernet/freescale/gianfar_ptp.c<br/>index 5fd620bec15c..c08e5d40fecb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/gianfar_ptp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/freescale/gianfar_ptp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/gianfar_ptp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/gianfar_ptp.c</a></div><div class='hunk'>@@ -515,6 +515,7 @@ static int gianfar_ptp_probe(struct platform_device *dev)</div><div class='ctx'> 		err = PTR_ERR(etsects-&gt;clock);</div><div class='ctx'> 		goto no_clock;</div><div class='ctx'> 	}</div><div class='add'>+	gfar_phc_clock = ptp_clock_index(etsects-&gt;clock);</div><div class='ctx'> </div><div class='ctx'> 	dev_set_drvdata(&amp;dev-&gt;dev, etsects);</div><div class='ctx'> </div><div class='hunk'>@@ -538,6 +539,7 @@ static int gianfar_ptp_remove(struct platform_device *dev)</div><div class='ctx'> 	gfar_write(&amp;etsects-&gt;regs-&gt;tmr_temask, 0);</div><div class='ctx'> 	gfar_write(&amp;etsects-&gt;regs-&gt;tmr_ctrl,   0);</div><div class='ctx'> </div><div class='add'>+	gfar_phc_clock = -1;</div><div class='ctx'> 	ptp_clock_unregister(etsects-&gt;clock);</div><div class='ctx'> 	iounmap(etsects-&gt;regs);</div><div class='ctx'> 	release_resource(etsects-&gt;rsrc);</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/ucc_geth.c b/drivers/net/ethernet/freescale/ucc_geth.c<br/>index 17a46e76123f..9ac14f804851 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/ucc_geth.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/freescale/ucc_geth.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/ucc_geth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/ucc_geth.c</a></div><div class='hunk'>@@ -116,10 +116,10 @@ static struct ucc_geth_info ugeth_primary_info = {</div><div class='ctx'> 	.maxGroupAddrInHash = 4,</div><div class='ctx'> 	.maxIndAddrInHash = 4,</div><div class='ctx'> 	.prel = 7,</div><div class='del'>-	.maxFrameLength = 1518,</div><div class='add'>+	.maxFrameLength = 1518+16, /* Add extra bytes for VLANs etc. */</div><div class='ctx'> 	.minFrameLength = 64,</div><div class='del'>-	.maxD1Length = 1520,</div><div class='del'>-	.maxD2Length = 1520,</div><div class='add'>+	.maxD1Length = 1520+16, /* Add extra bytes for VLANs etc. */</div><div class='add'>+	.maxD2Length = 1520+16, /* Add extra bytes for VLANs etc. */</div><div class='ctx'> 	.vlantype = 0x8100,</div><div class='ctx'> 	.ecamptr = ((uint32_t) NULL),</div><div class='ctx'> 	.eventRegMask = UCCE_OTHER,</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/ucc_geth.h b/drivers/net/ethernet/freescale/ucc_geth.h<br/>index 2e395a2566b8..f71b3e7b12de 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/ucc_geth.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/freescale/ucc_geth.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/ucc_geth.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/ucc_geth.h</a></div><div class='hunk'>@@ -877,7 +877,7 @@ struct ucc_geth_hardware_statistics {</div><div class='ctx'> </div><div class='ctx'> /* Driver definitions */</div><div class='ctx'> #define TX_BD_RING_LEN                          0x10</div><div class='del'>-#define RX_BD_RING_LEN                          0x10</div><div class='add'>+#define RX_BD_RING_LEN                          0x20</div><div class='ctx'> </div><div class='ctx'> #define TX_RING_MOD_MASK(size)                  (size-1)</div><div class='ctx'> #define RX_RING_MOD_MASK(size)                  (size-1)</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/ucc_geth_ethtool.c b/drivers/net/ethernet/freescale/ucc_geth_ethtool.c<br/>index a97257f91a3d..37b035306013 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/ucc_geth_ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/freescale/ucc_geth_ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/freescale/ucc_geth_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/freescale/ucc_geth_ethtool.c</a></div><div class='hunk'>@@ -415,6 +415,7 @@ static const struct ethtool_ops uec_ethtool_ops = {</div><div class='ctx'> 	.get_ethtool_stats      = uec_get_ethtool_stats,</div><div class='ctx'> 	.get_wol		= uec_get_wol,</div><div class='ctx'> 	.set_wol		= uec_set_wol,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void uec_set_ethtool_ops(struct net_device *netdev)</div><div class='head'>diff --git a/drivers/net/ethernet/fujitsu/at1700.c b/drivers/net/ethernet/fujitsu/at1700.c<br/>index 3d94797c8f9b..4b80dc4531ad 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/fujitsu/at1700.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/fujitsu/at1700.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/fujitsu/at1700.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/fujitsu/at1700.c</a></div><div class='hunk'>@@ -27,7 +27,7 @@</div><div class='ctx'> 	ATI provided their EEPROM configuration code header file.</div><div class='ctx'>     Thanks to NIIBE Yutaka &lt;gniibe@mri.co.jp&gt; for bug fixes.</div><div class='ctx'> </div><div class='del'>-    MCA bus (AT1720) support by Rene Schmit &lt;rene@bss.lu&gt;</div><div class='add'>+    MCA bus (AT1720) support (now deleted) by Rene Schmit &lt;rene@bss.lu&gt;</div><div class='ctx'> </div><div class='ctx'>   Bugs:</div><div class='ctx'> 	The MB86965 has a design flaw that makes all probes unreliable.  Not</div><div class='hunk'>@@ -38,7 +38,6 @@</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/mca-legacy.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='hunk'>@@ -79,24 +78,6 @@ static unsigned at1700_probe_list[] __initdata = {</div><div class='ctx'> 	0x260, 0x280, 0x2a0, 0x240, 0x340, 0x320, 0x380, 0x300, 0</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- *	MCA</div><div class='del'>- */</div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-static int at1700_ioaddr_pattern[] __initdata = {</div><div class='del'>-	0x00, 0x04, 0x01, 0x05, 0x02, 0x06, 0x03, 0x07</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int at1700_mca_probe_list[] __initdata = {</div><div class='del'>-	0x400, 0x1400, 0x2400, 0x3400, 0x4400, 0x5400, 0x6400, 0x7400, 0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int at1700_irq_pattern[] __initdata = {</div><div class='del'>-	0x00, 0x00, 0x00, 0x30, 0x70, 0xb0, 0x00, 0x00,</div><div class='del'>-	0x00, 0xf0, 0x34, 0x74, 0xb4, 0x00, 0x00, 0xf4, 0x00</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* use 0 for production, 1 for verification, &gt;2 for debug */</div><div class='ctx'> #ifndef NET_DEBUG</div><div class='ctx'> #define NET_DEBUG 1</div><div class='hunk'>@@ -114,7 +95,6 @@ struct net_local {</div><div class='ctx'> 	uint tx_queue_ready:1;			/* Tx queue is ready to be sent. */</div><div class='ctx'> 	uint rx_started:1;			/* Packets are Rxing. */</div><div class='ctx'> 	uchar tx_queue;				/* Number of packet on the Tx queue. */</div><div class='del'>-	char mca_slot;				/* -1 means ISA */</div><div class='ctx'> 	ushort tx_queue_len;			/* Current length of the Tx queue. */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -166,21 +146,6 @@ static void set_rx_mode(struct net_device *dev);</div><div class='ctx'> static void net_tx_timeout (struct net_device *dev);</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-struct at1720_mca_adapters_struct {</div><div class='del'>-	char* name;</div><div class='del'>-	int id;</div><div class='del'>-};</div><div class='del'>-/* rEnE : maybe there are others I don't know off... */</div><div class='del'>-</div><div class='del'>-static struct at1720_mca_adapters_struct at1720_mca_adapters[] __initdata = {</div><div class='del'>-	{ "Allied Telesys AT1720AT",	0x6410 },</div><div class='del'>-	{ "Allied Telesys AT1720BT", 	0x6413 },</div><div class='del'>-	{ "Allied Telesys AT1720T",	0x6416 },</div><div class='del'>-	{ NULL, 0 },</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* Check for a network adaptor of this type, and return '0' iff one exists.</div><div class='ctx'>    If dev-&gt;base_addr == 0, probe all likely locations.</div><div class='ctx'>    If dev-&gt;base_addr == 1, always return failure.</div><div class='hunk'>@@ -194,11 +159,6 @@ static int irq;</div><div class='ctx'> </div><div class='ctx'> static void cleanup_card(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-	struct net_local *lp = netdev_priv(dev);</div><div class='del'>-	if (lp-&gt;mca_slot &gt;= 0)</div><div class='del'>-		mca_mark_as_unused(lp-&gt;mca_slot);</div><div class='del'>-#endif</div><div class='ctx'> 	free_irq(dev-&gt;irq, NULL);</div><div class='ctx'> 	release_region(dev-&gt;base_addr, AT1700_IO_EXTENT);</div><div class='ctx'> }</div><div class='hunk'>@@ -273,7 +233,7 @@ static int __init at1700_probe1(struct net_device *dev, int ioaddr)</div><div class='ctx'> 	static const char fmv_irqmap_pnp[8] = {3, 4, 5, 7, 9, 10, 11, 15};</div><div class='ctx'> 	static const char at1700_irqmap[8] = {3, 4, 5, 9, 10, 11, 14, 15};</div><div class='ctx'> 	unsigned int i, irq, is_fmv18x = 0, is_at1700 = 0;</div><div class='del'>-	int slot, ret = -ENODEV;</div><div class='add'>+	int ret = -ENODEV;</div><div class='ctx'> 	struct net_local *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!request_region(ioaddr, AT1700_IO_EXTENT, DRV_NAME))</div><div class='hunk'>@@ -288,64 +248,6 @@ static int __init at1700_probe1(struct net_device *dev, int ioaddr)</div><div class='ctx'> 		   ioaddr, read_eeprom(ioaddr, 4), read_eeprom(ioaddr, 5),</div><div class='ctx'> 		   read_eeprom(ioaddr, 6), inw(ioaddr + EEPROM_Ctrl));</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-	/* rEnE (rene@bss.lu): got this from 3c509 driver source , adapted for AT1720 */</div><div class='del'>-</div><div class='del'>-    /* Based on Erik Nygren's (nygren@mit.edu) 3c529 patch, heavily</div><div class='del'>-	modified by Chris Beauregard (cpbeaure@csclub.uwaterloo.ca)</div><div class='del'>-	to support standard MCA probing. */</div><div class='del'>-</div><div class='del'>-	/* redone for multi-card detection by ZP Gu (zpg@castle.net) */</div><div class='del'>-	/* now works as a module */</div><div class='del'>-</div><div class='del'>-	if (MCA_bus) {</div><div class='del'>-		int j;</div><div class='del'>-		int l_i;</div><div class='del'>-		u_char pos3, pos4;</div><div class='del'>-</div><div class='del'>-		for (j = 0; at1720_mca_adapters[j].name != NULL; j ++) {</div><div class='del'>-			slot = 0;</div><div class='del'>-			while (slot != MCA_NOTFOUND) {</div><div class='del'>-</div><div class='del'>-				slot = mca_find_unused_adapter( at1720_mca_adapters[j].id, slot );</div><div class='del'>-				if (slot == MCA_NOTFOUND) break;</div><div class='del'>-</div><div class='del'>-				/* if we get this far, an adapter has been detected and is</div><div class='del'>-				enabled */</div><div class='del'>-</div><div class='del'>-				pos3 = mca_read_stored_pos( slot, 3 );</div><div class='del'>-				pos4 = mca_read_stored_pos( slot, 4 );</div><div class='del'>-</div><div class='del'>-				for (l_i = 0; l_i &lt; 8; l_i++)</div><div class='del'>-					if (( pos3 &amp; 0x07) == at1700_ioaddr_pattern[l_i])</div><div class='del'>-						break;</div><div class='del'>-				ioaddr = at1700_mca_probe_list[l_i];</div><div class='del'>-</div><div class='del'>-				for (irq = 0; irq &lt; 0x10; irq++)</div><div class='del'>-					if (((((pos4&gt;&gt;4) &amp; 0x0f) | (pos3 &amp; 0xf0)) &amp; 0xff) == at1700_irq_pattern[irq])</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					/* probing for a card at a particular IO/IRQ */</div><div class='del'>-				if ((dev-&gt;irq &amp;&amp; dev-&gt;irq != irq) ||</div><div class='del'>-				    (dev-&gt;base_addr &amp;&amp; dev-&gt;base_addr != ioaddr)) {</div><div class='del'>-				  	slot++;		/* probing next slot */</div><div class='del'>-				  	continue;</div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-				dev-&gt;irq = irq;</div><div class='del'>-</div><div class='del'>-				/* claim the slot */</div><div class='del'>-				mca_set_adapter_name( slot, at1720_mca_adapters[j].name );</div><div class='del'>-				mca_mark_as_used(slot);</div><div class='del'>-</div><div class='del'>-				goto found;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		/* if we get here, we didn't find an MCA adapter - try ISA */</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	slot = -1;</div><div class='ctx'> 	/* We must check for the EEPROM-config boards first, else accessing</div><div class='ctx'> 	   IOCONFIG0 will move the board! */</div><div class='ctx'> 	if (at1700_probe_list[inb(ioaddr + IOCONFIG1) &amp; 0x07] == ioaddr &amp;&amp;</div><div class='hunk'>@@ -360,11 +262,7 @@ static int __init at1700_probe1(struct net_device *dev, int ioaddr)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-found:</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		/* Reset the internal state machines. */</div><div class='add'>+	/* Reset the internal state machines. */</div><div class='ctx'> 	outb(0, ioaddr + RESET);</div><div class='ctx'> </div><div class='ctx'> 	if (is_at1700) {</div><div class='hunk'>@@ -380,11 +278,11 @@ found:</div><div class='ctx'> 					break;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (i == 8) {</div><div class='del'>-				goto err_mca;</div><div class='add'>+				goto err_out;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (fmv18x_probe_list[inb(ioaddr + IOCONFIG) &amp; 0x07] != ioaddr)</div><div class='del'>-				goto err_mca;</div><div class='add'>+				goto err_out;</div><div class='ctx'> 			irq = fmv_irqmap[(inb(ioaddr + IOCONFIG)&gt;&gt;6) &amp; 0x03];</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -464,23 +362,17 @@ found:</div><div class='ctx'> 	spin_lock_init(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;jumpered = is_fmv18x;</div><div class='del'>-	lp-&gt;mca_slot = slot;</div><div class='ctx'> 	/* Snarf the interrupt vector now. */</div><div class='ctx'> 	ret = request_irq(irq, net_interrupt, 0, DRV_NAME, dev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		printk(KERN_ERR "AT1700 at %#3x is unusable due to a "</div><div class='ctx'> 		       "conflict on IRQ %d.\n",</div><div class='ctx'> 		       ioaddr, irq);</div><div class='del'>-		goto err_mca;</div><div class='add'>+		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_mca:</div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-	if (slot &gt;= 0)</div><div class='del'>-		mca_mark_as_unused(slot);</div><div class='del'>-#endif</div><div class='ctx'> err_out:</div><div class='ctx'> 	release_region(ioaddr, AT1700_IO_EXTENT);</div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/drivers/net/ethernet/i825xx/3c523.c b/drivers/net/ethernet/i825xx/3c523.c<br/>deleted file mode 100644<br/>index 8451ecd4c1ec..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/i825xx/3c523.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/i825xx/3c523.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1312 +0,0 @@</div><div class='del'>-/*</div><div class='del'>-   net-3-driver for the 3c523 Etherlink/MC card (i82586 Ethernet chip)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-   This is an extension to the Linux operating system, and is covered by the</div><div class='del'>-   same GNU General Public License that covers that work.</div><div class='del'>-</div><div class='del'>-   Copyright 1995, 1996 by Chris Beauregard (cpbeaure@undergrad.math.uwaterloo.ca)</div><div class='del'>-</div><div class='del'>-   This is basically Michael Hipp's ni52 driver, with a new probing</div><div class='del'>-   algorithm and some minor changes to the 82586 CA and reset routines.</div><div class='del'>-   Thanks a lot Michael for a really clean i82586 implementation!  Unless</div><div class='del'>-   otherwise documented in ni52.c, any bugs are mine.</div><div class='del'>-</div><div class='del'>-   Contrary to the Ethernet-HOWTO, this isn't based on the 3c507 driver in</div><div class='del'>-   any way.  The ni52 is a lot easier to modify.</div><div class='del'>-</div><div class='del'>-   sources:</div><div class='del'>-   ni52.c</div><div class='del'>-</div><div class='del'>-   Crynwr packet driver collection was a great reference for my first</div><div class='del'>-   attempt at this sucker.  The 3c507 driver also helped, until I noticed</div><div class='del'>-   that ni52.c was a lot nicer.</div><div class='del'>-</div><div class='del'>-   EtherLink/MC: Micro Channel Ethernet Adapter Technical Reference</div><div class='del'>-   Manual, courtesy of 3Com CardFacts, documents the 3c523-specific</div><div class='del'>-   stuff.  Information on CardFacts is found in the Ethernet HOWTO.</div><div class='del'>-   Also see &lt;a href="http://www.3com.com/"&gt;</div><div class='del'>-</div><div class='del'>-   Microprocessor Communications Support Chips, T.J. Byers, ISBN</div><div class='del'>-   0-444-01224-9, has a section on the i82586.  It tells you just enough</div><div class='del'>-   to know that you really don't want to learn how to program the chip.</div><div class='del'>-</div><div class='del'>-   The original device probe code was stolen from ps2esdi.c</div><div class='del'>-</div><div class='del'>-   Known Problems:</div><div class='del'>-   Since most of the code was stolen from ni52.c, you'll run across the</div><div class='del'>-   same bugs in the 0.62 version of ni52.c, plus maybe a few because of</div><div class='del'>-   the 3c523 idiosynchacies.  The 3c523 has 16K of RAM though, so there</div><div class='del'>-   shouldn't be the overrun problem that the 8K ni52 has.</div><div class='del'>-</div><div class='del'>-   This driver is for a 16K adapter.  It should work fine on the 64K</div><div class='del'>-   adapters, but it will only use one of the 4 banks of RAM.  Modifying</div><div class='del'>-   this for the 64K version would require a lot of heinous bank</div><div class='del'>-   switching, which I'm sure not interested in doing.  If you try to</div><div class='del'>-   implement a bank switching version, you'll basically have to remember</div><div class='del'>-   what bank is enabled and do a switch every time you access a memory</div><div class='del'>-   location that's not current.  You'll also have to remap pointers on</div><div class='del'>-   the driver side, because it only knows about 16K of the memory.</div><div class='del'>-   Anyone desperate or masochistic enough to try?</div><div class='del'>-</div><div class='del'>-   It seems to be stable now when multiple transmit buffers are used.  I</div><div class='del'>-   can't see any performance difference, but then I'm working on a 386SX.</div><div class='del'>-</div><div class='del'>-   Multicast doesn't work.  It doesn't even pretend to work.  Don't use</div><div class='del'>-   it.  Don't compile your kernel with multicast support.  I don't know</div><div class='del'>-   why.</div><div class='del'>-</div><div class='del'>-   Features:</div><div class='del'>-   This driver is useable as a loadable module.  If you try to specify an</div><div class='del'>-   IRQ or a IO address (via insmod 3c523.o irq=xx io=0xyyy), it will</div><div class='del'>-   search the MCA slots until it finds a 3c523 with the specified</div><div class='del'>-   parameters.</div><div class='del'>-</div><div class='del'>-   This driver does support multiple ethernet cards when used as a module</div><div class='del'>-   (up to MAX_3C523_CARDS, the default being 4)</div><div class='del'>-</div><div class='del'>-   This has been tested with both BNC and TP versions, internal and</div><div class='del'>-   external transceivers.  Haven't tested with the 64K version (that I</div><div class='del'>-   know of).</div><div class='del'>-</div><div class='del'>-   History:</div><div class='del'>-   Jan 1st, 1996</div><div class='del'>-   first public release</div><div class='del'>-   Feb 4th, 1996</div><div class='del'>-   update to 1.3.59, incorporated multicast diffs from ni52.c</div><div class='del'>-   Feb 15th, 1996</div><div class='del'>-   added shared irq support</div><div class='del'>-   Apr 1999</div><div class='del'>-   added support for multiple cards when used as a module</div><div class='del'>-   added option to disable multicast as is causes problems</div><div class='del'>-       Ganesh Sittampalam &lt;ganesh.sittampalam@magdalen.oxford.ac.uk&gt;</div><div class='del'>-       Stuart Adamson &lt;stuart.adamson@compsoc.net&gt;</div><div class='del'>-   Nov 2001</div><div class='del'>-   added support for ethtool (jgarzik)</div><div class='del'>-</div><div class='del'>-   $Header: /fsys2/home/chrisb/linux-1.3.59-MCA/drivers/net/RCS/3c523.c,v 1.1 1996/02/05 01:53:46 chrisb Exp chrisb $</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define DRV_NAME		"3c523"</div><div class='del'>-#define DRV_VERSION		"17-Nov-2001"</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/mca-legacy.h&gt;</div><div class='del'>-#include &lt;linux/ethtool.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include "3c523.h"</div><div class='del'>-</div><div class='del'>-/*************************************************************************/</div><div class='del'>-#define DEBUG			/* debug on */</div><div class='del'>-#define SYSBUSVAL 0		/* 1 = 8 Bit, 0 = 16 bit - 3c523 only does 16 bit */</div><div class='del'>-#undef ELMC_MULTICAST		/* Disable multicast support as it is somewhat seriously broken at the moment */</div><div class='del'>-</div><div class='del'>-#define make32(ptr16) (p-&gt;memtop + (short) (ptr16) )</div><div class='del'>-#define make24(ptr32) ((char *) (ptr32) - p-&gt;base)</div><div class='del'>-#define make16(ptr32) ((unsigned short) ((unsigned long) (ptr32) - (unsigned long) p-&gt;memtop ))</div><div class='del'>-</div><div class='del'>-/*************************************************************************/</div><div class='del'>-/*</div><div class='del'>-   Tables to which we can map values in the configuration registers.</div><div class='del'>- */</div><div class='del'>-static int irq_table[] __initdata = {</div><div class='del'>-	12, 7, 3, 9</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int csr_table[] __initdata = {</div><div class='del'>-	0x300, 0x1300, 0x2300, 0x3300</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int shm_table[] __initdata = {</div><div class='del'>-	0x0c0000, 0x0c8000, 0x0d0000, 0x0d8000</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/******************* how to calculate the buffers *****************************</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-  * IMPORTANT NOTE: if you configure only one NUM_XMIT_BUFFS, the driver works</div><div class='del'>-  * --------------- in a different (more stable?) mode. Only in this mode it's</div><div class='del'>-  *                 possible to configure the driver with 'NO_NOPCOMMANDS'</div><div class='del'>-</div><div class='del'>-sizeof(scp)=12; sizeof(scb)=16; sizeof(iscp)=8;</div><div class='del'>-sizeof(scp)+sizeof(iscp)+sizeof(scb) = 36 = INIT</div><div class='del'>-sizeof(rfd) = 24; sizeof(rbd) = 12;</div><div class='del'>-sizeof(tbd) = 8; sizeof(transmit_cmd) = 16;</div><div class='del'>-sizeof(nop_cmd) = 8;</div><div class='del'>-</div><div class='del'>-  * if you don't know the driver, better do not change this values: */</div><div class='del'>-</div><div class='del'>-#define RECV_BUFF_SIZE 1524	/* slightly oversized */</div><div class='del'>-#define XMIT_BUFF_SIZE 1524	/* slightly oversized */</div><div class='del'>-#define NUM_XMIT_BUFFS 1	/* config for both, 8K and 16K shmem */</div><div class='del'>-#define NUM_RECV_BUFFS_8  4	/* config for 8K shared mem */</div><div class='del'>-#define NUM_RECV_BUFFS_16 9	/* config for 16K shared mem */</div><div class='del'>-</div><div class='del'>-#if (NUM_XMIT_BUFFS == 1)</div><div class='del'>-#define NO_NOPCOMMANDS		/* only possible with NUM_XMIT_BUFFS=1 */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/**************************************************************************/</div><div class='del'>-</div><div class='del'>-#define DELAY(x) { mdelay(32 * x); }</div><div class='del'>-</div><div class='del'>-/* a much shorter delay: */</div><div class='del'>-#define DELAY_16(); { udelay(16) ; }</div><div class='del'>-</div><div class='del'>-/* wait for command with timeout: */</div><div class='del'>-#define WAIT_4_SCB_CMD() { int i; \</div><div class='del'>-  for(i=0;i&lt;1024;i++) { \</div><div class='del'>-    if(!p-&gt;scb-&gt;cmd) break; \</div><div class='del'>-    DELAY_16(); \</div><div class='del'>-    if(i == 1023) { \</div><div class='del'>-      pr_warning("%s:%d: scb_cmd timed out .. resetting i82586\n",\</div><div class='del'>-      	dev-&gt;name,__LINE__); \</div><div class='del'>-      elmc_id_reset586(); } } }</div><div class='del'>-</div><div class='del'>-static irqreturn_t elmc_interrupt(int irq, void *dev_id);</div><div class='del'>-static int elmc_open(struct net_device *dev);</div><div class='del'>-static int elmc_close(struct net_device *dev);</div><div class='del'>-static netdev_tx_t elmc_send_packet(struct sk_buff *, struct net_device *);</div><div class='del'>-static struct net_device_stats *elmc_get_stats(struct net_device *dev);</div><div class='del'>-static void elmc_timeout(struct net_device *dev);</div><div class='del'>-#ifdef ELMC_MULTICAST</div><div class='del'>-static void set_multicast_list(struct net_device *dev);</div><div class='del'>-#endif</div><div class='del'>-static const struct ethtool_ops netdev_ethtool_ops;</div><div class='del'>-</div><div class='del'>-/* helper-functions */</div><div class='del'>-static int init586(struct net_device *dev);</div><div class='del'>-static int check586(struct net_device *dev, unsigned long where, unsigned size);</div><div class='del'>-static void alloc586(struct net_device *dev);</div><div class='del'>-static void startrecv586(struct net_device *dev);</div><div class='del'>-static void *alloc_rfa(struct net_device *dev, void *ptr);</div><div class='del'>-static void elmc_rcv_int(struct net_device *dev);</div><div class='del'>-static void elmc_xmt_int(struct net_device *dev);</div><div class='del'>-static void elmc_rnr_int(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-struct priv {</div><div class='del'>-	unsigned long base;</div><div class='del'>-	char *memtop;</div><div class='del'>-	unsigned long mapped_start;		/* Start of ioremap */</div><div class='del'>-	volatile struct rfd_struct *rfd_last, *rfd_top, *rfd_first;</div><div class='del'>-	volatile struct scp_struct *scp;	/* volatile is important */</div><div class='del'>-	volatile struct iscp_struct *iscp;	/* volatile is important */</div><div class='del'>-	volatile struct scb_struct *scb;	/* volatile is important */</div><div class='del'>-	volatile struct tbd_struct *xmit_buffs[NUM_XMIT_BUFFS];</div><div class='del'>-#if (NUM_XMIT_BUFFS == 1)</div><div class='del'>-	volatile struct transmit_cmd_struct *xmit_cmds[2];</div><div class='del'>-	volatile struct nop_cmd_struct *nop_cmds[2];</div><div class='del'>-#else</div><div class='del'>-	volatile struct transmit_cmd_struct *xmit_cmds[NUM_XMIT_BUFFS];</div><div class='del'>-	volatile struct nop_cmd_struct *nop_cmds[NUM_XMIT_BUFFS];</div><div class='del'>-#endif</div><div class='del'>-	volatile int nop_point, num_recv_buffs;</div><div class='del'>-	volatile char *xmit_cbuffs[NUM_XMIT_BUFFS];</div><div class='del'>-	volatile int xmit_count, xmit_last;</div><div class='del'>-	volatile int slot;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define elmc_attn586()  {elmc_do_attn586(dev-&gt;base_addr,ELMC_CTRL_INTE);}</div><div class='del'>-#define elmc_reset586() {elmc_do_reset586(dev-&gt;base_addr,ELMC_CTRL_INTE);}</div><div class='del'>-</div><div class='del'>-/* with interrupts disabled - this will clear the interrupt bit in the</div><div class='del'>-   3c523 control register, and won't put it back.  This effectively</div><div class='del'>-   disables interrupts on the card. */</div><div class='del'>-#define elmc_id_attn586()  {elmc_do_attn586(dev-&gt;base_addr,0);}</div><div class='del'>-#define elmc_id_reset586() {elmc_do_reset586(dev-&gt;base_addr,0);}</div><div class='del'>-</div><div class='del'>-/*************************************************************************/</div><div class='del'>-/*</div><div class='del'>-   Do a Channel Attention on the 3c523.  This is extremely board dependent.</div><div class='del'>- */</div><div class='del'>-static void elmc_do_attn586(int ioaddr, int ints)</div><div class='del'>-{</div><div class='del'>-	/* the 3c523 requires a minimum of 500 ns.  The delays here might be</div><div class='del'>-	   a little too large, and hence they may cut the performance of the</div><div class='del'>-	   card slightly.  If someone who knows a little more about Linux</div><div class='del'>-	   timing would care to play with these, I'd appreciate it. */</div><div class='del'>-</div><div class='del'>-	/* this bit masking stuff is crap.  I'd rather have separate</div><div class='del'>-	   registers with strobe triggers for each of these functions.  &lt;sigh&gt;</div><div class='del'>-	   Ya take what ya got. */</div><div class='del'>-</div><div class='del'>-	outb(ELMC_CTRL_RST | 0x3 | ELMC_CTRL_CA | ints, ioaddr + ELMC_CTRL);</div><div class='del'>-	DELAY_16();		/* &gt; 500 ns */</div><div class='del'>-	outb(ELMC_CTRL_RST | 0x3 | ints, ioaddr + ELMC_CTRL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*************************************************************************/</div><div class='del'>-/*</div><div class='del'>-   Reset the 82586 on the 3c523.  Also very board dependent.</div><div class='del'>- */</div><div class='del'>-static void elmc_do_reset586(int ioaddr, int ints)</div><div class='del'>-{</div><div class='del'>-	/* toggle the RST bit low then high */</div><div class='del'>-	outb(0x3 | ELMC_CTRL_LBK, ioaddr + ELMC_CTRL);</div><div class='del'>-	DELAY_16();		/* &gt; 500 ns */</div><div class='del'>-	outb(ELMC_CTRL_RST | ELMC_CTRL_LBK | 0x3, ioaddr + ELMC_CTRL);</div><div class='del'>-</div><div class='del'>-	elmc_do_attn586(ioaddr, ints);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**********************************************</div><div class='del'>- * close device</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int elmc_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	elmc_id_reset586();	/* the hard way to stop the receiver */</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**********************************************</div><div class='del'>- * open device</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int elmc_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	elmc_id_attn586();	/* disable interrupts */</div><div class='del'>-</div><div class='del'>-	ret = request_irq(dev-&gt;irq, elmc_interrupt, IRQF_SHARED,</div><div class='del'>-			  dev-&gt;name, dev);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_err("%s: couldn't get irq %d\n", dev-&gt;name, dev-&gt;irq);</div><div class='del'>-		elmc_id_reset586();</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-	alloc586(dev);</div><div class='del'>-	init586(dev);</div><div class='del'>-	startrecv586(dev);</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-	return 0;		/* most done by init */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**********************************************</div><div class='del'>- * Check to see if there's an 82586 out there.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init check586(struct net_device *dev, unsigned long where, unsigned size)</div><div class='del'>-{</div><div class='del'>-	struct priv *p = netdev_priv(dev);</div><div class='del'>-	char *iscp_addrs[2];</div><div class='del'>-	int i = 0;</div><div class='del'>-</div><div class='del'>-	p-&gt;base = (unsigned long) isa_bus_to_virt((unsigned long)where) + size - 0x01000000;</div><div class='del'>-	p-&gt;memtop = isa_bus_to_virt((unsigned long)where) + size;</div><div class='del'>-	p-&gt;scp = (struct scp_struct *)(p-&gt;base + SCP_DEFAULT_ADDRESS);</div><div class='del'>-	memset((char *) p-&gt;scp, 0, sizeof(struct scp_struct));</div><div class='del'>-	p-&gt;scp-&gt;sysbus = SYSBUSVAL;	/* 1 = 8Bit-Bus, 0 = 16 Bit */</div><div class='del'>-</div><div class='del'>-	iscp_addrs[0] = isa_bus_to_virt((unsigned long)where);</div><div class='del'>-	iscp_addrs[1] = (char *) p-&gt;scp - sizeof(struct iscp_struct);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 2; i++) {</div><div class='del'>-		p-&gt;iscp = (struct iscp_struct *) iscp_addrs[i];</div><div class='del'>-		memset((char *) p-&gt;iscp, 0, sizeof(struct iscp_struct));</div><div class='del'>-</div><div class='del'>-		p-&gt;scp-&gt;iscp = make24(p-&gt;iscp);</div><div class='del'>-		p-&gt;iscp-&gt;busy = 1;</div><div class='del'>-</div><div class='del'>-		elmc_id_reset586();</div><div class='del'>-</div><div class='del'>-		/* reset586 does an implicit CA */</div><div class='del'>-</div><div class='del'>-		/* apparently, you sometimes have to kick the 82586 twice... */</div><div class='del'>-		elmc_id_attn586();</div><div class='del'>-		DELAY(1);</div><div class='del'>-</div><div class='del'>-		if (p-&gt;iscp-&gt;busy) {	/* i82586 clears 'busy' after successful init */</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************************************</div><div class='del'>- * set iscp at the right place, called by elmc_probe and open586.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void alloc586(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct priv *p = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	elmc_id_reset586();</div><div class='del'>-	DELAY(2);</div><div class='del'>-</div><div class='del'>-	p-&gt;scp = (struct scp_struct *) (p-&gt;base + SCP_DEFAULT_ADDRESS);</div><div class='del'>-	p-&gt;scb = (struct scb_struct *) isa_bus_to_virt(dev-&gt;mem_start);</div><div class='del'>-	p-&gt;iscp = (struct iscp_struct *) ((char *) p-&gt;scp - sizeof(struct iscp_struct));</div><div class='del'>-</div><div class='del'>-	memset((char *) p-&gt;iscp, 0, sizeof(struct iscp_struct));</div><div class='del'>-	memset((char *) p-&gt;scp, 0, sizeof(struct scp_struct));</div><div class='del'>-</div><div class='del'>-	p-&gt;scp-&gt;iscp = make24(p-&gt;iscp);</div><div class='del'>-	p-&gt;scp-&gt;sysbus = SYSBUSVAL;</div><div class='del'>-	p-&gt;iscp-&gt;scb_offset = make16(p-&gt;scb);</div><div class='del'>-</div><div class='del'>-	p-&gt;iscp-&gt;busy = 1;</div><div class='del'>-	elmc_id_reset586();</div><div class='del'>-	elmc_id_attn586();</div><div class='del'>-</div><div class='del'>-	DELAY(2);</div><div class='del'>-</div><div class='del'>-	if (p-&gt;iscp-&gt;busy)</div><div class='del'>-		pr_err("%s: Init-Problems (alloc).\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	memset((char *) p-&gt;scb, 0, sizeof(struct scb_struct));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************/</div><div class='del'>-</div><div class='del'>-static int elmc_getinfo(char *buf, int slot, void *d)</div><div class='del'>-{</div><div class='del'>-	int len = 0;</div><div class='del'>-	struct net_device *dev = d;</div><div class='del'>-</div><div class='del'>-	if (dev == NULL)</div><div class='del'>-		return len;</div><div class='del'>-</div><div class='del'>-	len += sprintf(buf + len, "Revision: 0x%x\n",</div><div class='del'>-		       inb(dev-&gt;base_addr + ELMC_REVISION) &amp; 0xf);</div><div class='del'>-	len += sprintf(buf + len, "IRQ: %d\n", dev-&gt;irq);</div><div class='del'>-	len += sprintf(buf + len, "IO Address: %#lx-%#lx\n", dev-&gt;base_addr,</div><div class='del'>-		       dev-&gt;base_addr + ELMC_IO_EXTENT);</div><div class='del'>-	len += sprintf(buf + len, "Memory: %#lx-%#lx\n", dev-&gt;mem_start,</div><div class='del'>-		       dev-&gt;mem_end - 1);</div><div class='del'>-	len += sprintf(buf + len, "Transceiver: %s\n", dev-&gt;if_port ?</div><div class='del'>-		       "External" : "Internal");</div><div class='del'>-	len += sprintf(buf + len, "Device: %s\n", dev-&gt;name);</div><div class='del'>-	len += sprintf(buf + len, "Hardware Address: %pM\n",</div><div class='del'>-		       dev-&gt;dev_addr);</div><div class='del'>-</div><div class='del'>-	return len;</div><div class='del'>-}				/* elmc_getinfo() */</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops netdev_ops = {</div><div class='del'>-	.ndo_open 		= elmc_open,</div><div class='del'>-	.ndo_stop		= elmc_close,</div><div class='del'>-	.ndo_get_stats		= elmc_get_stats,</div><div class='del'>-	.ndo_start_xmit		= elmc_send_packet,</div><div class='del'>-	.ndo_tx_timeout		= elmc_timeout,</div><div class='del'>-#ifdef ELMC_MULTICAST</div><div class='del'>-	.ndo_set_rx_mode	= set_multicast_list,</div><div class='del'>-#endif</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='del'>-	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='del'>-	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*****************************************************************/</div><div class='del'>-</div><div class='del'>-static int __init do_elmc_probe(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	static int slot;</div><div class='del'>-	int base_addr = dev-&gt;base_addr;</div><div class='del'>-	int irq = dev-&gt;irq;</div><div class='del'>-	u_char status = 0;</div><div class='del'>-	u_char revision = 0;</div><div class='del'>-	int i = 0;</div><div class='del'>-	unsigned int size = 0;</div><div class='del'>-	int retval;</div><div class='del'>-	struct priv *pr = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (MCA_bus == 0) {</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-	/* search through the slots for the 3c523. */</div><div class='del'>-	slot = mca_find_adapter(ELMC_MCA_ID, 0);</div><div class='del'>-	while (slot != -1) {</div><div class='del'>-		status = mca_read_stored_pos(slot, 2);</div><div class='del'>-</div><div class='del'>-		dev-&gt;irq=irq_table[(status &amp; ELMC_STATUS_IRQ_SELECT) &gt;&gt; 6];</div><div class='del'>-		dev-&gt;base_addr=csr_table[(status &amp; ELMC_STATUS_CSR_SELECT) &gt;&gt; 1];</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		   If we're trying to match a specified irq or IO address,</div><div class='del'>-		   we'll reject a match unless it's what we're looking for.</div><div class='del'>-		   Also reject it if the card is already in use.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		if ((irq &amp;&amp; irq != dev-&gt;irq) ||</div><div class='del'>-		    (base_addr &amp;&amp; base_addr != dev-&gt;base_addr)) {</div><div class='del'>-			slot = mca_find_adapter(ELMC_MCA_ID, slot + 1);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		if (!request_region(dev-&gt;base_addr, ELMC_IO_EXTENT, DRV_NAME)) {</div><div class='del'>-			slot = mca_find_adapter(ELMC_MCA_ID, slot + 1);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* found what we're looking for... */</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* we didn't find any 3c523 in the slots we checked for */</div><div class='del'>-	if (slot == MCA_NOTFOUND)</div><div class='del'>-		return (base_addr || irq) ? -ENXIO : -ENODEV;</div><div class='del'>-</div><div class='del'>-	mca_set_adapter_name(slot, "3Com 3c523 Etherlink/MC");</div><div class='del'>-	mca_set_adapter_procfn(slot, (MCA_ProcFn) elmc_getinfo, dev);</div><div class='del'>-</div><div class='del'>-	/* if we get this far, adapter has been found - carry on */</div><div class='del'>-	pr_info("%s: 3c523 adapter found in slot %d\n", dev-&gt;name, slot + 1);</div><div class='del'>-</div><div class='del'>-	/* Now we extract configuration info from the card.</div><div class='del'>-	   The 3c523 provides information in two of the POS registers, but</div><div class='del'>-	   the second one is only needed if we want to tell the card what IRQ</div><div class='del'>-	   to use.  I suspect that whoever sets the thing up initially would</div><div class='del'>-	   prefer we don't screw with those things.</div><div class='del'>-</div><div class='del'>-	   Note that we read the status info when we found the card...</div><div class='del'>-</div><div class='del'>-	   See 3c523.h for more details.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/* revision is stored in the first 4 bits of the revision register */</div><div class='del'>-	revision = inb(dev-&gt;base_addr + ELMC_REVISION) &amp; 0xf;</div><div class='del'>-</div><div class='del'>-	/* according to docs, we read the interrupt and write it back to</div><div class='del'>-	   the IRQ select register, since the POST might not configure the IRQ</div><div class='del'>-	   properly. */</div><div class='del'>-	switch (dev-&gt;irq) {</div><div class='del'>-	case 3:</div><div class='del'>-		mca_write_pos(slot, 3, 0x04);</div><div class='del'>-		break;</div><div class='del'>-	case 7:</div><div class='del'>-		mca_write_pos(slot, 3, 0x02);</div><div class='del'>-		break;</div><div class='del'>-	case 9:</div><div class='del'>-		mca_write_pos(slot, 3, 0x08);</div><div class='del'>-		break;</div><div class='del'>-	case 12:</div><div class='del'>-		mca_write_pos(slot, 3, 0x01);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pr-&gt;slot = slot;</div><div class='del'>-</div><div class='del'>-	pr_info("%s: 3Com 3c523 Rev 0x%x at %#lx\n", dev-&gt;name, (int) revision,</div><div class='del'>-	       dev-&gt;base_addr);</div><div class='del'>-</div><div class='del'>-	/* Determine if we're using the on-board transceiver (i.e. coax) or</div><div class='del'>-	   an external one.  The information is pretty much useless, but I</div><div class='del'>-	   guess it's worth brownie points. */</div><div class='del'>-	dev-&gt;if_port = (status &amp; ELMC_STATUS_DISABLE_THIN);</div><div class='del'>-</div><div class='del'>-	/* The 3c523 has a 24K chunk of memory.  The first 16K is the</div><div class='del'>-	   shared memory, while the last 8K is for the EtherStart BIOS ROM.</div><div class='del'>-	   Which we don't care much about here.  We'll just tell Linux that</div><div class='del'>-	   we're using 16K.  MCA won't permit address space conflicts caused</div><div class='del'>-	   by not mapping the other 8K. */</div><div class='del'>-	dev-&gt;mem_start = shm_table[(status &amp; ELMC_STATUS_MEMORY_SELECT) &gt;&gt; 3];</div><div class='del'>-</div><div class='del'>-	/* We're using MCA, so it's a given that the information about memory</div><div class='del'>-	   size is correct.  The Crynwr drivers do something like this. */</div><div class='del'>-</div><div class='del'>-	elmc_id_reset586();	/* seems like a good idea before checking it... */</div><div class='del'>-</div><div class='del'>-	size = 0x4000;		/* check for 16K mem */</div><div class='del'>-	if (!check586(dev, dev-&gt;mem_start, size)) {</div><div class='del'>-		pr_err("%s: memprobe, Can't find memory at 0x%lx!\n", dev-&gt;name,</div><div class='del'>-		       dev-&gt;mem_start);</div><div class='del'>-		retval = -ENODEV;</div><div class='del'>-		goto err_out;</div><div class='del'>-	}</div><div class='del'>-	dev-&gt;mem_end = dev-&gt;mem_start + size;	/* set mem_end showed by 'ifconfig' */</div><div class='del'>-</div><div class='del'>-	pr-&gt;memtop = isa_bus_to_virt(dev-&gt;mem_start) + size;</div><div class='del'>-	pr-&gt;base = (unsigned long) isa_bus_to_virt(dev-&gt;mem_start) + size - 0x01000000;</div><div class='del'>-	alloc586(dev);</div><div class='del'>-</div><div class='del'>-	elmc_id_reset586();	/* make sure it doesn't generate spurious ints */</div><div class='del'>-</div><div class='del'>-	/* set number of receive-buffs according to memsize */</div><div class='del'>-	pr-&gt;num_recv_buffs = NUM_RECV_BUFFS_16;</div><div class='del'>-</div><div class='del'>-	/* dump all the assorted information */</div><div class='del'>-	pr_info("%s: IRQ %d, %sternal xcvr, memory %#lx-%#lx.\n", dev-&gt;name,</div><div class='del'>-	       dev-&gt;irq, dev-&gt;if_port ? "ex" : "in",</div><div class='del'>-	       dev-&gt;mem_start, dev-&gt;mem_end - 1);</div><div class='del'>-</div><div class='del'>-	/* The hardware address for the 3c523 is stored in the first six</div><div class='del'>-	   bytes of the IO address. */</div><div class='del'>-	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = inb(dev-&gt;base_addr + i);</div><div class='del'>-</div><div class='del'>-	pr_info("%s: hardware address %pM\n",</div><div class='del'>-	       dev-&gt;name, dev-&gt;dev_addr);</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;netdev_ops;</div><div class='del'>-	dev-&gt;watchdog_timeo = HZ;</div><div class='del'>-	dev-&gt;ethtool_ops = &amp;netdev_ethtool_ops;</div><div class='del'>-</div><div class='del'>-	/* note that we haven't actually requested the IRQ from the kernel.</div><div class='del'>-	   That gets done in elmc_open().  I'm not sure that's such a good idea,</div><div class='del'>-	   but it works, so I'll go with it. */</div><div class='del'>-</div><div class='del'>-#ifndef ELMC_MULTICAST</div><div class='del'>-        dev-&gt;flags&amp;=~IFF_MULTICAST;     /* Multicast doesn't work */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	retval = register_netdev(dev);</div><div class='del'>-	if (retval)</div><div class='del'>-		goto err_out;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-err_out:</div><div class='del'>-	mca_set_adapter_procfn(slot, NULL, NULL);</div><div class='del'>-	release_region(dev-&gt;base_addr, ELMC_IO_EXTENT);</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='del'>-static void cleanup_card(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	mca_set_adapter_procfn(((struct priv *)netdev_priv(dev))-&gt;slot,</div><div class='del'>-				NULL, NULL);</div><div class='del'>-	release_region(dev-&gt;base_addr, ELMC_IO_EXTENT);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-struct net_device * __init elmc_probe(int unit)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = alloc_etherdev(sizeof(struct priv));</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (!dev)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	sprintf(dev-&gt;name, "eth%d", unit);</div><div class='del'>-	netdev_boot_setup_check(dev);</div><div class='del'>-</div><div class='del'>-	err = do_elmc_probe(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-	return dev;</div><div class='del'>-out:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	return ERR_PTR(err);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/**********************************************</div><div class='del'>- * init the chip (elmc-interrupt should be disabled?!)</div><div class='del'>- * needs a correct 'allocated' memory</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int init586(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	void *ptr;</div><div class='del'>-	unsigned long s;</div><div class='del'>-	int i, result = 0;</div><div class='del'>-	struct priv *p = netdev_priv(dev);</div><div class='del'>-	volatile struct configure_cmd_struct *cfg_cmd;</div><div class='del'>-	volatile struct iasetup_cmd_struct *ias_cmd;</div><div class='del'>-	volatile struct tdr_cmd_struct *tdr_cmd;</div><div class='del'>-	volatile struct mcsetup_cmd_struct *mc_cmd;</div><div class='del'>-	struct netdev_hw_addr *ha;</div><div class='del'>-	int num_addrs = netdev_mc_count(dev);</div><div class='del'>-</div><div class='del'>-	ptr = (void *) ((char *) p-&gt;scb + sizeof(struct scb_struct));</div><div class='del'>-</div><div class='del'>-	cfg_cmd = (struct configure_cmd_struct *) ptr;	/* configure-command */</div><div class='del'>-	cfg_cmd-&gt;cmd_status = 0;</div><div class='del'>-	cfg_cmd-&gt;cmd_cmd = CMD_CONFIGURE | CMD_LAST;</div><div class='del'>-	cfg_cmd-&gt;cmd_link = 0xffff;</div><div class='del'>-</div><div class='del'>-	cfg_cmd-&gt;byte_cnt = 0x0a;	/* number of cfg bytes */</div><div class='del'>-	cfg_cmd-&gt;fifo = 0x08;	/* fifo-limit (8=tx:32/rx:64) */</div><div class='del'>-	cfg_cmd-&gt;sav_bf = 0x40;	/* hold or discard bad recv frames (bit 7) */</div><div class='del'>-	cfg_cmd-&gt;adr_len = 0x2e;	/* addr_len |!src_insert |pre-len |loopback */</div><div class='del'>-	cfg_cmd-&gt;priority = 0x00;</div><div class='del'>-	cfg_cmd-&gt;ifs = 0x60;</div><div class='del'>-	cfg_cmd-&gt;time_low = 0x00;</div><div class='del'>-	cfg_cmd-&gt;time_high = 0xf2;</div><div class='del'>-	cfg_cmd-&gt;promisc = 0;</div><div class='del'>-	if (dev-&gt;flags &amp; (IFF_ALLMULTI | IFF_PROMISC))</div><div class='del'>-		cfg_cmd-&gt;promisc = 1;</div><div class='del'>-	cfg_cmd-&gt;carr_coll = 0x00;</div><div class='del'>-</div><div class='del'>-	p-&gt;scb-&gt;cbl_offset = make16(cfg_cmd);</div><div class='del'>-</div><div class='del'>-	p-&gt;scb-&gt;cmd = CUC_START;	/* cmd.-unit start */</div><div class='del'>-	elmc_id_attn586();</div><div class='del'>-</div><div class='del'>-	s = jiffies;		/* warning: only active with interrupts on !! */</div><div class='del'>-	while (!(cfg_cmd-&gt;cmd_status &amp; STAT_COMPL)) {</div><div class='del'>-		if (time_after(jiffies, s + 30*HZ/100))</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((cfg_cmd-&gt;cmd_status &amp; (STAT_OK | STAT_COMPL)) != (STAT_COMPL | STAT_OK)) {</div><div class='del'>-		pr_warning("%s (elmc): configure command failed: %x\n", dev-&gt;name, cfg_cmd-&gt;cmd_status);</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 * individual address setup</div><div class='del'>-	 */</div><div class='del'>-	ias_cmd = (struct iasetup_cmd_struct *) ptr;</div><div class='del'>-</div><div class='del'>-	ias_cmd-&gt;cmd_status = 0;</div><div class='del'>-	ias_cmd-&gt;cmd_cmd = CMD_IASETUP | CMD_LAST;</div><div class='del'>-	ias_cmd-&gt;cmd_link = 0xffff;</div><div class='del'>-</div><div class='del'>-	memcpy((char *) &amp;ias_cmd-&gt;iaddr, (char *) dev-&gt;dev_addr, ETH_ALEN);</div><div class='del'>-</div><div class='del'>-	p-&gt;scb-&gt;cbl_offset = make16(ias_cmd);</div><div class='del'>-</div><div class='del'>-	p-&gt;scb-&gt;cmd = CUC_START;	/* cmd.-unit start */</div><div class='del'>-	elmc_id_attn586();</div><div class='del'>-</div><div class='del'>-	s = jiffies;</div><div class='del'>-	while (!(ias_cmd-&gt;cmd_status &amp; STAT_COMPL)) {</div><div class='del'>-		if (time_after(jiffies, s + 30*HZ/100))</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((ias_cmd-&gt;cmd_status &amp; (STAT_OK | STAT_COMPL)) != (STAT_OK | STAT_COMPL)) {</div><div class='del'>-		pr_warning("%s (elmc): individual address setup command failed: %04x\n",</div><div class='del'>-			dev-&gt;name, ias_cmd-&gt;cmd_status);</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 * TDR, wire check .. e.g. no resistor e.t.c</div><div class='del'>-	 */</div><div class='del'>-	tdr_cmd = (struct tdr_cmd_struct *) ptr;</div><div class='del'>-</div><div class='del'>-	tdr_cmd-&gt;cmd_status = 0;</div><div class='del'>-	tdr_cmd-&gt;cmd_cmd = CMD_TDR | CMD_LAST;</div><div class='del'>-	tdr_cmd-&gt;cmd_link = 0xffff;</div><div class='del'>-	tdr_cmd-&gt;status = 0;</div><div class='del'>-</div><div class='del'>-	p-&gt;scb-&gt;cbl_offset = make16(tdr_cmd);</div><div class='del'>-</div><div class='del'>-	p-&gt;scb-&gt;cmd = CUC_START;	/* cmd.-unit start */</div><div class='del'>-	elmc_attn586();</div><div class='del'>-</div><div class='del'>-	s = jiffies;</div><div class='del'>-	while (!(tdr_cmd-&gt;cmd_status &amp; STAT_COMPL)) {</div><div class='del'>-		if (time_after(jiffies, s + 30*HZ/100)) {</div><div class='del'>-			pr_warning("%s: %d Problems while running the TDR.\n", dev-&gt;name, __LINE__);</div><div class='del'>-			result = 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!result) {</div><div class='del'>-		DELAY(2);	/* wait for result */</div><div class='del'>-		result = tdr_cmd-&gt;status;</div><div class='del'>-</div><div class='del'>-		p-&gt;scb-&gt;cmd = p-&gt;scb-&gt;status &amp; STAT_MASK;</div><div class='del'>-		elmc_id_attn586();	/* ack the interrupts */</div><div class='del'>-</div><div class='del'>-		if (result &amp; TDR_LNK_OK) {</div><div class='del'>-			/* empty */</div><div class='del'>-		} else if (result &amp; TDR_XCVR_PRB) {</div><div class='del'>-			pr_warning("%s: TDR: Transceiver problem!\n", dev-&gt;name);</div><div class='del'>-		} else if (result &amp; TDR_ET_OPN) {</div><div class='del'>-			pr_warning("%s: TDR: No correct termination %d clocks away.\n", dev-&gt;name, result &amp; TDR_TIMEMASK);</div><div class='del'>-		} else if (result &amp; TDR_ET_SRT) {</div><div class='del'>-			if (result &amp; TDR_TIMEMASK)	/* time == 0 -&gt; strange :-) */</div><div class='del'>-				pr_warning("%s: TDR: Detected a short circuit %d clocks away.\n", dev-&gt;name, result &amp; TDR_TIMEMASK);</div><div class='del'>-		} else {</div><div class='del'>-			pr_warning("%s: TDR: Unknown status %04x\n", dev-&gt;name, result);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 * ack interrupts</div><div class='del'>-	 */</div><div class='del'>-	p-&gt;scb-&gt;cmd = p-&gt;scb-&gt;status &amp; STAT_MASK;</div><div class='del'>-	elmc_id_attn586();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * alloc nop/xmit-cmds</div><div class='del'>-	 */</div><div class='del'>-#if (NUM_XMIT_BUFFS == 1)</div><div class='del'>-	for (i = 0; i &lt; 2; i++) {</div><div class='del'>-		p-&gt;nop_cmds[i] = (struct nop_cmd_struct *) ptr;</div><div class='del'>-		p-&gt;nop_cmds[i]-&gt;cmd_cmd = CMD_NOP;</div><div class='del'>-		p-&gt;nop_cmds[i]-&gt;cmd_status = 0;</div><div class='del'>-		p-&gt;nop_cmds[i]-&gt;cmd_link = make16((p-&gt;nop_cmds[i]));</div><div class='del'>-		ptr = (char *) ptr + sizeof(struct nop_cmd_struct);</div><div class='del'>-	}</div><div class='del'>-	p-&gt;xmit_cmds[0] = (struct transmit_cmd_struct *) ptr;	/* transmit cmd/buff 0 */</div><div class='del'>-	ptr = (char *) ptr + sizeof(struct transmit_cmd_struct);</div><div class='del'>-#else</div><div class='del'>-	for (i = 0; i &lt; NUM_XMIT_BUFFS; i++) {</div><div class='del'>-		p-&gt;nop_cmds[i] = (struct nop_cmd_struct *) ptr;</div><div class='del'>-		p-&gt;nop_cmds[i]-&gt;cmd_cmd = CMD_NOP;</div><div class='del'>-		p-&gt;nop_cmds[i]-&gt;cmd_status = 0;</div><div class='del'>-		p-&gt;nop_cmds[i]-&gt;cmd_link = make16((p-&gt;nop_cmds[i]));</div><div class='del'>-		ptr = (char *) ptr + sizeof(struct nop_cmd_struct);</div><div class='del'>-		p-&gt;xmit_cmds[i] = (struct transmit_cmd_struct *) ptr;	/*transmit cmd/buff 0 */</div><div class='del'>-		ptr = (char *) ptr + sizeof(struct transmit_cmd_struct);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	ptr = alloc_rfa(dev, (void *) ptr);	/* init receive-frame-area */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Multicast setup</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if (num_addrs) {</div><div class='del'>-		/* I don't understand this: do we really need memory after the init? */</div><div class='del'>-		int len = ((char *) p-&gt;iscp - (char *) ptr - 8) / 6;</div><div class='del'>-		if (len &lt;= 0) {</div><div class='del'>-			pr_err("%s: Ooooops, no memory for MC-Setup!\n", dev-&gt;name);</div><div class='del'>-		} else {</div><div class='del'>-			if (len &lt; num_addrs) {</div><div class='del'>-				num_addrs = len;</div><div class='del'>-				pr_warning("%s: Sorry, can only apply %d MC-Address(es).\n",</div><div class='del'>-				       dev-&gt;name, num_addrs);</div><div class='del'>-			}</div><div class='del'>-			mc_cmd = (struct mcsetup_cmd_struct *) ptr;</div><div class='del'>-			mc_cmd-&gt;cmd_status = 0;</div><div class='del'>-			mc_cmd-&gt;cmd_cmd = CMD_MCSETUP | CMD_LAST;</div><div class='del'>-			mc_cmd-&gt;cmd_link = 0xffff;</div><div class='del'>-			mc_cmd-&gt;mc_cnt = num_addrs * 6;</div><div class='del'>-			i = 0;</div><div class='del'>-			netdev_for_each_mc_addr(ha, dev)</div><div class='del'>-				memcpy((char *) mc_cmd-&gt;mc_list[i++],</div><div class='del'>-				       ha-&gt;addr, 6);</div><div class='del'>-			p-&gt;scb-&gt;cbl_offset = make16(mc_cmd);</div><div class='del'>-			p-&gt;scb-&gt;cmd = CUC_START;</div><div class='del'>-			elmc_id_attn586();</div><div class='del'>-			s = jiffies;</div><div class='del'>-			while (!(mc_cmd-&gt;cmd_status &amp; STAT_COMPL)) {</div><div class='del'>-				if (time_after(jiffies, s + 30*HZ/100))</div><div class='del'>-					break;</div><div class='del'>-			}</div><div class='del'>-			if (!(mc_cmd-&gt;cmd_status &amp; STAT_COMPL)) {</div><div class='del'>-				pr_warning("%s: Can't apply multicast-address-list.\n", dev-&gt;name);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 * alloc xmit-buffs / init xmit_cmds</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; NUM_XMIT_BUFFS; i++) {</div><div class='del'>-		p-&gt;xmit_cbuffs[i] = (char *) ptr;	/* char-buffs */</div><div class='del'>-		ptr = (char *) ptr + XMIT_BUFF_SIZE;</div><div class='del'>-		p-&gt;xmit_buffs[i] = (struct tbd_struct *) ptr;	/* TBD */</div><div class='del'>-		ptr = (char *) ptr + sizeof(struct tbd_struct);</div><div class='del'>-		if ((void *) ptr &gt; (void *) p-&gt;iscp) {</div><div class='del'>-			pr_err("%s: not enough shared-mem for your configuration!\n", dev-&gt;name);</div><div class='del'>-			return 1;</div><div class='del'>-		}</div><div class='del'>-		memset((char *) (p-&gt;xmit_cmds[i]), 0, sizeof(struct transmit_cmd_struct));</div><div class='del'>-		memset((char *) (p-&gt;xmit_buffs[i]), 0, sizeof(struct tbd_struct));</div><div class='del'>-		p-&gt;xmit_cmds[i]-&gt;cmd_status = STAT_COMPL;</div><div class='del'>-		p-&gt;xmit_cmds[i]-&gt;cmd_cmd = CMD_XMIT | CMD_INT;</div><div class='del'>-		p-&gt;xmit_cmds[i]-&gt;tbd_offset = make16((p-&gt;xmit_buffs[i]));</div><div class='del'>-		p-&gt;xmit_buffs[i]-&gt;next = 0xffff;</div><div class='del'>-		p-&gt;xmit_buffs[i]-&gt;buffer = make24((p-&gt;xmit_cbuffs[i]));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	p-&gt;xmit_count = 0;</div><div class='del'>-	p-&gt;xmit_last = 0;</div><div class='del'>-#ifndef NO_NOPCOMMANDS</div><div class='del'>-	p-&gt;nop_point = 0;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * 'start transmitter' (nop-loop)</div><div class='del'>-	 */</div><div class='del'>-#ifndef NO_NOPCOMMANDS</div><div class='del'>-	p-&gt;scb-&gt;cbl_offset = make16(p-&gt;nop_cmds[0]);</div><div class='del'>-	p-&gt;scb-&gt;cmd = CUC_START;</div><div class='del'>-	elmc_id_attn586();</div><div class='del'>-	WAIT_4_SCB_CMD();</div><div class='del'>-#else</div><div class='del'>-	p-&gt;xmit_cmds[0]-&gt;cmd_link = 0xffff;</div><div class='del'>-	p-&gt;xmit_cmds[0]-&gt;cmd_cmd = CMD_XMIT | CMD_LAST | CMD_INT;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************************</div><div class='del'>- * This is a helper routine for elmc_rnr_int() and init586().</div><div class='del'>- * It sets up the Receive Frame Area (RFA).</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void *alloc_rfa(struct net_device *dev, void *ptr)</div><div class='del'>-{</div><div class='del'>-	volatile struct rfd_struct *rfd = (struct rfd_struct *) ptr;</div><div class='del'>-	volatile struct rbd_struct *rbd;</div><div class='del'>-	int i;</div><div class='del'>-	struct priv *p = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	memset((char *) rfd, 0, sizeof(struct rfd_struct) * p-&gt;num_recv_buffs);</div><div class='del'>-	p-&gt;rfd_first = rfd;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; p-&gt;num_recv_buffs; i++) {</div><div class='del'>-		rfd[i].next = make16(rfd + (i + 1) % p-&gt;num_recv_buffs);</div><div class='del'>-	}</div><div class='del'>-	rfd[p-&gt;num_recv_buffs - 1].last = RFD_SUSP;	/* RU suspend */</div><div class='del'>-</div><div class='del'>-	ptr = (void *) (rfd + p-&gt;num_recv_buffs);</div><div class='del'>-</div><div class='del'>-	rbd = (struct rbd_struct *) ptr;</div><div class='del'>-	ptr = (void *) (rbd + p-&gt;num_recv_buffs);</div><div class='del'>-</div><div class='del'>-	/* clr descriptors */</div><div class='del'>-	memset((char *) rbd, 0, sizeof(struct rbd_struct) * p-&gt;num_recv_buffs);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; p-&gt;num_recv_buffs; i++) {</div><div class='del'>-		rbd[i].next = make16((rbd + (i + 1) % p-&gt;num_recv_buffs));</div><div class='del'>-		rbd[i].size = RECV_BUFF_SIZE;</div><div class='del'>-		rbd[i].buffer = make24(ptr);</div><div class='del'>-		ptr = (char *) ptr + RECV_BUFF_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	p-&gt;rfd_top = p-&gt;rfd_first;</div><div class='del'>-	p-&gt;rfd_last = p-&gt;rfd_first + p-&gt;num_recv_buffs - 1;</div><div class='del'>-</div><div class='del'>-	p-&gt;scb-&gt;rfa_offset = make16(p-&gt;rfd_first);</div><div class='del'>-	p-&gt;rfd_first-&gt;rbd_offset = make16(rbd);</div><div class='del'>-</div><div class='del'>-	return ptr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**************************************************</div><div class='del'>- * Interrupt Handler ...</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static irqreturn_t</div><div class='del'>-elmc_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = dev_id;</div><div class='del'>-	unsigned short stat;</div><div class='del'>-	struct priv *p;</div><div class='del'>-</div><div class='del'>-	if (!netif_running(dev)) {</div><div class='del'>-		/* The 3c523 has this habit of generating interrupts during the</div><div class='del'>-		   reset.  I'm not sure if the ni52 has this same problem, but it's</div><div class='del'>-		   really annoying if we haven't finished initializing it.  I was</div><div class='del'>-		   hoping all the elmc_id_* commands would disable this, but I</div><div class='del'>-		   might have missed a few. */</div><div class='del'>-</div><div class='del'>-		elmc_id_attn586();	/* ack inter. and disable any more */</div><div class='del'>-		return IRQ_HANDLED;</div><div class='del'>-	} else if (!(ELMC_CTRL_INT &amp; inb(dev-&gt;base_addr + ELMC_CTRL))) {</div><div class='del'>-		/* wasn't this device */</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	}</div><div class='del'>-	/* reading ELMC_CTRL also clears the INT bit. */</div><div class='del'>-</div><div class='del'>-	p = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	while ((stat = p-&gt;scb-&gt;status &amp; STAT_MASK))</div><div class='del'>-	{</div><div class='del'>-		p-&gt;scb-&gt;cmd = stat;</div><div class='del'>-		elmc_attn586();	/* ack inter. */</div><div class='del'>-</div><div class='del'>-		if (stat &amp; STAT_CX) {</div><div class='del'>-			/* command with I-bit set complete */</div><div class='del'>-			elmc_xmt_int(dev);</div><div class='del'>-		}</div><div class='del'>-		if (stat &amp; STAT_FR) {</div><div class='del'>-			/* received a frame */</div><div class='del'>-			elmc_rcv_int(dev);</div><div class='del'>-		}</div><div class='del'>-#ifndef NO_NOPCOMMANDS</div><div class='del'>-		if (stat &amp; STAT_CNA) {</div><div class='del'>-			/* CU went 'not ready' */</div><div class='del'>-			if (netif_running(dev)) {</div><div class='del'>-				pr_warning("%s: oops! CU has left active state. stat: %04x/%04x.\n",</div><div class='del'>-					dev-&gt;name, (int) stat, (int) p-&gt;scb-&gt;status);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		if (stat &amp; STAT_RNR) {</div><div class='del'>-			/* RU went 'not ready' */</div><div class='del'>-</div><div class='del'>-			if (p-&gt;scb-&gt;status &amp; RU_SUSPEND) {</div><div class='del'>-				/* special case: RU_SUSPEND */</div><div class='del'>-</div><div class='del'>-				WAIT_4_SCB_CMD();</div><div class='del'>-				p-&gt;scb-&gt;cmd = RUC_RESUME;</div><div class='del'>-				elmc_attn586();</div><div class='del'>-			} else {</div><div class='del'>-				pr_warning("%s: Receiver-Unit went 'NOT READY': %04x/%04x.\n",</div><div class='del'>-					dev-&gt;name, (int) stat, (int) p-&gt;scb-&gt;status);</div><div class='del'>-				elmc_rnr_int(dev);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		WAIT_4_SCB_CMD();	/* wait for ack. (elmc_xmt_int can be faster than ack!!) */</div><div class='del'>-		if (p-&gt;scb-&gt;cmd) {	/* timed out? */</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*******************************************************</div><div class='del'>- * receive-interrupt</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void elmc_rcv_int(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-	unsigned short totlen;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct rbd_struct *rbd;</div><div class='del'>-	struct priv *p = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	for (; (status = p-&gt;rfd_top-&gt;status) &amp; STAT_COMPL;) {</div><div class='del'>-		rbd = (struct rbd_struct *) make32(p-&gt;rfd_top-&gt;rbd_offset);</div><div class='del'>-</div><div class='del'>-		if (status &amp; STAT_OK) {		/* frame received without error? */</div><div class='del'>-			if ((totlen = rbd-&gt;status) &amp; RBD_LAST) {	/* the first and the last buffer? */</div><div class='del'>-				totlen &amp;= RBD_MASK;	/* length of this frame */</div><div class='del'>-				rbd-&gt;status = 0;</div><div class='del'>-				skb = netdev_alloc_skb(dev, totlen + 2);</div><div class='del'>-				if (skb != NULL) {</div><div class='del'>-					skb_reserve(skb, 2);	/* 16 byte alignment */</div><div class='del'>-					skb_put(skb,totlen);</div><div class='del'>-					skb_copy_to_linear_data(skb, (char *) p-&gt;base+(unsigned long) rbd-&gt;buffer,totlen);</div><div class='del'>-					skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='del'>-					netif_rx(skb);</div><div class='del'>-					dev-&gt;stats.rx_packets++;</div><div class='del'>-					dev-&gt;stats.rx_bytes += totlen;</div><div class='del'>-				} else {</div><div class='del'>-					dev-&gt;stats.rx_dropped++;</div><div class='del'>-				}</div><div class='del'>-			} else {</div><div class='del'>-				pr_warning("%s: received oversized frame.\n", dev-&gt;name);</div><div class='del'>-				dev-&gt;stats.rx_dropped++;</div><div class='del'>-			}</div><div class='del'>-		} else {	/* frame !(ok), only with 'save-bad-frames' */</div><div class='del'>-			pr_warning("%s: oops! rfd-error-status: %04x\n", dev-&gt;name, status);</div><div class='del'>-			dev-&gt;stats.rx_errors++;</div><div class='del'>-		}</div><div class='del'>-		p-&gt;rfd_top-&gt;status = 0;</div><div class='del'>-		p-&gt;rfd_top-&gt;last = RFD_SUSP;</div><div class='del'>-		p-&gt;rfd_last-&gt;last = 0;	/* delete RU_SUSP  */</div><div class='del'>-		p-&gt;rfd_last = p-&gt;rfd_top;</div><div class='del'>-		p-&gt;rfd_top = (struct rfd_struct *) make32(p-&gt;rfd_top-&gt;next);	/* step to next RFD */</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**********************************************************</div><div class='del'>- * handle 'Receiver went not ready'.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void elmc_rnr_int(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct priv *p = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.rx_errors++;</div><div class='del'>-</div><div class='del'>-	WAIT_4_SCB_CMD();	/* wait for the last cmd */</div><div class='del'>-	p-&gt;scb-&gt;cmd = RUC_ABORT;	/* usually the RU is in the 'no resource'-state .. abort it now. */</div><div class='del'>-	elmc_attn586();</div><div class='del'>-	WAIT_4_SCB_CMD();	/* wait for accept cmd. */</div><div class='del'>-</div><div class='del'>-	alloc_rfa(dev, (char *) p-&gt;rfd_first);</div><div class='del'>-	startrecv586(dev);	/* restart RU */</div><div class='del'>-</div><div class='del'>-	pr_warning("%s: Receive-Unit restarted. Status: %04x\n", dev-&gt;name, p-&gt;scb-&gt;status);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**********************************************************</div><div class='del'>- * handle xmit - interrupt</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void elmc_xmt_int(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-	struct priv *p = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	status = p-&gt;xmit_cmds[p-&gt;xmit_last]-&gt;cmd_status;</div><div class='del'>-	if (!(status &amp; STAT_COMPL)) {</div><div class='del'>-		pr_warning("%s: strange .. xmit-int without a 'COMPLETE'\n", dev-&gt;name);</div><div class='del'>-	}</div><div class='del'>-	if (status &amp; STAT_OK) {</div><div class='del'>-		dev-&gt;stats.tx_packets++;</div><div class='del'>-		dev-&gt;stats.collisions += (status &amp; TCMD_MAXCOLLMASK);</div><div class='del'>-	} else {</div><div class='del'>-		dev-&gt;stats.tx_errors++;</div><div class='del'>-		if (status &amp; TCMD_LATECOLL) {</div><div class='del'>-			pr_warning("%s: late collision detected.\n", dev-&gt;name);</div><div class='del'>-			dev-&gt;stats.collisions++;</div><div class='del'>-		} else if (status &amp; TCMD_NOCARRIER) {</div><div class='del'>-			dev-&gt;stats.tx_carrier_errors++;</div><div class='del'>-			pr_warning("%s: no carrier detected.\n", dev-&gt;name);</div><div class='del'>-		} else if (status &amp; TCMD_LOSTCTS) {</div><div class='del'>-			pr_warning("%s: loss of CTS detected.\n", dev-&gt;name);</div><div class='del'>-		} else if (status &amp; TCMD_UNDERRUN) {</div><div class='del'>-			dev-&gt;stats.tx_fifo_errors++;</div><div class='del'>-			pr_warning("%s: DMA underrun detected.\n", dev-&gt;name);</div><div class='del'>-		} else if (status &amp; TCMD_MAXCOLL) {</div><div class='del'>-			pr_warning("%s: Max. collisions exceeded.\n", dev-&gt;name);</div><div class='del'>-			dev-&gt;stats.collisions += 16;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#if (NUM_XMIT_BUFFS != 1)</div><div class='del'>-	if ((++p-&gt;xmit_last) == NUM_XMIT_BUFFS) {</div><div class='del'>-		p-&gt;xmit_last = 0;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/***********************************************************</div><div class='del'>- * (re)start the receiver</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void startrecv586(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct priv *p = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	p-&gt;scb-&gt;rfa_offset = make16(p-&gt;rfd_first);</div><div class='del'>-	p-&gt;scb-&gt;cmd = RUC_START;</div><div class='del'>-	elmc_attn586();		/* start cmd. */</div><div class='del'>-	WAIT_4_SCB_CMD();	/* wait for accept cmd. (no timeout!!) */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************************</div><div class='del'>- * timeout</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void elmc_timeout(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct priv *p = netdev_priv(dev);</div><div class='del'>-	/* COMMAND-UNIT active? */</div><div class='del'>-	if (p-&gt;scb-&gt;status &amp; CU_ACTIVE) {</div><div class='del'>-		pr_debug("%s: strange ... timeout with CU active?!?\n", dev-&gt;name);</div><div class='del'>-		pr_debug("%s: X0: %04x N0: %04x N1: %04x %d\n", dev-&gt;name,</div><div class='del'>-			(int)p-&gt;xmit_cmds[0]-&gt;cmd_status,</div><div class='del'>-			(int)p-&gt;nop_cmds[0]-&gt;cmd_status,</div><div class='del'>-			(int)p-&gt;nop_cmds[1]-&gt;cmd_status, (int)p-&gt;nop_point);</div><div class='del'>-		p-&gt;scb-&gt;cmd = CUC_ABORT;</div><div class='del'>-		elmc_attn586();</div><div class='del'>-		WAIT_4_SCB_CMD();</div><div class='del'>-		p-&gt;scb-&gt;cbl_offset = make16(p-&gt;nop_cmds[p-&gt;nop_point]);</div><div class='del'>-		p-&gt;scb-&gt;cmd = CUC_START;</div><div class='del'>-		elmc_attn586();</div><div class='del'>-		WAIT_4_SCB_CMD();</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-	} else {</div><div class='del'>-		pr_debug("%s: xmitter timed out, try to restart! stat: %04x\n",</div><div class='del'>-			dev-&gt;name, p-&gt;scb-&gt;status);</div><div class='del'>-		pr_debug("%s: command-stats: %04x %04x\n", dev-&gt;name,</div><div class='del'>-			p-&gt;xmit_cmds[0]-&gt;cmd_status, p-&gt;xmit_cmds[1]-&gt;cmd_status);</div><div class='del'>-		elmc_close(dev);</div><div class='del'>-		elmc_open(dev);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************************</div><div class='del'>- * send frame</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static netdev_tx_t elmc_send_packet(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int len;</div><div class='del'>-	int i;</div><div class='del'>-#ifndef NO_NOPCOMMANDS</div><div class='del'>-	int next_nop;</div><div class='del'>-#endif</div><div class='del'>-	struct priv *p = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	len = (ETH_ZLEN &lt; skb-&gt;len) ? skb-&gt;len : ETH_ZLEN;</div><div class='del'>-</div><div class='del'>-	if (len != skb-&gt;len)</div><div class='del'>-		memset((char *) p-&gt;xmit_cbuffs[p-&gt;xmit_count], 0, ETH_ZLEN);</div><div class='del'>-	skb_copy_from_linear_data(skb, (char *) p-&gt;xmit_cbuffs[p-&gt;xmit_count], skb-&gt;len);</div><div class='del'>-</div><div class='del'>-#if (NUM_XMIT_BUFFS == 1)</div><div class='del'>-#ifdef NO_NOPCOMMANDS</div><div class='del'>-	p-&gt;xmit_buffs[0]-&gt;size = TBD_LAST | len;</div><div class='del'>-	for (i = 0; i &lt; 16; i++) {</div><div class='del'>-		p-&gt;scb-&gt;cbl_offset = make16(p-&gt;xmit_cmds[0]);</div><div class='del'>-		p-&gt;scb-&gt;cmd = CUC_START;</div><div class='del'>-		p-&gt;xmit_cmds[0]-&gt;cmd_status = 0;</div><div class='del'>-			elmc_attn586();</div><div class='del'>-		if (!i) {</div><div class='del'>-			dev_kfree_skb(skb);</div><div class='del'>-		}</div><div class='del'>-		WAIT_4_SCB_CMD();</div><div class='del'>-		if ((p-&gt;scb-&gt;status &amp; CU_ACTIVE)) {	/* test it, because CU sometimes doesn't start immediately */</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (p-&gt;xmit_cmds[0]-&gt;cmd_status) {</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (i == 15) {</div><div class='del'>-			pr_warning("%s: Can't start transmit-command.\n", dev-&gt;name);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-#else</div><div class='del'>-	next_nop = (p-&gt;nop_point + 1) &amp; 0x1;</div><div class='del'>-	p-&gt;xmit_buffs[0]-&gt;size = TBD_LAST | len;</div><div class='del'>-</div><div class='del'>-	p-&gt;xmit_cmds[0]-&gt;cmd_link = p-&gt;nop_cmds[next_nop]-&gt;cmd_link</div><div class='del'>-	    = make16((p-&gt;nop_cmds[next_nop]));</div><div class='del'>-	p-&gt;xmit_cmds[0]-&gt;cmd_status = p-&gt;nop_cmds[next_nop]-&gt;cmd_status = 0;</div><div class='del'>-</div><div class='del'>-	p-&gt;nop_cmds[p-&gt;nop_point]-&gt;cmd_link = make16((p-&gt;xmit_cmds[0]));</div><div class='del'>-	p-&gt;nop_point = next_nop;</div><div class='del'>-	dev_kfree_skb(skb);</div><div class='del'>-#endif</div><div class='del'>-#else</div><div class='del'>-	p-&gt;xmit_buffs[p-&gt;xmit_count]-&gt;size = TBD_LAST | len;</div><div class='del'>-	if ((next_nop = p-&gt;xmit_count + 1) == NUM_XMIT_BUFFS) {</div><div class='del'>-		next_nop = 0;</div><div class='del'>-	}</div><div class='del'>-	p-&gt;xmit_cmds[p-&gt;xmit_count]-&gt;cmd_status = 0;</div><div class='del'>-	p-&gt;xmit_cmds[p-&gt;xmit_count]-&gt;cmd_link = p-&gt;nop_cmds[next_nop]-&gt;cmd_link</div><div class='del'>-	    = make16((p-&gt;nop_cmds[next_nop]));</div><div class='del'>-	p-&gt;nop_cmds[next_nop]-&gt;cmd_status = 0;</div><div class='del'>-		p-&gt;nop_cmds[p-&gt;xmit_count]-&gt;cmd_link = make16((p-&gt;xmit_cmds[p-&gt;xmit_count]));</div><div class='del'>-	p-&gt;xmit_count = next_nop;</div><div class='del'>-	if (p-&gt;xmit_count != p-&gt;xmit_last)</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-	dev_kfree_skb(skb);</div><div class='del'>-#endif</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*******************************************</div><div class='del'>- * Someone wanna have the statistics</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static struct net_device_stats *elmc_get_stats(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct priv *p = netdev_priv(dev);</div><div class='del'>-	unsigned short crc, aln, rsc, ovrn;</div><div class='del'>-</div><div class='del'>-	crc = p-&gt;scb-&gt;crc_errs;	/* get error-statistic from the ni82586 */</div><div class='del'>-	p-&gt;scb-&gt;crc_errs -= crc;</div><div class='del'>-	aln = p-&gt;scb-&gt;aln_errs;</div><div class='del'>-	p-&gt;scb-&gt;aln_errs -= aln;</div><div class='del'>-	rsc = p-&gt;scb-&gt;rsc_errs;</div><div class='del'>-	p-&gt;scb-&gt;rsc_errs -= rsc;</div><div class='del'>-	ovrn = p-&gt;scb-&gt;ovrn_errs;</div><div class='del'>-	p-&gt;scb-&gt;ovrn_errs -= ovrn;</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.rx_crc_errors += crc;</div><div class='del'>-	dev-&gt;stats.rx_fifo_errors += ovrn;</div><div class='del'>-	dev-&gt;stats.rx_frame_errors += aln;</div><div class='del'>-	dev-&gt;stats.rx_dropped += rsc;</div><div class='del'>-</div><div class='del'>-	return &amp;dev-&gt;stats;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/********************************************************</div><div class='del'>- * Set MC list ..</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef ELMC_MULTICAST</div><div class='del'>-static void set_multicast_list(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	if (!dev-&gt;start) {</div><div class='del'>-		/* without a running interface, promiscuous doesn't work */</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	dev-&gt;start = 0;</div><div class='del'>-	alloc586(dev);</div><div class='del'>-	init586(dev);</div><div class='del'>-	startrecv586(dev);</div><div class='del'>-	dev-&gt;start = 1;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void netdev_get_drvinfo(struct net_device *dev,</div><div class='del'>-			       struct ethtool_drvinfo *info)</div><div class='del'>-{</div><div class='del'>-	strcpy(info-&gt;driver, DRV_NAME);</div><div class='del'>-	strcpy(info-&gt;version, DRV_VERSION);</div><div class='del'>-	sprintf(info-&gt;bus_info, "MCA 0x%lx", dev-&gt;base_addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct ethtool_ops netdev_ethtool_ops = {</div><div class='del'>-	.get_drvinfo		= netdev_get_drvinfo,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='del'>-</div><div class='del'>-/* Increase if needed ;) */</div><div class='del'>-#define MAX_3C523_CARDS 4</div><div class='del'>-</div><div class='del'>-static struct net_device *dev_elmc[MAX_3C523_CARDS];</div><div class='del'>-static int irq[MAX_3C523_CARDS];</div><div class='del'>-static int io[MAX_3C523_CARDS];</div><div class='del'>-module_param_array(irq, int, NULL, 0);</div><div class='del'>-module_param_array(io, int, NULL, 0);</div><div class='del'>-MODULE_PARM_DESC(io, "EtherLink/MC I/O base address(es)");</div><div class='del'>-MODULE_PARM_DESC(irq, "EtherLink/MC IRQ number(s)");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-int __init init_module(void)</div><div class='del'>-{</div><div class='del'>-	int this_dev,found = 0;</div><div class='del'>-</div><div class='del'>-	/* Loop until we either can't find any more cards, or we have MAX_3C523_CARDS */</div><div class='del'>-	for(this_dev=0; this_dev&lt;MAX_3C523_CARDS; this_dev++) {</div><div class='del'>-		struct net_device *dev = alloc_etherdev(sizeof(struct priv));</div><div class='del'>-		if (!dev)</div><div class='del'>-			break;</div><div class='del'>-		dev-&gt;irq=irq[this_dev];</div><div class='del'>-		dev-&gt;base_addr=io[this_dev];</div><div class='del'>-		if (do_elmc_probe(dev) == 0) {</div><div class='del'>-			dev_elmc[this_dev] = dev;</div><div class='del'>-			found++;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-		if (io[this_dev]==0)</div><div class='del'>-			break;</div><div class='del'>-		pr_warning("3c523.c: No 3c523 card found at io=%#x\n",io[this_dev]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(found==0) {</div><div class='del'>-		if (io[0]==0)</div><div class='del'>-			pr_notice("3c523.c: No 3c523 cards found\n");</div><div class='del'>-		return -ENXIO;</div><div class='del'>-	} else return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __exit cleanup_module(void)</div><div class='del'>-{</div><div class='del'>-	int this_dev;</div><div class='del'>-	for (this_dev=0; this_dev&lt;MAX_3C523_CARDS; this_dev++) {</div><div class='del'>-		struct net_device *dev = dev_elmc[this_dev];</div><div class='del'>-		if (dev) {</div><div class='del'>-			unregister_netdev(dev);</div><div class='del'>-			cleanup_card(dev);</div><div class='del'>-			free_netdev(dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif				/* MODULE */</div><div class='head'>diff --git a/drivers/net/ethernet/i825xx/3c523.h b/drivers/net/ethernet/i825xx/3c523.h<br/>deleted file mode 100644<br/>index 6956441687b9..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/i825xx/3c523.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/i825xx/3c523.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,355 +0,0 @@</div><div class='del'>-#ifndef _3c523_INCLUDE_</div><div class='del'>-#define _3c523_INCLUDE_</div><div class='del'>-/*</div><div class='del'>-	This is basically a hacked version of ni52.h, for the 3c523</div><div class='del'>-	Etherlink/MC.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Intel i82586 Ethernet definitions</div><div class='del'>- *</div><div class='del'>- * This is an extension to the Linux operating system, and is covered by the</div><div class='del'>- * same GNU General Public License that covers that work.</div><div class='del'>- *</div><div class='del'>- * Copyright 1995 by Chris Beauregard (cpbeaure@undergrad.math.uwaterloo.ca)</div><div class='del'>- *</div><div class='del'>- * See 3c523.c for details.</div><div class='del'>- *</div><div class='del'>- * $Header: /home/chrisb/linux-1.2.13-3c523/drivers/net/RCS/3c523.h,v 1.6 1996/01/20 05:09:00 chrisb Exp chrisb $</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * where to find the System Configuration Pointer (SCP)</div><div class='del'>- */</div><div class='del'>-#define SCP_DEFAULT_ADDRESS 0xfffff4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * System Configuration Pointer Struct</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct scp_struct</div><div class='del'>-{</div><div class='del'>-  unsigned short zero_dum0;	/* has to be zero */</div><div class='del'>-  unsigned char  sysbus;	/* 0=16Bit,1=8Bit */</div><div class='del'>-  unsigned char  zero_dum1;	/* has to be zero for 586 */</div><div class='del'>-  unsigned short zero_dum2;</div><div class='del'>-  unsigned short zero_dum3;</div><div class='del'>-  char          *iscp;		/* pointer to the iscp-block */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Intermediate System Configuration Pointer (ISCP)</div><div class='del'>- */</div><div class='del'>-struct iscp_struct</div><div class='del'>-{</div><div class='del'>-  unsigned char  busy;          /* 586 clears after successful init */</div><div class='del'>-  unsigned char  zero_dummy;    /* hast to be zero */</div><div class='del'>-  unsigned short scb_offset;    /* pointeroffset to the scb_base */</div><div class='del'>-  char          *scb_base;      /* base-address of all 16-bit offsets */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * System Control Block (SCB)</div><div class='del'>- */</div><div class='del'>-struct scb_struct</div><div class='del'>-{</div><div class='del'>-  unsigned short status;        /* status word */</div><div class='del'>-  unsigned short cmd;           /* command word */</div><div class='del'>-  unsigned short cbl_offset;    /* pointeroffset, command block list */</div><div class='del'>-  unsigned short rfa_offset;    /* pointeroffset, receive frame area */</div><div class='del'>-  unsigned short crc_errs;      /* CRC-Error counter */</div><div class='del'>-  unsigned short aln_errs;      /* alignmenterror counter */</div><div class='del'>-  unsigned short rsc_errs;      /* Resourceerror counter */</div><div class='del'>-  unsigned short ovrn_errs;     /* OVerrunerror counter */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * possible command values for the command word</div><div class='del'>- */</div><div class='del'>-#define RUC_MASK	0x0070	/* mask for RU commands */</div><div class='del'>-#define RUC_NOP		0x0000	/* NOP-command */</div><div class='del'>-#define RUC_START	0x0010	/* start RU */</div><div class='del'>-#define RUC_RESUME	0x0020	/* resume RU after suspend */</div><div class='del'>-#define RUC_SUSPEND	0x0030	/* suspend RU */</div><div class='del'>-#define RUC_ABORT	0x0040	/* abort receiver operation immediately */</div><div class='del'>-</div><div class='del'>-#define CUC_MASK	0x0700	/* mask for CU command */</div><div class='del'>-#define CUC_NOP		0x0000	/* NOP-command */</div><div class='del'>-#define CUC_START	0x0100	/* start execution of 1. cmd on the CBL */</div><div class='del'>-#define CUC_RESUME	0x0200	/* resume after suspend */</div><div class='del'>-#define CUC_SUSPEND	0x0300	/* Suspend CU */</div><div class='del'>-#define CUC_ABORT	0x0400	/* abort command operation immediately */</div><div class='del'>-</div><div class='del'>-#define ACK_MASK	0xf000	/* mask for ACK command */</div><div class='del'>-#define ACK_CX		0x8000	/* acknowledges STAT_CX */</div><div class='del'>-#define ACK_FR		0x4000	/* ack. STAT_FR */</div><div class='del'>-#define ACK_CNA		0x2000	/* ack. STAT_CNA */</div><div class='del'>-#define ACK_RNR		0x1000	/* ack. STAT_RNR */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * possible status values for the status word</div><div class='del'>- */</div><div class='del'>-#define STAT_MASK	0xf000	/* mask for cause of interrupt */</div><div class='del'>-#define STAT_CX		0x8000	/* CU finished cmd with its I bit set */</div><div class='del'>-#define STAT_FR		0x4000	/* RU finished receiving a frame */</div><div class='del'>-#define STAT_CNA	0x2000	/* CU left active state */</div><div class='del'>-#define STAT_RNR	0x1000	/* RU left ready state */</div><div class='del'>-</div><div class='del'>-#define CU_STATUS	0x700	/* CU status, 0=idle */</div><div class='del'>-#define CU_SUSPEND	0x100	/* CU is suspended */</div><div class='del'>-#define CU_ACTIVE	0x200	/* CU is active */</div><div class='del'>-</div><div class='del'>-#define RU_STATUS	0x70	/* RU status, 0=idle */</div><div class='del'>-#define RU_SUSPEND	0x10	/* RU suspended */</div><div class='del'>-#define RU_NOSPACE	0x20	/* RU no resources */</div><div class='del'>-#define RU_READY	0x40	/* RU is ready */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Receive Frame Descriptor (RFD)</div><div class='del'>- */</div><div class='del'>-struct rfd_struct</div><div class='del'>-{</div><div class='del'>-  unsigned short status;	/* status word */</div><div class='del'>-  unsigned short last;		/* Bit15,Last Frame on List / Bit14,suspend */</div><div class='del'>-  unsigned short next;		/* linkoffset to next RFD */</div><div class='del'>-  unsigned short rbd_offset;	/* pointeroffset to RBD-buffer */</div><div class='del'>-  unsigned char  dest[6];	/* ethernet-address, destination */</div><div class='del'>-  unsigned char  source[6];	/* ethernet-address, source */</div><div class='del'>-  unsigned short length;	/* 802.3 frame-length */</div><div class='del'>-  unsigned short zero_dummy;	/* dummy */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define RFD_LAST     0x8000	/* last: last rfd in the list */</div><div class='del'>-#define RFD_SUSP     0x4000	/* last: suspend RU after  */</div><div class='del'>-#define RFD_ERRMASK  0x0fe1     /* status: errormask */</div><div class='del'>-#define RFD_MATCHADD 0x0002     /* status: Destinationaddress !matches IA */</div><div class='del'>-#define RFD_RNR      0x0200	/* status: receiver out of resources */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Receive Buffer Descriptor (RBD)</div><div class='del'>- */</div><div class='del'>-struct rbd_struct</div><div class='del'>-{</div><div class='del'>-  unsigned short status;	/* status word,number of used bytes in buff */</div><div class='del'>-  unsigned short next;		/* pointeroffset to next RBD */</div><div class='del'>-  char          *buffer;	/* receive buffer address pointer */</div><div class='del'>-  unsigned short size;		/* size of this buffer */</div><div class='del'>-  unsigned short zero_dummy;    /* dummy */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define RBD_LAST	0x8000	/* last buffer */</div><div class='del'>-#define RBD_USED	0x4000	/* this buffer has data */</div><div class='del'>-#define RBD_MASK	0x3fff	/* size-mask for length */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Statusvalues for Commands/RFD</div><div class='del'>- */</div><div class='del'>-#define STAT_COMPL   0x8000	/* status: frame/command is complete */</div><div class='del'>-#define STAT_BUSY    0x4000	/* status: frame/command is busy */</div><div class='del'>-#define STAT_OK      0x2000	/* status: frame/command is ok */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Action-Commands</div><div class='del'>- */</div><div class='del'>-#define CMD_NOP		0x0000	/* NOP */</div><div class='del'>-#define CMD_IASETUP	0x0001	/* initial address setup command */</div><div class='del'>-#define CMD_CONFIGURE	0x0002	/* configure command */</div><div class='del'>-#define CMD_MCSETUP	0x0003	/* MC setup command */</div><div class='del'>-#define CMD_XMIT	0x0004	/* transmit command */</div><div class='del'>-#define CMD_TDR		0x0005	/* time domain reflectometer (TDR) command */</div><div class='del'>-#define CMD_DUMP	0x0006	/* dump command */</div><div class='del'>-#define CMD_DIAGNOSE	0x0007	/* diagnose command */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Action command bits</div><div class='del'>- */</div><div class='del'>-#define CMD_LAST	0x8000	/* indicates last command in the CBL */</div><div class='del'>-#define CMD_SUSPEND	0x4000	/* suspend CU after this CB */</div><div class='del'>-#define CMD_INT		0x2000	/* generate interrupt after execution */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * NOP - command</div><div class='del'>- */</div><div class='del'>-struct nop_cmd_struct</div><div class='del'>-{</div><div class='del'>-  unsigned short cmd_status;	/* status of this command */</div><div class='del'>-  unsigned short cmd_cmd;       /* the command itself (+bits) */</div><div class='del'>-  unsigned short cmd_link;      /* offsetpointer to next command */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IA Setup command</div><div class='del'>- */</div><div class='del'>-struct iasetup_cmd_struct</div><div class='del'>-{</div><div class='del'>-  unsigned short cmd_status;</div><div class='del'>-  unsigned short cmd_cmd;</div><div class='del'>-  unsigned short cmd_link;</div><div class='del'>-  unsigned char  iaddr[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Configure command</div><div class='del'>- */</div><div class='del'>-struct configure_cmd_struct</div><div class='del'>-{</div><div class='del'>-  unsigned short cmd_status;</div><div class='del'>-  unsigned short cmd_cmd;</div><div class='del'>-  unsigned short cmd_link;</div><div class='del'>-  unsigned char  byte_cnt;   /* size of the config-cmd */</div><div class='del'>-  unsigned char  fifo;       /* fifo/recv monitor */</div><div class='del'>-  unsigned char  sav_bf;     /* save bad frames (bit7=1)*/</div><div class='del'>-  unsigned char  adr_len;    /* adr_len(0-2),al_loc(3),pream(4-5),loopbak(6-7)*/</div><div class='del'>-  unsigned char  priority;   /* lin_prio(0-2),exp_prio(4-6),bof_metd(7) */</div><div class='del'>-  unsigned char  ifs;        /* inter frame spacing */</div><div class='del'>-  unsigned char  time_low;   /* slot time low */</div><div class='del'>-  unsigned char  time_high;  /* slot time high(0-2) and max. retries(4-7) */</div><div class='del'>-  unsigned char  promisc;    /* promisc-mode(0) , et al (1-7) */</div><div class='del'>-  unsigned char  carr_coll;  /* carrier(0-3)/collision(4-7) stuff */</div><div class='del'>-  unsigned char  fram_len;   /* minimal frame len */</div><div class='del'>-  unsigned char  dummy;	     /* dummy */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Multicast Setup command</div><div class='del'>- */</div><div class='del'>-struct mcsetup_cmd_struct</div><div class='del'>-{</div><div class='del'>-  unsigned short cmd_status;</div><div class='del'>-  unsigned short cmd_cmd;</div><div class='del'>-  unsigned short cmd_link;</div><div class='del'>-  unsigned short mc_cnt;		/* number of bytes in the MC-List */</div><div class='del'>-  unsigned char  mc_list[0][6];  	/* pointer to 6 bytes entries */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * transmit command</div><div class='del'>- */</div><div class='del'>-struct transmit_cmd_struct</div><div class='del'>-{</div><div class='del'>-  unsigned short cmd_status;</div><div class='del'>-  unsigned short cmd_cmd;</div><div class='del'>-  unsigned short cmd_link;</div><div class='del'>-  unsigned short tbd_offset;	/* pointeroffset to TBD */</div><div class='del'>-  unsigned char  dest[6];       /* destination address of the frame */</div><div class='del'>-  unsigned short length;	/* user defined: 802.3 length / Ether type */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define TCMD_ERRMASK     0x0fa0</div><div class='del'>-#define TCMD_MAXCOLLMASK 0x000f</div><div class='del'>-#define TCMD_MAXCOLL     0x0020</div><div class='del'>-#define TCMD_HEARTBEAT   0x0040</div><div class='del'>-#define TCMD_DEFERRED    0x0080</div><div class='del'>-#define TCMD_UNDERRUN    0x0100</div><div class='del'>-#define TCMD_LOSTCTS     0x0200</div><div class='del'>-#define TCMD_NOCARRIER   0x0400</div><div class='del'>-#define TCMD_LATECOLL    0x0800</div><div class='del'>-</div><div class='del'>-struct tdr_cmd_struct</div><div class='del'>-{</div><div class='del'>-  unsigned short cmd_status;</div><div class='del'>-  unsigned short cmd_cmd;</div><div class='del'>-  unsigned short cmd_link;</div><div class='del'>-  unsigned short status;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define TDR_LNK_OK	0x8000	/* No link problem identified */</div><div class='del'>-#define TDR_XCVR_PRB	0x4000	/* indicates a transceiver problem */</div><div class='del'>-#define TDR_ET_OPN	0x2000	/* open, no correct termination */</div><div class='del'>-#define TDR_ET_SRT	0x1000	/* TDR detected a short circuit */</div><div class='del'>-#define TDR_TIMEMASK	0x07ff	/* mask for the time field */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Transmit Buffer Descriptor (TBD)</div><div class='del'>- */</div><div class='del'>-struct tbd_struct</div><div class='del'>-{</div><div class='del'>-  unsigned short size;		/* size + EOF-Flag(15) */</div><div class='del'>-  unsigned short next;          /* pointeroffset to next TBD */</div><div class='del'>-  char          *buffer;        /* pointer to buffer */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define TBD_LAST 0x8000         /* EOF-Flag, indicates last buffer in list */</div><div class='del'>-</div><div class='del'>-/*************************************************************************/</div><div class='del'>-/*</div><div class='del'>-Verbatim from the Crynwyr stuff:</div><div class='del'>-</div><div class='del'>-    The 3c523 responds with adapter code 0x6042 at slot</div><div class='del'>-registers xxx0 and xxx1.  The setup register is at xxx2 and</div><div class='del'>-contains the following bits:</div><div class='del'>-</div><div class='del'>-0: card enable</div><div class='del'>-2,1: csr address select</div><div class='del'>-    00 = 0300</div><div class='del'>-    01 = 1300</div><div class='del'>-    10 = 2300</div><div class='del'>-    11 = 3300</div><div class='del'>-4,3: shared memory address select</div><div class='del'>-    00 = 0c0000</div><div class='del'>-    01 = 0c8000</div><div class='del'>-    10 = 0d0000</div><div class='del'>-    11 = 0d8000</div><div class='del'>-5: set to disable on-board thinnet</div><div class='del'>-7,6: (read-only) shows selected irq</div><div class='del'>-    00 = 12</div><div class='del'>-    01 = 7</div><div class='del'>-    10 = 3</div><div class='del'>-    11 = 9</div><div class='del'>-</div><div class='del'>-The interrupt-select register is at xxx3 and uses one bit per irq.</div><div class='del'>-</div><div class='del'>-0: int 12</div><div class='del'>-1: int 7</div><div class='del'>-2: int 3</div><div class='del'>-3: int 9</div><div class='del'>-</div><div class='del'>-    Again, the documentation stresses that the setup register</div><div class='del'>-should never be written.  The interrupt-select register may be</div><div class='del'>-written with the value corresponding to bits 7.6 in</div><div class='del'>-the setup register to insure corret setup.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-/* Offsets from the base I/O address. */</div><div class='del'>-#define	ELMC_SA		0	/* first 6 bytes are IEEE network address */</div><div class='del'>-#define ELMC_CTRL	6	/* control &amp; status register */</div><div class='del'>-#define ELMC_REVISION	7	/* revision register, first 4 bits only */</div><div class='del'>-#define ELMC_IO_EXTENT  8</div><div class='del'>-</div><div class='del'>-/* these are the bit selects for the port register 2 */</div><div class='del'>-#define ELMC_STATUS_ENABLED	0x01</div><div class='del'>-#define ELMC_STATUS_CSR_SELECT	0x06</div><div class='del'>-#define ELMC_STATUS_MEMORY_SELECT	0x18</div><div class='del'>-#define ELMC_STATUS_DISABLE_THIN	0x20</div><div class='del'>-#define ELMC_STATUS_IRQ_SELECT	0xc0</div><div class='del'>-</div><div class='del'>-/* this is the card id used in the detection code.  You might recognize</div><div class='del'>-it from @6042.adf */</div><div class='del'>-#define ELMC_MCA_ID 0x6042</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-   The following define the bits for the control &amp; status register</div><div class='del'>-</div><div class='del'>-   The bank select registers can be used if more than 16K of memory is</div><div class='del'>-   on the card.  For some stupid reason, bank 3 is the one for the</div><div class='del'>-   bottom 16K, and the card defaults to bank 0.  So we have to set the</div><div class='del'>-   bank to 3 before the card will even think of operating.  To get bank</div><div class='del'>-   3, set BS0 and BS1 to high (of course...)</div><div class='del'>-*/</div><div class='del'>-#define ELMC_CTRL_BS0	0x01	/* RW bank select */</div><div class='del'>-#define ELMC_CTRL_BS1	0x02	/* RW bank select */</div><div class='del'>-#define ELMC_CTRL_INTE	0x04	/* RW interrupt enable, assert high */</div><div class='del'>-#define ELMC_CTRL_INT	0x08	/* R interrupt active, assert high */</div><div class='del'>-/*#define ELMC_CTRL_*	0x10*/	/* reserved */</div><div class='del'>-#define ELMC_CTRL_LBK	0x20	/* RW loopback enable, assert high */</div><div class='del'>-#define ELMC_CTRL_CA	0x40	/* RW channel attention, assert high */</div><div class='del'>-#define ELMC_CTRL_RST	0x80	/* RW 82586 reset, assert low */</div><div class='del'>-</div><div class='del'>-/* some handy compound bits */</div><div class='del'>-</div><div class='del'>-/* normal operation should have bank 3 and RST high, ints enabled */</div><div class='del'>-#define ELMC_NORMAL (ELMC_CTRL_INTE|ELMC_CTRL_RST|0x3)</div><div class='del'>-</div><div class='del'>-#endif /* _3c523_INCLUDE_ */</div><div class='head'>diff --git a/drivers/net/ethernet/i825xx/3c527.c b/drivers/net/ethernet/i825xx/3c527.c<br/>deleted file mode 100644<br/>index 278e791afe00..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/i825xx/3c527.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/i825xx/3c527.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1660 +0,0 @@</div><div class='del'>-/* 3c527.c: 3Com Etherlink/MC32 driver for Linux 2.4 and 2.6.</div><div class='del'>- *</div><div class='del'>- *	(c) Copyright 1998 Red Hat Software Inc</div><div class='del'>- *	Written by Alan Cox.</div><div class='del'>- *	Further debugging by Carl Drougge.</div><div class='del'>- *      Initial SMP support by Felipe W Damasio &lt;felipewd@terra.com.br&gt;</div><div class='del'>- *      Heavily modified by Richard Procter &lt;rnp@paradise.net.nz&gt;</div><div class='del'>- *</div><div class='del'>- *	Based on skeleton.c written 1993-94 by Donald Becker and ne2.c</div><div class='del'>- *	(for the MCA stuff) written by Wim Dumon.</div><div class='del'>- *</div><div class='del'>- *	Thanks to 3Com for making this possible by providing me with the</div><div class='del'>- *	documentation.</div><div class='del'>- *</div><div class='del'>- *	This software may be used and distributed according to the terms</div><div class='del'>- *	of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define DRV_NAME		"3c527"</div><div class='del'>-#define DRV_VERSION		"0.7-SMP"</div><div class='del'>-#define DRV_RELDATE		"2003/09/21"</div><div class='del'>-</div><div class='del'>-static const char *version =</div><div class='del'>-DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Richard Procter &lt;rnp@paradise.net.nz&gt;\n";</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * DOC: Traps for the unwary</div><div class='del'>- *</div><div class='del'>- *	The diagram (Figure 1-1) and the POS summary disagree with the</div><div class='del'>- *	"Interrupt Level" section in the manual.</div><div class='del'>- *</div><div class='del'>- *	The manual contradicts itself when describing the minimum number</div><div class='del'>- *	buffers in the 'configure lists' command.</div><div class='del'>- *	My card accepts a buffer config of 4/4.</div><div class='del'>- *</div><div class='del'>- *	Setting the SAV BP bit does not save bad packets, but</div><div class='del'>- *	only enables RX on-card stats collection.</div><div class='del'>- *</div><div class='del'>- *	The documentation in places seems to miss things. In actual fact</div><div class='del'>- *	I've always eventually found everything is documented, it just</div><div class='del'>- *	requires careful study.</div><div class='del'>- *</div><div class='del'>- * DOC: Theory Of Operation</div><div class='del'>- *</div><div class='del'>- *	The 3com 3c527 is a 32bit MCA bus mastering adapter with a large</div><div class='del'>- *	amount of on board intelligence that housekeeps a somewhat dumber</div><div class='del'>- *	Intel NIC. For performance we want to keep the transmit queue deep</div><div class='del'>- *	as the card can transmit packets while fetching others from main</div><div class='del'>- *	memory by bus master DMA. Transmission and reception are driven by</div><div class='del'>- *	circular buffer queues.</div><div class='del'>- *</div><div class='del'>- *	The mailboxes can be used for controlling how the card traverses</div><div class='del'>- *	its buffer rings, but are used only for initial setup in this</div><div class='del'>- *	implementation.  The exec mailbox allows a variety of commands to</div><div class='del'>- *	be executed. Each command must complete before the next is</div><div class='del'>- *	executed. Primarily we use the exec mailbox for controlling the</div><div class='del'>- *	multicast lists.  We have to do a certain amount of interesting</div><div class='del'>- *	hoop jumping as the multicast list changes can occur in interrupt</div><div class='del'>- *	state when the card has an exec command pending. We defer such</div><div class='del'>- *	events until the command completion interrupt.</div><div class='del'>- *</div><div class='del'>- *	A copy break scheme (taken from 3c59x.c) is employed whereby</div><div class='del'>- *	received frames exceeding a configurable length are passed</div><div class='del'>- *	directly to the higher networking layers without incuring a copy,</div><div class='del'>- *	in what amounts to a time/space trade-off.</div><div class='del'>- *</div><div class='del'>- *	The card also keeps a large amount of statistical information</div><div class='del'>- *	on-board. In a perfect world, these could be used safely at no</div><div class='del'>- *	cost. However, lacking information to the contrary, processing</div><div class='del'>- *	them without races would involve so much extra complexity as to</div><div class='del'>- *	make it unworthwhile to do so. In the end, a hybrid SW/HW</div><div class='del'>- *	implementation was made necessary --- see mc32_update_stats().</div><div class='del'>- *</div><div class='del'>- * DOC: Notes</div><div class='del'>- *</div><div class='del'>- *	It should be possible to use two or more cards, but at this stage</div><div class='del'>- *	only by loading two copies of the same module.</div><div class='del'>- *</div><div class='del'>- *	The on-board 82586 NIC has trouble receiving multiple</div><div class='del'>- *	back-to-back frames and so is likely to drop packets from fast</div><div class='del'>- *	senders.</div><div class='del'>-**/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/if_ether.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/fcntl.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/mca-legacy.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/wait.h&gt;</div><div class='del'>-#include &lt;linux/ethtool.h&gt;</div><div class='del'>-#include &lt;linux/completion.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/semaphore.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-</div><div class='del'>-#include "3c527.h"</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The name of the card. Is used for messages and in the requests for</div><div class='del'>- * io regions, irqs and dma channels</div><div class='del'>- */</div><div class='del'>-static const char* cardname = DRV_NAME;</div><div class='del'>-</div><div class='del'>-/* use 0 for production, 1 for verification, &gt;2 for debug */</div><div class='del'>-#ifndef NET_DEBUG</div><div class='del'>-#define NET_DEBUG 2</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static unsigned int mc32_debug = NET_DEBUG;</div><div class='del'>-</div><div class='del'>-/* The number of low I/O ports used by the ethercard. */</div><div class='del'>-#define MC32_IO_EXTENT	8</div><div class='del'>-</div><div class='del'>-/* As implemented, values must be a power-of-2 -- 4/8/16/32 */</div><div class='del'>-#define TX_RING_LEN     32       /* Typically the card supports 37  */</div><div class='del'>-#define RX_RING_LEN     8        /*     "       "        "          */</div><div class='del'>-</div><div class='del'>-/* Copy break point, see above for details.</div><div class='del'>- * Setting to &gt; 1512 effectively disables this feature.	*/</div><div class='del'>-#define RX_COPYBREAK    200      /* Value from 3c59x.c */</div><div class='del'>-</div><div class='del'>-/* Issue the 82586 workaround command - this is for "busy lans", but</div><div class='del'>- * basically means for all lans now days - has a performance (latency)</div><div class='del'>- * cost, but best set. */</div><div class='del'>-static const int WORKAROUND_82586=1;</div><div class='del'>-</div><div class='del'>-/* Pointers to buffers and their on-card records */</div><div class='del'>-struct mc32_ring_desc</div><div class='del'>-{</div><div class='del'>-	volatile struct skb_header *p;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Information that needs to be kept for each board. */</div><div class='del'>-struct mc32_local</div><div class='del'>-{</div><div class='del'>-	int slot;</div><div class='del'>-</div><div class='del'>-	u32 base;</div><div class='del'>-	volatile struct mc32_mailbox *rx_box;</div><div class='del'>-	volatile struct mc32_mailbox *tx_box;</div><div class='del'>-	volatile struct mc32_mailbox *exec_box;</div><div class='del'>-        volatile struct mc32_stats *stats;    /* Start of on-card statistics */</div><div class='del'>-        u16 tx_chain;           /* Transmit list start offset */</div><div class='del'>-	u16 rx_chain;           /* Receive list start offset */</div><div class='del'>-        u16 tx_len;             /* Transmit list count */</div><div class='del'>-        u16 rx_len;             /* Receive list count */</div><div class='del'>-</div><div class='del'>-	u16 xceiver_desired_state; /* HALTED or RUNNING */</div><div class='del'>-	u16 cmd_nonblocking;    /* Thread is uninterested in command result */</div><div class='del'>-	u16 mc_reload_wait;	/* A multicast load request is pending */</div><div class='del'>-	u32 mc_list_valid;	/* True when the mclist is set */</div><div class='del'>-</div><div class='del'>-	struct mc32_ring_desc tx_ring[TX_RING_LEN];	/* Host Transmit ring */</div><div class='del'>-	struct mc32_ring_desc rx_ring[RX_RING_LEN];	/* Host Receive ring */</div><div class='del'>-</div><div class='del'>-	atomic_t tx_count;	/* buffers left */</div><div class='del'>-	atomic_t tx_ring_head;  /* index to tx en-queue end */</div><div class='del'>-	u16 tx_ring_tail;       /* index to tx de-queue end */</div><div class='del'>-</div><div class='del'>-	u16 rx_ring_tail;       /* index to rx de-queue end */</div><div class='del'>-</div><div class='del'>-	struct semaphore cmd_mutex;    /* Serialises issuing of execute commands */</div><div class='del'>-        struct completion execution_cmd; /* Card has completed an execute command */</div><div class='del'>-	struct completion xceiver_cmd;   /* Card has completed a tx or rx command */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* The station (ethernet) address prefix, used for a sanity check. */</div><div class='del'>-#define SA_ADDR0 0x02</div><div class='del'>-#define SA_ADDR1 0x60</div><div class='del'>-#define SA_ADDR2 0xAC</div><div class='del'>-</div><div class='del'>-struct mca_adapters_t {</div><div class='del'>-	unsigned int	id;</div><div class='del'>-	char		*name;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct mca_adapters_t mc32_adapters[] = {</div><div class='del'>-	{ 0x0041, "3COM EtherLink MC/32" },</div><div class='del'>-	{ 0x8EF5, "IBM High Performance Lan Adapter" },</div><div class='del'>-	{ 0x0000, NULL }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Macros for ring index manipulations */</div><div class='del'>-static inline u16 next_rx(u16 rx) { return (rx+1)&amp;(RX_RING_LEN-1); };</div><div class='del'>-static inline u16 prev_rx(u16 rx) { return (rx-1)&amp;(RX_RING_LEN-1); };</div><div class='del'>-</div><div class='del'>-static inline u16 next_tx(u16 tx) { return (tx+1)&amp;(TX_RING_LEN-1); };</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Index to functions, as function prototypes. */</div><div class='del'>-static int	mc32_probe1(struct net_device *dev, int ioaddr);</div><div class='del'>-static int      mc32_command(struct net_device *dev, u16 cmd, void *data, int len);</div><div class='del'>-static int	mc32_open(struct net_device *dev);</div><div class='del'>-static void	mc32_timeout(struct net_device *dev);</div><div class='del'>-static netdev_tx_t mc32_send_packet(struct sk_buff *skb,</div><div class='del'>-				    struct net_device *dev);</div><div class='del'>-static irqreturn_t mc32_interrupt(int irq, void *dev_id);</div><div class='del'>-static int	mc32_close(struct net_device *dev);</div><div class='del'>-static struct	net_device_stats *mc32_get_stats(struct net_device *dev);</div><div class='del'>-static void	mc32_set_multicast_list(struct net_device *dev);</div><div class='del'>-static void	mc32_reset_multicast_list(struct net_device *dev);</div><div class='del'>-static const struct ethtool_ops netdev_ethtool_ops;</div><div class='del'>-</div><div class='del'>-static void cleanup_card(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	unsigned slot = lp-&gt;slot;</div><div class='del'>-	mca_mark_as_unused(slot);</div><div class='del'>-	mca_set_adapter_name(slot, NULL);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	release_region(dev-&gt;base_addr, MC32_IO_EXTENT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * mc32_probe 	-	Search for supported boards</div><div class='del'>- * @unit: interface number to use</div><div class='del'>- *</div><div class='del'>- * Because MCA bus is a real bus and we can scan for cards we could do a</div><div class='del'>- * single scan for all boards here. Right now we use the passed in device</div><div class='del'>- * structure and scan for only one board. This needs fixing for modules</div><div class='del'>- * in particular.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct net_device *__init mc32_probe(int unit)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = alloc_etherdev(sizeof(struct mc32_local));</div><div class='del'>-	static int current_mca_slot = -1;</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (!dev)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	if (unit &gt;= 0)</div><div class='del'>-		sprintf(dev-&gt;name, "eth%d", unit);</div><div class='del'>-</div><div class='del'>-	/* Do not check any supplied i/o locations.</div><div class='del'>-	   POS registers usually don't fail :) */</div><div class='del'>-</div><div class='del'>-	/* MCA cards have POS registers.</div><div class='del'>-	   Autodetecting MCA cards is extremely simple.</div><div class='del'>-	   Just search for the card. */</div><div class='del'>-</div><div class='del'>-	for(i = 0; (mc32_adapters[i].name != NULL); i++) {</div><div class='del'>-		current_mca_slot =</div><div class='del'>-			mca_find_unused_adapter(mc32_adapters[i].id, 0);</div><div class='del'>-</div><div class='del'>-		if(current_mca_slot != MCA_NOTFOUND) {</div><div class='del'>-			if(!mc32_probe1(dev, current_mca_slot))</div><div class='del'>-			{</div><div class='del'>-				mca_set_adapter_name(current_mca_slot,</div><div class='del'>-						mc32_adapters[i].name);</div><div class='del'>-				mca_mark_as_used(current_mca_slot);</div><div class='del'>-				err = register_netdev(dev);</div><div class='del'>-				if (err) {</div><div class='del'>-					cleanup_card(dev);</div><div class='del'>-					free_netdev(dev);</div><div class='del'>-					dev = ERR_PTR(err);</div><div class='del'>-				}</div><div class='del'>-				return dev;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	return ERR_PTR(-ENODEV);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops netdev_ops = {</div><div class='del'>-	.ndo_open		= mc32_open,</div><div class='del'>-	.ndo_stop		= mc32_close,</div><div class='del'>-	.ndo_start_xmit		= mc32_send_packet,</div><div class='del'>-	.ndo_get_stats		= mc32_get_stats,</div><div class='del'>-	.ndo_set_rx_mode	= mc32_set_multicast_list,</div><div class='del'>-	.ndo_tx_timeout		= mc32_timeout,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='del'>-	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='del'>-	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * mc32_probe1	-	Check a given slot for a board and test the card</div><div class='del'>- * @dev:  Device structure to fill in</div><div class='del'>- * @slot: The MCA bus slot being used by this card</div><div class='del'>- *</div><div class='del'>- * Decode the slot data and configure the card structures. Having done this we</div><div class='del'>- * can reset the card and configure it. The card does a full self test cycle</div><div class='del'>- * in firmware so we have to wait for it to return and post us either a</div><div class='del'>- * failure case or some addresses we use to find the board internals.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init mc32_probe1(struct net_device *dev, int slot)</div><div class='del'>-{</div><div class='del'>-	static unsigned version_printed;</div><div class='del'>-	int i, err;</div><div class='del'>-	u8 POS;</div><div class='del'>-	u32 base;</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	static const u16 mca_io_bases[] = {</div><div class='del'>-		0x7280,0x7290,</div><div class='del'>-		0x7680,0x7690,</div><div class='del'>-		0x7A80,0x7A90,</div><div class='del'>-		0x7E80,0x7E90</div><div class='del'>-	};</div><div class='del'>-	static const u32 mca_mem_bases[] = {</div><div class='del'>-		0x00C0000,</div><div class='del'>-		0x00C4000,</div><div class='del'>-		0x00C8000,</div><div class='del'>-		0x00CC000,</div><div class='del'>-		0x00D0000,</div><div class='del'>-		0x00D4000,</div><div class='del'>-		0x00D8000,</div><div class='del'>-		0x00DC000</div><div class='del'>-	};</div><div class='del'>-	static const char * const failures[] = {</div><div class='del'>-		"Processor instruction",</div><div class='del'>-		"Processor data bus",</div><div class='del'>-		"Processor data bus",</div><div class='del'>-		"Processor data bus",</div><div class='del'>-		"Adapter bus",</div><div class='del'>-		"ROM checksum",</div><div class='del'>-		"Base RAM",</div><div class='del'>-		"Extended RAM",</div><div class='del'>-		"82586 internal loopback",</div><div class='del'>-		"82586 initialisation failure",</div><div class='del'>-		"Adapter list configuration error"</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* Time to play MCA games */</div><div class='del'>-</div><div class='del'>-	if (mc32_debug  &amp;&amp;  version_printed++ == 0)</div><div class='del'>-		pr_debug("%s", version);</div><div class='del'>-</div><div class='del'>-	pr_info("%s: %s found in slot %d: ", dev-&gt;name, cardname, slot);</div><div class='del'>-</div><div class='del'>-	POS = mca_read_stored_pos(slot, 2);</div><div class='del'>-</div><div class='del'>-	if(!(POS&amp;1))</div><div class='del'>-	{</div><div class='del'>-		pr_cont("disabled.\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Fill in the 'dev' fields. */</div><div class='del'>-	dev-&gt;base_addr = mca_io_bases[(POS&gt;&gt;1)&amp;7];</div><div class='del'>-	dev-&gt;mem_start = mca_mem_bases[(POS&gt;&gt;4)&amp;7];</div><div class='del'>-</div><div class='del'>-	POS = mca_read_stored_pos(slot, 4);</div><div class='del'>-	if(!(POS&amp;1))</div><div class='del'>-	{</div><div class='del'>-		pr_cont("memory window disabled.\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	POS = mca_read_stored_pos(slot, 5);</div><div class='del'>-</div><div class='del'>-	i=(POS&gt;&gt;4)&amp;3;</div><div class='del'>-	if(i==3)</div><div class='del'>-	{</div><div class='del'>-		pr_cont("invalid memory window.\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	i*=16384;</div><div class='del'>-	i+=16384;</div><div class='del'>-</div><div class='del'>-	dev-&gt;mem_end=dev-&gt;mem_start + i;</div><div class='del'>-</div><div class='del'>-	dev-&gt;irq = ((POS&gt;&gt;2)&amp;3)+9;</div><div class='del'>-</div><div class='del'>-	if(!request_region(dev-&gt;base_addr, MC32_IO_EXTENT, cardname))</div><div class='del'>-	{</div><div class='del'>-		pr_cont("io 0x%3lX, which is busy.\n", dev-&gt;base_addr);</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pr_cont("io 0x%3lX irq %d mem 0x%lX (%dK)\n",</div><div class='del'>-		dev-&gt;base_addr, dev-&gt;irq, dev-&gt;mem_start, i/1024);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* We ought to set the cache line size here.. */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *	Go PROM browsing</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/* Retrieve and print the ethernet address. */</div><div class='del'>-	for (i = 0; i &lt; 6; i++)</div><div class='del'>-	{</div><div class='del'>-		mca_write_pos(slot, 6, i+12);</div><div class='del'>-		mca_write_pos(slot, 7, 0);</div><div class='del'>-</div><div class='del'>-		dev-&gt;dev_addr[i] = mca_read_pos(slot,3);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pr_info("%s: Address %pM ", dev-&gt;name, dev-&gt;dev_addr);</div><div class='del'>-</div><div class='del'>-	mca_write_pos(slot, 6, 0);</div><div class='del'>-	mca_write_pos(slot, 7, 0);</div><div class='del'>-</div><div class='del'>-	POS = mca_read_stored_pos(slot, 4);</div><div class='del'>-</div><div class='del'>-	if(POS&amp;2)</div><div class='del'>-		pr_cont(": BNC port selected.\n");</div><div class='del'>-	else</div><div class='del'>-		pr_cont(": AUI port selected.\n");</div><div class='del'>-</div><div class='del'>-	POS=inb(dev-&gt;base_addr+HOST_CTRL);</div><div class='del'>-	POS|=HOST_CTRL_ATTN|HOST_CTRL_RESET;</div><div class='del'>-	POS&amp;=~HOST_CTRL_INTE;</div><div class='del'>-	outb(POS, dev-&gt;base_addr+HOST_CTRL);</div><div class='del'>-	/* Reset adapter */</div><div class='del'>-	udelay(100);</div><div class='del'>-	/* Reset off */</div><div class='del'>-	POS&amp;=~(HOST_CTRL_ATTN|HOST_CTRL_RESET);</div><div class='del'>-	outb(POS, dev-&gt;base_addr+HOST_CTRL);</div><div class='del'>-</div><div class='del'>-	udelay(300);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *	Grab the IRQ</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	err = request_irq(dev-&gt;irq, mc32_interrupt, IRQF_SHARED, DRV_NAME, dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		release_region(dev-&gt;base_addr, MC32_IO_EXTENT);</div><div class='del'>-		pr_err("%s: unable to get IRQ %d.\n", DRV_NAME, dev-&gt;irq);</div><div class='del'>-		goto err_exit_ports;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(lp, 0, sizeof(struct mc32_local));</div><div class='del'>-	lp-&gt;slot = slot;</div><div class='del'>-</div><div class='del'>-	i=0;</div><div class='del'>-</div><div class='del'>-	base = inb(dev-&gt;base_addr);</div><div class='del'>-</div><div class='del'>-	while(base == 0xFF)</div><div class='del'>-	{</div><div class='del'>-		i++;</div><div class='del'>-		if(i == 1000)</div><div class='del'>-		{</div><div class='del'>-			pr_err("%s: failed to boot adapter.\n", dev-&gt;name);</div><div class='del'>-			err = -ENODEV;</div><div class='del'>-			goto err_exit_irq;</div><div class='del'>-		}</div><div class='del'>-		udelay(1000);</div><div class='del'>-		if(inb(dev-&gt;base_addr+2)&amp;(1&lt;&lt;5))</div><div class='del'>-			base = inb(dev-&gt;base_addr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(base&gt;0)</div><div class='del'>-	{</div><div class='del'>-		if(base &lt; 0x0C)</div><div class='del'>-			pr_err("%s: %s%s.\n", dev-&gt;name, failures[base-1],</div><div class='del'>-				base&lt;0x0A?" test failure":"");</div><div class='del'>-		else</div><div class='del'>-			pr_err("%s: unknown failure %d.\n", dev-&gt;name, base);</div><div class='del'>-		err = -ENODEV;</div><div class='del'>-		goto err_exit_irq;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	base=0;</div><div class='del'>-	for(i=0;i&lt;4;i++)</div><div class='del'>-	{</div><div class='del'>-		int n=0;</div><div class='del'>-</div><div class='del'>-		while(!(inb(dev-&gt;base_addr+2)&amp;(1&lt;&lt;5)))</div><div class='del'>-		{</div><div class='del'>-			n++;</div><div class='del'>-			udelay(50);</div><div class='del'>-			if(n&gt;100)</div><div class='del'>-			{</div><div class='del'>-				pr_err("%s: mailbox read fail (%d).\n", dev-&gt;name, i);</div><div class='del'>-				err = -ENODEV;</div><div class='del'>-				goto err_exit_irq;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		base|=(inb(dev-&gt;base_addr)&lt;&lt;(8*i));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	lp-&gt;exec_box=isa_bus_to_virt(dev-&gt;mem_start+base);</div><div class='del'>-</div><div class='del'>-	base=lp-&gt;exec_box-&gt;data[1]&lt;&lt;16|lp-&gt;exec_box-&gt;data[0];</div><div class='del'>-</div><div class='del'>-	lp-&gt;base = dev-&gt;mem_start+base;</div><div class='del'>-</div><div class='del'>-	lp-&gt;rx_box=isa_bus_to_virt(lp-&gt;base + lp-&gt;exec_box-&gt;data[2]);</div><div class='del'>-	lp-&gt;tx_box=isa_bus_to_virt(lp-&gt;base + lp-&gt;exec_box-&gt;data[3]);</div><div class='del'>-</div><div class='del'>-	lp-&gt;stats = isa_bus_to_virt(lp-&gt;base + lp-&gt;exec_box-&gt;data[5]);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *	Descriptor chains (card relative)</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	lp-&gt;tx_chain 		= lp-&gt;exec_box-&gt;data[8];   /* Transmit list start offset */</div><div class='del'>-	lp-&gt;rx_chain 		= lp-&gt;exec_box-&gt;data[10];  /* Receive list start offset */</div><div class='del'>-	lp-&gt;tx_len 		= lp-&gt;exec_box-&gt;data[9];   /* Transmit list count */</div><div class='del'>-	lp-&gt;rx_len 		= lp-&gt;exec_box-&gt;data[11];  /* Receive list count */</div><div class='del'>-</div><div class='del'>-	sema_init(&amp;lp-&gt;cmd_mutex, 0);</div><div class='del'>-	init_completion(&amp;lp-&gt;execution_cmd);</div><div class='del'>-	init_completion(&amp;lp-&gt;xceiver_cmd);</div><div class='del'>-</div><div class='del'>-	pr_info("%s: Firmware Rev %d. %d RX buffers, %d TX buffers. Base of 0x%08X.\n",</div><div class='del'>-		dev-&gt;name, lp-&gt;exec_box-&gt;data[12], lp-&gt;rx_len, lp-&gt;tx_len, lp-&gt;base);</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops		= &amp;netdev_ops;</div><div class='del'>-	dev-&gt;watchdog_timeo	= HZ*5;	/* Board does all the work */</div><div class='del'>-	dev-&gt;ethtool_ops	= &amp;netdev_ethtool_ops;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_exit_irq:</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-err_exit_ports:</div><div class='del'>-	release_region(dev-&gt;base_addr, MC32_IO_EXTENT);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_ready_poll		-	wait until we can feed it a command</div><div class='del'>- *	@dev:	The device to wait for</div><div class='del'>- *</div><div class='del'>- *	Wait until the card becomes ready to accept a command via the</div><div class='del'>- *	command register. This tells us nothing about the completion</div><div class='del'>- *	status of any pending commands and takes very little time at all.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static inline void mc32_ready_poll(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int ioaddr = dev-&gt;base_addr;</div><div class='del'>-	while(!(inb(ioaddr+HOST_STATUS)&amp;HOST_STATUS_CRR));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_command_nowait	-	send a command non blocking</div><div class='del'>- *	@dev: The 3c527 to issue the command to</div><div class='del'>- *	@cmd: The command word to write to the mailbox</div><div class='del'>- *	@data: A data block if the command expects one</div><div class='del'>- *	@len: Length of the data block</div><div class='del'>- *</div><div class='del'>- *	Send a command from interrupt state. If there is a command</div><div class='del'>- *	currently being executed then we return an error of -1. It</div><div class='del'>- *	simply isn't viable to wait around as commands may be</div><div class='del'>- *	slow. This can theoretically be starved on SMP, but it's hard</div><div class='del'>- *	to see a realistic situation.  We do not wait for the command</div><div class='del'>- *	to complete --- we rely on the interrupt handler to tidy up</div><div class='del'>- *	after us.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int mc32_command_nowait(struct net_device *dev, u16 cmd, void *data, int len)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	int ioaddr = dev-&gt;base_addr;</div><div class='del'>-	int ret = -1;</div><div class='del'>-</div><div class='del'>-	if (down_trylock(&amp;lp-&gt;cmd_mutex) == 0)</div><div class='del'>-	{</div><div class='del'>-		lp-&gt;cmd_nonblocking=1;</div><div class='del'>-		lp-&gt;exec_box-&gt;mbox=0;</div><div class='del'>-		lp-&gt;exec_box-&gt;mbox=cmd;</div><div class='del'>-		memcpy((void *)lp-&gt;exec_box-&gt;data, data, len);</div><div class='del'>-		barrier();	/* the memcpy forgot the volatile so be sure */</div><div class='del'>-</div><div class='del'>-		/* Send the command */</div><div class='del'>-		mc32_ready_poll(dev);</div><div class='del'>-		outb(1&lt;&lt;6, ioaddr+HOST_CMD);</div><div class='del'>-</div><div class='del'>-		ret = 0;</div><div class='del'>-</div><div class='del'>-		/* Interrupt handler will signal mutex on completion */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_command	-	send a command and sleep until completion</div><div class='del'>- *	@dev: The 3c527 card to issue the command to</div><div class='del'>- *	@cmd: The command word to write to the mailbox</div><div class='del'>- *	@data: A data block if the command expects one</div><div class='del'>- *	@len: Length of the data block</div><div class='del'>- *</div><div class='del'>- *	Sends exec commands in a user context. This permits us to wait around</div><div class='del'>- *	for the replies and also to wait for the command buffer to complete</div><div class='del'>- *	from a previous command before we execute our command. After our</div><div class='del'>- *	command completes we will attempt any pending multicast reload</div><div class='del'>- *	we blocked off by hogging the exec buffer.</div><div class='del'>- *</div><div class='del'>- *	You feed the card a command, you wait, it interrupts you get a</div><div class='del'>- *	reply. All well and good. The complication arises because you use</div><div class='del'>- *	commands for filter list changes which come in at bh level from things</div><div class='del'>- *	like IPV6 group stuff.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int mc32_command(struct net_device *dev, u16 cmd, void *data, int len)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	int ioaddr = dev-&gt;base_addr;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	down(&amp;lp-&gt;cmd_mutex);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *     My Turn</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	lp-&gt;cmd_nonblocking=0;</div><div class='del'>-	lp-&gt;exec_box-&gt;mbox=0;</div><div class='del'>-	lp-&gt;exec_box-&gt;mbox=cmd;</div><div class='del'>-	memcpy((void *)lp-&gt;exec_box-&gt;data, data, len);</div><div class='del'>-	barrier();	/* the memcpy forgot the volatile so be sure */</div><div class='del'>-</div><div class='del'>-	mc32_ready_poll(dev);</div><div class='del'>-	outb(1&lt;&lt;6, ioaddr+HOST_CMD);</div><div class='del'>-</div><div class='del'>-	wait_for_completion(&amp;lp-&gt;execution_cmd);</div><div class='del'>-</div><div class='del'>-	if(lp-&gt;exec_box-&gt;mbox&amp;(1&lt;&lt;13))</div><div class='del'>-		ret = -1;</div><div class='del'>-</div><div class='del'>-	up(&amp;lp-&gt;cmd_mutex);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *	A multicast set got blocked - try it now</div><div class='del'>-         */</div><div class='del'>-</div><div class='del'>-	if(lp-&gt;mc_reload_wait)</div><div class='del'>-	{</div><div class='del'>-		mc32_reset_multicast_list(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_start_transceiver	-	tell board to restart tx/rx</div><div class='del'>- *	@dev: The 3c527 card to issue the command to</div><div class='del'>- *</div><div class='del'>- *	This may be called from the interrupt state, where it is used</div><div class='del'>- *	to restart the rx ring if the card runs out of rx buffers.</div><div class='del'>- *</div><div class='del'>- * 	We must first check if it's ok to (re)start the transceiver. See</div><div class='del'>- *      mc32_close for details.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void mc32_start_transceiver(struct net_device *dev) {</div><div class='del'>-</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	int ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-	/* Ignore RX overflow on device closure */</div><div class='del'>-	if (lp-&gt;xceiver_desired_state==HALTED)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Give the card the offset to the post-EOL-bit RX descriptor */</div><div class='del'>-	mc32_ready_poll(dev);</div><div class='del'>-	lp-&gt;rx_box-&gt;mbox=0;</div><div class='del'>-	lp-&gt;rx_box-&gt;data[0]=lp-&gt;rx_ring[prev_rx(lp-&gt;rx_ring_tail)].p-&gt;next;</div><div class='del'>-	outb(HOST_CMD_START_RX, ioaddr+HOST_CMD);</div><div class='del'>-</div><div class='del'>-	mc32_ready_poll(dev);</div><div class='del'>-	lp-&gt;tx_box-&gt;mbox=0;</div><div class='del'>-	outb(HOST_CMD_RESTRT_TX, ioaddr+HOST_CMD);   /* card ignores this on RX restart */</div><div class='del'>-</div><div class='del'>-	/* We are not interrupted on start completion */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_halt_transceiver	-	tell board to stop tx/rx</div><div class='del'>- *	@dev: The 3c527 card to issue the command to</div><div class='del'>- *</div><div class='del'>- *	We issue the commands to halt the card's transceiver. In fact,</div><div class='del'>- *	after some experimenting we now simply tell the card to</div><div class='del'>- *	suspend. When issuing aborts occasionally odd things happened.</div><div class='del'>- *</div><div class='del'>- *	We then sleep until the card has notified us that both rx and</div><div class='del'>- *	tx have been suspended.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void mc32_halt_transceiver(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	int ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-	mc32_ready_poll(dev);</div><div class='del'>-	lp-&gt;rx_box-&gt;mbox=0;</div><div class='del'>-	outb(HOST_CMD_SUSPND_RX, ioaddr+HOST_CMD);</div><div class='del'>-	wait_for_completion(&amp;lp-&gt;xceiver_cmd);</div><div class='del'>-</div><div class='del'>-	mc32_ready_poll(dev);</div><div class='del'>-	lp-&gt;tx_box-&gt;mbox=0;</div><div class='del'>-	outb(HOST_CMD_SUSPND_TX, ioaddr+HOST_CMD);</div><div class='del'>-	wait_for_completion(&amp;lp-&gt;xceiver_cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_load_rx_ring	-	load the ring of receive buffers</div><div class='del'>- *	@dev: 3c527 to build the ring for</div><div class='del'>- *</div><div class='del'>- *	This initialises the on-card and driver datastructures to</div><div class='del'>- *	the point where mc32_start_transceiver() can be called.</div><div class='del'>- *</div><div class='del'>- *	The card sets up the receive ring for us. We are required to use the</div><div class='del'>- *	ring it provides, although the size of the ring is configurable.</div><div class='del'>- *</div><div class='del'>- * 	We allocate an sk_buff for each ring entry in turn and</div><div class='del'>- * 	initialise its house-keeping info. At the same time, we read</div><div class='del'>- * 	each 'next' pointer in our rx_ring array. This reduces slow</div><div class='del'>- * 	shared-memory reads and makes it easy to access predecessor</div><div class='del'>- * 	descriptors.</div><div class='del'>- *</div><div class='del'>- *	We then set the end-of-list bit for the last entry so that the</div><div class='del'>- * 	card will know when it has run out of buffers.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int mc32_load_rx_ring(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	int i;</div><div class='del'>-	u16 rx_base;</div><div class='del'>-	volatile struct skb_header *p;</div><div class='del'>-</div><div class='del'>-	rx_base=lp-&gt;rx_chain;</div><div class='del'>-</div><div class='del'>-	for(i=0; i&lt;RX_RING_LEN; i++) {</div><div class='del'>-		lp-&gt;rx_ring[i].skb=alloc_skb(1532, GFP_KERNEL);</div><div class='del'>-		if (lp-&gt;rx_ring[i].skb==NULL) {</div><div class='del'>-			for (;i&gt;=0;i--)</div><div class='del'>-				kfree_skb(lp-&gt;rx_ring[i].skb);</div><div class='del'>-			return -ENOBUFS;</div><div class='del'>-		}</div><div class='del'>-		skb_reserve(lp-&gt;rx_ring[i].skb, 18);</div><div class='del'>-</div><div class='del'>-		p=isa_bus_to_virt(lp-&gt;base+rx_base);</div><div class='del'>-</div><div class='del'>-		p-&gt;control=0;</div><div class='del'>-		p-&gt;data=isa_virt_to_bus(lp-&gt;rx_ring[i].skb-&gt;data);</div><div class='del'>-		p-&gt;status=0;</div><div class='del'>-		p-&gt;length=1532;</div><div class='del'>-</div><div class='del'>-		lp-&gt;rx_ring[i].p=p;</div><div class='del'>-		rx_base=p-&gt;next;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	lp-&gt;rx_ring[i-1].p-&gt;control |= CONTROL_EOL;</div><div class='del'>-</div><div class='del'>-	lp-&gt;rx_ring_tail=0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_flush_rx_ring	-	free the ring of receive buffers</div><div class='del'>- *	@lp: Local data of 3c527 to flush the rx ring of</div><div class='del'>- *</div><div class='del'>- *	Free the buffer for each ring slot. This may be called</div><div class='del'>- *      before mc32_load_rx_ring(), eg. on error in mc32_open().</div><div class='del'>- *      Requires rx skb pointers to point to a valid skb, or NULL.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void mc32_flush_rx_ring(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for(i=0; i &lt; RX_RING_LEN; i++)</div><div class='del'>-	{</div><div class='del'>-		if (lp-&gt;rx_ring[i].skb) {</div><div class='del'>-			dev_kfree_skb(lp-&gt;rx_ring[i].skb);</div><div class='del'>-			lp-&gt;rx_ring[i].skb = NULL;</div><div class='del'>-		}</div><div class='del'>-		lp-&gt;rx_ring[i].p=NULL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_load_tx_ring	-	load transmit ring</div><div class='del'>- *	@dev: The 3c527 card to issue the command to</div><div class='del'>- *</div><div class='del'>- *	This sets up the host transmit data-structures.</div><div class='del'>- *</div><div class='del'>- *	First, we obtain from the card it's current position in the tx</div><div class='del'>- *	ring, so that we will know where to begin transmitting</div><div class='del'>- *	packets.</div><div class='del'>- *</div><div class='del'>- * 	Then, we read the 'next' pointers from the on-card tx ring into</div><div class='del'>- *  	our tx_ring array to reduce slow shared-mem reads. Finally, we</div><div class='del'>- * 	intitalise the tx house keeping variables.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void mc32_load_tx_ring(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	volatile struct skb_header *p;</div><div class='del'>-	int i;</div><div class='del'>-	u16 tx_base;</div><div class='del'>-</div><div class='del'>-	tx_base=lp-&gt;tx_box-&gt;data[0];</div><div class='del'>-</div><div class='del'>-	for(i=0 ; i&lt;TX_RING_LEN ; i++)</div><div class='del'>-	{</div><div class='del'>-		p=isa_bus_to_virt(lp-&gt;base+tx_base);</div><div class='del'>-		lp-&gt;tx_ring[i].p=p;</div><div class='del'>-		lp-&gt;tx_ring[i].skb=NULL;</div><div class='del'>-</div><div class='del'>-		tx_base=p-&gt;next;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* -1 so that tx_ring_head cannot "lap" tx_ring_tail */</div><div class='del'>-	/* see mc32_tx_ring */</div><div class='del'>-</div><div class='del'>-	atomic_set(&amp;lp-&gt;tx_count, TX_RING_LEN-1);</div><div class='del'>-	atomic_set(&amp;lp-&gt;tx_ring_head, 0);</div><div class='del'>-	lp-&gt;tx_ring_tail=0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_flush_tx_ring 	-	free transmit ring</div><div class='del'>- *	@lp: Local data of 3c527 to flush the tx ring of</div><div class='del'>- *</div><div class='del'>- *      If the ring is non-empty, zip over the it, freeing any</div><div class='del'>- *      allocated skb_buffs.  The tx ring house-keeping variables are</div><div class='del'>- *      then reset. Requires rx skb pointers to point to a valid skb,</div><div class='del'>- *      or NULL.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void mc32_flush_tx_ring(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i=0; i &lt; TX_RING_LEN; i++)</div><div class='del'>-	{</div><div class='del'>-		if (lp-&gt;tx_ring[i].skb)</div><div class='del'>-		{</div><div class='del'>-			dev_kfree_skb(lp-&gt;tx_ring[i].skb);</div><div class='del'>-			lp-&gt;tx_ring[i].skb = NULL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	atomic_set(&amp;lp-&gt;tx_count, 0);</div><div class='del'>-	atomic_set(&amp;lp-&gt;tx_ring_head, 0);</div><div class='del'>-	lp-&gt;tx_ring_tail=0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_open	-	handle 'up' of card</div><div class='del'>- *	@dev: device to open</div><div class='del'>- *</div><div class='del'>- *	The user is trying to bring the card into ready state. This requires</div><div class='del'>- *	a brief dialogue with the card. Firstly we enable interrupts and then</div><div class='del'>- *	'indications'. Without these enabled the card doesn't bother telling</div><div class='del'>- *	us what it has done. This had me puzzled for a week.</div><div class='del'>- *</div><div class='del'>- *	We configure the number of card descriptors, then load the network</div><div class='del'>- *	address and multicast filters. Turn on the workaround mode. This</div><div class='del'>- *	works around a bug in the 82586 - it asks the firmware to do</div><div class='del'>- *	so. It has a performance (latency) hit but is needed on busy</div><div class='del'>- *	[read most] lans. We load the ring with buffers then we kick it</div><div class='del'>- *	all off.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int mc32_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int ioaddr = dev-&gt;base_addr;</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	u8 one=1;</div><div class='del'>-	u8 regs;</div><div class='del'>-	u16 descnumbuffs[2] = {TX_RING_LEN, RX_RING_LEN};</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *	Interrupts enabled</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	regs=inb(ioaddr+HOST_CTRL);</div><div class='del'>-	regs|=HOST_CTRL_INTE;</div><div class='del'>-	outb(regs, ioaddr+HOST_CTRL);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *      Allow ourselves to issue commands</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	up(&amp;lp-&gt;cmd_mutex);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *	Send the indications on command</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	mc32_command(dev, 4, &amp;one, 2);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *	Poke it to make sure it's really dead.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	mc32_halt_transceiver(dev);</div><div class='del'>-	mc32_flush_tx_ring(dev);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *	Ask card to set up on-card descriptors to our spec</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if(mc32_command(dev, 8, descnumbuffs, 4)) {</div><div class='del'>-		pr_info("%s: %s rejected our buffer configuration!\n",</div><div class='del'>-	 	       dev-&gt;name, cardname);</div><div class='del'>-		mc32_close(dev);</div><div class='del'>-		return -ENOBUFS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Report new configuration */</div><div class='del'>-	mc32_command(dev, 6, NULL, 0);</div><div class='del'>-</div><div class='del'>-	lp-&gt;tx_chain 		= lp-&gt;exec_box-&gt;data[8];   /* Transmit list start offset */</div><div class='del'>-	lp-&gt;rx_chain 		= lp-&gt;exec_box-&gt;data[10];  /* Receive list start offset */</div><div class='del'>-	lp-&gt;tx_len 		= lp-&gt;exec_box-&gt;data[9];   /* Transmit list count */</div><div class='del'>-	lp-&gt;rx_len 		= lp-&gt;exec_box-&gt;data[11];  /* Receive list count */</div><div class='del'>-</div><div class='del'>-	/* Set Network Address */</div><div class='del'>-	mc32_command(dev, 1, dev-&gt;dev_addr, 6);</div><div class='del'>-</div><div class='del'>-	/* Set the filters */</div><div class='del'>-	mc32_set_multicast_list(dev);</div><div class='del'>-</div><div class='del'>-	if (WORKAROUND_82586) {</div><div class='del'>-		u16 zero_word=0;</div><div class='del'>-		mc32_command(dev, 0x0D, &amp;zero_word, 2);   /* 82586 bug workaround on  */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mc32_load_tx_ring(dev);</div><div class='del'>-</div><div class='del'>-	if(mc32_load_rx_ring(dev))</div><div class='del'>-	{</div><div class='del'>-		mc32_close(dev);</div><div class='del'>-		return -ENOBUFS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	lp-&gt;xceiver_desired_state = RUNNING;</div><div class='del'>-</div><div class='del'>-	/* And finally, set the ball rolling... */</div><div class='del'>-	mc32_start_transceiver(dev);</div><div class='del'>-</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_timeout	-	handle a timeout from the network layer</div><div class='del'>- *	@dev: 3c527 that timed out</div><div class='del'>- *</div><div class='del'>- *	Handle a timeout on transmit from the 3c527. This normally means</div><div class='del'>- *	bad things as the hardware handles cable timeouts and mess for</div><div class='del'>- *	us.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void mc32_timeout(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	pr_warning("%s: transmit timed out?\n", dev-&gt;name);</div><div class='del'>-	/* Try to restart the adaptor. */</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_send_packet	-	queue a frame for transmit</div><div class='del'>- *	@skb: buffer to transmit</div><div class='del'>- *	@dev: 3c527 to send it out of</div><div class='del'>- *</div><div class='del'>- *	Transmit a buffer. This normally means throwing the buffer onto</div><div class='del'>- *	the transmit queue as the queue is quite large. If the queue is</div><div class='del'>- *	full then we set tx_busy and return. Once the interrupt handler</div><div class='del'>- *	gets messages telling it to reclaim transmit queue entries, we will</div><div class='del'>- *	clear tx_busy and the kernel will start calling this again.</div><div class='del'>- *</div><div class='del'>- *      We do not disable interrupts or acquire any locks; this can</div><div class='del'>- *      run concurrently with mc32_tx_ring(), and the function itself</div><div class='del'>- *      is serialised at a higher layer. However, similarly for the</div><div class='del'>- *      card itself, we must ensure that we update tx_ring_head only</div><div class='del'>- *      after we've established a valid packet on the tx ring (and</div><div class='del'>- *      before we let the card "see" it, to prevent it racing with the</div><div class='del'>- *      irq handler).</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static netdev_tx_t mc32_send_packet(struct sk_buff *skb,</div><div class='del'>-				    struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	u32 head = atomic_read(&amp;lp-&gt;tx_ring_head);</div><div class='del'>-</div><div class='del'>-	volatile struct skb_header *p, *np;</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	if(atomic_read(&amp;lp-&gt;tx_count)==0) {</div><div class='del'>-		return NETDEV_TX_BUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (skb_padto(skb, ETH_ZLEN)) {</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	atomic_dec(&amp;lp-&gt;tx_count);</div><div class='del'>-</div><div class='del'>-	/* P is the last sending/sent buffer as a pointer */</div><div class='del'>-	p=lp-&gt;tx_ring[head].p;</div><div class='del'>-</div><div class='del'>-	head = next_tx(head);</div><div class='del'>-</div><div class='del'>-	/* NP is the buffer we will be loading */</div><div class='del'>-	np=lp-&gt;tx_ring[head].p;</div><div class='del'>-</div><div class='del'>-	/* We will need this to flush the buffer out */</div><div class='del'>-	lp-&gt;tx_ring[head].skb=skb;</div><div class='del'>-</div><div class='del'>-	np-&gt;length      = unlikely(skb-&gt;len &lt; ETH_ZLEN) ? ETH_ZLEN : skb-&gt;len;</div><div class='del'>-	np-&gt;data	= isa_virt_to_bus(skb-&gt;data);</div><div class='del'>-	np-&gt;status	= 0;</div><div class='del'>-	np-&gt;control     = CONTROL_EOP | CONTROL_EOL;</div><div class='del'>-	wmb();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The new frame has been setup; we can now</div><div class='del'>-	 * let the interrupt handler and card "see" it</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	atomic_set(&amp;lp-&gt;tx_ring_head, head);</div><div class='del'>-	p-&gt;control     &amp;= ~CONTROL_EOL;</div><div class='del'>-</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_update_stats	-	pull off the on board statistics</div><div class='del'>- *	@dev: 3c527 to service</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- *	Query and reset the on-card stats. There's the small possibility</div><div class='del'>- *	of a race here, which would result in an underestimation of</div><div class='del'>- *	actual errors. As such, we'd prefer to keep all our stats</div><div class='del'>- *	collection in software. As a rule, we do. However it can't be</div><div class='del'>- *	used for rx errors and collisions as, by default, the card discards</div><div class='del'>- *	bad rx packets.</div><div class='del'>- *</div><div class='del'>- *	Setting the SAV BP in the rx filter command supposedly</div><div class='del'>- *	stops this behaviour. However, testing shows that it only seems to</div><div class='del'>- *	enable the collation of on-card rx statistics --- the driver</div><div class='del'>- *	never sees an RX descriptor with an error status set.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void mc32_update_stats(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	volatile struct mc32_stats *st = lp-&gt;stats;</div><div class='del'>-</div><div class='del'>-	u32 rx_errors=0;</div><div class='del'>-</div><div class='del'>-	rx_errors+=dev-&gt;stats.rx_crc_errors   +=st-&gt;rx_crc_errors;</div><div class='del'>-	                                           st-&gt;rx_crc_errors=0;</div><div class='del'>-	rx_errors+=dev-&gt;stats.rx_fifo_errors  +=st-&gt;rx_overrun_errors;</div><div class='del'>-	                                           st-&gt;rx_overrun_errors=0;</div><div class='del'>-	rx_errors+=dev-&gt;stats.rx_frame_errors +=st-&gt;rx_alignment_errors;</div><div class='del'>- 	                                           st-&gt;rx_alignment_errors=0;</div><div class='del'>-	rx_errors+=dev-&gt;stats.rx_length_errors+=st-&gt;rx_tooshort_errors;</div><div class='del'>-	                                           st-&gt;rx_tooshort_errors=0;</div><div class='del'>-	rx_errors+=dev-&gt;stats.rx_missed_errors+=st-&gt;rx_outofresource_errors;</div><div class='del'>-	                                           st-&gt;rx_outofresource_errors=0;</div><div class='del'>-        dev-&gt;stats.rx_errors=rx_errors;</div><div class='del'>-</div><div class='del'>-	/* Number of packets which saw one collision */</div><div class='del'>-	dev-&gt;stats.collisions+=st-&gt;dataC[10];</div><div class='del'>-	st-&gt;dataC[10]=0;</div><div class='del'>-</div><div class='del'>-	/* Number of packets which saw 2--15 collisions */</div><div class='del'>-	dev-&gt;stats.collisions+=st-&gt;dataC[11];</div><div class='del'>-	st-&gt;dataC[11]=0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_rx_ring	-	process the receive ring</div><div class='del'>- *	@dev: 3c527 that needs its receive ring processing</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- *	We have received one or more indications from the card that a</div><div class='del'>- *	receive has completed. The buffer ring thus contains dirty</div><div class='del'>- *	entries. We walk the ring by iterating over the circular rx_ring</div><div class='del'>- *	array, starting at the next dirty buffer (which happens to be the</div><div class='del'>- *	one we finished up at last time around).</div><div class='del'>- *</div><div class='del'>- *	For each completed packet, we will either copy it and pass it up</div><div class='del'>- * 	the stack or, if the packet is near MTU sized, we allocate</div><div class='del'>- *	another buffer and flip the old one up the stack.</div><div class='del'>- *</div><div class='del'>- *	We must succeed in keeping a buffer on the ring. If necessary we</div><div class='del'>- *	will toss a received packet rather than lose a ring entry. Once</div><div class='del'>- *	the first uncompleted descriptor is found, we move the</div><div class='del'>- *	End-Of-List bit to include the buffers just processed.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void mc32_rx_ring(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	volatile struct skb_header *p;</div><div class='del'>-	u16 rx_ring_tail;</div><div class='del'>-	u16 rx_old_tail;</div><div class='del'>-	int x=0;</div><div class='del'>-</div><div class='del'>-	rx_old_tail = rx_ring_tail = lp-&gt;rx_ring_tail;</div><div class='del'>-</div><div class='del'>-	do</div><div class='del'>-	{</div><div class='del'>-		p=lp-&gt;rx_ring[rx_ring_tail].p;</div><div class='del'>-</div><div class='del'>-		if(!(p-&gt;status &amp; (1&lt;&lt;7))) { /* Not COMPLETED */</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if(p-&gt;status &amp; (1&lt;&lt;6)) /* COMPLETED_OK */</div><div class='del'>-		{</div><div class='del'>-</div><div class='del'>-			u16 length=p-&gt;length;</div><div class='del'>-			struct sk_buff *skb;</div><div class='del'>-			struct sk_buff *newskb;</div><div class='del'>-</div><div class='del'>-			/* Try to save time by avoiding a copy on big frames */</div><div class='del'>-</div><div class='del'>-			if ((length &gt; RX_COPYBREAK) &amp;&amp;</div><div class='del'>-			    ((newskb = netdev_alloc_skb(dev, 1532)) != NULL))</div><div class='del'>-			{</div><div class='del'>-				skb=lp-&gt;rx_ring[rx_ring_tail].skb;</div><div class='del'>-				skb_put(skb, length);</div><div class='del'>-</div><div class='del'>-				skb_reserve(newskb,18);</div><div class='del'>-				lp-&gt;rx_ring[rx_ring_tail].skb=newskb;</div><div class='del'>-				p-&gt;data=isa_virt_to_bus(newskb-&gt;data);</div><div class='del'>-			}</div><div class='del'>-			else</div><div class='del'>-			{</div><div class='del'>-				skb = netdev_alloc_skb(dev, length + 2);</div><div class='del'>-</div><div class='del'>-				if(skb==NULL) {</div><div class='del'>-					dev-&gt;stats.rx_dropped++;</div><div class='del'>-					goto dropped;</div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-				skb_reserve(skb,2);</div><div class='del'>-				memcpy(skb_put(skb, length),</div><div class='del'>-				       lp-&gt;rx_ring[rx_ring_tail].skb-&gt;data, length);</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			skb-&gt;protocol=eth_type_trans(skb,dev);</div><div class='del'>- 			dev-&gt;stats.rx_packets++;</div><div class='del'>- 			dev-&gt;stats.rx_bytes += length;</div><div class='del'>-			netif_rx(skb);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	dropped:</div><div class='del'>-		p-&gt;length = 1532;</div><div class='del'>-		p-&gt;status = 0;</div><div class='del'>-</div><div class='del'>-		rx_ring_tail=next_rx(rx_ring_tail);</div><div class='del'>-	}</div><div class='del'>-        while(x++&lt;48);</div><div class='del'>-</div><div class='del'>-	/* If there was actually a frame to be processed, place the EOL bit */</div><div class='del'>-	/* at the descriptor prior to the one to be filled next */</div><div class='del'>-</div><div class='del'>-	if (rx_ring_tail != rx_old_tail)</div><div class='del'>-	{</div><div class='del'>-		lp-&gt;rx_ring[prev_rx(rx_ring_tail)].p-&gt;control |=  CONTROL_EOL;</div><div class='del'>-		lp-&gt;rx_ring[prev_rx(rx_old_tail)].p-&gt;control  &amp;= ~CONTROL_EOL;</div><div class='del'>-</div><div class='del'>-		lp-&gt;rx_ring_tail=rx_ring_tail;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_tx_ring	-	process completed transmits</div><div class='del'>- *	@dev: 3c527 that needs its transmit ring processing</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- *	This operates in a similar fashion to mc32_rx_ring. We iterate</div><div class='del'>- *	over the transmit ring. For each descriptor which has been</div><div class='del'>- *	processed by the card, we free its associated buffer and note</div><div class='del'>- *	any errors. This continues until the transmit ring is emptied</div><div class='del'>- *	or we reach a descriptor that hasn't yet been processed by the</div><div class='del'>- *	card.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void mc32_tx_ring(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	volatile struct skb_header *np;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We rely on head==tail to mean 'queue empty'.</div><div class='del'>-	 * This is why lp-&gt;tx_count=TX_RING_LEN-1: in order to prevent</div><div class='del'>-	 * tx_ring_head wrapping to tail and confusing a 'queue empty'</div><div class='del'>-	 * condition with 'queue full'</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	while (lp-&gt;tx_ring_tail != atomic_read(&amp;lp-&gt;tx_ring_head))</div><div class='del'>-	{</div><div class='del'>-		u16 t;</div><div class='del'>-</div><div class='del'>-		t=next_tx(lp-&gt;tx_ring_tail);</div><div class='del'>-		np=lp-&gt;tx_ring[t].p;</div><div class='del'>-</div><div class='del'>-		if(!(np-&gt;status &amp; (1&lt;&lt;7)))</div><div class='del'>-		{</div><div class='del'>-			/* Not COMPLETED */</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		dev-&gt;stats.tx_packets++;</div><div class='del'>-		if(!(np-&gt;status &amp; (1&lt;&lt;6))) /* Not COMPLETED_OK */</div><div class='del'>-		{</div><div class='del'>-			dev-&gt;stats.tx_errors++;</div><div class='del'>-</div><div class='del'>-			switch(np-&gt;status&amp;0x0F)</div><div class='del'>-			{</div><div class='del'>-				case 1:</div><div class='del'>-					dev-&gt;stats.tx_aborted_errors++;</div><div class='del'>-					break; /* Max collisions */</div><div class='del'>-				case 2:</div><div class='del'>-					dev-&gt;stats.tx_fifo_errors++;</div><div class='del'>-					break;</div><div class='del'>-				case 3:</div><div class='del'>-					dev-&gt;stats.tx_carrier_errors++;</div><div class='del'>-					break;</div><div class='del'>-				case 4:</div><div class='del'>-					dev-&gt;stats.tx_window_errors++;</div><div class='del'>-					break;  /* CTS Lost */</div><div class='del'>-				case 5:</div><div class='del'>-					dev-&gt;stats.tx_aborted_errors++;</div><div class='del'>-					break; /* Transmit timeout */</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		/* Packets are sent in order - this is</div><div class='del'>-		    basically a FIFO queue of buffers matching</div><div class='del'>-		    the card ring */</div><div class='del'>-		dev-&gt;stats.tx_bytes+=lp-&gt;tx_ring[t].skb-&gt;len;</div><div class='del'>-		dev_kfree_skb_irq(lp-&gt;tx_ring[t].skb);</div><div class='del'>-		lp-&gt;tx_ring[t].skb=NULL;</div><div class='del'>-		atomic_inc(&amp;lp-&gt;tx_count);</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-</div><div class='del'>-		lp-&gt;tx_ring_tail=t;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_interrupt		-	handle an interrupt from a 3c527</div><div class='del'>- *	@irq: Interrupt number</div><div class='del'>- *	@dev_id: 3c527 that requires servicing</div><div class='del'>- *	@regs: Registers (unused)</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- *	An interrupt is raised whenever the 3c527 writes to the command</div><div class='del'>- *	register. This register contains the message it wishes to send us</div><div class='del'>- *	packed into a single byte field. We keep reading status entries</div><div class='del'>- *	until we have processed all the control items, but simply count</div><div class='del'>- *	transmit and receive reports. When all reports are in we empty the</div><div class='del'>- *	transceiver rings as appropriate. This saves the overhead of</div><div class='del'>- *	multiple command requests.</div><div class='del'>- *</div><div class='del'>- *	Because MCA is level-triggered, we shouldn't miss indications.</div><div class='del'>- *	Therefore, we needn't ask the card to suspend interrupts within</div><div class='del'>- *	this handler. The card receives an implicit acknowledgment of the</div><div class='del'>- *	current interrupt when we read the command register.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static irqreturn_t mc32_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = dev_id;</div><div class='del'>-	struct mc32_local *lp;</div><div class='del'>-	int ioaddr, status, boguscount = 0;</div><div class='del'>-	int rx_event = 0;</div><div class='del'>-	int tx_event = 0;</div><div class='del'>-</div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='del'>-	lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* See whats cooking */</div><div class='del'>-</div><div class='del'>-	while((inb(ioaddr+HOST_STATUS)&amp;HOST_STATUS_CWR) &amp;&amp; boguscount++&lt;2000)</div><div class='del'>-	{</div><div class='del'>-		status=inb(ioaddr+HOST_CMD);</div><div class='del'>-</div><div class='del'>-		pr_debug("Status TX%d RX%d EX%d OV%d BC%d\n",</div><div class='del'>-			(status&amp;7), (status&gt;&gt;3)&amp;7, (status&gt;&gt;6)&amp;1,</div><div class='del'>-			(status&gt;&gt;7)&amp;1, boguscount);</div><div class='del'>-</div><div class='del'>-		switch(status&amp;7)</div><div class='del'>-		{</div><div class='del'>-			case 0:</div><div class='del'>-				break;</div><div class='del'>-			case 6: /* TX fail */</div><div class='del'>-			case 2:	/* TX ok */</div><div class='del'>-				tx_event = 1;</div><div class='del'>-				break;</div><div class='del'>-			case 3: /* Halt */</div><div class='del'>-			case 4: /* Abort */</div><div class='del'>-				complete(&amp;lp-&gt;xceiver_cmd);</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				pr_notice("%s: strange tx ack %d\n", dev-&gt;name, status&amp;7);</div><div class='del'>-		}</div><div class='del'>-		status&gt;&gt;=3;</div><div class='del'>-		switch(status&amp;7)</div><div class='del'>-		{</div><div class='del'>-			case 0:</div><div class='del'>-				break;</div><div class='del'>-			case 2:	/* RX */</div><div class='del'>-				rx_event=1;</div><div class='del'>-				break;</div><div class='del'>-			case 3: /* Halt */</div><div class='del'>-			case 4: /* Abort */</div><div class='del'>-				complete(&amp;lp-&gt;xceiver_cmd);</div><div class='del'>-				break;</div><div class='del'>-			case 6:</div><div class='del'>-				/* Out of RX buffers stat */</div><div class='del'>-				/* Must restart rx */</div><div class='del'>-				dev-&gt;stats.rx_dropped++;</div><div class='del'>-				mc32_rx_ring(dev);</div><div class='del'>-				mc32_start_transceiver(dev);</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				pr_notice("%s: strange rx ack %d\n",</div><div class='del'>-					dev-&gt;name, status&amp;7);</div><div class='del'>-		}</div><div class='del'>-		status&gt;&gt;=3;</div><div class='del'>-		if(status&amp;1)</div><div class='del'>-		{</div><div class='del'>-			/*</div><div class='del'>-			 * No thread is waiting: we need to tidy</div><div class='del'>-			 * up ourself.</div><div class='del'>-			 */</div><div class='del'>-</div><div class='del'>-			if (lp-&gt;cmd_nonblocking) {</div><div class='del'>-				up(&amp;lp-&gt;cmd_mutex);</div><div class='del'>-				if (lp-&gt;mc_reload_wait)</div><div class='del'>-					mc32_reset_multicast_list(dev);</div><div class='del'>-			}</div><div class='del'>-			else complete(&amp;lp-&gt;execution_cmd);</div><div class='del'>-		}</div><div class='del'>-		if(status&amp;2)</div><div class='del'>-		{</div><div class='del'>-			/*</div><div class='del'>-			 *	We get interrupted once per</div><div class='del'>-			 *	counter that is about to overflow.</div><div class='del'>-			 */</div><div class='del'>-</div><div class='del'>-			mc32_update_stats(dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *	Process the transmit and receive rings</div><div class='del'>-         */</div><div class='del'>-</div><div class='del'>-	if(tx_event)</div><div class='del'>-		mc32_tx_ring(dev);</div><div class='del'>-</div><div class='del'>-	if(rx_event)</div><div class='del'>-		mc32_rx_ring(dev);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_close	-	user configuring the 3c527 down</div><div class='del'>- *	@dev: 3c527 card to shut down</div><div class='del'>- *</div><div class='del'>- *	The 3c527 is a bus mastering device. We must be careful how we</div><div class='del'>- *	shut it down. It may also be running shared interrupt so we have</div><div class='del'>- *	to be sure to silence it properly</div><div class='del'>- *</div><div class='del'>- *	We indicate that the card is closing to the rest of the</div><div class='del'>- *	driver.  Otherwise, it is possible that the card may run out</div><div class='del'>- *	of receive buffers and restart the transceiver while we're</div><div class='del'>- *	trying to close it.</div><div class='del'>- *</div><div class='del'>- *	We abort any receive and transmits going on and then wait until</div><div class='del'>- *	any pending exec commands have completed in other code threads.</div><div class='del'>- *	In theory we can't get here while that is true, in practice I am</div><div class='del'>- *	paranoid</div><div class='del'>- *</div><div class='del'>- *	We turn off the interrupt enable for the board to be sure it can't</div><div class='del'>- *	intefere with other devices.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int mc32_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	int ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-	u8 regs;</div><div class='del'>-	u16 one=1;</div><div class='del'>-</div><div class='del'>-	lp-&gt;xceiver_desired_state = HALTED;</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *	Send the indications on command (handy debug check)</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	mc32_command(dev, 4, &amp;one, 2);</div><div class='del'>-</div><div class='del'>-	/* Shut down the transceiver */</div><div class='del'>-</div><div class='del'>-	mc32_halt_transceiver(dev);</div><div class='del'>-</div><div class='del'>-	/* Ensure we issue no more commands beyond this point */</div><div class='del'>-</div><div class='del'>-	down(&amp;lp-&gt;cmd_mutex);</div><div class='del'>-</div><div class='del'>-	/* Ok the card is now stopping */</div><div class='del'>-</div><div class='del'>-	regs=inb(ioaddr+HOST_CTRL);</div><div class='del'>-	regs&amp;=~HOST_CTRL_INTE;</div><div class='del'>-	outb(regs, ioaddr+HOST_CTRL);</div><div class='del'>-</div><div class='del'>-	mc32_flush_rx_ring(dev);</div><div class='del'>-	mc32_flush_tx_ring(dev);</div><div class='del'>-</div><div class='del'>-	mc32_update_stats(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_get_stats		-	hand back stats to network layer</div><div class='del'>- *	@dev: The 3c527 card to handle</div><div class='del'>- *</div><div class='del'>- *	We've collected all the stats we can in software already. Now</div><div class='del'>- *	it's time to update those kept on-card and return the lot.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static struct net_device_stats *mc32_get_stats(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	mc32_update_stats(dev);</div><div class='del'>-	return &amp;dev-&gt;stats;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	do_mc32_set_multicast_list	-	attempt to update multicasts</div><div class='del'>- *	@dev: 3c527 device to load the list on</div><div class='del'>- *	@retry: indicates this is not the first call.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * 	Actually set or clear the multicast filter for this adaptor. The</div><div class='del'>- *	locking issues are handled by this routine. We have to track</div><div class='del'>- *	state as it may take multiple calls to get the command sequence</div><div class='del'>- *	completed. We just keep trying to schedule the loads until we</div><div class='del'>- *	manage to process them all.</div><div class='del'>- *</div><div class='del'>- *	num_addrs == -1	Promiscuous mode, receive all packets</div><div class='del'>- *</div><div class='del'>- *	num_addrs == 0	Normal mode, clear multicast list</div><div class='del'>- *</div><div class='del'>- *	num_addrs &gt; 0	Multicast mode, receive normal and MC packets,</div><div class='del'>- *			and do best-effort filtering.</div><div class='del'>- *</div><div class='del'>- *	See mc32_update_stats() regards setting the SAV BP bit.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void do_mc32_set_multicast_list(struct net_device *dev, int retry)</div><div class='del'>-{</div><div class='del'>-	struct mc32_local *lp = netdev_priv(dev);</div><div class='del'>-	u16 filt = (1&lt;&lt;2); /* Save Bad Packets, for stats purposes */</div><div class='del'>-</div><div class='del'>-	if ((dev-&gt;flags&amp;IFF_PROMISC) ||</div><div class='del'>-	    (dev-&gt;flags&amp;IFF_ALLMULTI) ||</div><div class='del'>-	    netdev_mc_count(dev) &gt; 10)</div><div class='del'>-		/* Enable promiscuous mode */</div><div class='del'>-		filt |= 1;</div><div class='del'>-	else if (!netdev_mc_empty(dev))</div><div class='del'>-	{</div><div class='del'>-		unsigned char block[62];</div><div class='del'>-		unsigned char *bp;</div><div class='del'>-		struct netdev_hw_addr *ha;</div><div class='del'>-</div><div class='del'>-		if(retry==0)</div><div class='del'>-			lp-&gt;mc_list_valid = 0;</div><div class='del'>-		if(!lp-&gt;mc_list_valid)</div><div class='del'>-		{</div><div class='del'>-			block[1]=0;</div><div class='del'>-			block[0]=netdev_mc_count(dev);</div><div class='del'>-			bp=block+2;</div><div class='del'>-</div><div class='del'>-			netdev_for_each_mc_addr(ha, dev) {</div><div class='del'>-				memcpy(bp, ha-&gt;addr, 6);</div><div class='del'>-				bp+=6;</div><div class='del'>-			}</div><div class='del'>-			if(mc32_command_nowait(dev, 2, block,</div><div class='del'>-					       2+6*netdev_mc_count(dev))==-1)</div><div class='del'>-			{</div><div class='del'>-				lp-&gt;mc_reload_wait = 1;</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-			lp-&gt;mc_list_valid=1;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(mc32_command_nowait(dev, 0, &amp;filt, 2)==-1)</div><div class='del'>-	{</div><div class='del'>-		lp-&gt;mc_reload_wait = 1;</div><div class='del'>-	}</div><div class='del'>-	else {</div><div class='del'>-		lp-&gt;mc_reload_wait = 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_set_multicast_list	-	queue multicast list update</div><div class='del'>- *	@dev: The 3c527 to use</div><div class='del'>- *</div><div class='del'>- *	Commence loading the multicast list. This is called when the kernel</div><div class='del'>- *	changes the lists. It will override any pending list we are trying to</div><div class='del'>- *	load.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void mc32_set_multicast_list(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	do_mc32_set_multicast_list(dev,0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	mc32_reset_multicast_list	-	reset multicast list</div><div class='del'>- *	@dev: The 3c527 to use</div><div class='del'>- *</div><div class='del'>- *	Attempt the next step in loading the multicast lists. If this attempt</div><div class='del'>- *	fails to complete then it will be scheduled and this function called</div><div class='del'>- *	again later from elsewhere.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void mc32_reset_multicast_list(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	do_mc32_set_multicast_list(dev,1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void netdev_get_drvinfo(struct net_device *dev,</div><div class='del'>-			       struct ethtool_drvinfo *info)</div><div class='del'>-{</div><div class='del'>-	strcpy(info-&gt;driver, DRV_NAME);</div><div class='del'>-	strcpy(info-&gt;version, DRV_VERSION);</div><div class='del'>-	sprintf(info-&gt;bus_info, "MCA 0x%lx", dev-&gt;base_addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 netdev_get_msglevel(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	return mc32_debug;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void netdev_set_msglevel(struct net_device *dev, u32 level)</div><div class='del'>-{</div><div class='del'>-	mc32_debug = level;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct ethtool_ops netdev_ethtool_ops = {</div><div class='del'>-	.get_drvinfo		= netdev_get_drvinfo,</div><div class='del'>-	.get_msglevel		= netdev_get_msglevel,</div><div class='del'>-	.set_msglevel		= netdev_set_msglevel,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='del'>-</div><div class='del'>-static struct net_device *this_device;</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	init_module		-	entry point</div><div class='del'>- *</div><div class='del'>- *	Probe and locate a 3c527 card. This really should probe and locate</div><div class='del'>- *	all the 3c527 cards in the machine not just one of them. Yes you can</div><div class='del'>- *	insmod multiple modules for now but it's a hack.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-int __init init_module(void)</div><div class='del'>-{</div><div class='del'>-	this_device = mc32_probe(-1);</div><div class='del'>-	if (IS_ERR(this_device))</div><div class='del'>-		return PTR_ERR(this_device);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *	cleanup_module	-	free resources for an unload</div><div class='del'>- *</div><div class='del'>- *	Unloading time. We release the MCA bus resources and the interrupt</div><div class='del'>- *	at which point everything is ready to unload. The card must be stopped</div><div class='del'>- *	at this point or we would not have been called. When we unload we</div><div class='del'>- *	leave the card stopped but not totally shut down. When the card is</div><div class='del'>- *	initialized it must be rebooted or the rings reloaded before any</div><div class='del'>- *	transmit operations are allowed to start scribbling into memory.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-void __exit cleanup_module(void)</div><div class='del'>-{</div><div class='del'>-	unregister_netdev(this_device);</div><div class='del'>-	cleanup_card(this_device);</div><div class='del'>-	free_netdev(this_device);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif /* MODULE */</div><div class='head'>diff --git a/drivers/net/ethernet/i825xx/3c527.h b/drivers/net/ethernet/i825xx/3c527.h<br/>deleted file mode 100644<br/>index d693b8d15cde..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/i825xx/3c527.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/i825xx/3c527.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,81 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *	3COM "EtherLink MC/32" Descriptions</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	Registers</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define HOST_CMD		0</div><div class='del'>-#define         HOST_CMD_START_RX   (1&lt;&lt;3)</div><div class='del'>-#define         HOST_CMD_SUSPND_RX  (3&lt;&lt;3)</div><div class='del'>-#define         HOST_CMD_RESTRT_RX  (5&lt;&lt;3)</div><div class='del'>-</div><div class='del'>-#define         HOST_CMD_SUSPND_TX  3</div><div class='del'>-#define         HOST_CMD_RESTRT_TX  5</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define HOST_STATUS		2</div><div class='del'>-#define		HOST_STATUS_CRR	(1&lt;&lt;6)</div><div class='del'>-#define		HOST_STATUS_CWR	(1&lt;&lt;5)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define HOST_CTRL		6</div><div class='del'>-#define		HOST_CTRL_ATTN	(1&lt;&lt;7)</div><div class='del'>-#define 	HOST_CTRL_RESET	(1&lt;&lt;6)</div><div class='del'>-#define 	HOST_CTRL_INTE	(1&lt;&lt;2)</div><div class='del'>-</div><div class='del'>-#define HOST_RAMPAGE		8</div><div class='del'>-</div><div class='del'>-#define HALTED 0</div><div class='del'>-#define RUNNING 1</div><div class='del'>-</div><div class='del'>-struct mc32_mailbox</div><div class='del'>-{</div><div class='del'>- 	u16 mbox;</div><div class='del'>- 	u16 data[1];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct skb_header</div><div class='del'>-{</div><div class='del'>-	u8 status;</div><div class='del'>-	u8 control;</div><div class='del'>-	u16 next;	/* Do not change! */</div><div class='del'>-	u16 length;</div><div class='del'>-	u32 data;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct mc32_stats</div><div class='del'>-{</div><div class='del'>-	/* RX Errors */</div><div class='del'>-	u32 rx_crc_errors;</div><div class='del'>-	u32 rx_alignment_errors;</div><div class='del'>-	u32 rx_overrun_errors;</div><div class='del'>-	u32 rx_tooshort_errors;</div><div class='del'>-	u32 rx_toolong_errors;</div><div class='del'>-	u32 rx_outofresource_errors;</div><div class='del'>-</div><div class='del'>-	u32 rx_discarded;  /* via card pattern match filter */</div><div class='del'>-</div><div class='del'>-	/* TX Errors */</div><div class='del'>-	u32 tx_max_collisions;</div><div class='del'>-	u32 tx_carrier_errors;</div><div class='del'>-	u32 tx_underrun_errors;</div><div class='del'>-	u32 tx_cts_errors;</div><div class='del'>-	u32 tx_timeout_errors;</div><div class='del'>-</div><div class='del'>-	/* various cruft */</div><div class='del'>-	u32 dataA[6];</div><div class='del'>-	u16 dataB[5];</div><div class='del'>-	u32 dataC[14];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-#define STATUS_MASK	0x0F</div><div class='del'>-#define COMPLETED	(1&lt;&lt;7)</div><div class='del'>-#define COMPLETED_OK	(1&lt;&lt;6)</div><div class='del'>-#define BUFFER_BUSY	(1&lt;&lt;5)</div><div class='del'>-</div><div class='del'>-#define CONTROL_EOP	(1&lt;&lt;7)	/* End Of Packet */</div><div class='del'>-#define CONTROL_EOL	(1&lt;&lt;6)	/* End of List */</div><div class='del'>-</div><div class='del'>-#define MCA_MC32_ID	0x0041	/* Our MCA ident */</div><div class='head'>diff --git a/drivers/net/ethernet/i825xx/Kconfig b/drivers/net/ethernet/i825xx/Kconfig<br/>index ca1ae985c6df..fed5080a6b62 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/i825xx/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/i825xx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/i825xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/i825xx/Kconfig</a></div><div class='hunk'>@@ -43,28 +43,6 @@ config EL16</div><div class='ctx'> 	  To compile this driver as a module, choose M here. The module</div><div class='ctx'> 	  will be called 3c507.</div><div class='ctx'> </div><div class='del'>-config ELMC</div><div class='del'>-	tristate "3c523 \"EtherLink/MC\" support"</div><div class='del'>-	depends on MCA_LEGACY</div><div class='del'>-	---help---</div><div class='del'>-	  If you have a network (Ethernet) card of this type, say Y and read</div><div class='del'>-	  the Ethernet-HOWTO, available from</div><div class='del'>-	  &lt;http://www.tldp.org/docs.html#howto&gt;.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here. The module</div><div class='del'>-	  will be called 3c523.</div><div class='del'>-</div><div class='del'>-config ELMC_II</div><div class='del'>-	tristate "3c527 \"EtherLink/MC 32\" support (EXPERIMENTAL)"</div><div class='del'>-	depends on MCA &amp;&amp; MCA_LEGACY</div><div class='del'>-	---help---</div><div class='del'>-	  If you have a network (Ethernet) card of this type, say Y and read</div><div class='del'>-	  the Ethernet-HOWTO, available from</div><div class='del'>-	  &lt;http://www.tldp.org/docs.html#howto&gt;.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here. The module</div><div class='del'>-	  will be called 3c527.</div><div class='del'>-</div><div class='ctx'> config ARM_ETHER1</div><div class='ctx'> 	tristate "Acorn Ether1 support"</div><div class='ctx'> 	depends on ARM &amp;&amp; ARCH_ACORN</div><div class='head'>diff --git a/drivers/net/ethernet/i825xx/Makefile b/drivers/net/ethernet/i825xx/Makefile<br/>index f68a3694968a..6adff85e8ecc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/i825xx/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/i825xx/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/i825xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/i825xx/Makefile</a></div><div class='hunk'>@@ -7,8 +7,6 @@ obj-$(CONFIG_EEXPRESS) += eexpress.o</div><div class='ctx'> obj-$(CONFIG_EEXPRESS_PRO) += eepro.o</div><div class='ctx'> obj-$(CONFIG_ELPLUS) += 3c505.o</div><div class='ctx'> obj-$(CONFIG_EL16) += 3c507.o</div><div class='del'>-obj-$(CONFIG_ELMC) += 3c523.o</div><div class='del'>-obj-$(CONFIG_ELMC_II) += 3c527.o</div><div class='ctx'> obj-$(CONFIG_LP486E) += lp486e.o</div><div class='ctx'> obj-$(CONFIG_NI52) += ni52.o</div><div class='ctx'> obj-$(CONFIG_SUN3_82586) += sun3_82586.o</div><div class='head'>diff --git a/drivers/net/ethernet/i825xx/eexpress.c b/drivers/net/ethernet/i825xx/eexpress.c<br/>index cc2e66ad4436..7a6a2f04c5b1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/i825xx/eexpress.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/i825xx/eexpress.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/i825xx/eexpress.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/i825xx/eexpress.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'>  * Many modifications, and currently maintained, by</div><div class='ctx'>  *  Philip Blundell &lt;philb@gnu.org&gt;</div><div class='ctx'>  * Added the Compaq LTE  Alan Cox &lt;alan@lxorguk.ukuu.org.uk&gt;</div><div class='del'>- * Added MCA support Adam Fritzler</div><div class='add'>+ * Added MCA support Adam Fritzler (now deleted)</div><div class='ctx'>  *</div><div class='ctx'>  * Note - this driver is experimental still - it has problems on faster</div><div class='ctx'>  * machines. Someone needs to sit down and go through it line by line with</div><div class='hunk'>@@ -111,7 +111,6 @@</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/mca-legacy.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;</div><div class='hunk'>@@ -227,16 +226,6 @@ static unsigned short start_code[] = {</div><div class='ctx'> /* maps irq number to EtherExpress magic value */</div><div class='ctx'> static char irqrmap[] = { 0,0,1,2,3,4,0,0,0,1,5,6,0,0,0,0 };</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-/* mapping of the first four bits of the second POS register */</div><div class='del'>-static unsigned short mca_iomap[] = {</div><div class='del'>-	0x270, 0x260, 0x250, 0x240, 0x230, 0x220, 0x210, 0x200,</div><div class='del'>-	0x370, 0x360, 0x350, 0x340, 0x330, 0x320, 0x310, 0x300</div><div class='del'>-};</div><div class='del'>-/* bits 5-7 of the second POS register */</div><div class='del'>-static char mca_irqmap[] = { 12, 9, 3, 4, 5, 10, 11, 15 };</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Prototypes for Linux interface</div><div class='ctx'>  */</div><div class='hunk'>@@ -340,53 +329,6 @@ static int __init do_express_probe(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;if_port = 0xff; /* not set */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-	if (MCA_bus) {</div><div class='del'>-		int slot = 0;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Only find one card at a time.  Subsequent calls</div><div class='del'>-		 * will find others, however, proper multicard MCA</div><div class='del'>-		 * probing and setup can't be done with the</div><div class='del'>-		 * old-style Space.c init routines.  -- ASF</div><div class='del'>-		 */</div><div class='del'>-		while (slot != MCA_NOTFOUND) {</div><div class='del'>-			int pos0, pos1;</div><div class='del'>-</div><div class='del'>-			slot = mca_find_unused_adapter(0x628B, slot);</div><div class='del'>-			if (slot == MCA_NOTFOUND)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			pos0 = mca_read_stored_pos(slot, 2);</div><div class='del'>-			pos1 = mca_read_stored_pos(slot, 3);</div><div class='del'>-			ioaddr = mca_iomap[pos1&amp;0xf];</div><div class='del'>-</div><div class='del'>-			dev-&gt;irq = mca_irqmap[(pos1&gt;&gt;4)&amp;0x7];</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * XXX: Transceiver selection is done</div><div class='del'>-			 * differently on the MCA version.</div><div class='del'>-			 * How to get it to select something</div><div class='del'>-			 * other than external/AUI is currently</div><div class='del'>-			 * unknown.  This code is just for looks. -- ASF</div><div class='del'>-			 */</div><div class='del'>-			if ((pos0 &amp; 0x7) == 0x1)</div><div class='del'>-				dev-&gt;if_port = AUI;</div><div class='del'>-			else if ((pos0 &amp; 0x7) == 0x5) {</div><div class='del'>-				if (pos1 &amp; 0x80)</div><div class='del'>-					dev-&gt;if_port = BNC;</div><div class='del'>-				else</div><div class='del'>-					dev-&gt;if_port = TPE;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			mca_set_adapter_name(slot, "Intel EtherExpress 16 MCA");</div><div class='del'>-			mca_set_adapter_procfn(slot, NULL, dev);</div><div class='del'>-			mca_mark_as_used(slot);</div><div class='del'>-</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='ctx'> 	if (ioaddr&amp;0xfe00) {</div><div class='ctx'> 		if (!request_region(ioaddr, EEXP_IO_EXTENT, "EtherExpress"))</div><div class='ctx'> 			return -EBUSY;</div><div class='head'>diff --git a/drivers/net/ethernet/ibm/ehea/ehea_main.c b/drivers/net/ethernet/ibm/ehea/ehea_main.c<br/>index 3516e17a399d..f4d2da0db1b1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/ibm/ehea/ehea_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/ibm/ehea/ehea_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/ibm/ehea/ehea_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/ibm/ehea/ehea_main.c</a></div><div class='hunk'>@@ -290,16 +290,18 @@ static void ehea_update_bcmc_registrations(void)</div><div class='ctx'> </div><div class='ctx'> 				arr[i].adh = adapter-&gt;handle;</div><div class='ctx'> 				arr[i].port_id = port-&gt;logical_port_id;</div><div class='del'>-				arr[i].reg_type = EHEA_BCMC_SCOPE_ALL |</div><div class='del'>-						  EHEA_BCMC_MULTICAST |</div><div class='add'>+				arr[i].reg_type = EHEA_BCMC_MULTICAST |</div><div class='ctx'> 						  EHEA_BCMC_UNTAGGED;</div><div class='add'>+				if (mc_entry-&gt;macaddr == 0)</div><div class='add'>+					arr[i].reg_type |= EHEA_BCMC_SCOPE_ALL;</div><div class='ctx'> 				arr[i++].macaddr = mc_entry-&gt;macaddr;</div><div class='ctx'> </div><div class='ctx'> 				arr[i].adh = adapter-&gt;handle;</div><div class='ctx'> 				arr[i].port_id = port-&gt;logical_port_id;</div><div class='del'>-				arr[i].reg_type = EHEA_BCMC_SCOPE_ALL |</div><div class='del'>-						  EHEA_BCMC_MULTICAST |</div><div class='add'>+				arr[i].reg_type = EHEA_BCMC_MULTICAST |</div><div class='ctx'> 						  EHEA_BCMC_VLANID_ALL;</div><div class='add'>+				if (mc_entry-&gt;macaddr == 0)</div><div class='add'>+					arr[i].reg_type |= EHEA_BCMC_SCOPE_ALL;</div><div class='ctx'> 				arr[i++].macaddr = mc_entry-&gt;macaddr;</div><div class='ctx'> 				num_registrations -= 2;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1838,8 +1840,9 @@ static u64 ehea_multicast_reg_helper(struct ehea_port *port, u64 mc_mac_addr,</div><div class='ctx'> 	u64 hret;</div><div class='ctx'> 	u8 reg_type;</div><div class='ctx'> </div><div class='del'>-	reg_type = EHEA_BCMC_SCOPE_ALL | EHEA_BCMC_MULTICAST</div><div class='del'>-		 | EHEA_BCMC_UNTAGGED;</div><div class='add'>+	reg_type = EHEA_BCMC_MULTICAST | EHEA_BCMC_UNTAGGED;</div><div class='add'>+	if (mc_mac_addr == 0)</div><div class='add'>+		reg_type |= EHEA_BCMC_SCOPE_ALL;</div><div class='ctx'> </div><div class='ctx'> 	hret = ehea_h_reg_dereg_bcmc(port-&gt;adapter-&gt;handle,</div><div class='ctx'> 				     port-&gt;logical_port_id,</div><div class='hunk'>@@ -1847,8 +1850,9 @@ static u64 ehea_multicast_reg_helper(struct ehea_port *port, u64 mc_mac_addr,</div><div class='ctx'> 	if (hret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	reg_type = EHEA_BCMC_SCOPE_ALL | EHEA_BCMC_MULTICAST</div><div class='del'>-		 | EHEA_BCMC_VLANID_ALL;</div><div class='add'>+	reg_type = EHEA_BCMC_MULTICAST | EHEA_BCMC_VLANID_ALL;</div><div class='add'>+	if (mc_mac_addr == 0)</div><div class='add'>+		reg_type |= EHEA_BCMC_SCOPE_ALL;</div><div class='ctx'> </div><div class='ctx'> 	hret = ehea_h_reg_dereg_bcmc(port-&gt;adapter-&gt;handle,</div><div class='ctx'> 				     port-&gt;logical_port_id,</div><div class='hunk'>@@ -1898,7 +1902,7 @@ static void ehea_allmulti(struct net_device *dev, int enable)</div><div class='ctx'> 				netdev_err(dev,</div><div class='ctx'> 					   "failed enabling IFF_ALLMULTI\n");</div><div class='ctx'> 		}</div><div class='del'>-	} else</div><div class='add'>+	} else {</div><div class='ctx'> 		if (!enable) {</div><div class='ctx'> 			/* Disable ALLMULTI */</div><div class='ctx'> 			hret = ehea_multicast_reg_helper(port, 0, H_DEREG_BCMC);</div><div class='hunk'>@@ -1908,6 +1912,7 @@ static void ehea_allmulti(struct net_device *dev, int enable)</div><div class='ctx'> 				netdev_err(dev,</div><div class='ctx'> 					   "failed disabling IFF_ALLMULTI\n");</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ehea_add_multicast_entry(struct ehea_port *port, u8 *mc_mac_addr)</div><div class='hunk'>@@ -1941,11 +1946,7 @@ static void ehea_set_multicast_list(struct net_device *dev)</div><div class='ctx'> 	struct netdev_hw_addr *ha;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (port-&gt;promisc) {</div><div class='del'>-		ehea_promiscuous(dev, 1);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	ehea_promiscuous(dev, 0);</div><div class='add'>+	ehea_promiscuous(dev, !!(dev-&gt;flags &amp; IFF_PROMISC));</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;flags &amp; IFF_ALLMULTI) {</div><div class='ctx'> 		ehea_allmulti(dev, 1);</div><div class='hunk'>@@ -2463,6 +2464,7 @@ static int ehea_down(struct net_device *dev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ehea_drop_multicast_list(dev);</div><div class='add'>+	ehea_allmulti(dev, 0);</div><div class='ctx'> 	ehea_broadcast_reg_helper(port, H_DEREG_BCMC);</div><div class='ctx'> </div><div class='ctx'> 	ehea_free_interrupts(dev);</div><div class='hunk'>@@ -3261,6 +3263,7 @@ static int __devinit ehea_probe_adapter(struct platform_device *dev,</div><div class='ctx'> 	struct ehea_adapter *adapter;</div><div class='ctx'> 	const u64 *adapter_handle;</div><div class='ctx'> 	int ret;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!dev || !dev-&gt;dev.of_node) {</div><div class='ctx'> 		pr_err("Invalid ibmebus device probed\n");</div><div class='hunk'>@@ -3314,17 +3317,9 @@ static int __devinit ehea_probe_adapter(struct platform_device *dev,</div><div class='ctx'> 	tasklet_init(&amp;adapter-&gt;neq_tasklet, ehea_neq_tasklet,</div><div class='ctx'> 		     (unsigned long)adapter);</div><div class='ctx'> </div><div class='del'>-	ret = ibmebus_request_irq(adapter-&gt;neq-&gt;attr.ist1,</div><div class='del'>-				  ehea_interrupt_neq, IRQF_DISABLED,</div><div class='del'>-				  "ehea_neq", adapter);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(&amp;dev-&gt;dev, "requesting NEQ IRQ failed\n");</div><div class='del'>-		goto out_kill_eq;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	ret = ehea_create_device_sysfs(dev);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out_free_irq;</div><div class='add'>+		goto out_kill_eq;</div><div class='ctx'> </div><div class='ctx'> 	ret = ehea_setup_ports(adapter);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -3332,15 +3327,30 @@ static int __devinit ehea_probe_adapter(struct platform_device *dev,</div><div class='ctx'> 		goto out_rem_dev_sysfs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = ibmebus_request_irq(adapter-&gt;neq-&gt;attr.ist1,</div><div class='add'>+				  ehea_interrupt_neq, IRQF_DISABLED,</div><div class='add'>+				  "ehea_neq", adapter);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "requesting NEQ IRQ failed\n");</div><div class='add'>+		goto out_shutdown_ports;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Handle any events that might be pending. */</div><div class='add'>+	tasklet_hi_schedule(&amp;adapter-&gt;neq_tasklet);</div><div class='add'>+</div><div class='ctx'> 	ret = 0;</div><div class='ctx'> 	goto out;</div><div class='ctx'> </div><div class='add'>+out_shutdown_ports:</div><div class='add'>+	for (i = 0; i &lt; EHEA_MAX_PORTS; i++)</div><div class='add'>+		if (adapter-&gt;port[i]) {</div><div class='add'>+			ehea_shutdown_single_port(adapter-&gt;port[i]);</div><div class='add'>+			adapter-&gt;port[i] = NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> out_rem_dev_sysfs:</div><div class='ctx'> 	ehea_remove_device_sysfs(dev);</div><div class='ctx'> </div><div class='del'>-out_free_irq:</div><div class='del'>-	ibmebus_free_irq(adapter-&gt;neq-&gt;attr.ist1, adapter);</div><div class='del'>-</div><div class='ctx'> out_kill_eq:</div><div class='ctx'> 	ehea_destroy_eq(adapter-&gt;neq);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/ibm/ehea/ehea_phyp.h b/drivers/net/ethernet/ibm/ehea/ehea_phyp.h<br/>index 52c456ec4d6c..8364815c32ff 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/ibm/ehea/ehea_phyp.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/ibm/ehea/ehea_phyp.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/ibm/ehea/ehea_phyp.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/ibm/ehea/ehea_phyp.h</a></div><div class='hunk'>@@ -450,7 +450,7 @@ u64 ehea_h_modify_ehea_port(const u64 adapter_handle, const u16 port_num,</div><div class='ctx'> 			    void *cb_addr);</div><div class='ctx'> </div><div class='ctx'> #define H_REGBCMC_PN            EHEA_BMASK_IBM(48, 63)</div><div class='del'>-#define H_REGBCMC_REGTYPE       EHEA_BMASK_IBM(61, 63)</div><div class='add'>+#define H_REGBCMC_REGTYPE       EHEA_BMASK_IBM(60, 63)</div><div class='ctx'> #define H_REGBCMC_MACADDR       EHEA_BMASK_IBM(16, 63)</div><div class='ctx'> #define H_REGBCMC_VLANID        EHEA_BMASK_IBM(52, 63)</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/Kconfig b/drivers/net/ethernet/intel/Kconfig<br/>index 76213162fbe3..79b07ec6726f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/Kconfig</a></div><div class='hunk'>@@ -7,7 +7,7 @@ config NET_VENDOR_INTEL</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on PCI || PCI_MSI || ISA || ISA_DMA_API || ARM || \</div><div class='ctx'> 		   ARCH_ACORN || MCA || MCA_LEGACY || SNI_RM || SUN3 || \</div><div class='del'>-		   GSC || BVME6000 || MVME16x || ARCH_ENP2611 || \</div><div class='add'>+		   GSC || BVME6000 || MVME16x || \</div><div class='ctx'> 		   (ARM &amp;&amp; ARCH_IXP4XX &amp;&amp; IXP4XX_NPE &amp;&amp; IXP4XX_QMGR) || \</div><div class='ctx'> 		   EXPERIMENTAL</div><div class='ctx'> 	---help---</div><div class='hunk'>@@ -120,6 +120,17 @@ config IGB_DCA</div><div class='ctx'> 	  driver.  DCA is a method for warming the CPU cache before data</div><div class='ctx'> 	  is used, with the intent of lessening the impact of cache misses.</div><div class='ctx'> </div><div class='add'>+config IGB_PTP</div><div class='add'>+	bool "PTP Hardware Clock (PHC)"</div><div class='add'>+	default y</div><div class='add'>+	depends on IGB &amp;&amp; PTP_1588_CLOCK</div><div class='add'>+	---help---</div><div class='add'>+	  Say Y here if you want to use PTP Hardware Clock (PHC) in the</div><div class='add'>+	  driver.  Only the basic clock operations have been implemented.</div><div class='add'>+</div><div class='add'>+	  Every timestamp and clock read operations must consult the</div><div class='add'>+	  overflow counter to form a correct time value.</div><div class='add'>+</div><div class='ctx'> config IGBVF</div><div class='ctx'> 	tristate "Intel(R) 82576 Virtual Function Ethernet support"</div><div class='ctx'> 	depends on PCI</div><div class='hunk'>@@ -182,6 +193,14 @@ config IXGBE</div><div class='ctx'> 	  To compile this driver as a module, choose M here. The module</div><div class='ctx'> 	  will be called ixgbe.</div><div class='ctx'> </div><div class='add'>+config IXGBE_HWMON</div><div class='add'>+	bool "Intel(R) 10GbE PCI Express adapters HWMON support"</div><div class='add'>+	default y</div><div class='add'>+	depends on IXGBE &amp;&amp; HWMON &amp;&amp; !(IXGBE=y &amp;&amp; HWMON=m)</div><div class='add'>+	---help---</div><div class='add'>+	  Say Y if you want to expose the thermal sensor data on some of</div><div class='add'>+	  our cards, via a hwmon sysfs interface.</div><div class='add'>+</div><div class='ctx'> config IXGBE_DCA</div><div class='ctx'> 	bool "Direct Cache Access (DCA) Support"</div><div class='ctx'> 	default y</div><div class='hunk'>@@ -201,6 +220,17 @@ config IXGBE_DCB</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='add'>+config IXGBE_PTP</div><div class='add'>+	bool "PTP Clock Support"</div><div class='add'>+	default n</div><div class='add'>+	depends on IXGBE &amp;&amp; PTP_1588_CLOCK</div><div class='add'>+	---help---</div><div class='add'>+	  Say Y here if you want support for 1588 Timestamping with a</div><div class='add'>+	  PHC device, using the PTP 1588 Clock support. This is</div><div class='add'>+	  required to enable timestamping support for the device.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='ctx'> config IXGBEVF</div><div class='ctx'> 	tristate "Intel(R) 82599 Virtual Function Ethernet support"</div><div class='ctx'> 	depends on PCI_MSI</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e100.c b/drivers/net/ethernet/intel/e100.c<br/>index e498effb85d9..ada720b42ff6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e100.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e100.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e100.c</a></div><div class='hunk'>@@ -1759,6 +1759,7 @@ static void e100_xmit_prepare(struct nic *nic, struct cb *cb,</div><div class='ctx'> 		skb-&gt;data, skb-&gt;len, PCI_DMA_TODEVICE));</div><div class='ctx'> 	/* check for mapping failure? */</div><div class='ctx'> 	cb-&gt;u.tcb.tbd.size = cpu_to_le16(skb-&gt;len);</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t e100_xmit_frame(struct sk_buff *skb,</div><div class='hunk'>@@ -2733,6 +2734,7 @@ static const struct ethtool_ops e100_ethtool_ops = {</div><div class='ctx'> 	.set_phys_id		= e100_set_phys_id,</div><div class='ctx'> 	.get_ethtool_stats	= e100_get_ethtool_stats,</div><div class='ctx'> 	.get_sset_count		= e100_get_sset_count,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int e100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000/e1000_main.c b/drivers/net/ethernet/intel/e1000/e1000_main.c<br/>index 4348b6fd44fa..7483ca0a6282 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000/e1000_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000/e1000_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000/e1000_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000/e1000_main.c</a></div><div class='hunk'>@@ -493,7 +493,11 @@ out:</div><div class='ctx'> static void e1000_down_and_stop(struct e1000_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	set_bit(__E1000_DOWN, &amp;adapter-&gt;flags);</div><div class='del'>-	cancel_work_sync(&amp;adapter-&gt;reset_task);</div><div class='add'>+</div><div class='add'>+	/* Only kill reset task if adapter is not resetting */</div><div class='add'>+	if (!test_bit(__E1000_RESETTING, &amp;adapter-&gt;flags))</div><div class='add'>+		cancel_work_sync(&amp;adapter-&gt;reset_task);</div><div class='add'>+</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;adapter-&gt;watchdog_task);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;adapter-&gt;phy_info_task);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;adapter-&gt;fifo_stall_task);</div><div class='hunk'>@@ -827,9 +831,10 @@ static int e1000_set_features(struct net_device *netdev,</div><div class='ctx'> 	if (changed &amp; NETIF_F_HW_VLAN_RX)</div><div class='ctx'> 		e1000_vlan_mode(netdev, features);</div><div class='ctx'> </div><div class='del'>-	if (!(changed &amp; NETIF_F_RXCSUM))</div><div class='add'>+	if (!(changed &amp; (NETIF_F_RXCSUM | NETIF_F_RXALL)))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	netdev-&gt;features = features;</div><div class='ctx'> 	adapter-&gt;rx_csum = !!(features &amp; NETIF_F_RXCSUM);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(netdev))</div><div class='hunk'>@@ -1074,6 +1079,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;features |= netdev-&gt;hw_features;</div><div class='ctx'> 	netdev-&gt;hw_features |= NETIF_F_RXCSUM;</div><div class='add'>+	netdev-&gt;hw_features |= NETIF_F_RXALL;</div><div class='ctx'> 	netdev-&gt;hw_features |= NETIF_F_RXFCS;</div><div class='ctx'> </div><div class='ctx'> 	if (pci_using_dac) {</div><div class='hunk'>@@ -1841,6 +1847,22 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* This is useful for sniffing bad packets. */</div><div class='add'>+	if (adapter-&gt;netdev-&gt;features &amp; NETIF_F_RXALL) {</div><div class='add'>+		/* UPE and MPE will be handled by normal PROMISC logic</div><div class='add'>+		 * in e1000e_set_rx_mode */</div><div class='add'>+		rctl |= (E1000_RCTL_SBP | /* Receive bad packets */</div><div class='add'>+			 E1000_RCTL_BAM | /* RX All Bcast Pkts */</div><div class='add'>+			 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */</div><div class='add'>+</div><div class='add'>+		rctl &amp;= ~(E1000_RCTL_VFE | /* Disable VLAN filter */</div><div class='add'>+			  E1000_RCTL_DPF | /* Allow filtered pause */</div><div class='add'>+			  E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */</div><div class='add'>+		/* Do not mess with E1000_CTRL_VME, it affects transmit as well,</div><div class='add'>+		 * and that breaks VLANs.</div><div class='add'>+		 */</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ew32(RCTL, rctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3243,6 +3265,8 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,</div><div class='ctx'> 	                     nr_frags, mss);</div><div class='ctx'> </div><div class='ctx'> 	if (count) {</div><div class='add'>+		skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='ctx'> 		e1000_tx_queue(adapter, tx_ring, tx_flags, count);</div><div class='ctx'> 		/* Make sure there is space in the ring for the next send. */</div><div class='ctx'> 		e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);</div><div class='hunk'>@@ -3380,7 +3404,7 @@ static void e1000_dump(struct e1000_adapter *adapter)</div><div class='ctx'> 	for (i = 0; tx_ring-&gt;desc &amp;&amp; (i &lt; tx_ring-&gt;count); i++) {</div><div class='ctx'> 		struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);</div><div class='ctx'> 		struct e1000_buffer *buffer_info = &amp;tx_ring-&gt;buffer_info[i];</div><div class='del'>-		struct my_u { u64 a; u64 b; };</div><div class='add'>+		struct my_u { __le64 a; __le64 b; };</div><div class='ctx'> 		struct my_u *u = (struct my_u *)tx_desc;</div><div class='ctx'> 		const char *type;</div><div class='ctx'> </div><div class='hunk'>@@ -3424,7 +3448,7 @@ rx_ring_summary:</div><div class='ctx'> 	for (i = 0; rx_ring-&gt;desc &amp;&amp; (i &lt; rx_ring-&gt;count); i++) {</div><div class='ctx'> 		struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i);</div><div class='ctx'> 		struct e1000_buffer *buffer_info = &amp;rx_ring-&gt;buffer_info[i];</div><div class='del'>-		struct my_u { u64 a; u64 b; };</div><div class='add'>+		struct my_u { __le64 a; __le64 b; };</div><div class='ctx'> 		struct my_u *u = (struct my_u *)rx_desc;</div><div class='ctx'> 		const char *type;</div><div class='ctx'> </div><div class='hunk'>@@ -4046,17 +4070,23 @@ static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,</div><div class='ctx'> 		/* errors is only valid for DD + EOP descriptors */</div><div class='ctx'> 		if (unlikely((status &amp; E1000_RXD_STAT_EOP) &amp;&amp;</div><div class='ctx'> 		    (rx_desc-&gt;errors &amp; E1000_RXD_ERR_FRAME_ERR_MASK))) {</div><div class='del'>-			u8 last_byte = *(skb-&gt;data + length - 1);</div><div class='add'>+			u8 *mapped;</div><div class='add'>+			u8 last_byte;</div><div class='add'>+</div><div class='add'>+			mapped = page_address(buffer_info-&gt;page);</div><div class='add'>+			last_byte = *(mapped + length - 1);</div><div class='ctx'> 			if (TBI_ACCEPT(hw, status, rx_desc-&gt;errors, length,</div><div class='ctx'> 				       last_byte)) {</div><div class='ctx'> 				spin_lock_irqsave(&amp;adapter-&gt;stats_lock,</div><div class='ctx'> 				                  irq_flags);</div><div class='ctx'> 				e1000_tbi_adjust_stats(hw, &amp;adapter-&gt;stats,</div><div class='del'>-				                       length, skb-&gt;data);</div><div class='add'>+						       length, mapped);</div><div class='ctx'> 				spin_unlock_irqrestore(&amp;adapter-&gt;stats_lock,</div><div class='ctx'> 				                       irq_flags);</div><div class='ctx'> 				length--;</div><div class='ctx'> 			} else {</div><div class='add'>+				if (netdev-&gt;features &amp; NETIF_F_RXALL)</div><div class='add'>+					goto process_skb;</div><div class='ctx'> 				/* recycle both page and skb */</div><div class='ctx'> 				buffer_info-&gt;skb = skb;</div><div class='ctx'> 				/* an error means any chain goes out the window</div><div class='hunk'>@@ -4069,6 +4099,7 @@ static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> #define rxtop rx_ring-&gt;rx_skb_top</div><div class='add'>+process_skb:</div><div class='ctx'> 		if (!(status &amp; E1000_RXD_STAT_EOP)) {</div><div class='ctx'> 			/* this descriptor is only the beginning (or middle) */</div><div class='ctx'> 			if (!rxtop) {</div><div class='hunk'>@@ -4276,12 +4307,15 @@ static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,</div><div class='ctx'> 				                       flags);</div><div class='ctx'> 				length--;</div><div class='ctx'> 			} else {</div><div class='add'>+				if (netdev-&gt;features &amp; NETIF_F_RXALL)</div><div class='add'>+					goto process_skb;</div><div class='ctx'> 				/* recycle */</div><div class='ctx'> 				buffer_info-&gt;skb = skb;</div><div class='ctx'> 				goto next_desc;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+process_skb:</div><div class='ctx'> 		total_rx_bytes += (length - 4); /* don't count FCS */</div><div class='ctx'> 		total_rx_packets++;</div><div class='ctx'> </div><div class='hunk'>@@ -4365,30 +4399,6 @@ e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* Fix for errata 23, can't cross 64kB boundary */</div><div class='del'>-		if (!e1000_check_64k_bound(adapter, skb-&gt;data, bufsz)) {</div><div class='del'>-			struct sk_buff *oldskb = skb;</div><div class='del'>-			e_err(rx_err, "skb align check failed: %u bytes at "</div><div class='del'>-			      "%p\n", bufsz, skb-&gt;data);</div><div class='del'>-			/* Try again, without freeing the previous */</div><div class='del'>-			skb = netdev_alloc_skb_ip_align(netdev, bufsz);</div><div class='del'>-			/* Failed allocation, critical failure */</div><div class='del'>-			if (!skb) {</div><div class='del'>-				dev_kfree_skb(oldskb);</div><div class='del'>-				adapter-&gt;alloc_rx_buff_failed++;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (!e1000_check_64k_bound(adapter, skb-&gt;data, bufsz)) {</div><div class='del'>-				/* give up */</div><div class='del'>-				dev_kfree_skb(skb);</div><div class='del'>-				dev_kfree_skb(oldskb);</div><div class='del'>-				break; /* while (cleaned_count--) */</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* Use new allocation */</div><div class='del'>-			dev_kfree_skb(oldskb);</div><div class='del'>-		}</div><div class='ctx'> 		buffer_info-&gt;skb = skb;</div><div class='ctx'> 		buffer_info-&gt;length = adapter-&gt;rx_buffer_len;</div><div class='ctx'> check_page:</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/80003es2lan.c b/drivers/net/ethernet/intel/e1000e/80003es2lan.c<br/>index bac9dda31b6c..4dd18a1f45d2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/80003es2lan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000e/80003es2lan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/80003es2lan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/80003es2lan.c</a></div><div class='hunk'>@@ -228,9 +228,7 @@ static s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw)</div><div class='ctx'> 	/* FWSM register */</div><div class='ctx'> 	mac-&gt;has_fwsm = true;</div><div class='ctx'> 	/* ARC supported; valid only if manageability features are enabled. */</div><div class='del'>-	mac-&gt;arc_subsystem_valid =</div><div class='del'>-	        (er32(FWSM) &amp; E1000_FWSM_MODE_MASK)</div><div class='del'>-	                ? true : false;</div><div class='add'>+	mac-&gt;arc_subsystem_valid = !!(er32(FWSM) &amp; E1000_FWSM_MODE_MASK);</div><div class='ctx'> 	/* Adaptive IFS not supported */</div><div class='ctx'> 	mac-&gt;adaptive_ifs = false;</div><div class='ctx'> </div><div class='hunk'>@@ -766,6 +764,7 @@ static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	u32 ctrl;</div><div class='ctx'> 	s32 ret_val;</div><div class='add'>+	u16 kum_reg_data;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Prevent the PCI-E bus from sticking if there is no TLP connection</div><div class='hunk'>@@ -791,6 +790,13 @@ static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)</div><div class='ctx'> 	ew32(CTRL, ctrl | E1000_CTRL_RST);</div><div class='ctx'> 	e1000_release_phy_80003es2lan(hw);</div><div class='ctx'> </div><div class='add'>+	/* Disable IBIST slave mode (far-end loopback) */</div><div class='add'>+	e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_INBAND_PARAM,</div><div class='add'>+					&amp;kum_reg_data);</div><div class='add'>+	kum_reg_data |= E1000_KMRNCTRLSTA_IBIST_DISABLE;</div><div class='add'>+	e1000_write_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_INBAND_PARAM,</div><div class='add'>+					 kum_reg_data);</div><div class='add'>+</div><div class='ctx'> 	ret_val = e1000e_get_auto_rd_done(hw);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		/* We don't want to continue accessing MAC registers. */</div><div class='hunk'>@@ -938,6 +944,14 @@ static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw)</div><div class='ctx'> 	else</div><div class='ctx'> 		reg |= (1 &lt;&lt; 28);</div><div class='ctx'> 	ew32(TARC(1), reg);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable IPv6 extension header parsing because some malformed</div><div class='add'>+	 * IPv6 headers can hang the Rx.</div><div class='add'>+	 */</div><div class='add'>+	reg = er32(RFCTL);</div><div class='add'>+	reg |= (E1000_RFCTL_IPV6_EX_DIS | E1000_RFCTL_NEW_IPV6_EXT_DIS);</div><div class='add'>+	ew32(RFCTL, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1433,6 +1447,7 @@ static const struct e1000_mac_operations es2_mac_ops = {</div><div class='ctx'> 	/* setup_physical_interface dependent on media type */</div><div class='ctx'> 	.setup_led		= e1000e_setup_led_generic,</div><div class='ctx'> 	.config_collision_dist	= e1000e_config_collision_dist_generic,</div><div class='add'>+	.rar_set		= e1000e_rar_set_generic,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct e1000_phy_operations es2_phy_ops = {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/82571.c b/drivers/net/ethernet/intel/e1000e/82571.c<br/>index b3fdc6977f2e..36db4df09aed 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/82571.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000e/82571.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/82571.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/82571.c</a></div><div class='hunk'>@@ -295,9 +295,8 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw)</div><div class='ctx'> 		 * ARC supported; valid only if manageability features are</div><div class='ctx'> 		 * enabled.</div><div class='ctx'> 		 */</div><div class='del'>-		mac-&gt;arc_subsystem_valid =</div><div class='del'>-			(er32(FWSM) &amp; E1000_FWSM_MODE_MASK)</div><div class='del'>-			? true : false;</div><div class='add'>+		mac-&gt;arc_subsystem_valid = !!(er32(FWSM) &amp;</div><div class='add'>+					      E1000_FWSM_MODE_MASK);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case e1000_82574:</div><div class='ctx'> 	case e1000_82583:</div><div class='hunk'>@@ -798,7 +797,7 @@ static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw)</div><div class='ctx'> 	/* Check for pending operations. */</div><div class='ctx'> 	for (i = 0; i &lt; E1000_FLASH_UPDATES; i++) {</div><div class='ctx'> 		usleep_range(1000, 2000);</div><div class='del'>-		if ((er32(EECD) &amp; E1000_EECD_FLUPD) == 0)</div><div class='add'>+		if (!(er32(EECD) &amp; E1000_EECD_FLUPD))</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -822,7 +821,7 @@ static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; E1000_FLASH_UPDATES; i++) {</div><div class='ctx'> 		usleep_range(1000, 2000);</div><div class='del'>-		if ((er32(EECD) &amp; E1000_EECD_FLUPD) == 0)</div><div class='add'>+		if (!(er32(EECD) &amp; E1000_EECD_FLUPD))</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1000,7 +999,7 @@ static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active)</div><div class='ctx'>  **/</div><div class='ctx'> static s32 e1000_reset_hw_82571(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	u32 ctrl, ctrl_ext;</div><div class='add'>+	u32 ctrl, ctrl_ext, eecd;</div><div class='ctx'> 	s32 ret_val;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1073,6 +1072,16 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	switch (hw-&gt;mac.type) {</div><div class='add'>+	case e1000_82571:</div><div class='add'>+	case e1000_82572:</div><div class='add'>+		/*</div><div class='add'>+		 * REQ and GNT bits need to be cleared when using AUTO_RD</div><div class='add'>+		 * to access the EEPROM.</div><div class='add'>+		 */</div><div class='add'>+		eecd = er32(EECD);</div><div class='add'>+		eecd &amp;= ~(E1000_EECD_REQ | E1000_EECD_GNT);</div><div class='add'>+		ew32(EECD, eecd);</div><div class='add'>+		break;</div><div class='ctx'> 	case e1000_82573:</div><div class='ctx'> 	case e1000_82574:</div><div class='ctx'> 	case e1000_82583:</div><div class='hunk'>@@ -1280,6 +1289,16 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)</div><div class='ctx'> 		ew32(CTRL_EXT, reg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Disable IPv6 extension header parsing because some malformed</div><div class='add'>+	 * IPv6 headers can hang the Rx.</div><div class='add'>+	 */</div><div class='add'>+	if (hw-&gt;mac.type &lt;= e1000_82573) {</div><div class='add'>+		reg = er32(RFCTL);</div><div class='add'>+		reg |= (E1000_RFCTL_IPV6_EX_DIS | E1000_RFCTL_NEW_IPV6_EXT_DIS);</div><div class='add'>+		ew32(RFCTL, reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* PCI-Ex Control Registers */</div><div class='ctx'> 	switch (hw-&gt;mac.type) {</div><div class='ctx'> 	case e1000_82574:</div><div class='hunk'>@@ -1763,7 +1782,8 @@ void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state)</div><div class='ctx'> 		 * incoming packets directed to this port are dropped.</div><div class='ctx'> 		 * Eventually the LAA will be in RAR[0] and RAR[14].</div><div class='ctx'> 		 */</div><div class='del'>-		e1000e_rar_set(hw, hw-&gt;mac.addr, hw-&gt;mac.rar_entry_count - 1);</div><div class='add'>+		hw-&gt;mac.ops.rar_set(hw, hw-&gt;mac.addr,</div><div class='add'>+				    hw-&gt;mac.rar_entry_count - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1927,6 +1947,7 @@ static const struct e1000_mac_operations e82571_mac_ops = {</div><div class='ctx'> 	.setup_led		= e1000e_setup_led_generic,</div><div class='ctx'> 	.config_collision_dist	= e1000e_config_collision_dist_generic,</div><div class='ctx'> 	.read_mac_addr		= e1000_read_mac_addr_82571,</div><div class='add'>+	.rar_set		= e1000e_rar_set_generic,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct e1000_phy_operations e82_phy_ops_igp = {</div><div class='hunk'>@@ -2061,9 +2082,11 @@ const struct e1000_info e1000_82574_info = {</div><div class='ctx'> 				  | FLAG_HAS_SMART_POWER_DOWN</div><div class='ctx'> 				  | FLAG_HAS_AMT</div><div class='ctx'> 				  | FLAG_HAS_CTRLEXT_ON_LOAD,</div><div class='del'>-	.flags2			  = FLAG2_CHECK_PHY_HANG</div><div class='add'>+	.flags2			 = FLAG2_CHECK_PHY_HANG</div><div class='ctx'> 				  | FLAG2_DISABLE_ASPM_L0S</div><div class='del'>-				  | FLAG2_NO_DISABLE_RX,</div><div class='add'>+				  | FLAG2_DISABLE_ASPM_L1</div><div class='add'>+				  | FLAG2_NO_DISABLE_RX</div><div class='add'>+				  | FLAG2_DMA_BURST,</div><div class='ctx'> 	.pba			= 32,</div><div class='ctx'> 	.max_hw_frame_size	= DEFAULT_JUMBO,</div><div class='ctx'> 	.get_variants		= e1000_get_variants_82571,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h<br/>index 3a5025917163..351a4097b2ba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/defines.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000e/defines.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/defines.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/defines.h</a></div><div class='hunk'>@@ -74,7 +74,9 @@</div><div class='ctx'> #define E1000_WUS_BC           E1000_WUFC_BC</div><div class='ctx'> </div><div class='ctx'> /* Extended Device Control */</div><div class='add'>+#define E1000_CTRL_EXT_LPCD  0x00000004     /* LCD Power Cycle Done */</div><div class='ctx'> #define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Definable Pin 3 */</div><div class='add'>+#define E1000_CTRL_EXT_FORCE_SMBUS 0x00000800 /* Force SMBus mode */</div><div class='ctx'> #define E1000_CTRL_EXT_EE_RST    0x00002000 /* Reinitialize from EEPROM */</div><div class='ctx'> #define E1000_CTRL_EXT_SPD_BYPS  0x00008000 /* Speed Select Bypass */</div><div class='ctx'> #define E1000_CTRL_EXT_RO_DIS    0x00020000 /* Relaxed Ordering disable */</div><div class='hunk'>@@ -573,6 +575,7 @@</div><div class='ctx'> #define NWAY_AR_ASM_DIR          0x0800   /* Asymmetric Pause Direction bit */</div><div class='ctx'> </div><div class='ctx'> /* Link Partner Ability Register (Base Page) */</div><div class='add'>+#define NWAY_LPAR_100TX_FD_CAPS  0x0100 /* LP 100TX Full Dplx Capable */</div><div class='ctx'> #define NWAY_LPAR_PAUSE          0x0400 /* LP Pause operation desired */</div><div class='ctx'> #define NWAY_LPAR_ASM_DIR        0x0800 /* LP Asymmetric Pause Direction bit */</div><div class='ctx'> </div><div class='hunk'>@@ -739,6 +742,7 @@</div><div class='ctx'> #define I82577_E_PHY_ID      0x01540050</div><div class='ctx'> #define I82578_E_PHY_ID      0x004DD040</div><div class='ctx'> #define I82579_E_PHY_ID      0x01540090</div><div class='add'>+#define I217_E_PHY_ID        0x015400A0</div><div class='ctx'> </div><div class='ctx'> /* M88E1000 Specific Registers */</div><div class='ctx'> #define M88E1000_PHY_SPEC_CTRL     0x10  /* PHY Specific Control Register */</div><div class='hunk'>@@ -850,4 +854,8 @@</div><div class='ctx'> /* SerDes Control */</div><div class='ctx'> #define E1000_GEN_POLL_TIMEOUT          640</div><div class='ctx'> </div><div class='add'>+/* FW Semaphore */</div><div class='add'>+#define E1000_FWSM_WLOCK_MAC_MASK	0x0380</div><div class='add'>+#define E1000_FWSM_WLOCK_MAC_SHIFT	7</div><div class='add'>+</div><div class='ctx'> #endif /* _E1000_DEFINES_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/e1000.h b/drivers/net/ethernet/intel/e1000e/e1000.h<br/>index b83897f76ee3..6e6fffb34581 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/e1000.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000e/e1000.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/e1000.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/e1000.h</a></div><div class='hunk'>@@ -206,6 +206,7 @@ enum e1000_boards {</div><div class='ctx'> 	board_ich10lan,</div><div class='ctx'> 	board_pchlan,</div><div class='ctx'> 	board_pch2lan,</div><div class='add'>+	board_pch_lpt,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct e1000_ps_page {</div><div class='hunk'>@@ -528,6 +529,7 @@ extern const struct e1000_info e1000_ich9_info;</div><div class='ctx'> extern const struct e1000_info e1000_ich10_info;</div><div class='ctx'> extern const struct e1000_info e1000_pch_info;</div><div class='ctx'> extern const struct e1000_info e1000_pch2_info;</div><div class='add'>+extern const struct e1000_info e1000_pch_lpt_info;</div><div class='ctx'> extern const struct e1000_info e1000_es2_info;</div><div class='ctx'> </div><div class='ctx'> extern s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,</div><div class='hunk'>@@ -576,7 +578,7 @@ extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);</div><div class='ctx'> extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,</div><div class='ctx'> 					       u8 *mc_addr_list,</div><div class='ctx'> 					       u32 mc_addr_count);</div><div class='del'>-extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);</div><div class='add'>+extern void e1000e_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);</div><div class='ctx'> extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);</div><div class='ctx'> extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);</div><div class='ctx'> extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);</div><div class='hunk'>@@ -673,11 +675,21 @@ static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)</div><div class='ctx'> 	return hw-&gt;phy.ops.read_reg(hw, offset, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline s32 e1e_rphy_locked(struct e1000_hw *hw, u32 offset, u16 *data)</div><div class='add'>+{</div><div class='add'>+	return hw-&gt;phy.ops.read_reg_locked(hw, offset, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)</div><div class='ctx'> {</div><div class='ctx'> 	return hw-&gt;phy.ops.write_reg(hw, offset, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline s32 e1e_wphy_locked(struct e1000_hw *hw, u32 offset, u16 data)</div><div class='add'>+{</div><div class='add'>+	return hw-&gt;phy.ops.write_reg_locked(hw, offset, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline s32 e1000_get_cable_length(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	return hw-&gt;phy.ops.get_cable_length(hw);</div><div class='hunk'>@@ -735,9 +747,46 @@ static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)</div><div class='ctx'> 	return readl(hw-&gt;hw_addr + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define er32(reg)	__er32(hw, E1000_##reg)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __ew32_prepare - prepare to write to MAC CSR register on certain parts</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * When updating the MAC CSR registers, the Manageability Engine (ME) could</div><div class='add'>+ * be accessing the registers at the same time.  Normally, this is handled in</div><div class='add'>+ * h/w by an arbiter but on some parts there is a bug that acknowledges Host</div><div class='add'>+ * accesses later than it should which could result in the register to have</div><div class='add'>+ * an incorrect value.  Workaround this by checking the FWSM register which</div><div class='add'>+ * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set</div><div class='add'>+ * and try again a number of times.</div><div class='add'>+ **/</div><div class='add'>+static inline s32 __ew32_prepare(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;</div><div class='add'>+</div><div class='add'>+	while ((er32(FWSM) &amp; E1000_ICH_FWSM_PCIM2PCI) &amp;&amp; --i)</div><div class='add'>+		udelay(50);</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)</div><div class='ctx'> {</div><div class='add'>+	if (hw-&gt;adapter-&gt;flags2 &amp; FLAG2_PCIM2PCI_ARBITER_WA)</div><div class='add'>+		__ew32_prepare(hw);</div><div class='add'>+</div><div class='ctx'> 	writel(val, hw-&gt;hw_addr + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define ew32(reg, val)	__ew32(hw, E1000_##reg, (val))</div><div class='add'>+</div><div class='add'>+#define e1e_flush()	er32(STATUS)</div><div class='add'>+</div><div class='add'>+#define E1000_WRITE_REG_ARRAY(a, reg, offset, value) \</div><div class='add'>+	(__ew32((a), (reg + ((offset) &lt;&lt; 2)), (value)))</div><div class='add'>+</div><div class='add'>+#define E1000_READ_REG_ARRAY(a, reg, offset) \</div><div class='add'>+	(readl((a)-&gt;hw_addr + reg + ((offset) &lt;&lt; 2)))</div><div class='add'>+</div><div class='ctx'> #endif /* _E1000_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/ethtool.c b/drivers/net/ethernet/intel/e1000e/ethtool.c<br/>index db35dd5d96de..d863075df7a4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000e/ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/ethtool.c</a></div><div class='hunk'>@@ -259,8 +259,7 @@ static int e1000_set_settings(struct net_device *netdev,</div><div class='ctx'> 	 * cannot be changed</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (hw-&gt;phy.ops.check_reset_block(hw)) {</div><div class='del'>-		e_err("Cannot change link characteristics when SoL/IDER is "</div><div class='del'>-		      "active.\n");</div><div class='add'>+		e_err("Cannot change link characteristics when SoL/IDER is active.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -403,15 +402,15 @@ static void e1000_get_regs(struct net_device *netdev,</div><div class='ctx'> 	regs_buff[1]  = er32(STATUS);</div><div class='ctx'> </div><div class='ctx'> 	regs_buff[2]  = er32(RCTL);</div><div class='del'>-	regs_buff[3]  = er32(RDLEN);</div><div class='del'>-	regs_buff[4]  = er32(RDH);</div><div class='del'>-	regs_buff[5]  = er32(RDT);</div><div class='add'>+	regs_buff[3]  = er32(RDLEN(0));</div><div class='add'>+	regs_buff[4]  = er32(RDH(0));</div><div class='add'>+	regs_buff[5]  = er32(RDT(0));</div><div class='ctx'> 	regs_buff[6]  = er32(RDTR);</div><div class='ctx'> </div><div class='ctx'> 	regs_buff[7]  = er32(TCTL);</div><div class='del'>-	regs_buff[8]  = er32(TDLEN);</div><div class='del'>-	regs_buff[9]  = er32(TDH);</div><div class='del'>-	regs_buff[10] = er32(TDT);</div><div class='add'>+	regs_buff[8]  = er32(TDLEN(0));</div><div class='add'>+	regs_buff[9]  = er32(TDH(0));</div><div class='add'>+	regs_buff[10] = er32(TDT(0));</div><div class='ctx'> 	regs_buff[11] = er32(TIDV);</div><div class='ctx'> </div><div class='ctx'> 	regs_buff[12] = adapter-&gt;hw.phy.type;  /* PHY type (IGP=1, M88=0) */</div><div class='hunk'>@@ -727,9 +726,8 @@ static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,</div><div class='ctx'> 				      (test[pat] &amp; write));</div><div class='ctx'> 		val = E1000_READ_REG_ARRAY(&amp;adapter-&gt;hw, reg, offset);</div><div class='ctx'> 		if (val != (test[pat] &amp; write &amp; mask)) {</div><div class='del'>-			e_err("pattern test reg %04X failed: got 0x%08X "</div><div class='del'>-			      "expected 0x%08X\n", reg + offset, val,</div><div class='del'>-			      (test[pat] &amp; write &amp; mask));</div><div class='add'>+			e_err("pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",</div><div class='add'>+			      reg + offset, val, (test[pat] &amp; write &amp; mask));</div><div class='ctx'> 			*data = reg;</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -744,8 +742,8 @@ static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,</div><div class='ctx'> 	__ew32(&amp;adapter-&gt;hw, reg, write &amp; mask);</div><div class='ctx'> 	val = __er32(&amp;adapter-&gt;hw, reg);</div><div class='ctx'> 	if ((write &amp; mask) != (val &amp; mask)) {</div><div class='del'>-		e_err("set/check reg %04X test failed: got 0x%08X "</div><div class='del'>-		      "expected 0x%08X\n", reg, (val &amp; mask), (write &amp; mask));</div><div class='add'>+		e_err("set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",</div><div class='add'>+		      reg, (val &amp; mask), (write &amp; mask));</div><div class='ctx'> 		*data = reg;</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -775,6 +773,7 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)</div><div class='ctx'> 	u32 i;</div><div class='ctx'> 	u32 toggle;</div><div class='ctx'> 	u32 mask;</div><div class='add'>+	u32 wlock_mac = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The status register is Read Only, so a write should fail.</div><div class='hunk'>@@ -797,8 +796,8 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)</div><div class='ctx'> 	ew32(STATUS, toggle);</div><div class='ctx'> 	after = er32(STATUS) &amp; toggle;</div><div class='ctx'> 	if (value != after) {</div><div class='del'>-		e_err("failed STATUS register test got: 0x%08X expected: "</div><div class='del'>-		      "0x%08X\n", after, value);</div><div class='add'>+		e_err("failed STATUS register test got: 0x%08X expected: 0x%08X\n",</div><div class='add'>+		      after, value);</div><div class='ctx'> 		*data = 1;</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -813,15 +812,15 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	REG_PATTERN_TEST(E1000_RDTR, 0x0000FFFF, 0xFFFFFFFF);</div><div class='del'>-	REG_PATTERN_TEST(E1000_RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);</div><div class='del'>-	REG_PATTERN_TEST(E1000_RDLEN, 0x000FFF80, 0x000FFFFF);</div><div class='del'>-	REG_PATTERN_TEST(E1000_RDH, 0x0000FFFF, 0x0000FFFF);</div><div class='del'>-	REG_PATTERN_TEST(E1000_RDT, 0x0000FFFF, 0x0000FFFF);</div><div class='add'>+	REG_PATTERN_TEST(E1000_RDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);</div><div class='add'>+	REG_PATTERN_TEST(E1000_RDLEN(0), 0x000FFF80, 0x000FFFFF);</div><div class='add'>+	REG_PATTERN_TEST(E1000_RDH(0), 0x0000FFFF, 0x0000FFFF);</div><div class='add'>+	REG_PATTERN_TEST(E1000_RDT(0), 0x0000FFFF, 0x0000FFFF);</div><div class='ctx'> 	REG_PATTERN_TEST(E1000_FCRTH, 0x0000FFF8, 0x0000FFF8);</div><div class='ctx'> 	REG_PATTERN_TEST(E1000_FCTTV, 0x0000FFFF, 0x0000FFFF);</div><div class='ctx'> 	REG_PATTERN_TEST(E1000_TIPG, 0x3FFFFFFF, 0x3FFFFFFF);</div><div class='del'>-	REG_PATTERN_TEST(E1000_TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);</div><div class='del'>-	REG_PATTERN_TEST(E1000_TDLEN, 0x000FFF80, 0x000FFFFF);</div><div class='add'>+	REG_PATTERN_TEST(E1000_TDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);</div><div class='add'>+	REG_PATTERN_TEST(E1000_TDLEN(0), 0x000FFF80, 0x000FFFFF);</div><div class='ctx'> </div><div class='ctx'> 	REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000);</div><div class='ctx'> </div><div class='hunk'>@@ -830,29 +829,41 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)</div><div class='ctx'> 	REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000);</div><div class='ctx'> </div><div class='ctx'> 	REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF);</div><div class='del'>-	REG_PATTERN_TEST(E1000_RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);</div><div class='add'>+	REG_PATTERN_TEST(E1000_RDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);</div><div class='ctx'> 	if (!(adapter-&gt;flags &amp; FLAG_IS_ICH))</div><div class='ctx'> 		REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF);</div><div class='del'>-	REG_PATTERN_TEST(E1000_TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);</div><div class='add'>+	REG_PATTERN_TEST(E1000_TDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);</div><div class='ctx'> 	REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);</div><div class='ctx'> 	mask = 0x8003FFFF;</div><div class='ctx'> 	switch (mac-&gt;type) {</div><div class='ctx'> 	case e1000_ich10lan:</div><div class='ctx'> 	case e1000_pchlan:</div><div class='ctx'> 	case e1000_pch2lan:</div><div class='add'>+	case e1000_pch_lpt:</div><div class='ctx'> 		mask |= (1 &lt;&lt; 18);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	for (i = 0; i &lt; mac-&gt;rar_entry_count; i++)</div><div class='add'>+</div><div class='add'>+	if (mac-&gt;type == e1000_pch_lpt)</div><div class='add'>+		wlock_mac = (er32(FWSM) &amp; E1000_FWSM_WLOCK_MAC_MASK) &gt;&gt;</div><div class='add'>+		    E1000_FWSM_WLOCK_MAC_SHIFT;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; mac-&gt;rar_entry_count; i++) {</div><div class='add'>+		/* Cannot test write-protected SHRAL[n] registers */</div><div class='add'>+		if ((wlock_mac == 1) || (wlock_mac &amp;&amp; (i &gt; wlock_mac)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		REG_PATTERN_TEST_ARRAY(E1000_RA, ((i &lt;&lt; 1) + 1),</div><div class='del'>-		                       mask, 0xFFFFFFFF);</div><div class='add'>+				       mask, 0xFFFFFFFF);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; mac-&gt;mta_reg_count; i++)</div><div class='ctx'> 		REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF);</div><div class='ctx'> </div><div class='ctx'> 	*data = 0;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1104,11 +1115,11 @@ static int e1000_setup_desc_rings(struct e1000_adapter *adapter)</div><div class='ctx'> 	tx_ring-&gt;next_to_use = 0;</div><div class='ctx'> 	tx_ring-&gt;next_to_clean = 0;</div><div class='ctx'> </div><div class='del'>-	ew32(TDBAL, ((u64) tx_ring-&gt;dma &amp; 0x00000000FFFFFFFF));</div><div class='del'>-	ew32(TDBAH, ((u64) tx_ring-&gt;dma &gt;&gt; 32));</div><div class='del'>-	ew32(TDLEN, tx_ring-&gt;count * sizeof(struct e1000_tx_desc));</div><div class='del'>-	ew32(TDH, 0);</div><div class='del'>-	ew32(TDT, 0);</div><div class='add'>+	ew32(TDBAL(0), ((u64) tx_ring-&gt;dma &amp; 0x00000000FFFFFFFF));</div><div class='add'>+	ew32(TDBAH(0), ((u64) tx_ring-&gt;dma &gt;&gt; 32));</div><div class='add'>+	ew32(TDLEN(0), tx_ring-&gt;count * sizeof(struct e1000_tx_desc));</div><div class='add'>+	ew32(TDH(0), 0);</div><div class='add'>+	ew32(TDT(0), 0);</div><div class='ctx'> 	ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR |</div><div class='ctx'> 	     E1000_COLLISION_THRESHOLD &lt;&lt; E1000_CT_SHIFT |</div><div class='ctx'> 	     E1000_COLLISION_DISTANCE &lt;&lt; E1000_COLD_SHIFT);</div><div class='hunk'>@@ -1168,11 +1179,11 @@ static int e1000_setup_desc_rings(struct e1000_adapter *adapter)</div><div class='ctx'> 	rctl = er32(RCTL);</div><div class='ctx'> 	if (!(adapter-&gt;flags2 &amp; FLAG2_NO_DISABLE_RX))</div><div class='ctx'> 		ew32(RCTL, rctl &amp; ~E1000_RCTL_EN);</div><div class='del'>-	ew32(RDBAL, ((u64) rx_ring-&gt;dma &amp; 0xFFFFFFFF));</div><div class='del'>-	ew32(RDBAH, ((u64) rx_ring-&gt;dma &gt;&gt; 32));</div><div class='del'>-	ew32(RDLEN, rx_ring-&gt;size);</div><div class='del'>-	ew32(RDH, 0);</div><div class='del'>-	ew32(RDT, 0);</div><div class='add'>+	ew32(RDBAL(0), ((u64) rx_ring-&gt;dma &amp; 0xFFFFFFFF));</div><div class='add'>+	ew32(RDBAH(0), ((u64) rx_ring-&gt;dma &gt;&gt; 32));</div><div class='add'>+	ew32(RDLEN(0), rx_ring-&gt;size);</div><div class='add'>+	ew32(RDH(0), 0);</div><div class='add'>+	ew32(RDT(0), 0);</div><div class='ctx'> 	rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |</div><div class='ctx'> 		E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE |</div><div class='ctx'> 		E1000_RCTL_SBP | E1000_RCTL_SECRC |</div><div class='hunk'>@@ -1534,7 +1545,7 @@ static int e1000_run_loopback_test(struct e1000_adapter *adapter)</div><div class='ctx'> 	int ret_val = 0;</div><div class='ctx'> 	unsigned long time;</div><div class='ctx'> </div><div class='del'>-	ew32(RDT, rx_ring-&gt;count - 1);</div><div class='add'>+	ew32(RDT(0), rx_ring-&gt;count - 1);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Calculate the loop count based on the largest descriptor ring</div><div class='hunk'>@@ -1561,7 +1572,7 @@ static int e1000_run_loopback_test(struct e1000_adapter *adapter)</div><div class='ctx'> 			if (k == tx_ring-&gt;count)</div><div class='ctx'> 				k = 0;</div><div class='ctx'> 		}</div><div class='del'>-		ew32(TDT, k);</div><div class='add'>+		ew32(TDT(0), k);</div><div class='ctx'> 		e1e_flush();</div><div class='ctx'> 		msleep(200);</div><div class='ctx'> 		time = jiffies; /* set the start time for the receive */</div><div class='hunk'>@@ -1791,8 +1802,7 @@ static void e1000_get_wol(struct net_device *netdev,</div><div class='ctx'> 		wol-&gt;supported &amp;= ~WAKE_UCAST;</div><div class='ctx'> </div><div class='ctx'> 		if (adapter-&gt;wol &amp; E1000_WUFC_EX)</div><div class='del'>-			e_err("Interface does not support directed (unicast) "</div><div class='del'>-			      "frame wake-up packets\n");</div><div class='add'>+			e_err("Interface does not support directed (unicast) frame wake-up packets\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;wol &amp; E1000_WUFC_EX)</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h<br/>index f82ecf536c8b..ed5b40985edb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/hw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000e/hw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/hw.h</a></div><div class='hunk'>@@ -36,16 +36,6 @@ struct e1000_adapter;</div><div class='ctx'> </div><div class='ctx'> #include "defines.h"</div><div class='ctx'> </div><div class='del'>-#define er32(reg)	__er32(hw, E1000_##reg)</div><div class='del'>-#define ew32(reg,val)	__ew32(hw, E1000_##reg, (val))</div><div class='del'>-#define e1e_flush()	er32(STATUS)</div><div class='del'>-</div><div class='del'>-#define E1000_WRITE_REG_ARRAY(a, reg, offset, value) \</div><div class='del'>-	(writel((value), ((a)-&gt;hw_addr + reg + ((offset) &lt;&lt; 2))))</div><div class='del'>-</div><div class='del'>-#define E1000_READ_REG_ARRAY(a, reg, offset) \</div><div class='del'>-	(readl((a)-&gt;hw_addr + reg + ((offset) &lt;&lt; 2)))</div><div class='del'>-</div><div class='ctx'> enum e1e_registers {</div><div class='ctx'> 	E1000_CTRL     = 0x00000, /* Device Control - RW */</div><div class='ctx'> 	E1000_STATUS   = 0x00008, /* Device Status - RO */</div><div class='hunk'>@@ -61,6 +51,7 @@ enum e1e_registers {</div><div class='ctx'> 	E1000_FEXTNVM  = 0x00028, /* Future Extended NVM - RW */</div><div class='ctx'> 	E1000_FCT      = 0x00030, /* Flow Control Type - RW */</div><div class='ctx'> 	E1000_VET      = 0x00038, /* VLAN Ether Type - RW */</div><div class='add'>+	E1000_FEXTNVM3 = 0x0003C, /* Future Extended NVM 3 - RW */</div><div class='ctx'> 	E1000_ICR      = 0x000C0, /* Interrupt Cause Read - R/clr */</div><div class='ctx'> 	E1000_ITR      = 0x000C4, /* Interrupt Throttling Rate - RW */</div><div class='ctx'> 	E1000_ICS      = 0x000C8, /* Interrupt Cause Set - WO */</div><div class='hunk'>@@ -94,31 +85,40 @@ enum e1e_registers {</div><div class='ctx'> 	E1000_FCRTL    = 0x02160, /* Flow Control Receive Threshold Low - RW */</div><div class='ctx'> 	E1000_FCRTH    = 0x02168, /* Flow Control Receive Threshold High - RW */</div><div class='ctx'> 	E1000_PSRCTL   = 0x02170, /* Packet Split Receive Control - RW */</div><div class='del'>-	E1000_RDBAL    = 0x02800, /* Rx Descriptor Base Address Low - RW */</div><div class='del'>-	E1000_RDBAH    = 0x02804, /* Rx Descriptor Base Address High - RW */</div><div class='del'>-	E1000_RDLEN    = 0x02808, /* Rx Descriptor Length - RW */</div><div class='del'>-	E1000_RDH      = 0x02810, /* Rx Descriptor Head - RW */</div><div class='del'>-	E1000_RDT      = 0x02818, /* Rx Descriptor Tail - RW */</div><div class='del'>-	E1000_RDTR     = 0x02820, /* Rx Delay Timer - RW */</div><div class='del'>-	E1000_RXDCTL_BASE = 0x02828, /* Rx Descriptor Control - RW */</div><div class='del'>-#define E1000_RXDCTL(_n)   (E1000_RXDCTL_BASE + (_n &lt;&lt; 8))</div><div class='del'>-	E1000_RADV     = 0x0282C, /* Rx Interrupt Absolute Delay Timer - RW */</div><div class='del'>-</div><div class='del'>-/* Convenience macros</div><div class='add'>+/*</div><div class='add'>+ * Convenience macros</div><div class='ctx'>  *</div><div class='ctx'>  * Note: "_n" is the queue number of the register to be written to.</div><div class='ctx'>  *</div><div class='ctx'>  * Example usage:</div><div class='del'>- * E1000_RDBAL_REG(current_rx_queue)</div><div class='del'>- *</div><div class='add'>+ * E1000_RDBAL(current_rx_queue)</div><div class='ctx'>  */</div><div class='del'>-#define E1000_RDBAL_REG(_n)   (E1000_RDBAL + (_n &lt;&lt; 8))</div><div class='add'>+	E1000_RDBAL_BASE = 0x02800, /* Rx Descriptor Base Address Low - RW */</div><div class='add'>+#define E1000_RDBAL(_n)	(E1000_RDBAL_BASE + (_n &lt;&lt; 8))</div><div class='add'>+	E1000_RDBAH_BASE = 0x02804, /* Rx Descriptor Base Address High - RW */</div><div class='add'>+#define E1000_RDBAH(_n)	(E1000_RDBAH_BASE + (_n &lt;&lt; 8))</div><div class='add'>+	E1000_RDLEN_BASE = 0x02808, /* Rx Descriptor Length - RW */</div><div class='add'>+#define E1000_RDLEN(_n)	(E1000_RDLEN_BASE + (_n &lt;&lt; 8))</div><div class='add'>+	E1000_RDH_BASE = 0x02810, /* Rx Descriptor Head - RW */</div><div class='add'>+#define E1000_RDH(_n)	(E1000_RDH_BASE + (_n &lt;&lt; 8))</div><div class='add'>+	E1000_RDT_BASE = 0x02818, /* Rx Descriptor Tail - RW */</div><div class='add'>+#define E1000_RDT(_n)	(E1000_RDT_BASE + (_n &lt;&lt; 8))</div><div class='add'>+	E1000_RDTR     = 0x02820, /* Rx Delay Timer - RW */</div><div class='add'>+	E1000_RXDCTL_BASE = 0x02828, /* Rx Descriptor Control - RW */</div><div class='add'>+#define E1000_RXDCTL(_n)   (E1000_RXDCTL_BASE + (_n &lt;&lt; 8))</div><div class='add'>+	E1000_RADV     = 0x0282C, /* Rx Interrupt Absolute Delay Timer - RW */</div><div class='add'>+</div><div class='ctx'> 	E1000_KABGTXD  = 0x03004, /* AFE Band Gap Transmit Ref Data */</div><div class='del'>-	E1000_TDBAL    = 0x03800, /* Tx Descriptor Base Address Low - RW */</div><div class='del'>-	E1000_TDBAH    = 0x03804, /* Tx Descriptor Base Address High - RW */</div><div class='del'>-	E1000_TDLEN    = 0x03808, /* Tx Descriptor Length - RW */</div><div class='del'>-	E1000_TDH      = 0x03810, /* Tx Descriptor Head - RW */</div><div class='del'>-	E1000_TDT      = 0x03818, /* Tx Descriptor Tail - RW */</div><div class='add'>+	E1000_TDBAL_BASE = 0x03800, /* Tx Descriptor Base Address Low - RW */</div><div class='add'>+#define E1000_TDBAL(_n)	(E1000_TDBAL_BASE + (_n &lt;&lt; 8))</div><div class='add'>+	E1000_TDBAH_BASE = 0x03804, /* Tx Descriptor Base Address High - RW */</div><div class='add'>+#define E1000_TDBAH(_n)	(E1000_TDBAH_BASE + (_n &lt;&lt; 8))</div><div class='add'>+	E1000_TDLEN_BASE = 0x03808, /* Tx Descriptor Length - RW */</div><div class='add'>+#define E1000_TDLEN(_n)	(E1000_TDLEN_BASE + (_n &lt;&lt; 8))</div><div class='add'>+	E1000_TDH_BASE = 0x03810, /* Tx Descriptor Head - RW */</div><div class='add'>+#define E1000_TDH(_n)	(E1000_TDH_BASE + (_n &lt;&lt; 8))</div><div class='add'>+	E1000_TDT_BASE = 0x03818, /* Tx Descriptor Tail - RW */</div><div class='add'>+#define E1000_TDT(_n)	(E1000_TDT_BASE + (_n &lt;&lt; 8))</div><div class='ctx'> 	E1000_TIDV     = 0x03820, /* Tx Interrupt Delay Value - RW */</div><div class='ctx'> 	E1000_TXDCTL_BASE = 0x03828, /* Tx Descriptor Control - RW */</div><div class='ctx'> #define E1000_TXDCTL(_n)   (E1000_TXDCTL_BASE + (_n &lt;&lt; 8))</div><div class='hunk'>@@ -200,6 +200,14 @@ enum e1e_registers {</div><div class='ctx'> #define E1000_RA        (E1000_RAL(0))</div><div class='ctx'> 	E1000_RAH_BASE = 0x05404, /* Receive Address High - RW */</div><div class='ctx'> #define E1000_RAH(_n)   (E1000_RAH_BASE + ((_n) * 8))</div><div class='add'>+	E1000_SHRAL_PCH_LPT_BASE = 0x05408,</div><div class='add'>+#define E1000_SHRAL_PCH_LPT(_n)   (E1000_SHRAL_PCH_LPT_BASE + ((_n) * 8))</div><div class='add'>+	E1000_SHRAH_PCH_LTP_BASE = 0x0540C,</div><div class='add'>+#define E1000_SHRAH_PCH_LPT(_n)   (E1000_SHRAH_PCH_LTP_BASE + ((_n) * 8))</div><div class='add'>+	E1000_SHRAL_BASE = 0x05438, /* Shared Receive Address Low - RW */</div><div class='add'>+#define E1000_SHRAL(_n)   (E1000_SHRAL_BASE + ((_n) * 8))</div><div class='add'>+	E1000_SHRAH_BASE = 0x0543C, /* Shared Receive Address High - RW */</div><div class='add'>+#define E1000_SHRAH(_n)   (E1000_SHRAH_BASE + ((_n) * 8))</div><div class='ctx'> 	E1000_VFTA     = 0x05600, /* VLAN Filter Table Array - RW Array */</div><div class='ctx'> 	E1000_WUC      = 0x05800, /* Wakeup Control - RW */</div><div class='ctx'> 	E1000_WUFC     = 0x05808, /* Wakeup Filter Control - RW */</div><div class='hunk'>@@ -402,6 +410,8 @@ enum e1e_registers {</div><div class='ctx'> #define E1000_DEV_ID_PCH_D_HV_DC		0x10F0</div><div class='ctx'> #define E1000_DEV_ID_PCH2_LV_LM			0x1502</div><div class='ctx'> #define E1000_DEV_ID_PCH2_LV_V			0x1503</div><div class='add'>+#define E1000_DEV_ID_PCH_LPT_I217_LM		0x153A</div><div class='add'>+#define E1000_DEV_ID_PCH_LPT_I217_V		0x153B</div><div class='ctx'> </div><div class='ctx'> #define E1000_REVISION_4 4</div><div class='ctx'> </div><div class='hunk'>@@ -422,6 +432,7 @@ enum e1000_mac_type {</div><div class='ctx'> 	e1000_ich10lan,</div><div class='ctx'> 	e1000_pchlan,</div><div class='ctx'> 	e1000_pch2lan,</div><div class='add'>+	e1000_pch_lpt,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum e1000_media_type {</div><div class='hunk'>@@ -459,6 +470,7 @@ enum e1000_phy_type {</div><div class='ctx'> 	e1000_phy_82578,</div><div class='ctx'> 	e1000_phy_82577,</div><div class='ctx'> 	e1000_phy_82579,</div><div class='add'>+	e1000_phy_i217,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum e1000_bus_width {</div><div class='hunk'>@@ -782,6 +794,7 @@ struct e1000_mac_operations {</div><div class='ctx'> 	s32  (*setup_led)(struct e1000_hw *);</div><div class='ctx'> 	void (*write_vfta)(struct e1000_hw *, u32, u32);</div><div class='ctx'> 	void (*config_collision_dist)(struct e1000_hw *);</div><div class='add'>+	void (*rar_set)(struct e1000_hw *, u8 *, u32);</div><div class='ctx'> 	s32  (*read_mac_addr)(struct e1000_hw *);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -966,6 +979,7 @@ struct e1000_dev_spec_ich8lan {</div><div class='ctx'> 	struct e1000_shadow_ram shadow_ram[E1000_ICH8_SHADOW_RAM_WORDS];</div><div class='ctx'> 	bool nvm_k1_enabled;</div><div class='ctx'> 	bool eee_disable;</div><div class='add'>+	u16 eee_lp_ability;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct e1000_hw {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c<br/>index b461c24945e3..238ab2f8a5e7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/ich8lan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000e/ich8lan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/ich8lan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/ich8lan.c</a></div><div class='hunk'>@@ -105,6 +105,9 @@</div><div class='ctx'> #define E1000_FEXTNVM_SW_CONFIG		1</div><div class='ctx'> #define E1000_FEXTNVM_SW_CONFIG_ICH8M (1 &lt;&lt; 27) /* Bit redefined for ICH8M :/ */</div><div class='ctx'> </div><div class='add'>+#define E1000_FEXTNVM3_PHY_CFG_COUNTER_MASK    0x0C000000</div><div class='add'>+#define E1000_FEXTNVM3_PHY_CFG_COUNTER_50MSEC  0x08000000</div><div class='add'>+</div><div class='ctx'> #define E1000_FEXTNVM4_BEACON_DURATION_MASK    0x7</div><div class='ctx'> #define E1000_FEXTNVM4_BEACON_DURATION_8USEC   0x7</div><div class='ctx'> #define E1000_FEXTNVM4_BEACON_DURATION_16USEC  0x3</div><div class='hunk'>@@ -112,6 +115,8 @@</div><div class='ctx'> #define PCIE_ICH8_SNOOP_ALL		PCIE_NO_SNOOP_ALL</div><div class='ctx'> </div><div class='ctx'> #define E1000_ICH_RAR_ENTRIES		7</div><div class='add'>+#define E1000_PCH2_RAR_ENTRIES		5 /* RAR[0], SHRA[0-3] */</div><div class='add'>+#define E1000_PCH_LPT_RAR_ENTRIES	12 /* RAR[0], SHRA[0-10] */</div><div class='ctx'> </div><div class='ctx'> #define PHY_PAGE_SHIFT 5</div><div class='ctx'> #define PHY_REG(page, reg) (((page) &lt;&lt; PHY_PAGE_SHIFT) | \</div><div class='hunk'>@@ -127,14 +132,22 @@</div><div class='ctx'> </div><div class='ctx'> #define SW_FLAG_TIMEOUT    1000 /* SW Semaphore flag timeout in milliseconds */</div><div class='ctx'> </div><div class='add'>+/* SMBus Control Phy Register */</div><div class='add'>+#define CV_SMB_CTRL		PHY_REG(769, 23)</div><div class='add'>+#define CV_SMB_CTRL_FORCE_SMBUS	0x0001</div><div class='add'>+</div><div class='ctx'> /* SMBus Address Phy Register */</div><div class='ctx'> #define HV_SMB_ADDR            PHY_REG(768, 26)</div><div class='ctx'> #define HV_SMB_ADDR_MASK       0x007F</div><div class='ctx'> #define HV_SMB_ADDR_PEC_EN     0x0200</div><div class='ctx'> #define HV_SMB_ADDR_VALID      0x0080</div><div class='add'>+#define HV_SMB_ADDR_FREQ_MASK           0x1100</div><div class='add'>+#define HV_SMB_ADDR_FREQ_LOW_SHIFT      8</div><div class='add'>+#define HV_SMB_ADDR_FREQ_HIGH_SHIFT     12</div><div class='ctx'> </div><div class='ctx'> /* PHY Power Management Control */</div><div class='ctx'> #define HV_PM_CTRL		PHY_REG(770, 17)</div><div class='add'>+#define HV_PM_CTRL_PLL_STOP_IN_K1_GIGA	0x100</div><div class='ctx'> </div><div class='ctx'> /* PHY Low Power Idle Control */</div><div class='ctx'> #define I82579_LPI_CTRL				PHY_REG(772, 20)</div><div class='hunk'>@@ -147,11 +160,26 @@</div><div class='ctx'> #define I82579_LPI_UPDATE_TIMER 0x4805	/* in 40ns units + 40 ns base value */</div><div class='ctx'> #define I82579_MSE_THRESHOLD    0x084F	/* Mean Square Error Threshold */</div><div class='ctx'> #define I82579_MSE_LINK_DOWN    0x2411	/* MSE count before dropping link */</div><div class='add'>+#define I217_EEE_ADVERTISEMENT  0x8001	/* IEEE MMD Register 7.60 */</div><div class='add'>+#define I217_EEE_LP_ABILITY     0x8002	/* IEEE MMD Register 7.61 */</div><div class='add'>+#define I217_EEE_100_SUPPORTED  (1 &lt;&lt; 1)	/* 100BaseTx EEE supported */</div><div class='add'>+</div><div class='add'>+/* Intel Rapid Start Technology Support */</div><div class='add'>+#define I217_PROXY_CTRL                 BM_PHY_REG(BM_WUC_PAGE, 70)</div><div class='add'>+#define I217_PROXY_CTRL_AUTO_DISABLE    0x0080</div><div class='add'>+#define I217_SxCTRL                     PHY_REG(BM_PORT_CTRL_PAGE, 28)</div><div class='add'>+#define I217_SxCTRL_ENABLE_LPI_RESET    0x1000</div><div class='add'>+#define I217_CGFREG                     PHY_REG(772, 29)</div><div class='add'>+#define I217_CGFREG_ENABLE_MTA_RESET    0x0002</div><div class='add'>+#define I217_MEMPWR                     PHY_REG(772, 26)</div><div class='add'>+#define I217_MEMPWR_DISABLE_SMB_RELEASE 0x0010</div><div class='ctx'> </div><div class='ctx'> /* Strapping Option Register - RO */</div><div class='ctx'> #define E1000_STRAP                     0x0000C</div><div class='ctx'> #define E1000_STRAP_SMBUS_ADDRESS_MASK  0x00FE0000</div><div class='ctx'> #define E1000_STRAP_SMBUS_ADDRESS_SHIFT 17</div><div class='add'>+#define E1000_STRAP_SMT_FREQ_MASK       0x00003000</div><div class='add'>+#define E1000_STRAP_SMT_FREQ_SHIFT      12</div><div class='ctx'> </div><div class='ctx'> /* OEM Bits Phy Register */</div><div class='ctx'> #define HV_OEM_BITS            PHY_REG(768, 25)</div><div class='hunk'>@@ -255,6 +283,8 @@ static s32  e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link);</div><div class='ctx'> static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw);</div><div class='ctx'> static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw);</div><div class='ctx'> static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw);</div><div class='add'>+static void e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index);</div><div class='add'>+static void e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index);</div><div class='ctx'> static s32 e1000_k1_workaround_lv(struct e1000_hw *hw);</div><div class='ctx'> static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate);</div><div class='ctx'> </div><div class='hunk'>@@ -283,18 +313,161 @@ static inline void __ew32flash(struct e1000_hw *hw, unsigned long reg, u32 val)</div><div class='ctx'> #define ew16flash(reg, val)	__ew16flash(hw, (reg), (val))</div><div class='ctx'> #define ew32flash(reg, val)	__ew32flash(hw, (reg), (val))</div><div class='ctx'> </div><div class='del'>-static void e1000_toggle_lanphypc_value_ich8lan(struct e1000_hw *hw)</div><div class='add'>+/**</div><div class='add'>+ *  e1000_phy_is_accessible_pchlan - Check if able to access PHY registers</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Test access to the PHY registers by reading the PHY ID registers.  If</div><div class='add'>+ *  the PHY ID is already known (e.g. resume path) compare it with known ID,</div><div class='add'>+ *  otherwise assume the read PHY ID is correct if it is valid.</div><div class='add'>+ *</div><div class='add'>+ *  Assumes the sw/fw/hw semaphore is already acquired.</div><div class='add'>+ **/</div><div class='add'>+static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	u32 ctrl;</div><div class='add'>+	u16 phy_reg;</div><div class='add'>+	u32 phy_id;</div><div class='ctx'> </div><div class='del'>-	ctrl = er32(CTRL);</div><div class='del'>-	ctrl |= E1000_CTRL_LANPHYPC_OVERRIDE;</div><div class='del'>-	ctrl &amp;= ~E1000_CTRL_LANPHYPC_VALUE;</div><div class='del'>-	ew32(CTRL, ctrl);</div><div class='del'>-	e1e_flush();</div><div class='del'>-	udelay(10);</div><div class='del'>-	ctrl &amp;= ~E1000_CTRL_LANPHYPC_OVERRIDE;</div><div class='del'>-	ew32(CTRL, ctrl);</div><div class='add'>+	e1e_rphy_locked(hw, PHY_ID1, &amp;phy_reg);</div><div class='add'>+	phy_id = (u32)(phy_reg &lt;&lt; 16);</div><div class='add'>+	e1e_rphy_locked(hw, PHY_ID2, &amp;phy_reg);</div><div class='add'>+	phy_id |= (u32)(phy_reg &amp; PHY_REVISION_MASK);</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;phy.id) {</div><div class='add'>+		if (hw-&gt;phy.id == phy_id)</div><div class='add'>+			return true;</div><div class='add'>+	} else {</div><div class='add'>+		if ((phy_id != 0) &amp;&amp; (phy_id != PHY_REVISION_MASK))</div><div class='add'>+			hw-&gt;phy.id = phy_id;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  e1000_init_phy_workarounds_pchlan - PHY initialization workarounds</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Workarounds/flow necessary for PHY initialization during driver load</div><div class='add'>+ *  and resume paths.</div><div class='add'>+ **/</div><div class='add'>+static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 mac_reg, fwsm = er32(FWSM);</div><div class='add'>+	s32 ret_val;</div><div class='add'>+	u16 phy_reg;</div><div class='add'>+</div><div class='add'>+	ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='add'>+	if (ret_val) {</div><div class='add'>+		e_dbg("Failed to initialize PHY flow\n");</div><div class='add'>+		return ret_val;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The MAC-PHY interconnect may be in SMBus mode.  If the PHY is</div><div class='add'>+	 * inaccessible and resetting the PHY is not blocked, toggle the</div><div class='add'>+	 * LANPHYPC Value bit to force the interconnect to PCIe mode.</div><div class='add'>+	 */</div><div class='add'>+	switch (hw-&gt;mac.type) {</div><div class='add'>+	case e1000_pch_lpt:</div><div class='add'>+		if (e1000_phy_is_accessible_pchlan(hw))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Before toggling LANPHYPC, see if PHY is accessible by</div><div class='add'>+		 * forcing MAC to SMBus mode first.</div><div class='add'>+		 */</div><div class='add'>+		mac_reg = er32(CTRL_EXT);</div><div class='add'>+		mac_reg |= E1000_CTRL_EXT_FORCE_SMBUS;</div><div class='add'>+		ew32(CTRL_EXT, mac_reg);</div><div class='add'>+</div><div class='add'>+		/* fall-through */</div><div class='add'>+	case e1000_pch2lan:</div><div class='add'>+		/*</div><div class='add'>+		 * Gate automatic PHY configuration by hardware on</div><div class='add'>+		 * non-managed 82579</div><div class='add'>+		 */</div><div class='add'>+		if ((hw-&gt;mac.type == e1000_pch2lan) &amp;&amp;</div><div class='add'>+		    !(fwsm &amp; E1000_ICH_FWSM_FW_VALID))</div><div class='add'>+			e1000_gate_hw_phy_config_ich8lan(hw, true);</div><div class='add'>+</div><div class='add'>+		if (e1000_phy_is_accessible_pchlan(hw)) {</div><div class='add'>+			if (hw-&gt;mac.type == e1000_pch_lpt) {</div><div class='add'>+				/* Unforce SMBus mode in PHY */</div><div class='add'>+				e1e_rphy_locked(hw, CV_SMB_CTRL, &amp;phy_reg);</div><div class='add'>+				phy_reg &amp;= ~CV_SMB_CTRL_FORCE_SMBUS;</div><div class='add'>+				e1e_wphy_locked(hw, CV_SMB_CTRL, phy_reg);</div><div class='add'>+</div><div class='add'>+				/* Unforce SMBus mode in MAC */</div><div class='add'>+				mac_reg = er32(CTRL_EXT);</div><div class='add'>+				mac_reg &amp;= ~E1000_CTRL_EXT_FORCE_SMBUS;</div><div class='add'>+				ew32(CTRL_EXT, mac_reg);</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* fall-through */</div><div class='add'>+	case e1000_pchlan:</div><div class='add'>+		if ((hw-&gt;mac.type == e1000_pchlan) &amp;&amp;</div><div class='add'>+		    (fwsm &amp; E1000_ICH_FWSM_FW_VALID))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (hw-&gt;phy.ops.check_reset_block(hw)) {</div><div class='add'>+			e_dbg("Required LANPHYPC toggle blocked by ME\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		e_dbg("Toggling LANPHYPC\n");</div><div class='add'>+</div><div class='add'>+		/* Set Phy Config Counter to 50msec */</div><div class='add'>+		mac_reg = er32(FEXTNVM3);</div><div class='add'>+		mac_reg &amp;= ~E1000_FEXTNVM3_PHY_CFG_COUNTER_MASK;</div><div class='add'>+		mac_reg |= E1000_FEXTNVM3_PHY_CFG_COUNTER_50MSEC;</div><div class='add'>+		ew32(FEXTNVM3, mac_reg);</div><div class='add'>+</div><div class='add'>+		/* Toggle LANPHYPC Value bit */</div><div class='add'>+		mac_reg = er32(CTRL);</div><div class='add'>+		mac_reg |= E1000_CTRL_LANPHYPC_OVERRIDE;</div><div class='add'>+		mac_reg &amp;= ~E1000_CTRL_LANPHYPC_VALUE;</div><div class='add'>+		ew32(CTRL, mac_reg);</div><div class='add'>+		e1e_flush();</div><div class='add'>+		udelay(10);</div><div class='add'>+		mac_reg &amp;= ~E1000_CTRL_LANPHYPC_OVERRIDE;</div><div class='add'>+		ew32(CTRL, mac_reg);</div><div class='add'>+		e1e_flush();</div><div class='add'>+		if (hw-&gt;mac.type &lt; e1000_pch_lpt) {</div><div class='add'>+			msleep(50);</div><div class='add'>+		} else {</div><div class='add'>+			u16 count = 20;</div><div class='add'>+			do {</div><div class='add'>+				usleep_range(5000, 10000);</div><div class='add'>+			} while (!(er32(CTRL_EXT) &amp;</div><div class='add'>+				   E1000_CTRL_EXT_LPCD) &amp;&amp; count--);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw-&gt;phy.ops.release(hw);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Reset the PHY before any access to it.  Doing so, ensures</div><div class='add'>+	 * that the PHY is in a known good state before we read/write</div><div class='add'>+	 * PHY registers.  The generic reset is sufficient here,</div><div class='add'>+	 * because we haven't determined the PHY type yet.</div><div class='add'>+	 */</div><div class='add'>+	ret_val = e1000e_phy_hw_reset_generic(hw);</div><div class='add'>+</div><div class='add'>+	/* Ungate automatic PHY configuration on non-managed 82579 */</div><div class='add'>+	if ((hw-&gt;mac.type == e1000_pch2lan) &amp;&amp;</div><div class='add'>+	    !(fwsm &amp; E1000_ICH_FWSM_FW_VALID)) {</div><div class='add'>+		usleep_range(10000, 20000);</div><div class='add'>+		e1000_gate_hw_phy_config_ich8lan(hw, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret_val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -324,70 +497,41 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)</div><div class='ctx'> 	phy-&gt;ops.power_down           = e1000_power_down_phy_copper_ich8lan;</div><div class='ctx'> 	phy-&gt;autoneg_mask             = AUTONEG_ADVERTISE_SPEED_DEFAULT;</div><div class='ctx'> </div><div class='del'>-	if (!hw-&gt;phy.ops.check_reset_block(hw)) {</div><div class='del'>-		u32 fwsm = er32(FWSM);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * The MAC-PHY interconnect may still be in SMBus mode after</div><div class='del'>-		 * Sx-&gt;S0.  If resetting the PHY is not blocked, toggle the</div><div class='del'>-		 * LANPHYPC Value bit to force the interconnect to PCIe mode.</div><div class='del'>-		 */</div><div class='del'>-		e1000_toggle_lanphypc_value_ich8lan(hw);</div><div class='del'>-		msleep(50);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Gate automatic PHY configuration by hardware on</div><div class='del'>-		 * non-managed 82579</div><div class='del'>-		 */</div><div class='del'>-		if ((hw-&gt;mac.type == e1000_pch2lan) &amp;&amp;</div><div class='del'>-		    !(fwsm &amp; E1000_ICH_FWSM_FW_VALID))</div><div class='del'>-			e1000_gate_hw_phy_config_ich8lan(hw, true);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Reset the PHY before any access to it.  Doing so, ensures</div><div class='del'>-		 * that the PHY is in a known good state before we read/write</div><div class='del'>-		 * PHY registers.  The generic reset is sufficient here,</div><div class='del'>-		 * because we haven't determined the PHY type yet.</div><div class='del'>-		 */</div><div class='del'>-		ret_val = e1000e_phy_hw_reset_generic(hw);</div><div class='del'>-		if (ret_val)</div><div class='del'>-			return ret_val;</div><div class='add'>+	phy-&gt;id = e1000_phy_unknown;</div><div class='ctx'> </div><div class='del'>-		/* Ungate automatic PHY configuration on non-managed 82579 */</div><div class='del'>-		if ((hw-&gt;mac.type == e1000_pch2lan) &amp;&amp;</div><div class='del'>-		    !(fwsm &amp; E1000_ICH_FWSM_FW_VALID)) {</div><div class='del'>-			usleep_range(10000, 20000);</div><div class='del'>-			e1000_gate_hw_phy_config_ich8lan(hw, false);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	ret_val = e1000_init_phy_workarounds_pchlan(hw);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		return ret_val;</div><div class='ctx'> </div><div class='del'>-	phy-&gt;id = e1000_phy_unknown;</div><div class='del'>-	switch (hw-&gt;mac.type) {</div><div class='del'>-	default:</div><div class='del'>-		ret_val = e1000e_get_phy_id(hw);</div><div class='del'>-		if (ret_val)</div><div class='del'>-			return ret_val;</div><div class='del'>-		if ((phy-&gt;id != 0) &amp;&amp; (phy-&gt;id != PHY_REVISION_MASK))</div><div class='add'>+	if (phy-&gt;id == e1000_phy_unknown)</div><div class='add'>+		switch (hw-&gt;mac.type) {</div><div class='add'>+		default:</div><div class='add'>+			ret_val = e1000e_get_phy_id(hw);</div><div class='add'>+			if (ret_val)</div><div class='add'>+				return ret_val;</div><div class='add'>+			if ((phy-&gt;id != 0) &amp;&amp; (phy-&gt;id != PHY_REVISION_MASK))</div><div class='add'>+				break;</div><div class='add'>+			/* fall-through */</div><div class='add'>+		case e1000_pch2lan:</div><div class='add'>+		case e1000_pch_lpt:</div><div class='add'>+			/*</div><div class='add'>+			 * In case the PHY needs to be in mdio slow mode,</div><div class='add'>+			 * set slow mode and try to get the PHY id again.</div><div class='add'>+			 */</div><div class='add'>+			ret_val = e1000_set_mdio_slow_mode_hv(hw);</div><div class='add'>+			if (ret_val)</div><div class='add'>+				return ret_val;</div><div class='add'>+			ret_val = e1000e_get_phy_id(hw);</div><div class='add'>+			if (ret_val)</div><div class='add'>+				return ret_val;</div><div class='ctx'> 			break;</div><div class='del'>-		/* fall-through */</div><div class='del'>-	case e1000_pch2lan:</div><div class='del'>-		/*</div><div class='del'>-		 * In case the PHY needs to be in mdio slow mode,</div><div class='del'>-		 * set slow mode and try to get the PHY id again.</div><div class='del'>-		 */</div><div class='del'>-		ret_val = e1000_set_mdio_slow_mode_hv(hw);</div><div class='del'>-		if (ret_val)</div><div class='del'>-			return ret_val;</div><div class='del'>-		ret_val = e1000e_get_phy_id(hw);</div><div class='del'>-		if (ret_val)</div><div class='del'>-			return ret_val;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+		}</div><div class='ctx'> 	phy-&gt;type = e1000e_get_phy_type_from_id(phy-&gt;id);</div><div class='ctx'> </div><div class='ctx'> 	switch (phy-&gt;type) {</div><div class='ctx'> 	case e1000_phy_82577:</div><div class='ctx'> 	case e1000_phy_82579:</div><div class='add'>+	case e1000_phy_i217:</div><div class='ctx'> 		phy-&gt;ops.check_polarity = e1000_check_polarity_82577;</div><div class='ctx'> 		phy-&gt;ops.force_speed_duplex =</div><div class='ctx'> 		    e1000_phy_force_speed_duplex_82577;</div><div class='hunk'>@@ -572,7 +716,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	/* Adaptive IFS supported */</div><div class='ctx'> 	mac-&gt;adaptive_ifs = true;</div><div class='ctx'> </div><div class='del'>-	/* LED operations */</div><div class='add'>+	/* LED and other operations */</div><div class='ctx'> 	switch (mac-&gt;type) {</div><div class='ctx'> 	case e1000_ich8lan:</div><div class='ctx'> 	case e1000_ich9lan:</div><div class='hunk'>@@ -591,8 +735,12 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 		mac-&gt;ops.led_on = e1000_led_on_ich8lan;</div><div class='ctx'> 		mac-&gt;ops.led_off = e1000_led_off_ich8lan;</div><div class='ctx'> 		break;</div><div class='del'>-	case e1000_pchlan:</div><div class='ctx'> 	case e1000_pch2lan:</div><div class='add'>+		mac-&gt;rar_entry_count = E1000_PCH2_RAR_ENTRIES;</div><div class='add'>+		mac-&gt;ops.rar_set = e1000_rar_set_pch2lan;</div><div class='add'>+		/* fall-through */</div><div class='add'>+	case e1000_pch_lpt:</div><div class='add'>+	case e1000_pchlan:</div><div class='ctx'> 		/* check management mode */</div><div class='ctx'> 		mac-&gt;ops.check_mng_mode = e1000_check_mng_mode_pchlan;</div><div class='ctx'> 		/* ID LED init */</div><div class='hunk'>@@ -609,12 +757,20 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (mac-&gt;type == e1000_pch_lpt) {</div><div class='add'>+		mac-&gt;rar_entry_count = E1000_PCH_LPT_RAR_ENTRIES;</div><div class='add'>+		mac-&gt;ops.rar_set = e1000_rar_set_pch_lpt;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Enable PCS Lock-loss workaround for ICH8 */</div><div class='ctx'> 	if (mac-&gt;type == e1000_ich8lan)</div><div class='ctx'> 		e1000e_set_kmrn_lock_loss_workaround_ich8lan(hw, true);</div><div class='ctx'> </div><div class='del'>-	/* Gate automatic PHY configuration by hardware on managed 82579 */</div><div class='del'>-	if ((mac-&gt;type == e1000_pch2lan) &amp;&amp;</div><div class='add'>+	/*</div><div class='add'>+	 * Gate automatic PHY configuration by hardware on managed</div><div class='add'>+	 * 82579 and i217</div><div class='add'>+	 */</div><div class='add'>+	if ((mac-&gt;type == e1000_pch2lan || mac-&gt;type == e1000_pch_lpt) &amp;&amp;</div><div class='ctx'> 	    (er32(FWSM) &amp; E1000_ICH_FWSM_FW_VALID))</div><div class='ctx'> 		e1000_gate_hw_phy_config_ich8lan(hw, true);</div><div class='ctx'> </div><div class='hunk'>@@ -630,22 +786,50 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)</div><div class='ctx'>  **/</div><div class='ctx'> static s32 e1000_set_eee_pchlan(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='add'>+	struct e1000_dev_spec_ich8lan *dev_spec = &amp;hw-&gt;dev_spec.ich8lan;</div><div class='ctx'> 	s32 ret_val = 0;</div><div class='ctx'> 	u16 phy_reg;</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;phy.type != e1000_phy_82579)</div><div class='add'>+	if ((hw-&gt;phy.type != e1000_phy_82579) &amp;&amp;</div><div class='add'>+	    (hw-&gt;phy.type != e1000_phy_i217))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ret_val = e1e_rphy(hw, I82579_LPI_CTRL, &amp;phy_reg);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		return ret_val;</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;dev_spec.ich8lan.eee_disable)</div><div class='add'>+	if (dev_spec-&gt;eee_disable)</div><div class='ctx'> 		phy_reg &amp;= ~I82579_LPI_CTRL_ENABLE_MASK;</div><div class='ctx'> 	else</div><div class='ctx'> 		phy_reg |= I82579_LPI_CTRL_ENABLE_MASK;</div><div class='ctx'> </div><div class='del'>-	return e1e_wphy(hw, I82579_LPI_CTRL, phy_reg);</div><div class='add'>+	ret_val = e1e_wphy(hw, I82579_LPI_CTRL, phy_reg);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		return ret_val;</div><div class='add'>+</div><div class='add'>+	if ((hw-&gt;phy.type == e1000_phy_i217) &amp;&amp; !dev_spec-&gt;eee_disable) {</div><div class='add'>+		/* Save off link partner's EEE ability */</div><div class='add'>+		ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='add'>+		if (ret_val)</div><div class='add'>+			return ret_val;</div><div class='add'>+		ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR,</div><div class='add'>+					  I217_EEE_LP_ABILITY);</div><div class='add'>+		if (ret_val)</div><div class='add'>+			goto release;</div><div class='add'>+		e1e_rphy_locked(hw, I82579_EMI_DATA, &amp;dev_spec-&gt;eee_lp_ability);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * EEE is not supported in 100Half, so ignore partner's EEE</div><div class='add'>+		 * in 100 ability if full-duplex is not advertised.</div><div class='add'>+		 */</div><div class='add'>+		e1e_rphy_locked(hw, PHY_LP_ABILITY, &amp;phy_reg);</div><div class='add'>+		if (!(phy_reg &amp; NWAY_LPAR_100TX_FD_CAPS))</div><div class='add'>+			dev_spec-&gt;eee_lp_ability &amp;= ~I217_EEE_100_SUPPORTED;</div><div class='add'>+release:</div><div class='add'>+		hw-&gt;phy.ops.release(hw);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -687,6 +871,9 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 			return ret_val;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Clear link partner's EEE ability */</div><div class='add'>+	hw-&gt;dev_spec.ich8lan.eee_lp_ability = 0;</div><div class='add'>+</div><div class='ctx'> 	if (!link)</div><div class='ctx'> 		return 0; /* No link detected */</div><div class='ctx'> </div><div class='hunk'>@@ -782,6 +969,7 @@ static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case e1000_pchlan:</div><div class='ctx'> 	case e1000_pch2lan:</div><div class='add'>+	case e1000_pch_lpt:</div><div class='ctx'> 		rc = e1000_init_phy_params_pchlan(hw);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -967,6 +1155,145 @@ static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ *  e1000_rar_set_pch2lan - Set receive address register</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @addr: pointer to the receive address</div><div class='add'>+ *  @index: receive address array register</div><div class='add'>+ *</div><div class='add'>+ *  Sets the receive address array register at index to the address passed</div><div class='add'>+ *  in by addr.  For 82579, RAR[0] is the base address register that is to</div><div class='add'>+ *  contain the MAC address but RAR[1-6] are reserved for manageability (ME).</div><div class='add'>+ *  Use SHRA[0-3] in place of those reserved for ME.</div><div class='add'>+ **/</div><div class='add'>+static void e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index)</div><div class='add'>+{</div><div class='add'>+	u32 rar_low, rar_high;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * HW expects these in little endian so we reverse the byte order</div><div class='add'>+	 * from network order (big endian) to little endian</div><div class='add'>+	 */</div><div class='add'>+	rar_low = ((u32)addr[0] |</div><div class='add'>+		   ((u32)addr[1] &lt;&lt; 8) |</div><div class='add'>+		   ((u32)addr[2] &lt;&lt; 16) | ((u32)addr[3] &lt;&lt; 24));</div><div class='add'>+</div><div class='add'>+	rar_high = ((u32)addr[4] | ((u32)addr[5] &lt;&lt; 8));</div><div class='add'>+</div><div class='add'>+	/* If MAC address zero, no need to set the AV bit */</div><div class='add'>+	if (rar_low || rar_high)</div><div class='add'>+		rar_high |= E1000_RAH_AV;</div><div class='add'>+</div><div class='add'>+	if (index == 0) {</div><div class='add'>+		ew32(RAL(index), rar_low);</div><div class='add'>+		e1e_flush();</div><div class='add'>+		ew32(RAH(index), rar_high);</div><div class='add'>+		e1e_flush();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (index &lt; hw-&gt;mac.rar_entry_count) {</div><div class='add'>+		s32 ret_val;</div><div class='add'>+</div><div class='add'>+		ret_val = e1000_acquire_swflag_ich8lan(hw);</div><div class='add'>+		if (ret_val)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		ew32(SHRAL(index - 1), rar_low);</div><div class='add'>+		e1e_flush();</div><div class='add'>+		ew32(SHRAH(index - 1), rar_high);</div><div class='add'>+		e1e_flush();</div><div class='add'>+</div><div class='add'>+		e1000_release_swflag_ich8lan(hw);</div><div class='add'>+</div><div class='add'>+		/* verify the register updates */</div><div class='add'>+		if ((er32(SHRAL(index - 1)) == rar_low) &amp;&amp;</div><div class='add'>+		    (er32(SHRAH(index - 1)) == rar_high))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		e_dbg("SHRA[%d] might be locked by ME - FWSM=0x%8.8x\n",</div><div class='add'>+		      (index - 1), er32(FWSM));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	e_dbg("Failed to write receive address at index %d\n", index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  e1000_rar_set_pch_lpt - Set receive address registers</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @addr: pointer to the receive address</div><div class='add'>+ *  @index: receive address array register</div><div class='add'>+ *</div><div class='add'>+ *  Sets the receive address register array at index to the address passed</div><div class='add'>+ *  in by addr. For LPT, RAR[0] is the base address register that is to</div><div class='add'>+ *  contain the MAC address. SHRA[0-10] are the shared receive address</div><div class='add'>+ *  registers that are shared between the Host and manageability engine (ME).</div><div class='add'>+ **/</div><div class='add'>+static void e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index)</div><div class='add'>+{</div><div class='add'>+	u32 rar_low, rar_high;</div><div class='add'>+	u32 wlock_mac;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * HW expects these in little endian so we reverse the byte order</div><div class='add'>+	 * from network order (big endian) to little endian</div><div class='add'>+	 */</div><div class='add'>+	rar_low = ((u32)addr[0] | ((u32)addr[1] &lt;&lt; 8) |</div><div class='add'>+		   ((u32)addr[2] &lt;&lt; 16) | ((u32)addr[3] &lt;&lt; 24));</div><div class='add'>+</div><div class='add'>+	rar_high = ((u32)addr[4] | ((u32)addr[5] &lt;&lt; 8));</div><div class='add'>+</div><div class='add'>+	/* If MAC address zero, no need to set the AV bit */</div><div class='add'>+	if (rar_low || rar_high)</div><div class='add'>+		rar_high |= E1000_RAH_AV;</div><div class='add'>+</div><div class='add'>+	if (index == 0) {</div><div class='add'>+		ew32(RAL(index), rar_low);</div><div class='add'>+		e1e_flush();</div><div class='add'>+		ew32(RAH(index), rar_high);</div><div class='add'>+		e1e_flush();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The manageability engine (ME) can lock certain SHRAR registers that</div><div class='add'>+	 * it is using - those registers are unavailable for use.</div><div class='add'>+	 */</div><div class='add'>+	if (index &lt; hw-&gt;mac.rar_entry_count) {</div><div class='add'>+		wlock_mac = er32(FWSM) &amp; E1000_FWSM_WLOCK_MAC_MASK;</div><div class='add'>+		wlock_mac &gt;&gt;= E1000_FWSM_WLOCK_MAC_SHIFT;</div><div class='add'>+</div><div class='add'>+		/* Check if all SHRAR registers are locked */</div><div class='add'>+		if (wlock_mac == 1)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		if ((wlock_mac == 0) || (index &lt;= wlock_mac)) {</div><div class='add'>+			s32 ret_val;</div><div class='add'>+</div><div class='add'>+			ret_val = e1000_acquire_swflag_ich8lan(hw);</div><div class='add'>+</div><div class='add'>+			if (ret_val)</div><div class='add'>+				goto out;</div><div class='add'>+</div><div class='add'>+			ew32(SHRAL_PCH_LPT(index - 1), rar_low);</div><div class='add'>+			e1e_flush();</div><div class='add'>+			ew32(SHRAH_PCH_LPT(index - 1), rar_high);</div><div class='add'>+			e1e_flush();</div><div class='add'>+</div><div class='add'>+			e1000_release_swflag_ich8lan(hw);</div><div class='add'>+</div><div class='add'>+			/* verify the register updates */</div><div class='add'>+			if ((er32(SHRAL_PCH_LPT(index - 1)) == rar_low) &amp;&amp;</div><div class='add'>+			    (er32(SHRAH_PCH_LPT(index - 1)) == rar_high))</div><div class='add'>+				return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	e_dbg("Failed to write receive address at index %d\n", index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  *  e1000_check_reset_block_ich8lan - Check if PHY reset is blocked</div><div class='ctx'>  *  @hw: pointer to the HW structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -994,6 +1321,8 @@ static s32 e1000_write_smbus_addr(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	u16 phy_data;</div><div class='ctx'> 	u32 strap = er32(STRAP);</div><div class='add'>+	u32 freq = (strap &amp; E1000_STRAP_SMT_FREQ_MASK) &gt;&gt;</div><div class='add'>+	    E1000_STRAP_SMT_FREQ_SHIFT;</div><div class='ctx'> 	s32 ret_val = 0;</div><div class='ctx'> </div><div class='ctx'> 	strap &amp;= E1000_STRAP_SMBUS_ADDRESS_MASK;</div><div class='hunk'>@@ -1006,6 +1335,19 @@ static s32 e1000_write_smbus_addr(struct e1000_hw *hw)</div><div class='ctx'> 	phy_data |= (strap &gt;&gt; E1000_STRAP_SMBUS_ADDRESS_SHIFT);</div><div class='ctx'> 	phy_data |= HV_SMB_ADDR_PEC_EN | HV_SMB_ADDR_VALID;</div><div class='ctx'> </div><div class='add'>+	if (hw-&gt;phy.type == e1000_phy_i217) {</div><div class='add'>+		/* Restore SMBus frequency */</div><div class='add'>+		if (freq--) {</div><div class='add'>+			phy_data &amp;= ~HV_SMB_ADDR_FREQ_MASK;</div><div class='add'>+			phy_data |= (freq &amp; (1 &lt;&lt; 0)) &lt;&lt;</div><div class='add'>+			    HV_SMB_ADDR_FREQ_LOW_SHIFT;</div><div class='add'>+			phy_data |= (freq &amp; (1 &lt;&lt; 1)) &lt;&lt;</div><div class='add'>+			    (HV_SMB_ADDR_FREQ_HIGH_SHIFT - 1);</div><div class='add'>+		} else {</div><div class='add'>+			e_dbg("Unsupported SMB frequency in PHY\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, phy_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1043,6 +1385,7 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 		/* Fall-thru */</div><div class='ctx'> 	case e1000_pchlan:</div><div class='ctx'> 	case e1000_pch2lan:</div><div class='add'>+	case e1000_pch_lpt:</div><div class='ctx'> 		sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1062,10 +1405,9 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	 * extended configuration before SW configuration</div><div class='ctx'> 	 */</div><div class='ctx'> 	data = er32(EXTCNF_CTRL);</div><div class='del'>-	if (!(hw-&gt;mac.type == e1000_pch2lan)) {</div><div class='del'>-		if (data &amp; E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE)</div><div class='del'>-			goto release;</div><div class='del'>-	}</div><div class='add'>+	if ((hw-&gt;mac.type &lt; e1000_pch2lan) &amp;&amp;</div><div class='add'>+	    (data &amp; E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE))</div><div class='add'>+		goto release;</div><div class='ctx'> </div><div class='ctx'> 	cnf_size = er32(EXTCNF_SIZE);</div><div class='ctx'> 	cnf_size &amp;= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK;</div><div class='hunk'>@@ -1076,9 +1418,9 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	cnf_base_addr = data &amp; E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK;</div><div class='ctx'> 	cnf_base_addr &gt;&gt;= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT;</div><div class='ctx'> </div><div class='del'>-	if ((!(data &amp; E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) &amp;&amp;</div><div class='del'>-	    (hw-&gt;mac.type == e1000_pchlan)) ||</div><div class='del'>-	     (hw-&gt;mac.type == e1000_pch2lan)) {</div><div class='add'>+	if (((hw-&gt;mac.type == e1000_pchlan) &amp;&amp;</div><div class='add'>+	     !(data &amp; E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE)) ||</div><div class='add'>+	    (hw-&gt;mac.type &gt; e1000_pchlan)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * HW configures the SMBus address and LEDs when the</div><div class='ctx'> 		 * OEM and LCD Write Enable bits are set in the NVM.</div><div class='hunk'>@@ -1121,8 +1463,7 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 		reg_addr &amp;= PHY_REG_MASK;</div><div class='ctx'> 		reg_addr |= phy_page;</div><div class='ctx'> </div><div class='del'>-		ret_val = phy-&gt;ops.write_reg_locked(hw, (u32)reg_addr,</div><div class='del'>-						    reg_data);</div><div class='add'>+		ret_val = e1e_wphy_locked(hw, (u32)reg_addr, reg_data);</div><div class='ctx'> 		if (ret_val)</div><div class='ctx'> 			goto release;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1159,8 +1500,8 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)</div><div class='ctx'> 	/* Disable K1 when link is 1Gbps, otherwise use the NVM setting */</div><div class='ctx'> 	if (link) {</div><div class='ctx'> 		if (hw-&gt;phy.type == e1000_phy_82578) {</div><div class='del'>-			ret_val = hw-&gt;phy.ops.read_reg_locked(hw, BM_CS_STATUS,</div><div class='del'>-			                                          &amp;status_reg);</div><div class='add'>+			ret_val = e1e_rphy_locked(hw, BM_CS_STATUS,</div><div class='add'>+						  &amp;status_reg);</div><div class='ctx'> 			if (ret_val)</div><div class='ctx'> 				goto release;</div><div class='ctx'> </div><div class='hunk'>@@ -1175,8 +1516,7 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (hw-&gt;phy.type == e1000_phy_82577) {</div><div class='del'>-			ret_val = hw-&gt;phy.ops.read_reg_locked(hw, HV_M_STATUS,</div><div class='del'>-			                                          &amp;status_reg);</div><div class='add'>+			ret_val = e1e_rphy_locked(hw, HV_M_STATUS, &amp;status_reg);</div><div class='ctx'> 			if (ret_val)</div><div class='ctx'> 				goto release;</div><div class='ctx'> </div><div class='hunk'>@@ -1191,15 +1531,13 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Link stall fix for link up */</div><div class='del'>-		ret_val = hw-&gt;phy.ops.write_reg_locked(hw, PHY_REG(770, 19),</div><div class='del'>-		                                           0x0100);</div><div class='add'>+		ret_val = e1e_wphy_locked(hw, PHY_REG(770, 19), 0x0100);</div><div class='ctx'> 		if (ret_val)</div><div class='ctx'> 			goto release;</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Link stall fix for link down */</div><div class='del'>-		ret_val = hw-&gt;phy.ops.write_reg_locked(hw, PHY_REG(770, 19),</div><div class='del'>-		                                           0x4100);</div><div class='add'>+		ret_val = e1e_wphy_locked(hw, PHY_REG(770, 19), 0x4100);</div><div class='ctx'> 		if (ret_val)</div><div class='ctx'> 			goto release;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1279,14 +1617,14 @@ static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)</div><div class='ctx'> 	u32 mac_reg;</div><div class='ctx'> 	u16 oem_reg;</div><div class='ctx'> </div><div class='del'>-	if ((hw-&gt;mac.type != e1000_pch2lan) &amp;&amp; (hw-&gt;mac.type != e1000_pchlan))</div><div class='add'>+	if (hw-&gt;mac.type &lt; e1000_pchlan)</div><div class='ctx'> 		return ret_val;</div><div class='ctx'> </div><div class='ctx'> 	ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		return ret_val;</div><div class='ctx'> </div><div class='del'>-	if (!(hw-&gt;mac.type == e1000_pch2lan)) {</div><div class='add'>+	if (hw-&gt;mac.type == e1000_pchlan) {</div><div class='ctx'> 		mac_reg = er32(EXTCNF_CTRL);</div><div class='ctx'> 		if (mac_reg &amp; E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE)</div><div class='ctx'> 			goto release;</div><div class='hunk'>@@ -1298,7 +1636,7 @@ static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)</div><div class='ctx'> </div><div class='ctx'> 	mac_reg = er32(PHY_CTRL);</div><div class='ctx'> </div><div class='del'>-	ret_val = hw-&gt;phy.ops.read_reg_locked(hw, HV_OEM_BITS, &amp;oem_reg);</div><div class='add'>+	ret_val = e1e_rphy_locked(hw, HV_OEM_BITS, &amp;oem_reg);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		goto release;</div><div class='ctx'> </div><div class='hunk'>@@ -1325,7 +1663,7 @@ static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)</div><div class='ctx'> 	    !hw-&gt;phy.ops.check_reset_block(hw))</div><div class='ctx'> 		oem_reg |= HV_OEM_BITS_RESTART_AN;</div><div class='ctx'> </div><div class='del'>-	ret_val = hw-&gt;phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg);</div><div class='add'>+	ret_val = e1e_wphy_locked(hw, HV_OEM_BITS, oem_reg);</div><div class='ctx'> </div><div class='ctx'> release:</div><div class='ctx'> 	hw-&gt;phy.ops.release(hw);</div><div class='hunk'>@@ -1421,11 +1759,10 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		return ret_val;</div><div class='del'>-	ret_val = hw-&gt;phy.ops.read_reg_locked(hw, BM_PORT_GEN_CFG, &amp;phy_data);</div><div class='add'>+	ret_val = e1e_rphy_locked(hw, BM_PORT_GEN_CFG, &amp;phy_data);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		goto release;</div><div class='del'>-	ret_val = hw-&gt;phy.ops.write_reg_locked(hw, BM_PORT_GEN_CFG,</div><div class='del'>-					       phy_data &amp; 0x00FF);</div><div class='add'>+	ret_val = e1e_wphy_locked(hw, BM_PORT_GEN_CFG, phy_data &amp; 0x00FF);</div><div class='ctx'> release:</div><div class='ctx'> 	hw-&gt;phy.ops.release(hw);</div><div class='ctx'> </div><div class='hunk'>@@ -1484,7 +1821,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable)</div><div class='ctx'> 	u32 mac_reg;</div><div class='ctx'> 	u16 i;</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;mac.type != e1000_pch2lan)</div><div class='add'>+	if (hw-&gt;mac.type &lt; e1000_pch2lan)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* disable Rx path while enabling/disabling workaround */</div><div class='hunk'>@@ -1657,20 +1994,18 @@ static s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		return ret_val;</div><div class='del'>-	ret_val = hw-&gt;phy.ops.write_reg_locked(hw, I82579_EMI_ADDR,</div><div class='del'>-					       I82579_MSE_THRESHOLD);</div><div class='add'>+	ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, I82579_MSE_THRESHOLD);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		goto release;</div><div class='ctx'> 	/* set MSE higher to enable link to stay up when noise is high */</div><div class='del'>-	ret_val = hw-&gt;phy.ops.write_reg_locked(hw, I82579_EMI_DATA, 0x0034);</div><div class='add'>+	ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, 0x0034);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		goto release;</div><div class='del'>-	ret_val = hw-&gt;phy.ops.write_reg_locked(hw, I82579_EMI_ADDR,</div><div class='del'>-					       I82579_MSE_LINK_DOWN);</div><div class='add'>+	ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, I82579_MSE_LINK_DOWN);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		goto release;</div><div class='ctx'> 	/* drop link after 5 times MSE threshold was reached */</div><div class='del'>-	ret_val = hw-&gt;phy.ops.write_reg_locked(hw, I82579_EMI_DATA, 0x0005);</div><div class='add'>+	ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, 0x0005);</div><div class='ctx'> release:</div><div class='ctx'> 	hw-&gt;phy.ops.release(hw);</div><div class='ctx'> </div><div class='hunk'>@@ -1708,8 +2043,18 @@ static s32 e1000_k1_workaround_lv(struct e1000_hw *hw)</div><div class='ctx'> 			return ret_val;</div><div class='ctx'> </div><div class='ctx'> 		if (status_reg &amp; HV_M_STATUS_SPEED_1000) {</div><div class='add'>+			u16 pm_phy_reg;</div><div class='add'>+</div><div class='ctx'> 			mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_8USEC;</div><div class='ctx'> 			phy_reg &amp;= ~I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT;</div><div class='add'>+			/* LV 1G Packet drop issue wa  */</div><div class='add'>+			ret_val = e1e_rphy(hw, HV_PM_CTRL, &amp;pm_phy_reg);</div><div class='add'>+			if (ret_val)</div><div class='add'>+				return ret_val;</div><div class='add'>+			pm_phy_reg &amp;= ~HV_PM_CTRL_PLL_STOP_IN_K1_GIGA;</div><div class='add'>+			ret_val = e1e_wphy(hw, HV_PM_CTRL, pm_phy_reg);</div><div class='add'>+			if (ret_val)</div><div class='add'>+				return ret_val;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_16USEC;</div><div class='ctx'> 			phy_reg |= I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT;</div><div class='hunk'>@@ -1733,7 +2078,7 @@ static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate)</div><div class='ctx'> {</div><div class='ctx'> 	u32 extcnf_ctrl;</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;mac.type != e1000_pch2lan)</div><div class='add'>+	if (hw-&gt;mac.type &lt; e1000_pch2lan)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	extcnf_ctrl = er32(EXTCNF_CTRL);</div><div class='hunk'>@@ -1835,12 +2180,10 @@ static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 		ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='ctx'> 		if (ret_val)</div><div class='ctx'> 			return ret_val;</div><div class='del'>-		ret_val = hw-&gt;phy.ops.write_reg_locked(hw, I82579_EMI_ADDR,</div><div class='del'>-						       I82579_LPI_UPDATE_TIMER);</div><div class='add'>+		ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR,</div><div class='add'>+					  I82579_LPI_UPDATE_TIMER);</div><div class='ctx'> 		if (!ret_val)</div><div class='del'>-			ret_val = hw-&gt;phy.ops.write_reg_locked(hw,</div><div class='del'>-							       I82579_EMI_DATA,</div><div class='del'>-							       0x1387);</div><div class='add'>+			ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, 0x1387);</div><div class='ctx'> 		hw-&gt;phy.ops.release(hw);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2213,7 +2556,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);</div><div class='ctx'> </div><div class='ctx'> 	/* Check if the flash descriptor is valid */</div><div class='del'>-	if (hsfsts.hsf_status.fldesvalid == 0) {</div><div class='add'>+	if (!hsfsts.hsf_status.fldesvalid) {</div><div class='ctx'> 		e_dbg("Flash descriptor invalid.  SW Sequencing must be used.\n");</div><div class='ctx'> 		return -E1000_ERR_NVM;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2233,7 +2576,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	 * completed.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	if (hsfsts.hsf_status.flcinprog == 0) {</div><div class='add'>+	if (!hsfsts.hsf_status.flcinprog) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * There is no cycle running at present,</div><div class='ctx'> 		 * so we can start a cycle.</div><div class='hunk'>@@ -2251,7 +2594,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 		 */</div><div class='ctx'> 		for (i = 0; i &lt; ICH_FLASH_READ_COMMAND_TIMEOUT; i++) {</div><div class='ctx'> 			hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);</div><div class='del'>-			if (hsfsts.hsf_status.flcinprog == 0) {</div><div class='add'>+			if (!hsfsts.hsf_status.flcinprog) {</div><div class='ctx'> 				ret_val = 0;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -2293,12 +2636,12 @@ static s32 e1000_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout)</div><div class='ctx'> 	/* wait till FDONE bit is set to 1 */</div><div class='ctx'> 	do {</div><div class='ctx'> 		hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);</div><div class='del'>-		if (hsfsts.hsf_status.flcdone == 1)</div><div class='add'>+		if (hsfsts.hsf_status.flcdone)</div><div class='ctx'> 			break;</div><div class='ctx'> 		udelay(1);</div><div class='ctx'> 	} while (i++ &lt; timeout);</div><div class='ctx'> </div><div class='del'>-	if (hsfsts.hsf_status.flcdone == 1 &amp;&amp; hsfsts.hsf_status.flcerr == 0)</div><div class='add'>+	if (hsfsts.hsf_status.flcdone &amp;&amp; !hsfsts.hsf_status.flcerr)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	return -E1000_ERR_NVM;</div><div class='hunk'>@@ -2409,10 +2752,10 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,</div><div class='ctx'> 			 * ICH_FLASH_CYCLE_REPEAT_COUNT times.</div><div class='ctx'> 			 */</div><div class='ctx'> 			hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);</div><div class='del'>-			if (hsfsts.hsf_status.flcerr == 1) {</div><div class='add'>+			if (hsfsts.hsf_status.flcerr) {</div><div class='ctx'> 				/* Repeat for some time before giving up. */</div><div class='ctx'> 				continue;</div><div class='del'>-			} else if (hsfsts.hsf_status.flcdone == 0) {</div><div class='add'>+			} else if (!hsfsts.hsf_status.flcdone) {</div><div class='ctx'> 				e_dbg("Timeout error - flash cycle did not complete.\n");</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -2642,7 +2985,7 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		return ret_val;</div><div class='ctx'> </div><div class='del'>-	if ((data &amp; 0x40) == 0) {</div><div class='add'>+	if (!(data &amp; 0x40)) {</div><div class='ctx'> 		data |= 0x40;</div><div class='ctx'> 		ret_val = e1000_write_nvm(hw, 0x19, 1, &amp;data);</div><div class='ctx'> 		if (ret_val)</div><div class='hunk'>@@ -2760,10 +3103,10 @@ static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,</div><div class='ctx'> 		 * try...ICH_FLASH_CYCLE_REPEAT_COUNT times.</div><div class='ctx'> 		 */</div><div class='ctx'> 		hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);</div><div class='del'>-		if (hsfsts.hsf_status.flcerr == 1)</div><div class='add'>+		if (hsfsts.hsf_status.flcerr)</div><div class='ctx'> 			/* Repeat for some time before giving up. */</div><div class='ctx'> 			continue;</div><div class='del'>-		if (hsfsts.hsf_status.flcdone == 0) {</div><div class='add'>+		if (!hsfsts.hsf_status.flcdone) {</div><div class='ctx'> 			e_dbg("Timeout error - flash cycle did not complete.\n");</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2915,10 +3258,10 @@ static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)</div><div class='ctx'> 			 * a few more times else Done</div><div class='ctx'> 			 */</div><div class='ctx'> 			hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);</div><div class='del'>-			if (hsfsts.hsf_status.flcerr == 1)</div><div class='add'>+			if (hsfsts.hsf_status.flcerr)</div><div class='ctx'> 				/* repeat for some time before giving up */</div><div class='ctx'> 				continue;</div><div class='del'>-			else if (hsfsts.hsf_status.flcdone == 0)</div><div class='add'>+			else if (!hsfsts.hsf_status.flcdone)</div><div class='ctx'> 				return ret_val;</div><div class='ctx'> 		} while (++count &lt; ICH_FLASH_CYCLE_REPEAT_COUNT);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3060,8 +3403,8 @@ static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_dev_spec_ich8lan *dev_spec = &amp;hw-&gt;dev_spec.ich8lan;</div><div class='del'>-	u16 reg;</div><div class='del'>-	u32 ctrl, kab;</div><div class='add'>+	u16 kum_cfg;</div><div class='add'>+	u32 ctrl, reg;</div><div class='ctx'> 	s32 ret_val;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -3095,12 +3438,12 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (hw-&gt;mac.type == e1000_pchlan) {</div><div class='del'>-		/* Save the NVM K1 bit setting*/</div><div class='del'>-		ret_val = e1000_read_nvm(hw, E1000_NVM_K1_CONFIG, 1, &amp;reg);</div><div class='add'>+		/* Save the NVM K1 bit setting */</div><div class='add'>+		ret_val = e1000_read_nvm(hw, E1000_NVM_K1_CONFIG, 1, &amp;kum_cfg);</div><div class='ctx'> 		if (ret_val)</div><div class='ctx'> 			return ret_val;</div><div class='ctx'> </div><div class='del'>-		if (reg &amp; E1000_NVM_K1_ENABLE)</div><div class='add'>+		if (kum_cfg &amp; E1000_NVM_K1_ENABLE)</div><div class='ctx'> 			dev_spec-&gt;nvm_k1_enabled = true;</div><div class='ctx'> 		else</div><div class='ctx'> 			dev_spec-&gt;nvm_k1_enabled = false;</div><div class='hunk'>@@ -3130,6 +3473,14 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	/* cannot issue a flush here because it hangs the hardware */</div><div class='ctx'> 	msleep(20);</div><div class='ctx'> </div><div class='add'>+	/* Set Phy Config Counter to 50msec */</div><div class='add'>+	if (hw-&gt;mac.type == e1000_pch2lan) {</div><div class='add'>+		reg = er32(FEXTNVM3);</div><div class='add'>+		reg &amp;= ~E1000_FEXTNVM3_PHY_CFG_COUNTER_MASK;</div><div class='add'>+		reg |= E1000_FEXTNVM3_PHY_CFG_COUNTER_50MSEC;</div><div class='add'>+		ew32(FEXTNVM3, reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!ret_val)</div><div class='ctx'> 		clear_bit(__E1000_ACCESS_SHARED_RESOURCE, &amp;hw-&gt;adapter-&gt;state);</div><div class='ctx'> </div><div class='hunk'>@@ -3154,9 +3505,9 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	ew32(IMC, 0xffffffff);</div><div class='ctx'> 	er32(ICR);</div><div class='ctx'> </div><div class='del'>-	kab = er32(KABGTXD);</div><div class='del'>-	kab |= E1000_KABGTXD_BGSQLBIAS;</div><div class='del'>-	ew32(KABGTXD, kab);</div><div class='add'>+	reg = er32(KABGTXD);</div><div class='add'>+	reg |= E1000_KABGTXD_BGSQLBIAS;</div><div class='add'>+	ew32(KABGTXD, reg);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3309,6 +3660,13 @@ static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	 */</div><div class='ctx'> 	reg = er32(RFCTL);</div><div class='ctx'> 	reg |= (E1000_RFCTL_NFSW_DIS | E1000_RFCTL_NFSR_DIS);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable IPv6 extension header parsing because some malformed</div><div class='add'>+	 * IPv6 headers can hang the Rx.</div><div class='add'>+	 */</div><div class='add'>+	if (hw-&gt;mac.type == e1000_ich8lan)</div><div class='add'>+		reg |= (E1000_RFCTL_IPV6_EX_DIS | E1000_RFCTL_NEW_IPV6_EXT_DIS);</div><div class='ctx'> 	ew32(RFCTL, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3359,6 +3717,7 @@ static s32 e1000_setup_link_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	ew32(FCTTV, hw-&gt;fc.pause_time);</div><div class='ctx'> 	if ((hw-&gt;phy.type == e1000_phy_82578) ||</div><div class='ctx'> 	    (hw-&gt;phy.type == e1000_phy_82579) ||</div><div class='add'>+	    (hw-&gt;phy.type == e1000_phy_i217) ||</div><div class='ctx'> 	    (hw-&gt;phy.type == e1000_phy_82577)) {</div><div class='ctx'> 		ew32(FCRTV_PCH, hw-&gt;fc.refresh_time);</div><div class='ctx'> </div><div class='hunk'>@@ -3422,6 +3781,7 @@ static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case e1000_phy_82577:</div><div class='ctx'> 	case e1000_phy_82579:</div><div class='add'>+	case e1000_phy_i217:</div><div class='ctx'> 		ret_val = e1000_copper_link_setup_82577(hw);</div><div class='ctx'> 		if (ret_val)</div><div class='ctx'> 			return ret_val;</div><div class='hunk'>@@ -3668,14 +4028,88 @@ void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw)</div><div class='ctx'>  *  the LPLU setting in the NVM or custom setting.  For PCH and newer parts,</div><div class='ctx'>  *  the OEM bits PHY register (LED, GbE disable and LPLU configurations) also</div><div class='ctx'>  *  needs to be written.</div><div class='add'>+ *  Parts that support (and are linked to a partner which support) EEE in</div><div class='add'>+ *  100Mbps should disable LPLU since 100Mbps w/ EEE requires less power</div><div class='add'>+ *  than 10Mbps w/o EEE.</div><div class='ctx'>  **/</div><div class='ctx'> void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='add'>+	struct e1000_dev_spec_ich8lan *dev_spec = &amp;hw-&gt;dev_spec.ich8lan;</div><div class='ctx'> 	u32 phy_ctrl;</div><div class='ctx'> 	s32 ret_val;</div><div class='ctx'> </div><div class='ctx'> 	phy_ctrl = er32(PHY_CTRL);</div><div class='ctx'> 	phy_ctrl |= E1000_PHY_CTRL_GBE_DISABLE;</div><div class='add'>+	if (hw-&gt;phy.type == e1000_phy_i217) {</div><div class='add'>+		u16 phy_reg;</div><div class='add'>+</div><div class='add'>+		ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='add'>+		if (ret_val)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		if (!dev_spec-&gt;eee_disable) {</div><div class='add'>+			u16 eee_advert;</div><div class='add'>+</div><div class='add'>+			ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR,</div><div class='add'>+						  I217_EEE_ADVERTISEMENT);</div><div class='add'>+			if (ret_val)</div><div class='add'>+				goto release;</div><div class='add'>+			e1e_rphy_locked(hw, I82579_EMI_DATA, &amp;eee_advert);</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Disable LPLU if both link partners support 100BaseT</div><div class='add'>+			 * EEE and 100Full is advertised on both ends of the</div><div class='add'>+			 * link.</div><div class='add'>+			 */</div><div class='add'>+			if ((eee_advert &amp; I217_EEE_100_SUPPORTED) &amp;&amp;</div><div class='add'>+			    (dev_spec-&gt;eee_lp_ability &amp;</div><div class='add'>+			     I217_EEE_100_SUPPORTED) &amp;&amp;</div><div class='add'>+			    (hw-&gt;phy.autoneg_advertised &amp; ADVERTISE_100_FULL))</div><div class='add'>+				phy_ctrl &amp;= ~(E1000_PHY_CTRL_D0A_LPLU |</div><div class='add'>+					      E1000_PHY_CTRL_NOND0A_LPLU);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * For i217 Intel Rapid Start Technology support,</div><div class='add'>+		 * when the system is going into Sx and no manageability engine</div><div class='add'>+		 * is present, the driver must configure proxy to reset only on</div><div class='add'>+		 * power good.  LPI (Low Power Idle) state must also reset only</div><div class='add'>+		 * on power good, as well as the MTA (Multicast table array).</div><div class='add'>+		 * The SMBus release must also be disabled on LCD reset.</div><div class='add'>+		 */</div><div class='add'>+		if (!(er32(FWSM) &amp; E1000_ICH_FWSM_FW_VALID)) {</div><div class='add'>+</div><div class='add'>+			/* Enable proxy to reset only on power good. */</div><div class='add'>+			e1e_rphy_locked(hw, I217_PROXY_CTRL, &amp;phy_reg);</div><div class='add'>+			phy_reg |= I217_PROXY_CTRL_AUTO_DISABLE;</div><div class='add'>+			e1e_wphy_locked(hw, I217_PROXY_CTRL, phy_reg);</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Set bit enable LPI (EEE) to reset only on</div><div class='add'>+			 * power good.</div><div class='add'>+			 */</div><div class='add'>+			e1e_rphy_locked(hw, I217_SxCTRL, &amp;phy_reg);</div><div class='add'>+			phy_reg |= I217_SxCTRL_ENABLE_LPI_RESET;</div><div class='add'>+			e1e_wphy_locked(hw, I217_SxCTRL, phy_reg);</div><div class='add'>+</div><div class='add'>+			/* Disable the SMB release on LCD reset. */</div><div class='add'>+			e1e_rphy_locked(hw, I217_MEMPWR, &amp;phy_reg);</div><div class='add'>+			phy_reg &amp;= ~I217_MEMPWR_DISABLE_SMB_RELEASE;</div><div class='add'>+			e1e_wphy_locked(hw, I217_MEMPWR, phy_reg);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Enable MTA to reset for Intel Rapid Start Technology</div><div class='add'>+		 * Support</div><div class='add'>+		 */</div><div class='add'>+		e1e_rphy_locked(hw, I217_CGFREG, &amp;phy_reg);</div><div class='add'>+		phy_reg |= I217_CGFREG_ENABLE_MTA_RESET;</div><div class='add'>+		e1e_wphy_locked(hw, I217_CGFREG, phy_reg);</div><div class='add'>+</div><div class='add'>+release:</div><div class='add'>+		hw-&gt;phy.ops.release(hw);</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='ctx'> 	ew32(PHY_CTRL, phy_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	if (hw-&gt;mac.type == e1000_ich8lan)</div><div class='hunk'>@@ -3704,44 +4138,61 @@ void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw)</div><div class='ctx'>  *  on which PHY resets are not blocked, if the PHY registers cannot be</div><div class='ctx'>  *  accessed properly by the s/w toggle the LANPHYPC value to power cycle</div><div class='ctx'>  *  the PHY.</div><div class='add'>+ *  On i217, setup Intel Rapid Start Technology.</div><div class='ctx'>  **/</div><div class='ctx'> void e1000_resume_workarounds_pchlan(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	u16 phy_id1, phy_id2;</div><div class='ctx'> 	s32 ret_val;</div><div class='ctx'> </div><div class='del'>-	if ((hw-&gt;mac.type != e1000_pch2lan) ||</div><div class='del'>-	    hw-&gt;phy.ops.check_reset_block(hw))</div><div class='add'>+	if (hw-&gt;mac.type &lt; e1000_pch2lan)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='add'>+	ret_val = e1000_init_phy_workarounds_pchlan(hw);</div><div class='ctx'> 	if (ret_val) {</div><div class='del'>-		e_dbg("Failed to acquire PHY semaphore in resume\n");</div><div class='add'>+		e_dbg("Failed to init PHY flow ret_val=%d\n", ret_val);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Test access to the PHY registers by reading the ID regs */</div><div class='del'>-	ret_val = hw-&gt;phy.ops.read_reg_locked(hw, PHY_ID1, &amp;phy_id1);</div><div class='del'>-	if (ret_val)</div><div class='del'>-		goto release;</div><div class='del'>-	ret_val = hw-&gt;phy.ops.read_reg_locked(hw, PHY_ID2, &amp;phy_id2);</div><div class='del'>-	if (ret_val)</div><div class='del'>-		goto release;</div><div class='del'>-</div><div class='del'>-	if (hw-&gt;phy.id == ((u32)(phy_id1 &lt;&lt; 16) |</div><div class='del'>-			   (u32)(phy_id2 &amp; PHY_REVISION_MASK)))</div><div class='del'>-		goto release;</div><div class='add'>+	/*</div><div class='add'>+	 * For i217 Intel Rapid Start Technology support when the system</div><div class='add'>+	 * is transitioning from Sx and no manageability engine is present</div><div class='add'>+	 * configure SMBus to restore on reset, disable proxy, and enable</div><div class='add'>+	 * the reset on MTA (Multicast table array).</div><div class='add'>+	 */</div><div class='add'>+	if (hw-&gt;phy.type == e1000_phy_i217) {</div><div class='add'>+		u16 phy_reg;</div><div class='ctx'> </div><div class='del'>-	e1000_toggle_lanphypc_value_ich8lan(hw);</div><div class='add'>+		ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='add'>+		if (ret_val) {</div><div class='add'>+			e_dbg("Failed to setup iRST\n");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	hw-&gt;phy.ops.release(hw);</div><div class='del'>-	msleep(50);</div><div class='del'>-	e1000_phy_hw_reset(hw);</div><div class='del'>-	msleep(50);</div><div class='del'>-	return;</div><div class='add'>+		if (!(er32(FWSM) &amp; E1000_ICH_FWSM_FW_VALID)) {</div><div class='add'>+			/*</div><div class='add'>+			 * Restore clear on SMB if no manageability engine</div><div class='add'>+			 * is present</div><div class='add'>+			 */</div><div class='add'>+			ret_val = e1e_rphy_locked(hw, I217_MEMPWR, &amp;phy_reg);</div><div class='add'>+			if (ret_val)</div><div class='add'>+				goto release;</div><div class='add'>+			phy_reg |= I217_MEMPWR_DISABLE_SMB_RELEASE;</div><div class='add'>+			e1e_wphy_locked(hw, I217_MEMPWR, phy_reg);</div><div class='ctx'> </div><div class='add'>+			/* Disable Proxy */</div><div class='add'>+			e1e_wphy_locked(hw, I217_PROXY_CTRL, 0);</div><div class='add'>+		}</div><div class='add'>+		/* Enable reset on MTA */</div><div class='add'>+		ret_val = e1e_rphy_locked(hw, I217_CGFREG, &amp;phy_reg);</div><div class='add'>+		if (ret_val)</div><div class='add'>+			goto release;</div><div class='add'>+		phy_reg &amp;= ~I217_CGFREG_ENABLE_MTA_RESET;</div><div class='add'>+		e1e_wphy_locked(hw, I217_CGFREG, phy_reg);</div><div class='ctx'> release:</div><div class='del'>-	hw-&gt;phy.ops.release(hw);</div><div class='add'>+		if (ret_val)</div><div class='add'>+			e_dbg("Error %d in resume workarounds\n", ret_val);</div><div class='add'>+		hw-&gt;phy.ops.release(hw);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3921,7 +4372,7 @@ static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	/* If EEPROM is not marked present, init the IGP 3 PHY manually */</div><div class='ctx'> 	if (hw-&gt;mac.type &lt;= e1000_ich9lan) {</div><div class='del'>-		if (((er32(EECD) &amp; E1000_EECD_PRES) == 0) &amp;&amp;</div><div class='add'>+		if (!(er32(EECD) &amp; E1000_EECD_PRES) &amp;&amp;</div><div class='ctx'> 		    (hw-&gt;phy.type == e1000_phy_igp_3)) {</div><div class='ctx'> 			e1000e_phy_init_script_igp3(hw);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3982,6 +4433,7 @@ static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	/* Clear PHY statistics registers */</div><div class='ctx'> 	if ((hw-&gt;phy.type == e1000_phy_82578) ||</div><div class='ctx'> 	    (hw-&gt;phy.type == e1000_phy_82579) ||</div><div class='add'>+	    (hw-&gt;phy.type == e1000_phy_i217) ||</div><div class='ctx'> 	    (hw-&gt;phy.type == e1000_phy_82577)) {</div><div class='ctx'> 		ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='ctx'> 		if (ret_val)</div><div class='hunk'>@@ -4026,6 +4478,7 @@ static const struct e1000_mac_operations ich8_mac_ops = {</div><div class='ctx'> 	.setup_physical_interface= e1000_setup_copper_link_ich8lan,</div><div class='ctx'> 	/* id_led_init dependent on mac type */</div><div class='ctx'> 	.config_collision_dist	= e1000e_config_collision_dist_generic,</div><div class='add'>+	.rar_set		= e1000e_rar_set_generic,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct e1000_phy_operations ich8_phy_ops = {</div><div class='hunk'>@@ -4140,3 +4593,22 @@ const struct e1000_info e1000_pch2_info = {</div><div class='ctx'> 	.phy_ops		= &amp;ich8_phy_ops,</div><div class='ctx'> 	.nvm_ops		= &amp;ich8_nvm_ops,</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+const struct e1000_info e1000_pch_lpt_info = {</div><div class='add'>+	.mac			= e1000_pch_lpt,</div><div class='add'>+	.flags			= FLAG_IS_ICH</div><div class='add'>+				  | FLAG_HAS_WOL</div><div class='add'>+				  | FLAG_HAS_CTRLEXT_ON_LOAD</div><div class='add'>+				  | FLAG_HAS_AMT</div><div class='add'>+				  | FLAG_HAS_FLASH</div><div class='add'>+				  | FLAG_HAS_JUMBO_FRAMES</div><div class='add'>+				  | FLAG_APME_IN_WUC,</div><div class='add'>+	.flags2			= FLAG2_HAS_PHY_STATS</div><div class='add'>+				  | FLAG2_HAS_EEE,</div><div class='add'>+	.pba			= 26,</div><div class='add'>+	.max_hw_frame_size	= DEFAULT_JUMBO,</div><div class='add'>+	.get_variants		= e1000_get_variants_ich8lan,</div><div class='add'>+	.mac_ops		= &amp;ich8_mac_ops,</div><div class='add'>+	.phy_ops		= &amp;ich8_phy_ops,</div><div class='add'>+	.nvm_ops		= &amp;ich8_nvm_ops,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c<br/>index decad98c1059..026e8b3ab52e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/mac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000e/mac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/mac.c</a></div><div class='hunk'>@@ -143,12 +143,12 @@ void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count)</div><div class='ctx'> 	/* Setup the receive address */</div><div class='ctx'> 	e_dbg("Programming MAC Address into RAR[0]\n");</div><div class='ctx'> </div><div class='del'>-	e1000e_rar_set(hw, hw-&gt;mac.addr, 0);</div><div class='add'>+	hw-&gt;mac.ops.rar_set(hw, hw-&gt;mac.addr, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Zero out the other (rar_entry_count - 1) receive addresses */</div><div class='ctx'> 	e_dbg("Clearing RAR[1-%u]\n", rar_count - 1);</div><div class='ctx'> 	for (i = 1; i &lt; rar_count; i++)</div><div class='del'>-		e1000e_rar_set(hw, mac_addr, i);</div><div class='add'>+		hw-&gt;mac.ops.rar_set(hw, mac_addr, i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -215,13 +215,13 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw)</div><div class='ctx'> 	 * same as the normal permanent MAC address stored by the HW into the</div><div class='ctx'> 	 * RAR. Do this by mapping this address into RAR0.</div><div class='ctx'> 	 */</div><div class='del'>-	e1000e_rar_set(hw, alt_mac_addr, 0);</div><div class='add'>+	hw-&gt;mac.ops.rar_set(hw, alt_mac_addr, 0);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- *  e1000e_rar_set - Set receive address register</div><div class='add'>+ *  e1000e_rar_set_generic - Set receive address register</div><div class='ctx'>  *  @hw: pointer to the HW structure</div><div class='ctx'>  *  @addr: pointer to the receive address</div><div class='ctx'>  *  @index: receive address array register</div><div class='hunk'>@@ -229,7 +229,7 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw)</div><div class='ctx'>  *  Sets the receive address array register at index to the address passed</div><div class='ctx'>  *  in by addr.</div><div class='ctx'>  **/</div><div class='del'>-void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)</div><div class='add'>+void e1000e_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)</div><div class='ctx'> {</div><div class='ctx'> 	u32 rar_low, rar_high;</div><div class='ctx'> </div><div class='hunk'>@@ -681,7 +681,7 @@ static s32 e1000_set_default_fc_generic(struct e1000_hw *hw)</div><div class='ctx'> 		return ret_val;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((nvm_data &amp; NVM_WORD0F_PAUSE_MASK) == 0)</div><div class='add'>+	if (!(nvm_data &amp; NVM_WORD0F_PAUSE_MASK))</div><div class='ctx'> 		hw-&gt;fc.requested_mode = e1000_fc_none;</div><div class='ctx'> 	else if ((nvm_data &amp; NVM_WORD0F_PAUSE_MASK) == NVM_WORD0F_ASM_DIR)</div><div class='ctx'> 		hw-&gt;fc.requested_mode = e1000_fc_tx_pause;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/manage.c b/drivers/net/ethernet/intel/e1000e/manage.c<br/>index 473f8e711510..bacc950fc684 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/manage.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000e/manage.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/manage.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/manage.c</a></div><div class='hunk'>@@ -85,7 +85,7 @@ static s32 e1000_mng_enable_host_if(struct e1000_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	/* Check that the host interface is enabled. */</div><div class='ctx'> 	hicr = er32(HICR);</div><div class='del'>-	if ((hicr &amp; E1000_HICR_EN) == 0) {</div><div class='add'>+	if (!(hicr &amp; E1000_HICR_EN)) {</div><div class='ctx'> 		e_dbg("E1000_HOST_EN bit disabled.\n");</div><div class='ctx'> 		return -E1000_ERR_HOST_INTERFACE_COMMAND;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c<br/>index 19ab2154802c..a4b0435b00dc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/netdev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000e/netdev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/netdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/netdev.c</a></div><div class='hunk'>@@ -56,7 +56,7 @@</div><div class='ctx'> </div><div class='ctx'> #define DRV_EXTRAVERSION "-k"</div><div class='ctx'> </div><div class='del'>-#define DRV_VERSION "1.9.5" DRV_EXTRAVERSION</div><div class='add'>+#define DRV_VERSION "2.0.0" DRV_EXTRAVERSION</div><div class='ctx'> char e1000e_driver_name[] = "e1000e";</div><div class='ctx'> const char e1000e_driver_version[] = DRV_VERSION;</div><div class='ctx'> </div><div class='hunk'>@@ -79,6 +79,7 @@ static const struct e1000_info *e1000_info_tbl[] = {</div><div class='ctx'> 	[board_ich10lan]	= &amp;e1000_ich10_info,</div><div class='ctx'> 	[board_pchlan]		= &amp;e1000_pch_info,</div><div class='ctx'> 	[board_pch2lan]		= &amp;e1000_pch2_info,</div><div class='add'>+	[board_pch_lpt]		= &amp;e1000_pch_lpt_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct e1000_reg_info {</div><div class='hunk'>@@ -110,14 +111,14 @@ static const struct e1000_reg_info e1000_reg_info_tbl[] = {</div><div class='ctx'> </div><div class='ctx'> 	/* Rx Registers */</div><div class='ctx'> 	{E1000_RCTL, "RCTL"},</div><div class='del'>-	{E1000_RDLEN, "RDLEN"},</div><div class='del'>-	{E1000_RDH, "RDH"},</div><div class='del'>-	{E1000_RDT, "RDT"},</div><div class='add'>+	{E1000_RDLEN(0), "RDLEN"},</div><div class='add'>+	{E1000_RDH(0), "RDH"},</div><div class='add'>+	{E1000_RDT(0), "RDT"},</div><div class='ctx'> 	{E1000_RDTR, "RDTR"},</div><div class='ctx'> 	{E1000_RXDCTL(0), "RXDCTL"},</div><div class='ctx'> 	{E1000_ERT, "ERT"},</div><div class='del'>-	{E1000_RDBAL, "RDBAL"},</div><div class='del'>-	{E1000_RDBAH, "RDBAH"},</div><div class='add'>+	{E1000_RDBAL(0), "RDBAL"},</div><div class='add'>+	{E1000_RDBAH(0), "RDBAH"},</div><div class='ctx'> 	{E1000_RDFH, "RDFH"},</div><div class='ctx'> 	{E1000_RDFT, "RDFT"},</div><div class='ctx'> 	{E1000_RDFHS, "RDFHS"},</div><div class='hunk'>@@ -126,11 +127,11 @@ static const struct e1000_reg_info e1000_reg_info_tbl[] = {</div><div class='ctx'> </div><div class='ctx'> 	/* Tx Registers */</div><div class='ctx'> 	{E1000_TCTL, "TCTL"},</div><div class='del'>-	{E1000_TDBAL, "TDBAL"},</div><div class='del'>-	{E1000_TDBAH, "TDBAH"},</div><div class='del'>-	{E1000_TDLEN, "TDLEN"},</div><div class='del'>-	{E1000_TDH, "TDH"},</div><div class='del'>-	{E1000_TDT, "TDT"},</div><div class='add'>+	{E1000_TDBAL(0), "TDBAL"},</div><div class='add'>+	{E1000_TDBAH(0), "TDBAH"},</div><div class='add'>+	{E1000_TDLEN(0), "TDLEN"},</div><div class='add'>+	{E1000_TDH(0), "TDH"},</div><div class='add'>+	{E1000_TDT(0), "TDT"},</div><div class='ctx'> 	{E1000_TIDV, "TIDV"},</div><div class='ctx'> 	{E1000_TXDCTL(0), "TXDCTL"},</div><div class='ctx'> 	{E1000_TADV, "TADV"},</div><div class='hunk'>@@ -538,43 +539,15 @@ static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,</div><div class='ctx'> 	adapter-&gt;hw_csum_good++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * e1000e_update_tail_wa - helper function for e1000e_update_[rt]dt_wa()</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @tail: address of tail descriptor register</div><div class='del'>- * @i: value to write to tail descriptor register</div><div class='del'>- *</div><div class='del'>- * When updating the tail register, the ME could be accessing Host CSR</div><div class='del'>- * registers at the same time.  Normally, this is handled in h/w by an</div><div class='del'>- * arbiter but on some parts there is a bug that acknowledges Host accesses</div><div class='del'>- * later than it should which could result in the descriptor register to</div><div class='del'>- * have an incorrect value.  Workaround this by checking the FWSM register</div><div class='del'>- * which has bit 24 set while ME is accessing Host CSR registers, wait</div><div class='del'>- * if it is set and try again a number of times.</div><div class='del'>- **/</div><div class='del'>-static inline s32 e1000e_update_tail_wa(struct e1000_hw *hw, void __iomem *tail,</div><div class='del'>-					unsigned int i)</div><div class='del'>-{</div><div class='del'>-	unsigned int j = 0;</div><div class='del'>-</div><div class='del'>-	while ((j++ &lt; E1000_ICH_FWSM_PCIM2PCI_COUNT) &amp;&amp;</div><div class='del'>-	       (er32(FWSM) &amp; E1000_ICH_FWSM_PCIM2PCI))</div><div class='del'>-		udelay(50);</div><div class='del'>-</div><div class='del'>-	writel(i, tail);</div><div class='del'>-</div><div class='del'>-	if ((j == E1000_ICH_FWSM_PCIM2PCI_COUNT) &amp;&amp; (i != readl(tail)))</div><div class='del'>-		return E1000_ERR_SWFW_SYNC;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_adapter *adapter = rx_ring-&gt;adapter;</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	s32 ret_val = __ew32_prepare(hw);</div><div class='ctx'> </div><div class='del'>-	if (e1000e_update_tail_wa(hw, rx_ring-&gt;tail, i)) {</div><div class='add'>+	writel(i, rx_ring-&gt;tail);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!ret_val &amp;&amp; (i != readl(rx_ring-&gt;tail)))) {</div><div class='ctx'> 		u32 rctl = er32(RCTL);</div><div class='ctx'> 		ew32(RCTL, rctl &amp; ~E1000_RCTL_EN);</div><div class='ctx'> 		e_err("ME firmware caused invalid RDT - resetting\n");</div><div class='hunk'>@@ -586,8 +559,11 @@ static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_adapter *adapter = tx_ring-&gt;adapter;</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	s32 ret_val = __ew32_prepare(hw);</div><div class='add'>+</div><div class='add'>+	writel(i, tx_ring-&gt;tail);</div><div class='ctx'> </div><div class='del'>-	if (e1000e_update_tail_wa(hw, tx_ring-&gt;tail, i)) {</div><div class='add'>+	if (unlikely(!ret_val &amp;&amp; (i != readl(tx_ring-&gt;tail)))) {</div><div class='ctx'> 		u32 tctl = er32(TCTL);</div><div class='ctx'> 		ew32(TCTL, tctl &amp; ~E1000_TCTL_EN);</div><div class='ctx'> 		e_err("ME firmware caused invalid TDT - resetting\n");</div><div class='hunk'>@@ -1053,7 +1029,8 @@ static void e1000_print_hw_hang(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	if (!adapter-&gt;tx_hang_recheck &amp;&amp;</div><div class='ctx'> 	    (adapter-&gt;flags2 &amp; FLAG2_DMA_BURST)) {</div><div class='del'>-		/* May be block on write-back, flush and detect again</div><div class='add'>+		/*</div><div class='add'>+		 * May be block on write-back, flush and detect again</div><div class='ctx'> 		 * flush pending descriptor writebacks to memory</div><div class='ctx'> 		 */</div><div class='ctx'> 		ew32(TIDV, adapter-&gt;tx_int_delay | E1000_TIDV_FPD);</div><div class='hunk'>@@ -1108,6 +1085,10 @@ static void e1000_print_hw_hang(struct work_struct *work)</div><div class='ctx'> 	      phy_1000t_status,</div><div class='ctx'> 	      phy_ext_status,</div><div class='ctx'> 	      pci_status);</div><div class='add'>+</div><div class='add'>+	/* Suggest workaround for known h/w issue */</div><div class='add'>+	if ((hw-&gt;mac.type == e1000_pchlan) &amp;&amp; (er32(CTRL) &amp; E1000_CTRL_TFCE))</div><div class='add'>+		e_err("Try turning off Tx pause (flow control) via ethtool\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1645,7 +1626,10 @@ static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)</div><div class='ctx'> 	adapter-&gt;flags2 &amp;= ~FLAG2_IS_DISCARDING;</div><div class='ctx'> </div><div class='ctx'> 	writel(0, rx_ring-&gt;head);</div><div class='del'>-	writel(0, rx_ring-&gt;tail);</div><div class='add'>+	if (rx_ring-&gt;adapter-&gt;flags2 &amp; FLAG2_PCIM2PCI_ARBITER_WA)</div><div class='add'>+		e1000e_update_rdt_wa(rx_ring, 0);</div><div class='add'>+	else</div><div class='add'>+		writel(0, rx_ring-&gt;tail);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void e1000e_downshift_workaround(struct work_struct *work)</div><div class='hunk'>@@ -2318,7 +2302,10 @@ static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)</div><div class='ctx'> 	tx_ring-&gt;next_to_clean = 0;</div><div class='ctx'> </div><div class='ctx'> 	writel(0, tx_ring-&gt;head);</div><div class='del'>-	writel(0, tx_ring-&gt;tail);</div><div class='add'>+	if (tx_ring-&gt;adapter-&gt;flags2 &amp; FLAG2_PCIM2PCI_ARBITER_WA)</div><div class='add'>+		e1000e_update_tdt_wa(tx_ring, 0);</div><div class='add'>+	else</div><div class='add'>+		writel(0, tx_ring-&gt;tail);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2530,33 +2517,31 @@ err:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * e1000_clean - NAPI Rx polling callback</div><div class='add'>+ * e1000e_poll - NAPI Rx polling callback</div><div class='ctx'>  * @napi: struct associated with this polling callback</div><div class='del'>- * @budget: amount of packets driver is allowed to process this poll</div><div class='add'>+ * @weight: number of packets driver is allowed to process this poll</div><div class='ctx'>  **/</div><div class='del'>-static int e1000_clean(struct napi_struct *napi, int budget)</div><div class='add'>+static int e1000e_poll(struct napi_struct *napi, int weight)</div><div class='ctx'> {</div><div class='del'>-	struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);</div><div class='add'>+	struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,</div><div class='add'>+						     napi);</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	struct net_device *poll_dev = adapter-&gt;netdev;</div><div class='ctx'> 	int tx_cleaned = 1, work_done = 0;</div><div class='ctx'> </div><div class='ctx'> 	adapter = netdev_priv(poll_dev);</div><div class='ctx'> </div><div class='del'>-	if (adapter-&gt;msix_entries &amp;&amp;</div><div class='del'>-	    !(adapter-&gt;rx_ring-&gt;ims_val &amp; adapter-&gt;tx_ring-&gt;ims_val))</div><div class='del'>-		goto clean_rx;</div><div class='del'>-</div><div class='del'>-	tx_cleaned = e1000_clean_tx_irq(adapter-&gt;tx_ring);</div><div class='add'>+	if (!adapter-&gt;msix_entries ||</div><div class='add'>+	    (adapter-&gt;rx_ring-&gt;ims_val &amp; adapter-&gt;tx_ring-&gt;ims_val))</div><div class='add'>+		tx_cleaned = e1000_clean_tx_irq(adapter-&gt;tx_ring);</div><div class='ctx'> </div><div class='del'>-clean_rx:</div><div class='del'>-	adapter-&gt;clean_rx(adapter-&gt;rx_ring, &amp;work_done, budget);</div><div class='add'>+	adapter-&gt;clean_rx(adapter-&gt;rx_ring, &amp;work_done, weight);</div><div class='ctx'> </div><div class='ctx'> 	if (!tx_cleaned)</div><div class='del'>-		work_done = budget;</div><div class='add'>+		work_done = weight;</div><div class='ctx'> </div><div class='del'>-	/* If budget not fully consumed, exit the polling mode */</div><div class='del'>-	if (work_done &lt; budget) {</div><div class='add'>+	/* If weight not fully consumed, exit the polling mode */</div><div class='add'>+	if (work_done &lt; weight) {</div><div class='ctx'> 		if (adapter-&gt;itr_setting &amp; 3)</div><div class='ctx'> 			e1000_set_itr(adapter);</div><div class='ctx'> 		napi_complete(napi);</div><div class='hunk'>@@ -2800,13 +2785,13 @@ static void e1000_configure_tx(struct e1000_adapter *adapter)</div><div class='ctx'> 	/* Setup the HW Tx Head and Tail descriptor pointers */</div><div class='ctx'> 	tdba = tx_ring-&gt;dma;</div><div class='ctx'> 	tdlen = tx_ring-&gt;count * sizeof(struct e1000_tx_desc);</div><div class='del'>-	ew32(TDBAL, (tdba &amp; DMA_BIT_MASK(32)));</div><div class='del'>-	ew32(TDBAH, (tdba &gt;&gt; 32));</div><div class='del'>-	ew32(TDLEN, tdlen);</div><div class='del'>-	ew32(TDH, 0);</div><div class='del'>-	ew32(TDT, 0);</div><div class='del'>-	tx_ring-&gt;head = adapter-&gt;hw.hw_addr + E1000_TDH;</div><div class='del'>-	tx_ring-&gt;tail = adapter-&gt;hw.hw_addr + E1000_TDT;</div><div class='add'>+	ew32(TDBAL(0), (tdba &amp; DMA_BIT_MASK(32)));</div><div class='add'>+	ew32(TDBAH(0), (tdba &gt;&gt; 32));</div><div class='add'>+	ew32(TDLEN(0), tdlen);</div><div class='add'>+	ew32(TDH(0), 0);</div><div class='add'>+	ew32(TDT(0), 0);</div><div class='add'>+	tx_ring-&gt;head = adapter-&gt;hw.hw_addr + E1000_TDH(0);</div><div class='add'>+	tx_ring-&gt;tail = adapter-&gt;hw.hw_addr + E1000_TDT(0);</div><div class='ctx'> </div><div class='ctx'> 	/* Set the Tx Interrupt Delay register */</div><div class='ctx'> 	ew32(TIDV, adapter-&gt;tx_int_delay);</div><div class='hunk'>@@ -2879,8 +2864,8 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)</div><div class='ctx'> 	u32 rctl, rfctl;</div><div class='ctx'> 	u32 pages = 0;</div><div class='ctx'> </div><div class='del'>-	/* Workaround Si errata on 82579 - configure jumbo frame flow */</div><div class='del'>-	if (hw-&gt;mac.type == e1000_pch2lan) {</div><div class='add'>+	/* Workaround Si errata on PCHx - configure jumbo frame flow */</div><div class='add'>+	if (hw-&gt;mac.type &gt;= e1000_pch2lan) {</div><div class='ctx'> 		s32 ret_val;</div><div class='ctx'> </div><div class='ctx'> 		if (adapter-&gt;netdev-&gt;mtu &gt; ETH_DATA_LEN)</div><div class='hunk'>@@ -2955,6 +2940,7 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)</div><div class='ctx'> 	/* Enable Extended Status in all Receive Descriptors */</div><div class='ctx'> 	rfctl = er32(RFCTL);</div><div class='ctx'> 	rfctl |= E1000_RFCTL_EXTEN;</div><div class='add'>+	ew32(RFCTL, rfctl);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * 82571 and greater support packet-split where the protocol</div><div class='hunk'>@@ -2980,13 +2966,6 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)</div><div class='ctx'> 	if (adapter-&gt;rx_ps_pages) {</div><div class='ctx'> 		u32 psrctl = 0;</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * disable packet split support for IPv6 extension headers,</div><div class='del'>-		 * because some malformed IPv6 headers can hang the Rx</div><div class='del'>-		 */</div><div class='del'>-		rfctl |= (E1000_RFCTL_IPV6_EX_DIS |</div><div class='del'>-			  E1000_RFCTL_NEW_IPV6_EXT_DIS);</div><div class='del'>-</div><div class='ctx'> 		/* Enable Packet split descriptors */</div><div class='ctx'> 		rctl |= E1000_RCTL_DTYP_PS;</div><div class='ctx'> </div><div class='hunk'>@@ -3025,7 +3004,6 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)</div><div class='ctx'> 		 */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ew32(RFCTL, rfctl);</div><div class='ctx'> 	ew32(RCTL, rctl);</div><div class='ctx'> 	/* just started the receive unit, no need to restart */</div><div class='ctx'> 	adapter-&gt;flags &amp;= ~FLAG_RX_RESTART_NOW;</div><div class='hunk'>@@ -3110,13 +3088,13 @@ static void e1000_configure_rx(struct e1000_adapter *adapter)</div><div class='ctx'> 	 * the Base and Length of the Rx Descriptor Ring</div><div class='ctx'> 	 */</div><div class='ctx'> 	rdba = rx_ring-&gt;dma;</div><div class='del'>-	ew32(RDBAL, (rdba &amp; DMA_BIT_MASK(32)));</div><div class='del'>-	ew32(RDBAH, (rdba &gt;&gt; 32));</div><div class='del'>-	ew32(RDLEN, rdlen);</div><div class='del'>-	ew32(RDH, 0);</div><div class='del'>-	ew32(RDT, 0);</div><div class='del'>-	rx_ring-&gt;head = adapter-&gt;hw.hw_addr + E1000_RDH;</div><div class='del'>-	rx_ring-&gt;tail = adapter-&gt;hw.hw_addr + E1000_RDT;</div><div class='add'>+	ew32(RDBAL(0), (rdba &amp; DMA_BIT_MASK(32)));</div><div class='add'>+	ew32(RDBAH(0), (rdba &gt;&gt; 32));</div><div class='add'>+	ew32(RDLEN(0), rdlen);</div><div class='add'>+	ew32(RDH(0), 0);</div><div class='add'>+	ew32(RDT(0), 0);</div><div class='add'>+	rx_ring-&gt;head = adapter-&gt;hw.hw_addr + E1000_RDH(0);</div><div class='add'>+	rx_ring-&gt;tail = adapter-&gt;hw.hw_addr + E1000_RDT(0);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable Receive Checksum Offload for TCP and UDP */</div><div class='ctx'> 	rxcsum = er32(RXCSUM);</div><div class='hunk'>@@ -3229,7 +3207,7 @@ static int e1000e_write_uc_addr_list(struct net_device *netdev)</div><div class='ctx'> 		netdev_for_each_uc_addr(ha, netdev) {</div><div class='ctx'> 			if (!rar_entries)</div><div class='ctx'> 				break;</div><div class='del'>-			e1000e_rar_set(hw, ha-&gt;addr, rar_entries--);</div><div class='add'>+			hw-&gt;mac.ops.rar_set(hw, ha-&gt;addr, rar_entries--);</div><div class='ctx'> 			count++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3510,6 +3488,7 @@ void e1000e_reset(struct e1000_adapter *adapter)</div><div class='ctx'> 		fc-&gt;refresh_time = 0x1000;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case e1000_pch2lan:</div><div class='add'>+	case e1000_pch_lpt:</div><div class='ctx'> 		fc-&gt;high_water = 0x05C20;</div><div class='ctx'> 		fc-&gt;low_water = 0x05048;</div><div class='ctx'> 		fc-&gt;pause_time = 0x0650;</div><div class='hunk'>@@ -3799,7 +3778,7 @@ static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)</div><div class='ctx'> 	/* fire an unusual interrupt on the test handler */</div><div class='ctx'> 	ew32(ICS, E1000_ICS_RXSEQ);</div><div class='ctx'> 	e1e_flush();</div><div class='del'>-	msleep(50);</div><div class='add'>+	msleep(100);</div><div class='ctx'> </div><div class='ctx'> 	e1000_irq_disable(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -4038,6 +4017,7 @@ static int e1000_close(struct net_device *netdev)</div><div class='ctx'> static int e1000_set_mac(struct net_device *netdev, void *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	struct sockaddr *addr = p;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_valid_ether_addr(addr-&gt;sa_data))</div><div class='hunk'>@@ -4046,7 +4026,7 @@ static int e1000_set_mac(struct net_device *netdev, void *p)</div><div class='ctx'> 	memcpy(netdev-&gt;dev_addr, addr-&gt;sa_data, netdev-&gt;addr_len);</div><div class='ctx'> 	memcpy(adapter-&gt;hw.mac.addr, addr-&gt;sa_data, netdev-&gt;addr_len);</div><div class='ctx'> </div><div class='del'>-	e1000e_rar_set(&amp;adapter-&gt;hw, adapter-&gt;hw.mac.addr, 0);</div><div class='add'>+	hw-&gt;mac.ops.rar_set(&amp;adapter-&gt;hw, adapter-&gt;hw.mac.addr, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;flags &amp; FLAG_RESET_OVERWRITES_LAA) {</div><div class='ctx'> 		/* activate the work around */</div><div class='hunk'>@@ -4060,9 +4040,8 @@ static int e1000_set_mac(struct net_device *netdev, void *p)</div><div class='ctx'> 		 * are dropped. Eventually the LAA will be in RAR[0] and</div><div class='ctx'> 		 * RAR[14]</div><div class='ctx'> 		 */</div><div class='del'>-		e1000e_rar_set(&amp;adapter-&gt;hw,</div><div class='del'>-			      adapter-&gt;hw.mac.addr,</div><div class='del'>-			      adapter-&gt;hw.mac.rar_entry_count - 1);</div><div class='add'>+		hw-&gt;mac.ops.rar_set(&amp;adapter-&gt;hw, adapter-&gt;hw.mac.addr,</div><div class='add'>+				    adapter-&gt;hw.mac.rar_entry_count - 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -4641,7 +4620,7 @@ link_up:</div><div class='ctx'> 	 * reset from the other port. Set the appropriate LAA in RAR[0]</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (e1000e_get_laa_state_82571(hw))</div><div class='del'>-		e1000e_rar_set(hw, adapter-&gt;hw.mac.addr, 0);</div><div class='add'>+		hw-&gt;mac.ops.rar_set(hw, adapter-&gt;hw.mac.addr, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;flags2 &amp; FLAG2_CHECK_PHY_HANG)</div><div class='ctx'> 		e1000e_check_82574_phy_workaround(adapter);</div><div class='hunk'>@@ -5151,6 +5130,8 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,</div><div class='ctx'> 	/* if count is 0 then mapping error has occurred */</div><div class='ctx'> 	count = e1000_tx_map(tx_ring, skb, first, max_per_txd, nr_frags, mss);</div><div class='ctx'> 	if (count) {</div><div class='add'>+		skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='ctx'> 		netdev_sent_queue(netdev, skb-&gt;len);</div><div class='ctx'> 		e1000_tx_queue(tx_ring, tx_flags, count);</div><div class='ctx'> 		/* Make sure there is space in the ring for the next send. */</div><div class='hunk'>@@ -5285,22 +5266,14 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Jumbo frame workaround on 82579 requires CRC be stripped */</div><div class='del'>-	if ((adapter-&gt;hw.mac.type == e1000_pch2lan) &amp;&amp;</div><div class='add'>+	/* Jumbo frame workaround on 82579 and newer requires CRC be stripped */</div><div class='add'>+	if ((adapter-&gt;hw.mac.type &gt;= e1000_pch2lan) &amp;&amp;</div><div class='ctx'> 	    !(adapter-&gt;flags2 &amp; FLAG2_CRC_STRIPPING) &amp;&amp;</div><div class='ctx'> 	    (new_mtu &gt; ETH_DATA_LEN)) {</div><div class='del'>-		e_err("Jumbo Frames not supported on 82579 when CRC stripping is disabled.\n");</div><div class='add'>+		e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* 82573 Errata 17 */</div><div class='del'>-	if (((adapter-&gt;hw.mac.type == e1000_82573) ||</div><div class='del'>-	     (adapter-&gt;hw.mac.type == e1000_82574)) &amp;&amp;</div><div class='del'>-	    (max_frame &gt; ETH_FRAME_LEN + ETH_FCS_LEN)) {</div><div class='del'>-		adapter-&gt;flags2 |= FLAG2_DISABLE_ASPM_L1;</div><div class='del'>-		e1000e_disable_aspm(adapter-&gt;pdev, PCIE_LINK_STATE_L1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	while (test_and_set_bit(__E1000_RESETTING, &amp;adapter-&gt;state))</div><div class='ctx'> 		usleep_range(1000, 2000);</div><div class='ctx'> 	/* e1000e_down -&gt; e1000e_reset dependent on max_frame_size &amp; mtu */</div><div class='hunk'>@@ -5694,7 +5667,7 @@ static int __e1000_resume(struct pci_dev *pdev)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;mac.type == e1000_pch2lan)</div><div class='add'>+	if (hw-&gt;mac.type &gt;= e1000_pch2lan)</div><div class='ctx'> 		e1000_resume_workarounds_pchlan(&amp;adapter-&gt;hw);</div><div class='ctx'> </div><div class='ctx'> 	e1000e_power_up_phy(adapter);</div><div class='hunk'>@@ -6226,7 +6199,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,</div><div class='ctx'> 	netdev-&gt;netdev_ops		= &amp;e1000e_netdev_ops;</div><div class='ctx'> 	e1000e_set_ethtool_ops(netdev);</div><div class='ctx'> 	netdev-&gt;watchdog_timeo		= 5 * HZ;</div><div class='del'>-	netif_napi_add(netdev, &amp;adapter-&gt;napi, e1000_clean, 64);</div><div class='add'>+	netif_napi_add(netdev, &amp;adapter-&gt;napi, e1000e_poll, 64);</div><div class='ctx'> 	strlcpy(netdev-&gt;name, pci_name(pdev), sizeof(netdev-&gt;name));</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;mem_start = mmio_start;</div><div class='hunk'>@@ -6593,6 +6566,9 @@ static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },</div><div class='ctx'> </div><div class='add'>+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },</div><div class='add'>+</div><div class='ctx'> 	{ 0, 0, 0, 0, 0, 0, 0 }	/* terminate list */</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/param.c b/drivers/net/ethernet/intel/e1000e/param.c<br/>index ff796e42c3eb..55cc1565bc2f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/param.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000e/param.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/param.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/param.c</a></div><div class='hunk'>@@ -106,7 +106,7 @@ E1000_PARAM(RxAbsIntDelay, "Receive Absolute Interrupt Delay");</div><div class='ctx'> /*</div><div class='ctx'>  * Interrupt Throttle Rate (interrupts/sec)</div><div class='ctx'>  *</div><div class='del'>- * Valid Range: 100-100000 (0=off, 1=dynamic, 3=dynamic conservative)</div><div class='add'>+ * Valid Range: 100-100000 or one of: 0=off, 1=dynamic, 3=dynamic conservative</div><div class='ctx'>  */</div><div class='ctx'> E1000_PARAM(InterruptThrottleRate, "Interrupt Throttling Rate");</div><div class='ctx'> #define DEFAULT_ITR 3</div><div class='hunk'>@@ -166,8 +166,8 @@ E1000_PARAM(WriteProtectNVM, "Write-protect NVM [WARNING: disabling this can lea</div><div class='ctx'>  *</div><div class='ctx'>  * Default Value: 1 (enabled)</div><div class='ctx'>  */</div><div class='del'>-E1000_PARAM(CrcStripping, "Enable CRC Stripping, disable if your BMC needs " \</div><div class='del'>-                          "the CRC");</div><div class='add'>+E1000_PARAM(CrcStripping,</div><div class='add'>+	    "Enable CRC Stripping, disable if your BMC needs the CRC");</div><div class='ctx'> </div><div class='ctx'> struct e1000_option {</div><div class='ctx'> 	enum { enable_option, range_option, list_option } type;</div><div class='hunk'>@@ -344,53 +344,60 @@ void __devinit e1000e_check_options(struct e1000_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 		if (num_InterruptThrottleRate &gt; bd) {</div><div class='ctx'> 			adapter-&gt;itr = InterruptThrottleRate[bd];</div><div class='del'>-			switch (adapter-&gt;itr) {</div><div class='del'>-			case 0:</div><div class='del'>-				e_info("%s turned off\n", opt.name);</div><div class='del'>-				break;</div><div class='del'>-			case 1:</div><div class='del'>-				e_info("%s set to dynamic mode\n", opt.name);</div><div class='del'>-				adapter-&gt;itr_setting = adapter-&gt;itr;</div><div class='del'>-				adapter-&gt;itr = 20000;</div><div class='del'>-				break;</div><div class='del'>-			case 3:</div><div class='del'>-				e_info("%s set to dynamic conservative mode\n",</div><div class='del'>-					opt.name);</div><div class='del'>-				adapter-&gt;itr_setting = adapter-&gt;itr;</div><div class='del'>-				adapter-&gt;itr = 20000;</div><div class='del'>-				break;</div><div class='del'>-			case 4:</div><div class='del'>-				e_info("%s set to simplified (2000-8000 ints) "</div><div class='del'>-				       "mode\n", opt.name);</div><div class='del'>-				adapter-&gt;itr_setting = 4;</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				/*</div><div class='del'>-				 * Save the setting, because the dynamic bits</div><div class='del'>-				 * change itr.</div><div class='del'>-				 */</div><div class='del'>-				if (e1000_validate_option(&amp;adapter-&gt;itr, &amp;opt,</div><div class='del'>-							  adapter) &amp;&amp;</div><div class='del'>-				    (adapter-&gt;itr == 3)) {</div><div class='del'>-					/*</div><div class='del'>-					 * In case of invalid user value,</div><div class='del'>-					 * default to conservative mode.</div><div class='del'>-					 */</div><div class='del'>-					adapter-&gt;itr_setting = adapter-&gt;itr;</div><div class='del'>-					adapter-&gt;itr = 20000;</div><div class='del'>-				} else {</div><div class='del'>-					/*</div><div class='del'>-					 * Clear the lower two bits because</div><div class='del'>-					 * they are used as control.</div><div class='del'>-					 */</div><div class='del'>-					adapter-&gt;itr_setting =</div><div class='del'>-						adapter-&gt;itr &amp; ~3;</div><div class='del'>-				}</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Make sure a message is printed for non-special</div><div class='add'>+			 * values. And in case of an invalid option, display</div><div class='add'>+			 * warning, use default and go through itr/itr_setting</div><div class='add'>+			 * adjustment logic below</div><div class='add'>+			 */</div><div class='add'>+			if ((adapter-&gt;itr &gt; 4) &amp;&amp;</div><div class='add'>+			    e1000_validate_option(&amp;adapter-&gt;itr, &amp;opt, adapter))</div><div class='add'>+				adapter-&gt;itr = opt.def;</div><div class='ctx'> 		} else {</div><div class='del'>-			adapter-&gt;itr_setting = opt.def;</div><div class='add'>+			/*</div><div class='add'>+			 * If no option specified, use default value and go</div><div class='add'>+			 * through the logic below to adjust itr/itr_setting</div><div class='add'>+			 */</div><div class='add'>+			adapter-&gt;itr = opt.def;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Make sure a message is printed for non-special</div><div class='add'>+			 * default values</div><div class='add'>+			 */</div><div class='add'>+			if (adapter-&gt;itr &gt; 4)</div><div class='add'>+				e_info("%s set to default %d\n", opt.name,</div><div class='add'>+				       adapter-&gt;itr);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		adapter-&gt;itr_setting = adapter-&gt;itr;</div><div class='add'>+		switch (adapter-&gt;itr) {</div><div class='add'>+		case 0:</div><div class='add'>+			e_info("%s turned off\n", opt.name);</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+			e_info("%s set to dynamic mode\n", opt.name);</div><div class='add'>+			adapter-&gt;itr = 20000;</div><div class='add'>+			break;</div><div class='add'>+		case 3:</div><div class='add'>+			e_info("%s set to dynamic conservative mode\n",</div><div class='add'>+			       opt.name);</div><div class='ctx'> 			adapter-&gt;itr = 20000;</div><div class='add'>+			break;</div><div class='add'>+		case 4:</div><div class='add'>+			e_info("%s set to simplified (2000-8000 ints) mode\n",</div><div class='add'>+			       opt.name);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			/*</div><div class='add'>+			 * Save the setting, because the dynamic bits</div><div class='add'>+			 * change itr.</div><div class='add'>+			 *</div><div class='add'>+			 * Clear the lower two bits because</div><div class='add'>+			 * they are used as control.</div><div class='add'>+			 */</div><div class='add'>+			adapter-&gt;itr_setting &amp;= ~3;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	{ /* Interrupt Mode */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/phy.c b/drivers/net/ethernet/intel/e1000e/phy.c<br/>index 35b45578c604..0334d013bc3c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/e1000e/phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/e1000e/phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/e1000e/phy.c</a></div><div class='hunk'>@@ -639,6 +639,45 @@ s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ *  e1000_set_master_slave_mode - Setup PHY for Master/slave mode</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Sets up Master/slave mode</div><div class='add'>+ **/</div><div class='add'>+static s32 e1000_set_master_slave_mode(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	s32 ret_val;</div><div class='add'>+	u16 phy_data;</div><div class='add'>+</div><div class='add'>+	/* Resolve Master/Slave mode */</div><div class='add'>+	ret_val = e1e_rphy(hw, PHY_1000T_CTRL, &amp;phy_data);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		return ret_val;</div><div class='add'>+</div><div class='add'>+	/* load defaults for future use */</div><div class='add'>+	hw-&gt;phy.original_ms_type = (phy_data &amp; CR_1000T_MS_ENABLE) ?</div><div class='add'>+	    ((phy_data &amp; CR_1000T_MS_VALUE) ?</div><div class='add'>+	     e1000_ms_force_master : e1000_ms_force_slave) : e1000_ms_auto;</div><div class='add'>+</div><div class='add'>+	switch (hw-&gt;phy.ms_type) {</div><div class='add'>+	case e1000_ms_force_master:</div><div class='add'>+		phy_data |= (CR_1000T_MS_ENABLE | CR_1000T_MS_VALUE);</div><div class='add'>+		break;</div><div class='add'>+	case e1000_ms_force_slave:</div><div class='add'>+		phy_data |= CR_1000T_MS_ENABLE;</div><div class='add'>+		phy_data &amp;= ~(CR_1000T_MS_VALUE);</div><div class='add'>+		break;</div><div class='add'>+	case e1000_ms_auto:</div><div class='add'>+		phy_data &amp;= ~CR_1000T_MS_ENABLE;</div><div class='add'>+		/* fall-through */</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return e1e_wphy(hw, PHY_1000T_CTRL, phy_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  *  e1000_copper_link_setup_82577 - Setup 82577 PHY for copper link</div><div class='ctx'>  *  @hw: pointer to the HW structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -659,7 +698,11 @@ s32 e1000_copper_link_setup_82577(struct e1000_hw *hw)</div><div class='ctx'> 	/* Enable downshift */</div><div class='ctx'> 	phy_data |= I82577_CFG_ENABLE_DOWNSHIFT;</div><div class='ctx'> </div><div class='del'>-	return e1e_wphy(hw, I82577_CFG_REG, phy_data);</div><div class='add'>+	ret_val = e1e_wphy(hw, I82577_CFG_REG, phy_data);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		return ret_val;</div><div class='add'>+</div><div class='add'>+	return e1000_set_master_slave_mode(hw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -718,12 +761,28 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw)</div><div class='ctx'> 	 *   1 - Enabled</div><div class='ctx'> 	 */</div><div class='ctx'> 	phy_data &amp;= ~M88E1000_PSCR_POLARITY_REVERSAL;</div><div class='del'>-	if (phy-&gt;disable_polarity_correction == 1)</div><div class='add'>+	if (phy-&gt;disable_polarity_correction)</div><div class='ctx'> 		phy_data |= M88E1000_PSCR_POLARITY_REVERSAL;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable downshift on BM (disabled by default) */</div><div class='del'>-	if (phy-&gt;type == e1000_phy_bm)</div><div class='add'>+	if (phy-&gt;type == e1000_phy_bm) {</div><div class='add'>+		/* For 82574/82583, first disable then enable downshift */</div><div class='add'>+		if (phy-&gt;id == BME1000_E_PHY_ID_R2) {</div><div class='add'>+			phy_data &amp;= ~BME1000_PSCR_ENABLE_DOWNSHIFT;</div><div class='add'>+			ret_val = e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL,</div><div class='add'>+					   phy_data);</div><div class='add'>+			if (ret_val)</div><div class='add'>+				return ret_val;</div><div class='add'>+			/* Commit the changes. */</div><div class='add'>+			ret_val = e1000e_commit_phy(hw);</div><div class='add'>+			if (ret_val) {</div><div class='add'>+				e_dbg("Error committing the PHY changes\n");</div><div class='add'>+				return ret_val;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		phy_data |= BME1000_PSCR_ENABLE_DOWNSHIFT;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret_val = e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, phy_data);</div><div class='ctx'> 	if (ret_val)</div><div class='hunk'>@@ -879,31 +938,7 @@ s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw)</div><div class='ctx'> 				return ret_val;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ret_val = e1e_rphy(hw, PHY_1000T_CTRL, &amp;data);</div><div class='del'>-		if (ret_val)</div><div class='del'>-			return ret_val;</div><div class='del'>-</div><div class='del'>-		/* load defaults for future use */</div><div class='del'>-		phy-&gt;original_ms_type = (data &amp; CR_1000T_MS_ENABLE) ?</div><div class='del'>-			((data &amp; CR_1000T_MS_VALUE) ?</div><div class='del'>-			e1000_ms_force_master :</div><div class='del'>-			e1000_ms_force_slave) :</div><div class='del'>-			e1000_ms_auto;</div><div class='del'>-</div><div class='del'>-		switch (phy-&gt;ms_type) {</div><div class='del'>-		case e1000_ms_force_master:</div><div class='del'>-			data |= (CR_1000T_MS_ENABLE | CR_1000T_MS_VALUE);</div><div class='del'>-			break;</div><div class='del'>-		case e1000_ms_force_slave:</div><div class='del'>-			data |= CR_1000T_MS_ENABLE;</div><div class='del'>-			data &amp;= ~(CR_1000T_MS_VALUE);</div><div class='del'>-			break;</div><div class='del'>-		case e1000_ms_auto:</div><div class='del'>-			data &amp;= ~CR_1000T_MS_ENABLE;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		ret_val = e1e_wphy(hw, PHY_1000T_CTRL, data);</div><div class='add'>+		ret_val = e1000_set_master_slave_mode(hw);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret_val;</div><div class='hunk'>@@ -1090,7 +1125,7 @@ static s32 e1000_copper_link_autoneg(struct e1000_hw *hw)</div><div class='ctx'> 	 * If autoneg_advertised is zero, we assume it was not defaulted</div><div class='ctx'> 	 * by the calling code so we set to advertise full capability.</div><div class='ctx'> 	 */</div><div class='del'>-	if (phy-&gt;autoneg_advertised == 0)</div><div class='add'>+	if (!phy-&gt;autoneg_advertised)</div><div class='ctx'> 		phy-&gt;autoneg_advertised = phy-&gt;autoneg_mask;</div><div class='ctx'> </div><div class='ctx'> 	e_dbg("Reconfiguring auto-neg advertisement params\n");</div><div class='hunk'>@@ -1596,7 +1631,7 @@ s32 e1000e_check_downshift(struct e1000_hw *hw)</div><div class='ctx'> 	ret_val = e1e_rphy(hw, offset, &amp;phy_data);</div><div class='ctx'> </div><div class='ctx'> 	if (!ret_val)</div><div class='del'>-		phy-&gt;speed_downgraded = (phy_data &amp; mask);</div><div class='add'>+		phy-&gt;speed_downgraded = !!(phy_data &amp; mask);</div><div class='ctx'> </div><div class='ctx'> 	return ret_val;</div><div class='ctx'> }</div><div class='hunk'>@@ -1925,8 +1960,8 @@ s32 e1000e_get_phy_info_m88(struct e1000_hw *hw)</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		return ret_val;</div><div class='ctx'> </div><div class='del'>-	phy-&gt;polarity_correction = (phy_data &amp;</div><div class='del'>-				    M88E1000_PSCR_POLARITY_REVERSAL);</div><div class='add'>+	phy-&gt;polarity_correction = !!(phy_data &amp;</div><div class='add'>+				      M88E1000_PSCR_POLARITY_REVERSAL);</div><div class='ctx'> </div><div class='ctx'> 	ret_val = e1000_check_polarity_m88(hw);</div><div class='ctx'> 	if (ret_val)</div><div class='hunk'>@@ -1936,7 +1971,7 @@ s32 e1000e_get_phy_info_m88(struct e1000_hw *hw)</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		return ret_val;</div><div class='ctx'> </div><div class='del'>-	phy-&gt;is_mdix = (phy_data &amp; M88E1000_PSSR_MDIX);</div><div class='add'>+	phy-&gt;is_mdix = !!(phy_data &amp; M88E1000_PSSR_MDIX);</div><div class='ctx'> </div><div class='ctx'> 	if ((phy_data &amp; M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) {</div><div class='ctx'> 		ret_val = e1000_get_cable_length(hw);</div><div class='hunk'>@@ -1999,7 +2034,7 @@ s32 e1000e_get_phy_info_igp(struct e1000_hw *hw)</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		return ret_val;</div><div class='ctx'> </div><div class='del'>-	phy-&gt;is_mdix = (data &amp; IGP01E1000_PSSR_MDIX);</div><div class='add'>+	phy-&gt;is_mdix = !!(data &amp; IGP01E1000_PSSR_MDIX);</div><div class='ctx'> </div><div class='ctx'> 	if ((data &amp; IGP01E1000_PSSR_SPEED_MASK) ==</div><div class='ctx'> 	    IGP01E1000_PSSR_SPEED_1000MBPS) {</div><div class='hunk'>@@ -2052,8 +2087,7 @@ s32 e1000_get_phy_info_ife(struct e1000_hw *hw)</div><div class='ctx'> 	ret_val = e1e_rphy(hw, IFE_PHY_SPECIAL_CONTROL, &amp;data);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		return ret_val;</div><div class='del'>-	phy-&gt;polarity_correction = (data &amp; IFE_PSC_AUTO_POLARITY_DISABLE)</div><div class='del'>-	                           ? false : true;</div><div class='add'>+	phy-&gt;polarity_correction = !(data &amp; IFE_PSC_AUTO_POLARITY_DISABLE);</div><div class='ctx'> </div><div class='ctx'> 	if (phy-&gt;polarity_correction) {</div><div class='ctx'> 		ret_val = e1000_check_polarity_ife(hw);</div><div class='hunk'>@@ -2070,7 +2104,7 @@ s32 e1000_get_phy_info_ife(struct e1000_hw *hw)</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		return ret_val;</div><div class='ctx'> </div><div class='del'>-	phy-&gt;is_mdix = (data &amp; IFE_PMC_MDIX_STATUS) ? true : false;</div><div class='add'>+	phy-&gt;is_mdix = !!(data &amp; IFE_PMC_MDIX_STATUS);</div><div class='ctx'> </div><div class='ctx'> 	/* The following parameters are undefined for 10/100 operation. */</div><div class='ctx'> 	phy-&gt;cable_length = E1000_CABLE_LENGTH_UNDEFINED;</div><div class='hunk'>@@ -2320,6 +2354,9 @@ enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id)</div><div class='ctx'> 	case I82579_E_PHY_ID:</div><div class='ctx'> 		phy_type = e1000_phy_82579;</div><div class='ctx'> 		break;</div><div class='add'>+	case I217_E_PHY_ID:</div><div class='add'>+		phy_type = e1000_phy_i217;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		phy_type = e1000_phy_unknown;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2979,7 +3016,7 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,</div><div class='ctx'> 		if ((hw-&gt;phy.type == e1000_phy_82578) &amp;&amp;</div><div class='ctx'> 		    (hw-&gt;phy.revision &gt;= 1) &amp;&amp;</div><div class='ctx'> 		    (hw-&gt;phy.addr == 2) &amp;&amp;</div><div class='del'>-		    ((MAX_PHY_REG_ADDRESS &amp; reg) == 0) &amp;&amp; (data &amp; (1 &lt;&lt; 11))) {</div><div class='add'>+		    !(MAX_PHY_REG_ADDRESS &amp; reg) &amp;&amp; (data &amp; (1 &lt;&lt; 11))) {</div><div class='ctx'> 			u16 data2 = 0x7EFF;</div><div class='ctx'> 			ret_val = e1000_access_phy_debug_regs_hv(hw,</div><div class='ctx'> 								 (1 &lt;&lt; 6) | 0x3,</div><div class='hunk'>@@ -3265,7 +3302,7 @@ s32 e1000_get_phy_info_82577(struct e1000_hw *hw)</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		return ret_val;</div><div class='ctx'> </div><div class='del'>-	phy-&gt;is_mdix = (data &amp; I82577_PHY_STATUS2_MDIX) ? true : false;</div><div class='add'>+	phy-&gt;is_mdix = !!(data &amp; I82577_PHY_STATUS2_MDIX);</div><div class='ctx'> </div><div class='ctx'> 	if ((data &amp; I82577_PHY_STATUS2_SPEED_MASK) ==</div><div class='ctx'> 	    I82577_PHY_STATUS2_SPEED_1000MBPS) {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/Makefile b/drivers/net/ethernet/intel/igb/Makefile<br/>index 6565c463185c..97c197fd4a8e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/Makefile</a></div><div class='hunk'>@@ -33,5 +33,7 @@</div><div class='ctx'> obj-$(CONFIG_IGB) += igb.o</div><div class='ctx'> </div><div class='ctx'> igb-objs := igb_main.o igb_ethtool.o e1000_82575.o \</div><div class='del'>-	    e1000_mac.o e1000_nvm.o e1000_phy.o e1000_mbx.o</div><div class='add'>+	    e1000_mac.o e1000_nvm.o e1000_phy.o e1000_mbx.o \</div><div class='add'>+	    e1000_i210.o</div><div class='ctx'> </div><div class='add'>+igb-$(CONFIG_IGB_PTP) += igb_ptp.o</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c<br/>index 08bdc33715ee..e65083958421 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_82575.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/e1000_82575.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_82575.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_82575.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "e1000_mac.h"</div><div class='ctx'> #include "e1000_82575.h"</div><div class='add'>+#include "e1000_i210.h"</div><div class='ctx'> </div><div class='ctx'> static s32  igb_get_invariants_82575(struct e1000_hw *);</div><div class='ctx'> static s32  igb_acquire_phy_82575(struct e1000_hw *);</div><div class='hunk'>@@ -52,6 +53,8 @@ static s32  igb_write_phy_reg_82580(struct e1000_hw *, u32, u16);</div><div class='ctx'> static s32  igb_reset_hw_82575(struct e1000_hw *);</div><div class='ctx'> static s32  igb_reset_hw_82580(struct e1000_hw *);</div><div class='ctx'> static s32  igb_set_d0_lplu_state_82575(struct e1000_hw *, bool);</div><div class='add'>+static s32  igb_set_d0_lplu_state_82580(struct e1000_hw *, bool);</div><div class='add'>+static s32  igb_set_d3_lplu_state_82580(struct e1000_hw *, bool);</div><div class='ctx'> static s32  igb_setup_copper_link_82575(struct e1000_hw *);</div><div class='ctx'> static s32  igb_setup_serdes_link_82575(struct e1000_hw *);</div><div class='ctx'> static s32  igb_write_phy_reg_sgmii_82575(struct e1000_hw *, u32, u16);</div><div class='hunk'>@@ -96,6 +99,8 @@ static bool igb_sgmii_uses_mdio_82575(struct e1000_hw *hw)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case e1000_82580:</div><div class='ctx'> 	case e1000_i350:</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='ctx'> 		reg = rd32(E1000_MDICNFG);</div><div class='ctx'> 		ext_mdio = !!(reg &amp; E1000_MDICNFG_EXT_MDIO);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -150,6 +155,17 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)</div><div class='ctx'> 	case E1000_DEV_ID_I350_SGMII:</div><div class='ctx'> 		mac-&gt;type = e1000_i350;</div><div class='ctx'> 		break;</div><div class='add'>+	case E1000_DEV_ID_I210_COPPER:</div><div class='add'>+	case E1000_DEV_ID_I210_COPPER_OEM1:</div><div class='add'>+	case E1000_DEV_ID_I210_COPPER_IT:</div><div class='add'>+	case E1000_DEV_ID_I210_FIBER:</div><div class='add'>+	case E1000_DEV_ID_I210_SERDES:</div><div class='add'>+	case E1000_DEV_ID_I210_SGMII:</div><div class='add'>+		mac-&gt;type = e1000_i210;</div><div class='add'>+		break;</div><div class='add'>+	case E1000_DEV_ID_I211_COPPER:</div><div class='add'>+		mac-&gt;type = e1000_i211;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -E1000_ERR_MAC_INIT;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -182,26 +198,44 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)</div><div class='ctx'> 	/* Set mta register count */</div><div class='ctx'> 	mac-&gt;mta_reg_count = 128;</div><div class='ctx'> 	/* Set rar entry count */</div><div class='del'>-	mac-&gt;rar_entry_count = E1000_RAR_ENTRIES_82575;</div><div class='del'>-	if (mac-&gt;type == e1000_82576)</div><div class='add'>+	switch (mac-&gt;type) {</div><div class='add'>+	case e1000_82576:</div><div class='ctx'> 		mac-&gt;rar_entry_count = E1000_RAR_ENTRIES_82576;</div><div class='del'>-	if (mac-&gt;type == e1000_82580)</div><div class='add'>+		break;</div><div class='add'>+	case e1000_82580:</div><div class='ctx'> 		mac-&gt;rar_entry_count = E1000_RAR_ENTRIES_82580;</div><div class='del'>-	if (mac-&gt;type == e1000_i350)</div><div class='add'>+		break;</div><div class='add'>+	case e1000_i350:</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='ctx'> 		mac-&gt;rar_entry_count = E1000_RAR_ENTRIES_I350;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		mac-&gt;rar_entry_count = E1000_RAR_ENTRIES_82575;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> 	/* reset */</div><div class='ctx'> 	if (mac-&gt;type &gt;= e1000_82580)</div><div class='ctx'> 		mac-&gt;ops.reset_hw = igb_reset_hw_82580;</div><div class='ctx'> 	else</div><div class='ctx'> 		mac-&gt;ops.reset_hw = igb_reset_hw_82575;</div><div class='add'>+</div><div class='add'>+	if (mac-&gt;type &gt;= e1000_i210) {</div><div class='add'>+		mac-&gt;ops.acquire_swfw_sync = igb_acquire_swfw_sync_i210;</div><div class='add'>+		mac-&gt;ops.release_swfw_sync = igb_release_swfw_sync_i210;</div><div class='add'>+	} else {</div><div class='add'>+		mac-&gt;ops.acquire_swfw_sync = igb_acquire_swfw_sync_82575;</div><div class='add'>+		mac-&gt;ops.release_swfw_sync = igb_release_swfw_sync_82575;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Set if part includes ASF firmware */</div><div class='ctx'> 	mac-&gt;asf_firmware_present = true;</div><div class='ctx'> 	/* Set if manageability features are enabled. */</div><div class='ctx'> 	mac-&gt;arc_subsystem_valid =</div><div class='ctx'> 		(rd32(E1000_FWSM) &amp; E1000_FWSM_MODE_MASK)</div><div class='ctx'> 			? true : false;</div><div class='del'>-	/* enable EEE on i350 parts */</div><div class='del'>-	if (mac-&gt;type == e1000_i350)</div><div class='add'>+	/* enable EEE on i350 parts and later parts */</div><div class='add'>+	if (mac-&gt;type &gt;= e1000_i350)</div><div class='ctx'> 		dev_spec-&gt;eee_disable = false;</div><div class='ctx'> 	else</div><div class='ctx'> 		dev_spec-&gt;eee_disable = true;</div><div class='hunk'>@@ -213,26 +247,6 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	/* NVM initialization */</div><div class='ctx'> 	eecd = rd32(E1000_EECD);</div><div class='del'>-</div><div class='del'>-	nvm-&gt;opcode_bits        = 8;</div><div class='del'>-	nvm-&gt;delay_usec         = 1;</div><div class='del'>-	switch (nvm-&gt;override) {</div><div class='del'>-	case e1000_nvm_override_spi_large:</div><div class='del'>-		nvm-&gt;page_size    = 32;</div><div class='del'>-		nvm-&gt;address_bits = 16;</div><div class='del'>-		break;</div><div class='del'>-	case e1000_nvm_override_spi_small:</div><div class='del'>-		nvm-&gt;page_size    = 8;</div><div class='del'>-		nvm-&gt;address_bits = 8;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		nvm-&gt;page_size    = eecd &amp; E1000_EECD_ADDR_BITS ? 32 : 8;</div><div class='del'>-		nvm-&gt;address_bits = eecd &amp; E1000_EECD_ADDR_BITS ? 16 : 8;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	nvm-&gt;type = e1000_nvm_eeprom_spi;</div><div class='del'>-</div><div class='ctx'> 	size = (u16)((eecd &amp; E1000_EECD_SIZE_EX_MASK) &gt;&gt;</div><div class='ctx'> 		     E1000_EECD_SIZE_EX_SHIFT);</div><div class='ctx'> </div><div class='hunk'>@@ -242,6 +256,33 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)</div><div class='ctx'> 	 */</div><div class='ctx'> 	size += NVM_WORD_SIZE_BASE_SHIFT;</div><div class='ctx'> </div><div class='add'>+	nvm-&gt;word_size = 1 &lt;&lt; size;</div><div class='add'>+	if (hw-&gt;mac.type &lt; e1000_i210) {</div><div class='add'>+		nvm-&gt;opcode_bits        = 8;</div><div class='add'>+		nvm-&gt;delay_usec         = 1;</div><div class='add'>+		switch (nvm-&gt;override) {</div><div class='add'>+		case e1000_nvm_override_spi_large:</div><div class='add'>+			nvm-&gt;page_size    = 32;</div><div class='add'>+			nvm-&gt;address_bits = 16;</div><div class='add'>+			break;</div><div class='add'>+		case e1000_nvm_override_spi_small:</div><div class='add'>+			nvm-&gt;page_size    = 8;</div><div class='add'>+			nvm-&gt;address_bits = 8;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			nvm-&gt;page_size    = eecd</div><div class='add'>+				&amp; E1000_EECD_ADDR_BITS ? 32 : 8;</div><div class='add'>+			nvm-&gt;address_bits = eecd</div><div class='add'>+				&amp; E1000_EECD_ADDR_BITS ? 16 : 8;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (nvm-&gt;word_size == (1 &lt;&lt; 15))</div><div class='add'>+			nvm-&gt;page_size = 128;</div><div class='add'>+</div><div class='add'>+		nvm-&gt;type = e1000_nvm_eeprom_spi;</div><div class='add'>+	} else</div><div class='add'>+		nvm-&gt;type = e1000_nvm_flash_hw;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check for invalid size</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -249,32 +290,60 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)</div><div class='ctx'> 		pr_notice("The NVM size is not valid, defaulting to 32K\n");</div><div class='ctx'> 		size = 15;</div><div class='ctx'> 	}</div><div class='del'>-	nvm-&gt;word_size = 1 &lt;&lt; size;</div><div class='del'>-	if (nvm-&gt;word_size == (1 &lt;&lt; 15))</div><div class='del'>-		nvm-&gt;page_size = 128;</div><div class='ctx'> </div><div class='ctx'> 	/* NVM Function Pointers */</div><div class='del'>-	nvm-&gt;ops.acquire = igb_acquire_nvm_82575;</div><div class='del'>-	if (nvm-&gt;word_size &lt; (1 &lt;&lt; 15))</div><div class='del'>-		nvm-&gt;ops.read = igb_read_nvm_eerd;</div><div class='del'>-	else</div><div class='del'>-		nvm-&gt;ops.read = igb_read_nvm_spi;</div><div class='del'>-</div><div class='del'>-	nvm-&gt;ops.release = igb_release_nvm_82575;</div><div class='ctx'> 	switch (hw-&gt;mac.type) {</div><div class='ctx'> 	case e1000_82580:</div><div class='ctx'> 		nvm-&gt;ops.validate = igb_validate_nvm_checksum_82580;</div><div class='ctx'> 		nvm-&gt;ops.update = igb_update_nvm_checksum_82580;</div><div class='add'>+		nvm-&gt;ops.acquire = igb_acquire_nvm_82575;</div><div class='add'>+		nvm-&gt;ops.release = igb_release_nvm_82575;</div><div class='add'>+		if (nvm-&gt;word_size &lt; (1 &lt;&lt; 15))</div><div class='add'>+			nvm-&gt;ops.read = igb_read_nvm_eerd;</div><div class='add'>+		else</div><div class='add'>+			nvm-&gt;ops.read = igb_read_nvm_spi;</div><div class='add'>+		nvm-&gt;ops.write = igb_write_nvm_spi;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case e1000_i350:</div><div class='ctx'> 		nvm-&gt;ops.validate = igb_validate_nvm_checksum_i350;</div><div class='ctx'> 		nvm-&gt;ops.update = igb_update_nvm_checksum_i350;</div><div class='add'>+		nvm-&gt;ops.acquire = igb_acquire_nvm_82575;</div><div class='add'>+		nvm-&gt;ops.release = igb_release_nvm_82575;</div><div class='add'>+		if (nvm-&gt;word_size &lt; (1 &lt;&lt; 15))</div><div class='add'>+			nvm-&gt;ops.read = igb_read_nvm_eerd;</div><div class='add'>+		else</div><div class='add'>+			nvm-&gt;ops.read = igb_read_nvm_spi;</div><div class='add'>+		nvm-&gt;ops.write = igb_write_nvm_spi;</div><div class='add'>+		break;</div><div class='add'>+	case e1000_i210:</div><div class='add'>+		nvm-&gt;ops.validate = igb_validate_nvm_checksum_i210;</div><div class='add'>+		nvm-&gt;ops.update   = igb_update_nvm_checksum_i210;</div><div class='add'>+		nvm-&gt;ops.acquire = igb_acquire_nvm_i210;</div><div class='add'>+		nvm-&gt;ops.release = igb_release_nvm_i210;</div><div class='add'>+		nvm-&gt;ops.read    = igb_read_nvm_srrd_i210;</div><div class='add'>+		nvm-&gt;ops.valid_led_default = igb_valid_led_default_i210;</div><div class='add'>+		break;</div><div class='add'>+	case e1000_i211:</div><div class='add'>+		nvm-&gt;ops.acquire  = igb_acquire_nvm_i210;</div><div class='add'>+		nvm-&gt;ops.release  = igb_release_nvm_i210;</div><div class='add'>+		nvm-&gt;ops.read     = igb_read_nvm_i211;</div><div class='add'>+		nvm-&gt;ops.valid_led_default = igb_valid_led_default_i210;</div><div class='add'>+		nvm-&gt;ops.validate = NULL;</div><div class='add'>+		nvm-&gt;ops.update   = NULL;</div><div class='add'>+		nvm-&gt;ops.write    = NULL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		nvm-&gt;ops.validate = igb_validate_nvm_checksum;</div><div class='ctx'> 		nvm-&gt;ops.update = igb_update_nvm_checksum;</div><div class='add'>+		nvm-&gt;ops.acquire = igb_acquire_nvm_82575;</div><div class='add'>+		nvm-&gt;ops.release = igb_release_nvm_82575;</div><div class='add'>+		if (nvm-&gt;word_size &lt; (1 &lt;&lt; 15))</div><div class='add'>+			nvm-&gt;ops.read = igb_read_nvm_eerd;</div><div class='add'>+		else</div><div class='add'>+			nvm-&gt;ops.read = igb_read_nvm_spi;</div><div class='add'>+		nvm-&gt;ops.write = igb_write_nvm_spi;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='del'>-	nvm-&gt;ops.write = igb_write_nvm_spi;</div><div class='ctx'> </div><div class='ctx'> 	/* if part supports SR-IOV then initialize mailbox parameters */</div><div class='ctx'> 	switch (mac-&gt;type) {</div><div class='hunk'>@@ -312,9 +381,13 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)</div><div class='ctx'> 	if (igb_sgmii_active_82575(hw) &amp;&amp; !igb_sgmii_uses_mdio_82575(hw)) {</div><div class='ctx'> 		phy-&gt;ops.read_reg   = igb_read_phy_reg_sgmii_82575;</div><div class='ctx'> 		phy-&gt;ops.write_reg  = igb_write_phy_reg_sgmii_82575;</div><div class='del'>-	} else if (hw-&gt;mac.type &gt;= e1000_82580) {</div><div class='add'>+	} else if ((hw-&gt;mac.type == e1000_82580)</div><div class='add'>+		|| (hw-&gt;mac.type == e1000_i350)) {</div><div class='ctx'> 		phy-&gt;ops.read_reg   = igb_read_phy_reg_82580;</div><div class='ctx'> 		phy-&gt;ops.write_reg  = igb_write_phy_reg_82580;</div><div class='add'>+	} else if (hw-&gt;phy.type &gt;= e1000_phy_i210) {</div><div class='add'>+		phy-&gt;ops.read_reg   = igb_read_phy_reg_gs40g;</div><div class='add'>+		phy-&gt;ops.write_reg  = igb_write_phy_reg_gs40g;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		phy-&gt;ops.read_reg   = igb_read_phy_reg_igp;</div><div class='ctx'> 		phy-&gt;ops.write_reg  = igb_write_phy_reg_igp;</div><div class='hunk'>@@ -343,6 +416,14 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)</div><div class='ctx'> 		else</div><div class='ctx'> 			phy-&gt;ops.get_cable_length = igb_get_cable_length_m88;</div><div class='ctx'> </div><div class='add'>+		if (phy-&gt;id == I210_I_PHY_ID) {</div><div class='add'>+			phy-&gt;ops.get_cable_length =</div><div class='add'>+					 igb_get_cable_length_m88_gen2;</div><div class='add'>+			phy-&gt;ops.set_d0_lplu_state =</div><div class='add'>+					igb_set_d0_lplu_state_82580;</div><div class='add'>+			phy-&gt;ops.set_d3_lplu_state =</div><div class='add'>+					igb_set_d3_lplu_state_82580;</div><div class='add'>+		}</div><div class='ctx'> 		phy-&gt;ops.force_speed_duplex = igb_phy_force_speed_duplex_m88;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IGP03E1000_E_PHY_ID:</div><div class='hunk'>@@ -359,6 +440,17 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)</div><div class='ctx'> 		phy-&gt;ops.force_speed_duplex = igb_phy_force_speed_duplex_82580;</div><div class='ctx'> 		phy-&gt;ops.get_cable_length   = igb_get_cable_length_82580;</div><div class='ctx'> 		phy-&gt;ops.get_phy_info       = igb_get_phy_info_82580;</div><div class='add'>+		phy-&gt;ops.set_d0_lplu_state  = igb_set_d0_lplu_state_82580;</div><div class='add'>+		phy-&gt;ops.set_d3_lplu_state  = igb_set_d3_lplu_state_82580;</div><div class='add'>+		break;</div><div class='add'>+	case I210_I_PHY_ID:</div><div class='add'>+		phy-&gt;type                   = e1000_phy_i210;</div><div class='add'>+		phy-&gt;ops.get_phy_info       = igb_get_phy_info_m88;</div><div class='add'>+		phy-&gt;ops.check_polarity     = igb_check_polarity_m88;</div><div class='add'>+		phy-&gt;ops.get_cable_length   = igb_get_cable_length_m88_gen2;</div><div class='add'>+		phy-&gt;ops.set_d0_lplu_state  = igb_set_d0_lplu_state_82580;</div><div class='add'>+		phy-&gt;ops.set_d3_lplu_state  = igb_set_d3_lplu_state_82580;</div><div class='add'>+		phy-&gt;ops.force_speed_duplex = igb_phy_force_speed_duplex_m88;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -E1000_ERR_PHY;</div><div class='hunk'>@@ -385,7 +477,7 @@ static s32 igb_acquire_phy_82575(struct e1000_hw *hw)</div><div class='ctx'> 	else if (hw-&gt;bus.func == E1000_FUNC_3)</div><div class='ctx'> 		mask = E1000_SWFW_PHY3_SM;</div><div class='ctx'> </div><div class='del'>-	return igb_acquire_swfw_sync_82575(hw, mask);</div><div class='add'>+	return hw-&gt;mac.ops.acquire_swfw_sync(hw, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -406,7 +498,7 @@ static void igb_release_phy_82575(struct e1000_hw *hw)</div><div class='ctx'> 	else if (hw-&gt;bus.func == E1000_FUNC_3)</div><div class='ctx'> 		mask = E1000_SWFW_PHY3_SM;</div><div class='ctx'> </div><div class='del'>-	igb_release_swfw_sync_82575(hw, mask);</div><div class='add'>+	hw-&gt;mac.ops.release_swfw_sync(hw, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -510,6 +602,8 @@ static s32 igb_get_phy_id_82575(struct e1000_hw *hw)</div><div class='ctx'> 			break;</div><div class='ctx'> 		case e1000_82580:</div><div class='ctx'> 		case e1000_i350:</div><div class='add'>+		case e1000_i210:</div><div class='add'>+		case e1000_i211:</div><div class='ctx'> 			mdic = rd32(E1000_MDICNFG);</div><div class='ctx'> 			mdic &amp;= E1000_MDICNFG_PHY_MASK;</div><div class='ctx'> 			phy-&gt;addr = mdic &gt;&gt; E1000_MDICNFG_PHY_SHIFT;</div><div class='hunk'>@@ -674,6 +768,96 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ *  igb_set_d0_lplu_state_82580 - Set Low Power Linkup D0 state</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @active: true to enable LPLU, false to disable</div><div class='add'>+ *</div><div class='add'>+ *  Sets the LPLU D0 state according to the active flag.  When</div><div class='add'>+ *  activating LPLU this function also disables smart speed</div><div class='add'>+ *  and vice versa.  LPLU will not be activated unless the</div><div class='add'>+ *  device autonegotiation advertisement meets standards of</div><div class='add'>+ *  either 10 or 10/100 or 10/100/1000 at all duplexes.</div><div class='add'>+ *  This is a function pointer entry point only called by</div><div class='add'>+ *  PHY setup routines.</div><div class='add'>+ **/</div><div class='add'>+static s32 igb_set_d0_lplu_state_82580(struct e1000_hw *hw, bool active)</div><div class='add'>+{</div><div class='add'>+	struct e1000_phy_info *phy = &amp;hw-&gt;phy;</div><div class='add'>+	s32 ret_val = 0;</div><div class='add'>+	u16 data;</div><div class='add'>+</div><div class='add'>+	data = rd32(E1000_82580_PHY_POWER_MGMT);</div><div class='add'>+</div><div class='add'>+	if (active) {</div><div class='add'>+		data |= E1000_82580_PM_D0_LPLU;</div><div class='add'>+</div><div class='add'>+		/* When LPLU is enabled, we should disable SmartSpeed */</div><div class='add'>+		data &amp;= ~E1000_82580_PM_SPD;</div><div class='add'>+	} else {</div><div class='add'>+		data &amp;= ~E1000_82580_PM_D0_LPLU;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * LPLU and SmartSpeed are mutually exclusive.  LPLU is used</div><div class='add'>+		 * during Dx states where the power conservation is most</div><div class='add'>+		 * important.  During driver activity we should enable</div><div class='add'>+		 * SmartSpeed, so performance is maintained.</div><div class='add'>+		 */</div><div class='add'>+		if (phy-&gt;smart_speed == e1000_smart_speed_on)</div><div class='add'>+			data |= E1000_82580_PM_SPD;</div><div class='add'>+		else if (phy-&gt;smart_speed == e1000_smart_speed_off)</div><div class='add'>+			data &amp;= ~E1000_82580_PM_SPD; }</div><div class='add'>+</div><div class='add'>+	wr32(E1000_82580_PHY_POWER_MGMT, data);</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_set_d3_lplu_state_82580 - Sets low power link up state for D3</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @active: boolean used to enable/disable lplu</div><div class='add'>+ *</div><div class='add'>+ *  Success returns 0, Failure returns 1</div><div class='add'>+ *</div><div class='add'>+ *  The low power link up (lplu) state is set to the power management level D3</div><div class='add'>+ *  and SmartSpeed is disabled when active is true, else clear lplu for D3</div><div class='add'>+ *  and enable Smartspeed.  LPLU and Smartspeed are mutually exclusive.  LPLU</div><div class='add'>+ *  is used during Dx states where the power conservation is most important.</div><div class='add'>+ *  During driver activity, SmartSpeed should be enabled so performance is</div><div class='add'>+ *  maintained.</div><div class='add'>+ **/</div><div class='add'>+s32 igb_set_d3_lplu_state_82580(struct e1000_hw *hw, bool active)</div><div class='add'>+{</div><div class='add'>+	struct e1000_phy_info *phy = &amp;hw-&gt;phy;</div><div class='add'>+	s32 ret_val = 0;</div><div class='add'>+	u16 data;</div><div class='add'>+</div><div class='add'>+	data = rd32(E1000_82580_PHY_POWER_MGMT);</div><div class='add'>+</div><div class='add'>+	if (!active) {</div><div class='add'>+		data &amp;= ~E1000_82580_PM_D3_LPLU;</div><div class='add'>+		/*</div><div class='add'>+		 * LPLU and SmartSpeed are mutually exclusive.  LPLU is used</div><div class='add'>+		 * during Dx states where the power conservation is most</div><div class='add'>+		 * important.  During driver activity we should enable</div><div class='add'>+		 * SmartSpeed, so performance is maintained.</div><div class='add'>+		 */</div><div class='add'>+		if (phy-&gt;smart_speed == e1000_smart_speed_on)</div><div class='add'>+			data |= E1000_82580_PM_SPD;</div><div class='add'>+		else if (phy-&gt;smart_speed == e1000_smart_speed_off)</div><div class='add'>+			data &amp;= ~E1000_82580_PM_SPD;</div><div class='add'>+	} else if ((phy-&gt;autoneg_advertised == E1000_ALL_SPEED_DUPLEX) ||</div><div class='add'>+		   (phy-&gt;autoneg_advertised == E1000_ALL_NOT_GIG) ||</div><div class='add'>+		   (phy-&gt;autoneg_advertised == E1000_ALL_10_SPEED)) {</div><div class='add'>+		data |= E1000_82580_PM_D3_LPLU;</div><div class='add'>+		/* When LPLU is enabled, we should disable SmartSpeed */</div><div class='add'>+		data &amp;= ~E1000_82580_PM_SPD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wr32(E1000_82580_PHY_POWER_MGMT, data);</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  *  igb_acquire_nvm_82575 - Request for access to EEPROM</div><div class='ctx'>  *  @hw: pointer to the HW structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -686,14 +870,14 @@ static s32 igb_acquire_nvm_82575(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	s32 ret_val;</div><div class='ctx'> </div><div class='del'>-	ret_val = igb_acquire_swfw_sync_82575(hw, E1000_SWFW_EEP_SM);</div><div class='add'>+	ret_val = hw-&gt;mac.ops.acquire_swfw_sync(hw, E1000_SWFW_EEP_SM);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ret_val = igb_acquire_nvm(hw);</div><div class='ctx'> </div><div class='ctx'> 	if (ret_val)</div><div class='del'>-		igb_release_swfw_sync_82575(hw, E1000_SWFW_EEP_SM);</div><div class='add'>+		hw-&gt;mac.ops.release_swfw_sync(hw, E1000_SWFW_EEP_SM);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return ret_val;</div><div class='hunk'>@@ -709,7 +893,7 @@ out:</div><div class='ctx'> static void igb_release_nvm_82575(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	igb_release_nvm(hw);</div><div class='del'>-	igb_release_swfw_sync_82575(hw, E1000_SWFW_EEP_SM);</div><div class='add'>+	hw-&gt;mac.ops.release_swfw_sync(hw, E1000_SWFW_EEP_SM);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1080,7 +1264,6 @@ static s32 igb_init_hw_82575(struct e1000_hw *hw)</div><div class='ctx'> 	 * is no link.</div><div class='ctx'> 	 */</div><div class='ctx'> 	igb_clear_hw_cntrs_82575(hw);</div><div class='del'>-</div><div class='ctx'> 	return ret_val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1117,6 +1300,7 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	switch (hw-&gt;phy.type) {</div><div class='add'>+	case e1000_phy_i210:</div><div class='ctx'> 	case e1000_phy_m88:</div><div class='ctx'> 		if (hw-&gt;phy.id == I347AT4_E_PHY_ID ||</div><div class='ctx'> 		    hw-&gt;phy.id == M88E1112_E_PHY_ID)</div><div class='hunk'>@@ -1757,7 +1941,7 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	/* Determine whether or not a global dev reset is requested */</div><div class='ctx'> 	if (global_device_reset &amp;&amp;</div><div class='del'>-		igb_acquire_swfw_sync_82575(hw, swmbsw_mask))</div><div class='add'>+		hw-&gt;mac.ops.acquire_swfw_sync(hw, swmbsw_mask))</div><div class='ctx'> 			global_device_reset = false;</div><div class='ctx'> </div><div class='ctx'> 	if (global_device_reset &amp;&amp;</div><div class='hunk'>@@ -1803,7 +1987,7 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	/* Release semaphore */</div><div class='ctx'> 	if (global_device_reset)</div><div class='del'>-		igb_release_swfw_sync_82575(hw, swmbsw_mask);</div><div class='add'>+		hw-&gt;mac.ops.release_swfw_sync(hw, swmbsw_mask);</div><div class='ctx'> </div><div class='ctx'> 	return ret_val;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.h b/drivers/net/ethernet/intel/igb/e1000_82575.h<br/>index b927d79ab536..e85c453f5428 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_82575.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/e1000_82575.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_82575.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_82575.h</a></div><div class='hunk'>@@ -55,10 +55,11 @@ extern void igb_rx_fifo_flush_82575(struct e1000_hw *hw);</div><div class='ctx'> #define E1000_SRRCTL_DROP_EN                            0x80000000</div><div class='ctx'> #define E1000_SRRCTL_TIMESTAMP                          0x40000000</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> #define E1000_MRQC_ENABLE_RSS_4Q            0x00000002</div><div class='ctx'> #define E1000_MRQC_ENABLE_VMDQ              0x00000003</div><div class='del'>-#define E1000_MRQC_ENABLE_VMDQ_RSS_2Q       0x00000005</div><div class='ctx'> #define E1000_MRQC_RSS_FIELD_IPV4_UDP       0x00400000</div><div class='add'>+#define E1000_MRQC_ENABLE_VMDQ_RSS_2Q       0x00000005</div><div class='ctx'> #define E1000_MRQC_RSS_FIELD_IPV6_UDP       0x00800000</div><div class='ctx'> #define E1000_MRQC_RSS_FIELD_IPV6_UDP_EX    0x01000000</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_defines.h b/drivers/net/ethernet/intel/igb/e1000_defines.h<br/>index 89eb1f85b9fa..ec7e4fe3e3ee 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_defines.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/e1000_defines.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_defines.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_defines.h</a></div><div class='hunk'>@@ -301,6 +301,8 @@</div><div class='ctx'> 							* transactions */</div><div class='ctx'> #define E1000_DMACR_DMAC_LX_SHIFT       28</div><div class='ctx'> #define E1000_DMACR_DMAC_EN             0x80000000 /* Enable DMA Coalescing */</div><div class='add'>+/* DMA Coalescing BMC-to-OS Watchdog Enable */</div><div class='add'>+#define E1000_DMACR_DC_BMC2OSW_EN	0x00008000</div><div class='ctx'> </div><div class='ctx'> #define E1000_DMCTXTH_DMCTTHR_MASK      0x00000FFF /* DMA Coalescing Transmit</div><div class='ctx'> 							* Threshold */</div><div class='hunk'>@@ -458,6 +460,7 @@</div><div class='ctx'> #define E1000_ERR_INVALID_ARGUMENT  16</div><div class='ctx'> #define E1000_ERR_NO_SPACE          17</div><div class='ctx'> #define E1000_ERR_NVM_PBA_SECTION   18</div><div class='add'>+#define E1000_ERR_INVM_VALUE_NOT_FOUND	19</div><div class='ctx'> </div><div class='ctx'> /* Loop limit on how long we wait for auto-negotiation to complete */</div><div class='ctx'> #define COPPER_LINK_UP_LIMIT              10</div><div class='hunk'>@@ -595,6 +598,25 @@</div><div class='ctx'> #define E1000_EECD_AUTO_RD          0x00000200  /* NVM Auto Read done */</div><div class='ctx'> #define E1000_EECD_SIZE_EX_MASK     0x00007800  /* NVM Size */</div><div class='ctx'> #define E1000_EECD_SIZE_EX_SHIFT     11</div><div class='add'>+#define E1000_EECD_FLUPD_I210		0x00800000 /* Update FLASH */</div><div class='add'>+#define E1000_EECD_FLUDONE_I210		0x04000000 /* Update FLASH done*/</div><div class='add'>+#define E1000_FLUDONE_ATTEMPTS		20000</div><div class='add'>+#define E1000_EERD_EEWR_MAX_COUNT	512 /* buffered EEPROM words rw */</div><div class='add'>+#define E1000_I210_FIFO_SEL_RX		0x00</div><div class='add'>+#define E1000_I210_FIFO_SEL_TX_QAV(_i)	(0x02 + (_i))</div><div class='add'>+#define E1000_I210_FIFO_SEL_TX_LEGACY	E1000_I210_FIFO_SEL_TX_QAV(0)</div><div class='add'>+#define E1000_I210_FIFO_SEL_BMC2OS_TX	0x06</div><div class='add'>+#define E1000_I210_FIFO_SEL_BMC2OS_RX	0x01</div><div class='add'>+#define E1000_EECD_FLUPD_I210		0x00800000 /* Update FLASH */</div><div class='add'>+#define E1000_EECD_FLUDONE_I210		0x04000000 /* Update FLASH done*/</div><div class='add'>+#define E1000_FLUDONE_ATTEMPTS		20000</div><div class='add'>+#define E1000_EERD_EEWR_MAX_COUNT	512 /* buffered EEPROM words rw */</div><div class='add'>+#define E1000_I210_FIFO_SEL_RX		0x00</div><div class='add'>+#define E1000_I210_FIFO_SEL_TX_QAV(_i)	(0x02 + (_i))</div><div class='add'>+#define E1000_I210_FIFO_SEL_TX_LEGACY	E1000_I210_FIFO_SEL_TX_QAV(0)</div><div class='add'>+#define E1000_I210_FIFO_SEL_BMC2OS_TX	0x06</div><div class='add'>+#define E1000_I210_FIFO_SEL_BMC2OS_RX	0x01</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /* Offset to data in NVM read/write registers */</div><div class='ctx'> #define E1000_NVM_RW_REG_DATA   16</div><div class='hunk'>@@ -613,6 +635,16 @@</div><div class='ctx'> #define NVM_CHECKSUM_REG           0x003F</div><div class='ctx'> #define NVM_COMPATIBILITY_REG_3    0x0003</div><div class='ctx'> #define NVM_COMPATIBILITY_BIT_MASK 0x8000</div><div class='add'>+#define NVM_MAC_ADDR               0x0000</div><div class='add'>+#define NVM_SUB_DEV_ID             0x000B</div><div class='add'>+#define NVM_SUB_VEN_ID             0x000C</div><div class='add'>+#define NVM_DEV_ID                 0x000D</div><div class='add'>+#define NVM_VEN_ID                 0x000E</div><div class='add'>+#define NVM_INIT_CTRL_2            0x000F</div><div class='add'>+#define NVM_INIT_CTRL_4            0x0013</div><div class='add'>+#define NVM_LED_1_CFG              0x001C</div><div class='add'>+#define NVM_LED_0_2_CFG            0x001F</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> #define E1000_NVM_CFG_DONE_PORT_0  0x040000 /* MNG config cycle done */</div><div class='ctx'> #define E1000_NVM_CFG_DONE_PORT_1  0x080000 /* ...for second port */</div><div class='hunk'>@@ -639,6 +671,7 @@</div><div class='ctx'> </div><div class='ctx'> #define NVM_PBA_OFFSET_0           8</div><div class='ctx'> #define NVM_PBA_OFFSET_1           9</div><div class='add'>+#define NVM_RESERVED_WORD		0xFFFF</div><div class='ctx'> #define NVM_PBA_PTR_GUARD          0xFAFA</div><div class='ctx'> #define NVM_WORD_SIZE_BASE_SHIFT   6</div><div class='ctx'> </div><div class='hunk'>@@ -696,6 +729,7 @@</div><div class='ctx'> #define I82580_I_PHY_ID      0x015403A0</div><div class='ctx'> #define I350_I_PHY_ID        0x015403B0</div><div class='ctx'> #define M88_VENDOR           0x0141</div><div class='add'>+#define I210_I_PHY_ID        0x01410C00</div><div class='ctx'> </div><div class='ctx'> /* M88E1000 Specific Registers */</div><div class='ctx'> #define M88E1000_PHY_SPEC_CTRL     0x10  /* PHY Specific Control Register */</div><div class='hunk'>@@ -815,6 +849,7 @@</div><div class='ctx'> #define E1000_IPCNFG_EEE_100M_AN     0x00000004  /* EEE Enable 100M AN */</div><div class='ctx'> #define E1000_EEER_TX_LPI_EN         0x00010000  /* EEE Tx LPI Enable */</div><div class='ctx'> #define E1000_EEER_RX_LPI_EN         0x00020000  /* EEE Rx LPI Enable */</div><div class='add'>+#define E1000_EEER_FRC_AN            0x10000000 /* Enable EEE in loopback */</div><div class='ctx'> #define E1000_EEER_LPI_FC            0x00040000  /* EEE Enable on FC */</div><div class='ctx'> </div><div class='ctx'> /* SerDes Control */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_hw.h b/drivers/net/ethernet/intel/igb/e1000_hw.h<br/>index f67cbd3fa307..c2a51dcda550 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_hw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/e1000_hw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_hw.h</a></div><div class='hunk'>@@ -63,6 +63,13 @@ struct e1000_hw;</div><div class='ctx'> #define E1000_DEV_ID_I350_FIBER               0x1522</div><div class='ctx'> #define E1000_DEV_ID_I350_SERDES              0x1523</div><div class='ctx'> #define E1000_DEV_ID_I350_SGMII               0x1524</div><div class='add'>+#define E1000_DEV_ID_I210_COPPER		0x1533</div><div class='add'>+#define E1000_DEV_ID_I210_COPPER_OEM1		0x1534</div><div class='add'>+#define E1000_DEV_ID_I210_COPPER_IT		0x1535</div><div class='add'>+#define E1000_DEV_ID_I210_FIBER			0x1536</div><div class='add'>+#define E1000_DEV_ID_I210_SERDES		0x1537</div><div class='add'>+#define E1000_DEV_ID_I210_SGMII			0x1538</div><div class='add'>+#define E1000_DEV_ID_I211_COPPER		0x1539</div><div class='ctx'> </div><div class='ctx'> #define E1000_REVISION_2 2</div><div class='ctx'> #define E1000_REVISION_4 4</div><div class='hunk'>@@ -83,6 +90,8 @@ enum e1000_mac_type {</div><div class='ctx'> 	e1000_82576,</div><div class='ctx'> 	e1000_82580,</div><div class='ctx'> 	e1000_i350,</div><div class='add'>+	e1000_i210,</div><div class='add'>+	e1000_i211,</div><div class='ctx'> 	e1000_num_macs  /* List is 1-based, so subtract 1 for true count. */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -117,6 +126,7 @@ enum e1000_phy_type {</div><div class='ctx'> 	e1000_phy_igp_3,</div><div class='ctx'> 	e1000_phy_ife,</div><div class='ctx'> 	e1000_phy_82580,</div><div class='add'>+	e1000_phy_i210,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum e1000_bus_type {</div><div class='hunk'>@@ -313,6 +323,9 @@ struct e1000_mac_operations {</div><div class='ctx'> 	void (*rar_set)(struct e1000_hw *, u8 *, u32);</div><div class='ctx'> 	s32  (*read_mac_addr)(struct e1000_hw *);</div><div class='ctx'> 	s32  (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);</div><div class='add'>+	s32  (*acquire_swfw_sync)(struct e1000_hw *, u16);</div><div class='add'>+	void (*release_swfw_sync)(struct e1000_hw *, u16);</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct e1000_phy_operations {</div><div class='hunk'>@@ -338,6 +351,7 @@ struct e1000_nvm_operations {</div><div class='ctx'> 	s32  (*write)(struct e1000_hw *, u16, u16, u16 *);</div><div class='ctx'> 	s32  (*update)(struct e1000_hw *);</div><div class='ctx'> 	s32  (*validate)(struct e1000_hw *);</div><div class='add'>+	s32  (*valid_led_default)(struct e1000_hw *, u16 *);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct e1000_info {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_i210.c b/drivers/net/ethernet/intel/igb/e1000_i210.c<br/>new file mode 100644<br/>index 000000000000..77a5f939bc74<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_i210.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_i210.c</a></div><div class='hunk'>@@ -0,0 +1,603 @@</div><div class='add'>+/*******************************************************************************</div><div class='add'>+</div><div class='add'>+  Intel(R) Gigabit Ethernet Linux driver</div><div class='add'>+  Copyright(c) 2007-2012 Intel Corporation.</div><div class='add'>+</div><div class='add'>+  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+  under the terms and conditions of the GNU General Public License,</div><div class='add'>+  version 2, as published by the Free Software Foundation.</div><div class='add'>+</div><div class='add'>+  This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+  more details.</div><div class='add'>+</div><div class='add'>+  You should have received a copy of the GNU General Public License along with</div><div class='add'>+  this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+</div><div class='add'>+  The full GNU General Public License is included in this distribution in</div><div class='add'>+  the file called "COPYING".</div><div class='add'>+</div><div class='add'>+  Contact Information:</div><div class='add'>+  e1000-devel Mailing List &lt;e1000-devel@lists.sourceforge.net&gt;</div><div class='add'>+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497</div><div class='add'>+</div><div class='add'>+******************************************************************************/</div><div class='add'>+</div><div class='add'>+/* e1000_i210</div><div class='add'>+ * e1000_i211</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+</div><div class='add'>+#include "e1000_hw.h"</div><div class='add'>+#include "e1000_i210.h"</div><div class='add'>+</div><div class='add'>+static s32 igb_get_hw_semaphore_i210(struct e1000_hw *hw);</div><div class='add'>+static void igb_put_hw_semaphore_i210(struct e1000_hw *hw);</div><div class='add'>+static s32 igb_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,</div><div class='add'>+				u16 *data);</div><div class='add'>+static s32 igb_pool_flash_update_done_i210(struct e1000_hw *hw);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_acquire_nvm_i210 - Request for access to EEPROM</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Acquire the necessary semaphores for exclusive access to the EEPROM.</div><div class='add'>+ *  Set the EEPROM access request bit and wait for EEPROM access grant bit.</div><div class='add'>+ *  Return successful if access grant bit set, else clear the request for</div><div class='add'>+ *  EEPROM access and return -E1000_ERR_NVM (-1).</div><div class='add'>+ **/</div><div class='add'>+s32 igb_acquire_nvm_i210(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	return igb_acquire_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_release_nvm_i210 - Release exclusive access to EEPROM</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Stop any current commands to the EEPROM and clear the EEPROM request bit,</div><div class='add'>+ *  then release the semaphores acquired.</div><div class='add'>+ **/</div><div class='add'>+void igb_release_nvm_i210(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	igb_release_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_acquire_swfw_sync_i210 - Acquire SW/FW semaphore</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @mask: specifies which semaphore to acquire</div><div class='add'>+ *</div><div class='add'>+ *  Acquire the SW/FW semaphore to access the PHY or NVM.  The mask</div><div class='add'>+ *  will also specify which port we're acquiring the lock for.</div><div class='add'>+ **/</div><div class='add'>+s32 igb_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask)</div><div class='add'>+{</div><div class='add'>+	u32 swfw_sync;</div><div class='add'>+	u32 swmask = mask;</div><div class='add'>+	u32 fwmask = mask &lt;&lt; 16;</div><div class='add'>+	s32 ret_val = E1000_SUCCESS;</div><div class='add'>+	s32 i = 0, timeout = 200; /* FIXME: find real value to use here */</div><div class='add'>+</div><div class='add'>+	while (i &lt; timeout) {</div><div class='add'>+		if (igb_get_hw_semaphore_i210(hw)) {</div><div class='add'>+			ret_val = -E1000_ERR_SWFW_SYNC;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		swfw_sync = rd32(E1000_SW_FW_SYNC);</div><div class='add'>+		if (!(swfw_sync &amp; fwmask))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Firmware currently using resource (fwmask)</div><div class='add'>+		 */</div><div class='add'>+		igb_put_hw_semaphore_i210(hw);</div><div class='add'>+		mdelay(5);</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == timeout) {</div><div class='add'>+		hw_dbg("Driver can't access resource, SW_FW_SYNC timeout.\n");</div><div class='add'>+		ret_val = -E1000_ERR_SWFW_SYNC;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	swfw_sync |= swmask;</div><div class='add'>+	wr32(E1000_SW_FW_SYNC, swfw_sync);</div><div class='add'>+</div><div class='add'>+	igb_put_hw_semaphore_i210(hw);</div><div class='add'>+out:</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_release_swfw_sync_i210 - Release SW/FW semaphore</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @mask: specifies which semaphore to acquire</div><div class='add'>+ *</div><div class='add'>+ *  Release the SW/FW semaphore used to access the PHY or NVM.  The mask</div><div class='add'>+ *  will also specify which port we're releasing the lock for.</div><div class='add'>+ **/</div><div class='add'>+void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)</div><div class='add'>+{</div><div class='add'>+	u32 swfw_sync;</div><div class='add'>+</div><div class='add'>+	while (igb_get_hw_semaphore_i210(hw) != E1000_SUCCESS)</div><div class='add'>+		; /* Empty */</div><div class='add'>+</div><div class='add'>+	swfw_sync = rd32(E1000_SW_FW_SYNC);</div><div class='add'>+	swfw_sync &amp;= ~mask;</div><div class='add'>+	wr32(E1000_SW_FW_SYNC, swfw_sync);</div><div class='add'>+</div><div class='add'>+	igb_put_hw_semaphore_i210(hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_get_hw_semaphore_i210 - Acquire hardware semaphore</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Acquire the HW semaphore to access the PHY or NVM</div><div class='add'>+ **/</div><div class='add'>+static s32 igb_get_hw_semaphore_i210(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 swsm;</div><div class='add'>+	s32 ret_val = E1000_SUCCESS;</div><div class='add'>+	s32 timeout = hw-&gt;nvm.word_size + 1;</div><div class='add'>+	s32 i = 0;</div><div class='add'>+</div><div class='add'>+	/* Get the FW semaphore. */</div><div class='add'>+	for (i = 0; i &lt; timeout; i++) {</div><div class='add'>+		swsm = rd32(E1000_SWSM);</div><div class='add'>+		wr32(E1000_SWSM, swsm | E1000_SWSM_SWESMBI);</div><div class='add'>+</div><div class='add'>+		/* Semaphore acquired if bit latched */</div><div class='add'>+		if (rd32(E1000_SWSM) &amp; E1000_SWSM_SWESMBI)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		udelay(50);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == timeout) {</div><div class='add'>+		/* Release semaphores */</div><div class='add'>+		igb_put_hw_semaphore(hw);</div><div class='add'>+		hw_dbg("Driver can't access the NVM\n");</div><div class='add'>+		ret_val = -E1000_ERR_NVM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_put_hw_semaphore_i210 - Release hardware semaphore</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Release hardware semaphore used to access the PHY or NVM</div><div class='add'>+ **/</div><div class='add'>+static void igb_put_hw_semaphore_i210(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 swsm;</div><div class='add'>+</div><div class='add'>+	swsm = rd32(E1000_SWSM);</div><div class='add'>+</div><div class='add'>+	swsm &amp;= ~E1000_SWSM_SWESMBI;</div><div class='add'>+</div><div class='add'>+	wr32(E1000_SWSM, swsm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_read_nvm_srrd_i210 - Reads Shadow Ram using EERD register</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @offset: offset of word in the Shadow Ram to read</div><div class='add'>+ *  @words: number of words to read</div><div class='add'>+ *  @data: word read from the Shadow Ram</div><div class='add'>+ *</div><div class='add'>+ *  Reads a 16 bit word from the Shadow Ram using the EERD register.</div><div class='add'>+ *  Uses necessary synchronization semaphores.</div><div class='add'>+ **/</div><div class='add'>+s32 igb_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words,</div><div class='add'>+			     u16 *data)</div><div class='add'>+{</div><div class='add'>+	s32 status = E1000_SUCCESS;</div><div class='add'>+	u16 i, count;</div><div class='add'>+</div><div class='add'>+	/* We cannot hold synchronization semaphores for too long,</div><div class='add'>+	 * because of forceful takeover procedure. However it is more efficient</div><div class='add'>+	 * to read in bursts than synchronizing access for each word. */</div><div class='add'>+	for (i = 0; i &lt; words; i += E1000_EERD_EEWR_MAX_COUNT) {</div><div class='add'>+		count = (words - i) / E1000_EERD_EEWR_MAX_COUNT &gt; 0 ?</div><div class='add'>+			E1000_EERD_EEWR_MAX_COUNT : (words - i);</div><div class='add'>+		if (hw-&gt;nvm.ops.acquire(hw) == E1000_SUCCESS) {</div><div class='add'>+			status = igb_read_nvm_eerd(hw, offset, count,</div><div class='add'>+						     data + i);</div><div class='add'>+			hw-&gt;nvm.ops.release(hw);</div><div class='add'>+		} else {</div><div class='add'>+			status = E1000_ERR_SWFW_SYNC;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (status != E1000_SUCCESS)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_write_nvm_srwr_i210 - Write to Shadow RAM using EEWR</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @offset: offset within the Shadow RAM to be written to</div><div class='add'>+ *  @words: number of words to write</div><div class='add'>+ *  @data: 16 bit word(s) to be written to the Shadow RAM</div><div class='add'>+ *</div><div class='add'>+ *  Writes data to Shadow RAM at offset using EEWR register.</div><div class='add'>+ *</div><div class='add'>+ *  If e1000_update_nvm_checksum is not called after this function , the</div><div class='add'>+ *  data will not be committed to FLASH and also Shadow RAM will most likely</div><div class='add'>+ *  contain an invalid checksum.</div><div class='add'>+ *</div><div class='add'>+ *  If error code is returned, data and Shadow RAM may be inconsistent - buffer</div><div class='add'>+ *  partially written.</div><div class='add'>+ **/</div><div class='add'>+s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words,</div><div class='add'>+			      u16 *data)</div><div class='add'>+{</div><div class='add'>+	s32 status = E1000_SUCCESS;</div><div class='add'>+	u16 i, count;</div><div class='add'>+</div><div class='add'>+	/* We cannot hold synchronization semaphores for too long,</div><div class='add'>+	 * because of forceful takeover procedure. However it is more efficient</div><div class='add'>+	 * to write in bursts than synchronizing access for each word. */</div><div class='add'>+	for (i = 0; i &lt; words; i += E1000_EERD_EEWR_MAX_COUNT) {</div><div class='add'>+		count = (words - i) / E1000_EERD_EEWR_MAX_COUNT &gt; 0 ?</div><div class='add'>+			E1000_EERD_EEWR_MAX_COUNT : (words - i);</div><div class='add'>+		if (hw-&gt;nvm.ops.acquire(hw) == E1000_SUCCESS) {</div><div class='add'>+			status = igb_write_nvm_srwr(hw, offset, count,</div><div class='add'>+						      data + i);</div><div class='add'>+			hw-&gt;nvm.ops.release(hw);</div><div class='add'>+		} else {</div><div class='add'>+			status = E1000_ERR_SWFW_SYNC;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (status != E1000_SUCCESS)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_write_nvm_srwr - Write to Shadow Ram using EEWR</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @offset: offset within the Shadow Ram to be written to</div><div class='add'>+ *  @words: number of words to write</div><div class='add'>+ *  @data: 16 bit word(s) to be written to the Shadow Ram</div><div class='add'>+ *</div><div class='add'>+ *  Writes data to Shadow Ram at offset using EEWR register.</div><div class='add'>+ *</div><div class='add'>+ *  If igb_update_nvm_checksum is not called after this function , the</div><div class='add'>+ *  Shadow Ram will most likely contain an invalid checksum.</div><div class='add'>+ **/</div><div class='add'>+static s32 igb_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,</div><div class='add'>+				u16 *data)</div><div class='add'>+{</div><div class='add'>+	struct e1000_nvm_info *nvm = &amp;hw-&gt;nvm;</div><div class='add'>+	u32 i, k, eewr = 0;</div><div class='add'>+	u32 attempts = 100000;</div><div class='add'>+	s32 ret_val = E1000_SUCCESS;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * A check for invalid values:  offset too large, too many words,</div><div class='add'>+	 * too many words for the offset, and not enough words.</div><div class='add'>+	 */</div><div class='add'>+	if ((offset &gt;= nvm-&gt;word_size) || (words &gt; (nvm-&gt;word_size - offset)) ||</div><div class='add'>+	    (words == 0)) {</div><div class='add'>+		hw_dbg("nvm parameter(s) out of bounds\n");</div><div class='add'>+		ret_val = -E1000_ERR_NVM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; words; i++) {</div><div class='add'>+		eewr = ((offset+i) &lt;&lt; E1000_NVM_RW_ADDR_SHIFT) |</div><div class='add'>+			(data[i] &lt;&lt; E1000_NVM_RW_REG_DATA) |</div><div class='add'>+			E1000_NVM_RW_REG_START;</div><div class='add'>+</div><div class='add'>+		wr32(E1000_SRWR, eewr);</div><div class='add'>+</div><div class='add'>+		for (k = 0; k &lt; attempts; k++) {</div><div class='add'>+			if (E1000_NVM_RW_REG_DONE &amp;</div><div class='add'>+			    rd32(E1000_SRWR)) {</div><div class='add'>+				ret_val = E1000_SUCCESS;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			udelay(5);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+		if (ret_val != E1000_SUCCESS) {</div><div class='add'>+			hw_dbg("Shadow RAM write EEWR timed out\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_read_nvm_i211 - Read NVM wrapper function for I211</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @address: the word address (aka eeprom offset) to read</div><div class='add'>+ *  @data: pointer to the data read</div><div class='add'>+ *</div><div class='add'>+ *  Wrapper function to return data formerly found in the NVM.</div><div class='add'>+ **/</div><div class='add'>+s32 igb_read_nvm_i211(struct e1000_hw *hw, u16 offset, u16 words,</div><div class='add'>+			       u16 *data)</div><div class='add'>+{</div><div class='add'>+	s32 ret_val = E1000_SUCCESS;</div><div class='add'>+</div><div class='add'>+	/* Only the MAC addr is required to be present in the iNVM */</div><div class='add'>+	switch (offset) {</div><div class='add'>+	case NVM_MAC_ADDR:</div><div class='add'>+		ret_val = igb_read_invm_i211(hw, offset, &amp;data[0]);</div><div class='add'>+		ret_val |= igb_read_invm_i211(hw, offset+1, &amp;data[1]);</div><div class='add'>+		ret_val |= igb_read_invm_i211(hw, offset+2, &amp;data[2]);</div><div class='add'>+		if (ret_val != E1000_SUCCESS)</div><div class='add'>+			hw_dbg("MAC Addr not found in iNVM\n");</div><div class='add'>+		break;</div><div class='add'>+	case NVM_ID_LED_SETTINGS:</div><div class='add'>+	case NVM_INIT_CTRL_2:</div><div class='add'>+	case NVM_INIT_CTRL_4:</div><div class='add'>+	case NVM_LED_1_CFG:</div><div class='add'>+	case NVM_LED_0_2_CFG:</div><div class='add'>+		igb_read_invm_i211(hw, offset, data);</div><div class='add'>+		break;</div><div class='add'>+	case NVM_COMPAT:</div><div class='add'>+		*data = ID_LED_DEFAULT_I210;</div><div class='add'>+		break;</div><div class='add'>+	case NVM_SUB_DEV_ID:</div><div class='add'>+		*data = hw-&gt;subsystem_device_id;</div><div class='add'>+		break;</div><div class='add'>+	case NVM_SUB_VEN_ID:</div><div class='add'>+		*data = hw-&gt;subsystem_vendor_id;</div><div class='add'>+		break;</div><div class='add'>+	case NVM_DEV_ID:</div><div class='add'>+		*data = hw-&gt;device_id;</div><div class='add'>+		break;</div><div class='add'>+	case NVM_VEN_ID:</div><div class='add'>+		*data = hw-&gt;vendor_id;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		hw_dbg("NVM word 0x%02x is not mapped.\n", offset);</div><div class='add'>+		*data = NVM_RESERVED_WORD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_read_invm_i211 - Reads OTP</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @address: the word address (aka eeprom offset) to read</div><div class='add'>+ *  @data: pointer to the data read</div><div class='add'>+ *</div><div class='add'>+ *  Reads 16-bit words from the OTP. Return error when the word is not</div><div class='add'>+ *  stored in OTP.</div><div class='add'>+ **/</div><div class='add'>+s32 igb_read_invm_i211(struct e1000_hw *hw, u16 address, u16 *data)</div><div class='add'>+{</div><div class='add'>+	s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;</div><div class='add'>+	u32 invm_dword;</div><div class='add'>+	u16 i;</div><div class='add'>+	u8 record_type, word_address;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; E1000_INVM_SIZE; i++) {</div><div class='add'>+		invm_dword = rd32(E1000_INVM_DATA_REG(i));</div><div class='add'>+		/* Get record type */</div><div class='add'>+		record_type = INVM_DWORD_TO_RECORD_TYPE(invm_dword);</div><div class='add'>+		if (record_type == E1000_INVM_UNINITIALIZED_STRUCTURE)</div><div class='add'>+			break;</div><div class='add'>+		if (record_type == E1000_INVM_CSR_AUTOLOAD_STRUCTURE)</div><div class='add'>+			i += E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS;</div><div class='add'>+		if (record_type == E1000_INVM_RSA_KEY_SHA256_STRUCTURE)</div><div class='add'>+			i += E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS;</div><div class='add'>+		if (record_type == E1000_INVM_WORD_AUTOLOAD_STRUCTURE) {</div><div class='add'>+			word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword);</div><div class='add'>+			if (word_address == (u8)address) {</div><div class='add'>+				*data = INVM_DWORD_TO_WORD_DATA(invm_dword);</div><div class='add'>+				hw_dbg("Read INVM Word 0x%02x = %x",</div><div class='add'>+					  address, *data);</div><div class='add'>+				status = E1000_SUCCESS;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (status != E1000_SUCCESS)</div><div class='add'>+		hw_dbg("Requested word 0x%02x not found in OTP\n", address);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_validate_nvm_checksum_i210 - Validate EEPROM checksum</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Calculates the EEPROM checksum by reading/adding each word of the EEPROM</div><div class='add'>+ *  and then verifies that the sum of the EEPROM is equal to 0xBABA.</div><div class='add'>+ **/</div><div class='add'>+s32 igb_validate_nvm_checksum_i210(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	s32 status = E1000_SUCCESS;</div><div class='add'>+	s32 (*read_op_ptr)(struct e1000_hw *, u16, u16, u16 *);</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;nvm.ops.acquire(hw) == E1000_SUCCESS) {</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Replace the read function with semaphore grabbing with</div><div class='add'>+		 * the one that skips this for a while.</div><div class='add'>+		 * We have semaphore taken already here.</div><div class='add'>+		 */</div><div class='add'>+		read_op_ptr = hw-&gt;nvm.ops.read;</div><div class='add'>+		hw-&gt;nvm.ops.read = igb_read_nvm_eerd;</div><div class='add'>+</div><div class='add'>+		status = igb_validate_nvm_checksum(hw);</div><div class='add'>+</div><div class='add'>+		/* Revert original read operation. */</div><div class='add'>+		hw-&gt;nvm.ops.read = read_op_ptr;</div><div class='add'>+</div><div class='add'>+		hw-&gt;nvm.ops.release(hw);</div><div class='add'>+	} else {</div><div class='add'>+		status = E1000_ERR_SWFW_SYNC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_update_nvm_checksum_i210 - Update EEPROM checksum</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Updates the EEPROM checksum by reading/adding each word of the EEPROM</div><div class='add'>+ *  up to the checksum.  Then calculates the EEPROM checksum and writes the</div><div class='add'>+ *  value to the EEPROM. Next commit EEPROM data onto the Flash.</div><div class='add'>+ **/</div><div class='add'>+s32 igb_update_nvm_checksum_i210(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	s32 ret_val = E1000_SUCCESS;</div><div class='add'>+	u16 checksum = 0;</div><div class='add'>+	u16 i, nvm_data;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Read the first word from the EEPROM. If this times out or fails, do</div><div class='add'>+	 * not continue or we could be in for a very long wait while every</div><div class='add'>+	 * EEPROM read fails</div><div class='add'>+	 */</div><div class='add'>+	ret_val = igb_read_nvm_eerd(hw, 0, 1, &amp;nvm_data);</div><div class='add'>+	if (ret_val != E1000_SUCCESS) {</div><div class='add'>+		hw_dbg("EEPROM read failed\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;nvm.ops.acquire(hw) == E1000_SUCCESS) {</div><div class='add'>+		/*</div><div class='add'>+		 * Do not use hw-&gt;nvm.ops.write, hw-&gt;nvm.ops.read</div><div class='add'>+		 * because we do not want to take the synchronization</div><div class='add'>+		 * semaphores twice here.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; NVM_CHECKSUM_REG; i++) {</div><div class='add'>+			ret_val = igb_read_nvm_eerd(hw, i, 1, &amp;nvm_data);</div><div class='add'>+			if (ret_val) {</div><div class='add'>+				hw-&gt;nvm.ops.release(hw);</div><div class='add'>+				hw_dbg("NVM Read Error while updating checksum.\n");</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			checksum += nvm_data;</div><div class='add'>+		}</div><div class='add'>+		checksum = (u16) NVM_SUM - checksum;</div><div class='add'>+		ret_val = igb_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1,</div><div class='add'>+						&amp;checksum);</div><div class='add'>+		if (ret_val != E1000_SUCCESS) {</div><div class='add'>+			hw-&gt;nvm.ops.release(hw);</div><div class='add'>+			hw_dbg("NVM Write Error while updating checksum.\n");</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hw-&gt;nvm.ops.release(hw);</div><div class='add'>+</div><div class='add'>+		ret_val = igb_update_flash_i210(hw);</div><div class='add'>+	} else {</div><div class='add'>+		ret_val = -E1000_ERR_SWFW_SYNC;</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_update_flash_i210 - Commit EEPROM to the flash</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ **/</div><div class='add'>+s32 igb_update_flash_i210(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	s32 ret_val = E1000_SUCCESS;</div><div class='add'>+	u32 flup;</div><div class='add'>+</div><div class='add'>+	ret_val = igb_pool_flash_update_done_i210(hw);</div><div class='add'>+	if (ret_val == -E1000_ERR_NVM) {</div><div class='add'>+		hw_dbg("Flash update time out\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flup = rd32(E1000_EECD) | E1000_EECD_FLUPD_I210;</div><div class='add'>+	wr32(E1000_EECD, flup);</div><div class='add'>+</div><div class='add'>+	ret_val = igb_pool_flash_update_done_i210(hw);</div><div class='add'>+	if (ret_val == E1000_SUCCESS)</div><div class='add'>+		hw_dbg("Flash update complete\n");</div><div class='add'>+	else</div><div class='add'>+		hw_dbg("Flash update time out\n");</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_pool_flash_update_done_i210 - Pool FLUDONE status.</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ **/</div><div class='add'>+s32 igb_pool_flash_update_done_i210(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	s32 ret_val = -E1000_ERR_NVM;</div><div class='add'>+	u32 i, reg;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; E1000_FLUDONE_ATTEMPTS; i++) {</div><div class='add'>+		reg = rd32(E1000_EECD);</div><div class='add'>+		if (reg &amp; E1000_EECD_FLUDONE_I210) {</div><div class='add'>+			ret_val = E1000_SUCCESS;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		udelay(5);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_valid_led_default_i210 - Verify a valid default LED config</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @data: pointer to the NVM (EEPROM)</div><div class='add'>+ *</div><div class='add'>+ *  Read the EEPROM for the current default LED configuration.  If the</div><div class='add'>+ *  LED configuration is not valid, set to a valid LED configuration.</div><div class='add'>+ **/</div><div class='add'>+s32 igb_valid_led_default_i210(struct e1000_hw *hw, u16 *data)</div><div class='add'>+{</div><div class='add'>+	s32 ret_val;</div><div class='add'>+</div><div class='add'>+	ret_val = hw-&gt;nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);</div><div class='add'>+	if (ret_val) {</div><div class='add'>+		hw_dbg("NVM Read Error\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF) {</div><div class='add'>+		switch (hw-&gt;phy.media_type) {</div><div class='add'>+		case e1000_media_type_internal_serdes:</div><div class='add'>+			*data = ID_LED_DEFAULT_I210_SERDES;</div><div class='add'>+			break;</div><div class='add'>+		case e1000_media_type_copper:</div><div class='add'>+		default:</div><div class='add'>+			*data = ID_LED_DEFAULT_I210;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_i210.h b/drivers/net/ethernet/intel/igb/e1000_i210.h<br/>new file mode 100644<br/>index 000000000000..5dc2bd3f50bc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_i210.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_i210.h</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+/*******************************************************************************</div><div class='add'>+</div><div class='add'>+  Intel(R) Gigabit Ethernet Linux driver</div><div class='add'>+  Copyright(c) 2007-2012 Intel Corporation.</div><div class='add'>+</div><div class='add'>+  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+  under the terms and conditions of the GNU General Public License,</div><div class='add'>+  version 2, as published by the Free Software Foundation.</div><div class='add'>+</div><div class='add'>+  This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+  more details.</div><div class='add'>+</div><div class='add'>+  You should have received a copy of the GNU General Public License along with</div><div class='add'>+  this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+</div><div class='add'>+  The full GNU General Public License is included in this distribution in</div><div class='add'>+  the file called "COPYING".</div><div class='add'>+</div><div class='add'>+  Contact Information:</div><div class='add'>+  e1000-devel Mailing List &lt;e1000-devel@lists.sourceforge.net&gt;</div><div class='add'>+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497</div><div class='add'>+</div><div class='add'>+*******************************************************************************/</div><div class='add'>+</div><div class='add'>+#ifndef _E1000_I210_H_</div><div class='add'>+#define _E1000_I210_H_</div><div class='add'>+</div><div class='add'>+extern s32 igb_update_flash_i210(struct e1000_hw *hw);</div><div class='add'>+extern s32 igb_update_nvm_checksum_i210(struct e1000_hw *hw);</div><div class='add'>+extern s32 igb_validate_nvm_checksum_i210(struct e1000_hw *hw);</div><div class='add'>+extern s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset,</div><div class='add'>+			      u16 words, u16 *data);</div><div class='add'>+extern s32 igb_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset,</div><div class='add'>+			     u16 words, u16 *data);</div><div class='add'>+extern s32 igb_read_invm_i211(struct e1000_hw *hw, u16 address, u16 *data);</div><div class='add'>+extern s32 igb_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);</div><div class='add'>+extern void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);</div><div class='add'>+extern s32 igb_acquire_nvm_i210(struct e1000_hw *hw);</div><div class='add'>+extern void igb_release_nvm_i210(struct e1000_hw *hw);</div><div class='add'>+extern s32 igb_valid_led_default_i210(struct e1000_hw *hw, u16 *data);</div><div class='add'>+extern s32 igb_read_nvm_i211(struct e1000_hw *hw, u16 offset, u16 words,</div><div class='add'>+			       u16 *data);</div><div class='add'>+</div><div class='add'>+#define E1000_STM_OPCODE		0xDB00</div><div class='add'>+#define E1000_EEPROM_FLASH_SIZE_WORD	0x11</div><div class='add'>+</div><div class='add'>+#define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \</div><div class='add'>+	(u8)((invm_dword) &amp; 0x7)</div><div class='add'>+#define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \</div><div class='add'>+	(u8)(((invm_dword) &amp; 0x0000FE00) &gt;&gt; 9)</div><div class='add'>+#define INVM_DWORD_TO_WORD_DATA(invm_dword) \</div><div class='add'>+	(u16)(((invm_dword) &amp; 0xFFFF0000) &gt;&gt; 16)</div><div class='add'>+</div><div class='add'>+enum E1000_INVM_STRUCTURE_TYPE {</div><div class='add'>+	E1000_INVM_UNINITIALIZED_STRUCTURE		= 0x00,</div><div class='add'>+	E1000_INVM_WORD_AUTOLOAD_STRUCTURE		= 0x01,</div><div class='add'>+	E1000_INVM_CSR_AUTOLOAD_STRUCTURE		= 0x02,</div><div class='add'>+	E1000_INVM_PHY_REGISTER_AUTOLOAD_STRUCTURE	= 0x03,</div><div class='add'>+	E1000_INVM_RSA_KEY_SHA256_STRUCTURE		= 0x04,</div><div class='add'>+	E1000_INVM_INVALIDATED_STRUCTURE		= 0x0F,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS	8</div><div class='add'>+#define E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS	1</div><div class='add'>+</div><div class='add'>+#define ID_LED_DEFAULT_I210		((ID_LED_OFF1_ON2  &lt;&lt; 8) | \</div><div class='add'>+					 (ID_LED_OFF1_OFF2 &lt;&lt;  4) | \</div><div class='add'>+					 (ID_LED_DEF1_DEF2))</div><div class='add'>+#define ID_LED_DEFAULT_I210_SERDES	((ID_LED_DEF1_DEF2 &lt;&lt; 8) | \</div><div class='add'>+					 (ID_LED_DEF1_DEF2 &lt;&lt;  4) | \</div><div class='add'>+					 (ID_LED_DEF1_DEF2))</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_mac.c b/drivers/net/ethernet/intel/igb/e1000_mac.c<br/>index f57338afd71f..819c145ac762 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_mac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/e1000_mac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_mac.c</a></div><div class='hunk'>@@ -658,6 +658,7 @@ s32 igb_setup_link(struct e1000_hw *hw)</div><div class='ctx'> 	ret_val = igb_set_fc_watermarks(hw);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='add'>+</div><div class='ctx'> 	return ret_val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_nvm.c b/drivers/net/ethernet/intel/igb/e1000_nvm.c<br/>index fa2c6ba62139..aa5fcdf3f357 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_nvm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/e1000_nvm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_nvm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_nvm.c</a></div><div class='hunk'>@@ -710,4 +710,3 @@ s32 igb_update_nvm_checksum(struct e1000_hw *hw)</div><div class='ctx'> out:</div><div class='ctx'> 	return ret_val;</div><div class='ctx'> }</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c<br/>index 789de5b83aad..7be98b6f1052 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/e1000_phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_phy.c</a></div><div class='hunk'>@@ -35,6 +35,7 @@ static s32  igb_phy_setup_autoneg(struct e1000_hw *hw);</div><div class='ctx'> static void igb_phy_force_speed_duplex_setup(struct e1000_hw *hw,</div><div class='ctx'> 					       u16 *phy_ctrl);</div><div class='ctx'> static s32  igb_wait_autoneg(struct e1000_hw *hw);</div><div class='add'>+static s32  igb_set_master_slave_mode(struct e1000_hw *hw);</div><div class='ctx'> </div><div class='ctx'> /* Cable length tables */</div><div class='ctx'> static const u16 e1000_m88_cable_length_table[] =</div><div class='hunk'>@@ -570,6 +571,11 @@ s32 igb_copper_link_setup_m88(struct e1000_hw *hw)</div><div class='ctx'> 		hw_dbg("Error committing the PHY changes\n");</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='add'>+	if (phy-&gt;type == e1000_phy_i210) {</div><div class='add'>+		ret_val = igb_set_master_slave_mode(hw);</div><div class='add'>+		if (ret_val)</div><div class='add'>+			return ret_val;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return ret_val;</div><div class='hunk'>@@ -1213,12 +1219,22 @@ s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='ctx'> 		if (!link) {</div><div class='del'>-			if (hw-&gt;phy.type != e1000_phy_m88 ||</div><div class='del'>-			    hw-&gt;phy.id == I347AT4_E_PHY_ID ||</div><div class='del'>-			    hw-&gt;phy.id == M88E1112_E_PHY_ID) {</div><div class='add'>+			bool reset_dsp = true;</div><div class='add'>+</div><div class='add'>+			switch (hw-&gt;phy.id) {</div><div class='add'>+			case I347AT4_E_PHY_ID:</div><div class='add'>+			case M88E1112_E_PHY_ID:</div><div class='add'>+			case I210_I_PHY_ID:</div><div class='add'>+				reset_dsp = false;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				if (hw-&gt;phy.type != e1000_phy_m88)</div><div class='add'>+					reset_dsp = false;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			if (!reset_dsp)</div><div class='ctx'> 				hw_dbg("Link taking longer than expected.\n");</div><div class='del'>-			} else {</div><div class='del'>-</div><div class='add'>+			else {</div><div class='ctx'> 				/*</div><div class='ctx'> 				 * We didn't get link.</div><div class='ctx'> 				 * Reset the DSP and cross our fingers.</div><div class='hunk'>@@ -1243,7 +1259,8 @@ s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	if (hw-&gt;phy.type != e1000_phy_m88 ||</div><div class='ctx'> 	    hw-&gt;phy.id == I347AT4_E_PHY_ID ||</div><div class='del'>-	    hw-&gt;phy.id == M88E1112_E_PHY_ID)</div><div class='add'>+	    hw-&gt;phy.id == M88E1112_E_PHY_ID ||</div><div class='add'>+	    hw-&gt;phy.id == I210_I_PHY_ID)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ret_val = phy-&gt;ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &amp;phy_data);</div><div class='hunk'>@@ -1441,6 +1458,7 @@ s32 igb_check_downshift(struct e1000_hw *hw)</div><div class='ctx'> 	u16 phy_data, offset, mask;</div><div class='ctx'> </div><div class='ctx'> 	switch (phy-&gt;type) {</div><div class='add'>+	case e1000_phy_i210:</div><div class='ctx'> 	case e1000_phy_m88:</div><div class='ctx'> 	case e1000_phy_gg82563:</div><div class='ctx'> 		offset	= M88E1000_PHY_SPEC_STATUS;</div><div class='hunk'>@@ -1476,7 +1494,7 @@ out:</div><div class='ctx'>  *</div><div class='ctx'>  *  Polarity is determined based on the PHY specific status register.</div><div class='ctx'>  **/</div><div class='del'>-static s32 igb_check_polarity_m88(struct e1000_hw *hw)</div><div class='add'>+s32 igb_check_polarity_m88(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_phy_info *phy = &amp;hw-&gt;phy;</div><div class='ctx'> 	s32 ret_val;</div><div class='hunk'>@@ -1665,6 +1683,7 @@ s32 igb_get_cable_length_m88_gen2(struct e1000_hw *hw)</div><div class='ctx'> 	u16 phy_data, phy_data2, index, default_page, is_cm;</div><div class='ctx'> </div><div class='ctx'> 	switch (hw-&gt;phy.id) {</div><div class='add'>+	case I210_I_PHY_ID:</div><div class='ctx'> 	case I347AT4_E_PHY_ID:</div><div class='ctx'> 		/* Remember the original page select and set it to 7 */</div><div class='ctx'> 		ret_val = phy-&gt;ops.read_reg(hw, I347AT4_PAGE_SELECT,</div><div class='hunk'>@@ -2129,10 +2148,16 @@ s32 igb_phy_init_script_igp3(struct e1000_hw *hw)</div><div class='ctx'> void igb_power_up_phy_copper(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	u16 mii_reg = 0;</div><div class='add'>+	u16 power_reg = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* The PHY will retain its settings across a power down/up cycle */</div><div class='ctx'> 	hw-&gt;phy.ops.read_reg(hw, PHY_CONTROL, &amp;mii_reg);</div><div class='ctx'> 	mii_reg &amp;= ~MII_CR_POWER_DOWN;</div><div class='add'>+	if (hw-&gt;phy.type == e1000_phy_i210) {</div><div class='add'>+		hw-&gt;phy.ops.read_reg(hw, GS40G_COPPER_SPEC, &amp;power_reg);</div><div class='add'>+		power_reg &amp;= ~GS40G_CS_POWER_DOWN;</div><div class='add'>+		hw-&gt;phy.ops.write_reg(hw, GS40G_COPPER_SPEC, power_reg);</div><div class='add'>+	}</div><div class='ctx'> 	hw-&gt;phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2146,10 +2171,18 @@ void igb_power_up_phy_copper(struct e1000_hw *hw)</div><div class='ctx'> void igb_power_down_phy_copper(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	u16 mii_reg = 0;</div><div class='add'>+	u16 power_reg = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* The PHY will retain its settings across a power down/up cycle */</div><div class='ctx'> 	hw-&gt;phy.ops.read_reg(hw, PHY_CONTROL, &amp;mii_reg);</div><div class='ctx'> 	mii_reg |= MII_CR_POWER_DOWN;</div><div class='add'>+</div><div class='add'>+	/* i210 Phy requires an additional bit for power up/down */</div><div class='add'>+	if (hw-&gt;phy.type == e1000_phy_i210) {</div><div class='add'>+		hw-&gt;phy.ops.read_reg(hw, GS40G_COPPER_SPEC, &amp;power_reg);</div><div class='add'>+		power_reg |= GS40G_CS_POWER_DOWN;</div><div class='add'>+		hw-&gt;phy.ops.write_reg(hw, GS40G_COPPER_SPEC, power_reg);</div><div class='add'>+	}</div><div class='ctx'> 	hw-&gt;phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);</div><div class='ctx'> 	msleep(1);</div><div class='ctx'> }</div><div class='hunk'>@@ -2345,3 +2378,103 @@ s32 igb_get_cable_length_82580(struct e1000_hw *hw)</div><div class='ctx'> out:</div><div class='ctx'> 	return ret_val;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_write_phy_reg_gs40g - Write GS40G PHY register</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @offset: lower half is register offset to write to</div><div class='add'>+ *     upper half is page to use.</div><div class='add'>+ *  @data: data to write at register offset</div><div class='add'>+ *</div><div class='add'>+ *  Acquires semaphore, if necessary, then writes the data to PHY register</div><div class='add'>+ *  at the offset.  Release any acquired semaphores before exiting.</div><div class='add'>+ **/</div><div class='add'>+s32 igb_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data)</div><div class='add'>+{</div><div class='add'>+	s32 ret_val;</div><div class='add'>+	u16 page = offset &gt;&gt; GS40G_PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+	offset = offset &amp; GS40G_OFFSET_MASK;</div><div class='add'>+	ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		return ret_val;</div><div class='add'>+</div><div class='add'>+	ret_val = igb_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, page);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		goto release;</div><div class='add'>+	ret_val = igb_write_phy_reg_mdic(hw, offset, data);</div><div class='add'>+</div><div class='add'>+release:</div><div class='add'>+	hw-&gt;phy.ops.release(hw);</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_read_phy_reg_gs40g - Read GS40G  PHY register</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *  @offset: lower half is register offset to read to</div><div class='add'>+ *     upper half is page to use.</div><div class='add'>+ *  @data: data to read at register offset</div><div class='add'>+ *</div><div class='add'>+ *  Acquires semaphore, if necessary, then reads the data in the PHY register</div><div class='add'>+ *  at the offset.  Release any acquired semaphores before exiting.</div><div class='add'>+ **/</div><div class='add'>+s32 igb_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data)</div><div class='add'>+{</div><div class='add'>+	s32 ret_val;</div><div class='add'>+	u16 page = offset &gt;&gt; GS40G_PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+	offset = offset &amp; GS40G_OFFSET_MASK;</div><div class='add'>+	ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		return ret_val;</div><div class='add'>+</div><div class='add'>+	ret_val = igb_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, page);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		goto release;</div><div class='add'>+	ret_val = igb_read_phy_reg_mdic(hw, offset, data);</div><div class='add'>+</div><div class='add'>+release:</div><div class='add'>+	hw-&gt;phy.ops.release(hw);</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  igb_set_master_slave_mode - Setup PHY for Master/slave mode</div><div class='add'>+ *  @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Sets up Master/slave mode</div><div class='add'>+ **/</div><div class='add'>+static s32 igb_set_master_slave_mode(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	s32 ret_val;</div><div class='add'>+	u16 phy_data;</div><div class='add'>+</div><div class='add'>+	/* Resolve Master/Slave mode */</div><div class='add'>+	ret_val = hw-&gt;phy.ops.read_reg(hw, PHY_1000T_CTRL, &amp;phy_data);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		return ret_val;</div><div class='add'>+</div><div class='add'>+	/* load defaults for future use */</div><div class='add'>+	hw-&gt;phy.original_ms_type = (phy_data &amp; CR_1000T_MS_ENABLE) ?</div><div class='add'>+				   ((phy_data &amp; CR_1000T_MS_VALUE) ?</div><div class='add'>+				    e1000_ms_force_master :</div><div class='add'>+				    e1000_ms_force_slave) : e1000_ms_auto;</div><div class='add'>+</div><div class='add'>+	switch (hw-&gt;phy.ms_type) {</div><div class='add'>+	case e1000_ms_force_master:</div><div class='add'>+		phy_data |= (CR_1000T_MS_ENABLE | CR_1000T_MS_VALUE);</div><div class='add'>+		break;</div><div class='add'>+	case e1000_ms_force_slave:</div><div class='add'>+		phy_data |= CR_1000T_MS_ENABLE;</div><div class='add'>+		phy_data &amp;= ~(CR_1000T_MS_VALUE);</div><div class='add'>+		break;</div><div class='add'>+	case e1000_ms_auto:</div><div class='add'>+		phy_data &amp;= ~CR_1000T_MS_ENABLE;</div><div class='add'>+		/* fall-through */</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return hw-&gt;phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/intel/igb/e1000_phy.h<br/>index 4c32ac66ff39..34e40619f16b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_phy.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/e1000_phy.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_phy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_phy.h</a></div><div class='hunk'>@@ -73,6 +73,9 @@ s32  igb_copper_link_setup_82580(struct e1000_hw *hw);</div><div class='ctx'> s32  igb_get_phy_info_82580(struct e1000_hw *hw);</div><div class='ctx'> s32  igb_phy_force_speed_duplex_82580(struct e1000_hw *hw);</div><div class='ctx'> s32  igb_get_cable_length_82580(struct e1000_hw *hw);</div><div class='add'>+s32  igb_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data);</div><div class='add'>+s32  igb_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data);</div><div class='add'>+s32  igb_check_polarity_m88(struct e1000_hw *hw);</div><div class='ctx'> </div><div class='ctx'> /* IGP01E1000 Specific Registers */</div><div class='ctx'> #define IGP01E1000_PHY_PORT_CONFIG        0x10 /* Port Config */</div><div class='hunk'>@@ -114,6 +117,13 @@ s32  igb_get_cable_length_82580(struct e1000_hw *hw);</div><div class='ctx'> /* I82580 PHY Diagnostics Status */</div><div class='ctx'> #define I82580_DSTATUS_CABLE_LENGTH       0x03FC</div><div class='ctx'> #define I82580_DSTATUS_CABLE_LENGTH_SHIFT 2</div><div class='add'>+</div><div class='add'>+/* 82580 PHY Power Management */</div><div class='add'>+#define E1000_82580_PHY_POWER_MGMT	0xE14</div><div class='add'>+#define E1000_82580_PM_SPD		0x0001 /* Smart Power Down */</div><div class='add'>+#define E1000_82580_PM_D0_LPLU		0x0002 /* For D0a states */</div><div class='add'>+#define E1000_82580_PM_D3_LPLU		0x0004 /* For all other states */</div><div class='add'>+</div><div class='ctx'> /* Enable flexible speed on link-up */</div><div class='ctx'> #define IGP02E1000_PM_D0_LPLU             0x0002 /* For D0a states */</div><div class='ctx'> #define IGP02E1000_PM_D3_LPLU             0x0004 /* For all other states */</div><div class='hunk'>@@ -133,4 +143,16 @@ s32  igb_get_cable_length_82580(struct e1000_hw *hw);</div><div class='ctx'> </div><div class='ctx'> #define E1000_CABLE_LENGTH_UNDEFINED      0xFF</div><div class='ctx'> </div><div class='add'>+/* GS40G - I210 PHY defines */</div><div class='add'>+#define GS40G_PAGE_SELECT		0x16</div><div class='add'>+#define GS40G_PAGE_SHIFT		16</div><div class='add'>+#define GS40G_OFFSET_MASK		0xFFFF</div><div class='add'>+#define GS40G_PAGE_2			0x20000</div><div class='add'>+#define GS40G_MAC_REG2			0x15</div><div class='add'>+#define GS40G_MAC_LB			0x4140</div><div class='add'>+#define GS40G_MAC_SPEED_1G		0X0006</div><div class='add'>+#define GS40G_COPPER_SPEC		0x0010</div><div class='add'>+#define GS40G_CS_POWER_DOWN		0x0002</div><div class='add'>+#define GS40G_LINE_LB			0x4000</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_regs.h b/drivers/net/ethernet/intel/igb/e1000_regs.h<br/>index ccdf36d503fd..35d1e4f2c92c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_regs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/e1000_regs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/e1000_regs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/e1000_regs.h</a></div><div class='hunk'>@@ -352,4 +352,18 @@</div><div class='ctx'> #define E1000_O2BGPTC   0x08FE4 /* OS2BMC packets received by BMC */</div><div class='ctx'> #define E1000_O2BSPC    0x0415C /* OS2BMC packets transmitted by host */</div><div class='ctx'> </div><div class='add'>+#define E1000_SRWR		0x12018  /* Shadow Ram Write Register - RW */</div><div class='add'>+#define E1000_I210_FLMNGCTL	0x12038</div><div class='add'>+#define E1000_I210_FLMNGDATA	0x1203C</div><div class='add'>+#define E1000_I210_FLMNGCNT	0x12040</div><div class='add'>+</div><div class='add'>+#define E1000_I210_FLSWCTL	0x12048</div><div class='add'>+#define E1000_I210_FLSWDATA	0x1204C</div><div class='add'>+#define E1000_I210_FLSWCNT	0x12050</div><div class='add'>+</div><div class='add'>+#define E1000_I210_FLA		0x1201C</div><div class='add'>+</div><div class='add'>+#define E1000_INVM_DATA_REG(_n)	(0x12120 + 4*(_n))</div><div class='add'>+#define E1000_INVM_SIZE		64 /* Number of INVM Data Registers */</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h<br/>index 8e33bdd33eea..ae6d3f393a54 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/igb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/igb.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/igb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/igb.h</a></div><div class='hunk'>@@ -35,8 +35,8 @@</div><div class='ctx'> #include "e1000_82575.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/clocksource.h&gt;</div><div class='del'>-#include &lt;linux/timecompare.h&gt;</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -65,10 +65,13 @@ struct igb_adapter;</div><div class='ctx'> #define MAX_Q_VECTORS                      8</div><div class='ctx'> </div><div class='ctx'> /* Transmit and receive queues */</div><div class='del'>-#define IGB_MAX_RX_QUEUES                  (adapter-&gt;vfs_allocated_count ? 2 : \</div><div class='del'>-                                           (hw-&gt;mac.type &gt; e1000_82575 ? 8 : 4))</div><div class='add'>+#define IGB_MAX_RX_QUEUES		((adapter-&gt;vfs_allocated_count ? 2 : \</div><div class='add'>+					(hw-&gt;mac.type &gt; e1000_82575 ? 8 : 4)))</div><div class='add'>+#define IGB_MAX_RX_QUEUES_I210             4</div><div class='add'>+#define IGB_MAX_RX_QUEUES_I211             2</div><div class='ctx'> #define IGB_MAX_TX_QUEUES                  16</div><div class='del'>-</div><div class='add'>+#define IGB_MAX_TX_QUEUES_I210             4</div><div class='add'>+#define IGB_MAX_TX_QUEUES_I211             2</div><div class='ctx'> #define IGB_MAX_VF_MC_ENTRIES              30</div><div class='ctx'> #define IGB_MAX_VF_FUNCTIONS               8</div><div class='ctx'> #define IGB_MAX_VFTA_ENTRIES               128</div><div class='hunk'>@@ -328,9 +331,6 @@ struct igb_adapter {</div><div class='ctx'> </div><div class='ctx'> 	/* OS defined structs */</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='del'>-	struct cyclecounter cycles;</div><div class='del'>-	struct timecounter clock;</div><div class='del'>-	struct timecompare compare;</div><div class='ctx'> 	struct hwtstamp_config hwtstamp_config;</div><div class='ctx'> </div><div class='ctx'> 	spinlock_t stats64_lock;</div><div class='hunk'>@@ -364,6 +364,13 @@ struct igb_adapter {</div><div class='ctx'> 	u32 wvbr;</div><div class='ctx'> 	int node;</div><div class='ctx'> 	u32 *shadow_vfta;</div><div class='add'>+</div><div class='add'>+	struct ptp_clock *ptp_clock;</div><div class='add'>+	struct ptp_clock_info caps;</div><div class='add'>+	struct delayed_work overflow_work;</div><div class='add'>+	spinlock_t tmreg_lock;</div><div class='add'>+	struct cyclecounter cc;</div><div class='add'>+	struct timecounter tc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define IGB_FLAG_HAS_MSI           (1 &lt;&lt; 0)</div><div class='hunk'>@@ -378,7 +385,6 @@ struct igb_adapter {</div><div class='ctx'> #define IGB_DMCTLX_DCFLUSH_DIS     0x80000000  /* Disable DMA Coal Flush */</div><div class='ctx'> </div><div class='ctx'> #define IGB_82576_TSYNC_SHIFT 19</div><div class='del'>-#define IGB_82580_TSYNC_SHIFT 24</div><div class='ctx'> #define IGB_TS_HDR_LEN        16</div><div class='ctx'> enum e1000_state_t {</div><div class='ctx'> 	__IGB_TESTING,</div><div class='hunk'>@@ -414,7 +420,15 @@ extern void igb_update_stats(struct igb_adapter *, struct rtnl_link_stats64 *);</div><div class='ctx'> extern bool igb_has_link(struct igb_adapter *adapter);</div><div class='ctx'> extern void igb_set_ethtool_ops(struct net_device *);</div><div class='ctx'> extern void igb_power_up_link(struct igb_adapter *);</div><div class='add'>+#ifdef CONFIG_IGB_PTP</div><div class='add'>+extern void igb_ptp_init(struct igb_adapter *adapter);</div><div class='add'>+extern void igb_ptp_remove(struct igb_adapter *adapter);</div><div class='ctx'> </div><div class='add'>+extern void igb_systim_to_hwtstamp(struct igb_adapter *adapter,</div><div class='add'>+				   struct skb_shared_hwtstamps *hwtstamps,</div><div class='add'>+				   u64 systim);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='ctx'> static inline s32 igb_reset_phy(struct e1000_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	if (hw-&gt;phy.ops.reset)</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/igb_ethtool.c b/drivers/net/ethernet/intel/igb/igb_ethtool.c<br/>index e10821a0f249..812d4f963bd1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/igb_ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/igb_ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/igb_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/igb_ethtool.c</a></div><div class='hunk'>@@ -335,7 +335,7 @@ static void igb_set_msglevel(struct net_device *netdev, u32 data)</div><div class='ctx'> </div><div class='ctx'> static int igb_get_regs_len(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-#define IGB_REGS_LEN 551</div><div class='add'>+#define IGB_REGS_LEN 739</div><div class='ctx'> 	return IGB_REGS_LEN * sizeof(u32);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -552,10 +552,49 @@ static void igb_get_regs(struct net_device *netdev,</div><div class='ctx'> 	regs_buff[548] = rd32(E1000_TDFT);</div><div class='ctx'> 	regs_buff[549] = rd32(E1000_TDFHS);</div><div class='ctx'> 	regs_buff[550] = rd32(E1000_TDFPC);</div><div class='del'>-	regs_buff[551] = adapter-&gt;stats.o2bgptc;</div><div class='del'>-	regs_buff[552] = adapter-&gt;stats.b2ospc;</div><div class='del'>-	regs_buff[553] = adapter-&gt;stats.o2bspc;</div><div class='del'>-	regs_buff[554] = adapter-&gt;stats.b2ogprc;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type &gt; e1000_82580) {</div><div class='add'>+		regs_buff[551] = adapter-&gt;stats.o2bgptc;</div><div class='add'>+		regs_buff[552] = adapter-&gt;stats.b2ospc;</div><div class='add'>+		regs_buff[553] = adapter-&gt;stats.o2bspc;</div><div class='add'>+		regs_buff[554] = adapter-&gt;stats.b2ogprc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type != e1000_82576)</div><div class='add'>+		return;</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[555 + i] = rd32(E1000_SRRCTL(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 4; i++)</div><div class='add'>+		regs_buff[567 + i] = rd32(E1000_PSRTYPE(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[571 + i] = rd32(E1000_RDBAL(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[583 + i] = rd32(E1000_RDBAH(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[595 + i] = rd32(E1000_RDLEN(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[607 + i] = rd32(E1000_RDH(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[619 + i] = rd32(E1000_RDT(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[631 + i] = rd32(E1000_RXDCTL(i + 4));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[643 + i] = rd32(E1000_TDBAL(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[655 + i] = rd32(E1000_TDBAH(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[667 + i] = rd32(E1000_TDLEN(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[679 + i] = rd32(E1000_TDH(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[691 + i] = rd32(E1000_TDT(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[703 + i] = rd32(E1000_TXDCTL(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[715 + i] = rd32(E1000_TDWBAL(i + 4));</div><div class='add'>+	for (i = 0; i &lt; 12; i++)</div><div class='add'>+		regs_buff[727 + i] = rd32(E1000_TDWBAH(i + 4));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int igb_get_eeprom_len(struct net_device *netdev)</div><div class='hunk'>@@ -624,6 +663,9 @@ static int igb_set_eeprom(struct net_device *netdev,</div><div class='ctx'> 	if (eeprom-&gt;len == 0)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='add'>+	if (hw-&gt;mac.type == e1000_i211)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	if (eeprom-&gt;magic != (hw-&gt;vendor_id | (hw-&gt;device_id &lt;&lt; 16)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='hunk'>@@ -851,6 +893,36 @@ struct igb_reg_test {</div><div class='ctx'> #define TABLE64_TEST_LO	5</div><div class='ctx'> #define TABLE64_TEST_HI	6</div><div class='ctx'> </div><div class='add'>+/* i210 reg test */</div><div class='add'>+static struct igb_reg_test reg_test_i210[] = {</div><div class='add'>+	{ E1000_FCAL,	   0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },</div><div class='add'>+	{ E1000_FCAH,	   0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },</div><div class='add'>+	{ E1000_FCT,	   0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },</div><div class='add'>+	{ E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },</div><div class='add'>+	{ E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },</div><div class='add'>+	{ E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },</div><div class='add'>+	/* RDH is read-only for i210, only test RDT. */</div><div class='add'>+	{ E1000_RDT(0),	   0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },</div><div class='add'>+	{ E1000_FCRTH,	   0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },</div><div class='add'>+	{ E1000_FCTTV,	   0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },</div><div class='add'>+	{ E1000_TIPG,	   0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },</div><div class='add'>+	{ E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },</div><div class='add'>+	{ E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },</div><div class='add'>+	{ E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },</div><div class='add'>+	{ E1000_TDT(0),	   0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },</div><div class='add'>+	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },</div><div class='add'>+	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },</div><div class='add'>+	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },</div><div class='add'>+	{ E1000_TCTL,	   0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },</div><div class='add'>+	{ E1000_RA,	   0, 16, TABLE64_TEST_LO,</div><div class='add'>+						0xFFFFFFFF, 0xFFFFFFFF },</div><div class='add'>+	{ E1000_RA,	   0, 16, TABLE64_TEST_HI,</div><div class='add'>+						0x900FFFFF, 0xFFFFFFFF },</div><div class='add'>+	{ E1000_MTA,	   0, 128, TABLE32_TEST,</div><div class='add'>+						0xFFFFFFFF, 0xFFFFFFFF },</div><div class='add'>+	{ 0, 0, 0, 0, 0 }</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* i350 reg test */</div><div class='ctx'> static struct igb_reg_test reg_test_i350[] = {</div><div class='ctx'> 	{ E1000_FCAL,	   0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },</div><div class='hunk'>@@ -1073,6 +1145,11 @@ static int igb_reg_test(struct igb_adapter *adapter, u64 *data)</div><div class='ctx'> 		test = reg_test_i350;</div><div class='ctx'> 		toggle = 0x7FEFF3FF;</div><div class='ctx'> 		break;</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='add'>+		test = reg_test_i210;</div><div class='add'>+		toggle = 0x7FEFF3FF;</div><div class='add'>+		break;</div><div class='ctx'> 	case e1000_82580:</div><div class='ctx'> 		test = reg_test_82580;</div><div class='ctx'> 		toggle = 0x7FEFF3FF;</div><div class='hunk'>@@ -1154,23 +1231,13 @@ static int igb_reg_test(struct igb_adapter *adapter, u64 *data)</div><div class='ctx'> </div><div class='ctx'> static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)</div><div class='ctx'> {</div><div class='del'>-	u16 temp;</div><div class='del'>-	u16 checksum = 0;</div><div class='del'>-	u16 i;</div><div class='del'>-</div><div class='ctx'> 	*data = 0;</div><div class='del'>-	/* Read and add up the contents of the EEPROM */</div><div class='del'>-	for (i = 0; i &lt; (NVM_CHECKSUM_REG + 1); i++) {</div><div class='del'>-		if ((adapter-&gt;hw.nvm.ops.read(&amp;adapter-&gt;hw, i, 1, &amp;temp)) &lt; 0) {</div><div class='del'>-			*data = 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		checksum += temp;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	/* If Checksum is not Correct return error else test passed */</div><div class='del'>-	if ((checksum != (u16) NVM_SUM) &amp;&amp; !(*data))</div><div class='del'>-		*data = 2;</div><div class='add'>+	/* Validate eeprom on all parts but i211 */</div><div class='add'>+	if (adapter-&gt;hw.mac.type != e1000_i211) {</div><div class='add'>+		if (adapter-&gt;hw.nvm.ops.validate(&amp;adapter-&gt;hw) &lt; 0)</div><div class='add'>+			*data = 2;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return *data;</div><div class='ctx'> }</div><div class='hunk'>@@ -1236,6 +1303,8 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data)</div><div class='ctx'> 		ics_mask = 0x77DCFED5;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case e1000_i350:</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='ctx'> 		ics_mask = 0x77DCFED5;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1402,23 +1471,35 @@ static int igb_integrated_phy_loopback(struct igb_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 ctrl_reg = 0;</div><div class='add'>+	u16 phy_reg = 0;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;mac.autoneg = false;</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;phy.type == e1000_phy_m88) {</div><div class='add'>+	switch (hw-&gt;phy.type) {</div><div class='add'>+	case e1000_phy_m88:</div><div class='ctx'> 		/* Auto-MDI/MDIX Off */</div><div class='ctx'> 		igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);</div><div class='ctx'> 		/* reset to update Auto-MDI/MDIX */</div><div class='ctx'> 		igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);</div><div class='ctx'> 		/* autoneg off */</div><div class='ctx'> 		igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);</div><div class='del'>-	} else if (hw-&gt;phy.type == e1000_phy_82580) {</div><div class='add'>+		break;</div><div class='add'>+	case e1000_phy_82580:</div><div class='ctx'> 		/* enable MII loopback */</div><div class='ctx'> 		igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041);</div><div class='add'>+		break;</div><div class='add'>+	case e1000_phy_i210:</div><div class='add'>+		/* set loopback speed in PHY */</div><div class='add'>+		igb_read_phy_reg(hw, (GS40G_PAGE_SELECT &amp; GS40G_PAGE_2),</div><div class='add'>+					&amp;phy_reg);</div><div class='add'>+		phy_reg |= GS40G_MAC_SPEED_1G;</div><div class='add'>+		igb_write_phy_reg(hw, (GS40G_PAGE_SELECT &amp; GS40G_PAGE_2),</div><div class='add'>+					phy_reg);</div><div class='add'>+		ctrl_reg = rd32(E1000_CTRL_EXT);</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ctrl_reg = rd32(E1000_CTRL);</div><div class='del'>-</div><div class='ctx'> 	/* force 1000, set loopback */</div><div class='ctx'> 	igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);</div><div class='ctx'> </div><div class='hunk'>@@ -1431,7 +1512,7 @@ static int igb_integrated_phy_loopback(struct igb_adapter *adapter)</div><div class='ctx'> 		     E1000_CTRL_FD |	 /* Force Duplex to FULL */</div><div class='ctx'> 		     E1000_CTRL_SLU);	 /* Set link up enable bit */</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;phy.type == e1000_phy_m88)</div><div class='add'>+	if ((hw-&gt;phy.type == e1000_phy_m88) || (hw-&gt;phy.type == e1000_phy_i210))</div><div class='ctx'> 		ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */</div><div class='ctx'> </div><div class='ctx'> 	wr32(E1000_CTRL, ctrl_reg);</div><div class='hunk'>@@ -1439,7 +1520,7 @@ static int igb_integrated_phy_loopback(struct igb_adapter *adapter)</div><div class='ctx'> 	/* Disable the receiver on the PHY so when a cable is plugged in, the</div><div class='ctx'> 	 * PHY does not begin to autoneg when a cable is reconnected to the NIC.</div><div class='ctx'> 	 */</div><div class='del'>-	if (hw-&gt;phy.type == e1000_phy_m88)</div><div class='add'>+	if ((hw-&gt;phy.type == e1000_phy_m88) || (hw-&gt;phy.type == e1000_phy_i210))</div><div class='ctx'> 		igb_phy_disable_receiver(adapter);</div><div class='ctx'> </div><div class='ctx'> 	udelay(500);</div><div class='hunk'>@@ -1704,6 +1785,14 @@ static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)</div><div class='ctx'> 		*data = 0;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='add'>+	if ((adapter-&gt;hw.mac.type == e1000_i210)</div><div class='add'>+		|| (adapter-&gt;hw.mac.type == e1000_i210)) {</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+			"Loopback test not supported "</div><div class='add'>+			"on this part at this time.\n");</div><div class='add'>+		*data = 0;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> 	*data = igb_setup_desc_rings(adapter);</div><div class='ctx'> 	if (*data)</div><div class='ctx'> 		goto out;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c<br/>index 5ec31598ee47..dd3bfe8cd36c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/igb_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igb/igb_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/igb_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/igb_main.c</a></div><div class='hunk'>@@ -60,8 +60,8 @@</div><div class='ctx'> #include "igb.h"</div><div class='ctx'> </div><div class='ctx'> #define MAJ 3</div><div class='del'>-#define MIN 2</div><div class='del'>-#define BUILD 10</div><div class='add'>+#define MIN 4</div><div class='add'>+#define BUILD 7</div><div class='ctx'> #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \</div><div class='ctx'> __stringify(BUILD) "-k"</div><div class='ctx'> char igb_driver_name[] = "igb";</div><div class='hunk'>@@ -75,6 +75,11 @@ static const struct e1000_info *igb_info_tbl[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {</div><div class='add'>+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },</div><div class='hunk'>@@ -114,7 +119,6 @@ static void igb_free_all_rx_resources(struct igb_adapter *);</div><div class='ctx'> static void igb_setup_mrqc(struct igb_adapter *);</div><div class='ctx'> static int igb_probe(struct pci_dev *, const struct pci_device_id *);</div><div class='ctx'> static void __devexit igb_remove(struct pci_dev *pdev);</div><div class='del'>-static void igb_init_hw_timer(struct igb_adapter *adapter);</div><div class='ctx'> static int igb_sw_init(struct igb_adapter *);</div><div class='ctx'> static int igb_open(struct net_device *);</div><div class='ctx'> static int igb_close(struct net_device *);</div><div class='hunk'>@@ -565,33 +569,6 @@ exit:</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * igb_read_clock - read raw cycle counter (to be used by time counter)</div><div class='del'>- */</div><div class='del'>-static cycle_t igb_read_clock(const struct cyclecounter *tc)</div><div class='del'>-{</div><div class='del'>-	struct igb_adapter *adapter =</div><div class='del'>-		container_of(tc, struct igb_adapter, cycles);</div><div class='del'>-	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-	u64 stamp = 0;</div><div class='del'>-	int shift = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The timestamp latches on lowest register read. For the 82580</div><div class='del'>-	 * the lowest register is SYSTIMR instead of SYSTIML.  However we never</div><div class='del'>-	 * adjusted TIMINCA so SYSTIMR will just read as all 0s so ignore it.</div><div class='del'>-	 */</div><div class='del'>-	if (hw-&gt;mac.type &gt;= e1000_82580) {</div><div class='del'>-		stamp = rd32(E1000_SYSTIMR) &gt;&gt; 8;</div><div class='del'>-		shift = IGB_82580_TSYNC_SHIFT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	stamp |= (u64)rd32(E1000_SYSTIML) &lt;&lt; shift;</div><div class='del'>-	stamp |= (u64)rd32(E1000_SYSTIMH) &lt;&lt; (shift + 32);</div><div class='del'>-	return stamp;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * igb_get_hw_dev - return device</div><div class='ctx'>  * used by hardware layer to print debugging information</div><div class='hunk'>@@ -669,6 +646,8 @@ static void igb_cache_ring_register(struct igb_adapter *adapter)</div><div class='ctx'> 	case e1000_82575:</div><div class='ctx'> 	case e1000_82580:</div><div class='ctx'> 	case e1000_i350:</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='ctx'> 	default:</div><div class='ctx'> 		for (; i &lt; adapter-&gt;num_rx_queues; i++)</div><div class='ctx'> 			adapter-&gt;rx_ring[i]-&gt;reg_idx = rbase_offset + i;</div><div class='hunk'>@@ -755,8 +734,11 @@ static int igb_alloc_queues(struct igb_adapter *adapter)</div><div class='ctx'> 		if (adapter-&gt;hw.mac.type &gt;= e1000_82576)</div><div class='ctx'> 			set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &amp;ring-&gt;flags);</div><div class='ctx'> </div><div class='del'>-		/* On i350, loopback VLAN packets have the tag byte-swapped. */</div><div class='del'>-		if (adapter-&gt;hw.mac.type == e1000_i350)</div><div class='add'>+		/*</div><div class='add'>+		 * On i350, i210, and i211, loopback VLAN packets</div><div class='add'>+		 * have the tag byte-swapped.</div><div class='add'>+		 * */</div><div class='add'>+		if (adapter-&gt;hw.mac.type &gt;= e1000_i350)</div><div class='ctx'> 			set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &amp;ring-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 		adapter-&gt;rx_ring[i] = ring;</div><div class='hunk'>@@ -850,6 +832,8 @@ static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case e1000_82580:</div><div class='ctx'> 	case e1000_i350:</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * On 82580 and newer adapters the scheme is similar to 82576</div><div class='ctx'> 		 * however instead of ordering column-major we have things</div><div class='hunk'>@@ -916,6 +900,8 @@ static void igb_configure_msix(struct igb_adapter *adapter)</div><div class='ctx'> 	case e1000_82576:</div><div class='ctx'> 	case e1000_82580:</div><div class='ctx'> 	case e1000_i350:</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='ctx'> 		/* Turn on MSI-X capability first, or our settings</div><div class='ctx'> 		 * won't stick.  And it will take days to debug. */</div><div class='ctx'> 		wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |</div><div class='hunk'>@@ -1062,6 +1048,11 @@ static int igb_set_interrupt_capability(struct igb_adapter *adapter)</div><div class='ctx'> 	if (!(adapter-&gt;flags &amp; IGB_FLAG_QUEUE_PAIRS))</div><div class='ctx'> 		numvecs += adapter-&gt;num_tx_queues;</div><div class='ctx'> </div><div class='add'>+	/* i210 and i211 can only have 4 MSIX vectors for rx/tx queues. */</div><div class='add'>+	if ((adapter-&gt;hw.mac.type == e1000_i210)</div><div class='add'>+		|| (adapter-&gt;hw.mac.type == e1000_i211))</div><div class='add'>+		numvecs = 4;</div><div class='add'>+</div><div class='ctx'> 	/* store the number of vectors reserved for queues */</div><div class='ctx'> 	adapter-&gt;num_q_vectors = numvecs;</div><div class='ctx'> </div><div class='hunk'>@@ -1069,6 +1060,7 @@ static int igb_set_interrupt_capability(struct igb_adapter *adapter)</div><div class='ctx'> 	numvecs++;</div><div class='ctx'> 	adapter-&gt;msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),</div><div class='ctx'> 					GFP_KERNEL);</div><div class='add'>+</div><div class='ctx'> 	if (!adapter-&gt;msix_entries)</div><div class='ctx'> 		goto msi_only;</div><div class='ctx'> </div><div class='hunk'>@@ -1111,9 +1103,12 @@ msi_only:</div><div class='ctx'> 		adapter-&gt;flags |= IGB_FLAG_HAS_MSI;</div><div class='ctx'> out:</div><div class='ctx'> 	/* Notify the stack of the (possibly) reduced queue counts. */</div><div class='add'>+	rtnl_lock();</div><div class='ctx'> 	netif_set_real_num_tx_queues(adapter-&gt;netdev, adapter-&gt;num_tx_queues);</div><div class='del'>-	return netif_set_real_num_rx_queues(adapter-&gt;netdev,</div><div class='del'>-					    adapter-&gt;num_rx_queues);</div><div class='add'>+	err = netif_set_real_num_rx_queues(adapter-&gt;netdev,</div><div class='add'>+		adapter-&gt;num_rx_queues);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1659,6 +1654,8 @@ void igb_reset(struct igb_adapter *adapter)</div><div class='ctx'> 		pba &amp;= E1000_RXPBS_SIZE_MASK_82576;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case e1000_82575:</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='ctx'> 	default:</div><div class='ctx'> 		pba = E1000_PBA_34K;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1743,6 +1740,13 @@ void igb_reset(struct igb_adapter *adapter)</div><div class='ctx'> 	if (hw-&gt;mac.ops.init_hw(hw))</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Hardware Error\n");</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Flow control settings reset on hardware reset, so guarantee flow</div><div class='add'>+	 * control is off when forcing speed.</div><div class='add'>+	 */</div><div class='add'>+	if (!hw-&gt;mac.autoneg)</div><div class='add'>+		igb_force_mac_fc(hw);</div><div class='add'>+</div><div class='ctx'> 	igb_init_dmac(adapter, pba);</div><div class='ctx'> 	if (!netif_running(adapter-&gt;netdev))</div><div class='ctx'> 		igb_power_down_link(adapter);</div><div class='hunk'>@@ -1847,7 +1851,7 @@ static int __devinit igb_probe(struct pci_dev *pdev,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (pdev-&gt;is_virtfn) {</div><div class='ctx'> 		WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",</div><div class='del'>-		     pci_name(pdev), pdev-&gt;vendor, pdev-&gt;device);</div><div class='add'>+			pci_name(pdev), pdev-&gt;vendor, pdev-&gt;device);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2001,11 +2005,16 @@ static int __devinit igb_probe(struct pci_dev *pdev,</div><div class='ctx'> 	 * known good starting state */</div><div class='ctx'> 	hw-&gt;mac.ops.reset_hw(hw);</div><div class='ctx'> </div><div class='del'>-	/* make sure the NVM is good */</div><div class='del'>-	if (hw-&gt;nvm.ops.validate(hw) &lt; 0) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "The NVM Checksum Is Not Valid\n");</div><div class='del'>-		err = -EIO;</div><div class='del'>-		goto err_eeprom;</div><div class='add'>+	/*</div><div class='add'>+	 * make sure the NVM is good , i211 parts have special NVM that</div><div class='add'>+	 * doesn't contain a checksum</div><div class='add'>+	 */</div><div class='add'>+	if (hw-&gt;mac.type != e1000_i211) {</div><div class='add'>+		if (hw-&gt;nvm.ops.validate(hw) &lt; 0) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "The NVM Checksum Is Not Valid\n");</div><div class='add'>+			err = -EIO;</div><div class='add'>+			goto err_eeprom;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* copy the MAC address out of the NVM */</div><div class='hunk'>@@ -2110,9 +2119,11 @@ static int __devinit igb_probe(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_IGB_PTP</div><div class='ctx'> 	/* do hw tstamp init after resetting */</div><div class='del'>-	igb_init_hw_timer(adapter);</div><div class='add'>+	igb_ptp_init(adapter);</div><div class='ctx'> </div><div class='add'>+#endif</div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "Intel(R) Gigabit Ethernet Network Connection\n");</div><div class='ctx'> 	/* print bus type/speed/width info */</div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "%s: (PCIe:%s:%s) %pM\n",</div><div class='hunk'>@@ -2137,6 +2148,8 @@ static int __devinit igb_probe(struct pci_dev *pdev,</div><div class='ctx'> 		adapter-&gt;num_rx_queues, adapter-&gt;num_tx_queues);</div><div class='ctx'> 	switch (hw-&gt;mac.type) {</div><div class='ctx'> 	case e1000_i350:</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='ctx'> 		igb_set_eee_i350(hw);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -2184,7 +2197,10 @@ static void __devexit igb_remove(struct pci_dev *pdev)</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	pm_runtime_get_noresume(&amp;pdev-&gt;dev);</div><div class='add'>+#ifdef CONFIG_IGB_PTP</div><div class='add'>+	igb_ptp_remove(adapter);</div><div class='ctx'> </div><div class='add'>+#endif</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The watchdog timer may be rescheduled, so explicitly</div><div class='ctx'> 	 * disable watchdog from being rescheduled.</div><div class='hunk'>@@ -2260,9 +2276,14 @@ static void __devinit igb_probe_vfs(struct igb_adapter * adapter)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_PCI_IOV</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='add'>+	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	int old_vfs = igb_find_enabled_vfs(adapter);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	/* Virtualization features not supported on i210 family. */</div><div class='add'>+	if ((hw-&gt;mac.type == e1000_i210) || (hw-&gt;mac.type == e1000_i211))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (old_vfs) {</div><div class='ctx'> 		dev_info(&amp;pdev-&gt;dev, "%d pre-allocated VFs found - override "</div><div class='ctx'> 			 "max_vfs setting of %d\n", old_vfs, max_vfs);</div><div class='hunk'>@@ -2274,6 +2295,7 @@ static void __devinit igb_probe_vfs(struct igb_adapter * adapter)</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;vf_data = kcalloc(adapter-&gt;vfs_allocated_count,</div><div class='ctx'> 				sizeof(struct vf_data_storage), GFP_KERNEL);</div><div class='add'>+</div><div class='ctx'> 	/* if allocation failed then we do not support SR-IOV */</div><div class='ctx'> 	if (!adapter-&gt;vf_data) {</div><div class='ctx'> 		adapter-&gt;vfs_allocated_count = 0;</div><div class='hunk'>@@ -2304,112 +2326,6 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * igb_init_hw_timer - Initialize hardware timer used with IEEE 1588 timestamp</div><div class='del'>- * @adapter: board private structure to initialize</div><div class='del'>- *</div><div class='del'>- * igb_init_hw_timer initializes the function pointer and values for the hw</div><div class='del'>- * timer found in hardware.</div><div class='del'>- **/</div><div class='del'>-static void igb_init_hw_timer(struct igb_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-</div><div class='del'>-	switch (hw-&gt;mac.type) {</div><div class='del'>-	case e1000_i350:</div><div class='del'>-	case e1000_82580:</div><div class='del'>-		memset(&amp;adapter-&gt;cycles, 0, sizeof(adapter-&gt;cycles));</div><div class='del'>-		adapter-&gt;cycles.read = igb_read_clock;</div><div class='del'>-		adapter-&gt;cycles.mask = CLOCKSOURCE_MASK(64);</div><div class='del'>-		adapter-&gt;cycles.mult = 1;</div><div class='del'>-		/*</div><div class='del'>-		 * The 82580 timesync updates the system timer every 8ns by 8ns</div><div class='del'>-		 * and the value cannot be shifted.  Instead we need to shift</div><div class='del'>-		 * the registers to generate a 64bit timer value.  As a result</div><div class='del'>-		 * SYSTIMR/L/H, TXSTMPL/H, RXSTMPL/H all have to be shifted by</div><div class='del'>-		 * 24 in order to generate a larger value for synchronization.</div><div class='del'>-		 */</div><div class='del'>-		adapter-&gt;cycles.shift = IGB_82580_TSYNC_SHIFT;</div><div class='del'>-		/* disable system timer temporarily by setting bit 31 */</div><div class='del'>-		wr32(E1000_TSAUXC, 0x80000000);</div><div class='del'>-		wrfl();</div><div class='del'>-</div><div class='del'>-		/* Set registers so that rollover occurs soon to test this. */</div><div class='del'>-		wr32(E1000_SYSTIMR, 0x00000000);</div><div class='del'>-		wr32(E1000_SYSTIML, 0x80000000);</div><div class='del'>-		wr32(E1000_SYSTIMH, 0x000000FF);</div><div class='del'>-		wrfl();</div><div class='del'>-</div><div class='del'>-		/* enable system timer by clearing bit 31 */</div><div class='del'>-		wr32(E1000_TSAUXC, 0x0);</div><div class='del'>-		wrfl();</div><div class='del'>-</div><div class='del'>-		timecounter_init(&amp;adapter-&gt;clock,</div><div class='del'>-				 &amp;adapter-&gt;cycles,</div><div class='del'>-				 ktime_to_ns(ktime_get_real()));</div><div class='del'>-		/*</div><div class='del'>-		 * Synchronize our NIC clock against system wall clock. NIC</div><div class='del'>-		 * time stamp reading requires ~3us per sample, each sample</div><div class='del'>-		 * was pretty stable even under load =&gt; only require 10</div><div class='del'>-		 * samples for each offset comparison.</div><div class='del'>-		 */</div><div class='del'>-		memset(&amp;adapter-&gt;compare, 0, sizeof(adapter-&gt;compare));</div><div class='del'>-		adapter-&gt;compare.source = &amp;adapter-&gt;clock;</div><div class='del'>-		adapter-&gt;compare.target = ktime_get_real;</div><div class='del'>-		adapter-&gt;compare.num_samples = 10;</div><div class='del'>-		timecompare_update(&amp;adapter-&gt;compare, 0);</div><div class='del'>-		break;</div><div class='del'>-	case e1000_82576:</div><div class='del'>-		/*</div><div class='del'>-		 * Initialize hardware timer: we keep it running just in case</div><div class='del'>-		 * that some program needs it later on.</div><div class='del'>-		 */</div><div class='del'>-		memset(&amp;adapter-&gt;cycles, 0, sizeof(adapter-&gt;cycles));</div><div class='del'>-		adapter-&gt;cycles.read = igb_read_clock;</div><div class='del'>-		adapter-&gt;cycles.mask = CLOCKSOURCE_MASK(64);</div><div class='del'>-		adapter-&gt;cycles.mult = 1;</div><div class='del'>-		/**</div><div class='del'>-		 * Scale the NIC clock cycle by a large factor so that</div><div class='del'>-		 * relatively small clock corrections can be added or</div><div class='del'>-		 * subtracted at each clock tick. The drawbacks of a large</div><div class='del'>-		 * factor are a) that the clock register overflows more quickly</div><div class='del'>-		 * (not such a big deal) and b) that the increment per tick has</div><div class='del'>-		 * to fit into 24 bits.  As a result we need to use a shift of</div><div class='del'>-		 * 19 so we can fit a value of 16 into the TIMINCA register.</div><div class='del'>-		 */</div><div class='del'>-		adapter-&gt;cycles.shift = IGB_82576_TSYNC_SHIFT;</div><div class='del'>-		wr32(E1000_TIMINCA,</div><div class='del'>-		                (1 &lt;&lt; E1000_TIMINCA_16NS_SHIFT) |</div><div class='del'>-		                (16 &lt;&lt; IGB_82576_TSYNC_SHIFT));</div><div class='del'>-</div><div class='del'>-		/* Set registers so that rollover occurs soon to test this. */</div><div class='del'>-		wr32(E1000_SYSTIML, 0x00000000);</div><div class='del'>-		wr32(E1000_SYSTIMH, 0xFF800000);</div><div class='del'>-		wrfl();</div><div class='del'>-</div><div class='del'>-		timecounter_init(&amp;adapter-&gt;clock,</div><div class='del'>-				 &amp;adapter-&gt;cycles,</div><div class='del'>-				 ktime_to_ns(ktime_get_real()));</div><div class='del'>-		/*</div><div class='del'>-		 * Synchronize our NIC clock against system wall clock. NIC</div><div class='del'>-		 * time stamp reading requires ~3us per sample, each sample</div><div class='del'>-		 * was pretty stable even under load =&gt; only require 10</div><div class='del'>-		 * samples for each offset comparison.</div><div class='del'>-		 */</div><div class='del'>-		memset(&amp;adapter-&gt;compare, 0, sizeof(adapter-&gt;compare));</div><div class='del'>-		adapter-&gt;compare.source = &amp;adapter-&gt;clock;</div><div class='del'>-		adapter-&gt;compare.target = ktime_get_real;</div><div class='del'>-		adapter-&gt;compare.num_samples = 10;</div><div class='del'>-		timecompare_update(&amp;adapter-&gt;compare, 0);</div><div class='del'>-		break;</div><div class='del'>-	case e1000_82575:</div><div class='del'>-		/* 82575 does not support timesync */</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * igb_sw_init - Initialize general software structures (struct igb_adapter)</div><div class='ctx'>  * @adapter: board private structure to initialize</div><div class='ctx'>  *</div><div class='hunk'>@@ -2454,11 +2370,28 @@ static int __devinit igb_sw_init(struct igb_adapter *adapter)</div><div class='ctx'> 		} else</div><div class='ctx'> 			adapter-&gt;vfs_allocated_count = max_vfs;</div><div class='ctx'> 		break;</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='add'>+		adapter-&gt;vfs_allocated_count = 0;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* CONFIG_PCI_IOV */</div><div class='del'>-	adapter-&gt;rss_queues = min_t(u32, IGB_MAX_RX_QUEUES, num_online_cpus());</div><div class='add'>+	switch (hw-&gt;mac.type) {</div><div class='add'>+	case e1000_i210:</div><div class='add'>+		adapter-&gt;rss_queues = min_t(u32, IGB_MAX_RX_QUEUES_I210,</div><div class='add'>+			num_online_cpus());</div><div class='add'>+		break;</div><div class='add'>+	case e1000_i211:</div><div class='add'>+		adapter-&gt;rss_queues = min_t(u32, IGB_MAX_RX_QUEUES_I211,</div><div class='add'>+			num_online_cpus());</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		adapter-&gt;rss_queues = min_t(u32, IGB_MAX_RX_QUEUES,</div><div class='add'>+		num_online_cpus());</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> 	/* i350 cannot do RSS and SR-IOV at the same time */</div><div class='ctx'> 	if (hw-&gt;mac.type == e1000_i350 &amp;&amp; adapter-&gt;vfs_allocated_count)</div><div class='ctx'> 		adapter-&gt;rss_queues = 1;</div><div class='hunk'>@@ -2488,7 +2421,7 @@ static int __devinit igb_sw_init(struct igb_adapter *adapter)</div><div class='ctx'> 	/* Explicitly disable IRQ since the NIC can be in any state. */</div><div class='ctx'> 	igb_irq_disable(adapter);</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;mac.type == e1000_i350)</div><div class='add'>+	if (hw-&gt;mac.type &gt;= e1000_i350)</div><div class='ctx'> 		adapter-&gt;flags &amp;= ~IGB_FLAG_DMAC;</div><div class='ctx'> </div><div class='ctx'> 	set_bit(__IGB_DOWN, &amp;adapter-&gt;state);</div><div class='hunk'>@@ -2771,8 +2704,6 @@ void igb_configure_tx_ring(struct igb_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	txdctl |= E1000_TXDCTL_QUEUE_ENABLE;</div><div class='ctx'> 	wr32(E1000_TXDCTL(reg_idx), txdctl);</div><div class='del'>-</div><div class='del'>-	netdev_tx_reset_queue(txring_txq(ring));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2943,6 +2874,17 @@ static void igb_setup_mrqc(struct igb_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	/* Don't need to set TUOFL or IPOFL, they default to 1 */</div><div class='ctx'> 	wr32(E1000_RXCSUM, rxcsum);</div><div class='add'>+	/*</div><div class='add'>+	 * Generate RSS hash based on TCP port numbers and/or</div><div class='add'>+	 * IPv4/v6 src and dst addresses since UDP cannot be</div><div class='add'>+	 * hashed reliably due to IP fragmentation</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	mrqc = E1000_MRQC_RSS_FIELD_IPV4 |</div><div class='add'>+	       E1000_MRQC_RSS_FIELD_IPV4_TCP |</div><div class='add'>+	       E1000_MRQC_RSS_FIELD_IPV6 |</div><div class='add'>+	       E1000_MRQC_RSS_FIELD_IPV6_TCP |</div><div class='add'>+	       E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;</div><div class='ctx'> </div><div class='ctx'> 	/* If VMDq is enabled then we set the appropriate mode for that, else</div><div class='ctx'> 	 * we default to RSS so that an RSS hash is calculated per packet even</div><div class='hunk'>@@ -2958,25 +2900,15 @@ static void igb_setup_mrqc(struct igb_adapter *adapter)</div><div class='ctx'> 			wr32(E1000_VT_CTL, vtctl);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (adapter-&gt;rss_queues &gt; 1)</div><div class='del'>-			mrqc = E1000_MRQC_ENABLE_VMDQ_RSS_2Q;</div><div class='add'>+			mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;</div><div class='ctx'> 		else</div><div class='del'>-			mrqc = E1000_MRQC_ENABLE_VMDQ;</div><div class='add'>+			mrqc |= E1000_MRQC_ENABLE_VMDQ;</div><div class='ctx'> 	} else {</div><div class='del'>-		mrqc = E1000_MRQC_ENABLE_RSS_4Q;</div><div class='add'>+		if (hw-&gt;mac.type != e1000_i211)</div><div class='add'>+			mrqc |= E1000_MRQC_ENABLE_RSS_4Q;</div><div class='ctx'> 	}</div><div class='ctx'> 	igb_vmm_control(adapter);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Generate RSS hash based on TCP port numbers and/or</div><div class='del'>-	 * IPv4/v6 src and dst addresses since UDP cannot be</div><div class='del'>-	 * hashed reliably due to IP fragmentation</div><div class='del'>-	 */</div><div class='del'>-	mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |</div><div class='del'>-		E1000_MRQC_RSS_FIELD_IPV4_TCP |</div><div class='del'>-		E1000_MRQC_RSS_FIELD_IPV6 |</div><div class='del'>-		E1000_MRQC_RSS_FIELD_IPV6_TCP |</div><div class='del'>-		E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;</div><div class='del'>-</div><div class='ctx'> 	wr32(E1000_MRQC, mrqc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3282,6 +3214,8 @@ static void igb_clean_tx_ring(struct igb_ring *tx_ring)</div><div class='ctx'> 		igb_unmap_and_free_tx_resource(tx_ring, buffer_info);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netdev_tx_reset_queue(txring_txq(tx_ring));</div><div class='add'>+</div><div class='ctx'> 	size = sizeof(struct igb_tx_buffer) * tx_ring-&gt;count;</div><div class='ctx'> 	memset(tx_ring-&gt;tx_buffer_info, 0, size);</div><div class='ctx'> </div><div class='hunk'>@@ -3576,7 +3510,7 @@ static void igb_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> 	 * we will have issues with VLAN tag stripping not being done for frames</div><div class='ctx'> 	 * that are only arriving because we are the default pool</div><div class='ctx'> 	 */</div><div class='del'>-	if (hw-&gt;mac.type &lt; e1000_82576)</div><div class='add'>+	if ((hw-&gt;mac.type &lt; e1000_82576) || (hw-&gt;mac.type &gt; e1000_i350))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	vmolr |= rd32(E1000_VMOLR(vfn)) &amp;</div><div class='hunk'>@@ -3673,7 +3607,7 @@ static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)</div><div class='ctx'> 	bool ret = false;</div><div class='ctx'> 	u32 ctrl_ext, thstat;</div><div class='ctx'> </div><div class='del'>-	/* check for thermal sensor event on i350, copper only */</div><div class='add'>+	/* check for thermal sensor event on i350 copper only */</div><div class='ctx'> 	if (hw-&gt;mac.type == e1000_i350) {</div><div class='ctx'> 		thstat = rd32(E1000_THSTAT);</div><div class='ctx'> 		ctrl_ext = rd32(E1000_CTRL_EXT);</div><div class='hunk'>@@ -5718,35 +5652,7 @@ static int igb_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * igb_systim_to_hwtstamp - convert system time value to hw timestamp</div><div class='del'>- * @adapter: board private structure</div><div class='del'>- * @shhwtstamps: timestamp structure to update</div><div class='del'>- * @regval: unsigned 64bit system time value.</div><div class='del'>- *</div><div class='del'>- * We need to convert the system time value stored in the RX/TXSTMP registers</div><div class='del'>- * into a hwtstamp which can be used by the upper level timestamping functions</div><div class='del'>- */</div><div class='del'>-static void igb_systim_to_hwtstamp(struct igb_adapter *adapter,</div><div class='del'>-                                   struct skb_shared_hwtstamps *shhwtstamps,</div><div class='del'>-                                   u64 regval)</div><div class='del'>-{</div><div class='del'>-	u64 ns;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The 82580 starts with 1ns at bit 0 in RX/TXSTMPL, shift this up to</div><div class='del'>-	 * 24 to match clock shift we setup earlier.</div><div class='del'>-	 */</div><div class='del'>-	if (adapter-&gt;hw.mac.type &gt;= e1000_82580)</div><div class='del'>-		regval &lt;&lt;= IGB_82580_TSYNC_SHIFT;</div><div class='del'>-</div><div class='del'>-	ns = timecounter_cyc2time(&amp;adapter-&gt;clock, regval);</div><div class='del'>-	timecompare_update(&amp;adapter-&gt;compare, ns);</div><div class='del'>-	memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));</div><div class='del'>-	shhwtstamps-&gt;hwtstamp = ns_to_ktime(ns);</div><div class='del'>-	shhwtstamps-&gt;syststamp = timecompare_transform(&amp;adapter-&gt;compare, ns);</div><div class='del'>-}</div><div class='del'>-</div><div class='add'>+#ifdef CONFIG_IGB_PTP</div><div class='ctx'> /**</div><div class='ctx'>  * igb_tx_hwtstamp - utility function which checks for TX time stamp</div><div class='ctx'>  * @q_vector: pointer to q_vector containing needed info</div><div class='hunk'>@@ -5776,6 +5682,7 @@ static void igb_tx_hwtstamp(struct igb_q_vector *q_vector,</div><div class='ctx'> 	skb_tstamp_tx(buffer_info-&gt;skb, &amp;shhwtstamps);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#endif</div><div class='ctx'> /**</div><div class='ctx'>  * igb_clean_tx_irq - Reclaim resources after transmit completes</div><div class='ctx'>  * @q_vector: pointer to q_vector containing needed info</div><div class='hunk'>@@ -5819,9 +5726,11 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)</div><div class='ctx'> 		total_bytes += tx_buffer-&gt;bytecount;</div><div class='ctx'> 		total_packets += tx_buffer-&gt;gso_segs;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IGB_PTP</div><div class='ctx'> 		/* retrieve hardware timestamp */</div><div class='ctx'> 		igb_tx_hwtstamp(q_vector, tx_buffer);</div><div class='ctx'> </div><div class='add'>+#endif</div><div class='ctx'> 		/* free the skb */</div><div class='ctx'> 		dev_kfree_skb_any(tx_buffer-&gt;skb);</div><div class='ctx'> 		tx_buffer-&gt;skb = NULL;</div><div class='hunk'>@@ -5993,6 +5902,7 @@ static inline void igb_rx_hash(struct igb_ring *ring,</div><div class='ctx'> 		skb-&gt;rxhash = le32_to_cpu(rx_desc-&gt;wb.lower.hi_dword.rss);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IGB_PTP</div><div class='ctx'> static void igb_rx_hwtstamp(struct igb_q_vector *q_vector,</div><div class='ctx'> 			    union e1000_adv_rx_desc *rx_desc,</div><div class='ctx'> 			    struct sk_buff *skb)</div><div class='hunk'>@@ -6032,6 +5942,7 @@ static void igb_rx_hwtstamp(struct igb_q_vector *q_vector,</div><div class='ctx'> 	igb_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#endif</div><div class='ctx'> static void igb_rx_vlan(struct igb_ring *ring,</div><div class='ctx'> 			union e1000_adv_rx_desc *rx_desc,</div><div class='ctx'> 			struct sk_buff *skb)</div><div class='hunk'>@@ -6142,7 +6053,9 @@ static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)</div><div class='ctx'> 			goto next_desc;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IGB_PTP</div><div class='ctx'> 		igb_rx_hwtstamp(q_vector, rx_desc, skb);</div><div class='add'>+#endif</div><div class='ctx'> 		igb_rx_hash(rx_ring, rx_desc, skb);</div><div class='ctx'> 		igb_rx_checksum(rx_ring, rx_desc, skb);</div><div class='ctx'> 		igb_rx_vlan(rx_ring, rx_desc, skb);</div><div class='hunk'>@@ -6796,18 +6709,7 @@ static int igb_resume(struct device *dev)</div><div class='ctx'> 	pci_enable_wake(pdev, PCI_D3hot, 0);</div><div class='ctx'> 	pci_enable_wake(pdev, PCI_D3cold, 0);</div><div class='ctx'> </div><div class='del'>-	if (!rtnl_is_locked()) {</div><div class='del'>-		/*</div><div class='del'>-		 * shut up ASSERT_RTNL() warning in</div><div class='del'>-		 * netif_set_real_num_tx/rx_queues.</div><div class='del'>-		 */</div><div class='del'>-		rtnl_lock();</div><div class='del'>-		err = igb_init_interrupt_scheme(adapter);</div><div class='del'>-		rtnl_unlock();</div><div class='del'>-	} else {</div><div class='del'>-		err = igb_init_interrupt_scheme(adapter);</div><div class='del'>-	}</div><div class='del'>-	if (err) {</div><div class='add'>+	if (igb_init_interrupt_scheme(adapter)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unable to allocate memory for queues\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -7170,6 +7072,8 @@ static void igb_vmm_control(struct igb_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	switch (hw-&gt;mac.type) {</div><div class='ctx'> 	case e1000_82575:</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* replication is not supported for 82575 */</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -7243,6 +7147,9 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)</div><div class='ctx'> </div><div class='ctx'> 			/* watchdog timer= +-1000 usec in 32usec intervals */</div><div class='ctx'> 			reg |= (1000 &gt;&gt; 5);</div><div class='add'>+</div><div class='add'>+			/* Disable BMC-to-OS Watchdog Enable */</div><div class='add'>+			reg &amp;= ~E1000_DMACR_DC_BMC2OSW_EN;</div><div class='ctx'> 			wr32(E1000_DMACR, reg);</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c<br/>new file mode 100644<br/>index 000000000000..d5ee7fa50723<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igb/igb_ptp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igb/igb_ptp.c</a></div><div class='hunk'>@@ -0,0 +1,385 @@</div><div class='add'>+/*</div><div class='add'>+ * PTP Hardware Clock (PHC) driver for the Intel 82576 and 82580</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011 Richard Cochran &lt;richardcochran@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along</div><div class='add'>+ * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "igb.h"</div><div class='add'>+</div><div class='add'>+#define INCVALUE_MASK		0x7fffffff</div><div class='add'>+#define ISGN			0x80000000</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 82580 timesync updates the system timer every 8ns by 8ns,</div><div class='add'>+ * and this update value cannot be reprogrammed.</div><div class='add'>+ *</div><div class='add'>+ * Neither the 82576 nor the 82580 offer registers wide enough to hold</div><div class='add'>+ * nanoseconds time values for very long. For the 82580, SYSTIM always</div><div class='add'>+ * counts nanoseconds, but the upper 24 bits are not availible. The</div><div class='add'>+ * frequency is adjusted by changing the 32 bit fractional nanoseconds</div><div class='add'>+ * register, TIMINCA.</div><div class='add'>+ *</div><div class='add'>+ * For the 82576, the SYSTIM register time unit is affect by the</div><div class='add'>+ * choice of the 24 bit TININCA:IV (incvalue) field. Five bits of this</div><div class='add'>+ * field are needed to provide the nominal 16 nanosecond period,</div><div class='add'>+ * leaving 19 bits for fractional nanoseconds.</div><div class='add'>+ *</div><div class='add'>+ * We scale the NIC clock cycle by a large factor so that relatively</div><div class='add'>+ * small clock corrections can be added or subtracted at each clock</div><div class='add'>+ * tick. The drawbacks of a large factor are a) that the clock</div><div class='add'>+ * register overflows more quickly (not such a big deal) and b) that</div><div class='add'>+ * the increment per tick has to fit into 24 bits.  As a result we</div><div class='add'>+ * need to use a shift of 19 so we can fit a value of 16 into the</div><div class='add'>+ * TIMINCA register.</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ *             SYSTIMH            SYSTIML</div><div class='add'>+ *        +--------------+   +---+---+------+</div><div class='add'>+ *  82576 |      32      |   | 8 | 5 |  19  |</div><div class='add'>+ *        +--------------+   +---+---+------+</div><div class='add'>+ *         \________ 45 bits _______/  fract</div><div class='add'>+ *</div><div class='add'>+ *        +----------+---+   +--------------+</div><div class='add'>+ *  82580 |    24    | 8 |   |      32      |</div><div class='add'>+ *        +----------+---+   +--------------+</div><div class='add'>+ *          reserved  \______ 40 bits _____/</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * The 45 bit 82576 SYSTIM overflows every</div><div class='add'>+ *   2^45 * 10^-9 / 3600 = 9.77 hours.</div><div class='add'>+ *</div><div class='add'>+ * The 40 bit 82580 SYSTIM overflows every</div><div class='add'>+ *   2^40 * 10^-9 /  60  = 18.3 minutes.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define IGB_OVERFLOW_PERIOD	(HZ * 60 * 9)</div><div class='add'>+#define INCPERIOD_82576		(1 &lt;&lt; E1000_TIMINCA_16NS_SHIFT)</div><div class='add'>+#define INCVALUE_82576_MASK	((1 &lt;&lt; E1000_TIMINCA_16NS_SHIFT) - 1)</div><div class='add'>+#define INCVALUE_82576		(16 &lt;&lt; IGB_82576_TSYNC_SHIFT)</div><div class='add'>+#define IGB_NBITS_82580		40</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SYSTIM read access for the 82576</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static cycle_t igb_82576_systim_read(const struct cyclecounter *cc)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+	u32 lo, hi;</div><div class='add'>+	struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);</div><div class='add'>+	struct e1000_hw *hw = &amp;igb-&gt;hw;</div><div class='add'>+</div><div class='add'>+	lo = rd32(E1000_SYSTIML);</div><div class='add'>+	hi = rd32(E1000_SYSTIMH);</div><div class='add'>+</div><div class='add'>+	val = ((u64) hi) &lt;&lt; 32;</div><div class='add'>+	val |= lo;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SYSTIM read access for the 82580</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static cycle_t igb_82580_systim_read(const struct cyclecounter *cc)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+	u32 lo, hi, jk;</div><div class='add'>+	struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);</div><div class='add'>+	struct e1000_hw *hw = &amp;igb-&gt;hw;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The timestamp latches on lowest register read. For the 82580</div><div class='add'>+	 * the lowest register is SYSTIMR instead of SYSTIML.  However we only</div><div class='add'>+	 * need to provide nanosecond resolution, so we just ignore it.</div><div class='add'>+	 */</div><div class='add'>+	jk = rd32(E1000_SYSTIMR);</div><div class='add'>+	lo = rd32(E1000_SYSTIML);</div><div class='add'>+	hi = rd32(E1000_SYSTIMH);</div><div class='add'>+</div><div class='add'>+	val = ((u64) hi) &lt;&lt; 32;</div><div class='add'>+	val |= lo;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * PTP clock operations</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int ptp_82576_adjfreq(struct ptp_clock_info *ptp, s32 ppb)</div><div class='add'>+{</div><div class='add'>+	u64 rate;</div><div class='add'>+	u32 incvalue;</div><div class='add'>+	int neg_adj = 0;</div><div class='add'>+	struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);</div><div class='add'>+	struct e1000_hw *hw = &amp;igb-&gt;hw;</div><div class='add'>+</div><div class='add'>+	if (ppb &lt; 0) {</div><div class='add'>+		neg_adj = 1;</div><div class='add'>+		ppb = -ppb;</div><div class='add'>+	}</div><div class='add'>+	rate = ppb;</div><div class='add'>+	rate &lt;&lt;= 14;</div><div class='add'>+	rate = div_u64(rate, 1953125);</div><div class='add'>+</div><div class='add'>+	incvalue = 16 &lt;&lt; IGB_82576_TSYNC_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (neg_adj)</div><div class='add'>+		incvalue -= rate;</div><div class='add'>+	else</div><div class='add'>+		incvalue += rate;</div><div class='add'>+</div><div class='add'>+	wr32(E1000_TIMINCA, INCPERIOD_82576 | (incvalue &amp; INCVALUE_82576_MASK));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ptp_82580_adjfreq(struct ptp_clock_info *ptp, s32 ppb)</div><div class='add'>+{</div><div class='add'>+	u64 rate;</div><div class='add'>+	u32 inca;</div><div class='add'>+	int neg_adj = 0;</div><div class='add'>+	struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);</div><div class='add'>+	struct e1000_hw *hw = &amp;igb-&gt;hw;</div><div class='add'>+</div><div class='add'>+	if (ppb &lt; 0) {</div><div class='add'>+		neg_adj = 1;</div><div class='add'>+		ppb = -ppb;</div><div class='add'>+	}</div><div class='add'>+	rate = ppb;</div><div class='add'>+	rate &lt;&lt;= 26;</div><div class='add'>+	rate = div_u64(rate, 1953125);</div><div class='add'>+</div><div class='add'>+	inca = rate &amp; INCVALUE_MASK;</div><div class='add'>+	if (neg_adj)</div><div class='add'>+		inca |= ISGN;</div><div class='add'>+</div><div class='add'>+	wr32(E1000_TIMINCA, inca);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int igb_adjtime(struct ptp_clock_info *ptp, s64 delta)</div><div class='add'>+{</div><div class='add'>+	s64 now;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;igb-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	now = timecounter_read(&amp;igb-&gt;tc);</div><div class='add'>+	now += delta;</div><div class='add'>+	timecounter_init(&amp;igb-&gt;tc, &amp;igb-&gt;cc, now);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;igb-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int igb_gettime(struct ptp_clock_info *ptp, struct timespec *ts)</div><div class='add'>+{</div><div class='add'>+	u64 ns;</div><div class='add'>+	u32 remainder;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;igb-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	ns = timecounter_read(&amp;igb-&gt;tc);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;igb-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	ts-&gt;tv_sec = div_u64_rem(ns, 1000000000, &amp;remainder);</div><div class='add'>+	ts-&gt;tv_nsec = remainder;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int igb_settime(struct ptp_clock_info *ptp, const struct timespec *ts)</div><div class='add'>+{</div><div class='add'>+	u64 ns;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct igb_adapter *igb = container_of(ptp, struct igb_adapter, caps);</div><div class='add'>+</div><div class='add'>+	ns = ts-&gt;tv_sec * 1000000000ULL;</div><div class='add'>+	ns += ts-&gt;tv_nsec;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;igb-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	timecounter_init(&amp;igb-&gt;tc, &amp;igb-&gt;cc, ns);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;igb-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ptp_82576_enable(struct ptp_clock_info *ptp,</div><div class='add'>+			    struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ptp_82580_enable(struct ptp_clock_info *ptp,</div><div class='add'>+			    struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void igb_overflow_check(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct timespec ts;</div><div class='add'>+	struct igb_adapter *igb =</div><div class='add'>+		container_of(work, struct igb_adapter, overflow_work.work);</div><div class='add'>+</div><div class='add'>+	igb_gettime(&amp;igb-&gt;caps, &amp;ts);</div><div class='add'>+</div><div class='add'>+	pr_debug("igb overflow check at %ld.%09lu\n", ts.tv_sec, ts.tv_nsec);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;igb-&gt;overflow_work, IGB_OVERFLOW_PERIOD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void igb_ptp_init(struct igb_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	switch (hw-&gt;mac.type) {</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='add'>+	case e1000_i350:</div><div class='add'>+	case e1000_82580:</div><div class='add'>+		adapter-&gt;caps.owner	= THIS_MODULE;</div><div class='add'>+		strcpy(adapter-&gt;caps.name, "igb-82580");</div><div class='add'>+		adapter-&gt;caps.max_adj	= 62499999;</div><div class='add'>+		adapter-&gt;caps.n_ext_ts	= 0;</div><div class='add'>+		adapter-&gt;caps.pps	= 0;</div><div class='add'>+		adapter-&gt;caps.adjfreq	= ptp_82580_adjfreq;</div><div class='add'>+		adapter-&gt;caps.adjtime	= igb_adjtime;</div><div class='add'>+		adapter-&gt;caps.gettime	= igb_gettime;</div><div class='add'>+		adapter-&gt;caps.settime	= igb_settime;</div><div class='add'>+		adapter-&gt;caps.enable	= ptp_82580_enable;</div><div class='add'>+		adapter-&gt;cc.read	= igb_82580_systim_read;</div><div class='add'>+		adapter-&gt;cc.mask	= CLOCKSOURCE_MASK(IGB_NBITS_82580);</div><div class='add'>+		adapter-&gt;cc.mult	= 1;</div><div class='add'>+		adapter-&gt;cc.shift	= 0;</div><div class='add'>+		/* Enable the timer functions by clearing bit 31. */</div><div class='add'>+		wr32(E1000_TSAUXC, 0x0);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case e1000_82576:</div><div class='add'>+		adapter-&gt;caps.owner	= THIS_MODULE;</div><div class='add'>+		strcpy(adapter-&gt;caps.name, "igb-82576");</div><div class='add'>+		adapter-&gt;caps.max_adj	= 1000000000;</div><div class='add'>+		adapter-&gt;caps.n_ext_ts	= 0;</div><div class='add'>+		adapter-&gt;caps.pps	= 0;</div><div class='add'>+		adapter-&gt;caps.adjfreq	= ptp_82576_adjfreq;</div><div class='add'>+		adapter-&gt;caps.adjtime	= igb_adjtime;</div><div class='add'>+		adapter-&gt;caps.gettime	= igb_gettime;</div><div class='add'>+		adapter-&gt;caps.settime	= igb_settime;</div><div class='add'>+		adapter-&gt;caps.enable	= ptp_82576_enable;</div><div class='add'>+		adapter-&gt;cc.read	= igb_82576_systim_read;</div><div class='add'>+		adapter-&gt;cc.mask	= CLOCKSOURCE_MASK(64);</div><div class='add'>+		adapter-&gt;cc.mult	= 1;</div><div class='add'>+		adapter-&gt;cc.shift	= IGB_82576_TSYNC_SHIFT;</div><div class='add'>+		/* Dial the nominal frequency. */</div><div class='add'>+		wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		adapter-&gt;ptp_clock = NULL;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wrfl();</div><div class='add'>+</div><div class='add'>+	timecounter_init(&amp;adapter-&gt;tc, &amp;adapter-&gt;cc,</div><div class='add'>+			 ktime_to_ns(ktime_get_real()));</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;adapter-&gt;overflow_work, igb_overflow_check);</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;adapter-&gt;tmreg_lock);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;adapter-&gt;overflow_work, IGB_OVERFLOW_PERIOD);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;ptp_clock = ptp_clock_register(&amp;adapter-&gt;caps);</div><div class='add'>+	if (IS_ERR(adapter-&gt;ptp_clock)) {</div><div class='add'>+		adapter-&gt;ptp_clock = NULL;</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "ptp_clock_register failed\n");</div><div class='add'>+	} else</div><div class='add'>+		dev_info(&amp;adapter-&gt;pdev-&gt;dev, "added PHC on %s\n",</div><div class='add'>+			 adapter-&gt;netdev-&gt;name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void igb_ptp_remove(struct igb_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	cancel_delayed_work_sync(&amp;adapter-&gt;overflow_work);</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;ptp_clock) {</div><div class='add'>+		ptp_clock_unregister(adapter-&gt;ptp_clock);</div><div class='add'>+		dev_info(&amp;adapter-&gt;pdev-&gt;dev, "removed PHC on %s\n",</div><div class='add'>+			 adapter-&gt;netdev-&gt;name);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * igb_systim_to_hwtstamp - convert system time value to hw timestamp</div><div class='add'>+ * @adapter: board private structure</div><div class='add'>+ * @hwtstamps: timestamp structure to update</div><div class='add'>+ * @systim: unsigned 64bit system time value.</div><div class='add'>+ *</div><div class='add'>+ * We need to convert the system time value stored in the RX/TXSTMP registers</div><div class='add'>+ * into a hwtstamp which can be used by the upper level timestamping functions.</div><div class='add'>+ *</div><div class='add'>+ * The 'tmreg_lock' spinlock is used to protect the consistency of the</div><div class='add'>+ * system time value. This is needed because reading the 64 bit time</div><div class='add'>+ * value involves reading two (or three) 32 bit registers. The first</div><div class='add'>+ * read latches the value. Ditto for writing.</div><div class='add'>+ *</div><div class='add'>+ * In addition, here have extended the system time with an overflow</div><div class='add'>+ * counter in software.</div><div class='add'>+ **/</div><div class='add'>+void igb_systim_to_hwtstamp(struct igb_adapter *adapter,</div><div class='add'>+			    struct skb_shared_hwtstamps *hwtstamps,</div><div class='add'>+			    u64 systim)</div><div class='add'>+{</div><div class='add'>+	u64 ns;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	switch (adapter-&gt;hw.mac.type) {</div><div class='add'>+	case e1000_i210:</div><div class='add'>+	case e1000_i211:</div><div class='add'>+	case e1000_i350:</div><div class='add'>+	case e1000_82580:</div><div class='add'>+	case e1000_82576:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	ns = timecounter_cyc2time(&amp;adapter-&gt;tc, systim);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	memset(hwtstamps, 0, sizeof(*hwtstamps));</div><div class='add'>+	hwtstamps-&gt;hwtstamp = ns_to_ktime(ns);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igbvf/netdev.c b/drivers/net/ethernet/intel/igbvf/netdev.c<br/>index d61ca2a732f0..8ec74b07f940 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igbvf/netdev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/igbvf/netdev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/igbvf/netdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/igbvf/netdev.c</a></div><div class='hunk'>@@ -2731,14 +2731,14 @@ static int __devinit igbvf_probe(struct pci_dev *pdev,</div><div class='ctx'> 			netdev-&gt;addr_len);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!is_valid_ether_addr(netdev-&gt;perm_addr)) {</div><div class='add'>+	if (!is_valid_ether_addr(netdev-&gt;dev_addr)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Invalid MAC Address: %pM\n",</div><div class='ctx'> 		        netdev-&gt;dev_addr);</div><div class='ctx'> 		err = -EIO;</div><div class='ctx'> 		goto err_hw_init;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memcpy(netdev-&gt;perm_addr, adapter-&gt;hw.mac.addr, netdev-&gt;addr_len);</div><div class='add'>+	memcpy(netdev-&gt;perm_addr, netdev-&gt;dev_addr, netdev-&gt;addr_len);</div><div class='ctx'> </div><div class='ctx'> 	setup_timer(&amp;adapter-&gt;watchdog_timer, &amp;igbvf_watchdog,</div><div class='ctx'> 	            (unsigned long) adapter);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/Makefile b/drivers/net/ethernet/intel/ixgbe/Makefile<br/>index 8be1d1b2132e..0bdf06bc5c49 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/Makefile</a></div><div class='hunk'>@@ -34,9 +34,11 @@ obj-$(CONFIG_IXGBE) += ixgbe.o</div><div class='ctx'> </div><div class='ctx'> ixgbe-objs := ixgbe_main.o ixgbe_common.o ixgbe_ethtool.o \</div><div class='ctx'>               ixgbe_82599.o ixgbe_82598.o ixgbe_phy.o ixgbe_sriov.o \</div><div class='del'>-              ixgbe_mbx.o ixgbe_x540.o ixgbe_lib.o</div><div class='add'>+              ixgbe_mbx.o ixgbe_x540.o ixgbe_sysfs.o ixgbe_lib.o</div><div class='ctx'> </div><div class='ctx'> ixgbe-$(CONFIG_IXGBE_DCB) +=  ixgbe_dcb.o ixgbe_dcb_82598.o \</div><div class='ctx'>                               ixgbe_dcb_82599.o ixgbe_dcb_nl.o</div><div class='ctx'> </div><div class='add'>+ixgbe-$(CONFIG_IXGBE_PTP) += ixgbe_ptp.o</div><div class='add'>+</div><div class='ctx'> ixgbe-$(CONFIG_FCOE:m=y) += ixgbe_fcoe.o</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h<br/>index 74e192107f9a..3ef3c5284e52 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe.h</a></div><div class='hunk'>@@ -36,6 +36,12 @@</div><div class='ctx'> #include &lt;linux/aer.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+#include &lt;linux/clocksource.h&gt;</div><div class='add'>+#include &lt;linux/net_tstamp.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+#endif /* CONFIG_IXGBE_PTP */</div><div class='add'>+</div><div class='ctx'> #include "ixgbe_type.h"</div><div class='ctx'> #include "ixgbe_common.h"</div><div class='ctx'> #include "ixgbe_dcb.h"</div><div class='hunk'>@@ -96,6 +102,7 @@</div><div class='ctx'> #define IXGBE_TX_FLAGS_FCOE		(u32)(1 &lt;&lt; 5)</div><div class='ctx'> #define IXGBE_TX_FLAGS_FSO		(u32)(1 &lt;&lt; 6)</div><div class='ctx'> #define IXGBE_TX_FLAGS_TXSW		(u32)(1 &lt;&lt; 7)</div><div class='add'>+#define IXGBE_TX_FLAGS_TSTAMP		(u32)(1 &lt;&lt; 8)</div><div class='ctx'> #define IXGBE_TX_FLAGS_VLAN_MASK	0xffff0000</div><div class='ctx'> #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK	0xe0000000</div><div class='ctx'> #define IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT  29</div><div class='hunk'>@@ -331,6 +338,26 @@ struct ixgbe_q_vector {</div><div class='ctx'> 	/* for dynamic allocation of rings associated with this q_vector */</div><div class='ctx'> 	struct ixgbe_ring ring[0] ____cacheline_internodealigned_in_smp;</div><div class='ctx'> };</div><div class='add'>+#ifdef CONFIG_IXGBE_HWMON</div><div class='add'>+</div><div class='add'>+#define IXGBE_HWMON_TYPE_LOC		0</div><div class='add'>+#define IXGBE_HWMON_TYPE_TEMP		1</div><div class='add'>+#define IXGBE_HWMON_TYPE_CAUTION	2</div><div class='add'>+#define IXGBE_HWMON_TYPE_MAX		3</div><div class='add'>+</div><div class='add'>+struct hwmon_attr {</div><div class='add'>+	struct device_attribute dev_attr;</div><div class='add'>+	struct ixgbe_hw *hw;</div><div class='add'>+	struct ixgbe_thermal_diode_data *sensor;</div><div class='add'>+	char name[12];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hwmon_buff {</div><div class='add'>+	struct device *device;</div><div class='add'>+	struct hwmon_attr *hwmon_list;</div><div class='add'>+	unsigned int n_hwmon;</div><div class='add'>+};</div><div class='add'>+#endif /* CONFIG_IXGBE_HWMON */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * microsecond values for various ITR rates shifted by 2 to fit itr register</div><div class='hunk'>@@ -438,6 +465,8 @@ struct ixgbe_adapter {</div><div class='ctx'> #define IXGBE_FLAG2_FDIR_REQUIRES_REINIT        (u32)(1 &lt;&lt; 7)</div><div class='ctx'> #define IXGBE_FLAG2_RSS_FIELD_IPV4_UDP		(u32)(1 &lt;&lt; 8)</div><div class='ctx'> #define IXGBE_FLAG2_RSS_FIELD_IPV6_UDP		(u32)(1 &lt;&lt; 9)</div><div class='add'>+#define IXGBE_FLAG2_OVERFLOW_CHECK_ENABLED	(u32)(1 &lt;&lt; 10)</div><div class='add'>+#define IXGBE_FLAG2_PTP_PPS_ENABLED		(u32)(1 &lt;&lt; 11)</div><div class='ctx'> </div><div class='ctx'> 	/* Tx fast path data */</div><div class='ctx'> 	int num_tx_queues;</div><div class='hunk'>@@ -525,6 +554,17 @@ struct ixgbe_adapter {</div><div class='ctx'> 	u32 interrupt_event;</div><div class='ctx'> 	u32 led_reg;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	struct ptp_clock *ptp_clock;</div><div class='add'>+	struct ptp_clock_info ptp_caps;</div><div class='add'>+	unsigned long last_overflow_check;</div><div class='add'>+	spinlock_t tmreg_lock;</div><div class='add'>+	struct cyclecounter cc;</div><div class='add'>+	struct timecounter tc;</div><div class='add'>+	u32 base_incval;</div><div class='add'>+	u32 cycle_speed;</div><div class='add'>+#endif /* CONFIG_IXGBE_PTP */</div><div class='add'>+</div><div class='ctx'> 	/* SR-IOV */</div><div class='ctx'> 	DECLARE_BITMAP(active_vfs, IXGBE_MAX_VF_FUNCTIONS);</div><div class='ctx'> 	unsigned int num_vfs;</div><div class='hunk'>@@ -535,6 +575,10 @@ struct ixgbe_adapter {</div><div class='ctx'> </div><div class='ctx'> 	u32 timer_event_accumulator;</div><div class='ctx'> 	u32 vferr_refcount;</div><div class='add'>+	struct kobject *info_kobj;</div><div class='add'>+#ifdef CONFIG_IXGBE_HWMON</div><div class='add'>+	struct hwmon_buff ixgbe_hwmon_buff;</div><div class='add'>+#endif /* CONFIG_IXGBE_HWMON */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ixgbe_fdir_filter {</div><div class='hunk'>@@ -574,9 +618,6 @@ extern struct ixgbe_info ixgbe_82599_info;</div><div class='ctx'> extern struct ixgbe_info ixgbe_X540_info;</div><div class='ctx'> #ifdef CONFIG_IXGBE_DCB</div><div class='ctx'> extern const struct dcbnl_rtnl_ops dcbnl_ops;</div><div class='del'>-extern int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,</div><div class='del'>-                              struct ixgbe_dcb_config *dst_dcb_cfg,</div><div class='del'>-                              int tc_max);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> extern char ixgbe_driver_name[];</div><div class='hunk'>@@ -600,6 +641,8 @@ extern void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,</div><div class='ctx'> 				   struct ixgbe_ring *);</div><div class='ctx'> extern void ixgbe_update_stats(struct ixgbe_adapter *adapter);</div><div class='ctx'> extern int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter);</div><div class='add'>+extern int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,</div><div class='add'>+			       u16 subdevice_id);</div><div class='ctx'> extern void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter);</div><div class='ctx'> extern netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *,</div><div class='ctx'> 					 struct ixgbe_adapter *,</div><div class='hunk'>@@ -629,10 +672,15 @@ extern void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,</div><div class='ctx'> 						 union ixgbe_atr_input *mask);</div><div class='ctx'> extern void ixgbe_set_rx_mode(struct net_device *netdev);</div><div class='ctx'> #ifdef CONFIG_IXGBE_DCB</div><div class='add'>+extern void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter);</div><div class='ctx'> extern int ixgbe_setup_tc(struct net_device *dev, u8 tc);</div><div class='ctx'> #endif</div><div class='ctx'> extern void ixgbe_tx_ctxtdesc(struct ixgbe_ring *, u32, u32, u32, u32);</div><div class='ctx'> extern void ixgbe_do_reset(struct net_device *netdev);</div><div class='add'>+#ifdef CONFIG_IXGBE_HWMON</div><div class='add'>+extern void ixgbe_sysfs_exit(struct ixgbe_adapter *adapter);</div><div class='add'>+extern int ixgbe_sysfs_init(struct ixgbe_adapter *adapter);</div><div class='add'>+#endif /* CONFIG_IXGBE_HWMON */</div><div class='ctx'> #ifdef IXGBE_FCOE</div><div class='ctx'> extern void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter);</div><div class='ctx'> extern int ixgbe_fso(struct ixgbe_ring *tx_ring,</div><div class='hunk'>@@ -663,4 +711,18 @@ static inline struct netdev_queue *txring_txq(const struct ixgbe_ring *ring)</div><div class='ctx'> 	return netdev_get_tx_queue(ring-&gt;netdev, ring-&gt;queue_index);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+extern void ixgbe_ptp_init(struct ixgbe_adapter *adapter);</div><div class='add'>+extern void ixgbe_ptp_stop(struct ixgbe_adapter *adapter);</div><div class='add'>+extern void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter);</div><div class='add'>+extern void ixgbe_ptp_tx_hwtstamp(struct ixgbe_q_vector *q_vector,</div><div class='add'>+				  struct sk_buff *skb);</div><div class='add'>+extern void ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector,</div><div class='add'>+				  struct sk_buff *skb);</div><div class='add'>+extern int ixgbe_ptp_hwtstamp_ioctl(struct ixgbe_adapter *adapter,</div><div class='add'>+				    struct ifreq *ifr, int cmd);</div><div class='add'>+extern void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter);</div><div class='add'>+extern void ixgbe_ptp_check_pps_event(struct ixgbe_adapter *adapter, u32 eicr);</div><div class='add'>+#endif /* CONFIG_IXGBE_PTP */</div><div class='add'>+</div><div class='ctx'> #endif /* _IXGBE_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c<br/>index 85d2e2c4ce4a..42537336110c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c</a></div><div class='hunk'>@@ -91,29 +91,6 @@ out:</div><div class='ctx'> 	IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- *  ixgbe_get_pcie_msix_count_82598 - Gets MSI-X vector count</div><div class='del'>- *  @hw: pointer to hardware structure</div><div class='del'>- *</div><div class='del'>- *  Read PCIe configuration space, and get the MSI-X vector count from</div><div class='del'>- *  the capabilities table.</div><div class='del'>- **/</div><div class='del'>-static u16 ixgbe_get_pcie_msix_count_82598(struct ixgbe_hw *hw)</div><div class='del'>-{</div><div class='del'>-	struct ixgbe_adapter *adapter = hw-&gt;back;</div><div class='del'>-	u16 msix_count;</div><div class='del'>-	pci_read_config_word(adapter-&gt;pdev, IXGBE_PCIE_MSIX_82598_CAPS,</div><div class='del'>-	                     &amp;msix_count);</div><div class='del'>-	msix_count &amp;= IXGBE_PCIE_MSIX_TBL_SZ_MASK;</div><div class='del'>-</div><div class='del'>-	/* MSI-X count is zero-based in HW, so increment to give proper value */</div><div class='del'>-	msix_count++;</div><div class='del'>-</div><div class='del'>-	return msix_count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- */</div><div class='ctx'> static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_mac_info *mac = &amp;hw-&gt;mac;</div><div class='hunk'>@@ -126,7 +103,7 @@ static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)</div><div class='ctx'> 	mac-&gt;num_rar_entries = IXGBE_82598_RAR_ENTRIES;</div><div class='ctx'> 	mac-&gt;max_rx_queues = IXGBE_82598_MAX_RX_QUEUES;</div><div class='ctx'> 	mac-&gt;max_tx_queues = IXGBE_82598_MAX_TX_QUEUES;</div><div class='del'>-	mac-&gt;max_msix_vectors = ixgbe_get_pcie_msix_count_82598(hw);</div><div class='add'>+	mac-&gt;max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -347,24 +324,33 @@ out:</div><div class='ctx'> /**</div><div class='ctx'>  *  ixgbe_fc_enable_82598 - Enable flow control</div><div class='ctx'>  *  @hw: pointer to hardware structure</div><div class='del'>- *  @packetbuf_num: packet buffer number (0-7)</div><div class='ctx'>  *</div><div class='ctx'>  *  Enable flow control according to the current settings.</div><div class='ctx'>  **/</div><div class='del'>-static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw, s32 packetbuf_num)</div><div class='add'>+static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	s32 ret_val = 0;</div><div class='ctx'> 	u32 fctrl_reg;</div><div class='ctx'> 	u32 rmcs_reg;</div><div class='ctx'> 	u32 reg;</div><div class='add'>+	u32 fcrtl, fcrth;</div><div class='ctx'> 	u32 link_speed = 0;</div><div class='add'>+	int i;</div><div class='ctx'> 	bool link_up;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	if (hw-&gt;fc.requested_mode == ixgbe_fc_pfc)</div><div class='add'>+	/*</div><div class='add'>+	 * Validate the water mark configuration for packet buffer 0.  Zero</div><div class='add'>+	 * water marks indicate that the packet buffer was not configured</div><div class='add'>+	 * and the watermarks for packet buffer 0 should always be configured.</div><div class='add'>+	 */</div><div class='add'>+	if (!hw-&gt;fc.low_water ||</div><div class='add'>+	    !hw-&gt;fc.high_water[0] ||</div><div class='add'>+	    !hw-&gt;fc.pause_time) {</div><div class='add'>+		hw_dbg(hw, "Invalid water mark configuration\n");</div><div class='add'>+		ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_DCB */</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * On 82598 having Rx FC on causes resets while doing 1G</div><div class='ctx'> 	 * so if it's on turn it off once we know link_speed. For</div><div class='hunk'>@@ -386,9 +372,7 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw, s32 packetbuf_num)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Negotiate the fc mode to use */</div><div class='del'>-	ret_val = ixgbe_fc_autoneg(hw);</div><div class='del'>-	if (ret_val == IXGBE_ERR_FLOW_CONTROL)</div><div class='del'>-		goto out;</div><div class='add'>+	ixgbe_fc_autoneg(hw);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable any previous flow control settings */</div><div class='ctx'> 	fctrl_reg = IXGBE_READ_REG(hw, IXGBE_FCTRL);</div><div class='hunk'>@@ -405,9 +389,6 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw, s32 packetbuf_num)</div><div class='ctx'> 	 * 2: Tx flow control is enabled (we can send pause frames but</div><div class='ctx'> 	 *     we do not support receiving pause frames).</div><div class='ctx'> 	 * 3: Both Rx and Tx flow control (symmetric) are enabled.</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	 * 4: Priority Flow Control is enabled.</div><div class='del'>-#endif</div><div class='ctx'> 	 * other: Invalid.</div><div class='ctx'> 	 */</div><div class='ctx'> 	switch (hw-&gt;fc.current_mode) {</div><div class='hunk'>@@ -440,11 +421,6 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw, s32 packetbuf_num)</div><div class='ctx'> 		fctrl_reg |= IXGBE_FCTRL_RFCE;</div><div class='ctx'> 		rmcs_reg |= IXGBE_RMCS_TFCE_802_3X;</div><div class='ctx'> 		break;</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	case ixgbe_fc_pfc:</div><div class='del'>-		goto out;</div><div class='del'>-		break;</div><div class='del'>-#endif /* CONFIG_DCB */</div><div class='ctx'> 	default:</div><div class='ctx'> 		hw_dbg(hw, "Flow control param set incorrectly\n");</div><div class='ctx'> 		ret_val = IXGBE_ERR_CONFIG;</div><div class='hunk'>@@ -457,29 +433,29 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw, s32 packetbuf_num)</div><div class='ctx'> 	IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg);</div><div class='ctx'> 	IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg);</div><div class='ctx'> </div><div class='del'>-	/* Set up and enable Rx high/low water mark thresholds, enable XON. */</div><div class='del'>-	if (hw-&gt;fc.current_mode &amp; ixgbe_fc_tx_pause) {</div><div class='del'>-		reg = hw-&gt;fc.low_water &lt;&lt; 6;</div><div class='del'>-		if (hw-&gt;fc.send_xon)</div><div class='del'>-			reg |= IXGBE_FCRTL_XONE;</div><div class='del'>-</div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_FCRTL(packetbuf_num), reg);</div><div class='add'>+	fcrtl = (hw-&gt;fc.low_water &lt;&lt; 10) | IXGBE_FCRTL_XONE;</div><div class='ctx'> </div><div class='del'>-		reg = hw-&gt;fc.high_water[packetbuf_num] &lt;&lt; 6;</div><div class='del'>-		reg |= IXGBE_FCRTH_FCEN;</div><div class='add'>+	/* Set up and enable Rx high/low water mark thresholds, enable XON. */</div><div class='add'>+	for (i = 0; i &lt; MAX_TRAFFIC_CLASS; i++) {</div><div class='add'>+		if ((hw-&gt;fc.current_mode &amp; ixgbe_fc_tx_pause) &amp;&amp;</div><div class='add'>+		    hw-&gt;fc.high_water[i]) {</div><div class='add'>+			fcrth = (hw-&gt;fc.high_water[i] &lt;&lt; 10) | IXGBE_FCRTH_FCEN;</div><div class='add'>+			IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), fcrtl);</div><div class='add'>+			IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), fcrth);</div><div class='add'>+		} else {</div><div class='add'>+			IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0);</div><div class='add'>+			IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_FCRTH(packetbuf_num), reg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Configure pause time (2 TCs per register) */</div><div class='del'>-	reg = IXGBE_READ_REG(hw, IXGBE_FCTTV(packetbuf_num / 2));</div><div class='del'>-	if ((packetbuf_num &amp; 1) == 0)</div><div class='del'>-		reg = (reg &amp; 0xFFFF0000) | hw-&gt;fc.pause_time;</div><div class='del'>-	else</div><div class='del'>-		reg = (reg &amp; 0x0000FFFF) | (hw-&gt;fc.pause_time &lt;&lt; 16);</div><div class='del'>-	IXGBE_WRITE_REG(hw, IXGBE_FCTTV(packetbuf_num / 2), reg);</div><div class='add'>+	reg = hw-&gt;fc.pause_time * 0x00010001;</div><div class='add'>+	for (i = 0; i &lt; (MAX_TRAFFIC_CLASS / 2); i++)</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);</div><div class='ctx'> </div><div class='del'>-	IXGBE_WRITE_REG(hw, IXGBE_FCRTV, (hw-&gt;fc.pause_time &gt;&gt; 1));</div><div class='add'>+	/* Configure flow control refresh threshold value */</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw-&gt;fc.pause_time / 2);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return ret_val;</div><div class='hunk'>@@ -1300,6 +1276,8 @@ static struct ixgbe_mac_operations mac_ops_82598 = {</div><div class='ctx'> 	.set_fw_drv_ver         = NULL,</div><div class='ctx'> 	.acquire_swfw_sync      = &amp;ixgbe_acquire_swfw_sync,</div><div class='ctx'> 	.release_swfw_sync      = &amp;ixgbe_release_swfw_sync,</div><div class='add'>+	.get_thermal_sensor_data = NULL,</div><div class='add'>+	.init_thermal_sensor_thresh = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct ixgbe_eeprom_operations eeprom_ops_82598 = {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c<br/>index 9c14685358eb..dee64d2703f0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c</a></div><div class='hunk'>@@ -2119,6 +2119,8 @@ static struct ixgbe_mac_operations mac_ops_82599 = {</div><div class='ctx'> 	.set_vlan_anti_spoofing = &amp;ixgbe_set_vlan_anti_spoofing,</div><div class='ctx'> 	.acquire_swfw_sync      = &amp;ixgbe_acquire_swfw_sync,</div><div class='ctx'> 	.release_swfw_sync      = &amp;ixgbe_release_swfw_sync,</div><div class='add'>+	.get_thermal_sensor_data = &amp;ixgbe_get_thermal_sensor_data_generic,</div><div class='add'>+	.init_thermal_sensor_thresh = &amp;ixgbe_init_thermal_sensor_thresh_generic,</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c<br/>index 49aa41fe7b84..77ac41feb0fe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.c</a></div><div class='hunk'>@@ -47,13 +47,6 @@ static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);</div><div class='ctx'> static void ixgbe_release_eeprom(struct ixgbe_hw *hw);</div><div class='ctx'> </div><div class='ctx'> static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr);</div><div class='del'>-static s32 ixgbe_fc_autoneg_fiber(struct ixgbe_hw *hw);</div><div class='del'>-static s32 ixgbe_fc_autoneg_backplane(struct ixgbe_hw *hw);</div><div class='del'>-static s32 ixgbe_fc_autoneg_copper(struct ixgbe_hw *hw);</div><div class='del'>-static s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);</div><div class='del'>-static s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,</div><div class='del'>-			      u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm);</div><div class='del'>-static s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num);</div><div class='ctx'> static s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);</div><div class='ctx'> static s32 ixgbe_read_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset,</div><div class='ctx'> 					     u16 words, u16 *data);</div><div class='hunk'>@@ -64,6 +57,172 @@ static s32 ixgbe_detect_eeprom_page_size_generic(struct ixgbe_hw *hw,</div><div class='ctx'> static s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ *  ixgbe_device_supports_autoneg_fc - Check if phy supports autoneg flow</div><div class='add'>+ *  control</div><div class='add'>+ *  @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ *  There are several phys that do not support autoneg flow control. This</div><div class='add'>+ *  function check the device id to see if the associated phy supports</div><div class='add'>+ *  autoneg flow control.</div><div class='add'>+ **/</div><div class='add'>+static s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	switch (hw-&gt;device_id) {</div><div class='add'>+	case IXGBE_DEV_ID_X540T:</div><div class='add'>+		return 0;</div><div class='add'>+	case IXGBE_DEV_ID_82599_T3_LOM:</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return IXGBE_ERR_FC_NOT_SUPPORTED;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  ixgbe_setup_fc - Set up flow control</div><div class='add'>+ *  @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ *  Called at init time to set up flow control.</div><div class='add'>+ **/</div><div class='add'>+static s32 ixgbe_setup_fc(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	s32 ret_val = 0;</div><div class='add'>+	u32 reg = 0, reg_bp = 0;</div><div class='add'>+	u16 reg_cu = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Validate the requested mode.  Strict IEEE mode does not allow</div><div class='add'>+	 * ixgbe_fc_rx_pause because it will cause us to fail at UNH.</div><div class='add'>+	 */</div><div class='add'>+	if (hw-&gt;fc.strict_ieee &amp;&amp; hw-&gt;fc.requested_mode == ixgbe_fc_rx_pause) {</div><div class='add'>+		hw_dbg(hw, "ixgbe_fc_rx_pause not valid in strict IEEE mode\n");</div><div class='add'>+		ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 10gig parts do not have a word in the EEPROM to determine the</div><div class='add'>+	 * default flow control setting, so we explicitly set it to full.</div><div class='add'>+	 */</div><div class='add'>+	if (hw-&gt;fc.requested_mode == ixgbe_fc_default)</div><div class='add'>+		hw-&gt;fc.requested_mode = ixgbe_fc_full;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set up the 1G and 10G flow control advertisement registers so the</div><div class='add'>+	 * HW will be able to do fc autoneg once the cable is plugged in.  If</div><div class='add'>+	 * we link at 10G, the 1G advertisement is harmless and vice versa.</div><div class='add'>+	 */</div><div class='add'>+	switch (hw-&gt;phy.media_type) {</div><div class='add'>+	case ixgbe_media_type_fiber:</div><div class='add'>+	case ixgbe_media_type_backplane:</div><div class='add'>+		reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);</div><div class='add'>+		reg_bp = IXGBE_READ_REG(hw, IXGBE_AUTOC);</div><div class='add'>+		break;</div><div class='add'>+	case ixgbe_media_type_copper:</div><div class='add'>+		hw-&gt;phy.ops.read_reg(hw, MDIO_AN_ADVERTISE,</div><div class='add'>+					MDIO_MMD_AN, &amp;reg_cu);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The possible values of fc.requested_mode are:</div><div class='add'>+	 * 0: Flow control is completely disabled</div><div class='add'>+	 * 1: Rx flow control is enabled (we can receive pause frames,</div><div class='add'>+	 *    but not send pause frames).</div><div class='add'>+	 * 2: Tx flow control is enabled (we can send pause frames but</div><div class='add'>+	 *    we do not support receiving pause frames).</div><div class='add'>+	 * 3: Both Rx and Tx flow control (symmetric) are enabled.</div><div class='add'>+	 * other: Invalid.</div><div class='add'>+	 */</div><div class='add'>+	switch (hw-&gt;fc.requested_mode) {</div><div class='add'>+	case ixgbe_fc_none:</div><div class='add'>+		/* Flow control completely disabled by software override. */</div><div class='add'>+		reg &amp;= ~(IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);</div><div class='add'>+		if (hw-&gt;phy.media_type == ixgbe_media_type_backplane)</div><div class='add'>+			reg_bp &amp;= ~(IXGBE_AUTOC_SYM_PAUSE |</div><div class='add'>+				    IXGBE_AUTOC_ASM_PAUSE);</div><div class='add'>+		else if (hw-&gt;phy.media_type == ixgbe_media_type_copper)</div><div class='add'>+			reg_cu &amp;= ~(IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE);</div><div class='add'>+		break;</div><div class='add'>+	case ixgbe_fc_tx_pause:</div><div class='add'>+		/*</div><div class='add'>+		 * Tx Flow control is enabled, and Rx Flow control is</div><div class='add'>+		 * disabled by software override.</div><div class='add'>+		 */</div><div class='add'>+		reg |= IXGBE_PCS1GANA_ASM_PAUSE;</div><div class='add'>+		reg &amp;= ~IXGBE_PCS1GANA_SYM_PAUSE;</div><div class='add'>+		if (hw-&gt;phy.media_type == ixgbe_media_type_backplane) {</div><div class='add'>+			reg_bp |= IXGBE_AUTOC_ASM_PAUSE;</div><div class='add'>+			reg_bp &amp;= ~IXGBE_AUTOC_SYM_PAUSE;</div><div class='add'>+		} else if (hw-&gt;phy.media_type == ixgbe_media_type_copper) {</div><div class='add'>+			reg_cu |= IXGBE_TAF_ASM_PAUSE;</div><div class='add'>+			reg_cu &amp;= ~IXGBE_TAF_SYM_PAUSE;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case ixgbe_fc_rx_pause:</div><div class='add'>+		/*</div><div class='add'>+		 * Rx Flow control is enabled and Tx Flow control is</div><div class='add'>+		 * disabled by software override. Since there really</div><div class='add'>+		 * isn't a way to advertise that we are capable of RX</div><div class='add'>+		 * Pause ONLY, we will advertise that we support both</div><div class='add'>+		 * symmetric and asymmetric Rx PAUSE, as such we fall</div><div class='add'>+		 * through to the fc_full statement.  Later, we will</div><div class='add'>+		 * disable the adapter's ability to send PAUSE frames.</div><div class='add'>+		 */</div><div class='add'>+	case ixgbe_fc_full:</div><div class='add'>+		/* Flow control (both Rx and Tx) is enabled by SW override. */</div><div class='add'>+		reg |= IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE;</div><div class='add'>+		if (hw-&gt;phy.media_type == ixgbe_media_type_backplane)</div><div class='add'>+			reg_bp |= IXGBE_AUTOC_SYM_PAUSE |</div><div class='add'>+				  IXGBE_AUTOC_ASM_PAUSE;</div><div class='add'>+		else if (hw-&gt;phy.media_type == ixgbe_media_type_copper)</div><div class='add'>+			reg_cu |= IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		hw_dbg(hw, "Flow control param set incorrectly\n");</div><div class='add'>+		ret_val = IXGBE_ERR_CONFIG;</div><div class='add'>+		goto out;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type != ixgbe_mac_X540) {</div><div class='add'>+		/*</div><div class='add'>+		 * Enable auto-negotiation between the MAC &amp; PHY;</div><div class='add'>+		 * the MAC will advertise clause 37 flow control.</div><div class='add'>+		 */</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_PCS1GANA, reg);</div><div class='add'>+		reg = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);</div><div class='add'>+</div><div class='add'>+		/* Disable AN timeout */</div><div class='add'>+		if (hw-&gt;fc.strict_ieee)</div><div class='add'>+			reg &amp;= ~IXGBE_PCS1GLCTL_AN_1G_TIMEOUT_EN;</div><div class='add'>+</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_PCS1GLCTL, reg);</div><div class='add'>+		hw_dbg(hw, "Set up FC; PCS1GLCTL = 0x%08X\n", reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * AUTOC restart handles negotiation of 1G and 10G on backplane</div><div class='add'>+	 * and copper. There is no need to set the PCS1GCTL register.</div><div class='add'>+	 *</div><div class='add'>+	 */</div><div class='add'>+	if (hw-&gt;phy.media_type == ixgbe_media_type_backplane) {</div><div class='add'>+		reg_bp |= IXGBE_AUTOC_AN_RESTART;</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_bp);</div><div class='add'>+	} else if ((hw-&gt;phy.media_type == ixgbe_media_type_copper) &amp;&amp;</div><div class='add'>+		    (ixgbe_device_supports_autoneg_fc(hw) == 0)) {</div><div class='add'>+		hw-&gt;phy.ops.write_reg(hw, MDIO_AN_ADVERTISE,</div><div class='add'>+				      MDIO_MMD_AN, reg_cu);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_dbg(hw, "Set up FC; IXGBE_AUTOC = 0x%08X\n", reg);</div><div class='add'>+out:</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  *  ixgbe_start_hw_generic - Prepare hardware for Tx/Rx</div><div class='ctx'>  *  @hw: pointer to hardware structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -95,7 +254,7 @@ s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw)</div><div class='ctx'> 	IXGBE_WRITE_FLUSH(hw);</div><div class='ctx'> </div><div class='ctx'> 	/* Setup flow control */</div><div class='del'>-	ixgbe_setup_fc(hw, 0);</div><div class='add'>+	ixgbe_setup_fc(hw);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear adapter stopped flag */</div><div class='ctx'> 	hw-&gt;adapter_stopped = false;</div><div class='hunk'>@@ -1923,30 +2082,36 @@ s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw)</div><div class='ctx'> /**</div><div class='ctx'>  *  ixgbe_fc_enable_generic - Enable flow control</div><div class='ctx'>  *  @hw: pointer to hardware structure</div><div class='del'>- *  @packetbuf_num: packet buffer number (0-7)</div><div class='ctx'>  *</div><div class='ctx'>  *  Enable flow control according to the current settings.</div><div class='ctx'>  **/</div><div class='del'>-s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw, s32 packetbuf_num)</div><div class='add'>+s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	s32 ret_val = 0;</div><div class='ctx'> 	u32 mflcn_reg, fccfg_reg;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> 	u32 fcrtl, fcrth;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	if (hw-&gt;fc.requested_mode == ixgbe_fc_pfc)</div><div class='add'>+	/*</div><div class='add'>+	 * Validate the water mark configuration for packet buffer 0.  Zero</div><div class='add'>+	 * water marks indicate that the packet buffer was not configured</div><div class='add'>+	 * and the watermarks for packet buffer 0 should always be configured.</div><div class='add'>+	 */</div><div class='add'>+	if (!hw-&gt;fc.low_water ||</div><div class='add'>+	    !hw-&gt;fc.high_water[0] ||</div><div class='add'>+	    !hw-&gt;fc.pause_time) {</div><div class='add'>+		hw_dbg(hw, "Invalid water mark configuration\n");</div><div class='add'>+		ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_DCB */</div><div class='ctx'> 	/* Negotiate the fc mode to use */</div><div class='del'>-	ret_val = ixgbe_fc_autoneg(hw);</div><div class='del'>-	if (ret_val == IXGBE_ERR_FLOW_CONTROL)</div><div class='del'>-		goto out;</div><div class='add'>+	ixgbe_fc_autoneg(hw);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable any previous flow control settings */</div><div class='ctx'> 	mflcn_reg = IXGBE_READ_REG(hw, IXGBE_MFLCN);</div><div class='del'>-	mflcn_reg &amp;= ~(IXGBE_MFLCN_RFCE | IXGBE_MFLCN_RPFCE);</div><div class='add'>+	mflcn_reg &amp;= ~(IXGBE_MFLCN_RPFCE_MASK | IXGBE_MFLCN_RFCE);</div><div class='ctx'> </div><div class='ctx'> 	fccfg_reg = IXGBE_READ_REG(hw, IXGBE_FCCFG);</div><div class='ctx'> 	fccfg_reg &amp;= ~(IXGBE_FCCFG_TFCE_802_3X | IXGBE_FCCFG_TFCE_PRIORITY);</div><div class='hunk'>@@ -1959,9 +2124,6 @@ s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw, s32 packetbuf_num)</div><div class='ctx'> 	 * 2: Tx flow control is enabled (we can send pause frames but</div><div class='ctx'> 	 *    we do not support receiving pause frames).</div><div class='ctx'> 	 * 3: Both Rx and Tx flow control (symmetric) are enabled.</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	 * 4: Priority Flow Control is enabled.</div><div class='del'>-#endif</div><div class='ctx'> 	 * other: Invalid.</div><div class='ctx'> 	 */</div><div class='ctx'> 	switch (hw-&gt;fc.current_mode) {</div><div class='hunk'>@@ -1994,11 +2156,6 @@ s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw, s32 packetbuf_num)</div><div class='ctx'> 		mflcn_reg |= IXGBE_MFLCN_RFCE;</div><div class='ctx'> 		fccfg_reg |= IXGBE_FCCFG_TFCE_802_3X;</div><div class='ctx'> 		break;</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	case ixgbe_fc_pfc:</div><div class='del'>-		goto out;</div><div class='del'>-		break;</div><div class='del'>-#endif /* CONFIG_DCB */</div><div class='ctx'> 	default:</div><div class='ctx'> 		hw_dbg(hw, "Flow control param set incorrectly\n");</div><div class='ctx'> 		ret_val = IXGBE_ERR_CONFIG;</div><div class='hunk'>@@ -2011,100 +2168,86 @@ s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw, s32 packetbuf_num)</div><div class='ctx'> 	IXGBE_WRITE_REG(hw, IXGBE_MFLCN, mflcn_reg);</div><div class='ctx'> 	IXGBE_WRITE_REG(hw, IXGBE_FCCFG, fccfg_reg);</div><div class='ctx'> </div><div class='del'>-	fcrtl = hw-&gt;fc.low_water &lt;&lt; 10;</div><div class='add'>+	fcrtl = (hw-&gt;fc.low_water &lt;&lt; 10) | IXGBE_FCRTL_XONE;</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;fc.current_mode &amp; ixgbe_fc_tx_pause) {</div><div class='del'>-		fcrth = hw-&gt;fc.high_water[packetbuf_num] &lt;&lt; 10;</div><div class='del'>-		fcrth |= IXGBE_FCRTH_FCEN;</div><div class='del'>-		if (hw-&gt;fc.send_xon)</div><div class='del'>-			fcrtl |= IXGBE_FCRTL_XONE;</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * If Tx flow control is disabled, set our high water mark</div><div class='del'>-		 * to Rx FIFO size minus 32 in order prevent Tx switch</div><div class='del'>-		 * loopback from stalling on DMA.</div><div class='del'>-		 */</div><div class='del'>-		fcrth = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(packetbuf_num)) - 32;</div><div class='del'>-	}</div><div class='add'>+	/* Set up and enable Rx high/low water mark thresholds, enable XON. */</div><div class='add'>+	for (i = 0; i &lt; MAX_TRAFFIC_CLASS; i++) {</div><div class='add'>+		if ((hw-&gt;fc.current_mode &amp; ixgbe_fc_tx_pause) &amp;&amp;</div><div class='add'>+		    hw-&gt;fc.high_water[i]) {</div><div class='add'>+			IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), fcrtl);</div><div class='add'>+			fcrth = (hw-&gt;fc.high_water[i] &lt;&lt; 10) | IXGBE_FCRTH_FCEN;</div><div class='add'>+		} else {</div><div class='add'>+			IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0);</div><div class='add'>+			/*</div><div class='add'>+			 * In order to prevent Tx hangs when the internal Tx</div><div class='add'>+			 * switch is enabled we must set the high water mark</div><div class='add'>+			 * to the maximum FCRTH value.  This allows the Tx</div><div class='add'>+			 * switch to function even under heavy Rx workloads.</div><div class='add'>+			 */</div><div class='add'>+			fcrth = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 32;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(packetbuf_num), fcrth);</div><div class='del'>-	IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(packetbuf_num), fcrtl);</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), fcrth);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Configure pause time (2 TCs per register) */</div><div class='del'>-	reg = IXGBE_READ_REG(hw, IXGBE_FCTTV(packetbuf_num / 2));</div><div class='del'>-	if ((packetbuf_num &amp; 1) == 0)</div><div class='del'>-		reg = (reg &amp; 0xFFFF0000) | hw-&gt;fc.pause_time;</div><div class='del'>-	else</div><div class='del'>-		reg = (reg &amp; 0x0000FFFF) | (hw-&gt;fc.pause_time &lt;&lt; 16);</div><div class='del'>-	IXGBE_WRITE_REG(hw, IXGBE_FCTTV(packetbuf_num / 2), reg);</div><div class='add'>+	reg = hw-&gt;fc.pause_time * 0x00010001;</div><div class='add'>+	for (i = 0; i &lt; (MAX_TRAFFIC_CLASS / 2); i++)</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);</div><div class='ctx'> </div><div class='del'>-	IXGBE_WRITE_REG(hw, IXGBE_FCRTV, (hw-&gt;fc.pause_time &gt;&gt; 1));</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw-&gt;fc.pause_time / 2);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return ret_val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- *  ixgbe_fc_autoneg - Configure flow control</div><div class='add'>+ *  ixgbe_negotiate_fc - Negotiate flow control</div><div class='ctx'>  *  @hw: pointer to hardware structure</div><div class='add'>+ *  @adv_reg: flow control advertised settings</div><div class='add'>+ *  @lp_reg: link partner's flow control settings</div><div class='add'>+ *  @adv_sym: symmetric pause bit in advertisement</div><div class='add'>+ *  @adv_asm: asymmetric pause bit in advertisement</div><div class='add'>+ *  @lp_sym: symmetric pause bit in link partner advertisement</div><div class='add'>+ *  @lp_asm: asymmetric pause bit in link partner advertisement</div><div class='ctx'>  *</div><div class='del'>- *  Compares our advertised flow control capabilities to those advertised by</div><div class='del'>- *  our link partner, and determines the proper flow control mode to use.</div><div class='add'>+ *  Find the intersection between advertised settings and link partner's</div><div class='add'>+ *  advertised settings</div><div class='ctx'>  **/</div><div class='del'>-s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw)</div><div class='add'>+static s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,</div><div class='add'>+			      u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm)</div><div class='ctx'> {</div><div class='del'>-	s32 ret_val = IXGBE_ERR_FC_NOT_NEGOTIATED;</div><div class='del'>-	ixgbe_link_speed speed;</div><div class='del'>-	bool link_up;</div><div class='del'>-</div><div class='del'>-	if (hw-&gt;fc.disable_fc_autoneg)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * AN should have completed when the cable was plugged in.</div><div class='del'>-	 * Look for reasons to bail out.  Bail out if:</div><div class='del'>-	 * - FC autoneg is disabled, or if</div><div class='del'>-	 * - link is not up.</div><div class='del'>-	 *</div><div class='del'>-	 * Since we're being called from an LSC, link is already known to be up.</div><div class='del'>-	 * So use link_up_wait_to_complete=false.</div><div class='del'>-	 */</div><div class='del'>-	hw-&gt;mac.ops.check_link(hw, &amp;speed, &amp;link_up, false);</div><div class='del'>-	if (!link_up) {</div><div class='del'>-		ret_val = IXGBE_ERR_FLOW_CONTROL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (hw-&gt;phy.media_type) {</div><div class='del'>-	/* Autoneg flow control on fiber adapters */</div><div class='del'>-	case ixgbe_media_type_fiber:</div><div class='del'>-		if (speed == IXGBE_LINK_SPEED_1GB_FULL)</div><div class='del'>-			ret_val = ixgbe_fc_autoneg_fiber(hw);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* Autoneg flow control on backplane adapters */</div><div class='del'>-	case ixgbe_media_type_backplane:</div><div class='del'>-		ret_val = ixgbe_fc_autoneg_backplane(hw);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* Autoneg flow control on copper adapters */</div><div class='del'>-	case ixgbe_media_type_copper:</div><div class='del'>-		if (ixgbe_device_supports_autoneg_fc(hw) == 0)</div><div class='del'>-			ret_val = ixgbe_fc_autoneg_copper(hw);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	if ((!(adv_reg)) ||  (!(lp_reg)))</div><div class='add'>+		return IXGBE_ERR_FC_NOT_NEGOTIATED;</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	if (ret_val == 0) {</div><div class='del'>-		hw-&gt;fc.fc_was_autonegged = true;</div><div class='add'>+	if ((adv_reg &amp; adv_sym) &amp;&amp; (lp_reg &amp; lp_sym)) {</div><div class='add'>+		/*</div><div class='add'>+		 * Now we need to check if the user selected Rx ONLY</div><div class='add'>+		 * of pause frames.  In this case, we had to advertise</div><div class='add'>+		 * FULL flow control because we could not advertise RX</div><div class='add'>+		 * ONLY. Hence, we must now check to see if we need to</div><div class='add'>+		 * turn OFF the TRANSMISSION of PAUSE frames.</div><div class='add'>+		 */</div><div class='add'>+		if (hw-&gt;fc.requested_mode == ixgbe_fc_full) {</div><div class='add'>+			hw-&gt;fc.current_mode = ixgbe_fc_full;</div><div class='add'>+			hw_dbg(hw, "Flow Control = FULL.\n");</div><div class='add'>+		} else {</div><div class='add'>+			hw-&gt;fc.current_mode = ixgbe_fc_rx_pause;</div><div class='add'>+			hw_dbg(hw, "Flow Control=RX PAUSE frames only\n");</div><div class='add'>+		}</div><div class='add'>+	} else if (!(adv_reg &amp; adv_sym) &amp;&amp; (adv_reg &amp; adv_asm) &amp;&amp;</div><div class='add'>+		   (lp_reg &amp; lp_sym) &amp;&amp; (lp_reg &amp; lp_asm)) {</div><div class='add'>+		hw-&gt;fc.current_mode = ixgbe_fc_tx_pause;</div><div class='add'>+		hw_dbg(hw, "Flow Control = TX PAUSE frames only.\n");</div><div class='add'>+	} else if ((adv_reg &amp; adv_sym) &amp;&amp; (adv_reg &amp; adv_asm) &amp;&amp;</div><div class='add'>+		   !(lp_reg &amp; lp_sym) &amp;&amp; (lp_reg &amp; lp_asm)) {</div><div class='add'>+		hw-&gt;fc.current_mode = ixgbe_fc_rx_pause;</div><div class='add'>+		hw_dbg(hw, "Flow Control = RX PAUSE frames only.\n");</div><div class='ctx'> 	} else {</div><div class='del'>-		hw-&gt;fc.fc_was_autonegged = false;</div><div class='del'>-		hw-&gt;fc.current_mode = hw-&gt;fc.requested_mode;</div><div class='add'>+		hw-&gt;fc.current_mode = ixgbe_fc_none;</div><div class='add'>+		hw_dbg(hw, "Flow Control = NONE.\n");</div><div class='ctx'> 	}</div><div class='del'>-	return ret_val;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2116,7 +2259,7 @@ out:</div><div class='ctx'> static s32 ixgbe_fc_autoneg_fiber(struct ixgbe_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	u32 pcs_anadv_reg, pcs_lpab_reg, linkstat;</div><div class='del'>-	s32 ret_val;</div><div class='add'>+	s32 ret_val = IXGBE_ERR_FC_NOT_NEGOTIATED;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * On multispeed fiber at 1g, bail out if</div><div class='hunk'>@@ -2126,10 +2269,8 @@ static s32 ixgbe_fc_autoneg_fiber(struct ixgbe_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	linkstat = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);</div><div class='ctx'> 	if ((!!(linkstat &amp; IXGBE_PCS1GLSTA_AN_COMPLETE) == 0) ||</div><div class='del'>-	    (!!(linkstat &amp; IXGBE_PCS1GLSTA_AN_TIMED_OUT) == 1)) {</div><div class='del'>-		ret_val = IXGBE_ERR_FC_NOT_NEGOTIATED;</div><div class='add'>+	    (!!(linkstat &amp; IXGBE_PCS1GLSTA_AN_TIMED_OUT) == 1))</div><div class='ctx'> 		goto out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	pcs_anadv_reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);</div><div class='ctx'> 	pcs_lpab_reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);</div><div class='hunk'>@@ -2153,7 +2294,7 @@ out:</div><div class='ctx'> static s32 ixgbe_fc_autoneg_backplane(struct ixgbe_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	u32 links2, anlp1_reg, autoc_reg, links;</div><div class='del'>-	s32 ret_val;</div><div class='add'>+	s32 ret_val = IXGBE_ERR_FC_NOT_NEGOTIATED;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * On backplane, bail out if</div><div class='hunk'>@@ -2161,21 +2302,13 @@ static s32 ixgbe_fc_autoneg_backplane(struct ixgbe_hw *hw)</div><div class='ctx'> 	 * - we are 82599 and link partner is not AN enabled</div><div class='ctx'> 	 */</div><div class='ctx'> 	links = IXGBE_READ_REG(hw, IXGBE_LINKS);</div><div class='del'>-	if ((links &amp; IXGBE_LINKS_KX_AN_COMP) == 0) {</div><div class='del'>-		hw-&gt;fc.fc_was_autonegged = false;</div><div class='del'>-		hw-&gt;fc.current_mode = hw-&gt;fc.requested_mode;</div><div class='del'>-		ret_val = IXGBE_ERR_FC_NOT_NEGOTIATED;</div><div class='add'>+	if ((links &amp; IXGBE_LINKS_KX_AN_COMP) == 0)</div><div class='ctx'> 		goto out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (hw-&gt;mac.type == ixgbe_mac_82599EB) {</div><div class='ctx'> 		links2 = IXGBE_READ_REG(hw, IXGBE_LINKS2);</div><div class='del'>-		if ((links2 &amp; IXGBE_LINKS2_AN_SUPPORTED) == 0) {</div><div class='del'>-			hw-&gt;fc.fc_was_autonegged = false;</div><div class='del'>-			hw-&gt;fc.current_mode = hw-&gt;fc.requested_mode;</div><div class='del'>-			ret_val = IXGBE_ERR_FC_NOT_NEGOTIATED;</div><div class='add'>+		if ((links2 &amp; IXGBE_LINKS2_AN_SUPPORTED) == 0)</div><div class='ctx'> 			goto out;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Read the 10g AN autoc and LP ability registers and resolve</div><div class='hunk'>@@ -2217,241 +2350,63 @@ static s32 ixgbe_fc_autoneg_copper(struct ixgbe_hw *hw)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- *  ixgbe_negotiate_fc - Negotiate flow control</div><div class='del'>- *  @hw: pointer to hardware structure</div><div class='del'>- *  @adv_reg: flow control advertised settings</div><div class='del'>- *  @lp_reg: link partner's flow control settings</div><div class='del'>- *  @adv_sym: symmetric pause bit in advertisement</div><div class='del'>- *  @adv_asm: asymmetric pause bit in advertisement</div><div class='del'>- *  @lp_sym: symmetric pause bit in link partner advertisement</div><div class='del'>- *  @lp_asm: asymmetric pause bit in link partner advertisement</div><div class='del'>- *</div><div class='del'>- *  Find the intersection between advertised settings and link partner's</div><div class='del'>- *  advertised settings</div><div class='del'>- **/</div><div class='del'>-static s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,</div><div class='del'>-			      u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm)</div><div class='del'>-{</div><div class='del'>-	if ((!(adv_reg)) ||  (!(lp_reg)))</div><div class='del'>-		return IXGBE_ERR_FC_NOT_NEGOTIATED;</div><div class='del'>-</div><div class='del'>-	if ((adv_reg &amp; adv_sym) &amp;&amp; (lp_reg &amp; lp_sym)) {</div><div class='del'>-		/*</div><div class='del'>-		 * Now we need to check if the user selected Rx ONLY</div><div class='del'>-		 * of pause frames.  In this case, we had to advertise</div><div class='del'>-		 * FULL flow control because we could not advertise RX</div><div class='del'>-		 * ONLY. Hence, we must now check to see if we need to</div><div class='del'>-		 * turn OFF the TRANSMISSION of PAUSE frames.</div><div class='del'>-		 */</div><div class='del'>-		if (hw-&gt;fc.requested_mode == ixgbe_fc_full) {</div><div class='del'>-			hw-&gt;fc.current_mode = ixgbe_fc_full;</div><div class='del'>-			hw_dbg(hw, "Flow Control = FULL.\n");</div><div class='del'>-		} else {</div><div class='del'>-			hw-&gt;fc.current_mode = ixgbe_fc_rx_pause;</div><div class='del'>-			hw_dbg(hw, "Flow Control=RX PAUSE frames only\n");</div><div class='del'>-		}</div><div class='del'>-	} else if (!(adv_reg &amp; adv_sym) &amp;&amp; (adv_reg &amp; adv_asm) &amp;&amp;</div><div class='del'>-		   (lp_reg &amp; lp_sym) &amp;&amp; (lp_reg &amp; lp_asm)) {</div><div class='del'>-		hw-&gt;fc.current_mode = ixgbe_fc_tx_pause;</div><div class='del'>-		hw_dbg(hw, "Flow Control = TX PAUSE frames only.\n");</div><div class='del'>-	} else if ((adv_reg &amp; adv_sym) &amp;&amp; (adv_reg &amp; adv_asm) &amp;&amp;</div><div class='del'>-		   !(lp_reg &amp; lp_sym) &amp;&amp; (lp_reg &amp; lp_asm)) {</div><div class='del'>-		hw-&gt;fc.current_mode = ixgbe_fc_rx_pause;</div><div class='del'>-		hw_dbg(hw, "Flow Control = RX PAUSE frames only.\n");</div><div class='del'>-	} else {</div><div class='del'>-		hw-&gt;fc.current_mode = ixgbe_fc_none;</div><div class='del'>-		hw_dbg(hw, "Flow Control = NONE.\n");</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- *  ixgbe_setup_fc - Set up flow control</div><div class='add'>+ *  ixgbe_fc_autoneg - Configure flow control</div><div class='ctx'>  *  @hw: pointer to hardware structure</div><div class='ctx'>  *</div><div class='del'>- *  Called at init time to set up flow control.</div><div class='add'>+ *  Compares our advertised flow control capabilities to those advertised by</div><div class='add'>+ *  our link partner, and determines the proper flow control mode to use.</div><div class='ctx'>  **/</div><div class='del'>-static s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num)</div><div class='add'>+void ixgbe_fc_autoneg(struct ixgbe_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	s32 ret_val = 0;</div><div class='del'>-	u32 reg = 0, reg_bp = 0;</div><div class='del'>-	u16 reg_cu = 0;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	if (hw-&gt;fc.requested_mode == ixgbe_fc_pfc) {</div><div class='del'>-		hw-&gt;fc.current_mode = hw-&gt;fc.requested_mode;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_DCB */</div><div class='del'>-	/* Validate the packetbuf configuration */</div><div class='del'>-	if (packetbuf_num &lt; 0 || packetbuf_num &gt; 7) {</div><div class='del'>-		hw_dbg(hw, "Invalid packet buffer number [%d], expected range "</div><div class='del'>-		       "is 0-7\n", packetbuf_num);</div><div class='del'>-		ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	s32 ret_val = IXGBE_ERR_FC_NOT_NEGOTIATED;</div><div class='add'>+	ixgbe_link_speed speed;</div><div class='add'>+	bool link_up;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Validate the water mark configuration.  Zero water marks are invalid</div><div class='del'>-	 * because it causes the controller to just blast out fc packets.</div><div class='add'>+	 * AN should have completed when the cable was plugged in.</div><div class='add'>+	 * Look for reasons to bail out.  Bail out if:</div><div class='add'>+	 * - FC autoneg is disabled, or if</div><div class='add'>+	 * - link is not up.</div><div class='add'>+	 *</div><div class='add'>+	 * Since we're being called from an LSC, link is already known to be up.</div><div class='add'>+	 * So use link_up_wait_to_complete=false.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!hw-&gt;fc.low_water ||</div><div class='del'>-	    !hw-&gt;fc.high_water[packetbuf_num] ||</div><div class='del'>-	    !hw-&gt;fc.pause_time) {</div><div class='del'>-		hw_dbg(hw, "Invalid water mark configuration\n");</div><div class='del'>-		ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;</div><div class='add'>+	if (hw-&gt;fc.disable_fc_autoneg)</div><div class='ctx'> 		goto out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Validate the requested mode.  Strict IEEE mode does not allow</div><div class='del'>-	 * ixgbe_fc_rx_pause because it will cause us to fail at UNH.</div><div class='del'>-	 */</div><div class='del'>-	if (hw-&gt;fc.strict_ieee &amp;&amp; hw-&gt;fc.requested_mode == ixgbe_fc_rx_pause) {</div><div class='del'>-		hw_dbg(hw, "ixgbe_fc_rx_pause not valid in strict "</div><div class='del'>-		       "IEEE mode\n");</div><div class='del'>-		ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;</div><div class='add'>+	hw-&gt;mac.ops.check_link(hw, &amp;speed, &amp;link_up, false);</div><div class='add'>+	if (!link_up)</div><div class='ctx'> 		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * 10gig parts do not have a word in the EEPROM to determine the</div><div class='del'>-	 * default flow control setting, so we explicitly set it to full.</div><div class='del'>-	 */</div><div class='del'>-	if (hw-&gt;fc.requested_mode == ixgbe_fc_default)</div><div class='del'>-		hw-&gt;fc.requested_mode = ixgbe_fc_full;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set up the 1G and 10G flow control advertisement registers so the</div><div class='del'>-	 * HW will be able to do fc autoneg once the cable is plugged in.  If</div><div class='del'>-	 * we link at 10G, the 1G advertisement is harmless and vice versa.</div><div class='del'>-	 */</div><div class='ctx'> </div><div class='ctx'> 	switch (hw-&gt;phy.media_type) {</div><div class='add'>+	/* Autoneg flow control on fiber adapters */</div><div class='ctx'> 	case ixgbe_media_type_fiber:</div><div class='add'>+		if (speed == IXGBE_LINK_SPEED_1GB_FULL)</div><div class='add'>+			ret_val = ixgbe_fc_autoneg_fiber(hw);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* Autoneg flow control on backplane adapters */</div><div class='ctx'> 	case ixgbe_media_type_backplane:</div><div class='del'>-		reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);</div><div class='del'>-		reg_bp = IXGBE_READ_REG(hw, IXGBE_AUTOC);</div><div class='add'>+		ret_val = ixgbe_fc_autoneg_backplane(hw);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	/* Autoneg flow control on copper adapters */</div><div class='ctx'> 	case ixgbe_media_type_copper:</div><div class='del'>-		hw-&gt;phy.ops.read_reg(hw, MDIO_AN_ADVERTISE,</div><div class='del'>-					MDIO_MMD_AN, &amp;reg_cu);</div><div class='add'>+		if (ixgbe_device_supports_autoneg_fc(hw) == 0)</div><div class='add'>+			ret_val = ixgbe_fc_autoneg_copper(hw);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The possible values of fc.requested_mode are:</div><div class='del'>-	 * 0: Flow control is completely disabled</div><div class='del'>-	 * 1: Rx flow control is enabled (we can receive pause frames,</div><div class='del'>-	 *    but not send pause frames).</div><div class='del'>-	 * 2: Tx flow control is enabled (we can send pause frames but</div><div class='del'>-	 *    we do not support receiving pause frames).</div><div class='del'>-	 * 3: Both Rx and Tx flow control (symmetric) are enabled.</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	 * 4: Priority Flow Control is enabled.</div><div class='del'>-#endif</div><div class='del'>-	 * other: Invalid.</div><div class='del'>-	 */</div><div class='del'>-	switch (hw-&gt;fc.requested_mode) {</div><div class='del'>-	case ixgbe_fc_none:</div><div class='del'>-		/* Flow control completely disabled by software override. */</div><div class='del'>-		reg &amp;= ~(IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);</div><div class='del'>-		if (hw-&gt;phy.media_type == ixgbe_media_type_backplane)</div><div class='del'>-			reg_bp &amp;= ~(IXGBE_AUTOC_SYM_PAUSE |</div><div class='del'>-				    IXGBE_AUTOC_ASM_PAUSE);</div><div class='del'>-		else if (hw-&gt;phy.media_type == ixgbe_media_type_copper)</div><div class='del'>-			reg_cu &amp;= ~(IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE);</div><div class='del'>-		break;</div><div class='del'>-	case ixgbe_fc_rx_pause:</div><div class='del'>-		/*</div><div class='del'>-		 * Rx Flow control is enabled and Tx Flow control is</div><div class='del'>-		 * disabled by software override. Since there really</div><div class='del'>-		 * isn't a way to advertise that we are capable of RX</div><div class='del'>-		 * Pause ONLY, we will advertise that we support both</div><div class='del'>-		 * symmetric and asymmetric Rx PAUSE.  Later, we will</div><div class='del'>-		 * disable the adapter's ability to send PAUSE frames.</div><div class='del'>-		 */</div><div class='del'>-		reg |= (IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);</div><div class='del'>-		if (hw-&gt;phy.media_type == ixgbe_media_type_backplane)</div><div class='del'>-			reg_bp |= (IXGBE_AUTOC_SYM_PAUSE |</div><div class='del'>-				   IXGBE_AUTOC_ASM_PAUSE);</div><div class='del'>-		else if (hw-&gt;phy.media_type == ixgbe_media_type_copper)</div><div class='del'>-			reg_cu |= (IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE);</div><div class='del'>-		break;</div><div class='del'>-	case ixgbe_fc_tx_pause:</div><div class='del'>-		/*</div><div class='del'>-		 * Tx Flow control is enabled, and Rx Flow control is</div><div class='del'>-		 * disabled by software override.</div><div class='del'>-		 */</div><div class='del'>-		reg |= (IXGBE_PCS1GANA_ASM_PAUSE);</div><div class='del'>-		reg &amp;= ~(IXGBE_PCS1GANA_SYM_PAUSE);</div><div class='del'>-		if (hw-&gt;phy.media_type == ixgbe_media_type_backplane) {</div><div class='del'>-			reg_bp |= (IXGBE_AUTOC_ASM_PAUSE);</div><div class='del'>-			reg_bp &amp;= ~(IXGBE_AUTOC_SYM_PAUSE);</div><div class='del'>-		} else if (hw-&gt;phy.media_type == ixgbe_media_type_copper) {</div><div class='del'>-			reg_cu |= (IXGBE_TAF_ASM_PAUSE);</div><div class='del'>-			reg_cu &amp;= ~(IXGBE_TAF_SYM_PAUSE);</div><div class='del'>-		}</div><div class='ctx'> 		break;</div><div class='del'>-	case ixgbe_fc_full:</div><div class='del'>-		/* Flow control (both Rx and Tx) is enabled by SW override. */</div><div class='del'>-		reg |= (IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);</div><div class='del'>-		if (hw-&gt;phy.media_type == ixgbe_media_type_backplane)</div><div class='del'>-			reg_bp |= (IXGBE_AUTOC_SYM_PAUSE |</div><div class='del'>-				   IXGBE_AUTOC_ASM_PAUSE);</div><div class='del'>-		else if (hw-&gt;phy.media_type == ixgbe_media_type_copper)</div><div class='del'>-			reg_cu |= (IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE);</div><div class='del'>-		break;</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	case ixgbe_fc_pfc:</div><div class='del'>-		goto out;</div><div class='del'>-		break;</div><div class='del'>-#endif /* CONFIG_DCB */</div><div class='del'>-	default:</div><div class='del'>-		hw_dbg(hw, "Flow control param set incorrectly\n");</div><div class='del'>-		ret_val = IXGBE_ERR_CONFIG;</div><div class='del'>-		goto out;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (hw-&gt;mac.type != ixgbe_mac_X540) {</div><div class='del'>-		/*</div><div class='del'>-		 * Enable auto-negotiation between the MAC &amp; PHY;</div><div class='del'>-		 * the MAC will advertise clause 37 flow control.</div><div class='del'>-		 */</div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_PCS1GANA, reg);</div><div class='del'>-		reg = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);</div><div class='del'>-</div><div class='del'>-		/* Disable AN timeout */</div><div class='del'>-		if (hw-&gt;fc.strict_ieee)</div><div class='del'>-			reg &amp;= ~IXGBE_PCS1GLCTL_AN_1G_TIMEOUT_EN;</div><div class='del'>-</div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_PCS1GLCTL, reg);</div><div class='del'>-		hw_dbg(hw, "Set up FC; PCS1GLCTL = 0x%08X\n", reg);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * AUTOC restart handles negotiation of 1G and 10G on backplane</div><div class='del'>-	 * and copper. There is no need to set the PCS1GCTL register.</div><div class='del'>-	 *</div><div class='del'>-	 */</div><div class='del'>-	if (hw-&gt;phy.media_type == ixgbe_media_type_backplane) {</div><div class='del'>-		reg_bp |= IXGBE_AUTOC_AN_RESTART;</div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_bp);</div><div class='del'>-	} else if ((hw-&gt;phy.media_type == ixgbe_media_type_copper) &amp;&amp;</div><div class='del'>-		    (ixgbe_device_supports_autoneg_fc(hw) == 0)) {</div><div class='del'>-		hw-&gt;phy.ops.write_reg(hw, MDIO_AN_ADVERTISE,</div><div class='del'>-				      MDIO_MMD_AN, reg_cu);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hw_dbg(hw, "Set up FC; IXGBE_AUTOC = 0x%08X\n", reg);</div><div class='ctx'> out:</div><div class='del'>-	return ret_val;</div><div class='add'>+	if (ret_val == 0) {</div><div class='add'>+		hw-&gt;fc.fc_was_autonegged = true;</div><div class='add'>+	} else {</div><div class='add'>+		hw-&gt;fc.fc_was_autonegged = false;</div><div class='add'>+		hw-&gt;fc.current_mode = hw-&gt;fc.requested_mode;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2606,7 +2561,7 @@ s32 ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw)</div><div class='ctx'> 			break;</div><div class='ctx'> 		else</div><div class='ctx'> 			/* Use interrupt-safe sleep just in case */</div><div class='del'>-			udelay(10);</div><div class='add'>+			udelay(1000);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* For informational purposes only */</div><div class='hunk'>@@ -2783,17 +2738,36 @@ san_mac_addr_out:</div><div class='ctx'>  *  Read PCIe configuration space, and get the MSI-X vector count from</div><div class='ctx'>  *  the capabilities table.</div><div class='ctx'>  **/</div><div class='del'>-u32 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw)</div><div class='add'>+u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_adapter *adapter = hw-&gt;back;</div><div class='del'>-	u16 msix_count;</div><div class='del'>-	pci_read_config_word(adapter-&gt;pdev, IXGBE_PCIE_MSIX_82599_CAPS,</div><div class='del'>-	                     &amp;msix_count);</div><div class='add'>+	u16 msix_count = 1;</div><div class='add'>+	u16 max_msix_count;</div><div class='add'>+	u16 pcie_offset;</div><div class='add'>+</div><div class='add'>+	switch (hw-&gt;mac.type) {</div><div class='add'>+	case ixgbe_mac_82598EB:</div><div class='add'>+		pcie_offset = IXGBE_PCIE_MSIX_82598_CAPS;</div><div class='add'>+		max_msix_count = IXGBE_MAX_MSIX_VECTORS_82598;</div><div class='add'>+		break;</div><div class='add'>+	case ixgbe_mac_82599EB:</div><div class='add'>+	case ixgbe_mac_X540:</div><div class='add'>+		pcie_offset = IXGBE_PCIE_MSIX_82599_CAPS;</div><div class='add'>+		max_msix_count = IXGBE_MAX_MSIX_VECTORS_82599;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return msix_count;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_read_config_word(adapter-&gt;pdev, pcie_offset, &amp;msix_count);</div><div class='ctx'> 	msix_count &amp;= IXGBE_PCIE_MSIX_TBL_SZ_MASK;</div><div class='ctx'> </div><div class='del'>-	/* MSI-X count is zero-based in HW, so increment to give proper value */</div><div class='add'>+	/* MSI-X count is zero-based in HW */</div><div class='ctx'> 	msix_count++;</div><div class='ctx'> </div><div class='add'>+	if (msix_count &gt; max_msix_count)</div><div class='add'>+		msix_count = max_msix_count;</div><div class='add'>+</div><div class='ctx'> 	return msix_count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3203,28 +3177,6 @@ wwn_prefix_out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- *  ixgbe_device_supports_autoneg_fc - Check if phy supports autoneg flow</div><div class='del'>- *  control</div><div class='del'>- *  @hw: pointer to hardware structure</div><div class='del'>- *</div><div class='del'>- *  There are several phys that do not support autoneg flow control. This</div><div class='del'>- *  function check the device id to see if the associated phy supports</div><div class='del'>- *  autoneg flow control.</div><div class='del'>- **/</div><div class='del'>-static s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	switch (hw-&gt;device_id) {</div><div class='del'>-	case IXGBE_DEV_ID_X540T:</div><div class='del'>-		return 0;</div><div class='del'>-	case IXGBE_DEV_ID_82599_T3_LOM:</div><div class='del'>-		return 0;</div><div class='del'>-	default:</div><div class='del'>-		return IXGBE_ERR_FC_NOT_SUPPORTED;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  *  ixgbe_set_mac_anti_spoofing - Enable/Disable MAC anti-spoofing</div><div class='ctx'>  *  @hw: pointer to hardware structure</div><div class='ctx'>  *  @enable: enable or disable switch for anti-spoofing</div><div class='hunk'>@@ -3585,3 +3537,172 @@ void ixgbe_clear_tx_pending(struct ixgbe_hw *hw)</div><div class='ctx'> 	IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);</div><div class='ctx'> 	IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static const u8 ixgbe_emc_temp_data[4] = {</div><div class='add'>+	IXGBE_EMC_INTERNAL_DATA,</div><div class='add'>+	IXGBE_EMC_DIODE1_DATA,</div><div class='add'>+	IXGBE_EMC_DIODE2_DATA,</div><div class='add'>+	IXGBE_EMC_DIODE3_DATA</div><div class='add'>+};</div><div class='add'>+static const u8 ixgbe_emc_therm_limit[4] = {</div><div class='add'>+	IXGBE_EMC_INTERNAL_THERM_LIMIT,</div><div class='add'>+	IXGBE_EMC_DIODE1_THERM_LIMIT,</div><div class='add'>+	IXGBE_EMC_DIODE2_THERM_LIMIT,</div><div class='add'>+	IXGBE_EMC_DIODE3_THERM_LIMIT</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  ixgbe_get_ets_data - Extracts the ETS bit data</div><div class='add'>+ *  @hw: pointer to hardware structure</div><div class='add'>+ *  @ets_cfg: extected ETS data</div><div class='add'>+ *  @ets_offset: offset of ETS data</div><div class='add'>+ *</div><div class='add'>+ *  Returns error code.</div><div class='add'>+ **/</div><div class='add'>+static s32 ixgbe_get_ets_data(struct ixgbe_hw *hw, u16 *ets_cfg,</div><div class='add'>+			      u16 *ets_offset)</div><div class='add'>+{</div><div class='add'>+	s32 status = 0;</div><div class='add'>+</div><div class='add'>+	status = hw-&gt;eeprom.ops.read(hw, IXGBE_ETS_CFG, ets_offset);</div><div class='add'>+	if (status)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if ((*ets_offset == 0x0000) || (*ets_offset == 0xFFFF)) {</div><div class='add'>+		status = IXGBE_NOT_IMPLEMENTED;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = hw-&gt;eeprom.ops.read(hw, *ets_offset, ets_cfg);</div><div class='add'>+	if (status)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if ((*ets_cfg &amp; IXGBE_ETS_TYPE_MASK) != IXGBE_ETS_TYPE_EMC_SHIFTED) {</div><div class='add'>+		status = IXGBE_NOT_IMPLEMENTED;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  ixgbe_get_thermal_sensor_data - Gathers thermal sensor data</div><div class='add'>+ *  @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ *  Returns the thermal sensor data structure</div><div class='add'>+ **/</div><div class='add'>+s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	s32 status = 0;</div><div class='add'>+	u16 ets_offset;</div><div class='add'>+	u16 ets_cfg;</div><div class='add'>+	u16 ets_sensor;</div><div class='add'>+	u8  num_sensors;</div><div class='add'>+	u8  i;</div><div class='add'>+	struct ixgbe_thermal_sensor_data *data = &amp;hw-&gt;mac.thermal_sensor_data;</div><div class='add'>+</div><div class='add'>+	/* Only support thermal sensors attached to physical port 0 */</div><div class='add'>+	if ((IXGBE_READ_REG(hw, IXGBE_STATUS) &amp; IXGBE_STATUS_LAN_ID_1)) {</div><div class='add'>+		status = IXGBE_NOT_IMPLEMENTED;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = ixgbe_get_ets_data(hw, &amp;ets_cfg, &amp;ets_offset);</div><div class='add'>+	if (status)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	num_sensors = (ets_cfg &amp; IXGBE_ETS_NUM_SENSORS_MASK);</div><div class='add'>+	if (num_sensors &gt; IXGBE_MAX_SENSORS)</div><div class='add'>+		num_sensors = IXGBE_MAX_SENSORS;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_sensors; i++) {</div><div class='add'>+		u8  sensor_index;</div><div class='add'>+		u8  sensor_location;</div><div class='add'>+</div><div class='add'>+		status = hw-&gt;eeprom.ops.read(hw, (ets_offset + 1 + i),</div><div class='add'>+					     &amp;ets_sensor);</div><div class='add'>+		if (status)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		sensor_index = ((ets_sensor &amp; IXGBE_ETS_DATA_INDEX_MASK) &gt;&gt;</div><div class='add'>+				IXGBE_ETS_DATA_INDEX_SHIFT);</div><div class='add'>+		sensor_location = ((ets_sensor &amp; IXGBE_ETS_DATA_LOC_MASK) &gt;&gt;</div><div class='add'>+				   IXGBE_ETS_DATA_LOC_SHIFT);</div><div class='add'>+</div><div class='add'>+		if (sensor_location != 0) {</div><div class='add'>+			status = hw-&gt;phy.ops.read_i2c_byte(hw,</div><div class='add'>+					ixgbe_emc_temp_data[sensor_index],</div><div class='add'>+					IXGBE_I2C_THERMAL_SENSOR_ADDR,</div><div class='add'>+					&amp;data-&gt;sensor[i].temp);</div><div class='add'>+			if (status)</div><div class='add'>+				goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_init_thermal_sensor_thresh_generic - Inits thermal sensor thresholds</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Inits the thermal sensor thresholds according to the NVM map</div><div class='add'>+ * and save off the threshold and location values into mac.thermal_sensor_data</div><div class='add'>+ **/</div><div class='add'>+s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	s32 status = 0;</div><div class='add'>+	u16 ets_offset;</div><div class='add'>+	u16 ets_cfg;</div><div class='add'>+	u16 ets_sensor;</div><div class='add'>+	u8  low_thresh_delta;</div><div class='add'>+	u8  num_sensors;</div><div class='add'>+	u8  therm_limit;</div><div class='add'>+	u8  i;</div><div class='add'>+	struct ixgbe_thermal_sensor_data *data = &amp;hw-&gt;mac.thermal_sensor_data;</div><div class='add'>+</div><div class='add'>+	memset(data, 0, sizeof(struct ixgbe_thermal_sensor_data));</div><div class='add'>+</div><div class='add'>+	/* Only support thermal sensors attached to physical port 0 */</div><div class='add'>+	if ((IXGBE_READ_REG(hw, IXGBE_STATUS) &amp; IXGBE_STATUS_LAN_ID_1)) {</div><div class='add'>+		status = IXGBE_NOT_IMPLEMENTED;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = ixgbe_get_ets_data(hw, &amp;ets_cfg, &amp;ets_offset);</div><div class='add'>+	if (status)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	low_thresh_delta = ((ets_cfg &amp; IXGBE_ETS_LTHRES_DELTA_MASK) &gt;&gt;</div><div class='add'>+			     IXGBE_ETS_LTHRES_DELTA_SHIFT);</div><div class='add'>+	num_sensors = (ets_cfg &amp; IXGBE_ETS_NUM_SENSORS_MASK);</div><div class='add'>+	if (num_sensors &gt; IXGBE_MAX_SENSORS)</div><div class='add'>+		num_sensors = IXGBE_MAX_SENSORS;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_sensors; i++) {</div><div class='add'>+		u8  sensor_index;</div><div class='add'>+		u8  sensor_location;</div><div class='add'>+</div><div class='add'>+		hw-&gt;eeprom.ops.read(hw, (ets_offset + 1 + i), &amp;ets_sensor);</div><div class='add'>+		sensor_index = ((ets_sensor &amp; IXGBE_ETS_DATA_INDEX_MASK) &gt;&gt;</div><div class='add'>+				IXGBE_ETS_DATA_INDEX_SHIFT);</div><div class='add'>+		sensor_location = ((ets_sensor &amp; IXGBE_ETS_DATA_LOC_MASK) &gt;&gt;</div><div class='add'>+				   IXGBE_ETS_DATA_LOC_SHIFT);</div><div class='add'>+		therm_limit = ets_sensor &amp; IXGBE_ETS_DATA_HTHRESH_MASK;</div><div class='add'>+</div><div class='add'>+		hw-&gt;phy.ops.write_i2c_byte(hw,</div><div class='add'>+			ixgbe_emc_therm_limit[sensor_index],</div><div class='add'>+			IXGBE_I2C_THERMAL_SENSOR_ADDR, therm_limit);</div><div class='add'>+</div><div class='add'>+		if (sensor_location == 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		data-&gt;sensor[i].location = sensor_location;</div><div class='add'>+		data-&gt;sensor[i].caution_thresh = therm_limit;</div><div class='add'>+		data-&gt;sensor[i].max_op_thresh = therm_limit - low_thresh_delta;</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h<br/>index 204f06235b45..6222fdb3d3f1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.h</a></div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> #include "ixgbe_type.h"</div><div class='ctx'> #include "ixgbe.h"</div><div class='ctx'> </div><div class='del'>-u32 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);</div><div class='add'>+u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);</div><div class='ctx'> s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);</div><div class='ctx'> s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);</div><div class='ctx'> s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);</div><div class='hunk'>@@ -77,8 +77,8 @@ s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);</div><div class='ctx'> s32 ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw);</div><div class='ctx'> s32 ixgbe_enable_rx_buff_generic(struct ixgbe_hw *hw);</div><div class='ctx'> s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);</div><div class='del'>-s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw, s32 packetbuf_num);</div><div class='del'>-s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw);</div><div class='add'>+s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);</div><div class='add'>+void ixgbe_fc_autoneg(struct ixgbe_hw *hw);</div><div class='ctx'> </div><div class='ctx'> s32 ixgbe_validate_mac_addr(u8 *mac_addr);</div><div class='ctx'> s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask);</div><div class='hunk'>@@ -107,6 +107,19 @@ void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);</div><div class='ctx'> void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb,</div><div class='ctx'> 			     u32 headroom, int strategy);</div><div class='ctx'> </div><div class='add'>+#define IXGBE_I2C_THERMAL_SENSOR_ADDR	0xF8</div><div class='add'>+#define IXGBE_EMC_INTERNAL_DATA		0x00</div><div class='add'>+#define IXGBE_EMC_INTERNAL_THERM_LIMIT	0x20</div><div class='add'>+#define IXGBE_EMC_DIODE1_DATA		0x01</div><div class='add'>+#define IXGBE_EMC_DIODE1_THERM_LIMIT	0x19</div><div class='add'>+#define IXGBE_EMC_DIODE2_DATA		0x23</div><div class='add'>+#define IXGBE_EMC_DIODE2_THERM_LIMIT	0x1A</div><div class='add'>+#define IXGBE_EMC_DIODE3_DATA		0x2A</div><div class='add'>+#define IXGBE_EMC_DIODE3_THERM_LIMIT	0x30</div><div class='add'>+</div><div class='add'>+s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);</div><div class='add'>+s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);</div><div class='add'>+</div><div class='ctx'> #define IXGBE_WRITE_REG(a, reg, value) writel((value), ((a)-&gt;hw_addr + (reg)))</div><div class='ctx'> </div><div class='ctx'> #ifndef writeq</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c<br/>index d3695edfcb8b..87592b458c9c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c</a></div><div class='hunk'>@@ -191,53 +191,46 @@ s32 ixgbe_dcb_config_tx_data_arbiter_82598(struct ixgbe_hw *hw,</div><div class='ctx'>  */</div><div class='ctx'> s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw, u8 pfc_en)</div><div class='ctx'> {</div><div class='del'>-	u32 reg;</div><div class='add'>+	u32 fcrtl, reg;</div><div class='ctx'> 	u8  i;</div><div class='ctx'> </div><div class='del'>-	if (pfc_en) {</div><div class='del'>-		/* Enable Transmit Priority Flow Control */</div><div class='del'>-		reg = IXGBE_READ_REG(hw, IXGBE_RMCS);</div><div class='del'>-		reg &amp;= ~IXGBE_RMCS_TFCE_802_3X;</div><div class='del'>-		/* correct the reporting of our flow control status */</div><div class='del'>-		reg |= IXGBE_RMCS_TFCE_PRIORITY;</div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg);</div><div class='del'>-</div><div class='del'>-		/* Enable Receive Priority Flow Control */</div><div class='del'>-		reg = IXGBE_READ_REG(hw, IXGBE_FCTRL);</div><div class='del'>-		reg &amp;= ~IXGBE_FCTRL_RFCE;</div><div class='del'>-		reg |= IXGBE_FCTRL_RPFCE;</div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg);</div><div class='del'>-</div><div class='del'>-		/* Configure pause time */</div><div class='del'>-		for (i = 0; i &lt; (MAX_TRAFFIC_CLASS &gt;&gt; 1); i++)</div><div class='del'>-			IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), 0x68006800);</div><div class='add'>+	/* Enable Transmit Priority Flow Control */</div><div class='add'>+	reg = IXGBE_READ_REG(hw, IXGBE_RMCS);</div><div class='add'>+	reg &amp;= ~IXGBE_RMCS_TFCE_802_3X;</div><div class='add'>+	reg |= IXGBE_RMCS_TFCE_PRIORITY;</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg);</div><div class='ctx'> </div><div class='del'>-		/* Configure flow control refresh threshold value */</div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_FCRTV, 0x3400);</div><div class='del'>-	}</div><div class='add'>+	/* Enable Receive Priority Flow Control */</div><div class='add'>+	reg = IXGBE_READ_REG(hw, IXGBE_FCTRL);</div><div class='add'>+	reg &amp;= ~(IXGBE_FCTRL_RPFCE | IXGBE_FCTRL_RFCE);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Configure flow control thresholds and enable priority flow control</div><div class='del'>-	 * for each traffic class.</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; MAX_TRAFFIC_CLASS; i++) {</div><div class='del'>-		int enabled = pfc_en &amp; (1 &lt;&lt; i);</div><div class='add'>+	if (pfc_en)</div><div class='add'>+		reg |= IXGBE_FCTRL_RPFCE;</div><div class='ctx'> </div><div class='del'>-		reg = hw-&gt;fc.low_water &lt;&lt; 10;</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg);</div><div class='ctx'> </div><div class='del'>-		if (enabled == pfc_enabled_tx ||</div><div class='del'>-		    enabled == pfc_enabled_full)</div><div class='del'>-			reg |= IXGBE_FCRTL_XONE;</div><div class='add'>+	fcrtl = (hw-&gt;fc.low_water &lt;&lt; 10) | IXGBE_FCRTL_XONE;</div><div class='add'>+	/* Configure PFC Tx thresholds per TC */</div><div class='add'>+	for (i = 0; i &lt; MAX_TRAFFIC_CLASS; i++) {</div><div class='add'>+		if (!(pfc_en &amp; (1 &lt;&lt; i))) {</div><div class='add'>+			IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0);</div><div class='add'>+			IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		reg = (hw-&gt;fc.high_water[i] &lt;&lt; 10) | IXGBE_FCRTH_FCEN;</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), fcrtl);</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), reg);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), reg);</div><div class='add'>+	/* Configure pause time */</div><div class='add'>+	reg = hw-&gt;fc.pause_time * 0x00010001;</div><div class='add'>+	for (i = 0; i &lt; (MAX_TRAFFIC_CLASS / 2); i++)</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);</div><div class='ctx'> </div><div class='del'>-		reg = hw-&gt;fc.high_water[i] &lt;&lt; 10;</div><div class='del'>-		if (enabled == pfc_enabled_tx ||</div><div class='del'>-		    enabled == pfc_enabled_full)</div><div class='del'>-			reg |= IXGBE_FCRTH_FCEN;</div><div class='add'>+	/* Configure flow control refresh threshold value */</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw-&gt;fc.pause_time / 2);</div><div class='ctx'> </div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), reg);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c<br/>index 888a419dc3d9..4eac80d01857 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c</a></div><div class='hunk'>@@ -211,24 +211,42 @@ s32 ixgbe_dcb_config_tx_data_arbiter_82599(struct ixgbe_hw *hw,</div><div class='ctx'>  */</div><div class='ctx'> s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en, u8 *prio_tc)</div><div class='ctx'> {</div><div class='del'>-	u32 i, j, reg;</div><div class='add'>+	u32 i, j, fcrtl, reg;</div><div class='ctx'> 	u8 max_tc = 0;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MAX_USER_PRIORITY; i++)</div><div class='add'>+	/* Enable Transmit Priority Flow Control */</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_FCCFG, IXGBE_FCCFG_TFCE_PRIORITY);</div><div class='add'>+</div><div class='add'>+	/* Enable Receive Priority Flow Control */</div><div class='add'>+	reg = IXGBE_READ_REG(hw, IXGBE_MFLCN);</div><div class='add'>+	reg |= IXGBE_MFLCN_DPF;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * X540 supports per TC Rx priority flow control.  So</div><div class='add'>+	 * clear all TCs and only enable those that should be</div><div class='add'>+	 * enabled.</div><div class='add'>+	 */</div><div class='add'>+	reg &amp;= ~(IXGBE_MFLCN_RPFCE_MASK | IXGBE_MFLCN_RFCE);</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_X540)</div><div class='add'>+		reg |= pfc_en &lt;&lt; IXGBE_MFLCN_RPFCE_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (pfc_en)</div><div class='add'>+		reg |= IXGBE_MFLCN_RPFCE;</div><div class='add'>+</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX_USER_PRIORITY; i++) {</div><div class='ctx'> 		if (prio_tc[i] &gt; max_tc)</div><div class='ctx'> 			max_tc = prio_tc[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fcrtl = (hw-&gt;fc.low_water &lt;&lt; 10) | IXGBE_FCRTL_XONE;</div><div class='ctx'> </div><div class='ctx'> 	/* Configure PFC Tx thresholds per TC */</div><div class='del'>-	for (i = 0; i &lt; MAX_TRAFFIC_CLASS; i++) {</div><div class='add'>+	for (i = 0; i &lt;= max_tc; i++) {</div><div class='ctx'> 		int enabled = 0;</div><div class='ctx'> </div><div class='del'>-		if (i &gt; max_tc) {</div><div class='del'>-			reg = 0;</div><div class='del'>-			IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), reg);</div><div class='del'>-			IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), reg);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		for (j = 0; j &lt; MAX_USER_PRIORITY; j++) {</div><div class='ctx'> 			if ((prio_tc[j] == i) &amp;&amp; (pfc_en &amp; (1 &lt;&lt; j))) {</div><div class='ctx'> 				enabled = 1;</div><div class='hunk'>@@ -236,61 +254,29 @@ s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en, u8 *prio_tc)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		reg = hw-&gt;fc.low_water &lt;&lt; 10;</div><div class='del'>-</div><div class='del'>-		if (enabled)</div><div class='del'>-			reg |= IXGBE_FCRTL_XONE;</div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), reg);</div><div class='add'>+		if (enabled) {</div><div class='add'>+			reg = (hw-&gt;fc.high_water[i] &lt;&lt; 10) | IXGBE_FCRTH_FCEN;</div><div class='add'>+			IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), fcrtl);</div><div class='add'>+		} else {</div><div class='add'>+			reg = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 32;</div><div class='add'>+			IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		reg = hw-&gt;fc.high_water[i] &lt;&lt; 10;</div><div class='del'>-		if (enabled)</div><div class='del'>-			reg |= IXGBE_FCRTH_FCEN;</div><div class='ctx'> 		IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), reg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pfc_en) {</div><div class='del'>-		/* Configure pause time (2 TCs per register) */</div><div class='del'>-		reg = hw-&gt;fc.pause_time | (hw-&gt;fc.pause_time &lt;&lt; 16);</div><div class='del'>-		for (i = 0; i &lt; (MAX_TRAFFIC_CLASS / 2); i++)</div><div class='del'>-			IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);</div><div class='del'>-</div><div class='del'>-		/* Configure flow control refresh threshold value */</div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw-&gt;fc.pause_time / 2);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		reg = IXGBE_FCCFG_TFCE_PRIORITY;</div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_FCCFG, reg);</div><div class='del'>-		/*</div><div class='del'>-		 * Enable Receive PFC</div><div class='del'>-		 * 82599 will always honor XOFF frames we receive when</div><div class='del'>-		 * we are in PFC mode however X540 only honors enabled</div><div class='del'>-		 * traffic classes.</div><div class='del'>-		 */</div><div class='del'>-		reg = IXGBE_READ_REG(hw, IXGBE_MFLCN);</div><div class='del'>-		reg &amp;= ~IXGBE_MFLCN_RFCE;</div><div class='del'>-		reg |= IXGBE_MFLCN_RPFCE | IXGBE_MFLCN_DPF;</div><div class='del'>-</div><div class='del'>-		if (hw-&gt;mac.type == ixgbe_mac_X540) {</div><div class='del'>-			reg &amp;= ~IXGBE_MFLCN_RPFCE_MASK;</div><div class='del'>-			reg |= pfc_en &lt;&lt; IXGBE_MFLCN_RPFCE_SHIFT;</div><div class='del'>-		}</div><div class='add'>+	for (; i &lt; MAX_TRAFFIC_CLASS; i++) {</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0);</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), 0);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg);</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-		/* X540 devices have a RX bit that should be cleared</div><div class='del'>-		 * if PFC is disabled on all TCs but PFC features is</div><div class='del'>-		 * enabled.</div><div class='del'>-		 */</div><div class='del'>-		if (hw-&gt;mac.type == ixgbe_mac_X540) {</div><div class='del'>-			reg = IXGBE_READ_REG(hw, IXGBE_MFLCN);</div><div class='del'>-			reg &amp;= ~IXGBE_MFLCN_RPFCE_MASK;</div><div class='del'>-			IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg);</div><div class='del'>-		}</div><div class='add'>+	/* Configure pause time (2 TCs per register) */</div><div class='add'>+	reg = hw-&gt;fc.pause_time * 0x00010001;</div><div class='add'>+	for (i = 0; i &lt; (MAX_TRAFFIC_CLASS / 2); i++)</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; MAX_TRAFFIC_CLASS; i++)</div><div class='del'>-			hw-&gt;mac.ops.fc_enable(hw, i);</div><div class='del'>-	}</div><div class='add'>+	/* Configure flow control refresh threshold value */</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw-&gt;fc.pause_time / 2);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c<br/>index 652e4b09546d..5164a21b13ca 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c</a></div><div class='hunk'>@@ -44,18 +44,26 @@</div><div class='ctx'> #define DCB_NO_HW_CHG   1  /* DCB configuration did not change */</div><div class='ctx'> #define DCB_HW_CHG      2  /* DCB configuration changed, no reset */</div><div class='ctx'> </div><div class='del'>-int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *scfg,</div><div class='del'>-		       struct ixgbe_dcb_config *dcfg, int tc_max)</div><div class='add'>+static int ixgbe_copy_dcb_cfg(struct ixgbe_adapter *adapter, int tc_max)</div><div class='ctx'> {</div><div class='add'>+	struct ixgbe_dcb_config *scfg = &amp;adapter-&gt;temp_dcb_cfg;</div><div class='add'>+	struct ixgbe_dcb_config *dcfg = &amp;adapter-&gt;dcb_cfg;</div><div class='ctx'> 	struct tc_configuration *src = NULL;</div><div class='ctx'> 	struct tc_configuration *dst = NULL;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> 	int tx = DCB_TX_CONFIG;</div><div class='ctx'> 	int rx = DCB_RX_CONFIG;</div><div class='ctx'> 	int changes = 0;</div><div class='add'>+#ifdef IXGBE_FCOE</div><div class='add'>+	struct dcb_app app = {</div><div class='add'>+			      .selector = DCB_APP_IDTYPE_ETHTYPE,</div><div class='add'>+			      .protocol = ETH_P_FCOE,</div><div class='add'>+			     };</div><div class='add'>+	u8 up = dcb_getapp(adapter-&gt;netdev, &amp;app);</div><div class='ctx'> </div><div class='del'>-	if (!scfg || !dcfg)</div><div class='del'>-		return changes;</div><div class='add'>+	if (up &amp;&amp; !(up &amp; (1 &lt;&lt; adapter-&gt;fcoe.up)))</div><div class='add'>+		changes |= BIT_APP_UPCHG;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	for (i = DCB_PG_ATTR_TC_0; i &lt; tc_max + DCB_PG_ATTR_TC_0; i++) {</div><div class='ctx'> 		src = &amp;scfg-&gt;tc_config[i - DCB_PG_ATTR_TC_0];</div><div class='hunk'>@@ -330,60 +338,20 @@ static void ixgbe_dcbnl_devreset(struct net_device *dev)</div><div class='ctx'> static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_dcb_config *dcb_cfg = &amp;adapter-&gt;dcb_cfg;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	int ret = DCB_NO_HW_CHG;</div><div class='ctx'> 	int i;</div><div class='del'>-#ifdef IXGBE_FCOE</div><div class='del'>-	struct dcb_app app = {</div><div class='del'>-			      .selector = DCB_APP_IDTYPE_ETHTYPE,</div><div class='del'>-			      .protocol = ETH_P_FCOE,</div><div class='del'>-			     };</div><div class='del'>-	u8 up;</div><div class='del'>-</div><div class='del'>-	/* In IEEE mode, use the IEEE Ethertype selector value */</div><div class='del'>-	if (adapter-&gt;dcbx_cap &amp; DCB_CAP_DCBX_VER_IEEE) {</div><div class='del'>-		app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;</div><div class='del'>-		up = dcb_ieee_getapp_mask(netdev, &amp;app);</div><div class='del'>-	} else {</div><div class='del'>-		up = dcb_getapp(netdev, &amp;app);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	/* Fail command if not in CEE mode */</div><div class='ctx'> 	if (!(adapter-&gt;dcbx_cap &amp; DCB_CAP_DCBX_VER_CEE))</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;dcb_set_bitmap |= ixgbe_copy_dcb_cfg(&amp;adapter-&gt;temp_dcb_cfg,</div><div class='del'>-						      &amp;adapter-&gt;dcb_cfg,</div><div class='add'>+	adapter-&gt;dcb_set_bitmap |= ixgbe_copy_dcb_cfg(adapter,</div><div class='ctx'> 						      MAX_TRAFFIC_CLASS);</div><div class='ctx'> 	if (!adapter-&gt;dcb_set_bitmap)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (adapter-&gt;dcb_cfg.pfc_mode_enable) {</div><div class='del'>-		switch (adapter-&gt;hw.mac.type) {</div><div class='del'>-		case ixgbe_mac_82599EB:</div><div class='del'>-		case ixgbe_mac_X540:</div><div class='del'>-			if (adapter-&gt;hw.fc.current_mode != ixgbe_fc_pfc)</div><div class='del'>-				adapter-&gt;last_lfc_mode =</div><div class='del'>-				                  adapter-&gt;hw.fc.current_mode;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		adapter-&gt;hw.fc.requested_mode = ixgbe_fc_pfc;</div><div class='del'>-	} else {</div><div class='del'>-		switch (adapter-&gt;hw.mac.type) {</div><div class='del'>-		case ixgbe_mac_82598EB:</div><div class='del'>-			adapter-&gt;hw.fc.requested_mode = ixgbe_fc_none;</div><div class='del'>-			break;</div><div class='del'>-		case ixgbe_mac_82599EB:</div><div class='del'>-		case ixgbe_mac_X540:</div><div class='del'>-			adapter-&gt;hw.fc.requested_mode = adapter-&gt;last_lfc_mode;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (adapter-&gt;dcb_set_bitmap &amp; (BIT_PG_TX|BIT_PG_RX)) {</div><div class='ctx'> 		u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS];</div><div class='ctx'> 		u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS];</div><div class='hunk'>@@ -396,23 +364,19 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)</div><div class='ctx'> 			max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-		ixgbe_dcb_calculate_tc_credits(&amp;adapter-&gt;hw, &amp;adapter-&gt;dcb_cfg,</div><div class='del'>-					       max_frame, DCB_TX_CONFIG);</div><div class='del'>-		ixgbe_dcb_calculate_tc_credits(&amp;adapter-&gt;hw, &amp;adapter-&gt;dcb_cfg,</div><div class='del'>-					       max_frame, DCB_RX_CONFIG);</div><div class='add'>+		ixgbe_dcb_calculate_tc_credits(hw, dcb_cfg, max_frame,</div><div class='add'>+					       DCB_TX_CONFIG);</div><div class='add'>+		ixgbe_dcb_calculate_tc_credits(hw, dcb_cfg, max_frame,</div><div class='add'>+					       DCB_RX_CONFIG);</div><div class='ctx'> </div><div class='del'>-		ixgbe_dcb_unpack_refill(&amp;adapter-&gt;dcb_cfg,</div><div class='del'>-					DCB_TX_CONFIG, refill);</div><div class='del'>-		ixgbe_dcb_unpack_max(&amp;adapter-&gt;dcb_cfg, max);</div><div class='del'>-		ixgbe_dcb_unpack_bwgid(&amp;adapter-&gt;dcb_cfg,</div><div class='del'>-				       DCB_TX_CONFIG, bwg_id);</div><div class='del'>-		ixgbe_dcb_unpack_prio(&amp;adapter-&gt;dcb_cfg,</div><div class='del'>-				      DCB_TX_CONFIG, prio_type);</div><div class='del'>-		ixgbe_dcb_unpack_map(&amp;adapter-&gt;dcb_cfg,</div><div class='del'>-				     DCB_TX_CONFIG, prio_tc);</div><div class='add'>+		ixgbe_dcb_unpack_refill(dcb_cfg, DCB_TX_CONFIG, refill);</div><div class='add'>+		ixgbe_dcb_unpack_max(dcb_cfg, max);</div><div class='add'>+		ixgbe_dcb_unpack_bwgid(dcb_cfg, DCB_TX_CONFIG, bwg_id);</div><div class='add'>+		ixgbe_dcb_unpack_prio(dcb_cfg, DCB_TX_CONFIG, prio_type);</div><div class='add'>+		ixgbe_dcb_unpack_map(dcb_cfg, DCB_TX_CONFIG, prio_tc);</div><div class='ctx'> </div><div class='del'>-		ixgbe_dcb_hw_ets_config(&amp;adapter-&gt;hw, refill, max,</div><div class='del'>-					bwg_id, prio_type, prio_tc);</div><div class='add'>+		ixgbe_dcb_hw_ets_config(hw, refill, max, bwg_id,</div><div class='add'>+					prio_type, prio_tc);</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; IEEE_8021QAZ_MAX_TCS; i++)</div><div class='ctx'> 			netdev_set_prio_tc_map(netdev, i, prio_tc[i]);</div><div class='hunk'>@@ -421,27 +385,34 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;dcb_set_bitmap &amp; BIT_PFC) {</div><div class='del'>-		u8 pfc_en;</div><div class='del'>-		u8 prio_tc[MAX_USER_PRIORITY];</div><div class='add'>+		if (dcb_cfg-&gt;pfc_mode_enable) {</div><div class='add'>+			u8 pfc_en;</div><div class='add'>+			u8 prio_tc[MAX_USER_PRIORITY];</div><div class='add'>+</div><div class='add'>+			ixgbe_dcb_unpack_map(dcb_cfg, DCB_TX_CONFIG, prio_tc);</div><div class='add'>+			ixgbe_dcb_unpack_pfc(dcb_cfg, &amp;pfc_en);</div><div class='add'>+			ixgbe_dcb_hw_pfc_config(hw, pfc_en, prio_tc);</div><div class='add'>+		} else {</div><div class='add'>+			hw-&gt;mac.ops.fc_enable(hw);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		ixgbe_dcb_unpack_map(&amp;adapter-&gt;dcb_cfg,</div><div class='del'>-				     DCB_TX_CONFIG, prio_tc);</div><div class='del'>-		ixgbe_dcb_unpack_pfc(&amp;adapter-&gt;dcb_cfg, &amp;pfc_en);</div><div class='del'>-		ixgbe_dcb_hw_pfc_config(&amp;adapter-&gt;hw, pfc_en, prio_tc);</div><div class='del'>-		if (ret != DCB_HW_CHG_RST)</div><div class='del'>-			ret = DCB_HW_CHG;</div><div class='del'>-	}</div><div class='add'>+		ixgbe_set_rx_drop_en(adapter);</div><div class='ctx'> </div><div class='del'>-	if (adapter-&gt;dcb_cfg.pfc_mode_enable)</div><div class='del'>-		adapter-&gt;hw.fc.current_mode = ixgbe_fc_pfc;</div><div class='add'>+		ret = DCB_HW_CHG;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> #ifdef IXGBE_FCOE</div><div class='ctx'> 	/* Reprogam FCoE hardware offloads when the traffic class</div><div class='ctx'> 	 * FCoE is using changes. This happens if the APP info</div><div class='ctx'> 	 * changes or the up2tc mapping is updated.</div><div class='ctx'> 	 */</div><div class='del'>-	if ((up &amp;&amp; !(up &amp; (1 &lt;&lt; adapter-&gt;fcoe.up))) ||</div><div class='del'>-	    (adapter-&gt;dcb_set_bitmap &amp; BIT_APP_UPCHG)) {</div><div class='add'>+	if (adapter-&gt;dcb_set_bitmap &amp; BIT_APP_UPCHG) {</div><div class='add'>+		struct dcb_app app = {</div><div class='add'>+				      .selector = DCB_APP_IDTYPE_ETHTYPE,</div><div class='add'>+				      .protocol = ETH_P_FCOE,</div><div class='add'>+				     };</div><div class='add'>+		u8 up = dcb_getapp(netdev, &amp;app);</div><div class='add'>+</div><div class='ctx'> 		adapter-&gt;fcoe.up = ffs(up) - 1;</div><div class='ctx'> 		ixgbe_dcbnl_devreset(netdev);</div><div class='ctx'> 		ret = DCB_HW_CHG_RST;</div><div class='hunk'>@@ -650,7 +621,9 @@ static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,</div><div class='ctx'> 				   struct ieee_pfc *pfc)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u8 *prio_tc;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!(adapter-&gt;dcbx_cap &amp; DCB_CAP_DCBX_VER_IEEE))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -664,7 +637,16 @@ static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	prio_tc = adapter-&gt;ixgbe_ieee_ets-&gt;prio_tc;</div><div class='ctx'> 	memcpy(adapter-&gt;ixgbe_ieee_pfc, pfc, sizeof(*adapter-&gt;ixgbe_ieee_pfc));</div><div class='del'>-	return ixgbe_dcb_hw_pfc_config(&amp;adapter-&gt;hw, pfc-&gt;pfc_en, prio_tc);</div><div class='add'>+</div><div class='add'>+	/* Enable link flow control parameters if PFC is disabled */</div><div class='add'>+	if (pfc-&gt;pfc_en)</div><div class='add'>+		err = ixgbe_dcb_hw_pfc_config(hw, pfc-&gt;pfc_en, prio_tc);</div><div class='add'>+	else</div><div class='add'>+		err = hw-&gt;mac.ops.fc_enable(hw);</div><div class='add'>+</div><div class='add'>+	ixgbe_set_rx_drop_en(adapter);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_dcbnl_ieee_setapp(struct net_device *dev,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c<br/>index 31a2bf76a346..3178f1ec3711 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c</a></div><div class='hunk'>@@ -391,11 +391,6 @@ static void ixgbe_get_pauseparam(struct net_device *netdev,</div><div class='ctx'> 	} else if (hw-&gt;fc.current_mode == ixgbe_fc_full) {</div><div class='ctx'> 		pause-&gt;rx_pause = 1;</div><div class='ctx'> 		pause-&gt;tx_pause = 1;</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	} else if (hw-&gt;fc.current_mode == ixgbe_fc_pfc) {</div><div class='del'>-		pause-&gt;rx_pause = 0;</div><div class='del'>-		pause-&gt;tx_pause = 0;</div><div class='del'>-#endif</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -404,21 +399,14 @@ static int ixgbe_set_pauseparam(struct net_device *netdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-	struct ixgbe_fc_info fc;</div><div class='add'>+	struct ixgbe_fc_info fc = hw-&gt;fc;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	if (adapter-&gt;dcb_cfg.pfc_mode_enable ||</div><div class='del'>-		((hw-&gt;mac.type == ixgbe_mac_82598EB) &amp;&amp;</div><div class='del'>-		(adapter-&gt;flags &amp; IXGBE_FLAG_DCB_ENABLED)))</div><div class='add'>+	/* 82598 does no support link flow control with DCB enabled */</div><div class='add'>+	if ((hw-&gt;mac.type == ixgbe_mac_82598EB) &amp;&amp;</div><div class='add'>+	    (adapter-&gt;flags &amp; IXGBE_FLAG_DCB_ENABLED))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='del'>-	fc = hw-&gt;fc;</div><div class='del'>-</div><div class='del'>-	if (pause-&gt;autoneg != AUTONEG_ENABLE)</div><div class='del'>-		fc.disable_fc_autoneg = true;</div><div class='del'>-	else</div><div class='del'>-		fc.disable_fc_autoneg = false;</div><div class='add'>+	fc.disable_fc_autoneg = (pause-&gt;autoneg != AUTONEG_ENABLE);</div><div class='ctx'> </div><div class='ctx'> 	if ((pause-&gt;rx_pause &amp;&amp; pause-&gt;tx_pause) || pause-&gt;autoneg)</div><div class='ctx'> 		fc.requested_mode = ixgbe_fc_full;</div><div class='hunk'>@@ -426,14 +414,8 @@ static int ixgbe_set_pauseparam(struct net_device *netdev,</div><div class='ctx'> 		fc.requested_mode = ixgbe_fc_rx_pause;</div><div class='ctx'> 	else if (!pause-&gt;rx_pause &amp;&amp; pause-&gt;tx_pause)</div><div class='ctx'> 		fc.requested_mode = ixgbe_fc_tx_pause;</div><div class='del'>-	else if (!pause-&gt;rx_pause &amp;&amp; !pause-&gt;tx_pause)</div><div class='del'>-		fc.requested_mode = ixgbe_fc_none;</div><div class='ctx'> 	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	adapter-&gt;last_lfc_mode = fc.requested_mode;</div><div class='del'>-#endif</div><div class='add'>+		fc.requested_mode = ixgbe_fc_none;</div><div class='ctx'> </div><div class='ctx'> 	/* if the thing changed then we'll update and use new autoneg */</div><div class='ctx'> 	if (memcmp(&amp;fc, &amp;hw-&gt;fc, sizeof(struct ixgbe_fc_info))) {</div><div class='hunk'>@@ -1780,6 +1762,8 @@ static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,</div><div class='ctx'> 		rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netdev_tx_reset_queue(txring_txq(tx_ring));</div><div class='add'>+</div><div class='ctx'> 	/* re-map buffers to ring, store next to clean values */</div><div class='ctx'> 	ixgbe_alloc_rx_buffers(rx_ring, count);</div><div class='ctx'> 	rx_ring-&gt;next_to_clean = rx_ntc;</div><div class='hunk'>@@ -1969,53 +1953,12 @@ static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,</div><div class='ctx'>                                struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-	int retval = 1;</div><div class='del'>-	u16 wol_cap = adapter-&gt;eeprom_cap &amp; IXGBE_DEVICE_CAPS_WOL_MASK;</div><div class='del'>-</div><div class='del'>-	/* WOL not supported except for the following */</div><div class='del'>-	switch(hw-&gt;device_id) {</div><div class='del'>-	case IXGBE_DEV_ID_82599_SFP:</div><div class='del'>-		/* Only these subdevices could supports WOL */</div><div class='del'>-		switch (hw-&gt;subsystem_device_id) {</div><div class='del'>-		case IXGBE_SUBDEV_ID_82599_560FLR:</div><div class='del'>-			/* only support first port */</div><div class='del'>-			if (hw-&gt;bus.func != 0) {</div><div class='del'>-				wol-&gt;supported = 0;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		case IXGBE_SUBDEV_ID_82599_SFP:</div><div class='del'>-			retval = 0;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			wol-&gt;supported = 0;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:</div><div class='del'>-		/* All except this subdevice support WOL */</div><div class='del'>-		if (hw-&gt;subsystem_device_id ==</div><div class='del'>-		    IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {</div><div class='del'>-			wol-&gt;supported = 0;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		retval = 0;</div><div class='del'>-		break;</div><div class='del'>-	case IXGBE_DEV_ID_82599_KX4:</div><div class='del'>-		retval = 0;</div><div class='del'>-		break;</div><div class='del'>-	case IXGBE_DEV_ID_X540T:</div><div class='del'>-		/* check eeprom to see if enabled wol */</div><div class='del'>-		if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||</div><div class='del'>-		    ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &amp;&amp;</div><div class='del'>-		     (hw-&gt;bus.func == 0))) {</div><div class='del'>-			retval = 0;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+	int retval = 0;</div><div class='ctx'> </div><div class='del'>-		/* All others not supported */</div><div class='del'>-		wol-&gt;supported = 0;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='add'>+	/* WOL not supported for all devices */</div><div class='add'>+	if (!ixgbe_wol_supported(adapter, hw-&gt;device_id,</div><div class='add'>+				 hw-&gt;subsystem_device_id)) {</div><div class='add'>+		retval = 1;</div><div class='ctx'> 		wol-&gt;supported = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2753,6 +2696,46 @@ static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ixgbe_get_ts_info(struct net_device *dev,</div><div class='add'>+			     struct ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	switch (adapter-&gt;hw.mac.type) {</div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	case ixgbe_mac_X540:</div><div class='add'>+	case ixgbe_mac_82599EB:</div><div class='add'>+		info-&gt;so_timestamping =</div><div class='add'>+			SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+			SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+			SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+</div><div class='add'>+		if (adapter-&gt;ptp_clock)</div><div class='add'>+			info-&gt;phc_index = ptp_clock_index(adapter-&gt;ptp_clock);</div><div class='add'>+		else</div><div class='add'>+			info-&gt;phc_index = -1;</div><div class='add'>+</div><div class='add'>+		info-&gt;tx_types =</div><div class='add'>+			(1 &lt;&lt; HWTSTAMP_TX_OFF) |</div><div class='add'>+			(1 &lt;&lt; HWTSTAMP_TX_ON);</div><div class='add'>+</div><div class='add'>+		info-&gt;rx_filters =</div><div class='add'>+			(1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='add'>+			(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |</div><div class='add'>+			(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |</div><div class='add'>+			(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_SYNC) |</div><div class='add'>+			(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |</div><div class='add'>+			(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_EVENT) |</div><div class='add'>+			(1 &lt;&lt; HWTSTAMP_FILTER_SOME);</div><div class='add'>+		break;</div><div class='add'>+#endif /* CONFIG_IXGBE_PTP */</div><div class='add'>+	default:</div><div class='add'>+		return ethtool_op_get_ts_info(dev, info);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ethtool_ops ixgbe_ethtool_ops = {</div><div class='ctx'> 	.get_settings           = ixgbe_get_settings,</div><div class='ctx'> 	.set_settings           = ixgbe_set_settings,</div><div class='hunk'>@@ -2781,6 +2764,7 @@ static const struct ethtool_ops ixgbe_ethtool_ops = {</div><div class='ctx'> 	.set_coalesce           = ixgbe_set_coalesce,</div><div class='ctx'> 	.get_rxnfc		= ixgbe_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc		= ixgbe_set_rxnfc,</div><div class='add'>+	.get_ts_info		= ixgbe_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void ixgbe_set_ethtool_ops(struct net_device *netdev)</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c<br/>index 77ea4b716535..bc07933d67da 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c</a></div><div class='hunk'>@@ -437,6 +437,7 @@ int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((fh-&gt;fh_r_ctl == FC_RCTL_DD_SOL_DATA) &amp;&amp;</div><div class='ctx'> 	    (fctl &amp; FC_FC_END_SEQ)) {</div><div class='add'>+		skb_linearize(skb);</div><div class='ctx'> 		crc = (struct fcoe_crc_eof *)skb_put(skb, sizeof(*crc));</div><div class='ctx'> 		crc-&gt;fcoe_eof = FC_EOF_T;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c<br/>index ed1b47dc0834..af1a5314b494 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c</a></div><div class='hunk'>@@ -523,11 +523,17 @@ static void ixgbe_add_ring(struct ixgbe_ring *ring,</div><div class='ctx'> /**</div><div class='ctx'>  * ixgbe_alloc_q_vector - Allocate memory for a single interrupt vector</div><div class='ctx'>  * @adapter: board private structure to initialize</div><div class='add'>+ * @v_count: q_vectors allocated on adapter, used for ring interleaving</div><div class='ctx'>  * @v_idx: index of vector in adapter struct</div><div class='add'>+ * @txr_count: total number of Tx rings to allocate</div><div class='add'>+ * @txr_idx: index of first Tx ring to allocate</div><div class='add'>+ * @rxr_count: total number of Rx rings to allocate</div><div class='add'>+ * @rxr_idx: index of first Rx ring to allocate</div><div class='ctx'>  *</div><div class='ctx'>  * We allocate one q_vector.  If allocation fails we return -ENOMEM.</div><div class='ctx'>  **/</div><div class='del'>-static int ixgbe_alloc_q_vector(struct ixgbe_adapter *adapter, int v_idx,</div><div class='add'>+static int ixgbe_alloc_q_vector(struct ixgbe_adapter *adapter,</div><div class='add'>+				int v_count, int v_idx,</div><div class='ctx'> 				int txr_count, int txr_idx,</div><div class='ctx'> 				int rxr_count, int rxr_idx)</div><div class='ctx'> {</div><div class='hunk'>@@ -598,7 +604,7 @@ static int ixgbe_alloc_q_vector(struct ixgbe_adapter *adapter, int v_idx,</div><div class='ctx'> </div><div class='ctx'> 		/* update count and index */</div><div class='ctx'> 		txr_count--;</div><div class='del'>-		txr_idx++;</div><div class='add'>+		txr_idx += v_count;</div><div class='ctx'> </div><div class='ctx'> 		/* push pointer to next ring */</div><div class='ctx'> 		ring++;</div><div class='hunk'>@@ -641,7 +647,7 @@ static int ixgbe_alloc_q_vector(struct ixgbe_adapter *adapter, int v_idx,</div><div class='ctx'> </div><div class='ctx'> 		/* update count and index */</div><div class='ctx'> 		rxr_count--;</div><div class='del'>-		rxr_idx++;</div><div class='add'>+		rxr_idx += v_count;</div><div class='ctx'> </div><div class='ctx'> 		/* push pointer to next ring */</div><div class='ctx'> 		ring++;</div><div class='hunk'>@@ -700,24 +706,23 @@ static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		q_vectors = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (q_vectors &gt;= (rxr_remaining + txr_remaining)) {</div><div class='del'>-		for (; rxr_remaining; v_idx++, q_vectors--) {</div><div class='del'>-			int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);</div><div class='del'>-			err = ixgbe_alloc_q_vector(adapter, v_idx,</div><div class='del'>-						   0, 0, rqpv, rxr_idx);</div><div class='add'>+		for (; rxr_remaining; v_idx++) {</div><div class='add'>+			err = ixgbe_alloc_q_vector(adapter, q_vectors, v_idx,</div><div class='add'>+						   0, 0, 1, rxr_idx);</div><div class='ctx'> </div><div class='ctx'> 			if (err)</div><div class='ctx'> 				goto err_out;</div><div class='ctx'> </div><div class='ctx'> 			/* update counts and index */</div><div class='del'>-			rxr_remaining -= rqpv;</div><div class='del'>-			rxr_idx += rqpv;</div><div class='add'>+			rxr_remaining--;</div><div class='add'>+			rxr_idx++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (; q_vectors; v_idx++, q_vectors--) {</div><div class='del'>-		int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);</div><div class='del'>-		int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors);</div><div class='del'>-		err = ixgbe_alloc_q_vector(adapter, v_idx,</div><div class='add'>+	for (; v_idx &lt; q_vectors; v_idx++) {</div><div class='add'>+		int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);</div><div class='add'>+		int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);</div><div class='add'>+		err = ixgbe_alloc_q_vector(adapter, q_vectors, v_idx,</div><div class='ctx'> 					   tqpv, txr_idx,</div><div class='ctx'> 					   rqpv, rxr_idx);</div><div class='ctx'> </div><div class='hunk'>@@ -726,9 +731,9 @@ static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 		/* update counts and index */</div><div class='ctx'> 		rxr_remaining -= rqpv;</div><div class='del'>-		rxr_idx += rqpv;</div><div class='ctx'> 		txr_remaining -= tqpv;</div><div class='del'>-		txr_idx += tqpv;</div><div class='add'>+		rxr_idx++;</div><div class='add'>+		txr_idx++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c<br/>index a7f3cd872caf..bf20457ea23a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_main.c</a></div><div class='hunk'>@@ -63,8 +63,8 @@ static char ixgbe_default_device_descr[] =</div><div class='ctx'> 			      "Intel(R) 10 Gigabit Network Connection";</div><div class='ctx'> #endif</div><div class='ctx'> #define MAJ 3</div><div class='del'>-#define MIN 8</div><div class='del'>-#define BUILD 21</div><div class='add'>+#define MIN 9</div><div class='add'>+#define BUILD 15</div><div class='ctx'> #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \</div><div class='ctx'> 	__stringify(BUILD) "-k"</div><div class='ctx'> const char ixgbe_driver_version[] = DRV_VERSION;</div><div class='hunk'>@@ -133,7 +133,7 @@ static struct notifier_block dca_notifier = {</div><div class='ctx'> static unsigned int max_vfs;</div><div class='ctx'> module_param(max_vfs, uint, 0);</div><div class='ctx'> MODULE_PARM_DESC(max_vfs,</div><div class='del'>-		 "Maximum number of virtual functions to allocate per physical function");</div><div class='add'>+		 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63");</div><div class='ctx'> #endif /* CONFIG_PCI_IOV */</div><div class='ctx'> </div><div class='ctx'> static unsigned int allow_unsupported_sfp;</div><div class='hunk'>@@ -610,35 +610,50 @@ void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,</div><div class='ctx'> 	/* tx_buffer must be completely set up in the transmit path */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)</div><div class='add'>+static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	struct ixgbe_hw_stats *hwstats = &amp;adapter-&gt;stats;</div><div class='del'>-	u32 data = 0;</div><div class='del'>-	u32 xoff[8] = {0};</div><div class='ctx'> 	int i;</div><div class='add'>+	u32 data;</div><div class='ctx'> </div><div class='del'>-	if ((hw-&gt;fc.current_mode == ixgbe_fc_full) ||</div><div class='del'>-	    (hw-&gt;fc.current_mode == ixgbe_fc_rx_pause)) {</div><div class='del'>-		switch (hw-&gt;mac.type) {</div><div class='del'>-		case ixgbe_mac_82598EB:</div><div class='del'>-			data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);</div><div class='del'>-		}</div><div class='del'>-		hwstats-&gt;lxoffrxc += data;</div><div class='add'>+	if ((hw-&gt;fc.current_mode != ixgbe_fc_full) &amp;&amp;</div><div class='add'>+	    (hw-&gt;fc.current_mode != ixgbe_fc_rx_pause))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-		/* refill credits (no tx hang) if we received xoff */</div><div class='del'>-		if (!data)</div><div class='del'>-			return;</div><div class='add'>+	switch (hw-&gt;mac.type) {</div><div class='add'>+	case ixgbe_mac_82598EB:</div><div class='add'>+		data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);</div><div class='add'>+	}</div><div class='add'>+	hwstats-&gt;lxoffrxc += data;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; adapter-&gt;num_tx_queues; i++)</div><div class='del'>-			clear_bit(__IXGBE_HANG_CHECK_ARMED,</div><div class='del'>-				  &amp;adapter-&gt;tx_ring[i]-&gt;state);</div><div class='add'>+	/* refill credits (no tx hang) if we received xoff */</div><div class='add'>+	if (!data)</div><div class='ctx'> 		return;</div><div class='del'>-	} else if (!(adapter-&gt;dcb_cfg.pfc_mode_enable))</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_tx_queues; i++)</div><div class='add'>+		clear_bit(__IXGBE_HANG_CHECK_ARMED,</div><div class='add'>+			  &amp;adapter-&gt;tx_ring[i]-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct ixgbe_hw_stats *hwstats = &amp;adapter-&gt;stats;</div><div class='add'>+	u32 xoff[8] = {0};</div><div class='add'>+	int i;</div><div class='add'>+	bool pfc_en = adapter-&gt;dcb_cfg.pfc_mode_enable;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;ixgbe_ieee_pfc)</div><div class='add'>+		pfc_en |= !!(adapter-&gt;ixgbe_ieee_pfc-&gt;pfc_en);</div><div class='add'>+</div><div class='add'>+	if (!(adapter-&gt;flags &amp; IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {</div><div class='add'>+		ixgbe_update_xoff_rx_lfc(adapter);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* update stats for each tc, only valid with PFC enabled */</div><div class='ctx'> 	for (i = 0; i &lt; MAX_TX_PACKET_BUFFERS; i++) {</div><div class='hunk'>@@ -774,6 +789,13 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,</div><div class='ctx'> 		total_bytes += tx_buffer-&gt;bytecount;</div><div class='ctx'> 		total_packets += tx_buffer-&gt;gso_segs;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+		if (unlikely(tx_buffer-&gt;tx_flags &amp;</div><div class='add'>+			     IXGBE_TX_FLAGS_TSTAMP))</div><div class='add'>+			ixgbe_ptp_tx_hwtstamp(q_vector,</div><div class='add'>+					      tx_buffer-&gt;skb);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='ctx'> 		/* free the skb */</div><div class='ctx'> 		dev_kfree_skb_any(tx_buffer-&gt;skb);</div><div class='ctx'> </div><div class='hunk'>@@ -1144,7 +1166,7 @@ static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,</div><div class='ctx'> 	 * there isn't much point in holding memory we can't use</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (dma_mapping_error(rx_ring-&gt;dev, dma)) {</div><div class='del'>-		put_page(page);</div><div class='add'>+		__free_pages(page, ixgbe_rx_pg_order(rx_ring));</div><div class='ctx'> 		bi-&gt;page = NULL;</div><div class='ctx'> </div><div class='ctx'> 		rx_ring-&gt;rx_stats.alloc_rx_page_failed++;</div><div class='hunk'>@@ -1374,6 +1396,11 @@ static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,</div><div class='ctx'> </div><div class='ctx'> 	ixgbe_rx_checksum(rx_ring, rx_desc, skb);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS))</div><div class='add'>+		ixgbe_ptp_rx_hwtstamp(rx_ring-&gt;q_vector, skb);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {</div><div class='ctx'> 		u16 vid = le16_to_cpu(rx_desc-&gt;wb.upper.vlan);</div><div class='ctx'> 		__vlan_hwaccel_put_tag(skb, vid);</div><div class='hunk'>@@ -2295,6 +2322,9 @@ static irqreturn_t ixgbe_msix_other(int irq, void *data)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ixgbe_check_fan_failure(adapter, eicr);</div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	ixgbe_ptp_check_pps_event(adapter, eicr);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/* re-enable the original interrupt state, no lsc, no queues */</div><div class='ctx'> 	if (!test_bit(__IXGBE_DOWN, &amp;adapter-&gt;state))</div><div class='hunk'>@@ -2487,6 +2517,9 @@ static irqreturn_t ixgbe_intr(int irq, void *data)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ixgbe_check_fan_failure(adapter, eicr);</div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	ixgbe_ptp_check_pps_event(adapter, eicr);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/* would disable interrupts here but EIAM disabled it */</div><div class='ctx'> 	napi_schedule(&amp;q_vector-&gt;napi);</div><div class='hunk'>@@ -2671,8 +2704,6 @@ void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	/* enable queue */</div><div class='ctx'> 	IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);</div><div class='ctx'> </div><div class='del'>-	netdev_tx_reset_queue(txring_txq(ring));</div><div class='del'>-</div><div class='ctx'> 	/* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */</div><div class='ctx'> 	if (hw-&gt;mac.type == ixgbe_mac_82598EB &amp;&amp;</div><div class='ctx'> 	    !(IXGBE_READ_REG(hw, IXGBE_LINKS) &amp; IXGBE_LINKS_UP))</div><div class='hunk'>@@ -2758,6 +2789,61 @@ static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		ixgbe_configure_tx_ring(adapter, adapter-&gt;tx_ring[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,</div><div class='add'>+				 struct ixgbe_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u8 reg_idx = ring-&gt;reg_idx;</div><div class='add'>+	u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));</div><div class='add'>+</div><div class='add'>+	srrctl |= IXGBE_SRRCTL_DROP_EN;</div><div class='add'>+</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,</div><div class='add'>+				  struct ixgbe_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u8 reg_idx = ring-&gt;reg_idx;</div><div class='add'>+	u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));</div><div class='add'>+</div><div class='add'>+	srrctl &amp;= ~IXGBE_SRRCTL_DROP_EN;</div><div class='add'>+</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IXGBE_DCB</div><div class='add'>+void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)</div><div class='add'>+#else</div><div class='add'>+static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)</div><div class='add'>+#endif</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	bool pfc_en = adapter-&gt;dcb_cfg.pfc_mode_enable;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;ixgbe_ieee_pfc)</div><div class='add'>+		pfc_en |= !!(adapter-&gt;ixgbe_ieee_pfc-&gt;pfc_en);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We should set the drop enable bit if:</div><div class='add'>+	 *  SR-IOV is enabled</div><div class='add'>+	 *   or</div><div class='add'>+	 *  Number of Rx queues &gt; 1 and flow control is disabled</div><div class='add'>+	 *</div><div class='add'>+	 *  This allows us to avoid head of line blocking for security</div><div class='add'>+	 *  and performance reasons.</div><div class='add'>+	 */</div><div class='add'>+	if (adapter-&gt;num_vfs || (adapter-&gt;num_rx_queues &gt; 1 &amp;&amp;</div><div class='add'>+	    !(adapter-&gt;hw.fc.current_mode &amp; ixgbe_fc_tx_pause) &amp;&amp; !pfc_en)) {</div><div class='add'>+		for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++)</div><div class='add'>+			ixgbe_enable_rx_drop(adapter, adapter-&gt;rx_ring[i]);</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++)</div><div class='add'>+			ixgbe_disable_rx_drop(adapter, adapter-&gt;rx_ring[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2</div><div class='ctx'> </div><div class='ctx'> static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,</div><div class='hunk'>@@ -2904,33 +2990,6 @@ static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- *  ixgbe_set_uta - Set unicast filter table address</div><div class='del'>- *  @adapter: board private structure</div><div class='del'>- *</div><div class='del'>- *  The unicast table address is a register array of 32-bit registers.</div><div class='del'>- *  The table is meant to be used in a way similar to how the MTA is used</div><div class='del'>- *  however due to certain limitations in the hardware it is necessary to</div><div class='del'>- *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous</div><div class='del'>- *  enable bit to allow vlan tag stripping when promiscuous mode is enabled</div><div class='del'>- **/</div><div class='del'>-static void ixgbe_set_uta(struct ixgbe_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* The UTA table only exists on 82599 hardware and newer */</div><div class='del'>-	if (hw-&gt;mac.type &lt; ixgbe_mac_82599EB)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* we only need to do this if VMDq is enabled */</div><div class='del'>-	if (!(adapter-&gt;flags &amp; IXGBE_FLAG_SRIOV_ENABLED))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 128; i++)</div><div class='del'>-		IXGBE_WRITE_REG(hw, IXGBE_UTA(i), ~0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define IXGBE_MAX_RX_DESC_POLL 10</div><div class='ctx'> static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,</div><div class='ctx'> 				       struct ixgbe_ring *ring)</div><div class='hunk'>@@ -3216,8 +3275,6 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	/* Program registers for the distribution of queues */</div><div class='ctx'> 	ixgbe_setup_mrqc(adapter);</div><div class='ctx'> </div><div class='del'>-	ixgbe_set_uta(adapter);</div><div class='del'>-</div><div class='ctx'> 	/* set_rx_buffer_len must be called before ring initialization */</div><div class='ctx'> 	ixgbe_set_rx_buffer_len(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -3454,16 +3511,17 @@ void ixgbe_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> 		}</div><div class='ctx'> 		ixgbe_vlan_filter_enable(adapter);</div><div class='ctx'> 		hw-&gt;addr_ctrl.user_set_promisc = false;</div><div class='del'>-		/*</div><div class='del'>-		 * Write addresses to available RAR registers, if there is not</div><div class='del'>-		 * sufficient space to store all the addresses then enable</div><div class='del'>-		 * unicast promiscuous mode</div><div class='del'>-		 */</div><div class='del'>-		count = ixgbe_write_uc_addr_list(netdev);</div><div class='del'>-		if (count &lt; 0) {</div><div class='del'>-			fctrl |= IXGBE_FCTRL_UPE;</div><div class='del'>-			vmolr |= IXGBE_VMOLR_ROPE;</div><div class='del'>-		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Write addresses to available RAR registers, if there is not</div><div class='add'>+	 * sufficient space to store all the addresses then enable</div><div class='add'>+	 * unicast promiscuous mode</div><div class='add'>+	 */</div><div class='add'>+	count = ixgbe_write_uc_addr_list(netdev);</div><div class='add'>+	if (count &lt; 0) {</div><div class='add'>+		fctrl |= IXGBE_FCTRL_UPE;</div><div class='add'>+		vmolr |= IXGBE_VMOLR_ROPE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;num_vfs) {</div><div class='hunk'>@@ -4130,7 +4188,8 @@ static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)</div><div class='ctx'> 				       DMA_FROM_DEVICE);</div><div class='ctx'> 		rx_buffer-&gt;dma = 0;</div><div class='ctx'> 		if (rx_buffer-&gt;page)</div><div class='del'>-			put_page(rx_buffer-&gt;page);</div><div class='add'>+			__free_pages(rx_buffer-&gt;page,</div><div class='add'>+				     ixgbe_rx_pg_order(rx_ring));</div><div class='ctx'> 		rx_buffer-&gt;page = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4167,6 +4226,8 @@ static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)</div><div class='ctx'> 		ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netdev_tx_reset_queue(txring_txq(tx_ring));</div><div class='add'>+</div><div class='ctx'> 	size = sizeof(struct ixgbe_tx_buffer) * tx_ring-&gt;count;</div><div class='ctx'> 	memset(tx_ring-&gt;tx_buffer_info, 0, size);</div><div class='ctx'> </div><div class='hunk'>@@ -4418,17 +4479,14 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	adapter-&gt;dcb_cfg.pfc_mode_enable = false;</div><div class='ctx'> 	adapter-&gt;dcb_set_bitmap = 0x00;</div><div class='ctx'> 	adapter-&gt;dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;</div><div class='del'>-	ixgbe_copy_dcb_cfg(&amp;adapter-&gt;dcb_cfg, &amp;adapter-&gt;temp_dcb_cfg,</div><div class='del'>-			   MAX_TRAFFIC_CLASS);</div><div class='add'>+	memcpy(&amp;adapter-&gt;temp_dcb_cfg, &amp;adapter-&gt;dcb_cfg,</div><div class='add'>+	       sizeof(adapter-&gt;temp_dcb_cfg));</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* default flow control settings */</div><div class='ctx'> 	hw-&gt;fc.requested_mode = ixgbe_fc_full;</div><div class='ctx'> 	hw-&gt;fc.current_mode = ixgbe_fc_full;	/* init for ethtool output */</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	adapter-&gt;last_lfc_mode = hw-&gt;fc.current_mode;</div><div class='del'>-#endif</div><div class='ctx'> 	ixgbe_pbthresh_setup(adapter);</div><div class='ctx'> 	hw-&gt;fc.pause_time = IXGBE_DEFAULT_FCPAUSE;</div><div class='ctx'> 	hw-&gt;fc.send_xon = true;</div><div class='hunk'>@@ -4866,17 +4924,15 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)</div><div class='ctx'> 	netif_device_detach(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(netdev)) {</div><div class='add'>+		rtnl_lock();</div><div class='ctx'> 		ixgbe_down(adapter);</div><div class='ctx'> 		ixgbe_free_irq(adapter);</div><div class='ctx'> 		ixgbe_free_all_tx_resources(adapter);</div><div class='ctx'> 		ixgbe_free_all_rx_resources(adapter);</div><div class='add'>+		rtnl_unlock();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ixgbe_clear_interrupt_scheme(adapter);</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	kfree(adapter-&gt;ixgbe_ieee_pfc);</div><div class='del'>-	kfree(adapter-&gt;ixgbe_ieee_ets);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> 	retval = pci_save_state(pdev);</div><div class='hunk'>@@ -4995,9 +5051,6 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	if (adapter-&gt;flags2 &amp; IXGBE_FLAG2_RSC_ENABLED) {</div><div class='ctx'> 		u64 rsc_count = 0;</div><div class='ctx'> 		u64 rsc_flush = 0;</div><div class='del'>-		for (i = 0; i &lt; 16; i++)</div><div class='del'>-			adapter-&gt;hw_rx_no_dma_resources +=</div><div class='del'>-				IXGBE_READ_REG(hw, IXGBE_QPRDC(i));</div><div class='ctx'> 		for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++) {</div><div class='ctx'> 			rsc_count += adapter-&gt;rx_ring[i]-&gt;rx_stats.rsc_count;</div><div class='ctx'> 			rsc_flush += adapter-&gt;rx_ring[i]-&gt;rx_stats.rsc_flush;</div><div class='hunk'>@@ -5100,6 +5153,9 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		hwstats-&gt;b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);</div><div class='ctx'> 		hwstats-&gt;b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);</div><div class='ctx'> 	case ixgbe_mac_82599EB:</div><div class='add'>+		for (i = 0; i &lt; 16; i++)</div><div class='add'>+			adapter-&gt;hw_rx_no_dma_resources +=</div><div class='add'>+					     IXGBE_READ_REG(hw, IXGBE_QPRDC(i));</div><div class='ctx'> 		hwstats-&gt;gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);</div><div class='ctx'> 		IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */</div><div class='ctx'> 		hwstats-&gt;gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);</div><div class='hunk'>@@ -5277,7 +5333,7 @@ static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 link_speed = adapter-&gt;link_speed;</div><div class='ctx'> 	bool link_up = adapter-&gt;link_up;</div><div class='del'>-	int i;</div><div class='add'>+	bool pfc_en = adapter-&gt;dcb_cfg.pfc_mode_enable;</div><div class='ctx'> </div><div class='ctx'> 	if (!(adapter-&gt;flags &amp; IXGBE_FLAG_NEED_LINK_UPDATE))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -5289,13 +5345,13 @@ static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		link_speed = IXGBE_LINK_SPEED_10GB_FULL;</div><div class='ctx'> 		link_up = true;</div><div class='ctx'> 	}</div><div class='del'>-	if (link_up) {</div><div class='del'>-		if (adapter-&gt;flags &amp; IXGBE_FLAG_DCB_ENABLED) {</div><div class='del'>-			for (i = 0; i &lt; MAX_TRAFFIC_CLASS; i++)</div><div class='del'>-				hw-&gt;mac.ops.fc_enable(hw, i);</div><div class='del'>-		} else {</div><div class='del'>-			hw-&gt;mac.ops.fc_enable(hw, 0);</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;ixgbe_ieee_pfc)</div><div class='add'>+		pfc_en |= !!(adapter-&gt;ixgbe_ieee_pfc-&gt;pfc_en);</div><div class='add'>+</div><div class='add'>+	if (link_up &amp;&amp; !((adapter-&gt;flags &amp; IXGBE_FLAG_DCB_ENABLED) &amp;&amp; pfc_en)) {</div><div class='add'>+		hw-&gt;mac.ops.fc_enable(hw);</div><div class='add'>+		ixgbe_set_rx_drop_en(adapter);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (link_up ||</div><div class='hunk'>@@ -5349,6 +5405,11 @@ static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		flow_rx = false;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	ixgbe_ptp_start_cyclecounter(adapter);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",</div><div class='ctx'> 	       (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?</div><div class='ctx'> 	       "10 Gbps" :</div><div class='hunk'>@@ -5386,6 +5447,10 @@ static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	if (ixgbe_is_sfp(hw) &amp;&amp; hw-&gt;mac.type == ixgbe_mac_82598EB)</div><div class='ctx'> 		adapter-&gt;flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	ixgbe_ptp_start_cyclecounter(adapter);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	e_info(drv, "NIC Link is Down\n");</div><div class='ctx'> 	netif_carrier_off(netdev);</div><div class='ctx'> }</div><div class='hunk'>@@ -5685,6 +5750,9 @@ static void ixgbe_service_task(struct work_struct *work)</div><div class='ctx'> 	ixgbe_watchdog_subtask(adapter);</div><div class='ctx'> 	ixgbe_fdir_reinit_subtask(adapter);</div><div class='ctx'> 	ixgbe_check_hang_subtask(adapter);</div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	ixgbe_ptp_overflow_check(adapter);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	ixgbe_service_event_complete(adapter);</div><div class='ctx'> }</div><div class='hunk'>@@ -5835,6 +5903,11 @@ static __le32 ixgbe_tx_cmd_type(u32 tx_flags)</div><div class='ctx'> 	if (tx_flags &amp; IXGBE_TX_FLAGS_HW_VLAN)</div><div class='ctx'> 		cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	if (tx_flags &amp; IXGBE_TX_FLAGS_TSTAMP)</div><div class='add'>+		cmd_type |= cpu_to_le32(IXGBE_ADVTXD_MAC_TSTAMP);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	/* set segmentation enable bits for TSO/FSO */</div><div class='ctx'> #ifdef IXGBE_FCOE</div><div class='ctx'> 	if (tx_flags &amp; (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_FSO))</div><div class='hunk'>@@ -6225,6 +6298,15 @@ netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,</div><div class='ctx'> 		tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	if (unlikely(skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP)) {</div><div class='add'>+		skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+		tx_flags |= IXGBE_TX_FLAGS_TSTAMP;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PCI_IOV</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Use the l2switch_enable flag - would be false if the DMA</div><div class='hunk'>@@ -6377,7 +6459,14 @@ static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	return mdio_mii_ioctl(&amp;adapter-&gt;hw.phy.mdio, if_mii(req), cmd);</div><div class='add'>+	switch (cmd) {</div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	case SIOCSHWTSTAMP:</div><div class='add'>+		return ixgbe_ptp_hwtstamp_ioctl(adapter, req, cmd);</div><div class='add'>+#endif</div><div class='add'>+	default:</div><div class='add'>+		return mdio_mii_ioctl(&amp;adapter-&gt;hw.phy.mdio, if_mii(req), cmd);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -6569,15 +6658,17 @@ int ixgbe_setup_tc(struct net_device *dev, u8 tc)</div><div class='ctx'> </div><div class='ctx'> 	if (tc) {</div><div class='ctx'> 		netdev_set_num_tc(dev, tc);</div><div class='del'>-		adapter-&gt;last_lfc_mode = adapter-&gt;hw.fc.current_mode;</div><div class='ctx'> 		adapter-&gt;flags |= IXGBE_FLAG_DCB_ENABLED;</div><div class='ctx'> 		adapter-&gt;flags &amp;= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;</div><div class='ctx'> </div><div class='del'>-		if (adapter-&gt;hw.mac.type == ixgbe_mac_82598EB)</div><div class='add'>+		if (adapter-&gt;hw.mac.type == ixgbe_mac_82598EB) {</div><div class='add'>+			adapter-&gt;last_lfc_mode = adapter-&gt;hw.fc.requested_mode;</div><div class='ctx'> 			adapter-&gt;hw.fc.requested_mode = ixgbe_fc_none;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		netdev_reset_tc(dev);</div><div class='del'>-		adapter-&gt;hw.fc.requested_mode = adapter-&gt;last_lfc_mode;</div><div class='add'>+		if (adapter-&gt;hw.mac.type == ixgbe_mac_82598EB)</div><div class='add'>+			adapter-&gt;hw.fc.requested_mode = adapter-&gt;last_lfc_mode;</div><div class='ctx'> </div><div class='ctx'> 		adapter-&gt;flags &amp;= ~IXGBE_FLAG_DCB_ENABLED;</div><div class='ctx'> 		adapter-&gt;flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;</div><div class='hunk'>@@ -6626,7 +6717,7 @@ static netdev_features_t ixgbe_fix_features(struct net_device *netdev,</div><div class='ctx'> 	/* Turn off LRO if not RSC capable */</div><div class='ctx'> 	if (!(adapter-&gt;flags2 &amp; IXGBE_FLAG2_RSC_CAPABLE))</div><div class='ctx'> 		features &amp;= ~NETIF_F_LRO;</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	return features;</div><div class='ctx'> }</div><div class='hunk'>@@ -6685,6 +6776,74 @@ static int ixgbe_set_features(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ixgbe_ndo_fdb_add(struct ndmsg *ndm,</div><div class='add'>+			     struct net_device *dev,</div><div class='add'>+			     unsigned char *addr,</div><div class='add'>+			     u16 flags)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	int err = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (ndm-&gt;ndm_state &amp; NUD_PERMANENT) {</div><div class='add'>+		pr_info("%s: FDB only supports static addresses\n",</div><div class='add'>+			ixgbe_driver_name);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;flags &amp; IXGBE_FLAG_SRIOV_ENABLED) {</div><div class='add'>+		if (is_unicast_ether_addr(addr))</div><div class='add'>+			err = dev_uc_add_excl(dev, addr);</div><div class='add'>+		else if (is_multicast_ether_addr(addr))</div><div class='add'>+			err = dev_mc_add_excl(dev, addr);</div><div class='add'>+		else</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Only return duplicate errors if NLM_F_EXCL is set */</div><div class='add'>+	if (err == -EEXIST &amp;&amp; !(flags &amp; NLM_F_EXCL))</div><div class='add'>+		err = 0;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ixgbe_ndo_fdb_del(struct ndmsg *ndm,</div><div class='add'>+			     struct net_device *dev,</div><div class='add'>+			     unsigned char *addr)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	int err = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (ndm-&gt;ndm_state &amp; NUD_PERMANENT) {</div><div class='add'>+		pr_info("%s: FDB only supports static addresses\n",</div><div class='add'>+			ixgbe_driver_name);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;flags &amp; IXGBE_FLAG_SRIOV_ENABLED) {</div><div class='add'>+		if (is_unicast_ether_addr(addr))</div><div class='add'>+			err = dev_uc_del(dev, addr);</div><div class='add'>+		else if (is_multicast_ether_addr(addr))</div><div class='add'>+			err = dev_mc_del(dev, addr);</div><div class='add'>+		else</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ixgbe_ndo_fdb_dump(struct sk_buff *skb,</div><div class='add'>+			      struct netlink_callback *cb,</div><div class='add'>+			      struct net_device *dev,</div><div class='add'>+			      int idx)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;flags &amp; IXGBE_FLAG_SRIOV_ENABLED)</div><div class='add'>+		idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);</div><div class='add'>+</div><div class='add'>+	return idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops ixgbe_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= ixgbe_open,</div><div class='ctx'> 	.ndo_stop		= ixgbe_close,</div><div class='hunk'>@@ -6721,6 +6880,9 @@ static const struct net_device_ops ixgbe_netdev_ops = {</div><div class='ctx'> #endif /* IXGBE_FCOE */</div><div class='ctx'> 	.ndo_set_features = ixgbe_set_features,</div><div class='ctx'> 	.ndo_fix_features = ixgbe_fix_features,</div><div class='add'>+	.ndo_fdb_add		= ixgbe_ndo_fdb_add,</div><div class='add'>+	.ndo_fdb_del		= ixgbe_ndo_fdb_del,</div><div class='add'>+	.ndo_fdb_dump		= ixgbe_ndo_fdb_dump,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter,</div><div class='hunk'>@@ -6735,14 +6897,66 @@ static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	/* The 82599 supports up to 64 VFs per physical function</div><div class='ctx'> 	 * but this implementation limits allocation to 63 so that</div><div class='ctx'> 	 * basic networking resources are still available to the</div><div class='del'>-	 * physical function</div><div class='add'>+	 * physical function.  If the user requests greater thn</div><div class='add'>+	 * 63 VFs then it is an error - reset to default of zero.</div><div class='ctx'> 	 */</div><div class='del'>-	adapter-&gt;num_vfs = (max_vfs &gt; 63) ? 63 : max_vfs;</div><div class='add'>+	adapter-&gt;num_vfs = (max_vfs &gt; 63) ? 0 : max_vfs;</div><div class='ctx'> 	ixgbe_enable_sriov(adapter, ii);</div><div class='ctx'> #endif /* CONFIG_PCI_IOV */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ixgbe_wol_supported - Check whether device supports WoL</div><div class='add'>+ * @hw: hw specific details</div><div class='add'>+ * @device_id: the device ID</div><div class='add'>+ * @subdev_id: the subsystem device ID</div><div class='add'>+ *</div><div class='add'>+ * This function is used by probe and ethtool to determine</div><div class='add'>+ * which devices have WoL support</div><div class='add'>+ *</div><div class='add'>+ **/</div><div class='add'>+int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,</div><div class='add'>+			u16 subdevice_id)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u16 wol_cap = adapter-&gt;eeprom_cap &amp; IXGBE_DEVICE_CAPS_WOL_MASK;</div><div class='add'>+	int is_wol_supported = 0;</div><div class='add'>+</div><div class='add'>+	switch (device_id) {</div><div class='add'>+	case IXGBE_DEV_ID_82599_SFP:</div><div class='add'>+		/* Only these subdevices could supports WOL */</div><div class='add'>+		switch (subdevice_id) {</div><div class='add'>+		case IXGBE_SUBDEV_ID_82599_560FLR:</div><div class='add'>+			/* only support first port */</div><div class='add'>+			if (hw-&gt;bus.func != 0)</div><div class='add'>+				break;</div><div class='add'>+		case IXGBE_SUBDEV_ID_82599_SFP:</div><div class='add'>+			is_wol_supported = 1;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:</div><div class='add'>+		/* All except this subdevice support WOL */</div><div class='add'>+		if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)</div><div class='add'>+			is_wol_supported = 1;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_DEV_ID_82599_KX4:</div><div class='add'>+		is_wol_supported = 1;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_DEV_ID_X540T:</div><div class='add'>+		/* check eeprom to see if enabled wol */</div><div class='add'>+		if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||</div><div class='add'>+		    ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &amp;&amp;</div><div class='add'>+		     (hw-&gt;bus.func == 0))) {</div><div class='add'>+			is_wol_supported = 1;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return is_wol_supported;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ixgbe_probe - Device Initialization Routine</div><div class='ctx'>  * @pdev: PCI device information struct</div><div class='ctx'>  * @ent: entry in ixgbe_pci_tbl</div><div class='hunk'>@@ -6768,7 +6982,6 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,</div><div class='ctx'> 	u16 device_caps;</div><div class='ctx'> #endif</div><div class='ctx'> 	u32 eec;</div><div class='del'>-	u16 wol_cap;</div><div class='ctx'> </div><div class='ctx'> 	/* Catch broken hardware that put the wrong VF device ID in</div><div class='ctx'> 	 * the PCIe SR-IOV capability.</div><div class='hunk'>@@ -7032,42 +7245,18 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,</div><div class='ctx'> 		netdev-&gt;features &amp;= ~NETIF_F_RXHASH;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* WOL not supported for all but the following */</div><div class='add'>+	/* WOL not supported for all devices */</div><div class='ctx'> 	adapter-&gt;wol = 0;</div><div class='del'>-	switch (pdev-&gt;device) {</div><div class='del'>-	case IXGBE_DEV_ID_82599_SFP:</div><div class='del'>-		/* Only these subdevice supports WOL */</div><div class='del'>-		switch (pdev-&gt;subsystem_device) {</div><div class='del'>-		case IXGBE_SUBDEV_ID_82599_560FLR:</div><div class='del'>-			/* only support first port */</div><div class='del'>-			if (hw-&gt;bus.func != 0)</div><div class='del'>-				break;</div><div class='del'>-		case IXGBE_SUBDEV_ID_82599_SFP:</div><div class='del'>-			adapter-&gt;wol = IXGBE_WUFC_MAG;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:</div><div class='del'>-		/* All except this subdevice support WOL */</div><div class='del'>-		if (pdev-&gt;subsystem_device != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)</div><div class='del'>-			adapter-&gt;wol = IXGBE_WUFC_MAG;</div><div class='del'>-		break;</div><div class='del'>-	case IXGBE_DEV_ID_82599_KX4:</div><div class='add'>+	hw-&gt;eeprom.ops.read(hw, 0x2c, &amp;adapter-&gt;eeprom_cap);</div><div class='add'>+	if (ixgbe_wol_supported(adapter, pdev-&gt;device, pdev-&gt;subsystem_device))</div><div class='ctx'> 		adapter-&gt;wol = IXGBE_WUFC_MAG;</div><div class='del'>-		break;</div><div class='del'>-	case IXGBE_DEV_ID_X540T:</div><div class='del'>-		/* Check eeprom to see if it is enabled */</div><div class='del'>-		hw-&gt;eeprom.ops.read(hw, 0x2c, &amp;adapter-&gt;eeprom_cap);</div><div class='del'>-		wol_cap = adapter-&gt;eeprom_cap &amp; IXGBE_DEVICE_CAPS_WOL_MASK;</div><div class='ctx'> </div><div class='del'>-		if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||</div><div class='del'>-		    ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &amp;&amp;</div><div class='del'>-		     (hw-&gt;bus.func == 0)))</div><div class='del'>-			adapter-&gt;wol = IXGBE_WUFC_MAG;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='ctx'> 	device_set_wakeup_enable(&amp;adapter-&gt;pdev-&gt;dev, adapter-&gt;wol);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	ixgbe_ptp_init(adapter);</div><div class='add'>+#endif /* CONFIG_IXGBE_PTP*/</div><div class='add'>+</div><div class='ctx'> 	/* save off EEPROM version number */</div><div class='ctx'> 	hw-&gt;eeprom.ops.read(hw, 0x2e, &amp;adapter-&gt;eeprom_verh);</div><div class='ctx'> 	hw-&gt;eeprom.ops.read(hw, 0x2d, &amp;adapter-&gt;eeprom_verl);</div><div class='hunk'>@@ -7154,6 +7343,12 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	e_dev_info("%s\n", ixgbe_default_device_descr);</div><div class='ctx'> 	cards_found++;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IXGBE_HWMON</div><div class='add'>+	if (ixgbe_sysfs_init(adapter))</div><div class='add'>+		e_err(probe, "failed to allocate sysfs resources\n");</div><div class='add'>+#endif /* CONFIG_IXGBE_HWMON */</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_register:</div><div class='hunk'>@@ -7192,6 +7387,10 @@ static void __devexit ixgbe_remove(struct pci_dev *pdev)</div><div class='ctx'> 	set_bit(__IXGBE_DOWN, &amp;adapter-&gt;state);</div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;service_task);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IXGBE_PTP</div><div class='add'>+	ixgbe_ptp_stop(adapter);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_IXGBE_DCA</div><div class='ctx'> 	if (adapter-&gt;flags &amp; IXGBE_FLAG_DCA_ENABLED) {</div><div class='ctx'> 		adapter-&gt;flags &amp;= ~IXGBE_FLAG_DCA_ENABLED;</div><div class='hunk'>@@ -7200,6 +7399,10 @@ static void __devexit ixgbe_remove(struct pci_dev *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_IXGBE_HWMON</div><div class='add'>+	ixgbe_sysfs_exit(adapter);</div><div class='add'>+#endif /* CONFIG_IXGBE_HWMON */</div><div class='add'>+</div><div class='ctx'> #ifdef IXGBE_FCOE</div><div class='ctx'> 	if (adapter-&gt;flags &amp; IXGBE_FLAG_FCOE_ENABLED)</div><div class='ctx'> 		ixgbe_cleanup_fcoe(adapter);</div><div class='hunk'>@@ -7224,6 +7427,11 @@ static void __devexit ixgbe_remove(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	ixgbe_release_hw_control(adapter);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DCB</div><div class='add'>+	kfree(adapter-&gt;ixgbe_ieee_pfc);</div><div class='add'>+	kfree(adapter-&gt;ixgbe_ieee_ets);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='ctx'> 	iounmap(adapter-&gt;hw.hw_addr);</div><div class='ctx'> 	pci_release_selected_regions(pdev, pci_select_bars(pdev,</div><div class='ctx'> 				     IORESOURCE_MEM));</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c<br/>index bf9f82f4b1ae..24117709d6a2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c</a></div><div class='hunk'>@@ -1582,13 +1582,21 @@ static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data)</div><div class='ctx'>  **/</div><div class='ctx'> static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)</div><div class='ctx'> {</div><div class='del'>-	*i2cctl |= IXGBE_I2C_CLK_OUT;</div><div class='del'>-</div><div class='del'>-	IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl);</div><div class='del'>-	IXGBE_WRITE_FLUSH(hw);</div><div class='add'>+	u32 i = 0;</div><div class='add'>+	u32 timeout = IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT;</div><div class='add'>+	u32 i2cctl_r = 0;</div><div class='ctx'> </div><div class='del'>-	/* SCL rise time (1000ns) */</div><div class='del'>-	udelay(IXGBE_I2C_T_RISE);</div><div class='add'>+	for (i = 0; i &lt; timeout; i++) {</div><div class='add'>+		*i2cctl |= IXGBE_I2C_CLK_OUT;</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl);</div><div class='add'>+		IXGBE_WRITE_FLUSH(hw);</div><div class='add'>+		/* SCL rise time (1000ns) */</div><div class='add'>+		udelay(IXGBE_I2C_T_RISE);</div><div class='add'>+</div><div class='add'>+		i2cctl_r = IXGBE_READ_REG(hw, IXGBE_I2CCTL);</div><div class='add'>+		if (i2cctl_r &amp; IXGBE_I2C_CLK_IN)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c<br/>new file mode 100644<br/>index 000000000000..ddc6a4d19302<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c</a></div><div class='hunk'>@@ -0,0 +1,900 @@</div><div class='add'>+/*******************************************************************************</div><div class='add'>+</div><div class='add'>+  Intel 10 Gigabit PCI Express Linux driver</div><div class='add'>+  Copyright(c) 1999 - 2012 Intel Corporation.</div><div class='add'>+</div><div class='add'>+  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+  under the terms and conditions of the GNU General Public License,</div><div class='add'>+  version 2, as published by the Free Software Foundation.</div><div class='add'>+</div><div class='add'>+  This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+  more details.</div><div class='add'>+</div><div class='add'>+  You should have received a copy of the GNU General Public License along with</div><div class='add'>+  this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+</div><div class='add'>+  The full GNU General Public License is included in this distribution in</div><div class='add'>+  the file called "COPYING".</div><div class='add'>+</div><div class='add'>+  Contact Information:</div><div class='add'>+  e1000-devel Mailing List &lt;e1000-devel@lists.sourceforge.net&gt;</div><div class='add'>+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497</div><div class='add'>+</div><div class='add'>+*******************************************************************************/</div><div class='add'>+#include "ixgbe.h"</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The 82599 and the X540 do not have true 64bit nanosecond scale</div><div class='add'>+ * counter registers. Instead, SYSTIME is defined by a fixed point</div><div class='add'>+ * system which allows the user to define the scale counter increment</div><div class='add'>+ * value at every level change of the oscillator driving the SYSTIME</div><div class='add'>+ * value. For both devices the TIMINCA:IV field defines this</div><div class='add'>+ * increment. On the X540 device, 31 bits are provided. However on the</div><div class='add'>+ * 82599 only provides 24 bits. The time unit is determined by the</div><div class='add'>+ * clock frequency of the oscillator in combination with the TIMINCA</div><div class='add'>+ * register. When these devices link at 10Gb the oscillator has a</div><div class='add'>+ * period of 6.4ns. In order to convert the scale counter into</div><div class='add'>+ * nanoseconds the cyclecounter and timecounter structures are</div><div class='add'>+ * used. The SYSTIME registers need to be converted to ns values by use</div><div class='add'>+ * of only a right shift (division by power of 2). The following math</div><div class='add'>+ * determines the largest incvalue that will fit into the available</div><div class='add'>+ * bits in the TIMINCA register.</div><div class='add'>+ *</div><div class='add'>+ * PeriodWidth: Number of bits to store the clock period</div><div class='add'>+ * MaxWidth: The maximum width value of the TIMINCA register</div><div class='add'>+ * Period: The clock period for the oscillator</div><div class='add'>+ * round(): discard the fractional portion of the calculation</div><div class='add'>+ *</div><div class='add'>+ * Period * [ 2 ^ ( MaxWidth - PeriodWidth ) ]</div><div class='add'>+ *</div><div class='add'>+ * For the X540, MaxWidth is 31 bits, and the base period is 6.4 ns</div><div class='add'>+ * For the 82599, MaxWidth is 24 bits, and the base period is 6.4 ns</div><div class='add'>+ *</div><div class='add'>+ * The period also changes based on the link speed:</div><div class='add'>+ * At 10Gb link or no link, the period remains the same.</div><div class='add'>+ * At 1Gb link, the period is multiplied by 10. (64ns)</div><div class='add'>+ * At 100Mb link, the period is multiplied by 100. (640ns)</div><div class='add'>+ *</div><div class='add'>+ * The calculated value allows us to right shift the SYSTIME register</div><div class='add'>+ * value in order to quickly convert it into a nanosecond clock,</div><div class='add'>+ * while allowing for the maximum possible adjustment value.</div><div class='add'>+ *</div><div class='add'>+ * These diagrams are only for the 10Gb link period</div><div class='add'>+ *</div><div class='add'>+ *           SYSTIMEH            SYSTIMEL</div><div class='add'>+ *       +--------------+  +--------------+</div><div class='add'>+ * X540  |      32      |  | 1 | 3 |  28  |</div><div class='add'>+ *       *--------------+  +--------------+</div><div class='add'>+ *        \________ 36 bits ______/  fract</div><div class='add'>+ *</div><div class='add'>+ *       +--------------+  +--------------+</div><div class='add'>+ * 82599 |      32      |  | 8 | 3 |  21  |</div><div class='add'>+ *       *--------------+  +--------------+</div><div class='add'>+ *        \________ 43 bits ______/  fract</div><div class='add'>+ *</div><div class='add'>+ * The 36 bit X540 SYSTIME overflows every</div><div class='add'>+ *   2^36 * 10^-9 / 60 = 1.14 minutes or 69 seconds</div><div class='add'>+ *</div><div class='add'>+ * The 43 bit 82599 SYSTIME overflows every</div><div class='add'>+ *   2^43 * 10^-9 / 3600 = 2.4 hours</div><div class='add'>+ */</div><div class='add'>+#define IXGBE_INCVAL_10GB 0x66666666</div><div class='add'>+#define IXGBE_INCVAL_1GB  0x40000000</div><div class='add'>+#define IXGBE_INCVAL_100  0x50000000</div><div class='add'>+</div><div class='add'>+#define IXGBE_INCVAL_SHIFT_10GB  28</div><div class='add'>+#define IXGBE_INCVAL_SHIFT_1GB   24</div><div class='add'>+#define IXGBE_INCVAL_SHIFT_100   21</div><div class='add'>+</div><div class='add'>+#define IXGBE_INCVAL_SHIFT_82599 7</div><div class='add'>+#define IXGBE_INCPER_SHIFT_82599 24</div><div class='add'>+#define IXGBE_MAX_TIMEADJ_VALUE  0x7FFFFFFFFFFFFFFFULL</div><div class='add'>+</div><div class='add'>+#define IXGBE_OVERFLOW_PERIOD    (HZ * 30)</div><div class='add'>+</div><div class='add'>+#ifndef NSECS_PER_SEC</div><div class='add'>+#define NSECS_PER_SEC 1000000000ULL</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_read - read raw cycle counter (to be used by time counter)</div><div class='add'>+ * @cc - the cyclecounter structure</div><div class='add'>+ *</div><div class='add'>+ * this function reads the cyclecounter registers and is called by the</div><div class='add'>+ * cyclecounter structure used to construct a ns counter from the</div><div class='add'>+ * arbitrary fixed point registers</div><div class='add'>+ */</div><div class='add'>+static cycle_t ixgbe_ptp_read(const struct cyclecounter *cc)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter =</div><div class='add'>+		container_of(cc, struct ixgbe_adapter, cc);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u64 stamp = 0;</div><div class='add'>+</div><div class='add'>+	stamp |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIML);</div><div class='add'>+	stamp |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIMH) &lt;&lt; 32;</div><div class='add'>+</div><div class='add'>+	return stamp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_adjfreq</div><div class='add'>+ * @ptp - the ptp clock structure</div><div class='add'>+ * @ppb - parts per billion adjustment from base</div><div class='add'>+ *</div><div class='add'>+ * adjust the frequency of the ptp cycle counter by the</div><div class='add'>+ * indicated ppb from the base frequency.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter =</div><div class='add'>+		container_of(ptp, struct ixgbe_adapter, ptp_caps);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u64 freq;</div><div class='add'>+	u32 diff, incval;</div><div class='add'>+	int neg_adj = 0;</div><div class='add'>+</div><div class='add'>+	if (ppb &lt; 0) {</div><div class='add'>+		neg_adj = 1;</div><div class='add'>+		ppb = -ppb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	smp_mb();</div><div class='add'>+	incval = ACCESS_ONCE(adapter-&gt;base_incval);</div><div class='add'>+</div><div class='add'>+	freq = incval;</div><div class='add'>+	freq *= ppb;</div><div class='add'>+	diff = div_u64(freq, 1000000000ULL);</div><div class='add'>+</div><div class='add'>+	incval = neg_adj ? (incval - diff) : (incval + diff);</div><div class='add'>+</div><div class='add'>+	switch (hw-&gt;mac.type) {</div><div class='add'>+	case ixgbe_mac_X540:</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_TIMINCA, incval);</div><div class='add'>+		break;</div><div class='add'>+	case ixgbe_mac_82599EB:</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_TIMINCA,</div><div class='add'>+				(1 &lt;&lt; IXGBE_INCPER_SHIFT_82599) |</div><div class='add'>+				incval);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_adjtime</div><div class='add'>+ * @ptp - the ptp clock structure</div><div class='add'>+ * @delta - offset to adjust the cycle counter by</div><div class='add'>+ *</div><div class='add'>+ * adjust the timer by resetting the timecounter structure.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter =</div><div class='add'>+		container_of(ptp, struct ixgbe_adapter, ptp_caps);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u64 now;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	now = timecounter_read(&amp;adapter-&gt;tc);</div><div class='add'>+	now += delta;</div><div class='add'>+</div><div class='add'>+	/* reset the timecounter */</div><div class='add'>+	timecounter_init(&amp;adapter-&gt;tc,</div><div class='add'>+			 &amp;adapter-&gt;cc,</div><div class='add'>+			 now);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_gettime</div><div class='add'>+ * @ptp - the ptp clock structure</div><div class='add'>+ * @ts - timespec structure to hold the current time value</div><div class='add'>+ *</div><div class='add'>+ * read the timecounter and return the correct value on ns,</div><div class='add'>+ * after converting it into a struct timespec.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter =</div><div class='add'>+		container_of(ptp, struct ixgbe_adapter, ptp_caps);</div><div class='add'>+	u64 ns;</div><div class='add'>+	u32 remainder;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+	ns = timecounter_read(&amp;adapter-&gt;tc);</div><div class='add'>+	spin_unlock_irqrestore(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	ts-&gt;tv_sec = div_u64_rem(ns, 1000000000ULL, &amp;remainder);</div><div class='add'>+	ts-&gt;tv_nsec = remainder;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_settime</div><div class='add'>+ * @ptp - the ptp clock structure</div><div class='add'>+ * @ts - the timespec containing the new time for the cycle counter</div><div class='add'>+ *</div><div class='add'>+ * reset the timecounter to use a new base value instead of the kernel</div><div class='add'>+ * wall timer value.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_ptp_settime(struct ptp_clock_info *ptp,</div><div class='add'>+			     const struct timespec *ts)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter =</div><div class='add'>+		container_of(ptp, struct ixgbe_adapter, ptp_caps);</div><div class='add'>+	u64 ns;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	ns = ts-&gt;tv_sec * 1000000000ULL;</div><div class='add'>+	ns += ts-&gt;tv_nsec;</div><div class='add'>+</div><div class='add'>+	/* reset the timecounter */</div><div class='add'>+	spin_lock_irqsave(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+	timecounter_init(&amp;adapter-&gt;tc, &amp;adapter-&gt;cc, ns);</div><div class='add'>+	spin_unlock_irqrestore(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_enable</div><div class='add'>+ * @ptp - the ptp clock structure</div><div class='add'>+ * @rq - the requested feature to change</div><div class='add'>+ * @on - whether to enable or disable the feature</div><div class='add'>+ *</div><div class='add'>+ * enable (or disable) ancillary features of the phc subsystem.</div><div class='add'>+ * our driver only supports the PPS feature on the X540</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_ptp_enable(struct ptp_clock_info *ptp,</div><div class='add'>+			    struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter =</div><div class='add'>+		container_of(ptp, struct ixgbe_adapter, ptp_caps);</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * When PPS is enabled, unmask the interrupt for the ClockOut</div><div class='add'>+	 * feature, so that the interrupt handler can send the PPS</div><div class='add'>+	 * event when the clock SDP triggers. Clear mask when PPS is</div><div class='add'>+	 * disabled</div><div class='add'>+	 */</div><div class='add'>+	if (rq-&gt;type == PTP_CLK_REQ_PPS) {</div><div class='add'>+		switch (adapter-&gt;hw.mac.type) {</div><div class='add'>+		case ixgbe_mac_X540:</div><div class='add'>+			if (on)</div><div class='add'>+				adapter-&gt;flags2 |= IXGBE_FLAG2_PTP_PPS_ENABLED;</div><div class='add'>+			else</div><div class='add'>+				adapter-&gt;flags2 &amp;=</div><div class='add'>+					~IXGBE_FLAG2_PTP_PPS_ENABLED;</div><div class='add'>+			return 0;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_check_pps_event</div><div class='add'>+ * @adapter - the private adapter structure</div><div class='add'>+ * @eicr - the interrupt cause register value</div><div class='add'>+ *</div><div class='add'>+ * This function is called by the interrupt routine when checking for</div><div class='add'>+ * interrupts. It will check and handle a pps event.</div><div class='add'>+ */</div><div class='add'>+void ixgbe_ptp_check_pps_event(struct ixgbe_adapter *adapter, u32 eicr)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct ptp_clock_event event;</div><div class='add'>+</div><div class='add'>+	event.type = PTP_CLOCK_PPS;</div><div class='add'>+</div><div class='add'>+	/* Make sure ptp clock is valid, and PPS event enabled */</div><div class='add'>+	if (!adapter-&gt;ptp_clock ||</div><div class='add'>+	    !(adapter-&gt;flags2 &amp; IXGBE_FLAG2_PTP_PPS_ENABLED))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (hw-&gt;mac.type) {</div><div class='add'>+	case ixgbe_mac_X540:</div><div class='add'>+		if (eicr &amp; IXGBE_EICR_TIMESYNC)</div><div class='add'>+			ptp_clock_event(adapter-&gt;ptp_clock, &amp;event);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_enable_sdp</div><div class='add'>+ * @hw - the hardware private structure</div><div class='add'>+ * @shift - the clock shift for calculating nanoseconds</div><div class='add'>+ *</div><div class='add'>+ * this function enables the clock out feature on the sdp0 for the</div><div class='add'>+ * X540 device. It will create a 1second periodic output that can be</div><div class='add'>+ * used as the PPS (via an interrupt).</div><div class='add'>+ *</div><div class='add'>+ * It calculates when the systime will be on an exact second, and then</div><div class='add'>+ * aligns the start of the PPS signal to that value. The shift is</div><div class='add'>+ * necessary because it can change based on the link speed.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_ptp_enable_sdp(struct ixgbe_hw *hw, int shift)</div><div class='add'>+{</div><div class='add'>+	u32 esdp, tsauxc, clktiml, clktimh, trgttiml, trgttimh;</div><div class='add'>+	u64 clock_edge = 0;</div><div class='add'>+	u32 rem;</div><div class='add'>+</div><div class='add'>+	switch (hw-&gt;mac.type) {</div><div class='add'>+	case ixgbe_mac_X540:</div><div class='add'>+		esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * enable the SDP0 pin as output, and connected to the native</div><div class='add'>+		 * function for Timesync (ClockOut)</div><div class='add'>+		 */</div><div class='add'>+		esdp |= (IXGBE_ESDP_SDP0_DIR |</div><div class='add'>+			 IXGBE_ESDP_SDP0_NATIVE);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * enable the Clock Out feature on SDP0, and allow interrupts</div><div class='add'>+		 * to occur when the pin changes</div><div class='add'>+		 */</div><div class='add'>+		tsauxc = (IXGBE_TSAUXC_EN_CLK |</div><div class='add'>+			  IXGBE_TSAUXC_SYNCLK |</div><div class='add'>+			  IXGBE_TSAUXC_SDP0_INT);</div><div class='add'>+</div><div class='add'>+		/* clock period (or pulse length) */</div><div class='add'>+		clktiml = (u32)(NSECS_PER_SEC &lt;&lt; shift);</div><div class='add'>+		clktimh = (u32)((NSECS_PER_SEC &lt;&lt; shift) &gt;&gt; 32);</div><div class='add'>+</div><div class='add'>+		clock_edge |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIML);</div><div class='add'>+		clock_edge |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIMH) &lt;&lt; 32;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * account for the fact that we can't do u64 division</div><div class='add'>+		 * with remainder, by converting the clock values into</div><div class='add'>+		 * nanoseconds first</div><div class='add'>+		 */</div><div class='add'>+		clock_edge &gt;&gt;= shift;</div><div class='add'>+		div_u64_rem(clock_edge, NSECS_PER_SEC, &amp;rem);</div><div class='add'>+		clock_edge += (NSECS_PER_SEC - rem);</div><div class='add'>+		clock_edge &lt;&lt;= shift;</div><div class='add'>+</div><div class='add'>+		/* specify the initial clock start time */</div><div class='add'>+		trgttiml = (u32)clock_edge;</div><div class='add'>+		trgttimh = (u32)(clock_edge &gt;&gt; 32);</div><div class='add'>+</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_CLKTIML, clktiml);</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_CLKTIMH, clktimh);</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_TRGTTIML0, trgttiml);</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_TRGTTIMH0, trgttimh);</div><div class='add'>+</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, tsauxc);</div><div class='add'>+</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EICR_TIMESYNC);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_disable_sdp</div><div class='add'>+ * @hw - the private hardware structure</div><div class='add'>+ *</div><div class='add'>+ * this function disables the auxiliary SDP clock out feature</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_ptp_disable_sdp(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_TIMESYNC);</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_overflow_check - delayed work to detect SYSTIME overflow</div><div class='add'>+ * @work: structure containing information about this work task</div><div class='add'>+ *</div><div class='add'>+ * this work function is scheduled to continue reading the timecounter</div><div class='add'>+ * in order to prevent missing when the system time registers wrap</div><div class='add'>+ * around. This needs to be run approximately twice a minute when no</div><div class='add'>+ * PTP activity is occurring.</div><div class='add'>+ */</div><div class='add'>+void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	unsigned long elapsed_jiffies = adapter-&gt;last_overflow_check - jiffies;</div><div class='add'>+	struct timespec ts;</div><div class='add'>+</div><div class='add'>+	if ((adapter-&gt;flags2 &amp; IXGBE_FLAG2_OVERFLOW_CHECK_ENABLED) &amp;&amp;</div><div class='add'>+	    (elapsed_jiffies &gt;= IXGBE_OVERFLOW_PERIOD)) {</div><div class='add'>+		ixgbe_ptp_gettime(&amp;adapter-&gt;ptp_caps, &amp;ts);</div><div class='add'>+		adapter-&gt;last_overflow_check = jiffies;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_tx_hwtstamp - utility function which checks for TX time stamp</div><div class='add'>+ * @q_vector: structure containing interrupt and ring information</div><div class='add'>+ * @skb: particular skb to send timestamp with</div><div class='add'>+ *</div><div class='add'>+ * if the timestamp is valid, we convert it into the timecounter ns</div><div class='add'>+ * value, then store that result into the shhwtstamps structure which</div><div class='add'>+ * is passed up the network stack</div><div class='add'>+ */</div><div class='add'>+void ixgbe_ptp_tx_hwtstamp(struct ixgbe_q_vector *q_vector,</div><div class='add'>+			   struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter;</div><div class='add'>+	struct ixgbe_hw *hw;</div><div class='add'>+	struct skb_shared_hwtstamps shhwtstamps;</div><div class='add'>+	u64 regval = 0, ns;</div><div class='add'>+	u32 tsynctxctl;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* we cannot process timestamps on a ring without a q_vector */</div><div class='add'>+	if (!q_vector || !q_vector-&gt;adapter)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	adapter = q_vector-&gt;adapter;</div><div class='add'>+	hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	tsynctxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCTXCTL);</div><div class='add'>+	regval |= (u64)IXGBE_READ_REG(hw, IXGBE_TXSTMPL);</div><div class='add'>+	regval |= (u64)IXGBE_READ_REG(hw, IXGBE_TXSTMPH) &lt;&lt; 32;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * if TX timestamp is not valid, exit after clearing the</div><div class='add'>+	 * timestamp registers</div><div class='add'>+	 */</div><div class='add'>+	if (!(tsynctxctl &amp; IXGBE_TSYNCTXCTL_VALID))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+	ns = timecounter_cyc2time(&amp;adapter-&gt;tc, regval);</div><div class='add'>+	spin_unlock_irqrestore(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	memset(&amp;shhwtstamps, 0, sizeof(shhwtstamps));</div><div class='add'>+	shhwtstamps.hwtstamp = ns_to_ktime(ns);</div><div class='add'>+	skb_tstamp_tx(skb, &amp;shhwtstamps);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_rx_hwtstamp - utility function which checks for RX time stamp</div><div class='add'>+ * @q_vector: structure containing interrupt and ring information</div><div class='add'>+ * @skb: particular skb to send timestamp with</div><div class='add'>+ *</div><div class='add'>+ * if the timestamp is valid, we convert it into the timecounter ns</div><div class='add'>+ * value, then store that result into the shhwtstamps structure which</div><div class='add'>+ * is passed up the network stack</div><div class='add'>+ */</div><div class='add'>+void ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector,</div><div class='add'>+			   struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter;</div><div class='add'>+	struct ixgbe_hw *hw;</div><div class='add'>+	struct skb_shared_hwtstamps *shhwtstamps;</div><div class='add'>+	u64 regval = 0, ns;</div><div class='add'>+	u32 tsyncrxctl;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* we cannot process timestamps on a ring without a q_vector */</div><div class='add'>+	if (!q_vector || !q_vector-&gt;adapter)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	adapter = q_vector-&gt;adapter;</div><div class='add'>+	hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL);</div><div class='add'>+	regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPL);</div><div class='add'>+	regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPH) &lt;&lt; 32;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If this bit is set, then the RX registers contain the time stamp. No</div><div class='add'>+	 * other packet will be time stamped until we read these registers, so</div><div class='add'>+	 * read the registers to make them available again. Because only one</div><div class='add'>+	 * packet can be time stamped at a time, we know that the register</div><div class='add'>+	 * values must belong to this one here and therefore we don't need to</div><div class='add'>+	 * compare any of the additional attributes stored for it.</div><div class='add'>+	 *</div><div class='add'>+	 * If nothing went wrong, then it should have a skb_shared_tx that we</div><div class='add'>+	 * can turn into a skb_shared_hwtstamps.</div><div class='add'>+	 */</div><div class='add'>+	if (!(tsyncrxctl &amp; IXGBE_TSYNCRXCTL_VALID))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+	ns = timecounter_cyc2time(&amp;adapter-&gt;tc, regval);</div><div class='add'>+	spin_unlock_irqrestore(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	shhwtstamps = skb_hwtstamps(skb);</div><div class='add'>+	shhwtstamps-&gt;hwtstamp = ns_to_ktime(ns);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_hwtstamp_ioctl - control hardware time stamping</div><div class='add'>+ * @adapter: pointer to adapter struct</div><div class='add'>+ * @ifreq: ioctl data</div><div class='add'>+ * @cmd: particular ioctl requested</div><div class='add'>+ *</div><div class='add'>+ * Outgoing time stamping can be enabled and disabled. Play nice and</div><div class='add'>+ * disable it when requested, although it shouldn't case any overhead</div><div class='add'>+ * when no packet needs it. At most one packet in the queue may be</div><div class='add'>+ * marked for time stamping, otherwise it would be impossible to tell</div><div class='add'>+ * for sure to which packet the hardware time stamp belongs.</div><div class='add'>+ *</div><div class='add'>+ * Incoming time stamping has to be configured via the hardware</div><div class='add'>+ * filters. Not all combinations are supported, in particular event</div><div class='add'>+ * type has to be specified. Matching the kind of event packet is</div><div class='add'>+ * not supported, with the exception of "all V2 events regardless of</div><div class='add'>+ * level 2 or 4".</div><div class='add'>+ */</div><div class='add'>+int ixgbe_ptp_hwtstamp_ioctl(struct ixgbe_adapter *adapter,</div><div class='add'>+			     struct ifreq *ifr, int cmd)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct hwtstamp_config config;</div><div class='add'>+	u32 tsync_tx_ctl = IXGBE_TSYNCTXCTL_ENABLED;</div><div class='add'>+	u32 tsync_rx_ctl = IXGBE_TSYNCRXCTL_ENABLED;</div><div class='add'>+	u32 tsync_rx_mtrl = 0;</div><div class='add'>+	bool is_l4 = false;</div><div class='add'>+	bool is_l2 = false;</div><div class='add'>+	u32 regval;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/* reserved for future extensions */</div><div class='add'>+	if (config.flags)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (config.tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		tsync_tx_ctl = 0;</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (config.rx_filter) {</div><div class='add'>+	case HWTSTAMP_FILTER_NONE:</div><div class='add'>+		tsync_rx_ctl = 0;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='add'>+		tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L4_V1;</div><div class='add'>+		tsync_rx_mtrl = IXGBE_RXMTRL_V1_SYNC_MSG;</div><div class='add'>+		is_l4 = true;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='add'>+		tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L4_V1;</div><div class='add'>+		tsync_rx_mtrl = IXGBE_RXMTRL_V1_DELAY_REQ_MSG;</div><div class='add'>+		is_l4 = true;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='add'>+		tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L2_L4_V2;</div><div class='add'>+		tsync_rx_mtrl = IXGBE_RXMTRL_V2_SYNC_MSG;</div><div class='add'>+		is_l2 = true;</div><div class='add'>+		is_l4 = true;</div><div class='add'>+		config.rx_filter = HWTSTAMP_FILTER_SOME;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='add'>+		tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L2_L4_V2;</div><div class='add'>+		tsync_rx_mtrl = IXGBE_RXMTRL_V2_DELAY_REQ_MSG;</div><div class='add'>+		is_l2 = true;</div><div class='add'>+		is_l4 = true;</div><div class='add'>+		config.rx_filter = HWTSTAMP_FILTER_SOME;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='add'>+		tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_EVENT_V2;</div><div class='add'>+		config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+		is_l2 = true;</div><div class='add'>+		is_l4 = true;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_ALL:</div><div class='add'>+	default:</div><div class='add'>+		/*</div><div class='add'>+		 * register RXMTRL must be set, therefore it is not</div><div class='add'>+		 * possible to time stamp both V1 Sync and Delay_Req messages</div><div class='add'>+		 * and hardware does not support timestamping all packets</div><div class='add'>+		 * =&gt; return error</div><div class='add'>+		 */</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_82598EB) {</div><div class='add'>+		if (tsync_rx_ctl | tsync_tx_ctl)</div><div class='add'>+			return -ERANGE;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* define ethertype filter for timestamped packets */</div><div class='add'>+	if (is_l2)</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_ETQF(3),</div><div class='add'>+				(IXGBE_ETQF_FILTER_EN | /* enable filter */</div><div class='add'>+				 IXGBE_ETQF_1588 | /* enable timestamping */</div><div class='add'>+				 ETH_P_1588));     /* 1588 eth protocol type */</div><div class='add'>+	else</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_ETQF(3), 0);</div><div class='add'>+</div><div class='add'>+#define PTP_PORT 319</div><div class='add'>+	/* L4 Queue Filter[3]: filter by destination port and protocol */</div><div class='add'>+	if (is_l4) {</div><div class='add'>+		u32 ftqf = (IXGBE_FTQF_PROTOCOL_UDP /* UDP */</div><div class='add'>+			    | IXGBE_FTQF_POOL_MASK_EN /* Pool not compared */</div><div class='add'>+			    | IXGBE_FTQF_QUEUE_ENABLE);</div><div class='add'>+</div><div class='add'>+		ftqf |= ((IXGBE_FTQF_PROTOCOL_COMP_MASK /* protocol check */</div><div class='add'>+			  &amp; IXGBE_FTQF_DEST_PORT_MASK /* dest check */</div><div class='add'>+			  &amp; IXGBE_FTQF_SOURCE_PORT_MASK) /* source check */</div><div class='add'>+			 &lt;&lt; IXGBE_FTQF_5TUPLE_MASK_SHIFT);</div><div class='add'>+</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_L34T_IMIR(3),</div><div class='add'>+				(3 &lt;&lt; IXGBE_IMIR_RX_QUEUE_SHIFT_82599 |</div><div class='add'>+				 IXGBE_IMIR_SIZE_BP_82599));</div><div class='add'>+</div><div class='add'>+		/* enable port check */</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_SDPQF(3),</div><div class='add'>+				(htons(PTP_PORT) |</div><div class='add'>+				 htons(PTP_PORT) &lt;&lt; 16));</div><div class='add'>+</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_FTQF(3), ftqf);</div><div class='add'>+</div><div class='add'>+		tsync_rx_mtrl |= PTP_PORT &lt;&lt; 16;</div><div class='add'>+	} else {</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_FTQF(3), 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* enable/disable TX */</div><div class='add'>+	regval = IXGBE_READ_REG(hw, IXGBE_TSYNCTXCTL);</div><div class='add'>+	regval &amp;= ~IXGBE_TSYNCTXCTL_ENABLED;</div><div class='add'>+	regval |= tsync_tx_ctl;</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_TSYNCTXCTL, regval);</div><div class='add'>+</div><div class='add'>+	/* enable/disable RX */</div><div class='add'>+	regval = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL);</div><div class='add'>+	regval &amp;= ~(IXGBE_TSYNCRXCTL_ENABLED | IXGBE_TSYNCRXCTL_TYPE_MASK);</div><div class='add'>+	regval |= tsync_rx_ctl;</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_TSYNCRXCTL, regval);</div><div class='add'>+</div><div class='add'>+	/* define which PTP packets are time stamped */</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_RXMTRL, tsync_rx_mtrl);</div><div class='add'>+</div><div class='add'>+	IXGBE_WRITE_FLUSH(hw);</div><div class='add'>+</div><div class='add'>+	/* clear TX/RX time stamp registers, just to be sure */</div><div class='add'>+	regval = IXGBE_READ_REG(hw, IXGBE_TXSTMPH);</div><div class='add'>+	regval = IXGBE_READ_REG(hw, IXGBE_RXSTMPH);</div><div class='add'>+</div><div class='add'>+	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='add'>+		-EFAULT : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_start_cyclecounter - create the cycle counter from hw</div><div class='add'>+ * @adapter - pointer to the adapter structure</div><div class='add'>+ *</div><div class='add'>+ * this function initializes the timecounter and cyclecounter</div><div class='add'>+ * structures for use in generated a ns counter from the arbitrary</div><div class='add'>+ * fixed point cycles registers in the hardware.</div><div class='add'>+ *</div><div class='add'>+ * A change in link speed impacts the frequency of the DMA clock on</div><div class='add'>+ * the device, which is used to generate the cycle counter</div><div class='add'>+ * registers. Therefor this function is called whenever the link speed</div><div class='add'>+ * changes.</div><div class='add'>+ *</div><div class='add'>+ * This function also turns on the SDP pin for clock out feature (X540</div><div class='add'>+ * only), because this is where the shift is first calculated.</div><div class='add'>+ */</div><div class='add'>+void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u32 incval = 0;</div><div class='add'>+	u32 shift = 0;</div><div class='add'>+	u32 cycle_speed;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Determine what speed we need to set the cyclecounter</div><div class='add'>+	 * for. It should be different for 100Mb, 1Gb, and 10Gb. Treat</div><div class='add'>+	 * unknown speeds as 10Gb. (Hence why we can't just copy the</div><div class='add'>+	 * link_speed.</div><div class='add'>+	 */</div><div class='add'>+	switch (adapter-&gt;link_speed) {</div><div class='add'>+	case IXGBE_LINK_SPEED_100_FULL:</div><div class='add'>+	case IXGBE_LINK_SPEED_1GB_FULL:</div><div class='add'>+	case IXGBE_LINK_SPEED_10GB_FULL:</div><div class='add'>+		cycle_speed = adapter-&gt;link_speed;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* cycle speed should be 10Gb when there is no link */</div><div class='add'>+		cycle_speed = IXGBE_LINK_SPEED_10GB_FULL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Bail if the cycle speed didn't change */</div><div class='add'>+	if (adapter-&gt;cycle_speed == cycle_speed)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* disable the SDP clock out */</div><div class='add'>+	ixgbe_ptp_disable_sdp(hw);</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Scale the NIC cycle counter by a large factor so that</div><div class='add'>+	 * relatively small corrections to the frequency can be added</div><div class='add'>+	 * or subtracted. The drawbacks of a large factor include</div><div class='add'>+	 * (a) the clock register overflows more quickly, (b) the cycle</div><div class='add'>+	 * counter structure must be able to convert the systime value</div><div class='add'>+	 * to nanoseconds using only a multiplier and a right-shift,</div><div class='add'>+	 * and (c) the value must fit within the timinca register space</div><div class='add'>+	 * =&gt; math based on internal DMA clock rate and available bits</div><div class='add'>+	 */</div><div class='add'>+	switch (cycle_speed) {</div><div class='add'>+	case IXGBE_LINK_SPEED_100_FULL:</div><div class='add'>+		incval = IXGBE_INCVAL_100;</div><div class='add'>+		shift = IXGBE_INCVAL_SHIFT_100;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_LINK_SPEED_1GB_FULL:</div><div class='add'>+		incval = IXGBE_INCVAL_1GB;</div><div class='add'>+		shift = IXGBE_INCVAL_SHIFT_1GB;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_LINK_SPEED_10GB_FULL:</div><div class='add'>+		incval = IXGBE_INCVAL_10GB;</div><div class='add'>+		shift = IXGBE_INCVAL_SHIFT_10GB;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Modify the calculated values to fit within the correct</div><div class='add'>+	 * number of bits specified by the hardware. The 82599 doesn't</div><div class='add'>+	 * have the same space as the X540, so bitshift the calculated</div><div class='add'>+	 * values to fit.</div><div class='add'>+	 */</div><div class='add'>+	switch (hw-&gt;mac.type) {</div><div class='add'>+	case ixgbe_mac_X540:</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_TIMINCA, incval);</div><div class='add'>+		break;</div><div class='add'>+	case ixgbe_mac_82599EB:</div><div class='add'>+		incval &gt;&gt;= IXGBE_INCVAL_SHIFT_82599;</div><div class='add'>+		shift -= IXGBE_INCVAL_SHIFT_82599;</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_TIMINCA,</div><div class='add'>+				(1 &lt;&lt; IXGBE_INCPER_SHIFT_82599) |</div><div class='add'>+				incval);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* other devices aren't supported */</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* reset the system time registers */</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_SYSTIML, 0x00000000);</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_SYSTIMH, 0x00000000);</div><div class='add'>+	IXGBE_WRITE_FLUSH(hw);</div><div class='add'>+</div><div class='add'>+	/* now that the shift has been calculated and the systime</div><div class='add'>+	 * registers reset, (re-)enable the Clock out feature*/</div><div class='add'>+	ixgbe_ptp_enable_sdp(hw, shift);</div><div class='add'>+</div><div class='add'>+	/* store the new cycle speed */</div><div class='add'>+	adapter-&gt;cycle_speed = cycle_speed;</div><div class='add'>+</div><div class='add'>+	ACCESS_ONCE(adapter-&gt;base_incval) = incval;</div><div class='add'>+	smp_mb();</div><div class='add'>+</div><div class='add'>+	/* grab the ptp lock */</div><div class='add'>+	spin_lock_irqsave(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+	memset(&amp;adapter-&gt;cc, 0, sizeof(adapter-&gt;cc));</div><div class='add'>+	adapter-&gt;cc.read = ixgbe_ptp_read;</div><div class='add'>+	adapter-&gt;cc.mask = CLOCKSOURCE_MASK(64);</div><div class='add'>+	adapter-&gt;cc.shift = shift;</div><div class='add'>+	adapter-&gt;cc.mult = 1;</div><div class='add'>+</div><div class='add'>+	/* reset the ns time counter */</div><div class='add'>+	timecounter_init(&amp;adapter-&gt;tc, &amp;adapter-&gt;cc,</div><div class='add'>+			 ktime_to_ns(ktime_get_real()));</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_init</div><div class='add'>+ * @adapter - the ixgbe private adapter structure</div><div class='add'>+ *</div><div class='add'>+ * This function performs the required steps for enabling ptp</div><div class='add'>+ * support. If ptp support has already been loaded it simply calls the</div><div class='add'>+ * cyclecounter init routine and exits.</div><div class='add'>+ */</div><div class='add'>+void ixgbe_ptp_init(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	switch (adapter-&gt;hw.mac.type) {</div><div class='add'>+	case ixgbe_mac_X540:</div><div class='add'>+		snprintf(adapter-&gt;ptp_caps.name, 16, "%pm", netdev-&gt;dev_addr);</div><div class='add'>+		adapter-&gt;ptp_caps.owner = THIS_MODULE;</div><div class='add'>+		adapter-&gt;ptp_caps.max_adj = 250000000;</div><div class='add'>+		adapter-&gt;ptp_caps.n_alarm = 0;</div><div class='add'>+		adapter-&gt;ptp_caps.n_ext_ts = 0;</div><div class='add'>+		adapter-&gt;ptp_caps.n_per_out = 0;</div><div class='add'>+		adapter-&gt;ptp_caps.pps = 1;</div><div class='add'>+		adapter-&gt;ptp_caps.adjfreq = ixgbe_ptp_adjfreq;</div><div class='add'>+		adapter-&gt;ptp_caps.adjtime = ixgbe_ptp_adjtime;</div><div class='add'>+		adapter-&gt;ptp_caps.gettime = ixgbe_ptp_gettime;</div><div class='add'>+		adapter-&gt;ptp_caps.settime = ixgbe_ptp_settime;</div><div class='add'>+		adapter-&gt;ptp_caps.enable = ixgbe_ptp_enable;</div><div class='add'>+		break;</div><div class='add'>+	case ixgbe_mac_82599EB:</div><div class='add'>+		snprintf(adapter-&gt;ptp_caps.name, 16, "%pm", netdev-&gt;dev_addr);</div><div class='add'>+		adapter-&gt;ptp_caps.owner = THIS_MODULE;</div><div class='add'>+		adapter-&gt;ptp_caps.max_adj = 250000000;</div><div class='add'>+		adapter-&gt;ptp_caps.n_alarm = 0;</div><div class='add'>+		adapter-&gt;ptp_caps.n_ext_ts = 0;</div><div class='add'>+		adapter-&gt;ptp_caps.n_per_out = 0;</div><div class='add'>+		adapter-&gt;ptp_caps.pps = 0;</div><div class='add'>+		adapter-&gt;ptp_caps.adjfreq = ixgbe_ptp_adjfreq;</div><div class='add'>+		adapter-&gt;ptp_caps.adjtime = ixgbe_ptp_adjtime;</div><div class='add'>+		adapter-&gt;ptp_caps.gettime = ixgbe_ptp_gettime;</div><div class='add'>+		adapter-&gt;ptp_caps.settime = ixgbe_ptp_settime;</div><div class='add'>+		adapter-&gt;ptp_caps.enable = ixgbe_ptp_enable;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		adapter-&gt;ptp_clock = NULL;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;adapter-&gt;tmreg_lock);</div><div class='add'>+</div><div class='add'>+	ixgbe_ptp_start_cyclecounter(adapter);</div><div class='add'>+</div><div class='add'>+	/* (Re)start the overflow check */</div><div class='add'>+	adapter-&gt;flags2 |= IXGBE_FLAG2_OVERFLOW_CHECK_ENABLED;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;ptp_clock = ptp_clock_register(&amp;adapter-&gt;ptp_caps);</div><div class='add'>+	if (IS_ERR(adapter-&gt;ptp_clock)) {</div><div class='add'>+		adapter-&gt;ptp_clock = NULL;</div><div class='add'>+		e_dev_err("ptp_clock_register failed\n");</div><div class='add'>+	} else</div><div class='add'>+		e_dev_info("registered PHC device on %s\n", netdev-&gt;name);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_ptp_stop - disable ptp device and stop the overflow check</div><div class='add'>+ * @adapter: pointer to adapter struct</div><div class='add'>+ *</div><div class='add'>+ * this function stops the ptp support, and cancels the delayed work.</div><div class='add'>+ */</div><div class='add'>+void ixgbe_ptp_stop(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	ixgbe_ptp_disable_sdp(&amp;adapter-&gt;hw);</div><div class='add'>+</div><div class='add'>+	/* stop the overflow check task */</div><div class='add'>+	adapter-&gt;flags2 &amp;= ~IXGBE_FLAG2_OVERFLOW_CHECK_ENABLED;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;ptp_clock) {</div><div class='add'>+		ptp_clock_unregister(adapter-&gt;ptp_clock);</div><div class='add'>+		adapter-&gt;ptp_clock = NULL;</div><div class='add'>+		e_dev_info("removed PHC on %s\n",</div><div class='add'>+			   adapter-&gt;netdev-&gt;name);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c<br/>index 88a58cb08569..2d971d18696e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c</a></div><div class='hunk'>@@ -544,13 +544,18 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf)</div><div class='ctx'> </div><div class='ctx'> 	retval = ixgbe_read_mbx(hw, msgbuf, mbx_size, vf);</div><div class='ctx'> </div><div class='del'>-	if (retval)</div><div class='add'>+	if (retval) {</div><div class='ctx'> 		pr_err("Error receiving message from VF\n");</div><div class='add'>+		return retval;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* this is a message we already processed, do nothing */</div><div class='ctx'> 	if (msgbuf[0] &amp; (IXGBE_VT_MSGTYPE_ACK | IXGBE_VT_MSGTYPE_NACK))</div><div class='ctx'> 		return retval;</div><div class='ctx'> </div><div class='add'>+	/* flush the ack before we write any messages back */</div><div class='add'>+	IXGBE_WRITE_FLUSH(hw);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * until the vf completes a virtual function reset it should not be</div><div class='ctx'> 	 * allowed to start any configuration.</div><div class='hunk'>@@ -637,6 +642,12 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf)</div><div class='ctx'> 	case IXGBE_VF_SET_MACVLAN:</div><div class='ctx'> 		index = (msgbuf[0] &amp; IXGBE_VT_MSGINFO_MASK) &gt;&gt;</div><div class='ctx'> 			IXGBE_VT_MSGINFO_SHIFT;</div><div class='add'>+		if (adapter-&gt;vfinfo[vf].pf_set_mac &amp;&amp; index &gt; 0) {</div><div class='add'>+			e_warn(drv, "VF %d requested MACVLAN filter but is "</div><div class='add'>+				    "administratively denied\n", vf);</div><div class='add'>+			retval = -1;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If the VF is allowed to set MAC filters then turn off</div><div class='ctx'> 		 * anti-spoofing to avoid false positives.  An index</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sysfs.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sysfs.c<br/>new file mode 100644<br/>index 000000000000..1d80b1cefa6a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_sysfs.c</a></div><div class='hunk'>@@ -0,0 +1,245 @@</div><div class='add'>+/*******************************************************************************</div><div class='add'>+</div><div class='add'>+  Intel 10 Gigabit PCI Express Linux driver</div><div class='add'>+  Copyright(c) 1999 - 2012 Intel Corporation.</div><div class='add'>+</div><div class='add'>+  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+  under the terms and conditions of the GNU General Public License,</div><div class='add'>+  version 2, as published by the Free Software Foundation.</div><div class='add'>+</div><div class='add'>+  This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+  more details.</div><div class='add'>+</div><div class='add'>+  You should have received a copy of the GNU General Public License along with</div><div class='add'>+  this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+</div><div class='add'>+  The full GNU General Public License is included in this distribution in</div><div class='add'>+  the file called "COPYING".</div><div class='add'>+</div><div class='add'>+  Contact Information:</div><div class='add'>+  e1000-devel Mailing List &lt;e1000-devel@lists.sourceforge.net&gt;</div><div class='add'>+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497</div><div class='add'>+</div><div class='add'>+*******************************************************************************/</div><div class='add'>+</div><div class='add'>+#include "ixgbe.h"</div><div class='add'>+#include "ixgbe_common.h"</div><div class='add'>+#include "ixgbe_type.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/sysfs.h&gt;</div><div class='add'>+#include &lt;linux/kobject.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/hwmon.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IXGBE_HWMON</div><div class='add'>+/* hwmon callback functions */</div><div class='add'>+static ssize_t ixgbe_hwmon_show_location(struct device *dev,</div><div class='add'>+					 struct device_attribute *attr,</div><div class='add'>+					 char *buf)</div><div class='add'>+{</div><div class='add'>+	struct hwmon_attr *ixgbe_attr = container_of(attr, struct hwmon_attr,</div><div class='add'>+						     dev_attr);</div><div class='add'>+	return sprintf(buf, "loc%u\n",</div><div class='add'>+		       ixgbe_attr-&gt;sensor-&gt;location);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t ixgbe_hwmon_show_temp(struct device *dev,</div><div class='add'>+				     struct device_attribute *attr,</div><div class='add'>+				     char *buf)</div><div class='add'>+{</div><div class='add'>+	struct hwmon_attr *ixgbe_attr = container_of(attr, struct hwmon_attr,</div><div class='add'>+						     dev_attr);</div><div class='add'>+	unsigned int value;</div><div class='add'>+</div><div class='add'>+	/* reset the temp field */</div><div class='add'>+	ixgbe_attr-&gt;hw-&gt;mac.ops.get_thermal_sensor_data(ixgbe_attr-&gt;hw);</div><div class='add'>+</div><div class='add'>+	value = ixgbe_attr-&gt;sensor-&gt;temp;</div><div class='add'>+</div><div class='add'>+	/* display millidegree */</div><div class='add'>+	value *= 1000;</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%u\n", value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t ixgbe_hwmon_show_cautionthresh(struct device *dev,</div><div class='add'>+				     struct device_attribute *attr,</div><div class='add'>+				     char *buf)</div><div class='add'>+{</div><div class='add'>+	struct hwmon_attr *ixgbe_attr = container_of(attr, struct hwmon_attr,</div><div class='add'>+						     dev_attr);</div><div class='add'>+	unsigned int value = ixgbe_attr-&gt;sensor-&gt;caution_thresh;</div><div class='add'>+</div><div class='add'>+	/* display millidegree */</div><div class='add'>+	value *= 1000;</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%u\n", value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t ixgbe_hwmon_show_maxopthresh(struct device *dev,</div><div class='add'>+				     struct device_attribute *attr,</div><div class='add'>+				     char *buf)</div><div class='add'>+{</div><div class='add'>+	struct hwmon_attr *ixgbe_attr = container_of(attr, struct hwmon_attr,</div><div class='add'>+						     dev_attr);</div><div class='add'>+	unsigned int value = ixgbe_attr-&gt;sensor-&gt;max_op_thresh;</div><div class='add'>+</div><div class='add'>+	/* display millidegree */</div><div class='add'>+	value *= 1000;</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%u\n", value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ixgbe_add_hwmon_attr - Create hwmon attr table for a hwmon sysfs file.</div><div class='add'>+ * @ adapter: pointer to the adapter structure</div><div class='add'>+ * @ offset: offset in the eeprom sensor data table</div><div class='add'>+ * @ type: type of sensor data to display</div><div class='add'>+ *</div><div class='add'>+ * For each file we want in hwmon's sysfs interface we need a device_attribute</div><div class='add'>+ * This is included in our hwmon_attr struct that contains the references to</div><div class='add'>+ * the data structures we need to get the data to display.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_add_hwmon_attr(struct ixgbe_adapter *adapter,</div><div class='add'>+				unsigned int offset, int type) {</div><div class='add'>+	int rc;</div><div class='add'>+	unsigned int n_attr;</div><div class='add'>+	struct hwmon_attr *ixgbe_attr;</div><div class='add'>+</div><div class='add'>+	n_attr = adapter-&gt;ixgbe_hwmon_buff.n_hwmon;</div><div class='add'>+	ixgbe_attr = &amp;adapter-&gt;ixgbe_hwmon_buff.hwmon_list[n_attr];</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case IXGBE_HWMON_TYPE_LOC:</div><div class='add'>+		ixgbe_attr-&gt;dev_attr.show = ixgbe_hwmon_show_location;</div><div class='add'>+		snprintf(ixgbe_attr-&gt;name, sizeof(ixgbe_attr-&gt;name),</div><div class='add'>+			 "temp%u_label", offset);</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_HWMON_TYPE_TEMP:</div><div class='add'>+		ixgbe_attr-&gt;dev_attr.show = ixgbe_hwmon_show_temp;</div><div class='add'>+		snprintf(ixgbe_attr-&gt;name, sizeof(ixgbe_attr-&gt;name),</div><div class='add'>+			 "temp%u_input", offset);</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_HWMON_TYPE_CAUTION:</div><div class='add'>+		ixgbe_attr-&gt;dev_attr.show = ixgbe_hwmon_show_cautionthresh;</div><div class='add'>+		snprintf(ixgbe_attr-&gt;name, sizeof(ixgbe_attr-&gt;name),</div><div class='add'>+			 "temp%u_max", offset);</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_HWMON_TYPE_MAX:</div><div class='add'>+		ixgbe_attr-&gt;dev_attr.show = ixgbe_hwmon_show_maxopthresh;</div><div class='add'>+		snprintf(ixgbe_attr-&gt;name, sizeof(ixgbe_attr-&gt;name),</div><div class='add'>+			 "temp%u_crit", offset);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		rc = -EPERM;</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* These always the same regardless of type */</div><div class='add'>+	ixgbe_attr-&gt;sensor =</div><div class='add'>+		&amp;adapter-&gt;hw.mac.thermal_sensor_data.sensor[offset];</div><div class='add'>+	ixgbe_attr-&gt;hw = &amp;adapter-&gt;hw;</div><div class='add'>+	ixgbe_attr-&gt;dev_attr.store = NULL;</div><div class='add'>+	ixgbe_attr-&gt;dev_attr.attr.mode = S_IRUGO;</div><div class='add'>+	ixgbe_attr-&gt;dev_attr.attr.name = ixgbe_attr-&gt;name;</div><div class='add'>+</div><div class='add'>+	rc = device_create_file(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				&amp;ixgbe_attr-&gt;dev_attr);</div><div class='add'>+</div><div class='add'>+	if (rc == 0)</div><div class='add'>+		++adapter-&gt;ixgbe_hwmon_buff.n_hwmon;</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixgbe_sysfs_del_adapter(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (adapter == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;ixgbe_hwmon_buff.n_hwmon; i++) {</div><div class='add'>+		device_remove_file(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+			   &amp;adapter-&gt;ixgbe_hwmon_buff.hwmon_list[i].dev_attr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(adapter-&gt;ixgbe_hwmon_buff.hwmon_list);</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;ixgbe_hwmon_buff.device)</div><div class='add'>+		hwmon_device_unregister(adapter-&gt;ixgbe_hwmon_buff.device);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* called from ixgbe_main.c */</div><div class='add'>+void ixgbe_sysfs_exit(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	ixgbe_sysfs_del_adapter(adapter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* called from ixgbe_main.c */</div><div class='add'>+int ixgbe_sysfs_init(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct hwmon_buff *ixgbe_hwmon = &amp;adapter-&gt;ixgbe_hwmon_buff;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int n_attrs;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	/* If this method isn't defined we don't support thermals */</div><div class='add'>+	if (adapter-&gt;hw.mac.ops.init_thermal_sensor_thresh == NULL) {</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Don't create thermal hwmon interface if no sensors present */</div><div class='add'>+	if (adapter-&gt;hw.mac.ops.init_thermal_sensor_thresh(&amp;adapter-&gt;hw))</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Allocation space for max attributs</div><div class='add'>+	 * max num sensors * values (loc, temp, max, caution)</div><div class='add'>+	 */</div><div class='add'>+	n_attrs = IXGBE_MAX_SENSORS * 4;</div><div class='add'>+	ixgbe_hwmon-&gt;hwmon_list = kcalloc(n_attrs, sizeof(struct hwmon_attr),</div><div class='add'>+					  GFP_KERNEL);</div><div class='add'>+	if (!ixgbe_hwmon-&gt;hwmon_list) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ixgbe_hwmon-&gt;device = hwmon_device_register(&amp;adapter-&gt;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(ixgbe_hwmon-&gt;device)) {</div><div class='add'>+		rc = PTR_ERR(ixgbe_hwmon-&gt;device);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; IXGBE_MAX_SENSORS; i++) {</div><div class='add'>+		/*</div><div class='add'>+		 * Only create hwmon sysfs entries for sensors that have</div><div class='add'>+		 * meaningful data for.</div><div class='add'>+		 */</div><div class='add'>+		if (adapter-&gt;hw.mac.thermal_sensor_data.sensor[i].location == 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Bail if any hwmon attr struct fails to initialize */</div><div class='add'>+		rc = ixgbe_add_hwmon_attr(adapter, i, IXGBE_HWMON_TYPE_CAUTION);</div><div class='add'>+		rc |= ixgbe_add_hwmon_attr(adapter, i, IXGBE_HWMON_TYPE_LOC);</div><div class='add'>+		rc |= ixgbe_add_hwmon_attr(adapter, i, IXGBE_HWMON_TYPE_TEMP);</div><div class='add'>+		rc |= ixgbe_add_hwmon_attr(adapter, i, IXGBE_HWMON_TYPE_MAX);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	goto exit;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	ixgbe_sysfs_del_adapter(adapter);</div><div class='add'>+exit:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_IXGBE_HWMON */</div><div class='add'>+</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h<br/>index 8636e8344fc9..204848d2448c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_type.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_type.h</a></div><div class='hunk'>@@ -110,6 +110,28 @@</div><div class='ctx'> #define IXGBE_I2C_CLK_OUT   0x00000002</div><div class='ctx'> #define IXGBE_I2C_DATA_IN   0x00000004</div><div class='ctx'> #define IXGBE_I2C_DATA_OUT  0x00000008</div><div class='add'>+#define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT	500</div><div class='add'>+</div><div class='add'>+#define IXGBE_I2C_THERMAL_SENSOR_ADDR	0xF8</div><div class='add'>+#define IXGBE_EMC_INTERNAL_DATA		0x00</div><div class='add'>+#define IXGBE_EMC_INTERNAL_THERM_LIMIT	0x20</div><div class='add'>+#define IXGBE_EMC_DIODE1_DATA		0x01</div><div class='add'>+#define IXGBE_EMC_DIODE1_THERM_LIMIT	0x19</div><div class='add'>+#define IXGBE_EMC_DIODE2_DATA		0x23</div><div class='add'>+#define IXGBE_EMC_DIODE2_THERM_LIMIT	0x1A</div><div class='add'>+</div><div class='add'>+#define IXGBE_MAX_SENSORS		3</div><div class='add'>+</div><div class='add'>+struct ixgbe_thermal_diode_data {</div><div class='add'>+	u8 location;</div><div class='add'>+	u8 temp;</div><div class='add'>+	u8 caution_thresh;</div><div class='add'>+	u8 max_op_thresh;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ixgbe_thermal_sensor_data {</div><div class='add'>+	struct ixgbe_thermal_diode_data sensor[IXGBE_MAX_SENSORS];</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* Interrupt Registers */</div><div class='ctx'> #define IXGBE_EICR      0x00800</div><div class='hunk'>@@ -802,6 +824,8 @@</div><div class='ctx'> #define IXGBE_TRGTTIMH0  0x08C28 /* Target Time Register 0 High - RW */</div><div class='ctx'> #define IXGBE_TRGTTIML1  0x08C2C /* Target Time Register 1 Low - RW */</div><div class='ctx'> #define IXGBE_TRGTTIMH1  0x08C30 /* Target Time Register 1 High - RW */</div><div class='add'>+#define IXGBE_CLKTIML    0x08C34 /* Clock Out Time Register Low - RW */</div><div class='add'>+#define IXGBE_CLKTIMH    0x08C38 /* Clock Out Time Register High - RW */</div><div class='ctx'> #define IXGBE_FREQOUT0   0x08C34 /* Frequency Out 0 Control register - RW */</div><div class='ctx'> #define IXGBE_FREQOUT1   0x08C38 /* Frequency Out 1 Control register - RW */</div><div class='ctx'> #define IXGBE_AUXSTMPL0  0x08C3C /* Auxiliary Time Stamp 0 register Low - RO */</div><div class='hunk'>@@ -1287,6 +1311,7 @@ enum {</div><div class='ctx'> #define IXGBE_EICR_LINKSEC      0x00200000 /* PN Threshold */</div><div class='ctx'> #define IXGBE_EICR_MNG          0x00400000 /* Manageability Event Interrupt */</div><div class='ctx'> #define IXGBE_EICR_TS           0x00800000 /* Thermal Sensor Event */</div><div class='add'>+#define IXGBE_EICR_TIMESYNC     0x01000000 /* Timesync Event */</div><div class='ctx'> #define IXGBE_EICR_GPI_SDP0     0x01000000 /* Gen Purpose Interrupt on SDP0 */</div><div class='ctx'> #define IXGBE_EICR_GPI_SDP1     0x02000000 /* Gen Purpose Interrupt on SDP1 */</div><div class='ctx'> #define IXGBE_EICR_GPI_SDP2     0x04000000 /* Gen Purpose Interrupt on SDP2 */</div><div class='hunk'>@@ -1304,6 +1329,7 @@ enum {</div><div class='ctx'> #define IXGBE_EICS_MAILBOX      IXGBE_EICR_MAILBOX   /* VF to PF Mailbox Int */</div><div class='ctx'> #define IXGBE_EICS_LSC          IXGBE_EICR_LSC       /* Link Status Change */</div><div class='ctx'> #define IXGBE_EICS_MNG          IXGBE_EICR_MNG       /* MNG Event Interrupt */</div><div class='add'>+#define IXGBE_EICS_TIMESYNC     IXGBE_EICR_TIMESYNC  /* Timesync Event */</div><div class='ctx'> #define IXGBE_EICS_GPI_SDP0     IXGBE_EICR_GPI_SDP0  /* SDP0 Gen Purpose Int */</div><div class='ctx'> #define IXGBE_EICS_GPI_SDP1     IXGBE_EICR_GPI_SDP1  /* SDP1 Gen Purpose Int */</div><div class='ctx'> #define IXGBE_EICS_GPI_SDP2     IXGBE_EICR_GPI_SDP2  /* SDP2 Gen Purpose Int */</div><div class='hunk'>@@ -1322,6 +1348,7 @@ enum {</div><div class='ctx'> #define IXGBE_EIMS_LSC          IXGBE_EICR_LSC       /* Link Status Change */</div><div class='ctx'> #define IXGBE_EIMS_MNG          IXGBE_EICR_MNG       /* MNG Event Interrupt */</div><div class='ctx'> #define IXGBE_EIMS_TS           IXGBE_EICR_TS        /* Thermel Sensor Event */</div><div class='add'>+#define IXGBE_EIMS_TIMESYNC     IXGBE_EICR_TIMESYNC  /* Timesync Event */</div><div class='ctx'> #define IXGBE_EIMS_GPI_SDP0     IXGBE_EICR_GPI_SDP0  /* SDP0 Gen Purpose Int */</div><div class='ctx'> #define IXGBE_EIMS_GPI_SDP1     IXGBE_EICR_GPI_SDP1  /* SDP1 Gen Purpose Int */</div><div class='ctx'> #define IXGBE_EIMS_GPI_SDP2     IXGBE_EICR_GPI_SDP2  /* SDP2 Gen Purpose Int */</div><div class='hunk'>@@ -1339,6 +1366,7 @@ enum {</div><div class='ctx'> #define IXGBE_EIMC_MAILBOX      IXGBE_EICR_MAILBOX   /* VF to PF Mailbox Int */</div><div class='ctx'> #define IXGBE_EIMC_LSC          IXGBE_EICR_LSC       /* Link Status Change */</div><div class='ctx'> #define IXGBE_EIMC_MNG          IXGBE_EICR_MNG       /* MNG Event Interrupt */</div><div class='add'>+#define IXGBE_EIMC_TIMESYNC     IXGBE_EICR_TIMESYNC  /* Timesync Event */</div><div class='ctx'> #define IXGBE_EIMC_GPI_SDP0     IXGBE_EICR_GPI_SDP0  /* SDP0 Gen Purpose Int */</div><div class='ctx'> #define IXGBE_EIMC_GPI_SDP1     IXGBE_EICR_GPI_SDP1  /* SDP1 Gen Purpose Int */</div><div class='ctx'> #define IXGBE_EIMC_GPI_SDP2     IXGBE_EICR_GPI_SDP2  /* SDP2 Gen Purpose Int */</div><div class='hunk'>@@ -1479,8 +1507,10 @@ enum {</div><div class='ctx'> #define IXGBE_ESDP_SDP4 0x00000010 /* SDP4 Data Value */</div><div class='ctx'> #define IXGBE_ESDP_SDP5 0x00000020 /* SDP5 Data Value */</div><div class='ctx'> #define IXGBE_ESDP_SDP6 0x00000040 /* SDP6 Data Value */</div><div class='add'>+#define IXGBE_ESDP_SDP0_DIR     0x00000100 /* SDP0 IO direction */</div><div class='ctx'> #define IXGBE_ESDP_SDP4_DIR     0x00000004 /* SDP4 IO direction */</div><div class='ctx'> #define IXGBE_ESDP_SDP5_DIR     0x00002000 /* SDP5 IO direction */</div><div class='add'>+#define IXGBE_ESDP_SDP0_NATIVE  0x00010000 /* SDP0 Native Function */</div><div class='ctx'> </div><div class='ctx'> /* LEDCTL Bit Masks */</div><div class='ctx'> #define IXGBE_LED_IVRT_BASE      0x00000040</div><div class='hunk'>@@ -1677,11 +1707,29 @@ enum {</div><div class='ctx'> #define IXGBE_PBANUM0_PTR       0x15</div><div class='ctx'> #define IXGBE_PBANUM1_PTR       0x16</div><div class='ctx'> #define IXGBE_FREE_SPACE_PTR    0X3E</div><div class='add'>+</div><div class='add'>+/* External Thermal Sensor Config */</div><div class='add'>+#define IXGBE_ETS_CFG                   0x26</div><div class='add'>+#define IXGBE_ETS_LTHRES_DELTA_MASK     0x07C0</div><div class='add'>+#define IXGBE_ETS_LTHRES_DELTA_SHIFT    6</div><div class='add'>+#define IXGBE_ETS_TYPE_MASK             0x0038</div><div class='add'>+#define IXGBE_ETS_TYPE_SHIFT            3</div><div class='add'>+#define IXGBE_ETS_TYPE_EMC              0x000</div><div class='add'>+#define IXGBE_ETS_TYPE_EMC_SHIFTED      0x000</div><div class='add'>+#define IXGBE_ETS_NUM_SENSORS_MASK      0x0007</div><div class='add'>+#define IXGBE_ETS_DATA_LOC_MASK         0x3C00</div><div class='add'>+#define IXGBE_ETS_DATA_LOC_SHIFT        10</div><div class='add'>+#define IXGBE_ETS_DATA_INDEX_MASK       0x0300</div><div class='add'>+#define IXGBE_ETS_DATA_INDEX_SHIFT      8</div><div class='add'>+#define IXGBE_ETS_DATA_HTHRESH_MASK     0x00FF</div><div class='add'>+</div><div class='ctx'> #define IXGBE_SAN_MAC_ADDR_PTR  0x28</div><div class='ctx'> #define IXGBE_DEVICE_CAPS       0x2C</div><div class='ctx'> #define IXGBE_SERIAL_NUMBER_MAC_ADDR 0x11</div><div class='ctx'> #define IXGBE_PCIE_MSIX_82599_CAPS  0x72</div><div class='add'>+#define IXGBE_MAX_MSIX_VECTORS_82599	0x40</div><div class='ctx'> #define IXGBE_PCIE_MSIX_82598_CAPS  0x62</div><div class='add'>+#define IXGBE_MAX_MSIX_VECTORS_82598	0x13</div><div class='ctx'> </div><div class='ctx'> /* MSI-X capability fields masks */</div><div class='ctx'> #define IXGBE_PCIE_MSIX_TBL_SZ_MASK     0x7FF</div><div class='hunk'>@@ -1839,6 +1887,40 @@ enum {</div><div class='ctx'> #define IXGBE_RXDCTL_RLPML_EN   0x00008000</div><div class='ctx'> #define IXGBE_RXDCTL_VME        0x40000000  /* VLAN mode enable */</div><div class='ctx'> </div><div class='add'>+#define IXGBE_TSAUXC_EN_CLK   0x00000004</div><div class='add'>+#define IXGBE_TSAUXC_SYNCLK   0x00000008</div><div class='add'>+#define IXGBE_TSAUXC_SDP0_INT 0x00000040</div><div class='add'>+</div><div class='add'>+#define IXGBE_TSYNCTXCTL_VALID		0x00000001 /* Tx timestamp valid */</div><div class='add'>+#define IXGBE_TSYNCTXCTL_ENABLED	0x00000010 /* Tx timestamping enabled */</div><div class='add'>+</div><div class='add'>+#define IXGBE_TSYNCRXCTL_VALID		0x00000001 /* Rx timestamp valid */</div><div class='add'>+#define IXGBE_TSYNCRXCTL_TYPE_MASK	0x0000000E /* Rx type mask */</div><div class='add'>+#define IXGBE_TSYNCRXCTL_TYPE_L2_V2	0x00</div><div class='add'>+#define IXGBE_TSYNCRXCTL_TYPE_L4_V1	0x02</div><div class='add'>+#define IXGBE_TSYNCRXCTL_TYPE_L2_L4_V2	0x04</div><div class='add'>+#define IXGBE_TSYNCRXCTL_TYPE_EVENT_V2	0x0A</div><div class='add'>+#define IXGBE_TSYNCRXCTL_ENABLED	0x00000010 /* Rx Timestamping enabled */</div><div class='add'>+</div><div class='add'>+#define IXGBE_RXMTRL_V1_CTRLT_MASK	0x000000FF</div><div class='add'>+#define IXGBE_RXMTRL_V1_SYNC_MSG	0x00</div><div class='add'>+#define IXGBE_RXMTRL_V1_DELAY_REQ_MSG	0x01</div><div class='add'>+#define IXGBE_RXMTRL_V1_FOLLOWUP_MSG	0x02</div><div class='add'>+#define IXGBE_RXMTRL_V1_DELAY_RESP_MSG	0x03</div><div class='add'>+#define IXGBE_RXMTRL_V1_MGMT_MSG	0x04</div><div class='add'>+</div><div class='add'>+#define IXGBE_RXMTRL_V2_MSGID_MASK		0x0000FF00</div><div class='add'>+#define IXGBE_RXMTRL_V2_SYNC_MSG		0x0000</div><div class='add'>+#define IXGBE_RXMTRL_V2_DELAY_REQ_MSG		0x0100</div><div class='add'>+#define IXGBE_RXMTRL_V2_PDELAY_REQ_MSG		0x0200</div><div class='add'>+#define IXGBE_RXMTRL_V2_PDELAY_RESP_MSG		0x0300</div><div class='add'>+#define IXGBE_RXMTRL_V2_FOLLOWUP_MSG		0x0800</div><div class='add'>+#define IXGBE_RXMTRL_V2_DELAY_RESP_MSG		0x0900</div><div class='add'>+#define IXGBE_RXMTRL_V2_PDELAY_FOLLOWUP_MSG	0x0A00</div><div class='add'>+#define IXGBE_RXMTRL_V2_ANNOUNCE_MSG		0x0B00</div><div class='add'>+#define IXGBE_RXMTRL_V2_SIGNALING_MSG		0x0C00</div><div class='add'>+#define IXGBE_RXMTRL_V2_MGMT_MSG		0x0D00</div><div class='add'>+</div><div class='ctx'> #define IXGBE_FCTRL_SBP 0x00000002 /* Store Bad Packet */</div><div class='ctx'> #define IXGBE_FCTRL_MPE 0x00000100 /* Multicast Promiscuous Ena*/</div><div class='ctx'> #define IXGBE_FCTRL_UPE 0x00000200 /* Unicast Promiscuous Ena */</div><div class='hunk'>@@ -1852,7 +1934,7 @@ enum {</div><div class='ctx'> #define IXGBE_MFLCN_DPF         0x00000002 /* Discard Pause Frame */</div><div class='ctx'> #define IXGBE_MFLCN_RPFCE       0x00000004 /* Receive Priority FC Enable */</div><div class='ctx'> #define IXGBE_MFLCN_RFCE        0x00000008 /* Receive FC Enable */</div><div class='del'>-#define IXGBE_MFLCN_RPFCE_MASK	0x00000FF0 /* Receive FC Mask */</div><div class='add'>+#define IXGBE_MFLCN_RPFCE_MASK	0x00000FF4 /* Receive FC Mask */</div><div class='ctx'> </div><div class='ctx'> #define IXGBE_MFLCN_RPFCE_SHIFT		 4</div><div class='ctx'> </div><div class='hunk'>@@ -1968,6 +2050,7 @@ enum {</div><div class='ctx'> #define IXGBE_RXDADV_STAT_FCSTAT_NODDP  0x00000010 /* 01: Ctxt w/o DDP */</div><div class='ctx'> #define IXGBE_RXDADV_STAT_FCSTAT_FCPRSP 0x00000020 /* 10: Recv. FCP_RSP */</div><div class='ctx'> #define IXGBE_RXDADV_STAT_FCSTAT_DDP    0x00000030 /* 11: Ctxt w/ DDP */</div><div class='add'>+#define IXGBE_RXDADV_STAT_TS		0x00010000 /* IEEE 1588 Time Stamp */</div><div class='ctx'> </div><div class='ctx'> /* PSRTYPE bit definitions */</div><div class='ctx'> #define IXGBE_PSRTYPE_TCPHDR    0x00000010</div><div class='hunk'>@@ -2245,6 +2328,7 @@ struct ixgbe_adv_tx_context_desc {</div><div class='ctx'> /* Adv Transmit Descriptor Config Masks */</div><div class='ctx'> #define IXGBE_ADVTXD_DTALEN_MASK      0x0000FFFF /* Data buf length(bytes) */</div><div class='ctx'> #define IXGBE_ADVTXD_MAC_LINKSEC      0x00040000 /* Insert LinkSec */</div><div class='add'>+#define IXGBE_ADVTXD_MAC_TSTAMP	      0x00080000 /* IEEE 1588 Time Stamp */</div><div class='ctx'> #define IXGBE_ADVTXD_IPSEC_SA_INDEX_MASK   0x000003FF /* IPSec SA index */</div><div class='ctx'> #define IXGBE_ADVTXD_IPSEC_ESP_LEN_MASK    0x000001FF /* IPSec ESP length */</div><div class='ctx'> #define IXGBE_ADVTXD_DTYP_MASK  0x00F00000 /* DTYP mask */</div><div class='hunk'>@@ -2533,9 +2617,6 @@ enum ixgbe_fc_mode {</div><div class='ctx'> 	ixgbe_fc_rx_pause,</div><div class='ctx'> 	ixgbe_fc_tx_pause,</div><div class='ctx'> 	ixgbe_fc_full,</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	ixgbe_fc_pfc,</div><div class='del'>-#endif</div><div class='ctx'> 	ixgbe_fc_default</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -2768,10 +2849,12 @@ struct ixgbe_mac_operations {</div><div class='ctx'> 	void (*set_vlan_anti_spoofing)(struct ixgbe_hw *, bool, int);</div><div class='ctx'> </div><div class='ctx'> 	/* Flow Control */</div><div class='del'>-	s32 (*fc_enable)(struct ixgbe_hw *, s32);</div><div class='add'>+	s32 (*fc_enable)(struct ixgbe_hw *);</div><div class='ctx'> </div><div class='ctx'> 	/* Manageability interface */</div><div class='ctx'> 	s32 (*set_fw_drv_ver)(struct ixgbe_hw *, u8, u8, u8, u8);</div><div class='add'>+	s32 (*get_thermal_sensor_data)(struct ixgbe_hw *);</div><div class='add'>+	s32 (*init_thermal_sensor_thresh)(struct ixgbe_hw *hw);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ixgbe_phy_operations {</div><div class='hunk'>@@ -2813,6 +2896,7 @@ struct ixgbe_mac_info {</div><div class='ctx'> 	u16                             wwnn_prefix;</div><div class='ctx'> 	/* prefix for World Wide Port Name (WWPN) */</div><div class='ctx'> 	u16                             wwpn_prefix;</div><div class='add'>+	u16				max_msix_vectors;</div><div class='ctx'> #define IXGBE_MAX_MTA			128</div><div class='ctx'> 	u32				mta_shadow[IXGBE_MAX_MTA];</div><div class='ctx'> 	s32                             mc_filter_type;</div><div class='hunk'>@@ -2823,12 +2907,12 @@ struct ixgbe_mac_info {</div><div class='ctx'> 	u32				rx_pb_size;</div><div class='ctx'> 	u32                             max_tx_queues;</div><div class='ctx'> 	u32                             max_rx_queues;</div><div class='del'>-	u32                             max_msix_vectors;</div><div class='ctx'> 	u32                             orig_autoc;</div><div class='ctx'> 	u32                             orig_autoc2;</div><div class='ctx'> 	bool                            orig_link_settings_stored;</div><div class='ctx'> 	bool                            autotry_restart;</div><div class='ctx'> 	u8                              flags;</div><div class='add'>+	struct ixgbe_thermal_sensor_data  thermal_sensor_data;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ixgbe_phy_info {</div><div class='hunk'>@@ -2938,7 +3022,6 @@ struct ixgbe_info {</div><div class='ctx'> #define IXGBE_ERR_OVERTEMP                      -26</div><div class='ctx'> #define IXGBE_ERR_FC_NOT_NEGOTIATED             -27</div><div class='ctx'> #define IXGBE_ERR_FC_NOT_SUPPORTED              -28</div><div class='del'>-#define IXGBE_ERR_FLOW_CONTROL                  -29</div><div class='ctx'> #define IXGBE_ERR_SFP_SETUP_NOT_COMPLETE        -30</div><div class='ctx'> #define IXGBE_ERR_PBA_SECTION                   -31</div><div class='ctx'> #define IXGBE_ERR_INVALID_ARGUMENT              -32</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c<br/>index 97a991403bbd..f90ec078ece2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c</a></div><div class='hunk'>@@ -849,6 +849,8 @@ static struct ixgbe_mac_operations mac_ops_X540 = {</div><div class='ctx'> 	.release_swfw_sync      = &amp;ixgbe_release_swfw_sync_X540,</div><div class='ctx'> 	.disable_rx_buff	= &amp;ixgbe_disable_rx_buff_generic,</div><div class='ctx'> 	.enable_rx_buff		= &amp;ixgbe_enable_rx_buff_generic,</div><div class='add'>+	.get_thermal_sensor_data = NULL,</div><div class='add'>+	.init_thermal_sensor_thresh = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct ixgbe_eeprom_operations eeprom_ops_X540 = {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/defines.h b/drivers/net/ethernet/intel/ixgbevf/defines.h<br/>index 947b5c830735..e09a6cc633bb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbevf/defines.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbevf/defines.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbevf/defines.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbevf/defines.h</a></div><div class='hunk'>@@ -40,6 +40,7 @@</div><div class='ctx'> typedef u32 ixgbe_link_speed;</div><div class='ctx'> #define IXGBE_LINK_SPEED_1GB_FULL       0x0020</div><div class='ctx'> #define IXGBE_LINK_SPEED_10GB_FULL      0x0080</div><div class='add'>+#define IXGBE_LINK_SPEED_100_FULL	0x0008</div><div class='ctx'> </div><div class='ctx'> #define IXGBE_CTRL_RST              0x04000000 /* Reset (SW) */</div><div class='ctx'> #define IXGBE_RXDCTL_ENABLE         0x02000000 /* Enable specific Rx Queue */</div><div class='hunk'>@@ -48,6 +49,7 @@ typedef u32 ixgbe_link_speed;</div><div class='ctx'> #define IXGBE_LINKS_SPEED_82599     0x30000000</div><div class='ctx'> #define IXGBE_LINKS_SPEED_10G_82599 0x30000000</div><div class='ctx'> #define IXGBE_LINKS_SPEED_1G_82599  0x20000000</div><div class='add'>+#define IXGBE_LINKS_SPEED_100_82599 0x10000000</div><div class='ctx'> </div><div class='ctx'> /* Number of Transmit and Receive Descriptors must be a multiple of 8 */</div><div class='ctx'> #define IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE  8</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/ethtool.c b/drivers/net/ethernet/intel/ixgbevf/ethtool.c<br/>index 2bfe0d1d7958..e8dddf572d38 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbevf/ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbevf/ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbevf/ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbevf/ethtool.c</a></div><div class='hunk'>@@ -107,10 +107,20 @@ static int ixgbevf_get_settings(struct net_device *netdev,</div><div class='ctx'> 	hw-&gt;mac.ops.check_link(hw, &amp;link_speed, &amp;link_up, false);</div><div class='ctx'> </div><div class='ctx'> 	if (link_up) {</div><div class='del'>-		ethtool_cmd_speed_set(</div><div class='del'>-			ecmd,</div><div class='del'>-			(link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?</div><div class='del'>-			SPEED_10000 : SPEED_1000);</div><div class='add'>+		__u32 speed = SPEED_10000;</div><div class='add'>+		switch (link_speed) {</div><div class='add'>+		case IXGBE_LINK_SPEED_10GB_FULL:</div><div class='add'>+			speed = SPEED_10000;</div><div class='add'>+			break;</div><div class='add'>+		case IXGBE_LINK_SPEED_1GB_FULL:</div><div class='add'>+			speed = SPEED_1000;</div><div class='add'>+			break;</div><div class='add'>+		case IXGBE_LINK_SPEED_100_FULL:</div><div class='add'>+			speed = SPEED_100;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ethtool_cmd_speed_set(ecmd, speed);</div><div class='ctx'> 		ecmd-&gt;duplex = DUPLEX_FULL;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ethtool_cmd_speed_set(ecmd, -1);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h b/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h<br/>index dfed420a1bf6..0a1b99240d43 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbevf/ixgbevf.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbevf/ixgbevf.h</a></div><div class='hunk'>@@ -287,7 +287,7 @@ extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops;</div><div class='ctx'> extern const char ixgbevf_driver_name[];</div><div class='ctx'> extern const char ixgbevf_driver_version[];</div><div class='ctx'> </div><div class='del'>-extern int ixgbevf_up(struct ixgbevf_adapter *adapter);</div><div class='add'>+extern void ixgbevf_up(struct ixgbevf_adapter *adapter);</div><div class='ctx'> extern void ixgbevf_down(struct ixgbevf_adapter *adapter);</div><div class='ctx'> extern void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);</div><div class='ctx'> extern void ixgbevf_reset(struct ixgbevf_adapter *adapter);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c b/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c<br/>index 307611ae831d..f69ec4288b10 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c</a></div><div class='hunk'>@@ -57,7 +57,7 @@ const char ixgbevf_driver_name[] = "ixgbevf";</div><div class='ctx'> static const char ixgbevf_driver_string[] =</div><div class='ctx'> 	"Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";</div><div class='ctx'> </div><div class='del'>-#define DRV_VERSION "2.2.0-k"</div><div class='add'>+#define DRV_VERSION "2.6.0-k"</div><div class='ctx'> const char ixgbevf_driver_version[] = DRV_VERSION;</div><div class='ctx'> static char ixgbevf_copyright[] =</div><div class='ctx'> 	"Copyright (c) 2009 - 2012 Intel Corporation.";</div><div class='hunk'>@@ -1608,13 +1608,14 @@ static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)</div><div class='ctx'> 	adapter-&gt;stats.base_vfmprc = adapter-&gt;stats.last_vfmprc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)</div><div class='add'>+static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = adapter-&gt;netdev;</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	int i, j = 0;</div><div class='ctx'> 	int num_rx_rings = adapter-&gt;num_rx_queues;</div><div class='ctx'> 	u32 txdctl, rxdctl;</div><div class='add'>+	u32 msg[2];</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adapter-&gt;num_tx_queues; i++) {</div><div class='ctx'> 		j = adapter-&gt;tx_ring[i].reg_idx;</div><div class='hunk'>@@ -1653,6 +1654,10 @@ static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)</div><div class='ctx'> 			hw-&gt;mac.ops.set_rar(hw, 0, hw-&gt;mac.perm_addr, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	msg[0] = IXGBE_VF_SET_LPE;</div><div class='add'>+	msg[1] = netdev-&gt;mtu + ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+	hw-&gt;mbx.ops.write_posted(hw, msg, 2);</div><div class='add'>+</div><div class='ctx'> 	clear_bit(__IXGBEVF_DOWN, &amp;adapter-&gt;state);</div><div class='ctx'> 	ixgbevf_napi_enable_all(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -1667,24 +1672,20 @@ static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)</div><div class='ctx'> 	adapter-&gt;flags |= IXGBE_FLAG_NEED_LINK_UPDATE;</div><div class='ctx'> 	adapter-&gt;link_check_timeout = jiffies;</div><div class='ctx'> 	mod_timer(&amp;adapter-&gt;watchdog_timer, jiffies);</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ixgbevf_up(struct ixgbevf_adapter *adapter)</div><div class='add'>+void ixgbevf_up(struct ixgbevf_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	ixgbevf_configure(adapter);</div><div class='ctx'> </div><div class='del'>-	err = ixgbevf_up_complete(adapter);</div><div class='add'>+	ixgbevf_up_complete(adapter);</div><div class='ctx'> </div><div class='ctx'> 	/* clear any pending interrupts, may auto mask */</div><div class='ctx'> 	IXGBE_READ_REG(hw, IXGBE_VTEICR);</div><div class='ctx'> </div><div class='ctx'> 	ixgbevf_irq_enable(adapter, true, true);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2673,9 +2674,7 @@ static int ixgbevf_open(struct net_device *netdev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	ixgbevf_map_rings_to_vectors(adapter);</div><div class='ctx'> </div><div class='del'>-	err = ixgbevf_up_complete(adapter);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_up;</div><div class='add'>+	ixgbevf_up_complete(adapter);</div><div class='ctx'> </div><div class='ctx'> 	/* clear any pending interrupts, may auto mask */</div><div class='ctx'> 	IXGBE_READ_REG(hw, IXGBE_VTEICR);</div><div class='hunk'>@@ -2689,7 +2688,6 @@ static int ixgbevf_open(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> err_req_irq:</div><div class='ctx'> 	ixgbevf_down(adapter);</div><div class='del'>-err_up:</div><div class='ctx'> 	ixgbevf_free_irq(adapter);</div><div class='ctx'> err_setup_rx:</div><div class='ctx'> 	ixgbevf_free_all_rx_resources(adapter);</div><div class='hunk'>@@ -3196,9 +3194,11 @@ static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 	/* must set new MTU before calling down or up */</div><div class='ctx'> 	netdev-&gt;mtu = new_mtu;</div><div class='ctx'> </div><div class='del'>-	msg[0] = IXGBE_VF_SET_LPE;</div><div class='del'>-	msg[1] = max_frame;</div><div class='del'>-	hw-&gt;mbx.ops.write_posted(hw, msg, 2);</div><div class='add'>+	if (!netif_running(netdev)) {</div><div class='add'>+		msg[0] = IXGBE_VF_SET_LPE;</div><div class='add'>+		msg[1] = max_frame;</div><div class='add'>+		hw-&gt;mbx.ops.write_posted(hw, msg, 2);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		ixgbevf_reinit_locked(adapter);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/vf.c b/drivers/net/ethernet/intel/ixgbevf/vf.c<br/>index 74be7411242a..ec89b86f7ca4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbevf/vf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/intel/ixgbevf/vf.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/intel/ixgbevf/vf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/intel/ixgbevf/vf.c</a></div><div class='hunk'>@@ -404,11 +404,17 @@ static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw,</div><div class='ctx'> 	else</div><div class='ctx'> 		*link_up = false;</div><div class='ctx'> </div><div class='del'>-	if ((links_reg &amp; IXGBE_LINKS_SPEED_82599) ==</div><div class='del'>-	    IXGBE_LINKS_SPEED_10G_82599)</div><div class='add'>+	switch (links_reg &amp; IXGBE_LINKS_SPEED_82599) {</div><div class='add'>+	case IXGBE_LINKS_SPEED_10G_82599:</div><div class='ctx'> 		*speed = IXGBE_LINK_SPEED_10GB_FULL;</div><div class='del'>-	else</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_LINKS_SPEED_1G_82599:</div><div class='ctx'> 		*speed = IXGBE_LINK_SPEED_1GB_FULL;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_LINKS_SPEED_100_82599:</div><div class='add'>+		*speed = IXGBE_LINK_SPEED_100_FULL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c<br/>index 5e1ca0f05090..04d901d0ff63 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/marvell/mv643xx_eth.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/marvell/mv643xx_eth.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/marvell/mv643xx_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/marvell/mv643xx_eth.c</a></div><div class='hunk'>@@ -57,6 +57,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/inet_lro.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> </div><div class='ctx'> static char mv643xx_eth_driver_name[] = "mv643xx_eth";</div><div class='ctx'> static char mv643xx_eth_driver_version[] = "1.4";</div><div class='hunk'>@@ -289,10 +290,10 @@ struct mv643xx_eth_shared_private {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Hardware-specific parameters.</div><div class='ctx'> 	 */</div><div class='del'>-	unsigned int t_clk;</div><div class='ctx'> 	int extended_rx_coal_limit;</div><div class='ctx'> 	int tx_bw_control;</div><div class='ctx'> 	int tx_csum_limit;</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define TX_BW_CONTROL_ABSENT		0</div><div class='hunk'>@@ -431,6 +432,12 @@ struct mv643xx_eth_private {</div><div class='ctx'> 	int tx_desc_sram_size;</div><div class='ctx'> 	int txq_count;</div><div class='ctx'> 	struct tx_queue txq[8];</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Hardware-specific parameters.</div><div class='add'>+	 */</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	unsigned int t_clk;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1010,7 +1017,7 @@ static void tx_set_rate(struct mv643xx_eth_private *mp, int rate, int burst)</div><div class='ctx'> 	int mtu;</div><div class='ctx'> 	int bucket_size;</div><div class='ctx'> </div><div class='del'>-	token_rate = ((rate / 1000) * 64) / (mp-&gt;shared-&gt;t_clk / 1000);</div><div class='add'>+	token_rate = ((rate / 1000) * 64) / (mp-&gt;t_clk / 1000);</div><div class='ctx'> 	if (token_rate &gt; 1023)</div><div class='ctx'> 		token_rate = 1023;</div><div class='ctx'> </div><div class='hunk'>@@ -1042,7 +1049,7 @@ static void txq_set_rate(struct tx_queue *txq, int rate, int burst)</div><div class='ctx'> 	int token_rate;</div><div class='ctx'> 	int bucket_size;</div><div class='ctx'> </div><div class='del'>-	token_rate = ((rate / 1000) * 64) / (mp-&gt;shared-&gt;t_clk / 1000);</div><div class='add'>+	token_rate = ((rate / 1000) * 64) / (mp-&gt;t_clk / 1000);</div><div class='ctx'> 	if (token_rate &gt; 1023)</div><div class='ctx'> 		token_rate = 1023;</div><div class='ctx'> </div><div class='hunk'>@@ -1309,7 +1316,7 @@ static unsigned int get_rx_coal(struct mv643xx_eth_private *mp)</div><div class='ctx'> 		temp = (val &amp; 0x003fff00) &gt;&gt; 8;</div><div class='ctx'> </div><div class='ctx'> 	temp *= 64000000;</div><div class='del'>-	do_div(temp, mp-&gt;shared-&gt;t_clk);</div><div class='add'>+	do_div(temp, mp-&gt;t_clk);</div><div class='ctx'> </div><div class='ctx'> 	return (unsigned int)temp;</div><div class='ctx'> }</div><div class='hunk'>@@ -1319,7 +1326,7 @@ static void set_rx_coal(struct mv643xx_eth_private *mp, unsigned int usec)</div><div class='ctx'> 	u64 temp;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='del'>-	temp = (u64)usec * mp-&gt;shared-&gt;t_clk;</div><div class='add'>+	temp = (u64)usec * mp-&gt;t_clk;</div><div class='ctx'> 	temp += 31999999;</div><div class='ctx'> 	do_div(temp, 64000000);</div><div class='ctx'> </div><div class='hunk'>@@ -1345,7 +1352,7 @@ static unsigned int get_tx_coal(struct mv643xx_eth_private *mp)</div><div class='ctx'> </div><div class='ctx'> 	temp = (rdlp(mp, TX_FIFO_URGENT_THRESHOLD) &amp; 0x3fff0) &gt;&gt; 4;</div><div class='ctx'> 	temp *= 64000000;</div><div class='del'>-	do_div(temp, mp-&gt;shared-&gt;t_clk);</div><div class='add'>+	do_div(temp, mp-&gt;t_clk);</div><div class='ctx'> </div><div class='ctx'> 	return (unsigned int)temp;</div><div class='ctx'> }</div><div class='hunk'>@@ -1354,7 +1361,7 @@ static void set_tx_coal(struct mv643xx_eth_private *mp, unsigned int usec)</div><div class='ctx'> {</div><div class='ctx'> 	u64 temp;</div><div class='ctx'> </div><div class='del'>-	temp = (u64)usec * mp-&gt;shared-&gt;t_clk;</div><div class='add'>+	temp = (u64)usec * mp-&gt;t_clk;</div><div class='ctx'> 	temp += 31999999;</div><div class='ctx'> 	do_div(temp, 64000000);</div><div class='ctx'> </div><div class='hunk'>@@ -1665,6 +1672,7 @@ static const struct ethtool_ops mv643xx_eth_ethtool_ops = {</div><div class='ctx'> 	.get_strings		= mv643xx_eth_get_strings,</div><div class='ctx'> 	.get_ethtool_stats	= mv643xx_eth_get_ethtool_stats,</div><div class='ctx'> 	.get_sset_count		= mv643xx_eth_get_sset_count,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -2662,10 +2670,6 @@ static int mv643xx_eth_shared_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (dram)</div><div class='ctx'> 		mv643xx_eth_conf_mbus_windows(msp, dram);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Detect hardware parameters.</div><div class='del'>-	 */</div><div class='del'>-	msp-&gt;t_clk = (pd != NULL &amp;&amp; pd-&gt;t_clk != 0) ? pd-&gt;t_clk : 133000000;</div><div class='ctx'> 	msp-&gt;tx_csum_limit = (pd != NULL &amp;&amp; pd-&gt;tx_csum_limit) ?</div><div class='ctx'> 					pd-&gt;tx_csum_limit : 9 * 1024;</div><div class='ctx'> 	infer_hw_params(msp);</div><div class='hunk'>@@ -2890,6 +2894,18 @@ static int mv643xx_eth_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	mp-&gt;dev = dev;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Get the clk rate, if there is one, otherwise use the default.</div><div class='add'>+	 */</div><div class='add'>+	mp-&gt;clk = clk_get(&amp;pdev-&gt;dev, (pdev-&gt;id ? "1" : "0"));</div><div class='add'>+	if (!IS_ERR(mp-&gt;clk)) {</div><div class='add'>+		clk_prepare_enable(mp-&gt;clk);</div><div class='add'>+		mp-&gt;t_clk = clk_get_rate(mp-&gt;clk);</div><div class='add'>+	} else {</div><div class='add'>+		mp-&gt;t_clk = 133000000;</div><div class='add'>+		printk(KERN_WARNING "Unable to get clock");</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	set_params(mp, pd);</div><div class='ctx'> 	netif_set_real_num_tx_queues(dev, mp-&gt;txq_count);</div><div class='ctx'> 	netif_set_real_num_rx_queues(dev, mp-&gt;rxq_count);</div><div class='hunk'>@@ -2978,6 +2994,11 @@ static int mv643xx_eth_remove(struct platform_device *pdev)</div><div class='ctx'> 	if (mp-&gt;phy != NULL)</div><div class='ctx'> 		phy_detach(mp-&gt;phy);</div><div class='ctx'> 	cancel_work_sync(&amp;mp-&gt;tx_timeout_task);</div><div class='add'>+</div><div class='add'>+	if (!IS_ERR(mp-&gt;clk)) {</div><div class='add'>+		clk_disable_unprepare(mp-&gt;clk);</div><div class='add'>+		clk_put(mp-&gt;clk);</div><div class='add'>+	}</div><div class='ctx'> 	free_netdev(mp-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/pxa168_eth.c b/drivers/net/ethernet/marvell/pxa168_eth.c<br/>index efec6b60b327..1db023b075a1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/marvell/pxa168_eth.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/marvell/pxa168_eth.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/marvell/pxa168_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/marvell/pxa168_eth.c</a></div><div class='hunk'>@@ -1456,6 +1456,7 @@ static const struct ethtool_ops pxa168_ethtool_ops = {</div><div class='ctx'> 	.set_settings = pxa168_set_settings,</div><div class='ctx'> 	.get_drvinfo = pxa168_get_drvinfo,</div><div class='ctx'> 	.get_link = ethtool_op_get_link,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops pxa168_eth_netdev_ops = {</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/sky2.c b/drivers/net/ethernet/marvell/sky2.c<br/>index c9b504e2dfc3..cace36f2ab92 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/marvell/sky2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/marvell/sky2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/marvell/sky2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/marvell/sky2.c</a></div><div class='hunk'>@@ -2494,8 +2494,13 @@ static struct sk_buff *receive_copy(struct sky2_port *sky2,</div><div class='ctx'> 		skb_copy_from_linear_data(re-&gt;skb, skb-&gt;data, length);</div><div class='ctx'> 		skb-&gt;ip_summed = re-&gt;skb-&gt;ip_summed;</div><div class='ctx'> 		skb-&gt;csum = re-&gt;skb-&gt;csum;</div><div class='add'>+		skb-&gt;rxhash = re-&gt;skb-&gt;rxhash;</div><div class='add'>+		skb-&gt;vlan_tci = re-&gt;skb-&gt;vlan_tci;</div><div class='add'>+</div><div class='ctx'> 		pci_dma_sync_single_for_device(sky2-&gt;hw-&gt;pdev, re-&gt;data_addr,</div><div class='ctx'> 					       length, PCI_DMA_FROMDEVICE);</div><div class='add'>+		re-&gt;skb-&gt;vlan_tci = 0;</div><div class='add'>+		re-&gt;skb-&gt;rxhash = 0;</div><div class='ctx'> 		re-&gt;skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='ctx'> 		skb_put(skb, length);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2580,9 +2585,6 @@ static struct sk_buff *sky2_receive(struct net_device *dev,</div><div class='ctx'> 	struct sk_buff *skb = NULL;</div><div class='ctx'> 	u16 count = (status &amp; GMR_FS_LEN) &gt;&gt; 16;</div><div class='ctx'> </div><div class='del'>-	if (status &amp; GMR_FS_VLAN)</div><div class='del'>-		count -= VLAN_HLEN;	/* Account for vlan tag */</div><div class='del'>-</div><div class='ctx'> 	netif_printk(sky2, rx_status, KERN_DEBUG, dev,</div><div class='ctx'> 		     "rx slot %u status 0x%x len %d\n",</div><div class='ctx'> 		     sky2-&gt;rx_next, status, length);</div><div class='hunk'>@@ -2590,6 +2592,9 @@ static struct sk_buff *sky2_receive(struct net_device *dev,</div><div class='ctx'> 	sky2-&gt;rx_next = (sky2-&gt;rx_next + 1) % sky2-&gt;rx_pending;</div><div class='ctx'> 	prefetch(sky2-&gt;rx_ring + sky2-&gt;rx_next);</div><div class='ctx'> </div><div class='add'>+	if (vlan_tx_tag_present(re-&gt;skb))</div><div class='add'>+		count -= VLAN_HLEN;	/* Account for vlan tag */</div><div class='add'>+</div><div class='ctx'> 	/* This chip has hardware problems that generates bogus status.</div><div class='ctx'> 	 * So do only marginal checking and expect higher level protocols</div><div class='ctx'> 	 * to handle crap frames.</div><div class='hunk'>@@ -2647,11 +2652,8 @@ static inline void sky2_tx_done(struct net_device *dev, u16 last)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void sky2_skb_rx(const struct sky2_port *sky2,</div><div class='del'>-			       u32 status, struct sk_buff *skb)</div><div class='add'>+			       struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	if (status &amp; GMR_FS_VLAN)</div><div class='del'>-		__vlan_hwaccel_put_tag(skb, be16_to_cpu(sky2-&gt;rx_tag));</div><div class='del'>-</div><div class='ctx'> 	if (skb-&gt;ip_summed == CHECKSUM_NONE)</div><div class='ctx'> 		netif_receive_skb(skb);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -2705,6 +2707,14 @@ static void sky2_rx_checksum(struct sky2_port *sky2, u32 status)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void sky2_rx_tag(struct sky2_port *sky2, u16 length)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	skb = sky2-&gt;rx_ring[sky2-&gt;rx_next].skb;</div><div class='add'>+	__vlan_hwaccel_put_tag(skb, be16_to_cpu(length));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void sky2_rx_hash(struct sky2_port *sky2, u32 status)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='hunk'>@@ -2763,8 +2773,7 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='del'>-</div><div class='del'>-			sky2_skb_rx(sky2, status, skb);</div><div class='add'>+			sky2_skb_rx(sky2, skb);</div><div class='ctx'> </div><div class='ctx'> 			/* Stop after net poll weight */</div><div class='ctx'> 			if (++work_done &gt;= to_do)</div><div class='hunk'>@@ -2772,11 +2781,11 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_RXVLAN:</div><div class='del'>-			sky2-&gt;rx_tag = length;</div><div class='add'>+			sky2_rx_tag(sky2, length);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case OP_RXCHKSVLAN:</div><div class='del'>-			sky2-&gt;rx_tag = length;</div><div class='add'>+			sky2_rx_tag(sky2, length);</div><div class='ctx'> 			/* fall through */</div><div class='ctx'> 		case OP_RXCHKS:</div><div class='ctx'> 			if (likely(dev-&gt;features &amp; NETIF_F_RXCSUM))</div><div class='hunk'>@@ -4816,14 +4825,14 @@ static int __devinit sky2_test_msi(struct sky2_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	init_waitqueue_head(&amp;hw-&gt;msi_wait);</div><div class='ctx'> </div><div class='del'>-	sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);</div><div class='del'>-</div><div class='ctx'> 	err = request_irq(pdev-&gt;irq, sky2_test_intr, 0, DRV_NAME, hw);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "cannot assign irq %d\n", pdev-&gt;irq);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);</div><div class='add'>+</div><div class='ctx'> 	sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);</div><div class='ctx'> 	sky2_read8(hw, B0_CTST);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/sky2.h b/drivers/net/ethernet/marvell/sky2.h<br/>index ff6f58bf822a..3c896ce80b71 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/marvell/sky2.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/marvell/sky2.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/marvell/sky2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/marvell/sky2.h</a></div><div class='hunk'>@@ -2241,7 +2241,6 @@ struct sky2_port {</div><div class='ctx'> 	u16		     rx_pending;</div><div class='ctx'> 	u16		     rx_data_size;</div><div class='ctx'> 	u16		     rx_nfrags;</div><div class='del'>-	u16		     rx_tag;</div><div class='ctx'> </div><div class='ctx'> 	struct {</div><div class='ctx'> 		unsigned long last;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/Kconfig b/drivers/net/ethernet/mellanox/mlx4/Kconfig<br/>index 1bb93531f1ba..5f027f95cc84 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/Kconfig</a></div><div class='hunk'>@@ -11,6 +11,18 @@ config MLX4_EN</div><div class='ctx'> 	  This driver supports Mellanox Technologies ConnectX Ethernet</div><div class='ctx'> 	  devices.</div><div class='ctx'> </div><div class='add'>+config MLX4_EN_DCB</div><div class='add'>+	bool "Data Center Bridging (DCB) Support"</div><div class='add'>+	default y</div><div class='add'>+	depends on MLX4_EN &amp;&amp; DCB</div><div class='add'>+	---help---</div><div class='add'>+	  Say Y here if you want to use Data Center Bridging (DCB) in the</div><div class='add'>+	  driver.</div><div class='add'>+	  If set to N, will not be able to configure QoS and ratelimit attributes.</div><div class='add'>+	  This flag is depended on the kernel's DCB support.</div><div class='add'>+</div><div class='add'>+	  If unsure, set to Y</div><div class='add'>+</div><div class='ctx'> config MLX4_CORE</div><div class='ctx'> 	tristate</div><div class='ctx'> 	depends on PCI</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/Makefile b/drivers/net/ethernet/mellanox/mlx4/Makefile<br/>index 4a40ab967eeb..293127d28b33 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/Makefile</a></div><div class='hunk'>@@ -7,3 +7,4 @@ obj-$(CONFIG_MLX4_EN)               += mlx4_en.o</div><div class='ctx'> </div><div class='ctx'> mlx4_en-y := 	en_main.o en_tx.o en_rx.o en_ethtool.o en_port.o en_cq.o \</div><div class='ctx'> 		en_resources.o en_netdev.o en_selftest.o</div><div class='add'>+mlx4_en-$(CONFIG_MLX4_EN_DCB) += en_dcb_nl.o</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/alloc.c b/drivers/net/ethernet/mellanox/mlx4/alloc.c<br/>index 8be20e7ea3d1..06fef5b44f77 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/alloc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/alloc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/alloc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/alloc.c</a></div><div class='hunk'>@@ -124,9 +124,6 @@ void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;bitmap-&gt;lock);</div><div class='ctx'> 	bitmap_clear(bitmap-&gt;table, obj, cnt);</div><div class='del'>-	bitmap-&gt;last = min(bitmap-&gt;last, obj);</div><div class='del'>-	bitmap-&gt;top = (bitmap-&gt;top + bitmap-&gt;max + bitmap-&gt;reserved_top)</div><div class='del'>-			&amp; bitmap-&gt;mask;</div><div class='ctx'> 	bitmap-&gt;avail += cnt;</div><div class='ctx'> 	spin_unlock(&amp;bitmap-&gt;lock);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/cmd.c b/drivers/net/ethernet/mellanox/mlx4/cmd.c<br/>index 773c70ea3f62..842c8ce9494e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/cmd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/cmd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/cmd.c</a></div><div class='hunk'>@@ -617,7 +617,7 @@ static struct mlx4_cmd_info cmd_info[] = {</div><div class='ctx'> 		.out_is_imm = false,</div><div class='ctx'> 		.encode_slave_id = false,</div><div class='ctx'> 		.verify = NULL,</div><div class='del'>-		.wrapper = NULL</div><div class='add'>+		.wrapper = mlx4_QUERY_FW_wrapper</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.opcode = MLX4_CMD_QUERY_HCA,</div><div class='hunk'>@@ -635,7 +635,7 @@ static struct mlx4_cmd_info cmd_info[] = {</div><div class='ctx'> 		.out_is_imm = false,</div><div class='ctx'> 		.encode_slave_id = false,</div><div class='ctx'> 		.verify = NULL,</div><div class='del'>-		.wrapper = NULL</div><div class='add'>+		.wrapper = mlx4_QUERY_DEV_CAP_wrapper</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.opcode = MLX4_CMD_QUERY_FUNC_CAP,</div><div class='hunk'>@@ -1254,7 +1254,6 @@ static void mlx4_master_do_cmd(struct mlx4_dev *dev, int slave, u8 cmd,</div><div class='ctx'> 	struct mlx4_priv *priv = mlx4_priv(dev);</div><div class='ctx'> 	struct mlx4_slave_state *slave_state = priv-&gt;mfunc.master.slave_state;</div><div class='ctx'> 	u32 reply;</div><div class='del'>-	u32 slave_status = 0;</div><div class='ctx'> 	u8 is_going_down = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -1274,10 +1273,8 @@ static void mlx4_master_do_cmd(struct mlx4_dev *dev, int slave, u8 cmd,</div><div class='ctx'> 		}</div><div class='ctx'> 		/*check if we are in the middle of FLR process,</div><div class='ctx'> 		if so return "retry" status to the slave*/</div><div class='del'>-		if (MLX4_COMM_CMD_FLR == slave_state[slave].last_cmd) {</div><div class='del'>-			slave_status = MLX4_DELAY_RESET_SLAVE;</div><div class='add'>+		if (MLX4_COMM_CMD_FLR == slave_state[slave].last_cmd)</div><div class='ctx'> 			goto inform_slave_state;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		/* write the version in the event field */</div><div class='ctx'> 		reply |= mlx4_comm_get_version();</div><div class='hunk'>@@ -1557,7 +1554,7 @@ int mlx4_multi_func_init(struct mlx4_dev *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_resource:</div><div class='del'>-	mlx4_free_resource_tracker(dev);</div><div class='add'>+	mlx4_free_resource_tracker(dev, RES_TR_FREE_ALL);</div><div class='ctx'> err_thread:</div><div class='ctx'> 	flush_workqueue(priv-&gt;mfunc.master.comm_wq);</div><div class='ctx'> 	destroy_workqueue(priv-&gt;mfunc.master.comm_wq);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_cq.c b/drivers/net/ethernet/mellanox/mlx4/en_cq.c<br/>index 00b81272e314..908a460d8db6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_cq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/en_cq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_cq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_cq.c</a></div><div class='hunk'>@@ -124,11 +124,7 @@ int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,</div><div class='ctx'> 	cq-&gt;mcq.comp  = cq-&gt;is_tx ? mlx4_en_tx_irq : mlx4_en_rx_irq;</div><div class='ctx'> 	cq-&gt;mcq.event = mlx4_en_cq_event;</div><div class='ctx'> </div><div class='del'>-	if (cq-&gt;is_tx) {</div><div class='del'>-		init_timer(&amp;cq-&gt;timer);</div><div class='del'>-		cq-&gt;timer.function = mlx4_en_poll_tx_cq;</div><div class='del'>-		cq-&gt;timer.data = (unsigned long) cq;</div><div class='del'>-	} else {</div><div class='add'>+	if (!cq-&gt;is_tx) {</div><div class='ctx'> 		netif_napi_add(cq-&gt;dev, &amp;cq-&gt;napi, mlx4_en_poll_rx_cq, 64);</div><div class='ctx'> 		napi_enable(&amp;cq-&gt;napi);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -151,16 +147,12 @@ void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)</div><div class='ctx'> </div><div class='ctx'> void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)</div><div class='ctx'> {</div><div class='del'>-	struct mlx4_en_dev *mdev = priv-&gt;mdev;</div><div class='del'>-</div><div class='del'>-	if (cq-&gt;is_tx)</div><div class='del'>-		del_timer(&amp;cq-&gt;timer);</div><div class='del'>-	else {</div><div class='add'>+	if (!cq-&gt;is_tx) {</div><div class='ctx'> 		napi_disable(&amp;cq-&gt;napi);</div><div class='ctx'> 		netif_napi_del(&amp;cq-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mlx4_cq_free(mdev-&gt;dev, &amp;cq-&gt;mcq);</div><div class='add'>+	mlx4_cq_free(priv-&gt;mdev-&gt;dev, &amp;cq-&gt;mcq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Set rx cq moderation parameters */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c b/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c<br/>new file mode 100644<br/>index 000000000000..5d36795877cb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c</a></div><div class='hunk'>@@ -0,0 +1,255 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2011 Mellanox Technologies. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This software is available to you under a choice of one of two</div><div class='add'>+ * licenses.  You may choose to be licensed under the terms of the GNU</div><div class='add'>+ * General Public License (GPL) Version 2, available from the file</div><div class='add'>+ * COPYING in the main directory of this source tree, or the</div><div class='add'>+ * OpenIB.org BSD license below:</div><div class='add'>+ *</div><div class='add'>+ *     Redistribution and use in source and binary forms, with or</div><div class='add'>+ *     without modification, are permitted provided that the following</div><div class='add'>+ *     conditions are met:</div><div class='add'>+ *</div><div class='add'>+ *      - Redistributions of source code must retain the above</div><div class='add'>+ *        copyright notice, this list of conditions and the following</div><div class='add'>+ *        disclaimer.</div><div class='add'>+ *</div><div class='add'>+ *      - Redistributions in binary form must reproduce the above</div><div class='add'>+ *        copyright notice, this list of conditions and the following</div><div class='add'>+ *        disclaimer in the documentation and/or other materials</div><div class='add'>+ *        provided with the distribution.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='add'>+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='add'>+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS</div><div class='add'>+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN</div><div class='add'>+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE</div><div class='add'>+ * SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dcbnl.h&gt;</div><div class='add'>+#include &lt;linux/math64.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mlx4_en.h"</div><div class='add'>+</div><div class='add'>+static int mlx4_en_dcbnl_ieee_getets(struct net_device *dev,</div><div class='add'>+				   struct ieee_ets *ets)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct ieee_ets *my_ets = &amp;priv-&gt;ets;</div><div class='add'>+</div><div class='add'>+	/* No IEEE PFC settings available */</div><div class='add'>+	if (!my_ets)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ets-&gt;ets_cap = IEEE_8021QAZ_MAX_TCS;</div><div class='add'>+	ets-&gt;cbs = my_ets-&gt;cbs;</div><div class='add'>+	memcpy(ets-&gt;tc_tx_bw, my_ets-&gt;tc_tx_bw, sizeof(ets-&gt;tc_tx_bw));</div><div class='add'>+	memcpy(ets-&gt;tc_tsa, my_ets-&gt;tc_tsa, sizeof(ets-&gt;tc_tsa));</div><div class='add'>+	memcpy(ets-&gt;prio_tc, my_ets-&gt;prio_tc, sizeof(ets-&gt;prio_tc));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx4_en_ets_validate(struct mlx4_en_priv *priv, struct ieee_ets *ets)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int total_ets_bw = 0;</div><div class='add'>+	int has_ets_tc = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; IEEE_8021QAZ_MAX_TCS; i++) {</div><div class='add'>+		if (ets-&gt;prio_tc[i] &gt; MLX4_EN_NUM_UP) {</div><div class='add'>+			en_err(priv, "Bad priority in UP &lt;=&gt; TC mapping. TC: %d, UP: %d\n",</div><div class='add'>+					i, ets-&gt;prio_tc[i]);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (ets-&gt;tc_tsa[i]) {</div><div class='add'>+		case IEEE_8021QAZ_TSA_STRICT:</div><div class='add'>+			break;</div><div class='add'>+		case IEEE_8021QAZ_TSA_ETS:</div><div class='add'>+			has_ets_tc = 1;</div><div class='add'>+			total_ets_bw += ets-&gt;tc_tx_bw[i];</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			en_err(priv, "TC[%d]: Not supported TSA: %d\n",</div><div class='add'>+					i, ets-&gt;tc_tsa[i]);</div><div class='add'>+			return -ENOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (has_ets_tc &amp;&amp; total_ets_bw != MLX4_EN_BW_MAX) {</div><div class='add'>+		en_err(priv, "Bad ETS BW sum: %d. Should be exactly 100%%\n",</div><div class='add'>+				total_ets_bw);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx4_en_config_port_scheduler(struct mlx4_en_priv *priv,</div><div class='add'>+		struct ieee_ets *ets, u16 *ratelimit)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_en_dev *mdev = priv-&gt;mdev;</div><div class='add'>+	int num_strict = 0;</div><div class='add'>+	int i;</div><div class='add'>+	__u8 tc_tx_bw[IEEE_8021QAZ_MAX_TCS] = { 0 };</div><div class='add'>+	__u8 pg[IEEE_8021QAZ_MAX_TCS] = { 0 };</div><div class='add'>+</div><div class='add'>+	ets = ets ?: &amp;priv-&gt;ets;</div><div class='add'>+	ratelimit = ratelimit ?: priv-&gt;maxrate;</div><div class='add'>+</div><div class='add'>+	/* higher TC means higher priority =&gt; lower pg */</div><div class='add'>+	for (i = IEEE_8021QAZ_MAX_TCS - 1; i &gt;= 0; i--) {</div><div class='add'>+		switch (ets-&gt;tc_tsa[i]) {</div><div class='add'>+		case IEEE_8021QAZ_TSA_STRICT:</div><div class='add'>+			pg[i] = num_strict++;</div><div class='add'>+			tc_tx_bw[i] = MLX4_EN_BW_MAX;</div><div class='add'>+			break;</div><div class='add'>+		case IEEE_8021QAZ_TSA_ETS:</div><div class='add'>+			pg[i] = MLX4_EN_TC_ETS;</div><div class='add'>+			tc_tx_bw[i] = ets-&gt;tc_tx_bw[i] ?: MLX4_EN_BW_MIN;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mlx4_SET_PORT_SCHEDULER(mdev-&gt;dev, priv-&gt;port, tc_tx_bw, pg,</div><div class='add'>+			ratelimit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx4_en_dcbnl_ieee_setets(struct net_device *dev, struct ieee_ets *ets)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct mlx4_en_dev *mdev = priv-&gt;mdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx4_en_ets_validate(priv, ets);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mlx4_SET_PORT_PRIO2TC(mdev-&gt;dev, priv-&gt;port, ets-&gt;prio_tc);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mlx4_en_config_port_scheduler(priv, ets, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;priv-&gt;ets, ets, sizeof(priv-&gt;ets));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx4_en_dcbnl_ieee_getpfc(struct net_device *dev,</div><div class='add'>+		struct ieee_pfc *pfc)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	pfc-&gt;pfc_cap = IEEE_8021QAZ_MAX_TCS;</div><div class='add'>+	pfc-&gt;pfc_en = priv-&gt;prof-&gt;tx_ppp;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx4_en_dcbnl_ieee_setpfc(struct net_device *dev,</div><div class='add'>+		struct ieee_pfc *pfc)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct mlx4_en_dev *mdev = priv-&gt;mdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	en_dbg(DRV, priv, "cap: 0x%x en: 0x%x mbc: 0x%x delay: %d\n",</div><div class='add'>+			pfc-&gt;pfc_cap,</div><div class='add'>+			pfc-&gt;pfc_en,</div><div class='add'>+			pfc-&gt;mbc,</div><div class='add'>+			pfc-&gt;delay);</div><div class='add'>+</div><div class='add'>+	priv-&gt;prof-&gt;rx_pause = priv-&gt;prof-&gt;tx_pause = !!pfc-&gt;pfc_en;</div><div class='add'>+	priv-&gt;prof-&gt;rx_ppp = priv-&gt;prof-&gt;tx_ppp = pfc-&gt;pfc_en;</div><div class='add'>+</div><div class='add'>+	err = mlx4_SET_PORT_general(mdev-&gt;dev, priv-&gt;port,</div><div class='add'>+				    priv-&gt;rx_skb_size + ETH_FCS_LEN,</div><div class='add'>+				    priv-&gt;prof-&gt;tx_pause,</div><div class='add'>+				    priv-&gt;prof-&gt;tx_ppp,</div><div class='add'>+				    priv-&gt;prof-&gt;rx_pause,</div><div class='add'>+				    priv-&gt;prof-&gt;rx_ppp);</div><div class='add'>+	if (err)</div><div class='add'>+		en_err(priv, "Failed setting pause params\n");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 mlx4_en_dcbnl_getdcbx(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	return DCB_CAP_DCBX_VER_IEEE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 mlx4_en_dcbnl_setdcbx(struct net_device *dev, u8 mode)</div><div class='add'>+{</div><div class='add'>+	if ((mode &amp; DCB_CAP_DCBX_LLD_MANAGED) ||</div><div class='add'>+	    (mode &amp; DCB_CAP_DCBX_VER_CEE) ||</div><div class='add'>+	    !(mode &amp; DCB_CAP_DCBX_VER_IEEE) ||</div><div class='add'>+	    !(mode &amp; DCB_CAP_DCBX_HOST))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MLX4_RATELIMIT_UNITS_IN_KB 100000 /* rate-limit HW unit in Kbps */</div><div class='add'>+static int mlx4_en_dcbnl_ieee_getmaxrate(struct net_device *dev,</div><div class='add'>+				   struct ieee_maxrate *maxrate)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;maxrate)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; IEEE_8021QAZ_MAX_TCS; i++)</div><div class='add'>+		maxrate-&gt;tc_maxrate[i] =</div><div class='add'>+			priv-&gt;maxrate[i] * MLX4_RATELIMIT_UNITS_IN_KB;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx4_en_dcbnl_ieee_setmaxrate(struct net_device *dev,</div><div class='add'>+		struct ieee_maxrate *maxrate)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='add'>+	u16 tmp[IEEE_8021QAZ_MAX_TCS];</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; IEEE_8021QAZ_MAX_TCS; i++) {</div><div class='add'>+		/* Convert from Kbps into HW units, rounding result up.</div><div class='add'>+		 * Setting to 0, means unlimited BW.</div><div class='add'>+		 */</div><div class='add'>+		tmp[i] = div_u64(maxrate-&gt;tc_maxrate[i] +</div><div class='add'>+				 MLX4_RATELIMIT_UNITS_IN_KB - 1,</div><div class='add'>+				 MLX4_RATELIMIT_UNITS_IN_KB);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mlx4_en_config_port_scheduler(priv, NULL, tmp);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	memcpy(priv-&gt;maxrate, tmp, sizeof(*priv-&gt;maxrate));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct dcbnl_rtnl_ops mlx4_en_dcbnl_ops = {</div><div class='add'>+	.ieee_getets	= mlx4_en_dcbnl_ieee_getets,</div><div class='add'>+	.ieee_setets	= mlx4_en_dcbnl_ieee_setets,</div><div class='add'>+	.ieee_getmaxrate = mlx4_en_dcbnl_ieee_getmaxrate,</div><div class='add'>+	.ieee_setmaxrate = mlx4_en_dcbnl_ieee_setmaxrate,</div><div class='add'>+	.ieee_getpfc	= mlx4_en_dcbnl_ieee_getpfc,</div><div class='add'>+	.ieee_setpfc	= mlx4_en_dcbnl_ieee_setpfc,</div><div class='add'>+</div><div class='add'>+	.getdcbx	= mlx4_en_dcbnl_getdcbx,</div><div class='add'>+	.setdcbx	= mlx4_en_dcbnl_setdcbx,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c<br/>index 70346fd7f9c4..72901ce2b088 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/en_ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_ethtool.c</a></div><div class='hunk'>@@ -83,7 +83,7 @@ static const char main_strings[][ETH_GSTRING_LEN] = {</div><div class='ctx'> #define NUM_ALL_STATS	(NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + NUM_PERF_STATS)</div><div class='ctx'> </div><div class='ctx'> static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {</div><div class='del'>-	"Interupt Test",</div><div class='add'>+	"Interrupt Test",</div><div class='ctx'> 	"Link Test",</div><div class='ctx'> 	"Speed Test",</div><div class='ctx'> 	"Register Test",</div><div class='hunk'>@@ -359,8 +359,8 @@ static int mlx4_en_get_coalesce(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	coal-&gt;tx_coalesce_usecs = 0;</div><div class='del'>-	coal-&gt;tx_max_coalesced_frames = 0;</div><div class='add'>+	coal-&gt;tx_coalesce_usecs = priv-&gt;tx_usecs;</div><div class='add'>+	coal-&gt;tx_max_coalesced_frames = priv-&gt;tx_frames;</div><div class='ctx'> 	coal-&gt;rx_coalesce_usecs = priv-&gt;rx_usecs;</div><div class='ctx'> 	coal-&gt;rx_max_coalesced_frames = priv-&gt;rx_frames;</div><div class='ctx'> </div><div class='hunk'>@@ -388,6 +388,21 @@ static int mlx4_en_set_coalesce(struct net_device *dev,</div><div class='ctx'> 				MLX4_EN_RX_COAL_TIME :</div><div class='ctx'> 				coal-&gt;rx_coalesce_usecs;</div><div class='ctx'> </div><div class='add'>+	/* Setting TX coalescing parameters */</div><div class='add'>+	if (coal-&gt;tx_coalesce_usecs != priv-&gt;tx_usecs ||</div><div class='add'>+	    coal-&gt;tx_max_coalesced_frames != priv-&gt;tx_frames) {</div><div class='add'>+		priv-&gt;tx_usecs = coal-&gt;tx_coalesce_usecs;</div><div class='add'>+		priv-&gt;tx_frames = coal-&gt;tx_max_coalesced_frames;</div><div class='add'>+		for (i = 0; i &lt; priv-&gt;tx_ring_num; i++) {</div><div class='add'>+			priv-&gt;tx_cq[i].moder_cnt = priv-&gt;tx_frames;</div><div class='add'>+			priv-&gt;tx_cq[i].moder_time = priv-&gt;tx_usecs;</div><div class='add'>+			if (mlx4_en_set_cq_moder(priv, &amp;priv-&gt;tx_cq[i])) {</div><div class='add'>+				en_warn(priv, "Failed changing moderation "</div><div class='add'>+					      "for TX cq %d\n", i);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Set adaptive coalescing params */</div><div class='ctx'> 	priv-&gt;pkt_rate_low = coal-&gt;pkt_rate_low;</div><div class='ctx'> 	priv-&gt;rx_usecs_low = coal-&gt;rx_coalesce_usecs_low;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_main.c b/drivers/net/ethernet/mellanox/mlx4/en_main.c<br/>index 2097a7d3c5b8..69ba57270481 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/en_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_main.c</a></div><div class='hunk'>@@ -101,6 +101,8 @@ static int mlx4_en_get_profile(struct mlx4_en_dev *mdev)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	params-&gt;udp_rss = udp_rss;</div><div class='add'>+	params-&gt;num_tx_rings_p_up = min_t(int, num_online_cpus(),</div><div class='add'>+			MLX4_EN_MAX_TX_RING_P_UP);</div><div class='ctx'> 	if (params-&gt;udp_rss &amp;&amp; !(mdev-&gt;dev-&gt;caps.flags</div><div class='ctx'> 					&amp; MLX4_DEV_CAP_FLAG_UDP_RSS)) {</div><div class='ctx'> 		mlx4_warn(mdev, "UDP RSS is not supported on this device.\n");</div><div class='hunk'>@@ -113,8 +115,8 @@ static int mlx4_en_get_profile(struct mlx4_en_dev *mdev)</div><div class='ctx'> 		params-&gt;prof[i].tx_ppp = pfctx;</div><div class='ctx'> 		params-&gt;prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE;</div><div class='ctx'> 		params-&gt;prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE;</div><div class='del'>-		params-&gt;prof[i].tx_ring_num = MLX4_EN_NUM_TX_RINGS +</div><div class='del'>-			(!!pfcrx) * MLX4_EN_NUM_PPP_RINGS;</div><div class='add'>+		params-&gt;prof[i].tx_ring_num = params-&gt;num_tx_rings_p_up *</div><div class='add'>+			MLX4_EN_NUM_UP;</div><div class='ctx'> 		params-&gt;prof[i].rss_rings = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -134,13 +136,12 @@ static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr,</div><div class='ctx'> 	struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr;</div><div class='ctx'> 	struct mlx4_en_priv *priv;</div><div class='ctx'> </div><div class='del'>-	if (!mdev-&gt;pndev[port])</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	priv = netdev_priv(mdev-&gt;pndev[port]);</div><div class='ctx'> 	switch (event) {</div><div class='ctx'> 	case MLX4_DEV_EVENT_PORT_UP:</div><div class='ctx'> 	case MLX4_DEV_EVENT_PORT_DOWN:</div><div class='add'>+		if (!mdev-&gt;pndev[port])</div><div class='add'>+			return;</div><div class='add'>+		priv = netdev_priv(mdev-&gt;pndev[port]);</div><div class='ctx'> 		/* To prevent races, we poll the link state in a separate</div><div class='ctx'> 		  task rather than changing it here */</div><div class='ctx'> 		priv-&gt;link_state = event;</div><div class='hunk'>@@ -152,7 +153,10 @@ static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		mlx4_warn(mdev, "Unhandled event: %d\n", event);</div><div class='add'>+		if (port &lt; 1 || port &gt; dev-&gt;caps.num_ports ||</div><div class='add'>+		    !mdev-&gt;pndev[port])</div><div class='add'>+			return;</div><div class='add'>+		mlx4_warn(mdev, "Unhandled event %d for port %d\n", event, port);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c<br/>index 31b455a49273..926d8aac941c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_netdev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/en_netdev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_netdev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_netdev.c</a></div><div class='hunk'>@@ -45,6 +45,27 @@</div><div class='ctx'> #include "mlx4_en.h"</div><div class='ctx'> #include "en_port.h"</div><div class='ctx'> </div><div class='add'>+static int mlx4_en_setup_tc(struct net_device *dev, u8 up)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='add'>+	int i;</div><div class='add'>+	unsigned int q, offset = 0;</div><div class='add'>+</div><div class='add'>+	if (up &amp;&amp; up != MLX4_EN_NUM_UP)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	netdev_set_num_tc(dev, up);</div><div class='add'>+</div><div class='add'>+	/* Partition Tx queues evenly amongst UP's */</div><div class='add'>+	q = priv-&gt;tx_ring_num / up;</div><div class='add'>+	for (i = 0; i &lt; up; i++) {</div><div class='add'>+		netdev_set_tc_queue(dev, i, q, offset);</div><div class='add'>+		offset += q;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='hunk'>@@ -421,6 +442,8 @@ static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)</div><div class='ctx'> 	 */</div><div class='ctx'> 	priv-&gt;rx_frames = MLX4_EN_RX_COAL_TARGET;</div><div class='ctx'> 	priv-&gt;rx_usecs = MLX4_EN_RX_COAL_TIME;</div><div class='add'>+	priv-&gt;tx_frames = MLX4_EN_TX_COAL_PKTS;</div><div class='add'>+	priv-&gt;tx_usecs = MLX4_EN_TX_COAL_TIME;</div><div class='ctx'> 	en_dbg(INTR, priv, "Default coalesing params for mtu:%d - "</div><div class='ctx'> 			   "rx_frames:%d rx_usecs:%d\n",</div><div class='ctx'> 		 priv-&gt;dev-&gt;mtu, priv-&gt;rx_frames, priv-&gt;rx_usecs);</div><div class='hunk'>@@ -437,8 +460,8 @@ static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;tx_ring_num; i++) {</div><div class='ctx'> 		cq = &amp;priv-&gt;tx_cq[i];</div><div class='del'>-		cq-&gt;moder_cnt = MLX4_EN_TX_COAL_PKTS;</div><div class='del'>-		cq-&gt;moder_time = MLX4_EN_TX_COAL_TIME;</div><div class='add'>+		cq-&gt;moder_cnt = priv-&gt;tx_frames;</div><div class='add'>+		cq-&gt;moder_time = priv-&gt;tx_usecs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Reset auto-moderation params */</div><div class='hunk'>@@ -650,12 +673,18 @@ int mlx4_en_start_port(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 		/* Configure ring */</div><div class='ctx'> 		tx_ring = &amp;priv-&gt;tx_ring[i];</div><div class='del'>-		err = mlx4_en_activate_tx_ring(priv, tx_ring, cq-&gt;mcq.cqn);</div><div class='add'>+		err = mlx4_en_activate_tx_ring(priv, tx_ring, cq-&gt;mcq.cqn,</div><div class='add'>+			i / priv-&gt;mdev-&gt;profile.num_tx_rings_p_up);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			en_err(priv, "Failed allocating Tx ring\n");</div><div class='ctx'> 			mlx4_en_deactivate_cq(priv, cq);</div><div class='ctx'> 			goto tx_err;</div><div class='ctx'> 		}</div><div class='add'>+		tx_ring-&gt;tx_queue = netdev_get_tx_queue(dev, i);</div><div class='add'>+</div><div class='add'>+		/* Arm CQ for TX completions */</div><div class='add'>+		mlx4_en_arm_cq(priv, cq);</div><div class='add'>+</div><div class='ctx'> 		/* Set initial ownership of all Tx TXBBs to SW (1) */</div><div class='ctx'> 		for (j = 0; j &lt; tx_ring-&gt;buf_size; j += STAMP_STRIDE)</div><div class='ctx'> 			*((u32 *) (tx_ring-&gt;buf + j)) = 0xffffffff;</div><div class='hunk'>@@ -797,12 +826,15 @@ static void mlx4_en_restart(struct work_struct *work)</div><div class='ctx'> 						 watchdog_task);</div><div class='ctx'> 	struct mlx4_en_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	struct net_device *dev = priv-&gt;dev;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv-&gt;port);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mdev-&gt;state_lock);</div><div class='ctx'> 	if (priv-&gt;port_up) {</div><div class='ctx'> 		mlx4_en_stop_port(dev);</div><div class='add'>+		for (i = 0; i &lt; priv-&gt;tx_ring_num; i++)</div><div class='add'>+			netdev_tx_reset_queue(priv-&gt;tx_ring[i].tx_queue);</div><div class='ctx'> 		if (mlx4_en_start_port(dev))</div><div class='ctx'> 			en_err(priv, "Failed restarting port %d\n", priv-&gt;port);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -966,6 +998,10 @@ void mlx4_en_destroy_netdev(struct net_device *dev)</div><div class='ctx'> 	mutex_unlock(&amp;mdev-&gt;state_lock);</div><div class='ctx'> </div><div class='ctx'> 	mlx4_en_free_resources(priv);</div><div class='add'>+</div><div class='add'>+	kfree(priv-&gt;tx_ring);</div><div class='add'>+	kfree(priv-&gt;tx_cq);</div><div class='add'>+</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1036,6 +1072,7 @@ static const struct net_device_ops mlx4_netdev_ops = {</div><div class='ctx'> 	.ndo_poll_controller	= mlx4_en_netpoll,</div><div class='ctx'> #endif</div><div class='ctx'> 	.ndo_set_features	= mlx4_en_set_features,</div><div class='add'>+	.ndo_setup_tc		= mlx4_en_setup_tc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,</div><div class='hunk'>@@ -1070,6 +1107,18 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,</div><div class='ctx'> 	priv-&gt;ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |</div><div class='ctx'> 			MLX4_WQE_CTRL_SOLICITED);</div><div class='ctx'> 	priv-&gt;tx_ring_num = prof-&gt;tx_ring_num;</div><div class='add'>+	priv-&gt;tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) *</div><div class='add'>+			priv-&gt;tx_ring_num, GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;tx_ring) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * priv-&gt;tx_ring_num,</div><div class='add'>+			GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;tx_cq) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> 	priv-&gt;rx_ring_num = prof-&gt;rx_ring_num;</div><div class='ctx'> 	priv-&gt;mac_index = -1;</div><div class='ctx'> 	priv-&gt;msg_enable = MLX4_EN_MSG_LEVEL;</div><div class='hunk'>@@ -1079,6 +1128,10 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,</div><div class='ctx'> 	INIT_WORK(&amp;priv-&gt;watchdog_task, mlx4_en_restart);</div><div class='ctx'> 	INIT_WORK(&amp;priv-&gt;linkstate_task, mlx4_en_linkstate);</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;priv-&gt;stats_task, mlx4_en_do_get_stats);</div><div class='add'>+#ifdef CONFIG_MLX4_EN_DCB</div><div class='add'>+	if (!mlx4_is_slave(priv-&gt;mdev-&gt;dev))</div><div class='add'>+		dev-&gt;dcbnl_ops = &amp;mlx4_en_dcbnl_ops;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/* Query for default mac and max mtu */</div><div class='ctx'> 	priv-&gt;max_mtu = mdev-&gt;dev-&gt;caps.eth_mtu_cap[priv-&gt;port];</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_port.h b/drivers/net/ethernet/mellanox/mlx4/en_port.h<br/>index 6934fd7e66ed..745090b49d9e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_port.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/en_port.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_port.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_port.h</a></div><div class='hunk'>@@ -39,6 +39,8 @@</div><div class='ctx'> #define SET_PORT_PROMISC_SHIFT	31</div><div class='ctx'> #define SET_PORT_MC_PROMISC_SHIFT	30</div><div class='ctx'> </div><div class='add'>+#define MLX4_EN_NUM_TC		8</div><div class='add'>+</div><div class='ctx'> #define VLAN_FLTR_SIZE	128</div><div class='ctx'> struct mlx4_set_vlan_fltr_mbox {</div><div class='ctx'> 	__be32 entry[VLAN_FLTR_SIZE];</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_resources.c b/drivers/net/ethernet/mellanox/mlx4/en_resources.c<br/>index bcbc54c16947..10c24c784b70 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_resources.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/en_resources.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_resources.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_resources.c</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> </div><div class='ctx'> void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,</div><div class='ctx'> 			     int is_tx, int rss, int qpn, int cqn,</div><div class='del'>-			     struct mlx4_qp_context *context)</div><div class='add'>+			     int user_prio, struct mlx4_qp_context *context)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_en_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> </div><div class='hunk'>@@ -57,6 +57,10 @@ void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,</div><div class='ctx'> 	context-&gt;local_qpn = cpu_to_be32(qpn);</div><div class='ctx'> 	context-&gt;pri_path.ackto = 1 &amp; 0x07;</div><div class='ctx'> 	context-&gt;pri_path.sched_queue = 0x83 | (priv-&gt;port - 1) &lt;&lt; 6;</div><div class='add'>+	if (user_prio &gt;= 0) {</div><div class='add'>+		context-&gt;pri_path.sched_queue |= user_prio &lt;&lt; 3;</div><div class='add'>+		context-&gt;pri_path.feup = 1 &lt;&lt; 6;</div><div class='add'>+	}</div><div class='ctx'> 	context-&gt;pri_path.counter_index = 0xff;</div><div class='ctx'> 	context-&gt;cqn_send = cpu_to_be32(cqn);</div><div class='ctx'> 	context-&gt;cqn_recv = cpu_to_be32(cqn);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_rx.c b/drivers/net/ethernet/mellanox/mlx4/en_rx.c<br/>index 9adbd53da525..d49a7ac3187d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_rx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/en_rx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_rx.c</a></div><div class='hunk'>@@ -823,7 +823,7 @@ static int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv, int qpn,</div><div class='ctx'> </div><div class='ctx'> 	memset(context, 0, sizeof *context);</div><div class='ctx'> 	mlx4_en_fill_qp_context(priv, ring-&gt;actual_size, ring-&gt;stride, 0, 0,</div><div class='del'>-				qpn, ring-&gt;cqn, context);</div><div class='add'>+				qpn, ring-&gt;cqn, -1, context);</div><div class='ctx'> 	context-&gt;db_rec_addr = cpu_to_be64(ring-&gt;wqres.db.dma);</div><div class='ctx'> </div><div class='ctx'> 	/* Cancel FCS removal if FW allows */</div><div class='hunk'>@@ -890,7 +890,7 @@ int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> 	rss_map-&gt;indir_qp.event = mlx4_en_sqp_event;</div><div class='ctx'> 	mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, priv-&gt;base_qpn,</div><div class='del'>-				priv-&gt;rx_ring[0].cqn, &amp;context);</div><div class='add'>+				priv-&gt;rx_ring[0].cqn, -1, &amp;context);</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;prof-&gt;rss_rings || priv-&gt;prof-&gt;rss_rings &gt; priv-&gt;rx_ring_num)</div><div class='ctx'> 		rss_rings = priv-&gt;rx_ring_num;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_tx.c b/drivers/net/ethernet/mellanox/mlx4/en_tx.c<br/>index 17968244c399..019d856b1334 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_tx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/en_tx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/en_tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/en_tx.c</a></div><div class='hunk'>@@ -67,8 +67,6 @@ int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	inline_thold = min(inline_thold, MAX_INLINE);</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;ring-&gt;comp_lock);</div><div class='del'>-</div><div class='ctx'> 	tmp = size * sizeof(struct mlx4_en_tx_info);</div><div class='ctx'> 	ring-&gt;tx_info = vmalloc(tmp);</div><div class='ctx'> 	if (!ring-&gt;tx_info)</div><div class='hunk'>@@ -156,7 +154,7 @@ void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> </div><div class='ctx'> int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> 			     struct mlx4_en_tx_ring *ring,</div><div class='del'>-			     int cq)</div><div class='add'>+			     int cq, int user_prio)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_en_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -174,7 +172,7 @@ int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> 	ring-&gt;doorbell_qpn = ring-&gt;qp.qpn &lt;&lt; 8;</div><div class='ctx'> </div><div class='ctx'> 	mlx4_en_fill_qp_context(priv, ring-&gt;size, ring-&gt;stride, 1, 0, ring-&gt;qpn,</div><div class='del'>-				ring-&gt;cqn, &amp;ring-&gt;context);</div><div class='add'>+				ring-&gt;cqn, user_prio, &amp;ring-&gt;context);</div><div class='ctx'> 	if (ring-&gt;bf_enabled)</div><div class='ctx'> 		ring-&gt;context.usr_page = cpu_to_be32(ring-&gt;bf.uar-&gt;index);</div><div class='ctx'> </div><div class='hunk'>@@ -317,6 +315,8 @@ static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq)</div><div class='ctx'> 	int size = cq-&gt;size;</div><div class='ctx'> 	u32 size_mask = ring-&gt;size_mask;</div><div class='ctx'> 	struct mlx4_cqe *buf = cq-&gt;buf;</div><div class='add'>+	u32 packets = 0;</div><div class='add'>+	u32 bytes = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;port_up)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -345,6 +345,8 @@ static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq)</div><div class='ctx'> 					priv, ring, ring_index,</div><div class='ctx'> 					!!((ring-&gt;cons + txbbs_skipped) &amp;</div><div class='ctx'> 							ring-&gt;size));</div><div class='add'>+			packets++;</div><div class='add'>+			bytes += ring-&gt;tx_info[ring_index].nr_bytes;</div><div class='ctx'> 		} while (ring_index != new_index);</div><div class='ctx'> </div><div class='ctx'> 		++cons_index;</div><div class='hunk'>@@ -361,13 +363,14 @@ static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq)</div><div class='ctx'> 	mlx4_cq_set_ci(mcq);</div><div class='ctx'> 	wmb();</div><div class='ctx'> 	ring-&gt;cons += txbbs_skipped;</div><div class='add'>+	netdev_tx_completed_queue(ring-&gt;tx_queue, packets, bytes);</div><div class='ctx'> </div><div class='ctx'> 	/* Wakeup Tx queue if this ring stopped it */</div><div class='ctx'> 	if (unlikely(ring-&gt;blocked)) {</div><div class='ctx'> 		if ((u32) (ring-&gt;prod - ring-&gt;cons) &lt;=</div><div class='ctx'> 		     ring-&gt;size - HEADROOM - MAX_DESC_TXBBS) {</div><div class='ctx'> 			ring-&gt;blocked = 0;</div><div class='del'>-			netif_tx_wake_queue(netdev_get_tx_queue(dev, cq-&gt;ring));</div><div class='add'>+			netif_tx_wake_queue(ring-&gt;tx_queue);</div><div class='ctx'> 			priv-&gt;port_stats.wake_queue++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -377,41 +380,12 @@ void mlx4_en_tx_irq(struct mlx4_cq *mcq)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);</div><div class='ctx'> 	struct mlx4_en_priv *priv = netdev_priv(cq-&gt;dev);</div><div class='del'>-	struct mlx4_en_tx_ring *ring = &amp;priv-&gt;tx_ring[cq-&gt;ring];</div><div class='ctx'> </div><div class='del'>-	if (!spin_trylock(&amp;ring-&gt;comp_lock))</div><div class='del'>-		return;</div><div class='ctx'> 	mlx4_en_process_tx_cq(cq-&gt;dev, cq);</div><div class='del'>-	mod_timer(&amp;cq-&gt;timer, jiffies + 1);</div><div class='del'>-	spin_unlock(&amp;ring-&gt;comp_lock);</div><div class='add'>+	mlx4_en_arm_cq(priv, cq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-void mlx4_en_poll_tx_cq(unsigned long data)</div><div class='del'>-{</div><div class='del'>-	struct mlx4_en_cq *cq = (struct mlx4_en_cq *) data;</div><div class='del'>-	struct mlx4_en_priv *priv = netdev_priv(cq-&gt;dev);</div><div class='del'>-	struct mlx4_en_tx_ring *ring = &amp;priv-&gt;tx_ring[cq-&gt;ring];</div><div class='del'>-	u32 inflight;</div><div class='del'>-</div><div class='del'>-	INC_PERF_COUNTER(priv-&gt;pstats.tx_poll);</div><div class='del'>-</div><div class='del'>-	if (!spin_trylock_irq(&amp;ring-&gt;comp_lock)) {</div><div class='del'>-		mod_timer(&amp;cq-&gt;timer, jiffies + MLX4_EN_TX_POLL_TIMEOUT);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	mlx4_en_process_tx_cq(cq-&gt;dev, cq);</div><div class='del'>-	inflight = (u32) (ring-&gt;prod - ring-&gt;cons - ring-&gt;last_nr_txbb);</div><div class='del'>-</div><div class='del'>-	/* If there are still packets in flight and the timer has not already</div><div class='del'>-	 * been scheduled by the Tx routine then schedule it here to guarantee</div><div class='del'>-	 * completion processing of these packets */</div><div class='del'>-	if (inflight &amp;&amp; priv-&gt;port_up)</div><div class='del'>-		mod_timer(&amp;cq-&gt;timer, jiffies + MLX4_EN_TX_POLL_TIMEOUT);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irq(&amp;ring-&gt;comp_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct mlx4_en_tx_desc *mlx4_en_bounce_to_desc(struct mlx4_en_priv *priv,</div><div class='ctx'> 						      struct mlx4_en_tx_ring *ring,</div><div class='ctx'> 						      u32 index,</div><div class='hunk'>@@ -440,25 +414,6 @@ static struct mlx4_en_tx_desc *mlx4_en_bounce_to_desc(struct mlx4_en_priv *priv,</div><div class='ctx'> 	return ring-&gt;buf + index * TXBB_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void mlx4_en_xmit_poll(struct mlx4_en_priv *priv, int tx_ind)</div><div class='del'>-{</div><div class='del'>-	struct mlx4_en_cq *cq = &amp;priv-&gt;tx_cq[tx_ind];</div><div class='del'>-	struct mlx4_en_tx_ring *ring = &amp;priv-&gt;tx_ring[tx_ind];</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/* If we don't have a pending timer, set one up to catch our recent</div><div class='del'>-	   post in case the interface becomes idle */</div><div class='del'>-	if (!timer_pending(&amp;cq-&gt;timer))</div><div class='del'>-		mod_timer(&amp;cq-&gt;timer, jiffies + MLX4_EN_TX_POLL_TIMEOUT);</div><div class='del'>-</div><div class='del'>-	/* Poll the CQ every mlx4_en_TX_MODER_POLL packets */</div><div class='del'>-	if ((++ring-&gt;poll_cnt &amp; (MLX4_EN_TX_POLL_MODER - 1)) == 0)</div><div class='del'>-		if (spin_trylock_irqsave(&amp;ring-&gt;comp_lock, flags)) {</div><div class='del'>-			mlx4_en_process_tx_cq(priv-&gt;dev, cq);</div><div class='del'>-			spin_unlock_irqrestore(&amp;ring-&gt;comp_lock, flags);</div><div class='del'>-		}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int is_inline(struct sk_buff *skb, void **pfrag)</div><div class='ctx'> {</div><div class='ctx'> 	void *ptr;</div><div class='hunk'>@@ -571,17 +526,16 @@ static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc, struct sk_buff *sk</div><div class='ctx'> u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='del'>-	u16 vlan_tag = 0;</div><div class='add'>+	u16 rings_p_up = priv-&gt;mdev-&gt;profile.num_tx_rings_p_up;</div><div class='add'>+	u8 up = 0;</div><div class='ctx'> </div><div class='del'>-	/* If we support per priority flow control and the packet contains</div><div class='del'>-	 * a vlan tag, send the packet to the TX ring assigned to that priority</div><div class='del'>-	 */</div><div class='del'>-	if (priv-&gt;prof-&gt;rx_ppp &amp;&amp; vlan_tx_tag_present(skb)) {</div><div class='del'>-		vlan_tag = vlan_tx_tag_get(skb);</div><div class='del'>-		return MLX4_EN_NUM_TX_RINGS + (vlan_tag &gt;&gt; 13);</div><div class='del'>-	}</div><div class='add'>+	if (dev-&gt;num_tc)</div><div class='add'>+		return skb_tx_hash(dev, skb);</div><div class='ctx'> </div><div class='del'>-	return skb_tx_hash(dev, skb);</div><div class='add'>+	if (vlan_tx_tag_present(skb))</div><div class='add'>+		up = vlan_tx_tag_get(skb) &gt;&gt; VLAN_PRIO_SHIFT;</div><div class='add'>+</div><div class='add'>+	return __skb_tx_hash(dev, skb, rings_p_up) + up * rings_p_up;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx4_bf_copy(void __iomem *dst, unsigned long *src, unsigned bytecnt)</div><div class='hunk'>@@ -594,7 +548,6 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct mlx4_en_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	struct mlx4_en_tx_ring *ring;</div><div class='del'>-	struct mlx4_en_cq *cq;</div><div class='ctx'> 	struct mlx4_en_tx_desc *tx_desc;</div><div class='ctx'> 	struct mlx4_wqe_data_seg *data;</div><div class='ctx'> 	struct skb_frag_struct *frag;</div><div class='hunk'>@@ -638,13 +591,10 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	if (unlikely(((int)(ring-&gt;prod - ring-&gt;cons)) &gt;</div><div class='ctx'> 		     ring-&gt;size - HEADROOM - MAX_DESC_TXBBS)) {</div><div class='ctx'> 		/* every full Tx ring stops queue */</div><div class='del'>-		netif_tx_stop_queue(netdev_get_tx_queue(dev, tx_ind));</div><div class='add'>+		netif_tx_stop_queue(ring-&gt;tx_queue);</div><div class='ctx'> 		ring-&gt;blocked = 1;</div><div class='ctx'> 		priv-&gt;port_stats.queue_stopped++;</div><div class='ctx'> </div><div class='del'>-		/* Use interrupts to find out when queue opened */</div><div class='del'>-		cq = &amp;priv-&gt;tx_cq[tx_ind];</div><div class='del'>-		mlx4_en_arm_cq(priv, cq);</div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -707,7 +657,7 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		priv-&gt;port_stats.tso_packets++;</div><div class='ctx'> 		i = ((skb-&gt;len - lso_header_size) / skb_shinfo(skb)-&gt;gso_size) +</div><div class='ctx'> 			!!((skb-&gt;len - lso_header_size) % skb_shinfo(skb)-&gt;gso_size);</div><div class='del'>-		ring-&gt;bytes += skb-&gt;len + (i - 1) * lso_header_size;</div><div class='add'>+		tx_info-&gt;nr_bytes = skb-&gt;len + (i - 1) * lso_header_size;</div><div class='ctx'> 		ring-&gt;packets += i;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Normal (Non LSO) packet */</div><div class='hunk'>@@ -715,10 +665,12 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 			((ring-&gt;prod &amp; ring-&gt;size) ?</div><div class='ctx'> 			 cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0);</div><div class='ctx'> 		data = &amp;tx_desc-&gt;data;</div><div class='del'>-		ring-&gt;bytes += max(skb-&gt;len, (unsigned int) ETH_ZLEN);</div><div class='add'>+		tx_info-&gt;nr_bytes = max_t(unsigned int, skb-&gt;len, ETH_ZLEN);</div><div class='ctx'> 		ring-&gt;packets++;</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='add'>+	ring-&gt;bytes += tx_info-&gt;nr_bytes;</div><div class='add'>+	netdev_tx_sent_queue(ring-&gt;tx_queue, tx_info-&gt;nr_bytes);</div><div class='ctx'> 	AVG_PERF_COUNTER(priv-&gt;pstats.tx_pktsz_avg, skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -792,9 +744,6 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		iowrite32be(ring-&gt;doorbell_qpn, ring-&gt;bf.uar-&gt;map + MLX4_SEND_DOORBELL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Poll CQ here */</div><div class='del'>-	mlx4_en_xmit_poll(priv, tx_ind);</div><div class='del'>-</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> tx_drop:</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/eq.c b/drivers/net/ethernet/mellanox/mlx4/eq.c<br/>index 3b6f8efbf141..bce98d9c0039 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/eq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/eq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/eq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/eq.c</a></div><div class='hunk'>@@ -426,7 +426,7 @@ static int mlx4_eq_int(struct mlx4_dev *dev, struct mlx4_eq *eq)</div><div class='ctx'> </div><div class='ctx'> 			mlx4_dbg(dev, "FLR event for slave: %d\n", flr_slave);</div><div class='ctx'> </div><div class='del'>-			if (flr_slave &gt; dev-&gt;num_slaves) {</div><div class='add'>+			if (flr_slave &gt;= dev-&gt;num_slaves) {</div><div class='ctx'> 				mlx4_warn(dev,</div><div class='ctx'> 					  "Got FLR for unknown function: %d\n",</div><div class='ctx'> 					  flr_slave);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.c b/drivers/net/ethernet/mellanox/mlx4/fw.c<br/>index 2a02ba522e60..9c83bb8151ea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/fw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/fw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/fw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/fw.c</a></div><div class='hunk'>@@ -118,6 +118,20 @@ static void dump_dev_cap_flags(struct mlx4_dev *dev, u64 flags)</div><div class='ctx'> 			mlx4_dbg(dev, "    %s\n", fname[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void dump_dev_cap_flags2(struct mlx4_dev *dev, u64 flags)</div><div class='add'>+{</div><div class='add'>+	static const char * const fname[] = {</div><div class='add'>+		[0] = "RSS support",</div><div class='add'>+		[1] = "RSS Toeplitz Hash Function support",</div><div class='add'>+		[2] = "RSS XOR Hash Function support"</div><div class='add'>+	};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(fname); ++i)</div><div class='add'>+		if (fname[i] &amp;&amp; (flags &amp; (1LL &lt;&lt; i)))</div><div class='add'>+			mlx4_dbg(dev, "    %s\n", fname[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx4_MOD_STAT_CFG(struct mlx4_dev *dev, struct mlx4_mod_stat_cfg *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_cmd_mailbox *mailbox;</div><div class='hunk'>@@ -346,6 +360,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)</div><div class='ctx'> #define QUERY_DEV_CAP_MAX_REQ_QP_OFFSET		0x29</div><div class='ctx'> #define QUERY_DEV_CAP_MAX_RES_QP_OFFSET		0x2b</div><div class='ctx'> #define QUERY_DEV_CAP_MAX_GSO_OFFSET		0x2d</div><div class='add'>+#define QUERY_DEV_CAP_RSS_OFFSET		0x2e</div><div class='ctx'> #define QUERY_DEV_CAP_MAX_RDMA_OFFSET		0x2f</div><div class='ctx'> #define QUERY_DEV_CAP_RSZ_SRQ_OFFSET		0x33</div><div class='ctx'> #define QUERY_DEV_CAP_ACK_DELAY_OFFSET		0x35</div><div class='hunk'>@@ -390,13 +405,14 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)</div><div class='ctx'> #define QUERY_DEV_CAP_RSVD_LKEY_OFFSET		0x98</div><div class='ctx'> #define QUERY_DEV_CAP_MAX_ICM_SZ_OFFSET		0xa0</div><div class='ctx'> </div><div class='add'>+	dev_cap-&gt;flags2 = 0;</div><div class='ctx'> 	mailbox = mlx4_alloc_cmd_mailbox(dev);</div><div class='ctx'> 	if (IS_ERR(mailbox))</div><div class='ctx'> 		return PTR_ERR(mailbox);</div><div class='ctx'> 	outbox = mailbox-&gt;buf;</div><div class='ctx'> </div><div class='ctx'> 	err = mlx4_cmd_box(dev, 0, mailbox-&gt;dma, 0, 0, MLX4_CMD_QUERY_DEV_CAP,</div><div class='del'>-			   MLX4_CMD_TIME_CLASS_A, !mlx4_is_slave(dev));</div><div class='add'>+			   MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -439,6 +455,17 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)</div><div class='ctx'> 	else</div><div class='ctx'> 		dev_cap-&gt;max_gso_sz = 1 &lt;&lt; field;</div><div class='ctx'> </div><div class='add'>+	MLX4_GET(field, outbox, QUERY_DEV_CAP_RSS_OFFSET);</div><div class='add'>+	if (field &amp; 0x20)</div><div class='add'>+		dev_cap-&gt;flags2 |= MLX4_DEV_CAP_FLAG2_RSS_XOR;</div><div class='add'>+	if (field &amp; 0x10)</div><div class='add'>+		dev_cap-&gt;flags2 |= MLX4_DEV_CAP_FLAG2_RSS_TOP;</div><div class='add'>+	field &amp;= 0xf;</div><div class='add'>+	if (field) {</div><div class='add'>+		dev_cap-&gt;flags2 |= MLX4_DEV_CAP_FLAG2_RSS;</div><div class='add'>+		dev_cap-&gt;max_rss_tbl_sz = 1 &lt;&lt; field;</div><div class='add'>+	} else</div><div class='add'>+		dev_cap-&gt;max_rss_tbl_sz = 0;</div><div class='ctx'> 	MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_RDMA_OFFSET);</div><div class='ctx'> 	dev_cap-&gt;max_rdma_global = 1 &lt;&lt; (field &amp; 0x3f);</div><div class='ctx'> 	MLX4_GET(field, outbox, QUERY_DEV_CAP_ACK_DELAY_OFFSET);</div><div class='hunk'>@@ -563,8 +590,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)</div><div class='ctx'> </div><div class='ctx'> 		for (i = 1; i &lt;= dev_cap-&gt;num_ports; ++i) {</div><div class='ctx'> 			err = mlx4_cmd_box(dev, 0, mailbox-&gt;dma, i, 0, MLX4_CMD_QUERY_PORT,</div><div class='del'>-					   MLX4_CMD_TIME_CLASS_B,</div><div class='del'>-					   !mlx4_is_slave(dev));</div><div class='add'>+					   MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -632,14 +658,38 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)</div><div class='ctx'> 		 dev_cap-&gt;max_rq_desc_sz, dev_cap-&gt;max_rq_sg);</div><div class='ctx'> 	mlx4_dbg(dev, "Max GSO size: %d\n", dev_cap-&gt;max_gso_sz);</div><div class='ctx'> 	mlx4_dbg(dev, "Max counters: %d\n", dev_cap-&gt;max_counters);</div><div class='add'>+	mlx4_dbg(dev, "Max RSS Table size: %d\n", dev_cap-&gt;max_rss_tbl_sz);</div><div class='ctx'> </div><div class='ctx'> 	dump_dev_cap_flags(dev, dev_cap-&gt;flags);</div><div class='add'>+	dump_dev_cap_flags2(dev, dev_cap-&gt;flags2);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	mlx4_free_cmd_mailbox(dev, mailbox);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mlx4_QUERY_DEV_CAP_wrapper(struct mlx4_dev *dev, int slave,</div><div class='add'>+			       struct mlx4_vhcr *vhcr,</div><div class='add'>+			       struct mlx4_cmd_mailbox *inbox,</div><div class='add'>+			       struct mlx4_cmd_mailbox *outbox,</div><div class='add'>+			       struct mlx4_cmd_info *cmd)</div><div class='add'>+{</div><div class='add'>+	int	err = 0;</div><div class='add'>+	u8	field;</div><div class='add'>+</div><div class='add'>+	err = mlx4_cmd_box(dev, 0, outbox-&gt;dma, 0, 0, MLX4_CMD_QUERY_DEV_CAP,</div><div class='add'>+			   MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* For guests, report Blueflame disabled */</div><div class='add'>+	MLX4_GET(field, outbox-&gt;buf, QUERY_DEV_CAP_BF_OFFSET);</div><div class='add'>+	field &amp;= 0x7f;</div><div class='add'>+	MLX4_PUT(outbox-&gt;buf, field, QUERY_DEV_CAP_BF_OFFSET);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave,</div><div class='ctx'> 			    struct mlx4_vhcr *vhcr,</div><div class='ctx'> 			    struct mlx4_cmd_mailbox *inbox,</div><div class='hunk'>@@ -831,6 +881,9 @@ int mlx4_QUERY_FW(struct mlx4_dev *dev)</div><div class='ctx'> 		((fw_ver &amp; 0xffff0000ull) &gt;&gt; 16) |</div><div class='ctx'> 		((fw_ver &amp; 0x0000ffffull) &lt;&lt; 16);</div><div class='ctx'> </div><div class='add'>+	if (mlx4_is_slave(dev))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	MLX4_GET(lg, outbox, QUERY_FW_PPF_ID);</div><div class='ctx'> 	dev-&gt;caps.function = lg;</div><div class='ctx'> </div><div class='hunk'>@@ -898,6 +951,27 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mlx4_QUERY_FW_wrapper(struct mlx4_dev *dev, int slave,</div><div class='add'>+			  struct mlx4_vhcr *vhcr,</div><div class='add'>+			  struct mlx4_cmd_mailbox *inbox,</div><div class='add'>+			  struct mlx4_cmd_mailbox *outbox,</div><div class='add'>+			  struct mlx4_cmd_info *cmd)</div><div class='add'>+{</div><div class='add'>+	u8 *outbuf;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	outbuf = outbox-&gt;buf;</div><div class='add'>+	err = mlx4_cmd_box(dev, 0, outbox-&gt;dma, 0, 0, MLX4_CMD_QUERY_FW,</div><div class='add'>+			    MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* for slaves, zero out everything except FW version */</div><div class='add'>+	outbuf[0] = outbuf[1] = 0;</div><div class='add'>+	memset(&amp;outbuf[8], 0, QUERY_FW_OUT_SIZE - 8);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void get_board_id(void *vsd, char *board_id)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1164,9 +1238,8 @@ int mlx4_INIT_PORT_wrapper(struct mlx4_dev *dev, int slave,</div><div class='ctx'> 			       MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='del'>-		priv-&gt;mfunc.master.slave_state[slave].init_port_mask |=</div><div class='del'>-			(1 &lt;&lt; port);</div><div class='ctx'> 	}</div><div class='add'>+	priv-&gt;mfunc.master.slave_state[slave].init_port_mask |= (1 &lt;&lt; port);</div><div class='ctx'> 	++priv-&gt;mfunc.master.init_port_ref[port];</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.h b/drivers/net/ethernet/mellanox/mlx4/fw.h<br/>index e1a5fa56bcbc..64c0399e4b78 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/fw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/fw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/fw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/fw.h</a></div><div class='hunk'>@@ -79,6 +79,7 @@ struct mlx4_dev_cap {</div><div class='ctx'> 	u64 trans_code[MLX4_MAX_PORTS + 1];</div><div class='ctx'> 	u16 stat_rate_support;</div><div class='ctx'> 	u64 flags;</div><div class='add'>+	u64 flags2;</div><div class='ctx'> 	int reserved_uars;</div><div class='ctx'> 	int uar_size;</div><div class='ctx'> 	int min_page_sz;</div><div class='hunk'>@@ -110,6 +111,7 @@ struct mlx4_dev_cap {</div><div class='ctx'> 	u32 reserved_lkey;</div><div class='ctx'> 	u64 max_icm_sz;</div><div class='ctx'> 	int max_gso_sz;</div><div class='add'>+	int max_rss_tbl_sz;</div><div class='ctx'> 	u8  supported_port_types[MLX4_MAX_PORTS + 1];</div><div class='ctx'> 	u8  suggested_type[MLX4_MAX_PORTS + 1];</div><div class='ctx'> 	u8  default_sense[MLX4_MAX_PORTS + 1];</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c<br/>index 8bb05b46db86..ee6f4fe00837 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/main.c</a></div><div class='hunk'>@@ -142,12 +142,6 @@ struct mlx4_port_config {</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline int mlx4_master_get_num_eqs(struct mlx4_dev *dev)</div><div class='del'>-{</div><div class='del'>-	return dev-&gt;caps.reserved_eqs +</div><div class='del'>-		MLX4_MFUNC_EQ_NUM * (dev-&gt;num_slaves + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int mlx4_check_port_params(struct mlx4_dev *dev,</div><div class='ctx'> 			   enum mlx4_port_type *port_type)</div><div class='ctx'> {</div><div class='hunk'>@@ -217,6 +211,7 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;caps.num_ports	     = dev_cap-&gt;num_ports;</div><div class='add'>+	dev-&gt;phys_caps.num_phys_eqs  = MLX4_MAX_EQ_NUM;</div><div class='ctx'> 	for (i = 1; i &lt;= dev-&gt;caps.num_ports; ++i) {</div><div class='ctx'> 		dev-&gt;caps.vl_cap[i]	    = dev_cap-&gt;max_vl[i];</div><div class='ctx'> 		dev-&gt;caps.ib_mtu_cap[i]	    = dev_cap-&gt;ib_mtu[i];</div><div class='hunk'>@@ -272,10 +267,12 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)</div><div class='ctx'> 	dev-&gt;caps.max_msg_sz         = dev_cap-&gt;max_msg_sz;</div><div class='ctx'> 	dev-&gt;caps.page_size_cap	     = ~(u32) (dev_cap-&gt;min_page_sz - 1);</div><div class='ctx'> 	dev-&gt;caps.flags		     = dev_cap-&gt;flags;</div><div class='add'>+	dev-&gt;caps.flags2	     = dev_cap-&gt;flags2;</div><div class='ctx'> 	dev-&gt;caps.bmme_flags	     = dev_cap-&gt;bmme_flags;</div><div class='ctx'> 	dev-&gt;caps.reserved_lkey	     = dev_cap-&gt;reserved_lkey;</div><div class='ctx'> 	dev-&gt;caps.stat_rate_support  = dev_cap-&gt;stat_rate_support;</div><div class='ctx'> 	dev-&gt;caps.max_gso_sz	     = dev_cap-&gt;max_gso_sz;</div><div class='add'>+	dev-&gt;caps.max_rss_tbl_sz     = dev_cap-&gt;max_rss_tbl_sz;</div><div class='ctx'> </div><div class='ctx'> 	/* Sense port always allowed on supported devices for ConnectX1 and 2 */</div><div class='ctx'> 	if (dev-&gt;pdev-&gt;device != 0x1003)</div><div class='hunk'>@@ -433,12 +430,17 @@ static int mlx4_slave_cap(struct mlx4_dev *dev)</div><div class='ctx'> 	mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;dev_cap, 0, sizeof(dev_cap));</div><div class='add'>+	dev-&gt;caps.max_qp_dest_rdma = 1 &lt;&lt; hca_param.log_rd_per_qp;</div><div class='ctx'> 	err = mlx4_dev_cap(dev, &amp;dev_cap);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = mlx4_QUERY_FW(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		mlx4_err(dev, "QUERY_FW command failed: could not get FW version.\n");</div><div class='add'>+</div><div class='ctx'> 	page_size = ~dev-&gt;caps.page_size_cap + 1;</div><div class='ctx'> 	mlx4_warn(dev, "HCA minimum page size:%d\n", page_size);</div><div class='ctx'> 	if (page_size &gt; PAGE_SIZE) {</div><div class='hunk'>@@ -483,15 +485,15 @@ static int mlx4_slave_cap(struct mlx4_dev *dev)</div><div class='ctx'> 	dev-&gt;caps.num_mgms              = 0;</div><div class='ctx'> 	dev-&gt;caps.num_amgms             = 0;</div><div class='ctx'> </div><div class='del'>-	for (i = 1; i &lt;= dev-&gt;caps.num_ports; ++i)</div><div class='del'>-		dev-&gt;caps.port_mask[i] = dev-&gt;caps.port_type[i];</div><div class='del'>-</div><div class='ctx'> 	if (dev-&gt;caps.num_ports &gt; MLX4_MAX_PORTS) {</div><div class='ctx'> 		mlx4_err(dev, "HCA has %d ports, but we only support %d, "</div><div class='ctx'> 			 "aborting.\n", dev-&gt;caps.num_ports, MLX4_MAX_PORTS);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	for (i = 1; i &lt;= dev-&gt;caps.num_ports; ++i)</div><div class='add'>+		dev-&gt;caps.port_mask[i] = dev-&gt;caps.port_type[i];</div><div class='add'>+</div><div class='ctx'> 	if (dev-&gt;caps.uar_page_size * (dev-&gt;caps.num_uars -</div><div class='ctx'> 				       dev-&gt;caps.reserved_uars) &gt;</div><div class='ctx'> 				       pci_resource_len(dev-&gt;pdev, 2)) {</div><div class='hunk'>@@ -502,18 +504,6 @@ static int mlx4_slave_cap(struct mlx4_dev *dev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#if 0</div><div class='del'>-	mlx4_warn(dev, "sqp_demux:%d\n", dev-&gt;caps.sqp_demux);</div><div class='del'>-	mlx4_warn(dev, "num_uars:%d reserved_uars:%d uar region:0x%x bar2:0x%llx\n",</div><div class='del'>-		  dev-&gt;caps.num_uars, dev-&gt;caps.reserved_uars,</div><div class='del'>-		  dev-&gt;caps.uar_page_size * dev-&gt;caps.num_uars,</div><div class='del'>-		  pci_resource_len(dev-&gt;pdev, 2));</div><div class='del'>-	mlx4_warn(dev, "num_eqs:%d reserved_eqs:%d\n", dev-&gt;caps.num_eqs,</div><div class='del'>-		  dev-&gt;caps.reserved_eqs);</div><div class='del'>-	mlx4_warn(dev, "num_pds:%d reserved_pds:%d slave_pd_shift:%d pd_base:%d\n",</div><div class='del'>-		  dev-&gt;caps.num_pds, dev-&gt;caps.reserved_pds,</div><div class='del'>-		  dev-&gt;caps.slave_pd_shift, dev-&gt;caps.pd_base);</div><div class='del'>-#endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -808,9 +798,8 @@ static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_srq;</div><div class='ctx'> </div><div class='del'>-	num_eqs = (mlx4_is_master(dev)) ?</div><div class='del'>-		roundup_pow_of_two(mlx4_master_get_num_eqs(dev)) :</div><div class='del'>-		dev-&gt;caps.num_eqs;</div><div class='add'>+	num_eqs = (mlx4_is_master(dev)) ? dev-&gt;phys_caps.num_phys_eqs :</div><div class='add'>+		  dev-&gt;caps.num_eqs;</div><div class='ctx'> 	err = mlx4_init_icm_table(dev, &amp;priv-&gt;eq_table.cmpt_table,</div><div class='ctx'> 				  cmpt_base +</div><div class='ctx'> 				  ((u64) (MLX4_CMPT_TYPE_EQ *</div><div class='hunk'>@@ -872,9 +861,8 @@ static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	num_eqs = (mlx4_is_master(dev)) ?</div><div class='del'>-		roundup_pow_of_two(mlx4_master_get_num_eqs(dev)) :</div><div class='del'>-		dev-&gt;caps.num_eqs;</div><div class='add'>+	num_eqs = (mlx4_is_master(dev)) ? dev-&gt;phys_caps.num_phys_eqs :</div><div class='add'>+		   dev-&gt;caps.num_eqs;</div><div class='ctx'> 	err = mlx4_init_icm_table(dev, &amp;priv-&gt;eq_table.table,</div><div class='ctx'> 				  init_hca-&gt;eqc_base, dev_cap-&gt;eqc_entry_sz,</div><div class='ctx'> 				  num_eqs, num_eqs, 0, 0);</div><div class='hunk'>@@ -1306,7 +1294,7 @@ static void mlx4_cleanup_counters_table(struct mlx4_dev *dev)</div><div class='ctx'> 	mlx4_bitmap_cleanup(&amp;mlx4_priv(dev)-&gt;counters_bitmap);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)</div><div class='add'>+int __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_priv *priv = mlx4_priv(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1319,13 +1307,44 @@ int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)</div><div class='add'>+{</div><div class='add'>+	u64 out_param;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (mlx4_is_mfunc(dev)) {</div><div class='add'>+		err = mlx4_cmd_imm(dev, 0, &amp;out_param, RES_COUNTER,</div><div class='add'>+				   RES_OP_RESERVE, MLX4_CMD_ALLOC_RES,</div><div class='add'>+				   MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);</div><div class='add'>+		if (!err)</div><div class='add'>+			*idx = get_param_l(&amp;out_param);</div><div class='add'>+</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	return __mlx4_counter_alloc(dev, idx);</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL_GPL(mlx4_counter_alloc);</div><div class='ctx'> </div><div class='del'>-void mlx4_counter_free(struct mlx4_dev *dev, u32 idx)</div><div class='add'>+void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx)</div><div class='ctx'> {</div><div class='ctx'> 	mlx4_bitmap_free(&amp;mlx4_priv(dev)-&gt;counters_bitmap, idx);</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void mlx4_counter_free(struct mlx4_dev *dev, u32 idx)</div><div class='add'>+{</div><div class='add'>+	u64 in_param;</div><div class='add'>+</div><div class='add'>+	if (mlx4_is_mfunc(dev)) {</div><div class='add'>+		set_param_l(&amp;in_param, idx);</div><div class='add'>+		mlx4_cmd(dev, in_param, RES_COUNTER, RES_OP_RESERVE,</div><div class='add'>+			 MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A,</div><div class='add'>+			 MLX4_CMD_WRAPPED);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	__mlx4_counter_free(dev, idx);</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL_GPL(mlx4_counter_free);</div><div class='ctx'> </div><div class='ctx'> static int mlx4_setup_hca(struct mlx4_dev *dev)</div><div class='hunk'>@@ -1865,7 +1884,6 @@ static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 				mlx4_err(dev, "Failed to enable sriov,"</div><div class='ctx'> 					 "continuing without sriov enabled"</div><div class='ctx'> 					 " (err = %d).\n", err);</div><div class='del'>-				num_vfs = 0;</div><div class='ctx'> 				err = 0;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				mlx4_warn(dev, "Running in master mode\n");</div><div class='hunk'>@@ -2022,7 +2040,7 @@ err_cmd:</div><div class='ctx'> 	mlx4_cmd_cleanup(dev);</div><div class='ctx'> </div><div class='ctx'> err_sriov:</div><div class='del'>-	if (num_vfs &amp;&amp; (dev-&gt;flags &amp; MLX4_FLAG_SRIOV))</div><div class='add'>+	if (dev-&gt;flags &amp; MLX4_FLAG_SRIOV)</div><div class='ctx'> 		pci_disable_sriov(pdev);</div><div class='ctx'> </div><div class='ctx'> err_rel_own:</div><div class='hunk'>@@ -2070,6 +2088,10 @@ static void mlx4_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 			mlx4_CLOSE_PORT(dev, p);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (mlx4_is_master(dev))</div><div class='add'>+			mlx4_free_resource_tracker(dev,</div><div class='add'>+						   RES_TR_FREE_SLAVES_ONLY);</div><div class='add'>+</div><div class='ctx'> 		mlx4_cleanup_counters_table(dev);</div><div class='ctx'> 		mlx4_cleanup_mcg_table(dev);</div><div class='ctx'> 		mlx4_cleanup_qp_table(dev);</div><div class='hunk'>@@ -2082,7 +2104,8 @@ static void mlx4_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 		mlx4_cleanup_pd_table(dev);</div><div class='ctx'> </div><div class='ctx'> 		if (mlx4_is_master(dev))</div><div class='del'>-			mlx4_free_resource_tracker(dev);</div><div class='add'>+			mlx4_free_resource_tracker(dev,</div><div class='add'>+						   RES_TR_FREE_STRUCTS_ONLY);</div><div class='ctx'> </div><div class='ctx'> 		iounmap(priv-&gt;kar);</div><div class='ctx'> 		mlx4_uar_free(dev, &amp;priv-&gt;driver_uar);</div><div class='hunk'>@@ -2099,7 +2122,7 @@ static void mlx4_remove_one(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 		if (dev-&gt;flags &amp; MLX4_FLAG_MSI_X)</div><div class='ctx'> 			pci_disable_msix(pdev);</div><div class='del'>-		if (num_vfs &amp;&amp; (dev-&gt;flags &amp; MLX4_FLAG_SRIOV)) {</div><div class='add'>+		if (dev-&gt;flags &amp; MLX4_FLAG_SRIOV) {</div><div class='ctx'> 			mlx4_warn(dev, "Disabling sriov\n");</div><div class='ctx'> 			pci_disable_sriov(pdev);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/mcg.c b/drivers/net/ethernet/mellanox/mlx4/mcg.c<br/>index 4799e824052f..f4a8f98e402a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/mcg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/mcg.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/mcg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/mcg.c</a></div><div class='hunk'>@@ -357,7 +357,6 @@ static int add_promisc_qp(struct mlx4_dev *dev, u8 port,</div><div class='ctx'> 	u32 prot;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	bool found;</div><div class='del'>-	int last_index;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct mlx4_priv *priv = mlx4_priv(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -419,7 +418,6 @@ static int add_promisc_qp(struct mlx4_dev *dev, u8 port,</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				goto out_mailbox;</div><div class='ctx'> 		}</div><div class='del'>-		last_index = entry-&gt;index;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* add the new qpn to list of promisc qps */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h<br/>index 2a0ff2cc7182..e5d20220762c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/mlx4.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/mlx4.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/mlx4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/mlx4.h</a></div><div class='hunk'>@@ -53,6 +53,26 @@</div><div class='ctx'> #define DRV_VERSION	"1.1"</div><div class='ctx'> #define DRV_RELDATE	"Dec, 2011"</div><div class='ctx'> </div><div class='add'>+#define MLX4_NUM_UP		8</div><div class='add'>+#define MLX4_NUM_TC		8</div><div class='add'>+#define MLX4_RATELIMIT_UNITS 3 /* 100 Mbps */</div><div class='add'>+#define MLX4_RATELIMIT_DEFAULT 0xffff</div><div class='add'>+</div><div class='add'>+struct mlx4_set_port_prio2tc_context {</div><div class='add'>+	u8 prio2tc[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx4_port_scheduler_tc_cfg_be {</div><div class='add'>+	__be16 pg;</div><div class='add'>+	__be16 bw_precentage;</div><div class='add'>+	__be16 max_bw_units; /* 3-100Mbps, 4-1Gbps, other values - reserved */</div><div class='add'>+	__be16 max_bw_value;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx4_set_port_scheduler_context {</div><div class='add'>+	struct mlx4_port_scheduler_tc_cfg_be tc[MLX4_NUM_TC];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> 	MLX4_HCR_BASE		= 0x80680,</div><div class='ctx'> 	MLX4_HCR_SIZE		= 0x0001c,</div><div class='hunk'>@@ -126,6 +146,11 @@ enum mlx4_alloc_mode {</div><div class='ctx'> 	RES_OP_MAP_ICM,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum mlx4_res_tracker_free_type {</div><div class='add'>+	RES_TR_FREE_ALL,</div><div class='add'>+	RES_TR_FREE_SLAVES_ONLY,</div><div class='add'>+	RES_TR_FREE_STRUCTS_ONLY,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  *Virtual HCR structures.</div><div class='hunk'>@@ -851,6 +876,10 @@ void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac);</div><div class='ctx'> int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac);</div><div class='ctx'> int __mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt,</div><div class='ctx'> 		     int start_index, int npages, u64 *page_list);</div><div class='add'>+int __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx);</div><div class='add'>+void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx);</div><div class='add'>+int __mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn);</div><div class='add'>+void __mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn);</div><div class='ctx'> </div><div class='ctx'> void mlx4_start_catas_poll(struct mlx4_dev *dev);</div><div class='ctx'> void mlx4_stop_catas_poll(struct mlx4_dev *dev);</div><div class='hunk'>@@ -1007,8 +1036,14 @@ int mlx4_get_slave_from_resource_id(struct mlx4_dev *dev,</div><div class='ctx'> void mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave_id);</div><div class='ctx'> int mlx4_init_resource_tracker(struct mlx4_dev *dev);</div><div class='ctx'> </div><div class='del'>-void mlx4_free_resource_tracker(struct mlx4_dev *dev);</div><div class='add'>+void mlx4_free_resource_tracker(struct mlx4_dev *dev,</div><div class='add'>+				enum mlx4_res_tracker_free_type type);</div><div class='ctx'> </div><div class='add'>+int mlx4_QUERY_FW_wrapper(struct mlx4_dev *dev, int slave,</div><div class='add'>+			  struct mlx4_vhcr *vhcr,</div><div class='add'>+			  struct mlx4_cmd_mailbox *inbox,</div><div class='add'>+			  struct mlx4_cmd_mailbox *outbox,</div><div class='add'>+			  struct mlx4_cmd_info *cmd);</div><div class='ctx'> int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave,</div><div class='ctx'> 			  struct mlx4_vhcr *vhcr,</div><div class='ctx'> 			  struct mlx4_cmd_mailbox *inbox,</div><div class='hunk'>@@ -1024,6 +1059,11 @@ int mlx4_CLOSE_PORT_wrapper(struct mlx4_dev *dev, int slave,</div><div class='ctx'> 			    struct mlx4_cmd_mailbox *inbox,</div><div class='ctx'> 			    struct mlx4_cmd_mailbox *outbox,</div><div class='ctx'> 			    struct mlx4_cmd_info *cmd);</div><div class='add'>+int mlx4_QUERY_DEV_CAP_wrapper(struct mlx4_dev *dev, int slave,</div><div class='add'>+			       struct mlx4_vhcr *vhcr,</div><div class='add'>+			       struct mlx4_cmd_mailbox *inbox,</div><div class='add'>+			       struct mlx4_cmd_mailbox *outbox,</div><div class='add'>+			       struct mlx4_cmd_info *cmd);</div><div class='ctx'> int mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave,</div><div class='ctx'> 			    struct mlx4_vhcr *vhcr,</div><div class='ctx'> 			    struct mlx4_cmd_mailbox *inbox,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h<br/>index d69fee41f24a..6ae350921b1a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/mlx4_en.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/mlx4_en.h</a></div><div class='hunk'>@@ -40,6 +40,9 @@</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#ifdef CONFIG_MLX4_EN_DCB</div><div class='add'>+#include &lt;linux/dcbnl.h&gt;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mlx4/device.h&gt;</div><div class='ctx'> #include &lt;linux/mlx4/qp.h&gt;</div><div class='hunk'>@@ -108,9 +111,8 @@ enum {</div><div class='ctx'> #define MLX4_EN_MIN_TX_SIZE	(4096 / TXBB_SIZE)</div><div class='ctx'> </div><div class='ctx'> #define MLX4_EN_SMALL_PKT_SIZE		64</div><div class='del'>-#define MLX4_EN_NUM_TX_RINGS		8</div><div class='del'>-#define MLX4_EN_NUM_PPP_RINGS		8</div><div class='del'>-#define MAX_TX_RINGS			(MLX4_EN_NUM_TX_RINGS + MLX4_EN_NUM_PPP_RINGS)</div><div class='add'>+#define MLX4_EN_MAX_TX_RING_P_UP	32</div><div class='add'>+#define MLX4_EN_NUM_UP			8</div><div class='ctx'> #define MLX4_EN_DEF_TX_RING_SIZE	512</div><div class='ctx'> #define MLX4_EN_DEF_RX_RING_SIZE  	1024</div><div class='ctx'> </div><div class='hunk'>@@ -118,7 +120,7 @@ enum {</div><div class='ctx'> #define MLX4_EN_RX_COAL_TARGET	44</div><div class='ctx'> #define MLX4_EN_RX_COAL_TIME	0x10</div><div class='ctx'> </div><div class='del'>-#define MLX4_EN_TX_COAL_PKTS	5</div><div class='add'>+#define MLX4_EN_TX_COAL_PKTS	16</div><div class='ctx'> #define MLX4_EN_TX_COAL_TIME	0x80</div><div class='ctx'> </div><div class='ctx'> #define MLX4_EN_RX_RATE_LOW		400000</div><div class='hunk'>@@ -196,6 +198,7 @@ enum cq_type {</div><div class='ctx'> struct mlx4_en_tx_info {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	u32 nr_txbb;</div><div class='add'>+	u32 nr_bytes;</div><div class='ctx'> 	u8 linear;</div><div class='ctx'> 	u8 data_offset;</div><div class='ctx'> 	u8 inl;</div><div class='hunk'>@@ -251,9 +254,9 @@ struct mlx4_en_tx_ring {</div><div class='ctx'> 	unsigned long bytes;</div><div class='ctx'> 	unsigned long packets;</div><div class='ctx'> 	unsigned long tx_csum;</div><div class='del'>-	spinlock_t comp_lock;</div><div class='ctx'> 	struct mlx4_bf bf;</div><div class='ctx'> 	bool bf_enabled;</div><div class='add'>+	struct netdev_queue *tx_queue;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx4_en_rx_desc {</div><div class='hunk'>@@ -304,8 +307,6 @@ struct mlx4_en_cq {</div><div class='ctx'> 	spinlock_t              lock;</div><div class='ctx'> 	struct net_device      *dev;</div><div class='ctx'> 	struct napi_struct	napi;</div><div class='del'>-	/* Per-core Tx cq processing support */</div><div class='del'>-	struct timer_list timer;</div><div class='ctx'> 	int size;</div><div class='ctx'> 	int buf_size;</div><div class='ctx'> 	unsigned vector;</div><div class='hunk'>@@ -336,6 +337,7 @@ struct mlx4_en_profile {</div><div class='ctx'> 	u32 active_ports;</div><div class='ctx'> 	u32 small_pkt_int;</div><div class='ctx'> 	u8 no_reset;</div><div class='add'>+	u8 num_tx_rings_p_up;</div><div class='ctx'> 	struct mlx4_en_port_profile prof[MLX4_MAX_PORTS + 1];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -411,6 +413,15 @@ struct mlx4_en_frag_info {</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MLX4_EN_DCB</div><div class='add'>+/* Minimal TC BW - setting to 0 will block traffic */</div><div class='add'>+#define MLX4_EN_BW_MIN 1</div><div class='add'>+#define MLX4_EN_BW_MAX 100 /* Utilize 100% of the line */</div><div class='add'>+</div><div class='add'>+#define MLX4_EN_TC_ETS 7</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> struct mlx4_en_priv {</div><div class='ctx'> 	struct mlx4_en_dev *mdev;</div><div class='ctx'> 	struct mlx4_en_port_profile *prof;</div><div class='hunk'>@@ -465,9 +476,9 @@ struct mlx4_en_priv {</div><div class='ctx'> 	u16 num_frags;</div><div class='ctx'> 	u16 log_rx_info;</div><div class='ctx'> </div><div class='del'>-	struct mlx4_en_tx_ring tx_ring[MAX_TX_RINGS];</div><div class='add'>+	struct mlx4_en_tx_ring *tx_ring;</div><div class='ctx'> 	struct mlx4_en_rx_ring rx_ring[MAX_RX_RINGS];</div><div class='del'>-	struct mlx4_en_cq tx_cq[MAX_TX_RINGS];</div><div class='add'>+	struct mlx4_en_cq *tx_cq;</div><div class='ctx'> 	struct mlx4_en_cq rx_cq[MAX_RX_RINGS];</div><div class='ctx'> 	struct work_struct mcast_task;</div><div class='ctx'> 	struct work_struct mac_task;</div><div class='hunk'>@@ -484,6 +495,11 @@ struct mlx4_en_priv {</div><div class='ctx'> 	int vids[128];</div><div class='ctx'> 	bool wol;</div><div class='ctx'> 	struct device *ddev;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MLX4_EN_DCB</div><div class='add'>+	struct ieee_ets ets;</div><div class='add'>+	u16 maxrate[IEEE_8021QAZ_MAX_TCS];</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum mlx4_en_wol {</div><div class='hunk'>@@ -512,7 +528,6 @@ void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);</div><div class='ctx'> int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);</div><div class='ctx'> int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);</div><div class='ctx'> </div><div class='del'>-void mlx4_en_poll_tx_cq(unsigned long data);</div><div class='ctx'> void mlx4_en_tx_irq(struct mlx4_cq *mcq);</div><div class='ctx'> u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb);</div><div class='ctx'> netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev);</div><div class='hunk'>@@ -522,7 +537,7 @@ int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ri</div><div class='ctx'> void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv, struct mlx4_en_tx_ring *ring);</div><div class='ctx'> int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> 			     struct mlx4_en_tx_ring *ring,</div><div class='del'>-			     int cq);</div><div class='add'>+			     int cq, int user_prio);</div><div class='ctx'> void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> 				struct mlx4_en_tx_ring *ring);</div><div class='ctx'> </div><div class='hunk'>@@ -540,8 +555,8 @@ int mlx4_en_process_rx_cq(struct net_device *dev,</div><div class='ctx'> 			  int budget);</div><div class='ctx'> int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget);</div><div class='ctx'> void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,</div><div class='del'>-			     int is_tx, int rss, int qpn, int cqn,</div><div class='del'>-			     struct mlx4_qp_context *context);</div><div class='add'>+		int is_tx, int rss, int qpn, int cqn, int user_prio,</div><div class='add'>+		struct mlx4_qp_context *context);</div><div class='ctx'> void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event);</div><div class='ctx'> int mlx4_en_map_buffer(struct mlx4_buf *buf);</div><div class='ctx'> void mlx4_en_unmap_buffer(struct mlx4_buf *buf);</div><div class='hunk'>@@ -558,6 +573,10 @@ int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv);</div><div class='ctx'> int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset);</div><div class='ctx'> int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MLX4_EN_DCB</div><div class='add'>+extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_ops;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #define MLX4_EN_NUM_SELF_TEST	5</div><div class='ctx'> void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf);</div><div class='ctx'> u64 mlx4_en_mac_to_u64(u8 *addr);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/mr.c b/drivers/net/ethernet/mellanox/mlx4/mr.c<br/>index fe2ac8449c19..af55b7ce5341 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/mr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/mr.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/mr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/mr.c</a></div><div class='hunk'>@@ -788,7 +788,6 @@ int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages,</div><div class='ctx'> 		   int max_maps, u8 page_shift, struct mlx4_fmr *fmr)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_priv *priv = mlx4_priv(dev);</div><div class='del'>-	u64 mtt_offset;</div><div class='ctx'> 	int err = -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	if (max_maps &gt; dev-&gt;caps.max_fmr_maps)</div><div class='hunk'>@@ -811,8 +810,6 @@ int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	mtt_offset = fmr-&gt;mr.mtt.offset * dev-&gt;caps.mtt_entry_sz;</div><div class='del'>-</div><div class='ctx'> 	fmr-&gt;mtts = mlx4_table_find(&amp;priv-&gt;mr_table.mtt_table,</div><div class='ctx'> 				    fmr-&gt;mr.mtt.offset,</div><div class='ctx'> 				    &amp;fmr-&gt;dma_handle);</div><div class='hunk'>@@ -895,6 +892,6 @@ EXPORT_SYMBOL_GPL(mlx4_fmr_free);</div><div class='ctx'> int mlx4_SYNC_TPT(struct mlx4_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_SYNC_TPT, 1000,</div><div class='del'>-			MLX4_CMD_WRAPPED);</div><div class='add'>+			MLX4_CMD_NATIVE);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(mlx4_SYNC_TPT);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/pd.c b/drivers/net/ethernet/mellanox/mlx4/pd.c<br/>index db4746d0dca7..1ac88637ad9d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/pd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/pd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/pd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/pd.c</a></div><div class='hunk'>@@ -63,7 +63,7 @@ void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(mlx4_pd_free);</div><div class='ctx'> </div><div class='del'>-int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn)</div><div class='add'>+int __mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_priv *priv = mlx4_priv(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -73,12 +73,47 @@ int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn)</div><div class='add'>+{</div><div class='add'>+	u64 out_param;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (mlx4_is_mfunc(dev)) {</div><div class='add'>+		err = mlx4_cmd_imm(dev, 0, &amp;out_param,</div><div class='add'>+				   RES_XRCD, RES_OP_RESERVE,</div><div class='add'>+				   MLX4_CMD_ALLOC_RES,</div><div class='add'>+				   MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		*xrcdn = get_param_l(&amp;out_param);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	return __mlx4_xrcd_alloc(dev, xrcdn);</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL_GPL(mlx4_xrcd_alloc);</div><div class='ctx'> </div><div class='del'>-void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn)</div><div class='add'>+void __mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn)</div><div class='ctx'> {</div><div class='ctx'> 	mlx4_bitmap_free(&amp;mlx4_priv(dev)-&gt;xrcd_bitmap, xrcdn);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn)</div><div class='add'>+{</div><div class='add'>+	u64 in_param;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (mlx4_is_mfunc(dev)) {</div><div class='add'>+		set_param_l(&amp;in_param, xrcdn);</div><div class='add'>+		err = mlx4_cmd(dev, in_param, RES_XRCD,</div><div class='add'>+			       RES_OP_RESERVE, MLX4_CMD_FREE_RES,</div><div class='add'>+			       MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);</div><div class='add'>+		if (err)</div><div class='add'>+			mlx4_warn(dev, "Failed to release xrcdn %d\n", xrcdn);</div><div class='add'>+	} else</div><div class='add'>+		__mlx4_xrcd_free(dev, xrcdn);</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL_GPL(mlx4_xrcd_free);</div><div class='ctx'> </div><div class='ctx'> int mlx4_init_pd_table(struct mlx4_dev *dev)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/port.c b/drivers/net/ethernet/mellanox/mlx4/port.c<br/>index 77535ff18f1b..a8fb52992c64 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/port.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/port.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/port.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/port.c</a></div><div class='hunk'>@@ -338,13 +338,12 @@ EXPORT_SYMBOL_GPL(__mlx4_unregister_mac);</div><div class='ctx'> void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac)</div><div class='ctx'> {</div><div class='ctx'> 	u64 out_param;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (mlx4_is_mfunc(dev)) {</div><div class='ctx'> 		set_param_l(&amp;out_param, port);</div><div class='del'>-		err = mlx4_cmd_imm(dev, mac, &amp;out_param, RES_MAC,</div><div class='del'>-				   RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES,</div><div class='del'>-				   MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);</div><div class='add'>+		(void) mlx4_cmd_imm(dev, mac, &amp;out_param, RES_MAC,</div><div class='add'>+				    RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES,</div><div class='add'>+				    MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	__mlx4_unregister_mac(dev, port, mac);</div><div class='hunk'>@@ -698,10 +697,10 @@ static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod,</div><div class='ctx'> 	if (slave != dev-&gt;caps.function)</div><div class='ctx'> 		memset(inbox-&gt;buf, 0, 256);</div><div class='ctx'> 	if (dev-&gt;flags &amp; MLX4_FLAG_OLD_PORT_CMDS) {</div><div class='del'>-		*(u8 *) inbox-&gt;buf	   = !!reset_qkey_viols &lt;&lt; 6;</div><div class='add'>+		*(u8 *) inbox-&gt;buf	   |= !!reset_qkey_viols &lt;&lt; 6;</div><div class='ctx'> 		((__be32 *) inbox-&gt;buf)[2] = agg_cap_mask;</div><div class='ctx'> 	} else {</div><div class='del'>-		((u8 *) inbox-&gt;buf)[3]     = !!reset_qkey_viols;</div><div class='add'>+		((u8 *) inbox-&gt;buf)[3]     |= !!reset_qkey_viols;</div><div class='ctx'> 		((__be32 *) inbox-&gt;buf)[1] = agg_cap_mask;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -834,6 +833,68 @@ int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc);</div><div class='ctx'> </div><div class='add'>+int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_cmd_mailbox *mailbox;</div><div class='add'>+	struct mlx4_set_port_prio2tc_context *context;</div><div class='add'>+	int err;</div><div class='add'>+	u32 in_mod;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mailbox = mlx4_alloc_cmd_mailbox(dev);</div><div class='add'>+	if (IS_ERR(mailbox))</div><div class='add'>+		return PTR_ERR(mailbox);</div><div class='add'>+	context = mailbox-&gt;buf;</div><div class='add'>+	memset(context, 0, sizeof *context);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MLX4_NUM_UP; i += 2)</div><div class='add'>+		context-&gt;prio2tc[i &gt;&gt; 1] = prio2tc[i] &lt;&lt; 4 | prio2tc[i + 1];</div><div class='add'>+</div><div class='add'>+	in_mod = MLX4_SET_PORT_PRIO2TC &lt;&lt; 8 | port;</div><div class='add'>+	err = mlx4_cmd(dev, mailbox-&gt;dma, in_mod, 1, MLX4_CMD_SET_PORT,</div><div class='add'>+		       MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);</div><div class='add'>+</div><div class='add'>+	mlx4_free_cmd_mailbox(dev, mailbox);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(mlx4_SET_PORT_PRIO2TC);</div><div class='add'>+</div><div class='add'>+int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw,</div><div class='add'>+		u8 *pg, u16 *ratelimit)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_cmd_mailbox *mailbox;</div><div class='add'>+	struct mlx4_set_port_scheduler_context *context;</div><div class='add'>+	int err;</div><div class='add'>+	u32 in_mod;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mailbox = mlx4_alloc_cmd_mailbox(dev);</div><div class='add'>+	if (IS_ERR(mailbox))</div><div class='add'>+		return PTR_ERR(mailbox);</div><div class='add'>+	context = mailbox-&gt;buf;</div><div class='add'>+	memset(context, 0, sizeof *context);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MLX4_NUM_TC; i++) {</div><div class='add'>+		struct mlx4_port_scheduler_tc_cfg_be *tc = &amp;context-&gt;tc[i];</div><div class='add'>+		u16 r = ratelimit &amp;&amp; ratelimit[i] ? ratelimit[i] :</div><div class='add'>+			MLX4_RATELIMIT_DEFAULT;</div><div class='add'>+</div><div class='add'>+		tc-&gt;pg = htons(pg[i]);</div><div class='add'>+		tc-&gt;bw_precentage = htons(tc_tx_bw[i]);</div><div class='add'>+</div><div class='add'>+		tc-&gt;max_bw_units = htons(MLX4_RATELIMIT_UNITS);</div><div class='add'>+		tc-&gt;max_bw_value = htons(r);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	in_mod = MLX4_SET_PORT_SCHEDULER &lt;&lt; 8 | port;</div><div class='add'>+	err = mlx4_cmd(dev, mailbox-&gt;dma, in_mod, 1, MLX4_CMD_SET_PORT,</div><div class='add'>+		       MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);</div><div class='add'>+</div><div class='add'>+	mlx4_free_cmd_mailbox(dev, mailbox);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(mlx4_SET_PORT_SCHEDULER);</div><div class='add'>+</div><div class='ctx'> int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave,</div><div class='ctx'> 				struct mlx4_vhcr *vhcr,</div><div class='ctx'> 				struct mlx4_cmd_mailbox *inbox,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/profile.c b/drivers/net/ethernet/mellanox/mlx4/profile.c<br/>index 06e5adeb76f7..b83bc928d52a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/profile.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/profile.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/profile.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/profile.c</a></div><div class='hunk'>@@ -126,7 +126,9 @@ u64 mlx4_make_profile(struct mlx4_dev *dev,</div><div class='ctx'> 	profile[MLX4_RES_AUXC].num    = request-&gt;num_qp;</div><div class='ctx'> 	profile[MLX4_RES_SRQ].num     = request-&gt;num_srq;</div><div class='ctx'> 	profile[MLX4_RES_CQ].num      = request-&gt;num_cq;</div><div class='del'>-	profile[MLX4_RES_EQ].num      = min_t(unsigned, dev_cap-&gt;max_eqs, MAX_MSIX);</div><div class='add'>+	profile[MLX4_RES_EQ].num      = mlx4_is_mfunc(dev) ?</div><div class='add'>+					dev-&gt;phys_caps.num_phys_eqs :</div><div class='add'>+					min_t(unsigned, dev_cap-&gt;max_eqs, MAX_MSIX);</div><div class='ctx'> 	profile[MLX4_RES_DMPT].num    = request-&gt;num_mpt;</div><div class='ctx'> 	profile[MLX4_RES_CMPT].num    = MLX4_NUM_CMPTS;</div><div class='ctx'> 	profile[MLX4_RES_MTT].num     = request-&gt;num_mtt * (1 &lt;&lt; log_mtts_per_seg);</div><div class='hunk'>@@ -215,9 +217,10 @@ u64 mlx4_make_profile(struct mlx4_dev *dev,</div><div class='ctx'> 			init_hca-&gt;log_num_cqs = profile[i].log_num;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case MLX4_RES_EQ:</div><div class='del'>-			dev-&gt;caps.num_eqs     = profile[i].num;</div><div class='add'>+			dev-&gt;caps.num_eqs     = roundup_pow_of_two(min_t(unsigned, dev_cap-&gt;max_eqs,</div><div class='add'>+									 MAX_MSIX));</div><div class='ctx'> 			init_hca-&gt;eqc_base    = profile[i].start;</div><div class='del'>-			init_hca-&gt;log_num_eqs = profile[i].log_num;</div><div class='add'>+			init_hca-&gt;log_num_eqs = ilog2(dev-&gt;caps.num_eqs);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case MLX4_RES_DMPT:</div><div class='ctx'> 			dev-&gt;caps.num_mpts	= profile[i].num;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c<br/>index 8752e6e08169..b45d0e7f6ab0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/mellanox/mlx4/resource_tracker.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/mellanox/mlx4/resource_tracker.c</a></div><div class='hunk'>@@ -89,17 +89,6 @@ enum res_qp_states {</div><div class='ctx'> 	RES_QP_HW</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline const char *qp_states_str(enum res_qp_states state)</div><div class='del'>-{</div><div class='del'>-	switch (state) {</div><div class='del'>-	case RES_QP_BUSY: return "RES_QP_BUSY";</div><div class='del'>-	case RES_QP_RESERVED: return "RES_QP_RESERVED";</div><div class='del'>-	case RES_QP_MAPPED: return "RES_QP_MAPPED";</div><div class='del'>-	case RES_QP_HW: return "RES_QP_HW";</div><div class='del'>-	default: return "Unknown";</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct res_qp {</div><div class='ctx'> 	struct res_common	com;</div><div class='ctx'> 	struct res_mtt	       *mtt;</div><div class='hunk'>@@ -173,16 +162,6 @@ enum res_srq_states {</div><div class='ctx'> 	RES_SRQ_HW,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline const char *srq_states_str(enum res_srq_states state)</div><div class='del'>-{</div><div class='del'>-	switch (state) {</div><div class='del'>-	case RES_SRQ_BUSY: return "RES_SRQ_BUSY";</div><div class='del'>-	case RES_SRQ_ALLOCATED: return "RES_SRQ_ALLOCATED";</div><div class='del'>-	case RES_SRQ_HW: return "RES_SRQ_HW";</div><div class='del'>-	default: return "Unknown";</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct res_srq {</div><div class='ctx'> 	struct res_common	com;</div><div class='ctx'> 	struct res_mtt	       *mtt;</div><div class='hunk'>@@ -195,20 +174,21 @@ enum res_counter_states {</div><div class='ctx'> 	RES_COUNTER_ALLOCATED,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline const char *counter_states_str(enum res_counter_states state)</div><div class='del'>-{</div><div class='del'>-	switch (state) {</div><div class='del'>-	case RES_COUNTER_BUSY: return "RES_COUNTER_BUSY";</div><div class='del'>-	case RES_COUNTER_ALLOCATED: return "RES_COUNTER_ALLOCATED";</div><div class='del'>-	default: return "Unknown";</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct res_counter {</div><div class='ctx'> 	struct res_common	com;</div><div class='ctx'> 	int			port;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum res_xrcdn_states {</div><div class='add'>+	RES_XRCD_BUSY = RES_ANY_BUSY,</div><div class='add'>+	RES_XRCD_ALLOCATED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct res_xrcdn {</div><div class='add'>+	struct res_common	com;</div><div class='add'>+	int			port;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* For Debug uses */</div><div class='ctx'> static const char *ResourceType(enum mlx4_resource rt)</div><div class='ctx'> {</div><div class='hunk'>@@ -221,6 +201,7 @@ static const char *ResourceType(enum mlx4_resource rt)</div><div class='ctx'> 	case RES_MAC: return  "RES_MAC";</div><div class='ctx'> 	case RES_EQ: return "RES_EQ";</div><div class='ctx'> 	case RES_COUNTER: return "RES_COUNTER";</div><div class='add'>+	case RES_XRCD: return "RES_XRCD";</div><div class='ctx'> 	default: return "Unknown resource type !!!";</div><div class='ctx'> 	};</div><div class='ctx'> }</div><div class='hunk'>@@ -254,16 +235,23 @@ int mlx4_init_resource_tracker(struct mlx4_dev *dev)</div><div class='ctx'> 	return 0 ;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx4_free_resource_tracker(struct mlx4_dev *dev)</div><div class='add'>+void mlx4_free_resource_tracker(struct mlx4_dev *dev,</div><div class='add'>+				enum mlx4_res_tracker_free_type type)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_priv *priv = mlx4_priv(dev);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;mfunc.master.res_tracker.slave_list) {</div><div class='del'>-		for (i = 0 ; i &lt; dev-&gt;num_slaves; i++)</div><div class='del'>-			mlx4_delete_all_resources_for_slave(dev, i);</div><div class='del'>-</div><div class='del'>-		kfree(priv-&gt;mfunc.master.res_tracker.slave_list);</div><div class='add'>+		if (type != RES_TR_FREE_STRUCTS_ONLY)</div><div class='add'>+			for (i = 0 ; i &lt; dev-&gt;num_slaves; i++)</div><div class='add'>+				if (type == RES_TR_FREE_ALL ||</div><div class='add'>+				    dev-&gt;caps.function != i)</div><div class='add'>+					mlx4_delete_all_resources_for_slave(dev, i);</div><div class='add'>+</div><div class='add'>+		if (type != RES_TR_FREE_SLAVES_ONLY) {</div><div class='add'>+			kfree(priv-&gt;mfunc.master.res_tracker.slave_list);</div><div class='add'>+			priv-&gt;mfunc.master.res_tracker.slave_list = NULL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -471,6 +459,20 @@ static struct res_common *alloc_counter_tr(int id)</div><div class='ctx'> 	return &amp;ret-&gt;com;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct res_common *alloc_xrcdn_tr(int id)</div><div class='add'>+{</div><div class='add'>+	struct res_xrcdn *ret;</div><div class='add'>+</div><div class='add'>+	ret = kzalloc(sizeof *ret, GFP_KERNEL);</div><div class='add'>+	if (!ret)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ret-&gt;com.res_id = id;</div><div class='add'>+	ret-&gt;com.state = RES_XRCD_ALLOCATED;</div><div class='add'>+</div><div class='add'>+	return &amp;ret-&gt;com;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct res_common *alloc_tr(int id, enum mlx4_resource type, int slave,</div><div class='ctx'> 				   int extra)</div><div class='ctx'> {</div><div class='hunk'>@@ -501,7 +503,9 @@ static struct res_common *alloc_tr(int id, enum mlx4_resource type, int slave,</div><div class='ctx'> 	case RES_COUNTER:</div><div class='ctx'> 		ret = alloc_counter_tr(id);</div><div class='ctx'> 		break;</div><div class='del'>-</div><div class='add'>+	case RES_XRCD:</div><div class='add'>+		ret = alloc_xrcdn_tr(id);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -624,6 +628,16 @@ static int remove_counter_ok(struct res_counter *res)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int remove_xrcdn_ok(struct res_xrcdn *res)</div><div class='add'>+{</div><div class='add'>+	if (res-&gt;com.state == RES_XRCD_BUSY)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	else if (res-&gt;com.state != RES_XRCD_ALLOCATED)</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int remove_cq_ok(struct res_cq *res)</div><div class='ctx'> {</div><div class='ctx'> 	if (res-&gt;com.state == RES_CQ_BUSY)</div><div class='hunk'>@@ -663,6 +677,8 @@ static int remove_ok(struct res_common *res, enum mlx4_resource type, int extra)</div><div class='ctx'> 		return remove_eq_ok((struct res_eq *)res);</div><div class='ctx'> 	case RES_COUNTER:</div><div class='ctx'> 		return remove_counter_ok((struct res_counter *)res);</div><div class='add'>+	case RES_XRCD:</div><div class='add'>+		return remove_xrcdn_ok((struct res_xrcdn *)res);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1269,6 +1285,50 @@ static int vlan_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int counter_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd,</div><div class='add'>+			     u64 in_param, u64 *out_param)</div><div class='add'>+{</div><div class='add'>+	u32 index;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (op != RES_OP_RESERVE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = __mlx4_counter_alloc(dev, &amp;index);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = add_res_range(dev, slave, index, 1, RES_COUNTER, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		__mlx4_counter_free(dev, index);</div><div class='add'>+	else</div><div class='add'>+		set_param_l(out_param, index);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrcdn_alloc_res(struct mlx4_dev *dev, int slave, int op, int cmd,</div><div class='add'>+			   u64 in_param, u64 *out_param)</div><div class='add'>+{</div><div class='add'>+	u32 xrcdn;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (op != RES_OP_RESERVE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = __mlx4_xrcd_alloc(dev, &amp;xrcdn);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = add_res_range(dev, slave, xrcdn, 1, RES_XRCD, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		__mlx4_xrcd_free(dev, xrcdn);</div><div class='add'>+	else</div><div class='add'>+		set_param_l(out_param, xrcdn);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx4_ALLOC_RES_wrapper(struct mlx4_dev *dev, int slave,</div><div class='ctx'> 			   struct mlx4_vhcr *vhcr,</div><div class='ctx'> 			   struct mlx4_cmd_mailbox *inbox,</div><div class='hunk'>@@ -1314,6 +1374,16 @@ int mlx4_ALLOC_RES_wrapper(struct mlx4_dev *dev, int slave,</div><div class='ctx'> 				    vhcr-&gt;in_param, &amp;vhcr-&gt;out_param);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case RES_COUNTER:</div><div class='add'>+		err = counter_alloc_res(dev, slave, vhcr-&gt;op_modifier, alop,</div><div class='add'>+					vhcr-&gt;in_param, &amp;vhcr-&gt;out_param);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case RES_XRCD:</div><div class='add'>+		err = xrcdn_alloc_res(dev, slave, vhcr-&gt;op_modifier, alop,</div><div class='add'>+				      vhcr-&gt;in_param, &amp;vhcr-&gt;out_param);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1496,6 +1566,44 @@ static int vlan_free_res(struct mlx4_dev *dev, int slave, int op, int cmd,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int counter_free_res(struct mlx4_dev *dev, int slave, int op, int cmd,</div><div class='add'>+			    u64 in_param, u64 *out_param)</div><div class='add'>+{</div><div class='add'>+	int index;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (op != RES_OP_RESERVE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	index = get_param_l(&amp;in_param);</div><div class='add'>+	err = rem_res_range(dev, slave, index, 1, RES_COUNTER, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	__mlx4_counter_free(dev, index);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrcdn_free_res(struct mlx4_dev *dev, int slave, int op, int cmd,</div><div class='add'>+			  u64 in_param, u64 *out_param)</div><div class='add'>+{</div><div class='add'>+	int xrcdn;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (op != RES_OP_RESERVE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	xrcdn = get_param_l(&amp;in_param);</div><div class='add'>+	err = rem_res_range(dev, slave, xrcdn, 1, RES_XRCD, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	__mlx4_xrcd_free(dev, xrcdn);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx4_FREE_RES_wrapper(struct mlx4_dev *dev, int slave,</div><div class='ctx'> 			  struct mlx4_vhcr *vhcr,</div><div class='ctx'> 			  struct mlx4_cmd_mailbox *inbox,</div><div class='hunk'>@@ -1541,6 +1649,15 @@ int mlx4_FREE_RES_wrapper(struct mlx4_dev *dev, int slave,</div><div class='ctx'> 				   vhcr-&gt;in_param, &amp;vhcr-&gt;out_param);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case RES_COUNTER:</div><div class='add'>+		err = counter_free_res(dev, slave, vhcr-&gt;op_modifier, alop,</div><div class='add'>+				       vhcr-&gt;in_param, &amp;vhcr-&gt;out_param);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case RES_XRCD:</div><div class='add'>+		err = xrcdn_free_res(dev, slave, vhcr-&gt;op_modifier, alop,</div><div class='add'>+				     vhcr-&gt;in_param, &amp;vhcr-&gt;out_param);</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2536,7 +2653,7 @@ int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave,</div><div class='ctx'> 	struct mlx4_qp qp; /* dummy for calling attach/detach */</div><div class='ctx'> 	u8 *gid = inbox-&gt;buf;</div><div class='ctx'> 	enum mlx4_protocol prot = (vhcr-&gt;in_modifier &gt;&gt; 28) &amp; 0x7;</div><div class='del'>-	int err, err1;</div><div class='add'>+	int err;</div><div class='ctx'> 	int qpn;</div><div class='ctx'> 	struct res_qp *rqp;</div><div class='ctx'> 	int attach = vhcr-&gt;op_modifier;</div><div class='hunk'>@@ -2571,7 +2688,7 @@ int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave,</div><div class='ctx'> </div><div class='ctx'> ex_rem:</div><div class='ctx'> 	/* ignore error return below, already in error */</div><div class='del'>-	err1 = rem_mcg_res(dev, slave, rqp, gid, prot, type);</div><div class='add'>+	(void) rem_mcg_res(dev, slave, rqp, gid, prot, type);</div><div class='ctx'> ex_put:</div><div class='ctx'> 	put_res(dev, slave, qpn, RES_QP);</div><div class='ctx'> </div><div class='hunk'>@@ -2604,13 +2721,12 @@ static void detach_qp(struct mlx4_dev *dev, int slave, struct res_qp *rqp)</div><div class='ctx'> {</div><div class='ctx'> 	struct res_gid *rgid;</div><div class='ctx'> 	struct res_gid *tmp;</div><div class='del'>-	int err;</div><div class='ctx'> 	struct mlx4_qp qp; /* dummy for calling attach/detach */</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry_safe(rgid, tmp, &amp;rqp-&gt;mcg_list, list) {</div><div class='ctx'> 		qp.qpn = rqp-&gt;local_qpn;</div><div class='del'>-		err = mlx4_qp_detach_common(dev, &amp;qp, rgid-&gt;gid, rgid-&gt;prot,</div><div class='del'>-					    rgid-&gt;steer);</div><div class='add'>+		(void) mlx4_qp_detach_common(dev, &amp;qp, rgid-&gt;gid, rgid-&gt;prot,</div><div class='add'>+					     rgid-&gt;steer);</div><div class='ctx'> 		list_del(&amp;rgid-&gt;list);</div><div class='ctx'> 		kfree(rgid);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3036,14 +3152,13 @@ static void rem_slave_eqs(struct mlx4_dev *dev, int slave)</div><div class='ctx'> 							   MLX4_CMD_HW2SW_EQ,</div><div class='ctx'> 							   MLX4_CMD_TIME_CLASS_A,</div><div class='ctx'> 							   MLX4_CMD_NATIVE);</div><div class='del'>-					mlx4_dbg(dev, "rem_slave_eqs: failed"</div><div class='del'>-						 " to move slave %d eqs %d to"</div><div class='del'>-						 " SW ownership\n", slave, eqn);</div><div class='add'>+					if (err)</div><div class='add'>+						mlx4_dbg(dev, "rem_slave_eqs: failed"</div><div class='add'>+							 " to move slave %d eqs %d to"</div><div class='add'>+							 " SW ownership\n", slave, eqn);</div><div class='ctx'> 					mlx4_free_cmd_mailbox(dev, mailbox);</div><div class='del'>-					if (!err) {</div><div class='del'>-						atomic_dec(&amp;eq-&gt;mtt-&gt;ref_count);</div><div class='del'>-						state = RES_EQ_RESERVED;</div><div class='del'>-					}</div><div class='add'>+					atomic_dec(&amp;eq-&gt;mtt-&gt;ref_count);</div><div class='add'>+					state = RES_EQ_RESERVED;</div><div class='ctx'> 					break;</div><div class='ctx'> </div><div class='ctx'> 				default:</div><div class='hunk'>@@ -3056,6 +3171,64 @@ static void rem_slave_eqs(struct mlx4_dev *dev, int slave)</div><div class='ctx'> 	spin_unlock_irq(mlx4_tlock(dev));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rem_slave_counters(struct mlx4_dev *dev, int slave)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_priv *priv = mlx4_priv(dev);</div><div class='add'>+	struct mlx4_resource_tracker *tracker = &amp;priv-&gt;mfunc.master.res_tracker;</div><div class='add'>+	struct list_head *counter_list =</div><div class='add'>+		&amp;tracker-&gt;slave_list[slave].res_list[RES_COUNTER];</div><div class='add'>+	struct res_counter *counter;</div><div class='add'>+	struct res_counter *tmp;</div><div class='add'>+	int err;</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	err = move_all_busy(dev, slave, RES_COUNTER);</div><div class='add'>+	if (err)</div><div class='add'>+		mlx4_warn(dev, "rem_slave_counters: Could not move all counters to "</div><div class='add'>+			  "busy for slave %d\n", slave);</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(mlx4_tlock(dev));</div><div class='add'>+	list_for_each_entry_safe(counter, tmp, counter_list, com.list) {</div><div class='add'>+		if (counter-&gt;com.owner == slave) {</div><div class='add'>+			index = counter-&gt;com.res_id;</div><div class='add'>+			radix_tree_delete(&amp;tracker-&gt;res_tree[RES_COUNTER], index);</div><div class='add'>+			list_del(&amp;counter-&gt;com.list);</div><div class='add'>+			kfree(counter);</div><div class='add'>+			__mlx4_counter_free(dev, index);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(mlx4_tlock(dev));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rem_slave_xrcdns(struct mlx4_dev *dev, int slave)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_priv *priv = mlx4_priv(dev);</div><div class='add'>+	struct mlx4_resource_tracker *tracker = &amp;priv-&gt;mfunc.master.res_tracker;</div><div class='add'>+	struct list_head *xrcdn_list =</div><div class='add'>+		&amp;tracker-&gt;slave_list[slave].res_list[RES_XRCD];</div><div class='add'>+	struct res_xrcdn *xrcd;</div><div class='add'>+	struct res_xrcdn *tmp;</div><div class='add'>+	int err;</div><div class='add'>+	int xrcdn;</div><div class='add'>+</div><div class='add'>+	err = move_all_busy(dev, slave, RES_XRCD);</div><div class='add'>+	if (err)</div><div class='add'>+		mlx4_warn(dev, "rem_slave_xrcdns: Could not move all xrcdns to "</div><div class='add'>+			  "busy for slave %d\n", slave);</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(mlx4_tlock(dev));</div><div class='add'>+	list_for_each_entry_safe(xrcd, tmp, xrcdn_list, com.list) {</div><div class='add'>+		if (xrcd-&gt;com.owner == slave) {</div><div class='add'>+			xrcdn = xrcd-&gt;com.res_id;</div><div class='add'>+			radix_tree_delete(&amp;tracker-&gt;res_tree[RES_XRCD], xrcdn);</div><div class='add'>+			list_del(&amp;xrcd-&gt;com.list);</div><div class='add'>+			kfree(xrcd);</div><div class='add'>+			__mlx4_xrcd_free(dev, xrcdn);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(mlx4_tlock(dev));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_priv *priv = mlx4_priv(dev);</div><div class='hunk'>@@ -3069,5 +3242,7 @@ void mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave)</div><div class='ctx'> 	rem_slave_mrs(dev, slave);</div><div class='ctx'> 	rem_slave_eqs(dev, slave);</div><div class='ctx'> 	rem_slave_mtts(dev, slave);</div><div class='add'>+	rem_slave_counters(dev, slave);</div><div class='add'>+	rem_slave_xrcdns(dev, slave);</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;mfunc.master.res_tracker.slave_list[slave].mutex);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/micrel/ks8842.c b/drivers/net/ethernet/micrel/ks8842.c<br/>index f84dd2dc82b6..24fb049ac2f2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/micrel/ks8842.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/micrel/ks8842.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/micrel/ks8842.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/micrel/ks8842.c</a></div><div class='hunk'>@@ -1262,7 +1262,7 @@ static struct platform_driver ks8842_platform_driver = {</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= ks8842_probe,</div><div class='del'>-	.remove		= ks8842_remove,</div><div class='add'>+	.remove		= __devexit_p(ks8842_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_platform_driver(ks8842_platform_driver);</div><div class='head'>diff --git a/drivers/net/ethernet/micrel/ks8851.c b/drivers/net/ethernet/micrel/ks8851.c<br/>index f8dda009d3c0..5e313e9a252f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/micrel/ks8851.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/micrel/ks8851.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/micrel/ks8851.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/micrel/ks8851.c</a></div><div class='hunk'>@@ -618,10 +618,8 @@ static void ks8851_irq_work(struct work_struct *work)</div><div class='ctx'> 	netif_dbg(ks, intr, ks-&gt;netdev,</div><div class='ctx'> 		  "%s: status 0x%04x\n", __func__, status);</div><div class='ctx'> </div><div class='del'>-	if (status &amp; IRQ_LCI) {</div><div class='del'>-		/* should do something about checking link status */</div><div class='add'>+	if (status &amp; IRQ_LCI)</div><div class='ctx'> 		handled |= IRQ_LCI;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (status &amp; IRQ_LDI) {</div><div class='ctx'> 		u16 pmecr = ks8851_rdreg16(ks, KS_PMECR);</div><div class='hunk'>@@ -684,6 +682,9 @@ static void ks8851_irq_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;ks-&gt;lock);</div><div class='ctx'> </div><div class='add'>+	if (status &amp; IRQ_LCI)</div><div class='add'>+		mii_check_link(&amp;ks-&gt;mii);</div><div class='add'>+</div><div class='ctx'> 	if (status &amp; IRQ_TXI)</div><div class='ctx'> 		netif_wake_queue(ks-&gt;netdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c<br/>index 27273ae1a6e6..90153fc983cb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/myricom/myri10ge/myri10ge.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/myricom/myri10ge/myri10ge.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/myricom/myri10ge/myri10ge.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/myricom/myri10ge/myri10ge.c</a></div><div class='hunk'>@@ -4033,7 +4033,6 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;myri10ge_netdev_ops;</div><div class='ctx'> 	netdev-&gt;mtu = myri10ge_initial_mtu;</div><div class='del'>-	netdev-&gt;base_addr = mgp-&gt;iomem_base;</div><div class='ctx'> 	netdev-&gt;hw_features = mgp-&gt;features | NETIF_F_LRO | NETIF_F_RXCSUM;</div><div class='ctx'> 	netdev-&gt;features = netdev-&gt;hw_features;</div><div class='ctx'> </div><div class='hunk'>@@ -4047,12 +4046,10 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		netdev-&gt;vlan_features &amp;= ~NETIF_F_TSO;</div><div class='ctx'> </div><div class='ctx'> 	/* make sure we can get an irq, and that MSI can be</div><div class='del'>-	 * setup (if available).  Also ensure netdev-&gt;irq</div><div class='del'>-	 * is set to correct value if MSI is enabled */</div><div class='add'>+	 * setup (if available). */</div><div class='ctx'> 	status = myri10ge_request_irq(mgp);</div><div class='ctx'> 	if (status != 0)</div><div class='ctx'> 		goto abort_with_firmware;</div><div class='del'>-	netdev-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> 	myri10ge_free_irq(mgp);</div><div class='ctx'> </div><div class='ctx'> 	/* Save configuration space to be restored if the</div><div class='hunk'>@@ -4077,7 +4074,7 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	else</div><div class='ctx'> 		dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",</div><div class='ctx'> 			 mgp-&gt;msi_enabled ? "MSI" : "xPIC",</div><div class='del'>-			 netdev-&gt;irq, mgp-&gt;tx_boundary, mgp-&gt;fw_name,</div><div class='add'>+			 pdev-&gt;irq, mgp-&gt;tx_boundary, mgp-&gt;fw_name,</div><div class='ctx'> 			 (mgp-&gt;wc_enabled ? "Enabled" : "Disabled"));</div><div class='ctx'> </div><div class='ctx'> 	board_number++;</div><div class='head'>diff --git a/drivers/net/ethernet/natsemi/Kconfig b/drivers/net/ethernet/natsemi/Kconfig<br/>index eb836f770f50..f157334579fd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/natsemi/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/natsemi/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/natsemi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/natsemi/Kconfig</a></div><div class='hunk'>@@ -6,9 +6,8 @@ config NET_VENDOR_NATSEMI</div><div class='ctx'> 	bool "National Semi-conductor devices"</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on AMIGA_PCMCIA || ARM || EISA || EXPERIMENTAL || H8300 || \</div><div class='del'>-		   ISA || M32R || MAC || MACH_JAZZ || MACH_TX49XX || MCA || \</div><div class='del'>-		   MCA_LEGACY || MIPS || PCI || PCMCIA || SUPERH || \</div><div class='del'>-		   XTENSA_PLATFORM_XT2000 || ZORRO</div><div class='add'>+		   ISA || M32R || MAC || MACH_JAZZ || MACH_TX49XX || MIPS || \</div><div class='add'>+		   PCI || PCMCIA || SUPERH || XTENSA_PLATFORM_XT2000 || ZORRO</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  If you have a network (Ethernet) card belonging to this class, say Y</div><div class='ctx'> 	  and read the Ethernet-HOWTO, available from</div><div class='hunk'>@@ -21,21 +20,6 @@ config NET_VENDOR_NATSEMI</div><div class='ctx'> </div><div class='ctx'> if NET_VENDOR_NATSEMI</div><div class='ctx'> </div><div class='del'>-config IBMLANA</div><div class='del'>-	tristate "IBM LAN Adapter/A support"</div><div class='del'>-	depends on MCA</div><div class='del'>-	---help---</div><div class='del'>-	  This is a Micro Channel Ethernet adapter.  You need to set</div><div class='del'>-	  CONFIG_MCA to use this driver.  It is both available as an in-kernel</div><div class='del'>-	  driver and as a module.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here. The only</div><div class='del'>-	  currently supported card is the IBM LAN Adapter/A for Ethernet.  It</div><div class='del'>-	  will both support 16K and 32K memory windows, however a 32K window</div><div class='del'>-	  gives a better security against packet losses.  Usage of multiple</div><div class='del'>-	  boards with this driver should be possible, but has not been tested</div><div class='del'>-	  up to now due to lack of hardware.</div><div class='del'>-</div><div class='ctx'> config MACSONIC</div><div class='ctx'> 	tristate "Macintosh SONIC based ethernet (onboard, NuBus, LC, CS)"</div><div class='ctx'> 	depends on MAC</div><div class='head'>diff --git a/drivers/net/ethernet/natsemi/Makefile b/drivers/net/ethernet/natsemi/Makefile<br/>index 9aa5dea52b3e..764c532a96d1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/natsemi/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/natsemi/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/natsemi/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/natsemi/Makefile</a></div><div class='hunk'>@@ -2,7 +2,6 @@</div><div class='ctx'> # Makefile for the National Semi-conductor Sonic devices.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_IBMLANA) += ibmlana.o</div><div class='ctx'> obj-$(CONFIG_MACSONIC) += macsonic.o</div><div class='ctx'> obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o</div><div class='ctx'> obj-$(CONFIG_NATSEMI) += natsemi.o</div><div class='head'>diff --git a/drivers/net/ethernet/natsemi/natsemi.c b/drivers/net/ethernet/natsemi/natsemi.c<br/>index d38e48d4f430..5b61d12f8b91 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/natsemi/natsemi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/natsemi/natsemi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/natsemi/natsemi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/natsemi/natsemi.c</a></div><div class='hunk'>@@ -547,6 +547,7 @@ struct netdev_private {</div><div class='ctx'> 	struct sk_buff *tx_skbuff[TX_RING_SIZE];</div><div class='ctx'> 	dma_addr_t tx_dma[TX_RING_SIZE];</div><div class='ctx'> 	struct net_device *dev;</div><div class='add'>+	void __iomem *ioaddr;</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	/* Media monitoring timer */</div><div class='ctx'> 	struct timer_list timer;</div><div class='hunk'>@@ -699,7 +700,9 @@ static ssize_t natsemi_set_dspcfg_workaround(struct device *dev,</div><div class='ctx'> </div><div class='ctx'> static inline void __iomem *ns_ioaddr(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	return (void __iomem *) dev-&gt;base_addr;</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return np-&gt;ioaddr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void natsemi_irq_enable(struct net_device *dev)</div><div class='hunk'>@@ -863,10 +866,9 @@ static int __devinit natsemi_probe1 (struct pci_dev *pdev,</div><div class='ctx'> 	/* Store MAC Address in perm_addr */</div><div class='ctx'> 	memcpy(dev-&gt;perm_addr, dev-&gt;dev_addr, ETH_ALEN);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = (unsigned long __force) ioaddr;</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-</div><div class='ctx'> 	np = netdev_priv(dev);</div><div class='add'>+	np-&gt;ioaddr = ioaddr;</div><div class='add'>+</div><div class='ctx'> 	netif_napi_add(dev, &amp;np-&gt;napi, natsemi_poll, 64);</div><div class='ctx'> 	np-&gt;dev = dev;</div><div class='ctx'> </div><div class='hunk'>@@ -914,9 +916,6 @@ static int __devinit natsemi_probe1 (struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	option = find_cnt &lt; MAX_UNITS ? options[find_cnt] : 0;</div><div class='del'>-	if (dev-&gt;mem_start)</div><div class='del'>-		option = dev-&gt;mem_start;</div><div class='del'>-</div><div class='ctx'> 	/* The lower four bits are the media type. */</div><div class='ctx'> 	if (option) {</div><div class='ctx'> 		if (option &amp; 0x200)</div><div class='hunk'>@@ -1532,20 +1531,21 @@ static int netdev_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	void __iomem * ioaddr = ns_ioaddr(dev);</div><div class='add'>+	const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Reset the chip, just in case. */</div><div class='ctx'> 	natsemi_reset(dev);</div><div class='ctx'> </div><div class='del'>-	i = request_irq(dev-&gt;irq, intr_handler, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	i = request_irq(irq, intr_handler, IRQF_SHARED, dev-&gt;name, dev);</div><div class='ctx'> 	if (i) return i;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_msg_ifup(np))</div><div class='ctx'> 		printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",</div><div class='del'>-			dev-&gt;name, dev-&gt;irq);</div><div class='add'>+			dev-&gt;name, irq);</div><div class='ctx'> 	i = alloc_ring(dev);</div><div class='ctx'> 	if (i &lt; 0) {</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='add'>+		free_irq(irq, dev);</div><div class='ctx'> 		return i;</div><div class='ctx'> 	}</div><div class='ctx'> 	napi_enable(&amp;np-&gt;napi);</div><div class='hunk'>@@ -1794,6 +1794,7 @@ static void netdev_timer(unsigned long data)</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	void __iomem * ioaddr = ns_ioaddr(dev);</div><div class='ctx'> 	int next_tick = NATSEMI_TIMER_FREQ;</div><div class='add'>+	const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_msg_timer(np)) {</div><div class='ctx'> 		/* DO NOT read the IntrStatus register,</div><div class='hunk'>@@ -1817,14 +1818,14 @@ static void netdev_timer(unsigned long data)</div><div class='ctx'> 				if (netif_msg_drv(np))</div><div class='ctx'> 					printk(KERN_NOTICE "%s: possible phy reset: "</div><div class='ctx'> 						"re-initializing\n", dev-&gt;name);</div><div class='del'>-				disable_irq(dev-&gt;irq);</div><div class='add'>+				disable_irq(irq);</div><div class='ctx'> 				spin_lock_irq(&amp;np-&gt;lock);</div><div class='ctx'> 				natsemi_stop_rxtx(dev);</div><div class='ctx'> 				dump_ring(dev);</div><div class='ctx'> 				reinit_ring(dev);</div><div class='ctx'> 				init_registers(dev);</div><div class='ctx'> 				spin_unlock_irq(&amp;np-&gt;lock);</div><div class='del'>-				enable_irq(dev-&gt;irq);</div><div class='add'>+				enable_irq(irq);</div><div class='ctx'> 			} else {</div><div class='ctx'> 				/* hurry back */</div><div class='ctx'> 				next_tick = HZ;</div><div class='hunk'>@@ -1841,10 +1842,10 @@ static void netdev_timer(unsigned long data)</div><div class='ctx'> 		spin_unlock_irq(&amp;np-&gt;lock);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (np-&gt;oom) {</div><div class='del'>-		disable_irq(dev-&gt;irq);</div><div class='add'>+		disable_irq(irq);</div><div class='ctx'> 		np-&gt;oom = 0;</div><div class='ctx'> 		refill_rx(dev);</div><div class='del'>-		enable_irq(dev-&gt;irq);</div><div class='add'>+		enable_irq(irq);</div><div class='ctx'> 		if (!np-&gt;oom) {</div><div class='ctx'> 			writel(RxOn, ioaddr + ChipCmd);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1885,8 +1886,9 @@ static void ns_tx_timeout(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	void __iomem * ioaddr = ns_ioaddr(dev);</div><div class='add'>+	const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='ctx'> </div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='add'>+	disable_irq(irq);</div><div class='ctx'> 	spin_lock_irq(&amp;np-&gt;lock);</div><div class='ctx'> 	if (!np-&gt;hands_off) {</div><div class='ctx'> 		if (netif_msg_tx_err(np))</div><div class='hunk'>@@ -1905,7 +1907,7 @@ static void ns_tx_timeout(struct net_device *dev)</div><div class='ctx'> 			dev-&gt;name);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irq(&amp;np-&gt;lock);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='ctx'> 	dev-&gt;stats.tx_errors++;</div><div class='hunk'>@@ -2470,9 +2472,12 @@ static struct net_device_stats *get_stats(struct net_device *dev)</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> static void natsemi_poll_controller(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='del'>-	intr_handler(dev-&gt;irq, dev);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	disable_irq(irq);</div><div class='add'>+	intr_handler(irq, dev);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -2523,8 +2528,9 @@ static int natsemi_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='ctx'> 		struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 		void __iomem * ioaddr = ns_ioaddr(dev);</div><div class='add'>+		const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='ctx'> </div><div class='del'>-		disable_irq(dev-&gt;irq);</div><div class='add'>+		disable_irq(irq);</div><div class='ctx'> 		spin_lock(&amp;np-&gt;lock);</div><div class='ctx'> 		/* stop engines */</div><div class='ctx'> 		natsemi_stop_rxtx(dev);</div><div class='hunk'>@@ -2537,7 +2543,7 @@ static int natsemi_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 		/* restart engines */</div><div class='ctx'> 		writel(RxOn | TxOn, ioaddr + ChipCmd);</div><div class='ctx'> 		spin_unlock(&amp;np-&gt;lock);</div><div class='del'>-		enable_irq(dev-&gt;irq);</div><div class='add'>+		enable_irq(irq);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3135,6 +3141,7 @@ static int netdev_close(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem * ioaddr = ns_ioaddr(dev);</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_msg_ifdown(np))</div><div class='ctx'> 		printk(KERN_DEBUG</div><div class='hunk'>@@ -3156,14 +3163,14 @@ static int netdev_close(struct net_device *dev)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	del_timer_sync(&amp;np-&gt;timer);</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='add'>+	disable_irq(irq);</div><div class='ctx'> 	spin_lock_irq(&amp;np-&gt;lock);</div><div class='ctx'> 	natsemi_irq_disable(dev);</div><div class='ctx'> 	np-&gt;hands_off = 1;</div><div class='ctx'> 	spin_unlock_irq(&amp;np-&gt;lock);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Interrupt disabled, interrupt handler released,</div><div class='ctx'> 	 * queue stopped, timer deleted, rtnl_lock held</div><div class='hunk'>@@ -3256,9 +3263,11 @@ static int natsemi_suspend (struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	if (netif_running (dev)) {</div><div class='add'>+		const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='add'>+</div><div class='ctx'> 		del_timer_sync(&amp;np-&gt;timer);</div><div class='ctx'> </div><div class='del'>-		disable_irq(dev-&gt;irq);</div><div class='add'>+		disable_irq(irq);</div><div class='ctx'> 		spin_lock_irq(&amp;np-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 		natsemi_irq_disable(dev);</div><div class='hunk'>@@ -3267,7 +3276,7 @@ static int natsemi_suspend (struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> 		netif_stop_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 		spin_unlock_irq(&amp;np-&gt;lock);</div><div class='del'>-		enable_irq(dev-&gt;irq);</div><div class='add'>+		enable_irq(irq);</div><div class='ctx'> </div><div class='ctx'> 		napi_disable(&amp;np-&gt;napi);</div><div class='ctx'> </div><div class='hunk'>@@ -3307,6 +3316,8 @@ static int natsemi_resume (struct pci_dev *pdev)</div><div class='ctx'> 	if (netif_device_present(dev))</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='add'>+		const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='add'>+</div><div class='ctx'> 		BUG_ON(!np-&gt;hands_off);</div><div class='ctx'> 		ret = pci_enable_device(pdev);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='hunk'>@@ -3320,13 +3331,13 @@ static int natsemi_resume (struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 		natsemi_reset(dev);</div><div class='ctx'> 		init_ring(dev);</div><div class='del'>-		disable_irq(dev-&gt;irq);</div><div class='add'>+		disable_irq(irq);</div><div class='ctx'> 		spin_lock_irq(&amp;np-&gt;lock);</div><div class='ctx'> 		np-&gt;hands_off = 0;</div><div class='ctx'> 		init_registers(dev);</div><div class='ctx'> 		netif_device_attach(dev);</div><div class='ctx'> 		spin_unlock_irq(&amp;np-&gt;lock);</div><div class='del'>-		enable_irq(dev-&gt;irq);</div><div class='add'>+		enable_irq(irq);</div><div class='ctx'> </div><div class='ctx'> 		mod_timer(&amp;np-&gt;timer, round_jiffies(jiffies + 1*HZ));</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/neterion/s2io.c b/drivers/net/ethernet/neterion/s2io.c<br/>index 6338ef8606ae..bb367582c1e8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/neterion/s2io.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/neterion/s2io.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/neterion/s2io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/neterion/s2io.c</a></div><div class='hunk'>@@ -2846,6 +2846,7 @@ static int s2io_poll_inta(struct napi_struct *napi, int budget)</div><div class='ctx'> static void s2io_netpoll(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct s2io_nic *nic = netdev_priv(dev);</div><div class='add'>+	const int irq = nic-&gt;pdev-&gt;irq;</div><div class='ctx'> 	struct XENA_dev_config __iomem *bar0 = nic-&gt;bar0;</div><div class='ctx'> 	u64 val64 = 0xFFFFFFFFFFFFFFFFULL;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -2855,7 +2856,7 @@ static void s2io_netpoll(struct net_device *dev)</div><div class='ctx'> 	if (pci_channel_offline(nic-&gt;pdev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='add'>+	disable_irq(irq);</div><div class='ctx'> </div><div class='ctx'> 	writeq(val64, &amp;bar0-&gt;rx_traffic_int);</div><div class='ctx'> 	writeq(val64, &amp;bar0-&gt;tx_traffic_int);</div><div class='hunk'>@@ -2884,7 +2885,7 @@ static void s2io_netpoll(struct net_device *dev)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -3897,9 +3898,7 @@ static void remove_msix_isr(struct s2io_nic *sp)</div><div class='ctx'> </div><div class='ctx'> static void remove_inta_isr(struct s2io_nic *sp)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = sp-&gt;dev;</div><div class='del'>-</div><div class='del'>-	free_irq(sp-&gt;pdev-&gt;irq, dev);</div><div class='add'>+	free_irq(sp-&gt;pdev-&gt;irq, sp-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* ********************************************************* *</div><div class='hunk'>@@ -7046,7 +7045,7 @@ static int s2io_add_isr(struct s2io_nic *sp)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (sp-&gt;config.intr_type == INTA) {</div><div class='del'>-		err = request_irq((int)sp-&gt;pdev-&gt;irq, s2io_isr, IRQF_SHARED,</div><div class='add'>+		err = request_irq(sp-&gt;pdev-&gt;irq, s2io_isr, IRQF_SHARED,</div><div class='ctx'> 				  sp-&gt;name, dev);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			DBG_PRINT(ERR_DBG, "%s: ISR registration failed\n",</div><div class='hunk'>@@ -7908,9 +7907,6 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)</div><div class='ctx'> 		goto bar1_remap_failed;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-	dev-&gt;base_addr = (unsigned long)sp-&gt;bar0;</div><div class='del'>-</div><div class='ctx'> 	/* Initializing the BAR1 address as the start of the FIFO pointer. */</div><div class='ctx'> 	for (j = 0; j &lt; MAX_TX_FIFOS; j++) {</div><div class='ctx'> 		mac_control-&gt;tx_FIFO_start[j] = sp-&gt;bar1 + (j * 0x00020000);</div><div class='head'>diff --git a/drivers/net/ethernet/neterion/vxge/vxge-main.c b/drivers/net/ethernet/neterion/vxge/vxge-main.c<br/>index ef76725454d2..51387c31914b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/neterion/vxge/vxge-main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/neterion/vxge/vxge-main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/neterion/vxge/vxge-main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/neterion/vxge/vxge-main.c</a></div><div class='hunk'>@@ -1882,25 +1882,24 @@ static int vxge_poll_inta(struct napi_struct *napi, int budget)</div><div class='ctx'>  */</div><div class='ctx'> static void vxge_netpoll(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct __vxge_hw_device *hldev;</div><div class='del'>-	struct vxgedev *vdev;</div><div class='del'>-</div><div class='del'>-	vdev = netdev_priv(dev);</div><div class='del'>-	hldev = pci_get_drvdata(vdev-&gt;pdev);</div><div class='add'>+	struct vxgedev *vdev = netdev_priv(dev);</div><div class='add'>+	struct pci_dev *pdev = vdev-&gt;pdev;</div><div class='add'>+	struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);</div><div class='add'>+	const int irq = pdev-&gt;irq;</div><div class='ctx'> </div><div class='ctx'> 	vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);</div><div class='ctx'> </div><div class='del'>-	if (pci_channel_offline(vdev-&gt;pdev))</div><div class='add'>+	if (pci_channel_offline(pdev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='add'>+	disable_irq(irq);</div><div class='ctx'> 	vxge_hw_device_clear_tx_rx(hldev);</div><div class='ctx'> </div><div class='ctx'> 	vxge_hw_device_clear_tx_rx(hldev);</div><div class='ctx'> 	VXGE_COMPLETE_ALL_RX(vdev);</div><div class='ctx'> 	VXGE_COMPLETE_ALL_TX(vdev);</div><div class='ctx'> </div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> </div><div class='ctx'> 	vxge_debug_entryexit(VXGE_TRACE,</div><div class='ctx'> 		"%s:%d  Exiting...", __func__, __LINE__);</div><div class='hunk'>@@ -2860,12 +2859,12 @@ static int vxge_open(struct net_device *dev)</div><div class='ctx'> 		vdev-&gt;config.rx_pause_enable);</div><div class='ctx'> </div><div class='ctx'> 	if (vdev-&gt;vp_reset_timer.function == NULL)</div><div class='del'>-		vxge_os_timer(vdev-&gt;vp_reset_timer,</div><div class='del'>-			vxge_poll_vp_reset, vdev, (HZ/2));</div><div class='add'>+		vxge_os_timer(&amp;vdev-&gt;vp_reset_timer, vxge_poll_vp_reset, vdev,</div><div class='add'>+			      HZ / 2);</div><div class='ctx'> </div><div class='ctx'> 	/* There is no need to check for RxD leak and RxD lookup on Titan1A */</div><div class='ctx'> 	if (vdev-&gt;titan1 &amp;&amp; vdev-&gt;vp_lockup_timer.function == NULL)</div><div class='del'>-		vxge_os_timer(vdev-&gt;vp_lockup_timer, vxge_poll_vp_lockup, vdev,</div><div class='add'>+		vxge_os_timer(&amp;vdev-&gt;vp_lockup_timer, vxge_poll_vp_lockup, vdev,</div><div class='ctx'> 			      HZ / 2);</div><div class='ctx'> </div><div class='ctx'> 	set_bit(__VXGE_STATE_CARD_UP, &amp;vdev-&gt;state);</div><div class='hunk'>@@ -3424,9 +3423,6 @@ static int __devinit vxge_device_register(struct __vxge_hw_device *hldev,</div><div class='ctx'> 	ndev-&gt;features |= ndev-&gt;hw_features |</div><div class='ctx'> 		NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;</div><div class='ctx'> </div><div class='del'>-	/*  Driver entry points */</div><div class='del'>-	ndev-&gt;irq = vdev-&gt;pdev-&gt;irq;</div><div class='del'>-	ndev-&gt;base_addr = (unsigned long) hldev-&gt;bar0;</div><div class='ctx'> </div><div class='ctx'> 	ndev-&gt;netdev_ops = &amp;vxge_netdev_ops;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/neterion/vxge/vxge-main.h b/drivers/net/ethernet/neterion/vxge/vxge-main.h<br/>index f52a42d1dbb7..35f3e7552ec2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/neterion/vxge/vxge-main.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/neterion/vxge/vxge-main.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/neterion/vxge/vxge-main.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/neterion/vxge/vxge-main.h</a></div><div class='hunk'>@@ -416,12 +416,15 @@ struct vxge_tx_priv {</div><div class='ctx'> 	static int p = val; \</div><div class='ctx'> 	module_param(p, int, 0)</div><div class='ctx'> </div><div class='del'>-#define vxge_os_timer(timer, handle, arg, exp) do { \</div><div class='del'>-		init_timer(&amp;timer); \</div><div class='del'>-		timer.function = handle; \</div><div class='del'>-		timer.data = (unsigned long) arg; \</div><div class='del'>-		mod_timer(&amp;timer, (jiffies + exp)); \</div><div class='del'>-	} while (0);</div><div class='add'>+static inline</div><div class='add'>+void vxge_os_timer(struct timer_list *timer, void (*func)(unsigned long data),</div><div class='add'>+		   struct vxgedev *vdev, unsigned long timeout)</div><div class='add'>+{</div><div class='add'>+	init_timer(timer);</div><div class='add'>+	timer-&gt;function = func;</div><div class='add'>+	timer-&gt;data = (unsigned long)vdev;</div><div class='add'>+	mod_timer(timer, jiffies + timeout);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> void vxge_initialize_ethtool_ops(struct net_device *ndev);</div><div class='ctx'> enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);</div><div class='head'>diff --git a/drivers/net/ethernet/nvidia/forcedeth.c b/drivers/net/ethernet/nvidia/forcedeth.c<br/>index aca13046e432..928913c4f3ff 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/nvidia/forcedeth.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/nvidia/forcedeth.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/nvidia/forcedeth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/nvidia/forcedeth.c</a></div><div class='hunk'>@@ -2279,6 +2279,8 @@ static netdev_tx_t nv_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	netdev_sent_queue(np-&gt;dev, skb-&gt;len);</div><div class='ctx'> </div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='ctx'> 	np-&gt;put_tx.orig = put_tx;</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;np-&gt;lock, flags);</div><div class='hunk'>@@ -2426,6 +2428,8 @@ static netdev_tx_t nv_start_xmit_optimized(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	netdev_sent_queue(np-&gt;dev, skb-&gt;len);</div><div class='ctx'> </div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='ctx'> 	np-&gt;put_tx.ex = put_tx;</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;np-&gt;lock, flags);</div><div class='hunk'>@@ -3942,13 +3946,11 @@ static int nv_request_irq(struct net_device *dev, int intr_test)</div><div class='ctx'> 		ret = pci_enable_msi(np-&gt;pci_dev);</div><div class='ctx'> 		if (ret == 0) {</div><div class='ctx'> 			np-&gt;msi_flags |= NV_MSI_ENABLED;</div><div class='del'>-			dev-&gt;irq = np-&gt;pci_dev-&gt;irq;</div><div class='ctx'> 			if (request_irq(np-&gt;pci_dev-&gt;irq, handler, IRQF_SHARED, dev-&gt;name, dev) != 0) {</div><div class='ctx'> 				netdev_info(dev, "request_irq failed %d\n",</div><div class='ctx'> 					    ret);</div><div class='ctx'> 				pci_disable_msi(np-&gt;pci_dev);</div><div class='ctx'> 				np-&gt;msi_flags &amp;= ~NV_MSI_ENABLED;</div><div class='del'>-				dev-&gt;irq = np-&gt;pci_dev-&gt;irq;</div><div class='ctx'> 				goto out_err;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -5649,9 +5651,6 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i</div><div class='ctx'> 	np-&gt;base = ioremap(addr, np-&gt;register_size);</div><div class='ctx'> 	if (!np-&gt;base)</div><div class='ctx'> 		goto out_relreg;</div><div class='del'>-	dev-&gt;base_addr = (unsigned long)np-&gt;base;</div><div class='del'>-</div><div class='del'>-	dev-&gt;irq = pci_dev-&gt;irq;</div><div class='ctx'> </div><div class='ctx'> 	np-&gt;rx_ring_size = RX_RING_DEFAULT;</div><div class='ctx'> 	np-&gt;tx_ring_size = TX_RING_DEFAULT;</div><div class='head'>diff --git a/drivers/net/ethernet/nxp/lpc_eth.c b/drivers/net/ethernet/nxp/lpc_eth.c<br/>index 6dfc26d85e47..8d2666fcffd7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/nxp/lpc_eth.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/nxp/lpc_eth.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/nxp/lpc_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/nxp/lpc_eth.c</a></div><div class='hunk'>@@ -40,6 +40,7 @@</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -340,13 +341,17 @@</div><div class='ctx'>  */</div><div class='ctx'> #define LPC_POWERDOWN_MACAHB			(1 &lt;&lt; 31)</div><div class='ctx'> </div><div class='del'>-/* Upon the upcoming introduction of device tree usage in LPC32xx,</div><div class='del'>- * lpc_phy_interface_mode() and use_iram_for_net() will be extended with a</div><div class='del'>- * device parameter for access to device tree information at runtime, instead</div><div class='del'>- * of defining the values at compile time</div><div class='del'>- */</div><div class='del'>-static inline phy_interface_t lpc_phy_interface_mode(void)</div><div class='add'>+static phy_interface_t lpc_phy_interface_mode(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	if (dev &amp;&amp; dev-&gt;of_node) {</div><div class='add'>+		const char *mode = of_get_property(dev-&gt;of_node,</div><div class='add'>+						   "phy-mode", NULL);</div><div class='add'>+		if (mode &amp;&amp; !strcmp(mode, "mii"))</div><div class='add'>+			return PHY_INTERFACE_MODE_MII;</div><div class='add'>+		return PHY_INTERFACE_MODE_RMII;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* non-DT */</div><div class='ctx'> #ifdef CONFIG_ARCH_LPC32XX_MII_SUPPORT</div><div class='ctx'> 	return PHY_INTERFACE_MODE_MII;</div><div class='ctx'> #else</div><div class='hunk'>@@ -354,12 +359,16 @@ static inline phy_interface_t lpc_phy_interface_mode(void)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int use_iram_for_net(void)</div><div class='add'>+static bool use_iram_for_net(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	if (dev &amp;&amp; dev-&gt;of_node)</div><div class='add'>+		return of_property_read_bool(dev-&gt;of_node, "use-iram");</div><div class='add'>+</div><div class='add'>+	/* non-DT */</div><div class='ctx'> #ifdef CONFIG_ARCH_LPC32XX_IRAM_FOR_NET</div><div class='del'>-	return 1;</div><div class='add'>+	return true;</div><div class='ctx'> #else</div><div class='del'>-	return 0;</div><div class='add'>+	return false;</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -664,7 +673,7 @@ static void __lpc_eth_init(struct netdata_local *pldat)</div><div class='ctx'> 	       LPC_ENET_CLRT(pldat-&gt;net_base));</div><div class='ctx'> 	writel(LPC_IPGR_LOAD_PART2(0x12), LPC_ENET_IPGR(pldat-&gt;net_base));</div><div class='ctx'> </div><div class='del'>-	if (lpc_phy_interface_mode() == PHY_INTERFACE_MODE_MII)</div><div class='add'>+	if (lpc_phy_interface_mode(&amp;pldat-&gt;pdev-&gt;dev) == PHY_INTERFACE_MODE_MII)</div><div class='ctx'> 		writel(LPC_COMMAND_PASSRUNTFRAME,</div><div class='ctx'> 		       LPC_ENET_COMMAND(pldat-&gt;net_base));</div><div class='ctx'> 	else {</div><div class='hunk'>@@ -804,12 +813,13 @@ static int lpc_mii_probe(struct net_device *ndev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Attach to the PHY */</div><div class='del'>-	if (lpc_phy_interface_mode() == PHY_INTERFACE_MODE_MII)</div><div class='add'>+	if (lpc_phy_interface_mode(&amp;pldat-&gt;pdev-&gt;dev) == PHY_INTERFACE_MODE_MII)</div><div class='ctx'> 		netdev_info(ndev, "using MII interface\n");</div><div class='ctx'> 	else</div><div class='ctx'> 		netdev_info(ndev, "using RMII interface\n");</div><div class='ctx'> 	phydev = phy_connect(ndev, dev_name(&amp;phydev-&gt;dev),</div><div class='del'>-		&amp;lpc_handle_link_change, 0, lpc_phy_interface_mode());</div><div class='add'>+			     &amp;lpc_handle_link_change, 0,</div><div class='add'>+			     lpc_phy_interface_mode(&amp;pldat-&gt;pdev-&gt;dev));</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(phydev)) {</div><div class='ctx'> 		netdev_err(ndev, "Could not attach to PHY\n");</div><div class='hunk'>@@ -843,7 +853,7 @@ static int lpc_mii_init(struct netdata_local *pldat)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Setup MII mode */</div><div class='del'>-	if (lpc_phy_interface_mode() == PHY_INTERFACE_MODE_MII)</div><div class='add'>+	if (lpc_phy_interface_mode(&amp;pldat-&gt;pdev-&gt;dev) == PHY_INTERFACE_MODE_MII)</div><div class='ctx'> 		writel(LPC_COMMAND_PASSRUNTFRAME,</div><div class='ctx'> 		       LPC_ENET_COMMAND(pldat-&gt;net_base));</div><div class='ctx'> 	else {</div><div class='hunk'>@@ -990,10 +1000,10 @@ static int __lpc_handle_recv(struct net_device *ndev, int budget)</div><div class='ctx'> 			ndev-&gt;stats.rx_errors++;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Packet is good */</div><div class='del'>-			skb = dev_alloc_skb(len + 8);</div><div class='del'>-			if (!skb)</div><div class='add'>+			skb = dev_alloc_skb(len);</div><div class='add'>+			if (!skb) {</div><div class='ctx'> 				ndev-&gt;stats.rx_dropped++;</div><div class='del'>-			else {</div><div class='add'>+			} else {</div><div class='ctx'> 				prdbuf = skb_put(skb, len);</div><div class='ctx'> </div><div class='ctx'> 				/* Copy packet from buffer */</div><div class='hunk'>@@ -1315,18 +1325,26 @@ static const struct net_device_ops lpc_netdev_ops = {</div><div class='ctx'> static int lpc_eth_drv_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct resource *res;</div><div class='del'>-	struct resource *dma_res;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	struct netdata_local *pldat;</div><div class='ctx'> 	struct phy_device *phydev;</div><div class='ctx'> 	dma_addr_t dma_handle;</div><div class='ctx'> 	int irq, ret;</div><div class='add'>+	u32 tmp;</div><div class='add'>+</div><div class='add'>+	/* Setup network interface for RMII or MII mode */</div><div class='add'>+	tmp = __raw_readl(LPC32XX_CLKPWR_MACCLK_CTRL);</div><div class='add'>+	tmp &amp;= ~LPC32XX_CLKPWR_MACCTRL_PINS_MSK;</div><div class='add'>+	if (lpc_phy_interface_mode(&amp;pdev-&gt;dev) == PHY_INTERFACE_MODE_MII)</div><div class='add'>+		tmp |= LPC32XX_CLKPWR_MACCTRL_USE_MII_PINS;</div><div class='add'>+	else</div><div class='add'>+		tmp |= LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS;</div><div class='add'>+	__raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	/* Get platform resources */</div><div class='ctx'> 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	dma_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);</div><div class='ctx'> 	irq = platform_get_irq(pdev, 0);</div><div class='del'>-	if ((!res) || (!dma_res) || (irq &lt; 0) || (irq &gt;= NR_IRQS)) {</div><div class='add'>+	if ((!res) || (irq &lt; 0) || (irq &gt;= NR_IRQS)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "error getting resources.\n");</div><div class='ctx'> 		ret = -ENXIO;</div><div class='ctx'> 		goto err_exit;</div><div class='hunk'>@@ -1389,17 +1407,19 @@ static int lpc_eth_drv_probe(struct platform_device *pdev)</div><div class='ctx'> 		sizeof(struct txrx_desc_t) + sizeof(struct rx_status_t));</div><div class='ctx'> 	pldat-&gt;dma_buff_base_v = 0;</div><div class='ctx'> </div><div class='del'>-	if (use_iram_for_net()) {</div><div class='del'>-		dma_handle = dma_res-&gt;start;</div><div class='add'>+	if (use_iram_for_net(&amp;pldat-&gt;pdev-&gt;dev)) {</div><div class='add'>+		dma_handle = LPC32XX_IRAM_BASE;</div><div class='ctx'> 		if (pldat-&gt;dma_buff_size &lt;= lpc32xx_return_iram_size())</div><div class='ctx'> 			pldat-&gt;dma_buff_base_v =</div><div class='del'>-				io_p2v(dma_res-&gt;start);</div><div class='add'>+				io_p2v(LPC32XX_IRAM_BASE);</div><div class='ctx'> 		else</div><div class='ctx'> 			netdev_err(ndev,</div><div class='ctx'> 				"IRAM not big enough for net buffers, using SDRAM instead.\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pldat-&gt;dma_buff_base_v == 0) {</div><div class='add'>+		pldat-&gt;pdev-&gt;dev.coherent_dma_mask = 0xFFFFFFFF;</div><div class='add'>+		pldat-&gt;pdev-&gt;dev.dma_mask = &amp;pldat-&gt;pdev-&gt;dev.coherent_dma_mask;</div><div class='ctx'> 		pldat-&gt;dma_buff_size = PAGE_ALIGN(pldat-&gt;dma_buff_size);</div><div class='ctx'> </div><div class='ctx'> 		/* Allocate a chunk of memory for the DMA ethernet buffers</div><div class='hunk'>@@ -1488,7 +1508,7 @@ err_out_unregister_netdev:</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> 	unregister_netdev(ndev);</div><div class='ctx'> err_out_dma_unmap:</div><div class='del'>-	if (!use_iram_for_net() ||</div><div class='add'>+	if (!use_iram_for_net(&amp;pldat-&gt;pdev-&gt;dev) ||</div><div class='ctx'> 	    pldat-&gt;dma_buff_size &gt; lpc32xx_return_iram_size())</div><div class='ctx'> 		dma_free_coherent(&amp;pldat-&gt;pdev-&gt;dev, pldat-&gt;dma_buff_size,</div><div class='ctx'> 				  pldat-&gt;dma_buff_base_v,</div><div class='hunk'>@@ -1515,7 +1535,7 @@ static int lpc_eth_drv_remove(struct platform_device *pdev)</div><div class='ctx'> 	unregister_netdev(ndev);</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='del'>-	if (!use_iram_for_net() ||</div><div class='add'>+	if (!use_iram_for_net(&amp;pldat-&gt;pdev-&gt;dev) ||</div><div class='ctx'> 	    pldat-&gt;dma_buff_size &gt; lpc32xx_return_iram_size())</div><div class='ctx'> 		dma_free_coherent(&amp;pldat-&gt;pdev-&gt;dev, pldat-&gt;dma_buff_size,</div><div class='ctx'> 				  pldat-&gt;dma_buff_base_v,</div><div class='hunk'>@@ -1584,6 +1604,14 @@ static int lpc_eth_drv_resume(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static const struct of_device_id lpc_eth_match[] = {</div><div class='add'>+	{ .compatible = "nxp,lpc-eth" },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, lpc_eth_match);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct platform_driver lpc_eth_driver = {</div><div class='ctx'> 	.probe		= lpc_eth_drv_probe,</div><div class='ctx'> 	.remove		= __devexit_p(lpc_eth_drv_remove),</div><div class='hunk'>@@ -1593,6 +1621,7 @@ static struct platform_driver lpc_eth_driver = {</div><div class='ctx'> #endif</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= MODNAME,</div><div class='add'>+		.of_match_table = of_match_ptr(lpc_eth_match),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h<br/>index dd14915f54bb..b07311eaa693 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h</a></div><div class='hunk'>@@ -584,7 +584,6 @@ struct pch_gbe_hw_stats {</div><div class='ctx'> /**</div><div class='ctx'>  * struct pch_gbe_adapter - board specific private data structure</div><div class='ctx'>  * @stats_lock:	Spinlock structure for status</div><div class='del'>- * @tx_queue_lock:	Spinlock structure for transmit</div><div class='ctx'>  * @ethtool_lock:	Spinlock structure for ethtool</div><div class='ctx'>  * @irq_sem:		Semaphore for interrupt</div><div class='ctx'>  * @netdev:		Pointer of network device structure</div><div class='hunk'>@@ -609,7 +608,6 @@ struct pch_gbe_hw_stats {</div><div class='ctx'> </div><div class='ctx'> struct pch_gbe_adapter {</div><div class='ctx'> 	spinlock_t stats_lock;</div><div class='del'>-	spinlock_t tx_queue_lock;</div><div class='ctx'> 	spinlock_t ethtool_lock;</div><div class='ctx'> 	atomic_t irq_sem;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='hunk'>@@ -660,6 +658,7 @@ extern u32 pch_src_uuid_lo_read(struct pci_dev *pdev);</div><div class='ctx'> extern u32 pch_src_uuid_hi_read(struct pci_dev *pdev);</div><div class='ctx'> extern u64 pch_rx_snap_read(struct pci_dev *pdev);</div><div class='ctx'> extern u64 pch_tx_snap_read(struct pci_dev *pdev);</div><div class='add'>+extern int pch_set_station_address(u8 *addr, struct pci_dev *pdev);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* pch_gbe_param.c */</div><div class='head'>diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c<br/>index 8035e5ff6e06..3787c64ee71c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c</a></div><div class='hunk'>@@ -79,7 +79,6 @@ const char pch_driver_version[] = DRV_VERSION;</div><div class='ctx'> #define	PCH_GBE_PAUSE_PKT4_VALUE    0x01000888</div><div class='ctx'> #define	PCH_GBE_PAUSE_PKT5_VALUE    0x0000FFFF</div><div class='ctx'> </div><div class='del'>-#define PCH_GBE_ETH_ALEN            6</div><div class='ctx'> </div><div class='ctx'> /* This defines the bits that are set in the Interrupt Mask</div><div class='ctx'>  * Set/Read Register.  Each bit is documented below:</div><div class='hunk'>@@ -101,18 +100,19 @@ const char pch_driver_version[] = DRV_VERSION;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCH_PTP</div><div class='ctx'> /* Macros for ieee1588 */</div><div class='del'>-#define TICKS_NS_SHIFT  5</div><div class='del'>-</div><div class='ctx'> /* 0x40 Time Synchronization Channel Control Register Bits */</div><div class='ctx'> #define MASTER_MODE   (1&lt;&lt;0)</div><div class='del'>-#define SLAVE_MODE    (0&lt;&lt;0)</div><div class='add'>+#define SLAVE_MODE    (0)</div><div class='ctx'> #define V2_MODE       (1&lt;&lt;31)</div><div class='del'>-#define CAP_MODE0     (0&lt;&lt;16)</div><div class='add'>+#define CAP_MODE0     (0)</div><div class='ctx'> #define CAP_MODE2     (1&lt;&lt;17)</div><div class='ctx'> </div><div class='ctx'> /* 0x44 Time Synchronization Channel Event Register Bits */</div><div class='ctx'> #define TX_SNAPSHOT_LOCKED (1&lt;&lt;0)</div><div class='ctx'> #define RX_SNAPSHOT_LOCKED (1&lt;&lt;1)</div><div class='add'>+</div><div class='add'>+#define PTP_L4_MULTICAST_SA "01:00:5e:00:01:81"</div><div class='add'>+#define PTP_L2_MULTICAST_SA "01:1b:19:00:00:00"</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static unsigned int copybreak __read_mostly = PCH_GBE_COPYBREAK_DEFAULT;</div><div class='hunk'>@@ -120,6 +120,7 @@ static unsigned int copybreak __read_mostly = PCH_GBE_COPYBREAK_DEFAULT;</div><div class='ctx'> static int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg);</div><div class='ctx'> static void pch_gbe_mdio_write(struct net_device *netdev, int addr, int reg,</div><div class='ctx'> 			       int data);</div><div class='add'>+static void pch_gbe_set_multi(struct net_device *netdev);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCH_PTP</div><div class='ctx'> static struct sock_filter ptp_filter[] = {</div><div class='hunk'>@@ -133,10 +134,8 @@ static int pch_ptp_match(struct sk_buff *skb, u16 uid_hi, u32 uid_lo, u16 seqid)</div><div class='ctx'> 	u16 *hi, *id;</div><div class='ctx'> 	u32 lo;</div><div class='ctx'> </div><div class='del'>-	if ((sk_run_filter(skb, ptp_filter) != PTP_CLASS_V2_IPV4) &amp;&amp;</div><div class='del'>-		(sk_run_filter(skb, ptp_filter) != PTP_CLASS_V1_IPV4)) {</div><div class='add'>+	if (sk_run_filter(skb, ptp_filter) == PTP_CLASS_NONE)</div><div class='ctx'> 		return 0;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	offset = ETH_HLEN + IPV4_HLEN(data) + UDP_HLEN;</div><div class='ctx'> </div><div class='hunk'>@@ -153,8 +152,8 @@ static int pch_ptp_match(struct sk_buff *skb, u16 uid_hi, u32 uid_lo, u16 seqid)</div><div class='ctx'> 		seqid  == *id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pch_rx_timestamp(</div><div class='del'>-			struct pch_gbe_adapter *adapter, struct sk_buff *skb)</div><div class='add'>+static void</div><div class='add'>+pch_rx_timestamp(struct pch_gbe_adapter *adapter, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct skb_shared_hwtstamps *shhwtstamps;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='hunk'>@@ -183,7 +182,6 @@ static void pch_rx_timestamp(</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ns = pch_rx_snap_read(pdev);</div><div class='del'>-	ns &lt;&lt;= TICKS_NS_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	shhwtstamps = skb_hwtstamps(skb);</div><div class='ctx'> 	memset(shhwtstamps, 0, sizeof(*shhwtstamps));</div><div class='hunk'>@@ -192,8 +190,8 @@ out:</div><div class='ctx'> 	pch_ch_event_write(pdev, RX_SNAPSHOT_LOCKED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pch_tx_timestamp(</div><div class='del'>-			struct pch_gbe_adapter *adapter, struct sk_buff *skb)</div><div class='add'>+static void</div><div class='add'>+pch_tx_timestamp(struct pch_gbe_adapter *adapter, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct skb_shared_hwtstamps shhwtstamps;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='hunk'>@@ -202,17 +200,16 @@ static void pch_tx_timestamp(</div><div class='ctx'> 	u32 cnt, val;</div><div class='ctx'> </div><div class='ctx'> 	shtx = skb_shinfo(skb);</div><div class='del'>-	if (unlikely(shtx-&gt;tx_flags &amp; SKBTX_HW_TSTAMP &amp;&amp; adapter-&gt;hwts_tx_en))</div><div class='del'>-		shtx-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='del'>-	else</div><div class='add'>+	if (likely(!(shtx-&gt;tx_flags &amp; SKBTX_HW_TSTAMP &amp;&amp; adapter-&gt;hwts_tx_en)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	shtx-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+</div><div class='ctx'> 	/* Get ieee1588's dev information */</div><div class='ctx'> 	pdev = adapter-&gt;ptp_pdev;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This really stinks, but we have to poll for the Tx time stamp.</div><div class='del'>-	 * Usually, the time stamp is ready after 4 to 6 microseconds.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (cnt = 0; cnt &lt; 100; cnt++) {</div><div class='ctx'> 		val = pch_ch_event_read(pdev);</div><div class='hunk'>@@ -226,7 +223,6 @@ static void pch_tx_timestamp(</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ns = pch_tx_snap_read(pdev);</div><div class='del'>-	ns &lt;&lt;= TICKS_NS_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;shhwtstamps, 0, sizeof(shhwtstamps));</div><div class='ctx'> 	shhwtstamps.hwtstamp = ns_to_ktime(ns);</div><div class='hunk'>@@ -240,6 +236,7 @@ static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='ctx'> 	struct hwtstamp_config cfg;</div><div class='ctx'> 	struct pch_gbe_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='add'>+	u8 station[20];</div><div class='ctx'> </div><div class='ctx'> 	if (copy_from_user(&amp;cfg, ifr-&gt;ifr_data, sizeof(cfg)))</div><div class='ctx'> 		return -EFAULT;</div><div class='hunk'>@@ -267,15 +264,23 @@ static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='ctx'> 		adapter-&gt;hwts_rx_en = 0;</div><div class='del'>-		pch_ch_control_write(pdev, (SLAVE_MODE | CAP_MODE0));</div><div class='add'>+		pch_ch_control_write(pdev, SLAVE_MODE | CAP_MODE0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='ctx'> 		adapter-&gt;hwts_rx_en = 1;</div><div class='del'>-		pch_ch_control_write(pdev, (MASTER_MODE | CAP_MODE0));</div><div class='add'>+		pch_ch_control_write(pdev, MASTER_MODE | CAP_MODE0);</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='add'>+		adapter-&gt;hwts_rx_en = 1;</div><div class='add'>+		pch_ch_control_write(pdev, V2_MODE | CAP_MODE2);</div><div class='add'>+		strcpy(station, PTP_L4_MULTICAST_SA);</div><div class='add'>+		pch_set_station_address(station, pdev);</div><div class='ctx'> 		break;</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='ctx'> 		adapter-&gt;hwts_rx_en = 1;</div><div class='del'>-		pch_ch_control_write(pdev, (V2_MODE | CAP_MODE2));</div><div class='add'>+		pch_ch_control_write(pdev, V2_MODE | CAP_MODE2);</div><div class='add'>+		strcpy(station, PTP_L2_MULTICAST_SA);</div><div class='add'>+		pch_set_station_address(station, pdev);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='hunk'>@@ -399,18 +404,18 @@ static void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw)</div><div class='ctx'> 	iowrite32(PCH_GBE_MODE_GMII_ETHER, &amp;hw-&gt;reg-&gt;MODE);</div><div class='ctx'> #endif</div><div class='ctx'> 	pch_gbe_wait_clr_bit(&amp;hw-&gt;reg-&gt;RESET, PCH_GBE_ALL_RST);</div><div class='del'>-	/* Setup the receive address */</div><div class='add'>+	/* Setup the receive addresses */</div><div class='ctx'> 	pch_gbe_mac_mar_set(hw, hw-&gt;mac.addr, 0);</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pch_gbe_mac_reset_rx(struct pch_gbe_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	/* Read the MAC address. and store to the private data */</div><div class='add'>+	/* Read the MAC addresses. and store to the private data */</div><div class='ctx'> 	pch_gbe_mac_read_mac_addr(hw);</div><div class='ctx'> 	iowrite32(PCH_GBE_RX_RST, &amp;hw-&gt;reg-&gt;RESET);</div><div class='ctx'> 	pch_gbe_wait_clr_bit_irq(&amp;hw-&gt;reg-&gt;RESET, PCH_GBE_RX_RST);</div><div class='del'>-	/* Setup the MAC address */</div><div class='add'>+	/* Setup the MAC addresses */</div><div class='ctx'> 	pch_gbe_mac_mar_set(hw, hw-&gt;mac.addr, 0);</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='hunk'>@@ -460,7 +465,7 @@ static void pch_gbe_mac_mc_addr_list_update(struct pch_gbe_hw *hw,</div><div class='ctx'> 		if (mc_addr_count) {</div><div class='ctx'> 			pch_gbe_mac_mar_set(hw, mc_addr_list, i);</div><div class='ctx'> 			mc_addr_count--;</div><div class='del'>-			mc_addr_list += PCH_GBE_ETH_ALEN;</div><div class='add'>+			mc_addr_list += ETH_ALEN;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Clear MAC address mask */</div><div class='ctx'> 			adrmask = ioread32(&amp;hw-&gt;reg-&gt;ADDR_MASK);</div><div class='hunk'>@@ -640,14 +645,11 @@ static void pch_gbe_mac_set_pause_packet(struct pch_gbe_hw *hw)</div><div class='ctx'>  */</div><div class='ctx'> static int pch_gbe_alloc_queues(struct pch_gbe_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	int size;</div><div class='del'>-</div><div class='del'>-	size = (int)sizeof(struct pch_gbe_tx_ring);</div><div class='del'>-	adapter-&gt;tx_ring = kzalloc(size, GFP_KERNEL);</div><div class='add'>+	adapter-&gt;tx_ring = kzalloc(sizeof(*adapter-&gt;tx_ring), GFP_KERNEL);</div><div class='ctx'> 	if (!adapter-&gt;tx_ring)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	size = (int)sizeof(struct pch_gbe_rx_ring);</div><div class='del'>-	adapter-&gt;rx_ring = kzalloc(size, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;rx_ring = kzalloc(sizeof(*adapter-&gt;rx_ring), GFP_KERNEL);</div><div class='ctx'> 	if (!adapter-&gt;rx_ring) {</div><div class='ctx'> 		kfree(adapter-&gt;tx_ring);</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -778,6 +780,8 @@ void pch_gbe_reinit_locked(struct pch_gbe_adapter *adapter)</div><div class='ctx'> void pch_gbe_reset(struct pch_gbe_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	pch_gbe_mac_reset_hw(&amp;adapter-&gt;hw);</div><div class='add'>+	/* reprogram multicast address register after reset */</div><div class='add'>+	pch_gbe_set_multi(adapter-&gt;netdev);</div><div class='ctx'> 	/* Setup the receive address. */</div><div class='ctx'> 	pch_gbe_mac_init_rx_addrs(&amp;adapter-&gt;hw, PCH_GBE_MAR_ENTRIES);</div><div class='ctx'> 	if (pch_gbe_hal_init_hw(&amp;adapter-&gt;hw))</div><div class='hunk'>@@ -1162,7 +1166,6 @@ static void pch_gbe_tx_queue(struct pch_gbe_adapter *adapter,</div><div class='ctx'> 	struct sk_buff *tmp_skb;</div><div class='ctx'> 	unsigned int frame_ctrl;</div><div class='ctx'> 	unsigned int ring_num;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	/*-- Set frame control --*/</div><div class='ctx'> 	frame_ctrl = 0;</div><div class='hunk'>@@ -1182,8 +1185,6 @@ static void pch_gbe_tx_queue(struct pch_gbe_adapter *adapter,</div><div class='ctx'> 		if (skb-&gt;protocol == htons(ETH_P_IP)) {</div><div class='ctx'> 			struct iphdr *iph = ip_hdr(skb);</div><div class='ctx'> 			unsigned int offset;</div><div class='del'>-			iph-&gt;check = 0;</div><div class='del'>-			iph-&gt;check = ip_fast_csum((u8 *) iph, iph-&gt;ihl);</div><div class='ctx'> 			offset = skb_transport_offset(skb);</div><div class='ctx'> 			if (iph-&gt;protocol == IPPROTO_TCP) {</div><div class='ctx'> 				skb-&gt;csum = 0;</div><div class='hunk'>@@ -1211,14 +1212,14 @@ static void pch_gbe_tx_queue(struct pch_gbe_adapter *adapter,</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	spin_lock_irqsave(&amp;tx_ring-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='ctx'> 	ring_num = tx_ring-&gt;next_to_use;</div><div class='ctx'> 	if (unlikely((ring_num + 1) == tx_ring-&gt;count))</div><div class='ctx'> 		tx_ring-&gt;next_to_use = 0;</div><div class='ctx'> 	else</div><div class='ctx'> 		tx_ring-&gt;next_to_use = ring_num + 1;</div><div class='ctx'> </div><div class='del'>-	spin_unlock_irqrestore(&amp;tx_ring-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='ctx'> 	buffer_info = &amp;tx_ring-&gt;buffer_info[ring_num];</div><div class='ctx'> 	tmp_skb = buffer_info-&gt;skb;</div><div class='ctx'> </div><div class='hunk'>@@ -1342,6 +1343,8 @@ static void pch_gbe_stop_receive(struct pch_gbe_adapter *adapter)</div><div class='ctx'> 		/* Stop Receive */</div><div class='ctx'> 		pch_gbe_mac_reset_rx(hw);</div><div class='ctx'> 	}</div><div class='add'>+	/* reprogram multicast address register after reset */</div><div class='add'>+	pch_gbe_set_multi(adapter-&gt;netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pch_gbe_start_receive(struct pch_gbe_hw *hw)</div><div class='hunk'>@@ -1518,7 +1521,7 @@ pch_gbe_alloc_rx_buffers_pool(struct pch_gbe_adapter *adapter,</div><div class='ctx'> 						&amp;rx_ring-&gt;rx_buff_pool_logic,</div><div class='ctx'> 						GFP_KERNEL);</div><div class='ctx'> 	if (!rx_ring-&gt;rx_buff_pool) {</div><div class='del'>-		pr_err("Unable to allocate memory for the receive poll buffer\n");</div><div class='add'>+		pr_err("Unable to allocate memory for the receive pool buffer\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	memset(rx_ring-&gt;rx_buff_pool, 0, size);</div><div class='hunk'>@@ -1637,15 +1640,17 @@ pch_gbe_clean_tx(struct pch_gbe_adapter *adapter,</div><div class='ctx'> 	pr_debug("called pch_gbe_unmap_and_free_tx_resource() %d count\n",</div><div class='ctx'> 		 cleaned_count);</div><div class='ctx'> 	/* Recover from running out of Tx resources in xmit_frame */</div><div class='add'>+	spin_lock(&amp;tx_ring-&gt;tx_lock);</div><div class='ctx'> 	if (unlikely(cleaned &amp;&amp; (netif_queue_stopped(adapter-&gt;netdev)))) {</div><div class='ctx'> 		netif_wake_queue(adapter-&gt;netdev);</div><div class='ctx'> 		adapter-&gt;stats.tx_restart_count++;</div><div class='ctx'> 		pr_debug("Tx wake queue\n");</div><div class='ctx'> 	}</div><div class='del'>-	spin_lock(&amp;adapter-&gt;tx_queue_lock);</div><div class='add'>+</div><div class='ctx'> 	tx_ring-&gt;next_to_clean = i;</div><div class='del'>-	spin_unlock(&amp;adapter-&gt;tx_queue_lock);</div><div class='add'>+</div><div class='ctx'> 	pr_debug("next_to_clean : %d\n", tx_ring-&gt;next_to_clean);</div><div class='add'>+	spin_unlock(&amp;tx_ring-&gt;tx_lock);</div><div class='ctx'> 	return cleaned;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1924,7 +1929,6 @@ static int pch_gbe_request_irq(struct pch_gbe_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static void pch_gbe_set_multi(struct net_device *netdev);</div><div class='ctx'> /**</div><div class='ctx'>  * pch_gbe_up - Up GbE network device</div><div class='ctx'>  * @adapter:  Board private structure</div><div class='hunk'>@@ -2037,7 +2041,6 @@ static int pch_gbe_sw_init(struct pch_gbe_adapter *adapter)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;hw.miim_lock);</div><div class='del'>-	spin_lock_init(&amp;adapter-&gt;tx_queue_lock);</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;stats_lock);</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;ethtool_lock);</div><div class='ctx'> 	atomic_set(&amp;adapter-&gt;irq_sem, 0);</div><div class='hunk'>@@ -2142,10 +2145,10 @@ static int pch_gbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 			 tx_ring-&gt;next_to_use, tx_ring-&gt;next_to_clean);</div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;tx_ring-&gt;tx_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* CRC,ITAG no support */</div><div class='ctx'> 	pch_gbe_tx_queue(adapter, tx_ring, skb);</div><div class='add'>+	spin_unlock_irqrestore(&amp;tx_ring-&gt;tx_lock, flags);</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/packetengines/hamachi.c b/drivers/net/ethernet/packetengines/hamachi.c<br/>index 0d29f5f4b8e4..c2367158350e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/packetengines/hamachi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/packetengines/hamachi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/packetengines/hamachi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/packetengines/hamachi.c</a></div><div class='hunk'>@@ -683,8 +683,6 @@ static int __devinit hamachi_init_one (struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	hmp-&gt;base = ioaddr;</div><div class='del'>-	dev-&gt;base_addr = (unsigned long)ioaddr;</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='ctx'> 	pci_set_drvdata(pdev, dev);</div><div class='ctx'> </div><div class='ctx'> 	hmp-&gt;chip_id = chip_id;</div><div class='hunk'>@@ -859,14 +857,11 @@ static int hamachi_open(struct net_device *dev)</div><div class='ctx'> 	u32 rx_int_var, tx_int_var;</div><div class='ctx'> 	u16 fifo_info;</div><div class='ctx'> </div><div class='del'>-	i = request_irq(dev-&gt;irq, hamachi_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	i = request_irq(hmp-&gt;pci_dev-&gt;irq, hamachi_interrupt, IRQF_SHARED,</div><div class='add'>+			dev-&gt;name, dev);</div><div class='ctx'> 	if (i)</div><div class='ctx'> 		return i;</div><div class='ctx'> </div><div class='del'>-	if (hamachi_debug &gt; 1)</div><div class='del'>-		printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",</div><div class='del'>-			   dev-&gt;name, dev-&gt;irq);</div><div class='del'>-</div><div class='ctx'> 	hamachi_init_ring(dev);</div><div class='ctx'> </div><div class='ctx'> #if ADDRLEN == 64</div><div class='hunk'>@@ -1705,7 +1700,7 @@ static int hamachi_close(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* __i386__ debugging only */</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(hmp-&gt;pci_dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	del_timer_sync(&amp;hmp-&gt;timer);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/packetengines/yellowfin.c b/drivers/net/ethernet/packetengines/yellowfin.c<br/>index 7757b80ef924..04e622fd468d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/packetengines/yellowfin.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/packetengines/yellowfin.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/packetengines/yellowfin.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/packetengines/yellowfin.c</a></div><div class='hunk'>@@ -427,9 +427,6 @@ static int __devinit yellowfin_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	/* Reset the chip. */</div><div class='ctx'> 	iowrite32(0x80000000, ioaddr + DMACtrl);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = (unsigned long)ioaddr;</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-</div><div class='ctx'> 	pci_set_drvdata(pdev, dev);</div><div class='ctx'> 	spin_lock_init(&amp;np-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -569,25 +566,20 @@ static void mdio_write(void __iomem *ioaddr, int phy_id, int location, int value</div><div class='ctx'> static int yellowfin_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct yellowfin_private *yp = netdev_priv(dev);</div><div class='add'>+	const int irq = yp-&gt;pci_dev-&gt;irq;</div><div class='ctx'> 	void __iomem *ioaddr = yp-&gt;base;</div><div class='del'>-	int i, ret;</div><div class='add'>+	int i, rc;</div><div class='ctx'> </div><div class='ctx'> 	/* Reset the chip. */</div><div class='ctx'> 	iowrite32(0x80000000, ioaddr + DMACtrl);</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(dev-&gt;irq, yellowfin_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (yellowfin_debug &gt; 1)</div><div class='del'>-		netdev_printk(KERN_DEBUG, dev, "%s() irq %d\n",</div><div class='del'>-			      __func__, dev-&gt;irq);</div><div class='add'>+	rc = request_irq(irq, yellowfin_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='ctx'> </div><div class='del'>-	ret = yellowfin_init_ring(dev);</div><div class='del'>-	if (ret) {</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='add'>+	rc = yellowfin_init_ring(dev);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto err_free_irq;</div><div class='ctx'> </div><div class='ctx'> 	iowrite32(yp-&gt;rx_ring_dma, ioaddr + RxPtr);</div><div class='ctx'> 	iowrite32(yp-&gt;tx_ring_dma, ioaddr + TxPtr);</div><div class='hunk'>@@ -647,8 +639,12 @@ static int yellowfin_open(struct net_device *dev)</div><div class='ctx'> 	yp-&gt;timer.data = (unsigned long)dev;</div><div class='ctx'> 	yp-&gt;timer.function = yellowfin_timer;				/* timer handler */</div><div class='ctx'> 	add_timer(&amp;yp-&gt;timer);</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+err_free_irq:</div><div class='add'>+	free_irq(irq, dev);</div><div class='add'>+	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void yellowfin_timer(unsigned long data)</div><div class='hunk'>@@ -1251,7 +1247,7 @@ static int yellowfin_close(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* __i386__ debugging only */</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(yp-&gt;pci_dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Free all the skbuffs in the Rx queue. */</div><div class='ctx'> 	for (i = 0; i &lt; RX_RING_SIZE; i++) {</div><div class='head'>diff --git a/drivers/net/ethernet/pasemi/pasemi_mac.c b/drivers/net/ethernet/pasemi/pasemi_mac.c<br/>index ddc95b0ac78d..e559dfa06d6a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/pasemi/pasemi_mac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/pasemi/pasemi_mac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/pasemi/pasemi_mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/pasemi/pasemi_mac.c</a></div><div class='hunk'>@@ -623,7 +623,7 @@ static void pasemi_mac_free_rx_resources(struct pasemi_mac *mac)</div><div class='ctx'> 	mac-&gt;rx = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pasemi_mac_replenish_rx_ring(const struct net_device *dev,</div><div class='add'>+static void pasemi_mac_replenish_rx_ring(struct net_device *dev,</div><div class='ctx'> 					 const int limit)</div><div class='ctx'> {</div><div class='ctx'> 	const struct pasemi_mac *mac = netdev_priv(dev);</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/netxen/netxen_nic.h b/drivers/net/ethernet/qlogic/netxen/netxen_nic.h<br/>index b5de8a7b90f1..37ccbe54e62d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/netxen/netxen_nic.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/netxen/netxen_nic.h</a></div><div class='hunk'>@@ -53,8 +53,8 @@</div><div class='ctx'> </div><div class='ctx'> #define _NETXEN_NIC_LINUX_MAJOR 4</div><div class='ctx'> #define _NETXEN_NIC_LINUX_MINOR 0</div><div class='del'>-#define _NETXEN_NIC_LINUX_SUBVERSION 78</div><div class='del'>-#define NETXEN_NIC_LINUX_VERSIONID  "4.0.78"</div><div class='add'>+#define _NETXEN_NIC_LINUX_SUBVERSION 79</div><div class='add'>+#define NETXEN_NIC_LINUX_VERSIONID  "4.0.79"</div><div class='ctx'> </div><div class='ctx'> #define NETXEN_VERSION_CODE(a, b, c)	(((a) &lt;&lt; 24) + ((b) &lt;&lt; 16) + (c))</div><div class='ctx'> #define _major(v)	(((v) &gt;&gt; 24) &amp; 0xff)</div><div class='hunk'>@@ -419,6 +419,8 @@ struct rcv_desc {</div><div class='ctx'> 	(((sts_data) &gt;&gt; 52) &amp; 0x1)</div><div class='ctx'> #define netxen_get_lro_sts_seq_number(sts_data)		\</div><div class='ctx'> 	((sts_data) &amp; 0x0FFFFFFFF)</div><div class='add'>+#define netxen_get_lro_sts_mss(sts_data1)		\</div><div class='add'>+	((sts_data1 &gt;&gt; 32) &amp; 0x0FFFF)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> struct status_desc {</div><div class='hunk'>@@ -794,6 +796,7 @@ struct netxen_cmd_args {</div><div class='ctx'> #define NX_CAP0_JUMBO_CONTIGUOUS	NX_CAP_BIT(0, 7)</div><div class='ctx'> #define NX_CAP0_LRO_CONTIGUOUS		NX_CAP_BIT(0, 8)</div><div class='ctx'> #define NX_CAP0_HW_LRO			NX_CAP_BIT(0, 10)</div><div class='add'>+#define NX_CAP0_HW_LRO_MSS		NX_CAP_BIT(0, 21)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Context state</div><div class='hunk'>@@ -1073,6 +1076,8 @@ typedef struct {</div><div class='ctx'> #define NX_FW_CAPABILITY_FVLANTX		(1 &lt;&lt; 9)</div><div class='ctx'> #define NX_FW_CAPABILITY_HW_LRO			(1 &lt;&lt; 10)</div><div class='ctx'> #define NX_FW_CAPABILITY_GBE_LINK_CFG		(1 &lt;&lt; 11)</div><div class='add'>+#define NX_FW_CAPABILITY_MORE_CAPS		(1 &lt;&lt; 31)</div><div class='add'>+#define NX_FW_CAPABILITY_2_LRO_MAX_TCP_SEG	(1 &lt;&lt; 2)</div><div class='ctx'> </div><div class='ctx'> /* module types */</div><div class='ctx'> #define LINKEVENT_MODULE_NOT_PRESENT			1</div><div class='hunk'>@@ -1155,6 +1160,7 @@ typedef struct {</div><div class='ctx'> #define NETXEN_NIC_BRIDGE_ENABLED       0X10</div><div class='ctx'> #define NETXEN_NIC_DIAG_ENABLED		0x20</div><div class='ctx'> #define NETXEN_FW_RESET_OWNER           0x40</div><div class='add'>+#define NETXEN_FW_MSS_CAP	        0x80</div><div class='ctx'> #define NETXEN_IS_MSI_FAMILY(adapter) \</div><div class='ctx'> 	((adapter)-&gt;flags &amp; (NETXEN_NIC_MSI_ENABLED | NETXEN_NIC_MSIX_ENABLED))</div><div class='ctx'> </div><div class='hunk'>@@ -1201,6 +1207,9 @@ typedef struct {</div><div class='ctx'> #define NX_FORCE_FW_RESET               0xdeaddead</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+/* Fw dump levels */</div><div class='add'>+static const u32 FW_DUMP_LEVELS[] = { 0x3, 0x7, 0xf, 0x1f, 0x3f, 0x7f, 0xff };</div><div class='add'>+</div><div class='ctx'> /* Flash read/write address */</div><div class='ctx'> #define NX_FW_DUMP_REG1         0x00130060</div><div class='ctx'> #define NX_FW_DUMP_REG2         0x001e0000</div><div class='hunk'>@@ -1814,6 +1823,13 @@ struct netxen_brdinfo {</div><div class='ctx'> 	char short_name[NETXEN_MAX_SHORT_NAME];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct netxen_dimm_cfg {</div><div class='add'>+	u8 presence;</div><div class='add'>+	u8 mem_type;</div><div class='add'>+	u8 dimm_type;</div><div class='add'>+	u32 size;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct netxen_brdinfo netxen_boards[] = {</div><div class='ctx'> 	{NETXEN_BRDTYPE_P2_SB31_10G_CX4, 1, "XGb CX4"},</div><div class='ctx'> 	{NETXEN_BRDTYPE_P2_SB31_10G_HMEZ, 1, "XGb HMEZ"},</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c b/drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c<br/>index f3c0057a802b..7f556a84925d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c</a></div><div class='hunk'>@@ -229,7 +229,7 @@ netxen_setup_minidump(struct netxen_adapter *adapter)</div><div class='ctx'> 				adapter-&gt;mdump.md_template;</div><div class='ctx'> 	adapter-&gt;mdump.md_capture_buff = NULL;</div><div class='ctx'> 	adapter-&gt;mdump.fw_supports_md = 1;</div><div class='del'>-	adapter-&gt;mdump.md_enabled = 1;</div><div class='add'>+	adapter-&gt;mdump.md_enabled = 0;</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='hunk'>@@ -328,6 +328,9 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)</div><div class='ctx'> 	cap = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN);</div><div class='ctx'> 	cap |= (NX_CAP0_JUMBO_CONTIGUOUS | NX_CAP0_LRO_CONTIGUOUS);</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;flags &amp; NETXEN_FW_MSS_CAP)</div><div class='add'>+		cap |= NX_CAP0_HW_LRO_MSS;</div><div class='add'>+</div><div class='ctx'> 	prq-&gt;capabilities[0] = cpu_to_le32(cap);</div><div class='ctx'> 	prq-&gt;host_int_crb_mode =</div><div class='ctx'> 		cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/netxen/netxen_nic_ethtool.c b/drivers/net/ethernet/qlogic/netxen/netxen_nic_ethtool.c<br/>index 8c39299331a2..39730403782f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic_ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/netxen/netxen_nic_ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/netxen/netxen_nic_ethtool.c</a></div><div class='hunk'>@@ -834,7 +834,7 @@ netxen_get_dump_flag(struct net_device *netdev, struct ethtool_dump *dump)</div><div class='ctx'> static int</div><div class='ctx'> netxen_set_dump(struct net_device *netdev, struct ethtool_dump *val)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int i;</div><div class='ctx'> 	struct netxen_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct netxen_minidump *mdump = &amp;adapter-&gt;mdump;</div><div class='ctx'> </div><div class='hunk'>@@ -844,7 +844,7 @@ netxen_set_dump(struct net_device *netdev, struct ethtool_dump *val)</div><div class='ctx'> 			mdump-&gt;md_enabled = 1;</div><div class='ctx'> 		if (adapter-&gt;fw_mdump_rdy) {</div><div class='ctx'> 			netdev_info(netdev, "Previous dump not cleared, not forcing dump\n");</div><div class='del'>-			return ret;</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		netdev_info(netdev, "Forcing a fw dump\n");</div><div class='ctx'> 		nx_dev_request_reset(adapter);</div><div class='hunk'>@@ -867,19 +867,21 @@ netxen_set_dump(struct net_device *netdev, struct ethtool_dump *val)</div><div class='ctx'> 		adapter-&gt;flags &amp;= ~NETXEN_FW_RESET_OWNER;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		if (val-&gt;flag &lt;= NX_DUMP_MASK_MAX &amp;&amp;</div><div class='del'>-			val-&gt;flag &gt;= NX_DUMP_MASK_MIN) {</div><div class='del'>-			mdump-&gt;md_capture_mask = val-&gt;flag &amp; 0xff;</div><div class='del'>-			netdev_info(netdev, "Driver mask changed to: 0x%x\n",</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(FW_DUMP_LEVELS); i++) {</div><div class='add'>+			if (val-&gt;flag == FW_DUMP_LEVELS[i]) {</div><div class='add'>+				mdump-&gt;md_capture_mask = val-&gt;flag;</div><div class='add'>+				netdev_info(netdev,</div><div class='add'>+					"Driver mask changed to: 0x%x\n",</div><div class='ctx'> 					mdump-&gt;md_capture_mask);</div><div class='del'>-			break;</div><div class='add'>+				return 0;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		netdev_info(netdev,</div><div class='ctx'> 			"Invalid dump level: 0x%x\n", val-&gt;flag);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/netxen/netxen_nic_hdr.h b/drivers/net/ethernet/qlogic/netxen/netxen_nic_hdr.h<br/>index b1a897cd9a8d..28e076960bcb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic_hdr.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/netxen/netxen_nic_hdr.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic_hdr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/netxen/netxen_nic_hdr.h</a></div><div class='hunk'>@@ -776,6 +776,7 @@ enum {</div><div class='ctx'> #define CRB_SW_INT_MASK_3		(NETXEN_NIC_REG(0x1e8))</div><div class='ctx'> </div><div class='ctx'> #define CRB_FW_CAPABILITIES_1		(NETXEN_CAM_RAM(0x128))</div><div class='add'>+#define CRB_FW_CAPABILITIES_2		(NETXEN_CAM_RAM(0x12c))</div><div class='ctx'> #define CRB_MAC_BLOCK_START		(NETXEN_CAM_RAM(0x1c0))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -955,6 +956,31 @@ enum {</div><div class='ctx'> #define NX_CRB_DEV_REF_COUNT		(NETXEN_CAM_RAM(0x138))</div><div class='ctx'> #define NX_CRB_DEV_STATE		(NETXEN_CAM_RAM(0x140))</div><div class='ctx'> </div><div class='add'>+/* MiniDIMM related macros */</div><div class='add'>+#define NETXEN_DIMM_CAPABILITY		(NETXEN_CAM_RAM(0x258))</div><div class='add'>+#define NETXEN_DIMM_PRESENT			0x1</div><div class='add'>+#define NETXEN_DIMM_MEMTYPE_DDR2_SDRAM	0x2</div><div class='add'>+#define NETXEN_DIMM_SIZE			0x4</div><div class='add'>+#define NETXEN_DIMM_MEMTYPE(VAL)		((VAL &gt;&gt; 3) &amp; 0xf)</div><div class='add'>+#define	NETXEN_DIMM_NUMROWS(VAL)		((VAL &gt;&gt; 7) &amp; 0xf)</div><div class='add'>+#define	NETXEN_DIMM_NUMCOLS(VAL)		((VAL &gt;&gt; 11) &amp; 0xf)</div><div class='add'>+#define	NETXEN_DIMM_NUMRANKS(VAL)		((VAL &gt;&gt; 15) &amp; 0x3)</div><div class='add'>+#define NETXEN_DIMM_DATAWIDTH(VAL)		((VAL &gt;&gt; 18) &amp; 0x3)</div><div class='add'>+#define NETXEN_DIMM_NUMBANKS(VAL)		((VAL &gt;&gt; 21) &amp; 0xf)</div><div class='add'>+#define NETXEN_DIMM_TYPE(VAL)		((VAL &gt;&gt; 25) &amp; 0x3f)</div><div class='add'>+#define NETXEN_DIMM_VALID_FLAG		0x80000000</div><div class='add'>+</div><div class='add'>+#define NETXEN_DIMM_MEM_DDR2_SDRAM	0x8</div><div class='add'>+</div><div class='add'>+#define NETXEN_DIMM_STD_MEM_SIZE	512</div><div class='add'>+</div><div class='add'>+#define NETXEN_DIMM_TYPE_RDIMM	0x1</div><div class='add'>+#define NETXEN_DIMM_TYPE_UDIMM	0x2</div><div class='add'>+#define NETXEN_DIMM_TYPE_SO_DIMM	0x4</div><div class='add'>+#define NETXEN_DIMM_TYPE_Micro_DIMM	0x8</div><div class='add'>+#define NETXEN_DIMM_TYPE_Mini_RDIMM	0x10</div><div class='add'>+#define NETXEN_DIMM_TYPE_Mini_UDIMM	0x20</div><div class='add'>+</div><div class='ctx'> /* Device State */</div><div class='ctx'> #define NX_DEV_COLD		1</div><div class='ctx'> #define NX_DEV_INITALIZING	2</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c b/drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c<br/>index 718b27440351..8694124ef77d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c</a></div><div class='hunk'>@@ -1131,7 +1131,6 @@ netxen_validate_firmware(struct netxen_adapter *adapter)</div><div class='ctx'> 		 _build(file_fw_ver));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	val = nx_get_bios_version(adapter);</div><div class='ctx'> 	netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&amp;bios);</div><div class='ctx'> 	if ((__force u32)val != bios) {</div><div class='hunk'>@@ -1261,8 +1260,7 @@ next:</div><div class='ctx'> void</div><div class='ctx'> netxen_release_firmware(struct netxen_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	if (adapter-&gt;fw)</div><div class='del'>-		release_firmware(adapter-&gt;fw);</div><div class='add'>+	release_firmware(adapter-&gt;fw);</div><div class='ctx'> 	adapter-&gt;fw = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1661,6 +1659,9 @@ netxen_process_lro(struct netxen_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	length = skb-&gt;len;</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;flags &amp; NETXEN_FW_MSS_CAP)</div><div class='add'>+		skb_shinfo(skb)-&gt;gso_size  =  netxen_get_lro_sts_mss(sts_data1);</div><div class='add'>+</div><div class='ctx'> 	netif_receive_skb(skb);</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;stats.lro_pkts++;</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c b/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c<br/>index 65a718f9ccd3..342b3a79bd0f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c</a></div><div class='hunk'>@@ -1184,6 +1184,7 @@ netxen_nic_attach(struct netxen_adapter *adapter)</div><div class='ctx'> 	int err, ring;</div><div class='ctx'> 	struct nx_host_rds_ring *rds_ring;</div><div class='ctx'> 	struct nx_host_tx_ring *tx_ring;</div><div class='add'>+	u32 capab2;</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;is_up == NETXEN_ADAPTER_UP_MAGIC)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1192,6 +1193,13 @@ netxen_nic_attach(struct netxen_adapter *adapter)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	adapter-&gt;flags &amp;= ~NETXEN_FW_MSS_CAP;</div><div class='add'>+	if (adapter-&gt;capabilities &amp; NX_FW_CAPABILITY_MORE_CAPS) {</div><div class='add'>+		capab2 = NXRD32(adapter, CRB_FW_CAPABILITIES_2);</div><div class='add'>+		if (capab2 &amp; NX_FW_CAPABILITY_2_LRO_MAX_TCP_SEG)</div><div class='add'>+			adapter-&gt;flags |= NETXEN_FW_MSS_CAP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = netxen_napi_add(adapter, netdev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -1810,7 +1818,6 @@ netxen_tso_check(struct net_device *netdev,</div><div class='ctx'> 		flags = FLAGS_VLAN_TAGGED;</div><div class='ctx'> </div><div class='ctx'> 	} else if (vlan_tx_tag_present(skb)) {</div><div class='del'>-</div><div class='ctx'> 		flags = FLAGS_VLAN_OOB;</div><div class='ctx'> 		vid = vlan_tx_tag_get(skb);</div><div class='ctx'> 		netxen_set_tx_vlan_tci(first_desc, vid);</div><div class='hunk'>@@ -2926,6 +2933,134 @@ static struct bin_attribute bin_attr_mem = {</div><div class='ctx'> 	.write = netxen_sysfs_write_mem,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static ssize_t</div><div class='add'>+netxen_sysfs_read_dimm(struct file *filp, struct kobject *kobj,</div><div class='add'>+		struct bin_attribute *attr,</div><div class='add'>+		char *buf, loff_t offset, size_t size)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = container_of(kobj, struct device, kobj);</div><div class='add'>+	struct netxen_adapter *adapter = dev_get_drvdata(dev);</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+	struct netxen_dimm_cfg dimm;</div><div class='add'>+	u8 dw, rows, cols, banks, ranks;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (size != sizeof(struct netxen_dimm_cfg)) {</div><div class='add'>+		netdev_err(netdev, "Invalid size\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;dimm, 0, sizeof(struct netxen_dimm_cfg));</div><div class='add'>+	val = NXRD32(adapter, NETXEN_DIMM_CAPABILITY);</div><div class='add'>+</div><div class='add'>+	/* Checks if DIMM info is valid. */</div><div class='add'>+	if (val &amp; NETXEN_DIMM_VALID_FLAG) {</div><div class='add'>+		netdev_err(netdev, "Invalid DIMM flag\n");</div><div class='add'>+		dimm.presence = 0xff;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rows = NETXEN_DIMM_NUMROWS(val);</div><div class='add'>+	cols = NETXEN_DIMM_NUMCOLS(val);</div><div class='add'>+	ranks = NETXEN_DIMM_NUMRANKS(val);</div><div class='add'>+	banks = NETXEN_DIMM_NUMBANKS(val);</div><div class='add'>+	dw = NETXEN_DIMM_DATAWIDTH(val);</div><div class='add'>+</div><div class='add'>+	dimm.presence = (val &amp; NETXEN_DIMM_PRESENT);</div><div class='add'>+</div><div class='add'>+	/* Checks if DIMM info is present. */</div><div class='add'>+	if (!dimm.presence) {</div><div class='add'>+		netdev_err(netdev, "DIMM not present\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dimm.dimm_type = NETXEN_DIMM_TYPE(val);</div><div class='add'>+</div><div class='add'>+	switch (dimm.dimm_type) {</div><div class='add'>+	case NETXEN_DIMM_TYPE_RDIMM:</div><div class='add'>+	case NETXEN_DIMM_TYPE_UDIMM:</div><div class='add'>+	case NETXEN_DIMM_TYPE_SO_DIMM:</div><div class='add'>+	case NETXEN_DIMM_TYPE_Micro_DIMM:</div><div class='add'>+	case NETXEN_DIMM_TYPE_Mini_RDIMM:</div><div class='add'>+	case NETXEN_DIMM_TYPE_Mini_UDIMM:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netdev_err(netdev, "Invalid DIMM type %x\n", dimm.dimm_type);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (val &amp; NETXEN_DIMM_MEMTYPE_DDR2_SDRAM)</div><div class='add'>+		dimm.mem_type = NETXEN_DIMM_MEM_DDR2_SDRAM;</div><div class='add'>+	else</div><div class='add'>+		dimm.mem_type = NETXEN_DIMM_MEMTYPE(val);</div><div class='add'>+</div><div class='add'>+	if (val &amp; NETXEN_DIMM_SIZE) {</div><div class='add'>+		dimm.size = NETXEN_DIMM_STD_MEM_SIZE;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!rows) {</div><div class='add'>+		netdev_err(netdev, "Invalid no of rows %x\n", rows);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!cols) {</div><div class='add'>+		netdev_err(netdev, "Invalid no of columns %x\n", cols);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!banks) {</div><div class='add'>+		netdev_err(netdev, "Invalid no of banks %x\n", banks);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ranks += 1;</div><div class='add'>+</div><div class='add'>+	switch (dw) {</div><div class='add'>+	case 0x0:</div><div class='add'>+		dw = 32;</div><div class='add'>+		break;</div><div class='add'>+	case 0x1:</div><div class='add'>+		dw = 33;</div><div class='add'>+		break;</div><div class='add'>+	case 0x2:</div><div class='add'>+		dw = 36;</div><div class='add'>+		break;</div><div class='add'>+	case 0x3:</div><div class='add'>+		dw = 64;</div><div class='add'>+		break;</div><div class='add'>+	case 0x4:</div><div class='add'>+		dw = 72;</div><div class='add'>+		break;</div><div class='add'>+	case 0x5:</div><div class='add'>+		dw = 80;</div><div class='add'>+		break;</div><div class='add'>+	case 0x6:</div><div class='add'>+		dw = 128;</div><div class='add'>+		break;</div><div class='add'>+	case 0x7:</div><div class='add'>+		dw = 144;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netdev_err(netdev, "Invalid data-width %x\n", dw);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dimm.size = ((1 &lt;&lt; rows) * (1 &lt;&lt; cols) * dw * banks * ranks) / 8;</div><div class='add'>+	/* Size returned in MB. */</div><div class='add'>+	dimm.size = (dimm.size) / 0x100000;</div><div class='add'>+out:</div><div class='add'>+	memcpy(buf, &amp;dimm, sizeof(struct netxen_dimm_cfg));</div><div class='add'>+	return sizeof(struct netxen_dimm_cfg);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct bin_attribute bin_attr_dimm = {</div><div class='add'>+	.attr = { .name = "dimm", .mode = (S_IRUGO | S_IWUSR) },</div><div class='add'>+	.size = 0,</div><div class='add'>+	.read = netxen_sysfs_read_dimm,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> netxen_create_sysfs_entries(struct netxen_adapter *adapter)</div><div class='hunk'>@@ -2963,6 +3098,8 @@ netxen_create_diag_entries(struct netxen_adapter *adapter)</div><div class='ctx'> 		dev_info(dev, "failed to create crb sysfs entry\n");</div><div class='ctx'> 	if (device_create_bin_file(dev, &amp;bin_attr_mem))</div><div class='ctx'> 		dev_info(dev, "failed to create mem sysfs entry\n");</div><div class='add'>+	if (device_create_bin_file(dev, &amp;bin_attr_dimm))</div><div class='add'>+		dev_info(dev, "failed to create dimm sysfs entry\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -2975,6 +3112,7 @@ netxen_remove_diag_entries(struct netxen_adapter *adapter)</div><div class='ctx'> 	device_remove_file(dev, &amp;dev_attr_diag_mode);</div><div class='ctx'> 	device_remove_bin_file(dev, &amp;bin_attr_crb);</div><div class='ctx'> 	device_remove_bin_file(dev, &amp;bin_attr_mem);</div><div class='add'>+	device_remove_bin_file(dev, &amp;bin_attr_dimm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_INET</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h<br/>index 385a4d5c7c25..8680a5dae4a2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/qlcnic/qlcnic.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlcnic/qlcnic.h</a></div><div class='hunk'>@@ -36,8 +36,8 @@</div><div class='ctx'> </div><div class='ctx'> #define _QLCNIC_LINUX_MAJOR 5</div><div class='ctx'> #define _QLCNIC_LINUX_MINOR 0</div><div class='del'>-#define _QLCNIC_LINUX_SUBVERSION 27</div><div class='del'>-#define QLCNIC_LINUX_VERSIONID  "5.0.27"</div><div class='add'>+#define _QLCNIC_LINUX_SUBVERSION 28</div><div class='add'>+#define QLCNIC_LINUX_VERSIONID  "5.0.28"</div><div class='ctx'> #define QLCNIC_DRV_IDC_VER  0x01</div><div class='ctx'> #define QLCNIC_DRIVER_VERSION  ((_QLCNIC_LINUX_MAJOR &lt;&lt; 16) |\</div><div class='ctx'> 		 (_QLCNIC_LINUX_MINOR &lt;&lt; 8) | (_QLCNIC_LINUX_SUBVERSION))</div><div class='hunk'>@@ -607,6 +607,7 @@ struct qlcnic_recv_context {</div><div class='ctx'> #define QLCNIC_CDRP_CMD_CONFIG_PORT		0x0000002E</div><div class='ctx'> #define QLCNIC_CDRP_CMD_TEMP_SIZE		0x0000002f</div><div class='ctx'> #define QLCNIC_CDRP_CMD_GET_TEMP_HDR		0x00000030</div><div class='add'>+#define QLCNIC_CDRP_CMD_GET_MAC_STATS		0x00000037</div><div class='ctx'> </div><div class='ctx'> #define QLCNIC_RCODE_SUCCESS		0</div><div class='ctx'> #define QLCNIC_RCODE_NOT_SUPPORTED	9</div><div class='hunk'>@@ -1180,18 +1181,62 @@ struct qlcnic_esw_func_cfg {</div><div class='ctx'> #define QLCNIC_STATS_ESWITCH		2</div><div class='ctx'> #define QLCNIC_QUERY_RX_COUNTER		0</div><div class='ctx'> #define QLCNIC_QUERY_TX_COUNTER		1</div><div class='del'>-#define QLCNIC_ESW_STATS_NOT_AVAIL	0xffffffffffffffffULL</div><div class='add'>+#define QLCNIC_STATS_NOT_AVAIL	0xffffffffffffffffULL</div><div class='add'>+#define QLCNIC_FILL_STATS(VAL1) \</div><div class='add'>+	(((VAL1) == QLCNIC_STATS_NOT_AVAIL) ? 0 : VAL1)</div><div class='add'>+#define QLCNIC_MAC_STATS 1</div><div class='add'>+#define QLCNIC_ESW_STATS 2</div><div class='ctx'> </div><div class='ctx'> #define QLCNIC_ADD_ESW_STATS(VAL1, VAL2)\</div><div class='ctx'> do {	\</div><div class='del'>-	if (((VAL1) == QLCNIC_ESW_STATS_NOT_AVAIL) &amp;&amp; \</div><div class='del'>-	    ((VAL2) != QLCNIC_ESW_STATS_NOT_AVAIL)) \</div><div class='add'>+	if (((VAL1) == QLCNIC_STATS_NOT_AVAIL) &amp;&amp; \</div><div class='add'>+	    ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \</div><div class='ctx'> 		(VAL1) = (VAL2); \</div><div class='del'>-	else if (((VAL1) != QLCNIC_ESW_STATS_NOT_AVAIL) &amp;&amp; \</div><div class='del'>-		 ((VAL2) != QLCNIC_ESW_STATS_NOT_AVAIL)) \</div><div class='add'>+	else if (((VAL1) != QLCNIC_STATS_NOT_AVAIL) &amp;&amp; \</div><div class='add'>+		 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \</div><div class='ctx'> 			(VAL1) += (VAL2); \</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='add'>+struct qlcnic_mac_statistics{</div><div class='add'>+	__le64	mac_tx_frames;</div><div class='add'>+	__le64	mac_tx_bytes;</div><div class='add'>+	__le64	mac_tx_mcast_pkts;</div><div class='add'>+	__le64	mac_tx_bcast_pkts;</div><div class='add'>+	__le64	mac_tx_pause_cnt;</div><div class='add'>+	__le64	mac_tx_ctrl_pkt;</div><div class='add'>+	__le64	mac_tx_lt_64b_pkts;</div><div class='add'>+	__le64	mac_tx_lt_127b_pkts;</div><div class='add'>+	__le64	mac_tx_lt_255b_pkts;</div><div class='add'>+	__le64	mac_tx_lt_511b_pkts;</div><div class='add'>+	__le64	mac_tx_lt_1023b_pkts;</div><div class='add'>+	__le64	mac_tx_lt_1518b_pkts;</div><div class='add'>+	__le64	mac_tx_gt_1518b_pkts;</div><div class='add'>+	__le64	rsvd1[3];</div><div class='add'>+</div><div class='add'>+	__le64	mac_rx_frames;</div><div class='add'>+	__le64	mac_rx_bytes;</div><div class='add'>+	__le64	mac_rx_mcast_pkts;</div><div class='add'>+	__le64	mac_rx_bcast_pkts;</div><div class='add'>+	__le64	mac_rx_pause_cnt;</div><div class='add'>+	__le64	mac_rx_ctrl_pkt;</div><div class='add'>+	__le64	mac_rx_lt_64b_pkts;</div><div class='add'>+	__le64	mac_rx_lt_127b_pkts;</div><div class='add'>+	__le64	mac_rx_lt_255b_pkts;</div><div class='add'>+	__le64	mac_rx_lt_511b_pkts;</div><div class='add'>+	__le64	mac_rx_lt_1023b_pkts;</div><div class='add'>+	__le64	mac_rx_lt_1518b_pkts;</div><div class='add'>+	__le64	mac_rx_gt_1518b_pkts;</div><div class='add'>+	__le64	rsvd2[3];</div><div class='add'>+</div><div class='add'>+	__le64	mac_rx_length_error;</div><div class='add'>+	__le64	mac_rx_length_small;</div><div class='add'>+	__le64	mac_rx_length_large;</div><div class='add'>+	__le64	mac_rx_jabber;</div><div class='add'>+	__le64	mac_rx_dropped;</div><div class='add'>+	__le64	mac_rx_crc_error;</div><div class='add'>+	__le64	mac_align_error;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> struct __qlcnic_esw_statistics {</div><div class='ctx'> 	__le16 context_id;</div><div class='ctx'> 	__le16 version;</div><div class='hunk'>@@ -1352,6 +1397,8 @@ enum op_codes {</div><div class='ctx'> #define QLCNIC_ENABLE_FW_DUMP		0xaddfeed</div><div class='ctx'> #define QLCNIC_DISABLE_FW_DUMP		0xbadfeed</div><div class='ctx'> #define QLCNIC_FORCE_FW_RESET		0xdeaddead</div><div class='add'>+#define QLCNIC_SET_QUIESCENT		0xadd00010</div><div class='add'>+#define QLCNIC_RESET_QUIESCENT		0xadd00020</div><div class='ctx'> </div><div class='ctx'> struct qlcnic_dump_operations {</div><div class='ctx'> 	enum op_codes opcode;</div><div class='hunk'>@@ -1510,6 +1557,7 @@ int qlcnic_get_port_stats(struct qlcnic_adapter *, const u8, const u8,</div><div class='ctx'> int qlcnic_get_eswitch_stats(struct qlcnic_adapter *, const u8, u8,</div><div class='ctx'> 					struct __qlcnic_esw_statistics *);</div><div class='ctx'> int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, u8, u8, u8);</div><div class='add'>+int qlcnic_get_mac_stats(struct qlcnic_adapter *, struct qlcnic_mac_statistics *);</div><div class='ctx'> extern int qlcnic_config_tso;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1559,6 +1607,7 @@ static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern const struct ethtool_ops qlcnic_ethtool_ops;</div><div class='add'>+extern const struct ethtool_ops qlcnic_ethtool_failed_ops;</div><div class='ctx'> </div><div class='ctx'> struct qlcnic_nic_template {</div><div class='ctx'> 	int (*config_bridged_mode) (struct qlcnic_adapter *, u32);</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c<br/>index 569a837d2ac4..8db85244e8ad 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c</a></div><div class='hunk'>@@ -905,6 +905,65 @@ int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* This routine will retrieve the MAC statistics from firmware */</div><div class='add'>+int qlcnic_get_mac_stats(struct qlcnic_adapter *adapter,</div><div class='add'>+		struct qlcnic_mac_statistics *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct qlcnic_mac_statistics *stats;</div><div class='add'>+	struct qlcnic_cmd_args cmd;</div><div class='add'>+	size_t stats_size = sizeof(struct qlcnic_mac_statistics);</div><div class='add'>+	dma_addr_t stats_dma_t;</div><div class='add'>+	void *stats_addr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	stats_addr = dma_alloc_coherent(&amp;adapter-&gt;pdev-&gt;dev, stats_size,</div><div class='add'>+			&amp;stats_dma_t, GFP_KERNEL);</div><div class='add'>+	if (!stats_addr) {</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+			"%s: Unable to allocate memory.\n", __func__);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	memset(stats_addr, 0, stats_size);</div><div class='add'>+	memset(&amp;cmd, 0, sizeof(cmd));</div><div class='add'>+	cmd.req.cmd = QLCNIC_CDRP_CMD_GET_MAC_STATS;</div><div class='add'>+	cmd.req.arg1 = stats_size &lt;&lt; 16;</div><div class='add'>+	cmd.req.arg2 = MSD(stats_dma_t);</div><div class='add'>+	cmd.req.arg3 = LSD(stats_dma_t);</div><div class='add'>+</div><div class='add'>+	qlcnic_issue_cmd(adapter, &amp;cmd);</div><div class='add'>+	err = cmd.rsp.cmd;</div><div class='add'>+</div><div class='add'>+	if (!err) {</div><div class='add'>+		stats = stats_addr;</div><div class='add'>+		mac_stats-&gt;mac_tx_frames = le64_to_cpu(stats-&gt;mac_tx_frames);</div><div class='add'>+		mac_stats-&gt;mac_tx_bytes = le64_to_cpu(stats-&gt;mac_tx_bytes);</div><div class='add'>+		mac_stats-&gt;mac_tx_mcast_pkts =</div><div class='add'>+					le64_to_cpu(stats-&gt;mac_tx_mcast_pkts);</div><div class='add'>+		mac_stats-&gt;mac_tx_bcast_pkts =</div><div class='add'>+					le64_to_cpu(stats-&gt;mac_tx_bcast_pkts);</div><div class='add'>+		mac_stats-&gt;mac_rx_frames = le64_to_cpu(stats-&gt;mac_rx_frames);</div><div class='add'>+		mac_stats-&gt;mac_rx_bytes = le64_to_cpu(stats-&gt;mac_rx_bytes);</div><div class='add'>+		mac_stats-&gt;mac_rx_mcast_pkts =</div><div class='add'>+					le64_to_cpu(stats-&gt;mac_rx_mcast_pkts);</div><div class='add'>+		mac_stats-&gt;mac_rx_length_error =</div><div class='add'>+				le64_to_cpu(stats-&gt;mac_rx_length_error);</div><div class='add'>+		mac_stats-&gt;mac_rx_length_small =</div><div class='add'>+				le64_to_cpu(stats-&gt;mac_rx_length_small);</div><div class='add'>+		mac_stats-&gt;mac_rx_length_large =</div><div class='add'>+				le64_to_cpu(stats-&gt;mac_rx_length_large);</div><div class='add'>+		mac_stats-&gt;mac_rx_jabber = le64_to_cpu(stats-&gt;mac_rx_jabber);</div><div class='add'>+		mac_stats-&gt;mac_rx_dropped = le64_to_cpu(stats-&gt;mac_rx_dropped);</div><div class='add'>+		mac_stats-&gt;mac_rx_crc_error = le64_to_cpu(stats-&gt;mac_rx_crc_error);</div><div class='add'>+	} else {</div><div class='add'>+		dev_info(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+			"%s: Get mac stats failed =%d.\n", __func__, err);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(&amp;adapter-&gt;pdev-&gt;dev, stats_size, stats_addr,</div><div class='add'>+		stats_dma_t);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,</div><div class='ctx'> 		const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {</div><div class='ctx'> </div><div class='hunk'>@@ -920,13 +979,13 @@ int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	memset(esw_stats, 0, sizeof(u64));</div><div class='del'>-	esw_stats-&gt;unicast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;</div><div class='del'>-	esw_stats-&gt;multicast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;</div><div class='del'>-	esw_stats-&gt;broadcast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;</div><div class='del'>-	esw_stats-&gt;dropped_frames = QLCNIC_ESW_STATS_NOT_AVAIL;</div><div class='del'>-	esw_stats-&gt;errors = QLCNIC_ESW_STATS_NOT_AVAIL;</div><div class='del'>-	esw_stats-&gt;local_frames = QLCNIC_ESW_STATS_NOT_AVAIL;</div><div class='del'>-	esw_stats-&gt;numbytes = QLCNIC_ESW_STATS_NOT_AVAIL;</div><div class='add'>+	esw_stats-&gt;unicast_frames = QLCNIC_STATS_NOT_AVAIL;</div><div class='add'>+	esw_stats-&gt;multicast_frames = QLCNIC_STATS_NOT_AVAIL;</div><div class='add'>+	esw_stats-&gt;broadcast_frames = QLCNIC_STATS_NOT_AVAIL;</div><div class='add'>+	esw_stats-&gt;dropped_frames = QLCNIC_STATS_NOT_AVAIL;</div><div class='add'>+	esw_stats-&gt;errors = QLCNIC_STATS_NOT_AVAIL;</div><div class='add'>+	esw_stats-&gt;local_frames = QLCNIC_STATS_NOT_AVAIL;</div><div class='add'>+	esw_stats-&gt;numbytes = QLCNIC_STATS_NOT_AVAIL;</div><div class='ctx'> 	esw_stats-&gt;context_id = eswitch;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; QLCNIC_MAX_PCI_FUNC; i++) {</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c<br/>index 89ddf7f7d7df..9e9e78a5c4d7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c</a></div><div class='hunk'>@@ -78,8 +78,46 @@ static const char qlcnic_device_gstrings_stats[][ETH_GSTRING_LEN] = {</div><div class='ctx'> 	"tx numbytes",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define QLCNIC_STATS_LEN	ARRAY_SIZE(qlcnic_gstrings_stats)</div><div class='add'>+static const char qlcnic_mac_stats_strings [][ETH_GSTRING_LEN] = {</div><div class='add'>+	"mac_tx_frames",</div><div class='add'>+	"mac_tx_bytes",</div><div class='add'>+	"mac_tx_mcast_pkts",</div><div class='add'>+	"mac_tx_bcast_pkts",</div><div class='add'>+	"mac_tx_pause_cnt",</div><div class='add'>+	"mac_tx_ctrl_pkt",</div><div class='add'>+	"mac_tx_lt_64b_pkts",</div><div class='add'>+	"mac_tx_lt_127b_pkts",</div><div class='add'>+	"mac_tx_lt_255b_pkts",</div><div class='add'>+	"mac_tx_lt_511b_pkts",</div><div class='add'>+	"mac_tx_lt_1023b_pkts",</div><div class='add'>+	"mac_tx_lt_1518b_pkts",</div><div class='add'>+	"mac_tx_gt_1518b_pkts",</div><div class='add'>+	"mac_rx_frames",</div><div class='add'>+	"mac_rx_bytes",</div><div class='add'>+	"mac_rx_mcast_pkts",</div><div class='add'>+	"mac_rx_bcast_pkts",</div><div class='add'>+	"mac_rx_pause_cnt",</div><div class='add'>+	"mac_rx_ctrl_pkt",</div><div class='add'>+	"mac_rx_lt_64b_pkts",</div><div class='add'>+	"mac_rx_lt_127b_pkts",</div><div class='add'>+	"mac_rx_lt_255b_pkts",</div><div class='add'>+	"mac_rx_lt_511b_pkts",</div><div class='add'>+	"mac_rx_lt_1023b_pkts",</div><div class='add'>+	"mac_rx_lt_1518b_pkts",</div><div class='add'>+	"mac_rx_gt_1518b_pkts",</div><div class='add'>+	"mac_rx_length_error",</div><div class='add'>+	"mac_rx_length_small",</div><div class='add'>+	"mac_rx_length_large",</div><div class='add'>+	"mac_rx_jabber",</div><div class='add'>+	"mac_rx_dropped",</div><div class='add'>+	"mac_rx_crc_error",</div><div class='add'>+	"mac_align_error",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define QLCNIC_STATS_LEN ARRAY_SIZE(qlcnic_gstrings_stats)</div><div class='add'>+#define QLCNIC_MAC_STATS_LEN ARRAY_SIZE(qlcnic_mac_stats_strings)</div><div class='ctx'> #define QLCNIC_DEVICE_STATS_LEN	ARRAY_SIZE(qlcnic_device_gstrings_stats)</div><div class='add'>+#define QLCNIC_TOTAL_STATS_LEN QLCNIC_STATS_LEN + QLCNIC_MAC_STATS_LEN</div><div class='ctx'> </div><div class='ctx'> static const char qlcnic_gstrings_test[][ETH_GSTRING_LEN] = {</div><div class='ctx'> 	"Register_Test_on_offline",</div><div class='hunk'>@@ -644,8 +682,8 @@ static int qlcnic_get_sset_count(struct net_device *dev, int sset)</div><div class='ctx'> 		return QLCNIC_TEST_LEN;</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='ctx'> 		if (adapter-&gt;flags &amp; QLCNIC_ESWITCH_ENABLED)</div><div class='del'>-			return QLCNIC_STATS_LEN + QLCNIC_DEVICE_STATS_LEN;</div><div class='del'>-		return QLCNIC_STATS_LEN;</div><div class='add'>+			return QLCNIC_TOTAL_STATS_LEN + QLCNIC_DEVICE_STATS_LEN;</div><div class='add'>+		return QLCNIC_TOTAL_STATS_LEN;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -851,7 +889,7 @@ static void</div><div class='ctx'> qlcnic_get_strings(struct net_device *dev, u32 stringset, u8 * data)</div><div class='ctx'> {</div><div class='ctx'> 	struct qlcnic_adapter *adapter = netdev_priv(dev);</div><div class='del'>-	int index, i;</div><div class='add'>+	int index, i, j;</div><div class='ctx'> </div><div class='ctx'> 	switch (stringset) {</div><div class='ctx'> 	case ETH_SS_TEST:</div><div class='hunk'>@@ -864,6 +902,11 @@ qlcnic_get_strings(struct net_device *dev, u32 stringset, u8 * data)</div><div class='ctx'> 			       qlcnic_gstrings_stats[index].stat_string,</div><div class='ctx'> 			       ETH_GSTRING_LEN);</div><div class='ctx'> 		}</div><div class='add'>+		for (j = 0; j &lt; QLCNIC_MAC_STATS_LEN; index++, j++) {</div><div class='add'>+			memcpy(data + index * ETH_GSTRING_LEN,</div><div class='add'>+			       qlcnic_mac_stats_strings[j],</div><div class='add'>+			       ETH_GSTRING_LEN);</div><div class='add'>+		}</div><div class='ctx'> 		if (!(adapter-&gt;flags &amp; QLCNIC_ESWITCH_ENABLED))</div><div class='ctx'> 			return;</div><div class='ctx'> 		for (i = 0; i &lt; QLCNIC_DEVICE_STATS_LEN; index++, i++) {</div><div class='hunk'>@@ -874,22 +917,64 @@ qlcnic_get_strings(struct net_device *dev, u32 stringset, u8 * data)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define QLCNIC_FILL_ESWITCH_STATS(VAL1) \</div><div class='del'>-	(((VAL1) == QLCNIC_ESW_STATS_NOT_AVAIL) ? 0 : VAL1)</div><div class='del'>-</div><div class='ctx'> static void</div><div class='del'>-qlcnic_fill_device_stats(int *index, u64 *data,</div><div class='del'>-		struct __qlcnic_esw_statistics *stats)</div><div class='add'>+qlcnic_fill_stats(int *index, u64 *data, void *stats, int type)</div><div class='ctx'> {</div><div class='ctx'> 	int ind = *index;</div><div class='ctx'> </div><div class='del'>-	data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats-&gt;unicast_frames);</div><div class='del'>-	data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats-&gt;multicast_frames);</div><div class='del'>-	data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats-&gt;broadcast_frames);</div><div class='del'>-	data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats-&gt;dropped_frames);</div><div class='del'>-	data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats-&gt;errors);</div><div class='del'>-	data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats-&gt;local_frames);</div><div class='del'>-	data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats-&gt;numbytes);</div><div class='add'>+	if (type == QLCNIC_MAC_STATS) {</div><div class='add'>+		struct qlcnic_mac_statistics *mac_stats =</div><div class='add'>+					(struct qlcnic_mac_statistics *)stats;</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_frames);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_bytes);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_mcast_pkts);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_bcast_pkts);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_pause_cnt);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_ctrl_pkt);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_lt_64b_pkts);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_lt_127b_pkts);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_lt_255b_pkts);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_lt_511b_pkts);</div><div class='add'>+		data[ind++] =</div><div class='add'>+			QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_lt_1023b_pkts);</div><div class='add'>+		data[ind++] =</div><div class='add'>+			QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_lt_1518b_pkts);</div><div class='add'>+		data[ind++] =</div><div class='add'>+			QLCNIC_FILL_STATS(mac_stats-&gt;mac_tx_gt_1518b_pkts);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_frames);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_bytes);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_mcast_pkts);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_bcast_pkts);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_pause_cnt);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_ctrl_pkt);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_lt_64b_pkts);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_lt_127b_pkts);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_lt_255b_pkts);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_lt_511b_pkts);</div><div class='add'>+		data[ind++] =</div><div class='add'>+			QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_lt_1023b_pkts);</div><div class='add'>+		data[ind++] =</div><div class='add'>+			QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_lt_1518b_pkts);</div><div class='add'>+		data[ind++] =</div><div class='add'>+			QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_gt_1518b_pkts);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_length_error);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_length_small);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_length_large);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_jabber);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_dropped);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_rx_crc_error);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(mac_stats-&gt;mac_align_error);</div><div class='add'>+	} else if (type == QLCNIC_ESW_STATS) {</div><div class='add'>+		struct __qlcnic_esw_statistics *esw_stats =</div><div class='add'>+				(struct __qlcnic_esw_statistics *)stats;</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(esw_stats-&gt;unicast_frames);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(esw_stats-&gt;multicast_frames);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(esw_stats-&gt;broadcast_frames);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(esw_stats-&gt;dropped_frames);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(esw_stats-&gt;errors);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(esw_stats-&gt;local_frames);</div><div class='add'>+		data[ind++] = QLCNIC_FILL_STATS(esw_stats-&gt;numbytes);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	*index = ind;</div><div class='ctx'> }</div><div class='hunk'>@@ -900,6 +985,7 @@ qlcnic_get_ethtool_stats(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct qlcnic_adapter *adapter = netdev_priv(dev);</div><div class='ctx'> 	struct qlcnic_esw_statistics port_stats;</div><div class='add'>+	struct qlcnic_mac_statistics mac_stats;</div><div class='ctx'> 	int index, ret;</div><div class='ctx'> </div><div class='ctx'> 	for (index = 0; index &lt; QLCNIC_STATS_LEN; index++) {</div><div class='hunk'>@@ -911,6 +997,11 @@ qlcnic_get_ethtool_stats(struct net_device *dev,</div><div class='ctx'> 		     sizeof(u64)) ? *(u64 *)p:(*(u32 *)p);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Retrieve MAC statistics from firmware */</div><div class='add'>+	memset(&amp;mac_stats, 0, sizeof(struct qlcnic_mac_statistics));</div><div class='add'>+	qlcnic_get_mac_stats(adapter, &amp;mac_stats);</div><div class='add'>+	qlcnic_fill_stats(&amp;index, data, &amp;mac_stats, QLCNIC_MAC_STATS);</div><div class='add'>+</div><div class='ctx'> 	if (!(adapter-&gt;flags &amp; QLCNIC_ESWITCH_ENABLED))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -920,14 +1011,14 @@ qlcnic_get_ethtool_stats(struct net_device *dev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	qlcnic_fill_device_stats(&amp;index, data, &amp;port_stats.rx);</div><div class='add'>+	qlcnic_fill_stats(&amp;index, data, &amp;port_stats.rx, QLCNIC_ESW_STATS);</div><div class='ctx'> </div><div class='ctx'> 	ret = qlcnic_get_port_stats(adapter, adapter-&gt;ahw-&gt;pci_func,</div><div class='ctx'> 			QLCNIC_QUERY_TX_COUNTER, &amp;port_stats.tx);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	qlcnic_fill_device_stats(&amp;index, data, &amp;port_stats.tx);</div><div class='add'>+	qlcnic_fill_stats(&amp;index, data, &amp;port_stats.tx, QLCNIC_ESW_STATS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qlcnic_set_led(struct net_device *dev,</div><div class='hunk'>@@ -1132,11 +1223,21 @@ qlcnic_get_dump_flag(struct net_device *netdev, struct ethtool_dump *dump)</div><div class='ctx'> 	struct qlcnic_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct qlcnic_fw_dump *fw_dump = &amp;adapter-&gt;ahw-&gt;fw_dump;</div><div class='ctx'> </div><div class='add'>+	if (!fw_dump-&gt;tmpl_hdr) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "FW Dump not supported\n");</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (fw_dump-&gt;clr)</div><div class='ctx'> 		dump-&gt;len = fw_dump-&gt;tmpl_hdr-&gt;size + fw_dump-&gt;size;</div><div class='ctx'> 	else</div><div class='ctx'> 		dump-&gt;len = 0;</div><div class='del'>-	dump-&gt;flag = fw_dump-&gt;tmpl_hdr-&gt;drv_cap_mask;</div><div class='add'>+</div><div class='add'>+	if (!fw_dump-&gt;enable)</div><div class='add'>+		dump-&gt;flag = ETH_FW_DUMP_DISABLE;</div><div class='add'>+	else</div><div class='add'>+		dump-&gt;flag = fw_dump-&gt;tmpl_hdr-&gt;drv_cap_mask;</div><div class='add'>+</div><div class='ctx'> 	dump-&gt;version = adapter-&gt;fw_version;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1150,6 +1251,11 @@ qlcnic_get_dump_data(struct net_device *netdev, struct ethtool_dump *dump,</div><div class='ctx'> 	struct qlcnic_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct qlcnic_fw_dump *fw_dump = &amp;adapter-&gt;ahw-&gt;fw_dump;</div><div class='ctx'> </div><div class='add'>+	if (!fw_dump-&gt;tmpl_hdr) {</div><div class='add'>+		netdev_err(netdev, "FW Dump not supported\n");</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!fw_dump-&gt;clr) {</div><div class='ctx'> 		netdev_info(netdev, "Dump not available\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1177,55 +1283,74 @@ qlcnic_get_dump_data(struct net_device *netdev, struct ethtool_dump *dump,</div><div class='ctx'> static int</div><div class='ctx'> qlcnic_set_dump(struct net_device *netdev, struct ethtool_dump *val)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int i;</div><div class='ctx'> 	struct qlcnic_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct qlcnic_fw_dump *fw_dump = &amp;adapter-&gt;ahw-&gt;fw_dump;</div><div class='add'>+	u32 state;</div><div class='ctx'> </div><div class='ctx'> 	switch (val-&gt;flag) {</div><div class='ctx'> 	case QLCNIC_FORCE_FW_DUMP_KEY:</div><div class='add'>+		if (!fw_dump-&gt;tmpl_hdr) {</div><div class='add'>+			netdev_err(netdev, "FW dump not supported\n");</div><div class='add'>+			return -ENOTSUPP;</div><div class='add'>+		}</div><div class='ctx'> 		if (!fw_dump-&gt;enable) {</div><div class='ctx'> 			netdev_info(netdev, "FW dump not enabled\n");</div><div class='del'>-			return ret;</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (fw_dump-&gt;clr) {</div><div class='ctx'> 			netdev_info(netdev,</div><div class='ctx'> 			"Previous dump not cleared, not forcing dump\n");</div><div class='del'>-			return ret;</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		netdev_info(netdev, "Forcing a FW dump\n");</div><div class='ctx'> 		qlcnic_dev_request_reset(adapter);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case QLCNIC_DISABLE_FW_DUMP:</div><div class='del'>-		if (fw_dump-&gt;enable) {</div><div class='add'>+		if (fw_dump-&gt;enable &amp;&amp; fw_dump-&gt;tmpl_hdr) {</div><div class='ctx'> 			netdev_info(netdev, "Disabling FW dump\n");</div><div class='ctx'> 			fw_dump-&gt;enable = 0;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='add'>+		return 0;</div><div class='ctx'> 	case QLCNIC_ENABLE_FW_DUMP:</div><div class='del'>-		if (!fw_dump-&gt;enable &amp;&amp; fw_dump-&gt;tmpl_hdr) {</div><div class='add'>+		if (!fw_dump-&gt;tmpl_hdr) {</div><div class='add'>+			netdev_err(netdev, "FW dump not supported\n");</div><div class='add'>+			return -ENOTSUPP;</div><div class='add'>+		}</div><div class='add'>+		if (!fw_dump-&gt;enable) {</div><div class='ctx'> 			netdev_info(netdev, "Enabling FW dump\n");</div><div class='ctx'> 			fw_dump-&gt;enable = 1;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='add'>+		return 0;</div><div class='ctx'> 	case QLCNIC_FORCE_FW_RESET:</div><div class='ctx'> 		netdev_info(netdev, "Forcing a FW reset\n");</div><div class='ctx'> 		qlcnic_dev_request_reset(adapter);</div><div class='ctx'> 		adapter-&gt;flags &amp;= ~QLCNIC_FW_RESET_OWNER;</div><div class='del'>-		break;</div><div class='add'>+		return 0;</div><div class='add'>+	case QLCNIC_SET_QUIESCENT:</div><div class='add'>+	case QLCNIC_RESET_QUIESCENT:</div><div class='add'>+		state = QLCRD32(adapter, QLCNIC_CRB_DEV_STATE);</div><div class='add'>+		if (state == QLCNIC_DEV_FAILED || (state == QLCNIC_DEV_BADBAD))</div><div class='add'>+			netdev_info(netdev, "Device in FAILED state\n");</div><div class='add'>+		return 0;</div><div class='ctx'> 	default:</div><div class='del'>-		if (val-&gt;flag &gt; QLCNIC_DUMP_MASK_MAX ||</div><div class='del'>-			val-&gt;flag &lt; QLCNIC_DUMP_MASK_MIN) {</div><div class='del'>-				netdev_info(netdev,</div><div class='del'>-				"Invalid dump level: 0x%x\n", val-&gt;flag);</div><div class='del'>-				ret = -EINVAL;</div><div class='del'>-				goto out;</div><div class='add'>+		if (!fw_dump-&gt;tmpl_hdr) {</div><div class='add'>+			netdev_err(netdev, "FW dump not supported\n");</div><div class='add'>+			return -ENOTSUPP;</div><div class='add'>+		}</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(FW_DUMP_LEVELS); i++) {</div><div class='add'>+			if (val-&gt;flag == FW_DUMP_LEVELS[i]) {</div><div class='add'>+				fw_dump-&gt;tmpl_hdr-&gt;drv_cap_mask =</div><div class='add'>+							val-&gt;flag;</div><div class='add'>+				netdev_info(netdev, "Driver mask changed to: 0x%x\n",</div><div class='add'>+					fw_dump-&gt;tmpl_hdr-&gt;drv_cap_mask);</div><div class='add'>+				return 0;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='del'>-		fw_dump-&gt;tmpl_hdr-&gt;drv_cap_mask = val-&gt;flag &amp; 0xff;</div><div class='del'>-		netdev_info(netdev, "Driver mask changed to: 0x%x\n",</div><div class='del'>-			fw_dump-&gt;tmpl_hdr-&gt;drv_cap_mask);</div><div class='add'>+		netdev_info(netdev, "Invalid dump level: 0x%x\n", val-&gt;flag);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct ethtool_ops qlcnic_ethtool_ops = {</div><div class='hunk'>@@ -1258,3 +1383,10 @@ const struct ethtool_ops qlcnic_ethtool_ops = {</div><div class='ctx'> 	.get_dump_data = qlcnic_get_dump_data,</div><div class='ctx'> 	.set_dump = qlcnic_set_dump,</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+const struct ethtool_ops qlcnic_ethtool_failed_ops = {</div><div class='add'>+	.get_settings = qlcnic_get_settings,</div><div class='add'>+	.get_drvinfo = qlcnic_get_drvinfo,</div><div class='add'>+	.set_msglevel = qlcnic_set_msglevel,</div><div class='add'>+	.get_msglevel = qlcnic_get_msglevel,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h<br/>index a52819303d1b..6ced3195aad3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h</a></div><div class='hunk'>@@ -704,6 +704,8 @@ enum {</div><div class='ctx'> #define QLCNIC_DEV_FAILED		0x6</div><div class='ctx'> #define QLCNIC_DEV_QUISCENT		0x7</div><div class='ctx'> </div><div class='add'>+#define QLCNIC_DEV_BADBAD		0xbad0bad0</div><div class='add'>+</div><div class='ctx'> #define QLCNIC_DEV_NPAR_NON_OPER	0 /* NON Operational */</div><div class='ctx'> #define QLCNIC_DEV_NPAR_OPER		1 /* NPAR Operational */</div><div class='ctx'> #define QLCNIC_DEV_NPAR_OPER_TIMEO	30 /* Operational time out */</div><div class='hunk'>@@ -776,6 +778,10 @@ struct qlcnic_legacy_intr_set {</div><div class='ctx'> #define FLASH_ROM_WINDOW	0x42110030</div><div class='ctx'> #define FLASH_ROM_DATA		0x42150000</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+static const u32 FW_DUMP_LEVELS[] = {</div><div class='add'>+	0x3, 0x7, 0xf, 0x1f, 0x3f, 0x7f, 0xff };</div><div class='add'>+</div><div class='ctx'> static const u32 MIU_TEST_READ_DATA[] = {</div><div class='ctx'> 	0x410000A8, 0x410000AC, 0x410000B8, 0x410000BC, };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c<br/>index d32cf0ddf1b9..799fd40ed03a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c</a></div><div class='hunk'>@@ -1321,8 +1321,7 @@ next:</div><div class='ctx'> void</div><div class='ctx'> qlcnic_release_firmware(struct qlcnic_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	if (adapter-&gt;fw)</div><div class='del'>-		release_firmware(adapter-&gt;fw);</div><div class='add'>+	release_firmware(adapter-&gt;fw);</div><div class='ctx'> 	adapter-&gt;fw = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c<br/>index 75c32e875fef..46e77a2c5121 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c</a></div><div class='hunk'>@@ -338,6 +338,10 @@ static const struct net_device_ops qlcnic_netdev_ops = {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct net_device_ops qlcnic_netdev_failed_ops = {</div><div class='add'>+	.ndo_open	   = qlcnic_open,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct qlcnic_nic_template qlcnic_ops = {</div><div class='ctx'> 	.config_bridged_mode = qlcnic_config_bridged_mode,</div><div class='ctx'> 	.config_led = qlcnic_config_led,</div><div class='hunk'>@@ -1623,8 +1627,9 @@ qlcnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	err = adapter-&gt;nic_ops-&gt;start_firmware(adapter);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Loading fw failed.Please Reboot\n");</div><div class='del'>-		goto err_out_decr_ref;</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Loading fw failed. Please Reboot\n"</div><div class='add'>+			"\t\tIf reboot doesn't help, try flashing the card\n");</div><div class='add'>+		goto err_out_maintenance_mode;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (qlcnic_read_mac_addr(adapter))</div><div class='hunk'>@@ -1695,6 +1700,18 @@ err_out_disable_pdev:</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> 	return err;</div><div class='add'>+</div><div class='add'>+err_out_maintenance_mode:</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;qlcnic_netdev_failed_ops;</div><div class='add'>+	SET_ETHTOOL_OPS(netdev, &amp;qlcnic_ethtool_failed_ops);</div><div class='add'>+	err = register_netdev(netdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to register net device\n");</div><div class='add'>+		goto err_out_decr_ref;</div><div class='add'>+	}</div><div class='add'>+	pci_set_drvdata(pdev, adapter);</div><div class='add'>+	qlcnic_create_diag_entries(adapter);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __devexit qlcnic_remove(struct pci_dev *pdev)</div><div class='hunk'>@@ -1831,8 +1848,14 @@ done:</div><div class='ctx'> static int qlcnic_open(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct qlcnic_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	u32 state = QLCRD32(adapter, QLCNIC_CRB_DEV_STATE);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (state == QLCNIC_DEV_FAILED || (state == QLCNIC_DEV_BADBAD)) {</div><div class='add'>+		netdev_err(netdev, "Device in FAILED state\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	netif_carrier_off(netdev);</div><div class='ctx'> </div><div class='ctx'> 	err = qlcnic_attach(adapter);</div><div class='hunk'>@@ -1942,7 +1965,7 @@ qlcnic_send_filter(struct qlcnic_adapter *adapter,</div><div class='ctx'> 	__le16 vlan_id = 0;</div><div class='ctx'> 	u8 hindex;</div><div class='ctx'> </div><div class='del'>-	if (!compare_ether_addr(phdr-&gt;h_source, adapter-&gt;mac_addr))</div><div class='add'>+	if (ether_addr_equal(phdr-&gt;h_source, adapter-&gt;mac_addr))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;fhash.fnum &gt;= adapter-&gt;fhash.fmax)</div><div class='hunk'>@@ -2212,8 +2235,7 @@ qlcnic_xmit_frame(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;flags &amp; QLCNIC_MACSPOOF) {</div><div class='ctx'> 		phdr = (struct ethhdr *)skb-&gt;data;</div><div class='del'>-		if (compare_ether_addr(phdr-&gt;h_source,</div><div class='del'>-					adapter-&gt;mac_addr))</div><div class='add'>+		if (!ether_addr_equal(phdr-&gt;h_source, adapter-&gt;mac_addr))</div><div class='ctx'> 			goto drop_packet;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3018,6 +3040,12 @@ qlcnic_dev_request_reset(struct qlcnic_adapter *adapter)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	state = QLCRD32(adapter, QLCNIC_CRB_DEV_STATE);</div><div class='add'>+	if (state  == QLCNIC_DEV_FAILED || (state == QLCNIC_DEV_BADBAD)) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev,</div><div class='add'>+				"Device is in FAILED state, Please Reboot\n");</div><div class='add'>+		qlcnic_api_unlock(adapter);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (state == QLCNIC_DEV_READY) {</div><div class='ctx'> 		QLCWR32(adapter, QLCNIC_CRB_DEV_STATE, QLCNIC_DEV_NEED_RESET);</div><div class='hunk'>@@ -3061,6 +3089,9 @@ qlcnic_cancel_fw_work(struct qlcnic_adapter *adapter)</div><div class='ctx'> 	while (test_and_set_bit(__QLCNIC_RESETTING, &amp;adapter-&gt;state))</div><div class='ctx'> 		msleep(10);</div><div class='ctx'> </div><div class='add'>+	if (!adapter-&gt;fw_work.work.func)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;adapter-&gt;fw_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4280,6 +4311,7 @@ static void</div><div class='ctx'> qlcnic_create_diag_entries(struct qlcnic_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='add'>+	u32 state = QLCRD32(adapter, QLCNIC_CRB_DEV_STATE);</div><div class='ctx'> </div><div class='ctx'> 	if (device_create_bin_file(dev, &amp;bin_attr_port_stats))</div><div class='ctx'> 		dev_info(dev, "failed to create port stats sysfs entry");</div><div class='hunk'>@@ -4288,14 +4320,19 @@ qlcnic_create_diag_entries(struct qlcnic_adapter *adapter)</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (device_create_file(dev, &amp;dev_attr_diag_mode))</div><div class='ctx'> 		dev_info(dev, "failed to create diag_mode sysfs entry\n");</div><div class='del'>-	if (device_create_file(dev, &amp;dev_attr_beacon))</div><div class='del'>-		dev_info(dev, "failed to create beacon sysfs entry");</div><div class='ctx'> 	if (device_create_bin_file(dev, &amp;bin_attr_crb))</div><div class='ctx'> 		dev_info(dev, "failed to create crb sysfs entry\n");</div><div class='ctx'> 	if (device_create_bin_file(dev, &amp;bin_attr_mem))</div><div class='ctx'> 		dev_info(dev, "failed to create mem sysfs entry\n");</div><div class='add'>+</div><div class='add'>+	if (state == QLCNIC_DEV_FAILED || (state == QLCNIC_DEV_BADBAD))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (device_create_bin_file(dev, &amp;bin_attr_pci_config))</div><div class='ctx'> 		dev_info(dev, "failed to create pci config sysfs entry");</div><div class='add'>+	if (device_create_file(dev, &amp;dev_attr_beacon))</div><div class='add'>+		dev_info(dev, "failed to create beacon sysfs entry");</div><div class='add'>+</div><div class='ctx'> 	if (!(adapter-&gt;flags &amp; QLCNIC_ESWITCH_ENABLED))</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (device_create_bin_file(dev, &amp;bin_attr_esw_config))</div><div class='hunk'>@@ -4314,16 +4351,19 @@ static void</div><div class='ctx'> qlcnic_remove_diag_entries(struct qlcnic_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='add'>+	u32 state = QLCRD32(adapter, QLCNIC_CRB_DEV_STATE);</div><div class='ctx'> </div><div class='ctx'> 	device_remove_bin_file(dev, &amp;bin_attr_port_stats);</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;op_mode == QLCNIC_NON_PRIV_FUNC)</div><div class='ctx'> 		return;</div><div class='ctx'> 	device_remove_file(dev, &amp;dev_attr_diag_mode);</div><div class='del'>-	device_remove_file(dev, &amp;dev_attr_beacon);</div><div class='ctx'> 	device_remove_bin_file(dev, &amp;bin_attr_crb);</div><div class='ctx'> 	device_remove_bin_file(dev, &amp;bin_attr_mem);</div><div class='add'>+	if (state == QLCNIC_DEV_FAILED || (state == QLCNIC_DEV_BADBAD))</div><div class='add'>+		return;</div><div class='ctx'> 	device_remove_bin_file(dev, &amp;bin_attr_pci_config);</div><div class='add'>+	device_remove_file(dev, &amp;dev_attr_beacon);</div><div class='ctx'> 	if (!(adapter-&gt;flags &amp; QLCNIC_ESWITCH_ENABLED))</div><div class='ctx'> 		return;</div><div class='ctx'> 	device_remove_bin_file(dev, &amp;bin_attr_esw_config);</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qlge/qlge_main.c b/drivers/net/ethernet/qlogic/qlge/qlge_main.c<br/>index 49343ec21c82..09d8d33171df 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlge/qlge_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/qlogic/qlge/qlge_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/qlogic/qlge/qlge_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/qlogic/qlge/qlge_main.c</a></div><div class='hunk'>@@ -3845,7 +3845,7 @@ static int ql_wol(struct ql_adapter *qdev)</div><div class='ctx'> 	if (qdev-&gt;wol &amp; (WAKE_ARP | WAKE_MAGICSECURE | WAKE_PHY | WAKE_UCAST |</div><div class='ctx'> 			WAKE_MCAST | WAKE_BCAST)) {</div><div class='ctx'> 		netif_err(qdev, ifdown, qdev-&gt;ndev,</div><div class='del'>-			  "Unsupported WOL paramter. qdev-&gt;wol = 0x%x.\n",</div><div class='add'>+			  "Unsupported WOL parameter. qdev-&gt;wol = 0x%x.\n",</div><div class='ctx'> 			  qdev-&gt;wol);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/rdc/r6040.c b/drivers/net/ethernet/rdc/r6040.c<br/>index b96e1920e045..d1827e887f4e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/rdc/r6040.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/rdc/r6040.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/rdc/r6040.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/rdc/r6040.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Copyright (C) 2004 Sten Wang &lt;sten.wang@rdc.com.tw&gt;</div><div class='ctx'>  * Copyright (C) 2007</div><div class='ctx'>  *	Daniel Gimpelevich &lt;daniel@gimpelevich.san-francisco.ca.us&gt;</div><div class='del'>- *	Florian Fainelli &lt;florian@openwrt.org&gt;</div><div class='add'>+ * Copyright (C) 2007-2012 Florian Fainelli &lt;florian@openwrt.org&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or</div><div class='ctx'>  * modify it under the terms of the GNU General Public License</div><div class='hunk'>@@ -74,9 +74,13 @@</div><div class='ctx'> #define MT_ICR		0x0C	/* TX interrupt control */</div><div class='ctx'> #define MR_ICR		0x10	/* RX interrupt control */</div><div class='ctx'> #define MTPR		0x14	/* TX poll command register */</div><div class='add'>+#define  TM2TX		0x0001	/* Trigger MAC to transmit */</div><div class='ctx'> #define MR_BSR		0x18	/* RX buffer size */</div><div class='ctx'> #define MR_DCR		0x1A	/* RX descriptor control */</div><div class='ctx'> #define MLSR		0x1C	/* Last status */</div><div class='add'>+#define  TX_FIFO_UNDR	0x0200	/* TX FIFO under-run */</div><div class='add'>+#define	 TX_EXCEEDC	0x2000	/* Transmit exceed collision */</div><div class='add'>+#define  TX_LATEC	0x4000	/* Transmit late collision */</div><div class='ctx'> #define MMDIO		0x20	/* MDIO control register */</div><div class='ctx'> #define  MDIO_WRITE	0x4000	/* MDIO write */</div><div class='ctx'> #define  MDIO_READ	0x2000	/* MDIO read */</div><div class='hunk'>@@ -124,6 +128,9 @@</div><div class='ctx'> #define MID_3M		0x82	/* MID3 Medium */</div><div class='ctx'> #define MID_3H		0x84	/* MID3 High */</div><div class='ctx'> #define PHY_CC		0x88	/* PHY status change configuration register */</div><div class='add'>+#define  SCEN		0x8000	/* PHY status change enable */</div><div class='add'>+#define  PHYAD_SHIFT	8	/* PHY address shift */</div><div class='add'>+#define  TMRDIV_SHIFT	0	/* Timer divider shift */</div><div class='ctx'> #define PHY_ST		0x8A	/* PHY status register */</div><div class='ctx'> #define MAC_SM		0xAC	/* MAC status machine */</div><div class='ctx'> #define  MAC_SM_RST	0x0002	/* MAC status machine reset */</div><div class='hunk'>@@ -137,6 +144,8 @@</div><div class='ctx'> #define MBCR_DEFAULT	0x012A	/* MAC Bus Control Register */</div><div class='ctx'> #define MCAST_MAX	3	/* Max number multicast addresses to filter */</div><div class='ctx'> </div><div class='add'>+#define MAC_DEF_TIMEOUT	2048	/* Default MAC read/write operation timeout */</div><div class='add'>+</div><div class='ctx'> /* Descriptor status */</div><div class='ctx'> #define DSC_OWNER_MAC	0x8000	/* MAC is the owner of this descriptor */</div><div class='ctx'> #define DSC_RX_OK	0x4000	/* RX was successful */</div><div class='hunk'>@@ -187,7 +196,7 @@ struct r6040_private {</div><div class='ctx'> 	dma_addr_t rx_ring_dma;</div><div class='ctx'> 	dma_addr_t tx_ring_dma;</div><div class='ctx'> 	u16	tx_free_desc;</div><div class='del'>-	u16	mcr0, mcr1;</div><div class='add'>+	u16	mcr0;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct mii_bus *mii_bus;</div><div class='ctx'> 	struct napi_struct napi;</div><div class='hunk'>@@ -204,7 +213,7 @@ static char version[] __devinitdata = DRV_NAME</div><div class='ctx'> /* Read a word data from PHY Chip */</div><div class='ctx'> static int r6040_phy_read(void __iomem *ioaddr, int phy_addr, int reg)</div><div class='ctx'> {</div><div class='del'>-	int limit = 2048;</div><div class='add'>+	int limit = MAC_DEF_TIMEOUT;</div><div class='ctx'> 	u16 cmd;</div><div class='ctx'> </div><div class='ctx'> 	iowrite16(MDIO_READ + reg + (phy_addr &lt;&lt; 8), ioaddr + MMDIO);</div><div class='hunk'>@@ -222,7 +231,7 @@ static int r6040_phy_read(void __iomem *ioaddr, int phy_addr, int reg)</div><div class='ctx'> static void r6040_phy_write(void __iomem *ioaddr,</div><div class='ctx'> 					int phy_addr, int reg, u16 val)</div><div class='ctx'> {</div><div class='del'>-	int limit = 2048;</div><div class='add'>+	int limit = MAC_DEF_TIMEOUT;</div><div class='ctx'> 	u16 cmd;</div><div class='ctx'> </div><div class='ctx'> 	iowrite16(val, ioaddr + MMWD);</div><div class='hunk'>@@ -358,27 +367,35 @@ err_exit:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void r6040_init_mac_regs(struct net_device *dev)</div><div class='add'>+static void r6040_reset_mac(struct r6040_private *lp)</div><div class='ctx'> {</div><div class='del'>-	struct r6040_private *lp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = lp-&gt;base;</div><div class='del'>-	int limit = 2048;</div><div class='add'>+	int limit = MAC_DEF_TIMEOUT;</div><div class='ctx'> 	u16 cmd;</div><div class='ctx'> </div><div class='del'>-	/* Mask Off Interrupt */</div><div class='del'>-	iowrite16(MSK_INT, ioaddr + MIER);</div><div class='del'>-</div><div class='del'>-	/* Reset RDC MAC */</div><div class='ctx'> 	iowrite16(MAC_RST, ioaddr + MCR1);</div><div class='ctx'> 	while (limit--) {</div><div class='ctx'> 		cmd = ioread16(ioaddr + MCR1);</div><div class='ctx'> 		if (cmd &amp; MAC_RST)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	/* Reset internal state machine */</div><div class='ctx'> 	iowrite16(MAC_SM_RST, ioaddr + MAC_SM);</div><div class='ctx'> 	iowrite16(0, ioaddr + MAC_SM);</div><div class='ctx'> 	mdelay(5);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void r6040_init_mac_regs(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct r6040_private *lp = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = lp-&gt;base;</div><div class='add'>+</div><div class='add'>+	/* Mask Off Interrupt */</div><div class='add'>+	iowrite16(MSK_INT, ioaddr + MIER);</div><div class='add'>+</div><div class='add'>+	/* Reset RDC MAC */</div><div class='add'>+	r6040_reset_mac(lp);</div><div class='ctx'> </div><div class='ctx'> 	/* MAC Bus Control Register */</div><div class='ctx'> 	iowrite16(MBCR_DEFAULT, ioaddr + MBCR);</div><div class='hunk'>@@ -407,7 +424,7 @@ static void r6040_init_mac_regs(struct net_device *dev)</div><div class='ctx'> 	/* Let TX poll the descriptors</div><div class='ctx'> 	 * we may got called by r6040_tx_timeout which has left</div><div class='ctx'> 	 * some unsent tx buffers */</div><div class='del'>-	iowrite16(0x01, ioaddr + MTPR);</div><div class='add'>+	iowrite16(TM2TX, ioaddr + MTPR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void r6040_tx_timeout(struct net_device *dev)</div><div class='hunk'>@@ -445,18 +462,13 @@ static void r6040_down(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct r6040_private *lp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = lp-&gt;base;</div><div class='del'>-	int limit = 2048;</div><div class='ctx'> 	u16 *adrp;</div><div class='del'>-	u16 cmd;</div><div class='ctx'> </div><div class='ctx'> 	/* Stop MAC */</div><div class='ctx'> 	iowrite16(MSK_INT, ioaddr + MIER);	/* Mask Off Interrupt */</div><div class='del'>-	iowrite16(MAC_RST, ioaddr + MCR1);	/* Reset RDC MAC */</div><div class='del'>-	while (limit--) {</div><div class='del'>-		cmd = ioread16(ioaddr + MCR1);</div><div class='del'>-		if (cmd &amp; MAC_RST)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	/* Reset RDC MAC */</div><div class='add'>+	r6040_reset_mac(lp);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore MAC Address to MIDx */</div><div class='ctx'> 	adrp = (u16 *) dev-&gt;dev_addr;</div><div class='hunk'>@@ -599,9 +611,9 @@ static void r6040_tx(struct net_device *dev)</div><div class='ctx'> 		/* Check for errors */</div><div class='ctx'> 		err = ioread16(ioaddr + MLSR);</div><div class='ctx'> </div><div class='del'>-		if (err &amp; 0x0200)</div><div class='del'>-			dev-&gt;stats.rx_fifo_errors++;</div><div class='del'>-		if (err &amp; (0x2000 | 0x4000))</div><div class='add'>+		if (err &amp; TX_FIFO_UNDR)</div><div class='add'>+			dev-&gt;stats.tx_fifo_errors++;</div><div class='add'>+		if (err &amp; (TX_EXCEEDC | TX_LATEC))</div><div class='ctx'> 			dev-&gt;stats.tx_carrier_errors++;</div><div class='ctx'> </div><div class='ctx'> 		if (descptr-&gt;status &amp; DSC_OWNER_MAC)</div><div class='hunk'>@@ -736,11 +748,7 @@ static void r6040_mac_address(struct net_device *dev)</div><div class='ctx'> 	u16 *adrp;</div><div class='ctx'> </div><div class='ctx'> 	/* Reset MAC */</div><div class='del'>-	iowrite16(MAC_RST, ioaddr + MCR1);</div><div class='del'>-	/* Reset internal state machine */</div><div class='del'>-	iowrite16(MAC_SM_RST, ioaddr + MAC_SM);</div><div class='del'>-	iowrite16(0, ioaddr + MAC_SM);</div><div class='del'>-	mdelay(5);</div><div class='add'>+	r6040_reset_mac(lp);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore MAC Address */</div><div class='ctx'> 	adrp = (u16 *) dev-&gt;dev_addr;</div><div class='hunk'>@@ -840,7 +848,7 @@ static netdev_tx_t r6040_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	skb_tx_timestamp(skb);</div><div class='ctx'> </div><div class='ctx'> 	/* Trigger the MAC to check the TX descriptor */</div><div class='del'>-	iowrite16(0x01, ioaddr + MTPR);</div><div class='add'>+	iowrite16(TM2TX, ioaddr + MTPR);</div><div class='ctx'> 	lp-&gt;tx_insert_ptr = descptr-&gt;vndescp;</div><div class='ctx'> </div><div class='ctx'> 	/* If no tx resource, stop */</div><div class='hunk'>@@ -973,6 +981,7 @@ static const struct ethtool_ops netdev_ethtool_ops = {</div><div class='ctx'> 	.get_settings		= netdev_get_settings,</div><div class='ctx'> 	.set_settings		= netdev_set_settings,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops r6040_netdev_ops = {</div><div class='hunk'>@@ -1087,20 +1096,20 @@ static int __devinit r6040_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "32-bit PCI DMA addresses"</div><div class='ctx'> 				"not supported by the card\n");</div><div class='del'>-		goto err_out;</div><div class='add'>+		goto err_out_disable_dev;</div><div class='ctx'> 	}</div><div class='ctx'> 	err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "32-bit PCI DMA addresses"</div><div class='ctx'> 				"not supported by the card\n");</div><div class='del'>-		goto err_out;</div><div class='add'>+		goto err_out_disable_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* IO Size check */</div><div class='ctx'> 	if (pci_resource_len(pdev, bar) &lt; io_size) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Insufficient PCI resources, aborting\n");</div><div class='ctx'> 		err = -EIO;</div><div class='del'>-		goto err_out;</div><div class='add'>+		goto err_out_disable_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='hunk'>@@ -1108,7 +1117,7 @@ static int __devinit r6040_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	dev = alloc_etherdev(sizeof(struct r6040_private));</div><div class='ctx'> 	if (!dev) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='del'>-		goto err_out;</div><div class='add'>+		goto err_out_disable_dev;</div><div class='ctx'> 	}</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> 	lp = netdev_priv(dev);</div><div class='hunk'>@@ -1126,10 +1135,15 @@ static int __devinit r6040_init_one(struct pci_dev *pdev,</div><div class='ctx'> 		err = -EIO;</div><div class='ctx'> 		goto err_out_free_res;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	/* If PHY status change register is still set to zero it means the</div><div class='del'>-	 * bootloader didn't initialize it */</div><div class='add'>+	 * bootloader didn't initialize it, so we set it to:</div><div class='add'>+	 * - enable phy status change</div><div class='add'>+	 * - enable all phy addresses</div><div class='add'>+	 * - set to lowest timer divider */</div><div class='ctx'> 	if (ioread16(ioaddr + PHY_CC) == 0)</div><div class='del'>-		iowrite16(0x9f07, ioaddr + PHY_CC);</div><div class='add'>+		iowrite16(SCEN | PHY_MAX_ADDR &lt;&lt; PHYAD_SHIFT |</div><div class='add'>+				7 &lt;&lt; TMRDIV_SHIFT, ioaddr + PHY_CC);</div><div class='ctx'> </div><div class='ctx'> 	/* Init system &amp; device */</div><div class='ctx'> 	lp-&gt;base = ioaddr;</div><div class='hunk'>@@ -1219,11 +1233,15 @@ err_out_mdio_irq:</div><div class='ctx'> err_out_mdio:</div><div class='ctx'> 	mdiobus_free(lp-&gt;mii_bus);</div><div class='ctx'> err_out_unmap:</div><div class='add'>+	netif_napi_del(&amp;lp-&gt;napi);</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> 	pci_iounmap(pdev, ioaddr);</div><div class='ctx'> err_out_free_res:</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> err_out_free_dev:</div><div class='ctx'> 	free_netdev(dev);</div><div class='add'>+err_out_disable_dev:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='ctx'> err_out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1237,6 +1255,9 @@ static void __devexit r6040_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 	mdiobus_unregister(lp-&gt;mii_bus);</div><div class='ctx'> 	kfree(lp-&gt;mii_bus-&gt;irq);</div><div class='ctx'> 	mdiobus_free(lp-&gt;mii_bus);</div><div class='add'>+	netif_napi_del(&amp;lp-&gt;napi);</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+	pci_iounmap(pdev, lp-&gt;base);</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='head'>diff --git a/drivers/net/ethernet/realtek/8139cp.c b/drivers/net/ethernet/realtek/8139cp.c<br/>index b3287c0fe279..995d0cfc4c06 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/realtek/8139cp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/realtek/8139cp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/realtek/8139cp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/realtek/8139cp.c</a></div><div class='hunk'>@@ -635,9 +635,12 @@ static irqreturn_t cp_interrupt (int irq, void *dev_instance)</div><div class='ctx'>  */</div><div class='ctx'> static void cp_poll_controller(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='del'>-	cp_interrupt(dev-&gt;irq, dev);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	struct cp_private *cp = netdev_priv(dev);</div><div class='add'>+	const int irq = cp-&gt;pdev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	disable_irq(irq);</div><div class='add'>+	cp_interrupt(irq, dev);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -976,6 +979,17 @@ static void cp_init_hw (struct cp_private *cp)</div><div class='ctx'> 	cpw32_f (MAC0 + 0, le32_to_cpu (*(__le32 *) (dev-&gt;dev_addr + 0)));</div><div class='ctx'> 	cpw32_f (MAC0 + 4, le32_to_cpu (*(__le32 *) (dev-&gt;dev_addr + 4)));</div><div class='ctx'> </div><div class='add'>+	cpw32_f(HiTxRingAddr, 0);</div><div class='add'>+	cpw32_f(HiTxRingAddr + 4, 0);</div><div class='add'>+</div><div class='add'>+	ring_dma = cp-&gt;ring_dma;</div><div class='add'>+	cpw32_f(RxRingAddr, ring_dma &amp; 0xffffffff);</div><div class='add'>+	cpw32_f(RxRingAddr + 4, (ring_dma &gt;&gt; 16) &gt;&gt; 16);</div><div class='add'>+</div><div class='add'>+	ring_dma += sizeof(struct cp_desc) * CP_RX_RING_SIZE;</div><div class='add'>+	cpw32_f(TxRingAddr, ring_dma &amp; 0xffffffff);</div><div class='add'>+	cpw32_f(TxRingAddr + 4, (ring_dma &gt;&gt; 16) &gt;&gt; 16);</div><div class='add'>+</div><div class='ctx'> 	cp_start_hw(cp);</div><div class='ctx'> 	cpw8(TxThresh, 0x06); /* XXX convert magic num to a constant */</div><div class='ctx'> </div><div class='hunk'>@@ -989,17 +1003,6 @@ static void cp_init_hw (struct cp_private *cp)</div><div class='ctx'> </div><div class='ctx'> 	cpw8(Config5, cpr8(Config5) &amp; PMEStatus);</div><div class='ctx'> </div><div class='del'>-	cpw32_f(HiTxRingAddr, 0);</div><div class='del'>-	cpw32_f(HiTxRingAddr + 4, 0);</div><div class='del'>-</div><div class='del'>-	ring_dma = cp-&gt;ring_dma;</div><div class='del'>-	cpw32_f(RxRingAddr, ring_dma &amp; 0xffffffff);</div><div class='del'>-	cpw32_f(RxRingAddr + 4, (ring_dma &gt;&gt; 16) &gt;&gt; 16);</div><div class='del'>-</div><div class='del'>-	ring_dma += sizeof(struct cp_desc) * CP_RX_RING_SIZE;</div><div class='del'>-	cpw32_f(TxRingAddr, ring_dma &amp; 0xffffffff);</div><div class='del'>-	cpw32_f(TxRingAddr + 4, (ring_dma &gt;&gt; 16) &gt;&gt; 16);</div><div class='del'>-</div><div class='ctx'> 	cpw16(MultiIntr, 0);</div><div class='ctx'> </div><div class='ctx'> 	cpw8_f(Cfg9346, Cfg9346_Lock);</div><div class='hunk'>@@ -1117,6 +1120,7 @@ static void cp_free_rings (struct cp_private *cp)</div><div class='ctx'> static int cp_open (struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct cp_private *cp = netdev_priv(dev);</div><div class='add'>+	const int irq = cp-&gt;pdev-&gt;irq;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(cp, ifup, dev, "enabling interface\n");</div><div class='hunk'>@@ -1129,7 +1133,7 @@ static int cp_open (struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	cp_init_hw(cp);</div><div class='ctx'> </div><div class='del'>-	rc = request_irq(dev-&gt;irq, cp_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	rc = request_irq(irq, cp_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto err_out_hw;</div><div class='ctx'> </div><div class='hunk'>@@ -1166,7 +1170,7 @@ static int cp_close (struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cp-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(cp-&gt;pdev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	cp_free_rings(cp);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1632,7 +1636,7 @@ static void eeprom_cmd(void __iomem *ee_addr, int cmd, int cmd_len)</div><div class='ctx'> </div><div class='ctx'> static void eeprom_cmd_end(void __iomem *ee_addr)</div><div class='ctx'> {</div><div class='del'>-	writeb (~EE_CS, ee_addr);</div><div class='add'>+	writeb(0, ee_addr);</div><div class='ctx'> 	eeprom_delay ();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1914,7 +1918,6 @@ static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		       (unsigned long long)pciaddr);</div><div class='ctx'> 		goto err_out_res;</div><div class='ctx'> 	}</div><div class='del'>-	dev-&gt;base_addr = (unsigned long) regs;</div><div class='ctx'> 	cp-&gt;regs = regs;</div><div class='ctx'> </div><div class='ctx'> 	cp_stop_hw(cp);</div><div class='hunk'>@@ -1942,14 +1945,12 @@ static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	dev-&gt;vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |</div><div class='ctx'> 		NETIF_F_HIGHDMA;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-</div><div class='ctx'> 	rc = register_netdev(dev);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto err_out_iomap;</div><div class='ctx'> </div><div class='del'>-	netdev_info(dev, "RTL-8139C+ at 0x%lx, %pM, IRQ %d\n",</div><div class='del'>-		    dev-&gt;base_addr, dev-&gt;dev_addr, dev-&gt;irq);</div><div class='add'>+	netdev_info(dev, "RTL-8139C+ at 0x%p, %pM, IRQ %d\n",</div><div class='add'>+		    regs, dev-&gt;dev_addr, pdev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata(pdev, dev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/realtek/8139too.c b/drivers/net/ethernet/realtek/8139too.c<br/>index df7fd8d083dc..1d83565cc6af 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/realtek/8139too.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/realtek/8139too.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/realtek/8139too.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/realtek/8139too.c</a></div><div class='hunk'>@@ -148,9 +148,9 @@ static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};</div><div class='ctx'> </div><div class='ctx'> /* Whether to use MMIO or PIO. Default to MMIO. */</div><div class='ctx'> #ifdef CONFIG_8139TOO_PIO</div><div class='del'>-static int use_io = 1;</div><div class='add'>+static bool use_io = true;</div><div class='ctx'> #else</div><div class='del'>-static int use_io = 0;</div><div class='add'>+static bool use_io = false;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).</div><div class='hunk'>@@ -620,7 +620,7 @@ MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_VERSION(DRV_VERSION);</div><div class='ctx'> </div><div class='del'>-module_param(use_io, int, 0);</div><div class='add'>+module_param(use_io, bool, 0);</div><div class='ctx'> MODULE_PARM_DESC(use_io, "Force use of I/O access mode. 0=MMIO 1=PIO");</div><div class='ctx'> module_param(multicast_filter_limit, int, 0);</div><div class='ctx'> module_param_array(media, int, NULL, 0);</div><div class='hunk'>@@ -750,15 +750,22 @@ static void rtl8139_chip_reset (void __iomem *ioaddr)</div><div class='ctx'> </div><div class='ctx'> static __devinit struct net_device * rtl8139_init_board (struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct device *d = &amp;pdev-&gt;dev;</div><div class='ctx'> 	void __iomem *ioaddr;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct rtl8139_private *tp;</div><div class='ctx'> 	u8 tmp8;</div><div class='ctx'> 	int rc, disable_dev_on_err = 0;</div><div class='del'>-	unsigned int i;</div><div class='del'>-	unsigned long pio_start, pio_end, pio_flags, pio_len;</div><div class='del'>-	unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;</div><div class='add'>+	unsigned int i, bar;</div><div class='add'>+	unsigned long io_len;</div><div class='ctx'> 	u32 version;</div><div class='add'>+	static const struct {</div><div class='add'>+		unsigned long mask;</div><div class='add'>+		char *type;</div><div class='add'>+	} res[] = {</div><div class='add'>+		{ IORESOURCE_IO,  "PIO" },</div><div class='add'>+		{ IORESOURCE_MEM, "MMIO" }</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	assert (pdev != NULL);</div><div class='ctx'> </div><div class='hunk'>@@ -777,78 +784,45 @@ static __devinit struct net_device * rtl8139_init_board (struct pci_dev *pdev)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> </div><div class='del'>-	pio_start = pci_resource_start (pdev, 0);</div><div class='del'>-	pio_end = pci_resource_end (pdev, 0);</div><div class='del'>-	pio_flags = pci_resource_flags (pdev, 0);</div><div class='del'>-	pio_len = pci_resource_len (pdev, 0);</div><div class='del'>-</div><div class='del'>-	mmio_start = pci_resource_start (pdev, 1);</div><div class='del'>-	mmio_end = pci_resource_end (pdev, 1);</div><div class='del'>-	mmio_flags = pci_resource_flags (pdev, 1);</div><div class='del'>-	mmio_len = pci_resource_len (pdev, 1);</div><div class='del'>-</div><div class='del'>-	/* set this immediately, we need to know before</div><div class='del'>-	 * we talk to the chip directly */</div><div class='del'>-	pr_debug("PIO region size == 0x%02lX\n", pio_len);</div><div class='del'>-	pr_debug("MMIO region size == 0x%02lX\n", mmio_len);</div><div class='del'>-</div><div class='del'>-retry:</div><div class='del'>-	if (use_io) {</div><div class='del'>-		/* make sure PCI base addr 0 is PIO */</div><div class='del'>-		if (!(pio_flags &amp; IORESOURCE_IO)) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "region #0 not a PIO resource, aborting\n");</div><div class='del'>-			rc = -ENODEV;</div><div class='del'>-			goto err_out;</div><div class='del'>-		}</div><div class='del'>-		/* check for weird/broken PCI region reporting */</div><div class='del'>-		if (pio_len &lt; RTL_MIN_IO_SIZE) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "Invalid PCI I/O region size(s), aborting\n");</div><div class='del'>-			rc = -ENODEV;</div><div class='del'>-			goto err_out;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		/* make sure PCI base addr 1 is MMIO */</div><div class='del'>-		if (!(mmio_flags &amp; IORESOURCE_MEM)) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "region #1 not an MMIO resource, aborting\n");</div><div class='del'>-			rc = -ENODEV;</div><div class='del'>-			goto err_out;</div><div class='del'>-		}</div><div class='del'>-		if (mmio_len &lt; RTL_MIN_IO_SIZE) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "Invalid PCI mem region size(s), aborting\n");</div><div class='del'>-			rc = -ENODEV;</div><div class='del'>-			goto err_out;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	rc = pci_request_regions (pdev, DRV_NAME);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	disable_dev_on_err = 1;</div><div class='ctx'> </div><div class='del'>-	/* enable PCI bus-mastering */</div><div class='ctx'> 	pci_set_master (pdev);</div><div class='ctx'> </div><div class='del'>-	if (use_io) {</div><div class='del'>-		ioaddr = pci_iomap(pdev, 0, 0);</div><div class='del'>-		if (!ioaddr) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "cannot map PIO, aborting\n");</div><div class='del'>-			rc = -EIO;</div><div class='del'>-			goto err_out;</div><div class='del'>-		}</div><div class='del'>-		dev-&gt;base_addr = pio_start;</div><div class='del'>-		tp-&gt;regs_len = pio_len;</div><div class='del'>-	} else {</div><div class='del'>-		/* ioremap MMIO region */</div><div class='del'>-		ioaddr = pci_iomap(pdev, 1, 0);</div><div class='del'>-		if (ioaddr == NULL) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "cannot remap MMIO, trying PIO\n");</div><div class='del'>-			pci_release_regions(pdev);</div><div class='del'>-			use_io = 1;</div><div class='add'>+retry:</div><div class='add'>+	/* PIO bar register comes first. */</div><div class='add'>+	bar = !use_io;</div><div class='add'>+</div><div class='add'>+	io_len = pci_resource_len(pdev, bar);</div><div class='add'>+</div><div class='add'>+	dev_dbg(d, "%s region size = 0x%02lX\n", res[bar].type, io_len);</div><div class='add'>+</div><div class='add'>+	if (!(pci_resource_flags(pdev, bar) &amp; res[bar].mask)) {</div><div class='add'>+		dev_err(d, "region #%d not a %s resource, aborting\n", bar,</div><div class='add'>+			res[bar].type);</div><div class='add'>+		rc = -ENODEV;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+	if (io_len &lt; RTL_MIN_IO_SIZE) {</div><div class='add'>+		dev_err(d, "Invalid PCI %s region size(s), aborting\n",</div><div class='add'>+			res[bar].type);</div><div class='add'>+		rc = -ENODEV;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ioaddr = pci_iomap(pdev, bar, 0);</div><div class='add'>+	if (!ioaddr) {</div><div class='add'>+		dev_err(d, "cannot map %s\n", res[bar].type);</div><div class='add'>+		if (!use_io) {</div><div class='add'>+			use_io = true;</div><div class='ctx'> 			goto retry;</div><div class='ctx'> 		}</div><div class='del'>-		dev-&gt;base_addr = (long) ioaddr;</div><div class='del'>-		tp-&gt;regs_len = mmio_len;</div><div class='add'>+		rc = -ENODEV;</div><div class='add'>+		goto err_out;</div><div class='ctx'> 	}</div><div class='add'>+	tp-&gt;regs_len = io_len;</div><div class='ctx'> 	tp-&gt;mmio_addr = ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	/* Bring old chips out of low-power mode. */</div><div class='hunk'>@@ -1035,8 +1009,6 @@ static int __devinit rtl8139_init_one (struct pci_dev *pdev,</div><div class='ctx'> 	dev-&gt;hw_features |= NETIF_F_RXALL;</div><div class='ctx'> 	dev-&gt;hw_features |= NETIF_F_RXFCS;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-</div><div class='ctx'> 	/* tp zeroed and aligned in alloc_etherdev */</div><div class='ctx'> 	tp = netdev_priv(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1062,9 +1034,9 @@ static int __devinit rtl8139_init_one (struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata (pdev, dev);</div><div class='ctx'> </div><div class='del'>-	netdev_info(dev, "%s at 0x%lx, %pM, IRQ %d\n",</div><div class='add'>+	netdev_info(dev, "%s at 0x%p, %pM, IRQ %d\n",</div><div class='ctx'> 		    board_info[ent-&gt;driver_data].name,</div><div class='del'>-		    dev-&gt;base_addr, dev-&gt;dev_addr, dev-&gt;irq);</div><div class='add'>+		    ioaddr, dev-&gt;dev_addr, pdev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(dev, "Identified 8139 chip type '%s'\n",</div><div class='ctx'> 		   rtl_chip_info[tp-&gt;chipset].name);</div><div class='hunk'>@@ -1201,7 +1173,7 @@ static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_l</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Terminate the EEPROM access. */</div><div class='del'>-	RTL_W8 (Cfg9346, ~EE_CS);</div><div class='add'>+	RTL_W8(Cfg9346, 0);</div><div class='ctx'> 	eeprom_delay ();</div><div class='ctx'> </div><div class='ctx'> 	return retval;</div><div class='hunk'>@@ -1339,10 +1311,11 @@ static void mdio_write (struct net_device *dev, int phy_id, int location,</div><div class='ctx'> static int rtl8139_open (struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl8139_private *tp = netdev_priv(dev);</div><div class='del'>-	int retval;</div><div class='ctx'> 	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	const int irq = tp-&gt;pci_dev-&gt;irq;</div><div class='add'>+	int retval;</div><div class='ctx'> </div><div class='del'>-	retval = request_irq (dev-&gt;irq, rtl8139_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	retval = request_irq(irq, rtl8139_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='ctx'> 	if (retval)</div><div class='ctx'> 		return retval;</div><div class='ctx'> </div><div class='hunk'>@@ -1351,7 +1324,7 @@ static int rtl8139_open (struct net_device *dev)</div><div class='ctx'> 	tp-&gt;rx_ring = dma_alloc_coherent(&amp;tp-&gt;pci_dev-&gt;dev, RX_BUF_TOT_LEN,</div><div class='ctx'> 					   &amp;tp-&gt;rx_ring_dma, GFP_KERNEL);</div><div class='ctx'> 	if (tp-&gt;tx_bufs == NULL || tp-&gt;rx_ring == NULL) {</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='add'>+		free_irq(irq, dev);</div><div class='ctx'> </div><div class='ctx'> 		if (tp-&gt;tx_bufs)</div><div class='ctx'> 			dma_free_coherent(&amp;tp-&gt;pci_dev-&gt;dev, TX_BUF_TOT_LEN,</div><div class='hunk'>@@ -1377,7 +1350,7 @@ static int rtl8139_open (struct net_device *dev)</div><div class='ctx'> 		  "%s() ioaddr %#llx IRQ %d GP Pins %02x %s-duplex\n",</div><div class='ctx'> 		  __func__,</div><div class='ctx'> 		  (unsigned long long)pci_resource_start (tp-&gt;pci_dev, 1),</div><div class='del'>-		  dev-&gt;irq, RTL_R8 (MediaStatus),</div><div class='add'>+		  irq, RTL_R8 (MediaStatus),</div><div class='ctx'> 		  tp-&gt;mii.full_duplex ? "full" : "half");</div><div class='ctx'> </div><div class='ctx'> 	rtl8139_start_thread(tp);</div><div class='hunk'>@@ -2240,9 +2213,12 @@ static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance)</div><div class='ctx'>  */</div><div class='ctx'> static void rtl8139_poll_controller(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='del'>-	rtl8139_interrupt(dev-&gt;irq, dev);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	struct rtl8139_private *tp = netdev_priv(dev);</div><div class='add'>+	const int irq = tp-&gt;pci_dev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	disable_irq(irq);</div><div class='add'>+	rtl8139_interrupt(irq, dev);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -2295,7 +2271,7 @@ static int rtl8139_close (struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore (&amp;tp-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	free_irq (dev-&gt;irq, dev);</div><div class='add'>+	free_irq(tp-&gt;pci_dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	rtl8139_tx_clear (tp);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c<br/>index f54509377efa..9757ce3543a0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/realtek/r8169.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/realtek/r8169.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/realtek/r8169.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/realtek/r8169.c</a></div><div class='hunk'>@@ -44,6 +44,8 @@</div><div class='ctx'> #define FIRMWARE_8168F_1	"rtl_nic/rtl8168f-1.fw"</div><div class='ctx'> #define FIRMWARE_8168F_2	"rtl_nic/rtl8168f-2.fw"</div><div class='ctx'> #define FIRMWARE_8105E_1	"rtl_nic/rtl8105e-1.fw"</div><div class='add'>+#define FIRMWARE_8402_1		"rtl_nic/rtl8402-1.fw"</div><div class='add'>+#define FIRMWARE_8411_1		"rtl_nic/rtl8411-1.fw"</div><div class='ctx'> </div><div class='ctx'> #ifdef RTL8169_DEBUG</div><div class='ctx'> #define assert(expr) \</div><div class='hunk'>@@ -61,8 +63,12 @@</div><div class='ctx'> #define R8169_MSG_DEFAULT \</div><div class='ctx'> 	(NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)</div><div class='ctx'> </div><div class='del'>-#define TX_BUFFS_AVAIL(tp) \</div><div class='del'>-	(tp-&gt;dirty_tx + NUM_TX_DESC - tp-&gt;cur_tx - 1)</div><div class='add'>+#define TX_SLOTS_AVAIL(tp) \</div><div class='add'>+	(tp-&gt;dirty_tx + NUM_TX_DESC - tp-&gt;cur_tx)</div><div class='add'>+</div><div class='add'>+/* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */</div><div class='add'>+#define TX_FRAGS_READY_FOR(tp,nr_frags) \</div><div class='add'>+	(TX_SLOTS_AVAIL(tp) &gt;= (nr_frags + 1))</div><div class='ctx'> </div><div class='ctx'> /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).</div><div class='ctx'>    The RTL chips use a 64 element hash table based on the Ethernet CRC. */</div><div class='hunk'>@@ -133,6 +139,8 @@ enum mac_version {</div><div class='ctx'> 	RTL_GIGA_MAC_VER_34,</div><div class='ctx'> 	RTL_GIGA_MAC_VER_35,</div><div class='ctx'> 	RTL_GIGA_MAC_VER_36,</div><div class='add'>+	RTL_GIGA_MAC_VER_37,</div><div class='add'>+	RTL_GIGA_MAC_VER_38,</div><div class='ctx'> 	RTL_GIGA_MAC_NONE   = 0xff,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -245,6 +253,12 @@ static const struct {</div><div class='ctx'> 	[RTL_GIGA_MAC_VER_36] =</div><div class='ctx'> 		_R("RTL8168f/8111f",	RTL_TD_1, FIRMWARE_8168F_2,</div><div class='ctx'> 							JUMBO_9K, false),</div><div class='add'>+	[RTL_GIGA_MAC_VER_37] =</div><div class='add'>+		_R("RTL8402",		RTL_TD_1, FIRMWARE_8402_1,</div><div class='add'>+							JUMBO_1K, true),</div><div class='add'>+	[RTL_GIGA_MAC_VER_38] =</div><div class='add'>+		_R("RTL8411",		RTL_TD_1, FIRMWARE_8411_1,</div><div class='add'>+							JUMBO_9K, false),</div><div class='ctx'> };</div><div class='ctx'> #undef _R</div><div class='ctx'> </div><div class='hunk'>@@ -315,6 +329,8 @@ enum rtl_registers {</div><div class='ctx'> 	Config0		= 0x51,</div><div class='ctx'> 	Config1		= 0x52,</div><div class='ctx'> 	Config2		= 0x53,</div><div class='add'>+#define PME_SIGNAL			(1 &lt;&lt; 5)	/* 8168c and later */</div><div class='add'>+</div><div class='ctx'> 	Config3		= 0x54,</div><div class='ctx'> 	Config4		= 0x55,</div><div class='ctx'> 	Config5		= 0x56,</div><div class='hunk'>@@ -355,6 +371,9 @@ enum rtl8168_8101_registers {</div><div class='ctx'> #define	CSIAR_BYTE_ENABLE		0x0f</div><div class='ctx'> #define	CSIAR_BYTE_ENABLE_SHIFT		12</div><div class='ctx'> #define	CSIAR_ADDR_MASK			0x0fff</div><div class='add'>+#define CSIAR_FUNC_CARD			0x00000000</div><div class='add'>+#define CSIAR_FUNC_SDIO			0x00010000</div><div class='add'>+#define CSIAR_FUNC_NIC			0x00020000</div><div class='ctx'> 	PMCH			= 0x6f,</div><div class='ctx'> 	EPHYAR			= 0x80,</div><div class='ctx'> #define	EPHYAR_FLAG			0x80000000</div><div class='hunk'>@@ -716,6 +735,11 @@ struct rtl8169_private {</div><div class='ctx'> 		void (*disable)(struct rtl8169_private *);</div><div class='ctx'> 	} jumbo_ops;</div><div class='ctx'> </div><div class='add'>+	struct csi_ops {</div><div class='add'>+		void (*write)(void __iomem *, int, int);</div><div class='add'>+		u32 (*read)(void __iomem *, int);</div><div class='add'>+	} csi_ops;</div><div class='add'>+</div><div class='ctx'> 	int (*set_speed)(struct net_device *, u8 aneg, u16 sp, u8 dpx, u32 adv);</div><div class='ctx'> 	int (*get_settings)(struct net_device *, struct ethtool_cmd *);</div><div class='ctx'> 	void (*phy_reset_enable)(struct rtl8169_private *tp);</div><div class='hunk'>@@ -768,6 +792,8 @@ MODULE_FIRMWARE(FIRMWARE_8168E_3);</div><div class='ctx'> MODULE_FIRMWARE(FIRMWARE_8105E_1);</div><div class='ctx'> MODULE_FIRMWARE(FIRMWARE_8168F_1);</div><div class='ctx'> MODULE_FIRMWARE(FIRMWARE_8168F_2);</div><div class='add'>+MODULE_FIRMWARE(FIRMWARE_8402_1);</div><div class='add'>+MODULE_FIRMWARE(FIRMWARE_8411_1);</div><div class='ctx'> </div><div class='ctx'> static void rtl_lock_work(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='hunk'>@@ -1078,40 +1104,6 @@ static u16 rtl_ephy_read(void __iomem *ioaddr, int reg_addr)</div><div class='ctx'> 	return value;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_csi_write(void __iomem *ioaddr, int addr, int value)</div><div class='del'>-{</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	RTL_W32(CSIDR, value);</div><div class='del'>-	RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr &amp; CSIAR_ADDR_MASK) |</div><div class='del'>-		CSIAR_BYTE_ENABLE &lt;&lt; CSIAR_BYTE_ENABLE_SHIFT);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 100; i++) {</div><div class='del'>-		if (!(RTL_R32(CSIAR) &amp; CSIAR_FLAG))</div><div class='del'>-			break;</div><div class='del'>-		udelay(10);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 rtl_csi_read(void __iomem *ioaddr, int addr)</div><div class='del'>-{</div><div class='del'>-	u32 value = ~0x00;</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	RTL_W32(CSIAR, (addr &amp; CSIAR_ADDR_MASK) |</div><div class='del'>-		CSIAR_BYTE_ENABLE &lt;&lt; CSIAR_BYTE_ENABLE_SHIFT);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 100; i++) {</div><div class='del'>-		if (RTL_R32(CSIAR) &amp; CSIAR_FLAG) {</div><div class='del'>-			value = RTL_R32(CSIDR);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		udelay(10);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return value;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static</div><div class='ctx'> void rtl_eri_write(void __iomem *ioaddr, int addr, u32 mask, u32 val, int type)</div><div class='ctx'> {</div><div class='hunk'>@@ -1281,7 +1273,8 @@ static void rtl_link_chg_patch(struct rtl8169_private *tp)</div><div class='ctx'> 	if (!netif_running(dev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_34) {</div><div class='add'>+	if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_34 ||</div><div class='add'>+	    tp-&gt;mac_version == RTL_GIGA_MAC_VER_38) {</div><div class='ctx'> 		if (RTL_R8(PHYstatus) &amp; _1000bpsF) {</div><div class='ctx'> 			rtl_eri_write(ioaddr, 0x1bc, ERIAR_MASK_1111,</div><div class='ctx'> 				      0x00000011, ERIAR_EXGMAC);</div><div class='hunk'>@@ -1316,6 +1309,16 @@ static void rtl_link_chg_patch(struct rtl8169_private *tp)</div><div class='ctx'> 			rtl_eri_write(ioaddr, 0x1dc, ERIAR_MASK_1111,</div><div class='ctx'> 				      0x0000003f, ERIAR_EXGMAC);</div><div class='ctx'> 		}</div><div class='add'>+	} else if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_37) {</div><div class='add'>+		if (RTL_R8(PHYstatus) &amp; _10bps) {</div><div class='add'>+			rtl_eri_write(ioaddr, 0x1d0, ERIAR_MASK_0011,</div><div class='add'>+				      0x4d02, ERIAR_EXGMAC);</div><div class='add'>+			rtl_eri_write(ioaddr, 0x1dc, ERIAR_MASK_0011,</div><div class='add'>+				      0x0060, ERIAR_EXGMAC);</div><div class='add'>+		} else {</div><div class='add'>+			rtl_eri_write(ioaddr, 0x1d0, ERIAR_MASK_0011,</div><div class='add'>+				      0x0000, ERIAR_EXGMAC);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1396,7 +1399,6 @@ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)</div><div class='ctx'> 		u16 reg;</div><div class='ctx'> 		u8  mask;</div><div class='ctx'> 	} cfg[] = {</div><div class='del'>-		{ WAKE_ANY,   Config1, PMEnable },</div><div class='ctx'> 		{ WAKE_PHY,   Config3, LinkUp },</div><div class='ctx'> 		{ WAKE_MAGIC, Config3, MagicPacket },</div><div class='ctx'> 		{ WAKE_UCAST, Config5, UWF },</div><div class='hunk'>@@ -1404,16 +1406,32 @@ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)</div><div class='ctx'> 		{ WAKE_MCAST, Config5, MWF },</div><div class='ctx'> 		{ WAKE_ANY,   Config5, LanWake }</div><div class='ctx'> 	};</div><div class='add'>+	u8 options;</div><div class='ctx'> </div><div class='ctx'> 	RTL_W8(Cfg9346, Cfg9346_Unlock);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(cfg); i++) {</div><div class='del'>-		u8 options = RTL_R8(cfg[i].reg) &amp; ~cfg[i].mask;</div><div class='add'>+		options = RTL_R8(cfg[i].reg) &amp; ~cfg[i].mask;</div><div class='ctx'> 		if (wolopts &amp; cfg[i].opt)</div><div class='ctx'> 			options |= cfg[i].mask;</div><div class='ctx'> 		RTL_W8(cfg[i].reg, options);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	switch (tp-&gt;mac_version) {</div><div class='add'>+	case RTL_GIGA_MAC_VER_01 ... RTL_GIGA_MAC_VER_17:</div><div class='add'>+		options = RTL_R8(Config1) &amp; ~PMEnable;</div><div class='add'>+		if (wolopts)</div><div class='add'>+			options |= PMEnable;</div><div class='add'>+		RTL_W8(Config1, options);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		options = RTL_R8(Config2) &amp; ~PME_SIGNAL;</div><div class='add'>+		if (wolopts)</div><div class='add'>+			options |= PME_SIGNAL;</div><div class='add'>+		RTL_W8(Config2, options);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	RTL_W8(Cfg9346, Cfg9346_Lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1853,6 +1871,7 @@ static const struct ethtool_ops rtl8169_ethtool_ops = {</div><div class='ctx'> 	.get_strings		= rtl8169_get_strings,</div><div class='ctx'> 	.get_sset_count		= rtl8169_get_sset_count,</div><div class='ctx'> 	.get_ethtool_stats	= rtl8169_get_ethtool_stats,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void rtl8169_get_mac_version(struct rtl8169_private *tp,</div><div class='hunk'>@@ -1876,6 +1895,7 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,</div><div class='ctx'> 		int mac_version;</div><div class='ctx'> 	} mac_info[] = {</div><div class='ctx'> 		/* 8168F family. */</div><div class='add'>+		{ 0x7c800000, 0x48800000,	RTL_GIGA_MAC_VER_38 },</div><div class='ctx'> 		{ 0x7cf00000, 0x48100000,	RTL_GIGA_MAC_VER_36 },</div><div class='ctx'> 		{ 0x7cf00000, 0x48000000,	RTL_GIGA_MAC_VER_35 },</div><div class='ctx'> </div><div class='hunk'>@@ -1913,6 +1933,7 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,</div><div class='ctx'> 		{ 0x7c800000, 0x30000000,	RTL_GIGA_MAC_VER_11 },</div><div class='ctx'> </div><div class='ctx'> 		/* 8101 family. */</div><div class='add'>+		{ 0x7c800000, 0x44000000,	RTL_GIGA_MAC_VER_37 },</div><div class='ctx'> 		{ 0x7cf00000, 0x40b00000,	RTL_GIGA_MAC_VER_30 },</div><div class='ctx'> 		{ 0x7cf00000, 0x40a00000,	RTL_GIGA_MAC_VER_30 },</div><div class='ctx'> 		{ 0x7cf00000, 0x40900000,	RTL_GIGA_MAC_VER_29 },</div><div class='hunk'>@@ -3013,6 +3034,28 @@ static void rtl8168e_2_hw_phy_config(struct rtl8169_private *tp)</div><div class='ctx'> 	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rtl8168f_hw_phy_config(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='add'>+	/* For 4-corner performance improve */</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0005);</div><div class='add'>+	rtl_writephy(tp, 0x05, 0x8b80);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x06, 0x0006, 0x0000);</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='add'>+</div><div class='add'>+	/* PHY auto speed down */</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0007);</div><div class='add'>+	rtl_writephy(tp, 0x1e, 0x002d);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x18, 0x0010, 0x0000);</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);</div><div class='add'>+</div><div class='add'>+	/* Improve 10M EEE waveform */</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0005);</div><div class='add'>+	rtl_writephy(tp, 0x05, 0x8b86);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void rtl8168f_1_hw_phy_config(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='ctx'> 	static const struct phy_reg phy_reg_init[] = {</div><div class='hunk'>@@ -3054,24 +3097,7 @@ static void rtl8168f_1_hw_phy_config(struct rtl8169_private *tp)</div><div class='ctx'> </div><div class='ctx'> 	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));</div><div class='ctx'> </div><div class='del'>-	/* For 4-corner performance improve */</div><div class='del'>-	rtl_writephy(tp, 0x1f, 0x0005);</div><div class='del'>-	rtl_writephy(tp, 0x05, 0x8b80);</div><div class='del'>-	rtl_w1w0_phy(tp, 0x06, 0x0006, 0x0000);</div><div class='del'>-	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='del'>-</div><div class='del'>-	/* PHY auto speed down */</div><div class='del'>-	rtl_writephy(tp, 0x1f, 0x0007);</div><div class='del'>-	rtl_writephy(tp, 0x1e, 0x002d);</div><div class='del'>-	rtl_w1w0_phy(tp, 0x18, 0x0010, 0x0000);</div><div class='del'>-	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='del'>-	rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);</div><div class='del'>-</div><div class='del'>-	/* Improve 10M EEE waveform */</div><div class='del'>-	rtl_writephy(tp, 0x1f, 0x0005);</div><div class='del'>-	rtl_writephy(tp, 0x05, 0x8b86);</div><div class='del'>-	rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);</div><div class='del'>-	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='add'>+	rtl8168f_hw_phy_config(tp);</div><div class='ctx'> </div><div class='ctx'> 	/* Improve 2-pair detection performance */</div><div class='ctx'> 	rtl_writephy(tp, 0x1f, 0x0005);</div><div class='hunk'>@@ -3084,23 +3110,104 @@ static void rtl8168f_2_hw_phy_config(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='ctx'> 	rtl_apply_firmware(tp);</div><div class='ctx'> </div><div class='del'>-	/* For 4-corner performance improve */</div><div class='add'>+	rtl8168f_hw_phy_config(tp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8411_hw_phy_config(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	static const struct phy_reg phy_reg_init[] = {</div><div class='add'>+		/* Channel estimation fine tune */</div><div class='add'>+		{ 0x1f, 0x0003 },</div><div class='add'>+		{ 0x09, 0xa20f },</div><div class='add'>+		{ 0x1f, 0x0000 },</div><div class='add'>+</div><div class='add'>+		/* Modify green table for giga &amp; fnet */</div><div class='add'>+		{ 0x1f, 0x0005 },</div><div class='add'>+		{ 0x05, 0x8b55 },</div><div class='add'>+		{ 0x06, 0x0000 },</div><div class='add'>+		{ 0x05, 0x8b5e },</div><div class='add'>+		{ 0x06, 0x0000 },</div><div class='add'>+		{ 0x05, 0x8b67 },</div><div class='add'>+		{ 0x06, 0x0000 },</div><div class='add'>+		{ 0x05, 0x8b70 },</div><div class='add'>+		{ 0x06, 0x0000 },</div><div class='add'>+		{ 0x1f, 0x0000 },</div><div class='add'>+		{ 0x1f, 0x0007 },</div><div class='add'>+		{ 0x1e, 0x0078 },</div><div class='add'>+		{ 0x17, 0x0000 },</div><div class='add'>+		{ 0x19, 0x00aa },</div><div class='add'>+		{ 0x1f, 0x0000 },</div><div class='add'>+</div><div class='add'>+		/* Modify green table for 10M */</div><div class='add'>+		{ 0x1f, 0x0005 },</div><div class='add'>+		{ 0x05, 0x8b79 },</div><div class='add'>+		{ 0x06, 0xaa00 },</div><div class='add'>+		{ 0x1f, 0x0000 },</div><div class='add'>+</div><div class='add'>+		/* Disable hiimpedance detection (RTCT) */</div><div class='add'>+		{ 0x1f, 0x0003 },</div><div class='add'>+		{ 0x01, 0x328a },</div><div class='add'>+		{ 0x1f, 0x0000 }</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	rtl_apply_firmware(tp);</div><div class='add'>+</div><div class='add'>+	rtl8168f_hw_phy_config(tp);</div><div class='add'>+</div><div class='add'>+	/* Improve 2-pair detection performance */</div><div class='ctx'> 	rtl_writephy(tp, 0x1f, 0x0005);</div><div class='del'>-	rtl_writephy(tp, 0x05, 0x8b80);</div><div class='del'>-	rtl_w1w0_phy(tp, 0x06, 0x0006, 0x0000);</div><div class='add'>+	rtl_writephy(tp, 0x05, 0x8b85);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x06, 0x4000, 0x0000);</div><div class='ctx'> 	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='ctx'> </div><div class='del'>-	/* PHY auto speed down */</div><div class='del'>-	rtl_writephy(tp, 0x1f, 0x0007);</div><div class='del'>-	rtl_writephy(tp, 0x1e, 0x002d);</div><div class='del'>-	rtl_w1w0_phy(tp, 0x18, 0x0010, 0x0000);</div><div class='add'>+	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));</div><div class='add'>+</div><div class='add'>+	/* Modify green table for giga */</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0005);</div><div class='add'>+	rtl_writephy(tp, 0x05, 0x8b54);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0800);</div><div class='add'>+	rtl_writephy(tp, 0x05, 0x8b5d);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0800);</div><div class='add'>+	rtl_writephy(tp, 0x05, 0x8a7c);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);</div><div class='add'>+	rtl_writephy(tp, 0x05, 0x8a7f);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x06, 0x0100, 0x0000);</div><div class='add'>+	rtl_writephy(tp, 0x05, 0x8a82);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);</div><div class='add'>+	rtl_writephy(tp, 0x05, 0x8a85);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);</div><div class='add'>+	rtl_writephy(tp, 0x05, 0x8a88);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);</div><div class='ctx'> 	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='del'>-	rtl_w1w0_phy(tp, 0x14, 0x8000, 0x0000);</div><div class='ctx'> </div><div class='del'>-	/* Improve 10M EEE waveform */</div><div class='add'>+	/* uc same-seed solution */</div><div class='ctx'> 	rtl_writephy(tp, 0x1f, 0x0005);</div><div class='del'>-	rtl_writephy(tp, 0x05, 0x8b86);</div><div class='del'>-	rtl_w1w0_phy(tp, 0x06, 0x0001, 0x0000);</div><div class='add'>+	rtl_writephy(tp, 0x05, 0x8b85);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x06, 0x8000, 0x0000);</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='add'>+</div><div class='add'>+	/* eee setting */</div><div class='add'>+	rtl_w1w0_eri(ioaddr, 0x1b0, ERIAR_MASK_0001, 0x00, 0x03, ERIAR_EXGMAC);</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0005);</div><div class='add'>+	rtl_writephy(tp, 0x05, 0x8b85);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x06, 0x0000, 0x2000);</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0004);</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0007);</div><div class='add'>+	rtl_writephy(tp, 0x1e, 0x0020);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x15, 0x0000, 0x0100);</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='add'>+	rtl_writephy(tp, 0x0d, 0x0007);</div><div class='add'>+	rtl_writephy(tp, 0x0e, 0x003c);</div><div class='add'>+	rtl_writephy(tp, 0x0d, 0x4007);</div><div class='add'>+	rtl_writephy(tp, 0x0e, 0x0000);</div><div class='add'>+	rtl_writephy(tp, 0x0d, 0x0000);</div><div class='add'>+</div><div class='add'>+	/* Green feature */</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0003);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x19, 0x0000, 0x0001);</div><div class='add'>+	rtl_w1w0_phy(tp, 0x10, 0x0000, 0x0400);</div><div class='ctx'> 	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3147,6 +3254,25 @@ static void rtl8105e_hw_phy_config(struct rtl8169_private *tp)</div><div class='ctx'> 	rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rtl8402_hw_phy_config(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+</div><div class='add'>+	/* Disable ALDPS before setting firmware */</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='add'>+	rtl_writephy(tp, 0x18, 0x0310);</div><div class='add'>+	msleep(20);</div><div class='add'>+</div><div class='add'>+	rtl_apply_firmware(tp);</div><div class='add'>+</div><div class='add'>+	/* EEE setting */</div><div class='add'>+	rtl_eri_write(ioaddr, 0x1b0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0004);</div><div class='add'>+	rtl_writephy(tp, 0x10, 0x401f);</div><div class='add'>+	rtl_writephy(tp, 0x19, 0x7030);</div><div class='add'>+	rtl_writephy(tp, 0x1f, 0x0000);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void rtl_hw_phy_config(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl8169_private *tp = netdev_priv(dev);</div><div class='hunk'>@@ -3235,6 +3361,14 @@ static void rtl_hw_phy_config(struct net_device *dev)</div><div class='ctx'> 		rtl8168f_2_hw_phy_config(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case RTL_GIGA_MAC_VER_37:</div><div class='add'>+		rtl8402_hw_phy_config(tp);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case RTL_GIGA_MAC_VER_38:</div><div class='add'>+		rtl8411_hw_phy_config(tp);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3472,6 +3606,8 @@ static void rtl_wol_suspend_quirk(struct rtl8169_private *tp)</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_32:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_33:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_34:</div><div class='add'>+	case RTL_GIGA_MAC_VER_37:</div><div class='add'>+	case RTL_GIGA_MAC_VER_38:</div><div class='ctx'> 		RTL_W32(RxConfig, RTL_R32(RxConfig) |</div><div class='ctx'> 			AcceptBroadcast | AcceptMulticast | AcceptMyPhys);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -3507,15 +3643,45 @@ static void r810x_phy_power_up(struct rtl8169_private *tp)</div><div class='ctx'> </div><div class='ctx'> static void r810x_pll_power_down(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+</div><div class='ctx'> 	if (rtl_wol_pll_power_down(tp))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	r810x_phy_power_down(tp);</div><div class='add'>+</div><div class='add'>+	switch (tp-&gt;mac_version) {</div><div class='add'>+	case RTL_GIGA_MAC_VER_07:</div><div class='add'>+	case RTL_GIGA_MAC_VER_08:</div><div class='add'>+	case RTL_GIGA_MAC_VER_09:</div><div class='add'>+	case RTL_GIGA_MAC_VER_10:</div><div class='add'>+	case RTL_GIGA_MAC_VER_13:</div><div class='add'>+	case RTL_GIGA_MAC_VER_16:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		RTL_W8(PMCH, RTL_R8(PMCH) &amp; ~0x80);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void r810x_pll_power_up(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+</div><div class='ctx'> 	r810x_phy_power_up(tp);</div><div class='add'>+</div><div class='add'>+	switch (tp-&gt;mac_version) {</div><div class='add'>+	case RTL_GIGA_MAC_VER_07:</div><div class='add'>+	case RTL_GIGA_MAC_VER_08:</div><div class='add'>+	case RTL_GIGA_MAC_VER_09:</div><div class='add'>+	case RTL_GIGA_MAC_VER_10:</div><div class='add'>+	case RTL_GIGA_MAC_VER_13:</div><div class='add'>+	case RTL_GIGA_MAC_VER_16:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void r8168_phy_power_up(struct rtl8169_private *tp)</div><div class='hunk'>@@ -3619,13 +3785,6 @@ static void r8168_pll_power_up(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='ctx'> </div><div class='del'>-	if ((tp-&gt;mac_version == RTL_GIGA_MAC_VER_27 ||</div><div class='del'>-	     tp-&gt;mac_version == RTL_GIGA_MAC_VER_28 ||</div><div class='del'>-	     tp-&gt;mac_version == RTL_GIGA_MAC_VER_31) &amp;&amp;</div><div class='del'>-	    r8168dp_check_dash(tp)) {</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	switch (tp-&gt;mac_version) {</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_25:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_26:</div><div class='hunk'>@@ -3670,6 +3829,7 @@ static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_16:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_29:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_30:</div><div class='add'>+	case RTL_GIGA_MAC_VER_37:</div><div class='ctx'> 		ops-&gt;down	= r810x_pll_power_down;</div><div class='ctx'> 		ops-&gt;up		= r810x_pll_power_up;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -3694,6 +3854,7 @@ static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_34:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_35:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_36:</div><div class='add'>+	case RTL_GIGA_MAC_VER_38:</div><div class='ctx'> 		ops-&gt;down	= r8168_pll_power_down;</div><div class='ctx'> 		ops-&gt;up		= r8168_pll_power_up;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -3979,7 +4140,9 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp)</div><div class='ctx'> 			udelay(20);</div><div class='ctx'> 	} else if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_34 ||</div><div class='ctx'> 	           tp-&gt;mac_version == RTL_GIGA_MAC_VER_35 ||</div><div class='del'>-	           tp-&gt;mac_version == RTL_GIGA_MAC_VER_36) {</div><div class='add'>+	           tp-&gt;mac_version == RTL_GIGA_MAC_VER_36 ||</div><div class='add'>+	           tp-&gt;mac_version == RTL_GIGA_MAC_VER_37 ||</div><div class='add'>+	           tp-&gt;mac_version == RTL_GIGA_MAC_VER_38) {</div><div class='ctx'> 		RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);</div><div class='ctx'> 		while (!(RTL_R32(TxConfig) &amp; TXCFG_EMPTY))</div><div class='ctx'> 			udelay(100);</div><div class='hunk'>@@ -4185,22 +4348,141 @@ static void rtl_hw_start_8169(struct net_device *dev)</div><div class='ctx'> 	RTL_W16(MultiIntr, RTL_R16(MultiIntr) &amp; 0xF000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_csi_access_enable(void __iomem *ioaddr, u32 bits)</div><div class='add'>+static void rtl_csi_write(struct rtl8169_private *tp, int addr, int value)</div><div class='add'>+{</div><div class='add'>+	if (tp-&gt;csi_ops.write)</div><div class='add'>+		tp-&gt;csi_ops.write(tp-&gt;mmio_addr, addr, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 rtl_csi_read(struct rtl8169_private *tp, int addr)</div><div class='add'>+{</div><div class='add'>+	if (tp-&gt;csi_ops.read)</div><div class='add'>+		return tp-&gt;csi_ops.read(tp-&gt;mmio_addr, addr);</div><div class='add'>+	else</div><div class='add'>+		return ~0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl_csi_access_enable(struct rtl8169_private *tp, u32 bits)</div><div class='ctx'> {</div><div class='ctx'> 	u32 csi;</div><div class='ctx'> </div><div class='del'>-	csi = rtl_csi_read(ioaddr, 0x070c) &amp; 0x00ffffff;</div><div class='del'>-	rtl_csi_write(ioaddr, 0x070c, csi | bits);</div><div class='add'>+	csi = rtl_csi_read(tp, 0x070c) &amp; 0x00ffffff;</div><div class='add'>+	rtl_csi_write(tp, 0x070c, csi | bits);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl_csi_access_enable_1(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='add'>+	rtl_csi_access_enable(tp, 0x17000000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl_csi_access_enable_2(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='add'>+	rtl_csi_access_enable(tp, 0x27000000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_csi_access_enable_1(void __iomem *ioaddr)</div><div class='add'>+static void r8169_csi_write(void __iomem *ioaddr, int addr, int value)</div><div class='ctx'> {</div><div class='del'>-	rtl_csi_access_enable(ioaddr, 0x17000000);</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	RTL_W32(CSIDR, value);</div><div class='add'>+	RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr &amp; CSIAR_ADDR_MASK) |</div><div class='add'>+		CSIAR_BYTE_ENABLE &lt;&lt; CSIAR_BYTE_ENABLE_SHIFT);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 100; i++) {</div><div class='add'>+		if (!(RTL_R32(CSIAR) &amp; CSIAR_FLAG))</div><div class='add'>+			break;</div><div class='add'>+		udelay(10);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_csi_access_enable_2(void __iomem *ioaddr)</div><div class='add'>+static u32 r8169_csi_read(void __iomem *ioaddr, int addr)</div><div class='ctx'> {</div><div class='del'>-	rtl_csi_access_enable(ioaddr, 0x27000000);</div><div class='add'>+	u32 value = ~0x00;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	RTL_W32(CSIAR, (addr &amp; CSIAR_ADDR_MASK) |</div><div class='add'>+		CSIAR_BYTE_ENABLE &lt;&lt; CSIAR_BYTE_ENABLE_SHIFT);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 100; i++) {</div><div class='add'>+		if (RTL_R32(CSIAR) &amp; CSIAR_FLAG) {</div><div class='add'>+			value = RTL_R32(CSIDR);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		udelay(10);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void r8402_csi_write(void __iomem *ioaddr, int addr, int value)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	RTL_W32(CSIDR, value);</div><div class='add'>+	RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr &amp; CSIAR_ADDR_MASK) |</div><div class='add'>+		CSIAR_BYTE_ENABLE &lt;&lt; CSIAR_BYTE_ENABLE_SHIFT |</div><div class='add'>+		CSIAR_FUNC_NIC);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 100; i++) {</div><div class='add'>+		if (!(RTL_R32(CSIAR) &amp; CSIAR_FLAG))</div><div class='add'>+			break;</div><div class='add'>+		udelay(10);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 r8402_csi_read(void __iomem *ioaddr, int addr)</div><div class='add'>+{</div><div class='add'>+	u32 value = ~0x00;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	RTL_W32(CSIAR, (addr &amp; CSIAR_ADDR_MASK) | CSIAR_FUNC_NIC |</div><div class='add'>+		CSIAR_BYTE_ENABLE &lt;&lt; CSIAR_BYTE_ENABLE_SHIFT);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 100; i++) {</div><div class='add'>+		if (RTL_R32(CSIAR) &amp; CSIAR_FLAG) {</div><div class='add'>+			value = RTL_R32(CSIDR);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		udelay(10);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __devinit rtl_init_csi_ops(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='add'>+	struct csi_ops *ops = &amp;tp-&gt;csi_ops;</div><div class='add'>+</div><div class='add'>+	switch (tp-&gt;mac_version) {</div><div class='add'>+	case RTL_GIGA_MAC_VER_01:</div><div class='add'>+	case RTL_GIGA_MAC_VER_02:</div><div class='add'>+	case RTL_GIGA_MAC_VER_03:</div><div class='add'>+	case RTL_GIGA_MAC_VER_04:</div><div class='add'>+	case RTL_GIGA_MAC_VER_05:</div><div class='add'>+	case RTL_GIGA_MAC_VER_06:</div><div class='add'>+	case RTL_GIGA_MAC_VER_10:</div><div class='add'>+	case RTL_GIGA_MAC_VER_11:</div><div class='add'>+	case RTL_GIGA_MAC_VER_12:</div><div class='add'>+	case RTL_GIGA_MAC_VER_13:</div><div class='add'>+	case RTL_GIGA_MAC_VER_14:</div><div class='add'>+	case RTL_GIGA_MAC_VER_15:</div><div class='add'>+	case RTL_GIGA_MAC_VER_16:</div><div class='add'>+	case RTL_GIGA_MAC_VER_17:</div><div class='add'>+		ops-&gt;write	= NULL;</div><div class='add'>+		ops-&gt;read	= NULL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case RTL_GIGA_MAC_VER_37:</div><div class='add'>+	case RTL_GIGA_MAC_VER_38:</div><div class='add'>+		ops-&gt;write	= r8402_csi_write;</div><div class='add'>+		ops-&gt;read	= r8402_csi_read;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		ops-&gt;write	= r8169_csi_write;</div><div class='add'>+		ops-&gt;read	= r8169_csi_read;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct ephy_info {</div><div class='hunk'>@@ -4257,8 +4539,11 @@ static void rtl_enable_clock_request(struct pci_dev *pdev)</div><div class='ctx'> 	PktCntrDisable | \</div><div class='ctx'> 	Mac_dbgo_sel)</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168bb(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168bb(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='add'>+</div><div class='ctx'> 	RTL_W8(Config3, RTL_R8(Config3) &amp; ~Beacon_en);</div><div class='ctx'> </div><div class='ctx'> 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) &amp; ~R8168_CPCMD_QUIRK_MASK);</div><div class='hunk'>@@ -4267,17 +4552,22 @@ static void rtl_hw_start_8168bb(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 		(0x5 &lt;&lt; MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168bef(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168bef(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	rtl_hw_start_8168bb(ioaddr, pdev);</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+</div><div class='add'>+	rtl_hw_start_8168bb(tp);</div><div class='ctx'> </div><div class='ctx'> 	RTL_W8(MaxTxPacketSize, TxPacketMax);</div><div class='ctx'> </div><div class='ctx'> 	RTL_W8(Config4, RTL_R8(Config4) &amp; ~(1 &lt;&lt; 0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void __rtl_hw_start_8168cp(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='add'>+</div><div class='ctx'> 	RTL_W8(Config1, RTL_R8(Config1) | Speed_down);</div><div class='ctx'> </div><div class='ctx'> 	RTL_W8(Config3, RTL_R8(Config3) &amp; ~Beacon_en);</div><div class='hunk'>@@ -4289,8 +4579,9 @@ static void __rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) &amp; ~R8168_CPCMD_QUIRK_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168cp_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168cp_1(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='ctx'> 	static const struct ephy_info e_info_8168cp[] = {</div><div class='ctx'> 		{ 0x01, 0,	0x0001 },</div><div class='ctx'> 		{ 0x02, 0x0800,	0x1000 },</div><div class='hunk'>@@ -4299,16 +4590,19 @@ static void rtl_hw_start_8168cp_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 		{ 0x07, 0,	0x2000 }</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtl_csi_access_enable_2(ioaddr);</div><div class='add'>+	rtl_csi_access_enable_2(tp);</div><div class='ctx'> </div><div class='ctx'> 	rtl_ephy_init(ioaddr, e_info_8168cp, ARRAY_SIZE(e_info_8168cp));</div><div class='ctx'> </div><div class='del'>-	__rtl_hw_start_8168cp(ioaddr, pdev);</div><div class='add'>+	__rtl_hw_start_8168cp(tp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168cp_2(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	rtl_csi_access_enable_2(ioaddr);</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='add'>+</div><div class='add'>+	rtl_csi_access_enable_2(tp);</div><div class='ctx'> </div><div class='ctx'> 	RTL_W8(Config3, RTL_R8(Config3) &amp; ~Beacon_en);</div><div class='ctx'> </div><div class='hunk'>@@ -4317,9 +4611,12 @@ static void rtl_hw_start_8168cp_2(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) &amp; ~R8168_CPCMD_QUIRK_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168cp_3(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	rtl_csi_access_enable_2(ioaddr);</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='add'>+</div><div class='add'>+	rtl_csi_access_enable_2(tp);</div><div class='ctx'> </div><div class='ctx'> 	RTL_W8(Config3, RTL_R8(Config3) &amp; ~Beacon_en);</div><div class='ctx'> </div><div class='hunk'>@@ -4333,52 +4630,57 @@ static void rtl_hw_start_8168cp_3(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) &amp; ~R8168_CPCMD_QUIRK_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168c_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168c_1(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='ctx'> 	static const struct ephy_info e_info_8168c_1[] = {</div><div class='ctx'> 		{ 0x02, 0x0800,	0x1000 },</div><div class='ctx'> 		{ 0x03, 0,	0x0002 },</div><div class='ctx'> 		{ 0x06, 0x0080,	0x0000 }</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtl_csi_access_enable_2(ioaddr);</div><div class='add'>+	rtl_csi_access_enable_2(tp);</div><div class='ctx'> </div><div class='ctx'> 	RTL_W8(DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2);</div><div class='ctx'> </div><div class='ctx'> 	rtl_ephy_init(ioaddr, e_info_8168c_1, ARRAY_SIZE(e_info_8168c_1));</div><div class='ctx'> </div><div class='del'>-	__rtl_hw_start_8168cp(ioaddr, pdev);</div><div class='add'>+	__rtl_hw_start_8168cp(tp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168c_2(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168c_2(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='ctx'> 	static const struct ephy_info e_info_8168c_2[] = {</div><div class='ctx'> 		{ 0x01, 0,	0x0001 },</div><div class='ctx'> 		{ 0x03, 0x0400,	0x0220 }</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtl_csi_access_enable_2(ioaddr);</div><div class='add'>+	rtl_csi_access_enable_2(tp);</div><div class='ctx'> </div><div class='ctx'> 	rtl_ephy_init(ioaddr, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2));</div><div class='ctx'> </div><div class='del'>-	__rtl_hw_start_8168cp(ioaddr, pdev);</div><div class='add'>+	__rtl_hw_start_8168cp(tp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168c_3(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168c_3(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	rtl_hw_start_8168c_2(ioaddr, pdev);</div><div class='add'>+	rtl_hw_start_8168c_2(tp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168c_4(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168c_4(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	rtl_csi_access_enable_2(ioaddr);</div><div class='add'>+	rtl_csi_access_enable_2(tp);</div><div class='ctx'> </div><div class='del'>-	__rtl_hw_start_8168cp(ioaddr, pdev);</div><div class='add'>+	__rtl_hw_start_8168cp(tp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168d(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168d(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	rtl_csi_access_enable_2(ioaddr);</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='add'>+</div><div class='add'>+	rtl_csi_access_enable_2(tp);</div><div class='ctx'> </div><div class='ctx'> 	rtl_disable_clock_request(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -4389,9 +4691,12 @@ static void rtl_hw_start_8168d(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) &amp; ~R8168_CPCMD_QUIRK_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168dp(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168dp(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	rtl_csi_access_enable_1(ioaddr);</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='add'>+</div><div class='add'>+	rtl_csi_access_enable_1(tp);</div><div class='ctx'> </div><div class='ctx'> 	rtl_tx_performance_tweak(pdev, 0x5 &lt;&lt; MAX_READ_REQUEST_SHIFT);</div><div class='ctx'> </div><div class='hunk'>@@ -4400,8 +4705,10 @@ static void rtl_hw_start_8168dp(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	rtl_disable_clock_request(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168d_4(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168d_4(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='ctx'> 	static const struct ephy_info e_info_8168d_4[] = {</div><div class='ctx'> 		{ 0x0b, ~0,	0x48 },</div><div class='ctx'> 		{ 0x19, 0x20,	0x50 },</div><div class='hunk'>@@ -4409,7 +4716,7 @@ static void rtl_hw_start_8168d_4(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	};</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	rtl_csi_access_enable_1(ioaddr);</div><div class='add'>+	rtl_csi_access_enable_1(tp);</div><div class='ctx'> </div><div class='ctx'> 	rtl_tx_performance_tweak(pdev, 0x5 &lt;&lt; MAX_READ_REQUEST_SHIFT);</div><div class='ctx'> </div><div class='hunk'>@@ -4426,8 +4733,10 @@ static void rtl_hw_start_8168d_4(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	rtl_enable_clock_request(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168e_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168e_1(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='ctx'> 	static const struct ephy_info e_info_8168e_1[] = {</div><div class='ctx'> 		{ 0x00, 0x0200,	0x0100 },</div><div class='ctx'> 		{ 0x00, 0x0000,	0x0004 },</div><div class='hunk'>@@ -4444,7 +4753,7 @@ static void rtl_hw_start_8168e_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 		{ 0x0a, 0x0000,	0x0040 }</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtl_csi_access_enable_2(ioaddr);</div><div class='add'>+	rtl_csi_access_enable_2(tp);</div><div class='ctx'> </div><div class='ctx'> 	rtl_ephy_init(ioaddr, e_info_8168e_1, ARRAY_SIZE(e_info_8168e_1));</div><div class='ctx'> </div><div class='hunk'>@@ -4461,14 +4770,16 @@ static void rtl_hw_start_8168e_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	RTL_W8(Config5, RTL_R8(Config5) &amp; ~Spi_en);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168e_2(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='ctx'> 	static const struct ephy_info e_info_8168e_2[] = {</div><div class='ctx'> 		{ 0x09, 0x0000,	0x0080 },</div><div class='ctx'> 		{ 0x19, 0x0000,	0x0224 }</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	rtl_csi_access_enable_1(ioaddr);</div><div class='add'>+	rtl_csi_access_enable_1(tp);</div><div class='ctx'> </div><div class='ctx'> 	rtl_ephy_init(ioaddr, e_info_8168e_2, ARRAY_SIZE(e_info_8168e_2));</div><div class='ctx'> </div><div class='hunk'>@@ -4499,18 +4810,12 @@ static void rtl_hw_start_8168e_2(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	RTL_W8(Config5, RTL_R8(Config5) &amp; ~Spi_en);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8168f_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8168f(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	static const struct ephy_info e_info_8168f_1[] = {</div><div class='del'>-		{ 0x06, 0x00c0,	0x0020 },</div><div class='del'>-		{ 0x08, 0x0001,	0x0002 },</div><div class='del'>-		{ 0x09, 0x0000,	0x0080 },</div><div class='del'>-		{ 0x19, 0x0000,	0x0224 }</div><div class='del'>-	};</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='ctx'> </div><div class='del'>-	rtl_csi_access_enable_1(ioaddr);</div><div class='del'>-</div><div class='del'>-	rtl_ephy_init(ioaddr, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));</div><div class='add'>+	rtl_csi_access_enable_2(tp);</div><div class='ctx'> </div><div class='ctx'> 	rtl_tx_performance_tweak(pdev, 0x5 &lt;&lt; MAX_READ_REQUEST_SHIFT);</div><div class='ctx'> </div><div class='hunk'>@@ -4524,8 +4829,6 @@ static void rtl_hw_start_8168f_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	rtl_w1w0_eri(ioaddr, 0x1d0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC);</div><div class='ctx'> 	rtl_eri_write(ioaddr, 0xcc, ERIAR_MASK_1111, 0x00000050, ERIAR_EXGMAC);</div><div class='ctx'> 	rtl_eri_write(ioaddr, 0xd0, ERIAR_MASK_1111, 0x00000060, ERIAR_EXGMAC);</div><div class='del'>-	rtl_w1w0_eri(ioaddr, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00,</div><div class='del'>-		     ERIAR_EXGMAC);</div><div class='ctx'> </div><div class='ctx'> 	RTL_W8(MaxTxPacketSize, EarlySize);</div><div class='ctx'> </div><div class='hunk'>@@ -4533,20 +4836,54 @@ static void rtl_hw_start_8168f_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);</div><div class='ctx'> 	RTL_W8(MCU, RTL_R8(MCU) &amp; ~NOW_IS_OOB);</div><div class='add'>+	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);</div><div class='add'>+	RTL_W32(MISC, RTL_R32(MISC) | PWM_EN);</div><div class='add'>+	RTL_W8(Config5, RTL_R8(Config5) &amp; ~Spi_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	static const struct ephy_info e_info_8168f_1[] = {</div><div class='add'>+		{ 0x06, 0x00c0,	0x0020 },</div><div class='add'>+		{ 0x08, 0x0001,	0x0002 },</div><div class='add'>+		{ 0x09, 0x0000,	0x0080 },</div><div class='add'>+		{ 0x19, 0x0000,	0x0224 }</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtl_hw_start_8168f(tp);</div><div class='add'>+</div><div class='add'>+	rtl_ephy_init(ioaddr, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));</div><div class='add'>+</div><div class='add'>+	rtl_w1w0_eri(ioaddr, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00,</div><div class='add'>+		     ERIAR_EXGMAC);</div><div class='ctx'> </div><div class='ctx'> 	/* Adjust EEE LED frequency */</div><div class='ctx'> 	RTL_W8(EEE_LED, RTL_R8(EEE_LED) &amp; ~0x07);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);</div><div class='del'>-	RTL_W32(MISC, RTL_R32(MISC) | PWM_EN);</div><div class='del'>-	RTL_W8(Config5, RTL_R8(Config5) &amp; ~Spi_en);</div><div class='add'>+static void rtl_hw_start_8411(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	static const struct ephy_info e_info_8168f_1[] = {</div><div class='add'>+		{ 0x06, 0x00c0,	0x0020 },</div><div class='add'>+		{ 0x0f, 0xffff,	0x5200 },</div><div class='add'>+		{ 0x1e, 0x0000,	0x4000 },</div><div class='add'>+		{ 0x19, 0x0000,	0x0224 }</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtl_hw_start_8168f(tp);</div><div class='add'>+</div><div class='add'>+	rtl_ephy_init(ioaddr, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));</div><div class='add'>+</div><div class='add'>+	rtl_w1w0_eri(ioaddr, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0x0000,</div><div class='add'>+		     ERIAR_EXGMAC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl_hw_start_8168(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl8169_private *tp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='del'>-	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='ctx'> </div><div class='ctx'> 	RTL_W8(Cfg9346, Cfg9346_Unlock);</div><div class='ctx'> </div><div class='hunk'>@@ -4577,67 +4914,71 @@ static void rtl_hw_start_8168(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	switch (tp-&gt;mac_version) {</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_11:</div><div class='del'>-		rtl_hw_start_8168bb(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168bb(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_12:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_17:</div><div class='del'>-		rtl_hw_start_8168bef(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168bef(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_18:</div><div class='del'>-		rtl_hw_start_8168cp_1(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168cp_1(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_19:</div><div class='del'>-		rtl_hw_start_8168c_1(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168c_1(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_20:</div><div class='del'>-		rtl_hw_start_8168c_2(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168c_2(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_21:</div><div class='del'>-		rtl_hw_start_8168c_3(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168c_3(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_22:</div><div class='del'>-		rtl_hw_start_8168c_4(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168c_4(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_23:</div><div class='del'>-		rtl_hw_start_8168cp_2(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168cp_2(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_24:</div><div class='del'>-		rtl_hw_start_8168cp_3(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168cp_3(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_25:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_26:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_27:</div><div class='del'>-		rtl_hw_start_8168d(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168d(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_28:</div><div class='del'>-		rtl_hw_start_8168d_4(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168d_4(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_31:</div><div class='del'>-		rtl_hw_start_8168dp(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168dp(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_32:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_33:</div><div class='del'>-		rtl_hw_start_8168e_1(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168e_1(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_34:</div><div class='del'>-		rtl_hw_start_8168e_2(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168e_2(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_35:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_36:</div><div class='del'>-		rtl_hw_start_8168f_1(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8168f_1(tp);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case RTL_GIGA_MAC_VER_38:</div><div class='add'>+		rtl_hw_start_8411(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -4664,8 +5005,10 @@ static void rtl_hw_start_8168(struct net_device *dev)</div><div class='ctx'> 	PktCntrDisable | \</div><div class='ctx'> 	Mac_dbgo_sel)</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='ctx'> 	static const struct ephy_info e_info_8102e_1[] = {</div><div class='ctx'> 		{ 0x01,	0, 0x6e65 },</div><div class='ctx'> 		{ 0x02,	0, 0x091f },</div><div class='hunk'>@@ -4678,7 +5021,7 @@ static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	};</div><div class='ctx'> 	u8 cfg1;</div><div class='ctx'> </div><div class='del'>-	rtl_csi_access_enable_2(ioaddr);</div><div class='add'>+	rtl_csi_access_enable_2(tp);</div><div class='ctx'> </div><div class='ctx'> 	RTL_W8(DBG_REG, FIX_NAK_1);</div><div class='ctx'> </div><div class='hunk'>@@ -4695,9 +5038,12 @@ static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8102e_2(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	rtl_csi_access_enable_2(ioaddr);</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='add'>+</div><div class='add'>+	rtl_csi_access_enable_2(tp);</div><div class='ctx'> </div><div class='ctx'> 	rtl_tx_performance_tweak(pdev, 0x5 &lt;&lt; MAX_READ_REQUEST_SHIFT);</div><div class='ctx'> </div><div class='hunk'>@@ -4705,15 +5051,16 @@ static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	RTL_W8(Config3, RTL_R8(Config3) &amp; ~Beacon_en);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8102e_3(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	rtl_hw_start_8102e_2(ioaddr, pdev);</div><div class='add'>+	rtl_hw_start_8102e_2(tp);</div><div class='ctx'> </div><div class='del'>-	rtl_ephy_write(ioaddr, 0x03, 0xc2f9);</div><div class='add'>+	rtl_ephy_write(tp-&gt;mmio_addr, 0x03, 0xc2f9);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8105e_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8105e_1(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='ctx'> 	static const struct ephy_info e_info_8105e_1[] = {</div><div class='ctx'> 		{ 0x07,	0, 0x4000 },</div><div class='ctx'> 		{ 0x19,	0, 0x0200 },</div><div class='hunk'>@@ -4737,12 +5084,44 @@ static void rtl_hw_start_8105e_1(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='ctx'> 	rtl_ephy_init(ioaddr, e_info_8105e_1, ARRAY_SIZE(e_info_8105e_1));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl_hw_start_8105e_2(void __iomem *ioaddr, struct pci_dev *pdev)</div><div class='add'>+static void rtl_hw_start_8105e_2(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	rtl_hw_start_8105e_1(ioaddr, pdev);</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+</div><div class='add'>+	rtl_hw_start_8105e_1(tp);</div><div class='ctx'> 	rtl_ephy_write(ioaddr, 0x1e, rtl_ephy_read(ioaddr, 0x1e) | 0x8000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rtl_hw_start_8402(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = tp-&gt;mmio_addr;</div><div class='add'>+	static const struct ephy_info e_info_8402[] = {</div><div class='add'>+		{ 0x19,	0xffff, 0xff64 },</div><div class='add'>+		{ 0x1e,	0, 0x4000 }</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rtl_csi_access_enable_2(tp);</div><div class='add'>+</div><div class='add'>+	/* Force LAN exit from ASPM if Rx/Tx are not idle */</div><div class='add'>+	RTL_W32(FuncEvent, RTL_R32(FuncEvent) | 0x002800);</div><div class='add'>+</div><div class='add'>+	RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);</div><div class='add'>+	RTL_W8(MCU, RTL_R8(MCU) &amp; ~NOW_IS_OOB);</div><div class='add'>+</div><div class='add'>+	rtl_ephy_init(ioaddr, e_info_8402, ARRAY_SIZE(e_info_8402));</div><div class='add'>+</div><div class='add'>+	rtl_tx_performance_tweak(tp-&gt;pci_dev, 0x5 &lt;&lt; MAX_READ_REQUEST_SHIFT);</div><div class='add'>+</div><div class='add'>+	rtl_eri_write(ioaddr, 0xc8, ERIAR_MASK_1111, 0x00000002, ERIAR_EXGMAC);</div><div class='add'>+	rtl_eri_write(ioaddr, 0xe8, ERIAR_MASK_1111, 0x00000006, ERIAR_EXGMAC);</div><div class='add'>+	rtl_w1w0_eri(ioaddr, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);</div><div class='add'>+	rtl_w1w0_eri(ioaddr, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);</div><div class='add'>+	rtl_eri_write(ioaddr, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);</div><div class='add'>+	rtl_eri_write(ioaddr, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);</div><div class='add'>+	rtl_w1w0_eri(ioaddr, 0x0d4, ERIAR_MASK_0011, 0x0e00, 0xff00,</div><div class='add'>+		     ERIAR_EXGMAC);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void rtl_hw_start_8101(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl8169_private *tp = netdev_priv(dev);</div><div class='hunk'>@@ -4766,22 +5145,26 @@ static void rtl_hw_start_8101(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	switch (tp-&gt;mac_version) {</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_07:</div><div class='del'>-		rtl_hw_start_8102e_1(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8102e_1(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_08:</div><div class='del'>-		rtl_hw_start_8102e_3(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8102e_3(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_09:</div><div class='del'>-		rtl_hw_start_8102e_2(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8102e_2(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RTL_GIGA_MAC_VER_29:</div><div class='del'>-		rtl_hw_start_8105e_1(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8105e_1(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_30:</div><div class='del'>-		rtl_hw_start_8105e_2(ioaddr, pdev);</div><div class='add'>+		rtl_hw_start_8105e_2(tp);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case RTL_GIGA_MAC_VER_37:</div><div class='add'>+		rtl_hw_start_8402(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5115,7 +5498,7 @@ static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	u32 opts[2];</div><div class='ctx'> 	int frags;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(TX_BUFFS_AVAIL(tp) &lt; skb_shinfo(skb)-&gt;nr_frags)) {</div><div class='add'>+	if (unlikely(!TX_FRAGS_READY_FOR(tp, skb_shinfo(skb)-&gt;nr_frags))) {</div><div class='ctx'> 		netif_err(tp, drv, dev, "BUG! Tx Ring full when queue awake!\n");</div><div class='ctx'> 		goto err_stop_0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5169,7 +5552,7 @@ static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	mmiowb();</div><div class='ctx'> </div><div class='del'>-	if (TX_BUFFS_AVAIL(tp) &lt; MAX_SKB_FRAGS) {</div><div class='add'>+	if (!TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS)) {</div><div class='ctx'> 		/* Avoid wrongly optimistic queue wake-up: rtl_tx thread must</div><div class='ctx'> 		 * not miss a ring update when it notices a stopped queue.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -5183,7 +5566,7 @@ static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 		 * can't.</div><div class='ctx'> 		 */</div><div class='ctx'> 		smp_mb();</div><div class='del'>-		if (TX_BUFFS_AVAIL(tp) &gt;= MAX_SKB_FRAGS)</div><div class='add'>+		if (TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS))</div><div class='ctx'> 			netif_wake_queue(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5306,7 +5689,7 @@ static void rtl_tx(struct net_device *dev, struct rtl8169_private *tp)</div><div class='ctx'> 		 */</div><div class='ctx'> 		smp_mb();</div><div class='ctx'> 		if (netif_queue_stopped(dev) &amp;&amp;</div><div class='del'>-		    (TX_BUFFS_AVAIL(tp) &gt;= MAX_SKB_FRAGS)) {</div><div class='add'>+		    TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS)) {</div><div class='ctx'> 			netif_wake_queue(dev);</div><div class='ctx'> 		}</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -5668,7 +6051,7 @@ static int rtl_open(struct net_device *dev)</div><div class='ctx'> 	pm_runtime_get_sync(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Rx and Tx desscriptors needs 256 bytes alignment.</div><div class='add'>+	 * Rx and Tx descriptors needs 256 bytes alignment.</div><div class='ctx'> 	 * dma_alloc_coherent provides more.</div><div class='ctx'> 	 */</div><div class='ctx'> 	tp-&gt;TxDescArray = dma_alloc_coherent(&amp;pdev-&gt;dev, R8169_TX_RING_BYTES,</div><div class='hunk'>@@ -5962,6 +6345,8 @@ static void __devexit rtl_remove_one(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	cancel_work_sync(&amp;tp-&gt;wk.work);</div><div class='ctx'> </div><div class='add'>+	netif_napi_del(&amp;tp-&gt;napi);</div><div class='add'>+</div><div class='ctx'> 	unregister_netdev(dev);</div><div class='ctx'> </div><div class='ctx'> 	rtl_release_firmware(tp);</div><div class='hunk'>@@ -6178,6 +6563,7 @@ rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	rtl_init_mdio_ops(tp);</div><div class='ctx'> 	rtl_init_pll_power_ops(tp);</div><div class='ctx'> 	rtl_init_jumbo_ops(tp);</div><div class='add'>+	rtl_init_csi_ops(tp);</div><div class='ctx'> </div><div class='ctx'> 	rtl8169_print_mac_version(tp);</div><div class='ctx'> </div><div class='hunk'>@@ -6284,6 +6670,7 @@ out:</div><div class='ctx'> 	return rc;</div><div class='ctx'> </div><div class='ctx'> err_out_msi_4:</div><div class='add'>+	netif_napi_del(&amp;tp-&gt;napi);</div><div class='ctx'> 	rtl_disable_msi(pdev, tp);</div><div class='ctx'> 	iounmap(ioaddr);</div><div class='ctx'> err_out_free_res_3:</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/Kconfig b/drivers/net/ethernet/renesas/Kconfig<br/>index 3fb2355af37e..46df3a04030c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/renesas/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/renesas/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/renesas/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/renesas/Kconfig</a></div><div class='hunk'>@@ -4,11 +4,11 @@</div><div class='ctx'> </div><div class='ctx'> config SH_ETH</div><div class='ctx'> 	tristate "Renesas SuperH Ethernet support"</div><div class='del'>-	depends on SUPERH &amp;&amp; \</div><div class='add'>+	depends on (SUPERH || ARCH_SHMOBILE) &amp;&amp; \</div><div class='ctx'> 		(CPU_SUBTYPE_SH7710 || CPU_SUBTYPE_SH7712 || \</div><div class='ctx'> 		 CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7619 || \</div><div class='ctx'> 		 CPU_SUBTYPE_SH7724 || CPU_SUBTYPE_SH7734 || \</div><div class='del'>-		 CPU_SUBTYPE_SH7757)</div><div class='add'>+		 CPU_SUBTYPE_SH7757 || ARCH_R8A7740)</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select NET_CORE</div><div class='ctx'> 	select MII</div><div class='hunk'>@@ -17,4 +17,5 @@ config SH_ETH</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  Renesas SuperH Ethernet device driver.</div><div class='ctx'> 	  This driver supporting CPUs are:</div><div class='del'>-		- SH7619, SH7710, SH7712, SH7724, SH7734, SH7763 and SH7757.</div><div class='add'>+		- SH7619, SH7710, SH7712, SH7724, SH7734, SH7763, SH7757,</div><div class='add'>+		  and R8A7740.</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c<br/>index d63e09b29a96..667169b82526 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/renesas/sh_eth.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/renesas/sh_eth.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/renesas/sh_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/renesas/sh_eth.c</a></div><div class='hunk'>@@ -386,6 +386,114 @@ static void sh_eth_reset_hw_crc(struct net_device *ndev)</div><div class='ctx'> 		sh_eth_write(ndev, 0x0, CSMR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#elif defined(CONFIG_ARCH_R8A7740)</div><div class='add'>+#define SH_ETH_HAS_TSU	1</div><div class='add'>+static void sh_eth_chip_reset(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct sh_eth_private *mdp = netdev_priv(ndev);</div><div class='add'>+	unsigned long mii;</div><div class='add'>+</div><div class='add'>+	/* reset device */</div><div class='add'>+	sh_eth_tsu_write(mdp, ARSTR_ARSTR, ARSTR);</div><div class='add'>+	mdelay(1);</div><div class='add'>+</div><div class='add'>+	switch (mdp-&gt;phy_interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_GMII:</div><div class='add'>+		mii = 2;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+		mii = 1;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+	default:</div><div class='add'>+		mii = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	sh_eth_write(ndev, mii, RMII_MII);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sh_eth_reset(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	int cnt = 100;</div><div class='add'>+</div><div class='add'>+	sh_eth_write(ndev, EDSR_ENALL, EDSR);</div><div class='add'>+	sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER, EDMR);</div><div class='add'>+	while (cnt &gt; 0) {</div><div class='add'>+		if (!(sh_eth_read(ndev, EDMR) &amp; 0x3))</div><div class='add'>+			break;</div><div class='add'>+		mdelay(1);</div><div class='add'>+		cnt--;</div><div class='add'>+	}</div><div class='add'>+	if (cnt == 0)</div><div class='add'>+		printk(KERN_ERR "Device reset fail\n");</div><div class='add'>+</div><div class='add'>+	/* Table Init */</div><div class='add'>+	sh_eth_write(ndev, 0x0, TDLAR);</div><div class='add'>+	sh_eth_write(ndev, 0x0, TDFAR);</div><div class='add'>+	sh_eth_write(ndev, 0x0, TDFXR);</div><div class='add'>+	sh_eth_write(ndev, 0x0, TDFFR);</div><div class='add'>+	sh_eth_write(ndev, 0x0, RDLAR);</div><div class='add'>+	sh_eth_write(ndev, 0x0, RDFAR);</div><div class='add'>+	sh_eth_write(ndev, 0x0, RDFXR);</div><div class='add'>+	sh_eth_write(ndev, 0x0, RDFFR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sh_eth_set_duplex(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct sh_eth_private *mdp = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (mdp-&gt;duplex) /* Full */</div><div class='add'>+		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_DM, ECMR);</div><div class='add'>+	else		/* Half */</div><div class='add'>+		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) &amp; ~ECMR_DM, ECMR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sh_eth_set_rate(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct sh_eth_private *mdp = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	switch (mdp-&gt;speed) {</div><div class='add'>+	case 10: /* 10BASE */</div><div class='add'>+		sh_eth_write(ndev, GECMR_10, GECMR);</div><div class='add'>+		break;</div><div class='add'>+	case 100:/* 100BASE */</div><div class='add'>+		sh_eth_write(ndev, GECMR_100, GECMR);</div><div class='add'>+		break;</div><div class='add'>+	case 1000: /* 1000BASE */</div><div class='add'>+		sh_eth_write(ndev, GECMR_1000, GECMR);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* R8A7740 */</div><div class='add'>+static struct sh_eth_cpu_data sh_eth_my_cpu_data = {</div><div class='add'>+	.chip_reset	= sh_eth_chip_reset,</div><div class='add'>+	.set_duplex	= sh_eth_set_duplex,</div><div class='add'>+	.set_rate	= sh_eth_set_rate,</div><div class='add'>+</div><div class='add'>+	.ecsr_value	= ECSR_ICD | ECSR_MPD,</div><div class='add'>+	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,</div><div class='add'>+	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,</div><div class='add'>+</div><div class='add'>+	.tx_check	= EESR_TC1 | EESR_FTC,</div><div class='add'>+	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | \</div><div class='add'>+			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE | \</div><div class='add'>+			  EESR_ECI,</div><div class='add'>+	.tx_error_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_TDE | \</div><div class='add'>+			  EESR_TFE,</div><div class='add'>+</div><div class='add'>+	.apr		= 1,</div><div class='add'>+	.mpr		= 1,</div><div class='add'>+	.tpauser	= 1,</div><div class='add'>+	.bculr		= 1,</div><div class='add'>+	.hw_swap	= 1,</div><div class='add'>+	.no_trimd	= 1,</div><div class='add'>+	.no_ade		= 1,</div><div class='add'>+	.tsu		= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #elif defined(CONFIG_CPU_SUBTYPE_SH7619)</div><div class='ctx'> #define SH_ETH_RESET_DEFAULT	1</div><div class='ctx'> static struct sh_eth_cpu_data sh_eth_my_cpu_data = {</div><div class='hunk'>@@ -443,7 +551,7 @@ static void sh_eth_reset(struct net_device *ndev)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_CPU_SH4)</div><div class='add'>+#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)</div><div class='ctx'> static void sh_eth_set_receive_align(struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	int reserve;</div><div class='hunk'>@@ -919,6 +1027,10 @@ static int sh_eth_rx(struct net_device *ndev)</div><div class='ctx'> 		desc_status = edmac_to_cpu(mdp, rxdesc-&gt;status);</div><div class='ctx'> 		pkt_len = rxdesc-&gt;frame_length;</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_ARCH_R8A7740)</div><div class='add'>+		desc_status &gt;&gt;= 16;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 		if (--boguscnt &lt; 0)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -989,8 +1101,12 @@ static int sh_eth_rx(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	/* Restart Rx engine if stopped. */</div><div class='ctx'> 	/* If we don't need to check status, don't. -KDU */</div><div class='del'>-	if (!(sh_eth_read(ndev, EDRRR) &amp; EDRRR_R))</div><div class='add'>+	if (!(sh_eth_read(ndev, EDRRR) &amp; EDRRR_R)) {</div><div class='add'>+		/* fix the values for the next receiving */</div><div class='add'>+		mdp-&gt;cur_rx = mdp-&gt;dirty_rx = (sh_eth_read(ndev, RDFAR) -</div><div class='add'>+					       sh_eth_read(ndev, RDLAR)) &gt;&gt; 4;</div><div class='ctx'> 		sh_eth_write(ndev, EDRRR_R, EDRRR);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1087,8 +1203,6 @@ static void sh_eth_error(struct net_device *ndev, int intr_status)</div><div class='ctx'> 		/* Receive Descriptor Empty int */</div><div class='ctx'> 		ndev-&gt;stats.rx_over_errors++;</div><div class='ctx'> </div><div class='del'>-		if (sh_eth_read(ndev, EDRRR) ^ EDRRR_R)</div><div class='del'>-			sh_eth_write(ndev, EDRRR_R, EDRRR);</div><div class='ctx'> 		if (netif_msg_rx_err(mdp))</div><div class='ctx'> 			dev_err(&amp;ndev-&gt;dev, "Receive Descriptor Empty\n");</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h<br/>index 0fa14afce23d..57b8e1fc5d15 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/renesas/sh_eth.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/renesas/sh_eth.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/renesas/sh_eth.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/renesas/sh_eth.h</a></div><div class='hunk'>@@ -372,7 +372,7 @@ static const u16 sh_eth_offset_fast_sh3_sh2[SH_ETH_MAX_REGISTER_OFFSET] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Driver's parameters */</div><div class='del'>-#if defined(CONFIG_CPU_SH4)</div><div class='add'>+#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)</div><div class='ctx'> #define SH4_SKB_RX_ALIGN	32</div><div class='ctx'> #else</div><div class='ctx'> #define SH2_SH3_SKB_RX_ALIGN	2</div><div class='hunk'>@@ -381,7 +381,8 @@ static const u16 sh_eth_offset_fast_sh3_sh2[SH_ETH_MAX_REGISTER_OFFSET] = {</div><div class='ctx'> /*</div><div class='ctx'>  * Register's bits</div><div class='ctx'>  */</div><div class='del'>-#if defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763)</div><div class='add'>+#if defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763) ||\</div><div class='add'>+    defined(CONFIG_ARCH_R8A7740)</div><div class='ctx'> /* EDSR */</div><div class='ctx'> enum EDSR_BIT {</div><div class='ctx'> 	EDSR_ENT = 0x01, EDSR_ENR = 0x02,</div><div class='head'>diff --git a/drivers/net/ethernet/s6gmac.c b/drivers/net/ethernet/s6gmac.c<br/>index 1895605abb35..2ed3ab4b3c2d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/s6gmac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/s6gmac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/s6gmac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/s6gmac.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Ethernet driver for S6105 on chip network device</div><div class='ctx'>  * (c)2008 emlix GmbH http://www.emlix.com</div><div class='del'>- * Authors:	Oskar Schirmer &lt;os@emlix.com&gt;</div><div class='add'>+ * Authors:	Oskar Schirmer &lt;oskar@scara.com&gt;</div><div class='ctx'>  *		Daniel Gloeckner &lt;dg@emlix.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or</div><div class='hunk'>@@ -937,7 +937,7 @@ static struct net_device_stats *s6gmac_stats(struct net_device *dev)</div><div class='ctx'> 	do {</div><div class='ctx'> 		unsigned long flags;</div><div class='ctx'> 		spin_lock_irqsave(&amp;pd-&gt;lock, flags);</div><div class='del'>-		for (i = 0; i &lt; sizeof(pd-&gt;stats) / sizeof(unsigned long); i++)</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(pd-&gt;stats); i++)</div><div class='ctx'> 			pd-&gt;stats[i] =</div><div class='ctx'> 				pd-&gt;carry[i] &lt;&lt; (S6_GMAC_STAT_SIZE_MIN - 1);</div><div class='ctx'> 		s6gmac_stats_collect(pd, &amp;statinf[0][0]);</div><div class='hunk'>@@ -1070,4 +1070,4 @@ module_exit(s6gmac_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("S6105 on chip Ethernet driver");</div><div class='del'>-MODULE_AUTHOR("Oskar Schirmer &lt;os@emlix.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Oskar Schirmer &lt;oskar@scara.com&gt;");</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/efx.c b/drivers/net/ethernet/sfc/efx.c<br/>index 3cbfbffe3f00..b95f2e1b33f0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sfc/efx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sfc/efx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sfc/efx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sfc/efx.c</a></div><div class='hunk'>@@ -656,25 +656,30 @@ static void efx_stop_datapath(struct efx_nic *efx)</div><div class='ctx'> 	struct efx_channel *channel;</div><div class='ctx'> 	struct efx_tx_queue *tx_queue;</div><div class='ctx'> 	struct efx_rx_queue *rx_queue;</div><div class='add'>+	struct pci_dev *dev = efx-&gt;pci_dev;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	EFX_ASSERT_RESET_SERIALISED(efx);</div><div class='ctx'> 	BUG_ON(efx-&gt;port_enabled);</div><div class='ctx'> </div><div class='del'>-	rc = efx_nic_flush_queues(efx);</div><div class='del'>-	if (rc &amp;&amp; EFX_WORKAROUND_7803(efx)) {</div><div class='del'>-		/* Schedule a reset to recover from the flush failure. The</div><div class='del'>-		 * descriptor caches reference memory we're about to free,</div><div class='del'>-		 * but falcon_reconfigure_mac_wrapper() won't reconnect</div><div class='del'>-		 * the MACs because of the pending reset. */</div><div class='del'>-		netif_err(efx, drv, efx-&gt;net_dev,</div><div class='del'>-			  "Resetting to recover from flush failure\n");</div><div class='del'>-		efx_schedule_reset(efx, RESET_TYPE_ALL);</div><div class='del'>-	} else if (rc) {</div><div class='del'>-		netif_err(efx, drv, efx-&gt;net_dev, "failed to flush queues\n");</div><div class='del'>-	} else {</div><div class='del'>-		netif_dbg(efx, drv, efx-&gt;net_dev,</div><div class='del'>-			  "successfully flushed all queues\n");</div><div class='add'>+	/* Only perform flush if dma is enabled */</div><div class='add'>+	if (dev-&gt;is_busmaster) {</div><div class='add'>+		rc = efx_nic_flush_queues(efx);</div><div class='add'>+</div><div class='add'>+		if (rc &amp;&amp; EFX_WORKAROUND_7803(efx)) {</div><div class='add'>+			/* Schedule a reset to recover from the flush failure. The</div><div class='add'>+			 * descriptor caches reference memory we're about to free,</div><div class='add'>+			 * but falcon_reconfigure_mac_wrapper() won't reconnect</div><div class='add'>+			 * the MACs because of the pending reset. */</div><div class='add'>+			netif_err(efx, drv, efx-&gt;net_dev,</div><div class='add'>+				  "Resetting to recover from flush failure\n");</div><div class='add'>+			efx_schedule_reset(efx, RESET_TYPE_ALL);</div><div class='add'>+		} else if (rc) {</div><div class='add'>+			netif_err(efx, drv, efx-&gt;net_dev, "failed to flush queues\n");</div><div class='add'>+		} else {</div><div class='add'>+			netif_dbg(efx, drv, efx-&gt;net_dev,</div><div class='add'>+				  "successfully flushed all queues\n");</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	efx_for_each_channel(channel, efx) {</div><div class='hunk'>@@ -1349,7 +1354,7 @@ static int efx_probe_interrupts(struct efx_nic *efx)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* RSS might be usable on VFs even if it is disabled on the PF */</div><div class='del'>-	efx-&gt;rss_spread = (efx-&gt;n_rx_channels &gt; 1 ?</div><div class='add'>+	efx-&gt;rss_spread = ((efx-&gt;n_rx_channels &gt; 1 || !efx_sriov_wanted(efx)) ?</div><div class='ctx'> 			   efx-&gt;n_rx_channels : efx_vf_size(efx));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2492,8 +2497,8 @@ static void efx_pci_remove(struct pci_dev *pci_dev)</div><div class='ctx'> 	efx_fini_io(efx);</div><div class='ctx'> 	netif_dbg(efx, drv, efx-&gt;net_dev, "shutdown successful\n");</div><div class='ctx'> </div><div class='del'>-	pci_set_drvdata(pci_dev, NULL);</div><div class='ctx'> 	efx_fini_struct(efx);</div><div class='add'>+	pci_set_drvdata(pci_dev, NULL);</div><div class='ctx'> 	free_netdev(efx-&gt;net_dev);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -2695,6 +2700,7 @@ static int __devinit efx_pci_probe(struct pci_dev *pci_dev,</div><div class='ctx'>  fail2:</div><div class='ctx'> 	efx_fini_struct(efx);</div><div class='ctx'>  fail1:</div><div class='add'>+	pci_set_drvdata(pci_dev, NULL);</div><div class='ctx'> 	WARN_ON(rc &gt; 0);</div><div class='ctx'> 	netif_dbg(efx, drv, efx-&gt;net_dev, "initialisation failed. rc=%d\n", rc);</div><div class='ctx'> 	free_netdev(net_dev);</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/ethtool.c b/drivers/net/ethernet/sfc/ethtool.c<br/>index f22f45f515a8..03ded364c8da 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sfc/ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sfc/ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sfc/ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sfc/ethtool.c</a></div><div class='hunk'>@@ -1023,7 +1023,7 @@ static int efx_ethtool_set_class_rule(struct efx_nic *efx,</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		/* Is it a default UC or MC filter? */</div><div class='del'>-		if (!compare_ether_addr(mac_mask-&gt;h_dest, mac_addr_mc_mask) &amp;&amp;</div><div class='add'>+		if (ether_addr_equal(mac_mask-&gt;h_dest, mac_addr_mc_mask) &amp;&amp;</div><div class='ctx'> 		    vlan_tag_mask == 0) {</div><div class='ctx'> 			if (is_multicast_ether_addr(mac_entry-&gt;h_dest))</div><div class='ctx'> 				rc = efx_filter_set_mc_def(&amp;spec);</div><div class='hunk'>@@ -1108,6 +1108,39 @@ static int efx_ethtool_set_rxfh_indir(struct net_device *net_dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int efx_ethtool_get_module_eeprom(struct net_device *net_dev,</div><div class='add'>+					 struct ethtool_eeprom *ee,</div><div class='add'>+					 u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct efx_nic *efx = netdev_priv(net_dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!efx-&gt;phy_op || !efx-&gt;phy_op-&gt;get_module_eeprom)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;efx-&gt;mac_lock);</div><div class='add'>+	ret = efx-&gt;phy_op-&gt;get_module_eeprom(efx, ee, data);</div><div class='add'>+	mutex_unlock(&amp;efx-&gt;mac_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int efx_ethtool_get_module_info(struct net_device *net_dev,</div><div class='add'>+				       struct ethtool_modinfo *modinfo)</div><div class='add'>+{</div><div class='add'>+	struct efx_nic *efx = netdev_priv(net_dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!efx-&gt;phy_op || !efx-&gt;phy_op-&gt;get_module_info)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;efx-&gt;mac_lock);</div><div class='add'>+	ret = efx-&gt;phy_op-&gt;get_module_info(efx, modinfo);</div><div class='add'>+	mutex_unlock(&amp;efx-&gt;mac_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct ethtool_ops efx_ethtool_ops = {</div><div class='ctx'> 	.get_settings		= efx_ethtool_get_settings,</div><div class='ctx'> 	.set_settings		= efx_ethtool_set_settings,</div><div class='hunk'>@@ -1137,4 +1170,6 @@ const struct ethtool_ops efx_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size	= efx_ethtool_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh_indir		= efx_ethtool_get_rxfh_indir,</div><div class='ctx'> 	.set_rxfh_indir		= efx_ethtool_set_rxfh_indir,</div><div class='add'>+	.get_module_info	= efx_ethtool_get_module_info,</div><div class='add'>+	.get_module_eeprom	= efx_ethtool_get_module_eeprom,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/mcdi_phy.c b/drivers/net/ethernet/sfc/mcdi_phy.c<br/>index 7bcad899a936..13cb40fe90c1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sfc/mcdi_phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sfc/mcdi_phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sfc/mcdi_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sfc/mcdi_phy.c</a></div><div class='hunk'>@@ -739,6 +739,80 @@ static const char *efx_mcdi_phy_test_name(struct efx_nic *efx,</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define SFP_PAGE_SIZE	128</div><div class='add'>+#define SFP_NUM_PAGES	2</div><div class='add'>+static int efx_mcdi_phy_get_module_eeprom(struct efx_nic *efx,</div><div class='add'>+					  struct ethtool_eeprom *ee, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u8 outbuf[MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX];</div><div class='add'>+	u8 inbuf[MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN];</div><div class='add'>+	size_t outlen;</div><div class='add'>+	int rc;</div><div class='add'>+	unsigned int payload_len;</div><div class='add'>+	unsigned int space_remaining = ee-&gt;len;</div><div class='add'>+	unsigned int page;</div><div class='add'>+	unsigned int page_off;</div><div class='add'>+	unsigned int to_copy;</div><div class='add'>+	u8 *user_data = data;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(SFP_PAGE_SIZE * SFP_NUM_PAGES != ETH_MODULE_SFF_8079_LEN);</div><div class='add'>+</div><div class='add'>+	page_off = ee-&gt;offset % SFP_PAGE_SIZE;</div><div class='add'>+	page = ee-&gt;offset / SFP_PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	while (space_remaining &amp;&amp; (page &lt; SFP_NUM_PAGES)) {</div><div class='add'>+		MCDI_SET_DWORD(inbuf, GET_PHY_MEDIA_INFO_IN_PAGE, page);</div><div class='add'>+</div><div class='add'>+		rc = efx_mcdi_rpc(efx, MC_CMD_GET_PHY_MEDIA_INFO,</div><div class='add'>+				  inbuf, sizeof(inbuf),</div><div class='add'>+				  outbuf, sizeof(outbuf),</div><div class='add'>+				  &amp;outlen);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		if (outlen &lt; (MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_OFST +</div><div class='add'>+			      SFP_PAGE_SIZE))</div><div class='add'>+			return -EIO;</div><div class='add'>+</div><div class='add'>+		payload_len = MCDI_DWORD(outbuf,</div><div class='add'>+					 GET_PHY_MEDIA_INFO_OUT_DATALEN);</div><div class='add'>+		if (payload_len != SFP_PAGE_SIZE)</div><div class='add'>+			return -EIO;</div><div class='add'>+</div><div class='add'>+		/* Copy as much as we can into data */</div><div class='add'>+		payload_len -= page_off;</div><div class='add'>+		to_copy = (space_remaining &lt; payload_len) ?</div><div class='add'>+			space_remaining : payload_len;</div><div class='add'>+</div><div class='add'>+		memcpy(user_data,</div><div class='add'>+		       outbuf + page_off +</div><div class='add'>+		       MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_OFST,</div><div class='add'>+		       to_copy);</div><div class='add'>+</div><div class='add'>+		space_remaining -= to_copy;</div><div class='add'>+		user_data += to_copy;</div><div class='add'>+		page_off = 0;</div><div class='add'>+		page++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int efx_mcdi_phy_get_module_info(struct efx_nic *efx,</div><div class='add'>+					struct ethtool_modinfo *modinfo)</div><div class='add'>+{</div><div class='add'>+	struct efx_mcdi_phy_data *phy_cfg = efx-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	switch (phy_cfg-&gt;media) {</div><div class='add'>+	case MC_CMD_MEDIA_SFP_PLUS:</div><div class='add'>+		modinfo-&gt;type = ETH_MODULE_SFF_8079;</div><div class='add'>+		modinfo-&gt;eeprom_len = ETH_MODULE_SFF_8079_LEN;</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct efx_phy_operations efx_mcdi_phy_ops = {</div><div class='ctx'> 	.probe		= efx_mcdi_phy_probe,</div><div class='ctx'> 	.init		= efx_port_dummy_op_int,</div><div class='hunk'>@@ -751,4 +825,6 @@ const struct efx_phy_operations efx_mcdi_phy_ops = {</div><div class='ctx'> 	.test_alive	= efx_mcdi_phy_test_alive,</div><div class='ctx'> 	.run_tests	= efx_mcdi_phy_run_tests,</div><div class='ctx'> 	.test_name	= efx_mcdi_phy_test_name,</div><div class='add'>+	.get_module_eeprom = efx_mcdi_phy_get_module_eeprom,</div><div class='add'>+	.get_module_info = efx_mcdi_phy_get_module_info,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/net_driver.h b/drivers/net/ethernet/sfc/net_driver.h<br/>index f0385e1fb2d8..0e575359af17 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sfc/net_driver.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sfc/net_driver.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sfc/net_driver.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sfc/net_driver.h</a></div><div class='hunk'>@@ -252,8 +252,6 @@ struct efx_rx_page_state {</div><div class='ctx'>  * @max_fill: RX descriptor maximum fill level (&lt;= ring size)</div><div class='ctx'>  * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill</div><div class='ctx'>  *	(&lt;= @max_fill)</div><div class='del'>- * @fast_fill_limit: The level to which a fast fill will fill</div><div class='del'>- *	(@fast_fill_trigger &lt;= @fast_fill_limit &lt;= @max_fill)</div><div class='ctx'>  * @min_fill: RX descriptor minimum non-zero fill level.</div><div class='ctx'>  *	This records the minimum fill level observed when a ring</div><div class='ctx'>  *	refill was triggered.</div><div class='hunk'>@@ -274,7 +272,6 @@ struct efx_rx_queue {</div><div class='ctx'> 	int removed_count;</div><div class='ctx'> 	unsigned int max_fill;</div><div class='ctx'> 	unsigned int fast_fill_trigger;</div><div class='del'>-	unsigned int fast_fill_limit;</div><div class='ctx'> 	unsigned int min_fill;</div><div class='ctx'> 	unsigned int min_overfill;</div><div class='ctx'> 	unsigned int alloc_page_count;</div><div class='hunk'>@@ -522,6 +519,11 @@ struct efx_phy_operations {</div><div class='ctx'> 	int (*test_alive) (struct efx_nic *efx);</div><div class='ctx'> 	const char *(*test_name) (struct efx_nic *efx, unsigned int index);</div><div class='ctx'> 	int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);</div><div class='add'>+	int (*get_module_eeprom) (struct efx_nic *efx,</div><div class='add'>+			       struct ethtool_eeprom *ee,</div><div class='add'>+			       u8 *data);</div><div class='add'>+	int (*get_module_info) (struct efx_nic *efx,</div><div class='add'>+				struct ethtool_modinfo *modinfo);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/qt202x_phy.c b/drivers/net/ethernet/sfc/qt202x_phy.c<br/>index 8a7caf88ffb6..326a28637f3c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sfc/qt202x_phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sfc/qt202x_phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sfc/qt202x_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sfc/qt202x_phy.c</a></div><div class='hunk'>@@ -449,6 +449,37 @@ static void qt202x_phy_remove(struct efx_nic *efx)</div><div class='ctx'> 	efx-&gt;phy_data = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int qt202x_phy_get_module_info(struct efx_nic *efx,</div><div class='add'>+				      struct ethtool_modinfo *modinfo)</div><div class='add'>+{</div><div class='add'>+	modinfo-&gt;type = ETH_MODULE_SFF_8079;</div><div class='add'>+	modinfo-&gt;eeprom_len = ETH_MODULE_SFF_8079_LEN;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qt202x_phy_get_module_eeprom(struct efx_nic *efx,</div><div class='add'>+					struct ethtool_eeprom *ee, u8 *data)</div><div class='add'>+{</div><div class='add'>+	int mmd, reg_base, rc, i;		</div><div class='add'>+</div><div class='add'>+	if (efx-&gt;phy_type == PHY_TYPE_QT2025C) {</div><div class='add'>+		mmd = MDIO_MMD_PCS;</div><div class='add'>+		reg_base = 0xd000;</div><div class='add'>+	} else {</div><div class='add'>+		mmd = MDIO_MMD_PMAPMD;</div><div class='add'>+		reg_base = 0x8007;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ee-&gt;len; i++) {</div><div class='add'>+		rc = efx_mdio_read(efx, mmd, reg_base + ee-&gt;offset + i);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+		data[i] = rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct efx_phy_operations falcon_qt202x_phy_ops = {</div><div class='ctx'> 	.probe		 = qt202x_phy_probe,</div><div class='ctx'> 	.init		 = qt202x_phy_init,</div><div class='hunk'>@@ -459,4 +490,6 @@ const struct efx_phy_operations falcon_qt202x_phy_ops = {</div><div class='ctx'> 	.get_settings	 = qt202x_phy_get_settings,</div><div class='ctx'> 	.set_settings	 = efx_mdio_set_settings,</div><div class='ctx'> 	.test_alive	 = efx_mdio_test_alive,</div><div class='add'>+	.get_module_eeprom = qt202x_phy_get_module_eeprom,</div><div class='add'>+	.get_module_info = qt202x_phy_get_module_info,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/rx.c b/drivers/net/ethernet/sfc/rx.c<br/>index 763fa2fe1a38..243e91f3dff9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sfc/rx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sfc/rx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sfc/rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sfc/rx.c</a></div><div class='hunk'>@@ -76,12 +76,7 @@ static int rx_alloc_method = RX_ALLOC_METHOD_AUTO;</div><div class='ctx'> /* This is the percentage fill level below which new RX descriptors</div><div class='ctx'>  * will be added to the RX descriptor ring.</div><div class='ctx'>  */</div><div class='del'>-static unsigned int rx_refill_threshold = 90;</div><div class='del'>-</div><div class='del'>-/* This is the percentage fill level to which an RX queue will be refilled</div><div class='del'>- * when the "RX refill threshold" is reached.</div><div class='del'>- */</div><div class='del'>-static unsigned int rx_refill_limit = 95;</div><div class='add'>+static unsigned int rx_refill_threshold;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * RX maximum head room required.</div><div class='hunk'>@@ -342,7 +337,7 @@ static void efx_recycle_rx_buffer(struct efx_channel *channel,</div><div class='ctx'>  * efx_fast_push_rx_descriptors - push new RX descriptors quickly</div><div class='ctx'>  * @rx_queue:		RX descriptor queue</div><div class='ctx'>  * This will aim to fill the RX descriptor queue up to</div><div class='del'>- * @rx_queue-&gt;@fast_fill_limit. If there is insufficient atomic</div><div class='add'>+ * @rx_queue-&gt;@max_fill. If there is insufficient atomic</div><div class='ctx'>  * memory to do so, a slow fill will be scheduled.</div><div class='ctx'>  *</div><div class='ctx'>  * The caller must provide serialisation (none is used here). In practise,</div><div class='hunk'>@@ -367,15 +362,14 @@ void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue)</div><div class='ctx'> 			rx_queue-&gt;min_fill = fill_level;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	space = rx_queue-&gt;fast_fill_limit - fill_level;</div><div class='del'>-	if (space &lt; EFX_RX_BATCH)</div><div class='del'>-		goto out;</div><div class='add'>+	space = rx_queue-&gt;max_fill - fill_level;</div><div class='add'>+	EFX_BUG_ON_PARANOID(space &lt; EFX_RX_BATCH);</div><div class='ctx'> </div><div class='ctx'> 	netif_vdbg(rx_queue-&gt;efx, rx_status, rx_queue-&gt;efx-&gt;net_dev,</div><div class='ctx'> 		   "RX queue %d fast-filling descriptor ring from"</div><div class='ctx'> 		   " level %d to level %d using %s allocation\n",</div><div class='ctx'> 		   efx_rx_queue_index(rx_queue), fill_level,</div><div class='del'>-		   rx_queue-&gt;fast_fill_limit,</div><div class='add'>+		   rx_queue-&gt;max_fill,</div><div class='ctx'> 		   channel-&gt;rx_alloc_push_pages ? "page" : "skb");</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='hunk'>@@ -681,7 +675,7 @@ int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)</div><div class='ctx'> void efx_init_rx_queue(struct efx_rx_queue *rx_queue)</div><div class='ctx'> {</div><div class='ctx'> 	struct efx_nic *efx = rx_queue-&gt;efx;</div><div class='del'>-	unsigned int max_fill, trigger, limit;</div><div class='add'>+	unsigned int max_fill, trigger, max_trigger;</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(rx_queue-&gt;efx, drv, rx_queue-&gt;efx-&gt;net_dev,</div><div class='ctx'> 		  "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));</div><div class='hunk'>@@ -694,12 +688,17 @@ void efx_init_rx_queue(struct efx_rx_queue *rx_queue)</div><div class='ctx'> </div><div class='ctx'> 	/* Initialise limit fields */</div><div class='ctx'> 	max_fill = efx-&gt;rxq_entries - EFX_RXD_HEAD_ROOM;</div><div class='del'>-	trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;</div><div class='del'>-	limit = max_fill * min(rx_refill_limit, 100U) / 100U;</div><div class='add'>+	max_trigger = max_fill - EFX_RX_BATCH;</div><div class='add'>+	if (rx_refill_threshold != 0) {</div><div class='add'>+		trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;</div><div class='add'>+		if (trigger &gt; max_trigger)</div><div class='add'>+			trigger = max_trigger;</div><div class='add'>+	} else {</div><div class='add'>+		trigger = max_trigger;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	rx_queue-&gt;max_fill = max_fill;</div><div class='ctx'> 	rx_queue-&gt;fast_fill_trigger = trigger;</div><div class='del'>-	rx_queue-&gt;fast_fill_limit = limit;</div><div class='ctx'> </div><div class='ctx'> 	/* Set up RX descriptor ring */</div><div class='ctx'> 	rx_queue-&gt;enabled = true;</div><div class='hunk'>@@ -746,5 +745,5 @@ MODULE_PARM_DESC(rx_alloc_method, "Allocation method used for RX buffers");</div><div class='ctx'> </div><div class='ctx'> module_param(rx_refill_threshold, uint, 0444);</div><div class='ctx'> MODULE_PARM_DESC(rx_refill_threshold,</div><div class='del'>-		 "RX descriptor ring fast/slow fill threshold (%)");</div><div class='add'>+		 "RX descriptor ring refill threshold (%)");</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/silan/sc92031.c b/drivers/net/ethernet/silan/sc92031.c<br/>index a284d6440538..32e55664df6e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/silan/sc92031.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/silan/sc92031.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/silan/sc92031.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/silan/sc92031.c</a></div><div class='hunk'>@@ -39,9 +39,7 @@</div><div class='ctx'> #define SC92031_NAME "sc92031"</div><div class='ctx'> </div><div class='ctx'> /* BAR 0 is MMIO, BAR 1 is PIO */</div><div class='del'>-#ifndef SC92031_USE_BAR</div><div class='del'>-#define SC92031_USE_BAR 0</div><div class='del'>-#endif</div><div class='add'>+#define SC92031_USE_PIO	0</div><div class='ctx'> </div><div class='ctx'> /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). */</div><div class='ctx'> static int multicast_filter_limit = 64;</div><div class='hunk'>@@ -366,7 +364,7 @@ static void sc92031_disable_interrupts(struct net_device *dev)</div><div class='ctx'> 	mmiowb();</div><div class='ctx'> </div><div class='ctx'> 	/* wait for any concurrent interrupt/tasklet to finish */</div><div class='del'>-	synchronize_irq(dev-&gt;irq);</div><div class='add'>+	synchronize_irq(priv-&gt;pdev-&gt;irq);</div><div class='ctx'> 	tasklet_disable(&amp;priv-&gt;tasklet);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1114,10 +1112,13 @@ static void sc92031_tx_timeout(struct net_device *dev)</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> static void sc92031_poll_controller(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='del'>-	if (sc92031_interrupt(dev-&gt;irq, dev) != IRQ_NONE)</div><div class='add'>+	struct sc92031_priv *priv = netdev_priv(dev);</div><div class='add'>+	const int irq = priv-&gt;pdev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	disable_irq(irq);</div><div class='add'>+	if (sc92031_interrupt(irq, dev) != IRQ_NONE)</div><div class='ctx'> 		sc92031_tasklet((unsigned long)dev);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1402,7 +1403,6 @@ static int __devinit sc92031_probe(struct pci_dev *pdev,</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct sc92031_priv *priv;</div><div class='ctx'> 	u32 mac0, mac1;</div><div class='del'>-	unsigned long base_addr;</div><div class='ctx'> </div><div class='ctx'> 	err = pci_enable_device(pdev);</div><div class='ctx'> 	if (unlikely(err &lt; 0))</div><div class='hunk'>@@ -1422,7 +1422,7 @@ static int __devinit sc92031_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (unlikely(err &lt; 0))</div><div class='ctx'> 		goto out_request_regions;</div><div class='ctx'> </div><div class='del'>-	port_base = pci_iomap(pdev, SC92031_USE_BAR, 0);</div><div class='add'>+	port_base = pci_iomap(pdev, SC92031_USE_PIO, 0);</div><div class='ctx'> 	if (unlikely(!port_base)) {</div><div class='ctx'> 		err = -EIO;</div><div class='ctx'> 		goto out_iomap;</div><div class='hunk'>@@ -1437,14 +1437,6 @@ static int __devinit sc92031_probe(struct pci_dev *pdev,</div><div class='ctx'> 	pci_set_drvdata(pdev, dev);</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-#if SC92031_USE_BAR == 0</div><div class='del'>-	dev-&gt;mem_start = pci_resource_start(pdev, SC92031_USE_BAR);</div><div class='del'>-	dev-&gt;mem_end = pci_resource_end(pdev, SC92031_USE_BAR);</div><div class='del'>-#elif SC92031_USE_BAR == 1</div><div class='del'>-	dev-&gt;base_addr = pci_resource_start(pdev, SC92031_USE_BAR);</div><div class='del'>-#endif</div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-</div><div class='ctx'> 	/* faked with skb_copy_and_csum_dev */</div><div class='ctx'> 	dev-&gt;features = NETIF_F_SG | NETIF_F_HIGHDMA |</div><div class='ctx'> 		NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;</div><div class='hunk'>@@ -1478,13 +1470,9 @@ static int __devinit sc92031_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto out_register_netdev;</div><div class='ctx'> </div><div class='del'>-#if SC92031_USE_BAR == 0</div><div class='del'>-	base_addr = dev-&gt;mem_start;</div><div class='del'>-#elif SC92031_USE_BAR == 1</div><div class='del'>-	base_addr = dev-&gt;base_addr;</div><div class='del'>-#endif</div><div class='ctx'> 	printk(KERN_INFO "%s: SC92031 at 0x%lx, %pM, IRQ %d\n", dev-&gt;name,</div><div class='del'>-			base_addr, dev-&gt;dev_addr, dev-&gt;irq);</div><div class='add'>+	       (long)pci_resource_start(pdev, SC92031_USE_PIO), dev-&gt;dev_addr,</div><div class='add'>+	       pdev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sis/sis190.c b/drivers/net/ethernet/sis/sis190.c<br/>index a9deda8eaf63..4613591b43e7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sis/sis190.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sis/sis190.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sis/sis190.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sis/sis190.c</a></div><div class='hunk'>@@ -729,7 +729,7 @@ static void sis190_tx_interrupt(struct net_device *dev,</div><div class='ctx'>  * The interrupt handler does all of the Rx thread work and cleans up after</div><div class='ctx'>  * the Tx thread.</div><div class='ctx'>  */</div><div class='del'>-static irqreturn_t sis190_interrupt(int irq, void *__dev)</div><div class='add'>+static irqreturn_t sis190_irq(int irq, void *__dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = __dev;</div><div class='ctx'> 	struct sis190_private *tp = netdev_priv(dev);</div><div class='hunk'>@@ -772,11 +772,11 @@ out:</div><div class='ctx'> static void sis190_netpoll(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sis190_private *tp = netdev_priv(dev);</div><div class='del'>-	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='add'>+	const int irq = tp-&gt;pci_dev-&gt;irq;</div><div class='ctx'> </div><div class='del'>-	disable_irq(pdev-&gt;irq);</div><div class='del'>-	sis190_interrupt(pdev-&gt;irq, dev);</div><div class='del'>-	enable_irq(pdev-&gt;irq);</div><div class='add'>+	disable_irq(irq);</div><div class='add'>+	sis190_irq(irq, dev);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1085,7 +1085,7 @@ static int sis190_open(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	sis190_request_timer(dev);</div><div class='ctx'> </div><div class='del'>-	rc = request_irq(dev-&gt;irq, sis190_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	rc = request_irq(pdev-&gt;irq, sis190_irq, IRQF_SHARED, dev-&gt;name, dev);</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='ctx'> 		goto err_release_timer_2;</div><div class='ctx'> </div><div class='hunk'>@@ -1097,11 +1097,9 @@ err_release_timer_2:</div><div class='ctx'> 	sis190_delete_timer(dev);</div><div class='ctx'> 	sis190_rx_clear(tp);</div><div class='ctx'> err_free_rx_1:</div><div class='del'>-	pci_free_consistent(tp-&gt;pci_dev, RX_RING_BYTES, tp-&gt;RxDescRing,</div><div class='del'>-		tp-&gt;rx_dma);</div><div class='add'>+	pci_free_consistent(pdev, RX_RING_BYTES, tp-&gt;RxDescRing, tp-&gt;rx_dma);</div><div class='ctx'> err_free_tx_0:</div><div class='del'>-	pci_free_consistent(tp-&gt;pci_dev, TX_RING_BYTES, tp-&gt;TxDescRing,</div><div class='del'>-		tp-&gt;tx_dma);</div><div class='add'>+	pci_free_consistent(pdev, TX_RING_BYTES, tp-&gt;TxDescRing, tp-&gt;tx_dma);</div><div class='ctx'> 	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1141,7 +1139,7 @@ static void sis190_down(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 		spin_unlock_irq(&amp;tp-&gt;lock);</div><div class='ctx'> </div><div class='del'>-		synchronize_irq(dev-&gt;irq);</div><div class='add'>+		synchronize_irq(tp-&gt;pci_dev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 		if (!poll_locked)</div><div class='ctx'> 			poll_locked++;</div><div class='hunk'>@@ -1161,7 +1159,7 @@ static int sis190_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	sis190_down(dev);</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(pdev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	pci_free_consistent(pdev, TX_RING_BYTES, tp-&gt;TxDescRing, tp-&gt;tx_dma);</div><div class='ctx'> 	pci_free_consistent(pdev, RX_RING_BYTES, tp-&gt;RxDescRing, tp-&gt;rx_dma);</div><div class='hunk'>@@ -1884,8 +1882,6 @@ static int __devinit sis190_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;sis190_netdev_ops;</div><div class='ctx'> </div><div class='ctx'> 	SET_ETHTOOL_OPS(dev, &amp;sis190_ethtool_ops);</div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-	dev-&gt;base_addr = (unsigned long) 0xdead;</div><div class='ctx'> 	dev-&gt;watchdog_timeo = SIS190_TX_TIMEOUT;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;tp-&gt;lock);</div><div class='hunk'>@@ -1902,7 +1898,7 @@ static int __devinit sis190_init_one(struct pci_dev *pdev,</div><div class='ctx'> 		netdev_info(dev, "%s: %s at %p (IRQ: %d), %pM\n",</div><div class='ctx'> 			    pci_name(pdev),</div><div class='ctx'> 			    sis_chip_info[ent-&gt;driver_data].name,</div><div class='del'>-			    ioaddr, dev-&gt;irq, dev-&gt;dev_addr);</div><div class='add'>+			    ioaddr, pdev-&gt;irq, dev-&gt;dev_addr);</div><div class='ctx'> 		netdev_info(dev, "%s mode.\n",</div><div class='ctx'> 			    (tp-&gt;features &amp; F_HAS_RGMII) ? "RGMII" : "GMII");</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/sis/sis900.c b/drivers/net/ethernet/sis/sis900.c<br/>index 5ccf02e7e3ad..203d9c6ec23a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sis/sis900.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sis/sis900.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sis/sis900.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sis/sis900.c</a></div><div class='hunk'>@@ -168,6 +168,8 @@ struct sis900_private {</div><div class='ctx'> 	unsigned int cur_phy;</div><div class='ctx'> 	struct mii_if_info mii_info;</div><div class='ctx'> </div><div class='add'>+	void __iomem	*ioaddr;</div><div class='add'>+</div><div class='ctx'> 	struct timer_list timer; /* Link status detection timer. */</div><div class='ctx'> 	u8 autong_complete; /* 1: auto-negotiate complete  */</div><div class='ctx'> </div><div class='hunk'>@@ -201,13 +203,18 @@ MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtere</div><div class='ctx'> MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");</div><div class='ctx'> MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");</div><div class='ctx'> </div><div class='add'>+#define sw32(reg, val)	iowrite32(val, ioaddr + (reg))</div><div class='add'>+#define sw8(reg, val)	iowrite8(val, ioaddr + (reg))</div><div class='add'>+#define sr32(reg)	ioread32(ioaddr + (reg))</div><div class='add'>+#define sr16(reg)	ioread16(ioaddr + (reg))</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> static void sis900_poll(struct net_device *dev);</div><div class='ctx'> #endif</div><div class='ctx'> static int sis900_open(struct net_device *net_dev);</div><div class='ctx'> static int sis900_mii_probe (struct net_device * net_dev);</div><div class='ctx'> static void sis900_init_rxfilter (struct net_device * net_dev);</div><div class='del'>-static u16 read_eeprom(long ioaddr, int location);</div><div class='add'>+static u16 read_eeprom(void __iomem *ioaddr, int location);</div><div class='ctx'> static int mdio_read(struct net_device *net_dev, int phy_id, int location);</div><div class='ctx'> static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);</div><div class='ctx'> static void sis900_timer(unsigned long data);</div><div class='hunk'>@@ -231,7 +238,7 @@ static u16 sis900_default_phy(struct net_device * net_dev);</div><div class='ctx'> static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);</div><div class='ctx'> static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);</div><div class='ctx'> static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);</div><div class='del'>-static void sis900_set_mode (long ioaddr, int speed, int duplex);</div><div class='add'>+static void sis900_set_mode(struct sis900_private *, int speed, int duplex);</div><div class='ctx'> static const struct ethtool_ops sis900_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -246,7 +253,8 @@ static const struct ethtool_ops sis900_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = pci_resource_start(pci_dev, 0);</div><div class='add'>+	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	u16 signature;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -325,29 +333,30 @@ static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,</div><div class='ctx'> static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,</div><div class='ctx'> 					struct net_device *net_dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='add'>+	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	u32 rfcrSave;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	rfcrSave = inl(rfcr + ioaddr);</div><div class='add'>+	rfcrSave = sr32(rfcr);</div><div class='ctx'> </div><div class='del'>-	outl(rfcrSave | RELOAD, ioaddr + cr);</div><div class='del'>-	outl(0, ioaddr + cr);</div><div class='add'>+	sw32(cr, rfcrSave | RELOAD);</div><div class='add'>+	sw32(cr, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* disable packet filtering before setting filter */</div><div class='del'>-	outl(rfcrSave &amp; ~RFEN, rfcr + ioaddr);</div><div class='add'>+	sw32(rfcr, rfcrSave &amp; ~RFEN);</div><div class='ctx'> </div><div class='ctx'> 	/* load MAC addr to filter data register */</div><div class='ctx'> 	for (i = 0 ; i &lt; 3 ; i++) {</div><div class='del'>-		outl((i &lt;&lt; RFADDR_shift), ioaddr + rfcr);</div><div class='del'>-		*( ((u16 *)net_dev-&gt;dev_addr) + i) = inw(ioaddr + rfdr);</div><div class='add'>+		sw32(rfcr, (i &lt;&lt; RFADDR_shift));</div><div class='add'>+		*( ((u16 *)net_dev-&gt;dev_addr) + i) = sr16(rfdr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Store MAC Address in perm_addr */</div><div class='ctx'> 	memcpy(net_dev-&gt;perm_addr, net_dev-&gt;dev_addr, ETH_ALEN);</div><div class='ctx'> </div><div class='ctx'> 	/* enable packet filtering */</div><div class='del'>-	outl(rfcrSave | RFEN, rfcr + ioaddr);</div><div class='add'>+	sw32(rfcr, rfcrSave | RFEN);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -371,31 +380,30 @@ static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,</div><div class='ctx'> static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,</div><div class='ctx'> 					struct net_device *net_dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='del'>-	long ee_addr = ioaddr + mear;</div><div class='del'>-	u32 waittime = 0;</div><div class='del'>-	int i;</div><div class='add'>+	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='add'>+	int wait, rc = 0;</div><div class='ctx'> </div><div class='del'>-	outl(EEREQ, ee_addr);</div><div class='del'>-	while(waittime &lt; 2000) {</div><div class='del'>-		if(inl(ee_addr) &amp; EEGNT) {</div><div class='add'>+	sw32(mear, EEREQ);</div><div class='add'>+	for (wait = 0; wait &lt; 2000; wait++) {</div><div class='add'>+		if (sr32(mear) &amp; EEGNT) {</div><div class='add'>+			u16 *mac = (u16 *)net_dev-&gt;dev_addr;</div><div class='add'>+			int i;</div><div class='ctx'> </div><div class='ctx'> 			/* get MAC address from EEPROM */</div><div class='ctx'> 			for (i = 0; i &lt; 3; i++)</div><div class='del'>-			        ((u16 *)(net_dev-&gt;dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);</div><div class='add'>+			        mac[i] = read_eeprom(ioaddr, i + EEPROMMACAddr);</div><div class='ctx'> </div><div class='ctx'> 			/* Store MAC Address in perm_addr */</div><div class='ctx'> 			memcpy(net_dev-&gt;perm_addr, net_dev-&gt;dev_addr, ETH_ALEN);</div><div class='ctx'> </div><div class='del'>-			outl(EEDONE, ee_addr);</div><div class='del'>-			return 1;</div><div class='del'>-		} else {</div><div class='del'>-			udelay(1);</div><div class='del'>-			waittime ++;</div><div class='add'>+			rc = 1;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='add'>+		udelay(1);</div><div class='ctx'> 	}</div><div class='del'>-	outl(EEDONE, ee_addr);</div><div class='del'>-	return 0;</div><div class='add'>+	sw32(mear, EEDONE);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops sis900_netdev_ops = {</div><div class='hunk'>@@ -433,7 +441,7 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,</div><div class='ctx'> 	struct pci_dev *dev;</div><div class='ctx'> 	dma_addr_t ring_dma;</div><div class='ctx'> 	void *ring_space;</div><div class='del'>-	long ioaddr;</div><div class='add'>+	void __iomem *ioaddr;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> 	const char *card_name = card_names[pci_id-&gt;driver_data];</div><div class='ctx'> 	const char *dev_name = pci_name(pci_dev);</div><div class='hunk'>@@ -464,14 +472,17 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,</div><div class='ctx'> 	SET_NETDEV_DEV(net_dev, &amp;pci_dev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	/* We do a request_region() to register /proc/ioports info. */</div><div class='del'>-	ioaddr = pci_resource_start(pci_dev, 0);</div><div class='ctx'> 	ret = pci_request_regions(pci_dev, "sis900");</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> </div><div class='add'>+	/* IO region. */</div><div class='add'>+	ioaddr = pci_iomap(pci_dev, 0, 0);</div><div class='add'>+	if (!ioaddr)</div><div class='add'>+		goto err_out_cleardev;</div><div class='add'>+</div><div class='ctx'> 	sis_priv = netdev_priv(net_dev);</div><div class='del'>-	net_dev-&gt;base_addr = ioaddr;</div><div class='del'>-	net_dev-&gt;irq = pci_dev-&gt;irq;</div><div class='add'>+	sis_priv-&gt;ioaddr = ioaddr;</div><div class='ctx'> 	sis_priv-&gt;pci_dev = pci_dev;</div><div class='ctx'> 	spin_lock_init(&amp;sis_priv-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -480,7 +491,7 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,</div><div class='ctx'> 	ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &amp;ring_dma);</div><div class='ctx'> 	if (!ring_space) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='del'>-		goto err_out_cleardev;</div><div class='add'>+		goto err_out_unmap;</div><div class='ctx'> 	}</div><div class='ctx'> 	sis_priv-&gt;tx_ring = ring_space;</div><div class='ctx'> 	sis_priv-&gt;tx_ring_dma = ring_dma;</div><div class='hunk'>@@ -534,7 +545,7 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,</div><div class='ctx'> </div><div class='ctx'> 	/* 630ET : set the mii access mode as software-mode */</div><div class='ctx'> 	if (sis_priv-&gt;chipset_rev == SIS630ET_900_REV)</div><div class='del'>-		outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);</div><div class='add'>+		sw32(cr, ACCESSMODE | sr32(cr));</div><div class='ctx'> </div><div class='ctx'> 	/* probe for mii transceiver */</div><div class='ctx'> 	if (sis900_mii_probe(net_dev) == 0) {</div><div class='hunk'>@@ -556,25 +567,27 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,</div><div class='ctx'> 		goto err_unmap_rx;</div><div class='ctx'> </div><div class='ctx'> 	/* print some information about our NIC */</div><div class='del'>-	printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %pM\n",</div><div class='del'>-	       net_dev-&gt;name, card_name, ioaddr, net_dev-&gt;irq,</div><div class='add'>+	printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n",</div><div class='add'>+	       net_dev-&gt;name, card_name, ioaddr, pci_dev-&gt;irq,</div><div class='ctx'> 	       net_dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='ctx'> 	/* Detect Wake on Lan support */</div><div class='del'>-	ret = (inl(net_dev-&gt;base_addr + CFGPMC) &amp; PMESP) &gt;&gt; 27;</div><div class='add'>+	ret = (sr32(CFGPMC) &amp; PMESP) &gt;&gt; 27;</div><div class='ctx'> 	if (netif_msg_probe(sis_priv) &amp;&amp; (ret &amp; PME_D3C) == 0)</div><div class='ctx'> 		printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>- err_unmap_rx:</div><div class='add'>+err_unmap_rx:</div><div class='ctx'> 	pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv-&gt;rx_ring,</div><div class='ctx'> 		sis_priv-&gt;rx_ring_dma);</div><div class='del'>- err_unmap_tx:</div><div class='add'>+err_unmap_tx:</div><div class='ctx'> 	pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv-&gt;tx_ring,</div><div class='ctx'> 		sis_priv-&gt;tx_ring_dma);</div><div class='del'>- err_out_cleardev:</div><div class='del'>- 	pci_set_drvdata(pci_dev, NULL);</div><div class='add'>+err_out_unmap:</div><div class='add'>+	pci_iounmap(pci_dev, ioaddr);</div><div class='add'>+err_out_cleardev:</div><div class='add'>+	pci_set_drvdata(pci_dev, NULL);</div><div class='ctx'> 	pci_release_regions(pci_dev);</div><div class='ctx'>  err_out:</div><div class='ctx'> 	free_netdev(net_dev);</div><div class='hunk'>@@ -798,7 +811,7 @@ static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *ph</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* Delay between EEPROM clock transitions. */</div><div class='del'>-#define eeprom_delay()  inl(ee_addr)</div><div class='add'>+#define eeprom_delay()	sr32(mear)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  *	read_eeprom - Read Serial EEPROM</div><div class='hunk'>@@ -809,41 +822,41 @@ static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *ph</div><div class='ctx'>  *	Note that location is in word (16 bits) unit</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static u16 __devinit read_eeprom(long ioaddr, int location)</div><div class='add'>+static u16 __devinit read_eeprom(void __iomem *ioaddr, int location)</div><div class='ctx'> {</div><div class='add'>+	u32 read_cmd = location | EEread;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u16 retval = 0;</div><div class='del'>-	long ee_addr = ioaddr + mear;</div><div class='del'>-	u32 read_cmd = location | EEread;</div><div class='ctx'> </div><div class='del'>-	outl(0, ee_addr);</div><div class='add'>+	sw32(mear, 0);</div><div class='ctx'> 	eeprom_delay();</div><div class='del'>-	outl(EECS, ee_addr);</div><div class='add'>+	sw32(mear, EECS);</div><div class='ctx'> 	eeprom_delay();</div><div class='ctx'> </div><div class='ctx'> 	/* Shift the read command (9) bits out. */</div><div class='ctx'> 	for (i = 8; i &gt;= 0; i--) {</div><div class='ctx'> 		u32 dataval = (read_cmd &amp; (1 &lt;&lt; i)) ? EEDI | EECS : EECS;</div><div class='del'>-		outl(dataval, ee_addr);</div><div class='add'>+</div><div class='add'>+		sw32(mear, dataval);</div><div class='ctx'> 		eeprom_delay();</div><div class='del'>-		outl(dataval | EECLK, ee_addr);</div><div class='add'>+		sw32(mear, dataval | EECLK);</div><div class='ctx'> 		eeprom_delay();</div><div class='ctx'> 	}</div><div class='del'>-	outl(EECS, ee_addr);</div><div class='add'>+	sw32(mear, EECS);</div><div class='ctx'> 	eeprom_delay();</div><div class='ctx'> </div><div class='ctx'> 	/* read the 16-bits data in */</div><div class='ctx'> 	for (i = 16; i &gt; 0; i--) {</div><div class='del'>-		outl(EECS, ee_addr);</div><div class='add'>+		sw32(mear, EECS);</div><div class='ctx'> 		eeprom_delay();</div><div class='del'>-		outl(EECS | EECLK, ee_addr);</div><div class='add'>+		sw32(mear, EECS | EECLK);</div><div class='ctx'> 		eeprom_delay();</div><div class='del'>-		retval = (retval &lt;&lt; 1) | ((inl(ee_addr) &amp; EEDO) ? 1 : 0);</div><div class='add'>+		retval = (retval &lt;&lt; 1) | ((sr32(mear) &amp; EEDO) ? 1 : 0);</div><div class='ctx'> 		eeprom_delay();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Terminate the EEPROM access. */</div><div class='del'>-	outl(0, ee_addr);</div><div class='add'>+	sw32(mear, 0);</div><div class='ctx'> 	eeprom_delay();</div><div class='ctx'> </div><div class='ctx'> 	return retval;</div><div class='hunk'>@@ -852,24 +865,27 @@ static u16 __devinit read_eeprom(long ioaddr, int location)</div><div class='ctx'> /* Read and write the MII management registers using software-generated</div><div class='ctx'>    serial MDIO protocol. Note that the command bits and data bits are</div><div class='ctx'>    send out separately */</div><div class='del'>-#define mdio_delay()    inl(mdio_addr)</div><div class='add'>+#define mdio_delay()	sr32(mear)</div><div class='ctx'> </div><div class='del'>-static void mdio_idle(long mdio_addr)</div><div class='add'>+static void mdio_idle(struct sis900_private *sp)</div><div class='ctx'> {</div><div class='del'>-	outl(MDIO | MDDIR, mdio_addr);</div><div class='add'>+	void __iomem *ioaddr = sp-&gt;ioaddr;</div><div class='add'>+</div><div class='add'>+	sw32(mear, MDIO | MDDIR);</div><div class='ctx'> 	mdio_delay();</div><div class='del'>-	outl(MDIO | MDDIR | MDC, mdio_addr);</div><div class='add'>+	sw32(mear, MDIO | MDDIR | MDC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Syncronize the MII management interface by shifting 32 one bits out. */</div><div class='del'>-static void mdio_reset(long mdio_addr)</div><div class='add'>+/* Synchronize the MII management interface by shifting 32 one bits out. */</div><div class='add'>+static void mdio_reset(struct sis900_private *sp)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = sp-&gt;ioaddr;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 31; i &gt;= 0; i--) {</div><div class='del'>-		outl(MDDIR | MDIO, mdio_addr);</div><div class='add'>+		sw32(mear, MDDIR | MDIO);</div><div class='ctx'> 		mdio_delay();</div><div class='del'>-		outl(MDDIR | MDIO | MDC, mdio_addr);</div><div class='add'>+		sw32(mear, MDDIR | MDIO | MDC);</div><div class='ctx'> 		mdio_delay();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -887,31 +903,33 @@ static void mdio_reset(long mdio_addr)</div><div class='ctx'> </div><div class='ctx'> static int mdio_read(struct net_device *net_dev, int phy_id, int location)</div><div class='ctx'> {</div><div class='del'>-	long mdio_addr = net_dev-&gt;base_addr + mear;</div><div class='ctx'> 	int mii_cmd = MIIread|(phy_id&lt;&lt;MIIpmdShift)|(location&lt;&lt;MIIregShift);</div><div class='add'>+	struct sis900_private *sp = netdev_priv(net_dev);</div><div class='add'>+	void __iomem *ioaddr = sp-&gt;ioaddr;</div><div class='ctx'> 	u16 retval = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	mdio_reset(mdio_addr);</div><div class='del'>-	mdio_idle(mdio_addr);</div><div class='add'>+	mdio_reset(sp);</div><div class='add'>+	mdio_idle(sp);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 15; i &gt;= 0; i--) {</div><div class='ctx'> 		int dataval = (mii_cmd &amp; (1 &lt;&lt; i)) ? MDDIR | MDIO : MDDIR;</div><div class='del'>-		outl(dataval, mdio_addr);</div><div class='add'>+</div><div class='add'>+		sw32(mear, dataval);</div><div class='ctx'> 		mdio_delay();</div><div class='del'>-		outl(dataval | MDC, mdio_addr);</div><div class='add'>+		sw32(mear, dataval | MDC);</div><div class='ctx'> 		mdio_delay();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Read the 16 data bits. */</div><div class='ctx'> 	for (i = 16; i &gt; 0; i--) {</div><div class='del'>-		outl(0, mdio_addr);</div><div class='add'>+		sw32(mear, 0);</div><div class='ctx'> 		mdio_delay();</div><div class='del'>-		retval = (retval &lt;&lt; 1) | ((inl(mdio_addr) &amp; MDIO) ? 1 : 0);</div><div class='del'>-		outl(MDC, mdio_addr);</div><div class='add'>+		retval = (retval &lt;&lt; 1) | ((sr32(mear) &amp; MDIO) ? 1 : 0);</div><div class='add'>+		sw32(mear, MDC);</div><div class='ctx'> 		mdio_delay();</div><div class='ctx'> 	}</div><div class='del'>-	outl(0x00, mdio_addr);</div><div class='add'>+	sw32(mear, 0x00);</div><div class='ctx'> </div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='hunk'>@@ -931,19 +949,21 @@ static int mdio_read(struct net_device *net_dev, int phy_id, int location)</div><div class='ctx'> static void mdio_write(struct net_device *net_dev, int phy_id, int location,</div><div class='ctx'> 			int value)</div><div class='ctx'> {</div><div class='del'>-	long mdio_addr = net_dev-&gt;base_addr + mear;</div><div class='ctx'> 	int mii_cmd = MIIwrite|(phy_id&lt;&lt;MIIpmdShift)|(location&lt;&lt;MIIregShift);</div><div class='add'>+	struct sis900_private *sp = netdev_priv(net_dev);</div><div class='add'>+	void __iomem *ioaddr = sp-&gt;ioaddr;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	mdio_reset(mdio_addr);</div><div class='del'>-	mdio_idle(mdio_addr);</div><div class='add'>+	mdio_reset(sp);</div><div class='add'>+	mdio_idle(sp);</div><div class='ctx'> </div><div class='ctx'> 	/* Shift the command bits out. */</div><div class='ctx'> 	for (i = 15; i &gt;= 0; i--) {</div><div class='ctx'> 		int dataval = (mii_cmd &amp; (1 &lt;&lt; i)) ? MDDIR | MDIO : MDDIR;</div><div class='del'>-		outb(dataval, mdio_addr);</div><div class='add'>+</div><div class='add'>+		sw8(mear, dataval);</div><div class='ctx'> 		mdio_delay();</div><div class='del'>-		outb(dataval | MDC, mdio_addr);</div><div class='add'>+		sw8(mear, dataval | MDC);</div><div class='ctx'> 		mdio_delay();</div><div class='ctx'> 	}</div><div class='ctx'> 	mdio_delay();</div><div class='hunk'>@@ -951,21 +971,22 @@ static void mdio_write(struct net_device *net_dev, int phy_id, int location,</div><div class='ctx'> 	/* Shift the value bits out. */</div><div class='ctx'> 	for (i = 15; i &gt;= 0; i--) {</div><div class='ctx'> 		int dataval = (value &amp; (1 &lt;&lt; i)) ? MDDIR | MDIO : MDDIR;</div><div class='del'>-		outl(dataval, mdio_addr);</div><div class='add'>+</div><div class='add'>+		sw32(mear, dataval);</div><div class='ctx'> 		mdio_delay();</div><div class='del'>-		outl(dataval | MDC, mdio_addr);</div><div class='add'>+		sw32(mear, dataval | MDC);</div><div class='ctx'> 		mdio_delay();</div><div class='ctx'> 	}</div><div class='ctx'> 	mdio_delay();</div><div class='ctx'> </div><div class='ctx'> 	/* Clear out extra bits. */</div><div class='ctx'> 	for (i = 2; i &gt; 0; i--) {</div><div class='del'>-		outb(0, mdio_addr);</div><div class='add'>+		sw8(mear, 0);</div><div class='ctx'> 		mdio_delay();</div><div class='del'>-		outb(MDC, mdio_addr);</div><div class='add'>+		sw8(mear, MDC);</div><div class='ctx'> 		mdio_delay();</div><div class='ctx'> 	}</div><div class='del'>-	outl(0x00, mdio_addr);</div><div class='add'>+	sw32(mear, 0x00);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1000,9 +1021,12 @@ static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)</div><div class='ctx'> */</div><div class='ctx'> static void sis900_poll(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='del'>-	sis900_interrupt(dev-&gt;irq, dev);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	struct sis900_private *sp = netdev_priv(dev);</div><div class='add'>+	const int irq = sp-&gt;pci_dev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	disable_irq(irq);</div><div class='add'>+	sis900_interrupt(irq, dev);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1018,7 +1042,7 @@ static int</div><div class='ctx'> sis900_open(struct net_device *net_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Soft reset the chip. */</div><div class='hunk'>@@ -1027,8 +1051,8 @@ sis900_open(struct net_device *net_dev)</div><div class='ctx'> 	/* Equalizer workaround Rule */</div><div class='ctx'> 	sis630_set_eq(net_dev, sis_priv-&gt;chipset_rev);</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(net_dev-&gt;irq, sis900_interrupt, IRQF_SHARED,</div><div class='del'>-						net_dev-&gt;name, net_dev);</div><div class='add'>+	ret = request_irq(sis_priv-&gt;pci_dev-&gt;irq, sis900_interrupt, IRQF_SHARED,</div><div class='add'>+			  net_dev-&gt;name, net_dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1042,12 +1066,12 @@ sis900_open(struct net_device *net_dev)</div><div class='ctx'> 	netif_start_queue(net_dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Workaround for EDB */</div><div class='del'>-	sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);</div><div class='add'>+	sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable all known interrupts by setting the interrupt mask. */</div><div class='del'>-	outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);</div><div class='del'>-	outl(RxENA | inl(ioaddr + cr), ioaddr + cr);</div><div class='del'>-	outl(IE, ioaddr + ier);</div><div class='add'>+	sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);</div><div class='add'>+	sw32(cr, RxENA | sr32(cr));</div><div class='add'>+	sw32(ier, IE);</div><div class='ctx'> </div><div class='ctx'> 	sis900_check_mode(net_dev, sis_priv-&gt;mii);</div><div class='ctx'> </div><div class='hunk'>@@ -1074,31 +1098,30 @@ static void</div><div class='ctx'> sis900_init_rxfilter (struct net_device * net_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	u32 rfcrSave;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	rfcrSave = inl(rfcr + ioaddr);</div><div class='add'>+	rfcrSave = sr32(rfcr);</div><div class='ctx'> </div><div class='ctx'> 	/* disable packet filtering before setting filter */</div><div class='del'>-	outl(rfcrSave &amp; ~RFEN, rfcr + ioaddr);</div><div class='add'>+	sw32(rfcr, rfcrSave &amp; ~RFEN);</div><div class='ctx'> </div><div class='ctx'> 	/* load MAC addr to filter data register */</div><div class='ctx'> 	for (i = 0 ; i &lt; 3 ; i++) {</div><div class='del'>-		u32 w;</div><div class='add'>+		u32 w = (u32) *((u16 *)(net_dev-&gt;dev_addr)+i);</div><div class='ctx'> </div><div class='del'>-		w = (u32) *((u16 *)(net_dev-&gt;dev_addr)+i);</div><div class='del'>-		outl((i &lt;&lt; RFADDR_shift), ioaddr + rfcr);</div><div class='del'>-		outl(w, ioaddr + rfdr);</div><div class='add'>+		sw32(rfcr, i &lt;&lt; RFADDR_shift);</div><div class='add'>+		sw32(rfdr, w);</div><div class='ctx'> </div><div class='ctx'> 		if (netif_msg_hw(sis_priv)) {</div><div class='ctx'> 			printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",</div><div class='del'>-			       net_dev-&gt;name, i, inl(ioaddr + rfdr));</div><div class='add'>+			       net_dev-&gt;name, i, sr32(rfdr));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* enable packet filtering */</div><div class='del'>-	outl(rfcrSave | RFEN, rfcr + ioaddr);</div><div class='add'>+	sw32(rfcr, rfcrSave | RFEN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1112,7 +1135,7 @@ static void</div><div class='ctx'> sis900_init_tx_ring(struct net_device *net_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	sis_priv-&gt;tx_full = 0;</div><div class='hunk'>@@ -1128,10 +1151,10 @@ sis900_init_tx_ring(struct net_device *net_dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* load Transmit Descriptor Register */</div><div class='del'>-	outl(sis_priv-&gt;tx_ring_dma, ioaddr + txdp);</div><div class='add'>+	sw32(txdp, sis_priv-&gt;tx_ring_dma);</div><div class='ctx'> 	if (netif_msg_hw(sis_priv))</div><div class='ctx'> 		printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",</div><div class='del'>-		       net_dev-&gt;name, inl(ioaddr + txdp));</div><div class='add'>+		       net_dev-&gt;name, sr32(txdp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1146,7 +1169,7 @@ static void</div><div class='ctx'> sis900_init_rx_ring(struct net_device *net_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	sis_priv-&gt;cur_rx = 0;</div><div class='hunk'>@@ -1181,10 +1204,10 @@ sis900_init_rx_ring(struct net_device *net_dev)</div><div class='ctx'> 	sis_priv-&gt;dirty_rx = (unsigned int) (i - NUM_RX_DESC);</div><div class='ctx'> </div><div class='ctx'> 	/* load Receive Descriptor Register */</div><div class='del'>-	outl(sis_priv-&gt;rx_ring_dma, ioaddr + rxdp);</div><div class='add'>+	sw32(rxdp, sis_priv-&gt;rx_ring_dma);</div><div class='ctx'> 	if (netif_msg_hw(sis_priv))</div><div class='ctx'> 		printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",</div><div class='del'>-		       net_dev-&gt;name, inl(ioaddr + rxdp));</div><div class='add'>+		       net_dev-&gt;name, sr32(rxdp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1298,7 +1321,7 @@ static void sis900_timer(unsigned long data)</div><div class='ctx'> </div><div class='ctx'> 		sis900_read_mode(net_dev, &amp;speed, &amp;duplex);</div><div class='ctx'> 		if (duplex){</div><div class='del'>-			sis900_set_mode(net_dev-&gt;base_addr, speed, duplex);</div><div class='add'>+			sis900_set_mode(sis_priv, speed, duplex);</div><div class='ctx'> 			sis630_set_eq(net_dev, sis_priv-&gt;chipset_rev);</div><div class='ctx'> 			netif_start_queue(net_dev);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1359,25 +1382,25 @@ static void sis900_timer(unsigned long data)</div><div class='ctx'> static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)</div><div class='ctx'> {</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	int speed, duplex;</div><div class='ctx'> </div><div class='ctx'> 	if (mii_phy-&gt;phy_types == LAN) {</div><div class='del'>-		outl(~EXD &amp; inl(ioaddr + cfg), ioaddr + cfg);</div><div class='add'>+		sw32(cfg, ~EXD &amp; sr32(cfg));</div><div class='ctx'> 		sis900_set_capability(net_dev , mii_phy);</div><div class='ctx'> 		sis900_auto_negotiate(net_dev, sis_priv-&gt;cur_phy);</div><div class='ctx'> 	} else {</div><div class='del'>-		outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);</div><div class='add'>+		sw32(cfg, EXD | sr32(cfg));</div><div class='ctx'> 		speed = HW_SPEED_HOME;</div><div class='ctx'> 		duplex = FDX_CAPABLE_HALF_SELECTED;</div><div class='del'>-		sis900_set_mode(ioaddr, speed, duplex);</div><div class='add'>+		sis900_set_mode(sis_priv, speed, duplex);</div><div class='ctx'> 		sis_priv-&gt;autong_complete = 1;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  *	sis900_set_mode - Set the media mode of mac register.</div><div class='del'>- *	@ioaddr: the address of the device</div><div class='add'>+ *	@sp:     the device private data</div><div class='ctx'>  *	@speed : the transmit speed to be determined</div><div class='ctx'>  *	@duplex: the duplex mode to be determined</div><div class='ctx'>  *</div><div class='hunk'>@@ -1388,11 +1411,12 @@ static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_ph</div><div class='ctx'>  *	double words.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void sis900_set_mode (long ioaddr, int speed, int duplex)</div><div class='add'>+static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = sp-&gt;ioaddr;</div><div class='ctx'> 	u32 tx_flags = 0, rx_flags = 0;</div><div class='ctx'> </div><div class='del'>-	if (inl(ioaddr + cfg) &amp; EDB_MASTER_EN) {</div><div class='add'>+	if (sr32( cfg) &amp; EDB_MASTER_EN) {</div><div class='ctx'> 		tx_flags = TxATP | (DMA_BURST_64 &lt;&lt; TxMXDMA_shift) |</div><div class='ctx'> 					(TX_FILL_THRESH &lt;&lt; TxFILLT_shift);</div><div class='ctx'> 		rx_flags = DMA_BURST_64 &lt;&lt; RxMXDMA_shift;</div><div class='hunk'>@@ -1420,8 +1444,8 @@ static void sis900_set_mode (long ioaddr, int speed, int duplex)</div><div class='ctx'> 	rx_flags |= RxAJAB;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	outl (tx_flags, ioaddr + txcfg);</div><div class='del'>-	outl (rx_flags, ioaddr + rxcfg);</div><div class='add'>+	sw32(txcfg, tx_flags);</div><div class='add'>+	sw32(rxcfg, rx_flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1528,16 +1552,17 @@ static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex</div><div class='ctx'> static void sis900_tx_timeout(struct net_device *net_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if(netif_msg_tx_err(sis_priv))</div><div class='add'>+	if (netif_msg_tx_err(sis_priv)) {</div><div class='ctx'> 		printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n",</div><div class='del'>-	       		net_dev-&gt;name, inl(ioaddr + cr), inl(ioaddr + isr));</div><div class='add'>+			net_dev-&gt;name, sr32(cr), sr32(isr));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Disable interrupts by clearing the interrupt mask. */</div><div class='del'>-	outl(0x0000, ioaddr + imr);</div><div class='add'>+	sw32(imr, 0x0000);</div><div class='ctx'> </div><div class='ctx'> 	/* use spinlock to prevent interrupt handler accessing buffer ring */</div><div class='ctx'> 	spin_lock_irqsave(&amp;sis_priv-&gt;lock, flags);</div><div class='hunk'>@@ -1566,10 +1591,10 @@ static void sis900_tx_timeout(struct net_device *net_dev)</div><div class='ctx'> 	net_dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='ctx'> </div><div class='ctx'> 	/* load Transmit Descriptor Register */</div><div class='del'>-	outl(sis_priv-&gt;tx_ring_dma, ioaddr + txdp);</div><div class='add'>+	sw32(txdp, sis_priv-&gt;tx_ring_dma);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable all known interrupts by setting the interrupt mask. */</div><div class='del'>-	outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);</div><div class='add'>+	sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1586,7 +1611,7 @@ static netdev_tx_t</div><div class='ctx'> sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	unsigned int  entry;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	unsigned int  index_cur_tx, index_dirty_tx;</div><div class='hunk'>@@ -1608,7 +1633,7 @@ sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)</div><div class='ctx'> 	sis_priv-&gt;tx_ring[entry].bufptr = pci_map_single(sis_priv-&gt;pci_dev,</div><div class='ctx'> 		skb-&gt;data, skb-&gt;len, PCI_DMA_TODEVICE);</div><div class='ctx'> 	sis_priv-&gt;tx_ring[entry].cmdsts = (OWN | skb-&gt;len);</div><div class='del'>-	outl(TxENA | inl(ioaddr + cr), ioaddr + cr);</div><div class='add'>+	sw32(cr, TxENA | sr32(cr));</div><div class='ctx'> </div><div class='ctx'> 	sis_priv-&gt;cur_tx ++;</div><div class='ctx'> 	index_cur_tx = sis_priv-&gt;cur_tx;</div><div class='hunk'>@@ -1654,14 +1679,14 @@ static irqreturn_t sis900_interrupt(int irq, void *dev_instance)</div><div class='ctx'> 	struct net_device *net_dev = dev_instance;</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='ctx'> 	int boguscnt = max_interrupt_work;</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	u32 status;</div><div class='ctx'> 	unsigned int handled = 0;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock (&amp;sis_priv-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		status = inl(ioaddr + isr);</div><div class='add'>+		status = sr32(isr);</div><div class='ctx'> </div><div class='ctx'> 		if ((status &amp; (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)</div><div class='ctx'> 			/* nothing intresting happened */</div><div class='hunk'>@@ -1696,7 +1721,7 @@ static irqreturn_t sis900_interrupt(int irq, void *dev_instance)</div><div class='ctx'> 	if(netif_msg_intr(sis_priv))</div><div class='ctx'> 		printk(KERN_DEBUG "%s: exiting interrupt, "</div><div class='ctx'> 		       "interrupt status = 0x%#8.8x.\n",</div><div class='del'>-		       net_dev-&gt;name, inl(ioaddr + isr));</div><div class='add'>+		       net_dev-&gt;name, sr32(isr));</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock (&amp;sis_priv-&gt;lock);</div><div class='ctx'> 	return IRQ_RETVAL(handled);</div><div class='hunk'>@@ -1715,7 +1740,7 @@ static irqreturn_t sis900_interrupt(int irq, void *dev_instance)</div><div class='ctx'> static int sis900_rx(struct net_device *net_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	unsigned int entry = sis_priv-&gt;cur_rx % NUM_RX_DESC;</div><div class='ctx'> 	u32 rx_status = sis_priv-&gt;rx_ring[entry].cmdsts;</div><div class='ctx'> 	int rx_work_limit;</div><div class='hunk'>@@ -1847,7 +1872,7 @@ refill_rx_ring:</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* re-enable the potentially idle receive state matchine */</div><div class='del'>-	outl(RxENA | inl(ioaddr + cr), ioaddr + cr );</div><div class='add'>+	sw32(cr , RxENA | sr32(cr));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1932,31 +1957,31 @@ static void sis900_finish_xmit (struct net_device *net_dev)</div><div class='ctx'> </div><div class='ctx'> static int sis900_close(struct net_device *net_dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='add'>+	struct pci_dev *pdev = sis_priv-&gt;pci_dev;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(net_dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable interrupts by clearing the interrupt mask. */</div><div class='del'>-	outl(0x0000, ioaddr + imr);</div><div class='del'>-	outl(0x0000, ioaddr + ier);</div><div class='add'>+	sw32(imr, 0x0000);</div><div class='add'>+	sw32(ier, 0x0000);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the chip's Tx and Rx Status Machine */</div><div class='del'>-	outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);</div><div class='add'>+	sw32(cr, RxDIS | TxDIS | sr32(cr));</div><div class='ctx'> </div><div class='ctx'> 	del_timer(&amp;sis_priv-&gt;timer);</div><div class='ctx'> </div><div class='del'>-	free_irq(net_dev-&gt;irq, net_dev);</div><div class='add'>+	free_irq(pdev-&gt;irq, net_dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Free Tx and RX skbuff */</div><div class='ctx'> 	for (i = 0; i &lt; NUM_RX_DESC; i++) {</div><div class='ctx'> 		skb = sis_priv-&gt;rx_skbuff[i];</div><div class='ctx'> 		if (skb) {</div><div class='del'>-			pci_unmap_single(sis_priv-&gt;pci_dev,</div><div class='del'>-				sis_priv-&gt;rx_ring[i].bufptr,</div><div class='del'>-				RX_BUF_SIZE, PCI_DMA_FROMDEVICE);</div><div class='add'>+			pci_unmap_single(pdev, sis_priv-&gt;rx_ring[i].bufptr,</div><div class='add'>+					 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);</div><div class='ctx'> 			dev_kfree_skb(skb);</div><div class='ctx'> 			sis_priv-&gt;rx_skbuff[i] = NULL;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1964,9 +1989,8 @@ static int sis900_close(struct net_device *net_dev)</div><div class='ctx'> 	for (i = 0; i &lt; NUM_TX_DESC; i++) {</div><div class='ctx'> 		skb = sis_priv-&gt;tx_skbuff[i];</div><div class='ctx'> 		if (skb) {</div><div class='del'>-			pci_unmap_single(sis_priv-&gt;pci_dev,</div><div class='del'>-				sis_priv-&gt;tx_ring[i].bufptr, skb-&gt;len,</div><div class='del'>-				PCI_DMA_TODEVICE);</div><div class='add'>+			pci_unmap_single(pdev, sis_priv-&gt;tx_ring[i].bufptr,</div><div class='add'>+					 skb-&gt;len, PCI_DMA_TODEVICE);</div><div class='ctx'> 			dev_kfree_skb(skb);</div><div class='ctx'> 			sis_priv-&gt;tx_skbuff[i] = NULL;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2055,14 +2079,14 @@ static int sis900_nway_reset(struct net_device *net_dev)</div><div class='ctx'> static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='del'>-	long pmctrl_addr = net_dev-&gt;base_addr + pmctrl;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	u32 cfgpmcsr = 0, pmctrl_bits = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (wol-&gt;wolopts == 0) {</div><div class='ctx'> 		pci_read_config_dword(sis_priv-&gt;pci_dev, CFGPMCSR, &amp;cfgpmcsr);</div><div class='ctx'> 		cfgpmcsr &amp;= ~PME_EN;</div><div class='ctx'> 		pci_write_config_dword(sis_priv-&gt;pci_dev, CFGPMCSR, cfgpmcsr);</div><div class='del'>-		outl(pmctrl_bits, pmctrl_addr);</div><div class='add'>+		sw32(pmctrl, pmctrl_bits);</div><div class='ctx'> 		if (netif_msg_wol(sis_priv))</div><div class='ctx'> 			printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev-&gt;name);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2077,7 +2101,7 @@ static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wo</div><div class='ctx'> 	if (wol-&gt;wolopts &amp; WAKE_PHY)</div><div class='ctx'> 		pmctrl_bits |= LINKON;</div><div class='ctx'> </div><div class='del'>-	outl(pmctrl_bits, pmctrl_addr);</div><div class='add'>+	sw32(pmctrl, pmctrl_bits);</div><div class='ctx'> </div><div class='ctx'> 	pci_read_config_dword(sis_priv-&gt;pci_dev, CFGPMCSR, &amp;cfgpmcsr);</div><div class='ctx'> 	cfgpmcsr |= PME_EN;</div><div class='hunk'>@@ -2090,10 +2114,11 @@ static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wo</div><div class='ctx'> </div><div class='ctx'> static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='del'>-	long pmctrl_addr = net_dev-&gt;base_addr + pmctrl;</div><div class='add'>+	struct sis900_private *sp = netdev_priv(net_dev);</div><div class='add'>+	void __iomem *ioaddr = sp-&gt;ioaddr;</div><div class='ctx'> 	u32 pmctrl_bits;</div><div class='ctx'> </div><div class='del'>-	pmctrl_bits = inl(pmctrl_addr);</div><div class='add'>+	pmctrl_bits = sr32(pmctrl);</div><div class='ctx'> 	if (pmctrl_bits &amp; MAGICPKT)</div><div class='ctx'> 		wol-&gt;wolopts |= WAKE_MAGIC;</div><div class='ctx'> 	if (pmctrl_bits &amp; LINKON)</div><div class='hunk'>@@ -2279,8 +2304,8 @@ static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)</div><div class='ctx'> </div><div class='ctx'> static void set_rx_mode(struct net_device *net_dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	u16 mc_filter[16] = {0};	/* 256/128 bits multicast hash table */</div><div class='ctx'> 	int i, table_entries;</div><div class='ctx'> 	u32 rx_mode;</div><div class='hunk'>@@ -2322,24 +2347,24 @@ static void set_rx_mode(struct net_device *net_dev)</div><div class='ctx'> 	/* update Multicast Hash Table in Receive Filter */</div><div class='ctx'> 	for (i = 0; i &lt; table_entries; i++) {</div><div class='ctx'>                 /* why plus 0x04 ??, That makes the correct value for hash table. */</div><div class='del'>-		outl((u32)(0x00000004+i) &lt;&lt; RFADDR_shift, ioaddr + rfcr);</div><div class='del'>-		outl(mc_filter[i], ioaddr + rfdr);</div><div class='add'>+		sw32(rfcr, (u32)(0x00000004 + i) &lt;&lt; RFADDR_shift);</div><div class='add'>+		sw32(rfdr, mc_filter[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	outl(RFEN | rx_mode, ioaddr + rfcr);</div><div class='add'>+	sw32(rfcr, RFEN | rx_mode);</div><div class='ctx'> </div><div class='ctx'> 	/* sis900 is capable of looping back packets at MAC level for</div><div class='ctx'> 	 * debugging purpose */</div><div class='ctx'> 	if (net_dev-&gt;flags &amp; IFF_LOOPBACK) {</div><div class='ctx'> 		u32 cr_saved;</div><div class='ctx'> 		/* We must disable Tx/Rx before setting loopback mode */</div><div class='del'>-		cr_saved = inl(ioaddr + cr);</div><div class='del'>-		outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);</div><div class='add'>+		cr_saved = sr32(cr);</div><div class='add'>+		sw32(cr, cr_saved | TxDIS | RxDIS);</div><div class='ctx'> 		/* enable loopback */</div><div class='del'>-		outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);</div><div class='del'>-		outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);</div><div class='add'>+		sw32(txcfg, sr32(txcfg) | TxMLB);</div><div class='add'>+		sw32(rxcfg, sr32(rxcfg) | RxATX);</div><div class='ctx'> 		/* restore cr */</div><div class='del'>-		outl(cr_saved, ioaddr + cr);</div><div class='add'>+		sw32(cr, cr_saved);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2355,26 +2380,25 @@ static void set_rx_mode(struct net_device *net_dev)</div><div class='ctx'> static void sis900_reset(struct net_device *net_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='del'>-	int i = 0;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> 	u32 status = TxRCMP | RxRCMP;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	outl(0, ioaddr + ier);</div><div class='del'>-	outl(0, ioaddr + imr);</div><div class='del'>-	outl(0, ioaddr + rfcr);</div><div class='add'>+	sw32(ier, 0);</div><div class='add'>+	sw32(imr, 0);</div><div class='add'>+	sw32(rfcr, 0);</div><div class='ctx'> </div><div class='del'>-	outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);</div><div class='add'>+	sw32(cr, RxRESET | TxRESET | RESET | sr32(cr));</div><div class='ctx'> </div><div class='ctx'> 	/* Check that the chip has finished the reset. */</div><div class='del'>-	while (status &amp;&amp; (i++ &lt; 1000)) {</div><div class='del'>-		status ^= (inl(isr + ioaddr) &amp; status);</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; status &amp;&amp; (i &lt; 1000); i++)</div><div class='add'>+		status ^= sr32(isr) &amp; status;</div><div class='ctx'> </div><div class='del'>-	if( (sis_priv-&gt;chipset_rev &gt;= SIS635A_900_REV) ||</div><div class='del'>-			(sis_priv-&gt;chipset_rev == SIS900B_900_REV) )</div><div class='del'>-		outl(PESEL | RND_CNT, ioaddr + cfg);</div><div class='add'>+	if (sis_priv-&gt;chipset_rev &gt;= SIS635A_900_REV ||</div><div class='add'>+	    sis_priv-&gt;chipset_rev == SIS900B_900_REV)</div><div class='add'>+		sw32(cfg, PESEL | RND_CNT);</div><div class='ctx'> 	else</div><div class='del'>-		outl(PESEL, ioaddr + cfg);</div><div class='add'>+		sw32(cfg, PESEL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2388,10 +2412,12 @@ static void __devexit sis900_remove(struct pci_dev *pci_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *net_dev = pci_get_drvdata(pci_dev);</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='del'>-	struct mii_phy *phy = NULL;</div><div class='add'>+</div><div class='add'>+	unregister_netdev(net_dev);</div><div class='ctx'> </div><div class='ctx'> 	while (sis_priv-&gt;first_mii) {</div><div class='del'>-		phy = sis_priv-&gt;first_mii;</div><div class='add'>+		struct mii_phy *phy = sis_priv-&gt;first_mii;</div><div class='add'>+</div><div class='ctx'> 		sis_priv-&gt;first_mii = phy-&gt;next;</div><div class='ctx'> 		kfree(phy);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2400,7 +2426,7 @@ static void __devexit sis900_remove(struct pci_dev *pci_dev)</div><div class='ctx'> 		sis_priv-&gt;rx_ring_dma);</div><div class='ctx'> 	pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv-&gt;tx_ring,</div><div class='ctx'> 		sis_priv-&gt;tx_ring_dma);</div><div class='del'>-	unregister_netdev(net_dev);</div><div class='add'>+	pci_iounmap(pci_dev, sis_priv-&gt;ioaddr);</div><div class='ctx'> 	free_netdev(net_dev);</div><div class='ctx'> 	pci_release_regions(pci_dev);</div><div class='ctx'> 	pci_set_drvdata(pci_dev, NULL);</div><div class='hunk'>@@ -2411,7 +2437,8 @@ static void __devexit sis900_remove(struct pci_dev *pci_dev)</div><div class='ctx'> static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *net_dev = pci_get_drvdata(pci_dev);</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='add'>+	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	if(!netif_running(net_dev))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2420,7 +2447,7 @@ static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)</div><div class='ctx'> 	netif_device_detach(net_dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the chip's Tx and Rx Status Machine */</div><div class='del'>-	outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);</div><div class='add'>+	sw32(cr, RxDIS | TxDIS | sr32(cr));</div><div class='ctx'> </div><div class='ctx'> 	pci_set_power_state(pci_dev, PCI_D3hot);</div><div class='ctx'> 	pci_save_state(pci_dev);</div><div class='hunk'>@@ -2432,7 +2459,7 @@ static int sis900_resume(struct pci_dev *pci_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *net_dev = pci_get_drvdata(pci_dev);</div><div class='ctx'> 	struct sis900_private *sis_priv = netdev_priv(net_dev);</div><div class='del'>-	long ioaddr = net_dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = sis_priv-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	if(!netif_running(net_dev))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2453,9 +2480,9 @@ static int sis900_resume(struct pci_dev *pci_dev)</div><div class='ctx'> 	sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable all known interrupts by setting the interrupt mask. */</div><div class='del'>-	outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);</div><div class='del'>-	outl(RxENA | inl(ioaddr + cr), ioaddr + cr);</div><div class='del'>-	outl(IE, ioaddr + ier);</div><div class='add'>+	sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);</div><div class='add'>+	sw32(cr, RxENA | sr32(cr));</div><div class='add'>+	sw32(ier, IE);</div><div class='ctx'> </div><div class='ctx'> 	sis900_check_mode(net_dev, sis_priv-&gt;mii);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/smsc/epic100.c b/drivers/net/ethernet/smsc/epic100.c<br/>index 2a662e6112e9..d01e59c348ad 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/smsc/epic100.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/smsc/epic100.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/smsc/epic100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/smsc/epic100.c</a></div><div class='hunk'>@@ -146,6 +146,12 @@ enum chip_capability_flags { MII_PWRDWN=1, TYPE2_INTR=2, NO_MII=4 };</div><div class='ctx'> #define EPIC_TOTAL_SIZE 0x100</div><div class='ctx'> #define USE_IO_OPS 1</div><div class='ctx'> </div><div class='add'>+#ifdef USE_IO_OPS</div><div class='add'>+#define EPIC_BAR	0</div><div class='add'>+#else</div><div class='add'>+#define EPIC_BAR	1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> typedef enum {</div><div class='ctx'> 	SMSC_83C170_0,</div><div class='ctx'> 	SMSC_83C170,</div><div class='hunk'>@@ -176,21 +182,11 @@ static DEFINE_PCI_DEVICE_TABLE(epic_pci_tbl) = {</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE (pci, epic_pci_tbl);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-#ifndef USE_IO_OPS</div><div class='del'>-#undef inb</div><div class='del'>-#undef inw</div><div class='del'>-#undef inl</div><div class='del'>-#undef outb</div><div class='del'>-#undef outw</div><div class='del'>-#undef outl</div><div class='del'>-#define inb readb</div><div class='del'>-#define inw readw</div><div class='del'>-#define inl readl</div><div class='del'>-#define outb writeb</div><div class='del'>-#define outw writew</div><div class='del'>-#define outl writel</div><div class='del'>-#endif</div><div class='add'>+#define ew16(reg, val)	iowrite16(val, ioaddr + (reg))</div><div class='add'>+#define ew32(reg, val)	iowrite32(val, ioaddr + (reg))</div><div class='add'>+#define er8(reg)	ioread8(ioaddr + (reg))</div><div class='add'>+#define er16(reg)	ioread16(ioaddr + (reg))</div><div class='add'>+#define er32(reg)	ioread32(ioaddr + (reg))</div><div class='ctx'> </div><div class='ctx'> /* Offsets to registers, using the (ugh) SMC names. */</div><div class='ctx'> enum epic_registers {</div><div class='hunk'>@@ -275,6 +271,7 @@ struct epic_private {</div><div class='ctx'> 	u32 irq_mask;</div><div class='ctx'> 	unsigned int rx_buf_sz;				/* Based on MTU+slack. */</div><div class='ctx'> </div><div class='add'>+	void __iomem *ioaddr;</div><div class='ctx'> 	struct pci_dev *pci_dev;			/* PCI bus location. */</div><div class='ctx'> 	int chip_id, chip_flags;</div><div class='ctx'> </div><div class='hunk'>@@ -290,7 +287,7 @@ struct epic_private {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int epic_open(struct net_device *dev);</div><div class='del'>-static int read_eeprom(long ioaddr, int location);</div><div class='add'>+static int read_eeprom(struct epic_private *, int);</div><div class='ctx'> static int mdio_read(struct net_device *dev, int phy_id, int location);</div><div class='ctx'> static void mdio_write(struct net_device *dev, int phy_id, int loc, int val);</div><div class='ctx'> static void epic_restart(struct net_device *dev);</div><div class='hunk'>@@ -321,11 +318,11 @@ static const struct net_device_ops epic_netdev_ops = {</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __devinit epic_init_one (struct pci_dev *pdev,</div><div class='del'>-				    const struct pci_device_id *ent)</div><div class='add'>+static int __devinit epic_init_one(struct pci_dev *pdev,</div><div class='add'>+				   const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='ctx'> 	static int card_idx = -1;</div><div class='del'>-	long ioaddr;</div><div class='add'>+	void __iomem *ioaddr;</div><div class='ctx'> 	int chip_idx = (int) ent-&gt;driver_data;</div><div class='ctx'> 	int irq;</div><div class='ctx'> 	struct net_device *dev;</div><div class='hunk'>@@ -368,19 +365,15 @@ static int __devinit epic_init_one (struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-#ifdef USE_IO_OPS</div><div class='del'>-	ioaddr = pci_resource_start (pdev, 0);</div><div class='del'>-#else</div><div class='del'>-	ioaddr = pci_resource_start (pdev, 1);</div><div class='del'>-	ioaddr = (long) pci_ioremap_bar(pdev, 1);</div><div class='add'>+	ioaddr = pci_iomap(pdev, EPIC_BAR, 0);</div><div class='ctx'> 	if (!ioaddr) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "ioremap failed\n");</div><div class='ctx'> 		goto err_out_free_netdev;</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata(pdev, dev);</div><div class='ctx'> 	ep = netdev_priv(dev);</div><div class='add'>+	ep-&gt;ioaddr = ioaddr;</div><div class='ctx'> 	ep-&gt;mii.dev = dev;</div><div class='ctx'> 	ep-&gt;mii.mdio_read = mdio_read;</div><div class='ctx'> 	ep-&gt;mii.mdio_write = mdio_write;</div><div class='hunk'>@@ -409,34 +402,31 @@ static int __devinit epic_init_one (struct pci_dev *pdev,</div><div class='ctx'> 			duplex = full_duplex[card_idx];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = ioaddr;</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-</div><div class='ctx'> 	spin_lock_init(&amp;ep-&gt;lock);</div><div class='ctx'> 	spin_lock_init(&amp;ep-&gt;napi_lock);</div><div class='ctx'> 	ep-&gt;reschedule_in_poll = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Bring the chip out of low-power mode. */</div><div class='del'>-	outl(0x4200, ioaddr + GENCTL);</div><div class='add'>+	ew32(GENCTL, 0x4200);</div><div class='ctx'> 	/* Magic?!  If we don't set this bit the MII interface won't work. */</div><div class='ctx'> 	/* This magic is documented in SMSC app note 7.15 */</div><div class='ctx'> 	for (i = 16; i &gt; 0; i--)</div><div class='del'>-		outl(0x0008, ioaddr + TEST1);</div><div class='add'>+		ew32(TEST1, 0x0008);</div><div class='ctx'> </div><div class='ctx'> 	/* Turn on the MII transceiver. */</div><div class='del'>-	outl(0x12, ioaddr + MIICfg);</div><div class='add'>+	ew32(MIICfg, 0x12);</div><div class='ctx'> 	if (chip_idx == 1)</div><div class='del'>-		outl((inl(ioaddr + NVCTL) &amp; ~0x003C) | 0x4800, ioaddr + NVCTL);</div><div class='del'>-	outl(0x0200, ioaddr + GENCTL);</div><div class='add'>+		ew32(NVCTL, (er32(NVCTL) &amp; ~0x003c) | 0x4800);</div><div class='add'>+	ew32(GENCTL, 0x0200);</div><div class='ctx'> </div><div class='ctx'> 	/* Note: the '175 does not have a serial EEPROM. */</div><div class='ctx'> 	for (i = 0; i &lt; 3; i++)</div><div class='del'>-		((__le16 *)dev-&gt;dev_addr)[i] = cpu_to_le16(inw(ioaddr + LAN0 + i*4));</div><div class='add'>+		((__le16 *)dev-&gt;dev_addr)[i] = cpu_to_le16(er16(LAN0 + i*4));</div><div class='ctx'> </div><div class='ctx'> 	if (debug &gt; 2) {</div><div class='ctx'> 		dev_printk(KERN_DEBUG, &amp;pdev-&gt;dev, "EEPROM contents:\n");</div><div class='ctx'> 		for (i = 0; i &lt; 64; i++)</div><div class='del'>-			printk(" %4.4x%s", read_eeprom(ioaddr, i),</div><div class='add'>+			printk(" %4.4x%s", read_eeprom(ep, i),</div><div class='ctx'> 				   i % 16 == 15 ? "\n" : "");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -481,8 +471,8 @@ static int __devinit epic_init_one (struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	/* Turn off the MII xcvr (175 only!), leave the chip in low-power mode. */</div><div class='ctx'> 	if (ep-&gt;chip_flags &amp; MII_PWRDWN)</div><div class='del'>-		outl(inl(ioaddr + NVCTL) &amp; ~0x483C, ioaddr + NVCTL);</div><div class='del'>-	outl(0x0008, ioaddr + GENCTL);</div><div class='add'>+		ew32(NVCTL, er32(NVCTL) &amp; ~0x483c);</div><div class='add'>+	ew32(GENCTL, 0x0008);</div><div class='ctx'> </div><div class='ctx'> 	/* The lower four bits are the media type. */</div><div class='ctx'> 	if (duplex) {</div><div class='hunk'>@@ -501,8 +491,9 @@ static int __devinit epic_init_one (struct pci_dev *pdev,</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto err_out_unmap_rx;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %pM\n",</div><div class='del'>-	       dev-&gt;name, pci_id_tbl[chip_idx].name, ioaddr, dev-&gt;irq,</div><div class='add'>+	printk(KERN_INFO "%s: %s at %lx, IRQ %d, %pM\n",</div><div class='add'>+	       dev-&gt;name, pci_id_tbl[chip_idx].name,</div><div class='add'>+	       (long)pci_resource_start(pdev, EPIC_BAR), pdev-&gt;irq,</div><div class='ctx'> 	       dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -513,10 +504,8 @@ err_out_unmap_rx:</div><div class='ctx'> err_out_unmap_tx:</div><div class='ctx'> 	pci_free_consistent(pdev, TX_TOTAL_SIZE, ep-&gt;tx_ring, ep-&gt;tx_ring_dma);</div><div class='ctx'> err_out_iounmap:</div><div class='del'>-#ifndef USE_IO_OPS</div><div class='del'>-	iounmap(ioaddr);</div><div class='add'>+	pci_iounmap(pdev, ioaddr);</div><div class='ctx'> err_out_free_netdev:</div><div class='del'>-#endif</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> err_out_free_res:</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='hunk'>@@ -540,7 +529,7 @@ err_out_disable:</div><div class='ctx'>    This serves to flush the operation to the PCI bus.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define eeprom_delay()	inl(ee_addr)</div><div class='add'>+#define eeprom_delay()	er32(EECTL)</div><div class='ctx'> </div><div class='ctx'> /* The EEPROM commands include the alway-set leading bit. */</div><div class='ctx'> #define EE_WRITE_CMD	(5 &lt;&lt; 6)</div><div class='hunk'>@@ -550,67 +539,67 @@ err_out_disable:</div><div class='ctx'> </div><div class='ctx'> static void epic_disable_int(struct net_device *dev, struct epic_private *ep)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> </div><div class='del'>-	outl(0x00000000, ioaddr + INTMASK);</div><div class='add'>+	ew32(INTMASK, 0x00000000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __epic_pci_commit(long ioaddr)</div><div class='add'>+static inline void __epic_pci_commit(void __iomem *ioaddr)</div><div class='ctx'> {</div><div class='ctx'> #ifndef USE_IO_OPS</div><div class='del'>-	inl(ioaddr + INTMASK);</div><div class='add'>+	er32(INTMASK);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void epic_napi_irq_off(struct net_device *dev,</div><div class='ctx'> 				     struct epic_private *ep)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> </div><div class='del'>-	outl(ep-&gt;irq_mask &amp; ~EpicNapiEvent, ioaddr + INTMASK);</div><div class='add'>+	ew32(INTMASK, ep-&gt;irq_mask &amp; ~EpicNapiEvent);</div><div class='ctx'> 	__epic_pci_commit(ioaddr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void epic_napi_irq_on(struct net_device *dev,</div><div class='ctx'> 				    struct epic_private *ep)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	/* No need to commit possible posted write */</div><div class='del'>-	outl(ep-&gt;irq_mask | EpicNapiEvent, ioaddr + INTMASK);</div><div class='add'>+	ew32(INTMASK, ep-&gt;irq_mask | EpicNapiEvent);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __devinit read_eeprom(long ioaddr, int location)</div><div class='add'>+static int __devinit read_eeprom(struct epic_private *ep, int location)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int retval = 0;</div><div class='del'>-	long ee_addr = ioaddr + EECTL;</div><div class='ctx'> 	int read_cmd = location |</div><div class='del'>-		(inl(ee_addr) &amp; 0x40 ? EE_READ64_CMD : EE_READ256_CMD);</div><div class='add'>+		(er32(EECTL) &amp; 0x40 ? EE_READ64_CMD : EE_READ256_CMD);</div><div class='ctx'> </div><div class='del'>-	outl(EE_ENB &amp; ~EE_CS, ee_addr);</div><div class='del'>-	outl(EE_ENB, ee_addr);</div><div class='add'>+	ew32(EECTL, EE_ENB &amp; ~EE_CS);</div><div class='add'>+	ew32(EECTL, EE_ENB);</div><div class='ctx'> </div><div class='ctx'> 	/* Shift the read command bits out. */</div><div class='ctx'> 	for (i = 12; i &gt;= 0; i--) {</div><div class='ctx'> 		short dataval = (read_cmd &amp; (1 &lt;&lt; i)) ? EE_WRITE_1 : EE_WRITE_0;</div><div class='del'>-		outl(EE_ENB | dataval, ee_addr);</div><div class='add'>+		ew32(EECTL, EE_ENB | dataval);</div><div class='ctx'> 		eeprom_delay();</div><div class='del'>-		outl(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);</div><div class='add'>+		ew32(EECTL, EE_ENB | dataval | EE_SHIFT_CLK);</div><div class='ctx'> 		eeprom_delay();</div><div class='ctx'> 	}</div><div class='del'>-	outl(EE_ENB, ee_addr);</div><div class='add'>+	ew32(EECTL, EE_ENB);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 16; i &gt; 0; i--) {</div><div class='del'>-		outl(EE_ENB | EE_SHIFT_CLK, ee_addr);</div><div class='add'>+		ew32(EECTL, EE_ENB | EE_SHIFT_CLK);</div><div class='ctx'> 		eeprom_delay();</div><div class='del'>-		retval = (retval &lt;&lt; 1) | ((inl(ee_addr) &amp; EE_DATA_READ) ? 1 : 0);</div><div class='del'>-		outl(EE_ENB, ee_addr);</div><div class='add'>+		retval = (retval &lt;&lt; 1) | ((er32(EECTL) &amp; EE_DATA_READ) ? 1 : 0);</div><div class='add'>+		ew32(EECTL, EE_ENB);</div><div class='ctx'> 		eeprom_delay();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Terminate the EEPROM access. */</div><div class='del'>-	outl(EE_ENB &amp; ~EE_CS, ee_addr);</div><div class='add'>+	ew32(EECTL, EE_ENB &amp; ~EE_CS);</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -618,22 +607,23 @@ static int __devinit read_eeprom(long ioaddr, int location)</div><div class='ctx'> #define MII_WRITEOP		2</div><div class='ctx'> static int mdio_read(struct net_device *dev, int phy_id, int location)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct epic_private *ep = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> 	int read_cmd = (phy_id &lt;&lt; 9) | (location &lt;&lt; 4) | MII_READOP;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	outl(read_cmd, ioaddr + MIICtrl);</div><div class='add'>+	ew32(MIICtrl, read_cmd);</div><div class='ctx'> 	/* Typical operation takes 25 loops. */</div><div class='ctx'> 	for (i = 400; i &gt; 0; i--) {</div><div class='ctx'> 		barrier();</div><div class='del'>-		if ((inl(ioaddr + MIICtrl) &amp; MII_READOP) == 0) {</div><div class='add'>+		if ((er32(MIICtrl) &amp; MII_READOP) == 0) {</div><div class='ctx'> 			/* Work around read failure bug. */</div><div class='ctx'> 			if (phy_id == 1 &amp;&amp; location &lt; 6 &amp;&amp;</div><div class='del'>-			    inw(ioaddr + MIIData) == 0xffff) {</div><div class='del'>-				outl(read_cmd, ioaddr + MIICtrl);</div><div class='add'>+			    er16(MIIData) == 0xffff) {</div><div class='add'>+				ew32(MIICtrl, read_cmd);</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='del'>-			return inw(ioaddr + MIIData);</div><div class='add'>+			return er16(MIIData);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0xffff;</div><div class='hunk'>@@ -641,14 +631,15 @@ static int mdio_read(struct net_device *dev, int phy_id, int location)</div><div class='ctx'> </div><div class='ctx'> static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct epic_private *ep = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	outw(value, ioaddr + MIIData);</div><div class='del'>-	outl((phy_id &lt;&lt; 9) | (loc &lt;&lt; 4) | MII_WRITEOP, ioaddr + MIICtrl);</div><div class='add'>+	ew16(MIIData, value);</div><div class='add'>+	ew32(MIICtrl, (phy_id &lt;&lt; 9) | (loc &lt;&lt; 4) | MII_WRITEOP);</div><div class='ctx'> 	for (i = 10000; i &gt; 0; i--) {</div><div class='ctx'> 		barrier();</div><div class='del'>-		if ((inl(ioaddr + MIICtrl) &amp; MII_WRITEOP) == 0)</div><div class='add'>+		if ((er32(MIICtrl) &amp; MII_WRITEOP) == 0)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -657,25 +648,26 @@ static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)</div><div class='ctx'> static int epic_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct epic_private *ep = netdev_priv(dev);</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='del'>-	int i;</div><div class='del'>-	int retval;</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='add'>+	const int irq = ep-&gt;pci_dev-&gt;irq;</div><div class='add'>+	int rc, i;</div><div class='ctx'> </div><div class='ctx'> 	/* Soft reset the chip. */</div><div class='del'>-	outl(0x4001, ioaddr + GENCTL);</div><div class='add'>+	ew32(GENCTL, 0x4001);</div><div class='ctx'> </div><div class='ctx'> 	napi_enable(&amp;ep-&gt;napi);</div><div class='del'>-	if ((retval = request_irq(dev-&gt;irq, epic_interrupt, IRQF_SHARED, dev-&gt;name, dev))) {</div><div class='add'>+	rc = request_irq(irq, epic_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	if (rc) {</div><div class='ctx'> 		napi_disable(&amp;ep-&gt;napi);</div><div class='del'>-		return retval;</div><div class='add'>+		return rc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	epic_init_ring(dev);</div><div class='ctx'> </div><div class='del'>-	outl(0x4000, ioaddr + GENCTL);</div><div class='add'>+	ew32(GENCTL, 0x4000);</div><div class='ctx'> 	/* This magic is documented in SMSC app note 7.15 */</div><div class='ctx'> 	for (i = 16; i &gt; 0; i--)</div><div class='del'>-		outl(0x0008, ioaddr + TEST1);</div><div class='add'>+		ew32(TEST1, 0x0008);</div><div class='ctx'> </div><div class='ctx'> 	/* Pull the chip out of low-power mode, enable interrupts, and set for</div><div class='ctx'> 	   PCI read multiple.  The MIIcfg setting and strange write order are</div><div class='hunk'>@@ -683,29 +675,29 @@ static int epic_open(struct net_device *dev)</div><div class='ctx'> 	   wiring on the Ositech CardBus card.</div><div class='ctx'> 	*/</div><div class='ctx'> #if 0</div><div class='del'>-	outl(dev-&gt;if_port == 1 ? 0x13 : 0x12, ioaddr + MIICfg);</div><div class='add'>+	ew32(MIICfg, dev-&gt;if_port == 1 ? 0x13 : 0x12);</div><div class='ctx'> #endif</div><div class='ctx'> 	if (ep-&gt;chip_flags &amp; MII_PWRDWN)</div><div class='del'>-		outl((inl(ioaddr + NVCTL) &amp; ~0x003C) | 0x4800, ioaddr + NVCTL);</div><div class='add'>+		ew32(NVCTL, (er32(NVCTL) &amp; ~0x003c) | 0x4800);</div><div class='ctx'> </div><div class='ctx'> 	/* Tell the chip to byteswap descriptors on big-endian hosts */</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-	outl(0x4432 | (RX_FIFO_THRESH&lt;&lt;8), ioaddr + GENCTL);</div><div class='del'>-	inl(ioaddr + GENCTL);</div><div class='del'>-	outl(0x0432 | (RX_FIFO_THRESH&lt;&lt;8), ioaddr + GENCTL);</div><div class='add'>+	ew32(GENCTL, 0x4432 | (RX_FIFO_THRESH &lt;&lt; 8));</div><div class='add'>+	er32(GENCTL);</div><div class='add'>+	ew32(GENCTL, 0x0432 | (RX_FIFO_THRESH &lt;&lt; 8));</div><div class='ctx'> #else</div><div class='del'>-	outl(0x4412 | (RX_FIFO_THRESH&lt;&lt;8), ioaddr + GENCTL);</div><div class='del'>-	inl(ioaddr + GENCTL);</div><div class='del'>-	outl(0x0412 | (RX_FIFO_THRESH&lt;&lt;8), ioaddr + GENCTL);</div><div class='add'>+	ew32(GENCTL, 0x4412 | (RX_FIFO_THRESH &lt;&lt; 8));</div><div class='add'>+	er32(GENCTL);</div><div class='add'>+	ew32(GENCTL, 0x0412 | (RX_FIFO_THRESH &lt;&lt; 8));</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	udelay(20); /* Looks like EPII needs that if you want reliable RX init. FIXME: pci posting bug? */</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 3; i++)</div><div class='del'>-		outl(le16_to_cpu(((__le16*)dev-&gt;dev_addr)[i]), ioaddr + LAN0 + i*4);</div><div class='add'>+		ew32(LAN0 + i*4, le16_to_cpu(((__le16*)dev-&gt;dev_addr)[i]));</div><div class='ctx'> </div><div class='ctx'> 	ep-&gt;tx_threshold = TX_FIFO_THRESH;</div><div class='del'>-	outl(ep-&gt;tx_threshold, ioaddr + TxThresh);</div><div class='add'>+	ew32(TxThresh, ep-&gt;tx_threshold);</div><div class='ctx'> </div><div class='ctx'> 	if (media2miictl[dev-&gt;if_port &amp; 15]) {</div><div class='ctx'> 		if (ep-&gt;mii_phy_cnt)</div><div class='hunk'>@@ -731,26 +723,27 @@ static int epic_open(struct net_device *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	outl(ep-&gt;mii.full_duplex ? 0x7F : 0x79, ioaddr + TxCtrl);</div><div class='del'>-	outl(ep-&gt;rx_ring_dma, ioaddr + PRxCDAR);</div><div class='del'>-	outl(ep-&gt;tx_ring_dma, ioaddr + PTxCDAR);</div><div class='add'>+	ew32(TxCtrl, ep-&gt;mii.full_duplex ? 0x7f : 0x79);</div><div class='add'>+	ew32(PRxCDAR, ep-&gt;rx_ring_dma);</div><div class='add'>+	ew32(PTxCDAR, ep-&gt;tx_ring_dma);</div><div class='ctx'> </div><div class='ctx'> 	/* Start the chip's Rx process. */</div><div class='ctx'> 	set_rx_mode(dev);</div><div class='del'>-	outl(StartRx | RxQueued, ioaddr + COMMAND);</div><div class='add'>+	ew32(COMMAND, StartRx | RxQueued);</div><div class='ctx'> </div><div class='ctx'> 	netif_start_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable interrupts by setting the interrupt mask. */</div><div class='del'>-	outl((ep-&gt;chip_flags &amp; TYPE2_INTR ? PCIBusErr175 : PCIBusErr170)</div><div class='del'>-		 | CntFull | TxUnderrun</div><div class='del'>-		 | RxError | RxHeader | EpicNapiEvent, ioaddr + INTMASK);</div><div class='del'>-</div><div class='del'>-	if (debug &gt; 1)</div><div class='del'>-		printk(KERN_DEBUG "%s: epic_open() ioaddr %lx IRQ %d status %4.4x "</div><div class='del'>-			   "%s-duplex.\n",</div><div class='del'>-			   dev-&gt;name, ioaddr, dev-&gt;irq, (int)inl(ioaddr + GENCTL),</div><div class='del'>-			   ep-&gt;mii.full_duplex ? "full" : "half");</div><div class='add'>+	ew32(INTMASK, RxError | RxHeader | EpicNapiEvent | CntFull |</div><div class='add'>+	     ((ep-&gt;chip_flags &amp; TYPE2_INTR) ? PCIBusErr175 : PCIBusErr170) |</div><div class='add'>+	     TxUnderrun);</div><div class='add'>+</div><div class='add'>+	if (debug &gt; 1) {</div><div class='add'>+		printk(KERN_DEBUG "%s: epic_open() ioaddr %p IRQ %d "</div><div class='add'>+		       "status %4.4x %s-duplex.\n",</div><div class='add'>+		       dev-&gt;name, ioaddr, irq, er32(GENCTL),</div><div class='add'>+		       ep-&gt;mii.full_duplex ? "full" : "half");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set the timer to switch to check for link beat and perhaps switch</div><div class='ctx'> 	   to an alternate media type. */</div><div class='hunk'>@@ -760,27 +753,29 @@ static int epic_open(struct net_device *dev)</div><div class='ctx'> 	ep-&gt;timer.function = epic_timer;				/* timer handler */</div><div class='ctx'> 	add_timer(&amp;ep-&gt;timer);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Reset the chip to recover from a PCI transaction error.</div><div class='ctx'>    This may occur at interrupt time. */</div><div class='ctx'> static void epic_pause(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct epic_private *ep = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue (dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable interrupts by clearing the interrupt mask. */</div><div class='del'>-	outl(0x00000000, ioaddr + INTMASK);</div><div class='add'>+	ew32(INTMASK, 0x00000000);</div><div class='ctx'> 	/* Stop the chip's Tx and Rx DMA processes. */</div><div class='del'>-	outw(StopRx | StopTxDMA | StopRxDMA, ioaddr + COMMAND);</div><div class='add'>+	ew16(COMMAND, StopRx | StopTxDMA | StopRxDMA);</div><div class='ctx'> </div><div class='ctx'> 	/* Update the error counts. */</div><div class='del'>-	if (inw(ioaddr + COMMAND) != 0xffff) {</div><div class='del'>-		dev-&gt;stats.rx_missed_errors += inb(ioaddr + MPCNT);</div><div class='del'>-		dev-&gt;stats.rx_frame_errors += inb(ioaddr + ALICNT);</div><div class='del'>-		dev-&gt;stats.rx_crc_errors += inb(ioaddr + CRCCNT);</div><div class='add'>+	if (er16(COMMAND) != 0xffff) {</div><div class='add'>+		stats-&gt;rx_missed_errors	+= er8(MPCNT);</div><div class='add'>+		stats-&gt;rx_frame_errors	+= er8(ALICNT);</div><div class='add'>+		stats-&gt;rx_crc_errors	+= er8(CRCCNT);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Remove the packets on the Rx queue. */</div><div class='hunk'>@@ -789,12 +784,12 @@ static void epic_pause(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void epic_restart(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	struct epic_private *ep = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Soft reset the chip. */</div><div class='del'>-	outl(0x4001, ioaddr + GENCTL);</div><div class='add'>+	ew32(GENCTL, 0x4001);</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_DEBUG "%s: Restarting the EPIC chip, Rx %d/%d Tx %d/%d.\n",</div><div class='ctx'> 		   dev-&gt;name, ep-&gt;cur_rx, ep-&gt;dirty_rx, ep-&gt;dirty_tx, ep-&gt;cur_tx);</div><div class='hunk'>@@ -802,47 +797,46 @@ static void epic_restart(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* This magic is documented in SMSC app note 7.15 */</div><div class='ctx'> 	for (i = 16; i &gt; 0; i--)</div><div class='del'>-		outl(0x0008, ioaddr + TEST1);</div><div class='add'>+		ew32(TEST1, 0x0008);</div><div class='ctx'> </div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-	outl(0x0432 | (RX_FIFO_THRESH&lt;&lt;8), ioaddr + GENCTL);</div><div class='add'>+	ew32(GENCTL, 0x0432 | (RX_FIFO_THRESH &lt;&lt; 8));</div><div class='ctx'> #else</div><div class='del'>-	outl(0x0412 | (RX_FIFO_THRESH&lt;&lt;8), ioaddr + GENCTL);</div><div class='add'>+	ew32(GENCTL, 0x0412 | (RX_FIFO_THRESH &lt;&lt; 8));</div><div class='ctx'> #endif</div><div class='del'>-	outl(dev-&gt;if_port == 1 ? 0x13 : 0x12, ioaddr + MIICfg);</div><div class='add'>+	ew32(MIICfg, dev-&gt;if_port == 1 ? 0x13 : 0x12);</div><div class='ctx'> 	if (ep-&gt;chip_flags &amp; MII_PWRDWN)</div><div class='del'>-		outl((inl(ioaddr + NVCTL) &amp; ~0x003C) | 0x4800, ioaddr + NVCTL);</div><div class='add'>+		ew32(NVCTL, (er32(NVCTL) &amp; ~0x003c) | 0x4800);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 3; i++)</div><div class='del'>-		outl(le16_to_cpu(((__le16*)dev-&gt;dev_addr)[i]), ioaddr + LAN0 + i*4);</div><div class='add'>+		ew32(LAN0 + i*4, le16_to_cpu(((__le16*)dev-&gt;dev_addr)[i]));</div><div class='ctx'> </div><div class='ctx'> 	ep-&gt;tx_threshold = TX_FIFO_THRESH;</div><div class='del'>-	outl(ep-&gt;tx_threshold, ioaddr + TxThresh);</div><div class='del'>-	outl(ep-&gt;mii.full_duplex ? 0x7F : 0x79, ioaddr + TxCtrl);</div><div class='del'>-	outl(ep-&gt;rx_ring_dma + (ep-&gt;cur_rx%RX_RING_SIZE)*</div><div class='del'>-		sizeof(struct epic_rx_desc), ioaddr + PRxCDAR);</div><div class='del'>-	outl(ep-&gt;tx_ring_dma + (ep-&gt;dirty_tx%TX_RING_SIZE)*</div><div class='del'>-		 sizeof(struct epic_tx_desc), ioaddr + PTxCDAR);</div><div class='add'>+	ew32(TxThresh, ep-&gt;tx_threshold);</div><div class='add'>+	ew32(TxCtrl, ep-&gt;mii.full_duplex ? 0x7f : 0x79);</div><div class='add'>+	ew32(PRxCDAR, ep-&gt;rx_ring_dma +</div><div class='add'>+	     (ep-&gt;cur_rx % RX_RING_SIZE) * sizeof(struct epic_rx_desc));</div><div class='add'>+	ew32(PTxCDAR, ep-&gt;tx_ring_dma +</div><div class='add'>+	     (ep-&gt;dirty_tx % TX_RING_SIZE) * sizeof(struct epic_tx_desc));</div><div class='ctx'> </div><div class='ctx'> 	/* Start the chip's Rx process. */</div><div class='ctx'> 	set_rx_mode(dev);</div><div class='del'>-	outl(StartRx | RxQueued, ioaddr + COMMAND);</div><div class='add'>+	ew32(COMMAND, StartRx | RxQueued);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable interrupts by setting the interrupt mask. */</div><div class='del'>-	outl((ep-&gt;chip_flags &amp; TYPE2_INTR ? PCIBusErr175 : PCIBusErr170)</div><div class='del'>-		 | CntFull | TxUnderrun</div><div class='del'>-		 | RxError | RxHeader | EpicNapiEvent, ioaddr + INTMASK);</div><div class='add'>+	ew32(INTMASK, RxError | RxHeader | EpicNapiEvent | CntFull |</div><div class='add'>+	     ((ep-&gt;chip_flags &amp; TYPE2_INTR) ? PCIBusErr175 : PCIBusErr170) |</div><div class='add'>+	     TxUnderrun);</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_DEBUG "%s: epic_restart() done, cmd status %4.4x, ctl %4.4x"</div><div class='ctx'> 		   " interrupt %4.4x.\n",</div><div class='del'>-		   dev-&gt;name, (int)inl(ioaddr + COMMAND), (int)inl(ioaddr + GENCTL),</div><div class='del'>-		   (int)inl(ioaddr + INTSTAT));</div><div class='add'>+		   dev-&gt;name, er32(COMMAND), er32(GENCTL), er32(INTSTAT));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void check_media(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct epic_private *ep = netdev_priv(dev);</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> 	int mii_lpa = ep-&gt;mii_phy_cnt ? mdio_read(dev, ep-&gt;phys[0], MII_LPA) : 0;</div><div class='ctx'> 	int negotiated = mii_lpa &amp; ep-&gt;mii.advertising;</div><div class='ctx'> 	int duplex = (negotiated &amp; 0x0100) || (negotiated &amp; 0x01C0) == 0x0040;</div><div class='hunk'>@@ -856,7 +850,7 @@ static void check_media(struct net_device *dev)</div><div class='ctx'> 		printk(KERN_INFO "%s: Setting %s-duplex based on MII #%d link"</div><div class='ctx'> 			   " partner capability of %4.4x.\n", dev-&gt;name,</div><div class='ctx'> 			   ep-&gt;mii.full_duplex ? "full" : "half", ep-&gt;phys[0], mii_lpa);</div><div class='del'>-		outl(ep-&gt;mii.full_duplex ? 0x7F : 0x79, ioaddr + TxCtrl);</div><div class='add'>+		ew32(TxCtrl, ep-&gt;mii.full_duplex ? 0x7F : 0x79);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -864,16 +858,15 @@ static void epic_timer(unsigned long data)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = (struct net_device *)data;</div><div class='ctx'> 	struct epic_private *ep = netdev_priv(dev);</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> 	int next_tick = 5*HZ;</div><div class='ctx'> </div><div class='ctx'> 	if (debug &gt; 3) {</div><div class='ctx'> 		printk(KERN_DEBUG "%s: Media monitor tick, Tx status %8.8x.\n",</div><div class='del'>-			   dev-&gt;name, (int)inl(ioaddr + TxSTAT));</div><div class='add'>+		       dev-&gt;name, er32(TxSTAT));</div><div class='ctx'> 		printk(KERN_DEBUG "%s: Other registers are IntMask %4.4x "</div><div class='del'>-			   "IntStatus %4.4x RxStatus %4.4x.\n",</div><div class='del'>-			   dev-&gt;name, (int)inl(ioaddr + INTMASK),</div><div class='del'>-			   (int)inl(ioaddr + INTSTAT), (int)inl(ioaddr + RxSTAT));</div><div class='add'>+		       "IntStatus %4.4x RxStatus %4.4x.\n", dev-&gt;name,</div><div class='add'>+		       er32(INTMASK), er32(INTSTAT), er32(RxSTAT));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	check_media(dev);</div><div class='hunk'>@@ -885,23 +878,22 @@ static void epic_timer(unsigned long data)</div><div class='ctx'> static void epic_tx_timeout(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct epic_private *ep = netdev_priv(dev);</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	if (debug &gt; 0) {</div><div class='ctx'> 		printk(KERN_WARNING "%s: Transmit timeout using MII device, "</div><div class='del'>-			   "Tx status %4.4x.\n",</div><div class='del'>-			   dev-&gt;name, (int)inw(ioaddr + TxSTAT));</div><div class='add'>+		       "Tx status %4.4x.\n", dev-&gt;name, er16(TxSTAT));</div><div class='ctx'> 		if (debug &gt; 1) {</div><div class='ctx'> 			printk(KERN_DEBUG "%s: Tx indices: dirty_tx %d, cur_tx %d.\n",</div><div class='ctx'> 				   dev-&gt;name, ep-&gt;dirty_tx, ep-&gt;cur_tx);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (inw(ioaddr + TxSTAT) &amp; 0x10) {		/* Tx FIFO underflow. */</div><div class='add'>+	if (er16(TxSTAT) &amp; 0x10) {		/* Tx FIFO underflow. */</div><div class='ctx'> 		dev-&gt;stats.tx_fifo_errors++;</div><div class='del'>-		outl(RestartTx, ioaddr + COMMAND);</div><div class='add'>+		ew32(COMMAND, RestartTx);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		epic_restart(dev);</div><div class='del'>-		outl(TxQueued, dev-&gt;base_addr + COMMAND);</div><div class='add'>+		ew32(COMMAND, TxQueued);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='hunk'>@@ -959,6 +951,7 @@ static void epic_init_ring(struct net_device *dev)</div><div class='ctx'> static netdev_tx_t epic_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct epic_private *ep = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> 	int entry, free_count;</div><div class='ctx'> 	u32 ctrl_word;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -999,13 +992,12 @@ static netdev_tx_t epic_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ep-&gt;lock, flags);</div><div class='ctx'> 	/* Trigger an immediate transmit demand. */</div><div class='del'>-	outl(TxQueued, dev-&gt;base_addr + COMMAND);</div><div class='add'>+	ew32(COMMAND, TxQueued);</div><div class='ctx'> </div><div class='ctx'> 	if (debug &gt; 4)</div><div class='ctx'> 		printk(KERN_DEBUG "%s: Queued Tx packet size %d to slot %d, "</div><div class='del'>-			   "flag %2.2x Tx status %8.8x.\n",</div><div class='del'>-			   dev-&gt;name, (int)skb-&gt;len, entry, ctrl_word,</div><div class='del'>-			   (int)inl(dev-&gt;base_addr + TxSTAT));</div><div class='add'>+		       "flag %2.2x Tx status %8.8x.\n", dev-&gt;name, skb-&gt;len,</div><div class='add'>+		       entry, ctrl_word, er32(TxSTAT));</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1086,18 +1078,17 @@ static irqreturn_t epic_interrupt(int irq, void *dev_instance)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = dev_instance;</div><div class='ctx'> 	struct epic_private *ep = netdev_priv(dev);</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> 	unsigned int handled = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	status = inl(ioaddr + INTSTAT);</div><div class='add'>+	status = er32(INTSTAT);</div><div class='ctx'> 	/* Acknowledge all of the current interrupt sources ASAP. */</div><div class='del'>-	outl(status &amp; EpicNormalEvent, ioaddr + INTSTAT);</div><div class='add'>+	ew32(INTSTAT, status &amp; EpicNormalEvent);</div><div class='ctx'> </div><div class='ctx'> 	if (debug &gt; 4) {</div><div class='ctx'> 		printk(KERN_DEBUG "%s: Interrupt, status=%#8.8x new "</div><div class='del'>-				   "intstat=%#8.8x.\n", dev-&gt;name, status,</div><div class='del'>-				   (int)inl(ioaddr + INTSTAT));</div><div class='add'>+		       "intstat=%#8.8x.\n", dev-&gt;name, status, er32(INTSTAT));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((status &amp; IntrSummary) == 0)</div><div class='hunk'>@@ -1118,19 +1109,21 @@ static irqreturn_t epic_interrupt(int irq, void *dev_instance)</div><div class='ctx'> </div><div class='ctx'> 	/* Check uncommon events all at once. */</div><div class='ctx'> 	if (status &amp; (CntFull | TxUnderrun | PCIBusErr170 | PCIBusErr175)) {</div><div class='add'>+		struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+</div><div class='ctx'> 		if (status == EpicRemoved)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='ctx'> 		/* Always update the error counts to avoid overhead later. */</div><div class='del'>-		dev-&gt;stats.rx_missed_errors += inb(ioaddr + MPCNT);</div><div class='del'>-		dev-&gt;stats.rx_frame_errors += inb(ioaddr + ALICNT);</div><div class='del'>-		dev-&gt;stats.rx_crc_errors += inb(ioaddr + CRCCNT);</div><div class='add'>+		stats-&gt;rx_missed_errors	+= er8(MPCNT);</div><div class='add'>+		stats-&gt;rx_frame_errors	+= er8(ALICNT);</div><div class='add'>+		stats-&gt;rx_crc_errors	+= er8(CRCCNT);</div><div class='ctx'> </div><div class='ctx'> 		if (status &amp; TxUnderrun) { /* Tx FIFO underflow. */</div><div class='del'>-			dev-&gt;stats.tx_fifo_errors++;</div><div class='del'>-			outl(ep-&gt;tx_threshold += 128, ioaddr + TxThresh);</div><div class='add'>+			stats-&gt;tx_fifo_errors++;</div><div class='add'>+			ew32(TxThresh, ep-&gt;tx_threshold += 128);</div><div class='ctx'> 			/* Restart the transmit process. */</div><div class='del'>-			outl(RestartTx, ioaddr + COMMAND);</div><div class='add'>+			ew32(COMMAND, RestartTx);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (status &amp; PCIBusErr170) {</div><div class='ctx'> 			printk(KERN_ERR "%s: PCI Bus Error! status %4.4x.\n",</div><div class='hunk'>@@ -1139,7 +1132,7 @@ static irqreturn_t epic_interrupt(int irq, void *dev_instance)</div><div class='ctx'> 			epic_restart(dev);</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Clear all error sources. */</div><div class='del'>-		outl(status &amp; 0x7f18, ioaddr + INTSTAT);</div><div class='add'>+		ew32(INTSTAT, status &amp; 0x7f18);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -1248,17 +1241,17 @@ static int epic_rx(struct net_device *dev, int budget)</div><div class='ctx'> </div><div class='ctx'> static void epic_rx_err(struct net_device *dev, struct epic_private *ep)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	status = inl(ioaddr + INTSTAT);</div><div class='add'>+	status = er32(INTSTAT);</div><div class='ctx'> </div><div class='ctx'> 	if (status == EpicRemoved)</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (status &amp; RxOverflow) 	/* Missed a Rx frame. */</div><div class='ctx'> 		dev-&gt;stats.rx_errors++;</div><div class='ctx'> 	if (status &amp; (RxOverflow | RxFull))</div><div class='del'>-		outw(RxQueued, ioaddr + COMMAND);</div><div class='add'>+		ew16(COMMAND, RxQueued);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int epic_poll(struct napi_struct *napi, int budget)</div><div class='hunk'>@@ -1266,7 +1259,7 @@ static int epic_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	struct epic_private *ep = container_of(napi, struct epic_private, napi);</div><div class='ctx'> 	struct net_device *dev = ep-&gt;mii.dev;</div><div class='ctx'> 	int work_done = 0;</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> rx_action:</div><div class='ctx'> </div><div class='hunk'>@@ -1287,7 +1280,7 @@ rx_action:</div><div class='ctx'> 		more = ep-&gt;reschedule_in_poll;</div><div class='ctx'> 		if (!more) {</div><div class='ctx'> 			__napi_complete(napi);</div><div class='del'>-			outl(EpicNapiEvent, ioaddr + INTSTAT);</div><div class='add'>+			ew32(INTSTAT, EpicNapiEvent);</div><div class='ctx'> 			epic_napi_irq_on(dev, ep);</div><div class='ctx'> 		} else</div><div class='ctx'> 			ep-&gt;reschedule_in_poll--;</div><div class='hunk'>@@ -1303,8 +1296,9 @@ rx_action:</div><div class='ctx'> </div><div class='ctx'> static int epic_close(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	struct epic_private *ep = netdev_priv(dev);</div><div class='add'>+	struct pci_dev *pdev = ep-&gt;pci_dev;</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -1313,13 +1307,13 @@ static int epic_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (debug &gt; 1)</div><div class='ctx'> 		printk(KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",</div><div class='del'>-			   dev-&gt;name, (int)inl(ioaddr + INTSTAT));</div><div class='add'>+		       dev-&gt;name, er32(INTSTAT));</div><div class='ctx'> </div><div class='ctx'> 	del_timer_sync(&amp;ep-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	epic_disable_int(dev, ep);</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(pdev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	epic_pause(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1330,7 +1324,7 @@ static int epic_close(struct net_device *dev)</div><div class='ctx'> 		ep-&gt;rx_ring[i].rxstatus = 0;		/* Not owned by Epic chip. */</div><div class='ctx'> 		ep-&gt;rx_ring[i].buflength = 0;</div><div class='ctx'> 		if (skb) {</div><div class='del'>-			pci_unmap_single(ep-&gt;pci_dev, ep-&gt;rx_ring[i].bufaddr,</div><div class='add'>+			pci_unmap_single(pdev, ep-&gt;rx_ring[i].bufaddr,</div><div class='ctx'> 				 	 ep-&gt;rx_buf_sz, PCI_DMA_FROMDEVICE);</div><div class='ctx'> 			dev_kfree_skb(skb);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1341,26 +1335,28 @@ static int epic_close(struct net_device *dev)</div><div class='ctx'> 		ep-&gt;tx_skbuff[i] = NULL;</div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			continue;</div><div class='del'>-		pci_unmap_single(ep-&gt;pci_dev, ep-&gt;tx_ring[i].bufaddr,</div><div class='del'>-				 skb-&gt;len, PCI_DMA_TODEVICE);</div><div class='add'>+		pci_unmap_single(pdev, ep-&gt;tx_ring[i].bufaddr, skb-&gt;len,</div><div class='add'>+				 PCI_DMA_TODEVICE);</div><div class='ctx'> 		dev_kfree_skb(skb);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Green! Leave the chip in low-power mode. */</div><div class='del'>-	outl(0x0008, ioaddr + GENCTL);</div><div class='add'>+	ew32(GENCTL, 0x0008);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct net_device_stats *epic_get_stats(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct epic_private *ep = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='del'>-		/* Update the error counts. */</div><div class='del'>-		dev-&gt;stats.rx_missed_errors += inb(ioaddr + MPCNT);</div><div class='del'>-		dev-&gt;stats.rx_frame_errors += inb(ioaddr + ALICNT);</div><div class='del'>-		dev-&gt;stats.rx_crc_errors += inb(ioaddr + CRCCNT);</div><div class='add'>+		struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_missed_errors	+= er8(MPCNT);</div><div class='add'>+		stats-&gt;rx_frame_errors	+= er8(ALICNT);</div><div class='add'>+		stats-&gt;rx_crc_errors	+= er8(CRCCNT);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return &amp;dev-&gt;stats;</div><div class='hunk'>@@ -1373,13 +1369,13 @@ static struct net_device_stats *epic_get_stats(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void set_rx_mode(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	struct epic_private *ep = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> 	unsigned char mc_filter[8];		 /* Multicast hash filter */</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;flags &amp; IFF_PROMISC) {			/* Set promiscuous. */</div><div class='del'>-		outl(0x002C, ioaddr + RxCtrl);</div><div class='add'>+		ew32(RxCtrl, 0x002c);</div><div class='ctx'> 		/* Unconditionally log net taps. */</div><div class='ctx'> 		memset(mc_filter, 0xff, sizeof(mc_filter));</div><div class='ctx'> 	} else if ((!netdev_mc_empty(dev)) || (dev-&gt;flags &amp; IFF_ALLMULTI)) {</div><div class='hunk'>@@ -1387,9 +1383,9 @@ static void set_rx_mode(struct net_device *dev)</div><div class='ctx'> 		   is never enabled. */</div><div class='ctx'> 		/* Too many to filter perfectly -- accept all multicasts. */</div><div class='ctx'> 		memset(mc_filter, 0xff, sizeof(mc_filter));</div><div class='del'>-		outl(0x000C, ioaddr + RxCtrl);</div><div class='add'>+		ew32(RxCtrl, 0x000c);</div><div class='ctx'> 	} else if (netdev_mc_empty(dev)) {</div><div class='del'>-		outl(0x0004, ioaddr + RxCtrl);</div><div class='add'>+		ew32(RxCtrl, 0x0004);</div><div class='ctx'> 		return;</div><div class='ctx'> 	} else {					/* Never executed, for now. */</div><div class='ctx'> 		struct netdev_hw_addr *ha;</div><div class='hunk'>@@ -1404,7 +1400,7 @@ static void set_rx_mode(struct net_device *dev)</div><div class='ctx'> 	/* ToDo: perhaps we need to stop the Tx and Rx process here? */</div><div class='ctx'> 	if (memcmp(mc_filter, ep-&gt;mc_filter, sizeof(mc_filter))) {</div><div class='ctx'> 		for (i = 0; i &lt; 4; i++)</div><div class='del'>-			outw(((u16 *)mc_filter)[i], ioaddr + MC0 + i*4);</div><div class='add'>+			ew16(MC0 + i*4, ((u16 *)mc_filter)[i]);</div><div class='ctx'> 		memcpy(ep-&gt;mc_filter, mc_filter, sizeof(mc_filter));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1466,22 +1462,26 @@ static void netdev_set_msglevel(struct net_device *dev, u32 value)</div><div class='ctx'> </div><div class='ctx'> static int ethtool_begin(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	unsigned long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct epic_private *ep = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='add'>+</div><div class='ctx'> 	/* power-up, if interface is down */</div><div class='del'>-	if (! netif_running(dev)) {</div><div class='del'>-		outl(0x0200, ioaddr + GENCTL);</div><div class='del'>-		outl((inl(ioaddr + NVCTL) &amp; ~0x003C) | 0x4800, ioaddr + NVCTL);</div><div class='add'>+	if (!netif_running(dev)) {</div><div class='add'>+		ew32(GENCTL, 0x0200);</div><div class='add'>+		ew32(NVCTL, (er32(NVCTL) &amp; ~0x003c) | 0x4800);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ethtool_complete(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	unsigned long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct epic_private *ep = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='add'>+</div><div class='ctx'> 	/* power-down, if interface is down */</div><div class='del'>-	if (! netif_running(dev)) {</div><div class='del'>-		outl(0x0008, ioaddr + GENCTL);</div><div class='del'>-		outl((inl(ioaddr + NVCTL) &amp; ~0x483C) | 0x0000, ioaddr + NVCTL);</div><div class='add'>+	if (!netif_running(dev)) {</div><div class='add'>+		ew32(GENCTL, 0x0008);</div><div class='add'>+		ew32(NVCTL, (er32(NVCTL) &amp; ~0x483c) | 0x0000);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1500,14 +1500,14 @@ static const struct ethtool_ops netdev_ethtool_ops = {</div><div class='ctx'> static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct epic_private *np = netdev_priv(dev);</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='ctx'> 	struct mii_ioctl_data *data = if_mii(rq);</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	/* power-up, if interface is down */</div><div class='ctx'> 	if (! netif_running(dev)) {</div><div class='del'>-		outl(0x0200, ioaddr + GENCTL);</div><div class='del'>-		outl((inl(ioaddr + NVCTL) &amp; ~0x003C) | 0x4800, ioaddr + NVCTL);</div><div class='add'>+		ew32(GENCTL, 0x0200);</div><div class='add'>+		ew32(NVCTL, (er32(NVCTL) &amp; ~0x003c) | 0x4800);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* all non-ethtool ioctls (the SIOC[GS]MIIxxx ioctls) */</div><div class='hunk'>@@ -1517,14 +1517,14 @@ static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'> </div><div class='ctx'> 	/* power-down, if interface is down */</div><div class='ctx'> 	if (! netif_running(dev)) {</div><div class='del'>-		outl(0x0008, ioaddr + GENCTL);</div><div class='del'>-		outl((inl(ioaddr + NVCTL) &amp; ~0x483C) | 0x0000, ioaddr + NVCTL);</div><div class='add'>+		ew32(GENCTL, 0x0008);</div><div class='add'>+		ew32(NVCTL, (er32(NVCTL) &amp; ~0x483c) | 0x0000);</div><div class='ctx'> 	}</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static void __devexit epic_remove_one (struct pci_dev *pdev)</div><div class='add'>+static void __devexit epic_remove_one(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct epic_private *ep = netdev_priv(dev);</div><div class='hunk'>@@ -1532,9 +1532,7 @@ static void __devexit epic_remove_one (struct pci_dev *pdev)</div><div class='ctx'> 	pci_free_consistent(pdev, TX_TOTAL_SIZE, ep-&gt;tx_ring, ep-&gt;tx_ring_dma);</div><div class='ctx'> 	pci_free_consistent(pdev, RX_TOTAL_SIZE, ep-&gt;rx_ring, ep-&gt;rx_ring_dma);</div><div class='ctx'> 	unregister_netdev(dev);</div><div class='del'>-#ifndef USE_IO_OPS</div><div class='del'>-	iounmap((void*) dev-&gt;base_addr);</div><div class='del'>-#endif</div><div class='add'>+	pci_iounmap(pdev, ep-&gt;ioaddr);</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='hunk'>@@ -1548,13 +1546,14 @@ static void __devexit epic_remove_one (struct pci_dev *pdev)</div><div class='ctx'> static int epic_suspend (struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='del'>-	long ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct epic_private *ep = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	epic_pause(dev);</div><div class='ctx'> 	/* Put the chip into low-power mode. */</div><div class='del'>-	outl(0x0008, ioaddr + GENCTL);</div><div class='add'>+	ew32(GENCTL, 0x0008);</div><div class='ctx'> 	/* pci_power_off(pdev, -1); */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/smsc/smsc911x.c b/drivers/net/ethernet/smsc/smsc911x.c<br/>index cd3defb11ffb..1466e5d2af44 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/smsc/smsc911x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/smsc/smsc911x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/smsc/smsc911x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/smsc/smsc911x.c</a></div><div class='hunk'>@@ -2066,6 +2066,7 @@ static const struct ethtool_ops smsc911x_ethtool_ops = {</div><div class='ctx'> 	.get_eeprom_len = smsc911x_ethtool_get_eeprom_len,</div><div class='ctx'> 	.get_eeprom = smsc911x_ethtool_get_eeprom,</div><div class='ctx'> 	.set_eeprom = smsc911x_ethtool_set_eeprom,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops smsc911x_netdev_ops = {</div><div class='hunk'>@@ -2389,11 +2390,11 @@ static int __devinit smsc911x_drv_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	retval = smsc911x_request_resources(pdev);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		goto out_return_resources;</div><div class='add'>+		goto out_request_resources_fail;</div><div class='ctx'> </div><div class='ctx'> 	retval = smsc911x_enable_resources(pdev);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		goto out_disable_resources;</div><div class='add'>+		goto out_enable_resources_fail;</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;ioaddr == NULL) {</div><div class='ctx'> 		SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");</div><div class='hunk'>@@ -2500,8 +2501,9 @@ out_free_irq:</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> out_disable_resources:</div><div class='ctx'> 	(void)smsc911x_disable_resources(pdev);</div><div class='del'>-out_return_resources:</div><div class='add'>+out_enable_resources_fail:</div><div class='ctx'> 	smsc911x_free_resources(pdev);</div><div class='add'>+out_request_resources_fail:</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> 	iounmap(pdata-&gt;ioaddr);</div><div class='ctx'> 	free_netdev(dev);</div><div class='head'>diff --git a/drivers/net/ethernet/smsc/smsc9420.c b/drivers/net/ethernet/smsc/smsc9420.c<br/>index 38386478532b..fd33b21f6c96 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/smsc/smsc9420.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/smsc/smsc9420.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/smsc/smsc9420.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/smsc/smsc9420.c</a></div><div class='hunk'>@@ -54,7 +54,7 @@ struct smsc9420_ring_info {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct smsc9420_pdata {</div><div class='del'>-	void __iomem *base_addr;</div><div class='add'>+	void __iomem *ioaddr;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> </div><div class='hunk'>@@ -114,13 +114,13 @@ do {	if ((pd)-&gt;msg_enable &amp; NETIF_MSG_##TYPE) \</div><div class='ctx'> </div><div class='ctx'> static inline u32 smsc9420_reg_read(struct smsc9420_pdata *pd, u32 offset)</div><div class='ctx'> {</div><div class='del'>-	return ioread32(pd-&gt;base_addr + offset);</div><div class='add'>+	return ioread32(pd-&gt;ioaddr + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='ctx'> smsc9420_reg_write(struct smsc9420_pdata *pd, u32 offset, u32 value)</div><div class='ctx'> {</div><div class='del'>-	iowrite32(value, pd-&gt;base_addr + offset);</div><div class='add'>+	iowrite32(value, pd-&gt;ioaddr + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void smsc9420_pci_flush_write(struct smsc9420_pdata *pd)</div><div class='hunk'>@@ -469,6 +469,7 @@ static const struct ethtool_ops smsc9420_ethtool_ops = {</div><div class='ctx'> 	.set_eeprom = smsc9420_ethtool_set_eeprom,</div><div class='ctx'> 	.get_regs_len = smsc9420_ethtool_getregslen,</div><div class='ctx'> 	.get_regs = smsc9420_ethtool_getregs,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Sets the device MAC address to dev_addr */</div><div class='hunk'>@@ -659,7 +660,7 @@ static irqreturn_t smsc9420_isr(int irq, void *dev_id)</div><div class='ctx'> 	ulong flags;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!pd);</div><div class='del'>-	BUG_ON(!pd-&gt;base_addr);</div><div class='add'>+	BUG_ON(!pd-&gt;ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	int_cfg = smsc9420_reg_read(pd, INT_CFG);</div><div class='ctx'> </div><div class='hunk'>@@ -720,9 +721,12 @@ static irqreturn_t smsc9420_isr(int irq, void *dev_id)</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> static void smsc9420_poll_controller(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='add'>+	struct smsc9420_pdata *pd = netdev_priv(dev);</div><div class='add'>+	const int irq = pd-&gt;pdev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	disable_irq(irq);</div><div class='ctx'> 	smsc9420_isr(0, dev);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_NET_POLL_CONTROLLER */</div><div class='ctx'> </div><div class='hunk'>@@ -759,7 +763,7 @@ static int smsc9420_stop(struct net_device *dev)</div><div class='ctx'> 	smsc9420_stop_rx(pd);</div><div class='ctx'> 	smsc9420_free_rx_ring(pd);</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, pd);</div><div class='add'>+	free_irq(pd-&gt;pdev-&gt;irq, pd);</div><div class='ctx'> </div><div class='ctx'> 	smsc9420_dmac_soft_reset(pd);</div><div class='ctx'> </div><div class='hunk'>@@ -1331,15 +1335,12 @@ out:</div><div class='ctx'> </div><div class='ctx'> static int smsc9420_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct smsc9420_pdata *pd;</div><div class='add'>+	struct smsc9420_pdata *pd = netdev_priv(dev);</div><div class='ctx'> 	u32 bus_mode, mac_cr, dmac_control, int_cfg, dma_intr_ena, int_ctl;</div><div class='add'>+	const int irq = pd-&gt;pdev-&gt;irq;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int result = 0, timeout;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!dev);</div><div class='del'>-	pd = netdev_priv(dev);</div><div class='del'>-	BUG_ON(!pd);</div><div class='del'>-</div><div class='ctx'> 	if (!is_valid_ether_addr(dev-&gt;dev_addr)) {</div><div class='ctx'> 		smsc_warn(IFUP, "dev_addr is not a valid MAC address");</div><div class='ctx'> 		result = -EADDRNOTAVAIL;</div><div class='hunk'>@@ -1358,9 +1359,10 @@ static int smsc9420_open(struct net_device *dev)</div><div class='ctx'> 	smsc9420_reg_write(pd, INT_STAT, 0xFFFFFFFF);</div><div class='ctx'> 	smsc9420_pci_flush_write(pd);</div><div class='ctx'> </div><div class='del'>-	if (request_irq(dev-&gt;irq, smsc9420_isr, IRQF_SHARED | IRQF_DISABLED,</div><div class='del'>-			DRV_NAME, pd)) {</div><div class='del'>-		smsc_warn(IFUP, "Unable to use IRQ = %d", dev-&gt;irq);</div><div class='add'>+	result = request_irq(irq, smsc9420_isr, IRQF_SHARED | IRQF_DISABLED,</div><div class='add'>+			     DRV_NAME, pd);</div><div class='add'>+	if (result) {</div><div class='add'>+		smsc_warn(IFUP, "Unable to use IRQ = %d", irq);</div><div class='ctx'> 		result = -ENODEV;</div><div class='ctx'> 		goto out_0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1395,7 +1397,7 @@ static int smsc9420_open(struct net_device *dev)</div><div class='ctx'> 	smsc9420_pci_flush_write(pd);</div><div class='ctx'> </div><div class='ctx'> 	/* test the IRQ connection to the ISR */</div><div class='del'>-	smsc_dbg(IFUP, "Testing ISR using IRQ %d", dev-&gt;irq);</div><div class='add'>+	smsc_dbg(IFUP, "Testing ISR using IRQ %d", irq);</div><div class='ctx'> 	pd-&gt;software_irq_signal = false;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;pd-&gt;int_lock, flags);</div><div class='hunk'>@@ -1430,7 +1432,7 @@ static int smsc9420_open(struct net_device *dev)</div><div class='ctx'> 		goto out_free_irq_1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	smsc_dbg(IFUP, "ISR passed test using IRQ %d", dev-&gt;irq);</div><div class='add'>+	smsc_dbg(IFUP, "ISR passed test using IRQ %d", irq);</div><div class='ctx'> </div><div class='ctx'> 	result = smsc9420_alloc_tx_ring(pd);</div><div class='ctx'> 	if (result) {</div><div class='hunk'>@@ -1490,7 +1492,7 @@ out_free_rx_ring_3:</div><div class='ctx'> out_free_tx_ring_2:</div><div class='ctx'> 	smsc9420_free_tx_ring(pd);</div><div class='ctx'> out_free_irq_1:</div><div class='del'>-	free_irq(dev-&gt;irq, pd);</div><div class='add'>+	free_irq(irq, pd);</div><div class='ctx'> out_0:</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='hunk'>@@ -1519,7 +1521,7 @@ static int smsc9420_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> 		smsc9420_stop_rx(pd);</div><div class='ctx'> 		smsc9420_free_rx_ring(pd);</div><div class='ctx'> </div><div class='del'>-		free_irq(dev-&gt;irq, pd);</div><div class='add'>+		free_irq(pd-&gt;pdev-&gt;irq, pd);</div><div class='ctx'> </div><div class='ctx'> 		netif_device_detach(dev);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1552,6 +1554,7 @@ static int smsc9420_resume(struct pci_dev *pdev)</div><div class='ctx'> 		smsc_warn(IFUP, "pci_enable_wake failed: %d", err);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='add'>+		/* FIXME: gross. It looks like ancient PM relic.*/</div><div class='ctx'> 		err = smsc9420_open(dev);</div><div class='ctx'> 		netif_device_attach(dev);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1625,8 +1628,6 @@ smsc9420_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	/* registers are double mapped with 0 offset for LE and 0x200 for BE */</div><div class='ctx'> 	virt_addr += LAN9420_CPSR_ENDIAN_OFFSET;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = (ulong)virt_addr;</div><div class='del'>-</div><div class='ctx'> 	pd = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* pci descriptors are created in the PCI consistent area */</div><div class='hunk'>@@ -1646,7 +1647,7 @@ smsc9420_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	pd-&gt;pdev = pdev;</div><div class='ctx'> 	pd-&gt;dev = dev;</div><div class='del'>-	pd-&gt;base_addr = virt_addr;</div><div class='add'>+	pd-&gt;ioaddr = virt_addr;</div><div class='ctx'> 	pd-&gt;msg_enable = smsc_debug;</div><div class='ctx'> 	pd-&gt;rx_csum = true;</div><div class='ctx'> </div><div class='hunk'>@@ -1669,7 +1670,6 @@ smsc9420_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;smsc9420_netdev_ops;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;smsc9420_ethtool_ops;</div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> </div><div class='ctx'> 	netif_napi_add(dev, &amp;pd-&gt;napi, smsc9420_rx_poll, NAPI_WEIGHT);</div><div class='ctx'> </div><div class='hunk'>@@ -1727,7 +1727,7 @@ static void __devexit smsc9420_remove(struct pci_dev *pdev)</div><div class='ctx'> 	pci_free_consistent(pdev, sizeof(struct smsc9420_dma_desc) *</div><div class='ctx'> 		(RX_RING_SIZE + TX_RING_SIZE), pd-&gt;rx_ring, pd-&gt;rx_dma_addr);</div><div class='ctx'> </div><div class='del'>-	iounmap(pd-&gt;base_addr - LAN9420_CPSR_ENDIAN_OFFSET);</div><div class='add'>+	iounmap(pd-&gt;ioaddr - LAN9420_CPSR_ENDIAN_OFFSET);</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h<br/>index 0319d640f728..bcd54d6e94fd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/common.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/common.h</a></div><div class='hunk'>@@ -97,6 +97,16 @@ struct stmmac_extra_stats {</div><div class='ctx'> 	unsigned long normal_irq_n;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* CSR Frequency Access Defines*/</div><div class='add'>+#define CSR_F_35M	35000000</div><div class='add'>+#define CSR_F_60M	60000000</div><div class='add'>+#define CSR_F_100M	100000000</div><div class='add'>+#define CSR_F_150M	150000000</div><div class='add'>+#define CSR_F_250M	250000000</div><div class='add'>+#define CSR_F_300M	300000000</div><div class='add'>+</div><div class='add'>+#define	MAC_CSR_H_FRQ_MASK	0x20</div><div class='add'>+</div><div class='ctx'> #define HASH_TABLE_SIZE 64</div><div class='ctx'> #define PAUSE_TIME 0x200</div><div class='ctx'> </div><div class='hunk'>@@ -137,6 +147,7 @@ struct stmmac_extra_stats {</div><div class='ctx'> #define DMA_HW_FEAT_FLEXIPPSEN	0x04000000 /* Flexible PPS Output */</div><div class='ctx'> #define DMA_HW_FEAT_SAVLANINS	0x08000000 /* Source Addr or VLAN Insertion */</div><div class='ctx'> #define DMA_HW_FEAT_ACTPHYIF	0x70000000 /* Active/selected PHY interface */</div><div class='add'>+#define DEFAULT_DMA_PBL		8</div><div class='ctx'> </div><div class='ctx'> enum rx_frame_status { /* IPC status */</div><div class='ctx'> 	good_frame = 0,</div><div class='hunk'>@@ -228,7 +239,7 @@ struct stmmac_desc_ops {</div><div class='ctx'> 	int (*get_rx_owner) (struct dma_desc *p);</div><div class='ctx'> 	void (*set_rx_owner) (struct dma_desc *p);</div><div class='ctx'> 	/* Get the receive frame size */</div><div class='del'>-	int (*get_rx_frame_len) (struct dma_desc *p);</div><div class='add'>+	int (*get_rx_frame_len) (struct dma_desc *p, int rx_coe_type);</div><div class='ctx'> 	/* Return the reception status looking at the RDES1 */</div><div class='ctx'> 	int (*rx_status) (void *data, struct stmmac_extra_stats *x,</div><div class='ctx'> 			  struct dma_desc *p);</div><div class='hunk'>@@ -236,7 +247,8 @@ struct stmmac_desc_ops {</div><div class='ctx'> </div><div class='ctx'> struct stmmac_dma_ops {</div><div class='ctx'> 	/* DMA core initialization */</div><div class='del'>-	int (*init) (void __iomem *ioaddr, int pbl, u32 dma_tx, u32 dma_rx);</div><div class='add'>+	int (*init) (void __iomem *ioaddr, int pbl, int fb, int mb,</div><div class='add'>+		     int burst_len, u32 dma_tx, u32 dma_rx);</div><div class='ctx'> 	/* Dump DMA registers */</div><div class='ctx'> 	void (*dump_regs) (void __iomem *ioaddr);</div><div class='ctx'> 	/* Set tx/rx threshold in the csr6 register</div><div class='hunk'>@@ -261,14 +273,14 @@ struct stmmac_dma_ops {</div><div class='ctx'> struct stmmac_ops {</div><div class='ctx'> 	/* MAC core initialization */</div><div class='ctx'> 	void (*core_init) (void __iomem *ioaddr) ____cacheline_aligned;</div><div class='del'>-	/* Support checksum offload engine */</div><div class='del'>-	int  (*rx_coe) (void __iomem *ioaddr);</div><div class='add'>+	/* Enable and verify that the IPC module is supported */</div><div class='add'>+	int (*rx_ipc) (void __iomem *ioaddr);</div><div class='ctx'> 	/* Dump MAC registers */</div><div class='ctx'> 	void (*dump_regs) (void __iomem *ioaddr);</div><div class='ctx'> 	/* Handle extra events on specific interrupts hw dependent */</div><div class='ctx'> 	void (*host_irq_status) (void __iomem *ioaddr);</div><div class='ctx'> 	/* Multicast filter setting */</div><div class='del'>-	void (*set_filter) (struct net_device *dev);</div><div class='add'>+	void (*set_filter) (struct net_device *dev, int id);</div><div class='ctx'> 	/* Flow control setting */</div><div class='ctx'> 	void (*flow_ctrl) (void __iomem *ioaddr, unsigned int duplex,</div><div class='ctx'> 			   unsigned int fc, unsigned int pause_time);</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h<br/>index cfcef0ea0fa5..23478bf4ed7a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/dwmac1000.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac1000.h</a></div><div class='hunk'>@@ -61,9 +61,11 @@ enum power_event {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* GMAC HW ADDR regs */</div><div class='del'>-#define GMAC_ADDR_HIGH(reg)		(0x00000040+(reg * 8))</div><div class='del'>-#define GMAC_ADDR_LOW(reg)		(0x00000044+(reg * 8))</div><div class='del'>-#define GMAC_MAX_UNICAST_ADDRESSES	16</div><div class='add'>+#define GMAC_ADDR_HIGH(reg)	(((reg &gt; 15) ? 0x00000800 : 0x00000040) + \</div><div class='add'>+				(reg * 8))</div><div class='add'>+#define GMAC_ADDR_LOW(reg)	(((reg &gt; 15) ? 0x00000804 : 0x00000044) + \</div><div class='add'>+				(reg * 8))</div><div class='add'>+#define GMAC_MAX_PERFECT_ADDRESSES	32</div><div class='ctx'> </div><div class='ctx'> #define GMAC_AN_CTRL	0x000000c0	/* AN control */</div><div class='ctx'> #define GMAC_AN_STATUS	0x000000c4	/* AN status */</div><div class='hunk'>@@ -139,10 +141,11 @@ enum rx_tx_priority_ratio {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define DMA_BUS_MODE_FB		0x00010000	/* Fixed burst */</div><div class='add'>+#define DMA_BUS_MODE_MB		0x04000000	/* Mixed burst */</div><div class='ctx'> #define DMA_BUS_MODE_RPBL_MASK	0x003e0000	/* Rx-Programmable Burst Len */</div><div class='ctx'> #define DMA_BUS_MODE_RPBL_SHIFT	17</div><div class='ctx'> #define DMA_BUS_MODE_USP	0x00800000</div><div class='del'>-#define DMA_BUS_MODE_4PBL	0x01000000</div><div class='add'>+#define DMA_BUS_MODE_PBL	0x01000000</div><div class='ctx'> #define DMA_BUS_MODE_AAL	0x02000000</div><div class='ctx'> </div><div class='ctx'> /* DMA CRS Control and Status Register Mapping */</div><div class='hunk'>@@ -205,4 +208,7 @@ enum rtc_control {</div><div class='ctx'> #define GMAC_MMC_TX_INTR   0x108</div><div class='ctx'> #define GMAC_MMC_RX_CSUM_OFFLOAD   0x208</div><div class='ctx'> </div><div class='add'>+/* Synopsys Core versions */</div><div class='add'>+#define	DWMAC_CORE_3_40	34</div><div class='add'>+</div><div class='ctx'> extern const struct stmmac_dma_ops dwmac1000_dma_ops;</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c<br/>index b1c48b975945..b5e4d02f15c9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c</a></div><div class='hunk'>@@ -46,7 +46,7 @@ static void dwmac1000_core_init(void __iomem *ioaddr)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dwmac1000_rx_coe_supported(void __iomem *ioaddr)</div><div class='add'>+static int dwmac1000_rx_ipc_enable(void __iomem *ioaddr)</div><div class='ctx'> {</div><div class='ctx'> 	u32 value = readl(ioaddr + GMAC_CONTROL);</div><div class='ctx'> </div><div class='hunk'>@@ -84,10 +84,11 @@ static void dwmac1000_get_umac_addr(void __iomem *ioaddr, unsigned char *addr,</div><div class='ctx'> 				GMAC_ADDR_LOW(reg_n));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwmac1000_set_filter(struct net_device *dev)</div><div class='add'>+static void dwmac1000_set_filter(struct net_device *dev, int id)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr = (void __iomem *) dev-&gt;base_addr;</div><div class='ctx'> 	unsigned int value = 0;</div><div class='add'>+	unsigned int perfect_addr_number;</div><div class='ctx'> </div><div class='ctx'> 	CHIP_DBG(KERN_INFO "%s: # mcasts %d, # unicast %d\n",</div><div class='ctx'> 		 __func__, netdev_mc_count(dev), netdev_uc_count(dev));</div><div class='hunk'>@@ -121,8 +122,14 @@ static void dwmac1000_set_filter(struct net_device *dev)</div><div class='ctx'> 		writel(mc_filter[1], ioaddr + GMAC_HASH_HIGH);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Extra 16 regs are available in cores newer than the 3.40. */</div><div class='add'>+	if (id &gt; DWMAC_CORE_3_40)</div><div class='add'>+		perfect_addr_number = GMAC_MAX_PERFECT_ADDRESSES;</div><div class='add'>+	else</div><div class='add'>+		perfect_addr_number = GMAC_MAX_PERFECT_ADDRESSES / 2;</div><div class='add'>+</div><div class='ctx'> 	/* Handle multiple unicast addresses (perfect filtering)*/</div><div class='del'>-	if (netdev_uc_count(dev) &gt; GMAC_MAX_UNICAST_ADDRESSES)</div><div class='add'>+	if (netdev_uc_count(dev) &gt; perfect_addr_number)</div><div class='ctx'> 		/* Switch to promiscuous mode is more than 16 addrs</div><div class='ctx'> 		   are required */</div><div class='ctx'> 		value |= GMAC_FRAME_FILTER_PR;</div><div class='hunk'>@@ -211,7 +218,7 @@ static void dwmac1000_irq_status(void __iomem *ioaddr)</div><div class='ctx'> </div><div class='ctx'> static const struct stmmac_ops dwmac1000_ops = {</div><div class='ctx'> 	.core_init = dwmac1000_core_init,</div><div class='del'>-	.rx_coe = dwmac1000_rx_coe_supported,</div><div class='add'>+	.rx_ipc = dwmac1000_rx_ipc_enable,</div><div class='ctx'> 	.dump_regs = dwmac1000_dump_regs,</div><div class='ctx'> 	.host_irq_status = dwmac1000_irq_status,</div><div class='ctx'> 	.set_filter = dwmac1000_set_filter,</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c<br/>index 4d5402a1d262..033500090f55 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c</a></div><div class='hunk'>@@ -30,8 +30,8 @@</div><div class='ctx'> #include "dwmac1000.h"</div><div class='ctx'> #include "dwmac_dma.h"</div><div class='ctx'> </div><div class='del'>-static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx,</div><div class='del'>-			      u32 dma_rx)</div><div class='add'>+static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, int fb,</div><div class='add'>+			      int mb, int burst_len, u32 dma_tx, u32 dma_rx)</div><div class='ctx'> {</div><div class='ctx'> 	u32 value = readl(ioaddr + DMA_BUS_MODE);</div><div class='ctx'> 	int limit;</div><div class='hunk'>@@ -48,15 +48,51 @@ static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx,</div><div class='ctx'> 	if (limit &lt; 0)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	value = /* DMA_BUS_MODE_FB | */ DMA_BUS_MODE_4PBL |</div><div class='del'>-	    ((pbl &lt;&lt; DMA_BUS_MODE_PBL_SHIFT) |</div><div class='del'>-	     (pbl &lt;&lt; DMA_BUS_MODE_RPBL_SHIFT));</div><div class='add'>+	/*</div><div class='add'>+	 * Set the DMA PBL (Programmable Burst Length) mode</div><div class='add'>+	 * Before stmmac core 3.50 this mode bit was 4xPBL, and</div><div class='add'>+	 * post 3.5 mode bit acts as 8*PBL.</div><div class='add'>+	 * For core rev &lt; 3.5, when the core is set for 4xPBL mode, the</div><div class='add'>+	 * DMA transfers the data in 4, 8, 16, 32, 64 &amp; 128 beats</div><div class='add'>+	 * depending on pbl value.</div><div class='add'>+	 * For core rev &gt; 3.5, when the core is set for 8xPBL mode, the</div><div class='add'>+	 * DMA transfers the data in 8, 16, 32, 64, 128 &amp; 256 beats</div><div class='add'>+	 * depending on pbl value.</div><div class='add'>+	 */</div><div class='add'>+	value = DMA_BUS_MODE_PBL | ((pbl &lt;&lt; DMA_BUS_MODE_PBL_SHIFT) |</div><div class='add'>+		(pbl &lt;&lt; DMA_BUS_MODE_RPBL_SHIFT));</div><div class='add'>+</div><div class='add'>+	/* Set the Fixed burst mode */</div><div class='add'>+	if (fb)</div><div class='add'>+		value |= DMA_BUS_MODE_FB;</div><div class='add'>+</div><div class='add'>+	/* Mixed Burst has no effect when fb is set */</div><div class='add'>+	if (mb)</div><div class='add'>+		value |= DMA_BUS_MODE_MB;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_STMMAC_DA</div><div class='ctx'> 	value |= DMA_BUS_MODE_DA;	/* Rx has priority over tx */</div><div class='ctx'> #endif</div><div class='ctx'> 	writel(value, ioaddr + DMA_BUS_MODE);</div><div class='ctx'> </div><div class='add'>+	/* In case of GMAC AXI configuration, program the DMA_AXI_BUS_MODE</div><div class='add'>+	 * for supported bursts.</div><div class='add'>+	 *</div><div class='add'>+	 * Note: This is applicable only for revision GMACv3.61a. For</div><div class='add'>+	 * older version this register is reserved and shall have no</div><div class='add'>+	 * effect.</div><div class='add'>+	 *</div><div class='add'>+	 * Note:</div><div class='add'>+	 *  For Fixed Burst Mode: if we directly write 0xFF to this</div><div class='add'>+	 *  register using the configurations pass from platform code,</div><div class='add'>+	 *  this would ensure that all bursts supported by core are set</div><div class='add'>+	 *  and those which are not supported would remain ineffective.</div><div class='add'>+	 *</div><div class='add'>+	 *  For Non Fixed Burst Mode: provide the maximum value of the</div><div class='add'>+	 *  burst length. Any burst equal or below the provided burst</div><div class='add'>+	 *  length would be allowed to perform. */</div><div class='add'>+	writel(burst_len, ioaddr + DMA_AXI_BUS_MODE);</div><div class='add'>+</div><div class='ctx'> 	/* Mask interrupts by writing to CSR7 */</div><div class='ctx'> 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c<br/>index 138fb8dd1e87..19e0f4eed2bc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c</a></div><div class='hunk'>@@ -43,11 +43,6 @@ static void dwmac100_core_init(void __iomem *ioaddr)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dwmac100_rx_coe_supported(void __iomem *ioaddr)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void dwmac100_dump_mac_regs(void __iomem *ioaddr)</div><div class='ctx'> {</div><div class='ctx'> 	pr_info("\t----------------------------------------------\n"</div><div class='hunk'>@@ -72,6 +67,11 @@ static void dwmac100_dump_mac_regs(void __iomem *ioaddr)</div><div class='ctx'> 		readl(ioaddr + MAC_VLAN2));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int dwmac100_rx_ipc_enable(void __iomem *ioaddr)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void dwmac100_irq_status(void __iomem *ioaddr)</div><div class='ctx'> {</div><div class='ctx'> 	return;</div><div class='hunk'>@@ -89,7 +89,7 @@ static void dwmac100_get_umac_addr(void __iomem *ioaddr, unsigned char *addr,</div><div class='ctx'> 	stmmac_get_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwmac100_set_filter(struct net_device *dev)</div><div class='add'>+static void dwmac100_set_filter(struct net_device *dev, int id)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr = (void __iomem *) dev-&gt;base_addr;</div><div class='ctx'> 	u32 value = readl(ioaddr + MAC_CONTROL);</div><div class='hunk'>@@ -160,7 +160,7 @@ static void dwmac100_pmt(void __iomem *ioaddr, unsigned long mode)</div><div class='ctx'> </div><div class='ctx'> static const struct stmmac_ops dwmac100_ops = {</div><div class='ctx'> 	.core_init = dwmac100_core_init,</div><div class='del'>-	.rx_coe = dwmac100_rx_coe_supported,</div><div class='add'>+	.rx_ipc = dwmac100_rx_ipc_enable,</div><div class='ctx'> 	.dump_regs = dwmac100_dump_mac_regs,</div><div class='ctx'> 	.host_irq_status = dwmac100_irq_status,</div><div class='ctx'> 	.set_filter = dwmac100_set_filter,</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c<br/>index bc17fd08b55d..c2b4d55a79b6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c</a></div><div class='hunk'>@@ -32,8 +32,8 @@</div><div class='ctx'> #include "dwmac100.h"</div><div class='ctx'> #include "dwmac_dma.h"</div><div class='ctx'> </div><div class='del'>-static int dwmac100_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx,</div><div class='del'>-			     u32 dma_rx)</div><div class='add'>+static int dwmac100_dma_init(void __iomem *ioaddr, int pbl, int fb,</div><div class='add'>+			     int mb, int burst_len, u32 dma_tx, u32 dma_rx)</div><div class='ctx'> {</div><div class='ctx'> 	u32 value = readl(ioaddr + DMA_BUS_MODE);</div><div class='ctx'> 	int limit;</div><div class='hunk'>@@ -52,7 +52,7 @@ static int dwmac100_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx,</div><div class='ctx'> </div><div class='ctx'> 	/* Enable Application Access by writing to DMA CSR0 */</div><div class='ctx'> 	writel(DMA_BUS_MODE_DEFAULT | (pbl &lt;&lt; DMA_BUS_MODE_PBL_SHIFT),</div><div class='del'>-	       ioaddr + DMA_BUS_MODE);</div><div class='add'>+			ioaddr + DMA_BUS_MODE);</div><div class='ctx'> </div><div class='ctx'> 	/* Mask interrupts by writing to CSR7 */</div><div class='ctx'> 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h<br/>index 437edacd602e..6e0360f9cfde 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> #define DMA_CONTROL		0x00001018	/* Ctrl (Operational Mode) */</div><div class='ctx'> #define DMA_INTR_ENA		0x0000101c	/* Interrupt Enable */</div><div class='ctx'> #define DMA_MISSED_FRAME_CTR	0x00001020	/* Missed Frame Counter */</div><div class='add'>+#define DMA_AXI_BUS_MODE       0x00001028      /* AXI Bus Mode */</div><div class='ctx'> #define DMA_CUR_TX_BUF_ADDR	0x00001050	/* Current Host Tx Buffer */</div><div class='ctx'> #define DMA_CUR_RX_BUF_ADDR	0x00001054	/* Current Host Rx Buffer */</div><div class='ctx'> #define DMA_HW_FEATURE		0x00001058	/* HW Feature Register */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c<br/>index f20aa12931d0..4e0e18a44fcc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c</a></div><div class='hunk'>@@ -31,6 +31,8 @@</div><div class='ctx'> #define DWMAC_LIB_DBG(fmt, args...)  do { } while (0)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define GMAC_HI_REG_AE		0x80000000</div><div class='add'>+</div><div class='ctx'> /* CSR1 enables the transmit DMA to check for new descriptor */</div><div class='ctx'> void dwmac_enable_dma_transmission(void __iomem *ioaddr)</div><div class='ctx'> {</div><div class='hunk'>@@ -233,7 +235,11 @@ void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6],</div><div class='ctx'> 	unsigned long data;</div><div class='ctx'> </div><div class='ctx'> 	data = (addr[5] &lt;&lt; 8) | addr[4];</div><div class='del'>-	writel(data, ioaddr + high);</div><div class='add'>+	/* For MAC Addr registers se have to set the Address Enable (AE)</div><div class='add'>+	 * bit that has no effect on the High Reg 0 where the bit 31 (MO)</div><div class='add'>+	 * is RO.</div><div class='add'>+	 */</div><div class='add'>+	writel(data | GMAC_HI_REG_AE, ioaddr + high);</div><div class='ctx'> 	data = (addr[3] &lt;&lt; 24) | (addr[2] &lt;&lt; 16) | (addr[1] &lt;&lt; 8) | addr[0];</div><div class='ctx'> 	writel(data, ioaddr + low);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c<br/>index ad1b627f8ec2..2fc8ef95f97a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/enh_desc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/enh_desc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/enh_desc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/enh_desc.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'>   Author: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;</div><div class='ctx'> *******************************************************************************/</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/stmmac.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include "descs_com.h"</div><div class='ctx'> </div><div class='hunk'>@@ -309,9 +310,17 @@ static void enh_desc_close_tx_desc(struct dma_desc *p)</div><div class='ctx'> 	p-&gt;des01.etx.interrupt = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int enh_desc_get_rx_frame_len(struct dma_desc *p)</div><div class='add'>+static int enh_desc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type)</div><div class='ctx'> {</div><div class='del'>-	return p-&gt;des01.erx.frame_length;</div><div class='add'>+	/* The type-1 checksum offload engines append the checksum at</div><div class='add'>+	 * the end of frame and the two bytes of checksum are added in</div><div class='add'>+	 * the length.</div><div class='add'>+	 * Adjust for that in the framelen for type-1 checksum offload</div><div class='add'>+	 * engines. */</div><div class='add'>+	if (rx_coe_type == STMMAC_RX_COE_TYPE1)</div><div class='add'>+		return p-&gt;des01.erx.frame_length - 2;</div><div class='add'>+	else</div><div class='add'>+		return p-&gt;des01.erx.frame_length;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct stmmac_desc_ops enh_desc_ops = {</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c<br/>index 25953bb45a73..68962c549a2d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/norm_desc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/norm_desc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/norm_desc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/norm_desc.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'>   Author: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;</div><div class='ctx'> *******************************************************************************/</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/stmmac.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include "descs_com.h"</div><div class='ctx'> </div><div class='hunk'>@@ -201,9 +202,17 @@ static void ndesc_close_tx_desc(struct dma_desc *p)</div><div class='ctx'> 	p-&gt;des01.tx.interrupt = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ndesc_get_rx_frame_len(struct dma_desc *p)</div><div class='add'>+static int ndesc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type)</div><div class='ctx'> {</div><div class='del'>-	return p-&gt;des01.rx.frame_length;</div><div class='add'>+	/* The type-1 checksum offload engines append the checksum at</div><div class='add'>+	 * the end of frame and the two bytes of checksum are added in</div><div class='add'>+	 * the length.</div><div class='add'>+	 * Adjust for that in the framelen for type-1 checksum offload</div><div class='add'>+	 * engines. */</div><div class='add'>+	if (rx_coe_type == STMMAC_RX_COE_TYPE1)</div><div class='add'>+		return p-&gt;des01.rx.frame_length - 2;</div><div class='add'>+	else</div><div class='add'>+		return p-&gt;des01.rx.frame_length;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct stmmac_desc_ops ndesc_ops = {</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h<br/>index b4b095fdcf29..6b5d060ee9de 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/stmmac.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/stmmac.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/stmmac.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/stmmac.h</a></div><div class='hunk'>@@ -21,7 +21,9 @@</div><div class='ctx'> *******************************************************************************/</div><div class='ctx'> </div><div class='ctx'> #define STMMAC_RESOURCE_NAME   "stmmaceth"</div><div class='del'>-#define DRV_MODULE_VERSION	"Feb_2012"</div><div class='add'>+#define DRV_MODULE_VERSION	"March_2012"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/stmmac.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='hunk'>@@ -56,8 +58,6 @@ struct stmmac_priv {</div><div class='ctx'> </div><div class='ctx'> 	struct stmmac_extra_stats xstats;</div><div class='ctx'> 	struct napi_struct napi;</div><div class='del'>-</div><div class='del'>-	int rx_coe;</div><div class='ctx'> 	int no_csum_insertion;</div><div class='ctx'> </div><div class='ctx'> 	struct phy_device *phydev;</div><div class='hunk'>@@ -81,6 +81,11 @@ struct stmmac_priv {</div><div class='ctx'> 	struct stmmac_counters mmc;</div><div class='ctx'> 	struct dma_features dma_cap;</div><div class='ctx'> 	int hw_cap_support;</div><div class='add'>+#ifdef CONFIG_HAVE_CLK</div><div class='add'>+	struct clk *stmmac_clk;</div><div class='add'>+#endif</div><div class='add'>+	int clk_csr;</div><div class='add'>+	int synopsys_id;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern int phyaddr;</div><div class='hunk'>@@ -99,3 +104,42 @@ int stmmac_dvr_remove(struct net_device *ndev);</div><div class='ctx'> struct stmmac_priv *stmmac_dvr_probe(struct device *device,</div><div class='ctx'> 				     struct plat_stmmacenet_data *plat_dat,</div><div class='ctx'> 				     void __iomem *addr);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_HAVE_CLK</div><div class='add'>+static inline int stmmac_clk_enable(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!IS_ERR(priv-&gt;stmmac_clk))</div><div class='add'>+		return clk_enable(priv-&gt;stmmac_clk);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void stmmac_clk_disable(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (IS_ERR(priv-&gt;stmmac_clk))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	clk_disable(priv-&gt;stmmac_clk);</div><div class='add'>+}</div><div class='add'>+static inline int stmmac_clk_get(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;stmmac_clk = clk_get(priv-&gt;device, NULL);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(priv-&gt;stmmac_clk))</div><div class='add'>+		return PTR_ERR(priv-&gt;stmmac_clk);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline int stmmac_clk_enable(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+static inline void stmmac_clk_disable(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+static inline int stmmac_clk_get(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_HAVE_CLK */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c<br/>index f98e1511660f..ce431846fc6f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c</a></div><div class='hunk'>@@ -481,6 +481,7 @@ static const struct ethtool_ops stmmac_ethtool_ops = {</div><div class='ctx'> 	.get_wol = stmmac_get_wol,</div><div class='ctx'> 	.set_wol = stmmac_set_wol,</div><div class='ctx'> 	.get_sset_count	= stmmac_get_sset_count,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void stmmac_set_ethtool_ops(struct net_device *netdev)</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c<br/>index 48d56da62f08..70966330f44e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/stmmac_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/stmmac_main.c</a></div><div class='hunk'>@@ -163,6 +163,38 @@ static void stmmac_verify_args(void)</div><div class='ctx'> 		pause = PAUSE_TIME;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void stmmac_clk_csr_set(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_HAVE_CLK</div><div class='add'>+	u32 clk_rate;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(priv-&gt;stmmac_clk))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	clk_rate = clk_get_rate(priv-&gt;stmmac_clk);</div><div class='add'>+</div><div class='add'>+	/* Platform provided default clk_csr would be assumed valid</div><div class='add'>+	 * for all other cases except for the below mentioned ones. */</div><div class='add'>+	if (!(priv-&gt;clk_csr &amp; MAC_CSR_H_FRQ_MASK)) {</div><div class='add'>+		if (clk_rate &lt; CSR_F_35M)</div><div class='add'>+			priv-&gt;clk_csr = STMMAC_CSR_20_35M;</div><div class='add'>+		else if ((clk_rate &gt;= CSR_F_35M) &amp;&amp; (clk_rate &lt; CSR_F_60M))</div><div class='add'>+			priv-&gt;clk_csr = STMMAC_CSR_35_60M;</div><div class='add'>+		else if ((clk_rate &gt;= CSR_F_60M) &amp;&amp; (clk_rate &lt; CSR_F_100M))</div><div class='add'>+			priv-&gt;clk_csr = STMMAC_CSR_60_100M;</div><div class='add'>+		else if ((clk_rate &gt;= CSR_F_100M) &amp;&amp; (clk_rate &lt; CSR_F_150M))</div><div class='add'>+			priv-&gt;clk_csr = STMMAC_CSR_100_150M;</div><div class='add'>+		else if ((clk_rate &gt;= CSR_F_150M) &amp;&amp; (clk_rate &lt; CSR_F_250M))</div><div class='add'>+			priv-&gt;clk_csr = STMMAC_CSR_150_250M;</div><div class='add'>+		else if ((clk_rate &gt;= CSR_F_250M) &amp;&amp; (clk_rate &lt; CSR_F_300M))</div><div class='add'>+			priv-&gt;clk_csr = STMMAC_CSR_250_300M;</div><div class='add'>+	} /* For values higher than the IEEE 802.3 specified frequency</div><div class='add'>+	   * we can not estimate the proper divider as it is not known</div><div class='add'>+	   * the frequency of clk_csr_i. So we do not change the default</div><div class='add'>+	   * divider. */</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)</div><div class='ctx'> static void print_pkt(unsigned char *buf, int len)</div><div class='ctx'> {</div><div class='hunk'>@@ -307,7 +339,13 @@ static int stmmac_init_phy(struct net_device *dev)</div><div class='ctx'> 	priv-&gt;speed = 0;</div><div class='ctx'> 	priv-&gt;oldduplex = -1;</div><div class='ctx'> </div><div class='del'>-	snprintf(bus_id, MII_BUS_ID_SIZE, "stmmac-%x", priv-&gt;plat-&gt;bus_id);</div><div class='add'>+	if (priv-&gt;plat-&gt;phy_bus_name)</div><div class='add'>+		snprintf(bus_id, MII_BUS_ID_SIZE, "%s-%x",</div><div class='add'>+				priv-&gt;plat-&gt;phy_bus_name, priv-&gt;plat-&gt;bus_id);</div><div class='add'>+	else</div><div class='add'>+		snprintf(bus_id, MII_BUS_ID_SIZE, "stmmac-%x",</div><div class='add'>+				priv-&gt;plat-&gt;bus_id);</div><div class='add'>+</div><div class='ctx'> 	snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,</div><div class='ctx'> 		 priv-&gt;plat-&gt;phy_addr);</div><div class='ctx'> 	pr_debug("stmmac_init_phy:  trying to attach to %s\n", phy_id);</div><div class='hunk'>@@ -884,6 +922,26 @@ static void stmmac_check_ether_addr(struct stmmac_priv *priv)</div><div class='ctx'> 						   priv-&gt;dev-&gt;dev_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int stmmac_init_dma_engine(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int pbl = DEFAULT_DMA_PBL, fixed_burst = 0, burst_len = 0;</div><div class='add'>+	int mixed_burst = 0;</div><div class='add'>+</div><div class='add'>+	/* Some DMA parameters can be passed from the platform;</div><div class='add'>+	 * in case of these are not passed we keep a default</div><div class='add'>+	 * (good for all the chips) and init the DMA! */</div><div class='add'>+	if (priv-&gt;plat-&gt;dma_cfg) {</div><div class='add'>+		pbl = priv-&gt;plat-&gt;dma_cfg-&gt;pbl;</div><div class='add'>+		fixed_burst = priv-&gt;plat-&gt;dma_cfg-&gt;fixed_burst;</div><div class='add'>+		mixed_burst = priv-&gt;plat-&gt;dma_cfg-&gt;mixed_burst;</div><div class='add'>+		burst_len = priv-&gt;plat-&gt;dma_cfg-&gt;burst_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return priv-&gt;hw-&gt;dma-&gt;init(priv-&gt;ioaddr, pbl, fixed_burst, mixed_burst,</div><div class='add'>+				   burst_len, priv-&gt;dma_tx_phy,</div><div class='add'>+				   priv-&gt;dma_rx_phy);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *  stmmac_open - open entry point of the driver</div><div class='ctx'>  *  @dev : pointer to the device structure.</div><div class='hunk'>@@ -898,16 +956,6 @@ static int stmmac_open(struct net_device *dev)</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	stmmac_check_ether_addr(priv);</div><div class='del'>-</div><div class='del'>-	/* MDIO bus Registration */</div><div class='del'>-	ret = stmmac_mdio_register(dev);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		pr_debug("%s: MDIO bus (id: %d) registration failed",</div><div class='del'>-			 __func__, priv-&gt;plat-&gt;bus_id);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_STMMAC_TIMER</div><div class='ctx'> 	priv-&gt;tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);</div><div class='ctx'> 	if (unlikely(priv-&gt;tm == NULL))</div><div class='hunk'>@@ -925,6 +973,10 @@ static int stmmac_open(struct net_device *dev)</div><div class='ctx'> 	} else</div><div class='ctx'> 		priv-&gt;tm-&gt;enable = 1;</div><div class='ctx'> #endif</div><div class='add'>+	stmmac_clk_enable(priv);</div><div class='add'>+</div><div class='add'>+	stmmac_check_ether_addr(priv);</div><div class='add'>+</div><div class='ctx'> 	ret = stmmac_init_phy(dev);</div><div class='ctx'> 	if (unlikely(ret)) {</div><div class='ctx'> 		pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);</div><div class='hunk'>@@ -938,8 +990,7 @@ static int stmmac_open(struct net_device *dev)</div><div class='ctx'> 	init_dma_desc_rings(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* DMA initialization and SW reset */</div><div class='del'>-	ret = priv-&gt;hw-&gt;dma-&gt;init(priv-&gt;ioaddr, priv-&gt;plat-&gt;pbl,</div><div class='del'>-				  priv-&gt;dma_tx_phy, priv-&gt;dma_rx_phy);</div><div class='add'>+	ret = stmmac_init_dma_engine(priv);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		pr_err("%s: DMA initialization failed\n", __func__);</div><div class='ctx'> 		goto open_error;</div><div class='hunk'>@@ -1026,6 +1077,8 @@ open_error:</div><div class='ctx'> 	if (priv-&gt;phydev)</div><div class='ctx'> 		phy_disconnect(priv-&gt;phydev);</div><div class='ctx'> </div><div class='add'>+	stmmac_clk_disable(priv);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1077,7 +1130,7 @@ static int stmmac_release(struct net_device *dev)</div><div class='ctx'> #ifdef CONFIG_STMMAC_DEBUG_FS</div><div class='ctx'> 	stmmac_exit_fs();</div><div class='ctx'> #endif</div><div class='del'>-	stmmac_mdio_unregister(dev);</div><div class='add'>+	stmmac_clk_disable(priv);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1276,7 +1329,8 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)</div><div class='ctx'> 			struct sk_buff *skb;</div><div class='ctx'> 			int frame_len;</div><div class='ctx'> </div><div class='del'>-			frame_len = priv-&gt;hw-&gt;desc-&gt;get_rx_frame_len(p);</div><div class='add'>+			frame_len = priv-&gt;hw-&gt;desc-&gt;get_rx_frame_len(p,</div><div class='add'>+					priv-&gt;plat-&gt;rx_coe);</div><div class='ctx'> 			/* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3</div><div class='ctx'> 			 * Type frames (LLC/LLC-SNAP) */</div><div class='ctx'> 			if (unlikely(status != llc_snap))</div><div class='hunk'>@@ -1312,7 +1366,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)</div><div class='ctx'> #endif</div><div class='ctx'> 			skb-&gt;protocol = eth_type_trans(skb, priv-&gt;dev);</div><div class='ctx'> </div><div class='del'>-			if (unlikely(!priv-&gt;rx_coe)) {</div><div class='add'>+			if (unlikely(!priv-&gt;plat-&gt;rx_coe)) {</div><div class='ctx'> 				/* No RX COE for old mac10/100 devices */</div><div class='ctx'> 				skb_checksum_none_assert(skb);</div><div class='ctx'> 				netif_receive_skb(skb);</div><div class='hunk'>@@ -1413,7 +1467,7 @@ static void stmmac_set_rx_mode(struct net_device *dev)</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;priv-&gt;lock);</div><div class='del'>-	priv-&gt;hw-&gt;mac-&gt;set_filter(dev);</div><div class='add'>+	priv-&gt;hw-&gt;mac-&gt;set_filter(dev, priv-&gt;synopsys_id);</div><div class='ctx'> 	spin_unlock(&amp;priv-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1459,8 +1513,10 @@ static netdev_features_t stmmac_fix_features(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;rx_coe)</div><div class='add'>+	if (priv-&gt;plat-&gt;rx_coe == STMMAC_RX_COE_NONE)</div><div class='ctx'> 		features &amp;= ~NETIF_F_RXCSUM;</div><div class='add'>+	else if (priv-&gt;plat-&gt;rx_coe == STMMAC_RX_COE_TYPE1)</div><div class='add'>+		features &amp;= ~NETIF_F_IPV6_CSUM;</div><div class='ctx'> 	if (!priv-&gt;plat-&gt;tx_coe)</div><div class='ctx'> 		features &amp;= ~NETIF_F_ALL_CSUM;</div><div class='ctx'> </div><div class='hunk'>@@ -1584,7 +1640,7 @@ static const struct file_operations stmmac_rings_status_fops = {</div><div class='ctx'> 	.open = stmmac_sysfs_ring_open,</div><div class='ctx'> 	.read = seq_read,</div><div class='ctx'> 	.llseek = seq_lseek,</div><div class='del'>-	.release = seq_release,</div><div class='add'>+	.release = single_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int stmmac_sysfs_dma_cap_read(struct seq_file *seq, void *v)</div><div class='hunk'>@@ -1656,7 +1712,7 @@ static const struct file_operations stmmac_dma_cap_fops = {</div><div class='ctx'> 	.open = stmmac_sysfs_dma_cap_open,</div><div class='ctx'> 	.read = seq_read,</div><div class='ctx'> 	.llseek = seq_lseek,</div><div class='del'>-	.release = seq_release,</div><div class='add'>+	.release = single_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int stmmac_init_fs(struct net_device *dev)</div><div class='hunk'>@@ -1752,7 +1808,7 @@ static int stmmac_hw_init(struct stmmac_priv *priv)</div><div class='ctx'> 	priv-&gt;hw-&gt;ring = &amp;ring_mode_ops;</div><div class='ctx'> </div><div class='ctx'> 	/* Get and dump the chip ID */</div><div class='del'>-	stmmac_get_synopsys_id(priv);</div><div class='add'>+	priv-&gt;synopsys_id = stmmac_get_synopsys_id(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Get the HW capability (new GMAC newer than 3.50a) */</div><div class='ctx'> 	priv-&gt;hw_cap_support = stmmac_get_hw_features(priv);</div><div class='hunk'>@@ -1765,17 +1821,32 @@ static int stmmac_hw_init(struct stmmac_priv *priv)</div><div class='ctx'> 		 * register (if supported).</div><div class='ctx'> 		 */</div><div class='ctx'> 		priv-&gt;plat-&gt;enh_desc = priv-&gt;dma_cap.enh_desc;</div><div class='del'>-		priv-&gt;plat-&gt;tx_coe = priv-&gt;dma_cap.tx_coe;</div><div class='ctx'> 		priv-&gt;plat-&gt;pmt = priv-&gt;dma_cap.pmt_remote_wake_up;</div><div class='add'>+</div><div class='add'>+		priv-&gt;plat-&gt;tx_coe = priv-&gt;dma_cap.tx_coe;</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;dma_cap.rx_coe_type2)</div><div class='add'>+			priv-&gt;plat-&gt;rx_coe = STMMAC_RX_COE_TYPE2;</div><div class='add'>+		else if (priv-&gt;dma_cap.rx_coe_type1)</div><div class='add'>+			priv-&gt;plat-&gt;rx_coe = STMMAC_RX_COE_TYPE1;</div><div class='add'>+</div><div class='ctx'> 	} else</div><div class='ctx'> 		pr_info(" No HW DMA feature register supported");</div><div class='ctx'> </div><div class='ctx'> 	/* Select the enhnaced/normal descriptor structures */</div><div class='ctx'> 	stmmac_selec_desc_mode(priv);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;rx_coe = priv-&gt;hw-&gt;mac-&gt;rx_coe(priv-&gt;ioaddr);</div><div class='del'>-	if (priv-&gt;rx_coe)</div><div class='del'>-		pr_info(" RX Checksum Offload Engine supported\n");</div><div class='add'>+	/* Enable the IPC (Checksum Offload) and check if the feature has been</div><div class='add'>+	 * enabled during the core configuration. */</div><div class='add'>+	ret = priv-&gt;hw-&gt;mac-&gt;rx_ipc(priv-&gt;ioaddr);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		pr_warning(" RX IPC Checksum Offload not configured.\n");</div><div class='add'>+		priv-&gt;plat-&gt;rx_coe = STMMAC_RX_COE_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;plat-&gt;rx_coe)</div><div class='add'>+		pr_info(" RX Checksum Offload Engine supported (type %d)\n",</div><div class='add'>+			priv-&gt;plat-&gt;rx_coe);</div><div class='ctx'> 	if (priv-&gt;plat-&gt;tx_coe)</div><div class='ctx'> 		pr_info(" TX Checksum insertion supported\n");</div><div class='ctx'> </div><div class='hunk'>@@ -1856,6 +1927,28 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (stmmac_clk_get(priv))</div><div class='add'>+		pr_warning("%s: warning: cannot get CSR clock\n", __func__);</div><div class='add'>+</div><div class='add'>+	/* If a specific clk_csr value is passed from the platform</div><div class='add'>+	 * this means that the CSR Clock Range selection cannot be</div><div class='add'>+	 * changed at run-time and it is fixed. Viceversa the driver'll try to</div><div class='add'>+	 * set the MDC clock dynamically according to the csr actual</div><div class='add'>+	 * clock input.</div><div class='add'>+	 */</div><div class='add'>+	if (!priv-&gt;plat-&gt;clk_csr)</div><div class='add'>+		stmmac_clk_csr_set(priv);</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;clk_csr = priv-&gt;plat-&gt;clk_csr;</div><div class='add'>+</div><div class='add'>+	/* MDIO bus Registration */</div><div class='add'>+	ret = stmmac_mdio_register(ndev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pr_debug("%s: MDIO bus (id: %d) registration failed",</div><div class='add'>+			 __func__, priv-&gt;plat-&gt;bus_id);</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return priv;</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='hunk'>@@ -1883,6 +1976,7 @@ int stmmac_dvr_remove(struct net_device *ndev)</div><div class='ctx'> 	priv-&gt;hw-&gt;dma-&gt;stop_tx(priv-&gt;ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	stmmac_set_mac(priv-&gt;ioaddr, false);</div><div class='add'>+	stmmac_mdio_unregister(ndev);</div><div class='ctx'> 	netif_carrier_off(ndev);</div><div class='ctx'> 	unregister_netdev(ndev);</div><div class='ctx'> 	free_netdev(ndev);</div><div class='hunk'>@@ -1895,6 +1989,7 @@ int stmmac_suspend(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	int dis_ic = 0;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (!ndev || !netif_running(ndev))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1902,7 +1997,7 @@ int stmmac_suspend(struct net_device *ndev)</div><div class='ctx'> 	if (priv-&gt;phydev)</div><div class='ctx'> 		phy_stop(priv-&gt;phydev);</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;priv-&gt;lock);</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(ndev);</div><div class='ctx'> 	netif_stop_queue(ndev);</div><div class='hunk'>@@ -1925,21 +2020,24 @@ int stmmac_suspend(struct net_device *ndev)</div><div class='ctx'> 	/* Enable Power down mode by programming the PMT regs */</div><div class='ctx'> 	if (device_may_wakeup(priv-&gt;device))</div><div class='ctx'> 		priv-&gt;hw-&gt;mac-&gt;pmt(priv-&gt;ioaddr, priv-&gt;wolopts);</div><div class='del'>-	else</div><div class='add'>+	else {</div><div class='ctx'> 		stmmac_set_mac(priv-&gt;ioaddr, false);</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;priv-&gt;lock);</div><div class='add'>+		/* Disable clock in case of PWM is off */</div><div class='add'>+		stmmac_clk_disable(priv);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int stmmac_resume(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;priv-&gt;lock);</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* Power Down bit, into the PM register, is cleared</div><div class='ctx'> 	 * automatically as soon as a magic packet or a Wake-up frame</div><div class='hunk'>@@ -1948,6 +2046,9 @@ int stmmac_resume(struct net_device *ndev)</div><div class='ctx'> 	 * from another devices (e.g. serial console). */</div><div class='ctx'> 	if (device_may_wakeup(priv-&gt;device))</div><div class='ctx'> 		priv-&gt;hw-&gt;mac-&gt;pmt(priv-&gt;ioaddr, 0);</div><div class='add'>+	else</div><div class='add'>+		/* enable the clk prevously disabled */</div><div class='add'>+		stmmac_clk_enable(priv);</div><div class='ctx'> </div><div class='ctx'> 	netif_device_attach(ndev);</div><div class='ctx'> </div><div class='hunk'>@@ -1964,7 +2065,7 @@ int stmmac_resume(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	netif_start_queue(ndev);</div><div class='ctx'> </div><div class='del'>-	spin_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;phydev)</div><div class='ctx'> 		phy_start(priv-&gt;phydev);</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c<br/>index 73195329aa46..ade108232048 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c</a></div><div class='hunk'>@@ -34,6 +34,22 @@</div><div class='ctx'> #define MII_BUSY 0x00000001</div><div class='ctx'> #define MII_WRITE 0x00000002</div><div class='ctx'> </div><div class='add'>+static int stmmac_mdio_busy_wait(void __iomem *ioaddr, unsigned int mii_addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long curr;</div><div class='add'>+	unsigned long finish = jiffies + 3 * HZ;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		curr = jiffies;</div><div class='add'>+		if (readl(ioaddr + mii_addr) &amp; MII_BUSY)</div><div class='add'>+			cpu_relax();</div><div class='add'>+		else</div><div class='add'>+			return 0;</div><div class='add'>+	} while (!time_after_eq(curr, finish));</div><div class='add'>+</div><div class='add'>+	return -EBUSY;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * stmmac_mdio_read</div><div class='ctx'>  * @bus: points to the mii_bus structure</div><div class='hunk'>@@ -54,11 +70,15 @@ static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)</div><div class='ctx'> 	int data;</div><div class='ctx'> 	u16 regValue = (((phyaddr &lt;&lt; 11) &amp; (0x0000F800)) |</div><div class='ctx'> 			((phyreg &lt;&lt; 6) &amp; (0x000007C0)));</div><div class='del'>-	regValue |= MII_BUSY | ((priv-&gt;plat-&gt;clk_csr &amp; 7) &lt;&lt; 2);</div><div class='add'>+	regValue |= MII_BUSY | ((priv-&gt;clk_csr &amp; 0xF) &lt;&lt; 2);</div><div class='add'>+</div><div class='add'>+	if (stmmac_mdio_busy_wait(priv-&gt;ioaddr, mii_address))</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	do {} while (((readl(priv-&gt;ioaddr + mii_address)) &amp; MII_BUSY) == 1);</div><div class='ctx'> 	writel(regValue, priv-&gt;ioaddr + mii_address);</div><div class='del'>-	do {} while (((readl(priv-&gt;ioaddr + mii_address)) &amp; MII_BUSY) == 1);</div><div class='add'>+</div><div class='add'>+	if (stmmac_mdio_busy_wait(priv-&gt;ioaddr, mii_address))</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	/* Read the data from the MII data register */</div><div class='ctx'> 	data = (int)readl(priv-&gt;ioaddr + mii_data);</div><div class='hunk'>@@ -86,20 +106,18 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,</div><div class='ctx'> 	    (((phyaddr &lt;&lt; 11) &amp; (0x0000F800)) | ((phyreg &lt;&lt; 6) &amp; (0x000007C0)))</div><div class='ctx'> 	    | MII_WRITE;</div><div class='ctx'> </div><div class='del'>-	value |= MII_BUSY | ((priv-&gt;plat-&gt;clk_csr &amp; 7) &lt;&lt; 2);</div><div class='del'>-</div><div class='add'>+	value |= MII_BUSY | ((priv-&gt;clk_csr &amp; 0xF) &lt;&lt; 2);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until any existing MII operation is complete */</div><div class='del'>-	do {} while (((readl(priv-&gt;ioaddr + mii_address)) &amp; MII_BUSY) == 1);</div><div class='add'>+	if (stmmac_mdio_busy_wait(priv-&gt;ioaddr, mii_address))</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	/* Set the MII address register to write */</div><div class='ctx'> 	writel(phydata, priv-&gt;ioaddr + mii_data);</div><div class='ctx'> 	writel(value, priv-&gt;ioaddr + mii_address);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until any existing MII operation is complete */</div><div class='del'>-	do {} while (((readl(priv-&gt;ioaddr + mii_address)) &amp; MII_BUSY) == 1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return stmmac_mdio_busy_wait(priv-&gt;ioaddr, mii_address);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c<br/>index da66ed7c3c5d..58fab5303e9c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> </div><div class='ctx'> struct plat_stmmacenet_data plat_dat;</div><div class='ctx'> struct stmmac_mdio_bus_data mdio_data;</div><div class='add'>+struct stmmac_dma_cfg dma_cfg;</div><div class='ctx'> </div><div class='ctx'> static void stmmac_default_data(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -35,7 +36,6 @@ static void stmmac_default_data(void)</div><div class='ctx'> 	plat_dat.bus_id = 1;</div><div class='ctx'> 	plat_dat.phy_addr = 0;</div><div class='ctx'> 	plat_dat.interface = PHY_INTERFACE_MODE_GMII;</div><div class='del'>-	plat_dat.pbl = 32;</div><div class='ctx'> 	plat_dat.clk_csr = 2;	/* clk_csr_i = 20-35MHz &amp; MDC = clk_csr_i/16 */</div><div class='ctx'> 	plat_dat.has_gmac = 1;</div><div class='ctx'> 	plat_dat.force_sf_dma_mode = 1;</div><div class='hunk'>@@ -44,6 +44,10 @@ static void stmmac_default_data(void)</div><div class='ctx'> 	mdio_data.phy_reset = NULL;</div><div class='ctx'> 	mdio_data.phy_mask = 0;</div><div class='ctx'> 	plat_dat.mdio_bus_data = &amp;mdio_data;</div><div class='add'>+</div><div class='add'>+	dma_cfg.pbl = 32;</div><div class='add'>+	dma_cfg.burst_len = DMA_AXI_BLEN_256;</div><div class='add'>+	plat_dat.dma_cfg = &amp;dma_cfg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c<br/>index 116529a366b2..3dd8f0803808 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c</a></div><div class='hunk'>@@ -50,7 +50,6 @@ static int __devinit stmmac_probe_config_dt(struct platform_device *pdev,</div><div class='ctx'> 	 * once needed on other platforms.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (of_device_is_compatible(np, "st,spear600-gmac")) {</div><div class='del'>-		plat-&gt;pbl = 8;</div><div class='ctx'> 		plat-&gt;has_gmac = 1;</div><div class='ctx'> 		plat-&gt;pmt = 1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -189,9 +188,6 @@ static int stmmac_pltfr_remove(struct platform_device *pdev)</div><div class='ctx'> 	if (priv-&gt;plat-&gt;exit)</div><div class='ctx'> 		priv-&gt;plat-&gt;exit(pdev);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;plat-&gt;exit)</div><div class='del'>-		priv-&gt;plat-&gt;exit(pdev);</div><div class='del'>-</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	iounmap((void *)priv-&gt;ioaddr);</div><div class='hunk'>@@ -218,14 +214,26 @@ static int stmmac_pltfr_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> int stmmac_pltfr_freeze(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);</div><div class='ctx'> 	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev);</div><div class='ctx'> </div><div class='del'>-	return stmmac_freeze(ndev);</div><div class='add'>+	ret = stmmac_freeze(ndev);</div><div class='add'>+	if (plat_dat-&gt;exit)</div><div class='add'>+		plat_dat-&gt;exit(pdev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int stmmac_pltfr_restore(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);</div><div class='ctx'> 	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev);</div><div class='add'>+</div><div class='add'>+	if (plat_dat-&gt;init)</div><div class='add'>+		plat_dat-&gt;init(pdev);</div><div class='ctx'> </div><div class='ctx'> 	return stmmac_restore(ndev);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/sun/niu.c b/drivers/net/ethernet/sun/niu.c<br/>index c99b3b0e2eae..703c8cce2a2c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sun/niu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sun/niu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sun/niu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sun/niu.c</a></div><div class='hunk'>@@ -9838,7 +9838,7 @@ static int __devinit niu_pci_init_one(struct pci_dev *pdev,</div><div class='ctx'> 			goto err_out_release_parent;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (err || dma_mask == DMA_BIT_MASK(32)) {</div><div class='add'>+	if (err) {</div><div class='ctx'> 		err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev, "No usable DMA configuration, aborting\n");</div><div class='head'>diff --git a/drivers/net/ethernet/sun/sungem.c b/drivers/net/ethernet/sun/sungem.c<br/>index 558409ff4058..3cf4ab755838 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sun/sungem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sun/sungem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sun/sungem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sun/sungem.c</a></div><div class='hunk'>@@ -401,7 +401,7 @@ static int gem_rxmac_reset(struct gem *gp)</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	udelay(5000);</div><div class='add'>+	mdelay(5);</div><div class='ctx'> </div><div class='ctx'> 	/* Execute RX reset command. */</div><div class='ctx'> 	writel(gp-&gt;swrst_base | GREG_SWRST_RXRST,</div><div class='hunk'>@@ -2339,7 +2339,7 @@ static int gem_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> 	netif_device_detach(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Switch off chip, remember WOL setting */</div><div class='del'>-	gp-&gt;asleep_wol = gp-&gt;wake_on_lan;</div><div class='add'>+	gp-&gt;asleep_wol = !!gp-&gt;wake_on_lan;</div><div class='ctx'> 	gem_do_stop(dev, gp-&gt;asleep_wol);</div><div class='ctx'> </div><div class='ctx'> 	/* Unlock the network stack */</div><div class='hunk'>@@ -2898,7 +2898,6 @@ static int __devinit gem_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	gp-&gt;pdev = pdev;</div><div class='del'>-	dev-&gt;base_addr = (long) pdev;</div><div class='ctx'> 	gp-&gt;dev = dev;</div><div class='ctx'> </div><div class='ctx'> 	gp-&gt;msg_enable = DEFAULT_MSG;</div><div class='hunk'>@@ -2972,7 +2971,6 @@ static int __devinit gem_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	netif_napi_add(dev, &amp;gp-&gt;napi, gem_poll, 64);</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;gem_ethtool_ops;</div><div class='ctx'> 	dev-&gt;watchdog_timeo = 5 * HZ;</div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> 	dev-&gt;dma = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Set that now, in case PM kicks in now */</div><div class='head'>diff --git a/drivers/net/ethernet/sun/sunhme.c b/drivers/net/ethernet/sun/sunhme.c<br/>index b95e7e681b38..dfc00c4683e5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sun/sunhme.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sun/sunhme.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sun/sunhme.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sun/sunhme.c</a></div><div class='hunk'>@@ -2182,11 +2182,12 @@ static int happy_meal_open(struct net_device *dev)</div><div class='ctx'> 	 * into a single source which we register handling at probe time.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((hp-&gt;happy_flags &amp; (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {</div><div class='del'>-		if (request_irq(dev-&gt;irq, happy_meal_interrupt,</div><div class='del'>-				IRQF_SHARED, dev-&gt;name, (void *)dev)) {</div><div class='add'>+		res = request_irq(hp-&gt;irq, happy_meal_interrupt, IRQF_SHARED,</div><div class='add'>+				  dev-&gt;name, dev);</div><div class='add'>+		if (res) {</div><div class='ctx'> 			HMD(("EAGAIN\n"));</div><div class='ctx'> 			printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n",</div><div class='del'>-			       dev-&gt;irq);</div><div class='add'>+			       hp-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 			return -EAGAIN;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2199,7 +2200,7 @@ static int happy_meal_open(struct net_device *dev)</div><div class='ctx'> 	spin_unlock_irq(&amp;hp-&gt;happy_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (res &amp;&amp; ((hp-&gt;happy_flags &amp; (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO))</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='add'>+		free_irq(hp-&gt;irq, dev);</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2221,7 +2222,7 @@ static int happy_meal_close(struct net_device *dev)</div><div class='ctx'> 	 * time and never unregister.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((hp-&gt;happy_flags &amp; (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='add'>+		free_irq(hp-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2777,7 +2778,7 @@ static int __devinit happy_meal_sbus_probe_one(struct platform_device *op, int i</div><div class='ctx'> 	dev-&gt;hw_features = NETIF_F_SG | NETIF_F_HW_CSUM;</div><div class='ctx'> 	dev-&gt;features |= dev-&gt;hw_features | NETIF_F_RXCSUM;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;irq = op-&gt;archdata.irqs[0];</div><div class='add'>+	hp-&gt;irq = op-&gt;archdata.irqs[0];</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_SBUS) &amp;&amp; defined(CONFIG_PCI)</div><div class='ctx'> 	/* Hook up SBUS register/descriptor accessors. */</div><div class='hunk'>@@ -2981,8 +2982,6 @@ static int __devinit happy_meal_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (hme_version_printed++ == 0)</div><div class='ctx'> 		printk(KERN_INFO "%s", version);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = (long) pdev;</div><div class='del'>-</div><div class='ctx'> 	hp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	hp-&gt;happy_dev = pdev;</div><div class='hunk'>@@ -3087,12 +3086,11 @@ static int __devinit happy_meal_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	init_timer(&amp;hp-&gt;happy_timer);</div><div class='ctx'> </div><div class='add'>+	hp-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> 	hp-&gt;dev = dev;</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;hme_netdev_ops;</div><div class='ctx'> 	dev-&gt;watchdog_timeo = 5*HZ;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;hme_ethtool_ops;</div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-	dev-&gt;dma = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Happy Meal can do it all... */</div><div class='ctx'> 	dev-&gt;hw_features = NETIF_F_SG | NETIF_F_HW_CSUM;</div><div class='head'>diff --git a/drivers/net/ethernet/sun/sunhme.h b/drivers/net/ethernet/sun/sunhme.h<br/>index 64f278360d89..f4307654e4ae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sun/sunhme.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sun/sunhme.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sun/sunhme.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sun/sunhme.h</a></div><div class='hunk'>@@ -432,6 +432,7 @@ struct happy_meal {</div><div class='ctx'> </div><div class='ctx'> 	dma_addr_t                hblock_dvma;    /* DVMA visible address happy block  */</div><div class='ctx'> 	unsigned int              happy_flags;    /* Driver state flags                */</div><div class='add'>+	int                       irq;</div><div class='ctx'> 	enum happy_transceiver    tcvr_type;      /* Kind of transceiver in use        */</div><div class='ctx'> 	unsigned int              happy_bursts;   /* Get your mind out of the gutter   */</div><div class='ctx'> 	unsigned int              paddr;          /* PHY address for transceiver       */</div><div class='head'>diff --git a/drivers/net/ethernet/sun/sunvnet.c b/drivers/net/ethernet/sun/sunvnet.c<br/>index 38e3ae9155b7..a108db35924e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/sun/sunvnet.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/sun/sunvnet.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/sun/sunvnet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/sun/sunvnet.c</a></div><div class='hunk'>@@ -618,7 +618,7 @@ struct vnet_port *__tx_port_find(struct vnet *vp, struct sk_buff *skb)</div><div class='ctx'> 	struct vnet_port *port;</div><div class='ctx'> </div><div class='ctx'> 	hlist_for_each_entry(port, n, hp, hash) {</div><div class='del'>-		if (!compare_ether_addr(port-&gt;raddr, skb-&gt;data))</div><div class='add'>+		if (ether_addr_equal(port-&gt;raddr, skb-&gt;data))</div><div class='ctx'> 			return port;</div><div class='ctx'> 	}</div><div class='ctx'> 	port = NULL;</div><div class='head'>diff --git a/drivers/net/ethernet/tehuti/tehuti.c b/drivers/net/ethernet/tehuti/tehuti.c<br/>index ad973ffc9ff3..447a6932cab3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/tehuti/tehuti.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/tehuti/tehuti.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/tehuti/tehuti.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/tehuti/tehuti.c</a></div><div class='hunk'>@@ -341,8 +341,8 @@ static int bdx_fw_load(struct bdx_priv *priv)</div><div class='ctx'> out:</div><div class='ctx'> 	if (master)</div><div class='ctx'> 		WRITE_REG(priv, regINIT_SEMAPHORE, 1);</div><div class='del'>-	if (fw)</div><div class='del'>-		release_firmware(fw);</div><div class='add'>+</div><div class='add'>+	release_firmware(fw);</div><div class='ctx'> </div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		netdev_err(priv-&gt;ndev, "firmware loading failed\n");</div><div class='hunk'>@@ -1317,7 +1317,7 @@ static void print_rxdd(struct rxd_desc *rxdd, u32 rxd_val1, u16 len,</div><div class='ctx'> </div><div class='ctx'> static void print_rxfd(struct rxf_desc *rxfd)</div><div class='ctx'> {</div><div class='del'>-	DBG("=== RxF desc CHIP ORDER/ENDIANESS =============\n"</div><div class='add'>+	DBG("=== RxF desc CHIP ORDER/ENDIANNESS =============\n"</div><div class='ctx'> 	    "info 0x%x va_lo %u pa_lo 0x%x pa_hi 0x%x len 0x%x\n",</div><div class='ctx'> 	    rxfd-&gt;info, rxfd-&gt;va_lo, rxfd-&gt;pa_lo, rxfd-&gt;pa_hi, rxfd-&gt;len);</div><div class='ctx'> }</div><div class='hunk'>@@ -1988,10 +1988,6 @@ bdx_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		/* these fields are used for info purposes only</div><div class='ctx'> 		 * so we can have them same for all ports of the board */</div><div class='ctx'> 		ndev-&gt;if_port = port;</div><div class='del'>-		ndev-&gt;base_addr = pciaddr;</div><div class='del'>-		ndev-&gt;mem_start = pciaddr;</div><div class='del'>-		ndev-&gt;mem_end = pciaddr + regionSize;</div><div class='del'>-		ndev-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> 		ndev-&gt;features = NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO</div><div class='ctx'> 		    | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |</div><div class='ctx'> 		    NETIF_F_HW_VLAN_FILTER | NETIF_F_RXCSUM</div><div class='head'>diff --git a/drivers/net/ethernet/ti/Kconfig b/drivers/net/ethernet/ti/Kconfig<br/>index b42252c4bec8..1b173a6145d6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/ti/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/ti/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/ti/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/ti/Kconfig</a></div><div class='hunk'>@@ -51,7 +51,7 @@ config TI_DAVINCI_CPDMA</div><div class='ctx'> </div><div class='ctx'> config TI_CPSW</div><div class='ctx'> 	tristate "TI CPSW Switch Support"</div><div class='del'>-	depends on ARM &amp;&amp; (ARCH_DAVINCI || SOC_OMAPAM33XX)</div><div class='add'>+	depends on ARM &amp;&amp; (ARCH_DAVINCI || SOC_AM33XX)</div><div class='ctx'> 	select TI_DAVINCI_CPDMA</div><div class='ctx'> 	select TI_DAVINCI_MDIO</div><div class='ctx'> 	---help---</div><div class='head'>diff --git a/drivers/net/ethernet/ti/davinci_cpdma.c b/drivers/net/ethernet/ti/davinci_cpdma.c<br/>index 34558766cbf0..d614c374ed9d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/ti/davinci_cpdma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/ti/davinci_cpdma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/ti/davinci_cpdma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/ti/davinci_cpdma.c</a></div><div class='hunk'>@@ -92,7 +92,7 @@ enum cpdma_state {</div><div class='ctx'> 	CPDMA_STATE_TEARDOWN,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const char *cpdma_state_str[] = { "idle", "active", "teardown" };</div><div class='add'>+static const char *cpdma_state_str[] = { "idle", "active", "teardown" };</div><div class='ctx'> </div><div class='ctx'> struct cpdma_ctlr {</div><div class='ctx'> 	enum cpdma_state	state;</div><div class='hunk'>@@ -276,6 +276,7 @@ struct cpdma_ctlr *cpdma_ctlr_create(struct cpdma_params *params)</div><div class='ctx'> 		ctlr-&gt;num_chan = CPDMA_MAX_CHANNELS;</div><div class='ctx'> 	return ctlr;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(cpdma_ctlr_create);</div><div class='ctx'> </div><div class='ctx'> int cpdma_ctlr_start(struct cpdma_ctlr *ctlr)</div><div class='ctx'> {</div><div class='hunk'>@@ -321,6 +322,7 @@ int cpdma_ctlr_start(struct cpdma_ctlr *ctlr)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ctlr-&gt;lock, flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(cpdma_ctlr_start);</div><div class='ctx'> </div><div class='ctx'> int cpdma_ctlr_stop(struct cpdma_ctlr *ctlr)</div><div class='ctx'> {</div><div class='hunk'>@@ -351,6 +353,7 @@ int cpdma_ctlr_stop(struct cpdma_ctlr *ctlr)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ctlr-&gt;lock, flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(cpdma_ctlr_stop);</div><div class='ctx'> </div><div class='ctx'> int cpdma_ctlr_dump(struct cpdma_ctlr *ctlr)</div><div class='ctx'> {</div><div class='hunk'>@@ -421,6 +424,7 @@ int cpdma_ctlr_dump(struct cpdma_ctlr *ctlr)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ctlr-&gt;lock, flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(cpdma_ctlr_dump);</div><div class='ctx'> </div><div class='ctx'> int cpdma_ctlr_destroy(struct cpdma_ctlr *ctlr)</div><div class='ctx'> {</div><div class='hunk'>@@ -444,6 +448,7 @@ int cpdma_ctlr_destroy(struct cpdma_ctlr *ctlr)</div><div class='ctx'> 	kfree(ctlr);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(cpdma_ctlr_destroy);</div><div class='ctx'> </div><div class='ctx'> int cpdma_ctlr_int_ctrl(struct cpdma_ctlr *ctlr, bool enable)</div><div class='ctx'> {</div><div class='hunk'>@@ -528,6 +533,7 @@ err_chan_busy:</div><div class='ctx'> err_chan_alloc:</div><div class='ctx'> 	return ERR_PTR(ret);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(cpdma_chan_create);</div><div class='ctx'> </div><div class='ctx'> int cpdma_chan_destroy(struct cpdma_chan *chan)</div><div class='ctx'> {</div><div class='hunk'>@@ -545,6 +551,7 @@ int cpdma_chan_destroy(struct cpdma_chan *chan)</div><div class='ctx'> 	kfree(chan);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(cpdma_chan_destroy);</div><div class='ctx'> </div><div class='ctx'> int cpdma_chan_get_stats(struct cpdma_chan *chan,</div><div class='ctx'> 			 struct cpdma_chan_stats *stats)</div><div class='hunk'>@@ -693,6 +700,7 @@ unlock_ret:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;chan-&gt;lock, flags);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(cpdma_chan_submit);</div><div class='ctx'> </div><div class='ctx'> static void __cpdma_chan_free(struct cpdma_chan *chan,</div><div class='ctx'> 			      struct cpdma_desc __iomem *desc,</div><div class='hunk'>@@ -776,6 +784,7 @@ int cpdma_chan_process(struct cpdma_chan *chan, int quota)</div><div class='ctx'> 	}</div><div class='ctx'> 	return used;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(cpdma_chan_process);</div><div class='ctx'> </div><div class='ctx'> int cpdma_chan_start(struct cpdma_chan *chan)</div><div class='ctx'> {</div><div class='hunk'>@@ -803,6 +812,7 @@ int cpdma_chan_start(struct cpdma_chan *chan)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;chan-&gt;lock, flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(cpdma_chan_start);</div><div class='ctx'> </div><div class='ctx'> int cpdma_chan_stop(struct cpdma_chan *chan)</div><div class='ctx'> {</div><div class='hunk'>@@ -863,6 +873,7 @@ int cpdma_chan_stop(struct cpdma_chan *chan)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;chan-&gt;lock, flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(cpdma_chan_stop);</div><div class='ctx'> </div><div class='ctx'> int cpdma_chan_int_ctrl(struct cpdma_chan *chan, bool enable)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c<br/>index 174a3348f676..4da93a5d7ec6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/ti/davinci_emac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/ti/davinci_emac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/ti/davinci_emac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/ti/davinci_emac.c</a></div><div class='hunk'>@@ -627,6 +627,7 @@ static const struct ethtool_ops ethtool_ops = {</div><div class='ctx'> 	.get_link = ethtool_op_get_link,</div><div class='ctx'> 	.get_coalesce = emac_get_coalesce,</div><div class='ctx'> 	.set_coalesce =  emac_set_coalesce,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1511,7 +1512,7 @@ static int emac_devioctl(struct net_device *ndev, struct ifreq *ifrq, int cmd)</div><div class='ctx'> </div><div class='ctx'> static int match_first_device(struct device *dev, void *data)</div><div class='ctx'> {</div><div class='del'>-	return 1;</div><div class='add'>+	return !strncmp(dev_name(dev), "davinci_mdio", 12);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/ti/tlan.c b/drivers/net/ethernet/ti/tlan.c<br/>index 817ad3bc4957..3e6abf0f2771 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/ti/tlan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/ti/tlan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/ti/tlan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/ti/tlan.c</a></div><div class='hunk'>@@ -228,7 +228,7 @@ tlan_get_skb(const struct tlan_list *tag)</div><div class='ctx'> 	unsigned long addr;</div><div class='ctx'> </div><div class='ctx'> 	addr = tag-&gt;buffer[9].address;</div><div class='del'>-	addr |= (tag-&gt;buffer[8].address &lt;&lt; 16) &lt;&lt; 16;</div><div class='add'>+	addr |= ((unsigned long) tag-&gt;buffer[8].address &lt;&lt; 16) &lt;&lt; 16;</div><div class='ctx'> 	return (struct sk_buff *) addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2545,7 +2545,7 @@ static void tlan_phy_reset(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	phy = priv-&gt;phy[priv-&gt;phy_num];</div><div class='ctx'> </div><div class='del'>-	TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev-&gt;name);</div><div class='add'>+	TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Resetting PHY.\n", dev-&gt;name);</div><div class='ctx'> 	tlan_mii_sync(dev-&gt;base_addr);</div><div class='ctx'> 	value = MII_GC_LOOPBK | MII_GC_RESET;</div><div class='ctx'> 	tlan_mii_write_reg(dev, phy, MII_GEN_CTL, value);</div><div class='head'>diff --git a/drivers/net/ethernet/tile/tilepro.c b/drivers/net/ethernet/tile/tilepro.c<br/>index 3d501ec7fad7..96070e9b50dc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/tile/tilepro.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/tile/tilepro.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/tile/tilepro.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/tile/tilepro.c</a></div><div class='hunk'>@@ -843,7 +843,7 @@ static bool tile_net_poll_aux(struct tile_net_cpu *info, int index)</div><div class='ctx'> 		if (!is_multicast_ether_addr(buf)) {</div><div class='ctx'> 			/* Filter packets not for our address. */</div><div class='ctx'> 			const u8 *mine = dev-&gt;dev_addr;</div><div class='del'>-			filter = compare_ether_addr(mine, buf);</div><div class='add'>+			filter = !ether_addr_equal(mine, buf);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/toshiba/ps3_gelic_wireless.c b/drivers/net/ethernet/toshiba/ps3_gelic_wireless.c<br/>index 5c14f82c4954..961c8321451f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/toshiba/ps3_gelic_wireless.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/toshiba/ps3_gelic_wireless.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/toshiba/ps3_gelic_wireless.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/toshiba/ps3_gelic_wireless.c</a></div><div class='hunk'>@@ -1590,8 +1590,8 @@ static void gelic_wl_scan_complete_event(struct gelic_wl_info *wl)</div><div class='ctx'> 		found = 0;</div><div class='ctx'> 		oldest = NULL;</div><div class='ctx'> 		list_for_each_entry(target, &amp;wl-&gt;network_list, list) {</div><div class='del'>-			if (!compare_ether_addr(&amp;target-&gt;hwinfo-&gt;bssid[2],</div><div class='del'>-						&amp;scan_info-&gt;bssid[2])) {</div><div class='add'>+			if (ether_addr_equal(&amp;target-&gt;hwinfo-&gt;bssid[2],</div><div class='add'>+					     &amp;scan_info-&gt;bssid[2])) {</div><div class='ctx'> 				found = 1;</div><div class='ctx'> 				pr_debug("%s: same BBS found scanned list\n",</div><div class='ctx'> 					 __func__);</div><div class='hunk'>@@ -1691,8 +1691,8 @@ struct gelic_wl_scan_info *gelic_wl_find_best_bss(struct gelic_wl_info *wl)</div><div class='ctx'> </div><div class='ctx'> 		/* If bss specified, check it only */</div><div class='ctx'> 		if (test_bit(GELIC_WL_STAT_BSSID_SET, &amp;wl-&gt;stat)) {</div><div class='del'>-			if (!compare_ether_addr(&amp;scan_info-&gt;hwinfo-&gt;bssid[2],</div><div class='del'>-						wl-&gt;bssid)) {</div><div class='add'>+			if (ether_addr_equal(&amp;scan_info-&gt;hwinfo-&gt;bssid[2],</div><div class='add'>+					     wl-&gt;bssid)) {</div><div class='ctx'> 				best_bss = scan_info;</div><div class='ctx'> 				pr_debug("%s: bssid matched\n", __func__);</div><div class='ctx'> 				break;</div><div class='head'>diff --git a/drivers/net/ethernet/via/via-rhine.c b/drivers/net/ethernet/via/via-rhine.c<br/>index fcfa01f7ceb6..0459c096629f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/via/via-rhine.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/via/via-rhine.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/via/via-rhine.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/via/via-rhine.c</a></div><div class='hunk'>@@ -689,9 +689,12 @@ static void __devinit rhine_reload_eeprom(long pioaddr, struct net_device *dev)</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> static void rhine_poll(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='del'>-	rhine_interrupt(dev-&gt;irq, (void *)dev);</div><div class='del'>-	enable_irq(dev-&gt;irq);</div><div class='add'>+	struct rhine_private *rp = netdev_priv(dev);</div><div class='add'>+	const int irq = rp-&gt;pdev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	disable_irq(irq);</div><div class='add'>+	rhine_interrupt(irq, dev);</div><div class='add'>+	enable_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -972,7 +975,6 @@ static int __devinit rhine_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* USE_MMIO */</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = (unsigned long)ioaddr;</div><div class='ctx'> 	rp-&gt;base = ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	/* Get chip registers into a sane state */</div><div class='hunk'>@@ -995,8 +997,6 @@ static int __devinit rhine_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	if (!phy_id)</div><div class='ctx'> 		phy_id = ioread8(ioaddr + 0x6C);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-</div><div class='ctx'> 	spin_lock_init(&amp;rp-&gt;lock);</div><div class='ctx'> 	mutex_init(&amp;rp-&gt;task_lock);</div><div class='ctx'> 	INIT_WORK(&amp;rp-&gt;reset_task, rhine_reset_task);</div><div class='head'>diff --git a/drivers/net/ethernet/via/via-velocity.c b/drivers/net/ethernet/via/via-velocity.c<br/>index 8a5d7c100a5e..ea3e0a21ba74 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/via/via-velocity.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/via/via-velocity.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/via/via-velocity.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/via/via-velocity.c</a></div><div class='hunk'>@@ -2488,8 +2488,8 @@ static int velocity_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (vptr-&gt;flags &amp; VELOCITY_FLAGS_WOL_ENABLED)</div><div class='ctx'> 		velocity_get_ip(vptr);</div><div class='del'>-	if (dev-&gt;irq != 0)</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='add'>+</div><div class='add'>+	free_irq(vptr-&gt;pdev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	velocity_free_rings(vptr);</div><div class='ctx'> </div><div class='hunk'>@@ -2755,8 +2755,6 @@ static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_devi</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto err_free_dev;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-</div><div class='ctx'> 	ret = velocity_get_pci_info(vptr, pdev);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		/* error message already printed */</div><div class='hunk'>@@ -2779,8 +2777,6 @@ static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_devi</div><div class='ctx'> </div><div class='ctx'> 	mac_wol_reset(regs);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = vptr-&gt;ioaddr;</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; 6; i++)</div><div class='ctx'> 		dev-&gt;dev_addr[i] = readb(&amp;regs-&gt;PAR[i]);</div><div class='ctx'> </div><div class='hunk'>@@ -2806,7 +2802,6 @@ static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_devi</div><div class='ctx'> </div><div class='ctx'> 	vptr-&gt;phy_id = MII_GET_PHY_ID(vptr-&gt;mac_regs);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;velocity_netdev_ops;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;velocity_ethtool_ops;</div><div class='ctx'> 	netif_napi_add(dev, &amp;vptr-&gt;napi, velocity_poll, VELOCITY_NAPI_WEIGHT);</div><div class='head'>diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig<br/>new file mode 100644<br/>index 000000000000..cb18043f5830<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/wiznet/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/wiznet/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+#</div><div class='add'>+# WIZnet devices configuration</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+config NET_VENDOR_WIZNET</div><div class='add'>+	bool "WIZnet devices"</div><div class='add'>+	default y</div><div class='add'>+	---help---</div><div class='add'>+	  If you have a network (Ethernet) card belonging to this class, say Y</div><div class='add'>+	  and read the Ethernet-HOWTO, available from</div><div class='add'>+	  &lt;http://www.tldp.org/docs.html#howto&gt;.</div><div class='add'>+</div><div class='add'>+	  Note that the answer to this question doesn't directly affect the</div><div class='add'>+	  kernel: saying N will just cause the configurator to skip all</div><div class='add'>+	  the questions about WIZnet devices. If you say Y, you will be asked</div><div class='add'>+	  for your specific card in the following questions.</div><div class='add'>+</div><div class='add'>+if NET_VENDOR_WIZNET</div><div class='add'>+</div><div class='add'>+config WIZNET_W5100</div><div class='add'>+	tristate "WIZnet W5100 Ethernet support"</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	---help---</div><div class='add'>+	  Support for WIZnet W5100 chips.</div><div class='add'>+</div><div class='add'>+	  W5100 is a single chip with integrated 10/100 Ethernet MAC,</div><div class='add'>+	  PHY and hardware TCP/IP stack, but this driver is limited to</div><div class='add'>+	  the MAC and PHY functions only, onchip TCP/IP is unused.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module</div><div class='add'>+	  will be called w5100.</div><div class='add'>+</div><div class='add'>+config WIZNET_W5300</div><div class='add'>+	tristate "WIZnet W5300 Ethernet support"</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	---help---</div><div class='add'>+	  Support for WIZnet W5300 chips.</div><div class='add'>+</div><div class='add'>+	  W5300 is a single chip with integrated 10/100 Ethernet MAC,</div><div class='add'>+	  PHY and hardware TCP/IP stack, but this driver is limited to</div><div class='add'>+	  the MAC and PHY functions only, onchip TCP/IP is unused.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module</div><div class='add'>+	  will be called w5300.</div><div class='add'>+</div><div class='add'>+choice</div><div class='add'>+	prompt "WIZnet interface mode"</div><div class='add'>+	depends on WIZNET_W5100 || WIZNET_W5300</div><div class='add'>+	default WIZNET_BUS_ANY</div><div class='add'>+</div><div class='add'>+config WIZNET_BUS_DIRECT</div><div class='add'>+	bool "Direct address bus mode"</div><div class='add'>+	---help---</div><div class='add'>+	  In direct address mode host system can directly access all registers</div><div class='add'>+	  after mapping to Memory-Mapped I/O space.</div><div class='add'>+</div><div class='add'>+config WIZNET_BUS_INDIRECT</div><div class='add'>+	bool "Indirect address bus mode"</div><div class='add'>+	---help---</div><div class='add'>+	  In indirect address mode host system indirectly accesses registers</div><div class='add'>+	  using Indirect Mode Address Register and Indirect Mode Data Register,</div><div class='add'>+	  which are directly mapped to Memory-Mapped I/O space.</div><div class='add'>+</div><div class='add'>+config WIZNET_BUS_ANY</div><div class='add'>+	bool "Select interface mode in runtime"</div><div class='add'>+	---help---</div><div class='add'>+	  If interface mode is unknown in compile time, it can be selected</div><div class='add'>+	  in runtime from board/platform resources configuration.</div><div class='add'>+</div><div class='add'>+	  Performance may decrease compared to explicitly selected bus mode.</div><div class='add'>+endchoice</div><div class='add'>+</div><div class='add'>+endif # NET_VENDOR_WIZNET</div><div class='head'>diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile<br/>new file mode 100644<br/>index 000000000000..c614535227e8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/wiznet/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/wiznet/Makefile</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+obj-$(CONFIG_WIZNET_W5100) += w5100.o</div><div class='add'>+obj-$(CONFIG_WIZNET_W5300) += w5300.o</div><div class='head'>diff --git a/drivers/net/ethernet/wiznet/w5100.c b/drivers/net/ethernet/wiznet/w5100.c<br/>new file mode 100644<br/>index 000000000000..a75e9ef5a4ce<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/wiznet/w5100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/wiznet/w5100.c</a></div><div class='hunk'>@@ -0,0 +1,808 @@</div><div class='add'>+/*</div><div class='add'>+ * Ethernet driver for the WIZnet W5100 chip.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2006-2008 WIZnet Co.,Ltd.</div><div class='add'>+ * Copyright (C) 2012 Mike Sinkovsky &lt;msink@permonline.ru&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kconfig.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/wiznet.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_NAME	"w5100"</div><div class='add'>+#define DRV_VERSION	"2012-04-04"</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("WIZnet W5100 Ethernet driver v"DRV_VERSION);</div><div class='add'>+MODULE_AUTHOR("Mike Sinkovsky &lt;msink@permonline.ru&gt;");</div><div class='add'>+MODULE_ALIAS("platform:"DRV_NAME);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Registers</div><div class='add'>+ */</div><div class='add'>+#define W5100_COMMON_REGS	0x0000</div><div class='add'>+#define W5100_MR		0x0000 /* Mode Register */</div><div class='add'>+#define   MR_RST		  0x80 /* S/W reset */</div><div class='add'>+#define   MR_PB			  0x10 /* Ping block */</div><div class='add'>+#define   MR_AI			  0x02 /* Address Auto-Increment */</div><div class='add'>+#define   MR_IND		  0x01 /* Indirect mode */</div><div class='add'>+#define W5100_SHAR		0x0009 /* Source MAC address */</div><div class='add'>+#define W5100_IR		0x0015 /* Interrupt Register */</div><div class='add'>+#define W5100_IMR		0x0016 /* Interrupt Mask Register */</div><div class='add'>+#define   IR_S0			  0x01 /* S0 interrupt */</div><div class='add'>+#define W5100_RTR		0x0017 /* Retry Time-value Register */</div><div class='add'>+#define   RTR_DEFAULT		  2000 /* =0x07d0 (2000) */</div><div class='add'>+#define W5100_RMSR		0x001a /* Receive Memory Size */</div><div class='add'>+#define W5100_TMSR		0x001b /* Transmit Memory Size */</div><div class='add'>+#define W5100_COMMON_REGS_LEN	0x0040</div><div class='add'>+</div><div class='add'>+#define W5100_S0_REGS		0x0400</div><div class='add'>+#define W5100_S0_MR		0x0400 /* S0 Mode Register */</div><div class='add'>+#define   S0_MR_MACRAW		  0x04 /* MAC RAW mode (promiscous) */</div><div class='add'>+#define   S0_MR_MACRAW_MF	  0x44 /* MAC RAW mode (filtered) */</div><div class='add'>+#define W5100_S0_CR		0x0401 /* S0 Command Register */</div><div class='add'>+#define   S0_CR_OPEN		  0x01 /* OPEN command */</div><div class='add'>+#define   S0_CR_CLOSE		  0x10 /* CLOSE command */</div><div class='add'>+#define   S0_CR_SEND		  0x20 /* SEND command */</div><div class='add'>+#define   S0_CR_RECV		  0x40 /* RECV command */</div><div class='add'>+#define W5100_S0_IR		0x0402 /* S0 Interrupt Register */</div><div class='add'>+#define   S0_IR_SENDOK		  0x10 /* complete sending */</div><div class='add'>+#define   S0_IR_RECV		  0x04 /* receiving data */</div><div class='add'>+#define W5100_S0_SR		0x0403 /* S0 Status Register */</div><div class='add'>+#define   S0_SR_MACRAW		  0x42 /* mac raw mode */</div><div class='add'>+#define W5100_S0_TX_FSR		0x0420 /* S0 Transmit free memory size */</div><div class='add'>+#define W5100_S0_TX_RD		0x0422 /* S0 Transmit memory read pointer */</div><div class='add'>+#define W5100_S0_TX_WR		0x0424 /* S0 Transmit memory write pointer */</div><div class='add'>+#define W5100_S0_RX_RSR		0x0426 /* S0 Receive free memory size */</div><div class='add'>+#define W5100_S0_RX_RD		0x0428 /* S0 Receive memory read pointer */</div><div class='add'>+#define W5100_S0_REGS_LEN	0x0040</div><div class='add'>+</div><div class='add'>+#define W5100_TX_MEM_START	0x4000</div><div class='add'>+#define W5100_TX_MEM_END	0x5fff</div><div class='add'>+#define W5100_TX_MEM_MASK	0x1fff</div><div class='add'>+#define W5100_RX_MEM_START	0x6000</div><div class='add'>+#define W5100_RX_MEM_END	0x7fff</div><div class='add'>+#define W5100_RX_MEM_MASK	0x1fff</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Device driver private data structure</div><div class='add'>+ */</div><div class='add'>+struct w5100_priv {</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	spinlock_t reg_lock;</div><div class='add'>+	bool indirect;</div><div class='add'>+	u8   (*read)(struct w5100_priv *priv, u16 addr);</div><div class='add'>+	void (*write)(struct w5100_priv *priv, u16 addr, u8 data);</div><div class='add'>+	u16  (*read16)(struct w5100_priv *priv, u16 addr);</div><div class='add'>+	void (*write16)(struct w5100_priv *priv, u16 addr, u16 data);</div><div class='add'>+	void (*readbuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);</div><div class='add'>+	void (*writebuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);</div><div class='add'>+	int irq;</div><div class='add'>+	int link_irq;</div><div class='add'>+	int link_gpio;</div><div class='add'>+</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	bool promisc;</div><div class='add'>+	u32 msg_enable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/************************************************************************</div><div class='add'>+ *</div><div class='add'>+ *  Lowlevel I/O functions</div><div class='add'>+ *</div><div class='add'>+ ***********************************************************************/</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * In direct address mode host system can directly access W5100 registers</div><div class='add'>+ * after mapping to Memory-Mapped I/O space.</div><div class='add'>+ *</div><div class='add'>+ * 0x8000 bytes are required for memory space.</div><div class='add'>+ */</div><div class='add'>+static inline u8 w5100_read_direct(struct w5100_priv *priv, u16 addr)</div><div class='add'>+{</div><div class='add'>+	return ioread8(priv-&gt;base + (addr &lt;&lt; CONFIG_WIZNET_BUS_SHIFT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void w5100_write_direct(struct w5100_priv *priv,</div><div class='add'>+				      u16 addr, u8 data)</div><div class='add'>+{</div><div class='add'>+	iowrite8(data, priv-&gt;base + (addr &lt;&lt; CONFIG_WIZNET_BUS_SHIFT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 w5100_read16_direct(struct w5100_priv *priv, u16 addr)</div><div class='add'>+{</div><div class='add'>+	u16 data;</div><div class='add'>+	data  = w5100_read_direct(priv, addr) &lt;&lt; 8;</div><div class='add'>+	data |= w5100_read_direct(priv, addr + 1);</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_write16_direct(struct w5100_priv *priv, u16 addr, u16 data)</div><div class='add'>+{</div><div class='add'>+	w5100_write_direct(priv, addr, data &gt;&gt; 8);</div><div class='add'>+	w5100_write_direct(priv, addr + 1, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_readbuf_direct(struct w5100_priv *priv,</div><div class='add'>+				 u16 offset, u8 *buf, int len)</div><div class='add'>+{</div><div class='add'>+	u16 addr = W5100_RX_MEM_START + (offset &amp; W5100_RX_MEM_MASK);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++, addr++) {</div><div class='add'>+		if (unlikely(addr &gt; W5100_RX_MEM_END))</div><div class='add'>+			addr = W5100_RX_MEM_START;</div><div class='add'>+		*buf++ = w5100_read_direct(priv, addr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_writebuf_direct(struct w5100_priv *priv,</div><div class='add'>+				  u16 offset, u8 *buf, int len)</div><div class='add'>+{</div><div class='add'>+	u16 addr = W5100_TX_MEM_START + (offset &amp; W5100_TX_MEM_MASK);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++, addr++) {</div><div class='add'>+		if (unlikely(addr &gt; W5100_TX_MEM_END))</div><div class='add'>+			addr = W5100_TX_MEM_START;</div><div class='add'>+		w5100_write_direct(priv, addr, *buf++);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * In indirect address mode host system indirectly accesses registers by</div><div class='add'>+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data</div><div class='add'>+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.</div><div class='add'>+ * Mode Register (MR) is directly accessible.</div><div class='add'>+ *</div><div class='add'>+ * Only 0x04 bytes are required for memory space.</div><div class='add'>+ */</div><div class='add'>+#define W5100_IDM_AR		0x01   /* Indirect Mode Address Register */</div><div class='add'>+#define W5100_IDM_DR		0x03   /* Indirect Mode Data Register */</div><div class='add'>+</div><div class='add'>+static u8 w5100_read_indirect(struct w5100_priv *priv, u16 addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u8 data;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+	w5100_write16_direct(priv, W5100_IDM_AR, addr);</div><div class='add'>+	mmiowb();</div><div class='add'>+	data = w5100_read_direct(priv, W5100_IDM_DR);</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_write_indirect(struct w5100_priv *priv, u16 addr, u8 data)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+	w5100_write16_direct(priv, W5100_IDM_AR, addr);</div><div class='add'>+	mmiowb();</div><div class='add'>+	w5100_write_direct(priv, W5100_IDM_DR, data);</div><div class='add'>+	mmiowb();</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 w5100_read16_indirect(struct w5100_priv *priv, u16 addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u16 data;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+	w5100_write16_direct(priv, W5100_IDM_AR, addr);</div><div class='add'>+	mmiowb();</div><div class='add'>+	data  = w5100_read_direct(priv, W5100_IDM_DR) &lt;&lt; 8;</div><div class='add'>+	data |= w5100_read_direct(priv, W5100_IDM_DR);</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_write16_indirect(struct w5100_priv *priv, u16 addr, u16 data)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+	w5100_write16_direct(priv, W5100_IDM_AR, addr);</div><div class='add'>+	mmiowb();</div><div class='add'>+	w5100_write_direct(priv, W5100_IDM_DR, data &gt;&gt; 8);</div><div class='add'>+	w5100_write_direct(priv, W5100_IDM_DR, data);</div><div class='add'>+	mmiowb();</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_readbuf_indirect(struct w5100_priv *priv,</div><div class='add'>+				   u16 offset, u8 *buf, int len)</div><div class='add'>+{</div><div class='add'>+	u16 addr = W5100_RX_MEM_START + (offset &amp; W5100_RX_MEM_MASK);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+	w5100_write16_direct(priv, W5100_IDM_AR, addr);</div><div class='add'>+	mmiowb();</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++, addr++) {</div><div class='add'>+		if (unlikely(addr &gt; W5100_RX_MEM_END)) {</div><div class='add'>+			addr = W5100_RX_MEM_START;</div><div class='add'>+			w5100_write16_direct(priv, W5100_IDM_AR, addr);</div><div class='add'>+			mmiowb();</div><div class='add'>+		}</div><div class='add'>+		*buf++ = w5100_read_direct(priv, W5100_IDM_DR);</div><div class='add'>+	}</div><div class='add'>+	mmiowb();</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_writebuf_indirect(struct w5100_priv *priv,</div><div class='add'>+				    u16 offset, u8 *buf, int len)</div><div class='add'>+{</div><div class='add'>+	u16 addr = W5100_TX_MEM_START + (offset &amp; W5100_TX_MEM_MASK);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+	w5100_write16_direct(priv, W5100_IDM_AR, addr);</div><div class='add'>+	mmiowb();</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++, addr++) {</div><div class='add'>+		if (unlikely(addr &gt; W5100_TX_MEM_END)) {</div><div class='add'>+			addr = W5100_TX_MEM_START;</div><div class='add'>+			w5100_write16_direct(priv, W5100_IDM_AR, addr);</div><div class='add'>+			mmiowb();</div><div class='add'>+		}</div><div class='add'>+		w5100_write_direct(priv, W5100_IDM_DR, *buf++);</div><div class='add'>+	}</div><div class='add'>+	mmiowb();</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_WIZNET_BUS_DIRECT)</div><div class='add'>+#define w5100_read	w5100_read_direct</div><div class='add'>+#define w5100_write	w5100_write_direct</div><div class='add'>+#define w5100_read16	w5100_read16_direct</div><div class='add'>+#define w5100_write16	w5100_write16_direct</div><div class='add'>+#define w5100_readbuf	w5100_readbuf_direct</div><div class='add'>+#define w5100_writebuf	w5100_writebuf_direct</div><div class='add'>+</div><div class='add'>+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)</div><div class='add'>+#define w5100_read	w5100_read_indirect</div><div class='add'>+#define w5100_write	w5100_write_indirect</div><div class='add'>+#define w5100_read16	w5100_read16_indirect</div><div class='add'>+#define w5100_write16	w5100_write16_indirect</div><div class='add'>+#define w5100_readbuf	w5100_readbuf_indirect</div><div class='add'>+#define w5100_writebuf	w5100_writebuf_indirect</div><div class='add'>+</div><div class='add'>+#else /* CONFIG_WIZNET_BUS_ANY */</div><div class='add'>+#define w5100_read	priv-&gt;read</div><div class='add'>+#define w5100_write	priv-&gt;write</div><div class='add'>+#define w5100_read16	priv-&gt;read16</div><div class='add'>+#define w5100_write16	priv-&gt;write16</div><div class='add'>+#define w5100_readbuf	priv-&gt;readbuf</div><div class='add'>+#define w5100_writebuf	priv-&gt;writebuf</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int w5100_command(struct w5100_priv *priv, u16 cmd)</div><div class='add'>+{</div><div class='add'>+	unsigned long timeout = jiffies + msecs_to_jiffies(100);</div><div class='add'>+</div><div class='add'>+	w5100_write(priv, W5100_S0_CR, cmd);</div><div class='add'>+	mmiowb();</div><div class='add'>+</div><div class='add'>+	while (w5100_read(priv, W5100_S0_CR) != 0) {</div><div class='add'>+		if (time_after(jiffies, timeout))</div><div class='add'>+			return -EIO;</div><div class='add'>+		cpu_relax();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_write_macaddr(struct w5100_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='add'>+		w5100_write(priv, W5100_SHAR + i, ndev-&gt;dev_addr[i]);</div><div class='add'>+	mmiowb();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_hw_reset(struct w5100_priv *priv)</div><div class='add'>+{</div><div class='add'>+	w5100_write_direct(priv, W5100_MR, MR_RST);</div><div class='add'>+	mmiowb();</div><div class='add'>+	mdelay(5);</div><div class='add'>+	w5100_write_direct(priv, W5100_MR, priv-&gt;indirect ?</div><div class='add'>+				  MR_PB | MR_AI | MR_IND :</div><div class='add'>+				  MR_PB);</div><div class='add'>+	mmiowb();</div><div class='add'>+	w5100_write(priv, W5100_IMR, 0);</div><div class='add'>+	w5100_write_macaddr(priv);</div><div class='add'>+</div><div class='add'>+	/* Configure 16K of internal memory</div><div class='add'>+	 * as 8K RX buffer and 8K TX buffer</div><div class='add'>+	 */</div><div class='add'>+	w5100_write(priv, W5100_RMSR, 0x03);</div><div class='add'>+	w5100_write(priv, W5100_TMSR, 0x03);</div><div class='add'>+	mmiowb();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_hw_start(struct w5100_priv *priv)</div><div class='add'>+{</div><div class='add'>+	w5100_write(priv, W5100_S0_MR, priv-&gt;promisc ?</div><div class='add'>+			  S0_MR_MACRAW : S0_MR_MACRAW_MF);</div><div class='add'>+	mmiowb();</div><div class='add'>+	w5100_command(priv, S0_CR_OPEN);</div><div class='add'>+	w5100_write(priv, W5100_IMR, IR_S0);</div><div class='add'>+	mmiowb();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_hw_close(struct w5100_priv *priv)</div><div class='add'>+{</div><div class='add'>+	w5100_write(priv, W5100_IMR, 0);</div><div class='add'>+	mmiowb();</div><div class='add'>+	w5100_command(priv, S0_CR_CLOSE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/***********************************************************************</div><div class='add'>+ *</div><div class='add'>+ *   Device driver functions / callbacks</div><div class='add'>+ *</div><div class='add'>+ ***********************************************************************/</div><div class='add'>+</div><div class='add'>+static void w5100_get_drvinfo(struct net_device *ndev,</div><div class='add'>+			      struct ethtool_drvinfo *info)</div><div class='add'>+{</div><div class='add'>+	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='add'>+	strlcpy(info-&gt;bus_info, dev_name(ndev-&gt;dev.parent),</div><div class='add'>+		sizeof(info-&gt;bus_info));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 w5100_get_link(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (gpio_is_valid(priv-&gt;link_gpio))</div><div class='add'>+		return !!gpio_get_value(priv-&gt;link_gpio);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 w5100_get_msglevel(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	return priv-&gt;msg_enable;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_set_msglevel(struct net_device *ndev, u32 value)</div><div class='add'>+{</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;msg_enable = value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5100_get_regs_len(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	return W5100_COMMON_REGS_LEN + W5100_S0_REGS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_get_regs(struct net_device *ndev,</div><div class='add'>+			   struct ethtool_regs *regs, void *_buf)</div><div class='add'>+{</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u8 *buf = _buf;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	regs-&gt;version = 1;</div><div class='add'>+	for (i = 0; i &lt; W5100_COMMON_REGS_LEN; i++)</div><div class='add'>+		*buf++ = w5100_read(priv, W5100_COMMON_REGS + i);</div><div class='add'>+	for (i = 0; i &lt; W5100_S0_REGS_LEN; i++)</div><div class='add'>+		*buf++ = w5100_read(priv, W5100_S0_REGS + i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_tx_timeout(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	w5100_hw_reset(priv);</div><div class='add'>+	w5100_hw_start(priv);</div><div class='add'>+	ndev-&gt;stats.tx_errors++;</div><div class='add'>+	ndev-&gt;trans_start = jiffies;</div><div class='add'>+	netif_wake_queue(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5100_start_tx(struct sk_buff *skb, struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u16 offset;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	offset = w5100_read16(priv, W5100_S0_TX_WR);</div><div class='add'>+	w5100_writebuf(priv, offset, skb-&gt;data, skb-&gt;len);</div><div class='add'>+	w5100_write16(priv, W5100_S0_TX_WR, offset + skb-&gt;len);</div><div class='add'>+	mmiowb();</div><div class='add'>+	ndev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='add'>+	ndev-&gt;stats.tx_packets++;</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+	w5100_command(priv, S0_CR_SEND);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5100_napi_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct w5100_priv *priv = container_of(napi, struct w5100_priv, napi);</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int rx_count;</div><div class='add'>+	u16 rx_len;</div><div class='add'>+	u16 offset;</div><div class='add'>+	u8 header[2];</div><div class='add'>+</div><div class='add'>+	for (rx_count = 0; rx_count &lt; budget; rx_count++) {</div><div class='add'>+		u16 rx_buf_len = w5100_read16(priv, W5100_S0_RX_RSR);</div><div class='add'>+		if (rx_buf_len == 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		offset = w5100_read16(priv, W5100_S0_RX_RD);</div><div class='add'>+		w5100_readbuf(priv, offset, header, 2);</div><div class='add'>+		rx_len = get_unaligned_be16(header) - 2;</div><div class='add'>+</div><div class='add'>+		skb = netdev_alloc_skb_ip_align(ndev, rx_len);</div><div class='add'>+		if (unlikely(!skb)) {</div><div class='add'>+			w5100_write16(priv, W5100_S0_RX_RD,</div><div class='add'>+					    offset + rx_buf_len);</div><div class='add'>+			w5100_command(priv, S0_CR_RECV);</div><div class='add'>+			ndev-&gt;stats.rx_dropped++;</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		skb_put(skb, rx_len);</div><div class='add'>+		w5100_readbuf(priv, offset + 2, skb-&gt;data, rx_len);</div><div class='add'>+		w5100_write16(priv, W5100_S0_RX_RD, offset + 2 + rx_len);</div><div class='add'>+		mmiowb();</div><div class='add'>+		w5100_command(priv, S0_CR_RECV);</div><div class='add'>+		skb-&gt;protocol = eth_type_trans(skb, ndev);</div><div class='add'>+</div><div class='add'>+		netif_receive_skb(skb);</div><div class='add'>+		ndev-&gt;stats.rx_packets++;</div><div class='add'>+		ndev-&gt;stats.rx_bytes += rx_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_count &lt; budget) {</div><div class='add'>+		w5100_write(priv, W5100_IMR, IR_S0);</div><div class='add'>+		mmiowb();</div><div class='add'>+		napi_complete(napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rx_count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = ndev_instance;</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	int ir = w5100_read(priv, W5100_S0_IR);</div><div class='add'>+	if (!ir)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	w5100_write(priv, W5100_S0_IR, ir);</div><div class='add'>+	mmiowb();</div><div class='add'>+</div><div class='add'>+	if (ir &amp; S0_IR_SENDOK) {</div><div class='add'>+		netif_dbg(priv, tx_done, ndev, "tx done\n");</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ir &amp; S0_IR_RECV) {</div><div class='add'>+		if (napi_schedule_prep(&amp;priv-&gt;napi)) {</div><div class='add'>+			w5100_write(priv, W5100_IMR, 0);</div><div class='add'>+			mmiowb();</div><div class='add'>+			__napi_schedule(&amp;priv-&gt;napi);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t w5100_detect_link(int irq, void *ndev_instance)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = ndev_instance;</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		if (gpio_get_value(priv-&gt;link_gpio) != 0) {</div><div class='add'>+			netif_info(priv, link, ndev, "link is up\n");</div><div class='add'>+			netif_carrier_on(ndev);</div><div class='add'>+		} else {</div><div class='add'>+			netif_info(priv, link, ndev, "link is down\n");</div><div class='add'>+			netif_carrier_off(ndev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5100_set_rx_mode(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+	bool set_promisc = (ndev-&gt;flags &amp; IFF_PROMISC) != 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;promisc != set_promisc) {</div><div class='add'>+		priv-&gt;promisc = set_promisc;</div><div class='add'>+		w5100_hw_start(priv);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5100_set_macaddr(struct net_device *ndev, void *addr)</div><div class='add'>+{</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct sockaddr *sock_addr = addr;</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(sock_addr-&gt;sa_data))</div><div class='add'>+		return -EADDRNOTAVAIL;</div><div class='add'>+	memcpy(ndev-&gt;dev_addr, sock_addr-&gt;sa_data, ETH_ALEN);</div><div class='add'>+	ndev-&gt;addr_assign_type &amp;= ~NET_ADDR_RANDOM;</div><div class='add'>+	w5100_write_macaddr(priv);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5100_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_info(priv, ifup, ndev, "enabling\n");</div><div class='add'>+	if (!is_valid_ether_addr(ndev-&gt;dev_addr))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	w5100_hw_start(priv);</div><div class='add'>+	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+	if (!gpio_is_valid(priv-&gt;link_gpio) ||</div><div class='add'>+	    gpio_get_value(priv-&gt;link_gpio) != 0)</div><div class='add'>+		netif_carrier_on(ndev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5100_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_info(priv, ifdown, ndev, "shutting down\n");</div><div class='add'>+	w5100_hw_close(priv);</div><div class='add'>+	netif_carrier_off(ndev);</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops w5100_ethtool_ops = {</div><div class='add'>+	.get_drvinfo		= w5100_get_drvinfo,</div><div class='add'>+	.get_msglevel		= w5100_get_msglevel,</div><div class='add'>+	.set_msglevel		= w5100_set_msglevel,</div><div class='add'>+	.get_link		= w5100_get_link,</div><div class='add'>+	.get_regs_len		= w5100_get_regs_len,</div><div class='add'>+	.get_regs		= w5100_get_regs,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops w5100_netdev_ops = {</div><div class='add'>+	.ndo_open		= w5100_open,</div><div class='add'>+	.ndo_stop		= w5100_stop,</div><div class='add'>+	.ndo_start_xmit		= w5100_start_tx,</div><div class='add'>+	.ndo_tx_timeout		= w5100_tx_timeout,</div><div class='add'>+	.ndo_set_rx_mode	= w5100_set_rx_mode,</div><div class='add'>+	.ndo_set_mac_address	= w5100_set_macaddr,</div><div class='add'>+	.ndo_validate_addr	= eth_validate_addr,</div><div class='add'>+	.ndo_change_mtu		= eth_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit w5100_hw_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct wiznet_platform_data *data = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+	const char *name = netdev_name(ndev);</div><div class='add'>+	struct resource *mem;</div><div class='add'>+	int mem_size;</div><div class='add'>+	int irq;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (data &amp;&amp; is_valid_ether_addr(data-&gt;mac_addr)) {</div><div class='add'>+		memcpy(ndev-&gt;dev_addr, data-&gt;mac_addr, ETH_ALEN);</div><div class='add'>+	} else {</div><div class='add'>+		random_ether_addr(ndev-&gt;dev_addr);</div><div class='add'>+		ndev-&gt;addr_assign_type |= NET_ADDR_RANDOM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!mem)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	mem_size = resource_size(mem);</div><div class='add'>+	if (!devm_request_mem_region(&amp;pdev-&gt;dev, mem-&gt;start, mem_size, name))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	priv-&gt;base = devm_ioremap(&amp;pdev-&gt;dev, mem-&gt;start, mem_size);</div><div class='add'>+	if (!priv-&gt;base)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;reg_lock);</div><div class='add'>+	priv-&gt;indirect = mem_size &lt; W5100_BUS_DIRECT_SIZE;</div><div class='add'>+	if (priv-&gt;indirect) {</div><div class='add'>+		priv-&gt;read     = w5100_read_indirect;</div><div class='add'>+		priv-&gt;write    = w5100_write_indirect;</div><div class='add'>+		priv-&gt;read16   = w5100_read16_indirect;</div><div class='add'>+		priv-&gt;write16  = w5100_write16_indirect;</div><div class='add'>+		priv-&gt;readbuf  = w5100_readbuf_indirect;</div><div class='add'>+		priv-&gt;writebuf = w5100_writebuf_indirect;</div><div class='add'>+	} else {</div><div class='add'>+		priv-&gt;read     = w5100_read_direct;</div><div class='add'>+		priv-&gt;write    = w5100_write_direct;</div><div class='add'>+		priv-&gt;read16   = w5100_read16_direct;</div><div class='add'>+		priv-&gt;write16  = w5100_write16_direct;</div><div class='add'>+		priv-&gt;readbuf  = w5100_readbuf_direct;</div><div class='add'>+		priv-&gt;writebuf = w5100_writebuf_direct;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	w5100_hw_reset(priv);</div><div class='add'>+	if (w5100_read16(priv, W5100_RTR) != RTR_DEFAULT)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return irq;</div><div class='add'>+	ret = request_irq(irq, w5100_interrupt,</div><div class='add'>+			  IRQ_TYPE_LEVEL_LOW, name, ndev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	priv-&gt;irq = irq;</div><div class='add'>+</div><div class='add'>+	priv-&gt;link_gpio = data ? data-&gt;link_gpio : -EINVAL;</div><div class='add'>+	if (gpio_is_valid(priv-&gt;link_gpio)) {</div><div class='add'>+		char *link_name = devm_kzalloc(&amp;pdev-&gt;dev, 16, GFP_KERNEL);</div><div class='add'>+		if (!link_name)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		snprintf(link_name, 16, "%s-link", name);</div><div class='add'>+		priv-&gt;link_irq = gpio_to_irq(priv-&gt;link_gpio);</div><div class='add'>+		if (request_any_context_irq(priv-&gt;link_irq, w5100_detect_link,</div><div class='add'>+				IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,</div><div class='add'>+				link_name, priv-&gt;ndev) &lt; 0)</div><div class='add'>+			priv-&gt;link_gpio = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem-&gt;start, irq);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit w5100_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct w5100_priv *priv;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ndev = alloc_etherdev(sizeof(*priv));</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='add'>+	platform_set_drvdata(pdev, ndev);</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+</div><div class='add'>+	ether_setup(ndev);</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;w5100_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;w5100_ethtool_ops;</div><div class='add'>+	ndev-&gt;watchdog_timeo = HZ;</div><div class='add'>+	netif_napi_add(ndev, &amp;priv-&gt;napi, w5100_napi_poll, 16);</div><div class='add'>+</div><div class='add'>+	/* This chip doesn't support VLAN packets with normal MTU,</div><div class='add'>+	 * so disable VLAN for this device.</div><div class='add'>+	 */</div><div class='add'>+	ndev-&gt;features |= NETIF_F_VLAN_CHALLENGED;</div><div class='add'>+</div><div class='add'>+	err = register_netdev(ndev);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_register;</div><div class='add'>+</div><div class='add'>+	err = w5100_hw_probe(pdev);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_hw_probe;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_hw_probe:</div><div class='add'>+	unregister_netdev(ndev);</div><div class='add'>+err_register:</div><div class='add'>+	free_netdev(ndev);</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit w5100_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	w5100_hw_reset(priv);</div><div class='add'>+	free_irq(priv-&gt;irq, ndev);</div><div class='add'>+	if (gpio_is_valid(priv-&gt;link_gpio))</div><div class='add'>+		free_irq(priv-&gt;link_irq, ndev);</div><div class='add'>+</div><div class='add'>+	unregister_netdev(ndev);</div><div class='add'>+	free_netdev(ndev);</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+static int w5100_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev);</div><div class='add'>+	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		netif_carrier_off(ndev);</div><div class='add'>+		netif_device_detach(ndev);</div><div class='add'>+</div><div class='add'>+		w5100_hw_close(priv);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5100_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev);</div><div class='add'>+	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct w5100_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		w5100_hw_reset(priv);</div><div class='add'>+		w5100_hw_start(priv);</div><div class='add'>+</div><div class='add'>+		netif_device_attach(ndev);</div><div class='add'>+		if (!gpio_is_valid(priv-&gt;link_gpio) ||</div><div class='add'>+		    gpio_get_value(priv-&gt;link_gpio) != 0)</div><div class='add'>+			netif_carrier_on(ndev);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_PM */</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(w5100_pm_ops, w5100_suspend, w5100_resume);</div><div class='add'>+</div><div class='add'>+static struct platform_driver w5100_driver = {</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= DRV_NAME,</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+		.pm	= &amp;w5100_pm_ops,</div><div class='add'>+	},</div><div class='add'>+	.probe		= w5100_probe,</div><div class='add'>+	.remove		= __devexit_p(w5100_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(w5100_driver);</div><div class='head'>diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c<br/>new file mode 100644<br/>index 000000000000..3306a20ec211<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/wiznet/w5300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/wiznet/w5300.c</a></div><div class='hunk'>@@ -0,0 +1,720 @@</div><div class='add'>+/*</div><div class='add'>+ * Ethernet driver for the WIZnet W5300 chip.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2008-2009 WIZnet Co.,Ltd.</div><div class='add'>+ * Copyright (C) 2011 Taehun Kim &lt;kth3321 &lt;at&gt; gmail.com&gt;</div><div class='add'>+ * Copyright (C) 2012 Mike Sinkovsky &lt;msink@permonline.ru&gt;</div><div class='add'>+ *</div><div class='add'>+ * Licensed under the GPL-2 or later.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kconfig.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/wiznet.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_NAME	"w5300"</div><div class='add'>+#define DRV_VERSION	"2012-04-04"</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION);</div><div class='add'>+MODULE_AUTHOR("Mike Sinkovsky &lt;msink@permonline.ru&gt;");</div><div class='add'>+MODULE_ALIAS("platform:"DRV_NAME);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Registers</div><div class='add'>+ */</div><div class='add'>+#define W5300_MR		0x0000	/* Mode Register */</div><div class='add'>+#define   MR_DBW		  (1 &lt;&lt; 15) /* Data bus width */</div><div class='add'>+#define   MR_MPF		  (1 &lt;&lt; 14) /* Mac layer pause frame */</div><div class='add'>+#define   MR_WDF(n)		  (((n)&amp;7)&lt;&lt;11) /* Write data fetch time */</div><div class='add'>+#define   MR_RDH		  (1 &lt;&lt; 10) /* Read data hold time */</div><div class='add'>+#define   MR_FS			  (1 &lt;&lt; 8)  /* FIFO swap */</div><div class='add'>+#define   MR_RST		  (1 &lt;&lt; 7)  /* S/W reset */</div><div class='add'>+#define   MR_PB			  (1 &lt;&lt; 4)  /* Ping block */</div><div class='add'>+#define   MR_DBS		  (1 &lt;&lt; 2)  /* Data bus swap */</div><div class='add'>+#define   MR_IND		  (1 &lt;&lt; 0)  /* Indirect mode */</div><div class='add'>+#define W5300_IR		0x0002	/* Interrupt Register */</div><div class='add'>+#define W5300_IMR		0x0004	/* Interrupt Mask Register */</div><div class='add'>+#define   IR_S0			  0x0001  /* S0 interrupt */</div><div class='add'>+#define W5300_SHARL		0x0008	/* Source MAC address (0123) */</div><div class='add'>+#define W5300_SHARH		0x000c	/* Source MAC address (45) */</div><div class='add'>+#define W5300_TMSRL		0x0020	/* Transmit Memory Size (0123) */</div><div class='add'>+#define W5300_TMSRH		0x0024	/* Transmit Memory Size (4567) */</div><div class='add'>+#define W5300_RMSRL		0x0028	/* Receive Memory Size (0123) */</div><div class='add'>+#define W5300_RMSRH		0x002c	/* Receive Memory Size (4567) */</div><div class='add'>+#define W5300_MTYPE		0x0030	/* Memory Type */</div><div class='add'>+#define W5300_IDR		0x00fe	/* Chip ID register */</div><div class='add'>+#define   IDR_W5300		  0x5300  /* =0x5300 for WIZnet W5300 */</div><div class='add'>+#define W5300_S0_MR		0x0200	/* S0 Mode Register */</div><div class='add'>+#define   S0_MR_CLOSED		  0x0000  /* Close mode */</div><div class='add'>+#define   S0_MR_MACRAW		  0x0004  /* MAC RAW mode (promiscous) */</div><div class='add'>+#define   S0_MR_MACRAW_MF	  0x0044  /* MAC RAW mode (filtered) */</div><div class='add'>+#define W5300_S0_CR		0x0202	/* S0 Command Register */</div><div class='add'>+#define   S0_CR_OPEN		  0x0001  /* OPEN command */</div><div class='add'>+#define   S0_CR_CLOSE		  0x0010  /* CLOSE command */</div><div class='add'>+#define   S0_CR_SEND		  0x0020  /* SEND command */</div><div class='add'>+#define   S0_CR_RECV		  0x0040  /* RECV command */</div><div class='add'>+#define W5300_S0_IMR		0x0204	/* S0 Interrupt Mask Register */</div><div class='add'>+#define W5300_S0_IR		0x0206	/* S0 Interrupt Register */</div><div class='add'>+#define   S0_IR_RECV		  0x0004  /* Receive interrupt */</div><div class='add'>+#define   S0_IR_SENDOK		  0x0010  /* Send OK interrupt */</div><div class='add'>+#define W5300_S0_SSR		0x0208	/* S0 Socket Status Register */</div><div class='add'>+#define W5300_S0_TX_WRSR	0x0220	/* S0 TX Write Size Register */</div><div class='add'>+#define W5300_S0_TX_FSR		0x0224	/* S0 TX Free Size Register */</div><div class='add'>+#define W5300_S0_RX_RSR		0x0228	/* S0 Received data Size */</div><div class='add'>+#define W5300_S0_TX_FIFO	0x022e	/* S0 Transmit FIFO */</div><div class='add'>+#define W5300_S0_RX_FIFO	0x0230	/* S0 Receive FIFO */</div><div class='add'>+#define W5300_REGS_LEN		0x0400</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Device driver private data structure</div><div class='add'>+ */</div><div class='add'>+struct w5300_priv {</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	spinlock_t reg_lock;</div><div class='add'>+	bool indirect;</div><div class='add'>+	u16  (*read) (struct w5300_priv *priv, u16 addr);</div><div class='add'>+	void (*write)(struct w5300_priv *priv, u16 addr, u16 data);</div><div class='add'>+	int irq;</div><div class='add'>+	int link_irq;</div><div class='add'>+	int link_gpio;</div><div class='add'>+</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	bool promisc;</div><div class='add'>+	u32 msg_enable;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/************************************************************************</div><div class='add'>+ *</div><div class='add'>+ *  Lowlevel I/O functions</div><div class='add'>+ *</div><div class='add'>+ ***********************************************************************/</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * In direct address mode host system can directly access W5300 registers</div><div class='add'>+ * after mapping to Memory-Mapped I/O space.</div><div class='add'>+ *</div><div class='add'>+ * 0x400 bytes are required for memory space.</div><div class='add'>+ */</div><div class='add'>+static inline u16 w5300_read_direct(struct w5300_priv *priv, u16 addr)</div><div class='add'>+{</div><div class='add'>+	return ioread16(priv-&gt;base + (addr &lt;&lt; CONFIG_WIZNET_BUS_SHIFT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void w5300_write_direct(struct w5300_priv *priv,</div><div class='add'>+				      u16 addr, u16 data)</div><div class='add'>+{</div><div class='add'>+	iowrite16(data, priv-&gt;base + (addr &lt;&lt; CONFIG_WIZNET_BUS_SHIFT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * In indirect address mode host system indirectly accesses registers by</div><div class='add'>+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data</div><div class='add'>+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.</div><div class='add'>+ * Mode Register (MR) is directly accessible.</div><div class='add'>+ *</div><div class='add'>+ * Only 0x06 bytes are required for memory space.</div><div class='add'>+ */</div><div class='add'>+#define W5300_IDM_AR		0x0002	 /* Indirect Mode Address */</div><div class='add'>+#define W5300_IDM_DR		0x0004	 /* Indirect Mode Data */</div><div class='add'>+</div><div class='add'>+static u16 w5300_read_indirect(struct w5300_priv *priv, u16 addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u16 data;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+	w5300_write_direct(priv, W5300_IDM_AR, addr);</div><div class='add'>+	mmiowb();</div><div class='add'>+	data = w5300_read_direct(priv, W5300_IDM_DR);</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5300_write_indirect(struct w5300_priv *priv, u16 addr, u16 data)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+	w5300_write_direct(priv, W5300_IDM_AR, addr);</div><div class='add'>+	mmiowb();</div><div class='add'>+	w5300_write_direct(priv, W5300_IDM_DR, data);</div><div class='add'>+	mmiowb();</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;reg_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_WIZNET_BUS_DIRECT)</div><div class='add'>+#define w5300_read	w5300_read_direct</div><div class='add'>+#define w5300_write	w5300_write_direct</div><div class='add'>+</div><div class='add'>+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)</div><div class='add'>+#define w5300_read	w5300_read_indirect</div><div class='add'>+#define w5300_write	w5300_write_indirect</div><div class='add'>+</div><div class='add'>+#else /* CONFIG_WIZNET_BUS_ANY */</div><div class='add'>+#define w5300_read	priv-&gt;read</div><div class='add'>+#define w5300_write	priv-&gt;write</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static u32 w5300_read32(struct w5300_priv *priv, u16 addr)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+	data  = w5300_read(priv, addr) &lt;&lt; 16;</div><div class='add'>+	data |= w5300_read(priv, addr + 2);</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5300_write32(struct w5300_priv *priv, u16 addr, u32 data)</div><div class='add'>+{</div><div class='add'>+	w5300_write(priv, addr, data &gt;&gt; 16);</div><div class='add'>+	w5300_write(priv, addr + 2, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5300_command(struct w5300_priv *priv, u16 cmd)</div><div class='add'>+{</div><div class='add'>+	unsigned long timeout = jiffies + msecs_to_jiffies(100);</div><div class='add'>+</div><div class='add'>+	w5300_write(priv, W5300_S0_CR, cmd);</div><div class='add'>+	mmiowb();</div><div class='add'>+</div><div class='add'>+	while (w5300_read(priv, W5300_S0_CR) != 0) {</div><div class='add'>+		if (time_after(jiffies, timeout))</div><div class='add'>+			return -EIO;</div><div class='add'>+		cpu_relax();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5300_read_frame(struct w5300_priv *priv, u8 *buf, int len)</div><div class='add'>+{</div><div class='add'>+	u16 fifo;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i += 2) {</div><div class='add'>+		fifo = w5300_read(priv, W5300_S0_RX_FIFO);</div><div class='add'>+		*buf++ = fifo &gt;&gt; 8;</div><div class='add'>+		*buf++ = fifo;</div><div class='add'>+	}</div><div class='add'>+	fifo = w5300_read(priv, W5300_S0_RX_FIFO);</div><div class='add'>+	fifo = w5300_read(priv, W5300_S0_RX_FIFO);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5300_write_frame(struct w5300_priv *priv, u8 *buf, int len)</div><div class='add'>+{</div><div class='add'>+	u16 fifo;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i += 2) {</div><div class='add'>+		fifo  = *buf++ &lt;&lt; 8;</div><div class='add'>+		fifo |= *buf++;</div><div class='add'>+		w5300_write(priv, W5300_S0_TX_FIFO, fifo);</div><div class='add'>+	}</div><div class='add'>+	w5300_write32(priv, W5300_S0_TX_WRSR, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5300_write_macaddr(struct w5300_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	w5300_write32(priv, W5300_SHARL,</div><div class='add'>+		      ndev-&gt;dev_addr[0] &lt;&lt; 24 |</div><div class='add'>+		      ndev-&gt;dev_addr[1] &lt;&lt; 16 |</div><div class='add'>+		      ndev-&gt;dev_addr[2] &lt;&lt; 8 |</div><div class='add'>+		      ndev-&gt;dev_addr[3]);</div><div class='add'>+	w5300_write(priv, W5300_SHARH,</div><div class='add'>+		      ndev-&gt;dev_addr[4] &lt;&lt; 8 |</div><div class='add'>+		      ndev-&gt;dev_addr[5]);</div><div class='add'>+	mmiowb();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5300_hw_reset(struct w5300_priv *priv)</div><div class='add'>+{</div><div class='add'>+	w5300_write_direct(priv, W5300_MR, MR_RST);</div><div class='add'>+	mmiowb();</div><div class='add'>+	mdelay(5);</div><div class='add'>+	w5300_write_direct(priv, W5300_MR, priv-&gt;indirect ?</div><div class='add'>+				 MR_WDF(7) | MR_PB | MR_IND :</div><div class='add'>+				 MR_WDF(7) | MR_PB);</div><div class='add'>+	mmiowb();</div><div class='add'>+	w5300_write(priv, W5300_IMR, 0);</div><div class='add'>+	w5300_write_macaddr(priv);</div><div class='add'>+</div><div class='add'>+	/* Configure 128K of internal memory</div><div class='add'>+	 * as 64K RX fifo and 64K TX fifo</div><div class='add'>+	 */</div><div class='add'>+	w5300_write32(priv, W5300_RMSRL, 64 &lt;&lt; 24);</div><div class='add'>+	w5300_write32(priv, W5300_RMSRH, 0);</div><div class='add'>+	w5300_write32(priv, W5300_TMSRL, 64 &lt;&lt; 24);</div><div class='add'>+	w5300_write32(priv, W5300_TMSRH, 0);</div><div class='add'>+	w5300_write(priv, W5300_MTYPE, 0x00ff);</div><div class='add'>+	mmiowb();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5300_hw_start(struct w5300_priv *priv)</div><div class='add'>+{</div><div class='add'>+	w5300_write(priv, W5300_S0_MR, priv-&gt;promisc ?</div><div class='add'>+			  S0_MR_MACRAW : S0_MR_MACRAW_MF);</div><div class='add'>+	mmiowb();</div><div class='add'>+	w5300_command(priv, S0_CR_OPEN);</div><div class='add'>+	w5300_write(priv, W5300_S0_IMR, S0_IR_RECV | S0_IR_SENDOK);</div><div class='add'>+	w5300_write(priv, W5300_IMR, IR_S0);</div><div class='add'>+	mmiowb();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5300_hw_close(struct w5300_priv *priv)</div><div class='add'>+{</div><div class='add'>+	w5300_write(priv, W5300_IMR, 0);</div><div class='add'>+	mmiowb();</div><div class='add'>+	w5300_command(priv, S0_CR_CLOSE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/***********************************************************************</div><div class='add'>+ *</div><div class='add'>+ *   Device driver functions / callbacks</div><div class='add'>+ *</div><div class='add'>+ ***********************************************************************/</div><div class='add'>+</div><div class='add'>+static void w5300_get_drvinfo(struct net_device *ndev,</div><div class='add'>+			      struct ethtool_drvinfo *info)</div><div class='add'>+{</div><div class='add'>+	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='add'>+	strlcpy(info-&gt;bus_info, dev_name(ndev-&gt;dev.parent),</div><div class='add'>+		sizeof(info-&gt;bus_info));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 w5300_get_link(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (gpio_is_valid(priv-&gt;link_gpio))</div><div class='add'>+		return !!gpio_get_value(priv-&gt;link_gpio);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 w5300_get_msglevel(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	return priv-&gt;msg_enable;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5300_set_msglevel(struct net_device *ndev, u32 value)</div><div class='add'>+{</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;msg_enable = value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5300_get_regs_len(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	return W5300_REGS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5300_get_regs(struct net_device *ndev,</div><div class='add'>+			   struct ethtool_regs *regs, void *_buf)</div><div class='add'>+{</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u8 *buf = _buf;</div><div class='add'>+	u16 addr;</div><div class='add'>+	u16 data;</div><div class='add'>+</div><div class='add'>+	regs-&gt;version = 1;</div><div class='add'>+	for (addr = 0; addr &lt; W5300_REGS_LEN; addr += 2) {</div><div class='add'>+		switch (addr &amp; 0x23f) {</div><div class='add'>+		case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */</div><div class='add'>+		case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */</div><div class='add'>+			data = 0xffff;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			data = w5300_read(priv, addr);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		*buf++ = data &gt;&gt; 8;</div><div class='add'>+		*buf++ = data;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5300_tx_timeout(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	w5300_hw_reset(priv);</div><div class='add'>+	w5300_hw_start(priv);</div><div class='add'>+	ndev-&gt;stats.tx_errors++;</div><div class='add'>+	ndev-&gt;trans_start = jiffies;</div><div class='add'>+	netif_wake_queue(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	w5300_write_frame(priv, skb-&gt;data, skb-&gt;len);</div><div class='add'>+	mmiowb();</div><div class='add'>+	ndev-&gt;stats.tx_packets++;</div><div class='add'>+	ndev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='add'>+	netif_dbg(priv, tx_queued, ndev, "tx queued\n");</div><div class='add'>+</div><div class='add'>+	w5300_command(priv, S0_CR_SEND);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5300_napi_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct w5300_priv *priv = container_of(napi, struct w5300_priv, napi);</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int rx_count;</div><div class='add'>+	u16 rx_len;</div><div class='add'>+</div><div class='add'>+	for (rx_count = 0; rx_count &lt; budget; rx_count++) {</div><div class='add'>+		u32 rx_fifo_len = w5300_read32(priv, W5300_S0_RX_RSR);</div><div class='add'>+		if (rx_fifo_len == 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		rx_len = w5300_read(priv, W5300_S0_RX_FIFO);</div><div class='add'>+</div><div class='add'>+		skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_len, 2));</div><div class='add'>+		if (unlikely(!skb)) {</div><div class='add'>+			u32 i;</div><div class='add'>+			for (i = 0; i &lt; rx_fifo_len; i += 2)</div><div class='add'>+				w5300_read(priv, W5300_S0_RX_FIFO);</div><div class='add'>+			ndev-&gt;stats.rx_dropped++;</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		skb_put(skb, rx_len);</div><div class='add'>+		w5300_read_frame(priv, skb-&gt;data, rx_len);</div><div class='add'>+		skb-&gt;protocol = eth_type_trans(skb, ndev);</div><div class='add'>+</div><div class='add'>+		netif_receive_skb(skb);</div><div class='add'>+		ndev-&gt;stats.rx_packets++;</div><div class='add'>+		ndev-&gt;stats.rx_bytes += rx_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_count &lt; budget) {</div><div class='add'>+		w5300_write(priv, W5300_IMR, IR_S0);</div><div class='add'>+		mmiowb();</div><div class='add'>+		napi_complete(napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rx_count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t w5300_interrupt(int irq, void *ndev_instance)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = ndev_instance;</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	int ir = w5300_read(priv, W5300_S0_IR);</div><div class='add'>+	if (!ir)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	w5300_write(priv, W5300_S0_IR, ir);</div><div class='add'>+	mmiowb();</div><div class='add'>+</div><div class='add'>+	if (ir &amp; S0_IR_SENDOK) {</div><div class='add'>+		netif_dbg(priv, tx_done, ndev, "tx done\n");</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ir &amp; S0_IR_RECV) {</div><div class='add'>+		if (napi_schedule_prep(&amp;priv-&gt;napi)) {</div><div class='add'>+			w5300_write(priv, W5300_IMR, 0);</div><div class='add'>+			mmiowb();</div><div class='add'>+			__napi_schedule(&amp;priv-&gt;napi);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = ndev_instance;</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		if (gpio_get_value(priv-&gt;link_gpio) != 0) {</div><div class='add'>+			netif_info(priv, link, ndev, "link is up\n");</div><div class='add'>+			netif_carrier_on(ndev);</div><div class='add'>+		} else {</div><div class='add'>+			netif_info(priv, link, ndev, "link is down\n");</div><div class='add'>+			netif_carrier_off(ndev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void w5300_set_rx_mode(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+	bool set_promisc = (ndev-&gt;flags &amp; IFF_PROMISC) != 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;promisc != set_promisc) {</div><div class='add'>+		priv-&gt;promisc = set_promisc;</div><div class='add'>+		w5300_hw_start(priv);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5300_set_macaddr(struct net_device *ndev, void *addr)</div><div class='add'>+{</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct sockaddr *sock_addr = addr;</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(sock_addr-&gt;sa_data))</div><div class='add'>+		return -EADDRNOTAVAIL;</div><div class='add'>+	memcpy(ndev-&gt;dev_addr, sock_addr-&gt;sa_data, ETH_ALEN);</div><div class='add'>+	ndev-&gt;addr_assign_type &amp;= ~NET_ADDR_RANDOM;</div><div class='add'>+	w5300_write_macaddr(priv);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5300_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_info(priv, ifup, ndev, "enabling\n");</div><div class='add'>+	if (!is_valid_ether_addr(ndev-&gt;dev_addr))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	w5300_hw_start(priv);</div><div class='add'>+	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+	if (!gpio_is_valid(priv-&gt;link_gpio) ||</div><div class='add'>+	    gpio_get_value(priv-&gt;link_gpio) != 0)</div><div class='add'>+		netif_carrier_on(ndev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5300_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_info(priv, ifdown, ndev, "shutting down\n");</div><div class='add'>+	w5300_hw_close(priv);</div><div class='add'>+	netif_carrier_off(ndev);</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops w5300_ethtool_ops = {</div><div class='add'>+	.get_drvinfo		= w5300_get_drvinfo,</div><div class='add'>+	.get_msglevel		= w5300_get_msglevel,</div><div class='add'>+	.set_msglevel		= w5300_set_msglevel,</div><div class='add'>+	.get_link		= w5300_get_link,</div><div class='add'>+	.get_regs_len		= w5300_get_regs_len,</div><div class='add'>+	.get_regs		= w5300_get_regs,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops w5300_netdev_ops = {</div><div class='add'>+	.ndo_open		= w5300_open,</div><div class='add'>+	.ndo_stop		= w5300_stop,</div><div class='add'>+	.ndo_start_xmit		= w5300_start_tx,</div><div class='add'>+	.ndo_tx_timeout		= w5300_tx_timeout,</div><div class='add'>+	.ndo_set_rx_mode	= w5300_set_rx_mode,</div><div class='add'>+	.ndo_set_mac_address	= w5300_set_macaddr,</div><div class='add'>+	.ndo_validate_addr	= eth_validate_addr,</div><div class='add'>+	.ndo_change_mtu		= eth_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit w5300_hw_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct wiznet_platform_data *data = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+	const char *name = netdev_name(ndev);</div><div class='add'>+	struct resource *mem;</div><div class='add'>+	int mem_size;</div><div class='add'>+	int irq;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (data &amp;&amp; is_valid_ether_addr(data-&gt;mac_addr)) {</div><div class='add'>+		memcpy(ndev-&gt;dev_addr, data-&gt;mac_addr, ETH_ALEN);</div><div class='add'>+	} else {</div><div class='add'>+		random_ether_addr(ndev-&gt;dev_addr);</div><div class='add'>+		ndev-&gt;addr_assign_type |= NET_ADDR_RANDOM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!mem)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	mem_size = resource_size(mem);</div><div class='add'>+	if (!devm_request_mem_region(&amp;pdev-&gt;dev, mem-&gt;start, mem_size, name))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	priv-&gt;base = devm_ioremap(&amp;pdev-&gt;dev, mem-&gt;start, mem_size);</div><div class='add'>+	if (!priv-&gt;base)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;reg_lock);</div><div class='add'>+	priv-&gt;indirect = mem_size &lt; W5300_BUS_DIRECT_SIZE;</div><div class='add'>+	if (priv-&gt;indirect) {</div><div class='add'>+		priv-&gt;read  = w5300_read_indirect;</div><div class='add'>+		priv-&gt;write = w5300_write_indirect;</div><div class='add'>+	} else {</div><div class='add'>+		priv-&gt;read  = w5300_read_direct;</div><div class='add'>+		priv-&gt;write = w5300_write_direct;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	w5300_hw_reset(priv);</div><div class='add'>+	if (w5300_read(priv, W5300_IDR) != IDR_W5300)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return irq;</div><div class='add'>+	ret = request_irq(irq, w5300_interrupt,</div><div class='add'>+			  IRQ_TYPE_LEVEL_LOW, name, ndev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	priv-&gt;irq = irq;</div><div class='add'>+</div><div class='add'>+	priv-&gt;link_gpio = data ? data-&gt;link_gpio : -EINVAL;</div><div class='add'>+	if (gpio_is_valid(priv-&gt;link_gpio)) {</div><div class='add'>+		char *link_name = devm_kzalloc(&amp;pdev-&gt;dev, 16, GFP_KERNEL);</div><div class='add'>+		if (!link_name)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		snprintf(link_name, 16, "%s-link", name);</div><div class='add'>+		priv-&gt;link_irq = gpio_to_irq(priv-&gt;link_gpio);</div><div class='add'>+		if (request_any_context_irq(priv-&gt;link_irq, w5300_detect_link,</div><div class='add'>+				IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,</div><div class='add'>+				link_name, priv-&gt;ndev) &lt; 0)</div><div class='add'>+			priv-&gt;link_gpio = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem-&gt;start, irq);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit w5300_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct w5300_priv *priv;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ndev = alloc_etherdev(sizeof(*priv));</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='add'>+	platform_set_drvdata(pdev, ndev);</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+</div><div class='add'>+	ether_setup(ndev);</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;w5300_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;w5300_ethtool_ops;</div><div class='add'>+	ndev-&gt;watchdog_timeo = HZ;</div><div class='add'>+	netif_napi_add(ndev, &amp;priv-&gt;napi, w5300_napi_poll, 16);</div><div class='add'>+</div><div class='add'>+	/* This chip doesn't support VLAN packets with normal MTU,</div><div class='add'>+	 * so disable VLAN for this device.</div><div class='add'>+	 */</div><div class='add'>+	ndev-&gt;features |= NETIF_F_VLAN_CHALLENGED;</div><div class='add'>+</div><div class='add'>+	err = register_netdev(ndev);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_register;</div><div class='add'>+</div><div class='add'>+	err = w5300_hw_probe(pdev);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_hw_probe;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_hw_probe:</div><div class='add'>+	unregister_netdev(ndev);</div><div class='add'>+err_register:</div><div class='add'>+	free_netdev(ndev);</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit w5300_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	w5300_hw_reset(priv);</div><div class='add'>+	free_irq(priv-&gt;irq, ndev);</div><div class='add'>+	if (gpio_is_valid(priv-&gt;link_gpio))</div><div class='add'>+		free_irq(priv-&gt;link_irq, ndev);</div><div class='add'>+</div><div class='add'>+	unregister_netdev(ndev);</div><div class='add'>+	free_netdev(ndev);</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+static int w5300_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev);</div><div class='add'>+	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		netif_carrier_off(ndev);</div><div class='add'>+		netif_device_detach(ndev);</div><div class='add'>+</div><div class='add'>+		w5300_hw_close(priv);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int w5300_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev);</div><div class='add'>+	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct w5300_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (!netif_running(ndev)) {</div><div class='add'>+		w5300_hw_reset(priv);</div><div class='add'>+		w5300_hw_start(priv);</div><div class='add'>+</div><div class='add'>+		netif_device_attach(ndev);</div><div class='add'>+		if (!gpio_is_valid(priv-&gt;link_gpio) ||</div><div class='add'>+		    gpio_get_value(priv-&gt;link_gpio) != 0)</div><div class='add'>+			netif_carrier_on(ndev);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_PM */</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume);</div><div class='add'>+</div><div class='add'>+static struct platform_driver w5300_driver = {</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= DRV_NAME,</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+		.pm	= &amp;w5300_pm_ops,</div><div class='add'>+	},</div><div class='add'>+	.probe		= w5300_probe,</div><div class='add'>+	.remove		= __devexit_p(w5300_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(w5300_driver);</div><div class='head'>diff --git a/drivers/net/ethernet/xilinx/ll_temac_main.c b/drivers/net/ethernet/xilinx/ll_temac_main.c<br/>index d21591a2c593..1eaf7128afee 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xilinx/ll_temac_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xilinx/ll_temac_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/xilinx/ll_temac_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xilinx/ll_temac_main.c</a></div><div class='hunk'>@@ -1000,6 +1000,7 @@ static const struct ethtool_ops temac_ethtool_ops = {</div><div class='ctx'> 	.set_settings = temac_set_settings,</div><div class='ctx'> 	.nway_reset = temac_nway_reset,</div><div class='ctx'> 	.get_link = ethtool_op_get_link,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __devinit temac_of_probe(struct platform_device *op)</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/Kconfig b/drivers/net/ethernet/xscale/Kconfig<br/>index cf67352cea14..3f431019e615 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/Kconfig</a></div><div class='hunk'>@@ -5,8 +5,8 @@</div><div class='ctx'> config NET_VENDOR_XSCALE</div><div class='ctx'> 	bool "Intel XScale IXP devices"</div><div class='ctx'> 	default y</div><div class='del'>-	depends on NET_VENDOR_INTEL &amp;&amp; ((ARM &amp;&amp; ARCH_IXP4XX &amp;&amp; \</div><div class='del'>-		   IXP4XX_NPE &amp;&amp; IXP4XX_QMGR) || ARCH_ENP2611)</div><div class='add'>+	depends on NET_VENDOR_INTEL &amp;&amp; (ARM &amp;&amp; ARCH_IXP4XX &amp;&amp; \</div><div class='add'>+		   IXP4XX_NPE &amp;&amp; IXP4XX_QMGR)</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  If you have a network (Ethernet) card belonging to this class, say Y</div><div class='ctx'> 	  and read the Ethernet-HOWTO, available from</div><div class='hunk'>@@ -27,6 +27,4 @@ config IXP4XX_ETH</div><div class='ctx'> 	  Say Y here if you want to use built-in Ethernet ports</div><div class='ctx'> 	  on IXP4xx processor.</div><div class='ctx'> </div><div class='del'>-source "drivers/net/ethernet/xscale/ixp2000/Kconfig"</div><div class='del'>-</div><div class='ctx'> endif # NET_VENDOR_XSCALE</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/Makefile b/drivers/net/ethernet/xscale/Makefile<br/>index b195b9d7fe81..abc3b031fba7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/Makefile</a></div><div class='hunk'>@@ -2,5 +2,4 @@</div><div class='ctx'> # Makefile for the Intel XScale IXP device drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_ENP2611_MSF_NET) += ixp2000/</div><div class='ctx'> obj-$(CONFIG_IXP4XX_ETH) += ixp4xx_eth.o</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/Kconfig b/drivers/net/ethernet/xscale/ixp2000/Kconfig<br/>deleted file mode 100644<br/>index 58dbc5b876bc..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,6 +0,0 @@</div><div class='del'>-config ENP2611_MSF_NET</div><div class='del'>-	tristate "Radisys ENP2611 MSF network interface support"</div><div class='del'>-	depends on ARCH_ENP2611</div><div class='del'>-	---help---</div><div class='del'>-	  This is a driver for the MSF network interface unit in</div><div class='del'>-	  the IXP2400 on the Radisys ENP2611 platform.</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/Makefile b/drivers/net/ethernet/xscale/ixp2000/Makefile<br/>deleted file mode 100644<br/>index fd38351ceaa7..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,3 +0,0 @@</div><div class='del'>-obj-$(CONFIG_ENP2611_MSF_NET) += enp2611_mod.o</div><div class='del'>-</div><div class='del'>-enp2611_mod-objs := caleb.o enp2611.o ixp2400-msf.o ixpdev.o pm3386.o</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/caleb.c b/drivers/net/ethernet/xscale/ixp2000/caleb.c<br/>deleted file mode 100644<br/>index 7dea5b95012c..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/caleb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/caleb.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,136 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Helper functions for the SPI-3 bridge FPGA on the Radisys ENP2611</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include "caleb.h"</div><div class='del'>-</div><div class='del'>-#define CALEB_IDLO		0x00</div><div class='del'>-#define CALEB_IDHI		0x01</div><div class='del'>-#define CALEB_RID		0x02</div><div class='del'>-#define CALEB_RESET		0x03</div><div class='del'>-#define CALEB_INTREN0		0x04</div><div class='del'>-#define CALEB_INTREN1		0x05</div><div class='del'>-#define CALEB_INTRSTAT0		0x06</div><div class='del'>-#define CALEB_INTRSTAT1		0x07</div><div class='del'>-#define CALEB_PORTEN		0x08</div><div class='del'>-#define CALEB_BURST		0x09</div><div class='del'>-#define CALEB_PORTPAUS		0x0A</div><div class='del'>-#define CALEB_PORTPAUSD		0x0B</div><div class='del'>-#define CALEB_PHY0RX		0x10</div><div class='del'>-#define CALEB_PHY1RX		0x11</div><div class='del'>-#define CALEB_PHY0TX		0x12</div><div class='del'>-#define CALEB_PHY1TX		0x13</div><div class='del'>-#define CALEB_IXPRX_HI_CNTR	0x15</div><div class='del'>-#define CALEB_PHY0RX_HI_CNTR	0x16</div><div class='del'>-#define CALEB_PHY1RX_HI_CNTR	0x17</div><div class='del'>-#define CALEB_IXPRX_CNTR	0x18</div><div class='del'>-#define CALEB_PHY0RX_CNTR	0x19</div><div class='del'>-#define CALEB_PHY1RX_CNTR	0x1A</div><div class='del'>-#define CALEB_IXPTX_CNTR	0x1B</div><div class='del'>-#define CALEB_PHY0TX_CNTR	0x1C</div><div class='del'>-#define CALEB_PHY1TX_CNTR	0x1D</div><div class='del'>-#define CALEB_DEBUG0		0x1E</div><div class='del'>-#define CALEB_DEBUG1		0x1F</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static u8 caleb_reg_read(int reg)</div><div class='del'>-{</div><div class='del'>-	u8 value;</div><div class='del'>-</div><div class='del'>-	value = *((volatile u8 *)(ENP2611_CALEB_VIRT_BASE + reg));</div><div class='del'>-</div><div class='del'>-//	printk(KERN_INFO "caleb_reg_read(%d) = %.2x\n", reg, value);</div><div class='del'>-</div><div class='del'>-	return value;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void caleb_reg_write(int reg, u8 value)</div><div class='del'>-{</div><div class='del'>-	u8 dummy;</div><div class='del'>-</div><div class='del'>-//	printk(KERN_INFO "caleb_reg_write(%d, %.2x)\n", reg, value);</div><div class='del'>-</div><div class='del'>-	*((volatile u8 *)(ENP2611_CALEB_VIRT_BASE + reg)) = value;</div><div class='del'>-</div><div class='del'>-	dummy = *((volatile u8 *)ENP2611_CALEB_VIRT_BASE);</div><div class='del'>-	__asm__ __volatile__("mov %0, %0" : "+r" (dummy));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-void caleb_reset(void)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Perform a chip reset.</div><div class='del'>-	 */</div><div class='del'>-	caleb_reg_write(CALEB_RESET, 0x02);</div><div class='del'>-	udelay(1);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Enable all interrupt sources.  This is needed to get</div><div class='del'>-	 * meaningful results out of the status bits (register 6</div><div class='del'>-	 * and 7.)</div><div class='del'>-	 */</div><div class='del'>-	caleb_reg_write(CALEB_INTREN0, 0xff);</div><div class='del'>-	caleb_reg_write(CALEB_INTREN1, 0x07);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set RX and TX FIFO thresholds to 1.5kb.</div><div class='del'>-	 */</div><div class='del'>-	caleb_reg_write(CALEB_PHY0RX, 0x11);</div><div class='del'>-	caleb_reg_write(CALEB_PHY1RX, 0x11);</div><div class='del'>-	caleb_reg_write(CALEB_PHY0TX, 0x11);</div><div class='del'>-	caleb_reg_write(CALEB_PHY1TX, 0x11);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Program SPI-3 burst size.</div><div class='del'>-	 */</div><div class='del'>-	caleb_reg_write(CALEB_BURST, 0);	// 64-byte RBUF mpackets</div><div class='del'>-//	caleb_reg_write(CALEB_BURST, 1);	// 128-byte RBUF mpackets</div><div class='del'>-//	caleb_reg_write(CALEB_BURST, 2);	// 256-byte RBUF mpackets</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void caleb_enable_rx(int port)</div><div class='del'>-{</div><div class='del'>-	u8 temp;</div><div class='del'>-</div><div class='del'>-	temp = caleb_reg_read(CALEB_PORTEN);</div><div class='del'>-	temp |= 1 &lt;&lt; port;</div><div class='del'>-	caleb_reg_write(CALEB_PORTEN, temp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void caleb_disable_rx(int port)</div><div class='del'>-{</div><div class='del'>-	u8 temp;</div><div class='del'>-</div><div class='del'>-	temp = caleb_reg_read(CALEB_PORTEN);</div><div class='del'>-	temp &amp;= ~(1 &lt;&lt; port);</div><div class='del'>-	caleb_reg_write(CALEB_PORTEN, temp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void caleb_enable_tx(int port)</div><div class='del'>-{</div><div class='del'>-	u8 temp;</div><div class='del'>-</div><div class='del'>-	temp = caleb_reg_read(CALEB_PORTEN);</div><div class='del'>-	temp |= 1 &lt;&lt; (port + 4);</div><div class='del'>-	caleb_reg_write(CALEB_PORTEN, temp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void caleb_disable_tx(int port)</div><div class='del'>-{</div><div class='del'>-	u8 temp;</div><div class='del'>-</div><div class='del'>-	temp = caleb_reg_read(CALEB_PORTEN);</div><div class='del'>-	temp &amp;= ~(1 &lt;&lt; (port + 4));</div><div class='del'>-	caleb_reg_write(CALEB_PORTEN, temp);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/caleb.h b/drivers/net/ethernet/xscale/ixp2000/caleb.h<br/>deleted file mode 100644<br/>index e93a1ef5b8a3..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/caleb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/caleb.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Helper functions for the SPI-3 bridge FPGA on the Radisys ENP2611</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __CALEB_H</div><div class='del'>-#define __CALEB_H</div><div class='del'>-</div><div class='del'>-void caleb_reset(void);</div><div class='del'>-void caleb_enable_rx(int port);</div><div class='del'>-void caleb_disable_rx(int port);</div><div class='del'>-void caleb_enable_tx(int port);</div><div class='del'>-void caleb_disable_tx(int port);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/enp2611.c b/drivers/net/ethernet/xscale/ixp2000/enp2611.c<br/>deleted file mode 100644<br/>index 34a6cfd17930..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/enp2611.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/enp2611.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,232 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * IXP2400 MSF network device driver for the Radisys ENP2611</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/moduleparam.h&gt;</div><div class='del'>-#include &lt;asm/hardware/uengine.h&gt;</div><div class='del'>-#include &lt;asm/mach-types.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include "ixpdev.h"</div><div class='del'>-#include "caleb.h"</div><div class='del'>-#include "ixp2400-msf.h"</div><div class='del'>-#include "pm3386.h"</div><div class='del'>-</div><div class='del'>-/***********************************************************************</div><div class='del'>- * The Radisys ENP2611 is a PCI form factor board with three SFP GBIC</div><div class='del'>- * slots, connected via two PMC/Sierra 3386s and an SPI-3 bridge FPGA</div><div class='del'>- * to the IXP2400.</div><div class='del'>- *</div><div class='del'>- *                +-------------+</div><div class='del'>- * SFP GBIC #0 ---+             |       +---------+</div><div class='del'>- *                |  PM3386 #0  +-------+         |</div><div class='del'>- * SFP GBIC #1 ---+             |       | "Caleb" |         +---------+</div><div class='del'>- *                +-------------+       |         |         |         |</div><div class='del'>- *                                      | SPI-3   +---------+ IXP2400 |</div><div class='del'>- *                +-------------+       | bridge  |         |         |</div><div class='del'>- * SFP GBIC #2 ---+             |       | FPGA    |         +---------+</div><div class='del'>- *                |  PM3386 #1  +-------+         |</div><div class='del'>- *                |             |       +---------+</div><div class='del'>- *                +-------------+</div><div class='del'>- *              ^                   ^                  ^</div><div class='del'>- *              | 1.25Gbaud         | 104MHz           | 104MHz</div><div class='del'>- *              | SERDES ea.        | SPI-3 ea.        | SPI-3</div><div class='del'>- *</div><div class='del'>- ***********************************************************************/</div><div class='del'>-static struct ixp2400_msf_parameters enp2611_msf_parameters =</div><div class='del'>-{</div><div class='del'>-	.rx_mode =		IXP2400_RX_MODE_UTOPIA_POS |</div><div class='del'>-				IXP2400_RX_MODE_1x32 |</div><div class='del'>-				IXP2400_RX_MODE_MPHY |</div><div class='del'>-				IXP2400_RX_MODE_MPHY_32 |</div><div class='del'>-				IXP2400_RX_MODE_MPHY_POLLED_STATUS |</div><div class='del'>-				IXP2400_RX_MODE_MPHY_LEVEL3 |</div><div class='del'>-				IXP2400_RX_MODE_RBUF_SIZE_64,</div><div class='del'>-</div><div class='del'>-	.rxclk01_multiplier =	IXP2400_PLL_MULTIPLIER_16,</div><div class='del'>-</div><div class='del'>-	.rx_poll_ports =	3,</div><div class='del'>-</div><div class='del'>-	.rx_channel_mode = {</div><div class='del'>-		IXP2400_PORT_RX_MODE_MASTER |</div><div class='del'>-		IXP2400_PORT_RX_MODE_POS_PHY |</div><div class='del'>-		IXP2400_PORT_RX_MODE_POS_PHY_L3 |</div><div class='del'>-		IXP2400_PORT_RX_MODE_ODD_PARITY |</div><div class='del'>-		IXP2400_PORT_RX_MODE_2_CYCLE_DECODE,</div><div class='del'>-</div><div class='del'>-		IXP2400_PORT_RX_MODE_MASTER |</div><div class='del'>-		IXP2400_PORT_RX_MODE_POS_PHY |</div><div class='del'>-		IXP2400_PORT_RX_MODE_POS_PHY_L3 |</div><div class='del'>-		IXP2400_PORT_RX_MODE_ODD_PARITY |</div><div class='del'>-		IXP2400_PORT_RX_MODE_2_CYCLE_DECODE,</div><div class='del'>-</div><div class='del'>-		IXP2400_PORT_RX_MODE_MASTER |</div><div class='del'>-		IXP2400_PORT_RX_MODE_POS_PHY |</div><div class='del'>-		IXP2400_PORT_RX_MODE_POS_PHY_L3 |</div><div class='del'>-		IXP2400_PORT_RX_MODE_ODD_PARITY |</div><div class='del'>-		IXP2400_PORT_RX_MODE_2_CYCLE_DECODE,</div><div class='del'>-</div><div class='del'>-		IXP2400_PORT_RX_MODE_MASTER |</div><div class='del'>-		IXP2400_PORT_RX_MODE_POS_PHY |</div><div class='del'>-		IXP2400_PORT_RX_MODE_POS_PHY_L3 |</div><div class='del'>-		IXP2400_PORT_RX_MODE_ODD_PARITY |</div><div class='del'>-		IXP2400_PORT_RX_MODE_2_CYCLE_DECODE</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	.tx_mode =		IXP2400_TX_MODE_UTOPIA_POS |</div><div class='del'>-				IXP2400_TX_MODE_1x32 |</div><div class='del'>-				IXP2400_TX_MODE_MPHY |</div><div class='del'>-				IXP2400_TX_MODE_MPHY_32 |</div><div class='del'>-				IXP2400_TX_MODE_MPHY_POLLED_STATUS |</div><div class='del'>-				IXP2400_TX_MODE_MPHY_LEVEL3 |</div><div class='del'>-				IXP2400_TX_MODE_TBUF_SIZE_64,</div><div class='del'>-</div><div class='del'>-	.txclk01_multiplier =	IXP2400_PLL_MULTIPLIER_16,</div><div class='del'>-</div><div class='del'>-	.tx_poll_ports =	3,</div><div class='del'>-</div><div class='del'>-	.tx_channel_mode = {</div><div class='del'>-		IXP2400_PORT_TX_MODE_MASTER |</div><div class='del'>-		IXP2400_PORT_TX_MODE_POS_PHY |</div><div class='del'>-		IXP2400_PORT_TX_MODE_ODD_PARITY |</div><div class='del'>-		IXP2400_PORT_TX_MODE_2_CYCLE_DECODE,</div><div class='del'>-</div><div class='del'>-		IXP2400_PORT_TX_MODE_MASTER |</div><div class='del'>-		IXP2400_PORT_TX_MODE_POS_PHY |</div><div class='del'>-		IXP2400_PORT_TX_MODE_ODD_PARITY |</div><div class='del'>-		IXP2400_PORT_TX_MODE_2_CYCLE_DECODE,</div><div class='del'>-</div><div class='del'>-		IXP2400_PORT_TX_MODE_MASTER |</div><div class='del'>-		IXP2400_PORT_TX_MODE_POS_PHY |</div><div class='del'>-		IXP2400_PORT_TX_MODE_ODD_PARITY |</div><div class='del'>-		IXP2400_PORT_TX_MODE_2_CYCLE_DECODE,</div><div class='del'>-</div><div class='del'>-		IXP2400_PORT_TX_MODE_MASTER |</div><div class='del'>-		IXP2400_PORT_TX_MODE_POS_PHY |</div><div class='del'>-		IXP2400_PORT_TX_MODE_ODD_PARITY |</div><div class='del'>-		IXP2400_PORT_TX_MODE_2_CYCLE_DECODE</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct net_device *nds[3];</div><div class='del'>-static struct timer_list link_check_timer;</div><div class='del'>-</div><div class='del'>-/* @@@ Poll the SFP moddef0 line too.  */</div><div class='del'>-/* @@@ Try to use the pm3386 DOOL interrupt as well.  */</div><div class='del'>-static void enp2611_check_link_status(unsigned long __dummy)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 3; i++) {</div><div class='del'>-		struct net_device *dev;</div><div class='del'>-		int status;</div><div class='del'>-</div><div class='del'>-		dev = nds[i];</div><div class='del'>-		if (dev == NULL)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		status = pm3386_is_link_up(i);</div><div class='del'>-		if (status &amp;&amp; !netif_carrier_ok(dev)) {</div><div class='del'>-			/* @@@ Should report autonegotiation status.  */</div><div class='del'>-			printk(KERN_INFO "%s: NIC Link is Up\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-			pm3386_enable_tx(i);</div><div class='del'>-			caleb_enable_tx(i);</div><div class='del'>-			netif_carrier_on(dev);</div><div class='del'>-		} else if (!status &amp;&amp; netif_carrier_ok(dev)) {</div><div class='del'>-			printk(KERN_INFO "%s: NIC Link is Down\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-			netif_carrier_off(dev);</div><div class='del'>-			caleb_disable_tx(i);</div><div class='del'>-			pm3386_disable_tx(i);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	link_check_timer.expires = jiffies + HZ / 10;</div><div class='del'>-	add_timer(&amp;link_check_timer);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void enp2611_set_port_admin_status(int port, int up)</div><div class='del'>-{</div><div class='del'>-	if (up) {</div><div class='del'>-		caleb_enable_rx(port);</div><div class='del'>-</div><div class='del'>-		pm3386_set_carrier(port, 1);</div><div class='del'>-		pm3386_enable_rx(port);</div><div class='del'>-	} else {</div><div class='del'>-		caleb_disable_tx(port);</div><div class='del'>-		pm3386_disable_tx(port);</div><div class='del'>-		/* @@@ Flush out pending packets.  */</div><div class='del'>-		pm3386_set_carrier(port, 0);</div><div class='del'>-</div><div class='del'>-		pm3386_disable_rx(port);</div><div class='del'>-		caleb_disable_rx(port);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init enp2611_init_module(void)</div><div class='del'>-{ </div><div class='del'>-	int ports;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!machine_is_enp2611())</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	caleb_reset();</div><div class='del'>-	pm3386_reset();</div><div class='del'>-</div><div class='del'>-	ports = pm3386_port_count();</div><div class='del'>-	for (i = 0; i &lt; ports; i++) {</div><div class='del'>-		nds[i] = ixpdev_alloc(i, sizeof(struct ixpdev_priv));</div><div class='del'>-		if (nds[i] == NULL) {</div><div class='del'>-			while (--i &gt;= 0)</div><div class='del'>-				free_netdev(nds[i]);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		pm3386_init_port(i);</div><div class='del'>-		pm3386_get_mac(i, nds[i]-&gt;dev_addr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ixp2400_msf_init(&amp;enp2611_msf_parameters);</div><div class='del'>-</div><div class='del'>-	if (ixpdev_init(ports, nds, enp2611_set_port_admin_status)) {</div><div class='del'>-		for (i = 0; i &lt; ports; i++)</div><div class='del'>-			if (nds[i])</div><div class='del'>-				free_netdev(nds[i]);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	init_timer(&amp;link_check_timer);</div><div class='del'>-	link_check_timer.function = enp2611_check_link_status;</div><div class='del'>-	link_check_timer.expires = jiffies;</div><div class='del'>-	add_timer(&amp;link_check_timer);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit enp2611_cleanup_module(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	del_timer_sync(&amp;link_check_timer);</div><div class='del'>-</div><div class='del'>-	ixpdev_deinit();</div><div class='del'>-	for (i = 0; i &lt; 3; i++)</div><div class='del'>-		free_netdev(nds[i]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(enp2611_init_module);</div><div class='del'>-module_exit(enp2611_cleanup_module);</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c b/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c<br/>deleted file mode 100644<br/>index f5ffd7e05d26..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,212 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Generic library functions for the MSF (Media and Switch Fabric) unit</div><div class='del'>- * found on the Intel IXP2400 network processor.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU Lesser General Public License as</div><div class='del'>- * published by the Free Software Foundation; either version 2.1 of the</div><div class='del'>- * License, or (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;mach/ixp2000-regs.h&gt;</div><div class='del'>-#include &lt;asm/delay.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include "ixp2400-msf.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This is the Intel recommended PLL init procedure as described on</div><div class='del'>- * page 340 of the IXP2400/IXP2800 Programmer's Reference Manual.</div><div class='del'>- */</div><div class='del'>-static void ixp2400_pll_init(struct ixp2400_msf_parameters *mp)</div><div class='del'>-{</div><div class='del'>-	int rx_dual_clock;</div><div class='del'>-	int tx_dual_clock;</div><div class='del'>-	u32 value;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the RX mode is not 1x32, we have to enable both RX PLLs</div><div class='del'>-	 * (#0 and #1.)  The same thing for the TX direction.</div><div class='del'>-	 */</div><div class='del'>-	rx_dual_clock = !!(mp-&gt;rx_mode &amp; IXP2400_RX_MODE_WIDTH_MASK);</div><div class='del'>-	tx_dual_clock = !!(mp-&gt;tx_mode &amp; IXP2400_TX_MODE_WIDTH_MASK);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Read initial value.</div><div class='del'>-	 */</div><div class='del'>-	value = ixp2000_reg_read(IXP2000_MSF_CLK_CNTRL);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Put PLLs in powerdown and bypass mode.</div><div class='del'>-	 */</div><div class='del'>-	value |= 0x0000f0f0;</div><div class='del'>-	ixp2000_reg_write(IXP2000_MSF_CLK_CNTRL, value);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set single or dual clock mode bits.</div><div class='del'>-	 */</div><div class='del'>-	value &amp;= ~0x03000000;</div><div class='del'>-	value |= (rx_dual_clock &lt;&lt; 24) | (tx_dual_clock &lt;&lt; 25);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set multipliers.</div><div class='del'>-	 */</div><div class='del'>-	value &amp;= ~0x00ff0000;</div><div class='del'>-	value |= mp-&gt;rxclk01_multiplier &lt;&lt; 16;</div><div class='del'>-	value |= mp-&gt;rxclk23_multiplier &lt;&lt; 18;</div><div class='del'>-	value |= mp-&gt;txclk01_multiplier &lt;&lt; 20;</div><div class='del'>-	value |= mp-&gt;txclk23_multiplier &lt;&lt; 22;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * And write value.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_reg_write(IXP2000_MSF_CLK_CNTRL, value);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Disable PLL bypass mode.</div><div class='del'>-	 */</div><div class='del'>-	value &amp;= ~(0x00005000 | rx_dual_clock &lt;&lt; 13 | tx_dual_clock &lt;&lt; 15);</div><div class='del'>-	ixp2000_reg_write(IXP2000_MSF_CLK_CNTRL, value);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Turn on PLLs.</div><div class='del'>-	 */</div><div class='del'>-	value &amp;= ~(0x00000050 | rx_dual_clock &lt;&lt; 5 | tx_dual_clock &lt;&lt; 7);</div><div class='del'>-	ixp2000_reg_write(IXP2000_MSF_CLK_CNTRL, value);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Wait for PLLs to lock.  There are lock status bits, but IXP2400</div><div class='del'>-	 * erratum #65 says that these lock bits should not be relied upon</div><div class='del'>-	 * as they might not accurately reflect the true state of the PLLs.</div><div class='del'>-	 */</div><div class='del'>-	udelay(100);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Needed according to p480 of Programmer's Reference Manual.</div><div class='del'>- */</div><div class='del'>-static void ixp2400_msf_free_rbuf_entries(struct ixp2400_msf_parameters *mp)</div><div class='del'>-{</div><div class='del'>-	int size_bits;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Work around IXP2400 erratum #69 (silent RBUF-to-DRAM transfer</div><div class='del'>-	 * corruption) in the Intel-recommended way: do not add the RBUF</div><div class='del'>-	 * elements susceptible to corruption to the freelist.</div><div class='del'>-	 */</div><div class='del'>-	size_bits = mp-&gt;rx_mode &amp; IXP2400_RX_MODE_RBUF_SIZE_MASK;</div><div class='del'>-	if (size_bits == IXP2400_RX_MODE_RBUF_SIZE_64) {</div><div class='del'>-		for (i = 1; i &lt; 128; i++) {</div><div class='del'>-			if (i == 9 || i == 18 || i == 27)</div><div class='del'>-				continue;</div><div class='del'>-			ixp2000_reg_write(IXP2000_MSF_RBUF_ELEMENT_DONE, i);</div><div class='del'>-		}</div><div class='del'>-	} else if (size_bits == IXP2400_RX_MODE_RBUF_SIZE_128) {</div><div class='del'>-		for (i = 1; i &lt; 64; i++) {</div><div class='del'>-			if (i == 4 || i == 9 || i == 13)</div><div class='del'>-				continue;</div><div class='del'>-			ixp2000_reg_write(IXP2000_MSF_RBUF_ELEMENT_DONE, i);</div><div class='del'>-		}</div><div class='del'>-	} else if (size_bits == IXP2400_RX_MODE_RBUF_SIZE_256) {</div><div class='del'>-		for (i = 1; i &lt; 32; i++) {</div><div class='del'>-			if (i == 2 || i == 4 || i == 6)</div><div class='del'>-				continue;</div><div class='del'>-			ixp2000_reg_write(IXP2000_MSF_RBUF_ELEMENT_DONE, i);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 ixp2400_msf_valid_channels(u32 reg)</div><div class='del'>-{</div><div class='del'>-	u32 channels;</div><div class='del'>-</div><div class='del'>-	channels = 0;</div><div class='del'>-	switch (reg &amp; IXP2400_RX_MODE_WIDTH_MASK) {</div><div class='del'>-	case IXP2400_RX_MODE_1x32:</div><div class='del'>-		channels = 0x1;</div><div class='del'>-		if (reg &amp; IXP2400_RX_MODE_MPHY &amp;&amp;</div><div class='del'>-		    !(reg &amp; IXP2400_RX_MODE_MPHY_32))</div><div class='del'>-			channels = 0xf;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case IXP2400_RX_MODE_2x16:</div><div class='del'>-		channels = 0x5;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case IXP2400_RX_MODE_4x8:</div><div class='del'>-		channels = 0xf;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case IXP2400_RX_MODE_1x16_2x8:</div><div class='del'>-		channels = 0xd;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return channels;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp2400_msf_enable_rx(struct ixp2400_msf_parameters *mp)</div><div class='del'>-{</div><div class='del'>-	u32 value;</div><div class='del'>-</div><div class='del'>-	value = ixp2000_reg_read(IXP2000_MSF_RX_CONTROL) &amp; 0x0fffffff;</div><div class='del'>-	value |= ixp2400_msf_valid_channels(mp-&gt;rx_mode) &lt;&lt; 28;</div><div class='del'>-	ixp2000_reg_write(IXP2000_MSF_RX_CONTROL, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixp2400_msf_enable_tx(struct ixp2400_msf_parameters *mp)</div><div class='del'>-{</div><div class='del'>-	u32 value;</div><div class='del'>-</div><div class='del'>-	value = ixp2000_reg_read(IXP2000_MSF_TX_CONTROL) &amp; 0x0fffffff;</div><div class='del'>-	value |= ixp2400_msf_valid_channels(mp-&gt;tx_mode) &lt;&lt; 28;</div><div class='del'>-	ixp2000_reg_write(IXP2000_MSF_TX_CONTROL, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-void ixp2400_msf_init(struct ixp2400_msf_parameters *mp)</div><div class='del'>-{</div><div class='del'>-	u32 value;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Init the RX/TX PLLs based on the passed parameter block.</div><div class='del'>-	 */</div><div class='del'>-	ixp2400_pll_init(mp);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Reset MSF.  Bit 7 in IXP_RESET_0 resets the MSF.</div><div class='del'>-	 */</div><div class='del'>-	value = ixp2000_reg_read(IXP2000_RESET0);</div><div class='del'>-	ixp2000_reg_write(IXP2000_RESET0, value | 0x80);</div><div class='del'>-	ixp2000_reg_write(IXP2000_RESET0, value &amp; ~0x80);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialise the RX section.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_reg_write(IXP2000_MSF_RX_MPHY_POLL_LIMIT, mp-&gt;rx_poll_ports - 1);</div><div class='del'>-	ixp2000_reg_write(IXP2000_MSF_RX_CONTROL, mp-&gt;rx_mode);</div><div class='del'>-	for (i = 0; i &lt; 4; i++) {</div><div class='del'>-		ixp2000_reg_write(IXP2000_MSF_RX_UP_CONTROL_0 + i,</div><div class='del'>-						mp-&gt;rx_channel_mode[i]);</div><div class='del'>-	}</div><div class='del'>-	ixp2400_msf_free_rbuf_entries(mp);</div><div class='del'>-	ixp2400_msf_enable_rx(mp);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialise the TX section.</div><div class='del'>-	 */</div><div class='del'>-	ixp2000_reg_write(IXP2000_MSF_TX_MPHY_POLL_LIMIT, mp-&gt;tx_poll_ports - 1);</div><div class='del'>-	ixp2000_reg_write(IXP2000_MSF_TX_CONTROL, mp-&gt;tx_mode);</div><div class='del'>-	for (i = 0; i &lt; 4; i++) {</div><div class='del'>-		ixp2000_reg_write(IXP2000_MSF_TX_UP_CONTROL_0 + i,</div><div class='del'>-						mp-&gt;tx_channel_mode[i]);</div><div class='del'>-	}</div><div class='del'>-	ixp2400_msf_enable_tx(mp);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h b/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h<br/>deleted file mode 100644<br/>index 3ac1af2771da..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/ixp2400-msf.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,115 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Generic library functions for the MSF (Media and Switch Fabric) unit</div><div class='del'>- * found on the Intel IXP2400 network processor.</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU Lesser General Public License as</div><div class='del'>- * published by the Free Software Foundation; either version 2.1 of the</div><div class='del'>- * License, or (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __IXP2400_MSF_H</div><div class='del'>-#define __IXP2400_MSF_H</div><div class='del'>-</div><div class='del'>-struct ixp2400_msf_parameters</div><div class='del'>-{</div><div class='del'>-	u32				rx_mode;</div><div class='del'>-	unsigned			rxclk01_multiplier:2;</div><div class='del'>-	unsigned			rxclk23_multiplier:2;</div><div class='del'>-	unsigned			rx_poll_ports:6;</div><div class='del'>-	u32				rx_channel_mode[4];</div><div class='del'>-</div><div class='del'>-	u32				tx_mode;</div><div class='del'>-	unsigned			txclk01_multiplier:2;</div><div class='del'>-	unsigned			txclk23_multiplier:2;</div><div class='del'>-	unsigned			tx_poll_ports:6;</div><div class='del'>-	u32				tx_channel_mode[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void ixp2400_msf_init(struct ixp2400_msf_parameters *mp);</div><div class='del'>-</div><div class='del'>-#define IXP2400_PLL_MULTIPLIER_48		0x00</div><div class='del'>-#define IXP2400_PLL_MULTIPLIER_24		0x01</div><div class='del'>-#define IXP2400_PLL_MULTIPLIER_16		0x02</div><div class='del'>-#define IXP2400_PLL_MULTIPLIER_12		0x03</div><div class='del'>-</div><div class='del'>-#define IXP2400_RX_MODE_CSIX			0x00400000</div><div class='del'>-#define IXP2400_RX_MODE_UTOPIA_POS		0x00000000</div><div class='del'>-#define IXP2400_RX_MODE_WIDTH_MASK		0x00300000</div><div class='del'>-#define IXP2400_RX_MODE_1x16_2x8		0x00300000</div><div class='del'>-#define IXP2400_RX_MODE_4x8			0x00200000</div><div class='del'>-#define IXP2400_RX_MODE_2x16			0x00100000</div><div class='del'>-#define IXP2400_RX_MODE_1x32			0x00000000</div><div class='del'>-#define IXP2400_RX_MODE_MPHY			0x00080000</div><div class='del'>-#define IXP2400_RX_MODE_SPHY			0x00000000</div><div class='del'>-#define IXP2400_RX_MODE_MPHY_32			0x00040000</div><div class='del'>-#define IXP2400_RX_MODE_MPHY_4			0x00000000</div><div class='del'>-#define IXP2400_RX_MODE_MPHY_POLLED_STATUS	0x00020000</div><div class='del'>-#define IXP2400_RX_MODE_MPHY_DIRECT_STATUS	0x00000000</div><div class='del'>-#define IXP2400_RX_MODE_CBUS_FULL_DUPLEX	0x00010000</div><div class='del'>-#define IXP2400_RX_MODE_CBUS_SIMPLEX		0x00000000</div><div class='del'>-#define IXP2400_RX_MODE_MPHY_LEVEL2		0x00004000</div><div class='del'>-#define IXP2400_RX_MODE_MPHY_LEVEL3		0x00000000</div><div class='del'>-#define IXP2400_RX_MODE_CBUS_8BIT		0x00002000</div><div class='del'>-#define IXP2400_RX_MODE_CBUS_4BIT		0x00000000</div><div class='del'>-#define IXP2400_RX_MODE_CSIX_SINGLE_FREELIST	0x00000200</div><div class='del'>-#define IXP2400_RX_MODE_CSIX_SPLIT_FREELISTS	0x00000000</div><div class='del'>-#define IXP2400_RX_MODE_RBUF_SIZE_MASK		0x0000000c</div><div class='del'>-#define IXP2400_RX_MODE_RBUF_SIZE_256		0x00000008</div><div class='del'>-#define IXP2400_RX_MODE_RBUF_SIZE_128		0x00000004</div><div class='del'>-#define IXP2400_RX_MODE_RBUF_SIZE_64		0x00000000</div><div class='del'>-</div><div class='del'>-#define IXP2400_PORT_RX_MODE_SLAVE		0x00000040</div><div class='del'>-#define IXP2400_PORT_RX_MODE_MASTER		0x00000000</div><div class='del'>-#define IXP2400_PORT_RX_MODE_POS_PHY_L3		0x00000020</div><div class='del'>-#define IXP2400_PORT_RX_MODE_POS_PHY_L2		0x00000000</div><div class='del'>-#define IXP2400_PORT_RX_MODE_POS_PHY		0x00000010</div><div class='del'>-#define IXP2400_PORT_RX_MODE_UTOPIA		0x00000000</div><div class='del'>-#define IXP2400_PORT_RX_MODE_EVEN_PARITY	0x0000000c</div><div class='del'>-#define IXP2400_PORT_RX_MODE_ODD_PARITY		0x00000008</div><div class='del'>-#define IXP2400_PORT_RX_MODE_NO_PARITY		0x00000000</div><div class='del'>-#define IXP2400_PORT_RX_MODE_UTOPIA_BIG_CELLS	0x00000002</div><div class='del'>-#define IXP2400_PORT_RX_MODE_UTOPIA_NORMAL_CELLS	0x00000000</div><div class='del'>-#define IXP2400_PORT_RX_MODE_2_CYCLE_DECODE	0x00000001</div><div class='del'>-#define IXP2400_PORT_RX_MODE_1_CYCLE_DECODE	0x00000000</div><div class='del'>-</div><div class='del'>-#define IXP2400_TX_MODE_CSIX			0x00400000</div><div class='del'>-#define IXP2400_TX_MODE_UTOPIA_POS		0x00000000</div><div class='del'>-#define IXP2400_TX_MODE_WIDTH_MASK		0x00300000</div><div class='del'>-#define IXP2400_TX_MODE_1x16_2x8		0x00300000</div><div class='del'>-#define IXP2400_TX_MODE_4x8			0x00200000</div><div class='del'>-#define IXP2400_TX_MODE_2x16			0x00100000</div><div class='del'>-#define IXP2400_TX_MODE_1x32			0x00000000</div><div class='del'>-#define IXP2400_TX_MODE_MPHY			0x00080000</div><div class='del'>-#define IXP2400_TX_MODE_SPHY			0x00000000</div><div class='del'>-#define IXP2400_TX_MODE_MPHY_32			0x00040000</div><div class='del'>-#define IXP2400_TX_MODE_MPHY_4			0x00000000</div><div class='del'>-#define IXP2400_TX_MODE_MPHY_POLLED_STATUS	0x00020000</div><div class='del'>-#define IXP2400_TX_MODE_MPHY_DIRECT_STATUS	0x00000000</div><div class='del'>-#define IXP2400_TX_MODE_CBUS_FULL_DUPLEX	0x00010000</div><div class='del'>-#define IXP2400_TX_MODE_CBUS_SIMPLEX		0x00000000</div><div class='del'>-#define IXP2400_TX_MODE_MPHY_LEVEL2		0x00004000</div><div class='del'>-#define IXP2400_TX_MODE_MPHY_LEVEL3		0x00000000</div><div class='del'>-#define IXP2400_TX_MODE_CBUS_8BIT		0x00002000</div><div class='del'>-#define IXP2400_TX_MODE_CBUS_4BIT		0x00000000</div><div class='del'>-#define IXP2400_TX_MODE_TBUF_SIZE_MASK		0x0000000c</div><div class='del'>-#define IXP2400_TX_MODE_TBUF_SIZE_256		0x00000008</div><div class='del'>-#define IXP2400_TX_MODE_TBUF_SIZE_128		0x00000004</div><div class='del'>-#define IXP2400_TX_MODE_TBUF_SIZE_64		0x00000000</div><div class='del'>-</div><div class='del'>-#define IXP2400_PORT_TX_MODE_SLAVE		0x00000040</div><div class='del'>-#define IXP2400_PORT_TX_MODE_MASTER		0x00000000</div><div class='del'>-#define IXP2400_PORT_TX_MODE_POS_PHY		0x00000010</div><div class='del'>-#define IXP2400_PORT_TX_MODE_UTOPIA		0x00000000</div><div class='del'>-#define IXP2400_PORT_TX_MODE_EVEN_PARITY	0x0000000c</div><div class='del'>-#define IXP2400_PORT_TX_MODE_ODD_PARITY		0x00000008</div><div class='del'>-#define IXP2400_PORT_TX_MODE_NO_PARITY		0x00000000</div><div class='del'>-#define IXP2400_PORT_TX_MODE_UTOPIA_BIG_CELLS	0x00000002</div><div class='del'>-#define IXP2400_PORT_TX_MODE_2_CYCLE_DECODE	0x00000001</div><div class='del'>-#define IXP2400_PORT_TX_MODE_1_CYCLE_DECODE	0x00000000</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc b/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc<br/>deleted file mode 100644<br/>index 42a73e357afa..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.uc</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,408 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * RX ucode for the Intel IXP2400 in POS-PHY mode.</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * Assumptions made in this code:</div><div class='del'>- * - The IXP2400 MSF is configured for POS-PHY mode, in a mode where</div><div class='del'>- *   only one full element list is used.  This includes, for example,</div><div class='del'>- *   1x32 SPHY and 1x32 MPHY32, but not 4x8 SPHY or 1x32 MPHY4.  (This</div><div class='del'>- *   is not an exhaustive list.)</div><div class='del'>- * - The RBUF uses 64-byte mpackets.</div><div class='del'>- * - RX descriptors reside in SRAM, and have the following format:</div><div class='del'>- *	struct rx_desc</div><div class='del'>- *	{</div><div class='del'>- *	// to uengine</div><div class='del'>- *		u32	buf_phys_addr;</div><div class='del'>- *		u32	buf_length;</div><div class='del'>- *</div><div class='del'>- *	// from uengine</div><div class='del'>- *		u32	channel;</div><div class='del'>- *		u32	pkt_length;</div><div class='del'>- *	};</div><div class='del'>- * - Packet data resides in DRAM.</div><div class='del'>- * - Packet buffer addresses are 8-byte aligned.</div><div class='del'>- * - Scratch ring 0 is rx_pending.</div><div class='del'>- * - Scratch ring 1 is rx_done, and has status condition 'full'.</div><div class='del'>- * - The host triggers rx_done flush and rx_pending refill on seeing INTA.</div><div class='del'>- * - This code is run on all eight threads of the microengine it runs on.</div><div class='del'>- *</div><div class='del'>- * Local memory is used for per-channel RX state.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define RX_THREAD_FREELIST_0		0x0030</div><div class='del'>-#define RBUF_ELEMENT_DONE		0x0044</div><div class='del'>-</div><div class='del'>-#define CHANNEL_FLAGS			*l$index0[0]</div><div class='del'>-#define CHANNEL_FLAG_RECEIVING		1</div><div class='del'>-#define PACKET_LENGTH			*l$index0[1]</div><div class='del'>-#define PACKET_CHECKSUM			*l$index0[2]</div><div class='del'>-#define BUFFER_HANDLE			*l$index0[3]</div><div class='del'>-#define BUFFER_START			*l$index0[4]</div><div class='del'>-#define BUFFER_LENGTH			*l$index0[5]</div><div class='del'>-</div><div class='del'>-#define CHANNEL_STATE_SIZE		24	// in bytes</div><div class='del'>-#define CHANNEL_STATE_SHIFT		5	// ceil(log2(state size))</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	.sig volatile sig1</div><div class='del'>-	.sig volatile sig2</div><div class='del'>-	.sig volatile sig3</div><div class='del'>-</div><div class='del'>-	.sig mpacket_arrived</div><div class='del'>-	.reg add_to_rx_freelist</div><div class='del'>-	.reg read $rsw0, $rsw1</div><div class='del'>-	.xfer_order $rsw0 $rsw1</div><div class='del'>-</div><div class='del'>-	.reg zero</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialise add_to_rx_freelist.</div><div class='del'>-	 */</div><div class='del'>-	.begin</div><div class='del'>-		.reg temp</div><div class='del'>-		.reg temp2</div><div class='del'>-</div><div class='del'>-		immed[add_to_rx_freelist, RX_THREAD_FREELIST_0]</div><div class='del'>-		immed_w1[add_to_rx_freelist, (&amp;$rsw0 | (&amp;mpacket_arrived &lt;&lt; 12))]</div><div class='del'>-</div><div class='del'>-		local_csr_rd[ACTIVE_CTX_STS]</div><div class='del'>-		immed[temp, 0]</div><div class='del'>-		alu[temp2, temp, and, 0x1f]</div><div class='del'>-		alu_shf[add_to_rx_freelist, add_to_rx_freelist, or, temp2, &lt;&lt;20]</div><div class='del'>-		alu[temp2, temp, and, 0x80]</div><div class='del'>-		alu_shf[add_to_rx_freelist, add_to_rx_freelist, or, temp2, &lt;&lt;18]</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-	immed[zero, 0]</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Skip context 0 initialisation?</div><div class='del'>-	 */</div><div class='del'>-	.begin</div><div class='del'>-		br!=ctx[0, mpacket_receive_loop#]</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialise local memory.</div><div class='del'>-	 */</div><div class='del'>-	.begin</div><div class='del'>-		.reg addr</div><div class='del'>-		.reg temp</div><div class='del'>-</div><div class='del'>-		immed[temp, 0]</div><div class='del'>-	init_local_mem_loop#:</div><div class='del'>-		alu_shf[addr, --, b, temp, &lt;&lt;CHANNEL_STATE_SHIFT]</div><div class='del'>-		local_csr_wr[ACTIVE_LM_ADDR_0, addr]</div><div class='del'>-		nop</div><div class='del'>-		nop</div><div class='del'>-		nop</div><div class='del'>-</div><div class='del'>-		immed[CHANNEL_FLAGS, 0]</div><div class='del'>-</div><div class='del'>-		alu[temp, temp, +, 1]</div><div class='del'>-		alu[--, temp, and, 0x20]</div><div class='del'>-		beq[init_local_mem_loop#]</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialise signal pipeline.</div><div class='del'>-	 */</div><div class='del'>-	.begin</div><div class='del'>-		local_csr_wr[SAME_ME_SIGNAL, (&amp;sig1 &lt;&lt; 3)]</div><div class='del'>-		.set_sig sig1</div><div class='del'>-</div><div class='del'>-		local_csr_wr[SAME_ME_SIGNAL, (&amp;sig2 &lt;&lt; 3)]</div><div class='del'>-		.set_sig sig2</div><div class='del'>-</div><div class='del'>-		local_csr_wr[SAME_ME_SIGNAL, (&amp;sig3 &lt;&lt; 3)]</div><div class='del'>-		.set_sig sig3</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-mpacket_receive_loop#:</div><div class='del'>-	/*</div><div class='del'>-	 * Synchronise and wait for mpacket.</div><div class='del'>-	 */</div><div class='del'>-	.begin</div><div class='del'>-		ctx_arb[sig1]</div><div class='del'>-		local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&amp;sig1 &lt;&lt; 3))]</div><div class='del'>-</div><div class='del'>-		msf[fast_wr, --, add_to_rx_freelist, 0]</div><div class='del'>-		.set_sig mpacket_arrived</div><div class='del'>-		ctx_arb[mpacket_arrived]</div><div class='del'>-		.set $rsw0 $rsw1</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We halt if we see {inbparerr,parerr,null,soperror}.</div><div class='del'>-	 */</div><div class='del'>-	.begin</div><div class='del'>-		alu_shf[--, 0x1b, and, $rsw0, &gt;&gt;8]</div><div class='del'>-		bne[abort_rswerr#]</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Point local memory pointer to this channel's state area.</div><div class='del'>-	 */</div><div class='del'>-	.begin</div><div class='del'>-		.reg chanaddr</div><div class='del'>-</div><div class='del'>-		alu[chanaddr, $rsw0, and, 0x1f]</div><div class='del'>-		alu_shf[chanaddr, --, b, chanaddr, &lt;&lt;CHANNEL_STATE_SHIFT]</div><div class='del'>-		local_csr_wr[ACTIVE_LM_ADDR_0, chanaddr]</div><div class='del'>-		nop</div><div class='del'>-		nop</div><div class='del'>-		nop</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Check whether we received a SOP mpacket while we were already</div><div class='del'>-	 * working on a packet, or a non-SOP mpacket while there was no</div><div class='del'>-	 * packet pending.  (SOP == RECEIVING -&gt; abort)  If everything's</div><div class='del'>-	 * okay, update the RECEIVING flag to reflect our new state.</div><div class='del'>-	 */</div><div class='del'>-	.begin</div><div class='del'>-		.reg temp</div><div class='del'>-		.reg eop</div><div class='del'>-</div><div class='del'>-		#if CHANNEL_FLAG_RECEIVING != 1</div><div class='del'>-		#error CHANNEL_FLAG_RECEIVING is not 1</div><div class='del'>-		#endif</div><div class='del'>-</div><div class='del'>-		alu_shf[temp, 1, and, $rsw0, &gt;&gt;15]</div><div class='del'>-		alu[temp, temp, xor, CHANNEL_FLAGS]</div><div class='del'>-		alu[--, temp, and, CHANNEL_FLAG_RECEIVING]</div><div class='del'>-		beq[abort_proterr#]</div><div class='del'>-</div><div class='del'>-		alu_shf[eop, 1, and, $rsw0, &gt;&gt;14]</div><div class='del'>-		alu[CHANNEL_FLAGS, temp, xor, eop]</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Copy the mpacket into the right spot, and in case of EOP,</div><div class='del'>-	 * write back the descriptor and pass the packet on.</div><div class='del'>-	 */</div><div class='del'>-	.begin</div><div class='del'>-		.reg buffer_offset</div><div class='del'>-		.reg _packet_length</div><div class='del'>-		.reg _packet_checksum</div><div class='del'>-		.reg _buffer_handle</div><div class='del'>-		.reg _buffer_start</div><div class='del'>-		.reg _buffer_length</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Determine buffer_offset, _packet_length and</div><div class='del'>-		 * _packet_checksum.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			.reg temp</div><div class='del'>-</div><div class='del'>-			alu[--, 1, and, $rsw0, &gt;&gt;15]</div><div class='del'>-			beq[not_sop#]</div><div class='del'>-</div><div class='del'>-			immed[PACKET_LENGTH, 0]</div><div class='del'>-			immed[PACKET_CHECKSUM, 0]</div><div class='del'>-</div><div class='del'>-		not_sop#:</div><div class='del'>-			alu[buffer_offset, --, b, PACKET_LENGTH]</div><div class='del'>-			alu_shf[temp, 0xff, and, $rsw0, &gt;&gt;16]</div><div class='del'>-			alu[_packet_length, buffer_offset, +, temp]</div><div class='del'>-			alu[PACKET_LENGTH, --, b, _packet_length]</div><div class='del'>-</div><div class='del'>-			immed[temp, 0xffff]</div><div class='del'>-			alu[temp, $rsw1, and, temp]</div><div class='del'>-			alu[_packet_checksum, PACKET_CHECKSUM, +, temp]</div><div class='del'>-			alu[PACKET_CHECKSUM, --, b, _packet_checksum]</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Allocate buffer in case of SOP.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			.reg temp</div><div class='del'>-</div><div class='del'>-			alu[temp, 1, and, $rsw0, &gt;&gt;15]</div><div class='del'>-			beq[skip_buffer_alloc#]</div><div class='del'>-</div><div class='del'>-			.begin</div><div class='del'>-				.sig zzz</div><div class='del'>-				.reg read $stemp $stemp2</div><div class='del'>-				.xfer_order $stemp $stemp2</div><div class='del'>-</div><div class='del'>-			rx_nobufs#:</div><div class='del'>-				scratch[get, $stemp, zero, 0, 1], ctx_swap[zzz]</div><div class='del'>-				alu[_buffer_handle, --, b, $stemp]</div><div class='del'>-				beq[rx_nobufs#]</div><div class='del'>-</div><div class='del'>-				sram[read, $stemp, _buffer_handle, 0, 2],</div><div class='del'>-								ctx_swap[zzz]</div><div class='del'>-				alu[_buffer_start, --, b, $stemp]</div><div class='del'>-				alu[_buffer_length, --, b, $stemp2]</div><div class='del'>-			.end</div><div class='del'>-</div><div class='del'>-		skip_buffer_alloc#:</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Resynchronise.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			ctx_arb[sig2]</div><div class='del'>-			local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&amp;sig2 &lt;&lt; 3))]</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Synchronise buffer state.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			.reg temp</div><div class='del'>-</div><div class='del'>-			alu[temp, 1, and, $rsw0, &gt;&gt;15]</div><div class='del'>-			beq[copy_from_local_mem#]</div><div class='del'>-</div><div class='del'>-			alu[BUFFER_HANDLE, --, b, _buffer_handle]</div><div class='del'>-			alu[BUFFER_START, --, b, _buffer_start]</div><div class='del'>-			alu[BUFFER_LENGTH, --, b, _buffer_length]</div><div class='del'>-			br[sync_state_done#]</div><div class='del'>-</div><div class='del'>-		copy_from_local_mem#:</div><div class='del'>-			alu[_buffer_handle, --, b, BUFFER_HANDLE]</div><div class='del'>-			alu[_buffer_start, --, b, BUFFER_START]</div><div class='del'>-			alu[_buffer_length, --, b, BUFFER_LENGTH]</div><div class='del'>-</div><div class='del'>-		sync_state_done#:</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-#if 0</div><div class='del'>-		/*</div><div class='del'>-		 * Debug buffer state management.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			.reg temp</div><div class='del'>-</div><div class='del'>-			alu[temp, 1, and, $rsw0, &gt;&gt;14]</div><div class='del'>-			beq[no_poison#]</div><div class='del'>-			immed[BUFFER_HANDLE, 0xdead]</div><div class='del'>-			immed[BUFFER_START, 0xdead]</div><div class='del'>-			immed[BUFFER_LENGTH, 0xdead]</div><div class='del'>-		no_poison#:</div><div class='del'>-</div><div class='del'>-			immed[temp, 0xdead]</div><div class='del'>-			alu[--, _buffer_handle, -, temp]</div><div class='del'>-			beq[state_corrupted#]</div><div class='del'>-			alu[--, _buffer_start, -, temp]</div><div class='del'>-			beq[state_corrupted#]</div><div class='del'>-			alu[--, _buffer_length, -, temp]</div><div class='del'>-			beq[state_corrupted#]</div><div class='del'>-		.end</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Check buffer length.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			alu[--, _buffer_length, -, _packet_length]</div><div class='del'>-			blo[buffer_overflow#]</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Copy the mpacket and give back the RBUF element.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			.reg element</div><div class='del'>-			.reg xfer_size</div><div class='del'>-			.reg temp</div><div class='del'>-			.sig copy_sig</div><div class='del'>-</div><div class='del'>-			alu_shf[element, 0x7f, and, $rsw0, &gt;&gt;24]</div><div class='del'>-			alu_shf[xfer_size, 0xff, and, $rsw0, &gt;&gt;16]</div><div class='del'>-</div><div class='del'>-			alu[xfer_size, xfer_size, -, 1]</div><div class='del'>-			alu_shf[xfer_size, 0x10, or, xfer_size, &gt;&gt;3]</div><div class='del'>-			alu_shf[temp, 0x10, or, xfer_size, &lt;&lt;21]</div><div class='del'>-			alu_shf[temp, temp, or, element, &lt;&lt;11]</div><div class='del'>-			alu_shf[--, temp, or, 1, &lt;&lt;18]</div><div class='del'>-</div><div class='del'>-			dram[rbuf_rd, --, _buffer_start, buffer_offset, max_8],</div><div class='del'>-						indirect_ref, sig_done[copy_sig]</div><div class='del'>-			ctx_arb[copy_sig]</div><div class='del'>-</div><div class='del'>-			alu[temp, RBUF_ELEMENT_DONE, or, element, &lt;&lt;16]</div><div class='del'>-			msf[fast_wr, --, temp, 0]</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If EOP, write back the packet descriptor.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			.reg write $stemp $stemp2</div><div class='del'>-			.xfer_order $stemp $stemp2</div><div class='del'>-			.sig zzz</div><div class='del'>-</div><div class='del'>-			alu_shf[--, 1, and, $rsw0, &gt;&gt;14]</div><div class='del'>-			beq[no_writeback#]</div><div class='del'>-</div><div class='del'>-			alu[$stemp, $rsw0, and, 0x1f]</div><div class='del'>-			alu[$stemp2, --, b, _packet_length]</div><div class='del'>-			sram[write, $stemp, _buffer_handle, 8, 2], ctx_swap[zzz]</div><div class='del'>-</div><div class='del'>-		no_writeback#:</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Resynchronise.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			ctx_arb[sig3]</div><div class='del'>-			local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&amp;sig3 &lt;&lt; 3))]</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If EOP, put the buffer back onto the scratch ring.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			.reg write $stemp</div><div class='del'>-			.sig zzz</div><div class='del'>-</div><div class='del'>-			br_inp_state[SCR_Ring1_Status, rx_done_ring_overflow#]</div><div class='del'>-</div><div class='del'>-			alu_shf[--, 1, and, $rsw0, &gt;&gt;14]</div><div class='del'>-			beq[mpacket_receive_loop#]</div><div class='del'>-</div><div class='del'>-			alu[--, 1, and, $rsw0, &gt;&gt;10]</div><div class='del'>-			bne[rxerr#]</div><div class='del'>-</div><div class='del'>-			alu[$stemp, --, b, _buffer_handle]</div><div class='del'>-			scratch[put, $stemp, zero, 4, 1], ctx_swap[zzz]</div><div class='del'>-			cap[fast_wr, 0, XSCALE_INT_A]</div><div class='del'>-			br[mpacket_receive_loop#]</div><div class='del'>-</div><div class='del'>-		rxerr#:</div><div class='del'>-			alu[$stemp, --, b, _buffer_handle]</div><div class='del'>-			scratch[put, $stemp, zero, 0, 1], ctx_swap[zzz]</div><div class='del'>-			br[mpacket_receive_loop#]</div><div class='del'>-		.end</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-abort_rswerr#:</div><div class='del'>-	halt</div><div class='del'>-</div><div class='del'>-abort_proterr#:</div><div class='del'>-	halt</div><div class='del'>-</div><div class='del'>-state_corrupted#:</div><div class='del'>-	halt</div><div class='del'>-</div><div class='del'>-buffer_overflow#:</div><div class='del'>-	halt</div><div class='del'>-</div><div class='del'>-rx_done_ring_overflow#:</div><div class='del'>-	halt</div><div class='del'>-</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode b/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode<br/>deleted file mode 100644<br/>index e8aee2f81aad..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/ixp2400_rx.ucode</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,130 +0,0 @@</div><div class='del'>-static struct ixp2000_uengine_code ixp2400_rx =</div><div class='del'>-{</div><div class='del'>-	.cpu_model_bitmask	= 0x000003fe,</div><div class='del'>-	.cpu_min_revision	= 0,</div><div class='del'>-	.cpu_max_revision	= 255,</div><div class='del'>-</div><div class='del'>-	.uengine_parameters	= IXP2000_UENGINE_8_CONTEXTS |</div><div class='del'>-				  IXP2000_UENGINE_PRN_UPDATE_EVERY |</div><div class='del'>-				  IXP2000_UENGINE_NN_FROM_PREVIOUS |</div><div class='del'>-				  IXP2000_UENGINE_ASSERT_EMPTY_AT_0 |</div><div class='del'>-				  IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT |</div><div class='del'>-				  IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT,</div><div class='del'>-</div><div class='del'>-	.initial_reg_values	= (struct ixp2000_reg_value []) {</div><div class='del'>-		{ -1, -1 }</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	.num_insns		= 109,</div><div class='del'>-	.insns			= (u8 []) {</div><div class='del'>-		0xf0, 0x00, 0x0c, 0xc0, 0x05,</div><div class='del'>-		0xf4, 0x44, 0x0c, 0x00, 0x05,</div><div class='del'>-		0xfc, 0x04, 0x4c, 0x00, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x00, 0x3b, 0x00,</div><div class='del'>-		0xb4, 0x40, 0xf0, 0x3b, 0x1f,</div><div class='del'>-		0x8a, 0xc0, 0x50, 0x3e, 0x05,</div><div class='del'>-		0xb4, 0x40, 0xf0, 0x3b, 0x80,</div><div class='del'>-		0x9a, 0xe0, 0x00, 0x3e, 0x05,</div><div class='del'>-		0xf0, 0x00, 0x00, 0x07, 0x00,</div><div class='del'>-		0xd8, 0x05, 0xc0, 0x00, 0x11,</div><div class='del'>-		0xf0, 0x00, 0x00, 0x0f, 0x00,</div><div class='del'>-		0x91, 0xb0, 0x20, 0x0e, 0x00,</div><div class='del'>-		0xfc, 0x06, 0x60, 0x0b, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x03, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x03, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x03, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x02, 0x00,</div><div class='del'>-		0xb0, 0xc0, 0x30, 0x0f, 0x01,</div><div class='del'>-		0xa4, 0x70, 0x00, 0x0f, 0x20,</div><div class='del'>-		0xd8, 0x02, 0xc0, 0x01, 0x00,</div><div class='del'>-		0xfc, 0x10, 0xac, 0x23, 0x08,</div><div class='del'>-		0xfc, 0x10, 0xac, 0x43, 0x10,</div><div class='del'>-		0xfc, 0x10, 0xac, 0x63, 0x18,</div><div class='del'>-		0xe0, 0x00, 0x00, 0x00, 0x02,</div><div class='del'>-		0xfc, 0x10, 0xae, 0x23, 0x88,</div><div class='del'>-		0x3d, 0x00, 0x04, 0x03, 0x20,</div><div class='del'>-		0xe0, 0x00, 0x00, 0x00, 0x10,</div><div class='del'>-		0x84, 0x82, 0x02, 0x01, 0x3b,</div><div class='del'>-		0xd8, 0x1a, 0x00, 0x01, 0x01,</div><div class='del'>-		0xb4, 0x00, 0x8c, 0x7d, 0x80,</div><div class='del'>-		0x91, 0xb0, 0x80, 0x22, 0x00,</div><div class='del'>-		0xfc, 0x06, 0x60, 0x23, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x03, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x03, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x03, 0x00,</div><div class='del'>-		0x94, 0xf0, 0x92, 0x01, 0x21,</div><div class='del'>-		0xac, 0x40, 0x60, 0x26, 0x00,</div><div class='del'>-		0xa4, 0x30, 0x0c, 0x04, 0x06,</div><div class='del'>-		0xd8, 0x1a, 0x40, 0x01, 0x00,</div><div class='del'>-		0x94, 0xe0, 0xa2, 0x01, 0x21,</div><div class='del'>-		0xac, 0x20, 0x00, 0x28, 0x06,</div><div class='del'>-		0x84, 0xf2, 0x02, 0x01, 0x21,</div><div class='del'>-		0xd8, 0x0b, 0x40, 0x01, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x02, 0x01,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x02, 0x02,</div><div class='del'>-		0xa0, 0x00, 0x08, 0x04, 0x00,</div><div class='del'>-		0x95, 0x00, 0xc6, 0x01, 0xff,</div><div class='del'>-		0xa0, 0x80, 0x10, 0x30, 0x00,</div><div class='del'>-		0xa0, 0x60, 0x1c, 0x00, 0x01,</div><div class='del'>-		0xf0, 0x0f, 0xf0, 0x33, 0xff,</div><div class='del'>-		0xb4, 0x00, 0xc0, 0x31, 0x81,</div><div class='del'>-		0xb0, 0x80, 0xb0, 0x32, 0x02,</div><div class='del'>-		0xa0, 0x20, 0x20, 0x2c, 0x00,</div><div class='del'>-		0x94, 0xf0, 0xd2, 0x01, 0x21,</div><div class='del'>-		0xd8, 0x0f, 0x40, 0x01, 0x00,</div><div class='del'>-		0x19, 0x40, 0x10, 0x04, 0x20,</div><div class='del'>-		0xa0, 0x00, 0x26, 0x04, 0x00,</div><div class='del'>-		0xd8, 0x0d, 0xc0, 0x01, 0x00,</div><div class='del'>-		0x00, 0x42, 0x10, 0x80, 0x02,</div><div class='del'>-		0xb0, 0x00, 0x46, 0x04, 0x00,</div><div class='del'>-		0xb0, 0x00, 0x56, 0x08, 0x00,</div><div class='del'>-		0xe0, 0x00, 0x00, 0x00, 0x04,</div><div class='del'>-		0xfc, 0x10, 0xae, 0x43, 0x90,</div><div class='del'>-		0x84, 0xf0, 0x32, 0x01, 0x21,</div><div class='del'>-		0xd8, 0x11, 0x40, 0x01, 0x00,</div><div class='del'>-		0xa0, 0x60, 0x3c, 0x00, 0x02,</div><div class='del'>-		0xa0, 0x20, 0x40, 0x10, 0x00,</div><div class='del'>-		0xa0, 0x20, 0x50, 0x14, 0x00,</div><div class='del'>-		0xd8, 0x12, 0x00, 0x00, 0x18,</div><div class='del'>-		0xa0, 0x00, 0x28, 0x0c, 0x00,</div><div class='del'>-		0xb0, 0x00, 0x48, 0x10, 0x00,</div><div class='del'>-		0xb0, 0x00, 0x58, 0x14, 0x00,</div><div class='del'>-		0xaa, 0xf0, 0x00, 0x14, 0x01,</div><div class='del'>-		0xd8, 0x1a, 0xc0, 0x01, 0x05,</div><div class='del'>-		0x85, 0x80, 0x42, 0x01, 0xff,</div><div class='del'>-		0x95, 0x00, 0x66, 0x01, 0xff,</div><div class='del'>-		0xba, 0xc0, 0x60, 0x1b, 0x01,</div><div class='del'>-		0x9a, 0x30, 0x60, 0x19, 0x30,</div><div class='del'>-		0x9a, 0xb0, 0x70, 0x1a, 0x30,</div><div class='del'>-		0x9b, 0x50, 0x78, 0x1e, 0x04,</div><div class='del'>-		0x8a, 0xe2, 0x08, 0x1e, 0x21,</div><div class='del'>-		0x6a, 0x4e, 0x00, 0x13, 0x00,</div><div class='del'>-		0xe0, 0x00, 0x00, 0x00, 0x30,</div><div class='del'>-		0x9b, 0x00, 0x7a, 0x92, 0x04,</div><div class='del'>-		0x3d, 0x00, 0x04, 0x1f, 0x20,</div><div class='del'>-		0x84, 0xe2, 0x02, 0x01, 0x21,</div><div class='del'>-		0xd8, 0x16, 0x80, 0x01, 0x00,</div><div class='del'>-		0xa4, 0x18, 0x0c, 0x7d, 0x80,</div><div class='del'>-		0xa0, 0x58, 0x1c, 0x00, 0x01,</div><div class='del'>-		0x01, 0x42, 0x00, 0xa0, 0x02,</div><div class='del'>-		0xe0, 0x00, 0x00, 0x00, 0x08,</div><div class='del'>-		0xfc, 0x10, 0xae, 0x63, 0x98,</div><div class='del'>-		0xd8, 0x1b, 0x00, 0xc2, 0x14,</div><div class='del'>-		0x84, 0xe2, 0x02, 0x01, 0x21,</div><div class='del'>-		0xd8, 0x05, 0xc0, 0x01, 0x00,</div><div class='del'>-		0x84, 0xa2, 0x02, 0x01, 0x21,</div><div class='del'>-		0xd8, 0x19, 0x40, 0x01, 0x01,</div><div class='del'>-		0xa0, 0x58, 0x0c, 0x00, 0x02,</div><div class='del'>-		0x1a, 0x40, 0x00, 0x04, 0x24,</div><div class='del'>-		0x33, 0x00, 0x01, 0x2f, 0x20,</div><div class='del'>-		0xd8, 0x05, 0xc0, 0x00, 0x18,</div><div class='del'>-		0xa0, 0x58, 0x0c, 0x00, 0x02,</div><div class='del'>-		0x1a, 0x40, 0x00, 0x04, 0x20,</div><div class='del'>-		0xd8, 0x05, 0xc0, 0x00, 0x18,</div><div class='del'>-		0xe0, 0x00, 0x02, 0x00, 0x00,</div><div class='del'>-		0xe0, 0x00, 0x02, 0x00, 0x00,</div><div class='del'>-		0xe0, 0x00, 0x02, 0x00, 0x00,</div><div class='del'>-		0xe0, 0x00, 0x02, 0x00, 0x00,</div><div class='del'>-		0xe0, 0x00, 0x02, 0x00, 0x00,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc b/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc<br/>deleted file mode 100644<br/>index d090d1884fb7..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.uc</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,272 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * TX ucode for the Intel IXP2400 in POS-PHY mode.</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * Assumptions made in this code:</div><div class='del'>- * - The IXP2400 MSF is configured for POS-PHY mode, in a mode where</div><div class='del'>- *   only one TBUF partition is used.  This includes, for example,</div><div class='del'>- *   1x32 SPHY and 1x32 MPHY32, but not 4x8 SPHY or 1x32 MPHY4. (This</div><div class='del'>- *   is not an exhaustive list.)</div><div class='del'>- * - The TBUF uses 64-byte mpackets.</div><div class='del'>- * - TX descriptors reside in SRAM, and have the following format:</div><div class='del'>- *	struct tx_desc</div><div class='del'>- *	{</div><div class='del'>- *	// to uengine</div><div class='del'>- *		u32	buf_phys_addr;</div><div class='del'>- *		u32	pkt_length;</div><div class='del'>- *		u32	channel;</div><div class='del'>- *	};</div><div class='del'>- * - Packet data resides in DRAM.</div><div class='del'>- * - Packet buffer addresses are 8-byte aligned.</div><div class='del'>- * - Scratch ring 2 is tx_pending.</div><div class='del'>- * - Scratch ring 3 is tx_done, and has status condition 'full'.</div><div class='del'>- * - This code is run on all eight threads of the microengine it runs on.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define TX_SEQUENCE_0		0x0060</div><div class='del'>-#define TBUF_CTRL		0x1800</div><div class='del'>-</div><div class='del'>-#define PARTITION_SIZE		128</div><div class='del'>-#define PARTITION_THRESH	96</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	.sig volatile sig1</div><div class='del'>-	.sig volatile sig2</div><div class='del'>-	.sig volatile sig3</div><div class='del'>-</div><div class='del'>-	.reg @old_tx_seq_0</div><div class='del'>-	.reg @mpkts_in_flight</div><div class='del'>-	.reg @next_tbuf_mpacket</div><div class='del'>-</div><div class='del'>-	.reg @buffer_handle</div><div class='del'>-	.reg @buffer_start</div><div class='del'>-	.reg @packet_length</div><div class='del'>-	.reg @channel</div><div class='del'>-	.reg @packet_offset</div><div class='del'>-</div><div class='del'>-	.reg zero</div><div class='del'>-</div><div class='del'>-	immed[zero, 0]</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Skip context 0 initialisation?</div><div class='del'>-	 */</div><div class='del'>-	.begin</div><div class='del'>-		br!=ctx[0, mpacket_tx_loop#]</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Wait until all pending TBUF elements have been transmitted.</div><div class='del'>-	 */</div><div class='del'>-	.begin</div><div class='del'>-		.reg read $tx</div><div class='del'>-		.sig zzz</div><div class='del'>-</div><div class='del'>-	loop_empty#:</div><div class='del'>-		msf[read, $tx, zero, TX_SEQUENCE_0, 1], ctx_swap[zzz]</div><div class='del'>-		alu_shf[--, --, b, $tx, &gt;&gt;31]</div><div class='del'>-		beq[loop_empty#]</div><div class='del'>-</div><div class='del'>-		alu[@old_tx_seq_0, --, b, $tx]</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-	immed[@mpkts_in_flight, 0]</div><div class='del'>-	alu[@next_tbuf_mpacket, @old_tx_seq_0, and, (PARTITION_SIZE - 1)]</div><div class='del'>-</div><div class='del'>-	immed[@buffer_handle, 0]</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialise signal pipeline.</div><div class='del'>-	 */</div><div class='del'>-	.begin</div><div class='del'>-		local_csr_wr[SAME_ME_SIGNAL, (&amp;sig1 &lt;&lt; 3)]</div><div class='del'>-		.set_sig sig1</div><div class='del'>-</div><div class='del'>-		local_csr_wr[SAME_ME_SIGNAL, (&amp;sig2 &lt;&lt; 3)]</div><div class='del'>-		.set_sig sig2</div><div class='del'>-</div><div class='del'>-		local_csr_wr[SAME_ME_SIGNAL, (&amp;sig3 &lt;&lt; 3)]</div><div class='del'>-		.set_sig sig3</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-mpacket_tx_loop#:</div><div class='del'>-	.begin</div><div class='del'>-		.reg tbuf_element_index</div><div class='del'>-		.reg buffer_handle</div><div class='del'>-		.reg sop_eop</div><div class='del'>-		.reg packet_data</div><div class='del'>-		.reg channel</div><div class='del'>-		.reg mpacket_size</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If there is no packet currently being transmitted,</div><div class='del'>-		 * dequeue the next TX descriptor, and fetch the buffer</div><div class='del'>-		 * address, packet length and destination channel number.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			.reg read $stemp $stemp2 $stemp3</div><div class='del'>-			.xfer_order $stemp $stemp2 $stemp3</div><div class='del'>-			.sig zzz</div><div class='del'>-</div><div class='del'>-			ctx_arb[sig1]</div><div class='del'>-</div><div class='del'>-			alu[--, --, b, @buffer_handle]</div><div class='del'>-			bne[already_got_packet#]</div><div class='del'>-</div><div class='del'>-		tx_nobufs#:</div><div class='del'>-			scratch[get, $stemp, zero, 8, 1], ctx_swap[zzz]</div><div class='del'>-			alu[@buffer_handle, --, b, $stemp]</div><div class='del'>-			beq[tx_nobufs#]</div><div class='del'>-</div><div class='del'>-			sram[read, $stemp, $stemp, 0, 3], ctx_swap[zzz]</div><div class='del'>-			alu[@buffer_start, --, b, $stemp]</div><div class='del'>-			alu[@packet_length, --, b, $stemp2]</div><div class='del'>-			beq[zero_byte_packet#]</div><div class='del'>-			alu[@channel, --, b, $stemp3]</div><div class='del'>-			immed[@packet_offset, 0]</div><div class='del'>-</div><div class='del'>-		already_got_packet#:</div><div class='del'>-			local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&amp;sig1 &lt;&lt; 3))]</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Determine tbuf element index, SOP/EOP flags, mpacket</div><div class='del'>-		 * offset and mpacket size and cache buffer_handle and</div><div class='del'>-		 * channel number.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			alu[tbuf_element_index, --, b, @next_tbuf_mpacket]</div><div class='del'>-			alu[@next_tbuf_mpacket, @next_tbuf_mpacket, +, 1]</div><div class='del'>-			alu[@next_tbuf_mpacket, @next_tbuf_mpacket, and,</div><div class='del'>-							(PARTITION_SIZE - 1)]</div><div class='del'>-</div><div class='del'>-			alu[buffer_handle, --, b, @buffer_handle]</div><div class='del'>-			immed[@buffer_handle, 0]</div><div class='del'>-</div><div class='del'>-			immed[sop_eop, 1]</div><div class='del'>-</div><div class='del'>-			alu[packet_data, --, b, @packet_offset]</div><div class='del'>-			bne[no_sop#]</div><div class='del'>-			alu[sop_eop, sop_eop, or, 2]</div><div class='del'>-		no_sop#:</div><div class='del'>-			alu[packet_data, packet_data, +, @buffer_start]</div><div class='del'>-</div><div class='del'>-			alu[channel, --, b, @channel]</div><div class='del'>-</div><div class='del'>-			alu[mpacket_size, @packet_length, -, @packet_offset]</div><div class='del'>-			alu[--, 64, -, mpacket_size]</div><div class='del'>-			bhs[eop#]</div><div class='del'>-			alu[@buffer_handle, --, b, buffer_handle]</div><div class='del'>-			immed[mpacket_size, 64]</div><div class='del'>-			alu[sop_eop, sop_eop, and, 2]</div><div class='del'>-		eop#:</div><div class='del'>-</div><div class='del'>-			alu[@packet_offset, @packet_offset, +, mpacket_size]</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Wait until there's enough space in the TBUF.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			.reg read $tx</div><div class='del'>-			.reg temp</div><div class='del'>-			.sig zzz</div><div class='del'>-</div><div class='del'>-			ctx_arb[sig2]</div><div class='del'>-</div><div class='del'>-			br[test_space#]</div><div class='del'>-</div><div class='del'>-		loop_space#:</div><div class='del'>-			msf[read, $tx, zero, TX_SEQUENCE_0, 1], ctx_swap[zzz]</div><div class='del'>-</div><div class='del'>-			alu[temp, $tx, -, @old_tx_seq_0]</div><div class='del'>-			alu[temp, temp, and, 0xff]</div><div class='del'>-			alu[@mpkts_in_flight, @mpkts_in_flight, -, temp]</div><div class='del'>-</div><div class='del'>-			alu[@old_tx_seq_0, --, b, $tx]</div><div class='del'>-</div><div class='del'>-		test_space#:</div><div class='del'>-			alu[--, PARTITION_THRESH, -, @mpkts_in_flight]</div><div class='del'>-			blo[loop_space#]</div><div class='del'>-</div><div class='del'>-			alu[@mpkts_in_flight, @mpkts_in_flight, +, 1]</div><div class='del'>-</div><div class='del'>-			local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&amp;sig2 &lt;&lt; 3))]</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Copy the packet data to the TBUF.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			.reg temp</div><div class='del'>-			.sig copy_sig</div><div class='del'>-</div><div class='del'>-			alu[temp, mpacket_size, -, 1]</div><div class='del'>-			alu_shf[temp, 0x10, or, temp, &gt;&gt;3]</div><div class='del'>-			alu_shf[temp, 0x10, or, temp, &lt;&lt;21]</div><div class='del'>-			alu_shf[temp, temp, or, tbuf_element_index, &lt;&lt;11]</div><div class='del'>-			alu_shf[--, temp, or, 1, &lt;&lt;18]</div><div class='del'>-</div><div class='del'>-			dram[tbuf_wr, --, packet_data, 0, max_8],</div><div class='del'>-					indirect_ref, sig_done[copy_sig]</div><div class='del'>-			ctx_arb[copy_sig]</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Mark TBUF element as ready-to-be-transmitted.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			.reg write $tsw $tsw2</div><div class='del'>-			.xfer_order $tsw $tsw2</div><div class='del'>-			.reg temp</div><div class='del'>-			.sig zzz</div><div class='del'>-</div><div class='del'>-			alu_shf[temp, channel, or, mpacket_size, &lt;&lt;24]</div><div class='del'>-			alu_shf[$tsw, temp, or, sop_eop, &lt;&lt;8]</div><div class='del'>-			immed[$tsw2, 0]</div><div class='del'>-</div><div class='del'>-			immed[temp, TBUF_CTRL]</div><div class='del'>-			alu_shf[temp, temp, or, tbuf_element_index, &lt;&lt;3]</div><div class='del'>-			msf[write, $tsw, temp, 0, 2], ctx_swap[zzz]</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Resynchronise.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			ctx_arb[sig3]</div><div class='del'>-			local_csr_wr[SAME_ME_SIGNAL, (0x80 | (&amp;sig3 &lt;&lt; 3))]</div><div class='del'>-		.end</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If this was an EOP mpacket, recycle the TX buffer</div><div class='del'>-	 	 * and signal the host.</div><div class='del'>-		 */</div><div class='del'>-		.begin</div><div class='del'>-			.reg write $stemp</div><div class='del'>-			.sig zzz</div><div class='del'>-</div><div class='del'>-			alu[--, sop_eop, and, 1]</div><div class='del'>-			beq[mpacket_tx_loop#]</div><div class='del'>-</div><div class='del'>-		tx_done_ring_full#:</div><div class='del'>-			br_inp_state[SCR_Ring3_Status, tx_done_ring_full#]</div><div class='del'>-</div><div class='del'>-			alu[$stemp, --, b, buffer_handle]</div><div class='del'>-			scratch[put, $stemp, zero, 12, 1], ctx_swap[zzz]</div><div class='del'>-			cap[fast_wr, 0, XSCALE_INT_A]</div><div class='del'>-			br[mpacket_tx_loop#]</div><div class='del'>-		.end</div><div class='del'>-	.end</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-zero_byte_packet#:</div><div class='del'>-	halt</div><div class='del'>-</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode b/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode<br/>deleted file mode 100644<br/>index a433e24b0a51..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/ixp2400_tx.ucode</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,98 +0,0 @@</div><div class='del'>-static struct ixp2000_uengine_code ixp2400_tx =</div><div class='del'>-{</div><div class='del'>-	.cpu_model_bitmask	= 0x000003fe,</div><div class='del'>-	.cpu_min_revision	= 0,</div><div class='del'>-	.cpu_max_revision	= 255,</div><div class='del'>-</div><div class='del'>-	.uengine_parameters	= IXP2000_UENGINE_8_CONTEXTS |</div><div class='del'>-				  IXP2000_UENGINE_PRN_UPDATE_EVERY |</div><div class='del'>-				  IXP2000_UENGINE_NN_FROM_PREVIOUS |</div><div class='del'>-				  IXP2000_UENGINE_ASSERT_EMPTY_AT_0 |</div><div class='del'>-				  IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT |</div><div class='del'>-				  IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT,</div><div class='del'>-</div><div class='del'>-	.initial_reg_values	= (struct ixp2000_reg_value []) {</div><div class='del'>-		{ -1, -1 }</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	.num_insns		= 77,</div><div class='del'>-	.insns			= (u8 []) {</div><div class='del'>-		0xf0, 0x00, 0x00, 0x07, 0x00,</div><div class='del'>-		0xd8, 0x03, 0x00, 0x00, 0x11,</div><div class='del'>-		0x3c, 0x40, 0x00, 0x04, 0xe0,</div><div class='del'>-		0x81, 0xf2, 0x02, 0x01, 0x00,</div><div class='del'>-		0xd8, 0x00, 0x80, 0x01, 0x00,</div><div class='del'>-		0xb0, 0x08, 0x06, 0x00, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x00, 0x80,</div><div class='del'>-		0xb4, 0x49, 0x02, 0x03, 0x7f,</div><div class='del'>-		0xf0, 0x00, 0x02, 0x83, 0x00,</div><div class='del'>-		0xfc, 0x10, 0xac, 0x23, 0x08,</div><div class='del'>-		0xfc, 0x10, 0xac, 0x43, 0x10,</div><div class='del'>-		0xfc, 0x10, 0xac, 0x63, 0x18,</div><div class='del'>-		0xe0, 0x00, 0x00, 0x00, 0x02,</div><div class='del'>-		0xa0, 0x30, 0x02, 0x80, 0x00,</div><div class='del'>-		0xd8, 0x06, 0x00, 0x01, 0x01,</div><div class='del'>-		0x19, 0x40, 0x00, 0x04, 0x28,</div><div class='del'>-		0xb0, 0x0a, 0x06, 0x00, 0x00,</div><div class='del'>-		0xd8, 0x03, 0xc0, 0x01, 0x00,</div><div class='del'>-		0x00, 0x44, 0x00, 0x80, 0x80,</div><div class='del'>-		0xa0, 0x09, 0x06, 0x00, 0x00,</div><div class='del'>-		0xb0, 0x0b, 0x06, 0x04, 0x00,</div><div class='del'>-		0xd8, 0x13, 0x00, 0x01, 0x00,</div><div class='del'>-		0xb0, 0x0c, 0x06, 0x08, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x00, 0xa0,</div><div class='del'>-		0xfc, 0x10, 0xae, 0x23, 0x88,</div><div class='del'>-		0xa0, 0x00, 0x12, 0x40, 0x00,</div><div class='del'>-		0xb0, 0xc9, 0x02, 0x43, 0x01,</div><div class='del'>-		0xb4, 0x49, 0x02, 0x43, 0x7f,</div><div class='del'>-		0xb0, 0x00, 0x22, 0x80, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x02, 0x83, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x04, 0x02,</div><div class='del'>-		0xb0, 0x40, 0x6c, 0x00, 0xa0,</div><div class='del'>-		0xd8, 0x08, 0x80, 0x01, 0x01,</div><div class='del'>-		0xaa, 0x00, 0x2c, 0x08, 0x02,</div><div class='del'>-		0xa0, 0xc0, 0x30, 0x18, 0x90,</div><div class='del'>-		0xa0, 0x00, 0x43, 0x00, 0x00,</div><div class='del'>-		0xba, 0xc0, 0x32, 0xc0, 0xa0,</div><div class='del'>-		0xaa, 0xb0, 0x00, 0x0f, 0x40,</div><div class='del'>-		0xd8, 0x0a, 0x80, 0x01, 0x04,</div><div class='del'>-		0xb0, 0x0a, 0x00, 0x08, 0x00,</div><div class='del'>-		0xf0, 0x00, 0x00, 0x0f, 0x40,</div><div class='del'>-		0xa4, 0x00, 0x2c, 0x08, 0x02,</div><div class='del'>-		0xa0, 0x8a, 0x00, 0x0c, 0xa0,</div><div class='del'>-		0xe0, 0x00, 0x00, 0x00, 0x04,</div><div class='del'>-		0xd8, 0x0c, 0x80, 0x00, 0x18,</div><div class='del'>-		0x3c, 0x40, 0x00, 0x04, 0xe0,</div><div class='del'>-		0xba, 0x80, 0x42, 0x01, 0x80,</div><div class='del'>-		0xb4, 0x40, 0x40, 0x13, 0xff,</div><div class='del'>-		0xaa, 0x88, 0x00, 0x10, 0x80,</div><div class='del'>-		0xb0, 0x08, 0x06, 0x00, 0x00,</div><div class='del'>-		0xaa, 0xf0, 0x0d, 0x80, 0x80,</div><div class='del'>-		0xd8, 0x0b, 0x40, 0x01, 0x05,</div><div class='del'>-		0xa0, 0x88, 0x0c, 0x04, 0x80,</div><div class='del'>-		0xfc, 0x10, 0xae, 0x43, 0x90,</div><div class='del'>-		0xba, 0xc0, 0x50, 0x0f, 0x01,</div><div class='del'>-		0x9a, 0x30, 0x50, 0x15, 0x30,</div><div class='del'>-		0x9a, 0xb0, 0x50, 0x16, 0x30,</div><div class='del'>-		0x9b, 0x50, 0x58, 0x16, 0x01,</div><div class='del'>-		0x8a, 0xe2, 0x08, 0x16, 0x21,</div><div class='del'>-		0x6b, 0x4e, 0x00, 0x83, 0x03,</div><div class='del'>-		0xe0, 0x00, 0x00, 0x00, 0x30,</div><div class='del'>-		0x9a, 0x80, 0x70, 0x0e, 0x04,</div><div class='del'>-		0x8b, 0x88, 0x08, 0x1e, 0x02,</div><div class='del'>-		0xf0, 0x00, 0x0c, 0x01, 0x81,</div><div class='del'>-		0xf0, 0x01, 0x80, 0x1f, 0x00,</div><div class='del'>-		0x9b, 0xd0, 0x78, 0x1e, 0x01,</div><div class='del'>-		0x3d, 0x42, 0x00, 0x1c, 0x20,</div><div class='del'>-		0xe0, 0x00, 0x00, 0x00, 0x08,</div><div class='del'>-		0xfc, 0x10, 0xae, 0x63, 0x98,</div><div class='del'>-		0xa4, 0x30, 0x0c, 0x04, 0x02,</div><div class='del'>-		0xd8, 0x03, 0x00, 0x01, 0x00,</div><div class='del'>-		0xd8, 0x11, 0xc1, 0x42, 0x14,</div><div class='del'>-		0xa0, 0x18, 0x00, 0x08, 0x00,</div><div class='del'>-		0x1a, 0x40, 0x00, 0x04, 0x2c,</div><div class='del'>-		0x33, 0x00, 0x01, 0x2f, 0x20,</div><div class='del'>-		0xd8, 0x03, 0x00, 0x00, 0x18,</div><div class='del'>-		0xe0, 0x00, 0x02, 0x00, 0x00,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/ixpdev.c b/drivers/net/ethernet/xscale/ixp2000/ixpdev.c<br/>deleted file mode 100644<br/>index 45008377c8bf..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/ixpdev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/ixpdev.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,437 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * IXP2000 MSF network device driver</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/moduleparam.h&gt;</div><div class='del'>-#include &lt;linux/gfp.h&gt;</div><div class='del'>-#include &lt;asm/hardware/uengine.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include "ixp2400_rx.ucode"</div><div class='del'>-#include "ixp2400_tx.ucode"</div><div class='del'>-#include "ixpdev_priv.h"</div><div class='del'>-#include "ixpdev.h"</div><div class='del'>-#include "pm3386.h"</div><div class='del'>-</div><div class='del'>-#define DRV_MODULE_VERSION	"0.2"</div><div class='del'>-</div><div class='del'>-static int nds_count;</div><div class='del'>-static struct net_device **nds;</div><div class='del'>-static int nds_open;</div><div class='del'>-static void (*set_port_admin_status)(int port, int up);</div><div class='del'>-</div><div class='del'>-static struct ixpdev_rx_desc * const rx_desc =</div><div class='del'>-	(struct ixpdev_rx_desc *)(IXP2000_SRAM0_VIRT_BASE + RX_BUF_DESC_BASE);</div><div class='del'>-static struct ixpdev_tx_desc * const tx_desc =</div><div class='del'>-	(struct ixpdev_tx_desc *)(IXP2000_SRAM0_VIRT_BASE + TX_BUF_DESC_BASE);</div><div class='del'>-static int tx_pointer;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int ixpdev_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct ixpdev_priv *ip = netdev_priv(dev);</div><div class='del'>-	struct ixpdev_tx_desc *desc;</div><div class='del'>-	int entry;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (unlikely(skb-&gt;len &gt; PAGE_SIZE)) {</div><div class='del'>-		/* @@@ Count drops.  */</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	entry = tx_pointer;</div><div class='del'>-	tx_pointer = (tx_pointer + 1) % TX_BUF_COUNT;</div><div class='del'>-</div><div class='del'>-	desc = tx_desc + entry;</div><div class='del'>-	desc-&gt;pkt_length = skb-&gt;len;</div><div class='del'>-	desc-&gt;channel = ip-&gt;channel;</div><div class='del'>-</div><div class='del'>-	skb_copy_and_csum_dev(skb, phys_to_virt(desc-&gt;buf_addr));</div><div class='del'>-	dev_kfree_skb(skb);</div><div class='del'>-</div><div class='del'>-	ixp2000_reg_write(RING_TX_PENDING,</div><div class='del'>-		TX_BUF_DESC_BASE + (entry * sizeof(struct ixpdev_tx_desc)));</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	ip-&gt;tx_queue_entries++;</div><div class='del'>-	if (ip-&gt;tx_queue_entries == TX_BUF_COUNT_PER_CHAN)</div><div class='del'>-		netif_stop_queue(dev);</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int ixpdev_rx(struct net_device *dev, int processed, int budget)</div><div class='del'>-{</div><div class='del'>-	while (processed &lt; budget) {</div><div class='del'>-		struct ixpdev_rx_desc *desc;</div><div class='del'>-		struct sk_buff *skb;</div><div class='del'>-		void *buf;</div><div class='del'>-		u32 _desc;</div><div class='del'>-</div><div class='del'>-		_desc = ixp2000_reg_read(RING_RX_DONE);</div><div class='del'>-		if (_desc == 0)</div><div class='del'>-			return 0;</div><div class='del'>-</div><div class='del'>-		desc = rx_desc +</div><div class='del'>-			((_desc - RX_BUF_DESC_BASE) / sizeof(struct ixpdev_rx_desc));</div><div class='del'>-		buf = phys_to_virt(desc-&gt;buf_addr);</div><div class='del'>-</div><div class='del'>-		if (desc-&gt;pkt_length &lt; 4 || desc-&gt;pkt_length &gt; PAGE_SIZE) {</div><div class='del'>-			printk(KERN_ERR "ixp2000: rx err, length %d\n",</div><div class='del'>-					desc-&gt;pkt_length);</div><div class='del'>-			goto err;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (desc-&gt;channel &lt; 0 || desc-&gt;channel &gt;= nds_count) {</div><div class='del'>-			printk(KERN_ERR "ixp2000: rx err, channel %d\n",</div><div class='del'>-					desc-&gt;channel);</div><div class='del'>-			goto err;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* @@@ Make FCS stripping configurable.  */</div><div class='del'>-		desc-&gt;pkt_length -= 4;</div><div class='del'>-</div><div class='del'>-		if (unlikely(!netif_running(nds[desc-&gt;channel])))</div><div class='del'>-			goto err;</div><div class='del'>-</div><div class='del'>-		skb = netdev_alloc_skb_ip_align(dev, desc-&gt;pkt_length);</div><div class='del'>-		if (likely(skb != NULL)) {</div><div class='del'>-			skb_copy_to_linear_data(skb, buf, desc-&gt;pkt_length);</div><div class='del'>-			skb_put(skb, desc-&gt;pkt_length);</div><div class='del'>-			skb-&gt;protocol = eth_type_trans(skb, nds[desc-&gt;channel]);</div><div class='del'>-</div><div class='del'>-			netif_receive_skb(skb);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-err:</div><div class='del'>-		ixp2000_reg_write(RING_RX_PENDING, _desc);</div><div class='del'>-		processed++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return processed;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* dev always points to nds[0].  */</div><div class='del'>-static int ixpdev_poll(struct napi_struct *napi, int budget)</div><div class='del'>-{</div><div class='del'>-	struct ixpdev_priv *ip = container_of(napi, struct ixpdev_priv, napi);</div><div class='del'>-	struct net_device *dev = ip-&gt;dev;</div><div class='del'>-	int rx;</div><div class='del'>-</div><div class='del'>-	rx = 0;</div><div class='del'>-	do {</div><div class='del'>-		ixp2000_reg_write(IXP2000_IRQ_THD_RAW_STATUS_A_0, 0x00ff);</div><div class='del'>-</div><div class='del'>-		rx = ixpdev_rx(dev, rx, budget);</div><div class='del'>-		if (rx &gt;= budget)</div><div class='del'>-			break;</div><div class='del'>-	} while (ixp2000_reg_read(IXP2000_IRQ_THD_RAW_STATUS_A_0) &amp; 0x00ff);</div><div class='del'>-</div><div class='del'>-	napi_complete(napi);</div><div class='del'>-	ixp2000_reg_write(IXP2000_IRQ_THD_ENABLE_SET_A_0, 0x00ff);</div><div class='del'>-</div><div class='del'>-	return rx;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ixpdev_tx_complete(void)</div><div class='del'>-{</div><div class='del'>-	int channel;</div><div class='del'>-	u32 wake;</div><div class='del'>-</div><div class='del'>-	wake = 0;</div><div class='del'>-	while (1) {</div><div class='del'>-		struct ixpdev_priv *ip;</div><div class='del'>-		u32 desc;</div><div class='del'>-		int entry;</div><div class='del'>-</div><div class='del'>-		desc = ixp2000_reg_read(RING_TX_DONE);</div><div class='del'>-		if (desc == 0)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/* @@@ Check whether entries come back in order.  */</div><div class='del'>-		entry = (desc - TX_BUF_DESC_BASE) / sizeof(struct ixpdev_tx_desc);</div><div class='del'>-		channel = tx_desc[entry].channel;</div><div class='del'>-</div><div class='del'>-		if (channel &lt; 0 || channel &gt;= nds_count) {</div><div class='del'>-			printk(KERN_ERR "ixp2000: txcomp channel index "</div><div class='del'>-					"out of bounds (%d, %.8i, %d)\n",</div><div class='del'>-					channel, (unsigned int)desc, entry);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ip = netdev_priv(nds[channel]);</div><div class='del'>-		if (ip-&gt;tx_queue_entries == TX_BUF_COUNT_PER_CHAN)</div><div class='del'>-			wake |= 1 &lt;&lt; channel;</div><div class='del'>-		ip-&gt;tx_queue_entries--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (channel = 0; wake != 0; channel++) {</div><div class='del'>-		if (wake &amp; (1 &lt;&lt; channel)) {</div><div class='del'>-			netif_wake_queue(nds[channel]);</div><div class='del'>-			wake &amp;= ~(1 &lt;&lt; channel);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t ixpdev_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	u32 status;</div><div class='del'>-</div><div class='del'>-	status = ixp2000_reg_read(IXP2000_IRQ_THD_STATUS_A_0);</div><div class='del'>-	if (status == 0)</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Any of the eight receive units signaled RX?</div><div class='del'>-	 */</div><div class='del'>-	if (status &amp; 0x00ff) {</div><div class='del'>-		struct net_device *dev = nds[0];</div><div class='del'>-		struct ixpdev_priv *ip = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-		ixp2000_reg_wrb(IXP2000_IRQ_THD_ENABLE_CLEAR_A_0, 0x00ff);</div><div class='del'>-		if (likely(napi_schedule_prep(&amp;ip-&gt;napi))) {</div><div class='del'>-			__napi_schedule(&amp;ip-&gt;napi);</div><div class='del'>-		} else {</div><div class='del'>-			printk(KERN_CRIT "ixp2000: irq while polling!!\n");</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Any of the eight transmit units signaled TXdone?</div><div class='del'>-	 */</div><div class='del'>-	if (status &amp; 0xff00) {</div><div class='del'>-		ixp2000_reg_wrb(IXP2000_IRQ_THD_RAW_STATUS_A_0, 0xff00);</div><div class='del'>-		ixpdev_tx_complete();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-static void ixpdev_poll_controller(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	disable_irq(IRQ_IXP2000_THDA0);</div><div class='del'>-	ixpdev_interrupt(IRQ_IXP2000_THDA0, dev);</div><div class='del'>-	enable_irq(IRQ_IXP2000_THDA0);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int ixpdev_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct ixpdev_priv *ip = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	napi_enable(&amp;ip-&gt;napi);</div><div class='del'>-	if (!nds_open++) {</div><div class='del'>-		err = request_irq(IRQ_IXP2000_THDA0, ixpdev_interrupt,</div><div class='del'>-					IRQF_SHARED, "ixp2000_eth", nds);</div><div class='del'>-		if (err) {</div><div class='del'>-			nds_open--;</div><div class='del'>-			napi_disable(&amp;ip-&gt;napi);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ixp2000_reg_write(IXP2000_IRQ_THD_ENABLE_SET_A_0, 0xffff);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	set_port_admin_status(ip-&gt;channel, 1);</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ixpdev_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct ixpdev_priv *ip = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	napi_disable(&amp;ip-&gt;napi);</div><div class='del'>-	set_port_admin_status(ip-&gt;channel, 0);</div><div class='del'>-</div><div class='del'>-	if (!--nds_open) {</div><div class='del'>-		ixp2000_reg_write(IXP2000_IRQ_THD_ENABLE_CLEAR_A_0, 0xffff);</div><div class='del'>-		free_irq(IRQ_IXP2000_THDA0, nds);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct net_device_stats *ixpdev_get_stats(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct ixpdev_priv *ip = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	pm3386_get_stats(ip-&gt;channel, &amp;(dev-&gt;stats));</div><div class='del'>-</div><div class='del'>-	return &amp;(dev-&gt;stats);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops ixpdev_netdev_ops = {</div><div class='del'>-	.ndo_open		= ixpdev_open,</div><div class='del'>-	.ndo_stop		= ixpdev_close,</div><div class='del'>-	.ndo_start_xmit		= ixpdev_xmit,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='del'>-	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_set_mac_address	= eth_mac_addr,</div><div class='del'>-	.ndo_get_stats		= ixpdev_get_stats,</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-	.ndo_poll_controller	= ixpdev_poll_controller,</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct net_device *ixpdev_alloc(int channel, int sizeof_priv)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct ixpdev_priv *ip;</div><div class='del'>-</div><div class='del'>-	dev = alloc_etherdev(sizeof_priv);</div><div class='del'>-	if (dev == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;ixpdev_netdev_ops;</div><div class='del'>-</div><div class='del'>-	dev-&gt;features |= NETIF_F_SG | NETIF_F_HW_CSUM;</div><div class='del'>-</div><div class='del'>-	ip = netdev_priv(dev);</div><div class='del'>-	ip-&gt;dev = dev;</div><div class='del'>-	netif_napi_add(dev, &amp;ip-&gt;napi, ixpdev_poll, 64);</div><div class='del'>-	ip-&gt;channel = channel;</div><div class='del'>-	ip-&gt;tx_queue_entries = 0;</div><div class='del'>-</div><div class='del'>-	return dev;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int ixpdev_init(int __nds_count, struct net_device **__nds,</div><div class='del'>-		void (*__set_port_admin_status)(int port, int up))</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	BUILD_BUG_ON(RX_BUF_COUNT &gt; 192 || TX_BUF_COUNT &gt; 192);</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "IXP2000 MSF ethernet driver %s\n", DRV_MODULE_VERSION);</div><div class='del'>-</div><div class='del'>-	nds_count = __nds_count;</div><div class='del'>-	nds = __nds;</div><div class='del'>-	set_port_admin_status = __set_port_admin_status;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; RX_BUF_COUNT; i++) {</div><div class='del'>-		void *buf;</div><div class='del'>-</div><div class='del'>-		buf = (void *)get_zeroed_page(GFP_KERNEL);</div><div class='del'>-		if (buf == NULL) {</div><div class='del'>-			err = -ENOMEM;</div><div class='del'>-			while (--i &gt;= 0)</div><div class='del'>-				free_page((unsigned long)phys_to_virt(rx_desc[i].buf_addr));</div><div class='del'>-			goto err_out;</div><div class='del'>-		}</div><div class='del'>-		rx_desc[i].buf_addr = virt_to_phys(buf);</div><div class='del'>-		rx_desc[i].buf_length = PAGE_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* @@@ Maybe we shouldn't be preallocating TX buffers.  */</div><div class='del'>-	for (i = 0; i &lt; TX_BUF_COUNT; i++) {</div><div class='del'>-		void *buf;</div><div class='del'>-</div><div class='del'>-		buf = (void *)get_zeroed_page(GFP_KERNEL);</div><div class='del'>-		if (buf == NULL) {</div><div class='del'>-			err = -ENOMEM;</div><div class='del'>-			while (--i &gt;= 0)</div><div class='del'>-				free_page((unsigned long)phys_to_virt(tx_desc[i].buf_addr));</div><div class='del'>-			goto err_free_rx;</div><div class='del'>-		}</div><div class='del'>-		tx_desc[i].buf_addr = virt_to_phys(buf);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* 256 entries, ring status set means 'empty', base address 0x0000.  */</div><div class='del'>-	ixp2000_reg_write(RING_RX_PENDING_BASE, 0x44000000);</div><div class='del'>-	ixp2000_reg_write(RING_RX_PENDING_HEAD, 0x00000000);</div><div class='del'>-	ixp2000_reg_write(RING_RX_PENDING_TAIL, 0x00000000);</div><div class='del'>-</div><div class='del'>-	/* 256 entries, ring status set means 'full', base address 0x0400.  */</div><div class='del'>-	ixp2000_reg_write(RING_RX_DONE_BASE, 0x40000400);</div><div class='del'>-	ixp2000_reg_write(RING_RX_DONE_HEAD, 0x00000000);</div><div class='del'>-	ixp2000_reg_write(RING_RX_DONE_TAIL, 0x00000000);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; RX_BUF_COUNT; i++) {</div><div class='del'>-		ixp2000_reg_write(RING_RX_PENDING,</div><div class='del'>-			RX_BUF_DESC_BASE + (i * sizeof(struct ixpdev_rx_desc)));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ixp2000_uengine_load(0, &amp;ixp2400_rx);</div><div class='del'>-	ixp2000_uengine_start_contexts(0, 0xff);</div><div class='del'>-</div><div class='del'>-	/* 256 entries, ring status set means 'empty', base address 0x0800.  */</div><div class='del'>-	ixp2000_reg_write(RING_TX_PENDING_BASE, 0x44000800);</div><div class='del'>-	ixp2000_reg_write(RING_TX_PENDING_HEAD, 0x00000000);</div><div class='del'>-	ixp2000_reg_write(RING_TX_PENDING_TAIL, 0x00000000);</div><div class='del'>-</div><div class='del'>-	/* 256 entries, ring status set means 'full', base address 0x0c00.  */</div><div class='del'>-	ixp2000_reg_write(RING_TX_DONE_BASE, 0x40000c00);</div><div class='del'>-	ixp2000_reg_write(RING_TX_DONE_HEAD, 0x00000000);</div><div class='del'>-	ixp2000_reg_write(RING_TX_DONE_TAIL, 0x00000000);</div><div class='del'>-</div><div class='del'>-	ixp2000_uengine_load(1, &amp;ixp2400_tx);</div><div class='del'>-	ixp2000_uengine_start_contexts(1, 0xff);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; nds_count; i++) {</div><div class='del'>-		err = register_netdev(nds[i]);</div><div class='del'>-		if (err) {</div><div class='del'>-			while (--i &gt;= 0)</div><div class='del'>-				unregister_netdev(nds[i]);</div><div class='del'>-			goto err_free_tx;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; nds_count; i++) {</div><div class='del'>-		printk(KERN_INFO "%s: IXP2000 MSF ethernet (port %d), %pM.\n",</div><div class='del'>-				 nds[i]-&gt;name, i, nds[i]-&gt;dev_addr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_free_tx:</div><div class='del'>-	for (i = 0; i &lt; TX_BUF_COUNT; i++)</div><div class='del'>-		free_page((unsigned long)phys_to_virt(tx_desc[i].buf_addr));</div><div class='del'>-</div><div class='del'>-err_free_rx:</div><div class='del'>-	for (i = 0; i &lt; RX_BUF_COUNT; i++)</div><div class='del'>-		free_page((unsigned long)phys_to_virt(rx_desc[i].buf_addr));</div><div class='del'>-</div><div class='del'>-err_out:</div><div class='del'>-	return err;</div><div class='del'>-} </div><div class='del'>-</div><div class='del'>-void ixpdev_deinit(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* @@@ Flush out pending packets.  */</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; nds_count; i++)</div><div class='del'>-		unregister_netdev(nds[i]);</div><div class='del'>-</div><div class='del'>-	ixp2000_uengine_stop_contexts(1, 0xff);</div><div class='del'>-	ixp2000_uengine_stop_contexts(0, 0xff);</div><div class='del'>-	ixp2000_uengine_reset(0x3);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; TX_BUF_COUNT; i++)</div><div class='del'>-		free_page((unsigned long)phys_to_virt(tx_desc[i].buf_addr));</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; RX_BUF_COUNT; i++)</div><div class='del'>-		free_page((unsigned long)phys_to_virt(rx_desc[i].buf_addr));</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/ixpdev.h b/drivers/net/ethernet/xscale/ixp2000/ixpdev.h<br/>deleted file mode 100644<br/>index 391ece623243..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/ixpdev.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/ixpdev.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * IXP2000 MSF network device driver</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __IXPDEV_H</div><div class='del'>-#define __IXPDEV_H</div><div class='del'>-</div><div class='del'>-struct ixpdev_priv</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct napi_struct napi;</div><div class='del'>-	int	channel;</div><div class='del'>-	int	tx_queue_entries;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct net_device *ixpdev_alloc(int channel, int sizeof_priv);</div><div class='del'>-int ixpdev_init(int num_ports, struct net_device **nds,</div><div class='del'>-		void (*set_port_admin_status)(int port, int up));</div><div class='del'>-void ixpdev_deinit(void);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h b/drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h<br/>deleted file mode 100644<br/>index 86aa08ea0c33..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/ixpdev_priv.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,57 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * IXP2000 MSF network device driver</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __IXPDEV_PRIV_H</div><div class='del'>-#define __IXPDEV_PRIV_H</div><div class='del'>-</div><div class='del'>-#define RX_BUF_DESC_BASE	0x00001000</div><div class='del'>-#define RX_BUF_COUNT		((3 * PAGE_SIZE) / (4 * sizeof(struct ixpdev_rx_desc)))</div><div class='del'>-#define TX_BUF_DESC_BASE	0x00002000</div><div class='del'>-#define TX_BUF_COUNT		((3 * PAGE_SIZE) / (4 * sizeof(struct ixpdev_tx_desc)))</div><div class='del'>-#define TX_BUF_COUNT_PER_CHAN	(TX_BUF_COUNT / 4)</div><div class='del'>-</div><div class='del'>-#define RING_RX_PENDING		((u32 *)IXP2000_SCRATCH_RING_VIRT_BASE)</div><div class='del'>-#define RING_RX_DONE		((u32 *)(IXP2000_SCRATCH_RING_VIRT_BASE + 4))</div><div class='del'>-#define RING_TX_PENDING		((u32 *)(IXP2000_SCRATCH_RING_VIRT_BASE + 8))</div><div class='del'>-#define RING_TX_DONE		((u32 *)(IXP2000_SCRATCH_RING_VIRT_BASE + 12))</div><div class='del'>-</div><div class='del'>-#define SCRATCH_REG(x)		((u32 *)(IXP2000_GLOBAL_REG_VIRT_BASE | 0x0800 | (x)))</div><div class='del'>-#define RING_RX_PENDING_BASE	SCRATCH_REG(0x00)</div><div class='del'>-#define RING_RX_PENDING_HEAD	SCRATCH_REG(0x04)</div><div class='del'>-#define RING_RX_PENDING_TAIL	SCRATCH_REG(0x08)</div><div class='del'>-#define RING_RX_DONE_BASE	SCRATCH_REG(0x10)</div><div class='del'>-#define RING_RX_DONE_HEAD	SCRATCH_REG(0x14)</div><div class='del'>-#define RING_RX_DONE_TAIL	SCRATCH_REG(0x18)</div><div class='del'>-#define RING_TX_PENDING_BASE	SCRATCH_REG(0x20)</div><div class='del'>-#define RING_TX_PENDING_HEAD	SCRATCH_REG(0x24)</div><div class='del'>-#define RING_TX_PENDING_TAIL	SCRATCH_REG(0x28)</div><div class='del'>-#define RING_TX_DONE_BASE	SCRATCH_REG(0x30)</div><div class='del'>-#define RING_TX_DONE_HEAD	SCRATCH_REG(0x34)</div><div class='del'>-#define RING_TX_DONE_TAIL	SCRATCH_REG(0x38)</div><div class='del'>-</div><div class='del'>-struct ixpdev_rx_desc</div><div class='del'>-{</div><div class='del'>-	u32	buf_addr;</div><div class='del'>-	u32	buf_length;</div><div class='del'>-	u32	channel;</div><div class='del'>-	u32	pkt_length;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ixpdev_tx_desc</div><div class='del'>-{</div><div class='del'>-	u32	buf_addr;</div><div class='del'>-	u32	pkt_length;</div><div class='del'>-	u32	channel;</div><div class='del'>-	u32	unused;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/pm3386.c b/drivers/net/ethernet/xscale/ixp2000/pm3386.c<br/>deleted file mode 100644<br/>index e08d3f9863b8..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/pm3386.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/pm3386.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,351 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Helper functions for the PM3386s on the Radisys ENP2611</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include "pm3386.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Read from register 'reg' of PM3386 device 'pm'.</div><div class='del'>- */</div><div class='del'>-static u16 pm3386_reg_read(int pm, int reg)</div><div class='del'>-{</div><div class='del'>-	void *_reg;</div><div class='del'>-	u16 value;</div><div class='del'>-</div><div class='del'>-	_reg = (void *)ENP2611_PM3386_0_VIRT_BASE;</div><div class='del'>-	if (pm == 1)</div><div class='del'>-		_reg = (void *)ENP2611_PM3386_1_VIRT_BASE;</div><div class='del'>-</div><div class='del'>-	value = *((volatile u16 *)(_reg + (reg &lt;&lt; 1)));</div><div class='del'>-</div><div class='del'>-//	printk(KERN_INFO "pm3386_reg_read(%d, %.3x) = %.8x\n", pm, reg, value);</div><div class='del'>-</div><div class='del'>-	return value;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Write to register 'reg' of PM3386 device 'pm', and perform</div><div class='del'>- * a readback from the identification register.</div><div class='del'>- */</div><div class='del'>-static void pm3386_reg_write(int pm, int reg, u16 value)</div><div class='del'>-{</div><div class='del'>-	void *_reg;</div><div class='del'>-	u16 dummy;</div><div class='del'>-</div><div class='del'>-//	printk(KERN_INFO "pm3386_reg_write(%d, %.3x, %.8x)\n", pm, reg, value);</div><div class='del'>-</div><div class='del'>-	_reg = (void *)ENP2611_PM3386_0_VIRT_BASE;</div><div class='del'>-	if (pm == 1)</div><div class='del'>-		_reg = (void *)ENP2611_PM3386_1_VIRT_BASE;</div><div class='del'>-</div><div class='del'>-	*((volatile u16 *)(_reg + (reg &lt;&lt; 1))) = value;</div><div class='del'>-</div><div class='del'>-	dummy = *((volatile u16 *)_reg);</div><div class='del'>-	__asm__ __volatile__("mov %0, %0" : "+r" (dummy));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Read from port 'port' register 'reg', where the registers</div><div class='del'>- * for the different ports are 'spacing' registers apart.</div><div class='del'>- */</div><div class='del'>-static u16 pm3386_port_reg_read(int port, int _reg, int spacing)</div><div class='del'>-{</div><div class='del'>-	int reg;</div><div class='del'>-</div><div class='del'>-	reg = _reg;</div><div class='del'>-	if (port &amp; 1)</div><div class='del'>-		reg += spacing;</div><div class='del'>-</div><div class='del'>-	return pm3386_reg_read(port &gt;&gt; 1, reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Write to port 'port' register 'reg', where the registers</div><div class='del'>- * for the different ports are 'spacing' registers apart.</div><div class='del'>- */</div><div class='del'>-static void pm3386_port_reg_write(int port, int _reg, int spacing, u16 value)</div><div class='del'>-{</div><div class='del'>-	int reg;</div><div class='del'>-</div><div class='del'>-	reg = _reg;</div><div class='del'>-	if (port &amp; 1)</div><div class='del'>-		reg += spacing;</div><div class='del'>-</div><div class='del'>-	pm3386_reg_write(port &gt;&gt; 1, reg, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int pm3386_secondary_present(void)</div><div class='del'>-{</div><div class='del'>-	return pm3386_reg_read(1, 0) == 0x3386;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pm3386_reset(void)</div><div class='del'>-{</div><div class='del'>-	u8 mac[3][6];</div><div class='del'>-	int secondary;</div><div class='del'>-</div><div class='del'>-	secondary = pm3386_secondary_present();</div><div class='del'>-</div><div class='del'>-	/* Save programmed MAC addresses.  */</div><div class='del'>-	pm3386_get_mac(0, mac[0]);</div><div class='del'>-	pm3386_get_mac(1, mac[1]);</div><div class='del'>-	if (secondary)</div><div class='del'>-		pm3386_get_mac(2, mac[2]);</div><div class='del'>-</div><div class='del'>-	/* Assert analog and digital reset.  */</div><div class='del'>-	pm3386_reg_write(0, 0x002, 0x0060);</div><div class='del'>-	if (secondary)</div><div class='del'>-		pm3386_reg_write(1, 0x002, 0x0060);</div><div class='del'>-	mdelay(1);</div><div class='del'>-</div><div class='del'>-	/* Deassert analog reset.  */</div><div class='del'>-	pm3386_reg_write(0, 0x002, 0x0062);</div><div class='del'>-	if (secondary)</div><div class='del'>-		pm3386_reg_write(1, 0x002, 0x0062);</div><div class='del'>-	mdelay(10);</div><div class='del'>-</div><div class='del'>-	/* Deassert digital reset.  */</div><div class='del'>-	pm3386_reg_write(0, 0x002, 0x0063);</div><div class='del'>-	if (secondary)</div><div class='del'>-		pm3386_reg_write(1, 0x002, 0x0063);</div><div class='del'>-	mdelay(10);</div><div class='del'>-</div><div class='del'>-	/* Restore programmed MAC addresses.  */</div><div class='del'>-	pm3386_set_mac(0, mac[0]);</div><div class='del'>-	pm3386_set_mac(1, mac[1]);</div><div class='del'>-	if (secondary)</div><div class='del'>-		pm3386_set_mac(2, mac[2]);</div><div class='del'>-</div><div class='del'>-	/* Disable carrier on all ports.  */</div><div class='del'>-	pm3386_set_carrier(0, 0);</div><div class='del'>-	pm3386_set_carrier(1, 0);</div><div class='del'>-	if (secondary)</div><div class='del'>-		pm3386_set_carrier(2, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u16 swaph(u16 x)</div><div class='del'>-{</div><div class='del'>-	return ((x &lt;&lt; 8) | (x &gt;&gt; 8)) &amp; 0xffff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int pm3386_port_count(void)</div><div class='del'>-{</div><div class='del'>-	return 2 + pm3386_secondary_present();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pm3386_init_port(int port)</div><div class='del'>-{</div><div class='del'>-	int pm = port &gt;&gt; 1;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Work around ENP2611 bootloader programming MAC address</div><div class='del'>-	 * in reverse.</div><div class='del'>-	 */</div><div class='del'>-	if (pm3386_port_reg_read(port, 0x30a, 0x100) == 0x0000 &amp;&amp;</div><div class='del'>-	    (pm3386_port_reg_read(port, 0x309, 0x100) &amp; 0xff00) == 0x5000) {</div><div class='del'>-		u16 temp[3];</div><div class='del'>-</div><div class='del'>-		temp[0] = pm3386_port_reg_read(port, 0x308, 0x100);</div><div class='del'>-		temp[1] = pm3386_port_reg_read(port, 0x309, 0x100);</div><div class='del'>-		temp[2] = pm3386_port_reg_read(port, 0x30a, 0x100);</div><div class='del'>-		pm3386_port_reg_write(port, 0x308, 0x100, swaph(temp[2]));</div><div class='del'>-		pm3386_port_reg_write(port, 0x309, 0x100, swaph(temp[1]));</div><div class='del'>-		pm3386_port_reg_write(port, 0x30a, 0x100, swaph(temp[0]));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialise narrowbanding mode.  See application note 2010486</div><div class='del'>-	 * for more information.  (@@@ We also need to issue a reset</div><div class='del'>-	 * when ROOL or DOOL are detected.)</div><div class='del'>-	 */</div><div class='del'>-	pm3386_port_reg_write(port, 0x708, 0x10, 0xd055);</div><div class='del'>-	udelay(500);</div><div class='del'>-	pm3386_port_reg_write(port, 0x708, 0x10, 0x5055);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * SPI-3 ingress block.  Set 64 bytes SPI-3 burst size</div><div class='del'>-	 * towards SPI-3 bridge.</div><div class='del'>-	 */</div><div class='del'>-	pm3386_port_reg_write(port, 0x122, 0x20, 0x0002);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Enable ingress protocol checking, and soft reset the</div><div class='del'>-	 * SPI-3 ingress block.</div><div class='del'>-	 */</div><div class='del'>-	pm3386_reg_write(pm, 0x103, 0x0003);</div><div class='del'>-	while (!(pm3386_reg_read(pm, 0x103) &amp; 0x80))</div><div class='del'>-		;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * SPI-3 egress block.  Gather 12288 bytes of the current</div><div class='del'>-	 * packet in the TX fifo before initiating transmit on the</div><div class='del'>-	 * SERDES interface.  (Prevents TX underflows.)</div><div class='del'>-	 */</div><div class='del'>-	pm3386_port_reg_write(port, 0x221, 0x20, 0x0007);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Enforce odd parity from the SPI-3 bridge, and soft reset</div><div class='del'>-	 * the SPI-3 egress block.</div><div class='del'>-	 */</div><div class='del'>-	pm3386_reg_write(pm, 0x203, 0x000d &amp; ~(4 &lt;&lt; (port &amp; 1)));</div><div class='del'>-	while ((pm3386_reg_read(pm, 0x203) &amp; 0x000c) != 0x000c)</div><div class='del'>-		;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * EGMAC block.  Set this channels to reject long preambles,</div><div class='del'>-	 * not send or transmit PAUSE frames, enable preamble checking,</div><div class='del'>-	 * disable frame length checking, enable FCS appending, enable</div><div class='del'>-	 * TX frame padding.</div><div class='del'>-	 */</div><div class='del'>-	pm3386_port_reg_write(port, 0x302, 0x100, 0x0113);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Soft reset the EGMAC block.</div><div class='del'>-	 */</div><div class='del'>-	pm3386_port_reg_write(port, 0x301, 0x100, 0x8000);</div><div class='del'>-	pm3386_port_reg_write(port, 0x301, 0x100, 0x0000);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Auto-sense autonegotiation status.</div><div class='del'>-	 */</div><div class='del'>-	pm3386_port_reg_write(port, 0x306, 0x100, 0x0100);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Allow reception of jumbo frames.</div><div class='del'>-	 */</div><div class='del'>-	pm3386_port_reg_write(port, 0x310, 0x100, 9018);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Allow transmission of jumbo frames.</div><div class='del'>-	 */</div><div class='del'>-	pm3386_port_reg_write(port, 0x336, 0x100, 9018);</div><div class='del'>-</div><div class='del'>-	/* @@@ Should set 0x337/0x437 (RX forwarding threshold.)  */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set autonegotiation parameters to 'no PAUSE, full duplex.'</div><div class='del'>-	 */</div><div class='del'>-	pm3386_port_reg_write(port, 0x31c, 0x100, 0x0020);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Enable and restart autonegotiation.</div><div class='del'>-	 */</div><div class='del'>-	pm3386_port_reg_write(port, 0x318, 0x100, 0x0003);</div><div class='del'>-	pm3386_port_reg_write(port, 0x318, 0x100, 0x0002);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pm3386_get_mac(int port, u8 *mac)</div><div class='del'>-{</div><div class='del'>-	u16 temp;</div><div class='del'>-</div><div class='del'>-	temp = pm3386_port_reg_read(port, 0x308, 0x100);</div><div class='del'>-	mac[0] = temp &amp; 0xff;</div><div class='del'>-	mac[1] = (temp &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-</div><div class='del'>-	temp = pm3386_port_reg_read(port, 0x309, 0x100);</div><div class='del'>-	mac[2] = temp &amp; 0xff;</div><div class='del'>-	mac[3] = (temp &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-</div><div class='del'>-	temp = pm3386_port_reg_read(port, 0x30a, 0x100);</div><div class='del'>-	mac[4] = temp &amp; 0xff;</div><div class='del'>-	mac[5] = (temp &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pm3386_set_mac(int port, u8 *mac)</div><div class='del'>-{</div><div class='del'>-	pm3386_port_reg_write(port, 0x308, 0x100, (mac[1] &lt;&lt; 8) | mac[0]);</div><div class='del'>-	pm3386_port_reg_write(port, 0x309, 0x100, (mac[3] &lt;&lt; 8) | mac[2]);</div><div class='del'>-	pm3386_port_reg_write(port, 0x30a, 0x100, (mac[5] &lt;&lt; 8) | mac[4]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 pm3386_get_stat(int port, u16 base)</div><div class='del'>-{</div><div class='del'>-	u32 value;</div><div class='del'>-</div><div class='del'>-	value = pm3386_port_reg_read(port, base, 0x100);</div><div class='del'>-	value |= pm3386_port_reg_read(port, base + 1, 0x100) &lt;&lt; 16;</div><div class='del'>-</div><div class='del'>-	return value;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pm3386_get_stats(int port, struct net_device_stats *stats)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Snapshot statistics counters.</div><div class='del'>-	 */</div><div class='del'>-	pm3386_port_reg_write(port, 0x500, 0x100, 0x0001);</div><div class='del'>-	while (pm3386_port_reg_read(port, 0x500, 0x100) &amp; 0x0001)</div><div class='del'>-		;</div><div class='del'>-</div><div class='del'>-	memset(stats, 0, sizeof(*stats));</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_packets = pm3386_get_stat(port, 0x510);</div><div class='del'>-	stats-&gt;tx_packets = pm3386_get_stat(port, 0x590);</div><div class='del'>-	stats-&gt;rx_bytes = pm3386_get_stat(port, 0x514);</div><div class='del'>-	stats-&gt;tx_bytes = pm3386_get_stat(port, 0x594);</div><div class='del'>-	/* @@@ Add other stats.  */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pm3386_set_carrier(int port, int state)</div><div class='del'>-{</div><div class='del'>-	pm3386_port_reg_write(port, 0x703, 0x10, state ? 0x1001 : 0x0000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int pm3386_is_link_up(int port)</div><div class='del'>-{</div><div class='del'>-	u16 temp;</div><div class='del'>-</div><div class='del'>-	temp = pm3386_port_reg_read(port, 0x31a, 0x100);</div><div class='del'>-	temp = pm3386_port_reg_read(port, 0x31a, 0x100);</div><div class='del'>-</div><div class='del'>-	return !!(temp &amp; 0x0002);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pm3386_enable_rx(int port)</div><div class='del'>-{</div><div class='del'>-	u16 temp;</div><div class='del'>-</div><div class='del'>-	temp = pm3386_port_reg_read(port, 0x303, 0x100);</div><div class='del'>-	temp |= 0x1000;</div><div class='del'>-	pm3386_port_reg_write(port, 0x303, 0x100, temp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pm3386_disable_rx(int port)</div><div class='del'>-{</div><div class='del'>-	u16 temp;</div><div class='del'>-</div><div class='del'>-	temp = pm3386_port_reg_read(port, 0x303, 0x100);</div><div class='del'>-	temp &amp;= 0xefff;</div><div class='del'>-	pm3386_port_reg_write(port, 0x303, 0x100, temp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pm3386_enable_tx(int port)</div><div class='del'>-{</div><div class='del'>-	u16 temp;</div><div class='del'>-</div><div class='del'>-	temp = pm3386_port_reg_read(port, 0x303, 0x100);</div><div class='del'>-	temp |= 0x4000;</div><div class='del'>-	pm3386_port_reg_write(port, 0x303, 0x100, temp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pm3386_disable_tx(int port)</div><div class='del'>-{</div><div class='del'>-	u16 temp;</div><div class='del'>-</div><div class='del'>-	temp = pm3386_port_reg_read(port, 0x303, 0x100);</div><div class='del'>-	temp &amp;= 0xbfff;</div><div class='del'>-	pm3386_port_reg_write(port, 0x303, 0x100, temp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp2000/pm3386.h b/drivers/net/ethernet/xscale/ixp2000/pm3386.h<br/>deleted file mode 100644<br/>index cc4183dca911..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp2000/pm3386.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp2000/pm3386.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Helper functions for the PM3386s on the Radisys ENP2611</div><div class='del'>- * Copyright (C) 2004, 2005 Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;</div><div class='del'>- * Dedicated to Marija Kulikova.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __PM3386_H</div><div class='del'>-#define __PM3386_H</div><div class='del'>-</div><div class='del'>-void pm3386_reset(void);</div><div class='del'>-int pm3386_port_count(void);</div><div class='del'>-void pm3386_init_port(int port);</div><div class='del'>-void pm3386_get_mac(int port, u8 *mac);</div><div class='del'>-void pm3386_set_mac(int port, u8 *mac);</div><div class='del'>-void pm3386_get_stats(int port, struct net_device_stats *stats);</div><div class='del'>-void pm3386_set_carrier(int port, int state);</div><div class='del'>-int pm3386_is_link_up(int port);</div><div class='del'>-void pm3386_enable_rx(int port);</div><div class='del'>-void pm3386_disable_rx(int port);</div><div class='del'>-void pm3386_enable_tx(int port);</div><div class='del'>-void pm3386_disable_tx(int port);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp4xx_eth.c b/drivers/net/ethernet/xscale/ixp4xx_eth.c<br/>index 41a8b5a9849e..482648fcf0b6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp4xx_eth.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ethernet/xscale/ixp4xx_eth.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ethernet/xscale/ixp4xx_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ethernet/xscale/ixp4xx_eth.c</a></div><div class='hunk'>@@ -1002,12 +1002,41 @@ static int ixp4xx_nway_reset(struct net_device *dev)</div><div class='ctx'> 	return phy_start_aneg(port-&gt;phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int ixp46x_phc_index = -1;</div><div class='add'>+</div><div class='add'>+static int ixp4xx_get_ts_info(struct net_device *dev,</div><div class='add'>+			      struct ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_is_ixp46x()) {</div><div class='add'>+		info-&gt;so_timestamping =</div><div class='add'>+			SOF_TIMESTAMPING_TX_SOFTWARE |</div><div class='add'>+			SOF_TIMESTAMPING_RX_SOFTWARE |</div><div class='add'>+			SOF_TIMESTAMPING_SOFTWARE;</div><div class='add'>+		info-&gt;phc_index = -1;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	info-&gt;so_timestamping =</div><div class='add'>+		SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+	info-&gt;phc_index = ixp46x_phc_index;</div><div class='add'>+	info-&gt;tx_types =</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_TX_OFF) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_TX_ON);</div><div class='add'>+	info-&gt;rx_filters =</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ethtool_ops ixp4xx_ethtool_ops = {</div><div class='ctx'> 	.get_drvinfo = ixp4xx_get_drvinfo,</div><div class='ctx'> 	.get_settings = ixp4xx_get_settings,</div><div class='ctx'> 	.set_settings = ixp4xx_set_settings,</div><div class='ctx'> 	.nway_reset = ixp4xx_nway_reset,</div><div class='ctx'> 	.get_link = ethtool_op_get_link,</div><div class='add'>+	.get_ts_info = ixp4xx_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/hippi/rrunner.c b/drivers/net/hippi/rrunner.c<br/>index 168c8f41d09f..d4719632ffc6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/hippi/rrunner.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/hippi/rrunner.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/hippi/rrunner.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/hippi/rrunner.c</a></div><div class='hunk'>@@ -113,10 +113,9 @@ static int __devinit rr_init_one(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	if (pci_request_regions(pdev, "rrunner")) {</div><div class='del'>-		ret = -EIO;</div><div class='add'>+	ret = pci_request_regions(pdev, "rrunner");</div><div class='add'>+	if (ret &lt; 0)</div><div class='ctx'> 		goto out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata(pdev, dev);</div><div class='ctx'> </div><div class='hunk'>@@ -124,11 +123,8 @@ static int __devinit rr_init_one(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;rrpriv-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;rr_netdev_ops;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = pci_resource_start(pdev, 0);</div><div class='del'>-</div><div class='ctx'> 	/* display version info if adapter is found */</div><div class='ctx'> 	if (!version_disp) {</div><div class='ctx'> 		/* set display flag to TRUE so that */</div><div class='hunk'>@@ -146,16 +142,15 @@ static int __devinit rr_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO "%s: Essential RoadRunner serial HIPPI "</div><div class='del'>-	       "at 0x%08lx, irq %i, PCI latency %i\n", dev-&gt;name,</div><div class='del'>-	       dev-&gt;base_addr, dev-&gt;irq, pci_latency);</div><div class='add'>+	       "at 0x%llx, irq %i, PCI latency %i\n", dev-&gt;name,</div><div class='add'>+	       (unsigned long long)pci_resource_start(pdev, 0),</div><div class='add'>+	       pdev-&gt;irq, pci_latency);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Remap the regs into kernel space.</div><div class='add'>+	 * Remap the MMIO regs into kernel space.</div><div class='ctx'> 	 */</div><div class='del'>-</div><div class='del'>-	rrpriv-&gt;regs = ioremap(dev-&gt;base_addr, 0x1000);</div><div class='del'>-</div><div class='del'>-	if (!rrpriv-&gt;regs){</div><div class='add'>+	rrpriv-&gt;regs = pci_iomap(pdev, 0, 0x1000);</div><div class='add'>+	if (!rrpriv-&gt;regs) {</div><div class='ctx'> 		printk(KERN_ERR "%s:  Unable to map I/O register, "</div><div class='ctx'> 			"RoadRunner will be disabled.\n", dev-&gt;name);</div><div class='ctx'> 		ret = -EIO;</div><div class='hunk'>@@ -202,8 +197,6 @@ static int __devinit rr_init_one(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	rr_init(dev);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = 0;</div><div class='del'>-</div><div class='ctx'> 	ret = register_netdev(dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -217,7 +210,7 @@ static int __devinit rr_init_one(struct pci_dev *pdev,</div><div class='ctx'> 		pci_free_consistent(pdev, TX_TOTAL_SIZE, rrpriv-&gt;tx_ring,</div><div class='ctx'> 				    rrpriv-&gt;tx_ring_dma);</div><div class='ctx'> 	if (rrpriv-&gt;regs)</div><div class='del'>-		iounmap(rrpriv-&gt;regs);</div><div class='add'>+		pci_iounmap(pdev, rrpriv-&gt;regs);</div><div class='ctx'> 	if (pdev) {</div><div class='ctx'> 		pci_release_regions(pdev);</div><div class='ctx'> 		pci_set_drvdata(pdev, NULL);</div><div class='hunk'>@@ -231,29 +224,26 @@ static int __devinit rr_init_one(struct pci_dev *pdev,</div><div class='ctx'> static void __devexit rr_remove_one (struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='add'>+	struct rr_private *rr = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (dev) {</div><div class='del'>-		struct rr_private *rr = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-		if (!(readl(&amp;rr-&gt;regs-&gt;HostCtrl) &amp; NIC_HALTED)){</div><div class='del'>-			printk(KERN_ERR "%s: trying to unload running NIC\n",</div><div class='del'>-			       dev-&gt;name);</div><div class='del'>-			writel(HALT_NIC, &amp;rr-&gt;regs-&gt;HostCtrl);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		pci_free_consistent(pdev, EVT_RING_SIZE, rr-&gt;evt_ring,</div><div class='del'>-				    rr-&gt;evt_ring_dma);</div><div class='del'>-		pci_free_consistent(pdev, RX_TOTAL_SIZE, rr-&gt;rx_ring,</div><div class='del'>-				    rr-&gt;rx_ring_dma);</div><div class='del'>-		pci_free_consistent(pdev, TX_TOTAL_SIZE, rr-&gt;tx_ring,</div><div class='del'>-				    rr-&gt;tx_ring_dma);</div><div class='del'>-		unregister_netdev(dev);</div><div class='del'>-		iounmap(rr-&gt;regs);</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-		pci_release_regions(pdev);</div><div class='del'>-		pci_disable_device(pdev);</div><div class='del'>-		pci_set_drvdata(pdev, NULL);</div><div class='add'>+	if (!(readl(&amp;rr-&gt;regs-&gt;HostCtrl) &amp; NIC_HALTED)) {</div><div class='add'>+		printk(KERN_ERR "%s: trying to unload running NIC\n",</div><div class='add'>+		       dev-&gt;name);</div><div class='add'>+		writel(HALT_NIC, &amp;rr-&gt;regs-&gt;HostCtrl);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	unregister_netdev(dev);</div><div class='add'>+	pci_free_consistent(pdev, EVT_RING_SIZE, rr-&gt;evt_ring,</div><div class='add'>+			    rr-&gt;evt_ring_dma);</div><div class='add'>+	pci_free_consistent(pdev, RX_TOTAL_SIZE, rr-&gt;rx_ring,</div><div class='add'>+			    rr-&gt;rx_ring_dma);</div><div class='add'>+	pci_free_consistent(pdev, TX_TOTAL_SIZE, rr-&gt;tx_ring,</div><div class='add'>+			    rr-&gt;tx_ring_dma);</div><div class='add'>+	pci_iounmap(pdev, rr-&gt;regs);</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+	free_netdev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1229,9 +1219,9 @@ static int rr_open(struct net_device *dev)</div><div class='ctx'> 	readl(&amp;regs-&gt;HostCtrl);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;rrpriv-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	if (request_irq(dev-&gt;irq, rr_interrupt, IRQF_SHARED, dev-&gt;name, dev)) {</div><div class='add'>+	if (request_irq(pdev-&gt;irq, rr_interrupt, IRQF_SHARED, dev-&gt;name, dev)) {</div><div class='ctx'> 		printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",</div><div class='del'>-		       dev-&gt;name, dev-&gt;irq);</div><div class='add'>+		       dev-&gt;name, pdev-&gt;irq);</div><div class='ctx'> 		ecode = -EAGAIN;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1338,16 +1328,15 @@ static void rr_dump(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static int rr_close(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct rr_private *rrpriv;</div><div class='del'>-	struct rr_regs __iomem *regs;</div><div class='add'>+	struct rr_private *rrpriv = netdev_priv(dev);</div><div class='add'>+	struct rr_regs __iomem *regs = rrpriv-&gt;regs;</div><div class='add'>+	struct pci_dev *pdev = rrpriv-&gt;pci_dev;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> 	short i;</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='del'>-	rrpriv = netdev_priv(dev);</div><div class='del'>-	regs = rrpriv-&gt;regs;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Lock to make sure we are not cleaning up while another CPU</div><div class='hunk'>@@ -1386,15 +1375,15 @@ static int rr_close(struct net_device *dev)</div><div class='ctx'> 	rr_raz_tx(rrpriv, dev);</div><div class='ctx'> 	rr_raz_rx(rrpriv, dev);</div><div class='ctx'> </div><div class='del'>-	pci_free_consistent(rrpriv-&gt;pci_dev, 256 * sizeof(struct ring_ctrl),</div><div class='add'>+	pci_free_consistent(pdev, 256 * sizeof(struct ring_ctrl),</div><div class='ctx'> 			    rrpriv-&gt;rx_ctrl, rrpriv-&gt;rx_ctrl_dma);</div><div class='ctx'> 	rrpriv-&gt;rx_ctrl = NULL;</div><div class='ctx'> </div><div class='del'>-	pci_free_consistent(rrpriv-&gt;pci_dev, sizeof(struct rr_info),</div><div class='del'>-			    rrpriv-&gt;info, rrpriv-&gt;info_dma);</div><div class='add'>+	pci_free_consistent(pdev, sizeof(struct rr_info), rrpriv-&gt;info,</div><div class='add'>+			    rrpriv-&gt;info_dma);</div><div class='ctx'> 	rrpriv-&gt;info = NULL;</div><div class='ctx'> </div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(pdev-&gt;irq, dev);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;rrpriv-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/hyperv/hyperv_net.h b/drivers/net/hyperv/hyperv_net.h<br/>index c35824552792..4ffcd57b011b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/hyperv/hyperv_net.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/hyperv/hyperv_net.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/hyperv/hyperv_net.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/hyperv/hyperv_net.h</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/hyperv.h&gt;</div><div class='add'>+#include &lt;linux/rndis.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Fwd declaration */</div><div class='ctx'> struct hv_netvsc_packet;</div><div class='hunk'>@@ -506,295 +507,6 @@ struct netvsc_device {</div><div class='ctx'> 	void *extension;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*  Status codes */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifndef STATUS_SUCCESS</div><div class='del'>-#define STATUS_SUCCESS				(0x00000000L)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifndef STATUS_UNSUCCESSFUL</div><div class='del'>-#define STATUS_UNSUCCESSFUL			(0xC0000001L)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifndef STATUS_PENDING</div><div class='del'>-#define STATUS_PENDING				(0x00000103L)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifndef STATUS_INSUFFICIENT_RESOURCES</div><div class='del'>-#define STATUS_INSUFFICIENT_RESOURCES		(0xC000009AL)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifndef STATUS_BUFFER_OVERFLOW</div><div class='del'>-#define STATUS_BUFFER_OVERFLOW			(0x80000005L)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifndef STATUS_NOT_SUPPORTED</div><div class='del'>-#define STATUS_NOT_SUPPORTED			(0xC00000BBL)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define RNDIS_STATUS_SUCCESS			(STATUS_SUCCESS)</div><div class='del'>-#define RNDIS_STATUS_PENDING			(STATUS_PENDING)</div><div class='del'>-#define RNDIS_STATUS_NOT_RECOGNIZED		(0x00010001L)</div><div class='del'>-#define RNDIS_STATUS_NOT_COPIED			(0x00010002L)</div><div class='del'>-#define RNDIS_STATUS_NOT_ACCEPTED		(0x00010003L)</div><div class='del'>-#define RNDIS_STATUS_CALL_ACTIVE		(0x00010007L)</div><div class='del'>-</div><div class='del'>-#define RNDIS_STATUS_ONLINE			(0x40010003L)</div><div class='del'>-#define RNDIS_STATUS_RESET_START		(0x40010004L)</div><div class='del'>-#define RNDIS_STATUS_RESET_END			(0x40010005L)</div><div class='del'>-#define RNDIS_STATUS_RING_STATUS		(0x40010006L)</div><div class='del'>-#define RNDIS_STATUS_CLOSED			(0x40010007L)</div><div class='del'>-#define RNDIS_STATUS_WAN_LINE_UP		(0x40010008L)</div><div class='del'>-#define RNDIS_STATUS_WAN_LINE_DOWN		(0x40010009L)</div><div class='del'>-#define RNDIS_STATUS_WAN_FRAGMENT		(0x4001000AL)</div><div class='del'>-#define RNDIS_STATUS_MEDIA_CONNECT		(0x4001000BL)</div><div class='del'>-#define RNDIS_STATUS_MEDIA_DISCONNECT		(0x4001000CL)</div><div class='del'>-#define RNDIS_STATUS_HARDWARE_LINE_UP		(0x4001000DL)</div><div class='del'>-#define RNDIS_STATUS_HARDWARE_LINE_DOWN		(0x4001000EL)</div><div class='del'>-#define RNDIS_STATUS_INTERFACE_UP		(0x4001000FL)</div><div class='del'>-#define RNDIS_STATUS_INTERFACE_DOWN		(0x40010010L)</div><div class='del'>-#define RNDIS_STATUS_MEDIA_BUSY			(0x40010011L)</div><div class='del'>-#define RNDIS_STATUS_MEDIA_SPECIFIC_INDICATION	(0x40010012L)</div><div class='del'>-#define RNDIS_STATUS_WW_INDICATION		RDIA_SPECIFIC_INDICATION</div><div class='del'>-#define RNDIS_STATUS_LINK_SPEED_CHANGE		(0x40010013L)</div><div class='del'>-</div><div class='del'>-#define RNDIS_STATUS_NOT_RESETTABLE		(0x80010001L)</div><div class='del'>-#define RNDIS_STATUS_SOFT_ERRORS		(0x80010003L)</div><div class='del'>-#define RNDIS_STATUS_HARD_ERRORS		(0x80010004L)</div><div class='del'>-#define RNDIS_STATUS_BUFFER_OVERFLOW		(STATUS_BUFFER_OVERFLOW)</div><div class='del'>-</div><div class='del'>-#define RNDIS_STATUS_FAILURE			(STATUS_UNSUCCESSFUL)</div><div class='del'>-#define RNDIS_STATUS_RESOURCES			(STATUS_INSUFFICIENT_RESOURCES)</div><div class='del'>-#define RNDIS_STATUS_CLOSING			(0xC0010002L)</div><div class='del'>-#define RNDIS_STATUS_BAD_VERSION		(0xC0010004L)</div><div class='del'>-#define RNDIS_STATUS_BAD_CHARACTERISTICS	(0xC0010005L)</div><div class='del'>-#define RNDIS_STATUS_ADAPTER_NOT_FOUND		(0xC0010006L)</div><div class='del'>-#define RNDIS_STATUS_OPEN_FAILED		(0xC0010007L)</div><div class='del'>-#define RNDIS_STATUS_DEVICE_FAILED		(0xC0010008L)</div><div class='del'>-#define RNDIS_STATUS_MULTICAST_FULL		(0xC0010009L)</div><div class='del'>-#define RNDIS_STATUS_MULTICAST_EXISTS		(0xC001000AL)</div><div class='del'>-#define RNDIS_STATUS_MULTICAST_NOT_FOUND	(0xC001000BL)</div><div class='del'>-#define RNDIS_STATUS_REQUEST_ABORTED		(0xC001000CL)</div><div class='del'>-#define RNDIS_STATUS_RESET_IN_PROGRESS		(0xC001000DL)</div><div class='del'>-#define RNDIS_STATUS_CLOSING_INDICATING		(0xC001000EL)</div><div class='del'>-#define RNDIS_STATUS_NOT_SUPPORTED		(STATUS_NOT_SUPPORTED)</div><div class='del'>-#define RNDIS_STATUS_INVALID_PACKET		(0xC001000FL)</div><div class='del'>-#define RNDIS_STATUS_OPEN_LIST_FULL		(0xC0010010L)</div><div class='del'>-#define RNDIS_STATUS_ADAPTER_NOT_READY		(0xC0010011L)</div><div class='del'>-#define RNDIS_STATUS_ADAPTER_NOT_OPEN		(0xC0010012L)</div><div class='del'>-#define RNDIS_STATUS_NOT_INDICATING		(0xC0010013L)</div><div class='del'>-#define RNDIS_STATUS_INVALID_LENGTH		(0xC0010014L)</div><div class='del'>-#define RNDIS_STATUS_INVALID_DATA		(0xC0010015L)</div><div class='del'>-#define RNDIS_STATUS_BUFFER_TOO_SHORT		(0xC0010016L)</div><div class='del'>-#define RNDIS_STATUS_INVALID_OID		(0xC0010017L)</div><div class='del'>-#define RNDIS_STATUS_ADAPTER_REMOVED		(0xC0010018L)</div><div class='del'>-#define RNDIS_STATUS_UNSUPPORTED_MEDIA		(0xC0010019L)</div><div class='del'>-#define RNDIS_STATUS_GROUP_ADDRESS_IN_USE	(0xC001001AL)</div><div class='del'>-#define RNDIS_STATUS_FILE_NOT_FOUND		(0xC001001BL)</div><div class='del'>-#define RNDIS_STATUS_ERROR_READING_FILE		(0xC001001CL)</div><div class='del'>-#define RNDIS_STATUS_ALREADY_MAPPED		(0xC001001DL)</div><div class='del'>-#define RNDIS_STATUS_RESOURCE_CONFLICT		(0xC001001EL)</div><div class='del'>-#define RNDIS_STATUS_NO_CABLE			(0xC001001FL)</div><div class='del'>-</div><div class='del'>-#define RNDIS_STATUS_INVALID_SAP		(0xC0010020L)</div><div class='del'>-#define RNDIS_STATUS_SAP_IN_USE			(0xC0010021L)</div><div class='del'>-#define RNDIS_STATUS_INVALID_ADDRESS		(0xC0010022L)</div><div class='del'>-#define RNDIS_STATUS_VC_NOT_ACTIVATED		(0xC0010023L)</div><div class='del'>-#define RNDIS_STATUS_DEST_OUT_OF_ORDER		(0xC0010024L)</div><div class='del'>-#define RNDIS_STATUS_VC_NOT_AVAILABLE		(0xC0010025L)</div><div class='del'>-#define RNDIS_STATUS_CELLRATE_NOT_AVAILABLE	(0xC0010026L)</div><div class='del'>-#define RNDIS_STATUS_INCOMPATABLE_QOS		(0xC0010027L)</div><div class='del'>-#define RNDIS_STATUS_AAL_PARAMS_UNSUPPORTED	(0xC0010028L)</div><div class='del'>-#define RNDIS_STATUS_NO_ROUTE_TO_DESTINATION	(0xC0010029L)</div><div class='del'>-</div><div class='del'>-#define RNDIS_STATUS_TOKEN_RING_OPEN_ERROR	(0xC0011000L)</div><div class='del'>-</div><div class='del'>-/* Object Identifiers used by NdisRequest Query/Set Information */</div><div class='del'>-/* General Objects */</div><div class='del'>-#define RNDIS_OID_GEN_SUPPORTED_LIST		0x00010101</div><div class='del'>-#define RNDIS_OID_GEN_HARDWARE_STATUS		0x00010102</div><div class='del'>-#define RNDIS_OID_GEN_MEDIA_SUPPORTED		0x00010103</div><div class='del'>-#define RNDIS_OID_GEN_MEDIA_IN_USE		0x00010104</div><div class='del'>-#define RNDIS_OID_GEN_MAXIMUM_LOOKAHEAD		0x00010105</div><div class='del'>-#define RNDIS_OID_GEN_MAXIMUM_FRAME_SIZE	0x00010106</div><div class='del'>-#define RNDIS_OID_GEN_LINK_SPEED		0x00010107</div><div class='del'>-#define RNDIS_OID_GEN_TRANSMIT_BUFFER_SPACE	0x00010108</div><div class='del'>-#define RNDIS_OID_GEN_RECEIVE_BUFFER_SPACE	0x00010109</div><div class='del'>-#define RNDIS_OID_GEN_TRANSMIT_BLOCK_SIZE	0x0001010A</div><div class='del'>-#define RNDIS_OID_GEN_RECEIVE_BLOCK_SIZE	0x0001010B</div><div class='del'>-#define RNDIS_OID_GEN_VENDOR_ID			0x0001010C</div><div class='del'>-#define RNDIS_OID_GEN_VENDOR_DESCRIPTION	0x0001010D</div><div class='del'>-#define RNDIS_OID_GEN_CURRENT_PACKET_FILTER	0x0001010E</div><div class='del'>-#define RNDIS_OID_GEN_CURRENT_LOOKAHEAD		0x0001010F</div><div class='del'>-#define RNDIS_OID_GEN_DRIVER_VERSION		0x00010110</div><div class='del'>-#define RNDIS_OID_GEN_MAXIMUM_TOTAL_SIZE	0x00010111</div><div class='del'>-#define RNDIS_OID_GEN_PROTOCOL_OPTIONS		0x00010112</div><div class='del'>-#define RNDIS_OID_GEN_MAC_OPTIONS		0x00010113</div><div class='del'>-#define RNDIS_OID_GEN_MEDIA_CONNECT_STATUS	0x00010114</div><div class='del'>-#define RNDIS_OID_GEN_MAXIMUM_SEND_PACKETS	0x00010115</div><div class='del'>-#define RNDIS_OID_GEN_VENDOR_DRIVER_VERSION	0x00010116</div><div class='del'>-#define RNDIS_OID_GEN_NETWORK_LAYER_ADDRESSES	0x00010118</div><div class='del'>-#define RNDIS_OID_GEN_TRANSPORT_HEADER_OFFSET	0x00010119</div><div class='del'>-#define RNDIS_OID_GEN_MACHINE_NAME		0x0001021A</div><div class='del'>-#define RNDIS_OID_GEN_RNDIS_CONFIG_PARAMETER	0x0001021B</div><div class='del'>-</div><div class='del'>-#define RNDIS_OID_GEN_XMIT_OK			0x00020101</div><div class='del'>-#define RNDIS_OID_GEN_RCV_OK			0x00020102</div><div class='del'>-#define RNDIS_OID_GEN_XMIT_ERROR		0x00020103</div><div class='del'>-#define RNDIS_OID_GEN_RCV_ERROR			0x00020104</div><div class='del'>-#define RNDIS_OID_GEN_RCV_NO_BUFFER		0x00020105</div><div class='del'>-</div><div class='del'>-#define RNDIS_OID_GEN_DIRECTED_BYTES_XMIT	0x00020201</div><div class='del'>-#define RNDIS_OID_GEN_DIRECTED_FRAMES_XMIT	0x00020202</div><div class='del'>-#define RNDIS_OID_GEN_MULTICAST_BYTES_XMIT	0x00020203</div><div class='del'>-#define RNDIS_OID_GEN_MULTICAST_FRAMES_XMIT	0x00020204</div><div class='del'>-#define RNDIS_OID_GEN_BROADCAST_BYTES_XMIT	0x00020205</div><div class='del'>-#define RNDIS_OID_GEN_BROADCAST_FRAMES_XMIT	0x00020206</div><div class='del'>-#define RNDIS_OID_GEN_DIRECTED_BYTES_RCV	0x00020207</div><div class='del'>-#define RNDIS_OID_GEN_DIRECTED_FRAMES_RCV	0x00020208</div><div class='del'>-#define RNDIS_OID_GEN_MULTICAST_BYTES_RCV	0x00020209</div><div class='del'>-#define RNDIS_OID_GEN_MULTICAST_FRAMES_RCV	0x0002020A</div><div class='del'>-#define RNDIS_OID_GEN_BROADCAST_BYTES_RCV	0x0002020B</div><div class='del'>-#define RNDIS_OID_GEN_BROADCAST_FRAMES_RCV	0x0002020C</div><div class='del'>-</div><div class='del'>-#define RNDIS_OID_GEN_RCV_CRC_ERROR		0x0002020D</div><div class='del'>-#define RNDIS_OID_GEN_TRANSMIT_QUEUE_LENGTH	0x0002020E</div><div class='del'>-</div><div class='del'>-#define RNDIS_OID_GEN_GET_TIME_CAPS		0x0002020F</div><div class='del'>-#define RNDIS_OID_GEN_GET_NETCARD_TIME		0x00020210</div><div class='del'>-</div><div class='del'>-/* These are connection-oriented general OIDs. */</div><div class='del'>-/* These replace the above OIDs for connection-oriented media. */</div><div class='del'>-#define RNDIS_OID_GEN_CO_SUPPORTED_LIST		0x00010101</div><div class='del'>-#define RNDIS_OID_GEN_CO_HARDWARE_STATUS	0x00010102</div><div class='del'>-#define RNDIS_OID_GEN_CO_MEDIA_SUPPORTED	0x00010103</div><div class='del'>-#define RNDIS_OID_GEN_CO_MEDIA_IN_USE		0x00010104</div><div class='del'>-#define RNDIS_OID_GEN_CO_LINK_SPEED		0x00010105</div><div class='del'>-#define RNDIS_OID_GEN_CO_VENDOR_ID		0x00010106</div><div class='del'>-#define RNDIS_OID_GEN_CO_VENDOR_DESCRIPTION	0x00010107</div><div class='del'>-#define RNDIS_OID_GEN_CO_DRIVER_VERSION		0x00010108</div><div class='del'>-#define RNDIS_OID_GEN_CO_PROTOCOL_OPTIONS	0x00010109</div><div class='del'>-#define RNDIS_OID_GEN_CO_MAC_OPTIONS		0x0001010A</div><div class='del'>-#define RNDIS_OID_GEN_CO_MEDIA_CONNECT_STATUS	0x0001010B</div><div class='del'>-#define RNDIS_OID_GEN_CO_VENDOR_DRIVER_VERSION	0x0001010C</div><div class='del'>-#define RNDIS_OID_GEN_CO_MINIMUM_LINK_SPEED	0x0001010D</div><div class='del'>-</div><div class='del'>-#define RNDIS_OID_GEN_CO_GET_TIME_CAPS		0x00010201</div><div class='del'>-#define RNDIS_OID_GEN_CO_GET_NETCARD_TIME	0x00010202</div><div class='del'>-</div><div class='del'>-/* These are connection-oriented statistics OIDs. */</div><div class='del'>-#define RNDIS_OID_GEN_CO_XMIT_PDUS_OK		0x00020101</div><div class='del'>-#define RNDIS_OID_GEN_CO_RCV_PDUS_OK		0x00020102</div><div class='del'>-#define RNDIS_OID_GEN_CO_XMIT_PDUS_ERROR	0x00020103</div><div class='del'>-#define RNDIS_OID_GEN_CO_RCV_PDUS_ERROR		0x00020104</div><div class='del'>-#define RNDIS_OID_GEN_CO_RCV_PDUS_NO_BUFFER	0x00020105</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define RNDIS_OID_GEN_CO_RCV_CRC_ERROR		0x00020201</div><div class='del'>-#define RNDIS_OID_GEN_CO_TRANSMIT_QUEUE_LENGTH	0x00020202</div><div class='del'>-#define RNDIS_OID_GEN_CO_BYTES_XMIT		0x00020203</div><div class='del'>-#define RNDIS_OID_GEN_CO_BYTES_RCV		0x00020204</div><div class='del'>-#define RNDIS_OID_GEN_CO_BYTES_XMIT_OUTSTANDING	0x00020205</div><div class='del'>-#define RNDIS_OID_GEN_CO_NETCARD_LOAD		0x00020206</div><div class='del'>-</div><div class='del'>-/* These are objects for Connection-oriented media call-managers. */</div><div class='del'>-#define RNDIS_OID_CO_ADD_PVC			0xFF000001</div><div class='del'>-#define RNDIS_OID_CO_DELETE_PVC			0xFF000002</div><div class='del'>-#define RNDIS_OID_CO_GET_CALL_INFORMATION	0xFF000003</div><div class='del'>-#define RNDIS_OID_CO_ADD_ADDRESS		0xFF000004</div><div class='del'>-#define RNDIS_OID_CO_DELETE_ADDRESS		0xFF000005</div><div class='del'>-#define RNDIS_OID_CO_GET_ADDRESSES		0xFF000006</div><div class='del'>-#define RNDIS_OID_CO_ADDRESS_CHANGE		0xFF000007</div><div class='del'>-#define RNDIS_OID_CO_SIGNALING_ENABLED		0xFF000008</div><div class='del'>-#define RNDIS_OID_CO_SIGNALING_DISABLED		0xFF000009</div><div class='del'>-</div><div class='del'>-/* 802.3 Objects (Ethernet) */</div><div class='del'>-#define RNDIS_OID_802_3_PERMANENT_ADDRESS	0x01010101</div><div class='del'>-#define RNDIS_OID_802_3_CURRENT_ADDRESS		0x01010102</div><div class='del'>-#define RNDIS_OID_802_3_MULTICAST_LIST		0x01010103</div><div class='del'>-#define RNDIS_OID_802_3_MAXIMUM_LIST_SIZE	0x01010104</div><div class='del'>-#define RNDIS_OID_802_3_MAC_OPTIONS		0x01010105</div><div class='del'>-</div><div class='del'>-#define NDIS_802_3_MAC_OPTION_PRIORITY		0x00000001</div><div class='del'>-</div><div class='del'>-#define RNDIS_OID_802_3_RCV_ERROR_ALIGNMENT	0x01020101</div><div class='del'>-#define RNDIS_OID_802_3_XMIT_ONE_COLLISION	0x01020102</div><div class='del'>-#define RNDIS_OID_802_3_XMIT_MORE_COLLISIONS	0x01020103</div><div class='del'>-</div><div class='del'>-#define RNDIS_OID_802_3_XMIT_DEFERRED		0x01020201</div><div class='del'>-#define RNDIS_OID_802_3_XMIT_MAX_COLLISIONS	0x01020202</div><div class='del'>-#define RNDIS_OID_802_3_RCV_OVERRUN		0x01020203</div><div class='del'>-#define RNDIS_OID_802_3_XMIT_UNDERRUN		0x01020204</div><div class='del'>-#define RNDIS_OID_802_3_XMIT_HEARTBEAT_FAILURE	0x01020205</div><div class='del'>-#define RNDIS_OID_802_3_XMIT_TIMES_CRS_LOST	0x01020206</div><div class='del'>-#define RNDIS_OID_802_3_XMIT_LATE_COLLISIONS	0x01020207</div><div class='del'>-</div><div class='del'>-/* Remote NDIS message types */</div><div class='del'>-#define REMOTE_NDIS_PACKET_MSG			0x00000001</div><div class='del'>-#define REMOTE_NDIS_INITIALIZE_MSG		0x00000002</div><div class='del'>-#define REMOTE_NDIS_HALT_MSG			0x00000003</div><div class='del'>-#define REMOTE_NDIS_QUERY_MSG			0x00000004</div><div class='del'>-#define REMOTE_NDIS_SET_MSG			0x00000005</div><div class='del'>-#define REMOTE_NDIS_RESET_MSG			0x00000006</div><div class='del'>-#define REMOTE_NDIS_INDICATE_STATUS_MSG		0x00000007</div><div class='del'>-#define REMOTE_NDIS_KEEPALIVE_MSG		0x00000008</div><div class='del'>-</div><div class='del'>-#define REMOTE_CONDIS_MP_CREATE_VC_MSG		0x00008001</div><div class='del'>-#define REMOTE_CONDIS_MP_DELETE_VC_MSG		0x00008002</div><div class='del'>-#define REMOTE_CONDIS_MP_ACTIVATE_VC_MSG	0x00008005</div><div class='del'>-#define REMOTE_CONDIS_MP_DEACTIVATE_VC_MSG	0x00008006</div><div class='del'>-#define REMOTE_CONDIS_INDICATE_STATUS_MSG	0x00008007</div><div class='del'>-</div><div class='del'>-/* Remote NDIS message completion types */</div><div class='del'>-#define REMOTE_NDIS_INITIALIZE_CMPLT		0x80000002</div><div class='del'>-#define REMOTE_NDIS_QUERY_CMPLT			0x80000004</div><div class='del'>-#define REMOTE_NDIS_SET_CMPLT			0x80000005</div><div class='del'>-#define REMOTE_NDIS_RESET_CMPLT			0x80000006</div><div class='del'>-#define REMOTE_NDIS_KEEPALIVE_CMPLT		0x80000008</div><div class='del'>-</div><div class='del'>-#define REMOTE_CONDIS_MP_CREATE_VC_CMPLT	0x80008001</div><div class='del'>-#define REMOTE_CONDIS_MP_DELETE_VC_CMPLT	0x80008002</div><div class='del'>-#define REMOTE_CONDIS_MP_ACTIVATE_VC_CMPLT	0x80008005</div><div class='del'>-#define REMOTE_CONDIS_MP_DEACTIVATE_VC_CMPLT	0x80008006</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Reserved message type for private communication between lower-layer host</div><div class='del'>- * driver and remote device, if necessary.</div><div class='del'>- */</div><div class='del'>-#define REMOTE_NDIS_BUS_MSG			0xff000001</div><div class='del'>-</div><div class='del'>-/*  Defines for DeviceFlags in struct rndis_initialize_complete */</div><div class='del'>-#define RNDIS_DF_CONNECTIONLESS			0x00000001</div><div class='del'>-#define RNDIS_DF_CONNECTION_ORIENTED		0x00000002</div><div class='del'>-#define RNDIS_DF_RAW_DATA			0x00000004</div><div class='del'>-</div><div class='del'>-/*  Remote NDIS medium types. */</div><div class='del'>-#define RNDIS_MEDIUM_802_3			0x00000000</div><div class='del'>-#define RNDIS_MEDIUM_802_5			0x00000001</div><div class='del'>-#define RNDIS_MEDIUM_FDDI				0x00000002</div><div class='del'>-#define RNDIS_MEDIUM_WAN				0x00000003</div><div class='del'>-#define RNDIS_MEDIUM_LOCAL_TALK			0x00000004</div><div class='del'>-#define RNDIS_MEDIUM_ARCNET_RAW			0x00000006</div><div class='del'>-#define RNDIS_MEDIUM_ARCNET_878_2			0x00000007</div><div class='del'>-#define RNDIS_MEDIUM_ATM				0x00000008</div><div class='del'>-#define RNDIS_MEDIUM_WIRELESS_WAN			0x00000009</div><div class='del'>-#define RNDIS_MEDIUM_IRDA				0x0000000a</div><div class='del'>-#define RNDIS_MEDIUM_CO_WAN			0x0000000b</div><div class='del'>-/* Not a real medium, defined as an upper-bound */</div><div class='del'>-#define RNDIS_MEDIUM_MAX				0x0000000d</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Remote NDIS medium connection states. */</div><div class='del'>-#define RNDIS_MEDIA_STATE_CONNECTED		0x00000000</div><div class='del'>-#define RNDIS_MEDIA_STATE_DISCONNECTED		0x00000001</div><div class='del'>-</div><div class='del'>-/*  Remote NDIS version numbers */</div><div class='del'>-#define RNDIS_MAJOR_VERSION			0x00000001</div><div class='del'>-#define RNDIS_MINOR_VERSION			0x00000000</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /* NdisInitialize message */</div><div class='ctx'> struct rndis_initialize_request {</div><div class='ctx'> 	u32 req_id;</div><div class='head'>diff --git a/drivers/net/hyperv/netvsc.c b/drivers/net/hyperv/netvsc.c<br/>index d025c83cd12a..8b919471472f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/hyperv/netvsc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/hyperv/netvsc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/hyperv/netvsc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/hyperv/netvsc.c</a></div><div class='hunk'>@@ -428,6 +428,24 @@ int netvsc_device_remove(struct hv_device *device)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+#define RING_AVAIL_PERCENT_HIWATER 20</div><div class='add'>+#define RING_AVAIL_PERCENT_LOWATER 10</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Get the percentage of available bytes to write in the ring.</div><div class='add'>+ * The return value is in range from 0 to 100.</div><div class='add'>+ */</div><div class='add'>+static inline u32 hv_ringbuf_avail_percent(</div><div class='add'>+		struct hv_ring_buffer_info *ring_info)</div><div class='add'>+{</div><div class='add'>+	u32 avail_read, avail_write;</div><div class='add'>+</div><div class='add'>+	hv_get_ringbuffer_availbytes(ring_info, &amp;avail_read, &amp;avail_write);</div><div class='add'>+</div><div class='add'>+	return avail_write * 100 / ring_info-&gt;ring_datasize;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void netvsc_send_completion(struct hv_device *device,</div><div class='ctx'> 				   struct vmpacket_descriptor *packet)</div><div class='ctx'> {</div><div class='hunk'>@@ -455,6 +473,8 @@ static void netvsc_send_completion(struct hv_device *device,</div><div class='ctx'> 		complete(&amp;net_device-&gt;channel_init_wait);</div><div class='ctx'> 	} else if (nvsp_packet-&gt;hdr.msg_type ==</div><div class='ctx'> 		   NVSP_MSG1_TYPE_SEND_RNDIS_PKT_COMPLETE) {</div><div class='add'>+		int num_outstanding_sends;</div><div class='add'>+</div><div class='ctx'> 		/* Get the send context */</div><div class='ctx'> 		nvsc_packet = (struct hv_netvsc_packet *)(unsigned long)</div><div class='ctx'> 			packet-&gt;trans_id;</div><div class='hunk'>@@ -463,10 +483,14 @@ static void netvsc_send_completion(struct hv_device *device,</div><div class='ctx'> 		nvsc_packet-&gt;completion.send.send_completion(</div><div class='ctx'> 			nvsc_packet-&gt;completion.send.send_completion_ctx);</div><div class='ctx'> </div><div class='del'>-		atomic_dec(&amp;net_device-&gt;num_outstanding_sends);</div><div class='add'>+		num_outstanding_sends =</div><div class='add'>+			atomic_dec_return(&amp;net_device-&gt;num_outstanding_sends);</div><div class='ctx'> </div><div class='del'>-		if (netif_queue_stopped(ndev) &amp;&amp; !net_device-&gt;start_remove)</div><div class='del'>-			netif_wake_queue(ndev);</div><div class='add'>+		if (netif_queue_stopped(ndev) &amp;&amp; !net_device-&gt;start_remove &amp;&amp;</div><div class='add'>+			(hv_ringbuf_avail_percent(&amp;device-&gt;channel-&gt;outbound)</div><div class='add'>+			&gt; RING_AVAIL_PERCENT_HIWATER ||</div><div class='add'>+			num_outstanding_sends &lt; 1))</div><div class='add'>+				netif_wake_queue(ndev);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		netdev_err(ndev, "Unknown send completion packet type- "</div><div class='ctx'> 			   "%d received!!\n", nvsp_packet-&gt;hdr.msg_type);</div><div class='hunk'>@@ -519,10 +543,19 @@ int netvsc_send(struct hv_device *device,</div><div class='ctx'> </div><div class='ctx'> 	if (ret == 0) {</div><div class='ctx'> 		atomic_inc(&amp;net_device-&gt;num_outstanding_sends);</div><div class='add'>+		if (hv_ringbuf_avail_percent(&amp;device-&gt;channel-&gt;outbound) &lt;</div><div class='add'>+			RING_AVAIL_PERCENT_LOWATER) {</div><div class='add'>+			netif_stop_queue(ndev);</div><div class='add'>+			if (atomic_read(&amp;net_device-&gt;</div><div class='add'>+				num_outstanding_sends) &lt; 1)</div><div class='add'>+				netif_wake_queue(ndev);</div><div class='add'>+		}</div><div class='ctx'> 	} else if (ret == -EAGAIN) {</div><div class='ctx'> 		netif_stop_queue(ndev);</div><div class='del'>-		if (atomic_read(&amp;net_device-&gt;num_outstanding_sends) &lt; 1)</div><div class='add'>+		if (atomic_read(&amp;net_device-&gt;num_outstanding_sends) &lt; 1) {</div><div class='ctx'> 			netif_wake_queue(ndev);</div><div class='add'>+			ret = -ENOSPC;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		netdev_err(ndev, "Unable to send packet %p ret %d\n",</div><div class='ctx'> 			   packet, ret);</div><div class='head'>diff --git a/drivers/net/hyperv/netvsc_drv.c b/drivers/net/hyperv/netvsc_drv.c<br/>index 2d59138db7f3..8f8ed3320425 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/hyperv/netvsc_drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/hyperv/netvsc_drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/hyperv/netvsc_drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/hyperv/netvsc_drv.c</a></div><div class='hunk'>@@ -211,9 +211,13 @@ static int netvsc_start_xmit(struct sk_buff *skb, struct net_device *net)</div><div class='ctx'> 		net-&gt;stats.tx_packets++;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		kfree(packet);</div><div class='add'>+		if (ret != -EAGAIN) {</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+			net-&gt;stats.tx_dropped++;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret ? NETDEV_TX_BUSY : NETDEV_TX_OK;</div><div class='add'>+	return (ret == -EAGAIN) ? NETDEV_TX_BUSY : NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/net/hyperv/rndis_filter.c b/drivers/net/hyperv/rndis_filter.c<br/>index d6be64bcefd4..981ebb115637 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/hyperv/rndis_filter.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/hyperv/rndis_filter.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/hyperv/rndis_filter.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/hyperv/rndis_filter.c</a></div><div class='hunk'>@@ -129,8 +129,8 @@ static void dump_rndis_message(struct hv_device *hv_dev,</div><div class='ctx'> 	netdev = net_device-&gt;ndev;</div><div class='ctx'> </div><div class='ctx'> 	switch (rndis_msg-&gt;ndis_msg_type) {</div><div class='del'>-	case REMOTE_NDIS_PACKET_MSG:</div><div class='del'>-		netdev_dbg(netdev, "REMOTE_NDIS_PACKET_MSG (len %u, "</div><div class='add'>+	case RNDIS_MSG_PACKET:</div><div class='add'>+		netdev_dbg(netdev, "RNDIS_MSG_PACKET (len %u, "</div><div class='ctx'> 			   "data offset %u data len %u, # oob %u, "</div><div class='ctx'> 			   "oob offset %u, oob len %u, pkt offset %u, "</div><div class='ctx'> 			   "pkt len %u\n",</div><div class='hunk'>@@ -144,8 +144,8 @@ static void dump_rndis_message(struct hv_device *hv_dev,</div><div class='ctx'> 			   rndis_msg-&gt;msg.pkt.per_pkt_info_len);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case REMOTE_NDIS_INITIALIZE_CMPLT:</div><div class='del'>-		netdev_dbg(netdev, "REMOTE_NDIS_INITIALIZE_CMPLT "</div><div class='add'>+	case RNDIS_MSG_INIT_C:</div><div class='add'>+		netdev_dbg(netdev, "RNDIS_MSG_INIT_C "</div><div class='ctx'> 			"(len %u, id 0x%x, status 0x%x, major %d, minor %d, "</div><div class='ctx'> 			"device flags %d, max xfer size 0x%x, max pkts %u, "</div><div class='ctx'> 			"pkt aligned %u)\n",</div><div class='hunk'>@@ -162,8 +162,8 @@ static void dump_rndis_message(struct hv_device *hv_dev,</div><div class='ctx'> 			   pkt_alignment_factor);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case REMOTE_NDIS_QUERY_CMPLT:</div><div class='del'>-		netdev_dbg(netdev, "REMOTE_NDIS_QUERY_CMPLT "</div><div class='add'>+	case RNDIS_MSG_QUERY_C:</div><div class='add'>+		netdev_dbg(netdev, "RNDIS_MSG_QUERY_C "</div><div class='ctx'> 			"(len %u, id 0x%x, status 0x%x, buf len %u, "</div><div class='ctx'> 			"buf offset %u)\n",</div><div class='ctx'> 			rndis_msg-&gt;msg_len,</div><div class='hunk'>@@ -175,16 +175,16 @@ static void dump_rndis_message(struct hv_device *hv_dev,</div><div class='ctx'> 			   info_buf_offset);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case REMOTE_NDIS_SET_CMPLT:</div><div class='add'>+	case RNDIS_MSG_SET_C:</div><div class='ctx'> 		netdev_dbg(netdev,</div><div class='del'>-			"REMOTE_NDIS_SET_CMPLT (len %u, id 0x%x, status 0x%x)\n",</div><div class='add'>+			"RNDIS_MSG_SET_C (len %u, id 0x%x, status 0x%x)\n",</div><div class='ctx'> 			rndis_msg-&gt;msg_len,</div><div class='ctx'> 			rndis_msg-&gt;msg.set_complete.req_id,</div><div class='ctx'> 			rndis_msg-&gt;msg.set_complete.status);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case REMOTE_NDIS_INDICATE_STATUS_MSG:</div><div class='del'>-		netdev_dbg(netdev, "REMOTE_NDIS_INDICATE_STATUS_MSG "</div><div class='add'>+	case RNDIS_MSG_INDICATE:</div><div class='add'>+		netdev_dbg(netdev, "RNDIS_MSG_INDICATE "</div><div class='ctx'> 			"(len %u, status 0x%x, buf len %u, buf offset %u)\n",</div><div class='ctx'> 			rndis_msg-&gt;msg_len,</div><div class='ctx'> 			rndis_msg-&gt;msg.indicate_status.status,</div><div class='hunk'>@@ -264,14 +264,14 @@ static void rndis_filter_receive_response(struct rndis_device *dev,</div><div class='ctx'> 				sizeof(struct rndis_filter_packet));</div><div class='ctx'> </div><div class='ctx'> 			if (resp-&gt;ndis_msg_type ==</div><div class='del'>-			    REMOTE_NDIS_RESET_CMPLT) {</div><div class='add'>+			    RNDIS_MSG_RESET_C) {</div><div class='ctx'> 				/* does not have a request id field */</div><div class='ctx'> 				request-&gt;response_msg.msg.reset_complete.</div><div class='del'>-					status = STATUS_BUFFER_OVERFLOW;</div><div class='add'>+					status = RNDIS_STATUS_BUFFER_OVERFLOW;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				request-&gt;response_msg.msg.</div><div class='ctx'> 				init_complete.status =</div><div class='del'>-					STATUS_BUFFER_OVERFLOW;</div><div class='add'>+					RNDIS_STATUS_BUFFER_OVERFLOW;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -415,19 +415,19 @@ int rndis_filter_receive(struct hv_device *dev,</div><div class='ctx'> 	dump_rndis_message(dev, rndis_msg);</div><div class='ctx'> </div><div class='ctx'> 	switch (rndis_msg-&gt;ndis_msg_type) {</div><div class='del'>-	case REMOTE_NDIS_PACKET_MSG:</div><div class='add'>+	case RNDIS_MSG_PACKET:</div><div class='ctx'> 		/* data msg */</div><div class='ctx'> 		rndis_filter_receive_data(rndis_dev, rndis_msg, pkt);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case REMOTE_NDIS_INITIALIZE_CMPLT:</div><div class='del'>-	case REMOTE_NDIS_QUERY_CMPLT:</div><div class='del'>-	case REMOTE_NDIS_SET_CMPLT:</div><div class='add'>+	case RNDIS_MSG_INIT_C:</div><div class='add'>+	case RNDIS_MSG_QUERY_C:</div><div class='add'>+	case RNDIS_MSG_SET_C:</div><div class='ctx'> 		/* completion msgs */</div><div class='ctx'> 		rndis_filter_receive_response(rndis_dev, rndis_msg);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case REMOTE_NDIS_INDICATE_STATUS_MSG:</div><div class='add'>+	case RNDIS_MSG_INDICATE:</div><div class='ctx'> 		/* notification msgs */</div><div class='ctx'> 		rndis_filter_receive_indicate_status(rndis_dev, rndis_msg);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -456,7 +456,7 @@ static int rndis_filter_query_device(struct rndis_device *dev, u32 oid,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	*result_size = 0;</div><div class='del'>-	request = get_rndis_request(dev, REMOTE_NDIS_QUERY_MSG,</div><div class='add'>+	request = get_rndis_request(dev, RNDIS_MSG_QUERY,</div><div class='ctx'> 			RNDIS_MESSAGE_SIZE(struct rndis_query_request));</div><div class='ctx'> 	if (!request) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -536,7 +536,7 @@ int rndis_filter_set_packet_filter(struct rndis_device *dev, u32 new_filter)</div><div class='ctx'> </div><div class='ctx'> 	ndev = dev-&gt;net_dev-&gt;ndev;</div><div class='ctx'> </div><div class='del'>-	request = get_rndis_request(dev, REMOTE_NDIS_SET_MSG,</div><div class='add'>+	request = get_rndis_request(dev, RNDIS_MSG_SET,</div><div class='ctx'> 			RNDIS_MESSAGE_SIZE(struct rndis_set_request) +</div><div class='ctx'> 			sizeof(u32));</div><div class='ctx'> 	if (!request) {</div><div class='hunk'>@@ -588,7 +588,7 @@ static int rndis_filter_init_device(struct rndis_device *dev)</div><div class='ctx'> 	u32 status;</div><div class='ctx'> 	int ret, t;</div><div class='ctx'> </div><div class='del'>-	request = get_rndis_request(dev, REMOTE_NDIS_INITIALIZE_MSG,</div><div class='add'>+	request = get_rndis_request(dev, RNDIS_MSG_INIT,</div><div class='ctx'> 			RNDIS_MESSAGE_SIZE(struct rndis_initialize_request));</div><div class='ctx'> 	if (!request) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -641,7 +641,7 @@ static void rndis_filter_halt_device(struct rndis_device *dev)</div><div class='ctx'> 	struct rndis_halt_request *halt;</div><div class='ctx'> </div><div class='ctx'> 	/* Attempt to do a rndis device halt */</div><div class='del'>-	request = get_rndis_request(dev, REMOTE_NDIS_HALT_MSG,</div><div class='add'>+	request = get_rndis_request(dev, RNDIS_MSG_HALT,</div><div class='ctx'> 				RNDIS_MESSAGE_SIZE(struct rndis_halt_request));</div><div class='ctx'> 	if (!request)</div><div class='ctx'> 		goto cleanup;</div><div class='hunk'>@@ -805,7 +805,7 @@ int rndis_filter_send(struct hv_device *dev,</div><div class='ctx'> 	if (isvlan)</div><div class='ctx'> 		rndis_msg_size += NDIS_VLAN_PPI_SIZE;</div><div class='ctx'> </div><div class='del'>-	rndis_msg-&gt;ndis_msg_type = REMOTE_NDIS_PACKET_MSG;</div><div class='add'>+	rndis_msg-&gt;ndis_msg_type = RNDIS_MSG_PACKET;</div><div class='ctx'> 	rndis_msg-&gt;msg_len = pkt-&gt;total_data_buflen +</div><div class='ctx'> 				      rndis_msg_size;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/irda/Kconfig b/drivers/net/irda/Kconfig<br/>index 468047866c8c..595205406d73 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/irda/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/irda/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/irda/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/Kconfig</a></div><div class='hunk'>@@ -211,8 +211,8 @@ config KINGSUN_DONGLE</div><div class='ctx'> 	  kingsun-sir.</div><div class='ctx'> </div><div class='ctx'> config EP7211_DONGLE</div><div class='del'>-	tristate "EP7211 I/R support"</div><div class='del'>-	depends on IRTTY_SIR &amp;&amp; ARCH_EP7211 &amp;&amp; IRDA &amp;&amp; EXPERIMENTAL</div><div class='add'>+	tristate "Cirrus Logic clps711x I/R support"</div><div class='add'>+	depends on IRTTY_SIR &amp;&amp; ARCH_CLPS711X &amp;&amp; IRDA &amp;&amp; EXPERIMENTAL</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to build support for the Cirrus logic</div><div class='ctx'> 	  EP7211 chipset's infrared module.</div><div class='hunk'>@@ -316,13 +316,13 @@ config AU1000_FIR</div><div class='ctx'> 	tristate "Alchemy IrDA SIR/FIR"</div><div class='ctx'> 	depends on IRDA &amp;&amp; MIPS_ALCHEMY</div><div class='ctx'> 	help</div><div class='del'>-	  Say Y/M here to build suppor the the IrDA peripheral on the</div><div class='add'>+	  Say Y/M here to build support the IrDA peripheral on the</div><div class='ctx'> 	  Alchemy Au1000 and Au1100 SoCs.</div><div class='ctx'> 	  Say M to build a module; it will be called au1k_ir.ko</div><div class='ctx'> </div><div class='ctx'> config SMC_IRCC_FIR</div><div class='del'>-	tristate "SMSC IrCC (EXPERIMENTAL)"</div><div class='del'>-	depends on EXPERIMENTAL &amp;&amp; IRDA &amp;&amp; ISA_DMA_API</div><div class='add'>+	tristate "SMSC IrCC"</div><div class='add'>+	depends on IRDA &amp;&amp; ISA_DMA_API</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to build support for the SMC Infrared</div><div class='ctx'> 	  Communications Controller.  It is used in a wide variety of</div><div class='head'>diff --git a/drivers/net/irda/donauboe.c b/drivers/net/irda/donauboe.c<br/>index 4351296dde32..510b9c8d23a9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/irda/donauboe.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/irda/donauboe.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/irda/donauboe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/donauboe.c</a></div><div class='hunk'>@@ -1710,7 +1710,7 @@ toshoboe_gotosleep (struct pci_dev *pci_dev, pm_message_t crap)</div><div class='ctx'> </div><div class='ctx'> /* Flush all packets */</div><div class='ctx'>   while ((i--) &amp;&amp; (self-&gt;txpending))</div><div class='del'>-    udelay (10000);</div><div class='add'>+    msleep(10);</div><div class='ctx'> </div><div class='ctx'>   spin_lock_irqsave(&amp;self-&gt;spinlock, flags);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/irda/irda-usb.c b/drivers/net/irda/irda-usb.c<br/>index 72f687b40d66..f9a86bdb12fa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/irda/irda-usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/irda/irda-usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/irda/irda-usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/irda-usb.c</a></div><div class='hunk'>@@ -1671,7 +1671,7 @@ static int irda_usb_probe(struct usb_interface *intf,</div><div class='ctx'> </div><div class='ctx'> 	/* Is this really necessary? (no, except maybe for broken devices) */</div><div class='ctx'> 	if (usb_reset_configuration (dev) &lt; 0) {</div><div class='del'>-		err("reset_configuration failed");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "reset_configuration failed\n");</div><div class='ctx'> 		ret = -EIO;</div><div class='ctx'> 		goto err_out_3;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/irda/kingsun-sir.c b/drivers/net/irda/kingsun-sir.c<br/>index 79aebeee928c..7b4833874ef5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/irda/kingsun-sir.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/irda/kingsun-sir.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/irda/kingsun-sir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/kingsun-sir.c</a></div><div class='hunk'>@@ -134,14 +134,16 @@ static void kingsun_send_irq(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	/* in process of stopping, just drop data */</div><div class='ctx'> 	if (!netif_running(kingsun-&gt;netdev)) {</div><div class='del'>-		err("kingsun_send_irq: Network not running!");</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"kingsun_send_irq: Network not running!\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* unlink, shutdown, unplug, other nasties */</div><div class='ctx'> 	if (urb-&gt;status != 0) {</div><div class='del'>-		err("kingsun_send_irq: urb asynchronously failed - %d",</div><div class='del'>-		    urb-&gt;status);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"kingsun_send_irq: urb asynchronously failed - %d\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> 	}</div><div class='ctx'> 	netif_wake_queue(netdev);</div><div class='ctx'> }</div><div class='hunk'>@@ -177,7 +179,8 @@ static netdev_tx_t kingsun_hard_xmit(struct sk_buff *skb,</div><div class='ctx'> 		kingsun, 1);</div><div class='ctx'> </div><div class='ctx'> 	if ((ret = usb_submit_urb(kingsun-&gt;tx_urb, GFP_ATOMIC))) {</div><div class='del'>-		err("kingsun_hard_xmit: failed tx_urb submit: %d", ret);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"kingsun_hard_xmit: failed tx_urb submit: %d\n", ret);</div><div class='ctx'> 		switch (ret) {</div><div class='ctx'> 		case -ENODEV:</div><div class='ctx'> 		case -EPIPE:</div><div class='hunk'>@@ -211,8 +214,9 @@ static void kingsun_rcv_irq(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	/* unlink, shutdown, unplug, other nasties */</div><div class='ctx'> 	if (urb-&gt;status != 0) {</div><div class='del'>-		err("kingsun_rcv_irq: urb asynchronously failed - %d",</div><div class='del'>-		    urb-&gt;status);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"kingsun_rcv_irq: urb asynchronously failed - %d\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> 		kingsun-&gt;receiving = 0;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -238,8 +242,9 @@ static void kingsun_rcv_irq(struct urb *urb)</div><div class='ctx'> 				? 1 : 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (urb-&gt;actual_length &gt; 0) {</div><div class='del'>-		err("%s(): Unexpected response length, expected %d got %d",</div><div class='del'>-		    __func__, kingsun-&gt;max_rx, urb-&gt;actual_length);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"%s(): Unexpected response length, expected %d got %d\n",</div><div class='add'>+			__func__, kingsun-&gt;max_rx, urb-&gt;actual_length);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* This urb has already been filled in kingsun_net_open */</div><div class='ctx'> 	ret = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='hunk'>@@ -286,7 +291,7 @@ static int kingsun_net_open(struct net_device *netdev)</div><div class='ctx'> 	sprintf(hwname, "usb#%d", kingsun-&gt;usbdev-&gt;devnum);</div><div class='ctx'> 	kingsun-&gt;irlap = irlap_open(netdev, &amp;kingsun-&gt;qos, hwname);</div><div class='ctx'> 	if (!kingsun-&gt;irlap) {</div><div class='del'>-		err("kingsun-sir: irlap_open failed");</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev, "irlap_open failed\n");</div><div class='ctx'> 		goto free_mem;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -298,7 +303,8 @@ static int kingsun_net_open(struct net_device *netdev)</div><div class='ctx'> 	kingsun-&gt;rx_urb-&gt;status = 0;</div><div class='ctx'> 	err = usb_submit_urb(kingsun-&gt;rx_urb, GFP_KERNEL);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		err("kingsun-sir: first urb-submit failed: %d", err);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"first urb-submit failed: %d\n", err);</div><div class='ctx'> 		goto close_irlap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -446,13 +452,15 @@ static int kingsun_probe(struct usb_interface *intf,</div><div class='ctx'> 	 */</div><div class='ctx'> 	interface = intf-&gt;cur_altsetting;</div><div class='ctx'> 	if (interface-&gt;desc.bNumEndpoints != 2) {</div><div class='del'>-		err("kingsun-sir: expected 2 endpoints, found %d",</div><div class='del'>-		    interface-&gt;desc.bNumEndpoints);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"kingsun-sir: expected 2 endpoints, found %d\n",</div><div class='add'>+			interface-&gt;desc.bNumEndpoints);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> 	endpoint = &amp;interface-&gt;endpoint[KINGSUN_EP_IN].desc;</div><div class='ctx'> 	if (!usb_endpoint_is_int_in(endpoint)) {</div><div class='del'>-		err("kingsun-sir: endpoint 0 is not interrupt IN");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"kingsun-sir: endpoint 0 is not interrupt IN\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -460,14 +468,16 @@ static int kingsun_probe(struct usb_interface *intf,</div><div class='ctx'> 	pipe = usb_rcvintpipe(dev, ep_in);</div><div class='ctx'> 	maxp_in = usb_maxpacket(dev, pipe, usb_pipeout(pipe));</div><div class='ctx'> 	if (maxp_in &gt; 255 || maxp_in &lt;= 1) {</div><div class='del'>-		err("%s: endpoint 0 has max packet size %d not in range",</div><div class='del'>-		    __FILE__, maxp_in);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"endpoint 0 has max packet size %d not in range\n",</div><div class='add'>+			maxp_in);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	endpoint = &amp;interface-&gt;endpoint[KINGSUN_EP_OUT].desc;</div><div class='ctx'> 	if (!usb_endpoint_is_int_out(endpoint)) {</div><div class='del'>-		err("kingsun-sir: endpoint 1 is not interrupt OUT");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"kingsun-sir: endpoint 1 is not interrupt OUT\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/irda/ks959-sir.c b/drivers/net/irda/ks959-sir.c<br/>index abe689dffc72..824e2a93fe8a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/irda/ks959-sir.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/irda/ks959-sir.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/irda/ks959-sir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/ks959-sir.c</a></div><div class='hunk'>@@ -247,8 +247,9 @@ static void ks959_speed_irq(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	/* unlink, shutdown, unplug, other nasties */</div><div class='ctx'> 	if (urb-&gt;status != 0) {</div><div class='del'>-		err("ks959_speed_irq: urb asynchronously failed - %d",</div><div class='del'>-		    urb-&gt;status);</div><div class='add'>+		dev_err(&amp;urb-&gt;dev-&gt;dev,</div><div class='add'>+			"ks959_speed_irq: urb asynchronously failed - %d\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -332,14 +333,16 @@ static void ks959_send_irq(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	/* in process of stopping, just drop data */</div><div class='ctx'> 	if (!netif_running(kingsun-&gt;netdev)) {</div><div class='del'>-		err("ks959_send_irq: Network not running!");</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"ks959_send_irq: Network not running!\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* unlink, shutdown, unplug, other nasties */</div><div class='ctx'> 	if (urb-&gt;status != 0) {</div><div class='del'>-		err("ks959_send_irq: urb asynchronously failed - %d",</div><div class='del'>-		    urb-&gt;status);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"ks959_send_irq: urb asynchronously failed - %d\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -358,8 +361,9 @@ static void ks959_send_irq(struct urb *urb)</div><div class='ctx'> 		if (kingsun-&gt;tx_buf_clear_used &gt; 0) {</div><div class='ctx'> 			/* There is more data to be sent */</div><div class='ctx'> 			if ((ret = ks959_submit_tx_fragment(kingsun)) != 0) {</div><div class='del'>-				err("ks959_send_irq: failed tx_urb submit: %d",</div><div class='del'>-				    ret);</div><div class='add'>+				dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+					"ks959_send_irq: failed tx_urb submit: %d\n",</div><div class='add'>+					ret);</div><div class='ctx'> 				switch (ret) {</div><div class='ctx'> 				case -ENODEV:</div><div class='ctx'> 				case -EPIPE:</div><div class='hunk'>@@ -407,7 +411,8 @@ static netdev_tx_t ks959_hard_xmit(struct sk_buff *skb,</div><div class='ctx'> 	kingsun-&gt;tx_buf_clear_used = wraplen;</div><div class='ctx'> </div><div class='ctx'> 	if ((ret = ks959_submit_tx_fragment(kingsun)) != 0) {</div><div class='del'>-		err("ks959_hard_xmit: failed tx_urb submit: %d", ret);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"ks959_hard_xmit: failed tx_urb submit: %d\n", ret);</div><div class='ctx'> 		switch (ret) {</div><div class='ctx'> 		case -ENODEV:</div><div class='ctx'> 		case -EPIPE:</div><div class='hunk'>@@ -442,8 +447,9 @@ static void ks959_rcv_irq(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	/* unlink, shutdown, unplug, other nasties */</div><div class='ctx'> 	if (urb-&gt;status != 0) {</div><div class='del'>-		err("kingsun_rcv_irq: urb asynchronously failed - %d",</div><div class='del'>-		    urb-&gt;status);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"kingsun_rcv_irq: urb asynchronously failed - %d\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> 		kingsun-&gt;receiving = 0;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -536,7 +542,7 @@ static int ks959_net_open(struct net_device *netdev)</div><div class='ctx'> 	sprintf(hwname, "usb#%d", kingsun-&gt;usbdev-&gt;devnum);</div><div class='ctx'> 	kingsun-&gt;irlap = irlap_open(netdev, &amp;kingsun-&gt;qos, hwname);</div><div class='ctx'> 	if (!kingsun-&gt;irlap) {</div><div class='del'>-		err("ks959-sir: irlap_open failed");</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev, "irlap_open failed\n");</div><div class='ctx'> 		goto free_mem;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -549,7 +555,8 @@ static int ks959_net_open(struct net_device *netdev)</div><div class='ctx'> 	kingsun-&gt;rx_urb-&gt;status = 0;</div><div class='ctx'> 	err = usb_submit_urb(kingsun-&gt;rx_urb, GFP_KERNEL);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		err("ks959-sir: first urb-submit failed: %d", err);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"first urb-submit failed: %d\n", err);</div><div class='ctx'> 		goto close_irlap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/irda/ksdazzle-sir.c b/drivers/net/irda/ksdazzle-sir.c<br/>index f8c01088eeb7..5a278ab83c2f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/irda/ksdazzle-sir.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/irda/ksdazzle-sir.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/irda/ksdazzle-sir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/ksdazzle-sir.c</a></div><div class='hunk'>@@ -168,10 +168,10 @@ struct ksdazzle_cb {</div><div class='ctx'> static void ksdazzle_speed_irq(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	/* unlink, shutdown, unplug, other nasties */</div><div class='del'>-	if (urb-&gt;status != 0) {</div><div class='del'>-		err("ksdazzle_speed_irq: urb asynchronously failed - %d",</div><div class='del'>-		    urb-&gt;status);</div><div class='del'>-	}</div><div class='add'>+	if (urb-&gt;status != 0)</div><div class='add'>+		dev_err(&amp;urb-&gt;dev-&gt;dev,</div><div class='add'>+			"ksdazzle_speed_irq: urb asynchronously failed - %d\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Send a control request to change speed of the dongle */</div><div class='hunk'>@@ -245,14 +245,16 @@ static void ksdazzle_send_irq(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	/* in process of stopping, just drop data */</div><div class='ctx'> 	if (!netif_running(kingsun-&gt;netdev)) {</div><div class='del'>-		err("ksdazzle_send_irq: Network not running!");</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"ksdazzle_send_irq: Network not running!\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* unlink, shutdown, unplug, other nasties */</div><div class='ctx'> 	if (urb-&gt;status != 0) {</div><div class='del'>-		err("ksdazzle_send_irq: urb asynchronously failed - %d",</div><div class='del'>-		    urb-&gt;status);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"ksdazzle_send_irq: urb asynchronously failed - %d\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -271,7 +273,9 @@ static void ksdazzle_send_irq(struct urb *urb)</div><div class='ctx'> 		if (kingsun-&gt;tx_buf_clear_used &gt; 0) {</div><div class='ctx'> 			/* There is more data to be sent */</div><div class='ctx'> 			if ((ret = ksdazzle_submit_tx_fragment(kingsun)) != 0) {</div><div class='del'>-				err("ksdazzle_send_irq: failed tx_urb submit: %d", ret);</div><div class='add'>+				dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+					"ksdazzle_send_irq: failed tx_urb submit: %d\n",</div><div class='add'>+					ret);</div><div class='ctx'> 				switch (ret) {</div><div class='ctx'> 				case -ENODEV:</div><div class='ctx'> 				case -EPIPE:</div><div class='hunk'>@@ -320,7 +324,8 @@ static netdev_tx_t ksdazzle_hard_xmit(struct sk_buff *skb,</div><div class='ctx'> 	kingsun-&gt;tx_buf_clear_used = wraplen;</div><div class='ctx'> </div><div class='ctx'> 	if ((ret = ksdazzle_submit_tx_fragment(kingsun)) != 0) {</div><div class='del'>-		err("ksdazzle_hard_xmit: failed tx_urb submit: %d", ret);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"ksdazzle_hard_xmit: failed tx_urb submit: %d\n", ret);</div><div class='ctx'> 		switch (ret) {</div><div class='ctx'> 		case -ENODEV:</div><div class='ctx'> 		case -EPIPE:</div><div class='hunk'>@@ -355,8 +360,9 @@ static void ksdazzle_rcv_irq(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	/* unlink, shutdown, unplug, other nasties */</div><div class='ctx'> 	if (urb-&gt;status != 0) {</div><div class='del'>-		err("ksdazzle_rcv_irq: urb asynchronously failed - %d",</div><div class='del'>-		    urb-&gt;status);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev,</div><div class='add'>+			"ksdazzle_rcv_irq: urb asynchronously failed - %d\n",</div><div class='add'>+			urb-&gt;status);</div><div class='ctx'> 		kingsun-&gt;receiving = 0;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -430,7 +436,7 @@ static int ksdazzle_net_open(struct net_device *netdev)</div><div class='ctx'> 	sprintf(hwname, "usb#%d", kingsun-&gt;usbdev-&gt;devnum);</div><div class='ctx'> 	kingsun-&gt;irlap = irlap_open(netdev, &amp;kingsun-&gt;qos, hwname);</div><div class='ctx'> 	if (!kingsun-&gt;irlap) {</div><div class='del'>-		err("ksdazzle-sir: irlap_open failed");</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev, "irlap_open failed\n");</div><div class='ctx'> 		goto free_mem;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -442,7 +448,7 @@ static int ksdazzle_net_open(struct net_device *netdev)</div><div class='ctx'> 	kingsun-&gt;rx_urb-&gt;status = 0;</div><div class='ctx'> 	err = usb_submit_urb(kingsun-&gt;rx_urb, GFP_KERNEL);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		err("ksdazzle-sir: first urb-submit failed: %d", err);</div><div class='add'>+		dev_err(&amp;kingsun-&gt;usbdev-&gt;dev, "first urb-submit failed: %d\n", err);</div><div class='ctx'> 		goto close_irlap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -590,13 +596,14 @@ static int ksdazzle_probe(struct usb_interface *intf,</div><div class='ctx'> 	 */</div><div class='ctx'> 	interface = intf-&gt;cur_altsetting;</div><div class='ctx'> 	if (interface-&gt;desc.bNumEndpoints != 2) {</div><div class='del'>-		err("ksdazzle: expected 2 endpoints, found %d",</div><div class='del'>-		    interface-&gt;desc.bNumEndpoints);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "ksdazzle: expected 2 endpoints, found %d\n",</div><div class='add'>+			interface-&gt;desc.bNumEndpoints);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> 	endpoint = &amp;interface-&gt;endpoint[KINGSUN_EP_IN].desc;</div><div class='ctx'> 	if (!usb_endpoint_is_int_in(endpoint)) {</div><div class='del'>-		err("ksdazzle: endpoint 0 is not interrupt IN");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"ksdazzle: endpoint 0 is not interrupt IN\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -604,13 +611,16 @@ static int ksdazzle_probe(struct usb_interface *intf,</div><div class='ctx'> 	pipe = usb_rcvintpipe(dev, ep_in);</div><div class='ctx'> 	maxp_in = usb_maxpacket(dev, pipe, usb_pipeout(pipe));</div><div class='ctx'> 	if (maxp_in &gt; 255 || maxp_in &lt;= 1) {</div><div class='del'>-		err("ksdazzle: endpoint 0 has max packet size %d not in range [2..255]", maxp_in);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"ksdazzle: endpoint 0 has max packet size %d not in range [2..255]\n",</div><div class='add'>+			maxp_in);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	endpoint = &amp;interface-&gt;endpoint[KINGSUN_EP_OUT].desc;</div><div class='ctx'> 	if (!usb_endpoint_is_int_out(endpoint)) {</div><div class='del'>-		err("ksdazzle: endpoint 1 is not interrupt OUT");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"ksdazzle: endpoint 1 is not interrupt OUT\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/irda/sh_irda.c b/drivers/net/irda/sh_irda.c<br/>index 725d6b367822..eb315b8d07a3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/irda/sh_irda.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/irda/sh_irda.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/irda/sh_irda.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/sh_irda.c</a></div><div class='hunk'>@@ -737,7 +737,7 @@ static int sh_irda_stop(struct net_device *ndev)</div><div class='ctx'> 	netif_stop_queue(ndev);</div><div class='ctx'> 	pm_runtime_put_sync(&amp;self-&gt;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	dev_info(&amp;ndev-&gt;dev, "stoped\n");</div><div class='add'>+	dev_info(&amp;ndev-&gt;dev, "stopped\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/irda/sh_sir.c b/drivers/net/irda/sh_sir.c<br/>index e6661b5c1f83..256eddf1f75a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/irda/sh_sir.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/irda/sh_sir.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/irda/sh_sir.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/sh_sir.c</a></div><div class='hunk'>@@ -685,7 +685,7 @@ static int sh_sir_stop(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(ndev);</div><div class='ctx'> </div><div class='del'>-	dev_info(&amp;ndev-&gt;dev, "stoped\n");</div><div class='add'>+	dev_info(&amp;ndev-&gt;dev, "stopped\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/irda/smsc-ircc2.c b/drivers/net/irda/smsc-ircc2.c<br/>index 6c95d4087b2d..a926813ee91d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/irda/smsc-ircc2.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/irda/smsc-ircc2.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/irda/smsc-ircc2.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/smsc-ircc2.c</a></div><div class='hunk'>@@ -1,7 +1,6 @@</div><div class='ctx'> /*********************************************************************</div><div class='ctx'>  *</div><div class='ctx'>  * Description:   Driver for the SMC Infrared Communications Controller</div><div class='del'>- * Status:        Experimental.</div><div class='ctx'>  * Author:        Daniele Peri (peri@csai.unipa.it)</div><div class='ctx'>  * Created at:</div><div class='ctx'>  * Modified at:</div><div class='head'>diff --git a/drivers/net/irda/stir4200.c b/drivers/net/irda/stir4200.c<br/>index e6e59a078ef4..876e709b65ba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/irda/stir4200.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/irda/stir4200.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/irda/stir4200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/irda/stir4200.c</a></div><div class='hunk'>@@ -904,7 +904,7 @@ static int stir_net_open(struct net_device *netdev)</div><div class='ctx'> 	sprintf(hwname, "usb#%d", stir-&gt;usbdev-&gt;devnum);</div><div class='ctx'> 	stir-&gt;irlap = irlap_open(netdev, &amp;stir-&gt;qos, hwname);</div><div class='ctx'> 	if (!stir-&gt;irlap) {</div><div class='del'>-		err("stir4200: irlap_open failed");</div><div class='add'>+		dev_err(&amp;stir-&gt;usbdev-&gt;dev, "irlap_open failed\n");</div><div class='ctx'> 		goto err_out5;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -913,7 +913,7 @@ static int stir_net_open(struct net_device *netdev)</div><div class='ctx'> 				   "%s", stir-&gt;netdev-&gt;name);</div><div class='ctx'>         if (IS_ERR(stir-&gt;thread)) {</div><div class='ctx'>                 err = PTR_ERR(stir-&gt;thread);</div><div class='del'>-		err("stir4200: unable to start kernel thread");</div><div class='add'>+		dev_err(&amp;stir-&gt;usbdev-&gt;dev, "unable to start kernel thread\n");</div><div class='ctx'> 		goto err_out6;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1042,7 +1042,7 @@ static int stir_probe(struct usb_interface *intf,</div><div class='ctx'> </div><div class='ctx'> 	ret = usb_reset_configuration(dev);</div><div class='ctx'> 	if (ret != 0) {</div><div class='del'>-		err("stir4200: usb reset configuration failed");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "usb reset configuration failed\n");</div><div class='ctx'> 		goto err_out2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/macvlan.c b/drivers/net/macvlan.c<br/>index f975afdc315c..66a9bfe7b1c8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/macvlan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/macvlan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/macvlan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/macvlan.c</a></div><div class='hunk'>@@ -57,7 +57,7 @@ static struct macvlan_dev *macvlan_hash_lookup(const struct macvlan_port *port,</div><div class='ctx'> 	struct hlist_node *n;</div><div class='ctx'> </div><div class='ctx'> 	hlist_for_each_entry_rcu(vlan, n, &amp;port-&gt;vlan_hash[addr[5]], hlist) {</div><div class='del'>-		if (!compare_ether_addr_64bits(vlan-&gt;dev-&gt;dev_addr, addr))</div><div class='add'>+		if (ether_addr_equal_64bits(vlan-&gt;dev-&gt;dev_addr, addr))</div><div class='ctx'> 			return vlan;</div><div class='ctx'> 	}</div><div class='ctx'> 	return NULL;</div><div class='hunk'>@@ -96,7 +96,7 @@ static int macvlan_addr_busy(const struct macvlan_port *port,</div><div class='ctx'> 	 * currently in use by the underlying device or</div><div class='ctx'> 	 * another macvlan.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!compare_ether_addr_64bits(port-&gt;dev-&gt;dev_addr, addr))</div><div class='add'>+	if (ether_addr_equal_64bits(port-&gt;dev-&gt;dev_addr, addr))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	if (macvlan_hash_lookup(port, addr))</div><div class='hunk'>@@ -118,8 +118,7 @@ static int macvlan_broadcast_one(struct sk_buff *skb,</div><div class='ctx'> 		return vlan-&gt;forward(dev, skb);</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;dev = dev;</div><div class='del'>-	if (!compare_ether_addr_64bits(eth-&gt;h_dest,</div><div class='del'>-				       dev-&gt;broadcast))</div><div class='add'>+	if (ether_addr_equal_64bits(eth-&gt;h_dest, dev-&gt;broadcast))</div><div class='ctx'> 		skb-&gt;pkt_type = PACKET_BROADCAST;</div><div class='ctx'> 	else</div><div class='ctx'> 		skb-&gt;pkt_type = PACKET_MULTICAST;</div><div class='hunk'>@@ -259,7 +258,7 @@ static int macvlan_queue_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> xmit_world:</div><div class='ctx'> 	skb-&gt;ip_summed = ip_summed;</div><div class='del'>-	skb_set_dev(skb, vlan-&gt;lowerdev);</div><div class='add'>+	skb-&gt;dev = vlan-&gt;lowerdev;</div><div class='ctx'> 	return dev_queue_xmit(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -312,7 +311,8 @@ static int macvlan_open(struct net_device *dev)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (vlan-&gt;port-&gt;passthru) {</div><div class='del'>-		dev_set_promiscuity(lowerdev, 1);</div><div class='add'>+		if (!(vlan-&gt;flags &amp; MACVLAN_FLAG_NOPROMISC))</div><div class='add'>+			dev_set_promiscuity(lowerdev, 1);</div><div class='ctx'> 		goto hash_add;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -344,12 +344,15 @@ static int macvlan_stop(struct net_device *dev)</div><div class='ctx'> 	struct macvlan_dev *vlan = netdev_priv(dev);</div><div class='ctx'> 	struct net_device *lowerdev = vlan-&gt;lowerdev;</div><div class='ctx'> </div><div class='add'>+	dev_uc_unsync(lowerdev, dev);</div><div class='add'>+	dev_mc_unsync(lowerdev, dev);</div><div class='add'>+</div><div class='ctx'> 	if (vlan-&gt;port-&gt;passthru) {</div><div class='del'>-		dev_set_promiscuity(lowerdev, -1);</div><div class='add'>+		if (!(vlan-&gt;flags &amp; MACVLAN_FLAG_NOPROMISC))</div><div class='add'>+			dev_set_promiscuity(lowerdev, -1);</div><div class='ctx'> 		goto hash_del;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_mc_unsync(lowerdev, dev);</div><div class='ctx'> 	if (dev-&gt;flags &amp; IFF_ALLMULTI)</div><div class='ctx'> 		dev_set_allmulti(lowerdev, -1);</div><div class='ctx'> </div><div class='hunk'>@@ -399,10 +402,11 @@ static void macvlan_change_rx_flags(struct net_device *dev, int change)</div><div class='ctx'> 		dev_set_allmulti(lowerdev, dev-&gt;flags &amp; IFF_ALLMULTI ? 1 : -1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void macvlan_set_multicast_list(struct net_device *dev)</div><div class='add'>+static void macvlan_set_mac_lists(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct macvlan_dev *vlan = netdev_priv(dev);</div><div class='ctx'> </div><div class='add'>+	dev_uc_sync(vlan-&gt;lowerdev, dev);</div><div class='ctx'> 	dev_mc_sync(vlan-&gt;lowerdev, dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -542,6 +546,43 @@ static int macvlan_vlan_rx_kill_vid(struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int macvlan_fdb_add(struct ndmsg *ndm,</div><div class='add'>+			   struct net_device *dev,</div><div class='add'>+			   unsigned char *addr,</div><div class='add'>+			   u16 flags)</div><div class='add'>+{</div><div class='add'>+	struct macvlan_dev *vlan = netdev_priv(dev);</div><div class='add'>+	int err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!vlan-&gt;port-&gt;passthru)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (is_unicast_ether_addr(addr))</div><div class='add'>+		err = dev_uc_add_excl(dev, addr);</div><div class='add'>+	else if (is_multicast_ether_addr(addr))</div><div class='add'>+		err = dev_mc_add_excl(dev, addr);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int macvlan_fdb_del(struct ndmsg *ndm,</div><div class='add'>+			   struct net_device *dev,</div><div class='add'>+			   unsigned char *addr)</div><div class='add'>+{</div><div class='add'>+	struct macvlan_dev *vlan = netdev_priv(dev);</div><div class='add'>+	int err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!vlan-&gt;port-&gt;passthru)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (is_unicast_ether_addr(addr))</div><div class='add'>+		err = dev_uc_del(dev, addr);</div><div class='add'>+	else if (is_multicast_ether_addr(addr))</div><div class='add'>+		err = dev_mc_del(dev, addr);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void macvlan_ethtool_get_drvinfo(struct net_device *dev,</div><div class='ctx'> 					struct ethtool_drvinfo *drvinfo)</div><div class='ctx'> {</div><div class='hunk'>@@ -572,11 +613,14 @@ static const struct net_device_ops macvlan_netdev_ops = {</div><div class='ctx'> 	.ndo_change_mtu		= macvlan_change_mtu,</div><div class='ctx'> 	.ndo_change_rx_flags	= macvlan_change_rx_flags,</div><div class='ctx'> 	.ndo_set_mac_address	= macvlan_set_mac_address,</div><div class='del'>-	.ndo_set_rx_mode	= macvlan_set_multicast_list,</div><div class='add'>+	.ndo_set_rx_mode	= macvlan_set_mac_lists,</div><div class='ctx'> 	.ndo_get_stats64	= macvlan_dev_get_stats64,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_vlan_rx_add_vid	= macvlan_vlan_rx_add_vid,</div><div class='ctx'> 	.ndo_vlan_rx_kill_vid	= macvlan_vlan_rx_kill_vid,</div><div class='add'>+	.ndo_fdb_add		= macvlan_fdb_add,</div><div class='add'>+	.ndo_fdb_del		= macvlan_fdb_del,</div><div class='add'>+	.ndo_fdb_dump		= ndo_dflt_fdb_dump,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void macvlan_common_setup(struct net_device *dev)</div><div class='hunk'>@@ -711,6 +755,9 @@ int macvlan_common_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	if (data &amp;&amp; data[IFLA_MACVLAN_MODE])</div><div class='ctx'> 		vlan-&gt;mode = nla_get_u32(data[IFLA_MACVLAN_MODE]);</div><div class='ctx'> </div><div class='add'>+	if (data &amp;&amp; data[IFLA_MACVLAN_FLAGS])</div><div class='add'>+		vlan-&gt;flags = nla_get_u16(data[IFLA_MACVLAN_FLAGS]);</div><div class='add'>+</div><div class='ctx'> 	if (vlan-&gt;mode == MACVLAN_MODE_PASSTHRU) {</div><div class='ctx'> 		if (port-&gt;count)</div><div class='ctx'> 			return -EINVAL;</div><div class='hunk'>@@ -760,6 +807,16 @@ static int macvlan_changelink(struct net_device *dev,</div><div class='ctx'> 	struct macvlan_dev *vlan = netdev_priv(dev);</div><div class='ctx'> 	if (data &amp;&amp; data[IFLA_MACVLAN_MODE])</div><div class='ctx'> 		vlan-&gt;mode = nla_get_u32(data[IFLA_MACVLAN_MODE]);</div><div class='add'>+	if (data &amp;&amp; data[IFLA_MACVLAN_FLAGS]) {</div><div class='add'>+		__u16 flags = nla_get_u16(data[IFLA_MACVLAN_FLAGS]);</div><div class='add'>+		bool promisc = (flags ^ vlan-&gt;flags) &amp; MACVLAN_FLAG_NOPROMISC;</div><div class='add'>+</div><div class='add'>+		if (promisc &amp;&amp; (flags &amp; MACVLAN_FLAG_NOPROMISC))</div><div class='add'>+			dev_set_promiscuity(vlan-&gt;lowerdev, -1);</div><div class='add'>+		else if (promisc &amp;&amp; !(flags &amp; MACVLAN_FLAG_NOPROMISC))</div><div class='add'>+			dev_set_promiscuity(vlan-&gt;lowerdev, 1);</div><div class='add'>+		vlan-&gt;flags = flags;</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -773,7 +830,10 @@ static int macvlan_fill_info(struct sk_buff *skb,</div><div class='ctx'> {</div><div class='ctx'> 	struct macvlan_dev *vlan = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	NLA_PUT_U32(skb, IFLA_MACVLAN_MODE, vlan-&gt;mode);</div><div class='add'>+	if (nla_put_u32(skb, IFLA_MACVLAN_MODE, vlan-&gt;mode))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	if (nla_put_u16(skb, IFLA_MACVLAN_FLAGS, vlan-&gt;flags))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='hunk'>@@ -781,7 +841,8 @@ nla_put_failure:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct nla_policy macvlan_policy[IFLA_MACVLAN_MAX + 1] = {</div><div class='del'>-	[IFLA_MACVLAN_MODE] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_MACVLAN_MODE]  = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_MACVLAN_FLAGS] = { .type = NLA_U16 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int macvlan_link_register(struct rtnl_link_ops *ops)</div><div class='head'>diff --git a/drivers/net/macvtap.c b/drivers/net/macvtap.c<br/>index 0427c6561c84..2ee56de7b0ca 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/macvtap.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/macvtap.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/macvtap.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/macvtap.c</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/if_macvlan.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/nsproxy.h&gt;</div><div class='ctx'> #include &lt;linux/compat.h&gt;</div><div class='hunk'>@@ -505,10 +506,11 @@ static int zerocopy_sg_from_iovec(struct sk_buff *skb, const struct iovec *from,</div><div class='ctx'> 		if (copy &gt; size) {</div><div class='ctx'> 			++from;</div><div class='ctx'> 			--count;</div><div class='del'>-		}</div><div class='add'>+			offset = 0;</div><div class='add'>+		} else</div><div class='add'>+			offset += size;</div><div class='ctx'> 		copy -= size;</div><div class='ctx'> 		offset1 += size;</div><div class='del'>-		offset = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (len == offset1)</div><div class='hunk'>@@ -518,24 +520,29 @@ static int zerocopy_sg_from_iovec(struct sk_buff *skb, const struct iovec *from,</div><div class='ctx'> 		struct page *page[MAX_SKB_FRAGS];</div><div class='ctx'> 		int num_pages;</div><div class='ctx'> 		unsigned long base;</div><div class='add'>+		unsigned long truesize;</div><div class='ctx'> </div><div class='del'>-		len = from-&gt;iov_len - offset1;</div><div class='add'>+		len = from-&gt;iov_len - offset;</div><div class='ctx'> 		if (!len) {</div><div class='del'>-			offset1 = 0;</div><div class='add'>+			offset = 0;</div><div class='ctx'> 			++from;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		base = (unsigned long)from-&gt;iov_base + offset1;</div><div class='add'>+		base = (unsigned long)from-&gt;iov_base + offset;</div><div class='ctx'> 		size = ((base &amp; ~PAGE_MASK) + len + ~PAGE_MASK) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+		if (i + size &gt; MAX_SKB_FRAGS)</div><div class='add'>+			return -EMSGSIZE;</div><div class='ctx'> 		num_pages = get_user_pages_fast(base, size, 0, &amp;page[i]);</div><div class='del'>-		if ((num_pages != size) ||</div><div class='del'>-		    (num_pages &gt; MAX_SKB_FRAGS - skb_shinfo(skb)-&gt;nr_frags))</div><div class='del'>-			/* put_page is in skb free */</div><div class='add'>+		if (num_pages != size) {</div><div class='add'>+			for (i = 0; i &lt; num_pages; i++)</div><div class='add'>+				put_page(page[i]);</div><div class='ctx'> 			return -EFAULT;</div><div class='add'>+		}</div><div class='add'>+		truesize = size * PAGE_SIZE;</div><div class='ctx'> 		skb-&gt;data_len += len;</div><div class='ctx'> 		skb-&gt;len += len;</div><div class='del'>-		skb-&gt;truesize += len;</div><div class='del'>-		atomic_add(len, &amp;skb-&gt;sk-&gt;sk_wmem_alloc);</div><div class='add'>+		skb-&gt;truesize += truesize;</div><div class='add'>+		atomic_add(truesize, &amp;skb-&gt;sk-&gt;sk_wmem_alloc);</div><div class='ctx'> 		while (len) {</div><div class='ctx'> 			int off = base &amp; ~PAGE_MASK;</div><div class='ctx'> 			int size = min_t(int, len, PAGE_SIZE - off);</div><div class='hunk'>@@ -546,7 +553,7 @@ static int zerocopy_sg_from_iovec(struct sk_buff *skb, const struct iovec *from,</div><div class='ctx'> 			len -= size;</div><div class='ctx'> 			i++;</div><div class='ctx'> 		}</div><div class='del'>-		offset1 = 0;</div><div class='add'>+		offset = 0;</div><div class='ctx'> 		++from;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -646,7 +653,7 @@ static ssize_t macvtap_get_user(struct macvtap_queue *q, struct msghdr *m,</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct virtio_net_hdr vnet_hdr = { 0 };</div><div class='ctx'> 	int vnet_hdr_len = 0;</div><div class='del'>-	int copylen;</div><div class='add'>+	int copylen = 0;</div><div class='ctx'> 	bool zerocopy = false;</div><div class='ctx'> </div><div class='ctx'> 	if (q-&gt;flags &amp; IFF_VNET_HDR) {</div><div class='hunk'>@@ -675,15 +682,31 @@ static ssize_t macvtap_get_user(struct macvtap_queue *q, struct msghdr *m,</div><div class='ctx'> 	if (unlikely(len &lt; ETH_HLEN))</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='add'>+	err = -EMSGSIZE;</div><div class='add'>+	if (unlikely(count &gt; UIO_MAXIOV))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='ctx'> 	if (m &amp;&amp; m-&gt;msg_control &amp;&amp; sock_flag(&amp;q-&gt;sk, SOCK_ZEROCOPY))</div><div class='ctx'> 		zerocopy = true;</div><div class='ctx'> </div><div class='ctx'> 	if (zerocopy) {</div><div class='add'>+		/* Userspace may produce vectors with count greater than</div><div class='add'>+		 * MAX_SKB_FRAGS, so we need to linearize parts of the skb</div><div class='add'>+		 * to let the rest of data to be fit in the frags.</div><div class='add'>+		 */</div><div class='add'>+		if (count &gt; MAX_SKB_FRAGS) {</div><div class='add'>+			copylen = iov_length(iv, count - MAX_SKB_FRAGS);</div><div class='add'>+			if (copylen &lt; vnet_hdr_len)</div><div class='add'>+				copylen = 0;</div><div class='add'>+			else</div><div class='add'>+				copylen -= vnet_hdr_len;</div><div class='add'>+		}</div><div class='ctx'> 		/* There are 256 bytes to be copied in skb, so there is enough</div><div class='ctx'> 		 * room for skb expand head in case it is used.</div><div class='ctx'> 		 * The rest buffer is mapped from userspace.</div><div class='ctx'> 		 */</div><div class='del'>-		copylen = vnet_hdr.hdr_len;</div><div class='add'>+		if (copylen &lt; vnet_hdr.hdr_len)</div><div class='add'>+			copylen = vnet_hdr.hdr_len;</div><div class='ctx'> 		if (!copylen)</div><div class='ctx'> 			copylen = GOODCOPY_LEN;</div><div class='ctx'> 	} else</div><div class='hunk'>@@ -694,10 +717,9 @@ static ssize_t macvtap_get_user(struct macvtap_queue *q, struct msghdr *m,</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='del'>-	if (zerocopy) {</div><div class='add'>+	if (zerocopy)</div><div class='ctx'> 		err = zerocopy_sg_from_iovec(skb, iv, vnet_hdr_len, count);</div><div class='del'>-		skb_shinfo(skb)-&gt;tx_flags |= SKBTX_DEV_ZEROCOPY;</div><div class='del'>-	} else</div><div class='add'>+	else</div><div class='ctx'> 		err = skb_copy_datagram_from_iovec(skb, 0, iv, vnet_hdr_len,</div><div class='ctx'> 						   len);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -716,8 +738,10 @@ static ssize_t macvtap_get_user(struct macvtap_queue *q, struct msghdr *m,</div><div class='ctx'> 	rcu_read_lock_bh();</div><div class='ctx'> 	vlan = rcu_dereference_bh(q-&gt;vlan);</div><div class='ctx'> 	/* copy skb_ubuf_info for callback when skb has no error */</div><div class='del'>-	if (zerocopy)</div><div class='add'>+	if (zerocopy) {</div><div class='ctx'> 		skb_shinfo(skb)-&gt;destructor_arg = m-&gt;msg_control;</div><div class='add'>+		skb_shinfo(skb)-&gt;tx_flags |= SKBTX_DEV_ZEROCOPY;</div><div class='add'>+	}</div><div class='ctx'> 	if (vlan)</div><div class='ctx'> 		macvlan_start_xmit(skb, vlan-&gt;dev);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -759,6 +783,8 @@ static ssize_t macvtap_put_user(struct macvtap_queue *q,</div><div class='ctx'> 	struct macvlan_dev *vlan;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int vnet_hdr_len = 0;</div><div class='add'>+	int vlan_offset = 0;</div><div class='add'>+	int copied;</div><div class='ctx'> </div><div class='ctx'> 	if (q-&gt;flags &amp; IFF_VNET_HDR) {</div><div class='ctx'> 		struct virtio_net_hdr vnet_hdr;</div><div class='hunk'>@@ -773,18 +799,48 @@ static ssize_t macvtap_put_user(struct macvtap_queue *q,</div><div class='ctx'> 		if (memcpy_toiovecend(iv, (void *)&amp;vnet_hdr, 0, sizeof(vnet_hdr)))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> 	}</div><div class='add'>+	copied = vnet_hdr_len;</div><div class='add'>+</div><div class='add'>+	if (!vlan_tx_tag_present(skb))</div><div class='add'>+		len = min_t(int, skb-&gt;len, len);</div><div class='add'>+	else {</div><div class='add'>+		int copy;</div><div class='add'>+		struct {</div><div class='add'>+			__be16 h_vlan_proto;</div><div class='add'>+			__be16 h_vlan_TCI;</div><div class='add'>+		} veth;</div><div class='add'>+		veth.h_vlan_proto = htons(ETH_P_8021Q);</div><div class='add'>+		veth.h_vlan_TCI = htons(vlan_tx_tag_get(skb));</div><div class='add'>+</div><div class='add'>+		vlan_offset = offsetof(struct vlan_ethhdr, h_vlan_proto);</div><div class='add'>+		len = min_t(int, skb-&gt;len + VLAN_HLEN, len);</div><div class='add'>+</div><div class='add'>+		copy = min_t(int, vlan_offset, len);</div><div class='add'>+		ret = skb_copy_datagram_const_iovec(skb, 0, iv, copied, copy);</div><div class='add'>+		len -= copy;</div><div class='add'>+		copied += copy;</div><div class='add'>+		if (ret || !len)</div><div class='add'>+			goto done;</div><div class='add'>+</div><div class='add'>+		copy = min_t(int, sizeof(veth), len);</div><div class='add'>+		ret = memcpy_toiovecend(iv, (void *)&amp;veth, copied, copy);</div><div class='add'>+		len -= copy;</div><div class='add'>+		copied += copy;</div><div class='add'>+		if (ret || !len)</div><div class='add'>+			goto done;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	len = min_t(int, skb-&gt;len, len);</div><div class='del'>-</div><div class='del'>-	ret = skb_copy_datagram_const_iovec(skb, 0, iv, vnet_hdr_len, len);</div><div class='add'>+	ret = skb_copy_datagram_const_iovec(skb, vlan_offset, iv, copied, len);</div><div class='add'>+	copied += len;</div><div class='ctx'> </div><div class='add'>+done:</div><div class='ctx'> 	rcu_read_lock_bh();</div><div class='ctx'> 	vlan = rcu_dereference_bh(q-&gt;vlan);</div><div class='ctx'> 	if (vlan)</div><div class='del'>-		macvlan_count_rx(vlan, len, ret == 0, 0);</div><div class='add'>+		macvlan_count_rx(vlan, copied - vnet_hdr_len, ret == 0, 0);</div><div class='ctx'> 	rcu_read_unlock_bh();</div><div class='ctx'> </div><div class='del'>-	return ret ? ret : (len + vnet_hdr_len);</div><div class='add'>+	return ret ? ret : copied;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t macvtap_do_read(struct macvtap_queue *q, struct kiocb *iocb,</div><div class='head'>diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig<br/>index 0e01f4e5cd64..944cdfb80fe4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/phy/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/phy/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/phy/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/Kconfig</a></div><div class='hunk'>@@ -135,6 +135,25 @@ config MDIO_OCTEON</div><div class='ctx'> </div><div class='ctx'> 	  If in doubt, say Y.</div><div class='ctx'> </div><div class='add'>+config MDIO_BUS_MUX</div><div class='add'>+	tristate</div><div class='add'>+	depends on OF_MDIO</div><div class='add'>+	help</div><div class='add'>+	  This module provides a driver framework for MDIO bus</div><div class='add'>+	  multiplexers which connect one of several child MDIO busses</div><div class='add'>+	  to a parent bus.  Switching between child busses is done by</div><div class='add'>+	  device specific drivers.</div><div class='add'>+</div><div class='add'>+config MDIO_BUS_MUX_GPIO</div><div class='add'>+	tristate "Support for GPIO controlled MDIO bus multiplexers"</div><div class='add'>+	depends on OF_GPIO &amp;&amp; OF_MDIO</div><div class='add'>+	select MDIO_BUS_MUX</div><div class='add'>+	help</div><div class='add'>+	  This module provides a driver for MDIO bus multiplexers that</div><div class='add'>+	  are controlled via GPIO lines.  The multiplexer connects one of</div><div class='add'>+	  several child MDIO busses to a parent bus.  Child bus</div><div class='add'>+	  selection is under the control of GPIO lines.</div><div class='add'>+</div><div class='ctx'> endif # PHYLIB</div><div class='ctx'> </div><div class='ctx'> config MICREL_KS8995MA</div><div class='head'>diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile<br/>index b7438b1b94b9..f51af688ef8b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/phy/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/phy/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/phy/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/Makefile</a></div><div class='hunk'>@@ -25,3 +25,5 @@ obj-$(CONFIG_MICREL_PHY)	+= micrel.o</div><div class='ctx'> obj-$(CONFIG_MDIO_OCTEON)	+= mdio-octeon.o</div><div class='ctx'> obj-$(CONFIG_MICREL_KS8995MA)	+= spi_ks8995.o</div><div class='ctx'> obj-$(CONFIG_AMD_PHY)		+= amd.o</div><div class='add'>+obj-$(CONFIG_MDIO_BUS_MUX)	+= mdio-mux.o</div><div class='add'>+obj-$(CONFIG_MDIO_BUS_MUX_GPIO)	+= mdio-mux-gpio.o</div><div class='head'>diff --git a/drivers/net/phy/bcm63xx.c b/drivers/net/phy/bcm63xx.c<br/>index e16f98cb4f04..cd802eb25fd2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/phy/bcm63xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/phy/bcm63xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/phy/bcm63xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/bcm63xx.c</a></div><div class='hunk'>@@ -39,10 +39,7 @@ static int bcm63xx_config_init(struct phy_device *phydev)</div><div class='ctx'> 		MII_BCM63XX_IR_SPEED |</div><div class='ctx'> 		MII_BCM63XX_IR_LINK) |</div><div class='ctx'> 		MII_BCM63XX_IR_EN;</div><div class='del'>-	err = phy_write(phydev, MII_BCM63XX_IR, reg);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-	return 0;</div><div class='add'>+	return phy_write(phydev, MII_BCM63XX_IR, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bcm63xx_ack_interrupt(struct phy_device *phydev)</div><div class='head'>diff --git a/drivers/net/phy/davicom.c b/drivers/net/phy/davicom.c<br/>index 2f774acdb551..5f59cc064778 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/phy/davicom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/phy/davicom.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/phy/davicom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/davicom.c</a></div><div class='hunk'>@@ -134,12 +134,7 @@ static int dm9161_config_init(struct phy_device *phydev)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* Reconnect the PHY, and enable Autonegotiation */</div><div class='del'>-	err = phy_write(phydev, MII_BMCR, BMCR_ANENABLE);</div><div class='del'>-</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return phy_write(phydev, MII_BMCR, BMCR_ANENABLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dm9161_ack_interrupt(struct phy_device *phydev)</div><div class='head'>diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c<br/>index dd7ae19579d1..940b29022d0c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/phy/dp83640.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/phy/dp83640.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/phy/dp83640.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/dp83640.c</a></div><div class='hunk'>@@ -1215,6 +1215,36 @@ static void dp83640_txtstamp(struct phy_device *phydev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int dp83640_ts_info(struct phy_device *dev, struct ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct dp83640_private *dp83640 = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	info-&gt;so_timestamping =</div><div class='add'>+		SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+	info-&gt;phc_index = ptp_clock_index(dp83640-&gt;clock-&gt;ptp_clock);</div><div class='add'>+	info-&gt;tx_types =</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_TX_OFF) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_TX_ON) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_TX_ONESTEP_SYNC);</div><div class='add'>+	info-&gt;rx_filters =</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct phy_driver dp83640_driver = {</div><div class='ctx'> 	.phy_id		= DP83640_PHY_ID,</div><div class='ctx'> 	.phy_id_mask	= 0xfffffff0,</div><div class='hunk'>@@ -1225,6 +1255,7 @@ static struct phy_driver dp83640_driver = {</div><div class='ctx'> 	.remove		= dp83640_remove,</div><div class='ctx'> 	.config_aneg	= genphy_config_aneg,</div><div class='ctx'> 	.read_status	= genphy_read_status,</div><div class='add'>+	.ts_info	= dp83640_ts_info,</div><div class='ctx'> 	.hwtstamp	= dp83640_hwtstamp,</div><div class='ctx'> 	.rxtstamp	= dp83640_rxtstamp,</div><div class='ctx'> 	.txtstamp	= dp83640_txtstamp,</div><div class='head'>diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c<br/>index e8b9c53c304b..418928d644bf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/phy/marvell.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/phy/marvell.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/phy/marvell.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/marvell.c</a></div><div class='hunk'>@@ -455,11 +455,7 @@ static int m88e1111_config_init(struct phy_device *phydev)</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = phy_write(phydev, MII_BMCR, BMCR_RESET);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return phy_write(phydev, MII_BMCR, BMCR_RESET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int m88e1118_config_aneg(struct phy_device *phydev)</div><div class='hunk'>@@ -515,11 +511,7 @@ static int m88e1118_config_init(struct phy_device *phydev)</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = phy_write(phydev, MII_BMCR, BMCR_RESET);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return phy_write(phydev, MII_BMCR, BMCR_RESET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int m88e1149_config_init(struct phy_device *phydev)</div><div class='hunk'>@@ -545,11 +537,7 @@ static int m88e1149_config_init(struct phy_device *phydev)</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = phy_write(phydev, MII_BMCR, BMCR_RESET);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return phy_write(phydev, MII_BMCR, BMCR_RESET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int m88e1145_config_init(struct phy_device *phydev)</div><div class='head'>diff --git a/drivers/net/phy/mdio-mux-gpio.c b/drivers/net/phy/mdio-mux-gpio.c<br/>new file mode 100644<br/>index 000000000000..e0cc4ef33dee<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/phy/mdio-mux-gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/mdio-mux-gpio.c</a></div><div class='hunk'>@@ -0,0 +1,142 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011, 2012 Cavium, Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/mdio-mux.h&gt;</div><div class='add'>+#include &lt;linux/of_gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_VERSION "1.0"</div><div class='add'>+#define DRV_DESCRIPTION "GPIO controlled MDIO bus multiplexer driver"</div><div class='add'>+</div><div class='add'>+#define MDIO_MUX_GPIO_MAX_BITS 8</div><div class='add'>+</div><div class='add'>+struct mdio_mux_gpio_state {</div><div class='add'>+	int gpio[MDIO_MUX_GPIO_MAX_BITS];</div><div class='add'>+	unsigned int num_gpios;</div><div class='add'>+	void *mux_handle;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mdio_mux_gpio_switch_fn(int current_child, int desired_child,</div><div class='add'>+				   void *data)</div><div class='add'>+{</div><div class='add'>+	int change;</div><div class='add'>+	unsigned int n;</div><div class='add'>+	struct mdio_mux_gpio_state *s = data;</div><div class='add'>+</div><div class='add'>+	if (current_child == desired_child)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	change = current_child == -1 ? -1 : current_child ^ desired_child;</div><div class='add'>+</div><div class='add'>+	for (n = 0; n &lt; s-&gt;num_gpios; n++) {</div><div class='add'>+		if (change &amp; 1)</div><div class='add'>+			gpio_set_value_cansleep(s-&gt;gpio[n],</div><div class='add'>+						(desired_child &amp; 1) != 0);</div><div class='add'>+		change &gt;&gt;= 1;</div><div class='add'>+		desired_child &gt;&gt;= 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit mdio_mux_gpio_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	enum of_gpio_flags f;</div><div class='add'>+	struct mdio_mux_gpio_state *s;</div><div class='add'>+	unsigned int num_gpios;</div><div class='add'>+	unsigned int n;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if (!pdev-&gt;dev.of_node)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	num_gpios = of_gpio_count(pdev-&gt;dev.of_node);</div><div class='add'>+	if (num_gpios == 0 || num_gpios &gt; MDIO_MUX_GPIO_MAX_BITS)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	s = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*s), GFP_KERNEL);</div><div class='add'>+	if (!s)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	s-&gt;num_gpios = num_gpios;</div><div class='add'>+</div><div class='add'>+	for (n = 0; n &lt; num_gpios; ) {</div><div class='add'>+		int gpio = of_get_gpio_flags(pdev-&gt;dev.of_node, n, &amp;f);</div><div class='add'>+		if (gpio &lt; 0) {</div><div class='add'>+			r = (gpio == -ENODEV) ? -EPROBE_DEFER : gpio;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		s-&gt;gpio[n] = gpio;</div><div class='add'>+</div><div class='add'>+		n++;</div><div class='add'>+</div><div class='add'>+		r = gpio_request(gpio, "mdio_mux_gpio");</div><div class='add'>+		if (r)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		r = gpio_direction_output(gpio, 0);</div><div class='add'>+		if (r)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = mdio_mux_init(&amp;pdev-&gt;dev,</div><div class='add'>+			  mdio_mux_gpio_switch_fn, &amp;s-&gt;mux_handle, s);</div><div class='add'>+</div><div class='add'>+	if (r == 0) {</div><div class='add'>+		pdev-&gt;dev.platform_data = s;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+err:</div><div class='add'>+	while (n) {</div><div class='add'>+		n--;</div><div class='add'>+		gpio_free(s-&gt;gpio[n]);</div><div class='add'>+	}</div><div class='add'>+	devm_kfree(&amp;pdev-&gt;dev, s);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit mdio_mux_gpio_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct mdio_mux_gpio_state *s = pdev-&gt;dev.platform_data;</div><div class='add'>+	mdio_mux_uninit(s-&gt;mux_handle);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct of_device_id mdio_mux_gpio_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "mdio-mux-gpio",</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* Legacy compatible property. */</div><div class='add'>+		.compatible = "cavium,mdio-mux-sn74cbtlv3253",</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, mdio_mux_gpio_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver mdio_mux_gpio_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name		= "mdio-mux-gpio",</div><div class='add'>+		.owner		= THIS_MODULE,</div><div class='add'>+		.of_match_table = mdio_mux_gpio_match,</div><div class='add'>+	},</div><div class='add'>+	.probe		= mdio_mux_gpio_probe,</div><div class='add'>+	.remove		= __devexit_p(mdio_mux_gpio_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(mdio_mux_gpio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION(DRV_DESCRIPTION);</div><div class='add'>+MODULE_VERSION(DRV_VERSION);</div><div class='add'>+MODULE_AUTHOR("David Daney");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/phy/mdio-mux.c b/drivers/net/phy/mdio-mux.c<br/>new file mode 100644<br/>index 000000000000..39ea0674dcde<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/phy/mdio-mux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/mdio-mux.c</a></div><div class='hunk'>@@ -0,0 +1,192 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is subject to the terms and conditions of the GNU General Public</div><div class='add'>+ * License.  See the file "COPYING" in the main directory of this archive</div><div class='add'>+ * for more details.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011, 2012 Cavium, Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mdio-mux.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_VERSION "1.0"</div><div class='add'>+#define DRV_DESCRIPTION "MDIO bus multiplexer driver"</div><div class='add'>+</div><div class='add'>+struct mdio_mux_child_bus;</div><div class='add'>+</div><div class='add'>+struct mdio_mux_parent_bus {</div><div class='add'>+	struct mii_bus *mii_bus;</div><div class='add'>+	int current_child;</div><div class='add'>+	int parent_id;</div><div class='add'>+	void *switch_data;</div><div class='add'>+	int (*switch_fn)(int current_child, int desired_child, void *data);</div><div class='add'>+</div><div class='add'>+	/* List of our children linked through their next fields. */</div><div class='add'>+	struct mdio_mux_child_bus *children;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mdio_mux_child_bus {</div><div class='add'>+	struct mii_bus *mii_bus;</div><div class='add'>+	struct mdio_mux_parent_bus *parent;</div><div class='add'>+	struct mdio_mux_child_bus *next;</div><div class='add'>+	int bus_number;</div><div class='add'>+	int phy_irq[PHY_MAX_ADDR];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The parent bus' lock is used to order access to the switch_fn.</div><div class='add'>+ */</div><div class='add'>+static int mdio_mux_read(struct mii_bus *bus, int phy_id, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct mdio_mux_child_bus *cb = bus-&gt;priv;</div><div class='add'>+	struct mdio_mux_parent_bus *pb = cb-&gt;parent;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pb-&gt;mii_bus-&gt;mdio_lock);</div><div class='add'>+	r = pb-&gt;switch_fn(pb-&gt;current_child, cb-&gt;bus_number, pb-&gt;switch_data);</div><div class='add'>+	if (r)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	pb-&gt;current_child = cb-&gt;bus_number;</div><div class='add'>+</div><div class='add'>+	r = pb-&gt;mii_bus-&gt;read(pb-&gt;mii_bus, phy_id, regnum);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;pb-&gt;mii_bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The parent bus' lock is used to order access to the switch_fn.</div><div class='add'>+ */</div><div class='add'>+static int mdio_mux_write(struct mii_bus *bus, int phy_id,</div><div class='add'>+			  int regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct mdio_mux_child_bus *cb = bus-&gt;priv;</div><div class='add'>+	struct mdio_mux_parent_bus *pb = cb-&gt;parent;</div><div class='add'>+</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pb-&gt;mii_bus-&gt;mdio_lock);</div><div class='add'>+	r = pb-&gt;switch_fn(pb-&gt;current_child, cb-&gt;bus_number, pb-&gt;switch_data);</div><div class='add'>+	if (r)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	pb-&gt;current_child = cb-&gt;bus_number;</div><div class='add'>+</div><div class='add'>+	r = pb-&gt;mii_bus-&gt;write(pb-&gt;mii_bus, phy_id, regnum, val);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;pb-&gt;mii_bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int parent_count;</div><div class='add'>+</div><div class='add'>+int mdio_mux_init(struct device *dev,</div><div class='add'>+		  int (*switch_fn)(int cur, int desired, void *data),</div><div class='add'>+		  void **mux_handle,</div><div class='add'>+		  void *data)</div><div class='add'>+{</div><div class='add'>+	struct device_node *parent_bus_node;</div><div class='add'>+	struct device_node *child_bus_node;</div><div class='add'>+	int r, ret_val;</div><div class='add'>+	struct mii_bus *parent_bus;</div><div class='add'>+	struct mdio_mux_parent_bus *pb;</div><div class='add'>+	struct mdio_mux_child_bus *cb;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;of_node)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	parent_bus_node = of_parse_phandle(dev-&gt;of_node, "mdio-parent-bus", 0);</div><div class='add'>+</div><div class='add'>+	if (!parent_bus_node)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	parent_bus = of_mdio_find_bus(parent_bus_node);</div><div class='add'>+	if (parent_bus == NULL) {</div><div class='add'>+		ret_val = -EPROBE_DEFER;</div><div class='add'>+		goto err_parent_bus;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pb = devm_kzalloc(dev, sizeof(*pb), GFP_KERNEL);</div><div class='add'>+	if (pb == NULL) {</div><div class='add'>+		ret_val = -ENOMEM;</div><div class='add'>+		goto err_parent_bus;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pb-&gt;switch_data = data;</div><div class='add'>+	pb-&gt;switch_fn = switch_fn;</div><div class='add'>+	pb-&gt;current_child = -1;</div><div class='add'>+	pb-&gt;parent_id = parent_count++;</div><div class='add'>+	pb-&gt;mii_bus = parent_bus;</div><div class='add'>+</div><div class='add'>+	ret_val = -ENODEV;</div><div class='add'>+	for_each_child_of_node(dev-&gt;of_node, child_bus_node) {</div><div class='add'>+		u32 v;</div><div class='add'>+</div><div class='add'>+		r = of_property_read_u32(child_bus_node, "reg", &amp;v);</div><div class='add'>+		if (r)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		cb = devm_kzalloc(dev, sizeof(*cb), GFP_KERNEL);</div><div class='add'>+		if (cb == NULL) {</div><div class='add'>+			dev_err(dev,</div><div class='add'>+				"Error: Failed to allocate memory for child\n");</div><div class='add'>+			ret_val = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		cb-&gt;bus_number = v;</div><div class='add'>+		cb-&gt;parent = pb;</div><div class='add'>+		cb-&gt;mii_bus = mdiobus_alloc();</div><div class='add'>+		cb-&gt;mii_bus-&gt;priv = cb;</div><div class='add'>+</div><div class='add'>+		cb-&gt;mii_bus-&gt;irq = cb-&gt;phy_irq;</div><div class='add'>+		cb-&gt;mii_bus-&gt;name = "mdio_mux";</div><div class='add'>+		snprintf(cb-&gt;mii_bus-&gt;id, MII_BUS_ID_SIZE, "%x.%x",</div><div class='add'>+			 pb-&gt;parent_id, v);</div><div class='add'>+		cb-&gt;mii_bus-&gt;parent = dev;</div><div class='add'>+		cb-&gt;mii_bus-&gt;read = mdio_mux_read;</div><div class='add'>+		cb-&gt;mii_bus-&gt;write = mdio_mux_write;</div><div class='add'>+		r = of_mdiobus_register(cb-&gt;mii_bus, child_bus_node);</div><div class='add'>+		if (r) {</div><div class='add'>+			mdiobus_free(cb-&gt;mii_bus);</div><div class='add'>+			devm_kfree(dev, cb);</div><div class='add'>+		} else {</div><div class='add'>+			of_node_get(child_bus_node);</div><div class='add'>+			cb-&gt;next = pb-&gt;children;</div><div class='add'>+			pb-&gt;children = cb;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (pb-&gt;children) {</div><div class='add'>+		*mux_handle = pb;</div><div class='add'>+		dev_info(dev, "Version " DRV_VERSION "\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+err_parent_bus:</div><div class='add'>+	of_node_put(parent_bus_node);</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mdio_mux_init);</div><div class='add'>+</div><div class='add'>+void mdio_mux_uninit(void *mux_handle)</div><div class='add'>+{</div><div class='add'>+	struct mdio_mux_parent_bus *pb = mux_handle;</div><div class='add'>+	struct mdio_mux_child_bus *cb = pb-&gt;children;</div><div class='add'>+</div><div class='add'>+	while (cb) {</div><div class='add'>+		mdiobus_unregister(cb-&gt;mii_bus);</div><div class='add'>+		mdiobus_free(cb-&gt;mii_bus);</div><div class='add'>+		cb = cb-&gt;next;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mdio_mux_uninit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION(DRV_DESCRIPTION);</div><div class='add'>+MODULE_VERSION(DRV_VERSION);</div><div class='add'>+MODULE_AUTHOR("David Daney");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c<br/>index 8985cc62cf41..683ef1ce5519 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/phy/mdio_bus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/phy/mdio_bus.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/phy/mdio_bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/mdio_bus.c</a></div><div class='hunk'>@@ -88,6 +88,38 @@ static struct class mdio_bus_class = {</div><div class='ctx'> 	.dev_release	= mdiobus_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_OF_MDIO)</div><div class='add'>+/* Helper function for of_mdio_find_bus */</div><div class='add'>+static int of_mdio_bus_match(struct device *dev, void *mdio_bus_np)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;of_node == mdio_bus_np;</div><div class='add'>+}</div><div class='add'>+/**</div><div class='add'>+ * of_mdio_find_bus - Given an mii_bus node, find the mii_bus.</div><div class='add'>+ * @mdio_np: Pointer to the mii_bus.</div><div class='add'>+ *</div><div class='add'>+ * Returns a pointer to the mii_bus, or NULL if none found.</div><div class='add'>+ *</div><div class='add'>+ * Because the association of a device_node and mii_bus is made via</div><div class='add'>+ * of_mdiobus_register(), the mii_bus cannot be found before it is</div><div class='add'>+ * registered with of_mdiobus_register().</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+struct mii_bus *of_mdio_find_bus(struct device_node *mdio_bus_np)</div><div class='add'>+{</div><div class='add'>+	struct device *d;</div><div class='add'>+</div><div class='add'>+	if (!mdio_bus_np)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	d = class_find_device(&amp;mdio_bus_class, NULL,  mdio_bus_np,</div><div class='add'>+			      of_mdio_bus_match);</div><div class='add'>+</div><div class='add'>+	return d ? to_mii_bus(d) : NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(of_mdio_find_bus);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * mdiobus_register - bring up all the PHYs on a given bus and attach them to bus</div><div class='ctx'>  * @bus: target mii_bus</div><div class='head'>diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c<br/>index e8c42d6a7d1c..de86a5582224 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/phy/phy_device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/phy/phy_device.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/phy/phy_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/phy_device.c</a></div><div class='hunk'>@@ -207,7 +207,7 @@ static struct phy_device* phy_device_create(struct mii_bus *bus,</div><div class='ctx'>  * Description: Reads the ID registers of the PHY at @addr on the</div><div class='ctx'>  *   @bus, stores it in @phy_id and returns zero on success.</div><div class='ctx'>  */</div><div class='del'>-int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id)</div><div class='add'>+static int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id)</div><div class='ctx'> {</div><div class='ctx'> 	int phy_reg;</div><div class='ctx'> </div><div class='hunk'>@@ -230,7 +230,6 @@ int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(get_phy_id);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * get_phy_device - reads the specified PHY device and returns its @phy_device struct</div><div class='head'>diff --git a/drivers/net/phy/spi_ks8995.c b/drivers/net/phy/spi_ks8995.c<br/>index 116a2dd7c879..4eb98bc52a0a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/phy/spi_ks8995.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/phy/spi_ks8995.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/phy/spi_ks8995.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/phy/spi_ks8995.c</a></div><div class='hunk'>@@ -348,7 +348,6 @@ static int __devexit ks8995_remove(struct spi_device *spi)</div><div class='ctx'> static struct spi_driver ks8995_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	    = "spi-ks8995",</div><div class='del'>-		.bus	     = &amp;spi_bus_type,</div><div class='ctx'> 		.owner	   = THIS_MODULE,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe	  = ks8995_probe,</div><div class='head'>diff --git a/drivers/net/ppp/ppp_async.c b/drivers/net/ppp/ppp_async.c<br/>index af95a98fd86f..a031f6b456b4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ppp/ppp_async.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ppp/ppp_async.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ppp/ppp_async.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ppp/ppp_async.c</a></div><div class='hunk'>@@ -613,7 +613,7 @@ ppp_async_encode(struct asyncppp *ap)</div><div class='ctx'> 	*buf++ = PPP_FLAG;</div><div class='ctx'> 	ap-&gt;olim = buf;</div><div class='ctx'> </div><div class='del'>-	kfree_skb(ap-&gt;tpkt);</div><div class='add'>+	consume_skb(ap-&gt;tpkt);</div><div class='ctx'> 	ap-&gt;tpkt = NULL;</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ppp/ppp_generic.c b/drivers/net/ppp/ppp_generic.c<br/>index 21d7151fb0ab..5c0557222f20 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ppp/ppp_generic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ppp/ppp_generic.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ppp/ppp_generic.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ppp/ppp_generic.c</a></div><div class='hunk'>@@ -1092,13 +1092,13 @@ pad_compress_skb(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> 				   new_skb-&gt;data, skb-&gt;len + 2,</div><div class='ctx'> 				   compressor_skb_size);</div><div class='ctx'> 	if (len &gt; 0 &amp;&amp; (ppp-&gt;flags &amp; SC_CCP_UP)) {</div><div class='del'>-		kfree_skb(skb);</div><div class='add'>+		consume_skb(skb);</div><div class='ctx'> 		skb = new_skb;</div><div class='ctx'> 		skb_put(skb, len);</div><div class='ctx'> 		skb_pull(skb, 2);	/* pull off A/C bytes */</div><div class='ctx'> 	} else if (len == 0) {</div><div class='ctx'> 		/* didn't compress, or CCP not up yet */</div><div class='del'>-		kfree_skb(new_skb);</div><div class='add'>+		consume_skb(new_skb);</div><div class='ctx'> 		new_skb = skb;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1112,7 +1112,7 @@ pad_compress_skb(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> 		if (net_ratelimit())</div><div class='ctx'> 			netdev_err(ppp-&gt;dev, "ppp: compressor dropped pkt\n");</div><div class='ctx'> 		kfree_skb(skb);</div><div class='del'>-		kfree_skb(new_skb);</div><div class='add'>+		consume_skb(new_skb);</div><div class='ctx'> 		new_skb = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return new_skb;</div><div class='hunk'>@@ -1178,7 +1178,7 @@ ppp_send_frame(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> 				    !(ppp-&gt;flags &amp; SC_NO_TCP_CCID));</div><div class='ctx'> 		if (cp == skb-&gt;data + 2) {</div><div class='ctx'> 			/* didn't compress */</div><div class='del'>-			kfree_skb(new_skb);</div><div class='add'>+			consume_skb(new_skb);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (cp[0] &amp; SL_TYPE_COMPRESSED_TCP) {</div><div class='ctx'> 				proto = PPP_VJC_COMP;</div><div class='hunk'>@@ -1187,7 +1187,7 @@ ppp_send_frame(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> 				proto = PPP_VJC_UNCOMP;</div><div class='ctx'> 				cp[0] = skb-&gt;data[2];</div><div class='ctx'> 			}</div><div class='del'>-			kfree_skb(skb);</div><div class='add'>+			consume_skb(skb);</div><div class='ctx'> 			skb = new_skb;</div><div class='ctx'> 			cp = skb_put(skb, len + 2);</div><div class='ctx'> 			cp[0] = 0;</div><div class='hunk'>@@ -1703,7 +1703,7 @@ ppp_receive_nonmp_frame(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> 			}</div><div class='ctx'> 			skb_reserve(ns, 2);</div><div class='ctx'> 			skb_copy_bits(skb, 0, skb_put(ns, skb-&gt;len), skb-&gt;len);</div><div class='del'>-			kfree_skb(skb);</div><div class='add'>+			consume_skb(skb);</div><div class='ctx'> 			skb = ns;</div><div class='ctx'> 		}</div><div class='ctx'> 		else</div><div class='hunk'>@@ -1851,7 +1851,7 @@ ppp_decompress_frame(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		kfree_skb(skb);</div><div class='add'>+		consume_skb(skb);</div><div class='ctx'> 		skb = ns;</div><div class='ctx'> 		skb_put(skb, len);</div><div class='ctx'> 		skb_pull(skb, 2);	/* pull off the A/C bytes */</div><div class='head'>diff --git a/drivers/net/ppp/ppp_synctty.c b/drivers/net/ppp/ppp_synctty.c<br/>index 55e466c511d5..1a12033d2efa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ppp/ppp_synctty.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ppp/ppp_synctty.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ppp/ppp_synctty.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ppp/ppp_synctty.c</a></div><div class='hunk'>@@ -588,7 +588,7 @@ ppp_sync_txmunge(struct syncppp *ap, struct sk_buff *skb)</div><div class='ctx'> 			skb_reserve(npkt,2);</div><div class='ctx'> 			skb_copy_from_linear_data(skb,</div><div class='ctx'> 				      skb_put(npkt, skb-&gt;len), skb-&gt;len);</div><div class='del'>-			kfree_skb(skb);</div><div class='add'>+			consume_skb(skb);</div><div class='ctx'> 			skb = npkt;</div><div class='ctx'> 		}</div><div class='ctx'> 		skb_push(skb,2);</div><div class='hunk'>@@ -656,7 +656,7 @@ ppp_sync_push(struct syncppp *ap)</div><div class='ctx'> 			if (sent &lt; ap-&gt;tpkt-&gt;len) {</div><div class='ctx'> 				tty_stuffed = 1;</div><div class='ctx'> 			} else {</div><div class='del'>-				kfree_skb(ap-&gt;tpkt);</div><div class='add'>+				consume_skb(ap-&gt;tpkt);</div><div class='ctx'> 				ap-&gt;tpkt = NULL;</div><div class='ctx'> 				clear_bit(XMIT_FULL, &amp;ap-&gt;xmit_flags);</div><div class='ctx'> 				done = 1;</div><div class='head'>diff --git a/drivers/net/ppp/pppoe.c b/drivers/net/ppp/pppoe.c<br/>index 2fa1a9b6f498..cbf7047decc0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ppp/pppoe.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ppp/pppoe.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ppp/pppoe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ppp/pppoe.c</a></div><div class='hunk'>@@ -201,7 +201,7 @@ static int __set_item(struct pppoe_net *pn, struct pppox_sock *po)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct pppox_sock *__delete_item(struct pppoe_net *pn, __be16 sid,</div><div class='add'>+static void __delete_item(struct pppoe_net *pn, __be16 sid,</div><div class='ctx'> 					char *addr, int ifindex)</div><div class='ctx'> {</div><div class='ctx'> 	int hash = hash_item(sid, addr);</div><div class='hunk'>@@ -220,8 +220,6 @@ static struct pppox_sock *__delete_item(struct pppoe_net *pn, __be16 sid,</div><div class='ctx'> 		src = &amp;ret-&gt;next;</div><div class='ctx'> 		ret = ret-&gt;next;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**********************************************************************</div><div class='hunk'>@@ -264,16 +262,12 @@ static inline struct pppox_sock *get_item_by_addr(struct net *net,</div><div class='ctx'> 	return pppox_sock;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct pppox_sock *delete_item(struct pppoe_net *pn, __be16 sid,</div><div class='add'>+static inline void delete_item(struct pppoe_net *pn, __be16 sid,</div><div class='ctx'> 					char *addr, int ifindex)</div><div class='ctx'> {</div><div class='del'>-	struct pppox_sock *ret;</div><div class='del'>-</div><div class='ctx'> 	write_lock_bh(&amp;pn-&gt;hash_lock);</div><div class='del'>-	ret = __delete_item(pn, sid, addr, ifindex);</div><div class='add'>+	__delete_item(pn, sid, addr, ifindex);</div><div class='ctx'> 	write_unlock_bh(&amp;pn-&gt;hash_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************</div><div class='hunk'>@@ -990,8 +984,10 @@ static int pppoe_recvmsg(struct kiocb *iocb, struct socket *sock,</div><div class='ctx'> 	if (skb) {</div><div class='ctx'> 		total_len = min_t(size_t, total_len, skb-&gt;len);</div><div class='ctx'> 		error = skb_copy_datagram_iovec(skb, 0, m-&gt;msg_iov, total_len);</div><div class='del'>-		if (error == 0)</div><div class='del'>-			error = total_len;</div><div class='add'>+		if (error == 0) {</div><div class='add'>+			consume_skb(skb);</div><div class='add'>+			return total_len;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree_skb(skb);</div><div class='head'>diff --git a/drivers/net/ppp/pptp.c b/drivers/net/ppp/pptp.c<br/>index 885dbdd9c39e..1c98321b56cc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/ppp/pptp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/ppp/pptp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/ppp/pptp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/ppp/pptp.c</a></div><div class='hunk'>@@ -116,8 +116,8 @@ static int lookup_chan_dst(u16 call_id, __be32 d_addr)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='del'>-	for (i = find_next_bit(callid_bitmap, MAX_CALLID, 1); i &lt; MAX_CALLID;</div><div class='del'>-	     i = find_next_bit(callid_bitmap, MAX_CALLID, i + 1)) {</div><div class='add'>+	i = 1;</div><div class='add'>+	for_each_set_bit_from(i, callid_bitmap, MAX_CALLID) {</div><div class='ctx'> 		sock = rcu_dereference(callid_sock[i]);</div><div class='ctx'> 		if (!sock)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -209,7 +209,7 @@ static int pptp_xmit(struct ppp_channel *chan, struct sk_buff *skb)</div><div class='ctx'> 		}</div><div class='ctx'> 		if (skb-&gt;sk)</div><div class='ctx'> 			skb_set_owner_w(new_skb, skb-&gt;sk);</div><div class='del'>-		kfree_skb(skb);</div><div class='add'>+		consume_skb(skb);</div><div class='ctx'> 		skb = new_skb;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/team/Kconfig b/drivers/net/team/Kconfig<br/>index 248a144033ca..89024d5fc33a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/team/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/team/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/team/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/team/Kconfig</a></div><div class='hunk'>@@ -40,4 +40,15 @@ config NET_TEAM_MODE_ACTIVEBACKUP</div><div class='ctx'> 	  To compile this team mode as a module, choose M here: the module</div><div class='ctx'> 	  will be called team_mode_activebackup.</div><div class='ctx'> </div><div class='add'>+config NET_TEAM_MODE_LOADBALANCE</div><div class='add'>+	tristate "Load-balance mode support"</div><div class='add'>+	depends on NET_TEAM</div><div class='add'>+	---help---</div><div class='add'>+	  This mode provides load balancing functionality. Tx port selection</div><div class='add'>+	  is done using BPF function set up from userspace (bpf_hash_func</div><div class='add'>+	  option)</div><div class='add'>+</div><div class='add'>+	  To compile this team mode as a module, choose M here: the module</div><div class='add'>+	  will be called team_mode_loadbalance.</div><div class='add'>+</div><div class='ctx'> endif # NET_TEAM</div><div class='head'>diff --git a/drivers/net/team/Makefile b/drivers/net/team/Makefile<br/>index 85f2028a87af..fb9f4c1c51ff 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/team/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/team/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/team/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/team/Makefile</a></div><div class='hunk'>@@ -5,3 +5,4 @@</div><div class='ctx'> obj-$(CONFIG_NET_TEAM) += team.o</div><div class='ctx'> obj-$(CONFIG_NET_TEAM_MODE_ROUNDROBIN) += team_mode_roundrobin.o</div><div class='ctx'> obj-$(CONFIG_NET_TEAM_MODE_ACTIVEBACKUP) += team_mode_activebackup.o</div><div class='add'>+obj-$(CONFIG_NET_TEAM_MODE_LOADBALANCE) += team_mode_loadbalance.o</div><div class='head'>diff --git a/drivers/net/team/team.c b/drivers/net/team/team.c<br/>index 8f81805c6825..c61ae35a53ce 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/team/team.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/team/team.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/team/team.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/team/team.c</a></div><div class='hunk'>@@ -65,7 +65,7 @@ static int __set_port_mac(struct net_device *port_dev,</div><div class='ctx'> 	return dev_set_mac_address(port_dev, &amp;addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int team_port_set_orig_mac(struct team_port *port)</div><div class='add'>+static int team_port_set_orig_mac(struct team_port *port)</div><div class='ctx'> {</div><div class='ctx'> 	return __set_port_mac(port-&gt;dev, port-&gt;orig.dev_addr);</div><div class='ctx'> }</div><div class='hunk'>@@ -76,12 +76,26 @@ int team_port_set_team_mac(struct team_port *port)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(team_port_set_team_mac);</div><div class='ctx'> </div><div class='add'>+static void team_refresh_port_linkup(struct team_port *port)</div><div class='add'>+{</div><div class='add'>+	port-&gt;linkup = port-&gt;user.linkup_enabled ? port-&gt;user.linkup :</div><div class='add'>+						   port-&gt;state.linkup;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*******************</div><div class='ctx'>  * Options handling</div><div class='ctx'>  *******************/</div><div class='ctx'> </div><div class='del'>-struct team_option *__team_find_option(struct team *team, const char *opt_name)</div><div class='add'>+struct team_option_inst { /* One for each option instance */</div><div class='add'>+	struct list_head list;</div><div class='add'>+	struct team_option *option;</div><div class='add'>+	struct team_port *port; /* != NULL if per-port */</div><div class='add'>+	bool changed;</div><div class='add'>+	bool removed;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct team_option *__team_find_option(struct team *team,</div><div class='add'>+					      const char *opt_name)</div><div class='ctx'> {</div><div class='ctx'> 	struct team_option *option;</div><div class='ctx'> </div><div class='hunk'>@@ -92,9 +106,121 @@ struct team_option *__team_find_option(struct team *team, const char *opt_name)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __team_options_register(struct team *team,</div><div class='del'>-			    const struct team_option *option,</div><div class='del'>-			    size_t option_count)</div><div class='add'>+static int __team_option_inst_add(struct team *team, struct team_option *option,</div><div class='add'>+				  struct team_port *port)</div><div class='add'>+{</div><div class='add'>+	struct team_option_inst *opt_inst;</div><div class='add'>+</div><div class='add'>+	opt_inst = kmalloc(sizeof(*opt_inst), GFP_KERNEL);</div><div class='add'>+	if (!opt_inst)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	opt_inst-&gt;option = option;</div><div class='add'>+	opt_inst-&gt;port = port;</div><div class='add'>+	opt_inst-&gt;changed = true;</div><div class='add'>+	opt_inst-&gt;removed = false;</div><div class='add'>+	list_add_tail(&amp;opt_inst-&gt;list, &amp;team-&gt;option_inst_list);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __team_option_inst_del(struct team_option_inst *opt_inst)</div><div class='add'>+{</div><div class='add'>+	list_del(&amp;opt_inst-&gt;list);</div><div class='add'>+	kfree(opt_inst);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __team_option_inst_del_option(struct team *team,</div><div class='add'>+					  struct team_option *option)</div><div class='add'>+{</div><div class='add'>+	struct team_option_inst *opt_inst, *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(opt_inst, tmp, &amp;team-&gt;option_inst_list, list) {</div><div class='add'>+		if (opt_inst-&gt;option == option)</div><div class='add'>+			__team_option_inst_del(opt_inst);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __team_option_inst_add_option(struct team *team,</div><div class='add'>+					 struct team_option *option)</div><div class='add'>+{</div><div class='add'>+	struct team_port *port;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!option-&gt;per_port)</div><div class='add'>+		return __team_option_inst_add(team, option, 0);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(port, &amp;team-&gt;port_list, list) {</div><div class='add'>+		err = __team_option_inst_add(team, option, port);</div><div class='add'>+		if (err)</div><div class='add'>+			goto inst_del_option;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+inst_del_option:</div><div class='add'>+	__team_option_inst_del_option(team, option);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __team_option_inst_mark_removed_option(struct team *team,</div><div class='add'>+						   struct team_option *option)</div><div class='add'>+{</div><div class='add'>+	struct team_option_inst *opt_inst;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(opt_inst, &amp;team-&gt;option_inst_list, list) {</div><div class='add'>+		if (opt_inst-&gt;option == option) {</div><div class='add'>+			opt_inst-&gt;changed = true;</div><div class='add'>+			opt_inst-&gt;removed = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __team_option_inst_del_port(struct team *team,</div><div class='add'>+					struct team_port *port)</div><div class='add'>+{</div><div class='add'>+	struct team_option_inst *opt_inst, *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(opt_inst, tmp, &amp;team-&gt;option_inst_list, list) {</div><div class='add'>+		if (opt_inst-&gt;option-&gt;per_port &amp;&amp;</div><div class='add'>+		    opt_inst-&gt;port == port)</div><div class='add'>+			__team_option_inst_del(opt_inst);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __team_option_inst_add_port(struct team *team,</div><div class='add'>+				       struct team_port *port)</div><div class='add'>+{</div><div class='add'>+	struct team_option *option;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(option, &amp;team-&gt;option_list, list) {</div><div class='add'>+		if (!option-&gt;per_port)</div><div class='add'>+			continue;</div><div class='add'>+		err = __team_option_inst_add(team, option, port);</div><div class='add'>+		if (err)</div><div class='add'>+			goto inst_del_port;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+inst_del_port:</div><div class='add'>+	__team_option_inst_del_port(team, port);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __team_option_inst_mark_removed_port(struct team *team,</div><div class='add'>+						 struct team_port *port)</div><div class='add'>+{</div><div class='add'>+	struct team_option_inst *opt_inst;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(opt_inst, &amp;team-&gt;option_inst_list, list) {</div><div class='add'>+		if (opt_inst-&gt;port == port) {</div><div class='add'>+			opt_inst-&gt;changed = true;</div><div class='add'>+			opt_inst-&gt;removed = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __team_options_register(struct team *team,</div><div class='add'>+				   const struct team_option *option,</div><div class='add'>+				   size_t option_count)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct team_option **dst_opts;</div><div class='hunk'>@@ -107,26 +233,32 @@ int __team_options_register(struct team *team,</div><div class='ctx'> 	for (i = 0; i &lt; option_count; i++, option++) {</div><div class='ctx'> 		if (__team_find_option(team, option-&gt;name)) {</div><div class='ctx'> 			err = -EEXIST;</div><div class='del'>-			goto rollback;</div><div class='add'>+			goto alloc_rollback;</div><div class='ctx'> 		}</div><div class='ctx'> 		dst_opts[i] = kmemdup(option, sizeof(*option), GFP_KERNEL);</div><div class='ctx'> 		if (!dst_opts[i]) {</div><div class='ctx'> 			err = -ENOMEM;</div><div class='del'>-			goto rollback;</div><div class='add'>+			goto alloc_rollback;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; option_count; i++) {</div><div class='del'>-		dst_opts[i]-&gt;changed = true;</div><div class='del'>-		dst_opts[i]-&gt;removed = false;</div><div class='add'>+		err = __team_option_inst_add_option(team, dst_opts[i]);</div><div class='add'>+		if (err)</div><div class='add'>+			goto inst_rollback;</div><div class='ctx'> 		list_add_tail(&amp;dst_opts[i]-&gt;list, &amp;team-&gt;option_list);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(dst_opts);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-rollback:</div><div class='del'>-	for (i = 0; i &lt; option_count; i++)</div><div class='add'>+inst_rollback:</div><div class='add'>+	for (i--; i &gt;= 0; i--)</div><div class='add'>+		__team_option_inst_del_option(team, dst_opts[i]);</div><div class='add'>+</div><div class='add'>+	i = option_count - 1;</div><div class='add'>+alloc_rollback:</div><div class='add'>+	for (i--; i &gt;= 0; i--)</div><div class='ctx'> 		kfree(dst_opts[i]);</div><div class='ctx'> </div><div class='ctx'> 	kfree(dst_opts);</div><div class='hunk'>@@ -143,10 +275,8 @@ static void __team_options_mark_removed(struct team *team,</div><div class='ctx'> 		struct team_option *del_opt;</div><div class='ctx'> </div><div class='ctx'> 		del_opt = __team_find_option(team, option-&gt;name);</div><div class='del'>-		if (del_opt) {</div><div class='del'>-			del_opt-&gt;changed = true;</div><div class='del'>-			del_opt-&gt;removed = true;</div><div class='del'>-		}</div><div class='add'>+		if (del_opt)</div><div class='add'>+			__team_option_inst_mark_removed_option(team, del_opt);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -161,6 +291,7 @@ static void __team_options_unregister(struct team *team,</div><div class='ctx'> </div><div class='ctx'> 		del_opt = __team_find_option(team, option-&gt;name);</div><div class='ctx'> 		if (del_opt) {</div><div class='add'>+			__team_option_inst_del_option(team, del_opt);</div><div class='ctx'> 			list_del(&amp;del_opt-&gt;list);</div><div class='ctx'> 			kfree(del_opt);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -193,22 +324,42 @@ void team_options_unregister(struct team *team,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(team_options_unregister);</div><div class='ctx'> </div><div class='del'>-static int team_option_get(struct team *team, struct team_option *option,</div><div class='del'>-			   void *arg)</div><div class='add'>+static int team_option_port_add(struct team *team, struct team_port *port)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = __team_option_inst_add_port(team, port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	__team_options_change_check(team);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void team_option_port_del(struct team *team, struct team_port *port)</div><div class='add'>+{</div><div class='add'>+	__team_option_inst_mark_removed_port(team, port);</div><div class='add'>+	__team_options_change_check(team);</div><div class='add'>+	__team_option_inst_del_port(team, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int team_option_get(struct team *team,</div><div class='add'>+			   struct team_option_inst *opt_inst,</div><div class='add'>+			   struct team_gsetter_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	return option-&gt;getter(team, arg);</div><div class='add'>+	return opt_inst-&gt;option-&gt;getter(team, ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int team_option_set(struct team *team, struct team_option *option,</div><div class='del'>-			   void *arg)</div><div class='add'>+static int team_option_set(struct team *team,</div><div class='add'>+			   struct team_option_inst *opt_inst,</div><div class='add'>+			   struct team_gsetter_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = option-&gt;setter(team, arg);</div><div class='add'>+	err = opt_inst-&gt;option-&gt;setter(team, ctx);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	option-&gt;changed = true;</div><div class='add'>+	opt_inst-&gt;changed = true;</div><div class='ctx'> 	__team_options_change_check(team);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -408,6 +559,8 @@ static int team_change_mode(struct team *team, const char *kind)</div><div class='ctx'>  * Rx path frame handler</div><div class='ctx'>  ************************/</div><div class='ctx'> </div><div class='add'>+static bool team_port_enabled(struct team_port *port);</div><div class='add'>+</div><div class='ctx'> /* note: already called with rcu_read_lock */</div><div class='ctx'> static rx_handler_result_t team_handle_frame(struct sk_buff **pskb)</div><div class='ctx'> {</div><div class='hunk'>@@ -424,8 +577,12 @@ static rx_handler_result_t team_handle_frame(struct sk_buff **pskb)</div><div class='ctx'> </div><div class='ctx'> 	port = team_port_get_rcu(skb-&gt;dev);</div><div class='ctx'> 	team = port-&gt;team;</div><div class='del'>-</div><div class='del'>-	res = team-&gt;ops.receive(team, port, skb);</div><div class='add'>+	if (!team_port_enabled(port)) {</div><div class='add'>+		/* allow exact match delivery for disabled ports */</div><div class='add'>+		res = RX_HANDLER_EXACT;</div><div class='add'>+	} else {</div><div class='add'>+		res = team-&gt;ops.receive(team, port, skb);</div><div class='add'>+	}</div><div class='ctx'> 	if (res == RX_HANDLER_ANOTHER) {</div><div class='ctx'> 		struct team_pcpu_stats *pcpu_stats;</div><div class='ctx'> </div><div class='hunk'>@@ -461,17 +618,25 @@ static bool team_port_find(const struct team *team,</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool team_port_enabled(struct team_port *port)</div><div class='add'>+{</div><div class='add'>+	return port-&gt;index != -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='del'>- * Add/delete port to the team port list. Write guarded by rtnl_lock.</div><div class='del'>- * Takes care of correct port-&gt;index setup (might be racy).</div><div class='add'>+ * Enable/disable port by adding to enabled port hashlist and setting</div><div class='add'>+ * port-&gt;index (Might be racy so reader could see incorrect ifindex when</div><div class='add'>+ * processing a flying packet, but that is not a problem). Write guarded</div><div class='add'>+ * by team-&gt;lock.</div><div class='ctx'>  */</div><div class='del'>-static void team_port_list_add_port(struct team *team,</div><div class='del'>-				    struct team_port *port)</div><div class='add'>+static void team_port_enable(struct team *team,</div><div class='add'>+			     struct team_port *port)</div><div class='ctx'> {</div><div class='del'>-	port-&gt;index = team-&gt;port_count++;</div><div class='add'>+	if (team_port_enabled(port))</div><div class='add'>+		return;</div><div class='add'>+	port-&gt;index = team-&gt;en_port_count++;</div><div class='ctx'> 	hlist_add_head_rcu(&amp;port-&gt;hlist,</div><div class='ctx'> 			   team_port_index_hash(team, port-&gt;index));</div><div class='del'>-	list_add_tail_rcu(&amp;port-&gt;list, &amp;team-&gt;port_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __reconstruct_port_hlist(struct team *team, int rm_index)</div><div class='hunk'>@@ -479,7 +644,7 @@ static void __reconstruct_port_hlist(struct team *team, int rm_index)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct team_port *port;</div><div class='ctx'> </div><div class='del'>-	for (i = rm_index + 1; i &lt; team-&gt;port_count; i++) {</div><div class='add'>+	for (i = rm_index + 1; i &lt; team-&gt;en_port_count; i++) {</div><div class='ctx'> 		port = team_get_port_by_index(team, i);</div><div class='ctx'> 		hlist_del_rcu(&amp;port-&gt;hlist);</div><div class='ctx'> 		port-&gt;index--;</div><div class='hunk'>@@ -488,15 +653,17 @@ static void __reconstruct_port_hlist(struct team *team, int rm_index)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void team_port_list_del_port(struct team *team,</div><div class='del'>-				   struct team_port *port)</div><div class='add'>+static void team_port_disable(struct team *team,</div><div class='add'>+			      struct team_port *port)</div><div class='ctx'> {</div><div class='ctx'> 	int rm_index = port-&gt;index;</div><div class='ctx'> </div><div class='add'>+	if (!team_port_enabled(port))</div><div class='add'>+		return;</div><div class='ctx'> 	hlist_del_rcu(&amp;port-&gt;hlist);</div><div class='del'>-	list_del_rcu(&amp;port-&gt;list);</div><div class='ctx'> 	__reconstruct_port_hlist(team, rm_index);</div><div class='del'>-	team-&gt;port_count--;</div><div class='add'>+	team-&gt;en_port_count--;</div><div class='add'>+	port-&gt;index = -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define TEAM_VLAN_FEATURES (NETIF_F_ALL_CSUM | NETIF_F_SG | \</div><div class='hunk'>@@ -642,7 +809,16 @@ static int team_port_add(struct team *team, struct net_device *port_dev)</div><div class='ctx'> 		goto err_handler_register;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	team_port_list_add_port(team, port);</div><div class='add'>+	err = team_option_port_add(team, port);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "Device %s failed to add per-port options\n",</div><div class='add'>+			   portname);</div><div class='add'>+		goto err_option_port_add;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	port-&gt;index = -1;</div><div class='add'>+	team_port_enable(team, port);</div><div class='add'>+	list_add_tail_rcu(&amp;port-&gt;list, &amp;team-&gt;port_list);</div><div class='ctx'> 	team_adjust_ops(team);</div><div class='ctx'> 	__team_compute_features(team);</div><div class='ctx'> 	__team_port_change_check(port, !!netif_carrier_ok(port_dev));</div><div class='hunk'>@@ -651,6 +827,9 @@ static int team_port_add(struct team *team, struct net_device *port_dev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_option_port_add:</div><div class='add'>+	netdev_rx_handler_unregister(port_dev);</div><div class='add'>+</div><div class='ctx'> err_handler_register:</div><div class='ctx'> 	netdev_set_master(port_dev, NULL);</div><div class='ctx'> </div><div class='hunk'>@@ -688,8 +867,10 @@ static int team_port_del(struct team *team, struct net_device *port_dev)</div><div class='ctx'> </div><div class='ctx'> 	port-&gt;removed = true;</div><div class='ctx'> 	__team_port_change_check(port, false);</div><div class='del'>-	team_port_list_del_port(team, port);</div><div class='add'>+	team_port_disable(team, port);</div><div class='add'>+	list_del_rcu(&amp;port-&gt;list);</div><div class='ctx'> 	team_adjust_ops(team);</div><div class='add'>+	team_option_port_del(team, port);</div><div class='ctx'> 	netdev_rx_handler_unregister(port_dev);</div><div class='ctx'> 	netdev_set_master(port_dev, NULL);</div><div class='ctx'> 	vlan_vids_del_by_dev(port_dev, dev);</div><div class='hunk'>@@ -712,19 +893,66 @@ static int team_port_del(struct team *team, struct net_device *port_dev)</div><div class='ctx'> </div><div class='ctx'> static const char team_no_mode_kind[] = "*NOMODE*";</div><div class='ctx'> </div><div class='del'>-static int team_mode_option_get(struct team *team, void *arg)</div><div class='add'>+static int team_mode_option_get(struct team *team, struct team_gsetter_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	ctx-&gt;data.str_val = team-&gt;mode ? team-&gt;mode-&gt;kind : team_no_mode_kind;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int team_mode_option_set(struct team *team, struct team_gsetter_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	return team_change_mode(team, ctx-&gt;data.str_val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int team_port_en_option_get(struct team *team,</div><div class='add'>+				   struct team_gsetter_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	ctx-&gt;data.bool_val = team_port_enabled(ctx-&gt;port);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int team_port_en_option_set(struct team *team,</div><div class='add'>+				   struct team_gsetter_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	if (ctx-&gt;data.bool_val)</div><div class='add'>+		team_port_enable(team, ctx-&gt;port);</div><div class='add'>+	else</div><div class='add'>+		team_port_disable(team, ctx-&gt;port);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int team_user_linkup_option_get(struct team *team,</div><div class='add'>+				       struct team_gsetter_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	ctx-&gt;data.bool_val = ctx-&gt;port-&gt;user.linkup;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int team_user_linkup_option_set(struct team *team,</div><div class='add'>+				       struct team_gsetter_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	ctx-&gt;port-&gt;user.linkup = ctx-&gt;data.bool_val;</div><div class='add'>+	team_refresh_port_linkup(ctx-&gt;port);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int team_user_linkup_en_option_get(struct team *team,</div><div class='add'>+					  struct team_gsetter_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	const char **str = arg;</div><div class='add'>+	struct team_port *port = ctx-&gt;port;</div><div class='ctx'> </div><div class='del'>-	*str = team-&gt;mode ? team-&gt;mode-&gt;kind : team_no_mode_kind;</div><div class='add'>+	ctx-&gt;data.bool_val = port-&gt;user.linkup_enabled;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int team_mode_option_set(struct team *team, void *arg)</div><div class='add'>+static int team_user_linkup_en_option_set(struct team *team,</div><div class='add'>+					  struct team_gsetter_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	const char **str = arg;</div><div class='add'>+	struct team_port *port = ctx-&gt;port;</div><div class='ctx'> </div><div class='del'>-	return team_change_mode(team, *str);</div><div class='add'>+	port-&gt;user.linkup_enabled = ctx-&gt;data.bool_val;</div><div class='add'>+	team_refresh_port_linkup(ctx-&gt;port);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct team_option team_options[] = {</div><div class='hunk'>@@ -734,6 +962,27 @@ static const struct team_option team_options[] = {</div><div class='ctx'> 		.getter = team_mode_option_get,</div><div class='ctx'> 		.setter = team_mode_option_set,</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.name = "enabled",</div><div class='add'>+		.type = TEAM_OPTION_TYPE_BOOL,</div><div class='add'>+		.per_port = true,</div><div class='add'>+		.getter = team_port_en_option_get,</div><div class='add'>+		.setter = team_port_en_option_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "user_linkup",</div><div class='add'>+		.type = TEAM_OPTION_TYPE_BOOL,</div><div class='add'>+		.per_port = true,</div><div class='add'>+		.getter = team_user_linkup_option_get,</div><div class='add'>+		.setter = team_user_linkup_option_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "user_linkup_enabled",</div><div class='add'>+		.type = TEAM_OPTION_TYPE_BOOL,</div><div class='add'>+		.per_port = true,</div><div class='add'>+		.getter = team_user_linkup_en_option_get,</div><div class='add'>+		.setter = team_user_linkup_en_option_set,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int team_init(struct net_device *dev)</div><div class='hunk'>@@ -750,12 +999,13 @@ static int team_init(struct net_device *dev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; TEAM_PORT_HASHENTRIES; i++)</div><div class='del'>-		INIT_HLIST_HEAD(&amp;team-&gt;port_hlist[i]);</div><div class='add'>+		INIT_HLIST_HEAD(&amp;team-&gt;en_port_hlist[i]);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;team-&gt;port_list);</div><div class='ctx'> </div><div class='ctx'> 	team_adjust_ops(team);</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;team-&gt;option_list);</div><div class='add'>+	INIT_LIST_HEAD(&amp;team-&gt;option_inst_list);</div><div class='ctx'> 	err = team_options_register(team, team_options, ARRAY_SIZE(team_options));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_options_register;</div><div class='hunk'>@@ -1145,10 +1395,7 @@ team_nl_option_policy[TEAM_ATTR_OPTION_MAX + 1] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	[TEAM_ATTR_OPTION_CHANGED]		= { .type = NLA_FLAG },</div><div class='ctx'> 	[TEAM_ATTR_OPTION_TYPE]			= { .type = NLA_U8 },</div><div class='del'>-	[TEAM_ATTR_OPTION_DATA] = {</div><div class='del'>-		.type = NLA_BINARY,</div><div class='del'>-		.len = TEAM_STRING_MAX_LEN,</div><div class='del'>-	},</div><div class='add'>+	[TEAM_ATTR_OPTION_DATA]			= { .type = NLA_BINARY },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int team_nl_cmd_noop(struct sk_buff *skb, struct genl_info *info)</div><div class='hunk'>@@ -1241,46 +1488,86 @@ static int team_nl_fill_options_get(struct sk_buff *skb,</div><div class='ctx'> {</div><div class='ctx'> 	struct nlattr *option_list;</div><div class='ctx'> 	void *hdr;</div><div class='del'>-	struct team_option *option;</div><div class='add'>+	struct team_option_inst *opt_inst;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	hdr = genlmsg_put(skb, pid, seq, &amp;team_nl_family, flags,</div><div class='ctx'> 			  TEAM_CMD_OPTIONS_GET);</div><div class='ctx'> 	if (IS_ERR(hdr))</div><div class='ctx'> 		return PTR_ERR(hdr);</div><div class='ctx'> </div><div class='del'>-	NLA_PUT_U32(skb, TEAM_ATTR_TEAM_IFINDEX, team-&gt;dev-&gt;ifindex);</div><div class='add'>+	if (nla_put_u32(skb, TEAM_ATTR_TEAM_IFINDEX, team-&gt;dev-&gt;ifindex))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	option_list = nla_nest_start(skb, TEAM_ATTR_LIST_OPTION);</div><div class='ctx'> 	if (!option_list)</div><div class='ctx'> 		return -EMSGSIZE;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(option, &amp;team-&gt;option_list, list) {</div><div class='add'>+	list_for_each_entry(opt_inst, &amp;team-&gt;option_inst_list, list) {</div><div class='ctx'> 		struct nlattr *option_item;</div><div class='del'>-		long arg;</div><div class='add'>+		struct team_option *option = opt_inst-&gt;option;</div><div class='add'>+		struct team_gsetter_ctx ctx;</div><div class='ctx'> </div><div class='ctx'> 		/* Include only changed options if fill all mode is not on */</div><div class='del'>-		if (!fillall &amp;&amp; !option-&gt;changed)</div><div class='add'>+		if (!fillall &amp;&amp; !opt_inst-&gt;changed)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		option_item = nla_nest_start(skb, TEAM_ATTR_ITEM_OPTION);</div><div class='ctx'> 		if (!option_item)</div><div class='ctx'> 			goto nla_put_failure;</div><div class='del'>-		NLA_PUT_STRING(skb, TEAM_ATTR_OPTION_NAME, option-&gt;name);</div><div class='del'>-		if (option-&gt;changed) {</div><div class='del'>-			NLA_PUT_FLAG(skb, TEAM_ATTR_OPTION_CHANGED);</div><div class='del'>-			option-&gt;changed = false;</div><div class='add'>+		if (nla_put_string(skb, TEAM_ATTR_OPTION_NAME, option-&gt;name))</div><div class='add'>+			goto nla_put_failure;</div><div class='add'>+		if (opt_inst-&gt;changed) {</div><div class='add'>+			if (nla_put_flag(skb, TEAM_ATTR_OPTION_CHANGED))</div><div class='add'>+				goto nla_put_failure;</div><div class='add'>+			opt_inst-&gt;changed = false;</div><div class='ctx'> 		}</div><div class='del'>-		if (option-&gt;removed)</div><div class='del'>-			NLA_PUT_FLAG(skb, TEAM_ATTR_OPTION_REMOVED);</div><div class='add'>+		if (opt_inst-&gt;removed &amp;&amp;</div><div class='add'>+		    nla_put_flag(skb, TEAM_ATTR_OPTION_REMOVED))</div><div class='add'>+			goto nla_put_failure;</div><div class='add'>+		if (opt_inst-&gt;port &amp;&amp;</div><div class='add'>+		    nla_put_u32(skb, TEAM_ATTR_OPTION_PORT_IFINDEX,</div><div class='add'>+				opt_inst-&gt;port-&gt;dev-&gt;ifindex))</div><div class='add'>+			goto nla_put_failure;</div><div class='add'>+		ctx.port = opt_inst-&gt;port;</div><div class='ctx'> 		switch (option-&gt;type) {</div><div class='ctx'> 		case TEAM_OPTION_TYPE_U32:</div><div class='del'>-			NLA_PUT_U8(skb, TEAM_ATTR_OPTION_TYPE, NLA_U32);</div><div class='del'>-			team_option_get(team, option, &amp;arg);</div><div class='del'>-			NLA_PUT_U32(skb, TEAM_ATTR_OPTION_DATA, arg);</div><div class='add'>+			if (nla_put_u8(skb, TEAM_ATTR_OPTION_TYPE, NLA_U32))</div><div class='add'>+				goto nla_put_failure;</div><div class='add'>+			err = team_option_get(team, opt_inst, &amp;ctx);</div><div class='add'>+			if (err)</div><div class='add'>+				goto errout;</div><div class='add'>+			if (nla_put_u32(skb, TEAM_ATTR_OPTION_DATA,</div><div class='add'>+					ctx.data.u32_val))</div><div class='add'>+				goto nla_put_failure;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case TEAM_OPTION_TYPE_STRING:</div><div class='del'>-			NLA_PUT_U8(skb, TEAM_ATTR_OPTION_TYPE, NLA_STRING);</div><div class='del'>-			team_option_get(team, option, &amp;arg);</div><div class='del'>-			NLA_PUT_STRING(skb, TEAM_ATTR_OPTION_DATA,</div><div class='del'>-				       (char *) arg);</div><div class='add'>+			if (nla_put_u8(skb, TEAM_ATTR_OPTION_TYPE, NLA_STRING))</div><div class='add'>+				goto nla_put_failure;</div><div class='add'>+			err = team_option_get(team, opt_inst, &amp;ctx);</div><div class='add'>+			if (err)</div><div class='add'>+				goto errout;</div><div class='add'>+			if (nla_put_string(skb, TEAM_ATTR_OPTION_DATA,</div><div class='add'>+					   ctx.data.str_val))</div><div class='add'>+				goto nla_put_failure;</div><div class='add'>+			break;</div><div class='add'>+		case TEAM_OPTION_TYPE_BINARY:</div><div class='add'>+			if (nla_put_u8(skb, TEAM_ATTR_OPTION_TYPE, NLA_BINARY))</div><div class='add'>+				goto nla_put_failure;</div><div class='add'>+			err = team_option_get(team, opt_inst, &amp;ctx);</div><div class='add'>+			if (err)</div><div class='add'>+				goto errout;</div><div class='add'>+			if (nla_put(skb, TEAM_ATTR_OPTION_DATA,</div><div class='add'>+				    ctx.data.bin_val.len, ctx.data.bin_val.ptr))</div><div class='add'>+				goto nla_put_failure;</div><div class='add'>+			break;</div><div class='add'>+		case TEAM_OPTION_TYPE_BOOL:</div><div class='add'>+			if (nla_put_u8(skb, TEAM_ATTR_OPTION_TYPE, NLA_FLAG))</div><div class='add'>+				goto nla_put_failure;</div><div class='add'>+			err = team_option_get(team, opt_inst, &amp;ctx);</div><div class='add'>+			if (err)</div><div class='add'>+				goto errout;</div><div class='add'>+			if (ctx.data.bool_val &amp;&amp;</div><div class='add'>+			    nla_put_flag(skb, TEAM_ATTR_OPTION_DATA))</div><div class='add'>+				goto nla_put_failure;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			BUG();</div><div class='hunk'>@@ -1292,8 +1579,10 @@ static int team_nl_fill_options_get(struct sk_buff *skb,</div><div class='ctx'> 	return genlmsg_end(skb, hdr);</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='add'>+	err = -EMSGSIZE;</div><div class='add'>+errout:</div><div class='ctx'> 	genlmsg_cancel(skb, hdr);</div><div class='del'>-	return -EMSGSIZE;</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int team_nl_fill_options_get_all(struct sk_buff *skb,</div><div class='hunk'>@@ -1339,9 +1628,12 @@ static int team_nl_cmd_options_set(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	nla_for_each_nested(nl_option, info-&gt;attrs[TEAM_ATTR_LIST_OPTION], i) {</div><div class='del'>-		struct nlattr *mode_attrs[TEAM_ATTR_OPTION_MAX + 1];</div><div class='add'>+		struct nlattr *opt_attrs[TEAM_ATTR_OPTION_MAX + 1];</div><div class='add'>+		struct nlattr *attr_port_ifindex;</div><div class='add'>+		struct nlattr *attr_data;</div><div class='ctx'> 		enum team_option_type opt_type;</div><div class='del'>-		struct team_option *option;</div><div class='add'>+		int opt_port_ifindex = 0; /* != 0 for per-port options */</div><div class='add'>+		struct team_option_inst *opt_inst;</div><div class='ctx'> 		char *opt_name;</div><div class='ctx'> 		bool opt_found = false;</div><div class='ctx'> </div><div class='hunk'>@@ -1349,48 +1641,78 @@ static int team_nl_cmd_options_set(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> 			err = -EINVAL;</div><div class='ctx'> 			goto team_put;</div><div class='ctx'> 		}</div><div class='del'>-		err = nla_parse_nested(mode_attrs, TEAM_ATTR_OPTION_MAX,</div><div class='add'>+		err = nla_parse_nested(opt_attrs, TEAM_ATTR_OPTION_MAX,</div><div class='ctx'> 				       nl_option, team_nl_option_policy);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto team_put;</div><div class='del'>-		if (!mode_attrs[TEAM_ATTR_OPTION_NAME] ||</div><div class='del'>-		    !mode_attrs[TEAM_ATTR_OPTION_TYPE] ||</div><div class='del'>-		    !mode_attrs[TEAM_ATTR_OPTION_DATA]) {</div><div class='add'>+		if (!opt_attrs[TEAM_ATTR_OPTION_NAME] ||</div><div class='add'>+		    !opt_attrs[TEAM_ATTR_OPTION_TYPE]) {</div><div class='ctx'> 			err = -EINVAL;</div><div class='ctx'> 			goto team_put;</div><div class='ctx'> 		}</div><div class='del'>-		switch (nla_get_u8(mode_attrs[TEAM_ATTR_OPTION_TYPE])) {</div><div class='add'>+		switch (nla_get_u8(opt_attrs[TEAM_ATTR_OPTION_TYPE])) {</div><div class='ctx'> 		case NLA_U32:</div><div class='ctx'> 			opt_type = TEAM_OPTION_TYPE_U32;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case NLA_STRING:</div><div class='ctx'> 			opt_type = TEAM_OPTION_TYPE_STRING;</div><div class='ctx'> 			break;</div><div class='add'>+		case NLA_BINARY:</div><div class='add'>+			opt_type = TEAM_OPTION_TYPE_BINARY;</div><div class='add'>+			break;</div><div class='add'>+		case NLA_FLAG:</div><div class='add'>+			opt_type = TEAM_OPTION_TYPE_BOOL;</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			goto team_put;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		opt_name = nla_data(mode_attrs[TEAM_ATTR_OPTION_NAME]);</div><div class='del'>-		list_for_each_entry(option, &amp;team-&gt;option_list, list) {</div><div class='del'>-			long arg;</div><div class='del'>-			struct nlattr *opt_data_attr;</div><div class='add'>+		attr_data = opt_attrs[TEAM_ATTR_OPTION_DATA];</div><div class='add'>+		if (opt_type != TEAM_OPTION_TYPE_BOOL &amp;&amp; !attr_data) {</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto team_put;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		opt_name = nla_data(opt_attrs[TEAM_ATTR_OPTION_NAME]);</div><div class='add'>+		attr_port_ifindex = opt_attrs[TEAM_ATTR_OPTION_PORT_IFINDEX];</div><div class='add'>+		if (attr_port_ifindex)</div><div class='add'>+			opt_port_ifindex = nla_get_u32(attr_port_ifindex);</div><div class='add'>+</div><div class='add'>+		list_for_each_entry(opt_inst, &amp;team-&gt;option_inst_list, list) {</div><div class='add'>+			struct team_option *option = opt_inst-&gt;option;</div><div class='add'>+			struct team_gsetter_ctx ctx;</div><div class='add'>+			int tmp_ifindex;</div><div class='ctx'> </div><div class='add'>+			tmp_ifindex = opt_inst-&gt;port ?</div><div class='add'>+				      opt_inst-&gt;port-&gt;dev-&gt;ifindex : 0;</div><div class='ctx'> 			if (option-&gt;type != opt_type ||</div><div class='del'>-			    strcmp(option-&gt;name, opt_name))</div><div class='add'>+			    strcmp(option-&gt;name, opt_name) ||</div><div class='add'>+			    tmp_ifindex != opt_port_ifindex)</div><div class='ctx'> 				continue;</div><div class='ctx'> 			opt_found = true;</div><div class='del'>-			opt_data_attr = mode_attrs[TEAM_ATTR_OPTION_DATA];</div><div class='add'>+			ctx.port = opt_inst-&gt;port;</div><div class='ctx'> 			switch (opt_type) {</div><div class='ctx'> 			case TEAM_OPTION_TYPE_U32:</div><div class='del'>-				arg = nla_get_u32(opt_data_attr);</div><div class='add'>+				ctx.data.u32_val = nla_get_u32(attr_data);</div><div class='ctx'> 				break;</div><div class='ctx'> 			case TEAM_OPTION_TYPE_STRING:</div><div class='del'>-				arg = (long) nla_data(opt_data_attr);</div><div class='add'>+				if (nla_len(attr_data) &gt; TEAM_STRING_MAX_LEN) {</div><div class='add'>+					err = -EINVAL;</div><div class='add'>+					goto team_put;</div><div class='add'>+				}</div><div class='add'>+				ctx.data.str_val = nla_data(attr_data);</div><div class='add'>+				break;</div><div class='add'>+			case TEAM_OPTION_TYPE_BINARY:</div><div class='add'>+				ctx.data.bin_val.len = nla_len(attr_data);</div><div class='add'>+				ctx.data.bin_val.ptr = nla_data(attr_data);</div><div class='add'>+				break;</div><div class='add'>+			case TEAM_OPTION_TYPE_BOOL:</div><div class='add'>+				ctx.data.bool_val = attr_data ? true : false;</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='ctx'> 				BUG();</div><div class='ctx'> 			}</div><div class='del'>-			err = team_option_set(team, option, &amp;arg);</div><div class='add'>+			err = team_option_set(team, opt_inst, &amp;ctx);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				goto team_put;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1420,7 +1742,8 @@ static int team_nl_fill_port_list_get(struct sk_buff *skb,</div><div class='ctx'> 	if (IS_ERR(hdr))</div><div class='ctx'> 		return PTR_ERR(hdr);</div><div class='ctx'> </div><div class='del'>-	NLA_PUT_U32(skb, TEAM_ATTR_TEAM_IFINDEX, team-&gt;dev-&gt;ifindex);</div><div class='add'>+	if (nla_put_u32(skb, TEAM_ATTR_TEAM_IFINDEX, team-&gt;dev-&gt;ifindex))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	port_list = nla_nest_start(skb, TEAM_ATTR_LIST_PORT);</div><div class='ctx'> 	if (!port_list)</div><div class='ctx'> 		return -EMSGSIZE;</div><div class='hunk'>@@ -1434,17 +1757,20 @@ static int team_nl_fill_port_list_get(struct sk_buff *skb,</div><div class='ctx'> 		port_item = nla_nest_start(skb, TEAM_ATTR_ITEM_PORT);</div><div class='ctx'> 		if (!port_item)</div><div class='ctx'> 			goto nla_put_failure;</div><div class='del'>-		NLA_PUT_U32(skb, TEAM_ATTR_PORT_IFINDEX, port-&gt;dev-&gt;ifindex);</div><div class='add'>+		if (nla_put_u32(skb, TEAM_ATTR_PORT_IFINDEX, port-&gt;dev-&gt;ifindex))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		if (port-&gt;changed) {</div><div class='del'>-			NLA_PUT_FLAG(skb, TEAM_ATTR_PORT_CHANGED);</div><div class='add'>+			if (nla_put_flag(skb, TEAM_ATTR_PORT_CHANGED))</div><div class='add'>+				goto nla_put_failure;</div><div class='ctx'> 			port-&gt;changed = false;</div><div class='ctx'> 		}</div><div class='del'>-		if (port-&gt;removed)</div><div class='del'>-			NLA_PUT_FLAG(skb, TEAM_ATTR_PORT_REMOVED);</div><div class='del'>-		if (port-&gt;linkup)</div><div class='del'>-			NLA_PUT_FLAG(skb, TEAM_ATTR_PORT_LINKUP);</div><div class='del'>-		NLA_PUT_U32(skb, TEAM_ATTR_PORT_SPEED, port-&gt;speed);</div><div class='del'>-		NLA_PUT_U8(skb, TEAM_ATTR_PORT_DUPLEX, port-&gt;duplex);</div><div class='add'>+		if ((port-&gt;removed &amp;&amp;</div><div class='add'>+		     nla_put_flag(skb, TEAM_ATTR_PORT_REMOVED)) ||</div><div class='add'>+		    (port-&gt;state.linkup &amp;&amp;</div><div class='add'>+		     nla_put_flag(skb, TEAM_ATTR_PORT_LINKUP)) ||</div><div class='add'>+		    nla_put_u32(skb, TEAM_ATTR_PORT_SPEED, port-&gt;state.speed) ||</div><div class='add'>+		    nla_put_u8(skb, TEAM_ATTR_PORT_DUPLEX, port-&gt;state.duplex))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		nla_nest_end(skb, port_item);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1603,23 +1929,24 @@ static void __team_port_change_check(struct team_port *port, bool linkup)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (!port-&gt;removed &amp;&amp; port-&gt;linkup == linkup)</div><div class='add'>+	if (!port-&gt;removed &amp;&amp; port-&gt;state.linkup == linkup)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	port-&gt;changed = true;</div><div class='del'>-	port-&gt;linkup = linkup;</div><div class='add'>+	port-&gt;state.linkup = linkup;</div><div class='add'>+	team_refresh_port_linkup(port);</div><div class='ctx'> 	if (linkup) {</div><div class='ctx'> 		struct ethtool_cmd ecmd;</div><div class='ctx'> </div><div class='ctx'> 		err = __ethtool_get_settings(port-&gt;dev, &amp;ecmd);</div><div class='ctx'> 		if (!err) {</div><div class='del'>-			port-&gt;speed = ethtool_cmd_speed(&amp;ecmd);</div><div class='del'>-			port-&gt;duplex = ecmd.duplex;</div><div class='add'>+			port-&gt;state.speed = ethtool_cmd_speed(&amp;ecmd);</div><div class='add'>+			port-&gt;state.duplex = ecmd.duplex;</div><div class='ctx'> 			goto send_event;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	port-&gt;speed = 0;</div><div class='del'>-	port-&gt;duplex = 0;</div><div class='add'>+	port-&gt;state.speed = 0;</div><div class='add'>+	port-&gt;state.duplex = 0;</div><div class='ctx'> </div><div class='ctx'> send_event:</div><div class='ctx'> 	err = team_nl_send_event_port_list_get(port-&gt;team);</div><div class='head'>diff --git a/drivers/net/team/team_mode_activebackup.c b/drivers/net/team/team_mode_activebackup.c<br/>index f4d960e82e29..fd6bd03aaa89 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/team/team_mode_activebackup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/team/team_mode_activebackup.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/team/team_mode_activebackup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/team/team_mode_activebackup.c</a></div><div class='hunk'>@@ -59,23 +59,21 @@ static void ab_port_leave(struct team *team, struct team_port *port)</div><div class='ctx'> 		RCU_INIT_POINTER(ab_priv(team)-&gt;active_port, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ab_active_port_get(struct team *team, void *arg)</div><div class='add'>+static int ab_active_port_get(struct team *team, struct team_gsetter_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	u32 *ifindex = arg;</div><div class='del'>-</div><div class='del'>-	*ifindex = 0;</div><div class='ctx'> 	if (ab_priv(team)-&gt;active_port)</div><div class='del'>-		*ifindex = ab_priv(team)-&gt;active_port-&gt;dev-&gt;ifindex;</div><div class='add'>+		ctx-&gt;data.u32_val = ab_priv(team)-&gt;active_port-&gt;dev-&gt;ifindex;</div><div class='add'>+	else</div><div class='add'>+		ctx-&gt;data.u32_val = 0;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ab_active_port_set(struct team *team, void *arg)</div><div class='add'>+static int ab_active_port_set(struct team *team, struct team_gsetter_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	u32 *ifindex = arg;</div><div class='ctx'> 	struct team_port *port;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry_rcu(port, &amp;team-&gt;port_list, list) {</div><div class='del'>-		if (port-&gt;dev-&gt;ifindex == *ifindex) {</div><div class='add'>+	list_for_each_entry(port, &amp;team-&gt;port_list, list) {</div><div class='add'>+		if (port-&gt;dev-&gt;ifindex == ctx-&gt;data.u32_val) {</div><div class='ctx'> 			rcu_assign_pointer(ab_priv(team)-&gt;active_port, port);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -92,12 +90,12 @@ static const struct team_option ab_options[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int ab_init(struct team *team)</div><div class='add'>+static int ab_init(struct team *team)</div><div class='ctx'> {</div><div class='ctx'> 	return team_options_register(team, ab_options, ARRAY_SIZE(ab_options));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ab_exit(struct team *team)</div><div class='add'>+static void ab_exit(struct team *team)</div><div class='ctx'> {</div><div class='ctx'> 	team_options_unregister(team, ab_options, ARRAY_SIZE(ab_options));</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/team/team_mode_loadbalance.c b/drivers/net/team/team_mode_loadbalance.c<br/>new file mode 100644<br/>index 000000000000..86e8183c8e3d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/team/team_mode_loadbalance.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/team/team_mode_loadbalance.c</a></div><div class='hunk'>@@ -0,0 +1,174 @@</div><div class='add'>+/*</div><div class='add'>+ * drivers/net/team/team_mode_loadbalance.c - Load-balancing mode for team</div><div class='add'>+ * Copyright (c) 2012 Jiri Pirko &lt;jpirko@redhat.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/filter.h&gt;</div><div class='add'>+#include &lt;linux/if_team.h&gt;</div><div class='add'>+</div><div class='add'>+struct lb_priv {</div><div class='add'>+	struct sk_filter __rcu *fp;</div><div class='add'>+	struct sock_fprog *orig_fprog;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct lb_priv *lb_priv(struct team *team)</div><div class='add'>+{</div><div class='add'>+	return (struct lb_priv *) &amp;team-&gt;mode_priv;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool lb_transmit(struct team *team, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct sk_filter *fp;</div><div class='add'>+	struct team_port *port;</div><div class='add'>+	unsigned int hash;</div><div class='add'>+	int port_index;</div><div class='add'>+</div><div class='add'>+	fp = rcu_dereference(lb_priv(team)-&gt;fp);</div><div class='add'>+	if (unlikely(!fp))</div><div class='add'>+		goto drop;</div><div class='add'>+	hash = SK_RUN_FILTER(fp, skb);</div><div class='add'>+	port_index = hash % team-&gt;en_port_count;</div><div class='add'>+	port = team_get_port_by_index_rcu(team, port_index);</div><div class='add'>+	if (unlikely(!port))</div><div class='add'>+		goto drop;</div><div class='add'>+	skb-&gt;dev = port-&gt;dev;</div><div class='add'>+	if (dev_queue_xmit(skb))</div><div class='add'>+		return false;</div><div class='add'>+	return true;</div><div class='add'>+</div><div class='add'>+drop:</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lb_bpf_func_get(struct team *team, struct team_gsetter_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	if (!lb_priv(team)-&gt;orig_fprog) {</div><div class='add'>+		ctx-&gt;data.bin_val.len = 0;</div><div class='add'>+		ctx-&gt;data.bin_val.ptr = NULL;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	ctx-&gt;data.bin_val.len = lb_priv(team)-&gt;orig_fprog-&gt;len *</div><div class='add'>+				sizeof(struct sock_filter);</div><div class='add'>+	ctx-&gt;data.bin_val.ptr = lb_priv(team)-&gt;orig_fprog-&gt;filter;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __fprog_create(struct sock_fprog **pfprog, u32 data_len,</div><div class='add'>+			  const void *data)</div><div class='add'>+{</div><div class='add'>+	struct sock_fprog *fprog;</div><div class='add'>+	struct sock_filter *filter = (struct sock_filter *) data;</div><div class='add'>+</div><div class='add'>+	if (data_len % sizeof(struct sock_filter))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	fprog = kmalloc(sizeof(struct sock_fprog), GFP_KERNEL);</div><div class='add'>+	if (!fprog)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	fprog-&gt;filter = kmemdup(filter, data_len, GFP_KERNEL);</div><div class='add'>+	if (!fprog-&gt;filter) {</div><div class='add'>+		kfree(fprog);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	fprog-&gt;len = data_len / sizeof(struct sock_filter);</div><div class='add'>+	*pfprog = fprog;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __fprog_destroy(struct sock_fprog *fprog)</div><div class='add'>+{</div><div class='add'>+	kfree(fprog-&gt;filter);</div><div class='add'>+	kfree(fprog);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lb_bpf_func_set(struct team *team, struct team_gsetter_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	struct sk_filter *fp = NULL;</div><div class='add'>+	struct sock_fprog *fprog = NULL;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;data.bin_val.len) {</div><div class='add'>+		err = __fprog_create(&amp;fprog, ctx-&gt;data.bin_val.len,</div><div class='add'>+				     ctx-&gt;data.bin_val.ptr);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		err = sk_unattached_filter_create(&amp;fp, fprog);</div><div class='add'>+		if (err) {</div><div class='add'>+			__fprog_destroy(fprog);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (lb_priv(team)-&gt;orig_fprog) {</div><div class='add'>+		/* Clear old filter data */</div><div class='add'>+		__fprog_destroy(lb_priv(team)-&gt;orig_fprog);</div><div class='add'>+		sk_unattached_filter_destroy(lb_priv(team)-&gt;fp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcu_assign_pointer(lb_priv(team)-&gt;fp, fp);</div><div class='add'>+	lb_priv(team)-&gt;orig_fprog = fprog;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct team_option lb_options[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "bpf_hash_func",</div><div class='add'>+		.type = TEAM_OPTION_TYPE_BINARY,</div><div class='add'>+		.getter = lb_bpf_func_get,</div><div class='add'>+		.setter = lb_bpf_func_set,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int lb_init(struct team *team)</div><div class='add'>+{</div><div class='add'>+	return team_options_register(team, lb_options,</div><div class='add'>+				     ARRAY_SIZE(lb_options));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lb_exit(struct team *team)</div><div class='add'>+{</div><div class='add'>+	team_options_unregister(team, lb_options,</div><div class='add'>+				ARRAY_SIZE(lb_options));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct team_mode_ops lb_mode_ops = {</div><div class='add'>+	.init			= lb_init,</div><div class='add'>+	.exit			= lb_exit,</div><div class='add'>+	.transmit		= lb_transmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct team_mode lb_mode = {</div><div class='add'>+	.kind		= "loadbalance",</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+	.priv_size	= sizeof(struct lb_priv),</div><div class='add'>+	.ops		= &amp;lb_mode_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init lb_init_module(void)</div><div class='add'>+{</div><div class='add'>+	return team_mode_register(&amp;lb_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit lb_cleanup_module(void)</div><div class='add'>+{</div><div class='add'>+	team_mode_unregister(&amp;lb_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(lb_init_module);</div><div class='add'>+module_exit(lb_cleanup_module);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_AUTHOR("Jiri Pirko &lt;jpirko@redhat.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Load-balancing mode for team");</div><div class='add'>+MODULE_ALIAS("team-mode-loadbalance");</div><div class='head'>diff --git a/drivers/net/team/team_mode_roundrobin.c b/drivers/net/team/team_mode_roundrobin.c<br/>index a0e8f806331a..6abfbdc96be5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/team/team_mode_roundrobin.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/team/team_mode_roundrobin.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/team/team_mode_roundrobin.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/team/team_mode_roundrobin.c</a></div><div class='hunk'>@@ -50,7 +50,7 @@ static bool rr_transmit(struct team *team, struct sk_buff *skb)</div><div class='ctx'> 	struct team_port *port;</div><div class='ctx'> 	int port_index;</div><div class='ctx'> </div><div class='del'>-	port_index = rr_priv(team)-&gt;sent_packets++ % team-&gt;port_count;</div><div class='add'>+	port_index = rr_priv(team)-&gt;sent_packets++ % team-&gt;en_port_count;</div><div class='ctx'> 	port = team_get_port_by_index_rcu(team, port_index);</div><div class='ctx'> 	port = __get_first_port_up(team, port);</div><div class='ctx'> 	if (unlikely(!port))</div><div class='head'>diff --git a/drivers/net/tokenring/3c359.c b/drivers/net/tokenring/3c359.c<br/>deleted file mode 100644<br/>index b15ac81d46fa..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/3c359.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/3c359.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1843 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *   3c359.c (c) 2000 Mike Phillips (mikep@linuxtr.net) All Rights Reserved</div><div class='del'>- *</div><div class='del'>- *  Linux driver for 3Com 3c359 Tokenlink Velocity XL PCI NIC</div><div class='del'>- *</div><div class='del'>- *  Base Driver Olympic:</div><div class='del'>- *	Written 1999 Peter De Schrijver &amp; Mike Phillips</div><div class='del'>- *</div><div class='del'>- *  This software may be used and distributed according to the terms</div><div class='del'>- *  of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- * </div><div class='del'>- *  7/17/00 - Clean up, version number 0.9.0. Ready to release to the world.</div><div class='del'>- *</div><div class='del'>- *  2/16/01 - Port up to kernel 2.4.2 ready for submission into the kernel.</div><div class='del'>- *  3/05/01 - Last clean up stuff before submission.</div><div class='del'>- *  2/15/01 - Finally, update to new pci api. </div><div class='del'>- *</div><div class='del'>- *  To Do:</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* </div><div class='del'>- *	Technical Card Details</div><div class='del'>- *</div><div class='del'>- *  All access to data is done with 16/8 bit transfers.  The transfer</div><div class='del'>- *  method really sucks. You can only read or write one location at a time.</div><div class='del'>- *</div><div class='del'>- *  Also, the microcode for the card must be uploaded if the card does not have</div><div class='del'>- *  the flashrom on board.  This is a 28K bloat in the driver when compiled</div><div class='del'>- *  as a module.</div><div class='del'>- *</div><div class='del'>- *  Rx is very simple, status into a ring of descriptors, dma data transfer,</div><div class='del'>- *  interrupts to tell us when a packet is received.</div><div class='del'>- *</div><div class='del'>- *  Tx is a little more interesting. Similar scenario, descriptor and dma data</div><div class='del'>- *  transfers, but we don't have to interrupt the card to tell it another packet</div><div class='del'>- *  is ready for transmission, we are just doing simple memory writes, not io or mmio</div><div class='del'>- *  writes.  The card can be set up to simply poll on the next</div><div class='del'>- *  descriptor pointer and when this value is non-zero will automatically download</div><div class='del'>- *  the next packet.  The card then interrupts us when the packet is done.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define XL_DEBUG 0</div><div class='del'>-</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/timer.h&gt;</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/proc_fs.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='del'>-#include &lt;linux/stddef.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/firmware.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;net/checksum.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include "3c359.h"</div><div class='del'>-</div><div class='del'>-static char version[] __devinitdata  = </div><div class='del'>-"3c359.c v1.2.0 2/17/01 - Mike Phillips (mikep@linuxtr.net)" ; </div><div class='del'>-</div><div class='del'>-#define FW_NAME		"3com/3C359.bin"</div><div class='del'>-MODULE_AUTHOR("Mike Phillips &lt;mikep@linuxtr.net&gt;") ; </div><div class='del'>-MODULE_DESCRIPTION("3Com 3C359 Velocity XL Token Ring Adapter Driver\n") ;</div><div class='del'>-MODULE_FIRMWARE(FW_NAME);</div><div class='del'>-</div><div class='del'>-/* Module parameters */</div><div class='del'>-</div><div class='del'>-/* Ring Speed 0,4,16 </div><div class='del'>- * 0 = Autosense   </div><div class='del'>- * 4,16 = Selected speed only, no autosense</div><div class='del'>- * This allows the card to be the first on the ring</div><div class='del'>- * and become the active monitor.</div><div class='del'>- *</div><div class='del'>- * WARNING: Some hubs will allow you to insert</div><div class='del'>- * at the wrong speed.</div><div class='del'>- * </div><div class='del'>- * The adapter will _not_ fail to open if there are no</div><div class='del'>- * active monitors on the ring, it will simply open up in </div><div class='del'>- * its last known ringspeed if no ringspeed is specified.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int ringspeed[XL_MAX_ADAPTERS] = {0,} ;</div><div class='del'>-</div><div class='del'>-module_param_array(ringspeed, int, NULL, 0);</div><div class='del'>-MODULE_PARM_DESC(ringspeed,"3c359: Ringspeed selection - 4,16 or 0") ;</div><div class='del'>-</div><div class='del'>-/* Packet buffer size */</div><div class='del'>-</div><div class='del'>-static int pkt_buf_sz[XL_MAX_ADAPTERS] = {0,} ;</div><div class='del'>- </div><div class='del'>-module_param_array(pkt_buf_sz, int, NULL, 0) ;</div><div class='del'>-MODULE_PARM_DESC(pkt_buf_sz,"3c359: Initial buffer size") ;</div><div class='del'>-/* Message Level */</div><div class='del'>-</div><div class='del'>-static int message_level[XL_MAX_ADAPTERS] = {0,} ;</div><div class='del'>-</div><div class='del'>-module_param_array(message_level, int, NULL, 0) ;</div><div class='del'>-MODULE_PARM_DESC(message_level, "3c359: Level of reported messages") ;</div><div class='del'>-/* </div><div class='del'>- *	This is a real nasty way of doing this, but otherwise you</div><div class='del'>- *	will be stuck with 1555 lines of hex #'s in the code.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static DEFINE_PCI_DEVICE_TABLE(xl_pci_tbl) =</div><div class='del'>-{</div><div class='del'>-	{PCI_VENDOR_ID_3COM,PCI_DEVICE_ID_3COM_3C359, PCI_ANY_ID, PCI_ANY_ID, },</div><div class='del'>-	{ }			/* terminate list */</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(pci,xl_pci_tbl) ; </div><div class='del'>-</div><div class='del'>-static int xl_init(struct net_device *dev);</div><div class='del'>-static int xl_open(struct net_device *dev);</div><div class='del'>-static int xl_open_hw(struct net_device *dev) ;  </div><div class='del'>-static int xl_hw_reset(struct net_device *dev); </div><div class='del'>-static netdev_tx_t xl_xmit(struct sk_buff *skb, struct net_device *dev);</div><div class='del'>-static void xl_dn_comp(struct net_device *dev); </div><div class='del'>-static int xl_close(struct net_device *dev);</div><div class='del'>-static void xl_set_rx_mode(struct net_device *dev);</div><div class='del'>-static irqreturn_t xl_interrupt(int irq, void *dev_id);</div><div class='del'>-static int xl_set_mac_address(struct net_device *dev, void *addr) ; </div><div class='del'>-static void xl_arb_cmd(struct net_device *dev);</div><div class='del'>-static void xl_asb_cmd(struct net_device *dev) ; </div><div class='del'>-static void xl_srb_cmd(struct net_device *dev, int srb_cmd) ; </div><div class='del'>-static void xl_wait_misr_flags(struct net_device *dev) ; </div><div class='del'>-static int xl_change_mtu(struct net_device *dev, int mtu);</div><div class='del'>-static void xl_srb_bh(struct net_device *dev) ; </div><div class='del'>-static void xl_asb_bh(struct net_device *dev) ; </div><div class='del'>-static void xl_reset(struct net_device *dev) ;  </div><div class='del'>-static void xl_freemem(struct net_device *dev) ;  </div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* EEProm Access Functions */</div><div class='del'>-static u16  xl_ee_read(struct net_device *dev, int ee_addr) ; </div><div class='del'>-static void  xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) ; </div><div class='del'>-</div><div class='del'>-/* Debugging functions */</div><div class='del'>-#if XL_DEBUG</div><div class='del'>-static void print_tx_state(struct net_device *dev) ; </div><div class='del'>-static void print_rx_state(struct net_device *dev) ; </div><div class='del'>-</div><div class='del'>-static void print_tx_state(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	struct xl_tx_desc *txd ; </div><div class='del'>-	u8 __iomem *xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	int i ; </div><div class='del'>-</div><div class='del'>-	printk("tx_ring_head: %d, tx_ring_tail: %d, free_ent: %d\n",xl_priv-&gt;tx_ring_head,</div><div class='del'>-		xl_priv-&gt;tx_ring_tail, xl_priv-&gt;free_ring_entries) ; </div><div class='del'>-	printk("Ring    , Address ,   FSH  , DnNextPtr, Buffer, Buffer_Len\n");</div><div class='del'>-	for (i = 0; i &lt; 16; i++) {</div><div class='del'>-		txd = &amp;(xl_priv-&gt;xl_tx_ring[i]) ; </div><div class='del'>-		printk("%d, %08lx, %08x, %08x, %08x, %08x\n", i, virt_to_bus(txd),</div><div class='del'>-			txd-&gt;framestartheader, txd-&gt;dnnextptr, txd-&gt;buffer, txd-&gt;buffer_length ) ; </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk("DNLISTPTR = %04x\n", readl(xl_mmio + MMIO_DNLISTPTR) );</div><div class='del'>-	</div><div class='del'>-	printk("DmaCtl = %04x\n", readl(xl_mmio + MMIO_DMA_CTRL) );</div><div class='del'>-	printk("Queue status = %0x\n",netif_running(dev) ) ;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void print_rx_state(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	struct xl_rx_desc *rxd ; </div><div class='del'>-	u8 __iomem *xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	int i ; </div><div class='del'>-</div><div class='del'>-	printk("rx_ring_tail: %d\n", xl_priv-&gt;rx_ring_tail);</div><div class='del'>-	printk("Ring    , Address ,   FrameState  , UPNextPtr, FragAddr, Frag_Len\n");</div><div class='del'>-	for (i = 0; i &lt; 16; i++) { </div><div class='del'>-		/* rxd = (struct xl_rx_desc *)xl_priv-&gt;rx_ring_dma_addr + (i * sizeof(struct xl_rx_desc)) ; */</div><div class='del'>-		rxd = &amp;(xl_priv-&gt;xl_rx_ring[i]) ; </div><div class='del'>-		printk("%d, %08lx, %08x, %08x, %08x, %08x\n", i, virt_to_bus(rxd),</div><div class='del'>-			rxd-&gt;framestatus, rxd-&gt;upnextptr, rxd-&gt;upfragaddr, rxd-&gt;upfraglen ) ; </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk("UPLISTPTR = %04x\n", readl(xl_mmio + MMIO_UPLISTPTR));</div><div class='del'>-	</div><div class='del'>-	printk("DmaCtl = %04x\n", readl(xl_mmio + MMIO_DMA_CTRL));</div><div class='del'>-	printk("Queue status = %0x\n",netif_running(dev));</div><div class='del'>-} </div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	Read values from the on-board EEProm.  This looks very strange</div><div class='del'>- *	but you have to wait for the EEProm to get/set the value before </div><div class='del'>- *	passing/getting the next value from the nic. As with all requests</div><div class='del'>- *	on this nic it has to be done in two stages, a) tell the nic which</div><div class='del'>- *	memory address you want to access and b) pass/get the value from the nic.</div><div class='del'>- *	With the EEProm, you have to wait before and between access a) and b).</div><div class='del'>- *	As this is only read at initialization time and the wait period is very </div><div class='del'>- *	small we shouldn't have to worry about scheduling issues.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static u16 xl_ee_read(struct net_device *dev, int ee_addr)</div><div class='del'>-{ </div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	u8 __iomem *xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-</div><div class='del'>-	/* Wait for EEProm to not be busy */</div><div class='del'>-	writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	while ( readw(xl_mmio + MMIO_MACDATA) &amp; EEBUSY ) ;</div><div class='del'>-</div><div class='del'>-	/* Tell EEProm what we want to do and where */</div><div class='del'>-	writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-	/* Wait for EEProm to not be busy */</div><div class='del'>-	writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	while ( readw(xl_mmio + MMIO_MACDATA) &amp; EEBUSY ) ; </div><div class='del'>-	</div><div class='del'>-	/* Tell EEProm what we want to do and where */</div><div class='del'>-	writel(IO_WORD_WRITE | EECONTROL , xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-	/* Finally read the value from the EEProm */</div><div class='del'>-	writel(IO_WORD_READ | EEDATA , xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	return readw(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* </div><div class='del'>- *	Write values to the onboard eeprom. As with eeprom read you need to </div><div class='del'>- *	set which location to write, wait, value to write, wait, with the </div><div class='del'>- *	added twist of having to enable eeprom writes as well.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void  xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	u8 __iomem *xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-</div><div class='del'>-	/* Wait for EEProm to not be busy */</div><div class='del'>-	writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	while ( readw(xl_mmio + MMIO_MACDATA) &amp; EEBUSY ) ;</div><div class='del'>-	</div><div class='del'>-	/* Enable write/erase */</div><div class='del'>-	writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writew(EE_ENABLE_WRITE, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-	/* Wait for EEProm to not be busy */</div><div class='del'>-	writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	while ( readw(xl_mmio + MMIO_MACDATA) &amp; EEBUSY ) ;</div><div class='del'>-</div><div class='del'>-	/* Put the value we want to write into EEDATA */ </div><div class='del'>-	writel(IO_WORD_WRITE | EEDATA, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writew(ee_value, xl_mmio + MMIO_MACDATA) ;</div><div class='del'>-</div><div class='del'>-	/* Tell EEProm to write eevalue into ee_addr */</div><div class='del'>-	writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writew(EEWRITE + ee_addr, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-	/* Wait for EEProm to not be busy, to ensure write gets done */</div><div class='del'>-	writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	while ( readw(xl_mmio + MMIO_MACDATA) &amp; EEBUSY ) ;</div><div class='del'>-	</div><div class='del'>-	return ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops xl_netdev_ops = {</div><div class='del'>-	.ndo_open		= xl_open,</div><div class='del'>-	.ndo_stop		= xl_close,</div><div class='del'>-	.ndo_start_xmit		= xl_xmit,</div><div class='del'>-	.ndo_change_mtu		= xl_change_mtu,</div><div class='del'>-	.ndo_set_rx_mode	= xl_set_rx_mode,</div><div class='del'>-	.ndo_set_mac_address	= xl_set_mac_address,</div><div class='del'>-};</div><div class='del'>- </div><div class='del'>-static int __devinit xl_probe(struct pci_dev *pdev,</div><div class='del'>-			      const struct pci_device_id *ent) </div><div class='del'>-{</div><div class='del'>-	struct net_device *dev ; </div><div class='del'>-	struct xl_private *xl_priv ; </div><div class='del'>-	static int card_no = -1 ;</div><div class='del'>-	int i ; </div><div class='del'>-</div><div class='del'>-	card_no++ ; </div><div class='del'>-</div><div class='del'>-	if (pci_enable_device(pdev)) { </div><div class='del'>-		return -ENODEV ; </div><div class='del'>-	} </div><div class='del'>-</div><div class='del'>-	pci_set_master(pdev);</div><div class='del'>-</div><div class='del'>-	if ((i = pci_request_regions(pdev,"3c359"))) { </div><div class='del'>-		return i ; </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* </div><div class='del'>-	 * Allowing init_trdev to allocate the private data will align</div><div class='del'>-	 * xl_private on a 32 bytes boundary which we need for the rx/tx</div><div class='del'>-	 * descriptors</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	dev = alloc_trdev(sizeof(struct xl_private)) ; </div><div class='del'>-	if (!dev) { </div><div class='del'>-		pci_release_regions(pdev) ; </div><div class='del'>-		return -ENOMEM ; </div><div class='del'>-	} </div><div class='del'>-	xl_priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-#if XL_DEBUG  </div><div class='del'>-	printk("pci_device: %p, dev:%p, dev-&gt;priv: %p, ba[0]: %10x, ba[1]:%10x\n", </div><div class='del'>-		pdev, dev, netdev_priv(dev), (unsigned int)pdev-&gt;resource[0].start, (unsigned int)pdev-&gt;resource[1].start);</div><div class='del'>-#endif </div><div class='del'>-</div><div class='del'>-	dev-&gt;irq=pdev-&gt;irq;</div><div class='del'>-	dev-&gt;base_addr=pci_resource_start(pdev,0) ; </div><div class='del'>-	xl_priv-&gt;xl_card_name = pci_name(pdev);</div><div class='del'>-	xl_priv-&gt;xl_mmio=ioremap(pci_resource_start(pdev,1), XL_IO_SPACE);</div><div class='del'>-	xl_priv-&gt;pdev = pdev ; </div><div class='del'>-		</div><div class='del'>-	if ((pkt_buf_sz[card_no] &lt; 100) || (pkt_buf_sz[card_no] &gt; 18000) )</div><div class='del'>-		xl_priv-&gt;pkt_buf_sz = PKT_BUF_SZ ; </div><div class='del'>-	else</div><div class='del'>-		xl_priv-&gt;pkt_buf_sz = pkt_buf_sz[card_no] ; </div><div class='del'>-</div><div class='del'>-	dev-&gt;mtu = xl_priv-&gt;pkt_buf_sz - TR_HLEN ; </div><div class='del'>-	xl_priv-&gt;xl_ring_speed = ringspeed[card_no] ; </div><div class='del'>-	xl_priv-&gt;xl_message_level = message_level[card_no] ; </div><div class='del'>-	xl_priv-&gt;xl_functional_addr[0] = xl_priv-&gt;xl_functional_addr[1] = xl_priv-&gt;xl_functional_addr[2] = xl_priv-&gt;xl_functional_addr[3] = 0 ; </div><div class='del'>-	xl_priv-&gt;xl_copy_all_options = 0 ; </div><div class='del'>-		</div><div class='del'>-	if((i = xl_init(dev))) {</div><div class='del'>-		iounmap(xl_priv-&gt;xl_mmio) ; </div><div class='del'>-		free_netdev(dev) ; </div><div class='del'>-		pci_release_regions(pdev) ; </div><div class='del'>-		return i ; </div><div class='del'>-	}				</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;xl_netdev_ops;</div><div class='del'>-	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	pci_set_drvdata(pdev,dev) ; </div><div class='del'>-	if ((i = register_netdev(dev))) { </div><div class='del'>-		printk(KERN_ERR "3C359, register netdev failed\n") ;  </div><div class='del'>-		pci_set_drvdata(pdev,NULL) ; </div><div class='del'>-		iounmap(xl_priv-&gt;xl_mmio) ; </div><div class='del'>-		free_netdev(dev) ; </div><div class='del'>-		pci_release_regions(pdev) ; </div><div class='del'>-		return i ; </div><div class='del'>-	}</div><div class='del'>-   </div><div class='del'>-	printk(KERN_INFO "3C359: %s registered as: %s\n",xl_priv-&gt;xl_card_name,dev-&gt;name) ; </div><div class='del'>-</div><div class='del'>-	return 0; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xl_init_firmware(struct xl_private *xl_priv)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = request_firmware(&amp;xl_priv-&gt;fw, FW_NAME, &amp;xl_priv-&gt;pdev-&gt;dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		printk(KERN_ERR "Failed to load firmware \"%s\"\n", FW_NAME);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (xl_priv-&gt;fw-&gt;size &lt; 16) {</div><div class='del'>-		printk(KERN_ERR "Bogus length %zu in \"%s\"\n",</div><div class='del'>-		       xl_priv-&gt;fw-&gt;size, FW_NAME);</div><div class='del'>-		release_firmware(xl_priv-&gt;fw);</div><div class='del'>-		err = -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __devinit xl_init(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "%s\n", version);</div><div class='del'>-	printk(KERN_INFO "%s: I/O at %hx, MMIO at %p, using irq %d\n",</div><div class='del'>-		xl_priv-&gt;xl_card_name, (unsigned int)dev-&gt;base_addr ,xl_priv-&gt;xl_mmio, dev-&gt;irq);</div><div class='del'>-</div><div class='del'>-	spin_lock_init(&amp;xl_priv-&gt;xl_lock) ; </div><div class='del'>-</div><div class='del'>-	err = xl_init_firmware(xl_priv);</div><div class='del'>-	if (err == 0)</div><div class='del'>-		err = xl_hw_reset(dev);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* </div><div class='del'>- *	Hardware reset.  This needs to be a separate entity as we need to reset the card</div><div class='del'>- *	when we change the EEProm settings.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int xl_hw_reset(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	u8 __iomem *xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	unsigned long t ; </div><div class='del'>-	u16 i ; </div><div class='del'>-    	u16 result_16 ; </div><div class='del'>-	u8 result_8 ;</div><div class='del'>-	u16 start ; </div><div class='del'>-	int j ;</div><div class='del'>-</div><div class='del'>-	if (xl_priv-&gt;fw == NULL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *  Reset the card.  If the card has got the microcode on board, we have </div><div class='del'>-         *  missed the initialization interrupt, so we must always do this.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ; </div><div class='del'>-</div><div class='del'>-	/* </div><div class='del'>-	 * Must wait for cmdInProgress bit (12) to clear before continuing with</div><div class='del'>-	 * card configuration.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	t=jiffies;</div><div class='del'>-	while (readw(xl_mmio + MMIO_INTSTATUS) &amp; INTSTAT_CMD_IN_PROGRESS) { </div><div class='del'>-		schedule();		</div><div class='del'>-		if (time_after(jiffies, t + 40 * HZ)) {</div><div class='del'>-			printk(KERN_ERR "%s: 3COM 3C359 Velocity XL  card not responding to global reset.\n", dev-&gt;name);</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *  Enable pmbar by setting bit in CPAttention</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;</div><div class='del'>-	result_8 = readb(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	result_8 = result_8 | CPA_PMBARVIS ; </div><div class='del'>-	writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writeb(result_8, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	</div><div class='del'>-	/*</div><div class='del'>-	 * Read cpHold bit in pmbar, if cleared we have got Flashrom on board.</div><div class='del'>- 	 * If not, we need to upload the microcode to the card</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);  </div><div class='del'>-</div><div class='del'>-#if XL_DEBUG</div><div class='del'>-	printk(KERN_INFO "Read from PMBAR = %04x\n", readw(xl_mmio + MMIO_MACDATA));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if ( readw( (xl_mmio + MMIO_MACDATA))  &amp; PMB_CPHOLD ) { </div><div class='del'>-</div><div class='del'>-		/* Set PmBar, privateMemoryBase bits (8:2) to 0 */</div><div class='del'>-</div><div class='del'>-		writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);  </div><div class='del'>-		result_16 = readw(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		result_16 = result_16 &amp; ~((0x7F) &lt;&lt; 2) ; </div><div class='del'>-		writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writew(result_16,xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	</div><div class='del'>-		/* Set CPAttention, memWrEn bit */</div><div class='del'>-</div><div class='del'>-		writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		result_8 = readb(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		result_8 = result_8 | CPA_MEMWREN  ; </div><div class='del'>-		writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writeb(result_8, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-		/* </div><div class='del'>-		 * Now to write the microcode into the shared ram </div><div class='del'>-	 	 * The microcode must finish at position 0xFFFF,</div><div class='del'>-	 	 * so we must subtract to get the start position for the code</div><div class='del'>-	 	 *</div><div class='del'>-		 * Looks strange but ensures compiler only uses</div><div class='del'>-		 * 16 bit unsigned int</div><div class='del'>-		 */</div><div class='del'>-		start = (0xFFFF - (xl_priv-&gt;fw-&gt;size) + 1) ;</div><div class='del'>-</div><div class='del'>-		printk(KERN_INFO "3C359: Uploading Microcode: "); </div><div class='del'>-</div><div class='del'>-		for (i = start, j = 0; j &lt; xl_priv-&gt;fw-&gt;size; i++, j++) {</div><div class='del'>-			writel(MEM_BYTE_WRITE | 0XD0000 | i,</div><div class='del'>-			       xl_mmio + MMIO_MAC_ACCESS_CMD);</div><div class='del'>-			writeb(xl_priv-&gt;fw-&gt;data[j], xl_mmio + MMIO_MACDATA);</div><div class='del'>-			if (j % 1024 == 0)</div><div class='del'>-				printk(".");</div><div class='del'>-		}</div><div class='del'>-		printk("\n") ; </div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; 16; i++) {</div><div class='del'>-			writel((MEM_BYTE_WRITE | 0xDFFF0) + i,</div><div class='del'>-			       xl_mmio + MMIO_MAC_ACCESS_CMD);</div><div class='del'>-			writeb(xl_priv-&gt;fw-&gt;data[xl_priv-&gt;fw-&gt;size - 16 + i],</div><div class='del'>-			       xl_mmio + MMIO_MACDATA);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Have to write the start address of the upload to FFF4, but</div><div class='del'>-                 * the address must be &gt;&gt; 4. You do not want to know how long</div><div class='del'>-                 * it took me to discover this.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		writel(MEM_WORD_WRITE | 0xDFFF4, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writew(start &gt;&gt; 4, xl_mmio + MMIO_MACDATA);</div><div class='del'>-</div><div class='del'>-		/* Clear the CPAttention, memWrEn Bit */</div><div class='del'>-	</div><div class='del'>-		writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		result_8 = readb(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		result_8 = result_8 &amp; ~CPA_MEMWREN ; </div><div class='del'>-		writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writeb(result_8, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-		/* Clear the cpHold bit in pmbar */</div><div class='del'>-</div><div class='del'>-		writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);  </div><div class='del'>-		result_16 = readw(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		result_16 = result_16 &amp; ~PMB_CPHOLD ; </div><div class='del'>-		writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writew(result_16,xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	} /* If microcode upload required */</div><div class='del'>-</div><div class='del'>-	/* </div><div class='del'>-	 * The card should now go though a self test procedure and get itself ready</div><div class='del'>-         * to be opened, we must wait for an srb response with the initialization</div><div class='del'>-         * information. </div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-#if XL_DEBUG</div><div class='del'>-	printk(KERN_INFO "%s: Microcode uploaded, must wait for the self test to complete\n", dev-&gt;name);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	writew(SETINDENABLE | 0xFFF, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-</div><div class='del'>-	t=jiffies;</div><div class='del'>-	while ( !(readw(xl_mmio + MMIO_INTSTATUS_AUTO) &amp; INTSTAT_SRB) ) { </div><div class='del'>-		schedule();		</div><div class='del'>-		if (time_after(jiffies, t + 15 * HZ)) {</div><div class='del'>-			printk(KERN_ERR "3COM 3C359 Velocity XL  card not responding.\n");</div><div class='del'>-			return -ENODEV; </div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Write the RxBufArea with D000, RxEarlyThresh, TxStartThresh, </div><div class='del'>- 	 * DnPriReqThresh, read the tech docs if you want to know what</div><div class='del'>-	 * values they need to be.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	writel(MMIO_WORD_WRITE | RXBUFAREA, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writew(0xD000, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	</div><div class='del'>-	writel(MMIO_WORD_WRITE | RXEARLYTHRESH, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writew(0X0020, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	</div><div class='del'>-	writew( SETTXSTARTTHRESH | 0x40 , xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-</div><div class='del'>-	writeb(0x04, xl_mmio + MMIO_DNBURSTTHRESH) ; </div><div class='del'>-	writeb(0x04, xl_mmio + DNPRIREQTHRESH) ;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Read WRBR to provide the location of the srb block, have to use byte reads not word reads. </div><div class='del'>-	 * Tech docs have this wrong !!!!</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	writel(MMIO_BYTE_READ | WRBR, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	xl_priv-&gt;srb = readb(xl_mmio + MMIO_MACDATA) &lt;&lt; 8 ; </div><div class='del'>-	writel( (MMIO_BYTE_READ | WRBR) + 1, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	xl_priv-&gt;srb = xl_priv-&gt;srb | readb(xl_mmio + MMIO_MACDATA) ;</div><div class='del'>-</div><div class='del'>-#if XL_DEBUG</div><div class='del'>-	writel(IO_WORD_READ | SWITCHSETTINGS, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	if ( readw(xl_mmio + MMIO_MACDATA) &amp; 2) { </div><div class='del'>-		printk(KERN_INFO "Default ring speed 4 mbps\n");</div><div class='del'>-	} else {</div><div class='del'>-		printk(KERN_INFO "Default ring speed 16 mbps\n");</div><div class='del'>-	} </div><div class='del'>-	printk(KERN_INFO "%s: xl_priv-&gt;srb = %04x\n",xl_priv-&gt;xl_card_name, xl_priv-&gt;srb);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xl_open(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv=netdev_priv(dev);</div><div class='del'>-	u8 __iomem *xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	u8 i ; </div><div class='del'>-	__le16 hwaddr[3] ; /* Should be u8[6] but we get word return values */</div><div class='del'>-	int open_err ;</div><div class='del'>-</div><div class='del'>-	u16 switchsettings, switchsettings_eeprom  ;</div><div class='del'>- </div><div class='del'>-	if (request_irq(dev-&gt;irq, xl_interrupt, IRQF_SHARED , "3c359", dev))</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-</div><div class='del'>-	/* </div><div class='del'>-	 * Read the information from the EEPROM that we need.</div><div class='del'>-	 */</div><div class='del'>-	</div><div class='del'>-	hwaddr[0] = cpu_to_le16(xl_ee_read(dev,0x10));</div><div class='del'>-	hwaddr[1] = cpu_to_le16(xl_ee_read(dev,0x11));</div><div class='del'>-	hwaddr[2] = cpu_to_le16(xl_ee_read(dev,0x12));</div><div class='del'>-</div><div class='del'>-	/* Ring speed */</div><div class='del'>-</div><div class='del'>-	switchsettings_eeprom = xl_ee_read(dev,0x08) ;</div><div class='del'>-	switchsettings = switchsettings_eeprom ;  </div><div class='del'>-</div><div class='del'>-	if (xl_priv-&gt;xl_ring_speed != 0) { </div><div class='del'>-		if (xl_priv-&gt;xl_ring_speed == 4)  </div><div class='del'>-			switchsettings = switchsettings | 0x02 ; </div><div class='del'>-		else </div><div class='del'>-			switchsettings = switchsettings &amp; ~0x02 ; </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Only write EEProm if there has been a change */</div><div class='del'>-	if (switchsettings != switchsettings_eeprom) { </div><div class='del'>-		xl_ee_write(dev,0x08,switchsettings) ; </div><div class='del'>-		/* Hardware reset after changing EEProm */</div><div class='del'>-		xl_hw_reset(dev) ; </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(dev-&gt;dev_addr,hwaddr,dev-&gt;addr_len) ; </div><div class='del'>-	</div><div class='del'>-	open_err = xl_open_hw(dev) ; </div><div class='del'>-</div><div class='del'>-	/* </div><div class='del'>-	 * This really needs to be cleaned up with better error reporting.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if (open_err != 0) { /* Something went wrong with the open command */</div><div class='del'>-		if (open_err &amp; 0x07) { /* Wrong speed, retry at different speed */</div><div class='del'>-			printk(KERN_WARNING "%s: Open Error, retrying at different ringspeed\n", dev-&gt;name);</div><div class='del'>-			switchsettings = switchsettings ^ 2 ; </div><div class='del'>-			xl_ee_write(dev,0x08,switchsettings) ; </div><div class='del'>-			xl_hw_reset(dev) ; </div><div class='del'>-			open_err = xl_open_hw(dev) ; </div><div class='del'>-			if (open_err != 0) { </div><div class='del'>-				printk(KERN_WARNING "%s: Open error returned a second time, we're bombing out now\n", dev-&gt;name); </div><div class='del'>-				free_irq(dev-&gt;irq,dev) ; 						</div><div class='del'>-				return -ENODEV ;</div><div class='del'>-			}  </div><div class='del'>-		} else { </div><div class='del'>-			printk(KERN_WARNING "%s: Open Error = %04x\n", dev-&gt;name, open_err) ; </div><div class='del'>-			free_irq(dev-&gt;irq,dev) ; </div><div class='del'>-			return -ENODEV ; </div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Now to set up the Rx and Tx buffer structures</div><div class='del'>-	 */</div><div class='del'>-	/* These MUST be on 8 byte boundaries */</div><div class='del'>-	xl_priv-&gt;xl_tx_ring = kzalloc((sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE) + 7, GFP_DMA | GFP_KERNEL);</div><div class='del'>-	if (xl_priv-&gt;xl_tx_ring == NULL) {</div><div class='del'>-		free_irq(dev-&gt;irq,dev);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	xl_priv-&gt;xl_rx_ring = kzalloc((sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE) +7, GFP_DMA | GFP_KERNEL);</div><div class='del'>-	if (xl_priv-&gt;xl_rx_ring == NULL) {</div><div class='del'>-		free_irq(dev-&gt;irq,dev);</div><div class='del'>-		kfree(xl_priv-&gt;xl_tx_ring);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	 /* Setup Rx Ring */</div><div class='del'>-	 for (i=0 ; i &lt; XL_RX_RING_SIZE ; i++) { </div><div class='del'>-		struct sk_buff *skb ; </div><div class='del'>-</div><div class='del'>-		skb = dev_alloc_skb(xl_priv-&gt;pkt_buf_sz) ; </div><div class='del'>-		if (skb==NULL) </div><div class='del'>-			break ; </div><div class='del'>-</div><div class='del'>-		skb-&gt;dev = dev ; </div><div class='del'>-		xl_priv-&gt;xl_rx_ring[i].upfragaddr = cpu_to_le32(pci_map_single(xl_priv-&gt;pdev, skb-&gt;data,xl_priv-&gt;pkt_buf_sz, PCI_DMA_FROMDEVICE));</div><div class='del'>-		xl_priv-&gt;xl_rx_ring[i].upfraglen = cpu_to_le32(xl_priv-&gt;pkt_buf_sz) | RXUPLASTFRAG;</div><div class='del'>-		xl_priv-&gt;rx_ring_skb[i] = skb ; 	</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i==0) { </div><div class='del'>-		printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers. Adapter disabled\n",dev-&gt;name);</div><div class='del'>-		free_irq(dev-&gt;irq,dev) ; </div><div class='del'>-		kfree(xl_priv-&gt;xl_tx_ring);</div><div class='del'>-		kfree(xl_priv-&gt;xl_rx_ring);</div><div class='del'>-		return -EIO ; </div><div class='del'>-	} </div><div class='del'>-</div><div class='del'>-	xl_priv-&gt;rx_ring_no = i ; </div><div class='del'>-	xl_priv-&gt;rx_ring_tail = 0 ; </div><div class='del'>-	xl_priv-&gt;rx_ring_dma_addr = pci_map_single(xl_priv-&gt;pdev,xl_priv-&gt;xl_rx_ring, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_TODEVICE) ; </div><div class='del'>-	for (i=0;i&lt;(xl_priv-&gt;rx_ring_no-1);i++) { </div><div class='del'>-		xl_priv-&gt;xl_rx_ring[i].upnextptr = cpu_to_le32(xl_priv-&gt;rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * (i+1)));</div><div class='del'>-	} </div><div class='del'>-	xl_priv-&gt;xl_rx_ring[i].upnextptr = 0 ; </div><div class='del'>-</div><div class='del'>-	writel(xl_priv-&gt;rx_ring_dma_addr, xl_mmio + MMIO_UPLISTPTR) ; </div><div class='del'>-	</div><div class='del'>-	/* Setup Tx Ring */</div><div class='del'>-	</div><div class='del'>-	xl_priv-&gt;tx_ring_dma_addr = pci_map_single(xl_priv-&gt;pdev,xl_priv-&gt;xl_tx_ring, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE,PCI_DMA_TODEVICE) ; </div><div class='del'>-	</div><div class='del'>-	xl_priv-&gt;tx_ring_head = 1 ; </div><div class='del'>-	xl_priv-&gt;tx_ring_tail = 255 ; /* Special marker for first packet */</div><div class='del'>-	xl_priv-&gt;free_ring_entries = XL_TX_RING_SIZE ; </div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>- 	 * Setup the first dummy DPD entry for polling to start working.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	xl_priv-&gt;xl_tx_ring[0].framestartheader = TXDPDEMPTY;</div><div class='del'>-	xl_priv-&gt;xl_tx_ring[0].buffer = 0 ; </div><div class='del'>-	xl_priv-&gt;xl_tx_ring[0].buffer_length = 0 ; </div><div class='del'>-	xl_priv-&gt;xl_tx_ring[0].dnnextptr = 0 ; </div><div class='del'>-</div><div class='del'>-	writel(xl_priv-&gt;tx_ring_dma_addr, xl_mmio + MMIO_DNLISTPTR) ; </div><div class='del'>-	writel(DNUNSTALL, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-	writel(UPUNSTALL, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-	writel(DNENABLE, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-	writeb(0x40, xl_mmio + MMIO_DNPOLL) ;	</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Enable interrupts on the card</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	writel(SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-	writel(SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-</div><div class='del'>-	netif_start_queue(dev) ; 	</div><div class='del'>-	return 0;</div><div class='del'>-	</div><div class='del'>-}	</div><div class='del'>-</div><div class='del'>-static int xl_open_hw(struct net_device *dev) </div><div class='del'>-{ </div><div class='del'>-	struct xl_private *xl_priv=netdev_priv(dev);</div><div class='del'>-	u8 __iomem *xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	u16 vsoff ;</div><div class='del'>-	char ver_str[33];  </div><div class='del'>-	int open_err ; </div><div class='del'>-	int i ; </div><div class='del'>-	unsigned long t ; </div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Okay, let's build up the Open.NIC srb command</div><div class='del'>-	 *</div><div class='del'>-	 */</div><div class='del'>-		</div><div class='del'>-	writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb), xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writeb(OPEN_NIC, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	</div><div class='del'>-	/*</div><div class='del'>-	 * Use this as a test byte, if it comes back with the same value, the command didn't work</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb)+ 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writeb(0xff,xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-	/* Open options */</div><div class='del'>-	writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writeb(0x00, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb) + 9, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writeb(0x00, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-	/* </div><div class='del'>-	 * Node address, be careful here, the docs say you can just put zeros here and it will use</div><div class='del'>-	 * the hardware address, it doesn't, you must include the node address in the open command.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if (xl_priv-&gt;xl_laa[0]) {  /* If using a LAA address */</div><div class='del'>-		for (i=10;i&lt;16;i++) { </div><div class='del'>-			writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-			writeb(xl_priv-&gt;xl_laa[i-10],xl_mmio + MMIO_MACDATA) ;</div><div class='del'>-		}</div><div class='del'>-		memcpy(dev-&gt;dev_addr,xl_priv-&gt;xl_laa,dev-&gt;addr_len) ; </div><div class='del'>-	} else { /* Regular hardware address */ </div><div class='del'>-		for (i=10;i&lt;16;i++) { </div><div class='del'>-			writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-			writeb(dev-&gt;dev_addr[i-10], xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Default everything else to 0 */</div><div class='del'>-	for (i = 16; i &lt; 34; i++) {</div><div class='del'>-		writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writeb(0x00,xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	}</div><div class='del'>-	</div><div class='del'>-	/*</div><div class='del'>-	 *  Set the csrb bit in the MISR register</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	xl_wait_misr_flags(dev) ; </div><div class='del'>-	writel(MEM_BYTE_WRITE | MF_CSRB, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writeb(0xFF, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writeb(MISR_CSRB , xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Now wait for the command to run</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	t=jiffies;</div><div class='del'>-	while (! (readw(xl_mmio + MMIO_INTSTATUS) &amp; INTSTAT_SRB)) { </div><div class='del'>-		schedule();		</div><div class='del'>-		if (time_after(jiffies, t + 40 * HZ)) {</div><div class='del'>-			printk(KERN_ERR "3COM 3C359 Velocity XL  card not responding.\n");</div><div class='del'>-			break ; </div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Let's interpret the open response</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	writel( (MEM_BYTE_READ | 0xD0000 | xl_priv-&gt;srb)+2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	if (readb(xl_mmio + MMIO_MACDATA)!=0) {</div><div class='del'>-		open_err = readb(xl_mmio + MMIO_MACDATA) &lt;&lt; 8 ; </div><div class='del'>-		writel( (MEM_BYTE_READ | 0xD0000 | xl_priv-&gt;srb) + 7, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		open_err |= readb(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		return open_err ; </div><div class='del'>-	} else { </div><div class='del'>-		writel( (MEM_WORD_READ | 0xD0000 | xl_priv-&gt;srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		xl_priv-&gt;asb = swab16(readw(xl_mmio + MMIO_MACDATA)) ;</div><div class='del'>-		printk(KERN_INFO "%s: Adapter Opened Details: ",dev-&gt;name) ; </div><div class='del'>-		printk("ASB: %04x",xl_priv-&gt;asb ) ; </div><div class='del'>-		writel( (MEM_WORD_READ | 0xD0000 | xl_priv-&gt;srb) + 10, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		printk(", SRB: %04x",swab16(readw(xl_mmio + MMIO_MACDATA)) ) ;</div><div class='del'>- </div><div class='del'>-		writel( (MEM_WORD_READ | 0xD0000 | xl_priv-&gt;srb) + 12, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		xl_priv-&gt;arb = swab16(readw(xl_mmio + MMIO_MACDATA)) ;</div><div class='del'>-		printk(", ARB: %04x\n",xl_priv-&gt;arb );</div><div class='del'>-		writel( (MEM_WORD_READ | 0xD0000 | xl_priv-&gt;srb) + 14, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		vsoff = swab16(readw(xl_mmio + MMIO_MACDATA)) ;</div><div class='del'>-</div><div class='del'>-		/* </div><div class='del'>-		 * Interesting, sending the individual characters directly to printk was causing klogd to use</div><div class='del'>-		 * use 100% of processor time, so we build up the string and print that instead.</div><div class='del'>-	   	 */</div><div class='del'>-</div><div class='del'>-		for (i=0;i&lt;0x20;i++) { </div><div class='del'>-			writel( (MEM_BYTE_READ | 0xD0000 | vsoff) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-			ver_str[i] = readb(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		}</div><div class='del'>-		ver_str[i] = '\0' ; </div><div class='del'>-		printk(KERN_INFO "%s: Microcode version String: %s\n",dev-&gt;name,ver_str);</div><div class='del'>-	} 	</div><div class='del'>-	</div><div class='del'>-	/*</div><div class='del'>-	 * Issue the AckInterrupt</div><div class='del'>-	 */</div><div class='del'>-	writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-</div><div class='del'>-	return 0 ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	There are two ways of implementing rx on the 359 NIC, either</div><div class='del'>- * 	interrupt driven or polling.  We are going to uses interrupts,</div><div class='del'>- *	it is the easier way of doing things.</div><div class='del'>- *	</div><div class='del'>- *	The Rx works with a ring of Rx descriptors.  At initialise time the ring</div><div class='del'>- *	entries point to the next entry except for the last entry in the ring </div><div class='del'>- *	which points to 0.  The card is programmed with the location of the first</div><div class='del'>- *	available descriptor and keeps reading the next_ptr until next_ptr is set</div><div class='del'>- *	to 0.  Hopefully with a ring size of 16 the card will never get to read a next_ptr</div><div class='del'>- *	of 0.  As the Rx interrupt is received we copy the frame up to the protocol layers</div><div class='del'>- *	and then point the end of the ring to our current position and point our current</div><div class='del'>- *	position to 0, therefore making the current position the last position on the ring.</div><div class='del'>- *	The last position on the ring therefore loops continually loops around the rx ring.</div><div class='del'>- *	</div><div class='del'>- *	rx_ring_tail is the position on the ring to process next. (Think of a snake, the head </div><div class='del'>- *	expands as the card adds new packets and we go around eating the tail processing the</div><div class='del'>- *	packets.)</div><div class='del'>- *</div><div class='del'>- *	Undoubtably it could be streamlined and improved upon, but at the moment it works </div><div class='del'>- *	and the fast path through the routine is fine. </div><div class='del'>- *	</div><div class='del'>- *	adv_rx_ring could be inlined to increase performance, but its called a *lot* of times</div><div class='del'>- *	in xl_rx so would increase the size of the function significantly. </div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void adv_rx_ring(struct net_device *dev) /* Advance rx_ring, cut down on bloat in xl_rx */ </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv=netdev_priv(dev);</div><div class='del'>-	int n = xl_priv-&gt;rx_ring_tail;</div><div class='del'>-	int prev_ring_loc;</div><div class='del'>-</div><div class='del'>-	prev_ring_loc = (n + XL_RX_RING_SIZE - 1) &amp; (XL_RX_RING_SIZE - 1);</div><div class='del'>-	xl_priv-&gt;xl_rx_ring[prev_ring_loc].upnextptr = cpu_to_le32(xl_priv-&gt;rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * n));</div><div class='del'>-	xl_priv-&gt;xl_rx_ring[n].framestatus = 0;</div><div class='del'>-	xl_priv-&gt;xl_rx_ring[n].upnextptr = 0;</div><div class='del'>-	xl_priv-&gt;rx_ring_tail++;</div><div class='del'>-	xl_priv-&gt;rx_ring_tail &amp;= (XL_RX_RING_SIZE-1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xl_rx(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv=netdev_priv(dev);</div><div class='del'>-	u8 __iomem * xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	struct sk_buff *skb, *skb2 ; </div><div class='del'>-	int frame_length = 0, copy_len = 0  ; 	</div><div class='del'>-	int temp_ring_loc ;  </div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Receive the next frame, loop around the ring until all frames</div><div class='del'>-  	 * have been received.</div><div class='del'>-	 */ 	 </div><div class='del'>-	</div><div class='del'>-	while (xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].framestatus &amp; (RXUPDCOMPLETE | RXUPDFULL) ) { /* Descriptor to process */</div><div class='del'>-</div><div class='del'>-		if (xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].framestatus &amp; RXUPDFULL ) { /* UpdFull, Multiple Descriptors used for the frame */</div><div class='del'>-</div><div class='del'>-			/* </div><div class='del'>-			 * This is a pain, you need to go through all the descriptors until the last one </div><div class='del'>-			 * for this frame to find the framelength</div><div class='del'>-			 */</div><div class='del'>-</div><div class='del'>-			temp_ring_loc = xl_priv-&gt;rx_ring_tail ; </div><div class='del'>-</div><div class='del'>-			while (xl_priv-&gt;xl_rx_ring[temp_ring_loc].framestatus &amp; RXUPDFULL ) {</div><div class='del'>-				temp_ring_loc++ ; </div><div class='del'>-				temp_ring_loc &amp;= (XL_RX_RING_SIZE-1) ; </div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			frame_length = le32_to_cpu(xl_priv-&gt;xl_rx_ring[temp_ring_loc].framestatus) &amp; 0x7FFF;</div><div class='del'>-</div><div class='del'>-			skb = dev_alloc_skb(frame_length) ;</div><div class='del'>- </div><div class='del'>-			if (skb==NULL) { /* No memory for frame, still need to roll forward the rx ring */</div><div class='del'>-				printk(KERN_WARNING "%s: dev_alloc_skb failed - multi buffer !\n", dev-&gt;name) ; </div><div class='del'>-				while (xl_priv-&gt;rx_ring_tail != temp_ring_loc)  </div><div class='del'>-					adv_rx_ring(dev) ; </div><div class='del'>-				</div><div class='del'>-				adv_rx_ring(dev) ; /* One more time just for luck :) */ </div><div class='del'>-				dev-&gt;stats.rx_dropped++ ; </div><div class='del'>-</div><div class='del'>-				writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-				return ; 				</div><div class='del'>-			}</div><div class='del'>-	</div><div class='del'>-			while (xl_priv-&gt;rx_ring_tail != temp_ring_loc) { </div><div class='del'>-				copy_len = le32_to_cpu(xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].upfraglen) &amp; 0x7FFF;</div><div class='del'>-				frame_length -= copy_len ;  </div><div class='del'>-				pci_dma_sync_single_for_cpu(xl_priv-&gt;pdev,le32_to_cpu(xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].upfragaddr),xl_priv-&gt;pkt_buf_sz,PCI_DMA_FROMDEVICE);</div><div class='del'>-				skb_copy_from_linear_data(xl_priv-&gt;rx_ring_skb[xl_priv-&gt;rx_ring_tail],</div><div class='del'>-							  skb_put(skb, copy_len),</div><div class='del'>-							  copy_len);</div><div class='del'>-				pci_dma_sync_single_for_device(xl_priv-&gt;pdev,le32_to_cpu(xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].upfragaddr),xl_priv-&gt;pkt_buf_sz,PCI_DMA_FROMDEVICE);</div><div class='del'>-				adv_rx_ring(dev) ; </div><div class='del'>-			} </div><div class='del'>-</div><div class='del'>-			/* Now we have found the last fragment */</div><div class='del'>-			pci_dma_sync_single_for_cpu(xl_priv-&gt;pdev,le32_to_cpu(xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].upfragaddr),xl_priv-&gt;pkt_buf_sz,PCI_DMA_FROMDEVICE);</div><div class='del'>-			skb_copy_from_linear_data(xl_priv-&gt;rx_ring_skb[xl_priv-&gt;rx_ring_tail],</div><div class='del'>-				      skb_put(skb,copy_len), frame_length);</div><div class='del'>-/*			memcpy(skb_put(skb,frame_length), bus_to_virt(xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].upfragaddr), frame_length) ; */</div><div class='del'>-			pci_dma_sync_single_for_device(xl_priv-&gt;pdev,le32_to_cpu(xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].upfragaddr),xl_priv-&gt;pkt_buf_sz,PCI_DMA_FROMDEVICE);</div><div class='del'>-			adv_rx_ring(dev) ; </div><div class='del'>-			skb-&gt;protocol = tr_type_trans(skb,dev) ; </div><div class='del'>-			netif_rx(skb) ; </div><div class='del'>-</div><div class='del'>-		} else { /* Single Descriptor Used, simply swap buffers over, fast path  */</div><div class='del'>-</div><div class='del'>-			frame_length = le32_to_cpu(xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].framestatus) &amp; 0x7FFF;</div><div class='del'>-			</div><div class='del'>-			skb = dev_alloc_skb(xl_priv-&gt;pkt_buf_sz) ; </div><div class='del'>-</div><div class='del'>-			if (skb==NULL) { /* Still need to fix the rx ring */</div><div class='del'>-				printk(KERN_WARNING "%s: dev_alloc_skb failed in rx, single buffer\n",dev-&gt;name);</div><div class='del'>-				adv_rx_ring(dev) ; </div><div class='del'>-				dev-&gt;stats.rx_dropped++ ; </div><div class='del'>-				writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-				return ; </div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			skb2 = xl_priv-&gt;rx_ring_skb[xl_priv-&gt;rx_ring_tail] ; </div><div class='del'>-			pci_unmap_single(xl_priv-&gt;pdev, le32_to_cpu(xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].upfragaddr), xl_priv-&gt;pkt_buf_sz,PCI_DMA_FROMDEVICE) ;</div><div class='del'>-			skb_put(skb2, frame_length) ; </div><div class='del'>-			skb2-&gt;protocol = tr_type_trans(skb2,dev) ; </div><div class='del'>-</div><div class='del'>-			xl_priv-&gt;rx_ring_skb[xl_priv-&gt;rx_ring_tail] = skb ; 	</div><div class='del'>-			xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].upfragaddr = cpu_to_le32(pci_map_single(xl_priv-&gt;pdev,skb-&gt;data,xl_priv-&gt;pkt_buf_sz, PCI_DMA_FROMDEVICE));</div><div class='del'>-			xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].upfraglen = cpu_to_le32(xl_priv-&gt;pkt_buf_sz) | RXUPLASTFRAG;</div><div class='del'>-			adv_rx_ring(dev) ; </div><div class='del'>-			dev-&gt;stats.rx_packets++ ; </div><div class='del'>-			dev-&gt;stats.rx_bytes += frame_length ; 	</div><div class='del'>-</div><div class='del'>-			netif_rx(skb2) ; 		</div><div class='del'>-		 } /* if multiple buffers */</div><div class='del'>-	} /* while packet to do */</div><div class='del'>-</div><div class='del'>-	/* Clear the updComplete interrupt */</div><div class='del'>-	writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-	return ; 	</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This is ruthless, it doesn't care what state the card is in it will </div><div class='del'>- * completely reset the adapter.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void xl_reset(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv=netdev_priv(dev);</div><div class='del'>-	u8 __iomem * xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	unsigned long t; </div><div class='del'>-</div><div class='del'>-	writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ; </div><div class='del'>-</div><div class='del'>-	/* </div><div class='del'>-	 * Must wait for cmdInProgress bit (12) to clear before continuing with</div><div class='del'>-	 * card configuration.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	t=jiffies;</div><div class='del'>-	while (readw(xl_mmio + MMIO_INTSTATUS) &amp; INTSTAT_CMD_IN_PROGRESS) { </div><div class='del'>-		if (time_after(jiffies, t + 40 * HZ)) {</div><div class='del'>-			printk(KERN_ERR "3COM 3C359 Velocity XL  card not responding.\n");</div><div class='del'>-			break ; </div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xl_freemem(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv=netdev_priv(dev);</div><div class='del'>-	int i ; </div><div class='del'>-</div><div class='del'>-	for (i=0;i&lt;XL_RX_RING_SIZE;i++) {</div><div class='del'>-		dev_kfree_skb_irq(xl_priv-&gt;rx_ring_skb[xl_priv-&gt;rx_ring_tail]) ; </div><div class='del'>-		pci_unmap_single(xl_priv-&gt;pdev,le32_to_cpu(xl_priv-&gt;xl_rx_ring[xl_priv-&gt;rx_ring_tail].upfragaddr),xl_priv-&gt;pkt_buf_sz, PCI_DMA_FROMDEVICE);</div><div class='del'>-		xl_priv-&gt;rx_ring_tail++ ; </div><div class='del'>-		xl_priv-&gt;rx_ring_tail &amp;= XL_RX_RING_SIZE-1; </div><div class='del'>-	} </div><div class='del'>-</div><div class='del'>-	/* unmap ring */</div><div class='del'>-	pci_unmap_single(xl_priv-&gt;pdev,xl_priv-&gt;rx_ring_dma_addr, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_FROMDEVICE) ; </div><div class='del'>-	</div><div class='del'>-	pci_unmap_single(xl_priv-&gt;pdev,xl_priv-&gt;tx_ring_dma_addr, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE, PCI_DMA_TODEVICE) ; </div><div class='del'>-</div><div class='del'>-	kfree(xl_priv-&gt;xl_rx_ring) ; </div><div class='del'>-	kfree(xl_priv-&gt;xl_tx_ring) ; </div><div class='del'>-</div><div class='del'>-	return  ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t xl_interrupt(int irq, void *dev_id) </div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *)dev_id;</div><div class='del'>-	struct xl_private *xl_priv =netdev_priv(dev);</div><div class='del'>-	u8 __iomem * xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	u16 intstatus, macstatus  ;</div><div class='del'>-</div><div class='del'>-	intstatus = readw(xl_mmio + MMIO_INTSTATUS) ;  </div><div class='del'>-</div><div class='del'>-	if (!(intstatus &amp; 1)) /* We didn't generate the interrupt */</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;xl_priv-&gt;xl_lock) ; </div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Process the interrupt</div><div class='del'>-	 */</div><div class='del'>-	/*</div><div class='del'>-	 * Something fishy going on here, we shouldn't get 0001 ints, not fatal though.</div><div class='del'>-	 */</div><div class='del'>-	if (intstatus == 0x0001) {  </div><div class='del'>-		writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;</div><div class='del'>-		printk(KERN_INFO "%s: 00001 int received\n",dev-&gt;name);</div><div class='del'>-	} else {  </div><div class='del'>-		if (intstatus &amp;	(HOSTERRINT | SRBRINT | ARBCINT | UPCOMPINT | DNCOMPINT | HARDERRINT | (1&lt;&lt;8) | TXUNDERRUN | ASBFINT)) { </div><div class='del'>-			</div><div class='del'>-			/* </div><div class='del'>-			 * Host Error.</div><div class='del'>-			 * It may be possible to recover from this, but usually it means something</div><div class='del'>-			 * is seriously fubar, so we just close the adapter.</div><div class='del'>-			 */</div><div class='del'>-</div><div class='del'>-			if (intstatus &amp; HOSTERRINT) {</div><div class='del'>-				printk(KERN_WARNING "%s: Host Error, performing global reset, intstatus = %04x\n",dev-&gt;name,intstatus);</div><div class='del'>-				writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;</div><div class='del'>-				printk(KERN_WARNING "%s: Resetting hardware:\n", dev-&gt;name);</div><div class='del'>-				netif_stop_queue(dev) ;</div><div class='del'>-				xl_freemem(dev) ; </div><div class='del'>-				free_irq(dev-&gt;irq,dev); 	</div><div class='del'>-				xl_reset(dev) ; </div><div class='del'>-				writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-				spin_unlock(&amp;xl_priv-&gt;xl_lock) ; </div><div class='del'>-				return IRQ_HANDLED;</div><div class='del'>-			} /* Host Error */</div><div class='del'>-</div><div class='del'>-			if (intstatus &amp; SRBRINT ) {  /* Srbc interrupt */</div><div class='del'>-				writel(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;</div><div class='del'>-				if (xl_priv-&gt;srb_queued)</div><div class='del'>-					xl_srb_bh(dev) ; </div><div class='del'>-			} /* SRBR Interrupt */</div><div class='del'>-</div><div class='del'>-			if (intstatus &amp; TXUNDERRUN) { /* Issue DnReset command */</div><div class='del'>-				writel(DNRESET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-				while (readw(xl_mmio + MMIO_INTSTATUS) &amp; INTSTAT_CMD_IN_PROGRESS) { /* Wait for command to run */</div><div class='del'>-					/* !!! FIX-ME !!!! </div><div class='del'>-					Must put a timeout check here ! */</div><div class='del'>-					/* Empty Loop */</div><div class='del'>-				} </div><div class='del'>-				printk(KERN_WARNING "%s: TX Underrun received\n",dev-&gt;name);</div><div class='del'>-				writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-			} /* TxUnderRun */</div><div class='del'>-	</div><div class='del'>-			if (intstatus &amp; ARBCINT ) { /* Arbc interrupt */</div><div class='del'>-				xl_arb_cmd(dev) ; </div><div class='del'>-			} /* Arbc */</div><div class='del'>-</div><div class='del'>-			if (intstatus &amp; ASBFINT) { </div><div class='del'>-				if (xl_priv-&gt;asb_queued == 1) {</div><div class='del'>-					xl_asb_cmd(dev) ; </div><div class='del'>-				} else if (xl_priv-&gt;asb_queued == 2) {</div><div class='del'>-					xl_asb_bh(dev) ; </div><div class='del'>-				} else { </div><div class='del'>-					writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-				}  </div><div class='del'>-			} /* Asbf */</div><div class='del'>-</div><div class='del'>-			if (intstatus &amp; UPCOMPINT ) /* UpComplete */</div><div class='del'>-				xl_rx(dev) ; </div><div class='del'>-</div><div class='del'>-			if (intstatus &amp; DNCOMPINT )  /* DnComplete */</div><div class='del'>-				xl_dn_comp(dev) ; </div><div class='del'>-</div><div class='del'>-			if (intstatus &amp; HARDERRINT ) { /* Hardware error */</div><div class='del'>-				writel(MMIO_WORD_READ | MACSTATUS, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-				macstatus = readw(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-				printk(KERN_WARNING "%s: MacStatusError, details: ", dev-&gt;name);</div><div class='del'>-				if (macstatus &amp; (1&lt;&lt;14)) </div><div class='del'>-					printk(KERN_WARNING "tchk error: Unrecoverable error\n");</div><div class='del'>-				if (macstatus &amp; (1&lt;&lt;3))</div><div class='del'>-					printk(KERN_WARNING "eint error: Internal watchdog timer expired\n");</div><div class='del'>-				if (macstatus &amp; (1&lt;&lt;2))</div><div class='del'>-					printk(KERN_WARNING "aint error: Host tried to perform invalid operation\n");</div><div class='del'>-				printk(KERN_WARNING "Instatus = %02x, macstatus = %02x\n",intstatus,macstatus) ; </div><div class='del'>-				printk(KERN_WARNING "%s: Resetting hardware:\n", dev-&gt;name);</div><div class='del'>-				netif_stop_queue(dev) ;</div><div class='del'>-				xl_freemem(dev) ; </div><div class='del'>-				free_irq(dev-&gt;irq,dev); </div><div class='del'>-				unregister_netdev(dev) ; </div><div class='del'>-				free_netdev(dev) ;  </div><div class='del'>-				xl_reset(dev) ; </div><div class='del'>-				writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-				spin_unlock(&amp;xl_priv-&gt;xl_lock) ; </div><div class='del'>-				return IRQ_HANDLED;</div><div class='del'>-			}</div><div class='del'>-		} else { </div><div class='del'>-			printk(KERN_WARNING "%s: Received Unknown interrupt : %04x\n", dev-&gt;name, intstatus);</div><div class='del'>-			writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 	</div><div class='del'>-		}</div><div class='del'>-	} </div><div class='del'>-</div><div class='del'>-	/* Turn interrupts back on */</div><div class='del'>-</div><div class='del'>-	writel( SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-	writel( SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;xl_priv-&gt;xl_lock) ;</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}	</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	Tx - Polling configuration</div><div class='del'>- */</div><div class='del'>-	</div><div class='del'>-static netdev_tx_t xl_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv=netdev_priv(dev);</div><div class='del'>-	struct xl_tx_desc *txd ; </div><div class='del'>-	int tx_head, tx_tail, tx_prev ; </div><div class='del'>-	unsigned long flags ; 	</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;xl_priv-&gt;xl_lock,flags) ; </div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev) ; </div><div class='del'>-</div><div class='del'>-	if (xl_priv-&gt;free_ring_entries &gt; 1 ) { 	</div><div class='del'>-		/*</div><div class='del'>-		 * Set up the descriptor for the packet </div><div class='del'>-		 */</div><div class='del'>-		tx_head = xl_priv-&gt;tx_ring_head ; </div><div class='del'>-		tx_tail = xl_priv-&gt;tx_ring_tail ; </div><div class='del'>-</div><div class='del'>-		txd = &amp;(xl_priv-&gt;xl_tx_ring[tx_head]) ; </div><div class='del'>-		txd-&gt;dnnextptr = 0 ; </div><div class='del'>-		txd-&gt;framestartheader = cpu_to_le32(skb-&gt;len) | TXDNINDICATE;</div><div class='del'>-		txd-&gt;buffer = cpu_to_le32(pci_map_single(xl_priv-&gt;pdev, skb-&gt;data, skb-&gt;len, PCI_DMA_TODEVICE));</div><div class='del'>-		txd-&gt;buffer_length = cpu_to_le32(skb-&gt;len) | TXDNFRAGLAST;</div><div class='del'>-		xl_priv-&gt;tx_ring_skb[tx_head] = skb ; </div><div class='del'>-		dev-&gt;stats.tx_packets++ ; </div><div class='del'>-		dev-&gt;stats.tx_bytes += skb-&gt;len ;</div><div class='del'>-</div><div class='del'>-		/* </div><div class='del'>-		 * Set the nextptr of the previous descriptor equal to this descriptor, add XL_TX_RING_SIZE -1 </div><div class='del'>-		 * to ensure no negative numbers in unsigned locations.</div><div class='del'>-		 */ </div><div class='del'>-	</div><div class='del'>-		tx_prev = (xl_priv-&gt;tx_ring_head + XL_TX_RING_SIZE - 1) &amp; (XL_TX_RING_SIZE - 1) ; </div><div class='del'>-</div><div class='del'>-		xl_priv-&gt;tx_ring_head++ ; </div><div class='del'>-		xl_priv-&gt;tx_ring_head &amp;= (XL_TX_RING_SIZE - 1) ;</div><div class='del'>-		xl_priv-&gt;free_ring_entries-- ; </div><div class='del'>-</div><div class='del'>-		xl_priv-&gt;xl_tx_ring[tx_prev].dnnextptr = cpu_to_le32(xl_priv-&gt;tx_ring_dma_addr + (sizeof (struct xl_tx_desc) * tx_head));</div><div class='del'>-</div><div class='del'>-		/* Sneaky, by doing a read on DnListPtr we can force the card to poll on the DnNextPtr */</div><div class='del'>-		/* readl(xl_mmio + MMIO_DNLISTPTR) ; */</div><div class='del'>-</div><div class='del'>-		netif_wake_queue(dev) ; </div><div class='del'>-</div><div class='del'>-		spin_unlock_irqrestore(&amp;xl_priv-&gt;xl_lock,flags) ; </div><div class='del'>- </div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-	} else {</div><div class='del'>-		spin_unlock_irqrestore(&amp;xl_priv-&gt;xl_lock,flags) ; </div><div class='del'>-		return NETDEV_TX_BUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-	</div><div class='del'>-/* </div><div class='del'>- * The NIC has told us that a packet has been downloaded onto the card, we must</div><div class='del'>- * find out which packet it has done, clear the skb and information for the packet</div><div class='del'>- * then advance around the ring for all transmitted packets</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void xl_dn_comp(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv=netdev_priv(dev);</div><div class='del'>-	u8 __iomem * xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	struct xl_tx_desc *txd ; </div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	if (xl_priv-&gt;tx_ring_tail == 255) {/* First time */</div><div class='del'>-		xl_priv-&gt;xl_tx_ring[0].framestartheader = 0 ; </div><div class='del'>-		xl_priv-&gt;xl_tx_ring[0].dnnextptr = 0 ;  </div><div class='del'>-		xl_priv-&gt;tx_ring_tail = 1 ; </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (xl_priv-&gt;xl_tx_ring[xl_priv-&gt;tx_ring_tail].framestartheader &amp; TXDNCOMPLETE ) { </div><div class='del'>-		txd = &amp;(xl_priv-&gt;xl_tx_ring[xl_priv-&gt;tx_ring_tail]) ;</div><div class='del'>-		pci_unmap_single(xl_priv-&gt;pdev, le32_to_cpu(txd-&gt;buffer), xl_priv-&gt;tx_ring_skb[xl_priv-&gt;tx_ring_tail]-&gt;len, PCI_DMA_TODEVICE);</div><div class='del'>-		txd-&gt;framestartheader = 0 ; </div><div class='del'>-		txd-&gt;buffer = cpu_to_le32(0xdeadbeef);</div><div class='del'>-		txd-&gt;buffer_length  = 0 ;  </div><div class='del'>-		dev_kfree_skb_irq(xl_priv-&gt;tx_ring_skb[xl_priv-&gt;tx_ring_tail]) ;</div><div class='del'>-		xl_priv-&gt;tx_ring_tail++ ; </div><div class='del'>-		xl_priv-&gt;tx_ring_tail &amp;= (XL_TX_RING_SIZE - 1) ; </div><div class='del'>-		xl_priv-&gt;free_ring_entries++ ; </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netif_wake_queue(dev) ; </div><div class='del'>-</div><div class='del'>-	writel(ACK_INTERRUPT | DNCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Close the adapter properly.</div><div class='del'>- * This srb reply cannot be handled from interrupt context as we have</div><div class='del'>- * to free the interrupt from the driver. </div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int xl_close(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	u8 __iomem * xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	unsigned long t ; </div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev) ; </div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Close the adapter, need to stall the rx and tx queues.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-    	writew(DNSTALL, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-	t=jiffies;</div><div class='del'>-	while (readw(xl_mmio + MMIO_INTSTATUS) &amp; INTSTAT_CMD_IN_PROGRESS) { </div><div class='del'>-		schedule();		</div><div class='del'>-		if (time_after(jiffies, t + 10 * HZ)) {</div><div class='del'>-			printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNSTALL not responding.\n", dev-&gt;name);</div><div class='del'>-			break ; </div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-    	writew(DNDISABLE, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-	t=jiffies;</div><div class='del'>-	while (readw(xl_mmio + MMIO_INTSTATUS) &amp; INTSTAT_CMD_IN_PROGRESS) { </div><div class='del'>-		schedule();		</div><div class='del'>-		if (time_after(jiffies, t + 10 * HZ)) {</div><div class='del'>-			printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNDISABLE not responding.\n", dev-&gt;name);</div><div class='del'>-			break ;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-    	writew(UPSTALL, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-	t=jiffies;</div><div class='del'>-	while (readw(xl_mmio + MMIO_INTSTATUS) &amp; INTSTAT_CMD_IN_PROGRESS) { </div><div class='del'>-		schedule();		</div><div class='del'>-		if (time_after(jiffies, t + 10 * HZ)) {</div><div class='del'>-			printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPSTALL not responding.\n", dev-&gt;name);</div><div class='del'>-			break ; </div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Turn off interrupts, we will still get the indication though</div><div class='del'>- 	 * so we can trap it</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	writel(SETINTENABLE, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-</div><div class='del'>-	xl_srb_cmd(dev,CLOSE_NIC) ; </div><div class='del'>-</div><div class='del'>-	t=jiffies;</div><div class='del'>-	while (!(readw(xl_mmio + MMIO_INTSTATUS) &amp; INTSTAT_SRB)) { </div><div class='del'>-		schedule();		</div><div class='del'>-		if (time_after(jiffies, t + 10 * HZ)) {</div><div class='del'>-			printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-CLOSENIC not responding.\n", dev-&gt;name);</div><div class='del'>-			break ; </div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	/* Read the srb response from the adapter */</div><div class='del'>-</div><div class='del'>-	writel(MEM_BYTE_READ | 0xd0000 | xl_priv-&gt;srb, xl_mmio + MMIO_MAC_ACCESS_CMD);</div><div class='del'>-	if (readb(xl_mmio + MMIO_MACDATA) != CLOSE_NIC) { </div><div class='del'>-		printk(KERN_INFO "%s: CLOSE_NIC did not get a CLOSE_NIC response\n",dev-&gt;name);</div><div class='del'>-	} else { </div><div class='del'>-		writel((MEM_BYTE_READ | 0xd0000 | xl_priv-&gt;srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;</div><div class='del'>-		if (readb(xl_mmio + MMIO_MACDATA)==0) { </div><div class='del'>-			printk(KERN_INFO "%s: Adapter has been closed\n",dev-&gt;name);</div><div class='del'>-			writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-</div><div class='del'>-			xl_freemem(dev) ; </div><div class='del'>-			free_irq(dev-&gt;irq,dev) ; </div><div class='del'>-		} else { </div><div class='del'>-			printk(KERN_INFO "%s: Close nic command returned error code %02x\n",dev-&gt;name, readb(xl_mmio + MMIO_MACDATA)) ;</div><div class='del'>-		} </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Reset the upload and download logic */</div><div class='del'>- </div><div class='del'>-    	writew(UPRESET, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-	t=jiffies;</div><div class='del'>-	while (readw(xl_mmio + MMIO_INTSTATUS) &amp; INTSTAT_CMD_IN_PROGRESS) { </div><div class='del'>-		schedule();		</div><div class='del'>-		if (time_after(jiffies, t + 10 * HZ)) {</div><div class='del'>-			printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPRESET not responding.\n", dev-&gt;name);</div><div class='del'>-			break ; </div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-    	writew(DNRESET, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-	t=jiffies;</div><div class='del'>-	while (readw(xl_mmio + MMIO_INTSTATUS) &amp; INTSTAT_CMD_IN_PROGRESS) { </div><div class='del'>-		schedule();		</div><div class='del'>-		if (time_after(jiffies, t + 10 * HZ)) {</div><div class='del'>-			printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNRESET not responding.\n", dev-&gt;name);</div><div class='del'>-			break ; </div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	xl_hw_reset(dev) ; </div><div class='del'>-	return 0 ;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xl_set_rx_mode(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	struct netdev_hw_addr *ha;</div><div class='del'>-	unsigned char dev_mc_address[4] ; </div><div class='del'>-	u16 options ; </div><div class='del'>-</div><div class='del'>-	if (dev-&gt;flags &amp; IFF_PROMISC)</div><div class='del'>-		options = 0x0004 ; </div><div class='del'>-	else</div><div class='del'>-		options = 0x0000 ; </div><div class='del'>-</div><div class='del'>-	if (options ^ xl_priv-&gt;xl_copy_all_options) { /* Changed, must send command */</div><div class='del'>-		xl_priv-&gt;xl_copy_all_options = options ; </div><div class='del'>-		xl_srb_cmd(dev, SET_RECEIVE_MODE) ;</div><div class='del'>-		return ;  </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_mc_address[0] = dev_mc_address[1] = dev_mc_address[2] = dev_mc_address[3] = 0 ;</div><div class='del'>-</div><div class='del'>-	netdev_for_each_mc_addr(ha, dev) {</div><div class='del'>-		dev_mc_address[0] |= ha-&gt;addr[2];</div><div class='del'>-		dev_mc_address[1] |= ha-&gt;addr[3];</div><div class='del'>-		dev_mc_address[2] |= ha-&gt;addr[4];</div><div class='del'>-		dev_mc_address[3] |= ha-&gt;addr[5];</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	if (memcmp(xl_priv-&gt;xl_functional_addr,dev_mc_address,4) != 0) { /* Options have changed, run the command */</div><div class='del'>-		memcpy(xl_priv-&gt;xl_functional_addr, dev_mc_address,4) ; </div><div class='del'>-		xl_srb_cmd(dev, SET_FUNC_ADDRESS) ; </div><div class='del'>-	}</div><div class='del'>-	return ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	We issued an srb command and now we must read</div><div class='del'>- *	the response from the completed command.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void xl_srb_bh(struct net_device *dev) </div><div class='del'>-{ </div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	u8 __iomem * xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	u8 srb_cmd, ret_code ; </div><div class='del'>-	int i ; </div><div class='del'>-</div><div class='del'>-	writel(MEM_BYTE_READ | 0xd0000 | xl_priv-&gt;srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;</div><div class='del'>-	srb_cmd = readb(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	writel((MEM_BYTE_READ | 0xd0000 | xl_priv-&gt;srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;</div><div class='del'>-	ret_code = readb(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-	/* Ret_code is standard across all commands */</div><div class='del'>-</div><div class='del'>-	switch (ret_code) { </div><div class='del'>-	case 1:</div><div class='del'>-		printk(KERN_INFO "%s: Command: %d - Invalid Command code\n",dev-&gt;name,srb_cmd) ; </div><div class='del'>-		break ; </div><div class='del'>-	case 4:</div><div class='del'>-		printk(KERN_INFO "%s: Command: %d - Adapter is closed, must be open for this command\n",dev-&gt;name,srb_cmd);</div><div class='del'>-		break ;</div><div class='del'>-	</div><div class='del'>-	case 6:</div><div class='del'>-		printk(KERN_INFO "%s: Command: %d - Options Invalid for command\n",dev-&gt;name,srb_cmd);</div><div class='del'>-		break ;</div><div class='del'>-</div><div class='del'>-	case 0: /* Successful command execution */ </div><div class='del'>-		switch (srb_cmd) { </div><div class='del'>-		case READ_LOG: /* Returns 14 bytes of data from the NIC */</div><div class='del'>-			if(xl_priv-&gt;xl_message_level)</div><div class='del'>-				printk(KERN_INFO "%s: READ.LOG 14 bytes of data ",dev-&gt;name) ; </div><div class='del'>-			/* </div><div class='del'>-			 * We still have to read the log even if message_level = 0 and we don't want</div><div class='del'>-			 * to see it</div><div class='del'>-			 */</div><div class='del'>-			for (i=0;i&lt;14;i++) { </div><div class='del'>-				writel(MEM_BYTE_READ | 0xd0000 | xl_priv-&gt;srb | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-				if(xl_priv-&gt;xl_message_level) </div><div class='del'>-					printk("%02x:",readb(xl_mmio + MMIO_MACDATA)) ; 	</div><div class='del'>-			} </div><div class='del'>-			printk("\n") ; </div><div class='del'>-			break ; </div><div class='del'>-		case SET_FUNC_ADDRESS:</div><div class='del'>-			if(xl_priv-&gt;xl_message_level) </div><div class='del'>-				printk(KERN_INFO "%s: Functional Address Set\n",dev-&gt;name);</div><div class='del'>-			break ; </div><div class='del'>-		case CLOSE_NIC:</div><div class='del'>-			if(xl_priv-&gt;xl_message_level)</div><div class='del'>-				printk(KERN_INFO "%s: Received CLOSE_NIC interrupt in interrupt handler\n",dev-&gt;name);</div><div class='del'>-			break ; </div><div class='del'>-		case SET_MULTICAST_MODE:</div><div class='del'>-			if(xl_priv-&gt;xl_message_level)</div><div class='del'>-				printk(KERN_INFO "%s: Multicast options successfully changed\n",dev-&gt;name) ; </div><div class='del'>-			break ;</div><div class='del'>-		case SET_RECEIVE_MODE:</div><div class='del'>-			if(xl_priv-&gt;xl_message_level) {  </div><div class='del'>-				if (xl_priv-&gt;xl_copy_all_options == 0x0004) </div><div class='del'>-					printk(KERN_INFO "%s: Entering promiscuous mode\n", dev-&gt;name);</div><div class='del'>-				else</div><div class='del'>-					printk(KERN_INFO "%s: Entering normal receive mode\n",dev-&gt;name);</div><div class='del'>-			}</div><div class='del'>-			break ; </div><div class='del'>- </div><div class='del'>-		} /* switch */</div><div class='del'>-		break ; </div><div class='del'>-	} /* switch */</div><div class='del'>-	return ; 	</div><div class='del'>-} </div><div class='del'>-</div><div class='del'>-static int xl_set_mac_address (struct net_device *dev, void *addr) </div><div class='del'>-{</div><div class='del'>-	struct sockaddr *saddr = addr ; </div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (netif_running(dev)) { </div><div class='del'>-		printk(KERN_WARNING "%s: Cannot set mac/laa address while card is open\n", dev-&gt;name) ; </div><div class='del'>-		return -EIO ; </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(xl_priv-&gt;xl_laa, saddr-&gt;sa_data,dev-&gt;addr_len) ; </div><div class='del'>-	</div><div class='del'>-	if (xl_priv-&gt;xl_message_level) { </div><div class='del'>- 		printk(KERN_INFO "%s: MAC/LAA Set to  = %x.%x.%x.%x.%x.%x\n",dev-&gt;name, xl_priv-&gt;xl_laa[0],</div><div class='del'>-		xl_priv-&gt;xl_laa[1], xl_priv-&gt;xl_laa[2],</div><div class='del'>-		xl_priv-&gt;xl_laa[3], xl_priv-&gt;xl_laa[4],</div><div class='del'>-		xl_priv-&gt;xl_laa[5]);</div><div class='del'>-	} </div><div class='del'>-</div><div class='del'>-	return 0 ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xl_arb_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	u8 __iomem * xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	u8 arb_cmd ; </div><div class='del'>-	u16 lan_status, lan_status_diff ; </div><div class='del'>-</div><div class='del'>-	writel( ( MEM_BYTE_READ | 0xD0000 | xl_priv-&gt;arb), xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	arb_cmd = readb(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	</div><div class='del'>-	if (arb_cmd == RING_STATUS_CHANGE) { /* Ring.Status.Change */</div><div class='del'>-		writel( ( (MEM_WORD_READ | 0xD0000 | xl_priv-&gt;arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ;</div><div class='del'>-		 </div><div class='del'>-		printk(KERN_INFO "%s: Ring Status Change: New Status = %04x\n", dev-&gt;name, swab16(readw(xl_mmio + MMIO_MACDATA) )) ;</div><div class='del'>-</div><div class='del'>-		lan_status = swab16(readw(xl_mmio + MMIO_MACDATA));</div><div class='del'>-	</div><div class='del'>-		/* Acknowledge interrupt, this tells nic we are done with the arb */</div><div class='del'>-		writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-			</div><div class='del'>-		lan_status_diff = xl_priv-&gt;xl_lan_status ^ lan_status ; </div><div class='del'>-</div><div class='del'>-		if (lan_status_diff &amp; (LSC_LWF | LSC_ARW | LSC_FPE | LSC_RR) ) { </div><div class='del'>-			if (lan_status_diff &amp; LSC_LWF) </div><div class='del'>-				printk(KERN_WARNING "%s: Short circuit detected on the lobe\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_ARW) </div><div class='del'>-				printk(KERN_WARNING "%s: Auto removal error\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_FPE)</div><div class='del'>-				printk(KERN_WARNING "%s: FDX Protocol Error\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_RR) </div><div class='del'>-				printk(KERN_WARNING "%s: Force remove MAC frame received\n",dev-&gt;name);</div><div class='del'>-		</div><div class='del'>-			/* Adapter has been closed by the hardware */</div><div class='del'>-</div><div class='del'>-			netif_stop_queue(dev);</div><div class='del'>-			xl_freemem(dev) ; </div><div class='del'>-			free_irq(dev-&gt;irq,dev);</div><div class='del'>-			</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter has been closed\n", dev-&gt;name);</div><div class='del'>-		} /* If serious error */</div><div class='del'>-		</div><div class='del'>-		if (xl_priv-&gt;xl_message_level) { </div><div class='del'>-			if (lan_status_diff &amp; LSC_SIG_LOSS) </div><div class='del'>-					printk(KERN_WARNING "%s: No receive signal detected\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_HARD_ERR)</div><div class='del'>-					printk(KERN_INFO "%s: Beaconing\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_SOFT_ERR)</div><div class='del'>-					printk(KERN_WARNING "%s: Adapter transmitted Soft Error Report Mac Frame\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_TRAN_BCN) </div><div class='del'>-					printk(KERN_INFO "%s: We are transmitting the beacon, aaah\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_SS) </div><div class='del'>-					printk(KERN_INFO "%s: Single Station on the ring\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_RING_REC)</div><div class='del'>-					printk(KERN_INFO "%s: Ring recovery ongoing\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_FDX_MODE)</div><div class='del'>-					printk(KERN_INFO "%s: Operating in FDX mode\n",dev-&gt;name);</div><div class='del'>-		} 	</div><div class='del'>-		</div><div class='del'>-		if (lan_status_diff &amp; LSC_CO) { </div><div class='del'>-				if (xl_priv-&gt;xl_message_level) </div><div class='del'>-					printk(KERN_INFO "%s: Counter Overflow\n", dev-&gt;name);</div><div class='del'>-				/* Issue READ.LOG command */</div><div class='del'>-				xl_srb_cmd(dev, READ_LOG) ; 	</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* There is no command in the tech docs to issue the read_sr_counters */</div><div class='del'>-		if (lan_status_diff &amp; LSC_SR_CO) { </div><div class='del'>-			if (xl_priv-&gt;xl_message_level)</div><div class='del'>-				printk(KERN_INFO "%s: Source routing counters overflow\n", dev-&gt;name);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		xl_priv-&gt;xl_lan_status = lan_status ; </div><div class='del'>-	</div><div class='del'>-	}  /* Lan.change.status */</div><div class='del'>-	else if ( arb_cmd == RECEIVE_DATA) { /* Received.Data */</div><div class='del'>-#if XL_DEBUG</div><div class='del'>-		printk(KERN_INFO "Received.Data\n");</div><div class='del'>-#endif 		</div><div class='del'>-		writel( ((MEM_WORD_READ | 0xD0000 | xl_priv-&gt;arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ;</div><div class='del'>-		xl_priv-&gt;mac_buffer = swab16(readw(xl_mmio + MMIO_MACDATA)) ;</div><div class='del'>-		</div><div class='del'>-		/* Now we are going to be really basic here and not do anything</div><div class='del'>-		 * with the data at all. The tech docs do not give me enough</div><div class='del'>-		 * information to calculate the buffers properly so we're</div><div class='del'>-		 * just going to tell the nic that we've dealt with the frame</div><div class='del'>-		 * anyway.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		/* Acknowledge interrupt, this tells nic we are done with the arb */</div><div class='del'>-		writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-</div><div class='del'>-		/* Is the ASB free ? */ 	</div><div class='del'>-			</div><div class='del'>-		xl_priv-&gt;asb_queued = 0 ; 			</div><div class='del'>-		writel( ((MEM_BYTE_READ | 0xD0000 | xl_priv-&gt;asb) + 2), xl_mmio + MMIO_MAC_ACCESS_CMD) ;</div><div class='del'>-		if (readb(xl_mmio + MMIO_MACDATA) != 0xff) { </div><div class='del'>-			xl_priv-&gt;asb_queued = 1 ;</div><div class='del'>-</div><div class='del'>-			xl_wait_misr_flags(dev) ;  </div><div class='del'>-</div><div class='del'>-			writel(MEM_BYTE_WRITE | MF_ASBFR, xl_mmio + MMIO_MAC_ACCESS_CMD); </div><div class='del'>-			writeb(0xff, xl_mmio + MMIO_MACDATA) ;</div><div class='del'>-			writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-			writeb(MISR_ASBFR, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-			return ; 	</div><div class='del'>-			/* Drop out and wait for the bottom half to be run */</div><div class='del'>-		}</div><div class='del'>-	</div><div class='del'>-		xl_asb_cmd(dev) ; </div><div class='del'>-		</div><div class='del'>-	} else {</div><div class='del'>-		printk(KERN_WARNING "%s: Received unknown arb (xl_priv) command: %02x\n",dev-&gt;name,arb_cmd);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Acknowledge the arb interrupt */</div><div class='del'>-</div><div class='del'>-	writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-</div><div class='del'>-	return ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	There is only one asb command, but we can get called from different</div><div class='del'>- *	places.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void xl_asb_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	u8 __iomem * xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-</div><div class='del'>-	if (xl_priv-&gt;asb_queued == 1) </div><div class='del'>-		writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ; </div><div class='del'>-		</div><div class='del'>-	writel(MEM_BYTE_WRITE | 0xd0000 | xl_priv-&gt;asb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writeb(0x81, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-	writel(MEM_WORD_WRITE | 0xd0000 | xl_priv-&gt;asb | 6, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writew(swab16(xl_priv-&gt;mac_buffer), xl_mmio + MMIO_MACDATA) ;</div><div class='del'>-</div><div class='del'>-	xl_wait_misr_flags(dev) ; 	</div><div class='del'>-</div><div class='del'>-	writel(MEM_BYTE_WRITE | MF_RASB, xl_mmio + MMIO_MAC_ACCESS_CMD); </div><div class='del'>-	writeb(0xff, xl_mmio + MMIO_MACDATA) ;</div><div class='del'>-</div><div class='del'>-	writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writeb(MISR_RASB, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-	xl_priv-&gt;asb_queued = 2 ; </div><div class='del'>-</div><div class='del'>-	return ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 	This will only get called if there was an error</div><div class='del'>- *	from the asb cmd.</div><div class='del'>- */</div><div class='del'>-static void xl_asb_bh(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	u8 __iomem * xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	u8 ret_code ; </div><div class='del'>-</div><div class='del'>-	writel(MMIO_BYTE_READ | 0xd0000 | xl_priv-&gt;asb | 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	ret_code = readb(xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	switch (ret_code) { </div><div class='del'>-		case 0x01:</div><div class='del'>-			printk(KERN_INFO "%s: ASB Command, unrecognized command code\n",dev-&gt;name);</div><div class='del'>-			break ;</div><div class='del'>-		case 0x26:</div><div class='del'>-			printk(KERN_INFO "%s: ASB Command, unexpected receive buffer\n", dev-&gt;name);</div><div class='del'>-			break ; </div><div class='del'>-		case 0x40:</div><div class='del'>-			printk(KERN_INFO "%s: ASB Command, Invalid Station ID\n", dev-&gt;name);</div><div class='del'>-			break ;  </div><div class='del'>-	}</div><div class='del'>-	xl_priv-&gt;asb_queued = 0 ; </div><div class='del'>-	writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;</div><div class='del'>-	return ;  </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* 	</div><div class='del'>- *	Issue srb commands to the nic </div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void xl_srb_cmd(struct net_device *dev, int srb_cmd) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	u8 __iomem * xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-</div><div class='del'>-	switch (srb_cmd) { </div><div class='del'>-	case READ_LOG:</div><div class='del'>-		writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writeb(READ_LOG, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		break; </div><div class='del'>-</div><div class='del'>-	case CLOSE_NIC:</div><div class='del'>-		writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writeb(CLOSE_NIC, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		break ;</div><div class='del'>-</div><div class='del'>-	case SET_RECEIVE_MODE:</div><div class='del'>-		writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writeb(SET_RECEIVE_MODE, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		writel(MEM_WORD_WRITE | 0xD0000 | xl_priv-&gt;srb | 4, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writew(xl_priv-&gt;xl_copy_all_options, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		break ;</div><div class='del'>-</div><div class='del'>-	case SET_FUNC_ADDRESS:</div><div class='del'>-		writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writeb(SET_FUNC_ADDRESS, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb | 6 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writeb(xl_priv-&gt;xl_functional_addr[0], xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb | 7 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writeb(xl_priv-&gt;xl_functional_addr[1], xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb | 8 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writeb(xl_priv-&gt;xl_functional_addr[2], xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-		writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv-&gt;srb | 9 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-		writeb(xl_priv-&gt;xl_functional_addr[3], xl_mmio + MMIO_MACDATA) ;</div><div class='del'>-		break ;  </div><div class='del'>-	} /* switch */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	xl_wait_misr_flags(dev)  ; </div><div class='del'>-</div><div class='del'>-	/* Write 0xff to the CSRB flag */</div><div class='del'>-	writel(MEM_BYTE_WRITE | MF_CSRB , xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writeb(0xFF, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	/* Set csrb bit in MISR register to process command */</div><div class='del'>-	writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writeb(MISR_CSRB, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-	xl_priv-&gt;srb_queued = 1 ; </div><div class='del'>-</div><div class='del'>-	return ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This is nasty, to use the MISR command you have to wait for 6 memory locations</div><div class='del'>- * to be zero. This is the way the driver does on other OS'es so we should be ok with </div><div class='del'>- * the empty loop.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void xl_wait_misr_flags(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	u8 __iomem * xl_mmio = xl_priv-&gt;xl_mmio ; </div><div class='del'>-	</div><div class='del'>-	int i  ; </div><div class='del'>-	</div><div class='del'>-	writel(MMIO_BYTE_READ | MISR_RW, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	if (readb(xl_mmio + MMIO_MACDATA) != 0) {  /* Misr not clear */</div><div class='del'>-		for (i=0; i&lt;6; i++) { </div><div class='del'>-			writel(MEM_BYTE_READ | 0xDFFE0 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-			while (readb(xl_mmio + MMIO_MACDATA) != 0) {</div><div class='del'>-				;	/* Empty Loop */</div><div class='del'>-			}</div><div class='del'>-		} </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	writel(MMIO_BYTE_WRITE | MISR_AND, xl_mmio + MMIO_MAC_ACCESS_CMD) ; </div><div class='del'>-	writeb(0x80, xl_mmio + MMIO_MACDATA) ; </div><div class='del'>-</div><div class='del'>-	return ; </div><div class='del'>-} </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	Change mtu size, this should work the same as olympic</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int xl_change_mtu(struct net_device *dev, int mtu) </div><div class='del'>-{</div><div class='del'>-	struct xl_private *xl_priv = netdev_priv(dev);</div><div class='del'>-	u16 max_mtu ; </div><div class='del'>-</div><div class='del'>-	if (xl_priv-&gt;xl_ring_speed == 4)</div><div class='del'>-		max_mtu = 4500 ; </div><div class='del'>-	else</div><div class='del'>-		max_mtu = 18000 ; </div><div class='del'>-	</div><div class='del'>-	if (mtu &gt; max_mtu)</div><div class='del'>-		return -EINVAL ; </div><div class='del'>-	if (mtu &lt; 100) </div><div class='del'>-		return -EINVAL ; </div><div class='del'>-</div><div class='del'>-	dev-&gt;mtu = mtu ; </div><div class='del'>-	xl_priv-&gt;pkt_buf_sz = mtu + TR_HLEN ; </div><div class='del'>-</div><div class='del'>-	return 0 ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __devexit xl_remove_one (struct pci_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='del'>-	struct xl_private *xl_priv=netdev_priv(dev);</div><div class='del'>-	</div><div class='del'>-	release_firmware(xl_priv-&gt;fw);</div><div class='del'>-	unregister_netdev(dev);</div><div class='del'>-	iounmap(xl_priv-&gt;xl_mmio) ; </div><div class='del'>-	pci_release_regions(pdev) ; </div><div class='del'>-	pci_set_drvdata(pdev,NULL) ; </div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	return ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pci_driver xl_3c359_driver = {</div><div class='del'>-	.name		= "3c359",</div><div class='del'>-	.id_table	= xl_pci_tbl,</div><div class='del'>-	.probe		= xl_probe,</div><div class='del'>-	.remove		= __devexit_p(xl_remove_one),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init xl_pci_init (void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;xl_3c359_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void __exit xl_pci_cleanup (void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver (&amp;xl_3c359_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(xl_pci_init);</div><div class='del'>-module_exit(xl_pci_cleanup);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL") ; </div><div class='head'>diff --git a/drivers/net/tokenring/3c359.h b/drivers/net/tokenring/3c359.h<br/>deleted file mode 100644<br/>index bcb1a6b4a4c7..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/3c359.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/3c359.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,291 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  3c359.h (c) 2000 Mike Phillips (mikep@linuxtr.net) All Rights Reserved</div><div class='del'>- *</div><div class='del'>- *  Linux driver for 3Com 3C359 Token Link PCI XL cards.</div><div class='del'>- *</div><div class='del'>- *  This software may be used and distributed according to the terms</div><div class='del'>- *  of the GNU General Public License Version 2 or (at your option) </div><div class='del'>- *  any later verion, incorporated herein by reference.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* Memory Access Commands */</div><div class='del'>-#define IO_BYTE_READ 0x28 &lt;&lt; 24</div><div class='del'>-#define IO_BYTE_WRITE 0x18 &lt;&lt; 24 </div><div class='del'>-#define IO_WORD_READ 0x20 &lt;&lt; 24</div><div class='del'>-#define IO_WORD_WRITE 0x10 &lt;&lt; 24</div><div class='del'>-#define MMIO_BYTE_READ 0x88 &lt;&lt; 24</div><div class='del'>-#define MMIO_BYTE_WRITE 0x48 &lt;&lt; 24</div><div class='del'>-#define MMIO_WORD_READ 0x80 &lt;&lt; 24</div><div class='del'>-#define MMIO_WORD_WRITE 0x40 &lt;&lt; 24</div><div class='del'>-#define MEM_BYTE_READ 0x8C &lt;&lt; 24</div><div class='del'>-#define MEM_BYTE_WRITE 0x4C &lt;&lt; 24</div><div class='del'>-#define MEM_WORD_READ 0x84 &lt;&lt; 24</div><div class='del'>-#define MEM_WORD_WRITE 0x44 &lt;&lt; 24</div><div class='del'>-</div><div class='del'>-#define PMBAR 0x1C80</div><div class='del'>-#define PMB_CPHOLD (1&lt;&lt;10)</div><div class='del'>-</div><div class='del'>-#define CPATTENTION 0x180D</div><div class='del'>-#define CPA_PMBARVIS (1&lt;&lt;7)</div><div class='del'>-#define CPA_MEMWREN (1&lt;&lt;6)</div><div class='del'>-</div><div class='del'>-#define SWITCHSETTINGS 0x1C88</div><div class='del'>-#define EECONTROL 0x1C8A</div><div class='del'>-#define EEDATA 0x1C8C</div><div class='del'>-#define EEREAD 0x0080 </div><div class='del'>-#define EEWRITE 0x0040</div><div class='del'>-#define EEERASE 0x0060</div><div class='del'>-#define EE_ENABLE_WRITE 0x0030</div><div class='del'>-#define EEBUSY (1&lt;&lt;15)</div><div class='del'>-</div><div class='del'>-#define WRBR 0xCDE02</div><div class='del'>-#define WWOR 0xCDE04</div><div class='del'>-#define WWCR 0xCDE06</div><div class='del'>-#define MACSTATUS 0xCDE08 </div><div class='del'>-#define MISR_RW 0xCDE0B</div><div class='del'>-#define MISR_AND 0xCDE2B</div><div class='del'>-#define MISR_SET 0xCDE4B</div><div class='del'>-#define RXBUFAREA 0xCDE10</div><div class='del'>-#define RXEARLYTHRESH 0xCDE12</div><div class='del'>-#define TXSTARTTHRESH 0x58</div><div class='del'>-#define DNPRIREQTHRESH 0x2C</div><div class='del'>-</div><div class='del'>-#define MISR_CSRB (1&lt;&lt;5)</div><div class='del'>-#define MISR_RASB (1&lt;&lt;4)</div><div class='del'>-#define MISR_SRBFR (1&lt;&lt;3)</div><div class='del'>-#define MISR_ASBFR (1&lt;&lt;2)</div><div class='del'>-#define MISR_ARBF (1&lt;&lt;1) </div><div class='del'>-</div><div class='del'>-/* MISR Flags memory locations */</div><div class='del'>-#define MF_SSBF 0xDFFE0 </div><div class='del'>-#define MF_ARBF 0xDFFE1</div><div class='del'>-#define MF_ASBFR 0xDFFE2</div><div class='del'>-#define MF_SRBFR 0xDFFE3</div><div class='del'>-#define MF_RASB 0xDFFE4</div><div class='del'>-#define MF_CSRB 0xDFFE5</div><div class='del'>-</div><div class='del'>-#define MMIO_MACDATA 0x10 </div><div class='del'>-#define MMIO_MAC_ACCESS_CMD 0x14</div><div class='del'>-#define MMIO_TIMER 0x1A</div><div class='del'>-#define MMIO_DMA_CTRL 0x20</div><div class='del'>-#define MMIO_DNLISTPTR 0x24</div><div class='del'>-#define MMIO_HASHFILTER 0x28</div><div class='del'>-#define MMIO_CONFIG 0x29</div><div class='del'>-#define MMIO_DNPRIREQTHRESH 0x2C</div><div class='del'>-#define MMIO_DNPOLL 0x2D</div><div class='del'>-#define MMIO_UPPKTSTATUS 0x30</div><div class='del'>-#define MMIO_FREETIMER 0x34</div><div class='del'>-#define MMIO_COUNTDOWN 0x36</div><div class='del'>-#define MMIO_UPLISTPTR 0x38</div><div class='del'>-#define MMIO_UPPOLL 0x3C</div><div class='del'>-#define MMIO_UPBURSTTHRESH 0x40</div><div class='del'>-#define MMIO_DNBURSTTHRESH 0x41</div><div class='del'>-#define MMIO_INTSTATUS_AUTO 0x56</div><div class='del'>-#define MMIO_TXSTARTTHRESH 0x58</div><div class='del'>-#define MMIO_INTERRUPTENABLE 0x5A</div><div class='del'>-#define MMIO_INDICATIONENABLE 0x5C</div><div class='del'>-#define MMIO_COMMAND 0x5E  /* These two are meant to be the same */</div><div class='del'>-#define MMIO_INTSTATUS 0x5E /* Makes the code more readable this way */</div><div class='del'>-#define INTSTAT_CMD_IN_PROGRESS (1&lt;&lt;12) </div><div class='del'>-#define INTSTAT_SRB (1&lt;&lt;14)</div><div class='del'>-#define INTSTAT_INTLATCH (1&lt;&lt;0)</div><div class='del'>-</div><div class='del'>-/* Indication / Interrupt Mask </div><div class='del'>- * Annoyingly the bits to be set in the indication and interrupt enable</div><div class='del'>- * do not match with the actual bits received in the interrupt, although</div><div class='del'>- * they are in the same order. </div><div class='del'>- * The mapping for the indication / interrupt are:</div><div class='del'>- * Bit	Indication / Interrupt</div><div class='del'>- *   0	HostError</div><div class='del'>- *   1	txcomplete</div><div class='del'>- *   2	updneeded</div><div class='del'>- *   3	rxcomplete</div><div class='del'>- *   4	intrequested</div><div class='del'>- *   5	macerror</div><div class='del'>- *   6  dncomplete</div><div class='del'>- *   7	upcomplete</div><div class='del'>- *   8	txunderrun</div><div class='del'>- *   9	asbf</div><div class='del'>- *  10	srbr</div><div class='del'>- *  11	arbc</div><div class='del'>- *</div><div class='del'>- *  The only ones we don't want to receive are txcomplete and rxcomplete</div><div class='del'>- *  we use dncomplete and upcomplete instead.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define INT_MASK 0xFF5</div><div class='del'>-</div><div class='del'>-/* Note the subtle difference here, IND and INT */</div><div class='del'>-</div><div class='del'>-#define SETINDENABLE (8&lt;&lt;12)</div><div class='del'>-#define SETINTENABLE (7&lt;&lt;12)</div><div class='del'>-#define SRBBIT (1&lt;&lt;10)</div><div class='del'>-#define ASBBIT (1&lt;&lt;9)</div><div class='del'>-#define ARBBIT (1&lt;&lt;11)</div><div class='del'>-</div><div class='del'>-#define SRB 0xDFE90</div><div class='del'>-#define ASB 0xDFED0</div><div class='del'>-#define ARB 0xD0000</div><div class='del'>-#define SCRATCH 0xDFEF0</div><div class='del'>-</div><div class='del'>-#define INT_REQUEST 0x6000 /* (6 &lt;&lt; 12) */</div><div class='del'>-#define ACK_INTERRUPT 0x6800 /* (13 &lt;&lt;11) */</div><div class='del'>-#define GLOBAL_RESET 0x00 </div><div class='del'>-#define DNDISABLE 0x5000 </div><div class='del'>-#define DNENABLE 0x4800 </div><div class='del'>-#define DNSTALL 0x3002</div><div class='del'>-#define DNRESET 0x5800</div><div class='del'>-#define DNUNSTALL 0x3003</div><div class='del'>-#define UPRESET 0x2800</div><div class='del'>-#define UPSTALL 0x3000</div><div class='del'>-#define UPUNSTALL 0x3001</div><div class='del'>-#define SETCONFIG 0x4000</div><div class='del'>-#define SETTXSTARTTHRESH 0x9800 </div><div class='del'>-</div><div class='del'>-/* Received Interrupts */</div><div class='del'>-#define ASBFINT (1&lt;&lt;13)</div><div class='del'>-#define SRBRINT (1&lt;&lt;14)</div><div class='del'>-#define ARBCINT (1&lt;&lt;15)</div><div class='del'>-#define TXUNDERRUN (1&lt;&lt;11)</div><div class='del'>-</div><div class='del'>-#define UPCOMPINT (1&lt;&lt;10)</div><div class='del'>-#define DNCOMPINT (1&lt;&lt;9)</div><div class='del'>-#define HARDERRINT (1&lt;&lt;7)</div><div class='del'>-#define RXCOMPLETE (1&lt;&lt;4)</div><div class='del'>-#define TXCOMPINT (1&lt;&lt;2)</div><div class='del'>-#define HOSTERRINT (1&lt;&lt;1)</div><div class='del'>-</div><div class='del'>-/* Receive descriptor bits */</div><div class='del'>-#define RXOVERRUN cpu_to_le32(1&lt;&lt;19)</div><div class='del'>-#define RXFC cpu_to_le32(1&lt;&lt;21)</div><div class='del'>-#define RXAR cpu_to_le32(1&lt;&lt;22)</div><div class='del'>-#define RXUPDCOMPLETE cpu_to_le32(1&lt;&lt;23)</div><div class='del'>-#define RXUPDFULL cpu_to_le32(1&lt;&lt;24)</div><div class='del'>-#define RXUPLASTFRAG cpu_to_le32(1&lt;&lt;31)</div><div class='del'>-</div><div class='del'>-/* Transmit descriptor bits */</div><div class='del'>-#define TXDNCOMPLETE cpu_to_le32(1&lt;&lt;16)</div><div class='del'>-#define TXTXINDICATE cpu_to_le32(1&lt;&lt;27)</div><div class='del'>-#define TXDPDEMPTY cpu_to_le32(1&lt;&lt;29)</div><div class='del'>-#define TXDNINDICATE cpu_to_le32(1&lt;&lt;31)</div><div class='del'>-#define TXDNFRAGLAST cpu_to_le32(1&lt;&lt;31)</div><div class='del'>-</div><div class='del'>-/* Interrupts to Acknowledge */</div><div class='del'>-#define LATCH_ACK 1 </div><div class='del'>-#define TXCOMPACK (1&lt;&lt;1)</div><div class='del'>-#define INTREQACK (1&lt;&lt;2)</div><div class='del'>-#define DNCOMPACK (1&lt;&lt;3)</div><div class='del'>-#define UPCOMPACK (1&lt;&lt;4)</div><div class='del'>-#define ASBFACK (1&lt;&lt;5)</div><div class='del'>-#define SRBRACK (1&lt;&lt;6)</div><div class='del'>-#define ARBCACK (1&lt;&lt;7)</div><div class='del'>-</div><div class='del'>-#define XL_IO_SPACE 128</div><div class='del'>-#define SRB_COMMAND_SIZE 50</div><div class='del'>-</div><div class='del'>-/* Adapter Commands */</div><div class='del'>-#define REQUEST_INT 0x00</div><div class='del'>-#define MODIFY_OPEN_PARMS 0x01</div><div class='del'>-#define RESTORE_OPEN_PARMS 0x02</div><div class='del'>-#define OPEN_NIC 0x03</div><div class='del'>-#define CLOSE_NIC 0x04</div><div class='del'>-#define SET_SLEEP_MODE 0x05</div><div class='del'>-#define SET_GROUP_ADDRESS 0x06</div><div class='del'>-#define SET_FUNC_ADDRESS 0x07</div><div class='del'>-#define READ_LOG 0x08</div><div class='del'>-#define SET_MULTICAST_MODE 0x0C</div><div class='del'>-#define CHANGE_WAKEUP_PATTERN 0x0D</div><div class='del'>-#define GET_STATISTICS 0x13</div><div class='del'>-#define SET_RECEIVE_MODE 0x1F</div><div class='del'>-</div><div class='del'>-/* ARB Commands */</div><div class='del'>-#define RECEIVE_DATA 0x81</div><div class='del'>-#define RING_STATUS_CHANGE 0x84</div><div class='del'>-</div><div class='del'>-/* ASB Commands */</div><div class='del'>-#define ASB_RECEIVE_DATE 0x81 </div><div class='del'>-</div><div class='del'>-/* Defines for LAN STATUS CHANGE reports */</div><div class='del'>-#define LSC_SIG_LOSS 0x8000</div><div class='del'>-#define LSC_HARD_ERR 0x4000</div><div class='del'>-#define LSC_SOFT_ERR 0x2000</div><div class='del'>-#define LSC_TRAN_BCN 0x1000</div><div class='del'>-#define LSC_LWF      0x0800</div><div class='del'>-#define LSC_ARW      0x0400</div><div class='del'>-#define LSC_FPE      0x0200</div><div class='del'>-#define LSC_RR       0x0100</div><div class='del'>-#define LSC_CO       0x0080</div><div class='del'>-#define LSC_SS       0x0040</div><div class='del'>-#define LSC_RING_REC 0x0020</div><div class='del'>-#define LSC_SR_CO    0x0010</div><div class='del'>-#define LSC_FDX_MODE 0x0004</div><div class='del'>-</div><div class='del'>-#define XL_MAX_ADAPTERS 8 /* 0x08 __MODULE_STRING can't hand 0xnn */</div><div class='del'>-</div><div class='del'>-/* 3c359 defaults for buffers */</div><div class='del'>- </div><div class='del'>-#define XL_RX_RING_SIZE 16 /* must be a power of 2 */</div><div class='del'>-#define XL_TX_RING_SIZE 16 /* must be a power of 2 */</div><div class='del'>-</div><div class='del'>-#define PKT_BUF_SZ 4096 /* Default packet size */</div><div class='del'>-</div><div class='del'>-/* 3c359 data structures */</div><div class='del'>-</div><div class='del'>-struct xl_tx_desc {</div><div class='del'>-	__le32 dnnextptr;</div><div class='del'>-	__le32 framestartheader;</div><div class='del'>-	__le32 buffer;</div><div class='del'>-	__le32 buffer_length;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct xl_rx_desc {</div><div class='del'>-	__le32 upnextptr;</div><div class='del'>-	__le32 framestatus;</div><div class='del'>-	__le32 upfragaddr;</div><div class='del'>-	__le32 upfraglen;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct xl_private {</div><div class='del'>-	</div><div class='del'>-</div><div class='del'>-	/* These two structures must be aligned on 8 byte boundaries */</div><div class='del'>-</div><div class='del'>-	/* struct xl_rx_desc xl_rx_ring[XL_RX_RING_SIZE]; */</div><div class='del'>-	/* struct xl_tx_desc xl_tx_ring[XL_TX_RING_SIZE]; */</div><div class='del'>-	struct xl_rx_desc *xl_rx_ring ; </div><div class='del'>-	struct xl_tx_desc *xl_tx_ring ; </div><div class='del'>-	struct sk_buff *tx_ring_skb[XL_TX_RING_SIZE], *rx_ring_skb[XL_RX_RING_SIZE];	</div><div class='del'>-	int tx_ring_head, tx_ring_tail ;  </div><div class='del'>-	int rx_ring_tail, rx_ring_no ; </div><div class='del'>-	int free_ring_entries ; </div><div class='del'>-</div><div class='del'>-	u16 srb;</div><div class='del'>-	u16 arb;</div><div class='del'>-	u16 asb;</div><div class='del'>-</div><div class='del'>-	u8 __iomem *xl_mmio;</div><div class='del'>-	const char *xl_card_name;</div><div class='del'>-	struct pci_dev *pdev ; </div><div class='del'>-	</div><div class='del'>-	spinlock_t xl_lock ; </div><div class='del'>-</div><div class='del'>-	volatile int srb_queued;    </div><div class='del'>-	struct wait_queue *srb_wait;</div><div class='del'>-	volatile int asb_queued;   </div><div class='del'>-</div><div class='del'>-	u16 mac_buffer ; 	</div><div class='del'>-	u16 xl_lan_status ;</div><div class='del'>-	u8 xl_ring_speed ;</div><div class='del'>-	u16 pkt_buf_sz ; </div><div class='del'>-	u8 xl_message_level; </div><div class='del'>-	u16 xl_copy_all_options ;  </div><div class='del'>-	unsigned char xl_functional_addr[4] ; </div><div class='del'>-	u16 xl_addr_table_addr, xl_parms_addr ; </div><div class='del'>-	u8 xl_laa[6] ; </div><div class='del'>-	u32 rx_ring_dma_addr ; </div><div class='del'>-	u32 tx_ring_dma_addr ; </div><div class='del'>-</div><div class='del'>-	/* firmware section */</div><div class='del'>-	const struct firmware *fw;</div><div class='del'>-};</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/tokenring/Kconfig b/drivers/net/tokenring/Kconfig<br/>deleted file mode 100644<br/>index 45550d42b368..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,199 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Token Ring driver configuration</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-# So far, we only have PCI, ISA, and MCA token ring devices</div><div class='del'>-menuconfig TR</div><div class='del'>-	bool "Token Ring driver support"</div><div class='del'>-	depends on NETDEVICES &amp;&amp; !UML</div><div class='del'>-	depends on (PCI || ISA || MCA || CCW || PCMCIA)</div><div class='del'>-	help</div><div class='del'>-	  Token Ring is IBM's way of communication on a local network; the</div><div class='del'>-	  rest of the world uses Ethernet. To participate on a Token Ring</div><div class='del'>-	  network, you need a special Token ring network card. If you are</div><div class='del'>-	  connected to such a Token Ring network and want to use your Token</div><div class='del'>-	  Ring card under Linux, say Y here and to the driver for your</div><div class='del'>-	  particular card below and read the Token-Ring mini-HOWTO, available</div><div class='del'>-	  from &lt;http://www.tldp.org/docs.html#howto&gt;. Most people can</div><div class='del'>-	  say N here.</div><div class='del'>-</div><div class='del'>-if TR</div><div class='del'>-</div><div class='del'>-config WANT_LLC</div><div class='del'>-	def_bool y</div><div class='del'>-	select LLC</div><div class='del'>-</div><div class='del'>-config PCMCIA_IBMTR</div><div class='del'>-	tristate "IBM PCMCIA tokenring adapter support"</div><div class='del'>-	depends on IBMTR!=y &amp;&amp; PCMCIA</div><div class='del'>-	---help---</div><div class='del'>-	  Say Y here if you intend to attach this type of Token Ring PCMCIA</div><div class='del'>-	  card to your computer. You then also need to say Y to "Token Ring</div><div class='del'>-	  driver support".</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called ibmtr_cs.</div><div class='del'>-</div><div class='del'>-config IBMTR</div><div class='del'>-	tristate "IBM Tropic chipset based adapter support"</div><div class='del'>-	depends on ISA || MCA</div><div class='del'>-	---help---</div><div class='del'>-	  This is support for all IBM Token Ring cards that don't use DMA. If</div><div class='del'>-	  you have such a beast, say Y and read the Token-Ring mini-HOWTO,</div><div class='del'>-	  available from &lt;http://www.tldp.org/docs.html#howto&gt;.</div><div class='del'>-</div><div class='del'>-	  Warning: this driver will almost definitely fail if more than one</div><div class='del'>-	  active Token Ring card is present.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called ibmtr.</div><div class='del'>-</div><div class='del'>-config IBMOL</div><div class='del'>-	tristate "IBM Olympic chipset PCI adapter support"</div><div class='del'>-	depends on PCI</div><div class='del'>-	---help---</div><div class='del'>-	  This is support for all non-Lanstreamer IBM PCI Token Ring Cards.</div><div class='del'>-	  Specifically this is all IBM PCI, PCI Wake On Lan, PCI II, PCI II</div><div class='del'>-	  Wake On Lan, and PCI 100/16/4 adapters.</div><div class='del'>-</div><div class='del'>-	  If you have such an adapter, say Y and read the Token-Ring</div><div class='del'>-	  mini-HOWTO, available from &lt;http://www.tldp.org/docs.html#howto&gt;.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called olympic.</div><div class='del'>-</div><div class='del'>-	  Also read &lt;file:Documentation/networking/olympic.txt&gt; or check the</div><div class='del'>-	  Linux Token Ring Project site for the latest information at</div><div class='del'>-	  &lt;http://www.linuxtr.net/&gt;.</div><div class='del'>-</div><div class='del'>-config IBMLS</div><div class='del'>-	tristate "IBM Lanstreamer chipset PCI adapter support"</div><div class='del'>-	depends on PCI &amp;&amp; !64BIT</div><div class='del'>-	help</div><div class='del'>-	  This is support for IBM Lanstreamer PCI Token Ring Cards.</div><div class='del'>-</div><div class='del'>-	  If you have such an adapter, say Y and read the Token-Ring</div><div class='del'>-	  mini-HOWTO, available from &lt;http://www.tldp.org/docs.html#howto&gt;.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called lanstreamer.</div><div class='del'>-</div><div class='del'>-config 3C359</div><div class='del'>-	tristate "3Com 3C359 Token Link Velocity XL adapter support"</div><div class='del'>-	depends on PCI</div><div class='del'>-	---help---</div><div class='del'>-	  This is support for the 3Com PCI Velocity XL cards, specifically</div><div class='del'>-	  the 3Com 3C359, please note this is not for the 3C339 cards, you</div><div class='del'>-	  should use the tms380 driver instead.</div><div class='del'>-</div><div class='del'>-	  If you have such an adapter, say Y and read the Token-Ring</div><div class='del'>-	  mini-HOWTO, available from &lt;http://www.tldp.org/docs.html#howto&gt;.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called 3c359.</div><div class='del'>-</div><div class='del'>-	  Also read the file &lt;file:Documentation/networking/3c359.txt&gt; or check the </div><div class='del'>-	  Linux Token Ring Project site for the latest information at</div><div class='del'>-	  &lt;http://www.linuxtr.net&gt;</div><div class='del'>-</div><div class='del'>-config TMS380TR</div><div class='del'>-	tristate "Generic TMS380 Token Ring ISA/PCI adapter support"</div><div class='del'>-	depends on PCI || ISA &amp;&amp; ISA_DMA_API || MCA</div><div class='del'>-	select FW_LOADER</div><div class='del'>-	---help---</div><div class='del'>-	  This driver provides generic support for token ring adapters</div><div class='del'>-	  based on the Texas Instruments TMS380 series chipsets.  This</div><div class='del'>-	  includes the SysKonnect TR4/16(+) ISA (SK-4190), SysKonnect</div><div class='del'>-	  TR4/16(+) PCI (SK-4590), SysKonnect TR4/16 PCI (SK-4591),</div><div class='del'>-	  Compaq 4/16 PCI, Thomas-Conrad TC4048 4/16 PCI, and several</div><div class='del'>-	  Madge adapters.  If you say Y here, you will be asked to select</div><div class='del'>-	  which cards to support below.  If you're using modules, each</div><div class='del'>-	  class of card will be supported by a separate module.</div><div class='del'>-</div><div class='del'>-	  If you have such an adapter and would like to use it, say Y and</div><div class='del'>-	  read the Token-Ring mini-HOWTO, available from</div><div class='del'>-	  &lt;http://www.tldp.org/docs.html#howto&gt;.</div><div class='del'>-</div><div class='del'>-	  Also read the file &lt;file:Documentation/networking/tms380tr.txt&gt; or</div><div class='del'>-	  check &lt;http://www.auk.cx/tms380tr/&gt;.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called tms380tr.</div><div class='del'>-</div><div class='del'>-config TMSPCI</div><div class='del'>-	tristate "Generic TMS380 PCI support"</div><div class='del'>-	depends on TMS380TR &amp;&amp; PCI</div><div class='del'>-	---help---</div><div class='del'>-	  This tms380 module supports generic TMS380-based PCI cards.</div><div class='del'>-</div><div class='del'>-	  These cards are known to work:</div><div class='del'>-	  - Compaq 4/16 TR PCI</div><div class='del'>-	  - SysKonnect TR4/16 PCI (SK-4590/SK-4591)</div><div class='del'>-	  - Thomas-Conrad TC4048 PCI 4/16</div><div class='del'>-	  - 3Com Token Link Velocity</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called tmspci.</div><div class='del'>-</div><div class='del'>-config SKISA</div><div class='del'>-	tristate "SysKonnect TR4/16 ISA support"</div><div class='del'>-	depends on TMS380TR &amp;&amp; ISA</div><div class='del'>-	help</div><div class='del'>-	  This tms380 module supports SysKonnect TR4/16 ISA cards.</div><div class='del'>-</div><div class='del'>-	  These cards are known to work:</div><div class='del'>-	  - SysKonnect TR4/16 ISA (SK-4190)</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called skisa.</div><div class='del'>-</div><div class='del'>-config PROTEON</div><div class='del'>-	tristate "Proteon ISA support"</div><div class='del'>-	depends on TMS380TR &amp;&amp; ISA</div><div class='del'>-	help</div><div class='del'>-	  This tms380 module supports Proteon ISA cards.</div><div class='del'>-</div><div class='del'>-	  These cards are known to work:</div><div class='del'>-	  - Proteon 1392</div><div class='del'>-	  - Proteon 1392 plus</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called proteon.</div><div class='del'>-</div><div class='del'>-config ABYSS</div><div class='del'>-	tristate "Madge Smart 16/4 PCI Mk2 support"</div><div class='del'>-	depends on TMS380TR &amp;&amp; PCI</div><div class='del'>-	help</div><div class='del'>-	  This tms380 module supports the Madge Smart 16/4 PCI Mk2</div><div class='del'>-	  cards (51-02).</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called abyss.</div><div class='del'>-</div><div class='del'>-config MADGEMC</div><div class='del'>-	tristate "Madge Smart 16/4 Ringnode MicroChannel"</div><div class='del'>-	depends on TMS380TR &amp;&amp; MCA</div><div class='del'>-	help</div><div class='del'>-	  This tms380 module supports the Madge Smart 16/4 MC16 and MC32</div><div class='del'>-	  MicroChannel adapters.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called madgemc.</div><div class='del'>-</div><div class='del'>-config SMCTR</div><div class='del'>-	tristate "SMC ISA/MCA adapter support"</div><div class='del'>-	depends on (ISA || MCA_LEGACY) &amp;&amp; (BROKEN || !64BIT)</div><div class='del'>-	---help---</div><div class='del'>-	  This is support for the ISA and MCA SMC Token Ring cards,</div><div class='del'>-	  specifically SMC TokenCard Elite (8115T) and SMC TokenCard Elite/A</div><div class='del'>-	  (8115T/A) adapters.</div><div class='del'>-</div><div class='del'>-	  If you have such an adapter and would like to use it, say Y or M and</div><div class='del'>-	  read the Token-Ring mini-HOWTO, available from</div><div class='del'>-	  &lt;http://www.tldp.org/docs.html#howto&gt; and the file</div><div class='del'>-	  &lt;file:Documentation/networking/smctr.txt&gt;.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called smctr.</div><div class='del'>-</div><div class='del'>-endif # TR</div><div class='head'>diff --git a/drivers/net/tokenring/Makefile b/drivers/net/tokenring/Makefile<br/>deleted file mode 100644<br/>index f1be8d97b7a8..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for drivers/net/tokenring</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_PCMCIA_IBMTR)	+= ibmtr_cs.o</div><div class='del'>-obj-$(CONFIG_IBMTR)	+= ibmtr.o</div><div class='del'>-obj-$(CONFIG_IBMOL)	+= olympic.o</div><div class='del'>-obj-$(CONFIG_IBMLS)	+= lanstreamer.o</div><div class='del'>-obj-$(CONFIG_TMS380TR)	+= tms380tr.o</div><div class='del'>-obj-$(CONFIG_ABYSS)	+= abyss.o</div><div class='del'>-obj-$(CONFIG_MADGEMC)	+= madgemc.o</div><div class='del'>-obj-$(CONFIG_PROTEON)	+= proteon.o</div><div class='del'>-obj-$(CONFIG_TMSPCI)	+= tmspci.o</div><div class='del'>-obj-$(CONFIG_SKISA)	+= skisa.o</div><div class='del'>-obj-$(CONFIG_SMCTR)	+= smctr.o</div><div class='del'>-obj-$(CONFIG_3C359)	+= 3c359.o</div><div class='head'>diff --git a/drivers/net/tokenring/abyss.c b/drivers/net/tokenring/abyss.c<br/>deleted file mode 100644<br/>index b715e6b444da..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/abyss.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/abyss.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,468 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  abyss.c: Network driver for the Madge Smart 16/4 PCI Mk2 token ring card.</div><div class='del'>- *</div><div class='del'>- *  Written 1999-2000 by Adam Fritzler</div><div class='del'>- *</div><div class='del'>- *  This software may be used and distributed according to the terms</div><div class='del'>- *  of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- *</div><div class='del'>- *  This driver module supports the following cards:</div><div class='del'>- *      - Madge Smart 16/4 PCI Mk2</div><div class='del'>- *</div><div class='del'>- *  Maintainer(s):</div><div class='del'>- *    AF	Adam Fritzler</div><div class='del'>- *</div><div class='del'>- *  Modification History:</div><div class='del'>- *	30-Dec-99	AF	Split off from the tms380tr driver.</div><div class='del'>- *	22-Jan-00	AF	Updated to use indirect read/writes </div><div class='del'>- *	23-Nov-00	JG	New PCI API, cleanups</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- *  TODO:</div><div class='del'>- *	1. See if we can use MMIO instead of inb/outb/inw/outw</div><div class='del'>- *	2. Add support for Mk1 (has AT24 attached to the PCI</div><div class='del'>- *		config registers)</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include "tms380tr.h"</div><div class='del'>-#include "abyss.h"            /* Madge-specific constants */</div><div class='del'>-</div><div class='del'>-static char version[] __devinitdata =</div><div class='del'>-"abyss.c: v1.02 23/11/2000 by Adam Fritzler\n";</div><div class='del'>-</div><div class='del'>-#define ABYSS_IO_EXTENT 64</div><div class='del'>-</div><div class='del'>-static DEFINE_PCI_DEVICE_TABLE(abyss_pci_tbl) = {</div><div class='del'>-	{ PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_MK2,</div><div class='del'>-	  PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_TOKEN_RING &lt;&lt; 8, 0x00ffffff, },</div><div class='del'>-	{ }			/* Terminating entry */</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(pci, abyss_pci_tbl);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-static int abyss_open(struct net_device *dev);</div><div class='del'>-static int abyss_close(struct net_device *dev);</div><div class='del'>-static void abyss_enable(struct net_device *dev);</div><div class='del'>-static int abyss_chipset_init(struct net_device *dev);</div><div class='del'>-static void abyss_read_eeprom(struct net_device *dev);</div><div class='del'>-static unsigned short abyss_setnselout_pins(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-static void at24_writedatabyte(unsigned long regaddr, unsigned char byte);</div><div class='del'>-static int at24_sendfullcmd(unsigned long regaddr, unsigned char cmd, unsigned char addr);</div><div class='del'>-static int at24_sendcmd(unsigned long regaddr, unsigned char cmd);</div><div class='del'>-static unsigned char at24_readdatabit(unsigned long regaddr);</div><div class='del'>-static unsigned char at24_readdatabyte(unsigned long regaddr);</div><div class='del'>-static int at24_waitforack(unsigned long regaddr);</div><div class='del'>-static int at24_waitfornack(unsigned long regaddr);</div><div class='del'>-static void at24_setlines(unsigned long regaddr, unsigned char clock, unsigned char data);</div><div class='del'>-static void at24_start(unsigned long regaddr);</div><div class='del'>-static unsigned char at24_readb(unsigned long regaddr, unsigned char addr);</div><div class='del'>-</div><div class='del'>-static unsigned short abyss_sifreadb(struct net_device *dev, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	return inb(dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned short abyss_sifreadw(struct net_device *dev, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	return inw(dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void abyss_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	outb(val, dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void abyss_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	outw(val, dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct net_device_ops abyss_netdev_ops;</div><div class='del'>-</div><div class='del'>-static int __devinit abyss_attach(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='del'>-{	</div><div class='del'>-	static int versionprinted;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct net_local *tp;</div><div class='del'>-	int ret, pci_irq_line;</div><div class='del'>-	unsigned long pci_ioaddr;</div><div class='del'>-	</div><div class='del'>-	if (versionprinted++ == 0)</div><div class='del'>-		printk("%s", version);</div><div class='del'>-</div><div class='del'>-	if (pci_enable_device(pdev))</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	/* Remove I/O space marker in bit 0. */</div><div class='del'>-	pci_irq_line = pdev-&gt;irq;</div><div class='del'>-	pci_ioaddr = pci_resource_start (pdev, 0);</div><div class='del'>-		</div><div class='del'>-	/* At this point we have found a valid card. */</div><div class='del'>-		</div><div class='del'>-	dev = alloc_trdev(sizeof(struct net_local));</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	if (!request_region(pci_ioaddr, ABYSS_IO_EXTENT, dev-&gt;name)) {</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto err_out_trdev;</div><div class='del'>-	}</div><div class='del'>-		</div><div class='del'>-	ret = request_irq(pdev-&gt;irq, tms380tr_interrupt, IRQF_SHARED,</div><div class='del'>-			  dev-&gt;name, dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_out_region;</div><div class='del'>-		</div><div class='del'>-	dev-&gt;base_addr	= pci_ioaddr;</div><div class='del'>-	dev-&gt;irq	= pci_irq_line;</div><div class='del'>-		</div><div class='del'>-	printk("%s: Madge Smart 16/4 PCI Mk2 (Abyss)\n", dev-&gt;name);</div><div class='del'>-	printk("%s:    IO: %#4lx  IRQ: %d\n",</div><div class='del'>-	       dev-&gt;name, pci_ioaddr, dev-&gt;irq);</div><div class='del'>-	/*</div><div class='del'>-	 * The TMS SIF registers lay 0x10 above the card base address.</div><div class='del'>-	 */</div><div class='del'>-	dev-&gt;base_addr += 0x10;</div><div class='del'>-		</div><div class='del'>-	ret = tmsdev_init(dev, &amp;pdev-&gt;dev);</div><div class='del'>-	if (ret) {</div><div class='del'>-		printk("%s: unable to get memory for dev-&gt;priv.\n", </div><div class='del'>-		       dev-&gt;name);</div><div class='del'>-		goto err_out_irq;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	abyss_read_eeprom(dev);</div><div class='del'>-</div><div class='del'>-	printk("%s:    Ring Station Address: %pM\n", dev-&gt;name, dev-&gt;dev_addr);</div><div class='del'>-</div><div class='del'>-	tp = netdev_priv(dev);</div><div class='del'>-	tp-&gt;setnselout = abyss_setnselout_pins;</div><div class='del'>-	tp-&gt;sifreadb = abyss_sifreadb;</div><div class='del'>-	tp-&gt;sifreadw = abyss_sifreadw;</div><div class='del'>-	tp-&gt;sifwriteb = abyss_sifwriteb;</div><div class='del'>-	tp-&gt;sifwritew = abyss_sifwritew;</div><div class='del'>-</div><div class='del'>-	memcpy(tp-&gt;ProductID, "Madge PCI 16/4 Mk2", PROD_ID_SIZE + 1);</div><div class='del'>-		</div><div class='del'>-	dev-&gt;netdev_ops = &amp;abyss_netdev_ops;</div><div class='del'>-</div><div class='del'>-	pci_set_drvdata(pdev, dev);</div><div class='del'>-	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	ret = register_netdev(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_out_tmsdev;</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_out_tmsdev:</div><div class='del'>-	pci_set_drvdata(pdev, NULL);</div><div class='del'>-	tmsdev_term(dev);</div><div class='del'>-err_out_irq:</div><div class='del'>-	free_irq(pdev-&gt;irq, dev);</div><div class='del'>-err_out_region:</div><div class='del'>-	release_region(pci_ioaddr, ABYSS_IO_EXTENT);</div><div class='del'>-err_out_trdev:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned short abyss_setnselout_pins(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned short val = 0;</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	</div><div class='del'>-	if(tp-&gt;DataRate == SPEED_4)</div><div class='del'>-		val |= 0x01;  /* Set 4Mbps */</div><div class='del'>-	else</div><div class='del'>-		val |= 0x00;  /* Set 16Mbps */</div><div class='del'>-	</div><div class='del'>-	return val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The following Madge boards should use this code:</div><div class='del'>- *   - Smart 16/4 PCI Mk2 (Abyss)</div><div class='del'>- *   - Smart 16/4 PCI Mk1 (PCI T)</div><div class='del'>- *   - Smart 16/4 Client Plus PnP (Big Apple)</div><div class='del'>- *   - Smart 16/4 Cardbus Mk2</div><div class='del'>- *</div><div class='del'>- * These access an Atmel AT24 SEEPROM using their glue chip registers. </div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static void at24_writedatabyte(unsigned long regaddr, unsigned char byte)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	</div><div class='del'>-	for (i = 0; i &lt; 8; i++) {</div><div class='del'>-		at24_setlines(regaddr, 0, (byte &gt;&gt; (7-i))&amp;0x01);</div><div class='del'>-		at24_setlines(regaddr, 1, (byte &gt;&gt; (7-i))&amp;0x01);</div><div class='del'>-		at24_setlines(regaddr, 0, (byte &gt;&gt; (7-i))&amp;0x01);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int at24_sendfullcmd(unsigned long regaddr, unsigned char cmd, unsigned char addr)</div><div class='del'>-{</div><div class='del'>-	if (at24_sendcmd(regaddr, cmd)) {</div><div class='del'>-		at24_writedatabyte(regaddr, addr);</div><div class='del'>-		return at24_waitforack(regaddr);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int at24_sendcmd(unsigned long regaddr, unsigned char cmd)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	</div><div class='del'>-	for (i = 0; i &lt; 10; i++) {</div><div class='del'>-		at24_start(regaddr);</div><div class='del'>-		at24_writedatabyte(regaddr, cmd);</div><div class='del'>-		if (at24_waitforack(regaddr))</div><div class='del'>-			return 1;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned char at24_readdatabit(unsigned long regaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned char val;</div><div class='del'>-</div><div class='del'>-	at24_setlines(regaddr, 0, 1);</div><div class='del'>-	at24_setlines(regaddr, 1, 1);</div><div class='del'>-	val = (inb(regaddr) &amp; AT24_DATA)?1:0;</div><div class='del'>-	at24_setlines(regaddr, 1, 1);</div><div class='del'>-	at24_setlines(regaddr, 0, 1);</div><div class='del'>-	return val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned char at24_readdatabyte(unsigned long regaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned char data = 0;</div><div class='del'>-	int i;</div><div class='del'>-	</div><div class='del'>-	for (i = 0; i &lt; 8; i++) {</div><div class='del'>-		data &lt;&lt;= 1;</div><div class='del'>-		data |= at24_readdatabit(regaddr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return data;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int at24_waitforack(unsigned long regaddr)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	</div><div class='del'>-	for (i = 0; i &lt; 10; i++) {</div><div class='del'>-		if ((at24_readdatabit(regaddr) &amp; 0x01) == 0x00)</div><div class='del'>-			return 1;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int at24_waitfornack(unsigned long regaddr)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	for (i = 0; i &lt; 10; i++) {</div><div class='del'>-		if ((at24_readdatabit(regaddr) &amp; 0x01) == 0x01)</div><div class='del'>-			return 1;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void at24_setlines(unsigned long regaddr, unsigned char clock, unsigned char data)</div><div class='del'>-{</div><div class='del'>-	unsigned char val = AT24_ENABLE;</div><div class='del'>-	if (clock)</div><div class='del'>-		val |= AT24_CLOCK;</div><div class='del'>-	if (data)</div><div class='del'>-		val |= AT24_DATA;</div><div class='del'>-</div><div class='del'>-	outb(val, regaddr); </div><div class='del'>-	tms380tr_wait(20); /* Very necessary. */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void at24_start(unsigned long regaddr)</div><div class='del'>-{</div><div class='del'>-	at24_setlines(regaddr, 0, 1);</div><div class='del'>-	at24_setlines(regaddr, 1, 1);</div><div class='del'>-	at24_setlines(regaddr, 1, 0);</div><div class='del'>-	at24_setlines(regaddr, 0, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned char at24_readb(unsigned long regaddr, unsigned char addr)</div><div class='del'>-{</div><div class='del'>-	unsigned char data = 0xff;</div><div class='del'>-	</div><div class='del'>-	if (at24_sendfullcmd(regaddr, AT24_WRITE, addr)) {</div><div class='del'>-		if (at24_sendcmd(regaddr, AT24_READ)) {</div><div class='del'>-			data = at24_readdatabyte(regaddr);</div><div class='del'>-			if (!at24_waitfornack(regaddr))</div><div class='del'>-				data = 0xff;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return data;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Enable basic functions of the Madge chipset needed</div><div class='del'>- * for initialization.</div><div class='del'>- */</div><div class='del'>-static void abyss_enable(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned char reset_reg;</div><div class='del'>-	unsigned long ioaddr;</div><div class='del'>-	</div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='del'>-	reset_reg = inb(ioaddr + PCIBM2_RESET_REG);</div><div class='del'>-	reset_reg |= PCIBM2_RESET_REG_CHIP_NRES;</div><div class='del'>-	outb(reset_reg, ioaddr + PCIBM2_RESET_REG);</div><div class='del'>-	tms380tr_wait(100);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Enable the functions of the Madge chipset needed for</div><div class='del'>- * full working order. </div><div class='del'>- */</div><div class='del'>-static int abyss_chipset_init(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned char reset_reg;</div><div class='del'>-	unsigned long ioaddr;</div><div class='del'>-	</div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='del'>-	</div><div class='del'>-	reset_reg = inb(ioaddr + PCIBM2_RESET_REG);</div><div class='del'>-	</div><div class='del'>-	reset_reg |= PCIBM2_RESET_REG_CHIP_NRES;</div><div class='del'>-	outb(reset_reg, ioaddr + PCIBM2_RESET_REG);</div><div class='del'>-	</div><div class='del'>-	reset_reg &amp;= ~(PCIBM2_RESET_REG_CHIP_NRES |</div><div class='del'>-		       PCIBM2_RESET_REG_FIFO_NRES | </div><div class='del'>-		       PCIBM2_RESET_REG_SIF_NRES);</div><div class='del'>-	outb(reset_reg, ioaddr + PCIBM2_RESET_REG);</div><div class='del'>-	</div><div class='del'>-	tms380tr_wait(100);</div><div class='del'>-	</div><div class='del'>-	reset_reg |= PCIBM2_RESET_REG_CHIP_NRES;</div><div class='del'>-	outb(reset_reg, ioaddr + PCIBM2_RESET_REG);</div><div class='del'>-	</div><div class='del'>-	reset_reg |= PCIBM2_RESET_REG_SIF_NRES;</div><div class='del'>-	outb(reset_reg, ioaddr + PCIBM2_RESET_REG);</div><div class='del'>-</div><div class='del'>-	reset_reg |= PCIBM2_RESET_REG_FIFO_NRES;</div><div class='del'>-	outb(reset_reg, ioaddr + PCIBM2_RESET_REG);</div><div class='del'>-</div><div class='del'>-	outb(PCIBM2_INT_CONTROL_REG_SINTEN | </div><div class='del'>-	     PCIBM2_INT_CONTROL_REG_PCI_ERR_ENABLE, </div><div class='del'>-	     ioaddr + PCIBM2_INT_CONTROL_REG);</div><div class='del'>-  </div><div class='del'>-	outb(30, ioaddr + PCIBM2_FIFO_THRESHOLD);</div><div class='del'>-	</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void abyss_chipset_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long ioaddr;</div><div class='del'>-	</div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='del'>-	outb(0, ioaddr + PCIBM2_RESET_REG);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Read configuration data from the AT24 SEEPROM on Madge cards.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static void abyss_read_eeprom(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp;</div><div class='del'>-	unsigned long ioaddr;</div><div class='del'>-	unsigned short val;</div><div class='del'>-	int i;</div><div class='del'>-	</div><div class='del'>-	tp = netdev_priv(dev);</div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='del'>-	</div><div class='del'>-	/* Must enable glue chip first */</div><div class='del'>-	abyss_enable(dev);</div><div class='del'>-	</div><div class='del'>-	val = at24_readb(ioaddr + PCIBM2_SEEPROM_REG, </div><div class='del'>-			 PCIBM2_SEEPROM_RING_SPEED);</div><div class='del'>-	tp-&gt;DataRate = val?SPEED_4:SPEED_16; /* set open speed */</div><div class='del'>-	printk("%s:    SEEPROM: ring speed: %dMb/sec\n", dev-&gt;name, tp-&gt;DataRate);</div><div class='del'>-	</div><div class='del'>-	val = at24_readb(ioaddr + PCIBM2_SEEPROM_REG,</div><div class='del'>-			 PCIBM2_SEEPROM_RAM_SIZE) * 128;</div><div class='del'>-	printk("%s:    SEEPROM: adapter RAM: %dkb\n", dev-&gt;name, val);</div><div class='del'>-	</div><div class='del'>-	dev-&gt;addr_len = 6;</div><div class='del'>-	for (i = 0; i &lt; 6; i++) </div><div class='del'>-		dev-&gt;dev_addr[i] = at24_readb(ioaddr + PCIBM2_SEEPROM_REG, </div><div class='del'>-					      PCIBM2_SEEPROM_BIA+i);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int abyss_open(struct net_device *dev)</div><div class='del'>-{  </div><div class='del'>-	abyss_chipset_init(dev);</div><div class='del'>-	tms380tr_open(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int abyss_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	tms380tr_close(dev);</div><div class='del'>-	abyss_chipset_close(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __devexit abyss_detach (struct pci_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='del'>-	</div><div class='del'>-	BUG_ON(!dev);</div><div class='del'>-	unregister_netdev(dev);</div><div class='del'>-	release_region(dev-&gt;base_addr-0x10, ABYSS_IO_EXTENT);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	tmsdev_term(dev);</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	pci_set_drvdata(pdev, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pci_driver abyss_driver = {</div><div class='del'>-	.name		= "abyss",</div><div class='del'>-	.id_table	= abyss_pci_tbl,</div><div class='del'>-	.probe		= abyss_attach,</div><div class='del'>-	.remove		= __devexit_p(abyss_detach),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init abyss_init (void)</div><div class='del'>-{</div><div class='del'>-	abyss_netdev_ops = tms380tr_netdev_ops;</div><div class='del'>-</div><div class='del'>-	abyss_netdev_ops.ndo_open = abyss_open;</div><div class='del'>-	abyss_netdev_ops.ndo_stop = abyss_close;</div><div class='del'>-</div><div class='del'>-	return pci_register_driver(&amp;abyss_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit abyss_rmmod (void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver (&amp;abyss_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(abyss_init);</div><div class='del'>-module_exit(abyss_rmmod);</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/tokenring/abyss.h b/drivers/net/tokenring/abyss.h<br/>deleted file mode 100644<br/>index b0a473b89133..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/abyss.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/abyss.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,58 +0,0 @@</div><div class='del'>-/* </div><div class='del'>- * abyss.h: Header for the abyss tms380tr module</div><div class='del'>- *</div><div class='del'>- * Authors:</div><div class='del'>- * - Adam Fritzler</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __LINUX_MADGETR_H</div><div class='del'>-#define __LINUX_MADGETR_H</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * For Madge Smart 16/4 PCI Mk2.  Since we increment the base address</div><div class='del'>- * to get everything correct for the TMS SIF, we do these as negatives</div><div class='del'>- * as they fall below the SIF in addressing.</div><div class='del'>- */</div><div class='del'>-#define PCIBM2_INT_STATUS_REG          ((short)-15)/* 0x01 */</div><div class='del'>-#define PCIBM2_INT_CONTROL_REG         ((short)-14)/* 0x02 */</div><div class='del'>-#define PCIBM2_RESET_REG               ((short)-12)/* 0x04 */</div><div class='del'>-#define PCIBM2_SEEPROM_REG             ((short)-9) /* 0x07 */</div><div class='del'>-</div><div class='del'>-#define PCIBM2_INT_CONTROL_REG_SINTEN           0x02</div><div class='del'>-#define PCIBM2_INT_CONTROL_REG_PCI_ERR_ENABLE   0x80</div><div class='del'>-#define PCIBM2_INT_STATUS_REG_PCI_ERR           0x80</div><div class='del'>-</div><div class='del'>-#define PCIBM2_RESET_REG_CHIP_NRES              0x01</div><div class='del'>-#define PCIBM2_RESET_REG_FIFO_NRES              0x02</div><div class='del'>-#define PCIBM2_RESET_REG_SIF_NRES               0x04</div><div class='del'>-</div><div class='del'>-#define PCIBM2_FIFO_THRESHOLD   0x21</div><div class='del'>-#define PCIBM2_BURST_LENGTH     0x22</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Bits in PCIBM2_SEEPROM_REG.</div><div class='del'>- */</div><div class='del'>-#define AT24_ENABLE             0x04</div><div class='del'>-#define AT24_DATA               0x02</div><div class='del'>-#define AT24_CLOCK              0x01</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * AT24 Commands.</div><div class='del'>- */</div><div class='del'>-#define AT24_WRITE              0xA0</div><div class='del'>-#define AT24_READ               0xA1</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Addresses in AT24 SEEPROM.</div><div class='del'>- */</div><div class='del'>-#define PCIBM2_SEEPROM_BIA          0x12</div><div class='del'>-#define PCIBM2_SEEPROM_RING_SPEED   0x18</div><div class='del'>-#define PCIBM2_SEEPROM_RAM_SIZE     0x1A</div><div class='del'>-#define PCIBM2_SEEPROM_HWF1         0x1C</div><div class='del'>-#define PCIBM2_SEEPROM_HWF2         0x1E</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-#endif /* __LINUX_MADGETR_H */</div><div class='head'>diff --git a/drivers/net/tokenring/ibmtr.c b/drivers/net/tokenring/ibmtr.c<br/>deleted file mode 100644<br/>index b5c8c18f5046..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/ibmtr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/ibmtr.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1964 +0,0 @@</div><div class='del'>-/* ibmtr.c:  A shared-memory IBM Token Ring 16/4 driver for linux</div><div class='del'>- *</div><div class='del'>- *	Written 1993 by Mark Swanson and Peter De Schrijver.</div><div class='del'>- *	This software may be used and distributed according to the terms</div><div class='del'>- *	of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- *</div><div class='del'>- *	This device driver should work with Any IBM Token Ring Card that does</div><div class='del'>- *	not use DMA.</div><div class='del'>- *</div><div class='del'>- *	I used Donald Becker's (becker@scyld.com) device driver work</div><div class='del'>- *	as a base for most of my initial work.</div><div class='del'>- *</div><div class='del'>- *	Changes by Peter De Schrijver</div><div class='del'>- *		(Peter.Deschrijver@linux.cc.kuleuven.ac.be) :</div><div class='del'>- *</div><div class='del'>- *	+ changed name to ibmtr.c in anticipation of other tr boards.</div><div class='del'>- *	+ changed reset code and adapter open code.</div><div class='del'>- *	+ added SAP open code.</div><div class='del'>- *	+ a first attempt to write interrupt, transmit and receive routines.</div><div class='del'>- *</div><div class='del'>- *	Changes by David W. Morris (dwm@shell.portal.com) :</div><div class='del'>- *	941003 dwm: - Restructure tok_probe for multiple adapters, devices.</div><div class='del'>- *	+ Add comments, misc reorg for clarity.</div><div class='del'>- *	+ Flatten interrupt handler levels.</div><div class='del'>- *</div><div class='del'>- *	Changes by Farzad Farid (farzy@zen.via.ecp.fr)</div><div class='del'>- *	and Pascal Andre (andre@chimay.via.ecp.fr) (March 9 1995) :</div><div class='del'>- *	+ multi ring support clean up.</div><div class='del'>- *	+ RFC1042 compliance enhanced.</div><div class='del'>- *</div><div class='del'>- *	Changes by Pascal Andre (andre@chimay.via.ecp.fr) (September 7 1995) :</div><div class='del'>- *	+ bug correction in tr_tx</div><div class='del'>- *	+ removed redundant information display</div><div class='del'>- *	+ some code reworking</div><div class='del'>- *</div><div class='del'>- *	Changes by Michel Lespinasse (walken@via.ecp.fr),</div><div class='del'>- *	Yann Doussot (doussot@via.ecp.fr) and Pascal Andre (andre@via.ecp.fr)</div><div class='del'>- *	(February 18, 1996) :</div><div class='del'>- *	+ modified shared memory and mmio access port the driver to</div><div class='del'>- *	  alpha platform (structure access -&gt; readb/writeb)</div><div class='del'>- *</div><div class='del'>- *	Changes by Steve Kipisz (bungy@ibm.net or kipisz@vnet.ibm.com)</div><div class='del'>- *	(January 18 1996):</div><div class='del'>- *	+ swapped WWOR and WWCR in ibmtr.h</div><div class='del'>- *	+ moved some init code from tok_probe into trdev_init.  The</div><div class='del'>- *	  PCMCIA code can call trdev_init to complete initializing</div><div class='del'>- *	  the driver.</div><div class='del'>- *	+ added -DPCMCIA to support PCMCIA</div><div class='del'>- *	+ detecting PCMCIA Card Removal in interrupt handler.  If</div><div class='del'>- *	  ISRP is FF, then a PCMCIA card has been removed</div><div class='del'>- *        10/2000 Burt needed a new method to avoid crashing the OS</div><div class='del'>- *</div><div class='del'>- *	Changes by Paul Norton (pnorton@cts.com) :</div><div class='del'>- *	+ restructured the READ.LOG logic to prevent the transmit SRB</div><div class='del'>- *	  from being rudely overwritten before the transmit cycle is</div><div class='del'>- *	  complete. (August 15 1996)</div><div class='del'>- *	+ completed multiple adapter support. (November 20 1996)</div><div class='del'>- *	+ implemented csum_partial_copy in tr_rx and increased receive </div><div class='del'>- *        buffer size and count. Minor fixes. (March 15, 1997)</div><div class='del'>- *</div><div class='del'>- *	Changes by Christopher Turcksin &lt;wabbit@rtfc.demon.co.uk&gt;</div><div class='del'>- *	+ Now compiles ok as a module again.</div><div class='del'>- *</div><div class='del'>- *	Changes by Paul Norton (pnorton@ieee.org) :</div><div class='del'>- *      + moved the header manipulation code in tr_tx and tr_rx to</div><div class='del'>- *        net/802/tr.c. (July 12 1997)</div><div class='del'>- *      + add retry and timeout on open if cable disconnected. (May 5 1998)</div><div class='del'>- *      + lifted 2000 byte mtu limit. now depends on shared-RAM size.</div><div class='del'>- *        May 25 1998)</div><div class='del'>- *      + can't allocate 2k recv buff at 8k shared-RAM. (20 October 1998)</div><div class='del'>- *</div><div class='del'>- *      Changes by Joel Sloan (jjs@c-me.com) :</div><div class='del'>- *      + disable verbose debug messages by default - to enable verbose</div><div class='del'>- *	  debugging, edit the IBMTR_DEBUG_MESSAGES define below </div><div class='del'>- *	</div><div class='del'>- *	Changes by Mike Phillips &lt;phillim@amtrak.com&gt; :</div><div class='del'>- *	+ Added extra #ifdef's to work with new PCMCIA Token Ring Code.</div><div class='del'>- *	  The PCMCIA code now just sets up the card so it can be recognized</div><div class='del'>- *        by ibmtr_probe. Also checks allocated memory vs. on-board memory</div><div class='del'>- *	  for correct figure to use.</div><div class='del'>- *</div><div class='del'>- *	Changes by Tim Hockin (thockin@isunix.it.ilstu.edu) :</div><div class='del'>- *	+ added spinlocks for SMP sanity (10 March 1999)</div><div class='del'>- *</div><div class='del'>- *      Changes by Jochen Friedrich to enable RFC1469 Option 2 multicasting</div><div class='del'>- *      i.e. using functional address C0 00 00 04 00 00 to transmit and </div><div class='del'>- *      receive multicast packets.</div><div class='del'>- *</div><div class='del'>- *      Changes by Mike Sullivan (based on original sram patch by Dave Grothe</div><div class='del'>- *      to support windowing into on adapter shared ram.</div><div class='del'>- *      i.e. Use LANAID to setup a PnP configuration with 16K RAM. Paging</div><div class='del'>- *      will shift this 16K window over the entire available shared RAM.</div><div class='del'>- *</div><div class='del'>- *      Changes by Peter De Schrijver (p2@mind.be) :</div><div class='del'>- *      + fixed a problem with PCMCIA card removal</div><div class='del'>- *</div><div class='del'>- *      Change by Mike Sullivan et al.:</div><div class='del'>- *      + added turbo card support. No need to use lanaid to configure</div><div class='del'>- *      the adapter into isa compatibility mode.</div><div class='del'>- *</div><div class='del'>- *      Changes by Burt Silverman to allow the computer to behave nicely when</div><div class='del'>- *	a cable is pulled or not in place, or a PCMCIA card is removed hot.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* change the define of IBMTR_DEBUG_MESSAGES to a nonzero value </div><div class='del'>-in the event that chatty debug messages are desired - jjs 12/30/98 */</div><div class='del'>-</div><div class='del'>-#define IBMTR_DEBUG_MESSAGES 0</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef PCMCIA		/* required for ibmtr_cs.c to build */</div><div class='del'>-#undef MODULE		/* yes, really */</div><div class='del'>-#undef ENABLE_PAGING</div><div class='del'>-#else</div><div class='del'>-#define ENABLE_PAGING 1		</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* changes the output format of driver initialization */</div><div class='del'>-#define TR_VERBOSE	0</div><div class='del'>-</div><div class='del'>-/* some 95 OS send many non UI frame; this allow removing the warning */</div><div class='del'>-#define TR_FILTERNONUI	1</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/ip.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='del'>-#include &lt;linux/ibmtr.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;net/checksum.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-#define DPRINTK(format, args...) printk("%s: " format, dev-&gt;name , ## args)</div><div class='del'>-#define DPRINTD(format, args...) DummyCall("%s: " format, dev-&gt;name , ## args)</div><div class='del'>-</div><div class='del'>-/* version and credits */</div><div class='del'>-#ifndef PCMCIA</div><div class='del'>-static char version[] __devinitdata =</div><div class='del'>-    "\nibmtr.c: v1.3.57   8/ 7/94 Peter De Schrijver and Mark Swanson\n"</div><div class='del'>-    "         v2.1.125 10/20/98 Paul Norton    &lt;pnorton@ieee.org&gt;\n"</div><div class='del'>-    "         v2.2.0   12/30/98 Joel Sloan     &lt;jjs@c-me.com&gt;\n"</div><div class='del'>-    "         v2.2.1   02/08/00 Mike Sullivan  &lt;sullivam@us.ibm.com&gt;\n" </div><div class='del'>-    "         v2.2.2   07/27/00 Burt Silverman &lt;burts@us.ibm.com&gt;\n" </div><div class='del'>-    "         v2.4.0   03/01/01 Mike Sullivan &lt;sullivan@us.ibm.com&gt;\n";</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* this allows displaying full adapter information */</div><div class='del'>-</div><div class='del'>-static char *channel_def[] __devinitdata = { "ISA", "MCA", "ISA P&amp;P" };</div><div class='del'>-</div><div class='del'>-static char pcchannelid[] __devinitdata = {</div><div class='del'>-	0x05, 0x00, 0x04, 0x09,</div><div class='del'>-	0x04, 0x03, 0x04, 0x0f,</div><div class='del'>-	0x03, 0x06, 0x03, 0x01,</div><div class='del'>-	0x03, 0x01, 0x03, 0x00,</div><div class='del'>-	0x03, 0x09, 0x03, 0x09,</div><div class='del'>-	0x03, 0x00, 0x02, 0x00</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static char mcchannelid[] __devinitdata =  {</div><div class='del'>-	0x04, 0x0d, 0x04, 0x01,</div><div class='del'>-	0x05, 0x02, 0x05, 0x03,</div><div class='del'>-	0x03, 0x06, 0x03, 0x03,</div><div class='del'>-	0x05, 0x08, 0x03, 0x04,</div><div class='del'>-	0x03, 0x05, 0x03, 0x01,</div><div class='del'>-	0x03, 0x08, 0x02, 0x00</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static char __devinit *adapter_def(char type)</div><div class='del'>-{</div><div class='del'>-	switch (type) {</div><div class='del'>-	case 0xF: return "PC Adapter | PC Adapter II | Adapter/A";</div><div class='del'>-	case 0xE: return "16/4 Adapter | 16/4 Adapter/A (long)";</div><div class='del'>-	case 0xD: return "16/4 Adapter/A (short) | 16/4 ISA-16 Adapter";</div><div class='del'>-	case 0xC: return "Auto 16/4 Adapter";</div><div class='del'>-	default: return "adapter (unknown type)";</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define TRC_INIT 0x01		/*  Trace initialization &amp; PROBEs */</div><div class='del'>-#define TRC_INITV 0x02		/*  verbose init trace points     */</div><div class='del'>-static unsigned char ibmtr_debug_trace = 0;</div><div class='del'>-</div><div class='del'>-static int	ibmtr_probe1(struct net_device *dev, int ioaddr);</div><div class='del'>-static unsigned char get_sram_size(struct tok_info *adapt_info);</div><div class='del'>-static int 	trdev_init(struct net_device *dev);</div><div class='del'>-static int 	tok_open(struct net_device *dev);</div><div class='del'>-static int 	tok_init_card(struct net_device *dev);</div><div class='del'>-static void	tok_open_adapter(unsigned long dev_addr);</div><div class='del'>-static void 	open_sap(unsigned char type, struct net_device *dev);</div><div class='del'>-static void 	tok_set_multicast_list(struct net_device *dev);</div><div class='del'>-static netdev_tx_t tok_send_packet(struct sk_buff *skb,</div><div class='del'>-					 struct net_device *dev);</div><div class='del'>-static int 	tok_close(struct net_device *dev);</div><div class='del'>-static irqreturn_t tok_interrupt(int irq, void *dev_id);</div><div class='del'>-static void 	initial_tok_int(struct net_device *dev);</div><div class='del'>-static void 	tr_tx(struct net_device *dev);</div><div class='del'>-static void 	tr_rx(struct net_device *dev);</div><div class='del'>-static void	ibmtr_reset_timer(struct timer_list*tmr,struct net_device *dev);</div><div class='del'>-static void	tok_rerun(unsigned long dev_addr);</div><div class='del'>-static void	ibmtr_readlog(struct net_device *dev);</div><div class='del'>-static int	ibmtr_change_mtu(struct net_device *dev, int mtu);</div><div class='del'>-static void	find_turbo_adapters(int *iolist);</div><div class='del'>-</div><div class='del'>-static int ibmtr_portlist[IBMTR_MAX_ADAPTERS+1] __devinitdata = {</div><div class='del'>-	0xa20, 0xa24, 0, 0, 0</div><div class='del'>-};</div><div class='del'>-static int __devinitdata turbo_io[IBMTR_MAX_ADAPTERS] = {0};</div><div class='del'>-static int __devinitdata turbo_irq[IBMTR_MAX_ADAPTERS] = {0};</div><div class='del'>-static int __devinitdata turbo_searched = 0;</div><div class='del'>-</div><div class='del'>-#ifndef PCMCIA</div><div class='del'>-static __u32 ibmtr_mem_base __devinitdata = 0xd0000;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void __devinit PrtChanID(char *pcid, short stride)</div><div class='del'>-{</div><div class='del'>-	short i, j;</div><div class='del'>-	for (i = 0, j = 0; i &lt; 24; i++, j += stride)</div><div class='del'>-		printk("%1x", ((int) pcid[j]) &amp; 0x0f);</div><div class='del'>-	printk("\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __devinit HWPrtChanID(void __iomem *pcid, short stride)</div><div class='del'>-{</div><div class='del'>-	short i, j;</div><div class='del'>-	for (i = 0, j = 0; i &lt; 24; i++, j += stride)</div><div class='del'>-		printk("%1x", ((int) readb(pcid + j)) &amp; 0x0f);</div><div class='del'>-	printk("\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* We have to ioremap every checked address, because isa_readb is </div><div class='del'>- * going away. </div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void __devinit find_turbo_adapters(int *iolist)</div><div class='del'>-{</div><div class='del'>-	int ram_addr;</div><div class='del'>-	int index=0;</div><div class='del'>-	void __iomem *chanid;</div><div class='del'>-	int found_turbo=0;</div><div class='del'>-	unsigned char *tchanid, ctemp;</div><div class='del'>-	int i, j;</div><div class='del'>-	unsigned long jif;</div><div class='del'>-	void __iomem *ram_mapped ;   </div><div class='del'>-</div><div class='del'>-	if (turbo_searched == 1) return;</div><div class='del'>-	turbo_searched=1;</div><div class='del'>-	for (ram_addr=0xC0000; ram_addr &lt; 0xE0000; ram_addr+=0x2000) {</div><div class='del'>-</div><div class='del'>-		__u32 intf_tbl=0;</div><div class='del'>-</div><div class='del'>-		found_turbo=1;</div><div class='del'>-		ram_mapped = ioremap((u32)ram_addr,0x1fff) ; </div><div class='del'>-		if (ram_mapped==NULL) </div><div class='del'>- 			continue ; </div><div class='del'>-		chanid=(CHANNEL_ID + ram_mapped);</div><div class='del'>-		tchanid=pcchannelid;</div><div class='del'>-		ctemp=readb(chanid) &amp; 0x0f;</div><div class='del'>-		if (ctemp != *tchanid) continue;</div><div class='del'>-		for (i=2,j=1; i&lt;=46; i=i+2,j++) {</div><div class='del'>-			if ((readb(chanid+i) &amp; 0x0f) != tchanid[j]){</div><div class='del'>-				found_turbo=0;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if (!found_turbo) continue;</div><div class='del'>-</div><div class='del'>-		writeb(0x90, ram_mapped+0x1E01);</div><div class='del'>-		for(i=2; i&lt;0x0f; i++) {</div><div class='del'>-			writeb(0x00, ram_mapped+0x1E01+i);</div><div class='del'>-		}</div><div class='del'>-		writeb(0x00, ram_mapped+0x1E01);</div><div class='del'>-		for(jif=jiffies+TR_BUSY_INTERVAL; time_before_eq(jiffies,jif););</div><div class='del'>-		intf_tbl=ntohs(readw(ram_mapped+ACA_OFFSET+ACA_RW+WRBR_EVEN));</div><div class='del'>-		if (intf_tbl) {</div><div class='del'>-#if IBMTR_DEBUG_MESSAGES</div><div class='del'>-			printk("ibmtr::find_turbo_adapters, Turbo found at "</div><div class='del'>-				"ram_addr %x\n",ram_addr);</div><div class='del'>-			printk("ibmtr::find_turbo_adapters, interface_table ");</div><div class='del'>-			for(i=0; i&lt;6; i++) {</div><div class='del'>-				printk("%x:",readb(ram_addr+intf_tbl+i));</div><div class='del'>-			}</div><div class='del'>-			printk("\n");</div><div class='del'>-#endif</div><div class='del'>-			turbo_io[index]=ntohs(readw(ram_mapped+intf_tbl+4));</div><div class='del'>-			turbo_irq[index]=readb(ram_mapped+intf_tbl+3);</div><div class='del'>-			outb(0, turbo_io[index] + ADAPTRESET);</div><div class='del'>-			for(jif=jiffies+TR_RST_TIME;time_before_eq(jiffies,jif););</div><div class='del'>-			outb(0, turbo_io[index] + ADAPTRESETREL);</div><div class='del'>-			index++;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-#if IBMTR_DEBUG_MESSAGES </div><div class='del'>-		printk("ibmtr::find_turbo_adapters, ibmtr card found at"</div><div class='del'>-			" %x but not a Turbo model\n",ram_addr);</div><div class='del'>-#endif</div><div class='del'>-	iounmap(ram_mapped) ; 	</div><div class='del'>-	} /* for */</div><div class='del'>-	for(i=0; i&lt;IBMTR_MAX_ADAPTERS; i++) {</div><div class='del'>-		if(!turbo_io[i]) break;</div><div class='del'>-		for (j=0; j&lt;IBMTR_MAX_ADAPTERS; j++) {</div><div class='del'>-			if ( iolist[j] &amp;&amp; iolist[j] != turbo_io[i]) continue;</div><div class='del'>-			iolist[j]=turbo_io[i];</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ibmtr_cleanup_card(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	if (dev-&gt;base_addr) {</div><div class='del'>-		outb(0,dev-&gt;base_addr+ADAPTRESET);</div><div class='del'>-		</div><div class='del'>-		schedule_timeout_uninterruptible(TR_RST_TIME); /* wait 50ms */</div><div class='del'>-</div><div class='del'>-		outb(0,dev-&gt;base_addr+ADAPTRESETREL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#ifndef PCMCIA</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	release_region(dev-&gt;base_addr, IBMTR_IO_EXTENT);</div><div class='del'>-</div><div class='del'>-	{ </div><div class='del'>-		struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-		iounmap(ti-&gt;mmio);</div><div class='del'>-		iounmap(ti-&gt;sram_virt);</div><div class='del'>-	}</div><div class='del'>-#endif		</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/****************************************************************************</div><div class='del'>- *	ibmtr_probe():  Routine specified in the network device structure</div><div class='del'>- *	to probe for an IBM Token Ring Adapter.  Routine outline:</div><div class='del'>- *	I.    Interrogate hardware to determine if an adapter exists</div><div class='del'>- *	      and what the speeds and feeds are</div><div class='del'>- *	II.   Setup data structures to control execution based upon</div><div class='del'>- *	      adapter characteristics.</div><div class='del'>- *</div><div class='del'>- *	We expect ibmtr_probe to be called once for each device entry</div><div class='del'>- *	which references it.</div><div class='del'>- ****************************************************************************/</div><div class='del'>-</div><div class='del'>-static int __devinit ibmtr_probe(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int base_addr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-	if (base_addr &amp;&amp; base_addr &lt;= 0x1ff) /* Don't probe at all. */</div><div class='del'>-		return -ENXIO;</div><div class='del'>-	if (base_addr &gt; 0x1ff) { /* Check a single specified location.  */</div><div class='del'>-		if (!ibmtr_probe1(dev, base_addr)) return 0;</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-	find_turbo_adapters(ibmtr_portlist);</div><div class='del'>-	for (i = 0; ibmtr_portlist[i]; i++) {</div><div class='del'>-		int ioaddr = ibmtr_portlist[i];</div><div class='del'>-</div><div class='del'>-		if (!ibmtr_probe1(dev, ioaddr)) return 0;</div><div class='del'>-	}</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __devinit ibmtr_probe_card(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int err = ibmtr_probe(dev);</div><div class='del'>-	if (!err) {</div><div class='del'>-		err = register_netdev(dev);</div><div class='del'>-		if (err)</div><div class='del'>-			ibmtr_cleanup_card(dev);</div><div class='del'>-	}</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static int __devinit ibmtr_probe1(struct net_device *dev, int PIOaddr)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	unsigned char segment, intr=0, irq=0, i, j, cardpresent=NOTOK, temp=0;</div><div class='del'>-	void __iomem * t_mmio = NULL;</div><div class='del'>-	struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-	void __iomem *cd_chanid;</div><div class='del'>-	unsigned char *tchanid, ctemp;</div><div class='del'>-#ifndef PCMCIA</div><div class='del'>-	unsigned char t_irq=0;</div><div class='del'>-        unsigned long timeout;</div><div class='del'>-	static int version_printed;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/*    Query the adapter PIO base port which will return</div><div class='del'>-	 *    indication of where MMIO was placed. We also have a</div><div class='del'>-	 *    coded interrupt number.</div><div class='del'>-	 */</div><div class='del'>-	segment = inb(PIOaddr);</div><div class='del'>-	if (segment &lt; 0x40 || segment &gt; 0xe0) {</div><div class='del'>-		/* Out of range values so we'll assume non-existent IO device</div><div class='del'>-		 * but this is not necessarily a problem, esp if a turbo</div><div class='del'>-		 * adapter is being used.  */</div><div class='del'>-#if IBMTR_DEBUG_MESSAGES</div><div class='del'>-		DPRINTK("ibmtr_probe1(): unhappy that inb(0x%X) == 0x%X, "</div><div class='del'>-			"Hardware Problem?\n",PIOaddr,segment);</div><div class='del'>-#endif</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 *    Compute the linear base address of the MMIO area</div><div class='del'>-	 *    as LINUX doesn't care about segments</div><div class='del'>-	 */</div><div class='del'>-	t_mmio = ioremap(((__u32) (segment &amp; 0xfc) &lt;&lt; 11) + 0x80000,2048);</div><div class='del'>-	if (!t_mmio) { </div><div class='del'>-		DPRINTK("Cannot remap mmiobase memory area") ; </div><div class='del'>-		return -ENODEV ; </div><div class='del'>-	} </div><div class='del'>-	intr = segment &amp; 0x03;	/* low bits is coded interrupt # */</div><div class='del'>-	if (ibmtr_debug_trace &amp; TRC_INIT)</div><div class='del'>-		DPRINTK("PIOaddr: %4hx seg/intr: %2x mmio base: %p intr: %d\n"</div><div class='del'>-				, PIOaddr, (int) segment, t_mmio, (int) intr);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *    Now we will compare expected 'channelid' strings with</div><div class='del'>-	 *    what we is there to learn of ISA/MCA or not TR card</div><div class='del'>-	 */</div><div class='del'>-#ifdef PCMCIA</div><div class='del'>-	iounmap(t_mmio);</div><div class='del'>-	t_mmio = ti-&gt;mmio;	/*BMS to get virtual address */</div><div class='del'>-	irq = ti-&gt;irq;		/*BMS to display the irq!   */</div><div class='del'>-#endif</div><div class='del'>-	cd_chanid = (CHANNEL_ID + t_mmio);	/* for efficiency */</div><div class='del'>-	tchanid = pcchannelid;</div><div class='del'>-	cardpresent = TR_ISA;	/* try ISA */</div><div class='del'>-</div><div class='del'>-	/*    Suboptimize knowing first byte different */</div><div class='del'>-	ctemp = readb(cd_chanid) &amp; 0x0f;</div><div class='del'>-	if (ctemp != *tchanid) {	/* NOT ISA card, try MCA */</div><div class='del'>-		tchanid = mcchannelid;</div><div class='del'>-		cardpresent = TR_MCA;</div><div class='del'>-		if (ctemp != *tchanid)	/* Neither ISA nor MCA */</div><div class='del'>-			cardpresent = NOTOK;</div><div class='del'>-	}</div><div class='del'>-	if (cardpresent != NOTOK) {</div><div class='del'>-		/*       Know presumed type, try rest of ID */</div><div class='del'>-		for (i = 2, j = 1; i &lt;= 46; i = i + 2, j++) {</div><div class='del'>-			if( (readb(cd_chanid+i)&amp;0x0f) == tchanid[j]) continue;</div><div class='del'>-			/* match failed, not TR card */</div><div class='del'>-			cardpresent = NOTOK;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	/* </div><div class='del'>-	 *    If we have an ISA board check for the ISA P&amp;P version,</div><div class='del'>-	 *    as it has different IRQ settings </div><div class='del'>-	 */</div><div class='del'>-	if (cardpresent == TR_ISA &amp;&amp; (readb(AIPFID + t_mmio) == 0x0e))</div><div class='del'>-		cardpresent = TR_ISAPNP;</div><div class='del'>-	if (cardpresent == NOTOK) {	/* "channel_id" did not match, report */</div><div class='del'>-		if (!(ibmtr_debug_trace &amp; TRC_INIT)) {</div><div class='del'>-#ifndef PCMCIA</div><div class='del'>-			iounmap(t_mmio);</div><div class='del'>-#endif</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		DPRINTK( "Channel ID string not found for PIOaddr: %4hx\n",</div><div class='del'>-								PIOaddr);</div><div class='del'>-		DPRINTK("Expected for ISA: ");</div><div class='del'>-		PrtChanID(pcchannelid, 1);</div><div class='del'>-		DPRINTK("           found: ");</div><div class='del'>-/* BMS Note that this can be misleading, when hardware is flaky, because you</div><div class='del'>-   are reading it a second time here. So with my flaky hardware, I'll see my-</div><div class='del'>-   self in this block, with the HW ID matching the ISA ID exactly! */</div><div class='del'>-		HWPrtChanID(cd_chanid, 2);</div><div class='del'>-		DPRINTK("Expected for MCA: ");</div><div class='del'>-		PrtChanID(mcchannelid, 1);</div><div class='del'>-	}</div><div class='del'>-	/* Now, setup some of the pl0 buffers for this driver.. */</div><div class='del'>-	/* If called from PCMCIA, it is already set up, so no need to </div><div class='del'>-	   waste the memory, just use the existing structure */</div><div class='del'>-#ifndef PCMCIA</div><div class='del'>-	ti-&gt;mmio = t_mmio;</div><div class='del'>-        for (i = 0; i &lt; IBMTR_MAX_ADAPTERS; i++) {</div><div class='del'>-                if (turbo_io[i] != PIOaddr)</div><div class='del'>-			continue;</div><div class='del'>-#if IBMTR_DEBUG_MESSAGES </div><div class='del'>-		printk("ibmtr::tr_probe1, setting PIOaddr %x to Turbo\n",</div><div class='del'>-		       PIOaddr);</div><div class='del'>-#endif</div><div class='del'>-		ti-&gt;turbo = 1;</div><div class='del'>-		t_irq = turbo_irq[i];</div><div class='del'>-        }</div><div class='del'>-#endif /* !PCMCIA */</div><div class='del'>-	ti-&gt;readlog_pending = 0;</div><div class='del'>-	init_waitqueue_head(&amp;ti-&gt;wait_for_reset);</div><div class='del'>-</div><div class='del'>-	/* if PCMCIA, the card can be recognized as either TR_ISA or TR_ISAPNP</div><div class='del'>-	 * depending which card is inserted.	*/</div><div class='del'>-	</div><div class='del'>-#ifndef PCMCIA</div><div class='del'>-	switch (cardpresent) {</div><div class='del'>-	case TR_ISA:</div><div class='del'>-		if (intr == 0) irq = 9;	/* irq2 really is irq9 */</div><div class='del'>-		if (intr == 1) irq = 3;</div><div class='del'>-		if (intr == 2) irq = 6;</div><div class='del'>-		if (intr == 3) irq = 7;</div><div class='del'>-		ti-&gt;adapter_int_enable = PIOaddr + ADAPTINTREL;</div><div class='del'>-		break;</div><div class='del'>-	case TR_MCA:</div><div class='del'>-		if (intr == 0) irq = 9;</div><div class='del'>-		if (intr == 1) irq = 3;</div><div class='del'>-		if (intr == 2) irq = 10;</div><div class='del'>-		if (intr == 3) irq = 11;</div><div class='del'>-		ti-&gt;global_int_enable = 0;</div><div class='del'>-		ti-&gt;adapter_int_enable = 0;</div><div class='del'>-		ti-&gt;sram_phys=(__u32)(inb(PIOaddr+ADAPTRESETREL) &amp; 0xfe) &lt;&lt; 12;</div><div class='del'>-		break;</div><div class='del'>-	case TR_ISAPNP:</div><div class='del'>-		if (!t_irq) {</div><div class='del'>-			if (intr == 0) irq = 9;</div><div class='del'>-			if (intr == 1) irq = 3;</div><div class='del'>-			if (intr == 2) irq = 10;</div><div class='del'>-			if (intr == 3) irq = 11;</div><div class='del'>-		} else</div><div class='del'>-			irq=t_irq;</div><div class='del'>-		timeout = jiffies + TR_SPIN_INTERVAL;</div><div class='del'>-		while (!readb(ti-&gt;mmio + ACA_OFFSET + ACA_RW + RRR_EVEN)){</div><div class='del'>-			if (!time_after(jiffies, timeout)) continue;</div><div class='del'>-			DPRINTK( "Hardware timeout during initialization.\n");</div><div class='del'>-			iounmap(t_mmio);</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		ti-&gt;sram_phys =</div><div class='del'>-		     ((__u32)readb(ti-&gt;mmio+ACA_OFFSET+ACA_RW+RRR_EVEN)&lt;&lt;12);</div><div class='del'>-		ti-&gt;adapter_int_enable = PIOaddr + ADAPTINTREL;</div><div class='del'>-		break;</div><div class='del'>-	} /*end switch (cardpresent) */</div><div class='del'>-#endif	/*not PCMCIA */</div><div class='del'>-</div><div class='del'>-	if (ibmtr_debug_trace &amp; TRC_INIT) {	/* just report int */</div><div class='del'>-		DPRINTK("irq=%d", irq);</div><div class='del'>-		printk(", sram_phys=0x%x", ti-&gt;sram_phys);</div><div class='del'>-		if(ibmtr_debug_trace&amp;TRC_INITV){ /* full chat in verbose only */</div><div class='del'>-			DPRINTK(", ti-&gt;mmio=%p", ti-&gt;mmio);</div><div class='del'>-			printk(", segment=%02X", segment);</div><div class='del'>-		}</div><div class='del'>-		printk(".\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Get hw address of token ring card */</div><div class='del'>-	j = 0;</div><div class='del'>-	for (i = 0; i &lt; 0x18; i = i + 2) {</div><div class='del'>-		/* technical reference states to do this */</div><div class='del'>-		temp = readb(ti-&gt;mmio + AIP + i) &amp; 0x0f;</div><div class='del'>-		ti-&gt;hw_address[j] = temp;</div><div class='del'>-		if (j &amp; 1)</div><div class='del'>-			dev-&gt;dev_addr[(j / 2)] =</div><div class='del'>-				ti-&gt;hw_address[j]+ (ti-&gt;hw_address[j - 1] &lt;&lt; 4);</div><div class='del'>-		++j;</div><div class='del'>-	}</div><div class='del'>-	/* get Adapter type:  'F' = Adapter/A, 'E' = 16/4 Adapter II,... */</div><div class='del'>-	ti-&gt;adapter_type = readb(ti-&gt;mmio + AIPADAPTYPE);</div><div class='del'>-</div><div class='del'>-	/* get Data Rate:  F=4Mb, E=16Mb, D=4Mb &amp; 16Mb ?? */</div><div class='del'>-	ti-&gt;data_rate = readb(ti-&gt;mmio + AIPDATARATE);</div><div class='del'>-</div><div class='del'>-	/* Get Early Token Release support?: F=no, E=4Mb, D=16Mb, C=4&amp;16Mb */</div><div class='del'>-	ti-&gt;token_release = readb(ti-&gt;mmio + AIPEARLYTOKEN);</div><div class='del'>-</div><div class='del'>-	/* How much shared RAM is on adapter ? */</div><div class='del'>-	if (ti-&gt;turbo) {</div><div class='del'>-		ti-&gt;avail_shared_ram=127;</div><div class='del'>-	} else {</div><div class='del'>-		ti-&gt;avail_shared_ram = get_sram_size(ti);/*in 512 byte units */</div><div class='del'>-	}</div><div class='del'>-	/* We need to set or do a bunch of work here based on previous results*/</div><div class='del'>-	/* Support paging?  What sizes?:  F=no, E=16k, D=32k, C=16 &amp; 32k */</div><div class='del'>-	ti-&gt;shared_ram_paging = readb(ti-&gt;mmio + AIPSHRAMPAGE);</div><div class='del'>-</div><div class='del'>-	/* Available DHB  4Mb size:   F=2048, E=4096, D=4464 */</div><div class='del'>-	switch (readb(ti-&gt;mmio + AIP4MBDHB)) {</div><div class='del'>-	case 0xe: ti-&gt;dhb_size4mb = 4096; break;</div><div class='del'>-	case 0xd: ti-&gt;dhb_size4mb = 4464; break;</div><div class='del'>-	default:  ti-&gt;dhb_size4mb = 2048; break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Available DHB 16Mb size:  F=2048, E=4096, D=8192, C=16384, B=17960 */</div><div class='del'>-	switch (readb(ti-&gt;mmio + AIP16MBDHB)) {</div><div class='del'>-	case 0xe: ti-&gt;dhb_size16mb = 4096; break;</div><div class='del'>-	case 0xd: ti-&gt;dhb_size16mb = 8192; break;</div><div class='del'>-	case 0xc: ti-&gt;dhb_size16mb = 16384; break;</div><div class='del'>-	case 0xb: ti-&gt;dhb_size16mb = 17960; break;</div><div class='del'>-	default:  ti-&gt;dhb_size16mb = 2048; break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*    We must figure out how much shared memory space this adapter</div><div class='del'>-	 *    will occupy so that if there are two adapters we can fit both</div><div class='del'>-	 *    in.  Given a choice, we will limit this adapter to 32K.  The</div><div class='del'>-	 *    maximum space will will use for two adapters is 64K so if the</div><div class='del'>-	 *    adapter we are working on demands 64K (it also doesn't support</div><div class='del'>-	 *    paging), then only one adapter can be supported.  </div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *    determine how much of total RAM is mapped into PC space </div><div class='del'>-	 */</div><div class='del'>-	ti-&gt;mapped_ram_size= /*sixteen to onehundredtwentyeight 512byte blocks*/</div><div class='del'>-	    1&lt;&lt; ((readb(ti-&gt;mmio+ACA_OFFSET+ACA_RW+RRR_ODD) &gt;&gt; 2 &amp; 0x03) + 4);</div><div class='del'>-	ti-&gt;page_mask = 0;</div><div class='del'>-	if (ti-&gt;turbo)  ti-&gt;page_mask=0xf0;</div><div class='del'>-	else if (ti-&gt;shared_ram_paging == 0xf);  /* No paging in adapter */</div><div class='del'>-	else {</div><div class='del'>-#ifdef ENABLE_PAGING</div><div class='del'>-		unsigned char pg_size = 0;</div><div class='del'>-		/* BMS:   page size: PCMCIA, use configuration register;</div><div class='del'>-		   ISAPNP, use LANAIDC config tool from www.ibm.com  */</div><div class='del'>-		switch (ti-&gt;shared_ram_paging) {</div><div class='del'>-		case 0xf:</div><div class='del'>-			break;</div><div class='del'>-		case 0xe:</div><div class='del'>-			ti-&gt;page_mask = (ti-&gt;mapped_ram_size == 32) ? 0xc0 : 0;</div><div class='del'>-			pg_size = 32;	/* 16KB page size */</div><div class='del'>-			break;</div><div class='del'>-		case 0xd:</div><div class='del'>-			ti-&gt;page_mask = (ti-&gt;mapped_ram_size == 64) ? 0x80 : 0;</div><div class='del'>-			pg_size = 64;	/* 32KB page size */</div><div class='del'>-			break;</div><div class='del'>-		case 0xc:</div><div class='del'>-			switch (ti-&gt;mapped_ram_size) {</div><div class='del'>-			case 32:</div><div class='del'>-				ti-&gt;page_mask = 0xc0;</div><div class='del'>-				pg_size = 32;</div><div class='del'>-				break;</div><div class='del'>-			case 64:</div><div class='del'>-				ti-&gt;page_mask = 0x80;</div><div class='del'>-				pg_size = 64;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			DPRINTK("Unknown shared ram paging info %01X\n",</div><div class='del'>-							ti-&gt;shared_ram_paging);</div><div class='del'>-			iounmap(t_mmio); </div><div class='del'>-			return -ENODEV;</div><div class='del'>-			break;</div><div class='del'>-		} /*end switch shared_ram_paging */</div><div class='del'>-</div><div class='del'>-		if (ibmtr_debug_trace &amp; TRC_INIT)</div><div class='del'>-			DPRINTK("Shared RAM paging code: %02X, "</div><div class='del'>-				"mapped RAM size: %dK, shared RAM size: %dK, "</div><div class='del'>-				"page mask: %02X\n:",</div><div class='del'>-				ti-&gt;shared_ram_paging, ti-&gt;mapped_ram_size / 2,</div><div class='del'>-				ti-&gt;avail_shared_ram / 2, ti-&gt;page_mask);</div><div class='del'>-#endif	/*ENABLE_PAGING */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#ifndef PCMCIA</div><div class='del'>-	/* finish figuring the shared RAM address */</div><div class='del'>-	if (cardpresent == TR_ISA) {</div><div class='del'>-		static const __u32 ram_bndry_mask[] = {</div><div class='del'>-			0xffffe000, 0xffffc000, 0xffff8000, 0xffff0000</div><div class='del'>-		};</div><div class='del'>-		__u32 new_base, rrr_32, chk_base, rbm;</div><div class='del'>-</div><div class='del'>-		rrr_32=readb(ti-&gt;mmio+ACA_OFFSET+ACA_RW+RRR_ODD) &gt;&gt; 2 &amp; 0x03;</div><div class='del'>-		rbm = ram_bndry_mask[rrr_32];</div><div class='del'>-		new_base = (ibmtr_mem_base + (~rbm)) &amp; rbm;/* up to boundary */</div><div class='del'>-		chk_base = new_base + (ti-&gt;mapped_ram_size &lt;&lt; 9);</div><div class='del'>-		if (chk_base &gt; (ibmtr_mem_base + IBMTR_SHARED_RAM_SIZE)) {</div><div class='del'>-			DPRINTK("Shared RAM for this adapter (%05x) exceeds "</div><div class='del'>-			"driver limit (%05x), adapter not started.\n",</div><div class='del'>-			chk_base, ibmtr_mem_base + IBMTR_SHARED_RAM_SIZE);</div><div class='del'>-			iounmap(t_mmio);</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		} else { /* seems cool, record what we have figured out */</div><div class='del'>-			ti-&gt;sram_base = new_base &gt;&gt; 12;</div><div class='del'>-			ibmtr_mem_base = chk_base;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	else  ti-&gt;sram_base = ti-&gt;sram_phys &gt;&gt; 12;</div><div class='del'>-</div><div class='del'>-	/* The PCMCIA has already got the interrupt line and the io port, </div><div class='del'>-	   so no chance of anybody else getting it - MLP */</div><div class='del'>-	if (request_irq(dev-&gt;irq = irq, tok_interrupt, 0, "ibmtr", dev) != 0) {</div><div class='del'>-		DPRINTK("Could not grab irq %d.  Halting Token Ring driver.\n",</div><div class='del'>-					irq);</div><div class='del'>-		iounmap(t_mmio);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-	/*?? Now, allocate some of the PIO PORTs for this driver.. */</div><div class='del'>-	/* record PIOaddr range as busy */</div><div class='del'>-	if (!request_region(PIOaddr, IBMTR_IO_EXTENT, "ibmtr")) {</div><div class='del'>-		DPRINTK("Could not grab PIO range. Halting driver.\n");</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='del'>-		iounmap(t_mmio);</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!version_printed++) {</div><div class='del'>-		printk(version);</div><div class='del'>-	}</div><div class='del'>-#endif /* !PCMCIA */</div><div class='del'>-	DPRINTK("%s %s found\n",</div><div class='del'>-		channel_def[cardpresent - 1], adapter_def(ti-&gt;adapter_type));</div><div class='del'>-	DPRINTK("using irq %d, PIOaddr %hx, %dK shared RAM.\n",</div><div class='del'>-			irq, PIOaddr, ti-&gt;mapped_ram_size / 2);</div><div class='del'>-	DPRINTK("Hardware address : %pM\n", dev-&gt;dev_addr);</div><div class='del'>-	if (ti-&gt;page_mask)</div><div class='del'>-		DPRINTK("Shared RAM paging enabled. "</div><div class='del'>-			"Page size: %uK Shared Ram size %dK\n",</div><div class='del'>-			((ti-&gt;page_mask^0xff)+1) &gt;&gt;2, ti-&gt;avail_shared_ram / 2);</div><div class='del'>-	else</div><div class='del'>-		DPRINTK("Shared RAM paging disabled. ti-&gt;page_mask %x\n",</div><div class='del'>-								ti-&gt;page_mask);</div><div class='del'>-</div><div class='del'>-	/* Calculate the maximum DHB we can use */</div><div class='del'>-	/* two cases where avail_shared_ram doesn't equal mapped_ram_size:</div><div class='del'>-	    1. avail_shared_ram is 127 but mapped_ram_size is 128 (typical)</div><div class='del'>-	    2. user has configured adapter for less than avail_shared_ram</div><div class='del'>-	       but is not using paging (she should use paging, I believe)</div><div class='del'>-	*/</div><div class='del'>-	if (!ti-&gt;page_mask) {</div><div class='del'>-		ti-&gt;avail_shared_ram=</div><div class='del'>-				min(ti-&gt;mapped_ram_size,ti-&gt;avail_shared_ram);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (ti-&gt;avail_shared_ram) {</div><div class='del'>-	case 16:		/* 8KB shared RAM */</div><div class='del'>-		ti-&gt;dhb_size4mb = min(ti-&gt;dhb_size4mb, (unsigned short)2048);</div><div class='del'>-		ti-&gt;rbuf_len4 = 1032;</div><div class='del'>-		ti-&gt;rbuf_cnt4=2;</div><div class='del'>-		ti-&gt;dhb_size16mb = min(ti-&gt;dhb_size16mb, (unsigned short)2048);</div><div class='del'>-		ti-&gt;rbuf_len16 = 1032;</div><div class='del'>-		ti-&gt;rbuf_cnt16=2;</div><div class='del'>-		break;</div><div class='del'>-	case 32:		/* 16KB shared RAM */</div><div class='del'>-		ti-&gt;dhb_size4mb = min(ti-&gt;dhb_size4mb, (unsigned short)4464);</div><div class='del'>-		ti-&gt;rbuf_len4 = 1032;</div><div class='del'>-		ti-&gt;rbuf_cnt4=4;</div><div class='del'>-		ti-&gt;dhb_size16mb = min(ti-&gt;dhb_size16mb, (unsigned short)4096);</div><div class='del'>-		ti-&gt;rbuf_len16 = 1032;	/*1024 usable */</div><div class='del'>-		ti-&gt;rbuf_cnt16=4;</div><div class='del'>-		break;</div><div class='del'>-	case 64:		/* 32KB shared RAM */</div><div class='del'>-		ti-&gt;dhb_size4mb = min(ti-&gt;dhb_size4mb, (unsigned short)4464);</div><div class='del'>-		ti-&gt;rbuf_len4 = 1032;</div><div class='del'>-		ti-&gt;rbuf_cnt4=6;</div><div class='del'>-		ti-&gt;dhb_size16mb = min(ti-&gt;dhb_size16mb, (unsigned short)10240);</div><div class='del'>-		ti-&gt;rbuf_len16 = 1032;</div><div class='del'>-		ti-&gt;rbuf_cnt16=6;</div><div class='del'>-		break;</div><div class='del'>-	case 127:		/* 63.5KB shared RAM */</div><div class='del'>-		ti-&gt;dhb_size4mb = min(ti-&gt;dhb_size4mb, (unsigned short)4464);</div><div class='del'>-		ti-&gt;rbuf_len4 = 1032;</div><div class='del'>-		ti-&gt;rbuf_cnt4=6;</div><div class='del'>-		ti-&gt;dhb_size16mb = min(ti-&gt;dhb_size16mb, (unsigned short)16384);</div><div class='del'>-		ti-&gt;rbuf_len16 = 1032;</div><div class='del'>-		ti-&gt;rbuf_cnt16=16;</div><div class='del'>-		break;</div><div class='del'>-	case 128:		/* 64KB   shared RAM */</div><div class='del'>-		ti-&gt;dhb_size4mb = min(ti-&gt;dhb_size4mb, (unsigned short)4464);</div><div class='del'>-		ti-&gt;rbuf_len4 = 1032;</div><div class='del'>-		ti-&gt;rbuf_cnt4=6;</div><div class='del'>-		ti-&gt;dhb_size16mb = min(ti-&gt;dhb_size16mb, (unsigned short)17960);</div><div class='del'>-		ti-&gt;rbuf_len16 = 1032;</div><div class='del'>-		ti-&gt;rbuf_cnt16=16;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ti-&gt;dhb_size4mb = 2048;</div><div class='del'>-		ti-&gt;rbuf_len4 = 1032;</div><div class='del'>-		ti-&gt;rbuf_cnt4=2;</div><div class='del'>-		ti-&gt;dhb_size16mb = 2048;</div><div class='del'>-		ti-&gt;rbuf_len16 = 1032;</div><div class='del'>-		ti-&gt;rbuf_cnt16=2;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	/* this formula is not smart enough for the paging case</div><div class='del'>-	ti-&gt;rbuf_cnt&lt;x&gt; = (ti-&gt;avail_shared_ram * BLOCKSZ - ADAPT_PRIVATE -</div><div class='del'>-			ARBLENGTH - SSBLENGTH - DLC_MAX_SAP * SAPLENGTH -</div><div class='del'>-			DLC_MAX_STA * STALENGTH - ti-&gt;dhb_size&lt;x&gt;mb * NUM_DHB -</div><div class='del'>-			SRBLENGTH - ASBLENGTH) / ti-&gt;rbuf_len&lt;x&gt;;</div><div class='del'>-	*/</div><div class='del'>-	ti-&gt;maxmtu16 = (ti-&gt;rbuf_len16 - 8) * ti-&gt;rbuf_cnt16  - TR_HLEN;</div><div class='del'>-	ti-&gt;maxmtu4 = (ti-&gt;rbuf_len4 - 8) * ti-&gt;rbuf_cnt4 - TR_HLEN;</div><div class='del'>-	/*BMS assuming 18 bytes of Routing Information (usually works) */</div><div class='del'>-	DPRINTK("Maximum Receive Internet Protocol MTU 16Mbps: %d, 4Mbps: %d\n",</div><div class='del'>-						     ti-&gt;maxmtu16, ti-&gt;maxmtu4);</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr = PIOaddr;	/* set the value for device */</div><div class='del'>-	dev-&gt;mem_start = ti-&gt;sram_base &lt;&lt; 12;</div><div class='del'>-	dev-&gt;mem_end = dev-&gt;mem_start + (ti-&gt;mapped_ram_size &lt;&lt; 9) - 1;</div><div class='del'>-	trdev_init(dev);</div><div class='del'>-	return 0;   /* Return 0 to indicate we have found a Token Ring card. */</div><div class='del'>-}				/*ibmtr_probe1() */</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-/* query the adapter for the size of shared RAM  */</div><div class='del'>-/* the function returns the RAM size in units of 512 bytes */</div><div class='del'>-</div><div class='del'>-static unsigned char __devinit get_sram_size(struct tok_info *adapt_info)</div><div class='del'>-{</div><div class='del'>-	unsigned char avail_sram_code;</div><div class='del'>-	static unsigned char size_code[] = { 0, 16, 32, 64, 127, 128 };</div><div class='del'>-	/* Adapter gives</div><div class='del'>-	   'F' -- use RRR bits 3,2</div><div class='del'>-	   'E' -- 8kb   'D' -- 16kb</div><div class='del'>-	   'C' -- 32kb  'A' -- 64KB</div><div class='del'>-	   'B' - 64KB less 512 bytes at top</div><div class='del'>-	   (WARNING ... must zero top bytes in INIT */</div><div class='del'>-</div><div class='del'>-	avail_sram_code = 0xf - readb(adapt_info-&gt;mmio + AIPAVAILSHRAM);</div><div class='del'>-	if (avail_sram_code) return size_code[avail_sram_code];</div><div class='del'>-	else		/* for code 'F', must compute size from RRR(3,2) bits */</div><div class='del'>-		return 1 &lt;&lt;</div><div class='del'>-		 ((readb(adapt_info-&gt;mmio+ACA_OFFSET+ACA_RW+RRR_ODD)&gt;&gt;2&amp;3)+4);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops trdev_netdev_ops = {</div><div class='del'>-	.ndo_open		= tok_open,</div><div class='del'>-	.ndo_stop		= tok_close,</div><div class='del'>-	.ndo_start_xmit		= tok_send_packet,</div><div class='del'>-	.ndo_set_rx_mode	= tok_set_multicast_list,</div><div class='del'>-	.ndo_change_mtu		= ibmtr_change_mtu,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __devinit trdev_init(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	SET_PAGE(ti-&gt;srb_page);</div><div class='del'>-        ti-&gt;open_failure = NO    ;</div><div class='del'>-	dev-&gt;netdev_ops = &amp;trdev_netdev_ops;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static int tok_init_card(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct tok_info *ti;</div><div class='del'>-	short PIOaddr;</div><div class='del'>-	unsigned long i;</div><div class='del'>-</div><div class='del'>-	PIOaddr = dev-&gt;base_addr;</div><div class='del'>-	ti = netdev_priv(dev);</div><div class='del'>-	/* Special processing for first interrupt after reset */</div><div class='del'>-	ti-&gt;do_tok_int = FIRST_INT;</div><div class='del'>-	/* Reset adapter */</div><div class='del'>-	writeb(~INT_ENABLE, ti-&gt;mmio + ACA_OFFSET + ACA_RESET + ISRP_EVEN);</div><div class='del'>-	outb(0, PIOaddr + ADAPTRESET);</div><div class='del'>-</div><div class='del'>-	schedule_timeout_uninterruptible(TR_RST_TIME); /* wait 50ms */</div><div class='del'>-</div><div class='del'>-	outb(0, PIOaddr + ADAPTRESETREL);</div><div class='del'>-#ifdef ENABLE_PAGING</div><div class='del'>-	if (ti-&gt;page_mask)</div><div class='del'>-		writeb(SRPR_ENABLE_PAGING,ti-&gt;mmio+ACA_OFFSET+ACA_RW+SRPR_EVEN);</div><div class='del'>-#endif</div><div class='del'>-	writeb(INT_ENABLE, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);</div><div class='del'>-	i = sleep_on_timeout(&amp;ti-&gt;wait_for_reset, 4 * HZ);</div><div class='del'>-	return i? 0 : -EAGAIN;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-static int tok_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/*the case we were left in a failure state during a previous open */</div><div class='del'>-	if (ti-&gt;open_failure == YES) {</div><div class='del'>-		DPRINTK("Last time you were disconnected, how about now?\n");</div><div class='del'>-		printk("You can't insert with an ICS connector half-cocked.\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ti-&gt;open_status  = CLOSED; /* CLOSED or OPEN      */</div><div class='del'>-	ti-&gt;sap_status   = CLOSED; /* CLOSED or OPEN      */</div><div class='del'>-	ti-&gt;open_failure =     NO; /* NO     or YES       */</div><div class='del'>-	ti-&gt;open_mode    = MANUAL; /* MANUAL or AUTOMATIC */</div><div class='del'>-</div><div class='del'>-	ti-&gt;sram_phys &amp;= ~1; /* to reverse what we do in tok_close */</div><div class='del'>-	/* init the spinlock */</div><div class='del'>-	spin_lock_init(&amp;ti-&gt;lock);</div><div class='del'>-	init_timer(&amp;ti-&gt;tr_timer);</div><div class='del'>-	</div><div class='del'>-	i = tok_init_card(dev);</div><div class='del'>-	if (i) return i;</div><div class='del'>-</div><div class='del'>-	while (1){</div><div class='del'>-		tok_open_adapter((unsigned long) dev);</div><div class='del'>-		i= interruptible_sleep_on_timeout(&amp;ti-&gt;wait_for_reset, 25 * HZ);</div><div class='del'>-		/* sig catch: estimate opening adapter takes more than .5 sec*/</div><div class='del'>-		if (i&gt;(245*HZ)/10) break; /* fancier than if (i==25*HZ) */</div><div class='del'>-		if (i==0) break;</div><div class='del'>-		if (ti-&gt;open_status == OPEN &amp;&amp; ti-&gt;sap_status==OPEN) {</div><div class='del'>-			netif_start_queue(dev);</div><div class='del'>-			DPRINTK("Adapter is up and running\n");</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		i=schedule_timeout_interruptible(TR_RETRY_INTERVAL);</div><div class='del'>-							/* wait 30 seconds */</div><div class='del'>-		if(i!=0) break; /*prob. a signal, like the i&gt;24*HZ case above */</div><div class='del'>-	}</div><div class='del'>-	outb(0, dev-&gt;base_addr + ADAPTRESET);/* kill pending interrupts*/</div><div class='del'>-	DPRINTK("TERMINATED via signal\n");	/*BMS useful */</div><div class='del'>-	return -EAGAIN;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-#define COMMAND_OFST             0</div><div class='del'>-#define OPEN_OPTIONS_OFST        8</div><div class='del'>-#define NUM_RCV_BUF_OFST        24</div><div class='del'>-#define RCV_BUF_LEN_OFST        26</div><div class='del'>-#define DHB_LENGTH_OFST         28</div><div class='del'>-#define NUM_DHB_OFST            30</div><div class='del'>-#define DLC_MAX_SAP_OFST        32</div><div class='del'>-#define DLC_MAX_STA_OFST        33</div><div class='del'>-</div><div class='del'>-static void tok_open_adapter(unsigned long dev_addr)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *) dev_addr;</div><div class='del'>-	struct tok_info *ti;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	ti = netdev_priv(dev);</div><div class='del'>-	SET_PAGE(ti-&gt;init_srb_page); </div><div class='del'>-	writeb(~SRB_RESP_INT, ti-&gt;mmio + ACA_OFFSET + ACA_RESET + ISRP_ODD);</div><div class='del'>-	for (i = 0; i &lt; sizeof(struct dir_open_adapter); i++)</div><div class='del'>-		writeb(0, ti-&gt;init_srb + i);</div><div class='del'>-	writeb(DIR_OPEN_ADAPTER, ti-&gt;init_srb + COMMAND_OFST);</div><div class='del'>-	writew(htons(OPEN_PASS_BCON_MAC), ti-&gt;init_srb + OPEN_OPTIONS_OFST);</div><div class='del'>-	if (ti-&gt;ring_speed == 16) {</div><div class='del'>-		writew(htons(ti-&gt;dhb_size16mb), ti-&gt;init_srb + DHB_LENGTH_OFST);</div><div class='del'>-		writew(htons(ti-&gt;rbuf_cnt16), ti-&gt;init_srb + NUM_RCV_BUF_OFST);</div><div class='del'>-		writew(htons(ti-&gt;rbuf_len16), ti-&gt;init_srb + RCV_BUF_LEN_OFST);</div><div class='del'>-	} else {</div><div class='del'>-		writew(htons(ti-&gt;dhb_size4mb), ti-&gt;init_srb + DHB_LENGTH_OFST);</div><div class='del'>-		writew(htons(ti-&gt;rbuf_cnt4), ti-&gt;init_srb + NUM_RCV_BUF_OFST);</div><div class='del'>-		writew(htons(ti-&gt;rbuf_len4), ti-&gt;init_srb + RCV_BUF_LEN_OFST);</div><div class='del'>-	}</div><div class='del'>-	writeb(NUM_DHB,		/* always 2 */ ti-&gt;init_srb + NUM_DHB_OFST);</div><div class='del'>-	writeb(DLC_MAX_SAP, ti-&gt;init_srb + DLC_MAX_SAP_OFST);</div><div class='del'>-	writeb(DLC_MAX_STA, ti-&gt;init_srb + DLC_MAX_STA_OFST);</div><div class='del'>-	ti-&gt;srb = ti-&gt;init_srb;	/* We use this one in the interrupt handler */</div><div class='del'>-	ti-&gt;srb_page = ti-&gt;init_srb_page;</div><div class='del'>-	DPRINTK("Opening adapter: Xmit bfrs: %d X %d, Rcv bfrs: %d X %d\n",</div><div class='del'>-		readb(ti-&gt;init_srb + NUM_DHB_OFST),</div><div class='del'>-		ntohs(readw(ti-&gt;init_srb + DHB_LENGTH_OFST)),</div><div class='del'>-		ntohs(readw(ti-&gt;init_srb + NUM_RCV_BUF_OFST)),</div><div class='del'>-		ntohs(readw(ti-&gt;init_srb + RCV_BUF_LEN_OFST)));</div><div class='del'>-	writeb(INT_ENABLE, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);</div><div class='del'>-	writeb(CMD_IN_SRB, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static void open_sap(unsigned char type, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	SET_PAGE(ti-&gt;srb_page);</div><div class='del'>-	for (i = 0; i &lt; sizeof(struct dlc_open_sap); i++)</div><div class='del'>-		writeb(0, ti-&gt;srb + i);</div><div class='del'>-</div><div class='del'>-#define MAX_I_FIELD_OFST        14</div><div class='del'>-#define SAP_VALUE_OFST          16</div><div class='del'>-#define SAP_OPTIONS_OFST        17</div><div class='del'>-#define STATION_COUNT_OFST      18</div><div class='del'>-</div><div class='del'>-	writeb(DLC_OPEN_SAP, ti-&gt;srb + COMMAND_OFST);</div><div class='del'>-	writew(htons(MAX_I_FIELD), ti-&gt;srb + MAX_I_FIELD_OFST);</div><div class='del'>-	writeb(SAP_OPEN_IND_SAP | SAP_OPEN_PRIORITY, ti-&gt;srb+ SAP_OPTIONS_OFST);</div><div class='del'>-	writeb(SAP_OPEN_STATION_CNT, ti-&gt;srb + STATION_COUNT_OFST);</div><div class='del'>-	writeb(type, ti-&gt;srb + SAP_VALUE_OFST);</div><div class='del'>-	writeb(CMD_IN_SRB, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static void tok_set_multicast_list(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-	struct netdev_hw_addr *ha;</div><div class='del'>-	unsigned char address[4];</div><div class='del'>-</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/*BMS the next line is CRUCIAL or you may be sad when you */</div><div class='del'>-	/*BMS ifconfig tr down or hot unplug a PCMCIA card ??hownowbrowncow*/</div><div class='del'>-	if (/*BMSHELPdev-&gt;start == 0 ||*/ ti-&gt;open_status != OPEN) return;</div><div class='del'>-	address[0] = address[1] = address[2] = address[3] = 0;</div><div class='del'>-	netdev_for_each_mc_addr(ha, dev) {</div><div class='del'>-		address[0] |= ha-&gt;addr[2];</div><div class='del'>-		address[1] |= ha-&gt;addr[3];</div><div class='del'>-		address[2] |= ha-&gt;addr[4];</div><div class='del'>-		address[3] |= ha-&gt;addr[5];</div><div class='del'>-	}</div><div class='del'>-	SET_PAGE(ti-&gt;srb_page);</div><div class='del'>-	for (i = 0; i &lt; sizeof(struct srb_set_funct_addr); i++)</div><div class='del'>-		writeb(0, ti-&gt;srb + i);</div><div class='del'>-</div><div class='del'>-#define FUNCT_ADDRESS_OFST 6</div><div class='del'>-</div><div class='del'>-	writeb(DIR_SET_FUNC_ADDR, ti-&gt;srb + COMMAND_OFST);</div><div class='del'>-	for (i = 0; i &lt; 4; i++) </div><div class='del'>-		writeb(address[i], ti-&gt;srb + FUNCT_ADDRESS_OFST + i);</div><div class='del'>-	writeb(CMD_IN_SRB, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);</div><div class='del'>-#if TR_VERBOSE</div><div class='del'>-	DPRINTK("Setting functional address: ");</div><div class='del'>-	for (i=0;i&lt;4;i++)  printk("%02X ", address[i]);</div><div class='del'>-	printk("\n");</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-#define STATION_ID_OFST 4</div><div class='del'>-</div><div class='del'>-static netdev_tx_t tok_send_packet(struct sk_buff *skb,</div><div class='del'>-					 struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct tok_info *ti;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	ti = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	/* lock against other CPUs */</div><div class='del'>-	spin_lock_irqsave(&amp;(ti-&gt;lock), flags);</div><div class='del'>-</div><div class='del'>-	/* Save skb; we'll need it when the adapter asks for the data */</div><div class='del'>-	ti-&gt;current_skb = skb;</div><div class='del'>-	SET_PAGE(ti-&gt;srb_page);</div><div class='del'>-	writeb(XMIT_UI_FRAME, ti-&gt;srb + COMMAND_OFST);</div><div class='del'>-	writew(ti-&gt;exsap_station_id, ti-&gt;srb + STATION_ID_OFST);</div><div class='del'>-	writeb(CMD_IN_SRB, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);</div><div class='del'>-	spin_unlock_irqrestore(&amp;(ti-&gt;lock), flags);</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static int tok_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* Important for PCMCIA hot unplug, otherwise, we'll pull the card, */</div><div class='del'>-	/* unloading the module from memory, and then if a timer pops, ouch */</div><div class='del'>-	del_timer_sync(&amp;ti-&gt;tr_timer);</div><div class='del'>-	outb(0, dev-&gt;base_addr + ADAPTRESET);</div><div class='del'>-	ti-&gt;sram_phys |= 1;</div><div class='del'>-	ti-&gt;open_status = CLOSED;</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	DPRINTK("Adapter is closed.\n");</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-#define RETCODE_OFST		2</div><div class='del'>-#define OPEN_ERROR_CODE_OFST	6</div><div class='del'>-#define ASB_ADDRESS_OFST        8</div><div class='del'>-#define SRB_ADDRESS_OFST        10</div><div class='del'>-#define ARB_ADDRESS_OFST        12</div><div class='del'>-#define SSB_ADDRESS_OFST        14</div><div class='del'>-</div><div class='del'>-static char *printphase[]= {"Lobe media test","Physical insertion",</div><div class='del'>-	      "Address verification","Roll call poll","Request Parameters"};</div><div class='del'>-static char *printerror[]={"Function failure","Signal loss","Reserved",</div><div class='del'>-		"Frequency error","Timeout","Ring failure","Ring beaconing",</div><div class='del'>-		"Duplicate node address",</div><div class='del'>-		"Parameter request-retry count exceeded","Remove received",</div><div class='del'>-		"IMPL force received","Duplicate modifier",</div><div class='del'>-		"No monitor detected","Monitor contention failed for RPL"};</div><div class='del'>-</div><div class='del'>-static void __iomem *map_address(struct tok_info *ti, unsigned index, __u8 *page)</div><div class='del'>-{</div><div class='del'>-	if (ti-&gt;page_mask) {</div><div class='del'>-		*page = (index &gt;&gt; 8) &amp; ti-&gt;page_mask;</div><div class='del'>-		index &amp;= ~(ti-&gt;page_mask &lt;&lt; 8);</div><div class='del'>-	}</div><div class='del'>-	return ti-&gt;sram_virt + index;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dir_open_adapter (struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-        unsigned char ret_code;</div><div class='del'>-        __u16 err;</div><div class='del'>-</div><div class='del'>-        ti-&gt;srb = map_address(ti,</div><div class='del'>-		ntohs(readw(ti-&gt;init_srb + SRB_ADDRESS_OFST)),</div><div class='del'>-		&amp;ti-&gt;srb_page);</div><div class='del'>-        ti-&gt;ssb = map_address(ti,</div><div class='del'>-		ntohs(readw(ti-&gt;init_srb + SSB_ADDRESS_OFST)),</div><div class='del'>-		&amp;ti-&gt;ssb_page);</div><div class='del'>-        ti-&gt;arb = map_address(ti,</div><div class='del'>-		ntohs(readw(ti-&gt;init_srb + ARB_ADDRESS_OFST)),</div><div class='del'>-		&amp;ti-&gt;arb_page);</div><div class='del'>-        ti-&gt;asb = map_address(ti,</div><div class='del'>-		ntohs(readw(ti-&gt;init_srb + ASB_ADDRESS_OFST)),</div><div class='del'>-		&amp;ti-&gt;asb_page);</div><div class='del'>-        ti-&gt;current_skb = NULL;</div><div class='del'>-        ret_code = readb(ti-&gt;init_srb + RETCODE_OFST);</div><div class='del'>-        err = ntohs(readw(ti-&gt;init_srb + OPEN_ERROR_CODE_OFST));</div><div class='del'>-        if (!ret_code) {</div><div class='del'>-		ti-&gt;open_status = OPEN; /* TR adapter is now available */</div><div class='del'>-                if (ti-&gt;open_mode == AUTOMATIC) {</div><div class='del'>-			DPRINTK("Adapter reopened.\n");</div><div class='del'>-                }</div><div class='del'>-                writeb(~SRB_RESP_INT, ti-&gt;mmio+ACA_OFFSET+ACA_RESET+ISRP_ODD);</div><div class='del'>-                open_sap(EXTENDED_SAP, dev);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	ti-&gt;open_failure = YES;</div><div class='del'>-	if (ret_code == 7){</div><div class='del'>-               if (err == 0x24) {</div><div class='del'>-			if (!ti-&gt;auto_speedsave) {</div><div class='del'>-				DPRINTK("Open failed: Adapter speed must match "</div><div class='del'>-                                 "ring speed if Automatic Ring Speed Save is "</div><div class='del'>-				 "disabled.\n");</div><div class='del'>-				ti-&gt;open_action = FAIL;</div><div class='del'>-			}else</div><div class='del'>-				DPRINTK("Retrying open to adjust to "</div><div class='del'>-					"ring speed, ");</div><div class='del'>-                } else if (err == 0x2d) {</div><div class='del'>-			DPRINTK("Physical Insertion: No Monitor Detected, ");</div><div class='del'>-			printk("retrying after %ds delay...\n",</div><div class='del'>-					TR_RETRY_INTERVAL/HZ);</div><div class='del'>-                } else if (err == 0x11) {</div><div class='del'>-			DPRINTK("Lobe Media Function Failure (0x11), ");</div><div class='del'>-			printk(" retrying after %ds delay...\n",</div><div class='del'>-					TR_RETRY_INTERVAL/HZ);</div><div class='del'>-                } else {</div><div class='del'>-			char **prphase = printphase;</div><div class='del'>-			char **prerror = printerror;</div><div class='del'>-			int pnr = err / 16 - 1;</div><div class='del'>-			int enr = err % 16 - 1;</div><div class='del'>-			DPRINTK("TR Adapter misc open failure, error code = ");</div><div class='del'>-			if (pnr &lt; 0 || pnr &gt;= ARRAY_SIZE(printphase) ||</div><div class='del'>-					enr &lt; 0 ||</div><div class='del'>-					enr &gt;= ARRAY_SIZE(printerror))</div><div class='del'>-				printk("0x%x, invalid Phase/Error.", err);</div><div class='del'>-			else</div><div class='del'>-				printk("0x%x, Phase: %s, Error: %s\n", err,</div><div class='del'>-						prphase[pnr], prerror[enr]);</div><div class='del'>-			printk(" retrying after %ds delay...\n",</div><div class='del'>-					TR_RETRY_INTERVAL/HZ);</div><div class='del'>-                }</div><div class='del'>-        } else DPRINTK("open failed: ret_code = %02X..., ", ret_code);</div><div class='del'>-	if (ti-&gt;open_action != FAIL) {</div><div class='del'>-		if (ti-&gt;open_mode==AUTOMATIC){</div><div class='del'>-			ti-&gt;open_action = REOPEN;</div><div class='del'>-			ibmtr_reset_timer(&amp;(ti-&gt;tr_timer), dev);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		wake_up(&amp;ti-&gt;wait_for_reset);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	DPRINTK("FAILURE, CAPUT\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************************************************/</div><div class='del'>-</div><div class='del'>-static irqreturn_t tok_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	unsigned char status;</div><div class='del'>-	/*  unsigned char status_even ; */</div><div class='del'>-	struct tok_info *ti;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-#ifdef ENABLE_PAGING</div><div class='del'>-	unsigned char save_srpr;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	dev = dev_id;</div><div class='del'>-#if TR_VERBOSE</div><div class='del'>-	DPRINTK("Int from tok_driver, dev : %p irq%d\n", dev,irq);</div><div class='del'>-#endif</div><div class='del'>-	ti = netdev_priv(dev);</div><div class='del'>-	if (ti-&gt;sram_phys &amp; 1)</div><div class='del'>-		return IRQ_NONE;         /* PCMCIA card extraction flag */</div><div class='del'>-	spin_lock(&amp;(ti-&gt;lock));</div><div class='del'>-#ifdef ENABLE_PAGING</div><div class='del'>-	save_srpr = readb(ti-&gt;mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* Disable interrupts till processing is finished */</div><div class='del'>-	writeb((~INT_ENABLE), ti-&gt;mmio + ACA_OFFSET + ACA_RESET + ISRP_EVEN);</div><div class='del'>-</div><div class='del'>-	/* Reset interrupt for ISA boards */</div><div class='del'>-	if (ti-&gt;adapter_int_enable)</div><div class='del'>-		outb(0, ti-&gt;adapter_int_enable);</div><div class='del'>-	else /* used for PCMCIA cards */</div><div class='del'>-		outb(0, ti-&gt;global_int_enable);</div><div class='del'>-        if (ti-&gt;do_tok_int == FIRST_INT){</div><div class='del'>-                initial_tok_int(dev);</div><div class='del'>-#ifdef ENABLE_PAGING</div><div class='del'>-                writeb(save_srpr, ti-&gt;mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN);</div><div class='del'>-#endif</div><div class='del'>-                spin_unlock(&amp;(ti-&gt;lock));</div><div class='del'>-                return IRQ_HANDLED;</div><div class='del'>-        }</div><div class='del'>-	/*  Begin interrupt handler HERE inline to avoid the extra</div><div class='del'>-	    levels of logic and call depth for the original solution. */</div><div class='del'>-	status = readb(ti-&gt;mmio + ACA_OFFSET + ACA_RW + ISRP_ODD);</div><div class='del'>-	/*BMSstatus_even = readb (ti-&gt;mmio + ACA_OFFSET + ACA_RW + ISRP_EVEN) */</div><div class='del'>-	/*BMSdebugprintk("tok_interrupt: ISRP_ODD = 0x%x ISRP_EVEN = 0x%x\n", */</div><div class='del'>-	/*BMS                                       status,status_even);      */</div><div class='del'>-</div><div class='del'>-	if (status &amp; ADAP_CHK_INT) {</div><div class='del'>-		int i;</div><div class='del'>-		void __iomem *check_reason;</div><div class='del'>-		__u8 check_reason_page = 0;</div><div class='del'>-		check_reason = map_address(ti,</div><div class='del'>-			ntohs(readw(ti-&gt;mmio+ ACA_OFFSET+ACA_RW + WWCR_EVEN)),</div><div class='del'>-			&amp;check_reason_page);</div><div class='del'>-		SET_PAGE(check_reason_page);</div><div class='del'>-</div><div class='del'>-		DPRINTK("Adapter check interrupt\n");</div><div class='del'>-		DPRINTK("8 reason bytes follow: ");</div><div class='del'>-		for (i = 0; i &lt; 8; i++, check_reason++)</div><div class='del'>-			printk("%02X ", (int) readb(check_reason));</div><div class='del'>-		printk("\n");</div><div class='del'>-		writeb(~ADAP_CHK_INT, ti-&gt;mmio+ ACA_OFFSET+ACA_RESET+ ISRP_ODD);</div><div class='del'>-		status = readb(ti-&gt;mmio + ACA_OFFSET + ACA_RW + ISRA_EVEN);</div><div class='del'>-		DPRINTK("ISRA_EVEN == 0x02%x\n",status);</div><div class='del'>-		ti-&gt;open_status = CLOSED;</div><div class='del'>-		ti-&gt;sap_status  = CLOSED;</div><div class='del'>-		ti-&gt;open_mode   = AUTOMATIC;</div><div class='del'>-		netif_carrier_off(dev);</div><div class='del'>-		netif_stop_queue(dev);</div><div class='del'>-		ti-&gt;open_action = RESTART;</div><div class='del'>-		outb(0, dev-&gt;base_addr + ADAPTRESET);</div><div class='del'>-		ibmtr_reset_timer(&amp;(ti-&gt;tr_timer), dev);/*BMS try to reopen*/</div><div class='del'>-		spin_unlock(&amp;(ti-&gt;lock));</div><div class='del'>-		return IRQ_HANDLED;</div><div class='del'>-	}</div><div class='del'>-	if (readb(ti-&gt;mmio + ACA_OFFSET + ACA_RW + ISRP_EVEN)</div><div class='del'>-		&amp; (TCR_INT | ERR_INT | ACCESS_INT)) {</div><div class='del'>-		DPRINTK("adapter error: ISRP_EVEN : %02x\n",</div><div class='del'>-			(int)readb(ti-&gt;mmio+ ACA_OFFSET + ACA_RW + ISRP_EVEN));</div><div class='del'>-		writeb(~(TCR_INT | ERR_INT | ACCESS_INT),</div><div class='del'>-			ti-&gt;mmio + ACA_OFFSET + ACA_RESET + ISRP_EVEN);</div><div class='del'>-		status= readb(ti-&gt;mmio+ ACA_OFFSET + ACA_RW + ISRA_EVEN);/*BMS*/</div><div class='del'>-		DPRINTK("ISRA_EVEN == 0x02%x\n",status);/*BMS*/</div><div class='del'>-                writeb(INT_ENABLE, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);</div><div class='del'>-#ifdef ENABLE_PAGING</div><div class='del'>-                writeb(save_srpr, ti-&gt;mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN);</div><div class='del'>-#endif</div><div class='del'>-                spin_unlock(&amp;(ti-&gt;lock));</div><div class='del'>-                return IRQ_HANDLED;</div><div class='del'>-        }</div><div class='del'>-	if (status &amp; SRB_RESP_INT) {	/* SRB response */</div><div class='del'>-		SET_PAGE(ti-&gt;srb_page);</div><div class='del'>-#if TR_VERBOSE</div><div class='del'>-		DPRINTK("SRB resp: cmd=%02X rsp=%02X\n",</div><div class='del'>-				readb(ti-&gt;srb), readb(ti-&gt;srb + RETCODE_OFST));</div><div class='del'>-#endif</div><div class='del'>-		switch (readb(ti-&gt;srb)) {	/* SRB command check */</div><div class='del'>-		case XMIT_DIR_FRAME:{</div><div class='del'>-			unsigned char xmit_ret_code;</div><div class='del'>-			xmit_ret_code = readb(ti-&gt;srb + RETCODE_OFST);</div><div class='del'>-			if (xmit_ret_code == 0xff) break;</div><div class='del'>-			DPRINTK("error on xmit_dir_frame request: %02X\n",</div><div class='del'>-								xmit_ret_code);</div><div class='del'>-			if (ti-&gt;current_skb) {</div><div class='del'>-				dev_kfree_skb_irq(ti-&gt;current_skb);</div><div class='del'>-				ti-&gt;current_skb = NULL;</div><div class='del'>-			}</div><div class='del'>-			/*dev-&gt;tbusy = 0;*/</div><div class='del'>-			netif_wake_queue(dev);</div><div class='del'>-			if (ti-&gt;readlog_pending)</div><div class='del'>-				ibmtr_readlog(dev);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		case XMIT_UI_FRAME:{</div><div class='del'>-			unsigned char xmit_ret_code;</div><div class='del'>-</div><div class='del'>-			xmit_ret_code = readb(ti-&gt;srb + RETCODE_OFST);</div><div class='del'>-			if (xmit_ret_code == 0xff) break;</div><div class='del'>-			DPRINTK("error on xmit_ui_frame request: %02X\n",</div><div class='del'>-								xmit_ret_code);</div><div class='del'>-			if (ti-&gt;current_skb) {</div><div class='del'>-				dev_kfree_skb_irq(ti-&gt;current_skb);</div><div class='del'>-				ti-&gt;current_skb = NULL;</div><div class='del'>-			}</div><div class='del'>-			netif_wake_queue(dev);</div><div class='del'>-			if (ti-&gt;readlog_pending)</div><div class='del'>-				ibmtr_readlog(dev);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		case DIR_OPEN_ADAPTER:</div><div class='del'>-			dir_open_adapter(dev);</div><div class='del'>-			break;</div><div class='del'>-		case DLC_OPEN_SAP:</div><div class='del'>-			if (readb(ti-&gt;srb + RETCODE_OFST)) {</div><div class='del'>-				DPRINTK("open_sap failed: ret_code = %02X, "</div><div class='del'>-					"retrying\n",</div><div class='del'>-					(int) readb(ti-&gt;srb + RETCODE_OFST));</div><div class='del'>-				ti-&gt;open_action = REOPEN;</div><div class='del'>-				ibmtr_reset_timer(&amp;(ti-&gt;tr_timer), dev);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			ti-&gt;exsap_station_id = readw(ti-&gt;srb + STATION_ID_OFST);</div><div class='del'>-			ti-&gt;sap_status = OPEN;/* TR adapter is now available */</div><div class='del'>-			if (ti-&gt;open_mode==MANUAL){</div><div class='del'>-				wake_up(&amp;ti-&gt;wait_for_reset);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			netif_wake_queue(dev);</div><div class='del'>-			netif_carrier_on(dev);</div><div class='del'>-			break;</div><div class='del'>-		case DIR_INTERRUPT:</div><div class='del'>-		case DIR_MOD_OPEN_PARAMS:</div><div class='del'>-		case DIR_SET_GRP_ADDR:</div><div class='del'>-		case DIR_SET_FUNC_ADDR:</div><div class='del'>-		case DLC_CLOSE_SAP:</div><div class='del'>-			if (readb(ti-&gt;srb + RETCODE_OFST))</div><div class='del'>-				DPRINTK("error on %02X: %02X\n",</div><div class='del'>-					(int) readb(ti-&gt;srb + COMMAND_OFST),</div><div class='del'>-					(int) readb(ti-&gt;srb + RETCODE_OFST));</div><div class='del'>-			break;</div><div class='del'>-		case DIR_READ_LOG:</div><div class='del'>-			if (readb(ti-&gt;srb + RETCODE_OFST)){</div><div class='del'>-				DPRINTK("error on dir_read_log: %02X\n",</div><div class='del'>-					(int) readb(ti-&gt;srb + RETCODE_OFST));</div><div class='del'>-				netif_wake_queue(dev);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-#if IBMTR_DEBUG_MESSAGES</div><div class='del'>-</div><div class='del'>-#define LINE_ERRORS_OFST                 0</div><div class='del'>-#define INTERNAL_ERRORS_OFST             1</div><div class='del'>-#define BURST_ERRORS_OFST                2</div><div class='del'>-#define AC_ERRORS_OFST                   3</div><div class='del'>-#define ABORT_DELIMITERS_OFST            4</div><div class='del'>-#define LOST_FRAMES_OFST                 6</div><div class='del'>-#define RECV_CONGEST_COUNT_OFST          7</div><div class='del'>-#define FRAME_COPIED_ERRORS_OFST         8</div><div class='del'>-#define FREQUENCY_ERRORS_OFST            9</div><div class='del'>-#define TOKEN_ERRORS_OFST               10</div><div class='del'>-</div><div class='del'>-			DPRINTK("Line errors %02X, Internal errors %02X, "</div><div class='del'>-			"Burst errors %02X\n" "A/C errors %02X, "</div><div class='del'>-			"Abort delimiters %02X, Lost frames %02X\n"</div><div class='del'>-			"Receive congestion count %02X, "</div><div class='del'>-			"Frame copied errors %02X\nFrequency errors %02X, "</div><div class='del'>-			"Token errors %02X\n",</div><div class='del'>-			(int) readb(ti-&gt;srb + LINE_ERRORS_OFST),</div><div class='del'>-			(int) readb(ti-&gt;srb + INTERNAL_ERRORS_OFST),</div><div class='del'>-			(int) readb(ti-&gt;srb + BURST_ERRORS_OFST),</div><div class='del'>-			(int) readb(ti-&gt;srb + AC_ERRORS_OFST),</div><div class='del'>-			(int) readb(ti-&gt;srb + ABORT_DELIMITERS_OFST),</div><div class='del'>-			(int) readb(ti-&gt;srb + LOST_FRAMES_OFST),</div><div class='del'>-			(int) readb(ti-&gt;srb + RECV_CONGEST_COUNT_OFST),</div><div class='del'>-			(int) readb(ti-&gt;srb + FRAME_COPIED_ERRORS_OFST),</div><div class='del'>-			(int) readb(ti-&gt;srb + FREQUENCY_ERRORS_OFST),</div><div class='del'>-			(int) readb(ti-&gt;srb + TOKEN_ERRORS_OFST));</div><div class='del'>-#endif</div><div class='del'>-			netif_wake_queue(dev);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			DPRINTK("Unknown command %02X encountered\n",</div><div class='del'>-						(int) readb(ti-&gt;srb));</div><div class='del'>-        	}	/* end switch SRB command check */</div><div class='del'>-		writeb(~SRB_RESP_INT, ti-&gt;mmio+ ACA_OFFSET+ACA_RESET+ ISRP_ODD);</div><div class='del'>-	}	/* if SRB response */</div><div class='del'>-	if (status &amp; ASB_FREE_INT) {	/* ASB response */</div><div class='del'>-		SET_PAGE(ti-&gt;asb_page);</div><div class='del'>-#if TR_VERBOSE</div><div class='del'>-		DPRINTK("ASB resp: cmd=%02X\n", readb(ti-&gt;asb));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		switch (readb(ti-&gt;asb)) {	/* ASB command check */</div><div class='del'>-		case REC_DATA:</div><div class='del'>-		case XMIT_UI_FRAME:</div><div class='del'>-		case XMIT_DIR_FRAME:</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			DPRINTK("unknown command in asb %02X\n",</div><div class='del'>-						(int) readb(ti-&gt;asb));</div><div class='del'>-		}	/* switch ASB command check */</div><div class='del'>-		if (readb(ti-&gt;asb + 2) != 0xff)	/* checks ret_code */</div><div class='del'>-			DPRINTK("ASB error %02X in cmd %02X\n",</div><div class='del'>-				(int) readb(ti-&gt;asb + 2), (int) readb(ti-&gt;asb));</div><div class='del'>-		writeb(~ASB_FREE_INT, ti-&gt;mmio+ ACA_OFFSET+ACA_RESET+ ISRP_ODD);</div><div class='del'>-	}	/* if ASB response */</div><div class='del'>-</div><div class='del'>-#define STATUS_OFST             6</div><div class='del'>-#define NETW_STATUS_OFST        6</div><div class='del'>-</div><div class='del'>-	if (status &amp; ARB_CMD_INT) {	/* ARB response */</div><div class='del'>-		SET_PAGE(ti-&gt;arb_page);</div><div class='del'>-#if TR_VERBOSE</div><div class='del'>-		DPRINTK("ARB resp: cmd=%02X\n", readb(ti-&gt;arb));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		switch (readb(ti-&gt;arb)) {	/* ARB command check */</div><div class='del'>-		case DLC_STATUS:</div><div class='del'>-			DPRINTK("DLC_STATUS new status: %02X on station %02X\n",</div><div class='del'>-				ntohs(readw(ti-&gt;arb + STATUS_OFST)),</div><div class='del'>-				ntohs(readw(ti-&gt;arb+ STATION_ID_OFST)));</div><div class='del'>-			break;</div><div class='del'>-		case REC_DATA:</div><div class='del'>-			tr_rx(dev);</div><div class='del'>-			break;</div><div class='del'>-		case RING_STAT_CHANGE:{</div><div class='del'>-			unsigned short ring_status;</div><div class='del'>-			ring_status= ntohs(readw(ti-&gt;arb + NETW_STATUS_OFST));</div><div class='del'>-			if (ibmtr_debug_trace &amp; TRC_INIT)</div><div class='del'>-				DPRINTK("Ring Status Change...(0x%x)\n",</div><div class='del'>-								ring_status);</div><div class='del'>-			if(ring_status&amp; (REMOVE_RECV|AUTO_REMOVAL|LOBE_FAULT)){</div><div class='del'>-				netif_stop_queue(dev);</div><div class='del'>-				netif_carrier_off(dev);</div><div class='del'>-				DPRINTK("Remove received, or Auto-removal error"</div><div class='del'>-					", or Lobe fault\n");</div><div class='del'>-				DPRINTK("We'll try to reopen the closed adapter"</div><div class='del'>-					" after a %d second delay.\n",</div><div class='del'>-						TR_RETRY_INTERVAL/HZ);</div><div class='del'>-				/*I was confused: I saw the TR reopening but */</div><div class='del'>-				/*forgot:with an RJ45 in an RJ45/ICS adapter */</div><div class='del'>-				/*but adapter not in the ring, the TR will   */</div><div class='del'>-				/* open, and then soon close and come here.  */</div><div class='del'>-				ti-&gt;open_mode = AUTOMATIC;</div><div class='del'>-				ti-&gt;open_status = CLOSED; /*12/2000 BMS*/</div><div class='del'>-				ti-&gt;open_action = REOPEN;</div><div class='del'>-				ibmtr_reset_timer(&amp;(ti-&gt;tr_timer), dev);</div><div class='del'>-			} else if (ring_status &amp; LOG_OVERFLOW) {</div><div class='del'>-				if(netif_queue_stopped(dev))</div><div class='del'>-					ti-&gt;readlog_pending = 1;</div><div class='del'>-				else</div><div class='del'>-					ibmtr_readlog(dev);</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-          	}</div><div class='del'>-		case XMIT_DATA_REQ:</div><div class='del'>-			tr_tx(dev);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			DPRINTK("Unknown command %02X in arb\n",</div><div class='del'>-						(int) readb(ti-&gt;arb));</div><div class='del'>-			break;</div><div class='del'>-		}	/* switch ARB command check */</div><div class='del'>-		writeb(~ARB_CMD_INT, ti-&gt;mmio+ ACA_OFFSET+ACA_RESET + ISRP_ODD);</div><div class='del'>-		writeb(ARB_FREE, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);</div><div class='del'>-	}	/* if ARB response */</div><div class='del'>-	if (status &amp; SSB_RESP_INT) {	/* SSB response */</div><div class='del'>-		unsigned char retcode;</div><div class='del'>-		SET_PAGE(ti-&gt;ssb_page);</div><div class='del'>-#if TR_VERBOSE</div><div class='del'>-		DPRINTK("SSB resp: cmd=%02X rsp=%02X\n",</div><div class='del'>-				readb(ti-&gt;ssb), readb(ti-&gt;ssb + 2));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		switch (readb(ti-&gt;ssb)) {	/* SSB command check */</div><div class='del'>-		case XMIT_DIR_FRAME:</div><div class='del'>-		case XMIT_UI_FRAME:</div><div class='del'>-			retcode = readb(ti-&gt;ssb + 2);</div><div class='del'>-			if (retcode &amp;&amp; (retcode != 0x22))/* checks ret_code */</div><div class='del'>-				DPRINTK("xmit ret_code: %02X xmit error code: "</div><div class='del'>-					"%02X\n",</div><div class='del'>-					(int)retcode, (int)readb(ti-&gt;ssb + 6));</div><div class='del'>-			else</div><div class='del'>-				dev-&gt;stats.tx_packets++;</div><div class='del'>-			break;</div><div class='del'>-		case XMIT_XID_CMD:</div><div class='del'>-			DPRINTK("xmit xid ret_code: %02X\n",</div><div class='del'>-						(int) readb(ti-&gt;ssb + 2));</div><div class='del'>-		default:</div><div class='del'>-			DPRINTK("Unknown command %02X in ssb\n",</div><div class='del'>-						(int) readb(ti-&gt;ssb));</div><div class='del'>-		}	/* SSB command check */</div><div class='del'>-		writeb(~SSB_RESP_INT, ti-&gt;mmio+ ACA_OFFSET+ACA_RESET+ ISRP_ODD);</div><div class='del'>-		writeb(SSB_FREE, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);</div><div class='del'>-	}	/* if SSB response */</div><div class='del'>-#ifdef ENABLE_PAGING</div><div class='del'>-	writeb(save_srpr, ti-&gt;mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN);</div><div class='del'>-#endif</div><div class='del'>-	writeb(INT_ENABLE, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);</div><div class='del'>-	spin_unlock(&amp;(ti-&gt;lock));</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}				/*tok_interrupt */</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-#define INIT_STATUS_OFST        1</div><div class='del'>-#define INIT_STATUS_2_OFST      2</div><div class='del'>-#define ENCODED_ADDRESS_OFST    8</div><div class='del'>-</div><div class='del'>-static void initial_tok_int(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	__u32 encoded_addr, hw_encoded_addr;</div><div class='del'>-	struct tok_info *ti;</div><div class='del'>-        unsigned char init_status; /*BMS 12/2000*/</div><div class='del'>-</div><div class='del'>-	ti = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	ti-&gt;do_tok_int = NOT_FIRST;</div><div class='del'>-</div><div class='del'>-	/* we assign the shared-ram address for ISA devices */</div><div class='del'>-	writeb(ti-&gt;sram_base, ti-&gt;mmio + ACA_OFFSET + ACA_RW + RRR_EVEN);</div><div class='del'>-#ifndef PCMCIA</div><div class='del'>-        ti-&gt;sram_virt = ioremap(((__u32)ti-&gt;sram_base &lt;&lt; 12), ti-&gt;avail_shared_ram);</div><div class='del'>-#endif</div><div class='del'>-	ti-&gt;init_srb = map_address(ti,</div><div class='del'>-		ntohs(readw(ti-&gt;mmio + ACA_OFFSET + WRBR_EVEN)),</div><div class='del'>-		&amp;ti-&gt;init_srb_page);</div><div class='del'>-	if (ti-&gt;page_mask &amp;&amp; ti-&gt;avail_shared_ram == 127) {</div><div class='del'>-		void __iomem *last_512;</div><div class='del'>-		__u8 last_512_page=0;</div><div class='del'>-		int i;</div><div class='del'>-		last_512 = map_address(ti, 0xfe00, &amp;last_512_page);</div><div class='del'>-		/* initialize high section of ram (if necessary) */</div><div class='del'>-		SET_PAGE(last_512_page);</div><div class='del'>-		for (i = 0; i &lt; 512; i++)</div><div class='del'>-			writeb(0, last_512 + i);</div><div class='del'>-	}</div><div class='del'>-	SET_PAGE(ti-&gt;init_srb_page);</div><div class='del'>-</div><div class='del'>-#if TR_VERBOSE</div><div class='del'>-	{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	DPRINTK("ti-&gt;init_srb_page=0x%x\n", ti-&gt;init_srb_page);</div><div class='del'>-	DPRINTK("init_srb(%p):", ti-&gt;init_srb );</div><div class='del'>-	for (i = 0; i &lt; 20; i++)</div><div class='del'>-		printk("%02X ", (int) readb(ti-&gt;init_srb + i));</div><div class='del'>-	printk("\n");</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	hw_encoded_addr = readw(ti-&gt;init_srb + ENCODED_ADDRESS_OFST);</div><div class='del'>-	encoded_addr = ntohs(hw_encoded_addr);</div><div class='del'>-        init_status= /*BMS 12/2000 check for shallow mode possibility (Turbo)*/</div><div class='del'>-	readb(ti-&gt;init_srb+offsetof(struct srb_init_response,init_status));</div><div class='del'>-	/*printk("Initial interrupt: init_status= 0x%02x\n",init_status);*/</div><div class='del'>-	ti-&gt;ring_speed = init_status &amp; 0x01 ? 16 : 4;</div><div class='del'>-	DPRINTK("Initial interrupt : %d Mbps, shared RAM base %08x.\n",</div><div class='del'>-				ti-&gt;ring_speed, (unsigned int)dev-&gt;mem_start);</div><div class='del'>-	ti-&gt;auto_speedsave = (readb(ti-&gt;init_srb+INIT_STATUS_2_OFST) &amp; 4) != 0;</div><div class='del'>-</div><div class='del'>-        if (ti-&gt;open_mode == MANUAL)	wake_up(&amp;ti-&gt;wait_for_reset);</div><div class='del'>-	else				tok_open_adapter((unsigned long)dev);</div><div class='del'>-        </div><div class='del'>-} /*initial_tok_int() */</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-#define CMD_CORRELATE_OFST      1</div><div class='del'>-#define DHB_ADDRESS_OFST        6</div><div class='del'>-</div><div class='del'>-#define FRAME_LENGTH_OFST       6</div><div class='del'>-#define HEADER_LENGTH_OFST      8</div><div class='del'>-#define RSAP_VALUE_OFST         9</div><div class='del'>-</div><div class='del'>-static void tr_tx(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-	struct trh_hdr *trhdr = (struct trh_hdr *) ti-&gt;current_skb-&gt;data;</div><div class='del'>-	unsigned int hdr_len;</div><div class='del'>-	__u32 dhb=0,dhb_base;</div><div class='del'>-	void __iomem *dhbuf = NULL;</div><div class='del'>-	unsigned char xmit_command;</div><div class='del'>-	int i,dhb_len=0x4000,src_len,src_offset;</div><div class='del'>-	struct trllc *llc;</div><div class='del'>-	struct srb_xmit xsrb;</div><div class='del'>-	__u8 dhb_page = 0;</div><div class='del'>-	__u8 llc_ssap;</div><div class='del'>-</div><div class='del'>-	SET_PAGE(ti-&gt;asb_page);</div><div class='del'>-</div><div class='del'>-	if (readb(ti-&gt;asb+RETCODE_OFST) != 0xFF) DPRINTK("ASB not free !!!\n");</div><div class='del'>-</div><div class='del'>-	/* in providing the transmit interrupts, is telling us it is ready for</div><div class='del'>-	   data and providing a shared memory address for us to stuff with data.</div><div class='del'>-	   Here we compute the effective address where we will place data.</div><div class='del'>-	*/</div><div class='del'>-	SET_PAGE(ti-&gt;arb_page);</div><div class='del'>-	dhb=dhb_base=ntohs(readw(ti-&gt;arb + DHB_ADDRESS_OFST));</div><div class='del'>-	if (ti-&gt;page_mask) {</div><div class='del'>-		dhb_page = (dhb_base &gt;&gt; 8) &amp; ti-&gt;page_mask;</div><div class='del'>-		dhb=dhb_base &amp; ~(ti-&gt;page_mask &lt;&lt; 8);</div><div class='del'>-	}</div><div class='del'>-	dhbuf = ti-&gt;sram_virt + dhb;</div><div class='del'>-</div><div class='del'>-	/* Figure out the size of the 802.5 header */</div><div class='del'>-	if (!(trhdr-&gt;saddr[0] &amp; 0x80))	/* RIF present? */</div><div class='del'>-		hdr_len = sizeof(struct trh_hdr) - TR_MAXRIFLEN;</div><div class='del'>-	else</div><div class='del'>-		hdr_len = ((ntohs(trhdr-&gt;rcf) &amp; TR_RCF_LEN_MASK) &gt;&gt; 8)</div><div class='del'>-		    + sizeof(struct trh_hdr) - TR_MAXRIFLEN;</div><div class='del'>-</div><div class='del'>-	llc = (struct trllc *) (ti-&gt;current_skb-&gt;data + hdr_len);</div><div class='del'>-</div><div class='del'>-	llc_ssap = llc-&gt;ssap;</div><div class='del'>-	SET_PAGE(ti-&gt;srb_page);</div><div class='del'>-	memcpy_fromio(&amp;xsrb, ti-&gt;srb, sizeof(xsrb));</div><div class='del'>-	SET_PAGE(ti-&gt;asb_page);</div><div class='del'>-	xmit_command = xsrb.command;</div><div class='del'>-</div><div class='del'>-	writeb(xmit_command, ti-&gt;asb + COMMAND_OFST);</div><div class='del'>-	writew(xsrb.station_id, ti-&gt;asb + STATION_ID_OFST);</div><div class='del'>-	writeb(llc_ssap, ti-&gt;asb + RSAP_VALUE_OFST);</div><div class='del'>-	writeb(xsrb.cmd_corr, ti-&gt;asb + CMD_CORRELATE_OFST);</div><div class='del'>-	writeb(0, ti-&gt;asb + RETCODE_OFST);</div><div class='del'>-	if ((xmit_command == XMIT_XID_CMD) || (xmit_command == XMIT_TEST_CMD)) {</div><div class='del'>-		writew(htons(0x11), ti-&gt;asb + FRAME_LENGTH_OFST);</div><div class='del'>-		writeb(0x0e, ti-&gt;asb + HEADER_LENGTH_OFST);</div><div class='del'>-		SET_PAGE(dhb_page);</div><div class='del'>-		writeb(AC, dhbuf);</div><div class='del'>-		writeb(LLC_FRAME, dhbuf + 1);</div><div class='del'>-		for (i = 0; i &lt; TR_ALEN; i++)</div><div class='del'>-			writeb((int) 0x0FF, dhbuf + i + 2);</div><div class='del'>-		for (i = 0; i &lt; TR_ALEN; i++)</div><div class='del'>-			writeb(0, dhbuf + i + TR_ALEN + 2);</div><div class='del'>-		writeb(RESP_IN_ASB, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 *    the token ring packet is copied from sk_buff to the adapter</div><div class='del'>-	 *    buffer identified in the command data received with the interrupt.</div><div class='del'>-	 */</div><div class='del'>-	writeb(hdr_len, ti-&gt;asb + HEADER_LENGTH_OFST);</div><div class='del'>-	writew(htons(ti-&gt;current_skb-&gt;len), ti-&gt;asb + FRAME_LENGTH_OFST);</div><div class='del'>-	src_len=ti-&gt;current_skb-&gt;len;</div><div class='del'>-	src_offset=0;</div><div class='del'>-	dhb=dhb_base;</div><div class='del'>-	while(1) {</div><div class='del'>-		if (ti-&gt;page_mask) {</div><div class='del'>-			dhb_page=(dhb &gt;&gt; 8) &amp; ti-&gt;page_mask;</div><div class='del'>-			dhb=dhb &amp; ~(ti-&gt;page_mask &lt;&lt; 8);</div><div class='del'>-			dhb_len=0x4000-dhb; /* remaining size of this page */</div><div class='del'>-		}</div><div class='del'>-		dhbuf = ti-&gt;sram_virt + dhb;</div><div class='del'>-		SET_PAGE(dhb_page);</div><div class='del'>-		if (src_len &gt; dhb_len) {</div><div class='del'>-			memcpy_toio(dhbuf,&amp;ti-&gt;current_skb-&gt;data[src_offset],</div><div class='del'>-					dhb_len);</div><div class='del'>-			src_len -= dhb_len;</div><div class='del'>-			src_offset += dhb_len;</div><div class='del'>-			dhb_base+=dhb_len;</div><div class='del'>-			dhb=dhb_base;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		memcpy_toio(dhbuf, &amp;ti-&gt;current_skb-&gt;data[src_offset], src_len);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	writeb(RESP_IN_ASB, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);</div><div class='del'>-	dev-&gt;stats.tx_bytes += ti-&gt;current_skb-&gt;len;</div><div class='del'>-	dev_kfree_skb_irq(ti-&gt;current_skb);</div><div class='del'>-	ti-&gt;current_skb = NULL;</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-	if (ti-&gt;readlog_pending)</div><div class='del'>-		ibmtr_readlog(dev);</div><div class='del'>-}				/*tr_tx */</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define RECEIVE_BUFFER_OFST     6</div><div class='del'>-#define LAN_HDR_LENGTH_OFST     8</div><div class='del'>-#define DLC_HDR_LENGTH_OFST     9</div><div class='del'>-</div><div class='del'>-#define DSAP_OFST               0</div><div class='del'>-#define SSAP_OFST               1</div><div class='del'>-#define LLC_OFST                2</div><div class='del'>-#define PROTID_OFST             3</div><div class='del'>-#define ETHERTYPE_OFST          6</div><div class='del'>-</div><div class='del'>-static void tr_rx(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-	__u32 rbuffer;</div><div class='del'>-	void __iomem *rbuf, *rbufdata, *llc;</div><div class='del'>-	__u8 rbuffer_page = 0;</div><div class='del'>-	unsigned char *data;</div><div class='del'>-	unsigned int rbuffer_len, lan_hdr_len, hdr_len, ip_len, length;</div><div class='del'>-	unsigned char dlc_hdr_len;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	unsigned int skb_size = 0;</div><div class='del'>-	int IPv4_p = 0;</div><div class='del'>-	unsigned int chksum = 0;</div><div class='del'>-	struct iphdr *iph;</div><div class='del'>-	struct arb_rec_req rarb;</div><div class='del'>-</div><div class='del'>-	SET_PAGE(ti-&gt;arb_page);</div><div class='del'>-	memcpy_fromio(&amp;rarb, ti-&gt;arb, sizeof(rarb));</div><div class='del'>-	rbuffer = ntohs(rarb.rec_buf_addr) ;</div><div class='del'>-	rbuf = map_address(ti, rbuffer, &amp;rbuffer_page);</div><div class='del'>-</div><div class='del'>-	SET_PAGE(ti-&gt;asb_page);</div><div class='del'>-</div><div class='del'>-	if (readb(ti-&gt;asb + RETCODE_OFST) !=0xFF) DPRINTK("ASB not free !!!\n");</div><div class='del'>-</div><div class='del'>-	writeb(REC_DATA, ti-&gt;asb + COMMAND_OFST);</div><div class='del'>-	writew(rarb.station_id, ti-&gt;asb + STATION_ID_OFST);</div><div class='del'>-	writew(rarb.rec_buf_addr, ti-&gt;asb + RECEIVE_BUFFER_OFST);</div><div class='del'>-</div><div class='del'>-	lan_hdr_len = rarb.lan_hdr_len;</div><div class='del'>-	if (lan_hdr_len &gt; sizeof(struct trh_hdr)) {</div><div class='del'>-		DPRINTK("Linux cannot handle greater than 18 bytes RIF\n");</div><div class='del'>-		return;</div><div class='del'>-	}			/*BMS I added this above just to be very safe */</div><div class='del'>-	dlc_hdr_len = readb(ti-&gt;arb + DLC_HDR_LENGTH_OFST);</div><div class='del'>-	hdr_len = lan_hdr_len + sizeof(struct trllc) + sizeof(struct iphdr);</div><div class='del'>-</div><div class='del'>-	SET_PAGE(rbuffer_page);</div><div class='del'>-	llc = rbuf + offsetof(struct rec_buf, data) + lan_hdr_len;</div><div class='del'>-</div><div class='del'>-#if TR_VERBOSE</div><div class='del'>-	DPRINTK("offsetof data: %02X lan_hdr_len: %02X\n",</div><div class='del'>-	(__u32) offsetof(struct rec_buf, data), (unsigned int) lan_hdr_len);</div><div class='del'>-	DPRINTK("llc: %08X rec_buf_addr: %04X dev-&gt;mem_start: %lX\n",</div><div class='del'>-		llc, ntohs(rarb.rec_buf_addr), dev-&gt;mem_start);</div><div class='del'>-	DPRINTK("dsap: %02X, ssap: %02X, llc: %02X, protid: %02X%02X%02X, "</div><div class='del'>-		"ethertype: %04X\n",</div><div class='del'>-		(int) readb(llc + DSAP_OFST), (int) readb(llc + SSAP_OFST),</div><div class='del'>-		(int) readb(llc + LLC_OFST), (int) readb(llc + PROTID_OFST),</div><div class='del'>-		(int) readb(llc+PROTID_OFST+1),(int)readb(llc+PROTID_OFST + 2),</div><div class='del'>-		(int) ntohs(readw(llc + ETHERTYPE_OFST)));</div><div class='del'>-#endif</div><div class='del'>-	if (readb(llc + offsetof(struct trllc, llc)) != UI_CMD) {</div><div class='del'>-		SET_PAGE(ti-&gt;asb_page);</div><div class='del'>-		writeb(DATA_LOST, ti-&gt;asb + RETCODE_OFST);</div><div class='del'>-		dev-&gt;stats.rx_dropped++;</div><div class='del'>-		writeb(RESP_IN_ASB, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	length = ntohs(rarb.frame_len);</div><div class='del'>-	if (readb(llc + DSAP_OFST) == EXTENDED_SAP &amp;&amp;</div><div class='del'>-	   readb(llc + SSAP_OFST) == EXTENDED_SAP &amp;&amp;</div><div class='del'>-		length &gt;= hdr_len)	IPv4_p = 1;</div><div class='del'>-#if TR_VERBOSE</div><div class='del'>-#define SADDR_OFST	8</div><div class='del'>-#define DADDR_OFST	2</div><div class='del'>-</div><div class='del'>-	if (!IPv4_p) {</div><div class='del'>-</div><div class='del'>-		void __iomem *trhhdr = rbuf + offsetof(struct rec_buf, data);</div><div class='del'>-		u8 saddr[6];</div><div class='del'>-		u8 daddr[6];</div><div class='del'>-		int i;</div><div class='del'>-		for (i = 0 ; i &lt; 6 ; i++)</div><div class='del'>-			saddr[i] = readb(trhhdr + SADDR_OFST + i);</div><div class='del'>-		for (i = 0 ; i &lt; 6 ; i++)</div><div class='del'>-			daddr[i] = readb(trhhdr + DADDR_OFST + i);</div><div class='del'>-		DPRINTK("Probably non-IP frame received.\n");</div><div class='del'>-		DPRINTK("ssap: %02X dsap: %02X "</div><div class='del'>-			"saddr: %pM daddr: %pM\n",</div><div class='del'>-			readb(llc + SSAP_OFST), readb(llc + DSAP_OFST),</div><div class='del'>-			saddr, daddr);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/*BMS handle the case she comes in with few hops but leaves with many */</div><div class='del'>-        skb_size=length-lan_hdr_len+sizeof(struct trh_hdr)+sizeof(struct trllc);</div><div class='del'>-</div><div class='del'>-	if (!(skb = dev_alloc_skb(skb_size))) {</div><div class='del'>-		DPRINTK("out of memory. frame dropped.\n");</div><div class='del'>-		dev-&gt;stats.rx_dropped++;</div><div class='del'>-		SET_PAGE(ti-&gt;asb_page);</div><div class='del'>-		writeb(DATA_LOST, ti-&gt;asb + offsetof(struct asb_rec, ret_code));</div><div class='del'>-		writeb(RESP_IN_ASB, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	/*BMS again, if she comes in with few but leaves with many */</div><div class='del'>-	skb_reserve(skb, sizeof(struct trh_hdr) - lan_hdr_len);</div><div class='del'>-	skb_put(skb, length);</div><div class='del'>-	data = skb-&gt;data;</div><div class='del'>-	rbuffer_len = ntohs(readw(rbuf + offsetof(struct rec_buf, buf_len)));</div><div class='del'>-	rbufdata = rbuf + offsetof(struct rec_buf, data);</div><div class='del'>-</div><div class='del'>-	if (IPv4_p) {</div><div class='del'>-		/* Copy the headers without checksumming */</div><div class='del'>-		memcpy_fromio(data, rbufdata, hdr_len);</div><div class='del'>-</div><div class='del'>-		/* Watch for padded packets and bogons */</div><div class='del'>-		iph= (struct iphdr *)(data+ lan_hdr_len + sizeof(struct trllc));</div><div class='del'>-		ip_len = ntohs(iph-&gt;tot_len) - sizeof(struct iphdr);</div><div class='del'>-		length -= hdr_len;</div><div class='del'>-		if ((ip_len &lt;= length) &amp;&amp; (ip_len &gt; 7))</div><div class='del'>-			length = ip_len;</div><div class='del'>-		data += hdr_len;</div><div class='del'>-		rbuffer_len -= hdr_len;</div><div class='del'>-		rbufdata += hdr_len;</div><div class='del'>-	}</div><div class='del'>-	/* Copy the payload... */</div><div class='del'>-#define BUFFER_POINTER_OFST	2</div><div class='del'>-#define BUFFER_LENGTH_OFST      6</div><div class='del'>-	for (;;) {</div><div class='del'>-		if (ibmtr_debug_trace&amp;TRC_INITV &amp;&amp; length &lt; rbuffer_len)</div><div class='del'>-			DPRINTK("CURIOUS, length=%d &lt; rbuffer_len=%d\n",</div><div class='del'>-						length,rbuffer_len);</div><div class='del'>-		if (IPv4_p)</div><div class='del'>-			chksum=csum_partial_copy_nocheck((void*)rbufdata,</div><div class='del'>-			    data,length&lt;rbuffer_len?length:rbuffer_len,chksum);</div><div class='del'>-		else</div><div class='del'>-			memcpy_fromio(data, rbufdata, rbuffer_len);</div><div class='del'>-		rbuffer = ntohs(readw(rbuf+BUFFER_POINTER_OFST)) ;</div><div class='del'>-		if (!rbuffer)</div><div class='del'>-			break;</div><div class='del'>-		rbuffer -= 2;</div><div class='del'>-		length -= rbuffer_len;</div><div class='del'>-		data += rbuffer_len;</div><div class='del'>-		rbuf = map_address(ti, rbuffer, &amp;rbuffer_page);</div><div class='del'>-		SET_PAGE(rbuffer_page);</div><div class='del'>-		rbuffer_len = ntohs(readw(rbuf + BUFFER_LENGTH_OFST));</div><div class='del'>-		rbufdata = rbuf + offsetof(struct rec_buf, data);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	SET_PAGE(ti-&gt;asb_page);</div><div class='del'>-	writeb(0, ti-&gt;asb + offsetof(struct asb_rec, ret_code));</div><div class='del'>-</div><div class='del'>-	writeb(RESP_IN_ASB, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.rx_bytes += skb-&gt;len;</div><div class='del'>-	dev-&gt;stats.rx_packets++;</div><div class='del'>-</div><div class='del'>-	skb-&gt;protocol = tr_type_trans(skb, dev);</div><div class='del'>-	if (IPv4_p) {</div><div class='del'>-		skb-&gt;csum = chksum;</div><div class='del'>-		skb-&gt;ip_summed = CHECKSUM_COMPLETE;</div><div class='del'>-	}</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-}				/*tr_rx */</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static void ibmtr_reset_timer(struct timer_list *tmr, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	tmr-&gt;expires = jiffies + TR_RETRY_INTERVAL;</div><div class='del'>-	tmr-&gt;data = (unsigned long) dev;</div><div class='del'>-	tmr-&gt;function = tok_rerun;</div><div class='del'>-	init_timer(tmr);</div><div class='del'>-	add_timer(tmr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static void tok_rerun(unsigned long dev_addr)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *)dev_addr;</div><div class='del'>-	struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if ( ti-&gt;open_action == RESTART){</div><div class='del'>-		ti-&gt;do_tok_int = FIRST_INT;</div><div class='del'>-		outb(0, dev-&gt;base_addr + ADAPTRESETREL);</div><div class='del'>-#ifdef ENABLE_PAGING</div><div class='del'>-		if (ti-&gt;page_mask)</div><div class='del'>-			writeb(SRPR_ENABLE_PAGING,</div><div class='del'>-				ti-&gt;mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		writeb(INT_ENABLE, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);</div><div class='del'>-	} else</div><div class='del'>-		tok_open_adapter(dev_addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static void ibmtr_readlog(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct tok_info *ti;</div><div class='del'>-</div><div class='del'>-	ti = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	ti-&gt;readlog_pending = 0;</div><div class='del'>-	SET_PAGE(ti-&gt;srb_page);</div><div class='del'>-	writeb(DIR_READ_LOG, ti-&gt;srb);</div><div class='del'>-	writeb(INT_ENABLE, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);</div><div class='del'>-	writeb(CMD_IN_SRB, ti-&gt;mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-</div><div class='del'>-static int ibmtr_change_mtu(struct net_device *dev, int mtu)</div><div class='del'>-{</div><div class='del'>-	struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (ti-&gt;ring_speed == 16 &amp;&amp; mtu &gt; ti-&gt;maxmtu16)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (ti-&gt;ring_speed == 4 &amp;&amp; mtu &gt; ti-&gt;maxmtu4)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	dev-&gt;mtu = mtu;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*****************************************************************************/</div><div class='del'>-#ifdef MODULE</div><div class='del'>-</div><div class='del'>-/* 3COM 3C619C supports 8 interrupts, 32 I/O ports */</div><div class='del'>-static struct net_device *dev_ibmtr[IBMTR_MAX_ADAPTERS];</div><div class='del'>-static int io[IBMTR_MAX_ADAPTERS] = { 0xa20, 0xa24 };</div><div class='del'>-static int irq[IBMTR_MAX_ADAPTERS];</div><div class='del'>-static int mem[IBMTR_MAX_ADAPTERS];</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-module_param_array(io, int, NULL, 0);</div><div class='del'>-module_param_array(irq, int, NULL, 0);</div><div class='del'>-module_param_array(mem, int, NULL, 0);</div><div class='del'>-</div><div class='del'>-static int __init ibmtr_init(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int count=0;</div><div class='del'>-</div><div class='del'>-	find_turbo_adapters(io);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; IBMTR_MAX_ADAPTERS &amp;&amp; io[i]; i++) {</div><div class='del'>-		struct net_device *dev;</div><div class='del'>-		irq[i] = 0;</div><div class='del'>-		mem[i] = 0;</div><div class='del'>-		dev = alloc_trdev(sizeof(struct tok_info));</div><div class='del'>-		if (dev == NULL) { </div><div class='del'>-			if (i == 0)</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		dev-&gt;base_addr = io[i];</div><div class='del'>-		dev-&gt;irq = irq[i];</div><div class='del'>-		dev-&gt;mem_start = mem[i];</div><div class='del'>-</div><div class='del'>-		if (ibmtr_probe_card(dev)) {</div><div class='del'>-			free_netdev(dev);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		dev_ibmtr[i] = dev;</div><div class='del'>-		count++;</div><div class='del'>-	}</div><div class='del'>-	if (count) return 0;</div><div class='del'>-	printk("ibmtr: register_netdev() returned non-zero.\n");</div><div class='del'>-	return -EIO;</div><div class='del'>-}</div><div class='del'>-module_init(ibmtr_init);</div><div class='del'>-</div><div class='del'>-static void __exit ibmtr_cleanup(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; IBMTR_MAX_ADAPTERS; i++){</div><div class='del'>-		if (!dev_ibmtr[i])</div><div class='del'>-			continue;</div><div class='del'>-		unregister_netdev(dev_ibmtr[i]);</div><div class='del'>-		ibmtr_cleanup_card(dev_ibmtr[i]);</div><div class='del'>-		free_netdev(dev_ibmtr[i]);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-module_exit(ibmtr_cleanup);</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/tokenring/ibmtr_cs.c b/drivers/net/tokenring/ibmtr_cs.c<br/>deleted file mode 100644<br/>index 356e28e4881b..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/ibmtr_cs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/ibmtr_cs.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,370 +0,0 @@</div><div class='del'>-/*======================================================================</div><div class='del'>-</div><div class='del'>-    A PCMCIA token-ring driver for IBM-based cards</div><div class='del'>-</div><div class='del'>-    This driver supports the IBM PCMCIA Token-Ring Card.</div><div class='del'>-    Written by Steve Kipisz, kipisz@vnet.ibm.com or</div><div class='del'>-                             bungy@ibm.net</div><div class='del'>-</div><div class='del'>-    Written 1995,1996.</div><div class='del'>-</div><div class='del'>-    This code is based on pcnet_cs.c from David Hinds.</div><div class='del'>-    </div><div class='del'>-    V2.2.0 February 1999 - Mike Phillips phillim@amtrak.com</div><div class='del'>-</div><div class='del'>-    Linux V2.2.x presented significant changes to the underlying</div><div class='del'>-    ibmtr.c code.  Mainly the code became a lot more organized and</div><div class='del'>-    modular.</div><div class='del'>-</div><div class='del'>-    This caused the old PCMCIA Token Ring driver to give up and go </div><div class='del'>-    home early. Instead of just patching the old code to make it </div><div class='del'>-    work, the PCMCIA code has been streamlined, updated and possibly</div><div class='del'>-    improved.</div><div class='del'>-</div><div class='del'>-    This code now only contains code required for the Card Services.</div><div class='del'>-    All we do here is set the card up enough so that the real ibmtr.c</div><div class='del'>-    driver can find it and work with it properly.</div><div class='del'>-</div><div class='del'>-    i.e. We set up the io port, irq, mmio memory and shared ram</div><div class='del'>-    memory.  This enables ibmtr_probe in ibmtr.c to find the card and</div><div class='del'>-    configure it as though it was a normal ISA and/or PnP card.</div><div class='del'>-</div><div class='del'>-    CHANGES</div><div class='del'>-</div><div class='del'>-    v2.2.5 April 1999 Mike Phillips (phillim@amtrak.com)</div><div class='del'>-    Obscure bug fix, required changed to ibmtr.c not ibmtr_cs.c</div><div class='del'>-    </div><div class='del'>-    v2.2.7 May 1999 Mike Phillips (phillim@amtrak.com)</div><div class='del'>-    Updated to version 2.2.7 to match the first version of the kernel</div><div class='del'>-    that the modification to ibmtr.c were incorporated into.</div><div class='del'>-    </div><div class='del'>-    v2.2.17 July 2000 Burt Silverman (burts@us.ibm.com)</div><div class='del'>-    Address translation feature of PCMCIA controller is usable so</div><div class='del'>-    memory windows can be placed in High memory (meaning above</div><div class='del'>-    0xFFFFF.)</div><div class='del'>-</div><div class='del'>-======================================================================*/</div><div class='del'>-</div><div class='del'>-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/timer.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='del'>-#include &lt;linux/ibmtr.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;pcmcia/cistpl.h&gt;</div><div class='del'>-#include &lt;pcmcia/ds.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-#define PCMCIA</div><div class='del'>-#include "ibmtr.c"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*====================================================================*/</div><div class='del'>-</div><div class='del'>-/* Parameters that can be set with 'insmod' */</div><div class='del'>-</div><div class='del'>-/* MMIO base address */</div><div class='del'>-static u_long mmiobase = 0xce000;</div><div class='del'>-</div><div class='del'>-/* SRAM base address */</div><div class='del'>-static u_long srambase = 0xd0000;</div><div class='del'>-</div><div class='del'>-/* SRAM size 8,16,32,64 */</div><div class='del'>-static u_long sramsize = 64;</div><div class='del'>-</div><div class='del'>-/* Ringspeed 4,16 */</div><div class='del'>-static int ringspeed = 16;</div><div class='del'>-</div><div class='del'>-module_param(mmiobase, ulong, 0);</div><div class='del'>-module_param(srambase, ulong, 0);</div><div class='del'>-module_param(sramsize, ulong, 0);</div><div class='del'>-module_param(ringspeed, int, 0);</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-/*====================================================================*/</div><div class='del'>-</div><div class='del'>-static int ibmtr_config(struct pcmcia_device *link);</div><div class='del'>-static void ibmtr_hw_setup(struct net_device *dev, u_int mmiobase);</div><div class='del'>-static void ibmtr_release(struct pcmcia_device *link);</div><div class='del'>-static void ibmtr_detach(struct pcmcia_device *p_dev);</div><div class='del'>-</div><div class='del'>-/*====================================================================*/</div><div class='del'>-</div><div class='del'>-typedef struct ibmtr_dev_t {</div><div class='del'>-	struct pcmcia_device	*p_dev;</div><div class='del'>-	struct net_device	*dev;</div><div class='del'>-	struct tok_info		*ti;</div><div class='del'>-} ibmtr_dev_t;</div><div class='del'>-</div><div class='del'>-static irqreturn_t ibmtr_interrupt(int irq, void *dev_id) {</div><div class='del'>-	ibmtr_dev_t *info = dev_id;</div><div class='del'>-	struct net_device *dev = info-&gt;dev;</div><div class='del'>-	return tok_interrupt(irq, dev);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __devinit ibmtr_attach(struct pcmcia_device *link)</div><div class='del'>-{</div><div class='del'>-    ibmtr_dev_t *info;</div><div class='del'>-    struct net_device *dev;</div><div class='del'>-</div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "ibmtr_attach()\n");</div><div class='del'>-</div><div class='del'>-    /* Create new token-ring device */</div><div class='del'>-    info = kzalloc(sizeof(*info), GFP_KERNEL);</div><div class='del'>-    if (!info) return -ENOMEM;</div><div class='del'>-    dev = alloc_trdev(sizeof(struct tok_info));</div><div class='del'>-    if (!dev) {</div><div class='del'>-	kfree(info);</div><div class='del'>-	return -ENOMEM;</div><div class='del'>-    }</div><div class='del'>-</div><div class='del'>-    info-&gt;p_dev = link;</div><div class='del'>-    link-&gt;priv = info;</div><div class='del'>-    info-&gt;ti = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-    link-&gt;resource[0]-&gt;flags |= IO_DATA_PATH_WIDTH_8;</div><div class='del'>-    link-&gt;resource[0]-&gt;end = 4;</div><div class='del'>-    link-&gt;config_flags |= CONF_ENABLE_IRQ;</div><div class='del'>-    link-&gt;config_regs = PRESENT_OPTION;</div><div class='del'>-</div><div class='del'>-    info-&gt;dev = dev;</div><div class='del'>-</div><div class='del'>-    return ibmtr_config(link);</div><div class='del'>-} /* ibmtr_attach */</div><div class='del'>-</div><div class='del'>-static void ibmtr_detach(struct pcmcia_device *link)</div><div class='del'>-{</div><div class='del'>-    struct ibmtr_dev_t *info = link-&gt;priv;</div><div class='del'>-    struct net_device *dev = info-&gt;dev;</div><div class='del'>-     struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "ibmtr_detach\n");</div><div class='del'>-    </div><div class='del'>-    /* </div><div class='del'>-     * When the card removal interrupt hits tok_interrupt(), </div><div class='del'>-     * bail out early, so we don't crash the machine </div><div class='del'>-     */</div><div class='del'>-    ti-&gt;sram_phys |= 1;</div><div class='del'>-</div><div class='del'>-    unregister_netdev(dev);</div><div class='del'>-    </div><div class='del'>-    del_timer_sync(&amp;(ti-&gt;tr_timer));</div><div class='del'>-</div><div class='del'>-    ibmtr_release(link);</div><div class='del'>-</div><div class='del'>-    free_netdev(dev);</div><div class='del'>-    kfree(info);</div><div class='del'>-} /* ibmtr_detach */</div><div class='del'>-</div><div class='del'>-static int __devinit ibmtr_config(struct pcmcia_device *link)</div><div class='del'>-{</div><div class='del'>-    ibmtr_dev_t *info = link-&gt;priv;</div><div class='del'>-    struct net_device *dev = info-&gt;dev;</div><div class='del'>-    struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-    int i, ret;</div><div class='del'>-</div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "ibmtr_config\n");</div><div class='del'>-</div><div class='del'>-    link-&gt;io_lines = 16;</div><div class='del'>-    link-&gt;config_index = 0x61;</div><div class='del'>-</div><div class='del'>-    /* Determine if this is PRIMARY or ALTERNATE. */</div><div class='del'>-</div><div class='del'>-    /* Try PRIMARY card at 0xA20-0xA23 */</div><div class='del'>-    link-&gt;resource[0]-&gt;start = 0xA20;</div><div class='del'>-    i = pcmcia_request_io(link);</div><div class='del'>-    if (i != 0) {</div><div class='del'>-	/* Couldn't get 0xA20-0xA23.  Try ALTERNATE at 0xA24-0xA27. */</div><div class='del'>-	link-&gt;resource[0]-&gt;start = 0xA24;</div><div class='del'>-	ret = pcmcia_request_io(link);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto failed;</div><div class='del'>-    }</div><div class='del'>-    dev-&gt;base_addr = link-&gt;resource[0]-&gt;start;</div><div class='del'>-</div><div class='del'>-    ret = pcmcia_request_exclusive_irq(link, ibmtr_interrupt);</div><div class='del'>-    if (ret)</div><div class='del'>-	    goto failed;</div><div class='del'>-    dev-&gt;irq = link-&gt;irq;</div><div class='del'>-    ti-&gt;irq = link-&gt;irq;</div><div class='del'>-    ti-&gt;global_int_enable=GLOBAL_INT_ENABLE+((dev-&gt;irq==9) ? 2 : dev-&gt;irq);</div><div class='del'>-</div><div class='del'>-    /* Allocate the MMIO memory window */</div><div class='del'>-    link-&gt;resource[2]-&gt;flags |= WIN_DATA_WIDTH_16|WIN_MEMORY_TYPE_CM|WIN_ENABLE;</div><div class='del'>-    link-&gt;resource[2]-&gt;flags |= WIN_USE_WAIT;</div><div class='del'>-    link-&gt;resource[2]-&gt;start = 0;</div><div class='del'>-    link-&gt;resource[2]-&gt;end = 0x2000;</div><div class='del'>-    ret = pcmcia_request_window(link, link-&gt;resource[2], 250);</div><div class='del'>-    if (ret)</div><div class='del'>-	    goto failed;</div><div class='del'>-</div><div class='del'>-    ret = pcmcia_map_mem_page(link, link-&gt;resource[2], mmiobase);</div><div class='del'>-    if (ret)</div><div class='del'>-	    goto failed;</div><div class='del'>-    ti-&gt;mmio = ioremap(link-&gt;resource[2]-&gt;start,</div><div class='del'>-		    resource_size(link-&gt;resource[2]));</div><div class='del'>-</div><div class='del'>-    /* Allocate the SRAM memory window */</div><div class='del'>-    link-&gt;resource[3]-&gt;flags = WIN_DATA_WIDTH_16|WIN_MEMORY_TYPE_CM|WIN_ENABLE;</div><div class='del'>-    link-&gt;resource[3]-&gt;flags |= WIN_USE_WAIT;</div><div class='del'>-    link-&gt;resource[3]-&gt;start = 0;</div><div class='del'>-    link-&gt;resource[3]-&gt;end = sramsize * 1024;</div><div class='del'>-    ret = pcmcia_request_window(link, link-&gt;resource[3], 250);</div><div class='del'>-    if (ret)</div><div class='del'>-	    goto failed;</div><div class='del'>-</div><div class='del'>-    ret = pcmcia_map_mem_page(link, link-&gt;resource[3], srambase);</div><div class='del'>-    if (ret)</div><div class='del'>-	    goto failed;</div><div class='del'>-</div><div class='del'>-    ti-&gt;sram_base = srambase &gt;&gt; 12;</div><div class='del'>-    ti-&gt;sram_virt = ioremap(link-&gt;resource[3]-&gt;start,</div><div class='del'>-		    resource_size(link-&gt;resource[3]));</div><div class='del'>-    ti-&gt;sram_phys = link-&gt;resource[3]-&gt;start;</div><div class='del'>-</div><div class='del'>-    ret = pcmcia_enable_device(link);</div><div class='del'>-    if (ret)</div><div class='del'>-	    goto failed;</div><div class='del'>-</div><div class='del'>-    /*  Set up the Token-Ring Controller Configuration Register and</div><div class='del'>-        turn on the card.  Check the "Local Area Network Credit Card</div><div class='del'>-        Adapters Technical Reference"  SC30-3585 for this info.  */</div><div class='del'>-    ibmtr_hw_setup(dev, mmiobase);</div><div class='del'>-</div><div class='del'>-    SET_NETDEV_DEV(dev, &amp;link-&gt;dev);</div><div class='del'>-</div><div class='del'>-    i = ibmtr_probe_card(dev);</div><div class='del'>-    if (i != 0) {</div><div class='del'>-	pr_notice("register_netdev() failed\n");</div><div class='del'>-	goto failed;</div><div class='del'>-    }</div><div class='del'>-</div><div class='del'>-    netdev_info(dev, "port %#3lx, irq %d, mmio %#5lx, sram %#5lx, hwaddr=%pM\n",</div><div class='del'>-		dev-&gt;base_addr, dev-&gt;irq,</div><div class='del'>-		(u_long)ti-&gt;mmio, (u_long)(ti-&gt;sram_base &lt;&lt; 12),</div><div class='del'>-		dev-&gt;dev_addr);</div><div class='del'>-    return 0;</div><div class='del'>-</div><div class='del'>-failed:</div><div class='del'>-    ibmtr_release(link);</div><div class='del'>-    return -ENODEV;</div><div class='del'>-} /* ibmtr_config */</div><div class='del'>-</div><div class='del'>-static void ibmtr_release(struct pcmcia_device *link)</div><div class='del'>-{</div><div class='del'>-	ibmtr_dev_t *info = link-&gt;priv;</div><div class='del'>-	struct net_device *dev = info-&gt;dev;</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;link-&gt;dev, "ibmtr_release\n");</div><div class='del'>-</div><div class='del'>-	if (link-&gt;resource[2]-&gt;end) {</div><div class='del'>-		struct tok_info *ti = netdev_priv(dev);</div><div class='del'>-		iounmap(ti-&gt;mmio);</div><div class='del'>-	}</div><div class='del'>-	pcmcia_disable_device(link);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ibmtr_suspend(struct pcmcia_device *link)</div><div class='del'>-{</div><div class='del'>-	ibmtr_dev_t *info = link-&gt;priv;</div><div class='del'>-	struct net_device *dev = info-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (link-&gt;open)</div><div class='del'>-		netif_device_detach(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __devinit ibmtr_resume(struct pcmcia_device *link)</div><div class='del'>-{</div><div class='del'>-	ibmtr_dev_t *info = link-&gt;priv;</div><div class='del'>-	struct net_device *dev = info-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (link-&gt;open) {</div><div class='del'>-		ibmtr_probe(dev);	/* really? */</div><div class='del'>-		netif_device_attach(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*====================================================================*/</div><div class='del'>-</div><div class='del'>-static void ibmtr_hw_setup(struct net_device *dev, u_int mmiobase)</div><div class='del'>-{</div><div class='del'>-    int i;</div><div class='del'>-</div><div class='del'>-    /* Bizarre IBM behavior, there are 16 bits of information we</div><div class='del'>-       need to set, but the card only allows us to send 4 bits at a </div><div class='del'>-       time.  For each byte sent to base_addr, bits 7-4 tell the</div><div class='del'>-       card which part of the 16 bits we are setting, bits 3-0 contain </div><div class='del'>-       the actual information */</div><div class='del'>-</div><div class='del'>-    /* First nibble provides 4 bits of mmio */</div><div class='del'>-    i = (mmiobase &gt;&gt; 16) &amp; 0x0F;</div><div class='del'>-    outb(i, dev-&gt;base_addr);</div><div class='del'>-</div><div class='del'>-    /* Second nibble provides 3 bits of mmio */</div><div class='del'>-    i = 0x10 | ((mmiobase &gt;&gt; 12) &amp; 0x0E);</div><div class='del'>-    outb(i, dev-&gt;base_addr);</div><div class='del'>-</div><div class='del'>-    /* Third nibble, hard-coded values */</div><div class='del'>-    i = 0x26;</div><div class='del'>-    outb(i, dev-&gt;base_addr);</div><div class='del'>-</div><div class='del'>-    /* Fourth nibble sets shared ram page size */</div><div class='del'>-</div><div class='del'>-    /* 8 = 00, 16 = 01, 32 = 10, 64 = 11 */          </div><div class='del'>-    i = (sramsize &gt;&gt; 4) &amp; 0x07;</div><div class='del'>-    i = ((i == 4) ? 3 : i) &lt;&lt; 2;</div><div class='del'>-    i |= 0x30;</div><div class='del'>-</div><div class='del'>-    if (ringspeed == 16)</div><div class='del'>-	i |= 2;</div><div class='del'>-    if (dev-&gt;base_addr == 0xA24)</div><div class='del'>-	i |= 1;</div><div class='del'>-    outb(i, dev-&gt;base_addr);</div><div class='del'>-</div><div class='del'>-    /* 0x40 will release the card for use */</div><div class='del'>-    outb(0x40, dev-&gt;base_addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct pcmcia_device_id ibmtr_ids[] = {</div><div class='del'>-	PCMCIA_DEVICE_PROD_ID12("3Com", "TokenLink Velocity PC Card", 0x41240e5b, 0x82c3734e),</div><div class='del'>-	PCMCIA_DEVICE_PROD_ID12("IBM", "TOKEN RING", 0xb569a6e5, 0xbf8eed47),</div><div class='del'>-	PCMCIA_DEVICE_NULL,</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(pcmcia, ibmtr_ids);</div><div class='del'>-</div><div class='del'>-static struct pcmcia_driver ibmtr_cs_driver = {</div><div class='del'>-	.owner		= THIS_MODULE,</div><div class='del'>-	.name		= "ibmtr_cs",</div><div class='del'>-	.probe		= ibmtr_attach,</div><div class='del'>-	.remove		= ibmtr_detach,</div><div class='del'>-	.id_table       = ibmtr_ids,</div><div class='del'>-	.suspend	= ibmtr_suspend,</div><div class='del'>-	.resume		= ibmtr_resume,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init init_ibmtr_cs(void)</div><div class='del'>-{</div><div class='del'>-	return pcmcia_register_driver(&amp;ibmtr_cs_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit exit_ibmtr_cs(void)</div><div class='del'>-{</div><div class='del'>-	pcmcia_unregister_driver(&amp;ibmtr_cs_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(init_ibmtr_cs);</div><div class='del'>-module_exit(exit_ibmtr_cs);</div><div class='head'>diff --git a/drivers/net/tokenring/lanstreamer.c b/drivers/net/tokenring/lanstreamer.c<br/>deleted file mode 100644<br/>index 3e4b4f091113..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/lanstreamer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/lanstreamer.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1917 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *   lanstreamer.c -- driver for the IBM Auto LANStreamer PCI Adapter</div><div class='del'>- *</div><div class='del'>- *  Written By: Mike Sullivan, IBM Corporation</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1999 IBM Corporation</div><div class='del'>- *</div><div class='del'>- *  Linux driver for IBM PCI tokenring cards based on the LanStreamer MPC</div><div class='del'>- *  chipset. </div><div class='del'>- *</div><div class='del'>- *  This driver is based on the olympic driver for IBM PCI TokenRing cards (Pit/Pit-Phy/Olympic</div><div class='del'>- *  chipsets) written  by:</div><div class='del'>- *      1999 Peter De Schrijver All Rights Reserved</div><div class='del'>- *	1999 Mike Phillips (phillim@amtrak.com)</div><div class='del'>- *</div><div class='del'>- *  Base Driver Skeleton:</div><div class='del'>- *      Written 1993-94 by Donald Becker.</div><div class='del'>- *</div><div class='del'>- *      Copyright 1993 United States Government as represented by the</div><div class='del'>- *      Director, National Security Agency.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify      </div><div class='del'>- * it under the terms of the GNU General Public License as published by      </div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or         </div><div class='del'>- * (at your option) any later version.                                       </div><div class='del'>- *                                                                           </div><div class='del'>- * This program is distributed in the hope that it will be useful,           </div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of            </div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the             </div><div class='del'>- * GNU General Public License for more details.                              </div><div class='del'>- *                                                                           </div><div class='del'>- * NO WARRANTY                                                               </div><div class='del'>- * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR        </div><div class='del'>- * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT      </div><div class='del'>- * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,      </div><div class='del'>- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is    </div><div class='del'>- * solely responsible for determining the appropriateness of using and       </div><div class='del'>- * distributing the Program and assumes all risks associated with its        </div><div class='del'>- * exercise of rights under this Agreement, including but not limited to     </div><div class='del'>- * the risks and costs of program errors, damage to or loss of data,         </div><div class='del'>- * programs or equipment, and unavailability or interruption of operations.  </div><div class='del'>- *                                                                           </div><div class='del'>- * DISCLAIMER OF LIABILITY                                                   </div><div class='del'>- * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY   </div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL        </div><div class='del'>- * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND   </div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR     </div><div class='del'>- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE    </div><div class='del'>- * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED  </div><div class='del'>- * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES             </div><div class='del'>- *                                                                           </div><div class='del'>- * You should have received a copy of the GNU General Public License         </div><div class='del'>- * along with this program; if not, write to the Free Software               </div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA </div><div class='del'>- *                                                                           </div><div class='del'>- * </div><div class='del'>- *  12/10/99 - Alpha Release 0.1.0</div><div class='del'>- *            First release to the public</div><div class='del'>- *  03/03/00 - Merged to kernel, indented -kr -i8 -bri0, fixed some missing</div><div class='del'>- *		malloc free checks, reviewed code. &lt;alan@redhat.com&gt;</div><div class='del'>- *  03/13/00 - Added spinlocks for smp</div><div class='del'>- *  03/08/01 - Added support for module_init() and module_exit()</div><div class='del'>- *  08/15/01 - Added ioctl() functionality for debugging, changed netif_*_queue</div><div class='del'>- *             calls and other incorrectness - Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='del'>- *  11/05/01 - Restructured the interrupt function, added delays, reduced the </div><div class='del'>- *             the number of TX descriptors to 1, which together can prevent </div><div class='del'>- *             the card from locking up the box - &lt;yoder1@us.ibm.com&gt;</div><div class='del'>- *  09/27/02 - New PCI interface + bug fix. - &lt;yoder1@us.ibm.com&gt;</div><div class='del'>- *  11/13/02 - Removed free_irq calls which could cause a hang, added</div><div class='del'>- *	       netif_carrier_{on|off} - &lt;yoder1@us.ibm.com&gt;</div><div class='del'>- *  </div><div class='del'>- *  To Do:</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- *  If Problems do Occur</div><div class='del'>- *  Most problems can be rectified by either closing and opening the interface</div><div class='del'>- *  (ifconfig down and up) or rmmod and insmod'ing the driver (a bit difficult</div><div class='del'>- *  if compiled into the kernel).</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* Change STREAMER_DEBUG to 1 to get verbose, and I mean really verbose, messages */</div><div class='del'>-</div><div class='del'>-#define STREAMER_DEBUG 0</div><div class='del'>-#define STREAMER_DEBUG_PACKETS 0</div><div class='del'>-</div><div class='del'>-/* Change STREAMER_NETWORK_MONITOR to receive mac frames through the arb channel.</div><div class='del'>- * Will also create a /proc/net/streamer_tr entry if proc_fs is compiled into the</div><div class='del'>- * kernel.</div><div class='del'>- * Intended to be used to create a ring-error reporting network module </div><div class='del'>- * i.e. it will give you the source address of beaconers on the ring </div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define STREAMER_NETWORK_MONITOR 0</div><div class='del'>-</div><div class='del'>-/* #define CONFIG_PROC_FS */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *  Allow or disallow ioctl's for debugging</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define STREAMER_IOCTL 0</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/timer.h&gt;</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/proc_fs.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='del'>-#include &lt;linux/stddef.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;net/net_namespace.h&gt;</div><div class='del'>-#include &lt;net/checksum.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include "lanstreamer.h"</div><div class='del'>-</div><div class='del'>-#if (BITS_PER_LONG == 64)</div><div class='del'>-#error broken on 64-bit: stores pointer to rx_ring-&gt;buffer in 32-bit int</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* I've got to put some intelligence into the version number so that Peter and I know</div><div class='del'>- * which version of the code somebody has got. </div><div class='del'>- * Version Number = a.b.c.d  where a.b.c is the level of code and d is the latest author.</div><div class='del'>- * So 0.0.1.pds = Peter, 0.0.1.mlp = Mike</div><div class='del'>- * </div><div class='del'>- * Official releases will only have an a.b.c version number format.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static char version[] = "LanStreamer.c v0.4.0 03/08/01 - Mike Sullivan\n"</div><div class='del'>-                        "              v0.5.3 11/13/02 - Kent Yoder";</div><div class='del'>-</div><div class='del'>-static DEFINE_PCI_DEVICE_TABLE(streamer_pci_tbl) = {</div><div class='del'>-	{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_TR, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='del'>-	{}	/* terminating entry */</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(pci,streamer_pci_tbl);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static char *open_maj_error[] = {</div><div class='del'>-	"No error", "Lobe Media Test", "Physical Insertion",</div><div class='del'>-	"Address Verification", "Neighbor Notification (Ring Poll)",</div><div class='del'>-	"Request Parameters", "FDX Registration Request",</div><div class='del'>-	"FDX Lobe Media Test", "FDX Duplicate Address Check",</div><div class='del'>-	"Unknown stage"</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static char *open_min_error[] = {</div><div class='del'>-	"No error", "Function Failure", "Signal Lost", "Wire Fault",</div><div class='del'>-	"Ring Speed Mismatch", "Timeout", "Ring Failure", "Ring Beaconing",</div><div class='del'>-	"Duplicate Node Address", "Request Parameters", "Remove Received",</div><div class='del'>-	"Reserved", "Reserved", "No Monitor Detected for RPL",</div><div class='del'>-	"Monitor Contention failer for RPL", "FDX Protocol Error"</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Module parameters */</div><div class='del'>-</div><div class='del'>-/* Ring Speed 0,4,16</div><div class='del'>- * 0 = Autosense         </div><div class='del'>- * 4,16 = Selected speed only, no autosense</div><div class='del'>- * This allows the card to be the first on the ring</div><div class='del'>- * and become the active monitor.</div><div class='del'>- *</div><div class='del'>- * WARNING: Some hubs will allow you to insert</div><div class='del'>- * at the wrong speed</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int ringspeed[STREAMER_MAX_ADAPTERS] = { 0, };</div><div class='del'>-</div><div class='del'>-module_param_array(ringspeed, int, NULL, 0);</div><div class='del'>-</div><div class='del'>-/* Packet buffer size */</div><div class='del'>-</div><div class='del'>-static int pkt_buf_sz[STREAMER_MAX_ADAPTERS] = { 0, };</div><div class='del'>-</div><div class='del'>-module_param_array(pkt_buf_sz, int, NULL, 0);</div><div class='del'>-</div><div class='del'>-/* Message Level */</div><div class='del'>-</div><div class='del'>-static int message_level[STREAMER_MAX_ADAPTERS] = { 1, };</div><div class='del'>-</div><div class='del'>-module_param_array(message_level, int, NULL, 0);</div><div class='del'>-</div><div class='del'>-#if STREAMER_IOCTL</div><div class='del'>-static int streamer_ioctl(struct net_device *, struct ifreq *, int);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int streamer_reset(struct net_device *dev);</div><div class='del'>-static int streamer_open(struct net_device *dev);</div><div class='del'>-static netdev_tx_t streamer_xmit(struct sk_buff *skb,</div><div class='del'>-				       struct net_device *dev);</div><div class='del'>-static int streamer_close(struct net_device *dev);</div><div class='del'>-static void streamer_set_rx_mode(struct net_device *dev);</div><div class='del'>-static irqreturn_t streamer_interrupt(int irq, void *dev_id);</div><div class='del'>-static int streamer_set_mac_address(struct net_device *dev, void *addr);</div><div class='del'>-static void streamer_arb_cmd(struct net_device *dev);</div><div class='del'>-static int streamer_change_mtu(struct net_device *dev, int mtu);</div><div class='del'>-static void streamer_srb_bh(struct net_device *dev);</div><div class='del'>-static void streamer_asb_bh(struct net_device *dev);</div><div class='del'>-#if STREAMER_NETWORK_MONITOR</div><div class='del'>-#ifdef CONFIG_PROC_FS</div><div class='del'>-static int streamer_proc_info(char *buffer, char **start, off_t offset,</div><div class='del'>-			      int length, int *eof, void *data);</div><div class='del'>-static int sprintf_info(char *buffer, struct net_device *dev);</div><div class='del'>-struct streamer_private *dev_streamer=NULL;</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops streamer_netdev_ops = {</div><div class='del'>-	.ndo_open		= streamer_open,</div><div class='del'>-	.ndo_stop		= streamer_close,</div><div class='del'>-	.ndo_start_xmit		= streamer_xmit,</div><div class='del'>-	.ndo_change_mtu		= streamer_change_mtu,</div><div class='del'>-#if STREAMER_IOCTL</div><div class='del'>-	.ndo_do_ioctl		= streamer_ioctl,</div><div class='del'>-#endif</div><div class='del'>-	.ndo_set_rx_mode	= streamer_set_rx_mode,</div><div class='del'>-	.ndo_set_mac_address	= streamer_set_mac_address,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __devinit streamer_init_one(struct pci_dev *pdev,</div><div class='del'>-				       const struct pci_device_id *ent)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct streamer_private *streamer_priv;</div><div class='del'>-	unsigned long pio_start, pio_end, pio_flags, pio_len;</div><div class='del'>-	unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;</div><div class='del'>-	int rc = 0;</div><div class='del'>-	static int card_no=-1;</div><div class='del'>-	u16 pcr;</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	printk("lanstreamer::streamer_init_one, entry pdev %p\n",pdev);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	card_no++;</div><div class='del'>-	dev = alloc_trdev(sizeof(*streamer_priv));</div><div class='del'>-	if (dev==NULL) {</div><div class='del'>-		printk(KERN_ERR "lanstreamer: out of memory.\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	streamer_priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-#if STREAMER_NETWORK_MONITOR</div><div class='del'>-#ifdef CONFIG_PROC_FS</div><div class='del'>-	if (!dev_streamer)</div><div class='del'>-		create_proc_read_entry("streamer_tr", 0, init_net.proc_net,</div><div class='del'>-					streamer_proc_info, NULL); </div><div class='del'>-	streamer_priv-&gt;next = dev_streamer;</div><div class='del'>-	dev_streamer = streamer_priv;</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));</div><div class='del'>-	if (rc) {</div><div class='del'>-		printk(KERN_ERR "%s: No suitable PCI mapping available.\n",</div><div class='del'>-				dev-&gt;name);</div><div class='del'>-		rc = -ENODEV;</div><div class='del'>-		goto err_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rc = pci_enable_device(pdev);</div><div class='del'>-	if (rc) {</div><div class='del'>-		printk(KERN_ERR "lanstreamer: unable to enable pci device\n");</div><div class='del'>-		rc=-EIO;</div><div class='del'>-		goto err_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pci_set_master(pdev);</div><div class='del'>-</div><div class='del'>-	rc = pci_set_mwi(pdev);</div><div class='del'>-	if (rc) {</div><div class='del'>-		printk(KERN_ERR "lanstreamer: unable to enable MWI on pci device\n");</div><div class='del'>-		goto err_out_disable;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pio_start = pci_resource_start(pdev, 0);</div><div class='del'>-	pio_end = pci_resource_end(pdev, 0);</div><div class='del'>-	pio_flags = pci_resource_flags(pdev, 0);</div><div class='del'>-	pio_len = pci_resource_len(pdev, 0);</div><div class='del'>-</div><div class='del'>-	mmio_start = pci_resource_start(pdev, 1);</div><div class='del'>-	mmio_end = pci_resource_end(pdev, 1);</div><div class='del'>-	mmio_flags = pci_resource_flags(pdev, 1);</div><div class='del'>-	mmio_len = pci_resource_len(pdev, 1);</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	printk("lanstreamer: pio_start %x pio_end %x pio_len %x pio_flags %x\n",</div><div class='del'>-		pio_start, pio_end, pio_len, pio_flags);</div><div class='del'>-	printk("lanstreamer: mmio_start %x mmio_end %x mmio_len %x mmio_flags %x\n",</div><div class='del'>-		mmio_start, mmio_end, mmio_flags, mmio_len);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (!request_region(pio_start, pio_len, "lanstreamer")) {</div><div class='del'>-		printk(KERN_ERR "lanstreamer: unable to get pci io addr %lx\n",</div><div class='del'>-			pio_start);</div><div class='del'>-		rc= -EBUSY;</div><div class='del'>-		goto err_out_mwi;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!request_mem_region(mmio_start, mmio_len, "lanstreamer")) {</div><div class='del'>-		printk(KERN_ERR "lanstreamer: unable to get pci mmio addr %lx\n",</div><div class='del'>-			mmio_start);</div><div class='del'>-		rc= -EBUSY;</div><div class='del'>-		goto err_out_free_pio;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	streamer_priv-&gt;streamer_mmio=ioremap(mmio_start, mmio_len);</div><div class='del'>-	if (streamer_priv-&gt;streamer_mmio == NULL) {</div><div class='del'>-		printk(KERN_ERR "lanstreamer: unable to remap MMIO %lx\n",</div><div class='del'>-			mmio_start);</div><div class='del'>-		rc= -EIO;</div><div class='del'>-		goto err_out_free_mmio;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	init_waitqueue_head(&amp;streamer_priv-&gt;srb_wait);</div><div class='del'>-	init_waitqueue_head(&amp;streamer_priv-&gt;trb_wait);</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;streamer_netdev_ops;</div><div class='del'>-	dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-	dev-&gt;base_addr=pio_start;</div><div class='del'>-	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	streamer_priv-&gt;streamer_card_name = (char *)pdev-&gt;resource[0].name;</div><div class='del'>-	streamer_priv-&gt;pci_dev = pdev;</div><div class='del'>-</div><div class='del'>-	if ((pkt_buf_sz[card_no] &lt; 100) || (pkt_buf_sz[card_no] &gt; 18000))</div><div class='del'>-		streamer_priv-&gt;pkt_buf_sz = PKT_BUF_SZ;</div><div class='del'>-	else</div><div class='del'>-		streamer_priv-&gt;pkt_buf_sz = pkt_buf_sz[card_no];</div><div class='del'>-</div><div class='del'>-	streamer_priv-&gt;streamer_ring_speed = ringspeed[card_no];</div><div class='del'>-	streamer_priv-&gt;streamer_message_level = message_level[card_no];</div><div class='del'>-</div><div class='del'>-	pci_set_drvdata(pdev, dev);</div><div class='del'>-</div><div class='del'>-	spin_lock_init(&amp;streamer_priv-&gt;streamer_lock);</div><div class='del'>-</div><div class='del'>-	pci_read_config_word (pdev, PCI_COMMAND, &amp;pcr);</div><div class='del'>-	pcr |= PCI_COMMAND_SERR;</div><div class='del'>-	pci_write_config_word (pdev, PCI_COMMAND, pcr);</div><div class='del'>-</div><div class='del'>-	printk("%s\n", version);</div><div class='del'>-	printk("%s: %s. I/O at %hx, MMIO at %p, using irq %d\n",dev-&gt;name,</div><div class='del'>-		streamer_priv-&gt;streamer_card_name,</div><div class='del'>-		(unsigned int) dev-&gt;base_addr,</div><div class='del'>-		streamer_priv-&gt;streamer_mmio, </div><div class='del'>-		dev-&gt;irq);</div><div class='del'>-</div><div class='del'>-	if (streamer_reset(dev))</div><div class='del'>-		goto err_out_unmap;</div><div class='del'>-</div><div class='del'>-	rc = register_netdev(dev);</div><div class='del'>-	if (rc)</div><div class='del'>-		goto err_out_unmap;</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_out_unmap:</div><div class='del'>-	iounmap(streamer_priv-&gt;streamer_mmio);</div><div class='del'>-err_out_free_mmio:</div><div class='del'>-	release_mem_region(mmio_start, mmio_len);</div><div class='del'>-err_out_free_pio:</div><div class='del'>-	release_region(pio_start, pio_len);</div><div class='del'>-err_out_mwi:</div><div class='del'>-	pci_clear_mwi(pdev);</div><div class='del'>-err_out_disable:</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-err_out:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	printk("lanstreamer: Exit error %x\n",rc);</div><div class='del'>-#endif</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __devexit streamer_remove_one(struct pci_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev=pci_get_drvdata(pdev);</div><div class='del'>-	struct streamer_private *streamer_priv;</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	printk("lanstreamer::streamer_remove_one entry pdev %p\n",pdev);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (dev == NULL) {</div><div class='del'>-		printk(KERN_ERR "lanstreamer::streamer_remove_one, ERROR dev is NULL\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	streamer_priv=netdev_priv(dev);</div><div class='del'>-	if (streamer_priv == NULL) {</div><div class='del'>-		printk(KERN_ERR "lanstreamer::streamer_remove_one, ERROR dev-&gt;priv is NULL\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#if STREAMER_NETWORK_MONITOR</div><div class='del'>-#ifdef CONFIG_PROC_FS</div><div class='del'>-	{</div><div class='del'>-		struct streamer_private **p, **next;</div><div class='del'>-</div><div class='del'>-		for (p = &amp;dev_streamer; *p; p = next) {</div><div class='del'>-			next = &amp;(*p)-&gt;next;</div><div class='del'>-			if (*p == streamer_priv) {</div><div class='del'>-				*p = *next;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if (!dev_streamer)</div><div class='del'>-			remove_proc_entry("streamer_tr", init_net.proc_net);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	unregister_netdev(dev);</div><div class='del'>-	iounmap(streamer_priv-&gt;streamer_mmio);</div><div class='del'>-	release_mem_region(pci_resource_start(pdev, 1), pci_resource_len(pdev,1));</div><div class='del'>-	release_region(pci_resource_start(pdev, 0), pci_resource_len(pdev,0));</div><div class='del'>-	pci_clear_mwi(pdev);</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	pci_set_drvdata(pdev, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int streamer_reset(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct streamer_private *streamer_priv;</div><div class='del'>-	__u8 __iomem *streamer_mmio;</div><div class='del'>-	unsigned long t;</div><div class='del'>-	unsigned int uaa_addr;</div><div class='del'>-	struct sk_buff *skb = NULL;</div><div class='del'>-	__u16 misr;</div><div class='del'>-</div><div class='del'>-	streamer_priv = netdev_priv(dev);</div><div class='del'>-	streamer_mmio = streamer_priv-&gt;streamer_mmio;</div><div class='del'>-</div><div class='del'>-	writew(readw(streamer_mmio + BCTL) | BCTL_SOFTRESET, streamer_mmio + BCTL);</div><div class='del'>-	t = jiffies;</div><div class='del'>-	/* Hold soft reset bit for a while */</div><div class='del'>-	ssleep(1);</div><div class='del'>-	</div><div class='del'>-	writew(readw(streamer_mmio + BCTL) &amp; ~BCTL_SOFTRESET,</div><div class='del'>-	       streamer_mmio + BCTL);</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	printk("BCTL: %x\n", readw(streamer_mmio + BCTL));</div><div class='del'>-	printk("GPR: %x\n", readw(streamer_mmio + GPR));</div><div class='del'>-	printk("SISRMASK: %x\n", readw(streamer_mmio + SISR_MASK));</div><div class='del'>-#endif</div><div class='del'>-	writew(readw(streamer_mmio + BCTL) | (BCTL_RX_FIFO_8 | BCTL_TX_FIFO_8), streamer_mmio + BCTL );</div><div class='del'>-</div><div class='del'>-	if (streamer_priv-&gt;streamer_ring_speed == 0) {	/* Autosense */</div><div class='del'>-		writew(readw(streamer_mmio + GPR) | GPR_AUTOSENSE,</div><div class='del'>-		       streamer_mmio + GPR);</div><div class='del'>-		if (streamer_priv-&gt;streamer_message_level)</div><div class='del'>-			printk(KERN_INFO "%s: Ringspeed autosense mode on\n",</div><div class='del'>-			       dev-&gt;name);</div><div class='del'>-	} else if (streamer_priv-&gt;streamer_ring_speed == 16) {</div><div class='del'>-		if (streamer_priv-&gt;streamer_message_level)</div><div class='del'>-			printk(KERN_INFO "%s: Trying to open at 16 Mbps as requested\n",</div><div class='del'>-			       dev-&gt;name);</div><div class='del'>-		writew(GPR_16MBPS, streamer_mmio + GPR);</div><div class='del'>-	} else if (streamer_priv-&gt;streamer_ring_speed == 4) {</div><div class='del'>-		if (streamer_priv-&gt;streamer_message_level)</div><div class='del'>-			printk(KERN_INFO "%s: Trying to open at 4 Mbps as requested\n",</div><div class='del'>-			       dev-&gt;name);</div><div class='del'>-		writew(0, streamer_mmio + GPR);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	skb = dev_alloc_skb(streamer_priv-&gt;pkt_buf_sz);</div><div class='del'>-	if (!skb) {</div><div class='del'>-		printk(KERN_INFO "%s: skb allocation for diagnostics failed...proceeding\n",</div><div class='del'>-		       dev-&gt;name);</div><div class='del'>-	} else {</div><div class='del'>-	        struct streamer_rx_desc *rx_ring;</div><div class='del'>-                u8 *data;</div><div class='del'>-</div><div class='del'>-		rx_ring=(struct streamer_rx_desc *)skb-&gt;data;</div><div class='del'>-		data=((u8 *)skb-&gt;data)+sizeof(struct streamer_rx_desc);</div><div class='del'>-		rx_ring-&gt;forward=0;</div><div class='del'>-		rx_ring-&gt;status=0;</div><div class='del'>-		rx_ring-&gt;buffer=cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, data, </div><div class='del'>-							512, PCI_DMA_FROMDEVICE));</div><div class='del'>-		rx_ring-&gt;framelen_buflen=512; </div><div class='del'>-		writel(cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, rx_ring, 512, PCI_DMA_FROMDEVICE)),</div><div class='del'>-			streamer_mmio+RXBDA);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	printk("GPR = %x\n", readw(streamer_mmio + GPR));</div><div class='del'>-#endif</div><div class='del'>-	/* start solo init */</div><div class='del'>-	writew(SISR_MI, streamer_mmio + SISR_MASK_SUM);</div><div class='del'>-</div><div class='del'>-	while (!((readw(streamer_mmio + SISR)) &amp; SISR_SRB_REPLY)) {</div><div class='del'>-		msleep_interruptible(100);</div><div class='del'>-		if (time_after(jiffies, t + 40 * HZ)) {</div><div class='del'>-			printk(KERN_ERR</div><div class='del'>-			       "IBM PCI tokenring card not responding\n");</div><div class='del'>-			release_region(dev-&gt;base_addr, STREAMER_IO_SPACE);</div><div class='del'>-			if (skb)</div><div class='del'>-				dev_kfree_skb(skb);</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	writew(~SISR_SRB_REPLY, streamer_mmio + SISR_RUM);</div><div class='del'>-	misr = readw(streamer_mmio + MISR_RUM);</div><div class='del'>-	writew(~misr, streamer_mmio + MISR_RUM);</div><div class='del'>-</div><div class='del'>-	if (skb)</div><div class='del'>-		dev_kfree_skb(skb);	/* release skb used for diagnostics */</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	printk("LAPWWO: %x, LAPA: %x LAPE:  %x\n",</div><div class='del'>-	       readw(streamer_mmio + LAPWWO), readw(streamer_mmio + LAPA),</div><div class='del'>-	       readw(streamer_mmio + LAPE));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	{</div><div class='del'>-		int i;</div><div class='del'>-		writew(readw(streamer_mmio + LAPWWO),</div><div class='del'>-		       streamer_mmio + LAPA);</div><div class='del'>-		printk("initialization response srb dump: ");</div><div class='del'>-		for (i = 0; i &lt; 10; i++)</div><div class='del'>-			printk("%x:",</div><div class='del'>-			       ntohs(readw(streamer_mmio + LAPDINC)));</div><div class='del'>-		printk("\n");</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	writew(readw(streamer_mmio + LAPWWO) + 6, streamer_mmio + LAPA);</div><div class='del'>-	if (readw(streamer_mmio + LAPD)) {</div><div class='del'>-		printk(KERN_INFO "tokenring card initialization failed. errorcode : %x\n",</div><div class='del'>-		       ntohs(readw(streamer_mmio + LAPD)));</div><div class='del'>-		release_region(dev-&gt;base_addr, STREAMER_IO_SPACE);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	writew(readw(streamer_mmio + LAPWWO) + 8, streamer_mmio + LAPA);</div><div class='del'>-	uaa_addr = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-	readw(streamer_mmio + LAPDINC);	/* skip over Level.Addr field */</div><div class='del'>-	streamer_priv-&gt;streamer_addr_table_addr = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-	streamer_priv-&gt;streamer_parms_addr = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	printk("UAA resides at %x\n", uaa_addr);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* setup uaa area for access with LAPD */</div><div class='del'>-	{</div><div class='del'>-		int i;</div><div class='del'>-		__u16 addr;</div><div class='del'>-		writew(uaa_addr, streamer_mmio + LAPA);</div><div class='del'>-		for (i = 0; i &lt; 6; i += 2) {</div><div class='del'>-		        addr=ntohs(readw(streamer_mmio+LAPDINC));</div><div class='del'>-			dev-&gt;dev_addr[i]= (addr &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-			dev-&gt;dev_addr[i+1]= addr &amp; 0xff;</div><div class='del'>-		}</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-		printk("Adapter address: %pM\n", dev-&gt;dev_addr);</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int streamer_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct streamer_private *streamer_priv = netdev_priv(dev);</div><div class='del'>-	__u8 __iomem *streamer_mmio = streamer_priv-&gt;streamer_mmio;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	char open_error[255];</div><div class='del'>-	int i, open_finished = 1;</div><div class='del'>-	__u16 srb_word;</div><div class='del'>-	__u16 srb_open;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	if (readw(streamer_mmio+BMCTL_SUM) &amp; BMCTL_RX_ENABLED) {</div><div class='del'>-	        rc=streamer_reset(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (request_irq(dev-&gt;irq, streamer_interrupt, IRQF_SHARED, "lanstreamer", dev)) {</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	}</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	printk("BMCTL: %x\n", readw(streamer_mmio + BMCTL_SUM));</div><div class='del'>-	printk("pending ints: %x\n", readw(streamer_mmio + SISR));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	writew(SISR_MI | SISR_SRB_REPLY, streamer_mmio + SISR_MASK);	/* more ints later, doesn't stop arb cmd interrupt */</div><div class='del'>-	writew(LISR_LIE, streamer_mmio + LISR);	/* more ints later */</div><div class='del'>-</div><div class='del'>-	/* adapter is closed, so SRB is pointed to by LAPWWO */</div><div class='del'>-	writew(readw(streamer_mmio + LAPWWO), streamer_mmio + LAPA);</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	printk("LAPWWO: %x, LAPA: %x\n", readw(streamer_mmio + LAPWWO),</div><div class='del'>-	       readw(streamer_mmio + LAPA));</div><div class='del'>-	printk("LAPE: %x\n", readw(streamer_mmio + LAPE));</div><div class='del'>-	printk("SISR Mask = %04x\n", readw(streamer_mmio + SISR_MASK));</div><div class='del'>-#endif</div><div class='del'>-	do {</div><div class='del'>-		for (i = 0; i &lt; SRB_COMMAND_SIZE; i += 2) {</div><div class='del'>-			writew(0, streamer_mmio + LAPDINC);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		writew(readw(streamer_mmio+LAPWWO),streamer_mmio+LAPA);</div><div class='del'>-		writew(htons(SRB_OPEN_ADAPTER&lt;&lt;8),streamer_mmio+LAPDINC) ; 	/* open */</div><div class='del'>-		writew(htons(STREAMER_CLEAR_RET_CODE&lt;&lt;8),streamer_mmio+LAPDINC);</div><div class='del'>-		writew(STREAMER_CLEAR_RET_CODE, streamer_mmio + LAPDINC);</div><div class='del'>-</div><div class='del'>-		writew(readw(streamer_mmio + LAPWWO) + 8, streamer_mmio + LAPA);</div><div class='del'>-#if STREAMER_NETWORK_MONITOR</div><div class='del'>-		/* If Network Monitor, instruct card to copy MAC frames through the ARB */</div><div class='del'>-		writew(htons(OPEN_ADAPTER_ENABLE_FDX | OPEN_ADAPTER_PASS_ADC_MAC | OPEN_ADAPTER_PASS_ATT_MAC | OPEN_ADAPTER_PASS_BEACON), streamer_mmio + LAPDINC);	/* offset 8 word contains open options */</div><div class='del'>-#else</div><div class='del'>-		writew(htons(OPEN_ADAPTER_ENABLE_FDX), streamer_mmio + LAPDINC);	/* Offset 8 word contains Open.Options */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		if (streamer_priv-&gt;streamer_laa[0]) {</div><div class='del'>-			writew(readw(streamer_mmio + LAPWWO) + 12, streamer_mmio + LAPA);</div><div class='del'>-			writew(htons((streamer_priv-&gt;streamer_laa[0] &lt;&lt; 8) | </div><div class='del'>-				     streamer_priv-&gt;streamer_laa[1]),streamer_mmio+LAPDINC);</div><div class='del'>-			writew(htons((streamer_priv-&gt;streamer_laa[2] &lt;&lt; 8) | </div><div class='del'>-				     streamer_priv-&gt;streamer_laa[3]),streamer_mmio+LAPDINC);</div><div class='del'>-			writew(htons((streamer_priv-&gt;streamer_laa[4] &lt;&lt; 8) | </div><div class='del'>-				     streamer_priv-&gt;streamer_laa[5]),streamer_mmio+LAPDINC);</div><div class='del'>-			memcpy(dev-&gt;dev_addr, streamer_priv-&gt;streamer_laa, dev-&gt;addr_len);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* save off srb open offset */</div><div class='del'>-		srb_open = readw(streamer_mmio + LAPWWO);</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-		writew(readw(streamer_mmio + LAPWWO),</div><div class='del'>-		       streamer_mmio + LAPA);</div><div class='del'>-		printk("srb open request:\n");</div><div class='del'>-		for (i = 0; i &lt; 16; i++) {</div><div class='del'>-			printk("%x:", ntohs(readw(streamer_mmio + LAPDINC)));</div><div class='del'>-		}</div><div class='del'>-		printk("\n");</div><div class='del'>-#endif</div><div class='del'>-		spin_lock_irqsave(&amp;streamer_priv-&gt;streamer_lock, flags);</div><div class='del'>-		streamer_priv-&gt;srb_queued = 1;</div><div class='del'>-</div><div class='del'>-		/* signal solo that SRB command has been issued */</div><div class='del'>-		writew(LISR_SRB_CMD, streamer_mmio + LISR_SUM);</div><div class='del'>-		spin_unlock_irqrestore(&amp;streamer_priv-&gt;streamer_lock, flags);</div><div class='del'>-</div><div class='del'>-		while (streamer_priv-&gt;srb_queued) {</div><div class='del'>-			interruptible_sleep_on_timeout(&amp;streamer_priv-&gt;srb_wait, 5 * HZ);</div><div class='del'>-			if (signal_pending(current)) {</div><div class='del'>-				printk(KERN_WARNING "%s: SRB timed out.\n", dev-&gt;name);</div><div class='del'>-				printk(KERN_WARNING "SISR=%x MISR=%x, LISR=%x\n",</div><div class='del'>-				       readw(streamer_mmio + SISR),</div><div class='del'>-				       readw(streamer_mmio + MISR_RUM),</div><div class='del'>-				       readw(streamer_mmio + LISR));</div><div class='del'>-				streamer_priv-&gt;srb_queued = 0;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-		printk("SISR_MASK: %x\n", readw(streamer_mmio + SISR_MASK));</div><div class='del'>-		printk("srb open response:\n");</div><div class='del'>-		writew(srb_open, streamer_mmio + LAPA);</div><div class='del'>-		for (i = 0; i &lt; 10; i++) {</div><div class='del'>-			printk("%x:",</div><div class='del'>-			       ntohs(readw(streamer_mmio + LAPDINC)));</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		/* If we get the same return response as we set, the interrupt wasn't raised and the open</div><div class='del'>-		 * timed out.</div><div class='del'>-		 */</div><div class='del'>-		writew(srb_open + 2, streamer_mmio + LAPA);</div><div class='del'>-		srb_word = ntohs(readw(streamer_mmio + LAPD)) &gt;&gt; 8;</div><div class='del'>-		if (srb_word == STREAMER_CLEAR_RET_CODE) {</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter Open time out or error.\n",</div><div class='del'>-			       dev-&gt;name);</div><div class='del'>-			return -EIO;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (srb_word != 0) {</div><div class='del'>-			if (srb_word == 0x07) {</div><div class='del'>-				if (!streamer_priv-&gt;streamer_ring_speed &amp;&amp; open_finished) {	/* Autosense , first time around */</div><div class='del'>-					printk(KERN_WARNING "%s: Retrying at different ring speed\n",</div><div class='del'>-					       dev-&gt;name);</div><div class='del'>-					open_finished = 0;</div><div class='del'>-				} else {</div><div class='del'>-					__u16 error_code;</div><div class='del'>-</div><div class='del'>-					writew(srb_open + 6, streamer_mmio + LAPA);</div><div class='del'>-					error_code = ntohs(readw(streamer_mmio + LAPD));</div><div class='del'>-					strcpy(open_error, open_maj_error[(error_code &amp; 0xf0) &gt;&gt; 4]);</div><div class='del'>-					strcat(open_error, " - ");</div><div class='del'>-					strcat(open_error, open_min_error[(error_code &amp; 0x0f)]);</div><div class='del'>-</div><div class='del'>-					if (!streamer_priv-&gt;streamer_ring_speed &amp;&amp;</div><div class='del'>-					    ((error_code &amp; 0x0f) == 0x0d))</div><div class='del'>-					{</div><div class='del'>-						printk(KERN_WARNING "%s: Tried to autosense ring speed with no monitors present\n", dev-&gt;name);</div><div class='del'>-						printk(KERN_WARNING "%s: Please try again with a specified ring speed\n", dev-&gt;name);</div><div class='del'>-						free_irq(dev-&gt;irq, dev);</div><div class='del'>-						return -EIO;</div><div class='del'>-					}</div><div class='del'>-</div><div class='del'>-					printk(KERN_WARNING "%s: %s\n",</div><div class='del'>-					       dev-&gt;name, open_error);</div><div class='del'>-					free_irq(dev-&gt;irq, dev);</div><div class='del'>-					return -EIO;</div><div class='del'>-</div><div class='del'>-				}	/* if autosense &amp;&amp; open_finished */</div><div class='del'>-			} else {</div><div class='del'>-				printk(KERN_WARNING "%s: Bad OPEN response: %x\n",</div><div class='del'>-				       dev-&gt;name, srb_word);</div><div class='del'>-				free_irq(dev-&gt;irq, dev);</div><div class='del'>-				return -EIO;</div><div class='del'>-			}</div><div class='del'>-		} else</div><div class='del'>-			open_finished = 1;</div><div class='del'>-	} while (!(open_finished));	/* Will only loop if ring speed mismatch re-open attempted &amp;&amp; autosense is on */</div><div class='del'>-</div><div class='del'>-	writew(srb_open + 18, streamer_mmio + LAPA);</div><div class='del'>-	srb_word=ntohs(readw(streamer_mmio+LAPD)) &gt;&gt; 8;</div><div class='del'>-	if (srb_word &amp; (1 &lt;&lt; 3))</div><div class='del'>-		if (streamer_priv-&gt;streamer_message_level)</div><div class='del'>-			printk(KERN_INFO "%s: Opened in FDX Mode\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	if (srb_word &amp; 1)</div><div class='del'>-		streamer_priv-&gt;streamer_ring_speed = 16;</div><div class='del'>-	else</div><div class='del'>-		streamer_priv-&gt;streamer_ring_speed = 4;</div><div class='del'>-</div><div class='del'>-	if (streamer_priv-&gt;streamer_message_level)</div><div class='del'>-		printk(KERN_INFO "%s: Opened in %d Mbps mode\n", </div><div class='del'>-			dev-&gt;name,</div><div class='del'>-			streamer_priv-&gt;streamer_ring_speed);</div><div class='del'>-</div><div class='del'>-	writew(srb_open + 8, streamer_mmio + LAPA);</div><div class='del'>-	streamer_priv-&gt;asb = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-	streamer_priv-&gt;srb = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-	streamer_priv-&gt;arb = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-	readw(streamer_mmio + LAPDINC);	/* offset 14 word is rsvd */</div><div class='del'>-	streamer_priv-&gt;trb = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-</div><div class='del'>-	streamer_priv-&gt;streamer_receive_options = 0x00;</div><div class='del'>-	streamer_priv-&gt;streamer_copy_all_options = 0;</div><div class='del'>-</div><div class='del'>-	/* setup rx ring */</div><div class='del'>-	/* enable rx channel */</div><div class='del'>-	writew(~BMCTL_RX_DIS, streamer_mmio + BMCTL_RUM);</div><div class='del'>-</div><div class='del'>-	/* setup rx descriptors */</div><div class='del'>-	streamer_priv-&gt;streamer_rx_ring=</div><div class='del'>-	    kmalloc( sizeof(struct streamer_rx_desc)*</div><div class='del'>-		     STREAMER_RX_RING_SIZE,GFP_KERNEL);</div><div class='del'>-	if (!streamer_priv-&gt;streamer_rx_ring) {</div><div class='del'>-	    printk(KERN_WARNING "%s ALLOC of streamer rx ring FAILED!!\n",dev-&gt;name);</div><div class='del'>-	    return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; STREAMER_RX_RING_SIZE; i++) {</div><div class='del'>-		struct sk_buff *skb;</div><div class='del'>-</div><div class='del'>-		skb = dev_alloc_skb(streamer_priv-&gt;pkt_buf_sz);</div><div class='del'>-		if (skb == NULL)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		skb-&gt;dev = dev;</div><div class='del'>-</div><div class='del'>-		streamer_priv-&gt;streamer_rx_ring[i].forward = </div><div class='del'>-			cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, &amp;streamer_priv-&gt;streamer_rx_ring[i + 1],</div><div class='del'>-					sizeof(struct streamer_rx_desc), PCI_DMA_FROMDEVICE));</div><div class='del'>-		streamer_priv-&gt;streamer_rx_ring[i].status = 0;</div><div class='del'>-		streamer_priv-&gt;streamer_rx_ring[i].buffer = </div><div class='del'>-			cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, skb-&gt;data,</div><div class='del'>-					      streamer_priv-&gt;pkt_buf_sz, PCI_DMA_FROMDEVICE));</div><div class='del'>-		streamer_priv-&gt;streamer_rx_ring[i].framelen_buflen = streamer_priv-&gt;pkt_buf_sz;</div><div class='del'>-		streamer_priv-&gt;rx_ring_skb[i] = skb;</div><div class='del'>-	}</div><div class='del'>-	streamer_priv-&gt;streamer_rx_ring[STREAMER_RX_RING_SIZE - 1].forward =</div><div class='del'>-				cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, &amp;streamer_priv-&gt;streamer_rx_ring[0],</div><div class='del'>-						sizeof(struct streamer_rx_desc), PCI_DMA_FROMDEVICE));</div><div class='del'>-</div><div class='del'>-	if (i == 0) {</div><div class='del'>-		printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers. Adapter disabled\n", dev-&gt;name);</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	streamer_priv-&gt;rx_ring_last_received = STREAMER_RX_RING_SIZE - 1;	/* last processed rx status */</div><div class='del'>-</div><div class='del'>-	writel(cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, &amp;streamer_priv-&gt;streamer_rx_ring[0],</div><div class='del'>-				sizeof(struct streamer_rx_desc), PCI_DMA_TODEVICE)), </div><div class='del'>-		streamer_mmio + RXBDA);</div><div class='del'>-	writel(cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, &amp;streamer_priv-&gt;streamer_rx_ring[STREAMER_RX_RING_SIZE - 1],</div><div class='del'>-				sizeof(struct streamer_rx_desc), PCI_DMA_TODEVICE)), </div><div class='del'>-		streamer_mmio + RXLBDA);</div><div class='del'>-</div><div class='del'>-	/* set bus master interrupt event mask */</div><div class='del'>-	writew(MISR_RX_NOBUF | MISR_RX_EOF, streamer_mmio + MISR_MASK);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* setup tx ring */</div><div class='del'>-	streamer_priv-&gt;streamer_tx_ring=kmalloc(sizeof(struct streamer_tx_desc)*</div><div class='del'>-						STREAMER_TX_RING_SIZE,GFP_KERNEL);</div><div class='del'>-	if (!streamer_priv-&gt;streamer_tx_ring) {</div><div class='del'>-	    printk(KERN_WARNING "%s ALLOC of streamer_tx_ring FAILED\n",dev-&gt;name);</div><div class='del'>-	    return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	writew(~BMCTL_TX2_DIS, streamer_mmio + BMCTL_RUM);	/* Enables TX channel 2 */</div><div class='del'>-	for (i = 0; i &lt; STREAMER_TX_RING_SIZE; i++) {</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[i].forward = cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, </div><div class='del'>-										&amp;streamer_priv-&gt;streamer_tx_ring[i + 1],</div><div class='del'>-										sizeof(struct streamer_tx_desc),</div><div class='del'>-										PCI_DMA_TODEVICE));</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[i].status = 0;</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[i].bufcnt_framelen = 0;</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[i].buffer = 0;</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[i].buflen = 0;</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[i].rsvd1 = 0;</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[i].rsvd2 = 0;</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[i].rsvd3 = 0;</div><div class='del'>-	}</div><div class='del'>-	streamer_priv-&gt;streamer_tx_ring[STREAMER_TX_RING_SIZE - 1].forward =</div><div class='del'>-					cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, &amp;streamer_priv-&gt;streamer_tx_ring[0],</div><div class='del'>-							sizeof(struct streamer_tx_desc), PCI_DMA_TODEVICE));</div><div class='del'>-</div><div class='del'>-	streamer_priv-&gt;free_tx_ring_entries = STREAMER_TX_RING_SIZE;</div><div class='del'>-	streamer_priv-&gt;tx_ring_free = 0;	/* next entry in tx ring to use */</div><div class='del'>-	streamer_priv-&gt;tx_ring_last_status = STREAMER_TX_RING_SIZE - 1;</div><div class='del'>-</div><div class='del'>-	/* set Busmaster interrupt event mask (handle receives on interrupt only */</div><div class='del'>-	writew(MISR_TX2_EOF | MISR_RX_NOBUF | MISR_RX_EOF, streamer_mmio + MISR_MASK);</div><div class='del'>-	/* set system event interrupt mask */</div><div class='del'>-	writew(SISR_ADAPTER_CHECK | SISR_ARB_CMD | SISR_TRB_REPLY | SISR_ASB_FREE, streamer_mmio + SISR_MASK_SUM);</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	printk("BMCTL: %x\n", readw(streamer_mmio + BMCTL_SUM));</div><div class='del'>-	printk("SISR MASK: %x\n", readw(streamer_mmio + SISR_MASK));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if STREAMER_NETWORK_MONITOR</div><div class='del'>-</div><div class='del'>-	writew(streamer_priv-&gt;streamer_addr_table_addr, streamer_mmio + LAPA);</div><div class='del'>-	printk("%s: Node Address: %04x:%04x:%04x\n", dev-&gt;name,</div><div class='del'>-		ntohs(readw(streamer_mmio + LAPDINC)),</div><div class='del'>-		ntohs(readw(streamer_mmio + LAPDINC)),</div><div class='del'>-		ntohs(readw(streamer_mmio + LAPDINC)));</div><div class='del'>-	readw(streamer_mmio + LAPDINC);</div><div class='del'>-	readw(streamer_mmio + LAPDINC);</div><div class='del'>-	printk("%s: Functional Address: %04x:%04x\n", dev-&gt;name,</div><div class='del'>-		ntohs(readw(streamer_mmio + LAPDINC)),</div><div class='del'>-		ntohs(readw(streamer_mmio + LAPDINC)));</div><div class='del'>-</div><div class='del'>-	writew(streamer_priv-&gt;streamer_parms_addr + 4,</div><div class='del'>-		streamer_mmio + LAPA);</div><div class='del'>-	printk("%s: NAUN Address: %04x:%04x:%04x\n", dev-&gt;name,</div><div class='del'>-		ntohs(readw(streamer_mmio + LAPDINC)),</div><div class='del'>-		ntohs(readw(streamer_mmio + LAPDINC)),</div><div class='del'>-		ntohs(readw(streamer_mmio + LAPDINC)));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-	netif_carrier_on(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	When we enter the rx routine we do not know how many frames have been </div><div class='del'>- *	queued on the rx channel.  Therefore we start at the next rx status</div><div class='del'>- *	position and travel around the receive ring until we have completed</div><div class='del'>- *	all the frames.</div><div class='del'>- *</div><div class='del'>- *	This means that we may process the frame before we receive the end</div><div class='del'>- *	of frame interrupt. This is why we always test the status instead</div><div class='del'>- *	of blindly processing the next frame.</div><div class='del'>- *	</div><div class='del'>- */</div><div class='del'>-static void streamer_rx(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct streamer_private *streamer_priv =</div><div class='del'>-	    netdev_priv(dev);</div><div class='del'>-	__u8 __iomem *streamer_mmio = streamer_priv-&gt;streamer_mmio;</div><div class='del'>-	struct streamer_rx_desc *rx_desc;</div><div class='del'>-	int rx_ring_last_received, length, frame_length, buffer_cnt = 0;</div><div class='del'>-	struct sk_buff *skb, *skb2;</div><div class='del'>-</div><div class='del'>-	/* setup the next rx descriptor to be received */</div><div class='del'>-	rx_desc = &amp;streamer_priv-&gt;streamer_rx_ring[(streamer_priv-&gt;rx_ring_last_received + 1) &amp; (STREAMER_RX_RING_SIZE - 1)];</div><div class='del'>-	rx_ring_last_received = streamer_priv-&gt;rx_ring_last_received;</div><div class='del'>-</div><div class='del'>-	while (rx_desc-&gt;status &amp; 0x01000000) {	/* While processed descriptors are available */</div><div class='del'>-		if (rx_ring_last_received != streamer_priv-&gt;rx_ring_last_received) </div><div class='del'>-		{</div><div class='del'>-			printk(KERN_WARNING "RX Error 1 rx_ring_last_received not the same %x %x\n",</div><div class='del'>-				rx_ring_last_received, streamer_priv-&gt;rx_ring_last_received);</div><div class='del'>-		}</div><div class='del'>-		streamer_priv-&gt;rx_ring_last_received = (streamer_priv-&gt;rx_ring_last_received + 1) &amp; (STREAMER_RX_RING_SIZE - 1);</div><div class='del'>-		rx_ring_last_received = streamer_priv-&gt;rx_ring_last_received;</div><div class='del'>-</div><div class='del'>-		length = rx_desc-&gt;framelen_buflen &amp; 0xffff;	/* buffer length */</div><div class='del'>-		frame_length = (rx_desc-&gt;framelen_buflen &gt;&gt; 16) &amp; 0xffff;</div><div class='del'>-</div><div class='del'>-		if (rx_desc-&gt;status &amp; 0x7E830000) {	/* errors */</div><div class='del'>-			if (streamer_priv-&gt;streamer_message_level) {</div><div class='del'>-				printk(KERN_WARNING "%s: Rx Error %x\n",</div><div class='del'>-				       dev-&gt;name, rx_desc-&gt;status);</div><div class='del'>-			}</div><div class='del'>-		} else {	/* received without errors */</div><div class='del'>-			if (rx_desc-&gt;status &amp; 0x80000000) {	/* frame complete */</div><div class='del'>-				buffer_cnt = 1;</div><div class='del'>-				skb = dev_alloc_skb(streamer_priv-&gt;pkt_buf_sz);</div><div class='del'>-			} else {</div><div class='del'>-				skb = dev_alloc_skb(frame_length);</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (skb == NULL) </div><div class='del'>-			{</div><div class='del'>-				printk(KERN_WARNING "%s: Not enough memory to copy packet to upper layers.\n",	dev-&gt;name);</div><div class='del'>-				dev-&gt;stats.rx_dropped++;</div><div class='del'>-			} else {	/* we allocated an skb OK */</div><div class='del'>-				if (buffer_cnt == 1) {</div><div class='del'>-					/* release the DMA mapping */</div><div class='del'>-					pci_unmap_single(streamer_priv-&gt;pci_dev, </div><div class='del'>-						le32_to_cpu(streamer_priv-&gt;streamer_rx_ring[rx_ring_last_received].buffer),</div><div class='del'>-						streamer_priv-&gt;pkt_buf_sz, </div><div class='del'>-						PCI_DMA_FROMDEVICE);</div><div class='del'>-					skb2 = streamer_priv-&gt;rx_ring_skb[rx_ring_last_received];</div><div class='del'>-#if STREAMER_DEBUG_PACKETS</div><div class='del'>-					{</div><div class='del'>-						int i;</div><div class='del'>-						printk("streamer_rx packet print: skb-&gt;data2 %p  skb-&gt;head %p\n", skb2-&gt;data, skb2-&gt;head);</div><div class='del'>-						for (i = 0; i &lt; frame_length; i++) </div><div class='del'>-						{</div><div class='del'>-							printk("%x:", skb2-&gt;data[i]);</div><div class='del'>-							if (((i + 1) % 16) == 0)</div><div class='del'>-								printk("\n");</div><div class='del'>-						}</div><div class='del'>-						printk("\n");</div><div class='del'>-					}</div><div class='del'>-#endif</div><div class='del'>-					skb_put(skb2, length);</div><div class='del'>-					skb2-&gt;protocol = tr_type_trans(skb2, dev);</div><div class='del'>-					/* recycle this descriptor */</div><div class='del'>-					streamer_priv-&gt;streamer_rx_ring[rx_ring_last_received].status = 0;</div><div class='del'>-					streamer_priv-&gt;streamer_rx_ring[rx_ring_last_received].framelen_buflen = streamer_priv-&gt;pkt_buf_sz;</div><div class='del'>-					streamer_priv-&gt;streamer_rx_ring[rx_ring_last_received].buffer = </div><div class='del'>-						cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, skb-&gt;data, streamer_priv-&gt;pkt_buf_sz,</div><div class='del'>-								PCI_DMA_FROMDEVICE));</div><div class='del'>-					streamer_priv-&gt;rx_ring_skb[rx_ring_last_received] = skb;</div><div class='del'>-					/* place recycled descriptor back on the adapter */</div><div class='del'>-					writel(cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, </div><div class='del'>-									&amp;streamer_priv-&gt;streamer_rx_ring[rx_ring_last_received],</div><div class='del'>-									sizeof(struct streamer_rx_desc), PCI_DMA_FROMDEVICE)),</div><div class='del'>-						streamer_mmio + RXLBDA);</div><div class='del'>-					/* pass the received skb up to the protocol */</div><div class='del'>-					netif_rx(skb2);</div><div class='del'>-				} else {</div><div class='del'>-					do {	/* Walk the buffers */</div><div class='del'>-						pci_unmap_single(streamer_priv-&gt;pci_dev, le32_to_cpu(rx_desc-&gt;buffer), length, PCI_DMA_FROMDEVICE), </div><div class='del'>-						memcpy(skb_put(skb, length), (void *)rx_desc-&gt;buffer, length);	/* copy this fragment */</div><div class='del'>-						streamer_priv-&gt;streamer_rx_ring[rx_ring_last_received].status = 0;</div><div class='del'>-						streamer_priv-&gt;streamer_rx_ring[rx_ring_last_received].framelen_buflen = streamer_priv-&gt;pkt_buf_sz;</div><div class='del'>-						</div><div class='del'>-						/* give descriptor back to the adapter */</div><div class='del'>-						writel(cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, </div><div class='del'>-									&amp;streamer_priv-&gt;streamer_rx_ring[rx_ring_last_received],</div><div class='del'>-									length, PCI_DMA_FROMDEVICE)), </div><div class='del'>-							streamer_mmio + RXLBDA);</div><div class='del'>-</div><div class='del'>-						if (rx_desc-&gt;status &amp; 0x80000000)</div><div class='del'>-							break;	/* this descriptor completes the frame */</div><div class='del'>-</div><div class='del'>-						/* else get the next pending descriptor */</div><div class='del'>-						if (rx_ring_last_received!= streamer_priv-&gt;rx_ring_last_received)</div><div class='del'>-						{</div><div class='del'>-							printk("RX Error rx_ring_last_received not the same %x %x\n",</div><div class='del'>-								rx_ring_last_received,</div><div class='del'>-								streamer_priv-&gt;rx_ring_last_received);</div><div class='del'>-						}</div><div class='del'>-						rx_desc = &amp;streamer_priv-&gt;streamer_rx_ring[(streamer_priv-&gt;rx_ring_last_received+1) &amp; (STREAMER_RX_RING_SIZE-1)];</div><div class='del'>-</div><div class='del'>-						length = rx_desc-&gt;framelen_buflen &amp; 0xffff;	/* buffer length */</div><div class='del'>-						streamer_priv-&gt;rx_ring_last_received =	(streamer_priv-&gt;rx_ring_last_received+1) &amp; (STREAMER_RX_RING_SIZE - 1);</div><div class='del'>-						rx_ring_last_received = streamer_priv-&gt;rx_ring_last_received;</div><div class='del'>-					} while (1);</div><div class='del'>-</div><div class='del'>-					skb-&gt;protocol = tr_type_trans(skb, dev);</div><div class='del'>-					/* send up to the protocol */</div><div class='del'>-					netif_rx(skb);</div><div class='del'>-				}</div><div class='del'>-				dev-&gt;stats.rx_packets++;</div><div class='del'>-				dev-&gt;stats.rx_bytes += length;</div><div class='del'>-			}	/* if skb == null */</div><div class='del'>-		}		/* end received without errors */</div><div class='del'>-</div><div class='del'>-		/* try the next one */</div><div class='del'>-		rx_desc = &amp;streamer_priv-&gt;streamer_rx_ring[(rx_ring_last_received + 1) &amp; (STREAMER_RX_RING_SIZE - 1)];</div><div class='del'>-	}			/* end for all completed rx descriptors */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t streamer_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *) dev_id;</div><div class='del'>-	struct streamer_private *streamer_priv =</div><div class='del'>-	    netdev_priv(dev);</div><div class='del'>-	__u8 __iomem *streamer_mmio = streamer_priv-&gt;streamer_mmio;</div><div class='del'>-	__u16 sisr;</div><div class='del'>-	__u16 misr;</div><div class='del'>-	u8 max_intr = MAX_INTR;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;streamer_priv-&gt;streamer_lock);</div><div class='del'>-	sisr = readw(streamer_mmio + SISR);</div><div class='del'>-</div><div class='del'>-	while((sisr &amp; (SISR_MI | SISR_SRB_REPLY | SISR_ADAPTER_CHECK | SISR_ASB_FREE | </div><div class='del'>-		       SISR_ARB_CMD | SISR_TRB_REPLY | SISR_PAR_ERR | SISR_SERR_ERR)) &amp;&amp;</div><div class='del'>-	      (max_intr &gt; 0)) {</div><div class='del'>-</div><div class='del'>-		if(sisr &amp; SISR_PAR_ERR) {</div><div class='del'>-			writew(~SISR_PAR_ERR, streamer_mmio + SISR_RUM);</div><div class='del'>-			(void)readw(streamer_mmio + SISR_RUM);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		else if(sisr &amp; SISR_SERR_ERR) {</div><div class='del'>-			writew(~SISR_SERR_ERR, streamer_mmio + SISR_RUM);</div><div class='del'>-			(void)readw(streamer_mmio + SISR_RUM);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		else if(sisr &amp; SISR_MI) {</div><div class='del'>-			misr = readw(streamer_mmio + MISR_RUM);</div><div class='del'>-</div><div class='del'>-		if (misr &amp; MISR_TX2_EOF) {</div><div class='del'>-				while(streamer_priv-&gt;streamer_tx_ring[(streamer_priv-&gt;tx_ring_last_status + 1) &amp; (STREAMER_TX_RING_SIZE - 1)].status) {</div><div class='del'>-				streamer_priv-&gt;tx_ring_last_status = (streamer_priv-&gt;tx_ring_last_status + 1) &amp; (STREAMER_TX_RING_SIZE - 1);</div><div class='del'>-				streamer_priv-&gt;free_tx_ring_entries++;</div><div class='del'>-				dev-&gt;stats.tx_bytes += streamer_priv-&gt;tx_ring_skb[streamer_priv-&gt;tx_ring_last_status]-&gt;len;</div><div class='del'>-				dev-&gt;stats.tx_packets++;</div><div class='del'>-				dev_kfree_skb_irq(streamer_priv-&gt;tx_ring_skb[streamer_priv-&gt;tx_ring_last_status]);</div><div class='del'>-				streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_last_status].buffer = 0xdeadbeef;</div><div class='del'>-				streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_last_status].status = 0;</div><div class='del'>-				streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_last_status].bufcnt_framelen = 0;</div><div class='del'>-				streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_last_status].buflen = 0;</div><div class='del'>-				streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_last_status].rsvd1 = 0;</div><div class='del'>-				streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_last_status].rsvd2 = 0;</div><div class='del'>-				streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_last_status].rsvd3 = 0;</div><div class='del'>-			}</div><div class='del'>-			netif_wake_queue(dev);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (misr &amp; MISR_RX_EOF) {</div><div class='del'>-			streamer_rx(dev);</div><div class='del'>-		}</div><div class='del'>-		/* MISR_RX_EOF */</div><div class='del'>-</div><div class='del'>-			if (misr &amp; MISR_RX_NOBUF) {</div><div class='del'>-				/* According to the documentation, we don't have to do anything,  </div><div class='del'>-                                 * but trapping it keeps it out of /var/log/messages.  </div><div class='del'>-                                 */</div><div class='del'>-			}		/* SISR_RX_NOBUF */</div><div class='del'>-</div><div class='del'>-			writew(~misr, streamer_mmio + MISR_RUM);</div><div class='del'>-			(void)readw(streamer_mmio + MISR_RUM);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		else if (sisr &amp; SISR_SRB_REPLY) {</div><div class='del'>-			if (streamer_priv-&gt;srb_queued == 1) {</div><div class='del'>-				wake_up_interruptible(&amp;streamer_priv-&gt;srb_wait);</div><div class='del'>-			} else if (streamer_priv-&gt;srb_queued == 2) {</div><div class='del'>-				streamer_srb_bh(dev);</div><div class='del'>-			}</div><div class='del'>-			streamer_priv-&gt;srb_queued = 0;</div><div class='del'>-</div><div class='del'>-			writew(~SISR_SRB_REPLY, streamer_mmio + SISR_RUM);</div><div class='del'>-			(void)readw(streamer_mmio + SISR_RUM);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		else if (sisr &amp; SISR_ADAPTER_CHECK) {</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter Check Interrupt Raised, 8 bytes of information follow:\n", dev-&gt;name);</div><div class='del'>-			writel(readl(streamer_mmio + LAPWWO), streamer_mmio + LAPA);</div><div class='del'>-			printk(KERN_WARNING "%s: Words %x:%x:%x:%x:\n",</div><div class='del'>-			       dev-&gt;name, readw(streamer_mmio + LAPDINC),</div><div class='del'>-			       ntohs(readw(streamer_mmio + LAPDINC)),</div><div class='del'>-			       ntohs(readw(streamer_mmio + LAPDINC)),</div><div class='del'>-			       ntohs(readw(streamer_mmio + LAPDINC)));</div><div class='del'>-			netif_stop_queue(dev);</div><div class='del'>-			netif_carrier_off(dev);</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter must be manually reset.\n", dev-&gt;name);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* SISR_ADAPTER_CHECK */</div><div class='del'>-		else if (sisr &amp; SISR_ASB_FREE) {</div><div class='del'>-			/* Wake up anything that is waiting for the asb response */</div><div class='del'>-			if (streamer_priv-&gt;asb_queued) {</div><div class='del'>-				streamer_asb_bh(dev);</div><div class='del'>-			}</div><div class='del'>-			writew(~SISR_ASB_FREE, streamer_mmio + SISR_RUM);</div><div class='del'>-			(void)readw(streamer_mmio + SISR_RUM);</div><div class='del'>-		}</div><div class='del'>-		/* SISR_ASB_FREE */</div><div class='del'>-		else if (sisr &amp; SISR_ARB_CMD) {</div><div class='del'>-			streamer_arb_cmd(dev);</div><div class='del'>-			writew(~SISR_ARB_CMD, streamer_mmio + SISR_RUM);</div><div class='del'>-			(void)readw(streamer_mmio + SISR_RUM);</div><div class='del'>-		}</div><div class='del'>-		/* SISR_ARB_CMD */</div><div class='del'>-		else if (sisr &amp; SISR_TRB_REPLY) {</div><div class='del'>-			/* Wake up anything that is waiting for the trb response */</div><div class='del'>-			if (streamer_priv-&gt;trb_queued) {</div><div class='del'>-				wake_up_interruptible(&amp;streamer_priv-&gt;</div><div class='del'>-						      trb_wait);</div><div class='del'>-			}</div><div class='del'>-			streamer_priv-&gt;trb_queued = 0;</div><div class='del'>-			writew(~SISR_TRB_REPLY, streamer_mmio + SISR_RUM);</div><div class='del'>-			(void)readw(streamer_mmio + SISR_RUM);</div><div class='del'>-		}</div><div class='del'>-		/* SISR_TRB_REPLY */</div><div class='del'>-</div><div class='del'>-		sisr = readw(streamer_mmio + SISR);</div><div class='del'>-		max_intr--;</div><div class='del'>-	} /* while() */		</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;streamer_priv-&gt;streamer_lock) ; </div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static netdev_tx_t streamer_xmit(struct sk_buff *skb,</div><div class='del'>-				       struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct streamer_private *streamer_priv =</div><div class='del'>-	    netdev_priv(dev);</div><div class='del'>-	__u8 __iomem *streamer_mmio = streamer_priv-&gt;streamer_mmio;</div><div class='del'>-	unsigned long flags ;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;streamer_priv-&gt;streamer_lock, flags);</div><div class='del'>-</div><div class='del'>-	if (streamer_priv-&gt;free_tx_ring_entries) {</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_free].status = 0;</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_free].bufcnt_framelen = 0x00020000 | skb-&gt;len;</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_free].buffer = </div><div class='del'>-			cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, skb-&gt;data, skb-&gt;len, PCI_DMA_TODEVICE));</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_free].rsvd1 = skb-&gt;len;</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_free].rsvd2 = 0;</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_free].rsvd3 = 0;</div><div class='del'>-		streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_free].buflen = skb-&gt;len;</div><div class='del'>-</div><div class='del'>-		streamer_priv-&gt;tx_ring_skb[streamer_priv-&gt;tx_ring_free] = skb;</div><div class='del'>-		streamer_priv-&gt;free_tx_ring_entries--;</div><div class='del'>-#if STREAMER_DEBUG_PACKETS</div><div class='del'>-		{</div><div class='del'>-			int i;</div><div class='del'>-			printk("streamer_xmit packet print:\n");</div><div class='del'>-			for (i = 0; i &lt; skb-&gt;len; i++) {</div><div class='del'>-				printk("%x:", skb-&gt;data[i]);</div><div class='del'>-				if (((i + 1) % 16) == 0)</div><div class='del'>-					printk("\n");</div><div class='del'>-			}</div><div class='del'>-			printk("\n");</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		writel(cpu_to_le32(pci_map_single(streamer_priv-&gt;pci_dev, </div><div class='del'>-					&amp;streamer_priv-&gt;streamer_tx_ring[streamer_priv-&gt;tx_ring_free],</div><div class='del'>-					sizeof(struct streamer_tx_desc), PCI_DMA_TODEVICE)),</div><div class='del'>-			streamer_mmio + TX2LFDA);</div><div class='del'>-		(void)readl(streamer_mmio + TX2LFDA);</div><div class='del'>-</div><div class='del'>-		streamer_priv-&gt;tx_ring_free = (streamer_priv-&gt;tx_ring_free + 1) &amp; (STREAMER_TX_RING_SIZE - 1);</div><div class='del'>-		spin_unlock_irqrestore(&amp;streamer_priv-&gt;streamer_lock,flags);</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-	} else {</div><div class='del'>-	        netif_stop_queue(dev);</div><div class='del'>-	        spin_unlock_irqrestore(&amp;streamer_priv-&gt;streamer_lock,flags);</div><div class='del'>-		return NETDEV_TX_BUSY;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int streamer_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct streamer_private *streamer_priv =</div><div class='del'>-	    netdev_priv(dev);</div><div class='del'>-	__u8 __iomem *streamer_mmio = streamer_priv-&gt;streamer_mmio;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	netif_carrier_off(dev);</div><div class='del'>-	writew(streamer_priv-&gt;srb, streamer_mmio + LAPA);</div><div class='del'>-	writew(htons(SRB_CLOSE_ADAPTER &lt;&lt; 8),streamer_mmio+LAPDINC);</div><div class='del'>-	writew(htons(STREAMER_CLEAR_RET_CODE &lt;&lt; 8), streamer_mmio+LAPDINC);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;streamer_priv-&gt;streamer_lock, flags);</div><div class='del'>-</div><div class='del'>-	streamer_priv-&gt;srb_queued = 1;</div><div class='del'>-	writew(LISR_SRB_CMD, streamer_mmio + LISR_SUM);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;streamer_priv-&gt;streamer_lock, flags);</div><div class='del'>-</div><div class='del'>-	while (streamer_priv-&gt;srb_queued) </div><div class='del'>-	{</div><div class='del'>-		interruptible_sleep_on_timeout(&amp;streamer_priv-&gt;srb_wait,</div><div class='del'>-					       jiffies + 60 * HZ);</div><div class='del'>-		if (signal_pending(current)) </div><div class='del'>-		{</div><div class='del'>-			printk(KERN_WARNING "%s: SRB timed out.\n", dev-&gt;name);</div><div class='del'>-			printk(KERN_WARNING "SISR=%x MISR=%x LISR=%x\n",</div><div class='del'>-			       readw(streamer_mmio + SISR),</div><div class='del'>-			       readw(streamer_mmio + MISR_RUM),</div><div class='del'>-			       readw(streamer_mmio + LISR));</div><div class='del'>-			streamer_priv-&gt;srb_queued = 0;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	streamer_priv-&gt;rx_ring_last_received = (streamer_priv-&gt;rx_ring_last_received + 1) &amp; (STREAMER_RX_RING_SIZE - 1);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; STREAMER_RX_RING_SIZE; i++) {</div><div class='del'>-	        if (streamer_priv-&gt;rx_ring_skb[streamer_priv-&gt;rx_ring_last_received]) {</div><div class='del'>-		        dev_kfree_skb(streamer_priv-&gt;rx_ring_skb[streamer_priv-&gt;rx_ring_last_received]);</div><div class='del'>-		} </div><div class='del'>-		streamer_priv-&gt;rx_ring_last_received = (streamer_priv-&gt;rx_ring_last_received + 1) &amp; (STREAMER_RX_RING_SIZE - 1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* reset tx/rx fifo's and busmaster logic */</div><div class='del'>-</div><div class='del'>-	/* TBD. Add graceful way to reset the LLC channel without doing a soft reset. </div><div class='del'>-	   writel(readl(streamer_mmio+BCTL)|(3&lt;&lt;13),streamer_mmio+BCTL);</div><div class='del'>-	   udelay(1);</div><div class='del'>-	   writel(readl(streamer_mmio+BCTL)&amp;~(3&lt;&lt;13),streamer_mmio+BCTL);</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-	writew(streamer_priv-&gt;srb, streamer_mmio + LAPA);</div><div class='del'>-	printk("srb): ");</div><div class='del'>-	for (i = 0; i &lt; 2; i++) {</div><div class='del'>-		printk("%x ", ntohs(readw(streamer_mmio + LAPDINC)));</div><div class='del'>-	}</div><div class='del'>-	printk("\n");</div><div class='del'>-#endif</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void streamer_set_rx_mode(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct streamer_private *streamer_priv =</div><div class='del'>-	    netdev_priv(dev);</div><div class='del'>-	__u8 __iomem *streamer_mmio = streamer_priv-&gt;streamer_mmio;</div><div class='del'>-	__u8 options = 0;</div><div class='del'>-	struct netdev_hw_addr *ha;</div><div class='del'>-	unsigned char dev_mc_address[5];</div><div class='del'>-</div><div class='del'>-	writel(streamer_priv-&gt;srb, streamer_mmio + LAPA);</div><div class='del'>-	options = streamer_priv-&gt;streamer_copy_all_options;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;flags &amp; IFF_PROMISC)</div><div class='del'>-		options |= (3 &lt;&lt; 5);	/* All LLC and MAC frames, all through the main rx channel */</div><div class='del'>-	else</div><div class='del'>-		options &amp;= ~(3 &lt;&lt; 5);</div><div class='del'>-</div><div class='del'>-	/* Only issue the srb if there is a change in options */</div><div class='del'>-</div><div class='del'>-	if ((options ^ streamer_priv-&gt;streamer_copy_all_options)) </div><div class='del'>-	{</div><div class='del'>-		/* Now to issue the srb command to alter the copy.all.options */</div><div class='del'>-		writew(htons(SRB_MODIFY_RECEIVE_OPTIONS &lt;&lt; 8), streamer_mmio+LAPDINC);</div><div class='del'>-		writew(htons(STREAMER_CLEAR_RET_CODE &lt;&lt; 8), streamer_mmio+LAPDINC);</div><div class='del'>-		writew(htons((streamer_priv-&gt;streamer_receive_options &lt;&lt; 8) | options),streamer_mmio+LAPDINC);</div><div class='del'>-		writew(htons(0x4a41),streamer_mmio+LAPDINC);</div><div class='del'>-		writew(htons(0x4d45),streamer_mmio+LAPDINC);</div><div class='del'>-		writew(htons(0x5320),streamer_mmio+LAPDINC);</div><div class='del'>-		writew(0x2020, streamer_mmio + LAPDINC);</div><div class='del'>-</div><div class='del'>-		streamer_priv-&gt;srb_queued = 2;	/* Can't sleep, use srb_bh */</div><div class='del'>-</div><div class='del'>-		writel(LISR_SRB_CMD, streamer_mmio + LISR_SUM);</div><div class='del'>-</div><div class='del'>-		streamer_priv-&gt;streamer_copy_all_options = options;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set the functional addresses we need for multicast */</div><div class='del'>-	writel(streamer_priv-&gt;srb,streamer_mmio+LAPA);</div><div class='del'>-	dev_mc_address[0] = dev_mc_address[1] = dev_mc_address[2] = dev_mc_address[3] = 0 ; </div><div class='del'>-  </div><div class='del'>-	netdev_for_each_mc_addr(ha, dev) {</div><div class='del'>-		dev_mc_address[0] |= ha-&gt;addr[2];</div><div class='del'>-		dev_mc_address[1] |= ha-&gt;addr[3];</div><div class='del'>-		dev_mc_address[2] |= ha-&gt;addr[4];</div><div class='del'>-		dev_mc_address[3] |= ha-&gt;addr[5];</div><div class='del'>-	}</div><div class='del'>-  </div><div class='del'>-	writew(htons(SRB_SET_FUNC_ADDRESS &lt;&lt; 8),streamer_mmio+LAPDINC);</div><div class='del'>-	writew(htons(STREAMER_CLEAR_RET_CODE &lt;&lt; 8), streamer_mmio+LAPDINC);</div><div class='del'>-	writew(0,streamer_mmio+LAPDINC);</div><div class='del'>-	writew(htons( (dev_mc_address[0] &lt;&lt; 8) | dev_mc_address[1]),streamer_mmio+LAPDINC);</div><div class='del'>-	writew(htons( (dev_mc_address[2] &lt;&lt; 8) | dev_mc_address[3]),streamer_mmio+LAPDINC);</div><div class='del'>-	streamer_priv-&gt;srb_queued = 2 ; </div><div class='del'>-	writel(LISR_SRB_CMD,streamer_mmio+LISR_SUM);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void streamer_srb_bh(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct streamer_private *streamer_priv = netdev_priv(dev);</div><div class='del'>-	__u8 __iomem *streamer_mmio = streamer_priv-&gt;streamer_mmio;</div><div class='del'>-	__u16 srb_word;</div><div class='del'>-</div><div class='del'>-	writew(streamer_priv-&gt;srb, streamer_mmio + LAPA);</div><div class='del'>-	srb_word=ntohs(readw(streamer_mmio+LAPDINC)) &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-	switch (srb_word) {</div><div class='del'>-</div><div class='del'>-		/* SRB_MODIFY_RECEIVE_OPTIONS i.e. set_multicast_list options (promiscuous) </div><div class='del'>-		 * At some point we should do something if we get an error, such as</div><div class='del'>-		 * resetting the IFF_PROMISC flag in dev</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-	case SRB_MODIFY_RECEIVE_OPTIONS:</div><div class='del'>-	        srb_word=ntohs(readw(streamer_mmio+LAPDINC)) &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-		switch (srb_word) {</div><div class='del'>-		case 0x01:</div><div class='del'>-			printk(KERN_WARNING "%s: Unrecognized srb command\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x04:</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			if (streamer_priv-&gt;streamer_message_level)</div><div class='del'>-				printk(KERN_WARNING "%s: Receive Options Modified to %x,%x\n",</div><div class='del'>-				       dev-&gt;name,</div><div class='del'>-				       streamer_priv-&gt;streamer_copy_all_options,</div><div class='del'>-				       streamer_priv-&gt;streamer_receive_options);</div><div class='del'>-			break;</div><div class='del'>-		}		/* switch srb[2] */</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		/* SRB_SET_GROUP_ADDRESS - Multicast group setting </div><div class='del'>-		 */</div><div class='del'>-	case SRB_SET_GROUP_ADDRESS:</div><div class='del'>-	        srb_word=ntohs(readw(streamer_mmio+LAPDINC)) &gt;&gt; 8;</div><div class='del'>-		switch (srb_word) {</div><div class='del'>-		case 0x00:</div><div class='del'>-		        break;</div><div class='del'>-		case 0x01:</div><div class='del'>-			printk(KERN_WARNING "%s: Unrecognized srb command\n",dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x04:</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x3c:</div><div class='del'>-			printk(KERN_WARNING "%s: Group/Functional address indicator bits not set correctly\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x3e:	/* If we ever implement individual multicast addresses, will need to deal with this */</div><div class='del'>-			printk(KERN_WARNING "%s: Group address registers full\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x55:</div><div class='del'>-			printk(KERN_INFO "%s: Group Address already set.\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}		/* switch srb[2] */</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		/* SRB_RESET_GROUP_ADDRESS - Remove a multicast address from group list</div><div class='del'>-		 */</div><div class='del'>-	case SRB_RESET_GROUP_ADDRESS:</div><div class='del'>-	        srb_word=ntohs(readw(streamer_mmio+LAPDINC)) &gt;&gt; 8;</div><div class='del'>-		switch (srb_word) {</div><div class='del'>-		case 0x00:</div><div class='del'>-		        break;</div><div class='del'>-		case 0x01:</div><div class='del'>-			printk(KERN_WARNING "%s: Unrecognized srb command\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x04:</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x39:	/* Must deal with this if individual multicast addresses used */</div><div class='del'>-			printk(KERN_INFO "%s: Group address not found\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}		/* switch srb[2] */</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		/* SRB_SET_FUNC_ADDRESS - Called by the set_rx_mode </div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-	case SRB_SET_FUNC_ADDRESS:</div><div class='del'>-	        srb_word=ntohs(readw(streamer_mmio+LAPDINC)) &gt;&gt; 8;</div><div class='del'>-		switch (srb_word) {</div><div class='del'>-		case 0x00:</div><div class='del'>-			if (streamer_priv-&gt;streamer_message_level)</div><div class='del'>-				printk(KERN_INFO "%s: Functional Address Mask Set\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x01:</div><div class='del'>-			printk(KERN_WARNING "%s: Unrecognized srb command\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x04:</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}		/* switch srb[2] */</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-		/* SRB_READ_LOG - Read and reset the adapter error counters</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-	case SRB_READ_LOG:</div><div class='del'>-	        srb_word=ntohs(readw(streamer_mmio+LAPDINC)) &gt;&gt; 8;</div><div class='del'>-		switch (srb_word) {</div><div class='del'>-		case 0x00:</div><div class='del'>-			{</div><div class='del'>-				int i;</div><div class='del'>-				if (streamer_priv-&gt;streamer_message_level)</div><div class='del'>-					printk(KERN_INFO "%s: Read Log command complete\n", dev-&gt;name);</div><div class='del'>-				printk("Read Log statistics: ");</div><div class='del'>-				writew(streamer_priv-&gt;srb + 6,</div><div class='del'>-				       streamer_mmio + LAPA);</div><div class='del'>-				for (i = 0; i &lt; 5; i++) {</div><div class='del'>-					printk("%x:", ntohs(readw(streamer_mmio + LAPDINC)));</div><div class='del'>-				}</div><div class='del'>-				printk("\n");</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 0x01:</div><div class='del'>-			printk(KERN_WARNING "%s: Unrecognized srb command\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x04:</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		}		/* switch srb[2] */</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-		/* SRB_READ_SR_COUNTERS - Read and reset the source routing bridge related counters */</div><div class='del'>-</div><div class='del'>-	case SRB_READ_SR_COUNTERS:</div><div class='del'>-	        srb_word=ntohs(readw(streamer_mmio+LAPDINC)) &gt;&gt; 8;</div><div class='del'>-		switch (srb_word) {</div><div class='del'>-		case 0x00:</div><div class='del'>-			if (streamer_priv-&gt;streamer_message_level)</div><div class='del'>-				printk(KERN_INFO "%s: Read Source Routing Counters issued\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x01:</div><div class='del'>-			printk(KERN_WARNING "%s: Unrecognized srb command\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x04:</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}		/* switch srb[2] */</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		printk(KERN_WARNING "%s: Unrecognized srb bh return value.\n", dev-&gt;name);</div><div class='del'>-		break;</div><div class='del'>-	}			/* switch srb[0] */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int streamer_set_mac_address(struct net_device *dev, void *addr)</div><div class='del'>-{</div><div class='del'>-	struct sockaddr *saddr = addr;</div><div class='del'>-	struct streamer_private *streamer_priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (netif_running(dev)) </div><div class='del'>-	{</div><div class='del'>-		printk(KERN_WARNING "%s: Cannot set mac/laa address while card is open\n", dev-&gt;name);</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(streamer_priv-&gt;streamer_laa, saddr-&gt;sa_data, dev-&gt;addr_len);</div><div class='del'>-</div><div class='del'>-	if (streamer_priv-&gt;streamer_message_level) {</div><div class='del'>-		printk(KERN_INFO "%s: MAC/LAA Set to  = %x.%x.%x.%x.%x.%x\n",</div><div class='del'>-		       dev-&gt;name, streamer_priv-&gt;streamer_laa[0],</div><div class='del'>-		       streamer_priv-&gt;streamer_laa[1],</div><div class='del'>-		       streamer_priv-&gt;streamer_laa[2],</div><div class='del'>-		       streamer_priv-&gt;streamer_laa[3],</div><div class='del'>-		       streamer_priv-&gt;streamer_laa[4],</div><div class='del'>-		       streamer_priv-&gt;streamer_laa[5]);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void streamer_arb_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct streamer_private *streamer_priv =</div><div class='del'>-	    netdev_priv(dev);</div><div class='del'>-	__u8 __iomem *streamer_mmio = streamer_priv-&gt;streamer_mmio;</div><div class='del'>-	__u8 header_len;</div><div class='del'>-	__u16 frame_len, buffer_len;</div><div class='del'>-	struct sk_buff *mac_frame;</div><div class='del'>-	__u8 frame_data[256];</div><div class='del'>-	__u16 buff_off;</div><div class='del'>-	__u16 lan_status = 0, lan_status_diff;	/* Initialize to stop compiler warning */</div><div class='del'>-	__u8 fdx_prot_error;</div><div class='del'>-	__u16 next_ptr;</div><div class='del'>-	__u16 arb_word;</div><div class='del'>-</div><div class='del'>-#if STREAMER_NETWORK_MONITOR</div><div class='del'>-	struct trh_hdr *mac_hdr;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	writew(streamer_priv-&gt;arb, streamer_mmio + LAPA);</div><div class='del'>-	arb_word=ntohs(readw(streamer_mmio+LAPD)) &gt;&gt; 8;</div><div class='del'>-	</div><div class='del'>-	if (arb_word == ARB_RECEIVE_DATA) {	/* Receive.data, MAC frames */</div><div class='del'>-		writew(streamer_priv-&gt;arb + 6, streamer_mmio + LAPA);</div><div class='del'>-		streamer_priv-&gt;mac_rx_buffer = buff_off = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-		header_len=ntohs(readw(streamer_mmio+LAPDINC)) &gt;&gt; 8; /* 802.5 Token-Ring Header Length */</div><div class='del'>-		frame_len = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-</div><div class='del'>-#if STREAMER_DEBUG</div><div class='del'>-		{</div><div class='del'>-			int i;</div><div class='del'>-			__u16 next;</div><div class='del'>-			__u8 status;</div><div class='del'>-			__u16 len;</div><div class='del'>-</div><div class='del'>-			writew(ntohs(buff_off), streamer_mmio + LAPA);	/*setup window to frame data */</div><div class='del'>-			next = htons(readw(streamer_mmio + LAPDINC));</div><div class='del'>-			status =</div><div class='del'>-			    ntohs(readw(streamer_mmio + LAPDINC)) &amp; 0xff;</div><div class='del'>-			len = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-</div><div class='del'>-			/* print out 1st 14 bytes of frame data */</div><div class='del'>-			for (i = 0; i &lt; 7; i++) {</div><div class='del'>-				printk("Loc %d = %04x\n", i,</div><div class='del'>-				       ntohs(readw</div><div class='del'>-					     (streamer_mmio + LAPDINC)));</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			printk("next %04x, fs %02x, len %04x\n", next,</div><div class='del'>-			       status, len);</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-		if (!(mac_frame = dev_alloc_skb(frame_len))) {</div><div class='del'>-			printk(KERN_WARNING "%s: Memory squeeze, dropping frame.\n",</div><div class='del'>-			       dev-&gt;name);</div><div class='del'>-			goto drop_frame;</div><div class='del'>-		}</div><div class='del'>-		/* Walk the buffer chain, creating the frame */</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			int i;</div><div class='del'>-			__u16 rx_word;</div><div class='del'>-</div><div class='del'>-			writew(htons(buff_off), streamer_mmio + LAPA);	/* setup window to frame data */</div><div class='del'>-			next_ptr = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-			readw(streamer_mmio + LAPDINC);	/* read thru status word */</div><div class='del'>-			buffer_len = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-</div><div class='del'>-			if (buffer_len &gt; 256)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			i = 0;</div><div class='del'>-			while (i &lt; buffer_len) {</div><div class='del'>-				rx_word=ntohs(readw(streamer_mmio+LAPDINC));</div><div class='del'>-				frame_data[i]=rx_word &gt;&gt; 8;</div><div class='del'>-				frame_data[i+1]=rx_word &amp; 0xff;</div><div class='del'>-				i += 2;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			memcpy(skb_put(mac_frame, buffer_len),</div><div class='del'>-				      frame_data, buffer_len);</div><div class='del'>-		} while (next_ptr &amp;&amp; (buff_off = next_ptr));</div><div class='del'>-</div><div class='del'>-		mac_frame-&gt;protocol = tr_type_trans(mac_frame, dev);</div><div class='del'>-#if STREAMER_NETWORK_MONITOR</div><div class='del'>-		printk(KERN_WARNING "%s: Received MAC Frame, details:\n",</div><div class='del'>-		       dev-&gt;name);</div><div class='del'>-		mac_hdr = tr_hdr(mac_frame);</div><div class='del'>-		printk(KERN_WARNING</div><div class='del'>-		       "%s: MAC Frame Dest. Addr: %pM\n",</div><div class='del'>-		       dev-&gt;name, mac_hdr-&gt;daddr);</div><div class='del'>-		printk(KERN_WARNING</div><div class='del'>-		       "%s: MAC Frame Srce. Addr: %pM\n",</div><div class='del'>-		       dev-&gt;name, mac_hdr-&gt;saddr);</div><div class='del'>-#endif</div><div class='del'>-		netif_rx(mac_frame);</div><div class='del'>-</div><div class='del'>-		/* Now tell the card we have dealt with the received frame */</div><div class='del'>-drop_frame:</div><div class='del'>-		/* Set LISR Bit 1 */</div><div class='del'>-		writel(LISR_ARB_FREE, streamer_priv-&gt;streamer_mmio + LISR_SUM);</div><div class='del'>-</div><div class='del'>-		/* Is the ASB free ? */</div><div class='del'>-</div><div class='del'>-		if (!(readl(streamer_priv-&gt;streamer_mmio + SISR) &amp; SISR_ASB_FREE)) </div><div class='del'>-		{</div><div class='del'>-			streamer_priv-&gt;asb_queued = 1;</div><div class='del'>-			writel(LISR_ASB_FREE_REQ, streamer_priv-&gt;streamer_mmio + LISR_SUM);</div><div class='del'>-			return;</div><div class='del'>-			/* Drop out and wait for the bottom half to be run */</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		writew(streamer_priv-&gt;asb, streamer_mmio + LAPA);</div><div class='del'>-		writew(htons(ASB_RECEIVE_DATA &lt;&lt; 8), streamer_mmio+LAPDINC);</div><div class='del'>-		writew(htons(STREAMER_CLEAR_RET_CODE &lt;&lt; 8), streamer_mmio+LAPDINC);</div><div class='del'>-		writew(0, streamer_mmio + LAPDINC);</div><div class='del'>-		writew(htons(streamer_priv-&gt;mac_rx_buffer), streamer_mmio + LAPD);</div><div class='del'>-</div><div class='del'>-		writel(LISR_ASB_REPLY | LISR_ASB_FREE_REQ, streamer_priv-&gt;streamer_mmio + LISR_SUM);</div><div class='del'>-</div><div class='del'>-		streamer_priv-&gt;asb_queued = 2;</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	} else if (arb_word == ARB_LAN_CHANGE_STATUS) {	/* Lan.change.status */</div><div class='del'>-		writew(streamer_priv-&gt;arb + 6, streamer_mmio + LAPA);</div><div class='del'>-		lan_status = ntohs(readw(streamer_mmio + LAPDINC));</div><div class='del'>-		fdx_prot_error = ntohs(readw(streamer_mmio+LAPD)) &gt;&gt; 8;</div><div class='del'>-		</div><div class='del'>-		/* Issue ARB Free */</div><div class='del'>-		writew(LISR_ARB_FREE, streamer_priv-&gt;streamer_mmio + LISR_SUM);</div><div class='del'>-</div><div class='del'>-		lan_status_diff = (streamer_priv-&gt;streamer_lan_status ^ lan_status) &amp; </div><div class='del'>-		    lan_status; </div><div class='del'>-</div><div class='del'>-		if (lan_status_diff &amp; (LSC_LWF | LSC_ARW | LSC_FPE | LSC_RR)) </div><div class='del'>-		{</div><div class='del'>-			if (lan_status_diff &amp; LSC_LWF)</div><div class='del'>-				printk(KERN_WARNING "%s: Short circuit detected on the lobe\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_ARW)</div><div class='del'>-				printk(KERN_WARNING "%s: Auto removal error\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_FPE)</div><div class='del'>-				printk(KERN_WARNING "%s: FDX Protocol Error\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_RR)</div><div class='del'>-				printk(KERN_WARNING "%s: Force remove MAC frame received\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-			/* Adapter has been closed by the hardware */</div><div class='del'>-</div><div class='del'>-			/* reset tx/rx fifo's and busmaster logic */</div><div class='del'>-</div><div class='del'>-			/* @TBD. no llc reset on autostreamer writel(readl(streamer_mmio+BCTL)|(3&lt;&lt;13),streamer_mmio+BCTL);</div><div class='del'>-			   udelay(1);</div><div class='del'>-			   writel(readl(streamer_mmio+BCTL)&amp;~(3&lt;&lt;13),streamer_mmio+BCTL); */</div><div class='del'>-</div><div class='del'>-			netif_stop_queue(dev);</div><div class='del'>-			netif_carrier_off(dev);</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter must be manually reset.\n", dev-&gt;name);</div><div class='del'>-		}</div><div class='del'>-		/* If serious error */</div><div class='del'>-		if (streamer_priv-&gt;streamer_message_level) {</div><div class='del'>-			if (lan_status_diff &amp; LSC_SIG_LOSS)</div><div class='del'>-				printk(KERN_WARNING "%s: No receive signal detected\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_HARD_ERR) </div><div class='del'>-				printk(KERN_INFO "%s: Beaconing\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_SOFT_ERR)</div><div class='del'>-				printk(KERN_WARNING "%s: Adapter transmitted Soft Error Report Mac Frame\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_TRAN_BCN)</div><div class='del'>-				printk(KERN_INFO "%s: We are transmitting the beacon, aaah\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_SS)</div><div class='del'>-				printk(KERN_INFO "%s: Single Station on the ring\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_RING_REC)</div><div class='del'>-				printk(KERN_INFO "%s: Ring recovery ongoing\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_FDX_MODE)</div><div class='del'>-				printk(KERN_INFO "%s: Operating in FDX mode\n", dev-&gt;name);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (lan_status_diff &amp; LSC_CO) {</div><div class='del'>-			if (streamer_priv-&gt;streamer_message_level)</div><div class='del'>-				printk(KERN_INFO "%s: Counter Overflow\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-			/* Issue READ.LOG command */</div><div class='del'>-</div><div class='del'>-			writew(streamer_priv-&gt;srb, streamer_mmio + LAPA);</div><div class='del'>-			writew(htons(SRB_READ_LOG &lt;&lt; 8),streamer_mmio+LAPDINC);</div><div class='del'>-			writew(htons(STREAMER_CLEAR_RET_CODE &lt;&lt; 8), streamer_mmio+LAPDINC);</div><div class='del'>-			writew(0, streamer_mmio + LAPDINC);</div><div class='del'>-			streamer_priv-&gt;srb_queued = 2;	/* Can't sleep, use srb_bh */</div><div class='del'>-</div><div class='del'>-			writew(LISR_SRB_CMD, streamer_mmio + LISR_SUM);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (lan_status_diff &amp; LSC_SR_CO) {</div><div class='del'>-			if (streamer_priv-&gt;streamer_message_level)</div><div class='del'>-				printk(KERN_INFO "%s: Source routing counters overflow\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-			/* Issue a READ.SR.COUNTERS */</div><div class='del'>-			writew(streamer_priv-&gt;srb, streamer_mmio + LAPA);</div><div class='del'>-			writew(htons(SRB_READ_SR_COUNTERS &lt;&lt; 8),</div><div class='del'>-			       streamer_mmio+LAPDINC);</div><div class='del'>-			writew(htons(STREAMER_CLEAR_RET_CODE &lt;&lt; 8),</div><div class='del'>-			       streamer_mmio+LAPDINC);</div><div class='del'>-			streamer_priv-&gt;srb_queued = 2;	/* Can't sleep, use srb_bh */</div><div class='del'>-			writew(LISR_SRB_CMD, streamer_mmio + LISR_SUM);</div><div class='del'>-</div><div class='del'>-		}</div><div class='del'>-		streamer_priv-&gt;streamer_lan_status = lan_status;</div><div class='del'>-	} /* Lan.change.status */</div><div class='del'>-	else</div><div class='del'>-		printk(KERN_WARNING "%s: Unknown arb command\n", dev-&gt;name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void streamer_asb_bh(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct streamer_private *streamer_priv =</div><div class='del'>-	    netdev_priv(dev);</div><div class='del'>-	__u8 __iomem *streamer_mmio = streamer_priv-&gt;streamer_mmio;</div><div class='del'>-</div><div class='del'>-	if (streamer_priv-&gt;asb_queued == 1) </div><div class='del'>-	{</div><div class='del'>-		/* Dropped through the first time */</div><div class='del'>-</div><div class='del'>-		writew(streamer_priv-&gt;asb, streamer_mmio + LAPA);</div><div class='del'>-		writew(htons(ASB_RECEIVE_DATA &lt;&lt; 8),streamer_mmio+LAPDINC);</div><div class='del'>-		writew(htons(STREAMER_CLEAR_RET_CODE &lt;&lt; 8), streamer_mmio+LAPDINC);</div><div class='del'>-		writew(0, streamer_mmio + LAPDINC);</div><div class='del'>-		writew(htons(streamer_priv-&gt;mac_rx_buffer), streamer_mmio + LAPD);</div><div class='del'>-</div><div class='del'>-		writel(LISR_ASB_REPLY | LISR_ASB_FREE_REQ, streamer_priv-&gt;streamer_mmio + LISR_SUM);</div><div class='del'>-		streamer_priv-&gt;asb_queued = 2;</div><div class='del'>-</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (streamer_priv-&gt;asb_queued == 2) {</div><div class='del'>-		__u8 rc;</div><div class='del'>-		writew(streamer_priv-&gt;asb + 2, streamer_mmio + LAPA);</div><div class='del'>-		rc=ntohs(readw(streamer_mmio+LAPD)) &gt;&gt; 8;</div><div class='del'>-		switch (rc) {</div><div class='del'>-		case 0x01:</div><div class='del'>-			printk(KERN_WARNING "%s: Unrecognized command code\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0x26:</div><div class='del'>-			printk(KERN_WARNING "%s: Unrecognized buffer address\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		case 0xFF:</div><div class='del'>-			/* Valid response, everything should be ok again */</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			printk(KERN_WARNING "%s: Invalid return code in asb\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	streamer_priv-&gt;asb_queued = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int streamer_change_mtu(struct net_device *dev, int mtu)</div><div class='del'>-{</div><div class='del'>-	struct streamer_private *streamer_priv =</div><div class='del'>-	    netdev_priv(dev);</div><div class='del'>-	__u16 max_mtu;</div><div class='del'>-</div><div class='del'>-	if (streamer_priv-&gt;streamer_ring_speed == 4)</div><div class='del'>-		max_mtu = 4500;</div><div class='del'>-	else</div><div class='del'>-		max_mtu = 18000;</div><div class='del'>-</div><div class='del'>-	if (mtu &gt; max_mtu)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (mtu &lt; 100)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	dev-&gt;mtu = mtu;</div><div class='del'>-	streamer_priv-&gt;pkt_buf_sz = mtu + TR_HLEN;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#if STREAMER_NETWORK_MONITOR</div><div class='del'>-#ifdef CONFIG_PROC_FS</div><div class='del'>-static int streamer_proc_info(char *buffer, char **start, off_t offset,</div><div class='del'>-			      int length, int *eof, void *data)</div><div class='del'>-{</div><div class='del'>-  struct streamer_private *sdev=NULL;</div><div class='del'>-	struct pci_dev *pci_device = NULL;</div><div class='del'>-	int len = 0;</div><div class='del'>-	off_t begin = 0;</div><div class='del'>-	off_t pos = 0;</div><div class='del'>-	int size;</div><div class='del'>-</div><div class='del'>-  struct net_device *dev;</div><div class='del'>-</div><div class='del'>-	size = sprintf(buffer, "IBM LanStreamer/MPC Chipset Token Ring Adapters\n");</div><div class='del'>-</div><div class='del'>-	pos += size;</div><div class='del'>-	len += size;</div><div class='del'>-</div><div class='del'>-  for(sdev=dev_streamer; sdev; sdev=sdev-&gt;next) {</div><div class='del'>-    pci_device=sdev-&gt;pci_dev;</div><div class='del'>-    dev=pci_get_drvdata(pci_device);</div><div class='del'>-</div><div class='del'>-				size = sprintf_info(buffer + len, dev);</div><div class='del'>-				len += size;</div><div class='del'>-				pos = begin + len;</div><div class='del'>-</div><div class='del'>-				if (pos &lt; offset) {</div><div class='del'>-					len = 0;</div><div class='del'>-					begin = pos;</div><div class='del'>-				}</div><div class='del'>-				if (pos &gt; offset + length)</div><div class='del'>-					break;</div><div class='del'>-		}		/* for */</div><div class='del'>-</div><div class='del'>-	*start = buffer + (offset - begin);	/* Start of wanted data */</div><div class='del'>-	len -= (offset - begin);	/* Start slop */</div><div class='del'>-	if (len &gt; length)</div><div class='del'>-		len = length;	/* Ending slop */</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sprintf_info(char *buffer, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct streamer_private *streamer_priv =</div><div class='del'>-	    netdev_priv(dev);</div><div class='del'>-	__u8 __iomem *streamer_mmio = streamer_priv-&gt;streamer_mmio;</div><div class='del'>-	struct streamer_adapter_addr_table sat;</div><div class='del'>-	struct streamer_parameters_table spt;</div><div class='del'>-	int size = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	writew(streamer_priv-&gt;streamer_addr_table_addr, streamer_mmio + LAPA);</div><div class='del'>-	for (i = 0; i &lt; 14; i += 2) {</div><div class='del'>-		__u16 io_word;</div><div class='del'>-		__u8 *datap = (__u8 *) &amp; sat;</div><div class='del'>-		io_word=ntohs(readw(streamer_mmio+LAPDINC));</div><div class='del'>-		datap[size]=io_word &gt;&gt; 8;</div><div class='del'>-		datap[size+1]=io_word &amp; 0xff;</div><div class='del'>-	}</div><div class='del'>-	writew(streamer_priv-&gt;streamer_parms_addr, streamer_mmio + LAPA);</div><div class='del'>-	for (i = 0; i &lt; 68; i += 2) {</div><div class='del'>-		__u16 io_word;</div><div class='del'>-		__u8 *datap = (__u8 *) &amp; spt;</div><div class='del'>-		io_word=ntohs(readw(streamer_mmio+LAPDINC));</div><div class='del'>-		datap[size]=io_word &gt;&gt; 8;</div><div class='del'>-		datap[size+1]=io_word &amp; 0xff;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	size = sprintf(buffer, "\n%6s: Adapter Address   : Node Address      : Functional Addr\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	size += sprintf(buffer + size,</div><div class='del'>-			"%6s: %pM : %pM : %02x:%02x:%02x:%02x\n",</div><div class='del'>-			dev-&gt;name, dev-&gt;dev_addr, sat.node_addr,</div><div class='del'>-			sat.func_addr[0], sat.func_addr[1],</div><div class='del'>-			sat.func_addr[2], sat.func_addr[3]);</div><div class='del'>-</div><div class='del'>-	size += sprintf(buffer + size, "\n%6s: Token Ring Parameters Table:\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	size += sprintf(buffer + size, "%6s: Physical Addr : Up Node Address   : Poll Address      : AccPri : Auth Src : Att Code :\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	size += sprintf(buffer + size,</div><div class='del'>-		    "%6s: %02x:%02x:%02x:%02x   : %pM : %pM : %04x   : %04x     :  %04x    :\n",</div><div class='del'>-		    dev-&gt;name, spt.phys_addr[0], spt.phys_addr[1],</div><div class='del'>-		    spt.phys_addr[2], spt.phys_addr[3],</div><div class='del'>-		    spt.up_node_addr, spt.poll_addr,</div><div class='del'>-		    ntohs(spt.acc_priority), ntohs(spt.auth_source_class),</div><div class='del'>-		    ntohs(spt.att_code));</div><div class='del'>-</div><div class='del'>-	size += sprintf(buffer + size, "%6s: Source Address    : Bcn T : Maj. V : Lan St : Lcl Rg : Mon Err : Frame Correl : \n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	size += sprintf(buffer + size,</div><div class='del'>-		    "%6s: %pM : %04x  : %04x   : %04x   : %04x   : %04x    :     %04x     : \n",</div><div class='del'>-		    dev-&gt;name, spt.source_addr,</div><div class='del'>-		    ntohs(spt.beacon_type), ntohs(spt.major_vector),</div><div class='del'>-		    ntohs(spt.lan_status), ntohs(spt.local_ring),</div><div class='del'>-		    ntohs(spt.mon_error), ntohs(spt.frame_correl));</div><div class='del'>-</div><div class='del'>-	size += sprintf(buffer + size, "%6s: Beacon Details :  Tx  :  Rx  : NAUN Node Address : NAUN Node Phys : \n",</div><div class='del'>-		    dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	size += sprintf(buffer + size,</div><div class='del'>-		    "%6s:                :  %02x  :  %02x  : %pM : %02x:%02x:%02x:%02x    : \n",</div><div class='del'>-		    dev-&gt;name, ntohs(spt.beacon_transmit),</div><div class='del'>-		    ntohs(spt.beacon_receive),</div><div class='del'>-		    spt.beacon_naun,</div><div class='del'>-		    spt.beacon_phys[0], spt.beacon_phys[1],</div><div class='del'>-		    spt.beacon_phys[2], spt.beacon_phys[3]);</div><div class='del'>-	return size;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static struct pci_driver streamer_pci_driver = {</div><div class='del'>-  .name     = "lanstreamer",</div><div class='del'>-  .id_table = streamer_pci_tbl,</div><div class='del'>-  .probe    = streamer_init_one,</div><div class='del'>-  .remove   = __devexit_p(streamer_remove_one),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init streamer_init_module(void) {</div><div class='del'>-  return pci_register_driver(&amp;streamer_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit streamer_cleanup_module(void) {</div><div class='del'>-  pci_unregister_driver(&amp;streamer_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(streamer_init_module);</div><div class='del'>-module_exit(streamer_cleanup_module);</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/tokenring/lanstreamer.h b/drivers/net/tokenring/lanstreamer.h<br/>deleted file mode 100644<br/>index 3c58d6a3fbc9..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/lanstreamer.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/lanstreamer.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,343 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *   lanstreamer.h -- driver for the IBM Auto LANStreamer PCI Adapter</div><div class='del'>- *</div><div class='del'>- *  Written By: Mike Sullivan, IBM Corporation</div><div class='del'>- *</div><div class='del'>- *  Copyright (C) 1999 IBM Corporation</div><div class='del'>- *</div><div class='del'>- *  Linux driver for IBM PCI tokenring cards based on the LanStreamer MPC</div><div class='del'>- *  chipset. </div><div class='del'>- *</div><div class='del'>- *  This driver is based on the olympic driver for IBM PCI TokenRing cards (Pit/Pit-Phy/Olympic</div><div class='del'>- *  chipsets) written  by:</div><div class='del'>- *      1999 Peter De Schrijver All Rights Reserved</div><div class='del'>- *	1999 Mike Phillips (phillim@amtrak.com)</div><div class='del'>- *</div><div class='del'>- *  Base Driver Skeleton:</div><div class='del'>- *      Written 1993-94 by Donald Becker.</div><div class='del'>- *</div><div class='del'>- *      Copyright 1993 United States Government as represented by the</div><div class='del'>- *      Director, National Security Agency.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify      </div><div class='del'>- * it under the terms of the GNU General Public License as published by      </div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or         </div><div class='del'>- * (at your option) any later version.                                       </div><div class='del'>- *                                                                           </div><div class='del'>- * This program is distributed in the hope that it will be useful,           </div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of            </div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the             </div><div class='del'>- * GNU General Public License for more details.                              </div><div class='del'>- *                                                                           </div><div class='del'>- * NO WARRANTY                                                               </div><div class='del'>- * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR        </div><div class='del'>- * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT      </div><div class='del'>- * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,      </div><div class='del'>- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is    </div><div class='del'>- * solely responsible for determining the appropriateness of using and       </div><div class='del'>- * distributing the Program and assumes all risks associated with its        </div><div class='del'>- * exercise of rights under this Agreement, including but not limited to     </div><div class='del'>- * the risks and costs of program errors, damage to or loss of data,         </div><div class='del'>- * programs or equipment, and unavailability or interruption of operations.  </div><div class='del'>- *                                                                           </div><div class='del'>- * DISCLAIMER OF LIABILITY                                                   </div><div class='del'>- * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY   </div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL        </div><div class='del'>- * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND   </div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR     </div><div class='del'>- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE    </div><div class='del'>- * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED  </div><div class='del'>- * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES             </div><div class='del'>- *                                                                           </div><div class='del'>- * You should have received a copy of the GNU General Public License         </div><div class='del'>- * along with this program; if not, write to the Free Software               </div><div class='del'>- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA </div><div class='del'>- *                                                                           </div><div class='del'>- * </div><div class='del'>- *  12/10/99 - Alpha Release 0.1.0</div><div class='del'>- *            First release to the public</div><div class='del'>- *  08/15/01 - Added ioctl() definitions and others - Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* MAX_INTR - the maximum number of times we can loop</div><div class='del'>- * inside the interrupt function before returning</div><div class='del'>- * control to the OS (maximum value is 256)</div><div class='del'>- */</div><div class='del'>-#define MAX_INTR 5</div><div class='del'>-</div><div class='del'>-#define CLS 0x0C</div><div class='del'>-#define MLR 0x86</div><div class='del'>-#define LTR 0x0D</div><div class='del'>-</div><div class='del'>-#define BCTL 0x60</div><div class='del'>-#define BCTL_SOFTRESET (1&lt;&lt;15)</div><div class='del'>-#define BCTL_RX_FIFO_8 (1&lt;&lt;1)</div><div class='del'>-#define BCTL_TX_FIFO_8 (1&lt;&lt;3)</div><div class='del'>-</div><div class='del'>-#define GPR 0x4a</div><div class='del'>-#define GPR_AUTOSENSE (1&lt;&lt;2)</div><div class='del'>-#define GPR_16MBPS (1&lt;&lt;3)</div><div class='del'>-</div><div class='del'>-#define LISR 0x10</div><div class='del'>-#define LISR_SUM 0x12</div><div class='del'>-#define LISR_RUM 0x14</div><div class='del'>-</div><div class='del'>-#define LISR_LIE (1&lt;&lt;15)</div><div class='del'>-#define LISR_SLIM (1&lt;&lt;13)</div><div class='del'>-#define LISR_SLI (1&lt;&lt;12)</div><div class='del'>-#define LISR_BPEI (1&lt;&lt;9)</div><div class='del'>-#define LISR_BPE (1&lt;&lt;8)</div><div class='del'>-#define LISR_SRB_CMD (1&lt;&lt;5)</div><div class='del'>-#define LISR_ASB_REPLY (1&lt;&lt;4)</div><div class='del'>-#define LISR_ASB_FREE_REQ (1&lt;&lt;2)</div><div class='del'>-#define LISR_ARB_FREE (1&lt;&lt;1)</div><div class='del'>-#define LISR_TRB_FRAME (1&lt;&lt;0)</div><div class='del'>-</div><div class='del'>-#define SISR 0x16</div><div class='del'>-#define SISR_SUM 0x18</div><div class='del'>-#define SISR_RUM 0x1A</div><div class='del'>-#define SISR_MASK 0x54</div><div class='del'>-#define SISR_MASK_SUM 0x56</div><div class='del'>-#define SISR_MASK_RUM 0x58</div><div class='del'>-</div><div class='del'>-#define SISR_MI (1&lt;&lt;15)</div><div class='del'>-#define SISR_SERR_ERR (1&lt;&lt;14)</div><div class='del'>-#define SISR_TIMER (1&lt;&lt;11)</div><div class='del'>-#define SISR_LAP_PAR_ERR (1&lt;&lt;10)</div><div class='del'>-#define SISR_LAP_ACC_ERR (1&lt;&lt;9)</div><div class='del'>-#define SISR_PAR_ERR (1&lt;&lt;8)</div><div class='del'>-#define SISR_ADAPTER_CHECK (1&lt;&lt;6)</div><div class='del'>-#define SISR_SRB_REPLY (1&lt;&lt;5)</div><div class='del'>-#define SISR_ASB_FREE (1&lt;&lt;4)</div><div class='del'>-#define SISR_ARB_CMD (1&lt;&lt;3)</div><div class='del'>-#define SISR_TRB_REPLY (1&lt;&lt;2)</div><div class='del'>-</div><div class='del'>-#define MISR_RUM 0x5A</div><div class='del'>-#define MISR_MASK 0x5C</div><div class='del'>-#define MISR_MASK_RUM 0x5E</div><div class='del'>-</div><div class='del'>-#define MISR_TX2_IDLE (1&lt;&lt;15)</div><div class='del'>-#define MISR_TX2_NO_STATUS (1&lt;&lt;14)</div><div class='del'>-#define MISR_TX2_HALT (1&lt;&lt;13)</div><div class='del'>-#define MISR_TX2_EOF (1&lt;&lt;12)</div><div class='del'>-#define MISR_TX1_IDLE (1&lt;&lt;11)</div><div class='del'>-#define MISR_TX1_NO_STATUS (1&lt;&lt;10)</div><div class='del'>-#define MISR_TX1_HALT (1&lt;&lt;9)</div><div class='del'>-#define MISR_TX1_EOF (1&lt;&lt;8)</div><div class='del'>-#define MISR_RX_NOBUF (1&lt;&lt;5)</div><div class='del'>-#define MISR_RX_EOB (1&lt;&lt;4)</div><div class='del'>-#define MISR_RX_NO_STATUS (1&lt;&lt;2)</div><div class='del'>-#define MISR_RX_HALT (1&lt;&lt;1)</div><div class='del'>-#define MISR_RX_EOF (1&lt;&lt;0)</div><div class='del'>-</div><div class='del'>-#define LAPA 0x62</div><div class='del'>-#define LAPE 0x64</div><div class='del'>-#define LAPD 0x66</div><div class='del'>-#define LAPDINC 0x68</div><div class='del'>-#define LAPWWO 0x6A</div><div class='del'>-#define LAPWWC 0x6C</div><div class='del'>-#define LAPCTL 0x6E</div><div class='del'>-</div><div class='del'>-#define TIMER 0x4E4</div><div class='del'>-</div><div class='del'>-#define BMCTL_SUM 0x50</div><div class='del'>-#define BMCTL_RUM 0x52</div><div class='del'>-#define BMCTL_TX1_DIS (1&lt;&lt;14)</div><div class='del'>-#define BMCTL_TX2_DIS (1&lt;&lt;10)</div><div class='del'>-#define BMCTL_RX_DIS (1&lt;&lt;6)</div><div class='del'>-#define BMCTL_RX_ENABLED  (1&lt;&lt;5)</div><div class='del'>-</div><div class='del'>-#define RXLBDA  0x90</div><div class='del'>-#define RXBDA   0x94</div><div class='del'>-#define RXSTAT  0x98</div><div class='del'>-#define RXDBA   0x9C</div><div class='del'>-</div><div class='del'>-#define TX1LFDA 0xA0</div><div class='del'>-#define TX1FDA  0xA4</div><div class='del'>-#define TX1STAT 0xA8</div><div class='del'>-#define TX1DBA  0xAC</div><div class='del'>-#define TX2LFDA 0xB0</div><div class='del'>-#define TX2FDA  0xB4</div><div class='del'>-#define TX2STAT 0xB8</div><div class='del'>-#define TX2DBA  0xBC</div><div class='del'>-</div><div class='del'>-#define STREAMER_IO_SPACE 256</div><div class='del'>-</div><div class='del'>-#define SRB_COMMAND_SIZE 50</div><div class='del'>-</div><div class='del'>-#define STREAMER_MAX_ADAPTERS 8	/* 0x08 __MODULE_STRING can't hand 0xnn */</div><div class='del'>-</div><div class='del'>-/* Defines for LAN STATUS CHANGE reports */</div><div class='del'>-#define LSC_SIG_LOSS 0x8000</div><div class='del'>-#define LSC_HARD_ERR 0x4000</div><div class='del'>-#define LSC_SOFT_ERR 0x2000</div><div class='del'>-#define LSC_TRAN_BCN 0x1000</div><div class='del'>-#define LSC_LWF      0x0800</div><div class='del'>-#define LSC_ARW      0x0400</div><div class='del'>-#define LSC_FPE      0x0200</div><div class='del'>-#define LSC_RR       0x0100</div><div class='del'>-#define LSC_CO       0x0080</div><div class='del'>-#define LSC_SS       0x0040</div><div class='del'>-#define LSC_RING_REC 0x0020</div><div class='del'>-#define LSC_SR_CO    0x0010</div><div class='del'>-#define LSC_FDX_MODE 0x0004</div><div class='del'>-</div><div class='del'>-/* Defines for OPEN ADAPTER command */</div><div class='del'>-</div><div class='del'>-#define OPEN_ADAPTER_EXT_WRAP (1&lt;&lt;15)</div><div class='del'>-#define OPEN_ADAPTER_DIS_HARDEE (1&lt;&lt;14)</div><div class='del'>-#define OPEN_ADAPTER_DIS_SOFTERR (1&lt;&lt;13)</div><div class='del'>-#define OPEN_ADAPTER_PASS_ADC_MAC (1&lt;&lt;12)</div><div class='del'>-#define OPEN_ADAPTER_PASS_ATT_MAC (1&lt;&lt;11)</div><div class='del'>-#define OPEN_ADAPTER_ENABLE_EC (1&lt;&lt;10)</div><div class='del'>-#define OPEN_ADAPTER_CONTENDER (1&lt;&lt;8)</div><div class='del'>-#define OPEN_ADAPTER_PASS_BEACON (1&lt;&lt;7)</div><div class='del'>-#define OPEN_ADAPTER_ENABLE_FDX (1&lt;&lt;6)</div><div class='del'>-#define OPEN_ADAPTER_ENABLE_RPL (1&lt;&lt;5)</div><div class='del'>-#define OPEN_ADAPTER_INHIBIT_ETR (1&lt;&lt;4)</div><div class='del'>-#define OPEN_ADAPTER_INTERNAL_WRAP (1&lt;&lt;3)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Defines for SRB Commands */</div><div class='del'>-#define SRB_CLOSE_ADAPTER 0x04</div><div class='del'>-#define SRB_CONFIGURE_BRIDGE 0x0c</div><div class='del'>-#define SRB_CONFIGURE_HP_CHANNEL 0x13</div><div class='del'>-#define SRB_MODIFY_BRIDGE_PARMS 0x15</div><div class='del'>-#define SRB_MODIFY_OPEN_OPTIONS 0x01</div><div class='del'>-#define SRB_MODIFY_RECEIVE_OPTIONS 0x17</div><div class='del'>-#define SRB_NO_OPERATION 0x00</div><div class='del'>-#define SRB_OPEN_ADAPTER 0x03</div><div class='del'>-#define SRB_READ_LOG 0x08</div><div class='del'>-#define SRB_READ_SR_COUNTERS 0x16</div><div class='del'>-#define SRB_RESET_GROUP_ADDRESS 0x02</div><div class='del'>-#define SRB_RESET_TARGET_SEGMETN 0x14</div><div class='del'>-#define SRB_SAVE_CONFIGURATION 0x1b</div><div class='del'>-#define SRB_SET_BRIDGE_PARMS 0x09</div><div class='del'>-#define SRB_SET_FUNC_ADDRESS 0x07</div><div class='del'>-#define SRB_SET_GROUP_ADDRESS 0x06</div><div class='del'>-#define SRB_SET_TARGET_SEGMENT 0x05</div><div class='del'>-</div><div class='del'>-/* Clear return code */</div><div class='del'>-#define STREAMER_CLEAR_RET_CODE 0xfe</div><div class='del'>-</div><div class='del'>-/* ARB Commands */</div><div class='del'>-#define ARB_RECEIVE_DATA 0x81</div><div class='del'>-#define ARB_LAN_CHANGE_STATUS 0x84</div><div class='del'>-</div><div class='del'>-/* ASB Response commands */</div><div class='del'>-#define ASB_RECEIVE_DATA 0x81</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Streamer defaults for buffers */</div><div class='del'>-</div><div class='del'>-#define STREAMER_RX_RING_SIZE 16	/* should be a power of 2 */</div><div class='del'>-/* Setting the number of TX descriptors to 1 is a workaround for an</div><div class='del'>- * undocumented hardware problem with the lanstreamer board. Setting</div><div class='del'>- * this to something higher may slightly increase the throughput you</div><div class='del'>- * can get from the card, but at the risk of locking up the box. - </div><div class='del'>- * &lt;yoder1@us.ibm.com&gt;</div><div class='del'>- */</div><div class='del'>-#define STREAMER_TX_RING_SIZE 1	/* should be a power of 2 */</div><div class='del'>-</div><div class='del'>-#define PKT_BUF_SZ 4096		/* Default packet size */</div><div class='del'>-</div><div class='del'>-/* Streamer data structures */</div><div class='del'>-</div><div class='del'>-struct streamer_tx_desc {</div><div class='del'>-	__u32 forward;</div><div class='del'>-	__u32 status;</div><div class='del'>-	__u32 bufcnt_framelen;</div><div class='del'>-	__u32 buffer;</div><div class='del'>-	__u32 buflen;</div><div class='del'>-	__u32 rsvd1;</div><div class='del'>-	__u32 rsvd2;</div><div class='del'>-	__u32 rsvd3;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct streamer_rx_desc {</div><div class='del'>-	__u32 forward;</div><div class='del'>-	__u32 status;</div><div class='del'>-	__u32 buffer;</div><div class='del'>-	__u32 framelen_buflen;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mac_receive_buffer {</div><div class='del'>-	__u16 next;</div><div class='del'>-	__u8 padding;</div><div class='del'>-	__u8 frame_status;</div><div class='del'>-	__u16 buffer_length;</div><div class='del'>-	__u8 frame_data;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct streamer_private {</div><div class='del'>-</div><div class='del'>-	__u16 srb;</div><div class='del'>-	__u16 trb;</div><div class='del'>-	__u16 arb;</div><div class='del'>-	__u16 asb;</div><div class='del'>-</div><div class='del'>-        struct streamer_private *next;</div><div class='del'>-        struct pci_dev *pci_dev;</div><div class='del'>-	__u8 __iomem *streamer_mmio;</div><div class='del'>-        char *streamer_card_name;</div><div class='del'>- </div><div class='del'>-        spinlock_t streamer_lock;</div><div class='del'>-</div><div class='del'>-	volatile int srb_queued;	/* True if an SRB is still posted */</div><div class='del'>-	wait_queue_head_t srb_wait;</div><div class='del'>-</div><div class='del'>-	volatile int asb_queued;	/* True if an ASB is posted */</div><div class='del'>-</div><div class='del'>-	volatile int trb_queued;	/* True if a TRB is posted */</div><div class='del'>-	wait_queue_head_t trb_wait;</div><div class='del'>-</div><div class='del'>-	struct streamer_rx_desc *streamer_rx_ring;</div><div class='del'>-	struct streamer_tx_desc *streamer_tx_ring;</div><div class='del'>-	struct sk_buff *tx_ring_skb[STREAMER_TX_RING_SIZE],</div><div class='del'>-	    *rx_ring_skb[STREAMER_RX_RING_SIZE];</div><div class='del'>-	int tx_ring_free, tx_ring_last_status, rx_ring_last_received,</div><div class='del'>-	    free_tx_ring_entries;</div><div class='del'>-</div><div class='del'>-	__u16 streamer_lan_status;</div><div class='del'>-	__u8 streamer_ring_speed;</div><div class='del'>-	__u16 pkt_buf_sz;</div><div class='del'>-	__u8 streamer_receive_options, streamer_copy_all_options,</div><div class='del'>-	    streamer_message_level;</div><div class='del'>-	__u16 streamer_addr_table_addr, streamer_parms_addr;</div><div class='del'>-	__u16 mac_rx_buffer;</div><div class='del'>-	__u8 streamer_laa[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct streamer_adapter_addr_table {</div><div class='del'>-</div><div class='del'>-	__u8 node_addr[6];</div><div class='del'>-	__u8 reserved[4];</div><div class='del'>-	__u8 func_addr[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct streamer_parameters_table {</div><div class='del'>-</div><div class='del'>-	__u8 phys_addr[4];</div><div class='del'>-	__u8 up_node_addr[6];</div><div class='del'>-	__u8 up_phys_addr[4];</div><div class='del'>-	__u8 poll_addr[6];</div><div class='del'>-	__u16 reserved;</div><div class='del'>-	__u16 acc_priority;</div><div class='del'>-	__u16 auth_source_class;</div><div class='del'>-	__u16 att_code;</div><div class='del'>-	__u8 source_addr[6];</div><div class='del'>-	__u16 beacon_type;</div><div class='del'>-	__u16 major_vector;</div><div class='del'>-	__u16 lan_status;</div><div class='del'>-	__u16 soft_error_time;</div><div class='del'>-	__u16 reserved1;</div><div class='del'>-	__u16 local_ring;</div><div class='del'>-	__u16 mon_error;</div><div class='del'>-	__u16 beacon_transmit;</div><div class='del'>-	__u16 beacon_receive;</div><div class='del'>-	__u16 frame_correl;</div><div class='del'>-	__u8 beacon_naun[6];</div><div class='del'>-	__u32 reserved2;</div><div class='del'>-	__u8 beacon_phys[4];</div><div class='del'>-};</div><div class='head'>diff --git a/drivers/net/tokenring/madgemc.c b/drivers/net/tokenring/madgemc.c<br/>deleted file mode 100644<br/>index 28adcdf3b14c..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/madgemc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/madgemc.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,761 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card.</div><div class='del'>- *</div><div class='del'>- *  Written 2000 by Adam Fritzler</div><div class='del'>- *</div><div class='del'>- *  This software may be used and distributed according to the terms</div><div class='del'>- *  of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- *</div><div class='del'>- *  This driver module supports the following cards:</div><div class='del'>- *      - Madge Smart 16/4 Ringnode MC16</div><div class='del'>- *	- Madge Smart 16/4 Ringnode MC32 (??)</div><div class='del'>- *</div><div class='del'>- *  Maintainer(s):</div><div class='del'>- *    AF	Adam Fritzler</div><div class='del'>- *</div><div class='del'>- *  Modification History:</div><div class='del'>- *	16-Jan-00	AF	Created</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static const char version[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n";</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include "tms380tr.h"</div><div class='del'>-#include "madgemc.h"            /* Madge-specific constants */</div><div class='del'>-</div><div class='del'>-#define MADGEMC_IO_EXTENT 32</div><div class='del'>-#define MADGEMC_SIF_OFFSET 0x08</div><div class='del'>-</div><div class='del'>-struct card_info {</div><div class='del'>-	/*</div><div class='del'>-	 * These are read from the BIA ROM.</div><div class='del'>-	 */</div><div class='del'>-	unsigned int manid;</div><div class='del'>-	unsigned int cardtype;</div><div class='del'>-	unsigned int cardrev;</div><div class='del'>-	unsigned int ramsize;</div><div class='del'>-	</div><div class='del'>-	/*</div><div class='del'>-	 * These are read from the MCA POS registers.  </div><div class='del'>-	 */</div><div class='del'>-	unsigned int burstmode:2;</div><div class='del'>-	unsigned int fairness:1; /* 0 = Fair, 1 = Unfair */</div><div class='del'>-	unsigned int arblevel:4;</div><div class='del'>-	unsigned int ringspeed:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */</div><div class='del'>-	unsigned int cabletype:1; /* 0 = RJ45, 1 = DB9 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int madgemc_open(struct net_device *dev);</div><div class='del'>-static int madgemc_close(struct net_device *dev);</div><div class='del'>-static int madgemc_chipset_init(struct net_device *dev);</div><div class='del'>-static void madgemc_read_rom(struct net_device *dev, struct card_info *card);</div><div class='del'>-static unsigned short madgemc_setnselout_pins(struct net_device *dev);</div><div class='del'>-static void madgemc_setcabletype(struct net_device *dev, int type);</div><div class='del'>-</div><div class='del'>-static int madgemc_mcaproc(char *buf, int slot, void *d);</div><div class='del'>-</div><div class='del'>-static void madgemc_setregpage(struct net_device *dev, int page);</div><div class='del'>-static void madgemc_setsifsel(struct net_device *dev, int val);</div><div class='del'>-static void madgemc_setint(struct net_device *dev, int val);</div><div class='del'>-</div><div class='del'>-static irqreturn_t madgemc_interrupt(int irq, void *dev_id);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * These work around paging, however they don't guarantee you're on the</div><div class='del'>- * right page.</div><div class='del'>- */</div><div class='del'>-#define SIFREADB(reg) (inb(dev-&gt;base_addr + ((reg&lt;0x8)?reg:reg-0x8)))</div><div class='del'>-#define SIFWRITEB(val, reg) (outb(val, dev-&gt;base_addr + ((reg&lt;0x8)?reg:reg-0x8)))</div><div class='del'>-#define SIFREADW(reg) (inw(dev-&gt;base_addr + ((reg&lt;0x8)?reg:reg-0x8)))</div><div class='del'>-#define SIFWRITEW(val, reg) (outw(val, dev-&gt;base_addr + ((reg&lt;0x8)?reg:reg-0x8)))</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Read a byte-length value from the register.</div><div class='del'>- */</div><div class='del'>-static unsigned short madgemc_sifreadb(struct net_device *dev, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	unsigned short ret;</div><div class='del'>-	if (reg&lt;0x8)	</div><div class='del'>-		ret = SIFREADB(reg);</div><div class='del'>-	else {</div><div class='del'>-		madgemc_setregpage(dev, 1);	</div><div class='del'>-		ret = SIFREADB(reg);</div><div class='del'>-		madgemc_setregpage(dev, 0);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Write a byte-length value to a register.</div><div class='del'>- */</div><div class='del'>-static void madgemc_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	if (reg&lt;0x8)</div><div class='del'>-		SIFWRITEB(val, reg);</div><div class='del'>-	else {</div><div class='del'>-		madgemc_setregpage(dev, 1);</div><div class='del'>-		SIFWRITEB(val, reg);</div><div class='del'>-		madgemc_setregpage(dev, 0);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Read a word-length value from a register</div><div class='del'>- */</div><div class='del'>-static unsigned short madgemc_sifreadw(struct net_device *dev, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	unsigned short ret;</div><div class='del'>-	if (reg&lt;0x8)	</div><div class='del'>-		ret = SIFREADW(reg);</div><div class='del'>-	else {</div><div class='del'>-		madgemc_setregpage(dev, 1);	</div><div class='del'>-		ret = SIFREADW(reg);</div><div class='del'>-		madgemc_setregpage(dev, 0);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Write a word-length value to a register.</div><div class='del'>- */</div><div class='del'>-static void madgemc_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	if (reg&lt;0x8)</div><div class='del'>-		SIFWRITEW(val, reg);</div><div class='del'>-	else {</div><div class='del'>-		madgemc_setregpage(dev, 1);</div><div class='del'>-		SIFWRITEW(val, reg);</div><div class='del'>-		madgemc_setregpage(dev, 0);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct net_device_ops madgemc_netdev_ops __read_mostly;</div><div class='del'>-</div><div class='del'>-static int __devinit madgemc_probe(struct device *device)</div><div class='del'>-{	</div><div class='del'>-	static int versionprinted;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct net_local *tp;</div><div class='del'>-	struct card_info *card;</div><div class='del'>-	struct mca_device *mdev = to_mca_device(device);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (versionprinted++ == 0)</div><div class='del'>-		printk("%s", version);</div><div class='del'>-</div><div class='del'>-	if(mca_device_claimed(mdev))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	mca_device_set_claim(mdev, 1);</div><div class='del'>-</div><div class='del'>-	dev = alloc_trdev(sizeof(struct net_local));</div><div class='del'>-	if (!dev) {</div><div class='del'>-		printk("madgemc: unable to allocate dev space\n");</div><div class='del'>-		mca_device_set_claim(mdev, 0);</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto getout;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;madgemc_netdev_ops;</div><div class='del'>-</div><div class='del'>-	card = kmalloc(sizeof(struct card_info), GFP_KERNEL);</div><div class='del'>-	if (card==NULL) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto getout1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Parse configuration information.  This all comes</div><div class='del'>-	 * directly from the publicly available @002d.ADF.</div><div class='del'>-	 * Get it from Madge or your local ADF library.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Base address </div><div class='del'>-	 */</div><div class='del'>-	dev-&gt;base_addr = 0x0a20 + </div><div class='del'>-		((mdev-&gt;pos[2] &amp; MC16_POS2_ADDR2)?0x0400:0) +</div><div class='del'>-		((mdev-&gt;pos[0] &amp; MC16_POS0_ADDR1)?0x1000:0) +</div><div class='del'>-		((mdev-&gt;pos[3] &amp; MC16_POS3_ADDR3)?0x2000:0);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Interrupt line</div><div class='del'>-	 */</div><div class='del'>-	switch(mdev-&gt;pos[0] &gt;&gt; 6) { /* upper two bits */</div><div class='del'>-		case 0x1: dev-&gt;irq = 3; break;</div><div class='del'>-		case 0x2: dev-&gt;irq = 9; break; /* IRQ 2 = IRQ 9 */</div><div class='del'>-		case 0x3: dev-&gt;irq = 10; break;</div><div class='del'>-		default: dev-&gt;irq = 0; break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;irq == 0) {</div><div class='del'>-		printk("%s: invalid IRQ\n", dev-&gt;name);</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto getout2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!request_region(dev-&gt;base_addr, MADGEMC_IO_EXTENT, </div><div class='del'>-			   "madgemc")) {</div><div class='del'>-		printk(KERN_INFO "madgemc: unable to setup Smart MC in slot %d because of I/O base conflict at 0x%04lx\n", mdev-&gt;slot, dev-&gt;base_addr);</div><div class='del'>-		dev-&gt;base_addr += MADGEMC_SIF_OFFSET;</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto getout2;</div><div class='del'>-	}</div><div class='del'>-	dev-&gt;base_addr += MADGEMC_SIF_OFFSET;</div><div class='del'>-	</div><div class='del'>-	/*</div><div class='del'>-	 * Arbitration Level</div><div class='del'>-	 */</div><div class='del'>-	card-&gt;arblevel = ((mdev-&gt;pos[0] &gt;&gt; 1) &amp; 0x7) + 8;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Burst mode and Fairness</div><div class='del'>-	 */</div><div class='del'>-	card-&gt;burstmode = ((mdev-&gt;pos[2] &gt;&gt; 6) &amp; 0x3);</div><div class='del'>-	card-&gt;fairness = ((mdev-&gt;pos[2] &gt;&gt; 4) &amp; 0x1);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Ring Speed</div><div class='del'>-	 */</div><div class='del'>-	if ((mdev-&gt;pos[1] &gt;&gt; 2)&amp;0x1)</div><div class='del'>-		card-&gt;ringspeed = 2; /* not selected */</div><div class='del'>-	else if ((mdev-&gt;pos[2] &gt;&gt; 5) &amp; 0x1)</div><div class='del'>-		card-&gt;ringspeed = 1; /* 16Mb */</div><div class='del'>-	else</div><div class='del'>-		card-&gt;ringspeed = 0; /* 4Mb */</div><div class='del'>-</div><div class='del'>-	/* </div><div class='del'>-	 * Cable type</div><div class='del'>-	 */</div><div class='del'>-	if ((mdev-&gt;pos[1] &gt;&gt; 6)&amp;0x1)</div><div class='del'>-		card-&gt;cabletype = 1; /* STP/DB9 */</div><div class='del'>-	else</div><div class='del'>-		card-&gt;cabletype = 0; /* UTP/RJ-45 */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* </div><div class='del'>-	 * ROM Info. This requires us to actually twiddle</div><div class='del'>-	 * bits on the card, so we must ensure above that </div><div class='del'>-	 * the base address is free of conflict (request_region above).</div><div class='del'>-	 */</div><div class='del'>-	madgemc_read_rom(dev, card);</div><div class='del'>-		</div><div class='del'>-	if (card-&gt;manid != 0x4d) { /* something went wrong */</div><div class='del'>-		printk(KERN_INFO "%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev-&gt;name, card-&gt;manid);</div><div class='del'>-		goto getout3;</div><div class='del'>-	}</div><div class='del'>-		</div><div class='del'>-	if ((card-&gt;cardtype != 0x08) &amp;&amp; (card-&gt;cardtype != 0x0d)) {</div><div class='del'>-		printk(KERN_INFO "%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev-&gt;name, card-&gt;cardtype);</div><div class='del'>-		ret = -EIO;</div><div class='del'>-		goto getout3;</div><div class='del'>-	}</div><div class='del'>-	       </div><div class='del'>-	/* All cards except Rev 0 and 1 MC16's have 256kb of RAM */</div><div class='del'>-	if ((card-&gt;cardtype == 0x08) &amp;&amp; (card-&gt;cardrev &lt;= 0x01))</div><div class='del'>-		card-&gt;ramsize = 128;</div><div class='del'>-	else</div><div class='del'>-		card-&gt;ramsize = 256;</div><div class='del'>-</div><div class='del'>-	printk("%s: %s Rev %d at 0x%04lx IRQ %d\n", </div><div class='del'>-	       dev-&gt;name, </div><div class='del'>-	       (card-&gt;cardtype == 0x08)?MADGEMC16_CARDNAME:</div><div class='del'>-	       MADGEMC32_CARDNAME, card-&gt;cardrev, </div><div class='del'>-	       dev-&gt;base_addr, dev-&gt;irq);</div><div class='del'>-</div><div class='del'>-	if (card-&gt;cardtype == 0x0d)</div><div class='del'>-		printk("%s:     Warning: MC32 support is experimental and highly untested\n", dev-&gt;name);</div><div class='del'>-	</div><div class='del'>-	if (card-&gt;ringspeed==2) { /* Unknown */</div><div class='del'>-		printk("%s:     Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev-&gt;name);</div><div class='del'>-		card-&gt;ringspeed = 1; /* default to 16mb */</div><div class='del'>-	}</div><div class='del'>-		</div><div class='del'>-	printk("%s:     RAM Size: %dKB\n", dev-&gt;name, card-&gt;ramsize);</div><div class='del'>-</div><div class='del'>-	printk("%s:     Ring Speed: %dMb/sec on %s\n", dev-&gt;name, </div><div class='del'>-	       (card-&gt;ringspeed)?16:4, </div><div class='del'>-	       card-&gt;cabletype?"STP/DB9":"UTP/RJ-45");</div><div class='del'>-	printk("%s:     Arbitration Level: %d\n", dev-&gt;name, </div><div class='del'>-	       card-&gt;arblevel);</div><div class='del'>-</div><div class='del'>-	printk("%s:     Burst Mode: ", dev-&gt;name);</div><div class='del'>-	switch(card-&gt;burstmode) {</div><div class='del'>-		case 0: printk("Cycle steal"); break;</div><div class='del'>-		case 1: printk("Limited burst"); break;</div><div class='del'>-		case 2: printk("Delayed release"); break;</div><div class='del'>-		case 3: printk("Immediate release"); break;</div><div class='del'>-	}</div><div class='del'>-	printk(" (%s)\n", (card-&gt;fairness)?"Unfair":"Fair");</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* </div><div class='del'>-	 * Enable SIF before we assign the interrupt handler,</div><div class='del'>-	 * just in case we get spurious interrupts that need</div><div class='del'>-	 * handling.</div><div class='del'>-	 */ </div><div class='del'>-	outb(0, dev-&gt;base_addr + MC_CONTROL_REG0); /* sanity */</div><div class='del'>-	madgemc_setsifsel(dev, 1);</div><div class='del'>-	if (request_irq(dev-&gt;irq, madgemc_interrupt, IRQF_SHARED,</div><div class='del'>-		       "madgemc", dev)) {</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto getout3;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	madgemc_chipset_init(dev); /* enables interrupts! */</div><div class='del'>-	madgemc_setcabletype(dev, card-&gt;cabletype);</div><div class='del'>-</div><div class='del'>-	/* Setup MCA structures */</div><div class='del'>-	mca_device_set_name(mdev, (card-&gt;cardtype == 0x08)?MADGEMC16_CARDNAME:MADGEMC32_CARDNAME);</div><div class='del'>-	mca_set_adapter_procfn(mdev-&gt;slot, madgemc_mcaproc, dev);</div><div class='del'>-</div><div class='del'>-	printk("%s:     Ring Station Address: %pM\n",</div><div class='del'>-	       dev-&gt;name, dev-&gt;dev_addr);</div><div class='del'>-</div><div class='del'>-	if (tmsdev_init(dev, device)) {</div><div class='del'>-		printk("%s: unable to get memory for dev-&gt;priv.\n", </div><div class='del'>-		       dev-&gt;name);</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto getout4;</div><div class='del'>-	}</div><div class='del'>-	tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* </div><div class='del'>-	 * The MC16 is physically a 32bit card.  However, Madge</div><div class='del'>-	 * insists on calling it 16bit, so I'll assume here that</div><div class='del'>-	 * they know what they're talking about.  Cut off DMA</div><div class='del'>-	 * at 16mb.</div><div class='del'>-	 */</div><div class='del'>-	tp-&gt;setnselout = madgemc_setnselout_pins;</div><div class='del'>-	tp-&gt;sifwriteb = madgemc_sifwriteb;</div><div class='del'>-	tp-&gt;sifreadb = madgemc_sifreadb;</div><div class='del'>-	tp-&gt;sifwritew = madgemc_sifwritew;</div><div class='del'>-	tp-&gt;sifreadw = madgemc_sifreadw;</div><div class='del'>-	tp-&gt;DataRate = (card-&gt;ringspeed)?SPEED_16:SPEED_4;</div><div class='del'>-</div><div class='del'>-	memcpy(tp-&gt;ProductID, "Madge MCA 16/4    ", PROD_ID_SIZE + 1);</div><div class='del'>-</div><div class='del'>-	tp-&gt;tmspriv = card;</div><div class='del'>-	dev_set_drvdata(device, dev);</div><div class='del'>-</div><div class='del'>-	if (register_netdev(dev) == 0)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	dev_set_drvdata(device, NULL);</div><div class='del'>-	ret = -ENOMEM;</div><div class='del'>-getout4:</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-getout3:</div><div class='del'>-	release_region(dev-&gt;base_addr-MADGEMC_SIF_OFFSET, </div><div class='del'>-		       MADGEMC_IO_EXTENT); </div><div class='del'>-getout2:</div><div class='del'>-	kfree(card);</div><div class='del'>-getout1:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-getout:</div><div class='del'>-	mca_device_set_claim(mdev, 0);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Handle interrupts generated by the card</div><div class='del'>- *</div><div class='del'>- * The MicroChannel Madge cards need slightly more handling</div><div class='del'>- * after an interrupt than other TMS380 cards do.</div><div class='del'>- *</div><div class='del'>- * First we must make sure it was this card that generated the</div><div class='del'>- * interrupt (since interrupt sharing is allowed).  Then,</div><div class='del'>- * because we're using level-triggered interrupts (as is</div><div class='del'>- * standard on MCA), we must toggle the interrupt line</div><div class='del'>- * on the card in order to claim and acknowledge the interrupt.</div><div class='del'>- * Once that is done, the interrupt should be handlable in</div><div class='del'>- * the normal tms380tr_interrupt() routine.</div><div class='del'>- *</div><div class='del'>- * There's two ways we can check to see if the interrupt is ours,</div><div class='del'>- * both with their own disadvantages...</div><div class='del'>- *</div><div class='del'>- * 1)  	Read in the SIFSTS register from the TMS controller.  This</div><div class='del'>- *	is guaranteed to be accurate, however, there's a fairly</div><div class='del'>- *	large performance penalty for doing so: the Madge chips</div><div class='del'>- *	must request the register from the Eagle, the Eagle must</div><div class='del'>- *	read them from its internal bus, and then take the route</div><div class='del'>- *	back out again, for a 16bit read.  </div><div class='del'>- *</div><div class='del'>- * 2)	Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs.</div><div class='del'>- *	The major disadvantage here is that the accuracy of the</div><div class='del'>- *	bit is in question.  However, it cuts out the extra read</div><div class='del'>- *	cycles it takes to read the Eagle's SIF, as its only an</div><div class='del'>- *	8bit read, and theoretically the Madge bit is directly</div><div class='del'>- *	connected to the interrupt latch coming out of the Eagle</div><div class='del'>- *	hardware (that statement is not verified).  </div><div class='del'>- *</div><div class='del'>- * I can't determine which of these methods has the best win.  For now,</div><div class='del'>- * we make a compromise.  Use the Madge way for the first interrupt,</div><div class='del'>- * which should be the fast-path, and then once we hit the first </div><div class='del'>- * interrupt, keep on trying using the SIF method until we've</div><div class='del'>- * exhausted all contiguous interrupts.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static irqreturn_t madgemc_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	int pending,reg1;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-</div><div class='del'>-	if (!dev_id) {</div><div class='del'>-		printk("madgemc_interrupt: was not passed a dev_id!\n");</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev = dev_id;</div><div class='del'>-</div><div class='del'>-	/* Make sure its really us. -- the Madge way */</div><div class='del'>-	pending = inb(dev-&gt;base_addr + MC_CONTROL_REG0);</div><div class='del'>-	if (!(pending &amp; MC_CONTROL_REG0_SINTR))</div><div class='del'>-		return IRQ_NONE; /* not our interrupt */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Since we're level-triggered, we may miss the rising edge</div><div class='del'>-	 * of the next interrupt while we're off handling this one,</div><div class='del'>-	 * so keep checking until the SIF verifies that it has nothing</div><div class='del'>-	 * left for us to do.</div><div class='del'>-	 */</div><div class='del'>-	pending = STS_SYSTEM_IRQ;</div><div class='del'>-	do {</div><div class='del'>-		if (pending &amp; STS_SYSTEM_IRQ) {</div><div class='del'>-</div><div class='del'>-			/* Toggle the interrupt to reset the latch on card */</div><div class='del'>-			reg1 = inb(dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-			outb(reg1 ^ MC_CONTROL_REG1_SINTEN, </div><div class='del'>-			     dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-			outb(reg1, dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-</div><div class='del'>-			/* Continue handling as normal */</div><div class='del'>-			tms380tr_interrupt(irq, dev_id);</div><div class='del'>-</div><div class='del'>-			pending = SIFREADW(SIFSTS); /* restart - the SIF way */</div><div class='del'>-</div><div class='del'>-		} else</div><div class='del'>-			return IRQ_HANDLED; </div><div class='del'>-	} while (1);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED; /* not reachable */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Set the card to the preferred ring speed.</div><div class='del'>- *</div><div class='del'>- * Unlike newer cards, the MC16/32 have their speed selection</div><div class='del'>- * circuit connected to the Madge ASICs and not to the TMS380</div><div class='del'>- * NSELOUT pins. Set the ASIC bits correctly here, and return </div><div class='del'>- * zero to leave the TMS NSELOUT bits unaffected.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static unsigned short madgemc_setnselout_pins(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned char reg1;</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	</div><div class='del'>-	reg1 = inb(dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-</div><div class='del'>-	if(tp-&gt;DataRate == SPEED_16)</div><div class='del'>-		reg1 |= MC_CONTROL_REG1_SPEED_SEL; /* add for 16mb */</div><div class='del'>-	else if (reg1 &amp; MC_CONTROL_REG1_SPEED_SEL)</div><div class='del'>-		reg1 ^= MC_CONTROL_REG1_SPEED_SEL; /* remove for 4mb */</div><div class='del'>-	outb(reg1, dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-</div><div class='del'>-	return 0; /* no change */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Set the register page.  This equates to the SRSX line</div><div class='del'>- * on the TMS380Cx6.</div><div class='del'>- *</div><div class='del'>- * Register selection is normally done via three contiguous</div><div class='del'>- * bits.  However, some boards (such as the MC16/32) use only</div><div class='del'>- * two bits, plus a separate bit in the glue chip.  This</div><div class='del'>- * sets the SRSX bit (the top bit).  See page 4-17 in the</div><div class='del'>- * Yellow Book for which registers are affected.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static void madgemc_setregpage(struct net_device *dev, int page)</div><div class='del'>-{	</div><div class='del'>-	static int reg1;</div><div class='del'>-</div><div class='del'>-	reg1 = inb(dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-	if ((page == 0) &amp;&amp; (reg1 &amp; MC_CONTROL_REG1_SRSX)) {</div><div class='del'>-		outb(reg1 ^ MC_CONTROL_REG1_SRSX, </div><div class='del'>-		     dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-	}</div><div class='del'>-	else if (page == 1) {</div><div class='del'>-		outb(reg1 | MC_CONTROL_REG1_SRSX, </div><div class='del'>-		     dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-	}</div><div class='del'>-	reg1 = inb(dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The SIF registers are not mapped into register space by default</div><div class='del'>- * Set this to 1 to map them, 0 to map the BIA ROM.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static void madgemc_setsifsel(struct net_device *dev, int val)</div><div class='del'>-{</div><div class='del'>-	unsigned int reg0;</div><div class='del'>-</div><div class='del'>-	reg0 = inb(dev-&gt;base_addr + MC_CONTROL_REG0);</div><div class='del'>-	if ((val == 0) &amp;&amp; (reg0 &amp; MC_CONTROL_REG0_SIFSEL)) {</div><div class='del'>-		outb(reg0 ^ MC_CONTROL_REG0_SIFSEL, </div><div class='del'>-		     dev-&gt;base_addr + MC_CONTROL_REG0);</div><div class='del'>-	} else if (val == 1) {</div><div class='del'>-		outb(reg0 | MC_CONTROL_REG0_SIFSEL, </div><div class='del'>-		     dev-&gt;base_addr + MC_CONTROL_REG0);</div><div class='del'>-	}	</div><div class='del'>-	reg0 = inb(dev-&gt;base_addr + MC_CONTROL_REG0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Enable SIF interrupts</div><div class='del'>- *</div><div class='del'>- * This does not enable interrupts in the SIF, but rather</div><div class='del'>- * enables SIF interrupts to be passed onto the host.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static void madgemc_setint(struct net_device *dev, int val)</div><div class='del'>-{</div><div class='del'>-	unsigned int reg1;</div><div class='del'>-</div><div class='del'>-	reg1 = inb(dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-	if ((val == 0) &amp;&amp; (reg1 &amp; MC_CONTROL_REG1_SINTEN)) {</div><div class='del'>-		outb(reg1 ^ MC_CONTROL_REG1_SINTEN, </div><div class='del'>-		     dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-	} else if (val == 1) {</div><div class='del'>-		outb(reg1 | MC_CONTROL_REG1_SINTEN, </div><div class='del'>-		     dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Cable type is set via control register 7. Bit zero high</div><div class='del'>- * for UTP, low for STP.</div><div class='del'>- */</div><div class='del'>-static void madgemc_setcabletype(struct net_device *dev, int type)</div><div class='del'>-{</div><div class='del'>-	outb((type==0)?MC_CONTROL_REG7_CABLEUTP:MC_CONTROL_REG7_CABLESTP,</div><div class='del'>-	     dev-&gt;base_addr + MC_CONTROL_REG7);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Enable the functions of the Madge chipset needed for</div><div class='del'>- * full working order. </div><div class='del'>- */</div><div class='del'>-static int madgemc_chipset_init(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	outb(0, dev-&gt;base_addr + MC_CONTROL_REG1); /* pull SRESET low */</div><div class='del'>-	tms380tr_wait(100); /* wait for card to reset */</div><div class='del'>-</div><div class='del'>-	/* bring back into normal operating mode */</div><div class='del'>-	outb(MC_CONTROL_REG1_NSRESET, dev-&gt;base_addr + MC_CONTROL_REG1);</div><div class='del'>-</div><div class='del'>-	/* map SIF registers */</div><div class='del'>-	madgemc_setsifsel(dev, 1);</div><div class='del'>-</div><div class='del'>-	/* enable SIF interrupts */</div><div class='del'>-	madgemc_setint(dev, 1); </div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Disable the board, and put back into power-up state.</div><div class='del'>- */</div><div class='del'>-static void madgemc_chipset_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	/* disable interrupts */</div><div class='del'>-	madgemc_setint(dev, 0);</div><div class='del'>-	/* unmap SIF registers */</div><div class='del'>-	madgemc_setsifsel(dev, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Read the card type (MC16 or MC32) from the card.</div><div class='del'>- *</div><div class='del'>- * The configuration registers are stored in two separate</div><div class='del'>- * pages.  Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE)</div><div class='del'>- * for page zero, or setting bit 3 for page one.</div><div class='del'>- *</div><div class='del'>- * Page zero contains the following data:</div><div class='del'>- *	Byte 0: Manufacturer ID (0x4D -- ASCII "M")</div><div class='del'>- *	Byte 1: Card type:</div><div class='del'>- *			0x08 for MC16</div><div class='del'>- *			0x0D for MC32</div><div class='del'>- *	Byte 2: Card revision</div><div class='del'>- *	Byte 3: Mirror of POS config register 0</div><div class='del'>- *	Byte 4: Mirror of POS 1</div><div class='del'>- *	Byte 5: Mirror of POS 2</div><div class='del'>- *</div><div class='del'>- * Page one contains the following data:</div><div class='del'>- *	Byte 0: Unused</div><div class='del'>- *	Byte 1-6: BIA, MSB to LSB.</div><div class='del'>- *</div><div class='del'>- * Note that to read the BIA, we must unmap the SIF registers</div><div class='del'>- * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data</div><div class='del'>- * will reside in the same logical location.  For this reason,</div><div class='del'>- * _never_ read the BIA while the Eagle processor is running!</div><div class='del'>- * The SIF will be completely inaccessible until the BIA operation</div><div class='del'>- * is complete.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static void madgemc_read_rom(struct net_device *dev, struct card_info *card)</div><div class='del'>-{</div><div class='del'>-	unsigned long ioaddr;</div><div class='del'>-	unsigned char reg0, reg1, tmpreg0, i;</div><div class='del'>-</div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-	reg0 = inb(ioaddr + MC_CONTROL_REG0);</div><div class='del'>-	reg1 = inb(ioaddr + MC_CONTROL_REG1);</div><div class='del'>-</div><div class='del'>-	/* Switch to page zero and unmap SIF */</div><div class='del'>-	tmpreg0 = reg0 &amp; ~(MC_CONTROL_REG0_PAGE + MC_CONTROL_REG0_SIFSEL);</div><div class='del'>-	outb(tmpreg0, ioaddr + MC_CONTROL_REG0);</div><div class='del'>-	</div><div class='del'>-	card-&gt;manid = inb(ioaddr + MC_ROM_MANUFACTURERID);</div><div class='del'>-	card-&gt;cardtype = inb(ioaddr + MC_ROM_ADAPTERID);</div><div class='del'>-	card-&gt;cardrev = inb(ioaddr + MC_ROM_REVISION);</div><div class='del'>-</div><div class='del'>-	/* Switch to rom page one */</div><div class='del'>-	outb(tmpreg0 | MC_CONTROL_REG0_PAGE, ioaddr + MC_CONTROL_REG0);</div><div class='del'>-</div><div class='del'>-	/* Read BIA */</div><div class='del'>-	dev-&gt;addr_len = 6;</div><div class='del'>-	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = inb(ioaddr + MC_ROM_BIA_START + i);</div><div class='del'>-	</div><div class='del'>-	/* Restore original register values */</div><div class='del'>-	outb(reg0, ioaddr + MC_CONTROL_REG0);</div><div class='del'>-	outb(reg1, ioaddr + MC_CONTROL_REG1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int madgemc_open(struct net_device *dev)</div><div class='del'>-{  </div><div class='del'>-	/*</div><div class='del'>-	 * Go ahead and reinitialize the chipset again, just to </div><div class='del'>-	 * make sure we didn't get left in a bad state.</div><div class='del'>-	 */</div><div class='del'>-	madgemc_chipset_init(dev);</div><div class='del'>-	tms380tr_open(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int madgemc_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	tms380tr_close(dev);</div><div class='del'>-	madgemc_chipset_close(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Give some details available from /proc/mca/slotX</div><div class='del'>- */</div><div class='del'>-static int madgemc_mcaproc(char *buf, int slot, void *d) </div><div class='del'>-{	</div><div class='del'>-	struct net_device *dev = (struct net_device *)d;</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	struct card_info *curcard = tp-&gt;tmspriv;</div><div class='del'>-	int len = 0;</div><div class='del'>-	</div><div class='del'>-	len += sprintf(buf+len, "-------\n");</div><div class='del'>-	if (curcard) {</div><div class='del'>-		len += sprintf(buf+len, "Card Revision: %d\n", curcard-&gt;cardrev);</div><div class='del'>-		len += sprintf(buf+len, "RAM Size: %dkb\n", curcard-&gt;ramsize);</div><div class='del'>-		len += sprintf(buf+len, "Cable type: %s\n", (curcard-&gt;cabletype)?"STP/DB9":"UTP/RJ-45");</div><div class='del'>-		len += sprintf(buf+len, "Configured ring speed: %dMb/sec\n", (curcard-&gt;ringspeed)?16:4);</div><div class='del'>-		len += sprintf(buf+len, "Running ring speed: %dMb/sec\n", (tp-&gt;DataRate==SPEED_16)?16:4);</div><div class='del'>-		len += sprintf(buf+len, "Device: %s\n", dev-&gt;name);</div><div class='del'>-		len += sprintf(buf+len, "IO Port: 0x%04lx\n", dev-&gt;base_addr);</div><div class='del'>-		len += sprintf(buf+len, "IRQ: %d\n", dev-&gt;irq);</div><div class='del'>-		len += sprintf(buf+len, "Arbitration Level: %d\n", curcard-&gt;arblevel);</div><div class='del'>-		len += sprintf(buf+len, "Burst Mode: ");</div><div class='del'>-		switch(curcard-&gt;burstmode) {</div><div class='del'>-		case 0: len += sprintf(buf+len, "Cycle steal"); break;</div><div class='del'>-		case 1: len += sprintf(buf+len, "Limited burst"); break;</div><div class='del'>-		case 2: len += sprintf(buf+len, "Delayed release"); break;</div><div class='del'>-		case 3: len += sprintf(buf+len, "Immediate release"); break;</div><div class='del'>-		}</div><div class='del'>-		len += sprintf(buf+len, " (%s)\n", (curcard-&gt;fairness)?"Unfair":"Fair");</div><div class='del'>-		</div><div class='del'>-		len += sprintf(buf+len, "Ring Station Address: %pM\n",</div><div class='del'>-			       dev-&gt;dev_addr);</div><div class='del'>-	} else </div><div class='del'>-		len += sprintf(buf+len, "Card not configured\n");</div><div class='del'>-</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __devexit madgemc_remove(struct device *device)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = dev_get_drvdata(device);</div><div class='del'>-	struct net_local *tp;</div><div class='del'>-        struct card_info *card;</div><div class='del'>-</div><div class='del'>-	BUG_ON(!dev);</div><div class='del'>-</div><div class='del'>-	tp = netdev_priv(dev);</div><div class='del'>-	card = tp-&gt;tmspriv;</div><div class='del'>-	kfree(card);</div><div class='del'>-	tp-&gt;tmspriv = NULL;</div><div class='del'>-</div><div class='del'>-	unregister_netdev(dev);</div><div class='del'>-	release_region(dev-&gt;base_addr-MADGEMC_SIF_OFFSET, MADGEMC_IO_EXTENT);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	tmsdev_term(dev);</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	dev_set_drvdata(device, NULL);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static short madgemc_adapter_ids[] __initdata = {</div><div class='del'>-	0x002d,</div><div class='del'>-	0x0000</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct mca_driver madgemc_driver = {</div><div class='del'>-	.id_table = madgemc_adapter_ids,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "madgemc",</div><div class='del'>-		.bus = &amp;mca_bus_type,</div><div class='del'>-		.probe = madgemc_probe,</div><div class='del'>-		.remove = __devexit_p(madgemc_remove),</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init madgemc_init (void)</div><div class='del'>-{</div><div class='del'>-	madgemc_netdev_ops = tms380tr_netdev_ops;</div><div class='del'>-	madgemc_netdev_ops.ndo_open = madgemc_open;</div><div class='del'>-	madgemc_netdev_ops.ndo_stop = madgemc_close;</div><div class='del'>-</div><div class='del'>-	return mca_register_driver (&amp;madgemc_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit madgemc_exit (void)</div><div class='del'>-{</div><div class='del'>-	mca_unregister_driver (&amp;madgemc_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(madgemc_init);</div><div class='del'>-module_exit(madgemc_exit);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/tokenring/madgemc.h b/drivers/net/tokenring/madgemc.h<br/>deleted file mode 100644<br/>index fe88e272c531..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/madgemc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/madgemc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,70 +0,0 @@</div><div class='del'>-/* </div><div class='del'>- * madgemc.h: Header for the madgemc tms380tr module</div><div class='del'>- *</div><div class='del'>- * Authors:</div><div class='del'>- * - Adam Fritzler</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __LINUX_MADGEMC_H</div><div class='del'>-#define __LINUX_MADGEMC_H</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-#define MADGEMC16_CARDNAME "Madge Smart 16/4 MC16 Ringnode"</div><div class='del'>-#define MADGEMC32_CARDNAME "Madge Smart 16/4 MC32 Ringnode"</div><div class='del'>-</div><div class='del'>-/* </div><div class='del'>- * Bit definitions for the POS config registers</div><div class='del'>- */</div><div class='del'>-#define MC16_POS0_ADDR1 0x20</div><div class='del'>-#define MC16_POS2_ADDR2 0x04</div><div class='del'>-#define MC16_POS3_ADDR3 0x20</div><div class='del'>-</div><div class='del'>-#define MC_CONTROL_REG0		((long)-8) /* 0x00 */</div><div class='del'>-#define MC_CONTROL_REG1		((long)-7) /* 0x01 */</div><div class='del'>-#define MC_ADAPTER_POS_REG0	((long)-6) /* 0x02 */</div><div class='del'>-#define MC_ADAPTER_POS_REG1	((long)-5) /* 0x03 */</div><div class='del'>-#define MC_ADAPTER_POS_REG2	((long)-4) /* 0x04 */</div><div class='del'>-#define MC_ADAPTER_REG5_UNUSED	((long)-3) /* 0x05 */</div><div class='del'>-#define MC_ADAPTER_REG6_UNUSED	((long)-2) /* 0x06 */</div><div class='del'>-#define MC_CONTROL_REG7		((long)-1) /* 0x07 */</div><div class='del'>-</div><div class='del'>-#define MC_CONTROL_REG0_UNKNOWN1	0x01</div><div class='del'>-#define MC_CONTROL_REG0_UNKNOWN2	0x02</div><div class='del'>-#define MC_CONTROL_REG0_SIFSEL		0x04</div><div class='del'>-#define MC_CONTROL_REG0_PAGE		0x08</div><div class='del'>-#define MC_CONTROL_REG0_TESTINTERRUPT	0x10</div><div class='del'>-#define MC_CONTROL_REG0_UNKNOWN20	0x20</div><div class='del'>-#define MC_CONTROL_REG0_SINTR		0x40</div><div class='del'>-#define MC_CONTROL_REG0_UNKNOWN80	0x80</div><div class='del'>-</div><div class='del'>-#define MC_CONTROL_REG1_SINTEN		0x01</div><div class='del'>-#define MC_CONTROL_REG1_BITOFDEATH	0x02</div><div class='del'>-#define MC_CONTROL_REG1_NSRESET		0x04</div><div class='del'>-#define MC_CONTROL_REG1_UNKNOWN8	0x08</div><div class='del'>-#define MC_CONTROL_REG1_UNKNOWN10	0x10</div><div class='del'>-#define MC_CONTROL_REG1_UNKNOWN20	0x20</div><div class='del'>-#define MC_CONTROL_REG1_SRSX		0x40</div><div class='del'>-#define MC_CONTROL_REG1_SPEED_SEL	0x80</div><div class='del'>-</div><div class='del'>-#define MC_CONTROL_REG7_CABLESTP	0x00</div><div class='del'>-#define MC_CONTROL_REG7_CABLEUTP	0x01</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ROM Page Zero</div><div class='del'>- */</div><div class='del'>-#define MC_ROM_MANUFACTURERID		0x00</div><div class='del'>-#define MC_ROM_ADAPTERID		0x01</div><div class='del'>-#define MC_ROM_REVISION			0x02</div><div class='del'>-#define MC_ROM_CONFIG0			0x03</div><div class='del'>-#define MC_ROM_CONFIG1			0x04</div><div class='del'>-#define MC_ROM_CONFIG2			0x05</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * ROM Page One</div><div class='del'>- */</div><div class='del'>-#define MC_ROM_UNUSED_BYTE		0x00</div><div class='del'>-#define MC_ROM_BIA_START		0x01</div><div class='del'>-</div><div class='del'>-#endif /* __KERNEL__ */</div><div class='del'>-#endif /* __LINUX_MADGEMC_H */</div><div class='head'>diff --git a/drivers/net/tokenring/olympic.c b/drivers/net/tokenring/olympic.c<br/>deleted file mode 100644<br/>index 0e234741cc79..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/olympic.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/olympic.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1749 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *   olympic.c (c) 1999 Peter De Schrijver All Rights Reserved</div><div class='del'>- *		   1999/2000 Mike Phillips (mikep@linuxtr.net)</div><div class='del'>- *</div><div class='del'>- *  Linux driver for IBM PCI tokenring cards based on the Pit/Pit-Phy/Olympic</div><div class='del'>- *  chipset. </div><div class='del'>- *</div><div class='del'>- *  Base Driver Skeleton:</div><div class='del'>- *      Written 1993-94 by Donald Becker.</div><div class='del'>- *</div><div class='del'>- *      Copyright 1993 United States Government as represented by the</div><div class='del'>- *      Director, National Security Agency.</div><div class='del'>- *</div><div class='del'>- *  Thanks to Erik De Cock, Adrian Bridgett and Frank Fiene for their </div><div class='del'>- *  assistance and perserverance with the testing of this driver.</div><div class='del'>- *</div><div class='del'>- *  This software may be used and distributed according to the terms</div><div class='del'>- *  of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- * </div><div class='del'>- *  4/27/99 - Alpha Release 0.1.0</div><div class='del'>- *            First release to the public</div><div class='del'>- *</div><div class='del'>- *  6/8/99  - Official Release 0.2.0   </div><div class='del'>- *            Merged into the kernel code </div><div class='del'>- *  8/18/99 - Updated driver for 2.3.13 kernel to use new pci</div><div class='del'>- *	      resource. Driver also reports the card name returned by</div><div class='del'>- *            the pci resource.</div><div class='del'>- *  1/11/00 - Added spinlocks for smp</div><div class='del'>- *  2/23/00 - Updated to dev_kfree_irq </div><div class='del'>- *  3/10/00 - Fixed FDX enable which triggered other bugs also </div><div class='del'>- *            squashed.</div><div class='del'>- *  5/20/00 - Changes to handle Olympic on LinuxPPC. Endian changes.</div><div class='del'>- *            The odd thing about the changes is that the fix for</div><div class='del'>- *            endian issues with the big-endian data in the arb, asb...</div><div class='del'>- *            was to always swab() the bytes, no matter what CPU.</div><div class='del'>- *            That's because the read[wl]() functions always swap the</div><div class='del'>- *            bytes on the way in on PPC.</div><div class='del'>- *            Fixing the hardware descriptors was another matter,</div><div class='del'>- *            because they weren't going through read[wl](), there all</div><div class='del'>- *            the results had to be in memory in le32 values. kdaaker</div><div class='del'>- *</div><div class='del'>- * 12/23/00 - Added minimal Cardbus support (Thanks Donald).</div><div class='del'>- *</div><div class='del'>- * 03/09/01 - Add new pci api, dev_base_lock, general clean up. </div><div class='del'>- *</div><div class='del'>- * 03/27/01 - Add new dma pci (Thanks to Kyle Lucke) and alloc_trdev</div><div class='del'>- *	      Change proc_fs behaviour, now one entry per adapter.</div><div class='del'>- *</div><div class='del'>- * 04/09/01 - Couple of bug fixes to the dma unmaps and ejecting the</div><div class='del'>- *	      adapter when live does not take the system down with it.</div><div class='del'>- * </div><div class='del'>- * 06/02/01 - Clean up, copy skb for small packets</div><div class='del'>- * </div><div class='del'>- * 06/22/01 - Add EISR error handling routines </div><div class='del'>- *</div><div class='del'>- * 07/19/01 - Improve bad LAA reporting, strip out freemem</div><div class='del'>- *	      into a separate function, its called from 3 </div><div class='del'>- *	      different places now. </div><div class='del'>- * 02/09/02 - Replaced sleep_on. </div><div class='del'>- * 03/01/02 - Replace access to several registers from 32 bit to </div><div class='del'>- * 	      16 bit. Fixes alignment errors on PPC 64 bit machines.</div><div class='del'>- * 	      Thanks to Al Trautman for this one.</div><div class='del'>- * 03/10/02 - Fix BUG in arb_cmd. Bug was there all along but was</div><div class='del'>- * 	      silently ignored until the error checking code </div><div class='del'>- * 	      went into version 1.0.0 </div><div class='del'>- * 06/04/02 - Add correct start up sequence for the cardbus adapters.</div><div class='del'>- * 	      Required for strict compliance with pci power mgmt specs.</div><div class='del'>- *  To Do:</div><div class='del'>- *</div><div class='del'>- *	     Wake on lan	</div><div class='del'>- * </div><div class='del'>- *  If Problems do Occur</div><div class='del'>- *  Most problems can be rectified by either closing and opening the interface</div><div class='del'>- *  (ifconfig down and up) or rmmod and insmod'ing the driver (a bit difficult</div><div class='del'>- *  if compiled into the kernel).</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* Change OLYMPIC_DEBUG to 1 to get verbose, and I mean really verbose, messages */</div><div class='del'>-</div><div class='del'>-#define OLYMPIC_DEBUG 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/timer.h&gt;</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/proc_fs.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='del'>-#include &lt;linux/stddef.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;net/checksum.h&gt;</div><div class='del'>-#include &lt;net/net_namespace.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include "olympic.h"</div><div class='del'>-</div><div class='del'>-/* I've got to put some intelligence into the version number so that Peter and I know</div><div class='del'>- * which version of the code somebody has got. </div><div class='del'>- * Version Number = a.b.c.d  where a.b.c is the level of code and d is the latest author.</div><div class='del'>- * So 0.0.1.pds = Peter, 0.0.1.mlp = Mike</div><div class='del'>- * </div><div class='del'>- * Official releases will only have an a.b.c version number format. </div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static char version[] =</div><div class='del'>-"Olympic.c v1.0.5 6/04/02 - Peter De Schrijver &amp; Mike Phillips" ; </div><div class='del'>-</div><div class='del'>-static char *open_maj_error[]  = {"No error", "Lobe Media Test", "Physical Insertion",</div><div class='del'>-				   "Address Verification", "Neighbor Notification (Ring Poll)",</div><div class='del'>-				   "Request Parameters","FDX Registration Request",</div><div class='del'>-				   "FDX Duplicate Address Check", "Station registration Query Wait",</div><div class='del'>-				   "Unknown stage"};</div><div class='del'>-</div><div class='del'>-static char *open_min_error[] = {"No error", "Function Failure", "Signal Lost", "Wire Fault",</div><div class='del'>-				   "Ring Speed Mismatch", "Timeout","Ring Failure","Ring Beaconing",</div><div class='del'>-				   "Duplicate Node Address","Request Parameters","Remove Received",</div><div class='del'>-				   "Reserved", "Reserved", "No Monitor Detected for RPL", </div><div class='del'>-				   "Monitor Contention failer for RPL", "FDX Protocol Error"};</div><div class='del'>-</div><div class='del'>-/* Module parameters */</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Mike Phillips &lt;mikep@linuxtr.net&gt;") ; </div><div class='del'>-MODULE_DESCRIPTION("Olympic PCI/Cardbus Chipset Driver") ; </div><div class='del'>-</div><div class='del'>-/* Ring Speed 0,4,16,100 </div><div class='del'>- * 0 = Autosense         </div><div class='del'>- * 4,16 = Selected speed only, no autosense</div><div class='del'>- * This allows the card to be the first on the ring</div><div class='del'>- * and become the active monitor.</div><div class='del'>- * 100 = Nothing at present, 100mbps is autodetected</div><div class='del'>- * if FDX is turned on. May be implemented in the future to </div><div class='del'>- * fail if 100mpbs is not detected.</div><div class='del'>- *</div><div class='del'>- * WARNING: Some hubs will allow you to insert</div><div class='del'>- * at the wrong speed</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int ringspeed[OLYMPIC_MAX_ADAPTERS] = {0,} ;</div><div class='del'>-module_param_array(ringspeed, int, NULL, 0);</div><div class='del'>-</div><div class='del'>-/* Packet buffer size */</div><div class='del'>-</div><div class='del'>-static int pkt_buf_sz[OLYMPIC_MAX_ADAPTERS] = {0,} ;</div><div class='del'>-module_param_array(pkt_buf_sz, int, NULL, 0) ;</div><div class='del'>-</div><div class='del'>-/* Message Level */</div><div class='del'>-</div><div class='del'>-static int message_level[OLYMPIC_MAX_ADAPTERS] = {0,} ; </div><div class='del'>-module_param_array(message_level, int, NULL, 0) ;</div><div class='del'>-</div><div class='del'>-/* Change network_monitor to receive mac frames through the arb channel.</div><div class='del'>- * Will also create a /proc/net/olympic_tr%d entry, where %d is the tr</div><div class='del'>- * device, i.e. tr0, tr1 etc. </div><div class='del'>- * Intended to be used to create a ring-error reporting network module </div><div class='del'>- * i.e. it will give you the source address of beaconers on the ring </div><div class='del'>- */</div><div class='del'>-static int network_monitor[OLYMPIC_MAX_ADAPTERS] = {0,};</div><div class='del'>-module_param_array(network_monitor, int, NULL, 0);</div><div class='del'>-</div><div class='del'>-static DEFINE_PCI_DEVICE_TABLE(olympic_pci_tbl) = {</div><div class='del'>-	{PCI_VENDOR_ID_IBM,PCI_DEVICE_ID_IBM_TR_WAKE,PCI_ANY_ID,PCI_ANY_ID,},</div><div class='del'>-	{ } 	/* Terminating Entry */</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(pci,olympic_pci_tbl) ; </div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int olympic_probe(struct pci_dev *pdev, const struct pci_device_id *ent); </div><div class='del'>-static int olympic_init(struct net_device *dev);</div><div class='del'>-static int olympic_open(struct net_device *dev);</div><div class='del'>-static netdev_tx_t olympic_xmit(struct sk_buff *skb,</div><div class='del'>-				      struct net_device *dev);</div><div class='del'>-static int olympic_close(struct net_device *dev);</div><div class='del'>-static void olympic_set_rx_mode(struct net_device *dev);</div><div class='del'>-static void olympic_freemem(struct net_device *dev) ;  </div><div class='del'>-static irqreturn_t olympic_interrupt(int irq, void *dev_id);</div><div class='del'>-static int olympic_set_mac_address(struct net_device *dev, void *addr) ; </div><div class='del'>-static void olympic_arb_cmd(struct net_device *dev);</div><div class='del'>-static int olympic_change_mtu(struct net_device *dev, int mtu);</div><div class='del'>-static void olympic_srb_bh(struct net_device *dev) ; </div><div class='del'>-static void olympic_asb_bh(struct net_device *dev) ; </div><div class='del'>-static const struct file_operations olympic_proc_ops;</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops olympic_netdev_ops = {</div><div class='del'>-	.ndo_open		= olympic_open,</div><div class='del'>-	.ndo_stop		= olympic_close,</div><div class='del'>-	.ndo_start_xmit		= olympic_xmit,</div><div class='del'>-	.ndo_change_mtu		= olympic_change_mtu,</div><div class='del'>-	.ndo_set_rx_mode	= olympic_set_rx_mode,</div><div class='del'>-	.ndo_set_mac_address	= olympic_set_mac_address,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __devinit olympic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev ; </div><div class='del'>-	struct olympic_private *olympic_priv;</div><div class='del'>-	static int card_no = -1 ;</div><div class='del'>-	int i ; </div><div class='del'>-</div><div class='del'>-	card_no++ ; </div><div class='del'>-</div><div class='del'>-	if ((i = pci_enable_device(pdev))) {</div><div class='del'>-		return i ; </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pci_set_master(pdev);</div><div class='del'>-</div><div class='del'>-	if ((i = pci_request_regions(pdev,"olympic"))) { </div><div class='del'>-		goto op_disable_dev;</div><div class='del'>-	}</div><div class='del'>- </div><div class='del'>-	dev = alloc_trdev(sizeof(struct olympic_private)) ; </div><div class='del'>-	if (!dev) {</div><div class='del'>-		i = -ENOMEM; </div><div class='del'>-		goto op_release_dev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	olympic_priv = netdev_priv(dev) ;</div><div class='del'>-	</div><div class='del'>-	spin_lock_init(&amp;olympic_priv-&gt;olympic_lock) ; </div><div class='del'>-</div><div class='del'>-	init_waitqueue_head(&amp;olympic_priv-&gt;srb_wait);</div><div class='del'>-	init_waitqueue_head(&amp;olympic_priv-&gt;trb_wait);</div><div class='del'>-#if OLYMPIC_DEBUG  </div><div class='del'>-	printk(KERN_INFO "pci_device: %p, dev:%p, dev-&gt;priv: %p\n", pdev, dev, netdev_priv(dev));</div><div class='del'>-#endif</div><div class='del'>-	dev-&gt;irq=pdev-&gt;irq;</div><div class='del'>-	dev-&gt;base_addr=pci_resource_start(pdev, 0);</div><div class='del'>-	olympic_priv-&gt;olympic_card_name = pci_name(pdev);</div><div class='del'>-	olympic_priv-&gt;pdev = pdev; </div><div class='del'>-	olympic_priv-&gt;olympic_mmio = ioremap(pci_resource_start(pdev,1),256);</div><div class='del'>-	olympic_priv-&gt;olympic_lap = ioremap(pci_resource_start(pdev,2),2048);</div><div class='del'>-	if (!olympic_priv-&gt;olympic_mmio || !olympic_priv-&gt;olympic_lap) {</div><div class='del'>-		goto op_free_iomap;</div><div class='del'>-	}</div><div class='del'>-				</div><div class='del'>-	if ((pkt_buf_sz[card_no] &lt; 100) || (pkt_buf_sz[card_no] &gt; 18000) )</div><div class='del'>-		olympic_priv-&gt;pkt_buf_sz = PKT_BUF_SZ ; </div><div class='del'>-	else</div><div class='del'>-		olympic_priv-&gt;pkt_buf_sz = pkt_buf_sz[card_no] ; </div><div class='del'>-</div><div class='del'>-	dev-&gt;mtu = olympic_priv-&gt;pkt_buf_sz - TR_HLEN ; </div><div class='del'>-	olympic_priv-&gt;olympic_ring_speed = ringspeed[card_no] ; </div><div class='del'>-	olympic_priv-&gt;olympic_message_level = message_level[card_no] ; </div><div class='del'>-	olympic_priv-&gt;olympic_network_monitor = network_monitor[card_no];</div><div class='del'>-	</div><div class='del'>-	if ((i = olympic_init(dev))) {</div><div class='del'>-		goto op_free_iomap;</div><div class='del'>-	}				</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;olympic_netdev_ops;</div><div class='del'>-	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	pci_set_drvdata(pdev,dev) ; </div><div class='del'>-	register_netdev(dev) ; </div><div class='del'>-	printk("Olympic: %s registered as: %s\n",olympic_priv-&gt;olympic_card_name,dev-&gt;name);</div><div class='del'>-	if (olympic_priv-&gt;olympic_network_monitor) { /* Must go after register_netdev as we need the device name */ </div><div class='del'>-		char proc_name[20] ; </div><div class='del'>-		strcpy(proc_name,"olympic_") ;</div><div class='del'>-		strcat(proc_name,dev-&gt;name) ; </div><div class='del'>-		proc_create_data(proc_name, 0, init_net.proc_net, &amp;olympic_proc_ops, dev);</div><div class='del'>-		printk("Olympic: Network Monitor information: /proc/%s\n",proc_name); </div><div class='del'>-	}</div><div class='del'>-	return  0 ;</div><div class='del'>-</div><div class='del'>-op_free_iomap:</div><div class='del'>-	if (olympic_priv-&gt;olympic_mmio)</div><div class='del'>-		iounmap(olympic_priv-&gt;olympic_mmio); </div><div class='del'>-	if (olympic_priv-&gt;olympic_lap)</div><div class='del'>-		iounmap(olympic_priv-&gt;olympic_lap);</div><div class='del'>-</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-op_release_dev:</div><div class='del'>-	pci_release_regions(pdev); </div><div class='del'>-</div><div class='del'>-op_disable_dev:</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-	return i;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int olympic_init(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-    	struct olympic_private *olympic_priv;</div><div class='del'>-	u8 __iomem *olympic_mmio, *init_srb,*adapter_addr;</div><div class='del'>-	unsigned long t; </div><div class='del'>-	unsigned int uaa_addr;</div><div class='del'>-</div><div class='del'>-	olympic_priv=netdev_priv(dev);</div><div class='del'>-	olympic_mmio=olympic_priv-&gt;olympic_mmio;</div><div class='del'>-</div><div class='del'>-	printk("%s\n", version);</div><div class='del'>-	printk("%s. I/O at %hx, MMIO at %p, LAP at %p, using irq %d\n", olympic_priv-&gt;olympic_card_name, (unsigned int) dev-&gt;base_addr,olympic_priv-&gt;olympic_mmio, olympic_priv-&gt;olympic_lap, dev-&gt;irq);</div><div class='del'>-</div><div class='del'>-	writel(readl(olympic_mmio+BCTL) | BCTL_SOFTRESET,olympic_mmio+BCTL);</div><div class='del'>-	t=jiffies;</div><div class='del'>-	while((readl(olympic_mmio+BCTL)) &amp; BCTL_SOFTRESET) {</div><div class='del'>-		schedule();		</div><div class='del'>-		if(time_after(jiffies, t + 40*HZ)) {</div><div class='del'>-			printk(KERN_ERR "IBM PCI tokenring card not responding.\n");</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* Needed for cardbus */</div><div class='del'>-	if(!(readl(olympic_mmio+BCTL) &amp; BCTL_MODE_INDICATOR)) {</div><div class='del'>-		writel(readl(olympic_priv-&gt;olympic_mmio+FERMASK)|FERMASK_INT_BIT, olympic_mmio+FERMASK);</div><div class='del'>-	}</div><div class='del'>-	</div><div class='del'>-#if OLYMPIC_DEBUG</div><div class='del'>-	printk("BCTL: %x\n",readl(olympic_mmio+BCTL));</div><div class='del'>-	printk("GPR: %x\n",readw(olympic_mmio+GPR));</div><div class='del'>-	printk("SISRMASK: %x\n",readl(olympic_mmio+SISR_MASK));</div><div class='del'>-#endif</div><div class='del'>-	/* Aaaahhh, You have got to be real careful setting GPR, the card</div><div class='del'>-	   holds the previous values from flash memory, including autosense </div><div class='del'>-           and ring speed */</div><div class='del'>-</div><div class='del'>-	writel(readl(olympic_mmio+BCTL)|BCTL_MIMREB,olympic_mmio+BCTL);</div><div class='del'>-	</div><div class='del'>-	if (olympic_priv-&gt;olympic_ring_speed  == 0) { /* Autosense */</div><div class='del'>-		writew(readw(olympic_mmio+GPR)|GPR_AUTOSENSE,olympic_mmio+GPR);</div><div class='del'>-		if (olympic_priv-&gt;olympic_message_level) </div><div class='del'>-			printk(KERN_INFO "%s: Ringspeed autosense mode on\n",olympic_priv-&gt;olympic_card_name);</div><div class='del'>-	} else if (olympic_priv-&gt;olympic_ring_speed == 16) {</div><div class='del'>-		if (olympic_priv-&gt;olympic_message_level) </div><div class='del'>-			printk(KERN_INFO "%s: Trying to open at 16 Mbps as requested\n", olympic_priv-&gt;olympic_card_name);</div><div class='del'>-		writew(GPR_16MBPS, olympic_mmio+GPR);</div><div class='del'>-	} else if (olympic_priv-&gt;olympic_ring_speed == 4) {</div><div class='del'>-		if (olympic_priv-&gt;olympic_message_level) </div><div class='del'>-			printk(KERN_INFO "%s: Trying to open at 4 Mbps as requested\n", olympic_priv-&gt;olympic_card_name) ; </div><div class='del'>-		writew(0, olympic_mmio+GPR);</div><div class='del'>-	} </div><div class='del'>-	</div><div class='del'>-	writew(readw(olympic_mmio+GPR)|GPR_NEPTUNE_BF,olympic_mmio+GPR);</div><div class='del'>-</div><div class='del'>-#if OLYMPIC_DEBUG</div><div class='del'>-	printk("GPR = %x\n",readw(olympic_mmio + GPR) ) ; </div><div class='del'>-#endif</div><div class='del'>-	/* Solo has been paused to meet the Cardbus power</div><div class='del'>-	 * specs if the adapter is cardbus. Check to </div><div class='del'>-	 * see its been paused and then restart solo. The</div><div class='del'>-	 * adapter should set the pause bit within 1 second.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if(!(readl(olympic_mmio+BCTL) &amp; BCTL_MODE_INDICATOR)) { </div><div class='del'>-		t=jiffies;</div><div class='del'>-		while (!(readl(olympic_mmio+CLKCTL) &amp; CLKCTL_PAUSE)) {</div><div class='del'>-			schedule() ; </div><div class='del'>-			if(time_after(jiffies, t + 2*HZ)) {</div><div class='del'>-				printk(KERN_ERR "IBM Cardbus tokenring adapter not responsing.\n") ; </div><div class='del'>-				return -ENODEV;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		writel(readl(olympic_mmio+CLKCTL) &amp; ~CLKCTL_PAUSE, olympic_mmio+CLKCTL) ; </div><div class='del'>-	}</div><div class='del'>-	</div><div class='del'>-	/* start solo init */</div><div class='del'>-	writel((1&lt;&lt;15),olympic_mmio+SISR_MASK_SUM);</div><div class='del'>-</div><div class='del'>-	t=jiffies;</div><div class='del'>-	while(!((readl(olympic_mmio+SISR_RR)) &amp; SISR_SRB_REPLY)) {</div><div class='del'>-		schedule();		</div><div class='del'>-		if(time_after(jiffies, t + 15*HZ)) {</div><div class='del'>-			printk(KERN_ERR "IBM PCI tokenring card not responding.\n");</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	</div><div class='del'>-	writel(readw(olympic_mmio+LAPWWO),olympic_mmio+LAPA);</div><div class='del'>-</div><div class='del'>-#if OLYMPIC_DEBUG</div><div class='del'>-	printk("LAPWWO: %x, LAPA: %x\n",readl(olympic_mmio+LAPWWO), readl(olympic_mmio+LAPA));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	init_srb=olympic_priv-&gt;olympic_lap + ((readw(olympic_mmio+LAPWWO)) &amp; (~0xf800));</div><div class='del'>-</div><div class='del'>-#if OLYMPIC_DEBUG		</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	printk("init_srb(%p): ",init_srb);</div><div class='del'>-	for(i=0;i&lt;20;i++)</div><div class='del'>-		printk("%x ",readb(init_srb+i));</div><div class='del'>-	printk("\n");</div><div class='del'>-}</div><div class='del'>-#endif	</div><div class='del'>-	if(readw(init_srb+6)) {</div><div class='del'>-		printk(KERN_INFO "tokenring card initialization failed. errorcode : %x\n",readw(init_srb+6));</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (olympic_priv-&gt;olympic_message_level) {</div><div class='del'>-		if ( readb(init_srb +2) &amp; 0x40) { </div><div class='del'>-			printk(KERN_INFO "Olympic: Adapter is FDX capable.\n") ;</div><div class='del'>-		} else { </div><div class='del'>-			printk(KERN_INFO "Olympic: Adapter cannot do FDX.\n");</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-  </div><div class='del'>-	uaa_addr=swab16(readw(init_srb+8));</div><div class='del'>-</div><div class='del'>-#if OLYMPIC_DEBUG</div><div class='del'>-	printk("UAA resides at %x\n",uaa_addr);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	writel(uaa_addr,olympic_mmio+LAPA);</div><div class='del'>-	adapter_addr=olympic_priv-&gt;olympic_lap + (uaa_addr &amp; (~0xf800));</div><div class='del'>-</div><div class='del'>-	memcpy_fromio(&amp;dev-&gt;dev_addr[0], adapter_addr,6);</div><div class='del'>-</div><div class='del'>-#if OLYMPIC_DEBUG</div><div class='del'>-	printk("adapter address: %pM\n", dev-&gt;dev_addr);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	olympic_priv-&gt;olympic_addr_table_addr = swab16(readw(init_srb + 12)); </div><div class='del'>-	olympic_priv-&gt;olympic_parms_addr = swab16(readw(init_srb + 14)); </div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int olympic_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct olympic_private *olympic_priv=netdev_priv(dev);</div><div class='del'>-	u8 __iomem *olympic_mmio=olympic_priv-&gt;olympic_mmio,*init_srb;</div><div class='del'>-	unsigned long flags, t;</div><div class='del'>-	int i, open_finished = 1 ;</div><div class='del'>-	u8 resp, err;</div><div class='del'>-</div><div class='del'>-	DECLARE_WAITQUEUE(wait,current) ; </div><div class='del'>-</div><div class='del'>-	olympic_init(dev);</div><div class='del'>-</div><div class='del'>-	if (request_irq(dev-&gt;irq, olympic_interrupt, IRQF_SHARED , "olympic",</div><div class='del'>-			dev))</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-</div><div class='del'>-#if OLYMPIC_DEBUG</div><div class='del'>-	printk("BMCTL: %x\n",readl(olympic_mmio+BMCTL_SUM));</div><div class='del'>-	printk("pending ints: %x\n",readl(olympic_mmio+SISR_RR));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	writel(SISR_MI,olympic_mmio+SISR_MASK_SUM);</div><div class='del'>-</div><div class='del'>-	writel(SISR_MI | SISR_SRB_REPLY, olympic_mmio+SISR_MASK); /* more ints later, doesn't stop arb cmd interrupt */</div><div class='del'>-</div><div class='del'>-	writel(LISR_LIE,olympic_mmio+LISR); /* more ints later */</div><div class='del'>-</div><div class='del'>-	/* adapter is closed, so SRB is pointed to by LAPWWO */</div><div class='del'>-</div><div class='del'>-	writel(readw(olympic_mmio+LAPWWO),olympic_mmio+LAPA);</div><div class='del'>-	init_srb=olympic_priv-&gt;olympic_lap + ((readw(olympic_mmio+LAPWWO)) &amp; (~0xf800));</div><div class='del'>-	</div><div class='del'>-#if OLYMPIC_DEBUG</div><div class='del'>-	printk("LAPWWO: %x, LAPA: %x\n",readw(olympic_mmio+LAPWWO), readl(olympic_mmio+LAPA));</div><div class='del'>-	printk("SISR Mask = %04x\n", readl(olympic_mmio+SISR_MASK));</div><div class='del'>-	printk("Before the open command\n");</div><div class='del'>-#endif	</div><div class='del'>-	do {</div><div class='del'>-		memset_io(init_srb,0,SRB_COMMAND_SIZE);</div><div class='del'>-</div><div class='del'>-		writeb(SRB_OPEN_ADAPTER,init_srb) ; 	/* open */</div><div class='del'>-		writeb(OLYMPIC_CLEAR_RET_CODE,init_srb+2);</div><div class='del'>-</div><div class='del'>-		/* If Network Monitor, instruct card to copy MAC frames through the ARB */</div><div class='del'>-		if (olympic_priv-&gt;olympic_network_monitor) </div><div class='del'>-			writew(swab16(OPEN_ADAPTER_ENABLE_FDX | OPEN_ADAPTER_PASS_ADC_MAC | OPEN_ADAPTER_PASS_ATT_MAC | OPEN_ADAPTER_PASS_BEACON), init_srb+8);</div><div class='del'>-		else</div><div class='del'>-			writew(swab16(OPEN_ADAPTER_ENABLE_FDX), init_srb+8);</div><div class='del'>-	</div><div class='del'>-		/* Test OR of first 3 bytes as its totally possible for </div><div class='del'>-		 * someone to set the first 2 bytes to be zero, although this </div><div class='del'>-		 * is an error, the first byte must have bit 6 set to 1  */</div><div class='del'>-</div><div class='del'>-		if (olympic_priv-&gt;olympic_laa[0] | olympic_priv-&gt;olympic_laa[1] | olympic_priv-&gt;olympic_laa[2]) {</div><div class='del'>-			writeb(olympic_priv-&gt;olympic_laa[0],init_srb+12);</div><div class='del'>-			writeb(olympic_priv-&gt;olympic_laa[1],init_srb+13);</div><div class='del'>-			writeb(olympic_priv-&gt;olympic_laa[2],init_srb+14);</div><div class='del'>-			writeb(olympic_priv-&gt;olympic_laa[3],init_srb+15);</div><div class='del'>-			writeb(olympic_priv-&gt;olympic_laa[4],init_srb+16);</div><div class='del'>-			writeb(olympic_priv-&gt;olympic_laa[5],init_srb+17);</div><div class='del'>-			memcpy(dev-&gt;dev_addr,olympic_priv-&gt;olympic_laa,dev-&gt;addr_len) ;  </div><div class='del'>-		} 	</div><div class='del'>-		writeb(1,init_srb+30);</div><div class='del'>-</div><div class='del'>-		spin_lock_irqsave(&amp;olympic_priv-&gt;olympic_lock,flags);	</div><div class='del'>-		olympic_priv-&gt;srb_queued=1;</div><div class='del'>-</div><div class='del'>-		writel(LISR_SRB_CMD,olympic_mmio+LISR_SUM);</div><div class='del'>-		spin_unlock_irqrestore(&amp;olympic_priv-&gt;olympic_lock,flags);</div><div class='del'>-</div><div class='del'>-		t = jiffies ; </div><div class='del'>-	</div><div class='del'>-		add_wait_queue(&amp;olympic_priv-&gt;srb_wait,&amp;wait) ;</div><div class='del'>-		set_current_state(TASK_INTERRUPTIBLE) ; </div><div class='del'>- </div><div class='del'>- 		while(olympic_priv-&gt;srb_queued) {        </div><div class='del'>-			schedule() ; </div><div class='del'>-        		if(signal_pending(current))	{            </div><div class='del'>-				printk(KERN_WARNING "%s: Signal received in open.\n",</div><div class='del'>-                			dev-&gt;name);</div><div class='del'>-            			printk(KERN_WARNING "SISR=%x LISR=%x\n",</div><div class='del'>-                			readl(olympic_mmio+SISR),</div><div class='del'>-                			readl(olympic_mmio+LISR));</div><div class='del'>-            			olympic_priv-&gt;srb_queued=0;</div><div class='del'>-            			break;</div><div class='del'>-        		}</div><div class='del'>-			if (time_after(jiffies, t + 10*HZ)) {</div><div class='del'>-				printk(KERN_WARNING "%s: SRB timed out.\n",dev-&gt;name);</div><div class='del'>-				olympic_priv-&gt;srb_queued=0;</div><div class='del'>-				break ; </div><div class='del'>-			} </div><div class='del'>-			set_current_state(TASK_INTERRUPTIBLE) ; </div><div class='del'>-    		}</div><div class='del'>-		remove_wait_queue(&amp;olympic_priv-&gt;srb_wait,&amp;wait) ; </div><div class='del'>-		set_current_state(TASK_RUNNING) ; </div><div class='del'>-		olympic_priv-&gt;srb_queued = 0 ; </div><div class='del'>-#if OLYMPIC_DEBUG</div><div class='del'>-		printk("init_srb(%p): ",init_srb);</div><div class='del'>-		for(i=0;i&lt;20;i++)</div><div class='del'>-			printk("%02x ",readb(init_srb+i));</div><div class='del'>-		printk("\n");</div><div class='del'>-#endif</div><div class='del'>-		</div><div class='del'>-		/* If we get the same return response as we set, the interrupt wasn't raised and the open</div><div class='del'>-                 * timed out.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		switch (resp = readb(init_srb+2)) {</div><div class='del'>-		case OLYMPIC_CLEAR_RET_CODE:</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter Open time out or error.\n", dev-&gt;name) ; </div><div class='del'>-			goto out;</div><div class='del'>-		case 0:</div><div class='del'>-			open_finished = 1;</div><div class='del'>-			break;</div><div class='del'>-		case 0x07:</div><div class='del'>-			if (!olympic_priv-&gt;olympic_ring_speed &amp;&amp; open_finished) { /* Autosense , first time around */</div><div class='del'>-				printk(KERN_WARNING "%s: Retrying at different ring speed\n", dev-&gt;name);</div><div class='del'>-				open_finished = 0 ;  </div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			err = readb(init_srb+7);</div><div class='del'>-</div><div class='del'>-			if (!olympic_priv-&gt;olympic_ring_speed &amp;&amp; ((err &amp; 0x0f) == 0x0d)) { </div><div class='del'>-				printk(KERN_WARNING "%s: Tried to autosense ring speed with no monitors present\n",dev-&gt;name);</div><div class='del'>-				printk(KERN_WARNING "%s: Please try again with a specified ring speed\n",dev-&gt;name);</div><div class='del'>-			} else {</div><div class='del'>-				printk(KERN_WARNING "%s: %s - %s\n", dev-&gt;name,</div><div class='del'>-					open_maj_error[(err &amp; 0xf0) &gt;&gt; 4],</div><div class='del'>-					open_min_error[(err &amp; 0x0f)]);</div><div class='del'>-			}</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		case 0x32:</div><div class='del'>-			printk(KERN_WARNING "%s: Invalid LAA: %pM\n",</div><div class='del'>-			       dev-&gt;name, olympic_priv-&gt;olympic_laa);</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		default:</div><div class='del'>-			printk(KERN_WARNING "%s: Bad OPEN response: %x\n", dev-&gt;name, resp);</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		}</div><div class='del'>-	} while (!(open_finished)) ; /* Will only loop if ring speed mismatch re-open attempted &amp;&amp; autosense is on */	</div><div class='del'>-</div><div class='del'>-	if (readb(init_srb+18) &amp; (1&lt;&lt;3)) </div><div class='del'>-		if (olympic_priv-&gt;olympic_message_level) </div><div class='del'>-			printk(KERN_INFO "%s: Opened in FDX Mode\n",dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	if (readb(init_srb+18) &amp; (1&lt;&lt;1))</div><div class='del'>-		olympic_priv-&gt;olympic_ring_speed = 100 ; </div><div class='del'>-	else if (readb(init_srb+18) &amp; 1)</div><div class='del'>-		olympic_priv-&gt;olympic_ring_speed = 16 ; </div><div class='del'>-	else</div><div class='del'>-		olympic_priv-&gt;olympic_ring_speed = 4 ; </div><div class='del'>-</div><div class='del'>-	if (olympic_priv-&gt;olympic_message_level) </div><div class='del'>-		printk(KERN_INFO "%s: Opened in %d Mbps mode\n",dev-&gt;name, olympic_priv-&gt;olympic_ring_speed);</div><div class='del'>-</div><div class='del'>-	olympic_priv-&gt;asb = swab16(readw(init_srb+8));</div><div class='del'>-	olympic_priv-&gt;srb = swab16(readw(init_srb+10));</div><div class='del'>-	olympic_priv-&gt;arb = swab16(readw(init_srb+12));</div><div class='del'>-	olympic_priv-&gt;trb = swab16(readw(init_srb+16));</div><div class='del'>-</div><div class='del'>-	olympic_priv-&gt;olympic_receive_options = 0x01 ; </div><div class='del'>-	olympic_priv-&gt;olympic_copy_all_options = 0 ; </div><div class='del'>-	</div><div class='del'>-	/* setup rx ring */</div><div class='del'>-	</div><div class='del'>-	writel((3&lt;&lt;16),olympic_mmio+BMCTL_RWM); /* Ensure end of frame generated interrupts */ </div><div class='del'>-</div><div class='del'>-	writel(BMCTL_RX_DIS|3,olympic_mmio+BMCTL_RWM); /* Yes, this the enables RX channel */</div><div class='del'>-</div><div class='del'>-	for(i=0;i&lt;OLYMPIC_RX_RING_SIZE;i++) {</div><div class='del'>-</div><div class='del'>-		struct sk_buff *skb;</div><div class='del'>-		</div><div class='del'>-		skb=dev_alloc_skb(olympic_priv-&gt;pkt_buf_sz);</div><div class='del'>-		if(skb == NULL)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		skb-&gt;dev = dev;</div><div class='del'>-</div><div class='del'>-		olympic_priv-&gt;olympic_rx_ring[i].buffer = cpu_to_le32(pci_map_single(olympic_priv-&gt;pdev, </div><div class='del'>-							  skb-&gt;data,olympic_priv-&gt;pkt_buf_sz, PCI_DMA_FROMDEVICE)) ; </div><div class='del'>-		olympic_priv-&gt;olympic_rx_ring[i].res_length = cpu_to_le32(olympic_priv-&gt;pkt_buf_sz); </div><div class='del'>-		olympic_priv-&gt;rx_ring_skb[i]=skb;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i==0) {</div><div class='del'>-		printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers. Adapter disabled\n",dev-&gt;name);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	olympic_priv-&gt;rx_ring_dma_addr = pci_map_single(olympic_priv-&gt;pdev,olympic_priv-&gt;olympic_rx_ring, </div><div class='del'>-					 sizeof(struct olympic_rx_desc) * OLYMPIC_RX_RING_SIZE, PCI_DMA_TODEVICE);</div><div class='del'>-	writel(olympic_priv-&gt;rx_ring_dma_addr, olympic_mmio+RXDESCQ);</div><div class='del'>-	writel(olympic_priv-&gt;rx_ring_dma_addr, olympic_mmio+RXCDA);</div><div class='del'>-	writew(i, olympic_mmio+RXDESCQCNT);</div><div class='del'>-		</div><div class='del'>-	olympic_priv-&gt;rx_status_ring_dma_addr = pci_map_single(olympic_priv-&gt;pdev, olympic_priv-&gt;olympic_rx_status_ring, </div><div class='del'>-						sizeof(struct olympic_rx_status) * OLYMPIC_RX_RING_SIZE, PCI_DMA_FROMDEVICE);</div><div class='del'>-	writel(olympic_priv-&gt;rx_status_ring_dma_addr, olympic_mmio+RXSTATQ);</div><div class='del'>-	writel(olympic_priv-&gt;rx_status_ring_dma_addr, olympic_mmio+RXCSA);</div><div class='del'>-	</div><div class='del'>- 	olympic_priv-&gt;rx_ring_last_received = OLYMPIC_RX_RING_SIZE - 1;	/* last processed rx status */</div><div class='del'>-	olympic_priv-&gt;rx_status_last_received = OLYMPIC_RX_RING_SIZE - 1;  </div><div class='del'>-</div><div class='del'>-	writew(i, olympic_mmio+RXSTATQCNT);</div><div class='del'>-</div><div class='del'>-#if OLYMPIC_DEBUG </div><div class='del'>-	printk("# of rx buffers: %d, RXENQ: %x\n",i, readw(olympic_mmio+RXENQ));</div><div class='del'>-	printk("RXCSA: %x, rx_status_ring[0]: %p\n",readl(olympic_mmio+RXCSA),&amp;olympic_priv-&gt;olympic_rx_status_ring[0]);</div><div class='del'>-	printk(" stat_ring[1]: %p, stat_ring[2]: %p, stat_ring[3]: %p\n", &amp;(olympic_priv-&gt;olympic_rx_status_ring[1]), &amp;(olympic_priv-&gt;olympic_rx_status_ring[2]), &amp;(olympic_priv-&gt;olympic_rx_status_ring[3]) );</div><div class='del'>-	printk(" stat_ring[4]: %p, stat_ring[5]: %p, stat_ring[6]: %p\n", &amp;(olympic_priv-&gt;olympic_rx_status_ring[4]), &amp;(olympic_priv-&gt;olympic_rx_status_ring[5]), &amp;(olympic_priv-&gt;olympic_rx_status_ring[6]) );</div><div class='del'>-	printk(" stat_ring[7]: %p\n", &amp;(olympic_priv-&gt;olympic_rx_status_ring[7])  );</div><div class='del'>-</div><div class='del'>-	printk("RXCDA: %x, rx_ring[0]: %p\n",readl(olympic_mmio+RXCDA),&amp;olympic_priv-&gt;olympic_rx_ring[0]);</div><div class='del'>-	printk("Rx_ring_dma_addr = %08x, rx_status_dma_addr = %08x\n",</div><div class='del'>-		olympic_priv-&gt;rx_ring_dma_addr,olympic_priv-&gt;rx_status_ring_dma_addr) ; </div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	writew((((readw(olympic_mmio+RXENQ)) &amp; 0x8000) ^ 0x8000) | i,olympic_mmio+RXENQ);</div><div class='del'>-</div><div class='del'>-#if OLYMPIC_DEBUG </div><div class='del'>-	printk("# of rx buffers: %d, RXENQ: %x\n",i, readw(olympic_mmio+RXENQ));</div><div class='del'>-	printk("RXCSA: %x, rx_ring[0]: %p\n",readl(olympic_mmio+RXCSA),&amp;olympic_priv-&gt;olympic_rx_status_ring[0]);</div><div class='del'>-	printk("RXCDA: %x, rx_ring[0]: %p\n",readl(olympic_mmio+RXCDA),&amp;olympic_priv-&gt;olympic_rx_ring[0]);</div><div class='del'>-#endif </div><div class='del'>-</div><div class='del'>-	writel(SISR_RX_STATUS | SISR_RX_NOBUF,olympic_mmio+SISR_MASK_SUM);</div><div class='del'>-</div><div class='del'>-	/* setup tx ring */</div><div class='del'>-</div><div class='del'>-	writel(BMCTL_TX1_DIS,olympic_mmio+BMCTL_RWM); /* Yes, this enables TX channel 1 */</div><div class='del'>-	for(i=0;i&lt;OLYMPIC_TX_RING_SIZE;i++) </div><div class='del'>-		olympic_priv-&gt;olympic_tx_ring[i].buffer=cpu_to_le32(0xdeadbeef);</div><div class='del'>-</div><div class='del'>-	olympic_priv-&gt;free_tx_ring_entries=OLYMPIC_TX_RING_SIZE;</div><div class='del'>-	olympic_priv-&gt;tx_ring_dma_addr = pci_map_single(olympic_priv-&gt;pdev,olympic_priv-&gt;olympic_tx_ring,</div><div class='del'>-					 sizeof(struct olympic_tx_desc) * OLYMPIC_TX_RING_SIZE,PCI_DMA_TODEVICE) ; </div><div class='del'>-	writel(olympic_priv-&gt;tx_ring_dma_addr, olympic_mmio+TXDESCQ_1);</div><div class='del'>-	writel(olympic_priv-&gt;tx_ring_dma_addr, olympic_mmio+TXCDA_1);</div><div class='del'>-	writew(OLYMPIC_TX_RING_SIZE, olympic_mmio+TXDESCQCNT_1);</div><div class='del'>-	</div><div class='del'>-	olympic_priv-&gt;tx_status_ring_dma_addr = pci_map_single(olympic_priv-&gt;pdev, olympic_priv-&gt;olympic_tx_status_ring,</div><div class='del'>-						sizeof(struct olympic_tx_status) * OLYMPIC_TX_RING_SIZE, PCI_DMA_FROMDEVICE);</div><div class='del'>-	writel(olympic_priv-&gt;tx_status_ring_dma_addr,olympic_mmio+TXSTATQ_1);</div><div class='del'>-	writel(olympic_priv-&gt;tx_status_ring_dma_addr,olympic_mmio+TXCSA_1);</div><div class='del'>-	writew(OLYMPIC_TX_RING_SIZE,olympic_mmio+TXSTATQCNT_1);</div><div class='del'>-		</div><div class='del'>-	olympic_priv-&gt;tx_ring_free=0; /* next entry in tx ring to use */</div><div class='del'>-	olympic_priv-&gt;tx_ring_last_status=OLYMPIC_TX_RING_SIZE-1; /* last processed tx status */</div><div class='del'>-</div><div class='del'>-	writel(0xffffffff, olympic_mmio+EISR_RWM) ; /* clean the eisr */</div><div class='del'>-	writel(0,olympic_mmio+EISR) ; </div><div class='del'>-	writel(EISR_MASK_OPTIONS,olympic_mmio+EISR_MASK) ; /* enables most of the TX error interrupts */</div><div class='del'>-	writel(SISR_TX1_EOF | SISR_ADAPTER_CHECK | SISR_ARB_CMD | SISR_TRB_REPLY | SISR_ASB_FREE | SISR_ERR,olympic_mmio+SISR_MASK_SUM);</div><div class='del'>-</div><div class='del'>-#if OLYMPIC_DEBUG </div><div class='del'>-	printk("BMCTL: %x\n",readl(olympic_mmio+BMCTL_SUM));</div><div class='del'>-	printk("SISR MASK: %x\n",readl(olympic_mmio+SISR_MASK));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (olympic_priv-&gt;olympic_network_monitor) { </div><div class='del'>-		u8 __iomem *oat;</div><div class='del'>-		u8 __iomem *opt;</div><div class='del'>-		u8 addr[6];</div><div class='del'>-		oat = (olympic_priv-&gt;olympic_lap + olympic_priv-&gt;olympic_addr_table_addr);</div><div class='del'>-		opt = (olympic_priv-&gt;olympic_lap + olympic_priv-&gt;olympic_parms_addr);</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; 6; i++)</div><div class='del'>-			addr[i] = readb(oat+offsetof(struct olympic_adapter_addr_table,node_addr)+i);</div><div class='del'>-		printk("%s: Node Address: %pM\n", dev-&gt;name, addr);</div><div class='del'>-		printk("%s: Functional Address: %02x:%02x:%02x:%02x\n",dev-&gt;name, </div><div class='del'>-			readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)), </div><div class='del'>-			readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)+1),</div><div class='del'>-			readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)+2),</div><div class='del'>-			readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)+3));</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; 6; i++)</div><div class='del'>-			addr[i] = readb(opt+offsetof(struct olympic_parameters_table, up_node_addr)+i);</div><div class='del'>-		printk("%s: NAUN Address: %pM\n", dev-&gt;name, addr);</div><div class='del'>-	}</div><div class='del'>-	</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	return -EIO;</div><div class='del'>-}	</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	When we enter the rx routine we do not know how many frames have been </div><div class='del'>- *	queued on the rx channel.  Therefore we start at the next rx status</div><div class='del'>- *	position and travel around the receive ring until we have completed</div><div class='del'>- *	all the frames.</div><div class='del'>- *</div><div class='del'>- *	This means that we may process the frame before we receive the end</div><div class='del'>- *	of frame interrupt. This is why we always test the status instead</div><div class='del'>- *	of blindly processing the next frame.</div><div class='del'>- *</div><div class='del'>- *	We also remove the last 4 bytes from the packet as well, these are</div><div class='del'>- *	just token ring trailer info and upset protocols that don't check </div><div class='del'>- *	their own length, i.e. SNA. </div><div class='del'>- *	</div><div class='del'>- */</div><div class='del'>-static void olympic_rx(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct olympic_private *olympic_priv=netdev_priv(dev);</div><div class='del'>-	u8 __iomem *olympic_mmio=olympic_priv-&gt;olympic_mmio;</div><div class='del'>-	struct olympic_rx_status *rx_status;</div><div class='del'>-	struct olympic_rx_desc *rx_desc ; </div><div class='del'>-	int rx_ring_last_received,length, buffer_cnt, cpy_length, frag_len;</div><div class='del'>-	struct sk_buff *skb, *skb2;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	rx_status=&amp;(olympic_priv-&gt;olympic_rx_status_ring[(olympic_priv-&gt;rx_status_last_received + 1) &amp; (OLYMPIC_RX_RING_SIZE - 1)]) ; </div><div class='del'>- </div><div class='del'>-	while (rx_status-&gt;status_buffercnt) { </div><div class='del'>-                u32 l_status_buffercnt;</div><div class='del'>-</div><div class='del'>-		olympic_priv-&gt;rx_status_last_received++ ;</div><div class='del'>-		olympic_priv-&gt;rx_status_last_received &amp;= (OLYMPIC_RX_RING_SIZE -1);</div><div class='del'>-#if OLYMPIC_DEBUG</div><div class='del'>-		printk("rx status: %x rx len: %x\n", le32_to_cpu(rx_status-&gt;status_buffercnt), le32_to_cpu(rx_status-&gt;fragmentcnt_framelen));</div><div class='del'>-#endif</div><div class='del'>-		length = le32_to_cpu(rx_status-&gt;fragmentcnt_framelen) &amp; 0xffff;</div><div class='del'>-		buffer_cnt = le32_to_cpu(rx_status-&gt;status_buffercnt) &amp; 0xffff; </div><div class='del'>-		i = buffer_cnt ; /* Need buffer_cnt later for rxenq update */ </div><div class='del'>-		frag_len = le32_to_cpu(rx_status-&gt;fragmentcnt_framelen) &gt;&gt; 16; </div><div class='del'>-</div><div class='del'>-#if OLYMPIC_DEBUG </div><div class='del'>-		printk("length: %x, frag_len: %x, buffer_cnt: %x\n", length, frag_len, buffer_cnt);</div><div class='del'>-#endif</div><div class='del'>-                l_status_buffercnt = le32_to_cpu(rx_status-&gt;status_buffercnt);</div><div class='del'>-		if(l_status_buffercnt &amp; 0xC0000000) {</div><div class='del'>-			if (l_status_buffercnt &amp; 0x3B000000) {</div><div class='del'>-				if (olympic_priv-&gt;olympic_message_level) {</div><div class='del'>-					if (l_status_buffercnt &amp; (1&lt;&lt;29))  /* Rx Frame Truncated */</div><div class='del'>-						printk(KERN_WARNING "%s: Rx Frame Truncated\n",dev-&gt;name);</div><div class='del'>-					if (l_status_buffercnt &amp; (1&lt;&lt;28)) /*Rx receive overrun */</div><div class='del'>-						printk(KERN_WARNING "%s: Rx Frame Receive overrun\n",dev-&gt;name);</div><div class='del'>-					if (l_status_buffercnt &amp; (1&lt;&lt;27)) /* No receive buffers */</div><div class='del'>-						printk(KERN_WARNING "%s: No receive buffers\n",dev-&gt;name);</div><div class='del'>-					if (l_status_buffercnt &amp; (1&lt;&lt;25)) /* Receive frame error detect */</div><div class='del'>-						printk(KERN_WARNING "%s: Receive frame error detect\n",dev-&gt;name);</div><div class='del'>-					if (l_status_buffercnt &amp; (1&lt;&lt;24)) /* Received Error Detect */</div><div class='del'>-						printk(KERN_WARNING "%s: Received Error Detect\n",dev-&gt;name);</div><div class='del'>-				} </div><div class='del'>-				olympic_priv-&gt;rx_ring_last_received += i ; </div><div class='del'>-				olympic_priv-&gt;rx_ring_last_received &amp;= (OLYMPIC_RX_RING_SIZE -1) ; </div><div class='del'>-				dev-&gt;stats.rx_errors++;</div><div class='del'>-			} else {	</div><div class='del'>-			</div><div class='del'>-				if (buffer_cnt == 1) {</div><div class='del'>-					skb = dev_alloc_skb(max_t(int, olympic_priv-&gt;pkt_buf_sz,length)) ; </div><div class='del'>-				} else {</div><div class='del'>-					skb = dev_alloc_skb(length) ; </div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-				if (skb == NULL) {</div><div class='del'>-					printk(KERN_WARNING "%s: Not enough memory to copy packet to upper layers.\n",dev-&gt;name) ;</div><div class='del'>-					dev-&gt;stats.rx_dropped++;</div><div class='del'>-					/* Update counters even though we don't transfer the frame */</div><div class='del'>-					olympic_priv-&gt;rx_ring_last_received += i ; </div><div class='del'>-					olympic_priv-&gt;rx_ring_last_received &amp;= (OLYMPIC_RX_RING_SIZE -1) ;  </div><div class='del'>-				} else  {</div><div class='del'>-					/* Optimise based upon number of buffers used. </div><div class='del'>-			   	   	   If only one buffer is used we can simply swap the buffers around.</div><div class='del'>-			   	   	   If more than one then we must use the new buffer and copy the information</div><div class='del'>-			   	   	   first. Ideally all frames would be in a single buffer, this can be tuned by</div><div class='del'>-                               	   	   altering the buffer size. If the length of the packet is less than</div><div class='del'>-					   1500 bytes we're going to copy it over anyway to stop packets getting</div><div class='del'>-					   dropped from sockets with buffers smaller than our pkt_buf_sz. */</div><div class='del'>-				</div><div class='del'>- 					if (buffer_cnt==1) {</div><div class='del'>-						olympic_priv-&gt;rx_ring_last_received++ ; </div><div class='del'>-						olympic_priv-&gt;rx_ring_last_received &amp;= (OLYMPIC_RX_RING_SIZE -1);</div><div class='del'>-						rx_ring_last_received = olympic_priv-&gt;rx_ring_last_received ;</div><div class='del'>-						if (length &gt; 1500) { </div><div class='del'>-							skb2=olympic_priv-&gt;rx_ring_skb[rx_ring_last_received] ; </div><div class='del'>-							/* unmap buffer */</div><div class='del'>-							pci_unmap_single(olympic_priv-&gt;pdev,</div><div class='del'>-								le32_to_cpu(olympic_priv-&gt;olympic_rx_ring[rx_ring_last_received].buffer), </div><div class='del'>-								olympic_priv-&gt;pkt_buf_sz,PCI_DMA_FROMDEVICE) ; </div><div class='del'>-							skb_put(skb2,length-4);</div><div class='del'>-							skb2-&gt;protocol = tr_type_trans(skb2,dev);</div><div class='del'>-							olympic_priv-&gt;olympic_rx_ring[rx_ring_last_received].buffer = </div><div class='del'>-								cpu_to_le32(pci_map_single(olympic_priv-&gt;pdev, skb-&gt;data, </div><div class='del'>-								olympic_priv-&gt;pkt_buf_sz, PCI_DMA_FROMDEVICE));</div><div class='del'>-							olympic_priv-&gt;olympic_rx_ring[rx_ring_last_received].res_length = </div><div class='del'>-								cpu_to_le32(olympic_priv-&gt;pkt_buf_sz); </div><div class='del'>-							olympic_priv-&gt;rx_ring_skb[rx_ring_last_received] = skb ; </div><div class='del'>-							netif_rx(skb2) ; </div><div class='del'>-						} else { </div><div class='del'>-							pci_dma_sync_single_for_cpu(olympic_priv-&gt;pdev,</div><div class='del'>-								le32_to_cpu(olympic_priv-&gt;olympic_rx_ring[rx_ring_last_received].buffer),</div><div class='del'>-								olympic_priv-&gt;pkt_buf_sz,PCI_DMA_FROMDEVICE) ; </div><div class='del'>-							skb_copy_from_linear_data(olympic_priv-&gt;rx_ring_skb[rx_ring_last_received],</div><div class='del'>-								      skb_put(skb,length - 4),</div><div class='del'>-								      length - 4);</div><div class='del'>-							pci_dma_sync_single_for_device(olympic_priv-&gt;pdev,</div><div class='del'>-								le32_to_cpu(olympic_priv-&gt;olympic_rx_ring[rx_ring_last_received].buffer),</div><div class='del'>-								olympic_priv-&gt;pkt_buf_sz,PCI_DMA_FROMDEVICE) ;</div><div class='del'>-							skb-&gt;protocol = tr_type_trans(skb,dev) ; </div><div class='del'>-							netif_rx(skb) ; </div><div class='del'>-						} </div><div class='del'>-					} else {</div><div class='del'>-						do { /* Walk the buffers */ </div><div class='del'>-							olympic_priv-&gt;rx_ring_last_received++ ; </div><div class='del'>-							olympic_priv-&gt;rx_ring_last_received &amp;= (OLYMPIC_RX_RING_SIZE -1);</div><div class='del'>-							rx_ring_last_received = olympic_priv-&gt;rx_ring_last_received ; </div><div class='del'>-							pci_dma_sync_single_for_cpu(olympic_priv-&gt;pdev,</div><div class='del'>-								le32_to_cpu(olympic_priv-&gt;olympic_rx_ring[rx_ring_last_received].buffer),</div><div class='del'>-								olympic_priv-&gt;pkt_buf_sz,PCI_DMA_FROMDEVICE) ; </div><div class='del'>-							rx_desc = &amp;(olympic_priv-&gt;olympic_rx_ring[rx_ring_last_received]);</div><div class='del'>-							cpy_length = (i == 1 ? frag_len : le32_to_cpu(rx_desc-&gt;res_length)); </div><div class='del'>-							skb_copy_from_linear_data(olympic_priv-&gt;rx_ring_skb[rx_ring_last_received],</div><div class='del'>-								      skb_put(skb, cpy_length),</div><div class='del'>-								      cpy_length);</div><div class='del'>-							pci_dma_sync_single_for_device(olympic_priv-&gt;pdev,</div><div class='del'>-								le32_to_cpu(olympic_priv-&gt;olympic_rx_ring[rx_ring_last_received].buffer),</div><div class='del'>-								olympic_priv-&gt;pkt_buf_sz,PCI_DMA_FROMDEVICE) ;</div><div class='del'>-						} while (--i) ; </div><div class='del'>-						skb_trim(skb,skb-&gt;len-4) ; </div><div class='del'>-						skb-&gt;protocol = tr_type_trans(skb,dev);</div><div class='del'>-						netif_rx(skb) ; </div><div class='del'>-					} </div><div class='del'>-					dev-&gt;stats.rx_packets++ ;</div><div class='del'>-					dev-&gt;stats.rx_bytes += length ;</div><div class='del'>-				} /* if skb == null */</div><div class='del'>-			} /* If status &amp; 0x3b */</div><div class='del'>-</div><div class='del'>-		} else { /*if buffercnt &amp; 0xC */</div><div class='del'>-			olympic_priv-&gt;rx_ring_last_received += i ; </div><div class='del'>-			olympic_priv-&gt;rx_ring_last_received &amp;= (OLYMPIC_RX_RING_SIZE - 1) ; </div><div class='del'>-		} </div><div class='del'>-</div><div class='del'>-		rx_status-&gt;fragmentcnt_framelen = 0 ; </div><div class='del'>-		rx_status-&gt;status_buffercnt = 0 ; </div><div class='del'>-		rx_status = &amp;(olympic_priv-&gt;olympic_rx_status_ring[(olympic_priv-&gt;rx_status_last_received+1) &amp; (OLYMPIC_RX_RING_SIZE -1) ]);</div><div class='del'>-</div><div class='del'>-		writew((((readw(olympic_mmio+RXENQ)) &amp; 0x8000) ^ 0x8000) |  buffer_cnt , olympic_mmio+RXENQ); </div><div class='del'>-	} /* while */</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void olympic_freemem(struct net_device *dev) </div><div class='del'>-{ </div><div class='del'>-	struct olympic_private *olympic_priv=netdev_priv(dev);</div><div class='del'>-	int i;</div><div class='del'>-			</div><div class='del'>-	for(i=0;i&lt;OLYMPIC_RX_RING_SIZE;i++) {</div><div class='del'>-		if (olympic_priv-&gt;rx_ring_skb[olympic_priv-&gt;rx_status_last_received] != NULL) {</div><div class='del'>-			dev_kfree_skb_irq(olympic_priv-&gt;rx_ring_skb[olympic_priv-&gt;rx_status_last_received]);</div><div class='del'>-			olympic_priv-&gt;rx_ring_skb[olympic_priv-&gt;rx_status_last_received] = NULL;</div><div class='del'>-		}</div><div class='del'>-		if (olympic_priv-&gt;olympic_rx_ring[olympic_priv-&gt;rx_status_last_received].buffer != cpu_to_le32(0xdeadbeef)) {</div><div class='del'>-			pci_unmap_single(olympic_priv-&gt;pdev, </div><div class='del'>-			le32_to_cpu(olympic_priv-&gt;olympic_rx_ring[olympic_priv-&gt;rx_status_last_received].buffer),</div><div class='del'>-			olympic_priv-&gt;pkt_buf_sz, PCI_DMA_FROMDEVICE);</div><div class='del'>-		}</div><div class='del'>-		olympic_priv-&gt;rx_status_last_received++;</div><div class='del'>-		olympic_priv-&gt;rx_status_last_received&amp;=OLYMPIC_RX_RING_SIZE-1;</div><div class='del'>-	}</div><div class='del'>-	/* unmap rings */</div><div class='del'>-	pci_unmap_single(olympic_priv-&gt;pdev, olympic_priv-&gt;rx_status_ring_dma_addr, </div><div class='del'>-		sizeof(struct olympic_rx_status) * OLYMPIC_RX_RING_SIZE, PCI_DMA_FROMDEVICE);</div><div class='del'>-	pci_unmap_single(olympic_priv-&gt;pdev, olympic_priv-&gt;rx_ring_dma_addr,</div><div class='del'>-		sizeof(struct olympic_rx_desc) * OLYMPIC_RX_RING_SIZE, PCI_DMA_TODEVICE);</div><div class='del'>-</div><div class='del'>-	pci_unmap_single(olympic_priv-&gt;pdev, olympic_priv-&gt;tx_status_ring_dma_addr, </div><div class='del'>-		sizeof(struct olympic_tx_status) * OLYMPIC_TX_RING_SIZE, PCI_DMA_FROMDEVICE);</div><div class='del'>-	pci_unmap_single(olympic_priv-&gt;pdev, olympic_priv-&gt;tx_ring_dma_addr, </div><div class='del'>-		sizeof(struct olympic_tx_desc) * OLYMPIC_TX_RING_SIZE, PCI_DMA_TODEVICE);</div><div class='del'>-</div><div class='del'>-	return ; </div><div class='del'>-}</div><div class='del'>- </div><div class='del'>-static irqreturn_t olympic_interrupt(int irq, void *dev_id) </div><div class='del'>-{</div><div class='del'>-	struct net_device *dev= (struct net_device *)dev_id;</div><div class='del'>-	struct olympic_private *olympic_priv=netdev_priv(dev);</div><div class='del'>-	u8 __iomem *olympic_mmio=olympic_priv-&gt;olympic_mmio;</div><div class='del'>-	u32 sisr;</div><div class='del'>-	u8 __iomem *adapter_check_area ; </div><div class='del'>-	</div><div class='del'>-	/* </div><div class='del'>-	 *  Read sisr but don't reset it yet. </div><div class='del'>-	 *  The indication bit may have been set but the interrupt latch</div><div class='del'>-	 *  bit may not be set, so we'd lose the interrupt later. </div><div class='del'>-	 */ </div><div class='del'>-	sisr=readl(olympic_mmio+SISR) ; </div><div class='del'>-	if (!(sisr &amp; SISR_MI)) /* Interrupt isn't for us */ </div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	sisr=readl(olympic_mmio+SISR_RR) ;  /* Read &amp; Reset sisr */ </div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;olympic_priv-&gt;olympic_lock);</div><div class='del'>-</div><div class='del'>-	/* Hotswap gives us this on removal */</div><div class='del'>-	if (sisr == 0xffffffff) { </div><div class='del'>-		printk(KERN_WARNING "%s: Hotswap adapter removal.\n",dev-&gt;name) ; </div><div class='del'>-		spin_unlock(&amp;olympic_priv-&gt;olympic_lock) ; </div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	} </div><div class='del'>-		</div><div class='del'>-	if (sisr &amp; (SISR_SRB_REPLY | SISR_TX1_EOF | SISR_RX_STATUS | SISR_ADAPTER_CHECK |  </div><div class='del'>-			SISR_ASB_FREE | SISR_ARB_CMD | SISR_TRB_REPLY | SISR_RX_NOBUF | SISR_ERR)) {  </div><div class='del'>-	</div><div class='del'>-		/* If we ever get this the adapter is seriously dead. Only a reset is going to </div><div class='del'>-		 * bring it back to life. We're talking pci bus errors and such like :( */ </div><div class='del'>-		if((sisr &amp; SISR_ERR) &amp;&amp; (readl(olympic_mmio+EISR) &amp; EISR_MASK_OPTIONS)) {</div><div class='del'>-			printk(KERN_ERR "Olympic: EISR Error, EISR=%08x\n",readl(olympic_mmio+EISR)) ; </div><div class='del'>-			printk(KERN_ERR "The adapter must be reset to clear this condition.\n") ; </div><div class='del'>-			printk(KERN_ERR "Please report this error to the driver maintainer and/\n") ; </div><div class='del'>-			printk(KERN_ERR "or the linux-tr mailing list.\n") ; </div><div class='del'>-			wake_up_interruptible(&amp;olympic_priv-&gt;srb_wait);</div><div class='del'>-			spin_unlock(&amp;olympic_priv-&gt;olympic_lock) ; </div><div class='del'>-			return IRQ_HANDLED;</div><div class='del'>-		} /* SISR_ERR */</div><div class='del'>-</div><div class='del'>-		if(sisr &amp; SISR_SRB_REPLY) {</div><div class='del'>-			if(olympic_priv-&gt;srb_queued==1) {</div><div class='del'>-				wake_up_interruptible(&amp;olympic_priv-&gt;srb_wait);</div><div class='del'>-			} else if (olympic_priv-&gt;srb_queued==2) { </div><div class='del'>-				olympic_srb_bh(dev) ; </div><div class='del'>-			}</div><div class='del'>-			olympic_priv-&gt;srb_queued=0;</div><div class='del'>-		} /* SISR_SRB_REPLY */</div><div class='del'>-</div><div class='del'>-		/* We shouldn't ever miss the Tx interrupt, but the you never know, hence the loop to ensure</div><div class='del'>-		   we get all tx completions. */</div><div class='del'>-		if (sisr &amp; SISR_TX1_EOF) {</div><div class='del'>-			while(olympic_priv-&gt;olympic_tx_status_ring[(olympic_priv-&gt;tx_ring_last_status + 1) &amp; (OLYMPIC_TX_RING_SIZE-1)].status) { </div><div class='del'>-				olympic_priv-&gt;tx_ring_last_status++;</div><div class='del'>-				olympic_priv-&gt;tx_ring_last_status &amp;= (OLYMPIC_TX_RING_SIZE-1);</div><div class='del'>-				olympic_priv-&gt;free_tx_ring_entries++;</div><div class='del'>-				dev-&gt;stats.tx_bytes += olympic_priv-&gt;tx_ring_skb[olympic_priv-&gt;tx_ring_last_status]-&gt;len;</div><div class='del'>-				dev-&gt;stats.tx_packets++ ;</div><div class='del'>-				pci_unmap_single(olympic_priv-&gt;pdev, </div><div class='del'>-					le32_to_cpu(olympic_priv-&gt;olympic_tx_ring[olympic_priv-&gt;tx_ring_last_status].buffer), </div><div class='del'>-					olympic_priv-&gt;tx_ring_skb[olympic_priv-&gt;tx_ring_last_status]-&gt;len,PCI_DMA_TODEVICE);</div><div class='del'>-				dev_kfree_skb_irq(olympic_priv-&gt;tx_ring_skb[olympic_priv-&gt;tx_ring_last_status]);</div><div class='del'>-				olympic_priv-&gt;olympic_tx_ring[olympic_priv-&gt;tx_ring_last_status].buffer=cpu_to_le32(0xdeadbeef);</div><div class='del'>-				olympic_priv-&gt;olympic_tx_status_ring[olympic_priv-&gt;tx_ring_last_status].status=0;</div><div class='del'>-			}</div><div class='del'>-			netif_wake_queue(dev);</div><div class='del'>-		} /* SISR_TX1_EOF */</div><div class='del'>-	</div><div class='del'>-		if (sisr &amp; SISR_RX_STATUS) {</div><div class='del'>-			olympic_rx(dev);</div><div class='del'>-		} /* SISR_RX_STATUS */</div><div class='del'>-	</div><div class='del'>-		if (sisr &amp; SISR_ADAPTER_CHECK) {</div><div class='del'>-			netif_stop_queue(dev);</div><div class='del'>-			printk(KERN_WARNING "%s: Adapter Check Interrupt Raised, 8 bytes of information follow:\n", dev-&gt;name);</div><div class='del'>-			writel(readl(olympic_mmio+LAPWWC),olympic_mmio+LAPA);</div><div class='del'>-			adapter_check_area = olympic_priv-&gt;olympic_lap + ((readl(olympic_mmio+LAPWWC)) &amp; (~0xf800)) ;</div><div class='del'>-			printk(KERN_WARNING "%s: Bytes %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",dev-&gt;name, readb(adapter_check_area+0), readb(adapter_check_area+1), readb(adapter_check_area+2), readb(adapter_check_area+3), readb(adapter_check_area+4), readb(adapter_check_area+5), readb(adapter_check_area+6), readb(adapter_check_area+7)) ; </div><div class='del'>-			spin_unlock(&amp;olympic_priv-&gt;olympic_lock) ; </div><div class='del'>-			return IRQ_HANDLED; </div><div class='del'>-		} /* SISR_ADAPTER_CHECK */</div><div class='del'>-	</div><div class='del'>-		if (sisr &amp; SISR_ASB_FREE) {</div><div class='del'>-			/* Wake up anything that is waiting for the asb response */  </div><div class='del'>-			if (olympic_priv-&gt;asb_queued) {</div><div class='del'>-				olympic_asb_bh(dev) ; </div><div class='del'>-			}</div><div class='del'>-		} /* SISR_ASB_FREE */</div><div class='del'>-	</div><div class='del'>-		if (sisr &amp; SISR_ARB_CMD) {</div><div class='del'>-			olympic_arb_cmd(dev) ; </div><div class='del'>-		} /* SISR_ARB_CMD */</div><div class='del'>-	</div><div class='del'>-		if (sisr &amp; SISR_TRB_REPLY) {</div><div class='del'>-			/* Wake up anything that is waiting for the trb response */</div><div class='del'>-			if (olympic_priv-&gt;trb_queued) {</div><div class='del'>-				wake_up_interruptible(&amp;olympic_priv-&gt;trb_wait);</div><div class='del'>-			}</div><div class='del'>-			olympic_priv-&gt;trb_queued = 0 ; </div><div class='del'>-		} /* SISR_TRB_REPLY */	</div><div class='del'>-	</div><div class='del'>-		if (sisr &amp; SISR_RX_NOBUF) {</div><div class='del'>-			/* According to the documentation, we don't have to do anything, but trapping it keeps it out of</div><div class='del'>-                  	   	   /var/log/messages.  */</div><div class='del'>-		} /* SISR_RX_NOBUF */</div><div class='del'>-	} else { </div><div class='del'>-		printk(KERN_WARNING "%s: Unexpected interrupt: %x\n",dev-&gt;name, sisr);</div><div class='del'>-		printk(KERN_WARNING "%s: SISR_MASK: %x\n",dev-&gt;name, readl(olympic_mmio+SISR_MASK)) ;</div><div class='del'>-	} /* One if the interrupts we want */</div><div class='del'>-	writel(SISR_MI,olympic_mmio+SISR_MASK_SUM);</div><div class='del'>-	</div><div class='del'>-	spin_unlock(&amp;olympic_priv-&gt;olympic_lock) ; </div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}	</div><div class='del'>-</div><div class='del'>-static netdev_tx_t olympic_xmit(struct sk_buff *skb,</div><div class='del'>-				      struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct olympic_private *olympic_priv=netdev_priv(dev);</div><div class='del'>-	u8 __iomem *olympic_mmio=olympic_priv-&gt;olympic_mmio;</div><div class='del'>-	unsigned long flags ; </div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;olympic_priv-&gt;olympic_lock, flags);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	</div><div class='del'>-	if(olympic_priv-&gt;free_tx_ring_entries) {</div><div class='del'>-		olympic_priv-&gt;olympic_tx_ring[olympic_priv-&gt;tx_ring_free].buffer = </div><div class='del'>-			cpu_to_le32(pci_map_single(olympic_priv-&gt;pdev, skb-&gt;data, skb-&gt;len,PCI_DMA_TODEVICE));</div><div class='del'>-		olympic_priv-&gt;olympic_tx_ring[olympic_priv-&gt;tx_ring_free].status_length = cpu_to_le32(skb-&gt;len | (0x80000000));</div><div class='del'>-		olympic_priv-&gt;tx_ring_skb[olympic_priv-&gt;tx_ring_free]=skb;</div><div class='del'>-		olympic_priv-&gt;free_tx_ring_entries--;</div><div class='del'>-</div><div class='del'>-        	olympic_priv-&gt;tx_ring_free++;</div><div class='del'>-        	olympic_priv-&gt;tx_ring_free &amp;= (OLYMPIC_TX_RING_SIZE-1);</div><div class='del'>-		writew((((readw(olympic_mmio+TXENQ_1)) &amp; 0x8000) ^ 0x8000) | 1,olympic_mmio+TXENQ_1);</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-		spin_unlock_irqrestore(&amp;olympic_priv-&gt;olympic_lock,flags);</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-	} else {</div><div class='del'>-		spin_unlock_irqrestore(&amp;olympic_priv-&gt;olympic_lock,flags);</div><div class='del'>-		return NETDEV_TX_BUSY;</div><div class='del'>-	} </div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-	</div><div class='del'>-</div><div class='del'>-static int olympic_close(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct olympic_private *olympic_priv=netdev_priv(dev);</div><div class='del'>-	u8 __iomem *olympic_mmio=olympic_priv-&gt;olympic_mmio,*srb;</div><div class='del'>-	unsigned long t,flags;</div><div class='del'>-</div><div class='del'>-	DECLARE_WAITQUEUE(wait,current) ; </div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	</div><div class='del'>-	writel(olympic_priv-&gt;srb,olympic_mmio+LAPA);</div><div class='del'>-	srb=olympic_priv-&gt;olympic_lap + (olympic_priv-&gt;srb &amp; (~0xf800));</div><div class='del'>-	</div><div class='del'>-    	writeb(SRB_CLOSE_ADAPTER,srb+0);</div><div class='del'>-	writeb(0,srb+1);</div><div class='del'>-	writeb(OLYMPIC_CLEAR_RET_CODE,srb+2);</div><div class='del'>-</div><div class='del'>-	add_wait_queue(&amp;olympic_priv-&gt;srb_wait,&amp;wait) ;</div><div class='del'>-	set_current_state(TASK_INTERRUPTIBLE) ; </div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;olympic_priv-&gt;olympic_lock,flags);</div><div class='del'>-	olympic_priv-&gt;srb_queued=1;</div><div class='del'>-</div><div class='del'>-	writel(LISR_SRB_CMD,olympic_mmio+LISR_SUM);</div><div class='del'>-	spin_unlock_irqrestore(&amp;olympic_priv-&gt;olympic_lock,flags);</div><div class='del'>-</div><div class='del'>-	while(olympic_priv-&gt;srb_queued) {</div><div class='del'>-</div><div class='del'>-		t = schedule_timeout_interruptible(60*HZ);</div><div class='del'>-</div><div class='del'>-        	if(signal_pending(current))	{            </div><div class='del'>-			printk(KERN_WARNING "%s: SRB timed out.\n",dev-&gt;name);</div><div class='del'>-            		printk(KERN_WARNING "SISR=%x MISR=%x\n",readl(olympic_mmio+SISR),readl(olympic_mmio+LISR));</div><div class='del'>-            		olympic_priv-&gt;srb_queued=0;</div><div class='del'>-            		break;</div><div class='del'>-        	}</div><div class='del'>-</div><div class='del'>-		if (t == 0) { </div><div class='del'>-			printk(KERN_WARNING "%s: SRB timed out. May not be fatal.\n",dev-&gt;name);</div><div class='del'>-		} </div><div class='del'>-		olympic_priv-&gt;srb_queued=0;</div><div class='del'>-    	}</div><div class='del'>-	remove_wait_queue(&amp;olympic_priv-&gt;srb_wait,&amp;wait) ; </div><div class='del'>-</div><div class='del'>-	olympic_priv-&gt;rx_status_last_received++;</div><div class='del'>-	olympic_priv-&gt;rx_status_last_received&amp;=OLYMPIC_RX_RING_SIZE-1;</div><div class='del'>-</div><div class='del'>-	olympic_freemem(dev) ; 	</div><div class='del'>-</div><div class='del'>-	/* reset tx/rx fifo's and busmaster logic */</div><div class='del'>-</div><div class='del'>-	writel(readl(olympic_mmio+BCTL)|(3&lt;&lt;13),olympic_mmio+BCTL);</div><div class='del'>-	udelay(1);</div><div class='del'>-	writel(readl(olympic_mmio+BCTL)&amp;~(3&lt;&lt;13),olympic_mmio+BCTL);</div><div class='del'>-</div><div class='del'>-#if OLYMPIC_DEBUG</div><div class='del'>-	{</div><div class='del'>-	int i ; </div><div class='del'>-	printk("srb(%p): ",srb);</div><div class='del'>-	for(i=0;i&lt;4;i++)</div><div class='del'>-		printk("%x ",readb(srb+i));</div><div class='del'>-	printk("\n");</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	free_irq(dev-&gt;irq,dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-	</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void olympic_set_rx_mode(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct olympic_private *olympic_priv = netdev_priv(dev);</div><div class='del'>-   	u8 __iomem *olympic_mmio = olympic_priv-&gt;olympic_mmio ; </div><div class='del'>-	u8 options = 0; </div><div class='del'>-	u8 __iomem *srb;</div><div class='del'>-	struct netdev_hw_addr *ha;</div><div class='del'>-	unsigned char dev_mc_address[4] ; </div><div class='del'>-</div><div class='del'>-	writel(olympic_priv-&gt;srb,olympic_mmio+LAPA);</div><div class='del'>-	srb=olympic_priv-&gt;olympic_lap + (olympic_priv-&gt;srb &amp; (~0xf800));</div><div class='del'>-	options = olympic_priv-&gt;olympic_copy_all_options; </div><div class='del'>-</div><div class='del'>-	if (dev-&gt;flags&amp;IFF_PROMISC)  </div><div class='del'>-		options |= 0x61 ;</div><div class='del'>-	else</div><div class='del'>-		options &amp;= ~0x61 ; </div><div class='del'>-</div><div class='del'>-	/* Only issue the srb if there is a change in options */</div><div class='del'>-</div><div class='del'>-	if ((options ^ olympic_priv-&gt;olympic_copy_all_options)) { </div><div class='del'>-	</div><div class='del'>-		/* Now to issue the srb command to alter the copy.all.options */</div><div class='del'>-	</div><div class='del'>-		writeb(SRB_MODIFY_RECEIVE_OPTIONS,srb);</div><div class='del'>-		writeb(0,srb+1);</div><div class='del'>-		writeb(OLYMPIC_CLEAR_RET_CODE,srb+2);</div><div class='del'>-		writeb(0,srb+3);</div><div class='del'>-		writeb(olympic_priv-&gt;olympic_receive_options,srb+4);</div><div class='del'>-		writeb(options,srb+5);</div><div class='del'>-</div><div class='del'>-		olympic_priv-&gt;srb_queued=2; /* Can't sleep, use srb_bh */</div><div class='del'>-</div><div class='del'>-		writel(LISR_SRB_CMD,olympic_mmio+LISR_SUM);</div><div class='del'>-</div><div class='del'>-		olympic_priv-&gt;olympic_copy_all_options = options ;</div><div class='del'>-		</div><div class='del'>-		return ;  </div><div class='del'>-	} </div><div class='del'>-</div><div class='del'>-	/* Set the functional addresses we need for multicast */</div><div class='del'>-</div><div class='del'>-	dev_mc_address[0] = dev_mc_address[1] = dev_mc_address[2] = dev_mc_address[3] = 0 ; </div><div class='del'>-</div><div class='del'>-	netdev_for_each_mc_addr(ha, dev) {</div><div class='del'>-		dev_mc_address[0] |= ha-&gt;addr[2];</div><div class='del'>-		dev_mc_address[1] |= ha-&gt;addr[3];</div><div class='del'>-		dev_mc_address[2] |= ha-&gt;addr[4];</div><div class='del'>-		dev_mc_address[3] |= ha-&gt;addr[5];</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	writeb(SRB_SET_FUNC_ADDRESS,srb+0);</div><div class='del'>-	writeb(0,srb+1);</div><div class='del'>-	writeb(OLYMPIC_CLEAR_RET_CODE,srb+2);</div><div class='del'>-	writeb(0,srb+3);</div><div class='del'>-	writeb(0,srb+4);</div><div class='del'>-	writeb(0,srb+5);</div><div class='del'>-	writeb(dev_mc_address[0],srb+6);</div><div class='del'>-	writeb(dev_mc_address[1],srb+7);</div><div class='del'>-	writeb(dev_mc_address[2],srb+8);</div><div class='del'>-	writeb(dev_mc_address[3],srb+9);</div><div class='del'>-</div><div class='del'>-	olympic_priv-&gt;srb_queued = 2 ;</div><div class='del'>-	writel(LISR_SRB_CMD,olympic_mmio+LISR_SUM);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void olympic_srb_bh(struct net_device *dev) </div><div class='del'>-{ </div><div class='del'>-	struct olympic_private *olympic_priv = netdev_priv(dev);</div><div class='del'>-   	u8 __iomem *olympic_mmio = olympic_priv-&gt;olympic_mmio ; </div><div class='del'>-	u8 __iomem *srb;</div><div class='del'>-</div><div class='del'>-	writel(olympic_priv-&gt;srb,olympic_mmio+LAPA);</div><div class='del'>-	srb=olympic_priv-&gt;olympic_lap + (olympic_priv-&gt;srb &amp; (~0xf800));</div><div class='del'>-</div><div class='del'>-	switch (readb(srb)) { </div><div class='del'>-</div><div class='del'>-		/* SRB_MODIFY_RECEIVE_OPTIONS i.e. set_multicast_list options (promiscuous) </div><div class='del'>-                 * At some point we should do something if we get an error, such as</div><div class='del'>-                 * resetting the IFF_PROMISC flag in dev</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		case SRB_MODIFY_RECEIVE_OPTIONS:</div><div class='del'>-			switch (readb(srb+2)) { </div><div class='del'>-				case 0x01:</div><div class='del'>-					printk(KERN_WARNING "%s: Unrecognized srb command\n",dev-&gt;name) ; </div><div class='del'>-					break ; </div><div class='del'>-				case 0x04:</div><div class='del'>-					printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n",dev-&gt;name);</div><div class='del'>-					break ; </div><div class='del'>-				default:</div><div class='del'>-					if (olympic_priv-&gt;olympic_message_level) </div><div class='del'>-						printk(KERN_WARNING "%s: Receive Options Modified to %x,%x\n",dev-&gt;name,olympic_priv-&gt;olympic_copy_all_options, olympic_priv-&gt;olympic_receive_options) ; </div><div class='del'>-					break ; 	</div><div class='del'>-			} /* switch srb[2] */ </div><div class='del'>-			break ;</div><div class='del'>-		</div><div class='del'>-		/* SRB_SET_GROUP_ADDRESS - Multicast group setting </div><div class='del'>-                 */</div><div class='del'>-</div><div class='del'>-		case SRB_SET_GROUP_ADDRESS:</div><div class='del'>-			switch (readb(srb+2)) { </div><div class='del'>-				case 0x00:</div><div class='del'>-					break ; </div><div class='del'>-				case 0x01:</div><div class='del'>-					printk(KERN_WARNING "%s: Unrecognized srb command\n",dev-&gt;name);</div><div class='del'>-					break ;</div><div class='del'>-				case 0x04:</div><div class='del'>-					printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n",dev-&gt;name); </div><div class='del'>-					break ;</div><div class='del'>-				case 0x3c:</div><div class='del'>-					printk(KERN_WARNING "%s: Group/Functional address indicator bits not set correctly\n",dev-&gt;name) ; </div><div class='del'>-					break ;</div><div class='del'>-				case 0x3e: /* If we ever implement individual multicast addresses, will need to deal with this */</div><div class='del'>-					printk(KERN_WARNING "%s: Group address registers full\n",dev-&gt;name) ; </div><div class='del'>-					break ;  </div><div class='del'>-				case 0x55:</div><div class='del'>-					printk(KERN_INFO "%s: Group Address already set.\n",dev-&gt;name) ; </div><div class='del'>-					break ;</div><div class='del'>-				default:</div><div class='del'>-					break ; </div><div class='del'>-			} /* switch srb[2] */ </div><div class='del'>-			break ; </div><div class='del'>-</div><div class='del'>-		/* SRB_RESET_GROUP_ADDRESS - Remove a multicast address from group list</div><div class='del'>- 		 */</div><div class='del'>-</div><div class='del'>-		case SRB_RESET_GROUP_ADDRESS:</div><div class='del'>-			switch (readb(srb+2)) { </div><div class='del'>-				case 0x00:</div><div class='del'>-					break ; </div><div class='del'>-				case 0x01:</div><div class='del'>-					printk(KERN_WARNING "%s: Unrecognized srb command\n",dev-&gt;name);</div><div class='del'>-					break ; </div><div class='del'>-				case 0x04:</div><div class='del'>-					printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n",dev-&gt;name) ; </div><div class='del'>-					break ; </div><div class='del'>-				case 0x39: /* Must deal with this if individual multicast addresses used */</div><div class='del'>-					printk(KERN_INFO "%s: Group address not found\n",dev-&gt;name);</div><div class='del'>-					break ;</div><div class='del'>-				default:</div><div class='del'>-					break ; </div><div class='del'>-			} /* switch srb[2] */</div><div class='del'>-			break ; </div><div class='del'>-</div><div class='del'>-		</div><div class='del'>-		/* SRB_SET_FUNC_ADDRESS - Called by the set_rx_mode </div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		case SRB_SET_FUNC_ADDRESS:</div><div class='del'>-			switch (readb(srb+2)) { </div><div class='del'>-				case 0x00:</div><div class='del'>-					if (olympic_priv-&gt;olympic_message_level)</div><div class='del'>-						printk(KERN_INFO "%s: Functional Address Mask Set\n",dev-&gt;name);</div><div class='del'>-					break ;</div><div class='del'>-				case 0x01:</div><div class='del'>-					printk(KERN_WARNING "%s: Unrecognized srb command\n",dev-&gt;name);</div><div class='del'>-					break ; </div><div class='del'>-				case 0x04:</div><div class='del'>-					printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n",dev-&gt;name) ; </div><div class='del'>-					break ; </div><div class='del'>-				default:</div><div class='del'>-					break ; </div><div class='del'>-			} /* switch srb[2] */</div><div class='del'>-			break ; </div><div class='del'>-	</div><div class='del'>-		/* SRB_READ_LOG - Read and reset the adapter error counters</div><div class='del'>- 		 */</div><div class='del'>-</div><div class='del'>-		case SRB_READ_LOG:</div><div class='del'>-			switch (readb(srb+2)) { </div><div class='del'>-				case 0x00: </div><div class='del'>-					if (olympic_priv-&gt;olympic_message_level) </div><div class='del'>-						printk(KERN_INFO "%s: Read Log issued\n",dev-&gt;name) ; </div><div class='del'>-					break ; </div><div class='del'>-				case 0x01:</div><div class='del'>-					printk(KERN_WARNING "%s: Unrecognized srb command\n",dev-&gt;name);</div><div class='del'>-					break ; </div><div class='del'>-				case 0x04:</div><div class='del'>-					printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n",dev-&gt;name) ; </div><div class='del'>-					break ; </div><div class='del'>-			</div><div class='del'>-			} /* switch srb[2] */</div><div class='del'>-			break ; </div><div class='del'>-		</div><div class='del'>-		/* SRB_READ_SR_COUNTERS - Read and reset the source routing bridge related counters */</div><div class='del'>-</div><div class='del'>-		case SRB_READ_SR_COUNTERS:</div><div class='del'>-			switch (readb(srb+2)) { </div><div class='del'>-				case 0x00: </div><div class='del'>-					if (olympic_priv-&gt;olympic_message_level) </div><div class='del'>-						printk(KERN_INFO "%s: Read Source Routing Counters issued\n",dev-&gt;name) ; </div><div class='del'>-					break ; </div><div class='del'>-				case 0x01:</div><div class='del'>-					printk(KERN_WARNING "%s: Unrecognized srb command\n",dev-&gt;name);</div><div class='del'>-					break ; </div><div class='del'>-				case 0x04:</div><div class='del'>-					printk(KERN_WARNING "%s: Adapter must be open for this operation, doh!!\n",dev-&gt;name) ; </div><div class='del'>-					break ; </div><div class='del'>-				default:</div><div class='del'>-					break ; </div><div class='del'>-			} /* switch srb[2] */</div><div class='del'>-			break ;</div><div class='del'>- </div><div class='del'>-		default:</div><div class='del'>-			printk(KERN_WARNING "%s: Unrecognized srb bh return value.\n",dev-&gt;name);</div><div class='del'>-			break ; </div><div class='del'>-	} /* switch srb[0] */</div><div class='del'>-</div><div class='del'>-} </div><div class='del'>-</div><div class='del'>-static int olympic_set_mac_address (struct net_device *dev, void *addr) </div><div class='del'>-{</div><div class='del'>-	struct sockaddr *saddr = addr ; </div><div class='del'>-	struct olympic_private *olympic_priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (netif_running(dev)) { </div><div class='del'>-		printk(KERN_WARNING "%s: Cannot set mac/laa address while card is open\n", dev-&gt;name) ; </div><div class='del'>-		return -EIO ; </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(olympic_priv-&gt;olympic_laa, saddr-&gt;sa_data,dev-&gt;addr_len) ; </div><div class='del'>-	</div><div class='del'>-	if (olympic_priv-&gt;olympic_message_level) { </div><div class='del'>- 		printk(KERN_INFO "%s: MAC/LAA Set to  = %x.%x.%x.%x.%x.%x\n",dev-&gt;name, olympic_priv-&gt;olympic_laa[0],</div><div class='del'>-		olympic_priv-&gt;olympic_laa[1], olympic_priv-&gt;olympic_laa[2],</div><div class='del'>-		olympic_priv-&gt;olympic_laa[3], olympic_priv-&gt;olympic_laa[4],</div><div class='del'>-		olympic_priv-&gt;olympic_laa[5]);</div><div class='del'>-	} </div><div class='del'>-</div><div class='del'>-	return 0 ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void olympic_arb_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct olympic_private *olympic_priv = netdev_priv(dev);</div><div class='del'>-	u8 __iomem *olympic_mmio=olympic_priv-&gt;olympic_mmio;</div><div class='del'>-	u8 __iomem *arb_block, *asb_block, *srb  ; </div><div class='del'>-	u8 header_len ; </div><div class='del'>-	u16 frame_len, buffer_len ;</div><div class='del'>-	struct sk_buff *mac_frame ;  </div><div class='del'>-	u8 __iomem *buf_ptr ;</div><div class='del'>-	u8 __iomem *frame_data ;  </div><div class='del'>-	u16 buff_off ; </div><div class='del'>-	u16 lan_status = 0, lan_status_diff  ; /* Initialize to stop compiler warning */</div><div class='del'>-	u8 fdx_prot_error ; </div><div class='del'>-	u16 next_ptr;</div><div class='del'>-</div><div class='del'>-	arb_block = (olympic_priv-&gt;olympic_lap + olympic_priv-&gt;arb) ; </div><div class='del'>-	asb_block = (olympic_priv-&gt;olympic_lap + olympic_priv-&gt;asb) ; </div><div class='del'>-	srb = (olympic_priv-&gt;olympic_lap + olympic_priv-&gt;srb) ; </div><div class='del'>-	</div><div class='del'>-	if (readb(arb_block+0) == ARB_RECEIVE_DATA) { /* Receive.data, MAC frames */</div><div class='del'>-</div><div class='del'>-		header_len = readb(arb_block+8) ; /* 802.5 Token-Ring Header Length */	</div><div class='del'>-		frame_len = swab16(readw(arb_block + 10)) ; </div><div class='del'>-</div><div class='del'>-		buff_off = swab16(readw(arb_block + 6)) ;</div><div class='del'>-		</div><div class='del'>-		buf_ptr = olympic_priv-&gt;olympic_lap + buff_off ; </div><div class='del'>-</div><div class='del'>-#if OLYMPIC_DEBUG</div><div class='del'>-{</div><div class='del'>-		int i;</div><div class='del'>-		frame_data = buf_ptr+offsetof(struct mac_receive_buffer,frame_data) ; </div><div class='del'>-</div><div class='del'>-		for (i=0 ;  i &lt; 14 ; i++) { </div><div class='del'>-			printk("Loc %d = %02x\n",i,readb(frame_data + i)); </div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		printk("next %04x, fs %02x, len %04x\n",readw(buf_ptr+offsetof(struct mac_receive_buffer,next)), readb(buf_ptr+offsetof(struct mac_receive_buffer,frame_status)), readw(buf_ptr+offsetof(struct mac_receive_buffer,buffer_length)));</div><div class='del'>-}</div><div class='del'>-#endif </div><div class='del'>-		mac_frame = dev_alloc_skb(frame_len) ; </div><div class='del'>-		if (!mac_frame) {</div><div class='del'>-			printk(KERN_WARNING "%s: Memory squeeze, dropping frame.\n", dev-&gt;name);</div><div class='del'>-			goto drop_frame;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Walk the buffer chain, creating the frame */</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			frame_data = buf_ptr+offsetof(struct mac_receive_buffer,frame_data) ; </div><div class='del'>-			buffer_len = swab16(readw(buf_ptr+offsetof(struct mac_receive_buffer,buffer_length))); </div><div class='del'>-			memcpy_fromio(skb_put(mac_frame, buffer_len), frame_data , buffer_len ) ;</div><div class='del'>-			next_ptr=readw(buf_ptr+offsetof(struct mac_receive_buffer,next)); </div><div class='del'>-		} while (next_ptr &amp;&amp; (buf_ptr=olympic_priv-&gt;olympic_lap + swab16(next_ptr)));</div><div class='del'>-</div><div class='del'>-		mac_frame-&gt;protocol = tr_type_trans(mac_frame, dev);</div><div class='del'>-</div><div class='del'>-		if (olympic_priv-&gt;olympic_network_monitor) { </div><div class='del'>-			struct trh_hdr *mac_hdr;</div><div class='del'>-			printk(KERN_WARNING "%s: Received MAC Frame, details:\n",dev-&gt;name);</div><div class='del'>-			mac_hdr = tr_hdr(mac_frame);</div><div class='del'>-			printk(KERN_WARNING "%s: MAC Frame Dest. Addr: %pM\n",</div><div class='del'>-			       dev-&gt;name, mac_hdr-&gt;daddr);</div><div class='del'>-			printk(KERN_WARNING "%s: MAC Frame Srce. Addr: %pM\n",</div><div class='del'>-			       dev-&gt;name, mac_hdr-&gt;saddr);</div><div class='del'>-		}</div><div class='del'>-		netif_rx(mac_frame);</div><div class='del'>-</div><div class='del'>-drop_frame:</div><div class='del'>-		/* Now tell the card we have dealt with the received frame */</div><div class='del'>-</div><div class='del'>-		/* Set LISR Bit 1 */</div><div class='del'>-		writel(LISR_ARB_FREE,olympic_priv-&gt;olympic_mmio + LISR_SUM);</div><div class='del'>-</div><div class='del'>-		/* Is the ASB free ? */ 	</div><div class='del'>-		</div><div class='del'>-		if (readb(asb_block + 2) != 0xff) { </div><div class='del'>-			olympic_priv-&gt;asb_queued = 1 ; </div><div class='del'>-			writel(LISR_ASB_FREE_REQ,olympic_priv-&gt;olympic_mmio+LISR_SUM); </div><div class='del'>-			return ; 	</div><div class='del'>-			/* Drop out and wait for the bottom half to be run */</div><div class='del'>-		}</div><div class='del'>-		</div><div class='del'>-		writeb(ASB_RECEIVE_DATA,asb_block); /* Receive data */</div><div class='del'>-		writeb(OLYMPIC_CLEAR_RET_CODE,asb_block+2); /* Necessary ?? */</div><div class='del'>-		writeb(readb(arb_block+6),asb_block+6); /* Must send the address back to the adapter */</div><div class='del'>-		writeb(readb(arb_block+7),asb_block+7); /* To let it know we have dealt with the data */		</div><div class='del'>-</div><div class='del'>-		writel(LISR_ASB_REPLY | LISR_ASB_FREE_REQ,olympic_priv-&gt;olympic_mmio+LISR_SUM);</div><div class='del'>-		</div><div class='del'>-		olympic_priv-&gt;asb_queued = 2 ; </div><div class='del'>-	</div><div class='del'>-		return ; 	</div><div class='del'>-		</div><div class='del'>-	} else if (readb(arb_block) == ARB_LAN_CHANGE_STATUS) { /* Lan.change.status */</div><div class='del'>-		lan_status = swab16(readw(arb_block+6));</div><div class='del'>-		fdx_prot_error = readb(arb_block+8) ; </div><div class='del'>-		</div><div class='del'>-		/* Issue ARB Free */</div><div class='del'>-		writel(LISR_ARB_FREE,olympic_priv-&gt;olympic_mmio+LISR_SUM);</div><div class='del'>-</div><div class='del'>-		lan_status_diff = olympic_priv-&gt;olympic_lan_status ^ lan_status ; </div><div class='del'>-</div><div class='del'>-		if (lan_status_diff &amp; (LSC_LWF | LSC_ARW | LSC_FPE | LSC_RR) ) { </div><div class='del'>-			if (lan_status_diff &amp; LSC_LWF) </div><div class='del'>-					printk(KERN_WARNING "%s: Short circuit detected on the lobe\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_ARW) </div><div class='del'>-					printk(KERN_WARNING "%s: Auto removal error\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_FPE)</div><div class='del'>-					printk(KERN_WARNING "%s: FDX Protocol Error\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_RR) </div><div class='del'>-					printk(KERN_WARNING "%s: Force remove MAC frame received\n",dev-&gt;name);</div><div class='del'>-		</div><div class='del'>-			/* Adapter has been closed by the hardware */</div><div class='del'>-		</div><div class='del'>-			/* reset tx/rx fifo's and busmaster logic */</div><div class='del'>-</div><div class='del'>-			writel(readl(olympic_mmio+BCTL)|(3&lt;&lt;13),olympic_mmio+BCTL);</div><div class='del'>-			udelay(1);</div><div class='del'>-			writel(readl(olympic_mmio+BCTL)&amp;~(3&lt;&lt;13),olympic_mmio+BCTL);</div><div class='del'>-			netif_stop_queue(dev);</div><div class='del'>-			olympic_priv-&gt;srb = readw(olympic_priv-&gt;olympic_lap + LAPWWO) ; </div><div class='del'>-			printk(KERN_WARNING "%s: Adapter has been closed\n", dev-&gt;name);</div><div class='del'>-		} /* If serious error */</div><div class='del'>-		</div><div class='del'>-		if (olympic_priv-&gt;olympic_message_level) { </div><div class='del'>-			if (lan_status_diff &amp; LSC_SIG_LOSS) </div><div class='del'>-					printk(KERN_WARNING "%s: No receive signal detected\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_HARD_ERR)</div><div class='del'>-					printk(KERN_INFO "%s: Beaconing\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_SOFT_ERR)</div><div class='del'>-					printk(KERN_WARNING "%s: Adapter transmitted Soft Error Report Mac Frame\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_TRAN_BCN) </div><div class='del'>-					printk(KERN_INFO "%s: We are transmitting the beacon, aaah\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_SS) </div><div class='del'>-					printk(KERN_INFO "%s: Single Station on the ring\n", dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_RING_REC)</div><div class='del'>-					printk(KERN_INFO "%s: Ring recovery ongoing\n",dev-&gt;name);</div><div class='del'>-			if (lan_status_diff &amp; LSC_FDX_MODE)</div><div class='del'>-					printk(KERN_INFO "%s: Operating in FDX mode\n",dev-&gt;name);</div><div class='del'>-		} 	</div><div class='del'>-		</div><div class='del'>-		if (lan_status_diff &amp; LSC_CO) { </div><div class='del'>-					</div><div class='del'>-				if (olympic_priv-&gt;olympic_message_level) </div><div class='del'>-					printk(KERN_INFO "%s: Counter Overflow\n", dev-&gt;name);</div><div class='del'>-					</div><div class='del'>-				/* Issue READ.LOG command */</div><div class='del'>-</div><div class='del'>-				writeb(SRB_READ_LOG, srb);</div><div class='del'>-				writeb(0,srb+1);</div><div class='del'>-				writeb(OLYMPIC_CLEAR_RET_CODE,srb+2);</div><div class='del'>-				writeb(0,srb+3);</div><div class='del'>-				writeb(0,srb+4);</div><div class='del'>-				writeb(0,srb+5);</div><div class='del'>-					</div><div class='del'>-				olympic_priv-&gt;srb_queued=2; /* Can't sleep, use srb_bh */</div><div class='del'>-</div><div class='del'>-				writel(LISR_SRB_CMD,olympic_mmio+LISR_SUM);</div><div class='del'>-					</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (lan_status_diff &amp; LSC_SR_CO) { </div><div class='del'>-</div><div class='del'>-				if (olympic_priv-&gt;olympic_message_level)</div><div class='del'>-					printk(KERN_INFO "%s: Source routing counters overflow\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-				/* Issue a READ.SR.COUNTERS */</div><div class='del'>-				</div><div class='del'>-				writeb(SRB_READ_SR_COUNTERS,srb);</div><div class='del'>-				writeb(0,srb+1);</div><div class='del'>-				writeb(OLYMPIC_CLEAR_RET_CODE,srb+2);</div><div class='del'>-				writeb(0,srb+3);</div><div class='del'>-				</div><div class='del'>-				olympic_priv-&gt;srb_queued=2; /* Can't sleep, use srb_bh */</div><div class='del'>-</div><div class='del'>-				writel(LISR_SRB_CMD,olympic_mmio+LISR_SUM);</div><div class='del'>-</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		olympic_priv-&gt;olympic_lan_status = lan_status ; </div><div class='del'>-	</div><div class='del'>-	}  /* Lan.change.status */</div><div class='del'>-	else</div><div class='del'>-		printk(KERN_WARNING "%s: Unknown arb command\n", dev-&gt;name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void olympic_asb_bh(struct net_device *dev) </div><div class='del'>-{</div><div class='del'>-	struct olympic_private *olympic_priv = netdev_priv(dev);</div><div class='del'>-	u8 __iomem *arb_block, *asb_block ; </div><div class='del'>-</div><div class='del'>-	arb_block = (olympic_priv-&gt;olympic_lap + olympic_priv-&gt;arb) ; </div><div class='del'>-	asb_block = (olympic_priv-&gt;olympic_lap + olympic_priv-&gt;asb) ; </div><div class='del'>-</div><div class='del'>-	if (olympic_priv-&gt;asb_queued == 1) {   /* Dropped through the first time */</div><div class='del'>-</div><div class='del'>-		writeb(ASB_RECEIVE_DATA,asb_block); /* Receive data */</div><div class='del'>-		writeb(OLYMPIC_CLEAR_RET_CODE,asb_block+2); /* Necessary ?? */</div><div class='del'>-		writeb(readb(arb_block+6),asb_block+6); /* Must send the address back to the adapter */</div><div class='del'>-		writeb(readb(arb_block+7),asb_block+7); /* To let it know we have dealt with the data */		</div><div class='del'>-</div><div class='del'>-		writel(LISR_ASB_REPLY | LISR_ASB_FREE_REQ,olympic_priv-&gt;olympic_mmio+LISR_SUM);</div><div class='del'>-		olympic_priv-&gt;asb_queued = 2 ; </div><div class='del'>-</div><div class='del'>-		return ; </div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (olympic_priv-&gt;asb_queued == 2) { </div><div class='del'>-		switch (readb(asb_block+2)) {</div><div class='del'>-			case 0x01:</div><div class='del'>-				printk(KERN_WARNING "%s: Unrecognized command code\n", dev-&gt;name);</div><div class='del'>-				break ;</div><div class='del'>-			case 0x26:</div><div class='del'>-				printk(KERN_WARNING "%s: Unrecognized buffer address\n", dev-&gt;name);</div><div class='del'>-				break ;</div><div class='del'>-			case 0xFF:</div><div class='del'>-				/* Valid response, everything should be ok again */</div><div class='del'>-				break ;</div><div class='del'>-			default:</div><div class='del'>-				printk(KERN_WARNING "%s: Invalid return code in asb\n",dev-&gt;name);</div><div class='del'>-				break ;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	olympic_priv-&gt;asb_queued = 0 ; </div><div class='del'>-}</div><div class='del'>- </div><div class='del'>-static int olympic_change_mtu(struct net_device *dev, int mtu) </div><div class='del'>-{</div><div class='del'>-	struct olympic_private *olympic_priv = netdev_priv(dev);</div><div class='del'>-	u16 max_mtu ; </div><div class='del'>-</div><div class='del'>-	if (olympic_priv-&gt;olympic_ring_speed == 4)</div><div class='del'>-		max_mtu = 4500 ; </div><div class='del'>-	else</div><div class='del'>-		max_mtu = 18000 ; </div><div class='del'>-	</div><div class='del'>-	if (mtu &gt; max_mtu)</div><div class='del'>-		return -EINVAL ; </div><div class='del'>-	if (mtu &lt; 100) </div><div class='del'>-		return -EINVAL ; </div><div class='del'>-</div><div class='del'>-	dev-&gt;mtu = mtu ; </div><div class='del'>-	olympic_priv-&gt;pkt_buf_sz = mtu + TR_HLEN ; </div><div class='del'>-</div><div class='del'>-	return 0 ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int olympic_proc_show(struct seq_file *m, void *v)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = m-&gt;private;</div><div class='del'>-	struct olympic_private *olympic_priv=netdev_priv(dev);</div><div class='del'>-	u8 __iomem *oat = (olympic_priv-&gt;olympic_lap + olympic_priv-&gt;olympic_addr_table_addr) ; </div><div class='del'>-	u8 __iomem *opt = (olympic_priv-&gt;olympic_lap + olympic_priv-&gt;olympic_parms_addr) ; </div><div class='del'>-	u8 addr[6];</div><div class='del'>-	u8 addr2[6];</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	seq_printf(m,</div><div class='del'>-		"IBM Pit/Pit-Phy/Olympic Chipset Token Ring Adapter %s\n",dev-&gt;name);</div><div class='del'>-	seq_printf(m, "\n%6s: Adapter Address   : Node Address      : Functional Addr\n",</div><div class='del'>- 	   dev-&gt;name); </div><div class='del'>-</div><div class='del'>-	for (i = 0 ; i &lt; 6 ; i++)</div><div class='del'>-		addr[i] = readb(oat+offsetof(struct olympic_adapter_addr_table,node_addr) + i);</div><div class='del'>-</div><div class='del'>-	seq_printf(m, "%6s: %pM : %pM : %02x:%02x:%02x:%02x\n",</div><div class='del'>-	   dev-&gt;name,</div><div class='del'>-	   dev-&gt;dev_addr, addr,</div><div class='del'>-	   readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)), </div><div class='del'>-	   readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)+1),</div><div class='del'>-	   readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)+2),</div><div class='del'>-	   readb(oat+offsetof(struct olympic_adapter_addr_table,func_addr)+3));</div><div class='del'>-	 </div><div class='del'>-	seq_printf(m, "\n%6s: Token Ring Parameters Table:\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	seq_printf(m, "%6s: Physical Addr : Up Node Address   : Poll Address      : AccPri : Auth Src : Att Code :\n",</div><div class='del'>-	  dev-&gt;name) ; </div><div class='del'>-</div><div class='del'>-	for (i = 0 ; i &lt; 6 ; i++)</div><div class='del'>-		addr[i] = readb(opt+offsetof(struct olympic_parameters_table, up_node_addr) + i);</div><div class='del'>-	for (i = 0 ; i &lt; 6 ; i++)</div><div class='del'>-		addr2[i] =  readb(opt+offsetof(struct olympic_parameters_table, poll_addr) + i);</div><div class='del'>-</div><div class='del'>-	seq_printf(m, "%6s: %02x:%02x:%02x:%02x   : %pM : %pM : %04x   : %04x     :  %04x    :\n",</div><div class='del'>-	  dev-&gt;name,</div><div class='del'>-	  readb(opt+offsetof(struct olympic_parameters_table, phys_addr)),</div><div class='del'>-	  readb(opt+offsetof(struct olympic_parameters_table, phys_addr)+1),</div><div class='del'>-	  readb(opt+offsetof(struct olympic_parameters_table, phys_addr)+2),</div><div class='del'>-	  readb(opt+offsetof(struct olympic_parameters_table, phys_addr)+3),</div><div class='del'>-	  addr, addr2,</div><div class='del'>-	  swab16(readw(opt+offsetof(struct olympic_parameters_table, acc_priority))),</div><div class='del'>-	  swab16(readw(opt+offsetof(struct olympic_parameters_table, auth_source_class))),</div><div class='del'>-	  swab16(readw(opt+offsetof(struct olympic_parameters_table, att_code))));</div><div class='del'>-</div><div class='del'>-	seq_printf(m, "%6s: Source Address    : Bcn T : Maj. V : Lan St : Lcl Rg : Mon Err : Frame Correl : \n",</div><div class='del'>-	  dev-&gt;name) ; </div><div class='del'>-	</div><div class='del'>-	for (i = 0 ; i &lt; 6 ; i++)</div><div class='del'>-		addr[i] = readb(opt+offsetof(struct olympic_parameters_table, source_addr) + i);</div><div class='del'>-	seq_printf(m, "%6s: %pM : %04x  : %04x   : %04x   : %04x   : %04x    :     %04x     : \n",</div><div class='del'>-	  dev-&gt;name, addr,</div><div class='del'>-	  swab16(readw(opt+offsetof(struct olympic_parameters_table, beacon_type))),</div><div class='del'>-	  swab16(readw(opt+offsetof(struct olympic_parameters_table, major_vector))),</div><div class='del'>-	  swab16(readw(opt+offsetof(struct olympic_parameters_table, lan_status))),</div><div class='del'>-	  swab16(readw(opt+offsetof(struct olympic_parameters_table, local_ring))),</div><div class='del'>-	  swab16(readw(opt+offsetof(struct olympic_parameters_table, mon_error))),</div><div class='del'>-	  swab16(readw(opt+offsetof(struct olympic_parameters_table, frame_correl))));</div><div class='del'>-</div><div class='del'>-	seq_printf(m, "%6s: Beacon Details :  Tx  :  Rx  : NAUN Node Address : NAUN Node Phys : \n",</div><div class='del'>-	  dev-&gt;name) ; </div><div class='del'>-</div><div class='del'>-	for (i = 0 ; i &lt; 6 ; i++)</div><div class='del'>-		addr[i] = readb(opt+offsetof(struct olympic_parameters_table, beacon_naun) + i);</div><div class='del'>-	seq_printf(m, "%6s:                :  %02x  :  %02x  : %pM : %02x:%02x:%02x:%02x    : \n",</div><div class='del'>-	  dev-&gt;name,</div><div class='del'>-	  swab16(readw(opt+offsetof(struct olympic_parameters_table, beacon_transmit))),</div><div class='del'>-	  swab16(readw(opt+offsetof(struct olympic_parameters_table, beacon_receive))),</div><div class='del'>-	  addr,</div><div class='del'>-	  readb(opt+offsetof(struct olympic_parameters_table, beacon_phys)),</div><div class='del'>-	  readb(opt+offsetof(struct olympic_parameters_table, beacon_phys)+1),</div><div class='del'>-	  readb(opt+offsetof(struct olympic_parameters_table, beacon_phys)+2),</div><div class='del'>-	  readb(opt+offsetof(struct olympic_parameters_table, beacon_phys)+3));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int olympic_proc_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, olympic_proc_show, PDE(inode)-&gt;data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations olympic_proc_ops = {</div><div class='del'>-	.open		= olympic_proc_open,</div><div class='del'>-	.read		= seq_read,</div><div class='del'>-	.llseek		= seq_lseek,</div><div class='del'>-	.release	= single_release,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __devexit olympic_remove_one(struct pci_dev *pdev) </div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pdev) ; </div><div class='del'>-	struct olympic_private *olympic_priv=netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (olympic_priv-&gt;olympic_network_monitor) { </div><div class='del'>-		char proc_name[20] ; </div><div class='del'>-		strcpy(proc_name,"olympic_") ;</div><div class='del'>-		strcat(proc_name,dev-&gt;name) ;</div><div class='del'>-		remove_proc_entry(proc_name,init_net.proc_net);</div><div class='del'>-	}</div><div class='del'>-	unregister_netdev(dev) ; </div><div class='del'>-	iounmap(olympic_priv-&gt;olympic_mmio) ; </div><div class='del'>-	iounmap(olympic_priv-&gt;olympic_lap) ; </div><div class='del'>-	pci_release_regions(pdev) ;</div><div class='del'>-	pci_set_drvdata(pdev,NULL) ;  	</div><div class='del'>-	free_netdev(dev) ; </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pci_driver olympic_driver = { </div><div class='del'>-	.name		= "olympic",</div><div class='del'>-	.id_table	= olympic_pci_tbl,</div><div class='del'>-	.probe		= olympic_probe,</div><div class='del'>-	.remove		= __devexit_p(olympic_remove_one),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init olympic_pci_init(void) </div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;olympic_driver) ;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit olympic_pci_cleanup(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;olympic_driver) ; </div><div class='del'>-}	</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-module_init(olympic_pci_init) ; </div><div class='del'>-module_exit(olympic_pci_cleanup) ; </div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/tokenring/olympic.h b/drivers/net/tokenring/olympic.h<br/>deleted file mode 100644<br/>index 30631bae4c94..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/olympic.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/olympic.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,321 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  olympic.h (c) 1999 Peter De Schrijver All Rights Reserved</div><div class='del'>- *                1999,2000 Mike Phillips (mikep@linuxtr.net)</div><div class='del'>- *</div><div class='del'>- *  Linux driver for IBM PCI tokenring cards based on the olympic and the PIT/PHY chipset.</div><div class='del'>- *</div><div class='del'>- *  Base Driver Skeleton:</div><div class='del'>- *      Written 1993-94 by Donald Becker.</div><div class='del'>- *</div><div class='del'>- *      Copyright 1993 United States Government as represented by the</div><div class='del'>- *      Director, National Security Agency.</div><div class='del'>- *</div><div class='del'>- *  This software may be used and distributed according to the terms</div><div class='del'>- *  of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define CID 0x4e</div><div class='del'>-</div><div class='del'>-#define BCTL 0x70</div><div class='del'>-#define BCTL_SOFTRESET (1&lt;&lt;15)</div><div class='del'>-#define BCTL_MIMREB (1&lt;&lt;6)</div><div class='del'>-#define BCTL_MODE_INDICATOR (1&lt;&lt;5)</div><div class='del'>-</div><div class='del'>-#define GPR 0x4a</div><div class='del'>-#define GPR_OPTI_BF (1&lt;&lt;6)</div><div class='del'>-#define GPR_NEPTUNE_BF (1&lt;&lt;4) </div><div class='del'>-#define GPR_AUTOSENSE (1&lt;&lt;2)</div><div class='del'>-#define GPR_16MBPS (1&lt;&lt;3) </div><div class='del'>-</div><div class='del'>-#define PAG 0x85</div><div class='del'>-#define LBC 0x8e</div><div class='del'>-</div><div class='del'>-#define LISR 0x10</div><div class='del'>-#define LISR_SUM 0x14</div><div class='del'>-#define LISR_RWM 0x18</div><div class='del'>-</div><div class='del'>-#define LISR_LIE (1&lt;&lt;15)</div><div class='del'>-#define LISR_SLIM (1&lt;&lt;13)</div><div class='del'>-#define LISR_SLI (1&lt;&lt;12)</div><div class='del'>-#define LISR_PCMSRMASK (1&lt;&lt;11)</div><div class='del'>-#define LISR_PCMSRINT (1&lt;&lt;10)</div><div class='del'>-#define LISR_WOLMASK (1&lt;&lt;9)</div><div class='del'>-#define LISR_WOL (1&lt;&lt;8)</div><div class='del'>-#define LISR_SRB_CMD (1&lt;&lt;5)</div><div class='del'>-#define LISR_ASB_REPLY (1&lt;&lt;4)</div><div class='del'>-#define LISR_ASB_FREE_REQ (1&lt;&lt;2)</div><div class='del'>-#define LISR_ARB_FREE (1&lt;&lt;1)</div><div class='del'>-#define LISR_TRB_FRAME (1&lt;&lt;0)</div><div class='del'>-</div><div class='del'>-#define SISR 0x20</div><div class='del'>-#define SISR_SUM 0x24</div><div class='del'>-#define SISR_RWM 0x28</div><div class='del'>-#define SISR_RR 0x2C</div><div class='del'>-#define SISR_RESMASK 0x30</div><div class='del'>-#define SISR_MASK 0x54</div><div class='del'>-#define SISR_MASK_SUM 0x58</div><div class='del'>-#define SISR_MASK_RWM 0x5C</div><div class='del'>-</div><div class='del'>-#define SISR_TX2_IDLE (1&lt;&lt;31)</div><div class='del'>-#define SISR_TX2_HALT (1&lt;&lt;29)</div><div class='del'>-#define SISR_TX2_EOF (1&lt;&lt;28)</div><div class='del'>-#define SISR_TX1_IDLE (1&lt;&lt;27)</div><div class='del'>-#define SISR_TX1_HALT (1&lt;&lt;25)</div><div class='del'>-#define SISR_TX1_EOF (1&lt;&lt;24)</div><div class='del'>-#define SISR_TIMEOUT (1&lt;&lt;23)</div><div class='del'>-#define SISR_RX_NOBUF (1&lt;&lt;22)</div><div class='del'>-#define SISR_RX_STATUS (1&lt;&lt;21)</div><div class='del'>-#define SISR_RX_HALT (1&lt;&lt;18)</div><div class='del'>-#define SISR_RX_EOF_EARLY (1&lt;&lt;16)</div><div class='del'>-#define SISR_MI (1&lt;&lt;15)</div><div class='del'>-#define SISR_PI (1&lt;&lt;13)</div><div class='del'>-#define SISR_ERR (1&lt;&lt;9)</div><div class='del'>-#define SISR_ADAPTER_CHECK (1&lt;&lt;6)</div><div class='del'>-#define SISR_SRB_REPLY (1&lt;&lt;5)</div><div class='del'>-#define SISR_ASB_FREE (1&lt;&lt;4)</div><div class='del'>-#define SISR_ARB_CMD (1&lt;&lt;3)</div><div class='del'>-#define SISR_TRB_REPLY (1&lt;&lt;2)</div><div class='del'>-</div><div class='del'>-#define EISR 0x34</div><div class='del'>-#define EISR_RWM 0x38</div><div class='del'>-#define EISR_MASK 0x3c</div><div class='del'>-#define EISR_MASK_OPTIONS 0x001FFF7F</div><div class='del'>-</div><div class='del'>-#define LAPA 0x60</div><div class='del'>-#define LAPWWO 0x64</div><div class='del'>-#define LAPWWC 0x68</div><div class='del'>-#define LAPCTL 0x6C</div><div class='del'>-#define LAIPD 0x78</div><div class='del'>-#define LAIPDDINC 0x7C</div><div class='del'>-</div><div class='del'>-#define TIMER 0x50</div><div class='del'>-</div><div class='del'>-#define CLKCTL 0x74</div><div class='del'>-#define CLKCTL_PAUSE (1&lt;&lt;15) </div><div class='del'>-</div><div class='del'>-#define PM_CON 0x4</div><div class='del'>-</div><div class='del'>-#define BMCTL_SUM 0x40</div><div class='del'>-#define BMCTL_RWM 0x44</div><div class='del'>-#define BMCTL_TX2_DIS (1&lt;&lt;30) </div><div class='del'>-#define BMCTL_TX1_DIS (1&lt;&lt;26) </div><div class='del'>-#define BMCTL_RX_DIS (1&lt;&lt;22) </div><div class='del'>-</div><div class='del'>-#define BMASR 0xcc</div><div class='del'>-</div><div class='del'>-#define RXDESCQ 0x90</div><div class='del'>-#define RXDESCQCNT 0x94</div><div class='del'>-#define RXCDA 0x98</div><div class='del'>-#define RXENQ 0x9C</div><div class='del'>-#define RXSTATQ 0xA0</div><div class='del'>-#define RXSTATQCNT 0xA4</div><div class='del'>-#define RXCSA 0xA8</div><div class='del'>-#define RXCLEN 0xAC</div><div class='del'>-#define RXHLEN 0xAE</div><div class='del'>-</div><div class='del'>-#define TXDESCQ_1 0xb0</div><div class='del'>-#define TXDESCQ_2 0xd0</div><div class='del'>-#define TXDESCQCNT_1 0xb4</div><div class='del'>-#define TXDESCQCNT_2 0xd4</div><div class='del'>-#define TXCDA_1 0xb8</div><div class='del'>-#define TXCDA_2 0xd8</div><div class='del'>-#define TXENQ_1 0xbc</div><div class='del'>-#define TXENQ_2 0xdc</div><div class='del'>-#define TXSTATQ_1 0xc0</div><div class='del'>-#define TXSTATQ_2 0xe0</div><div class='del'>-#define TXSTATQCNT_1 0xc4</div><div class='del'>-#define TXSTATQCNT_2 0xe4</div><div class='del'>-#define TXCSA_1 0xc8</div><div class='del'>-#define TXCSA_2 0xe8</div><div class='del'>-/* Cardbus */</div><div class='del'>-#define FERMASK 0xf4</div><div class='del'>-#define FERMASK_INT_BIT (1&lt;&lt;15)</div><div class='del'>-</div><div class='del'>-#define OLYMPIC_IO_SPACE 256</div><div class='del'>-</div><div class='del'>-#define SRB_COMMAND_SIZE 50</div><div class='del'>-</div><div class='del'>-#define OLYMPIC_MAX_ADAPTERS 8 /* 0x08 __MODULE_STRING can't hand 0xnn */</div><div class='del'>-</div><div class='del'>-/* Defines for LAN STATUS CHANGE reports */</div><div class='del'>-#define LSC_SIG_LOSS 0x8000</div><div class='del'>-#define LSC_HARD_ERR 0x4000</div><div class='del'>-#define LSC_SOFT_ERR 0x2000</div><div class='del'>-#define LSC_TRAN_BCN 0x1000</div><div class='del'>-#define LSC_LWF      0x0800</div><div class='del'>-#define LSC_ARW      0x0400</div><div class='del'>-#define LSC_FPE      0x0200</div><div class='del'>-#define LSC_RR       0x0100</div><div class='del'>-#define LSC_CO       0x0080</div><div class='del'>-#define LSC_SS       0x0040</div><div class='del'>-#define LSC_RING_REC 0x0020</div><div class='del'>-#define LSC_SR_CO    0x0010</div><div class='del'>-#define LSC_FDX_MODE 0x0004</div><div class='del'>-</div><div class='del'>-/* Defines for OPEN ADAPTER command */</div><div class='del'>-</div><div class='del'>-#define OPEN_ADAPTER_EXT_WRAP (1&lt;&lt;15)</div><div class='del'>-#define OPEN_ADAPTER_DIS_HARDEE (1&lt;&lt;14)</div><div class='del'>-#define OPEN_ADAPTER_DIS_SOFTERR (1&lt;&lt;13)</div><div class='del'>-#define OPEN_ADAPTER_PASS_ADC_MAC (1&lt;&lt;12)</div><div class='del'>-#define OPEN_ADAPTER_PASS_ATT_MAC (1&lt;&lt;11)</div><div class='del'>-#define OPEN_ADAPTER_ENABLE_EC (1&lt;&lt;10)</div><div class='del'>-#define OPEN_ADAPTER_CONTENDER (1&lt;&lt;8)</div><div class='del'>-#define OPEN_ADAPTER_PASS_BEACON (1&lt;&lt;7)</div><div class='del'>-#define OPEN_ADAPTER_ENABLE_FDX (1&lt;&lt;6)</div><div class='del'>-#define OPEN_ADAPTER_ENABLE_RPL (1&lt;&lt;5)</div><div class='del'>-#define OPEN_ADAPTER_INHIBIT_ETR (1&lt;&lt;4)</div><div class='del'>-#define OPEN_ADAPTER_INTERNAL_WRAP (1&lt;&lt;3)</div><div class='del'>-#define OPEN_ADAPTER_USE_OPTS2 (1&lt;&lt;0)</div><div class='del'>-</div><div class='del'>-#define OPEN_ADAPTER_2_ENABLE_ONNOW (1&lt;&lt;15)</div><div class='del'>-</div><div class='del'>-/* Defines for SRB Commands */</div><div class='del'>-</div><div class='del'>-#define SRB_ACCESS_REGISTER 0x1f</div><div class='del'>-#define SRB_CLOSE_ADAPTER 0x04</div><div class='del'>-#define SRB_CONFIGURE_BRIDGE 0x0c</div><div class='del'>-#define SRB_CONFIGURE_WAKEUP_EVENT 0x1a</div><div class='del'>-#define SRB_MODIFY_BRIDGE_PARMS 0x15</div><div class='del'>-#define SRB_MODIFY_OPEN_OPTIONS 0x01</div><div class='del'>-#define SRB_MODIFY_RECEIVE_OPTIONS 0x17</div><div class='del'>-#define SRB_NO_OPERATION 0x00</div><div class='del'>-#define SRB_OPEN_ADAPTER 0x03</div><div class='del'>-#define SRB_READ_LOG 0x08</div><div class='del'>-#define SRB_READ_SR_COUNTERS 0x16</div><div class='del'>-#define SRB_RESET_GROUP_ADDRESS 0x02</div><div class='del'>-#define SRB_SAVE_CONFIGURATION 0x1b</div><div class='del'>-#define SRB_SET_BRIDGE_PARMS 0x09</div><div class='del'>-#define SRB_SET_BRIDGE_TARGETS 0x10</div><div class='del'>-#define SRB_SET_FUNC_ADDRESS 0x07</div><div class='del'>-#define SRB_SET_GROUP_ADDRESS 0x06</div><div class='del'>-#define SRB_SET_GROUP_ADDR_OPTIONS 0x11</div><div class='del'>-#define SRB_UPDATE_WAKEUP_PATTERN 0x19</div><div class='del'>-</div><div class='del'>-/* Clear return code */</div><div class='del'>-</div><div class='del'>-#define OLYMPIC_CLEAR_RET_CODE 0xfe </div><div class='del'>-</div><div class='del'>-/* ARB Commands */</div><div class='del'>-#define ARB_RECEIVE_DATA 0x81</div><div class='del'>-#define ARB_LAN_CHANGE_STATUS 0x84</div><div class='del'>-/* ASB Response commands */</div><div class='del'>-</div><div class='del'>-#define ASB_RECEIVE_DATA 0x81</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Olympic defaults for buffers */</div><div class='del'>- </div><div class='del'>-#define OLYMPIC_RX_RING_SIZE 16 /* should be a power of 2 */</div><div class='del'>-#define OLYMPIC_TX_RING_SIZE 8 /* should be a power of 2 */</div><div class='del'>-</div><div class='del'>-#define PKT_BUF_SZ 4096 /* Default packet size */</div><div class='del'>-</div><div class='del'>-/* Olympic data structures */</div><div class='del'>-</div><div class='del'>-/* xxxx These structures are all little endian in hardware. */</div><div class='del'>-</div><div class='del'>-struct olympic_tx_desc {</div><div class='del'>-	__le32 buffer;</div><div class='del'>-	__le32 status_length;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct olympic_tx_status {</div><div class='del'>-	__le32 status;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct olympic_rx_desc {</div><div class='del'>-	__le32 buffer;</div><div class='del'>-	__le32 res_length; </div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct olympic_rx_status {</div><div class='del'>-	__le32 fragmentcnt_framelen;</div><div class='del'>-	__le32 status_buffercnt;</div><div class='del'>-};</div><div class='del'>-/* xxxx END These structures are all little endian in hardware. */</div><div class='del'>-/* xxxx There may be more, but I'm pretty sure about these */</div><div class='del'>-</div><div class='del'>-struct mac_receive_buffer {</div><div class='del'>-	__le16 next ; </div><div class='del'>-	u8 padding ; </div><div class='del'>-	u8 frame_status ;</div><div class='del'>-	__le16 buffer_length ; </div><div class='del'>-	u8 frame_data ; </div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct olympic_private {</div><div class='del'>-	</div><div class='del'>-	u16 srb;      /* be16 */</div><div class='del'>-	u16 trb;      /* be16 */</div><div class='del'>-	u16 arb;      /* be16 */</div><div class='del'>-	u16 asb;      /* be16 */</div><div class='del'>-</div><div class='del'>-	u8 __iomem *olympic_mmio;</div><div class='del'>-	u8 __iomem *olympic_lap;</div><div class='del'>-	struct pci_dev *pdev ; </div><div class='del'>-	const char *olympic_card_name;</div><div class='del'>-</div><div class='del'>-	spinlock_t olympic_lock ; </div><div class='del'>-</div><div class='del'>-	volatile int srb_queued;    /* True if an SRB is still posted */	</div><div class='del'>-	wait_queue_head_t srb_wait;</div><div class='del'>-</div><div class='del'>-	volatile int asb_queued;    /* True if an ASB is posted */</div><div class='del'>-</div><div class='del'>-	volatile int trb_queued;   /* True if a TRB is posted */</div><div class='del'>-	wait_queue_head_t trb_wait ; </div><div class='del'>-</div><div class='del'>-	/* These must be on a 4 byte boundary. */</div><div class='del'>-	struct olympic_rx_desc olympic_rx_ring[OLYMPIC_RX_RING_SIZE];</div><div class='del'>-	struct olympic_tx_desc olympic_tx_ring[OLYMPIC_TX_RING_SIZE];</div><div class='del'>-	struct olympic_rx_status olympic_rx_status_ring[OLYMPIC_RX_RING_SIZE];	</div><div class='del'>-	struct olympic_tx_status olympic_tx_status_ring[OLYMPIC_TX_RING_SIZE];	</div><div class='del'>-</div><div class='del'>-	struct sk_buff *tx_ring_skb[OLYMPIC_TX_RING_SIZE], *rx_ring_skb[OLYMPIC_RX_RING_SIZE];	</div><div class='del'>-	int tx_ring_free, tx_ring_last_status, rx_ring_last_received,rx_status_last_received, free_tx_ring_entries;</div><div class='del'>-</div><div class='del'>-	u16 olympic_lan_status ;</div><div class='del'>-	u8 olympic_ring_speed ;</div><div class='del'>-	u16 pkt_buf_sz ; </div><div class='del'>-	u8 olympic_receive_options, olympic_copy_all_options,olympic_message_level, olympic_network_monitor;  </div><div class='del'>-	u16 olympic_addr_table_addr, olympic_parms_addr ; </div><div class='del'>-	u8 olympic_laa[6] ; </div><div class='del'>-	u32 rx_ring_dma_addr;</div><div class='del'>-	u32 rx_status_ring_dma_addr;</div><div class='del'>-	u32 tx_ring_dma_addr;</div><div class='del'>-	u32 tx_status_ring_dma_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct olympic_adapter_addr_table {</div><div class='del'>-</div><div class='del'>-	u8 node_addr[6] ; </div><div class='del'>-	u8 reserved[4] ; </div><div class='del'>-	u8 func_addr[4] ; </div><div class='del'>-} ; </div><div class='del'>-</div><div class='del'>-struct olympic_parameters_table { </div><div class='del'>-	</div><div class='del'>-	u8  phys_addr[4] ; </div><div class='del'>-	u8  up_node_addr[6] ; </div><div class='del'>-	u8  up_phys_addr[4] ; </div><div class='del'>-	u8  poll_addr[6] ; </div><div class='del'>-	u16 reserved ; </div><div class='del'>-	u16 acc_priority ; </div><div class='del'>-	u16 auth_source_class ; </div><div class='del'>-	u16 att_code ; </div><div class='del'>-	u8  source_addr[6] ; </div><div class='del'>-	u16 beacon_type ; </div><div class='del'>-	u16 major_vector ; </div><div class='del'>-	u16 lan_status ; </div><div class='del'>-	u16 soft_error_time ; </div><div class='del'>- 	u16 reserved1 ; </div><div class='del'>-	u16 local_ring ; </div><div class='del'>-	u16 mon_error ; </div><div class='del'>-	u16 beacon_transmit ; </div><div class='del'>-	u16 beacon_receive ; </div><div class='del'>-	u16 frame_correl ; </div><div class='del'>-	u8  beacon_naun[6] ; </div><div class='del'>-	u32 reserved2 ; </div><div class='del'>-	u8  beacon_phys[4] ; 	</div><div class='del'>-}; </div><div class='head'>diff --git a/drivers/net/tokenring/proteon.c b/drivers/net/tokenring/proteon.c<br/>deleted file mode 100644<br/>index 62d90e40f9ec..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/proteon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/proteon.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,422 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  proteon.c: A network driver for Proteon ISA token ring cards.</div><div class='del'>- *</div><div class='del'>- *  Based on tmspci written 1999 by Adam Fritzler</div><div class='del'>- *  </div><div class='del'>- *  Written 2003 by Jochen Friedrich</div><div class='del'>- *</div><div class='del'>- *  This software may be used and distributed according to the terms</div><div class='del'>- *  of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- *</div><div class='del'>- *  This driver module supports the following cards:</div><div class='del'>- *	- Proteon 1392, 1392+</div><div class='del'>- *</div><div class='del'>- *  Maintainer(s):</div><div class='del'>- *    AF        Adam Fritzler</div><div class='del'>- *    JF	Jochen Friedrich	jochen@scram.de</div><div class='del'>- *</div><div class='del'>- *  Modification History:</div><div class='del'>- *	02-Jan-03	JF	Created</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static const char version[] = "proteon.c: v1.00 02/01/2003 by Jochen Friedrich\n";</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-</div><div class='del'>-#include "tms380tr.h"</div><div class='del'>-</div><div class='del'>-#define PROTEON_IO_EXTENT 32</div><div class='del'>-</div><div class='del'>-/* A zero-terminated list of I/O addresses to be probed. */</div><div class='del'>-static unsigned int portlist[] __initdata = {</div><div class='del'>-	0x0A20, 0x0E20, 0x1A20, 0x1E20, 0x2A20, 0x2E20, 0x3A20, 0x3E20,// Prot.</div><div class='del'>-	0x4A20, 0x4E20, 0x5A20, 0x5E20, 0x6A20, 0x6E20, 0x7A20, 0x7E20,// Prot.</div><div class='del'>-	0x8A20, 0x8E20, 0x9A20, 0x9E20, 0xAA20, 0xAE20, 0xBA20, 0xBE20,// Prot.</div><div class='del'>-	0xCA20, 0xCE20, 0xDA20, 0xDE20, 0xEA20, 0xEE20, 0xFA20, 0xFE20,// Prot.</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* A zero-terminated list of IRQs to be probed. */</div><div class='del'>-static unsigned short irqlist[] = {</div><div class='del'>-	7, 6, 5, 4, 3, 12, 11, 10, 9,</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* A zero-terminated list of DMAs to be probed. */</div><div class='del'>-static int dmalist[] __initdata = {</div><div class='del'>-	5, 6, 7,</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static char cardname[] = "Proteon 1392\0";</div><div class='del'>-static u64 dma_mask = ISA_MAX_ADDRESS;</div><div class='del'>-static int proteon_open(struct net_device *dev);</div><div class='del'>-static void proteon_read_eeprom(struct net_device *dev);</div><div class='del'>-static unsigned short proteon_setnselout_pins(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-static unsigned short proteon_sifreadb(struct net_device *dev, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	return inb(dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned short proteon_sifreadw(struct net_device *dev, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	return inw(dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void proteon_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	outb(val, dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void proteon_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	outw(val, dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init proteon_probe1(struct net_device *dev, int ioaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned char chk1, chk2;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!request_region(ioaddr, PROTEON_IO_EXTENT, cardname))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-		</div><div class='del'>-</div><div class='del'>-	chk1 = inb(ioaddr + 0x1f);      /* Get Proteon ID reg 1 */</div><div class='del'>-	if (chk1 != 0x1f) </div><div class='del'>-		goto nodev;</div><div class='del'>-</div><div class='del'>-	chk1 = inb(ioaddr + 0x1e) &amp; 0x07;       /* Get Proteon ID reg 0 */</div><div class='del'>-	for (i=0; i&lt;16; i++) {</div><div class='del'>-		chk2 = inb(ioaddr + 0x1e) &amp; 0x07;</div><div class='del'>-		if (((chk1 + 1) &amp; 0x07) != chk2)</div><div class='del'>-			goto nodev;</div><div class='del'>-		chk1 = chk2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr = ioaddr;</div><div class='del'>-	return 0;</div><div class='del'>-nodev:</div><div class='del'>-	release_region(ioaddr, PROTEON_IO_EXTENT); </div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct net_device_ops proteon_netdev_ops __read_mostly;</div><div class='del'>-</div><div class='del'>-static int __init setup_card(struct net_device *dev, struct device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp;</div><div class='del'>-        static int versionprinted;</div><div class='del'>-	const unsigned *port;</div><div class='del'>-	int j,err = 0;</div><div class='del'>-</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;base_addr)	/* probe specific location */</div><div class='del'>-		err = proteon_probe1(dev, dev-&gt;base_addr);</div><div class='del'>-	else {</div><div class='del'>-		for (port = portlist; *port; port++) {</div><div class='del'>-			err = proteon_probe1(dev, *port);</div><div class='del'>-			if (!err)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (err)</div><div class='del'>-		goto out5;</div><div class='del'>-</div><div class='del'>-	/* At this point we have found a valid card. */</div><div class='del'>-</div><div class='del'>-	if (versionprinted++ == 0)</div><div class='del'>-		printk(KERN_DEBUG "%s", version);</div><div class='del'>-</div><div class='del'>-	err = -EIO;</div><div class='del'>-	pdev-&gt;dma_mask = &amp;dma_mask;</div><div class='del'>-	if (tmsdev_init(dev, pdev))</div><div class='del'>-		goto out4;</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr &amp;= ~3; </div><div class='del'>-		</div><div class='del'>-	proteon_read_eeprom(dev);</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "proteon.c:    Ring Station Address: %pM\n",</div><div class='del'>-	       dev-&gt;dev_addr);</div><div class='del'>-		</div><div class='del'>-	tp = netdev_priv(dev);</div><div class='del'>-	tp-&gt;setnselout = proteon_setnselout_pins;</div><div class='del'>-		</div><div class='del'>-	tp-&gt;sifreadb = proteon_sifreadb;</div><div class='del'>-	tp-&gt;sifreadw = proteon_sifreadw;</div><div class='del'>-	tp-&gt;sifwriteb = proteon_sifwriteb;</div><div class='del'>-	tp-&gt;sifwritew = proteon_sifwritew;</div><div class='del'>-	</div><div class='del'>-	memcpy(tp-&gt;ProductID, cardname, PROD_ID_SIZE + 1);</div><div class='del'>-</div><div class='del'>-	tp-&gt;tmspriv = NULL;</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;proteon_netdev_ops;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;irq == 0)</div><div class='del'>-	{</div><div class='del'>-		for(j = 0; irqlist[j] != 0; j++)</div><div class='del'>-		{</div><div class='del'>-			dev-&gt;irq = irqlist[j];</div><div class='del'>-			if (!request_irq(dev-&gt;irq, tms380tr_interrupt, 0, </div><div class='del'>-				cardname, dev))</div><div class='del'>-				break;</div><div class='del'>-                }</div><div class='del'>-		</div><div class='del'>-                if(irqlist[j] == 0)</div><div class='del'>-                {</div><div class='del'>-                        printk(KERN_INFO "proteon.c: AutoSelect no IRQ available\n");</div><div class='del'>-			goto out3;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-	{</div><div class='del'>-		for(j = 0; irqlist[j] != 0; j++)</div><div class='del'>-			if (irqlist[j] == dev-&gt;irq)</div><div class='del'>-				break;</div><div class='del'>-		if (irqlist[j] == 0)</div><div class='del'>-		{</div><div class='del'>-			printk(KERN_INFO "proteon.c: Illegal IRQ %d specified\n",</div><div class='del'>-				dev-&gt;irq);</div><div class='del'>-			goto out3;</div><div class='del'>-		}</div><div class='del'>-		if (request_irq(dev-&gt;irq, tms380tr_interrupt, 0, </div><div class='del'>-			cardname, dev))</div><div class='del'>-		{</div><div class='del'>-                        printk(KERN_INFO "proteon.c: Selected IRQ %d not available\n",</div><div class='del'>-				dev-&gt;irq);</div><div class='del'>-			goto out3;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;dma == 0)</div><div class='del'>-	{</div><div class='del'>-		for(j = 0; dmalist[j] != 0; j++)</div><div class='del'>-		{</div><div class='del'>-			dev-&gt;dma = dmalist[j];</div><div class='del'>-                        if (!request_dma(dev-&gt;dma, cardname))</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if(dmalist[j] == 0)</div><div class='del'>-		{</div><div class='del'>-			printk(KERN_INFO "proteon.c: AutoSelect no DMA available\n");</div><div class='del'>-			goto out2;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-	{</div><div class='del'>-		for(j = 0; dmalist[j] != 0; j++)</div><div class='del'>-			if (dmalist[j] == dev-&gt;dma)</div><div class='del'>-				break;</div><div class='del'>-		if (dmalist[j] == 0)</div><div class='del'>-		{</div><div class='del'>-                        printk(KERN_INFO "proteon.c: Illegal DMA %d specified\n",</div><div class='del'>-				dev-&gt;dma);</div><div class='del'>-			goto out2;</div><div class='del'>-		}</div><div class='del'>-		if (request_dma(dev-&gt;dma, cardname))</div><div class='del'>-		{</div><div class='del'>-                        printk(KERN_INFO "proteon.c: Selected DMA %d not available\n",</div><div class='del'>-				dev-&gt;dma);</div><div class='del'>-			goto out2;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = register_netdev(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "%s:    IO: %#4lx  IRQ: %d  DMA: %d\n",</div><div class='del'>-	       dev-&gt;name, dev-&gt;base_addr, dev-&gt;irq, dev-&gt;dma);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-out:</div><div class='del'>-	free_dma(dev-&gt;dma);</div><div class='del'>-out2:</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-out3:</div><div class='del'>-	tmsdev_term(dev);</div><div class='del'>-out4:</div><div class='del'>-	release_region(dev-&gt;base_addr, PROTEON_IO_EXTENT);</div><div class='del'>-out5:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Reads MAC address from adapter RAM, which should've read it from</div><div class='del'>- * the onboard ROM.  </div><div class='del'>- *</div><div class='del'>- * Calling this on a board that does not support it can be a very</div><div class='del'>- * dangerous thing.  The Madge board, for instance, will lock your</div><div class='del'>- * machine hard when this is called.  Luckily, its supported in a</div><div class='del'>- * separate driver.  --ASF</div><div class='del'>- */</div><div class='del'>-static void proteon_read_eeprom(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	</div><div class='del'>-	/* Address: 0000:0000 */</div><div class='del'>-	proteon_sifwritew(dev, 0, SIFADX);</div><div class='del'>-	proteon_sifwritew(dev, 0, SIFADR);	</div><div class='del'>-	</div><div class='del'>-	/* Read six byte MAC address data */</div><div class='del'>-	dev-&gt;addr_len = 6;</div><div class='del'>-	for(i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = proteon_sifreadw(dev, SIFINC) &gt;&gt; 8;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned short proteon_setnselout_pins(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int proteon_open(struct net_device *dev)</div><div class='del'>-{  </div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	unsigned short val = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Proteon reset sequence */</div><div class='del'>-	outb(0, dev-&gt;base_addr + 0x11);</div><div class='del'>-	mdelay(20);</div><div class='del'>-	outb(0x04, dev-&gt;base_addr + 0x11);</div><div class='del'>-	mdelay(20);</div><div class='del'>-	outb(0, dev-&gt;base_addr + 0x11);</div><div class='del'>-	mdelay(100);</div><div class='del'>-</div><div class='del'>-	/* set control/status reg */</div><div class='del'>-	val = inb(dev-&gt;base_addr + 0x11);</div><div class='del'>-	val |= 0x78;</div><div class='del'>-	val &amp;= 0xf9;</div><div class='del'>-	if(tp-&gt;DataRate == SPEED_4)</div><div class='del'>-		val |= 0x20;</div><div class='del'>-	else</div><div class='del'>-		val &amp;= ~0x20;</div><div class='del'>-</div><div class='del'>-	outb(val, dev-&gt;base_addr + 0x11);</div><div class='del'>-	outb(0xff, dev-&gt;base_addr + 0x12);</div><div class='del'>-	for(i = 0; irqlist[i] != 0; i++)</div><div class='del'>-	{</div><div class='del'>-		if(irqlist[i] == dev-&gt;irq)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	val = i;</div><div class='del'>-	i = (7 - dev-&gt;dma) &lt;&lt; 4;</div><div class='del'>-	val |= i;</div><div class='del'>-	outb(val, dev-&gt;base_addr + 0x13);</div><div class='del'>-</div><div class='del'>-	return tms380tr_open(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define ISATR_MAX_ADAPTERS 3</div><div class='del'>-</div><div class='del'>-static int io[ISATR_MAX_ADAPTERS];</div><div class='del'>-static int irq[ISATR_MAX_ADAPTERS];</div><div class='del'>-static int dma[ISATR_MAX_ADAPTERS];</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-module_param_array(io, int, NULL, 0);</div><div class='del'>-module_param_array(irq, int, NULL, 0);</div><div class='del'>-module_param_array(dma, int, NULL, 0);</div><div class='del'>-</div><div class='del'>-static struct platform_device *proteon_dev[ISATR_MAX_ADAPTERS];</div><div class='del'>-</div><div class='del'>-static struct platform_driver proteon_driver = {</div><div class='del'>-	.driver		= {</div><div class='del'>-		.name	= "proteon",</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init proteon_init(void)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct platform_device *pdev;</div><div class='del'>-	int i, num = 0, err = 0;</div><div class='del'>-</div><div class='del'>-	proteon_netdev_ops = tms380tr_netdev_ops;</div><div class='del'>-	proteon_netdev_ops.ndo_open = proteon_open;</div><div class='del'>-	proteon_netdev_ops.ndo_stop = tms380tr_close;</div><div class='del'>-</div><div class='del'>-	err = platform_driver_register(&amp;proteon_driver);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ISATR_MAX_ADAPTERS ; i++) {</div><div class='del'>-		dev = alloc_trdev(sizeof(struct net_local));</div><div class='del'>-		if (!dev)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		dev-&gt;base_addr = io[i];</div><div class='del'>-		dev-&gt;irq = irq[i];</div><div class='del'>-		dev-&gt;dma = dma[i];</div><div class='del'>-		pdev = platform_device_register_simple("proteon",</div><div class='del'>-			i, NULL, 0);</div><div class='del'>-		if (IS_ERR(pdev)) {</div><div class='del'>-			free_netdev(dev);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		err = setup_card(dev, &amp;pdev-&gt;dev);</div><div class='del'>-		if (!err) {</div><div class='del'>-			proteon_dev[i] = pdev;</div><div class='del'>-			platform_set_drvdata(pdev, dev);</div><div class='del'>-			++num;</div><div class='del'>-		} else {</div><div class='del'>-			platform_device_unregister(pdev);</div><div class='del'>-			free_netdev(dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk(KERN_NOTICE "proteon.c: %d cards found.\n", num);</div><div class='del'>-	/* Probe for cards. */</div><div class='del'>-	if (num == 0) {</div><div class='del'>-		printk(KERN_NOTICE "proteon.c: No cards found.\n");</div><div class='del'>-		platform_driver_unregister(&amp;proteon_driver);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit proteon_cleanup(void)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ISATR_MAX_ADAPTERS ; i++) {</div><div class='del'>-		struct platform_device *pdev = proteon_dev[i];</div><div class='del'>-		</div><div class='del'>-		if (!pdev)</div><div class='del'>-			continue;</div><div class='del'>-		dev = platform_get_drvdata(pdev);</div><div class='del'>-		unregister_netdev(dev);</div><div class='del'>-		release_region(dev-&gt;base_addr, PROTEON_IO_EXTENT);</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='del'>-		free_dma(dev-&gt;dma);</div><div class='del'>-		tmsdev_term(dev);</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-		platform_set_drvdata(pdev, NULL);</div><div class='del'>-		platform_device_unregister(pdev);</div><div class='del'>-	}</div><div class='del'>-	platform_driver_unregister(&amp;proteon_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(proteon_init);</div><div class='del'>-module_exit(proteon_cleanup);</div><div class='head'>diff --git a/drivers/net/tokenring/skisa.c b/drivers/net/tokenring/skisa.c<br/>deleted file mode 100644<br/>index ee11e93dc30e..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/skisa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/skisa.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,432 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  skisa.c: A network driver for SK-NET TMS380-based ISA token ring cards.</div><div class='del'>- *</div><div class='del'>- *  Based on tmspci written 1999 by Adam Fritzler</div><div class='del'>- *  </div><div class='del'>- *  Written 2000 by Jochen Friedrich</div><div class='del'>- *  Dedicated to my girlfriend Steffi Bopp</div><div class='del'>- *</div><div class='del'>- *  This software may be used and distributed according to the terms</div><div class='del'>- *  of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- *</div><div class='del'>- *  This driver module supports the following cards:</div><div class='del'>- *	- SysKonnect TR4/16(+) ISA	(SK-4190)</div><div class='del'>- *</div><div class='del'>- *  Maintainer(s):</div><div class='del'>- *    AF        Adam Fritzler</div><div class='del'>- *    JF	Jochen Friedrich	jochen@scram.de</div><div class='del'>- *</div><div class='del'>- *  Modification History:</div><div class='del'>- *	14-Jan-01	JF	Created</div><div class='del'>- *	28-Oct-02	JF	Fixed probe of card for static compilation.</div><div class='del'>- *				Fixed module init to not make hotplug go wild.</div><div class='del'>- *	09-Nov-02	JF	Fixed early bail out on out of memory</div><div class='del'>- *				situations if multiple cards are found.</div><div class='del'>- *				Cleaned up some unnecessary console SPAM.</div><div class='del'>- *	09-Dec-02	JF	Fixed module reference counting.</div><div class='del'>- *	02-Jan-03	JF	Renamed to skisa.c</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static const char version[] = "skisa.c: v1.03 09/12/2002 by Jochen Friedrich\n";</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/pci.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-</div><div class='del'>-#include "tms380tr.h"</div><div class='del'>-</div><div class='del'>-#define SK_ISA_IO_EXTENT 32</div><div class='del'>-</div><div class='del'>-/* A zero-terminated list of I/O addresses to be probed. */</div><div class='del'>-static unsigned int portlist[] __initdata = {</div><div class='del'>-	0x0A20, 0x1A20, 0x0B20, 0x1B20, 0x0980, 0x1980, 0x0900, 0x1900,// SK</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* A zero-terminated list of IRQs to be probed. </div><div class='del'>- * Used again after initial probe for sktr_chipset_init, called from sktr_open.</div><div class='del'>- */</div><div class='del'>-static const unsigned short irqlist[] = {</div><div class='del'>-	3, 5, 9, 10, 11, 12, 15,</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* A zero-terminated list of DMAs to be probed. */</div><div class='del'>-static int dmalist[] __initdata = {</div><div class='del'>-	5, 6, 7,</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static char isa_cardname[] = "SK NET TR 4/16 ISA\0";</div><div class='del'>-static u64 dma_mask = ISA_MAX_ADDRESS;</div><div class='del'>-static int sk_isa_open(struct net_device *dev);</div><div class='del'>-static void sk_isa_read_eeprom(struct net_device *dev);</div><div class='del'>-static unsigned short sk_isa_setnselout_pins(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-static unsigned short sk_isa_sifreadb(struct net_device *dev, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	return inb(dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned short sk_isa_sifreadw(struct net_device *dev, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	return inw(dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sk_isa_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	outb(val, dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sk_isa_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	outw(val, dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __init sk_isa_probe1(struct net_device *dev, int ioaddr)</div><div class='del'>-{</div><div class='del'>-	unsigned char old, chk1, chk2;</div><div class='del'>-</div><div class='del'>-	if (!request_region(ioaddr, SK_ISA_IO_EXTENT, isa_cardname))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	old = inb(ioaddr + SIFADR);	/* Get the old SIFADR value */</div><div class='del'>-</div><div class='del'>-	chk1 = 0;	/* Begin with check value 0 */</div><div class='del'>-	do {</div><div class='del'>-		/* Write new SIFADR value */</div><div class='del'>-		outb(chk1, ioaddr + SIFADR);</div><div class='del'>-</div><div class='del'>-		/* Read, invert and write */</div><div class='del'>-		chk2 = inb(ioaddr + SIFADD);</div><div class='del'>-		chk2 ^= 0x0FE;</div><div class='del'>-		outb(chk2, ioaddr + SIFADR);</div><div class='del'>-</div><div class='del'>-		/* Read, invert and compare */</div><div class='del'>-		chk2 = inb(ioaddr + SIFADD);</div><div class='del'>-		chk2 ^= 0x0FE;</div><div class='del'>-</div><div class='del'>-		if(chk1 != chk2) {</div><div class='del'>-			release_region(ioaddr, SK_ISA_IO_EXTENT);</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		chk1 -= 2;</div><div class='del'>-	} while(chk1 != 0);	/* Repeat 128 times (all byte values) */</div><div class='del'>-</div><div class='del'>-    	/* Restore the SIFADR value */</div><div class='del'>-	outb(old, ioaddr + SIFADR);</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr = ioaddr;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct net_device_ops sk_isa_netdev_ops __read_mostly;</div><div class='del'>-</div><div class='del'>-static int __init setup_card(struct net_device *dev, struct device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp;</div><div class='del'>-        static int versionprinted;</div><div class='del'>-	const unsigned *port;</div><div class='del'>-	int j, err = 0;</div><div class='del'>-</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;base_addr)	/* probe specific location */</div><div class='del'>-		err = sk_isa_probe1(dev, dev-&gt;base_addr);</div><div class='del'>-	else {</div><div class='del'>-		for (port = portlist; *port; port++) {</div><div class='del'>-			err = sk_isa_probe1(dev, *port);</div><div class='del'>-			if (!err)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (err)</div><div class='del'>-		goto out5;</div><div class='del'>-</div><div class='del'>-	/* At this point we have found a valid card. */</div><div class='del'>-</div><div class='del'>-	if (versionprinted++ == 0)</div><div class='del'>-		printk(KERN_DEBUG "%s", version);</div><div class='del'>-</div><div class='del'>-	err = -EIO;</div><div class='del'>-	pdev-&gt;dma_mask = &amp;dma_mask;</div><div class='del'>-	if (tmsdev_init(dev, pdev))</div><div class='del'>-		goto out4;</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr &amp;= ~3; </div><div class='del'>-		</div><div class='del'>-	sk_isa_read_eeprom(dev);</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "skisa.c:    Ring Station Address: %pM\n",</div><div class='del'>-	       dev-&gt;dev_addr);</div><div class='del'>-		</div><div class='del'>-	tp = netdev_priv(dev);</div><div class='del'>-	tp-&gt;setnselout = sk_isa_setnselout_pins;</div><div class='del'>-		</div><div class='del'>-	tp-&gt;sifreadb = sk_isa_sifreadb;</div><div class='del'>-	tp-&gt;sifreadw = sk_isa_sifreadw;</div><div class='del'>-	tp-&gt;sifwriteb = sk_isa_sifwriteb;</div><div class='del'>-	tp-&gt;sifwritew = sk_isa_sifwritew;</div><div class='del'>-	</div><div class='del'>-	memcpy(tp-&gt;ProductID, isa_cardname, PROD_ID_SIZE + 1);</div><div class='del'>-</div><div class='del'>-	tp-&gt;tmspriv = NULL;</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;sk_isa_netdev_ops;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;irq == 0)</div><div class='del'>-	{</div><div class='del'>-		for(j = 0; irqlist[j] != 0; j++)</div><div class='del'>-		{</div><div class='del'>-			dev-&gt;irq = irqlist[j];</div><div class='del'>-			if (!request_irq(dev-&gt;irq, tms380tr_interrupt, 0, </div><div class='del'>-				isa_cardname, dev))</div><div class='del'>-				break;</div><div class='del'>-                }</div><div class='del'>-		</div><div class='del'>-                if(irqlist[j] == 0)</div><div class='del'>-                {</div><div class='del'>-                        printk(KERN_INFO "skisa.c: AutoSelect no IRQ available\n");</div><div class='del'>-			goto out3;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-	{</div><div class='del'>-		for(j = 0; irqlist[j] != 0; j++)</div><div class='del'>-			if (irqlist[j] == dev-&gt;irq)</div><div class='del'>-				break;</div><div class='del'>-		if (irqlist[j] == 0)</div><div class='del'>-		{</div><div class='del'>-			printk(KERN_INFO "skisa.c: Illegal IRQ %d specified\n",</div><div class='del'>-				dev-&gt;irq);</div><div class='del'>-			goto out3;</div><div class='del'>-		}</div><div class='del'>-		if (request_irq(dev-&gt;irq, tms380tr_interrupt, 0, </div><div class='del'>-			isa_cardname, dev))</div><div class='del'>-		{</div><div class='del'>-                        printk(KERN_INFO "skisa.c: Selected IRQ %d not available\n",</div><div class='del'>-				dev-&gt;irq);</div><div class='del'>-			goto out3;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;dma == 0)</div><div class='del'>-	{</div><div class='del'>-		for(j = 0; dmalist[j] != 0; j++)</div><div class='del'>-		{</div><div class='del'>-			dev-&gt;dma = dmalist[j];</div><div class='del'>-                        if (!request_dma(dev-&gt;dma, isa_cardname))</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if(dmalist[j] == 0)</div><div class='del'>-		{</div><div class='del'>-			printk(KERN_INFO "skisa.c: AutoSelect no DMA available\n");</div><div class='del'>-			goto out2;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-	{</div><div class='del'>-		for(j = 0; dmalist[j] != 0; j++)</div><div class='del'>-			if (dmalist[j] == dev-&gt;dma)</div><div class='del'>-				break;</div><div class='del'>-		if (dmalist[j] == 0)</div><div class='del'>-		{</div><div class='del'>-                        printk(KERN_INFO "skisa.c: Illegal DMA %d specified\n",</div><div class='del'>-				dev-&gt;dma);</div><div class='del'>-			goto out2;</div><div class='del'>-		}</div><div class='del'>-		if (request_dma(dev-&gt;dma, isa_cardname))</div><div class='del'>-		{</div><div class='del'>-                        printk(KERN_INFO "skisa.c: Selected DMA %d not available\n",</div><div class='del'>-				dev-&gt;dma);</div><div class='del'>-			goto out2;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = register_netdev(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "%s:    IO: %#4lx  IRQ: %d  DMA: %d\n",</div><div class='del'>-	       dev-&gt;name, dev-&gt;base_addr, dev-&gt;irq, dev-&gt;dma);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-out:</div><div class='del'>-	free_dma(dev-&gt;dma);</div><div class='del'>-out2:</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-out3:</div><div class='del'>-	tmsdev_term(dev);</div><div class='del'>-out4:</div><div class='del'>-	release_region(dev-&gt;base_addr, SK_ISA_IO_EXTENT);</div><div class='del'>-out5:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Reads MAC address from adapter RAM, which should've read it from</div><div class='del'>- * the onboard ROM.  </div><div class='del'>- *</div><div class='del'>- * Calling this on a board that does not support it can be a very</div><div class='del'>- * dangerous thing.  The Madge board, for instance, will lock your</div><div class='del'>- * machine hard when this is called.  Luckily, its supported in a</div><div class='del'>- * separate driver.  --ASF</div><div class='del'>- */</div><div class='del'>-static void sk_isa_read_eeprom(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	</div><div class='del'>-	/* Address: 0000:0000 */</div><div class='del'>-	sk_isa_sifwritew(dev, 0, SIFADX);</div><div class='del'>-	sk_isa_sifwritew(dev, 0, SIFADR);	</div><div class='del'>-	</div><div class='del'>-	/* Read six byte MAC address data */</div><div class='del'>-	dev-&gt;addr_len = 6;</div><div class='del'>-	for(i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = sk_isa_sifreadw(dev, SIFINC) &gt;&gt; 8;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned short sk_isa_setnselout_pins(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sk_isa_open(struct net_device *dev)</div><div class='del'>-{  </div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	unsigned short val = 0;</div><div class='del'>-	unsigned short oldval;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	val = 0;</div><div class='del'>-	for(i = 0; irqlist[i] != 0; i++)</div><div class='del'>-	{</div><div class='del'>-		if(irqlist[i] == dev-&gt;irq)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	val |= CYCLE_TIME &lt;&lt; 2;</div><div class='del'>-	val |= i &lt;&lt; 4;</div><div class='del'>-	i = dev-&gt;dma - 5;</div><div class='del'>-	val |= i;</div><div class='del'>-	if(tp-&gt;DataRate == SPEED_4)</div><div class='del'>-		val |= LINE_SPEED_BIT;</div><div class='del'>-	else</div><div class='del'>-		val &amp;= ~LINE_SPEED_BIT;</div><div class='del'>-	oldval = sk_isa_sifreadb(dev, POSREG);</div><div class='del'>-	/* Leave cycle bits alone */</div><div class='del'>-	oldval |= 0xf3;</div><div class='del'>-	val &amp;= oldval;</div><div class='del'>-	sk_isa_sifwriteb(dev, val, POSREG);</div><div class='del'>-</div><div class='del'>-	return tms380tr_open(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define ISATR_MAX_ADAPTERS 3</div><div class='del'>-</div><div class='del'>-static int io[ISATR_MAX_ADAPTERS];</div><div class='del'>-static int irq[ISATR_MAX_ADAPTERS];</div><div class='del'>-static int dma[ISATR_MAX_ADAPTERS];</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-module_param_array(io, int, NULL, 0);</div><div class='del'>-module_param_array(irq, int, NULL, 0);</div><div class='del'>-module_param_array(dma, int, NULL, 0);</div><div class='del'>-</div><div class='del'>-static struct platform_device *sk_isa_dev[ISATR_MAX_ADAPTERS];</div><div class='del'>-</div><div class='del'>-static struct platform_driver sk_isa_driver = {</div><div class='del'>-	.driver		= {</div><div class='del'>-		.name	= "skisa",</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init sk_isa_init(void)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct platform_device *pdev;</div><div class='del'>-	int i, num = 0, err = 0;</div><div class='del'>-</div><div class='del'>-	sk_isa_netdev_ops = tms380tr_netdev_ops;</div><div class='del'>-	sk_isa_netdev_ops.ndo_open = sk_isa_open;</div><div class='del'>-	sk_isa_netdev_ops.ndo_stop = tms380tr_close;</div><div class='del'>-</div><div class='del'>-	err = platform_driver_register(&amp;sk_isa_driver);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ISATR_MAX_ADAPTERS ; i++) {</div><div class='del'>-		dev = alloc_trdev(sizeof(struct net_local));</div><div class='del'>-		if (!dev)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		dev-&gt;base_addr = io[i];</div><div class='del'>-		dev-&gt;irq = irq[i];</div><div class='del'>-		dev-&gt;dma = dma[i];</div><div class='del'>-		pdev = platform_device_register_simple("skisa",</div><div class='del'>-			i, NULL, 0);</div><div class='del'>-		if (IS_ERR(pdev)) {</div><div class='del'>-			free_netdev(dev);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		err = setup_card(dev, &amp;pdev-&gt;dev);</div><div class='del'>-		if (!err) {</div><div class='del'>-			sk_isa_dev[i] = pdev;</div><div class='del'>-			platform_set_drvdata(sk_isa_dev[i], dev);</div><div class='del'>-			++num;</div><div class='del'>-		} else {</div><div class='del'>-			platform_device_unregister(pdev);</div><div class='del'>-			free_netdev(dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk(KERN_NOTICE "skisa.c: %d cards found.\n", num);</div><div class='del'>-	/* Probe for cards. */</div><div class='del'>-	if (num == 0) {</div><div class='del'>-		printk(KERN_NOTICE "skisa.c: No cards found.\n");</div><div class='del'>-		platform_driver_unregister(&amp;sk_isa_driver);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sk_isa_cleanup(void)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ISATR_MAX_ADAPTERS ; i++) {</div><div class='del'>-		struct platform_device *pdev = sk_isa_dev[i];</div><div class='del'>-</div><div class='del'>-		if (!pdev)</div><div class='del'>-			continue;</div><div class='del'>-		dev = platform_get_drvdata(pdev);</div><div class='del'>-		unregister_netdev(dev);</div><div class='del'>-		release_region(dev-&gt;base_addr, SK_ISA_IO_EXTENT);</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='del'>-		free_dma(dev-&gt;dma);</div><div class='del'>-		tmsdev_term(dev);</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-		platform_set_drvdata(pdev, NULL);</div><div class='del'>-		platform_device_unregister(pdev);</div><div class='del'>-	}</div><div class='del'>-	platform_driver_unregister(&amp;sk_isa_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sk_isa_init);</div><div class='del'>-module_exit(sk_isa_cleanup);</div><div class='head'>diff --git a/drivers/net/tokenring/smctr.c b/drivers/net/tokenring/smctr.c<br/>deleted file mode 100644<br/>index cb35fb79e016..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/smctr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/smctr.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,5717 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  smctr.c: A network driver for the SMC Token Ring Adapters.</div><div class='del'>- *</div><div class='del'>- *  Written by Jay Schulist &lt;jschlst@samba.org&gt;</div><div class='del'>- *</div><div class='del'>- *  This software may be used and distributed according to the terms</div><div class='del'>- *  of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- *</div><div class='del'>- *  This device driver works with the following SMC adapters:</div><div class='del'>- *      - SMC TokenCard Elite   (8115T, chips 825/584)</div><div class='del'>- *      - SMC TokenCard Elite/A MCA (8115T/A, chips 825/594)</div><div class='del'>- *</div><div class='del'>- *  Source(s):</div><div class='del'>- *  	- SMC TokenCard SDK.</div><div class='del'>- *</div><div class='del'>- *  Maintainer(s):</div><div class='del'>- *    JS        Jay Schulist &lt;jschlst@samba.org&gt;</div><div class='del'>- *</div><div class='del'>- * Changes:</div><div class='del'>- *    07102000          JS      Fixed a timing problem in smctr_wait_cmd();</div><div class='del'>- *                              Also added a bit more discriptive error msgs.</div><div class='del'>- *    07122000          JS      Fixed problem with detecting a card with</div><div class='del'>- *				module io/irq/mem specified.</div><div class='del'>- *</div><div class='del'>- *  To do:</div><div class='del'>- *    1. Multicast support.</div><div class='del'>- *</div><div class='del'>- *  Initial 2.5 cleanup Alan Cox &lt;alan@lxorguk.ukuu.org.uk&gt;  2002/10/28</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/fcntl.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/time.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/mca-legacy.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/firmware.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-</div><div class='del'>-#if BITS_PER_LONG == 64</div><div class='del'>-#error FIXME: driver does not support 64-bit platforms</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#include "smctr.h"               /* Our Stuff */</div><div class='del'>-</div><div class='del'>-static const char version[] __initdata =</div><div class='del'>-	KERN_INFO "smctr.c: v1.4 7/12/00 by jschlst@samba.org\n";</div><div class='del'>-static const char cardname[] = "smctr";</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define SMCTR_IO_EXTENT   20</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-static unsigned int smctr_posid = 0x6ec6;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int ringspeed;</div><div class='del'>-</div><div class='del'>-/* SMC Name of the Adapter. */</div><div class='del'>-static char smctr_name[] = "SMC TokenCard";</div><div class='del'>-static char *smctr_model = "Unknown";</div><div class='del'>-</div><div class='del'>-/* Use 0 for production, 1 for verification, 2 for debug, and</div><div class='del'>- * 3 for very verbose debug.</div><div class='del'>- */</div><div class='del'>-#ifndef SMCTR_DEBUG</div><div class='del'>-#define SMCTR_DEBUG 1</div><div class='del'>-#endif</div><div class='del'>-static unsigned int smctr_debug = SMCTR_DEBUG;</div><div class='del'>-</div><div class='del'>-/* smctr.c prototypes and functions are arranged alphabeticly </div><div class='del'>- * for clearity, maintainability and pure old fashion fun. </div><div class='del'>- */</div><div class='del'>-/* A */</div><div class='del'>-static int smctr_alloc_shared_memory(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-/* B */</div><div class='del'>-static int smctr_bypass_state(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-/* C */</div><div class='del'>-static int smctr_checksum_firmware(struct net_device *dev);</div><div class='del'>-static int __init smctr_chk_isa(struct net_device *dev);</div><div class='del'>-static int smctr_chg_rx_mask(struct net_device *dev);</div><div class='del'>-static int smctr_clear_int(struct net_device *dev);</div><div class='del'>-static int smctr_clear_trc_reset(int ioaddr);</div><div class='del'>-static int smctr_close(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-/* D */</div><div class='del'>-static int smctr_decode_firmware(struct net_device *dev,</div><div class='del'>-				 const struct firmware *fw);</div><div class='del'>-static int smctr_disable_16bit(struct net_device *dev);</div><div class='del'>-static int smctr_disable_adapter_ctrl_store(struct net_device *dev);</div><div class='del'>-static int smctr_disable_bic_int(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-/* E */</div><div class='del'>-static int smctr_enable_16bit(struct net_device *dev);</div><div class='del'>-static int smctr_enable_adapter_ctrl_store(struct net_device *dev);</div><div class='del'>-static int smctr_enable_adapter_ram(struct net_device *dev);</div><div class='del'>-static int smctr_enable_bic_int(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-/* G */</div><div class='del'>-static int __init smctr_get_boardid(struct net_device *dev, int mca);</div><div class='del'>-static int smctr_get_group_address(struct net_device *dev);</div><div class='del'>-static int smctr_get_functional_address(struct net_device *dev);</div><div class='del'>-static unsigned int smctr_get_num_rx_bdbs(struct net_device *dev);</div><div class='del'>-static int smctr_get_physical_drop_number(struct net_device *dev);</div><div class='del'>-static __u8 *smctr_get_rx_pointer(struct net_device *dev, short queue);</div><div class='del'>-static int smctr_get_station_id(struct net_device *dev);</div><div class='del'>-static FCBlock *smctr_get_tx_fcb(struct net_device *dev, __u16 queue,</div><div class='del'>-        __u16 bytes_count);</div><div class='del'>-static int smctr_get_upstream_neighbor_addr(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-/* H */</div><div class='del'>-static int smctr_hardware_send_packet(struct net_device *dev,</div><div class='del'>-        struct net_local *tp);</div><div class='del'>-/* I */</div><div class='del'>-static int smctr_init_acbs(struct net_device *dev);</div><div class='del'>-static int smctr_init_adapter(struct net_device *dev);</div><div class='del'>-static int smctr_init_card_real(struct net_device *dev);</div><div class='del'>-static int smctr_init_rx_bdbs(struct net_device *dev);</div><div class='del'>-static int smctr_init_rx_fcbs(struct net_device *dev);</div><div class='del'>-static int smctr_init_shared_memory(struct net_device *dev);</div><div class='del'>-static int smctr_init_tx_bdbs(struct net_device *dev);</div><div class='del'>-static int smctr_init_tx_fcbs(struct net_device *dev);</div><div class='del'>-static int smctr_internal_self_test(struct net_device *dev);</div><div class='del'>-static irqreturn_t smctr_interrupt(int irq, void *dev_id);</div><div class='del'>-static int smctr_issue_enable_int_cmd(struct net_device *dev,</div><div class='del'>-        __u16 interrupt_enable_mask);</div><div class='del'>-static int smctr_issue_int_ack(struct net_device *dev, __u16 iack_code,</div><div class='del'>-        __u16 ibits);</div><div class='del'>-static int smctr_issue_init_timers_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_issue_init_txrx_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_issue_insert_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_issue_read_ring_status_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_issue_read_word_cmd(struct net_device *dev, __u16 aword_cnt);</div><div class='del'>-static int smctr_issue_remove_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_issue_resume_acb_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_issue_resume_rx_bdb_cmd(struct net_device *dev, __u16 queue);</div><div class='del'>-static int smctr_issue_resume_rx_fcb_cmd(struct net_device *dev, __u16 queue);</div><div class='del'>-static int smctr_issue_resume_tx_fcb_cmd(struct net_device *dev, __u16 queue);</div><div class='del'>-static int smctr_issue_test_internal_rom_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_issue_test_hic_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_issue_test_mac_reg_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_issue_trc_loopback_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_issue_tri_loopback_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_issue_write_byte_cmd(struct net_device *dev,</div><div class='del'>-        short aword_cnt, void *byte);</div><div class='del'>-static int smctr_issue_write_word_cmd(struct net_device *dev,</div><div class='del'>-        short aword_cnt, void *word);</div><div class='del'>-</div><div class='del'>-/* J */</div><div class='del'>-static int smctr_join_complete_state(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-/* L */</div><div class='del'>-static int smctr_link_tx_fcbs_to_bdbs(struct net_device *dev);</div><div class='del'>-static int smctr_load_firmware(struct net_device *dev);</div><div class='del'>-static int smctr_load_node_addr(struct net_device *dev);</div><div class='del'>-static int smctr_lobe_media_test(struct net_device *dev);</div><div class='del'>-static int smctr_lobe_media_test_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_lobe_media_test_state(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-/* M */</div><div class='del'>-static int smctr_make_8025_hdr(struct net_device *dev,</div><div class='del'>-        MAC_HEADER *rmf, MAC_HEADER *tmf, __u16 ac_fc);</div><div class='del'>-static int smctr_make_access_pri(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv);</div><div class='del'>-static int smctr_make_addr_mod(struct net_device *dev, MAC_SUB_VECTOR *tsv);</div><div class='del'>-static int smctr_make_auth_funct_class(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv);</div><div class='del'>-static int smctr_make_corr(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv, __u16 correlator);</div><div class='del'>-static int smctr_make_funct_addr(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv);</div><div class='del'>-static int smctr_make_group_addr(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv);</div><div class='del'>-static int smctr_make_phy_drop_num(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv);</div><div class='del'>-static int smctr_make_product_id(struct net_device *dev, MAC_SUB_VECTOR *tsv);</div><div class='del'>-static int smctr_make_station_id(struct net_device *dev, MAC_SUB_VECTOR *tsv);</div><div class='del'>-static int smctr_make_ring_station_status(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv);</div><div class='del'>-static int smctr_make_ring_station_version(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv);</div><div class='del'>-static int smctr_make_tx_status_code(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv, __u16 tx_fstatus);</div><div class='del'>-static int smctr_make_upstream_neighbor_addr(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv);</div><div class='del'>-static int smctr_make_wrap_data(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv);</div><div class='del'>-</div><div class='del'>-/* O */</div><div class='del'>-static int smctr_open(struct net_device *dev);</div><div class='del'>-static int smctr_open_tr(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-/* P */</div><div class='del'>-struct net_device *smctr_probe(int unit);</div><div class='del'>-static int __init smctr_probe1(struct net_device *dev, int ioaddr);</div><div class='del'>-static int smctr_process_rx_packet(MAC_HEADER *rmf, __u16 size,</div><div class='del'>-        struct net_device *dev, __u16 rx_status);</div><div class='del'>-</div><div class='del'>-/* R */</div><div class='del'>-static int smctr_ram_memory_test(struct net_device *dev);</div><div class='del'>-static int smctr_rcv_chg_param(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 *correlator);</div><div class='del'>-static int smctr_rcv_init(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 *correlator);</div><div class='del'>-static int smctr_rcv_tx_forward(struct net_device *dev, MAC_HEADER *rmf);</div><div class='del'>-static int smctr_rcv_rq_addr_state_attch(struct net_device *dev,</div><div class='del'>-        MAC_HEADER *rmf, __u16 *correlator);</div><div class='del'>-static int smctr_rcv_unknown(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 *correlator);</div><div class='del'>-static int smctr_reset_adapter(struct net_device *dev);</div><div class='del'>-static int smctr_restart_tx_chain(struct net_device *dev, short queue);</div><div class='del'>-static int smctr_ring_status_chg(struct net_device *dev);</div><div class='del'>-static int smctr_rx_frame(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-/* S */</div><div class='del'>-static int smctr_send_dat(struct net_device *dev);</div><div class='del'>-static netdev_tx_t smctr_send_packet(struct sk_buff *skb,</div><div class='del'>-					   struct net_device *dev);</div><div class='del'>-static int smctr_send_lobe_media_test(struct net_device *dev);</div><div class='del'>-static int smctr_send_rpt_addr(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 correlator);</div><div class='del'>-static int smctr_send_rpt_attch(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 correlator);</div><div class='del'>-static int smctr_send_rpt_state(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 correlator);</div><div class='del'>-static int smctr_send_rpt_tx_forward(struct net_device *dev,</div><div class='del'>-        MAC_HEADER *rmf, __u16 tx_fstatus);</div><div class='del'>-static int smctr_send_rsp(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 rcode, __u16 correlator);</div><div class='del'>-static int smctr_send_rq_init(struct net_device *dev);</div><div class='del'>-static int smctr_send_tx_forward(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 *tx_fstatus);</div><div class='del'>-static int smctr_set_auth_access_pri(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *rsv);</div><div class='del'>-static int smctr_set_auth_funct_class(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *rsv);</div><div class='del'>-static int smctr_set_corr(struct net_device *dev, MAC_SUB_VECTOR *rsv,</div><div class='del'>-	__u16 *correlator);</div><div class='del'>-static int smctr_set_error_timer_value(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *rsv);</div><div class='del'>-static int smctr_set_frame_forward(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *rsv, __u8 dc_sc);</div><div class='del'>-static int smctr_set_local_ring_num(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *rsv);</div><div class='del'>-static unsigned short smctr_set_ctrl_attention(struct net_device *dev);</div><div class='del'>-static void smctr_set_multicast_list(struct net_device *dev);</div><div class='del'>-static int smctr_set_page(struct net_device *dev, __u8 *buf);</div><div class='del'>-static int smctr_set_phy_drop(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *rsv);</div><div class='del'>-static int smctr_set_ring_speed(struct net_device *dev);</div><div class='del'>-static int smctr_set_rx_look_ahead(struct net_device *dev);</div><div class='del'>-static int smctr_set_trc_reset(int ioaddr);</div><div class='del'>-static int smctr_setup_single_cmd(struct net_device *dev,</div><div class='del'>-        __u16 command, __u16 subcommand);</div><div class='del'>-static int smctr_setup_single_cmd_w_data(struct net_device *dev,</div><div class='del'>-        __u16 command, __u16 subcommand);</div><div class='del'>-static char *smctr_malloc(struct net_device *dev, __u16 size);</div><div class='del'>-static int smctr_status_chg(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-/* T */</div><div class='del'>-static void smctr_timeout(struct net_device *dev);</div><div class='del'>-static int smctr_trc_send_packet(struct net_device *dev, FCBlock *fcb,</div><div class='del'>-        __u16 queue);</div><div class='del'>-static __u16 smctr_tx_complete(struct net_device *dev, __u16 queue);</div><div class='del'>-static unsigned short smctr_tx_move_frame(struct net_device *dev,</div><div class='del'>-        struct sk_buff *skb, __u8 *pbuff, unsigned int bytes);</div><div class='del'>-</div><div class='del'>-/* U */</div><div class='del'>-static int smctr_update_err_stats(struct net_device *dev);</div><div class='del'>-static int smctr_update_rx_chain(struct net_device *dev, __u16 queue);</div><div class='del'>-static int smctr_update_tx_chain(struct net_device *dev, FCBlock *fcb,</div><div class='del'>-        __u16 queue);</div><div class='del'>-</div><div class='del'>-/* W */</div><div class='del'>-static int smctr_wait_cmd(struct net_device *dev);</div><div class='del'>-static int smctr_wait_while_cbusy(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-#define TO_256_BYTE_BOUNDRY(X)  (((X + 0xff) &amp; 0xff00) - X)</div><div class='del'>-#define TO_PARAGRAPH_BOUNDRY(X) (((X + 0x0f) &amp; 0xfff0) - X)</div><div class='del'>-#define PARAGRAPH_BOUNDRY(X)    smctr_malloc(dev, TO_PARAGRAPH_BOUNDRY(X))</div><div class='del'>-</div><div class='del'>-/* Allocate Adapter Shared Memory.</div><div class='del'>- * IMPORTANT NOTE: Any changes to this function MUST be mirrored in the</div><div class='del'>- * function "get_num_rx_bdbs" below!!!</div><div class='del'>- *</div><div class='del'>- * Order of memory allocation:</div><div class='del'>- *</div><div class='del'>- *       0. Initial System Configuration Block Pointer</div><div class='del'>- *       1. System Configuration Block</div><div class='del'>- *       2. System Control Block</div><div class='del'>- *       3. Action Command Block</div><div class='del'>- *       4. Interrupt Status Block</div><div class='del'>- *</div><div class='del'>- *       5. MAC TX FCB'S</div><div class='del'>- *       6. NON-MAC TX FCB'S</div><div class='del'>- *       7. MAC TX BDB'S</div><div class='del'>- *       8. NON-MAC TX BDB'S</div><div class='del'>- *       9. MAC RX FCB'S</div><div class='del'>- *      10. NON-MAC RX FCB'S</div><div class='del'>- *      11. MAC RX BDB'S</div><div class='del'>- *      12. NON-MAC RX BDB'S</div><div class='del'>- *      13. MAC TX Data Buffer( 1, 256 byte buffer)</div><div class='del'>- *      14. MAC RX Data Buffer( 1, 256 byte buffer)</div><div class='del'>- *</div><div class='del'>- *      15. NON-MAC TX Data Buffer</div><div class='del'>- *      16. NON-MAC RX Data Buffer</div><div class='del'>- */</div><div class='del'>-static int smctr_alloc_shared_memory(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_alloc_shared_memory\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        /* Allocate initial System Control Block pointer.</div><div class='del'>-         * This pointer is located in the last page, last offset - 4.</div><div class='del'>-         */</div><div class='del'>-        tp-&gt;iscpb_ptr = (ISCPBlock *)(tp-&gt;ram_access + ((__u32)64 * 0x400)</div><div class='del'>-                - (long)ISCP_BLOCK_SIZE);</div><div class='del'>-</div><div class='del'>-        /* Allocate System Control Blocks. */</div><div class='del'>-        tp-&gt;scgb_ptr = (SCGBlock *)smctr_malloc(dev, sizeof(SCGBlock));</div><div class='del'>-        PARAGRAPH_BOUNDRY(tp-&gt;sh_mem_used);</div><div class='del'>-</div><div class='del'>-        tp-&gt;sclb_ptr = (SCLBlock *)smctr_malloc(dev, sizeof(SCLBlock));</div><div class='del'>-        PARAGRAPH_BOUNDRY(tp-&gt;sh_mem_used);</div><div class='del'>-</div><div class='del'>-        tp-&gt;acb_head = (ACBlock *)smctr_malloc(dev,</div><div class='del'>-                sizeof(ACBlock)*tp-&gt;num_acbs);</div><div class='del'>-        PARAGRAPH_BOUNDRY(tp-&gt;sh_mem_used);</div><div class='del'>-</div><div class='del'>-        tp-&gt;isb_ptr = (ISBlock *)smctr_malloc(dev, sizeof(ISBlock));</div><div class='del'>-        PARAGRAPH_BOUNDRY(tp-&gt;sh_mem_used);</div><div class='del'>-</div><div class='del'>-        tp-&gt;misc_command_data = (__u16 *)smctr_malloc(dev, MISC_DATA_SIZE);</div><div class='del'>-        PARAGRAPH_BOUNDRY(tp-&gt;sh_mem_used);</div><div class='del'>-</div><div class='del'>-        /* Allocate transmit FCBs. */</div><div class='del'>-        tp-&gt;tx_fcb_head[MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,</div><div class='del'>-                sizeof(FCBlock) * tp-&gt;num_tx_fcbs[MAC_QUEUE]);</div><div class='del'>-</div><div class='del'>-        tp-&gt;tx_fcb_head[NON_MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,</div><div class='del'>-                sizeof(FCBlock) * tp-&gt;num_tx_fcbs[NON_MAC_QUEUE]);</div><div class='del'>-</div><div class='del'>-        tp-&gt;tx_fcb_head[BUG_QUEUE] = (FCBlock *)smctr_malloc(dev,</div><div class='del'>-                sizeof(FCBlock) * tp-&gt;num_tx_fcbs[BUG_QUEUE]);</div><div class='del'>-</div><div class='del'>-        /* Allocate transmit BDBs. */</div><div class='del'>-        tp-&gt;tx_bdb_head[MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,</div><div class='del'>-                sizeof(BDBlock) * tp-&gt;num_tx_bdbs[MAC_QUEUE]);</div><div class='del'>-</div><div class='del'>-        tp-&gt;tx_bdb_head[NON_MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,</div><div class='del'>-                sizeof(BDBlock) * tp-&gt;num_tx_bdbs[NON_MAC_QUEUE]);</div><div class='del'>-</div><div class='del'>-        tp-&gt;tx_bdb_head[BUG_QUEUE] = (BDBlock *)smctr_malloc(dev,</div><div class='del'>-                sizeof(BDBlock) * tp-&gt;num_tx_bdbs[BUG_QUEUE]);</div><div class='del'>-</div><div class='del'>-        /* Allocate receive FCBs. */</div><div class='del'>-        tp-&gt;rx_fcb_head[MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,</div><div class='del'>-                sizeof(FCBlock) * tp-&gt;num_rx_fcbs[MAC_QUEUE]);</div><div class='del'>-</div><div class='del'>-        tp-&gt;rx_fcb_head[NON_MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,</div><div class='del'>-                sizeof(FCBlock) * tp-&gt;num_rx_fcbs[NON_MAC_QUEUE]);</div><div class='del'>-</div><div class='del'>-        /* Allocate receive BDBs. */</div><div class='del'>-        tp-&gt;rx_bdb_head[MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,</div><div class='del'>-                sizeof(BDBlock) * tp-&gt;num_rx_bdbs[MAC_QUEUE]);</div><div class='del'>-</div><div class='del'>-        tp-&gt;rx_bdb_end[MAC_QUEUE] = (BDBlock *)smctr_malloc(dev, 0);</div><div class='del'>-</div><div class='del'>-        tp-&gt;rx_bdb_head[NON_MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,</div><div class='del'>-                sizeof(BDBlock) * tp-&gt;num_rx_bdbs[NON_MAC_QUEUE]);</div><div class='del'>-</div><div class='del'>-        tp-&gt;rx_bdb_end[NON_MAC_QUEUE] = (BDBlock *)smctr_malloc(dev, 0);</div><div class='del'>-</div><div class='del'>-        /* Allocate MAC transmit buffers.</div><div class='del'>-         * MAC Tx Buffers doen't have to be on an ODD Boundary.</div><div class='del'>-         */</div><div class='del'>-        tp-&gt;tx_buff_head[MAC_QUEUE]</div><div class='del'>-                = (__u16 *)smctr_malloc(dev, tp-&gt;tx_buff_size[MAC_QUEUE]);</div><div class='del'>-        tp-&gt;tx_buff_curr[MAC_QUEUE] = tp-&gt;tx_buff_head[MAC_QUEUE];</div><div class='del'>-        tp-&gt;tx_buff_end [MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);</div><div class='del'>-</div><div class='del'>-        /* Allocate BUG transmit buffers. */</div><div class='del'>-        tp-&gt;tx_buff_head[BUG_QUEUE]</div><div class='del'>-                = (__u16 *)smctr_malloc(dev, tp-&gt;tx_buff_size[BUG_QUEUE]);</div><div class='del'>-        tp-&gt;tx_buff_curr[BUG_QUEUE] = tp-&gt;tx_buff_head[BUG_QUEUE];</div><div class='del'>-        tp-&gt;tx_buff_end[BUG_QUEUE] = (__u16 *)smctr_malloc(dev, 0);</div><div class='del'>-</div><div class='del'>-        /* Allocate MAC receive data buffers.</div><div class='del'>-         * MAC Rx buffer doesn't have to be on a 256 byte boundary.</div><div class='del'>-         */</div><div class='del'>-        tp-&gt;rx_buff_head[MAC_QUEUE] = (__u16 *)smctr_malloc(dev,</div><div class='del'>-                RX_DATA_BUFFER_SIZE * tp-&gt;num_rx_bdbs[MAC_QUEUE]);</div><div class='del'>-        tp-&gt;rx_buff_end[MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);</div><div class='del'>-</div><div class='del'>-        /* Allocate Non-MAC transmit buffers.</div><div class='del'>-         * ?? For maximum Netware performance, put Tx Buffers on</div><div class='del'>-         * ODD Boundary and then restore malloc to Even Boundrys.</div><div class='del'>-         */</div><div class='del'>-        smctr_malloc(dev, 1L);</div><div class='del'>-        tp-&gt;tx_buff_head[NON_MAC_QUEUE]</div><div class='del'>-                = (__u16 *)smctr_malloc(dev, tp-&gt;tx_buff_size[NON_MAC_QUEUE]);</div><div class='del'>-        tp-&gt;tx_buff_curr[NON_MAC_QUEUE] = tp-&gt;tx_buff_head[NON_MAC_QUEUE];</div><div class='del'>-        tp-&gt;tx_buff_end [NON_MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);</div><div class='del'>-        smctr_malloc(dev, 1L);</div><div class='del'>-</div><div class='del'>-        /* Allocate Non-MAC receive data buffers.</div><div class='del'>-         * To guarantee a minimum of 256 contiguous memory to</div><div class='del'>-         * UM_Receive_Packet's lookahead pointer, before a page</div><div class='del'>-         * change or ring end is encountered, place each rx buffer on</div><div class='del'>-         * a 256 byte boundary.</div><div class='del'>-         */</div><div class='del'>-        smctr_malloc(dev, TO_256_BYTE_BOUNDRY(tp-&gt;sh_mem_used));</div><div class='del'>-        tp-&gt;rx_buff_head[NON_MAC_QUEUE] = (__u16 *)smctr_malloc(dev,</div><div class='del'>-                RX_DATA_BUFFER_SIZE * tp-&gt;num_rx_bdbs[NON_MAC_QUEUE]);</div><div class='del'>-        tp-&gt;rx_buff_end[NON_MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Enter Bypass state. */</div><div class='del'>-static int smctr_bypass_state(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-	if(smctr_debug &gt; 10)</div><div class='del'>-        	printk(KERN_DEBUG "%s: smctr_bypass_state\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd(dev, ACB_CMD_CHANGE_JOIN_STATE, JS_BYPASS_STATE);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_checksum_firmware(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        __u16 i, checksum = 0;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_checksum_firmware\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        smctr_enable_adapter_ctrl_store(dev);</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; CS_RAM_SIZE; i += 2)</div><div class='del'>-                checksum += *((__u16 *)(tp-&gt;ram_access + i));</div><div class='del'>-</div><div class='del'>-        tp-&gt;microcode_version = *(__u16 *)(tp-&gt;ram_access</div><div class='del'>-                + CS_RAM_VERSION_OFFSET);</div><div class='del'>-        tp-&gt;microcode_version &gt;&gt;= 8;</div><div class='del'>-</div><div class='del'>-        smctr_disable_adapter_ctrl_store(dev);</div><div class='del'>-</div><div class='del'>-        if(checksum)</div><div class='del'>-                return checksum;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init smctr_chk_mca(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	int current_slot;</div><div class='del'>-	__u8 r1, r2, r3, r4, r5;</div><div class='del'>-</div><div class='del'>-	current_slot = mca_find_unused_adapter(smctr_posid, 0);</div><div class='del'>-	if(current_slot == MCA_NOTFOUND)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	mca_set_adapter_name(current_slot, smctr_name);</div><div class='del'>-	mca_mark_as_used(current_slot);</div><div class='del'>-	tp-&gt;slot_num = current_slot;</div><div class='del'>-</div><div class='del'>-	r1 = mca_read_stored_pos(tp-&gt;slot_num, 2);</div><div class='del'>-	r2 = mca_read_stored_pos(tp-&gt;slot_num, 3);</div><div class='del'>-</div><div class='del'>-	if(tp-&gt;slot_num)</div><div class='del'>-		outb(CNFG_POS_CONTROL_REG, (__u8)((tp-&gt;slot_num - 1) | CNFG_SLOT_ENABLE_BIT));</div><div class='del'>-	else</div><div class='del'>-		outb(CNFG_POS_CONTROL_REG, (__u8)((tp-&gt;slot_num) | CNFG_SLOT_ENABLE_BIT));</div><div class='del'>-</div><div class='del'>-	r1 = inb(CNFG_POS_REG1);</div><div class='del'>-	r2 = inb(CNFG_POS_REG0);</div><div class='del'>-</div><div class='del'>-	tp-&gt;bic_type = BIC_594_CHIP;</div><div class='del'>-</div><div class='del'>-	/* IO */</div><div class='del'>-	r2 = mca_read_stored_pos(tp-&gt;slot_num, 2);</div><div class='del'>-	r2 &amp;= 0xF0;</div><div class='del'>-	dev-&gt;base_addr = ((__u16)r2 &lt;&lt; 8) + (__u16)0x800;</div><div class='del'>-	request_region(dev-&gt;base_addr, SMCTR_IO_EXTENT, smctr_name);</div><div class='del'>-</div><div class='del'>-	/* IRQ */</div><div class='del'>-	r5 = mca_read_stored_pos(tp-&gt;slot_num, 5);</div><div class='del'>-	r5 &amp;= 0xC;</div><div class='del'>-        switch(r5)</div><div class='del'>-	{</div><div class='del'>-            	case 0:</div><div class='del'>-			dev-&gt;irq = 3;</div><div class='del'>-               		break;</div><div class='del'>-</div><div class='del'>-            	case 0x4:</div><div class='del'>-			dev-&gt;irq = 4;</div><div class='del'>-               		break;</div><div class='del'>-</div><div class='del'>-            	case 0x8:</div><div class='del'>-			dev-&gt;irq = 10;</div><div class='del'>-               		break;</div><div class='del'>-</div><div class='del'>-            	default:</div><div class='del'>-			dev-&gt;irq = 15;</div><div class='del'>-               		break;</div><div class='del'>-	}</div><div class='del'>-	if (request_irq(dev-&gt;irq, smctr_interrupt, IRQF_SHARED, smctr_name, dev)) {</div><div class='del'>-		release_region(dev-&gt;base_addr, SMCTR_IO_EXTENT);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Get RAM base */</div><div class='del'>-	r3 = mca_read_stored_pos(tp-&gt;slot_num, 3);</div><div class='del'>-	tp-&gt;ram_base = ((__u32)(r3 &amp; 0x7) &lt;&lt; 13) + 0x0C0000;</div><div class='del'>-	if (r3 &amp; 0x8)</div><div class='del'>-		tp-&gt;ram_base += 0x010000;</div><div class='del'>-	if (r3 &amp; 0x80)</div><div class='del'>-		tp-&gt;ram_base += 0xF00000;</div><div class='del'>-</div><div class='del'>-	/* Get Ram Size */</div><div class='del'>-	r3 &amp;= 0x30;</div><div class='del'>-	r3 &gt;&gt;= 4;</div><div class='del'>-</div><div class='del'>-	tp-&gt;ram_usable = (__u16)CNFG_SIZE_8KB &lt;&lt; r3;</div><div class='del'>-	tp-&gt;ram_size = (__u16)CNFG_SIZE_64KB;</div><div class='del'>-	tp-&gt;board_id |= TOKEN_MEDIA;</div><div class='del'>-</div><div class='del'>-	r4 = mca_read_stored_pos(tp-&gt;slot_num, 4);</div><div class='del'>-	tp-&gt;rom_base = ((__u32)(r4 &amp; 0x7) &lt;&lt; 13) + 0x0C0000;</div><div class='del'>-	if (r4 &amp; 0x8)</div><div class='del'>-		tp-&gt;rom_base += 0x010000;</div><div class='del'>-</div><div class='del'>-	/* Get ROM size. */</div><div class='del'>-	r4 &gt;&gt;= 4;</div><div class='del'>-	switch (r4) {</div><div class='del'>-		case 0:</div><div class='del'>-			tp-&gt;rom_size = CNFG_SIZE_8KB;</div><div class='del'>-			break;</div><div class='del'>-		case 1:</div><div class='del'>-			tp-&gt;rom_size = CNFG_SIZE_16KB;</div><div class='del'>-			break;</div><div class='del'>-		case 2:</div><div class='del'>-			tp-&gt;rom_size = CNFG_SIZE_32KB;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			tp-&gt;rom_size = ROM_DISABLE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Get Media Type. */</div><div class='del'>-	r5 = mca_read_stored_pos(tp-&gt;slot_num, 5);</div><div class='del'>-	r5 &amp;= CNFG_MEDIA_TYPE_MASK;</div><div class='del'>-	switch(r5)</div><div class='del'>-	{</div><div class='del'>-		case (0):</div><div class='del'>-			tp-&gt;media_type = MEDIA_STP_4;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case (1):</div><div class='del'>-			tp-&gt;media_type = MEDIA_STP_16;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case (3):</div><div class='del'>-			tp-&gt;media_type = MEDIA_UTP_16;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		default:</div><div class='del'>-			tp-&gt;media_type = MEDIA_UTP_4;</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	tp-&gt;media_menu = 14;</div><div class='del'>-</div><div class='del'>-	r2 = mca_read_stored_pos(tp-&gt;slot_num, 2);</div><div class='del'>-	if(!(r2 &amp; 0x02))</div><div class='del'>-		tp-&gt;mode_bits |= EARLY_TOKEN_REL;</div><div class='del'>-</div><div class='del'>-	/* Disable slot */</div><div class='del'>-	outb(CNFG_POS_CONTROL_REG, 0);</div><div class='del'>-</div><div class='del'>-	tp-&gt;board_id = smctr_get_boardid(dev, 1);</div><div class='del'>-	switch(tp-&gt;board_id &amp; 0xffff)</div><div class='del'>-        {</div><div class='del'>-                case WD8115TA:</div><div class='del'>-                        smctr_model = "8115T/A";</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case WD8115T:</div><div class='del'>-			if(tp-&gt;extra_info &amp; CHIP_REV_MASK)</div><div class='del'>-                                smctr_model = "8115T rev XE";</div><div class='del'>-                        else</div><div class='del'>-                                smctr_model = "8115T rev XD";</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                default:</div><div class='del'>-                        smctr_model = "Unknown";</div><div class='del'>-                        break;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-#else</div><div class='del'>-	return -1;</div><div class='del'>-#endif /* CONFIG_MCA_LEGACY */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_chg_rx_mask(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int err = 0;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-		printk(KERN_DEBUG "%s: smctr_chg_rx_mask\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        smctr_enable_16bit(dev);</div><div class='del'>-        smctr_set_page(dev, (__u8 *)tp-&gt;ram_access);</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;mode_bits &amp; LOOPING_MODE_MASK)</div><div class='del'>-                tp-&gt;config_word0 |= RX_OWN_BIT;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;config_word0 &amp;= ~RX_OWN_BIT;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;receive_mask &amp; PROMISCUOUS_MODE)</div><div class='del'>-                tp-&gt;config_word0 |= PROMISCUOUS_BIT;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;config_word0 &amp;= ~PROMISCUOUS_BIT;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;receive_mask &amp; ACCEPT_ERR_PACKETS)</div><div class='del'>-                tp-&gt;config_word0 |= SAVBAD_BIT;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;config_word0 &amp;= ~SAVBAD_BIT;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;receive_mask &amp; ACCEPT_ATT_MAC_FRAMES)</div><div class='del'>-                tp-&gt;config_word0 |= RXATMAC;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;config_word0 &amp;= ~RXATMAC;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;receive_mask &amp; ACCEPT_MULTI_PROM)</div><div class='del'>-                tp-&gt;config_word1 |= MULTICAST_ADDRESS_BIT;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;config_word1 &amp;= ~MULTICAST_ADDRESS_BIT;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;receive_mask &amp; ACCEPT_SOURCE_ROUTING_SPANNING)</div><div class='del'>-                tp-&gt;config_word1 |= SOURCE_ROUTING_SPANNING_BITS;</div><div class='del'>-        else</div><div class='del'>-        {</div><div class='del'>-                if(tp-&gt;receive_mask &amp; ACCEPT_SOURCE_ROUTING)</div><div class='del'>-                        tp-&gt;config_word1 |= SOURCE_ROUTING_EXPLORER_BIT;</div><div class='del'>-                else</div><div class='del'>-                        tp-&gt;config_word1 &amp;= ~SOURCE_ROUTING_SPANNING_BITS;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_write_word_cmd(dev, RW_CONFIG_REGISTER_0,</div><div class='del'>-                &amp;tp-&gt;config_word0)))</div><div class='del'>-        {</div><div class='del'>-                return err;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_write_word_cmd(dev, RW_CONFIG_REGISTER_1,</div><div class='del'>-                &amp;tp-&gt;config_word1)))</div><div class='del'>-        {</div><div class='del'>-                return err;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        smctr_disable_16bit(dev);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_clear_int(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        outb((tp-&gt;trc_mask | CSR_CLRTINT), dev-&gt;base_addr + CSR);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_clear_trc_reset(int ioaddr)</div><div class='del'>-{</div><div class='del'>-        __u8 r;</div><div class='del'>-</div><div class='del'>-        r = inb(ioaddr + MSR);</div><div class='del'>-        outb(~MSR_RST &amp; r, ioaddr + MSR);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The inverse routine to smctr_open().</div><div class='del'>- */</div><div class='del'>-static int smctr_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        struct sk_buff *skb;</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	</div><div class='del'>-	tp-&gt;cleanup = 1;</div><div class='del'>-</div><div class='del'>-        /* Check to see if adapter is already in a closed state. */</div><div class='del'>-        if(tp-&gt;status != OPEN)</div><div class='del'>-                return 0;</div><div class='del'>-</div><div class='del'>-        smctr_enable_16bit(dev);</div><div class='del'>-        smctr_set_page(dev, (__u8 *)tp-&gt;ram_access);</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_remove_cmd(dev)))</div><div class='del'>-        {</div><div class='del'>-                smctr_disable_16bit(dev);</div><div class='del'>-                return err;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        for(;;)</div><div class='del'>-        {</div><div class='del'>-                skb = skb_dequeue(&amp;tp-&gt;SendSkbQueue);</div><div class='del'>-                if(skb == NULL)</div><div class='del'>-                        break;</div><div class='del'>-                tp-&gt;QueueSkb++;</div><div class='del'>-                dev_kfree_skb(skb);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_decode_firmware(struct net_device *dev,</div><div class='del'>-				 const struct firmware *fw)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        short bit = 0x80, shift = 12;</div><div class='del'>-        DECODE_TREE_NODE *tree;</div><div class='del'>-        short branch, tsize;</div><div class='del'>-        __u16 buff = 0;</div><div class='del'>-        long weight;</div><div class='del'>-        __u8 *ucode;</div><div class='del'>-        __u16 *mem;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_decode_firmware\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        weight  = *(long *)(fw-&gt;data + WEIGHT_OFFSET);</div><div class='del'>-        tsize   = *(__u8 *)(fw-&gt;data + TREE_SIZE_OFFSET);</div><div class='del'>-        tree    = (DECODE_TREE_NODE *)(fw-&gt;data + TREE_OFFSET);</div><div class='del'>-        ucode   = (__u8 *)(fw-&gt;data + TREE_OFFSET</div><div class='del'>-                        + (tsize * sizeof(DECODE_TREE_NODE)));</div><div class='del'>-        mem     = (__u16 *)(tp-&gt;ram_access);</div><div class='del'>-</div><div class='del'>-        while(weight)</div><div class='del'>-        {</div><div class='del'>-                branch = ROOT;</div><div class='del'>-                while((tree + branch)-&gt;tag != LEAF &amp;&amp; weight)</div><div class='del'>-                {</div><div class='del'>-                        branch = *ucode &amp; bit ? (tree + branch)-&gt;llink</div><div class='del'>-                                : (tree + branch)-&gt;rlink;</div><div class='del'>-</div><div class='del'>-                        bit &gt;&gt;= 1;</div><div class='del'>-                        weight--;</div><div class='del'>-</div><div class='del'>-                        if(bit == 0)</div><div class='del'>-                        {</div><div class='del'>-                                bit = 0x80;</div><div class='del'>-                                ucode++;</div><div class='del'>-                        }</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                buff |= (tree + branch)-&gt;info &lt;&lt; shift;</div><div class='del'>-                shift -= 4;</div><div class='del'>-</div><div class='del'>-                if(shift &lt; 0)</div><div class='del'>-                {</div><div class='del'>-                        *(mem++) = SWAP_BYTES(buff);</div><div class='del'>-                        buff    = 0;</div><div class='del'>-                        shift   = 12;</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* The following assumes the Control Store Memory has</div><div class='del'>-         * been initialized to zero. If the last partial word</div><div class='del'>-         * is zero, it will not be written.</div><div class='del'>-         */</div><div class='del'>-        if(buff)</div><div class='del'>-                *(mem++) = SWAP_BYTES(buff);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_disable_16bit(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * On Exit, Adapter is:</div><div class='del'>- * 1. TRC is in a reset state and un-initialized.</div><div class='del'>- * 2. Adapter memory is enabled.</div><div class='del'>- * 3. Control Store memory is out of context (-WCSS is 1).</div><div class='del'>- */</div><div class='del'>-static int smctr_disable_adapter_ctrl_store(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_disable_adapter_ctrl_store\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        tp-&gt;trc_mask |= CSR_WCSS;</div><div class='del'>-        outb(tp-&gt;trc_mask, ioaddr + CSR);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_disable_bic_int(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-        tp-&gt;trc_mask = CSR_MSK_ALL | CSR_MSKCBUSY</div><div class='del'>-	        | CSR_MSKTINT | CSR_WCSS;</div><div class='del'>-        outb(tp-&gt;trc_mask, ioaddr + CSR);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_enable_16bit(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        __u8    r;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;adapter_bus == BUS_ISA16_TYPE)</div><div class='del'>-        {</div><div class='del'>-                r = inb(dev-&gt;base_addr + LAAR);</div><div class='del'>-                outb((r | LAAR_MEM16ENB), dev-&gt;base_addr + LAAR);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * To enable the adapter control store memory:</div><div class='del'>- * 1. Adapter must be in a RESET state.</div><div class='del'>- * 2. Adapter memory must be enabled.</div><div class='del'>- * 3. Control Store Memory is in context (-WCSS is 0).</div><div class='del'>- */</div><div class='del'>-static int smctr_enable_adapter_ctrl_store(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_enable_adapter_ctrl_store\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        smctr_set_trc_reset(ioaddr);</div><div class='del'>-        smctr_enable_adapter_ram(dev);</div><div class='del'>-</div><div class='del'>-        tp-&gt;trc_mask &amp;= ~CSR_WCSS;</div><div class='del'>-        outb(tp-&gt;trc_mask, ioaddr + CSR);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_enable_adapter_ram(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-        __u8 r;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_enable_adapter_ram\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        r = inb(ioaddr + MSR);</div><div class='del'>-        outb(MSR_MEMB | r, ioaddr + MSR);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_enable_bic_int(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-        __u8 r;</div><div class='del'>-</div><div class='del'>-        switch(tp-&gt;bic_type)</div><div class='del'>-        {</div><div class='del'>-                case (BIC_584_CHIP):</div><div class='del'>-                        tp-&gt;trc_mask = CSR_MSKCBUSY | CSR_WCSS;</div><div class='del'>-                        outb(tp-&gt;trc_mask, ioaddr + CSR);</div><div class='del'>-                        r = inb(ioaddr + IRR);</div><div class='del'>-                        outb(r | IRR_IEN, ioaddr + IRR);</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case (BIC_594_CHIP):</div><div class='del'>-                        tp-&gt;trc_mask = CSR_MSKCBUSY | CSR_WCSS;</div><div class='del'>-                        outb(tp-&gt;trc_mask, ioaddr + CSR);</div><div class='del'>-                        r = inb(ioaddr + IMCCR);</div><div class='del'>-                        outb(r | IMCCR_EIL, ioaddr + IMCCR);</div><div class='del'>-                        break;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init smctr_chk_isa(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-        __u8 r1, r2, b, chksum = 0;</div><div class='del'>-        __u16 r;</div><div class='del'>-	int i;</div><div class='del'>-	int err = -ENODEV;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_chk_isa %#4x\n", dev-&gt;name, ioaddr);</div><div class='del'>-</div><div class='del'>-	if((ioaddr &amp; 0x1F) != 0)</div><div class='del'>-                goto out;</div><div class='del'>-</div><div class='del'>-        /* Grab the region so that no one else tries to probe our ioports. */</div><div class='del'>-	if (!request_region(ioaddr, SMCTR_IO_EXTENT, smctr_name)) {</div><div class='del'>-		err = -EBUSY;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-        /* Checksum SMC node address */</div><div class='del'>-        for(i = 0; i &lt; 8; i++)</div><div class='del'>-        {</div><div class='del'>-                b = inb(ioaddr + LAR0 + i);</div><div class='del'>-                chksum += b;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if (chksum != NODE_ADDR_CKSUM)</div><div class='del'>-                goto out2;</div><div class='del'>-</div><div class='del'>-        b = inb(ioaddr + BDID);</div><div class='del'>-	if(b != BRD_ID_8115T)</div><div class='del'>-        {</div><div class='del'>-                printk(KERN_ERR "%s: The adapter found is not supported\n", dev-&gt;name);</div><div class='del'>-                goto out2;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Check for 8115T Board ID */</div><div class='del'>-        r2 = 0;</div><div class='del'>-        for(r = 0; r &lt; 8; r++)</div><div class='del'>-        {</div><div class='del'>-            r1 = inb(ioaddr + 0x8 + r);</div><div class='del'>-            r2 += r1;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* value of RegF adds up the sum to 0xFF */</div><div class='del'>-        if((r2 != 0xFF) &amp;&amp; (r2 != 0xEE))</div><div class='del'>-                goto out2;</div><div class='del'>-</div><div class='del'>-        /* Get adapter ID */</div><div class='del'>-        tp-&gt;board_id = smctr_get_boardid(dev, 0);</div><div class='del'>-        switch(tp-&gt;board_id &amp; 0xffff)</div><div class='del'>-        {</div><div class='del'>-                case WD8115TA:</div><div class='del'>-                        smctr_model = "8115T/A";</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case WD8115T:</div><div class='del'>-			if(tp-&gt;extra_info &amp; CHIP_REV_MASK)</div><div class='del'>-                                smctr_model = "8115T rev XE";</div><div class='del'>-                        else</div><div class='del'>-                                smctr_model = "8115T rev XD";</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                default:</div><div class='del'>-                        smctr_model = "Unknown";</div><div class='del'>-                        break;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Store BIC type. */</div><div class='del'>-        tp-&gt;bic_type = BIC_584_CHIP;</div><div class='del'>-        tp-&gt;nic_type = NIC_825_CHIP;</div><div class='del'>-</div><div class='del'>-        /* Copy Ram Size */</div><div class='del'>-        tp-&gt;ram_usable  = CNFG_SIZE_16KB;</div><div class='del'>-        tp-&gt;ram_size    = CNFG_SIZE_64KB;</div><div class='del'>-</div><div class='del'>-        /* Get 58x Ram Base */</div><div class='del'>-        r1 = inb(ioaddr);</div><div class='del'>-        r1 &amp;= 0x3F;</div><div class='del'>-</div><div class='del'>-        r2 = inb(ioaddr + CNFG_LAAR_584);</div><div class='del'>-        r2 &amp;= CNFG_LAAR_MASK;</div><div class='del'>-        r2 &lt;&lt;= 3;</div><div class='del'>-        r2 |= ((r1 &amp; 0x38) &gt;&gt; 3);</div><div class='del'>-</div><div class='del'>-        tp-&gt;ram_base = ((__u32)r2 &lt;&lt; 16) + (((__u32)(r1 &amp; 0x7)) &lt;&lt; 13);</div><div class='del'>-</div><div class='del'>-        /* Get 584 Irq */</div><div class='del'>-        r1 = 0;</div><div class='del'>-        r1 = inb(ioaddr + CNFG_ICR_583);</div><div class='del'>-        r1 &amp;= CNFG_ICR_IR2_584;</div><div class='del'>-</div><div class='del'>-        r2 = inb(ioaddr + CNFG_IRR_583);</div><div class='del'>-        r2 &amp;= CNFG_IRR_IRQS;     /* 0x60 */</div><div class='del'>-        r2 &gt;&gt;= 5;</div><div class='del'>-</div><div class='del'>-        switch(r2)</div><div class='del'>-        {</div><div class='del'>-                case 0:</div><div class='del'>-                        if(r1 == 0)</div><div class='del'>-                                dev-&gt;irq = 2;</div><div class='del'>-                        else</div><div class='del'>-                                dev-&gt;irq = 10;</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case 1:</div><div class='del'>-                        if(r1 == 0)</div><div class='del'>-                                dev-&gt;irq = 3;</div><div class='del'>-                        else</div><div class='del'>-                                dev-&gt;irq = 11;</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case 2:</div><div class='del'>-                        if(r1 == 0)</div><div class='del'>-                        {</div><div class='del'>-                                if(tp-&gt;extra_info &amp; ALTERNATE_IRQ_BIT)</div><div class='del'>-                                        dev-&gt;irq = 5;</div><div class='del'>-                                else</div><div class='del'>-                                        dev-&gt;irq = 4;</div><div class='del'>-                        }</div><div class='del'>-                        else</div><div class='del'>-                                dev-&gt;irq = 15;</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case 3:</div><div class='del'>-                        if(r1 == 0)</div><div class='del'>-                                dev-&gt;irq = 7;</div><div class='del'>-                        else</div><div class='del'>-                                dev-&gt;irq = 4;</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                default:</div><div class='del'>-                        printk(KERN_ERR "%s: No IRQ found aborting\n", dev-&gt;name);</div><div class='del'>-                        goto out2;</div><div class='del'>-         }</div><div class='del'>-</div><div class='del'>-        if (request_irq(dev-&gt;irq, smctr_interrupt, IRQF_SHARED, smctr_name, dev))</div><div class='del'>-                goto out2;</div><div class='del'>-</div><div class='del'>-        /* Get 58x Rom Base */</div><div class='del'>-        r1 = inb(ioaddr + CNFG_BIO_583);</div><div class='del'>-        r1 &amp;= 0x3E;</div><div class='del'>-        r1 |= 0x40;</div><div class='del'>-</div><div class='del'>-        tp-&gt;rom_base = (__u32)r1 &lt;&lt; 13;</div><div class='del'>-</div><div class='del'>-        /* Get 58x Rom Size */</div><div class='del'>-        r1 = inb(ioaddr + CNFG_BIO_583);</div><div class='del'>-        r1 &amp;= 0xC0;</div><div class='del'>-        if(r1 == 0)</div><div class='del'>-                tp-&gt;rom_size = ROM_DISABLE;</div><div class='del'>-        else</div><div class='del'>-        {</div><div class='del'>-                r1 &gt;&gt;= 6;</div><div class='del'>-                tp-&gt;rom_size = (__u16)CNFG_SIZE_8KB &lt;&lt; r1;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Get 58x Boot Status */</div><div class='del'>-        r1 = inb(ioaddr + CNFG_GP2);</div><div class='del'>-</div><div class='del'>-        tp-&gt;mode_bits &amp;= (~BOOT_STATUS_MASK);</div><div class='del'>-</div><div class='del'>-        if(r1 &amp; CNFG_GP2_BOOT_NIBBLE)</div><div class='del'>-                tp-&gt;mode_bits |= BOOT_TYPE_1;</div><div class='del'>-</div><div class='del'>-        /* Get 58x Zero Wait State */</div><div class='del'>-        tp-&gt;mode_bits &amp;= (~ZERO_WAIT_STATE_MASK);</div><div class='del'>-</div><div class='del'>-        r1 = inb(ioaddr + CNFG_IRR_583);</div><div class='del'>-</div><div class='del'>-        if(r1 &amp; CNFG_IRR_ZWS)</div><div class='del'>-                 tp-&gt;mode_bits |= ZERO_WAIT_STATE_8_BIT;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;board_id &amp; BOARD_16BIT)</div><div class='del'>-        {</div><div class='del'>-                r1 = inb(ioaddr + CNFG_LAAR_584);</div><div class='del'>-</div><div class='del'>-                if(r1 &amp; CNFG_LAAR_ZWS)</div><div class='del'>-                        tp-&gt;mode_bits |= ZERO_WAIT_STATE_16_BIT;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Get 584 Media Menu */</div><div class='del'>-        tp-&gt;media_menu = 14;</div><div class='del'>-        r1 = inb(ioaddr + CNFG_IRR_583);</div><div class='del'>-</div><div class='del'>-        tp-&gt;mode_bits &amp;= 0xf8ff;       /* (~CNFG_INTERFACE_TYPE_MASK) */</div><div class='del'>-        if((tp-&gt;board_id &amp; TOKEN_MEDIA) == TOKEN_MEDIA)</div><div class='del'>-        {</div><div class='del'>-                /* Get Advanced Features */</div><div class='del'>-                if(((r1 &amp; 0x6) &gt;&gt; 1) == 0x3)</div><div class='del'>-                        tp-&gt;media_type |= MEDIA_UTP_16;</div><div class='del'>-                else</div><div class='del'>-                {</div><div class='del'>-                        if(((r1 &amp; 0x6) &gt;&gt; 1) == 0x2)</div><div class='del'>-                                tp-&gt;media_type |= MEDIA_STP_16;</div><div class='del'>-                        else</div><div class='del'>-                        {</div><div class='del'>-                                if(((r1 &amp; 0x6) &gt;&gt; 1) == 0x1)</div><div class='del'>-                                        tp-&gt;media_type |= MEDIA_UTP_4;</div><div class='del'>-</div><div class='del'>-                                else</div><div class='del'>-                                        tp-&gt;media_type |= MEDIA_STP_4;</div><div class='del'>-                        }</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                r1 = inb(ioaddr + CNFG_GP2);</div><div class='del'>-                if(!(r1 &amp; 0x2) )           /* GP2_ETRD */</div><div class='del'>-                        tp-&gt;mode_bits |= EARLY_TOKEN_REL;</div><div class='del'>-</div><div class='del'>-                /* see if the chip is corrupted</div><div class='del'>-                if(smctr_read_584_chksum(ioaddr))</div><div class='del'>-                {</div><div class='del'>-                        printk(KERN_ERR "%s: EEPROM Checksum Failure\n", dev-&gt;name);</div><div class='del'>-			free_irq(dev-&gt;irq, dev);</div><div class='del'>-                        goto out2;</div><div class='del'>-                }</div><div class='del'>-		*/</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-</div><div class='del'>-out2:</div><div class='del'>-	release_region(ioaddr, SMCTR_IO_EXTENT);</div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init smctr_get_boardid(struct net_device *dev, int mca)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-        __u8 r, r1, IdByte;</div><div class='del'>-        __u16 BoardIdMask;</div><div class='del'>-</div><div class='del'>-        tp-&gt;board_id = BoardIdMask = 0;</div><div class='del'>-</div><div class='del'>-	if(mca)</div><div class='del'>-	{</div><div class='del'>-		BoardIdMask |= (MICROCHANNEL+INTERFACE_CHIP+TOKEN_MEDIA+PAGED_RAM+BOARD_16BIT);</div><div class='del'>-		tp-&gt;extra_info |= (INTERFACE_594_CHIP+RAM_SIZE_64K+NIC_825_BIT+ALTERNATE_IRQ_BIT+SLOT_16BIT);</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-	{</div><div class='del'>-        	BoardIdMask|=(INTERFACE_CHIP+TOKEN_MEDIA+PAGED_RAM+BOARD_16BIT);</div><div class='del'>-        	tp-&gt;extra_info |= (INTERFACE_584_CHIP + RAM_SIZE_64K</div><div class='del'>-        	        + NIC_825_BIT + ALTERNATE_IRQ_BIT);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(!mca)</div><div class='del'>-	{</div><div class='del'>-        	r = inb(ioaddr + BID_REG_1);</div><div class='del'>-        	r &amp;= 0x0c;</div><div class='del'>-       		outb(r, ioaddr + BID_REG_1);</div><div class='del'>-        	r = inb(ioaddr + BID_REG_1);</div><div class='del'>-</div><div class='del'>-        	if(r &amp; BID_SIXTEEN_BIT_BIT)</div><div class='del'>-        	{</div><div class='del'>-        	        tp-&gt;extra_info |= SLOT_16BIT;</div><div class='del'>-        	        tp-&gt;adapter_bus = BUS_ISA16_TYPE;</div><div class='del'>-        	}</div><div class='del'>-        	else</div><div class='del'>-        	        tp-&gt;adapter_bus = BUS_ISA8_TYPE;</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-		tp-&gt;adapter_bus = BUS_MCA_TYPE;</div><div class='del'>-</div><div class='del'>-        /* Get Board Id Byte */</div><div class='del'>-        IdByte = inb(ioaddr + BID_BOARD_ID_BYTE);</div><div class='del'>-</div><div class='del'>-        /* if Major version &gt; 1.0 then</div><div class='del'>-         *      return;</div><div class='del'>-         */</div><div class='del'>-        if(IdByte &amp; 0xF8)</div><div class='del'>-                return -1;</div><div class='del'>-</div><div class='del'>-        r1 = inb(ioaddr + BID_REG_1);</div><div class='del'>-        r1 &amp;= BID_ICR_MASK;</div><div class='del'>-        r1 |= BID_OTHER_BIT;</div><div class='del'>-</div><div class='del'>-        outb(r1, ioaddr + BID_REG_1);</div><div class='del'>-        r1 = inb(ioaddr + BID_REG_3);</div><div class='del'>-</div><div class='del'>-        r1 &amp;= BID_EAR_MASK;</div><div class='del'>-        r1 |= BID_ENGR_PAGE;</div><div class='del'>-</div><div class='del'>-        outb(r1, ioaddr + BID_REG_3);</div><div class='del'>-        r1 = inb(ioaddr + BID_REG_1);</div><div class='del'>-        r1 &amp;= BID_ICR_MASK;</div><div class='del'>-        r1 |= (BID_RLA | BID_OTHER_BIT);</div><div class='del'>-</div><div class='del'>-        outb(r1, ioaddr + BID_REG_1);</div><div class='del'>-</div><div class='del'>-        r1 = inb(ioaddr + BID_REG_1);</div><div class='del'>-        while(r1 &amp; BID_RECALL_DONE_MASK)</div><div class='del'>-                r1 = inb(ioaddr + BID_REG_1);</div><div class='del'>-</div><div class='del'>-        r = inb(ioaddr + BID_LAR_0 + BID_REG_6);</div><div class='del'>-</div><div class='del'>-        /* clear chip rev bits */</div><div class='del'>-        tp-&gt;extra_info &amp;= ~CHIP_REV_MASK;</div><div class='del'>-        tp-&gt;extra_info |= ((r &amp; BID_EEPROM_CHIP_REV_MASK) &lt;&lt; 6);</div><div class='del'>-</div><div class='del'>-        r1 = inb(ioaddr + BID_REG_1);</div><div class='del'>-        r1 &amp;= BID_ICR_MASK;</div><div class='del'>-        r1 |= BID_OTHER_BIT;</div><div class='del'>-</div><div class='del'>-        outb(r1, ioaddr + BID_REG_1);</div><div class='del'>-        r1 = inb(ioaddr + BID_REG_3);</div><div class='del'>-</div><div class='del'>-        r1 &amp;= BID_EAR_MASK;</div><div class='del'>-        r1 |= BID_EA6;</div><div class='del'>-</div><div class='del'>-        outb(r1, ioaddr + BID_REG_3);</div><div class='del'>-        r1 = inb(ioaddr + BID_REG_1);</div><div class='del'>-</div><div class='del'>-        r1 &amp;= BID_ICR_MASK;</div><div class='del'>-        r1 |= BID_RLA;</div><div class='del'>-</div><div class='del'>-        outb(r1, ioaddr + BID_REG_1);</div><div class='del'>-        r1 = inb(ioaddr + BID_REG_1);</div><div class='del'>-</div><div class='del'>-        while(r1 &amp; BID_RECALL_DONE_MASK)</div><div class='del'>-                r1 = inb(ioaddr + BID_REG_1);</div><div class='del'>-</div><div class='del'>-        return BoardIdMask;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_get_group_address(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        smctr_issue_read_word_cmd(dev, RW_INDIVIDUAL_GROUP_ADDR);</div><div class='del'>-</div><div class='del'>-        return smctr_wait_cmd(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_get_functional_address(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        smctr_issue_read_word_cmd(dev, RW_FUNCTIONAL_ADDR);</div><div class='del'>-</div><div class='del'>-        return smctr_wait_cmd(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Calculate number of Non-MAC receive BDB's and data buffers.</div><div class='del'>- * This function must simulate allocateing shared memory exactly</div><div class='del'>- * as the allocate_shared_memory function above.</div><div class='del'>- */</div><div class='del'>-static unsigned int smctr_get_num_rx_bdbs(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int mem_used = 0;</div><div class='del'>-</div><div class='del'>-        /* Allocate System Control Blocks. */</div><div class='del'>-        mem_used += sizeof(SCGBlock);</div><div class='del'>-</div><div class='del'>-        mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);</div><div class='del'>-        mem_used += sizeof(SCLBlock);</div><div class='del'>-</div><div class='del'>-        mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);</div><div class='del'>-        mem_used += sizeof(ACBlock) * tp-&gt;num_acbs;</div><div class='del'>-</div><div class='del'>-        mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);</div><div class='del'>-        mem_used += sizeof(ISBlock);</div><div class='del'>-</div><div class='del'>-        mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);</div><div class='del'>-        mem_used += MISC_DATA_SIZE;</div><div class='del'>-</div><div class='del'>-        /* Allocate transmit FCB's. */</div><div class='del'>-        mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);</div><div class='del'>-</div><div class='del'>-        mem_used += sizeof(FCBlock) * tp-&gt;num_tx_fcbs[MAC_QUEUE];</div><div class='del'>-        mem_used += sizeof(FCBlock) * tp-&gt;num_tx_fcbs[NON_MAC_QUEUE];</div><div class='del'>-        mem_used += sizeof(FCBlock) * tp-&gt;num_tx_fcbs[BUG_QUEUE];</div><div class='del'>-</div><div class='del'>-        /* Allocate transmit BDBs. */</div><div class='del'>-        mem_used += sizeof(BDBlock) * tp-&gt;num_tx_bdbs[MAC_QUEUE];</div><div class='del'>-        mem_used += sizeof(BDBlock) * tp-&gt;num_tx_bdbs[NON_MAC_QUEUE];</div><div class='del'>-        mem_used += sizeof(BDBlock) * tp-&gt;num_tx_bdbs[BUG_QUEUE];</div><div class='del'>-</div><div class='del'>-        /* Allocate receive FCBs. */</div><div class='del'>-        mem_used += sizeof(FCBlock) * tp-&gt;num_rx_fcbs[MAC_QUEUE];</div><div class='del'>-        mem_used += sizeof(FCBlock) * tp-&gt;num_rx_fcbs[NON_MAC_QUEUE];</div><div class='del'>-</div><div class='del'>-        /* Allocate receive BDBs. */</div><div class='del'>-        mem_used += sizeof(BDBlock) * tp-&gt;num_rx_bdbs[MAC_QUEUE];</div><div class='del'>-</div><div class='del'>-        /* Allocate MAC transmit buffers.</div><div class='del'>-         * MAC transmit buffers don't have to be on an ODD Boundary.</div><div class='del'>-         */</div><div class='del'>-        mem_used += tp-&gt;tx_buff_size[MAC_QUEUE];</div><div class='del'>-</div><div class='del'>-        /* Allocate BUG transmit buffers. */</div><div class='del'>-        mem_used += tp-&gt;tx_buff_size[BUG_QUEUE];</div><div class='del'>-</div><div class='del'>-        /* Allocate MAC receive data buffers.</div><div class='del'>-         * MAC receive buffers don't have to be on a 256 byte boundary.</div><div class='del'>-         */</div><div class='del'>-        mem_used += RX_DATA_BUFFER_SIZE * tp-&gt;num_rx_bdbs[MAC_QUEUE];</div><div class='del'>-</div><div class='del'>-        /* Allocate Non-MAC transmit buffers.</div><div class='del'>-         * For maximum Netware performance, put Tx Buffers on</div><div class='del'>-         * ODD Boundary,and then restore malloc to Even Boundrys.</div><div class='del'>-         */</div><div class='del'>-        mem_used += 1L;</div><div class='del'>-        mem_used += tp-&gt;tx_buff_size[NON_MAC_QUEUE];</div><div class='del'>-        mem_used += 1L;</div><div class='del'>-</div><div class='del'>-        /* CALCULATE NUMBER OF NON-MAC RX BDB'S</div><div class='del'>-         * AND NON-MAC RX DATA BUFFERS</div><div class='del'>-         *</div><div class='del'>-         * Make sure the mem_used offset at this point is the</div><div class='del'>-         * same as in allocate_shared memory or the following</div><div class='del'>-         * boundary adjustment will be incorrect (i.e. not allocating</div><div class='del'>-         * the non-mac receive buffers above cannot change the 256</div><div class='del'>-         * byte offset).</div><div class='del'>-         *</div><div class='del'>-         * Since this cannot be guaranteed, adding the full 256 bytes</div><div class='del'>-         * to the amount of shared memory used at this point will guaranteed</div><div class='del'>-         * that the rx data buffers do not overflow shared memory.</div><div class='del'>-         */</div><div class='del'>-        mem_used += 0x100;</div><div class='del'>-</div><div class='del'>-        return (0xffff - mem_used) / (RX_DATA_BUFFER_SIZE + sizeof(BDBlock));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_get_physical_drop_number(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        smctr_issue_read_word_cmd(dev, RW_PHYSICAL_DROP_NUMBER);</div><div class='del'>-</div><div class='del'>-        return smctr_wait_cmd(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __u8 * smctr_get_rx_pointer(struct net_device *dev, short queue)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        BDBlock *bdb;</div><div class='del'>-</div><div class='del'>-        bdb = (BDBlock *)((__u32)tp-&gt;ram_access</div><div class='del'>-                + (__u32)(tp-&gt;rx_fcb_curr[queue]-&gt;trc_bdb_ptr));</div><div class='del'>-</div><div class='del'>-        tp-&gt;rx_fcb_curr[queue]-&gt;bdb_ptr = bdb;</div><div class='del'>-</div><div class='del'>-        return (__u8 *)bdb-&gt;data_block_ptr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_get_station_id(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        smctr_issue_read_word_cmd(dev, RW_INDIVIDUAL_MAC_ADDRESS);</div><div class='del'>-</div><div class='del'>-        return smctr_wait_cmd(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Get the current statistics. This may be called with the card open</div><div class='del'>- * or closed.</div><div class='del'>- */</div><div class='del'>-static struct net_device_stats *smctr_get_stats(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        return (struct net_device_stats *)&amp;tp-&gt;MacStat;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static FCBlock *smctr_get_tx_fcb(struct net_device *dev, __u16 queue,</div><div class='del'>-        __u16 bytes_count)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        FCBlock *pFCB;</div><div class='del'>-        BDBlock *pbdb;</div><div class='del'>-        unsigned short alloc_size;</div><div class='del'>-        unsigned short *temp;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 20)</div><div class='del'>-                printk(KERN_DEBUG "smctr_get_tx_fcb\n");</div><div class='del'>-</div><div class='del'>-        /* check if there is enough FCB blocks */</div><div class='del'>-        if(tp-&gt;num_tx_fcbs_used[queue] &gt;= tp-&gt;num_tx_fcbs[queue])</div><div class='del'>-                return (FCBlock *)(-1L);</div><div class='del'>-</div><div class='del'>-        /* round off the input pkt size to the nearest even number */</div><div class='del'>-        alloc_size = (bytes_count + 1) &amp; 0xfffe;</div><div class='del'>-</div><div class='del'>-        /* check if enough mem */</div><div class='del'>-        if((tp-&gt;tx_buff_used[queue] + alloc_size) &gt; tp-&gt;tx_buff_size[queue])</div><div class='del'>-                return (FCBlock *)(-1L);</div><div class='del'>-</div><div class='del'>-        /* check if past the end ;</div><div class='del'>-         * if exactly enough mem to end of ring, alloc from front.</div><div class='del'>-         * this avoids update of curr when curr = end</div><div class='del'>-         */</div><div class='del'>-        if(((unsigned long)(tp-&gt;tx_buff_curr[queue]) + alloc_size)</div><div class='del'>-                &gt;= (unsigned long)(tp-&gt;tx_buff_end[queue]))</div><div class='del'>-        {</div><div class='del'>-                /* check if enough memory from ring head */</div><div class='del'>-                alloc_size = alloc_size +</div><div class='del'>-                        (__u16)((__u32)tp-&gt;tx_buff_end[queue]</div><div class='del'>-                        - (__u32)tp-&gt;tx_buff_curr[queue]);</div><div class='del'>-</div><div class='del'>-                if((tp-&gt;tx_buff_used[queue] + alloc_size)</div><div class='del'>-                        &gt; tp-&gt;tx_buff_size[queue])</div><div class='del'>-                {</div><div class='del'>-                        return (FCBlock *)(-1L);</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                /* ring wrap */</div><div class='del'>-                tp-&gt;tx_buff_curr[queue] = tp-&gt;tx_buff_head[queue];</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        tp-&gt;tx_buff_used[queue] += alloc_size;</div><div class='del'>-        tp-&gt;num_tx_fcbs_used[queue]++;</div><div class='del'>-        tp-&gt;tx_fcb_curr[queue]-&gt;frame_length = bytes_count;</div><div class='del'>-        tp-&gt;tx_fcb_curr[queue]-&gt;memory_alloc = alloc_size;</div><div class='del'>-        temp = tp-&gt;tx_buff_curr[queue];</div><div class='del'>-        tp-&gt;tx_buff_curr[queue]</div><div class='del'>-                = (__u16 *)((__u32)temp + (__u32)((bytes_count + 1) &amp; 0xfffe));</div><div class='del'>-</div><div class='del'>-        pbdb = tp-&gt;tx_fcb_curr[queue]-&gt;bdb_ptr;</div><div class='del'>-        pbdb-&gt;buffer_length = bytes_count;</div><div class='del'>-        pbdb-&gt;data_block_ptr = temp;</div><div class='del'>-        pbdb-&gt;trc_data_block_ptr = TRC_POINTER(temp);</div><div class='del'>-</div><div class='del'>-        pFCB = tp-&gt;tx_fcb_curr[queue];</div><div class='del'>-        tp-&gt;tx_fcb_curr[queue] = tp-&gt;tx_fcb_curr[queue]-&gt;next_ptr;</div><div class='del'>-</div><div class='del'>-        return pFCB;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_get_upstream_neighbor_addr(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        smctr_issue_read_word_cmd(dev, RW_UPSTREAM_NEIGHBOR_ADDRESS);</div><div class='del'>-</div><div class='del'>-        return smctr_wait_cmd(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_hardware_send_packet(struct net_device *dev,</div><div class='del'>-        struct net_local *tp)</div><div class='del'>-{</div><div class='del'>-        struct tr_statistics *tstat = &amp;tp-&gt;MacStat;</div><div class='del'>-        struct sk_buff *skb;</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG"%s: smctr_hardware_send_packet\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;status != OPEN)</div><div class='del'>-                return -1;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;monitor_state_ready != 1)</div><div class='del'>-                return -1;</div><div class='del'>-</div><div class='del'>-        for(;;)</div><div class='del'>-        {</div><div class='del'>-                /* Send first buffer from queue */</div><div class='del'>-                skb = skb_dequeue(&amp;tp-&gt;SendSkbQueue);</div><div class='del'>-                if(skb == NULL)</div><div class='del'>-                        return -1;</div><div class='del'>-</div><div class='del'>-                tp-&gt;QueueSkb++;</div><div class='del'>-</div><div class='del'>-                if(skb-&gt;len &lt; SMC_HEADER_SIZE || skb-&gt;len &gt; tp-&gt;max_packet_size)</div><div class='del'>-			return -1;</div><div class='del'>-</div><div class='del'>-                smctr_enable_16bit(dev);</div><div class='del'>-                smctr_set_page(dev, (__u8 *)tp-&gt;ram_access);</div><div class='del'>-</div><div class='del'>-                if((fcb = smctr_get_tx_fcb(dev, NON_MAC_QUEUE, skb-&gt;len))</div><div class='del'>-                        == (FCBlock *)(-1L))</div><div class='del'>-                {</div><div class='del'>-                        smctr_disable_16bit(dev);</div><div class='del'>-                        return -1;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                smctr_tx_move_frame(dev, skb,</div><div class='del'>-                        (__u8 *)fcb-&gt;bdb_ptr-&gt;data_block_ptr, skb-&gt;len);</div><div class='del'>-</div><div class='del'>-                smctr_set_page(dev, (__u8 *)fcb);</div><div class='del'>-</div><div class='del'>-                smctr_trc_send_packet(dev, fcb, NON_MAC_QUEUE);</div><div class='del'>-                dev_kfree_skb(skb);</div><div class='del'>-</div><div class='del'>-                tstat-&gt;tx_packets++;</div><div class='del'>-</div><div class='del'>-                smctr_disable_16bit(dev);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_init_acbs(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int i;</div><div class='del'>-        ACBlock *acb;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_init_acbs\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        acb                     = tp-&gt;acb_head;</div><div class='del'>-        acb-&gt;cmd_done_status    = (ACB_COMMAND_DONE | ACB_COMMAND_SUCCESSFUL);</div><div class='del'>-        acb-&gt;cmd_info           = ACB_CHAIN_END;</div><div class='del'>-        acb-&gt;cmd                = 0;</div><div class='del'>-        acb-&gt;subcmd             = 0;</div><div class='del'>-        acb-&gt;data_offset_lo     = 0;</div><div class='del'>-        acb-&gt;data_offset_hi     = 0;</div><div class='del'>-        acb-&gt;next_ptr</div><div class='del'>-                = (ACBlock *)(((char *)acb) + sizeof(ACBlock));</div><div class='del'>-        acb-&gt;trc_next_ptr       = TRC_POINTER(acb-&gt;next_ptr);</div><div class='del'>-</div><div class='del'>-        for(i = 1; i &lt; tp-&gt;num_acbs; i++)</div><div class='del'>-        {</div><div class='del'>-                acb             = acb-&gt;next_ptr;</div><div class='del'>-                acb-&gt;cmd_done_status</div><div class='del'>-                        = (ACB_COMMAND_DONE | ACB_COMMAND_SUCCESSFUL);</div><div class='del'>-                acb-&gt;cmd_info = ACB_CHAIN_END;</div><div class='del'>-                acb-&gt;cmd        = 0;</div><div class='del'>-                acb-&gt;subcmd     = 0;</div><div class='del'>-                acb-&gt;data_offset_lo = 0;</div><div class='del'>-                acb-&gt;data_offset_hi = 0;</div><div class='del'>-                acb-&gt;next_ptr</div><div class='del'>-                        = (ACBlock *)(((char *)acb) + sizeof(ACBlock));</div><div class='del'>-                acb-&gt;trc_next_ptr = TRC_POINTER(acb-&gt;next_ptr);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        acb-&gt;next_ptr           = tp-&gt;acb_head;</div><div class='del'>-        acb-&gt;trc_next_ptr       = TRC_POINTER(tp-&gt;acb_head);</div><div class='del'>-        tp-&gt;acb_next            = tp-&gt;acb_head-&gt;next_ptr;</div><div class='del'>-        tp-&gt;acb_curr            = tp-&gt;acb_head-&gt;next_ptr;</div><div class='del'>-        tp-&gt;num_acbs_used       = 0;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_init_adapter(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_init_adapter\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        tp-&gt;status              = CLOSED;</div><div class='del'>-        tp-&gt;page_offset_mask    = (tp-&gt;ram_usable * 1024) - 1;</div><div class='del'>-        skb_queue_head_init(&amp;tp-&gt;SendSkbQueue);</div><div class='del'>-        tp-&gt;QueueSkb = MAX_TX_QUEUE;</div><div class='del'>-</div><div class='del'>-        if(!(tp-&gt;group_address_0 &amp; 0x0080))</div><div class='del'>-                tp-&gt;group_address_0 |= 0x00C0;</div><div class='del'>-</div><div class='del'>-        if(!(tp-&gt;functional_address_0 &amp; 0x00C0))</div><div class='del'>-                tp-&gt;functional_address_0 |= 0x00C0;</div><div class='del'>-</div><div class='del'>-        tp-&gt;functional_address[0] &amp;= 0xFF7F;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;authorized_function_classes == 0)</div><div class='del'>-                tp-&gt;authorized_function_classes = 0x7FFF;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;authorized_access_priority == 0)</div><div class='del'>-                tp-&gt;authorized_access_priority = 0x06;</div><div class='del'>-</div><div class='del'>-        smctr_disable_bic_int(dev);</div><div class='del'>-        smctr_set_trc_reset(dev-&gt;base_addr);</div><div class='del'>-</div><div class='del'>-        smctr_enable_16bit(dev);</div><div class='del'>-        smctr_set_page(dev, (__u8 *)tp-&gt;ram_access);</div><div class='del'>-</div><div class='del'>-        if(smctr_checksum_firmware(dev))</div><div class='del'>-	{</div><div class='del'>-                printk(KERN_ERR "%s: Previously loaded firmware is missing\n",dev-&gt;name);</div><div class='del'>-		return -ENOENT;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if((err = smctr_ram_memory_test(dev)))</div><div class='del'>-	{</div><div class='del'>-                printk(KERN_ERR "%s: RAM memory test failed.\n", dev-&gt;name);</div><div class='del'>-                return -EIO;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	smctr_set_rx_look_ahead(dev);</div><div class='del'>-        smctr_load_node_addr(dev);</div><div class='del'>-</div><div class='del'>-        /* Initialize adapter for Internal Self Test. */</div><div class='del'>-        smctr_reset_adapter(dev);</div><div class='del'>-        if((err = smctr_init_card_real(dev)))</div><div class='del'>-	{</div><div class='del'>-                printk(KERN_ERR "%s: Initialization of card failed (%d)\n",</div><div class='del'>-                        dev-&gt;name, err);</div><div class='del'>-                return -EINVAL;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* This routine clobbers the TRC's internal registers. */</div><div class='del'>-        if((err = smctr_internal_self_test(dev)))</div><div class='del'>-	{</div><div class='del'>-                printk(KERN_ERR "%s: Card failed internal self test (%d)\n",</div><div class='del'>-                        dev-&gt;name, err);</div><div class='del'>-                return -EINVAL;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Re-Initialize adapter's internal registers */</div><div class='del'>-        smctr_reset_adapter(dev);</div><div class='del'>-        if((err = smctr_init_card_real(dev)))</div><div class='del'>-	{</div><div class='del'>-                printk(KERN_ERR "%s: Initialization of card failed (%d)\n",</div><div class='del'>-                        dev-&gt;name, err);</div><div class='del'>-                return -EINVAL;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        smctr_enable_bic_int(dev);</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_enable_int_cmd(dev, TRC_INTERRUPT_ENABLE_MASK)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        smctr_disable_16bit(dev);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_init_card_real(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int err = 0;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_init_card_real\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        tp-&gt;sh_mem_used = 0;</div><div class='del'>-        tp-&gt;num_acbs    = NUM_OF_ACBS;</div><div class='del'>-</div><div class='del'>-        /* Range Check Max Packet Size */</div><div class='del'>-        if(tp-&gt;max_packet_size &lt; 256)</div><div class='del'>-                tp-&gt;max_packet_size = 256;</div><div class='del'>-        else</div><div class='del'>-        {</div><div class='del'>-                if(tp-&gt;max_packet_size &gt; NON_MAC_TX_BUFFER_MEMORY)</div><div class='del'>-                        tp-&gt;max_packet_size = NON_MAC_TX_BUFFER_MEMORY;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        tp-&gt;num_of_tx_buffs = (NON_MAC_TX_BUFFER_MEMORY</div><div class='del'>-                / tp-&gt;max_packet_size) - 1;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;num_of_tx_buffs &gt; NUM_NON_MAC_TX_FCBS)</div><div class='del'>-                tp-&gt;num_of_tx_buffs = NUM_NON_MAC_TX_FCBS;</div><div class='del'>-        else</div><div class='del'>-        {</div><div class='del'>-                if(tp-&gt;num_of_tx_buffs == 0)</div><div class='del'>-                        tp-&gt;num_of_tx_buffs = 1;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Tx queue constants */</div><div class='del'>-        tp-&gt;num_tx_fcbs        [BUG_QUEUE]     = NUM_BUG_TX_FCBS;</div><div class='del'>-        tp-&gt;num_tx_bdbs        [BUG_QUEUE]     = NUM_BUG_TX_BDBS;</div><div class='del'>-        tp-&gt;tx_buff_size       [BUG_QUEUE]     = BUG_TX_BUFFER_MEMORY;</div><div class='del'>-        tp-&gt;tx_buff_used       [BUG_QUEUE]     = 0;</div><div class='del'>-        tp-&gt;tx_queue_status    [BUG_QUEUE]     = NOT_TRANSMITING;</div><div class='del'>-</div><div class='del'>-        tp-&gt;num_tx_fcbs        [MAC_QUEUE]     = NUM_MAC_TX_FCBS;</div><div class='del'>-        tp-&gt;num_tx_bdbs        [MAC_QUEUE]     = NUM_MAC_TX_BDBS;</div><div class='del'>-        tp-&gt;tx_buff_size       [MAC_QUEUE]     = MAC_TX_BUFFER_MEMORY;</div><div class='del'>-        tp-&gt;tx_buff_used       [MAC_QUEUE]     = 0;</div><div class='del'>-        tp-&gt;tx_queue_status    [MAC_QUEUE]     = NOT_TRANSMITING;</div><div class='del'>-</div><div class='del'>-        tp-&gt;num_tx_fcbs        [NON_MAC_QUEUE] = NUM_NON_MAC_TX_FCBS;</div><div class='del'>-        tp-&gt;num_tx_bdbs        [NON_MAC_QUEUE] = NUM_NON_MAC_TX_BDBS;</div><div class='del'>-        tp-&gt;tx_buff_size       [NON_MAC_QUEUE] = NON_MAC_TX_BUFFER_MEMORY;</div><div class='del'>-        tp-&gt;tx_buff_used       [NON_MAC_QUEUE] = 0;</div><div class='del'>-        tp-&gt;tx_queue_status    [NON_MAC_QUEUE] = NOT_TRANSMITING;</div><div class='del'>-</div><div class='del'>-        /* Receive Queue Constants */</div><div class='del'>-        tp-&gt;num_rx_fcbs[MAC_QUEUE] = NUM_MAC_RX_FCBS;</div><div class='del'>-        tp-&gt;num_rx_bdbs[MAC_QUEUE] = NUM_MAC_RX_BDBS;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;extra_info &amp; CHIP_REV_MASK)</div><div class='del'>-                tp-&gt;num_rx_fcbs[NON_MAC_QUEUE] = 78;    /* 825 Rev. XE */</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;num_rx_fcbs[NON_MAC_QUEUE] = 7;     /* 825 Rev. XD */</div><div class='del'>-</div><div class='del'>-        tp-&gt;num_rx_bdbs[NON_MAC_QUEUE] = smctr_get_num_rx_bdbs(dev);</div><div class='del'>-</div><div class='del'>-        smctr_alloc_shared_memory(dev);</div><div class='del'>-        smctr_init_shared_memory(dev);</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_init_timers_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_init_txrx_cmd(dev)))</div><div class='del'>-	{</div><div class='del'>-                printk(KERN_ERR "%s: Hardware failure\n", dev-&gt;name);</div><div class='del'>-                return err;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_init_rx_bdbs(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int i, j;</div><div class='del'>-        BDBlock *bdb;</div><div class='del'>-        __u16 *buf;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_init_rx_bdbs\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; NUM_RX_QS_USED; i++)</div><div class='del'>-        {</div><div class='del'>-                bdb = tp-&gt;rx_bdb_head[i];</div><div class='del'>-                buf = tp-&gt;rx_buff_head[i];</div><div class='del'>-                bdb-&gt;info = (BDB_CHAIN_END | BDB_NO_WARNING);</div><div class='del'>-                bdb-&gt;buffer_length = RX_DATA_BUFFER_SIZE;</div><div class='del'>-                bdb-&gt;next_ptr = (BDBlock *)(((char *)bdb) + sizeof(BDBlock));</div><div class='del'>-                bdb-&gt;data_block_ptr = buf;</div><div class='del'>-                bdb-&gt;trc_next_ptr = TRC_POINTER(bdb-&gt;next_ptr);</div><div class='del'>-</div><div class='del'>-                if(i == NON_MAC_QUEUE)</div><div class='del'>-                        bdb-&gt;trc_data_block_ptr = RX_BUFF_TRC_POINTER(buf);</div><div class='del'>-                else</div><div class='del'>-                        bdb-&gt;trc_data_block_ptr = TRC_POINTER(buf);</div><div class='del'>-</div><div class='del'>-                for(j = 1; j &lt; tp-&gt;num_rx_bdbs[i]; j++)</div><div class='del'>-                {</div><div class='del'>-                        bdb-&gt;next_ptr-&gt;back_ptr = bdb;</div><div class='del'>-                        bdb = bdb-&gt;next_ptr;</div><div class='del'>-                        buf = (__u16 *)((char *)buf + RX_DATA_BUFFER_SIZE);</div><div class='del'>-                        bdb-&gt;info = (BDB_NOT_CHAIN_END | BDB_NO_WARNING);</div><div class='del'>-                        bdb-&gt;buffer_length = RX_DATA_BUFFER_SIZE;</div><div class='del'>-                        bdb-&gt;next_ptr = (BDBlock *)(((char *)bdb) + sizeof(BDBlock));</div><div class='del'>-                        bdb-&gt;data_block_ptr = buf;</div><div class='del'>-                        bdb-&gt;trc_next_ptr = TRC_POINTER(bdb-&gt;next_ptr);</div><div class='del'>-</div><div class='del'>-                        if(i == NON_MAC_QUEUE)</div><div class='del'>-                                bdb-&gt;trc_data_block_ptr = RX_BUFF_TRC_POINTER(buf);</div><div class='del'>-                        else</div><div class='del'>-                                bdb-&gt;trc_data_block_ptr = TRC_POINTER(buf);</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                bdb-&gt;next_ptr           = tp-&gt;rx_bdb_head[i];</div><div class='del'>-                bdb-&gt;trc_next_ptr       = TRC_POINTER(tp-&gt;rx_bdb_head[i]);</div><div class='del'>-</div><div class='del'>-                tp-&gt;rx_bdb_head[i]-&gt;back_ptr    = bdb;</div><div class='del'>-                tp-&gt;rx_bdb_curr[i]              = tp-&gt;rx_bdb_head[i]-&gt;next_ptr;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_init_rx_fcbs(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int i, j;</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; NUM_RX_QS_USED; i++)</div><div class='del'>-        {</div><div class='del'>-                fcb               = tp-&gt;rx_fcb_head[i];</div><div class='del'>-                fcb-&gt;frame_status = 0;</div><div class='del'>-                fcb-&gt;frame_length = 0;</div><div class='del'>-                fcb-&gt;info         = FCB_CHAIN_END;</div><div class='del'>-                fcb-&gt;next_ptr     = (FCBlock *)(((char*)fcb) + sizeof(FCBlock));</div><div class='del'>-                if(i == NON_MAC_QUEUE)</div><div class='del'>-                        fcb-&gt;trc_next_ptr = RX_FCB_TRC_POINTER(fcb-&gt;next_ptr);</div><div class='del'>-                else</div><div class='del'>-                        fcb-&gt;trc_next_ptr = TRC_POINTER(fcb-&gt;next_ptr);</div><div class='del'>-</div><div class='del'>-                for(j = 1; j &lt; tp-&gt;num_rx_fcbs[i]; j++)</div><div class='del'>-                {</div><div class='del'>-                        fcb-&gt;next_ptr-&gt;back_ptr = fcb;</div><div class='del'>-                        fcb                     = fcb-&gt;next_ptr;</div><div class='del'>-                        fcb-&gt;frame_status       = 0;</div><div class='del'>-                        fcb-&gt;frame_length       = 0;</div><div class='del'>-                        fcb-&gt;info               = FCB_WARNING;</div><div class='del'>-                        fcb-&gt;next_ptr</div><div class='del'>-                                = (FCBlock *)(((char *)fcb) + sizeof(FCBlock));</div><div class='del'>-</div><div class='del'>-                        if(i == NON_MAC_QUEUE)</div><div class='del'>-                                fcb-&gt;trc_next_ptr</div><div class='del'>-                                        = RX_FCB_TRC_POINTER(fcb-&gt;next_ptr);</div><div class='del'>-                        else</div><div class='del'>-                                fcb-&gt;trc_next_ptr</div><div class='del'>-                                        = TRC_POINTER(fcb-&gt;next_ptr);</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                fcb-&gt;next_ptr = tp-&gt;rx_fcb_head[i];</div><div class='del'>-</div><div class='del'>-                if(i == NON_MAC_QUEUE)</div><div class='del'>-                        fcb-&gt;trc_next_ptr = RX_FCB_TRC_POINTER(fcb-&gt;next_ptr);</div><div class='del'>-                else</div><div class='del'>-                        fcb-&gt;trc_next_ptr = TRC_POINTER(fcb-&gt;next_ptr);</div><div class='del'>-</div><div class='del'>-                tp-&gt;rx_fcb_head[i]-&gt;back_ptr    = fcb;</div><div class='del'>-                tp-&gt;rx_fcb_curr[i]              = tp-&gt;rx_fcb_head[i]-&gt;next_ptr;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_init_shared_memory(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int i;</div><div class='del'>-        __u32 *iscpb;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_init_shared_memory\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        smctr_set_page(dev, (__u8 *)(unsigned int)tp-&gt;iscpb_ptr);</div><div class='del'>-</div><div class='del'>-        /* Initialize Initial System Configuration Point. (ISCP) */</div><div class='del'>-        iscpb = (__u32 *)PAGE_POINTER(&amp;tp-&gt;iscpb_ptr-&gt;trc_scgb_ptr);</div><div class='del'>-        *iscpb = (__u32)(SWAP_WORDS(TRC_POINTER(tp-&gt;scgb_ptr)));</div><div class='del'>-</div><div class='del'>-        smctr_set_page(dev, (__u8 *)tp-&gt;ram_access);</div><div class='del'>-</div><div class='del'>-        /* Initialize System Configuration Pointers. (SCP) */</div><div class='del'>-        tp-&gt;scgb_ptr-&gt;config = (SCGB_ADDRESS_POINTER_FORMAT</div><div class='del'>-                | SCGB_MULTI_WORD_CONTROL | SCGB_DATA_FORMAT</div><div class='del'>-                | SCGB_BURST_LENGTH);</div><div class='del'>-</div><div class='del'>-        tp-&gt;scgb_ptr-&gt;trc_sclb_ptr      = TRC_POINTER(tp-&gt;sclb_ptr);</div><div class='del'>-        tp-&gt;scgb_ptr-&gt;trc_acb_ptr       = TRC_POINTER(tp-&gt;acb_head);</div><div class='del'>-        tp-&gt;scgb_ptr-&gt;trc_isb_ptr       = TRC_POINTER(tp-&gt;isb_ptr);</div><div class='del'>-        tp-&gt;scgb_ptr-&gt;isbsiz            = (sizeof(ISBlock)) - 2;</div><div class='del'>-</div><div class='del'>-        /* Initialize System Control Block. (SCB) */</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;valid_command    = SCLB_VALID | SCLB_CMD_NOP;</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;iack_code        = 0;</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;resume_control   = 0;</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;int_mask_control = 0;</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;int_mask_state   = 0;</div><div class='del'>-</div><div class='del'>-        /* Initialize Interrupt Status Block. (ISB) */</div><div class='del'>-        for(i = 0; i &lt; NUM_OF_INTERRUPTS; i++)</div><div class='del'>-        {</div><div class='del'>-                tp-&gt;isb_ptr-&gt;IStatus[i].IType = 0xf0;</div><div class='del'>-                tp-&gt;isb_ptr-&gt;IStatus[i].ISubtype = 0;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        tp-&gt;current_isb_index = 0;</div><div class='del'>-</div><div class='del'>-        /* Initialize Action Command Block. (ACB) */</div><div class='del'>-        smctr_init_acbs(dev);</div><div class='del'>-</div><div class='del'>-        /* Initialize transmit FCB's and BDB's. */</div><div class='del'>-        smctr_link_tx_fcbs_to_bdbs(dev);</div><div class='del'>-        smctr_init_tx_bdbs(dev);</div><div class='del'>-        smctr_init_tx_fcbs(dev);</div><div class='del'>-</div><div class='del'>-        /* Initialize receive FCB's and BDB's. */</div><div class='del'>-        smctr_init_rx_bdbs(dev);</div><div class='del'>-        smctr_init_rx_fcbs(dev);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_init_tx_bdbs(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int i, j;</div><div class='del'>-        BDBlock *bdb;</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; NUM_TX_QS_USED; i++)</div><div class='del'>-        {</div><div class='del'>-                bdb = tp-&gt;tx_bdb_head[i];</div><div class='del'>-                bdb-&gt;info = (BDB_NOT_CHAIN_END | BDB_NO_WARNING);</div><div class='del'>-                bdb-&gt;next_ptr = (BDBlock *)(((char *)bdb) + sizeof(BDBlock));</div><div class='del'>-                bdb-&gt;trc_next_ptr = TRC_POINTER(bdb-&gt;next_ptr);</div><div class='del'>-</div><div class='del'>-                for(j = 1; j &lt; tp-&gt;num_tx_bdbs[i]; j++)</div><div class='del'>-                {</div><div class='del'>-                        bdb-&gt;next_ptr-&gt;back_ptr = bdb;</div><div class='del'>-                        bdb = bdb-&gt;next_ptr;</div><div class='del'>-                        bdb-&gt;info = (BDB_NOT_CHAIN_END | BDB_NO_WARNING);</div><div class='del'>-                        bdb-&gt;next_ptr</div><div class='del'>-                                = (BDBlock *)(((char *)bdb) + sizeof( BDBlock));                        bdb-&gt;trc_next_ptr = TRC_POINTER(bdb-&gt;next_ptr);</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                bdb-&gt;next_ptr = tp-&gt;tx_bdb_head[i];</div><div class='del'>-                bdb-&gt;trc_next_ptr = TRC_POINTER(tp-&gt;tx_bdb_head[i]);</div><div class='del'>-                tp-&gt;tx_bdb_head[i]-&gt;back_ptr = bdb;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_init_tx_fcbs(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int i, j;</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; NUM_TX_QS_USED; i++)</div><div class='del'>-        {</div><div class='del'>-                fcb               = tp-&gt;tx_fcb_head[i];</div><div class='del'>-                fcb-&gt;frame_status = 0;</div><div class='del'>-                fcb-&gt;frame_length = 0;</div><div class='del'>-                fcb-&gt;info         = FCB_CHAIN_END;</div><div class='del'>-                fcb-&gt;next_ptr = (FCBlock *)(((char *)fcb) + sizeof(FCBlock));</div><div class='del'>-                fcb-&gt;trc_next_ptr = TRC_POINTER(fcb-&gt;next_ptr);</div><div class='del'>-</div><div class='del'>-                for(j = 1; j &lt; tp-&gt;num_tx_fcbs[i]; j++)</div><div class='del'>-                {</div><div class='del'>-                        fcb-&gt;next_ptr-&gt;back_ptr = fcb;</div><div class='del'>-                        fcb                     = fcb-&gt;next_ptr;</div><div class='del'>-                        fcb-&gt;frame_status       = 0;</div><div class='del'>-                        fcb-&gt;frame_length       = 0;</div><div class='del'>-                        fcb-&gt;info               = FCB_CHAIN_END;</div><div class='del'>-                        fcb-&gt;next_ptr</div><div class='del'>-                                = (FCBlock *)(((char *)fcb) + sizeof(FCBlock));</div><div class='del'>-                        fcb-&gt;trc_next_ptr = TRC_POINTER(fcb-&gt;next_ptr);</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                fcb-&gt;next_ptr           = tp-&gt;tx_fcb_head[i];</div><div class='del'>-                fcb-&gt;trc_next_ptr       = TRC_POINTER(tp-&gt;tx_fcb_head[i]);</div><div class='del'>-</div><div class='del'>-                tp-&gt;tx_fcb_head[i]-&gt;back_ptr    = fcb;</div><div class='del'>-                tp-&gt;tx_fcb_end[i]               = tp-&gt;tx_fcb_head[i]-&gt;next_ptr;</div><div class='del'>-                tp-&gt;tx_fcb_curr[i]              = tp-&gt;tx_fcb_head[i]-&gt;next_ptr;</div><div class='del'>-                tp-&gt;num_tx_fcbs_used[i]         = 0;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_internal_self_test(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_test_internal_rom_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;acb_head-&gt;cmd_done_status &amp; 0xff)</div><div class='del'>-                return -1;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_test_hic_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;acb_head-&gt;cmd_done_status &amp; 0xff)</div><div class='del'>-                return -1;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_test_mac_reg_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;acb_head-&gt;cmd_done_status &amp; 0xff)</div><div class='del'>-                return -1;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The typical workload of the driver: Handle the network interface interrupts.</div><div class='del'>- */</div><div class='del'>-static irqreturn_t smctr_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-        struct net_device *dev = dev_id;</div><div class='del'>-        struct net_local *tp;</div><div class='del'>-        int ioaddr;</div><div class='del'>-        __u16 interrupt_unmask_bits = 0, interrupt_ack_code = 0xff00;</div><div class='del'>-        __u16 err1, err = NOT_MY_INTERRUPT;</div><div class='del'>-        __u8 isb_type, isb_subtype;</div><div class='del'>-        __u16 isb_index;</div><div class='del'>-</div><div class='del'>-        ioaddr = dev-&gt;base_addr;</div><div class='del'>-        tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;status == NOT_INITIALIZED)</div><div class='del'>-                return IRQ_NONE;</div><div class='del'>-</div><div class='del'>-        spin_lock(&amp;tp-&gt;lock);</div><div class='del'>-        </div><div class='del'>-        smctr_disable_bic_int(dev);</div><div class='del'>-        smctr_enable_16bit(dev);</div><div class='del'>-</div><div class='del'>-        smctr_clear_int(dev);</div><div class='del'>-</div><div class='del'>-        /* First read the LSB */</div><div class='del'>-        while((tp-&gt;isb_ptr-&gt;IStatus[tp-&gt;current_isb_index].IType &amp; 0xf0) == 0)</div><div class='del'>-        {</div><div class='del'>-                isb_index       = tp-&gt;current_isb_index;</div><div class='del'>-                isb_type        = tp-&gt;isb_ptr-&gt;IStatus[isb_index].IType;</div><div class='del'>-                isb_subtype     = tp-&gt;isb_ptr-&gt;IStatus[isb_index].ISubtype;</div><div class='del'>-</div><div class='del'>-                (tp-&gt;current_isb_index)++;</div><div class='del'>-                if(tp-&gt;current_isb_index == NUM_OF_INTERRUPTS)</div><div class='del'>-                        tp-&gt;current_isb_index = 0;</div><div class='del'>-</div><div class='del'>-                if(isb_type &gt;= 0x10)</div><div class='del'>-                {</div><div class='del'>-                        smctr_disable_16bit(dev);</div><div class='del'>-		        spin_unlock(&amp;tp-&gt;lock);</div><div class='del'>-                        return IRQ_HANDLED;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                err = HARDWARE_FAILED;</div><div class='del'>-                interrupt_ack_code = isb_index;</div><div class='del'>-                tp-&gt;isb_ptr-&gt;IStatus[isb_index].IType |= 0xf0;</div><div class='del'>-</div><div class='del'>-                interrupt_unmask_bits |= (1 &lt;&lt; (__u16)isb_type);</div><div class='del'>-</div><div class='del'>-                switch(isb_type)</div><div class='del'>-                {</div><div class='del'>-                        case ISB_IMC_MAC_TYPE_3:</div><div class='del'>-                                smctr_disable_16bit(dev);</div><div class='del'>-</div><div class='del'>-                                switch(isb_subtype)</div><div class='del'>-                                {</div><div class='del'>-                                        case 0:</div><div class='del'>-                                                tp-&gt;monitor_state = MS_MONITOR_FSM_INACTIVE;</div><div class='del'>-                                               break;</div><div class='del'>-</div><div class='del'>-                                        case 1:</div><div class='del'>-                                                tp-&gt;monitor_state = MS_REPEAT_BEACON_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 2:</div><div class='del'>-                                                tp-&gt;monitor_state = MS_REPEAT_CLAIM_TOKEN_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 3:</div><div class='del'>-                                                tp-&gt;monitor_state = MS_TRANSMIT_CLAIM_TOKEN_STATE;                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 4:</div><div class='del'>-                                                tp-&gt;monitor_state = MS_STANDBY_MONITOR_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 5:</div><div class='del'>-                                                tp-&gt;monitor_state = MS_TRANSMIT_BEACON_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 6:</div><div class='del'>-                                                tp-&gt;monitor_state = MS_ACTIVE_MONITOR_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 7:</div><div class='del'>-                                                tp-&gt;monitor_state = MS_TRANSMIT_RING_PURGE_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 8:   /* diagnostic state */</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 9:</div><div class='del'>-                                                tp-&gt;monitor_state = MS_BEACON_TEST_STATE;</div><div class='del'>-                                                if(smctr_lobe_media_test(dev))</div><div class='del'>-                                                {</div><div class='del'>-                                                        tp-&gt;ring_status_flags = RING_STATUS_CHANGED;</div><div class='del'>-                                                        tp-&gt;ring_status = AUTO_REMOVAL_ERROR;</div><div class='del'>-                                                        smctr_ring_status_chg(dev);</div><div class='del'>-                                                        smctr_bypass_state(dev);</div><div class='del'>-                                                }</div><div class='del'>-                                                else</div><div class='del'>-                                                        smctr_issue_insert_cmd(dev);</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        /* case 0x0a-0xff, illegal states */</div><div class='del'>-                                        default:</div><div class='del'>-                                                break;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                tp-&gt;ring_status_flags = MONITOR_STATE_CHANGED;</div><div class='del'>-                                err = smctr_ring_status_chg(dev);</div><div class='del'>-</div><div class='del'>-                                smctr_enable_16bit(dev);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        /* Type 0x02 - MAC Error Counters Interrupt</div><div class='del'>-                         * One or more MAC Error Counter is half full</div><div class='del'>-                         *      MAC Error Counters</div><div class='del'>-                         *      Lost_FR_Error_Counter</div><div class='del'>-                         *      RCV_Congestion_Counter</div><div class='del'>-                         *      FR_copied_Error_Counter</div><div class='del'>-                         *      FREQ_Error_Counter</div><div class='del'>-                         *      Token_Error_Counter</div><div class='del'>-                         *      Line_Error_Counter</div><div class='del'>-                         *      Internal_Error_Count</div><div class='del'>-                         */</div><div class='del'>-                        case ISB_IMC_MAC_ERROR_COUNTERS:</div><div class='del'>-                                /* Read 802.5 Error Counters */</div><div class='del'>-                                err = smctr_issue_read_ring_status_cmd(dev);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        /* Type 0x04 - MAC Type 2 Interrupt</div><div class='del'>-                         * HOST needs to enqueue MAC Frame for transmission</div><div class='del'>-                         * SubType Bit 15 - RQ_INIT_PDU( Request Initialization)                         * Changed from RQ_INIT_PDU to</div><div class='del'>-                         * TRC_Status_Changed_Indicate</div><div class='del'>-                         */</div><div class='del'>-                        case ISB_IMC_MAC_TYPE_2:</div><div class='del'>-                                err = smctr_issue_read_ring_status_cmd(dev);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-                        /* Type 0x05 - TX Frame Interrupt (FI). */</div><div class='del'>-                        case ISB_IMC_TX_FRAME:</div><div class='del'>-                                /* BUG QUEUE for TRC stuck receive BUG */</div><div class='del'>-                                if(isb_subtype &amp; TX_PENDING_PRIORITY_2)</div><div class='del'>-                                {</div><div class='del'>-                                        if((err = smctr_tx_complete(dev, BUG_QUEUE)) != SUCCESS)</div><div class='del'>-                                                break;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                /* NON-MAC frames only */</div><div class='del'>-                                if(isb_subtype &amp; TX_PENDING_PRIORITY_1)</div><div class='del'>-                                {</div><div class='del'>-                                        if((err = smctr_tx_complete(dev, NON_MAC_QUEUE)) != SUCCESS)</div><div class='del'>-                                                break;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                /* MAC frames only */</div><div class='del'>-                                if(isb_subtype &amp; TX_PENDING_PRIORITY_0)</div><div class='del'>-                                        err = smctr_tx_complete(dev, MAC_QUEUE);                                break;</div><div class='del'>-</div><div class='del'>-                        /* Type 0x06 - TX END OF QUEUE (FE) */</div><div class='del'>-                        case ISB_IMC_END_OF_TX_QUEUE:</div><div class='del'>-                                /* BUG queue */</div><div class='del'>-                                if(isb_subtype &amp; TX_PENDING_PRIORITY_2)</div><div class='del'>-                                {</div><div class='del'>-                                        /* ok to clear Receive FIFO overrun</div><div class='del'>-                                         * imask send_BUG now completes.</div><div class='del'>-                                         */</div><div class='del'>-                                        interrupt_unmask_bits |= 0x800;</div><div class='del'>-</div><div class='del'>-                                        tp-&gt;tx_queue_status[BUG_QUEUE] = NOT_TRANSMITING;</div><div class='del'>-                                        if((err = smctr_tx_complete(dev, BUG_QUEUE)) != SUCCESS)</div><div class='del'>-                                                break;</div><div class='del'>-                                        if((err = smctr_restart_tx_chain(dev, BUG_QUEUE)) != SUCCESS)</div><div class='del'>-                                                break;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                /* NON-MAC queue only */</div><div class='del'>-                                if(isb_subtype &amp; TX_PENDING_PRIORITY_1)</div><div class='del'>-                                {</div><div class='del'>-                                        tp-&gt;tx_queue_status[NON_MAC_QUEUE] = NOT_TRANSMITING;</div><div class='del'>-                                        if((err = smctr_tx_complete(dev, NON_MAC_QUEUE)) != SUCCESS)</div><div class='del'>-                                                break;</div><div class='del'>-                                        if((err = smctr_restart_tx_chain(dev, NON_MAC_QUEUE)) != SUCCESS)</div><div class='del'>-                                                break;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                /* MAC queue only */</div><div class='del'>-                                if(isb_subtype &amp; TX_PENDING_PRIORITY_0)</div><div class='del'>-                                {</div><div class='del'>-                                        tp-&gt;tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;</div><div class='del'>-                                        if((err = smctr_tx_complete(dev, MAC_QUEUE)) != SUCCESS)</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        err = smctr_restart_tx_chain(dev, MAC_QUEUE);</div><div class='del'>-                                }</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        /* Type 0x07 - NON-MAC RX Resource Interrupt</div><div class='del'>-                         *   Subtype bit 12 - (BW) BDB warning</div><div class='del'>-                         *   Subtype bit 13 - (FW) FCB warning</div><div class='del'>-                         *   Subtype bit 14 - (BE) BDB End of chain</div><div class='del'>-                         *   Subtype bit 15 - (FE) FCB End of chain</div><div class='del'>-                         */</div><div class='del'>-                        case ISB_IMC_NON_MAC_RX_RESOURCE:</div><div class='del'>-                                tp-&gt;rx_fifo_overrun_count = 0;</div><div class='del'>-                                tp-&gt;receive_queue_number = NON_MAC_QUEUE;</div><div class='del'>-                                err1 = smctr_rx_frame(dev);</div><div class='del'>-</div><div class='del'>-                                if(isb_subtype &amp; NON_MAC_RX_RESOURCE_FE)</div><div class='del'>-                                {</div><div class='del'>-                                        if((err = smctr_issue_resume_rx_fcb_cmd(                                                dev, NON_MAC_QUEUE)) != SUCCESS)                                                break;</div><div class='del'>-</div><div class='del'>-                                        if(tp-&gt;ptr_rx_fcb_overruns)</div><div class='del'>-                                                (*tp-&gt;ptr_rx_fcb_overruns)++;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                if(isb_subtype &amp; NON_MAC_RX_RESOURCE_BE)</div><div class='del'>-                                {</div><div class='del'>-                                        if((err = smctr_issue_resume_rx_bdb_cmd(                                                dev, NON_MAC_QUEUE)) != SUCCESS)                                                break;</div><div class='del'>-</div><div class='del'>-                                        if(tp-&gt;ptr_rx_bdb_overruns)</div><div class='del'>-                                                (*tp-&gt;ptr_rx_bdb_overruns)++;</div><div class='del'>-                                }</div><div class='del'>-                                err = err1;</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        /* Type 0x08 - MAC RX Resource Interrupt</div><div class='del'>-                         *   Subtype bit 12 - (BW) BDB warning</div><div class='del'>-                         *   Subtype bit 13 - (FW) FCB warning</div><div class='del'>-                         *   Subtype bit 14 - (BE) BDB End of chain</div><div class='del'>-                         *   Subtype bit 15 - (FE) FCB End of chain</div><div class='del'>-                         */</div><div class='del'>-                        case ISB_IMC_MAC_RX_RESOURCE:</div><div class='del'>-                                tp-&gt;receive_queue_number = MAC_QUEUE;</div><div class='del'>-                                err1 = smctr_rx_frame(dev);</div><div class='del'>-</div><div class='del'>-                                if(isb_subtype &amp; MAC_RX_RESOURCE_FE)</div><div class='del'>-                                {</div><div class='del'>-                                        if((err = smctr_issue_resume_rx_fcb_cmd(                                                dev, MAC_QUEUE)) != SUCCESS)</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        if(tp-&gt;ptr_rx_fcb_overruns)</div><div class='del'>-                                                (*tp-&gt;ptr_rx_fcb_overruns)++;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                if(isb_subtype &amp; MAC_RX_RESOURCE_BE)</div><div class='del'>-                                {</div><div class='del'>-                                        if((err = smctr_issue_resume_rx_bdb_cmd(                                                dev, MAC_QUEUE)) != SUCCESS)</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        if(tp-&gt;ptr_rx_bdb_overruns)</div><div class='del'>-                                                (*tp-&gt;ptr_rx_bdb_overruns)++;</div><div class='del'>-                                }</div><div class='del'>-                                err = err1;</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        /* Type 0x09 - NON_MAC RX Frame Interrupt */</div><div class='del'>-                        case ISB_IMC_NON_MAC_RX_FRAME:</div><div class='del'>-                                tp-&gt;rx_fifo_overrun_count = 0;</div><div class='del'>-                                tp-&gt;receive_queue_number = NON_MAC_QUEUE;</div><div class='del'>-                                err = smctr_rx_frame(dev);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        /* Type 0x0A - MAC RX Frame Interrupt */</div><div class='del'>-                        case ISB_IMC_MAC_RX_FRAME:</div><div class='del'>-                                tp-&gt;receive_queue_number = MAC_QUEUE;</div><div class='del'>-                                err = smctr_rx_frame(dev);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        /* Type 0x0B - TRC status</div><div class='del'>-                         * TRC has encountered an error condition</div><div class='del'>-                         * subtype bit 14 - transmit FIFO underrun</div><div class='del'>-                         * subtype bit 15 - receive FIFO overrun</div><div class='del'>-                         */</div><div class='del'>-                        case ISB_IMC_TRC_FIFO_STATUS:</div><div class='del'>-                                if(isb_subtype &amp; TRC_FIFO_STATUS_TX_UNDERRUN)</div><div class='del'>-                                {</div><div class='del'>-                                        if(tp-&gt;ptr_tx_fifo_underruns)</div><div class='del'>-                                                (*tp-&gt;ptr_tx_fifo_underruns)++;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                if(isb_subtype &amp; TRC_FIFO_STATUS_RX_OVERRUN)</div><div class='del'>-                                {</div><div class='del'>-                                        /* update overrun stuck receive counter</div><div class='del'>-                                         * if &gt;= 3, has to clear it by sending</div><div class='del'>-                                         * back to back frames. We pick</div><div class='del'>-                                         * DAT(duplicate address MAC frame)</div><div class='del'>-                                         */</div><div class='del'>-                                        tp-&gt;rx_fifo_overrun_count++;</div><div class='del'>-</div><div class='del'>-                                        if(tp-&gt;rx_fifo_overrun_count &gt;= 3)</div><div class='del'>-                                        {</div><div class='del'>-                                                tp-&gt;rx_fifo_overrun_count = 0;</div><div class='del'>-</div><div class='del'>-                                                /* delay clearing fifo overrun</div><div class='del'>-                                                 * imask till send_BUG tx</div><div class='del'>-                                                 * complete posted</div><div class='del'>-                                                 */</div><div class='del'>-                                                interrupt_unmask_bits &amp;= (~0x800);</div><div class='del'>-                                                printk(KERN_CRIT "Jay please send bug\n");//                                              smctr_send_bug(dev);</div><div class='del'>-                                        }</div><div class='del'>-</div><div class='del'>-                                        if(tp-&gt;ptr_rx_fifo_overruns)</div><div class='del'>-                                                (*tp-&gt;ptr_rx_fifo_overruns)++;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                err = SUCCESS;</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        /* Type 0x0C - Action Command Status Interrupt</div><div class='del'>-                         * Subtype bit 14 - CB end of command chain (CE)</div><div class='del'>-                         * Subtype bit 15 - CB command interrupt (CI)</div><div class='del'>-                         */</div><div class='del'>-                        case ISB_IMC_COMMAND_STATUS:</div><div class='del'>-                                err = SUCCESS;</div><div class='del'>-                                if(tp-&gt;acb_head-&gt;cmd == ACB_CMD_HIC_NOP)</div><div class='del'>-                                {</div><div class='del'>-                                        printk(KERN_ERR "i1\n");</div><div class='del'>-                                        smctr_disable_16bit(dev);</div><div class='del'>-</div><div class='del'>-                                        /* XXXXXXXXXXXXXXXXX */</div><div class='del'>-                                /*      err = UM_Interrupt(dev); */</div><div class='del'>-</div><div class='del'>-                                        smctr_enable_16bit(dev);</div><div class='del'>-                                }</div><div class='del'>-                                else</div><div class='del'>-                                {</div><div class='del'>-                                        if((tp-&gt;acb_head-&gt;cmd</div><div class='del'>-					    == ACB_CMD_READ_TRC_STATUS) &amp;&amp;</div><div class='del'>-					   (tp-&gt;acb_head-&gt;subcmd</div><div class='del'>-					    == RW_TRC_STATUS_BLOCK))</div><div class='del'>-                                        {</div><div class='del'>-                                                if(tp-&gt;ptr_bcn_type)</div><div class='del'>-                                                {</div><div class='del'>-                                                        *(tp-&gt;ptr_bcn_type)</div><div class='del'>-                                                                = (__u32)((SBlock *)tp-&gt;misc_command_data)-&gt;BCN_Type;</div><div class='del'>-                                                }</div><div class='del'>-</div><div class='del'>-                                                if(((SBlock *)tp-&gt;misc_command_data)-&gt;Status_CHG_Indicate &amp; ERROR_COUNTERS_CHANGED)</div><div class='del'>-                                                {</div><div class='del'>-                                                        smctr_update_err_stats(dev);</div><div class='del'>-                                                }</div><div class='del'>-</div><div class='del'>-                                                if(((SBlock *)tp-&gt;misc_command_data)-&gt;Status_CHG_Indicate &amp; TI_NDIS_RING_STATUS_CHANGED)</div><div class='del'>-                                                {</div><div class='del'>-                                                        tp-&gt;ring_status</div><div class='del'>-                                                                = ((SBlock*)tp-&gt;misc_command_data)-&gt;TI_NDIS_Ring_Status;</div><div class='del'>-                                                        smctr_disable_16bit(dev);</div><div class='del'>-                                                        err = smctr_ring_status_chg(dev);</div><div class='del'>-                                                        smctr_enable_16bit(dev);</div><div class='del'>-                                                        if((tp-&gt;ring_status &amp; REMOVE_RECEIVED) &amp;&amp;</div><div class='del'>-							   (tp-&gt;config_word0 &amp; NO_AUTOREMOVE))</div><div class='del'>-                                                        {</div><div class='del'>-                                                                smctr_issue_remove_cmd(dev);</div><div class='del'>-                                                        }</div><div class='del'>-</div><div class='del'>-                                                        if(err != SUCCESS)</div><div class='del'>-                                                        {</div><div class='del'>-                                                                tp-&gt;acb_pending = 0;</div><div class='del'>-                                                                break;</div><div class='del'>-                                                        }</div><div class='del'>-                                                }</div><div class='del'>-</div><div class='del'>-                                                if(((SBlock *)tp-&gt;misc_command_data)-&gt;Status_CHG_Indicate &amp; UNA_CHANGED)</div><div class='del'>-                                                {</div><div class='del'>-                                                        if(tp-&gt;ptr_una)</div><div class='del'>-                                                        {</div><div class='del'>-                                                                tp-&gt;ptr_una[0] = SWAP_BYTES(((SBlock *)tp-&gt;misc_command_data)-&gt;UNA[0]);</div><div class='del'>-                                                                tp-&gt;ptr_una[1] = SWAP_BYTES(((SBlock *)tp-&gt;misc_command_data)-&gt;UNA[1]);</div><div class='del'>-                                                                tp-&gt;ptr_una[2] = SWAP_BYTES(((SBlock *)tp-&gt;misc_command_data)-&gt;UNA[2]);</div><div class='del'>-                                                        }</div><div class='del'>-</div><div class='del'>-                                                }</div><div class='del'>-</div><div class='del'>-                                                if(((SBlock *)tp-&gt;misc_command_data)-&gt;Status_CHG_Indicate &amp; READY_TO_SEND_RQ_INIT)                                                {</div><div class='del'>-                                                        err = smctr_send_rq_init(dev);</div><div class='del'>-                                                }</div><div class='del'>-                                        }</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                tp-&gt;acb_pending = 0;</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        /* Type 0x0D - MAC Type 1 interrupt</div><div class='del'>-                         * Subtype -- 00 FR_BCN received at S12</div><div class='del'>-                         *            01 FR_BCN received at S21</div><div class='del'>-                         *            02 FR_DAT(DA=MA, A&lt;&gt;0) received at S21</div><div class='del'>-                         *            03 TSM_EXP at S21</div><div class='del'>-                         *            04 FR_REMOVE received at S42</div><div class='del'>-                         *            05 TBR_EXP, BR_FLAG_SET at S42</div><div class='del'>-                         *            06 TBT_EXP at S53</div><div class='del'>-                         */</div><div class='del'>-                        case ISB_IMC_MAC_TYPE_1:</div><div class='del'>-                                if(isb_subtype &gt; 8)</div><div class='del'>-                                {</div><div class='del'>-                                        err = HARDWARE_FAILED;</div><div class='del'>-                                        break;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                err = SUCCESS;</div><div class='del'>-                                switch(isb_subtype)</div><div class='del'>-                                {</div><div class='del'>-                                        case 0:</div><div class='del'>-                                                tp-&gt;join_state = JS_BYPASS_STATE;</div><div class='del'>-                                                if(tp-&gt;status != CLOSED)</div><div class='del'>-                                                {</div><div class='del'>-                                                        tp-&gt;status = CLOSED;</div><div class='del'>-                                                        err = smctr_status_chg(dev);</div><div class='del'>-                                                }</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 1:</div><div class='del'>-                                                tp-&gt;join_state = JS_LOBE_TEST_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 2:</div><div class='del'>-                                                tp-&gt;join_state = JS_DETECT_MONITOR_PRESENT_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 3:</div><div class='del'>-                                                tp-&gt;join_state = JS_AWAIT_NEW_MONITOR_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 4:</div><div class='del'>-                                                tp-&gt;join_state = JS_DUPLICATE_ADDRESS_TEST_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 5:</div><div class='del'>-                                                tp-&gt;join_state = JS_NEIGHBOR_NOTIFICATION_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 6:</div><div class='del'>-                                                tp-&gt;join_state = JS_REQUEST_INITIALIZATION_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 7:</div><div class='del'>-                                                tp-&gt;join_state = JS_JOIN_COMPLETE_STATE;</div><div class='del'>-                                                tp-&gt;status = OPEN;</div><div class='del'>-                                                err = smctr_status_chg(dev);</div><div class='del'>-                                                break;</div><div class='del'>-</div><div class='del'>-                                        case 8:</div><div class='del'>-                                                tp-&gt;join_state = JS_BYPASS_WAIT_STATE;</div><div class='del'>-                                                break;</div><div class='del'>-                                }</div><div class='del'>-                                break ;</div><div class='del'>-</div><div class='del'>-                        /* Type 0x0E - TRC Initialization Sequence Interrupt</div><div class='del'>-                         * Subtype -- 00-FF Initializatin sequence complete</div><div class='del'>-                         */</div><div class='del'>-                        case ISB_IMC_TRC_INTRNL_TST_STATUS:</div><div class='del'>-                                tp-&gt;status = INITIALIZED;</div><div class='del'>-                                smctr_disable_16bit(dev);</div><div class='del'>-                                err = smctr_status_chg(dev);</div><div class='del'>-                                smctr_enable_16bit(dev);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        /* other interrupt types, illegal */</div><div class='del'>-                        default:</div><div class='del'>-                                break;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                if(err != SUCCESS)</div><div class='del'>-                        break;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Checking the ack code instead of the unmask bits here is because :</div><div class='del'>-         * while fixing the stuck receive, DAT frame are sent and mask off</div><div class='del'>-         * FIFO overrun interrupt temporarily (interrupt_unmask_bits = 0)</div><div class='del'>-         * but we still want to issue ack to ISB</div><div class='del'>-         */</div><div class='del'>-        if(!(interrupt_ack_code &amp; 0xff00))</div><div class='del'>-                smctr_issue_int_ack(dev, interrupt_ack_code, interrupt_unmask_bits);</div><div class='del'>-</div><div class='del'>-        smctr_disable_16bit(dev);</div><div class='del'>-        smctr_enable_bic_int(dev);</div><div class='del'>-        spin_unlock(&amp;tp-&gt;lock);</div><div class='del'>-</div><div class='del'>-        return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_enable_int_cmd(struct net_device *dev,</div><div class='del'>-        __u16 interrupt_enable_mask)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_while_cbusy(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;int_mask_control  = interrupt_enable_mask;</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;valid_command     = SCLB_VALID | SCLB_CMD_CLEAR_INTERRUPT_MASK;</div><div class='del'>-</div><div class='del'>-        smctr_set_ctrl_attention(dev);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_int_ack(struct net_device *dev, __u16 iack_code, __u16 ibits)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        if(smctr_wait_while_cbusy(dev))</div><div class='del'>-                return -1;</div><div class='del'>-</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;int_mask_control = ibits;</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;iack_code = iack_code &lt;&lt; 1; /* use the offset from base */        tp-&gt;sclb_ptr-&gt;resume_control = 0;</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;valid_command = SCLB_VALID | SCLB_IACK_CODE_VALID | SCLB_CMD_CLEAR_INTERRUPT_MASK;</div><div class='del'>-</div><div class='del'>-        smctr_set_ctrl_attention(dev);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_init_timers_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int i;</div><div class='del'>-        int err;</div><div class='del'>-        __u16 *pTimer_Struc = (__u16 *)tp-&gt;misc_command_data;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_while_cbusy(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        tp-&gt;config_word0 = THDREN | DMA_TRIGGER | USETPT | NO_AUTOREMOVE;</div><div class='del'>-        tp-&gt;config_word1 = 0;</div><div class='del'>-</div><div class='del'>-        if((tp-&gt;media_type == MEDIA_STP_16) ||</div><div class='del'>-	   (tp-&gt;media_type == MEDIA_UTP_16) ||</div><div class='del'>-	   (tp-&gt;media_type == MEDIA_STP_16_UTP_16))</div><div class='del'>-        {</div><div class='del'>-                tp-&gt;config_word0 |= FREQ_16MB_BIT;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;mode_bits &amp; EARLY_TOKEN_REL)</div><div class='del'>-                tp-&gt;config_word0 |= ETREN;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;mode_bits &amp; LOOPING_MODE_MASK)</div><div class='del'>-                tp-&gt;config_word0 |= RX_OWN_BIT;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;config_word0 &amp;= ~RX_OWN_BIT;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;receive_mask &amp; PROMISCUOUS_MODE)</div><div class='del'>-                tp-&gt;config_word0 |= PROMISCUOUS_BIT;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;config_word0 &amp;= ~PROMISCUOUS_BIT;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;receive_mask &amp; ACCEPT_ERR_PACKETS)</div><div class='del'>-                tp-&gt;config_word0 |= SAVBAD_BIT;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;config_word0 &amp;= ~SAVBAD_BIT;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;receive_mask &amp; ACCEPT_ATT_MAC_FRAMES)</div><div class='del'>-                tp-&gt;config_word0 |= RXATMAC;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;config_word0 &amp;= ~RXATMAC;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;receive_mask &amp; ACCEPT_MULTI_PROM)</div><div class='del'>-                tp-&gt;config_word1 |= MULTICAST_ADDRESS_BIT;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;config_word1 &amp;= ~MULTICAST_ADDRESS_BIT;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;receive_mask &amp; ACCEPT_SOURCE_ROUTING_SPANNING)</div><div class='del'>-                tp-&gt;config_word1 |= SOURCE_ROUTING_SPANNING_BITS;</div><div class='del'>-        else</div><div class='del'>-        {</div><div class='del'>-                if(tp-&gt;receive_mask &amp; ACCEPT_SOURCE_ROUTING)</div><div class='del'>-                        tp-&gt;config_word1 |= SOURCE_ROUTING_EXPLORER_BIT;</div><div class='del'>-                else</div><div class='del'>-                        tp-&gt;config_word1 &amp;= ~SOURCE_ROUTING_SPANNING_BITS;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if((tp-&gt;media_type == MEDIA_STP_16) ||</div><div class='del'>-	   (tp-&gt;media_type == MEDIA_UTP_16) ||</div><div class='del'>-	   (tp-&gt;media_type == MEDIA_STP_16_UTP_16))</div><div class='del'>-        {</div><div class='del'>-                tp-&gt;config_word1 |= INTERFRAME_SPACING_16;</div><div class='del'>-        }</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;config_word1 |= INTERFRAME_SPACING_4;</div><div class='del'>-</div><div class='del'>-        *pTimer_Struc++ = tp-&gt;config_word0;</div><div class='del'>-        *pTimer_Struc++ = tp-&gt;config_word1;</div><div class='del'>-</div><div class='del'>-        if((tp-&gt;media_type == MEDIA_STP_4) ||</div><div class='del'>-	   (tp-&gt;media_type == MEDIA_UTP_4) ||</div><div class='del'>-	   (tp-&gt;media_type == MEDIA_STP_4_UTP_4))</div><div class='del'>-        {</div><div class='del'>-                *pTimer_Struc++ = 0x00FA;       /* prescale */</div><div class='del'>-                *pTimer_Struc++ = 0x2710;       /* TPT_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x2710;       /* TQP_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x0A28;       /* TNT_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x3E80;       /* TBT_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x3A98;       /* TSM_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x1B58;       /* TAM_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x00C8;       /* TBR_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x07D0;       /* TER_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x000A;       /* TGT_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x1162;       /* THT_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x07D0;       /* TRR_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x1388;       /* TVX_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x0000;       /* reserved */</div><div class='del'>-        }</div><div class='del'>-        else</div><div class='del'>-        {</div><div class='del'>-                *pTimer_Struc++ = 0x03E8;       /* prescale */</div><div class='del'>-                *pTimer_Struc++ = 0x9C40;       /* TPT_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x9C40;       /* TQP_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x0A28;       /* TNT_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x3E80;       /* TBT_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x3A98;       /* TSM_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x1B58;       /* TAM_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x00C8;       /* TBR_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x07D0;       /* TER_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x000A;       /* TGT_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x4588;       /* THT_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x1F40;       /* TRR_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x4E20;       /* TVX_limit */</div><div class='del'>-                *pTimer_Struc++ = 0x0000;       /* reserved */</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Set node address. */</div><div class='del'>-        *pTimer_Struc++ = dev-&gt;dev_addr[0] &lt;&lt; 8</div><div class='del'>-                | (dev-&gt;dev_addr[1] &amp; 0xFF);</div><div class='del'>-        *pTimer_Struc++ = dev-&gt;dev_addr[2] &lt;&lt; 8</div><div class='del'>-                | (dev-&gt;dev_addr[3] &amp; 0xFF);</div><div class='del'>-        *pTimer_Struc++ = dev-&gt;dev_addr[4] &lt;&lt; 8</div><div class='del'>-                | (dev-&gt;dev_addr[5] &amp; 0xFF);</div><div class='del'>-</div><div class='del'>-        /* Set group address. */</div><div class='del'>-        *pTimer_Struc++ = tp-&gt;group_address_0 &lt;&lt; 8</div><div class='del'>-                | tp-&gt;group_address_0 &gt;&gt; 8;</div><div class='del'>-        *pTimer_Struc++ = tp-&gt;group_address[0] &lt;&lt; 8</div><div class='del'>-                | tp-&gt;group_address[0] &gt;&gt; 8;</div><div class='del'>-        *pTimer_Struc++ = tp-&gt;group_address[1] &lt;&lt; 8</div><div class='del'>-                | tp-&gt;group_address[1] &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-        /* Set functional address. */</div><div class='del'>-        *pTimer_Struc++ = tp-&gt;functional_address_0 &lt;&lt; 8</div><div class='del'>-                | tp-&gt;functional_address_0 &gt;&gt; 8;</div><div class='del'>-        *pTimer_Struc++ = tp-&gt;functional_address[0] &lt;&lt; 8</div><div class='del'>-                | tp-&gt;functional_address[0] &gt;&gt; 8;</div><div class='del'>-        *pTimer_Struc++ = tp-&gt;functional_address[1] &lt;&lt; 8</div><div class='del'>-                | tp-&gt;functional_address[1] &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-        /* Set Bit-Wise group address. */</div><div class='del'>-        *pTimer_Struc++ = tp-&gt;bitwise_group_address[0] &lt;&lt; 8</div><div class='del'>-                | tp-&gt;bitwise_group_address[0] &gt;&gt; 8;</div><div class='del'>-        *pTimer_Struc++ = tp-&gt;bitwise_group_address[1] &lt;&lt; 8</div><div class='del'>-                | tp-&gt;bitwise_group_address[1] &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-        /* Set ring number address. */</div><div class='del'>-        *pTimer_Struc++ = tp-&gt;source_ring_number;</div><div class='del'>-        *pTimer_Struc++ = tp-&gt;target_ring_number;</div><div class='del'>-</div><div class='del'>-        /* Physical drop number. */</div><div class='del'>-        *pTimer_Struc++ = (unsigned short)0;</div><div class='del'>-        *pTimer_Struc++ = (unsigned short)0;</div><div class='del'>-</div><div class='del'>-        /* Product instance ID. */</div><div class='del'>-        for(i = 0; i &lt; 9; i++)</div><div class='del'>-                *pTimer_Struc++ = (unsigned short)0;</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_INIT_TRC_TIMERS, 0);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_init_txrx_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int i;</div><div class='del'>-        int err;</div><div class='del'>-        void **txrx_ptrs = (void *)tp-&gt;misc_command_data;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_while_cbusy(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_cmd(dev)))</div><div class='del'>-	{</div><div class='del'>-                printk(KERN_ERR "%s: Hardware failure\n", dev-&gt;name);</div><div class='del'>-                return err;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Initialize Transmit Queue Pointers that are used, to point to</div><div class='del'>-         * a single FCB.</div><div class='del'>-         */</div><div class='del'>-        for(i = 0; i &lt; NUM_TX_QS_USED; i++)</div><div class='del'>-                *txrx_ptrs++ = (void *)TRC_POINTER(tp-&gt;tx_fcb_head[i]);</div><div class='del'>-</div><div class='del'>-        /* Initialize Transmit Queue Pointers that are NOT used to ZERO. */</div><div class='del'>-        for(; i &lt; MAX_TX_QS; i++)</div><div class='del'>-                *txrx_ptrs++ = (void *)0;</div><div class='del'>-</div><div class='del'>-        /* Initialize Receive Queue Pointers (MAC and Non-MAC) that are</div><div class='del'>-         * used, to point to a single FCB and a BDB chain of buffers.</div><div class='del'>-         */</div><div class='del'>-        for(i = 0; i &lt; NUM_RX_QS_USED; i++)</div><div class='del'>-        {</div><div class='del'>-                *txrx_ptrs++ = (void *)TRC_POINTER(tp-&gt;rx_fcb_head[i]);</div><div class='del'>-                *txrx_ptrs++ = (void *)TRC_POINTER(tp-&gt;rx_bdb_head[i]);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Initialize Receive Queue Pointers that are NOT used to ZERO. */</div><div class='del'>-        for(; i &lt; MAX_RX_QS; i++)</div><div class='del'>-        {</div><div class='del'>-                *txrx_ptrs++ = (void *)0;</div><div class='del'>-                *txrx_ptrs++ = (void *)0;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_INIT_TX_RX, 0);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_insert_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd(dev, ACB_CMD_INSERT, ACB_SUB_CMD_NOP);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_read_ring_status_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_while_cbusy(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_READ_TRC_STATUS,</div><div class='del'>-                RW_TRC_STATUS_BLOCK);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_read_word_cmd(struct net_device *dev, __u16 aword_cnt)</div><div class='del'>-{</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_while_cbusy(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_MCT_READ_VALUE,</div><div class='del'>-                aword_cnt);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_remove_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_while_cbusy(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;resume_control    = 0;</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;valid_command     = SCLB_VALID | SCLB_CMD_REMOVE;</div><div class='del'>-</div><div class='del'>-        smctr_set_ctrl_attention(dev);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_resume_acb_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_while_cbusy(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;resume_control = SCLB_RC_ACB;</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;valid_command  = SCLB_VALID | SCLB_RESUME_CONTROL_VALID;</div><div class='del'>-</div><div class='del'>-        tp-&gt;acb_pending = 1;</div><div class='del'>-</div><div class='del'>-        smctr_set_ctrl_attention(dev);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_resume_rx_bdb_cmd(struct net_device *dev, __u16 queue)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_while_cbusy(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if(queue == MAC_QUEUE)</div><div class='del'>-                tp-&gt;sclb_ptr-&gt;resume_control = SCLB_RC_RX_MAC_BDB;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;sclb_ptr-&gt;resume_control = SCLB_RC_RX_NON_MAC_BDB;</div><div class='del'>-</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;valid_command = SCLB_VALID | SCLB_RESUME_CONTROL_VALID;</div><div class='del'>-</div><div class='del'>-        smctr_set_ctrl_attention(dev);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_resume_rx_fcb_cmd(struct net_device *dev, __u16 queue)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_issue_resume_rx_fcb_cmd\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        if(smctr_wait_while_cbusy(dev))</div><div class='del'>-                return -1;</div><div class='del'>-</div><div class='del'>-        if(queue == MAC_QUEUE)</div><div class='del'>-                tp-&gt;sclb_ptr-&gt;resume_control = SCLB_RC_RX_MAC_FCB;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;sclb_ptr-&gt;resume_control = SCLB_RC_RX_NON_MAC_FCB;</div><div class='del'>-</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;valid_command = SCLB_VALID | SCLB_RESUME_CONTROL_VALID;</div><div class='del'>-</div><div class='del'>-        smctr_set_ctrl_attention(dev);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_resume_tx_fcb_cmd(struct net_device *dev, __u16 queue)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_issue_resume_tx_fcb_cmd\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        if(smctr_wait_while_cbusy(dev))</div><div class='del'>-                return -1;</div><div class='del'>-</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;resume_control = (SCLB_RC_TFCB0 &lt;&lt; queue);</div><div class='del'>-        tp-&gt;sclb_ptr-&gt;valid_command = SCLB_RESUME_CONTROL_VALID | SCLB_VALID;</div><div class='del'>-</div><div class='del'>-        smctr_set_ctrl_attention(dev);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_test_internal_rom_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,</div><div class='del'>-                TRC_INTERNAL_ROM_TEST);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_test_hic_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd(dev, ACB_CMD_HIC_TEST,</div><div class='del'>-                TRC_HOST_INTERFACE_REG_TEST);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_test_mac_reg_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,</div><div class='del'>-                TRC_MAC_REGISTERS_TEST);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_trc_loopback_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,</div><div class='del'>-                TRC_INTERNAL_LOOPBACK);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_tri_loopback_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,</div><div class='del'>-                TRC_TRI_LOOPBACK);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_write_byte_cmd(struct net_device *dev,</div><div class='del'>-        short aword_cnt, void *byte)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int iword, ibyte;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_while_cbusy(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        for(iword = 0, ibyte = 0; iword &lt; (unsigned int)(aword_cnt &amp; 0xff);</div><div class='del'>-        	iword++, ibyte += 2)</div><div class='del'>-        {</div><div class='del'>-                tp-&gt;misc_command_data[iword] = (*((__u8 *)byte + ibyte) &lt;&lt; 8)</div><div class='del'>-			| (*((__u8 *)byte + ibyte + 1));</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return smctr_setup_single_cmd_w_data(dev, ACB_CMD_MCT_WRITE_VALUE,</div><div class='del'>-		aword_cnt);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_issue_write_word_cmd(struct net_device *dev,</div><div class='del'>-        short aword_cnt, void *word)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int i, err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_while_cbusy(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; (unsigned int)(aword_cnt &amp; 0xff); i++)</div><div class='del'>-                tp-&gt;misc_command_data[i] = *((__u16 *)word + i);</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_MCT_WRITE_VALUE,</div><div class='del'>-                aword_cnt);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_join_complete_state(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd(dev, ACB_CMD_CHANGE_JOIN_STATE,</div><div class='del'>-                JS_JOIN_COMPLETE_STATE);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_link_tx_fcbs_to_bdbs(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int i, j;</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-        BDBlock *bdb;</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; NUM_TX_QS_USED; i++)</div><div class='del'>-        {</div><div class='del'>-                fcb = tp-&gt;tx_fcb_head[i];</div><div class='del'>-                bdb = tp-&gt;tx_bdb_head[i];</div><div class='del'>-</div><div class='del'>-                for(j = 0; j &lt; tp-&gt;num_tx_fcbs[i]; j++)</div><div class='del'>-                {</div><div class='del'>-                        fcb-&gt;bdb_ptr            = bdb;</div><div class='del'>-                        fcb-&gt;trc_bdb_ptr        = TRC_POINTER(bdb);</div><div class='del'>-                        fcb = (FCBlock *)((char *)fcb + sizeof(FCBlock));</div><div class='del'>-                        bdb = (BDBlock *)((char *)bdb + sizeof(BDBlock));</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_load_firmware(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	const struct firmware *fw;</div><div class='del'>-        __u16 i, checksum = 0;</div><div class='del'>-        int err = 0;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_load_firmware\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	if (request_firmware(&amp;fw, "tr_smctr.bin", &amp;dev-&gt;dev)) {</div><div class='del'>-		printk(KERN_ERR "%s: firmware not found\n", dev-&gt;name);</div><div class='del'>-		return UCODE_NOT_PRESENT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-        tp-&gt;num_of_tx_buffs     = 4;</div><div class='del'>-        tp-&gt;mode_bits          |= UMAC;</div><div class='del'>-        tp-&gt;receive_mask        = 0;</div><div class='del'>-        tp-&gt;max_packet_size     = 4177;</div><div class='del'>-</div><div class='del'>-        /* Can only upload the firmware once per adapter reset. */</div><div class='del'>-        if (tp-&gt;microcode_version != 0) {</div><div class='del'>-		err = (UCODE_PRESENT);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-        /* Verify the firmware exists and is there in the right amount. */</div><div class='del'>-        if (!fw-&gt;data ||</div><div class='del'>-	    (*(fw-&gt;data + UCODE_VERSION_OFFSET) &lt; UCODE_VERSION))</div><div class='del'>-        {</div><div class='del'>-                err = (UCODE_NOT_PRESENT);</div><div class='del'>-		goto out;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* UCODE_SIZE is not included in Checksum. */</div><div class='del'>-        for(i = 0; i &lt; *((__u16 *)(fw-&gt;data + UCODE_SIZE_OFFSET)); i += 2)</div><div class='del'>-                checksum += *((__u16 *)(fw-&gt;data + 2 + i));</div><div class='del'>-        if (checksum) {</div><div class='del'>-		err = (UCODE_NOT_PRESENT);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-        /* At this point we have a valid firmware image, lets kick it on up. */</div><div class='del'>-        smctr_enable_adapter_ram(dev);</div><div class='del'>-        smctr_enable_16bit(dev);</div><div class='del'>-        smctr_set_page(dev, (__u8 *)tp-&gt;ram_access);</div><div class='del'>-</div><div class='del'>-        if((smctr_checksum_firmware(dev)) ||</div><div class='del'>-	   (*(fw-&gt;data + UCODE_VERSION_OFFSET) &gt; tp-&gt;microcode_version))</div><div class='del'>-        {</div><div class='del'>-                smctr_enable_adapter_ctrl_store(dev);</div><div class='del'>-</div><div class='del'>-                /* Zero out ram space for firmware. */</div><div class='del'>-                for(i = 0; i &lt; CS_RAM_SIZE; i += 2)</div><div class='del'>-                        *((__u16 *)(tp-&gt;ram_access + i)) = 0;</div><div class='del'>-</div><div class='del'>-                smctr_decode_firmware(dev, fw);</div><div class='del'>-</div><div class='del'>-                tp-&gt;microcode_version = *(fw-&gt;data + UCODE_VERSION_OFFSET);                *((__u16 *)(tp-&gt;ram_access + CS_RAM_VERSION_OFFSET))</div><div class='del'>-                        = (tp-&gt;microcode_version &lt;&lt; 8);</div><div class='del'>-                *((__u16 *)(tp-&gt;ram_access + CS_RAM_CHECKSUM_OFFSET))</div><div class='del'>-                        = ~(tp-&gt;microcode_version &lt;&lt; 8) + 1;</div><div class='del'>-</div><div class='del'>-                smctr_disable_adapter_ctrl_store(dev);</div><div class='del'>-</div><div class='del'>-                if(smctr_checksum_firmware(dev))</div><div class='del'>-                        err = HARDWARE_FAILED;</div><div class='del'>-        }</div><div class='del'>-        else</div><div class='del'>-                err = UCODE_PRESENT;</div><div class='del'>-</div><div class='del'>-        smctr_disable_16bit(dev);</div><div class='del'>- out:</div><div class='del'>-	release_firmware(fw);</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_load_node_addr(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-        unsigned int i;</div><div class='del'>-        __u8 r;</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; 6; i++)</div><div class='del'>-        {</div><div class='del'>-                r = inb(ioaddr + LAR0 + i);</div><div class='del'>-                dev-&gt;dev_addr[i] = (char)r;</div><div class='del'>-        }</div><div class='del'>-        dev-&gt;addr_len = 6;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Lobe Media Test.</div><div class='del'>- * During the transmission of the initial 1500 lobe media MAC frames,</div><div class='del'>- * the phase lock loop in the 805 chip may lock, and then un-lock, causing</div><div class='del'>- * the 825 to go into a PURGE state. When performing a PURGE, the MCT</div><div class='del'>- * microcode will not transmit any frames given to it by the host, and</div><div class='del'>- * will consequently cause a timeout.</div><div class='del'>- *</div><div class='del'>- * NOTE 1: If the monitor_state is MS_BEACON_TEST_STATE, all transmit</div><div class='del'>- * queues other than the one used for the lobe_media_test should be</div><div class='del'>- * disabled.!?</div><div class='del'>- *</div><div class='del'>- * NOTE 2: If the monitor_state is MS_BEACON_TEST_STATE and the receive_mask</div><div class='del'>- * has any multi-cast or promiscuous bits set, the receive_mask needs to</div><div class='del'>- * be changed to clear the multi-cast or promiscuous mode bits, the lobe_test</div><div class='del'>- * run, and then the receive mask set back to its original value if the test</div><div class='del'>- * is successful.</div><div class='del'>- */</div><div class='del'>-static int smctr_lobe_media_test(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int i, perror = 0;</div><div class='del'>-        unsigned short saved_rcv_mask;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_lobe_media_test\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        /* Clear receive mask for lobe test. */</div><div class='del'>-        saved_rcv_mask          = tp-&gt;receive_mask;</div><div class='del'>-        tp-&gt;receive_mask        = 0;</div><div class='del'>-</div><div class='del'>-        smctr_chg_rx_mask(dev);</div><div class='del'>-</div><div class='del'>-        /* Setup the lobe media test. */</div><div class='del'>-        smctr_lobe_media_test_cmd(dev);</div><div class='del'>-        if(smctr_wait_cmd(dev))</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-        /* Tx lobe media test frames. */</div><div class='del'>-        for(i = 0; i &lt; 1500; ++i)</div><div class='del'>-        {</div><div class='del'>-                if(smctr_send_lobe_media_test(dev))</div><div class='del'>-                {</div><div class='del'>-                        if(perror)</div><div class='del'>-				goto err;</div><div class='del'>-                        else</div><div class='del'>-                        {</div><div class='del'>-                                perror = 1;</div><div class='del'>-                                if(smctr_lobe_media_test_cmd(dev))</div><div class='del'>-					goto err;</div><div class='del'>-                        }</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if(smctr_send_dat(dev))</div><div class='del'>-        {</div><div class='del'>-                if(smctr_send_dat(dev))</div><div class='del'>-			goto err;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Check if any frames received during test. */</div><div class='del'>-        if((tp-&gt;rx_fcb_curr[MAC_QUEUE]-&gt;frame_status) ||</div><div class='del'>-	   (tp-&gt;rx_fcb_curr[NON_MAC_QUEUE]-&gt;frame_status))</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-        /* Set receive mask to "Promisc" mode. */</div><div class='del'>-        tp-&gt;receive_mask = saved_rcv_mask;</div><div class='del'>-</div><div class='del'>-        smctr_chg_rx_mask(dev);</div><div class='del'>-</div><div class='del'>-	 return 0;</div><div class='del'>-err:</div><div class='del'>-	smctr_reset_adapter(dev);</div><div class='del'>-	tp-&gt;status = CLOSED;</div><div class='del'>-	return LOBE_MEDIA_TEST_FAILED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_lobe_media_test_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_lobe_media_test_cmd\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        /* Change to lobe media test state. */</div><div class='del'>-        if(tp-&gt;monitor_state != MS_BEACON_TEST_STATE)</div><div class='del'>-        {</div><div class='del'>-                smctr_lobe_media_test_state(dev);</div><div class='del'>-                if(smctr_wait_cmd(dev))</div><div class='del'>-                {</div><div class='del'>-                        printk(KERN_ERR "Lobe Failed test state\n");</div><div class='del'>-                        return LOBE_MEDIA_TEST_FAILED;</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,</div><div class='del'>-                TRC_LOBE_MEDIA_TEST);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_lobe_media_test_state(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        err = smctr_setup_single_cmd(dev, ACB_CMD_CHANGE_JOIN_STATE,</div><div class='del'>-                JS_LOBE_TEST_STATE);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_8025_hdr(struct net_device *dev,</div><div class='del'>-        MAC_HEADER *rmf, MAC_HEADER *tmf, __u16 ac_fc)</div><div class='del'>-{</div><div class='del'>-        tmf-&gt;ac = MSB(ac_fc);                 /* msb is access control */</div><div class='del'>-        tmf-&gt;fc = LSB(ac_fc);                 /* lsb is frame control */</div><div class='del'>-</div><div class='del'>-        tmf-&gt;sa[0] = dev-&gt;dev_addr[0];</div><div class='del'>-        tmf-&gt;sa[1] = dev-&gt;dev_addr[1];</div><div class='del'>-        tmf-&gt;sa[2] = dev-&gt;dev_addr[2];</div><div class='del'>-        tmf-&gt;sa[3] = dev-&gt;dev_addr[3];</div><div class='del'>-        tmf-&gt;sa[4] = dev-&gt;dev_addr[4];</div><div class='del'>-        tmf-&gt;sa[5] = dev-&gt;dev_addr[5];</div><div class='del'>-</div><div class='del'>-        switch(tmf-&gt;vc)</div><div class='del'>-        {</div><div class='del'>-		/* Send RQ_INIT to RPS */</div><div class='del'>-                case RQ_INIT:</div><div class='del'>-                        tmf-&gt;da[0] = 0xc0;</div><div class='del'>-                        tmf-&gt;da[1] = 0x00;</div><div class='del'>-                        tmf-&gt;da[2] = 0x00;</div><div class='del'>-                        tmf-&gt;da[3] = 0x00;</div><div class='del'>-                        tmf-&gt;da[4] = 0x00;</div><div class='del'>-                        tmf-&gt;da[5] = 0x02;</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-		/* Send RPT_TX_FORWARD to CRS */</div><div class='del'>-                case RPT_TX_FORWARD:</div><div class='del'>-                        tmf-&gt;da[0] = 0xc0;</div><div class='del'>-                        tmf-&gt;da[1] = 0x00;</div><div class='del'>-                        tmf-&gt;da[2] = 0x00;</div><div class='del'>-                        tmf-&gt;da[3] = 0x00;</div><div class='del'>-                        tmf-&gt;da[4] = 0x00;</div><div class='del'>-                        tmf-&gt;da[5] = 0x10;</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-		/* Everything else goes to sender */</div><div class='del'>-                default:</div><div class='del'>-                        tmf-&gt;da[0] = rmf-&gt;sa[0];</div><div class='del'>-                        tmf-&gt;da[1] = rmf-&gt;sa[1];</div><div class='del'>-                        tmf-&gt;da[2] = rmf-&gt;sa[2];</div><div class='del'>-                        tmf-&gt;da[3] = rmf-&gt;sa[3];</div><div class='del'>-                        tmf-&gt;da[4] = rmf-&gt;sa[4];</div><div class='del'>-                        tmf-&gt;da[5] = rmf-&gt;sa[5];</div><div class='del'>-                        break;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_access_pri(struct net_device *dev, MAC_SUB_VECTOR *tsv)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svi = AUTHORIZED_ACCESS_PRIORITY;</div><div class='del'>-        tsv-&gt;svl = S_AUTHORIZED_ACCESS_PRIORITY;</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[0] = MSB(tp-&gt;authorized_access_priority);</div><div class='del'>-        tsv-&gt;svv[1] = LSB(tp-&gt;authorized_access_priority);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_addr_mod(struct net_device *dev, MAC_SUB_VECTOR *tsv)</div><div class='del'>-{</div><div class='del'>-        tsv-&gt;svi = ADDRESS_MODIFER;</div><div class='del'>-        tsv-&gt;svl = S_ADDRESS_MODIFER;</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[0] = 0;</div><div class='del'>-        tsv-&gt;svv[1] = 0;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_auth_funct_class(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svi = AUTHORIZED_FUNCTION_CLASS;</div><div class='del'>-        tsv-&gt;svl = S_AUTHORIZED_FUNCTION_CLASS;</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[0] = MSB(tp-&gt;authorized_function_classes);</div><div class='del'>-        tsv-&gt;svv[1] = LSB(tp-&gt;authorized_function_classes);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_corr(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv, __u16 correlator)</div><div class='del'>-{</div><div class='del'>-        tsv-&gt;svi = CORRELATOR;</div><div class='del'>-        tsv-&gt;svl = S_CORRELATOR;</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[0] = MSB(correlator);</div><div class='del'>-        tsv-&gt;svv[1] = LSB(correlator);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_funct_addr(struct net_device *dev, MAC_SUB_VECTOR *tsv)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        smctr_get_functional_address(dev);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svi = FUNCTIONAL_ADDRESS;</div><div class='del'>-        tsv-&gt;svl = S_FUNCTIONAL_ADDRESS;</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[0] = MSB(tp-&gt;misc_command_data[0]);</div><div class='del'>-        tsv-&gt;svv[1] = LSB(tp-&gt;misc_command_data[0]);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[2] = MSB(tp-&gt;misc_command_data[1]);</div><div class='del'>-        tsv-&gt;svv[3] = LSB(tp-&gt;misc_command_data[1]);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_group_addr(struct net_device *dev, MAC_SUB_VECTOR *tsv)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        smctr_get_group_address(dev);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svi = GROUP_ADDRESS;</div><div class='del'>-        tsv-&gt;svl = S_GROUP_ADDRESS;</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[0] = MSB(tp-&gt;misc_command_data[0]);</div><div class='del'>-        tsv-&gt;svv[1] = LSB(tp-&gt;misc_command_data[0]);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[2] = MSB(tp-&gt;misc_command_data[1]);</div><div class='del'>-        tsv-&gt;svv[3] = LSB(tp-&gt;misc_command_data[1]);</div><div class='del'>-</div><div class='del'>-        /* Set Group Address Sub-vector to all zeros if only the</div><div class='del'>-         * Group Address/Functional Address Indicator is set.</div><div class='del'>-         */</div><div class='del'>-        if(tsv-&gt;svv[0] == 0x80 &amp;&amp; tsv-&gt;svv[1] == 0x00 &amp;&amp;</div><div class='del'>-	   tsv-&gt;svv[2] == 0x00 &amp;&amp; tsv-&gt;svv[3] == 0x00)</div><div class='del'>-                tsv-&gt;svv[0] = 0x00;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_phy_drop_num(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        smctr_get_physical_drop_number(dev);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svi = PHYSICAL_DROP;</div><div class='del'>-        tsv-&gt;svl = S_PHYSICAL_DROP;</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[0] = MSB(tp-&gt;misc_command_data[0]);</div><div class='del'>-        tsv-&gt;svv[1] = LSB(tp-&gt;misc_command_data[0]);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[2] = MSB(tp-&gt;misc_command_data[1]);</div><div class='del'>-        tsv-&gt;svv[3] = LSB(tp-&gt;misc_command_data[1]);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_product_id(struct net_device *dev, MAC_SUB_VECTOR *tsv)</div><div class='del'>-{</div><div class='del'>-        int i;</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svi = PRODUCT_INSTANCE_ID;</div><div class='del'>-        tsv-&gt;svl = S_PRODUCT_INSTANCE_ID;</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; 18; i++)</div><div class='del'>-                tsv-&gt;svv[i] = 0xF0;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_station_id(struct net_device *dev, MAC_SUB_VECTOR *tsv)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        smctr_get_station_id(dev);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svi = STATION_IDENTIFER;</div><div class='del'>-        tsv-&gt;svl = S_STATION_IDENTIFER;</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[0] = MSB(tp-&gt;misc_command_data[0]);</div><div class='del'>-        tsv-&gt;svv[1] = LSB(tp-&gt;misc_command_data[0]);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[2] = MSB(tp-&gt;misc_command_data[1]);</div><div class='del'>-        tsv-&gt;svv[3] = LSB(tp-&gt;misc_command_data[1]);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[4] = MSB(tp-&gt;misc_command_data[2]);</div><div class='del'>-        tsv-&gt;svv[5] = LSB(tp-&gt;misc_command_data[2]);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_ring_station_status(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR * tsv)</div><div class='del'>-{</div><div class='del'>-        tsv-&gt;svi = RING_STATION_STATUS;</div><div class='del'>-        tsv-&gt;svl = S_RING_STATION_STATUS;</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[0] = 0;</div><div class='del'>-        tsv-&gt;svv[1] = 0;</div><div class='del'>-        tsv-&gt;svv[2] = 0;</div><div class='del'>-        tsv-&gt;svv[3] = 0;</div><div class='del'>-        tsv-&gt;svv[4] = 0;</div><div class='del'>-        tsv-&gt;svv[5] = 0;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_ring_station_version(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svi = RING_STATION_VERSION_NUMBER;</div><div class='del'>-        tsv-&gt;svl = S_RING_STATION_VERSION_NUMBER;</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[0] = 0xe2;            /* EBCDIC - S */</div><div class='del'>-        tsv-&gt;svv[1] = 0xd4;            /* EBCDIC - M */</div><div class='del'>-        tsv-&gt;svv[2] = 0xc3;            /* EBCDIC - C */</div><div class='del'>-        tsv-&gt;svv[3] = 0x40;            /* EBCDIC -   */</div><div class='del'>-        tsv-&gt;svv[4] = 0xe5;            /* EBCDIC - V */</div><div class='del'>-        tsv-&gt;svv[5] = 0xF0 + (tp-&gt;microcode_version &gt;&gt; 4);</div><div class='del'>-        tsv-&gt;svv[6] = 0xF0 + (tp-&gt;microcode_version &amp; 0x0f);</div><div class='del'>-        tsv-&gt;svv[7] = 0x40;            /* EBCDIC -   */</div><div class='del'>-        tsv-&gt;svv[8] = 0xe7;            /* EBCDIC - X */</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;extra_info &amp; CHIP_REV_MASK)</div><div class='del'>-                tsv-&gt;svv[9] = 0xc5;    /* EBCDIC - E */</div><div class='del'>-        else</div><div class='del'>-                tsv-&gt;svv[9] = 0xc4;    /* EBCDIC - D */</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_tx_status_code(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv, __u16 tx_fstatus)</div><div class='del'>-{</div><div class='del'>-        tsv-&gt;svi = TRANSMIT_STATUS_CODE;</div><div class='del'>-        tsv-&gt;svl = S_TRANSMIT_STATUS_CODE;</div><div class='del'>-</div><div class='del'>-	tsv-&gt;svv[0] = ((tx_fstatus &amp; 0x0100 &gt;&gt; 6) | IBM_PASS_SOURCE_ADDR);</div><div class='del'>-</div><div class='del'>-        /* Stripped frame status of Transmitted Frame */</div><div class='del'>-        tsv-&gt;svv[1] = tx_fstatus &amp; 0xff;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_upstream_neighbor_addr(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *tsv)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        smctr_get_upstream_neighbor_addr(dev);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svi = UPSTREAM_NEIGHBOR_ADDRESS;</div><div class='del'>-        tsv-&gt;svl = S_UPSTREAM_NEIGHBOR_ADDRESS;</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[0] = MSB(tp-&gt;misc_command_data[0]);</div><div class='del'>-        tsv-&gt;svv[1] = LSB(tp-&gt;misc_command_data[0]);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[2] = MSB(tp-&gt;misc_command_data[1]);</div><div class='del'>-        tsv-&gt;svv[3] = LSB(tp-&gt;misc_command_data[1]);</div><div class='del'>-</div><div class='del'>-        tsv-&gt;svv[4] = MSB(tp-&gt;misc_command_data[2]);</div><div class='del'>-        tsv-&gt;svv[5] = LSB(tp-&gt;misc_command_data[2]);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_make_wrap_data(struct net_device *dev, MAC_SUB_VECTOR *tsv)</div><div class='del'>-{</div><div class='del'>-        tsv-&gt;svi = WRAP_DATA;</div><div class='del'>-        tsv-&gt;svl = S_WRAP_DATA;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Open/initialize the board. This is called sometime after</div><div class='del'>- * booting when the 'ifconfig' program is run.</div><div class='del'>- *</div><div class='del'>- * This routine should set everything up anew at each open, even</div><div class='del'>- * registers that "should" only need to be set once at boot, so that</div><div class='del'>- * there is non-reboot way to recover if something goes wrong.</div><div class='del'>- */</div><div class='del'>-static int smctr_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_open\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        err = smctr_init_adapter(dev);</div><div class='del'>-        if(err &lt; 0)</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Interrupt driven open of Token card. */</div><div class='del'>-static int smctr_open_tr(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned long flags;</div><div class='del'>-        int err;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_open_tr\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        /* Now we can actually open the adapter. */</div><div class='del'>-        if(tp-&gt;status == OPEN)</div><div class='del'>-                return 0;</div><div class='del'>-        if(tp-&gt;status != INITIALIZED)</div><div class='del'>-                return -1;</div><div class='del'>-</div><div class='del'>-	/* FIXME: it would work a lot better if we masked the irq sources</div><div class='del'>-	   on the card here, then we could skip the locking and poll nicely */</div><div class='del'>-	spin_lock_irqsave(&amp;tp-&gt;lock, flags);</div><div class='del'>-	</div><div class='del'>-        smctr_set_page(dev, (__u8 *)tp-&gt;ram_access);</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_resume_rx_fcb_cmd(dev, (short)MAC_QUEUE)))</div><div class='del'>-                goto out;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_resume_rx_bdb_cmd(dev, (short)MAC_QUEUE)))</div><div class='del'>-                goto out;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_resume_rx_fcb_cmd(dev, (short)NON_MAC_QUEUE)))</div><div class='del'>-                goto out;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_resume_rx_bdb_cmd(dev, (short)NON_MAC_QUEUE)))</div><div class='del'>-                goto out;</div><div class='del'>-</div><div class='del'>-        tp-&gt;status = CLOSED;</div><div class='del'>-</div><div class='del'>-        /* Insert into the Ring or Enter Loopback Mode. */</div><div class='del'>-        if((tp-&gt;mode_bits &amp; LOOPING_MODE_MASK) == LOOPBACK_MODE_1)</div><div class='del'>-        {</div><div class='del'>-                tp-&gt;status = CLOSED;</div><div class='del'>-</div><div class='del'>-                if(!(err = smctr_issue_trc_loopback_cmd(dev)))</div><div class='del'>-                {</div><div class='del'>-                        if(!(err = smctr_wait_cmd(dev)))</div><div class='del'>-                                tp-&gt;status = OPEN;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                smctr_status_chg(dev);</div><div class='del'>-        }</div><div class='del'>-        else</div><div class='del'>-        {</div><div class='del'>-                if((tp-&gt;mode_bits &amp; LOOPING_MODE_MASK) == LOOPBACK_MODE_2)</div><div class='del'>-                {</div><div class='del'>-                        tp-&gt;status = CLOSED;</div><div class='del'>-                        if(!(err = smctr_issue_tri_loopback_cmd(dev)))</div><div class='del'>-                        {</div><div class='del'>-                                if(!(err = smctr_wait_cmd(dev)))</div><div class='del'>-                                        tp-&gt;status = OPEN;</div><div class='del'>-                        }</div><div class='del'>-</div><div class='del'>-                        smctr_status_chg(dev);</div><div class='del'>-                }</div><div class='del'>-                else</div><div class='del'>-                {</div><div class='del'>-                        if((tp-&gt;mode_bits &amp; LOOPING_MODE_MASK)</div><div class='del'>-                                == LOOPBACK_MODE_3)</div><div class='del'>-                        {</div><div class='del'>-                                tp-&gt;status = CLOSED;</div><div class='del'>-                                if(!(err = smctr_lobe_media_test_cmd(dev)))</div><div class='del'>-                                {</div><div class='del'>-                                        if(!(err = smctr_wait_cmd(dev)))</div><div class='del'>-                                                tp-&gt;status = OPEN;</div><div class='del'>-                                }</div><div class='del'>-                                smctr_status_chg(dev);</div><div class='del'>-                        }</div><div class='del'>-                        else</div><div class='del'>-                        {</div><div class='del'>-                                if(!(err = smctr_lobe_media_test(dev)))</div><div class='del'>-                                        err = smctr_issue_insert_cmd(dev);</div><div class='del'>-				else</div><div class='del'>-                                {</div><div class='del'>-                                        if(err == LOBE_MEDIA_TEST_FAILED)</div><div class='del'>-                                                printk(KERN_WARNING "%s: Lobe Media Test Failure - Check cable?\n", dev-&gt;name);</div><div class='del'>-                                }</div><div class='del'>-                        }</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-        spin_unlock_irqrestore(&amp;tp-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Check for a network adapter of this type, </div><div class='del'>- * and return device structure if one exists.</div><div class='del'>- */</div><div class='del'>-struct net_device __init *smctr_probe(int unit)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = alloc_trdev(sizeof(struct net_local));</div><div class='del'>-	static const unsigned ports[] = {</div><div class='del'>-		0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0, 0x300,</div><div class='del'>-		0x320, 0x340, 0x360, 0x380, 0</div><div class='del'>-	};</div><div class='del'>-	const unsigned *port;</div><div class='del'>-        int err = 0;</div><div class='del'>-</div><div class='del'>-	if (!dev)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	if (unit &gt;= 0) {</div><div class='del'>-		sprintf(dev-&gt;name, "tr%d", unit);</div><div class='del'>-		netdev_boot_setup_check(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-        if (dev-&gt;base_addr &gt; 0x1ff)    /* Check a single specified location. */</div><div class='del'>-		err = smctr_probe1(dev, dev-&gt;base_addr);</div><div class='del'>-        else if(dev-&gt;base_addr != 0)  /* Don't probe at all. */</div><div class='del'>-                err =-ENXIO;</div><div class='del'>-	else {</div><div class='del'>-		for (port = ports; *port; port++) {</div><div class='del'>-			err = smctr_probe1(dev, *port);</div><div class='del'>-			if (!err)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-	err = register_netdev(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out1;</div><div class='del'>-	return dev;</div><div class='del'>-out1:</div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-	{ struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	  if (tp-&gt;slot_num)</div><div class='del'>-		mca_mark_as_unused(tp-&gt;slot_num);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	release_region(dev-&gt;base_addr, SMCTR_IO_EXTENT);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-out:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	return ERR_PTR(err);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops smctr_netdev_ops = {</div><div class='del'>-	.ndo_open          = smctr_open,</div><div class='del'>-	.ndo_stop          = smctr_close,</div><div class='del'>-	.ndo_start_xmit    = smctr_send_packet,</div><div class='del'>-	.ndo_tx_timeout	   = smctr_timeout,</div><div class='del'>-	.ndo_get_stats     = smctr_get_stats,</div><div class='del'>-	.ndo_set_rx_mode   = smctr_set_multicast_list,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init smctr_probe1(struct net_device *dev, int ioaddr)</div><div class='del'>-{</div><div class='del'>-        static unsigned version_printed;</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int err;</div><div class='del'>-        __u32 *ram;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &amp;&amp; version_printed++ == 0)</div><div class='del'>-                printk(version);</div><div class='del'>-</div><div class='del'>-        spin_lock_init(&amp;tp-&gt;lock);</div><div class='del'>-        dev-&gt;base_addr = ioaddr;</div><div class='del'>-</div><div class='del'>-	/* Actually detect an adapter now. */</div><div class='del'>-        err = smctr_chk_isa(dev);</div><div class='del'>-        if(err &lt; 0)</div><div class='del'>-        {</div><div class='del'>-		if ((err = smctr_chk_mca(dev)) &lt; 0) {</div><div class='del'>-			err = -ENODEV;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        tp = netdev_priv(dev);</div><div class='del'>-        dev-&gt;mem_start = tp-&gt;ram_base;</div><div class='del'>-        dev-&gt;mem_end = dev-&gt;mem_start + 0x10000;</div><div class='del'>-        ram = (__u32 *)phys_to_virt(dev-&gt;mem_start);</div><div class='del'>-        tp-&gt;ram_access = *(__u32 *)&amp;ram;</div><div class='del'>-	tp-&gt;status = NOT_INITIALIZED;</div><div class='del'>-</div><div class='del'>-        err = smctr_load_firmware(dev);</div><div class='del'>-        if(err != UCODE_PRESENT &amp;&amp; err != SUCCESS)</div><div class='del'>-        {</div><div class='del'>-                printk(KERN_ERR "%s: Firmware load failed (%d)\n", dev-&gt;name, err);</div><div class='del'>-		err = -EIO;</div><div class='del'>-		goto out;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	/* Allow user to specify ring speed on module insert. */</div><div class='del'>-	if(ringspeed == 4)</div><div class='del'>-		tp-&gt;media_type = MEDIA_UTP_4;</div><div class='del'>-	else</div><div class='del'>-		tp-&gt;media_type = MEDIA_UTP_16;</div><div class='del'>-</div><div class='del'>-        printk(KERN_INFO "%s: %s %s at Io %#4x, Irq %d, Rom %#4x, Ram %#4x.\n",</div><div class='del'>-                dev-&gt;name, smctr_name, smctr_model,</div><div class='del'>-                (unsigned int)dev-&gt;base_addr,</div><div class='del'>-                dev-&gt;irq, tp-&gt;rom_base, tp-&gt;ram_base);</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;smctr_netdev_ops;</div><div class='del'>-        dev-&gt;watchdog_timeo	= HZ;</div><div class='del'>-        return 0;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_process_rx_packet(MAC_HEADER *rmf, __u16 size,</div><div class='del'>-        struct net_device *dev, __u16 rx_status)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        struct sk_buff *skb;</div><div class='del'>-        __u16 rcode, correlator;</div><div class='del'>-        int err = 0;</div><div class='del'>-        __u8 xframe = 1;</div><div class='del'>-</div><div class='del'>-        rmf-&gt;vl = SWAP_BYTES(rmf-&gt;vl);</div><div class='del'>-        if(rx_status &amp; FCB_RX_STATUS_DA_MATCHED)</div><div class='del'>-        {</div><div class='del'>-                switch(rmf-&gt;vc)</div><div class='del'>-                {</div><div class='del'>-                        /* Received MAC Frames Processed by RS. */</div><div class='del'>-                        case INIT:</div><div class='del'>-                                if((rcode = smctr_rcv_init(dev, rmf, &amp;correlator)) == HARDWARE_FAILED)</div><div class='del'>-                                {</div><div class='del'>-                                        return rcode;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                if((err = smctr_send_rsp(dev, rmf, rcode,</div><div class='del'>-                                        correlator)))</div><div class='del'>-                                {</div><div class='del'>-                                        return err;</div><div class='del'>-                                }</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case CHG_PARM:</div><div class='del'>-                                if((rcode = smctr_rcv_chg_param(dev, rmf,</div><div class='del'>-                                        &amp;correlator)) ==HARDWARE_FAILED)</div><div class='del'>-                                {</div><div class='del'>-                                        return rcode;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                if((err = smctr_send_rsp(dev, rmf, rcode,</div><div class='del'>-                                        correlator)))</div><div class='del'>-                                {</div><div class='del'>-                                        return err;</div><div class='del'>-                                }</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case RQ_ADDR:</div><div class='del'>-                                if((rcode = smctr_rcv_rq_addr_state_attch(dev,</div><div class='del'>-                                        rmf, &amp;correlator)) != POSITIVE_ACK)</div><div class='del'>-                                {</div><div class='del'>-                                        if(rcode == HARDWARE_FAILED)</div><div class='del'>-                                                return rcode;</div><div class='del'>-                                        else</div><div class='del'>-                                                return smctr_send_rsp(dev, rmf,</div><div class='del'>-                                                        rcode, correlator);</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                if((err = smctr_send_rpt_addr(dev, rmf,</div><div class='del'>-                                        correlator)))</div><div class='del'>-                                {</div><div class='del'>-                                        return err;</div><div class='del'>-                                }</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case RQ_ATTCH:</div><div class='del'>-                                if((rcode = smctr_rcv_rq_addr_state_attch(dev,</div><div class='del'>-                                        rmf, &amp;correlator)) != POSITIVE_ACK)</div><div class='del'>-                                {</div><div class='del'>-                                        if(rcode == HARDWARE_FAILED)</div><div class='del'>-                                                return rcode;</div><div class='del'>-                                        else</div><div class='del'>-                                                return smctr_send_rsp(dev, rmf,</div><div class='del'>-                                                        rcode,</div><div class='del'>-                                                        correlator);</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                if((err = smctr_send_rpt_attch(dev, rmf,</div><div class='del'>-                                        correlator)))</div><div class='del'>-                                {</div><div class='del'>-                                        return err;</div><div class='del'>-                                }</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case RQ_STATE:</div><div class='del'>-                                if((rcode = smctr_rcv_rq_addr_state_attch(dev,</div><div class='del'>-                                        rmf, &amp;correlator)) != POSITIVE_ACK)</div><div class='del'>-                                {</div><div class='del'>-                                        if(rcode == HARDWARE_FAILED)</div><div class='del'>-                                                return rcode;</div><div class='del'>-                                        else</div><div class='del'>-                                                return smctr_send_rsp(dev, rmf,</div><div class='del'>-                                                        rcode,</div><div class='del'>-                                                        correlator);</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                if((err = smctr_send_rpt_state(dev, rmf,</div><div class='del'>-                                        correlator)))</div><div class='del'>-                                {</div><div class='del'>-                                        return err;</div><div class='del'>-                                }</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case TX_FORWARD: {</div><div class='del'>-        			__u16 uninitialized_var(tx_fstatus);</div><div class='del'>-</div><div class='del'>-                                if((rcode = smctr_rcv_tx_forward(dev, rmf))</div><div class='del'>-                                        != POSITIVE_ACK)</div><div class='del'>-                                {</div><div class='del'>-                                        if(rcode == HARDWARE_FAILED)</div><div class='del'>-                                                return rcode;</div><div class='del'>-                                        else</div><div class='del'>-                                                return smctr_send_rsp(dev, rmf,</div><div class='del'>-                                                        rcode,</div><div class='del'>-                                                        correlator);</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                if((err = smctr_send_tx_forward(dev, rmf,</div><div class='del'>-                                        &amp;tx_fstatus)) == HARDWARE_FAILED)</div><div class='del'>-                                {</div><div class='del'>-                                        return err;</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                if(err == A_FRAME_WAS_FORWARDED)</div><div class='del'>-                                {</div><div class='del'>-                                        if((err = smctr_send_rpt_tx_forward(dev,</div><div class='del'>-						rmf, tx_fstatus))</div><div class='del'>-                                                == HARDWARE_FAILED)</div><div class='del'>-                                        {</div><div class='del'>-                                                return err;</div><div class='del'>-                                        }</div><div class='del'>-                                }</div><div class='del'>-                                break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-                        /* Received MAC Frames Processed by CRS/REM/RPS. */</div><div class='del'>-                        case RSP:</div><div class='del'>-                        case RQ_INIT:</div><div class='del'>-                        case RPT_NEW_MON:</div><div class='del'>-                        case RPT_SUA_CHG:</div><div class='del'>-                        case RPT_ACTIVE_ERR:</div><div class='del'>-                        case RPT_NN_INCMP:</div><div class='del'>-                        case RPT_ERROR:</div><div class='del'>-                        case RPT_ATTCH:</div><div class='del'>-                        case RPT_STATE:</div><div class='del'>-                        case RPT_ADDR:</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        /* Rcvd Att. MAC Frame (if RXATMAC set) or UNKNOWN */</div><div class='del'>-                        default:</div><div class='del'>-                                xframe = 0;</div><div class='del'>-                                if(!(tp-&gt;receive_mask &amp; ACCEPT_ATT_MAC_FRAMES))</div><div class='del'>-                                {</div><div class='del'>-                                        rcode = smctr_rcv_unknown(dev, rmf,</div><div class='del'>-                                                &amp;correlator);</div><div class='del'>-                                        if((err = smctr_send_rsp(dev, rmf,rcode,</div><div class='del'>-                                                correlator)))</div><div class='del'>-                                        {</div><div class='del'>-                                                return err;</div><div class='del'>-                                        }</div><div class='del'>-                                }</div><div class='del'>-</div><div class='del'>-                                break;</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-        else</div><div class='del'>-        {</div><div class='del'>-                /* 1. DA doesn't match (Promiscuous Mode).</div><div class='del'>-                 * 2. Parse for Extended MAC Frame Type.</div><div class='del'>-                 */</div><div class='del'>-                switch(rmf-&gt;vc)</div><div class='del'>-                {</div><div class='del'>-                        case RSP:</div><div class='del'>-                        case INIT:</div><div class='del'>-                        case RQ_INIT:</div><div class='del'>-                        case RQ_ADDR:</div><div class='del'>-                        case RQ_ATTCH:</div><div class='del'>-                        case RQ_STATE:</div><div class='del'>-                        case CHG_PARM:</div><div class='del'>-                        case RPT_ADDR:</div><div class='del'>-                        case RPT_ERROR:</div><div class='del'>-                        case RPT_ATTCH:</div><div class='del'>-                        case RPT_STATE:</div><div class='del'>-                        case RPT_NEW_MON:</div><div class='del'>-                        case RPT_SUA_CHG:</div><div class='del'>-                        case RPT_NN_INCMP:</div><div class='del'>-                        case RPT_ACTIVE_ERR:</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        default:</div><div class='del'>-                                xframe = 0;</div><div class='del'>-                                break;</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* NOTE: UNKNOWN MAC frames will NOT be passed up unless</div><div class='del'>-         * ACCEPT_ATT_MAC_FRAMES is set.</div><div class='del'>-         */</div><div class='del'>-        if(((tp-&gt;receive_mask &amp; ACCEPT_ATT_MAC_FRAMES) &amp;&amp;</div><div class='del'>-	    (xframe == (__u8)0)) ||</div><div class='del'>-	   ((tp-&gt;receive_mask &amp; ACCEPT_EXT_MAC_FRAMES) &amp;&amp;</div><div class='del'>-	    (xframe == (__u8)1)))</div><div class='del'>-        {</div><div class='del'>-                rmf-&gt;vl = SWAP_BYTES(rmf-&gt;vl);</div><div class='del'>-</div><div class='del'>-                if (!(skb = dev_alloc_skb(size)))</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-                skb-&gt;len = size;</div><div class='del'>-</div><div class='del'>-                /* Slide data into a sleek skb. */</div><div class='del'>-                skb_put(skb, skb-&gt;len);</div><div class='del'>-                skb_copy_to_linear_data(skb, rmf, skb-&gt;len);</div><div class='del'>-</div><div class='del'>-                /* Update Counters */</div><div class='del'>-                tp-&gt;MacStat.rx_packets++;</div><div class='del'>-                tp-&gt;MacStat.rx_bytes += skb-&gt;len;</div><div class='del'>-</div><div class='del'>-                /* Kick the packet on up. */</div><div class='del'>-                skb-&gt;protocol = tr_type_trans(skb, dev);</div><div class='del'>-                netif_rx(skb);</div><div class='del'>-                err = 0;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Adapter RAM test. Incremental word ODD boundary data test. */</div><div class='del'>-static int smctr_ram_memory_test(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        __u16 page, pages_of_ram, start_pattern = 0, word_pattern = 0,</div><div class='del'>-                word_read = 0, err_word = 0, err_pattern = 0;</div><div class='del'>-        unsigned int err_offset;</div><div class='del'>-        __u32 j, pword;</div><div class='del'>-        __u8 err = 0;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_ram_memory_test\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        start_pattern   = 0x0001;</div><div class='del'>-        pages_of_ram    = tp-&gt;ram_size / tp-&gt;ram_usable;</div><div class='del'>-        pword           = tp-&gt;ram_access;</div><div class='del'>-</div><div class='del'>-        /* Incremental word ODD boundary test. */</div><div class='del'>-        for(page = 0; (page &lt; pages_of_ram) &amp;&amp; (~err);</div><div class='del'>-                page++, start_pattern += 0x8000)</div><div class='del'>-        {</div><div class='del'>-                smctr_set_page(dev, (__u8 *)(tp-&gt;ram_access</div><div class='del'>-                        + (page * tp-&gt;ram_usable * 1024) + 1));</div><div class='del'>-                word_pattern = start_pattern;</div><div class='del'>-</div><div class='del'>-                for(j = 1; j &lt; (__u32)(tp-&gt;ram_usable * 1024) - 1; j += 2)</div><div class='del'>-                        *(__u16 *)(pword + j) = word_pattern++;</div><div class='del'>-</div><div class='del'>-                word_pattern = start_pattern;</div><div class='del'>-</div><div class='del'>-                for(j = 1; j &lt; (__u32)(tp-&gt;ram_usable * 1024) - 1 &amp;&amp; (~err);</div><div class='del'>-		    j += 2, word_pattern++)</div><div class='del'>-                {</div><div class='del'>-                        word_read = *(__u16 *)(pword + j);</div><div class='del'>-                        if(word_read != word_pattern)</div><div class='del'>-                        {</div><div class='del'>-                                err             = (__u8)1;</div><div class='del'>-                                err_offset      = j;</div><div class='del'>-                                err_word        = word_read;</div><div class='del'>-                                err_pattern     = word_pattern;</div><div class='del'>-                                return RAM_TEST_FAILED;</div><div class='del'>-                        }</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Zero out memory. */</div><div class='del'>-        for(page = 0; page &lt; pages_of_ram &amp;&amp; (~err); page++)</div><div class='del'>-        {</div><div class='del'>-                smctr_set_page(dev, (__u8 *)(tp-&gt;ram_access</div><div class='del'>-                        + (page * tp-&gt;ram_usable * 1024)));</div><div class='del'>-                word_pattern = 0;</div><div class='del'>-</div><div class='del'>-                for(j = 0; j &lt; (__u32)tp-&gt;ram_usable * 1024; j +=2)</div><div class='del'>-                        *(__u16 *)(pword + j) = word_pattern;</div><div class='del'>-</div><div class='del'>-                for(j =0; j &lt; (__u32)tp-&gt;ram_usable * 1024 &amp;&amp; (~err); j += 2)</div><div class='del'>-                {</div><div class='del'>-                        word_read = *(__u16 *)(pword + j);</div><div class='del'>-                        if(word_read != word_pattern)</div><div class='del'>-                        {</div><div class='del'>-                                err             = (__u8)1;</div><div class='del'>-                                err_offset      = j;</div><div class='del'>-                                err_word        = word_read;</div><div class='del'>-                                err_pattern     = word_pattern;</div><div class='del'>-                                return RAM_TEST_FAILED;</div><div class='del'>-                        }</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        smctr_set_page(dev, (__u8 *)tp-&gt;ram_access);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_rcv_chg_param(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 *correlator)</div><div class='del'>-{</div><div class='del'>-        MAC_SUB_VECTOR *rsv;</div><div class='del'>-        signed short vlen;</div><div class='del'>-        __u16 rcode = POSITIVE_ACK;</div><div class='del'>-        unsigned int svectors = F_NO_SUB_VECTORS_FOUND;</div><div class='del'>-</div><div class='del'>-        /* This Frame can only come from a CRS */</div><div class='del'>-        if((rmf-&gt;dc_sc &amp; SC_MASK) != SC_CRS)</div><div class='del'>-                return E_INAPPROPRIATE_SOURCE_CLASS;</div><div class='del'>-</div><div class='del'>-        /* Remove MVID Length from total length. */</div><div class='del'>-        vlen = (signed short)rmf-&gt;vl - 4;</div><div class='del'>-</div><div class='del'>-        /* Point to First SVID */</div><div class='del'>-        rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));</div><div class='del'>-</div><div class='del'>-        /* Search for Appropriate SVID's. */</div><div class='del'>-        while((vlen &gt; 0) &amp;&amp; (rcode == POSITIVE_ACK))</div><div class='del'>-        {</div><div class='del'>-                switch(rsv-&gt;svi)</div><div class='del'>-                {</div><div class='del'>-                        case CORRELATOR:</div><div class='del'>-                                svectors |= F_CORRELATOR;</div><div class='del'>-                                rcode = smctr_set_corr(dev, rsv, correlator);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case LOCAL_RING_NUMBER:</div><div class='del'>-                                svectors |= F_LOCAL_RING_NUMBER;</div><div class='del'>-                                rcode = smctr_set_local_ring_num(dev, rsv);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case ASSIGN_PHYSICAL_DROP:</div><div class='del'>-                                svectors |= F_ASSIGN_PHYSICAL_DROP;</div><div class='del'>-                                rcode = smctr_set_phy_drop(dev, rsv);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case ERROR_TIMER_VALUE:</div><div class='del'>-                                svectors |= F_ERROR_TIMER_VALUE;</div><div class='del'>-                                rcode = smctr_set_error_timer_value(dev, rsv);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case AUTHORIZED_FUNCTION_CLASS:</div><div class='del'>-                                svectors |= F_AUTHORIZED_FUNCTION_CLASS;</div><div class='del'>-                                rcode = smctr_set_auth_funct_class(dev, rsv);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case AUTHORIZED_ACCESS_PRIORITY:</div><div class='del'>-                                svectors |= F_AUTHORIZED_ACCESS_PRIORITY;</div><div class='del'>-                                rcode = smctr_set_auth_access_pri(dev, rsv);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        default:</div><div class='del'>-                                rcode = E_SUB_VECTOR_UNKNOWN;</div><div class='del'>-                                break;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                /* Let Sender Know if SUM of SV length's is</div><div class='del'>-                 * larger then length in MVID length field</div><div class='del'>-                 */</div><div class='del'>-                if((vlen -= rsv-&gt;svl) &lt; 0)</div><div class='del'>-                        rcode = E_VECTOR_LENGTH_ERROR;</div><div class='del'>-</div><div class='del'>-                rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv-&gt;svl);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if(rcode == POSITIVE_ACK)</div><div class='del'>-        {</div><div class='del'>-                /* Let Sender Know if MVID length field</div><div class='del'>-                 * is larger then SUM of SV length's</div><div class='del'>-                 */</div><div class='del'>-                if(vlen != 0)</div><div class='del'>-                        rcode = E_VECTOR_LENGTH_ERROR;</div><div class='del'>-                else</div><div class='del'>-		{</div><div class='del'>-                	/* Let Sender Know if Expected SVID Missing */</div><div class='del'>-                	if((svectors &amp; R_CHG_PARM) ^ R_CHG_PARM)</div><div class='del'>-                        	rcode = E_MISSING_SUB_VECTOR;</div><div class='del'>-		}</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return rcode;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_rcv_init(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 *correlator)</div><div class='del'>-{</div><div class='del'>-        MAC_SUB_VECTOR *rsv;</div><div class='del'>-        signed short vlen;</div><div class='del'>-        __u16 rcode = POSITIVE_ACK;</div><div class='del'>-        unsigned int svectors = F_NO_SUB_VECTORS_FOUND;</div><div class='del'>-</div><div class='del'>-        /* This Frame can only come from a RPS */</div><div class='del'>-        if((rmf-&gt;dc_sc &amp; SC_MASK) != SC_RPS)</div><div class='del'>-                return E_INAPPROPRIATE_SOURCE_CLASS;</div><div class='del'>-</div><div class='del'>-        /* Remove MVID Length from total length. */</div><div class='del'>-        vlen = (signed short)rmf-&gt;vl - 4;</div><div class='del'>-</div><div class='del'>-        /* Point to First SVID */</div><div class='del'>-        rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));</div><div class='del'>-</div><div class='del'>-        /* Search for Appropriate SVID's */</div><div class='del'>-        while((vlen &gt; 0) &amp;&amp; (rcode == POSITIVE_ACK))</div><div class='del'>-        {</div><div class='del'>-                switch(rsv-&gt;svi)</div><div class='del'>-                {</div><div class='del'>-                        case CORRELATOR:</div><div class='del'>-                                svectors |= F_CORRELATOR;</div><div class='del'>-                                rcode = smctr_set_corr(dev, rsv, correlator);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case LOCAL_RING_NUMBER:</div><div class='del'>-                                svectors |= F_LOCAL_RING_NUMBER;</div><div class='del'>-                                rcode = smctr_set_local_ring_num(dev, rsv);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case ASSIGN_PHYSICAL_DROP:</div><div class='del'>-                                svectors |= F_ASSIGN_PHYSICAL_DROP;</div><div class='del'>-                                rcode = smctr_set_phy_drop(dev, rsv);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        case ERROR_TIMER_VALUE:</div><div class='del'>-                                svectors |= F_ERROR_TIMER_VALUE;</div><div class='del'>-                                rcode = smctr_set_error_timer_value(dev, rsv);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        default:</div><div class='del'>-                                rcode = E_SUB_VECTOR_UNKNOWN;</div><div class='del'>-                                break;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                /* Let Sender Know if SUM of SV length's is</div><div class='del'>-                 * larger then length in MVID length field</div><div class='del'>-		 */</div><div class='del'>-                if((vlen -= rsv-&gt;svl) &lt; 0)</div><div class='del'>-                        rcode = E_VECTOR_LENGTH_ERROR;</div><div class='del'>-</div><div class='del'>-                rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv-&gt;svl);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if(rcode == POSITIVE_ACK)</div><div class='del'>-        {</div><div class='del'>-                /* Let Sender Know if MVID length field</div><div class='del'>-                 * is larger then SUM of SV length's</div><div class='del'>-                 */</div><div class='del'>-                if(vlen != 0)</div><div class='del'>-                        rcode = E_VECTOR_LENGTH_ERROR;</div><div class='del'>-                else</div><div class='del'>-		{</div><div class='del'>-                	/* Let Sender Know if Expected SV Missing */</div><div class='del'>-                	if((svectors &amp; R_INIT) ^ R_INIT)</div><div class='del'>-                        	rcode = E_MISSING_SUB_VECTOR;</div><div class='del'>-		}</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return rcode;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_rcv_tx_forward(struct net_device *dev, MAC_HEADER *rmf)</div><div class='del'>-{</div><div class='del'>-        MAC_SUB_VECTOR *rsv;</div><div class='del'>-        signed short vlen;</div><div class='del'>-        __u16 rcode = POSITIVE_ACK;</div><div class='del'>-        unsigned int svectors = F_NO_SUB_VECTORS_FOUND;</div><div class='del'>-</div><div class='del'>-        /* This Frame can only come from a CRS */</div><div class='del'>-        if((rmf-&gt;dc_sc &amp; SC_MASK) != SC_CRS)</div><div class='del'>-                return E_INAPPROPRIATE_SOURCE_CLASS;</div><div class='del'>-</div><div class='del'>-        /* Remove MVID Length from total length */</div><div class='del'>-        vlen = (signed short)rmf-&gt;vl - 4;</div><div class='del'>-</div><div class='del'>-        /* Point to First SVID */</div><div class='del'>-        rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));</div><div class='del'>-</div><div class='del'>-        /* Search for Appropriate SVID's */</div><div class='del'>-        while((vlen &gt; 0) &amp;&amp; (rcode == POSITIVE_ACK))</div><div class='del'>-        {</div><div class='del'>-                switch(rsv-&gt;svi)</div><div class='del'>-                {</div><div class='del'>-                        case FRAME_FORWARD:</div><div class='del'>-                                svectors |= F_FRAME_FORWARD;</div><div class='del'>-                                rcode = smctr_set_frame_forward(dev, rsv, </div><div class='del'>-					rmf-&gt;dc_sc);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        default:</div><div class='del'>-                                rcode = E_SUB_VECTOR_UNKNOWN;</div><div class='del'>-                                break;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                /* Let Sender Know if SUM of SV length's is</div><div class='del'>-                 * larger then length in MVID length field</div><div class='del'>-		 */</div><div class='del'>-                if((vlen -= rsv-&gt;svl) &lt; 0)</div><div class='del'>-                        rcode = E_VECTOR_LENGTH_ERROR;</div><div class='del'>-</div><div class='del'>-                rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv-&gt;svl);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if(rcode == POSITIVE_ACK)</div><div class='del'>-        {</div><div class='del'>-                /* Let Sender Know if MVID length field</div><div class='del'>-                 * is larger then SUM of SV length's</div><div class='del'>-                 */</div><div class='del'>-                if(vlen != 0)</div><div class='del'>-                        rcode = E_VECTOR_LENGTH_ERROR;</div><div class='del'>-                else</div><div class='del'>-		{</div><div class='del'>-                	/* Let Sender Know if Expected SV Missing */</div><div class='del'>-                	if((svectors &amp; R_TX_FORWARD) ^ R_TX_FORWARD)</div><div class='del'>-                        	rcode = E_MISSING_SUB_VECTOR;</div><div class='del'>-		}</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return rcode;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_rcv_rq_addr_state_attch(struct net_device *dev,</div><div class='del'>-        MAC_HEADER *rmf, __u16 *correlator)</div><div class='del'>-{</div><div class='del'>-        MAC_SUB_VECTOR *rsv;</div><div class='del'>-        signed short vlen;</div><div class='del'>-        __u16 rcode = POSITIVE_ACK;</div><div class='del'>-        unsigned int svectors = F_NO_SUB_VECTORS_FOUND;</div><div class='del'>-</div><div class='del'>-        /* Remove MVID Length from total length */</div><div class='del'>-        vlen = (signed short)rmf-&gt;vl - 4;</div><div class='del'>-</div><div class='del'>-        /* Point to First SVID */</div><div class='del'>-        rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));</div><div class='del'>-</div><div class='del'>-        /* Search for Appropriate SVID's */</div><div class='del'>-        while((vlen &gt; 0) &amp;&amp; (rcode == POSITIVE_ACK))</div><div class='del'>-        {</div><div class='del'>-                switch(rsv-&gt;svi)</div><div class='del'>-                {</div><div class='del'>-                        case CORRELATOR:</div><div class='del'>-                                svectors |= F_CORRELATOR;</div><div class='del'>-                                rcode = smctr_set_corr(dev, rsv, correlator);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        default:</div><div class='del'>-                                rcode = E_SUB_VECTOR_UNKNOWN;</div><div class='del'>-                                break;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                /* Let Sender Know if SUM of SV length's is</div><div class='del'>-                 * larger then length in MVID length field</div><div class='del'>-                 */</div><div class='del'>-                if((vlen -= rsv-&gt;svl) &lt; 0)</div><div class='del'>-                        rcode = E_VECTOR_LENGTH_ERROR;</div><div class='del'>-</div><div class='del'>-                rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv-&gt;svl);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if(rcode == POSITIVE_ACK)</div><div class='del'>-        {</div><div class='del'>-                /* Let Sender Know if MVID length field</div><div class='del'>-                 * is larger then SUM of SV length's</div><div class='del'>-                 */</div><div class='del'>-                if(vlen != 0)</div><div class='del'>-                        rcode = E_VECTOR_LENGTH_ERROR;</div><div class='del'>-                else</div><div class='del'>-		{</div><div class='del'>-                	/* Let Sender Know if Expected SVID Missing */</div><div class='del'>-                	if((svectors &amp; R_RQ_ATTCH_STATE_ADDR) </div><div class='del'>-				^ R_RQ_ATTCH_STATE_ADDR)</div><div class='del'>-                        	rcode = E_MISSING_SUB_VECTOR;</div><div class='del'>-			}</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return rcode;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_rcv_unknown(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 *correlator)</div><div class='del'>-{</div><div class='del'>-        MAC_SUB_VECTOR *rsv;</div><div class='del'>-        signed short vlen;</div><div class='del'>-</div><div class='del'>-        *correlator = 0;</div><div class='del'>-</div><div class='del'>-        /* Remove MVID Length from total length */</div><div class='del'>-        vlen = (signed short)rmf-&gt;vl - 4;</div><div class='del'>-</div><div class='del'>-        /* Point to First SVID */</div><div class='del'>-        rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));</div><div class='del'>-</div><div class='del'>-        /* Search for CORRELATOR for RSP to UNKNOWN */</div><div class='del'>-        while((vlen &gt; 0) &amp;&amp; (*correlator == 0))</div><div class='del'>-        {</div><div class='del'>-                switch(rsv-&gt;svi)</div><div class='del'>-                {</div><div class='del'>-                        case CORRELATOR:</div><div class='del'>-                                smctr_set_corr(dev, rsv, correlator);</div><div class='del'>-                                break;</div><div class='del'>-</div><div class='del'>-                        default:</div><div class='del'>-                                break;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                vlen -= rsv-&gt;svl;</div><div class='del'>-                rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv-&gt;svl);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return E_UNRECOGNIZED_VECTOR_ID;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Reset the 825 NIC and exit w:</div><div class='del'>- * 1. The NIC reset cleared (non-reset state), halted and un-initialized.</div><div class='del'>- * 2. TINT masked.</div><div class='del'>- * 3. CBUSY masked.</div><div class='del'>- * 4. TINT clear.</div><div class='del'>- * 5. CBUSY clear.</div><div class='del'>- */</div><div class='del'>-static int smctr_reset_adapter(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-        /* Reseting the NIC will put it in a halted and un-initialized state. */        smctr_set_trc_reset(ioaddr);</div><div class='del'>-        mdelay(200); /* ~2 ms */</div><div class='del'>-</div><div class='del'>-        smctr_clear_trc_reset(ioaddr);</div><div class='del'>-        mdelay(200); /* ~2 ms */</div><div class='del'>-</div><div class='del'>-        /* Remove any latched interrupts that occurred prior to reseting the</div><div class='del'>-         * adapter or possibily caused by line glitches due to the reset.</div><div class='del'>-         */</div><div class='del'>-        outb(tp-&gt;trc_mask | CSR_CLRTINT | CSR_CLRCBUSY, ioaddr + CSR);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_restart_tx_chain(struct net_device *dev, short queue)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int err = 0;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_restart_tx_chain\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;num_tx_fcbs_used[queue] != 0 &amp;&amp;</div><div class='del'>-	   tp-&gt;tx_queue_status[queue] == NOT_TRANSMITING)</div><div class='del'>-        {</div><div class='del'>-                tp-&gt;tx_queue_status[queue] = TRANSMITING;</div><div class='del'>-                err = smctr_issue_resume_tx_fcb_cmd(dev, queue);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_ring_status_chg(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_ring_status_chg\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        /* Check for ring_status_flag: whenever MONITOR_STATE_BIT</div><div class='del'>-         * Bit is set, check value of monitor_state, only then we</div><div class='del'>-         * enable and start transmit/receive timeout (if and only</div><div class='del'>-         * if it is MS_ACTIVE_MONITOR_STATE or MS_STANDBY_MONITOR_STATE)</div><div class='del'>-         */</div><div class='del'>-        if(tp-&gt;ring_status_flags == MONITOR_STATE_CHANGED)</div><div class='del'>-        {</div><div class='del'>-                if((tp-&gt;monitor_state == MS_ACTIVE_MONITOR_STATE) ||</div><div class='del'>-		   (tp-&gt;monitor_state == MS_STANDBY_MONITOR_STATE))</div><div class='del'>-                {</div><div class='del'>-                        tp-&gt;monitor_state_ready = 1;</div><div class='del'>-                }</div><div class='del'>-                else</div><div class='del'>-                {</div><div class='del'>-                        /* if adapter is NOT in either active monitor</div><div class='del'>-                         * or standby monitor state =&gt; Disable</div><div class='del'>-                         * transmit/receive timeout.</div><div class='del'>-                         */</div><div class='del'>-                        tp-&gt;monitor_state_ready = 0;</div><div class='del'>-</div><div class='del'>-			/* Ring speed problem, switching to auto mode. */</div><div class='del'>-			if(tp-&gt;monitor_state == MS_MONITOR_FSM_INACTIVE &amp;&amp;</div><div class='del'>-			   !tp-&gt;cleanup)</div><div class='del'>-			{</div><div class='del'>-				printk(KERN_INFO "%s: Incorrect ring speed switching.\n",</div><div class='del'>-					dev-&gt;name);</div><div class='del'>-				smctr_set_ring_speed(dev);</div><div class='del'>-			}</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if(!(tp-&gt;ring_status_flags &amp; RING_STATUS_CHANGED))</div><div class='del'>-                return 0;</div><div class='del'>-</div><div class='del'>-        switch(tp-&gt;ring_status)</div><div class='del'>-        {</div><div class='del'>-                case RING_RECOVERY:</div><div class='del'>-                        printk(KERN_INFO "%s: Ring Recovery\n", dev-&gt;name);</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case SINGLE_STATION:</div><div class='del'>-                        printk(KERN_INFO "%s: Single Statinon\n", dev-&gt;name);</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case COUNTER_OVERFLOW:</div><div class='del'>-                        printk(KERN_INFO "%s: Counter Overflow\n", dev-&gt;name);</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case REMOVE_RECEIVED:</div><div class='del'>-                        printk(KERN_INFO "%s: Remove Received\n", dev-&gt;name);</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case AUTO_REMOVAL_ERROR:</div><div class='del'>-                        printk(KERN_INFO "%s: Auto Remove Error\n", dev-&gt;name);</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case LOBE_WIRE_FAULT:</div><div class='del'>-                        printk(KERN_INFO "%s: Lobe Wire Fault\n", dev-&gt;name);</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case TRANSMIT_BEACON:</div><div class='del'>-                        printk(KERN_INFO "%s: Transmit Beacon\n", dev-&gt;name);</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case SOFT_ERROR:</div><div class='del'>-                        printk(KERN_INFO "%s: Soft Error\n", dev-&gt;name);</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case HARD_ERROR:</div><div class='del'>-                        printk(KERN_INFO "%s: Hard Error\n", dev-&gt;name);</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case SIGNAL_LOSS:</div><div class='del'>-                        printk(KERN_INFO "%s: Signal Loss\n", dev-&gt;name);</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                default:</div><div class='del'>-			printk(KERN_INFO "%s: Unknown ring status change\n",</div><div class='del'>-				dev-&gt;name);</div><div class='del'>-                        break;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_rx_frame(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        __u16 queue, status, rx_size, err = 0;</div><div class='del'>-        __u8 *pbuff;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_rx_frame\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        queue = tp-&gt;receive_queue_number;</div><div class='del'>-</div><div class='del'>-        while((status = tp-&gt;rx_fcb_curr[queue]-&gt;frame_status) != SUCCESS)</div><div class='del'>-        {</div><div class='del'>-                err = HARDWARE_FAILED;</div><div class='del'>-</div><div class='del'>-                if(((status &amp; 0x007f) == 0) ||</div><div class='del'>-		   ((tp-&gt;receive_mask &amp; ACCEPT_ERR_PACKETS) != 0))</div><div class='del'>-                {</div><div class='del'>-                        /* frame length less the CRC (4 bytes) + FS (1 byte) */</div><div class='del'>-                        rx_size = tp-&gt;rx_fcb_curr[queue]-&gt;frame_length - 5;</div><div class='del'>-</div><div class='del'>-                        pbuff = smctr_get_rx_pointer(dev, queue);</div><div class='del'>-</div><div class='del'>-                        smctr_set_page(dev, pbuff);</div><div class='del'>-                        smctr_disable_16bit(dev);</div><div class='del'>-</div><div class='del'>-                        /* pbuff points to addr within one page */</div><div class='del'>-                        pbuff = (__u8 *)PAGE_POINTER(pbuff);</div><div class='del'>-</div><div class='del'>-                        if(queue == NON_MAC_QUEUE)</div><div class='del'>-                        {</div><div class='del'>-                                struct sk_buff *skb;</div><div class='del'>-</div><div class='del'>-                                skb = dev_alloc_skb(rx_size);</div><div class='del'>-				if (skb) {</div><div class='del'>-                                	skb_put(skb, rx_size);</div><div class='del'>-</div><div class='del'>-					skb_copy_to_linear_data(skb, pbuff, rx_size);</div><div class='del'>-</div><div class='del'>-                                	/* Update Counters */</div><div class='del'>-                                	tp-&gt;MacStat.rx_packets++;</div><div class='del'>-                                	tp-&gt;MacStat.rx_bytes += skb-&gt;len;</div><div class='del'>-</div><div class='del'>-                                	/* Kick the packet on up. */</div><div class='del'>-                                	skb-&gt;protocol = tr_type_trans(skb, dev);</div><div class='del'>-                                	netif_rx(skb);</div><div class='del'>-				} else {</div><div class='del'>-				}</div><div class='del'>-                        }</div><div class='del'>-                        else</div><div class='del'>-                                smctr_process_rx_packet((MAC_HEADER *)pbuff,</div><div class='del'>-                                        rx_size, dev, status);</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                smctr_enable_16bit(dev);</div><div class='del'>-                smctr_set_page(dev, (__u8 *)tp-&gt;ram_access);</div><div class='del'>-                smctr_update_rx_chain(dev, queue);</div><div class='del'>-</div><div class='del'>-                if(err != SUCCESS)</div><div class='del'>-                        break;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_send_dat(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int i, err;</div><div class='del'>-        MAC_HEADER *tmf;</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_send_dat\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE,</div><div class='del'>-                sizeof(MAC_HEADER))) == (FCBlock *)(-1L))</div><div class='del'>-        {</div><div class='del'>-                return OUT_OF_RESOURCES;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Initialize DAT Data Fields. */</div><div class='del'>-        tmf = (MAC_HEADER *)fcb-&gt;bdb_ptr-&gt;data_block_ptr;</div><div class='del'>-        tmf-&gt;ac = MSB(AC_FC_DAT);</div><div class='del'>-        tmf-&gt;fc = LSB(AC_FC_DAT);</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; 6; i++)</div><div class='del'>-        {</div><div class='del'>-                tmf-&gt;sa[i] = dev-&gt;dev_addr[i];</div><div class='del'>-                tmf-&gt;da[i] = dev-&gt;dev_addr[i];</div><div class='del'>-</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vc        = DAT;</div><div class='del'>-        tmf-&gt;dc_sc     = DC_RS | SC_RS;</div><div class='del'>-        tmf-&gt;vl        = 4;</div><div class='del'>-        tmf-&gt;vl        = SWAP_BYTES(tmf-&gt;vl);</div><div class='del'>-</div><div class='del'>-        /* Start Transmit. */</div><div class='del'>-        if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        /* Wait for Transmit to Complete */</div><div class='del'>-        for(i = 0; i &lt; 10000; i++)</div><div class='del'>-        {</div><div class='del'>-                if(fcb-&gt;frame_status &amp; FCB_COMMAND_DONE)</div><div class='del'>-                        break;</div><div class='del'>-                mdelay(1);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Check if GOOD frame Tx'ed. */</div><div class='del'>-        if(!(fcb-&gt;frame_status &amp;  FCB_COMMAND_DONE) ||</div><div class='del'>-	   fcb-&gt;frame_status &amp; (FCB_TX_STATUS_E | FCB_TX_AC_BITS))</div><div class='del'>-        {</div><div class='del'>-                return INITIALIZE_FAILED;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* De-allocated Tx FCB and Frame Buffer</div><div class='del'>-         * The FCB must be de-allocated manually if executing with</div><div class='del'>-         * interrupts disabled, other wise the ISR (LM_Service_Events)</div><div class='del'>-         * will de-allocate it when the interrupt occurs.</div><div class='del'>-         */</div><div class='del'>-        tp-&gt;tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;</div><div class='del'>-        smctr_update_tx_chain(dev, fcb, MAC_QUEUE);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void smctr_timeout(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-         * If we get here, some higher level has decided we are broken.</div><div class='del'>-         * There should really be a "kick me" function call instead.</div><div class='del'>-         *</div><div class='del'>-         * Resetting the token ring adapter takes a long time so just</div><div class='del'>-         * fake transmission time and go on trying. Our own timeout</div><div class='del'>-         * routine is in sktr_timer_chk()</div><div class='del'>-         */</div><div class='del'>-        dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='del'>-        netif_wake_queue(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Gets skb from system, queues it and checks if it can be sent</div><div class='del'>- */</div><div class='del'>-static netdev_tx_t smctr_send_packet(struct sk_buff *skb,</div><div class='del'>-					   struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_send_packet\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        /*</div><div class='del'>-         * Block a transmit overlap</div><div class='del'>-         */</div><div class='del'>-         </div><div class='del'>-        netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;QueueSkb == 0)</div><div class='del'>-                return NETDEV_TX_BUSY;     /* Return with tbusy set: queue full */</div><div class='del'>-</div><div class='del'>-        tp-&gt;QueueSkb--;</div><div class='del'>-        skb_queue_tail(&amp;tp-&gt;SendSkbQueue, skb);</div><div class='del'>-        smctr_hardware_send_packet(dev, tp);</div><div class='del'>-        if(tp-&gt;QueueSkb &gt; 0)</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-		</div><div class='del'>-        return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_send_lobe_media_test(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	MAC_SUB_VECTOR *tsv;</div><div class='del'>-	MAC_HEADER *tmf;</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-	__u32 i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 15)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_send_lobe_media_test\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(struct trh_hdr)</div><div class='del'>-                + S_WRAP_DATA + S_WRAP_DATA)) == (FCBlock *)(-1L))</div><div class='del'>-        {</div><div class='del'>-                return OUT_OF_RESOURCES;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Initialize DAT Data Fields. */</div><div class='del'>-        tmf = (MAC_HEADER *)fcb-&gt;bdb_ptr-&gt;data_block_ptr;</div><div class='del'>-        tmf-&gt;ac = MSB(AC_FC_LOBE_MEDIA_TEST);</div><div class='del'>-        tmf-&gt;fc = LSB(AC_FC_LOBE_MEDIA_TEST);</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; 6; i++)</div><div class='del'>-        {</div><div class='del'>-                tmf-&gt;da[i] = 0;</div><div class='del'>-                tmf-&gt;sa[i] = dev-&gt;dev_addr[i];</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vc        = LOBE_MEDIA_TEST;</div><div class='del'>-        tmf-&gt;dc_sc     = DC_RS | SC_RS;</div><div class='del'>-        tmf-&gt;vl        = 4;</div><div class='del'>-</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));</div><div class='del'>-        smctr_make_wrap_data(dev, tsv);</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_wrap_data(dev, tsv);</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-</div><div class='del'>-        /* Start Transmit. */</div><div class='del'>-        tmf-&gt;vl = SWAP_BYTES(tmf-&gt;vl);</div><div class='del'>-        if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        /* Wait for Transmit to Complete. (10 ms). */</div><div class='del'>-        for(i=0; i &lt; 10000; i++)</div><div class='del'>-        {</div><div class='del'>-                if(fcb-&gt;frame_status &amp; FCB_COMMAND_DONE)</div><div class='del'>-                        break;</div><div class='del'>-                mdelay(1);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Check if GOOD frame Tx'ed */</div><div class='del'>-        if(!(fcb-&gt;frame_status &amp; FCB_COMMAND_DONE) ||</div><div class='del'>-	   fcb-&gt;frame_status &amp; (FCB_TX_STATUS_E | FCB_TX_AC_BITS))</div><div class='del'>-        {</div><div class='del'>-                return LOBE_MEDIA_TEST_FAILED;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* De-allocated Tx FCB and Frame Buffer</div><div class='del'>-         * The FCB must be de-allocated manually if executing with</div><div class='del'>-         * interrupts disabled, other wise the ISR (LM_Service_Events)</div><div class='del'>-         * will de-allocate it when the interrupt occurs.</div><div class='del'>-         */</div><div class='del'>-        tp-&gt;tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;</div><div class='del'>-        smctr_update_tx_chain(dev, fcb, MAC_QUEUE);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_send_rpt_addr(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 correlator)</div><div class='del'>-{</div><div class='del'>-        MAC_HEADER *tmf;</div><div class='del'>-        MAC_SUB_VECTOR *tsv;</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-</div><div class='del'>-        if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)</div><div class='del'>-		+ S_CORRELATOR + S_PHYSICAL_DROP + S_UPSTREAM_NEIGHBOR_ADDRESS</div><div class='del'>-		+ S_ADDRESS_MODIFER + S_GROUP_ADDRESS + S_FUNCTIONAL_ADDRESS))</div><div class='del'>-		== (FCBlock *)(-1L))</div><div class='del'>-        {</div><div class='del'>-                return 0;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        tmf 		= (MAC_HEADER *)fcb-&gt;bdb_ptr-&gt;data_block_ptr;</div><div class='del'>-        tmf-&gt;vc    	= RPT_ADDR;</div><div class='del'>-        tmf-&gt;dc_sc 	= (rmf-&gt;dc_sc &amp; SC_MASK) &lt;&lt; 4;</div><div class='del'>-        tmf-&gt;vl    	= 4;</div><div class='del'>-</div><div class='del'>-        smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_ADDR);</div><div class='del'>-</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));</div><div class='del'>-        smctr_make_corr(dev, tsv, correlator);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_phy_drop_num(dev, tsv);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_upstream_neighbor_addr(dev, tsv);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_addr_mod(dev, tsv);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_group_addr(dev, tsv);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_funct_addr(dev, tsv);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-</div><div class='del'>-        /* Subtract out MVID and MVL which is</div><div class='del'>-         * include in both vl and MAC_HEADER</div><div class='del'>-         */</div><div class='del'>-/*      fcb-&gt;frame_length           = tmf-&gt;vl + sizeof(MAC_HEADER) - 4;</div><div class='del'>-        fcb-&gt;bdb_ptr-&gt;buffer_length = tmf-&gt;vl + sizeof(MAC_HEADER) - 4;</div><div class='del'>-*/</div><div class='del'>-        tmf-&gt;vl = SWAP_BYTES(tmf-&gt;vl);</div><div class='del'>-</div><div class='del'>-        return smctr_trc_send_packet(dev, fcb, MAC_QUEUE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_send_rpt_attch(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 correlator)</div><div class='del'>-{</div><div class='del'>-        MAC_HEADER *tmf;</div><div class='del'>-        MAC_SUB_VECTOR *tsv;</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-</div><div class='del'>-        if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)</div><div class='del'>-		+ S_CORRELATOR + S_PRODUCT_INSTANCE_ID + S_FUNCTIONAL_ADDRESS</div><div class='del'>-		+ S_AUTHORIZED_FUNCTION_CLASS + S_AUTHORIZED_ACCESS_PRIORITY))</div><div class='del'>-		== (FCBlock *)(-1L))</div><div class='del'>-        {</div><div class='del'>-                return 0;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        tmf 	   = (MAC_HEADER *)fcb-&gt;bdb_ptr-&gt;data_block_ptr;</div><div class='del'>-        tmf-&gt;vc    = RPT_ATTCH;</div><div class='del'>-        tmf-&gt;dc_sc = (rmf-&gt;dc_sc &amp; SC_MASK) &lt;&lt; 4;</div><div class='del'>-        tmf-&gt;vl    = 4;</div><div class='del'>-</div><div class='del'>-        smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_ATTCH);</div><div class='del'>-</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));</div><div class='del'>-        smctr_make_corr(dev, tsv, correlator);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_product_id(dev, tsv);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_funct_addr(dev, tsv);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_auth_funct_class(dev, tsv);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_access_pri(dev, tsv);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-</div><div class='del'>-        /* Subtract out MVID and MVL which is</div><div class='del'>-         * include in both vl and MAC_HEADER</div><div class='del'>-         */</div><div class='del'>-/*      fcb-&gt;frame_length           = tmf-&gt;vl + sizeof(MAC_HEADER) - 4;</div><div class='del'>-        fcb-&gt;bdb_ptr-&gt;buffer_length = tmf-&gt;vl + sizeof(MAC_HEADER) - 4;</div><div class='del'>-*/</div><div class='del'>-        tmf-&gt;vl = SWAP_BYTES(tmf-&gt;vl);</div><div class='del'>-</div><div class='del'>-        return smctr_trc_send_packet(dev, fcb, MAC_QUEUE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_send_rpt_state(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 correlator)</div><div class='del'>-{</div><div class='del'>-        MAC_HEADER *tmf;</div><div class='del'>-        MAC_SUB_VECTOR *tsv;</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-</div><div class='del'>-        if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)</div><div class='del'>-		+ S_CORRELATOR + S_RING_STATION_VERSION_NUMBER</div><div class='del'>-		+ S_RING_STATION_STATUS + S_STATION_IDENTIFER))</div><div class='del'>-		== (FCBlock *)(-1L))</div><div class='del'>-        {</div><div class='del'>-                return 0;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        tmf 	   = (MAC_HEADER *)fcb-&gt;bdb_ptr-&gt;data_block_ptr;</div><div class='del'>-        tmf-&gt;vc    = RPT_STATE;</div><div class='del'>-        tmf-&gt;dc_sc = (rmf-&gt;dc_sc &amp; SC_MASK) &lt;&lt; 4;</div><div class='del'>-        tmf-&gt;vl    = 4;</div><div class='del'>-</div><div class='del'>-        smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_STATE);</div><div class='del'>-</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));</div><div class='del'>-        smctr_make_corr(dev, tsv, correlator);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_ring_station_version(dev, tsv);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_ring_station_status(dev, tsv);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-        smctr_make_station_id(dev, tsv);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-</div><div class='del'>-        /* Subtract out MVID and MVL which is</div><div class='del'>-         * include in both vl and MAC_HEADER</div><div class='del'>-         */</div><div class='del'>-/*      fcb-&gt;frame_length           = tmf-&gt;vl + sizeof(MAC_HEADER) - 4;</div><div class='del'>-        fcb-&gt;bdb_ptr-&gt;buffer_length = tmf-&gt;vl + sizeof(MAC_HEADER) - 4;</div><div class='del'>-*/</div><div class='del'>-        tmf-&gt;vl = SWAP_BYTES(tmf-&gt;vl);</div><div class='del'>-</div><div class='del'>-        return smctr_trc_send_packet(dev, fcb, MAC_QUEUE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_send_rpt_tx_forward(struct net_device *dev,</div><div class='del'>-        MAC_HEADER *rmf, __u16 tx_fstatus)</div><div class='del'>-{</div><div class='del'>-        MAC_HEADER *tmf;</div><div class='del'>-        MAC_SUB_VECTOR *tsv;</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-</div><div class='del'>-        if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)</div><div class='del'>-		+ S_TRANSMIT_STATUS_CODE)) == (FCBlock *)(-1L))</div><div class='del'>-        {</div><div class='del'>-                return 0;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        tmf 	   = (MAC_HEADER *)fcb-&gt;bdb_ptr-&gt;data_block_ptr;</div><div class='del'>-        tmf-&gt;vc    = RPT_TX_FORWARD;</div><div class='del'>-        tmf-&gt;dc_sc = (rmf-&gt;dc_sc &amp; SC_MASK) &lt;&lt; 4;</div><div class='del'>-        tmf-&gt;vl    = 4;</div><div class='del'>-</div><div class='del'>-        smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_TX_FORWARD);</div><div class='del'>-</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));</div><div class='del'>-        smctr_make_tx_status_code(dev, tsv, tx_fstatus);</div><div class='del'>-</div><div class='del'>-        tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-</div><div class='del'>-        /* Subtract out MVID and MVL which is</div><div class='del'>-         * include in both vl and MAC_HEADER</div><div class='del'>-         */</div><div class='del'>-/*      fcb-&gt;frame_length           = tmf-&gt;vl + sizeof(MAC_HEADER) - 4;</div><div class='del'>-        fcb-&gt;bdb_ptr-&gt;buffer_length = tmf-&gt;vl + sizeof(MAC_HEADER) - 4;</div><div class='del'>-*/</div><div class='del'>-        tmf-&gt;vl = SWAP_BYTES(tmf-&gt;vl);</div><div class='del'>-</div><div class='del'>-        return smctr_trc_send_packet(dev, fcb, MAC_QUEUE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_send_rsp(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 rcode, __u16 correlator)</div><div class='del'>-{</div><div class='del'>-        MAC_HEADER *tmf;</div><div class='del'>-        MAC_SUB_VECTOR *tsv;</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-</div><div class='del'>-        if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)</div><div class='del'>-		+ S_CORRELATOR + S_RESPONSE_CODE)) == (FCBlock *)(-1L))</div><div class='del'>-        {</div><div class='del'>-                return 0;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        tmf 	   = (MAC_HEADER *)fcb-&gt;bdb_ptr-&gt;data_block_ptr;</div><div class='del'>-        tmf-&gt;vc    = RSP;</div><div class='del'>-        tmf-&gt;dc_sc = (rmf-&gt;dc_sc &amp; SC_MASK) &lt;&lt; 4;</div><div class='del'>-        tmf-&gt;vl    = 4;</div><div class='del'>-</div><div class='del'>-        smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RSP);</div><div class='del'>-</div><div class='del'>-        tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));</div><div class='del'>-        smctr_make_corr(dev, tsv, correlator);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_send_rq_init(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        MAC_HEADER *tmf;</div><div class='del'>-        MAC_SUB_VECTOR *tsv;</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-	unsigned int i, count = 0;</div><div class='del'>-	__u16 fstatus;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-        do {</div><div class='del'>-        	if(((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)</div><div class='del'>-			+ S_PRODUCT_INSTANCE_ID + S_UPSTREAM_NEIGHBOR_ADDRESS</div><div class='del'>-			+ S_RING_STATION_VERSION_NUMBER + S_ADDRESS_MODIFER))</div><div class='del'>-			== (FCBlock *)(-1L)))</div><div class='del'>-                {</div><div class='del'>-                        return 0;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                tmf 	   = (MAC_HEADER *)fcb-&gt;bdb_ptr-&gt;data_block_ptr;</div><div class='del'>-                tmf-&gt;vc    = RQ_INIT;</div><div class='del'>-                tmf-&gt;dc_sc = DC_RPS | SC_RS;</div><div class='del'>-                tmf-&gt;vl    = 4;</div><div class='del'>-</div><div class='del'>-                smctr_make_8025_hdr(dev, NULL, tmf, AC_FC_RQ_INIT);</div><div class='del'>-</div><div class='del'>-                tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));</div><div class='del'>-                smctr_make_product_id(dev, tsv);</div><div class='del'>-</div><div class='del'>-                tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-                tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-                smctr_make_upstream_neighbor_addr(dev, tsv);</div><div class='del'>-</div><div class='del'>-                tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-                tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-                smctr_make_ring_station_version(dev, tsv);</div><div class='del'>-</div><div class='del'>-                tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-                tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv-&gt;svl);</div><div class='del'>-                smctr_make_addr_mod(dev, tsv);</div><div class='del'>-</div><div class='del'>-                tmf-&gt;vl += tsv-&gt;svl;</div><div class='del'>-</div><div class='del'>-                /* Subtract out MVID and MVL which is</div><div class='del'>-                 * include in both vl and MAC_HEADER</div><div class='del'>-                 */</div><div class='del'>-/*              fcb-&gt;frame_length           = tmf-&gt;vl + sizeof(MAC_HEADER) - 4;</div><div class='del'>-                fcb-&gt;bdb_ptr-&gt;buffer_length = tmf-&gt;vl + sizeof(MAC_HEADER) - 4;</div><div class='del'>-*/</div><div class='del'>-                tmf-&gt;vl = SWAP_BYTES(tmf-&gt;vl);</div><div class='del'>-</div><div class='del'>-                if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))</div><div class='del'>-                        return err;</div><div class='del'>-</div><div class='del'>-                /* Wait for Transmit to Complete */</div><div class='del'>-      		for(i = 0; i &lt; 10000; i++) </div><div class='del'>-		{</div><div class='del'>-          		if(fcb-&gt;frame_status &amp; FCB_COMMAND_DONE)</div><div class='del'>-              			break;</div><div class='del'>-          		mdelay(1);</div><div class='del'>-      		}</div><div class='del'>-</div><div class='del'>-                /* Check if GOOD frame Tx'ed */</div><div class='del'>-                fstatus = fcb-&gt;frame_status;</div><div class='del'>-</div><div class='del'>-                if(!(fstatus &amp; FCB_COMMAND_DONE))</div><div class='del'>-                        return HARDWARE_FAILED;</div><div class='del'>-</div><div class='del'>-                if(!(fstatus &amp; FCB_TX_STATUS_E))</div><div class='del'>-                        count++;</div><div class='del'>-</div><div class='del'>-                /* De-allocated Tx FCB and Frame Buffer</div><div class='del'>-                 * The FCB must be de-allocated manually if executing with</div><div class='del'>-                 * interrupts disabled, other wise the ISR (LM_Service_Events)</div><div class='del'>-                 * will de-allocate it when the interrupt occurs.</div><div class='del'>-                 */</div><div class='del'>-                tp-&gt;tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;</div><div class='del'>-                smctr_update_tx_chain(dev, fcb, MAC_QUEUE);</div><div class='del'>-        } while(count &lt; 4 &amp;&amp; ((fstatus &amp; FCB_TX_AC_BITS) ^ FCB_TX_AC_BITS));</div><div class='del'>-</div><div class='del'>-	return smctr_join_complete_state(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_send_tx_forward(struct net_device *dev, MAC_HEADER *rmf,</div><div class='del'>-        __u16 *tx_fstatus)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-        unsigned int i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-        /* Check if this is the END POINT of the Transmit Forward Chain. */</div><div class='del'>-        if(rmf-&gt;vl &lt;= 18)</div><div class='del'>-                return 0;</div><div class='del'>-</div><div class='del'>-        /* Allocate Transmit FCB only by requesting 0 bytes</div><div class='del'>-         * of data buffer.</div><div class='del'>-         */</div><div class='del'>-        if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, 0)) == (FCBlock *)(-1L))</div><div class='del'>-                return 0;</div><div class='del'>-</div><div class='del'>-        /* Set pointer to Transmit Frame Buffer to the data</div><div class='del'>-         * portion of the received TX Forward frame, making</div><div class='del'>-         * sure to skip over the Vector Code (vc) and Vector</div><div class='del'>-         * length (vl).</div><div class='del'>-         */</div><div class='del'>-        fcb-&gt;bdb_ptr-&gt;trc_data_block_ptr = TRC_POINTER((__u32)rmf </div><div class='del'>-		+ sizeof(MAC_HEADER) + 2);</div><div class='del'>-        fcb-&gt;bdb_ptr-&gt;data_block_ptr     = (__u16 *)((__u32)rmf </div><div class='del'>-		+ sizeof(MAC_HEADER) + 2);</div><div class='del'>-</div><div class='del'>-        fcb-&gt;frame_length                = rmf-&gt;vl - 4 - 2;</div><div class='del'>-        fcb-&gt;bdb_ptr-&gt;buffer_length      = rmf-&gt;vl - 4 - 2;</div><div class='del'>-</div><div class='del'>-        if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        /* Wait for Transmit to Complete */</div><div class='del'>-   	for(i = 0; i &lt; 10000; i++) </div><div class='del'>-	{</div><div class='del'>-       		if(fcb-&gt;frame_status &amp; FCB_COMMAND_DONE)</div><div class='del'>-           		break;</div><div class='del'>-        	mdelay(1);</div><div class='del'>-   	}</div><div class='del'>-</div><div class='del'>-        /* Check if GOOD frame Tx'ed */</div><div class='del'>-        if(!(fcb-&gt;frame_status &amp; FCB_COMMAND_DONE))</div><div class='del'>-        {</div><div class='del'>-                if((err = smctr_issue_resume_tx_fcb_cmd(dev, MAC_QUEUE)))</div><div class='del'>-                        return err;</div><div class='del'>-</div><div class='del'>-      		for(i = 0; i &lt; 10000; i++) </div><div class='del'>-		{</div><div class='del'>-          		if(fcb-&gt;frame_status &amp; FCB_COMMAND_DONE)</div><div class='del'>-              			break;</div><div class='del'>-        		mdelay(1);</div><div class='del'>-      		}</div><div class='del'>-</div><div class='del'>-                if(!(fcb-&gt;frame_status &amp; FCB_COMMAND_DONE))</div><div class='del'>-                        return HARDWARE_FAILED;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        *tx_fstatus = fcb-&gt;frame_status;</div><div class='del'>-</div><div class='del'>-        return A_FRAME_WAS_FORWARDED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_set_auth_access_pri(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *rsv)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        if(rsv-&gt;svl != S_AUTHORIZED_ACCESS_PRIORITY)</div><div class='del'>-                return E_SUB_VECTOR_LENGTH_ERROR;</div><div class='del'>-</div><div class='del'>-        tp-&gt;authorized_access_priority = (rsv-&gt;svv[0] &lt;&lt; 8 | rsv-&gt;svv[1]);</div><div class='del'>-</div><div class='del'>-        return POSITIVE_ACK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_set_auth_funct_class(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *rsv)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        if(rsv-&gt;svl != S_AUTHORIZED_FUNCTION_CLASS)</div><div class='del'>-                return E_SUB_VECTOR_LENGTH_ERROR;</div><div class='del'>-</div><div class='del'>-        tp-&gt;authorized_function_classes = (rsv-&gt;svv[0] &lt;&lt; 8 | rsv-&gt;svv[1]);</div><div class='del'>-</div><div class='del'>-        return POSITIVE_ACK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_set_corr(struct net_device *dev, MAC_SUB_VECTOR *rsv,</div><div class='del'>-        __u16 *correlator)</div><div class='del'>-{</div><div class='del'>-        if(rsv-&gt;svl != S_CORRELATOR)</div><div class='del'>-                return E_SUB_VECTOR_LENGTH_ERROR;</div><div class='del'>-</div><div class='del'>-        *correlator = (rsv-&gt;svv[0] &lt;&lt; 8 | rsv-&gt;svv[1]);</div><div class='del'>-</div><div class='del'>-        return POSITIVE_ACK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_set_error_timer_value(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *rsv)</div><div class='del'>-{</div><div class='del'>-	__u16 err_tval;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-        if(rsv-&gt;svl != S_ERROR_TIMER_VALUE)</div><div class='del'>-                return E_SUB_VECTOR_LENGTH_ERROR;</div><div class='del'>-</div><div class='del'>-        err_tval = (rsv-&gt;svv[0] &lt;&lt; 8 | rsv-&gt;svv[1])*10;</div><div class='del'>-</div><div class='del'>-        smctr_issue_write_word_cmd(dev, RW_TER_THRESHOLD, &amp;err_tval);</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        return POSITIVE_ACK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_set_frame_forward(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *rsv, __u8 dc_sc)</div><div class='del'>-{</div><div class='del'>-        if((rsv-&gt;svl &lt; 2) || (rsv-&gt;svl &gt; S_FRAME_FORWARD))</div><div class='del'>-                return E_SUB_VECTOR_LENGTH_ERROR;</div><div class='del'>-</div><div class='del'>-        if((dc_sc &amp; DC_MASK) != DC_CRS)</div><div class='del'>-        {</div><div class='del'>-                if(rsv-&gt;svl &gt;= 2 &amp;&amp; rsv-&gt;svl &lt; 20)</div><div class='del'>-			return E_TRANSMIT_FORWARD_INVALID;</div><div class='del'>-</div><div class='del'>-                if((rsv-&gt;svv[0] != 0) || (rsv-&gt;svv[1] != 0))</div><div class='del'>-                        return E_TRANSMIT_FORWARD_INVALID;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return POSITIVE_ACK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_set_local_ring_num(struct net_device *dev,</div><div class='del'>-        MAC_SUB_VECTOR *rsv)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        if(rsv-&gt;svl != S_LOCAL_RING_NUMBER)</div><div class='del'>-                return E_SUB_VECTOR_LENGTH_ERROR;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;ptr_local_ring_num)</div><div class='del'>-                *(__u16 *)(tp-&gt;ptr_local_ring_num) </div><div class='del'>-			= (rsv-&gt;svv[0] &lt;&lt; 8 | rsv-&gt;svv[1]);</div><div class='del'>-</div><div class='del'>-        return POSITIVE_ACK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned short smctr_set_ctrl_attention(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;bic_type == BIC_585_CHIP)</div><div class='del'>-                outb((tp-&gt;trc_mask | HWR_CA), ioaddr + HWR);</div><div class='del'>-        else</div><div class='del'>-        {</div><div class='del'>-                outb((tp-&gt;trc_mask | CSR_CA), ioaddr + CSR);</div><div class='del'>-                outb(tp-&gt;trc_mask, ioaddr + CSR);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void smctr_set_multicast_list(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_set_multicast_list\n", dev-&gt;name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_set_page(struct net_device *dev, __u8 *buf)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        __u8 amask;</div><div class='del'>-        __u32 tptr;</div><div class='del'>-</div><div class='del'>-        tptr = (__u32)buf - (__u32)tp-&gt;ram_access;</div><div class='del'>-        amask = (__u8)((tptr &amp; PR_PAGE_MASK) &gt;&gt; 8);</div><div class='del'>-        outb(amask, dev-&gt;base_addr + PR);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_set_phy_drop(struct net_device *dev, MAC_SUB_VECTOR *rsv)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-        if(rsv-&gt;svl != S_PHYSICAL_DROP)</div><div class='del'>-                return E_SUB_VECTOR_LENGTH_ERROR;</div><div class='del'>-</div><div class='del'>-        smctr_issue_write_byte_cmd(dev, RW_PHYSICAL_DROP_NUMBER, &amp;rsv-&gt;svv[0]);</div><div class='del'>-        if((err = smctr_wait_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        return POSITIVE_ACK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Reset the ring speed to the opposite of what it was. This auto-pilot</div><div class='del'>- * mode requires a complete reset and re-init of the adapter.</div><div class='del'>- */</div><div class='del'>-static int smctr_set_ring_speed(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;media_type == MEDIA_UTP_16)</div><div class='del'>-                tp-&gt;media_type = MEDIA_UTP_4;</div><div class='del'>-        else</div><div class='del'>-                tp-&gt;media_type = MEDIA_UTP_16;</div><div class='del'>-</div><div class='del'>-        smctr_enable_16bit(dev);</div><div class='del'>-</div><div class='del'>-        /* Re-Initialize adapter's internal registers */</div><div class='del'>-        smctr_reset_adapter(dev);</div><div class='del'>-</div><div class='del'>-        if((err = smctr_init_card_real(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        smctr_enable_bic_int(dev);</div><div class='del'>-</div><div class='del'>-        if((err = smctr_issue_enable_int_cmd(dev, TRC_INTERRUPT_ENABLE_MASK)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        smctr_disable_16bit(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_set_rx_look_ahead(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        __u16 sword, rword;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_set_rx_look_ahead_flag\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        tp-&gt;adapter_flags &amp;= ~(FORCED_16BIT_MODE);</div><div class='del'>-        tp-&gt;adapter_flags |= RX_VALID_LOOKAHEAD;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;adapter_bus == BUS_ISA16_TYPE)</div><div class='del'>-        {</div><div class='del'>-                sword = *((__u16 *)(tp-&gt;ram_access));</div><div class='del'>-                *((__u16 *)(tp-&gt;ram_access)) = 0x1234;</div><div class='del'>-</div><div class='del'>-                smctr_disable_16bit(dev);</div><div class='del'>-                rword = *((__u16 *)(tp-&gt;ram_access));</div><div class='del'>-                smctr_enable_16bit(dev);</div><div class='del'>-</div><div class='del'>-                if(rword != 0x1234)</div><div class='del'>-                        tp-&gt;adapter_flags |= FORCED_16BIT_MODE;</div><div class='del'>-</div><div class='del'>-                *((__u16 *)(tp-&gt;ram_access)) = sword;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_set_trc_reset(int ioaddr)</div><div class='del'>-{</div><div class='del'>-        __u8 r;</div><div class='del'>-</div><div class='del'>-        r = inb(ioaddr + MSR);</div><div class='del'>-        outb(MSR_RST | r, ioaddr + MSR);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This function can be called if the adapter is busy or not.</div><div class='del'>- */</div><div class='del'>-static int smctr_setup_single_cmd(struct net_device *dev,</div><div class='del'>-        __u16 command, __u16 subcommand)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int err;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_setup_single_cmd\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        if((err = smctr_wait_while_cbusy(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        if((err = (unsigned int)smctr_wait_cmd(dev)))</div><div class='del'>-                return err;</div><div class='del'>-</div><div class='del'>-        tp-&gt;acb_head-&gt;cmd_done_status   = 0;</div><div class='del'>-        tp-&gt;acb_head-&gt;cmd               = command;</div><div class='del'>-        tp-&gt;acb_head-&gt;subcmd            = subcommand;</div><div class='del'>-</div><div class='del'>-        err = smctr_issue_resume_acb_cmd(dev);</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This function can not be called with the adapter busy.</div><div class='del'>- */</div><div class='del'>-static int smctr_setup_single_cmd_w_data(struct net_device *dev,</div><div class='del'>-        __u16 command, __u16 subcommand)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        tp-&gt;acb_head-&gt;cmd_done_status   = ACB_COMMAND_NOT_DONE;</div><div class='del'>-        tp-&gt;acb_head-&gt;cmd               = command;</div><div class='del'>-        tp-&gt;acb_head-&gt;subcmd            = subcommand;</div><div class='del'>-        tp-&gt;acb_head-&gt;data_offset_lo</div><div class='del'>-                = (__u16)TRC_POINTER(tp-&gt;misc_command_data);</div><div class='del'>-</div><div class='del'>-        return smctr_issue_resume_acb_cmd(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static char *smctr_malloc(struct net_device *dev, __u16 size)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        char *m;</div><div class='del'>-</div><div class='del'>-        m = (char *)(tp-&gt;ram_access + tp-&gt;sh_mem_used);</div><div class='del'>-        tp-&gt;sh_mem_used += (__u32)size;</div><div class='del'>-</div><div class='del'>-        return m;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_status_chg(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_status_chg\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        switch(tp-&gt;status)</div><div class='del'>-        {</div><div class='del'>-                case OPEN:</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                case CLOSED:</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                /* Interrupt driven open() completion. XXX */</div><div class='del'>-                case INITIALIZED:</div><div class='del'>-                        tp-&gt;group_address_0 = 0;</div><div class='del'>-                        tp-&gt;group_address[0] = 0;</div><div class='del'>-                        tp-&gt;group_address[1] = 0;</div><div class='del'>-                        tp-&gt;functional_address_0 = 0;</div><div class='del'>-                        tp-&gt;functional_address[0] = 0;</div><div class='del'>-                        tp-&gt;functional_address[1] = 0;</div><div class='del'>-                        smctr_open_tr(dev);</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                default:</div><div class='del'>-                        printk(KERN_INFO "%s: status change unknown %x\n",</div><div class='del'>-                                dev-&gt;name, tp-&gt;status);</div><div class='del'>-                        break;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_trc_send_packet(struct net_device *dev, FCBlock *fcb,</div><div class='del'>-        __u16 queue)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        int err = 0;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_trc_send_packet\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        fcb-&gt;info = FCB_CHAIN_END | FCB_ENABLE_TFS;</div><div class='del'>-        if(tp-&gt;num_tx_fcbs[queue] != 1)</div><div class='del'>-                fcb-&gt;back_ptr-&gt;info = FCB_INTERRUPT_ENABLE | FCB_ENABLE_TFS;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;tx_queue_status[queue] == NOT_TRANSMITING)</div><div class='del'>-        {</div><div class='del'>-                tp-&gt;tx_queue_status[queue] = TRANSMITING;</div><div class='del'>-                err = smctr_issue_resume_tx_fcb_cmd(dev, queue);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __u16 smctr_tx_complete(struct net_device *dev, __u16 queue)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        __u16 status, err = 0;</div><div class='del'>-        int cstatus;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_tx_complete\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        while((status = tp-&gt;tx_fcb_end[queue]-&gt;frame_status) != SUCCESS)</div><div class='del'>-        {</div><div class='del'>-                if(status &amp; 0x7e00 )</div><div class='del'>-                {</div><div class='del'>-                        err = HARDWARE_FAILED;</div><div class='del'>-                        break;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                if((err = smctr_update_tx_chain(dev, tp-&gt;tx_fcb_end[queue],</div><div class='del'>-                        queue)) != SUCCESS)</div><div class='del'>-                        break;</div><div class='del'>-</div><div class='del'>-                smctr_disable_16bit(dev);</div><div class='del'>-</div><div class='del'>-                if(tp-&gt;mode_bits &amp; UMAC)</div><div class='del'>-                {</div><div class='del'>-                        if(!(status &amp; (FCB_TX_STATUS_AR1 | FCB_TX_STATUS_AR2)))</div><div class='del'>-                                cstatus = NO_SUCH_DESTINATION;</div><div class='del'>-                        else</div><div class='del'>-                        {</div><div class='del'>-                                if(!(status &amp; (FCB_TX_STATUS_CR1 | FCB_TX_STATUS_CR2)))</div><div class='del'>-                                        cstatus = DEST_OUT_OF_RESOURCES;</div><div class='del'>-                                else</div><div class='del'>-                                {</div><div class='del'>-                                        if(status &amp; FCB_TX_STATUS_E)</div><div class='del'>-                                                cstatus = MAX_COLLISIONS;</div><div class='del'>-                                        else</div><div class='del'>-                                                cstatus = SUCCESS;</div><div class='del'>-                                }</div><div class='del'>-                        }</div><div class='del'>-                }</div><div class='del'>-                else</div><div class='del'>-                        cstatus = SUCCESS;</div><div class='del'>-</div><div class='del'>-                if(queue == BUG_QUEUE)</div><div class='del'>-                        err = SUCCESS;</div><div class='del'>-</div><div class='del'>-                smctr_enable_16bit(dev);</div><div class='del'>-                if(err != SUCCESS)</div><div class='del'>-                        break;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned short smctr_tx_move_frame(struct net_device *dev,</div><div class='del'>-        struct sk_buff *skb, __u8 *pbuff, unsigned int bytes)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int ram_usable;</div><div class='del'>-        __u32 flen, len, offset = 0;</div><div class='del'>-        __u8 *frag, *page;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_tx_move_frame\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        ram_usable = ((unsigned int)tp-&gt;ram_usable) &lt;&lt; 10;</div><div class='del'>-        frag       = skb-&gt;data;</div><div class='del'>-        flen       = skb-&gt;len;</div><div class='del'>-</div><div class='del'>-        while(flen &gt; 0 &amp;&amp; bytes &gt; 0)</div><div class='del'>-        {</div><div class='del'>-                smctr_set_page(dev, pbuff);</div><div class='del'>-</div><div class='del'>-                offset = SMC_PAGE_OFFSET(pbuff);</div><div class='del'>-</div><div class='del'>-                if(offset + flen &gt; ram_usable)</div><div class='del'>-                        len = ram_usable - offset;</div><div class='del'>-                else</div><div class='del'>-                        len = flen;</div><div class='del'>-</div><div class='del'>-                if(len &gt; bytes)</div><div class='del'>-                        len = bytes;</div><div class='del'>-</div><div class='del'>-                page = (char *) (offset + tp-&gt;ram_access);</div><div class='del'>-                memcpy(page, frag, len);</div><div class='del'>-</div><div class='del'>-                flen -=len;</div><div class='del'>-                bytes -= len;</div><div class='del'>-                frag += len;</div><div class='del'>-                pbuff += len;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Update the error statistic counters for this adapter. */</div><div class='del'>-static int smctr_update_err_stats(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        struct tr_statistics *tstat = &amp;tp-&gt;MacStat;</div><div class='del'>-</div><div class='del'>-        if(tstat-&gt;internal_errors)</div><div class='del'>-                tstat-&gt;internal_errors</div><div class='del'>-                        += *(tp-&gt;misc_command_data + 0) &amp; 0x00ff;</div><div class='del'>-</div><div class='del'>-        if(tstat-&gt;line_errors)</div><div class='del'>-                tstat-&gt;line_errors += *(tp-&gt;misc_command_data + 0) &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-        if(tstat-&gt;A_C_errors)</div><div class='del'>-                tstat-&gt;A_C_errors += *(tp-&gt;misc_command_data + 1) &amp; 0x00ff;</div><div class='del'>-</div><div class='del'>-        if(tstat-&gt;burst_errors)</div><div class='del'>-                tstat-&gt;burst_errors += *(tp-&gt;misc_command_data + 1) &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-        if(tstat-&gt;abort_delimiters)</div><div class='del'>-                tstat-&gt;abort_delimiters += *(tp-&gt;misc_command_data + 2) &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-        if(tstat-&gt;recv_congest_count)</div><div class='del'>-                tstat-&gt;recv_congest_count</div><div class='del'>-                        += *(tp-&gt;misc_command_data + 3) &amp; 0x00ff;</div><div class='del'>-</div><div class='del'>-        if(tstat-&gt;lost_frames)</div><div class='del'>-                tstat-&gt;lost_frames</div><div class='del'>-                        += *(tp-&gt;misc_command_data + 3) &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-        if(tstat-&gt;frequency_errors)</div><div class='del'>-                tstat-&gt;frequency_errors += *(tp-&gt;misc_command_data + 4) &amp; 0x00ff;</div><div class='del'>-</div><div class='del'>-        if(tstat-&gt;frame_copied_errors)</div><div class='del'>-                 tstat-&gt;frame_copied_errors</div><div class='del'>-                        += *(tp-&gt;misc_command_data + 4) &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-        if(tstat-&gt;token_errors)</div><div class='del'>-                tstat-&gt;token_errors += *(tp-&gt;misc_command_data + 5) &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_update_rx_chain(struct net_device *dev, __u16 queue)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        FCBlock *fcb;</div><div class='del'>-        BDBlock *bdb;</div><div class='del'>-        __u16 size, len;</div><div class='del'>-</div><div class='del'>-        fcb = tp-&gt;rx_fcb_curr[queue];</div><div class='del'>-        len = fcb-&gt;frame_length;</div><div class='del'>-</div><div class='del'>-        fcb-&gt;frame_status = 0;</div><div class='del'>-        fcb-&gt;info = FCB_CHAIN_END;</div><div class='del'>-        fcb-&gt;back_ptr-&gt;info = FCB_WARNING;</div><div class='del'>-</div><div class='del'>-        tp-&gt;rx_fcb_curr[queue] = tp-&gt;rx_fcb_curr[queue]-&gt;next_ptr;</div><div class='del'>-</div><div class='del'>-        /* update RX BDBs */</div><div class='del'>-        size = (len &gt;&gt; RX_BDB_SIZE_SHIFT);</div><div class='del'>-        if(len &amp; RX_DATA_BUFFER_SIZE_MASK)</div><div class='del'>-                size += sizeof(BDBlock);</div><div class='del'>-        size &amp;= (~RX_BDB_SIZE_MASK);</div><div class='del'>-</div><div class='del'>-        /* check if wrap around */</div><div class='del'>-        bdb = (BDBlock *)((__u32)(tp-&gt;rx_bdb_curr[queue]) + (__u32)(size));</div><div class='del'>-        if((__u32)bdb &gt;= (__u32)tp-&gt;rx_bdb_end[queue])</div><div class='del'>-        {</div><div class='del'>-                bdb = (BDBlock *)((__u32)(tp-&gt;rx_bdb_head[queue])</div><div class='del'>-                        + (__u32)(bdb) - (__u32)(tp-&gt;rx_bdb_end[queue]));</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        bdb-&gt;back_ptr-&gt;info = BDB_CHAIN_END;</div><div class='del'>-        tp-&gt;rx_bdb_curr[queue]-&gt;back_ptr-&gt;info = BDB_NOT_CHAIN_END;</div><div class='del'>-        tp-&gt;rx_bdb_curr[queue] = bdb;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_update_tx_chain(struct net_device *dev, FCBlock *fcb,</div><div class='del'>-        __u16 queue)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 20)</div><div class='del'>-                printk(KERN_DEBUG "smctr_update_tx_chain\n");</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;num_tx_fcbs_used[queue] &lt;= 0)</div><div class='del'>-                return HARDWARE_FAILED;</div><div class='del'>-        else</div><div class='del'>-        {</div><div class='del'>-                if(tp-&gt;tx_buff_used[queue] &lt; fcb-&gt;memory_alloc)</div><div class='del'>-                {</div><div class='del'>-                        tp-&gt;tx_buff_used[queue] = 0;</div><div class='del'>-                        return HARDWARE_FAILED;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                tp-&gt;tx_buff_used[queue] -= fcb-&gt;memory_alloc;</div><div class='del'>-</div><div class='del'>-                /* if all transmit buffer are cleared</div><div class='del'>-                 * need to set the tx_buff_curr[] to tx_buff_head[]</div><div class='del'>-                 * otherwise, tx buffer will be segregate and cannot</div><div class='del'>-                 * accommodate and buffer greater than (curr - head) and</div><div class='del'>-                 * (end - curr) since we do not allow wrap around allocation.</div><div class='del'>-                 */</div><div class='del'>-                if(tp-&gt;tx_buff_used[queue] == 0)</div><div class='del'>-                        tp-&gt;tx_buff_curr[queue] = tp-&gt;tx_buff_head[queue];</div><div class='del'>-</div><div class='del'>-                tp-&gt;num_tx_fcbs_used[queue]--;</div><div class='del'>-                fcb-&gt;frame_status = 0;</div><div class='del'>-                tp-&gt;tx_fcb_end[queue] = fcb-&gt;next_ptr;</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-                return 0;</div><div class='del'>-        }</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_wait_cmd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int loop_count = 0x20000;</div><div class='del'>-</div><div class='del'>-        if(smctr_debug &gt; 10)</div><div class='del'>-                printk(KERN_DEBUG "%s: smctr_wait_cmd\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        while(loop_count)</div><div class='del'>-        {</div><div class='del'>-                if(tp-&gt;acb_head-&gt;cmd_done_status &amp; ACB_COMMAND_DONE)</div><div class='del'>-                        break;</div><div class='del'>-		udelay(1);</div><div class='del'>-                loop_count--;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if(loop_count == 0)</div><div class='del'>-                return HARDWARE_FAILED;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;acb_head-&gt;cmd_done_status &amp; 0xff)</div><div class='del'>-                return HARDWARE_FAILED;</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smctr_wait_while_cbusy(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct net_local *tp = netdev_priv(dev);</div><div class='del'>-        unsigned int timeout = 0x20000;</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-        __u8 r;</div><div class='del'>-</div><div class='del'>-        if(tp-&gt;bic_type == BIC_585_CHIP)</div><div class='del'>-        {</div><div class='del'>-                while(timeout)</div><div class='del'>-                {</div><div class='del'>-                        r = inb(ioaddr + HWR);</div><div class='del'>-                        if((r &amp; HWR_CBUSY) == 0)</div><div class='del'>-                                break;</div><div class='del'>-                        timeout--;</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-        else</div><div class='del'>-        {</div><div class='del'>-                while(timeout)</div><div class='del'>-                {</div><div class='del'>-                        r = inb(ioaddr + CSR);</div><div class='del'>-                        if((r &amp; CSR_CBUSY) == 0)</div><div class='del'>-                                break;</div><div class='del'>-                        timeout--;</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if(timeout)</div><div class='del'>-                return 0;</div><div class='del'>-        else</div><div class='del'>-                return HARDWARE_FAILED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='del'>-</div><div class='del'>-static struct net_device* dev_smctr[SMCTR_MAX_ADAPTERS];</div><div class='del'>-static int io[SMCTR_MAX_ADAPTERS];</div><div class='del'>-static int irq[SMCTR_MAX_ADAPTERS];</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_FIRMWARE("tr_smctr.bin");</div><div class='del'>-</div><div class='del'>-module_param_array(io, int, NULL, 0);</div><div class='del'>-module_param_array(irq, int, NULL, 0);</div><div class='del'>-module_param(ringspeed, int, 0);</div><div class='del'>-</div><div class='del'>-static struct net_device * __init setup_card(int n)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = alloc_trdev(sizeof(struct net_local));</div><div class='del'>-	int err;</div><div class='del'>-	</div><div class='del'>-	if (!dev)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	dev-&gt;irq = irq[n];</div><div class='del'>-	err = smctr_probe1(dev, io[n]);</div><div class='del'>-	if (err) </div><div class='del'>-		goto out;</div><div class='del'>-		</div><div class='del'>-	err = register_netdev(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out1;</div><div class='del'>-	return dev;</div><div class='del'>- out1:</div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-	{ struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	  if (tp-&gt;slot_num)</div><div class='del'>-		mca_mark_as_unused(tp-&gt;slot_num);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	release_region(dev-&gt;base_addr, SMCTR_IO_EXTENT);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-out:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	return ERR_PTR(err);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __init init_module(void)</div><div class='del'>-{</div><div class='del'>-        int i, found = 0;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; SMCTR_MAX_ADAPTERS; i++) {</div><div class='del'>-		dev = io[0]? setup_card(i) : smctr_probe(-1);</div><div class='del'>-		if (!IS_ERR(dev)) {</div><div class='del'>-			++found;</div><div class='del'>-			dev_smctr[i] = dev;</div><div class='del'>-		}</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return found ? 0 : -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __exit cleanup_module(void)</div><div class='del'>-{</div><div class='del'>-        int i;</div><div class='del'>-</div><div class='del'>-        for(i = 0; i &lt; SMCTR_MAX_ADAPTERS; i++) {</div><div class='del'>-		struct net_device *dev = dev_smctr[i];</div><div class='del'>-</div><div class='del'>-		if (dev) {</div><div class='del'>-</div><div class='del'>-			unregister_netdev(dev);</div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-			{ struct net_local *tp = netdev_priv(dev);</div><div class='del'>-			if (tp-&gt;slot_num)</div><div class='del'>-				mca_mark_as_unused(tp-&gt;slot_num);</div><div class='del'>-			}</div><div class='del'>-#endif</div><div class='del'>-			release_region(dev-&gt;base_addr, SMCTR_IO_EXTENT);</div><div class='del'>-			if (dev-&gt;irq)</div><div class='del'>-				free_irq(dev-&gt;irq, dev);</div><div class='del'>-</div><div class='del'>-			free_netdev(dev);</div><div class='del'>-		}</div><div class='del'>-        }</div><div class='del'>-}</div><div class='del'>-#endif /* MODULE */</div><div class='head'>diff --git a/drivers/net/tokenring/smctr.h b/drivers/net/tokenring/smctr.h<br/>deleted file mode 100644<br/>index 6e5700ab4fc3..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/smctr.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/smctr.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1585 +0,0 @@</div><div class='del'>-/* smctr.h: SMC Token Ring driver header for Linux</div><div class='del'>- *</div><div class='del'>- * Authors:</div><div class='del'>- *  - Jay Schulist &lt;jschlst@samba.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __LINUX_SMCTR_H</div><div class='del'>-#define __LINUX_SMCTR_H</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-#define MAX_TX_QUEUE 10</div><div class='del'>-</div><div class='del'>-#define SMC_HEADER_SIZE 14</div><div class='del'>-</div><div class='del'>-#define SMC_PAGE_OFFSET(X)          (((unsigned long)(X) - tp-&gt;ram_access) &amp; tp-&gt;page_offset_mask)</div><div class='del'>-</div><div class='del'>-#define INIT            0x0D</div><div class='del'>-#define RQ_ATTCH        0x10</div><div class='del'>-#define RQ_STATE        0x0F</div><div class='del'>-#define RQ_ADDR         0x0E</div><div class='del'>-#define CHG_PARM        0x0C</div><div class='del'>-#define RSP             0x00</div><div class='del'>-#define TX_FORWARD      0x09</div><div class='del'>-</div><div class='del'>-#define AC_FC_DAT	((3&lt;&lt;13) | 1)</div><div class='del'>-#define      DAT             0x07</div><div class='del'>-</div><div class='del'>-#define RPT_NEW_MON     0x25</div><div class='del'>-#define RPT_SUA_CHG     0x26</div><div class='del'>-#define RPT_ACTIVE_ERR  0x28</div><div class='del'>-#define RPT_NN_INCMP    0x27</div><div class='del'>-#define RPT_ERROR       0x29</div><div class='del'>-</div><div class='del'>-#define RQ_INIT         0x20</div><div class='del'>-#define RPT_ATTCH       0x24</div><div class='del'>-#define RPT_STATE       0x23</div><div class='del'>-#define RPT_ADDR        0x22</div><div class='del'>-</div><div class='del'>-#define POSITIVE_ACK                    0x0001</div><div class='del'>-#define A_FRAME_WAS_FORWARDED           0x8888</div><div class='del'>-</div><div class='del'>-#define      GROUP_ADDRESS                   0x2B</div><div class='del'>-#define      PHYSICAL_DROP                   0x0B</div><div class='del'>-#define      AUTHORIZED_ACCESS_PRIORITY      0x07</div><div class='del'>-#define      AUTHORIZED_FUNCTION_CLASS       0x06</div><div class='del'>-#define      FUNCTIONAL_ADDRESS              0x2C</div><div class='del'>-#define      RING_STATION_STATUS             0x29</div><div class='del'>-#define      TRANSMIT_STATUS_CODE            0x2A</div><div class='del'>-#define      IBM_PASS_SOURCE_ADDR    0x01</div><div class='del'>-#define      AC_FC_RPT_TX_FORWARD            ((0&lt;&lt;13) | 0)</div><div class='del'>-#define      AC_FC_RPT_STATE                 ((0&lt;&lt;13) | 0)</div><div class='del'>-#define      AC_FC_RPT_ADDR                  ((0&lt;&lt;13) | 0)</div><div class='del'>-#define      CORRELATOR                      0x09</div><div class='del'>-</div><div class='del'>-#define POSITIVE_ACK                    0x0001          /*             */</div><div class='del'>-#define E_MAC_DATA_INCOMPLETE           0x8001          /* not used    */</div><div class='del'>-#define E_VECTOR_LENGTH_ERROR           0x8002          /*             */</div><div class='del'>-#define E_UNRECOGNIZED_VECTOR_ID        0x8003          /*             */</div><div class='del'>-#define E_INAPPROPRIATE_SOURCE_CLASS    0x8004          /*             */</div><div class='del'>-#define E_SUB_VECTOR_LENGTH_ERROR       0x8005          /*             */</div><div class='del'>-#define E_TRANSMIT_FORWARD_INVALID      0x8006          /* def. by IBM */</div><div class='del'>-#define E_MISSING_SUB_VECTOR            0x8007          /*             */</div><div class='del'>-#define E_SUB_VECTOR_UNKNOWN            0x8008          /*             */</div><div class='del'>-#define E_MAC_HEADER_TOO_LONG           0x8009          /*             */</div><div class='del'>-#define E_FUNCTION_DISABLED             0x800A          /* not used    */</div><div class='del'>-</div><div class='del'>-#define A_FRAME_WAS_FORWARDED           0x8888          /* used by send_TX_FORWARD */</div><div class='del'>-</div><div class='del'>-#define UPSTREAM_NEIGHBOR_ADDRESS       0x02</div><div class='del'>-#define LOCAL_RING_NUMBER               0x03</div><div class='del'>-#define ASSIGN_PHYSICAL_DROP            0x04</div><div class='del'>-#define ERROR_TIMER_VALUE               0x05</div><div class='del'>-#define AUTHORIZED_FUNCTION_CLASS       0x06</div><div class='del'>-#define AUTHORIZED_ACCESS_PRIORITY      0x07</div><div class='del'>-#define CORRELATOR                      0x09</div><div class='del'>-#define PHYSICAL_DROP                   0x0B</div><div class='del'>-#define RESPONSE_CODE                   0x20</div><div class='del'>-#define ADDRESS_MODIFER                 0x21</div><div class='del'>-#define PRODUCT_INSTANCE_ID             0x22</div><div class='del'>-#define RING_STATION_VERSION_NUMBER     0x23</div><div class='del'>-#define WRAP_DATA                       0x26</div><div class='del'>-#define FRAME_FORWARD                   0x27</div><div class='del'>-#define STATION_IDENTIFER               0x28</div><div class='del'>-#define RING_STATION_STATUS             0x29</div><div class='del'>-#define TRANSMIT_STATUS_CODE            0x2A</div><div class='del'>-#define GROUP_ADDRESS                   0x2B</div><div class='del'>-#define FUNCTIONAL_ADDRESS              0x2C</div><div class='del'>-</div><div class='del'>-#define F_NO_SUB_VECTORS_FOUND                  0x0000</div><div class='del'>-#define F_UPSTREAM_NEIGHBOR_ADDRESS             0x0001</div><div class='del'>-#define F_LOCAL_RING_NUMBER                     0x0002</div><div class='del'>-#define F_ASSIGN_PHYSICAL_DROP                  0x0004</div><div class='del'>-#define F_ERROR_TIMER_VALUE                     0x0008</div><div class='del'>-#define F_AUTHORIZED_FUNCTION_CLASS             0x0010</div><div class='del'>-#define F_AUTHORIZED_ACCESS_PRIORITY            0x0020</div><div class='del'>-#define F_CORRELATOR                            0x0040</div><div class='del'>-#define F_PHYSICAL_DROP                         0x0080</div><div class='del'>-#define F_RESPONSE_CODE                         0x0100</div><div class='del'>-#define F_PRODUCT_INSTANCE_ID                   0x0200</div><div class='del'>-#define F_RING_STATION_VERSION_NUMBER           0x0400</div><div class='del'>-#define F_STATION_IDENTIFER                     0x0800</div><div class='del'>-#define F_RING_STATION_STATUS                   0x1000</div><div class='del'>-#define F_GROUP_ADDRESS                         0x2000</div><div class='del'>-#define F_FUNCTIONAL_ADDRESS                    0x4000</div><div class='del'>-#define F_FRAME_FORWARD                         0x8000</div><div class='del'>-</div><div class='del'>-#define R_INIT                                  0x00</div><div class='del'>-#define R_RQ_ATTCH_STATE_ADDR                   0x00</div><div class='del'>-#define R_CHG_PARM                              0x00</div><div class='del'>-#define R_TX_FORWARD                            F_FRAME_FORWARD</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define      UPSTREAM_NEIGHBOR_ADDRESS       0x02</div><div class='del'>-#define      ADDRESS_MODIFER                 0x21</div><div class='del'>-#define      RING_STATION_VERSION_NUMBER     0x23</div><div class='del'>-#define      PRODUCT_INSTANCE_ID             0x22</div><div class='del'>-</div><div class='del'>-#define      RPT_TX_FORWARD  0x2A</div><div class='del'>-</div><div class='del'>-#define AC_FC_INIT                      (3&lt;&lt;13) | 0 /*                     */</div><div class='del'>-#define AC_FC_RQ_INIT                   ((3&lt;&lt;13) | 0) /*                     */</div><div class='del'>-#define AC_FC_RQ_ATTCH                  (3&lt;&lt;13) | 0 /* DC = SC of rx frame */</div><div class='del'>-#define AC_FC_RQ_STATE                  (3&lt;&lt;13) | 0 /* DC = SC of rx frame */</div><div class='del'>-#define AC_FC_RQ_ADDR                   (3&lt;&lt;13) | 0 /* DC = SC of rx frame */</div><div class='del'>-#define AC_FC_CHG_PARM                  (3&lt;&lt;13) | 0 /*                     */</div><div class='del'>-#define AC_FC_RSP                       (0&lt;&lt;13) | 0 /* DC = SC of rx frame */</div><div class='del'>-#define AC_FC_RPT_ATTCH                 (0&lt;&lt;13) | 0</div><div class='del'>-</div><div class='del'>-#define S_UPSTREAM_NEIGHBOR_ADDRESS               6 + 2</div><div class='del'>-#define S_LOCAL_RING_NUMBER                       2 + 2</div><div class='del'>-#define S_ASSIGN_PHYSICAL_DROP                    4 + 2</div><div class='del'>-#define S_ERROR_TIMER_VALUE                       2 + 2</div><div class='del'>-#define S_AUTHORIZED_FUNCTION_CLASS               2 + 2</div><div class='del'>-#define S_AUTHORIZED_ACCESS_PRIORITY              2 + 2</div><div class='del'>-#define S_CORRELATOR                              2 + 2</div><div class='del'>-#define S_PHYSICAL_DROP                           4 + 2</div><div class='del'>-#define S_RESPONSE_CODE                           4 + 2</div><div class='del'>-#define S_ADDRESS_MODIFER                         2 + 2</div><div class='del'>-#define S_PRODUCT_INSTANCE_ID                    18 + 2</div><div class='del'>-#define S_RING_STATION_VERSION_NUMBER            10 + 2</div><div class='del'>-#define S_STATION_IDENTIFER                       6 + 2</div><div class='del'>-#define S_RING_STATION_STATUS                     6 + 2</div><div class='del'>-#define S_GROUP_ADDRESS                           4 + 2</div><div class='del'>-#define S_FUNCTIONAL_ADDRESS                      4 + 2</div><div class='del'>-#define S_FRAME_FORWARD                         252 + 2</div><div class='del'>-#define S_TRANSMIT_STATUS_CODE                    2 + 2</div><div class='del'>-</div><div class='del'>-#define ISB_IMC_RES0                    0x0000  /* */</div><div class='del'>-#define ISB_IMC_MAC_TYPE_3              0x0001  /* MAC_ARC_INDICATE */</div><div class='del'>-#define ISB_IMC_MAC_ERROR_COUNTERS      0x0002  /* */</div><div class='del'>-#define ISB_IMC_RES1                    0x0003  /* */</div><div class='del'>-#define ISB_IMC_MAC_TYPE_2              0x0004  /* QUE_MAC_INDICATE */</div><div class='del'>-#define ISB_IMC_TX_FRAME                0x0005  /* */</div><div class='del'>-#define ISB_IMC_END_OF_TX_QUEUE         0x0006  /* */</div><div class='del'>-#define ISB_IMC_NON_MAC_RX_RESOURCE     0x0007  /* */</div><div class='del'>-#define ISB_IMC_MAC_RX_RESOURCE         0x0008  /* */</div><div class='del'>-#define ISB_IMC_NON_MAC_RX_FRAME        0x0009  /* */</div><div class='del'>-#define ISB_IMC_MAC_RX_FRAME            0x000A  /* */</div><div class='del'>-#define ISB_IMC_TRC_FIFO_STATUS         0x000B  /* */</div><div class='del'>-#define ISB_IMC_COMMAND_STATUS          0x000C  /* */</div><div class='del'>-#define ISB_IMC_MAC_TYPE_1              0x000D  /* Self Removed */</div><div class='del'>-#define ISB_IMC_TRC_INTRNL_TST_STATUS   0x000E  /* */</div><div class='del'>-#define ISB_IMC_RES2                    0x000F  /* */</div><div class='del'>-</div><div class='del'>-#define NON_MAC_RX_RESOURCE_BW          0x10    /* shifted right 8 bits */</div><div class='del'>-#define NON_MAC_RX_RESOURCE_FW          0x20    /* shifted right 8 bits */</div><div class='del'>-#define NON_MAC_RX_RESOURCE_BE          0x40    /* shifted right 8 bits */</div><div class='del'>-#define NON_MAC_RX_RESOURCE_FE          0x80    /* shifted right 8 bits */</div><div class='del'>-#define RAW_NON_MAC_RX_RESOURCE_BW      0x1000  /* */</div><div class='del'>-#define RAW_NON_MAC_RX_RESOURCE_FW      0x2000  /* */</div><div class='del'>-#define RAW_NON_MAC_RX_RESOURCE_BE      0x4000  /* */</div><div class='del'>-#define RAW_NON_MAC_RX_RESOURCE_FE      0x8000  /* */</div><div class='del'>-</div><div class='del'>-#define MAC_RX_RESOURCE_BW              0x10    /* shifted right 8 bits */</div><div class='del'>-#define MAC_RX_RESOURCE_FW              0x20    /* shifted right 8 bits */</div><div class='del'>-#define MAC_RX_RESOURCE_BE              0x40    /* shifted right 8 bits */</div><div class='del'>-#define MAC_RX_RESOURCE_FE              0x80    /* shifted right 8 bits */</div><div class='del'>-#define RAW_MAC_RX_RESOURCE_BW          0x1000  /* */</div><div class='del'>-#define RAW_MAC_RX_RESOURCE_FW          0x2000  /* */</div><div class='del'>-#define RAW_MAC_RX_RESOURCE_BE          0x4000  /* */</div><div class='del'>-#define RAW_MAC_RX_RESOURCE_FE          0x8000  /* */</div><div class='del'>-</div><div class='del'>-#define TRC_FIFO_STATUS_TX_UNDERRUN     0x40    /* shifted right 8 bits */</div><div class='del'>-#define TRC_FIFO_STATUS_RX_OVERRUN      0x80    /* shifted right 8 bits */</div><div class='del'>-#define RAW_TRC_FIFO_STATUS_TX_UNDERRUN 0x4000  /* */</div><div class='del'>-#define RAW_TRC_FIFO_STATUS_RX_OVERRUN  0x8000  /* */</div><div class='del'>-</div><div class='del'>-#define       CSR_CLRTINT             0x08</div><div class='del'>-</div><div class='del'>-#define MSB(X)                  ((__u8)((__u16) X &gt;&gt; 8))</div><div class='del'>-#define LSB(X)                  ((__u8)((__u16) X &amp;  0xff))</div><div class='del'>-</div><div class='del'>-#define AC_FC_LOBE_MEDIA_TEST           ((3&lt;&lt;13) | 0)</div><div class='del'>-#define S_WRAP_DATA                             248 + 2 /* 500 + 2 */</div><div class='del'>-#define      WRAP_DATA                       0x26</div><div class='del'>-#define LOBE_MEDIA_TEST 0x08</div><div class='del'>-</div><div class='del'>-/* Destination Class (dc) */</div><div class='del'>-</div><div class='del'>-#define DC_MASK         0xF0</div><div class='del'>-#define DC_RS           0x00</div><div class='del'>-#define DC_CRS          0x40</div><div class='del'>-#define DC_RPS          0x50</div><div class='del'>-#define DC_REM          0x60</div><div class='del'>-</div><div class='del'>-/* Source Classes (sc) */</div><div class='del'>-</div><div class='del'>-#define SC_MASK         0x0F</div><div class='del'>-#define SC_RS           0x00</div><div class='del'>-#define SC_CRS          0x04</div><div class='del'>-#define SC_RPS          0x05</div><div class='del'>-#define SC_REM          0x06</div><div class='del'>-</div><div class='del'>-#define PR		0x11</div><div class='del'>-#define PR_PAGE_MASK	0x0C000</div><div class='del'>-</div><div class='del'>-#define MICROCHANNEL	0x0008</div><div class='del'>-#define INTERFACE_CHIP	0x0010</div><div class='del'>-#define BOARD_16BIT	0x0040</div><div class='del'>-#define PAGED_RAM	0x0080</div><div class='del'>-#define WD8115TA	(TOKEN_MEDIA | MICROCHANNEL | INTERFACE_CHIP | PAGED_RAM)</div><div class='del'>-#define WD8115T		(TOKEN_MEDIA | INTERFACE_CHIP | BOARD_16BIT | PAGED_RAM)</div><div class='del'>-</div><div class='del'>-#define BRD_ID_8316	0x50</div><div class='del'>-</div><div class='del'>-#define r587_SER	0x001</div><div class='del'>-#define SER_DIN		0x80</div><div class='del'>-#define SER_DOUT	0x40</div><div class='del'>-#define SER_CLK		0x20</div><div class='del'>-#define SER_ECS		0x10</div><div class='del'>-#define SER_E806	0x08</div><div class='del'>-#define SER_PNP		0x04</div><div class='del'>-#define SER_BIO		0x02</div><div class='del'>-#define SER_16B		0x01</div><div class='del'>-</div><div class='del'>-#define r587_IDR	0x004</div><div class='del'>-#define IDR_IRQ_MASK	0x0F0</div><div class='del'>-#define IDR_DCS_MASK	0x007</div><div class='del'>-#define IDR_RWS		0x008</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define r587_BIO	0x003</div><div class='del'>-#define BIO_ENB		0x080</div><div class='del'>-#define BIO_MASK	0x03F</div><div class='del'>-</div><div class='del'>-#define r587_PCR	0x005</div><div class='del'>-#define PCR_RAMS	0x040</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define NUM_ADDR_BITS	8</div><div class='del'>-</div><div class='del'>-#define ISA_MAX_ADDRESS		0x00ffffff</div><div class='del'>-</div><div class='del'>-#define SMCTR_MAX_ADAPTERS	7</div><div class='del'>-</div><div class='del'>-#define MC_TABLE_ENTRIES      16</div><div class='del'>-</div><div class='del'>-#define MAXFRAGMENTS          32</div><div class='del'>-</div><div class='del'>-#define CHIP_REV_MASK         0x3000</div><div class='del'>-</div><div class='del'>-#define MAX_TX_QS             8</div><div class='del'>-#define NUM_TX_QS_USED        3</div><div class='del'>-</div><div class='del'>-#define MAX_RX_QS             2</div><div class='del'>-#define NUM_RX_QS_USED        2</div><div class='del'>-</div><div class='del'>-#define INTEL_DATA_FORMAT	0x4000</div><div class='del'>-#define INTEL_ADDRESS_POINTER_FORMAT	0x8000</div><div class='del'>-#define PAGE_POINTER(X)		((((unsigned long)(X) - tp-&gt;ram_access) &amp; tp-&gt;page_offset_mask) + tp-&gt;ram_access)</div><div class='del'>-#define SWAP_WORDS(X)		(((X &amp; 0xFFFF) &lt;&lt; 16) | (X &gt;&gt; 16))</div><div class='del'>-</div><div class='del'>-#define INTERFACE_CHIP          0x0010          /* Soft Config Adapter */</div><div class='del'>-#define ADVANCED_FEATURES       0x0020          /* Adv. netw. interface features */</div><div class='del'>-#define BOARD_16BIT             0x0040          /* 16 bit capability */</div><div class='del'>-#define PAGED_RAM               0x0080          /* Adapter has paged RAM */</div><div class='del'>-</div><div class='del'>-#define PAGED_ROM               0x0100          /* Adapter has paged ROM */</div><div class='del'>-</div><div class='del'>-#define RAM_SIZE_UNKNOWN        0x0000          /* Unknown RAM size */</div><div class='del'>-#define RAM_SIZE_0K             0x0001          /* 0K  RAM */</div><div class='del'>-#define RAM_SIZE_8K             0x0002          /* 8k  RAM */</div><div class='del'>-#define RAM_SIZE_16K            0x0003          /* 16k RAM */</div><div class='del'>-#define RAM_SIZE_32K            0x0004          /* 32k RAM */</div><div class='del'>-#define RAM_SIZE_64K            0x0005          /* 64k RAM */</div><div class='del'>-#define RAM_SIZE_RESERVED_6     0x0006          /* Reserved RAM size */</div><div class='del'>-#define RAM_SIZE_RESERVED_7     0x0007          /* Reserved RAM size */</div><div class='del'>-#define RAM_SIZE_MASK           0x0007          /* Isolates RAM Size */</div><div class='del'>-</div><div class='del'>-#define TOKEN_MEDIA           0x0005</div><div class='del'>-</div><div class='del'>-#define BID_REG_0       0x00</div><div class='del'>-#define BID_REG_1       0x01</div><div class='del'>-#define BID_REG_2       0x02</div><div class='del'>-#define BID_REG_3       0x03</div><div class='del'>-#define BID_REG_4       0x04</div><div class='del'>-#define BID_REG_5       0x05</div><div class='del'>-#define BID_REG_6       0x06</div><div class='del'>-#define BID_REG_7       0x07</div><div class='del'>-#define BID_LAR_0       0x08</div><div class='del'>-#define BID_LAR_1       0x09</div><div class='del'>-#define BID_LAR_2       0x0A</div><div class='del'>-#define BID_LAR_3       0x0B</div><div class='del'>-#define BID_LAR_4       0x0C</div><div class='del'>-#define BID_LAR_5       0x0D</div><div class='del'>-</div><div class='del'>-#define BID_BOARD_ID_BYTE       0x0E</div><div class='del'>-#define BID_CHCKSM_BYTE         0x0F</div><div class='del'>-#define BID_LAR_OFFSET          0x08  </div><div class='del'>-</div><div class='del'>-#define BID_MSZ_583_BIT         0x08</div><div class='del'>-#define BID_SIXTEEN_BIT_BIT     0x01</div><div class='del'>-</div><div class='del'>-#define BID_BOARD_REV_MASK      0x1E</div><div class='del'>-</div><div class='del'>-#define BID_MEDIA_TYPE_BIT      0x01</div><div class='del'>-#define BID_SOFT_CONFIG_BIT     0x20</div><div class='del'>-#define BID_RAM_SIZE_BIT        0x40</div><div class='del'>-#define BID_BUS_TYPE_BIT        0x80</div><div class='del'>-</div><div class='del'>-#define BID_CR          0x10</div><div class='del'>-</div><div class='del'>-#define BID_TXP         0x04            /* Transmit Packet Command */</div><div class='del'>-</div><div class='del'>-#define BID_TCR_DIFF    0x0D    /* Transmit Configuration Register */</div><div class='del'>-</div><div class='del'>-#define BID_TCR_VAL     0x18            /* Value to Test 8390 or 690 */</div><div class='del'>-#define BID_PS0         0x00            /* Register Page Select 0 */</div><div class='del'>-#define BID_PS1         0x40            /* Register Page Select 1 */</div><div class='del'>-#define BID_PS2         0x80            /* Register Page Select 2 */</div><div class='del'>-#define BID_PS_MASK     0x3F            /* For Masking Off Page Select Bits */</div><div class='del'>-</div><div class='del'>-#define BID_EEPROM_0                    0x08</div><div class='del'>-#define BID_EEPROM_1                    0x09</div><div class='del'>-#define BID_EEPROM_2                    0x0A</div><div class='del'>-#define BID_EEPROM_3                    0x0B</div><div class='del'>-#define BID_EEPROM_4                    0x0C</div><div class='del'>-#define BID_EEPROM_5                    0x0D</div><div class='del'>-#define BID_EEPROM_6                    0x0E</div><div class='del'>-#define BID_EEPROM_7                    0x0F</div><div class='del'>-</div><div class='del'>-#define BID_OTHER_BIT                   0x02</div><div class='del'>-#define BID_ICR_MASK                    0x0C</div><div class='del'>-#define BID_EAR_MASK                    0x0F</div><div class='del'>-#define BID_ENGR_PAGE                   0x0A0</div><div class='del'>-#define BID_RLA                         0x10</div><div class='del'>-#define BID_EA6                         0x80</div><div class='del'>-#define BID_RECALL_DONE_MASK            0x10</div><div class='del'>-#define BID_BID_EEPROM_OVERRIDE         0xFFB0</div><div class='del'>-#define BID_EXTRA_EEPROM_OVERRIDE       0xFFD0</div><div class='del'>-#define BID_EEPROM_MEDIA_MASK           0x07</div><div class='del'>-#define BID_STARLAN_TYPE                0x00</div><div class='del'>-#define BID_ETHERNET_TYPE               0x01</div><div class='del'>-#define BID_TP_TYPE                     0x02</div><div class='del'>-#define BID_EW_TYPE                     0x03</div><div class='del'>-#define BID_TOKEN_RING_TYPE             0x04</div><div class='del'>-#define BID_UTP2_TYPE                   0x05</div><div class='del'>-#define BID_EEPROM_IRQ_MASK             0x18</div><div class='del'>-#define BID_PRIMARY_IRQ                 0x00</div><div class='del'>-#define BID_ALTERNATE_IRQ_1             0x08</div><div class='del'>-#define BID_ALTERNATE_IRQ_2             0x10</div><div class='del'>-#define BID_ALTERNATE_IRQ_3             0x18</div><div class='del'>-#define BID_EEPROM_RAM_SIZE_MASK        0xE0</div><div class='del'>-#define BID_EEPROM_RAM_SIZE_RES1        0x00</div><div class='del'>-#define BID_EEPROM_RAM_SIZE_RES2        0x20</div><div class='del'>-#define BID_EEPROM_RAM_SIZE_8K          0x40</div><div class='del'>-#define BID_EEPROM_RAM_SIZE_16K         0x60</div><div class='del'>-#define BID_EEPROM_RAM_SIZE_32K         0x80</div><div class='del'>-#define BID_EEPROM_RAM_SIZE_64K         0xA0</div><div class='del'>-#define BID_EEPROM_RAM_SIZE_RES3        0xC0</div><div class='del'>-#define BID_EEPROM_RAM_SIZE_RES4        0xE0</div><div class='del'>-#define BID_EEPROM_BUS_TYPE_MASK        0x07</div><div class='del'>-#define BID_EEPROM_BUS_TYPE_AT          0x00</div><div class='del'>-#define BID_EEPROM_BUS_TYPE_MCA         0x01</div><div class='del'>-#define BID_EEPROM_BUS_TYPE_EISA        0x02</div><div class='del'>-#define BID_EEPROM_BUS_TYPE_NEC         0x03</div><div class='del'>-#define BID_EEPROM_BUS_SIZE_MASK        0x18</div><div class='del'>-#define BID_EEPROM_BUS_SIZE_8BIT        0x00</div><div class='del'>-#define BID_EEPROM_BUS_SIZE_16BIT       0x08</div><div class='del'>-#define BID_EEPROM_BUS_SIZE_32BIT       0x10</div><div class='del'>-#define BID_EEPROM_BUS_SIZE_64BIT       0x18</div><div class='del'>-#define BID_EEPROM_BUS_MASTER           0x20</div><div class='del'>-#define BID_EEPROM_RAM_PAGING           0x40</div><div class='del'>-#define BID_EEPROM_ROM_PAGING           0x80</div><div class='del'>-#define BID_EEPROM_PAGING_MASK          0xC0</div><div class='del'>-#define BID_EEPROM_LOW_COST             0x08</div><div class='del'>-#define BID_EEPROM_IO_MAPPED            0x10</div><div class='del'>-#define BID_EEPROM_HMI                  0x01</div><div class='del'>-#define BID_EEPROM_AUTO_MEDIA_DETECT    0x01</div><div class='del'>-#define BID_EEPROM_CHIP_REV_MASK        0x0C</div><div class='del'>-</div><div class='del'>-#define BID_EEPROM_LAN_ADDR             0x30</div><div class='del'>-</div><div class='del'>-#define BID_EEPROM_MEDIA_OPTION         0x54</div><div class='del'>-#define BID_EEPROM_MEDIA_UTP            0x01</div><div class='del'>-#define BID_EEPROM_4MB_RING             0x08</div><div class='del'>-#define BID_EEPROM_16MB_RING            0x10</div><div class='del'>-#define BID_EEPROM_MEDIA_STP            0x40</div><div class='del'>-</div><div class='del'>-#define BID_EEPROM_MISC_DATA            0x56</div><div class='del'>-#define BID_EEPROM_EARLY_TOKEN_RELEASE  0x02</div><div class='del'>-</div><div class='del'>-#define CNFG_ID_8003E           0x6fc0</div><div class='del'>-#define CNFG_ID_8003S           0x6fc1</div><div class='del'>-#define CNFG_ID_8003W           0x6fc2</div><div class='del'>-#define CNFG_ID_8115TRA         0x6ec6</div><div class='del'>-#define CNFG_ID_8013E           0x61C8</div><div class='del'>-#define CNFG_ID_8013W           0x61C9</div><div class='del'>-#define CNFG_ID_BISTRO03E       0xEFE5</div><div class='del'>-#define CNFG_ID_BISTRO13E       0xEFD5</div><div class='del'>-#define CNFG_ID_BISTRO13W       0xEFD4</div><div class='del'>-#define CNFG_MSR_583    0x0</div><div class='del'>-#define CNFG_ICR_583    0x1</div><div class='del'>-#define CNFG_IAR_583    0x2</div><div class='del'>-#define CNFG_BIO_583    0x3</div><div class='del'>-#define CNFG_EAR_583    0x3</div><div class='del'>-#define CNFG_IRR_583    0x4</div><div class='del'>-#define CNFG_LAAR_584   0x5</div><div class='del'>-#define CNFG_GP2                0x7</div><div class='del'>-#define CNFG_LAAR_MASK          0x1F</div><div class='del'>-#define CNFG_LAAR_ZWS           0x20</div><div class='del'>-#define CNFG_LAAR_L16E          0x40</div><div class='del'>-#define CNFG_ICR_IR2_584        0x04</div><div class='del'>-#define CNFG_ICR_MASK       0x08</div><div class='del'>-#define CNFG_ICR_MSZ        0x08</div><div class='del'>-#define CNFG_ICR_RLA        0x10</div><div class='del'>-#define CNFG_ICR_STO        0x80</div><div class='del'>-#define CNFG_IRR_IRQS           0x60</div><div class='del'>-#define CNFG_IRR_IEN            0x80</div><div class='del'>-#define CNFG_IRR_ZWS            0x01</div><div class='del'>-#define CNFG_GP2_BOOT_NIBBLE    0x0F</div><div class='del'>-#define CNFG_IRR_OUT2       0x04</div><div class='del'>-#define CNFG_IRR_OUT1       0x02</div><div class='del'>-</div><div class='del'>-#define CNFG_SIZE_8KB           8</div><div class='del'>-#define CNFG_SIZE_16KB          16</div><div class='del'>-#define CNFG_SIZE_32KB          32</div><div class='del'>-#define CNFG_SIZE_64KB          64</div><div class='del'>-#define CNFG_SIZE_128KB     128</div><div class='del'>-#define CNFG_SIZE_256KB     256</div><div class='del'>-#define ROM_DISABLE             0x0</div><div class='del'>-</div><div class='del'>-#define CNFG_SLOT_ENABLE_BIT    0x08</div><div class='del'>-</div><div class='del'>-#define CNFG_POS_CONTROL_REG    0x096</div><div class='del'>-#define CNFG_POS_REG0           0x100</div><div class='del'>-#define CNFG_POS_REG1           0x101</div><div class='del'>-#define CNFG_POS_REG2           0x102</div><div class='del'>-#define CNFG_POS_REG3           0x103</div><div class='del'>-#define CNFG_POS_REG4           0x104</div><div class='del'>-#define CNFG_POS_REG5           0x105</div><div class='del'>-</div><div class='del'>-#define CNFG_ADAPTER_TYPE_MASK  0x0e</div><div class='del'>-</div><div class='del'>-#define SLOT_16BIT              0x0008</div><div class='del'>-#define INTERFACE_5X3_CHIP      0x0000          /* 0000 = 583 or 593 chips */</div><div class='del'>-#define NIC_690_BIT                     0x0010          /* NIC is 690 */</div><div class='del'>-#define ALTERNATE_IRQ_BIT       0x0020          /* Alternate IRQ is used */</div><div class='del'>-#define INTERFACE_584_CHIP      0x0040          /* 0001 = 584 chip */</div><div class='del'>-#define INTERFACE_594_CHIP      0x0080          /* 0010 = 594 chip */</div><div class='del'>-#define INTERFACE_585_CHIP      0x0100          /* 0100 = 585/790 chip */</div><div class='del'>-#define INTERFACE_CHIP_MASK     0x03C0          /* Isolates Intfc Chip Type */</div><div class='del'>-</div><div class='del'>-#define BOARD_16BIT             0x0040</div><div class='del'>-#define NODE_ADDR_CKSUM 	0xEE</div><div class='del'>-#define BRD_ID_8115T    	0x04</div><div class='del'>-</div><div class='del'>-#define NIC_825_BIT             0x0400          /* TRC 83C825 NIC */</div><div class='del'>-#define NIC_790_BIT             0x0800          /* NIC is 83C790 Ethernet */</div><div class='del'>-</div><div class='del'>-#define CHIP_REV_MASK           0x3000</div><div class='del'>-</div><div class='del'>-#define HWR_CBUSY			0x02</div><div class='del'>-#define HWR_CA				0x01</div><div class='del'>-</div><div class='del'>-#define MAC_QUEUE                       0</div><div class='del'>-#define NON_MAC_QUEUE                   1</div><div class='del'>-#define BUG_QUEUE                       2       /* NO RECEIVE QUEUE, ONLY TX */</div><div class='del'>-</div><div class='del'>-#define NUM_MAC_TX_FCBS                 8</div><div class='del'>-#define NUM_MAC_TX_BDBS                 NUM_MAC_TX_FCBS</div><div class='del'>-#define NUM_MAC_RX_FCBS                 7</div><div class='del'>-#define NUM_MAC_RX_BDBS                 8</div><div class='del'>-</div><div class='del'>-#define NUM_NON_MAC_TX_FCBS             6</div><div class='del'>-#define NUM_NON_MAC_TX_BDBS             NUM_NON_MAC_TX_FCBS</div><div class='del'>-</div><div class='del'>-#define NUM_NON_MAC_RX_BDBS             0       /* CALCULATED DYNAMICALLY */</div><div class='del'>-</div><div class='del'>-#define NUM_BUG_TX_FCBS                 8</div><div class='del'>-#define NUM_BUG_TX_BDBS                 NUM_BUG_TX_FCBS</div><div class='del'>-</div><div class='del'>-#define MAC_TX_BUFFER_MEMORY            1024</div><div class='del'>-#define NON_MAC_TX_BUFFER_MEMORY        (20 * 1024)</div><div class='del'>-#define BUG_TX_BUFFER_MEMORY            (NUM_BUG_TX_FCBS * 32)</div><div class='del'>-</div><div class='del'>-#define RX_BUFFER_MEMORY                0       /* CALCULATED DYNAMICALLY */</div><div class='del'>-#define RX_DATA_BUFFER_SIZE             256</div><div class='del'>-#define RX_BDB_SIZE_SHIFT               3       /* log2(RX_DATA_BUFFER_SIZE)-log2(sizeof(BDBlock)) */</div><div class='del'>-#define RX_BDB_SIZE_MASK                (sizeof(BDBlock) - 1)</div><div class='del'>-#define RX_DATA_BUFFER_SIZE_MASK        (RX_DATA_BUFFER_SIZE-1)</div><div class='del'>-</div><div class='del'>-#define NUM_OF_INTERRUPTS               0x20</div><div class='del'>-</div><div class='del'>-#define NOT_TRANSMITING                 0</div><div class='del'>-#define TRANSMITING			1</div><div class='del'>-</div><div class='del'>-#define TRC_INTERRUPT_ENABLE_MASK       0x7FF6</div><div class='del'>-</div><div class='del'>-#define UCODE_VERSION                   0x58</div><div class='del'>-</div><div class='del'>-#define UCODE_SIZE_OFFSET               0x0000  /* WORD */</div><div class='del'>-#define UCODE_CHECKSUM_OFFSET           0x0002  /* WORD */</div><div class='del'>-#define UCODE_VERSION_OFFSET            0x0004  /* BYTE */</div><div class='del'>-</div><div class='del'>-#define CS_RAM_SIZE                     0X2000</div><div class='del'>-#define CS_RAM_CHECKSUM_OFFSET          0x1FFE  /* WORD 1FFE(MSB)-1FFF(LSB)*/</div><div class='del'>-#define CS_RAM_VERSION_OFFSET           0x1FFC  /* WORD 1FFC(MSB)-1FFD(LSB)*/</div><div class='del'>-</div><div class='del'>-#define MISC_DATA_SIZE                  128</div><div class='del'>-#define NUM_OF_ACBS                     1</div><div class='del'>-</div><div class='del'>-#define ACB_COMMAND_NOT_DONE            0x0000  /* Init, command not done */</div><div class='del'>-#define ACB_COMMAND_DONE                0x8000  /* TRC says command done */</div><div class='del'>-#define ACB_COMMAND_STATUS_MASK         0x00FF  /* low byte is status */</div><div class='del'>-#define ACB_COMMAND_SUCCESSFUL          0x0000  /* means cmd was successful */</div><div class='del'>-#define ACB_NOT_CHAIN_END               0x0000  /* tell TRC more CBs in chain */</div><div class='del'>-#define ACB_CHAIN_END                   0x8000  /* tell TRC last CB in chain */</div><div class='del'>-#define ACB_COMMAND_NO_INTERRUPT        0x0000  /* tell TRC no INT after CB */</div><div class='del'>-#define ACB_COMMAND_INTERRUPT           0x2000  /* tell TRC to INT after CB */</div><div class='del'>-#define ACB_SUB_CMD_NOP                 0x0000</div><div class='del'>-#define ACB_CMD_HIC_NOP                 0x0080</div><div class='del'>-#define ACB_CMD_MCT_NOP                 0x0000</div><div class='del'>-#define ACB_CMD_MCT_TEST                0x0001</div><div class='del'>-#define ACB_CMD_HIC_TEST                0x0081</div><div class='del'>-#define ACB_CMD_INSERT                  0x0002</div><div class='del'>-#define ACB_CMD_REMOVE                  0x0003</div><div class='del'>-#define ACB_CMD_MCT_WRITE_VALUE         0x0004</div><div class='del'>-#define ACB_CMD_HIC_WRITE_VALUE         0x0084</div><div class='del'>-#define ACB_CMD_MCT_READ_VALUE          0x0005</div><div class='del'>-#define ACB_CMD_HIC_READ_VALUE          0x0085</div><div class='del'>-#define ACB_CMD_INIT_TX_RX              0x0086</div><div class='del'>-#define ACB_CMD_INIT_TRC_TIMERS         0x0006</div><div class='del'>-#define ACB_CMD_READ_TRC_STATUS         0x0007</div><div class='del'>-#define ACB_CMD_CHANGE_JOIN_STATE       0x0008</div><div class='del'>-#define ACB_CMD_RESERVED_9              0x0009</div><div class='del'>-#define ACB_CMD_RESERVED_A              0x000A</div><div class='del'>-#define ACB_CMD_RESERVED_B              0x000B</div><div class='del'>-#define ACB_CMD_RESERVED_C              0x000C</div><div class='del'>-#define ACB_CMD_RESERVED_D              0x000D</div><div class='del'>-#define ACB_CMD_RESERVED_E              0x000E</div><div class='del'>-#define ACB_CMD_RESERVED_F              0x000F</div><div class='del'>-</div><div class='del'>-#define TRC_MAC_REGISTERS_TEST          0x0000</div><div class='del'>-#define TRC_INTERNAL_LOOPBACK           0x0001</div><div class='del'>-#define TRC_TRI_LOOPBACK                0x0002</div><div class='del'>-#define TRC_INTERNAL_ROM_TEST           0x0003</div><div class='del'>-#define TRC_LOBE_MEDIA_TEST             0x0004</div><div class='del'>-#define TRC_ANALOG_TEST                 0x0005</div><div class='del'>-#define TRC_HOST_INTERFACE_REG_TEST     0x0003</div><div class='del'>-</div><div class='del'>-#define TEST_DMA_1                      0x0000</div><div class='del'>-#define TEST_DMA_2                      0x0001</div><div class='del'>-#define TEST_MCT_ROM                    0x0002</div><div class='del'>-#define HIC_INTERNAL_DIAG               0x0003</div><div class='del'>-</div><div class='del'>-#define ABORT_TRANSMIT_PRIORITY_0       0x0001</div><div class='del'>-#define ABORT_TRANSMIT_PRIORITY_1       0x0002</div><div class='del'>-#define ABORT_TRANSMIT_PRIORITY_2       0x0004</div><div class='del'>-#define ABORT_TRANSMIT_PRIORITY_3       0x0008</div><div class='del'>-#define ABORT_TRANSMIT_PRIORITY_4       0x0010</div><div class='del'>-#define ABORT_TRANSMIT_PRIORITY_5       0x0020</div><div class='del'>-#define ABORT_TRANSMIT_PRIORITY_6       0x0040</div><div class='del'>-#define ABORT_TRANSMIT_PRIORITY_7       0x0080</div><div class='del'>-</div><div class='del'>-#define TX_PENDING_PRIORITY_0           0x0001</div><div class='del'>-#define TX_PENDING_PRIORITY_1           0x0002</div><div class='del'>-#define TX_PENDING_PRIORITY_2           0x0004</div><div class='del'>-#define TX_PENDING_PRIORITY_3           0x0008</div><div class='del'>-#define TX_PENDING_PRIORITY_4           0x0010</div><div class='del'>-#define TX_PENDING_PRIORITY_5           0x0020</div><div class='del'>-#define TX_PENDING_PRIORITY_6           0x0040</div><div class='del'>-#define TX_PENDING_PRIORITY_7           0x0080</div><div class='del'>-</div><div class='del'>-#define FCB_FRAME_LENGTH                0x100</div><div class='del'>-#define FCB_COMMAND_DONE                0x8000  /* FCB Word 0 */</div><div class='del'>-#define FCB_NOT_CHAIN_END               0x0000  /* FCB Word 1 */</div><div class='del'>-#define FCB_CHAIN_END                   0x8000</div><div class='del'>-#define FCB_NO_WARNING                  0x0000</div><div class='del'>-#define FCB_WARNING                     0x4000</div><div class='del'>-#define FCB_INTERRUPT_DISABLE           0x0000</div><div class='del'>-#define FCB_INTERRUPT_ENABLE            0x2000</div><div class='del'>-</div><div class='del'>-#define FCB_ENABLE_IMA                  0x0008</div><div class='del'>-#define FCB_ENABLE_TES                  0x0004  /* Guarantee Tx before Int */</div><div class='del'>-#define FCB_ENABLE_TFS                  0x0002  /* Post Tx Frame Status */</div><div class='del'>-#define FCB_ENABLE_NTC                  0x0001  /* No Tx CRC */</div><div class='del'>-</div><div class='del'>-#define FCB_TX_STATUS_CR2               0x0004</div><div class='del'>-#define FCB_TX_STATUS_AR2               0x0008</div><div class='del'>-#define FCB_TX_STATUS_CR1               0x0040</div><div class='del'>-#define FCB_TX_STATUS_AR1               0x0080</div><div class='del'>-#define FCB_TX_AC_BITS                  (FCB_TX_STATUS_AR1+FCB_TX_STATUS_AR2+FCB_TX_STATUS_CR1+FCB_TX_STATUS_CR2)</div><div class='del'>-#define FCB_TX_STATUS_E                 0x0100</div><div class='del'>-</div><div class='del'>-#define FCB_RX_STATUS_ANY_ERROR         0x0001</div><div class='del'>-#define FCB_RX_STATUS_FCS_ERROR         0x0002</div><div class='del'>-</div><div class='del'>-#define FCB_RX_STATUS_IA_MATCHED        0x0400</div><div class='del'>-#define FCB_RX_STATUS_IGA_BSGA_MATCHED  0x0500</div><div class='del'>-#define FCB_RX_STATUS_FA_MATCHED        0x0600</div><div class='del'>-#define FCB_RX_STATUS_BA_MATCHED        0x0700</div><div class='del'>-#define FCB_RX_STATUS_DA_MATCHED        0x0400</div><div class='del'>-#define FCB_RX_STATUS_SOURCE_ROUTING    0x0800</div><div class='del'>-</div><div class='del'>-#define BDB_BUFFER_SIZE                 0x100</div><div class='del'>-#define BDB_NOT_CHAIN_END               0x0000</div><div class='del'>-#define BDB_CHAIN_END                   0x8000</div><div class='del'>-#define BDB_NO_WARNING                  0x0000</div><div class='del'>-#define BDB_WARNING                     0x4000</div><div class='del'>-</div><div class='del'>-#define ERROR_COUNTERS_CHANGED          0x0001</div><div class='del'>-#define TI_NDIS_RING_STATUS_CHANGED     0x0002</div><div class='del'>-#define UNA_CHANGED                     0x0004</div><div class='del'>-#define READY_TO_SEND_RQ_INIT           0x0008</div><div class='del'>-</div><div class='del'>-#define SCGB_ADDRESS_POINTER_FORMAT     INTEL_ADDRESS_POINTER_FORMAT</div><div class='del'>-#define SCGB_DATA_FORMAT                INTEL_DATA_FORMAT</div><div class='del'>-#define SCGB_MULTI_WORD_CONTROL         0</div><div class='del'>-#define SCGB_BURST_LENGTH               0x000E  /* DMA Burst Length */</div><div class='del'>-</div><div class='del'>-#define SCGB_CONFIG                     (INTEL_ADDRESS_POINTER_FORMAT+INTEL_DATA_FORMAT+SCGB_BURST_LENGTH)</div><div class='del'>-</div><div class='del'>-#define ISCP_BLOCK_SIZE                 0x0A</div><div class='del'>-#define RAM_SIZE                        0x10000</div><div class='del'>-#define INIT_SYS_CONFIG_PTR_OFFSET      (RAM_SIZE-ISCP_BLOCK_SIZE)</div><div class='del'>-#define SCGP_BLOCK_OFFSET               0</div><div class='del'>-</div><div class='del'>-#define SCLB_NOT_VALID                  0x0000  /* Initially, SCLB not valid */</div><div class='del'>-#define SCLB_VALID                      0x8000  /* Host tells TRC SCLB valid */</div><div class='del'>-#define SCLB_PROCESSED                  0x0000  /* TRC says SCLB processed */</div><div class='del'>-#define SCLB_RESUME_CONTROL_NOT_VALID   0x0000  /* Initially, RC not valid */</div><div class='del'>-#define SCLB_RESUME_CONTROL_VALID       0x4000  /* Host tells TRC RC valid */</div><div class='del'>-#define SCLB_IACK_CODE_NOT_VALID        0x0000  /* Initially, IACK not valid */</div><div class='del'>-#define SCLB_IACK_CODE_VALID            0x2000  /* Host tells TRC IACK valid */</div><div class='del'>-#define SCLB_CMD_NOP                    0x0000</div><div class='del'>-#define SCLB_CMD_REMOVE                 0x0001</div><div class='del'>-#define SCLB_CMD_SUSPEND_ACB_CHAIN      0x0002</div><div class='del'>-#define SCLB_CMD_SET_INTERRUPT_MASK     0x0003</div><div class='del'>-#define SCLB_CMD_CLEAR_INTERRUPT_MASK   0x0004</div><div class='del'>-#define SCLB_CMD_RESERVED_5             0x0005</div><div class='del'>-#define SCLB_CMD_RESERVED_6             0x0006</div><div class='del'>-#define SCLB_CMD_RESERVED_7             0x0007</div><div class='del'>-#define SCLB_CMD_RESERVED_8             0x0008</div><div class='del'>-#define SCLB_CMD_RESERVED_9             0x0009</div><div class='del'>-#define SCLB_CMD_RESERVED_A             0x000A</div><div class='del'>-#define SCLB_CMD_RESERVED_B             0x000B</div><div class='del'>-#define SCLB_CMD_RESERVED_C             0x000C</div><div class='del'>-#define SCLB_CMD_RESERVED_D             0x000D</div><div class='del'>-#define SCLB_CMD_RESERVED_E             0x000E</div><div class='del'>-#define SCLB_CMD_RESERVED_F             0x000F</div><div class='del'>-</div><div class='del'>-#define SCLB_RC_ACB                     0x0001  /* Action Command Block Chain */</div><div class='del'>-#define SCLB_RC_RES0                    0x0002  /* Always Zero */</div><div class='del'>-#define SCLB_RC_RES1                    0x0004  /* Always Zero */</div><div class='del'>-#define SCLB_RC_RES2                    0x0008  /* Always Zero */</div><div class='del'>-#define SCLB_RC_RX_MAC_FCB              0x0010  /* RX_MAC_FCB Chain */</div><div class='del'>-#define SCLB_RC_RX_MAC_BDB              0x0020  /* RX_MAC_BDB Chain */</div><div class='del'>-#define SCLB_RC_RX_NON_MAC_FCB          0x0040  /* RX_NON_MAC_FCB Chain */</div><div class='del'>-#define SCLB_RC_RX_NON_MAC_BDB          0x0080  /* RX_NON_MAC_BDB Chain */</div><div class='del'>-#define SCLB_RC_TFCB0                   0x0100  /* TX Priority 0 FCB Chain */</div><div class='del'>-#define SCLB_RC_TFCB1                   0x0200  /* TX Priority 1 FCB Chain */</div><div class='del'>-#define SCLB_RC_TFCB2                   0x0400  /* TX Priority 2 FCB Chain */</div><div class='del'>-#define SCLB_RC_TFCB3                   0x0800  /* TX Priority 3 FCB Chain */</div><div class='del'>-#define SCLB_RC_TFCB4                   0x1000  /* TX Priority 4 FCB Chain */</div><div class='del'>-#define SCLB_RC_TFCB5                   0x2000  /* TX Priority 5 FCB Chain */</div><div class='del'>-#define SCLB_RC_TFCB6                   0x4000  /* TX Priority 6 FCB Chain */</div><div class='del'>-#define SCLB_RC_TFCB7                   0x8000  /* TX Priority 7 FCB Chain */</div><div class='del'>-</div><div class='del'>-#define SCLB_IMC_RES0                   0x0001  /* */</div><div class='del'>-#define SCLB_IMC_MAC_TYPE_3             0x0002  /* MAC_ARC_INDICATE */</div><div class='del'>-#define SCLB_IMC_MAC_ERROR_COUNTERS     0x0004  /* */</div><div class='del'>-#define SCLB_IMC_RES1                   0x0008  /* */</div><div class='del'>-#define SCLB_IMC_MAC_TYPE_2             0x0010  /* QUE_MAC_INDICATE */</div><div class='del'>-#define SCLB_IMC_TX_FRAME               0x0020  /* */</div><div class='del'>-#define SCLB_IMC_END_OF_TX_QUEUE        0x0040  /* */</div><div class='del'>-#define SCLB_IMC_NON_MAC_RX_RESOURCE    0x0080  /* */</div><div class='del'>-#define SCLB_IMC_MAC_RX_RESOURCE        0x0100  /* */</div><div class='del'>-#define SCLB_IMC_NON_MAC_RX_FRAME       0x0200  /* */</div><div class='del'>-#define SCLB_IMC_MAC_RX_FRAME           0x0400  /* */</div><div class='del'>-#define SCLB_IMC_TRC_FIFO_STATUS        0x0800  /* */</div><div class='del'>-#define SCLB_IMC_COMMAND_STATUS         0x1000  /* */</div><div class='del'>-#define SCLB_IMC_MAC_TYPE_1             0x2000  /* Self Removed */</div><div class='del'>-#define SCLB_IMC_TRC_INTRNL_TST_STATUS  0x4000  /* */</div><div class='del'>-#define SCLB_IMC_RES2                   0x8000  /* */</div><div class='del'>-</div><div class='del'>-#define DMA_TRIGGER                     0x0004</div><div class='del'>-#define FREQ_16MB_BIT                   0x0010</div><div class='del'>-#define THDREN                          0x0020</div><div class='del'>-#define CFG0_RSV1                       0x0040</div><div class='del'>-#define CFG0_RSV2                       0x0080</div><div class='del'>-#define ETREN                           0x0100</div><div class='del'>-#define RX_OWN_BIT                      0x0200</div><div class='del'>-#define RXATMAC                         0x0400</div><div class='del'>-#define PROMISCUOUS_BIT                 0x0800</div><div class='del'>-#define USETPT                          0x1000</div><div class='del'>-#define SAVBAD_BIT                      0x2000</div><div class='del'>-#define ONEQUE                          0x4000</div><div class='del'>-#define NO_AUTOREMOVE                   0x8000</div><div class='del'>-</div><div class='del'>-#define RX_FCB_AREA_8316        0x00000000</div><div class='del'>-#define RX_BUFF_AREA_8316       0x00000000</div><div class='del'>-</div><div class='del'>-#define TRC_POINTER(X)          ((unsigned long)(X) - tp-&gt;ram_access)</div><div class='del'>-#define RX_FCB_TRC_POINTER(X)   ((unsigned long)(X) - tp-&gt;ram_access + RX_FCB_AREA_8316)</div><div class='del'>-#define RX_BUFF_TRC_POINTER(X) ((unsigned long)(X) - tp-&gt;ram_access + RX_BUFF_AREA_8316)</div><div class='del'>-</div><div class='del'>-// Offset 0: MSR - Memory Select Register</div><div class='del'>-//</div><div class='del'>-#define r587_MSR        0x000   // Register Offset</div><div class='del'>-//#define       MSR_RST         0x080   // LAN Controller Reset</div><div class='del'>-#define MSR_MENB        0x040   // Shared Memory Enable</div><div class='del'>-#define MSR_RA18        0x020   // Ram Address bit 18   (583, 584, 587)</div><div class='del'>-#define MSR_RA17        0x010   // Ram Address bit 17   (583, 584, 585/790)</div><div class='del'>-#define MSR_RA16        0x008   // Ram Address bit 16   (583, 584, 585/790)</div><div class='del'>-#define MSR_RA15        0x004   // Ram Address bit 15   (583, 584, 585/790)</div><div class='del'>-#define MSR_RA14        0x002   // Ram Address bit 14   (583, 584, 585/790)</div><div class='del'>-#define MSR_RA13        0x001   // Ram Address bit 13   (583, 584, 585/790)</div><div class='del'>-</div><div class='del'>-#define MSR_MASK        0x03F   // Mask for Address bits RA18-RA13 (583, 584, 587)</div><div class='del'>-</div><div class='del'>-#define MSR                     0x00</div><div class='del'>-#define IRR                     0x04</div><div class='del'>-#define HWR                     0x04</div><div class='del'>-#define LAAR                    0x05</div><div class='del'>-#define IMCCR                   0x05</div><div class='del'>-#define LAR0                    0x08</div><div class='del'>-#define BDID                    0x0E    // Adapter ID byte register offset</div><div class='del'>-#define CSR                     0x10</div><div class='del'>-#define PR                      0x11</div><div class='del'>-</div><div class='del'>-#define MSR_RST                 0x80</div><div class='del'>-#define MSR_MEMB                0x40</div><div class='del'>-#define MSR_0WS                 0x20</div><div class='del'>-</div><div class='del'>-#define FORCED_16BIT_MODE       0x0002</div><div class='del'>-</div><div class='del'>-#define INTERFRAME_SPACING_16           0x0003  /* 6 bytes */</div><div class='del'>-#define INTERFRAME_SPACING_4            0x0001  /* 2 bytes */</div><div class='del'>-#define MULTICAST_ADDRESS_BIT           0x0010</div><div class='del'>-#define NON_SRC_ROUTING_BIT             0x0020</div><div class='del'>-</div><div class='del'>-#define LOOPING_MODE_MASK       0x0007</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Decode firmware defines.</div><div class='del'>- */</div><div class='del'>-#define SWAP_BYTES(X)		((X &amp; 0xff) &lt;&lt; 8) | (X &gt;&gt; 8)</div><div class='del'>-#define WEIGHT_OFFSET		5</div><div class='del'>-#define TREE_SIZE_OFFSET	9</div><div class='del'>-#define TREE_OFFSET		11</div><div class='del'>-</div><div class='del'>-/* The Huffman Encoding Tree is constructed of these nodes. */</div><div class='del'>-typedef struct {</div><div class='del'>-	__u8	llink;	/* Short version of above node. */</div><div class='del'>-	__u8	tag;</div><div class='del'>-	__u8	info;	/* This node is used on decodes. */</div><div class='del'>-	__u8	rlink;</div><div class='del'>-} DECODE_TREE_NODE;</div><div class='del'>-</div><div class='del'>-#define ROOT	0	/* Branch value. */</div><div class='del'>-#define LEAF	0	/* Tag field value. */</div><div class='del'>-#define BRANCH	1	/* Tag field value. */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Multicast Table Structure</div><div class='del'>- */</div><div class='del'>-typedef struct {</div><div class='del'>-        __u8    address[6];</div><div class='del'>-        __u8    instance_count;</div><div class='del'>-} McTable;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Fragment Descriptor Definition</div><div class='del'>- */</div><div class='del'>-typedef struct {</div><div class='del'>-        __u8  *fragment_ptr;</div><div class='del'>-        __u32   fragment_length;</div><div class='del'>-} FragmentStructure;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Data Buffer Structure Definition</div><div class='del'>- */</div><div class='del'>-typedef struct {</div><div class='del'>-        __u32 fragment_count;</div><div class='del'>-        FragmentStructure       fragment_list[MAXFRAGMENTS];</div><div class='del'>-} DataBufferStructure;</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct {</div><div class='del'>-                __u8    IType;</div><div class='del'>-                __u8    ISubtype;</div><div class='del'>-} Interrupt_Status_Word;</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct BDBlockType {</div><div class='del'>-                __u16                   info;                   /* 02 */</div><div class='del'>-                __u32                   trc_next_ptr;           /* 06 */</div><div class='del'>-                __u32                   trc_data_block_ptr;     /* 10 */</div><div class='del'>-                __u16                   buffer_length;          /* 12 */</div><div class='del'>-</div><div class='del'>-                __u16                   *data_block_ptr;        /* 16 */</div><div class='del'>-                struct  BDBlockType     *next_ptr;              /* 20 */</div><div class='del'>-                struct  BDBlockType     *back_ptr;              /* 24 */</div><div class='del'>-                __u8                    filler[8];              /* 32 */</div><div class='del'>-} BDBlock;</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct FCBlockType {</div><div class='del'>-                __u16                   frame_status;           /* 02 */</div><div class='del'>-                __u16                   info;                   /* 04 */</div><div class='del'>-                __u32                   trc_next_ptr;           /* 08 */</div><div class='del'>-                __u32                   trc_bdb_ptr;            /* 12 */</div><div class='del'>-                __u16                   frame_length;           /* 14 */</div><div class='del'>-</div><div class='del'>-                BDBlock                 *bdb_ptr;               /* 18 */</div><div class='del'>-                struct  FCBlockType     *next_ptr;              /* 22 */</div><div class='del'>-                struct  FCBlockType     *back_ptr;              /* 26 */</div><div class='del'>-                __u16                   memory_alloc;           /* 28 */</div><div class='del'>-                __u8                    filler[4];              /* 32 */</div><div class='del'>-</div><div class='del'>-} FCBlock;</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct SBlockType{</div><div class='del'>-                __u8                           Internal_Error_Count;</div><div class='del'>-                __u8                           Line_Error_Count;</div><div class='del'>-                __u8                           AC_Error_Count;</div><div class='del'>-                __u8                           Burst_Error_Count;</div><div class='del'>-                __u8                            RESERVED_COUNTER_0;</div><div class='del'>-                __u8                            AD_TRANS_Count;</div><div class='del'>-                __u8                            RCV_Congestion_Count;</div><div class='del'>-                __u8                            Lost_FR_Error_Count;</div><div class='del'>-                __u8                            FREQ_Error_Count;</div><div class='del'>-                __u8                            FR_Copied_Error_Count;</div><div class='del'>-                __u8                            RESERVED_COUNTER_1;</div><div class='del'>-                __u8                            Token_Error_Count;</div><div class='del'>-</div><div class='del'>-                __u16                           TI_NDIS_Ring_Status;</div><div class='del'>-                __u16                           BCN_Type;</div><div class='del'>-                __u16                           Error_Code;</div><div class='del'>-                __u16                           SA_of_Last_AMP_SMP[3];</div><div class='del'>-                __u16                           UNA[3];</div><div class='del'>-                __u16                           Ucode_Version_Number;</div><div class='del'>-                __u16                           Status_CHG_Indicate;</div><div class='del'>-                __u16                           RESERVED_STATUS_0;</div><div class='del'>-} SBlock;</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct ACBlockType {</div><div class='del'>-                __u16                   cmd_done_status;    /* 02 */</div><div class='del'>-                __u16                   cmd_info;           /* 04 */</div><div class='del'>-                __u32                   trc_next_ptr;           /* 08 */</div><div class='del'>-                __u16                   cmd;                /* 10 */</div><div class='del'>-                __u16                   subcmd;             /* 12 */</div><div class='del'>-                __u16                   data_offset_lo;         /* 14 */</div><div class='del'>-                __u16                   data_offset_hi;         /* 16 */</div><div class='del'>-</div><div class='del'>-                struct  ACBlockType     *next_ptr;              /* 20 */</div><div class='del'>-</div><div class='del'>-                __u8                    filler[12];             /* 32 */</div><div class='del'>-} ACBlock;</div><div class='del'>-</div><div class='del'>-#define NUM_OF_INTERRUPTS               0x20</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct {</div><div class='del'>-                Interrupt_Status_Word   IStatus[NUM_OF_INTERRUPTS];</div><div class='del'>-} ISBlock;</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct {</div><div class='del'>-                __u16                   valid_command;          /* 02 */</div><div class='del'>-                __u16                   iack_code;              /* 04 */</div><div class='del'>-                __u16                   resume_control;         /* 06 */</div><div class='del'>-                __u16                   int_mask_control;       /* 08 */</div><div class='del'>-                __u16                   int_mask_state;         /* 10 */</div><div class='del'>-</div><div class='del'>-                __u8                    filler[6];              /* 16 */</div><div class='del'>-} SCLBlock;</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct</div><div class='del'>-{</div><div class='del'>-                __u16                   config;                 /* 02 */</div><div class='del'>-                __u32                   trc_sclb_ptr;           /* 06 */</div><div class='del'>-                __u32                   trc_acb_ptr;            /* 10 */</div><div class='del'>-                __u32                   trc_isb_ptr;            /* 14 */</div><div class='del'>-                __u16                   isbsiz;                 /* 16 */</div><div class='del'>-</div><div class='del'>-                SCLBlock                *sclb_ptr;              /* 20 */</div><div class='del'>-                ACBlock                 *acb_ptr;               /* 24 */</div><div class='del'>-                ISBlock                 *isb_ptr;               /* 28 */</div><div class='del'>-</div><div class='del'>-                __u16                   Non_Mac_Rx_Bdbs;        /* 30 DEBUG */</div><div class='del'>-                __u8                    filler[2];              /* 32 */</div><div class='del'>-</div><div class='del'>-} SCGBlock;</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct</div><div class='del'>-{</div><div class='del'>-	__u32		trc_scgb_ptr;</div><div class='del'>-	SCGBlock	*scgb_ptr;</div><div class='del'>-} ISCPBlock;</div><div class='del'>-#pragma pack()</div><div class='del'>-</div><div class='del'>-typedef struct net_local {</div><div class='del'>-	ISCPBlock       *iscpb_ptr;</div><div class='del'>-        SCGBlock        *scgb_ptr;</div><div class='del'>-        SCLBlock        *sclb_ptr;</div><div class='del'>-        ISBlock         *isb_ptr;</div><div class='del'>-</div><div class='del'>-	ACBlock         *acb_head;</div><div class='del'>-        ACBlock         *acb_curr;</div><div class='del'>-        ACBlock         *acb_next;</div><div class='del'>-</div><div class='del'>-	__u8		adapter_name[12];</div><div class='del'>-</div><div class='del'>-	__u16		num_rx_bdbs	[NUM_RX_QS_USED];</div><div class='del'>-	__u16		num_rx_fcbs	[NUM_RX_QS_USED];</div><div class='del'>-</div><div class='del'>-	__u16		num_tx_bdbs	[NUM_TX_QS_USED];</div><div class='del'>-	__u16		num_tx_fcbs	[NUM_TX_QS_USED];</div><div class='del'>-</div><div class='del'>-	__u16		num_of_tx_buffs;</div><div class='del'>-</div><div class='del'>-	__u16		tx_buff_size	[NUM_TX_QS_USED];</div><div class='del'>-	__u16		tx_buff_used	[NUM_TX_QS_USED];</div><div class='del'>-	__u16		tx_queue_status	[NUM_TX_QS_USED];</div><div class='del'>-</div><div class='del'>-	FCBlock		*tx_fcb_head[NUM_TX_QS_USED];</div><div class='del'>-	FCBlock		*tx_fcb_curr[NUM_TX_QS_USED];</div><div class='del'>-	FCBlock		*tx_fcb_end[NUM_TX_QS_USED];</div><div class='del'>-	BDBlock		*tx_bdb_head[NUM_TX_QS_USED];</div><div class='del'>-	__u16		*tx_buff_head[NUM_TX_QS_USED];</div><div class='del'>-	__u16		*tx_buff_end[NUM_TX_QS_USED];</div><div class='del'>-	__u16		*tx_buff_curr[NUM_TX_QS_USED];</div><div class='del'>-	__u16		num_tx_fcbs_used[NUM_TX_QS_USED];</div><div class='del'>-</div><div class='del'>-	FCBlock		*rx_fcb_head[NUM_RX_QS_USED];</div><div class='del'>-	FCBlock		*rx_fcb_curr[NUM_RX_QS_USED];</div><div class='del'>-	BDBlock		*rx_bdb_head[NUM_RX_QS_USED];</div><div class='del'>-	BDBlock		*rx_bdb_curr[NUM_RX_QS_USED];</div><div class='del'>-	BDBlock		*rx_bdb_end[NUM_RX_QS_USED];</div><div class='del'>-	__u16		*rx_buff_head[NUM_RX_QS_USED];</div><div class='del'>-	__u16		*rx_buff_end[NUM_RX_QS_USED];</div><div class='del'>-</div><div class='del'>-	__u32		*ptr_local_ring_num;</div><div class='del'>-</div><div class='del'>-	__u32		sh_mem_used;</div><div class='del'>-</div><div class='del'>-	__u16		page_offset_mask;</div><div class='del'>-</div><div class='del'>-	__u16		authorized_function_classes;</div><div class='del'>-	__u16		authorized_access_priority;</div><div class='del'>-</div><div class='del'>-        __u16            num_acbs;</div><div class='del'>-        __u16            num_acbs_used;</div><div class='del'>-        __u16            acb_pending;</div><div class='del'>-</div><div class='del'>-	__u16		current_isb_index;</div><div class='del'>-</div><div class='del'>-	__u8            monitor_state;</div><div class='del'>-	__u8		monitor_state_ready;</div><div class='del'>-	__u16		ring_status;</div><div class='del'>-	__u8		ring_status_flags;</div><div class='del'>-	__u8		state;</div><div class='del'>-</div><div class='del'>-	__u8		join_state;</div><div class='del'>-</div><div class='del'>-	__u8		slot_num;</div><div class='del'>-	__u16		pos_id;</div><div class='del'>-</div><div class='del'>-	__u32		*ptr_una;</div><div class='del'>-	__u32		*ptr_bcn_type;</div><div class='del'>-	__u32		*ptr_tx_fifo_underruns;</div><div class='del'>-	__u32		*ptr_rx_fifo_underruns;</div><div class='del'>-	__u32		*ptr_rx_fifo_overruns;</div><div class='del'>-	__u32		*ptr_tx_fifo_overruns;</div><div class='del'>-	__u32		*ptr_tx_fcb_overruns;</div><div class='del'>-	__u32		*ptr_rx_fcb_overruns;</div><div class='del'>-	__u32		*ptr_tx_bdb_overruns;</div><div class='del'>-	__u32		*ptr_rx_bdb_overruns;</div><div class='del'>-</div><div class='del'>-	__u16		receive_queue_number;</div><div class='del'>-</div><div class='del'>-	__u8		rx_fifo_overrun_count;</div><div class='del'>-	__u8		tx_fifo_overrun_count;</div><div class='del'>-</div><div class='del'>-	__u16            adapter_flags;</div><div class='del'>-	__u16		adapter_flags1;</div><div class='del'>-	__u16            *misc_command_data;</div><div class='del'>-	__u16            max_packet_size;</div><div class='del'>-</div><div class='del'>-	__u16            config_word0;</div><div class='del'>-        __u16            config_word1;</div><div class='del'>-</div><div class='del'>-	__u8            trc_mask;</div><div class='del'>-</div><div class='del'>-	__u16            source_ring_number;</div><div class='del'>-        __u16            target_ring_number;</div><div class='del'>-</div><div class='del'>-	__u16		microcode_version;</div><div class='del'>-</div><div class='del'>-	__u16            bic_type;</div><div class='del'>-        __u16            nic_type;</div><div class='del'>-        __u16            board_id;</div><div class='del'>-</div><div class='del'>-	__u16            rom_size;</div><div class='del'>-	__u32		rom_base;</div><div class='del'>-        __u16            ram_size;</div><div class='del'>-        __u16            ram_usable;</div><div class='del'>-	__u32		ram_base;</div><div class='del'>-	__u32		ram_access;</div><div class='del'>-</div><div class='del'>-	__u16            extra_info;</div><div class='del'>-        __u16            mode_bits;</div><div class='del'>-	__u16		media_menu;</div><div class='del'>-	__u16		media_type;</div><div class='del'>-	__u16		adapter_bus;</div><div class='del'>-</div><div class='del'>-	__u16		status;</div><div class='del'>-	__u16            receive_mask;</div><div class='del'>-</div><div class='del'>-	__u16            group_address_0;</div><div class='del'>-        __u16            group_address[2];</div><div class='del'>-        __u16            functional_address_0;</div><div class='del'>-        __u16            functional_address[2];</div><div class='del'>-        __u16            bitwise_group_address[2];</div><div class='del'>-</div><div class='del'>-	__u8		cleanup;</div><div class='del'>-</div><div class='del'>-	struct sk_buff_head SendSkbQueue;</div><div class='del'>-        __u16 QueueSkb;</div><div class='del'>-</div><div class='del'>-	struct tr_statistics MacStat;   /* MAC statistics structure */</div><div class='del'>-	</div><div class='del'>-	spinlock_t	lock;</div><div class='del'>-} NET_LOCAL;</div><div class='del'>-</div><div class='del'>-/************************************</div><div class='del'>- * SNMP-ON-BOARD Agent Link Structure</div><div class='del'>- ************************************/</div><div class='del'>-</div><div class='del'>-typedef struct {</div><div class='del'>-        __u8           LnkSigStr[12]; /* signature string "SmcLinkTable" */</div><div class='del'>-        __u8           LnkDrvTyp;     /* 1=Redbox ODI, 2=ODI DOS, 3=ODI OS/2, 4=NDIS DOS */</div><div class='del'>-        __u8           LnkFlg;        /* 0 if no agent linked, 1 if agent linked */</div><div class='del'>-        void           *LnkNfo;       /* routine which returns pointer to NIC info */</div><div class='del'>-        void           *LnkAgtRcv;    /* pointer to agent receive trap entry */</div><div class='del'>-        void           *LnkAgtXmt;            /* pointer to agent transmit trap</div><div class='del'>-entry  */</div><div class='del'>-void           *LnkGet;                  /* pointer to NIC receive data</div><div class='del'>-copy routine */</div><div class='del'>-        void           *LnkSnd;                  /* pointer to NIC send routine</div><div class='del'>-*/</div><div class='del'>-        void           *LnkRst;                  /* pointer to NIC driver reset</div><div class='del'>-routine */</div><div class='del'>-        void           *LnkMib;                  /* pointer to MIB data base */</div><div class='del'>-        void           *LnkMibAct;            /* pointer to MIB action routine list */</div><div class='del'>-        __u16           LnkCntOffset;  /* offset to error counters */</div><div class='del'>-        __u16           LnkCntNum;     /* number of error counters */</div><div class='del'>-        __u16           LnkCntSize;    /* size of error counters i.e. 32 = 32 bits */</div><div class='del'>-        void           *LnkISR;       /* pointer to interrupt vector */</div><div class='del'>-        __u8           LnkFrmTyp;     /* 1=Ethernet, 2=Token Ring */</div><div class='del'>-        __u8           LnkDrvVer1 ;   /* driver major version */</div><div class='del'>-        __u8           LnkDrvVer2 ;   /* driver minor version */</div><div class='del'>-} AgentLink;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for pcm_card_flags(bit_mapped)</div><div class='del'>- */</div><div class='del'>-#define REG_COMPLETE   0x0001</div><div class='del'>-#define INSERTED       0x0002</div><div class='del'>-#define PCC_INSERTED   0x0004         /* 1=currently inserted, 0=cur removed */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Adapter RAM test patterns</div><div class='del'>- */</div><div class='del'>-#define RAM_PATTERN_1  0x55AA</div><div class='del'>-#define RAM_PATTERN_2  0x9249</div><div class='del'>-#define RAM_PATTERN_3  0xDB6D</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * definitions for RAM test</div><div class='del'>- */</div><div class='del'>-#define ROM_SIGNATURE  0xAA55</div><div class='del'>-#define MIN_ROM_SIZE   0x2000</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Return Codes</div><div class='del'>- */</div><div class='del'>-#define SUCCESS                 0x0000</div><div class='del'>-#define ADAPTER_AND_CONFIG      0x0001</div><div class='del'>-#define ADAPTER_NO_CONFIG       0x0002</div><div class='del'>-#define NOT_MY_INTERRUPT        0x0003</div><div class='del'>-#define FRAME_REJECTED          0x0004</div><div class='del'>-#define EVENTS_DISABLED         0x0005</div><div class='del'>-#define OUT_OF_RESOURCES        0x0006</div><div class='del'>-#define INVALID_PARAMETER       0x0007</div><div class='del'>-#define INVALID_FUNCTION        0x0008</div><div class='del'>-#define INITIALIZE_FAILED       0x0009</div><div class='del'>-#define CLOSE_FAILED            0x000A</div><div class='del'>-#define MAX_COLLISIONS          0x000B</div><div class='del'>-#define NO_SUCH_DESTINATION     0x000C</div><div class='del'>-#define BUFFER_TOO_SMALL_ERROR  0x000D</div><div class='del'>-#define ADAPTER_CLOSED          0x000E</div><div class='del'>-#define UCODE_NOT_PRESENT       0x000F</div><div class='del'>-#define FIFO_UNDERRUN           0x0010</div><div class='del'>-#define DEST_OUT_OF_RESOURCES   0x0011</div><div class='del'>-#define ADAPTER_NOT_INITIALIZED 0x0012</div><div class='del'>-#define PENDING                 0x0013</div><div class='del'>-#define UCODE_PRESENT           0x0014</div><div class='del'>-#define NOT_INIT_BY_BRIDGE      0x0015</div><div class='del'>-</div><div class='del'>-#define OPEN_FAILED             0x0080</div><div class='del'>-#define HARDWARE_FAILED         0x0081</div><div class='del'>-#define SELF_TEST_FAILED        0x0082</div><div class='del'>-#define RAM_TEST_FAILED         0x0083</div><div class='del'>-#define RAM_CONFLICT            0x0084</div><div class='del'>-#define ROM_CONFLICT            0x0085</div><div class='del'>-#define UNKNOWN_ADAPTER         0x0086</div><div class='del'>-#define CONFIG_ERROR            0x0087</div><div class='del'>-#define CONFIG_WARNING          0x0088</div><div class='del'>-#define NO_FIXED_CNFG           0x0089</div><div class='del'>-#define EEROM_CKSUM_ERROR       0x008A</div><div class='del'>-#define ROM_SIGNATURE_ERROR     0x008B</div><div class='del'>-#define ROM_CHECKSUM_ERROR      0x008C</div><div class='del'>-#define ROM_SIZE_ERROR          0x008D</div><div class='del'>-#define UNSUPPORTED_NIC_CHIP    0x008E</div><div class='del'>-#define NIC_REG_ERROR           0x008F</div><div class='del'>-#define BIC_REG_ERROR           0x0090</div><div class='del'>-#define MICROCODE_TEST_ERROR    0x0091</div><div class='del'>-#define LOBE_MEDIA_TEST_FAILED  0x0092</div><div class='del'>-</div><div class='del'>-#define ADAPTER_FOUND_LAN_CORRUPT 0x009B</div><div class='del'>-</div><div class='del'>-#define ADAPTER_NOT_FOUND       0xFFFF</div><div class='del'>-</div><div class='del'>-#define ILLEGAL_FUNCTION        INVALID_FUNCTION</div><div class='del'>-</div><div class='del'>-/* Errors */</div><div class='del'>-#define IO_BASE_INVALID         0x0001</div><div class='del'>-#define IO_BASE_RANGE           0x0002</div><div class='del'>-#define IRQ_INVALID             0x0004</div><div class='del'>-#define IRQ_RANGE               0x0008</div><div class='del'>-#define RAM_BASE_INVALID        0x0010</div><div class='del'>-#define RAM_BASE_RANGE          0x0020</div><div class='del'>-#define RAM_SIZE_RANGE          0x0040</div><div class='del'>-#define MEDIA_INVALID           0x0800</div><div class='del'>-</div><div class='del'>-/* Warnings */</div><div class='del'>-#define IRQ_MISMATCH            0x0080</div><div class='del'>-#define RAM_BASE_MISMATCH       0x0100</div><div class='del'>-#define RAM_SIZE_MISMATCH       0x0200</div><div class='del'>-#define BUS_MODE_MISMATCH       0x0400</div><div class='del'>-</div><div class='del'>-#define RX_CRC_ERROR                            0x01</div><div class='del'>-#define RX_ALIGNMENT_ERROR              0x02</div><div class='del'>-#define RX_HW_FAILED                            0x80</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for the field RING_STATUS_FLAGS</div><div class='del'>- */</div><div class='del'>-#define RING_STATUS_CHANGED                     0X01</div><div class='del'>-#define MONITOR_STATE_CHANGED                   0X02</div><div class='del'>-#define JOIN_STATE_CHANGED                      0X04</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for the field JOIN_STATE</div><div class='del'>- */</div><div class='del'>-#define JS_BYPASS_STATE                         0x00</div><div class='del'>-#define JS_LOBE_TEST_STATE                      0x01</div><div class='del'>-#define JS_DETECT_MONITOR_PRESENT_STATE         0x02</div><div class='del'>-#define JS_AWAIT_NEW_MONITOR_STATE              0x03</div><div class='del'>-#define JS_DUPLICATE_ADDRESS_TEST_STATE         0x04</div><div class='del'>-#define JS_NEIGHBOR_NOTIFICATION_STATE          0x05</div><div class='del'>-#define JS_REQUEST_INITIALIZATION_STATE         0x06</div><div class='del'>-#define JS_JOIN_COMPLETE_STATE                  0x07</div><div class='del'>-#define JS_BYPASS_WAIT_STATE                    0x08</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for the field MONITOR_STATE</div><div class='del'>- */</div><div class='del'>-#define MS_MONITOR_FSM_INACTIVE                 0x00</div><div class='del'>-#define MS_REPEAT_BEACON_STATE                  0x01</div><div class='del'>-#define MS_REPEAT_CLAIM_TOKEN_STATE             0x02</div><div class='del'>-#define MS_TRANSMIT_CLAIM_TOKEN_STATE           0x03</div><div class='del'>-#define MS_STANDBY_MONITOR_STATE                0x04</div><div class='del'>-#define MS_TRANSMIT_BEACON_STATE                0x05</div><div class='del'>-#define MS_ACTIVE_MONITOR_STATE                 0x06</div><div class='del'>-#define MS_TRANSMIT_RING_PURGE_STATE            0x07</div><div class='del'>-#define MS_BEACON_TEST_STATE                    0x09</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for the bit-field RING_STATUS</div><div class='del'>- */</div><div class='del'>-#define SIGNAL_LOSS                             0x8000</div><div class='del'>-#define HARD_ERROR                              0x4000</div><div class='del'>-#define SOFT_ERROR                              0x2000</div><div class='del'>-#define TRANSMIT_BEACON                         0x1000</div><div class='del'>-#define LOBE_WIRE_FAULT                         0x0800</div><div class='del'>-#define AUTO_REMOVAL_ERROR                      0x0400</div><div class='del'>-#define REMOVE_RECEIVED                         0x0100</div><div class='del'>-#define COUNTER_OVERFLOW                        0x0080</div><div class='del'>-#define SINGLE_STATION                          0x0040</div><div class='del'>-#define RING_RECOVERY                           0x0020</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for the field BUS_TYPE</div><div class='del'>- */</div><div class='del'>-#define AT_BUS                  0x00</div><div class='del'>-#define MCA_BUS                 0x01</div><div class='del'>-#define EISA_BUS                0x02</div><div class='del'>-#define PCI_BUS                 0x03</div><div class='del'>-#define PCMCIA_BUS              0x04</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for adapter_flags</div><div class='del'>- */</div><div class='del'>-#define RX_VALID_LOOKAHEAD      0x0001</div><div class='del'>-#define FORCED_16BIT_MODE       0x0002</div><div class='del'>-#define ADAPTER_DISABLED        0x0004</div><div class='del'>-#define TRANSMIT_CHAIN_INT      0x0008</div><div class='del'>-#define EARLY_RX_FRAME          0x0010</div><div class='del'>-#define EARLY_TX                0x0020</div><div class='del'>-#define EARLY_RX_COPY           0x0040</div><div class='del'>-#define USES_PHYSICAL_ADDR      0x0080		/* Rsvd for DEC PCI and 9232 */</div><div class='del'>-#define NEEDS_PHYSICAL_ADDR  	0x0100       	/* Reserved*/</div><div class='del'>-#define RX_STATUS_PENDING       0x0200</div><div class='del'>-#define ERX_DISABLED         	0x0400       	/* EARLY_RX_ENABLE rcv_mask */</div><div class='del'>-#define ENABLE_TX_PENDING       0x0800</div><div class='del'>-#define ENABLE_RX_PENDING       0x1000</div><div class='del'>-#define PERM_CLOSE              0x2000  </div><div class='del'>-#define IO_MAPPED               0x4000  	/* IOmapped bus interface 795 */</div><div class='del'>-#define ETX_DISABLED            0x8000</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for adapter_flags1</div><div class='del'>- */</div><div class='del'>-#define TX_PHY_RX_VIRT          0x0001 </div><div class='del'>-#define NEEDS_HOST_RAM          0x0002</div><div class='del'>-#define NEEDS_MEDIA_TYPE        0x0004</div><div class='del'>-#define EARLY_RX_DONE           0x0008</div><div class='del'>-#define PNP_BOOT_BIT            0x0010  /* activates PnP &amp; config on power-up */</div><div class='del'>-                                        /* clear =&gt; regular PnP operation */</div><div class='del'>-#define PNP_ENABLE              0x0020  /* regular PnP operation clear =&gt; */</div><div class='del'>-                                        /* no PnP, overrides PNP_BOOT_BIT */</div><div class='del'>-#define SATURN_ENABLE           0x0040</div><div class='del'>-</div><div class='del'>-#define ADAPTER_REMOVABLE       0x0080 	/* adapter is hot swappable */</div><div class='del'>-#define TX_PHY                  0x0100  /* Uses physical address for tx bufs */</div><div class='del'>-#define RX_PHY                  0x0200  /* Uses physical address for rx bufs */</div><div class='del'>-#define TX_VIRT                 0x0400  /* Uses virtual addr for tx bufs */</div><div class='del'>-#define RX_VIRT                 0x0800 </div><div class='del'>-#define NEEDS_SERVICE           0x1000 </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Adapter Status Codes</div><div class='del'>- */</div><div class='del'>-#define OPEN                    0x0001</div><div class='del'>-#define INITIALIZED             0x0002</div><div class='del'>-#define CLOSED                  0x0003</div><div class='del'>-#define FAILED                  0x0005</div><div class='del'>-#define NOT_INITIALIZED         0x0006</div><div class='del'>-#define IO_CONFLICT             0x0007</div><div class='del'>-#define CARD_REMOVED            0x0008</div><div class='del'>-#define CARD_INSERTED           0x0009</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Mode Bit Definitions</div><div class='del'>- */</div><div class='del'>-#define INTERRUPT_STATUS_BIT    0x8000  /* PC Interrupt Line: 0 = Not Enabled */</div><div class='del'>-#define BOOT_STATUS_MASK        0x6000  /* Mask to isolate BOOT_STATUS */</div><div class='del'>-#define BOOT_INHIBIT            0x0000  /* BOOT_STATUS is 'inhibited' */</div><div class='del'>-#define BOOT_TYPE_1             0x2000  /* Unused BOOT_STATUS value */</div><div class='del'>-#define BOOT_TYPE_2             0x4000  /* Unused BOOT_STATUS value */</div><div class='del'>-#define BOOT_TYPE_3             0x6000  /* Unused BOOT_STATUS value */</div><div class='del'>-#define ZERO_WAIT_STATE_MASK    0x1800  /* Mask to isolate Wait State flags */</div><div class='del'>-#define ZERO_WAIT_STATE_8_BIT   0x1000  /* 0 = Disabled (Inserts Wait States) */</div><div class='del'>-#define ZERO_WAIT_STATE_16_BIT  0x0800  /* 0 = Disabled (Inserts Wait States) */</div><div class='del'>-#define LOOPING_MODE_MASK       0x0007</div><div class='del'>-#define LOOPBACK_MODE_0         0x0000</div><div class='del'>-#define LOOPBACK_MODE_1         0x0001</div><div class='del'>-#define LOOPBACK_MODE_2         0x0002</div><div class='del'>-#define LOOPBACK_MODE_3         0x0003</div><div class='del'>-#define LOOPBACK_MODE_4         0x0004</div><div class='del'>-#define LOOPBACK_MODE_5         0x0005</div><div class='del'>-#define LOOPBACK_MODE_6         0x0006</div><div class='del'>-#define LOOPBACK_MODE_7         0x0007</div><div class='del'>-#define AUTO_MEDIA_DETECT       0x0008</div><div class='del'>-#define MANUAL_CRC              0x0010</div><div class='del'>-#define EARLY_TOKEN_REL         0x0020  /* Early Token Release for Token Ring */</div><div class='del'>-#define UMAC               0x0040 </div><div class='del'>-#define UTP2_PORT               0x0080  /* For 8216T2, 0=port A, 1=Port B. */</div><div class='del'>-#define BNC_10BT_INTERFACE      0x0600  /* BNC and UTP current media set */</div><div class='del'>-#define UTP_INTERFACE           0x0500  /* Ethernet UTP Only. */</div><div class='del'>-#define BNC_INTERFACE           0x0400</div><div class='del'>-#define AUI_INTERFACE           0x0300</div><div class='del'>-#define AUI_10BT_INTERFACE      0x0200</div><div class='del'>-#define STARLAN_10_INTERFACE    0x0100</div><div class='del'>-#define INTERFACE_TYPE_MASK     0x0700</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Media Type Bit Definitions</div><div class='del'>- *</div><div class='del'>- * legend:      TP = Twisted Pair</div><div class='del'>- *              STP = Shielded twisted pair</div><div class='del'>- *              UTP = Unshielded twisted pair</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define CNFG_MEDIA_TYPE_MASK    0x001e  /* POS Register 3 Mask         */</div><div class='del'>-</div><div class='del'>-#define MEDIA_S10               0x0000  /* Ethernet adapter, TP.        */</div><div class='del'>-#define MEDIA_AUI_UTP           0x0001  /* Ethernet adapter, AUI/UTP media */</div><div class='del'>-#define MEDIA_BNC               0x0002  /* Ethernet adapter, BNC media. */</div><div class='del'>-#define MEDIA_AUI               0x0003  /* Ethernet Adapter, AUI media. */</div><div class='del'>-#define MEDIA_STP_16            0x0004  /* TokenRing adap, 16Mbit STP.  */</div><div class='del'>-#define MEDIA_STP_4             0x0005  /* TokenRing adap, 4Mbit STP.   */</div><div class='del'>-#define MEDIA_UTP_16            0x0006  /* TokenRing adap, 16Mbit UTP.  */</div><div class='del'>-#define MEDIA_UTP_4             0x0007  /* TokenRing adap, 4Mbit UTP.   */</div><div class='del'>-#define MEDIA_UTP               0x0008  /* Ethernet adapter, UTP media (no AUI)</div><div class='del'>-*/</div><div class='del'>-#define MEDIA_BNC_UTP           0x0010  /* Ethernet adapter, BNC/UTP media */</div><div class='del'>-#define MEDIA_UTPFD             0x0011  /* Ethernet adapter, TP full duplex */</div><div class='del'>-#define MEDIA_UTPNL             0x0012  /* Ethernet adapter, TP with link integrity test disabled */</div><div class='del'>-#define MEDIA_AUI_BNC           0x0013  /* Ethernet adapter, AUI/BNC media */</div><div class='del'>-#define MEDIA_AUI_BNC_UTP       0x0014  /* Ethernet adapter, AUI_BNC/UTP */</div><div class='del'>-#define MEDIA_UTPA              0x0015  /* Ethernet UTP-10Mbps Ports A */</div><div class='del'>-#define MEDIA_UTPB              0x0016  /* Ethernet UTP-10Mbps Ports B */</div><div class='del'>-#define MEDIA_STP_16_UTP_16     0x0017  /* Token Ring STP-16Mbps/UTP-16Mbps */</div><div class='del'>-#define MEDIA_STP_4_UTP_4       0x0018  /* Token Ring STP-4Mbps/UTP-4Mbps */</div><div class='del'>-</div><div class='del'>-#define MEDIA_STP100_UTP100     0x0020  /* Ethernet STP-100Mbps/UTP-100Mbps */</div><div class='del'>-#define MEDIA_UTP100FD          0x0021  /* Ethernet UTP-100Mbps, full duplex */</div><div class='del'>-#define MEDIA_UTP100            0x0022  /* Ethernet UTP-100Mbps */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define MEDIA_UNKNOWN           0xFFFF  /* Unknown adapter/media type   */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for the field:</div><div class='del'>- * media_type2</div><div class='del'>- */</div><div class='del'>-#define MEDIA_TYPE_MII              0x0001</div><div class='del'>-#define MEDIA_TYPE_UTP              0x0002</div><div class='del'>-#define MEDIA_TYPE_BNC              0x0004</div><div class='del'>-#define MEDIA_TYPE_AUI              0x0008</div><div class='del'>-#define MEDIA_TYPE_S10              0x0010</div><div class='del'>-#define MEDIA_TYPE_AUTO_SENSE       0x1000</div><div class='del'>-#define MEDIA_TYPE_AUTO_DETECT      0x4000</div><div class='del'>-#define MEDIA_TYPE_AUTO_NEGOTIATE   0x8000</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for the field:</div><div class='del'>- * line_speed</div><div class='del'>- */</div><div class='del'>-#define LINE_SPEED_UNKNOWN          0x0000</div><div class='del'>-#define LINE_SPEED_4                0x0001</div><div class='del'>-#define LINE_SPEED_10               0x0002</div><div class='del'>-#define LINE_SPEED_16               0x0004</div><div class='del'>-#define LINE_SPEED_100              0x0008</div><div class='del'>-#define LINE_SPEED_T4               0x0008  /* 100BaseT4 aliased for 9332BVT */</div><div class='del'>-#define LINE_SPEED_FULL_DUPLEX      0x8000</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for the field:</div><div class='del'>- * bic_type (Bus interface chip type)</div><div class='del'>- */</div><div class='del'>-#define BIC_NO_CHIP             0x0000  /* Bus interface chip not implemented */</div><div class='del'>-#define BIC_583_CHIP            0x0001  /* 83C583 bus interface chip */</div><div class='del'>-#define BIC_584_CHIP            0x0002  /* 83C584 bus interface chip */</div><div class='del'>-#define BIC_585_CHIP            0x0003  /* 83C585 bus interface chip */</div><div class='del'>-#define BIC_593_CHIP            0x0004  /* 83C593 bus interface chip */</div><div class='del'>-#define BIC_594_CHIP            0x0005  /* 83C594 bus interface chip */</div><div class='del'>-#define BIC_564_CHIP            0x0006  /* PCMCIA Bus interface chip */</div><div class='del'>-#define BIC_790_CHIP            0x0007  /* 83C790 bus i-face/Ethernet NIC chip */</div><div class='del'>-#define BIC_571_CHIP            0x0008  /* 83C571 EISA bus master i-face */</div><div class='del'>-#define BIC_587_CHIP            0x0009  /* Token Ring AT bus master i-face */</div><div class='del'>-#define BIC_574_CHIP            0x0010  /* FEAST bus interface chip */</div><div class='del'>-#define BIC_8432_CHIP           0x0011  /* 8432 bus i-face/Ethernet NIC(DEC PCI) */</div><div class='del'>-#define BIC_9332_CHIP           0x0012  /* 9332 bus i-face/100Mbps Ether NIC(DEC PCI) */</div><div class='del'>-#define BIC_8432E_CHIP          0x0013  /* 8432 Enhanced bus iface/Ethernet NIC(DEC) */</div><div class='del'>-#define BIC_EPIC100_CHIP        0x0014  /* EPIC/100 10/100 Mbps Ethernet BIC/NIC */</div><div class='del'>-#define BIC_C94_CHIP            0x0015  /* 91C94 bus i-face in PCMCIA mode */</div><div class='del'>-#define BIC_X8020_CHIP          0x0016  /* Xilinx PCMCIA multi-func i-face */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for the field:</div><div class='del'>- * nic_type (Bus interface chip type)</div><div class='del'>- */</div><div class='del'>-#define NIC_UNK_CHIP            0x0000  /* Unknown NIC chip      */</div><div class='del'>-#define NIC_8390_CHIP           0x0001  /* DP8390 Ethernet NIC   */</div><div class='del'>-#define NIC_690_CHIP            0x0002  /* 83C690 Ethernet NIC   */</div><div class='del'>-#define NIC_825_CHIP            0x0003  /* 83C825 Token Ring NIC */</div><div class='del'>-/*      #define NIC_???_CHIP    0x0004  */ /* Not used           */</div><div class='del'>-/*      #define NIC_???_CHIP    0x0005  */ /* Not used           */</div><div class='del'>-/*      #define NIC_???_CHIP    0x0006  */ /* Not used           */</div><div class='del'>-#define NIC_790_CHIP            0x0007  /* 83C790 bus i-face/Ethernet NIC chip */</div><div class='del'>-#define NIC_C100_CHIP           0x0010  /* FEAST 100Mbps Ethernet NIC */</div><div class='del'>-#define NIC_8432_CHIP           0x0011  /* 8432 bus i-face/Ethernet NIC(DEC PCI) */</div><div class='del'>-#define NIC_9332_CHIP           0x0012  /* 9332 bus i-face/100Mbps Ether NIC(DEC PCI) */</div><div class='del'>-#define NIC_8432E_CHIP          0x0013  /* 8432 enhanced bus iface/Ethernet NIC(DEC) */</div><div class='del'>-#define NIC_EPIC100_CHIP        0x0014   /* EPIC/100 10/100 Mbps Ethernet BIC/NIC */</div><div class='del'>-#define NIC_C94_CHIP            0x0015  /* 91C94 PC Card with multi func */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Definitions for the field:</div><div class='del'>- * adapter_type The adapter_type field describes the adapter/bus</div><div class='del'>- *              configuration.</div><div class='del'>- */</div><div class='del'>-#define BUS_ISA16_TYPE          0x0001  /* 16 bit adap in 16 bit (E)ISA slot  */</div><div class='del'>-#define BUS_ISA8_TYPE           0x0002  /* 8/16b adap in 8 bit XT/(E)ISA slot */</div><div class='del'>-#define BUS_MCA_TYPE            0x0003  /* Micro Channel adapter              */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Receive Mask definitions</div><div class='del'>- */</div><div class='del'>-#define ACCEPT_MULTICAST                0x0001</div><div class='del'>-#define ACCEPT_BROADCAST                0x0002</div><div class='del'>-#define PROMISCUOUS_MODE                0x0004</div><div class='del'>-#define ACCEPT_SOURCE_ROUTING           0x0008</div><div class='del'>-#define ACCEPT_ERR_PACKETS              0x0010</div><div class='del'>-#define ACCEPT_ATT_MAC_FRAMES           0x0020</div><div class='del'>-#define ACCEPT_MULTI_PROM               0x0040</div><div class='del'>-#define TRANSMIT_ONLY                   0x0080</div><div class='del'>-#define ACCEPT_EXT_MAC_FRAMES           0x0100</div><div class='del'>-#define EARLY_RX_ENABLE                 0x0200</div><div class='del'>-#define PKT_SIZE_NOT_NEEDED             0x0400</div><div class='del'>-#define ACCEPT_SOURCE_ROUTING_SPANNING  0x0808</div><div class='del'>-</div><div class='del'>-#define ACCEPT_ALL_MAC_FRAMES           0x0120</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * config_mode defs</div><div class='del'>- */</div><div class='del'>-#define STORE_EEROM             0x0001  /* Store config in EEROM. */</div><div class='del'>-#define STORE_REGS              0x0002  /* Store config in register set. */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * equates for lmac_flags in adapter structure (Ethernet)</div><div class='del'>- */</div><div class='del'>-#define         MEM_DISABLE     0x0001</div><div class='del'>-#define         RX_STATUS_POLL  0x0002</div><div class='del'>-#define         USE_RE_BIT      0x0004</div><div class='del'>-/*#define       RESERVED        0x0008 */</div><div class='del'>-/*#define       RESERVED        0x0010 */</div><div class='del'>-/*#define       RESERVED        0x0020 */</div><div class='del'>-/*#define       RESERVED        0x0040 */</div><div class='del'>-/*#define       RESERVED        0x0080 */</div><div class='del'>-/*#define       RESERVED        0x0100 */</div><div class='del'>-/*#define       RESERVED        0x0200 */</div><div class='del'>-/*#define       RESERVED        0x0400 */</div><div class='del'>-/*#define       RESERVED        0x0800 */</div><div class='del'>-/*#define       RESERVED        0x1000 */</div><div class='del'>-/*#define       RESERVED        0x2000 */</div><div class='del'>-/*#define       RESERVED        0x4000 */</div><div class='del'>-/*#define       RESERVED        0x8000 */</div><div class='del'>-</div><div class='del'>-/* media_opts &amp; media_set Fields bit defs for Ethernet ... */</div><div class='del'>-#define         MED_OPT_BNC     0x01</div><div class='del'>-#define         MED_OPT_UTP     0x02</div><div class='del'>-#define         MED_OPT_AUI     0x04</div><div class='del'>-#define         MED_OPT_10MB    0x08</div><div class='del'>-#define         MED_OPT_100MB   0x10</div><div class='del'>-#define         MED_OPT_S10     0x20</div><div class='del'>-</div><div class='del'>-/* media_opts &amp; media_set Fields bit defs for Token Ring ... */</div><div class='del'>-#define         MED_OPT_4MB     0x08</div><div class='del'>-#define         MED_OPT_16MB    0x10</div><div class='del'>-#define         MED_OPT_STP     0x40</div><div class='del'>-</div><div class='del'>-#define MAX_8023_SIZE           1500    /* Max 802.3 size of frame. */</div><div class='del'>-#define DEFAULT_ERX_VALUE       4       /* Number of 16-byte blocks for 790B early Rx. */</div><div class='del'>-#define DEFAULT_ETX_VALUE       32      /* Number of bytes for 790B early Tx. */</div><div class='del'>-#define DEFAULT_TX_RETRIES      3       /* Number of transmit retries */</div><div class='del'>-#define LPBK_FRAME_SIZE         1024    /* Default loopback frame for Rx calibration test. */</div><div class='del'>-#define MAX_LOOKAHEAD_SIZE      252     /* Max lookahead size for ethernet. */</div><div class='del'>-</div><div class='del'>-#define RW_MAC_STATE                    0x1101</div><div class='del'>-#define RW_SA_OF_LAST_AMP_OR_SMP        0x2803</div><div class='del'>-#define RW_PHYSICAL_DROP_NUMBER         0x3B02</div><div class='del'>-#define RW_UPSTREAM_NEIGHBOR_ADDRESS    0x3E03</div><div class='del'>-#define RW_PRODUCT_INSTANCE_ID          0x4B09</div><div class='del'>-</div><div class='del'>-#define RW_TRC_STATUS_BLOCK             0x5412</div><div class='del'>-</div><div class='del'>-#define RW_MAC_ERROR_COUNTERS_NO_CLEAR  0x8006</div><div class='del'>-#define RW_MAC_ERROR_COUNTER_CLEAR      0x7A06</div><div class='del'>-#define RW_CONFIG_REGISTER_0            0xA001</div><div class='del'>-#define RW_CONFIG_REGISTER_1            0xA101</div><div class='del'>-#define RW_PRESCALE_TIMER_THRESHOLD     0xA201</div><div class='del'>-#define RW_TPT_THRESHOLD                0xA301</div><div class='del'>-#define RW_TQP_THRESHOLD                0xA401</div><div class='del'>-#define RW_TNT_THRESHOLD                0xA501</div><div class='del'>-#define RW_TBT_THRESHOLD                0xA601</div><div class='del'>-#define RW_TSM_THRESHOLD                0xA701</div><div class='del'>-#define RW_TAM_THRESHOLD                0xA801</div><div class='del'>-#define RW_TBR_THRESHOLD                0xA901</div><div class='del'>-#define RW_TER_THRESHOLD                0xAA01</div><div class='del'>-#define RW_TGT_THRESHOLD                0xAB01</div><div class='del'>-#define RW_THT_THRESHOLD                0xAC01</div><div class='del'>-#define RW_TRR_THRESHOLD                0xAD01</div><div class='del'>-#define RW_TVX_THRESHOLD                0xAE01</div><div class='del'>-#define RW_INDIVIDUAL_MAC_ADDRESS       0xB003</div><div class='del'>-</div><div class='del'>-#define RW_INDIVIDUAL_GROUP_ADDRESS     0xB303  /* all of group addr */</div><div class='del'>-#define RW_INDIVIDUAL_GROUP_ADDR_WORD_0 0xB301  /* 1st word of group addr */</div><div class='del'>-#define RW_INDIVIDUAL_GROUP_ADDR        0xB402  /* 2nd-3rd word of group addr */</div><div class='del'>-#define RW_FUNCTIONAL_ADDRESS           0xB603  /* all of functional addr */</div><div class='del'>-#define RW_FUNCTIONAL_ADDR_WORD_0       0xB601  /* 1st word of func  addr */</div><div class='del'>-#define RW_FUNCTIONAL_ADDR              0xB702  /* 2nd-3rd word func addr */</div><div class='del'>-</div><div class='del'>-#define RW_BIT_SIGNIFICANT_GROUP_ADDR   0xB902</div><div class='del'>-#define RW_SOURCE_RING_BRIDGE_NUMBER    0xBB01</div><div class='del'>-#define RW_TARGET_RING_NUMBER           0xBC01</div><div class='del'>-</div><div class='del'>-#define RW_HIC_INTERRUPT_MASK           0xC601</div><div class='del'>-</div><div class='del'>-#define SOURCE_ROUTING_SPANNING_BITS    0x00C0  /* Spanning Tree Frames */</div><div class='del'>-#define SOURCE_ROUTING_EXPLORER_BIT     0x0040  /* Explorer and Single Route */</div><div class='del'>-</div><div class='del'>-        /* write */</div><div class='del'>-</div><div class='del'>-#define CSR_MSK_ALL             0x80    // Bic 587 Only</div><div class='del'>-#define CSR_MSKTINT             0x20</div><div class='del'>-#define CSR_MSKCBUSY            0x10</div><div class='del'>-#define CSR_CLRTINT             0x08</div><div class='del'>-#define CSR_CLRCBUSY            0x04</div><div class='del'>-#define CSR_WCSS                0x02</div><div class='del'>-#define CSR_CA                  0x01</div><div class='del'>-</div><div class='del'>-        /* read */</div><div class='del'>-</div><div class='del'>-#define CSR_TINT                0x20</div><div class='del'>-#define CSR_CINT                0x10</div><div class='del'>-#define CSR_TSTAT               0x08</div><div class='del'>-#define CSR_CSTAT               0x04</div><div class='del'>-#define CSR_FAULT               0x02</div><div class='del'>-#define CSR_CBUSY               0x01</div><div class='del'>-</div><div class='del'>-#define LAAR_MEM16ENB           0x80</div><div class='del'>-#define Zws16                   0x20</div><div class='del'>-</div><div class='del'>-#define IRR_IEN                 0x80</div><div class='del'>-#define Zws8                    0x01</div><div class='del'>-</div><div class='del'>-#define IMCCR_EIL               0x04</div><div class='del'>-</div><div class='del'>-typedef struct {</div><div class='del'>-        __u8            ac;                             /* Access Control */</div><div class='del'>-        __u8            fc;                             /* Frame Control */</div><div class='del'>-        __u8            da[6];                          /* Dest Addr */</div><div class='del'>-        __u8            sa[6];                          /* Source Addr */</div><div class='del'>-</div><div class='del'>-        __u16            vl;                             /* Vector Length */</div><div class='del'>-        __u8            dc_sc;                          /* Dest/Source Class */</div><div class='del'>-        __u8            vc;                             /* Vector Code */</div><div class='del'>-        } MAC_HEADER;</div><div class='del'>-</div><div class='del'>-#define MAX_SUB_VECTOR_INFO     (RX_DATA_BUFFER_SIZE - sizeof(MAC_HEADER) - 2)</div><div class='del'>-</div><div class='del'>-typedef struct</div><div class='del'>-        {</div><div class='del'>-        __u8            svl;                            /* Sub-vector Length */</div><div class='del'>-        __u8            svi;                            /* Sub-vector Code */</div><div class='del'>-        __u8            svv[MAX_SUB_VECTOR_INFO];       /* Sub-vector Info */</div><div class='del'>-        } MAC_SUB_VECTOR;</div><div class='del'>-</div><div class='del'>-#endif	/* __KERNEL__ */</div><div class='del'>-#endif	/* __LINUX_SMCTR_H */</div><div class='head'>diff --git a/drivers/net/tokenring/tms380tr.c b/drivers/net/tokenring/tms380tr.c<br/>deleted file mode 100644<br/>index be4813e0366c..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/tms380tr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/tms380tr.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,2306 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  tms380tr.c: A network driver library for Texas Instruments TMS380-based</div><div class='del'>- *              Token Ring Adapters.</div><div class='del'>- *</div><div class='del'>- *  Originally sktr.c: Written 1997 by Christoph Goos</div><div class='del'>- *</div><div class='del'>- *  A fine result of the Linux Systems Network Architecture Project.</div><div class='del'>- *  http://www.vanheusden.com/sna/ </div><div class='del'>- *</div><div class='del'>- *  This software may be used and distributed according to the terms</div><div class='del'>- *  of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- *</div><div class='del'>- *  The following modules are currently available for card support:</div><div class='del'>- *	- tmspci (Generic PCI card support)</div><div class='del'>- *	- abyss (Madge PCI support)</div><div class='del'>- *      - tmsisa (SysKonnect TR4/16 ISA)</div><div class='del'>- *</div><div class='del'>- *  Sources:</div><div class='del'>- *  	- The hardware related parts of this driver are take from</div><div class='del'>- *  	  the SysKonnect Token Ring driver for Windows NT.</div><div class='del'>- *  	- I used the IBM Token Ring driver 'ibmtr.c' as a base for this</div><div class='del'>- *  	  driver, as well as the 'skeleton.c' driver by Donald Becker.</div><div class='del'>- *  	- Also various other drivers in the linux source tree were taken</div><div class='del'>- *  	  as samples for some tasks.</div><div class='del'>- *      - TI TMS380 Second-Generation Token Ring User's Guide</div><div class='del'>- *  	- TI datasheets for respective chips</div><div class='del'>- *  	- David Hein at Texas Instruments </div><div class='del'>- *  	- Various Madge employees</div><div class='del'>- *</div><div class='del'>- *  Maintainer(s):</div><div class='del'>- *    JS	Jay Schulist		jschlst@samba.org</div><div class='del'>- *    CG	Christoph Goos		cgoos@syskonnect.de</div><div class='del'>- *    AF	Adam Fritzler</div><div class='del'>- *    MLP       Mike Phillips           phillim@amtrak.com</div><div class='del'>- *    JF	Jochen Friedrich	jochen@scram.de</div><div class='del'>- *     </div><div class='del'>- *  Modification History:</div><div class='del'>- *	29-Aug-97	CG	Created</div><div class='del'>- *	04-Apr-98	CG	Fixed problems caused by tok_timer_check</div><div class='del'>- *	10-Apr-98	CG	Fixed lockups at cable disconnection</div><div class='del'>- *	27-May-98	JS	Formated to Linux Kernel Format</div><div class='del'>- *	31-May-98	JS	Hacked in PCI support</div><div class='del'>- *	16-Jun-98	JS	Modulized for multiple cards with one driver</div><div class='del'>- *	   Sep-99	AF	Renamed to tms380tr (supports more than SK's)</div><div class='del'>- *      23-Sep-99	AF      Added Compaq and Thomas-Conrad PCI support</div><div class='del'>- *				Fixed a bug causing double copies on PCI</div><div class='del'>- *				Fixed for new multicast stuff (2.2/2.3)</div><div class='del'>- *	25-Sep-99	AF	Uped TPL_NUM from 3 to 9</div><div class='del'>- *				Removed extraneous 'No free TPL'</div><div class='del'>- *	22-Dec-99	AF	Added Madge PCI Mk2 support and generalized</div><div class='del'>- *				parts of the initilization procedure.</div><div class='del'>- *	30-Dec-99	AF	Turned tms380tr into a library ala 8390.</div><div class='del'>- *				Madge support is provided in the abyss module</div><div class='del'>- *				Generic PCI support is in the tmspci module.</div><div class='del'>- *	30-Nov-00	JF	Updated PCI code to support IO MMU via</div><div class='del'>- *				pci_map_static(). Alpha uses this MMU for ISA</div><div class='del'>- *				as well.</div><div class='del'>- *      14-Jan-01	JF	Fix DMA on ifdown/ifup sequences. Some </div><div class='del'>- *      			cleanup.</div><div class='del'>- *	13-Jan-02	JF	Add spinlock to fix race condition.</div><div class='del'>- *	09-Nov-02	JF	Fixed printks to not SPAM the console during</div><div class='del'>- *				normal operation.</div><div class='del'>- *	30-Dec-02	JF	Removed incorrect __init from </div><div class='del'>- *				tms380tr_init_card.</div><div class='del'>- *	22-Jul-05	JF	Converted to dma-mapping.</div><div class='del'>- *      			</div><div class='del'>- *  To do:</div><div class='del'>- *    1. Multi/Broadcast packet handling (this may have fixed itself)</div><div class='del'>- *    2. Write a sktrisa module that includes the old ISA support (done)</div><div class='del'>- *    3. Allow modules to load their own microcode</div><div class='del'>- *    4. Speed up the BUD process -- freezing the kernel for 3+sec is</div><div class='del'>- *         quite unacceptable.</div><div class='del'>- *    5. Still a few remaining stalls when the cable is unplugged.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='del'>-static const char version[] = "tms380tr.c: v1.10 30/12/2002 by Christoph Goos, Adam Fritzler\n";</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/fcntl.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/time.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='del'>-#include &lt;linux/firmware.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-#include "tms380tr.h"		/* Our Stuff */</div><div class='del'>-</div><div class='del'>-/* Use 0 for production, 1 for verification, 2 for debug, and</div><div class='del'>- * 3 for very verbose debug.</div><div class='del'>- */</div><div class='del'>-#ifndef TMS380TR_DEBUG</div><div class='del'>-#define TMS380TR_DEBUG 0</div><div class='del'>-#endif</div><div class='del'>-static unsigned int tms380tr_debug = TMS380TR_DEBUG;</div><div class='del'>-</div><div class='del'>-/* Index to functions, as function prototypes.</div><div class='del'>- * Alphabetical by function name.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* "A" */</div><div class='del'>-/* "B" */</div><div class='del'>-static int      tms380tr_bringup_diags(struct net_device *dev);</div><div class='del'>-/* "C" */</div><div class='del'>-static void	tms380tr_cancel_tx_queue(struct net_local* tp);</div><div class='del'>-static int 	tms380tr_chipset_init(struct net_device *dev);</div><div class='del'>-static void 	tms380tr_chk_irq(struct net_device *dev);</div><div class='del'>-static void 	tms380tr_chk_outstanding_cmds(struct net_device *dev);</div><div class='del'>-static void 	tms380tr_chk_src_addr(unsigned char *frame, unsigned char *hw_addr);</div><div class='del'>-static unsigned char tms380tr_chk_ssb(struct net_local *tp, unsigned short IrqType);</div><div class='del'>-int	 	tms380tr_close(struct net_device *dev);</div><div class='del'>-static void 	tms380tr_cmd_status_irq(struct net_device *dev);</div><div class='del'>-/* "D" */</div><div class='del'>-static void 	tms380tr_disable_interrupts(struct net_device *dev);</div><div class='del'>-#if TMS380TR_DEBUG &gt; 0</div><div class='del'>-static void 	tms380tr_dump(unsigned char *Data, int length);</div><div class='del'>-#endif</div><div class='del'>-/* "E" */</div><div class='del'>-static void 	tms380tr_enable_interrupts(struct net_device *dev);</div><div class='del'>-static void 	tms380tr_exec_cmd(struct net_device *dev, unsigned short Command);</div><div class='del'>-static void 	tms380tr_exec_sifcmd(struct net_device *dev, unsigned int WriteValue);</div><div class='del'>-/* "F" */</div><div class='del'>-/* "G" */</div><div class='del'>-static struct net_device_stats *tms380tr_get_stats(struct net_device *dev);</div><div class='del'>-/* "H" */</div><div class='del'>-static netdev_tx_t tms380tr_hardware_send_packet(struct sk_buff *skb,</div><div class='del'>-						       struct net_device *dev);</div><div class='del'>-/* "I" */</div><div class='del'>-static int 	tms380tr_init_adapter(struct net_device *dev);</div><div class='del'>-static void 	tms380tr_init_ipb(struct net_local *tp);</div><div class='del'>-static void 	tms380tr_init_net_local(struct net_device *dev);</div><div class='del'>-static void 	tms380tr_init_opb(struct net_device *dev);</div><div class='del'>-/* "M" */</div><div class='del'>-/* "O" */</div><div class='del'>-int		tms380tr_open(struct net_device *dev);</div><div class='del'>-static void	tms380tr_open_adapter(struct net_device *dev);</div><div class='del'>-/* "P" */</div><div class='del'>-/* "R" */</div><div class='del'>-static void 	tms380tr_rcv_status_irq(struct net_device *dev);</div><div class='del'>-static int 	tms380tr_read_ptr(struct net_device *dev);</div><div class='del'>-static void 	tms380tr_read_ram(struct net_device *dev, unsigned char *Data,</div><div class='del'>-			unsigned short Address, int Length);</div><div class='del'>-static int 	tms380tr_reset_adapter(struct net_device *dev);</div><div class='del'>-static void 	tms380tr_reset_interrupt(struct net_device *dev);</div><div class='del'>-static void 	tms380tr_ring_status_irq(struct net_device *dev);</div><div class='del'>-/* "S" */</div><div class='del'>-static netdev_tx_t tms380tr_send_packet(struct sk_buff *skb,</div><div class='del'>-					      struct net_device *dev);</div><div class='del'>-static void 	tms380tr_set_multicast_list(struct net_device *dev);</div><div class='del'>-static int	tms380tr_set_mac_address(struct net_device *dev, void *addr);</div><div class='del'>-/* "T" */</div><div class='del'>-static void 	tms380tr_timer_chk(unsigned long data);</div><div class='del'>-static void 	tms380tr_timer_end_wait(unsigned long data);</div><div class='del'>-static void 	tms380tr_tx_status_irq(struct net_device *dev);</div><div class='del'>-/* "U" */</div><div class='del'>-static void 	tms380tr_update_rcv_stats(struct net_local *tp,</div><div class='del'>-			unsigned char DataPtr[], unsigned int Length);</div><div class='del'>-/* "W" */</div><div class='del'>-void	 	tms380tr_wait(unsigned long time);</div><div class='del'>-static void 	tms380tr_write_rpl_status(RPL *rpl, unsigned int Status);</div><div class='del'>-static void 	tms380tr_write_tpl_status(TPL *tpl, unsigned int Status);</div><div class='del'>-</div><div class='del'>-#define SIFREADB(reg) \</div><div class='del'>-	(((struct net_local *)netdev_priv(dev))-&gt;sifreadb(dev, reg))</div><div class='del'>-#define SIFWRITEB(val, reg) \</div><div class='del'>-	(((struct net_local *)netdev_priv(dev))-&gt;sifwriteb(dev, val, reg))</div><div class='del'>-#define SIFREADW(reg) \</div><div class='del'>-	(((struct net_local *)netdev_priv(dev))-&gt;sifreadw(dev, reg))</div><div class='del'>-#define SIFWRITEW(val, reg) \</div><div class='del'>-	(((struct net_local *)netdev_priv(dev))-&gt;sifwritew(dev, val, reg))</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#if 0 /* TMS380TR_DEBUG &gt; 0 */</div><div class='del'>-static int madgemc_sifprobe(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        unsigned char old, chk1, chk2;</div><div class='del'>-	</div><div class='del'>-	old = SIFREADB(SIFADR);  /* Get the old SIFADR value */</div><div class='del'>-</div><div class='del'>-        chk1 = 0;       /* Begin with check value 0 */</div><div class='del'>-        do {</div><div class='del'>-		madgemc_setregpage(dev, 0);</div><div class='del'>-                /* Write new SIFADR value */</div><div class='del'>-		SIFWRITEB(chk1, SIFADR);</div><div class='del'>-		chk2 = SIFREADB(SIFADR);</div><div class='del'>-		if (chk2 != chk1)</div><div class='del'>-			return -1;</div><div class='del'>-		</div><div class='del'>-		madgemc_setregpage(dev, 1);</div><div class='del'>-                /* Read, invert and write */</div><div class='del'>-		chk2 = SIFREADB(SIFADD);</div><div class='del'>-		if (chk2 != chk1)</div><div class='del'>-			return -1;</div><div class='del'>-</div><div class='del'>-		madgemc_setregpage(dev, 0);</div><div class='del'>-                chk2 ^= 0x0FE;</div><div class='del'>-		SIFWRITEB(chk2, SIFADR);</div><div class='del'>-</div><div class='del'>-                /* Read, invert and compare */</div><div class='del'>-		madgemc_setregpage(dev, 1);</div><div class='del'>-		chk2 = SIFREADB(SIFADD);</div><div class='del'>-		madgemc_setregpage(dev, 0);</div><div class='del'>-                chk2 ^= 0x0FE;</div><div class='del'>-</div><div class='del'>-                if(chk1 != chk2)</div><div class='del'>-                        return -1;    /* No adapter */</div><div class='del'>-                chk1 -= 2;</div><div class='del'>-        } while(chk1 != 0);     /* Repeat 128 times (all byte values) */</div><div class='del'>-</div><div class='del'>-	madgemc_setregpage(dev, 0); /* sanity */</div><div class='del'>-        /* Restore the SIFADR value */</div><div class='del'>-	SIFWRITEB(old, SIFADR);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Open/initialize the board. This is called sometime after</div><div class='del'>- * booting when the 'ifconfig' program is run.</div><div class='del'>- *</div><div class='del'>- * This routine should set everything up anew at each open, even</div><div class='del'>- * registers that "should" only need to be set once at boot, so that</div><div class='del'>- * there is non-reboot way to recover if something goes wrong.</div><div class='del'>- */</div><div class='del'>-int tms380tr_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-	</div><div class='del'>-	/* init the spinlock */</div><div class='del'>-	spin_lock_init(&amp;tp-&gt;lock);</div><div class='del'>-	init_timer(&amp;tp-&gt;timer);</div><div class='del'>-</div><div class='del'>-	/* Reset the hardware here. Don't forget to set the station address. */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ISA</div><div class='del'>-	if(dev-&gt;dma &gt; 0) </div><div class='del'>-	{</div><div class='del'>-		unsigned long flags=claim_dma_lock();</div><div class='del'>-		disable_dma(dev-&gt;dma);</div><div class='del'>-		set_dma_mode(dev-&gt;dma, DMA_MODE_CASCADE);</div><div class='del'>-		enable_dma(dev-&gt;dma);</div><div class='del'>-		release_dma_lock(flags);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	</div><div class='del'>-	err = tms380tr_chipset_init(dev);</div><div class='del'>-  	if(err)</div><div class='del'>-	{</div><div class='del'>-		printk(KERN_INFO "%s: Chipset initialization error\n", </div><div class='del'>-			dev-&gt;name);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tp-&gt;timer.expires	= jiffies + 30*HZ;</div><div class='del'>-	tp-&gt;timer.function	= tms380tr_timer_end_wait;</div><div class='del'>-	tp-&gt;timer.data		= (unsigned long)dev;</div><div class='del'>-	add_timer(&amp;tp-&gt;timer);</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "%s: Adapter RAM size: %dK\n", </div><div class='del'>-	       dev-&gt;name, tms380tr_read_ptr(dev));</div><div class='del'>-</div><div class='del'>-	tms380tr_enable_interrupts(dev);</div><div class='del'>-	tms380tr_open_adapter(dev);</div><div class='del'>-</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-	</div><div class='del'>-	/* Wait for interrupt from hardware. If interrupt does not come,</div><div class='del'>-	 * there will be a timeout from the timer.</div><div class='del'>-	 */</div><div class='del'>-	tp-&gt;Sleeping = 1;</div><div class='del'>-	interruptible_sleep_on(&amp;tp-&gt;wait_for_tok_int);</div><div class='del'>-	del_timer(&amp;tp-&gt;timer);</div><div class='del'>-</div><div class='del'>-	/* If AdapterVirtOpenFlag is 1, the adapter is now open for use */</div><div class='del'>-	if(tp-&gt;AdapterVirtOpenFlag == 0)</div><div class='del'>-	{</div><div class='del'>-		tms380tr_disable_interrupts(dev);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tp-&gt;StartTime = jiffies;</div><div class='del'>-</div><div class='del'>-	/* Start function control timer */</div><div class='del'>-	tp-&gt;timer.expires	= jiffies + 2*HZ;</div><div class='del'>-	tp-&gt;timer.function	= tms380tr_timer_chk;</div><div class='del'>-	tp-&gt;timer.data		= (unsigned long)dev;</div><div class='del'>-	add_timer(&amp;tp-&gt;timer);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Timeout function while waiting for event</div><div class='del'>- */</div><div class='del'>-static void tms380tr_timer_end_wait(unsigned long data)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device*)data;</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if(tp-&gt;Sleeping)</div><div class='del'>-	{</div><div class='del'>-		tp-&gt;Sleeping = 0;</div><div class='del'>-		wake_up_interruptible(&amp;tp-&gt;wait_for_tok_int);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initialize the chipset</div><div class='del'>- */</div><div class='del'>-static int tms380tr_chipset_init(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	tms380tr_init_ipb(tp);</div><div class='del'>-	tms380tr_init_opb(dev);</div><div class='del'>-	tms380tr_init_net_local(dev);</div><div class='del'>-</div><div class='del'>-	if(tms380tr_debug &gt; 3)</div><div class='del'>-		printk(KERN_DEBUG "%s: Resetting adapter...\n", dev-&gt;name);</div><div class='del'>-	err = tms380tr_reset_adapter(dev);</div><div class='del'>-	if(err &lt; 0)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if(tms380tr_debug &gt; 3)</div><div class='del'>-		printk(KERN_DEBUG "%s: Bringup diags...\n", dev-&gt;name);</div><div class='del'>-	err = tms380tr_bringup_diags(dev);</div><div class='del'>-	if(err &lt; 0)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if(tms380tr_debug &gt; 3)</div><div class='del'>-		printk(KERN_DEBUG "%s: Init adapter...\n", dev-&gt;name);</div><div class='del'>-	err = tms380tr_init_adapter(dev);</div><div class='del'>-	if(err &lt; 0)</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	if(tms380tr_debug &gt; 3)</div><div class='del'>-		printk(KERN_DEBUG "%s: Done!\n", dev-&gt;name);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initializes the net_local structure.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_init_net_local(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	int i;</div><div class='del'>-	dma_addr_t dmabuf;</div><div class='del'>-</div><div class='del'>-	tp-&gt;scb.CMD	= 0;</div><div class='del'>-	tp-&gt;scb.Parm[0] = 0;</div><div class='del'>-	tp-&gt;scb.Parm[1] = 0;</div><div class='del'>-</div><div class='del'>-	tp-&gt;ssb.STS	= 0;</div><div class='del'>-	tp-&gt;ssb.Parm[0] = 0;</div><div class='del'>-	tp-&gt;ssb.Parm[1] = 0;</div><div class='del'>-	tp-&gt;ssb.Parm[2] = 0;</div><div class='del'>-</div><div class='del'>-	tp-&gt;CMDqueue	= 0;</div><div class='del'>-</div><div class='del'>-	tp-&gt;AdapterOpenFlag	= 0;</div><div class='del'>-	tp-&gt;AdapterVirtOpenFlag = 0;</div><div class='del'>-	tp-&gt;ScbInUse		= 0;</div><div class='del'>-	tp-&gt;OpenCommandIssued	= 0;</div><div class='del'>-	tp-&gt;ReOpenInProgress	= 0;</div><div class='del'>-	tp-&gt;HaltInProgress	= 0;</div><div class='del'>-	tp-&gt;TransmitHaltScheduled = 0;</div><div class='del'>-	tp-&gt;LobeWireFaultLogged	= 0;</div><div class='del'>-	tp-&gt;LastOpenStatus	= 0;</div><div class='del'>-	tp-&gt;MaxPacketSize	= DEFAULT_PACKET_SIZE;</div><div class='del'>-</div><div class='del'>-	/* Create circular chain of transmit lists */</div><div class='del'>-	for (i = 0; i &lt; TPL_NUM; i++)</div><div class='del'>-	{</div><div class='del'>-		tp-&gt;Tpl[i].NextTPLAddr = htonl(((char *)(&amp;tp-&gt;Tpl[(i+1) % TPL_NUM]) - (char *)tp) + tp-&gt;dmabuffer); /* DMA buffer may be MMU driven */</div><div class='del'>-		tp-&gt;Tpl[i].Status	= 0;</div><div class='del'>-		tp-&gt;Tpl[i].FrameSize	= 0;</div><div class='del'>-		tp-&gt;Tpl[i].FragList[0].DataCount	= 0;</div><div class='del'>-		tp-&gt;Tpl[i].FragList[0].DataAddr		= 0;</div><div class='del'>-		tp-&gt;Tpl[i].NextTPLPtr	= &amp;tp-&gt;Tpl[(i+1) % TPL_NUM];</div><div class='del'>-		tp-&gt;Tpl[i].MData	= NULL;</div><div class='del'>-		tp-&gt;Tpl[i].TPLIndex	= i;</div><div class='del'>-		tp-&gt;Tpl[i].DMABuff	= 0;</div><div class='del'>-		tp-&gt;Tpl[i].BusyFlag	= 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tp-&gt;TplFree = tp-&gt;TplBusy = &amp;tp-&gt;Tpl[0];</div><div class='del'>-</div><div class='del'>-	/* Create circular chain of receive lists */</div><div class='del'>-	for (i = 0; i &lt; RPL_NUM; i++)</div><div class='del'>-	{</div><div class='del'>-		tp-&gt;Rpl[i].NextRPLAddr = htonl(((char *)(&amp;tp-&gt;Rpl[(i+1) % RPL_NUM]) - (char *)tp) + tp-&gt;dmabuffer); /* DMA buffer may be MMU driven */</div><div class='del'>-		tp-&gt;Rpl[i].Status = (RX_VALID | RX_START_FRAME | RX_END_FRAME | RX_FRAME_IRQ);</div><div class='del'>-		tp-&gt;Rpl[i].FrameSize = 0;</div><div class='del'>-		tp-&gt;Rpl[i].FragList[0].DataCount = cpu_to_be16((unsigned short)tp-&gt;MaxPacketSize);</div><div class='del'>-</div><div class='del'>-		/* Alloc skb and point adapter to data area */</div><div class='del'>-		tp-&gt;Rpl[i].Skb = dev_alloc_skb(tp-&gt;MaxPacketSize);</div><div class='del'>-			tp-&gt;Rpl[i].DMABuff = 0;</div><div class='del'>-</div><div class='del'>-		/* skb == NULL ? then use local buffer */</div><div class='del'>-		if(tp-&gt;Rpl[i].Skb == NULL)</div><div class='del'>-		{</div><div class='del'>-			tp-&gt;Rpl[i].SkbStat = SKB_UNAVAILABLE;</div><div class='del'>-			tp-&gt;Rpl[i].FragList[0].DataAddr = htonl(((char *)tp-&gt;LocalRxBuffers[i] - (char *)tp) + tp-&gt;dmabuffer);</div><div class='del'>-			tp-&gt;Rpl[i].MData = tp-&gt;LocalRxBuffers[i];</div><div class='del'>-		}</div><div class='del'>-		else	/* SKB != NULL */</div><div class='del'>-		{</div><div class='del'>-			tp-&gt;Rpl[i].Skb-&gt;dev = dev;</div><div class='del'>-			skb_put(tp-&gt;Rpl[i].Skb, tp-&gt;MaxPacketSize);</div><div class='del'>-</div><div class='del'>-			/* data unreachable for DMA ? then use local buffer */</div><div class='del'>-			dmabuf = dma_map_single(tp-&gt;pdev, tp-&gt;Rpl[i].Skb-&gt;data, tp-&gt;MaxPacketSize, DMA_FROM_DEVICE);</div><div class='del'>-			if(tp-&gt;dmalimit &amp;&amp; (dmabuf + tp-&gt;MaxPacketSize &gt; tp-&gt;dmalimit))</div><div class='del'>-			{</div><div class='del'>-				tp-&gt;Rpl[i].SkbStat = SKB_DATA_COPY;</div><div class='del'>-				tp-&gt;Rpl[i].FragList[0].DataAddr = htonl(((char *)tp-&gt;LocalRxBuffers[i] - (char *)tp) + tp-&gt;dmabuffer);</div><div class='del'>-				tp-&gt;Rpl[i].MData = tp-&gt;LocalRxBuffers[i];</div><div class='del'>-			}</div><div class='del'>-			else	/* DMA directly in skb-&gt;data */</div><div class='del'>-			{</div><div class='del'>-				tp-&gt;Rpl[i].SkbStat = SKB_DMA_DIRECT;</div><div class='del'>-				tp-&gt;Rpl[i].FragList[0].DataAddr = htonl(dmabuf);</div><div class='del'>-				tp-&gt;Rpl[i].MData = tp-&gt;Rpl[i].Skb-&gt;data;</div><div class='del'>-				tp-&gt;Rpl[i].DMABuff = dmabuf;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		tp-&gt;Rpl[i].NextRPLPtr = &amp;tp-&gt;Rpl[(i+1) % RPL_NUM];</div><div class='del'>-		tp-&gt;Rpl[i].RPLIndex = i;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tp-&gt;RplHead = &amp;tp-&gt;Rpl[0];</div><div class='del'>-	tp-&gt;RplTail = &amp;tp-&gt;Rpl[RPL_NUM-1];</div><div class='del'>-	tp-&gt;RplTail-&gt;Status = (RX_START_FRAME | RX_END_FRAME | RX_FRAME_IRQ);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initializes the initialisation parameter block.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_init_ipb(struct net_local *tp)</div><div class='del'>-{</div><div class='del'>-	tp-&gt;ipb.Init_Options	= BURST_MODE;</div><div class='del'>-	tp-&gt;ipb.CMD_Status_IV	= 0;</div><div class='del'>-	tp-&gt;ipb.TX_IV		= 0;</div><div class='del'>-	tp-&gt;ipb.RX_IV		= 0;</div><div class='del'>-	tp-&gt;ipb.Ring_Status_IV	= 0;</div><div class='del'>-	tp-&gt;ipb.SCB_Clear_IV	= 0;</div><div class='del'>-	tp-&gt;ipb.Adapter_CHK_IV	= 0;</div><div class='del'>-	tp-&gt;ipb.RX_Burst_Size	= BURST_SIZE;</div><div class='del'>-	tp-&gt;ipb.TX_Burst_Size	= BURST_SIZE;</div><div class='del'>-	tp-&gt;ipb.DMA_Abort_Thrhld = DMA_RETRIES;</div><div class='del'>-	tp-&gt;ipb.SCB_Addr	= 0;</div><div class='del'>-	tp-&gt;ipb.SSB_Addr	= 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initializes the open parameter block.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_init_opb(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp;</div><div class='del'>-	unsigned long Addr;</div><div class='del'>-	unsigned short RplSize    = RPL_SIZE;</div><div class='del'>-	unsigned short TplSize    = TPL_SIZE;</div><div class='del'>-	unsigned short BufferSize = BUFFER_SIZE;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	tp-&gt;ocpl.OPENOptions 	 = 0;</div><div class='del'>-	tp-&gt;ocpl.OPENOptions 	|= ENABLE_FULL_DUPLEX_SELECTION;</div><div class='del'>-	tp-&gt;ocpl.FullDuplex 	 = 0;</div><div class='del'>-	tp-&gt;ocpl.FullDuplex 	|= OPEN_FULL_DUPLEX_OFF;</div><div class='del'>-</div><div class='del'>-        /* </div><div class='del'>-	 * Set node address </div><div class='del'>-	 *</div><div class='del'>-	 * We go ahead and put it in the OPB even though on</div><div class='del'>-	 * most of the generic adapters this isn't required.</div><div class='del'>-	 * Its simpler this way.  -- ASF</div><div class='del'>-	 */</div><div class='del'>-        for (i=0;i&lt;6;i++)</div><div class='del'>-                tp-&gt;ocpl.NodeAddr[i] = ((unsigned char *)dev-&gt;dev_addr)[i];</div><div class='del'>-</div><div class='del'>-	tp-&gt;ocpl.GroupAddr	 = 0;</div><div class='del'>-	tp-&gt;ocpl.FunctAddr	 = 0;</div><div class='del'>-	tp-&gt;ocpl.RxListSize	 = cpu_to_be16((unsigned short)RplSize);</div><div class='del'>-	tp-&gt;ocpl.TxListSize	 = cpu_to_be16((unsigned short)TplSize);</div><div class='del'>-	tp-&gt;ocpl.BufSize	 = cpu_to_be16((unsigned short)BufferSize);</div><div class='del'>-	tp-&gt;ocpl.Reserved	 = 0;</div><div class='del'>-	tp-&gt;ocpl.TXBufMin	 = TX_BUF_MIN;</div><div class='del'>-	tp-&gt;ocpl.TXBufMax	 = TX_BUF_MAX;</div><div class='del'>-</div><div class='del'>-	Addr = htonl(((char *)tp-&gt;ProductID - (char *)tp) + tp-&gt;dmabuffer);</div><div class='del'>-</div><div class='del'>-	tp-&gt;ocpl.ProdIDAddr[0]	 = LOWORD(Addr);</div><div class='del'>-	tp-&gt;ocpl.ProdIDAddr[1]	 = HIWORD(Addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Send OPEN command to adapter</div><div class='del'>- */</div><div class='del'>-static void tms380tr_open_adapter(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if(tp-&gt;OpenCommandIssued)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	tp-&gt;OpenCommandIssued = 1;</div><div class='del'>-	tms380tr_exec_cmd(dev, OC_OPEN);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Clear the adapter's interrupt flag. Clear system interrupt enable</div><div class='del'>- * (SINTEN): disable adapter to system interrupts.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_disable_interrupts(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	SIFWRITEB(0, SIFACL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Set the adapter's interrupt flag. Set system interrupt enable</div><div class='del'>- * (SINTEN): enable adapter to system interrupts.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_enable_interrupts(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	SIFWRITEB(ACL_SINTEN, SIFACL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Put command in command queue, try to execute it.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_exec_cmd(struct net_device *dev, unsigned short Command)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	tp-&gt;CMDqueue |= Command;</div><div class='del'>-	tms380tr_chk_outstanding_cmds(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tms380tr_timeout(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * If we get here, some higher level has decided we are broken.</div><div class='del'>-	 * There should really be a "kick me" function call instead.</div><div class='del'>-	 *</div><div class='del'>-	 * Resetting the token ring adapter takes a long time so just</div><div class='del'>-	 * fake transmission time and go on trying. Our own timeout</div><div class='del'>-	 * routine is in tms380tr_timer_chk()</div><div class='del'>-	 */</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Gets skb from system, queues it and checks if it can be sent</div><div class='del'>- */</div><div class='del'>-static netdev_tx_t tms380tr_send_packet(struct sk_buff *skb,</div><div class='del'>-					      struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	netdev_tx_t rc;</div><div class='del'>-</div><div class='del'>-	rc = tms380tr_hardware_send_packet(skb, dev);</div><div class='del'>-	if(tp-&gt;TplFree-&gt;NextTPLPtr-&gt;BusyFlag)</div><div class='del'>-		netif_stop_queue(dev);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Move frames into adapter tx queue</div><div class='del'>- */</div><div class='del'>-static netdev_tx_t tms380tr_hardware_send_packet(struct sk_buff *skb,</div><div class='del'>-						       struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	TPL *tpl;</div><div class='del'>-	short length;</div><div class='del'>-	unsigned char *buf;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int i;</div><div class='del'>-	dma_addr_t dmabuf, newbuf;</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-   </div><div class='del'>-	/* Try to get a free TPL from the chain.</div><div class='del'>-	 *</div><div class='del'>-	 * NOTE: We *must* always leave one unused TPL in the chain,</div><div class='del'>-	 * because otherwise the adapter might send frames twice.</div><div class='del'>-	 */</div><div class='del'>-	spin_lock_irqsave(&amp;tp-&gt;lock, flags);</div><div class='del'>-	if(tp-&gt;TplFree-&gt;NextTPLPtr-&gt;BusyFlag)  { /* No free TPL */</div><div class='del'>-		if (tms380tr_debug &gt; 0)</div><div class='del'>-			printk(KERN_DEBUG "%s: No free TPL\n", dev-&gt;name);</div><div class='del'>-		spin_unlock_irqrestore(&amp;tp-&gt;lock, flags);</div><div class='del'>-		return NETDEV_TX_BUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dmabuf = 0;</div><div class='del'>-</div><div class='del'>-	/* Is buffer reachable for Busmaster-DMA? */</div><div class='del'>-</div><div class='del'>-	length	= skb-&gt;len;</div><div class='del'>-	dmabuf = dma_map_single(tp-&gt;pdev, skb-&gt;data, length, DMA_TO_DEVICE);</div><div class='del'>-	if(tp-&gt;dmalimit &amp;&amp; (dmabuf + length &gt; tp-&gt;dmalimit)) {</div><div class='del'>-		/* Copy frame to local buffer */</div><div class='del'>-		dma_unmap_single(tp-&gt;pdev, dmabuf, length, DMA_TO_DEVICE);</div><div class='del'>-		dmabuf  = 0;</div><div class='del'>-		i 	= tp-&gt;TplFree-&gt;TPLIndex;</div><div class='del'>-		buf 	= tp-&gt;LocalTxBuffers[i];</div><div class='del'>-		skb_copy_from_linear_data(skb, buf, length);</div><div class='del'>-		newbuf 	= ((char *)buf - (char *)tp) + tp-&gt;dmabuffer;</div><div class='del'>-	}</div><div class='del'>-	else {</div><div class='del'>-		/* Send direct from skb-&gt;data */</div><div class='del'>-		newbuf	= dmabuf;</div><div class='del'>-		buf	= skb-&gt;data;</div><div class='del'>-	}</div><div class='del'>-	/* Source address in packet? */</div><div class='del'>-	tms380tr_chk_src_addr(buf, dev-&gt;dev_addr);</div><div class='del'>-	tp-&gt;LastSendTime	= jiffies;</div><div class='del'>-	tpl 			= tp-&gt;TplFree;	/* Get the "free" TPL */</div><div class='del'>-	tpl-&gt;BusyFlag 		= 1;		/* Mark TPL as busy */</div><div class='del'>-	tp-&gt;TplFree 		= tpl-&gt;NextTPLPtr;</div><div class='del'>-    </div><div class='del'>-	/* Save the skb for delayed return of skb to system */</div><div class='del'>-	tpl-&gt;Skb = skb;</div><div class='del'>-	tpl-&gt;DMABuff = dmabuf;</div><div class='del'>-	tpl-&gt;FragList[0].DataCount = cpu_to_be16((unsigned short)length);</div><div class='del'>-	tpl-&gt;FragList[0].DataAddr  = htonl(newbuf);</div><div class='del'>-</div><div class='del'>-	/* Write the data length in the transmit list. */</div><div class='del'>-	tpl-&gt;FrameSize 	= cpu_to_be16((unsigned short)length);</div><div class='del'>-	tpl-&gt;MData 	= buf;</div><div class='del'>-</div><div class='del'>-	/* Transmit the frame and set the status values. */</div><div class='del'>-	tms380tr_write_tpl_status(tpl, TX_VALID | TX_START_FRAME</div><div class='del'>-				| TX_END_FRAME | TX_PASS_SRC_ADDR</div><div class='del'>-				| TX_FRAME_IRQ);</div><div class='del'>-</div><div class='del'>-	/* Let adapter send the frame. */</div><div class='del'>-	tms380tr_exec_sifcmd(dev, CMD_TX_VALID);</div><div class='del'>-	spin_unlock_irqrestore(&amp;tp-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Write the given value to the 'Status' field of the specified TPL.</div><div class='del'>- * NOTE: This function should be used whenever the status of any TPL must be</div><div class='del'>- * modified by the driver, because the compiler may otherwise change the</div><div class='del'>- * order of instructions such that writing the TPL status may be executed at</div><div class='del'>- * an undesirable time. When this function is used, the status is always</div><div class='del'>- * written when the function is called.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_write_tpl_status(TPL *tpl, unsigned int Status)</div><div class='del'>-{</div><div class='del'>-	tpl-&gt;Status = Status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tms380tr_chk_src_addr(unsigned char *frame, unsigned char *hw_addr)</div><div class='del'>-{</div><div class='del'>-	unsigned char SRBit;</div><div class='del'>-</div><div class='del'>-	if((((unsigned long)frame[8]) &amp; ~0x80) != 0)	/* Compare 4 bytes */</div><div class='del'>-		return;</div><div class='del'>-	if((unsigned short)frame[12] != 0)		/* Compare 2 bytes */</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	SRBit = frame[8] &amp; 0x80;</div><div class='del'>-	memcpy(&amp;frame[8], hw_addr, 6);</div><div class='del'>-	frame[8] |= SRBit;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The timer routine: Check if adapter still open and working, reopen if not. </div><div class='del'>- */</div><div class='del'>-static void tms380tr_timer_chk(unsigned long data)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device*)data;</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if(tp-&gt;HaltInProgress)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	tms380tr_chk_outstanding_cmds(dev);</div><div class='del'>-	if(time_before(tp-&gt;LastSendTime + SEND_TIMEOUT, jiffies) &amp;&amp;</div><div class='del'>-	   (tp-&gt;TplFree != tp-&gt;TplBusy))</div><div class='del'>-	{</div><div class='del'>-		/* Anything to send, but stalled too long */</div><div class='del'>-		tp-&gt;LastSendTime = jiffies;</div><div class='del'>-		tms380tr_exec_cmd(dev, OC_CLOSE);	/* Does reopen automatically */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tp-&gt;timer.expires = jiffies + 2*HZ;</div><div class='del'>-	add_timer(&amp;tp-&gt;timer);</div><div class='del'>-</div><div class='del'>-	if(tp-&gt;AdapterOpenFlag || tp-&gt;ReOpenInProgress)</div><div class='del'>-		return;</div><div class='del'>-	tp-&gt;ReOpenInProgress = 1;</div><div class='del'>-	tms380tr_open_adapter(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The typical workload of the driver: Handle the network interface interrupts.</div><div class='del'>- */</div><div class='del'>-irqreturn_t tms380tr_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = dev_id;</div><div class='del'>-	struct net_local *tp;</div><div class='del'>-	unsigned short irq_type;</div><div class='del'>-	int handled = 0;</div><div class='del'>-</div><div class='del'>-	tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	irq_type = SIFREADW(SIFSTS);</div><div class='del'>-</div><div class='del'>-	while(irq_type &amp; STS_SYSTEM_IRQ) {</div><div class='del'>-		handled = 1;</div><div class='del'>-		irq_type &amp;= STS_IRQ_MASK;</div><div class='del'>-</div><div class='del'>-		if(!tms380tr_chk_ssb(tp, irq_type)) {</div><div class='del'>-			printk(KERN_DEBUG "%s: DATA LATE occurred\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		switch(irq_type) {</div><div class='del'>-		case STS_IRQ_RECEIVE_STATUS:</div><div class='del'>-			tms380tr_reset_interrupt(dev);</div><div class='del'>-			tms380tr_rcv_status_irq(dev);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case STS_IRQ_TRANSMIT_STATUS:</div><div class='del'>-			/* Check if TRANSMIT.HALT command is complete */</div><div class='del'>-			if(tp-&gt;ssb.Parm[0] &amp; COMMAND_COMPLETE) {</div><div class='del'>-				tp-&gt;TransmitCommandActive = 0;</div><div class='del'>-					tp-&gt;TransmitHaltScheduled = 0;</div><div class='del'>-</div><div class='del'>-					/* Issue a new transmit command. */</div><div class='del'>-					tms380tr_exec_cmd(dev, OC_TRANSMIT);</div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-				tms380tr_reset_interrupt(dev);</div><div class='del'>-				tms380tr_tx_status_irq(dev);</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-		case STS_IRQ_COMMAND_STATUS:</div><div class='del'>-			/* The SSB contains status of last command</div><div class='del'>-			 * other than receive/transmit.</div><div class='del'>-			 */</div><div class='del'>-			tms380tr_cmd_status_irq(dev);</div><div class='del'>-			break;</div><div class='del'>-			</div><div class='del'>-		case STS_IRQ_SCB_CLEAR:</div><div class='del'>-			/* The SCB is free for another command. */</div><div class='del'>-			tp-&gt;ScbInUse = 0;</div><div class='del'>-			tms380tr_chk_outstanding_cmds(dev);</div><div class='del'>-			break;</div><div class='del'>-			</div><div class='del'>-		case STS_IRQ_RING_STATUS:</div><div class='del'>-			tms380tr_ring_status_irq(dev);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case STS_IRQ_ADAPTER_CHECK:</div><div class='del'>-			tms380tr_chk_irq(dev);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case STS_IRQ_LLC_STATUS:</div><div class='del'>-			printk(KERN_DEBUG "tms380tr: unexpected LLC status IRQ\n");</div><div class='del'>-			break;</div><div class='del'>-			</div><div class='del'>-		case STS_IRQ_TIMER:</div><div class='del'>-			printk(KERN_DEBUG "tms380tr: unexpected Timer IRQ\n");</div><div class='del'>-			break;</div><div class='del'>-			</div><div class='del'>-		case STS_IRQ_RECEIVE_PENDING:</div><div class='del'>-			printk(KERN_DEBUG "tms380tr: unexpected Receive Pending IRQ\n");</div><div class='del'>-			break;</div><div class='del'>-			</div><div class='del'>-		default:</div><div class='del'>-			printk(KERN_DEBUG "Unknown Token Ring IRQ (0x%04x)\n", irq_type);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Reset system interrupt if not already done. */</div><div class='del'>-		if(irq_type != STS_IRQ_TRANSMIT_STATUS &amp;&amp;</div><div class='del'>-		   irq_type != STS_IRQ_RECEIVE_STATUS) {</div><div class='del'>-			tms380tr_reset_interrupt(dev);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		irq_type = SIFREADW(SIFSTS);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_RETVAL(handled);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *  Reset the INTERRUPT SYSTEM bit and issue SSB CLEAR command.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_reset_interrupt(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	SSB *ssb = &amp;tp-&gt;ssb;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * [Workaround for "Data Late"]</div><div class='del'>-	 * Set all fields of the SSB to well-defined values so we can</div><div class='del'>-	 * check if the adapter has written the SSB.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	ssb-&gt;STS	= (unsigned short) -1;</div><div class='del'>-	ssb-&gt;Parm[0] 	= (unsigned short) -1;</div><div class='del'>-	ssb-&gt;Parm[1] 	= (unsigned short) -1;</div><div class='del'>-	ssb-&gt;Parm[2] 	= (unsigned short) -1;</div><div class='del'>-</div><div class='del'>-	/* Free SSB by issuing SSB_CLEAR command after reading IRQ code</div><div class='del'>-	 * and clear STS_SYSTEM_IRQ bit: enable adapter for further interrupts.</div><div class='del'>-	 */</div><div class='del'>-	tms380tr_exec_sifcmd(dev, CMD_SSB_CLEAR | CMD_CLEAR_SYSTEM_IRQ);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Check if the SSB has actually been written by the adapter.</div><div class='del'>- */</div><div class='del'>-static unsigned char tms380tr_chk_ssb(struct net_local *tp, unsigned short IrqType)</div><div class='del'>-{</div><div class='del'>-	SSB *ssb = &amp;tp-&gt;ssb;	/* The address of the SSB. */</div><div class='del'>-</div><div class='del'>-	/* C 0 1 2 INTERRUPT CODE</div><div class='del'>-	 * - - - - --------------</div><div class='del'>-	 * 1 1 1 1 TRANSMIT STATUS</div><div class='del'>-	 * 1 1 1 1 RECEIVE STATUS</div><div class='del'>-	 * 1 ? ? 0 COMMAND STATUS</div><div class='del'>-	 * 0 0 0 0 SCB CLEAR</div><div class='del'>-	 * 1 1 0 0 RING STATUS</div><div class='del'>-	 * 0 0 0 0 ADAPTER CHECK</div><div class='del'>-	 *</div><div class='del'>-	 * 0 = SSB field not affected by interrupt</div><div class='del'>-	 * 1 = SSB field is affected by interrupt</div><div class='del'>-	 *</div><div class='del'>-	 * C = SSB ADDRESS +0: COMMAND</div><div class='del'>-	 * 0 = SSB ADDRESS +2: STATUS 0</div><div class='del'>-	 * 1 = SSB ADDRESS +4: STATUS 1</div><div class='del'>-	 * 2 = SSB ADDRESS +6: STATUS 2</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/* Check if this interrupt does use the SSB. */</div><div class='del'>-</div><div class='del'>-	if(IrqType != STS_IRQ_TRANSMIT_STATUS &amp;&amp;</div><div class='del'>-	   IrqType != STS_IRQ_RECEIVE_STATUS &amp;&amp;</div><div class='del'>-	   IrqType != STS_IRQ_COMMAND_STATUS &amp;&amp;</div><div class='del'>-	   IrqType != STS_IRQ_RING_STATUS)</div><div class='del'>-	{</div><div class='del'>-		return 1;	/* SSB not involved. */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Note: All fields of the SSB have been set to all ones (-1) after it</div><div class='del'>-	 * has last been used by the software (see DriverIsr()).</div><div class='del'>-	 *</div><div class='del'>-	 * Check if the affected SSB fields are still unchanged.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if(ssb-&gt;STS == (unsigned short) -1)</div><div class='del'>-		return 0;	/* Command field not yet available. */</div><div class='del'>-	if(IrqType == STS_IRQ_COMMAND_STATUS)</div><div class='del'>-		return 1;	/* Status fields not always affected. */</div><div class='del'>-	if(ssb-&gt;Parm[0] == (unsigned short) -1)</div><div class='del'>-		return 0;	/* Status 1 field not yet available. */</div><div class='del'>-	if(IrqType == STS_IRQ_RING_STATUS)</div><div class='del'>-		return 1;	/* Status 2 &amp; 3 fields not affected. */</div><div class='del'>-</div><div class='del'>-	/* Note: At this point, the interrupt is either TRANSMIT or RECEIVE. */</div><div class='del'>-	if(ssb-&gt;Parm[1] == (unsigned short) -1)</div><div class='del'>-		return 0;	/* Status 2 field not yet available. */</div><div class='del'>-	if(ssb-&gt;Parm[2] == (unsigned short) -1)</div><div class='del'>-		return 0;	/* Status 3 field not yet available. */</div><div class='del'>-</div><div class='del'>-	return 1;	/* All SSB fields have been written by the adapter. */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Evaluates the command results status in the SSB status field.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_cmd_status_irq(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	unsigned short ssb_cmd, ssb_parm_0;</div><div class='del'>-	unsigned short ssb_parm_1;</div><div class='del'>-	char *open_err = "Open error -";</div><div class='del'>-	char *code_err = "Open code -";</div><div class='del'>-</div><div class='del'>-	/* Copy the ssb values to local variables */</div><div class='del'>-	ssb_cmd    = tp-&gt;ssb.STS;</div><div class='del'>-	ssb_parm_0 = tp-&gt;ssb.Parm[0];</div><div class='del'>-	ssb_parm_1 = tp-&gt;ssb.Parm[1];</div><div class='del'>-</div><div class='del'>-	if(ssb_cmd == OPEN)</div><div class='del'>-	{</div><div class='del'>-		tp-&gt;Sleeping = 0;</div><div class='del'>-		if(!tp-&gt;ReOpenInProgress)</div><div class='del'>-	    		wake_up_interruptible(&amp;tp-&gt;wait_for_tok_int);</div><div class='del'>-</div><div class='del'>-		tp-&gt;OpenCommandIssued = 0;</div><div class='del'>-		tp-&gt;ScbInUse = 0;</div><div class='del'>-</div><div class='del'>-		if((ssb_parm_0 &amp; 0x00FF) == GOOD_COMPLETION)</div><div class='del'>-		{</div><div class='del'>-			/* Success, the adapter is open. */</div><div class='del'>-			tp-&gt;LobeWireFaultLogged	= 0;</div><div class='del'>-			tp-&gt;AdapterOpenFlag 	= 1;</div><div class='del'>-			tp-&gt;AdapterVirtOpenFlag = 1;</div><div class='del'>-			tp-&gt;TransmitCommandActive = 0;</div><div class='del'>-			tms380tr_exec_cmd(dev, OC_TRANSMIT);</div><div class='del'>-			tms380tr_exec_cmd(dev, OC_RECEIVE);</div><div class='del'>-</div><div class='del'>-			if(tp-&gt;ReOpenInProgress)</div><div class='del'>-				tp-&gt;ReOpenInProgress = 0;</div><div class='del'>-</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		else 	/* The adapter did not open. */</div><div class='del'>-		{</div><div class='del'>-	    		if(ssb_parm_0 &amp; NODE_ADDR_ERROR)</div><div class='del'>-				printk(KERN_INFO "%s: Node address error\n",</div><div class='del'>-					dev-&gt;name);</div><div class='del'>-	    		if(ssb_parm_0 &amp; LIST_SIZE_ERROR)</div><div class='del'>-				printk(KERN_INFO "%s: List size error\n",</div><div class='del'>-					dev-&gt;name);</div><div class='del'>-	    		if(ssb_parm_0 &amp; BUF_SIZE_ERROR)</div><div class='del'>-				printk(KERN_INFO "%s: Buffer size error\n",</div><div class='del'>-					dev-&gt;name);</div><div class='del'>-	    		if(ssb_parm_0 &amp; TX_BUF_COUNT_ERROR)</div><div class='del'>-				printk(KERN_INFO "%s: Tx buffer count error\n",</div><div class='del'>-					dev-&gt;name);</div><div class='del'>-	    		if(ssb_parm_0 &amp; INVALID_OPEN_OPTION)</div><div class='del'>-				printk(KERN_INFO "%s: Invalid open option\n",</div><div class='del'>-					dev-&gt;name);</div><div class='del'>-	    		if(ssb_parm_0 &amp; OPEN_ERROR)</div><div class='del'>-			{</div><div class='del'>-				/* Show the open phase. */</div><div class='del'>-				switch(ssb_parm_0 &amp; OPEN_PHASES_MASK)</div><div class='del'>-				{</div><div class='del'>-					case LOBE_MEDIA_TEST:</div><div class='del'>-						if(!tp-&gt;LobeWireFaultLogged)</div><div class='del'>-						{</div><div class='del'>-							tp-&gt;LobeWireFaultLogged = 1;</div><div class='del'>-							printk(KERN_INFO "%s: %s Lobe wire fault (check cable !).\n", dev-&gt;name, open_err);</div><div class='del'>-		    				}</div><div class='del'>-						tp-&gt;ReOpenInProgress	= 1;</div><div class='del'>-						tp-&gt;AdapterOpenFlag 	= 0;</div><div class='del'>-						tp-&gt;AdapterVirtOpenFlag = 1;</div><div class='del'>-						tms380tr_open_adapter(dev);</div><div class='del'>-						return;</div><div class='del'>-</div><div class='del'>-					case PHYSICAL_INSERTION:</div><div class='del'>-						printk(KERN_INFO "%s: %s Physical insertion.\n", dev-&gt;name, open_err);</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					case ADDRESS_VERIFICATION:</div><div class='del'>-						printk(KERN_INFO "%s: %s Address verification.\n", dev-&gt;name, open_err);</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					case PARTICIPATION_IN_RING_POLL:</div><div class='del'>-						printk(KERN_INFO "%s: %s Participation in ring poll.\n", dev-&gt;name, open_err);</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					case REQUEST_INITIALISATION:</div><div class='del'>-						printk(KERN_INFO "%s: %s Request initialisation.\n", dev-&gt;name, open_err);</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					case FULLDUPLEX_CHECK:</div><div class='del'>-						printk(KERN_INFO "%s: %s Full duplex check.\n", dev-&gt;name, open_err);</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					default:</div><div class='del'>-						printk(KERN_INFO "%s: %s Unknown open phase\n", dev-&gt;name, open_err);</div><div class='del'>-						break;</div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-				/* Show the open errors. */</div><div class='del'>-				switch(ssb_parm_0 &amp; OPEN_ERROR_CODES_MASK)</div><div class='del'>-				{</div><div class='del'>-					case OPEN_FUNCTION_FAILURE:</div><div class='del'>-						printk(KERN_INFO "%s: %s OPEN_FUNCTION_FAILURE", dev-&gt;name, code_err);</div><div class='del'>-						tp-&gt;LastOpenStatus =</div><div class='del'>-							OPEN_FUNCTION_FAILURE;</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					case OPEN_SIGNAL_LOSS:</div><div class='del'>-						printk(KERN_INFO "%s: %s OPEN_SIGNAL_LOSS\n", dev-&gt;name, code_err);</div><div class='del'>-						tp-&gt;LastOpenStatus =</div><div class='del'>-							OPEN_SIGNAL_LOSS;</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					case OPEN_TIMEOUT:</div><div class='del'>-						printk(KERN_INFO "%s: %s OPEN_TIMEOUT\n", dev-&gt;name, code_err);</div><div class='del'>-						tp-&gt;LastOpenStatus =</div><div class='del'>-							OPEN_TIMEOUT;</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					case OPEN_RING_FAILURE:</div><div class='del'>-						printk(KERN_INFO "%s: %s OPEN_RING_FAILURE\n", dev-&gt;name, code_err);</div><div class='del'>-						tp-&gt;LastOpenStatus =</div><div class='del'>-							OPEN_RING_FAILURE;</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					case OPEN_RING_BEACONING:</div><div class='del'>-						printk(KERN_INFO "%s: %s OPEN_RING_BEACONING\n", dev-&gt;name, code_err);</div><div class='del'>-						tp-&gt;LastOpenStatus =</div><div class='del'>-							OPEN_RING_BEACONING;</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					case OPEN_DUPLICATE_NODEADDR:</div><div class='del'>-						printk(KERN_INFO "%s: %s OPEN_DUPLICATE_NODEADDR\n", dev-&gt;name, code_err);</div><div class='del'>-						tp-&gt;LastOpenStatus =</div><div class='del'>-							OPEN_DUPLICATE_NODEADDR;</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					case OPEN_REQUEST_INIT:</div><div class='del'>-						printk(KERN_INFO "%s: %s OPEN_REQUEST_INIT\n", dev-&gt;name, code_err);</div><div class='del'>-						tp-&gt;LastOpenStatus =</div><div class='del'>-							OPEN_REQUEST_INIT;</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					case OPEN_REMOVE_RECEIVED:</div><div class='del'>-						printk(KERN_INFO "%s: %s OPEN_REMOVE_RECEIVED", dev-&gt;name, code_err);</div><div class='del'>-						tp-&gt;LastOpenStatus =</div><div class='del'>-							OPEN_REMOVE_RECEIVED;</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					case OPEN_FULLDUPLEX_SET:</div><div class='del'>-						printk(KERN_INFO "%s: %s OPEN_FULLDUPLEX_SET\n", dev-&gt;name, code_err);</div><div class='del'>-						tp-&gt;LastOpenStatus =</div><div class='del'>-							OPEN_FULLDUPLEX_SET;</div><div class='del'>-						break;</div><div class='del'>-</div><div class='del'>-					default:</div><div class='del'>-						printk(KERN_INFO "%s: %s Unknown open err code", dev-&gt;name, code_err);</div><div class='del'>-						tp-&gt;LastOpenStatus =</div><div class='del'>-							OPEN_FUNCTION_FAILURE;</div><div class='del'>-						break;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			tp-&gt;AdapterOpenFlag 	= 0;</div><div class='del'>-			tp-&gt;AdapterVirtOpenFlag = 0;</div><div class='del'>-</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-	{</div><div class='del'>-		if(ssb_cmd != READ_ERROR_LOG)</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-		/* Add values from the error log table to the MAC</div><div class='del'>-		 * statistics counters and update the errorlogtable</div><div class='del'>-		 * memory.</div><div class='del'>-		 */</div><div class='del'>-		tp-&gt;MacStat.line_errors += tp-&gt;errorlogtable.Line_Error;</div><div class='del'>-		tp-&gt;MacStat.burst_errors += tp-&gt;errorlogtable.Burst_Error;</div><div class='del'>-		tp-&gt;MacStat.A_C_errors += tp-&gt;errorlogtable.ARI_FCI_Error;</div><div class='del'>-		tp-&gt;MacStat.lost_frames += tp-&gt;errorlogtable.Lost_Frame_Error;</div><div class='del'>-		tp-&gt;MacStat.recv_congest_count += tp-&gt;errorlogtable.Rx_Congest_Error;</div><div class='del'>-		tp-&gt;MacStat.rx_errors += tp-&gt;errorlogtable.Rx_Congest_Error;</div><div class='del'>-		tp-&gt;MacStat.frame_copied_errors += tp-&gt;errorlogtable.Frame_Copied_Error;</div><div class='del'>-		tp-&gt;MacStat.token_errors += tp-&gt;errorlogtable.Token_Error;</div><div class='del'>-		tp-&gt;MacStat.dummy1 += tp-&gt;errorlogtable.DMA_Bus_Error;</div><div class='del'>-		tp-&gt;MacStat.dummy1 += tp-&gt;errorlogtable.DMA_Parity_Error;</div><div class='del'>-		tp-&gt;MacStat.abort_delimiters += tp-&gt;errorlogtable.AbortDelimeters;</div><div class='del'>-		tp-&gt;MacStat.frequency_errors += tp-&gt;errorlogtable.Frequency_Error;</div><div class='del'>-		tp-&gt;MacStat.internal_errors += tp-&gt;errorlogtable.Internal_Error;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The inverse routine to tms380tr_open().</div><div class='del'>- */</div><div class='del'>-int tms380tr_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	</div><div class='del'>-	del_timer(&amp;tp-&gt;timer);</div><div class='del'>-</div><div class='del'>-	/* Flush the Tx and disable Rx here. */</div><div class='del'>-</div><div class='del'>-	tp-&gt;HaltInProgress 	= 1;</div><div class='del'>-	tms380tr_exec_cmd(dev, OC_CLOSE);</div><div class='del'>-	tp-&gt;timer.expires	= jiffies + 1*HZ;</div><div class='del'>-	tp-&gt;timer.function 	= tms380tr_timer_end_wait;</div><div class='del'>-	tp-&gt;timer.data 		= (unsigned long)dev;</div><div class='del'>-	add_timer(&amp;tp-&gt;timer);</div><div class='del'>-</div><div class='del'>-	tms380tr_enable_interrupts(dev);</div><div class='del'>-</div><div class='del'>-	tp-&gt;Sleeping = 1;</div><div class='del'>-	interruptible_sleep_on(&amp;tp-&gt;wait_for_tok_int);</div><div class='del'>-	tp-&gt;TransmitCommandActive = 0;</div><div class='del'>-    </div><div class='del'>-	del_timer(&amp;tp-&gt;timer);</div><div class='del'>-	tms380tr_disable_interrupts(dev);</div><div class='del'>-   </div><div class='del'>-#ifdef CONFIG_ISA</div><div class='del'>-	if(dev-&gt;dma &gt; 0) </div><div class='del'>-	{</div><div class='del'>-		unsigned long flags=claim_dma_lock();</div><div class='del'>-		disable_dma(dev-&gt;dma);</div><div class='del'>-		release_dma_lock(flags);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	</div><div class='del'>-	SIFWRITEW(0xFF00, SIFCMD);</div><div class='del'>-#if 0</div><div class='del'>-	if(dev-&gt;dma &gt; 0) /* what the? */</div><div class='del'>-		SIFWRITEB(0xff, POSREG);</div><div class='del'>-#endif</div><div class='del'>-	tms380tr_cancel_tx_queue(tp);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Get the current statistics. This may be called with the card open</div><div class='del'>- * or closed.</div><div class='del'>- */</div><div class='del'>-static struct net_device_stats *tms380tr_get_stats(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	return (struct net_device_stats *)&amp;tp-&gt;MacStat;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Set or clear the multicast filter for this adapter.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_set_multicast_list(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	unsigned int OpenOptions;</div><div class='del'>-	</div><div class='del'>-	OpenOptions = tp-&gt;ocpl.OPENOptions &amp;</div><div class='del'>-		~(PASS_ADAPTER_MAC_FRAMES</div><div class='del'>-		  | PASS_ATTENTION_FRAMES</div><div class='del'>-		  | PASS_BEACON_MAC_FRAMES</div><div class='del'>-		  | COPY_ALL_MAC_FRAMES</div><div class='del'>-		  | COPY_ALL_NON_MAC_FRAMES);</div><div class='del'>-	</div><div class='del'>-	tp-&gt;ocpl.FunctAddr = 0;</div><div class='del'>-	</div><div class='del'>-	if(dev-&gt;flags &amp; IFF_PROMISC)</div><div class='del'>-		/* Enable promiscuous mode */</div><div class='del'>-		OpenOptions |= COPY_ALL_NON_MAC_FRAMES |</div><div class='del'>-			COPY_ALL_MAC_FRAMES;</div><div class='del'>-	else</div><div class='del'>-	{</div><div class='del'>-		if(dev-&gt;flags &amp; IFF_ALLMULTI)</div><div class='del'>-		{</div><div class='del'>-			/* Disable promiscuous mode, use normal mode. */</div><div class='del'>-			tp-&gt;ocpl.FunctAddr = 0xFFFFFFFF;</div><div class='del'>-		}</div><div class='del'>-		else</div><div class='del'>-		{</div><div class='del'>-			struct netdev_hw_addr *ha;</div><div class='del'>-</div><div class='del'>-			netdev_for_each_mc_addr(ha, dev) {</div><div class='del'>-				((char *)(&amp;tp-&gt;ocpl.FunctAddr))[0] |=</div><div class='del'>-					ha-&gt;addr[2];</div><div class='del'>-				((char *)(&amp;tp-&gt;ocpl.FunctAddr))[1] |=</div><div class='del'>-					ha-&gt;addr[3];</div><div class='del'>-				((char *)(&amp;tp-&gt;ocpl.FunctAddr))[2] |=</div><div class='del'>-					ha-&gt;addr[4];</div><div class='del'>-				((char *)(&amp;tp-&gt;ocpl.FunctAddr))[3] |=</div><div class='del'>-					ha-&gt;addr[5];</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		tms380tr_exec_cmd(dev, OC_SET_FUNCT_ADDR);</div><div class='del'>-	}</div><div class='del'>-	</div><div class='del'>-	tp-&gt;ocpl.OPENOptions = OpenOptions;</div><div class='del'>-	tms380tr_exec_cmd(dev, OC_MODIFY_OPEN_PARMS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Wait for some time (microseconds)</div><div class='del'>- */</div><div class='del'>-void tms380tr_wait(unsigned long time)</div><div class='del'>-{</div><div class='del'>-#if 0</div><div class='del'>-	long tmp;</div><div class='del'>-	</div><div class='del'>-	tmp = jiffies + time/(1000000/HZ);</div><div class='del'>-	do {</div><div class='del'>-		tmp = schedule_timeout_interruptible(tmp);</div><div class='del'>-	} while(time_after(tmp, jiffies));</div><div class='del'>-#else</div><div class='del'>-	mdelay(time / 1000);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Write a command value to the SIFCMD register</div><div class='del'>- */</div><div class='del'>-static void tms380tr_exec_sifcmd(struct net_device *dev, unsigned int WriteValue)</div><div class='del'>-{</div><div class='del'>-	unsigned short cmd;</div><div class='del'>-	unsigned short SifStsValue;</div><div class='del'>-	unsigned long loop_counter;</div><div class='del'>-</div><div class='del'>-	WriteValue = ((WriteValue ^ CMD_SYSTEM_IRQ) | CMD_INTERRUPT_ADAPTER);</div><div class='del'>-	cmd = (unsigned short)WriteValue;</div><div class='del'>-	loop_counter = 0,5 * 800000;</div><div class='del'>-	do {</div><div class='del'>-		SifStsValue = SIFREADW(SIFSTS);</div><div class='del'>-	} while((SifStsValue &amp; CMD_INTERRUPT_ADAPTER) &amp;&amp; loop_counter--);</div><div class='del'>-	SIFWRITEW(cmd, SIFCMD);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Processes adapter hardware reset, halts adapter and downloads firmware,</div><div class='del'>- * clears the halt bit.</div><div class='del'>- */</div><div class='del'>-static int tms380tr_reset_adapter(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	unsigned short *fw_ptr;</div><div class='del'>-	unsigned short count, c, count2;</div><div class='del'>-	const struct firmware *fw_entry = NULL;</div><div class='del'>-</div><div class='del'>-	if (request_firmware(&amp;fw_entry, "tms380tr.bin", tp-&gt;pdev) != 0) {</div><div class='del'>-		printk(KERN_ALERT "%s: firmware %s is missing, cannot start.\n",</div><div class='del'>-			dev-&gt;name, "tms380tr.bin");</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	fw_ptr = (unsigned short *)fw_entry-&gt;data;</div><div class='del'>-	count2 = fw_entry-&gt;size / 2;</div><div class='del'>-</div><div class='del'>-	/* Hardware adapter reset */</div><div class='del'>-	SIFWRITEW(ACL_ARESET, SIFACL);</div><div class='del'>-	tms380tr_wait(40);</div><div class='del'>-	</div><div class='del'>-	c = SIFREADW(SIFACL);</div><div class='del'>-	tms380tr_wait(20);</div><div class='del'>-</div><div class='del'>-	if(dev-&gt;dma == 0)	/* For PCI adapters */</div><div class='del'>-	{</div><div class='del'>-		c &amp;= ~(ACL_NSELOUT0 | ACL_NSELOUT1);	/* Clear bits */</div><div class='del'>-		if(tp-&gt;setnselout)</div><div class='del'>-		  c |= (*tp-&gt;setnselout)(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* In case a command is pending - forget it */</div><div class='del'>-	tp-&gt;ScbInUse = 0;</div><div class='del'>-</div><div class='del'>-	c &amp;= ~ACL_ARESET;		/* Clear adapter reset bit */</div><div class='del'>-	c |=  ACL_CPHALT;		/* Halt adapter CPU, allow download */</div><div class='del'>-	c |= ACL_BOOT;</div><div class='del'>-	c |= ACL_SINTEN;</div><div class='del'>-	c &amp;= ~ACL_PSDMAEN;		/* Clear pseudo dma bit */</div><div class='del'>-	SIFWRITEW(c, SIFACL);</div><div class='del'>-	tms380tr_wait(40);</div><div class='del'>-</div><div class='del'>-	count = 0;</div><div class='del'>-	/* Download firmware via DIO interface: */</div><div class='del'>-	do {</div><div class='del'>-		if (count2 &lt; 3) continue;</div><div class='del'>-</div><div class='del'>-		/* Download first address part */</div><div class='del'>-		SIFWRITEW(*fw_ptr, SIFADX);</div><div class='del'>-		fw_ptr++;</div><div class='del'>-		count2--;</div><div class='del'>-		/* Download second address part */</div><div class='del'>-		SIFWRITEW(*fw_ptr, SIFADD);</div><div class='del'>-		fw_ptr++;</div><div class='del'>-		count2--;</div><div class='del'>-</div><div class='del'>-		if((count = *fw_ptr) != 0)	/* Load loop counter */</div><div class='del'>-		{</div><div class='del'>-			fw_ptr++;	/* Download block data */</div><div class='del'>-			count2--;</div><div class='del'>-			if (count &gt; count2) continue;</div><div class='del'>-</div><div class='del'>-			for(; count &gt; 0; count--)</div><div class='del'>-			{</div><div class='del'>-				SIFWRITEW(*fw_ptr, SIFINC);</div><div class='del'>-				fw_ptr++;</div><div class='del'>-				count2--;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		else	/* Stop, if last block downloaded */</div><div class='del'>-		{</div><div class='del'>-			c = SIFREADW(SIFACL);</div><div class='del'>-			c &amp;= (~ACL_CPHALT | ACL_SINTEN);</div><div class='del'>-</div><div class='del'>-			/* Clear CPHALT and start BUD */</div><div class='del'>-			SIFWRITEW(c, SIFACL);</div><div class='del'>-			release_firmware(fw_entry);</div><div class='del'>-			return 1;</div><div class='del'>-		}</div><div class='del'>-	} while(count == 0);</div><div class='del'>-</div><div class='del'>-	release_firmware(fw_entry);</div><div class='del'>-	printk(KERN_INFO "%s: Adapter Download Failed\n", dev-&gt;name);</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MODULE_FIRMWARE("tms380tr.bin");</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Starts bring up diagnostics of token ring adapter and evaluates</div><div class='del'>- * diagnostic results.</div><div class='del'>- */</div><div class='del'>-static int tms380tr_bringup_diags(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int loop_cnt, retry_cnt;</div><div class='del'>-	unsigned short Status;</div><div class='del'>-</div><div class='del'>-	tms380tr_wait(HALF_SECOND);</div><div class='del'>-	tms380tr_exec_sifcmd(dev, EXEC_SOFT_RESET);</div><div class='del'>-	tms380tr_wait(HALF_SECOND);</div><div class='del'>-</div><div class='del'>-	retry_cnt = BUD_MAX_RETRIES;	/* maximal number of retrys */</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		retry_cnt--;</div><div class='del'>-		if(tms380tr_debug &gt; 3)</div><div class='del'>-			printk(KERN_DEBUG "BUD-Status: ");</div><div class='del'>-		loop_cnt = BUD_MAX_LOOPCNT;	/* maximum: three seconds*/</div><div class='del'>-		do {			/* Inspect BUD results */</div><div class='del'>-			loop_cnt--;</div><div class='del'>-			tms380tr_wait(HALF_SECOND);</div><div class='del'>-			Status = SIFREADW(SIFSTS);</div><div class='del'>-			Status &amp;= STS_MASK;</div><div class='del'>-</div><div class='del'>-			if(tms380tr_debug &gt; 3)</div><div class='del'>-				printk(KERN_DEBUG " %04X\n", Status);</div><div class='del'>-			/* BUD successfully completed */</div><div class='del'>-			if(Status == STS_INITIALIZE)</div><div class='del'>-				return 1;</div><div class='del'>-		/* Unrecoverable hardware error, BUD not completed? */</div><div class='del'>-		} while((loop_cnt &gt; 0) &amp;&amp; ((Status &amp; (STS_ERROR | STS_TEST))</div><div class='del'>-			!= (STS_ERROR | STS_TEST)));</div><div class='del'>-</div><div class='del'>-		/* Error preventing completion of BUD */</div><div class='del'>-		if(retry_cnt &gt; 0)</div><div class='del'>-		{</div><div class='del'>-			printk(KERN_INFO "%s: Adapter Software Reset.\n", </div><div class='del'>-				dev-&gt;name);</div><div class='del'>-			tms380tr_exec_sifcmd(dev, EXEC_SOFT_RESET);</div><div class='del'>-			tms380tr_wait(HALF_SECOND);</div><div class='del'>-		}</div><div class='del'>-	} while(retry_cnt &gt; 0);</div><div class='del'>-</div><div class='del'>-	Status = SIFREADW(SIFSTS);</div><div class='del'>-	</div><div class='del'>-	printk(KERN_INFO "%s: Hardware error\n", dev-&gt;name);</div><div class='del'>-	/* Hardware error occurred! */</div><div class='del'>-	Status &amp;= 0x001f;</div><div class='del'>-	if (Status &amp; 0x0010)</div><div class='del'>-		printk(KERN_INFO "%s: BUD Error: Timeout\n", dev-&gt;name);</div><div class='del'>-	else if ((Status &amp; 0x000f) &gt; 6)</div><div class='del'>-		printk(KERN_INFO "%s: BUD Error: Illegal Failure\n", dev-&gt;name);</div><div class='del'>-	else</div><div class='del'>-		printk(KERN_INFO "%s: Bring Up Diagnostics Error (%04X) occurred\n", dev-&gt;name, Status &amp; 0x000f);</div><div class='del'>-</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Copy initialisation data to adapter memory, beginning at address</div><div class='del'>- * 1:0A00; Starting DMA test and evaluating result bits.</div><div class='del'>- */</div><div class='del'>-static int tms380tr_init_adapter(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	const unsigned char SCB_Test[6] = {0x00, 0x00, 0xC1, 0xE2, 0xD4, 0x8B};</div><div class='del'>-	const unsigned char SSB_Test[8] = {0xFF, 0xFF, 0xD1, 0xD7,</div><div class='del'>-						0xC5, 0xD9, 0xC3, 0xD4};</div><div class='del'>-	void *ptr = (void *)&amp;tp-&gt;ipb;</div><div class='del'>-	unsigned short *ipb_ptr = (unsigned short *)ptr;</div><div class='del'>-	unsigned char *cb_ptr = (unsigned char *) &amp;tp-&gt;scb;</div><div class='del'>-	unsigned char *sb_ptr = (unsigned char *) &amp;tp-&gt;ssb;</div><div class='del'>-	unsigned short Status;</div><div class='del'>-	int i, loop_cnt, retry_cnt;</div><div class='del'>-</div><div class='del'>-	/* Normalize: byte order low/high, word order high/low! (only IPB!) */</div><div class='del'>-	tp-&gt;ipb.SCB_Addr = SWAPW(((char *)&amp;tp-&gt;scb - (char *)tp) + tp-&gt;dmabuffer);</div><div class='del'>-	tp-&gt;ipb.SSB_Addr = SWAPW(((char *)&amp;tp-&gt;ssb - (char *)tp) + tp-&gt;dmabuffer);</div><div class='del'>-</div><div class='del'>-	if(tms380tr_debug &gt; 3)</div><div class='del'>-	{</div><div class='del'>-		printk(KERN_DEBUG "%s: buffer (real): %lx\n", dev-&gt;name, (long) &amp;tp-&gt;scb);</div><div class='del'>-		printk(KERN_DEBUG "%s: buffer (virt): %lx\n", dev-&gt;name, (long) ((char *)&amp;tp-&gt;scb - (char *)tp) + (long) tp-&gt;dmabuffer);</div><div class='del'>-		printk(KERN_DEBUG "%s: buffer (DMA) : %lx\n", dev-&gt;name, (long) tp-&gt;dmabuffer);</div><div class='del'>-		printk(KERN_DEBUG "%s: buffer (tp)  : %lx\n", dev-&gt;name, (long) tp);</div><div class='del'>-	}</div><div class='del'>-	/* Maximum: three initialization retries */</div><div class='del'>-	retry_cnt = INIT_MAX_RETRIES;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		retry_cnt--;</div><div class='del'>-</div><div class='del'>-		/* Transfer initialization block */</div><div class='del'>-		SIFWRITEW(0x0001, SIFADX);</div><div class='del'>-</div><div class='del'>-		/* To address 0001:0A00 of adapter RAM */</div><div class='del'>-		SIFWRITEW(0x0A00, SIFADD);</div><div class='del'>-</div><div class='del'>-		/* Write 11 words to adapter RAM */</div><div class='del'>-		for(i = 0; i &lt; 11; i++)</div><div class='del'>-			SIFWRITEW(ipb_ptr[i], SIFINC);</div><div class='del'>-</div><div class='del'>-		/* Execute SCB adapter command */</div><div class='del'>-		tms380tr_exec_sifcmd(dev, CMD_EXECUTE);</div><div class='del'>-</div><div class='del'>-		loop_cnt = INIT_MAX_LOOPCNT;	/* Maximum: 11 seconds */</div><div class='del'>-</div><div class='del'>-		/* While remaining retries, no error and not completed */</div><div class='del'>-		do {</div><div class='del'>-			Status = 0;</div><div class='del'>-			loop_cnt--;</div><div class='del'>-			tms380tr_wait(HALF_SECOND);</div><div class='del'>-</div><div class='del'>-			/* Mask interesting status bits */</div><div class='del'>-			Status = SIFREADW(SIFSTS);</div><div class='del'>-			Status &amp;= STS_MASK;</div><div class='del'>-		} while(((Status &amp;(STS_INITIALIZE | STS_ERROR | STS_TEST)) != 0) &amp;&amp;</div><div class='del'>-			((Status &amp; STS_ERROR) == 0) &amp;&amp; (loop_cnt != 0));</div><div class='del'>-</div><div class='del'>-		if((Status &amp; (STS_INITIALIZE | STS_ERROR | STS_TEST)) == 0)</div><div class='del'>-		{</div><div class='del'>-			/* Initialization completed without error */</div><div class='del'>-			i = 0;</div><div class='del'>-			do {	/* Test if contents of SCB is valid */</div><div class='del'>-				if(SCB_Test[i] != *(cb_ptr + i))</div><div class='del'>-				{</div><div class='del'>-					printk(KERN_INFO "%s: DMA failed\n", dev-&gt;name);</div><div class='del'>-					/* DMA data error: wrong data in SCB */</div><div class='del'>-					return -1;</div><div class='del'>-				}</div><div class='del'>-				i++;</div><div class='del'>-			} while(i &lt; 6);</div><div class='del'>-</div><div class='del'>-			i = 0;</div><div class='del'>-			do {	/* Test if contents of SSB is valid */</div><div class='del'>-				if(SSB_Test[i] != *(sb_ptr + i))</div><div class='del'>-					/* DMA data error: wrong data in SSB */</div><div class='del'>-					return -1;</div><div class='del'>-				i++;</div><div class='del'>-			} while (i &lt; 8);</div><div class='del'>-</div><div class='del'>-			return 1;	/* Adapter successfully initialized */</div><div class='del'>-		}</div><div class='del'>-		else</div><div class='del'>-		{</div><div class='del'>-			if((Status &amp; STS_ERROR) != 0)</div><div class='del'>-			{</div><div class='del'>-				/* Initialization error occurred */</div><div class='del'>-				Status = SIFREADW(SIFSTS);</div><div class='del'>-				Status &amp;= STS_ERROR_MASK;</div><div class='del'>-				/* ShowInitialisationErrorCode(Status); */</div><div class='del'>-				printk(KERN_INFO "%s: Status error: %d\n", dev-&gt;name, Status);</div><div class='del'>-				return -1; /* Unrecoverable error */</div><div class='del'>-			}</div><div class='del'>-			else</div><div class='del'>-			{</div><div class='del'>-				if(retry_cnt &gt; 0)</div><div class='del'>-				{</div><div class='del'>-					/* Reset adapter and try init again */</div><div class='del'>-					tms380tr_exec_sifcmd(dev, EXEC_SOFT_RESET);</div><div class='del'>-					tms380tr_wait(HALF_SECOND);</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	} while(retry_cnt &gt; 0);</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "%s: Retry exceeded\n", dev-&gt;name);</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Check for outstanding commands in command queue and tries to execute</div><div class='del'>- * command immediately. Corresponding command flag in command queue is cleared.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_chk_outstanding_cmds(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	unsigned long Addr = 0;</div><div class='del'>-</div><div class='del'>-	if(tp-&gt;CMDqueue == 0)</div><div class='del'>-		return;		/* No command execution */</div><div class='del'>-</div><div class='del'>-	/* If SCB in use: no command */</div><div class='del'>-	if(tp-&gt;ScbInUse == 1)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Check if adapter is opened, avoiding COMMAND_REJECT</div><div class='del'>-	 * interrupt by the adapter!</div><div class='del'>-	 */</div><div class='del'>-	if (tp-&gt;AdapterOpenFlag == 0) {</div><div class='del'>-		if (tp-&gt;CMDqueue &amp; OC_OPEN) {</div><div class='del'>-			/* Execute OPEN command	*/</div><div class='del'>-			tp-&gt;CMDqueue ^= OC_OPEN;</div><div class='del'>-</div><div class='del'>-			Addr = htonl(((char *)&amp;tp-&gt;ocpl - (char *)tp) + tp-&gt;dmabuffer);</div><div class='del'>-			tp-&gt;scb.Parm[0] = LOWORD(Addr);</div><div class='del'>-			tp-&gt;scb.Parm[1] = HIWORD(Addr);</div><div class='del'>-			tp-&gt;scb.CMD = OPEN;</div><div class='del'>-		} else</div><div class='del'>-			/* No OPEN command queued, but adapter closed. Note:</div><div class='del'>-			 * We'll try to re-open the adapter in DriverPoll()</div><div class='del'>-			 */</div><div class='del'>-			return;		/* No adapter command issued */</div><div class='del'>-	} else {</div><div class='del'>-		/* Adapter is open; evaluate command queue: try to execute</div><div class='del'>-		 * outstanding commands (depending on priority!) CLOSE</div><div class='del'>-		 * command queued</div><div class='del'>-		 */</div><div class='del'>-		if (tp-&gt;CMDqueue &amp; OC_CLOSE) {</div><div class='del'>-			tp-&gt;CMDqueue ^= OC_CLOSE;</div><div class='del'>-			tp-&gt;AdapterOpenFlag = 0;</div><div class='del'>-			tp-&gt;scb.Parm[0] = 0; /* Parm[0], Parm[1] are ignored */</div><div class='del'>-			tp-&gt;scb.Parm[1] = 0; /* but should be set to zero! */</div><div class='del'>-			tp-&gt;scb.CMD = CLOSE;</div><div class='del'>-			if(!tp-&gt;HaltInProgress)</div><div class='del'>-				tp-&gt;CMDqueue |= OC_OPEN; /* re-open adapter */</div><div class='del'>-			else</div><div class='del'>-				tp-&gt;CMDqueue = 0;	/* no more commands */</div><div class='del'>-		} else if (tp-&gt;CMDqueue &amp; OC_RECEIVE) {</div><div class='del'>-			tp-&gt;CMDqueue ^= OC_RECEIVE;</div><div class='del'>-			Addr = htonl(((char *)tp-&gt;RplHead - (char *)tp) + tp-&gt;dmabuffer);</div><div class='del'>-			tp-&gt;scb.Parm[0] = LOWORD(Addr);</div><div class='del'>-			tp-&gt;scb.Parm[1] = HIWORD(Addr);</div><div class='del'>-			tp-&gt;scb.CMD = RECEIVE;</div><div class='del'>-		} else if (tp-&gt;CMDqueue &amp; OC_TRANSMIT_HALT) {</div><div class='del'>-			/* NOTE: TRANSMIT.HALT must be checked</div><div class='del'>-			 * before TRANSMIT.</div><div class='del'>-			 */</div><div class='del'>-			tp-&gt;CMDqueue ^= OC_TRANSMIT_HALT;</div><div class='del'>-			tp-&gt;scb.CMD = TRANSMIT_HALT;</div><div class='del'>-</div><div class='del'>-			/* Parm[0] and Parm[1] are ignored</div><div class='del'>-			 * but should be set to zero!</div><div class='del'>-			 */</div><div class='del'>-			tp-&gt;scb.Parm[0] = 0;</div><div class='del'>-			tp-&gt;scb.Parm[1] = 0;</div><div class='del'>-		} else if (tp-&gt;CMDqueue &amp; OC_TRANSMIT) {</div><div class='del'>-			/* NOTE: TRANSMIT must be</div><div class='del'>-			 * checked after TRANSMIT.HALT</div><div class='del'>-			 */</div><div class='del'>-			if (tp-&gt;TransmitCommandActive) {</div><div class='del'>-				if (!tp-&gt;TransmitHaltScheduled) {</div><div class='del'>-					tp-&gt;TransmitHaltScheduled = 1;</div><div class='del'>-					tms380tr_exec_cmd(dev, OC_TRANSMIT_HALT);</div><div class='del'>-				}</div><div class='del'>-				tp-&gt;TransmitCommandActive = 0;</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			tp-&gt;CMDqueue ^= OC_TRANSMIT;</div><div class='del'>-			tms380tr_cancel_tx_queue(tp);</div><div class='del'>-			Addr = htonl(((char *)tp-&gt;TplBusy - (char *)tp) + tp-&gt;dmabuffer);</div><div class='del'>-			tp-&gt;scb.Parm[0] = LOWORD(Addr);</div><div class='del'>-			tp-&gt;scb.Parm[1] = HIWORD(Addr);</div><div class='del'>-			tp-&gt;scb.CMD = TRANSMIT;</div><div class='del'>-			tp-&gt;TransmitCommandActive = 1;</div><div class='del'>-		} else if (tp-&gt;CMDqueue &amp; OC_MODIFY_OPEN_PARMS) {</div><div class='del'>-			tp-&gt;CMDqueue ^= OC_MODIFY_OPEN_PARMS;</div><div class='del'>-			tp-&gt;scb.Parm[0] = tp-&gt;ocpl.OPENOptions; /* new OPEN options*/</div><div class='del'>-			tp-&gt;scb.Parm[0] |= ENABLE_FULL_DUPLEX_SELECTION;</div><div class='del'>-			tp-&gt;scb.Parm[1] = 0; /* is ignored but should be zero */</div><div class='del'>-			tp-&gt;scb.CMD = MODIFY_OPEN_PARMS;</div><div class='del'>-		} else if (tp-&gt;CMDqueue &amp; OC_SET_FUNCT_ADDR) {</div><div class='del'>-			tp-&gt;CMDqueue ^= OC_SET_FUNCT_ADDR;</div><div class='del'>-			tp-&gt;scb.Parm[0] = LOWORD(tp-&gt;ocpl.FunctAddr);</div><div class='del'>-			tp-&gt;scb.Parm[1] = HIWORD(tp-&gt;ocpl.FunctAddr);</div><div class='del'>-			tp-&gt;scb.CMD = SET_FUNCT_ADDR;</div><div class='del'>-		} else if (tp-&gt;CMDqueue &amp; OC_SET_GROUP_ADDR) {</div><div class='del'>-			tp-&gt;CMDqueue ^= OC_SET_GROUP_ADDR;</div><div class='del'>-			tp-&gt;scb.Parm[0] = LOWORD(tp-&gt;ocpl.GroupAddr);</div><div class='del'>-			tp-&gt;scb.Parm[1] = HIWORD(tp-&gt;ocpl.GroupAddr);</div><div class='del'>-			tp-&gt;scb.CMD = SET_GROUP_ADDR;</div><div class='del'>-		} else if (tp-&gt;CMDqueue &amp; OC_READ_ERROR_LOG) {</div><div class='del'>-			tp-&gt;CMDqueue ^= OC_READ_ERROR_LOG;</div><div class='del'>-			Addr = htonl(((char *)&amp;tp-&gt;errorlogtable - (char *)tp) + tp-&gt;dmabuffer);</div><div class='del'>-			tp-&gt;scb.Parm[0] = LOWORD(Addr);</div><div class='del'>-			tp-&gt;scb.Parm[1] = HIWORD(Addr);</div><div class='del'>-			tp-&gt;scb.CMD = READ_ERROR_LOG;</div><div class='del'>-		} else {</div><div class='del'>-			printk(KERN_WARNING "CheckForOutstandingCommand: unknown Command\n");</div><div class='del'>-			tp-&gt;CMDqueue = 0;</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tp-&gt;ScbInUse = 1;	/* Set semaphore: SCB in use. */</div><div class='del'>-</div><div class='del'>-	/* Execute SCB and generate IRQ when done. */</div><div class='del'>-	tms380tr_exec_sifcmd(dev, CMD_EXECUTE | CMD_SCB_REQUEST);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * IRQ conditions: signal loss on the ring, transmit or receive of beacon</div><div class='del'>- * frames (disabled if bit 1 of OPEN option is set); report error MAC</div><div class='del'>- * frame transmit (disabled if bit 2 of OPEN option is set); open or short</div><div class='del'>- * circuit fault on the lobe is detected; remove MAC frame received;</div><div class='del'>- * error counter overflow (255); opened adapter is the only station in ring.</div><div class='del'>- * After some of the IRQs the adapter is closed!</div><div class='del'>- */</div><div class='del'>-static void tms380tr_ring_status_irq(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	tp-&gt;CurrentRingStatus = be16_to_cpu((unsigned short)tp-&gt;ssb.Parm[0]);</div><div class='del'>-</div><div class='del'>-	/* First: fill up statistics */</div><div class='del'>-	if(tp-&gt;ssb.Parm[0] &amp; SIGNAL_LOSS)</div><div class='del'>-	{</div><div class='del'>-		printk(KERN_INFO "%s: Signal Loss\n", dev-&gt;name);</div><div class='del'>-		tp-&gt;MacStat.line_errors++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Adapter is closed, but initialized */</div><div class='del'>-	if(tp-&gt;ssb.Parm[0] &amp; LOBE_WIRE_FAULT)</div><div class='del'>-	{</div><div class='del'>-		printk(KERN_INFO "%s: Lobe Wire Fault, Reopen Adapter\n", </div><div class='del'>-			dev-&gt;name);</div><div class='del'>-		tp-&gt;MacStat.line_errors++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(tp-&gt;ssb.Parm[0] &amp; RING_RECOVERY)</div><div class='del'>-		printk(KERN_INFO "%s: Ring Recovery\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	/* Counter overflow: read error log */</div><div class='del'>-	if(tp-&gt;ssb.Parm[0] &amp; COUNTER_OVERFLOW)</div><div class='del'>-	{</div><div class='del'>-		printk(KERN_INFO "%s: Counter Overflow\n", dev-&gt;name);</div><div class='del'>-		tms380tr_exec_cmd(dev, OC_READ_ERROR_LOG);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Adapter is closed, but initialized */</div><div class='del'>-	if(tp-&gt;ssb.Parm[0] &amp; REMOVE_RECEIVED)</div><div class='del'>-		printk(KERN_INFO "%s: Remove Received, Reopen Adapter\n", </div><div class='del'>-			dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	/* Adapter is closed, but initialized */</div><div class='del'>-	if(tp-&gt;ssb.Parm[0] &amp; AUTO_REMOVAL_ERROR)</div><div class='del'>-		printk(KERN_INFO "%s: Auto Removal Error, Reopen Adapter\n", </div><div class='del'>-			dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	if(tp-&gt;ssb.Parm[0] &amp; HARD_ERROR)</div><div class='del'>-		printk(KERN_INFO "%s: Hard Error\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	if(tp-&gt;ssb.Parm[0] &amp; SOFT_ERROR)</div><div class='del'>-		printk(KERN_INFO "%s: Soft Error\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	if(tp-&gt;ssb.Parm[0] &amp; TRANSMIT_BEACON)</div><div class='del'>-		printk(KERN_INFO "%s: Transmit Beacon\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	if(tp-&gt;ssb.Parm[0] &amp; SINGLE_STATION)</div><div class='del'>-		printk(KERN_INFO "%s: Single Station\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	/* Check if adapter has been closed */</div><div class='del'>-	if(tp-&gt;ssb.Parm[0] &amp; ADAPTER_CLOSED)</div><div class='del'>-	{</div><div class='del'>-		printk(KERN_INFO "%s: Adapter closed (Reopening)," </div><div class='del'>-			"CurrentRingStat %x\n",</div><div class='del'>-			dev-&gt;name, tp-&gt;CurrentRingStatus);</div><div class='del'>-		tp-&gt;AdapterOpenFlag = 0;</div><div class='del'>-		tms380tr_open_adapter(dev);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Issued if adapter has encountered an unrecoverable hardware</div><div class='del'>- * or software error.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_chk_irq(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	unsigned short AdapterCheckBlock[4];</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	tp-&gt;AdapterOpenFlag = 0;	/* Adapter closed now */</div><div class='del'>-</div><div class='del'>-	/* Page number of adapter memory */</div><div class='del'>-	SIFWRITEW(0x0001, SIFADX);</div><div class='del'>-	/* Address offset */</div><div class='del'>-	SIFWRITEW(CHECKADDR, SIFADR);</div><div class='del'>-</div><div class='del'>-	/* Reading 8 byte adapter check block. */</div><div class='del'>-	for(i = 0; i &lt; 4; i++)</div><div class='del'>-		AdapterCheckBlock[i] = SIFREADW(SIFINC);</div><div class='del'>-</div><div class='del'>-	if(tms380tr_debug &gt; 3)</div><div class='del'>-	{</div><div class='del'>-		printk(KERN_DEBUG "%s: AdapterCheckBlock: ", dev-&gt;name);</div><div class='del'>-		for (i = 0; i &lt; 4; i++)</div><div class='del'>-			printk("%04X", AdapterCheckBlock[i]);</div><div class='del'>-		printk("\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch(AdapterCheckBlock[0])</div><div class='del'>-	{</div><div class='del'>-		case DIO_PARITY:</div><div class='del'>-			printk(KERN_INFO "%s: DIO parity error\n", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case DMA_READ_ABORT:</div><div class='del'>-			printk(KERN_INFO "%s DMA read operation aborted:\n",</div><div class='del'>-				dev-&gt;name);</div><div class='del'>-			switch (AdapterCheckBlock[1])</div><div class='del'>-			{</div><div class='del'>-				case 0:</div><div class='del'>-					printk(KERN_INFO "Timeout\n");</div><div class='del'>-					printk(KERN_INFO "Address: %04X %04X\n",</div><div class='del'>-						AdapterCheckBlock[2],</div><div class='del'>-						AdapterCheckBlock[3]);</div><div class='del'>-					break;</div><div class='del'>-</div><div class='del'>-				case 1:</div><div class='del'>-					printk(KERN_INFO "Parity error\n");</div><div class='del'>-					printk(KERN_INFO "Address: %04X %04X\n",</div><div class='del'>-						AdapterCheckBlock[2], </div><div class='del'>-						AdapterCheckBlock[3]);</div><div class='del'>-					break;</div><div class='del'>-</div><div class='del'>-				case 2: </div><div class='del'>-					printk(KERN_INFO "Bus error\n");</div><div class='del'>-					printk(KERN_INFO "Address: %04X %04X\n",</div><div class='del'>-						AdapterCheckBlock[2], </div><div class='del'>-						AdapterCheckBlock[3]);</div><div class='del'>-					break;</div><div class='del'>-</div><div class='del'>-				default:</div><div class='del'>-					printk(KERN_INFO "Unknown error.\n");</div><div class='del'>-					break;</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case DMA_WRITE_ABORT:</div><div class='del'>-			printk(KERN_INFO "%s: DMA write operation aborted:\n",</div><div class='del'>-				dev-&gt;name);</div><div class='del'>-			switch (AdapterCheckBlock[1])</div><div class='del'>-			{</div><div class='del'>-				case 0: </div><div class='del'>-					printk(KERN_INFO "Timeout\n");</div><div class='del'>-					printk(KERN_INFO "Address: %04X %04X\n",</div><div class='del'>-						AdapterCheckBlock[2], </div><div class='del'>-						AdapterCheckBlock[3]);</div><div class='del'>-					break;</div><div class='del'>-</div><div class='del'>-				case 1: </div><div class='del'>-					printk(KERN_INFO "Parity error\n");</div><div class='del'>-					printk(KERN_INFO "Address: %04X %04X\n",</div><div class='del'>-						AdapterCheckBlock[2], </div><div class='del'>-						AdapterCheckBlock[3]);</div><div class='del'>-					break;</div><div class='del'>-</div><div class='del'>-				case 2: </div><div class='del'>-					printk(KERN_INFO "Bus error\n");</div><div class='del'>-					printk(KERN_INFO "Address: %04X %04X\n",</div><div class='del'>-						AdapterCheckBlock[2], </div><div class='del'>-						AdapterCheckBlock[3]);</div><div class='del'>-					break;</div><div class='del'>-</div><div class='del'>-				default:</div><div class='del'>-					printk(KERN_INFO "Unknown error.\n");</div><div class='del'>-					break;</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case ILLEGAL_OP_CODE:</div><div class='del'>-			printk(KERN_INFO "%s: Illegal operation code in firmware\n",</div><div class='del'>-				dev-&gt;name);</div><div class='del'>-			/* Parm[0-3]: adapter internal register R13-R15 */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case PARITY_ERRORS:</div><div class='del'>-			printk(KERN_INFO "%s: Adapter internal bus parity error\n",</div><div class='del'>-				dev-&gt;name);</div><div class='del'>-			/* Parm[0-3]: adapter internal register R13-R15 */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case RAM_DATA_ERROR:</div><div class='del'>-			printk(KERN_INFO "%s: RAM data error\n", dev-&gt;name);</div><div class='del'>-			/* Parm[0-1]: MSW/LSW address of RAM location. */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case RAM_PARITY_ERROR:</div><div class='del'>-			printk(KERN_INFO "%s: RAM parity error\n", dev-&gt;name);</div><div class='del'>-			/* Parm[0-1]: MSW/LSW address of RAM location. */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case RING_UNDERRUN:</div><div class='del'>-			printk(KERN_INFO "%s: Internal DMA underrun detected\n",</div><div class='del'>-				dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case INVALID_IRQ:</div><div class='del'>-			printk(KERN_INFO "%s: Unrecognized interrupt detected\n",</div><div class='del'>-				dev-&gt;name);</div><div class='del'>-			/* Parm[0-3]: adapter internal register R13-R15 */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case INVALID_ERROR_IRQ:</div><div class='del'>-			printk(KERN_INFO "%s: Unrecognized error interrupt detected\n",</div><div class='del'>-				dev-&gt;name);</div><div class='del'>-			/* Parm[0-3]: adapter internal register R13-R15 */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case INVALID_XOP:</div><div class='del'>-			printk(KERN_INFO "%s: Unrecognized XOP request detected\n",</div><div class='del'>-				dev-&gt;name);</div><div class='del'>-			/* Parm[0-3]: adapter internal register R13-R15 */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		default:</div><div class='del'>-			printk(KERN_INFO "%s: Unknown status", dev-&gt;name);</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(tms380tr_chipset_init(dev) == 1)</div><div class='del'>-	{</div><div class='del'>-		/* Restart of firmware successful */</div><div class='del'>-		tp-&gt;AdapterOpenFlag = 1;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Internal adapter pointer to RAM data are copied from adapter into</div><div class='del'>- * host system.</div><div class='del'>- */</div><div class='del'>-static int tms380tr_read_ptr(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	unsigned short adapterram;</div><div class='del'>-</div><div class='del'>-	tms380tr_read_ram(dev, (unsigned char *)&amp;tp-&gt;intptrs.BurnedInAddrPtr,</div><div class='del'>-			ADAPTER_INT_PTRS, 16);</div><div class='del'>-	tms380tr_read_ram(dev, (unsigned char *)&amp;adapterram,</div><div class='del'>-			cpu_to_be16((unsigned short)tp-&gt;intptrs.AdapterRAMPtr), 2);</div><div class='del'>-	return be16_to_cpu(adapterram); </div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Reads a number of bytes from adapter to system memory.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_read_ram(struct net_device *dev, unsigned char *Data,</div><div class='del'>-				unsigned short Address, int Length)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	unsigned short old_sifadx, old_sifadr, InWord;</div><div class='del'>-</div><div class='del'>-	/* Save the current values */</div><div class='del'>-	old_sifadx = SIFREADW(SIFADX);</div><div class='del'>-	old_sifadr = SIFREADW(SIFADR);</div><div class='del'>-</div><div class='del'>-	/* Page number of adapter memory */</div><div class='del'>-	SIFWRITEW(0x0001, SIFADX);</div><div class='del'>-	/* Address offset in adapter RAM */</div><div class='del'>-        SIFWRITEW(Address, SIFADR);</div><div class='del'>-</div><div class='del'>-	/* Copy len byte from adapter memory to system data area. */</div><div class='del'>-	i = 0;</div><div class='del'>-	for(;;)</div><div class='del'>-	{</div><div class='del'>-		InWord = SIFREADW(SIFINC);</div><div class='del'>-</div><div class='del'>-		*(Data + i) = HIBYTE(InWord);	/* Write first byte */</div><div class='del'>-		if(++i == Length)		/* All is done break */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		*(Data + i) = LOBYTE(InWord);	/* Write second byte */</div><div class='del'>-		if (++i == Length)		/* All is done break */</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Restore original values */</div><div class='del'>-	SIFWRITEW(old_sifadx, SIFADX);</div><div class='del'>-	SIFWRITEW(old_sifadr, SIFADR);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Cancel all queued packets in the transmission queue.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_cancel_tx_queue(struct net_local* tp)</div><div class='del'>-{</div><div class='del'>-	TPL *tpl;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * NOTE: There must not be an active TRANSMIT command pending, when</div><div class='del'>-	 * this function is called.</div><div class='del'>-	 */</div><div class='del'>-	if(tp-&gt;TransmitCommandActive)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for(;;)</div><div class='del'>-	{</div><div class='del'>-		tpl = tp-&gt;TplBusy;</div><div class='del'>-		if(!tpl-&gt;BusyFlag)</div><div class='del'>-			break;</div><div class='del'>-		/* "Remove" TPL from busy list. */</div><div class='del'>-		tp-&gt;TplBusy = tpl-&gt;NextTPLPtr;</div><div class='del'>-		tms380tr_write_tpl_status(tpl, 0);	/* Clear VALID bit */</div><div class='del'>-		tpl-&gt;BusyFlag = 0;		/* "free" TPL */</div><div class='del'>-</div><div class='del'>-		printk(KERN_INFO "Cancel tx (%08lXh).\n", (unsigned long)tpl);</div><div class='del'>-		if (tpl-&gt;DMABuff)</div><div class='del'>-			dma_unmap_single(tp-&gt;pdev, tpl-&gt;DMABuff, tpl-&gt;Skb-&gt;len, DMA_TO_DEVICE);</div><div class='del'>-		dev_kfree_skb_any(tpl-&gt;Skb);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This function is called whenever a transmit interrupt is generated by the</div><div class='del'>- * adapter. For a command complete interrupt, it is checked if we have to</div><div class='del'>- * issue a new transmit command or not.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_tx_status_irq(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	unsigned char HighByte, HighAc, LowAc;</div><div class='del'>-	TPL *tpl;</div><div class='del'>-</div><div class='del'>-	/* NOTE: At this point the SSB from TRANSMIT STATUS is no longer</div><div class='del'>-	 * available, because the CLEAR SSB command has already been issued.</div><div class='del'>-	 *</div><div class='del'>-	 * Process all complete transmissions.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	for(;;)</div><div class='del'>-	{</div><div class='del'>-		tpl = tp-&gt;TplBusy;</div><div class='del'>-		if(!tpl-&gt;BusyFlag || (tpl-&gt;Status</div><div class='del'>-			&amp; (TX_VALID | TX_FRAME_COMPLETE))</div><div class='del'>-			!= TX_FRAME_COMPLETE)</div><div class='del'>-		{</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* "Remove" TPL from busy list. */</div><div class='del'>-		tp-&gt;TplBusy = tpl-&gt;NextTPLPtr ;</div><div class='del'>-</div><div class='del'>-		/* Check the transmit status field only for directed frames*/</div><div class='del'>-		if(DIRECTED_FRAME(tpl) &amp;&amp; (tpl-&gt;Status &amp; TX_ERROR) == 0)</div><div class='del'>-		{</div><div class='del'>-			HighByte = GET_TRANSMIT_STATUS_HIGH_BYTE(tpl-&gt;Status);</div><div class='del'>-			HighAc   = GET_FRAME_STATUS_HIGH_AC(HighByte);</div><div class='del'>-			LowAc    = GET_FRAME_STATUS_LOW_AC(HighByte);</div><div class='del'>-</div><div class='del'>-			if((HighAc != LowAc) || (HighAc == AC_NOT_RECOGNIZED))</div><div class='del'>-			{</div><div class='del'>-				printk(KERN_DEBUG "%s: (DA=%08lX not recognized)\n",</div><div class='del'>-					dev-&gt;name,</div><div class='del'>-					*(unsigned long *)&amp;tpl-&gt;MData[2+2]);</div><div class='del'>-			}</div><div class='del'>-			else</div><div class='del'>-			{</div><div class='del'>-				if(tms380tr_debug &gt; 3)</div><div class='del'>-					printk(KERN_DEBUG "%s: Directed frame tx'd\n", </div><div class='del'>-						dev-&gt;name);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		else</div><div class='del'>-		{</div><div class='del'>-			if(!DIRECTED_FRAME(tpl))</div><div class='del'>-			{</div><div class='del'>-				if(tms380tr_debug &gt; 3)</div><div class='del'>-					printk(KERN_DEBUG "%s: Broadcast frame tx'd\n",</div><div class='del'>-						dev-&gt;name);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		tp-&gt;MacStat.tx_packets++;</div><div class='del'>-		if (tpl-&gt;DMABuff)</div><div class='del'>-			dma_unmap_single(tp-&gt;pdev, tpl-&gt;DMABuff, tpl-&gt;Skb-&gt;len, DMA_TO_DEVICE);</div><div class='del'>-		dev_kfree_skb_irq(tpl-&gt;Skb);</div><div class='del'>-		tpl-&gt;BusyFlag = 0;	/* "free" TPL */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(!tp-&gt;TplFree-&gt;NextTPLPtr-&gt;BusyFlag)</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Called if a frame receive interrupt is generated by the adapter.</div><div class='del'>- * Check if the frame is valid and indicate it to system.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_rcv_status_irq(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	unsigned char *ReceiveDataPtr;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	unsigned int Length, Length2;</div><div class='del'>-	RPL *rpl;</div><div class='del'>-	RPL *SaveHead;</div><div class='del'>-	dma_addr_t dmabuf;</div><div class='del'>-</div><div class='del'>-	/* NOTE: At this point the SSB from RECEIVE STATUS is no longer</div><div class='del'>-	 * available, because the CLEAR SSB command has already been issued.</div><div class='del'>-	 *</div><div class='del'>-	 * Process all complete receives.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	for(;;)</div><div class='del'>-	{</div><div class='del'>-		rpl = tp-&gt;RplHead;</div><div class='del'>-		if(rpl-&gt;Status &amp; RX_VALID)</div><div class='del'>-			break;		/* RPL still in use by adapter */</div><div class='del'>-</div><div class='del'>-		/* Forward RPLHead pointer to next list. */</div><div class='del'>-		SaveHead = tp-&gt;RplHead;</div><div class='del'>-		tp-&gt;RplHead = rpl-&gt;NextRPLPtr;</div><div class='del'>-</div><div class='del'>-		/* Get the frame size (Byte swap for Intel).</div><div class='del'>-		 * Do this early (see workaround comment below)</div><div class='del'>-		 */</div><div class='del'>-		Length = be16_to_cpu(rpl-&gt;FrameSize);</div><div class='del'>-</div><div class='del'>-		/* Check if the Frame_Start, Frame_End and</div><div class='del'>-		 * Frame_Complete bits are set.</div><div class='del'>-		 */</div><div class='del'>-		if((rpl-&gt;Status &amp; VALID_SINGLE_BUFFER_FRAME)</div><div class='del'>-			== VALID_SINGLE_BUFFER_FRAME)</div><div class='del'>-		{</div><div class='del'>-			ReceiveDataPtr = rpl-&gt;MData;</div><div class='del'>-</div><div class='del'>-			/* Workaround for delayed write of FrameSize on ISA</div><div class='del'>-			 * (FrameSize is false but valid-bit is reset)</div><div class='del'>-			 * Frame size is set to zero when the RPL is freed.</div><div class='del'>-			 * Length2 is there because there have also been</div><div class='del'>-			 * cases where the FrameSize was partially written</div><div class='del'>-			 */</div><div class='del'>-			Length2 = be16_to_cpu(rpl-&gt;FrameSize);</div><div class='del'>-</div><div class='del'>-			if(Length == 0 || Length != Length2)</div><div class='del'>-			{</div><div class='del'>-				tp-&gt;RplHead = SaveHead;</div><div class='del'>-				break;	/* Return to tms380tr_interrupt */</div><div class='del'>-			}</div><div class='del'>-			tms380tr_update_rcv_stats(tp,ReceiveDataPtr,Length);</div><div class='del'>-			  </div><div class='del'>-			if(tms380tr_debug &gt; 3)</div><div class='del'>-				printk(KERN_DEBUG "%s: Packet Length %04X (%d)\n",</div><div class='del'>-					dev-&gt;name, Length, Length);</div><div class='del'>-			  </div><div class='del'>-			/* Indicate the received frame to system the</div><div class='del'>-			 * adapter does the Source-Routing padding for </div><div class='del'>-			 * us. See: OpenOptions in tms380tr_init_opb()</div><div class='del'>-			 */</div><div class='del'>-			skb = rpl-&gt;Skb;</div><div class='del'>-			if(rpl-&gt;SkbStat == SKB_UNAVAILABLE)</div><div class='del'>-			{</div><div class='del'>-				/* Try again to allocate skb */</div><div class='del'>-				skb = dev_alloc_skb(tp-&gt;MaxPacketSize);</div><div class='del'>-				if(skb == NULL)</div><div class='del'>-				{</div><div class='del'>-					/* Update Stats ?? */</div><div class='del'>-				}</div><div class='del'>-				else</div><div class='del'>-				{</div><div class='del'>-					skb_put(skb, tp-&gt;MaxPacketSize);</div><div class='del'>-					rpl-&gt;SkbStat 	= SKB_DATA_COPY;</div><div class='del'>-					ReceiveDataPtr 	= rpl-&gt;MData;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if(skb &amp;&amp; (rpl-&gt;SkbStat == SKB_DATA_COPY ||</div><div class='del'>-				   rpl-&gt;SkbStat == SKB_DMA_DIRECT))</div><div class='del'>-			{</div><div class='del'>-				if(rpl-&gt;SkbStat == SKB_DATA_COPY)</div><div class='del'>-					skb_copy_to_linear_data(skb, ReceiveDataPtr,</div><div class='del'>-						       Length);</div><div class='del'>-</div><div class='del'>-				/* Deliver frame to system */</div><div class='del'>-				rpl-&gt;Skb = NULL;</div><div class='del'>-				skb_trim(skb,Length);</div><div class='del'>-				skb-&gt;protocol = tr_type_trans(skb,dev);</div><div class='del'>-				netif_rx(skb);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		else	/* Invalid frame */</div><div class='del'>-		{</div><div class='del'>-			if(rpl-&gt;Skb != NULL)</div><div class='del'>-				dev_kfree_skb_irq(rpl-&gt;Skb);</div><div class='del'>-</div><div class='del'>-			/* Skip list. */</div><div class='del'>-			if(rpl-&gt;Status &amp; RX_START_FRAME)</div><div class='del'>-				/* Frame start bit is set -&gt; overflow. */</div><div class='del'>-				tp-&gt;MacStat.rx_errors++;</div><div class='del'>-		}</div><div class='del'>-		if (rpl-&gt;DMABuff)</div><div class='del'>-			dma_unmap_single(tp-&gt;pdev, rpl-&gt;DMABuff, tp-&gt;MaxPacketSize, DMA_TO_DEVICE);</div><div class='del'>-		rpl-&gt;DMABuff = 0;</div><div class='del'>-</div><div class='del'>-		/* Allocate new skb for rpl */</div><div class='del'>-		rpl-&gt;Skb = dev_alloc_skb(tp-&gt;MaxPacketSize);</div><div class='del'>-		/* skb == NULL ? then use local buffer */</div><div class='del'>-		if(rpl-&gt;Skb == NULL)</div><div class='del'>-		{</div><div class='del'>-			rpl-&gt;SkbStat = SKB_UNAVAILABLE;</div><div class='del'>-			rpl-&gt;FragList[0].DataAddr = htonl(((char *)tp-&gt;LocalRxBuffers[rpl-&gt;RPLIndex] - (char *)tp) + tp-&gt;dmabuffer);</div><div class='del'>-			rpl-&gt;MData = tp-&gt;LocalRxBuffers[rpl-&gt;RPLIndex];</div><div class='del'>-		}</div><div class='del'>-		else	/* skb != NULL */</div><div class='del'>-		{</div><div class='del'>-			rpl-&gt;Skb-&gt;dev = dev;</div><div class='del'>-			skb_put(rpl-&gt;Skb, tp-&gt;MaxPacketSize);</div><div class='del'>-</div><div class='del'>-			/* Data unreachable for DMA ? then use local buffer */</div><div class='del'>-			dmabuf = dma_map_single(tp-&gt;pdev, rpl-&gt;Skb-&gt;data, tp-&gt;MaxPacketSize, DMA_FROM_DEVICE);</div><div class='del'>-			if(tp-&gt;dmalimit &amp;&amp; (dmabuf + tp-&gt;MaxPacketSize &gt; tp-&gt;dmalimit))</div><div class='del'>-			{</div><div class='del'>-				rpl-&gt;SkbStat = SKB_DATA_COPY;</div><div class='del'>-				rpl-&gt;FragList[0].DataAddr = htonl(((char *)tp-&gt;LocalRxBuffers[rpl-&gt;RPLIndex] - (char *)tp) + tp-&gt;dmabuffer);</div><div class='del'>-				rpl-&gt;MData = tp-&gt;LocalRxBuffers[rpl-&gt;RPLIndex];</div><div class='del'>-			}</div><div class='del'>-			else</div><div class='del'>-			{</div><div class='del'>-				/* DMA directly in skb-&gt;data */</div><div class='del'>-				rpl-&gt;SkbStat = SKB_DMA_DIRECT;</div><div class='del'>-				rpl-&gt;FragList[0].DataAddr = htonl(dmabuf);</div><div class='del'>-				rpl-&gt;MData = rpl-&gt;Skb-&gt;data;</div><div class='del'>-				rpl-&gt;DMABuff = dmabuf;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		rpl-&gt;FragList[0].DataCount = cpu_to_be16((unsigned short)tp-&gt;MaxPacketSize);</div><div class='del'>-		rpl-&gt;FrameSize = 0;</div><div class='del'>-</div><div class='del'>-		/* Pass the last RPL back to the adapter */</div><div class='del'>-		tp-&gt;RplTail-&gt;FrameSize = 0;</div><div class='del'>-</div><div class='del'>-		/* Reset the CSTAT field in the list. */</div><div class='del'>-		tms380tr_write_rpl_status(tp-&gt;RplTail, RX_VALID | RX_FRAME_IRQ);</div><div class='del'>-</div><div class='del'>-		/* Current RPL becomes last one in list. */</div><div class='del'>-		tp-&gt;RplTail = tp-&gt;RplTail-&gt;NextRPLPtr;</div><div class='del'>-</div><div class='del'>-		/* Inform adapter about RPL valid. */</div><div class='del'>-		tms380tr_exec_sifcmd(dev, CMD_RX_VALID);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This function should be used whenever the status of any RPL must be</div><div class='del'>- * modified by the driver, because the compiler may otherwise change the</div><div class='del'>- * order of instructions such that writing the RPL status may be executed</div><div class='del'>- * at an undesirable time. When this function is used, the status is</div><div class='del'>- * always written when the function is called.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_write_rpl_status(RPL *rpl, unsigned int Status)</div><div class='del'>-{</div><div class='del'>-	rpl-&gt;Status = Status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The function updates the statistic counters in mac-&gt;MacStat.</div><div class='del'>- * It differtiates between directed and broadcast/multicast ( ==functional)</div><div class='del'>- * frames.</div><div class='del'>- */</div><div class='del'>-static void tms380tr_update_rcv_stats(struct net_local *tp, unsigned char DataPtr[],</div><div class='del'>-					unsigned int Length)</div><div class='del'>-{</div><div class='del'>-	tp-&gt;MacStat.rx_packets++;</div><div class='del'>-	tp-&gt;MacStat.rx_bytes += Length;</div><div class='del'>-	</div><div class='del'>-	/* Test functional bit */</div><div class='del'>-	if(DataPtr[2] &amp; GROUP_BIT)</div><div class='del'>-		tp-&gt;MacStat.multicast++;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tms380tr_set_mac_address(struct net_device *dev, void *addr)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	struct sockaddr *saddr = addr;</div><div class='del'>-	</div><div class='del'>-	if (tp-&gt;AdapterOpenFlag || tp-&gt;AdapterVirtOpenFlag) {</div><div class='del'>-		printk(KERN_WARNING "%s: Cannot set MAC/LAA address while card is open\n", dev-&gt;name);</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-	memcpy(dev-&gt;dev_addr, saddr-&gt;sa_data, dev-&gt;addr_len);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#if TMS380TR_DEBUG &gt; 0</div><div class='del'>-/*</div><div class='del'>- * Dump Packet (data)</div><div class='del'>- */</div><div class='del'>-static void tms380tr_dump(unsigned char *Data, int length)</div><div class='del'>-{</div><div class='del'>-	int i, j;</div><div class='del'>-</div><div class='del'>-	for (i = 0, j = 0; i &lt; length / 8; i++, j += 8)</div><div class='del'>-	{</div><div class='del'>-		printk(KERN_DEBUG "%02x %02x %02x %02x %02x %02x %02x %02x\n",</div><div class='del'>-		       Data[j+0],Data[j+1],Data[j+2],Data[j+3],</div><div class='del'>-		       Data[j+4],Data[j+5],Data[j+6],Data[j+7]);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-void tmsdev_term(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tp;</div><div class='del'>-</div><div class='del'>-	tp = netdev_priv(dev);</div><div class='del'>-	dma_unmap_single(tp-&gt;pdev, tp-&gt;dmabuffer, sizeof(struct net_local),</div><div class='del'>-		DMA_BIDIRECTIONAL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const struct net_device_ops tms380tr_netdev_ops = {</div><div class='del'>-	.ndo_open		= tms380tr_open,</div><div class='del'>-	.ndo_stop		= tms380tr_close,</div><div class='del'>-	.ndo_start_xmit		= tms380tr_send_packet,</div><div class='del'>-	.ndo_tx_timeout		= tms380tr_timeout,</div><div class='del'>-	.ndo_get_stats		= tms380tr_get_stats,</div><div class='del'>-	.ndo_set_rx_mode	= tms380tr_set_multicast_list,</div><div class='del'>-	.ndo_set_mac_address	= tms380tr_set_mac_address,</div><div class='del'>-};</div><div class='del'>-EXPORT_SYMBOL(tms380tr_netdev_ops);</div><div class='del'>-</div><div class='del'>-int tmsdev_init(struct net_device *dev, struct device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *tms_local;</div><div class='del'>-</div><div class='del'>-	memset(netdev_priv(dev), 0, sizeof(struct net_local));</div><div class='del'>-	tms_local = netdev_priv(dev);</div><div class='del'>-	init_waitqueue_head(&amp;tms_local-&gt;wait_for_tok_int);</div><div class='del'>-	if (pdev-&gt;dma_mask)</div><div class='del'>-		tms_local-&gt;dmalimit = *pdev-&gt;dma_mask;</div><div class='del'>-	else</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	tms_local-&gt;pdev = pdev;</div><div class='del'>-	tms_local-&gt;dmabuffer = dma_map_single(pdev, (void *)tms_local,</div><div class='del'>-	    sizeof(struct net_local), DMA_BIDIRECTIONAL);</div><div class='del'>-	if (tms_local-&gt;dmabuffer + sizeof(struct net_local) &gt; </div><div class='del'>-			tms_local-&gt;dmalimit)</div><div class='del'>-	{</div><div class='del'>-		printk(KERN_INFO "%s: Memory not accessible for DMA\n",</div><div class='del'>-			dev-&gt;name);</div><div class='del'>-		tmsdev_term(dev);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	</div><div class='del'>-	dev-&gt;netdev_ops		= &amp;tms380tr_netdev_ops;</div><div class='del'>-	dev-&gt;watchdog_timeo	= HZ;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(tms380tr_open);</div><div class='del'>-EXPORT_SYMBOL(tms380tr_close);</div><div class='del'>-EXPORT_SYMBOL(tms380tr_interrupt);</div><div class='del'>-EXPORT_SYMBOL(tmsdev_init);</div><div class='del'>-EXPORT_SYMBOL(tmsdev_term);</div><div class='del'>-EXPORT_SYMBOL(tms380tr_wait);</div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='del'>-</div><div class='del'>-static struct module *TMS380_module = NULL;</div><div class='del'>-</div><div class='del'>-int init_module(void)</div><div class='del'>-{</div><div class='del'>-	printk(KERN_DEBUG "%s", version);</div><div class='del'>-	</div><div class='del'>-	TMS380_module = &amp;__this_module;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void cleanup_module(void)</div><div class='del'>-{</div><div class='del'>-	TMS380_module = NULL;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/tokenring/tms380tr.h b/drivers/net/tokenring/tms380tr.h<br/>deleted file mode 100644<br/>index e5a617c586c2..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/tms380tr.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/tms380tr.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1141 +0,0 @@</div><div class='del'>-/* </div><div class='del'>- * tms380tr.h: TI TMS380 Token Ring driver for Linux</div><div class='del'>- *</div><div class='del'>- * Authors:</div><div class='del'>- * - Christoph Goos &lt;cgoos@syskonnect.de&gt;</div><div class='del'>- * - Adam Fritzler</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __LINUX_TMS380TR_H</div><div class='del'>-#define __LINUX_TMS380TR_H</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-</div><div class='del'>-/* module prototypes */</div><div class='del'>-extern const struct net_device_ops tms380tr_netdev_ops;</div><div class='del'>-int tms380tr_open(struct net_device *dev);</div><div class='del'>-int tms380tr_close(struct net_device *dev);</div><div class='del'>-irqreturn_t tms380tr_interrupt(int irq, void *dev_id);</div><div class='del'>-int tmsdev_init(struct net_device *dev, struct device *pdev);</div><div class='del'>-void tmsdev_term(struct net_device *dev);</div><div class='del'>-void tms380tr_wait(unsigned long time);</div><div class='del'>-</div><div class='del'>-#define TMS380TR_MAX_ADAPTERS 7</div><div class='del'>-</div><div class='del'>-#define SEND_TIMEOUT 10*HZ</div><div class='del'>-</div><div class='del'>-#define TR_RCF_LONGEST_FRAME_MASK 0x0070</div><div class='del'>-#define TR_RCF_FRAME4K 0x0030</div><div class='del'>-</div><div class='del'>-/*------------------------------------------------------------------*/</div><div class='del'>-/*  Bit order for adapter communication with DMA		    */</div><div class='del'>-/*  --------------------------------------------------------------  */</div><div class='del'>-/*  Bit  8 | 9| 10| 11|| 12| 13| 14| 15|| 0| 1| 2| 3|| 4| 5| 6| 7|  */</div><div class='del'>-/*  --------------------------------------------------------------  */</div><div class='del'>-/*  The bytes in a word must be byte swapped. Also, if a double	    */</div><div class='del'>-/*  word is used for storage, then the words, as well as the bytes, */</div><div class='del'>-/*  must be swapped. 						    */</div><div class='del'>-/*  Bit order for adapter communication with DIO 		    */</div><div class='del'>-/*  --------------------------------------------------------------  */</div><div class='del'>-/*  Bit  0 | 1| 2| 3|| 4| 5| 6| 7|| 8| 9| 10| 11|| 12| 13| 14| 15|  */</div><div class='del'>-/*  --------------------------------------------------------------  */</div><div class='del'>-/*------------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-/* Swap words of a long.                        */</div><div class='del'>-#define SWAPW(x) (((x) &lt;&lt; 16) | ((x) &gt;&gt; 16))</div><div class='del'>-</div><div class='del'>-/* Get the low byte of a word.                      */</div><div class='del'>-#define LOBYTE(w)       ((unsigned char)(w))</div><div class='del'>-</div><div class='del'>-/* Get the high byte of a word.                     */</div><div class='del'>-#define HIBYTE(w)       ((unsigned char)((unsigned short)(w) &gt;&gt; 8))</div><div class='del'>-</div><div class='del'>-/* Get the low word of a long.                      */</div><div class='del'>-#define LOWORD(l)       ((unsigned short)(l))</div><div class='del'>-</div><div class='del'>-/* Get the high word of a long.                     */</div><div class='del'>-#define HIWORD(l)       ((unsigned short)((unsigned long)(l) &gt;&gt; 16))</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Token ring adapter I/O addresses for normal mode. */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The SIF registers.  Common to all adapters.</div><div class='del'>- */</div><div class='del'>-/* Basic SIF (SRSX = 0) */</div><div class='del'>-#define SIFDAT      		0x00	/* SIF/DMA data. */</div><div class='del'>-#define SIFINC      		0x02  	/* IO Word data with auto increment. */</div><div class='del'>-#define SIFINH      		0x03  	/* IO Byte data with auto increment. */</div><div class='del'>-#define SIFADR      		0x04  	/* SIF/DMA Address. */</div><div class='del'>-#define SIFCMD      		0x06  	/* SIF Command. */</div><div class='del'>-#define SIFSTS      		0x06  	/* SIF Status. */</div><div class='del'>-</div><div class='del'>-/* "Extended" SIF (SRSX = 1) */</div><div class='del'>-#define SIFACL      		0x08  	/* SIF Adapter Control Register. */</div><div class='del'>-#define SIFADD      		0x0a 	/* SIF/DMA Address. -- 0x0a */</div><div class='del'>-#define SIFADX      		0x0c     /* 0x0c */</div><div class='del'>-#define DMALEN      		0x0e 	/* SIF DMA length. -- 0x0e */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * POS Registers.  Only for ISA Adapters.</div><div class='del'>- */</div><div class='del'>-#define POSREG      		0x10 	/* Adapter Program Option Select (POS)</div><div class='del'>-			 		 * Register: base IO address + 16 byte.</div><div class='del'>-			 		 */</div><div class='del'>-#define POSREG_2    		24L 	/* only for TR4/16+ adapter</div><div class='del'>-			 		 * base IO address + 24 byte. -- 0x18</div><div class='del'>-			 		 */</div><div class='del'>-</div><div class='del'>-/* SIFCMD command codes (high-low) */</div><div class='del'>-#define CMD_INTERRUPT_ADAPTER   0x8000  /* Cause internal adapter interrupt */</div><div class='del'>-#define CMD_ADAPTER_RESET   	0x4000  /* Hardware reset of adapter */</div><div class='del'>-#define CMD_SSB_CLEAR		0x2000  /* Acknowledge to adapter to</div><div class='del'>-					 * system interrupts.</div><div class='del'>-					 */</div><div class='del'>-#define CMD_EXECUTE		0x1000	/* Execute SCB command */</div><div class='del'>-#define CMD_SCB_REQUEST		0x0800  /* Request adapter to interrupt</div><div class='del'>-					 * system when SCB is available for</div><div class='del'>-					 * another command.</div><div class='del'>-					 */</div><div class='del'>-#define CMD_RX_CONTINUE		0x0400  /* Continue receive after odd pointer</div><div class='del'>-					 * stop. (odd pointer receive method)</div><div class='del'>-					 */</div><div class='del'>-#define CMD_RX_VALID		0x0200  /* Now actual RPL is valid. */</div><div class='del'>-#define CMD_TX_VALID		0x0100  /* Now actual TPL is valid. (valid</div><div class='del'>-					 * bit receive/transmit method)</div><div class='del'>-					 */</div><div class='del'>-#define CMD_SYSTEM_IRQ		0x0080  /* Adapter-to-attached-system</div><div class='del'>-					 * interrupt is reset.</div><div class='del'>-					 */</div><div class='del'>-#define CMD_CLEAR_SYSTEM_IRQ	0x0080	/* Clear SYSTEM_INTERRUPT bit.</div><div class='del'>-					 * (write: 1=ignore, 0=reset)</div><div class='del'>-					 */</div><div class='del'>-#define EXEC_SOFT_RESET		0xFF00  /* adapter soft reset. (restart</div><div class='del'>-					 * adapter after hardware reset)</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* ACL commands (high-low) */</div><div class='del'>-#define ACL_SWHLDA		0x0800  /* Software hold acknowledge. */</div><div class='del'>-#define ACL_SWDDIR		0x0400  /* Data transfer direction. */</div><div class='del'>-#define ACL_SWHRQ		0x0200  /* Pseudo DMA operation. */</div><div class='del'>-#define ACL_PSDMAEN		0x0100  /* Enable pseudo system DMA. */</div><div class='del'>-#define ACL_ARESET		0x0080  /* Adapter hardware reset command.</div><div class='del'>-					 * (held in reset condition as</div><div class='del'>-					 * long as bit is set)</div><div class='del'>-					 */</div><div class='del'>-#define ACL_CPHALT		0x0040  /* Communication processor halt.</div><div class='del'>-					 * (can only be set while ACL_ARESET</div><div class='del'>-					 * bit is set; prevents adapter</div><div class='del'>-					 * processor from executing code while</div><div class='del'>-					 * downloading firmware)</div><div class='del'>-					 */</div><div class='del'>-#define ACL_BOOT		0x0020</div><div class='del'>-#define ACL_SINTEN		0x0008  /* System interrupt enable/disable</div><div class='del'>-					 * (1/0): can be written if ACL_ARESET</div><div class='del'>-					 * is zero.</div><div class='del'>-					 */</div><div class='del'>-#define ACL_PEN                 0x0004</div><div class='del'>-</div><div class='del'>-#define ACL_NSELOUT0            0x0002 </div><div class='del'>-#define ACL_NSELOUT1            0x0001	/* NSELOUTx have a card-specific</div><div class='del'>-					 * meaning for setting ring speed.</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-#define PS_DMA_MASK		(ACL_SWHRQ | ACL_PSDMAEN)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* SIFSTS register return codes (high-low) */</div><div class='del'>-#define STS_SYSTEM_IRQ		0x0080	/* Adapter-to-attached-system</div><div class='del'>-					 * interrupt is valid.</div><div class='del'>-					 */</div><div class='del'>-#define STS_INITIALIZE		0x0040  /* INITIALIZE status. (ready to</div><div class='del'>-					 * initialize)</div><div class='del'>-					 */</div><div class='del'>-#define STS_TEST		0x0020  /* TEST status. (BUD not completed) */</div><div class='del'>-#define STS_ERROR		0x0010  /* ERROR status. (unrecoverable</div><div class='del'>-					 * HW error occurred)</div><div class='del'>-					 */</div><div class='del'>-#define STS_MASK		0x00F0  /* Mask interesting status bits. */</div><div class='del'>-#define STS_ERROR_MASK		0x000F  /* Get Error Code by masking the</div><div class='del'>-					 * interrupt code bits.</div><div class='del'>-					 */</div><div class='del'>-#define ADAPTER_INT_PTRS	0x0A00  /* Address offset of adapter internal</div><div class='del'>-					 * pointers 01:0a00 (high-low) have to</div><div class='del'>-					 * be read after init and before open.</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Interrupt Codes (only MAC IRQs) */</div><div class='del'>-#define STS_IRQ_ADAPTER_CHECK	0x0000	/* unrecoverable hardware or</div><div class='del'>-					 * software error.</div><div class='del'>-					 */ </div><div class='del'>-#define STS_IRQ_RING_STATUS	0x0004  /* SSB is updated with ring status. */</div><div class='del'>-#define STS_IRQ_LLC_STATUS	0x0005	/* Not used in MAC-only microcode */</div><div class='del'>-#define STS_IRQ_SCB_CLEAR	0x0006	/* SCB clear, following an</div><div class='del'>-					 * SCB_REQUEST IRQ.</div><div class='del'>-					 */</div><div class='del'>-#define STS_IRQ_TIMER		0x0007	/* Not normally used in MAC ucode */</div><div class='del'>-#define STS_IRQ_COMMAND_STATUS	0x0008	/* SSB is updated with command </div><div class='del'>-					 * status.</div><div class='del'>-					 */ </div><div class='del'>-#define STS_IRQ_RECEIVE_STATUS	0x000A	/* SSB is updated with receive</div><div class='del'>-					 * status.</div><div class='del'>-					 */</div><div class='del'>-#define STS_IRQ_TRANSMIT_STATUS	0x000C	/* SSB is updated with transmit</div><div class='del'>-                                         * status</div><div class='del'>-					 */</div><div class='del'>-#define STS_IRQ_RECEIVE_PENDING	0x000E	/* Not used in MAC-only microcode */</div><div class='del'>-#define STS_IRQ_MASK		0x000F	/* = STS_ERROR_MASK. */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* TRANSMIT_STATUS completion code: (SSB.Parm[0]) */</div><div class='del'>-#define COMMAND_COMPLETE	0x0080	/* TRANSMIT command completed</div><div class='del'>-                                         * (avoid this!) issue another transmit</div><div class='del'>-					 * to send additional frames.</div><div class='del'>-					 */</div><div class='del'>-#define FRAME_COMPLETE		0x0040	/* Frame has been transmitted;</div><div class='del'>-					 * INTERRUPT_FRAME bit was set in the</div><div class='del'>-					 * CSTAT request; indication of possibly</div><div class='del'>-					 * more than one frame transmissions!</div><div class='del'>-					 * SSB.Parm[0-1]: 32 bit pointer to</div><div class='del'>-					 * TPL of last frame.</div><div class='del'>-					 */</div><div class='del'>-#define LIST_ERROR		0x0020	/* Error in one of the TPLs that</div><div class='del'>-					 * compose the frame; TRANSMIT</div><div class='del'>-					 * terminated; Parm[1-2]: 32bit pointer</div><div class='del'>-					 * to TPL which starts the error</div><div class='del'>-					 * frame; error details in bits 8-13.</div><div class='del'>-					 * (14?)</div><div class='del'>-					 */</div><div class='del'>-#define FRAME_SIZE_ERROR	0x8000	/* FRAME_SIZE does not equal the sum of</div><div class='del'>-					 * the valid DATA_COUNT fields;</div><div class='del'>-					 * FRAME_SIZE less than header plus</div><div class='del'>-					 * information field. (15 bytes +</div><div class='del'>-					 * routing field) Or if FRAME_SIZE</div><div class='del'>-					 * was specified as zero in one list.</div><div class='del'>-					 */</div><div class='del'>-#define TX_THRESHOLD		0x4000	/* FRAME_SIZE greater than (BUFFER_SIZE</div><div class='del'>-					 * - 9) * TX_BUF_MAX.</div><div class='del'>-					 */</div><div class='del'>-#define ODD_ADDRESS		0x2000	/* Odd forward pointer value is</div><div class='del'>-					 * read on a list without END_FRAME</div><div class='del'>-					 * indication.</div><div class='del'>-					 */</div><div class='del'>-#define FRAME_ERROR		0x1000	/* START_FRAME bit (not) anticipated,</div><div class='del'>-					 * but (not) set.</div><div class='del'>-					 */</div><div class='del'>-#define ACCESS_PRIORITY_ERROR	0x0800	/* Access priority requested has not</div><div class='del'>-					 * been allowed.</div><div class='del'>-					 */</div><div class='del'>-#define UNENABLED_MAC_FRAME	0x0400	/* MAC frame has source class of zero</div><div class='del'>-					 * or MAC frame PCF ATTN field is</div><div class='del'>-					 * greater than one.</div><div class='del'>-					 */</div><div class='del'>-#define ILLEGAL_FRAME_FORMAT	0x0200	/* Bit 0 or FC field was set to one. */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Since we need to support some functions even if the adapter is in a</div><div class='del'>- * CLOSED state, we have a (pseudo-) command queue which holds commands</div><div class='del'>- * that are outstandig to be executed.</div><div class='del'>- *</div><div class='del'>- * Each time a command completes, an interrupt occurs and the next</div><div class='del'>- * command is executed. The command queue is actually a simple word with </div><div class='del'>- * a bit for each outstandig command. Therefore the commands will not be</div><div class='del'>- * executed in the order they have been queued.</div><div class='del'>- *</div><div class='del'>- * The following defines the command code bits and the command queue:</div><div class='del'>- */</div><div class='del'>-#define OC_OPEN			0x0001	/* OPEN command */</div><div class='del'>-#define OC_TRANSMIT		0x0002	/* TRANSMIT command */</div><div class='del'>-#define OC_TRANSMIT_HALT	0x0004	/* TRANSMIT_HALT command */</div><div class='del'>-#define OC_RECEIVE		0x0008	/* RECEIVE command */</div><div class='del'>-#define OC_CLOSE		0x0010	/* CLOSE command */</div><div class='del'>-#define OC_SET_GROUP_ADDR	0x0020	/* SET_GROUP_ADDR command */</div><div class='del'>-#define OC_SET_FUNCT_ADDR	0x0040	/* SET_FUNCT_ADDR command */</div><div class='del'>-#define OC_READ_ERROR_LOG	0x0080	/* READ_ERROR_LOG command */</div><div class='del'>-#define OC_READ_ADAPTER		0x0100	/* READ_ADAPTER command */</div><div class='del'>-#define OC_MODIFY_OPEN_PARMS	0x0400	/* MODIFY_OPEN_PARMS command */</div><div class='del'>-#define OC_RESTORE_OPEN_PARMS	0x0800	/* RESTORE_OPEN_PARMS command */</div><div class='del'>-#define OC_SET_FIRST_16_GROUP	0x1000	/* SET_FIRST_16_GROUP command */</div><div class='del'>-#define OC_SET_BRIDGE_PARMS	0x2000	/* SET_BRIDGE_PARMS command */</div><div class='del'>-#define OC_CONFIG_BRIDGE_PARMS	0x4000	/* CONFIG_BRIDGE_PARMS command */</div><div class='del'>-</div><div class='del'>-#define OPEN			0x0300	/* C: open command. S: completion. */</div><div class='del'>-#define TRANSMIT		0x0400	/* C: transmit command. S: completion</div><div class='del'>-					 * status. (reject: COMMAND_REJECT if</div><div class='del'>-					 * adapter not opened, TRANSMIT already</div><div class='del'>-					 * issued or address passed in the SCB</div><div class='del'>-					 * not word aligned)</div><div class='del'>-					 */</div><div class='del'>-#define TRANSMIT_HALT		0x0500	/* C: interrupt TX TPL chain; if no</div><div class='del'>-					 * TRANSMIT command issued, the command</div><div class='del'>-					 * is ignored (completion with TRANSMIT</div><div class='del'>-					 * status (0x0400)!)</div><div class='del'>-					 */</div><div class='del'>-#define RECEIVE			0x0600	/* C: receive command. S: completion</div><div class='del'>-					 * status. (reject: COMMAND_REJECT if</div><div class='del'>-					 * adapter not opened, RECEIVE already</div><div class='del'>-					 * issued or address passed in the SCB </div><div class='del'>-					 * not word aligned)</div><div class='del'>-					 */</div><div class='del'>-#define CLOSE			0x0700	/* C: close adapter. S: completion.</div><div class='del'>-					 * (COMMAND_REJECT if adapter not open)</div><div class='del'>-					 */</div><div class='del'>-#define SET_GROUP_ADDR		0x0800	/* C: alter adapter group address after</div><div class='del'>-					 * OPEN. S: completion. (COMMAND_REJECT</div><div class='del'>-					 * if adapter not open)</div><div class='del'>-					 */</div><div class='del'>-#define SET_FUNCT_ADDR		0x0900	/* C: alter adapter functional address</div><div class='del'>-					 * after OPEN. S: completion.</div><div class='del'>-					 * (COMMAND_REJECT if adapter not open)</div><div class='del'>-					 */</div><div class='del'>-#define READ_ERROR_LOG		0x0A00	/* C: read adapter error counters.</div><div class='del'>-					 * S: completion. (command ignored</div><div class='del'>-					 * if adapter not open!)</div><div class='del'>-					 */</div><div class='del'>-#define READ_ADAPTER		0x0B00	/* C: read data from adapter memory.</div><div class='del'>-					 * (important: after init and before</div><div class='del'>-					 * open!) S: completion. (ADAPTER_CHECK</div><div class='del'>-					 * interrupt if undefined storage area</div><div class='del'>-					 * read)</div><div class='del'>-					 */</div><div class='del'>-#define MODIFY_OPEN_PARMS	0x0D00	/* C: modify some adapter operational</div><div class='del'>-					 * parameters. (bit correspondend to</div><div class='del'>-					 * WRAP_INTERFACE is ignored)</div><div class='del'>-					 * S: completion. (reject: </div><div class='del'>-					 * COMMAND_REJECT)</div><div class='del'>-					 */</div><div class='del'>-#define RESTORE_OPEN_PARMS	0x0E00	/* C: modify some adapter operational</div><div class='del'>-					 * parameters. (bit correspondend</div><div class='del'>-					 * to WRAP_INTERFACE is ignored)</div><div class='del'>-					 * S: completion. (reject:</div><div class='del'>-					 * COMMAND_REJECT)</div><div class='del'>-					 */</div><div class='del'>-#define SET_FIRST_16_GROUP	0x0F00	/* C: alter the first two bytes in</div><div class='del'>-					 * adapter group address.</div><div class='del'>-					 * S: completion. (reject:</div><div class='del'>-					 * COMMAND_REJECT)</div><div class='del'>-					 */</div><div class='del'>-#define SET_BRIDGE_PARMS	0x1000	/* C: values and conditions for the</div><div class='del'>-					 * adapter hardware to use when frames</div><div class='del'>-					 * are copied for forwarding.</div><div class='del'>-					 * S: completion. (reject:</div><div class='del'>-					 * COMMAND_REJECT)</div><div class='del'>-					 */</div><div class='del'>-#define CONFIG_BRIDGE_PARMS	0x1100	/* C: ..</div><div class='del'>-					 * S: completion. (reject:</div><div class='del'>-					 * COMMAND_REJECT)</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-#define SPEED_4			4</div><div class='del'>-#define SPEED_16		16	/* Default transmission speed  */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Initialization Parameter Block (IPB); word alignment necessary! */</div><div class='del'>-#define BURST_SIZE	0x0018	/* Default burst size */</div><div class='del'>-#define BURST_MODE	0x9F00	/* Burst mode enable */</div><div class='del'>-#define DMA_RETRIES	0x0505	/* Magic DMA retry number... */</div><div class='del'>-</div><div class='del'>-#define CYCLE_TIME	3	/* Default AT-bus cycle time: 500 ns</div><div class='del'>-				 * (later adapter version: fix  cycle time!)</div><div class='del'>-				 */</div><div class='del'>-#define LINE_SPEED_BIT	0x80</div><div class='del'>-</div><div class='del'>-/* Macro definition for the wait function. */</div><div class='del'>-#define ONE_SECOND_TICKS	1000000</div><div class='del'>-#define HALF_SECOND		(ONE_SECOND_TICKS / 2)</div><div class='del'>-#define ONE_SECOND		(ONE_SECOND_TICKS)</div><div class='del'>-#define TWO_SECONDS		(ONE_SECOND_TICKS * 2)</div><div class='del'>-#define THREE_SECONDS		(ONE_SECOND_TICKS * 3)</div><div class='del'>-#define FOUR_SECONDS		(ONE_SECOND_TICKS * 4)</div><div class='del'>-#define FIVE_SECONDS		(ONE_SECOND_TICKS * 5)</div><div class='del'>-</div><div class='del'>-#define BUFFER_SIZE 		2048	/* Buffers on Adapter */</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct {</div><div class='del'>-	unsigned short Init_Options;	/* Initialize with burst mode;</div><div class='del'>-					 * LLC disabled. (MAC only)</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-	/* Interrupt vectors the adapter places on attached system bus. */</div><div class='del'>-	u_int8_t  CMD_Status_IV;    /* Interrupt vector: command status. */</div><div class='del'>-	u_int8_t  TX_IV;	    /* Interrupt vector: transmit. */</div><div class='del'>-	u_int8_t  RX_IV;	    /* Interrupt vector: receive. */</div><div class='del'>-	u_int8_t  Ring_Status_IV;   /* Interrupt vector: ring status. */</div><div class='del'>-	u_int8_t  SCB_Clear_IV;	    /* Interrupt vector: SCB clear. */</div><div class='del'>-	u_int8_t  Adapter_CHK_IV;   /* Interrupt vector: adapter check. */</div><div class='del'>-</div><div class='del'>-	u_int16_t RX_Burst_Size;    /* Max. number of transfer cycles. */</div><div class='del'>-	u_int16_t TX_Burst_Size;    /* During DMA burst; even value! */</div><div class='del'>-	u_int16_t DMA_Abort_Thrhld; /* Number of DMA retries. */</div><div class='del'>-</div><div class='del'>-	u_int32_t SCB_Addr;   /* SCB address: even, word aligned, high-low */</div><div class='del'>-	u_int32_t SSB_Addr;   /* SSB address: even, word aligned, high-low */</div><div class='del'>-} IPB, *IPB_Ptr;</div><div class='del'>-#pragma pack()</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * OPEN Command Parameter List (OCPL) (can be reused, if the adapter has to</div><div class='del'>- * be reopened)</div><div class='del'>- */</div><div class='del'>-#define BUFFER_SIZE	2048		/* Buffers on Adapter. */</div><div class='del'>-#define TPL_SIZE	8+6*TX_FRAG_NUM /* Depending on fragments per TPL. */</div><div class='del'>-#define RPL_SIZE	14		/* (with TI firmware v2.26 handling</div><div class='del'>-					 * up to nine fragments possible)</div><div class='del'>-					 */</div><div class='del'>-#define TX_BUF_MIN	20		/* ??? (Stephan: calculation with */</div><div class='del'>-#define TX_BUF_MAX	40		/* BUFFER_SIZE and MAX_FRAME_SIZE) ??? </div><div class='del'>-					 */</div><div class='del'>-#define DISABLE_EARLY_TOKEN_RELEASE 	0x1000</div><div class='del'>-</div><div class='del'>-/* OPEN Options (high-low) */</div><div class='del'>-#define WRAP_INTERFACE		0x0080	/* Inserting omitted for test</div><div class='del'>-					 * purposes; transmit data appears</div><div class='del'>-					 * as receive data. (useful for</div><div class='del'>-					 * testing; change: CLOSE necessary)</div><div class='del'>-					 */</div><div class='del'>-#define DISABLE_HARD_ERROR	0x0040	/* On HARD_ERROR &amp; TRANSMIT_BEACON</div><div class='del'>-					 * no RING.STATUS interrupt.</div><div class='del'>-					 */</div><div class='del'>-#define DISABLE_SOFT_ERROR	0x0020	/* On SOFT_ERROR, no RING.STATUS</div><div class='del'>-					 * interrupt.</div><div class='del'>-					 */</div><div class='del'>-#define PASS_ADAPTER_MAC_FRAMES	0x0010	/* Passing unsupported MAC frames</div><div class='del'>-					 * to system.</div><div class='del'>-					 */</div><div class='del'>-#define PASS_ATTENTION_FRAMES	0x0008	/* All changed attention MAC frames are</div><div class='del'>-					 * passed to the system.</div><div class='del'>-					 */</div><div class='del'>-#define PAD_ROUTING_FIELD	0x0004	/* Routing field is padded to 18</div><div class='del'>-					 * bytes.</div><div class='del'>-					 */</div><div class='del'>-#define FRAME_HOLD		0x0002	/*Adapter waits for entire frame before</div><div class='del'>-					 * initiating DMA transfer; otherwise:</div><div class='del'>-					 * DMA transfer initiation if internal</div><div class='del'>-					 * buffer filled.</div><div class='del'>-					 */</div><div class='del'>-#define CONTENDER		0x0001	/* Adapter participates in the monitor</div><div class='del'>-					 * contention process.</div><div class='del'>-					 */</div><div class='del'>-#define PASS_BEACON_MAC_FRAMES	0x8000	/* Adapter passes beacon MAC frames</div><div class='del'>-					 * to the system.</div><div class='del'>-					 */</div><div class='del'>-#define EARLY_TOKEN_RELEASE 	0x1000	/* Only valid in 16 Mbps operation;</div><div class='del'>-					 * 0 = ETR. (no effect in 4 Mbps</div><div class='del'>-					 * operation)</div><div class='del'>-					 */</div><div class='del'>-#define COPY_ALL_MAC_FRAMES	0x0400	/* All MAC frames are copied to</div><div class='del'>-					 * the system. (after OPEN: duplicate</div><div class='del'>-					 * address test (DAT) MAC frame is </div><div class='del'>-					 * first received frame copied to the</div><div class='del'>-					 * system)</div><div class='del'>-					 */</div><div class='del'>-#define COPY_ALL_NON_MAC_FRAMES	0x0200	/* All non MAC frames are copied to</div><div class='del'>-					 * the system.</div><div class='del'>-					 */</div><div class='del'>-#define PASS_FIRST_BUF_ONLY	0x0100	/* Passes only first internal buffer</div><div class='del'>-					 * of each received frame; FrameSize</div><div class='del'>-					 * of RPLs must contain internal</div><div class='del'>-					 * BUFFER_SIZE bits for promiscuous mode.</div><div class='del'>-					 */</div><div class='del'>-#define ENABLE_FULL_DUPLEX_SELECTION	0x2000 </div><div class='del'>- 					/* Enable the use of full-duplex</div><div class='del'>-					 * settings with bits in byte 22 in</div><div class='del'>-					 * ocpl. (new feature in firmware</div><div class='del'>-					 * version 3.09)</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-/* Full-duplex settings */</div><div class='del'>-#define OPEN_FULL_DUPLEX_OFF	0x0000</div><div class='del'>-#define OPEN_FULL_DUPLEX_ON	0x00c0</div><div class='del'>-#define OPEN_FULL_DUPLEX_AUTO	0x0080</div><div class='del'>-</div><div class='del'>-#define PROD_ID_SIZE	18	/* Length of product ID. */</div><div class='del'>-</div><div class='del'>-#define TX_FRAG_NUM	3	 /* Number of fragments used in one TPL. */</div><div class='del'>-#define TX_MORE_FRAGMENTS 0x8000 /* Bit set in DataCount to indicate more</div><div class='del'>-				  * fragments following.</div><div class='del'>-				  */</div><div class='del'>-</div><div class='del'>-/* XXX is there some better way to do this? */</div><div class='del'>-#define ISA_MAX_ADDRESS 	0x00ffffff</div><div class='del'>-#define PCI_MAX_ADDRESS		0xffffffff</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct {</div><div class='del'>-	u_int16_t OPENOptions;</div><div class='del'>-	u_int8_t  NodeAddr[6];	/* Adapter node address; use ROM </div><div class='del'>-				 * address</div><div class='del'>-				 */</div><div class='del'>-	u_int32_t GroupAddr;	/* Multicast: high order</div><div class='del'>-				 * bytes = 0xC000</div><div class='del'>-				 */</div><div class='del'>-	u_int32_t FunctAddr;	/* High order bytes = 0xC000 */</div><div class='del'>-	__be16 RxListSize;	/* RPL size: 0 (=26), 14, 20 or</div><div class='del'>-				 * 26 bytes read by the adapter.</div><div class='del'>-				 * (Depending on the number of </div><div class='del'>-				 * fragments/list)</div><div class='del'>-				 */</div><div class='del'>-	__be16 TxListSize;	/* TPL size */</div><div class='del'>-	__be16 BufSize;		/* Is automatically rounded up to the</div><div class='del'>-				 * nearest nK boundary.</div><div class='del'>-				 */</div><div class='del'>-	u_int16_t FullDuplex;</div><div class='del'>-	u_int16_t Reserved;</div><div class='del'>-	u_int8_t  TXBufMin;	/* Number of adapter buffers reserved</div><div class='del'>-				 * for transmission a minimum of 2</div><div class='del'>-				 * buffers must be allocated.</div><div class='del'>-				 */</div><div class='del'>-	u_int8_t  TXBufMax;	/* Maximum number of adapter buffers</div><div class='del'>-				 * for transmit; a minimum of 2 buffers</div><div class='del'>-				 * must be available for receive.</div><div class='del'>-				 * Default: 6</div><div class='del'>-				 */</div><div class='del'>-	u_int16_t ProdIDAddr[2];/* Pointer to product ID. */</div><div class='del'>-} OPB, *OPB_Ptr;</div><div class='del'>-#pragma pack()</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SCB: adapter commands enabled by the host system started by writing</div><div class='del'>- * CMD_INTERRUPT_ADAPTER | CMD_EXECUTE (|SCB_REQUEST) to the SIFCMD IO</div><div class='del'>- * register. (special case: | CMD_SYSTEM_IRQ for initialization)</div><div class='del'>- */</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct {</div><div class='del'>-	u_int16_t CMD;		/* Command code */</div><div class='del'>-	u_int16_t Parm[2];	/* Pointer to Command Parameter Block */</div><div class='del'>-} SCB;	/* System Command Block (32 bit physical address; big endian)*/</div><div class='del'>-#pragma pack()</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SSB: adapter command return status can be evaluated after COMMAND_STATUS</div><div class='del'>- * adapter to system interrupt after reading SSB, the availability of the SSB</div><div class='del'>- * has to be told the adapter by writing CMD_INTERRUPT_ADAPTER | CMD_SSB_CLEAR</div><div class='del'>- * in the SIFCMD IO register.</div><div class='del'>- */</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct {</div><div class='del'>-	u_int16_t STS;		/* Status code */</div><div class='del'>-	u_int16_t Parm[3];	/* Parameter or pointer to Status Parameter</div><div class='del'>-				 * Block.</div><div class='del'>-				 */</div><div class='del'>-} SSB;	/* System Status Block (big endian - physical address)  */</div><div class='del'>-#pragma pack()</div><div class='del'>-</div><div class='del'>-typedef struct {</div><div class='del'>-	unsigned short BurnedInAddrPtr;	/* Pointer to adapter burned in</div><div class='del'>-					 * address. (BIA)</div><div class='del'>-					 */</div><div class='del'>-	unsigned short SoftwareLevelPtr;/* Pointer to software level data. */</div><div class='del'>-	unsigned short AdapterAddrPtr;	/* Pointer to adapter addresses. */</div><div class='del'>-	unsigned short AdapterParmsPtr;	/* Pointer to adapter parameters. */</div><div class='del'>-	unsigned short MACBufferPtr;	/* Pointer to MAC buffer. (internal) */</div><div class='del'>-	unsigned short LLCCountersPtr;	/* Pointer to LLC counters.  */</div><div class='del'>-	unsigned short SpeedFlagPtr;	/* Pointer to data rate flag.</div><div class='del'>-					 * (4/16 Mbps)</div><div class='del'>-					 */</div><div class='del'>-	unsigned short AdapterRAMPtr;	/* Pointer to adapter RAM found. (KB) */</div><div class='del'>-} INTPTRS;	/* Adapter internal pointers */</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct {</div><div class='del'>-	u_int8_t  Line_Error;		/* Line error: code violation in</div><div class='del'>-					 * frame or in a token, or FCS error.</div><div class='del'>-					 */</div><div class='del'>-	u_int8_t  Internal_Error;	/* IBM specific. (Reserved_1) */</div><div class='del'>-	u_int8_t  Burst_Error;</div><div class='del'>-	u_int8_t  ARI_FCI_Error;	/* ARI/FCI bit zero in AMP or</div><div class='del'>-					 * SMP MAC frame.</div><div class='del'>-					 */</div><div class='del'>-	u_int8_t  AbortDelimeters;	/* IBM specific. (Reserved_2) */</div><div class='del'>-	u_int8_t  Reserved_3;</div><div class='del'>-	u_int8_t  Lost_Frame_Error;	/* Receive of end of transmitted</div><div class='del'>-					 * frame failed.</div><div class='del'>-					 */</div><div class='del'>-	u_int8_t  Rx_Congest_Error;	/* Adapter in repeat mode has not</div><div class='del'>-					 * enough buffer space to copy incoming</div><div class='del'>-					 * frame.</div><div class='del'>-					 */</div><div class='del'>-	u_int8_t  Frame_Copied_Error;	/* ARI bit not zero in frame</div><div class='del'>-					 * addressed to adapter.</div><div class='del'>-					 */</div><div class='del'>-	u_int8_t  Frequency_Error;	/* IBM specific. (Reserved_4) */</div><div class='del'>-	u_int8_t  Token_Error;		/* (active only in monitor station) */</div><div class='del'>-	u_int8_t  Reserved_5;</div><div class='del'>-	u_int8_t  DMA_Bus_Error;	/* DMA bus errors not exceeding the</div><div class='del'>-					 * abort thresholds.</div><div class='del'>-					 */</div><div class='del'>-	u_int8_t  DMA_Parity_Error;	/* DMA parity errors not exceeding</div><div class='del'>-					 * the abort thresholds.</div><div class='del'>-					 */</div><div class='del'>-} ERRORTAB;	/* Adapter error counters */</div><div class='del'>-#pragma pack()</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*--------------------- Send and Receive definitions -------------------*/</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct {</div><div class='del'>-	__be16 DataCount;	/* Value 0, even and odd values are</div><div class='del'>-				 * permitted; value is unaltered most</div><div class='del'>-				 * significant bit set: following</div><div class='del'>-				 * fragments last fragment: most</div><div class='del'>-				 * significant bit is not evaluated.</div><div class='del'>-				 * (???)</div><div class='del'>-				 */</div><div class='del'>-	__be32 DataAddr;	/* Pointer to frame data fragment;</div><div class='del'>-				 * even or odd.</div><div class='del'>-				 */</div><div class='del'>-} Fragment;</div><div class='del'>-#pragma pack()</div><div class='del'>-</div><div class='del'>-#define MAX_FRAG_NUMBERS    9	/* Maximal number of fragments possible to use</div><div class='del'>-				 * in one RPL/TPL. (depending on TI firmware </div><div class='del'>-				 * version)</div><div class='del'>-				 */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * AC (1), FC (1), Dst (6), Src (6), RIF (18), Data (4472) = 4504</div><div class='del'>- * The packet size can be one of the follows: 548, 1502, 2084, 4504, 8176,</div><div class='del'>- * 11439, 17832. Refer to TMS380 Second Generation Token Ring User's Guide</div><div class='del'>- * Page 2-27.</div><div class='del'>- */</div><div class='del'>-#define HEADER_SIZE		(1 + 1 + 6 + 6)</div><div class='del'>-#define SRC_SIZE		18</div><div class='del'>-#define MIN_DATA_SIZE		516</div><div class='del'>-#define DEFAULT_DATA_SIZE	4472</div><div class='del'>-#define MAX_DATA_SIZE		17800</div><div class='del'>-</div><div class='del'>-#define DEFAULT_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + DEFAULT_DATA_SIZE)</div><div class='del'>-#define MIN_PACKET_SIZE     (HEADER_SIZE + SRC_SIZE + MIN_DATA_SIZE)</div><div class='del'>-#define MAX_PACKET_SIZE     (HEADER_SIZE + SRC_SIZE + MAX_DATA_SIZE)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Macros to deal with the frame status field.</div><div class='del'>- */</div><div class='del'>-#define AC_NOT_RECOGNIZED	0x00</div><div class='del'>-#define GROUP_BIT		0x80</div><div class='del'>-#define GET_TRANSMIT_STATUS_HIGH_BYTE(Ts) ((unsigned char)((Ts) &gt;&gt; 8))</div><div class='del'>-#define GET_FRAME_STATUS_HIGH_AC(Fs)	  ((unsigned char)(((Fs) &amp; 0xC0) &gt;&gt; 6))</div><div class='del'>-#define GET_FRAME_STATUS_LOW_AC(Fs)       ((unsigned char)(((Fs) &amp; 0x0C) &gt;&gt; 2))</div><div class='del'>-#define DIRECTED_FRAME(Context)           (!((Context)-&gt;MData[2] &amp; GROUP_BIT))</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*--------------------- Send Functions ---------------------------------*/</div><div class='del'>-/* define TX_CSTAT _REQUEST (R) and _COMPLETE (C) values (high-low) */</div><div class='del'>-</div><div class='del'>-#define TX_VALID		0x0080	/* R: set via TRANSMIT.VALID interrupt.</div><div class='del'>-					 * C: always reset to zero!</div><div class='del'>-					 */</div><div class='del'>-#define TX_FRAME_COMPLETE	0x0040	/* R: must be reset to zero.</div><div class='del'>-					 * C: set to one.</div><div class='del'>-					 */</div><div class='del'>-#define TX_START_FRAME		0x0020  /* R: start of a frame: 1 </div><div class='del'>-					 * C: unchanged.</div><div class='del'>-					 */</div><div class='del'>-#define TX_END_FRAME		0x0010  /* R: end of a frame: 1</div><div class='del'>-					 * C: unchanged.</div><div class='del'>-					 */</div><div class='del'>-#define TX_FRAME_IRQ		0x0008  /* R: request interrupt generation</div><div class='del'>-					 * after transmission.</div><div class='del'>-					 * C: unchanged.</div><div class='del'>-					 */</div><div class='del'>-#define TX_ERROR		0x0004  /* R: reserved.</div><div class='del'>-					 * C: set to one if Error occurred.</div><div class='del'>-					 */</div><div class='del'>-#define TX_INTERFRAME_WAIT	0x0004</div><div class='del'>-#define TX_PASS_CRC		0x0002  /* R: set if CRC value is already</div><div class='del'>-					 * calculated. (valid only in</div><div class='del'>-					 * FRAME_START TPL)</div><div class='del'>-					 * C: unchanged.</div><div class='del'>-					 */</div><div class='del'>-#define TX_PASS_SRC_ADDR	0x0001  /* R: adapter uses explicit frame</div><div class='del'>-					 * source address and does not overwrite</div><div class='del'>-					 * with the adapter node address.</div><div class='del'>-					 * (valid only in FRAME_START TPL)</div><div class='del'>-					 *</div><div class='del'>-					 * C: unchanged.</div><div class='del'>-					 */</div><div class='del'>-#define TX_STRIP_FS		0xFF00  /* R: reserved.</div><div class='del'>-					 * C: if no Transmission Error,</div><div class='del'>-					 * field contains copy of FS byte after</div><div class='del'>-					 * stripping of frame.</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Structure of Transmit Parameter Lists (TPLs) (only one frame every TPL,</div><div class='del'>- * but possibly multiple TPLs for one frame) the length of the TPLs has to be</div><div class='del'>- * initialized in the OPL. (OPEN parameter list)</div><div class='del'>- */</div><div class='del'>-#define TPL_NUM		3	/* Number of Transmit Parameter Lists.</div><div class='del'>-				 * !! MUST BE &gt;= 3 !!</div><div class='del'>-				 */</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct s_TPL TPL;</div><div class='del'>-</div><div class='del'>-struct s_TPL {	/* Transmit Parameter List (align on even word boundaries) */</div><div class='del'>-	__be32 NextTPLAddr;		/* Pointer to next TPL in chain; if</div><div class='del'>-					 * pointer is odd: this is the last</div><div class='del'>-					 * TPL. Pointing to itself can cause</div><div class='del'>-					 * problems!</div><div class='del'>-					 */</div><div class='del'>-	volatile u_int16_t Status;	/* Initialized by the adapter:</div><div class='del'>-					 * CSTAT_REQUEST important: update least</div><div class='del'>-					 * significant bit first! Set by the</div><div class='del'>-					 * adapter: CSTAT_COMPLETE status.</div><div class='del'>-					 */</div><div class='del'>-	__be16 FrameSize;		/* Number of bytes to be transmitted</div><div class='del'>-					 * as a frame including AC/FC,</div><div class='del'>-					 * Destination, Source, Routing field</div><div class='del'>-					 * not including CRC, FS, End Delimiter</div><div class='del'>-					 * (valid only if START_FRAME bit in </div><div class='del'>-					 * CSTAT nonzero) must not be zero in</div><div class='del'>-					 * any list; maximum value: (BUFFER_SIZE</div><div class='del'>-					 * - 8) * TX_BUF_MAX sum of DataCount</div><div class='del'>-					 * values in FragmentList must equal</div><div class='del'>-					 * Frame_Size value in START_FRAME TPL!</div><div class='del'>-					 * frame data fragment list.</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-	/* TPL/RPL size in OPEN parameter list depending on maximal</div><div class='del'>-	 * numbers of fragments used in one parameter list.</div><div class='del'>-	 */</div><div class='del'>-	Fragment FragList[TX_FRAG_NUM];	/* Maximum: nine frame fragments in one</div><div class='del'>-					 * TPL actual version of firmware: 9</div><div class='del'>-					 * fragments possible.</div><div class='del'>-					 */</div><div class='del'>-#pragma pack()</div><div class='del'>-</div><div class='del'>-	/* Special proprietary data and precalculations */</div><div class='del'>-</div><div class='del'>-	TPL *NextTPLPtr;		/* Pointer to next TPL in chain. */</div><div class='del'>-	unsigned char *MData;</div><div class='del'>-	struct sk_buff *Skb;</div><div class='del'>-	unsigned char TPLIndex;</div><div class='del'>-	volatile unsigned char BusyFlag;/* Flag: TPL busy? */</div><div class='del'>-	dma_addr_t DMABuff;		/* DMA IO bus address from dma_map */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ---------------------Receive Functions-------------------------------*</div><div class='del'>- * define RECEIVE_CSTAT_REQUEST (R) and RECEIVE_CSTAT_COMPLETE (C) values.</div><div class='del'>- * (high-low)</div><div class='del'>- */</div><div class='del'>-#define RX_VALID		0x0080	/* R: set; tell adapter with</div><div class='del'>-					 * RECEIVE.VALID interrupt.</div><div class='del'>-					 * C: reset to zero.</div><div class='del'>-					 */</div><div class='del'>-#define RX_FRAME_COMPLETE	0x0040  /* R: must be reset to zero,</div><div class='del'>-					 * C: set to one.</div><div class='del'>-					 */</div><div class='del'>-#define RX_START_FRAME		0x0020  /* R: must be reset to zero.</div><div class='del'>-					 * C: set to one on the list.</div><div class='del'>-					 */</div><div class='del'>-#define RX_END_FRAME		0x0010  /* R: must be reset to zero.</div><div class='del'>-					 * C: set to one on the list</div><div class='del'>-					 * that ends the frame.</div><div class='del'>-					 */</div><div class='del'>-#define RX_FRAME_IRQ		0x0008  /* R: request interrupt generation</div><div class='del'>-					 * after receive.</div><div class='del'>-					 * C: unchanged.</div><div class='del'>-					 */</div><div class='del'>-#define RX_INTERFRAME_WAIT	0x0004  /* R: after receiving a frame:</div><div class='del'>-					 * interrupt and wait for a</div><div class='del'>-					 * RECEIVE.CONTINUE.</div><div class='del'>-					 * C: unchanged.</div><div class='del'>-					 */</div><div class='del'>-#define RX_PASS_CRC		0x0002  /* R: if set, the adapter includes</div><div class='del'>-					 * the CRC in data passed. (last four </div><div class='del'>-					 * bytes; valid only if FRAME_START is</div><div class='del'>-					 * set)</div><div class='del'>-					 * C: set, if CRC is included in</div><div class='del'>-					 * received data.</div><div class='del'>-					 */</div><div class='del'>-#define RX_PASS_SRC_ADDR	0x0001  /* R: adapter uses explicit frame</div><div class='del'>-					 * source address and does not</div><div class='del'>-					 * overwrite with the adapter node</div><div class='del'>-					 * address. (valid only if FRAME_START</div><div class='del'>-					 * is set)</div><div class='del'>-					 * C: unchanged.</div><div class='del'>-					 */</div><div class='del'>-#define RX_RECEIVE_FS		0xFC00  /* R: reserved; must be reset to zero.</div><div class='del'>-					 * C: on lists with START_FRAME, field</div><div class='del'>-					 * contains frame status field from</div><div class='del'>-					 * received frame; otherwise cleared.</div><div class='del'>-					 */</div><div class='del'>-#define RX_ADDR_MATCH		0x0300  /* R: reserved; must be reset to zero.</div><div class='del'>-					 * C: address match code mask.</div><div class='del'>-					 */ </div><div class='del'>-#define RX_STATUS_MASK		0x00FF  /* Mask for receive status bits. */</div><div class='del'>-</div><div class='del'>-#define RX_INTERN_ADDR_MATCH    0x0100  /* C: internally address match. */</div><div class='del'>-#define RX_EXTERN_ADDR_MATCH    0x0200  /* C: externally matched via</div><div class='del'>-					 * XMATCH/XFAIL interface.</div><div class='del'>-					 */</div><div class='del'>-#define RX_INTEXT_ADDR_MATCH    0x0300  /* C: internally and externally</div><div class='del'>-					 * matched.</div><div class='del'>-					 */</div><div class='del'>-#define RX_READY (RX_VALID | RX_FRAME_IRQ) /* Ready for receive. */</div><div class='del'>-</div><div class='del'>-/* Constants for Command Status Interrupt.</div><div class='del'>- * COMMAND_REJECT status field bit functions (SSB.Parm[0])</div><div class='del'>- */</div><div class='del'>-#define ILLEGAL_COMMAND		0x0080	/* Set if an unknown command</div><div class='del'>-					 * is issued to the adapter</div><div class='del'>-					 */</div><div class='del'>-#define ADDRESS_ERROR		0x0040  /* Set if any address field in</div><div class='del'>-					 * the SCB is odd. (not word aligned)</div><div class='del'>-					 */</div><div class='del'>-#define ADAPTER_OPEN		0x0020  /* Command issued illegal with</div><div class='del'>-					 * open adapter.</div><div class='del'>-					 */</div><div class='del'>-#define ADAPTER_CLOSE		0x0010  /* Command issued illegal with</div><div class='del'>-					 * closed adapter.</div><div class='del'>-					 */</div><div class='del'>-#define SAME_COMMAND		0x0008  /* Command issued with same command</div><div class='del'>-					 * already executing.</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-/* OPEN_COMPLETION values (SSB.Parm[0], MSB) */</div><div class='del'>-#define NODE_ADDR_ERROR		0x0040  /* Wrong address or BIA read</div><div class='del'>-					 * zero address.</div><div class='del'>-					 */</div><div class='del'>-#define LIST_SIZE_ERROR		0x0020  /* If List_Size value not in 0,</div><div class='del'>-					 * 14, 20, 26.</div><div class='del'>-					 */</div><div class='del'>-#define BUF_SIZE_ERROR		0x0010  /* Not enough available memory for</div><div class='del'>-					 * two buffers.</div><div class='del'>-					 */</div><div class='del'>-#define TX_BUF_COUNT_ERROR	0x0004  /* Remaining receive buffers less than</div><div class='del'>-					 * two.</div><div class='del'>-					 */</div><div class='del'>-#define OPEN_ERROR		0x0002	/* Error during ring insertion; more</div><div class='del'>-					 * information in bits 8-15.</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-/* Standard return codes */</div><div class='del'>-#define GOOD_COMPLETION		0x0080  /* =OPEN_SUCCESSFULL */</div><div class='del'>-#define INVALID_OPEN_OPTION	0x0001  /* OPEN options are not supported by</div><div class='del'>-					 * the adapter.</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-/* OPEN phases; details of OPEN_ERROR (SSB.Parm[0], LSB)            */</div><div class='del'>-#define OPEN_PHASES_MASK            0xF000  /* Check only the bits 8-11. */</div><div class='del'>-#define LOBE_MEDIA_TEST             0x1000</div><div class='del'>-#define PHYSICAL_INSERTION          0x2000</div><div class='del'>-#define ADDRESS_VERIFICATION        0x3000</div><div class='del'>-#define PARTICIPATION_IN_RING_POLL  0x4000</div><div class='del'>-#define REQUEST_INITIALISATION      0x5000</div><div class='del'>-#define FULLDUPLEX_CHECK            0x6000</div><div class='del'>-</div><div class='del'>-/* OPEN error codes; details of OPEN_ERROR (SSB.Parm[0], LSB) */</div><div class='del'>-#define OPEN_ERROR_CODES_MASK	0x0F00  /* Check only the bits 12-15. */</div><div class='del'>-#define OPEN_FUNCTION_FAILURE   0x0100  /* Unable to transmit to itself or</div><div class='del'>-					 * frames received before insertion.</div><div class='del'>-					 */</div><div class='del'>-#define OPEN_SIGNAL_LOSS	0x0200	/* Signal loss condition detected at</div><div class='del'>-					 * receiver.</div><div class='del'>-					 */</div><div class='del'>-#define OPEN_TIMEOUT		0x0500	/* Insertion timer expired before</div><div class='del'>-					 * logical insertion.</div><div class='del'>-					 */</div><div class='del'>-#define OPEN_RING_FAILURE	0x0600	/* Unable to receive own ring purge</div><div class='del'>-					 * MAC frames.</div><div class='del'>-					 */</div><div class='del'>-#define OPEN_RING_BEACONING	0x0700	/* Beacon MAC frame received after</div><div class='del'>-					 * ring insertion.</div><div class='del'>-					 */</div><div class='del'>-#define OPEN_DUPLICATE_NODEADDR	0x0800  /* Other station in ring found</div><div class='del'>-					 * with the same address.</div><div class='del'>-					 */</div><div class='del'>-#define OPEN_REQUEST_INIT	0x0900	/* RPS present but does not respond. */</div><div class='del'>-#define OPEN_REMOVE_RECEIVED    0x0A00  /* Adapter received a remove adapter</div><div class='del'>-					 * MAC frame.</div><div class='del'>-					 */</div><div class='del'>-#define OPEN_FULLDUPLEX_SET	0x0D00	/* Got this with full duplex on when</div><div class='del'>-					 * trying to connect to a normal ring.</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-/* SET_BRIDGE_PARMS return codes: */</div><div class='del'>-#define BRIDGE_INVALID_MAX_LEN  0x4000  /* MAX_ROUTING_FIELD_LENGTH odd,</div><div class='del'>-					 * less than 6 or &gt; 30.</div><div class='del'>-					 */</div><div class='del'>-#define BRIDGE_INVALID_SRC_RING 0x2000  /* SOURCE_RING number zero, too large</div><div class='del'>-					 * or = TARGET_RING.</div><div class='del'>-					 */</div><div class='del'>-#define BRIDGE_INVALID_TRG_RING 0x1000  /* TARGET_RING number zero, too large</div><div class='del'>-					 * or = SOURCE_RING.</div><div class='del'>-					 */</div><div class='del'>-#define BRIDGE_INVALID_BRDGE_NO 0x0800  /* BRIDGE_NUMBER too large. */</div><div class='del'>-#define BRIDGE_INVALID_OPTIONS  0x0400  /* Invalid bridge options. */</div><div class='del'>-#define BRIDGE_DIAGS_FAILED     0x0200  /* Diagnostics of TMS380SRA failed. */</div><div class='del'>-#define BRIDGE_NO_SRA           0x0100  /* The TMS380SRA does not exist in HW</div><div class='del'>-					 * configuration.</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Bring Up Diagnostics error codes.</div><div class='del'>- */</div><div class='del'>-#define BUD_INITIAL_ERROR       0x0</div><div class='del'>-#define BUD_CHECKSUM_ERROR      0x1</div><div class='del'>-#define BUD_ADAPTER_RAM_ERROR   0x2</div><div class='del'>-#define BUD_INSTRUCTION_ERROR   0x3</div><div class='del'>-#define BUD_CONTEXT_ERROR       0x4</div><div class='del'>-#define BUD_PROTOCOL_ERROR      0x5</div><div class='del'>-#define BUD_INTERFACE_ERROR	0x6</div><div class='del'>-</div><div class='del'>-/* BUD constants */</div><div class='del'>-#define BUD_MAX_RETRIES         3</div><div class='del'>-#define BUD_MAX_LOOPCNT         6</div><div class='del'>-#define BUD_TIMEOUT             3000</div><div class='del'>-</div><div class='del'>-/* Initialization constants */</div><div class='del'>-#define INIT_MAX_RETRIES        3	/* Maximum three retries. */</div><div class='del'>-#define INIT_MAX_LOOPCNT        22      /* Maximum loop counts. */</div><div class='del'>-</div><div class='del'>-/* RING STATUS field values (high/low) */</div><div class='del'>-#define SIGNAL_LOSS             0x0080  /* Loss of signal on the ring</div><div class='del'>-					 * detected.</div><div class='del'>-					 */</div><div class='del'>-#define HARD_ERROR              0x0040  /* Transmitting or receiving beacon</div><div class='del'>-					 * frames.</div><div class='del'>-					 */</div><div class='del'>-#define SOFT_ERROR              0x0020  /* Report error MAC frame</div><div class='del'>-					 * transmitted.</div><div class='del'>-					 */</div><div class='del'>-#define TRANSMIT_BEACON         0x0010  /* Transmitting beacon frames on the</div><div class='del'>-					 * ring.</div><div class='del'>-					 */</div><div class='del'>-#define LOBE_WIRE_FAULT         0x0008  /* Open or short circuit in the</div><div class='del'>-					 * cable to concentrator; adapter</div><div class='del'>-					 * closed.</div><div class='del'>-					 */</div><div class='del'>-#define AUTO_REMOVAL_ERROR      0x0004  /* Lobe wrap test failed, deinserted;</div><div class='del'>-					 * adapter closed.</div><div class='del'>-					 */</div><div class='del'>-#define REMOVE_RECEIVED         0x0001  /* Received a remove ring station MAC</div><div class='del'>-					 * MAC frame request; adapter closed.</div><div class='del'>-					 */</div><div class='del'>-#define COUNTER_OVERFLOW        0x8000  /* Overflow of one of the adapters</div><div class='del'>-					 * error counters; READ.ERROR.LOG.</div><div class='del'>-					 */</div><div class='del'>-#define SINGLE_STATION          0x4000  /* Adapter is the only station on the</div><div class='del'>-					 * ring.</div><div class='del'>-					 */</div><div class='del'>-#define RING_RECOVERY           0x2000  /* Claim token MAC frames on the ring;</div><div class='del'>-					 * reset after ring purge frame.</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-#define ADAPTER_CLOSED (LOBE_WIRE_FAULT | AUTO_REMOVAL_ERROR |\</div><div class='del'>-                        REMOVE_RECEIVED)</div><div class='del'>-</div><div class='del'>-/* Adapter_check_block.Status field bit assignments: */</div><div class='del'>-#define DIO_PARITY              0x8000  /* Adapter detects bad parity</div><div class='del'>-					 * through direct I/O access.</div><div class='del'>-					 */</div><div class='del'>-#define DMA_READ_ABORT          0x4000  /* Aborting DMA read operation</div><div class='del'>-					 * from system Parm[0]: 0=timeout,</div><div class='del'>-					 * 1=parity error, 2=bus error;</div><div class='del'>-					 * Parm[1]: 32 bit pointer to host</div><div class='del'>-					 * system address at failure.</div><div class='del'>-					 */</div><div class='del'>-#define DMA_WRITE_ABORT         0x2000  /* Aborting DMA write operation</div><div class='del'>-					 * to system. (parameters analogous to</div><div class='del'>-					 * DMA_READ_ABORT)</div><div class='del'>-					 */</div><div class='del'>-#define ILLEGAL_OP_CODE         0x1000  /* Illegal operation code in the</div><div class='del'>-					 * the adapters firmware Parm[0]-2:</div><div class='del'>-					 * communications processor registers</div><div class='del'>-					 * R13-R15.</div><div class='del'>-					 */</div><div class='del'>-#define PARITY_ERRORS           0x0800  /* Adapter detects internal bus</div><div class='del'>-					 * parity error.</div><div class='del'>-					 */</div><div class='del'>-#define RAM_DATA_ERROR          0x0080  /* Valid only during RAM testing;</div><div class='del'>-					 * RAM data error Parm[0-1]: 32 bit</div><div class='del'>-					 * pointer to RAM location.</div><div class='del'>-					 */</div><div class='del'>-#define RAM_PARITY_ERROR        0x0040  /* Valid only during RAM testing;</div><div class='del'>-					 * RAM parity error Parm[0-1]: 32 bit</div><div class='del'>-					 * pointer to RAM location.</div><div class='del'>-					 */</div><div class='del'>-#define RING_UNDERRUN           0x0020  /* Internal DMA underrun when</div><div class='del'>-					 * transmitting onto ring.</div><div class='del'>-					 */</div><div class='del'>-#define INVALID_IRQ             0x0008  /* Unrecognized interrupt generated</div><div class='del'>-					 * internal to adapter Parm[0-2]:</div><div class='del'>-					 * adapter register R13-R15.</div><div class='del'>-					 */</div><div class='del'>-#define INVALID_ERROR_IRQ       0x0004  /* Unrecognized error interrupt</div><div class='del'>-					 * generated Parm[0-2]: adapter register</div><div class='del'>-					 * R13-R15.</div><div class='del'>-					 */</div><div class='del'>-#define INVALID_XOP             0x0002  /* Unrecognized XOP request in</div><div class='del'>-					 * communication processor Parm[0-2]:</div><div class='del'>-					 * adapter register R13-R15.</div><div class='del'>-					 */</div><div class='del'>-#define CHECKADDR               0x05E0  /* Adapter check status information</div><div class='del'>-					 * address offset.</div><div class='del'>-					 */</div><div class='del'>-#define ROM_PAGE_0              0x0000  /* Adapter ROM page 0. */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * RECEIVE.STATUS interrupt result SSB values: (high-low)</div><div class='del'>- * (RECEIVE_COMPLETE field bit definitions in SSB.Parm[0])</div><div class='del'>- */</div><div class='del'>-#define RX_COMPLETE             0x0080  /* SSB.Parm[0]; SSB.Parm[1]: 32</div><div class='del'>-					 * bit pointer to last RPL.</div><div class='del'>-					 */</div><div class='del'>-#define RX_SUSPENDED            0x0040  /* SSB.Parm[0]; SSB.Parm[1]: 32</div><div class='del'>-					 * bit pointer to RPL with odd</div><div class='del'>-					 * forward pointer.</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-/* Valid receive CSTAT: */</div><div class='del'>-#define RX_FRAME_CONTROL_BITS (RX_VALID | RX_START_FRAME | RX_END_FRAME | \</div><div class='del'>-			       RX_FRAME_COMPLETE)</div><div class='del'>-#define VALID_SINGLE_BUFFER_FRAME (RX_START_FRAME | RX_END_FRAME | \</div><div class='del'>-				   RX_FRAME_COMPLETE)</div><div class='del'>-</div><div class='del'>-typedef enum SKB_STAT SKB_STAT;</div><div class='del'>-enum SKB_STAT {</div><div class='del'>-	SKB_UNAVAILABLE,</div><div class='del'>-	SKB_DMA_DIRECT,</div><div class='del'>-	SKB_DATA_COPY</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Receive Parameter List (RPL) The length of the RPLs has to be initialized </div><div class='del'>- * in the OPL. (OPEN parameter list)</div><div class='del'>- */</div><div class='del'>-#define RPL_NUM		3</div><div class='del'>-</div><div class='del'>-#define RX_FRAG_NUM     1	/* Maximal number of used fragments in one RPL.</div><div class='del'>-				 * (up to firmware v2.24: 3, now: up to 9)</div><div class='del'>-				 */</div><div class='del'>-</div><div class='del'>-#pragma pack(1)</div><div class='del'>-typedef struct s_RPL RPL;</div><div class='del'>-struct s_RPL {	/* Receive Parameter List */</div><div class='del'>-	__be32 NextRPLAddr;		/* Pointer to next RPL in chain</div><div class='del'>-					 * (normalized = physical 32 bit</div><div class='del'>-					 * address) if pointer is odd: this</div><div class='del'>-					 * is last RPL. Pointing to itself can</div><div class='del'>-					 * cause problems!</div><div class='del'>-					 */</div><div class='del'>-	volatile u_int16_t Status;	/* Set by creation of Receive Parameter</div><div class='del'>-					 * List RECEIVE_CSTAT_COMPLETE set by</div><div class='del'>-					 * adapter in lists that start or end</div><div class='del'>-					 * a frame.</div><div class='del'>-					 */</div><div class='del'>-	volatile __be16 FrameSize;	 /* Number of bytes received as a</div><div class='del'>-					 * frame including AC/FC, Destination,</div><div class='del'>-					 * Source, Routing field not including </div><div class='del'>-					 * CRC, FS (Frame Status), End Delimiter</div><div class='del'>-					 * (valid only if START_FRAME bit in </div><div class='del'>-					 * CSTAT nonzero) must not be zero in</div><div class='del'>-					 * any list; maximum value: (BUFFER_SIZE</div><div class='del'>-					 * - 8) * TX_BUF_MAX sum of DataCount</div><div class='del'>-					 * values in FragmentList must equal</div><div class='del'>-					 * Frame_Size value in START_FRAME TPL!</div><div class='del'>-					 * frame data fragment list</div><div class='del'>-					 */</div><div class='del'>-</div><div class='del'>-	/* TPL/RPL size in OPEN parameter list depending on maximal numbers</div><div class='del'>-	 * of fragments used in one parameter list.</div><div class='del'>-	 */</div><div class='del'>-	Fragment FragList[RX_FRAG_NUM];	/* Maximum: nine frame fragments in</div><div class='del'>-					 * one TPL. Actual version of firmware:</div><div class='del'>-					 * 9 fragments possible.</div><div class='del'>-					 */</div><div class='del'>-#pragma pack()</div><div class='del'>-</div><div class='del'>-	/* Special proprietary data and precalculations. */</div><div class='del'>-	RPL *NextRPLPtr;	/* Logical pointer to next RPL in chain. */</div><div class='del'>-	unsigned char *MData;</div><div class='del'>-	struct sk_buff *Skb;</div><div class='del'>-	SKB_STAT SkbStat;</div><div class='del'>-	int RPLIndex;</div><div class='del'>-	dma_addr_t DMABuff;		/* DMA IO bus address from dma_map */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Information that need to be kept for each board. */</div><div class='del'>-typedef struct net_local {</div><div class='del'>-#pragma pack(1)</div><div class='del'>-	IPB ipb;	/* Initialization Parameter Block. */</div><div class='del'>-	SCB scb;	/* System Command Block: system to adapter </div><div class='del'>-			 * communication.</div><div class='del'>-			 */</div><div class='del'>-	SSB ssb;	/* System Status Block: adapter to system </div><div class='del'>-			 * communication.</div><div class='del'>-			 */</div><div class='del'>-	OPB ocpl;	/* Open Options Parameter Block. */</div><div class='del'>-</div><div class='del'>-	ERRORTAB errorlogtable;	/* Adapter statistic error counters.</div><div class='del'>-				 * (read from adapter memory)</div><div class='del'>-				 */</div><div class='del'>-	unsigned char ProductID[PROD_ID_SIZE + 1]; /* Product ID */</div><div class='del'>-#pragma pack()</div><div class='del'>-</div><div class='del'>-	TPL Tpl[TPL_NUM];</div><div class='del'>-	TPL *TplFree;</div><div class='del'>-	TPL *TplBusy;</div><div class='del'>-	unsigned char LocalTxBuffers[TPL_NUM][DEFAULT_PACKET_SIZE];</div><div class='del'>-</div><div class='del'>-	RPL Rpl[RPL_NUM];</div><div class='del'>-	RPL *RplHead;</div><div class='del'>-	RPL *RplTail;</div><div class='del'>-	unsigned char LocalRxBuffers[RPL_NUM][DEFAULT_PACKET_SIZE];</div><div class='del'>-</div><div class='del'>-	struct device *pdev;</div><div class='del'>-	int DataRate;</div><div class='del'>-	unsigned char ScbInUse;</div><div class='del'>-	unsigned short CMDqueue;</div><div class='del'>-</div><div class='del'>-	unsigned long AdapterOpenFlag:1;</div><div class='del'>-	unsigned long AdapterVirtOpenFlag:1;</div><div class='del'>-	unsigned long OpenCommandIssued:1;</div><div class='del'>-	unsigned long TransmitCommandActive:1;</div><div class='del'>-	unsigned long TransmitHaltScheduled:1;</div><div class='del'>-	unsigned long HaltInProgress:1;</div><div class='del'>-	unsigned long LobeWireFaultLogged:1;</div><div class='del'>-	unsigned long ReOpenInProgress:1;</div><div class='del'>-	unsigned long Sleeping:1;</div><div class='del'>-</div><div class='del'>-	unsigned long LastOpenStatus;</div><div class='del'>-	unsigned short CurrentRingStatus;</div><div class='del'>-	unsigned long MaxPacketSize;</div><div class='del'>-	</div><div class='del'>-	unsigned long StartTime;</div><div class='del'>-	unsigned long LastSendTime;</div><div class='del'>-</div><div class='del'>-	struct tr_statistics MacStat;	/* MAC statistics structure */</div><div class='del'>-</div><div class='del'>-	unsigned long dmalimit; /* the max DMA address (ie, ISA) */</div><div class='del'>-	dma_addr_t    dmabuffer; /* the DMA bus address corresponding to</div><div class='del'>-				    priv. Might be different from virt_to_bus()</div><div class='del'>-				    for architectures with IO MMU (Alpha) */</div><div class='del'>-</div><div class='del'>-	struct timer_list timer;</div><div class='del'>-</div><div class='del'>-	wait_queue_head_t  wait_for_tok_int;</div><div class='del'>-</div><div class='del'>-	INTPTRS intptrs;	/* Internal adapter pointer. Must be read</div><div class='del'>-				 * before OPEN command.</div><div class='del'>-				 */</div><div class='del'>-	unsigned short (*setnselout)(struct net_device *);</div><div class='del'>-	unsigned short (*sifreadb)(struct net_device *, unsigned short);</div><div class='del'>-	void (*sifwriteb)(struct net_device *, unsigned short, unsigned short);</div><div class='del'>-	unsigned short (*sifreadw)(struct net_device *, unsigned short);</div><div class='del'>-	void (*sifwritew)(struct net_device *, unsigned short, unsigned short);</div><div class='del'>-</div><div class='del'>-	spinlock_t lock;                /* SMP protection */</div><div class='del'>-	void *tmspriv;</div><div class='del'>-} NET_LOCAL;</div><div class='del'>-</div><div class='del'>-#endif	/* __KERNEL__ */</div><div class='del'>-#endif	/* __LINUX_TMS380TR_H */</div><div class='head'>diff --git a/drivers/net/tokenring/tmspci.c b/drivers/net/tokenring/tmspci.c<br/>deleted file mode 100644<br/>index fb9918da5792..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/tokenring/tmspci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tokenring/tmspci.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,248 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  tmspci.c: A generic network driver for TMS380-based PCI token ring cards.</div><div class='del'>- *</div><div class='del'>- *  Written 1999 by Adam Fritzler</div><div class='del'>- *</div><div class='del'>- *  This software may be used and distributed according to the terms</div><div class='del'>- *  of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- *</div><div class='del'>- *  This driver module supports the following cards:</div><div class='del'>- *	- SysKonnect TR4/16(+) PCI	(SK-4590)</div><div class='del'>- *	- SysKonnect TR4/16 PCI		(SK-4591)</div><div class='del'>- *      - Compaq TR 4/16 PCI</div><div class='del'>- *      - Thomas-Conrad TC4048 4/16 PCI </div><div class='del'>- *      - 3Com 3C339 Token Link Velocity</div><div class='del'>- *</div><div class='del'>- *  Maintainer(s):</div><div class='del'>- *    AF	Adam Fritzler</div><div class='del'>- *</div><div class='del'>- *  Modification History:</div><div class='del'>- *	30-Dec-99	AF	Split off from the tms380tr driver.</div><div class='del'>- *	22-Jan-00	AF	Updated to use indirect read/writes</div><div class='del'>- *	23-Nov-00	JG	New PCI API, cleanups</div><div class='del'>- *</div><div class='del'>- *  TODO:</div><div class='del'>- *	1. See if we can use MMIO instead of port accesses</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-</div><div class='del'>-#include "tms380tr.h"</div><div class='del'>-</div><div class='del'>-static char version[] __devinitdata =</div><div class='del'>-"tmspci.c: v1.02 23/11/2000 by Adam Fritzler\n";</div><div class='del'>-</div><div class='del'>-#define TMS_PCI_IO_EXTENT 32</div><div class='del'>-</div><div class='del'>-struct card_info {</div><div class='del'>-	unsigned char nselout[2]; /* NSELOUT vals for 4mb([0]) and 16mb([1]) */</div><div class='del'>-	char *name;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct card_info card_info_table[] = {</div><div class='del'>-	{ {0x03, 0x01}, "Compaq 4/16 TR PCI"},</div><div class='del'>-	{ {0x03, 0x01}, "SK NET TR 4/16 PCI"},</div><div class='del'>-	{ {0x03, 0x01}, "Thomas-Conrad TC4048 PCI 4/16"},</div><div class='del'>-	{ {0x03, 0x01}, "3Com Token Link Velocity"},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static DEFINE_PCI_DEVICE_TABLE(tmspci_pci_tbl) = {</div><div class='del'>-	{ PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_TOKENRING, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },</div><div class='del'>-	{ PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_TR, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },</div><div class='del'>-	{ PCI_VENDOR_ID_TCONRAD, PCI_DEVICE_ID_TCONRAD_TOKENRING, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },</div><div class='del'>-	{ PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C339, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },</div><div class='del'>-	{ }			/* Terminating entry */</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(pci, tmspci_pci_tbl);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-static void tms_pci_read_eeprom(struct net_device *dev);</div><div class='del'>-static unsigned short tms_pci_setnselout_pins(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-static unsigned short tms_pci_sifreadb(struct net_device *dev, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	return inb(dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned short tms_pci_sifreadw(struct net_device *dev, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	return inw(dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tms_pci_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	outb(val, dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tms_pci_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)</div><div class='del'>-{</div><div class='del'>-	outw(val, dev-&gt;base_addr + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __devinit tms_pci_attach(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='del'>-{	</div><div class='del'>-	static int versionprinted;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct net_local *tp;</div><div class='del'>-	int ret;</div><div class='del'>-	unsigned int pci_irq_line;</div><div class='del'>-	unsigned long pci_ioaddr;</div><div class='del'>-	struct card_info *cardinfo = &amp;card_info_table[ent-&gt;driver_data];</div><div class='del'>-</div><div class='del'>-	if (versionprinted++ == 0)</div><div class='del'>-		printk("%s", version);</div><div class='del'>-</div><div class='del'>-	if (pci_enable_device(pdev))</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	/* Remove I/O space marker in bit 0. */</div><div class='del'>-	pci_irq_line = pdev-&gt;irq;</div><div class='del'>-	pci_ioaddr = pci_resource_start (pdev, 0);</div><div class='del'>-</div><div class='del'>-	/* At this point we have found a valid card. */</div><div class='del'>-	dev = alloc_trdev(sizeof(struct net_local));</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	if (!request_region(pci_ioaddr, TMS_PCI_IO_EXTENT, dev-&gt;name)) {</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto err_out_trdev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr	= pci_ioaddr;</div><div class='del'>-	dev-&gt;irq 	= pci_irq_line;</div><div class='del'>-	dev-&gt;dma	= 0;</div><div class='del'>-</div><div class='del'>-	dev_info(&amp;pdev-&gt;dev, "%s\n", cardinfo-&gt;name);</div><div class='del'>-	dev_info(&amp;pdev-&gt;dev, "    IO: %#4lx  IRQ: %d\n", dev-&gt;base_addr, dev-&gt;irq);</div><div class='del'>-		</div><div class='del'>-	tms_pci_read_eeprom(dev);</div><div class='del'>-</div><div class='del'>-	dev_info(&amp;pdev-&gt;dev, "    Ring Station Address: %pM\n", dev-&gt;dev_addr);</div><div class='del'>-		</div><div class='del'>-	ret = tmsdev_init(dev, &amp;pdev-&gt;dev);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_info(&amp;pdev-&gt;dev, "unable to get memory for dev-&gt;priv.\n");</div><div class='del'>-		goto err_out_region;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tp = netdev_priv(dev);</div><div class='del'>-	tp-&gt;setnselout = tms_pci_setnselout_pins;</div><div class='del'>-		</div><div class='del'>-	tp-&gt;sifreadb = tms_pci_sifreadb;</div><div class='del'>-	tp-&gt;sifreadw = tms_pci_sifreadw;</div><div class='del'>-	tp-&gt;sifwriteb = tms_pci_sifwriteb;</div><div class='del'>-	tp-&gt;sifwritew = tms_pci_sifwritew;</div><div class='del'>-		</div><div class='del'>-	memcpy(tp-&gt;ProductID, cardinfo-&gt;name, PROD_ID_SIZE + 1);</div><div class='del'>-</div><div class='del'>-	tp-&gt;tmspriv = cardinfo;</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;tms380tr_netdev_ops;</div><div class='del'>-</div><div class='del'>-	ret = request_irq(pdev-&gt;irq, tms380tr_interrupt, IRQF_SHARED,</div><div class='del'>-			  dev-&gt;name, dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_out_tmsdev;</div><div class='del'>-</div><div class='del'>-	pci_set_drvdata(pdev, dev);</div><div class='del'>-	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	ret = register_netdev(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_out_irq;</div><div class='del'>-	</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_out_irq:</div><div class='del'>-	free_irq(pdev-&gt;irq, dev);</div><div class='del'>-err_out_tmsdev:</div><div class='del'>-	pci_set_drvdata(pdev, NULL);</div><div class='del'>-	tmsdev_term(dev);</div><div class='del'>-err_out_region:</div><div class='del'>-	release_region(pci_ioaddr, TMS_PCI_IO_EXTENT);</div><div class='del'>-err_out_trdev:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Reads MAC address from adapter RAM, which should've read it from</div><div class='del'>- * the onboard ROM.  </div><div class='del'>- *</div><div class='del'>- * Calling this on a board that does not support it can be a very</div><div class='del'>- * dangerous thing.  The Madge board, for instance, will lock your</div><div class='del'>- * machine hard when this is called.  Luckily, its supported in a</div><div class='del'>- * separate driver.  --ASF</div><div class='del'>- */</div><div class='del'>-static void tms_pci_read_eeprom(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	</div><div class='del'>-	/* Address: 0000:0000 */</div><div class='del'>-	tms_pci_sifwritew(dev, 0, SIFADX);</div><div class='del'>-	tms_pci_sifwritew(dev, 0, SIFADR);	</div><div class='del'>-	</div><div class='del'>-	/* Read six byte MAC address data */</div><div class='del'>-	dev-&gt;addr_len = 6;</div><div class='del'>-	for(i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = tms_pci_sifreadw(dev, SIFINC) &gt;&gt; 8;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned short tms_pci_setnselout_pins(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned short val = 0;</div><div class='del'>-	struct net_local *tp = netdev_priv(dev);</div><div class='del'>-	struct card_info *cardinfo = tp-&gt;tmspriv;</div><div class='del'>-  </div><div class='del'>-	if(tp-&gt;DataRate == SPEED_4)</div><div class='del'>-		val |= cardinfo-&gt;nselout[0];	/* Set 4Mbps */</div><div class='del'>-	else</div><div class='del'>-		val |= cardinfo-&gt;nselout[1];	/* Set 16Mbps */</div><div class='del'>-	return val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __devexit tms_pci_detach (struct pci_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='del'>-</div><div class='del'>-	BUG_ON(!dev);</div><div class='del'>-	unregister_netdev(dev);</div><div class='del'>-	release_region(dev-&gt;base_addr, TMS_PCI_IO_EXTENT);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	tmsdev_term(dev);</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	pci_set_drvdata(pdev, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pci_driver tms_pci_driver = {</div><div class='del'>-	.name		= "tmspci",</div><div class='del'>-	.id_table	= tmspci_pci_tbl,</div><div class='del'>-	.probe		= tms_pci_attach,</div><div class='del'>-	.remove		= __devexit_p(tms_pci_detach),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init tms_pci_init (void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;tms_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit tms_pci_rmmod (void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver (&amp;tms_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(tms_pci_init);</div><div class='del'>-module_exit(tms_pci_rmmod);</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/tun.c b/drivers/net/tun.c<br/>index bb8c72c79c6f..987aeefbc774 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/tun.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/tun.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/tun.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/tun.c</a></div><div class='hunk'>@@ -313,7 +313,7 @@ static int run_filter(struct tap_filter *filter, const struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	/* Exact match */</div><div class='ctx'> 	for (i = 0; i &lt; filter-&gt;count; i++)</div><div class='del'>-		if (!compare_ether_addr(eh-&gt;h_dest, filter-&gt;addr[i]))</div><div class='add'>+		if (ether_addr_equal(eh-&gt;h_dest, filter-&gt;addr[i]))</div><div class='ctx'> 			return 1;</div><div class='ctx'> </div><div class='ctx'> 	/* Inexact match (multicast only) */</div><div class='head'>diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c<br/>index 5ee032cafade..3ae80eccd0ef 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/asix.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/asix.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/asix.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/asix.c</a></div><div class='hunk'>@@ -35,6 +35,7 @@</div><div class='ctx'> #include &lt;linux/crc32.h&gt;</div><div class='ctx'> #include &lt;linux/usb/usbnet.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DRIVER_VERSION "22-Dec-2011"</div><div class='ctx'> #define DRIVER_NAME "asix"</div><div class='hunk'>@@ -321,7 +322,7 @@ static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if ((size &gt; dev-&gt;net-&gt;mtu + ETH_HLEN) ||</div><div class='add'>+		if ((size &gt; dev-&gt;net-&gt;mtu + ETH_HLEN + VLAN_HLEN) ||</div><div class='ctx'> 		    (size + offset &gt; skb-&gt;len)) {</div><div class='ctx'> 			netdev_err(dev-&gt;net, "asix_rx_fixup() Bad RX Length %d\n",</div><div class='ctx'> 				   size);</div><div class='hunk'>@@ -355,7 +356,7 @@ static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,</div><div class='ctx'> 	u32 packet_len;</div><div class='ctx'> 	u32 padbytes = 0xffff0000;</div><div class='ctx'> </div><div class='del'>-	padlen = ((skb-&gt;len + 4) % 512) ? 0 : 4;</div><div class='add'>+	padlen = ((skb-&gt;len + 4) &amp; (dev-&gt;maxpacket - 1)) ? 0 : 4;</div><div class='ctx'> </div><div class='ctx'> 	if ((!skb_cloned(skb)) &amp;&amp;</div><div class='ctx'> 	    ((headroom + tailroom) &gt;= (4 + padlen))) {</div><div class='hunk'>@@ -377,7 +378,7 @@ static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,</div><div class='ctx'> 	cpu_to_le32s(&amp;packet_len);</div><div class='ctx'> 	skb_copy_to_linear_data(skb, &amp;packet_len, sizeof(packet_len));</div><div class='ctx'> </div><div class='del'>-	if ((skb-&gt;len % 512) == 0) {</div><div class='add'>+	if (padlen) {</div><div class='ctx'> 		cpu_to_le32s(&amp;padbytes);</div><div class='ctx'> 		memcpy(skb_tail_pointer(skb), &amp;padbytes, sizeof(padbytes));</div><div class='ctx'> 		skb_put(skb, sizeof(padbytes));</div><div class='hunk'>@@ -1647,6 +1648,7 @@ static struct usb_driver asix_driver = {</div><div class='ctx'> 	.resume =	usbnet_resume,</div><div class='ctx'> 	.disconnect =	usbnet_disconnect,</div><div class='ctx'> 	.supports_autosuspend = 1,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(asix_driver);</div><div class='head'>diff --git a/drivers/net/usb/catc.c b/drivers/net/usb/catc.c<br/>index 182cfb4aeb1d..26c5bebd9eca 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/catc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/catc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/catc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/catc.c</a></div><div class='hunk'>@@ -338,16 +338,18 @@ static void catc_irq_done(struct urb *urb)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			catc-&gt;rx_urb-&gt;dev = catc-&gt;usbdev;</div><div class='ctx'> 			if ((res = usb_submit_urb(catc-&gt;rx_urb, GFP_ATOMIC)) &lt; 0) {</div><div class='del'>-				err("submit(rx_urb) status %d", res);</div><div class='add'>+				dev_err(&amp;catc-&gt;usbdev-&gt;dev,</div><div class='add'>+					"submit(rx_urb) status %d\n", res);</div><div class='ctx'> 			}</div><div class='ctx'> 		} </div><div class='ctx'> 	}</div><div class='ctx'> resubmit:</div><div class='ctx'> 	res = usb_submit_urb (urb, GFP_ATOMIC);</div><div class='ctx'> 	if (res)</div><div class='del'>-		err ("can't resubmit intr, %s-%s, status %d",</div><div class='del'>-				catc-&gt;usbdev-&gt;bus-&gt;bus_name,</div><div class='del'>-				catc-&gt;usbdev-&gt;devpath, res);</div><div class='add'>+		dev_err(&amp;catc-&gt;usbdev-&gt;dev,</div><div class='add'>+			"can't resubmit intr, %s-%s, status %d\n",</div><div class='add'>+			catc-&gt;usbdev-&gt;bus-&gt;bus_name,</div><div class='add'>+			catc-&gt;usbdev-&gt;devpath, res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -366,7 +368,8 @@ static int catc_tx_run(struct catc *catc)</div><div class='ctx'> 	catc-&gt;tx_urb-&gt;dev = catc-&gt;usbdev;</div><div class='ctx'> </div><div class='ctx'> 	if ((status = usb_submit_urb(catc-&gt;tx_urb, GFP_ATOMIC)) &lt; 0)</div><div class='del'>-		err("submit(tx_urb), status %d", status);</div><div class='add'>+		dev_err(&amp;catc-&gt;usbdev-&gt;dev, "submit(tx_urb), status %d\n",</div><div class='add'>+			status);</div><div class='ctx'> </div><div class='ctx'> 	catc-&gt;tx_idx = !catc-&gt;tx_idx;</div><div class='ctx'> 	catc-&gt;tx_ptr = 0;</div><div class='hunk'>@@ -496,7 +499,8 @@ static void catc_ctrl_run(struct catc *catc)</div><div class='ctx'> 		memcpy(catc-&gt;ctrl_buf, q-&gt;buf, q-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	if ((status = usb_submit_urb(catc-&gt;ctrl_urb, GFP_ATOMIC)))</div><div class='del'>-		err("submit(ctrl_urb) status %d", status);</div><div class='add'>+		dev_err(&amp;catc-&gt;usbdev-&gt;dev, "submit(ctrl_urb) status %d\n",</div><div class='add'>+			status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void catc_ctrl_done(struct urb *urb)</div><div class='hunk'>@@ -555,7 +559,7 @@ static int catc_ctrl_async(struct catc *catc, u8 dir, u8 request, u16 value,</div><div class='ctx'> 	catc-&gt;ctrl_head = (catc-&gt;ctrl_head + 1) &amp; (CTRL_QUEUE - 1);</div><div class='ctx'> </div><div class='ctx'> 	if (catc-&gt;ctrl_head == catc-&gt;ctrl_tail) {</div><div class='del'>-		err("ctrl queue full");</div><div class='add'>+		dev_err(&amp;catc-&gt;usbdev-&gt;dev, "ctrl queue full\n");</div><div class='ctx'> 		catc-&gt;ctrl_tail = (catc-&gt;ctrl_tail + 1) &amp; (CTRL_QUEUE - 1);</div><div class='ctx'> 		retval = -1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -714,7 +718,8 @@ static int catc_open(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	catc-&gt;irq_urb-&gt;dev = catc-&gt;usbdev;</div><div class='ctx'> 	if ((status = usb_submit_urb(catc-&gt;irq_urb, GFP_KERNEL)) &lt; 0) {</div><div class='del'>-		err("submit(irq_urb) status %d", status);</div><div class='add'>+		dev_err(&amp;catc-&gt;usbdev-&gt;dev, "submit(irq_urb) status %d\n",</div><div class='add'>+			status);</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -769,7 +774,7 @@ static int catc_probe(struct usb_interface *intf, const struct usb_device_id *id</div><div class='ctx'> </div><div class='ctx'> 	if (usb_set_interface(usbdev,</div><div class='ctx'> 			intf-&gt;altsetting-&gt;desc.bInterfaceNumber, 1)) {</div><div class='del'>-                err("Can't set altsetting 1.");</div><div class='add'>+                dev_err(&amp;intf-&gt;dev, "Can't set altsetting 1.\n");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -799,7 +804,7 @@ static int catc_probe(struct usb_interface *intf, const struct usb_device_id *id</div><div class='ctx'> 	catc-&gt;irq_urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='ctx'> 	if ((!catc-&gt;ctrl_urb) || (!catc-&gt;tx_urb) || </div><div class='ctx'> 	    (!catc-&gt;rx_urb) || (!catc-&gt;irq_urb)) {</div><div class='del'>-		err("No free urbs available.");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "No free urbs available.\n");</div><div class='ctx'> 		usb_free_urb(catc-&gt;ctrl_urb);</div><div class='ctx'> 		usb_free_urb(catc-&gt;tx_urb);</div><div class='ctx'> 		usb_free_urb(catc-&gt;rx_urb);</div><div class='hunk'>@@ -947,6 +952,7 @@ static struct usb_driver catc_driver = {</div><div class='ctx'> 	.probe =	catc_probe,</div><div class='ctx'> 	.disconnect =	catc_disconnect,</div><div class='ctx'> 	.id_table =	catc_id_table,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(catc_driver);</div><div class='head'>diff --git a/drivers/net/usb/cdc-phonet.c b/drivers/net/usb/cdc-phonet.c<br/>index 3e41b00c6806..d848d4dd5754 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/cdc-phonet.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/cdc-phonet.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/cdc-phonet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/cdc-phonet.c</a></div><div class='hunk'>@@ -457,6 +457,7 @@ static struct usb_driver usbpn_driver = {</div><div class='ctx'> 	.probe =	usbpn_probe,</div><div class='ctx'> 	.disconnect =	usbpn_disconnect,</div><div class='ctx'> 	.id_table =	usbpn_ids,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(usbpn_driver);</div><div class='head'>diff --git a/drivers/net/usb/cdc_eem.c b/drivers/net/usb/cdc_eem.c<br/>index 685a4e22c768..434d5af8e6fb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/cdc_eem.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/cdc_eem.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/cdc_eem.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/cdc_eem.c</a></div><div class='hunk'>@@ -368,6 +368,7 @@ static struct usb_driver eem_driver = {</div><div class='ctx'> 	.disconnect =	usbnet_disconnect,</div><div class='ctx'> 	.suspend =	usbnet_suspend,</div><div class='ctx'> 	.resume =	usbnet_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(eem_driver);</div><div class='head'>diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c<br/>index 90a30026a931..a03de7197049 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/cdc_ether.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/cdc_ether.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/cdc_ether.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/cdc_ether.c</a></div><div class='hunk'>@@ -83,6 +83,7 @@ int usbnet_generic_cdc_bind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 	struct cdc_state		*info = (void *) &amp;dev-&gt;data;</div><div class='ctx'> 	int				status;</div><div class='ctx'> 	int				rndis;</div><div class='add'>+	bool				android_rndis_quirk = false;</div><div class='ctx'> 	struct usb_driver		*driver = driver_of(intf);</div><div class='ctx'> 	struct usb_cdc_mdlm_desc	*desc = NULL;</div><div class='ctx'> 	struct usb_cdc_mdlm_detail_desc *detail = NULL;</div><div class='hunk'>@@ -195,6 +196,11 @@ int usbnet_generic_cdc_bind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 					info-&gt;control,</div><div class='ctx'> 					info-&gt;u-&gt;bSlaveInterface0,</div><div class='ctx'> 					info-&gt;data);</div><div class='add'>+				/* fall back to hard-wiring for RNDIS */</div><div class='add'>+				if (rndis) {</div><div class='add'>+					android_rndis_quirk = true;</div><div class='add'>+					goto next_desc;</div><div class='add'>+				}</div><div class='ctx'> 				goto bad_desc;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (info-&gt;control != intf) {</div><div class='hunk'>@@ -271,11 +277,15 @@ next_desc:</div><div class='ctx'> 	/* Microsoft ActiveSync based and some regular RNDIS devices lack the</div><div class='ctx'> 	 * CDC descriptors, so we'll hard-wire the interfaces and not check</div><div class='ctx'> 	 * for descriptors.</div><div class='add'>+	 *</div><div class='add'>+	 * Some Android RNDIS devices have a CDC Union descriptor pointing</div><div class='add'>+	 * to non-existing interfaces.  Ignore that and attempt the same</div><div class='add'>+	 * hard-wired 0 and 1 interfaces.</div><div class='ctx'> 	 */</div><div class='del'>-	if (rndis &amp;&amp; !info-&gt;u) {</div><div class='add'>+	if (rndis &amp;&amp; (!info-&gt;u || android_rndis_quirk)) {</div><div class='ctx'> 		info-&gt;control = usb_ifnum_to_if(dev-&gt;udev, 0);</div><div class='ctx'> 		info-&gt;data = usb_ifnum_to_if(dev-&gt;udev, 1);</div><div class='del'>-		if (!info-&gt;control || !info-&gt;data) {</div><div class='add'>+		if (!info-&gt;control || !info-&gt;data || info-&gt;control != intf) {</div><div class='ctx'> 			dev_dbg(&amp;intf-&gt;dev,</div><div class='ctx'> 				"rndis: master #0/%p slave #1/%p\n",</div><div class='ctx'> 				info-&gt;control,</div><div class='hunk'>@@ -475,6 +485,8 @@ static const struct driver_info wwan_info = {</div><div class='ctx'> /*-------------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='ctx'> #define HUAWEI_VENDOR_ID	0x12D1</div><div class='add'>+#define NOVATEL_VENDOR_ID	0x1410</div><div class='add'>+#define ZTE_VENDOR_ID		0x19D2</div><div class='ctx'> </div><div class='ctx'> static const struct usb_device_id	products [] = {</div><div class='ctx'> /*</div><div class='hunk'>@@ -592,6 +604,76 @@ static const struct usb_device_id	products [] = {</div><div class='ctx'>  * because of bugs/quirks in a given product (like Zaurus, above).</div><div class='ctx'>  */</div><div class='ctx'> {</div><div class='add'>+	/* Novatel USB551L */</div><div class='add'>+	/* This match must come *before* the generic CDC-ETHER match so that</div><div class='add'>+	 * we get FLAG_WWAN set on the device, since it's descriptors are</div><div class='add'>+	 * generic CDC-ETHER.</div><div class='add'>+	 */</div><div class='add'>+	.match_flags    =   USB_DEVICE_ID_MATCH_VENDOR</div><div class='add'>+		 | USB_DEVICE_ID_MATCH_PRODUCT</div><div class='add'>+		 | USB_DEVICE_ID_MATCH_INT_INFO,</div><div class='add'>+	.idVendor               = NOVATEL_VENDOR_ID,</div><div class='add'>+	.idProduct		= 0xB001,</div><div class='add'>+	.bInterfaceClass	= USB_CLASS_COMM,</div><div class='add'>+	.bInterfaceSubClass	= USB_CDC_SUBCLASS_ETHERNET,</div><div class='add'>+	.bInterfaceProtocol	= USB_CDC_PROTO_NONE,</div><div class='add'>+	.driver_info = (unsigned long)&amp;wwan_info,</div><div class='add'>+}, {</div><div class='add'>+	/* ZTE (Vodafone) K3805-Z */</div><div class='add'>+	.match_flags    =   USB_DEVICE_ID_MATCH_VENDOR</div><div class='add'>+		 | USB_DEVICE_ID_MATCH_PRODUCT</div><div class='add'>+		 | USB_DEVICE_ID_MATCH_INT_INFO,</div><div class='add'>+	.idVendor               = ZTE_VENDOR_ID,</div><div class='add'>+	.idProduct		= 0x1003,</div><div class='add'>+	.bInterfaceClass	= USB_CLASS_COMM,</div><div class='add'>+	.bInterfaceSubClass	= USB_CDC_SUBCLASS_ETHERNET,</div><div class='add'>+	.bInterfaceProtocol	= USB_CDC_PROTO_NONE,</div><div class='add'>+	.driver_info = (unsigned long)&amp;wwan_info,</div><div class='add'>+}, {</div><div class='add'>+	/* ZTE (Vodafone) K3806-Z */</div><div class='add'>+	.match_flags    =   USB_DEVICE_ID_MATCH_VENDOR</div><div class='add'>+		 | USB_DEVICE_ID_MATCH_PRODUCT</div><div class='add'>+		 | USB_DEVICE_ID_MATCH_INT_INFO,</div><div class='add'>+	.idVendor               = ZTE_VENDOR_ID,</div><div class='add'>+	.idProduct		= 0x1015,</div><div class='add'>+	.bInterfaceClass	= USB_CLASS_COMM,</div><div class='add'>+	.bInterfaceSubClass	= USB_CDC_SUBCLASS_ETHERNET,</div><div class='add'>+	.bInterfaceProtocol	= USB_CDC_PROTO_NONE,</div><div class='add'>+	.driver_info = (unsigned long)&amp;wwan_info,</div><div class='add'>+}, {</div><div class='add'>+	/* ZTE (Vodafone) K4510-Z */</div><div class='add'>+	.match_flags    =   USB_DEVICE_ID_MATCH_VENDOR</div><div class='add'>+		 | USB_DEVICE_ID_MATCH_PRODUCT</div><div class='add'>+		 | USB_DEVICE_ID_MATCH_INT_INFO,</div><div class='add'>+	.idVendor               = ZTE_VENDOR_ID,</div><div class='add'>+	.idProduct		= 0x1173,</div><div class='add'>+	.bInterfaceClass	= USB_CLASS_COMM,</div><div class='add'>+	.bInterfaceSubClass	= USB_CDC_SUBCLASS_ETHERNET,</div><div class='add'>+	.bInterfaceProtocol	= USB_CDC_PROTO_NONE,</div><div class='add'>+	.driver_info = (unsigned long)&amp;wwan_info,</div><div class='add'>+}, {</div><div class='add'>+	/* ZTE (Vodafone) K3770-Z */</div><div class='add'>+	.match_flags    =   USB_DEVICE_ID_MATCH_VENDOR</div><div class='add'>+		 | USB_DEVICE_ID_MATCH_PRODUCT</div><div class='add'>+		 | USB_DEVICE_ID_MATCH_INT_INFO,</div><div class='add'>+	.idVendor               = ZTE_VENDOR_ID,</div><div class='add'>+	.idProduct		= 0x1177,</div><div class='add'>+	.bInterfaceClass	= USB_CLASS_COMM,</div><div class='add'>+	.bInterfaceSubClass	= USB_CDC_SUBCLASS_ETHERNET,</div><div class='add'>+	.bInterfaceProtocol	= USB_CDC_PROTO_NONE,</div><div class='add'>+	.driver_info = (unsigned long)&amp;wwan_info,</div><div class='add'>+}, {</div><div class='add'>+	/* ZTE (Vodafone) K3772-Z */</div><div class='add'>+	.match_flags    =   USB_DEVICE_ID_MATCH_VENDOR</div><div class='add'>+		 | USB_DEVICE_ID_MATCH_PRODUCT</div><div class='add'>+		 | USB_DEVICE_ID_MATCH_INT_INFO,</div><div class='add'>+	.idVendor               = ZTE_VENDOR_ID,</div><div class='add'>+	.idProduct		= 0x1181,</div><div class='add'>+	.bInterfaceClass	= USB_CLASS_COMM,</div><div class='add'>+	.bInterfaceSubClass	= USB_CDC_SUBCLASS_ETHERNET,</div><div class='add'>+	.bInterfaceProtocol	= USB_CDC_PROTO_NONE,</div><div class='add'>+	.driver_info = (unsigned long)&amp;wwan_info,</div><div class='add'>+}, {</div><div class='ctx'> 	USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_ETHERNET,</div><div class='ctx'> 			USB_CDC_PROTO_NONE),</div><div class='ctx'> 	.driver_info = (unsigned long) &amp;cdc_info,</div><div class='hunk'>@@ -623,6 +705,7 @@ static struct usb_driver cdc_driver = {</div><div class='ctx'> 	.resume =	usbnet_resume,</div><div class='ctx'> 	.reset_resume =	usbnet_resume,</div><div class='ctx'> 	.supports_autosuspend = 1,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(cdc_driver);</div><div class='head'>diff --git a/drivers/net/usb/cdc_ncm.c b/drivers/net/usb/cdc_ncm.c<br/>index 7adc9f6b0ea1..4b9513fcf275 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/cdc_ncm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/cdc_ncm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/cdc_ncm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/cdc_ncm.c</a></div><div class='hunk'>@@ -1212,6 +1212,7 @@ static struct usb_driver cdc_ncm_driver = {</div><div class='ctx'> 	.resume = usbnet_resume,</div><div class='ctx'> 	.reset_resume =	usbnet_resume,</div><div class='ctx'> 	.supports_autosuspend = 1,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops cdc_ncm_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/usb/cdc_subset.c b/drivers/net/usb/cdc_subset.c<br/>index b403d934e4e3..0d1fe89ae0bd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/cdc_subset.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/cdc_subset.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/cdc_subset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/cdc_subset.c</a></div><div class='hunk'>@@ -336,6 +336,7 @@ static struct usb_driver cdc_subset_driver = {</div><div class='ctx'> 	.resume =	usbnet_resume,</div><div class='ctx'> 	.disconnect =	usbnet_disconnect,</div><div class='ctx'> 	.id_table =	products,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(cdc_subset_driver);</div><div class='head'>diff --git a/drivers/net/usb/cx82310_eth.c b/drivers/net/usb/cx82310_eth.c<br/>index 0e0531356e62..49ab45e17fe8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/cx82310_eth.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/cx82310_eth.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/cx82310_eth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/cx82310_eth.c</a></div><div class='hunk'>@@ -327,6 +327,7 @@ static struct usb_driver cx82310_driver = {</div><div class='ctx'> 	.disconnect	= usbnet_disconnect,</div><div class='ctx'> 	.suspend	= usbnet_suspend,</div><div class='ctx'> 	.resume		= usbnet_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(cx82310_driver);</div><div class='head'>diff --git a/drivers/net/usb/dm9601.c b/drivers/net/usb/dm9601.c<br/>index b97226318ea5..e0433ce6ced7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/dm9601.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/dm9601.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/dm9601.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/dm9601.c</a></div><div class='hunk'>@@ -670,6 +670,7 @@ static struct usb_driver dm9601_driver = {</div><div class='ctx'> 	.disconnect = usbnet_disconnect,</div><div class='ctx'> 	.suspend = usbnet_suspend,</div><div class='ctx'> 	.resume = usbnet_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(dm9601_driver);</div><div class='head'>diff --git a/drivers/net/usb/gl620a.c b/drivers/net/usb/gl620a.c<br/>index 38266bdae26b..db3c8021f2a3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/gl620a.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/gl620a.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/gl620a.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/gl620a.c</a></div><div class='hunk'>@@ -225,6 +225,7 @@ static struct usb_driver gl620a_driver = {</div><div class='ctx'> 	.disconnect =	usbnet_disconnect,</div><div class='ctx'> 	.suspend =	usbnet_suspend,</div><div class='ctx'> 	.resume =	usbnet_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(gl620a_driver);</div><div class='head'>diff --git a/drivers/net/usb/hso.c b/drivers/net/usb/hso.c<br/>index 2d2a6882ba33..62f30b46fa42 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/hso.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/hso.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/hso.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/hso.c</a></div><div class='hunk'>@@ -106,13 +106,6 @@</div><div class='ctx'> </div><div class='ctx'> #define MAX_RX_URBS			2</div><div class='ctx'> </div><div class='del'>-static inline struct hso_serial *get_serial_by_tty(struct tty_struct *tty)</div><div class='del'>-{</div><div class='del'>-	if (tty)</div><div class='del'>-		return tty-&gt;driver_data;</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*****************************************************************************/</div><div class='ctx'> /* Debugging functions                                                       */</div><div class='ctx'> /*****************************************************************************/</div><div class='hunk'>@@ -255,9 +248,8 @@ struct hso_serial {</div><div class='ctx'> 	u8 dtr_state;</div><div class='ctx'> 	unsigned tx_urb_used:1;</div><div class='ctx'> </div><div class='add'>+	struct tty_port port;</div><div class='ctx'> 	/* from usb_serial_port */</div><div class='del'>-	struct tty_struct *tty;</div><div class='del'>-	int open_count;</div><div class='ctx'> 	spinlock_t serial_lock;</div><div class='ctx'> </div><div class='ctx'> 	int (*write_data) (struct hso_serial *serial);</div><div class='hunk'>@@ -1114,7 +1106,7 @@ static void hso_init_termios(struct ktermios *termios)</div><div class='ctx'> static void _hso_serial_set_termios(struct tty_struct *tty,</div><div class='ctx'> 				    struct ktermios *old)</div><div class='ctx'> {</div><div class='del'>-	struct hso_serial *serial = get_serial_by_tty(tty);</div><div class='add'>+	struct hso_serial *serial = tty-&gt;driver_data;</div><div class='ctx'> 	struct ktermios *termios;</div><div class='ctx'> </div><div class='ctx'> 	if (!serial) {</div><div class='hunk'>@@ -1190,7 +1182,7 @@ static void put_rxbuf_data_and_resubmit_ctrl_urb(struct hso_serial *serial)</div><div class='ctx'> 	struct urb *urb;</div><div class='ctx'> </div><div class='ctx'> 	urb = serial-&gt;rx_urb[0];</div><div class='del'>-	if (serial-&gt;open_count &gt; 0) {</div><div class='add'>+	if (serial-&gt;port.count &gt; 0) {</div><div class='ctx'> 		count = put_rxbuf_data(urb, serial);</div><div class='ctx'> 		if (count == -1)</div><div class='ctx'> 			return;</div><div class='hunk'>@@ -1226,7 +1218,7 @@ static void hso_std_serial_read_bulk_callback(struct urb *urb)</div><div class='ctx'> 	DUMP1(urb-&gt;transfer_buffer, urb-&gt;actual_length);</div><div class='ctx'> </div><div class='ctx'> 	/* Anyone listening? */</div><div class='del'>-	if (serial-&gt;open_count == 0)</div><div class='add'>+	if (serial-&gt;port.count == 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (status == 0) {</div><div class='hunk'>@@ -1268,7 +1260,7 @@ static void hso_unthrottle_tasklet(struct hso_serial *serial)</div><div class='ctx'> </div><div class='ctx'> static	void hso_unthrottle(struct tty_struct *tty)</div><div class='ctx'> {</div><div class='del'>-	struct hso_serial *serial = get_serial_by_tty(tty);</div><div class='add'>+	struct hso_serial *serial = tty-&gt;driver_data;</div><div class='ctx'> </div><div class='ctx'> 	tasklet_hi_schedule(&amp;serial-&gt;unthrottle_tasklet);</div><div class='ctx'> }</div><div class='hunk'>@@ -1304,15 +1296,12 @@ static int hso_serial_open(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> 	kref_get(&amp;serial-&gt;parent-&gt;ref);</div><div class='ctx'> </div><div class='ctx'> 	/* setup */</div><div class='del'>-	spin_lock_irq(&amp;serial-&gt;serial_lock);</div><div class='ctx'> 	tty-&gt;driver_data = serial;</div><div class='del'>-	tty_kref_put(serial-&gt;tty);</div><div class='del'>-	serial-&gt;tty = tty_kref_get(tty);</div><div class='del'>-	spin_unlock_irq(&amp;serial-&gt;serial_lock);</div><div class='add'>+	tty_port_tty_set(&amp;serial-&gt;port, tty);</div><div class='ctx'> </div><div class='ctx'> 	/* check for port already opened, if not set the termios */</div><div class='del'>-	serial-&gt;open_count++;</div><div class='del'>-	if (serial-&gt;open_count == 1) {</div><div class='add'>+	serial-&gt;port.count++;</div><div class='add'>+	if (serial-&gt;port.count == 1) {</div><div class='ctx'> 		serial-&gt;rx_state = RX_IDLE;</div><div class='ctx'> 		/* Force default termio settings */</div><div class='ctx'> 		_hso_serial_set_termios(tty, NULL);</div><div class='hunk'>@@ -1324,7 +1313,7 @@ static int hso_serial_open(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> 		result = hso_start_serial_device(serial-&gt;parent, GFP_KERNEL);</div><div class='ctx'> 		if (result) {</div><div class='ctx'> 			hso_stop_serial_device(serial-&gt;parent);</div><div class='del'>-			serial-&gt;open_count--;</div><div class='add'>+			serial-&gt;port.count--;</div><div class='ctx'> 			kref_put(&amp;serial-&gt;parent-&gt;ref, hso_serial_ref_free);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1361,17 +1350,11 @@ static void hso_serial_close(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> </div><div class='ctx'> 	/* reset the rts and dtr */</div><div class='ctx'> 	/* do the actual close */</div><div class='del'>-	serial-&gt;open_count--;</div><div class='add'>+	serial-&gt;port.count--;</div><div class='ctx'> </div><div class='del'>-	if (serial-&gt;open_count &lt;= 0) {</div><div class='del'>-		serial-&gt;open_count = 0;</div><div class='del'>-		spin_lock_irq(&amp;serial-&gt;serial_lock);</div><div class='del'>-		if (serial-&gt;tty == tty) {</div><div class='del'>-			serial-&gt;tty-&gt;driver_data = NULL;</div><div class='del'>-			serial-&gt;tty = NULL;</div><div class='del'>-			tty_kref_put(tty);</div><div class='del'>-		}</div><div class='del'>-		spin_unlock_irq(&amp;serial-&gt;serial_lock);</div><div class='add'>+	if (serial-&gt;port.count &lt;= 0) {</div><div class='add'>+		serial-&gt;port.count = 0;</div><div class='add'>+		tty_port_tty_set(&amp;serial-&gt;port, NULL);</div><div class='ctx'> 		if (!usb_gone)</div><div class='ctx'> 			hso_stop_serial_device(serial-&gt;parent);</div><div class='ctx'> 		tasklet_kill(&amp;serial-&gt;unthrottle_tasklet);</div><div class='hunk'>@@ -1390,7 +1373,7 @@ static void hso_serial_close(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> static int hso_serial_write(struct tty_struct *tty, const unsigned char *buf,</div><div class='ctx'> 			    int count)</div><div class='ctx'> {</div><div class='del'>-	struct hso_serial *serial = get_serial_by_tty(tty);</div><div class='add'>+	struct hso_serial *serial = tty-&gt;driver_data;</div><div class='ctx'> 	int space, tx_bytes;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -1422,7 +1405,7 @@ out:</div><div class='ctx'> /* how much room is there for writing */</div><div class='ctx'> static int hso_serial_write_room(struct tty_struct *tty)</div><div class='ctx'> {</div><div class='del'>-	struct hso_serial *serial = get_serial_by_tty(tty);</div><div class='add'>+	struct hso_serial *serial = tty-&gt;driver_data;</div><div class='ctx'> 	int room;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -1437,7 +1420,7 @@ static int hso_serial_write_room(struct tty_struct *tty)</div><div class='ctx'> /* setup the term */</div><div class='ctx'> static void hso_serial_set_termios(struct tty_struct *tty, struct ktermios *old)</div><div class='ctx'> {</div><div class='del'>-	struct hso_serial *serial = get_serial_by_tty(tty);</div><div class='add'>+	struct hso_serial *serial = tty-&gt;driver_data;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (old)</div><div class='hunk'>@@ -1446,7 +1429,7 @@ static void hso_serial_set_termios(struct tty_struct *tty, struct ktermios *old)</div><div class='ctx'> </div><div class='ctx'> 	/* the actual setup */</div><div class='ctx'> 	spin_lock_irqsave(&amp;serial-&gt;serial_lock, flags);</div><div class='del'>-	if (serial-&gt;open_count)</div><div class='add'>+	if (serial-&gt;port.count)</div><div class='ctx'> 		_hso_serial_set_termios(tty, old);</div><div class='ctx'> 	else</div><div class='ctx'> 		tty-&gt;termios = old;</div><div class='hunk'>@@ -1458,7 +1441,7 @@ static void hso_serial_set_termios(struct tty_struct *tty, struct ktermios *old)</div><div class='ctx'> /* how many characters in the buffer */</div><div class='ctx'> static int hso_serial_chars_in_buffer(struct tty_struct *tty)</div><div class='ctx'> {</div><div class='del'>-	struct hso_serial *serial = get_serial_by_tty(tty);</div><div class='add'>+	struct hso_serial *serial = tty-&gt;driver_data;</div><div class='ctx'> 	int chars;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -1629,7 +1612,7 @@ static int hso_get_count(struct tty_struct *tty,</div><div class='ctx'> 		  struct serial_icounter_struct *icount)</div><div class='ctx'> {</div><div class='ctx'> 	struct uart_icount cnow;</div><div class='del'>-	struct hso_serial *serial = get_serial_by_tty(tty);</div><div class='add'>+	struct hso_serial *serial = tty-&gt;driver_data;</div><div class='ctx'> 	struct hso_tiocmget  *tiocmget = serial-&gt;tiocmget;</div><div class='ctx'> </div><div class='ctx'> 	memset(icount, 0, sizeof(struct serial_icounter_struct));</div><div class='hunk'>@@ -1659,7 +1642,7 @@ static int hso_get_count(struct tty_struct *tty,</div><div class='ctx'> static int hso_serial_tiocmget(struct tty_struct *tty)</div><div class='ctx'> {</div><div class='ctx'> 	int retval;</div><div class='del'>-	struct hso_serial *serial = get_serial_by_tty(tty);</div><div class='add'>+	struct hso_serial *serial = tty-&gt;driver_data;</div><div class='ctx'> 	struct hso_tiocmget  *tiocmget;</div><div class='ctx'> 	u16 UART_state_bitmap;</div><div class='ctx'> </div><div class='hunk'>@@ -1693,7 +1676,7 @@ static int hso_serial_tiocmset(struct tty_struct *tty,</div><div class='ctx'> 	int val = 0;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int if_num;</div><div class='del'>-	struct hso_serial *serial = get_serial_by_tty(tty);</div><div class='add'>+	struct hso_serial *serial = tty-&gt;driver_data;</div><div class='ctx'> </div><div class='ctx'> 	/* sanity check */</div><div class='ctx'> 	if (!serial) {</div><div class='hunk'>@@ -1733,7 +1716,7 @@ static int hso_serial_tiocmset(struct tty_struct *tty,</div><div class='ctx'> static int hso_serial_ioctl(struct tty_struct *tty,</div><div class='ctx'> 			    unsigned int cmd, unsigned long arg)</div><div class='ctx'> {</div><div class='del'>-	struct hso_serial *serial =  get_serial_by_tty(tty);</div><div class='add'>+	struct hso_serial *serial = tty-&gt;driver_data;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	D4("IOCTL cmd: %d, arg: %ld", cmd, arg);</div><div class='ctx'> </div><div class='hunk'>@@ -1905,7 +1888,7 @@ static void intr_callback(struct urb *urb)</div><div class='ctx'> 				D1("Pending read interrupt on port %d\n", i);</div><div class='ctx'> 				spin_lock(&amp;serial-&gt;serial_lock);</div><div class='ctx'> 				if (serial-&gt;rx_state == RX_IDLE &amp;&amp;</div><div class='del'>-					serial-&gt;open_count &gt; 0) {</div><div class='add'>+					serial-&gt;port.count &gt; 0) {</div><div class='ctx'> 					/* Setup and send a ctrl req read on</div><div class='ctx'> 					 * port i */</div><div class='ctx'> 					if (!serial-&gt;rx_urb_filled[0]) {</div><div class='hunk'>@@ -1954,14 +1937,13 @@ static void hso_std_serial_write_bulk_callback(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;serial-&gt;serial_lock);</div><div class='ctx'> 	serial-&gt;tx_urb_used = 0;</div><div class='del'>-	tty = tty_kref_get(serial-&gt;tty);</div><div class='ctx'> 	spin_unlock(&amp;serial-&gt;serial_lock);</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		handle_usb_error(status, __func__, serial-&gt;parent);</div><div class='del'>-		tty_kref_put(tty);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	hso_put_activity(serial-&gt;parent);</div><div class='add'>+	tty = tty_port_tty_get(&amp;serial-&gt;port);</div><div class='ctx'> 	if (tty) {</div><div class='ctx'> 		tty_wakeup(tty);</div><div class='ctx'> 		tty_kref_put(tty);</div><div class='hunk'>@@ -2001,7 +1983,6 @@ static void ctrl_callback(struct urb *urb)</div><div class='ctx'> 	struct hso_serial *serial = urb-&gt;context;</div><div class='ctx'> 	struct usb_ctrlrequest *req;</div><div class='ctx'> 	int status = urb-&gt;status;</div><div class='del'>-	struct tty_struct *tty;</div><div class='ctx'> </div><div class='ctx'> 	/* sanity check */</div><div class='ctx'> 	if (!serial)</div><div class='hunk'>@@ -2009,11 +1990,9 @@ static void ctrl_callback(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;serial-&gt;serial_lock);</div><div class='ctx'> 	serial-&gt;tx_urb_used = 0;</div><div class='del'>-	tty = tty_kref_get(serial-&gt;tty);</div><div class='ctx'> 	spin_unlock(&amp;serial-&gt;serial_lock);</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		handle_usb_error(status, __func__, serial-&gt;parent);</div><div class='del'>-		tty_kref_put(tty);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2031,13 +2010,15 @@ static void ctrl_callback(struct urb *urb)</div><div class='ctx'> 		put_rxbuf_data_and_resubmit_ctrl_urb(serial);</div><div class='ctx'> 		spin_unlock(&amp;serial-&gt;serial_lock);</div><div class='ctx'> 	} else {</div><div class='add'>+		struct tty_struct *tty = tty_port_tty_get(&amp;serial-&gt;port);</div><div class='ctx'> 		hso_put_activity(serial-&gt;parent);</div><div class='del'>-		if (tty)</div><div class='add'>+		if (tty) {</div><div class='ctx'> 			tty_wakeup(tty);</div><div class='add'>+			tty_kref_put(tty);</div><div class='add'>+		}</div><div class='ctx'> 		/* response to a write command */</div><div class='ctx'> 		hso_kick_transmit(serial);</div><div class='ctx'> 	}</div><div class='del'>-	tty_kref_put(tty);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* handle RX data for serial port */</div><div class='hunk'>@@ -2053,8 +2034,7 @@ static int put_rxbuf_data(struct urb *urb, struct hso_serial *serial)</div><div class='ctx'> 		return -2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* All callers to put_rxbuf_data hold serial_lock */</div><div class='del'>-	tty = tty_kref_get(serial-&gt;tty);</div><div class='add'>+	tty = tty_port_tty_get(&amp;serial-&gt;port);</div><div class='ctx'> </div><div class='ctx'> 	/* Push data to tty */</div><div class='ctx'> 	if (tty) {</div><div class='hunk'>@@ -2074,12 +2054,12 @@ static int put_rxbuf_data(struct urb *urb, struct hso_serial *serial)</div><div class='ctx'> 			write_length_remaining -= curr_write_len;</div><div class='ctx'> 			tty_flip_buffer_push(tty);</div><div class='ctx'> 		}</div><div class='add'>+		tty_kref_put(tty);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (write_length_remaining == 0) {</div><div class='ctx'> 		serial-&gt;curr_rx_urb_offset = 0;</div><div class='ctx'> 		serial-&gt;rx_urb_filled[hso_urb_to_index(serial, urb)] = 0;</div><div class='ctx'> 	}</div><div class='del'>-	tty_kref_put(tty);</div><div class='ctx'> 	return write_length_remaining;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2320,6 +2300,7 @@ static int hso_serial_common_create(struct hso_serial *serial, int num_urbs,</div><div class='ctx'> 	serial-&gt;minor = minor;</div><div class='ctx'> 	serial-&gt;magic = HSO_SERIAL_MAGIC;</div><div class='ctx'> 	spin_lock_init(&amp;serial-&gt;serial_lock);</div><div class='add'>+	tty_port_init(&amp;serial-&gt;port);</div><div class='ctx'> 	serial-&gt;num_rx_urbs = num_urbs;</div><div class='ctx'> </div><div class='ctx'> 	/* RX, allocate urb and initialize */</div><div class='hunk'>@@ -3098,7 +3079,7 @@ static int hso_resume(struct usb_interface *iface)</div><div class='ctx'> 	/* Start all serial ports */</div><div class='ctx'> 	for (i = 0; i &lt; HSO_SERIAL_TTY_MINORS; i++) {</div><div class='ctx'> 		if (serial_table[i] &amp;&amp; (serial_table[i]-&gt;interface == iface)) {</div><div class='del'>-			if (dev2ser(serial_table[i])-&gt;open_count) {</div><div class='add'>+			if (dev2ser(serial_table[i])-&gt;port.count) {</div><div class='ctx'> 				result =</div><div class='ctx'> 				    hso_start_serial_device(serial_table[i], GFP_NOIO);</div><div class='ctx'> 				hso_kick_transmit(dev2ser(serial_table[i]));</div><div class='hunk'>@@ -3172,13 +3153,12 @@ static void hso_free_interface(struct usb_interface *interface)</div><div class='ctx'> 		if (serial_table[i] &amp;&amp;</div><div class='ctx'> 		    (serial_table[i]-&gt;interface == interface)) {</div><div class='ctx'> 			hso_dev = dev2ser(serial_table[i]);</div><div class='del'>-			spin_lock_irq(&amp;hso_dev-&gt;serial_lock);</div><div class='del'>-			tty = tty_kref_get(hso_dev-&gt;tty);</div><div class='del'>-			spin_unlock_irq(&amp;hso_dev-&gt;serial_lock);</div><div class='del'>-			if (tty)</div><div class='add'>+			tty = tty_port_tty_get(&amp;hso_dev-&gt;port);</div><div class='add'>+			if (tty) {</div><div class='ctx'> 				tty_hangup(tty);</div><div class='add'>+				tty_kref_put(tty);</div><div class='add'>+			}</div><div class='ctx'> 			mutex_lock(&amp;hso_dev-&gt;parent-&gt;mutex);</div><div class='del'>-			tty_kref_put(tty);</div><div class='ctx'> 			hso_dev-&gt;parent-&gt;usb_gone = 1;</div><div class='ctx'> 			mutex_unlock(&amp;hso_dev-&gt;parent-&gt;mutex);</div><div class='ctx'> 			kref_put(&amp;serial_table[i]-&gt;ref, hso_serial_ref_free);</div><div class='hunk'>@@ -3291,6 +3271,7 @@ static struct usb_driver hso_driver = {</div><div class='ctx'> 	.resume = hso_resume,</div><div class='ctx'> 	.reset_resume = hso_resume,</div><div class='ctx'> 	.supports_autosuspend = 1,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init hso_init(void)</div><div class='hunk'>@@ -3312,7 +3293,6 @@ static int __init hso_init(void)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/* fill in all needed values */</div><div class='del'>-	tty_drv-&gt;magic = TTY_DRIVER_MAGIC;</div><div class='ctx'> 	tty_drv-&gt;driver_name = driver_name;</div><div class='ctx'> 	tty_drv-&gt;name = tty_filename;</div><div class='ctx'> </div><div class='hunk'>@@ -3333,7 +3313,7 @@ static int __init hso_init(void)</div><div class='ctx'> 	if (result) {</div><div class='ctx'> 		printk(KERN_ERR "%s - tty_register_driver failed(%d)\n",</div><div class='ctx'> 			__func__, result);</div><div class='del'>-		return result;</div><div class='add'>+		goto err_free_tty;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* register this module as an usb driver */</div><div class='hunk'>@@ -3341,13 +3321,16 @@ static int __init hso_init(void)</div><div class='ctx'> 	if (result) {</div><div class='ctx'> 		printk(KERN_ERR "Could not register hso driver? error: %d\n",</div><div class='ctx'> 			result);</div><div class='del'>-		/* cleanup serial interface */</div><div class='del'>-		tty_unregister_driver(tty_drv);</div><div class='del'>-		return result;</div><div class='add'>+		goto err_unreg_tty;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* done */</div><div class='ctx'> 	return 0;</div><div class='add'>+err_unreg_tty:</div><div class='add'>+	tty_unregister_driver(tty_drv);</div><div class='add'>+err_free_tty:</div><div class='add'>+	put_tty_driver(tty_drv);</div><div class='add'>+	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit hso_exit(void)</div><div class='hunk'>@@ -3355,6 +3338,7 @@ static void __exit hso_exit(void)</div><div class='ctx'> 	printk(KERN_INFO "hso: unloaded\n");</div><div class='ctx'> </div><div class='ctx'> 	tty_unregister_driver(tty_drv);</div><div class='add'>+	put_tty_driver(tty_drv);</div><div class='ctx'> 	/* deregister the usb driver */</div><div class='ctx'> 	usb_deregister(&amp;hso_driver);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/usb/int51x1.c b/drivers/net/usb/int51x1.c<br/>index 12a22a453ff1..8de641713d5f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/int51x1.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/int51x1.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/int51x1.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/int51x1.c</a></div><div class='hunk'>@@ -236,6 +236,7 @@ static struct usb_driver int51x1_driver = {</div><div class='ctx'> 	.disconnect = usbnet_disconnect,</div><div class='ctx'> 	.suspend    = usbnet_suspend,</div><div class='ctx'> 	.resume     = usbnet_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(int51x1_driver);</div><div class='head'>diff --git a/drivers/net/usb/ipheth.c b/drivers/net/usb/ipheth.c<br/>index dd78c4cbd459..964031e3da87 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/ipheth.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/ipheth.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/ipheth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/ipheth.c</a></div><div class='hunk'>@@ -209,7 +209,8 @@ static void ipheth_rcvbulk_callback(struct urb *urb)</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		err("%s: urb status: %d", __func__, status);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "%s: urb status: %d\n",</div><div class='add'>+			__func__, status);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -222,7 +223,8 @@ static void ipheth_rcvbulk_callback(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	skb = dev_alloc_skb(len);</div><div class='ctx'> 	if (!skb) {</div><div class='del'>-		err("%s: dev_alloc_skb: -ENOMEM", __func__);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "%s: dev_alloc_skb: -ENOMEM\n",</div><div class='add'>+			__func__);</div><div class='ctx'> 		dev-&gt;net-&gt;stats.rx_dropped++;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -251,7 +253,8 @@ static void ipheth_sndbulk_callback(struct urb *urb)</div><div class='ctx'> 	    status != -ENOENT &amp;&amp;</div><div class='ctx'> 	    status != -ECONNRESET &amp;&amp;</div><div class='ctx'> 	    status != -ESHUTDOWN)</div><div class='del'>-		err("%s: urb status: %d", __func__, status);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "%s: urb status: %d\n",</div><div class='add'>+		__func__, status);</div><div class='ctx'> </div><div class='ctx'> 	dev_kfree_skb_irq(dev-&gt;tx_skb);</div><div class='ctx'> 	netif_wake_queue(dev-&gt;net);</div><div class='hunk'>@@ -271,7 +274,8 @@ static int ipheth_carrier_set(struct ipheth_device *dev)</div><div class='ctx'> 			dev-&gt;ctrl_buf, IPHETH_CTRL_BUF_SIZE,</div><div class='ctx'> 			IPHETH_CTRL_TIMEOUT);</div><div class='ctx'> 	if (retval &lt; 0) {</div><div class='del'>-		err("%s: usb_control_msg: %d", __func__, retval);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "%s: usb_control_msg: %d\n",</div><div class='add'>+			__func__, retval);</div><div class='ctx'> 		return retval;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -308,9 +312,11 @@ static int ipheth_get_macaddr(struct ipheth_device *dev)</div><div class='ctx'> 				 IPHETH_CTRL_BUF_SIZE,</div><div class='ctx'> 				 IPHETH_CTRL_TIMEOUT);</div><div class='ctx'> 	if (retval &lt; 0) {</div><div class='del'>-		err("%s: usb_control_msg: %d", __func__, retval);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "%s: usb_control_msg: %d\n",</div><div class='add'>+			__func__, retval);</div><div class='ctx'> 	} else if (retval &lt; ETH_ALEN) {</div><div class='del'>-		err("%s: usb_control_msg: short packet: %d bytes",</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"%s: usb_control_msg: short packet: %d bytes\n",</div><div class='ctx'> 			__func__, retval);</div><div class='ctx'> 		retval = -EINVAL;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -335,7 +341,8 @@ static int ipheth_rx_submit(struct ipheth_device *dev, gfp_t mem_flags)</div><div class='ctx'> </div><div class='ctx'> 	retval = usb_submit_urb(dev-&gt;rx_urb, mem_flags);</div><div class='ctx'> 	if (retval)</div><div class='del'>-		err("%s: usb_submit_urb: %d", __func__, retval);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "%s: usb_submit_urb: %d\n",</div><div class='add'>+			__func__, retval);</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -396,7 +403,8 @@ static int ipheth_tx(struct sk_buff *skb, struct net_device *net)</div><div class='ctx'> </div><div class='ctx'> 	retval = usb_submit_urb(dev-&gt;tx_urb, GFP_ATOMIC);</div><div class='ctx'> 	if (retval) {</div><div class='del'>-		err("%s: usb_submit_urb: %d", __func__, retval);</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "%s: usb_submit_urb: %d\n",</div><div class='add'>+			__func__, retval);</div><div class='ctx'> 		dev-&gt;net-&gt;stats.tx_errors++;</div><div class='ctx'> 		dev_kfree_skb_irq(skb);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -414,7 +422,7 @@ static void ipheth_tx_timeout(struct net_device *net)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipheth_device *dev = netdev_priv(net);</div><div class='ctx'> </div><div class='del'>-	err("%s: TX timeout", __func__);</div><div class='add'>+	dev_err(&amp;dev-&gt;intf-&gt;dev, "%s: TX timeout\n", __func__);</div><div class='ctx'> 	dev-&gt;net-&gt;stats.tx_errors++;</div><div class='ctx'> 	usb_unlink_urb(dev-&gt;tx_urb);</div><div class='ctx'> }</div><div class='hunk'>@@ -464,7 +472,7 @@ static int ipheth_probe(struct usb_interface *intf,</div><div class='ctx'> 	hintf = usb_altnum_to_altsetting(intf, IPHETH_ALT_INTFNUM);</div><div class='ctx'> 	if (hintf == NULL) {</div><div class='ctx'> 		retval = -ENODEV;</div><div class='del'>-		err("Unable to find alternate settings interface");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Unable to find alternate settings interface\n");</div><div class='ctx'> 		goto err_endpoints;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -477,7 +485,7 @@ static int ipheth_probe(struct usb_interface *intf,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!(dev-&gt;bulk_in &amp;&amp; dev-&gt;bulk_out)) {</div><div class='ctx'> 		retval = -ENODEV;</div><div class='del'>-		err("Unable to find endpoints");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Unable to find endpoints\n");</div><div class='ctx'> 		goto err_endpoints;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -495,7 +503,7 @@ static int ipheth_probe(struct usb_interface *intf,</div><div class='ctx'> </div><div class='ctx'> 	retval = ipheth_alloc_urbs(dev);</div><div class='ctx'> 	if (retval) {</div><div class='del'>-		err("error allocating urbs: %d", retval);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "error allocating urbs: %d\n", retval);</div><div class='ctx'> 		goto err_alloc_urbs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -506,7 +514,7 @@ static int ipheth_probe(struct usb_interface *intf,</div><div class='ctx'> </div><div class='ctx'> 	retval = register_netdev(netdev);</div><div class='ctx'> 	if (retval) {</div><div class='del'>-		err("error registering netdev: %d", retval);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "error registering netdev: %d\n", retval);</div><div class='ctx'> 		retval = -EIO;</div><div class='ctx'> 		goto err_register_netdev;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -546,6 +554,7 @@ static struct usb_driver ipheth_driver = {</div><div class='ctx'> 	.probe =	ipheth_probe,</div><div class='ctx'> 	.disconnect =	ipheth_disconnect,</div><div class='ctx'> 	.id_table =	ipheth_table,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(ipheth_driver);</div><div class='head'>diff --git a/drivers/net/usb/kalmia.c b/drivers/net/usb/kalmia.c<br/>index 7562649b3d6b..92c49e0a59ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/kalmia.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/kalmia.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/kalmia.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/kalmia.c</a></div><div class='hunk'>@@ -372,7 +372,8 @@ static struct usb_driver kalmia_driver = {</div><div class='ctx'> 	.probe = usbnet_probe,</div><div class='ctx'> 	.disconnect = usbnet_disconnect,</div><div class='ctx'> 	.suspend = usbnet_suspend,</div><div class='del'>-	.resume = usbnet_resume</div><div class='add'>+	.resume = usbnet_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(kalmia_driver);</div><div class='head'>diff --git a/drivers/net/usb/kaweth.c b/drivers/net/usb/kaweth.c<br/>index df2a2cf35a99..d8ad55284389 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/kaweth.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/kaweth.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/kaweth.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/kaweth.c</a></div><div class='hunk'>@@ -179,6 +179,7 @@ static struct usb_driver kaweth_driver = {</div><div class='ctx'> 	.resume =	kaweth_resume,</div><div class='ctx'> 	.id_table =     usb_klsi_table,</div><div class='ctx'> 	.supports_autosuspend =	1,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> typedef __u8 eth_addr_t[6];</div><div class='hunk'>@@ -400,12 +401,13 @@ static int kaweth_download_firmware(struct kaweth_device *kaweth,</div><div class='ctx'> </div><div class='ctx'> 	ret = request_firmware(&amp;fw, fwname, &amp;kaweth-&gt;dev-&gt;dev);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		err("Firmware request failed\n");</div><div class='add'>+		dev_err(&amp;kaweth-&gt;intf-&gt;dev, "Firmware request failed\n");</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (fw-&gt;size &gt; KAWETH_FIRMWARE_BUF_SIZE) {</div><div class='del'>-		err("Firmware too big: %zu", fw-&gt;size);</div><div class='add'>+		dev_err(&amp;kaweth-&gt;intf-&gt;dev, "Firmware too big: %zu\n",</div><div class='add'>+			fw-&gt;size);</div><div class='ctx'> 		release_firmware(fw);</div><div class='ctx'> 		return -ENOSPC;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -501,9 +503,10 @@ static void kaweth_resubmit_int_urb(struct kaweth_device *kaweth, gfp_t mf)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (status)</div><div class='del'>-		err ("can't resubmit intr, %s-%s, status %d",</div><div class='del'>-				kaweth-&gt;dev-&gt;bus-&gt;bus_name,</div><div class='del'>-				kaweth-&gt;dev-&gt;devpath, status);</div><div class='add'>+		dev_err(&amp;kaweth-&gt;intf-&gt;dev,</div><div class='add'>+			"can't resubmit intr, %s-%s, status %d\n",</div><div class='add'>+			kaweth-&gt;dev-&gt;bus-&gt;bus_name,</div><div class='add'>+			kaweth-&gt;dev-&gt;devpath, status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void int_callback(struct urb *u)</div><div class='hunk'>@@ -576,7 +579,8 @@ static int kaweth_resubmit_rx_urb(struct kaweth_device *kaweth,</div><div class='ctx'> 			kaweth-&gt;suspend_lowmem_rx = 1;</div><div class='ctx'> 			schedule_delayed_work(&amp;kaweth-&gt;lowmem_work, HZ/4);</div><div class='ctx'> 		}</div><div class='del'>-		err("resubmitting rx_urb %d failed", result);</div><div class='add'>+		dev_err(&amp;kaweth-&gt;intf-&gt;dev, "resubmitting rx_urb %d failed\n",</div><div class='add'>+			result);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		kaweth-&gt;suspend_lowmem_rx = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -634,20 +638,21 @@ static void kaweth_usb_receive(struct urb *urb)</div><div class='ctx'> 	spin_unlock(&amp;kaweth-&gt;device_lock);</div><div class='ctx'> </div><div class='ctx'> 	if(status &amp;&amp; status != -EREMOTEIO &amp;&amp; count != 1) {</div><div class='del'>-		err("%s RX status: %d count: %d packet_len: %d",</div><div class='del'>-                           net-&gt;name,</div><div class='del'>-			   status,</div><div class='del'>-			   count,</div><div class='del'>-			   (int)pkt_len);</div><div class='add'>+		dev_err(&amp;kaweth-&gt;intf-&gt;dev,</div><div class='add'>+			"%s RX status: %d count: %d packet_len: %d\n",</div><div class='add'>+			net-&gt;name, status, count, (int)pkt_len);</div><div class='ctx'> 		kaweth_resubmit_rx_urb(kaweth, GFP_ATOMIC);</div><div class='ctx'>                 return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if(kaweth-&gt;net &amp;&amp; (count &gt; 2)) {</div><div class='ctx'> 		if(pkt_len &gt; (count - 2)) {</div><div class='del'>-			err("Packet length too long for USB frame (pkt_len: %x, count: %x)",pkt_len, count);</div><div class='del'>-			err("Packet len &amp; 2047: %x", pkt_len &amp; 2047);</div><div class='del'>-			err("Count 2: %x", count2);</div><div class='add'>+			dev_err(&amp;kaweth-&gt;intf-&gt;dev,</div><div class='add'>+				"Packet length too long for USB frame (pkt_len: %x, count: %x)\n",</div><div class='add'>+				pkt_len, count);</div><div class='add'>+			dev_err(&amp;kaweth-&gt;intf-&gt;dev, "Packet len &amp; 2047: %x\n",</div><div class='add'>+				pkt_len &amp; 2047);</div><div class='add'>+			dev_err(&amp;kaweth-&gt;intf-&gt;dev, "Count 2: %x\n", count2);</div><div class='ctx'> 		        kaweth_resubmit_rx_urb(kaweth, GFP_ATOMIC);</div><div class='ctx'>                         return;</div><div class='ctx'>                 }</div><div class='hunk'>@@ -686,7 +691,7 @@ static int kaweth_open(struct net_device *net)</div><div class='ctx'> </div><div class='ctx'> 	res = usb_autopm_get_interface(kaweth-&gt;intf);</div><div class='ctx'> 	if (res) {</div><div class='del'>-		err("Interface cannot be resumed.");</div><div class='add'>+		dev_err(&amp;kaweth-&gt;intf-&gt;dev, "Interface cannot be resumed.\n");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> 	res = kaweth_resubmit_rx_urb(kaweth, GFP_KERNEL);</div><div class='hunk'>@@ -907,7 +912,8 @@ static void kaweth_async_set_rx_mode(struct kaweth_device *kaweth)</div><div class='ctx'> 				KAWETH_CONTROL_TIMEOUT);</div><div class='ctx'> </div><div class='ctx'> 	if(result &lt; 0) {</div><div class='del'>-		err("Failed to set Rx mode: %d", result);</div><div class='add'>+		dev_err(&amp;kaweth-&gt;intf-&gt;dev, "Failed to set Rx mode: %d\n",</div><div class='add'>+			result);</div><div class='ctx'> 	}</div><div class='ctx'> 	else {</div><div class='ctx'> 		dbg("Set Rx mode to %d", packet_filter_bitmap);</div><div class='hunk'>@@ -1045,7 +1051,8 @@ static int kaweth_probe(</div><div class='ctx'> 						      "kaweth/new_code.bin",</div><div class='ctx'> 						      100,</div><div class='ctx'> 						      2)) &lt; 0) {</div><div class='del'>-			err("Error downloading firmware (%d)", result);</div><div class='add'>+			dev_err(&amp;intf-&gt;dev, "Error downloading firmware (%d)\n",</div><div class='add'>+				result);</div><div class='ctx'> 			goto err_fw;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1053,7 +1060,9 @@ static int kaweth_probe(</div><div class='ctx'> 						      "kaweth/new_code_fix.bin",</div><div class='ctx'> 						      100,</div><div class='ctx'> 						      3)) &lt; 0) {</div><div class='del'>-			err("Error downloading firmware fix (%d)", result);</div><div class='add'>+			dev_err(&amp;intf-&gt;dev,</div><div class='add'>+				"Error downloading firmware fix (%d)\n",</div><div class='add'>+				result);</div><div class='ctx'> 			goto err_fw;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1061,7 +1070,9 @@ static int kaweth_probe(</div><div class='ctx'> 						      "kaweth/trigger_code.bin",</div><div class='ctx'> 						      126,</div><div class='ctx'> 						      2)) &lt; 0) {</div><div class='del'>-			err("Error downloading trigger code (%d)", result);</div><div class='add'>+			dev_err(&amp;intf-&gt;dev,</div><div class='add'>+				"Error downloading trigger code (%d)\n",</div><div class='add'>+				result);</div><div class='ctx'> 			goto err_fw;</div><div class='ctx'> </div><div class='ctx'> 		}</div><div class='hunk'>@@ -1070,13 +1081,14 @@ static int kaweth_probe(</div><div class='ctx'> 						      "kaweth/trigger_code_fix.bin",</div><div class='ctx'> 						      126,</div><div class='ctx'> 						      3)) &lt; 0) {</div><div class='del'>-			err("Error downloading trigger code fix (%d)", result);</div><div class='add'>+			dev_err(&amp;intf-&gt;dev, "Error downloading trigger code fix (%d)\n", result);</div><div class='ctx'> 			goto err_fw;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 		if ((result = kaweth_trigger_firmware(kaweth, 126)) &lt; 0) {</div><div class='del'>-			err("Error triggering firmware (%d)", result);</div><div class='add'>+			dev_err(&amp;intf-&gt;dev, "Error triggering firmware (%d)\n",</div><div class='add'>+				result);</div><div class='ctx'> 			goto err_fw;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1091,7 +1103,7 @@ err_fw:</div><div class='ctx'> 	result = kaweth_read_configuration(kaweth);</div><div class='ctx'> </div><div class='ctx'> 	if(result &lt; 0) {</div><div class='del'>-		err("Error reading configuration (%d), no net device created", result);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Error reading configuration (%d), no net device created\n", result);</div><div class='ctx'> 		goto err_free_netdev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1103,7 +1115,7 @@ err_fw:</div><div class='ctx'> 	if(!memcmp(&amp;kaweth-&gt;configuration.hw_addr,</div><div class='ctx'>                    &amp;bcast_addr,</div><div class='ctx'> 		   sizeof(bcast_addr))) {</div><div class='del'>-		err("Firmware not functioning properly, no net device created");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Firmware not functioning properly, no net device created\n");</div><div class='ctx'> 		goto err_free_netdev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1113,7 +1125,7 @@ err_fw:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if(kaweth_set_sofs_wait(kaweth, KAWETH_SOFS_TO_WAIT) &lt; 0) {</div><div class='del'>-		err("Error setting SOFS wait");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Error setting SOFS wait\n");</div><div class='ctx'> 		goto err_free_netdev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1123,7 +1135,7 @@ err_fw:</div><div class='ctx'>                                            KAWETH_PACKET_FILTER_MULTICAST);</div><div class='ctx'> </div><div class='ctx'> 	if(result &lt; 0) {</div><div class='del'>-		err("Error setting receive filter");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Error setting receive filter\n");</div><div class='ctx'> 		goto err_free_netdev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1175,7 +1187,7 @@ err_fw:</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;intf-&gt;dev);</div><div class='ctx'> 	if (register_netdev(netdev) != 0) {</div><div class='del'>-		err("Error registering netdev.");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Error registering netdev.\n");</div><div class='ctx'> 		goto err_intfdata;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/usb/lg-vl600.c b/drivers/net/usb/lg-vl600.c<br/>index 45a981fde43f..808d6506da41 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/lg-vl600.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/lg-vl600.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/lg-vl600.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/lg-vl600.c</a></div><div class='hunk'>@@ -344,6 +344,7 @@ static struct usb_driver lg_vl600_driver = {</div><div class='ctx'> 	.disconnect	= usbnet_disconnect,</div><div class='ctx'> 	.suspend	= usbnet_suspend,</div><div class='ctx'> 	.resume		= usbnet_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(lg_vl600_driver);</div><div class='head'>diff --git a/drivers/net/usb/mcs7830.c b/drivers/net/usb/mcs7830.c<br/>index c434b6ba0337..03c2d8d653df 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/mcs7830.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/mcs7830.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/mcs7830.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/mcs7830.c</a></div><div class='hunk'>@@ -629,11 +629,31 @@ static int mcs7830_rx_fixup(struct usbnet *dev, struct sk_buff *skb)</div><div class='ctx'> 	return skb-&gt;len &gt; 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mcs7830_status(struct usbnet *dev, struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	u8 *buf = urb-&gt;transfer_buffer;</div><div class='add'>+	bool link;</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;actual_length &lt; 16)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	link = !(buf[1] &amp; 0x20);</div><div class='add'>+	if (netif_carrier_ok(dev-&gt;net) != link) {</div><div class='add'>+		if (link) {</div><div class='add'>+			netif_carrier_on(dev-&gt;net);</div><div class='add'>+			usbnet_defer_kevent(dev, EVENT_LINK_RESET);</div><div class='add'>+		} else</div><div class='add'>+			netif_carrier_off(dev-&gt;net);</div><div class='add'>+		netdev_dbg(dev-&gt;net, "Link Status is: %d\n", link);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct driver_info moschip_info = {</div><div class='ctx'> 	.description	= "MOSCHIP 7830/7832/7730 usb-NET adapter",</div><div class='ctx'> 	.bind		= mcs7830_bind,</div><div class='ctx'> 	.rx_fixup	= mcs7830_rx_fixup,</div><div class='del'>-	.flags		= FLAG_ETHER,</div><div class='add'>+	.flags		= FLAG_ETHER | FLAG_LINK_INTR,</div><div class='add'>+	.status		= mcs7830_status,</div><div class='ctx'> 	.in		= 1,</div><div class='ctx'> 	.out		= 2,</div><div class='ctx'> };</div><div class='hunk'>@@ -642,7 +662,8 @@ static const struct driver_info sitecom_info = {</div><div class='ctx'> 	.description    = "Sitecom LN-30 usb-NET adapter",</div><div class='ctx'> 	.bind		= mcs7830_bind,</div><div class='ctx'> 	.rx_fixup	= mcs7830_rx_fixup,</div><div class='del'>-	.flags		= FLAG_ETHER,</div><div class='add'>+	.flags		= FLAG_ETHER | FLAG_LINK_INTR,</div><div class='add'>+	.status		= mcs7830_status,</div><div class='ctx'> 	.in		= 1,</div><div class='ctx'> 	.out		= 2,</div><div class='ctx'> };</div><div class='hunk'>@@ -690,6 +711,7 @@ static struct usb_driver mcs7830_driver = {</div><div class='ctx'> 	.suspend = usbnet_suspend,</div><div class='ctx'> 	.resume = usbnet_resume,</div><div class='ctx'> 	.reset_resume = mcs7830_reset_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(mcs7830_driver);</div><div class='head'>diff --git a/drivers/net/usb/net1080.c b/drivers/net/usb/net1080.c<br/>index 83f965cb69e7..28c4d513ba85 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/net1080.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/net1080.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/net1080.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/net1080.c</a></div><div class='hunk'>@@ -587,6 +587,7 @@ static struct usb_driver net1080_driver = {</div><div class='ctx'> 	.disconnect =	usbnet_disconnect,</div><div class='ctx'> 	.suspend =	usbnet_suspend,</div><div class='ctx'> 	.resume =	usbnet_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(net1080_driver);</div><div class='head'>diff --git a/drivers/net/usb/pegasus.c b/drivers/net/usb/pegasus.c<br/>index 752393092325..7023220456c5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/pegasus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/pegasus.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/pegasus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/pegasus.c</a></div><div class='hunk'>@@ -1489,6 +1489,7 @@ static struct usb_driver pegasus_driver = {</div><div class='ctx'> 	.id_table = pegasus_ids,</div><div class='ctx'> 	.suspend = pegasus_suspend,</div><div class='ctx'> 	.resume = pegasus_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __init parse_id(char *id)</div><div class='head'>diff --git a/drivers/net/usb/plusb.c b/drivers/net/usb/plusb.c<br/>index b2b035e29978..4584b9a805b3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/plusb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/plusb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/plusb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/plusb.c</a></div><div class='hunk'>@@ -152,6 +152,7 @@ static struct usb_driver plusb_driver = {</div><div class='ctx'> 	.disconnect =	usbnet_disconnect,</div><div class='ctx'> 	.suspend =	usbnet_suspend,</div><div class='ctx'> 	.resume =	usbnet_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(plusb_driver);</div><div class='head'>diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c<br/>index d316503b35d4..3b206786b5e7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/qmi_wwan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/qmi_wwan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/qmi_wwan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/qmi_wwan.c</a></div><div class='hunk'>@@ -356,10 +356,19 @@ static const struct driver_info	qmi_wwan_gobi = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* ZTE suck at making USB descriptors */</div><div class='add'>+static const struct driver_info	qmi_wwan_force_int1 = {</div><div class='add'>+	.description	= "Qualcomm WWAN/QMI device",</div><div class='add'>+	.flags		= FLAG_WWAN,</div><div class='add'>+	.bind		= qmi_wwan_bind_shared,</div><div class='add'>+	.unbind		= qmi_wwan_unbind_shared,</div><div class='add'>+	.manage_power	= qmi_wwan_manage_power,</div><div class='add'>+	.data		= BIT(1), /* interface whitelist bitmap */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct driver_info	qmi_wwan_force_int4 = {</div><div class='del'>-	.description	= "Qualcomm Gobi wwan/QMI device",</div><div class='add'>+	.description	= "Qualcomm WWAN/QMI device",</div><div class='ctx'> 	.flags		= FLAG_WWAN,</div><div class='del'>-	.bind		= qmi_wwan_bind_gobi,</div><div class='add'>+	.bind		= qmi_wwan_bind_shared,</div><div class='ctx'> 	.unbind		= qmi_wwan_unbind_shared,</div><div class='ctx'> 	.manage_power	= qmi_wwan_manage_power,</div><div class='ctx'> 	.data		= BIT(4), /* interface whitelist bitmap */</div><div class='hunk'>@@ -401,6 +410,14 @@ static const struct usb_device_id products[] = {</div><div class='ctx'> 		.bInterfaceProtocol = 8, /* NOTE: This is the *slave* interface of the CDC Union! */</div><div class='ctx'> 		.driver_info        = (unsigned long)&amp;qmi_wwan_info,</div><div class='ctx'> 	},</div><div class='add'>+	{	/* Vodafone/Huawei K5005 (12d1:14c8) and similar modems */</div><div class='add'>+		.match_flags        = USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_INT_INFO,</div><div class='add'>+		.idVendor           = HUAWEI_VENDOR_ID,</div><div class='add'>+		.bInterfaceClass    = USB_CLASS_VENDOR_SPEC,</div><div class='add'>+		.bInterfaceSubClass = 1,</div><div class='add'>+		.bInterfaceProtocol = 56, /* NOTE: This is the *slave* interface of the CDC Union! */</div><div class='add'>+		.driver_info        = (unsigned long)&amp;qmi_wwan_info,</div><div class='add'>+	},</div><div class='ctx'> 	{	/* Huawei E392, E398 and possibly others in "Windows mode"</div><div class='ctx'> 		 * using a combined control and data interface without any CDC</div><div class='ctx'> 		 * functional descriptors</div><div class='hunk'>@@ -430,6 +447,15 @@ static const struct usb_device_id products[] = {</div><div class='ctx'> 		.bInterfaceProtocol = 0xff,</div><div class='ctx'> 		.driver_info        = (unsigned long)&amp;qmi_wwan_force_int4,</div><div class='ctx'> 	},</div><div class='add'>+	{	/* ZTE (Vodafone) K3520-Z */</div><div class='add'>+		.match_flags	    = USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_INT_INFO,</div><div class='add'>+		.idVendor           = 0x19d2,</div><div class='add'>+		.idProduct          = 0x0055,</div><div class='add'>+		.bInterfaceClass    = 0xff,</div><div class='add'>+		.bInterfaceSubClass = 0xff,</div><div class='add'>+		.bInterfaceProtocol = 0xff,</div><div class='add'>+		.driver_info        = (unsigned long)&amp;qmi_wwan_force_int1,</div><div class='add'>+	},</div><div class='ctx'> 	{	/* ZTE (Vodafone) K3565-Z */</div><div class='ctx'> 		.match_flags	    = USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_INT_INFO,</div><div class='ctx'> 		.idVendor           = 0x19d2,</div><div class='hunk'>@@ -457,6 +483,15 @@ static const struct usb_device_id products[] = {</div><div class='ctx'> 		.bInterfaceProtocol = 0xff,</div><div class='ctx'> 		.driver_info        = (unsigned long)&amp;qmi_wwan_force_int4,</div><div class='ctx'> 	},</div><div class='add'>+	{	/* ZTE (Vodafone) K3765-Z */</div><div class='add'>+		.match_flags	    = USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_INT_INFO,</div><div class='add'>+		.idVendor           = 0x19d2,</div><div class='add'>+		.idProduct          = 0x2002,</div><div class='add'>+		.bInterfaceClass    = 0xff,</div><div class='add'>+		.bInterfaceSubClass = 0xff,</div><div class='add'>+		.bInterfaceProtocol = 0xff,</div><div class='add'>+		.driver_info        = (unsigned long)&amp;qmi_wwan_force_int4,</div><div class='add'>+	},</div><div class='ctx'> 	{	/* ZTE (Vodafone) K4505-Z */</div><div class='ctx'> 		.match_flags	    = USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_INT_INFO,</div><div class='ctx'> 		.idVendor           = 0x19d2,</div><div class='hunk'>@@ -512,6 +547,8 @@ static const struct usb_device_id products[] = {</div><div class='ctx'> 	{QMI_GOBI_DEVICE(0x16d8, 0x8002)},	/* CMDTech Gobi 2000 Modem device (VU922) */</div><div class='ctx'> 	{QMI_GOBI_DEVICE(0x05c6, 0x9205)},	/* Gobi 2000 Modem device */</div><div class='ctx'> 	{QMI_GOBI_DEVICE(0x1199, 0x9013)},	/* Sierra Wireless Gobi 3000 Modem device (MC8355) */</div><div class='add'>+	{QMI_GOBI_DEVICE(0x1199, 0x9015)},	/* Sierra Wireless Gobi 3000 Modem device */</div><div class='add'>+	{QMI_GOBI_DEVICE(0x1199, 0x9019)},	/* Sierra Wireless Gobi 3000 Modem device */</div><div class='ctx'> 	{ }					/* END */</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(usb, products);</div><div class='hunk'>@@ -525,6 +562,7 @@ static struct usb_driver qmi_wwan_driver = {</div><div class='ctx'> 	.resume		      =	qmi_wwan_resume,</div><div class='ctx'> 	.reset_resume         = qmi_wwan_resume,</div><div class='ctx'> 	.supports_autosuspend = 1,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init qmi_wwan_init(void)</div><div class='head'>diff --git a/drivers/net/usb/rndis_host.c b/drivers/net/usb/rndis_host.c<br/>index c8f1b5b3aff3..4a4335833c36 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/rndis_host.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/rndis_host.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/rndis_host.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/rndis_host.c</a></div><div class='hunk'>@@ -77,7 +77,9 @@ static void rndis_msg_indicate(struct usbnet *dev, struct rndis_indicate *msg,</div><div class='ctx'> 	if (dev-&gt;driver_info-&gt;indication) {</div><div class='ctx'> 		dev-&gt;driver_info-&gt;indication(dev, msg, buflen);</div><div class='ctx'> 	} else {</div><div class='del'>-		switch (msg-&gt;status) {</div><div class='add'>+		u32 status = le32_to_cpu(msg-&gt;status);</div><div class='add'>+</div><div class='add'>+		switch (status) {</div><div class='ctx'> 		case RNDIS_STATUS_MEDIA_CONNECT:</div><div class='ctx'> 			dev_info(udev, "rndis media connect\n");</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -85,8 +87,7 @@ static void rndis_msg_indicate(struct usbnet *dev, struct rndis_indicate *msg,</div><div class='ctx'> 			dev_info(udev, "rndis media disconnect\n");</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			dev_info(udev, "rndis indication: 0x%08x\n",</div><div class='del'>-					le32_to_cpu(msg-&gt;status));</div><div class='add'>+			dev_info(udev, "rndis indication: 0x%08x\n", status);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -109,16 +110,17 @@ int rndis_command(struct usbnet *dev, struct rndis_msg_hdr *buf, int buflen)</div><div class='ctx'> 	int			retval;</div><div class='ctx'> 	int			partial;</div><div class='ctx'> 	unsigned		count;</div><div class='del'>-	__le32			rsp;</div><div class='del'>-	u32			xid = 0, msg_len, request_id;</div><div class='add'>+	u32			xid = 0, msg_len, request_id, msg_type, rsp,</div><div class='add'>+				status;</div><div class='ctx'> </div><div class='ctx'> 	/* REVISIT when this gets called from contexts other than probe() or</div><div class='ctx'> 	 * disconnect(): either serialize, or dispatch responses on xid</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='add'>+	msg_type = le32_to_cpu(buf-&gt;msg_type);</div><div class='add'>+</div><div class='ctx'> 	/* Issue the request; xid is unique, don't bother byteswapping it */</div><div class='del'>-	if (likely(buf-&gt;msg_type != RNDIS_MSG_HALT &amp;&amp;</div><div class='del'>-		   buf-&gt;msg_type != RNDIS_MSG_RESET)) {</div><div class='add'>+	if (likely(msg_type != RNDIS_MSG_HALT &amp;&amp; msg_type != RNDIS_MSG_RESET)) {</div><div class='ctx'> 		xid = dev-&gt;xid++;</div><div class='ctx'> 		if (!xid)</div><div class='ctx'> 			xid = dev-&gt;xid++;</div><div class='hunk'>@@ -149,7 +151,7 @@ int rndis_command(struct usbnet *dev, struct rndis_msg_hdr *buf, int buflen)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Poll the control channel; the request probably completed immediately */</div><div class='del'>-	rsp = buf-&gt;msg_type | RNDIS_MSG_COMPLETION;</div><div class='add'>+	rsp = le32_to_cpu(buf-&gt;msg_type) | RNDIS_MSG_COMPLETION;</div><div class='ctx'> 	for (count = 0; count &lt; 10; count++) {</div><div class='ctx'> 		memset(buf, 0, CONTROL_BUFFER_SIZE);</div><div class='ctx'> 		retval = usb_control_msg(dev-&gt;udev,</div><div class='hunk'>@@ -160,35 +162,36 @@ int rndis_command(struct usbnet *dev, struct rndis_msg_hdr *buf, int buflen)</div><div class='ctx'> 			buf, buflen,</div><div class='ctx'> 			RNDIS_CONTROL_TIMEOUT_MS);</div><div class='ctx'> 		if (likely(retval &gt;= 8)) {</div><div class='add'>+			msg_type = le32_to_cpu(buf-&gt;msg_type);</div><div class='ctx'> 			msg_len = le32_to_cpu(buf-&gt;msg_len);</div><div class='add'>+			status = le32_to_cpu(buf-&gt;status);</div><div class='ctx'> 			request_id = (__force u32) buf-&gt;request_id;</div><div class='del'>-			if (likely(buf-&gt;msg_type == rsp)) {</div><div class='add'>+			if (likely(msg_type == rsp)) {</div><div class='ctx'> 				if (likely(request_id == xid)) {</div><div class='ctx'> 					if (unlikely(rsp == RNDIS_MSG_RESET_C))</div><div class='ctx'> 						return 0;</div><div class='del'>-					if (likely(RNDIS_STATUS_SUCCESS</div><div class='del'>-							== buf-&gt;status))</div><div class='add'>+					if (likely(RNDIS_STATUS_SUCCESS ==</div><div class='add'>+							status))</div><div class='ctx'> 						return 0;</div><div class='ctx'> 					dev_dbg(&amp;info-&gt;control-&gt;dev,</div><div class='ctx'> 						"rndis reply status %08x\n",</div><div class='del'>-						le32_to_cpu(buf-&gt;status));</div><div class='add'>+						status);</div><div class='ctx'> 					return -EL3RST;</div><div class='ctx'> 				}</div><div class='ctx'> 				dev_dbg(&amp;info-&gt;control-&gt;dev,</div><div class='ctx'> 					"rndis reply id %d expected %d\n",</div><div class='ctx'> 					request_id, xid);</div><div class='ctx'> 				/* then likely retry */</div><div class='del'>-			} else switch (buf-&gt;msg_type) {</div><div class='del'>-			case RNDIS_MSG_INDICATE:	/* fault/event */</div><div class='add'>+			} else switch (msg_type) {</div><div class='add'>+			case RNDIS_MSG_INDICATE: /* fault/event */</div><div class='ctx'> 				rndis_msg_indicate(dev, (void *)buf, buflen);</div><div class='del'>-</div><div class='ctx'> 				break;</div><div class='del'>-			case RNDIS_MSG_KEEPALIVE: {	/* ping */</div><div class='add'>+			case RNDIS_MSG_KEEPALIVE: { /* ping */</div><div class='ctx'> 				struct rndis_keepalive_c *msg = (void *)buf;</div><div class='ctx'> </div><div class='del'>-				msg-&gt;msg_type = RNDIS_MSG_KEEPALIVE_C;</div><div class='add'>+				msg-&gt;msg_type = cpu_to_le32(RNDIS_MSG_KEEPALIVE_C);</div><div class='ctx'> 				msg-&gt;msg_len = cpu_to_le32(sizeof *msg);</div><div class='del'>-				msg-&gt;status = RNDIS_STATUS_SUCCESS;</div><div class='add'>+				msg-&gt;status = cpu_to_le32(RNDIS_STATUS_SUCCESS);</div><div class='ctx'> 				retval = usb_control_msg(dev-&gt;udev,</div><div class='ctx'> 					usb_sndctrlpipe(dev-&gt;udev, 0),</div><div class='ctx'> 					USB_CDC_SEND_ENCAPSULATED_COMMAND,</div><div class='hunk'>@@ -236,7 +239,7 @@ EXPORT_SYMBOL_GPL(rndis_command);</div><div class='ctx'>  * ActiveSync 4.1 Windows driver.</div><div class='ctx'>  */</div><div class='ctx'> static int rndis_query(struct usbnet *dev, struct usb_interface *intf,</div><div class='del'>-		void *buf, __le32 oid, u32 in_len,</div><div class='add'>+		void *buf, u32 oid, u32 in_len,</div><div class='ctx'> 		void **reply, int *reply_len)</div><div class='ctx'> {</div><div class='ctx'> 	int retval;</div><div class='hunk'>@@ -251,9 +254,9 @@ static int rndis_query(struct usbnet *dev, struct usb_interface *intf,</div><div class='ctx'> 	u.buf = buf;</div><div class='ctx'> </div><div class='ctx'> 	memset(u.get, 0, sizeof *u.get + in_len);</div><div class='del'>-	u.get-&gt;msg_type = RNDIS_MSG_QUERY;</div><div class='add'>+	u.get-&gt;msg_type = cpu_to_le32(RNDIS_MSG_QUERY);</div><div class='ctx'> 	u.get-&gt;msg_len = cpu_to_le32(sizeof *u.get + in_len);</div><div class='del'>-	u.get-&gt;oid = oid;</div><div class='add'>+	u.get-&gt;oid = cpu_to_le32(oid);</div><div class='ctx'> 	u.get-&gt;len = cpu_to_le32(in_len);</div><div class='ctx'> 	u.get-&gt;offset = cpu_to_le32(20);</div><div class='ctx'> </div><div class='hunk'>@@ -324,7 +327,7 @@ generic_rndis_bind(struct usbnet *dev, struct usb_interface *intf, int flags)</div><div class='ctx'> 	if (retval &lt; 0)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='del'>-	u.init-&gt;msg_type = RNDIS_MSG_INIT;</div><div class='add'>+	u.init-&gt;msg_type = cpu_to_le32(RNDIS_MSG_INIT);</div><div class='ctx'> 	u.init-&gt;msg_len = cpu_to_le32(sizeof *u.init);</div><div class='ctx'> 	u.init-&gt;major_version = cpu_to_le32(1);</div><div class='ctx'> 	u.init-&gt;minor_version = cpu_to_le32(0);</div><div class='hunk'>@@ -395,22 +398,23 @@ generic_rndis_bind(struct usbnet *dev, struct usb_interface *intf, int flags)</div><div class='ctx'> 	/* Check physical medium */</div><div class='ctx'> 	phym = NULL;</div><div class='ctx'> 	reply_len = sizeof *phym;</div><div class='del'>-	retval = rndis_query(dev, intf, u.buf, OID_GEN_PHYSICAL_MEDIUM,</div><div class='del'>-			0, (void **) &amp;phym, &amp;reply_len);</div><div class='add'>+	retval = rndis_query(dev, intf, u.buf,</div><div class='add'>+			     RNDIS_OID_GEN_PHYSICAL_MEDIUM,</div><div class='add'>+			     0, (void **) &amp;phym, &amp;reply_len);</div><div class='ctx'> 	if (retval != 0 || !phym) {</div><div class='ctx'> 		/* OID is optional so don't fail here. */</div><div class='del'>-		phym_unspec = RNDIS_PHYSICAL_MEDIUM_UNSPECIFIED;</div><div class='add'>+		phym_unspec = cpu_to_le32(RNDIS_PHYSICAL_MEDIUM_UNSPECIFIED);</div><div class='ctx'> 		phym = &amp;phym_unspec;</div><div class='ctx'> 	}</div><div class='ctx'> 	if ((flags &amp; FLAG_RNDIS_PHYM_WIRELESS) &amp;&amp;</div><div class='del'>-			*phym != RNDIS_PHYSICAL_MEDIUM_WIRELESS_LAN) {</div><div class='add'>+	    le32_to_cpup(phym) != RNDIS_PHYSICAL_MEDIUM_WIRELESS_LAN) {</div><div class='ctx'> 		netif_dbg(dev, probe, dev-&gt;net,</div><div class='ctx'> 			  "driver requires wireless physical medium, but device is not\n");</div><div class='ctx'> 		retval = -ENODEV;</div><div class='ctx'> 		goto halt_fail_and_release;</div><div class='ctx'> 	}</div><div class='ctx'> 	if ((flags &amp; FLAG_RNDIS_PHYM_NOT_WIRELESS) &amp;&amp;</div><div class='del'>-			*phym == RNDIS_PHYSICAL_MEDIUM_WIRELESS_LAN) {</div><div class='add'>+	    le32_to_cpup(phym) == RNDIS_PHYSICAL_MEDIUM_WIRELESS_LAN) {</div><div class='ctx'> 		netif_dbg(dev, probe, dev-&gt;net,</div><div class='ctx'> 			  "driver requires non-wireless physical medium, but device is wireless.\n");</div><div class='ctx'> 		retval = -ENODEV;</div><div class='hunk'>@@ -419,8 +423,9 @@ generic_rndis_bind(struct usbnet *dev, struct usb_interface *intf, int flags)</div><div class='ctx'> </div><div class='ctx'> 	/* Get designated host ethernet address */</div><div class='ctx'> 	reply_len = ETH_ALEN;</div><div class='del'>-	retval = rndis_query(dev, intf, u.buf, OID_802_3_PERMANENT_ADDRESS,</div><div class='del'>-			48, (void **) &amp;bp, &amp;reply_len);</div><div class='add'>+	retval = rndis_query(dev, intf, u.buf,</div><div class='add'>+			     RNDIS_OID_802_3_PERMANENT_ADDRESS,</div><div class='add'>+			     48, (void **) &amp;bp, &amp;reply_len);</div><div class='ctx'> 	if (unlikely(retval&lt; 0)) {</div><div class='ctx'> 		dev_err(&amp;intf-&gt;dev, "rndis get ethaddr, %d\n", retval);</div><div class='ctx'> 		goto halt_fail_and_release;</div><div class='hunk'>@@ -430,12 +435,12 @@ generic_rndis_bind(struct usbnet *dev, struct usb_interface *intf, int flags)</div><div class='ctx'> </div><div class='ctx'> 	/* set a nonzero filter to enable data transfers */</div><div class='ctx'> 	memset(u.set, 0, sizeof *u.set);</div><div class='del'>-	u.set-&gt;msg_type = RNDIS_MSG_SET;</div><div class='add'>+	u.set-&gt;msg_type = cpu_to_le32(RNDIS_MSG_SET);</div><div class='ctx'> 	u.set-&gt;msg_len = cpu_to_le32(4 + sizeof *u.set);</div><div class='del'>-	u.set-&gt;oid = OID_GEN_CURRENT_PACKET_FILTER;</div><div class='add'>+	u.set-&gt;oid = cpu_to_le32(RNDIS_OID_GEN_CURRENT_PACKET_FILTER);</div><div class='ctx'> 	u.set-&gt;len = cpu_to_le32(4);</div><div class='ctx'> 	u.set-&gt;offset = cpu_to_le32((sizeof *u.set) - 8);</div><div class='del'>-	*(__le32 *)(u.buf + sizeof *u.set) = RNDIS_DEFAULT_FILTER;</div><div class='add'>+	*(__le32 *)(u.buf + sizeof *u.set) = cpu_to_le32(RNDIS_DEFAULT_FILTER);</div><div class='ctx'> </div><div class='ctx'> 	retval = rndis_command(dev, u.header, CONTROL_BUFFER_SIZE);</div><div class='ctx'> 	if (unlikely(retval &lt; 0)) {</div><div class='hunk'>@@ -450,7 +455,7 @@ generic_rndis_bind(struct usbnet *dev, struct usb_interface *intf, int flags)</div><div class='ctx'> </div><div class='ctx'> halt_fail_and_release:</div><div class='ctx'> 	memset(u.halt, 0, sizeof *u.halt);</div><div class='del'>-	u.halt-&gt;msg_type = RNDIS_MSG_HALT;</div><div class='add'>+	u.halt-&gt;msg_type = cpu_to_le32(RNDIS_MSG_HALT);</div><div class='ctx'> 	u.halt-&gt;msg_len = cpu_to_le32(sizeof *u.halt);</div><div class='ctx'> 	(void) rndis_command(dev, (void *)u.halt, CONTROL_BUFFER_SIZE);</div><div class='ctx'> fail_and_release:</div><div class='hunk'>@@ -475,7 +480,7 @@ void rndis_unbind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 	/* try to clear any rndis state/activity (no i/o from stack!) */</div><div class='ctx'> 	halt = kzalloc(CONTROL_BUFFER_SIZE, GFP_KERNEL);</div><div class='ctx'> 	if (halt) {</div><div class='del'>-		halt-&gt;msg_type = RNDIS_MSG_HALT;</div><div class='add'>+		halt-&gt;msg_type = cpu_to_le32(RNDIS_MSG_HALT);</div><div class='ctx'> 		halt-&gt;msg_len = cpu_to_le32(sizeof *halt);</div><div class='ctx'> 		(void) rndis_command(dev, (void *)halt, CONTROL_BUFFER_SIZE);</div><div class='ctx'> 		kfree(halt);</div><div class='hunk'>@@ -494,16 +499,16 @@ int rndis_rx_fixup(struct usbnet *dev, struct sk_buff *skb)</div><div class='ctx'> 	while (likely(skb-&gt;len)) {</div><div class='ctx'> 		struct rndis_data_hdr	*hdr = (void *)skb-&gt;data;</div><div class='ctx'> 		struct sk_buff		*skb2;</div><div class='del'>-		u32			msg_len, data_offset, data_len;</div><div class='add'>+		u32			msg_type, msg_len, data_offset, data_len;</div><div class='ctx'> </div><div class='add'>+		msg_type = le32_to_cpu(hdr-&gt;msg_type);</div><div class='ctx'> 		msg_len = le32_to_cpu(hdr-&gt;msg_len);</div><div class='ctx'> 		data_offset = le32_to_cpu(hdr-&gt;data_offset);</div><div class='ctx'> 		data_len = le32_to_cpu(hdr-&gt;data_len);</div><div class='ctx'> </div><div class='ctx'> 		/* don't choke if we see oob, per-packet data, etc */</div><div class='del'>-		if (unlikely(hdr-&gt;msg_type != RNDIS_MSG_PACKET ||</div><div class='del'>-			     skb-&gt;len &lt; msg_len ||</div><div class='del'>-			     (data_offset + data_len + 8) &gt; msg_len)) {</div><div class='add'>+		if (unlikely(msg_type != RNDIS_MSG_PACKET || skb-&gt;len &lt; msg_len</div><div class='add'>+				|| (data_offset + data_len + 8) &gt; msg_len)) {</div><div class='ctx'> 			dev-&gt;net-&gt;stats.rx_frame_errors++;</div><div class='ctx'> 			netdev_dbg(dev-&gt;net, "bad rndis message %d/%d/%d/%d, len %d\n",</div><div class='ctx'> 				   le32_to_cpu(hdr-&gt;msg_type),</div><div class='hunk'>@@ -569,7 +574,7 @@ rndis_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)</div><div class='ctx'> fill:</div><div class='ctx'> 	hdr = (void *) __skb_push(skb, sizeof *hdr);</div><div class='ctx'> 	memset(hdr, 0, sizeof *hdr);</div><div class='del'>-	hdr-&gt;msg_type = RNDIS_MSG_PACKET;</div><div class='add'>+	hdr-&gt;msg_type = cpu_to_le32(RNDIS_MSG_PACKET);</div><div class='ctx'> 	hdr-&gt;msg_len = cpu_to_le32(skb-&gt;len);</div><div class='ctx'> 	hdr-&gt;data_offset = cpu_to_le32(sizeof(*hdr) - 8);</div><div class='ctx'> 	hdr-&gt;data_len = cpu_to_le32(len);</div><div class='hunk'>@@ -633,6 +638,7 @@ static struct usb_driver rndis_driver = {</div><div class='ctx'> 	.disconnect =	usbnet_disconnect,</div><div class='ctx'> 	.suspend =	usbnet_suspend,</div><div class='ctx'> 	.resume =	usbnet_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(rndis_driver);</div><div class='head'>diff --git a/drivers/net/usb/rtl8150.c b/drivers/net/usb/rtl8150.c<br/>index d363b31053da..0e2c92e0e532 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/rtl8150.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/rtl8150.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/rtl8150.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/rtl8150.c</a></div><div class='hunk'>@@ -203,7 +203,8 @@ static int async_set_registers(rtl8150_t * dev, u16 indx, u16 size)</div><div class='ctx'> 	if ((ret = usb_submit_urb(dev-&gt;ctrl_urb, GFP_ATOMIC))) {</div><div class='ctx'> 		if (ret == -ENODEV)</div><div class='ctx'> 			netif_device_detach(dev-&gt;netdev);</div><div class='del'>-		err("control request submission failed: %d", ret);</div><div class='add'>+		dev_err(&amp;dev-&gt;udev-&gt;dev,</div><div class='add'>+			"control request submission failed: %d\n", ret);</div><div class='ctx'> 	} else</div><div class='ctx'> 		set_bit(RX_REG_SET, &amp;dev-&gt;flags);</div><div class='ctx'> </div><div class='hunk'>@@ -516,9 +517,9 @@ resubmit:</div><div class='ctx'> 	if (res == -ENODEV)</div><div class='ctx'> 		netif_device_detach(dev-&gt;netdev);</div><div class='ctx'> 	else if (res)</div><div class='del'>-		err ("can't resubmit intr, %s-%s/input0, status %d",</div><div class='del'>-				dev-&gt;udev-&gt;bus-&gt;bus_name,</div><div class='del'>-				dev-&gt;udev-&gt;devpath, res);</div><div class='add'>+		dev_err(&amp;dev-&gt;udev-&gt;dev,</div><div class='add'>+			"can't resubmit intr, %s-%s/input0, status %d\n",</div><div class='add'>+			dev-&gt;udev-&gt;bus-&gt;bus_name, dev-&gt;udev-&gt;devpath, res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rtl8150_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='hunk'>@@ -890,11 +891,11 @@ static int rtl8150_probe(struct usb_interface *intf,</div><div class='ctx'> 	dev-&gt;intr_interval = 100;	/* 100ms */</div><div class='ctx'> </div><div class='ctx'> 	if (!alloc_all_urbs(dev)) {</div><div class='del'>-		err("out of memory");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "out of memory\n");</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!rtl8150_reset(dev)) {</div><div class='del'>-		err("couldn't reset the device");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "couldn't reset the device\n");</div><div class='ctx'> 		goto out1;</div><div class='ctx'> 	}</div><div class='ctx'> 	fill_skb_pool(dev);</div><div class='hunk'>@@ -903,7 +904,7 @@ static int rtl8150_probe(struct usb_interface *intf,</div><div class='ctx'> 	usb_set_intfdata(intf, dev);</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;intf-&gt;dev);</div><div class='ctx'> 	if (register_netdev(netdev) != 0) {</div><div class='del'>-		err("couldn't register the device");</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "couldn't register the device\n");</div><div class='ctx'> 		goto out2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -947,7 +948,8 @@ static struct usb_driver rtl8150_driver = {</div><div class='ctx'> 	.disconnect	= rtl8150_disconnect,</div><div class='ctx'> 	.id_table	= rtl8150_table,</div><div class='ctx'> 	.suspend	= rtl8150_suspend,</div><div class='del'>-	.resume		= rtl8150_resume</div><div class='add'>+	.resume		= rtl8150_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(rtl8150_driver);</div><div class='head'>diff --git a/drivers/net/usb/sierra_net.c b/drivers/net/usb/sierra_net.c<br/>index b59cf20c7817..3faef5670d1f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/sierra_net.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/sierra_net.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/sierra_net.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/sierra_net.c</a></div><div class='hunk'>@@ -982,6 +982,7 @@ static struct usb_driver sierra_net_driver = {</div><div class='ctx'> 	.suspend = usbnet_suspend,</div><div class='ctx'> 	.resume = usbnet_resume,</div><div class='ctx'> 	.no_dynamic_id = 1,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(sierra_net_driver);</div><div class='head'>diff --git a/drivers/net/usb/smsc75xx.c b/drivers/net/usb/smsc75xx.c<br/>index a2349483cd2a..1c6e51588da7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/smsc75xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/smsc75xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/smsc75xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/smsc75xx.c</a></div><div class='hunk'>@@ -98,7 +98,7 @@ static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(ret &lt; 0))</div><div class='ctx'> 		netdev_warn(dev-&gt;net,</div><div class='del'>-			"Failed to read register index 0x%08x", index);</div><div class='add'>+			"Failed to read reg index 0x%08x: %d", index, ret);</div><div class='ctx'> </div><div class='ctx'> 	le32_to_cpus(buf);</div><div class='ctx'> 	*data = *buf;</div><div class='hunk'>@@ -128,7 +128,7 @@ static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(ret &lt; 0))</div><div class='ctx'> 		netdev_warn(dev-&gt;net,</div><div class='del'>-			"Failed to write register index 0x%08x", index);</div><div class='add'>+			"Failed to write reg index 0x%08x: %d", index, ret);</div><div class='ctx'> </div><div class='ctx'> 	kfree(buf);</div><div class='ctx'> </div><div class='hunk'>@@ -171,7 +171,7 @@ static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)</div><div class='ctx'> 	idx &amp;= dev-&gt;mii.reg_num_mask;</div><div class='ctx'> 	addr = ((phy_id &lt;&lt; MII_ACCESS_PHY_ADDR_SHIFT) &amp; MII_ACCESS_PHY_ADDR)</div><div class='ctx'> 		| ((idx &lt;&lt; MII_ACCESS_REG_ADDR_SHIFT) &amp; MII_ACCESS_REG_ADDR)</div><div class='del'>-		| MII_ACCESS_READ;</div><div class='add'>+		| MII_ACCESS_READ | MII_ACCESS_BUSY;</div><div class='ctx'> 	ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);</div><div class='ctx'> 	check_warn_goto_done(ret, "Error writing MII_ACCESS");</div><div class='ctx'> </div><div class='hunk'>@@ -210,7 +210,7 @@ static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,</div><div class='ctx'> 	idx &amp;= dev-&gt;mii.reg_num_mask;</div><div class='ctx'> 	addr = ((phy_id &lt;&lt; MII_ACCESS_PHY_ADDR_SHIFT) &amp; MII_ACCESS_PHY_ADDR)</div><div class='ctx'> 		| ((idx &lt;&lt; MII_ACCESS_REG_ADDR_SHIFT) &amp; MII_ACCESS_REG_ADDR)</div><div class='del'>-		| MII_ACCESS_WRITE;</div><div class='add'>+		| MII_ACCESS_WRITE | MII_ACCESS_BUSY;</div><div class='ctx'> 	ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);</div><div class='ctx'> 	check_warn_goto_done(ret, "Error writing MII_ACCESS");</div><div class='ctx'> </div><div class='hunk'>@@ -508,9 +508,9 @@ static int smsc75xx_link_reset(struct usbnet *dev)</div><div class='ctx'> 	u16 lcladv, rmtadv;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/* clear interrupt status */</div><div class='del'>-	ret = smsc75xx_mdio_read(dev-&gt;net, mii-&gt;phy_id, PHY_INT_SRC);</div><div class='del'>-	check_warn_return(ret, "Error reading PHY_INT_SRC");</div><div class='add'>+	/* write to clear phy interrupt status */</div><div class='add'>+	smsc75xx_mdio_write(dev-&gt;net, mii-&gt;phy_id, PHY_INT_SRC,</div><div class='add'>+		PHY_INT_SRC_CLEAR_ALL);</div><div class='ctx'> </div><div class='ctx'> 	ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);</div><div class='ctx'> 	check_warn_return(ret, "Error writing INT_STS");</div><div class='hunk'>@@ -643,7 +643,7 @@ static int smsc75xx_set_mac_address(struct usbnet *dev)</div><div class='ctx'> </div><div class='ctx'> static int smsc75xx_phy_initialize(struct usbnet *dev)</div><div class='ctx'> {</div><div class='del'>-	int bmcr, timeout = 0;</div><div class='add'>+	int bmcr, ret, timeout = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize MII structure */</div><div class='ctx'> 	dev-&gt;mii.dev = dev-&gt;net;</div><div class='hunk'>@@ -651,6 +651,7 @@ static int smsc75xx_phy_initialize(struct usbnet *dev)</div><div class='ctx'> 	dev-&gt;mii.mdio_write = smsc75xx_mdio_write;</div><div class='ctx'> 	dev-&gt;mii.phy_id_mask = 0x1f;</div><div class='ctx'> 	dev-&gt;mii.reg_num_mask = 0x1f;</div><div class='add'>+	dev-&gt;mii.supports_gmii = 1;</div><div class='ctx'> 	dev-&gt;mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;</div><div class='ctx'> </div><div class='ctx'> 	/* reset phy and wait for reset to complete */</div><div class='hunk'>@@ -661,7 +662,7 @@ static int smsc75xx_phy_initialize(struct usbnet *dev)</div><div class='ctx'> 		bmcr = smsc75xx_mdio_read(dev-&gt;net, dev-&gt;mii.phy_id, MII_BMCR);</div><div class='ctx'> 		check_warn_return(bmcr, "Error reading MII_BMCR");</div><div class='ctx'> 		timeout++;</div><div class='del'>-	} while ((bmcr &amp; MII_BMCR) &amp;&amp; (timeout &lt; 100));</div><div class='add'>+	} while ((bmcr &amp; BMCR_RESET) &amp;&amp; (timeout &lt; 100));</div><div class='ctx'> </div><div class='ctx'> 	if (timeout &gt;= 100) {</div><div class='ctx'> 		netdev_warn(dev-&gt;net, "timeout on PHY Reset");</div><div class='hunk'>@@ -671,10 +672,13 @@ static int smsc75xx_phy_initialize(struct usbnet *dev)</div><div class='ctx'> 	smsc75xx_mdio_write(dev-&gt;net, dev-&gt;mii.phy_id, MII_ADVERTISE,</div><div class='ctx'> 		ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |</div><div class='ctx'> 		ADVERTISE_PAUSE_ASYM);</div><div class='add'>+	smsc75xx_mdio_write(dev-&gt;net, dev-&gt;mii.phy_id, MII_CTRL1000,</div><div class='add'>+		ADVERTISE_1000FULL);</div><div class='ctx'> </div><div class='del'>-	/* read to clear */</div><div class='del'>-	smsc75xx_mdio_read(dev-&gt;net, dev-&gt;mii.phy_id, PHY_INT_SRC);</div><div class='del'>-	check_warn_return(bmcr, "Error reading PHY_INT_SRC");</div><div class='add'>+	/* read and write to clear phy interrupt status */</div><div class='add'>+	ret = smsc75xx_mdio_read(dev-&gt;net, dev-&gt;mii.phy_id, PHY_INT_SRC);</div><div class='add'>+	check_warn_return(ret, "Error reading PHY_INT_SRC");</div><div class='add'>+	smsc75xx_mdio_write(dev-&gt;net, dev-&gt;mii.phy_id, PHY_INT_SRC, 0xffff);</div><div class='ctx'> </div><div class='ctx'> 	smsc75xx_mdio_write(dev-&gt;net, dev-&gt;mii.phy_id, PHY_INT_MASK,</div><div class='ctx'> 		PHY_INT_MASK_DEFAULT);</div><div class='hunk'>@@ -899,15 +903,20 @@ static int smsc75xx_reset(struct usbnet *dev)</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(dev, ifup, dev-&gt;net, "ID_REV = 0x%08x", buf);</div><div class='ctx'> </div><div class='del'>-	/* Configure GPIO pins as LED outputs */</div><div class='del'>-	ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &amp;buf);</div><div class='del'>-	check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret);</div><div class='add'>+	ret = smsc75xx_read_reg(dev, E2P_CMD, &amp;buf);</div><div class='add'>+	check_warn_return(ret, "Failed to read E2P_CMD: %d", ret);</div><div class='add'>+</div><div class='add'>+	/* only set default GPIO/LED settings if no EEPROM is detected */</div><div class='add'>+	if (!(buf &amp; E2P_CMD_LOADED)) {</div><div class='add'>+		ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &amp;buf);</div><div class='add'>+		check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret);</div><div class='ctx'> </div><div class='del'>-	buf &amp;= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);</div><div class='del'>-	buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;</div><div class='add'>+		buf &amp;= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);</div><div class='add'>+		buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;</div><div class='ctx'> </div><div class='del'>-	ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);</div><div class='del'>-	check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret);</div><div class='add'>+		ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);</div><div class='add'>+		check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = smsc75xx_write_reg(dev, FLOW, 0);</div><div class='ctx'> 	check_warn_return(ret, "Failed to write FLOW: %d", ret);</div><div class='hunk'>@@ -946,6 +955,14 @@ static int smsc75xx_reset(struct usbnet *dev)</div><div class='ctx'> 	ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);</div><div class='ctx'> 	check_warn_return(ret, "Failed to write INT_EP_CTL: %d", ret);</div><div class='ctx'> </div><div class='add'>+	/* allow mac to detect speed and duplex from phy */</div><div class='add'>+	ret = smsc75xx_read_reg(dev, MAC_CR, &amp;buf);</div><div class='add'>+	check_warn_return(ret, "Failed to read MAC_CR: %d", ret);</div><div class='add'>+</div><div class='add'>+	buf |= (MAC_CR_ADD | MAC_CR_ASD);</div><div class='add'>+	ret = smsc75xx_write_reg(dev, MAC_CR, buf);</div><div class='add'>+	check_warn_return(ret, "Failed to write MAC_CR: %d", ret);</div><div class='add'>+</div><div class='ctx'> 	ret = smsc75xx_read_reg(dev, MAC_TX, &amp;buf);</div><div class='ctx'> 	check_warn_return(ret, "Failed to read MAC_TX: %d", ret);</div><div class='ctx'> </div><div class='hunk'>@@ -1212,7 +1229,7 @@ static const struct driver_info smsc75xx_info = {</div><div class='ctx'> 	.rx_fixup	= smsc75xx_rx_fixup,</div><div class='ctx'> 	.tx_fixup	= smsc75xx_tx_fixup,</div><div class='ctx'> 	.status		= smsc75xx_status,</div><div class='del'>-	.flags		= FLAG_ETHER | FLAG_SEND_ZLP,</div><div class='add'>+	.flags		= FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct usb_device_id products[] = {</div><div class='hunk'>@@ -1237,6 +1254,7 @@ static struct usb_driver smsc75xx_driver = {</div><div class='ctx'> 	.suspend	= usbnet_suspend,</div><div class='ctx'> 	.resume		= usbnet_resume,</div><div class='ctx'> 	.disconnect	= usbnet_disconnect,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(smsc75xx_driver);</div><div class='head'>diff --git a/drivers/net/usb/smsc75xx.h b/drivers/net/usb/smsc75xx.h<br/>index 16e98c778344..67eba39e6ee2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/smsc75xx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/smsc75xx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/smsc75xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/smsc75xx.h</a></div><div class='hunk'>@@ -388,6 +388,7 @@</div><div class='ctx'> #define PHY_INT_SRC_ANEG_COMP		((u16)0x0040)</div><div class='ctx'> #define PHY_INT_SRC_REMOTE_FAULT	((u16)0x0020)</div><div class='ctx'> #define PHY_INT_SRC_LINK_DOWN		((u16)0x0010)</div><div class='add'>+#define PHY_INT_SRC_CLEAR_ALL		((u16)0xffff)</div><div class='ctx'> </div><div class='ctx'> #define PHY_INT_MASK			(30)</div><div class='ctx'> #define PHY_INT_MASK_ENERGY_ON		((u16)0x0080)</div><div class='head'>diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c<br/>index 5f19f84d3494..b1112e753859 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/smsc95xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/smsc95xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/smsc95xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/smsc95xx.c</a></div><div class='hunk'>@@ -1017,6 +1017,7 @@ static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 	dev-&gt;net-&gt;ethtool_ops = &amp;smsc95xx_ethtool_ops;</div><div class='ctx'> 	dev-&gt;net-&gt;flags |= IFF_MULTICAST;</div><div class='ctx'> 	dev-&gt;net-&gt;hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;</div><div class='add'>+	dev-&gt;hard_mtu = dev-&gt;net-&gt;mtu + dev-&gt;net-&gt;hard_header_len;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1191,7 +1192,7 @@ static const struct driver_info smsc95xx_info = {</div><div class='ctx'> 	.rx_fixup	= smsc95xx_rx_fixup,</div><div class='ctx'> 	.tx_fixup	= smsc95xx_tx_fixup,</div><div class='ctx'> 	.status		= smsc95xx_status,</div><div class='del'>-	.flags		= FLAG_ETHER | FLAG_SEND_ZLP,</div><div class='add'>+	.flags		= FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct usb_device_id products[] = {</div><div class='hunk'>@@ -1296,6 +1297,7 @@ static struct usb_driver smsc95xx_driver = {</div><div class='ctx'> 	.suspend	= usbnet_suspend,</div><div class='ctx'> 	.resume		= usbnet_resume,</div><div class='ctx'> 	.disconnect	= usbnet_disconnect,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(smsc95xx_driver);</div><div class='head'>diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c<br/>index b7b3f5b0d406..9f58330f1312 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/usbnet.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/usbnet.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/usbnet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/usbnet.c</a></div><div class='hunk'>@@ -210,6 +210,7 @@ static int init_status (struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			usb_fill_int_urb(dev-&gt;interrupt, dev-&gt;udev, pipe,</div><div class='ctx'> 				buf, maxp, intr_complete, dev, period);</div><div class='add'>+			dev-&gt;interrupt-&gt;transfer_flags |= URB_FREE_BUFFER;</div><div class='ctx'> 			dev_dbg(&amp;intf-&gt;dev,</div><div class='ctx'> 				"status ep%din, %d bytes period %d\n",</div><div class='ctx'> 				usb_pipeendpoint(pipe), maxp, period);</div><div class='hunk'>@@ -281,17 +282,32 @@ int usbnet_change_mtu (struct net_device *net, int new_mtu)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(usbnet_change_mtu);</div><div class='ctx'> </div><div class='add'>+/* The caller must hold list-&gt;lock */</div><div class='add'>+static void __usbnet_queue_skb(struct sk_buff_head *list,</div><div class='add'>+			struct sk_buff *newsk, enum skb_state state)</div><div class='add'>+{</div><div class='add'>+	struct skb_data *entry = (struct skb_data *) newsk-&gt;cb;</div><div class='add'>+</div><div class='add'>+	__skb_queue_tail(list, newsk);</div><div class='add'>+	entry-&gt;state = state;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*-------------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='ctx'> /* some LK 2.4 HCDs oopsed if we freed or resubmitted urbs from</div><div class='ctx'>  * completion callbacks.  2.5 should have fixed those bugs...</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void defer_bh(struct usbnet *dev, struct sk_buff *skb, struct sk_buff_head *list)</div><div class='add'>+static enum skb_state defer_bh(struct usbnet *dev, struct sk_buff *skb,</div><div class='add'>+		struct sk_buff_head *list, enum skb_state state)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long		flags;</div><div class='add'>+	enum skb_state 		old_state;</div><div class='add'>+	struct skb_data *entry = (struct skb_data *) skb-&gt;cb;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;list-&gt;lock, flags);</div><div class='add'>+	old_state = entry-&gt;state;</div><div class='add'>+	entry-&gt;state = state;</div><div class='ctx'> 	__skb_unlink(skb, list);</div><div class='ctx'> 	spin_unlock(&amp;list-&gt;lock);</div><div class='ctx'> 	spin_lock(&amp;dev-&gt;done.lock);</div><div class='hunk'>@@ -299,6 +315,7 @@ static void defer_bh(struct usbnet *dev, struct sk_buff *skb, struct sk_buff_hea</div><div class='ctx'> 	if (dev-&gt;done.qlen == 1)</div><div class='ctx'> 		tasklet_schedule(&amp;dev-&gt;bh);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;dev-&gt;done.lock, flags);</div><div class='add'>+	return old_state;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* some work can't be done in tasklets, so we use keventd</div><div class='hunk'>@@ -339,7 +356,6 @@ static int rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags)</div><div class='ctx'> 	entry = (struct skb_data *) skb-&gt;cb;</div><div class='ctx'> 	entry-&gt;urb = urb;</div><div class='ctx'> 	entry-&gt;dev = dev;</div><div class='del'>-	entry-&gt;state = rx_start;</div><div class='ctx'> 	entry-&gt;length = 0;</div><div class='ctx'> </div><div class='ctx'> 	usb_fill_bulk_urb (urb, dev-&gt;udev, dev-&gt;in,</div><div class='hunk'>@@ -371,7 +387,7 @@ static int rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags)</div><div class='ctx'> 			tasklet_schedule (&amp;dev-&gt;bh);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 0:</div><div class='del'>-			__skb_queue_tail (&amp;dev-&gt;rxq, skb);</div><div class='add'>+			__usbnet_queue_skb(&amp;dev-&gt;rxq, skb, rx_start);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		netif_dbg(dev, ifdown, dev-&gt;net, "rx: stopped\n");</div><div class='hunk'>@@ -422,16 +438,17 @@ static void rx_complete (struct urb *urb)</div><div class='ctx'> 	struct skb_data		*entry = (struct skb_data *) skb-&gt;cb;</div><div class='ctx'> 	struct usbnet		*dev = entry-&gt;dev;</div><div class='ctx'> 	int			urb_status = urb-&gt;status;</div><div class='add'>+	enum skb_state		state;</div><div class='ctx'> </div><div class='ctx'> 	skb_put (skb, urb-&gt;actual_length);</div><div class='del'>-	entry-&gt;state = rx_done;</div><div class='add'>+	state = rx_done;</div><div class='ctx'> 	entry-&gt;urb = NULL;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb_status) {</div><div class='ctx'> 	/* success */</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		if (skb-&gt;len &lt; dev-&gt;net-&gt;hard_header_len) {</div><div class='del'>-			entry-&gt;state = rx_cleanup;</div><div class='add'>+			state = rx_cleanup;</div><div class='ctx'> 			dev-&gt;net-&gt;stats.rx_errors++;</div><div class='ctx'> 			dev-&gt;net-&gt;stats.rx_length_errors++;</div><div class='ctx'> 			netif_dbg(dev, rx_err, dev-&gt;net,</div><div class='hunk'>@@ -470,7 +487,7 @@ static void rx_complete (struct urb *urb)</div><div class='ctx'> 				  "rx throttle %d\n", urb_status);</div><div class='ctx'> 		}</div><div class='ctx'> block:</div><div class='del'>-		entry-&gt;state = rx_cleanup;</div><div class='add'>+		state = rx_cleanup;</div><div class='ctx'> 		entry-&gt;urb = urb;</div><div class='ctx'> 		urb = NULL;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -481,17 +498,18 @@ block:</div><div class='ctx'> 		// FALLTHROUGH</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		entry-&gt;state = rx_cleanup;</div><div class='add'>+		state = rx_cleanup;</div><div class='ctx'> 		dev-&gt;net-&gt;stats.rx_errors++;</div><div class='ctx'> 		netif_dbg(dev, rx_err, dev-&gt;net, "rx status %d\n", urb_status);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	defer_bh(dev, skb, &amp;dev-&gt;rxq);</div><div class='add'>+	state = defer_bh(dev, skb, &amp;dev-&gt;rxq, state);</div><div class='ctx'> </div><div class='ctx'> 	if (urb) {</div><div class='ctx'> 		if (netif_running (dev-&gt;net) &amp;&amp;</div><div class='del'>-		    !test_bit (EVENT_RX_HALT, &amp;dev-&gt;flags)) {</div><div class='add'>+		    !test_bit (EVENT_RX_HALT, &amp;dev-&gt;flags) &amp;&amp;</div><div class='add'>+		    state != unlink_start) {</div><div class='ctx'> 			rx_submit (dev, urb, GFP_ATOMIC);</div><div class='ctx'> 			usb_mark_last_busy(dev-&gt;udev);</div><div class='ctx'> 			return;</div><div class='hunk'>@@ -578,16 +596,23 @@ EXPORT_SYMBOL_GPL(usbnet_purge_paused_rxq);</div><div class='ctx'> static int unlink_urbs (struct usbnet *dev, struct sk_buff_head *q)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long		flags;</div><div class='del'>-	struct sk_buff		*skb, *skbnext;</div><div class='add'>+	struct sk_buff		*skb;</div><div class='ctx'> 	int			count = 0;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave (&amp;q-&gt;lock, flags);</div><div class='del'>-	skb_queue_walk_safe(q, skb, skbnext) {</div><div class='add'>+	while (!skb_queue_empty(q)) {</div><div class='ctx'> 		struct skb_data		*entry;</div><div class='ctx'> 		struct urb		*urb;</div><div class='ctx'> 		int			retval;</div><div class='ctx'> </div><div class='del'>-		entry = (struct skb_data *) skb-&gt;cb;</div><div class='add'>+		skb_queue_walk(q, skb) {</div><div class='add'>+			entry = (struct skb_data *) skb-&gt;cb;</div><div class='add'>+			if (entry-&gt;state != unlink_start)</div><div class='add'>+				goto found;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+found:</div><div class='add'>+		entry-&gt;state = unlink_start;</div><div class='ctx'> 		urb = entry-&gt;urb;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -884,6 +909,7 @@ static const struct ethtool_ops usbnet_ethtool_ops = {</div><div class='ctx'> 	.get_drvinfo		= usbnet_get_drvinfo,</div><div class='ctx'> 	.get_msglevel		= usbnet_get_msglevel,</div><div class='ctx'> 	.set_msglevel		= usbnet_set_msglevel,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*-------------------------------------------------------------------------*/</div><div class='hunk'>@@ -1038,8 +1064,7 @@ static void tx_complete (struct urb *urb)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	usb_autopm_put_interface_async(dev-&gt;intf);</div><div class='del'>-	entry-&gt;state = tx_done;</div><div class='del'>-	defer_bh(dev, skb, &amp;dev-&gt;txq);</div><div class='add'>+	(void) defer_bh(dev, skb, &amp;dev-&gt;txq, tx_done);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*-------------------------------------------------------------------------*/</div><div class='hunk'>@@ -1095,7 +1120,6 @@ netdev_tx_t usbnet_start_xmit (struct sk_buff *skb,</div><div class='ctx'> 	entry = (struct skb_data *) skb-&gt;cb;</div><div class='ctx'> 	entry-&gt;urb = urb;</div><div class='ctx'> 	entry-&gt;dev = dev;</div><div class='del'>-	entry-&gt;state = tx_start;</div><div class='ctx'> 	entry-&gt;length = length;</div><div class='ctx'> </div><div class='ctx'> 	usb_fill_bulk_urb (urb, dev-&gt;udev, dev-&gt;out,</div><div class='hunk'>@@ -1154,7 +1178,7 @@ netdev_tx_t usbnet_start_xmit (struct sk_buff *skb,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		net-&gt;trans_start = jiffies;</div><div class='del'>-		__skb_queue_tail (&amp;dev-&gt;txq, skb);</div><div class='add'>+		__usbnet_queue_skb(&amp;dev-&gt;txq, skb, tx_start);</div><div class='ctx'> 		if (dev-&gt;txq.qlen &gt;= TX_QLEN (dev))</div><div class='ctx'> 			netif_stop_queue (net);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1443,7 +1467,7 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)</div><div class='ctx'> </div><div class='ctx'> 	status = register_netdev (net);</div><div class='ctx'> 	if (status)</div><div class='del'>-		goto out3;</div><div class='add'>+		goto out4;</div><div class='ctx'> 	netif_info(dev, probe, dev-&gt;net,</div><div class='ctx'> 		   "register '%s' at usb-%s-%s, %s, %pM\n",</div><div class='ctx'> 		   udev-&gt;dev.driver-&gt;name,</div><div class='hunk'>@@ -1461,6 +1485,8 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+out4:</div><div class='add'>+	usb_free_urb(dev-&gt;interrupt);</div><div class='ctx'> out3:</div><div class='ctx'> 	if (info-&gt;unbind)</div><div class='ctx'> 		info-&gt;unbind (dev, udev);</div><div class='head'>diff --git a/drivers/net/usb/zaurus.c b/drivers/net/usb/zaurus.c<br/>index 34db195fb8b0..35c90307d473 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/usb/zaurus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/usb/zaurus.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/usb/zaurus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/usb/zaurus.c</a></div><div class='hunk'>@@ -377,6 +377,7 @@ static struct usb_driver zaurus_driver = {</div><div class='ctx'> 	.disconnect =	usbnet_disconnect,</div><div class='ctx'> 	.suspend =	usbnet_suspend,</div><div class='ctx'> 	.resume =	usbnet_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(zaurus_driver);</div><div class='head'>diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c<br/>index af8acc85f4bb..5214b1eceb95 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/virtio_net.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/virtio_net.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/virtio_net.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/virtio_net.c</a></div><div class='hunk'>@@ -66,12 +66,21 @@ struct virtnet_info {</div><div class='ctx'> 	/* Host will merge rx buffers for big packets (shake it! shake it!) */</div><div class='ctx'> 	bool mergeable_rx_bufs;</div><div class='ctx'> </div><div class='add'>+	/* enable config space updates */</div><div class='add'>+	bool config_enable;</div><div class='add'>+</div><div class='ctx'> 	/* Active statistics */</div><div class='ctx'> 	struct virtnet_stats __percpu *stats;</div><div class='ctx'> </div><div class='ctx'> 	/* Work struct for refilling if we run low on memory. */</div><div class='ctx'> 	struct delayed_work refill;</div><div class='ctx'> </div><div class='add'>+	/* Work struct for config space updates */</div><div class='add'>+	struct work_struct config_work;</div><div class='add'>+</div><div class='add'>+	/* Lock for config space updates */</div><div class='add'>+	struct mutex config_lock;</div><div class='add'>+</div><div class='ctx'> 	/* Chain pages by the private ptr. */</div><div class='ctx'> 	struct page *pages;</div><div class='ctx'> </div><div class='hunk'>@@ -492,7 +501,9 @@ static void virtnet_napi_enable(struct virtnet_info *vi)</div><div class='ctx'> 	 * We synchronize against interrupts via NAPI_STATE_SCHED */</div><div class='ctx'> 	if (napi_schedule_prep(&amp;vi-&gt;napi)) {</div><div class='ctx'> 		virtqueue_disable_cb(vi-&gt;rvq);</div><div class='add'>+		local_bh_disable();</div><div class='ctx'> 		__napi_schedule(&amp;vi-&gt;napi);</div><div class='add'>+		local_bh_enable();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -780,6 +791,16 @@ static bool virtnet_send_command(struct virtnet_info *vi, u8 class, u8 cmd,</div><div class='ctx'> 	return status == VIRTIO_NET_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void virtnet_ack_link_announce(struct virtnet_info *vi)</div><div class='add'>+{</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	if (!virtnet_send_command(vi, VIRTIO_NET_CTRL_ANNOUNCE,</div><div class='add'>+				  VIRTIO_NET_CTRL_ANNOUNCE_ACK, NULL,</div><div class='add'>+				  0, 0))</div><div class='add'>+		dev_warn(&amp;vi-&gt;dev-&gt;dev, "Failed to ack link announce.\n");</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int virtnet_close(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct virtnet_info *vi = netdev_priv(dev);</div><div class='hunk'>@@ -951,20 +972,31 @@ static const struct net_device_ops virtnet_netdev = {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void virtnet_update_status(struct virtnet_info *vi)</div><div class='add'>+static void virtnet_config_changed_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='add'>+	struct virtnet_info *vi =</div><div class='add'>+		container_of(work, struct virtnet_info, config_work);</div><div class='ctx'> 	u16 v;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;vi-&gt;config_lock);</div><div class='add'>+	if (!vi-&gt;config_enable)</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='ctx'> 	if (virtio_config_val(vi-&gt;vdev, VIRTIO_NET_F_STATUS,</div><div class='ctx'> 			      offsetof(struct virtio_net_config, status),</div><div class='ctx'> 			      &amp;v) &lt; 0)</div><div class='del'>-		return;</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='add'>+	if (v &amp; VIRTIO_NET_S_ANNOUNCE) {</div><div class='add'>+		netif_notify_peers(vi-&gt;dev);</div><div class='add'>+		virtnet_ack_link_announce(vi);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Ignore unknown (future) status bits */</div><div class='ctx'> 	v &amp;= VIRTIO_NET_S_LINK_UP;</div><div class='ctx'> </div><div class='ctx'> 	if (vi-&gt;status == v)</div><div class='del'>-		return;</div><div class='add'>+		goto done;</div><div class='ctx'> </div><div class='ctx'> 	vi-&gt;status = v;</div><div class='ctx'> </div><div class='hunk'>@@ -975,13 +1007,15 @@ static void virtnet_update_status(struct virtnet_info *vi)</div><div class='ctx'> 		netif_carrier_off(vi-&gt;dev);</div><div class='ctx'> 		netif_stop_queue(vi-&gt;dev);</div><div class='ctx'> 	}</div><div class='add'>+done:</div><div class='add'>+	mutex_unlock(&amp;vi-&gt;config_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void virtnet_config_changed(struct virtio_device *vdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct virtnet_info *vi = vdev-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	virtnet_update_status(vi);</div><div class='add'>+	queue_work(system_nrt_wq, &amp;vi-&gt;config_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int init_vqs(struct virtnet_info *vi)</div><div class='hunk'>@@ -1075,6 +1109,9 @@ static int virtnet_probe(struct virtio_device *vdev)</div><div class='ctx'> 		goto free;</div><div class='ctx'> </div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;vi-&gt;refill, refill_work);</div><div class='add'>+	mutex_init(&amp;vi-&gt;config_lock);</div><div class='add'>+	vi-&gt;config_enable = true;</div><div class='add'>+	INIT_WORK(&amp;vi-&gt;config_work, virtnet_config_changed_work);</div><div class='ctx'> 	sg_init_table(vi-&gt;rx_sg, ARRAY_SIZE(vi-&gt;rx_sg));</div><div class='ctx'> 	sg_init_table(vi-&gt;tx_sg, ARRAY_SIZE(vi-&gt;tx_sg));</div><div class='ctx'> </div><div class='hunk'>@@ -1110,7 +1147,7 @@ static int virtnet_probe(struct virtio_device *vdev)</div><div class='ctx'> 	   otherwise get link status from config. */</div><div class='ctx'> 	if (virtio_has_feature(vi-&gt;vdev, VIRTIO_NET_F_STATUS)) {</div><div class='ctx'> 		netif_carrier_off(dev);</div><div class='del'>-		virtnet_update_status(vi);</div><div class='add'>+		queue_work(system_nrt_wq, &amp;vi-&gt;config_work);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		vi-&gt;status = VIRTIO_NET_S_LINK_UP;</div><div class='ctx'> 		netif_carrier_on(dev);</div><div class='hunk'>@@ -1169,10 +1206,17 @@ static void __devexit virtnet_remove(struct virtio_device *vdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct virtnet_info *vi = vdev-&gt;priv;</div><div class='ctx'> </div><div class='add'>+	/* Prevent config work handler from accessing the device. */</div><div class='add'>+	mutex_lock(&amp;vi-&gt;config_lock);</div><div class='add'>+	vi-&gt;config_enable = false;</div><div class='add'>+	mutex_unlock(&amp;vi-&gt;config_lock);</div><div class='add'>+</div><div class='ctx'> 	unregister_netdev(vi-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	remove_vq_common(vi);</div><div class='ctx'> </div><div class='add'>+	flush_work(&amp;vi-&gt;config_work);</div><div class='add'>+</div><div class='ctx'> 	free_percpu(vi-&gt;stats);</div><div class='ctx'> 	free_netdev(vi-&gt;dev);</div><div class='ctx'> }</div><div class='hunk'>@@ -1182,10 +1226,10 @@ static int virtnet_freeze(struct virtio_device *vdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct virtnet_info *vi = vdev-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	virtqueue_disable_cb(vi-&gt;rvq);</div><div class='del'>-	virtqueue_disable_cb(vi-&gt;svq);</div><div class='del'>-	if (virtio_has_feature(vi-&gt;vdev, VIRTIO_NET_F_CTRL_VQ))</div><div class='del'>-		virtqueue_disable_cb(vi-&gt;cvq);</div><div class='add'>+	/* Prevent config work handler from accessing the device */</div><div class='add'>+	mutex_lock(&amp;vi-&gt;config_lock);</div><div class='add'>+	vi-&gt;config_enable = false;</div><div class='add'>+	mutex_unlock(&amp;vi-&gt;config_lock);</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(vi-&gt;dev);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;vi-&gt;refill);</div><div class='hunk'>@@ -1195,6 +1239,8 @@ static int virtnet_freeze(struct virtio_device *vdev)</div><div class='ctx'> </div><div class='ctx'> 	remove_vq_common(vi);</div><div class='ctx'> </div><div class='add'>+	flush_work(&amp;vi-&gt;config_work);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1215,6 +1261,10 @@ static int virtnet_restore(struct virtio_device *vdev)</div><div class='ctx'> 	if (!try_fill_recv(vi, GFP_KERNEL))</div><div class='ctx'> 		queue_delayed_work(system_nrt_wq, &amp;vi-&gt;refill, 0);</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;vi-&gt;config_lock);</div><div class='add'>+	vi-&gt;config_enable = true;</div><div class='add'>+	mutex_unlock(&amp;vi-&gt;config_lock);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1232,6 +1282,7 @@ static unsigned int features[] = {</div><div class='ctx'> 	VIRTIO_NET_F_GUEST_ECN, VIRTIO_NET_F_GUEST_UFO,</div><div class='ctx'> 	VIRTIO_NET_F_MRG_RXBUF, VIRTIO_NET_F_STATUS, VIRTIO_NET_F_CTRL_VQ,</div><div class='ctx'> 	VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN,</div><div class='add'>+	VIRTIO_NET_F_GUEST_ANNOUNCE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct virtio_driver virtio_net_driver = {</div><div class='head'>diff --git a/drivers/net/wan/Kconfig b/drivers/net/wan/Kconfig<br/>index d70ede7a7f96..d58431e99f73 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wan/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wan/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wan/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wan/Kconfig</a></div><div class='hunk'>@@ -203,37 +203,6 @@ config WANXL_BUILD_FIRMWARE</div><div class='ctx'> </div><div class='ctx'> 	  You should never need this option, say N.</div><div class='ctx'> </div><div class='del'>-config PC300</div><div class='del'>-	tristate "Cyclades-PC300 support (RS-232/V.35, X.21, T1/E1 boards)"</div><div class='del'>-	depends on HDLC &amp;&amp; PCI &amp;&amp; BROKEN</div><div class='del'>-	---help---</div><div class='del'>-	  This driver is broken because of struct tty_driver change.</div><div class='del'>-</div><div class='del'>-	  Driver for the Cyclades-PC300 synchronous communication boards.</div><div class='del'>-</div><div class='del'>-	  These boards provide synchronous serial interfaces to your</div><div class='del'>-	  Linux box (interfaces currently available are RS-232/V.35, X.21 and</div><div class='del'>-	  T1/E1). If you wish to support Multilink PPP, please select the</div><div class='del'>-	  option later and read the file README.mlppp provided by PC300</div><div class='del'>-	  package.</div><div class='del'>-</div><div class='del'>-	  To compile this as a module, choose M here: the module</div><div class='del'>-	  will be called pc300.</div><div class='del'>-</div><div class='del'>-	  If unsure, say N.</div><div class='del'>-</div><div class='del'>-config PC300_MLPPP</div><div class='del'>-	bool "Cyclades-PC300 MLPPP support"</div><div class='del'>-	depends on PC300 &amp;&amp; PPP_MULTILINK &amp;&amp; PPP_SYNC_TTY &amp;&amp; HDLC_PPP</div><div class='del'>-	help</div><div class='del'>-	  Multilink PPP over the PC300 synchronous communication boards.</div><div class='del'>-</div><div class='del'>-comment "Cyclades-PC300 MLPPP support is disabled."</div><div class='del'>-	depends on HDLC &amp;&amp; PC300 &amp;&amp; (PPP=n || !PPP_MULTILINK || PPP_SYNC_TTY=n || !HDLC_PPP)</div><div class='del'>-</div><div class='del'>-comment "Refer to the file README.mlppp, provided by PC300 package."</div><div class='del'>-	depends on HDLC &amp;&amp; PC300 &amp;&amp; (PPP=n || !PPP_MULTILINK || PPP_SYNC_TTY=n || !HDLC_PPP)</div><div class='del'>-</div><div class='ctx'> config PC300TOO</div><div class='ctx'> 	tristate "Cyclades PC300 RSV/X21 alternative support"</div><div class='ctx'> 	depends on HDLC &amp;&amp; PCI</div><div class='head'>diff --git a/drivers/net/wan/Makefile b/drivers/net/wan/Makefile<br/>index 19d14bc28356..eac709bed7ae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wan/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wan/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wan/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wan/Makefile</a></div><div class='hunk'>@@ -17,10 +17,6 @@ obj-$(CONFIG_HDLC_FR)		+= hdlc_fr.o</div><div class='ctx'> obj-$(CONFIG_HDLC_PPP)		+= hdlc_ppp.o</div><div class='ctx'> obj-$(CONFIG_HDLC_X25)		+= hdlc_x25.o</div><div class='ctx'> </div><div class='del'>-pc300-y				:= pc300_drv.o</div><div class='del'>-pc300-$(CONFIG_PC300_MLPPP)	+= pc300_tty.o</div><div class='del'>-pc300-objs			:= $(pc300-y)</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_HOSTESS_SV11)	+= z85230.o	hostess_sv11.o</div><div class='ctx'> obj-$(CONFIG_SEALEVEL_4021)	+= z85230.o	sealevel.o</div><div class='ctx'> obj-$(CONFIG_COSA)		+= cosa.o</div><div class='hunk'>@@ -35,7 +31,6 @@ obj-$(CONFIG_SDLA)		+= sdla.o</div><div class='ctx'> obj-$(CONFIG_CYCLADES_SYNC)	+= cycx_drv.o cyclomx.o</div><div class='ctx'> obj-$(CONFIG_LAPBETHER)		+= lapbether.o</div><div class='ctx'> obj-$(CONFIG_SBNI)		+= sbni.o</div><div class='del'>-obj-$(CONFIG_PC300)		+= pc300.o</div><div class='ctx'> obj-$(CONFIG_N2)		+= n2.o</div><div class='ctx'> obj-$(CONFIG_C101)		+= c101.o</div><div class='ctx'> obj-$(CONFIG_WANXL)		+= wanxl.o</div><div class='head'>diff --git a/drivers/net/wan/dscc4.c b/drivers/net/wan/dscc4.c<br/>index c676de7de024..9eb6479306d6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wan/dscc4.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wan/dscc4.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wan/dscc4.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wan/dscc4.c</a></div><div class='hunk'>@@ -2055,15 +2055,4 @@ static struct pci_driver dscc4_driver = {</div><div class='ctx'> 	.remove		= __devexit_p(dscc4_remove_one),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init dscc4_init_module(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;dscc4_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit dscc4_cleanup_module(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;dscc4_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(dscc4_init_module);</div><div class='del'>-module_exit(dscc4_cleanup_module);</div><div class='add'>+module_pci_driver(dscc4_driver);</div><div class='head'>diff --git a/drivers/net/wan/lmc/lmc_main.c b/drivers/net/wan/lmc/lmc_main.c<br/>index 76a8a4a522e9..f5d533a706ea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wan/lmc/lmc_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wan/lmc/lmc_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wan/lmc/lmc_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wan/lmc/lmc_main.c</a></div><div class='hunk'>@@ -1120,7 +1120,7 @@ static void lmc_running_reset (struct net_device *dev) /*fold00*/</div><div class='ctx'> {</div><div class='ctx'>     lmc_softc_t *sc = dev_to_sc(dev);</div><div class='ctx'> </div><div class='del'>-    lmc_trace(dev, "lmc_runnig_reset in");</div><div class='add'>+    lmc_trace(dev, "lmc_running_reset in");</div><div class='ctx'> </div><div class='ctx'>     /* stop interrupts */</div><div class='ctx'>     /* Clear the interrupt mask */</div><div class='hunk'>@@ -1736,18 +1736,7 @@ static struct pci_driver lmc_driver = {</div><div class='ctx'> 	.remove		= __devexit_p(lmc_remove_one),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init init_lmc(void)</div><div class='del'>-{</div><div class='del'>-    return pci_register_driver(&amp;lmc_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit exit_lmc(void)</div><div class='del'>-{</div><div class='del'>-    pci_unregister_driver(&amp;lmc_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(init_lmc);</div><div class='del'>-module_exit(exit_lmc);</div><div class='add'>+module_pci_driver(lmc_driver);</div><div class='ctx'> </div><div class='ctx'> unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/wimax/i2400m/Kconfig b/drivers/net/wimax/i2400m/Kconfig<br/>index 3f703384295e..672de18a776c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wimax/i2400m/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wimax/i2400m/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wimax/i2400m/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wimax/i2400m/Kconfig</a></div><div class='hunk'>@@ -32,8 +32,9 @@ config WIMAX_I2400M_SDIO</div><div class='ctx'> 	  If unsure, it is safe to select M (module).</div><div class='ctx'> </div><div class='ctx'> config WIMAX_IWMC3200_SDIO</div><div class='del'>-	bool "Intel Wireless Multicom WiMAX Connection 3200 over SDIO"</div><div class='add'>+	bool "Intel Wireless Multicom WiMAX Connection 3200 over SDIO (EXPERIMENTAL)"</div><div class='ctx'> 	depends on WIMAX_I2400M_SDIO</div><div class='add'>+	depends on EXPERIMENTAL</div><div class='ctx'> 	select IWMC3200TOP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select if you have a device based on the Intel Multicom WiMAX</div><div class='head'>diff --git a/drivers/net/wimax/i2400m/usb-rx.c b/drivers/net/wimax/i2400m/usb-rx.c<br/>index e3257681e360..b78ee676e102 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wimax/i2400m/usb-rx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wimax/i2400m/usb-rx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wimax/i2400m/usb-rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wimax/i2400m/usb-rx.c</a></div><div class='hunk'>@@ -277,7 +277,7 @@ retry:</div><div class='ctx'> 		d_printf(1, dev, "RX: size changed to %d, received %d, "</div><div class='ctx'> 			 "copied %d, capacity %ld\n",</div><div class='ctx'> 			 rx_size, read_size, rx_skb-&gt;len,</div><div class='del'>-			 (long) (skb_end_pointer(new_skb) - new_skb-&gt;head));</div><div class='add'>+			 (long) skb_end_offset(new_skb));</div><div class='ctx'> 		goto retry;</div><div class='ctx'> 	}</div><div class='ctx'> 		/* In most cases, it happens due to the hardware scheduling a</div><div class='head'>diff --git a/drivers/net/wimax/i2400m/usb.c b/drivers/net/wimax/i2400m/usb.c<br/>index 29b1e033a10b..713d033891e6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wimax/i2400m/usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wimax/i2400m/usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wimax/i2400m/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wimax/i2400m/usb.c</a></div><div class='hunk'>@@ -695,7 +695,7 @@ int i2400mu_resume(struct usb_interface *iface)</div><div class='ctx'> 	d_fnstart(3, dev, "(iface %p)\n", iface);</div><div class='ctx'> 	rmb();		/* see i2400m-&gt;updown's documentation  */</div><div class='ctx'> 	if (i2400m-&gt;updown == 0) {</div><div class='del'>-		d_printf(1, dev, "fw was down, no resume neeed\n");</div><div class='add'>+		d_printf(1, dev, "fw was down, no resume needed\n");</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	d_printf(1, dev, "fw was up, resuming\n");</div><div class='head'>diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig<br/>index abd3b71cd4ab..5f58fa53238c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/Kconfig</a></div><div class='hunk'>@@ -282,8 +282,7 @@ source "drivers/net/wireless/orinoco/Kconfig"</div><div class='ctx'> source "drivers/net/wireless/p54/Kconfig"</div><div class='ctx'> source "drivers/net/wireless/rt2x00/Kconfig"</div><div class='ctx'> source "drivers/net/wireless/rtlwifi/Kconfig"</div><div class='del'>-source "drivers/net/wireless/wl1251/Kconfig"</div><div class='del'>-source "drivers/net/wireless/wl12xx/Kconfig"</div><div class='add'>+source "drivers/net/wireless/ti/Kconfig"</div><div class='ctx'> source "drivers/net/wireless/zd1211rw/Kconfig"</div><div class='ctx'> source "drivers/net/wireless/mwifiex/Kconfig"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile<br/>index 98db76196b59..0ce218b931d4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/Makefile</a></div><div class='hunk'>@@ -51,9 +51,7 @@ obj-$(CONFIG_ATH_COMMON)	+= ath/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_MAC80211_HWSIM)	+= mac80211_hwsim.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_WL1251)	+= wl1251/</div><div class='del'>-obj-$(CONFIG_WL12XX)	+= wl12xx/</div><div class='del'>-obj-$(CONFIG_WL12XX_PLATFORM_DATA)	+= wl12xx/</div><div class='add'>+obj-$(CONFIG_WL_TI)	+= ti/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_IWM)	+= iwmc3200wifi/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/adm8211.c b/drivers/net/wireless/adm8211.c<br/>index f5ce5623da99..0ac09a2bd144 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/adm8211.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/adm8211.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/adm8211.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/adm8211.c</a></div><div class='hunk'>@@ -1991,19 +1991,4 @@ static struct pci_driver adm8211_driver = {</div><div class='ctx'> #endif /* CONFIG_PM */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __init adm8211_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;adm8211_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void __exit adm8211_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;adm8211_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-module_init(adm8211_init);</div><div class='del'>-module_exit(adm8211_exit);</div><div class='add'>+module_pci_driver(adm8211_driver);</div><div class='head'>diff --git a/drivers/net/wireless/at76c50x-usb.c b/drivers/net/wireless/at76c50x-usb.c<br/>index 4045e5ab0555..efc162e0b511 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/at76c50x-usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/at76c50x-usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/at76c50x-usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/at76c50x-usb.c</a></div><div class='hunk'>@@ -1122,12 +1122,12 @@ exit:</div><div class='ctx'> static void at76_dump_mib_local(struct at76_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct mib_local *m = kmalloc(sizeof(struct mib_phy), GFP_KERNEL);</div><div class='add'>+	struct mib_local *m = kmalloc(sizeof(*m), GFP_KERNEL);</div><div class='ctx'> </div><div class='ctx'> 	if (!m)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ret = at76_get_mib(priv-&gt;udev, MIB_LOCAL, m, sizeof(struct mib_local));</div><div class='add'>+	ret = at76_get_mib(priv-&gt;udev, MIB_LOCAL, m, sizeof(*m));</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		wiphy_err(priv-&gt;hw-&gt;wiphy,</div><div class='ctx'> 			  "at76_get_mib (LOCAL) failed: %d\n", ret);</div><div class='hunk'>@@ -1751,7 +1751,7 @@ static void at76_mac80211_tx(struct ieee80211_hw *hw, struct sk_buff *skb)</div><div class='ctx'> 	 * following workaround is necessary. If the TX frame is an</div><div class='ctx'> 	 * authentication frame extract the bssid and send the CMD_JOIN. */</div><div class='ctx'> 	if (mgmt-&gt;frame_control &amp; cpu_to_le16(IEEE80211_STYPE_AUTH)) {</div><div class='del'>-		if (compare_ether_addr(priv-&gt;bssid, mgmt-&gt;bssid)) {</div><div class='add'>+		if (!ether_addr_equal(priv-&gt;bssid, mgmt-&gt;bssid)) {</div><div class='ctx'> 			memcpy(priv-&gt;bssid, mgmt-&gt;bssid, ETH_ALEN);</div><div class='ctx'> 			ieee80211_queue_work(hw, &amp;priv-&gt;work_join_bssid);</div><div class='ctx'> 			dev_kfree_skb_any(skb);</div><div class='hunk'>@@ -1955,7 +1955,7 @@ static int at76_hw_scan(struct ieee80211_hw *hw,</div><div class='ctx'> 	ret = at76_set_card_command(priv-&gt;udev, CMD_SCAN, &amp;scan, sizeof(scan));</div><div class='ctx'> </div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		err("CMD_SCAN failed: %d", ret);</div><div class='add'>+		wiphy_err(priv-&gt;hw-&gt;wiphy, "CMD_SCAN failed: %d\n", ret);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2486,6 +2486,7 @@ static struct usb_driver at76_driver = {</div><div class='ctx'> 	.probe = at76_probe,</div><div class='ctx'> 	.disconnect = at76_disconnect,</div><div class='ctx'> 	.id_table = dev_table,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init at76_mod_init(void)</div><div class='hunk'>@@ -2512,10 +2513,8 @@ static void __exit at76_mod_exit(void)</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION " unloading\n");</div><div class='ctx'> 	usb_deregister(&amp;at76_driver);</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(firmwares); i++) {</div><div class='del'>-		if (firmwares[i].fw)</div><div class='del'>-			release_firmware(firmwares[i].fw);</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(firmwares); i++)</div><div class='add'>+		release_firmware(firmwares[i].fw);</div><div class='ctx'> 	led_trigger_unregister_simple(ledtrig_tx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/ahb.c b/drivers/net/wireless/ath/ath5k/ahb.c<br/>index 8c50d9d19d78..aec33cc207fd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/ahb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/ahb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/ahb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/ahb.c</a></div><div class='hunk'>@@ -220,6 +220,7 @@ static int ath_ahb_remove(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ath5k_deinit_ah(ah);</div><div class='add'>+	iounmap(ah-&gt;iobase);</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> 	ieee80211_free_hw(hw);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/ani.c b/drivers/net/wireless/ath/ath5k/ani.c<br/>index 35e93704c4ef..5c008757662b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/ani.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/ani.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/ani.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/ani.c</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'>  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include "ath5k.h"</div><div class='ctx'> #include "reg.h"</div><div class='ctx'> #include "debug.h"</div><div class='hunk'>@@ -728,33 +730,25 @@ void</div><div class='ctx'> ath5k_ani_print_counters(struct ath5k_hw *ah)</div><div class='ctx'> {</div><div class='ctx'> 	/* clears too */</div><div class='del'>-	printk(KERN_NOTICE "ACK fail\t%d\n",</div><div class='del'>-		ath5k_hw_reg_read(ah, AR5K_ACK_FAIL));</div><div class='del'>-	printk(KERN_NOTICE "RTS fail\t%d\n",</div><div class='del'>-		ath5k_hw_reg_read(ah, AR5K_RTS_FAIL));</div><div class='del'>-	printk(KERN_NOTICE "RTS success\t%d\n",</div><div class='del'>-		ath5k_hw_reg_read(ah, AR5K_RTS_OK));</div><div class='del'>-	printk(KERN_NOTICE "FCS error\t%d\n",</div><div class='del'>-		ath5k_hw_reg_read(ah, AR5K_FCS_FAIL));</div><div class='add'>+	pr_notice("ACK fail\t%d\n", ath5k_hw_reg_read(ah, AR5K_ACK_FAIL));</div><div class='add'>+	pr_notice("RTS fail\t%d\n", ath5k_hw_reg_read(ah, AR5K_RTS_FAIL));</div><div class='add'>+	pr_notice("RTS success\t%d\n", ath5k_hw_reg_read(ah, AR5K_RTS_OK));</div><div class='add'>+	pr_notice("FCS error\t%d\n", ath5k_hw_reg_read(ah, AR5K_FCS_FAIL));</div><div class='ctx'> </div><div class='ctx'> 	/* no clear */</div><div class='del'>-	printk(KERN_NOTICE "tx\t%d\n",</div><div class='del'>-		ath5k_hw_reg_read(ah, AR5K_PROFCNT_TX));</div><div class='del'>-	printk(KERN_NOTICE "rx\t%d\n",</div><div class='del'>-		ath5k_hw_reg_read(ah, AR5K_PROFCNT_RX));</div><div class='del'>-	printk(KERN_NOTICE "busy\t%d\n",</div><div class='del'>-		ath5k_hw_reg_read(ah, AR5K_PROFCNT_RXCLR));</div><div class='del'>-	printk(KERN_NOTICE "cycles\t%d\n",</div><div class='del'>-		ath5k_hw_reg_read(ah, AR5K_PROFCNT_CYCLE));</div><div class='del'>-</div><div class='del'>-	printk(KERN_NOTICE "AR5K_PHYERR_CNT1\t%d\n",</div><div class='del'>-		ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT1));</div><div class='del'>-	printk(KERN_NOTICE "AR5K_PHYERR_CNT2\t%d\n",</div><div class='del'>-		ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT2));</div><div class='del'>-	printk(KERN_NOTICE "AR5K_OFDM_FIL_CNT\t%d\n",</div><div class='del'>-		ath5k_hw_reg_read(ah, AR5K_OFDM_FIL_CNT));</div><div class='del'>-	printk(KERN_NOTICE "AR5K_CCK_FIL_CNT\t%d\n",</div><div class='del'>-		ath5k_hw_reg_read(ah, AR5K_CCK_FIL_CNT));</div><div class='add'>+	pr_notice("tx\t%d\n", ath5k_hw_reg_read(ah, AR5K_PROFCNT_TX));</div><div class='add'>+	pr_notice("rx\t%d\n", ath5k_hw_reg_read(ah, AR5K_PROFCNT_RX));</div><div class='add'>+	pr_notice("busy\t%d\n", ath5k_hw_reg_read(ah, AR5K_PROFCNT_RXCLR));</div><div class='add'>+	pr_notice("cycles\t%d\n", ath5k_hw_reg_read(ah, AR5K_PROFCNT_CYCLE));</div><div class='add'>+</div><div class='add'>+	pr_notice("AR5K_PHYERR_CNT1\t%d\n",</div><div class='add'>+		  ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT1));</div><div class='add'>+	pr_notice("AR5K_PHYERR_CNT2\t%d\n",</div><div class='add'>+		  ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT2));</div><div class='add'>+	pr_notice("AR5K_OFDM_FIL_CNT\t%d\n",</div><div class='add'>+		  ath5k_hw_reg_read(ah, AR5K_OFDM_FIL_CNT));</div><div class='add'>+	pr_notice("AR5K_CCK_FIL_CNT\t%d\n",</div><div class='add'>+		  ath5k_hw_reg_read(ah, AR5K_CCK_FIL_CNT));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h<br/>index 8d434b8f5855..64a453a6dfe4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/ath5k.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/ath5k.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/ath5k.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/ath5k.h</a></div><div class='hunk'>@@ -76,26 +76,29 @@</div><div class='ctx'>   GENERIC DRIVER DEFINITIONS</div><div class='ctx'> \****************************/</div><div class='ctx'> </div><div class='del'>-#define ATH5K_PRINTF(fmt, ...) \</div><div class='del'>-	printk(KERN_WARNING "%s: " fmt, __func__, ##__VA_ARGS__)</div><div class='add'>+#define ATH5K_PRINTF(fmt, ...)						\</div><div class='add'>+	pr_warn("%s: " fmt, __func__, ##__VA_ARGS__)</div><div class='ctx'> </div><div class='del'>-#define ATH5K_PRINTK(_sc, _level, _fmt, ...) \</div><div class='del'>-	printk(_level "ath5k %s: " _fmt, \</div><div class='del'>-		((_sc) &amp;&amp; (_sc)-&gt;hw) ? wiphy_name((_sc)-&gt;hw-&gt;wiphy) : "", \</div><div class='del'>-		##__VA_ARGS__)</div><div class='add'>+void __printf(3, 4)</div><div class='add'>+_ath5k_printk(const struct ath5k_hw *ah, const char *level,</div><div class='add'>+	      const char *fmt, ...);</div><div class='ctx'> </div><div class='del'>-#define ATH5K_PRINTK_LIMIT(_sc, _level, _fmt, ...) do { \</div><div class='del'>-	if (net_ratelimit()) \</div><div class='del'>-		ATH5K_PRINTK(_sc, _level, _fmt, ##__VA_ARGS__); \</div><div class='del'>-	} while (0)</div><div class='add'>+#define ATH5K_PRINTK(_sc, _level, _fmt, ...)				\</div><div class='add'>+	_ath5k_printk(_sc, _level, _fmt, ##__VA_ARGS__)</div><div class='ctx'> </div><div class='del'>-#define ATH5K_INFO(_sc, _fmt, ...) \</div><div class='add'>+#define ATH5K_PRINTK_LIMIT(_sc, _level, _fmt, ...)			\</div><div class='add'>+do {									\</div><div class='add'>+	if (net_ratelimit())						\</div><div class='add'>+		ATH5K_PRINTK(_sc, _level, _fmt, ##__VA_ARGS__); 	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define ATH5K_INFO(_sc, _fmt, ...)					\</div><div class='ctx'> 	ATH5K_PRINTK(_sc, KERN_INFO, _fmt, ##__VA_ARGS__)</div><div class='ctx'> </div><div class='del'>-#define ATH5K_WARN(_sc, _fmt, ...) \</div><div class='add'>+#define ATH5K_WARN(_sc, _fmt, ...)					\</div><div class='ctx'> 	ATH5K_PRINTK_LIMIT(_sc, KERN_WARNING, _fmt, ##__VA_ARGS__)</div><div class='ctx'> </div><div class='del'>-#define ATH5K_ERR(_sc, _fmt, ...) \</div><div class='add'>+#define ATH5K_ERR(_sc, _fmt, ...)					\</div><div class='ctx'> 	ATH5K_PRINTK_LIMIT(_sc, KERN_ERR, _fmt, ##__VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1524,7 +1527,7 @@ void ath5k_eeprom_detach(struct ath5k_hw *ah);</div><div class='ctx'> </div><div class='ctx'> /* Protocol Control Unit Functions */</div><div class='ctx'> /* Helpers */</div><div class='del'>-int ath5k_hw_get_frame_duration(struct ath5k_hw *ah,</div><div class='add'>+int ath5k_hw_get_frame_duration(struct ath5k_hw *ah, enum ieee80211_band band,</div><div class='ctx'> 		int len, struct ieee80211_rate *rate, bool shortpre);</div><div class='ctx'> unsigned int ath5k_hw_get_default_slottime(struct ath5k_hw *ah);</div><div class='ctx'> unsigned int ath5k_hw_get_default_sifs(struct ath5k_hw *ah);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/attach.c b/drivers/net/wireless/ath/ath5k/attach.c<br/>index d7114c75fe9b..7106547a14dd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/attach.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/attach.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/attach.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/attach.c</a></div><div class='hunk'>@@ -20,6 +20,8 @@</div><div class='ctx'> * Attach/Detach Functions and helpers *</div><div class='ctx'> \*************************************/</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include "ath5k.h"</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c<br/>index 0e643b016b32..fbaa30930076 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/base.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/base.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/base.c</a></div><div class='hunk'>@@ -40,6 +40,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='hunk'>@@ -460,7 +462,7 @@ void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (iter_data-&gt;need_set_hw_addr &amp;&amp; iter_data-&gt;hw_macaddr)</div><div class='del'>-		if (compare_ether_addr(iter_data-&gt;hw_macaddr, mac) == 0)</div><div class='add'>+		if (ether_addr_equal(iter_data-&gt;hw_macaddr, mac))</div><div class='ctx'> 			iter_data-&gt;need_set_hw_addr = false;</div><div class='ctx'> </div><div class='ctx'> 	if (!iter_data-&gt;any_assoc) {</div><div class='hunk'>@@ -1168,7 +1170,7 @@ ath5k_check_ibss_tsf(struct ath5k_hw *ah, struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	if (ieee80211_is_beacon(mgmt-&gt;frame_control) &amp;&amp;</div><div class='ctx'> 	    le16_to_cpu(mgmt-&gt;u.beacon.capab_info) &amp; WLAN_CAPABILITY_IBSS &amp;&amp;</div><div class='del'>-	    memcmp(mgmt-&gt;bssid, common-&gt;curbssid, ETH_ALEN) == 0) {</div><div class='add'>+	    ether_addr_equal(mgmt-&gt;bssid, common-&gt;curbssid)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Received an IBSS beacon with the same BSSID. Hardware *must*</div><div class='ctx'> 		 * have updated the local TSF. We have to work around various</div><div class='hunk'>@@ -1232,7 +1234,7 @@ ath5k_update_beacon_rssi(struct ath5k_hw *ah, struct sk_buff *skb, int rssi)</div><div class='ctx'> </div><div class='ctx'> 	/* only beacons from our BSSID */</div><div class='ctx'> 	if (!ieee80211_is_beacon(mgmt-&gt;frame_control) ||</div><div class='del'>-	    memcmp(mgmt-&gt;bssid, common-&gt;curbssid, ETH_ALEN) != 0)</div><div class='add'>+	    !ether_addr_equal(mgmt-&gt;bssid, common-&gt;curbssid))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	ewma_add(&amp;ah-&gt;ah_beacon_rssi_avg, rssi);</div><div class='hunk'>@@ -2413,6 +2415,22 @@ ath5k_tx_complete_poll_work(struct work_struct *work)</div><div class='ctx'> * Initialization routines *</div><div class='ctx'> \*************************/</div><div class='ctx'> </div><div class='add'>+static const struct ieee80211_iface_limit if_limits[] = {</div><div class='add'>+	{ .max = 2048,	.types = BIT(NL80211_IFTYPE_STATION) },</div><div class='add'>+	{ .max = 4,	.types =</div><div class='add'>+#ifdef CONFIG_MAC80211_MESH</div><div class='add'>+				 BIT(NL80211_IFTYPE_MESH_POINT) |</div><div class='add'>+#endif</div><div class='add'>+				 BIT(NL80211_IFTYPE_AP) },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ieee80211_iface_combination if_comb = {</div><div class='add'>+	.limits = if_limits,</div><div class='add'>+	.n_limits = ARRAY_SIZE(if_limits),</div><div class='add'>+	.max_interfaces = 2048,</div><div class='add'>+	.num_different_channels = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int __devinit</div><div class='ctx'> ath5k_init_ah(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops)</div><div class='ctx'> {</div><div class='hunk'>@@ -2434,6 +2452,9 @@ ath5k_init_ah(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops)</div><div class='ctx'> 		BIT(NL80211_IFTYPE_ADHOC) |</div><div class='ctx'> 		BIT(NL80211_IFTYPE_MESH_POINT);</div><div class='ctx'> </div><div class='add'>+	hw-&gt;wiphy-&gt;iface_combinations = &amp;if_comb;</div><div class='add'>+	hw-&gt;wiphy-&gt;n_iface_combinations = 1;</div><div class='add'>+</div><div class='ctx'> 	/* SW support for IBSS_RSN is provided by mac80211 */</div><div class='ctx'> 	hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_IBSS_RSN;</div><div class='ctx'> </div><div class='hunk'>@@ -3038,3 +3059,23 @@ ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable)</div><div class='ctx'> 	ath5k_hw_set_rx_filter(ah, rfilt);</div><div class='ctx'> 	ah-&gt;filter_flags = rfilt;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void _ath5k_printk(const struct ath5k_hw *ah, const char *level,</div><div class='add'>+		   const char *fmt, ...)</div><div class='add'>+{</div><div class='add'>+	struct va_format vaf;</div><div class='add'>+	va_list args;</div><div class='add'>+</div><div class='add'>+	va_start(args, fmt);</div><div class='add'>+</div><div class='add'>+	vaf.fmt = fmt;</div><div class='add'>+	vaf.va = &amp;args;</div><div class='add'>+</div><div class='add'>+	if (ah &amp;&amp; ah-&gt;hw)</div><div class='add'>+		printk("%s" pr_fmt("%s: %pV"),</div><div class='add'>+		       level, wiphy_name(ah-&gt;hw-&gt;wiphy), &amp;vaf);</div><div class='add'>+	else</div><div class='add'>+		printk("%s" pr_fmt("%pV"), level, &amp;vaf);</div><div class='add'>+</div><div class='add'>+	va_end(args);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/debug.c b/drivers/net/wireless/ath/ath5k/debug.c<br/>index e5e8f45d86ac..9d00dab666a8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/debug.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/debug.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/debug.c</a></div><div class='hunk'>@@ -57,6 +57,9 @@</div><div class='ctx'>  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='ctx'>  * THE POSSIBILITY OF SUCH DAMAGES.</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -247,10 +250,10 @@ static ssize_t write_file_beacon(struct file *file,</div><div class='ctx'> </div><div class='ctx'> 	if (strncmp(buf, "disable", 7) == 0) {</div><div class='ctx'> 		AR5K_REG_DISABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE);</div><div class='del'>-		printk(KERN_INFO "debugfs disable beacons\n");</div><div class='add'>+		pr_info("debugfs disable beacons\n");</div><div class='ctx'> 	} else if (strncmp(buf, "enable", 6) == 0) {</div><div class='ctx'> 		AR5K_REG_ENABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE);</div><div class='del'>-		printk(KERN_INFO "debugfs enable beacons\n");</div><div class='add'>+		pr_info("debugfs enable beacons\n");</div><div class='ctx'> 	}</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='hunk'>@@ -450,19 +453,19 @@ static ssize_t write_file_antenna(struct file *file,</div><div class='ctx'> </div><div class='ctx'> 	if (strncmp(buf, "diversity", 9) == 0) {</div><div class='ctx'> 		ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_DEFAULT);</div><div class='del'>-		printk(KERN_INFO "ath5k debug: enable diversity\n");</div><div class='add'>+		pr_info("debug: enable diversity\n");</div><div class='ctx'> 	} else if (strncmp(buf, "fixed-a", 7) == 0) {</div><div class='ctx'> 		ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_A);</div><div class='del'>-		printk(KERN_INFO "ath5k debugfs: fixed antenna A\n");</div><div class='add'>+		pr_info("debug: fixed antenna A\n");</div><div class='ctx'> 	} else if (strncmp(buf, "fixed-b", 7) == 0) {</div><div class='ctx'> 		ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_B);</div><div class='del'>-		printk(KERN_INFO "ath5k debug: fixed antenna B\n");</div><div class='add'>+		pr_info("debug: fixed antenna B\n");</div><div class='ctx'> 	} else if (strncmp(buf, "clear", 5) == 0) {</div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(ah-&gt;stats.antenna_rx); i++) {</div><div class='ctx'> 			ah-&gt;stats.antenna_rx[i] = 0;</div><div class='ctx'> 			ah-&gt;stats.antenna_tx[i] = 0;</div><div class='ctx'> 		}</div><div class='del'>-		printk(KERN_INFO "ath5k debug: cleared antenna stats\n");</div><div class='add'>+		pr_info("debug: cleared antenna stats\n");</div><div class='ctx'> 	}</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='hunk'>@@ -632,7 +635,7 @@ static ssize_t write_file_frameerrors(struct file *file,</div><div class='ctx'> 		st-&gt;txerr_fifo = 0;</div><div class='ctx'> 		st-&gt;txerr_filt = 0;</div><div class='ctx'> 		st-&gt;tx_all_count = 0;</div><div class='del'>-		printk(KERN_INFO "ath5k debug: cleared frameerrors stats\n");</div><div class='add'>+		pr_info("debug: cleared frameerrors stats\n");</div><div class='ctx'> 	}</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/desc.c b/drivers/net/wireless/ath/ath5k/desc.c<br/>index f8bfa3ac2af0..bd8d4392d68b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/desc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/desc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/desc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/desc.c</a></div><div class='hunk'>@@ -21,6 +21,8 @@</div><div class='ctx'>  Hardware Descriptor Functions</div><div class='ctx'> \******************************/</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include "ath5k.h"</div><div class='ctx'> #include "reg.h"</div><div class='ctx'> #include "debug.h"</div><div class='hunk'>@@ -441,10 +443,8 @@ ath5k_hw_proc_2word_tx_status(struct ath5k_hw *ah,</div><div class='ctx'> 				struct ath5k_desc *desc,</div><div class='ctx'> 				struct ath5k_tx_status *ts)</div><div class='ctx'> {</div><div class='del'>-	struct ath5k_hw_2w_tx_ctl *tx_ctl;</div><div class='ctx'> 	struct ath5k_hw_tx_status *tx_status;</div><div class='ctx'> </div><div class='del'>-	tx_ctl = &amp;desc-&gt;ud.ds_tx5210.tx_ctl;</div><div class='ctx'> 	tx_status = &amp;desc-&gt;ud.ds_tx5210.tx_stat;</div><div class='ctx'> </div><div class='ctx'> 	/* No frame has been send or error */</div><div class='hunk'>@@ -495,11 +495,9 @@ ath5k_hw_proc_4word_tx_status(struct ath5k_hw *ah,</div><div class='ctx'> 				struct ath5k_desc *desc,</div><div class='ctx'> 				struct ath5k_tx_status *ts)</div><div class='ctx'> {</div><div class='del'>-	struct ath5k_hw_4w_tx_ctl *tx_ctl;</div><div class='ctx'> 	struct ath5k_hw_tx_status *tx_status;</div><div class='ctx'> 	u32 txstat0, txstat1;</div><div class='ctx'> </div><div class='del'>-	tx_ctl = &amp;desc-&gt;ud.ds_tx5212.tx_ctl;</div><div class='ctx'> 	tx_status = &amp;desc-&gt;ud.ds_tx5212.tx_stat;</div><div class='ctx'> </div><div class='ctx'> 	txstat1 = ACCESS_ONCE(tx_status-&gt;tx_status_1);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/dma.c b/drivers/net/wireless/ath/ath5k/dma.c<br/>index 5cc9aa814697..ce86f158423b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/dma.c</a></div><div class='hunk'>@@ -29,6 +29,8 @@</div><div class='ctx'>  * status registers (ISR).</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include "ath5k.h"</div><div class='ctx'> #include "reg.h"</div><div class='ctx'> #include "debug.h"</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c<br/>index cd708c15b774..4026c906cc7b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/eeprom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/eeprom.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/eeprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/eeprom.c</a></div><div class='hunk'>@@ -21,6 +21,8 @@</div><div class='ctx'> * EEPROM access functions and helpers *</div><div class='ctx'> \*************************************/</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ath5k.h"</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/initvals.c b/drivers/net/wireless/ath/ath5k/initvals.c<br/>index a1ea78e05b47..ee1c2fa8b591 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/initvals.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/initvals.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/initvals.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/initvals.c</a></div><div class='hunk'>@@ -19,6 +19,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include "ath5k.h"</div><div class='ctx'> #include "reg.h"</div><div class='ctx'> #include "debug.h"</div><div class='hunk'>@@ -1574,8 +1576,7 @@ ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool skip_pcu)</div><div class='ctx'> </div><div class='ctx'> 		/* AR5K_MODE_11B */</div><div class='ctx'> 		if (mode &gt; 2) {</div><div class='del'>-			ATH5K_ERR(ah,</div><div class='del'>-				"unsupported channel mode: %d\n", mode);</div><div class='add'>+			ATH5K_ERR(ah, "unsupported channel mode: %d\n", mode);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/led.c b/drivers/net/wireless/ath/ath5k/led.c<br/>index c1151c723711..b9f708a45f4e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/led.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/led.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/led.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/led.c</a></div><div class='hunk'>@@ -39,6 +39,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include "ath5k.h"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/mac80211-ops.c b/drivers/net/wireless/ath/ath5k/mac80211-ops.c<br/>index 5c5329955414..22b80af0f47c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/mac80211-ops.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/mac80211-ops.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/mac80211-ops.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/mac80211-ops.c</a></div><div class='hunk'>@@ -41,6 +41,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;net/mac80211.h&gt;</div><div class='ctx'> #include &lt;asm/unaligned.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/pci.c b/drivers/net/wireless/ath/ath5k/pci.c<br/>index 849fa060ebc4..dff48fbc63bf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/pci.c</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'>  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/nl80211.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/pci-aspm.h&gt;</div><div class='hunk'>@@ -45,6 +47,7 @@ static DEFINE_PCI_DEVICE_TABLE(ath5k_pci_id_table) = {</div><div class='ctx'> 	{ PCI_VDEVICE(ATHEROS, 0x001b) }, /* 5413 Eagle */</div><div class='ctx'> 	{ PCI_VDEVICE(ATHEROS, 0x001c) }, /* PCI-E cards */</div><div class='ctx'> 	{ PCI_VDEVICE(ATHEROS, 0x001d) }, /* 2417 Nala */</div><div class='add'>+	{ PCI_VDEVICE(ATHEROS, 0xff1b) }, /* AR5BXB63 */</div><div class='ctx'> 	{ 0 }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, ath5k_pci_id_table);</div><div class='hunk'>@@ -337,28 +340,4 @@ static struct pci_driver ath5k_pci_driver = {</div><div class='ctx'> 	.driver.pm	= ATH5K_PM_OPS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Module init/exit functions</div><div class='del'>- */</div><div class='del'>-static int __init</div><div class='del'>-init_ath5k_pci(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = pci_register_driver(&amp;ath5k_pci_driver);</div><div class='del'>-	if (ret) {</div><div class='del'>-		printk(KERN_ERR "ath5k_pci: can't register pci driver\n");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit</div><div class='del'>-exit_ath5k_pci(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;ath5k_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(init_ath5k_pci);</div><div class='del'>-module_exit(exit_ath5k_pci);</div><div class='add'>+module_pci_driver(ath5k_pci_driver);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c<br/>index cebfd6fd31d3..1f16b4227d8f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/pcu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/pcu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/pcu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/pcu.c</a></div><div class='hunk'>@@ -110,7 +110,7 @@ static const unsigned int ack_rates_high[] =</div><div class='ctx'>  * bwmodes.</div><div class='ctx'>  */</div><div class='ctx'> int</div><div class='del'>-ath5k_hw_get_frame_duration(struct ath5k_hw *ah,</div><div class='add'>+ath5k_hw_get_frame_duration(struct ath5k_hw *ah, enum ieee80211_band band,</div><div class='ctx'> 		int len, struct ieee80211_rate *rate, bool shortpre)</div><div class='ctx'> {</div><div class='ctx'> 	int sifs, preamble, plcp_bits, sym_time;</div><div class='hunk'>@@ -120,7 +120,7 @@ ath5k_hw_get_frame_duration(struct ath5k_hw *ah,</div><div class='ctx'> 	/* Fallback */</div><div class='ctx'> 	if (!ah-&gt;ah_bwmode) {</div><div class='ctx'> 		__le16 raw_dur = ieee80211_generic_frame_duration(ah-&gt;hw,</div><div class='del'>-					NULL, len, rate);</div><div class='add'>+					NULL, band, len, rate);</div><div class='ctx'> </div><div class='ctx'> 		/* subtract difference between long and short preamble */</div><div class='ctx'> 		dur = le16_to_cpu(raw_dur);</div><div class='hunk'>@@ -302,14 +302,15 @@ ath5k_hw_write_rate_duration(struct ath5k_hw *ah)</div><div class='ctx'> 		 * actual rate for this rate. See mac80211 tx.c</div><div class='ctx'> 		 * ieee80211_duration() for a brief description of</div><div class='ctx'> 		 * what rate we should choose to TX ACKs. */</div><div class='del'>-		tx_time = ath5k_hw_get_frame_duration(ah, 10, rate, false);</div><div class='add'>+		tx_time = ath5k_hw_get_frame_duration(ah, band, 10,</div><div class='add'>+					rate, false);</div><div class='ctx'> </div><div class='ctx'> 		ath5k_hw_reg_write(ah, tx_time, reg);</div><div class='ctx'> </div><div class='ctx'> 		if (!(rate-&gt;flags &amp; IEEE80211_RATE_SHORT_PREAMBLE))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		tx_time = ath5k_hw_get_frame_duration(ah, 10, rate, true);</div><div class='add'>+		tx_time = ath5k_hw_get_frame_duration(ah, band, 10, rate, true);</div><div class='ctx'> 		ath5k_hw_reg_write(ah, tx_time,</div><div class='ctx'> 			reg + (AR5K_SET_SHORT_PREAMBLE &lt;&lt; 2));</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c<br/>index 3a2845489a1b..8b71a2d947e0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/phy.c</a></div><div class='hunk'>@@ -22,6 +22,8 @@</div><div class='ctx'> * PHY related functions *</div><div class='ctx'> \***********************/</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;asm/unaligned.h&gt;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c<br/>index 30b50f934172..65fe929529a8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/qcu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/qcu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/qcu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/qcu.c</a></div><div class='hunk'>@@ -20,6 +20,8 @@</div><div class='ctx'> Queue Control Unit, DCF Control Unit Functions</div><div class='ctx'> \********************************************/</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include "ath5k.h"</div><div class='ctx'> #include "reg.h"</div><div class='ctx'> #include "debug.h"</div><div class='hunk'>@@ -563,6 +565,7 @@ ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue)</div><div class='ctx'> int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time)</div><div class='ctx'> {</div><div class='ctx'> 	struct ieee80211_channel *channel = ah-&gt;ah_current_channel;</div><div class='add'>+	enum ieee80211_band band;</div><div class='ctx'> 	struct ieee80211_rate *rate;</div><div class='ctx'> 	u32 ack_tx_time, eifs, eifs_clock, sifs, sifs_clock;</div><div class='ctx'> 	u32 slot_time_clock = ath5k_hw_htoclock(ah, slot_time);</div><div class='hunk'>@@ -598,11 +601,12 @@ int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time)</div><div class='ctx'> 	 * Also we have different lowest rate for 802.11a</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (channel-&gt;band == IEEE80211_BAND_5GHZ)</div><div class='del'>-		rate = &amp;ah-&gt;sbands[IEEE80211_BAND_5GHZ].bitrates[0];</div><div class='add'>+		band = IEEE80211_BAND_5GHZ;</div><div class='ctx'> 	else</div><div class='del'>-		rate = &amp;ah-&gt;sbands[IEEE80211_BAND_2GHZ].bitrates[0];</div><div class='add'>+		band = IEEE80211_BAND_2GHZ;</div><div class='ctx'> </div><div class='del'>-	ack_tx_time = ath5k_hw_get_frame_duration(ah, 10, rate, false);</div><div class='add'>+	rate = &amp;ah-&gt;sbands[band].bitrates[0];</div><div class='add'>+	ack_tx_time = ath5k_hw_get_frame_duration(ah, band, 10, rate, false);</div><div class='ctx'> </div><div class='ctx'> 	/* ack_tx_time includes an SIFS already */</div><div class='ctx'> 	eifs = ack_tx_time + sifs + 2 * slot_time;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c<br/>index 200f165c0c6d..0c2dd4771c36 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/reset.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/reset.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/reset.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/reset.c</a></div><div class='hunk'>@@ -23,6 +23,8 @@</div><div class='ctx'>   Reset function and helpers</div><div class='ctx'> \****************************/</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pci.h&gt;		/* To determine if a card is pci-e */</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath5k/sysfs.c b/drivers/net/wireless/ath/ath5k/sysfs.c<br/>index 9364da7bd131..04cf0ca72610 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/sysfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath5k/sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath5k/sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath5k/sysfs.c</a></div><div class='hunk'>@@ -1,3 +1,5 @@</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/Makefile b/drivers/net/wireless/ath/ath6kl/Makefile<br/>index 85746c3eb027..8cae8886f17d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/Makefile</a></div><div class='hunk'>@@ -25,7 +25,8 @@</div><div class='ctx'> obj-$(CONFIG_ATH6KL) += ath6kl_core.o</div><div class='ctx'> ath6kl_core-y += debug.o</div><div class='ctx'> ath6kl_core-y += hif.o</div><div class='del'>-ath6kl_core-y += htc.o</div><div class='add'>+ath6kl_core-y += htc_mbox.o</div><div class='add'>+ath6kl_core-y += htc_pipe.o</div><div class='ctx'> ath6kl_core-y += bmi.o</div><div class='ctx'> ath6kl_core-y += cfg80211.o</div><div class='ctx'> ath6kl_core-y += init.o</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/cfg80211.c b/drivers/net/wireless/ath/ath6kl/cfg80211.c<br/>index 00d38952b5fb..b869a358ce43 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/cfg80211.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/cfg80211.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/cfg80211.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/cfg80211.c</a></div><div class='hunk'>@@ -15,6 +15,8 @@</div><div class='ctx'>  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/inetdevice.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='hunk'>@@ -49,6 +51,8 @@</div><div class='ctx'> 	.max_power      = 30,                       \</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define DEFAULT_BG_SCAN_PERIOD 60</div><div class='add'>+</div><div class='ctx'> static struct ieee80211_rate ath6kl_rates[] = {</div><div class='ctx'> 	RATETAB_ENT(10, 0x1, 0),</div><div class='ctx'> 	RATETAB_ENT(20, 0x2, 0),</div><div class='hunk'>@@ -69,7 +73,8 @@ static struct ieee80211_rate ath6kl_rates[] = {</div><div class='ctx'> #define ath6kl_g_rates     (ath6kl_rates + 0)</div><div class='ctx'> #define ath6kl_g_rates_size    12</div><div class='ctx'> </div><div class='del'>-#define ath6kl_g_htcap (IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \</div><div class='add'>+#define ath6kl_g_htcap IEEE80211_HT_CAP_SGI_20</div><div class='add'>+#define ath6kl_a_htcap (IEEE80211_HT_CAP_SUP_WIDTH_20_40 | \</div><div class='ctx'> 			IEEE80211_HT_CAP_SGI_20		 | \</div><div class='ctx'> 			IEEE80211_HT_CAP_SGI_40)</div><div class='ctx'> </div><div class='hunk'>@@ -126,7 +131,7 @@ static struct ieee80211_supported_band ath6kl_band_5ghz = {</div><div class='ctx'> 	.channels = ath6kl_5ghz_a_channels,</div><div class='ctx'> 	.n_bitrates = ath6kl_a_rates_size,</div><div class='ctx'> 	.bitrates = ath6kl_a_rates,</div><div class='del'>-	.ht_cap.cap = ath6kl_g_htcap,</div><div class='add'>+	.ht_cap.cap = ath6kl_a_htcap,</div><div class='ctx'> 	.ht_cap.ht_supported = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -607,6 +612,17 @@ static int ath6kl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> 					vif-&gt;req_bssid, vif-&gt;ch_hint,</div><div class='ctx'> 					ar-&gt;connect_ctrl_flags, nw_subtype);</div><div class='ctx'> </div><div class='add'>+	/* disable background scan if period is 0 */</div><div class='add'>+	if (sme-&gt;bg_scan_period == 0)</div><div class='add'>+		sme-&gt;bg_scan_period = 0xffff;</div><div class='add'>+</div><div class='add'>+	/* configure default value if not specified */</div><div class='add'>+	if (sme-&gt;bg_scan_period == -1)</div><div class='add'>+		sme-&gt;bg_scan_period = DEFAULT_BG_SCAN_PERIOD;</div><div class='add'>+</div><div class='add'>+	ath6kl_wmi_scanparams_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx, 0, 0,</div><div class='add'>+				  sme-&gt;bg_scan_period, 0, 0, 0, 3, 0, 0, 0);</div><div class='add'>+</div><div class='ctx'> 	up(&amp;ar-&gt;sem);</div><div class='ctx'> </div><div class='ctx'> 	if (status == -EINVAL) {</div><div class='hunk'>@@ -677,8 +693,8 @@ ath6kl_add_bss_if_needed(struct ath6kl_vif *vif,</div><div class='ctx'> 					  ie, 2 + vif-&gt;ssid_len + beacon_ie_len,</div><div class='ctx'> 					  0, GFP_KERNEL);</div><div class='ctx'> 		if (bss)</div><div class='del'>-			ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "added bss %pM to "</div><div class='del'>-				   "cfg80211\n", bssid);</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_WLAN_CFG,</div><div class='add'>+				   "added bss %pM to cfg80211\n", bssid);</div><div class='ctx'> 		kfree(ie);</div><div class='ctx'> 	} else</div><div class='ctx'> 		ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "cfg80211 already has a bss\n");</div><div class='hunk'>@@ -866,6 +882,32 @@ void ath6kl_cfg80211_disconnect_event(struct ath6kl_vif *vif, u8 reason,</div><div class='ctx'> 	vif-&gt;sme_state = SME_DISCONNECTED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ath6kl_set_probed_ssids(struct ath6kl *ar,</div><div class='add'>+				   struct ath6kl_vif *vif,</div><div class='add'>+				   struct cfg80211_ssid *ssids, int n_ssids)</div><div class='add'>+{</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	if (n_ssids &gt; MAX_PROBED_SSID_INDEX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; n_ssids; i++) {</div><div class='add'>+		ath6kl_wmi_probedssid_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx, i,</div><div class='add'>+					  ssids[i].ssid_len ?</div><div class='add'>+					  SPECIFIC_SSID_FLAG : ANY_SSID_FLAG,</div><div class='add'>+					  ssids[i].ssid_len,</div><div class='add'>+					  ssids[i].ssid);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Make sure no old entries are left behind */</div><div class='add'>+	for (i = n_ssids; i &lt; MAX_PROBED_SSID_INDEX; i++) {</div><div class='add'>+		ath6kl_wmi_probedssid_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx, i,</div><div class='add'>+					  DISABLE_SSID_FLAG, 0, NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ath6kl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,</div><div class='ctx'> 				struct cfg80211_scan_request *request)</div><div class='ctx'> {</div><div class='hunk'>@@ -883,36 +925,25 @@ static int ath6kl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,</div><div class='ctx'> </div><div class='ctx'> 	if (!ar-&gt;usr_bss_filter) {</div><div class='ctx'> 		clear_bit(CLEAR_BSSFILTER_ON_BEACON, &amp;vif-&gt;flags);</div><div class='del'>-		ret = ath6kl_wmi_bssfilter_cmd(</div><div class='del'>-			ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='del'>-			(test_bit(CONNECTED, &amp;vif-&gt;flags) ?</div><div class='del'>-			 ALL_BUT_BSS_FILTER : ALL_BSS_FILTER), 0);</div><div class='add'>+		ret = ath6kl_wmi_bssfilter_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='add'>+					       ALL_BSS_FILTER, 0);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			ath6kl_err("couldn't set bss filtering\n");</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (request-&gt;n_ssids &amp;&amp; request-&gt;ssids[0].ssid_len) {</div><div class='del'>-		u8 i;</div><div class='del'>-</div><div class='del'>-		if (request-&gt;n_ssids &gt; (MAX_PROBED_SSID_INDEX - 1))</div><div class='del'>-			request-&gt;n_ssids = MAX_PROBED_SSID_INDEX - 1;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; request-&gt;n_ssids; i++)</div><div class='del'>-			ath6kl_wmi_probedssid_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='del'>-						  i + 1, SPECIFIC_SSID_FLAG,</div><div class='del'>-						  request-&gt;ssids[i].ssid_len,</div><div class='del'>-						  request-&gt;ssids[i].ssid);</div><div class='del'>-	}</div><div class='add'>+	ret = ath6kl_set_probed_ssids(ar, vif, request-&gt;ssids,</div><div class='add'>+				      request-&gt;n_ssids);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* this also clears IE in fw if it's not set */</div><div class='ctx'> 	ret = ath6kl_wmi_set_appie_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='ctx'> 				       WMI_FRAME_PROBE_REQ,</div><div class='ctx'> 				       request-&gt;ie, request-&gt;ie_len);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		ath6kl_err("failed to set Probe Request appie for "</div><div class='del'>-			   "scan");</div><div class='add'>+		ath6kl_err("failed to set Probe Request appie for scan");</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -929,8 +960,7 @@ static int ath6kl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,</div><div class='ctx'> </div><div class='ctx'> 		channels = kzalloc(n_channels * sizeof(u16), GFP_KERNEL);</div><div class='ctx'> 		if (channels == NULL) {</div><div class='del'>-			ath6kl_warn("failed to set scan channels, "</div><div class='del'>-				    "scan all channels");</div><div class='add'>+			ath6kl_warn("failed to set scan channels, scan all channels");</div><div class='ctx'> 			n_channels = 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -941,6 +971,8 @@ static int ath6kl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,</div><div class='ctx'> 	if (test_bit(CONNECTED, &amp;vif-&gt;flags))</div><div class='ctx'> 		force_fg_scan = 1;</div><div class='ctx'> </div><div class='add'>+	vif-&gt;scan_req = request;</div><div class='add'>+</div><div class='ctx'> 	if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,</div><div class='ctx'> 		     ar-&gt;fw_capabilities)) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -963,10 +995,10 @@ static int ath6kl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,</div><div class='ctx'> 						ATH6KL_FG_SCAN_INTERVAL,</div><div class='ctx'> 						n_channels, channels);</div><div class='ctx'> 	}</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='ctx'> 		ath6kl_err("wmi_startscan_cmd failed\n");</div><div class='del'>-	else</div><div class='del'>-		vif-&gt;scan_req = request;</div><div class='add'>+		vif-&gt;scan_req = NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(channels);</div><div class='ctx'> </div><div class='hunk'>@@ -1000,6 +1032,20 @@ out:</div><div class='ctx'> 	vif-&gt;scan_req = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ath6kl_cfg80211_ch_switch_notify(struct ath6kl_vif *vif, int freq,</div><div class='add'>+				      enum wmi_phy_mode mode)</div><div class='add'>+{</div><div class='add'>+	enum nl80211_channel_type type;</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WLAN_CFG,</div><div class='add'>+		   "channel switch notify nw_type %d freq %d mode %d\n",</div><div class='add'>+		   vif-&gt;nw_type, freq, mode);</div><div class='add'>+</div><div class='add'>+	type = (mode == WMI_11G_HT20) ? NL80211_CHAN_HT20 : NL80211_CHAN_NO_HT;</div><div class='add'>+</div><div class='add'>+	cfg80211_ch_switch_notify(vif-&gt;ndev, freq, type);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,</div><div class='ctx'> 				   u8 key_index, bool pairwise,</div><div class='ctx'> 				   const u8 *mac_addr,</div><div class='hunk'>@@ -1093,9 +1139,8 @@ static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,</div><div class='ctx'> 		ar-&gt;ap_mode_bkey.key_len = key-&gt;key_len;</div><div class='ctx'> 		memcpy(ar-&gt;ap_mode_bkey.key, key-&gt;key, key-&gt;key_len);</div><div class='ctx'> 		if (!test_bit(CONNECTED, &amp;vif-&gt;flags)) {</div><div class='del'>-			ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "Delay initial group "</div><div class='del'>-				   "key configuration until AP mode has been "</div><div class='del'>-				   "started\n");</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_WLAN_CFG,</div><div class='add'>+				   "Delay initial group key configuration until AP mode has been started\n");</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * The key will be set in ath6kl_connect_ap_mode() once</div><div class='ctx'> 			 * the connected event is received from the target.</div><div class='hunk'>@@ -1111,8 +1156,8 @@ static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,</div><div class='ctx'> 		 * the AP mode has properly started</div><div class='ctx'> 		 * (ath6kl_install_statioc_wep_keys).</div><div class='ctx'> 		 */</div><div class='del'>-		ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "Delay WEP key configuration "</div><div class='del'>-			   "until AP mode has been started\n");</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_WLAN_CFG,</div><div class='add'>+			   "Delay WEP key configuration until AP mode has been started\n");</div><div class='ctx'> 		vif-&gt;wep_key_list[key_index].key_len = key-&gt;key_len;</div><div class='ctx'> 		memcpy(vif-&gt;wep_key_list[key_index].key, key-&gt;key,</div><div class='ctx'> 		       key-&gt;key_len);</div><div class='hunk'>@@ -1436,9 +1481,38 @@ static int ath6kl_cfg80211_change_iface(struct wiphy *wiphy,</div><div class='ctx'> 					struct vif_params *params)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath6kl_vif *vif = netdev_priv(ndev);</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "%s: type %u\n", __func__, type);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Don't bring up p2p on an interface which is not initialized</div><div class='add'>+	 * for p2p operation where fw does not have capability to switch</div><div class='add'>+	 * dynamically between non-p2p and p2p type interface.</div><div class='add'>+	 */</div><div class='add'>+	if (!test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,</div><div class='add'>+		      vif-&gt;ar-&gt;fw_capabilities) &amp;&amp;</div><div class='add'>+	    (type == NL80211_IFTYPE_P2P_CLIENT ||</div><div class='add'>+	     type == NL80211_IFTYPE_P2P_GO)) {</div><div class='add'>+		if (vif-&gt;ar-&gt;vif_max == 1) {</div><div class='add'>+			if (vif-&gt;fw_vif_idx != 0)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			else</div><div class='add'>+				goto set_iface_type;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = vif-&gt;ar-&gt;max_norm_iface; i &lt; vif-&gt;ar-&gt;vif_max; i++) {</div><div class='add'>+			if (i == vif-&gt;fw_vif_idx)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (i == vif-&gt;ar-&gt;vif_max) {</div><div class='add'>+			ath6kl_err("Invalid interface to bring up P2P\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+set_iface_type:</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case NL80211_IFTYPE_STATION:</div><div class='ctx'> 		vif-&gt;next_mode = INFRA_NETWORK;</div><div class='hunk'>@@ -1915,8 +1989,7 @@ static int ath6kl_wow_sta(struct ath6kl *ar, struct ath6kl_vif *vif)</div><div class='ctx'> 				sizeof(discvr_pattern), discvr_offset,</div><div class='ctx'> 				discvr_pattern, discvr_mask);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			ath6kl_err("failed to add WOW mDNS/SSDP/LLMNR "</div><div class='del'>-				   "pattern\n");</div><div class='add'>+			ath6kl_err("failed to add WOW mDNS/SSDP/LLMNR pattern\n");</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1924,17 +1997,70 @@ static int ath6kl_wow_sta(struct ath6kl *ar, struct ath6kl_vif *vif)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int is_hsleep_mode_procsed(struct ath6kl_vif *vif)</div><div class='add'>+{</div><div class='add'>+	return test_bit(HOST_SLEEP_MODE_CMD_PROCESSED, &amp;vif-&gt;flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool is_ctrl_ep_empty(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	return !ar-&gt;tx_pending[ar-&gt;ctrl_ep];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_cfg80211_host_sleep(struct ath6kl *ar, struct ath6kl_vif *vif)</div><div class='add'>+{</div><div class='add'>+	int ret, left;</div><div class='add'>+</div><div class='add'>+	clear_bit(HOST_SLEEP_MODE_CMD_PROCESSED, &amp;vif-&gt;flags);</div><div class='add'>+</div><div class='add'>+	ret = ath6kl_wmi_set_host_sleep_mode_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='add'>+						 ATH6KL_HOST_MODE_ASLEEP);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	left = wait_event_interruptible_timeout(ar-&gt;event_wq,</div><div class='add'>+						is_hsleep_mode_procsed(vif),</div><div class='add'>+						WMI_TIMEOUT);</div><div class='add'>+	if (left == 0) {</div><div class='add'>+		ath6kl_warn("timeout, didn't get host sleep cmd processed event\n");</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+	} else if (left &lt; 0) {</div><div class='add'>+		ath6kl_warn("error while waiting for host sleep cmd processed event %d\n",</div><div class='add'>+			    left);</div><div class='add'>+		ret = left;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ar-&gt;tx_pending[ar-&gt;ctrl_ep]) {</div><div class='add'>+		left = wait_event_interruptible_timeout(ar-&gt;event_wq,</div><div class='add'>+							is_ctrl_ep_empty(ar),</div><div class='add'>+							WMI_TIMEOUT);</div><div class='add'>+		if (left == 0) {</div><div class='add'>+			ath6kl_warn("clear wmi ctrl data timeout\n");</div><div class='add'>+			ret = -ETIMEDOUT;</div><div class='add'>+		} else if (left &lt; 0) {</div><div class='add'>+			ath6kl_warn("clear wmi ctrl data failed: %d\n", left);</div><div class='add'>+			ret = left;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ath6kl_wow_suspend(struct ath6kl *ar, struct cfg80211_wowlan *wow)</div><div class='ctx'> {</div><div class='ctx'> 	struct in_device *in_dev;</div><div class='ctx'> 	struct in_ifaddr *ifa;</div><div class='ctx'> 	struct ath6kl_vif *vif;</div><div class='del'>-	int ret, left;</div><div class='add'>+	int ret;</div><div class='ctx'> 	u32 filter = 0;</div><div class='ctx'> 	u16 i, bmiss_time;</div><div class='ctx'> 	u8 index = 0;</div><div class='ctx'> 	__be32 ips[MAX_IP_ADDRS];</div><div class='ctx'> </div><div class='add'>+	/* The FW currently can't support multi-vif WoW properly. */</div><div class='add'>+	if (ar-&gt;num_vif &gt; 1)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='ctx'> 	vif = ath6kl_vif_first(ar);</div><div class='ctx'> 	if (!vif)</div><div class='ctx'> 		return -EIO;</div><div class='hunk'>@@ -1948,6 +2074,13 @@ static int ath6kl_wow_suspend(struct ath6kl *ar, struct cfg80211_wowlan *wow)</div><div class='ctx'> 	if (wow &amp;&amp; (wow-&gt;n_patterns &gt; WOW_MAX_FILTERS_PER_LIST))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (!test_bit(NETDEV_MCAST_ALL_ON, &amp;vif-&gt;flags)) {</div><div class='add'>+		ret = ath6kl_wmi_mcast_filter_cmd(vif-&gt;ar-&gt;wmi,</div><div class='add'>+						vif-&gt;fw_vif_idx, false);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Clear existing WOW patterns */</div><div class='ctx'> 	for (i = 0; i &lt; WOW_MAX_FILTERS_PER_LIST; i++)</div><div class='ctx'> 		ath6kl_wmi_del_wow_pattern_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='hunk'>@@ -2030,39 +2163,11 @@ skip_arp:</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	clear_bit(HOST_SLEEP_MODE_CMD_PROCESSED, &amp;vif-&gt;flags);</div><div class='del'>-</div><div class='del'>-	ret = ath6kl_wmi_set_host_sleep_mode_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='del'>-						 ATH6KL_HOST_MODE_ASLEEP);</div><div class='add'>+	ret = ath6kl_cfg80211_host_sleep(ar, vif);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	left = wait_event_interruptible_timeout(ar-&gt;event_wq,</div><div class='del'>-			test_bit(HOST_SLEEP_MODE_CMD_PROCESSED, &amp;vif-&gt;flags),</div><div class='del'>-			WMI_TIMEOUT);</div><div class='del'>-	if (left == 0) {</div><div class='del'>-		ath6kl_warn("timeout, didn't get host sleep cmd "</div><div class='del'>-			    "processed event\n");</div><div class='del'>-		ret = -ETIMEDOUT;</div><div class='del'>-	} else if (left &lt; 0) {</div><div class='del'>-		ath6kl_warn("error while waiting for host sleep cmd "</div><div class='del'>-			    "processed event %d\n", left);</div><div class='del'>-		ret = left;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ar-&gt;tx_pending[ar-&gt;ctrl_ep]) {</div><div class='del'>-		left = wait_event_interruptible_timeout(ar-&gt;event_wq,</div><div class='del'>-				ar-&gt;tx_pending[ar-&gt;ctrl_ep] == 0, WMI_TIMEOUT);</div><div class='del'>-		if (left == 0) {</div><div class='del'>-			ath6kl_warn("clear wmi ctrl data timeout\n");</div><div class='del'>-			ret = -ETIMEDOUT;</div><div class='del'>-		} else if (left &lt; 0) {</div><div class='del'>-			ath6kl_warn("clear wmi ctrl data failed: %d\n", left);</div><div class='del'>-			ret = left;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath6kl_wow_resume(struct ath6kl *ar)</div><div class='hunk'>@@ -2079,8 +2184,8 @@ static int ath6kl_wow_resume(struct ath6kl *ar)</div><div class='ctx'> 	ret = ath6kl_wmi_set_host_sleep_mode_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='ctx'> 						 ATH6KL_HOST_MODE_AWAKE);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		ath6kl_warn("Failed to configure host sleep mode for "</div><div class='del'>-			    "wow resume: %d\n", ret);</div><div class='add'>+		ath6kl_warn("Failed to configure host sleep mode for wow resume: %d\n",</div><div class='add'>+			    ret);</div><div class='ctx'> 		ar-&gt;state = ATH6KL_STATE_WOW;</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2104,15 +2209,96 @@ static int ath6kl_wow_resume(struct ath6kl *ar)</div><div class='ctx'> </div><div class='ctx'> 	ar-&gt;state = ATH6KL_STATE_ON;</div><div class='ctx'> </div><div class='add'>+	if (!test_bit(NETDEV_MCAST_ALL_OFF, &amp;vif-&gt;flags)) {</div><div class='add'>+		ret = ath6kl_wmi_mcast_filter_cmd(vif-&gt;ar-&gt;wmi,</div><div class='add'>+					vif-&gt;fw_vif_idx, true);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	netif_wake_queue(vif-&gt;ndev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ath6kl_cfg80211_deepsleep_suspend(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_vif *vif;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vif = ath6kl_vif_first(ar);</div><div class='add'>+	if (!vif)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WMI_READY, &amp;ar-&gt;flag)) {</div><div class='add'>+		ath6kl_err("deepsleep failed as wmi is not ready\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath6kl_cfg80211_stop_all(ar);</div><div class='add'>+</div><div class='add'>+	/* Save the current power mode before enabling power save */</div><div class='add'>+	ar-&gt;wmi-&gt;saved_pwr_mode = ar-&gt;wmi-&gt;pwr_mode;</div><div class='add'>+</div><div class='add'>+	ret = ath6kl_wmi_powermode_cmd(ar-&gt;wmi, 0, REC_POWER);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Disable WOW mode */</div><div class='add'>+	ret = ath6kl_wmi_set_wow_mode_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='add'>+					  ATH6KL_WOW_MODE_DISABLE,</div><div class='add'>+					  0, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Flush all non control pkts in TX path */</div><div class='add'>+	ath6kl_tx_data_cleanup(ar);</div><div class='add'>+</div><div class='add'>+	ret = ath6kl_cfg80211_host_sleep(ar, vif);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_cfg80211_deepsleep_resume(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_vif *vif;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vif = ath6kl_vif_first(ar);</div><div class='add'>+</div><div class='add'>+	if (!vif)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	if (ar-&gt;wmi-&gt;pwr_mode != ar-&gt;wmi-&gt;saved_pwr_mode) {</div><div class='add'>+		ret = ath6kl_wmi_powermode_cmd(ar-&gt;wmi, 0,</div><div class='add'>+					       ar-&gt;wmi-&gt;saved_pwr_mode);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ath6kl_wmi_set_host_sleep_mode_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='add'>+						 ATH6KL_HOST_MODE_AWAKE);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ar-&gt;state = ATH6KL_STATE_ON;</div><div class='add'>+</div><div class='add'>+	/* Reset scan parameter to default values */</div><div class='add'>+	ret = ath6kl_wmi_scanparams_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='add'>+					0, 0, 0, 0, 0, 0, 3, 0, 0, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int ath6kl_cfg80211_suspend(struct ath6kl *ar,</div><div class='ctx'> 			    enum ath6kl_cfg_suspend_mode mode,</div><div class='ctx'> 			    struct cfg80211_wowlan *wow)</div><div class='ctx'> {</div><div class='add'>+	struct ath6kl_vif *vif;</div><div class='ctx'> 	enum ath6kl_state prev_state;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -2137,15 +2323,12 @@ int ath6kl_cfg80211_suspend(struct ath6kl *ar,</div><div class='ctx'> </div><div class='ctx'> 	case ATH6KL_CFG_SUSPEND_DEEPSLEEP:</div><div class='ctx'> </div><div class='del'>-		ath6kl_cfg80211_stop_all(ar);</div><div class='del'>-</div><div class='del'>-		/* save the current power mode before enabling power save */</div><div class='del'>-		ar-&gt;wmi-&gt;saved_pwr_mode = ar-&gt;wmi-&gt;pwr_mode;</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_SUSPEND, "deep sleep suspend\n");</div><div class='ctx'> </div><div class='del'>-		ret = ath6kl_wmi_powermode_cmd(ar-&gt;wmi, 0, REC_POWER);</div><div class='add'>+		ret = ath6kl_cfg80211_deepsleep_suspend(ar);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			ath6kl_warn("wmi powermode command failed during suspend: %d\n",</div><div class='del'>-				    ret);</div><div class='add'>+			ath6kl_err("deepsleep suspend failed: %d\n", ret);</div><div class='add'>+			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ar-&gt;state = ATH6KL_STATE_DEEPSLEEP;</div><div class='hunk'>@@ -2185,6 +2368,9 @@ int ath6kl_cfg80211_suspend(struct ath6kl *ar,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	list_for_each_entry(vif, &amp;ar-&gt;vif_list, list)</div><div class='add'>+		ath6kl_cfg80211_scan_complete_event(vif, true);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ath6kl_cfg80211_suspend);</div><div class='hunk'>@@ -2206,17 +2392,13 @@ int ath6kl_cfg80211_resume(struct ath6kl *ar)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case ATH6KL_STATE_DEEPSLEEP:</div><div class='del'>-		if (ar-&gt;wmi-&gt;pwr_mode != ar-&gt;wmi-&gt;saved_pwr_mode) {</div><div class='del'>-			ret = ath6kl_wmi_powermode_cmd(ar-&gt;wmi, 0,</div><div class='del'>-						       ar-&gt;wmi-&gt;saved_pwr_mode);</div><div class='del'>-			if (ret) {</div><div class='del'>-				ath6kl_warn("wmi powermode command failed during resume: %d\n",</div><div class='del'>-					    ret);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ar-&gt;state = ATH6KL_STATE_ON;</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_SUSPEND, "deep sleep resume\n");</div><div class='ctx'> </div><div class='add'>+		ret = ath6kl_cfg80211_deepsleep_resume(ar);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath6kl_warn("deep sleep resume failed: %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case ATH6KL_STATE_CUTPOWER:</div><div class='hunk'>@@ -2290,31 +2472,43 @@ void ath6kl_check_wow_status(struct ath6kl *ar)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static int ath6kl_set_channel(struct wiphy *wiphy, struct net_device *dev,</div><div class='del'>-			      struct ieee80211_channel *chan,</div><div class='del'>-			      enum nl80211_channel_type channel_type)</div><div class='add'>+static int ath6kl_set_htcap(struct ath6kl_vif *vif, enum ieee80211_band band,</div><div class='add'>+			    bool ht_enable)</div><div class='ctx'> {</div><div class='del'>-	struct ath6kl_vif *vif;</div><div class='add'>+	struct ath6kl_htcap *htcap = &amp;vif-&gt;htcap;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * 'dev' could be NULL if a channel change is required for the hardware</div><div class='del'>-	 * device itself, instead of a particular VIF.</div><div class='del'>-	 *</div><div class='del'>-	 * FIXME: To be handled properly when monitor mode is supported.</div><div class='del'>-	 */</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	if (htcap-&gt;ht_enable == ht_enable)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	vif = netdev_priv(dev);</div><div class='add'>+	if (ht_enable) {</div><div class='add'>+		/* Set default ht capabilities */</div><div class='add'>+		htcap-&gt;ht_enable = true;</div><div class='add'>+		htcap-&gt;cap_info = (band == IEEE80211_BAND_2GHZ) ?</div><div class='add'>+				   ath6kl_g_htcap : ath6kl_a_htcap;</div><div class='add'>+		htcap-&gt;ampdu_factor = IEEE80211_HT_MAX_AMPDU_16K;</div><div class='add'>+	} else /* Disable ht */</div><div class='add'>+		memset(htcap, 0, sizeof(*htcap));</div><div class='ctx'> </div><div class='del'>-	if (!ath6kl_cfg80211_ready(vif))</div><div class='del'>-		return -EIO;</div><div class='add'>+	return ath6kl_wmi_set_htcap_cmd(vif-&gt;ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='add'>+					band, htcap);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "%s: center_freq=%u hw_value=%u\n",</div><div class='del'>-		   __func__, chan-&gt;center_freq, chan-&gt;hw_value);</div><div class='del'>-	vif-&gt;next_chan = chan-&gt;center_freq;</div><div class='add'>+static int ath6kl_restore_htcap(struct ath6kl_vif *vif)</div><div class='add'>+{</div><div class='add'>+	struct wiphy *wiphy = vif-&gt;ar-&gt;wiphy;</div><div class='add'>+	int band, ret = 0;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	for (band = 0; band &lt; IEEE80211_NUM_BANDS; band++) {</div><div class='add'>+		if (!wiphy-&gt;bands[band])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = ath6kl_set_htcap(vif, band,</div><div class='add'>+				wiphy-&gt;bands[band]-&gt;ht_cap.ht_supported);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool ath6kl_is_p2p_ie(const u8 *pos)</div><div class='hunk'>@@ -2391,6 +2585,87 @@ static int ath6kl_set_ies(struct ath6kl_vif *vif,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ath6kl_set_channel(struct wiphy *wiphy, struct net_device *dev,</div><div class='add'>+			      struct ieee80211_channel *chan,</div><div class='add'>+			      enum nl80211_channel_type channel_type)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_vif *vif;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * 'dev' could be NULL if a channel change is required for the hardware</div><div class='add'>+	 * device itself, instead of a particular VIF.</div><div class='add'>+	 *</div><div class='add'>+	 * FIXME: To be handled properly when monitor mode is supported.</div><div class='add'>+	 */</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	vif = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!ath6kl_cfg80211_ready(vif))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "%s: center_freq=%u hw_value=%u\n",</div><div class='add'>+		   __func__, chan-&gt;center_freq, chan-&gt;hw_value);</div><div class='add'>+	vif-&gt;next_chan = chan-&gt;center_freq;</div><div class='add'>+	vif-&gt;next_ch_type = channel_type;</div><div class='add'>+	vif-&gt;next_ch_band = chan-&gt;band;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_get_rsn_capab(struct cfg80211_beacon_data *beacon,</div><div class='add'>+				u8 *rsn_capab)</div><div class='add'>+{</div><div class='add'>+	const u8 *rsn_ie;</div><div class='add'>+	size_t rsn_ie_len;</div><div class='add'>+	u16 cnt;</div><div class='add'>+</div><div class='add'>+	if (!beacon-&gt;tail)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rsn_ie = cfg80211_find_ie(WLAN_EID_RSN, beacon-&gt;tail, beacon-&gt;tail_len);</div><div class='add'>+	if (!rsn_ie)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rsn_ie_len = *(rsn_ie + 1);</div><div class='add'>+	/* skip element id and length */</div><div class='add'>+	rsn_ie += 2;</div><div class='add'>+</div><div class='add'>+	/* skip version */</div><div class='add'>+	if (rsn_ie_len &lt; 2)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	rsn_ie +=  2;</div><div class='add'>+	rsn_ie_len -= 2;</div><div class='add'>+</div><div class='add'>+	/* skip group cipher suite */</div><div class='add'>+	if (rsn_ie_len &lt; 4)</div><div class='add'>+		return 0;</div><div class='add'>+	rsn_ie +=  4;</div><div class='add'>+	rsn_ie_len -= 4;</div><div class='add'>+</div><div class='add'>+	/* skip pairwise cipher suite */</div><div class='add'>+	if (rsn_ie_len &lt; 2)</div><div class='add'>+		return 0;</div><div class='add'>+	cnt = get_unaligned_le16(rsn_ie);</div><div class='add'>+	rsn_ie += (2 + cnt * 4);</div><div class='add'>+	rsn_ie_len -= (2 + cnt * 4);</div><div class='add'>+</div><div class='add'>+	/* skip akm suite */</div><div class='add'>+	if (rsn_ie_len &lt; 2)</div><div class='add'>+		return 0;</div><div class='add'>+	cnt = get_unaligned_le16(rsn_ie);</div><div class='add'>+	rsn_ie += (2 + cnt * 4);</div><div class='add'>+	rsn_ie_len -= (2 + cnt * 4);</div><div class='add'>+</div><div class='add'>+	if (rsn_ie_len &lt; 2)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	memcpy(rsn_capab, rsn_ie, 2);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ath6kl_start_ap(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> 			   struct cfg80211_ap_settings *info)</div><div class='ctx'> {</div><div class='hunk'>@@ -2403,6 +2678,7 @@ static int ath6kl_start_ap(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> 	struct wmi_connect_cmd p;</div><div class='ctx'> 	int res;</div><div class='ctx'> 	int i, ret;</div><div class='add'>+	u16 rsn_capab = 0;</div><div class='ctx'> </div><div class='ctx'> 	ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "%s:\n", __func__);</div><div class='ctx'> </div><div class='hunk'>@@ -2532,6 +2808,35 @@ static int ath6kl_start_ap(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> 		p.nw_subtype = SUBTYPE_NONE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (info-&gt;inactivity_timeout) {</div><div class='add'>+		res = ath6kl_wmi_set_inact_period(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='add'>+						  info-&gt;inactivity_timeout);</div><div class='add'>+		if (res &lt; 0)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ath6kl_set_htcap(vif, vif-&gt;next_ch_band,</div><div class='add'>+			     vif-&gt;next_ch_type != NL80211_CHAN_NO_HT))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Get the PTKSA replay counter in the RSN IE. Supplicant</div><div class='add'>+	 * will use the RSN IE in M3 message and firmware has to</div><div class='add'>+	 * advertise the same in beacon/probe response. Send</div><div class='add'>+	 * the complete RSN IE capability field to firmware</div><div class='add'>+	 */</div><div class='add'>+	if (!ath6kl_get_rsn_capab(&amp;info-&gt;beacon, (u8 *) &amp;rsn_capab) &amp;&amp;</div><div class='add'>+	    test_bit(ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE,</div><div class='add'>+		     ar-&gt;fw_capabilities)) {</div><div class='add'>+		res = ath6kl_wmi_set_ie_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='add'>+					    WLAN_EID_RSN, WMI_RSN_IE_CAPB,</div><div class='add'>+					    (const u8 *) &amp;rsn_capab,</div><div class='add'>+					    sizeof(rsn_capab));</div><div class='add'>+		if (res &lt; 0)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;vif-&gt;profile, &amp;p, sizeof(p));</div><div class='ctx'> 	res = ath6kl_wmi_ap_profile_commit(ar-&gt;wmi, vif-&gt;fw_vif_idx, &amp;p);</div><div class='ctx'> 	if (res &lt; 0)</div><div class='ctx'> 		return res;</div><div class='hunk'>@@ -2566,7 +2871,8 @@ static int ath6kl_stop_ap(struct wiphy *wiphy, struct net_device *dev)</div><div class='ctx'> 	ath6kl_wmi_disconnect_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx);</div><div class='ctx'> 	clear_bit(CONNECTED, &amp;vif-&gt;flags);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* Restore ht setting in firmware */</div><div class='add'>+	return ath6kl_restore_htcap(vif);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };</div><div class='hunk'>@@ -2747,6 +3053,21 @@ static bool ath6kl_mgmt_powersave_ap(struct ath6kl_vif *vif,</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Check if SSID length is greater than DIRECT- */</div><div class='add'>+static bool ath6kl_is_p2p_go_ssid(const u8 *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	const struct ieee80211_mgmt *mgmt;</div><div class='add'>+	mgmt = (const struct ieee80211_mgmt *) buf;</div><div class='add'>+</div><div class='add'>+	/* variable[1] contains the SSID tag length */</div><div class='add'>+	if (buf + len &gt;= &amp;mgmt-&gt;u.probe_resp.variable[1] &amp;&amp;</div><div class='add'>+	    (mgmt-&gt;u.probe_resp.variable[1] &gt; P2P_WILDCARD_SSID_LEN)) {</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ath6kl_mgmt_tx(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> 			  struct ieee80211_channel *chan, bool offchan,</div><div class='ctx'> 			  enum nl80211_channel_type channel_type,</div><div class='hunk'>@@ -2761,11 +3082,11 @@ static int ath6kl_mgmt_tx(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> 	bool more_data, queued;</div><div class='ctx'> </div><div class='ctx'> 	mgmt = (const struct ieee80211_mgmt *) buf;</div><div class='del'>-	if (buf + len &gt;= mgmt-&gt;u.probe_resp.variable &amp;&amp;</div><div class='del'>-	    vif-&gt;nw_type == AP_NETWORK &amp;&amp; test_bit(CONNECTED, &amp;vif-&gt;flags) &amp;&amp;</div><div class='del'>-	    ieee80211_is_probe_resp(mgmt-&gt;frame_control)) {</div><div class='add'>+	if (vif-&gt;nw_type == AP_NETWORK &amp;&amp; test_bit(CONNECTED, &amp;vif-&gt;flags) &amp;&amp;</div><div class='add'>+	    ieee80211_is_probe_resp(mgmt-&gt;frame_control) &amp;&amp;</div><div class='add'>+	    ath6kl_is_p2p_go_ssid(buf, len)) {</div><div class='ctx'> 		/*</div><div class='del'>-		 * Send Probe Response frame in AP mode using a separate WMI</div><div class='add'>+		 * Send Probe Response frame in GO mode using a separate WMI</div><div class='ctx'> 		 * command to allow the target to fill in the generic IEs.</div><div class='ctx'> 		 */</div><div class='ctx'> 		*cookie = 0; /* TX status not supported */</div><div class='hunk'>@@ -2825,7 +3146,6 @@ static int ath6kl_cfg80211_sscan_start(struct wiphy *wiphy,</div><div class='ctx'> 	struct ath6kl_vif *vif = netdev_priv(dev);</div><div class='ctx'> 	u16 interval;</div><div class='ctx'> 	int ret;</div><div class='del'>-	u8 i;</div><div class='ctx'> </div><div class='ctx'> 	if (ar-&gt;state != ATH6KL_STATE_ON)</div><div class='ctx'> 		return -EIO;</div><div class='hunk'>@@ -2833,27 +3153,23 @@ static int ath6kl_cfg80211_sscan_start(struct wiphy *wiphy,</div><div class='ctx'> 	if (vif-&gt;sme_state != SME_DISCONNECTED)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ar-&gt;wiphy-&gt;max_sched_scan_ssids; i++) {</div><div class='del'>-		ath6kl_wmi_probedssid_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='del'>-					  i, DISABLE_SSID_FLAG,</div><div class='del'>-					  0, NULL);</div><div class='del'>-	}</div><div class='add'>+	/* The FW currently can't support multi-vif WoW properly. */</div><div class='add'>+	if (ar-&gt;num_vif &gt; 1)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	ath6kl_cfg80211_scan_complete_event(vif, true);</div><div class='add'>+</div><div class='add'>+	ret = ath6kl_set_probed_ssids(ar, vif, request-&gt;ssids,</div><div class='add'>+				      request-&gt;n_ssids);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* fw uses seconds, also make sure that it's &gt;0 */</div><div class='ctx'> 	interval = max_t(u16, 1, request-&gt;interval / 1000);</div><div class='ctx'> </div><div class='ctx'> 	ath6kl_wmi_scanparams_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='ctx'> 				  interval, interval,</div><div class='del'>-				  10, 0, 0, 0, 3, 0, 0, 0);</div><div class='del'>-</div><div class='del'>-	if (request-&gt;n_ssids &amp;&amp; request-&gt;ssids[0].ssid_len) {</div><div class='del'>-		for (i = 0; i &lt; request-&gt;n_ssids; i++) {</div><div class='del'>-			ath6kl_wmi_probedssid_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='del'>-						  i, SPECIFIC_SSID_FLAG,</div><div class='del'>-						  request-&gt;ssids[i].ssid_len,</div><div class='del'>-						  request-&gt;ssids[i].ssid);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+				  vif-&gt;bg_scan_period, 0, 0, 0, 3, 0, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	ret = ath6kl_wmi_set_wow_mode_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='ctx'> 					  ATH6KL_WOW_MODE_ENABLE,</div><div class='hunk'>@@ -3013,8 +3329,7 @@ void ath6kl_cfg80211_stop_all(struct ath6kl *ar)</div><div class='ctx'> 		ar-&gt;wmi-&gt;saved_pwr_mode = ar-&gt;wmi-&gt;pwr_mode;</div><div class='ctx'> </div><div class='ctx'> 		if (ath6kl_wmi_powermode_cmd(ar-&gt;wmi, 0, REC_POWER) != 0)</div><div class='del'>-			ath6kl_warn("ath6kl_deep_sleep_enable: "</div><div class='del'>-				    "wmi_powermode_cmd failed\n");</div><div class='add'>+			ath6kl_warn("ath6kl_deep_sleep_enable: wmi_powermode_cmd failed\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3094,6 +3409,8 @@ struct net_device *ath6kl_interface_add(struct ath6kl *ar, char *name,</div><div class='ctx'> 	vif-&gt;next_mode = nw_type;</div><div class='ctx'> 	vif-&gt;listen_intvl_t = ATH6KL_DEFAULT_LISTEN_INTVAL;</div><div class='ctx'> 	vif-&gt;bmiss_time_t = ATH6KL_DEFAULT_BMISS_TIME;</div><div class='add'>+	vif-&gt;bg_scan_period = 0;</div><div class='add'>+	vif-&gt;htcap.ht_enable = true;</div><div class='ctx'> </div><div class='ctx'> 	memcpy(ndev-&gt;dev_addr, ar-&gt;mac_addr, ETH_ALEN);</div><div class='ctx'> 	if (fw_vif_idx != 0)</div><div class='hunk'>@@ -3134,6 +3451,7 @@ err:</div><div class='ctx'> int ath6kl_cfg80211_init(struct ath6kl *ar)</div><div class='ctx'> {</div><div class='ctx'> 	struct wiphy *wiphy = ar-&gt;wiphy;</div><div class='add'>+	bool band_2gig = false, band_5gig = false, ht = false;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	wiphy-&gt;mgmt_stypes = ath6kl_mgmt_stypes;</div><div class='hunk'>@@ -3154,8 +3472,46 @@ int ath6kl_cfg80211_init(struct ath6kl *ar)</div><div class='ctx'> 	/* max num of ssids that can be probed during scanning */</div><div class='ctx'> 	wiphy-&gt;max_scan_ssids = MAX_PROBED_SSID_INDEX;</div><div class='ctx'> 	wiphy-&gt;max_scan_ie_len = 1000; /* FIX: what is correct limit? */</div><div class='del'>-	wiphy-&gt;bands[IEEE80211_BAND_2GHZ] = &amp;ath6kl_band_2ghz;</div><div class='del'>-	wiphy-&gt;bands[IEEE80211_BAND_5GHZ] = &amp;ath6kl_band_5ghz;</div><div class='add'>+	switch (ar-&gt;hw.cap) {</div><div class='add'>+	case WMI_11AN_CAP:</div><div class='add'>+		ht = true;</div><div class='add'>+	case WMI_11A_CAP:</div><div class='add'>+		band_5gig = true;</div><div class='add'>+		break;</div><div class='add'>+	case WMI_11GN_CAP:</div><div class='add'>+		ht = true;</div><div class='add'>+	case WMI_11G_CAP:</div><div class='add'>+		band_2gig = true;</div><div class='add'>+		break;</div><div class='add'>+	case WMI_11AGN_CAP:</div><div class='add'>+		ht = true;</div><div class='add'>+	case WMI_11AG_CAP:</div><div class='add'>+		band_2gig = true;</div><div class='add'>+		band_5gig = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ath6kl_err("invalid phy capability!\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Even if the fw has HT support, advertise HT cap only when</div><div class='add'>+	 * the firmware has support to override RSN capability, otherwise</div><div class='add'>+	 * 4-way handshake would fail.</div><div class='add'>+	 */</div><div class='add'>+	if (!(ht &amp;&amp;</div><div class='add'>+	      test_bit(ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE,</div><div class='add'>+		       ar-&gt;fw_capabilities))) {</div><div class='add'>+		ath6kl_band_2ghz.ht_cap.cap = 0;</div><div class='add'>+		ath6kl_band_2ghz.ht_cap.ht_supported = false;</div><div class='add'>+		ath6kl_band_5ghz.ht_cap.cap = 0;</div><div class='add'>+		ath6kl_band_5ghz.ht_cap.ht_supported = false;</div><div class='add'>+	}</div><div class='add'>+	if (band_2gig)</div><div class='add'>+		wiphy-&gt;bands[IEEE80211_BAND_2GHZ] = &amp;ath6kl_band_2ghz;</div><div class='add'>+	if (band_5gig)</div><div class='add'>+		wiphy-&gt;bands[IEEE80211_BAND_5GHZ] = &amp;ath6kl_band_5ghz;</div><div class='add'>+</div><div class='ctx'> 	wiphy-&gt;signal_type = CFG80211_SIGNAL_TYPE_MBM;</div><div class='ctx'> </div><div class='ctx'> 	wiphy-&gt;cipher_suites = cipher_suites;</div><div class='hunk'>@@ -3171,7 +3527,7 @@ int ath6kl_cfg80211_init(struct ath6kl *ar)</div><div class='ctx'> 	wiphy-&gt;wowlan.pattern_min_len = 1;</div><div class='ctx'> 	wiphy-&gt;wowlan.pattern_max_len = WOW_PATTERN_SIZE;</div><div class='ctx'> </div><div class='del'>-	wiphy-&gt;max_sched_scan_ssids = 10;</div><div class='add'>+	wiphy-&gt;max_sched_scan_ssids = MAX_PROBED_SSID_INDEX;</div><div class='ctx'> </div><div class='ctx'> 	ar-&gt;wiphy-&gt;flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |</div><div class='ctx'> 			    WIPHY_FLAG_HAVE_AP_SME |</div><div class='hunk'>@@ -3181,11 +3537,14 @@ int ath6kl_cfg80211_init(struct ath6kl *ar)</div><div class='ctx'> 	if (test_bit(ATH6KL_FW_CAPABILITY_SCHED_SCAN, ar-&gt;fw_capabilities))</div><div class='ctx'> 		ar-&gt;wiphy-&gt;flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN;</div><div class='ctx'> </div><div class='add'>+	if (test_bit(ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT,</div><div class='add'>+		     ar-&gt;fw_capabilities))</div><div class='add'>+		ar-&gt;wiphy-&gt;features = NL80211_FEATURE_INACTIVITY_TIMER;</div><div class='add'>+</div><div class='ctx'> 	ar-&gt;wiphy-&gt;probe_resp_offload =</div><div class='ctx'> 		NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS |</div><div class='ctx'> 		NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 |</div><div class='del'>-		NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P |</div><div class='del'>-		NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U;</div><div class='add'>+		NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P;</div><div class='ctx'> </div><div class='ctx'> 	ret = wiphy_register(wiphy);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/cfg80211.h b/drivers/net/wireless/ath/ath6kl/cfg80211.h<br/>index c5def436417f..5ea8cbb79f43 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/cfg80211.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/cfg80211.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/cfg80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/cfg80211.h</a></div><div class='hunk'>@@ -28,6 +28,8 @@ enum ath6kl_cfg_suspend_mode {</div><div class='ctx'> struct net_device *ath6kl_interface_add(struct ath6kl *ar, char *name,</div><div class='ctx'> 					enum nl80211_iftype type,</div><div class='ctx'> 					u8 fw_vif_idx, u8 nw_type);</div><div class='add'>+void ath6kl_cfg80211_ch_switch_notify(struct ath6kl_vif *vif, int freq,</div><div class='add'>+				      enum wmi_phy_mode mode);</div><div class='ctx'> void ath6kl_cfg80211_scan_complete_event(struct ath6kl_vif *vif, bool aborted);</div><div class='ctx'> </div><div class='ctx'> void ath6kl_cfg80211_connect_event(struct ath6kl_vif *vif, u16 channel,</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/common.h b/drivers/net/wireless/ath/ath6kl/common.h<br/>index a60e78c0472f..98a886154d9c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/common.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/common.h</a></div><div class='hunk'>@@ -22,7 +22,8 @@</div><div class='ctx'> </div><div class='ctx'> #define ATH6KL_MAX_IE			256</div><div class='ctx'> </div><div class='del'>-extern int ath6kl_printk(const char *level, const char *fmt, ...);</div><div class='add'>+extern __printf(2, 3)</div><div class='add'>+int ath6kl_printk(const char *level, const char *fmt, ...);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Reflects the version of binary interface exposed by ATH6KL target</div><div class='hunk'>@@ -77,6 +78,7 @@ enum crypto_type {</div><div class='ctx'> </div><div class='ctx'> struct htc_endpoint_credit_dist;</div><div class='ctx'> struct ath6kl;</div><div class='add'>+struct ath6kl_htcap;</div><div class='ctx'> enum htc_credit_dist_reason;</div><div class='ctx'> struct ath6kl_htc_credit_info;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/core.c b/drivers/net/wireless/ath/ath6kl/core.c<br/>index 45e641f3a41b..fdb3b1decc76 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/core.c</a></div><div class='hunk'>@@ -20,9 +20,11 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "hif-ops.h"</div><div class='add'>+#include "htc-ops.h"</div><div class='ctx'> #include "cfg80211.h"</div><div class='ctx'> </div><div class='ctx'> unsigned int debug_mask;</div><div class='hunk'>@@ -39,12 +41,36 @@ module_param(uart_debug, uint, 0644);</div><div class='ctx'> module_param(ath6kl_p2p, uint, 0644);</div><div class='ctx'> module_param(testmode, uint, 0644);</div><div class='ctx'> </div><div class='del'>-int ath6kl_core_init(struct ath6kl *ar)</div><div class='add'>+void ath6kl_core_tx_complete(struct ath6kl *ar, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	ath6kl_htc_tx_complete(ar, skb);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ath6kl_core_tx_complete);</div><div class='add'>+</div><div class='add'>+void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe)</div><div class='add'>+{</div><div class='add'>+	ath6kl_htc_rx_complete(ar, skb, pipe);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ath6kl_core_rx_complete);</div><div class='add'>+</div><div class='add'>+int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath6kl_bmi_target_info targ_info;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	int ret = 0, i;</div><div class='ctx'> </div><div class='add'>+	switch (htc_type) {</div><div class='add'>+	case ATH6KL_HTC_TYPE_MBOX:</div><div class='add'>+		ath6kl_htc_mbox_attach(ar);</div><div class='add'>+		break;</div><div class='add'>+	case ATH6KL_HTC_TYPE_PIPE:</div><div class='add'>+		ath6kl_htc_pipe_attach(ar);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON(1);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ar-&gt;ath6kl_wq = create_singlethread_workqueue("ath6kl");</div><div class='ctx'> 	if (!ar-&gt;ath6kl_wq)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -280,7 +306,7 @@ void ath6kl_core_cleanup(struct ath6kl *ar)</div><div class='ctx'> </div><div class='ctx'> 	kfree(ar-&gt;fw_board);</div><div class='ctx'> 	kfree(ar-&gt;fw_otp);</div><div class='del'>-	kfree(ar-&gt;fw);</div><div class='add'>+	vfree(ar-&gt;fw);</div><div class='ctx'> 	kfree(ar-&gt;fw_patch);</div><div class='ctx'> 	kfree(ar-&gt;fw_testscript);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/core.h b/drivers/net/wireless/ath/ath6kl/core.h<br/>index f1dd8906be45..4d9c6f142698 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/core.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/core.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/core.h</a></div><div class='hunk'>@@ -91,6 +91,15 @@ enum ath6kl_fw_capability {</div><div class='ctx'> 	 */</div><div class='ctx'> 	ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Firmware has support to cleanup inactive stations</div><div class='add'>+	 * in AP mode.</div><div class='add'>+	 */</div><div class='add'>+	ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT,</div><div class='add'>+</div><div class='add'>+	/* Firmware has support to override rsn cap of rsn ie */</div><div class='add'>+	ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE,</div><div class='add'>+</div><div class='ctx'> 	/* this needs to be last */</div><div class='ctx'> 	ATH6KL_FW_CAPABILITY_MAX,</div><div class='ctx'> };</div><div class='hunk'>@@ -117,9 +126,9 @@ struct ath6kl_fw_ie {</div><div class='ctx'> #define AR6003_HW_2_0_FIRMWARE_FILE		"athwlan.bin.z77"</div><div class='ctx'> #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE	"athtcmd_ram.bin"</div><div class='ctx'> #define AR6003_HW_2_0_PATCH_FILE		"data.patch.bin"</div><div class='del'>-#define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin"</div><div class='add'>+#define AR6003_HW_2_0_BOARD_DATA_FILE AR6003_HW_2_0_FW_DIR "/bdata.bin"</div><div class='ctx'> #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \</div><div class='del'>-			"ath6k/AR6003/hw2.0/bdata.SD31.bin"</div><div class='add'>+			AR6003_HW_2_0_FW_DIR "/bdata.SD31.bin"</div><div class='ctx'> </div><div class='ctx'> /* AR6003 3.0 definitions */</div><div class='ctx'> #define AR6003_HW_2_1_1_VERSION                 0x30000582</div><div class='hunk'>@@ -130,25 +139,33 @@ struct ath6kl_fw_ie {</div><div class='ctx'> #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE	"utf.bin"</div><div class='ctx'> #define AR6003_HW_2_1_1_TESTSCRIPT_FILE	"nullTestFlow.bin"</div><div class='ctx'> #define AR6003_HW_2_1_1_PATCH_FILE		"data.patch.bin"</div><div class='del'>-#define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin"</div><div class='add'>+#define AR6003_HW_2_1_1_BOARD_DATA_FILE AR6003_HW_2_1_1_FW_DIR "/bdata.bin"</div><div class='ctx'> #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE	\</div><div class='del'>-			"ath6k/AR6003/hw2.1.1/bdata.SD31.bin"</div><div class='add'>+			AR6003_HW_2_1_1_FW_DIR "/bdata.SD31.bin"</div><div class='ctx'> </div><div class='ctx'> /* AR6004 1.0 definitions */</div><div class='ctx'> #define AR6004_HW_1_0_VERSION                 0x30000623</div><div class='ctx'> #define AR6004_HW_1_0_FW_DIR			"ath6k/AR6004/hw1.0"</div><div class='ctx'> #define AR6004_HW_1_0_FIRMWARE_FILE		"fw.ram.bin"</div><div class='del'>-#define AR6004_HW_1_0_BOARD_DATA_FILE         "ath6k/AR6004/hw1.0/bdata.bin"</div><div class='add'>+#define AR6004_HW_1_0_BOARD_DATA_FILE         AR6004_HW_1_0_FW_DIR "/bdata.bin"</div><div class='ctx'> #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \</div><div class='del'>-	"ath6k/AR6004/hw1.0/bdata.DB132.bin"</div><div class='add'>+	AR6004_HW_1_0_FW_DIR "/bdata.DB132.bin"</div><div class='ctx'> </div><div class='ctx'> /* AR6004 1.1 definitions */</div><div class='ctx'> #define AR6004_HW_1_1_VERSION                 0x30000001</div><div class='ctx'> #define AR6004_HW_1_1_FW_DIR			"ath6k/AR6004/hw1.1"</div><div class='ctx'> #define AR6004_HW_1_1_FIRMWARE_FILE		"fw.ram.bin"</div><div class='del'>-#define AR6004_HW_1_1_BOARD_DATA_FILE         "ath6k/AR6004/hw1.1/bdata.bin"</div><div class='add'>+#define AR6004_HW_1_1_BOARD_DATA_FILE         AR6004_HW_1_1_FW_DIR "/bdata.bin"</div><div class='ctx'> #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \</div><div class='del'>-	"ath6k/AR6004/hw1.1/bdata.DB132.bin"</div><div class='add'>+	AR6004_HW_1_1_FW_DIR "/bdata.DB132.bin"</div><div class='add'>+</div><div class='add'>+/* AR6004 1.2 definitions */</div><div class='add'>+#define AR6004_HW_1_2_VERSION                 0x300007e8</div><div class='add'>+#define AR6004_HW_1_2_FW_DIR			"ath6k/AR6004/hw1.2"</div><div class='add'>+#define AR6004_HW_1_2_FIRMWARE_FILE           "fw.ram.bin"</div><div class='add'>+#define AR6004_HW_1_2_BOARD_DATA_FILE         AR6004_HW_1_2_FW_DIR "/bdata.bin"</div><div class='add'>+#define AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE \</div><div class='add'>+	AR6004_HW_1_2_FW_DIR "/bdata.bin"</div><div class='ctx'> </div><div class='ctx'> /* Per STA data, used in AP mode */</div><div class='ctx'> #define STA_PS_AWAKE		BIT(0)</div><div class='hunk'>@@ -205,6 +222,8 @@ struct ath6kl_fw_ie {</div><div class='ctx'> #define ATH6KL_CONF_ENABLE_TX_BURST		BIT(3)</div><div class='ctx'> #define ATH6KL_CONF_UART_DEBUG			BIT(4)</div><div class='ctx'> </div><div class='add'>+#define P2P_WILDCARD_SSID_LEN			7 /* DIRECT- */</div><div class='add'>+</div><div class='ctx'> enum wlan_low_pwr_state {</div><div class='ctx'> 	WLAN_POWER_STATE_ON,</div><div class='ctx'> 	WLAN_POWER_STATE_CUT_PWR,</div><div class='hunk'>@@ -454,6 +473,11 @@ enum ath6kl_hif_type {</div><div class='ctx'> 	ATH6KL_HIF_TYPE_USB,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum ath6kl_htc_type {</div><div class='add'>+	ATH6KL_HTC_TYPE_MBOX,</div><div class='add'>+	ATH6KL_HTC_TYPE_PIPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Max number of filters that hw supports */</div><div class='ctx'> #define ATH6K_MAX_MC_FILTERS_PER_LIST 7</div><div class='ctx'> struct ath6kl_mc_filter {</div><div class='hunk'>@@ -461,6 +485,12 @@ struct ath6kl_mc_filter {</div><div class='ctx'> 	char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ath6kl_htcap {</div><div class='add'>+	bool ht_enable;</div><div class='add'>+	u8 ampdu_factor;</div><div class='add'>+	unsigned short cap_info;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Driver's maximum limit, note that some firmwares support only one vif</div><div class='ctx'>  * and the runtime (current) limit must be checked from ar-&gt;vif_max.</div><div class='hunk'>@@ -480,6 +510,8 @@ enum ath6kl_vif_state {</div><div class='ctx'> 	WLAN_ENABLED,</div><div class='ctx'> 	STATS_UPDATE_PEND,</div><div class='ctx'> 	HOST_SLEEP_MODE_CMD_PROCESSED,</div><div class='add'>+	NETDEV_MCAST_ALL_ON,</div><div class='add'>+	NETDEV_MCAST_ALL_OFF,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath6kl_vif {</div><div class='hunk'>@@ -509,6 +541,7 @@ struct ath6kl_vif {</div><div class='ctx'> 	struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];</div><div class='ctx'> 	struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];</div><div class='ctx'> 	struct aggr_info *aggr_cntxt;</div><div class='add'>+	struct ath6kl_htcap htcap;</div><div class='ctx'> </div><div class='ctx'> 	struct timer_list disconnect_timer;</div><div class='ctx'> 	struct timer_list sched_scan_timer;</div><div class='hunk'>@@ -521,12 +554,16 @@ struct ath6kl_vif {</div><div class='ctx'> 	u32 send_action_id;</div><div class='ctx'> 	bool probe_req_report;</div><div class='ctx'> 	u16 next_chan;</div><div class='add'>+	enum nl80211_channel_type next_ch_type;</div><div class='add'>+	enum ieee80211_band next_ch_band;</div><div class='ctx'> 	u16 assoc_bss_beacon_int;</div><div class='ctx'> 	u16 listen_intvl_t;</div><div class='ctx'> 	u16 bmiss_time_t;</div><div class='add'>+	u16 bg_scan_period;</div><div class='ctx'> 	u8 assoc_bss_dtim_period;</div><div class='ctx'> 	struct net_device_stats net_stats;</div><div class='ctx'> 	struct target_stats target_stats;</div><div class='add'>+	struct wmi_connect_cmd profile;</div><div class='ctx'> </div><div class='ctx'> 	struct list_head mc_filter;</div><div class='ctx'> };</div><div class='hunk'>@@ -568,6 +605,7 @@ struct ath6kl {</div><div class='ctx'> </div><div class='ctx'> 	struct ath6kl_bmi bmi;</div><div class='ctx'> 	const struct ath6kl_hif_ops *hif_ops;</div><div class='add'>+	const struct ath6kl_htc_ops *htc_ops;</div><div class='ctx'> 	struct wmi *wmi;</div><div class='ctx'> 	int tx_pending[ENDPOINT_MAX];</div><div class='ctx'> 	int total_tx_data_pend;</div><div class='hunk'>@@ -614,6 +652,7 @@ struct ath6kl {</div><div class='ctx'> 	u8 sta_list_index;</div><div class='ctx'> 	struct ath6kl_req_key ap_mode_bkey;</div><div class='ctx'> 	struct sk_buff_head mcastpsq;</div><div class='add'>+	u32 want_ch_switch;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * FIXME: protects access to mcastpsq but is actually useless as</div><div class='hunk'>@@ -646,6 +685,7 @@ struct ath6kl {</div><div class='ctx'> 		u32 refclk_hz;</div><div class='ctx'> 		u32 uarttx_pin;</div><div class='ctx'> 		u32 testscript_addr;</div><div class='add'>+		enum wmi_phy_cap cap;</div><div class='ctx'> </div><div class='ctx'> 		struct ath6kl_hw_fw {</div><div class='ctx'> 			const char *dir;</div><div class='hunk'>@@ -746,7 +786,8 @@ void init_netdev(struct net_device *dev);</div><div class='ctx'> void ath6kl_cookie_init(struct ath6kl *ar);</div><div class='ctx'> void ath6kl_cookie_cleanup(struct ath6kl *ar);</div><div class='ctx'> void ath6kl_rx(struct htc_target *target, struct htc_packet *packet);</div><div class='del'>-void ath6kl_tx_complete(void *context, struct list_head *packet_queue);</div><div class='add'>+void ath6kl_tx_complete(struct htc_target *context,</div><div class='add'>+			struct list_head *packet_queue);</div><div class='ctx'> enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,</div><div class='ctx'> 					       struct htc_packet *packet);</div><div class='ctx'> void ath6kl_stop_txrx(struct ath6kl *ar);</div><div class='hunk'>@@ -778,7 +819,8 @@ void aggr_reset_state(struct aggr_info_conn *aggr_conn);</div><div class='ctx'> struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 *node_addr);</div><div class='ctx'> struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid);</div><div class='ctx'> </div><div class='del'>-void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver);</div><div class='add'>+void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver,</div><div class='add'>+			enum wmi_phy_cap cap);</div><div class='ctx'> int ath6kl_control_tx(void *devt, struct sk_buff *skb,</div><div class='ctx'> 		      enum htc_endpoint_id eid);</div><div class='ctx'> void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,</div><div class='hunk'>@@ -821,8 +863,11 @@ int ath6kl_init_hw_params(struct ath6kl *ar);</div><div class='ctx'> </div><div class='ctx'> void ath6kl_check_wow_status(struct ath6kl *ar);</div><div class='ctx'> </div><div class='add'>+void ath6kl_core_tx_complete(struct ath6kl *ar, struct sk_buff *skb);</div><div class='add'>+void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe);</div><div class='add'>+</div><div class='ctx'> struct ath6kl *ath6kl_core_create(struct device *dev);</div><div class='del'>-int ath6kl_core_init(struct ath6kl *ar);</div><div class='add'>+int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type);</div><div class='ctx'> void ath6kl_core_cleanup(struct ath6kl *ar);</div><div class='ctx'> void ath6kl_core_destroy(struct ath6kl *ar);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/debug.c b/drivers/net/wireless/ath/ath6kl/debug.c<br/>index d01403a263ff..15cfe30e54fd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/debug.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/debug.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/debug.c</a></div><div class='hunk'>@@ -401,8 +401,10 @@ static ssize_t ath6kl_fwlog_block_read(struct file *file,</div><div class='ctx'> </div><div class='ctx'> 		ret = wait_for_completion_interruptible(</div><div class='ctx'> 			&amp;ar-&gt;debug.fwlog_completion);</div><div class='del'>-		if (ret == -ERESTARTSYS)</div><div class='add'>+		if (ret == -ERESTARTSYS) {</div><div class='add'>+			vfree(buf);</div><div class='ctx'> 			return ret;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		spin_lock(&amp;ar-&gt;debug.fwlog_queue.lock);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -616,6 +618,12 @@ static ssize_t read_file_tgt_stats(struct file *file, char __user *user_buf,</div><div class='ctx'> 			 "Num disconnects", tgt_stats-&gt;cs_discon_cnt);</div><div class='ctx'> 	len += scnprintf(buf + len, buf_len - len, "%20s %10d\n",</div><div class='ctx'> 			 "Beacon avg rssi", tgt_stats-&gt;cs_ave_beacon_rssi);</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "%20s %10d\n",</div><div class='add'>+			 "ARP pkt received", tgt_stats-&gt;arp_received);</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "%20s %10d\n",</div><div class='add'>+			 "ARP pkt matched", tgt_stats-&gt;arp_matched);</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "%20s %10d\n",</div><div class='add'>+			 "ARP pkt replied", tgt_stats-&gt;arp_replied);</div><div class='ctx'> </div><div class='ctx'> 	if (len &gt; buf_len)</div><div class='ctx'> 		len = buf_len;</div><div class='hunk'>@@ -1564,10 +1572,15 @@ static ssize_t ath6kl_bgscan_int_write(struct file *file,</div><div class='ctx'> 				size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath6kl *ar = file-&gt;private_data;</div><div class='add'>+	struct ath6kl_vif *vif;</div><div class='ctx'> 	u16 bgscan_int;</div><div class='ctx'> 	char buf[32];</div><div class='ctx'> 	ssize_t len;</div><div class='ctx'> </div><div class='add'>+	vif = ath6kl_vif_first(ar);</div><div class='add'>+	if (!vif)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='ctx'> 	len = min(count, sizeof(buf) - 1);</div><div class='ctx'> 	if (copy_from_user(buf, user_buf, len))</div><div class='ctx'> 		return -EFAULT;</div><div class='hunk'>@@ -1579,6 +1592,8 @@ static ssize_t ath6kl_bgscan_int_write(struct file *file,</div><div class='ctx'> 	if (bgscan_int == 0)</div><div class='ctx'> 		bgscan_int = 0xffff;</div><div class='ctx'> </div><div class='add'>+	vif-&gt;bg_scan_period = bgscan_int;</div><div class='add'>+</div><div class='ctx'> 	ath6kl_wmi_scanparams_cmd(ar-&gt;wmi, 0, 0, 0, bgscan_int, 0, 0, 0, 3,</div><div class='ctx'> 				  0, 0, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -1803,6 +1818,7 @@ int ath6kl_debug_init_fs(struct ath6kl *ar)</div><div class='ctx'> void ath6kl_debug_cleanup(struct ath6kl *ar)</div><div class='ctx'> {</div><div class='ctx'> 	skb_queue_purge(&amp;ar-&gt;debug.fwlog_queue);</div><div class='add'>+	complete(&amp;ar-&gt;debug.fwlog_completion);</div><div class='ctx'> 	kfree(ar-&gt;debug.roam_tbl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/debug.h b/drivers/net/wireless/ath/ath6kl/debug.h<br/>index 1803a0baae82..49639d8266c2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/debug.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/debug.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/debug.h</a></div><div class='hunk'>@@ -43,6 +43,7 @@ enum ATH6K_DEBUG_MASK {</div><div class='ctx'> 	ATH6KL_DBG_WMI_DUMP	= BIT(19),</div><div class='ctx'> 	ATH6KL_DBG_SUSPEND	= BIT(20),</div><div class='ctx'> 	ATH6KL_DBG_USB		= BIT(21),</div><div class='add'>+	ATH6KL_DBG_USB_BULK	= BIT(22),</div><div class='ctx'> 	ATH6KL_DBG_ANY	        = 0xffffffff  /* enable all logs */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/hif-ops.h b/drivers/net/wireless/ath/ath6kl/hif-ops.h<br/>index fd84086638e3..8c9e72d5250d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/hif-ops.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/hif-ops.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/hif-ops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/hif-ops.h</a></div><div class='hunk'>@@ -150,4 +150,38 @@ static inline void ath6kl_hif_stop(struct ath6kl *ar)</div><div class='ctx'> 	ar-&gt;hif_ops-&gt;stop(ar);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int ath6kl_hif_pipe_send(struct ath6kl *ar,</div><div class='add'>+				       u8 pipe, struct sk_buff *hdr_buf,</div><div class='add'>+				       struct sk_buff *buf)</div><div class='add'>+{</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe send\n");</div><div class='add'>+</div><div class='add'>+	return ar-&gt;hif_ops-&gt;pipe_send(ar, pipe, hdr_buf, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath6kl_hif_pipe_get_default(struct ath6kl *ar,</div><div class='add'>+					       u8 *ul_pipe, u8 *dl_pipe)</div><div class='add'>+{</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe get default\n");</div><div class='add'>+</div><div class='add'>+	ar-&gt;hif_ops-&gt;pipe_get_default(ar, ul_pipe, dl_pipe);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ath6kl_hif_pipe_map_service(struct ath6kl *ar,</div><div class='add'>+					      u16 service_id, u8 *ul_pipe,</div><div class='add'>+					      u8 *dl_pipe)</div><div class='add'>+{</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe get default\n");</div><div class='add'>+</div><div class='add'>+	return ar-&gt;hif_ops-&gt;pipe_map_service(ar, service_id, ul_pipe, dl_pipe);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16 ath6kl_hif_pipe_get_free_queue_number(struct ath6kl *ar,</div><div class='add'>+							u8 pipe)</div><div class='add'>+{</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe get free queue number\n");</div><div class='add'>+</div><div class='add'>+	return ar-&gt;hif_ops-&gt;pipe_get_free_queue_number(ar, pipe);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/hif.h b/drivers/net/wireless/ath/ath6kl/hif.h<br/>index 20ed6b73517b..61f6b21fb0ae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/hif.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/hif.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/hif.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/hif.h</a></div><div class='hunk'>@@ -256,6 +256,12 @@ struct ath6kl_hif_ops {</div><div class='ctx'> 	int (*power_on)(struct ath6kl *ar);</div><div class='ctx'> 	int (*power_off)(struct ath6kl *ar);</div><div class='ctx'> 	void (*stop)(struct ath6kl *ar);</div><div class='add'>+	int (*pipe_send)(struct ath6kl *ar, u8 pipe, struct sk_buff *hdr_buf,</div><div class='add'>+			 struct sk_buff *buf);</div><div class='add'>+	void (*pipe_get_default)(struct ath6kl *ar, u8 *pipe_ul, u8 *pipe_dl);</div><div class='add'>+	int (*pipe_map_service)(struct ath6kl *ar, u16 service_id, u8 *pipe_ul,</div><div class='add'>+				u8 *pipe_dl);</div><div class='add'>+	u16 (*pipe_get_free_queue_number)(struct ath6kl *ar, u8 pipe);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int ath6kl_hif_setup(struct ath6kl_device *dev);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/htc-ops.h b/drivers/net/wireless/ath/ath6kl/htc-ops.h<br/>new file mode 100644<br/>index 000000000000..2d4eed55cfd1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/htc-ops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/htc-ops.h</a></div><div class='hunk'>@@ -0,0 +1,113 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2004-2011 Atheros Communications Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HTC_OPS_H</div><div class='add'>+#define HTC_OPS_H</div><div class='add'>+</div><div class='add'>+#include "htc.h"</div><div class='add'>+#include "debug.h"</div><div class='add'>+</div><div class='add'>+static inline void *ath6kl_htc_create(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	return ar-&gt;htc_ops-&gt;create(ar);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ath6kl_htc_wait_target(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	return target-&gt;dev-&gt;ar-&gt;htc_ops-&gt;wait_target(target);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ath6kl_htc_start(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	return target-&gt;dev-&gt;ar-&gt;htc_ops-&gt;start(target);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ath6kl_htc_conn_service(struct htc_target *target,</div><div class='add'>+					  struct htc_service_connect_req *req,</div><div class='add'>+					  struct htc_service_connect_resp *resp)</div><div class='add'>+{</div><div class='add'>+	return target-&gt;dev-&gt;ar-&gt;htc_ops-&gt;conn_service(target, req, resp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ath6kl_htc_tx(struct htc_target *target,</div><div class='add'>+				struct htc_packet *packet)</div><div class='add'>+{</div><div class='add'>+	return target-&gt;dev-&gt;ar-&gt;htc_ops-&gt;tx(target, packet);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath6kl_htc_stop(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	return target-&gt;dev-&gt;ar-&gt;htc_ops-&gt;stop(target);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath6kl_htc_cleanup(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	return target-&gt;dev-&gt;ar-&gt;htc_ops-&gt;cleanup(target);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath6kl_htc_flush_txep(struct htc_target *target,</div><div class='add'>+					 enum htc_endpoint_id endpoint,</div><div class='add'>+					 u16 tag)</div><div class='add'>+{</div><div class='add'>+	return target-&gt;dev-&gt;ar-&gt;htc_ops-&gt;flush_txep(target, endpoint, tag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath6kl_htc_flush_rx_buf(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	return target-&gt;dev-&gt;ar-&gt;htc_ops-&gt;flush_rx_buf(target);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath6kl_htc_activity_changed(struct htc_target *target,</div><div class='add'>+					       enum htc_endpoint_id endpoint,</div><div class='add'>+					       bool active)</div><div class='add'>+{</div><div class='add'>+	return target-&gt;dev-&gt;ar-&gt;htc_ops-&gt;activity_changed(target, endpoint,</div><div class='add'>+							  active);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ath6kl_htc_get_rxbuf_num(struct htc_target *target,</div><div class='add'>+					   enum htc_endpoint_id endpoint)</div><div class='add'>+{</div><div class='add'>+	return target-&gt;dev-&gt;ar-&gt;htc_ops-&gt;get_rxbuf_num(target, endpoint);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ath6kl_htc_add_rxbuf_multiple(struct htc_target *target,</div><div class='add'>+						struct list_head *pktq)</div><div class='add'>+{</div><div class='add'>+	return target-&gt;dev-&gt;ar-&gt;htc_ops-&gt;add_rxbuf_multiple(target, pktq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ath6kl_htc_credit_setup(struct htc_target *target,</div><div class='add'>+					  struct ath6kl_htc_credit_info *info)</div><div class='add'>+{</div><div class='add'>+	return target-&gt;dev-&gt;ar-&gt;htc_ops-&gt;credit_setup(target, info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath6kl_htc_tx_complete(struct ath6kl *ar,</div><div class='add'>+					  struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	ar-&gt;htc_ops-&gt;tx_complete(ar, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static inline void ath6kl_htc_rx_complete(struct ath6kl *ar,</div><div class='add'>+					  struct sk_buff *skb, u8 pipe)</div><div class='add'>+{</div><div class='add'>+	ar-&gt;htc_ops-&gt;rx_complete(ar, skb, pipe);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/htc.h b/drivers/net/wireless/ath/ath6kl/htc.h<br/>index 5027ccc36b62..a2c8ff809793 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/htc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/htc.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/htc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/htc.h</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> /* send direction */</div><div class='ctx'> #define HTC_FLAGS_NEED_CREDIT_UPDATE (1 &lt;&lt; 0)</div><div class='ctx'> #define HTC_FLAGS_SEND_BUNDLE        (1 &lt;&lt; 1)</div><div class='add'>+#define HTC_FLAGS_TX_FIXUP_NETBUF    (1 &lt;&lt; 2)</div><div class='ctx'> </div><div class='ctx'> /* receive direction */</div><div class='ctx'> #define HTC_FLG_RX_UNUSED        (1 &lt;&lt; 0)</div><div class='hunk'>@@ -56,6 +57,10 @@</div><div class='ctx'> #define HTC_CONN_FLGS_THRESH_LVL_THREE_QUAT	0x2</div><div class='ctx'> #define HTC_CONN_FLGS_REDUCE_CRED_DRIB		0x4</div><div class='ctx'> #define HTC_CONN_FLGS_THRESH_MASK		0x3</div><div class='add'>+/* disable credit flow control on a specific service */</div><div class='add'>+#define HTC_CONN_FLGS_DISABLE_CRED_FLOW_CTRL          (1 &lt;&lt; 3)</div><div class='add'>+#define HTC_CONN_FLGS_SET_RECV_ALLOC_SHIFT    8</div><div class='add'>+#define HTC_CONN_FLGS_SET_RECV_ALLOC_MASK     0xFF00</div><div class='ctx'> </div><div class='ctx'> /* connect response status codes */</div><div class='ctx'> #define HTC_SERVICE_SUCCESS      0</div><div class='hunk'>@@ -75,6 +80,7 @@</div><div class='ctx'> #define HTC_RECORD_LOOKAHEAD_BUNDLE 3</div><div class='ctx'> </div><div class='ctx'> #define HTC_SETUP_COMP_FLG_RX_BNDL_EN     (1 &lt;&lt; 0)</div><div class='add'>+#define HTC_SETUP_COMP_FLG_DISABLE_TX_CREDIT_FLOW (1 &lt;&lt; 1)</div><div class='ctx'> </div><div class='ctx'> #define MAKE_SERVICE_ID(group, index) \</div><div class='ctx'> 	(int)(((int)group &lt;&lt; 8) | (int)(index))</div><div class='hunk'>@@ -109,6 +115,8 @@</div><div class='ctx'> </div><div class='ctx'> /* HTC operational parameters */</div><div class='ctx'> #define HTC_TARGET_RESPONSE_TIMEOUT        2000	/* in ms */</div><div class='add'>+#define HTC_TARGET_RESPONSE_POLL_WAIT      10</div><div class='add'>+#define HTC_TARGET_RESPONSE_POLL_COUNT     200</div><div class='ctx'> #define HTC_TARGET_DEBUG_INTR_MASK         0x01</div><div class='ctx'> #define HTC_TARGET_CREDIT_INTR_MASK        0xF0</div><div class='ctx'> </div><div class='hunk'>@@ -128,6 +136,7 @@</div><div class='ctx'> </div><div class='ctx'> #define HTC_RECV_WAIT_BUFFERS        (1 &lt;&lt; 0)</div><div class='ctx'> #define HTC_OP_STATE_STOPPING        (1 &lt;&lt; 0)</div><div class='add'>+#define HTC_OP_STATE_SETUP_COMPLETE  (1 &lt;&lt; 1)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The frame header length and message formats defined herein were selected</div><div class='hunk'>@@ -311,6 +320,14 @@ struct htc_packet {</div><div class='ctx'> </div><div class='ctx'> 	void (*completion) (struct htc_target *, struct htc_packet *);</div><div class='ctx'> 	struct htc_target *context;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * optimization for network-oriented data, the HTC packet</div><div class='add'>+	 * can pass the network buffer corresponding to the HTC packet</div><div class='add'>+	 * lower layers may optimized the transfer knowing this is</div><div class='add'>+	 * a network buffer</div><div class='add'>+	 */</div><div class='add'>+	struct sk_buff *skb;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum htc_send_full_action {</div><div class='hunk'>@@ -319,12 +336,14 @@ enum htc_send_full_action {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct htc_ep_callbacks {</div><div class='add'>+	void (*tx_complete) (struct htc_target *, struct htc_packet *);</div><div class='ctx'> 	void (*rx) (struct htc_target *, struct htc_packet *);</div><div class='ctx'> 	void (*rx_refill) (struct htc_target *, enum htc_endpoint_id endpoint);</div><div class='ctx'> 	enum htc_send_full_action (*tx_full) (struct htc_target *,</div><div class='ctx'> 					      struct htc_packet *);</div><div class='ctx'> 	struct htc_packet *(*rx_allocthresh) (struct htc_target *,</div><div class='ctx'> 					      enum htc_endpoint_id, int);</div><div class='add'>+	void (*tx_comp_multi) (struct htc_target *, struct list_head *);</div><div class='ctx'> 	int rx_alloc_thresh;</div><div class='ctx'> 	int rx_refill_thresh;</div><div class='ctx'> };</div><div class='hunk'>@@ -502,6 +521,13 @@ struct htc_endpoint {</div><div class='ctx'> 	u32 conn_flags;</div><div class='ctx'> 	struct htc_endpoint_stats ep_st;</div><div class='ctx'> 	u16 tx_drop_packet_threshold;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u8 pipeid_ul;</div><div class='add'>+		u8 pipeid_dl;</div><div class='add'>+		struct list_head tx_lookup_queue;</div><div class='add'>+		bool tx_credit_flow_enabled;</div><div class='add'>+	} pipe;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct htc_control_buffer {</div><div class='hunk'>@@ -509,6 +535,42 @@ struct htc_control_buffer {</div><div class='ctx'> 	u8 *buf;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct htc_pipe_txcredit_alloc {</div><div class='add'>+	u16 service_id;</div><div class='add'>+	u8 credit_alloc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum htc_send_queue_result {</div><div class='add'>+	HTC_SEND_QUEUE_OK = 0,	/* packet was queued */</div><div class='add'>+	HTC_SEND_QUEUE_DROP = 1,	/* this packet should be dropped */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ath6kl_htc_ops {</div><div class='add'>+	void* (*create)(struct ath6kl *ar);</div><div class='add'>+	int (*wait_target)(struct htc_target *target);</div><div class='add'>+	int (*start)(struct htc_target *target);</div><div class='add'>+	int (*conn_service)(struct htc_target *target,</div><div class='add'>+			    struct htc_service_connect_req *req,</div><div class='add'>+			    struct htc_service_connect_resp *resp);</div><div class='add'>+	int  (*tx)(struct htc_target *target, struct htc_packet *packet);</div><div class='add'>+	void (*stop)(struct htc_target *target);</div><div class='add'>+	void (*cleanup)(struct htc_target *target);</div><div class='add'>+	void (*flush_txep)(struct htc_target *target,</div><div class='add'>+			   enum htc_endpoint_id endpoint, u16 tag);</div><div class='add'>+	void (*flush_rx_buf)(struct htc_target *target);</div><div class='add'>+	void (*activity_changed)(struct htc_target *target,</div><div class='add'>+				 enum htc_endpoint_id endpoint,</div><div class='add'>+				 bool active);</div><div class='add'>+	int (*get_rxbuf_num)(struct htc_target *target,</div><div class='add'>+			     enum htc_endpoint_id endpoint);</div><div class='add'>+	int (*add_rxbuf_multiple)(struct htc_target *target,</div><div class='add'>+				  struct list_head *pktq);</div><div class='add'>+	int (*credit_setup)(struct htc_target *target,</div><div class='add'>+			    struct ath6kl_htc_credit_info *cred_info);</div><div class='add'>+	int (*tx_complete)(struct ath6kl *ar, struct sk_buff *skb);</div><div class='add'>+	int (*rx_complete)(struct ath6kl *ar, struct sk_buff *skb, u8 pipe);</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct ath6kl_device;</div><div class='ctx'> </div><div class='ctx'> /* our HTC target state */</div><div class='hunk'>@@ -557,36 +619,19 @@ struct htc_target {</div><div class='ctx'> </div><div class='ctx'> 	/* counts the number of Tx without bundling continously per AC */</div><div class='ctx'> 	u32 ac_tx_count[WMM_NUM_AC];</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		struct htc_packet *htc_packet_pool;</div><div class='add'>+		u8 ctrl_response_buf[HTC_MAX_CTRL_MSG_LEN];</div><div class='add'>+		int ctrl_response_len;</div><div class='add'>+		bool ctrl_response_valid;</div><div class='add'>+		struct htc_pipe_txcredit_alloc txcredit_alloc[ENDPOINT_MAX];</div><div class='add'>+	} pipe;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void *ath6kl_htc_create(struct ath6kl *ar);</div><div class='del'>-void ath6kl_htc_set_credit_dist(struct htc_target *target,</div><div class='del'>-				struct ath6kl_htc_credit_info *cred_info,</div><div class='del'>-				u16 svc_pri_order[], int len);</div><div class='del'>-int ath6kl_htc_wait_target(struct htc_target *target);</div><div class='del'>-int ath6kl_htc_start(struct htc_target *target);</div><div class='del'>-int ath6kl_htc_conn_service(struct htc_target *target,</div><div class='del'>-			    struct htc_service_connect_req *req,</div><div class='del'>-			    struct htc_service_connect_resp *resp);</div><div class='del'>-int ath6kl_htc_tx(struct htc_target *target, struct htc_packet *packet);</div><div class='del'>-void ath6kl_htc_stop(struct htc_target *target);</div><div class='del'>-void ath6kl_htc_cleanup(struct htc_target *target);</div><div class='del'>-void ath6kl_htc_flush_txep(struct htc_target *target,</div><div class='del'>-			   enum htc_endpoint_id endpoint, u16 tag);</div><div class='del'>-void ath6kl_htc_flush_rx_buf(struct htc_target *target);</div><div class='del'>-void ath6kl_htc_indicate_activity_change(struct htc_target *target,</div><div class='del'>-					 enum htc_endpoint_id endpoint,</div><div class='del'>-					 bool active);</div><div class='del'>-int ath6kl_htc_get_rxbuf_num(struct htc_target *target,</div><div class='del'>-			     enum htc_endpoint_id endpoint);</div><div class='del'>-int ath6kl_htc_add_rxbuf_multiple(struct htc_target *target,</div><div class='del'>-				  struct list_head *pktq);</div><div class='ctx'> int ath6kl_htc_rxmsg_pending_handler(struct htc_target *target,</div><div class='ctx'> 				     u32 msg_look_ahead, int *n_pkts);</div><div class='ctx'> </div><div class='del'>-int ath6kl_credit_setup(void *htc_handle,</div><div class='del'>-			struct ath6kl_htc_credit_info *cred_info);</div><div class='del'>-</div><div class='ctx'> static inline void set_htc_pkt_info(struct htc_packet *packet, void *context,</div><div class='ctx'> 				    u8 *buf, unsigned int len,</div><div class='ctx'> 				    enum htc_endpoint_id eid, u16 tag)</div><div class='hunk'>@@ -626,4 +671,7 @@ static inline int get_queue_depth(struct list_head *queue)</div><div class='ctx'> 	return depth;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ath6kl_htc_pipe_attach(struct ath6kl *ar);</div><div class='add'>+void ath6kl_htc_mbox_attach(struct ath6kl *ar);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/htc.c b/drivers/net/wireless/ath/ath6kl/htc_mbox.c<br/>index 4849d99cce77..2798624d3a9d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/htc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/htc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/htc_mbox.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/htc_mbox.c</a></div><div class='hunk'>@@ -23,6 +23,14 @@</div><div class='ctx'> </div><div class='ctx'> #define CALC_TXRX_PADDED_LEN(dev, len)  (__ALIGN_MASK((len), (dev)-&gt;block_mask))</div><div class='ctx'> </div><div class='add'>+static void ath6kl_htc_mbox_cleanup(struct htc_target *target);</div><div class='add'>+static void ath6kl_htc_mbox_stop(struct htc_target *target);</div><div class='add'>+static int ath6kl_htc_mbox_add_rxbuf_multiple(struct htc_target *target,</div><div class='add'>+					      struct list_head *pkt_queue);</div><div class='add'>+static void ath6kl_htc_set_credit_dist(struct htc_target *target,</div><div class='add'>+				       struct ath6kl_htc_credit_info *cred_info,</div><div class='add'>+				       u16 svc_pri_order[], int len);</div><div class='add'>+</div><div class='ctx'> /* threshold to re-enable Tx bundling for an AC*/</div><div class='ctx'> #define TX_RESUME_BUNDLE_THRESHOLD	1500</div><div class='ctx'> </div><div class='hunk'>@@ -75,10 +83,7 @@ static void ath6kl_credit_init(struct ath6kl_htc_credit_info *cred_info,</div><div class='ctx'> 			 * never goes inactive EVER.</div><div class='ctx'> 			 */</div><div class='ctx'> 			cur_ep_dist-&gt;dist_flags |= HTC_EP_ACTIVE;</div><div class='del'>-		} else if (cur_ep_dist-&gt;svc_id == WMI_DATA_BK_SVC)</div><div class='del'>-			/* this is the lowest priority data endpoint */</div><div class='del'>-			/* FIXME: this looks fishy, check */</div><div class='del'>-			cred_info-&gt;lowestpri_ep_dist = cur_ep_dist-&gt;list;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Streams have to be created (explicit | implicit) for all</div><div class='hunk'>@@ -92,6 +97,13 @@ static void ath6kl_credit_init(struct ath6kl_htc_credit_info *cred_info,</div><div class='ctx'> 		 */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * For ath6kl_credit_seek function,</div><div class='add'>+	 * it use list_for_each_entry_reverse to walk around the whole ep list.</div><div class='add'>+	 * Therefore assign this lowestpri_ep_dist after walk around the ep_list</div><div class='add'>+	 */</div><div class='add'>+	cred_info-&gt;lowestpri_ep_dist = cur_ep_dist-&gt;list;</div><div class='add'>+</div><div class='ctx'> 	WARN_ON(cred_info-&gt;cur_free_credits &lt;= 0);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(cur_ep_dist, ep_list, list) {</div><div class='hunk'>@@ -130,8 +142,8 @@ static void ath6kl_credit_init(struct ath6kl_htc_credit_info *cred_info,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* initialize and setup credit distribution */</div><div class='del'>-int ath6kl_credit_setup(void *htc_handle,</div><div class='del'>-			struct ath6kl_htc_credit_info *cred_info)</div><div class='add'>+static int ath6kl_htc_mbox_credit_setup(struct htc_target *htc_target,</div><div class='add'>+			       struct ath6kl_htc_credit_info *cred_info)</div><div class='ctx'> {</div><div class='ctx'> 	u16 servicepriority[5];</div><div class='ctx'> </div><div class='hunk'>@@ -144,7 +156,7 @@ int ath6kl_credit_setup(void *htc_handle,</div><div class='ctx'> 	servicepriority[4] = WMI_DATA_BK_SVC; /* lowest */</div><div class='ctx'> </div><div class='ctx'> 	/* set priority list */</div><div class='del'>-	ath6kl_htc_set_credit_dist(htc_handle, cred_info, servicepriority, 5);</div><div class='add'>+	ath6kl_htc_set_credit_dist(htc_target, cred_info, servicepriority, 5);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -432,7 +444,7 @@ static void htc_tx_complete(struct htc_endpoint *endpoint,</div><div class='ctx'> 		   "htc tx complete ep %d pkts %d\n",</div><div class='ctx'> 		   endpoint-&gt;eid, get_queue_depth(txq));</div><div class='ctx'> </div><div class='del'>-	ath6kl_tx_complete(endpoint-&gt;target-&gt;dev-&gt;ar, txq);</div><div class='add'>+	ath6kl_tx_complete(endpoint-&gt;target, txq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void htc_tx_comp_handler(struct htc_target *target,</div><div class='hunk'>@@ -750,7 +762,7 @@ static void ath6kl_htc_tx_bundle(struct htc_endpoint *endpoint,</div><div class='ctx'> 	u32 txb_mask;</div><div class='ctx'> 	u8 ac = WMM_NUM_AC;</div><div class='ctx'> </div><div class='del'>-	if ((HTC_CTRL_RSVD_SVC != endpoint-&gt;svc_id) ||</div><div class='add'>+	if ((HTC_CTRL_RSVD_SVC != endpoint-&gt;svc_id) &amp;&amp;</div><div class='ctx'> 	    (WMI_CONTROL_SVC != endpoint-&gt;svc_id))</div><div class='ctx'> 		ac = target-&gt;dev-&gt;ar-&gt;ep2ac_map[endpoint-&gt;eid];</div><div class='ctx'> </div><div class='hunk'>@@ -785,16 +797,17 @@ static void ath6kl_htc_tx_bundle(struct htc_endpoint *endpoint,</div><div class='ctx'> 				 * itself</div><div class='ctx'> 				 */</div><div class='ctx'> 				txb_mask = ((1 &lt;&lt; ac) - 1);</div><div class='del'>-		/*</div><div class='del'>-		 * when the scatter request resources drop below a</div><div class='del'>-		 * certain threshold, disable Tx bundling for all</div><div class='del'>-		 * AC's with priority lower than the current requesting</div><div class='del'>-		 * AC. Otherwise re-enable Tx bundling for them</div><div class='del'>-		 */</div><div class='del'>-		if (scat_req-&gt;scat_q_depth &lt; ATH6KL_SCATTER_REQS)</div><div class='del'>-			target-&gt;tx_bndl_mask &amp;= ~txb_mask;</div><div class='del'>-		else</div><div class='del'>-			target-&gt;tx_bndl_mask |= txb_mask;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * when the scatter request resources drop below a</div><div class='add'>+			 * certain threshold, disable Tx bundling for all</div><div class='add'>+			 * AC's with priority lower than the current requesting</div><div class='add'>+			 * AC. Otherwise re-enable Tx bundling for them</div><div class='add'>+			 */</div><div class='add'>+			if (scat_req-&gt;scat_q_depth &lt; ATH6KL_SCATTER_REQS)</div><div class='add'>+				target-&gt;tx_bndl_mask &amp;= ~txb_mask;</div><div class='add'>+			else</div><div class='add'>+				target-&gt;tx_bndl_mask |= txb_mask;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ath6kl_dbg(ATH6KL_DBG_HTC, "htc tx pkts to scatter: %d\n",</div><div class='hunk'>@@ -841,6 +854,7 @@ static void ath6kl_htc_tx_from_queue(struct htc_target *target,</div><div class='ctx'> 	int bundle_sent;</div><div class='ctx'> 	int n_pkts_bundle;</div><div class='ctx'> 	u8 ac = WMM_NUM_AC;</div><div class='add'>+	int status;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;target-&gt;tx_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -858,7 +872,7 @@ static void ath6kl_htc_tx_from_queue(struct htc_target *target,</div><div class='ctx'> 	 */</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;txq);</div><div class='ctx'> </div><div class='del'>-	if ((HTC_CTRL_RSVD_SVC != endpoint-&gt;svc_id) ||</div><div class='add'>+	if ((HTC_CTRL_RSVD_SVC != endpoint-&gt;svc_id) &amp;&amp;</div><div class='ctx'> 	    (WMI_CONTROL_SVC != endpoint-&gt;svc_id))</div><div class='ctx'> 		ac = target-&gt;dev-&gt;ar-&gt;ep2ac_map[endpoint-&gt;eid];</div><div class='ctx'> </div><div class='hunk'>@@ -902,7 +916,12 @@ static void ath6kl_htc_tx_from_queue(struct htc_target *target,</div><div class='ctx'> </div><div class='ctx'> 			ath6kl_htc_tx_prep_pkt(packet, packet-&gt;info.tx.flags,</div><div class='ctx'> 					       0, packet-&gt;info.tx.seqno);</div><div class='del'>-			ath6kl_htc_tx_issue(target, packet);</div><div class='add'>+			status = ath6kl_htc_tx_issue(target, packet);</div><div class='add'>+</div><div class='add'>+			if (status) {</div><div class='add'>+				packet-&gt;status = status;</div><div class='add'>+				packet-&gt;completion(packet-&gt;context, packet);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_bh(&amp;target-&gt;tx_lock);</div><div class='hunk'>@@ -1065,7 +1084,7 @@ static int htc_setup_tx_complete(struct htc_target *target)</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ath6kl_htc_set_credit_dist(struct htc_target *target,</div><div class='add'>+static void ath6kl_htc_set_credit_dist(struct htc_target *target,</div><div class='ctx'> 				struct ath6kl_htc_credit_info *credit_info,</div><div class='ctx'> 				u16 srvc_pri_order[], int list_len)</div><div class='ctx'> {</div><div class='hunk'>@@ -1093,7 +1112,8 @@ void ath6kl_htc_set_credit_dist(struct htc_target *target,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ath6kl_htc_tx(struct htc_target *target, struct htc_packet *packet)</div><div class='add'>+static int ath6kl_htc_mbox_tx(struct htc_target *target,</div><div class='add'>+			      struct htc_packet *packet)</div><div class='ctx'> {</div><div class='ctx'> 	struct htc_endpoint *endpoint;</div><div class='ctx'> 	struct list_head queue;</div><div class='hunk'>@@ -1121,7 +1141,7 @@ int ath6kl_htc_tx(struct htc_target *target, struct htc_packet *packet)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* flush endpoint TX queue */</div><div class='del'>-void ath6kl_htc_flush_txep(struct htc_target *target,</div><div class='add'>+static void ath6kl_htc_mbox_flush_txep(struct htc_target *target,</div><div class='ctx'> 			   enum htc_endpoint_id eid, u16 tag)</div><div class='ctx'> {</div><div class='ctx'> 	struct htc_packet *packet, *tmp_pkt;</div><div class='hunk'>@@ -1173,12 +1193,13 @@ static void ath6kl_htc_flush_txep_all(struct htc_target *target)</div><div class='ctx'> 		if (endpoint-&gt;svc_id == 0)</div><div class='ctx'> 			/* not in use.. */</div><div class='ctx'> 			continue;</div><div class='del'>-		ath6kl_htc_flush_txep(target, i, HTC_TX_PACKET_TAG_ALL);</div><div class='add'>+		ath6kl_htc_mbox_flush_txep(target, i, HTC_TX_PACKET_TAG_ALL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ath6kl_htc_indicate_activity_change(struct htc_target *target,</div><div class='del'>-					 enum htc_endpoint_id eid, bool active)</div><div class='add'>+static void ath6kl_htc_mbox_activity_changed(struct htc_target *target,</div><div class='add'>+					     enum htc_endpoint_id eid,</div><div class='add'>+					     bool active)</div><div class='ctx'> {</div><div class='ctx'> 	struct htc_endpoint *endpoint = &amp;target-&gt;endpoint[eid];</div><div class='ctx'> 	bool dist = false;</div><div class='hunk'>@@ -1246,7 +1267,7 @@ static int htc_add_rxbuf(struct htc_target *target, struct htc_packet *packet)</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;queue);</div><div class='ctx'> 	list_add_tail(&amp;packet-&gt;list, &amp;queue);</div><div class='del'>-	return ath6kl_htc_add_rxbuf_multiple(target, &amp;queue);</div><div class='add'>+	return ath6kl_htc_mbox_add_rxbuf_multiple(target, &amp;queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void htc_reclaim_rxbuf(struct htc_target *target,</div><div class='hunk'>@@ -1353,7 +1374,9 @@ static int ath6kl_htc_rx_setup(struct htc_target *target,</div><div class='ctx'> 					sizeof(*htc_hdr));</div><div class='ctx'> </div><div class='ctx'> 	if (!htc_valid_rx_frame_len(target, ep-&gt;eid, full_len)) {</div><div class='del'>-		ath6kl_warn("Rx buffer requested with invalid length\n");</div><div class='add'>+		ath6kl_warn("Rx buffer requested with invalid length htc_hdr:eid %d, flags 0x%x, len %d\n",</div><div class='add'>+			    htc_hdr-&gt;eid, htc_hdr-&gt;flags,</div><div class='add'>+			    le16_to_cpu(htc_hdr-&gt;payld_len));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2288,7 +2311,7 @@ fail_ctrl_rx:</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ath6kl_htc_add_rxbuf_multiple(struct htc_target *target,</div><div class='add'>+static int ath6kl_htc_mbox_add_rxbuf_multiple(struct htc_target *target,</div><div class='ctx'> 				  struct list_head *pkt_queue)</div><div class='ctx'> {</div><div class='ctx'> 	struct htc_endpoint *endpoint;</div><div class='hunk'>@@ -2350,7 +2373,7 @@ int ath6kl_htc_add_rxbuf_multiple(struct htc_target *target,</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ath6kl_htc_flush_rx_buf(struct htc_target *target)</div><div class='add'>+static void ath6kl_htc_mbox_flush_rx_buf(struct htc_target *target)</div><div class='ctx'> {</div><div class='ctx'> 	struct htc_endpoint *endpoint;</div><div class='ctx'> 	struct htc_packet *packet, *tmp_pkt;</div><div class='hunk'>@@ -2392,7 +2415,7 @@ void ath6kl_htc_flush_rx_buf(struct htc_target *target)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ath6kl_htc_conn_service(struct htc_target *target,</div><div class='add'>+static int ath6kl_htc_mbox_conn_service(struct htc_target *target,</div><div class='ctx'> 			    struct htc_service_connect_req *conn_req,</div><div class='ctx'> 			    struct htc_service_connect_resp *conn_resp)</div><div class='ctx'> {</div><div class='hunk'>@@ -2564,7 +2587,7 @@ static void reset_ep_state(struct htc_target *target)</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;target-&gt;cred_dist_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ath6kl_htc_get_rxbuf_num(struct htc_target *target,</div><div class='add'>+static int ath6kl_htc_mbox_get_rxbuf_num(struct htc_target *target,</div><div class='ctx'> 			     enum htc_endpoint_id endpoint)</div><div class='ctx'> {</div><div class='ctx'> 	int num;</div><div class='hunk'>@@ -2624,7 +2647,7 @@ static void htc_setup_msg_bndl(struct htc_target *target)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ath6kl_htc_wait_target(struct htc_target *target)</div><div class='add'>+static int ath6kl_htc_mbox_wait_target(struct htc_target *target)</div><div class='ctx'> {</div><div class='ctx'> 	struct htc_packet *packet = NULL;</div><div class='ctx'> 	struct htc_ready_ext_msg *rdy_msg;</div><div class='hunk'>@@ -2693,12 +2716,12 @@ int ath6kl_htc_wait_target(struct htc_target *target)</div><div class='ctx'> 	connect.svc_id = HTC_CTRL_RSVD_SVC;</div><div class='ctx'> </div><div class='ctx'> 	/* connect fake service */</div><div class='del'>-	status = ath6kl_htc_conn_service((void *)target, &amp;connect, &amp;resp);</div><div class='add'>+	status = ath6kl_htc_mbox_conn_service((void *)target, &amp;connect, &amp;resp);</div><div class='ctx'> </div><div class='ctx'> 	if (status)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * FIXME: this call doesn't make sense, the caller should</div><div class='del'>-		 * call ath6kl_htc_cleanup() when it wants remove htc</div><div class='add'>+		 * call ath6kl_htc_mbox_cleanup() when it wants remove htc</div><div class='ctx'> 		 */</div><div class='ctx'> 		ath6kl_hif_cleanup_scatter(target-&gt;dev-&gt;ar);</div><div class='ctx'> </div><div class='hunk'>@@ -2715,7 +2738,7 @@ fail_wait_target:</div><div class='ctx'>  * Start HTC, enable interrupts and let the target know</div><div class='ctx'>  * host has finished setup.</div><div class='ctx'>  */</div><div class='del'>-int ath6kl_htc_start(struct htc_target *target)</div><div class='add'>+static int ath6kl_htc_mbox_start(struct htc_target *target)</div><div class='ctx'> {</div><div class='ctx'> 	struct htc_packet *packet;</div><div class='ctx'> 	int status;</div><div class='hunk'>@@ -2752,7 +2775,7 @@ int ath6kl_htc_start(struct htc_target *target)</div><div class='ctx'> 	status = ath6kl_hif_unmask_intrs(target-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	if (status)</div><div class='del'>-		ath6kl_htc_stop(target);</div><div class='add'>+		ath6kl_htc_mbox_stop(target);</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='hunk'>@@ -2796,7 +2819,7 @@ static int ath6kl_htc_reset(struct htc_target *target)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* htc_stop: stop interrupt reception, and flush all queued buffers */</div><div class='del'>-void ath6kl_htc_stop(struct htc_target *target)</div><div class='add'>+static void ath6kl_htc_mbox_stop(struct htc_target *target)</div><div class='ctx'> {</div><div class='ctx'> 	spin_lock_bh(&amp;target-&gt;htc_lock);</div><div class='ctx'> 	target-&gt;htc_flags |= HTC_OP_STATE_STOPPING;</div><div class='hunk'>@@ -2811,12 +2834,12 @@ void ath6kl_htc_stop(struct htc_target *target)</div><div class='ctx'> </div><div class='ctx'> 	ath6kl_htc_flush_txep_all(target);</div><div class='ctx'> </div><div class='del'>-	ath6kl_htc_flush_rx_buf(target);</div><div class='add'>+	ath6kl_htc_mbox_flush_rx_buf(target);</div><div class='ctx'> </div><div class='ctx'> 	ath6kl_htc_reset(target);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *ath6kl_htc_create(struct ath6kl *ar)</div><div class='add'>+static void *ath6kl_htc_mbox_create(struct ath6kl *ar)</div><div class='ctx'> {</div><div class='ctx'> 	struct htc_target *target = NULL;</div><div class='ctx'> 	int status = 0;</div><div class='hunk'>@@ -2857,13 +2880,13 @@ void *ath6kl_htc_create(struct ath6kl *ar)</div><div class='ctx'> 	return target;</div><div class='ctx'> </div><div class='ctx'> err_htc_cleanup:</div><div class='del'>-	ath6kl_htc_cleanup(target);</div><div class='add'>+	ath6kl_htc_mbox_cleanup(target);</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* cleanup the HTC instance */</div><div class='del'>-void ath6kl_htc_cleanup(struct htc_target *target)</div><div class='add'>+static void ath6kl_htc_mbox_cleanup(struct htc_target *target)</div><div class='ctx'> {</div><div class='ctx'> 	struct htc_packet *packet, *tmp_packet;</div><div class='ctx'> </div><div class='hunk'>@@ -2888,3 +2911,24 @@ void ath6kl_htc_cleanup(struct htc_target *target)</div><div class='ctx'> 	kfree(target-&gt;dev);</div><div class='ctx'> 	kfree(target);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static const struct ath6kl_htc_ops ath6kl_htc_mbox_ops = {</div><div class='add'>+	.create = ath6kl_htc_mbox_create,</div><div class='add'>+	.wait_target = ath6kl_htc_mbox_wait_target,</div><div class='add'>+	.start = ath6kl_htc_mbox_start,</div><div class='add'>+	.conn_service = ath6kl_htc_mbox_conn_service,</div><div class='add'>+	.tx = ath6kl_htc_mbox_tx,</div><div class='add'>+	.stop = ath6kl_htc_mbox_stop,</div><div class='add'>+	.cleanup = ath6kl_htc_mbox_cleanup,</div><div class='add'>+	.flush_txep = ath6kl_htc_mbox_flush_txep,</div><div class='add'>+	.flush_rx_buf = ath6kl_htc_mbox_flush_rx_buf,</div><div class='add'>+	.activity_changed = ath6kl_htc_mbox_activity_changed,</div><div class='add'>+	.get_rxbuf_num = ath6kl_htc_mbox_get_rxbuf_num,</div><div class='add'>+	.add_rxbuf_multiple = ath6kl_htc_mbox_add_rxbuf_multiple,</div><div class='add'>+	.credit_setup = ath6kl_htc_mbox_credit_setup,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ath6kl_htc_mbox_attach(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	ar-&gt;htc_ops = &amp;ath6kl_htc_mbox_ops;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/htc_pipe.c b/drivers/net/wireless/ath/ath6kl/htc_pipe.c<br/>new file mode 100644<br/>index 000000000000..f9626c723693<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/htc_pipe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/htc_pipe.c</a></div><div class='hunk'>@@ -0,0 +1,1708 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2007-2011 Atheros Communications Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "core.h"</div><div class='add'>+#include "debug.h"</div><div class='add'>+#include "hif-ops.h"</div><div class='add'>+</div><div class='add'>+#define HTC_PACKET_CONTAINER_ALLOCATION 32</div><div class='add'>+#define HTC_CONTROL_BUFFER_SIZE (HTC_MAX_CTRL_MSG_LEN + HTC_HDR_LENGTH)</div><div class='add'>+</div><div class='add'>+static int ath6kl_htc_pipe_tx(struct htc_target *handle,</div><div class='add'>+			      struct htc_packet *packet);</div><div class='add'>+static void ath6kl_htc_pipe_cleanup(struct htc_target *handle);</div><div class='add'>+</div><div class='add'>+/* htc pipe tx path */</div><div class='add'>+static inline void restore_tx_packet(struct htc_packet *packet)</div><div class='add'>+{</div><div class='add'>+	if (packet-&gt;info.tx.flags &amp; HTC_FLAGS_TX_FIXUP_NETBUF) {</div><div class='add'>+		skb_pull(packet-&gt;skb, sizeof(struct htc_frame_hdr));</div><div class='add'>+		packet-&gt;info.tx.flags &amp;= ~HTC_FLAGS_TX_FIXUP_NETBUF;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void do_send_completion(struct htc_endpoint *ep,</div><div class='add'>+			       struct list_head *queue_to_indicate)</div><div class='add'>+{</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+</div><div class='add'>+	if (list_empty(queue_to_indicate)) {</div><div class='add'>+		/* nothing to indicate */</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ep-&gt;ep_cb.tx_comp_multi != NULL) {</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+			   "%s: calling ep %d, send complete multiple callback (%d pkts)\n",</div><div class='add'>+			   __func__, ep-&gt;eid,</div><div class='add'>+			   get_queue_depth(queue_to_indicate));</div><div class='add'>+		/*</div><div class='add'>+		 * a multiple send complete handler is being used,</div><div class='add'>+		 * pass the queue to the handler</div><div class='add'>+		 */</div><div class='add'>+		ep-&gt;ep_cb.tx_comp_multi(ep-&gt;target, queue_to_indicate);</div><div class='add'>+		/*</div><div class='add'>+		 * all packets are now owned by the callback,</div><div class='add'>+		 * reset queue to be safe</div><div class='add'>+		 */</div><div class='add'>+		INIT_LIST_HEAD(queue_to_indicate);</div><div class='add'>+	} else {</div><div class='add'>+		/* using legacy EpTxComplete */</div><div class='add'>+		do {</div><div class='add'>+			packet = list_first_entry(queue_to_indicate,</div><div class='add'>+						  struct htc_packet, list);</div><div class='add'>+</div><div class='add'>+			list_del(&amp;packet-&gt;list);</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+				   "%s: calling ep %d send complete callback on packet 0x%p\n",</div><div class='add'>+				   __func__, ep-&gt;eid, packet);</div><div class='add'>+			ep-&gt;ep_cb.tx_complete(ep-&gt;target, packet);</div><div class='add'>+		} while (!list_empty(queue_to_indicate));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void send_packet_completion(struct htc_target *target,</div><div class='add'>+				   struct htc_packet *packet)</div><div class='add'>+{</div><div class='add'>+	struct htc_endpoint *ep = &amp;target-&gt;endpoint[packet-&gt;endpoint];</div><div class='add'>+	struct list_head container;</div><div class='add'>+</div><div class='add'>+	restore_tx_packet(packet);</div><div class='add'>+	INIT_LIST_HEAD(&amp;container);</div><div class='add'>+	list_add_tail(&amp;packet-&gt;list, &amp;container);</div><div class='add'>+</div><div class='add'>+	/* do completion */</div><div class='add'>+	do_send_completion(ep, &amp;container);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void get_htc_packet_credit_based(struct htc_target *target,</div><div class='add'>+					struct htc_endpoint *ep,</div><div class='add'>+					struct list_head *queue)</div><div class='add'>+{</div><div class='add'>+	int credits_required;</div><div class='add'>+	int remainder;</div><div class='add'>+	u8 send_flags;</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+	unsigned int transfer_len;</div><div class='add'>+</div><div class='add'>+	/* NOTE : the TX lock is held when this function is called */</div><div class='add'>+</div><div class='add'>+	/* loop until we can grab as many packets out of the queue as we can */</div><div class='add'>+	while (true) {</div><div class='add'>+		send_flags = 0;</div><div class='add'>+		if (list_empty(&amp;ep-&gt;txq))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* get packet at head, but don't remove it */</div><div class='add'>+		packet = list_first_entry(&amp;ep-&gt;txq, struct htc_packet, list);</div><div class='add'>+</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+			   "%s: got head packet:0x%p , queue depth: %d\n",</div><div class='add'>+			   __func__, packet, get_queue_depth(&amp;ep-&gt;txq));</div><div class='add'>+</div><div class='add'>+		transfer_len = packet-&gt;act_len + HTC_HDR_LENGTH;</div><div class='add'>+</div><div class='add'>+		if (transfer_len &lt;= target-&gt;tgt_cred_sz) {</div><div class='add'>+			credits_required = 1;</div><div class='add'>+		} else {</div><div class='add'>+			/* figure out how many credits this message requires */</div><div class='add'>+			credits_required = transfer_len / target-&gt;tgt_cred_sz;</div><div class='add'>+			remainder = transfer_len % target-&gt;tgt_cred_sz;</div><div class='add'>+</div><div class='add'>+			if (remainder)</div><div class='add'>+				credits_required++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC, "%s: creds required:%d got:%d\n",</div><div class='add'>+			   __func__, credits_required, ep-&gt;cred_dist.credits);</div><div class='add'>+</div><div class='add'>+		if (ep-&gt;eid == ENDPOINT_0) {</div><div class='add'>+			/*</div><div class='add'>+			 * endpoint 0 is special, it always has a credit and</div><div class='add'>+			 * does not require credit based flow control</div><div class='add'>+			 */</div><div class='add'>+			credits_required = 0;</div><div class='add'>+</div><div class='add'>+		} else {</div><div class='add'>+</div><div class='add'>+			if (ep-&gt;cred_dist.credits &lt; credits_required)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			ep-&gt;cred_dist.credits -= credits_required;</div><div class='add'>+			ep-&gt;ep_st.cred_cosumd += credits_required;</div><div class='add'>+</div><div class='add'>+			/* check if we need credits back from the target */</div><div class='add'>+			if (ep-&gt;cred_dist.credits &lt;</div><div class='add'>+					ep-&gt;cred_dist.cred_per_msg) {</div><div class='add'>+				/* tell the target we need credits ASAP! */</div><div class='add'>+				send_flags |= HTC_FLAGS_NEED_CREDIT_UPDATE;</div><div class='add'>+				ep-&gt;ep_st.cred_low_indicate += 1;</div><div class='add'>+				ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+					   "%s: host needs credits\n",</div><div class='add'>+					   __func__);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* now we can fully dequeue */</div><div class='add'>+		packet = list_first_entry(&amp;ep-&gt;txq, struct htc_packet, list);</div><div class='add'>+</div><div class='add'>+		list_del(&amp;packet-&gt;list);</div><div class='add'>+		/* save the number of credits this packet consumed */</div><div class='add'>+		packet-&gt;info.tx.cred_used = credits_required;</div><div class='add'>+		/* save send flags */</div><div class='add'>+		packet-&gt;info.tx.flags = send_flags;</div><div class='add'>+		packet-&gt;info.tx.seqno = ep-&gt;seqno;</div><div class='add'>+		ep-&gt;seqno++;</div><div class='add'>+		/* queue this packet into the caller's queue */</div><div class='add'>+		list_add_tail(&amp;packet-&gt;list, queue);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void get_htc_packet(struct htc_target *target,</div><div class='add'>+			   struct htc_endpoint *ep,</div><div class='add'>+			   struct list_head *queue, int resources)</div><div class='add'>+{</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+</div><div class='add'>+	/* NOTE : the TX lock is held when this function is called */</div><div class='add'>+</div><div class='add'>+	/* loop until we can grab as many packets out of the queue as we can */</div><div class='add'>+	while (resources) {</div><div class='add'>+		if (list_empty(&amp;ep-&gt;txq))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		packet = list_first_entry(&amp;ep-&gt;txq, struct htc_packet, list);</div><div class='add'>+		list_del(&amp;packet-&gt;list);</div><div class='add'>+</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+			   "%s: got packet:0x%p , new queue depth: %d\n",</div><div class='add'>+			   __func__, packet, get_queue_depth(&amp;ep-&gt;txq));</div><div class='add'>+		packet-&gt;info.tx.seqno = ep-&gt;seqno;</div><div class='add'>+		packet-&gt;info.tx.flags = 0;</div><div class='add'>+		packet-&gt;info.tx.cred_used = 0;</div><div class='add'>+		ep-&gt;seqno++;</div><div class='add'>+</div><div class='add'>+		/* queue this packet into the caller's queue */</div><div class='add'>+		list_add_tail(&amp;packet-&gt;list, queue);</div><div class='add'>+		resources--;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int htc_issue_packets(struct htc_target *target,</div><div class='add'>+			     struct htc_endpoint *ep,</div><div class='add'>+			     struct list_head *pkt_queue)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	u16 payload_len;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct htc_frame_hdr *htc_hdr;</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+		   "%s: queue: 0x%p, pkts %d\n", __func__,</div><div class='add'>+		   pkt_queue, get_queue_depth(pkt_queue));</div><div class='add'>+</div><div class='add'>+	while (!list_empty(pkt_queue)) {</div><div class='add'>+		packet = list_first_entry(pkt_queue, struct htc_packet, list);</div><div class='add'>+		list_del(&amp;packet-&gt;list);</div><div class='add'>+</div><div class='add'>+		skb = packet-&gt;skb;</div><div class='add'>+		if (!skb) {</div><div class='add'>+			WARN_ON_ONCE(1);</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		payload_len = packet-&gt;act_len;</div><div class='add'>+</div><div class='add'>+		/* setup HTC frame header */</div><div class='add'>+		htc_hdr = (struct htc_frame_hdr *) skb_push(skb,</div><div class='add'>+							    sizeof(*htc_hdr));</div><div class='add'>+		if (!htc_hdr) {</div><div class='add'>+			WARN_ON_ONCE(1);</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		packet-&gt;info.tx.flags |= HTC_FLAGS_TX_FIXUP_NETBUF;</div><div class='add'>+</div><div class='add'>+		/* Endianess? */</div><div class='add'>+		put_unaligned((u16) payload_len, &amp;htc_hdr-&gt;payld_len);</div><div class='add'>+		htc_hdr-&gt;flags = packet-&gt;info.tx.flags;</div><div class='add'>+		htc_hdr-&gt;eid = (u8) packet-&gt;endpoint;</div><div class='add'>+		htc_hdr-&gt;ctrl[0] = 0;</div><div class='add'>+		htc_hdr-&gt;ctrl[1] = (u8) packet-&gt;info.tx.seqno;</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+		/* store in look up queue to match completions */</div><div class='add'>+		list_add_tail(&amp;packet-&gt;list, &amp;ep-&gt;pipe.tx_lookup_queue);</div><div class='add'>+		ep-&gt;ep_st.tx_issued += 1;</div><div class='add'>+		spin_unlock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+		status = ath6kl_hif_pipe_send(target-&gt;dev-&gt;ar,</div><div class='add'>+					      ep-&gt;pipe.pipeid_ul, NULL, skb);</div><div class='add'>+</div><div class='add'>+		if (status != 0) {</div><div class='add'>+			if (status != -ENOMEM) {</div><div class='add'>+				/* TODO: if more than 1 endpoint maps to the</div><div class='add'>+				 * same PipeID, it is possible to run out of</div><div class='add'>+				 * resources in the HIF layer.</div><div class='add'>+				 * Don't emit the error</div><div class='add'>+				 */</div><div class='add'>+				ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+					   "%s: failed status:%d\n",</div><div class='add'>+					   __func__, status);</div><div class='add'>+			}</div><div class='add'>+			spin_lock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+			list_del(&amp;packet-&gt;list);</div><div class='add'>+</div><div class='add'>+			/* reclaim credits */</div><div class='add'>+			ep-&gt;cred_dist.credits += packet-&gt;info.tx.cred_used;</div><div class='add'>+			spin_unlock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+			/* put it back into the callers queue */</div><div class='add'>+			list_add(&amp;packet-&gt;list, pkt_queue);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (status != 0) {</div><div class='add'>+		while (!list_empty(pkt_queue)) {</div><div class='add'>+			if (status != -ENOMEM) {</div><div class='add'>+				ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+					   "%s: failed pkt:0x%p status:%d\n",</div><div class='add'>+					   __func__, packet, status);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			packet = list_first_entry(pkt_queue,</div><div class='add'>+						  struct htc_packet, list);</div><div class='add'>+			list_del(&amp;packet-&gt;list);</div><div class='add'>+			packet-&gt;status = status;</div><div class='add'>+			send_packet_completion(target, packet);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum htc_send_queue_result htc_try_send(struct htc_target *target,</div><div class='add'>+					       struct htc_endpoint *ep,</div><div class='add'>+					       struct list_head *txq)</div><div class='add'>+{</div><div class='add'>+	struct list_head send_queue;	/* temp queue to hold packets */</div><div class='add'>+	struct htc_packet *packet, *tmp_pkt;</div><div class='add'>+	struct ath6kl *ar = target-&gt;dev-&gt;ar;</div><div class='add'>+	enum htc_send_full_action action;</div><div class='add'>+	int tx_resources, overflow, txqueue_depth, i, good_pkts;</div><div class='add'>+	u8 pipeid;</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HTC, "%s: (queue:0x%p depth:%d)\n",</div><div class='add'>+		   __func__, txq,</div><div class='add'>+		   (txq == NULL) ? 0 : get_queue_depth(txq));</div><div class='add'>+</div><div class='add'>+	/* init the local send queue */</div><div class='add'>+	INIT_LIST_HEAD(&amp;send_queue);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * txq equals to NULL means</div><div class='add'>+	 * caller didn't provide a queue, just wants us to</div><div class='add'>+	 * check queues and send</div><div class='add'>+	 */</div><div class='add'>+	if (txq != NULL) {</div><div class='add'>+		if (list_empty(txq)) {</div><div class='add'>+			/* empty queue */</div><div class='add'>+			return HTC_SEND_QUEUE_DROP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+		txqueue_depth = get_queue_depth(&amp;ep-&gt;txq);</div><div class='add'>+		spin_unlock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+		if (txqueue_depth &gt;= ep-&gt;max_txq_depth) {</div><div class='add'>+			/* we've already overflowed */</div><div class='add'>+			overflow = get_queue_depth(txq);</div><div class='add'>+		} else {</div><div class='add'>+			/* get how much we will overflow by */</div><div class='add'>+			overflow = txqueue_depth;</div><div class='add'>+			overflow += get_queue_depth(txq);</div><div class='add'>+			/* get how much we will overflow the TX queue by */</div><div class='add'>+			overflow -= ep-&gt;max_txq_depth;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* if overflow is negative or zero, we are okay */</div><div class='add'>+		if (overflow &gt; 0) {</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+				   "%s: Endpoint %d, TX queue will overflow :%d, Tx Depth:%d, Max:%d\n",</div><div class='add'>+				   __func__, ep-&gt;eid, overflow, txqueue_depth,</div><div class='add'>+				   ep-&gt;max_txq_depth);</div><div class='add'>+		}</div><div class='add'>+		if ((overflow &lt;= 0) ||</div><div class='add'>+		    (ep-&gt;ep_cb.tx_full == NULL)) {</div><div class='add'>+			/*</div><div class='add'>+			 * all packets will fit or caller did not provide send</div><div class='add'>+			 * full indication handler -- just move all of them</div><div class='add'>+			 * to the local send_queue object</div><div class='add'>+			 */</div><div class='add'>+			list_splice_tail_init(txq, &amp;send_queue);</div><div class='add'>+		} else {</div><div class='add'>+			good_pkts = get_queue_depth(txq) - overflow;</div><div class='add'>+			if (good_pkts &lt; 0) {</div><div class='add'>+				WARN_ON_ONCE(1);</div><div class='add'>+				return HTC_SEND_QUEUE_DROP;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* we have overflowed, and a callback is provided */</div><div class='add'>+			/* dequeue all non-overflow packets to the sendqueue */</div><div class='add'>+			for (i = 0; i &lt; good_pkts; i++) {</div><div class='add'>+				/* pop off caller's queue */</div><div class='add'>+				packet = list_first_entry(txq,</div><div class='add'>+							  struct htc_packet,</div><div class='add'>+							  list);</div><div class='add'>+				list_del(&amp;packet-&gt;list);</div><div class='add'>+				/* insert into local queue */</div><div class='add'>+				list_add_tail(&amp;packet-&gt;list, &amp;send_queue);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * the caller's queue has all the packets that won't fit</div><div class='add'>+			 * walk through the caller's queue and indicate each to</div><div class='add'>+			 * the send full handler</div><div class='add'>+			 */</div><div class='add'>+			list_for_each_entry_safe(packet, tmp_pkt,</div><div class='add'>+						 txq, list) {</div><div class='add'>+</div><div class='add'>+				ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+					   "%s: Indicat overflowed TX pkts: %p\n",</div><div class='add'>+					   __func__, packet);</div><div class='add'>+				action = ep-&gt;ep_cb.tx_full(ep-&gt;target, packet);</div><div class='add'>+				if (action == HTC_SEND_FULL_DROP) {</div><div class='add'>+					/* callback wants the packet dropped */</div><div class='add'>+					ep-&gt;ep_st.tx_dropped += 1;</div><div class='add'>+</div><div class='add'>+					/* leave this one in the caller's queue</div><div class='add'>+					 * for cleanup */</div><div class='add'>+				} else {</div><div class='add'>+					/* callback wants to keep this packet,</div><div class='add'>+					 * remove from caller's queue */</div><div class='add'>+					list_del(&amp;packet-&gt;list);</div><div class='add'>+					/* put it in the send queue */</div><div class='add'>+					list_add_tail(&amp;packet-&gt;list,</div><div class='add'>+						      &amp;send_queue);</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (list_empty(&amp;send_queue)) {</div><div class='add'>+				/* no packets made it in, caller will cleanup */</div><div class='add'>+				return HTC_SEND_QUEUE_DROP;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ep-&gt;pipe.tx_credit_flow_enabled) {</div><div class='add'>+		tx_resources =</div><div class='add'>+		    ath6kl_hif_pipe_get_free_queue_number(ar,</div><div class='add'>+							  ep-&gt;pipe.pipeid_ul);</div><div class='add'>+	} else {</div><div class='add'>+		tx_resources = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+	if (!list_empty(&amp;send_queue)) {</div><div class='add'>+		/* transfer packets to tail */</div><div class='add'>+		list_splice_tail_init(&amp;send_queue, &amp;ep-&gt;txq);</div><div class='add'>+		if (!list_empty(&amp;send_queue)) {</div><div class='add'>+			WARN_ON_ONCE(1);</div><div class='add'>+			spin_unlock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+			return HTC_SEND_QUEUE_DROP;</div><div class='add'>+		}</div><div class='add'>+		INIT_LIST_HEAD(&amp;send_queue);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* increment tx processing count on entry */</div><div class='add'>+	ep-&gt;tx_proc_cnt++;</div><div class='add'>+</div><div class='add'>+	if (ep-&gt;tx_proc_cnt &gt; 1) {</div><div class='add'>+		/*</div><div class='add'>+		 * Another thread or task is draining the TX queues on this</div><div class='add'>+		 * endpoint that thread will reset the tx processing count</div><div class='add'>+		 * when the queue is drained.</div><div class='add'>+		 */</div><div class='add'>+		ep-&gt;tx_proc_cnt--;</div><div class='add'>+		spin_unlock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+		return HTC_SEND_QUEUE_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/***** beyond this point only 1 thread may enter ******/</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Now drain the endpoint TX queue for transmission as long as we have</div><div class='add'>+	 * enough transmit resources.</div><div class='add'>+	 */</div><div class='add'>+	while (true) {</div><div class='add'>+</div><div class='add'>+		if (get_queue_depth(&amp;ep-&gt;txq) == 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (ep-&gt;pipe.tx_credit_flow_enabled) {</div><div class='add'>+			/*</div><div class='add'>+			 * Credit based mechanism provides flow control</div><div class='add'>+			 * based on target transmit resource availability,</div><div class='add'>+			 * we assume that the HIF layer will always have</div><div class='add'>+			 * bus resources greater than target transmit</div><div class='add'>+			 * resources.</div><div class='add'>+			 */</div><div class='add'>+			get_htc_packet_credit_based(target, ep, &amp;send_queue);</div><div class='add'>+		} else {</div><div class='add'>+			/*</div><div class='add'>+			 * Get all packets for this endpoint that we can</div><div class='add'>+			 * for this pass.</div><div class='add'>+			 */</div><div class='add'>+			get_htc_packet(target, ep, &amp;send_queue, tx_resources);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (get_queue_depth(&amp;send_queue) == 0) {</div><div class='add'>+			/*</div><div class='add'>+			 * Didn't get packets due to out of resources or TX</div><div class='add'>+			 * queue was drained.</div><div class='add'>+			 */</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		spin_unlock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+		/* send what we can */</div><div class='add'>+		htc_issue_packets(target, ep, &amp;send_queue);</div><div class='add'>+</div><div class='add'>+		if (!ep-&gt;pipe.tx_credit_flow_enabled) {</div><div class='add'>+			pipeid = ep-&gt;pipe.pipeid_ul;</div><div class='add'>+			tx_resources =</div><div class='add'>+			    ath6kl_hif_pipe_get_free_queue_number(ar, pipeid);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+	/* done with this endpoint, we can clear the count */</div><div class='add'>+	ep-&gt;tx_proc_cnt = 0;</div><div class='add'>+	spin_unlock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+	return HTC_SEND_QUEUE_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* htc control packet manipulation */</div><div class='add'>+static void destroy_htc_txctrl_packet(struct htc_packet *packet)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	skb = packet-&gt;skb;</div><div class='add'>+	if (skb != NULL)</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+	kfree(packet);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct htc_packet *build_htc_txctrl_packet(void)</div><div class='add'>+{</div><div class='add'>+	struct htc_packet *packet = NULL;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	packet = kzalloc(sizeof(struct htc_packet), GFP_KERNEL);</div><div class='add'>+	if (packet == NULL)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	skb = __dev_alloc_skb(HTC_CONTROL_BUFFER_SIZE, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (skb == NULL) {</div><div class='add'>+		kfree(packet);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	packet-&gt;skb = skb;</div><div class='add'>+</div><div class='add'>+	return packet;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void htc_free_txctrl_packet(struct htc_target *target,</div><div class='add'>+				   struct htc_packet *packet)</div><div class='add'>+{</div><div class='add'>+	destroy_htc_txctrl_packet(packet);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct htc_packet *htc_alloc_txctrl_packet(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	return build_htc_txctrl_packet();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void htc_txctrl_complete(struct htc_target *target,</div><div class='add'>+				struct htc_packet *packet)</div><div class='add'>+{</div><div class='add'>+	htc_free_txctrl_packet(target, packet);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MAX_MESSAGE_SIZE 1536</div><div class='add'>+</div><div class='add'>+static int htc_setup_target_buffer_assignments(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	int status, credits, credit_per_maxmsg, i;</div><div class='add'>+	struct htc_pipe_txcredit_alloc *entry;</div><div class='add'>+	unsigned int hif_usbaudioclass = 0;</div><div class='add'>+</div><div class='add'>+	credit_per_maxmsg = MAX_MESSAGE_SIZE / target-&gt;tgt_cred_sz;</div><div class='add'>+	if (MAX_MESSAGE_SIZE % target-&gt;tgt_cred_sz)</div><div class='add'>+		credit_per_maxmsg++;</div><div class='add'>+</div><div class='add'>+	/* TODO, this should be configured by the caller! */</div><div class='add'>+</div><div class='add'>+	credits = target-&gt;tgt_creds;</div><div class='add'>+	entry = &amp;target-&gt;pipe.txcredit_alloc[0];</div><div class='add'>+</div><div class='add'>+	status = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* FIXME: hif_usbaudioclass is always zero */</div><div class='add'>+	if (hif_usbaudioclass) {</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+			   "%s: For USB Audio Class- Total:%d\n",</div><div class='add'>+			   __func__, credits);</div><div class='add'>+		entry++;</div><div class='add'>+		entry++;</div><div class='add'>+		/* Setup VO Service To have Max Credits */</div><div class='add'>+		entry-&gt;service_id = WMI_DATA_VO_SVC;</div><div class='add'>+		entry-&gt;credit_alloc = (credits - 6);</div><div class='add'>+		if (entry-&gt;credit_alloc == 0)</div><div class='add'>+			entry-&gt;credit_alloc++;</div><div class='add'>+</div><div class='add'>+		credits -= (int) entry-&gt;credit_alloc;</div><div class='add'>+		if (credits &lt;= 0)</div><div class='add'>+			return status;</div><div class='add'>+</div><div class='add'>+		entry++;</div><div class='add'>+		entry-&gt;service_id = WMI_CONTROL_SVC;</div><div class='add'>+		entry-&gt;credit_alloc = credit_per_maxmsg;</div><div class='add'>+		credits -= (int) entry-&gt;credit_alloc;</div><div class='add'>+		if (credits &lt;= 0)</div><div class='add'>+			return status;</div><div class='add'>+</div><div class='add'>+		/* leftovers go to best effort */</div><div class='add'>+		entry++;</div><div class='add'>+		entry++;</div><div class='add'>+		entry-&gt;service_id = WMI_DATA_BE_SVC;</div><div class='add'>+		entry-&gt;credit_alloc = (u8) credits;</div><div class='add'>+		status = 0;</div><div class='add'>+	} else {</div><div class='add'>+		entry++;</div><div class='add'>+		entry-&gt;service_id = WMI_DATA_VI_SVC;</div><div class='add'>+		entry-&gt;credit_alloc = credits / 4;</div><div class='add'>+		if (entry-&gt;credit_alloc == 0)</div><div class='add'>+			entry-&gt;credit_alloc++;</div><div class='add'>+</div><div class='add'>+		credits -= (int) entry-&gt;credit_alloc;</div><div class='add'>+		if (credits &lt;= 0)</div><div class='add'>+			return status;</div><div class='add'>+</div><div class='add'>+		entry++;</div><div class='add'>+		entry-&gt;service_id = WMI_DATA_VO_SVC;</div><div class='add'>+		entry-&gt;credit_alloc = credits / 4;</div><div class='add'>+		if (entry-&gt;credit_alloc == 0)</div><div class='add'>+			entry-&gt;credit_alloc++;</div><div class='add'>+</div><div class='add'>+		credits -= (int) entry-&gt;credit_alloc;</div><div class='add'>+		if (credits &lt;= 0)</div><div class='add'>+			return status;</div><div class='add'>+</div><div class='add'>+		entry++;</div><div class='add'>+		entry-&gt;service_id = WMI_CONTROL_SVC;</div><div class='add'>+		entry-&gt;credit_alloc = credit_per_maxmsg;</div><div class='add'>+		credits -= (int) entry-&gt;credit_alloc;</div><div class='add'>+		if (credits &lt;= 0)</div><div class='add'>+			return status;</div><div class='add'>+</div><div class='add'>+		entry++;</div><div class='add'>+		entry-&gt;service_id = WMI_DATA_BK_SVC;</div><div class='add'>+		entry-&gt;credit_alloc = credit_per_maxmsg;</div><div class='add'>+		credits -= (int) entry-&gt;credit_alloc;</div><div class='add'>+		if (credits &lt;= 0)</div><div class='add'>+			return status;</div><div class='add'>+</div><div class='add'>+		/* leftovers go to best effort */</div><div class='add'>+		entry++;</div><div class='add'>+		entry-&gt;service_id = WMI_DATA_BE_SVC;</div><div class='add'>+		entry-&gt;credit_alloc = (u8) credits;</div><div class='add'>+		status = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (status == 0) {</div><div class='add'>+		for (i = 0; i &lt; ENDPOINT_MAX; i++) {</div><div class='add'>+			if (target-&gt;pipe.txcredit_alloc[i].service_id != 0) {</div><div class='add'>+				ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+					   "HTC Service Index : %d TX : 0x%2.2X : alloc:%d\n",</div><div class='add'>+					   i,</div><div class='add'>+					   target-&gt;pipe.txcredit_alloc[i].</div><div class='add'>+					   service_id,</div><div class='add'>+					   target-&gt;pipe.txcredit_alloc[i].</div><div class='add'>+					   credit_alloc);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* process credit reports and call distribution function */</div><div class='add'>+static void htc_process_credit_report(struct htc_target *target,</div><div class='add'>+				      struct htc_credit_report *rpt,</div><div class='add'>+				      int num_entries,</div><div class='add'>+				      enum htc_endpoint_id from_ep)</div><div class='add'>+{</div><div class='add'>+	int total_credits = 0, i;</div><div class='add'>+	struct htc_endpoint *ep;</div><div class='add'>+</div><div class='add'>+	/* lock out TX while we update credits */</div><div class='add'>+	spin_lock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_entries; i++, rpt++) {</div><div class='add'>+		if (rpt-&gt;eid &gt;= ENDPOINT_MAX) {</div><div class='add'>+			WARN_ON_ONCE(1);</div><div class='add'>+			spin_unlock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ep = &amp;target-&gt;endpoint[rpt-&gt;eid];</div><div class='add'>+		ep-&gt;cred_dist.credits += rpt-&gt;credits;</div><div class='add'>+</div><div class='add'>+		if (ep-&gt;cred_dist.credits &amp;&amp; get_queue_depth(&amp;ep-&gt;txq)) {</div><div class='add'>+			spin_unlock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+			htc_try_send(target, ep, NULL);</div><div class='add'>+			spin_lock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		total_credits += rpt-&gt;credits;</div><div class='add'>+	}</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+		   "Report indicated %d credits to distribute\n",</div><div class='add'>+		   total_credits);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* flush endpoint TX queue */</div><div class='add'>+static void htc_flush_tx_endpoint(struct htc_target *target,</div><div class='add'>+				  struct htc_endpoint *ep, u16 tag)</div><div class='add'>+{</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+	while (get_queue_depth(&amp;ep-&gt;txq)) {</div><div class='add'>+		packet = list_first_entry(&amp;ep-&gt;txq, struct htc_packet, list);</div><div class='add'>+		list_del(&amp;packet-&gt;list);</div><div class='add'>+		packet-&gt;status = 0;</div><div class='add'>+		send_packet_completion(target, packet);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * In the adapted HIF layer, struct sk_buff * are passed between HIF and HTC,</div><div class='add'>+ * since upper layers expects struct htc_packet containers we use the completed</div><div class='add'>+ * skb and lookup it's corresponding HTC packet buffer from a lookup list.</div><div class='add'>+ * This is extra overhead that can be fixed by re-aligning HIF interfaces with</div><div class='add'>+ * HTC.</div><div class='add'>+ */</div><div class='add'>+static struct htc_packet *htc_lookup_tx_packet(struct htc_target *target,</div><div class='add'>+					       struct htc_endpoint *ep,</div><div class='add'>+					       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct htc_packet *packet, *tmp_pkt, *found_packet = NULL;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * interate from the front of tx lookup queue</div><div class='add'>+	 * this lookup should be fast since lower layers completes in-order and</div><div class='add'>+	 * so the completed packet should be at the head of the list generally</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry_safe(packet, tmp_pkt, &amp;ep-&gt;pipe.tx_lookup_queue,</div><div class='add'>+				 list) {</div><div class='add'>+		/* check for removal */</div><div class='add'>+		if (skb == packet-&gt;skb) {</div><div class='add'>+			/* found it */</div><div class='add'>+			list_del(&amp;packet-&gt;list);</div><div class='add'>+			found_packet = packet;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;target-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+	return found_packet;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_htc_pipe_tx_complete(struct ath6kl *ar, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct htc_target *target = ar-&gt;htc_target;</div><div class='add'>+	struct htc_frame_hdr *htc_hdr;</div><div class='add'>+	struct htc_endpoint *ep;</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+	u8 ep_id, *netdata;</div><div class='add'>+	u32 netlen;</div><div class='add'>+</div><div class='add'>+	netdata = skb-&gt;data;</div><div class='add'>+	netlen = skb-&gt;len;</div><div class='add'>+</div><div class='add'>+	htc_hdr = (struct htc_frame_hdr *) netdata;</div><div class='add'>+</div><div class='add'>+	ep_id = htc_hdr-&gt;eid;</div><div class='add'>+	ep = &amp;target-&gt;endpoint[ep_id];</div><div class='add'>+</div><div class='add'>+	packet = htc_lookup_tx_packet(target, ep, skb);</div><div class='add'>+	if (packet == NULL) {</div><div class='add'>+		/* may have already been flushed and freed */</div><div class='add'>+		ath6kl_err("HTC TX lookup failed!\n");</div><div class='add'>+	} else {</div><div class='add'>+		/* will be giving this buffer back to upper layers */</div><div class='add'>+		packet-&gt;status = 0;</div><div class='add'>+		send_packet_completion(target, packet);</div><div class='add'>+	}</div><div class='add'>+	skb = NULL;</div><div class='add'>+</div><div class='add'>+	if (!ep-&gt;pipe.tx_credit_flow_enabled) {</div><div class='add'>+		/*</div><div class='add'>+		 * note: when using TX credit flow, the re-checking of queues</div><div class='add'>+		 * happens when credits flow back from the target. in the</div><div class='add'>+		 * non-TX credit case, we recheck after the packet completes</div><div class='add'>+		 */</div><div class='add'>+		htc_try_send(target, ep, NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int htc_send_packets_multiple(struct htc_target *target,</div><div class='add'>+				     struct list_head *pkt_queue)</div><div class='add'>+{</div><div class='add'>+	struct htc_endpoint *ep;</div><div class='add'>+	struct htc_packet *packet, *tmp_pkt;</div><div class='add'>+</div><div class='add'>+	if (list_empty(pkt_queue))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* get first packet to find out which ep the packets will go into */</div><div class='add'>+	packet = list_first_entry(pkt_queue, struct htc_packet, list);</div><div class='add'>+</div><div class='add'>+	if (packet-&gt;endpoint &gt;= ENDPOINT_MAX) {</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	ep = &amp;target-&gt;endpoint[packet-&gt;endpoint];</div><div class='add'>+</div><div class='add'>+	htc_try_send(target, ep, pkt_queue);</div><div class='add'>+</div><div class='add'>+	/* do completion on any packets that couldn't get in */</div><div class='add'>+	if (!list_empty(pkt_queue)) {</div><div class='add'>+		list_for_each_entry_safe(packet, tmp_pkt, pkt_queue, list) {</div><div class='add'>+			packet-&gt;status = -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		do_send_completion(ep, pkt_queue);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* htc pipe rx path */</div><div class='add'>+static struct htc_packet *alloc_htc_packet_container(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+	spin_lock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+</div><div class='add'>+	if (target-&gt;pipe.htc_packet_pool == NULL) {</div><div class='add'>+		spin_unlock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	packet = target-&gt;pipe.htc_packet_pool;</div><div class='add'>+	target-&gt;pipe.htc_packet_pool = (struct htc_packet *) packet-&gt;list.next;</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+</div><div class='add'>+	packet-&gt;list.next = NULL;</div><div class='add'>+	return packet;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void free_htc_packet_container(struct htc_target *target,</div><div class='add'>+				      struct htc_packet *packet)</div><div class='add'>+{</div><div class='add'>+	struct list_head *lh;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+</div><div class='add'>+	if (target-&gt;pipe.htc_packet_pool == NULL) {</div><div class='add'>+		target-&gt;pipe.htc_packet_pool = packet;</div><div class='add'>+		packet-&gt;list.next = NULL;</div><div class='add'>+	} else {</div><div class='add'>+		lh = (struct list_head *) target-&gt;pipe.htc_packet_pool;</div><div class='add'>+		packet-&gt;list.next = lh;</div><div class='add'>+		target-&gt;pipe.htc_packet_pool = packet;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int htc_process_trailer(struct htc_target *target, u8 *buffer,</div><div class='add'>+			       int len, enum htc_endpoint_id from_ep)</div><div class='add'>+{</div><div class='add'>+	struct htc_credit_report *report;</div><div class='add'>+	struct htc_record_hdr *record;</div><div class='add'>+	u8 *record_buf, *orig_buf;</div><div class='add'>+	int orig_len, status;</div><div class='add'>+</div><div class='add'>+	orig_buf = buffer;</div><div class='add'>+	orig_len = len;</div><div class='add'>+	status = 0;</div><div class='add'>+</div><div class='add'>+	while (len &gt; 0) {</div><div class='add'>+		if (len &lt; sizeof(struct htc_record_hdr)) {</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* these are byte aligned structs */</div><div class='add'>+		record = (struct htc_record_hdr *) buffer;</div><div class='add'>+		len -= sizeof(struct htc_record_hdr);</div><div class='add'>+		buffer += sizeof(struct htc_record_hdr);</div><div class='add'>+</div><div class='add'>+		if (record-&gt;len &gt; len) {</div><div class='add'>+			/* no room left in buffer for record */</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+				   "invalid length: %d (id:%d) buffer has: %d bytes left\n",</div><div class='add'>+				   record-&gt;len, record-&gt;rec_id, len);</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* start of record follows the header */</div><div class='add'>+		record_buf = buffer;</div><div class='add'>+</div><div class='add'>+		switch (record-&gt;rec_id) {</div><div class='add'>+		case HTC_RECORD_CREDITS:</div><div class='add'>+			if (record-&gt;len &lt; sizeof(struct htc_credit_report)) {</div><div class='add'>+				WARN_ON_ONCE(1);</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			report = (struct htc_credit_report *) record_buf;</div><div class='add'>+			htc_process_credit_report(target, report,</div><div class='add'>+						  record-&gt;len / sizeof(*report),</div><div class='add'>+						  from_ep);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+				   "unhandled record: id:%d length:%d\n",</div><div class='add'>+				   record-&gt;rec_id, record-&gt;len);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (status != 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* advance buffer past this record for next time around */</div><div class='add'>+		buffer += record-&gt;len;</div><div class='add'>+		len -= record-&gt;len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void do_recv_completion(struct htc_endpoint *ep,</div><div class='add'>+			       struct list_head *queue_to_indicate)</div><div class='add'>+{</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+</div><div class='add'>+	if (list_empty(queue_to_indicate)) {</div><div class='add'>+		/* nothing to indicate */</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* using legacy EpRecv */</div><div class='add'>+	while (!list_empty(queue_to_indicate)) {</div><div class='add'>+		packet = list_first_entry(queue_to_indicate,</div><div class='add'>+					  struct htc_packet, list);</div><div class='add'>+		list_del(&amp;packet-&gt;list);</div><div class='add'>+		ep-&gt;ep_cb.rx(ep-&gt;target, packet);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void recv_packet_completion(struct htc_target *target,</div><div class='add'>+				   struct htc_endpoint *ep,</div><div class='add'>+				   struct htc_packet *packet)</div><div class='add'>+{</div><div class='add'>+	struct list_head container;</div><div class='add'>+	INIT_LIST_HEAD(&amp;container);</div><div class='add'>+	list_add_tail(&amp;packet-&gt;list, &amp;container);</div><div class='add'>+</div><div class='add'>+	/* do completion */</div><div class='add'>+	do_recv_completion(ep, &amp;container);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_htc_pipe_rx_complete(struct ath6kl *ar, struct sk_buff *skb,</div><div class='add'>+				       u8 pipeid)</div><div class='add'>+{</div><div class='add'>+	struct htc_target *target = ar-&gt;htc_target;</div><div class='add'>+	u8 *netdata, *trailer, hdr_info;</div><div class='add'>+	struct htc_frame_hdr *htc_hdr;</div><div class='add'>+	u32 netlen, trailerlen = 0;</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+	struct htc_endpoint *ep;</div><div class='add'>+	u16 payload_len;</div><div class='add'>+	int status = 0;</div><div class='add'>+</div><div class='add'>+	netdata = skb-&gt;data;</div><div class='add'>+	netlen = skb-&gt;len;</div><div class='add'>+</div><div class='add'>+	htc_hdr = (struct htc_frame_hdr *) netdata;</div><div class='add'>+</div><div class='add'>+	ep = &amp;target-&gt;endpoint[htc_hdr-&gt;eid];</div><div class='add'>+</div><div class='add'>+	if (htc_hdr-&gt;eid &gt;= ENDPOINT_MAX) {</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+			   "HTC Rx: invalid EndpointID=%d\n",</div><div class='add'>+			   htc_hdr-&gt;eid);</div><div class='add'>+		status = -EINVAL;</div><div class='add'>+		goto free_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	payload_len = le16_to_cpu(get_unaligned(&amp;htc_hdr-&gt;payld_len));</div><div class='add'>+</div><div class='add'>+	if (netlen &lt; (payload_len + HTC_HDR_LENGTH)) {</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+			   "HTC Rx: insufficient length, got:%d expected =%u\n",</div><div class='add'>+			   netlen, payload_len + HTC_HDR_LENGTH);</div><div class='add'>+		status = -EINVAL;</div><div class='add'>+		goto free_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* get flags to check for trailer */</div><div class='add'>+	hdr_info = htc_hdr-&gt;flags;</div><div class='add'>+	if (hdr_info &amp; HTC_FLG_RX_TRAILER) {</div><div class='add'>+		/* extract the trailer length */</div><div class='add'>+		hdr_info = htc_hdr-&gt;ctrl[0];</div><div class='add'>+		if ((hdr_info &lt; sizeof(struct htc_record_hdr)) ||</div><div class='add'>+		    (hdr_info &gt; payload_len)) {</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+				   "invalid header: payloadlen should be %d, CB[0]: %d\n",</div><div class='add'>+				   payload_len, hdr_info);</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			goto free_skb;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		trailerlen = hdr_info;</div><div class='add'>+		/* process trailer after hdr/apps payload */</div><div class='add'>+		trailer = (u8 *) htc_hdr + HTC_HDR_LENGTH +</div><div class='add'>+			payload_len - hdr_info;</div><div class='add'>+		status = htc_process_trailer(target, trailer, hdr_info,</div><div class='add'>+					     htc_hdr-&gt;eid);</div><div class='add'>+		if (status != 0)</div><div class='add'>+			goto free_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (((int) payload_len - (int) trailerlen) &lt;= 0) {</div><div class='add'>+		/* zero length packet with trailer, just drop these */</div><div class='add'>+		goto free_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (htc_hdr-&gt;eid == ENDPOINT_0) {</div><div class='add'>+		/* handle HTC control message */</div><div class='add'>+		if (target-&gt;htc_flags &amp; HTC_OP_STATE_SETUP_COMPLETE) {</div><div class='add'>+			/*</div><div class='add'>+			 * fatal: target should not send unsolicited</div><div class='add'>+			 * messageson the endpoint 0</div><div class='add'>+			 */</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+				   "HTC ignores Rx Ctrl after setup complete\n");</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			goto free_skb;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* remove HTC header */</div><div class='add'>+		skb_pull(skb, HTC_HDR_LENGTH);</div><div class='add'>+</div><div class='add'>+		netdata = skb-&gt;data;</div><div class='add'>+		netlen = skb-&gt;len;</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+</div><div class='add'>+		target-&gt;pipe.ctrl_response_valid = true;</div><div class='add'>+		target-&gt;pipe.ctrl_response_len = min_t(int, netlen,</div><div class='add'>+						       HTC_MAX_CTRL_MSG_LEN);</div><div class='add'>+		memcpy(target-&gt;pipe.ctrl_response_buf, netdata,</div><div class='add'>+		       target-&gt;pipe.ctrl_response_len);</div><div class='add'>+</div><div class='add'>+		spin_unlock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+		skb = NULL;</div><div class='add'>+		goto free_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: the message based HIF architecture allocates net bufs</div><div class='add'>+	 * for recv packets since it bridges that HIF to upper layers,</div><div class='add'>+	 * which expects HTC packets, we form the packets here</div><div class='add'>+	 */</div><div class='add'>+	packet = alloc_htc_packet_container(target);</div><div class='add'>+	if (packet == NULL) {</div><div class='add'>+		status = -ENOMEM;</div><div class='add'>+		goto free_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	packet-&gt;status = 0;</div><div class='add'>+	packet-&gt;endpoint = htc_hdr-&gt;eid;</div><div class='add'>+	packet-&gt;pkt_cntxt = skb;</div><div class='add'>+</div><div class='add'>+	/* TODO: for backwards compatibility */</div><div class='add'>+	packet-&gt;buf = skb_push(skb, 0) + HTC_HDR_LENGTH;</div><div class='add'>+	packet-&gt;act_len = netlen - HTC_HDR_LENGTH - trailerlen;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: this is a hack because the driver layer will set the</div><div class='add'>+	 * actual len of the skb again which will just double the len</div><div class='add'>+	 */</div><div class='add'>+	skb_trim(skb, 0);</div><div class='add'>+</div><div class='add'>+	recv_packet_completion(target, ep, packet);</div><div class='add'>+</div><div class='add'>+	/* recover the packet container */</div><div class='add'>+	free_htc_packet_container(target, packet);</div><div class='add'>+	skb = NULL;</div><div class='add'>+</div><div class='add'>+free_skb:</div><div class='add'>+	if (skb != NULL)</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void htc_flush_rx_queue(struct htc_target *target,</div><div class='add'>+			       struct htc_endpoint *ep)</div><div class='add'>+{</div><div class='add'>+	struct list_head container;</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		if (list_empty(&amp;ep-&gt;rx_bufq))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		packet = list_first_entry(&amp;ep-&gt;rx_bufq,</div><div class='add'>+					  struct htc_packet, list);</div><div class='add'>+		list_del(&amp;packet-&gt;list);</div><div class='add'>+</div><div class='add'>+		spin_unlock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+		packet-&gt;status = -ECANCELED;</div><div class='add'>+		packet-&gt;act_len = 0;</div><div class='add'>+</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+			   "Flushing RX packet:0x%p, length:%d, ep:%d\n",</div><div class='add'>+			   packet, packet-&gt;buf_len,</div><div class='add'>+			   packet-&gt;endpoint);</div><div class='add'>+</div><div class='add'>+		INIT_LIST_HEAD(&amp;container);</div><div class='add'>+		list_add_tail(&amp;packet-&gt;list, &amp;container);</div><div class='add'>+</div><div class='add'>+		/* give the packet back */</div><div class='add'>+		do_recv_completion(ep, &amp;container);</div><div class='add'>+		spin_lock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* polling routine to wait for a control packet to be received */</div><div class='add'>+static int htc_wait_recv_ctrl_message(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	int count = HTC_TARGET_RESPONSE_POLL_COUNT;</div><div class='add'>+</div><div class='add'>+	while (count &gt; 0) {</div><div class='add'>+		spin_lock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+</div><div class='add'>+		if (target-&gt;pipe.ctrl_response_valid) {</div><div class='add'>+			target-&gt;pipe.ctrl_response_valid = false;</div><div class='add'>+			spin_unlock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		spin_unlock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+</div><div class='add'>+		count--;</div><div class='add'>+</div><div class='add'>+		msleep_interruptible(HTC_TARGET_RESPONSE_POLL_WAIT);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (count &lt;= 0) {</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC, "%s: Timeout!\n", __func__);</div><div class='add'>+		return -ECOMM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void htc_rxctrl_complete(struct htc_target *context,</div><div class='add'>+				struct htc_packet *packet)</div><div class='add'>+{</div><div class='add'>+	/* TODO, can't really receive HTC control messages yet.... */</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HTC, "%s: invalid call function\n", __func__);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* htc pipe initialization */</div><div class='add'>+static void reset_endpoint_states(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	struct htc_endpoint *ep;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = ENDPOINT_0; i &lt; ENDPOINT_MAX; i++) {</div><div class='add'>+		ep = &amp;target-&gt;endpoint[i];</div><div class='add'>+		ep-&gt;svc_id = 0;</div><div class='add'>+		ep-&gt;len_max = 0;</div><div class='add'>+		ep-&gt;max_txq_depth = 0;</div><div class='add'>+		ep-&gt;eid = i;</div><div class='add'>+		INIT_LIST_HEAD(&amp;ep-&gt;txq);</div><div class='add'>+		INIT_LIST_HEAD(&amp;ep-&gt;pipe.tx_lookup_queue);</div><div class='add'>+		INIT_LIST_HEAD(&amp;ep-&gt;rx_bufq);</div><div class='add'>+		ep-&gt;target = target;</div><div class='add'>+		ep-&gt;pipe.tx_credit_flow_enabled = (bool) 1; /* FIXME */</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* start HTC, this is called after all services are connected */</div><div class='add'>+static int htc_config_target_hif_pipe(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* htc service functions */</div><div class='add'>+static u8 htc_get_credit_alloc(struct htc_target *target, u16 service_id)</div><div class='add'>+{</div><div class='add'>+	u8 allocation = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ENDPOINT_MAX; i++) {</div><div class='add'>+		if (target-&gt;pipe.txcredit_alloc[i].service_id == service_id)</div><div class='add'>+			allocation =</div><div class='add'>+				target-&gt;pipe.txcredit_alloc[i].credit_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (allocation == 0) {</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+			   "HTC Service TX : 0x%2.2X : allocation is zero!\n",</div><div class='add'>+			   service_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return allocation;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_htc_pipe_conn_service(struct htc_target *target,</div><div class='add'>+		     struct htc_service_connect_req *conn_req,</div><div class='add'>+		     struct htc_service_connect_resp *conn_resp)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl *ar = target-&gt;dev-&gt;ar;</div><div class='add'>+	struct htc_packet *packet = NULL;</div><div class='add'>+	struct htc_conn_service_resp *resp_msg;</div><div class='add'>+	struct htc_conn_service_msg *conn_msg;</div><div class='add'>+	enum htc_endpoint_id assigned_epid = ENDPOINT_MAX;</div><div class='add'>+	bool disable_credit_flowctrl = false;</div><div class='add'>+	unsigned int max_msg_size = 0;</div><div class='add'>+	struct htc_endpoint *ep;</div><div class='add'>+	int length, status = 0;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u8 tx_alloc;</div><div class='add'>+	u16 flags;</div><div class='add'>+</div><div class='add'>+	if (conn_req-&gt;svc_id == 0) {</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		status = -EINVAL;</div><div class='add'>+		goto free_packet;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (conn_req-&gt;svc_id == HTC_CTRL_RSVD_SVC) {</div><div class='add'>+		/* special case for pseudo control service */</div><div class='add'>+		assigned_epid = ENDPOINT_0;</div><div class='add'>+		max_msg_size = HTC_MAX_CTRL_MSG_LEN;</div><div class='add'>+		tx_alloc = 0;</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+</div><div class='add'>+		tx_alloc = htc_get_credit_alloc(target, conn_req-&gt;svc_id);</div><div class='add'>+		if (tx_alloc == 0) {</div><div class='add'>+			status = -ENOMEM;</div><div class='add'>+			goto free_packet;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* allocate a packet to send to the target */</div><div class='add'>+		packet = htc_alloc_txctrl_packet(target);</div><div class='add'>+</div><div class='add'>+		if (packet == NULL) {</div><div class='add'>+			WARN_ON_ONCE(1);</div><div class='add'>+			status = -ENOMEM;</div><div class='add'>+			goto free_packet;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		skb = packet-&gt;skb;</div><div class='add'>+		length = sizeof(struct htc_conn_service_msg);</div><div class='add'>+</div><div class='add'>+		/* assemble connect service message */</div><div class='add'>+		conn_msg = (struct htc_conn_service_msg *) skb_put(skb,</div><div class='add'>+								   length);</div><div class='add'>+		if (conn_msg == NULL) {</div><div class='add'>+			WARN_ON_ONCE(1);</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			goto free_packet;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		memset(conn_msg, 0,</div><div class='add'>+		       sizeof(struct htc_conn_service_msg));</div><div class='add'>+		conn_msg-&gt;msg_id = cpu_to_le16(HTC_MSG_CONN_SVC_ID);</div><div class='add'>+		conn_msg-&gt;svc_id = cpu_to_le16(conn_req-&gt;svc_id);</div><div class='add'>+		conn_msg-&gt;conn_flags = cpu_to_le16(conn_req-&gt;conn_flags &amp;</div><div class='add'>+					~HTC_CONN_FLGS_SET_RECV_ALLOC_MASK);</div><div class='add'>+</div><div class='add'>+		/* tell target desired recv alloc for this ep */</div><div class='add'>+		flags = tx_alloc &lt;&lt; HTC_CONN_FLGS_SET_RECV_ALLOC_SHIFT;</div><div class='add'>+		conn_msg-&gt;conn_flags |= cpu_to_le16(flags);</div><div class='add'>+</div><div class='add'>+		if (conn_req-&gt;conn_flags &amp;</div><div class='add'>+		    HTC_CONN_FLGS_DISABLE_CRED_FLOW_CTRL) {</div><div class='add'>+			disable_credit_flowctrl = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		set_htc_pkt_info(packet, NULL, (u8 *) conn_msg,</div><div class='add'>+				 length,</div><div class='add'>+				 ENDPOINT_0, HTC_SERVICE_TX_PACKET_TAG);</div><div class='add'>+</div><div class='add'>+		status = ath6kl_htc_pipe_tx(target, packet);</div><div class='add'>+</div><div class='add'>+		/* we don't own it anymore */</div><div class='add'>+		packet = NULL;</div><div class='add'>+		if (status != 0)</div><div class='add'>+			goto free_packet;</div><div class='add'>+</div><div class='add'>+		/* wait for response */</div><div class='add'>+		status = htc_wait_recv_ctrl_message(target);</div><div class='add'>+		if (status != 0)</div><div class='add'>+			goto free_packet;</div><div class='add'>+</div><div class='add'>+		/* we controlled the buffer creation so it has to be</div><div class='add'>+		 * properly aligned</div><div class='add'>+		 */</div><div class='add'>+		resp_msg = (struct htc_conn_service_resp *)</div><div class='add'>+		    target-&gt;pipe.ctrl_response_buf;</div><div class='add'>+</div><div class='add'>+		if (resp_msg-&gt;msg_id != cpu_to_le16(HTC_MSG_CONN_SVC_RESP_ID) ||</div><div class='add'>+		    (target-&gt;pipe.ctrl_response_len &lt; sizeof(*resp_msg))) {</div><div class='add'>+			/* this message is not valid */</div><div class='add'>+			WARN_ON_ONCE(1);</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			goto free_packet;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_TRC,</div><div class='add'>+			   "%s: service 0x%X conn resp: status: %d ep: %d\n",</div><div class='add'>+			   __func__, resp_msg-&gt;svc_id, resp_msg-&gt;status,</div><div class='add'>+			   resp_msg-&gt;eid);</div><div class='add'>+</div><div class='add'>+		conn_resp-&gt;resp_code = resp_msg-&gt;status;</div><div class='add'>+		/* check response status */</div><div class='add'>+		if (resp_msg-&gt;status != HTC_SERVICE_SUCCESS) {</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+				   "Target failed service 0x%X connect request (status:%d)\n",</div><div class='add'>+				   resp_msg-&gt;svc_id, resp_msg-&gt;status);</div><div class='add'>+			status = -EINVAL;</div><div class='add'>+			goto free_packet;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		assigned_epid = (enum htc_endpoint_id) resp_msg-&gt;eid;</div><div class='add'>+		max_msg_size = le16_to_cpu(resp_msg-&gt;max_msg_sz);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* the rest are parameter checks so set the error status */</div><div class='add'>+	status = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (assigned_epid &gt;= ENDPOINT_MAX) {</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		goto free_packet;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (max_msg_size == 0) {</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		goto free_packet;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ep = &amp;target-&gt;endpoint[assigned_epid];</div><div class='add'>+	ep-&gt;eid = assigned_epid;</div><div class='add'>+	if (ep-&gt;svc_id != 0) {</div><div class='add'>+		/* endpoint already in use! */</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		goto free_packet;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* return assigned endpoint to caller */</div><div class='add'>+	conn_resp-&gt;endpoint = assigned_epid;</div><div class='add'>+	conn_resp-&gt;len_max = max_msg_size;</div><div class='add'>+</div><div class='add'>+	/* setup the endpoint */</div><div class='add'>+	ep-&gt;svc_id = conn_req-&gt;svc_id; /* this marks ep in use */</div><div class='add'>+	ep-&gt;max_txq_depth = conn_req-&gt;max_txq_depth;</div><div class='add'>+	ep-&gt;len_max = max_msg_size;</div><div class='add'>+	ep-&gt;cred_dist.credits = tx_alloc;</div><div class='add'>+	ep-&gt;cred_dist.cred_sz = target-&gt;tgt_cred_sz;</div><div class='add'>+	ep-&gt;cred_dist.cred_per_msg = max_msg_size / target-&gt;tgt_cred_sz;</div><div class='add'>+	if (max_msg_size % target-&gt;tgt_cred_sz)</div><div class='add'>+		ep-&gt;cred_dist.cred_per_msg++;</div><div class='add'>+</div><div class='add'>+	/* copy all the callbacks */</div><div class='add'>+	ep-&gt;ep_cb = conn_req-&gt;ep_cb;</div><div class='add'>+</div><div class='add'>+	/* initialize tx_drop_packet_threshold */</div><div class='add'>+	ep-&gt;tx_drop_packet_threshold = MAX_HI_COOKIE_NUM;</div><div class='add'>+</div><div class='add'>+	status = ath6kl_hif_pipe_map_service(ar, ep-&gt;svc_id,</div><div class='add'>+					     &amp;ep-&gt;pipe.pipeid_ul,</div><div class='add'>+					     &amp;ep-&gt;pipe.pipeid_dl);</div><div class='add'>+	if (status != 0)</div><div class='add'>+		goto free_packet;</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+		   "SVC Ready: 0x%4.4X: ULpipe:%d DLpipe:%d id:%d\n",</div><div class='add'>+		   ep-&gt;svc_id, ep-&gt;pipe.pipeid_ul,</div><div class='add'>+		   ep-&gt;pipe.pipeid_dl, ep-&gt;eid);</div><div class='add'>+</div><div class='add'>+	if (disable_credit_flowctrl &amp;&amp; ep-&gt;pipe.tx_credit_flow_enabled) {</div><div class='add'>+		ep-&gt;pipe.tx_credit_flow_enabled = false;</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+			   "SVC: 0x%4.4X ep:%d TX flow control off\n",</div><div class='add'>+			   ep-&gt;svc_id, assigned_epid);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+free_packet:</div><div class='add'>+	if (packet != NULL)</div><div class='add'>+		htc_free_txctrl_packet(target, packet);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* htc export functions */</div><div class='add'>+static void *ath6kl_htc_pipe_create(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+	struct htc_endpoint *ep = NULL;</div><div class='add'>+	struct htc_target *target = NULL;</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	target = kzalloc(sizeof(struct htc_target), GFP_KERNEL);</div><div class='add'>+	if (target == NULL) {</div><div class='add'>+		ath6kl_err("htc create unable to allocate memory\n");</div><div class='add'>+		status = -ENOMEM;</div><div class='add'>+		goto fail_htc_create;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;target-&gt;htc_lock);</div><div class='add'>+	spin_lock_init(&amp;target-&gt;rx_lock);</div><div class='add'>+	spin_lock_init(&amp;target-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+	reset_endpoint_states(target);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; HTC_PACKET_CONTAINER_ALLOCATION; i++) {</div><div class='add'>+		packet = kzalloc(sizeof(struct htc_packet), GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+		if (packet != NULL)</div><div class='add'>+			free_htc_packet_container(target, packet);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	target-&gt;dev = kzalloc(sizeof(*target-&gt;dev), GFP_KERNEL);</div><div class='add'>+	if (!target-&gt;dev) {</div><div class='add'>+		ath6kl_err("unable to allocate memory\n");</div><div class='add'>+		status = -ENOMEM;</div><div class='add'>+		goto fail_htc_create;</div><div class='add'>+	}</div><div class='add'>+	target-&gt;dev-&gt;ar = ar;</div><div class='add'>+	target-&gt;dev-&gt;htc_cnxt = target;</div><div class='add'>+</div><div class='add'>+	/* Get HIF default pipe for HTC message exchange */</div><div class='add'>+	ep = &amp;target-&gt;endpoint[ENDPOINT_0];</div><div class='add'>+</div><div class='add'>+	ath6kl_hif_pipe_get_default(ar, &amp;ep-&gt;pipe.pipeid_ul,</div><div class='add'>+				    &amp;ep-&gt;pipe.pipeid_dl);</div><div class='add'>+</div><div class='add'>+	return target;</div><div class='add'>+</div><div class='add'>+fail_htc_create:</div><div class='add'>+	if (status != 0) {</div><div class='add'>+		if (target != NULL)</div><div class='add'>+			ath6kl_htc_pipe_cleanup(target);</div><div class='add'>+</div><div class='add'>+		target = NULL;</div><div class='add'>+	}</div><div class='add'>+	return target;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* cleanup the HTC instance */</div><div class='add'>+static void ath6kl_htc_pipe_cleanup(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+</div><div class='add'>+	while (true) {</div><div class='add'>+		packet = alloc_htc_packet_container(target);</div><div class='add'>+		if (packet == NULL)</div><div class='add'>+			break;</div><div class='add'>+		kfree(packet);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(target-&gt;dev);</div><div class='add'>+</div><div class='add'>+	/* kfree our instance */</div><div class='add'>+	kfree(target);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_htc_pipe_start(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct htc_setup_comp_ext_msg *setup;</div><div class='add'>+	struct htc_packet *packet;</div><div class='add'>+</div><div class='add'>+	htc_config_target_hif_pipe(target);</div><div class='add'>+</div><div class='add'>+	/* allocate a buffer to send */</div><div class='add'>+	packet = htc_alloc_txctrl_packet(target);</div><div class='add'>+	if (packet == NULL) {</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = packet-&gt;skb;</div><div class='add'>+</div><div class='add'>+	/* assemble setup complete message */</div><div class='add'>+	setup = (struct htc_setup_comp_ext_msg *) skb_put(skb,</div><div class='add'>+							  sizeof(*setup));</div><div class='add'>+	memset(setup, 0, sizeof(struct htc_setup_comp_ext_msg));</div><div class='add'>+	setup-&gt;msg_id = cpu_to_le16(HTC_MSG_SETUP_COMPLETE_EX_ID);</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HTC, "HTC using TX credit flow control\n");</div><div class='add'>+</div><div class='add'>+	set_htc_pkt_info(packet, NULL, (u8 *) setup,</div><div class='add'>+			 sizeof(struct htc_setup_comp_ext_msg),</div><div class='add'>+			 ENDPOINT_0, HTC_SERVICE_TX_PACKET_TAG);</div><div class='add'>+</div><div class='add'>+	target-&gt;htc_flags |= HTC_OP_STATE_SETUP_COMPLETE;</div><div class='add'>+</div><div class='add'>+	return ath6kl_htc_pipe_tx(target, packet);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_htc_pipe_stop(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct htc_endpoint *ep;</div><div class='add'>+</div><div class='add'>+	/* cleanup endpoints */</div><div class='add'>+	for (i = 0; i &lt; ENDPOINT_MAX; i++) {</div><div class='add'>+		ep = &amp;target-&gt;endpoint[i];</div><div class='add'>+		htc_flush_rx_queue(target, ep);</div><div class='add'>+		htc_flush_tx_endpoint(target, ep, HTC_TX_PACKET_TAG_ALL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reset_endpoint_states(target);</div><div class='add'>+	target-&gt;htc_flags &amp;= ~HTC_OP_STATE_SETUP_COMPLETE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_htc_pipe_get_rxbuf_num(struct htc_target *target,</div><div class='add'>+					 enum htc_endpoint_id endpoint)</div><div class='add'>+{</div><div class='add'>+	int num;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+	num = get_queue_depth(&amp;(target-&gt;endpoint[endpoint].rx_bufq));</div><div class='add'>+	spin_unlock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+</div><div class='add'>+	return num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_htc_pipe_tx(struct htc_target *target,</div><div class='add'>+			      struct htc_packet *packet)</div><div class='add'>+{</div><div class='add'>+	struct list_head queue;</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+		   "%s: endPointId: %d, buffer: 0x%p, length: %d\n",</div><div class='add'>+		   __func__, packet-&gt;endpoint, packet-&gt;buf,</div><div class='add'>+		   packet-&gt;act_len);</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;queue);</div><div class='add'>+	list_add_tail(&amp;packet-&gt;list, &amp;queue);</div><div class='add'>+</div><div class='add'>+	return htc_send_packets_multiple(target, &amp;queue);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_htc_pipe_wait_target(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	struct htc_ready_ext_msg *ready_msg;</div><div class='add'>+	struct htc_service_connect_req connect;</div><div class='add'>+	struct htc_service_connect_resp resp;</div><div class='add'>+	int status = 0;</div><div class='add'>+</div><div class='add'>+	status = htc_wait_recv_ctrl_message(target);</div><div class='add'>+</div><div class='add'>+	if (status != 0)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='add'>+	if (target-&gt;pipe.ctrl_response_len &lt; sizeof(*ready_msg)) {</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC, "invalid htc ready msg len:%d!\n",</div><div class='add'>+			   target-&gt;pipe.ctrl_response_len);</div><div class='add'>+		return -ECOMM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ready_msg = (struct htc_ready_ext_msg *) target-&gt;pipe.ctrl_response_buf;</div><div class='add'>+</div><div class='add'>+	if (ready_msg-&gt;ver2_0_info.msg_id != cpu_to_le16(HTC_MSG_READY_ID)) {</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_HTC, "invalid htc ready msg : 0x%X !\n",</div><div class='add'>+			   ready_msg-&gt;ver2_0_info.msg_id);</div><div class='add'>+		return -ECOMM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HTC,</div><div class='add'>+		   "Target Ready! : transmit resources : %d size:%d\n",</div><div class='add'>+		   ready_msg-&gt;ver2_0_info.cred_cnt,</div><div class='add'>+		   ready_msg-&gt;ver2_0_info.cred_sz);</div><div class='add'>+</div><div class='add'>+	target-&gt;tgt_creds = le16_to_cpu(ready_msg-&gt;ver2_0_info.cred_cnt);</div><div class='add'>+	target-&gt;tgt_cred_sz = le16_to_cpu(ready_msg-&gt;ver2_0_info.cred_sz);</div><div class='add'>+</div><div class='add'>+	if ((target-&gt;tgt_creds == 0) || (target-&gt;tgt_cred_sz == 0))</div><div class='add'>+		return -ECOMM;</div><div class='add'>+</div><div class='add'>+	htc_setup_target_buffer_assignments(target);</div><div class='add'>+</div><div class='add'>+	/* setup our pseudo HTC control endpoint connection */</div><div class='add'>+	memset(&amp;connect, 0, sizeof(connect));</div><div class='add'>+	memset(&amp;resp, 0, sizeof(resp));</div><div class='add'>+	connect.ep_cb.tx_complete = htc_txctrl_complete;</div><div class='add'>+	connect.ep_cb.rx = htc_rxctrl_complete;</div><div class='add'>+	connect.max_txq_depth = NUM_CONTROL_TX_BUFFERS;</div><div class='add'>+	connect.svc_id = HTC_CTRL_RSVD_SVC;</div><div class='add'>+</div><div class='add'>+	/* connect fake service */</div><div class='add'>+	status = ath6kl_htc_pipe_conn_service(target, &amp;connect, &amp;resp);</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_htc_pipe_flush_txep(struct htc_target *target,</div><div class='add'>+				       enum htc_endpoint_id endpoint, u16 tag)</div><div class='add'>+{</div><div class='add'>+	struct htc_endpoint *ep = &amp;target-&gt;endpoint[endpoint];</div><div class='add'>+</div><div class='add'>+	if (ep-&gt;svc_id == 0) {</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		/* not in use.. */</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	htc_flush_tx_endpoint(target, ep, tag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_htc_pipe_add_rxbuf_multiple(struct htc_target *target,</div><div class='add'>+					      struct list_head *pkt_queue)</div><div class='add'>+{</div><div class='add'>+	struct htc_packet *packet, *tmp_pkt, *first;</div><div class='add'>+	struct htc_endpoint *ep;</div><div class='add'>+	int status = 0;</div><div class='add'>+</div><div class='add'>+	if (list_empty(pkt_queue))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	first = list_first_entry(pkt_queue, struct htc_packet, list);</div><div class='add'>+</div><div class='add'>+	if (first-&gt;endpoint &gt;= ENDPOINT_MAX) {</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_HTC, "%s: epid: %d, cnt:%d, len: %d\n",</div><div class='add'>+		   __func__, first-&gt;endpoint, get_queue_depth(pkt_queue),</div><div class='add'>+		   first-&gt;buf_len);</div><div class='add'>+</div><div class='add'>+	ep = &amp;target-&gt;endpoint[first-&gt;endpoint];</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+</div><div class='add'>+	/* store receive packets */</div><div class='add'>+	list_splice_tail_init(pkt_queue, &amp;ep-&gt;rx_bufq);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;target-&gt;rx_lock);</div><div class='add'>+</div><div class='add'>+	if (status != 0) {</div><div class='add'>+		/* walk through queue and mark each one canceled */</div><div class='add'>+		list_for_each_entry_safe(packet, tmp_pkt, pkt_queue, list) {</div><div class='add'>+			packet-&gt;status = -ECANCELED;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		do_recv_completion(ep, pkt_queue);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_htc_pipe_activity_changed(struct htc_target *target,</div><div class='add'>+					     enum htc_endpoint_id ep,</div><div class='add'>+					     bool active)</div><div class='add'>+{</div><div class='add'>+	/* TODO */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_htc_pipe_flush_rx_buf(struct htc_target *target)</div><div class='add'>+{</div><div class='add'>+	/* TODO */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_htc_pipe_credit_setup(struct htc_target *target,</div><div class='add'>+					struct ath6kl_htc_credit_info *info)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ath6kl_htc_ops ath6kl_htc_pipe_ops = {</div><div class='add'>+	.create = ath6kl_htc_pipe_create,</div><div class='add'>+	.wait_target = ath6kl_htc_pipe_wait_target,</div><div class='add'>+	.start = ath6kl_htc_pipe_start,</div><div class='add'>+	.conn_service = ath6kl_htc_pipe_conn_service,</div><div class='add'>+	.tx = ath6kl_htc_pipe_tx,</div><div class='add'>+	.stop = ath6kl_htc_pipe_stop,</div><div class='add'>+	.cleanup = ath6kl_htc_pipe_cleanup,</div><div class='add'>+	.flush_txep = ath6kl_htc_pipe_flush_txep,</div><div class='add'>+	.flush_rx_buf = ath6kl_htc_pipe_flush_rx_buf,</div><div class='add'>+	.activity_changed = ath6kl_htc_pipe_activity_changed,</div><div class='add'>+	.get_rxbuf_num = ath6kl_htc_pipe_get_rxbuf_num,</div><div class='add'>+	.add_rxbuf_multiple = ath6kl_htc_pipe_add_rxbuf_multiple,</div><div class='add'>+	.credit_setup = ath6kl_htc_pipe_credit_setup,</div><div class='add'>+	.tx_complete = ath6kl_htc_pipe_tx_complete,</div><div class='add'>+	.rx_complete = ath6kl_htc_pipe_rx_complete,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ath6kl_htc_pipe_attach(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	ar-&gt;htc_ops = &amp;ath6kl_htc_pipe_ops;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/init.c b/drivers/net/wireless/ath/ath6kl/init.c<br/>index 03cae142f178..7eb0515f458a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/init.c</a></div><div class='hunk'>@@ -16,17 +16,21 @@</div><div class='ctx'>  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/mmc/sdio_func.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='ctx'> #include "cfg80211.h"</div><div class='ctx'> #include "target.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "hif-ops.h"</div><div class='add'>+#include "htc-ops.h"</div><div class='ctx'> </div><div class='ctx'> static const struct ath6kl_hw hw_list[] = {</div><div class='ctx'> 	{</div><div class='hunk'>@@ -115,6 +119,24 @@ static const struct ath6kl_hw hw_list[] = {</div><div class='ctx'> 		.fw_board		= AR6004_HW_1_1_BOARD_DATA_FILE,</div><div class='ctx'> 		.fw_default_board	= AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.id				= AR6004_HW_1_2_VERSION,</div><div class='add'>+		.name				= "ar6004 hw 1.2",</div><div class='add'>+		.dataset_patch_addr		= 0x436ecc,</div><div class='add'>+		.app_load_addr			= 0x1234,</div><div class='add'>+		.board_ext_data_addr		= 0x437000,</div><div class='add'>+		.reserved_ram_size		= 9216,</div><div class='add'>+		.board_addr			= 0x435c00,</div><div class='add'>+		.refclk_hz			= 40000000,</div><div class='add'>+		.uarttx_pin			= 11,</div><div class='add'>+</div><div class='add'>+		.fw = {</div><div class='add'>+			.dir		= AR6004_HW_1_2_FW_DIR,</div><div class='add'>+			.fw		= AR6004_HW_1_2_FIRMWARE_FILE,</div><div class='add'>+		},</div><div class='add'>+		.fw_board		= AR6004_HW_1_2_BOARD_DATA_FILE,</div><div class='add'>+		.fw_default_board	= AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -256,6 +278,7 @@ static int ath6kl_init_service_ep(struct ath6kl *ar)</div><div class='ctx'> 	memset(&amp;connect, 0, sizeof(connect));</div><div class='ctx'> </div><div class='ctx'> 	/* these fields are the same for all service endpoints */</div><div class='add'>+	connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;</div><div class='ctx'> 	connect.ep_cb.rx = ath6kl_rx;</div><div class='ctx'> 	connect.ep_cb.rx_refill = ath6kl_rx_refill;</div><div class='ctx'> 	connect.ep_cb.tx_full = ath6kl_tx_queue_full;</div><div class='hunk'>@@ -440,9 +463,9 @@ static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)</div><div class='ctx'> 					      P2P_FLAG_MACADDR_REQ |</div><div class='ctx'> 					      P2P_FLAG_HMODEL_REQ);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "</div><div class='del'>-				   "capabilities (%d) - assuming P2P not "</div><div class='del'>-				   "supported\n", ret);</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_TRC,</div><div class='add'>+				   "failed to request P2P capabilities (%d) - assuming P2P not supported\n",</div><div class='add'>+				   ret);</div><div class='ctx'> 			ar-&gt;p2p = false;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -451,8 +474,9 @@ static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)</div><div class='ctx'> 		/* Enable Probe Request reporting for P2P */</div><div class='ctx'> 		ret = ath6kl_wmi_probe_report_req_cmd(ar-&gt;wmi, idx, true);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "</div><div class='del'>-				   "Request reporting (%d)\n", ret);</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_TRC,</div><div class='add'>+				   "failed to enable Probe Request reporting (%d)\n",</div><div class='add'>+				   ret);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -485,22 +509,31 @@ int ath6kl_configure_target(struct ath6kl *ar)</div><div class='ctx'> 		fw_mode |= fw_iftype &lt;&lt; (i * HI_OPTION_FW_MODE_BITS);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * By default, submodes :</div><div class='add'>+	 * Submodes when fw does not support dynamic interface</div><div class='add'>+	 * switching:</div><div class='ctx'> 	 *		vif[0] - AP/STA/IBSS</div><div class='ctx'> 	 *		vif[1] - "P2P dev"/"P2P GO"/"P2P Client"</div><div class='ctx'> 	 *		vif[2] - "P2P dev"/"P2P GO"/"P2P Client"</div><div class='add'>+	 * Otherwise, All the interface are initialized to p2p dev.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ar-&gt;max_norm_iface; i++)</div><div class='del'>-		fw_submode |= HI_OPTION_FW_SUBMODE_NONE &lt;&lt;</div><div class='del'>-			      (i * HI_OPTION_FW_SUBMODE_BITS);</div><div class='add'>+	if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,</div><div class='add'>+		     ar-&gt;fw_capabilities)) {</div><div class='add'>+		for (i = 0; i &lt; ar-&gt;vif_max; i++)</div><div class='add'>+			fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV &lt;&lt;</div><div class='add'>+				(i * HI_OPTION_FW_SUBMODE_BITS);</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; ar-&gt;max_norm_iface; i++)</div><div class='add'>+			fw_submode |= HI_OPTION_FW_SUBMODE_NONE &lt;&lt;</div><div class='add'>+				(i * HI_OPTION_FW_SUBMODE_BITS);</div><div class='ctx'> </div><div class='del'>-	for (i = ar-&gt;max_norm_iface; i &lt; ar-&gt;vif_max; i++)</div><div class='del'>-		fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV &lt;&lt;</div><div class='del'>-			      (i * HI_OPTION_FW_SUBMODE_BITS);</div><div class='add'>+		for (i = ar-&gt;max_norm_iface; i &lt; ar-&gt;vif_max; i++)</div><div class='add'>+			fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV &lt;&lt;</div><div class='add'>+				(i * HI_OPTION_FW_SUBMODE_BITS);</div><div class='ctx'> </div><div class='del'>-	if (ar-&gt;p2p &amp;&amp; ar-&gt;vif_max == 1)</div><div class='del'>-		fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;</div><div class='add'>+		if (ar-&gt;p2p &amp;&amp; ar-&gt;vif_max == 1)</div><div class='add'>+			fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,</div><div class='ctx'> 				  HTC_PROTOCOL_VERSION) != 0) {</div><div class='hunk'>@@ -539,18 +572,20 @@ int ath6kl_configure_target(struct ath6kl *ar)</div><div class='ctx'> 	 * but possible in theory.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	param = ar-&gt;hw.board_ext_data_addr;</div><div class='del'>-	ram_reserved_size = ar-&gt;hw.reserved_ram_size;</div><div class='add'>+	if (ar-&gt;target_type == TARGET_TYPE_AR6003) {</div><div class='add'>+		param = ar-&gt;hw.board_ext_data_addr;</div><div class='add'>+		ram_reserved_size = ar-&gt;hw.reserved_ram_size;</div><div class='ctx'> </div><div class='del'>-	if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {</div><div class='del'>-		ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='add'>+		if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {</div><div class='add'>+			ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,</div><div class='del'>-				  ram_reserved_size) != 0) {</div><div class='del'>-		ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");</div><div class='del'>-		return -EIO;</div><div class='add'>+		if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,</div><div class='add'>+					  ram_reserved_size) != 0) {</div><div class='add'>+			ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* set the block size for the target */</div><div class='hunk'>@@ -924,13 +959,14 @@ static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)</div><div class='ctx'> 			if (ar-&gt;fw != NULL)</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='del'>-			ar-&gt;fw = kmemdup(data, ie_len, GFP_KERNEL);</div><div class='add'>+			ar-&gt;fw = vmalloc(ie_len);</div><div class='ctx'> </div><div class='ctx'> 			if (ar-&gt;fw == NULL) {</div><div class='ctx'> 				ret = -ENOMEM;</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='add'>+			memcpy(ar-&gt;fw, data, ie_len);</div><div class='ctx'> 			ar-&gt;fw_len = ie_len;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ATH6KL_FW_IE_PATCH_IMAGE:</div><div class='hunk'>@@ -1507,7 +1543,7 @@ int ath6kl_init_hw_start(struct ath6kl *ar)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* setup credit distribution */</div><div class='del'>-	ath6kl_credit_setup(ar-&gt;htc_target, &amp;ar-&gt;credit_state_info);</div><div class='add'>+	ath6kl_htc_credit_setup(ar-&gt;htc_target, &amp;ar-&gt;credit_state_info);</div><div class='ctx'> </div><div class='ctx'> 	/* start HTC */</div><div class='ctx'> 	ret = ath6kl_htc_start(ar-&gt;htc_target);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/main.c b/drivers/net/wireless/ath/ath6kl/main.c<br/>index 229e1922ebe4..e5524470529c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/main.c</a></div><div class='hunk'>@@ -15,6 +15,8 @@</div><div class='ctx'>  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include "core.h"</div><div class='ctx'> #include "hif-ops.h"</div><div class='ctx'> #include "cfg80211.h"</div><div class='hunk'>@@ -419,8 +421,8 @@ void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel)</div><div class='ctx'> 		if (!ik-&gt;valid)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "Delayed addkey for "</div><div class='del'>-			   "the initial group key for AP mode\n");</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_WLAN_CFG,</div><div class='add'>+			   "Delayed addkey for the initial group key for AP mode\n");</div><div class='ctx'> 		memset(key_rsc, 0, sizeof(key_rsc));</div><div class='ctx'> 		res = ath6kl_wmi_addkey_cmd(</div><div class='ctx'> 			ar-&gt;wmi, vif-&gt;fw_vif_idx, ik-&gt;key_index, ik-&gt;key_type,</div><div class='hunk'>@@ -428,12 +430,19 @@ void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel)</div><div class='ctx'> 			ik-&gt;key,</div><div class='ctx'> 			KEY_OP_INIT_VAL, NULL, SYNC_BOTH_WMIFLAG);</div><div class='ctx'> 		if (res) {</div><div class='del'>-			ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "Delayed "</div><div class='del'>-				   "addkey failed: %d\n", res);</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_WLAN_CFG,</div><div class='add'>+				   "Delayed addkey failed: %d\n", res);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ar-&gt;want_ch_switch &amp; (1 &lt;&lt; vif-&gt;fw_vif_idx)) {</div><div class='add'>+		ar-&gt;want_ch_switch &amp;= ~(1 &lt;&lt; vif-&gt;fw_vif_idx);</div><div class='add'>+		/* we actually don't know the phymode, default to HT20 */</div><div class='add'>+		ath6kl_cfg80211_ch_switch_notify(vif, channel,</div><div class='add'>+						 WMI_11G_HT20);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ath6kl_wmi_bssfilter_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx, NONE_BSS_FILTER, 0);</div><div class='ctx'> 	set_bit(CONNECTED, &amp;vif-&gt;flags);</div><div class='ctx'> 	netif_carrier_on(vif-&gt;ndev);</div><div class='hunk'>@@ -539,7 +548,8 @@ void ath6kl_disconnect(struct ath6kl_vif *vif)</div><div class='ctx'> </div><div class='ctx'> /* WMI Event handlers */</div><div class='ctx'> </div><div class='del'>-void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver)</div><div class='add'>+void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver,</div><div class='add'>+			enum wmi_phy_cap cap)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath6kl *ar = devt;</div><div class='ctx'> </div><div class='hunk'>@@ -549,6 +559,7 @@ void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver)</div><div class='ctx'> </div><div class='ctx'> 	ar-&gt;version.wlan_ver = sw_ver;</div><div class='ctx'> 	ar-&gt;version.abi_ver = abi_ver;</div><div class='add'>+	ar-&gt;hw.cap = cap;</div><div class='ctx'> </div><div class='ctx'> 	snprintf(ar-&gt;wiphy-&gt;fw_version,</div><div class='ctx'> 		 sizeof(ar-&gt;wiphy-&gt;fw_version),</div><div class='hunk'>@@ -582,6 +593,45 @@ void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status)</div><div class='ctx'> 	ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "scan complete: %d\n", status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ath6kl_commit_ch_switch(struct ath6kl_vif *vif, u16 channel)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	struct ath6kl *ar = vif-&gt;ar;</div><div class='add'>+</div><div class='add'>+	vif-&gt;next_chan = channel;</div><div class='add'>+	vif-&gt;profile.ch = cpu_to_le16(channel);</div><div class='add'>+</div><div class='add'>+	switch (vif-&gt;nw_type) {</div><div class='add'>+	case AP_NETWORK:</div><div class='add'>+		return ath6kl_wmi_ap_profile_commit(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='add'>+						    &amp;vif-&gt;profile);</div><div class='add'>+	default:</div><div class='add'>+		ath6kl_err("won't switch channels nw_type=%d\n", vif-&gt;nw_type);</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_check_ch_switch(struct ath6kl *ar, u16 channel)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	struct ath6kl_vif *vif;</div><div class='add'>+	int res = 0;</div><div class='add'>+</div><div class='add'>+	if (!ar-&gt;want_ch_switch)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ar-&gt;list_lock);</div><div class='add'>+	list_for_each_entry(vif, &amp;ar-&gt;vif_list, list) {</div><div class='add'>+		if (ar-&gt;want_ch_switch &amp; (1 &lt;&lt; vif-&gt;fw_vif_idx))</div><div class='add'>+			res = ath6kl_commit_ch_switch(vif, channel);</div><div class='add'>+</div><div class='add'>+		if (res)</div><div class='add'>+			ath6kl_err("channel switch failed nw_type %d res %d\n",</div><div class='add'>+				   vif-&gt;nw_type, res);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;ar-&gt;list_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel, u8 *bssid,</div><div class='ctx'> 			  u16 listen_int, u16 beacon_int,</div><div class='ctx'> 			  enum network_type net_type, u8 beacon_ie_len,</div><div class='hunk'>@@ -599,9 +649,11 @@ void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel, u8 *bssid,</div><div class='ctx'> 	memcpy(vif-&gt;bssid, bssid, sizeof(vif-&gt;bssid));</div><div class='ctx'> 	vif-&gt;bss_ch = channel;</div><div class='ctx'> </div><div class='del'>-	if ((vif-&gt;nw_type == INFRA_NETWORK))</div><div class='add'>+	if ((vif-&gt;nw_type == INFRA_NETWORK)) {</div><div class='ctx'> 		ath6kl_wmi_listeninterval_cmd(ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='ctx'> 					      vif-&gt;listen_intvl_t, 0);</div><div class='add'>+		ath6kl_check_ch_switch(ar, channel);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	netif_wake_queue(vif-&gt;ndev);</div><div class='ctx'> </div><div class='hunk'>@@ -756,6 +808,10 @@ static void ath6kl_update_target_stats(struct ath6kl_vif *vif, u8 *ptr, u32 len)</div><div class='ctx'> 	stats-&gt;wow_evt_discarded +=</div><div class='ctx'> 		le16_to_cpu(tgt_stats-&gt;wow_stats.wow_evt_discarded);</div><div class='ctx'> </div><div class='add'>+	stats-&gt;arp_received = le32_to_cpu(tgt_stats-&gt;arp_stats.arp_received);</div><div class='add'>+	stats-&gt;arp_replied = le32_to_cpu(tgt_stats-&gt;arp_stats.arp_replied);</div><div class='add'>+	stats-&gt;arp_matched = le32_to_cpu(tgt_stats-&gt;arp_stats.arp_matched);</div><div class='add'>+</div><div class='ctx'> 	if (test_bit(STATS_UPDATE_PEND, &amp;vif-&gt;flags)) {</div><div class='ctx'> 		clear_bit(STATS_UPDATE_PEND, &amp;vif-&gt;flags);</div><div class='ctx'> 		wake_up(&amp;ar-&gt;event_wq);</div><div class='hunk'>@@ -920,6 +976,11 @@ void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason, u8 *bssid,</div><div class='ctx'> 	struct ath6kl *ar = vif-&gt;ar;</div><div class='ctx'> </div><div class='ctx'> 	if (vif-&gt;nw_type == AP_NETWORK) {</div><div class='add'>+		/* disconnect due to other STA vif switching channels */</div><div class='add'>+		if (reason == BSS_DISCONNECTED &amp;&amp;</div><div class='add'>+		    prot_reason_status == WMI_AP_REASON_STA_ROAM)</div><div class='add'>+			ar-&gt;want_ch_switch |= 1 &lt;&lt; vif-&gt;fw_vif_idx;</div><div class='add'>+</div><div class='ctx'> 		if (!ath6kl_remove_sta(ar, bssid, prot_reason_status))</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='hunk'>@@ -1084,7 +1145,7 @@ static int ath6kl_set_features(struct net_device *dev,</div><div class='ctx'> static void ath6kl_set_multicast_list(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath6kl_vif *vif = netdev_priv(ndev);</div><div class='del'>-	bool mc_all_on = false, mc_all_off = false;</div><div class='add'>+	bool mc_all_on = false;</div><div class='ctx'> 	int mc_count = netdev_mc_count(ndev);</div><div class='ctx'> 	struct netdev_hw_addr *ha;</div><div class='ctx'> 	bool found;</div><div class='hunk'>@@ -1096,24 +1157,41 @@ static void ath6kl_set_multicast_list(struct net_device *ndev)</div><div class='ctx'> 	    !test_bit(WLAN_ENABLED, &amp;vif-&gt;flags))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* Enable multicast-all filter. */</div><div class='ctx'> 	mc_all_on = !!(ndev-&gt;flags &amp; IFF_PROMISC) ||</div><div class='ctx'> 		    !!(ndev-&gt;flags &amp; IFF_ALLMULTI) ||</div><div class='ctx'> 		    !!(mc_count &gt; ATH6K_MAX_MC_FILTERS_PER_LIST);</div><div class='ctx'> </div><div class='del'>-	mc_all_off = !(ndev-&gt;flags &amp; IFF_MULTICAST) || mc_count == 0;</div><div class='add'>+	if (mc_all_on)</div><div class='add'>+		set_bit(NETDEV_MCAST_ALL_ON, &amp;vif-&gt;flags);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(NETDEV_MCAST_ALL_ON, &amp;vif-&gt;flags);</div><div class='add'>+</div><div class='add'>+	mc_all_on = mc_all_on || (vif-&gt;ar-&gt;state == ATH6KL_STATE_ON);</div><div class='ctx'> </div><div class='del'>-	if (mc_all_on || mc_all_off) {</div><div class='del'>-		/* Enable/disable all multicast */</div><div class='del'>-		ath6kl_dbg(ATH6KL_DBG_TRC, "%s multicast filter\n",</div><div class='del'>-			   mc_all_on ? "enabling" : "disabling");</div><div class='del'>-		ret = ath6kl_wmi_mcast_filter_cmd(vif-&gt;ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='add'>+	if (!(ndev-&gt;flags &amp; IFF_MULTICAST)) {</div><div class='add'>+		mc_all_on = false;</div><div class='add'>+		set_bit(NETDEV_MCAST_ALL_OFF, &amp;vif-&gt;flags);</div><div class='add'>+	} else {</div><div class='add'>+		clear_bit(NETDEV_MCAST_ALL_OFF, &amp;vif-&gt;flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable/disable "multicast-all" filter*/</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_TRC, "%s multicast-all filter\n",</div><div class='add'>+		   mc_all_on ? "enabling" : "disabling");</div><div class='add'>+</div><div class='add'>+	ret = ath6kl_wmi_mcast_filter_cmd(vif-&gt;ar-&gt;wmi, vif-&gt;fw_vif_idx,</div><div class='ctx'> 						  mc_all_on);</div><div class='del'>-		if (ret)</div><div class='del'>-			ath6kl_warn("Failed to %s multicast receive\n",</div><div class='del'>-				    mc_all_on ? "enable" : "disable");</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath6kl_warn("Failed to %s multicast-all receive\n",</div><div class='add'>+			    mc_all_on ? "enable" : "disable");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (test_bit(NETDEV_MCAST_ALL_ON, &amp;vif-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Keep the driver and firmware mcast list in sync. */</div><div class='ctx'> 	list_for_each_entry_safe(mc_filter, tmp, &amp;vif-&gt;mc_filter, list) {</div><div class='ctx'> 		found = false;</div><div class='ctx'> 		netdev_for_each_mc_addr(ha, ndev) {</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/sdio.c b/drivers/net/wireless/ath/ath6kl/sdio.c<br/>index 53528648b425..05b95405f7b5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/sdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/sdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/sdio.c</a></div><div class='hunk'>@@ -552,7 +552,7 @@ static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer,</div><div class='ctx'> </div><div class='ctx'> 	bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);</div><div class='ctx'> </div><div class='del'>-	if (!bus_req)</div><div class='add'>+	if (WARN_ON_ONCE(!bus_req))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	bus_req-&gt;address = address;</div><div class='hunk'>@@ -915,6 +915,9 @@ static int ath6kl_sdio_suspend(struct ath6kl *ar, struct cfg80211_wowlan *wow)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> cut_pwr:</div><div class='add'>+	if (func-&gt;card &amp;&amp; func-&gt;card-&gt;host)</div><div class='add'>+		func-&gt;card-&gt;host-&gt;pm_flags &amp;= ~MMC_PM_KEEP_POWER;</div><div class='add'>+</div><div class='ctx'> 	return ath6kl_cfg80211_suspend(ar, ATH6KL_CFG_SUSPEND_CUTPOWER, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -985,9 +988,8 @@ static int ath6kl_set_addrwin_reg(struct ath6kl *ar, u32 reg_addr, u32 addr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (status) {</div><div class='del'>-		ath6kl_err("%s: failed to write initial bytes of 0x%x "</div><div class='del'>-			   "to window reg: 0x%X\n", __func__,</div><div class='del'>-			   addr, reg_addr);</div><div class='add'>+		ath6kl_err("%s: failed to write initial bytes of 0x%x to window reg: 0x%X\n",</div><div class='add'>+			   __func__, addr, reg_addr);</div><div class='ctx'> 		return status;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1076,8 +1078,8 @@ static int ath6kl_sdio_bmi_credits(struct ath6kl *ar)</div><div class='ctx'> 					 (u8 *)&amp;ar-&gt;bmi.cmd_credits, 4,</div><div class='ctx'> 					 HIF_RD_SYNC_BYTE_INC);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			ath6kl_err("Unable to decrement the command credit "</div><div class='del'>-						"count register: %d\n", ret);</div><div class='add'>+			ath6kl_err("Unable to decrement the command credit count register: %d\n",</div><div class='add'>+				   ret);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1362,7 +1364,7 @@ static int ath6kl_sdio_probe(struct sdio_func *func,</div><div class='ctx'> 		goto err_core_alloc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = ath6kl_core_init(ar);</div><div class='add'>+	ret = ath6kl_core_init(ar, ATH6KL_HTC_TYPE_MBOX);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath6kl_err("Failed to init ath6kl core\n");</div><div class='ctx'> 		goto err_core_alloc;</div><div class='hunk'>@@ -1457,3 +1459,6 @@ MODULE_FIRMWARE(AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE);</div><div class='ctx'> MODULE_FIRMWARE(AR6004_HW_1_1_FW_DIR "/" AR6004_HW_1_1_FIRMWARE_FILE);</div><div class='ctx'> MODULE_FIRMWARE(AR6004_HW_1_1_BOARD_DATA_FILE);</div><div class='ctx'> MODULE_FIRMWARE(AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE);</div><div class='add'>+MODULE_FIRMWARE(AR6004_HW_1_2_FW_DIR "/" AR6004_HW_1_2_FIRMWARE_FILE);</div><div class='add'>+MODULE_FIRMWARE(AR6004_HW_1_2_BOARD_DATA_FILE);</div><div class='add'>+MODULE_FIRMWARE(AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/testmode.c b/drivers/net/wireless/ath/ath6kl/testmode.c<br/>index 6675c92b542b..acc9aa832f76 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/testmode.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/testmode.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/testmode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/testmode.c</a></div><div class='hunk'>@@ -55,8 +55,9 @@ void ath6kl_tm_rx_event(struct ath6kl *ar, void *buf, size_t buf_len)</div><div class='ctx'> 		ath6kl_warn("failed to allocate testmode rx skb!\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	NLA_PUT_U32(skb, ATH6KL_TM_ATTR_CMD, ATH6KL_TM_CMD_TCMD);</div><div class='del'>-	NLA_PUT(skb, ATH6KL_TM_ATTR_DATA, buf_len, buf);</div><div class='add'>+	if (nla_put_u32(skb, ATH6KL_TM_ATTR_CMD, ATH6KL_TM_CMD_TCMD) ||</div><div class='add'>+	    nla_put(skb, ATH6KL_TM_ATTR_DATA, buf_len, buf))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	cfg80211_testmode_event(skb, GFP_KERNEL);</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/txrx.c b/drivers/net/wireless/ath/ath6kl/txrx.c<br/>index f85353fd1792..67206aedea6c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/txrx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/txrx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/txrx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/txrx.c</a></div><div class='hunk'>@@ -15,8 +15,11 @@</div><div class='ctx'>  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include "core.h"</div><div class='ctx'> #include "debug.h"</div><div class='add'>+#include "htc-ops.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * tid - tid_mux0..tid_mux3</div><div class='hunk'>@@ -322,6 +325,7 @@ int ath6kl_control_tx(void *devt, struct sk_buff *skb,</div><div class='ctx'> 	cookie-&gt;map_no = 0;</div><div class='ctx'> 	set_htc_pkt_info(&amp;cookie-&gt;htc_pkt, cookie, skb-&gt;data, skb-&gt;len,</div><div class='ctx'> 			 eid, ATH6KL_CONTROL_PKT_TAG);</div><div class='add'>+	cookie-&gt;htc_pkt.skb = skb;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This interface is asynchronous, if there is an error, cleanup</div><div class='hunk'>@@ -358,15 +362,11 @@ int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		   skb, skb-&gt;data, skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	/* If target is not associated */</div><div class='del'>-	if (!test_bit(CONNECTED, &amp;vif-&gt;flags)) {</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='add'>+	if (!test_bit(CONNECTED, &amp;vif-&gt;flags))</div><div class='add'>+		goto fail_tx;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON_ONCE(ar-&gt;state != ATH6KL_STATE_ON)) {</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='add'>+	if (WARN_ON_ONCE(ar-&gt;state != ATH6KL_STATE_ON))</div><div class='add'>+		goto fail_tx;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(WMI_READY, &amp;ar-&gt;flag))</div><div class='ctx'> 		goto fail_tx;</div><div class='hunk'>@@ -490,6 +490,7 @@ int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	cookie-&gt;map_no = map_no;</div><div class='ctx'> 	set_htc_pkt_info(&amp;cookie-&gt;htc_pkt, cookie, skb-&gt;data, skb-&gt;len,</div><div class='ctx'> 			 eid, htc_tag);</div><div class='add'>+	cookie-&gt;htc_pkt.skb = skb;</div><div class='ctx'> </div><div class='ctx'> 	ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "tx ",</div><div class='ctx'> 			skb-&gt;data, skb-&gt;len);</div><div class='hunk'>@@ -570,7 +571,7 @@ void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active)</div><div class='ctx'> </div><div class='ctx'> notify_htc:</div><div class='ctx'> 	/* notify HTC, this may cause credit distribution changes */</div><div class='del'>-	ath6kl_htc_indicate_activity_change(ar-&gt;htc_target, eid, active);</div><div class='add'>+	ath6kl_htc_activity_changed(ar-&gt;htc_target, eid, active);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,</div><div class='hunk'>@@ -666,9 +667,10 @@ static void ath6kl_tx_clear_node_map(struct ath6kl_vif *vif,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ath6kl_tx_complete(void *context, struct list_head *packet_queue)</div><div class='add'>+void ath6kl_tx_complete(struct htc_target *target,</div><div class='add'>+			struct list_head *packet_queue)</div><div class='ctx'> {</div><div class='del'>-	struct ath6kl *ar = context;</div><div class='add'>+	struct ath6kl *ar = target-&gt;dev-&gt;ar;</div><div class='ctx'> 	struct sk_buff_head skb_queue;</div><div class='ctx'> 	struct htc_packet *packet;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='hunk'>@@ -887,6 +889,7 @@ void ath6kl_rx_refill(struct htc_target *target, enum htc_endpoint_id endpoint)</div><div class='ctx'> 			skb-&gt;data = PTR_ALIGN(skb-&gt;data - 4, 4);</div><div class='ctx'> 		set_htc_rxpkt_info(packet, skb, skb-&gt;data,</div><div class='ctx'> 				   ATH6KL_BUFFER_SIZE, endpoint);</div><div class='add'>+		packet-&gt;skb = skb;</div><div class='ctx'> 		list_add_tail(&amp;packet-&gt;list, &amp;queue);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -909,6 +912,8 @@ void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count)</div><div class='ctx'> 			skb-&gt;data = PTR_ALIGN(skb-&gt;data - 4, 4);</div><div class='ctx'> 		set_htc_rxpkt_info(packet, skb, skb-&gt;data,</div><div class='ctx'> 				   ATH6KL_AMSDU_BUFFER_SIZE, 0);</div><div class='add'>+		packet-&gt;skb = skb;</div><div class='add'>+</div><div class='ctx'> 		spin_lock_bh(&amp;ar-&gt;lock);</div><div class='ctx'> 		list_add_tail(&amp;packet-&gt;list, &amp;ar-&gt;amsdu_rx_buffer_queue);</div><div class='ctx'> 		spin_unlock_bh(&amp;ar-&gt;lock);</div><div class='hunk'>@@ -1281,6 +1286,7 @@ void ath6kl_rx(struct htc_target *target, struct htc_packet *packet)</div><div class='ctx'> 	struct wmi_data_hdr *dhdr;</div><div class='ctx'> 	int min_hdr_len;</div><div class='ctx'> 	u8 meta_type, dot11_hdr = 0;</div><div class='add'>+	u8 pad_before_data_start;</div><div class='ctx'> 	int status = packet-&gt;status;</div><div class='ctx'> 	enum htc_endpoint_id ept = packet-&gt;endpoint;</div><div class='ctx'> 	bool is_amsdu, prev_ps, ps_state = false;</div><div class='hunk'>@@ -1492,6 +1498,10 @@ void ath6kl_rx(struct htc_target *target, struct htc_packet *packet)</div><div class='ctx'> 	seq_no = wmi_data_hdr_get_seqno(dhdr);</div><div class='ctx'> 	meta_type = wmi_data_hdr_get_meta(dhdr);</div><div class='ctx'> 	dot11_hdr = wmi_data_hdr_get_dot11(dhdr);</div><div class='add'>+	pad_before_data_start =</div><div class='add'>+		(le16_to_cpu(dhdr-&gt;info3) &gt;&gt; WMI_DATA_HDR_PAD_BEFORE_DATA_SHIFT)</div><div class='add'>+			&amp; WMI_DATA_HDR_PAD_BEFORE_DATA_MASK;</div><div class='add'>+</div><div class='ctx'> 	skb_pull(skb, sizeof(struct wmi_data_hdr));</div><div class='ctx'> </div><div class='ctx'> 	switch (meta_type) {</div><div class='hunk'>@@ -1510,6 +1520,8 @@ void ath6kl_rx(struct htc_target *target, struct htc_packet *packet)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	skb_pull(skb, pad_before_data_start);</div><div class='add'>+</div><div class='ctx'> 	if (dot11_hdr)</div><div class='ctx'> 		status = ath6kl_wmi_dot11_hdr_remove(ar-&gt;wmi, skb);</div><div class='ctx'> 	else if (!is_amsdu)</div><div class='hunk'>@@ -1579,7 +1591,8 @@ void ath6kl_rx(struct htc_target *target, struct htc_packet *packet)</div><div class='ctx'> 			/* aggregation code will handle the skb */</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='add'>+	} else if (!is_broadcast_ether_addr(datap-&gt;h_dest))</div><div class='add'>+		vif-&gt;net_stats.multicast++;</div><div class='ctx'> </div><div class='ctx'> 	ath6kl_deliver_frames_to_nw_stack(vif-&gt;ndev, skb);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/usb.c b/drivers/net/wireless/ath/ath6kl/usb.c<br/>index 325b1224c2b1..3740c3d6ab88 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/usb.c</a></div><div class='hunk'>@@ -21,15 +21,77 @@</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "core.h"</div><div class='ctx'> </div><div class='add'>+/* constants */</div><div class='add'>+#define TX_URB_COUNT            32</div><div class='add'>+#define RX_URB_COUNT            32</div><div class='add'>+#define ATH6KL_USB_RX_BUFFER_SIZE  1700</div><div class='add'>+</div><div class='add'>+/* tx/rx pipes for usb */</div><div class='add'>+enum ATH6KL_USB_PIPE_ID {</div><div class='add'>+	ATH6KL_USB_PIPE_TX_CTRL = 0,</div><div class='add'>+	ATH6KL_USB_PIPE_TX_DATA_LP,</div><div class='add'>+	ATH6KL_USB_PIPE_TX_DATA_MP,</div><div class='add'>+	ATH6KL_USB_PIPE_TX_DATA_HP,</div><div class='add'>+	ATH6KL_USB_PIPE_RX_CTRL,</div><div class='add'>+	ATH6KL_USB_PIPE_RX_DATA,</div><div class='add'>+	ATH6KL_USB_PIPE_RX_DATA2,</div><div class='add'>+	ATH6KL_USB_PIPE_RX_INT,</div><div class='add'>+	ATH6KL_USB_PIPE_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ATH6KL_USB_PIPE_INVALID ATH6KL_USB_PIPE_MAX</div><div class='add'>+</div><div class='add'>+struct ath6kl_usb_pipe {</div><div class='add'>+	struct list_head urb_list_head;</div><div class='add'>+	struct usb_anchor urb_submitted;</div><div class='add'>+	u32 urb_alloc;</div><div class='add'>+	u32 urb_cnt;</div><div class='add'>+	u32 urb_cnt_thresh;</div><div class='add'>+	unsigned int usb_pipe_handle;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u8 ep_address;</div><div class='add'>+	u8 logical_pipe_num;</div><div class='add'>+	struct ath6kl_usb *ar_usb;</div><div class='add'>+	u16 max_packet_size;</div><div class='add'>+	struct work_struct io_complete_work;</div><div class='add'>+	struct sk_buff_head io_comp_queue;</div><div class='add'>+	struct usb_endpoint_descriptor *ep_desc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ATH6KL_USB_PIPE_FLAG_TX    (1 &lt;&lt; 0)</div><div class='add'>+</div><div class='ctx'> /* usb device object */</div><div class='ctx'> struct ath6kl_usb {</div><div class='add'>+	/* protects pipe-&gt;urb_list_head and  pipe-&gt;urb_cnt */</div><div class='add'>+	spinlock_t cs_lock;</div><div class='add'>+</div><div class='ctx'> 	struct usb_device *udev;</div><div class='ctx'> 	struct usb_interface *interface;</div><div class='add'>+	struct ath6kl_usb_pipe pipes[ATH6KL_USB_PIPE_MAX];</div><div class='ctx'> 	u8 *diag_cmd_buffer;</div><div class='ctx'> 	u8 *diag_resp_buffer;</div><div class='ctx'> 	struct ath6kl *ar;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* usb urb object */</div><div class='add'>+struct ath6kl_urb_context {</div><div class='add'>+	struct list_head link;</div><div class='add'>+	struct ath6kl_usb_pipe *pipe;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct ath6kl *ar;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* USB endpoint definitions */</div><div class='add'>+#define ATH6KL_USB_EP_ADDR_APP_CTRL_IN          0x81</div><div class='add'>+#define ATH6KL_USB_EP_ADDR_APP_DATA_IN          0x82</div><div class='add'>+#define ATH6KL_USB_EP_ADDR_APP_DATA2_IN         0x83</div><div class='add'>+#define ATH6KL_USB_EP_ADDR_APP_INT_IN           0x84</div><div class='add'>+</div><div class='add'>+#define ATH6KL_USB_EP_ADDR_APP_CTRL_OUT         0x01</div><div class='add'>+#define ATH6KL_USB_EP_ADDR_APP_DATA_LP_OUT      0x02</div><div class='add'>+#define ATH6KL_USB_EP_ADDR_APP_DATA_MP_OUT      0x03</div><div class='add'>+#define ATH6KL_USB_EP_ADDR_APP_DATA_HP_OUT      0x04</div><div class='add'>+</div><div class='ctx'> /* diagnostic command defnitions */</div><div class='ctx'> #define ATH6KL_USB_CONTROL_REQ_SEND_BMI_CMD        1</div><div class='ctx'> #define ATH6KL_USB_CONTROL_REQ_RECV_BMI_RESP       2</div><div class='hunk'>@@ -55,11 +117,493 @@ struct ath6kl_usb_ctrl_diag_resp_read {</div><div class='ctx'> 	__le32 value;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+/* function declarations */</div><div class='add'>+static void ath6kl_usb_recv_complete(struct urb *urb);</div><div class='add'>+</div><div class='add'>+#define ATH6KL_USB_IS_BULK_EP(attr) (((attr) &amp; 3) == 0x02)</div><div class='add'>+#define ATH6KL_USB_IS_INT_EP(attr)  (((attr) &amp; 3) == 0x03)</div><div class='add'>+#define ATH6KL_USB_IS_ISOC_EP(attr)  (((attr) &amp; 3) == 0x01)</div><div class='add'>+#define ATH6KL_USB_IS_DIR_IN(addr)  ((addr) &amp; 0x80)</div><div class='add'>+</div><div class='add'>+/* pipe/urb operations */</div><div class='add'>+static struct ath6kl_urb_context *</div><div class='add'>+ath6kl_usb_alloc_urb_from_pipe(struct ath6kl_usb_pipe *pipe)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_urb_context *urb_context = NULL;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;pipe-&gt;ar_usb-&gt;cs_lock, flags);</div><div class='add'>+	if (!list_empty(&amp;pipe-&gt;urb_list_head)) {</div><div class='add'>+		urb_context =</div><div class='add'>+		    list_first_entry(&amp;pipe-&gt;urb_list_head,</div><div class='add'>+				     struct ath6kl_urb_context, link);</div><div class='add'>+		list_del(&amp;urb_context-&gt;link);</div><div class='add'>+		pipe-&gt;urb_cnt--;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;pipe-&gt;ar_usb-&gt;cs_lock, flags);</div><div class='add'>+</div><div class='add'>+	return urb_context;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_usb_free_urb_to_pipe(struct ath6kl_usb_pipe *pipe,</div><div class='add'>+					struct ath6kl_urb_context *urb_context)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;pipe-&gt;ar_usb-&gt;cs_lock, flags);</div><div class='add'>+	pipe-&gt;urb_cnt++;</div><div class='add'>+</div><div class='add'>+	list_add(&amp;urb_context-&gt;link, &amp;pipe-&gt;urb_list_head);</div><div class='add'>+	spin_unlock_irqrestore(&amp;pipe-&gt;ar_usb-&gt;cs_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_usb_cleanup_recv_urb(struct ath6kl_urb_context *urb_context)</div><div class='add'>+{</div><div class='add'>+	if (urb_context-&gt;skb != NULL) {</div><div class='add'>+		dev_kfree_skb(urb_context-&gt;skb);</div><div class='add'>+		urb_context-&gt;skb = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath6kl_usb_free_urb_to_pipe(urb_context-&gt;pipe, urb_context);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ath6kl_usb *ath6kl_usb_priv(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	return ar-&gt;hif_priv;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* pipe resource allocation/cleanup */</div><div class='add'>+static int ath6kl_usb_alloc_pipe_resources(struct ath6kl_usb_pipe *pipe,</div><div class='add'>+					   int urb_cnt)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_urb_context *urb_context;</div><div class='add'>+	int status = 0, i;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;pipe-&gt;urb_list_head);</div><div class='add'>+	init_usb_anchor(&amp;pipe-&gt;urb_submitted);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; urb_cnt; i++) {</div><div class='add'>+		urb_context = kzalloc(sizeof(struct ath6kl_urb_context),</div><div class='add'>+				      GFP_KERNEL);</div><div class='add'>+		if (urb_context == NULL)</div><div class='add'>+			/* FIXME: set status to -ENOMEM */</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		urb_context-&gt;pipe = pipe;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * we are only allocate the urb contexts here, the actual URB</div><div class='add'>+		 * is allocated from the kernel as needed to do a transaction</div><div class='add'>+		 */</div><div class='add'>+		pipe-&gt;urb_alloc++;</div><div class='add'>+		ath6kl_usb_free_urb_to_pipe(pipe, urb_context);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_USB,</div><div class='add'>+		   "ath6kl usb: alloc resources lpipe:%d hpipe:0x%X urbs:%d\n",</div><div class='add'>+		   pipe-&gt;logical_pipe_num, pipe-&gt;usb_pipe_handle,</div><div class='add'>+		   pipe-&gt;urb_alloc);</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_usb_free_pipe_resources(struct ath6kl_usb_pipe *pipe)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_urb_context *urb_context;</div><div class='add'>+</div><div class='add'>+	if (pipe-&gt;ar_usb == NULL) {</div><div class='add'>+		/* nothing allocated for this pipe */</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_USB,</div><div class='add'>+		   "ath6kl usb: free resources lpipe:%d"</div><div class='add'>+		   "hpipe:0x%X urbs:%d avail:%d\n",</div><div class='add'>+		   pipe-&gt;logical_pipe_num, pipe-&gt;usb_pipe_handle,</div><div class='add'>+		   pipe-&gt;urb_alloc, pipe-&gt;urb_cnt);</div><div class='add'>+</div><div class='add'>+	if (pipe-&gt;urb_alloc != pipe-&gt;urb_cnt) {</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_USB,</div><div class='add'>+			   "ath6kl usb: urb leak! lpipe:%d"</div><div class='add'>+			   "hpipe:0x%X urbs:%d avail:%d\n",</div><div class='add'>+			   pipe-&gt;logical_pipe_num, pipe-&gt;usb_pipe_handle,</div><div class='add'>+			   pipe-&gt;urb_alloc, pipe-&gt;urb_cnt);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (true) {</div><div class='add'>+		urb_context = ath6kl_usb_alloc_urb_from_pipe(pipe);</div><div class='add'>+		if (urb_context == NULL)</div><div class='add'>+			break;</div><div class='add'>+		kfree(urb_context);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_usb_cleanup_pipe_resources(struct ath6kl_usb *ar_usb)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ATH6KL_USB_PIPE_MAX; i++)</div><div class='add'>+		ath6kl_usb_free_pipe_resources(&amp;ar_usb-&gt;pipes[i]);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 ath6kl_usb_get_logical_pipe_num(struct ath6kl_usb *ar_usb,</div><div class='add'>+					  u8 ep_address, int *urb_count)</div><div class='add'>+{</div><div class='add'>+	u8 pipe_num = ATH6KL_USB_PIPE_INVALID;</div><div class='add'>+</div><div class='add'>+	switch (ep_address) {</div><div class='add'>+	case ATH6KL_USB_EP_ADDR_APP_CTRL_IN:</div><div class='add'>+		pipe_num = ATH6KL_USB_PIPE_RX_CTRL;</div><div class='add'>+		*urb_count = RX_URB_COUNT;</div><div class='add'>+		break;</div><div class='add'>+	case ATH6KL_USB_EP_ADDR_APP_DATA_IN:</div><div class='add'>+		pipe_num = ATH6KL_USB_PIPE_RX_DATA;</div><div class='add'>+		*urb_count = RX_URB_COUNT;</div><div class='add'>+		break;</div><div class='add'>+	case ATH6KL_USB_EP_ADDR_APP_INT_IN:</div><div class='add'>+		pipe_num = ATH6KL_USB_PIPE_RX_INT;</div><div class='add'>+		*urb_count = RX_URB_COUNT;</div><div class='add'>+		break;</div><div class='add'>+	case ATH6KL_USB_EP_ADDR_APP_DATA2_IN:</div><div class='add'>+		pipe_num = ATH6KL_USB_PIPE_RX_DATA2;</div><div class='add'>+		*urb_count = RX_URB_COUNT;</div><div class='add'>+		break;</div><div class='add'>+	case ATH6KL_USB_EP_ADDR_APP_CTRL_OUT:</div><div class='add'>+		pipe_num = ATH6KL_USB_PIPE_TX_CTRL;</div><div class='add'>+		*urb_count = TX_URB_COUNT;</div><div class='add'>+		break;</div><div class='add'>+	case ATH6KL_USB_EP_ADDR_APP_DATA_LP_OUT:</div><div class='add'>+		pipe_num = ATH6KL_USB_PIPE_TX_DATA_LP;</div><div class='add'>+		*urb_count = TX_URB_COUNT;</div><div class='add'>+		break;</div><div class='add'>+	case ATH6KL_USB_EP_ADDR_APP_DATA_MP_OUT:</div><div class='add'>+		pipe_num = ATH6KL_USB_PIPE_TX_DATA_MP;</div><div class='add'>+		*urb_count = TX_URB_COUNT;</div><div class='add'>+		break;</div><div class='add'>+	case ATH6KL_USB_EP_ADDR_APP_DATA_HP_OUT:</div><div class='add'>+		pipe_num = ATH6KL_USB_PIPE_TX_DATA_HP;</div><div class='add'>+		*urb_count = TX_URB_COUNT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* note: there may be endpoints not currently used */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pipe_num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_usb_setup_pipe_resources(struct ath6kl_usb *ar_usb)</div><div class='add'>+{</div><div class='add'>+	struct usb_interface *interface = ar_usb-&gt;interface;</div><div class='add'>+	struct usb_host_interface *iface_desc = interface-&gt;cur_altsetting;</div><div class='add'>+	struct usb_endpoint_descriptor *endpoint;</div><div class='add'>+	struct ath6kl_usb_pipe *pipe;</div><div class='add'>+	int i, urbcount, status = 0;</div><div class='add'>+	u8 pipe_num;</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_USB, "setting up USB Pipes using interface\n");</div><div class='add'>+</div><div class='add'>+	/* walk decriptors and setup pipes */</div><div class='add'>+	for (i = 0; i &lt; iface_desc-&gt;desc.bNumEndpoints; ++i) {</div><div class='add'>+		endpoint = &amp;iface_desc-&gt;endpoint[i].desc;</div><div class='add'>+</div><div class='add'>+		if (ATH6KL_USB_IS_BULK_EP(endpoint-&gt;bmAttributes)) {</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_USB,</div><div class='add'>+				   "%s Bulk Ep:0x%2.2X maxpktsz:%d\n",</div><div class='add'>+				   ATH6KL_USB_IS_DIR_IN</div><div class='add'>+				   (endpoint-&gt;bEndpointAddress) ?</div><div class='add'>+				   "RX" : "TX", endpoint-&gt;bEndpointAddress,</div><div class='add'>+				   le16_to_cpu(endpoint-&gt;wMaxPacketSize));</div><div class='add'>+		} else if (ATH6KL_USB_IS_INT_EP(endpoint-&gt;bmAttributes)) {</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_USB,</div><div class='add'>+				   "%s Int Ep:0x%2.2X maxpktsz:%d interval:%d\n",</div><div class='add'>+				   ATH6KL_USB_IS_DIR_IN</div><div class='add'>+				   (endpoint-&gt;bEndpointAddress) ?</div><div class='add'>+				   "RX" : "TX", endpoint-&gt;bEndpointAddress,</div><div class='add'>+				   le16_to_cpu(endpoint-&gt;wMaxPacketSize),</div><div class='add'>+				   endpoint-&gt;bInterval);</div><div class='add'>+		} else if (ATH6KL_USB_IS_ISOC_EP(endpoint-&gt;bmAttributes)) {</div><div class='add'>+			/* TODO for ISO */</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_USB,</div><div class='add'>+				   "%s ISOC Ep:0x%2.2X maxpktsz:%d interval:%d\n",</div><div class='add'>+				   ATH6KL_USB_IS_DIR_IN</div><div class='add'>+				   (endpoint-&gt;bEndpointAddress) ?</div><div class='add'>+				   "RX" : "TX", endpoint-&gt;bEndpointAddress,</div><div class='add'>+				   le16_to_cpu(endpoint-&gt;wMaxPacketSize),</div><div class='add'>+				   endpoint-&gt;bInterval);</div><div class='add'>+		}</div><div class='add'>+		urbcount = 0;</div><div class='add'>+</div><div class='add'>+		pipe_num =</div><div class='add'>+		    ath6kl_usb_get_logical_pipe_num(ar_usb,</div><div class='add'>+						    endpoint-&gt;bEndpointAddress,</div><div class='add'>+						    &amp;urbcount);</div><div class='add'>+		if (pipe_num == ATH6KL_USB_PIPE_INVALID)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pipe = &amp;ar_usb-&gt;pipes[pipe_num];</div><div class='add'>+		if (pipe-&gt;ar_usb != NULL) {</div><div class='add'>+			/* hmmm..pipe was already setup */</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pipe-&gt;ar_usb = ar_usb;</div><div class='add'>+		pipe-&gt;logical_pipe_num = pipe_num;</div><div class='add'>+		pipe-&gt;ep_address = endpoint-&gt;bEndpointAddress;</div><div class='add'>+		pipe-&gt;max_packet_size = le16_to_cpu(endpoint-&gt;wMaxPacketSize);</div><div class='add'>+</div><div class='add'>+		if (ATH6KL_USB_IS_BULK_EP(endpoint-&gt;bmAttributes)) {</div><div class='add'>+			if (ATH6KL_USB_IS_DIR_IN(pipe-&gt;ep_address)) {</div><div class='add'>+				pipe-&gt;usb_pipe_handle =</div><div class='add'>+				    usb_rcvbulkpipe(ar_usb-&gt;udev,</div><div class='add'>+						    pipe-&gt;ep_address);</div><div class='add'>+			} else {</div><div class='add'>+				pipe-&gt;usb_pipe_handle =</div><div class='add'>+				    usb_sndbulkpipe(ar_usb-&gt;udev,</div><div class='add'>+						    pipe-&gt;ep_address);</div><div class='add'>+			}</div><div class='add'>+		} else if (ATH6KL_USB_IS_INT_EP(endpoint-&gt;bmAttributes)) {</div><div class='add'>+			if (ATH6KL_USB_IS_DIR_IN(pipe-&gt;ep_address)) {</div><div class='add'>+				pipe-&gt;usb_pipe_handle =</div><div class='add'>+				    usb_rcvintpipe(ar_usb-&gt;udev,</div><div class='add'>+						   pipe-&gt;ep_address);</div><div class='add'>+			} else {</div><div class='add'>+				pipe-&gt;usb_pipe_handle =</div><div class='add'>+				    usb_sndintpipe(ar_usb-&gt;udev,</div><div class='add'>+						   pipe-&gt;ep_address);</div><div class='add'>+			}</div><div class='add'>+		} else if (ATH6KL_USB_IS_ISOC_EP(endpoint-&gt;bmAttributes)) {</div><div class='add'>+			/* TODO for ISO */</div><div class='add'>+			if (ATH6KL_USB_IS_DIR_IN(pipe-&gt;ep_address)) {</div><div class='add'>+				pipe-&gt;usb_pipe_handle =</div><div class='add'>+				    usb_rcvisocpipe(ar_usb-&gt;udev,</div><div class='add'>+						    pipe-&gt;ep_address);</div><div class='add'>+			} else {</div><div class='add'>+				pipe-&gt;usb_pipe_handle =</div><div class='add'>+				    usb_sndisocpipe(ar_usb-&gt;udev,</div><div class='add'>+						    pipe-&gt;ep_address);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pipe-&gt;ep_desc = endpoint;</div><div class='add'>+</div><div class='add'>+		if (!ATH6KL_USB_IS_DIR_IN(pipe-&gt;ep_address))</div><div class='add'>+			pipe-&gt;flags |= ATH6KL_USB_PIPE_FLAG_TX;</div><div class='add'>+</div><div class='add'>+		status = ath6kl_usb_alloc_pipe_resources(pipe, urbcount);</div><div class='add'>+		if (status != 0)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* pipe operations */</div><div class='add'>+static void ath6kl_usb_post_recv_transfers(struct ath6kl_usb_pipe *recv_pipe,</div><div class='add'>+					   int buffer_length)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_urb_context *urb_context;</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	int usb_status;</div><div class='add'>+</div><div class='add'>+	while (true) {</div><div class='add'>+		urb_context = ath6kl_usb_alloc_urb_from_pipe(recv_pipe);</div><div class='add'>+		if (urb_context == NULL)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		urb_context-&gt;skb = dev_alloc_skb(buffer_length);</div><div class='add'>+		if (urb_context-&gt;skb == NULL)</div><div class='add'>+			goto err_cleanup_urb;</div><div class='add'>+</div><div class='add'>+		urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='add'>+		if (urb == NULL)</div><div class='add'>+			goto err_cleanup_urb;</div><div class='add'>+</div><div class='add'>+		usb_fill_bulk_urb(urb,</div><div class='add'>+				  recv_pipe-&gt;ar_usb-&gt;udev,</div><div class='add'>+				  recv_pipe-&gt;usb_pipe_handle,</div><div class='add'>+				  urb_context-&gt;skb-&gt;data,</div><div class='add'>+				  buffer_length,</div><div class='add'>+				  ath6kl_usb_recv_complete, urb_context);</div><div class='add'>+</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_USB_BULK,</div><div class='add'>+			   "ath6kl usb: bulk recv submit:%d, 0x%X (ep:0x%2.2X), %d bytes buf:0x%p\n",</div><div class='add'>+			   recv_pipe-&gt;logical_pipe_num,</div><div class='add'>+			   recv_pipe-&gt;usb_pipe_handle, recv_pipe-&gt;ep_address,</div><div class='add'>+			   buffer_length, urb_context-&gt;skb);</div><div class='add'>+</div><div class='add'>+		usb_anchor_urb(urb, &amp;recv_pipe-&gt;urb_submitted);</div><div class='add'>+		usb_status = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+</div><div class='add'>+		if (usb_status) {</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_USB_BULK,</div><div class='add'>+				   "ath6kl usb : usb bulk recv failed %d\n",</div><div class='add'>+				   usb_status);</div><div class='add'>+			usb_unanchor_urb(urb);</div><div class='add'>+			usb_free_urb(urb);</div><div class='add'>+			goto err_cleanup_urb;</div><div class='add'>+		}</div><div class='add'>+		usb_free_urb(urb);</div><div class='add'>+	}</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err_cleanup_urb:</div><div class='add'>+	ath6kl_usb_cleanup_recv_urb(urb_context);</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_usb_flush_all(struct ath6kl_usb *ar_usb)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ATH6KL_USB_PIPE_MAX; i++) {</div><div class='add'>+		if (ar_usb-&gt;pipes[i].ar_usb != NULL)</div><div class='add'>+			usb_kill_anchored_urbs(&amp;ar_usb-&gt;pipes[i].urb_submitted);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Flushing any pending I/O may schedule work this call will block</div><div class='add'>+	 * until all scheduled work runs to completion.</div><div class='add'>+	 */</div><div class='add'>+	flush_scheduled_work();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_usb_start_recv_pipes(struct ath6kl_usb *ar_usb)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * note: control pipe is no longer used</div><div class='add'>+	 * ar_usb-&gt;pipes[ATH6KL_USB_PIPE_RX_CTRL].urb_cnt_thresh =</div><div class='add'>+	 *      ar_usb-&gt;pipes[ATH6KL_USB_PIPE_RX_CTRL].urb_alloc/2;</div><div class='add'>+	 * ath6kl_usb_post_recv_transfers(&amp;ar_usb-&gt;</div><div class='add'>+	 *		pipes[ATH6KL_USB_PIPE_RX_CTRL],</div><div class='add'>+	 *		ATH6KL_USB_RX_BUFFER_SIZE);</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	ar_usb-&gt;pipes[ATH6KL_USB_PIPE_RX_DATA].urb_cnt_thresh =</div><div class='add'>+	    ar_usb-&gt;pipes[ATH6KL_USB_PIPE_RX_DATA].urb_alloc / 2;</div><div class='add'>+	ath6kl_usb_post_recv_transfers(&amp;ar_usb-&gt;pipes[ATH6KL_USB_PIPE_RX_DATA],</div><div class='add'>+				       ATH6KL_USB_RX_BUFFER_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* hif usb rx/tx completion functions */</div><div class='add'>+static void ath6kl_usb_recv_complete(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_urb_context *urb_context = urb-&gt;context;</div><div class='add'>+	struct ath6kl_usb_pipe *pipe = urb_context-&gt;pipe;</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='add'>+	int status = 0;</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_USB_BULK,</div><div class='add'>+		   "%s: recv pipe: %d, stat:%d, len:%d urb:0x%p\n", __func__,</div><div class='add'>+		   pipe-&gt;logical_pipe_num, urb-&gt;status, urb-&gt;actual_length,</div><div class='add'>+		   urb);</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;status != 0) {</div><div class='add'>+		status = -EIO;</div><div class='add'>+		switch (urb-&gt;status) {</div><div class='add'>+		case -ECONNRESET:</div><div class='add'>+		case -ENOENT:</div><div class='add'>+		case -ESHUTDOWN:</div><div class='add'>+			/*</div><div class='add'>+			 * no need to spew these errors when device</div><div class='add'>+			 * removed or urb killed due to driver shutdown</div><div class='add'>+			 */</div><div class='add'>+			status = -ECANCELED;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_USB_BULK,</div><div class='add'>+				   "%s recv pipe: %d (ep:0x%2.2X), failed:%d\n",</div><div class='add'>+				   __func__, pipe-&gt;logical_pipe_num,</div><div class='add'>+				   pipe-&gt;ep_address, urb-&gt;status);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		goto cleanup_recv_urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;actual_length == 0)</div><div class='add'>+		goto cleanup_recv_urb;</div><div class='add'>+</div><div class='add'>+	skb = urb_context-&gt;skb;</div><div class='add'>+</div><div class='add'>+	/* we are going to pass it up */</div><div class='add'>+	urb_context-&gt;skb = NULL;</div><div class='add'>+	skb_put(skb, urb-&gt;actual_length);</div><div class='add'>+</div><div class='add'>+	/* note: queue implements a lock */</div><div class='add'>+	skb_queue_tail(&amp;pipe-&gt;io_comp_queue, skb);</div><div class='add'>+	schedule_work(&amp;pipe-&gt;io_complete_work);</div><div class='add'>+</div><div class='add'>+cleanup_recv_urb:</div><div class='add'>+	ath6kl_usb_cleanup_recv_urb(urb_context);</div><div class='add'>+</div><div class='add'>+	if (status == 0 &amp;&amp;</div><div class='add'>+	    pipe-&gt;urb_cnt &gt;= pipe-&gt;urb_cnt_thresh) {</div><div class='add'>+		/* our free urbs are piling up, post more transfers */</div><div class='add'>+		ath6kl_usb_post_recv_transfers(pipe, ATH6KL_USB_RX_BUFFER_SIZE);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_usb_usb_transmit_complete(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_urb_context *urb_context = urb-&gt;context;</div><div class='add'>+	struct ath6kl_usb_pipe *pipe = urb_context-&gt;pipe;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_USB_BULK,</div><div class='add'>+		   "%s: pipe: %d, stat:%d, len:%d\n",</div><div class='add'>+		   __func__, pipe-&gt;logical_pipe_num, urb-&gt;status,</div><div class='add'>+		   urb-&gt;actual_length);</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;status != 0) {</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_USB_BULK,</div><div class='add'>+			   "%s:  pipe: %d, failed:%d\n",</div><div class='add'>+			   __func__, pipe-&gt;logical_pipe_num, urb-&gt;status);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = urb_context-&gt;skb;</div><div class='add'>+	urb_context-&gt;skb = NULL;</div><div class='add'>+	ath6kl_usb_free_urb_to_pipe(urb_context-&gt;pipe, urb_context);</div><div class='add'>+</div><div class='add'>+	/* note: queue implements a lock */</div><div class='add'>+	skb_queue_tail(&amp;pipe-&gt;io_comp_queue, skb);</div><div class='add'>+	schedule_work(&amp;pipe-&gt;io_complete_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_usb_io_comp_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_usb_pipe *pipe = container_of(work,</div><div class='add'>+						    struct ath6kl_usb_pipe,</div><div class='add'>+						    io_complete_work);</div><div class='add'>+	struct ath6kl_usb *ar_usb;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	ar_usb = pipe-&gt;ar_usb;</div><div class='add'>+</div><div class='add'>+	while ((skb = skb_dequeue(&amp;pipe-&gt;io_comp_queue))) {</div><div class='add'>+		if (pipe-&gt;flags &amp; ATH6KL_USB_PIPE_FLAG_TX) {</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_USB_BULK,</div><div class='add'>+				   "ath6kl usb xmit callback buf:0x%p\n", skb);</div><div class='add'>+			ath6kl_core_tx_complete(ar_usb-&gt;ar, skb);</div><div class='add'>+		} else {</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_USB_BULK,</div><div class='add'>+				   "ath6kl usb recv callback buf:0x%p\n", skb);</div><div class='add'>+			ath6kl_core_rx_complete(ar_usb-&gt;ar, skb,</div><div class='add'>+						pipe-&gt;logical_pipe_num);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define ATH6KL_USB_MAX_DIAG_CMD (sizeof(struct ath6kl_usb_ctrl_diag_cmd_write))</div><div class='ctx'> #define ATH6KL_USB_MAX_DIAG_RESP (sizeof(struct ath6kl_usb_ctrl_diag_resp_read))</div><div class='ctx'> </div><div class='ctx'> static void ath6kl_usb_destroy(struct ath6kl_usb *ar_usb)</div><div class='ctx'> {</div><div class='add'>+	ath6kl_usb_flush_all(ar_usb);</div><div class='add'>+</div><div class='add'>+	ath6kl_usb_cleanup_pipe_resources(ar_usb);</div><div class='add'>+</div><div class='ctx'> 	usb_set_intfdata(ar_usb-&gt;interface, NULL);</div><div class='ctx'> </div><div class='ctx'> 	kfree(ar_usb-&gt;diag_cmd_buffer);</div><div class='hunk'>@@ -70,19 +614,28 @@ static void ath6kl_usb_destroy(struct ath6kl_usb *ar_usb)</div><div class='ctx'> </div><div class='ctx'> static struct ath6kl_usb *ath6kl_usb_create(struct usb_interface *interface)</div><div class='ctx'> {</div><div class='del'>-	struct ath6kl_usb *ar_usb = NULL;</div><div class='ctx'> 	struct usb_device *dev = interface_to_usbdev(interface);</div><div class='add'>+	struct ath6kl_usb *ar_usb;</div><div class='add'>+	struct ath6kl_usb_pipe *pipe;</div><div class='ctx'> 	int status = 0;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	ar_usb = kzalloc(sizeof(struct ath6kl_usb), GFP_KERNEL);</div><div class='ctx'> 	if (ar_usb == NULL)</div><div class='ctx'> 		goto fail_ath6kl_usb_create;</div><div class='ctx'> </div><div class='del'>-	memset(ar_usb, 0, sizeof(struct ath6kl_usb));</div><div class='ctx'> 	usb_set_intfdata(interface, ar_usb);</div><div class='add'>+	spin_lock_init(&amp;(ar_usb-&gt;cs_lock));</div><div class='ctx'> 	ar_usb-&gt;udev = dev;</div><div class='ctx'> 	ar_usb-&gt;interface = interface;</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; ATH6KL_USB_PIPE_MAX; i++) {</div><div class='add'>+		pipe = &amp;ar_usb-&gt;pipes[i];</div><div class='add'>+		INIT_WORK(&amp;pipe-&gt;io_complete_work,</div><div class='add'>+			  ath6kl_usb_io_comp_work);</div><div class='add'>+		skb_queue_head_init(&amp;pipe-&gt;io_comp_queue);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ar_usb-&gt;diag_cmd_buffer = kzalloc(ATH6KL_USB_MAX_DIAG_CMD, GFP_KERNEL);</div><div class='ctx'> 	if (ar_usb-&gt;diag_cmd_buffer == NULL) {</div><div class='ctx'> 		status = -ENOMEM;</div><div class='hunk'>@@ -96,6 +649,8 @@ static struct ath6kl_usb *ath6kl_usb_create(struct usb_interface *interface)</div><div class='ctx'> 		goto fail_ath6kl_usb_create;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	status = ath6kl_usb_setup_pipe_resources(ar_usb);</div><div class='add'>+</div><div class='ctx'> fail_ath6kl_usb_create:</div><div class='ctx'> 	if (status != 0) {</div><div class='ctx'> 		ath6kl_usb_destroy(ar_usb);</div><div class='hunk'>@@ -114,11 +669,177 @@ static void ath6kl_usb_device_detached(struct usb_interface *interface)</div><div class='ctx'> </div><div class='ctx'> 	ath6kl_stop_txrx(ar_usb-&gt;ar);</div><div class='ctx'> </div><div class='add'>+	/* Delay to wait for the target to reboot */</div><div class='add'>+	mdelay(20);</div><div class='ctx'> 	ath6kl_core_cleanup(ar_usb-&gt;ar);</div><div class='del'>-</div><div class='ctx'> 	ath6kl_usb_destroy(ar_usb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* exported hif usb APIs for htc pipe */</div><div class='add'>+static void hif_start(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_usb *device = ath6kl_usb_priv(ar);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ath6kl_usb_start_recv_pipes(device);</div><div class='add'>+</div><div class='add'>+	/* set the TX resource avail threshold for each TX pipe */</div><div class='add'>+	for (i = ATH6KL_USB_PIPE_TX_CTRL;</div><div class='add'>+	     i &lt;= ATH6KL_USB_PIPE_TX_DATA_HP; i++) {</div><div class='add'>+		device-&gt;pipes[i].urb_cnt_thresh =</div><div class='add'>+		    device-&gt;pipes[i].urb_alloc / 2;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_usb_send(struct ath6kl *ar, u8 PipeID,</div><div class='add'>+			   struct sk_buff *hdr_skb, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_usb *device = ath6kl_usb_priv(ar);</div><div class='add'>+	struct ath6kl_usb_pipe *pipe = &amp;device-&gt;pipes[PipeID];</div><div class='add'>+	struct ath6kl_urb_context *urb_context;</div><div class='add'>+	int usb_status, status = 0;</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	u8 *data;</div><div class='add'>+	u32 len;</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_USB_BULK, "+%s pipe : %d, buf:0x%p\n",</div><div class='add'>+		   __func__, PipeID, skb);</div><div class='add'>+</div><div class='add'>+	urb_context = ath6kl_usb_alloc_urb_from_pipe(pipe);</div><div class='add'>+</div><div class='add'>+	if (urb_context == NULL) {</div><div class='add'>+		/*</div><div class='add'>+		 * TODO: it is possible to run out of urbs if</div><div class='add'>+		 * 2 endpoints map to the same pipe ID</div><div class='add'>+		 */</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_USB_BULK,</div><div class='add'>+			   "%s pipe:%d no urbs left. URB Cnt : %d\n",</div><div class='add'>+			   __func__, PipeID, pipe-&gt;urb_cnt);</div><div class='add'>+		status = -ENOMEM;</div><div class='add'>+		goto fail_hif_send;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	urb_context-&gt;skb = skb;</div><div class='add'>+</div><div class='add'>+	data = skb-&gt;data;</div><div class='add'>+	len = skb-&gt;len;</div><div class='add'>+</div><div class='add'>+	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='add'>+	if (urb == NULL) {</div><div class='add'>+		status = -ENOMEM;</div><div class='add'>+		ath6kl_usb_free_urb_to_pipe(urb_context-&gt;pipe,</div><div class='add'>+					    urb_context);</div><div class='add'>+		goto fail_hif_send;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	usb_fill_bulk_urb(urb,</div><div class='add'>+			  device-&gt;udev,</div><div class='add'>+			  pipe-&gt;usb_pipe_handle,</div><div class='add'>+			  data,</div><div class='add'>+			  len,</div><div class='add'>+			  ath6kl_usb_usb_transmit_complete, urb_context);</div><div class='add'>+</div><div class='add'>+	if ((len % pipe-&gt;max_packet_size) == 0) {</div><div class='add'>+		/* hit a max packet boundary on this pipe */</div><div class='add'>+		urb-&gt;transfer_flags |= URB_ZERO_PACKET;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_USB_BULK,</div><div class='add'>+		   "athusb bulk send submit:%d, 0x%X (ep:0x%2.2X), %d bytes\n",</div><div class='add'>+		   pipe-&gt;logical_pipe_num, pipe-&gt;usb_pipe_handle,</div><div class='add'>+		   pipe-&gt;ep_address, len);</div><div class='add'>+</div><div class='add'>+	usb_anchor_urb(urb, &amp;pipe-&gt;urb_submitted);</div><div class='add'>+	usb_status = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+</div><div class='add'>+	if (usb_status) {</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_USB_BULK,</div><div class='add'>+			   "ath6kl usb : usb bulk transmit failed %d\n",</div><div class='add'>+			   usb_status);</div><div class='add'>+		usb_unanchor_urb(urb);</div><div class='add'>+		ath6kl_usb_free_urb_to_pipe(urb_context-&gt;pipe,</div><div class='add'>+					    urb_context);</div><div class='add'>+		status = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	usb_free_urb(urb);</div><div class='add'>+</div><div class='add'>+fail_hif_send:</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hif_stop(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_usb *device = ath6kl_usb_priv(ar);</div><div class='add'>+</div><div class='add'>+	ath6kl_usb_flush_all(device);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_usb_get_default_pipe(struct ath6kl *ar,</div><div class='add'>+					u8 *ul_pipe, u8 *dl_pipe)</div><div class='add'>+{</div><div class='add'>+	*ul_pipe = ATH6KL_USB_PIPE_TX_CTRL;</div><div class='add'>+	*dl_pipe = ATH6KL_USB_PIPE_RX_CTRL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_usb_map_service_pipe(struct ath6kl *ar, u16 svc_id,</div><div class='add'>+				       u8 *ul_pipe, u8 *dl_pipe)</div><div class='add'>+{</div><div class='add'>+	int status = 0;</div><div class='add'>+</div><div class='add'>+	switch (svc_id) {</div><div class='add'>+	case HTC_CTRL_RSVD_SVC:</div><div class='add'>+	case WMI_CONTROL_SVC:</div><div class='add'>+		*ul_pipe = ATH6KL_USB_PIPE_TX_CTRL;</div><div class='add'>+		/* due to large control packets, shift to data pipe */</div><div class='add'>+		*dl_pipe = ATH6KL_USB_PIPE_RX_DATA;</div><div class='add'>+		break;</div><div class='add'>+	case WMI_DATA_BE_SVC:</div><div class='add'>+	case WMI_DATA_BK_SVC:</div><div class='add'>+		*ul_pipe = ATH6KL_USB_PIPE_TX_DATA_LP;</div><div class='add'>+		/*</div><div class='add'>+		* Disable rxdata2 directly, it will be enabled</div><div class='add'>+		* if FW enable rxdata2</div><div class='add'>+		*/</div><div class='add'>+		*dl_pipe = ATH6KL_USB_PIPE_RX_DATA;</div><div class='add'>+		break;</div><div class='add'>+	case WMI_DATA_VI_SVC:</div><div class='add'>+		*ul_pipe = ATH6KL_USB_PIPE_TX_DATA_MP;</div><div class='add'>+		/*</div><div class='add'>+		* Disable rxdata2 directly, it will be enabled</div><div class='add'>+		* if FW enable rxdata2</div><div class='add'>+		*/</div><div class='add'>+		*dl_pipe = ATH6KL_USB_PIPE_RX_DATA;</div><div class='add'>+		break;</div><div class='add'>+	case WMI_DATA_VO_SVC:</div><div class='add'>+		*ul_pipe = ATH6KL_USB_PIPE_TX_DATA_HP;</div><div class='add'>+		/*</div><div class='add'>+		* Disable rxdata2 directly, it will be enabled</div><div class='add'>+		* if FW enable rxdata2</div><div class='add'>+		*/</div><div class='add'>+		*dl_pipe = ATH6KL_USB_PIPE_RX_DATA;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		status = -EPERM;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 ath6kl_usb_get_free_queue_number(struct ath6kl *ar, u8 pipe_id)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_usb *device = ath6kl_usb_priv(ar);</div><div class='add'>+</div><div class='add'>+	return device-&gt;pipes[pipe_id].urb_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hif_detach_htc(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_usb *device = ath6kl_usb_priv(ar);</div><div class='add'>+</div><div class='add'>+	ath6kl_usb_flush_all(device);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ath6kl_usb_submit_ctrl_out(struct ath6kl_usb *ar_usb,</div><div class='ctx'> 				   u8 req, u16 value, u16 index, void *data,</div><div class='ctx'> 				   u32 size)</div><div class='hunk'>@@ -301,14 +1022,29 @@ static int ath6kl_usb_bmi_write(struct ath6kl *ar, u8 *buf, u32 len)</div><div class='ctx'> </div><div class='ctx'> static int ath6kl_usb_power_on(struct ath6kl *ar)</div><div class='ctx'> {</div><div class='add'>+	hif_start(ar);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath6kl_usb_power_off(struct ath6kl *ar)</div><div class='ctx'> {</div><div class='add'>+	hif_detach_htc(ar);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ath6kl_usb_stop(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	hif_stop(ar);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath6kl_usb_cleanup_scatter(struct ath6kl *ar)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * USB doesn't support it. Just return.</div><div class='add'>+	 */</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ath6kl_hif_ops ath6kl_usb_ops = {</div><div class='ctx'> 	.diag_read32 = ath6kl_usb_diag_read32,</div><div class='ctx'> 	.diag_write32 = ath6kl_usb_diag_write32,</div><div class='hunk'>@@ -316,6 +1052,12 @@ static const struct ath6kl_hif_ops ath6kl_usb_ops = {</div><div class='ctx'> 	.bmi_write = ath6kl_usb_bmi_write,</div><div class='ctx'> 	.power_on = ath6kl_usb_power_on,</div><div class='ctx'> 	.power_off = ath6kl_usb_power_off,</div><div class='add'>+	.stop = ath6kl_usb_stop,</div><div class='add'>+	.pipe_send = ath6kl_usb_send,</div><div class='add'>+	.pipe_get_default = ath6kl_usb_get_default_pipe,</div><div class='add'>+	.pipe_map_service = ath6kl_usb_map_service_pipe,</div><div class='add'>+	.pipe_get_free_queue_number = ath6kl_usb_get_free_queue_number,</div><div class='add'>+	.cleanup_scatter = ath6kl_usb_cleanup_scatter,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* ath6kl usb driver registered functions */</div><div class='hunk'>@@ -368,7 +1110,7 @@ static int ath6kl_usb_probe(struct usb_interface *interface,</div><div class='ctx'> </div><div class='ctx'> 	ar_usb-&gt;ar = ar;</div><div class='ctx'> </div><div class='del'>-	ret = ath6kl_core_init(ar);</div><div class='add'>+	ret = ath6kl_core_init(ar, ATH6KL_HTC_TYPE_PIPE);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath6kl_err("Failed to init ath6kl core: %d\n", ret);</div><div class='ctx'> 		goto err_core_free;</div><div class='hunk'>@@ -392,6 +1134,46 @@ static void ath6kl_usb_remove(struct usb_interface *interface)</div><div class='ctx'> 	ath6kl_usb_device_detached(interface);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+</div><div class='add'>+static int ath6kl_usb_suspend(struct usb_interface *interface,</div><div class='add'>+			      pm_message_t message)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_usb *device;</div><div class='add'>+	device = usb_get_intfdata(interface);</div><div class='add'>+</div><div class='add'>+	ath6kl_usb_flush_all(device);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_usb_resume(struct usb_interface *interface)</div><div class='add'>+{</div><div class='add'>+	struct ath6kl_usb *device;</div><div class='add'>+	device = usb_get_intfdata(interface);</div><div class='add'>+</div><div class='add'>+	ath6kl_usb_post_recv_transfers(&amp;device-&gt;pipes[ATH6KL_USB_PIPE_RX_DATA],</div><div class='add'>+				       ATH6KL_USB_RX_BUFFER_SIZE);</div><div class='add'>+	ath6kl_usb_post_recv_transfers(&amp;device-&gt;pipes[ATH6KL_USB_PIPE_RX_DATA2],</div><div class='add'>+				       ATH6KL_USB_RX_BUFFER_SIZE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath6kl_usb_reset_resume(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	if (usb_get_intfdata(intf))</div><div class='add'>+		ath6kl_usb_remove(intf);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+#define ath6kl_usb_suspend NULL</div><div class='add'>+#define ath6kl_usb_resume NULL</div><div class='add'>+#define ath6kl_usb_reset_resume NULL</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* table of devices that work with this driver */</div><div class='ctx'> static struct usb_device_id ath6kl_usb_ids[] = {</div><div class='ctx'> 	{USB_DEVICE(0x0cf3, 0x9374)},</div><div class='hunk'>@@ -403,8 +1185,13 @@ MODULE_DEVICE_TABLE(usb, ath6kl_usb_ids);</div><div class='ctx'> static struct usb_driver ath6kl_usb_driver = {</div><div class='ctx'> 	.name = "ath6kl_usb",</div><div class='ctx'> 	.probe = ath6kl_usb_probe,</div><div class='add'>+	.suspend = ath6kl_usb_suspend,</div><div class='add'>+	.resume = ath6kl_usb_resume,</div><div class='add'>+	.reset_resume = ath6kl_usb_reset_resume,</div><div class='ctx'> 	.disconnect = ath6kl_usb_remove,</div><div class='ctx'> 	.id_table = ath6kl_usb_ids,</div><div class='add'>+	.supports_autosuspend = true,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int ath6kl_usb_init(void)</div><div class='hunk'>@@ -430,3 +1217,6 @@ MODULE_FIRMWARE(AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE);</div><div class='ctx'> MODULE_FIRMWARE(AR6004_HW_1_1_FIRMWARE_FILE);</div><div class='ctx'> MODULE_FIRMWARE(AR6004_HW_1_1_BOARD_DATA_FILE);</div><div class='ctx'> MODULE_FIRMWARE(AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE);</div><div class='add'>+MODULE_FIRMWARE(AR6004_HW_1_2_FIRMWARE_FILE);</div><div class='add'>+MODULE_FIRMWARE(AR6004_HW_1_2_BOARD_DATA_FILE);</div><div class='add'>+MODULE_FIRMWARE(AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/wmi.c b/drivers/net/wireless/ath/ath6kl/wmi.c<br/>index 2b442332cd0f..ee8ec2394c2c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/wmi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/wmi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/wmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/wmi.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/in.h&gt;</div><div class='ctx'> #include "core.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "testmode.h"</div><div class='hunk'>@@ -289,6 +290,13 @@ int ath6kl_wmi_implicit_create_pstream(struct wmi *wmi, u8 if_idx,</div><div class='ctx'> 					layer2_priority);</div><div class='ctx'> 		} else</div><div class='ctx'> 			usr_pri = layer2_priority &amp; 0x7;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Queue the EAPOL frames in the same WMM_AC_VO queue</div><div class='add'>+		 * as that of management frames.</div><div class='add'>+		 */</div><div class='add'>+		if (skb-&gt;protocol == cpu_to_be16(ETH_P_PAE))</div><div class='add'>+			usr_pri = WMI_VOICE_USER_PRIORITY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -460,8 +468,9 @@ static int ath6kl_wmi_remain_on_chnl_event_rx(struct wmi *wmi, u8 *datap,</div><div class='ctx'> 		   freq, dur);</div><div class='ctx'> 	chan = ieee80211_get_channel(ar-&gt;wiphy, freq);</div><div class='ctx'> 	if (!chan) {</div><div class='del'>-		ath6kl_dbg(ATH6KL_DBG_WMI, "remain_on_chnl: Unknown channel "</div><div class='del'>-			   "(freq=%u)\n", freq);</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+			   "remain_on_chnl: Unknown channel (freq=%u)\n",</div><div class='add'>+			   freq);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	id = vif-&gt;last_roc_id;</div><div class='hunk'>@@ -488,12 +497,14 @@ static int ath6kl_wmi_cancel_remain_on_chnl_event_rx(struct wmi *wmi,</div><div class='ctx'> 	ev = (struct wmi_cancel_remain_on_chnl_event *) datap;</div><div class='ctx'> 	freq = le32_to_cpu(ev-&gt;freq);</div><div class='ctx'> 	dur = le32_to_cpu(ev-&gt;duration);</div><div class='del'>-	ath6kl_dbg(ATH6KL_DBG_WMI, "cancel_remain_on_chnl: freq=%u dur=%u "</div><div class='del'>-		   "status=%u\n", freq, dur, ev-&gt;status);</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+		   "cancel_remain_on_chnl: freq=%u dur=%u status=%u\n",</div><div class='add'>+		   freq, dur, ev-&gt;status);</div><div class='ctx'> 	chan = ieee80211_get_channel(ar-&gt;wiphy, freq);</div><div class='ctx'> 	if (!chan) {</div><div class='del'>-		ath6kl_dbg(ATH6KL_DBG_WMI, "cancel_remain_on_chnl: Unknown "</div><div class='del'>-			   "channel (freq=%u)\n", freq);</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+			   "cancel_remain_on_chnl: Unknown channel (freq=%u)\n",</div><div class='add'>+			   freq);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (vif-&gt;last_cancel_roc_id &amp;&amp;</div><div class='hunk'>@@ -548,12 +559,12 @@ static int ath6kl_wmi_rx_probe_req_event_rx(struct wmi *wmi, u8 *datap, int len,</div><div class='ctx'> 	freq = le32_to_cpu(ev-&gt;freq);</div><div class='ctx'> 	dlen = le16_to_cpu(ev-&gt;len);</div><div class='ctx'> 	if (datap + len &lt; ev-&gt;data + dlen) {</div><div class='del'>-		ath6kl_err("invalid wmi_p2p_rx_probe_req_event: "</div><div class='del'>-			   "len=%d dlen=%u\n", len, dlen);</div><div class='add'>+		ath6kl_err("invalid wmi_p2p_rx_probe_req_event: len=%d dlen=%u\n",</div><div class='add'>+			   len, dlen);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	ath6kl_dbg(ATH6KL_DBG_WMI, "rx_probe_req: len=%u freq=%u "</div><div class='del'>-		   "probe_req_report=%d\n",</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+		   "rx_probe_req: len=%u freq=%u probe_req_report=%d\n",</div><div class='ctx'> 		   dlen, freq, vif-&gt;probe_req_report);</div><div class='ctx'> </div><div class='ctx'> 	if (vif-&gt;probe_req_report || vif-&gt;nw_type == AP_NETWORK)</div><div class='hunk'>@@ -592,8 +603,8 @@ static int ath6kl_wmi_rx_action_event_rx(struct wmi *wmi, u8 *datap, int len,</div><div class='ctx'> 	freq = le32_to_cpu(ev-&gt;freq);</div><div class='ctx'> 	dlen = le16_to_cpu(ev-&gt;len);</div><div class='ctx'> 	if (datap + len &lt; ev-&gt;data + dlen) {</div><div class='del'>-		ath6kl_err("invalid wmi_rx_action_event: "</div><div class='del'>-			   "len=%d dlen=%u\n", len, dlen);</div><div class='add'>+		ath6kl_err("invalid wmi_rx_action_event: len=%d dlen=%u\n",</div><div class='add'>+			   len, dlen);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	ath6kl_dbg(ATH6KL_DBG_WMI, "rx_action: len=%u freq=%u\n", dlen, freq);</div><div class='hunk'>@@ -687,7 +698,7 @@ static int ath6kl_wmi_ready_event_rx(struct wmi *wmi, u8 *datap, int len)</div><div class='ctx'> </div><div class='ctx'> 	ath6kl_ready_event(wmi-&gt;parent_dev, ev-&gt;mac_addr,</div><div class='ctx'> 			   le32_to_cpu(ev-&gt;sw_version),</div><div class='del'>-			   le32_to_cpu(ev-&gt;abi_version));</div><div class='add'>+			   le32_to_cpu(ev-&gt;abi_version), ev-&gt;phy_cap);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -777,16 +788,15 @@ static int ath6kl_wmi_connect_event_rx(struct wmi *wmi, u8 *datap, int len,</div><div class='ctx'> 		/* AP mode start/STA connected event */</div><div class='ctx'> 		struct net_device *dev = vif-&gt;ndev;</div><div class='ctx'> 		if (memcmp(dev-&gt;dev_addr, ev-&gt;u.ap_bss.bssid, ETH_ALEN) == 0) {</div><div class='del'>-			ath6kl_dbg(ATH6KL_DBG_WMI, "%s: freq %d bssid %pM "</div><div class='del'>-				   "(AP started)\n",</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+				   "%s: freq %d bssid %pM (AP started)\n",</div><div class='ctx'> 				   __func__, le16_to_cpu(ev-&gt;u.ap_bss.ch),</div><div class='ctx'> 				   ev-&gt;u.ap_bss.bssid);</div><div class='ctx'> 			ath6kl_connect_ap_mode_bss(</div><div class='ctx'> 				vif, le16_to_cpu(ev-&gt;u.ap_bss.ch));</div><div class='ctx'> 		} else {</div><div class='del'>-			ath6kl_dbg(ATH6KL_DBG_WMI, "%s: aid %u mac_addr %pM "</div><div class='del'>-				   "auth=%u keymgmt=%u cipher=%u apsd_info=%u "</div><div class='del'>-				   "(STA connected)\n",</div><div class='add'>+			ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+				   "%s: aid %u mac_addr %pM auth=%u keymgmt=%u cipher=%u apsd_info=%u (STA connected)\n",</div><div class='ctx'> 				   __func__, ev-&gt;u.ap_sta.aid,</div><div class='ctx'> 				   ev-&gt;u.ap_sta.mac_addr,</div><div class='ctx'> 				   ev-&gt;u.ap_sta.auth,</div><div class='hunk'>@@ -1229,8 +1239,9 @@ static int ath6kl_wmi_neighbor_report_event_rx(struct wmi *wmi, u8 *datap,</div><div class='ctx'> 	ev = (struct wmi_neighbor_report_event *) datap;</div><div class='ctx'> 	if (sizeof(*ev) + ev-&gt;num_neighbors * sizeof(struct wmi_neighbor_info)</div><div class='ctx'> 	    &gt; len) {</div><div class='del'>-		ath6kl_dbg(ATH6KL_DBG_WMI, "truncated neighbor event "</div><div class='del'>-			   "(num=%d len=%d)\n", ev-&gt;num_neighbors, len);</div><div class='add'>+		ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+			   "truncated neighbor event (num=%d len=%d)\n",</div><div class='add'>+			   ev-&gt;num_neighbors, len);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	for (i = 0; i &lt; ev-&gt;num_neighbors; i++) {</div><div class='hunk'>@@ -1814,12 +1825,14 @@ int ath6kl_wmi_beginscan_cmd(struct wmi *wmi, u8 if_idx,</div><div class='ctx'> 			     u32 home_dwell_time, u32 force_scan_interval,</div><div class='ctx'> 			     s8 num_chan, u16 *ch_list, u32 no_cck, u32 *rates)</div><div class='ctx'> {</div><div class='add'>+	struct ieee80211_supported_band *sband;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct wmi_begin_scan_cmd *sc;</div><div class='del'>-	s8 size;</div><div class='add'>+	s8 size, *supp_rates;</div><div class='ctx'> 	int i, band, ret;</div><div class='ctx'> 	struct ath6kl *ar = wmi-&gt;parent_dev;</div><div class='ctx'> 	int num_rates;</div><div class='add'>+	u32 ratemask;</div><div class='ctx'> </div><div class='ctx'> 	size = sizeof(struct wmi_begin_scan_cmd);</div><div class='ctx'> </div><div class='hunk'>@@ -1846,10 +1859,13 @@ int ath6kl_wmi_beginscan_cmd(struct wmi *wmi, u8 if_idx,</div><div class='ctx'> 	sc-&gt;num_ch = num_chan;</div><div class='ctx'> </div><div class='ctx'> 	for (band = 0; band &lt; IEEE80211_NUM_BANDS; band++) {</div><div class='del'>-		struct ieee80211_supported_band *sband =</div><div class='del'>-		    ar-&gt;wiphy-&gt;bands[band];</div><div class='del'>-		u32 ratemask = rates[band];</div><div class='del'>-		u8 *supp_rates = sc-&gt;supp_rates[band].rates;</div><div class='add'>+		sband = ar-&gt;wiphy-&gt;bands[band];</div><div class='add'>+</div><div class='add'>+		if (!sband)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ratemask = rates[band];</div><div class='add'>+		supp_rates = sc-&gt;supp_rates[band].rates;</div><div class='ctx'> 		num_rates = 0;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; sband-&gt;n_bitrates; i++) {</div><div class='hunk'>@@ -2129,8 +2145,8 @@ int ath6kl_wmi_addkey_cmd(struct wmi *wmi, u8 if_idx, u8 key_index,</div><div class='ctx'> 	struct wmi_add_cipher_key_cmd *cmd;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ath6kl_dbg(ATH6KL_DBG_WMI, "addkey cmd: key_index=%u key_type=%d "</div><div class='del'>-		   "key_usage=%d key_len=%d key_op_ctrl=%d\n",</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+		   "addkey cmd: key_index=%u key_type=%d key_usage=%d key_len=%d key_op_ctrl=%d\n",</div><div class='ctx'> 		   key_index, key_type, key_usage, key_len, key_op_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	if ((key_index &gt; WMI_MAX_KEY_INDEX) || (key_len &gt; WMI_MAX_KEY_LEN) ||</div><div class='hunk'>@@ -2882,6 +2898,43 @@ int ath6kl_wmi_set_keepalive_cmd(struct wmi *wmi, u8 if_idx,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int ath6kl_wmi_set_htcap_cmd(struct wmi *wmi, u8 if_idx,</div><div class='add'>+			     enum ieee80211_band band,</div><div class='add'>+			     struct ath6kl_htcap *htcap)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct wmi_set_htcap_cmd *cmd;</div><div class='add'>+</div><div class='add'>+	skb = ath6kl_wmi_get_new_buf(sizeof(*cmd));</div><div class='add'>+	if (!skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd = (struct wmi_set_htcap_cmd *) skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * NOTE: Band in firmware matches enum ieee80211_band, it is unlikely</div><div class='add'>+	 * this will be changed in firmware. If at all there is any change in</div><div class='add'>+	 * band value, the host needs to be fixed.</div><div class='add'>+	 */</div><div class='add'>+	cmd-&gt;band = band;</div><div class='add'>+	cmd-&gt;ht_enable = !!htcap-&gt;ht_enable;</div><div class='add'>+	cmd-&gt;ht20_sgi = !!(htcap-&gt;cap_info &amp; IEEE80211_HT_CAP_SGI_20);</div><div class='add'>+	cmd-&gt;ht40_supported =</div><div class='add'>+		!!(htcap-&gt;cap_info &amp; IEEE80211_HT_CAP_SUP_WIDTH_20_40);</div><div class='add'>+	cmd-&gt;ht40_sgi = !!(htcap-&gt;cap_info &amp; IEEE80211_HT_CAP_SGI_40);</div><div class='add'>+	cmd-&gt;intolerant_40mhz =</div><div class='add'>+		!!(htcap-&gt;cap_info &amp; IEEE80211_HT_CAP_40MHZ_INTOLERANT);</div><div class='add'>+	cmd-&gt;max_ampdu_len_exp = htcap-&gt;ampdu_factor;</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+		   "Set htcap: band:%d ht_enable:%d 40mhz:%d sgi_20mhz:%d sgi_40mhz:%d 40mhz_intolerant:%d ampdu_len_exp:%d\n",</div><div class='add'>+		   cmd-&gt;band, cmd-&gt;ht_enable, cmd-&gt;ht40_supported,</div><div class='add'>+		   cmd-&gt;ht20_sgi, cmd-&gt;ht40_sgi, cmd-&gt;intolerant_40mhz,</div><div class='add'>+		   cmd-&gt;max_ampdu_len_exp);</div><div class='add'>+	return ath6kl_wmi_cmd_send(wmi, if_idx, skb, WMI_SET_HT_CAP_CMDID,</div><div class='add'>+				   NO_SYNC_WMIFLAG);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int ath6kl_wmi_test_cmd(struct wmi *wmi, void *buf, size_t len)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='hunk'>@@ -3010,8 +3063,8 @@ int ath6kl_wmi_ap_profile_commit(struct wmi *wmip, u8 if_idx,</div><div class='ctx'> </div><div class='ctx'> 	res = ath6kl_wmi_cmd_send(wmip, if_idx, skb, WMI_AP_CONFIG_COMMIT_CMDID,</div><div class='ctx'> 				  NO_SYNC_WMIFLAG);</div><div class='del'>-	ath6kl_dbg(ATH6KL_DBG_WMI, "%s: nw_type=%u auth_mode=%u ch=%u "</div><div class='del'>-		   "ctrl_flags=0x%x-&gt; res=%d\n",</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+		   "%s: nw_type=%u auth_mode=%u ch=%u ctrl_flags=0x%x-&gt; res=%d\n",</div><div class='ctx'> 		   __func__, p-&gt;nw_type, p-&gt;auth_mode, le16_to_cpu(p-&gt;ch),</div><div class='ctx'> 		   le32_to_cpu(p-&gt;ctrl_flags), res);</div><div class='ctx'> 	return res;</div><div class='hunk'>@@ -3032,6 +3085,9 @@ int ath6kl_wmi_ap_set_mlme(struct wmi *wmip, u8 if_idx, u8 cmd, const u8 *mac,</div><div class='ctx'> 	cm-&gt;reason = cpu_to_le16(reason);</div><div class='ctx'> 	cm-&gt;cmd = cmd;</div><div class='ctx'> </div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WMI, "ap_set_mlme: cmd=%d reason=%d\n", cm-&gt;cmd,</div><div class='add'>+		   cm-&gt;reason);</div><div class='add'>+</div><div class='ctx'> 	return ath6kl_wmi_cmd_send(wmip, if_idx, skb, WMI_AP_SET_MLME_CMDID,</div><div class='ctx'> 				   NO_SYNC_WMIFLAG);</div><div class='ctx'> }</div><div class='hunk'>@@ -3168,8 +3224,9 @@ int ath6kl_wmi_set_appie_cmd(struct wmi *wmi, u8 if_idx, u8 mgmt_frm_type,</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ath6kl_dbg(ATH6KL_DBG_WMI, "set_appie_cmd: mgmt_frm_type=%u "</div><div class='del'>-		   "ie_len=%u\n", mgmt_frm_type, ie_len);</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+		   "set_appie_cmd: mgmt_frm_type=%u ie_len=%u\n",</div><div class='add'>+		   mgmt_frm_type, ie_len);</div><div class='ctx'> 	p = (struct wmi_set_appie_cmd *) skb-&gt;data;</div><div class='ctx'> 	p-&gt;mgmt_frm_type = mgmt_frm_type;</div><div class='ctx'> 	p-&gt;ie_len = ie_len;</div><div class='hunk'>@@ -3181,6 +3238,29 @@ int ath6kl_wmi_set_appie_cmd(struct wmi *wmi, u8 if_idx, u8 mgmt_frm_type,</div><div class='ctx'> 				   NO_SYNC_WMIFLAG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int ath6kl_wmi_set_ie_cmd(struct wmi *wmi, u8 if_idx, u8 ie_id, u8 ie_field,</div><div class='add'>+			  const u8 *ie_info, u8 ie_len)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct wmi_set_ie_cmd *p;</div><div class='add'>+</div><div class='add'>+	skb = ath6kl_wmi_get_new_buf(sizeof(*p) + ie_len);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WMI, "set_ie_cmd: ie_id=%u ie_ie_field=%u ie_len=%u\n",</div><div class='add'>+		   ie_id, ie_field, ie_len);</div><div class='add'>+	p = (struct wmi_set_ie_cmd *) skb-&gt;data;</div><div class='add'>+	p-&gt;ie_id = ie_id;</div><div class='add'>+	p-&gt;ie_field = ie_field;</div><div class='add'>+	p-&gt;ie_len = ie_len;</div><div class='add'>+	if (ie_info &amp;&amp; ie_len &gt; 0)</div><div class='add'>+		memcpy(p-&gt;ie_info, ie_info, ie_len);</div><div class='add'>+</div><div class='add'>+	return ath6kl_wmi_cmd_send(wmi, if_idx, skb, WMI_SET_IE_CMDID,</div><div class='add'>+				   NO_SYNC_WMIFLAG);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int ath6kl_wmi_disable_11b_rates_cmd(struct wmi *wmi, bool disable)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='hunk'>@@ -3247,8 +3327,9 @@ static int ath6kl_wmi_send_action_cmd(struct wmi *wmi, u8 if_idx, u32 id,</div><div class='ctx'> 	wmi-&gt;last_mgmt_tx_frame = buf;</div><div class='ctx'> 	wmi-&gt;last_mgmt_tx_frame_len = data_len;</div><div class='ctx'> </div><div class='del'>-	ath6kl_dbg(ATH6KL_DBG_WMI, "send_action_cmd: id=%u freq=%u wait=%u "</div><div class='del'>-		   "len=%u\n", id, freq, wait, data_len);</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+		   "send_action_cmd: id=%u freq=%u wait=%u len=%u\n",</div><div class='add'>+		   id, freq, wait, data_len);</div><div class='ctx'> 	p = (struct wmi_send_action_cmd *) skb-&gt;data;</div><div class='ctx'> 	p-&gt;id = cpu_to_le32(id);</div><div class='ctx'> 	p-&gt;freq = cpu_to_le32(freq);</div><div class='hunk'>@@ -3285,8 +3366,9 @@ static int __ath6kl_wmi_send_mgmt_cmd(struct wmi *wmi, u8 if_idx, u32 id,</div><div class='ctx'> 	wmi-&gt;last_mgmt_tx_frame = buf;</div><div class='ctx'> 	wmi-&gt;last_mgmt_tx_frame_len = data_len;</div><div class='ctx'> </div><div class='del'>-	ath6kl_dbg(ATH6KL_DBG_WMI, "send_action_cmd: id=%u freq=%u wait=%u "</div><div class='del'>-		   "len=%u\n", id, freq, wait, data_len);</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+		   "send_action_cmd: id=%u freq=%u wait=%u len=%u\n",</div><div class='add'>+		   id, freq, wait, data_len);</div><div class='ctx'> 	p = (struct wmi_send_mgmt_cmd *) skb-&gt;data;</div><div class='ctx'> 	p-&gt;id = cpu_to_le32(id);</div><div class='ctx'> 	p-&gt;freq = cpu_to_le32(freq);</div><div class='hunk'>@@ -3339,8 +3421,9 @@ int ath6kl_wmi_send_probe_response_cmd(struct wmi *wmi, u8 if_idx, u32 freq,</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ath6kl_dbg(ATH6KL_DBG_WMI, "send_probe_response_cmd: freq=%u dst=%pM "</div><div class='del'>-		   "len=%u\n", freq, dst, data_len);</div><div class='add'>+	ath6kl_dbg(ATH6KL_DBG_WMI,</div><div class='add'>+		   "send_probe_response_cmd: freq=%u dst=%pM len=%u\n",</div><div class='add'>+		   freq, dst, data_len);</div><div class='ctx'> 	p = (struct wmi_p2p_probe_response_cmd *) skb-&gt;data;</div><div class='ctx'> 	p-&gt;freq = cpu_to_le32(freq);</div><div class='ctx'> 	memcpy(p-&gt;destination_addr, dst, ETH_ALEN);</div><div class='hunk'>@@ -3392,6 +3475,23 @@ int ath6kl_wmi_cancel_remain_on_chnl_cmd(struct wmi *wmi, u8 if_idx)</div><div class='ctx'> 				     WMI_CANCEL_REMAIN_ON_CHNL_CMDID);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int ath6kl_wmi_set_inact_period(struct wmi *wmi, u8 if_idx, int inact_timeout)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct wmi_set_inact_period_cmd *cmd;</div><div class='add'>+</div><div class='add'>+	skb = ath6kl_wmi_get_new_buf(sizeof(*cmd));</div><div class='add'>+	if (!skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd = (struct wmi_set_inact_period_cmd *) skb-&gt;data;</div><div class='add'>+	cmd-&gt;inact_period = cpu_to_le32(inact_timeout);</div><div class='add'>+	cmd-&gt;num_null_func = 0;</div><div class='add'>+</div><div class='add'>+	return ath6kl_wmi_cmd_send(wmi, if_idx, skb, WMI_AP_CONN_INACT_CMDID,</div><div class='add'>+				   NO_SYNC_WMIFLAG);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ath6kl_wmi_control_rx_xtnd(struct wmi *wmi, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct wmix_cmd_hdr *cmd;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath6kl/wmi.h b/drivers/net/wireless/ath/ath6kl/wmi.h<br/>index 4092e3e80790..9076bec3a2ba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/wmi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath6kl/wmi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath6kl/wmi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath6kl/wmi.h</a></div><div class='hunk'>@@ -106,6 +106,8 @@ struct wmi_data_sync_bufs {</div><div class='ctx'> #define WMM_AC_VI   2		/* video */</div><div class='ctx'> #define WMM_AC_VO   3		/* voice */</div><div class='ctx'> </div><div class='add'>+#define WMI_VOICE_USER_PRIORITY		0x7</div><div class='add'>+</div><div class='ctx'> struct wmi {</div><div class='ctx'> 	u16 stream_exist_for_ac[WMM_NUM_AC];</div><div class='ctx'> 	u8 fat_pipe_exist;</div><div class='hunk'>@@ -182,6 +184,9 @@ enum wmi_data_hdr_flags {</div><div class='ctx'> #define WMI_DATA_HDR_META_MASK      0x7</div><div class='ctx'> #define WMI_DATA_HDR_META_SHIFT     13</div><div class='ctx'> </div><div class='add'>+#define WMI_DATA_HDR_PAD_BEFORE_DATA_MASK               0xFF</div><div class='add'>+#define WMI_DATA_HDR_PAD_BEFORE_DATA_SHIFT              0x8</div><div class='add'>+</div><div class='ctx'> /* Macros for operating on WMI_DATA_HDR (info3) field */</div><div class='ctx'> #define WMI_DATA_HDR_IF_IDX_MASK    0xF</div><div class='ctx'> </div><div class='hunk'>@@ -423,6 +428,7 @@ enum wmi_cmd_id {</div><div class='ctx'> 	WMI_SET_FRAMERATES_CMDID,</div><div class='ctx'> 	WMI_SET_AP_PS_CMDID,</div><div class='ctx'> 	WMI_SET_QOS_SUPP_CMDID,</div><div class='add'>+	WMI_SET_IE_CMDID,</div><div class='ctx'> </div><div class='ctx'> 	/* WMI_THIN_RESERVED_... mark the start and end</div><div class='ctx'> 	 * values for WMI_THIN_RESERVED command IDs. These</div><div class='hunk'>@@ -629,6 +635,11 @@ enum wmi_mgmt_frame_type {</div><div class='ctx'> 	WMI_NUM_MGMT_FRAME</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum wmi_ie_field_type {</div><div class='add'>+	WMI_RSN_IE_CAPB	= 0x1,</div><div class='add'>+	WMI_IE_FULL	= 0xFF,  /* indicats full IE */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* WMI_CONNECT_CMDID  */</div><div class='ctx'> enum network_type {</div><div class='ctx'> 	INFRA_NETWORK = 0x01,</div><div class='hunk'>@@ -1142,6 +1153,7 @@ enum wmi_phy_mode {</div><div class='ctx'> 	WMI_11AG_MODE = 0x3,</div><div class='ctx'> 	WMI_11B_MODE = 0x4,</div><div class='ctx'> 	WMI_11GONLY_MODE = 0x5,</div><div class='add'>+	WMI_11G_HT20	= 0x6,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define WMI_MAX_CHANNELS        32</div><div class='hunk'>@@ -1268,6 +1280,16 @@ struct wmi_mcast_filter_add_del_cmd {</div><div class='ctx'> 	u8 mcast_mac[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+struct wmi_set_htcap_cmd {</div><div class='add'>+	u8 band;</div><div class='add'>+	u8 ht_enable;</div><div class='add'>+	u8 ht40_supported;</div><div class='add'>+	u8 ht20_sgi;</div><div class='add'>+	u8 ht40_sgi;</div><div class='add'>+	u8 intolerant_40mhz;</div><div class='add'>+	u8 max_ampdu_len_exp;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> /* Command Replies */</div><div class='ctx'> </div><div class='ctx'> /* WMI_GET_CHANNEL_LIST_CMDID reply */</div><div class='hunk'>@@ -1397,6 +1419,16 @@ struct wmi_ready_event_2 {</div><div class='ctx'> 	u8 phy_cap;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+/* WMI_PHY_CAPABILITY */</div><div class='add'>+enum wmi_phy_cap {</div><div class='add'>+	WMI_11A_CAP = 0x01,</div><div class='add'>+	WMI_11G_CAP = 0x02,</div><div class='add'>+	WMI_11AG_CAP = 0x03,</div><div class='add'>+	WMI_11AN_CAP = 0x04,</div><div class='add'>+	WMI_11GN_CAP = 0x05,</div><div class='add'>+	WMI_11AGN_CAP = 0x06,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Connect Event */</div><div class='ctx'> struct wmi_connect_event {</div><div class='ctx'> 	union {</div><div class='hunk'>@@ -1449,6 +1481,17 @@ enum wmi_disconnect_reason {</div><div class='ctx'> 	IBSS_MERGE = 0xe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* AP mode disconnect proto_reasons */</div><div class='add'>+enum ap_disconnect_reason {</div><div class='add'>+	WMI_AP_REASON_STA_LEFT		= 101,</div><div class='add'>+	WMI_AP_REASON_FROM_HOST		= 102,</div><div class='add'>+	WMI_AP_REASON_COMM_TIMEOUT	= 103,</div><div class='add'>+	WMI_AP_REASON_MAX_STA		= 104,</div><div class='add'>+	WMI_AP_REASON_ACL		= 105,</div><div class='add'>+	WMI_AP_REASON_STA_ROAM		= 106,</div><div class='add'>+	WMI_AP_REASON_DFS_CHANNEL	= 107,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define ATH6KL_COUNTRY_RD_SHIFT        16</div><div class='ctx'> </div><div class='ctx'> struct ath6kl_wmi_regdomain {</div><div class='hunk'>@@ -1913,6 +1956,14 @@ struct wmi_set_appie_cmd {</div><div class='ctx'> 	u8 ie_info[0];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+struct wmi_set_ie_cmd {</div><div class='add'>+	u8 ie_id;</div><div class='add'>+	u8 ie_field;	/* enum wmi_ie_field_type */</div><div class='add'>+	u8 ie_len;</div><div class='add'>+	u8 reserved;</div><div class='add'>+	u8 ie_info[0];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> /* Notify the WSC registration status to the target */</div><div class='ctx'> #define WSC_REG_ACTIVE     1</div><div class='ctx'> #define WSC_REG_INACTIVE   0</div><div class='hunk'>@@ -2141,6 +2192,11 @@ struct wmi_ap_hidden_ssid_cmd {</div><div class='ctx'> 	u8 hidden_ssid;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+struct wmi_set_inact_period_cmd {</div><div class='add'>+	__le32 inact_period;</div><div class='add'>+	u8 num_null_func;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> /* AP mode events */</div><div class='ctx'> struct wmi_ap_set_apsd_cmd {</div><div class='ctx'> 	u8 enable;</div><div class='hunk'>@@ -2465,6 +2521,9 @@ int ath6kl_wmi_get_roam_tbl_cmd(struct wmi *wmi);</div><div class='ctx'> int ath6kl_wmi_set_wmm_txop(struct wmi *wmi, u8 if_idx, enum wmi_txop_cfg cfg);</div><div class='ctx'> int ath6kl_wmi_set_keepalive_cmd(struct wmi *wmi, u8 if_idx,</div><div class='ctx'> 				 u8 keep_alive_intvl);</div><div class='add'>+int ath6kl_wmi_set_htcap_cmd(struct wmi *wmi, u8 if_idx,</div><div class='add'>+			     enum ieee80211_band band,</div><div class='add'>+			     struct ath6kl_htcap *htcap);</div><div class='ctx'> int ath6kl_wmi_test_cmd(struct wmi *wmi, void *buf, size_t len);</div><div class='ctx'> </div><div class='ctx'> s32 ath6kl_wmi_get_rate(s8 rate_index);</div><div class='hunk'>@@ -2515,6 +2574,9 @@ int ath6kl_wmi_set_rx_frame_format_cmd(struct wmi *wmi, u8 if_idx,</div><div class='ctx'> int ath6kl_wmi_set_appie_cmd(struct wmi *wmi, u8 if_idx, u8 mgmt_frm_type,</div><div class='ctx'> 			     const u8 *ie, u8 ie_len);</div><div class='ctx'> </div><div class='add'>+int ath6kl_wmi_set_ie_cmd(struct wmi *wmi, u8 if_idx, u8 ie_id, u8 ie_field,</div><div class='add'>+			  const u8 *ie_info, u8 ie_len);</div><div class='add'>+</div><div class='ctx'> /* P2P */</div><div class='ctx'> int ath6kl_wmi_disable_11b_rates_cmd(struct wmi *wmi, bool disable);</div><div class='ctx'> </div><div class='hunk'>@@ -2538,6 +2600,8 @@ int ath6kl_wmi_cancel_remain_on_chnl_cmd(struct wmi *wmi, u8 if_idx);</div><div class='ctx'> int ath6kl_wmi_set_appie_cmd(struct wmi *wmi, u8 if_idx, u8 mgmt_frm_type,</div><div class='ctx'> 			     const u8 *ie, u8 ie_len);</div><div class='ctx'> </div><div class='add'>+int ath6kl_wmi_set_inact_period(struct wmi *wmi, u8 if_idx, int inact_timeout);</div><div class='add'>+</div><div class='ctx'> void ath6kl_wmi_sscan_timer(unsigned long ptr);</div><div class='ctx'> </div><div class='ctx'> struct ath6kl_vif *ath6kl_get_vif_by_index(struct ath6kl *ar, u8 if_idx);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/Makefile b/drivers/net/wireless/ath/ath9k/Makefile<br/>index 27d95fe5ade0..3f0b84723789 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/Makefile</a></div><div class='hunk'>@@ -11,7 +11,10 @@ ath9k-$(CONFIG_ATH9K_PCI) += pci.o</div><div class='ctx'> ath9k-$(CONFIG_ATH9K_AHB) += ahb.o</div><div class='ctx'> ath9k-$(CONFIG_ATH9K_DEBUGFS) += debug.o</div><div class='ctx'> ath9k-$(CONFIG_ATH9K_DFS_DEBUGFS) += dfs_debug.o</div><div class='del'>-ath9k-$(CONFIG_ATH9K_DFS_CERTIFIED) += dfs.o</div><div class='add'>+ath9k-$(CONFIG_ATH9K_DFS_CERTIFIED) += \</div><div class='add'>+		dfs.o \</div><div class='add'>+		dfs_pattern_detector.o \</div><div class='add'>+		dfs_pri_detector.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ATH9K) += ath9k.o</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c<br/>index 7e0ea4e98334..b4c77f9d7470 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ani.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ani.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ani.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ani.c</a></div><div class='hunk'>@@ -46,8 +46,8 @@ static const struct ani_ofdm_level_entry ofdm_level_table[] = {</div><div class='ctx'> 	{  5,  4,  1  }, /* lvl 5 */</div><div class='ctx'> 	{  6,  5,  1  }, /* lvl 6 */</div><div class='ctx'> 	{  7,  6,  1  }, /* lvl 7 */</div><div class='del'>-	{  7,  7,  1  }, /* lvl 8 */</div><div class='del'>-	{  7,  8,  0  }  /* lvl 9 */</div><div class='add'>+	{  7,  6,  0  }, /* lvl 8 */</div><div class='add'>+	{  7,  7,  0  }  /* lvl 9 */</div><div class='ctx'> };</div><div class='ctx'> #define ATH9K_ANI_OFDM_NUM_LEVEL \</div><div class='ctx'> 	ARRAY_SIZE(ofdm_level_table)</div><div class='hunk'>@@ -91,8 +91,8 @@ static const struct ani_cck_level_entry cck_level_table[] = {</div><div class='ctx'> 	{  4,  0  }, /* lvl 4 */</div><div class='ctx'> 	{  5,  0  }, /* lvl 5 */</div><div class='ctx'> 	{  6,  0  }, /* lvl 6 */</div><div class='del'>-	{  7,  0  }, /* lvl 7 (only for high rssi) */</div><div class='del'>-	{  8,  0  }  /* lvl 8 (only for high rssi) */</div><div class='add'>+	{  6,  0  }, /* lvl 7 (only for high rssi) */</div><div class='add'>+	{  7,  0  }  /* lvl 8 (only for high rssi) */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define ATH9K_ANI_CCK_NUM_LEVEL \</div><div class='hunk'>@@ -274,7 +274,9 @@ static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel)</div><div class='ctx'> 		aniState-&gt;rssiThrLow, aniState-&gt;rssiThrHigh);</div><div class='ctx'> </div><div class='ctx'> 	if (aniState-&gt;update_ani)</div><div class='del'>-		aniState-&gt;ofdmNoiseImmunityLevel = immunityLevel;</div><div class='add'>+		aniState-&gt;ofdmNoiseImmunityLevel =</div><div class='add'>+			(immunityLevel &gt; ATH9K_ANI_OFDM_DEF_LEVEL) ?</div><div class='add'>+			immunityLevel : ATH9K_ANI_OFDM_DEF_LEVEL;</div><div class='ctx'> </div><div class='ctx'> 	entry_ofdm = &amp;ofdm_level_table[aniState-&gt;ofdmNoiseImmunityLevel];</div><div class='ctx'> 	entry_cck = &amp;cck_level_table[aniState-&gt;cckNoiseImmunityLevel];</div><div class='hunk'>@@ -290,16 +292,9 @@ static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel)</div><div class='ctx'> 				     ATH9K_ANI_FIRSTEP_LEVEL,</div><div class='ctx'> 				     entry_ofdm-&gt;fir_step_level);</div><div class='ctx'> </div><div class='del'>-	if ((ah-&gt;opmode != NL80211_IFTYPE_STATION &amp;&amp;</div><div class='del'>-	     ah-&gt;opmode != NL80211_IFTYPE_ADHOC) ||</div><div class='del'>-	    aniState-&gt;noiseFloor &lt;= aniState-&gt;rssiThrHigh) {</div><div class='del'>-		if (aniState-&gt;ofdmWeakSigDetectOff)</div><div class='del'>-			/* force on ofdm weak sig detect */</div><div class='del'>-			ath9k_hw_ani_control(ah,</div><div class='del'>-				ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,</div><div class='del'>-					     true);</div><div class='del'>-		else if (aniState-&gt;ofdmWeakSigDetectOff ==</div><div class='del'>-			 entry_ofdm-&gt;ofdm_weak_signal_on)</div><div class='add'>+	if ((aniState-&gt;noiseFloor &gt;= aniState-&gt;rssiThrHigh) &amp;&amp;</div><div class='add'>+	    (!aniState-&gt;ofdmWeakSigDetectOff !=</div><div class='add'>+	     entry_ofdm-&gt;ofdm_weak_signal_on)) {</div><div class='ctx'> 			ath9k_hw_ani_control(ah,</div><div class='ctx'> 				ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,</div><div class='ctx'> 				entry_ofdm-&gt;ofdm_weak_signal_on);</div><div class='hunk'>@@ -347,7 +342,9 @@ static void ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel)</div><div class='ctx'> 		immunityLevel = ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI;</div><div class='ctx'> </div><div class='ctx'> 	if (aniState-&gt;update_ani)</div><div class='del'>-		aniState-&gt;cckNoiseImmunityLevel = immunityLevel;</div><div class='add'>+		aniState-&gt;cckNoiseImmunityLevel =</div><div class='add'>+			(immunityLevel &gt; ATH9K_ANI_CCK_DEF_LEVEL) ?</div><div class='add'>+			immunityLevel : ATH9K_ANI_CCK_DEF_LEVEL;</div><div class='ctx'> </div><div class='ctx'> 	entry_ofdm = &amp;ofdm_level_table[aniState-&gt;ofdmNoiseImmunityLevel];</div><div class='ctx'> 	entry_cck = &amp;cck_level_table[aniState-&gt;cckNoiseImmunityLevel];</div><div class='hunk'>@@ -717,26 +714,30 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan)</div><div class='ctx'> 		ofdmPhyErrRate, aniState-&gt;cckNoiseImmunityLevel,</div><div class='ctx'> 		cckPhyErrRate, aniState-&gt;ofdmsTurn);</div><div class='ctx'> </div><div class='del'>-	if (aniState-&gt;listenTime &gt; 5 * ah-&gt;aniperiod) {</div><div class='del'>-		if (ofdmPhyErrRate &lt;= ah-&gt;config.ofdm_trig_low &amp;&amp;</div><div class='del'>-		    cckPhyErrRate &lt;= ah-&gt;config.cck_trig_low) {</div><div class='add'>+	if (aniState-&gt;listenTime &gt; ah-&gt;aniperiod) {</div><div class='add'>+		if (cckPhyErrRate &lt; ah-&gt;config.cck_trig_low &amp;&amp;</div><div class='add'>+		    ((ofdmPhyErrRate &lt; ah-&gt;config.ofdm_trig_low &amp;&amp;</div><div class='add'>+		      aniState-&gt;ofdmNoiseImmunityLevel &lt;</div><div class='add'>+		      ATH9K_ANI_OFDM_DEF_LEVEL) ||</div><div class='add'>+		     (ofdmPhyErrRate &lt; ATH9K_ANI_OFDM_TRIG_LOW_ABOVE_INI &amp;&amp;</div><div class='add'>+		      aniState-&gt;ofdmNoiseImmunityLevel &gt;=</div><div class='add'>+		      ATH9K_ANI_OFDM_DEF_LEVEL))) {</div><div class='ctx'> 			ath9k_hw_ani_lower_immunity(ah);</div><div class='ctx'> 			aniState-&gt;ofdmsTurn = !aniState-&gt;ofdmsTurn;</div><div class='del'>-		}</div><div class='del'>-		ath9k_ani_restart(ah);</div><div class='del'>-	} else if (aniState-&gt;listenTime &gt; ah-&gt;aniperiod) {</div><div class='del'>-		/* check to see if need to raise immunity */</div><div class='del'>-		if (ofdmPhyErrRate &gt; ah-&gt;config.ofdm_trig_high &amp;&amp;</div><div class='del'>-		    (cckPhyErrRate &lt;= ah-&gt;config.cck_trig_high ||</div><div class='del'>-		     aniState-&gt;ofdmsTurn)) {</div><div class='add'>+		} else if ((ofdmPhyErrRate &gt; ah-&gt;config.ofdm_trig_high &amp;&amp;</div><div class='add'>+			    aniState-&gt;ofdmNoiseImmunityLevel &gt;=</div><div class='add'>+			    ATH9K_ANI_OFDM_DEF_LEVEL) ||</div><div class='add'>+			   (ofdmPhyErrRate &gt;</div><div class='add'>+			    ATH9K_ANI_OFDM_TRIG_HIGH_BELOW_INI &amp;&amp;</div><div class='add'>+			    aniState-&gt;ofdmNoiseImmunityLevel &lt;</div><div class='add'>+			    ATH9K_ANI_OFDM_DEF_LEVEL)) {</div><div class='ctx'> 			ath9k_hw_ani_ofdm_err_trigger(ah);</div><div class='del'>-			ath9k_ani_restart(ah);</div><div class='ctx'> 			aniState-&gt;ofdmsTurn = false;</div><div class='ctx'> 		} else if (cckPhyErrRate &gt; ah-&gt;config.cck_trig_high) {</div><div class='ctx'> 			ath9k_hw_ani_cck_err_trigger(ah);</div><div class='del'>-			ath9k_ani_restart(ah);</div><div class='ctx'> 			aniState-&gt;ofdmsTurn = true;</div><div class='ctx'> 		}</div><div class='add'>+		ath9k_ani_restart(ah);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ath9k_hw_ani_monitor);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ani.h b/drivers/net/wireless/ath/ath9k/ani.h<br/>index 83029d6c7b22..72e2b874e179 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ani.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ani.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ani.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ani.h</a></div><div class='hunk'>@@ -25,11 +25,13 @@</div><div class='ctx'> </div><div class='ctx'> /* units are errors per second */</div><div class='ctx'> #define ATH9K_ANI_OFDM_TRIG_HIGH_OLD      500</div><div class='del'>-#define ATH9K_ANI_OFDM_TRIG_HIGH_NEW      1000</div><div class='add'>+#define ATH9K_ANI_OFDM_TRIG_HIGH_NEW      3500</div><div class='add'>+#define ATH9K_ANI_OFDM_TRIG_HIGH_BELOW_INI 1000</div><div class='ctx'> </div><div class='ctx'> /* units are errors per second */</div><div class='ctx'> #define ATH9K_ANI_OFDM_TRIG_LOW_OLD       200</div><div class='ctx'> #define ATH9K_ANI_OFDM_TRIG_LOW_NEW       400</div><div class='add'>+#define ATH9K_ANI_OFDM_TRIG_LOW_ABOVE_INI 900</div><div class='ctx'> </div><div class='ctx'> /* units are errors per second */</div><div class='ctx'> #define ATH9K_ANI_CCK_TRIG_HIGH_OLD       200</div><div class='hunk'>@@ -53,7 +55,7 @@</div><div class='ctx'> #define ATH9K_ANI_RSSI_THR_LOW            7</div><div class='ctx'> </div><div class='ctx'> #define ATH9K_ANI_PERIOD_OLD              100</div><div class='del'>-#define ATH9K_ANI_PERIOD_NEW              1000</div><div class='add'>+#define ATH9K_ANI_PERIOD_NEW              300</div><div class='ctx'> </div><div class='ctx'> /* in ms */</div><div class='ctx'> #define ATH9K_ANI_POLLINTERVAL_OLD        100</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c<br/>index d7d8e9199140..c7492c6a2519 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar5008_phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar5008_phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar5008_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar5008_phy.c</a></div><div class='hunk'>@@ -245,7 +245,6 @@ static int ar5008_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)</div><div class='ctx'> 	REG_WRITE(ah, AR_PHY(0x37), reg32);</div><div class='ctx'> </div><div class='ctx'> 	ah-&gt;curchan = chan;</div><div class='del'>-	ah-&gt;curchan_rad_index = -1;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -619,19 +618,10 @@ static void ar5008_hw_init_bb(struct ath_hw *ah,</div><div class='ctx'> 	u32 synthDelay;</div><div class='ctx'> </div><div class='ctx'> 	synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) &amp; AR_PHY_RX_DELAY_DELAY;</div><div class='del'>-	if (IS_CHAN_B(chan))</div><div class='del'>-		synthDelay = (4 * synthDelay) / 22;</div><div class='del'>-	else</div><div class='del'>-		synthDelay /= 10;</div><div class='del'>-</div><div class='del'>-	if (IS_CHAN_HALF_RATE(chan))</div><div class='del'>-		synthDelay *= 2;</div><div class='del'>-	else if (IS_CHAN_QUARTER_RATE(chan))</div><div class='del'>-		synthDelay *= 4;</div><div class='ctx'> </div><div class='ctx'> 	REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);</div><div class='ctx'> </div><div class='del'>-	udelay(synthDelay + BASE_ACTIVATE_DELAY);</div><div class='add'>+	ath9k_hw_synth_delay(ah, chan, synthDelay);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ar5008_hw_init_chain_masks(struct ath_hw *ah)</div><div class='hunk'>@@ -869,7 +859,7 @@ static int ar5008_hw_process_ini(struct ath_hw *ah,</div><div class='ctx'> 	ar5008_hw_set_channel_regs(ah, chan);</div><div class='ctx'> 	ar5008_hw_init_chain_masks(ah);</div><div class='ctx'> 	ath9k_olc_init(ah);</div><div class='del'>-	ath9k_hw_apply_txpower(ah, chan);</div><div class='add'>+	ath9k_hw_apply_txpower(ah, chan, false);</div><div class='ctx'> </div><div class='ctx'> 	/* Write analog registers */</div><div class='ctx'> 	if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {</div><div class='hunk'>@@ -949,12 +939,8 @@ static bool ar5008_hw_rfbus_req(struct ath_hw *ah)</div><div class='ctx'> static void ar5008_hw_rfbus_done(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='ctx'> 	u32 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) &amp; AR_PHY_RX_DELAY_DELAY;</div><div class='del'>-	if (IS_CHAN_B(ah-&gt;curchan))</div><div class='del'>-		synthDelay = (4 * synthDelay) / 22;</div><div class='del'>-	else</div><div class='del'>-		synthDelay /= 10;</div><div class='ctx'> </div><div class='del'>-	udelay(synthDelay + BASE_ACTIVATE_DELAY);</div><div class='add'>+	ath9k_hw_synth_delay(ah, ah-&gt;curchan, synthDelay);</div><div class='ctx'> </div><div class='ctx'> 	REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);</div><div class='ctx'> }</div><div class='hunk'>@@ -1047,46 +1033,8 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	case ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION:{</div><div class='del'>-		static const int m1ThreshLow[] = { 127, 50 };</div><div class='del'>-		static const int m2ThreshLow[] = { 127, 40 };</div><div class='del'>-		static const int m1Thresh[] = { 127, 0x4d };</div><div class='del'>-		static const int m2Thresh[] = { 127, 0x40 };</div><div class='del'>-		static const int m2CountThr[] = { 31, 16 };</div><div class='del'>-		static const int m2CountThrLow[] = { 63, 48 };</div><div class='ctx'> 		u32 on = param ? 1 : 0;</div><div class='ctx'> </div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,</div><div class='del'>-			      AR_PHY_SFCORR_LOW_M1_THRESH_LOW,</div><div class='del'>-			      m1ThreshLow[on]);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,</div><div class='del'>-			      AR_PHY_SFCORR_LOW_M2_THRESH_LOW,</div><div class='del'>-			      m2ThreshLow[on]);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR,</div><div class='del'>-			      AR_PHY_SFCORR_M1_THRESH,</div><div class='del'>-			      m1Thresh[on]);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR,</div><div class='del'>-			      AR_PHY_SFCORR_M2_THRESH,</div><div class='del'>-			      m2Thresh[on]);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR,</div><div class='del'>-			      AR_PHY_SFCORR_M2COUNT_THR,</div><div class='del'>-			      m2CountThr[on]);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,</div><div class='del'>-			      AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW,</div><div class='del'>-			      m2CountThrLow[on]);</div><div class='del'>-</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,</div><div class='del'>-			      AR_PHY_SFCORR_EXT_M1_THRESH_LOW,</div><div class='del'>-			      m1ThreshLow[on]);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,</div><div class='del'>-			      AR_PHY_SFCORR_EXT_M2_THRESH_LOW,</div><div class='del'>-			      m2ThreshLow[on]);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,</div><div class='del'>-			      AR_PHY_SFCORR_EXT_M1_THRESH,</div><div class='del'>-			      m1Thresh[on]);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,</div><div class='del'>-			      AR_PHY_SFCORR_EXT_M2_THRESH,</div><div class='del'>-			      m2Thresh[on]);</div><div class='del'>-</div><div class='ctx'> 		if (on)</div><div class='ctx'> 			REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,</div><div class='ctx'> 				    AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9002_mac.c b/drivers/net/wireless/ath/ath9k/ar9002_mac.c<br/>index aa2abaf31cba..8d78253c26ce 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9002_mac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9002_mac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9002_mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9002_mac.c</a></div><div class='hunk'>@@ -136,6 +136,7 @@ static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (sync_cause) {</div><div class='add'>+		ath9k_debug_sync_cause(common, sync_cause);</div><div class='ctx'> 		fatal_int =</div><div class='ctx'> 			(sync_cause &amp;</div><div class='ctx'> 			 (AR_INTR_SYNC_HOST1_FATAL | AR_INTR_SYNC_HOST1_PERR))</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c<br/>index 3cbbb033fcea..846dd7974eb8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9002_phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9002_phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9002_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9002_phy.c</a></div><div class='hunk'>@@ -152,7 +152,6 @@ static int ar9002_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)</div><div class='ctx'> 	REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32);</div><div class='ctx'> </div><div class='ctx'> 	ah-&gt;curchan = chan;</div><div class='del'>-	ah-&gt;curchan_rad_index = -1;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h<br/>index 46c79a3d4737..952cb2b4656b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h</a></div><div class='hunk'>@@ -777,11 +777,11 @@ static const u32 ar9300Common_rx_gain_table_2p2[][2] = {</div><div class='ctx'> 	{0x0000a074, 0x00000000},</div><div class='ctx'> 	{0x0000a078, 0x00000000},</div><div class='ctx'> 	{0x0000a07c, 0x00000000},</div><div class='del'>-	{0x0000a080, 0x22222229},</div><div class='del'>-	{0x0000a084, 0x1d1d1d1d},</div><div class='del'>-	{0x0000a088, 0x1d1d1d1d},</div><div class='del'>-	{0x0000a08c, 0x1d1d1d1d},</div><div class='del'>-	{0x0000a090, 0x171d1d1d},</div><div class='add'>+	{0x0000a080, 0x1a1a1a1a},</div><div class='add'>+	{0x0000a084, 0x1a1a1a1a},</div><div class='add'>+	{0x0000a088, 0x1a1a1a1a},</div><div class='add'>+	{0x0000a08c, 0x1a1a1a1a},</div><div class='add'>+	{0x0000a090, 0x171a1a1a},</div><div class='ctx'> 	{0x0000a094, 0x11111717},</div><div class='ctx'> 	{0x0000a098, 0x00030311},</div><div class='ctx'> 	{0x0000a09c, 0x00000000},</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c<br/>index 63089cc1fafd..9fdd70fcaf5b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_calib.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9003_calib.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_calib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_calib.c</a></div><div class='hunk'>@@ -892,34 +892,6 @@ static void ar9003_hw_tx_iq_cal_reload(struct ath_hw *ah)</div><div class='ctx'> 		      AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan)</div><div class='del'>-{</div><div class='del'>-	struct ath9k_rtt_hist *hist;</div><div class='del'>-	u32 *table;</div><div class='del'>-	int i;</div><div class='del'>-	bool restore;</div><div class='del'>-</div><div class='del'>-	if (!ah-&gt;caldata)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	hist = &amp;ah-&gt;caldata-&gt;rtt_hist;</div><div class='del'>-	if (!hist-&gt;num_readings)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	ar9003_hw_rtt_enable(ah);</div><div class='del'>-	ar9003_hw_rtt_set_mask(ah, 0x00);</div><div class='del'>-	for (i = 0; i &lt; AR9300_MAX_CHAINS; i++) {</div><div class='del'>-		if (!(ah-&gt;rxchainmask &amp; (1 &lt;&lt; i)))</div><div class='del'>-			continue;</div><div class='del'>-		table = &amp;hist-&gt;table[i][hist-&gt;num_readings][0];</div><div class='del'>-		ar9003_hw_rtt_load_hist(ah, i, table);</div><div class='del'>-	}</div><div class='del'>-	restore = ar9003_hw_rtt_force_restore(ah);</div><div class='del'>-	ar9003_hw_rtt_disable(ah);</div><div class='del'>-</div><div class='del'>-	return restore;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static bool ar9003_hw_init_cal(struct ath_hw *ah,</div><div class='ctx'> 			       struct ath9k_channel *chan)</div><div class='ctx'> {</div><div class='hunk'>@@ -942,9 +914,10 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,</div><div class='ctx'> 		if (!ar9003_hw_rtt_restore(ah, chan))</div><div class='ctx'> 			run_rtt_cal = true;</div><div class='ctx'> </div><div class='del'>-		ath_dbg(common, CALIBRATE, "RTT restore %s\n",</div><div class='del'>-			run_rtt_cal ? "failed" : "succeed");</div><div class='add'>+		if (run_rtt_cal)</div><div class='add'>+			ath_dbg(common, CALIBRATE, "RTT calibration to be done\n");</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	run_agc_cal = run_rtt_cal;</div><div class='ctx'> </div><div class='ctx'> 	if (run_rtt_cal) {</div><div class='hunk'>@@ -1000,10 +973,12 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,</div><div class='ctx'> 	if (mci &amp;&amp; IS_CHAN_2GHZ(chan) &amp;&amp; run_agc_cal)</div><div class='ctx'> 		ar9003_mci_init_cal_req(ah, &amp;is_reusable);</div><div class='ctx'> </div><div class='del'>-	txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);</div><div class='del'>-	REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);</div><div class='del'>-	udelay(5);</div><div class='del'>-	REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);</div><div class='add'>+	if (!(IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))) {</div><div class='add'>+		txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);</div><div class='add'>+		REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);</div><div class='add'>+		udelay(5);</div><div class='add'>+		REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> skip_tx_iqcal:</div><div class='ctx'> 	if (run_agc_cal || !(ah-&gt;ah_flags &amp; AH_FASTCC)) {</div><div class='hunk'>@@ -1067,17 +1042,14 @@ skip_tx_iqcal:</div><div class='ctx'> #undef CL_TAB_ENTRY</div><div class='ctx'> </div><div class='ctx'> 	if (run_rtt_cal &amp;&amp; caldata) {</div><div class='del'>-		struct ath9k_rtt_hist *hist = &amp;caldata-&gt;rtt_hist;</div><div class='del'>-		if (is_reusable &amp;&amp; (hist-&gt;num_readings &lt; RTT_HIST_MAX)) {</div><div class='del'>-			u32 *table;</div><div class='add'>+		if (is_reusable) {</div><div class='add'>+			if (!ath9k_hw_rfbus_req(ah))</div><div class='add'>+				ath_err(ath9k_hw_common(ah),</div><div class='add'>+					"Could not stop baseband\n");</div><div class='add'>+			else</div><div class='add'>+				ar9003_hw_rtt_fill_hist(ah);</div><div class='ctx'> </div><div class='del'>-			hist-&gt;num_readings++;</div><div class='del'>-			for (i = 0; i &lt; AR9300_MAX_CHAINS; i++) {</div><div class='del'>-				if (!(ah-&gt;rxchainmask &amp; (1 &lt;&lt; i)))</div><div class='del'>-					continue;</div><div class='del'>-				table = &amp;hist-&gt;table[i][hist-&gt;num_readings][0];</div><div class='del'>-				ar9003_hw_rtt_fill_hist(ah, i, table);</div><div class='del'>-			}</div><div class='add'>+			ath9k_hw_rfbus_done(ah);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ar9003_hw_rtt_disable(ah);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c<br/>index 6bb4db052bb0..dfb0441f406c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9003_eeprom.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_eeprom.c</a></div><div class='hunk'>@@ -30,11 +30,6 @@</div><div class='ctx'> #define CTL_11A_EXT (CTL_11A | EXT_ADDITIVE)</div><div class='ctx'> #define CTL_11G_EXT (CTL_11G | EXT_ADDITIVE)</div><div class='ctx'> #define CTL_11B_EXT (CTL_11B | EXT_ADDITIVE)</div><div class='del'>-#define REDUCE_SCALED_POWER_BY_TWO_CHAIN     6  /* 10*log10(2)*2 */</div><div class='del'>-#define REDUCE_SCALED_POWER_BY_THREE_CHAIN   9  /* 10*log10(3)*2 */</div><div class='del'>-#define PWRINCR_3_TO_1_CHAIN      9             /* 10*log(3)*2 */</div><div class='del'>-#define PWRINCR_3_TO_2_CHAIN      3             /* floor(10*log(3/2)*2) */</div><div class='del'>-#define PWRINCR_2_TO_1_CHAIN      6             /* 10*log(2)*2 */</div><div class='ctx'> </div><div class='ctx'> #define SUB_NUM_CTL_MODES_AT_5G_40 2    /* excluding HT40, EXT-OFDM */</div><div class='ctx'> #define SUB_NUM_CTL_MODES_AT_2G_40 3    /* excluding HT40, EXT-OFDM, EXT-CCK */</div><div class='hunk'>@@ -2936,15 +2931,6 @@ static const struct ar9300_eeprom *ar9003_eeprom_struct_find_by_id(int id)</div><div class='ctx'> #undef N_LOOP</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz)</div><div class='del'>-{</div><div class='del'>-	if (fbin == AR5416_BCHAN_UNUSED)</div><div class='del'>-		return fbin;</div><div class='del'>-</div><div class='del'>-	return (u16) ((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ath9k_hw_ar9300_check_eeprom(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3823,7 +3809,7 @@ static bool is_pmu_set(struct ath_hw *ah, u32 pmu_reg, int pmu_set)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)</div><div class='add'>+void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='ctx'> 	int internal_regulator =</div><div class='ctx'> 		ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR);</div><div class='hunk'>@@ -4070,7 +4056,7 @@ static u8 ar9003_hw_eeprom_get_tgt_pwr(struct ath_hw *ah,</div><div class='ctx'> 	 * targetpower piers stored on eeprom</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; numPiers; i++) {</div><div class='del'>-		freqArray[i] = FBIN2FREQ(pFreqBin[i], is2GHz);</div><div class='add'>+		freqArray[i] = ath9k_hw_fbin2freq(pFreqBin[i], is2GHz);</div><div class='ctx'> 		targetPowerArray[i] = pEepromTargetPwr[i].tPow2x[rateIndex];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4106,7 +4092,7 @@ static u8 ar9003_hw_eeprom_get_ht20_tgt_pwr(struct ath_hw *ah,</div><div class='ctx'> 	 * from targetpower piers stored on eeprom</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; numPiers; i++) {</div><div class='del'>-		freqArray[i] = FBIN2FREQ(pFreqBin[i], is2GHz);</div><div class='add'>+		freqArray[i] = ath9k_hw_fbin2freq(pFreqBin[i], is2GHz);</div><div class='ctx'> 		targetPowerArray[i] = pEepromTargetPwr[i].tPow2x[rateIndex];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4142,7 +4128,7 @@ static u8 ar9003_hw_eeprom_get_ht40_tgt_pwr(struct ath_hw *ah,</div><div class='ctx'> 	 * targetpower piers stored on eeprom</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; numPiers; i++) {</div><div class='del'>-		freqArray[i] = FBIN2FREQ(pFreqBin[i], is2GHz);</div><div class='add'>+		freqArray[i] = ath9k_hw_fbin2freq(pFreqBin[i], is2GHz);</div><div class='ctx'> 		targetPowerArray[i] = pEepromTargetPwr[i].tPow2x[rateIndex];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4167,7 +4153,7 @@ static u8 ar9003_hw_eeprom_get_cck_tgt_pwr(struct ath_hw *ah,</div><div class='ctx'> 	 * targetpower piers stored on eeprom</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; numPiers; i++) {</div><div class='del'>-		freqArray[i] = FBIN2FREQ(pFreqBin[i], 1);</div><div class='add'>+		freqArray[i] = ath9k_hw_fbin2freq(pFreqBin[i], 1);</div><div class='ctx'> 		targetPowerArray[i] = pEepromTargetPwr[i].tPow2x[rateIndex];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4295,18 +4281,10 @@ static int ar9003_hw_tx_power_regwrite(struct ath_hw *ah, u8 * pPwrArray)</div><div class='ctx'> #undef POW_SM</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ar9003_hw_set_target_power_eeprom(struct ath_hw *ah, u16 freq,</div><div class='del'>-					      u8 *targetPowerValT2)</div><div class='add'>+static void ar9003_hw_get_legacy_target_powers(struct ath_hw *ah, u16 freq,</div><div class='add'>+					       u8 *targetPowerValT2,</div><div class='add'>+					       bool is2GHz)</div><div class='ctx'> {</div><div class='del'>-	/* XXX: hard code for now, need to get from eeprom struct */</div><div class='del'>-	u8 ht40PowerIncForPdadc = 0;</div><div class='del'>-	bool is2GHz = false;</div><div class='del'>-	unsigned int i = 0;</div><div class='del'>-	struct ath_common *common = ath9k_hw_common(ah);</div><div class='del'>-</div><div class='del'>-	if (freq &lt; 4000)</div><div class='del'>-		is2GHz = true;</div><div class='del'>-</div><div class='ctx'> 	targetPowerValT2[ALL_TARGET_LEGACY_6_24] =</div><div class='ctx'> 	    ar9003_hw_eeprom_get_tgt_pwr(ah, LEGACY_TARGET_RATE_6_24, freq,</div><div class='ctx'> 					 is2GHz);</div><div class='hunk'>@@ -4319,6 +4297,11 @@ static void ar9003_hw_set_target_power_eeprom(struct ath_hw *ah, u16 freq,</div><div class='ctx'> 	targetPowerValT2[ALL_TARGET_LEGACY_54] =</div><div class='ctx'> 	    ar9003_hw_eeprom_get_tgt_pwr(ah, LEGACY_TARGET_RATE_54, freq,</div><div class='ctx'> 					 is2GHz);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9003_hw_get_cck_target_powers(struct ath_hw *ah, u16 freq,</div><div class='add'>+					    u8 *targetPowerValT2)</div><div class='add'>+{</div><div class='ctx'> 	targetPowerValT2[ALL_TARGET_LEGACY_1L_5L] =</div><div class='ctx'> 	    ar9003_hw_eeprom_get_cck_tgt_pwr(ah, LEGACY_TARGET_RATE_1L_5L,</div><div class='ctx'> 					     freq);</div><div class='hunk'>@@ -4328,6 +4311,11 @@ static void ar9003_hw_set_target_power_eeprom(struct ath_hw *ah, u16 freq,</div><div class='ctx'> 	    ar9003_hw_eeprom_get_cck_tgt_pwr(ah, LEGACY_TARGET_RATE_11L, freq);</div><div class='ctx'> 	targetPowerValT2[ALL_TARGET_LEGACY_11S] =</div><div class='ctx'> 	    ar9003_hw_eeprom_get_cck_tgt_pwr(ah, LEGACY_TARGET_RATE_11S, freq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9003_hw_get_ht20_target_powers(struct ath_hw *ah, u16 freq,</div><div class='add'>+					     u8 *targetPowerValT2, bool is2GHz)</div><div class='add'>+{</div><div class='ctx'> 	targetPowerValT2[ALL_TARGET_HT20_0_8_16] =</div><div class='ctx'> 	    ar9003_hw_eeprom_get_ht20_tgt_pwr(ah, HT_TARGET_RATE_0_8_16, freq,</div><div class='ctx'> 					      is2GHz);</div><div class='hunk'>@@ -4370,6 +4358,16 @@ static void ar9003_hw_set_target_power_eeprom(struct ath_hw *ah, u16 freq,</div><div class='ctx'> 	targetPowerValT2[ALL_TARGET_HT20_23] =</div><div class='ctx'> 	    ar9003_hw_eeprom_get_ht20_tgt_pwr(ah, HT_TARGET_RATE_23, freq,</div><div class='ctx'> 					      is2GHz);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9003_hw_get_ht40_target_powers(struct ath_hw *ah,</div><div class='add'>+						   u16 freq,</div><div class='add'>+						   u8 *targetPowerValT2,</div><div class='add'>+						   bool is2GHz)</div><div class='add'>+{</div><div class='add'>+	/* XXX: hard code for now, need to get from eeprom struct */</div><div class='add'>+	u8 ht40PowerIncForPdadc = 0;</div><div class='add'>+</div><div class='ctx'> 	targetPowerValT2[ALL_TARGET_HT40_0_8_16] =</div><div class='ctx'> 	    ar9003_hw_eeprom_get_ht40_tgt_pwr(ah, HT_TARGET_RATE_0_8_16, freq,</div><div class='ctx'> 					      is2GHz) + ht40PowerIncForPdadc;</div><div class='hunk'>@@ -4413,6 +4411,26 @@ static void ar9003_hw_set_target_power_eeprom(struct ath_hw *ah, u16 freq,</div><div class='ctx'> 	targetPowerValT2[ALL_TARGET_HT40_23] =</div><div class='ctx'> 	    ar9003_hw_eeprom_get_ht40_tgt_pwr(ah, HT_TARGET_RATE_23, freq,</div><div class='ctx'> 					      is2GHz) + ht40PowerIncForPdadc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9003_hw_get_target_power_eeprom(struct ath_hw *ah,</div><div class='add'>+					      struct ath9k_channel *chan,</div><div class='add'>+					      u8 *targetPowerValT2)</div><div class='add'>+{</div><div class='add'>+	bool is2GHz = IS_CHAN_2GHZ(chan);</div><div class='add'>+	unsigned int i = 0;</div><div class='add'>+	struct ath_common *common = ath9k_hw_common(ah);</div><div class='add'>+	u16 freq = chan-&gt;channel;</div><div class='add'>+</div><div class='add'>+	if (is2GHz)</div><div class='add'>+		ar9003_hw_get_cck_target_powers(ah, freq, targetPowerValT2);</div><div class='add'>+</div><div class='add'>+	ar9003_hw_get_legacy_target_powers(ah, freq, targetPowerValT2, is2GHz);</div><div class='add'>+	ar9003_hw_get_ht20_target_powers(ah, freq, targetPowerValT2, is2GHz);</div><div class='add'>+</div><div class='add'>+	if (IS_CHAN_HT40(chan))</div><div class='add'>+		ar9003_hw_get_ht40_target_powers(ah, freq, targetPowerValT2,</div><div class='add'>+						 is2GHz);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ar9300RateSize; i++) {</div><div class='ctx'> 		ath_dbg(common, EEPROM, "TPC[%02d] 0x%08x\n",</div><div class='hunk'>@@ -4464,7 +4482,7 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah,</div><div class='ctx'> 		is2GHz = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*pfrequency = FBIN2FREQ(*pCalPier, is2GHz);</div><div class='add'>+	*pfrequency = ath9k_hw_fbin2freq(*pCalPier, is2GHz);</div><div class='ctx'> 	*pcorrection = pCalPierStruct-&gt;refPower;</div><div class='ctx'> 	*ptemperature = pCalPierStruct-&gt;tempMeas;</div><div class='ctx'> 	*pvoltage = pCalPierStruct-&gt;voltMeas;</div><div class='hunk'>@@ -4789,34 +4807,9 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,</div><div class='ctx'> 	bool is2ghz = IS_CHAN_2GHZ(chan);</div><div class='ctx'> </div><div class='ctx'> 	ath9k_hw_get_channel_centers(ah, chan, &amp;centers);</div><div class='del'>-	scaledPower = powerLimit - antenna_reduction;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Reduce scaled Power by number of chains active to get</div><div class='del'>-	 * to per chain tx power level</div><div class='del'>-	 */</div><div class='del'>-	switch (ar5416_get_ntxchains(ah-&gt;txchainmask)) {</div><div class='del'>-	case 1:</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		if (scaledPower &gt; REDUCE_SCALED_POWER_BY_TWO_CHAIN)</div><div class='del'>-			scaledPower -= REDUCE_SCALED_POWER_BY_TWO_CHAIN;</div><div class='del'>-		else</div><div class='del'>-			scaledPower = 0;</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-		if (scaledPower &gt; REDUCE_SCALED_POWER_BY_THREE_CHAIN)</div><div class='del'>-			scaledPower -= REDUCE_SCALED_POWER_BY_THREE_CHAIN;</div><div class='del'>-		else</div><div class='del'>-			scaledPower = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	scaledPower = ath9k_hw_get_scaled_power(ah, powerLimit,</div><div class='add'>+						antenna_reduction);</div><div class='ctx'> </div><div class='del'>-	scaledPower = max((u16)0, scaledPower);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Get target powers from EEPROM - our baseline for TX Power</div><div class='del'>-	 */</div><div class='ctx'> 	if (is2ghz) {</div><div class='ctx'> 		/* Setup for CTL modes */</div><div class='ctx'> 		/* CTL_11B, CTL_11G, CTL_2GHT20 */</div><div class='hunk'>@@ -4988,7 +4981,12 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,</div><div class='ctx'> 	unsigned int i = 0, paprd_scale_factor = 0;</div><div class='ctx'> 	u8 pwr_idx, min_pwridx = 0;</div><div class='ctx'> </div><div class='del'>-	ar9003_hw_set_target_power_eeprom(ah, chan-&gt;channel, targetPowerValT2);</div><div class='add'>+	memset(targetPowerValT2, 0 , sizeof(targetPowerValT2));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Get target powers from EEPROM - our baseline for TX Power</div><div class='add'>+	 */</div><div class='add'>+	ar9003_hw_get_target_power_eeprom(ah, chan, targetPowerValT2);</div><div class='ctx'> </div><div class='ctx'> 	if (ah-&gt;eep_ops-&gt;get_eeprom(ah, EEP_PAPRD)) {</div><div class='ctx'> 		if (IS_CHAN_2GHZ(chan))</div><div class='hunk'>@@ -5060,8 +5058,6 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,</div><div class='ctx'> 			i, targetPowerValT2[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ah-&gt;txpower_limit = regulatory-&gt;max_power_level;</div><div class='del'>-</div><div class='ctx'> 	/* Write target power array to registers */</div><div class='ctx'> 	ar9003_hw_tx_power_regwrite(ah, targetPowerValT2);</div><div class='ctx'> 	ar9003_hw_calibration_apply(ah, chan-&gt;channel);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h<br/>index bb223fe82816..8396d150ce01 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9003_eeprom.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_eeprom.h</a></div><div class='hunk'>@@ -42,7 +42,6 @@</div><div class='ctx'> #define AR9300_EEPMISC_WOW           0x02</div><div class='ctx'> #define AR9300_CUSTOMER_DATA_SIZE    20</div><div class='ctx'> </div><div class='del'>-#define FBIN2FREQ(x, y) ((y) ? (2300 + x) : (4800 + 5 * x))</div><div class='ctx'> #define AR9300_MAX_CHAINS            3</div><div class='ctx'> #define AR9300_ANT_16S               25</div><div class='ctx'> #define AR9300_FUTURE_MODAL_SZ       6</div><div class='hunk'>@@ -335,4 +334,7 @@ u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is_2ghz);</div><div class='ctx'> </div><div class='ctx'> unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah,</div><div class='ctx'> 					   struct ath9k_channel *chan);</div><div class='add'>+</div><div class='add'>+void ar9003_hw_internal_regulator_apply(struct ath_hw *ah);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c<br/>index 0f56e322dd3b..a0e3394b10dc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_hw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9003_hw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_hw.c</a></div><div class='hunk'>@@ -305,11 +305,6 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)</div><div class='ctx'> 				ar9462_common_rx_gain_table_2p0,</div><div class='ctx'> 				ARRAY_SIZE(ar9462_common_rx_gain_table_2p0), 2);</div><div class='ctx'> </div><div class='del'>-		INIT_INI_ARRAY(&amp;ah-&gt;ini_BTCOEX_MAX_TXPWR,</div><div class='del'>-				ar9462_2p0_BTCOEX_MAX_TXPWR_table,</div><div class='del'>-				ARRAY_SIZE(ar9462_2p0_BTCOEX_MAX_TXPWR_table),</div><div class='del'>-				2);</div><div class='del'>-</div><div class='ctx'> 		/* Awake -&gt; Sleep Setting */</div><div class='ctx'> 		INIT_INI_ARRAY(&amp;ah-&gt;iniPcieSerdes,</div><div class='ctx'> 				PCIE_PLL_ON_CREQ_DIS_L1_2P0,</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.c b/drivers/net/wireless/ath/ath9k/ar9003_mac.c<br/>index a66a13b76848..d9e0824af093 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_mac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9003_mac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_mac.c</a></div><div class='hunk'>@@ -306,6 +306,8 @@ static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)</div><div class='ctx'> 		ar9003_mci_get_isr(ah, masked);</div><div class='ctx'> </div><div class='ctx'> 	if (sync_cause) {</div><div class='add'>+		ath9k_debug_sync_cause(common, sync_cause);</div><div class='add'>+</div><div class='ctx'> 		if (sync_cause &amp; AR_INTR_SYNC_RADM_CPL_TIMEOUT) {</div><div class='ctx'> 			REG_WRITE(ah, AR_RC, AR_RC_HOSTIF);</div><div class='ctx'> 			REG_WRITE(ah, AR_RC, 0);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mci.c b/drivers/net/wireless/ath/ath9k/ar9003_mci.c<br/>index 3cac293a2849..ffbb180f91e1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_mci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9003_mci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_mci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_mci.c</a></div><div class='hunk'>@@ -756,7 +756,7 @@ int ar9003_mci_end_reset(struct ath_hw *ah, struct ath9k_channel *chan,</div><div class='ctx'> 		if (caldata) {</div><div class='ctx'> 			caldata-&gt;done_txiqcal_once = false;</div><div class='ctx'> 			caldata-&gt;done_txclcal_once = false;</div><div class='del'>-			caldata-&gt;rtt_hist.num_readings = 0;</div><div class='add'>+			caldata-&gt;rtt_done = false;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!ath9k_hw_init_cal(ah, chan))</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c<br/>index 59647a3ceb7f..3d400e8d6535 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_paprd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9003_paprd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_paprd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_paprd.c</a></div><div class='hunk'>@@ -54,7 +54,7 @@ void ar9003_paprd_enable(struct ath_hw *ah, bool val)</div><div class='ctx'> </div><div class='ctx'> 	if (val) {</div><div class='ctx'> 		ah-&gt;paprd_table_write_done = true;</div><div class='del'>-		ath9k_hw_apply_txpower(ah, chan);</div><div class='add'>+		ath9k_hw_apply_txpower(ah, chan, false);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B0,</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c<br/>index bc992b237ae5..11abb972be1f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9003_phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_phy.c</a></div><div class='hunk'>@@ -152,7 +152,6 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)</div><div class='ctx'> 	REG_WRITE(ah, AR_PHY_65NM_CH0_SYNTH7, reg32);</div><div class='ctx'> </div><div class='ctx'> 	ah-&gt;curchan = chan;</div><div class='del'>-	ah-&gt;curchan_rad_index = -1;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -209,11 +208,12 @@ static void ar9003_hw_spur_mitigate_mrc_cck(struct ath_hw *ah,</div><div class='ctx'> 			continue;</div><div class='ctx'> 		negative = 0;</div><div class='ctx'> 		if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah))</div><div class='del'>-			cur_bb_spur = FBIN2FREQ(spur_fbin_ptr[i],</div><div class='del'>-					IS_CHAN_2GHZ(chan)) - synth_freq;</div><div class='add'>+			cur_bb_spur = ath9k_hw_fbin2freq(spur_fbin_ptr[i],</div><div class='add'>+							 IS_CHAN_2GHZ(chan));</div><div class='ctx'> 		else</div><div class='del'>-			cur_bb_spur = spur_freq[i] - synth_freq;</div><div class='add'>+			cur_bb_spur = spur_freq[i];</div><div class='ctx'> </div><div class='add'>+		cur_bb_spur -= synth_freq;</div><div class='ctx'> 		if (cur_bb_spur &lt; 0) {</div><div class='ctx'> 			negative = 1;</div><div class='ctx'> 			cur_bb_spur = -cur_bb_spur;</div><div class='hunk'>@@ -373,7 +373,7 @@ static void ar9003_hw_spur_ofdm_work(struct ath_hw *ah,</div><div class='ctx'> 			else</div><div class='ctx'> 				spur_subchannel_sd = 0;</div><div class='ctx'> </div><div class='del'>-			spur_freq_sd = (freq_offset &lt;&lt; 9) / 11;</div><div class='add'>+			spur_freq_sd = ((freq_offset + 10) &lt;&lt; 9) / 11;</div><div class='ctx'> </div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (REG_READ_FIELD(ah, AR_PHY_GEN_CTRL,</div><div class='hunk'>@@ -382,7 +382,7 @@ static void ar9003_hw_spur_ofdm_work(struct ath_hw *ah,</div><div class='ctx'> 			else</div><div class='ctx'> 				spur_subchannel_sd = 1;</div><div class='ctx'> </div><div class='del'>-			spur_freq_sd = (freq_offset &lt;&lt; 9) / 11;</div><div class='add'>+			spur_freq_sd = ((freq_offset - 10) &lt;&lt; 9) / 11;</div><div class='ctx'> </div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -443,7 +443,8 @@ static void ar9003_hw_spur_mitigate_ofdm(struct ath_hw *ah,</div><div class='ctx'> 	ar9003_hw_spur_ofdm_clear(ah);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; AR_EEPROM_MODAL_SPURS &amp;&amp; spurChansPtr[i]; i++) {</div><div class='del'>-		freq_offset = FBIN2FREQ(spurChansPtr[i], mode) - synth_freq;</div><div class='add'>+		freq_offset = ath9k_hw_fbin2freq(spurChansPtr[i], mode);</div><div class='add'>+		freq_offset -= synth_freq;</div><div class='ctx'> 		if (abs(freq_offset) &lt; range) {</div><div class='ctx'> 			ar9003_hw_spur_ofdm_work(ah, chan, freq_offset);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -525,22 +526,10 @@ static void ar9003_hw_init_bb(struct ath_hw *ah,</div><div class='ctx'> 	 * Value is in 100ns increments.</div><div class='ctx'> 	 */</div><div class='ctx'> 	synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) &amp; AR_PHY_RX_DELAY_DELAY;</div><div class='del'>-	if (IS_CHAN_B(chan))</div><div class='del'>-		synthDelay = (4 * synthDelay) / 22;</div><div class='del'>-	else</div><div class='del'>-		synthDelay /= 10;</div><div class='ctx'> </div><div class='ctx'> 	/* Activate the PHY (includes baseband activate + synthesizer on) */</div><div class='ctx'> 	REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * There is an issue if the AP starts the calibration before</div><div class='del'>-	 * the base band timeout completes.  This could result in the</div><div class='del'>-	 * rx_clear false triggering.  As a workaround we add delay an</div><div class='del'>-	 * extra BASE_ACTIVATE_DELAY usecs to ensure this condition</div><div class='del'>-	 * does not happen.</div><div class='del'>-	 */</div><div class='del'>-	udelay(synthDelay + BASE_ACTIVATE_DELAY);</div><div class='add'>+	ath9k_hw_synth_delay(ah, chan, synthDelay);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)</div><div class='hunk'>@@ -684,9 +673,6 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,</div><div class='ctx'> </div><div class='ctx'> 	REG_WRITE_ARRAY(&amp;ah-&gt;iniAdditional, 1, regWrites);</div><div class='ctx'> </div><div class='del'>-	if (AR_SREV_9462(ah))</div><div class='del'>-		ar9003_hw_prog_ini(ah, &amp;ah-&gt;ini_BTCOEX_MAX_TXPWR, 1);</div><div class='del'>-</div><div class='ctx'> 	if (chan-&gt;channel == 2484)</div><div class='ctx'> 		ar9003_hw_prog_ini(ah, &amp;ah-&gt;ini_japan2484, 1);</div><div class='ctx'> </div><div class='hunk'>@@ -694,7 +680,7 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,</div><div class='ctx'> 	ar9003_hw_override_ini(ah);</div><div class='ctx'> 	ar9003_hw_set_channel_regs(ah, chan);</div><div class='ctx'> 	ar9003_hw_set_chain_masks(ah, ah-&gt;rxchainmask, ah-&gt;txchainmask);</div><div class='del'>-	ath9k_hw_apply_txpower(ah, chan);</div><div class='add'>+	ath9k_hw_apply_txpower(ah, chan, false);</div><div class='ctx'> </div><div class='ctx'> 	if (AR_SREV_9462(ah)) {</div><div class='ctx'> 		if (REG_READ_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_0,</div><div class='hunk'>@@ -725,6 +711,14 @@ static void ar9003_hw_set_rfmode(struct ath_hw *ah,</div><div class='ctx'> </div><div class='ctx'> 	if (IS_CHAN_A_FAST_CLOCK(ah, chan))</div><div class='ctx'> 		rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE);</div><div class='add'>+	if (IS_CHAN_QUARTER_RATE(chan))</div><div class='add'>+		rfMode |= AR_PHY_MODE_QUARTER;</div><div class='add'>+	if (IS_CHAN_HALF_RATE(chan))</div><div class='add'>+		rfMode |= AR_PHY_MODE_HALF;</div><div class='add'>+</div><div class='add'>+	if (rfMode &amp; (AR_PHY_MODE_QUARTER | AR_PHY_MODE_HALF))</div><div class='add'>+		REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL,</div><div class='add'>+			      AR_PHY_FRAME_CTL_CF_OVERLAP_WINDOW, 3);</div><div class='ctx'> </div><div class='ctx'> 	REG_WRITE(ah, AR_PHY_MODE, rfMode);</div><div class='ctx'> }</div><div class='hunk'>@@ -795,12 +789,8 @@ static bool ar9003_hw_rfbus_req(struct ath_hw *ah)</div><div class='ctx'> static void ar9003_hw_rfbus_done(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='ctx'> 	u32 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) &amp; AR_PHY_RX_DELAY_DELAY;</div><div class='del'>-	if (IS_CHAN_B(ah-&gt;curchan))</div><div class='del'>-		synthDelay = (4 * synthDelay) / 22;</div><div class='del'>-	else</div><div class='del'>-		synthDelay /= 10;</div><div class='ctx'> </div><div class='del'>-	udelay(synthDelay + BASE_ACTIVATE_DELAY);</div><div class='add'>+	ath9k_hw_synth_delay(ah, ah-&gt;curchan, synthDelay);</div><div class='ctx'> </div><div class='ctx'> 	REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);</div><div class='ctx'> }</div><div class='hunk'>@@ -823,55 +813,6 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,</div><div class='ctx'> 		 * on == 0 means more noise imm</div><div class='ctx'> 		 */</div><div class='ctx'> 		u32 on = param ? 1 : 0;</div><div class='del'>-		/*</div><div class='del'>-		 * make register setting for default</div><div class='del'>-		 * (weak sig detect ON) come from INI file</div><div class='del'>-		 */</div><div class='del'>-		int m1ThreshLow = on ?</div><div class='del'>-			aniState-&gt;iniDef.m1ThreshLow : m1ThreshLow_off;</div><div class='del'>-		int m2ThreshLow = on ?</div><div class='del'>-			aniState-&gt;iniDef.m2ThreshLow : m2ThreshLow_off;</div><div class='del'>-		int m1Thresh = on ?</div><div class='del'>-			aniState-&gt;iniDef.m1Thresh : m1Thresh_off;</div><div class='del'>-		int m2Thresh = on ?</div><div class='del'>-			aniState-&gt;iniDef.m2Thresh : m2Thresh_off;</div><div class='del'>-		int m2CountThr = on ?</div><div class='del'>-			aniState-&gt;iniDef.m2CountThr : m2CountThr_off;</div><div class='del'>-		int m2CountThrLow = on ?</div><div class='del'>-			aniState-&gt;iniDef.m2CountThrLow : m2CountThrLow_off;</div><div class='del'>-		int m1ThreshLowExt = on ?</div><div class='del'>-			aniState-&gt;iniDef.m1ThreshLowExt : m1ThreshLowExt_off;</div><div class='del'>-		int m2ThreshLowExt = on ?</div><div class='del'>-			aniState-&gt;iniDef.m2ThreshLowExt : m2ThreshLowExt_off;</div><div class='del'>-		int m1ThreshExt = on ?</div><div class='del'>-			aniState-&gt;iniDef.m1ThreshExt : m1ThreshExt_off;</div><div class='del'>-		int m2ThreshExt = on ?</div><div class='del'>-			aniState-&gt;iniDef.m2ThreshExt : m2ThreshExt_off;</div><div class='del'>-</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,</div><div class='del'>-			      AR_PHY_SFCORR_LOW_M1_THRESH_LOW,</div><div class='del'>-			      m1ThreshLow);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,</div><div class='del'>-			      AR_PHY_SFCORR_LOW_M2_THRESH_LOW,</div><div class='del'>-			      m2ThreshLow);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR,</div><div class='del'>-			      AR_PHY_SFCORR_M1_THRESH, m1Thresh);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR,</div><div class='del'>-			      AR_PHY_SFCORR_M2_THRESH, m2Thresh);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR,</div><div class='del'>-			      AR_PHY_SFCORR_M2COUNT_THR, m2CountThr);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,</div><div class='del'>-			      AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW,</div><div class='del'>-			      m2CountThrLow);</div><div class='del'>-</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,</div><div class='del'>-			      AR_PHY_SFCORR_EXT_M1_THRESH_LOW, m1ThreshLowExt);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,</div><div class='del'>-			      AR_PHY_SFCORR_EXT_M2_THRESH_LOW, m2ThreshLowExt);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,</div><div class='del'>-			      AR_PHY_SFCORR_EXT_M1_THRESH, m1ThreshExt);</div><div class='del'>-		REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,</div><div class='del'>-			      AR_PHY_SFCORR_EXT_M2_THRESH, m2ThreshExt);</div><div class='ctx'> </div><div class='ctx'> 		if (on)</div><div class='ctx'> 			REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h<br/>index d834d97fe727..7268a48a92a1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_phy.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9003_phy.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_phy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_phy.h</a></div><div class='hunk'>@@ -468,6 +468,9 @@</div><div class='ctx'> #define AR_PHY_ADDAC_PARA_CTL    (AR_SM_BASE + 0x150)</div><div class='ctx'> #define AR_PHY_XPA_CFG           (AR_SM_BASE + 0x158)</div><div class='ctx'> </div><div class='add'>+#define AR_PHY_FRAME_CTL_CF_OVERLAP_WINDOW  3</div><div class='add'>+#define AR_PHY_FRAME_CTL_CF_OVERLAP_WINDOW_S    0</div><div class='add'>+</div><div class='ctx'> #define AR_PHY_SPUR_MASK_A_CF_PUNC_MASK_IDX_A           0x0001FC00</div><div class='ctx'> #define AR_PHY_SPUR_MASK_A_CF_PUNC_MASK_IDX_A_S         10</div><div class='ctx'> #define AR_PHY_SPUR_MASK_A_CF_PUNC_MASK_A                       0x3FF</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9003_rtt.c b/drivers/net/wireless/ath/ath9k/ar9003_rtt.c<br/>index 458bedf0b0ae..74de3539c2c8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_rtt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9003_rtt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_rtt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_rtt.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "hw.h"</div><div class='add'>+#include "hw-ops.h"</div><div class='ctx'> #include "ar9003_phy.h"</div><div class='ctx'> #include "ar9003_rtt.h"</div><div class='ctx'> </div><div class='hunk'>@@ -69,7 +70,7 @@ bool ar9003_hw_rtt_force_restore(struct ath_hw *ah)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ar9003_hw_rtt_load_hist_entry(struct ath_hw *ah, u8 chain,</div><div class='del'>-		u32 index, u32 data28)</div><div class='add'>+					  u32 index, u32 data28)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -100,12 +101,21 @@ static void ar9003_hw_rtt_load_hist_entry(struct ath_hw *ah, u8 chain,</div><div class='ctx'> 		      RTT_ACCESS_TIMEOUT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ar9003_hw_rtt_load_hist(struct ath_hw *ah, u8 chain, u32 *table)</div><div class='add'>+void ar9003_hw_rtt_load_hist(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	int chain, i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MAX_RTT_TABLE_ENTRY; i++)</div><div class='del'>-		ar9003_hw_rtt_load_hist_entry(ah, chain, i, table[i]);</div><div class='add'>+	for (chain = 0; chain &lt; AR9300_MAX_CHAINS; chain++) {</div><div class='add'>+		if (!(ah-&gt;rxchainmask &amp; (1 &lt;&lt; chain)))</div><div class='add'>+			continue;</div><div class='add'>+		for (i = 0; i &lt; MAX_RTT_TABLE_ENTRY; i++) {</div><div class='add'>+			ar9003_hw_rtt_load_hist_entry(ah, chain, i,</div><div class='add'>+					      ah-&gt;caldata-&gt;rtt_table[chain][i]);</div><div class='add'>+			ath_dbg(ath9k_hw_common(ah), CALIBRATE,</div><div class='add'>+				"Load RTT value at idx %d, chain %d: 0x%x\n",</div><div class='add'>+				i, chain, ah-&gt;caldata-&gt;rtt_table[chain][i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ar9003_hw_rtt_fill_hist_entry(struct ath_hw *ah, u8 chain, u32 index)</div><div class='hunk'>@@ -128,27 +138,71 @@ static int ar9003_hw_rtt_fill_hist_entry(struct ath_hw *ah, u8 chain, u32 index)</div><div class='ctx'> 			   RTT_ACCESS_TIMEOUT))</div><div class='ctx'> 		return RTT_BAD_VALUE;</div><div class='ctx'> </div><div class='del'>-	val = REG_READ(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain));</div><div class='add'>+	val = MS(REG_READ(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain)),</div><div class='add'>+		 AR_PHY_RTT_SW_RTT_TABLE_DATA);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ar9003_hw_rtt_fill_hist(struct ath_hw *ah, u8 chain, u32 *table)</div><div class='add'>+void ar9003_hw_rtt_fill_hist(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	int chain, i;</div><div class='add'>+</div><div class='add'>+	for (chain = 0; chain &lt; AR9300_MAX_CHAINS; chain++) {</div><div class='add'>+		if (!(ah-&gt;rxchainmask &amp; (1 &lt;&lt; chain)))</div><div class='add'>+			continue;</div><div class='add'>+		for (i = 0; i &lt; MAX_RTT_TABLE_ENTRY; i++) {</div><div class='add'>+			ah-&gt;caldata-&gt;rtt_table[chain][i] =</div><div class='add'>+				ar9003_hw_rtt_fill_hist_entry(ah, chain, i);</div><div class='add'>+			ath_dbg(ath9k_hw_common(ah), CALIBRATE,</div><div class='add'>+				"RTT value at idx %d, chain %d is: 0x%x\n",</div><div class='add'>+				i, chain, ah-&gt;caldata-&gt;rtt_table[chain][i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MAX_RTT_TABLE_ENTRY; i++)</div><div class='del'>-		table[i] = ar9003_hw_rtt_fill_hist_entry(ah, chain, i);</div><div class='add'>+	ah-&gt;caldata-&gt;rtt_done = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ar9003_hw_rtt_clear_hist(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='del'>-	int i, j;</div><div class='add'>+	int chain, i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; AR9300_MAX_CHAINS; i++) {</div><div class='del'>-		if (!(ah-&gt;rxchainmask &amp; (1 &lt;&lt; i)))</div><div class='add'>+	for (chain = 0; chain &lt; AR9300_MAX_CHAINS; chain++) {</div><div class='add'>+		if (!(ah-&gt;rxchainmask &amp; (1 &lt;&lt; chain)))</div><div class='ctx'> 			continue;</div><div class='del'>-		for (j = 0; j &lt; MAX_RTT_TABLE_ENTRY; j++)</div><div class='del'>-			ar9003_hw_rtt_load_hist_entry(ah, i, j, 0);</div><div class='add'>+		for (i = 0; i &lt; MAX_RTT_TABLE_ENTRY; i++)</div><div class='add'>+			ar9003_hw_rtt_load_hist_entry(ah, chain, i, 0);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (ah-&gt;caldata)</div><div class='add'>+		ah-&gt;caldata-&gt;rtt_done = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan)</div><div class='add'>+{</div><div class='add'>+	bool restore;</div><div class='add'>+</div><div class='add'>+	if (!ah-&gt;caldata)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!ah-&gt;caldata-&gt;rtt_done)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	ar9003_hw_rtt_enable(ah);</div><div class='add'>+	ar9003_hw_rtt_set_mask(ah, 0x10);</div><div class='add'>+</div><div class='add'>+	if (!ath9k_hw_rfbus_req(ah)) {</div><div class='add'>+		ath_err(ath9k_hw_common(ah), "Could not stop baseband\n");</div><div class='add'>+		restore = false;</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ar9003_hw_rtt_load_hist(ah);</div><div class='add'>+	restore = ar9003_hw_rtt_force_restore(ah);</div><div class='add'>+</div><div class='add'>+fail:</div><div class='add'>+	ath9k_hw_rfbus_done(ah);</div><div class='add'>+	ar9003_hw_rtt_disable(ah);</div><div class='add'>+	return restore;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9003_rtt.h b/drivers/net/wireless/ath/ath9k/ar9003_rtt.h<br/>index 030758d087d6..a43b30d723a4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_rtt.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9003_rtt.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9003_rtt.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9003_rtt.h</a></div><div class='hunk'>@@ -21,8 +21,9 @@ void ar9003_hw_rtt_enable(struct ath_hw *ah);</div><div class='ctx'> void ar9003_hw_rtt_disable(struct ath_hw *ah);</div><div class='ctx'> void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask);</div><div class='ctx'> bool ar9003_hw_rtt_force_restore(struct ath_hw *ah);</div><div class='del'>-void ar9003_hw_rtt_load_hist(struct ath_hw *ah, u8 chain, u32 *table);</div><div class='del'>-void ar9003_hw_rtt_fill_hist(struct ath_hw *ah, u8 chain, u32 *table);</div><div class='add'>+void ar9003_hw_rtt_load_hist(struct ath_hw *ah);</div><div class='add'>+void ar9003_hw_rtt_fill_hist(struct ath_hw *ah);</div><div class='ctx'> void ar9003_hw_rtt_clear_hist(struct ath_hw *ah);</div><div class='add'>+bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h b/drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h<br/>index f11d9b2677fd..1bd3a3d22101 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2011 Atheros Communications Inc.</div><div class='add'>+ * Copyright (c) 2010-2011 Atheros Communications Inc.</div><div class='add'>+ * Copyright (c) 2011-2012 Qualcomm Atheros Inc.</div><div class='ctx'>  *</div><div class='ctx'>  * Permission to use, copy, modify, and/or distribute this software for any</div><div class='ctx'>  * purpose with or without fee is hereby granted, provided that the above</div><div class='hunk'>@@ -18,7 +19,7 @@</div><div class='ctx'> #define INITVALS_9330_1P1_H</div><div class='ctx'> </div><div class='ctx'> static const u32 ar9331_1p1_baseband_postamble[][5] = {</div><div class='del'>-	/*  Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20  */</div><div class='add'>+	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */</div><div class='ctx'> 	{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8005, 0xd00a8005},</div><div class='ctx'> 	{0x00009820, 0x206a002e, 0x206a002e, 0x206a002e, 0x206a002e},</div><div class='ctx'> 	{0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},</div><div class='hunk'>@@ -27,10 +28,10 @@ static const u32 ar9331_1p1_baseband_postamble[][5] = {</div><div class='ctx'> 	{0x00009830, 0x0000059c, 0x0000059c, 0x0000059c, 0x0000059c},</div><div class='ctx'> 	{0x00009c00, 0x00000044, 0x00000044, 0x00000044, 0x00000044},</div><div class='ctx'> 	{0x00009e00, 0x0372161e, 0x0372161e, 0x037216a4, 0x037216a4},</div><div class='del'>-	{0x00009e04, 0x00182020, 0x00182020, 0x00182020, 0x00182020},</div><div class='add'>+	{0x00009e04, 0x00202020, 0x00202020, 0x00202020, 0x00202020},</div><div class='ctx'> 	{0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},</div><div class='ctx'> 	{0x00009e10, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e},</div><div class='del'>-	{0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e},</div><div class='add'>+	{0x00009e14, 0x31365d5e, 0x3136605e, 0x3136605e, 0x31365d5e},</div><div class='ctx'> 	{0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},</div><div class='ctx'> 	{0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},</div><div class='ctx'> 	{0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},</div><div class='hunk'>@@ -55,7 +56,7 @@ static const u32 ar9331_1p1_baseband_postamble[][5] = {</div><div class='ctx'> 	{0x0000a288, 0x00000000, 0x00000000, 0x00000000, 0x00000000},</div><div class='ctx'> 	{0x0000a28c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},</div><div class='ctx'> 	{0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},</div><div class='del'>-	{0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071981},</div><div class='add'>+	{0x0000a2d0, 0x00071982, 0x00071982, 0x00071982, 0x00071982},</div><div class='ctx'> 	{0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},</div><div class='ctx'> 	{0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},</div><div class='ctx'> 	{0x0000ae04, 0x00802020, 0x00802020, 0x00802020, 0x00802020},</div><div class='hunk'>@@ -63,7 +64,7 @@ static const u32 ar9331_1p1_baseband_postamble[][5] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const u32 ar9331_modes_lowest_ob_db_tx_gain_1p1[][5] = {</div><div class='del'>-	/*   Addr     5G_HT20     5G_HT40     2G_HT40     2G_HT20  */</div><div class='add'>+	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */</div><div class='ctx'> 	{0x0000a2d8, 0x7999a83a, 0x7999a83a, 0x7999a83a, 0x7999a83a},</div><div class='ctx'> 	{0x0000a2dc, 0xffff2a52, 0xffff2a52, 0xffff2a52, 0xffff2a52},</div><div class='ctx'> 	{0x0000a2e0, 0xffffcc84, 0xffffcc84, 0xffffcc84, 0xffffcc84},</div><div class='hunk'>@@ -155,7 +156,7 @@ static const u32 ar9331_modes_lowest_ob_db_tx_gain_1p1[][5] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const u32 ar9331_modes_high_ob_db_tx_gain_1p1[][5] = {</div><div class='del'>-	/*   Addr     5G_HT20     5G_HT40     2G_HT40     2G_HT20  */</div><div class='add'>+	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */</div><div class='ctx'> 	{0x0000a2d8, 0x7999a83a, 0x7999a83a, 0x7999a83a, 0x7999a83a},</div><div class='ctx'> 	{0x0000a2dc, 0xffaa9a52, 0xffaa9a52, 0xffaa9a52, 0xffaa9a52},</div><div class='ctx'> 	{0x0000a2e0, 0xffb31c84, 0xffb31c84, 0xffb31c84, 0xffb31c84},</div><div class='hunk'>@@ -245,7 +246,7 @@ static const u32 ar9331_modes_high_ob_db_tx_gain_1p1[][5] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const u32 ar9331_modes_low_ob_db_tx_gain_1p1[][5] = {</div><div class='del'>-	/*   Addr     5G_HT20     5G_HT40     2G_HT40     2G_HT20  */</div><div class='add'>+	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */</div><div class='ctx'> 	{0x0000a2d8, 0x7999a83a, 0x7999a83a, 0x7999a83a, 0x7999a83a},</div><div class='ctx'> 	{0x0000a2dc, 0xffff2a52, 0xffff2a52, 0xffff2a52, 0xffff2a52},</div><div class='ctx'> 	{0x0000a2e0, 0xffffcc84, 0xffffcc84, 0xffffcc84, 0xffffcc84},</div><div class='hunk'>@@ -377,14 +378,14 @@ static const u32 ar9331_1p1_radio_core[][2] = {</div><div class='ctx'> 	{0x000160b4, 0x92480040},</div><div class='ctx'> 	{0x000160c0, 0x006db6db},</div><div class='ctx'> 	{0x000160c4, 0x0186db60},</div><div class='del'>-	{0x000160c8, 0x6db6db6c},</div><div class='add'>+	{0x000160c8, 0x6db4db6c},</div><div class='ctx'> 	{0x000160cc, 0x6de6c300},</div><div class='ctx'> 	{0x000160d0, 0x14500820},</div><div class='ctx'> 	{0x00016100, 0x04cb0001},</div><div class='ctx'> 	{0x00016104, 0xfff80015},</div><div class='ctx'> 	{0x00016108, 0x00080010},</div><div class='ctx'> 	{0x0001610c, 0x00170000},</div><div class='del'>-	{0x00016140, 0x10804000},</div><div class='add'>+	{0x00016140, 0x10800000},</div><div class='ctx'> 	{0x00016144, 0x01884080},</div><div class='ctx'> 	{0x00016148, 0x000080c0},</div><div class='ctx'> 	{0x00016280, 0x01000015},</div><div class='hunk'>@@ -417,7 +418,7 @@ static const u32 ar9331_1p1_radio_core[][2] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const u32 ar9331_1p1_soc_postamble[][5] = {</div><div class='del'>-	/*  Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20  */</div><div class='add'>+	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */</div><div class='ctx'> 	{0x00007010, 0x00000022, 0x00000022, 0x00000022, 0x00000022},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -691,7 +692,7 @@ static const u32 ar9331_1p1_baseband_core[][2] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const u32 ar9331_modes_high_power_tx_gain_1p1[][5] = {</div><div class='del'>-	/*  Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20  */</div><div class='add'>+	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */</div><div class='ctx'> 	{0x0000a2d8, 0x7999a83a, 0x7999a83a, 0x7999a83a, 0x7999a83a},</div><div class='ctx'> 	{0x0000a2dc, 0xffff2a52, 0xffff2a52, 0xffff2a52, 0xffff2a52},</div><div class='ctx'> 	{0x0000a2e0, 0xffffcc84, 0xffffcc84, 0xffffcc84, 0xffffcc84},</div><div class='hunk'>@@ -783,7 +784,7 @@ static const u32 ar9331_modes_high_power_tx_gain_1p1[][5] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const u32 ar9331_1p1_mac_postamble[][5] = {</div><div class='del'>-	/*  Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20  */</div><div class='add'>+	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */</div><div class='ctx'> 	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},</div><div class='ctx'> 	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},</div><div class='ctx'> 	{0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},</div><div class='hunk'>@@ -973,26 +974,27 @@ static const u32 ar9331_1p1_mac_core[][2] = {</div><div class='ctx'> </div><div class='ctx'> static const u32 ar9331_common_rx_gain_1p1[][2] = {</div><div class='ctx'> 	/* Addr      allmodes  */</div><div class='del'>-	{0x0000a000, 0x00010000},</div><div class='del'>-	{0x0000a004, 0x00030002},</div><div class='del'>-	{0x0000a008, 0x00050004},</div><div class='del'>-	{0x0000a00c, 0x00810080},</div><div class='del'>-	{0x0000a010, 0x00830082},</div><div class='del'>-	{0x0000a014, 0x01810180},</div><div class='del'>-	{0x0000a018, 0x01830182},</div><div class='del'>-	{0x0000a01c, 0x01850184},</div><div class='del'>-	{0x0000a020, 0x01890188},</div><div class='del'>-	{0x0000a024, 0x018b018a},</div><div class='del'>-	{0x0000a028, 0x018d018c},</div><div class='del'>-	{0x0000a02c, 0x01910190},</div><div class='del'>-	{0x0000a030, 0x01930192},</div><div class='del'>-	{0x0000a034, 0x01950194},</div><div class='del'>-	{0x0000a038, 0x038a0196},</div><div class='del'>-	{0x0000a03c, 0x038c038b},</div><div class='del'>-	{0x0000a040, 0x0390038d},</div><div class='del'>-	{0x0000a044, 0x03920391},</div><div class='del'>-	{0x0000a048, 0x03940393},</div><div class='del'>-	{0x0000a04c, 0x03960395},</div><div class='add'>+	{0x00009e18, 0x05000000},</div><div class='add'>+	{0x0000a000, 0x00060005},</div><div class='add'>+	{0x0000a004, 0x00810080},</div><div class='add'>+	{0x0000a008, 0x00830082},</div><div class='add'>+	{0x0000a00c, 0x00850084},</div><div class='add'>+	{0x0000a010, 0x01820181},</div><div class='add'>+	{0x0000a014, 0x01840183},</div><div class='add'>+	{0x0000a018, 0x01880185},</div><div class='add'>+	{0x0000a01c, 0x018a0189},</div><div class='add'>+	{0x0000a020, 0x02850284},</div><div class='add'>+	{0x0000a024, 0x02890288},</div><div class='add'>+	{0x0000a028, 0x028b028a},</div><div class='add'>+	{0x0000a02c, 0x03850384},</div><div class='add'>+	{0x0000a030, 0x03890388},</div><div class='add'>+	{0x0000a034, 0x038b038a},</div><div class='add'>+	{0x0000a038, 0x038d038c},</div><div class='add'>+	{0x0000a03c, 0x03910390},</div><div class='add'>+	{0x0000a040, 0x03930392},</div><div class='add'>+	{0x0000a044, 0x03950394},</div><div class='add'>+	{0x0000a048, 0x00000396},</div><div class='add'>+	{0x0000a04c, 0x00000000},</div><div class='ctx'> 	{0x0000a050, 0x00000000},</div><div class='ctx'> 	{0x0000a054, 0x00000000},</div><div class='ctx'> 	{0x0000a058, 0x00000000},</div><div class='hunk'>@@ -1005,15 +1007,15 @@ static const u32 ar9331_common_rx_gain_1p1[][2] = {</div><div class='ctx'> 	{0x0000a074, 0x00000000},</div><div class='ctx'> 	{0x0000a078, 0x00000000},</div><div class='ctx'> 	{0x0000a07c, 0x00000000},</div><div class='del'>-	{0x0000a080, 0x22222229},</div><div class='del'>-	{0x0000a084, 0x1d1d1d1d},</div><div class='del'>-	{0x0000a088, 0x1d1d1d1d},</div><div class='del'>-	{0x0000a08c, 0x1d1d1d1d},</div><div class='del'>-	{0x0000a090, 0x171d1d1d},</div><div class='del'>-	{0x0000a094, 0x11111717},</div><div class='del'>-	{0x0000a098, 0x00030311},</div><div class='del'>-	{0x0000a09c, 0x00000000},</div><div class='del'>-	{0x0000a0a0, 0x00000000},</div><div class='add'>+	{0x0000a080, 0x28282828},</div><div class='add'>+	{0x0000a084, 0x28282828},</div><div class='add'>+	{0x0000a088, 0x28282828},</div><div class='add'>+	{0x0000a08c, 0x28282828},</div><div class='add'>+	{0x0000a090, 0x28282828},</div><div class='add'>+	{0x0000a094, 0x24242428},</div><div class='add'>+	{0x0000a098, 0x171e1e1e},</div><div class='add'>+	{0x0000a09c, 0x02020b0b},</div><div class='add'>+	{0x0000a0a0, 0x02020202},</div><div class='ctx'> 	{0x0000a0a4, 0x00000000},</div><div class='ctx'> 	{0x0000a0a8, 0x00000000},</div><div class='ctx'> 	{0x0000a0ac, 0x00000000},</div><div class='hunk'>@@ -1021,27 +1023,27 @@ static const u32 ar9331_common_rx_gain_1p1[][2] = {</div><div class='ctx'> 	{0x0000a0b4, 0x00000000},</div><div class='ctx'> 	{0x0000a0b8, 0x00000000},</div><div class='ctx'> 	{0x0000a0bc, 0x00000000},</div><div class='del'>-	{0x0000a0c0, 0x001f0000},</div><div class='del'>-	{0x0000a0c4, 0x01000101},</div><div class='del'>-	{0x0000a0c8, 0x011e011f},</div><div class='del'>-	{0x0000a0cc, 0x011c011d},</div><div class='del'>-	{0x0000a0d0, 0x02030204},</div><div class='del'>-	{0x0000a0d4, 0x02010202},</div><div class='del'>-	{0x0000a0d8, 0x021f0200},</div><div class='del'>-	{0x0000a0dc, 0x0302021e},</div><div class='del'>-	{0x0000a0e0, 0x03000301},</div><div class='del'>-	{0x0000a0e4, 0x031e031f},</div><div class='del'>-	{0x0000a0e8, 0x0402031d},</div><div class='del'>-	{0x0000a0ec, 0x04000401},</div><div class='del'>-	{0x0000a0f0, 0x041e041f},</div><div class='del'>-	{0x0000a0f4, 0x0502041d},</div><div class='del'>-	{0x0000a0f8, 0x05000501},</div><div class='del'>-	{0x0000a0fc, 0x051e051f},</div><div class='del'>-	{0x0000a100, 0x06010602},</div><div class='del'>-	{0x0000a104, 0x061f0600},</div><div class='del'>-	{0x0000a108, 0x061d061e},</div><div class='del'>-	{0x0000a10c, 0x07020703},</div><div class='del'>-	{0x0000a110, 0x07000701},</div><div class='add'>+	{0x0000a0c0, 0x22072208},</div><div class='add'>+	{0x0000a0c4, 0x22052206},</div><div class='add'>+	{0x0000a0c8, 0x22032204},</div><div class='add'>+	{0x0000a0cc, 0x22012202},</div><div class='add'>+	{0x0000a0d0, 0x221f2200},</div><div class='add'>+	{0x0000a0d4, 0x221d221e},</div><div class='add'>+	{0x0000a0d8, 0x33023303},</div><div class='add'>+	{0x0000a0dc, 0x33003301},</div><div class='add'>+	{0x0000a0e0, 0x331e331f},</div><div class='add'>+	{0x0000a0e4, 0x4402331d},</div><div class='add'>+	{0x0000a0e8, 0x44004401},</div><div class='add'>+	{0x0000a0ec, 0x441e441f},</div><div class='add'>+	{0x0000a0f0, 0x55025503},</div><div class='add'>+	{0x0000a0f4, 0x55005501},</div><div class='add'>+	{0x0000a0f8, 0x551e551f},</div><div class='add'>+	{0x0000a0fc, 0x6602551d},</div><div class='add'>+	{0x0000a100, 0x66006601},</div><div class='add'>+	{0x0000a104, 0x661e661f},</div><div class='add'>+	{0x0000a108, 0x7703661d},</div><div class='add'>+	{0x0000a10c, 0x77017702},</div><div class='add'>+	{0x0000a110, 0x00007700},</div><div class='ctx'> 	{0x0000a114, 0x00000000},</div><div class='ctx'> 	{0x0000a118, 0x00000000},</div><div class='ctx'> 	{0x0000a11c, 0x00000000},</div><div class='hunk'>@@ -1054,26 +1056,26 @@ static const u32 ar9331_common_rx_gain_1p1[][2] = {</div><div class='ctx'> 	{0x0000a138, 0x00000000},</div><div class='ctx'> 	{0x0000a13c, 0x00000000},</div><div class='ctx'> 	{0x0000a140, 0x001f0000},</div><div class='del'>-	{0x0000a144, 0x01000101},</div><div class='del'>-	{0x0000a148, 0x011e011f},</div><div class='del'>-	{0x0000a14c, 0x011c011d},</div><div class='del'>-	{0x0000a150, 0x02030204},</div><div class='del'>-	{0x0000a154, 0x02010202},</div><div class='del'>-	{0x0000a158, 0x021f0200},</div><div class='del'>-	{0x0000a15c, 0x0302021e},</div><div class='del'>-	{0x0000a160, 0x03000301},</div><div class='del'>-	{0x0000a164, 0x031e031f},</div><div class='del'>-	{0x0000a168, 0x0402031d},</div><div class='del'>-	{0x0000a16c, 0x04000401},</div><div class='del'>-	{0x0000a170, 0x041e041f},</div><div class='del'>-	{0x0000a174, 0x0502041d},</div><div class='del'>-	{0x0000a178, 0x05000501},</div><div class='del'>-	{0x0000a17c, 0x051e051f},</div><div class='del'>-	{0x0000a180, 0x06010602},</div><div class='del'>-	{0x0000a184, 0x061f0600},</div><div class='del'>-	{0x0000a188, 0x061d061e},</div><div class='del'>-	{0x0000a18c, 0x07020703},</div><div class='del'>-	{0x0000a190, 0x07000701},</div><div class='add'>+	{0x0000a144, 0x111f1100},</div><div class='add'>+	{0x0000a148, 0x111d111e},</div><div class='add'>+	{0x0000a14c, 0x111b111c},</div><div class='add'>+	{0x0000a150, 0x22032204},</div><div class='add'>+	{0x0000a154, 0x22012202},</div><div class='add'>+	{0x0000a158, 0x221f2200},</div><div class='add'>+	{0x0000a15c, 0x221d221e},</div><div class='add'>+	{0x0000a160, 0x33013302},</div><div class='add'>+	{0x0000a164, 0x331f3300},</div><div class='add'>+	{0x0000a168, 0x4402331e},</div><div class='add'>+	{0x0000a16c, 0x44004401},</div><div class='add'>+	{0x0000a170, 0x441e441f},</div><div class='add'>+	{0x0000a174, 0x55015502},</div><div class='add'>+	{0x0000a178, 0x551f5500},</div><div class='add'>+	{0x0000a17c, 0x6602551e},</div><div class='add'>+	{0x0000a180, 0x66006601},</div><div class='add'>+	{0x0000a184, 0x661e661f},</div><div class='add'>+	{0x0000a188, 0x7703661d},</div><div class='add'>+	{0x0000a18c, 0x77017702},</div><div class='add'>+	{0x0000a190, 0x00007700},</div><div class='ctx'> 	{0x0000a194, 0x00000000},</div><div class='ctx'> 	{0x0000a198, 0x00000000},</div><div class='ctx'> 	{0x0000a19c, 0x00000000},</div><div class='hunk'>@@ -1100,14 +1102,14 @@ static const u32 ar9331_common_rx_gain_1p1[][2] = {</div><div class='ctx'> 	{0x0000a1f0, 0x00000396},</div><div class='ctx'> 	{0x0000a1f4, 0x00000396},</div><div class='ctx'> 	{0x0000a1f8, 0x00000396},</div><div class='del'>-	{0x0000a1fc, 0x00000196},</div><div class='add'>+	{0x0000a1fc, 0x00000296},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const u32 ar9331_common_tx_gain_offset1_1[][1] = {</div><div class='del'>-	{0},</div><div class='del'>-	{3},</div><div class='del'>-	{0},</div><div class='del'>-	{0},</div><div class='add'>+	{0x00000000},</div><div class='add'>+	{0x00000003},</div><div class='add'>+	{0x00000000},</div><div class='add'>+	{0x00000000},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const u32 ar9331_1p1_chansel_xtal_25M[] = {</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h b/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h<br/>index b6ba1e8149be..1d6658e139b5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h</a></div><div class='hunk'>@@ -1115,9 +1115,9 @@ static const u32 ar9462_2p0_mac_core[][2] = {</div><div class='ctx'> 	{0x000081f8, 0x00000000},</div><div class='ctx'> 	{0x000081fc, 0x00000000},</div><div class='ctx'> 	{0x00008240, 0x00100000},</div><div class='del'>-	{0x00008244, 0x0010f400},</div><div class='add'>+	{0x00008244, 0x0010f424},</div><div class='ctx'> 	{0x00008248, 0x00000800},</div><div class='del'>-	{0x0000824c, 0x0001e800},</div><div class='add'>+	{0x0000824c, 0x0001e848},</div><div class='ctx'> 	{0x00008250, 0x00000000},</div><div class='ctx'> 	{0x00008254, 0x00000000},</div><div class='ctx'> 	{0x00008258, 0x00000000},</div><div class='hunk'>@@ -1448,16 +1448,4 @@ static const u32 ar9462_common_mixed_rx_gain_table_2p0[][2] = {</div><div class='ctx'> 	{0x0000b1fc, 0x00000196},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const u32 ar9462_2p0_BTCOEX_MAX_TXPWR_table[][2] = {</div><div class='del'>-	/* Addr      allmodes  */</div><div class='del'>-	{0x000018c0, 0x10101010},</div><div class='del'>-	{0x000018c4, 0x10101010},</div><div class='del'>-	{0x000018c8, 0x10101010},</div><div class='del'>-	{0x000018cc, 0x10101010},</div><div class='del'>-	{0x000018d0, 0x10101010},</div><div class='del'>-	{0x000018d4, 0x10101010},</div><div class='del'>-	{0x000018d8, 0x10101010},</div><div class='del'>-	{0x000018dc, 0x10101010},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #endif /* INITVALS_9462_2P0_H */</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h<br/>index 8c84049682ab..a277cf6f339d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ath9k.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/ath9k.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/ath9k.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/ath9k.h</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include "mci.h"</div><div class='add'>+#include "dfs.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Header for the ath9k.ko driver core *only* -- hw code nor any other driver</div><div class='hunk'>@@ -369,7 +370,7 @@ struct ath_vif {</div><div class='ctx'>  * number of beacon intervals, the game's up.</div><div class='ctx'>  */</div><div class='ctx'> #define BSTUCK_THRESH           	9</div><div class='del'>-#define	ATH_BCBUF               	4</div><div class='add'>+#define	ATH_BCBUF               	8</div><div class='ctx'> #define ATH_DEFAULT_BINTVAL     	100 /* TU */</div><div class='ctx'> #define ATH_DEFAULT_BMISS_LIMIT 	10</div><div class='ctx'> #define IEEE80211_MS_TO_TU(x)           (((x) * 1000) / 1024)</div><div class='hunk'>@@ -430,6 +431,8 @@ void ath9k_set_beaconing_status(struct ath_softc *sc, bool status);</div><div class='ctx'> void ath_reset_work(struct work_struct *work);</div><div class='ctx'> void ath_hw_check(struct work_struct *work);</div><div class='ctx'> void ath_hw_pll_work(struct work_struct *work);</div><div class='add'>+void ath_rx_poll(unsigned long data);</div><div class='add'>+void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon);</div><div class='ctx'> void ath_paprd_calibrate(struct work_struct *work);</div><div class='ctx'> void ath_ani_calibrate(unsigned long data);</div><div class='ctx'> void ath_start_ani(struct ath_common *common);</div><div class='hunk'>@@ -670,6 +673,7 @@ struct ath_softc {</div><div class='ctx'> 	struct ath_beacon_config cur_beacon_conf;</div><div class='ctx'> 	struct delayed_work tx_complete_work;</div><div class='ctx'> 	struct delayed_work hw_pll_work;</div><div class='add'>+	struct timer_list rx_poll_timer;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT</div><div class='ctx'> 	struct ath_btcoex btcoex;</div><div class='hunk'>@@ -680,6 +684,7 @@ struct ath_softc {</div><div class='ctx'> </div><div class='ctx'> 	struct ath_ant_comb ant_comb;</div><div class='ctx'> 	u8 ant_tx, ant_rx;</div><div class='add'>+	struct dfs_pattern_detector *dfs_detector;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void ath9k_tasklet(unsigned long data);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c<br/>index 626418222c85..11bc55e3d697 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/beacon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/beacon.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/beacon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/beacon.c</a></div><div class='hunk'>@@ -91,7 +91,7 @@ static void ath_beacon_setup(struct ath_softc *sc, struct ieee80211_vif *vif,</div><div class='ctx'> 	info.txpower = MAX_RATE_POWER;</div><div class='ctx'> 	info.keyix = ATH9K_TXKEYIX_INVALID;</div><div class='ctx'> 	info.keytype = ATH9K_KEY_TYPE_CLEAR;</div><div class='del'>-	info.flags = ATH9K_TXDESC_NOACK | ATH9K_TXDESC_INTREQ;</div><div class='add'>+	info.flags = ATH9K_TXDESC_NOACK | ATH9K_TXDESC_CLRDMASK;</div><div class='ctx'> </div><div class='ctx'> 	info.buf_addr[0] = bf-&gt;bf_buf_addr;</div><div class='ctx'> 	info.buf_len[0] = roundup(skb-&gt;len, 4);</div><div class='hunk'>@@ -359,6 +359,11 @@ void ath_beacon_tasklet(unsigned long data)</div><div class='ctx'> 	int slot;</div><div class='ctx'> 	u32 bfaddr, bc = 0;</div><div class='ctx'> </div><div class='add'>+	if (work_pending(&amp;sc-&gt;hw_reset_work)) {</div><div class='add'>+		ath_dbg(common, RESET,</div><div class='add'>+			"reset work is pending, skip beaconing now\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check if the previous beacon has gone out.  If</div><div class='ctx'> 	 * not don't try to post another, skip this period</div><div class='hunk'>@@ -369,6 +374,9 @@ void ath_beacon_tasklet(unsigned long data)</div><div class='ctx'> 	if (ath9k_hw_numtxpending(ah, sc-&gt;beacon.beaconq) != 0) {</div><div class='ctx'> 		sc-&gt;beacon.bmisscnt++;</div><div class='ctx'> </div><div class='add'>+		if (!ath9k_hw_check_alive(ah))</div><div class='add'>+			ieee80211_queue_work(sc-&gt;hw, &amp;sc-&gt;hw_check_work);</div><div class='add'>+</div><div class='ctx'> 		if (sc-&gt;beacon.bmisscnt &lt; BSTUCK_THRESH * sc-&gt;nbcnvifs) {</div><div class='ctx'> 			ath_dbg(common, BSTUCK,</div><div class='ctx'> 				"missed %u consecutive beacons\n",</div><div class='hunk'>@@ -378,6 +386,7 @@ void ath_beacon_tasklet(unsigned long data)</div><div class='ctx'> 				ath9k_hw_bstuck_nfcal(ah);</div><div class='ctx'> 		} else if (sc-&gt;beacon.bmisscnt &gt;= BSTUCK_THRESH) {</div><div class='ctx'> 			ath_dbg(common, BSTUCK, "beacon is officially stuck\n");</div><div class='add'>+			sc-&gt;beacon.bmisscnt = 0;</div><div class='ctx'> 			sc-&gt;sc_flags |= SC_OP_TSF_RESET;</div><div class='ctx'> 			ieee80211_queue_work(sc-&gt;hw, &amp;sc-&gt;hw_reset_work);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -650,6 +659,8 @@ static void ath_beacon_config_adhoc(struct ath_softc *sc,</div><div class='ctx'> 	u32 tsf, intval, nexttbtt;</div><div class='ctx'> </div><div class='ctx'> 	ath9k_reset_beacon_status(sc);</div><div class='add'>+	if (!(sc-&gt;sc_flags &amp; SC_OP_BEACONS))</div><div class='add'>+		ath9k_hw_settsf64(ah, sc-&gt;beacon.bc_tstamp);</div><div class='ctx'> </div><div class='ctx'> 	intval = TU_TO_USEC(conf-&gt;beacon_interval);</div><div class='ctx'> 	tsf = roundup(ath9k_hw_gettsf32(ah) + TU_TO_USEC(FUDGE), intval);</div><div class='hunk'>@@ -806,8 +817,10 @@ void ath9k_set_beaconing_status(struct ath_softc *sc, bool status)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath_hw *ah = sc-&gt;sc_ah;</div><div class='ctx'> </div><div class='del'>-	if (!ath_has_valid_bslot(sc))</div><div class='add'>+	if (!ath_has_valid_bslot(sc)) {</div><div class='add'>+		sc-&gt;sc_flags &amp;= ~SC_OP_BEACONS;</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ath9k_ps_wakeup(sc);</div><div class='ctx'> 	if (status) {</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/btcoex.c b/drivers/net/wireless/ath/ath9k/btcoex.c<br/>index ec3271993411..1ca6da80d4ad 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/btcoex.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/btcoex.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/btcoex.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/btcoex.c</a></div><div class='hunk'>@@ -108,9 +108,7 @@ void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (AR_SREV_9462(ah)) {</div><div class='del'>-		btcoex_hw-&gt;scheme = ATH_BTCOEX_CFG_MCI;</div><div class='del'>-	} else if (AR_SREV_9300_20_OR_LATER(ah)) {</div><div class='add'>+	if (AR_SREV_9300_20_OR_LATER(ah)) {</div><div class='ctx'> 		btcoex_hw-&gt;scheme = ATH_BTCOEX_CFG_3WIRE;</div><div class='ctx'> 		btcoex_hw-&gt;btactive_gpio = ATH_BTACTIVE_GPIO_9300;</div><div class='ctx'> 		btcoex_hw-&gt;wlanactive_gpio = ATH_WLANACTIVE_GPIO_9300;</div><div class='hunk'>@@ -284,11 +282,12 @@ void ath9k_hw_btcoex_enable(struct ath_hw *ah)</div><div class='ctx'> 		ath9k_hw_btcoex_enable_2wire(ah);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ATH_BTCOEX_CFG_3WIRE:</div><div class='add'>+		if (AR_SREV_9462(ah)) {</div><div class='add'>+			ath9k_hw_btcoex_enable_mci(ah);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='ctx'> 		ath9k_hw_btcoex_enable_3wire(ah);</div><div class='ctx'> 		break;</div><div class='del'>-	case ATH_BTCOEX_CFG_MCI:</div><div class='del'>-		ath9k_hw_btcoex_enable_mci(ah);</div><div class='del'>-		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	REG_RMW(ah, AR_GPIO_PDPU,</div><div class='hunk'>@@ -305,11 +304,12 @@ void ath9k_hw_btcoex_disable(struct ath_hw *ah)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	btcoex_hw-&gt;enabled = false;</div><div class='del'>-	if (btcoex_hw-&gt;scheme == ATH_BTCOEX_CFG_MCI) {</div><div class='add'>+	if (AR_SREV_9462(ah)) {</div><div class='ctx'> 		ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);</div><div class='ctx'> 		for (i = 0; i &lt; AR9300_NUM_BT_WEIGHTS; i++)</div><div class='ctx'> 			REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),</div><div class='ctx'> 				  btcoex_hw-&gt;wlan_weight[i]);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	ath9k_hw_set_gpio(ah, btcoex_hw-&gt;wlanactive_gpio, 0);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/btcoex.h b/drivers/net/wireless/ath/ath9k/btcoex.h<br/>index 8f93aef4414f..3a1e1cfabd5e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/btcoex.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/btcoex.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/btcoex.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/btcoex.h</a></div><div class='hunk'>@@ -51,7 +51,6 @@ enum ath_btcoex_scheme {</div><div class='ctx'> 	ATH_BTCOEX_CFG_NONE,</div><div class='ctx'> 	ATH_BTCOEX_CFG_2WIRE,</div><div class='ctx'> 	ATH_BTCOEX_CFG_3WIRE,</div><div class='del'>-	ATH_BTCOEX_CFG_MCI,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath9k_hw_mci {</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c<br/>index ff47b32ecaf4..fde700c4e490 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/debug.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/debug.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/debug.c</a></div><div class='hunk'>@@ -380,63 +380,75 @@ static ssize_t read_file_interrupt(struct file *file, char __user *user_buf,</div><div class='ctx'> 				   size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath_softc *sc = file-&gt;private_data;</div><div class='del'>-	char buf[512];</div><div class='ctx'> 	unsigned int len = 0;</div><div class='add'>+	int rv;</div><div class='add'>+	int mxlen = 4000;</div><div class='add'>+	char *buf = kmalloc(mxlen, GFP_KERNEL);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+#define PR_IS(a, s)						\</div><div class='add'>+	do {							\</div><div class='add'>+		len += snprintf(buf + len, mxlen - len,		\</div><div class='add'>+				"%21s: %10u\n", a,		\</div><div class='add'>+				sc-&gt;debug.stats.istats.s);	\</div><div class='add'>+	} while (0)</div><div class='ctx'> </div><div class='ctx'> 	if (sc-&gt;sc_ah-&gt;caps.hw_caps &amp; ATH9K_HW_CAP_EDMA) {</div><div class='del'>-		len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-			"%8s: %10u\n", "RXLP", sc-&gt;debug.stats.istats.rxlp);</div><div class='del'>-		len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-			"%8s: %10u\n", "RXHP", sc-&gt;debug.stats.istats.rxhp);</div><div class='del'>-		len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-			"%8s: %10u\n", "WATCHDOG",</div><div class='del'>-			sc-&gt;debug.stats.istats.bb_watchdog);</div><div class='add'>+		PR_IS("RXLP", rxlp);</div><div class='add'>+		PR_IS("RXHP", rxhp);</div><div class='add'>+		PR_IS("WATHDOG", bb_watchdog);</div><div class='ctx'> 	} else {</div><div class='del'>-		len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-			"%8s: %10u\n", "RX", sc-&gt;debug.stats.istats.rxok);</div><div class='add'>+		PR_IS("RX", rxok);</div><div class='ctx'> 	}</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "RXEOL", sc-&gt;debug.stats.istats.rxeol);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "RXORN", sc-&gt;debug.stats.istats.rxorn);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "TX", sc-&gt;debug.stats.istats.txok);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "TXURN", sc-&gt;debug.stats.istats.txurn);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "MIB", sc-&gt;debug.stats.istats.mib);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "RXPHY", sc-&gt;debug.stats.istats.rxphyerr);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "RXKCM", sc-&gt;debug.stats.istats.rx_keycache_miss);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "SWBA", sc-&gt;debug.stats.istats.swba);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "BMISS", sc-&gt;debug.stats.istats.bmiss);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "BNR", sc-&gt;debug.stats.istats.bnr);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "CST", sc-&gt;debug.stats.istats.cst);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "GTT", sc-&gt;debug.stats.istats.gtt);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "TIM", sc-&gt;debug.stats.istats.tim);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "CABEND", sc-&gt;debug.stats.istats.cabend);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "DTIMSYNC", sc-&gt;debug.stats.istats.dtimsync);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "DTIM", sc-&gt;debug.stats.istats.dtim);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "TSFOOR", sc-&gt;debug.stats.istats.tsfoor);</div><div class='del'>-	len += snprintf(buf + len, sizeof(buf) - len,</div><div class='del'>-		"%8s: %10u\n", "TOTAL", sc-&gt;debug.stats.istats.total);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	if (len &gt; sizeof(buf))</div><div class='del'>-		len = sizeof(buf);</div><div class='del'>-</div><div class='del'>-	return simple_read_from_buffer(user_buf, count, ppos, buf, len);</div><div class='add'>+	PR_IS("RXEOL", rxeol);</div><div class='add'>+	PR_IS("RXORN", rxorn);</div><div class='add'>+	PR_IS("TX", txok);</div><div class='add'>+	PR_IS("TXURN", txurn);</div><div class='add'>+	PR_IS("MIB", mib);</div><div class='add'>+	PR_IS("RXPHY", rxphyerr);</div><div class='add'>+	PR_IS("RXKCM", rx_keycache_miss);</div><div class='add'>+	PR_IS("SWBA", swba);</div><div class='add'>+	PR_IS("BMISS", bmiss);</div><div class='add'>+	PR_IS("BNR", bnr);</div><div class='add'>+	PR_IS("CST", cst);</div><div class='add'>+	PR_IS("GTT", gtt);</div><div class='add'>+	PR_IS("TIM", tim);</div><div class='add'>+	PR_IS("CABEND", cabend);</div><div class='add'>+	PR_IS("DTIMSYNC", dtimsync);</div><div class='add'>+	PR_IS("DTIM", dtim);</div><div class='add'>+	PR_IS("TSFOOR", tsfoor);</div><div class='add'>+	PR_IS("TOTAL", total);</div><div class='add'>+</div><div class='add'>+	len += snprintf(buf + len, mxlen - len,</div><div class='add'>+			"SYNC_CAUSE stats:\n");</div><div class='add'>+</div><div class='add'>+	PR_IS("Sync-All", sync_cause_all);</div><div class='add'>+	PR_IS("RTC-IRQ", sync_rtc_irq);</div><div class='add'>+	PR_IS("MAC-IRQ", sync_mac_irq);</div><div class='add'>+	PR_IS("EEPROM-Illegal-Access", eeprom_illegal_access);</div><div class='add'>+	PR_IS("APB-Timeout", apb_timeout);</div><div class='add'>+	PR_IS("PCI-Mode-Conflict", pci_mode_conflict);</div><div class='add'>+	PR_IS("HOST1-Fatal", host1_fatal);</div><div class='add'>+	PR_IS("HOST1-Perr", host1_perr);</div><div class='add'>+	PR_IS("TRCV-FIFO-Perr", trcv_fifo_perr);</div><div class='add'>+	PR_IS("RADM-CPL-EP", radm_cpl_ep);</div><div class='add'>+	PR_IS("RADM-CPL-DLLP-Abort", radm_cpl_dllp_abort);</div><div class='add'>+	PR_IS("RADM-CPL-TLP-Abort", radm_cpl_tlp_abort);</div><div class='add'>+	PR_IS("RADM-CPL-ECRC-Err", radm_cpl_ecrc_err);</div><div class='add'>+	PR_IS("RADM-CPL-Timeout", radm_cpl_timeout);</div><div class='add'>+	PR_IS("Local-Bus-Timeout", local_timeout);</div><div class='add'>+	PR_IS("PM-Access", pm_access);</div><div class='add'>+	PR_IS("MAC-Awake", mac_awake);</div><div class='add'>+	PR_IS("MAC-Asleep", mac_asleep);</div><div class='add'>+	PR_IS("MAC-Sleep-Access", mac_sleep_access);</div><div class='add'>+</div><div class='add'>+	if (len &gt; mxlen)</div><div class='add'>+		len = mxlen;</div><div class='add'>+</div><div class='add'>+	rv = simple_read_from_buffer(user_buf, count, ppos, buf, len);</div><div class='add'>+	kfree(buf);</div><div class='add'>+	return rv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct file_operations fops_interrupt = {</div><div class='hunk'>@@ -524,6 +536,7 @@ static ssize_t read_file_xmit(struct file *file, char __user *user_buf,</div><div class='ctx'> 	PR("hw-put-tx-buf:   ", puttxbuf);</div><div class='ctx'> 	PR("hw-tx-start:     ", txstart);</div><div class='ctx'> 	PR("hw-tx-proc-desc: ", txprocdesc);</div><div class='add'>+	PR("TX-Failed:       ", txfailed);</div><div class='ctx'> 	len += snprintf(buf + len, size - len,</div><div class='ctx'> 			"%s%11p%11p%10p%10p\n", "txq-memory-address:",</div><div class='ctx'> 			sc-&gt;tx.txq_map[WME_AC_BE],</div><div class='hunk'>@@ -880,6 +893,13 @@ static ssize_t read_file_recv(struct file *file, char __user *user_buf,</div><div class='ctx'> 	len += snprintf(buf + len, size - len, "%22s : %10u\n", s, \</div><div class='ctx'> 			sc-&gt;debug.stats.rxstats.phy_err_stats[p]);</div><div class='ctx'> </div><div class='add'>+#define RXS_ERR(s, e)					    \</div><div class='add'>+	do {						    \</div><div class='add'>+		len += snprintf(buf + len, size - len,	    \</div><div class='add'>+				"%22s : %10u\n", s,	    \</div><div class='add'>+				sc-&gt;debug.stats.rxstats.e); \</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='ctx'> 	struct ath_softc *sc = file-&gt;private_data;</div><div class='ctx'> 	char *buf;</div><div class='ctx'> 	unsigned int len = 0, size = 1600;</div><div class='hunk'>@@ -889,27 +909,18 @@ static ssize_t read_file_recv(struct file *file, char __user *user_buf,</div><div class='ctx'> 	if (buf == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	len += snprintf(buf + len, size - len,</div><div class='del'>-			"%22s : %10u\n", "CRC ERR",</div><div class='del'>-			sc-&gt;debug.stats.rxstats.crc_err);</div><div class='del'>-	len += snprintf(buf + len, size - len,</div><div class='del'>-			"%22s : %10u\n", "DECRYPT CRC ERR",</div><div class='del'>-			sc-&gt;debug.stats.rxstats.decrypt_crc_err);</div><div class='del'>-	len += snprintf(buf + len, size - len,</div><div class='del'>-			"%22s : %10u\n", "PHY ERR",</div><div class='del'>-			sc-&gt;debug.stats.rxstats.phy_err);</div><div class='del'>-	len += snprintf(buf + len, size - len,</div><div class='del'>-			"%22s : %10u\n", "MIC ERR",</div><div class='del'>-			sc-&gt;debug.stats.rxstats.mic_err);</div><div class='del'>-	len += snprintf(buf + len, size - len,</div><div class='del'>-			"%22s : %10u\n", "PRE-DELIM CRC ERR",</div><div class='del'>-			sc-&gt;debug.stats.rxstats.pre_delim_crc_err);</div><div class='del'>-	len += snprintf(buf + len, size - len,</div><div class='del'>-			"%22s : %10u\n", "POST-DELIM CRC ERR",</div><div class='del'>-			sc-&gt;debug.stats.rxstats.post_delim_crc_err);</div><div class='del'>-	len += snprintf(buf + len, size - len,</div><div class='del'>-			"%22s : %10u\n", "DECRYPT BUSY ERR",</div><div class='del'>-			sc-&gt;debug.stats.rxstats.decrypt_busy_err);</div><div class='add'>+	RXS_ERR("CRC ERR", crc_err);</div><div class='add'>+	RXS_ERR("DECRYPT CRC ERR", decrypt_crc_err);</div><div class='add'>+	RXS_ERR("PHY ERR", phy_err);</div><div class='add'>+	RXS_ERR("MIC ERR", mic_err);</div><div class='add'>+	RXS_ERR("PRE-DELIM CRC ERR", pre_delim_crc_err);</div><div class='add'>+	RXS_ERR("POST-DELIM CRC ERR", post_delim_crc_err);</div><div class='add'>+	RXS_ERR("DECRYPT BUSY ERR", decrypt_busy_err);</div><div class='add'>+	RXS_ERR("RX-LENGTH-ERR", rx_len_err);</div><div class='add'>+	RXS_ERR("RX-OOM-ERR", rx_oom_err);</div><div class='add'>+	RXS_ERR("RX-RATE-ERR", rx_rate_err);</div><div class='add'>+	RXS_ERR("RX-DROP-RXFLUSH", rx_drop_rxflush);</div><div class='add'>+	RXS_ERR("RX-TOO-MANY-FRAGS", rx_too_many_frags_err);</div><div class='ctx'> </div><div class='ctx'> 	PHY_ERR("UNDERRUN ERR", ATH9K_PHYERR_UNDERRUN);</div><div class='ctx'> 	PHY_ERR("TIMING ERR", ATH9K_PHYERR_TIMING);</div><div class='hunk'>@@ -938,12 +949,10 @@ static ssize_t read_file_recv(struct file *file, char __user *user_buf,</div><div class='ctx'> 	PHY_ERR("HT-LENGTH ERR", ATH9K_PHYERR_HT_LENGTH_ILLEGAL);</div><div class='ctx'> 	PHY_ERR("HT-RATE ERR", ATH9K_PHYERR_HT_RATE_ILLEGAL);</div><div class='ctx'> </div><div class='del'>-	len += snprintf(buf + len, size - len,</div><div class='del'>-			"%22s : %10u\n", "RX-Pkts-All",</div><div class='del'>-			sc-&gt;debug.stats.rxstats.rx_pkts_all);</div><div class='del'>-	len += snprintf(buf + len, size - len,</div><div class='del'>-			"%22s : %10u\n", "RX-Bytes-All",</div><div class='del'>-			sc-&gt;debug.stats.rxstats.rx_bytes_all);</div><div class='add'>+	RXS_ERR("RX-Pkts-All", rx_pkts_all);</div><div class='add'>+	RXS_ERR("RX-Bytes-All", rx_bytes_all);</div><div class='add'>+	RXS_ERR("RX-Beacons", rx_beacons);</div><div class='add'>+	RXS_ERR("RX-Frags", rx_frags);</div><div class='ctx'> </div><div class='ctx'> 	if (len &gt; size)</div><div class='ctx'> 		len = size;</div><div class='hunk'>@@ -953,12 +962,12 @@ static ssize_t read_file_recv(struct file *file, char __user *user_buf,</div><div class='ctx'> </div><div class='ctx'> 	return retval;</div><div class='ctx'> </div><div class='add'>+#undef RXS_ERR</div><div class='ctx'> #undef PHY_ERR</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs)</div><div class='ctx'> {</div><div class='del'>-#define RX_STAT_INC(c) sc-&gt;debug.stats.rxstats.c++</div><div class='ctx'> #define RX_PHY_ERR_INC(c) sc-&gt;debug.stats.rxstats.phy_err_stats[c]++</div><div class='ctx'> #define RX_SAMP_DBG(c) (sc-&gt;debug.bb_mac_samp[sc-&gt;debug.sampidx].rs\</div><div class='ctx'> 			[sc-&gt;debug.rsidx].c)</div><div class='hunk'>@@ -1004,7 +1013,6 @@ void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#undef RX_STAT_INC</div><div class='ctx'> #undef RX_PHY_ERR_INC</div><div class='ctx'> #undef RX_SAMP_DBG</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/debug.h b/drivers/net/wireless/ath/ath9k/debug.h<br/>index 64fcfad467bf..c34da09d9103 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/debug.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/debug.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/debug.h</a></div><div class='hunk'>@@ -60,6 +60,7 @@ struct ath_buf;</div><div class='ctx'>  * @tsfoor: TSF out of range, indicates that the corrected TSF received</div><div class='ctx'>  * from a beacon differs from the PCU's internal TSF by more than a</div><div class='ctx'>  * (programmable) threshold</div><div class='add'>+ * @local_timeout: Internal bus timeout.</div><div class='ctx'>  */</div><div class='ctx'> struct ath_interrupt_stats {</div><div class='ctx'> 	u32 total;</div><div class='hunk'>@@ -85,8 +86,30 @@ struct ath_interrupt_stats {</div><div class='ctx'> 	u32 dtim;</div><div class='ctx'> 	u32 bb_watchdog;</div><div class='ctx'> 	u32 tsfoor;</div><div class='add'>+</div><div class='add'>+	/* Sync-cause stats */</div><div class='add'>+	u32 sync_cause_all;</div><div class='add'>+	u32 sync_rtc_irq;</div><div class='add'>+	u32 sync_mac_irq;</div><div class='add'>+	u32 eeprom_illegal_access;</div><div class='add'>+	u32 apb_timeout;</div><div class='add'>+	u32 pci_mode_conflict;</div><div class='add'>+	u32 host1_fatal;</div><div class='add'>+	u32 host1_perr;</div><div class='add'>+	u32 trcv_fifo_perr;</div><div class='add'>+	u32 radm_cpl_ep;</div><div class='add'>+	u32 radm_cpl_dllp_abort;</div><div class='add'>+	u32 radm_cpl_tlp_abort;</div><div class='add'>+	u32 radm_cpl_ecrc_err;</div><div class='add'>+	u32 radm_cpl_timeout;</div><div class='add'>+	u32 local_timeout;</div><div class='add'>+	u32 pm_access;</div><div class='add'>+	u32 mac_awake;</div><div class='add'>+	u32 mac_asleep;</div><div class='add'>+	u32 mac_sleep_access;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct ath_tx_stats - Statistics about TX</div><div class='ctx'>  * @tx_pkts_all:  No. of total frames transmitted, including ones that</div><div class='hunk'>@@ -113,6 +136,7 @@ struct ath_interrupt_stats {</div><div class='ctx'>  * @puttxbuf: Number of times hardware was given txbuf to write.</div><div class='ctx'>  * @txstart:  Number of times hardware was told to start tx.</div><div class='ctx'>  * @txprocdesc:  Number of times tx descriptor was processed</div><div class='add'>+ * @txfailed:  Out-of-memory or other errors in xmit path.</div><div class='ctx'>  */</div><div class='ctx'> struct ath_tx_stats {</div><div class='ctx'> 	u32 tx_pkts_all;</div><div class='hunk'>@@ -135,8 +159,11 @@ struct ath_tx_stats {</div><div class='ctx'> 	u32 puttxbuf;</div><div class='ctx'> 	u32 txstart;</div><div class='ctx'> 	u32 txprocdesc;</div><div class='add'>+	u32 txfailed;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define RX_STAT_INC(c) (sc-&gt;debug.stats.rxstats.c++)</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct ath_rx_stats - RX Statistics</div><div class='ctx'>  * @rx_pkts_all:  No. of total frames received, including ones that</div><div class='hunk'>@@ -153,6 +180,13 @@ struct ath_tx_stats {</div><div class='ctx'>  * @post_delim_crc_err: Post-Frame delimiter CRC error detections</div><div class='ctx'>  * @decrypt_busy_err: Decryption interruptions counter</div><div class='ctx'>  * @phy_err_stats: Individual PHY error statistics</div><div class='add'>+ * @rx_len_err:  No. of frames discarded due to bad length.</div><div class='add'>+ * @rx_oom_err:  No. of frames dropped due to OOM issues.</div><div class='add'>+ * @rx_rate_err:  No. of frames dropped due to rate errors.</div><div class='add'>+ * @rx_too_many_frags_err:  Frames dropped due to too-many-frags received.</div><div class='add'>+ * @rx_drop_rxflush: No. of frames dropped due to RX-FLUSH.</div><div class='add'>+ * @rx_beacons:  No. of beacons received.</div><div class='add'>+ * @rx_frags:  No. of rx-fragements received.</div><div class='ctx'>  */</div><div class='ctx'> struct ath_rx_stats {</div><div class='ctx'> 	u32 rx_pkts_all;</div><div class='hunk'>@@ -165,6 +199,13 @@ struct ath_rx_stats {</div><div class='ctx'> 	u32 post_delim_crc_err;</div><div class='ctx'> 	u32 decrypt_busy_err;</div><div class='ctx'> 	u32 phy_err_stats[ATH9K_PHYERR_MAX];</div><div class='add'>+	u32 rx_len_err;</div><div class='add'>+	u32 rx_oom_err;</div><div class='add'>+	u32 rx_rate_err;</div><div class='add'>+	u32 rx_too_many_frags_err;</div><div class='add'>+	u32 rx_drop_rxflush;</div><div class='add'>+	u32 rx_beacons;</div><div class='add'>+	u32 rx_frags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum ath_reset_type {</div><div class='hunk'>@@ -174,6 +215,7 @@ enum ath_reset_type {</div><div class='ctx'> 	RESET_TYPE_TX_ERROR,</div><div class='ctx'> 	RESET_TYPE_TX_HANG,</div><div class='ctx'> 	RESET_TYPE_PLL_HANG,</div><div class='add'>+	RESET_TYPE_MAC_HANG,</div><div class='ctx'> 	__RESET_TYPE_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -247,6 +289,8 @@ void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs);</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='add'>+#define RX_STAT_INC(c) /* NOP */</div><div class='add'>+</div><div class='ctx'> static inline int ath9k_init_debug(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/dfs.c b/drivers/net/wireless/ath/ath9k/dfs.c<br/>index f4f56aff1e9d..ecc81792f2dc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/dfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/dfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/dfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs.c</a></div><div class='hunk'>@@ -21,17 +21,6 @@</div><div class='ctx'> #include "dfs.h"</div><div class='ctx'> #include "dfs_debug.h"</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * TODO: move into or synchronize this with generic header</div><div class='del'>- *	 as soon as IF is defined</div><div class='del'>- */</div><div class='del'>-struct dfs_radar_pulse {</div><div class='del'>-	u16 freq;</div><div class='del'>-	u64 ts;</div><div class='del'>-	u32 width;</div><div class='del'>-	u8 rssi;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* internal struct to pass radar data */</div><div class='ctx'> struct ath_radar_data {</div><div class='ctx'> 	u8 pulse_bw_info;</div><div class='hunk'>@@ -60,44 +49,44 @@ static u32 dur_to_usecs(struct ath_hw *ah, u32 dur)</div><div class='ctx'> #define EXT_CH_RADAR_FOUND 0x02</div><div class='ctx'> static bool</div><div class='ctx'> ath9k_postprocess_radar_event(struct ath_softc *sc,</div><div class='del'>-			      struct ath_radar_data *are,</div><div class='del'>-			      struct dfs_radar_pulse *drp)</div><div class='add'>+			      struct ath_radar_data *ard,</div><div class='add'>+			      struct pulse_event *pe)</div><div class='ctx'> {</div><div class='ctx'> 	u8 rssi;</div><div class='ctx'> 	u16 dur;</div><div class='ctx'> </div><div class='ctx'> 	ath_dbg(ath9k_hw_common(sc-&gt;sc_ah), DFS,</div><div class='ctx'> 		"pulse_bw_info=0x%x, pri,ext len/rssi=(%u/%u, %u/%u)\n",</div><div class='del'>-		are-&gt;pulse_bw_info,</div><div class='del'>-		are-&gt;pulse_length_pri, are-&gt;rssi,</div><div class='del'>-		are-&gt;pulse_length_ext, are-&gt;ext_rssi);</div><div class='add'>+		ard-&gt;pulse_bw_info,</div><div class='add'>+		ard-&gt;pulse_length_pri, ard-&gt;rssi,</div><div class='add'>+		ard-&gt;pulse_length_ext, ard-&gt;ext_rssi);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Only the last 2 bits of the BW info are relevant, they indicate</div><div class='ctx'> 	 * which channel the radar was detected in.</div><div class='ctx'> 	 */</div><div class='del'>-	are-&gt;pulse_bw_info &amp;= 0x03;</div><div class='add'>+	ard-&gt;pulse_bw_info &amp;= 0x03;</div><div class='ctx'> </div><div class='del'>-	switch (are-&gt;pulse_bw_info) {</div><div class='add'>+	switch (ard-&gt;pulse_bw_info) {</div><div class='ctx'> 	case PRI_CH_RADAR_FOUND:</div><div class='ctx'> 		/* radar in ctrl channel */</div><div class='del'>-		dur = are-&gt;pulse_length_pri;</div><div class='add'>+		dur = ard-&gt;pulse_length_pri;</div><div class='ctx'> 		DFS_STAT_INC(sc, pri_phy_errors);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * cannot use ctrl channel RSSI</div><div class='ctx'> 		 * if extension channel is stronger</div><div class='ctx'> 		 */</div><div class='del'>-		rssi = (are-&gt;ext_rssi &gt;= (are-&gt;rssi + 3)) ? 0 : are-&gt;rssi;</div><div class='add'>+		rssi = (ard-&gt;ext_rssi &gt;= (ard-&gt;rssi + 3)) ? 0 : ard-&gt;rssi;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case EXT_CH_RADAR_FOUND:</div><div class='ctx'> 		/* radar in extension channel */</div><div class='del'>-		dur = are-&gt;pulse_length_ext;</div><div class='add'>+		dur = ard-&gt;pulse_length_ext;</div><div class='ctx'> 		DFS_STAT_INC(sc, ext_phy_errors);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * cannot use extension channel RSSI</div><div class='ctx'> 		 * if control channel is stronger</div><div class='ctx'> 		 */</div><div class='del'>-		rssi = (are-&gt;rssi &gt;= (are-&gt;ext_rssi + 12)) ? 0 : are-&gt;ext_rssi;</div><div class='add'>+		rssi = (ard-&gt;rssi &gt;= (ard-&gt;ext_rssi + 12)) ? 0 : ard-&gt;ext_rssi;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case (PRI_CH_RADAR_FOUND | EXT_CH_RADAR_FOUND):</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -107,14 +96,14 @@ ath9k_postprocess_radar_event(struct ath_softc *sc,</div><div class='ctx'> 		 * Radiated testing, when pulse is on DC, different pri and</div><div class='ctx'> 		 * ext durations are reported, so take the larger of the two</div><div class='ctx'> 		 */</div><div class='del'>-		if (are-&gt;pulse_length_ext &gt;= are-&gt;pulse_length_pri)</div><div class='del'>-			dur = are-&gt;pulse_length_ext;</div><div class='add'>+		if (ard-&gt;pulse_length_ext &gt;= ard-&gt;pulse_length_pri)</div><div class='add'>+			dur = ard-&gt;pulse_length_ext;</div><div class='ctx'> 		else</div><div class='del'>-			dur = are-&gt;pulse_length_pri;</div><div class='add'>+			dur = ard-&gt;pulse_length_pri;</div><div class='ctx'> 		DFS_STAT_INC(sc, dc_phy_errors);</div><div class='ctx'> </div><div class='ctx'> 		/* when both are present use stronger one */</div><div class='del'>-		rssi = (are-&gt;rssi &lt; are-&gt;ext_rssi) ? are-&gt;ext_rssi : are-&gt;rssi;</div><div class='add'>+		rssi = (ard-&gt;rssi &lt; ard-&gt;ext_rssi) ? ard-&gt;ext_rssi : ard-&gt;rssi;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -137,8 +126,8 @@ ath9k_postprocess_radar_event(struct ath_softc *sc,</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	/* convert duration to usecs */</div><div class='del'>-	drp-&gt;width = dur_to_usecs(sc-&gt;sc_ah, dur);</div><div class='del'>-	drp-&gt;rssi = rssi;</div><div class='add'>+	pe-&gt;width = dur_to_usecs(sc-&gt;sc_ah, dur);</div><div class='add'>+	pe-&gt;rssi = rssi;</div><div class='ctx'> </div><div class='ctx'> 	DFS_STAT_INC(sc, pulses_detected);</div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -155,15 +144,17 @@ void ath9k_dfs_process_phyerr(struct ath_softc *sc, void *data,</div><div class='ctx'> 	struct ath_radar_data ard;</div><div class='ctx'> 	u16 datalen;</div><div class='ctx'> 	char *vdata_end;</div><div class='del'>-	struct dfs_radar_pulse drp;</div><div class='add'>+	struct pulse_event pe;</div><div class='ctx'> 	struct ath_hw *ah = sc-&gt;sc_ah;</div><div class='ctx'> 	struct ath_common *common = ath9k_hw_common(ah);</div><div class='ctx'> </div><div class='del'>-	if ((!(rs-&gt;rs_phyerr != ATH9K_PHYERR_RADAR)) &amp;&amp;</div><div class='del'>-	    (!(rs-&gt;rs_phyerr != ATH9K_PHYERR_FALSE_RADAR_EXT))) {</div><div class='add'>+	DFS_STAT_INC(sc, pulses_total);</div><div class='add'>+	if ((rs-&gt;rs_phyerr != ATH9K_PHYERR_RADAR) &amp;&amp;</div><div class='add'>+	    (rs-&gt;rs_phyerr != ATH9K_PHYERR_FALSE_RADAR_EXT)) {</div><div class='ctx'> 		ath_dbg(common, DFS,</div><div class='ctx'> 			"Error: rs_phyer=0x%x not a radar error\n",</div><div class='ctx'> 			rs-&gt;rs_phyerr);</div><div class='add'>+		DFS_STAT_INC(sc, pulses_no_dfs);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -189,27 +180,22 @@ void ath9k_dfs_process_phyerr(struct ath_softc *sc, void *data,</div><div class='ctx'> 	ard.pulse_bw_info = vdata_end[-1];</div><div class='ctx'> 	ard.pulse_length_ext = vdata_end[-2];</div><div class='ctx'> 	ard.pulse_length_pri = vdata_end[-3];</div><div class='del'>-</div><div class='del'>-	ath_dbg(common, DFS,</div><div class='del'>-		"bw_info=%d, length_pri=%d, length_ext=%d, "</div><div class='del'>-		"rssi_pri=%d, rssi_ext=%d\n",</div><div class='del'>-		ard.pulse_bw_info, ard.pulse_length_pri, ard.pulse_length_ext,</div><div class='del'>-		ard.rssi, ard.ext_rssi);</div><div class='del'>-</div><div class='del'>-	drp.freq = ah-&gt;curchan-&gt;channel;</div><div class='del'>-	drp.ts = mactime;</div><div class='del'>-	if (ath9k_postprocess_radar_event(sc, &amp;ard, &amp;drp)) {</div><div class='add'>+	pe.freq = ah-&gt;curchan-&gt;channel;</div><div class='add'>+	pe.ts = mactime;</div><div class='add'>+	if (ath9k_postprocess_radar_event(sc, &amp;ard, &amp;pe)) {</div><div class='add'>+		struct dfs_pattern_detector *pd = sc-&gt;dfs_detector;</div><div class='ctx'> 		static u64 last_ts;</div><div class='ctx'> 		ath_dbg(common, DFS,</div><div class='ctx'> 			"ath9k_dfs_process_phyerr: channel=%d, ts=%llu, "</div><div class='ctx'> 			"width=%d, rssi=%d, delta_ts=%llu\n",</div><div class='del'>-			drp.freq, drp.ts, drp.width, drp.rssi, drp.ts-last_ts);</div><div class='del'>-		last_ts = drp.ts;</div><div class='del'>-		/*</div><div class='del'>-		 * TODO: forward pulse to pattern detector</div><div class='del'>-		 *</div><div class='del'>-		 * ieee80211_add_radar_pulse(drp.freq, drp.ts,</div><div class='del'>-		 *                           drp.width, drp.rssi);</div><div class='del'>-		 */</div><div class='add'>+			pe.freq, pe.ts, pe.width, pe.rssi, pe.ts-last_ts);</div><div class='add'>+		last_ts = pe.ts;</div><div class='add'>+		DFS_STAT_INC(sc, pulses_processed);</div><div class='add'>+		if (pd != NULL &amp;&amp; pd-&gt;add_pulse(pd, &amp;pe)) {</div><div class='add'>+			DFS_STAT_INC(sc, radar_detected);</div><div class='add'>+			/*</div><div class='add'>+			 * TODO: forward radar event to DFS management layer</div><div class='add'>+			 */</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/dfs.h b/drivers/net/wireless/ath/ath9k/dfs.h<br/>index c2412857f122..3c839f06a06a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/dfs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/dfs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/dfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs.h</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef ATH9K_DFS_H</div><div class='ctx'> #define ATH9K_DFS_H</div><div class='add'>+#include "dfs_pattern_detector.h"</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_ATH9K_DFS_CERTIFIED)</div><div class='ctx'> /**</div><div class='hunk'>@@ -31,13 +32,14 @@</div><div class='ctx'>  *</div><div class='ctx'>  * The radar information provided as raw payload data is validated and</div><div class='ctx'>  * filtered for false pulses. Events passing all tests are forwarded to</div><div class='del'>- * the upper layer for pattern detection.</div><div class='add'>+ * the DFS detector for pattern detection.</div><div class='ctx'>  */</div><div class='ctx'> void ath9k_dfs_process_phyerr(struct ath_softc *sc, void *data,</div><div class='ctx'> 			      struct ath_rx_status *rs, u64 mactime);</div><div class='ctx'> #else</div><div class='del'>-static inline void ath9k_dfs_process_phyerr(struct ath_softc *sc, void *data,</div><div class='del'>-					    struct ath_rx_status *rs, u64 mactime) { }</div><div class='add'>+static inline void</div><div class='add'>+ath9k_dfs_process_phyerr(struct ath_softc *sc, void *data,</div><div class='add'>+			 struct ath_rx_status *rs, u64 mactime) { }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* ATH9K_DFS_H */</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/dfs_debug.c b/drivers/net/wireless/ath/ath9k/dfs_debug.c<br/>index 4364c103ed33..55d28072adeb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/dfs_debug.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/dfs_debug.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/dfs_debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs_debug.c</a></div><div class='hunk'>@@ -21,9 +21,15 @@</div><div class='ctx'> #include "ath9k.h"</div><div class='ctx'> #include "dfs_debug.h"</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+struct ath_dfs_pool_stats global_dfs_pool_stats = { 0 };</div><div class='add'>+</div><div class='ctx'> #define ATH9K_DFS_STAT(s, p) \</div><div class='ctx'> 	len += snprintf(buf + len, size - len, "%28s : %10u\n", s, \</div><div class='ctx'> 			sc-&gt;debug.stats.dfs_stats.p);</div><div class='add'>+#define ATH9K_DFS_POOL_STAT(s, p) \</div><div class='add'>+	len += snprintf(buf + len, size - len, "%28s : %10u\n", s, \</div><div class='add'>+			global_dfs_pool_stats.p);</div><div class='ctx'> </div><div class='ctx'> static ssize_t read_file_dfs(struct file *file, char __user *user_buf,</div><div class='ctx'> 			     size_t count, loff_t *ppos)</div><div class='hunk'>@@ -43,6 +49,9 @@ static ssize_t read_file_dfs(struct file *file, char __user *user_buf,</div><div class='ctx'> 			hw_ver-&gt;macVersion, hw_ver-&gt;macRev,</div><div class='ctx'> 			(sc-&gt;sc_ah-&gt;caps.hw_caps &amp; ATH9K_HW_CAP_DFS) ?</div><div class='ctx'> 					"enabled" : "disabled");</div><div class='add'>+	len += snprintf(buf + len, size - len, "Pulse detector statistics:\n");</div><div class='add'>+	ATH9K_DFS_STAT("pulse events reported   ", pulses_total);</div><div class='add'>+	ATH9K_DFS_STAT("invalid pulse events    ", pulses_no_dfs);</div><div class='ctx'> 	ATH9K_DFS_STAT("DFS pulses detected     ", pulses_detected);</div><div class='ctx'> 	ATH9K_DFS_STAT("Datalen discards        ", datalen_discards);</div><div class='ctx'> 	ATH9K_DFS_STAT("RSSI discards           ", rssi_discards);</div><div class='hunk'>@@ -50,6 +59,18 @@ static ssize_t read_file_dfs(struct file *file, char __user *user_buf,</div><div class='ctx'> 	ATH9K_DFS_STAT("Primary channel pulses  ", pri_phy_errors);</div><div class='ctx'> 	ATH9K_DFS_STAT("Secondary channel pulses", ext_phy_errors);</div><div class='ctx'> 	ATH9K_DFS_STAT("Dual channel pulses     ", dc_phy_errors);</div><div class='add'>+	len += snprintf(buf + len, size - len, "Radar detector statistics "</div><div class='add'>+			"(current DFS region: %d)\n", sc-&gt;dfs_detector-&gt;region);</div><div class='add'>+	ATH9K_DFS_STAT("Pulse events processed  ", pulses_processed);</div><div class='add'>+	ATH9K_DFS_STAT("Radars detected         ", radar_detected);</div><div class='add'>+	len += snprintf(buf + len, size - len, "Global Pool statistics:\n");</div><div class='add'>+	ATH9K_DFS_POOL_STAT("Pool references         ", pool_reference);</div><div class='add'>+	ATH9K_DFS_POOL_STAT("Pulses allocated        ", pulse_allocated);</div><div class='add'>+	ATH9K_DFS_POOL_STAT("Pulses alloc error      ", pulse_alloc_error);</div><div class='add'>+	ATH9K_DFS_POOL_STAT("Pulses in use           ", pulse_used);</div><div class='add'>+	ATH9K_DFS_POOL_STAT("Seqs. allocated         ", pseq_allocated);</div><div class='add'>+	ATH9K_DFS_POOL_STAT("Seqs. alloc error       ", pseq_alloc_error);</div><div class='add'>+	ATH9K_DFS_POOL_STAT("Seqs. in use            ", pseq_used);</div><div class='ctx'> </div><div class='ctx'> 	if (len &gt; size)</div><div class='ctx'> 		len = size;</div><div class='hunk'>@@ -60,8 +81,33 @@ static ssize_t read_file_dfs(struct file *file, char __user *user_buf,</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* magic number to prevent accidental reset of DFS statistics */</div><div class='add'>+#define DFS_STATS_RESET_MAGIC	0x80000000</div><div class='add'>+static ssize_t write_file_dfs(struct file *file, const char __user *user_buf,</div><div class='add'>+			      size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct ath_softc *sc = file-&gt;private_data;</div><div class='add'>+	unsigned long val;</div><div class='add'>+	char buf[32];</div><div class='add'>+	ssize_t len;</div><div class='add'>+</div><div class='add'>+	len = min(count, sizeof(buf) - 1);</div><div class='add'>+	if (copy_from_user(buf, user_buf, len))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	buf[len] = '\0';</div><div class='add'>+	if (strict_strtoul(buf, 0, &amp;val))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (val == DFS_STATS_RESET_MAGIC)</div><div class='add'>+		memset(&amp;sc-&gt;debug.stats.dfs_stats, 0,</div><div class='add'>+		       sizeof(sc-&gt;debug.stats.dfs_stats));</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct file_operations fops_dfs_stats = {</div><div class='ctx'> 	.read = read_file_dfs,</div><div class='add'>+	.write = write_file_dfs,</div><div class='ctx'> 	.open = simple_open,</div><div class='ctx'> 	.owner = THIS_MODULE,</div><div class='ctx'> 	.llseek = default_llseek,</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/dfs_debug.h b/drivers/net/wireless/ath/ath9k/dfs_debug.h<br/>index 4911724cb445..e36810a4b585 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/dfs_debug.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/dfs_debug.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/dfs_debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs_debug.h</a></div><div class='hunk'>@@ -22,17 +22,23 @@</div><div class='ctx'> #include "hw.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * struct ath_dfs_stats - DFS Statistics</div><div class='del'>- *</div><div class='del'>- * @pulses_detected:  No. of pulses detected so far</div><div class='del'>- * @datalen_discards: No. of pulses discarded due to invalid datalen</div><div class='del'>- * @rssi_discards:    No. of pulses discarded due to invalid RSSI</div><div class='del'>- * @bwinfo_discards:  No. of pulses discarded due to invalid BW info</div><div class='del'>- * @pri_phy_errors:   No. of pulses reported for primary channel</div><div class='del'>- * @ext_phy_errors:   No. of pulses reported for extension channel</div><div class='del'>- * @dc_phy_errors:    No. of pulses reported for primary + extension channel</div><div class='add'>+ * struct ath_dfs_stats - DFS Statistics per wiphy</div><div class='add'>+ * @pulses_total:     pulses reported by HW</div><div class='add'>+ * @pulses_no_dfs:    pulses wrongly reported as DFS</div><div class='add'>+ * @pulses_detected:  pulses detected so far</div><div class='add'>+ * @datalen_discards: pulses discarded due to invalid datalen</div><div class='add'>+ * @rssi_discards:    pulses discarded due to invalid RSSI</div><div class='add'>+ * @bwinfo_discards:  pulses discarded due to invalid BW info</div><div class='add'>+ * @pri_phy_errors:   pulses reported for primary channel</div><div class='add'>+ * @ext_phy_errors:   pulses reported for extension channel</div><div class='add'>+ * @dc_phy_errors:    pulses reported for primary + extension channel</div><div class='add'>+ * @pulses_processed: pulses forwarded to detector</div><div class='add'>+ * @radar_detected:   radars detected</div><div class='ctx'>  */</div><div class='ctx'> struct ath_dfs_stats {</div><div class='add'>+	/* pulse stats */</div><div class='add'>+	u32 pulses_total;</div><div class='add'>+	u32 pulses_no_dfs;</div><div class='ctx'> 	u32 pulses_detected;</div><div class='ctx'> 	u32 datalen_discards;</div><div class='ctx'> 	u32 rssi_discards;</div><div class='hunk'>@@ -40,18 +46,39 @@ struct ath_dfs_stats {</div><div class='ctx'> 	u32 pri_phy_errors;</div><div class='ctx'> 	u32 ext_phy_errors;</div><div class='ctx'> 	u32 dc_phy_errors;</div><div class='add'>+	/* pattern detection stats */</div><div class='add'>+	u32 pulses_processed;</div><div class='add'>+	u32 radar_detected;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * struct ath_dfs_pool_stats - DFS Statistics for global pools</div><div class='add'>+ */</div><div class='add'>+struct ath_dfs_pool_stats {</div><div class='add'>+	u32 pool_reference;</div><div class='add'>+	u32 pulse_allocated;</div><div class='add'>+	u32 pulse_alloc_error;</div><div class='add'>+	u32 pulse_used;</div><div class='add'>+	u32 pseq_allocated;</div><div class='add'>+	u32 pseq_alloc_error;</div><div class='add'>+	u32 pseq_used;</div><div class='add'>+};</div><div class='ctx'> #if defined(CONFIG_ATH9K_DFS_DEBUGFS)</div><div class='ctx'> </div><div class='ctx'> #define DFS_STAT_INC(sc, c) (sc-&gt;debug.stats.dfs_stats.c++)</div><div class='ctx'> void ath9k_dfs_init_debug(struct ath_softc *sc);</div><div class='ctx'> </div><div class='add'>+#define DFS_POOL_STAT_INC(c) (global_dfs_pool_stats.c++)</div><div class='add'>+#define DFS_POOL_STAT_DEC(c) (global_dfs_pool_stats.c--)</div><div class='add'>+extern struct ath_dfs_pool_stats global_dfs_pool_stats;</div><div class='add'>+</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='ctx'> #define DFS_STAT_INC(sc, c) do { } while (0)</div><div class='ctx'> static inline void ath9k_dfs_init_debug(struct ath_softc *sc) { }</div><div class='ctx'> </div><div class='add'>+#define DFS_POOL_STAT_INC(c) do { } while (0)</div><div class='add'>+#define DFS_POOL_STAT_DEC(c) do { } while (0)</div><div class='ctx'> #endif /* CONFIG_ATH9K_DFS_DEBUGFS */</div><div class='ctx'> </div><div class='ctx'> #endif /* ATH9K_DFS_DEBUG_H */</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c b/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c<br/>new file mode 100644<br/>index 000000000000..ea2a6cf7ef23<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs_pattern_detector.c</a></div><div class='hunk'>@@ -0,0 +1,300 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2012 Neratec Solutions AG</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+#include "dfs_pattern_detector.h"</div><div class='add'>+#include "dfs_pri_detector.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * tolerated deviation of radar time stamp in usecs on both sides</div><div class='add'>+ * TODO: this might need to be HW-dependent</div><div class='add'>+ */</div><div class='add'>+#define PRI_TOLERANCE	16</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct radar_types - contains array of patterns defined for one DFS domain</div><div class='add'>+ * @domain: DFS regulatory domain</div><div class='add'>+ * @num_radar_types: number of radar types to follow</div><div class='add'>+ * @radar_types: radar types array</div><div class='add'>+ */</div><div class='add'>+struct radar_types {</div><div class='add'>+	enum nl80211_dfs_regions region;</div><div class='add'>+	u32 num_radar_types;</div><div class='add'>+	const struct radar_detector_specs *radar_types;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* percentage on ppb threshold to trigger detection */</div><div class='add'>+#define MIN_PPB_THRESH	50</div><div class='add'>+#define PPB_THRESH(PPB) ((PPB * MIN_PPB_THRESH + 50) / 100)</div><div class='add'>+#define PRF2PRI(PRF) ((1000000 + PRF / 2) / PRF)</div><div class='add'>+</div><div class='add'>+#define ETSI_PATTERN(ID, WMIN, WMAX, PMIN, PMAX, PRF, PPB)	\</div><div class='add'>+{								\</div><div class='add'>+	ID, WMIN, WMAX, (PRF2PRI(PMAX) - PRI_TOLERANCE),	\</div><div class='add'>+	(PRF2PRI(PMIN) * PRF + PRI_TOLERANCE), PRF, PPB * PRF,	\</div><div class='add'>+	PPB_THRESH(PPB), PRI_TOLERANCE,				\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* radar types as defined by ETSI EN-301-893 v1.5.1 */</div><div class='add'>+static const struct radar_detector_specs etsi_radar_ref_types_v15[] = {</div><div class='add'>+	ETSI_PATTERN(0,  0,  1,  700,  700, 1, 18),</div><div class='add'>+	ETSI_PATTERN(1,  0,  5,  200, 1000, 1, 10),</div><div class='add'>+	ETSI_PATTERN(2,  0, 15,  200, 1600, 1, 15),</div><div class='add'>+	ETSI_PATTERN(3,  0, 15, 2300, 4000, 1, 25),</div><div class='add'>+	ETSI_PATTERN(4, 20, 30, 2000, 4000, 1, 20),</div><div class='add'>+	ETSI_PATTERN(5,  0,  2,  300,  400, 3, 10),</div><div class='add'>+	ETSI_PATTERN(6,  0,  2,  400, 1200, 3, 15),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct radar_types etsi_radar_types_v15 = {</div><div class='add'>+	.region			= NL80211_DFS_ETSI,</div><div class='add'>+	.num_radar_types	= ARRAY_SIZE(etsi_radar_ref_types_v15),</div><div class='add'>+	.radar_types		= etsi_radar_ref_types_v15,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* for now, we support ETSI radar types, FCC and JP are TODO */</div><div class='add'>+static const struct radar_types *dfs_domains[] = {</div><div class='add'>+	&amp;etsi_radar_types_v15,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * get_dfs_domain_radar_types() - get radar types for a given DFS domain</div><div class='add'>+ * @param domain DFS domain</div><div class='add'>+ * @return radar_types ptr on success, NULL if DFS domain is not supported</div><div class='add'>+ */</div><div class='add'>+static const struct radar_types *</div><div class='add'>+get_dfs_domain_radar_types(enum nl80211_dfs_regions region)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(dfs_domains); i++) {</div><div class='add'>+		if (dfs_domains[i]-&gt;region == region)</div><div class='add'>+			return dfs_domains[i];</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct channel_detector - detector elements for a DFS channel</div><div class='add'>+ * @head: list_head</div><div class='add'>+ * @freq: frequency for this channel detector in MHz</div><div class='add'>+ * @detectors: array of dynamically created detector elements for this freq</div><div class='add'>+ *</div><div class='add'>+ * Channel detectors are required to provide multi-channel DFS detection, e.g.</div><div class='add'>+ * to support off-channel scanning. A pattern detector has a list of channels</div><div class='add'>+ * radar pulses have been reported for in the past.</div><div class='add'>+ */</div><div class='add'>+struct channel_detector {</div><div class='add'>+	struct list_head head;</div><div class='add'>+	u16 freq;</div><div class='add'>+	struct pri_detector **detectors;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* channel_detector_reset() - reset detector lines for a given channel */</div><div class='add'>+static void channel_detector_reset(struct dfs_pattern_detector *dpd,</div><div class='add'>+				   struct channel_detector *cd)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+	if (cd == NULL)</div><div class='add'>+		return;</div><div class='add'>+	for (i = 0; i &lt; dpd-&gt;num_radar_types; i++)</div><div class='add'>+		cd-&gt;detectors[i]-&gt;reset(cd-&gt;detectors[i], dpd-&gt;last_pulse_ts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* channel_detector_exit() - destructor */</div><div class='add'>+static void channel_detector_exit(struct dfs_pattern_detector *dpd,</div><div class='add'>+				  struct channel_detector *cd)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+	if (cd == NULL)</div><div class='add'>+		return;</div><div class='add'>+	list_del(&amp;cd-&gt;head);</div><div class='add'>+	for (i = 0; i &lt; dpd-&gt;num_radar_types; i++) {</div><div class='add'>+		struct pri_detector *de = cd-&gt;detectors[i];</div><div class='add'>+		if (de != NULL)</div><div class='add'>+			de-&gt;exit(de);</div><div class='add'>+	}</div><div class='add'>+	kfree(cd-&gt;detectors);</div><div class='add'>+	kfree(cd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct channel_detector *</div><div class='add'>+channel_detector_create(struct dfs_pattern_detector *dpd, u16 freq)</div><div class='add'>+{</div><div class='add'>+	u32 sz, i;</div><div class='add'>+	struct channel_detector *cd;</div><div class='add'>+</div><div class='add'>+	cd = kmalloc(sizeof(*cd), GFP_KERNEL);</div><div class='add'>+	if (cd == NULL)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;cd-&gt;head);</div><div class='add'>+	cd-&gt;freq = freq;</div><div class='add'>+	sz = sizeof(cd-&gt;detectors) * dpd-&gt;num_radar_types;</div><div class='add'>+	cd-&gt;detectors = kzalloc(sz, GFP_KERNEL);</div><div class='add'>+	if (cd-&gt;detectors == NULL)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dpd-&gt;num_radar_types; i++) {</div><div class='add'>+		const struct radar_detector_specs *rs = &amp;dpd-&gt;radar_spec[i];</div><div class='add'>+		struct pri_detector *de = pri_detector_init(rs);</div><div class='add'>+		if (de == NULL)</div><div class='add'>+			goto fail;</div><div class='add'>+		cd-&gt;detectors[i] = de;</div><div class='add'>+	}</div><div class='add'>+	list_add(&amp;cd-&gt;head, &amp;dpd-&gt;channel_detectors);</div><div class='add'>+	return cd;</div><div class='add'>+</div><div class='add'>+fail:</div><div class='add'>+	pr_err("failed to allocate channel_detector for freq=%d\n", freq);</div><div class='add'>+	channel_detector_exit(dpd, cd);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * channel_detector_get() - get channel detector for given frequency</div><div class='add'>+ * @param dpd instance pointer</div><div class='add'>+ * @param freq frequency in MHz</div><div class='add'>+ * @return pointer to channel detector on success, NULL otherwise</div><div class='add'>+ *</div><div class='add'>+ * Return existing channel detector for the given frequency or return a</div><div class='add'>+ * newly create one.</div><div class='add'>+ */</div><div class='add'>+static struct channel_detector *</div><div class='add'>+channel_detector_get(struct dfs_pattern_detector *dpd, u16 freq)</div><div class='add'>+{</div><div class='add'>+	struct channel_detector *cd;</div><div class='add'>+	list_for_each_entry(cd, &amp;dpd-&gt;channel_detectors, head) {</div><div class='add'>+		if (cd-&gt;freq == freq)</div><div class='add'>+			return cd;</div><div class='add'>+	}</div><div class='add'>+	return channel_detector_create(dpd, freq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DFS Pattern Detector</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* dpd_reset(): reset all channel detectors */</div><div class='add'>+static void dpd_reset(struct dfs_pattern_detector *dpd)</div><div class='add'>+{</div><div class='add'>+	struct channel_detector *cd;</div><div class='add'>+	if (!list_empty(&amp;dpd-&gt;channel_detectors))</div><div class='add'>+		list_for_each_entry(cd, &amp;dpd-&gt;channel_detectors, head)</div><div class='add'>+			channel_detector_reset(dpd, cd);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+static void dpd_exit(struct dfs_pattern_detector *dpd)</div><div class='add'>+{</div><div class='add'>+	struct channel_detector *cd, *cd0;</div><div class='add'>+	if (!list_empty(&amp;dpd-&gt;channel_detectors))</div><div class='add'>+		list_for_each_entry_safe(cd, cd0, &amp;dpd-&gt;channel_detectors, head)</div><div class='add'>+			channel_detector_exit(dpd, cd);</div><div class='add'>+	kfree(dpd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+dpd_add_pulse(struct dfs_pattern_detector *dpd, struct pulse_event *event)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+	bool ts_wraparound;</div><div class='add'>+	struct channel_detector *cd;</div><div class='add'>+</div><div class='add'>+	if (dpd-&gt;region == NL80211_DFS_UNSET) {</div><div class='add'>+		/*</div><div class='add'>+		 * pulses received for a non-supported or un-initialized</div><div class='add'>+		 * domain are treated as detected radars</div><div class='add'>+		 */</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cd = channel_detector_get(dpd, event-&gt;freq);</div><div class='add'>+	if (cd == NULL)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	ts_wraparound = (event-&gt;ts &lt; dpd-&gt;last_pulse_ts);</div><div class='add'>+	dpd-&gt;last_pulse_ts = event-&gt;ts;</div><div class='add'>+	if (ts_wraparound) {</div><div class='add'>+		/*</div><div class='add'>+		 * reset detector on time stamp wraparound</div><div class='add'>+		 * with monotonic time stamps, this should never happen</div><div class='add'>+		 */</div><div class='add'>+		pr_warn("DFS: time stamp wraparound detected, resetting\n");</div><div class='add'>+		dpd_reset(dpd);</div><div class='add'>+	}</div><div class='add'>+	/* do type individual pattern matching */</div><div class='add'>+	for (i = 0; i &lt; dpd-&gt;num_radar_types; i++) {</div><div class='add'>+		if (cd-&gt;detectors[i]-&gt;add_pulse(cd-&gt;detectors[i], event) != 0) {</div><div class='add'>+			channel_detector_reset(dpd, cd);</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool dpd_set_domain(struct dfs_pattern_detector *dpd,</div><div class='add'>+			   enum nl80211_dfs_regions region)</div><div class='add'>+{</div><div class='add'>+	const struct radar_types *rt;</div><div class='add'>+	struct channel_detector *cd, *cd0;</div><div class='add'>+</div><div class='add'>+	if (dpd-&gt;region == region)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	dpd-&gt;region = NL80211_DFS_UNSET;</div><div class='add'>+</div><div class='add'>+	rt = get_dfs_domain_radar_types(region);</div><div class='add'>+	if (rt == NULL)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* delete all channel detectors for previous DFS domain */</div><div class='add'>+	if (!list_empty(&amp;dpd-&gt;channel_detectors))</div><div class='add'>+		list_for_each_entry_safe(cd, cd0, &amp;dpd-&gt;channel_detectors, head)</div><div class='add'>+			channel_detector_exit(dpd, cd);</div><div class='add'>+	dpd-&gt;radar_spec = rt-&gt;radar_types;</div><div class='add'>+	dpd-&gt;num_radar_types = rt-&gt;num_radar_types;</div><div class='add'>+</div><div class='add'>+	dpd-&gt;region = region;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct dfs_pattern_detector default_dpd = {</div><div class='add'>+	.exit		= dpd_exit,</div><div class='add'>+	.set_domain	= dpd_set_domain,</div><div class='add'>+	.add_pulse	= dpd_add_pulse,</div><div class='add'>+	.region		= NL80211_DFS_UNSET,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dfs_pattern_detector *</div><div class='add'>+dfs_pattern_detector_init(enum nl80211_dfs_regions region)</div><div class='add'>+{</div><div class='add'>+	struct dfs_pattern_detector *dpd;</div><div class='add'>+	dpd = kmalloc(sizeof(*dpd), GFP_KERNEL);</div><div class='add'>+	if (dpd == NULL) {</div><div class='add'>+		pr_err("allocation of dfs_pattern_detector failed\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	*dpd = default_dpd;</div><div class='add'>+	INIT_LIST_HEAD(&amp;dpd-&gt;channel_detectors);</div><div class='add'>+</div><div class='add'>+	if (dpd-&gt;set_domain(dpd, region))</div><div class='add'>+		return dpd;</div><div class='add'>+</div><div class='add'>+	pr_err("Could not set DFS domain to %d. ", region);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(dfs_pattern_detector_init);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.h b/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.h<br/>new file mode 100644<br/>index 000000000000..fd0328a30995<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/dfs_pattern_detector.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs_pattern_detector.h</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2012 Neratec Solutions AG</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef DFS_PATTERN_DETECTOR_H</div><div class='add'>+#define DFS_PATTERN_DETECTOR_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/nl80211.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct pulse_event - describing pulses reported by PHY</div><div class='add'>+ * @ts: pulse time stamp in us</div><div class='add'>+ * @freq: channel frequency in MHz</div><div class='add'>+ * @width: pulse duration in us</div><div class='add'>+ * @rssi: rssi of radar event</div><div class='add'>+ */</div><div class='add'>+struct pulse_event {</div><div class='add'>+	u64 ts;</div><div class='add'>+	u16 freq;</div><div class='add'>+	u8 width;</div><div class='add'>+	u8 rssi;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct radar_detector_specs - detector specs for a radar pattern type</div><div class='add'>+ * @type_id: pattern type, as defined by regulatory</div><div class='add'>+ * @width_min: minimum radar pulse width in [us]</div><div class='add'>+ * @width_max: maximum radar pulse width in [us]</div><div class='add'>+ * @pri_min: minimum pulse repetition interval in [us] (including tolerance)</div><div class='add'>+ * @pri_max: minimum pri in [us] (including tolerance)</div><div class='add'>+ * @num_pri: maximum number of different pri for this type</div><div class='add'>+ * @ppb: pulses per bursts for this type</div><div class='add'>+ * @ppb_thresh: number of pulses required to trigger detection</div><div class='add'>+ * @max_pri_tolerance: pulse time stamp tolerance on both sides [us]</div><div class='add'>+ */</div><div class='add'>+struct radar_detector_specs {</div><div class='add'>+	u8 type_id;</div><div class='add'>+	u8 width_min;</div><div class='add'>+	u8 width_max;</div><div class='add'>+	u16 pri_min;</div><div class='add'>+	u16 pri_max;</div><div class='add'>+	u8 num_pri;</div><div class='add'>+	u8 ppb;</div><div class='add'>+	u8 ppb_thresh;</div><div class='add'>+	u8 max_pri_tolerance;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct dfs_pattern_detector - DFS pattern detector</div><div class='add'>+ * @exit(): destructor</div><div class='add'>+ * @set_domain(): set DFS domain, resets detector lines upon domain changes</div><div class='add'>+ * @add_pulse(): add radar pulse to detector, returns true on detection</div><div class='add'>+ * @region: active DFS region, NL80211_DFS_UNSET until set</div><div class='add'>+ * @num_radar_types: number of different radar types</div><div class='add'>+ * @last_pulse_ts: time stamp of last valid pulse in usecs</div><div class='add'>+ * @radar_detector_specs: array of radar detection specs</div><div class='add'>+ * @channel_detectors: list connecting channel_detector elements</div><div class='add'>+ */</div><div class='add'>+struct dfs_pattern_detector {</div><div class='add'>+	void (*exit)(struct dfs_pattern_detector *dpd);</div><div class='add'>+	bool (*set_domain)(struct dfs_pattern_detector *dpd,</div><div class='add'>+			   enum nl80211_dfs_regions region);</div><div class='add'>+	bool (*add_pulse)(struct dfs_pattern_detector *dpd,</div><div class='add'>+			  struct pulse_event *pe);</div><div class='add'>+</div><div class='add'>+	enum nl80211_dfs_regions region;</div><div class='add'>+	u8 num_radar_types;</div><div class='add'>+	u64 last_pulse_ts;</div><div class='add'>+</div><div class='add'>+	const struct radar_detector_specs *radar_spec;</div><div class='add'>+	struct list_head channel_detectors;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dfs_pattern_detector_init() - constructor for pattern detector class</div><div class='add'>+ * @param region: DFS domain to be used, can be NL80211_DFS_UNSET at creation</div><div class='add'>+ * @return instance pointer on success, NULL otherwise</div><div class='add'>+ */</div><div class='add'>+#if defined(CONFIG_ATH9K_DFS_CERTIFIED)</div><div class='add'>+extern struct dfs_pattern_detector *</div><div class='add'>+dfs_pattern_detector_init(enum nl80211_dfs_regions region);</div><div class='add'>+#else</div><div class='add'>+static inline struct dfs_pattern_detector *</div><div class='add'>+dfs_pattern_detector_init(enum nl80211_dfs_regions region)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_ATH9K_DFS_CERTIFIED */</div><div class='add'>+</div><div class='add'>+#endif /* DFS_PATTERN_DETECTOR_H */</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/dfs_pri_detector.c b/drivers/net/wireless/ath/ath9k/dfs_pri_detector.c<br/>new file mode 100644<br/>index 000000000000..91b8dceeadb1<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/dfs_pri_detector.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs_pri_detector.c</a></div><div class='hunk'>@@ -0,0 +1,452 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2012 Neratec Solutions AG</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ath9k.h"</div><div class='add'>+#include "dfs_pattern_detector.h"</div><div class='add'>+#include "dfs_pri_detector.h"</div><div class='add'>+#include "dfs_debug.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct pri_sequence - sequence of pulses matching one PRI</div><div class='add'>+ * @head: list_head</div><div class='add'>+ * @pri: pulse repetition interval (PRI) in usecs</div><div class='add'>+ * @dur: duration of sequence in usecs</div><div class='add'>+ * @count: number of pulses in this sequence</div><div class='add'>+ * @count_falses: number of not matching pulses in this sequence</div><div class='add'>+ * @first_ts: time stamp of first pulse in usecs</div><div class='add'>+ * @last_ts: time stamp of last pulse in usecs</div><div class='add'>+ * @deadline_ts: deadline when this sequence becomes invalid (first_ts + dur)</div><div class='add'>+ */</div><div class='add'>+struct pri_sequence {</div><div class='add'>+	struct list_head head;</div><div class='add'>+	u32 pri;</div><div class='add'>+	u32 dur;</div><div class='add'>+	u32 count;</div><div class='add'>+	u32 count_falses;</div><div class='add'>+	u64 first_ts;</div><div class='add'>+	u64 last_ts;</div><div class='add'>+	u64 deadline_ts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct pulse_elem - elements in pulse queue</div><div class='add'>+ * @ts: time stamp in usecs</div><div class='add'>+ */</div><div class='add'>+struct pulse_elem {</div><div class='add'>+	struct list_head head;</div><div class='add'>+	u64 ts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pde_get_multiple() - get number of multiples considering a given tolerance</div><div class='add'>+ * @return factor if abs(val - factor*fraction) &lt;= tolerance, 0 otherwise</div><div class='add'>+ */</div><div class='add'>+static u32 pde_get_multiple(u32 val, u32 fraction, u32 tolerance)</div><div class='add'>+{</div><div class='add'>+	u32 remainder;</div><div class='add'>+	u32 factor;</div><div class='add'>+	u32 delta;</div><div class='add'>+</div><div class='add'>+	if (fraction == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	delta = (val &lt; fraction) ? (fraction - val) : (val - fraction);</div><div class='add'>+</div><div class='add'>+	if (delta &lt;= tolerance)</div><div class='add'>+		/* val and fraction are within tolerance */</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	factor = val / fraction;</div><div class='add'>+	remainder = val % fraction;</div><div class='add'>+	if (remainder &gt; tolerance) {</div><div class='add'>+		/* no exact match */</div><div class='add'>+		if ((fraction - remainder) &lt;= tolerance)</div><div class='add'>+			/* remainder is within tolerance */</div><div class='add'>+			factor++;</div><div class='add'>+		else</div><div class='add'>+			factor = 0;</div><div class='add'>+	}</div><div class='add'>+	return factor;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: Singleton Pulse and Sequence Pools</div><div class='add'>+ *</div><div class='add'>+ * Instances of pri_sequence and pulse_elem are kept in singleton pools to</div><div class='add'>+ * reduce the number of dynamic allocations. They are shared between all</div><div class='add'>+ * instances and grow up to the peak number of simultaneously used objects.</div><div class='add'>+ *</div><div class='add'>+ * Memory is freed after all references to the pools are released.</div><div class='add'>+ */</div><div class='add'>+static u32 singleton_pool_references;</div><div class='add'>+static LIST_HEAD(pulse_pool);</div><div class='add'>+static LIST_HEAD(pseq_pool);</div><div class='add'>+static DEFINE_SPINLOCK(pool_lock);</div><div class='add'>+</div><div class='add'>+static void pool_register_ref(void)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;pool_lock);</div><div class='add'>+	singleton_pool_references++;</div><div class='add'>+	DFS_POOL_STAT_INC(pool_reference);</div><div class='add'>+	spin_unlock_bh(&amp;pool_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pool_deregister_ref(void)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;pool_lock);</div><div class='add'>+	singleton_pool_references--;</div><div class='add'>+	DFS_POOL_STAT_DEC(pool_reference);</div><div class='add'>+	if (singleton_pool_references == 0) {</div><div class='add'>+		/* free singleton pools with no references left */</div><div class='add'>+		struct pri_sequence *ps, *ps0;</div><div class='add'>+		struct pulse_elem *p, *p0;</div><div class='add'>+</div><div class='add'>+		list_for_each_entry_safe(p, p0, &amp;pulse_pool, head) {</div><div class='add'>+			list_del(&amp;p-&gt;head);</div><div class='add'>+			DFS_POOL_STAT_DEC(pulse_allocated);</div><div class='add'>+			kfree(p);</div><div class='add'>+		}</div><div class='add'>+		list_for_each_entry_safe(ps, ps0, &amp;pseq_pool, head) {</div><div class='add'>+			list_del(&amp;ps-&gt;head);</div><div class='add'>+			DFS_POOL_STAT_DEC(pseq_allocated);</div><div class='add'>+			kfree(ps);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;pool_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pool_put_pulse_elem(struct pulse_elem *pe)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;pool_lock);</div><div class='add'>+	list_add(&amp;pe-&gt;head, &amp;pulse_pool);</div><div class='add'>+	DFS_POOL_STAT_DEC(pulse_used);</div><div class='add'>+	spin_unlock_bh(&amp;pool_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pool_put_pseq_elem(struct pri_sequence *pse)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;pool_lock);</div><div class='add'>+	list_add(&amp;pse-&gt;head, &amp;pseq_pool);</div><div class='add'>+	DFS_POOL_STAT_DEC(pseq_used);</div><div class='add'>+	spin_unlock_bh(&amp;pool_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pri_sequence *pool_get_pseq_elem(void)</div><div class='add'>+{</div><div class='add'>+	struct pri_sequence *pse = NULL;</div><div class='add'>+	spin_lock_bh(&amp;pool_lock);</div><div class='add'>+	if (!list_empty(&amp;pseq_pool)) {</div><div class='add'>+		pse = list_first_entry(&amp;pseq_pool, struct pri_sequence, head);</div><div class='add'>+		list_del(&amp;pse-&gt;head);</div><div class='add'>+		DFS_POOL_STAT_INC(pseq_used);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;pool_lock);</div><div class='add'>+	return pse;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pulse_elem *pool_get_pulse_elem(void)</div><div class='add'>+{</div><div class='add'>+	struct pulse_elem *pe = NULL;</div><div class='add'>+	spin_lock_bh(&amp;pool_lock);</div><div class='add'>+	if (!list_empty(&amp;pulse_pool)) {</div><div class='add'>+		pe = list_first_entry(&amp;pulse_pool, struct pulse_elem, head);</div><div class='add'>+		list_del(&amp;pe-&gt;head);</div><div class='add'>+		DFS_POOL_STAT_INC(pulse_used);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;pool_lock);</div><div class='add'>+	return pe;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pulse_elem *pulse_queue_get_tail(struct pri_detector *pde)</div><div class='add'>+{</div><div class='add'>+	struct list_head *l = &amp;pde-&gt;pulses;</div><div class='add'>+	if (list_empty(l))</div><div class='add'>+		return NULL;</div><div class='add'>+	return list_entry(l-&gt;prev, struct pulse_elem, head);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool pulse_queue_dequeue(struct pri_detector *pde)</div><div class='add'>+{</div><div class='add'>+	struct pulse_elem *p = pulse_queue_get_tail(pde);</div><div class='add'>+	if (p != NULL) {</div><div class='add'>+		list_del_init(&amp;p-&gt;head);</div><div class='add'>+		pde-&gt;count--;</div><div class='add'>+		/* give it back to pool */</div><div class='add'>+		pool_put_pulse_elem(p);</div><div class='add'>+	}</div><div class='add'>+	return (pde-&gt;count &gt; 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* remove pulses older than window */</div><div class='add'>+static void pulse_queue_check_window(struct pri_detector *pde)</div><div class='add'>+{</div><div class='add'>+	u64 min_valid_ts;</div><div class='add'>+	struct pulse_elem *p;</div><div class='add'>+</div><div class='add'>+	/* there is no delta time with less than 2 pulses */</div><div class='add'>+	if (pde-&gt;count &lt; 2)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (pde-&gt;last_ts &lt;= pde-&gt;window_size)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	min_valid_ts = pde-&gt;last_ts - pde-&gt;window_size;</div><div class='add'>+	while ((p = pulse_queue_get_tail(pde)) != NULL) {</div><div class='add'>+		if (p-&gt;ts &gt;= min_valid_ts)</div><div class='add'>+			return;</div><div class='add'>+		pulse_queue_dequeue(pde);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool pulse_queue_enqueue(struct pri_detector *pde, u64 ts)</div><div class='add'>+{</div><div class='add'>+	struct pulse_elem *p = pool_get_pulse_elem();</div><div class='add'>+	if (p == NULL) {</div><div class='add'>+		p = kmalloc(sizeof(*p), GFP_KERNEL);</div><div class='add'>+		if (p == NULL) {</div><div class='add'>+			DFS_POOL_STAT_INC(pulse_alloc_error);</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+		DFS_POOL_STAT_INC(pulse_allocated);</div><div class='add'>+		DFS_POOL_STAT_INC(pulse_used);</div><div class='add'>+	}</div><div class='add'>+	INIT_LIST_HEAD(&amp;p-&gt;head);</div><div class='add'>+	p-&gt;ts = ts;</div><div class='add'>+	list_add(&amp;p-&gt;head, &amp;pde-&gt;pulses);</div><div class='add'>+	pde-&gt;count++;</div><div class='add'>+	pde-&gt;last_ts = ts;</div><div class='add'>+	pulse_queue_check_window(pde);</div><div class='add'>+	if (pde-&gt;count &gt;= pde-&gt;max_count)</div><div class='add'>+		pulse_queue_dequeue(pde);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool pseq_handler_create_sequences(struct pri_detector *pde,</div><div class='add'>+					  u64 ts, u32 min_count)</div><div class='add'>+{</div><div class='add'>+	struct pulse_elem *p;</div><div class='add'>+	list_for_each_entry(p, &amp;pde-&gt;pulses, head) {</div><div class='add'>+		struct pri_sequence ps, *new_ps;</div><div class='add'>+		struct pulse_elem *p2;</div><div class='add'>+		u32 tmp_false_count;</div><div class='add'>+		u64 min_valid_ts;</div><div class='add'>+		u32 delta_ts = ts - p-&gt;ts;</div><div class='add'>+</div><div class='add'>+		if (delta_ts &lt; pde-&gt;rs-&gt;pri_min)</div><div class='add'>+			/* ignore too small pri */</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (delta_ts &gt; pde-&gt;rs-&gt;pri_max)</div><div class='add'>+			/* stop on too large pri (sorted list) */</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* build a new sequence with new potential pri */</div><div class='add'>+		ps.count = 2;</div><div class='add'>+		ps.count_falses = 0;</div><div class='add'>+		ps.first_ts = p-&gt;ts;</div><div class='add'>+		ps.last_ts = ts;</div><div class='add'>+		ps.pri = ts - p-&gt;ts;</div><div class='add'>+		ps.dur = ps.pri * (pde-&gt;rs-&gt;ppb - 1)</div><div class='add'>+				+ 2 * pde-&gt;rs-&gt;max_pri_tolerance;</div><div class='add'>+</div><div class='add'>+		p2 = p;</div><div class='add'>+		tmp_false_count = 0;</div><div class='add'>+		min_valid_ts = ts - ps.dur;</div><div class='add'>+		/* check which past pulses are candidates for new sequence */</div><div class='add'>+		list_for_each_entry_continue(p2, &amp;pde-&gt;pulses, head) {</div><div class='add'>+			u32 factor;</div><div class='add'>+			if (p2-&gt;ts &lt; min_valid_ts)</div><div class='add'>+				/* stop on crossing window border */</div><div class='add'>+				break;</div><div class='add'>+			/* check if pulse match (multi)PRI */</div><div class='add'>+			factor = pde_get_multiple(ps.last_ts - p2-&gt;ts, ps.pri,</div><div class='add'>+						  pde-&gt;rs-&gt;max_pri_tolerance);</div><div class='add'>+			if (factor &gt; 0) {</div><div class='add'>+				ps.count++;</div><div class='add'>+				ps.first_ts = p2-&gt;ts;</div><div class='add'>+				/*</div><div class='add'>+				 * on match, add the intermediate falses</div><div class='add'>+				 * and reset counter</div><div class='add'>+				 */</div><div class='add'>+				ps.count_falses += tmp_false_count;</div><div class='add'>+				tmp_false_count = 0;</div><div class='add'>+			} else {</div><div class='add'>+				/* this is a potential false one */</div><div class='add'>+				tmp_false_count++;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (ps.count &lt; min_count)</div><div class='add'>+			/* did not reach minimum count, drop sequence */</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* this is a valid one, add it */</div><div class='add'>+		ps.deadline_ts = ps.first_ts + ps.dur;</div><div class='add'>+		new_ps = pool_get_pseq_elem();</div><div class='add'>+		if (new_ps == NULL) {</div><div class='add'>+			new_ps = kmalloc(sizeof(*new_ps), GFP_KERNEL);</div><div class='add'>+			if (new_ps == NULL) {</div><div class='add'>+				DFS_POOL_STAT_INC(pseq_alloc_error);</div><div class='add'>+				return false;</div><div class='add'>+			}</div><div class='add'>+			DFS_POOL_STAT_INC(pseq_allocated);</div><div class='add'>+			DFS_POOL_STAT_INC(pseq_used);</div><div class='add'>+		}</div><div class='add'>+		memcpy(new_ps, &amp;ps, sizeof(ps));</div><div class='add'>+		INIT_LIST_HEAD(&amp;new_ps-&gt;head);</div><div class='add'>+		list_add(&amp;new_ps-&gt;head, &amp;pde-&gt;sequences);</div><div class='add'>+	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* check new ts and add to all matching existing sequences */</div><div class='add'>+static u32</div><div class='add'>+pseq_handler_add_to_existing_seqs(struct pri_detector *pde, u64 ts)</div><div class='add'>+{</div><div class='add'>+	u32 max_count = 0;</div><div class='add'>+	struct pri_sequence *ps, *ps2;</div><div class='add'>+	list_for_each_entry_safe(ps, ps2, &amp;pde-&gt;sequences, head) {</div><div class='add'>+		u32 delta_ts;</div><div class='add'>+		u32 factor;</div><div class='add'>+</div><div class='add'>+		/* first ensure that sequence is within window */</div><div class='add'>+		if (ts &gt; ps-&gt;deadline_ts) {</div><div class='add'>+			list_del_init(&amp;ps-&gt;head);</div><div class='add'>+			pool_put_pseq_elem(ps);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		delta_ts = ts - ps-&gt;last_ts;</div><div class='add'>+		factor = pde_get_multiple(delta_ts, ps-&gt;pri,</div><div class='add'>+					  pde-&gt;rs-&gt;max_pri_tolerance);</div><div class='add'>+		if (factor &gt; 0) {</div><div class='add'>+			ps-&gt;last_ts = ts;</div><div class='add'>+			ps-&gt;count++;</div><div class='add'>+</div><div class='add'>+			if (max_count &lt; ps-&gt;count)</div><div class='add'>+				max_count = ps-&gt;count;</div><div class='add'>+		} else {</div><div class='add'>+			ps-&gt;count_falses++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return max_count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pri_sequence *</div><div class='add'>+pseq_handler_check_detection(struct pri_detector *pde)</div><div class='add'>+{</div><div class='add'>+	struct pri_sequence *ps;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;pde-&gt;sequences))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(ps, &amp;pde-&gt;sequences, head) {</div><div class='add'>+		/*</div><div class='add'>+		 * we assume to have enough matching confidence if we</div><div class='add'>+		 * 1) have enough pulses</div><div class='add'>+		 * 2) have more matching than false pulses</div><div class='add'>+		 */</div><div class='add'>+		if ((ps-&gt;count &gt;= pde-&gt;rs-&gt;ppb_thresh) &amp;&amp;</div><div class='add'>+		    (ps-&gt;count * pde-&gt;rs-&gt;num_pri &gt;= ps-&gt;count_falses))</div><div class='add'>+			return ps;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* free pulse queue and sequences list and give objects back to pools */</div><div class='add'>+static void pri_detector_reset(struct pri_detector *pde, u64 ts)</div><div class='add'>+{</div><div class='add'>+	struct pri_sequence *ps, *ps0;</div><div class='add'>+	struct pulse_elem *p, *p0;</div><div class='add'>+	list_for_each_entry_safe(ps, ps0, &amp;pde-&gt;sequences, head) {</div><div class='add'>+		list_del_init(&amp;ps-&gt;head);</div><div class='add'>+		pool_put_pseq_elem(ps);</div><div class='add'>+	}</div><div class='add'>+	list_for_each_entry_safe(p, p0, &amp;pde-&gt;pulses, head) {</div><div class='add'>+		list_del_init(&amp;p-&gt;head);</div><div class='add'>+		pool_put_pulse_elem(p);</div><div class='add'>+	}</div><div class='add'>+	pde-&gt;count = 0;</div><div class='add'>+	pde-&gt;last_ts = ts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pri_detector_exit(struct pri_detector *de)</div><div class='add'>+{</div><div class='add'>+	pri_detector_reset(de, 0);</div><div class='add'>+	pool_deregister_ref();</div><div class='add'>+	kfree(de);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool pri_detector_add_pulse(struct pri_detector *de,</div><div class='add'>+				   struct pulse_event *event)</div><div class='add'>+{</div><div class='add'>+	u32 max_updated_seq;</div><div class='add'>+	struct pri_sequence *ps;</div><div class='add'>+	u64 ts = event-&gt;ts;</div><div class='add'>+	const struct radar_detector_specs *rs = de-&gt;rs;</div><div class='add'>+</div><div class='add'>+	/* ignore pulses not within width range */</div><div class='add'>+	if ((rs-&gt;width_min &gt; event-&gt;width) || (rs-&gt;width_max &lt; event-&gt;width))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if ((ts - de-&gt;last_ts) &lt; rs-&gt;max_pri_tolerance)</div><div class='add'>+		/* if delta to last pulse is too short, don't use this pulse */</div><div class='add'>+		return false;</div><div class='add'>+	de-&gt;last_ts = ts;</div><div class='add'>+</div><div class='add'>+	max_updated_seq = pseq_handler_add_to_existing_seqs(de, ts);</div><div class='add'>+</div><div class='add'>+	if (!pseq_handler_create_sequences(de, ts, max_updated_seq)) {</div><div class='add'>+		pr_err("failed to create pulse sequences\n");</div><div class='add'>+		pri_detector_reset(de, ts);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ps = pseq_handler_check_detection(de);</div><div class='add'>+</div><div class='add'>+	if (ps != NULL) {</div><div class='add'>+		pr_info("DFS: radar found: pri=%d, count=%d, count_false=%d\n",</div><div class='add'>+			 ps-&gt;pri, ps-&gt;count, ps-&gt;count_falses);</div><div class='add'>+		pri_detector_reset(de, ts);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+	pulse_queue_enqueue(de, ts);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct pri_detector *</div><div class='add'>+pri_detector_init(const struct radar_detector_specs *rs)</div><div class='add'>+{</div><div class='add'>+	struct pri_detector *de;</div><div class='add'>+	de = kzalloc(sizeof(*de), GFP_KERNEL);</div><div class='add'>+	if (de == NULL)</div><div class='add'>+		return NULL;</div><div class='add'>+	de-&gt;exit = pri_detector_exit;</div><div class='add'>+	de-&gt;add_pulse = pri_detector_add_pulse;</div><div class='add'>+	de-&gt;reset = pri_detector_reset;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;de-&gt;sequences);</div><div class='add'>+	INIT_LIST_HEAD(&amp;de-&gt;pulses);</div><div class='add'>+	de-&gt;window_size = rs-&gt;pri_max * rs-&gt;ppb * rs-&gt;num_pri;</div><div class='add'>+	de-&gt;max_count = rs-&gt;ppb * 2;</div><div class='add'>+	de-&gt;rs = rs;</div><div class='add'>+</div><div class='add'>+	pool_register_ref();</div><div class='add'>+	return de;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/dfs_pri_detector.h b/drivers/net/wireless/ath/ath9k/dfs_pri_detector.h<br/>new file mode 100644<br/>index 000000000000..81cde9f28e44<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/dfs_pri_detector.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/dfs_pri_detector.h</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2012 Neratec Solutions AG</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef DFS_PRI_DETECTOR_H</div><div class='add'>+#define DFS_PRI_DETECTOR_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct pri_detector - PRI detector element for a dedicated radar type</div><div class='add'>+ * @exit(): destructor</div><div class='add'>+ * @add_pulse(): add pulse event, returns true if pattern was detected</div><div class='add'>+ * @reset(): clear states and reset to given time stamp</div><div class='add'>+ * @rs: detector specs for this detector element</div><div class='add'>+ * @last_ts: last pulse time stamp considered for this element in usecs</div><div class='add'>+ * @sequences: list_head holding potential pulse sequences</div><div class='add'>+ * @pulses: list connecting pulse_elem objects</div><div class='add'>+ * @count: number of pulses in queue</div><div class='add'>+ * @max_count: maximum number of pulses to be queued</div><div class='add'>+ * @window_size: window size back from newest pulse time stamp in usecs</div><div class='add'>+ */</div><div class='add'>+struct pri_detector {</div><div class='add'>+	void (*exit)     (struct pri_detector *de);</div><div class='add'>+	bool (*add_pulse)(struct pri_detector *de, struct pulse_event *e);</div><div class='add'>+	void (*reset)    (struct pri_detector *de, u64 ts);</div><div class='add'>+</div><div class='add'>+/* private: internal use only */</div><div class='add'>+	const struct radar_detector_specs *rs;</div><div class='add'>+	u64 last_ts;</div><div class='add'>+	struct list_head sequences;</div><div class='add'>+	struct list_head pulses;</div><div class='add'>+	u32 count;</div><div class='add'>+	u32 max_count;</div><div class='add'>+	u32 window_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pri_detector *pri_detector_init(const struct radar_detector_specs *rs);</div><div class='add'>+</div><div class='add'>+#endif /* DFS_PRI_DETECTOR_H */</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c<br/>index c43523233319..0512397a293c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/eeprom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/eeprom.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/eeprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/eeprom.c</a></div><div class='hunk'>@@ -16,14 +16,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "hw.h"</div><div class='ctx'> </div><div class='del'>-static inline u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz)</div><div class='del'>-{</div><div class='del'>-	if (fbin == AR5416_BCHAN_UNUSED)</div><div class='del'>-		return fbin;</div><div class='del'>-</div><div class='del'>-	return (u16) ((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val)</div><div class='ctx'> {</div><div class='ctx'>         REG_WRITE(ah, reg, val);</div><div class='hunk'>@@ -290,6 +282,34 @@ u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,</div><div class='ctx'> 	return twiceMaxEdgePower;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+u16 ath9k_hw_get_scaled_power(struct ath_hw *ah, u16 power_limit,</div><div class='add'>+			      u8 antenna_reduction)</div><div class='add'>+{</div><div class='add'>+	u16 reduction = antenna_reduction;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Reduce scaled Power by number of chains active</div><div class='add'>+	 * to get the per chain tx power level.</div><div class='add'>+	 */</div><div class='add'>+	switch (ar5416_get_ntxchains(ah-&gt;txchainmask)) {</div><div class='add'>+	case 1:</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		reduction += POWER_CORRECTION_FOR_TWO_CHAIN;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		reduction += POWER_CORRECTION_FOR_THREE_CHAIN;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (power_limit &gt; reduction)</div><div class='add'>+		power_limit -= reduction;</div><div class='add'>+	else</div><div class='add'>+		power_limit = 0;</div><div class='add'>+</div><div class='add'>+	return power_limit;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath_common *common = ath9k_hw_common(ah);</div><div class='hunk'>@@ -299,10 +319,10 @@ void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah)</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='del'>-		regulatory-&gt;max_power_level += INCREASE_MAXPOW_BY_TWO_CHAIN;</div><div class='add'>+		regulatory-&gt;max_power_level += POWER_CORRECTION_FOR_TWO_CHAIN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='del'>-		regulatory-&gt;max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN;</div><div class='add'>+		regulatory-&gt;max_power_level += POWER_CORRECTION_FOR_THREE_CHAIN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ath_dbg(common, EEPROM, "Invalid chainmask configuration\n");</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h<br/>index 5ff7ab965120..33acb920ed3f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/eeprom.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/eeprom.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/eeprom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/eeprom.h</a></div><div class='hunk'>@@ -79,8 +79,8 @@</div><div class='ctx'> #define SUB_NUM_CTL_MODES_AT_5G_40 2</div><div class='ctx'> #define SUB_NUM_CTL_MODES_AT_2G_40 3</div><div class='ctx'> </div><div class='del'>-#define INCREASE_MAXPOW_BY_TWO_CHAIN     6  /* 10*log10(2)*2 */</div><div class='del'>-#define INCREASE_MAXPOW_BY_THREE_CHAIN   10 /* 10*log10(3)*2 */</div><div class='add'>+#define POWER_CORRECTION_FOR_TWO_CHAIN		6  /* 10*log10(2)*2 */</div><div class='add'>+#define POWER_CORRECTION_FOR_THREE_CHAIN	10 /* 10*log10(3)*2 */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * For AR9285 and later chipsets, the following bits are not being programmed</div><div class='hunk'>@@ -686,6 +686,8 @@ void ath9k_hw_get_target_powers(struct ath_hw *ah,</div><div class='ctx'> 				u16 numRates, bool isHt40Target);</div><div class='ctx'> u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,</div><div class='ctx'> 				bool is2GHz, int num_band_edges);</div><div class='add'>+u16 ath9k_hw_get_scaled_power(struct ath_hw *ah, u16 power_limit,</div><div class='add'>+			      u8 antenna_reduction);</div><div class='ctx'> void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah);</div><div class='ctx'> int ath9k_hw_eeprom_init(struct ath_hw *ah);</div><div class='ctx'> </div><div class='hunk'>@@ -697,6 +699,14 @@ void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah,</div><div class='ctx'> 				u16 *pPdGainBoundaries, u8 *pPDADCValues,</div><div class='ctx'> 				u16 numXpdGains);</div><div class='ctx'> </div><div class='add'>+static inline u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz)</div><div class='add'>+{</div><div class='add'>+	if (fbin == AR5416_BCHAN_UNUSED)</div><div class='add'>+		return fbin;</div><div class='add'>+</div><div class='add'>+	return (u16) ((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define ar5416_get_ntxchains(_txchainmask)			\</div><div class='ctx'> 	(((_txchainmask &gt;&gt; 2) &amp; 1) +                            \</div><div class='ctx'> 	 ((_txchainmask &gt;&gt; 1) &amp; 1) + (_txchainmask &amp; 1))</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c<br/>index f272236d8053..aa614767adff 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/eeprom_9287.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/eeprom_9287.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/eeprom_9287.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/eeprom_9287.c</a></div><div class='hunk'>@@ -564,9 +564,6 @@ static void ath9k_hw_set_ar9287_power_per_rate_table(struct ath_hw *ah,</div><div class='ctx'> 	(((cfgCtl &amp; ~CTL_MODE_M) | (pCtlMode[ctlMode] &amp; CTL_MODE_M)) == \</div><div class='ctx'> 	 ((pEepData-&gt;ctlIndex[i] &amp; CTL_MODE_M) | SD_NO_CTL))</div><div class='ctx'> </div><div class='del'>-#define REDUCE_SCALED_POWER_BY_TWO_CHAIN     6</div><div class='del'>-#define REDUCE_SCALED_POWER_BY_THREE_CHAIN   10</div><div class='del'>-</div><div class='ctx'> 	u16 twiceMaxEdgePower;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct cal_ctl_data_ar9287 *rep;</div><div class='hunk'>@@ -591,29 +588,8 @@ static void ath9k_hw_set_ar9287_power_per_rate_table(struct ath_hw *ah,</div><div class='ctx'> 	tx_chainmask = ah-&gt;txchainmask;</div><div class='ctx'> </div><div class='ctx'> 	ath9k_hw_get_channel_centers(ah, chan, &amp;centers);</div><div class='del'>-	scaledPower = powerLimit - antenna_reduction;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Reduce scaled Power by number of chains active</div><div class='del'>-	 * to get the per chain tx power level.</div><div class='del'>-	 */</div><div class='del'>-	switch (ar5416_get_ntxchains(tx_chainmask)) {</div><div class='del'>-	case 1:</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		if (scaledPower &gt; REDUCE_SCALED_POWER_BY_TWO_CHAIN)</div><div class='del'>-			scaledPower -= REDUCE_SCALED_POWER_BY_TWO_CHAIN;</div><div class='del'>-		else</div><div class='del'>-			scaledPower = 0;</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-		if (scaledPower &gt; REDUCE_SCALED_POWER_BY_THREE_CHAIN)</div><div class='del'>-			scaledPower -= REDUCE_SCALED_POWER_BY_THREE_CHAIN;</div><div class='del'>-		else</div><div class='del'>-			scaledPower = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	scaledPower = max((u16)0, scaledPower);</div><div class='add'>+	scaledPower = ath9k_hw_get_scaled_power(ah, powerLimit,</div><div class='add'>+						antenna_reduction);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Get TX power from EEPROM.</div><div class='hunk'>@@ -786,8 +762,6 @@ static void ath9k_hw_set_ar9287_power_per_rate_table(struct ath_hw *ah,</div><div class='ctx'> </div><div class='ctx'> #undef CMP_CTL</div><div class='ctx'> #undef CMP_NO_CTL</div><div class='del'>-#undef REDUCE_SCALED_POWER_BY_TWO_CHAIN</div><div class='del'>-#undef REDUCE_SCALED_POWER_BY_THREE_CHAIN</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah,</div><div class='hunk'>@@ -824,6 +798,8 @@ static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah,</div><div class='ctx'> 			regulatory-&gt;max_power_level = ratesArray[i];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ath9k_hw_update_regulatory_maxpower(ah);</div><div class='add'>+</div><div class='ctx'> 	if (test)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c<br/>index 619b95d764ff..b5fba8b18b8b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/eeprom_def.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/eeprom_def.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/eeprom_def.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/eeprom_def.c</a></div><div class='hunk'>@@ -991,9 +991,6 @@ static void ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,</div><div class='ctx'> 						  u16 antenna_reduction,</div><div class='ctx'> 						  u16 powerLimit)</div><div class='ctx'> {</div><div class='del'>-#define REDUCE_SCALED_POWER_BY_TWO_CHAIN     6  /* 10*log10(2)*2 */</div><div class='del'>-#define REDUCE_SCALED_POWER_BY_THREE_CHAIN   9 /* 10*log10(3)*2 */</div><div class='del'>-</div><div class='ctx'> 	struct ar5416_eeprom_def *pEepData = &amp;ah-&gt;eeprom.def;</div><div class='ctx'> 	u16 twiceMaxEdgePower;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1027,24 +1024,8 @@ static void ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,</div><div class='ctx'> </div><div class='ctx'> 	ath9k_hw_get_channel_centers(ah, chan, &amp;centers);</div><div class='ctx'> </div><div class='del'>-	scaledPower = powerLimit - antenna_reduction;</div><div class='del'>-</div><div class='del'>-	switch (ar5416_get_ntxchains(tx_chainmask)) {</div><div class='del'>-	case 1:</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		if (scaledPower &gt; REDUCE_SCALED_POWER_BY_TWO_CHAIN)</div><div class='del'>-			scaledPower -= REDUCE_SCALED_POWER_BY_TWO_CHAIN;</div><div class='del'>-		else</div><div class='del'>-			scaledPower = 0;</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-		if (scaledPower &gt; REDUCE_SCALED_POWER_BY_THREE_CHAIN)</div><div class='del'>-			scaledPower -= REDUCE_SCALED_POWER_BY_THREE_CHAIN;</div><div class='del'>-		else</div><div class='del'>-			scaledPower = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	scaledPower = ath9k_hw_get_scaled_power(ah, powerLimit,</div><div class='add'>+						antenna_reduction);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_CHAN_2GHZ(chan)) {</div><div class='ctx'> 		numCtlModes = ARRAY_SIZE(ctlModesFor11g) -</div><div class='hunk'>@@ -1263,20 +1244,7 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,</div><div class='ctx'> 			regulatory-&gt;max_power_level = ratesArray[i];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch(ar5416_get_ntxchains(ah-&gt;txchainmask)) {</div><div class='del'>-	case 1:</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		regulatory-&gt;max_power_level += INCREASE_MAXPOW_BY_TWO_CHAIN;</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-		regulatory-&gt;max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ath_dbg(ath9k_hw_common(ah), EEPROM,</div><div class='del'>-			"Invalid chainmask configuration\n");</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	ath9k_hw_update_regulatory_maxpower(ah);</div><div class='ctx'> </div><div class='ctx'> 	if (test)</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/gpio.c b/drivers/net/wireless/ath/ath9k/gpio.c<br/>index fbe23de1297f..281a9af0f1b6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/gpio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/gpio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/gpio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/gpio.c</a></div><div class='hunk'>@@ -41,6 +41,9 @@ void ath_init_leds(struct ath_softc *sc)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (AR_SREV_9100(sc-&gt;sc_ah))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (sc-&gt;sc_ah-&gt;led_pin &lt; 0) {</div><div class='ctx'> 		if (AR_SREV_9287(sc-&gt;sc_ah))</div><div class='ctx'> 			sc-&gt;sc_ah-&gt;led_pin = ATH_LED_PIN_9287;</div><div class='hunk'>@@ -362,7 +365,7 @@ void ath9k_stop_btcoex(struct ath_softc *sc)</div><div class='ctx'> 		ath9k_hw_btcoex_disable(ah);</div><div class='ctx'> 		if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)</div><div class='ctx'> 			ath9k_btcoex_timer_pause(sc);</div><div class='del'>-		if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_MCI)</div><div class='add'>+		if (AR_SREV_9462(ah))</div><div class='ctx'> 			ath_mci_flush_profile(&amp;sc-&gt;btcoex.mci);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -373,7 +376,7 @@ void ath9k_deinit_btcoex(struct ath_softc *sc)</div><div class='ctx'> 	    ath9k_hw_get_btcoex_scheme(sc-&gt;sc_ah) == ATH_BTCOEX_CFG_3WIRE)</div><div class='ctx'> 		ath_gen_timer_free(sc-&gt;sc_ah, sc-&gt;btcoex.no_stomp_timer);</div><div class='ctx'> </div><div class='del'>-	if (ath9k_hw_get_btcoex_scheme(sc-&gt;sc_ah) == ATH_BTCOEX_CFG_MCI)</div><div class='add'>+	if (AR_SREV_9462(sc-&gt;sc_ah))</div><div class='ctx'> 		ath_mci_cleanup(sc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -399,17 +402,16 @@ int ath9k_init_btcoex(struct ath_softc *sc)</div><div class='ctx'> 		txq = sc-&gt;tx.txq_map[WME_AC_BE];</div><div class='ctx'> 		ath9k_hw_init_btcoex_hw(sc-&gt;sc_ah, txq-&gt;axq_qnum);</div><div class='ctx'> 		sc-&gt;btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;</div><div class='del'>-		break;</div><div class='del'>-	case ATH_BTCOEX_CFG_MCI:</div><div class='del'>-		sc-&gt;btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;</div><div class='del'>-		sc-&gt;btcoex.duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;</div><div class='del'>-		INIT_LIST_HEAD(&amp;sc-&gt;btcoex.mci.info);</div><div class='add'>+		if (AR_SREV_9462(ah)) {</div><div class='add'>+			sc-&gt;btcoex.duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;</div><div class='add'>+			INIT_LIST_HEAD(&amp;sc-&gt;btcoex.mci.info);</div><div class='ctx'> </div><div class='del'>-		r = ath_mci_setup(sc);</div><div class='del'>-		if (r)</div><div class='del'>-			return r;</div><div class='add'>+			r = ath_mci_setup(sc);</div><div class='add'>+			if (r)</div><div class='add'>+				return r;</div><div class='ctx'> </div><div class='del'>-		ath9k_hw_btcoex_init_mci(ah);</div><div class='add'>+			ath9k_hw_btcoex_init_mci(ah);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c<br/>index 424aabb2c730..aa327adcc3d8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/hif_usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/hif_usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/hif_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/hif_usb.c</a></div><div class='hunk'>@@ -53,6 +53,8 @@ static struct usb_device_id ath9k_hif_usb_ids[] = {</div><div class='ctx'> 	  .driver_info = AR9280_USB },  /* SMC Networks */</div><div class='ctx'> 	{ USB_DEVICE(0x0411, 0x017f),</div><div class='ctx'> 	  .driver_info = AR9280_USB },  /* Sony UWA-BR100 */</div><div class='add'>+	{ USB_DEVICE(0x04da, 0x3904),</div><div class='add'>+	  .driver_info = AR9280_USB },</div><div class='ctx'> </div><div class='ctx'> 	{ USB_DEVICE(0x0cf3, 0x20ff),</div><div class='ctx'> 	  .driver_info = STORAGE_DEVICE },</div><div class='hunk'>@@ -1356,6 +1358,7 @@ static struct usb_driver ath9k_hif_usb_driver = {</div><div class='ctx'> #endif</div><div class='ctx'> 	.id_table = ath9k_hif_usb_ids,</div><div class='ctx'> 	.soft_unbind = 1,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int ath9k_hif_usb_init(void)</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c<br/>index de5ee15ee639..25213d521bc2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/htc_drv_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/htc_drv_init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/htc_drv_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/htc_drv_init.c</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'>  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include "htc.h"</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Atheros Communications");</div><div class='hunk'>@@ -711,7 +713,8 @@ static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;wiphy-&gt;flags &amp;= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;</div><div class='ctx'> </div><div class='del'>-	hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_IBSS_RSN;</div><div class='add'>+	hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_IBSS_RSN |</div><div class='add'>+			    WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;queues = 4;</div><div class='ctx'> 	hw-&gt;channel_change_time = 5000;</div><div class='hunk'>@@ -966,9 +969,7 @@ int ath9k_htc_resume(struct htc_target *htc_handle)</div><div class='ctx'> static int __init ath9k_htc_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (ath9k_hif_usb_init() &lt; 0) {</div><div class='del'>-		printk(KERN_ERR</div><div class='del'>-			"ath9k_htc: No USB devices found,"</div><div class='del'>-			" driver not installed.\n");</div><div class='add'>+		pr_err("No USB devices found, driver not installed\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -979,6 +980,6 @@ module_init(ath9k_htc_init);</div><div class='ctx'> static void __exit ath9k_htc_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	ath9k_hif_usb_exit();</div><div class='del'>-	printk(KERN_INFO "ath9k_htc: Driver unloaded\n");</div><div class='add'>+	pr_info("Driver unloaded\n");</div><div class='ctx'> }</div><div class='ctx'> module_exit(ath9k_htc_exit);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/htc_hst.c b/drivers/net/wireless/ath/ath9k/htc_hst.c<br/>index c25226a32ddc..4a9570dfba72 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/htc_hst.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/htc_hst.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/htc_hst.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/htc_hst.c</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'>  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include "htc.h"</div><div class='ctx'> </div><div class='ctx'> static int htc_issue_send(struct htc_target *target, struct sk_buff* skb,</div><div class='hunk'>@@ -461,7 +463,7 @@ int ath9k_htc_hw_init(struct htc_target *target,</div><div class='ctx'> 		      char *product, u32 drv_info)</div><div class='ctx'> {</div><div class='ctx'> 	if (ath9k_htc_probe_device(target, dev, devid, product, drv_info)) {</div><div class='del'>-		printk(KERN_ERR "Failed to initialize the device\n");</div><div class='add'>+		pr_err("Failed to initialize the device\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c<br/>index 6c69e4e8b1cb..7db1890448f2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/hw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/hw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/hw.c</a></div><div class='hunk'>@@ -24,6 +24,8 @@</div><div class='ctx'> #include "rc.h"</div><div class='ctx'> #include "ar9003_mac.h"</div><div class='ctx'> #include "ar9003_mci.h"</div><div class='add'>+#include "debug.h"</div><div class='add'>+#include "ath9k.h"</div><div class='ctx'> </div><div class='ctx'> static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type);</div><div class='ctx'> </div><div class='hunk'>@@ -83,6 +85,53 @@ static void ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah)</div><div class='ctx'> /* Helper Functions */</div><div class='ctx'> /********************/</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ATH9K_DEBUGFS</div><div class='add'>+</div><div class='add'>+void ath9k_debug_sync_cause(struct ath_common *common, u32 sync_cause)</div><div class='add'>+{</div><div class='add'>+	struct ath_softc *sc = common-&gt;priv;</div><div class='add'>+	if (sync_cause)</div><div class='add'>+		sc-&gt;debug.stats.istats.sync_cause_all++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_RTC_IRQ)</div><div class='add'>+		sc-&gt;debug.stats.istats.sync_rtc_irq++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_MAC_IRQ)</div><div class='add'>+		sc-&gt;debug.stats.istats.sync_mac_irq++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_EEPROM_ILLEGAL_ACCESS)</div><div class='add'>+		sc-&gt;debug.stats.istats.eeprom_illegal_access++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_APB_TIMEOUT)</div><div class='add'>+		sc-&gt;debug.stats.istats.apb_timeout++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_PCI_MODE_CONFLICT)</div><div class='add'>+		sc-&gt;debug.stats.istats.pci_mode_conflict++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_HOST1_FATAL)</div><div class='add'>+		sc-&gt;debug.stats.istats.host1_fatal++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_HOST1_PERR)</div><div class='add'>+		sc-&gt;debug.stats.istats.host1_perr++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_TRCV_FIFO_PERR)</div><div class='add'>+		sc-&gt;debug.stats.istats.trcv_fifo_perr++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_RADM_CPL_EP)</div><div class='add'>+		sc-&gt;debug.stats.istats.radm_cpl_ep++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_RADM_CPL_DLLP_ABORT)</div><div class='add'>+		sc-&gt;debug.stats.istats.radm_cpl_dllp_abort++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_RADM_CPL_TLP_ABORT)</div><div class='add'>+		sc-&gt;debug.stats.istats.radm_cpl_tlp_abort++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_RADM_CPL_ECRC_ERR)</div><div class='add'>+		sc-&gt;debug.stats.istats.radm_cpl_ecrc_err++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_RADM_CPL_TIMEOUT)</div><div class='add'>+		sc-&gt;debug.stats.istats.radm_cpl_timeout++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_LOCAL_TIMEOUT)</div><div class='add'>+		sc-&gt;debug.stats.istats.local_timeout++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_PM_ACCESS)</div><div class='add'>+		sc-&gt;debug.stats.istats.pm_access++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_MAC_AWAKE)</div><div class='add'>+		sc-&gt;debug.stats.istats.mac_awake++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_MAC_ASLEEP)</div><div class='add'>+		sc-&gt;debug.stats.istats.mac_asleep++;</div><div class='add'>+	if (sync_cause &amp; AR_INTR_SYNC_MAC_SLEEP_ACCESS)</div><div class='add'>+		sc-&gt;debug.stats.istats.mac_sleep_access++;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> static void ath9k_hw_set_clockrate(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='ctx'> 	struct ieee80211_conf *conf = &amp;ath9k_hw_common(ah)-&gt;hw-&gt;conf;</div><div class='hunk'>@@ -142,6 +191,22 @@ bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ath9k_hw_wait);</div><div class='ctx'> </div><div class='add'>+void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,</div><div class='add'>+			  int hw_delay)</div><div class='add'>+{</div><div class='add'>+	if (IS_CHAN_B(chan))</div><div class='add'>+		hw_delay = (4 * hw_delay) / 22;</div><div class='add'>+	else</div><div class='add'>+		hw_delay /= 10;</div><div class='add'>+</div><div class='add'>+	if (IS_CHAN_HALF_RATE(chan))</div><div class='add'>+		hw_delay *= 2;</div><div class='add'>+	else if (IS_CHAN_QUARTER_RATE(chan))</div><div class='add'>+		hw_delay *= 4;</div><div class='add'>+</div><div class='add'>+	udelay(hw_delay + BASE_ACTIVATE_DELAY);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,</div><div class='ctx'> 			  int column, unsigned int *writecnt)</div><div class='ctx'> {</div><div class='hunk'>@@ -388,8 +453,8 @@ static void ath9k_hw_init_config(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	ah-&gt;config.dma_beacon_response_time = 2;</div><div class='del'>-	ah-&gt;config.sw_beacon_response_time = 10;</div><div class='add'>+	ah-&gt;config.dma_beacon_response_time = 1;</div><div class='add'>+	ah-&gt;config.sw_beacon_response_time = 6;</div><div class='ctx'> 	ah-&gt;config.additional_swba_backoff = 0;</div><div class='ctx'> 	ah-&gt;config.ack_6mb = 0x0;</div><div class='ctx'> 	ah-&gt;config.cwm_ignore_extcca = 0;</div><div class='hunk'>@@ -445,7 +510,6 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah)</div><div class='ctx'> 		AR_STA_ID1_MCAST_KSRCH;</div><div class='ctx'> 	if (AR_SREV_9100(ah))</div><div class='ctx'> 		ah-&gt;sta_id1_defaults |= AR_STA_ID1_AR9100_BA_FIX;</div><div class='del'>-	ah-&gt;enable_32kHz_clock = DONT_USE_32KHZ;</div><div class='ctx'> 	ah-&gt;slottime = ATH9K_SLOT_TIME_9;</div><div class='ctx'> 	ah-&gt;globaltxtimeout = (u32) -1;</div><div class='ctx'> 	ah-&gt;power_mode = ATH9K_PM_UNDEFINED;</div><div class='hunk'>@@ -972,7 +1036,7 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)</div><div class='ctx'> 	struct ath_common *common = ath9k_hw_common(ah);</div><div class='ctx'> 	struct ieee80211_conf *conf = &amp;common-&gt;hw-&gt;conf;</div><div class='ctx'> 	const struct ath9k_channel *chan = ah-&gt;curchan;</div><div class='del'>-	int acktimeout, ctstimeout;</div><div class='add'>+	int acktimeout, ctstimeout, ack_offset = 0;</div><div class='ctx'> 	int slottime;</div><div class='ctx'> 	int sifstime;</div><div class='ctx'> 	int rx_lat = 0, tx_lat = 0, eifs = 0;</div><div class='hunk'>@@ -993,6 +1057,11 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)</div><div class='ctx'> 		rx_lat = 37;</div><div class='ctx'> 	tx_lat = 54;</div><div class='ctx'> </div><div class='add'>+	if (IS_CHAN_5GHZ(chan))</div><div class='add'>+		sifstime = 16;</div><div class='add'>+	else</div><div class='add'>+		sifstime = 10;</div><div class='add'>+</div><div class='ctx'> 	if (IS_CHAN_HALF_RATE(chan)) {</div><div class='ctx'> 		eifs = 175;</div><div class='ctx'> 		rx_lat *= 2;</div><div class='hunk'>@@ -1000,8 +1069,9 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)</div><div class='ctx'> 		if (IS_CHAN_A_FAST_CLOCK(ah, chan))</div><div class='ctx'> 		    tx_lat += 11;</div><div class='ctx'> </div><div class='add'>+		sifstime *= 2;</div><div class='add'>+		ack_offset = 16;</div><div class='ctx'> 		slottime = 13;</div><div class='del'>-		sifstime = 32;</div><div class='ctx'> 	} else if (IS_CHAN_QUARTER_RATE(chan)) {</div><div class='ctx'> 		eifs = 340;</div><div class='ctx'> 		rx_lat = (rx_lat * 4) - 1;</div><div class='hunk'>@@ -1009,8 +1079,9 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)</div><div class='ctx'> 		if (IS_CHAN_A_FAST_CLOCK(ah, chan))</div><div class='ctx'> 		    tx_lat += 22;</div><div class='ctx'> </div><div class='add'>+		sifstime *= 4;</div><div class='add'>+		ack_offset = 32;</div><div class='ctx'> 		slottime = 21;</div><div class='del'>-		sifstime = 64;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (AR_SREV_9287(ah) &amp;&amp; AR_SREV_9287_13_OR_LATER(ah)) {</div><div class='ctx'> 			eifs = AR_D_GBL_IFS_EIFS_ASYNC_FIFO;</div><div class='hunk'>@@ -1024,14 +1095,10 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)</div><div class='ctx'> 		tx_lat = MS(reg, AR_USEC_TX_LAT);</div><div class='ctx'> </div><div class='ctx'> 		slottime = ah-&gt;slottime;</div><div class='del'>-		if (IS_CHAN_5GHZ(chan))</div><div class='del'>-			sifstime = 16;</div><div class='del'>-		else</div><div class='del'>-			sifstime = 10;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* As defined by IEEE 802.11-2007 17.3.8.6 */</div><div class='del'>-	acktimeout = slottime + sifstime + 3 * ah-&gt;coverage_class;</div><div class='add'>+	acktimeout = slottime + sifstime + 3 * ah-&gt;coverage_class + ack_offset;</div><div class='ctx'> 	ctstimeout = acktimeout;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1041,7 +1108,8 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)</div><div class='ctx'> 	 * BA frames in some implementations, but it has been found to fix ACK</div><div class='ctx'> 	 * timeout issues in other cases as well.</div><div class='ctx'> 	 */</div><div class='del'>-	if (conf-&gt;channel &amp;&amp; conf-&gt;channel-&gt;band == IEEE80211_BAND_2GHZ) {</div><div class='add'>+	if (conf-&gt;channel &amp;&amp; conf-&gt;channel-&gt;band == IEEE80211_BAND_2GHZ &amp;&amp;</div><div class='add'>+	    !IS_CHAN_HALF_RATE(chan) &amp;&amp; !IS_CHAN_QUARTER_RATE(chan)) {</div><div class='ctx'> 		acktimeout += 64 - sifstime - ah-&gt;slottime;</div><div class='ctx'> 		ctstimeout += 48 - sifstime - ah-&gt;slottime;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1400,6 +1468,9 @@ static bool ath9k_hw_chip_reset(struct ath_hw *ah,</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	ah-&gt;chip_fullsleep = false;</div><div class='add'>+</div><div class='add'>+	if (AR_SREV_9330(ah))</div><div class='add'>+		ar9003_hw_internal_regulator_apply(ah);</div><div class='ctx'> 	ath9k_hw_init_pll(ah, chan);</div><div class='ctx'> 	ath9k_hw_set_rfmode(ah, chan);</div><div class='ctx'> </div><div class='hunk'>@@ -1454,7 +1525,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> 	ath9k_hw_set_clockrate(ah);</div><div class='del'>-	ath9k_hw_apply_txpower(ah, chan);</div><div class='add'>+	ath9k_hw_apply_txpower(ah, chan, false);</div><div class='ctx'> 	ath9k_hw_rfbus_done(ah);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan))</div><div class='hunk'>@@ -1491,11 +1562,84 @@ static void ath9k_hw_apply_gpio_override(struct ath_hw *ah)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool ath9k_hw_check_dcs(u32 dma_dbg, u32 num_dcu_states,</div><div class='add'>+			       int *hang_state, int *hang_pos)</div><div class='add'>+{</div><div class='add'>+	static u32 dcu_chain_state[] = {5, 6, 9}; /* DCU chain stuck states */</div><div class='add'>+	u32 chain_state, dcs_pos, i;</div><div class='add'>+</div><div class='add'>+	for (dcs_pos = 0; dcs_pos &lt; num_dcu_states; dcs_pos++) {</div><div class='add'>+		chain_state = (dma_dbg &gt;&gt; (5 * dcs_pos)) &amp; 0x1f;</div><div class='add'>+		for (i = 0; i &lt; 3; i++) {</div><div class='add'>+			if (chain_state == dcu_chain_state[i]) {</div><div class='add'>+				*hang_state = chain_state;</div><div class='add'>+				*hang_pos = dcs_pos;</div><div class='add'>+				return true;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define DCU_COMPLETE_STATE        1</div><div class='add'>+#define DCU_COMPLETE_STATE_MASK 0x3</div><div class='add'>+#define NUM_STATUS_READS         50</div><div class='add'>+static bool ath9k_hw_detect_mac_hang(struct ath_hw *ah)</div><div class='add'>+{</div><div class='add'>+	u32 chain_state, comp_state, dcs_reg = AR_DMADBG_4;</div><div class='add'>+	u32 i, hang_pos, hang_state, num_state = 6;</div><div class='add'>+</div><div class='add'>+	comp_state = REG_READ(ah, AR_DMADBG_6);</div><div class='add'>+</div><div class='add'>+	if ((comp_state &amp; DCU_COMPLETE_STATE_MASK) != DCU_COMPLETE_STATE) {</div><div class='add'>+		ath_dbg(ath9k_hw_common(ah), RESET,</div><div class='add'>+			"MAC Hang signature not found at DCU complete\n");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chain_state = REG_READ(ah, dcs_reg);</div><div class='add'>+	if (ath9k_hw_check_dcs(chain_state, num_state, &amp;hang_state, &amp;hang_pos))</div><div class='add'>+		goto hang_check_iter;</div><div class='add'>+</div><div class='add'>+	dcs_reg = AR_DMADBG_5;</div><div class='add'>+	num_state = 4;</div><div class='add'>+	chain_state = REG_READ(ah, dcs_reg);</div><div class='add'>+	if (ath9k_hw_check_dcs(chain_state, num_state, &amp;hang_state, &amp;hang_pos))</div><div class='add'>+		goto hang_check_iter;</div><div class='add'>+</div><div class='add'>+	ath_dbg(ath9k_hw_common(ah), RESET,</div><div class='add'>+		"MAC Hang signature 1 not found\n");</div><div class='add'>+	return false;</div><div class='add'>+</div><div class='add'>+hang_check_iter:</div><div class='add'>+	ath_dbg(ath9k_hw_common(ah), RESET,</div><div class='add'>+		"DCU registers: chain %08x complete %08x Hang: state %d pos %d\n",</div><div class='add'>+		chain_state, comp_state, hang_state, hang_pos);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; NUM_STATUS_READS; i++) {</div><div class='add'>+		chain_state = REG_READ(ah, dcs_reg);</div><div class='add'>+		chain_state = (chain_state &gt;&gt; (5 * hang_pos)) &amp; 0x1f;</div><div class='add'>+		comp_state = REG_READ(ah, AR_DMADBG_6);</div><div class='add'>+</div><div class='add'>+		if (((comp_state &amp; DCU_COMPLETE_STATE_MASK) !=</div><div class='add'>+					DCU_COMPLETE_STATE) ||</div><div class='add'>+		    (chain_state != hang_state))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath_dbg(ath9k_hw_common(ah), RESET, "MAC Hang signature 1 found\n");</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool ath9k_hw_check_alive(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='ctx'> 	int count = 50;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='add'>+	if (AR_SREV_9300(ah))</div><div class='add'>+		return !ath9k_hw_detect_mac_hang(ah);</div><div class='add'>+</div><div class='ctx'> 	if (AR_SREV_9285_12_OR_LATER(ah))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='hunk'>@@ -1546,6 +1690,10 @@ static int ath9k_hw_do_fastcc(struct ath_hw *ah, struct ath9k_channel *chan)</div><div class='ctx'> 	if (chan-&gt;channel == ah-&gt;curchan-&gt;channel)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='add'>+	if ((ah-&gt;curchan-&gt;channelFlags | chan-&gt;channelFlags) &amp;</div><div class='add'>+	    (CHANNEL_HALF | CHANNEL_QUARTER))</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='ctx'> 	if ((chan-&gt;channelFlags &amp; CHANNEL_ALL) !=</div><div class='ctx'> 	    (ah-&gt;curchan-&gt;channelFlags &amp; CHANNEL_ALL))</div><div class='ctx'> 		goto fail;</div><div class='hunk'>@@ -1557,10 +1705,10 @@ static int ath9k_hw_do_fastcc(struct ath_hw *ah, struct ath9k_channel *chan)</div><div class='ctx'> 	 * For AR9462, make sure that calibration data for</div><div class='ctx'> 	 * re-using are present.</div><div class='ctx'> 	 */</div><div class='del'>-	if (AR_SREV_9462(ah) &amp;&amp; (!ah-&gt;caldata ||</div><div class='del'>-				 !ah-&gt;caldata-&gt;done_txiqcal_once ||</div><div class='del'>-				 !ah-&gt;caldata-&gt;done_txclcal_once ||</div><div class='del'>-				 !ah-&gt;caldata-&gt;rtt_hist.num_readings))</div><div class='add'>+	if (AR_SREV_9462(ah) &amp;&amp; (ah-&gt;caldata &amp;&amp;</div><div class='add'>+				 (!ah-&gt;caldata-&gt;done_txiqcal_once ||</div><div class='add'>+				  !ah-&gt;caldata-&gt;done_txclcal_once ||</div><div class='add'>+				  !ah-&gt;caldata-&gt;rtt_done)))</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='ctx'> 	ath_dbg(common, RESET, "FastChannelChange for %d -&gt; %d\n",</div><div class='hunk'>@@ -1796,7 +1944,6 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,</div><div class='ctx'> 	if (caldata) {</div><div class='ctx'> 		caldata-&gt;done_txiqcal_once = false;</div><div class='ctx'> 		caldata-&gt;done_txclcal_once = false;</div><div class='del'>-		caldata-&gt;rtt_hist.num_readings = 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!ath9k_hw_init_cal(ah, chan))</div><div class='ctx'> 		return -EIO;</div><div class='hunk'>@@ -2652,7 +2799,8 @@ static int get_antenna_gain(struct ath_hw *ah, struct ath9k_channel *chan)</div><div class='ctx'> 	return ah-&gt;eep_ops-&gt;get_eeprom(ah, gain_param);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan)</div><div class='add'>+void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan,</div><div class='add'>+			    bool test)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);</div><div class='ctx'> 	struct ieee80211_channel *channel;</div><div class='hunk'>@@ -2673,7 +2821,7 @@ void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan)</div><div class='ctx'> </div><div class='ctx'> 	ah-&gt;eep_ops-&gt;set_txpower(ah, chan,</div><div class='ctx'> 				 ath9k_regd_get_ctl(reg, chan),</div><div class='del'>-				 ant_reduction, new_pwr, false);</div><div class='add'>+				 ant_reduction, new_pwr, test);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test)</div><div class='hunk'>@@ -2686,7 +2834,7 @@ void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test)</div><div class='ctx'> 	if (test)</div><div class='ctx'> 		channel-&gt;max_power = MAX_RATE_POWER / 2;</div><div class='ctx'> </div><div class='del'>-	ath9k_hw_apply_txpower(ah, chan);</div><div class='add'>+	ath9k_hw_apply_txpower(ah, chan, test);</div><div class='ctx'> </div><div class='ctx'> 	if (test)</div><div class='ctx'> 		channel-&gt;max_power = DIV_ROUND_UP(reg-&gt;max_power_level, 2);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h<br/>index aa1680a0c7fd..b620c557c2a6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/hw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/hw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/hw.h</a></div><div class='hunk'>@@ -348,12 +348,6 @@ enum ath9k_int {</div><div class='ctx'> 	 CHANNEL_HT40MINUS)</div><div class='ctx'> </div><div class='ctx'> #define MAX_RTT_TABLE_ENTRY     6</div><div class='del'>-#define RTT_HIST_MAX            3</div><div class='del'>-struct ath9k_rtt_hist {</div><div class='del'>-	u32 table[AR9300_MAX_CHAINS][RTT_HIST_MAX][MAX_RTT_TABLE_ENTRY];</div><div class='del'>-	u8 num_readings;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define MAX_IQCAL_MEASUREMENT	8</div><div class='ctx'> #define MAX_CL_TAB_ENTRY	16</div><div class='ctx'> </div><div class='hunk'>@@ -363,6 +357,7 @@ struct ath9k_hw_cal_data {</div><div class='ctx'> 	int32_t CalValid;</div><div class='ctx'> 	int8_t iCoff;</div><div class='ctx'> 	int8_t qCoff;</div><div class='add'>+	bool rtt_done;</div><div class='ctx'> 	bool paprd_done;</div><div class='ctx'> 	bool nfcal_pending;</div><div class='ctx'> 	bool nfcal_interference;</div><div class='hunk'>@@ -373,8 +368,8 @@ struct ath9k_hw_cal_data {</div><div class='ctx'> 	u32 num_measures[AR9300_MAX_CHAINS];</div><div class='ctx'> 	int tx_corr_coeff[MAX_IQCAL_MEASUREMENT][AR9300_MAX_CHAINS];</div><div class='ctx'> 	u32 tx_clcal[AR9300_MAX_CHAINS][MAX_CL_TAB_ENTRY];</div><div class='add'>+	u32 rtt_table[AR9300_MAX_CHAINS][MAX_RTT_TABLE_ENTRY];</div><div class='ctx'> 	struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];</div><div class='del'>-	struct ath9k_rtt_hist rtt_hist;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath9k_channel {</div><div class='hunk'>@@ -708,7 +703,6 @@ struct ath_hw {</div><div class='ctx'> 	struct ar5416Stats stats;</div><div class='ctx'> 	struct ath9k_tx_queue_info txq[ATH9K_NUM_TX_QUEUES];</div><div class='ctx'> </div><div class='del'>-	int16_t curchan_rad_index;</div><div class='ctx'> 	enum ath9k_int imask;</div><div class='ctx'> 	u32 imrs2_reg;</div><div class='ctx'> 	u32 txok_interrupt_mask;</div><div class='hunk'>@@ -762,11 +756,6 @@ struct ath_hw {</div><div class='ctx'> </div><div class='ctx'> 	u32 sta_id1_defaults;</div><div class='ctx'> 	u32 misc_mode;</div><div class='del'>-	enum {</div><div class='del'>-		AUTO_32KHZ,</div><div class='del'>-		USE_32KHZ,</div><div class='del'>-		DONT_USE_32KHZ,</div><div class='del'>-	} enable_32kHz_clock;</div><div class='ctx'> </div><div class='ctx'> 	/* Private to hardware code */</div><div class='ctx'> 	struct ath_hw_private_ops private_ops;</div><div class='hunk'>@@ -783,7 +772,6 @@ struct ath_hw {</div><div class='ctx'> 	u32 *analogBank7Data;</div><div class='ctx'> 	u32 *bank6Temp;</div><div class='ctx'> </div><div class='del'>-	u8 txpower_limit;</div><div class='ctx'> 	int coverage_class;</div><div class='ctx'> 	u32 slottime;</div><div class='ctx'> 	u32 globaltxtimeout;</div><div class='hunk'>@@ -848,7 +836,6 @@ struct ath_hw {</div><div class='ctx'> 	struct ath_gen_timer_table hw_gen_timers;</div><div class='ctx'> </div><div class='ctx'> 	struct ar9003_txs *ts_ring;</div><div class='del'>-	void *ts_start;</div><div class='ctx'> 	u32 ts_paddr_start;</div><div class='ctx'> 	u32 ts_paddr_end;</div><div class='ctx'> 	u16 ts_tail;</div><div class='hunk'>@@ -915,7 +902,6 @@ static inline u8 get_streams(int mask)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Initialization, Detach, Reset */</div><div class='del'>-const char *ath9k_hw_probe(u16 vendorid, u16 devid);</div><div class='ctx'> void ath9k_hw_deinit(struct ath_hw *ah);</div><div class='ctx'> int ath9k_hw_init(struct ath_hw *ah);</div><div class='ctx'> int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,</div><div class='hunk'>@@ -932,6 +918,8 @@ void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val);</div><div class='ctx'> void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna);</div><div class='ctx'> </div><div class='ctx'> /* General Operation */</div><div class='add'>+void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,</div><div class='add'>+			  int hw_delay);</div><div class='ctx'> bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);</div><div class='ctx'> void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,</div><div class='ctx'> 			  int column, unsigned int *writecnt);</div><div class='hunk'>@@ -965,6 +953,13 @@ bool ath9k_hw_check_alive(struct ath_hw *ah);</div><div class='ctx'> </div><div class='ctx'> bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ATH9K_DEBUGFS</div><div class='add'>+void ath9k_debug_sync_cause(struct ath_common *common, u32 sync_cause);</div><div class='add'>+#else</div><div class='add'>+static inline void ath9k_debug_sync_cause(struct ath_common *common,</div><div class='add'>+					  u32 sync_cause) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* Generic hw timer primitives */</div><div class='ctx'> struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,</div><div class='ctx'> 					  void (*trigger)(void *),</div><div class='hunk'>@@ -985,7 +980,8 @@ void ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len);</div><div class='ctx'> /* PHY */</div><div class='ctx'> void ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled,</div><div class='ctx'> 				   u32 *coef_mantissa, u32 *coef_exponent);</div><div class='del'>-void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan);</div><div class='add'>+void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan,</div><div class='add'>+			    bool test);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Code Specific to AR5008, AR9001 or AR9002,</div><div class='hunk'>@@ -1011,7 +1007,6 @@ int ar9003_paprd_create_curve(struct ath_hw *ah,</div><div class='ctx'> int ar9003_paprd_setup_gain_table(struct ath_hw *ah, int chain);</div><div class='ctx'> int ar9003_paprd_init_table(struct ath_hw *ah);</div><div class='ctx'> bool ar9003_paprd_is_done(struct ath_hw *ah);</div><div class='del'>-void ar9003_hw_set_paprd_txdesc(struct ath_hw *ah, void *ds, u8 chains);</div><div class='ctx'> </div><div class='ctx'> /* Hardware family op attach helpers */</div><div class='ctx'> void ar5008_hw_attach_phy_ops(struct ath_hw *ah);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c<br/>index cb006458fc4b..dee9e092449a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/init.c</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'>  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/ath9k_platform.h&gt;</div><div class='hunk'>@@ -519,6 +521,8 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,</div><div class='ctx'> 	atomic_set(&amp;ah-&gt;intr_ref_cnt, -1);</div><div class='ctx'> 	sc-&gt;sc_ah = ah;</div><div class='ctx'> </div><div class='add'>+	sc-&gt;dfs_detector = dfs_pattern_detector_init(NL80211_DFS_UNSET);</div><div class='add'>+</div><div class='ctx'> 	if (!pdata) {</div><div class='ctx'> 		ah-&gt;ah_flags |= AH_USE_EEPROM;</div><div class='ctx'> 		sc-&gt;sc_ah-&gt;led_pin = -1;</div><div class='hunk'>@@ -642,6 +646,24 @@ void ath9k_reload_chainmask_settings(struct ath_softc *sc)</div><div class='ctx'> 		setup_ht_cap(sc, &amp;sc-&gt;sbands[IEEE80211_BAND_5GHZ].ht_cap);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct ieee80211_iface_limit if_limits[] = {</div><div class='add'>+	{ .max = 2048,	.types = BIT(NL80211_IFTYPE_STATION) |</div><div class='add'>+				 BIT(NL80211_IFTYPE_P2P_CLIENT) |</div><div class='add'>+				 BIT(NL80211_IFTYPE_WDS) },</div><div class='add'>+	{ .max = 8,	.types =</div><div class='add'>+#ifdef CONFIG_MAC80211_MESH</div><div class='add'>+				 BIT(NL80211_IFTYPE_MESH_POINT) |</div><div class='add'>+#endif</div><div class='add'>+				 BIT(NL80211_IFTYPE_AP) |</div><div class='add'>+				 BIT(NL80211_IFTYPE_P2P_GO) },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ieee80211_iface_combination if_comb = {</div><div class='add'>+	.limits = if_limits,</div><div class='add'>+	.n_limits = ARRAY_SIZE(if_limits),</div><div class='add'>+	.max_interfaces = 2048,</div><div class='add'>+	.num_different_channels = 1,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='hunk'>@@ -671,11 +693,15 @@ void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)</div><div class='ctx'> 		BIT(NL80211_IFTYPE_ADHOC) |</div><div class='ctx'> 		BIT(NL80211_IFTYPE_MESH_POINT);</div><div class='ctx'> </div><div class='add'>+	hw-&gt;wiphy-&gt;iface_combinations = &amp;if_comb;</div><div class='add'>+	hw-&gt;wiphy-&gt;n_iface_combinations = 1;</div><div class='add'>+</div><div class='ctx'> 	if (AR_SREV_5416(sc-&gt;sc_ah))</div><div class='ctx'> 		hw-&gt;wiphy-&gt;flags &amp;= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_IBSS_RSN;</div><div class='ctx'> 	hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_SUPPORTS_TDLS;</div><div class='add'>+	hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;queues = 4;</div><div class='ctx'> 	hw-&gt;max_rates = 4;</div><div class='hunk'>@@ -779,6 +805,7 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,</div><div class='ctx'> 			goto error_world;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	setup_timer(&amp;sc-&gt;rx_poll_timer, ath_rx_poll, (unsigned long)sc);</div><div class='ctx'> 	sc-&gt;last_rssi = ATH_RSSI_DUMMY_MARKER;</div><div class='ctx'> </div><div class='ctx'> 	ath_init_leds(sc);</div><div class='hunk'>@@ -821,6 +848,8 @@ static void ath9k_deinit_softc(struct ath_softc *sc)</div><div class='ctx'> 			ath_tx_cleanupq(sc, &amp;sc-&gt;tx.txq[i]);</div><div class='ctx'> </div><div class='ctx'> 	ath9k_hw_deinit(sc-&gt;sc_ah);</div><div class='add'>+	if (sc-&gt;dfs_detector != NULL)</div><div class='add'>+		sc-&gt;dfs_detector-&gt;exit(sc-&gt;dfs_detector);</div><div class='ctx'> </div><div class='ctx'> 	kfree(sc-&gt;sc_ah);</div><div class='ctx'> 	sc-&gt;sc_ah = NULL;</div><div class='hunk'>@@ -866,17 +895,14 @@ static int __init ath9k_init(void)</div><div class='ctx'> 	/* Register rate control algorithm */</div><div class='ctx'> 	error = ath_rate_control_register();</div><div class='ctx'> 	if (error != 0) {</div><div class='del'>-		printk(KERN_ERR</div><div class='del'>-			"ath9k: Unable to register rate control "</div><div class='del'>-			"algorithm: %d\n",</div><div class='del'>-			error);</div><div class='add'>+		pr_err("Unable to register rate control algorithm: %d\n",</div><div class='add'>+		       error);</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	error = ath_pci_init();</div><div class='ctx'> 	if (error &lt; 0) {</div><div class='del'>-		printk(KERN_ERR</div><div class='del'>-			"ath9k: No PCI devices found, driver not installed.\n");</div><div class='add'>+		pr_err("No PCI devices found, driver not installed\n");</div><div class='ctx'> 		error = -ENODEV;</div><div class='ctx'> 		goto err_rate_unregister;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -905,6 +931,6 @@ static void __exit ath9k_exit(void)</div><div class='ctx'> 	ath_ahb_exit();</div><div class='ctx'> 	ath_pci_exit();</div><div class='ctx'> 	ath_rate_control_unregister();</div><div class='del'>-	printk(KERN_INFO "%s: Driver unloaded\n", dev_info);</div><div class='add'>+	pr_info("%s: Driver unloaded\n", dev_info);</div><div class='ctx'> }</div><div class='ctx'> module_exit(ath9k_exit);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c<br/>index f7bd2532269c..04ef775ccee1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/mac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/mac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/mac.c</a></div><div class='hunk'>@@ -133,8 +133,16 @@ EXPORT_SYMBOL(ath9k_hw_updatetxtriglevel);</div><div class='ctx'> </div><div class='ctx'> void ath9k_hw_abort_tx_dma(struct ath_hw *ah)</div><div class='ctx'> {</div><div class='add'>+	int maxdelay = 1000;</div><div class='ctx'> 	int i, q;</div><div class='ctx'> </div><div class='add'>+	if (ah-&gt;curchan) {</div><div class='add'>+		if (IS_CHAN_HALF_RATE(ah-&gt;curchan))</div><div class='add'>+			maxdelay *= 2;</div><div class='add'>+		else if (IS_CHAN_QUARTER_RATE(ah-&gt;curchan))</div><div class='add'>+			maxdelay *= 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	REG_WRITE(ah, AR_Q_TXD, AR_Q_TXD_M);</div><div class='ctx'> </div><div class='ctx'> 	REG_SET_BIT(ah, AR_PCU_MISC, AR_PCU_FORCE_QUIET_COLL | AR_PCU_CLEAR_VMF);</div><div class='hunk'>@@ -142,7 +150,7 @@ void ath9k_hw_abort_tx_dma(struct ath_hw *ah)</div><div class='ctx'> 	REG_SET_BIT(ah, AR_D_GBL_IFS_MISC, AR_D_GBL_IFS_MISC_IGNORE_BACKOFF);</div><div class='ctx'> </div><div class='ctx'> 	for (q = 0; q &lt; AR_NUM_QCU; q++) {</div><div class='del'>-		for (i = 0; i &lt; 1000; i++) {</div><div class='add'>+		for (i = 0; i &lt; maxdelay; i++) {</div><div class='ctx'> 			if (i)</div><div class='ctx'> 				udelay(5);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c<br/>index 798ea57252b4..4de4473776ac 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/main.c</a></div><div class='hunk'>@@ -113,21 +113,25 @@ void ath9k_ps_restore(struct ath_softc *sc)</div><div class='ctx'> 	struct ath_common *common = ath9k_hw_common(sc-&gt;sc_ah);</div><div class='ctx'> 	enum ath9k_power_mode mode;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	bool reset;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;sc-&gt;sc_pm_lock, flags);</div><div class='ctx'> 	if (--sc-&gt;ps_usecount != 0)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='del'>-	if (sc-&gt;ps_idle &amp;&amp; (sc-&gt;ps_flags &amp; PS_WAIT_FOR_TX_ACK))</div><div class='add'>+	if (sc-&gt;ps_idle) {</div><div class='add'>+		ath9k_hw_setrxabort(sc-&gt;sc_ah, 1);</div><div class='add'>+		ath9k_hw_stopdmarecv(sc-&gt;sc_ah, &amp;reset);</div><div class='ctx'> 		mode = ATH9K_PM_FULL_SLEEP;</div><div class='del'>-	else if (sc-&gt;ps_enabled &amp;&amp;</div><div class='del'>-		 !(sc-&gt;ps_flags &amp; (PS_WAIT_FOR_BEACON |</div><div class='del'>-			      PS_WAIT_FOR_CAB |</div><div class='del'>-			      PS_WAIT_FOR_PSPOLL_DATA |</div><div class='del'>-			      PS_WAIT_FOR_TX_ACK)))</div><div class='add'>+	} else if (sc-&gt;ps_enabled &amp;&amp;</div><div class='add'>+		   !(sc-&gt;ps_flags &amp; (PS_WAIT_FOR_BEACON |</div><div class='add'>+				     PS_WAIT_FOR_CAB |</div><div class='add'>+				     PS_WAIT_FOR_PSPOLL_DATA |</div><div class='add'>+				     PS_WAIT_FOR_TX_ACK))) {</div><div class='ctx'> 		mode = ATH9K_PM_NETWORK_SLEEP;</div><div class='del'>-	else</div><div class='add'>+	} else {</div><div class='ctx'> 		goto unlock;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;common-&gt;cc_lock);</div><div class='ctx'> 	ath_hw_cycle_counters_update(common);</div><div class='hunk'>@@ -235,21 +239,23 @@ static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath_hw *ah = sc-&gt;sc_ah;</div><div class='ctx'> 	struct ath_common *common = ath9k_hw_common(ah);</div><div class='del'>-	bool ret;</div><div class='add'>+	bool ret = true;</div><div class='ctx'> </div><div class='ctx'> 	ieee80211_stop_queues(sc-&gt;hw);</div><div class='ctx'> </div><div class='ctx'> 	sc-&gt;hw_busy_count = 0;</div><div class='ctx'> 	del_timer_sync(&amp;common-&gt;ani.timer);</div><div class='add'>+	del_timer_sync(&amp;sc-&gt;rx_poll_timer);</div><div class='ctx'> </div><div class='ctx'> 	ath9k_debug_samp_bb_mac(sc);</div><div class='ctx'> 	ath9k_hw_disable_interrupts(ah);</div><div class='ctx'> </div><div class='del'>-	ret = ath_drain_all_txq(sc, retry_tx);</div><div class='del'>-</div><div class='ctx'> 	if (!ath_stoprecv(sc))</div><div class='ctx'> 		ret = false;</div><div class='ctx'> </div><div class='add'>+	if (!ath_drain_all_txq(sc, retry_tx))</div><div class='add'>+		ret = false;</div><div class='add'>+</div><div class='ctx'> 	if (!flush) {</div><div class='ctx'> 		if (ah-&gt;caps.hw_caps &amp; ATH9K_HW_CAP_EDMA)</div><div class='ctx'> 			ath_rx_tasklet(sc, 1, true);</div><div class='hunk'>@@ -282,6 +288,7 @@ static bool ath_complete_reset(struct ath_softc *sc, bool start)</div><div class='ctx'> </div><div class='ctx'> 		ieee80211_queue_delayed_work(sc-&gt;hw, &amp;sc-&gt;tx_complete_work, 0);</div><div class='ctx'> 		ieee80211_queue_delayed_work(sc-&gt;hw, &amp;sc-&gt;hw_pll_work, HZ/2);</div><div class='add'>+		ath_start_rx_poll(sc, 3);</div><div class='ctx'> 		if (!common-&gt;disable_ani)</div><div class='ctx'> 			ath_start_ani(common);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -690,17 +697,6 @@ void ath9k_tasklet(unsigned long data)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Only run the baseband hang check if beacons stop working in AP or</div><div class='del'>-	 * IBSS mode, because it has a high false positive rate. For station</div><div class='del'>-	 * mode it should not be necessary, since the upper layers will detect</div><div class='del'>-	 * this through a beacon miss automatically and the following channel</div><div class='del'>-	 * change will trigger a hardware reset anyway</div><div class='del'>-	 */</div><div class='del'>-	if (ath9k_hw_numtxpending(ah, sc-&gt;beacon.beaconq) != 0 &amp;&amp;</div><div class='del'>-	    !ath9k_hw_check_alive(ah))</div><div class='del'>-		ieee80211_queue_work(sc-&gt;hw, &amp;sc-&gt;hw_check_work);</div><div class='del'>-</div><div class='ctx'> 	if ((status &amp; ATH9K_INT_TSFOOR) &amp;&amp; sc-&gt;ps_enabled) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * TSF sync does not look correct; remain awake to sync with</div><div class='hunk'>@@ -912,10 +908,19 @@ void ath_hw_check(struct work_struct *work)</div><div class='ctx'> 	struct ath_common *common = ath9k_hw_common(sc-&gt;sc_ah);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int busy;</div><div class='add'>+	u8 is_alive, nbeacon = 1;</div><div class='ctx'> </div><div class='ctx'> 	ath9k_ps_wakeup(sc);</div><div class='del'>-	if (ath9k_hw_check_alive(sc-&gt;sc_ah))</div><div class='add'>+	is_alive = ath9k_hw_check_alive(sc-&gt;sc_ah);</div><div class='add'>+</div><div class='add'>+	if (is_alive &amp;&amp; !AR_SREV_9300(sc-&gt;sc_ah))</div><div class='ctx'> 		goto out;</div><div class='add'>+	else if (!is_alive &amp;&amp; AR_SREV_9300(sc-&gt;sc_ah)) {</div><div class='add'>+		ath_dbg(common, RESET,</div><div class='add'>+			"DCU stuck is detected. Schedule chip reset\n");</div><div class='add'>+		RESET_STAT_INC(sc, RESET_TYPE_MAC_HANG);</div><div class='add'>+		goto sched_reset;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;common-&gt;cc_lock, flags);</div><div class='ctx'> 	busy = ath_update_survey_stats(sc);</div><div class='hunk'>@@ -926,12 +931,18 @@ void ath_hw_check(struct work_struct *work)</div><div class='ctx'> 	if (busy &gt;= 99) {</div><div class='ctx'> 		if (++sc-&gt;hw_busy_count &gt;= 3) {</div><div class='ctx'> 			RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);</div><div class='del'>-			ieee80211_queue_work(sc-&gt;hw, &amp;sc-&gt;hw_reset_work);</div><div class='add'>+			goto sched_reset;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-	} else if (busy &gt;= 0)</div><div class='add'>+	} else if (busy &gt;= 0) {</div><div class='ctx'> 		sc-&gt;hw_busy_count = 0;</div><div class='add'>+		nbeacon = 3;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	ath_start_rx_poll(sc, nbeacon);</div><div class='add'>+	goto out;</div><div class='add'>+</div><div class='add'>+sched_reset:</div><div class='add'>+	ieee80211_queue_work(sc-&gt;hw, &amp;sc-&gt;hw_reset_work);</div><div class='ctx'> out:</div><div class='ctx'> 	ath9k_ps_restore(sc);</div><div class='ctx'> }</div><div class='hunk'>@@ -1094,14 +1105,7 @@ static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Cannot tx while the hardware is in full sleep, it first needs a full</div><div class='del'>-	 * chip reset to recover from that</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(sc-&gt;sc_ah-&gt;power_mode == ATH9K_PM_FULL_SLEEP))</div><div class='del'>-		goto exit;</div><div class='del'>-</div><div class='del'>-	if (unlikely(sc-&gt;sc_ah-&gt;power_mode != ATH9K_PM_AWAKE)) {</div><div class='add'>+	if (unlikely(sc-&gt;sc_ah-&gt;power_mode == ATH9K_PM_NETWORK_SLEEP)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * We are using PS-Poll and mac80211 can request TX while in</div><div class='ctx'> 		 * power save mode. Need to wake up hardware for the TX to be</div><div class='hunk'>@@ -1120,12 +1124,21 @@ static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)</div><div class='ctx'> 		}</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The actual restore operation will happen only after</div><div class='del'>-		 * the sc_flags bit is cleared. We are just dropping</div><div class='add'>+		 * the ps_flags bit is cleared. We are just dropping</div><div class='ctx'> 		 * the ps_usecount here.</div><div class='ctx'> 		 */</div><div class='ctx'> 		ath9k_ps_restore(sc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Cannot tx while the hardware is in full sleep, it first needs a full</div><div class='add'>+	 * chip reset to recover from that</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(sc-&gt;sc_ah-&gt;power_mode == ATH9K_PM_FULL_SLEEP)) {</div><div class='add'>+		ath_err(common, "TX while HW is in FULL_SLEEP mode\n");</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	memset(&amp;txctl, 0, sizeof(struct ath_tx_control));</div><div class='ctx'> 	txctl.txq = sc-&gt;tx.txq_map[skb_get_queue_mapping(skb)];</div><div class='ctx'> </div><div class='hunk'>@@ -1133,6 +1146,7 @@ static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	if (ath_tx_start(hw, skb, &amp;txctl) != 0) {</div><div class='ctx'> 		ath_dbg(common, XMIT, "TX failed\n");</div><div class='add'>+		TX_STAT_INC(txctl.txq-&gt;axq_qnum, txfailed);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1151,6 +1165,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)</div><div class='ctx'> 	mutex_lock(&amp;sc-&gt;mutex);</div><div class='ctx'> </div><div class='ctx'> 	ath_cancel_work(sc);</div><div class='add'>+	del_timer_sync(&amp;sc-&gt;rx_poll_timer);</div><div class='ctx'> </div><div class='ctx'> 	if (sc-&gt;sc_flags &amp; SC_OP_INVALID) {</div><div class='ctx'> 		ath_dbg(common, ANY, "Device not present\n");</div><div class='hunk'>@@ -1237,7 +1252,6 @@ static void ath9k_reclaim_beacon(struct ath_softc *sc,</div><div class='ctx'> 	ath9k_set_beaconing_status(sc, false);</div><div class='ctx'> 	ath_beacon_return(sc, avp);</div><div class='ctx'> 	ath9k_set_beaconing_status(sc, true);</div><div class='del'>-	sc-&gt;sc_flags &amp;= ~SC_OP_BEACONS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)</div><div class='hunk'>@@ -1368,21 +1382,31 @@ static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,</div><div class='ctx'> 	ath9k_calculate_summary_state(hw, vif);</div><div class='ctx'> </div><div class='ctx'> 	if (ath9k_uses_beacons(vif-&gt;type)) {</div><div class='del'>-		int error;</div><div class='del'>-		/* This may fail because upper levels do not have beacons</div><div class='del'>-		 * properly configured yet.  That's OK, we assume it</div><div class='del'>-		 * will be properly configured and then we will be notified</div><div class='del'>-		 * in the info_changed method and set up beacons properly</div><div class='del'>-		 * there.</div><div class='del'>-		 */</div><div class='add'>+		/* Reserve a beacon slot for the vif */</div><div class='ctx'> 		ath9k_set_beaconing_status(sc, false);</div><div class='del'>-		error = ath_beacon_alloc(sc, vif);</div><div class='del'>-		if (!error)</div><div class='del'>-			ath_beacon_config(sc, vif);</div><div class='add'>+		ath_beacon_alloc(sc, vif);</div><div class='ctx'> 		ath9k_set_beaconing_status(sc, true);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon)</div><div class='add'>+{</div><div class='add'>+	if (!AR_SREV_9300(sc-&gt;sc_ah))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!(sc-&gt;sc_flags &amp; SC_OP_PRIM_STA_VIF))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mod_timer(&amp;sc-&gt;rx_poll_timer, jiffies + msecs_to_jiffies</div><div class='add'>+			(nbeacon * sc-&gt;cur_beacon_conf.beacon_interval));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath_rx_poll(unsigned long data)</div><div class='add'>+{</div><div class='add'>+	struct ath_softc *sc = (struct ath_softc *)data;</div><div class='add'>+</div><div class='add'>+	ieee80211_queue_work(sc-&gt;hw, &amp;sc-&gt;hw_check_work);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int ath9k_add_interface(struct ieee80211_hw *hw,</div><div class='ctx'> 			       struct ieee80211_vif *vif)</div><div class='hunk'>@@ -1511,6 +1535,7 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw,</div><div class='ctx'> static void ath9k_enable_ps(struct ath_softc *sc)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath_hw *ah = sc-&gt;sc_ah;</div><div class='add'>+	struct ath_common *common = ath9k_hw_common(ah);</div><div class='ctx'> </div><div class='ctx'> 	sc-&gt;ps_enabled = true;</div><div class='ctx'> 	if (!(ah-&gt;caps.hw_caps &amp; ATH9K_HW_CAP_AUTOSLEEP)) {</div><div class='hunk'>@@ -1520,11 +1545,13 @@ static void ath9k_enable_ps(struct ath_softc *sc)</div><div class='ctx'> 		}</div><div class='ctx'> 		ath9k_hw_setrxabort(ah, 1);</div><div class='ctx'> 	}</div><div class='add'>+	ath_dbg(common, PS, "PowerSave enabled\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ath9k_disable_ps(struct ath_softc *sc)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath_hw *ah = sc-&gt;sc_ah;</div><div class='add'>+	struct ath_common *common = ath9k_hw_common(ah);</div><div class='ctx'> </div><div class='ctx'> 	sc-&gt;ps_enabled = false;</div><div class='ctx'> 	ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);</div><div class='hunk'>@@ -1539,7 +1566,7 @@ static void ath9k_disable_ps(struct ath_softc *sc)</div><div class='ctx'> 			ath9k_hw_set_interrupts(ah);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+	ath_dbg(common, PS, "PowerSave disabled\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath9k_config(struct ieee80211_hw *hw, u32 changed)</div><div class='hunk'>@@ -1911,6 +1938,8 @@ static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)</div><div class='ctx'> 		sc-&gt;last_rssi = ATH_RSSI_DUMMY_MARKER;</div><div class='ctx'> 		sc-&gt;sc_ah-&gt;stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;</div><div class='ctx'> </div><div class='add'>+		ath_start_rx_poll(sc, 3);</div><div class='add'>+</div><div class='ctx'> 		if (!common-&gt;disable_ani) {</div><div class='ctx'> 			sc-&gt;sc_flags |= SC_OP_ANI_RUN;</div><div class='ctx'> 			ath_start_ani(common);</div><div class='hunk'>@@ -1950,6 +1979,7 @@ static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)</div><div class='ctx'> 		/* Stop ANI */</div><div class='ctx'> 		sc-&gt;sc_flags &amp;= ~SC_OP_ANI_RUN;</div><div class='ctx'> 		del_timer_sync(&amp;common-&gt;ani.timer);</div><div class='add'>+		del_timer_sync(&amp;sc-&gt;rx_poll_timer);</div><div class='ctx'> 		memset(&amp;sc-&gt;caldata, 0, sizeof(sc-&gt;caldata));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1964,7 +1994,6 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,</div><div class='ctx'> 	struct ath_common *common = ath9k_hw_common(ah);</div><div class='ctx'> 	struct ath_vif *avp = (void *)vif-&gt;drv_priv;</div><div class='ctx'> 	int slottime;</div><div class='del'>-	int error;</div><div class='ctx'> </div><div class='ctx'> 	ath9k_ps_wakeup(sc);</div><div class='ctx'> 	mutex_lock(&amp;sc-&gt;mutex);</div><div class='hunk'>@@ -1993,16 +2022,29 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,</div><div class='ctx'> 		} else {</div><div class='ctx'> 			sc-&gt;sc_flags &amp;= ~SC_OP_ANI_RUN;</div><div class='ctx'> 			del_timer_sync(&amp;common-&gt;ani.timer);</div><div class='add'>+			del_timer_sync(&amp;sc-&gt;rx_poll_timer);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Enable transmission of beacons (AP, IBSS, MESH) */</div><div class='del'>-	if ((changed &amp; BSS_CHANGED_BEACON) ||</div><div class='del'>-	    ((changed &amp; BSS_CHANGED_BEACON_ENABLED) &amp;&amp; bss_conf-&gt;enable_beacon)) {</div><div class='add'>+	/*</div><div class='add'>+	 * In case of AP mode, the HW TSF has to be reset</div><div class='add'>+	 * when the beacon interval changes.</div><div class='add'>+	 */</div><div class='add'>+	if ((changed &amp; BSS_CHANGED_BEACON_INT) &amp;&amp;</div><div class='add'>+	    (vif-&gt;type == NL80211_IFTYPE_AP))</div><div class='add'>+		sc-&gt;sc_flags |= SC_OP_TSF_RESET;</div><div class='add'>+</div><div class='add'>+	/* Configure beaconing (AP, IBSS, MESH) */</div><div class='add'>+	if (ath9k_uses_beacons(vif-&gt;type) &amp;&amp;</div><div class='add'>+	    ((changed &amp; BSS_CHANGED_BEACON) ||</div><div class='add'>+	     (changed &amp; BSS_CHANGED_BEACON_ENABLED) ||</div><div class='add'>+	     (changed &amp; BSS_CHANGED_BEACON_INT))) {</div><div class='ctx'> 		ath9k_set_beaconing_status(sc, false);</div><div class='del'>-		error = ath_beacon_alloc(sc, vif);</div><div class='del'>-		if (!error)</div><div class='del'>-			ath_beacon_config(sc, vif);</div><div class='add'>+		if (bss_conf-&gt;enable_beacon)</div><div class='add'>+			ath_beacon_alloc(sc, vif);</div><div class='add'>+		else</div><div class='add'>+			avp-&gt;is_bslot_active = false;</div><div class='add'>+		ath_beacon_config(sc, vif);</div><div class='ctx'> 		ath9k_set_beaconing_status(sc, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2025,30 +2067,6 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Disable transmission of beacons */</div><div class='del'>-	if ((changed &amp; BSS_CHANGED_BEACON_ENABLED) &amp;&amp;</div><div class='del'>-	    !bss_conf-&gt;enable_beacon) {</div><div class='del'>-		ath9k_set_beaconing_status(sc, false);</div><div class='del'>-		avp-&gt;is_bslot_active = false;</div><div class='del'>-		ath9k_set_beaconing_status(sc, true);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (changed &amp; BSS_CHANGED_BEACON_INT) {</div><div class='del'>-		/*</div><div class='del'>-		 * In case of AP mode, the HW TSF has to be reset</div><div class='del'>-		 * when the beacon interval changes.</div><div class='del'>-		 */</div><div class='del'>-		if (vif-&gt;type == NL80211_IFTYPE_AP) {</div><div class='del'>-			sc-&gt;sc_flags |= SC_OP_TSF_RESET;</div><div class='del'>-			ath9k_set_beaconing_status(sc, false);</div><div class='del'>-			error = ath_beacon_alloc(sc, vif);</div><div class='del'>-			if (!error)</div><div class='del'>-				ath_beacon_config(sc, vif);</div><div class='del'>-			ath9k_set_beaconing_status(sc, true);</div><div class='del'>-		} else</div><div class='del'>-			ath_beacon_config(sc, vif);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	mutex_unlock(&amp;sc-&gt;mutex);</div><div class='ctx'> 	ath9k_ps_restore(sc);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c<br/>index 77dc327def8d..a856b51255f4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/pci.c</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'>  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/nl80211.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/pci-aspm.h&gt;</div><div class='hunk'>@@ -171,14 +173,13 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	ret =  pci_set_dma_mask(pdev, DMA_BIT_MASK(32));</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		printk(KERN_ERR "ath9k: 32-bit DMA not available\n");</div><div class='add'>+		pr_err("32-bit DMA not available\n");</div><div class='ctx'> 		goto err_dma;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		printk(KERN_ERR "ath9k: 32-bit DMA consistent "</div><div class='del'>-			"DMA enable failed\n");</div><div class='add'>+		pr_err("32-bit DMA consistent DMA enable failed\n");</div><div class='ctx'> 		goto err_dma;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -224,7 +225,7 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	mem = pci_iomap(pdev, 0, 0);</div><div class='ctx'> 	if (!mem) {</div><div class='del'>-		printk(KERN_ERR "PCI memory map error\n") ;</div><div class='add'>+		pr_err("PCI memory map error\n") ;</div><div class='ctx'> 		ret = -EIO;</div><div class='ctx'> 		goto err_iomap;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c<br/>index 08bb45532701..92a6c0a87f89 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/rc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/rc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/rc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/rc.c</a></div><div class='hunk'>@@ -1436,7 +1436,7 @@ static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband,</div><div class='ctx'> </div><div class='ctx'> static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband,</div><div class='ctx'> 			    struct ieee80211_sta *sta, void *priv_sta,</div><div class='del'>-			    u32 changed, enum nl80211_channel_type oper_chan_type)</div><div class='add'>+			    u32 changed)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath_softc *sc = priv;</div><div class='ctx'> 	struct ath_rate_priv *ath_rc_priv = priv_sta;</div><div class='hunk'>@@ -1447,12 +1447,11 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband,</div><div class='ctx'> </div><div class='ctx'> 	/* FIXME: Handle AP mode later when we support CWM */</div><div class='ctx'> </div><div class='del'>-	if (changed &amp; IEEE80211_RC_HT_CHANGED) {</div><div class='add'>+	if (changed &amp; IEEE80211_RC_BW_CHANGED) {</div><div class='ctx'> 		if (sc-&gt;sc_ah-&gt;opmode != NL80211_IFTYPE_STATION)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		if (oper_chan_type == NL80211_CHAN_HT40MINUS ||</div><div class='del'>-		    oper_chan_type == NL80211_CHAN_HT40PLUS)</div><div class='add'>+		if (sta-&gt;ht_cap.cap &amp; IEEE80211_HT_CAP_SUP_WIDTH_20_40)</div><div class='ctx'> 			oper_cw40 = true;</div><div class='ctx'> </div><div class='ctx'> 		if (oper_cw40)</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c<br/>index 1c4583c7ff7c..e1fcc68124dc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/recv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/recv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/recv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/recv.c</a></div><div class='hunk'>@@ -812,6 +812,7 @@ static bool ath9k_rx_accept(struct ath_common *common,</div><div class='ctx'> 	is_valid_tkip = rx_stats-&gt;rs_keyix != ATH9K_RXKEYIX_INVALID &amp;&amp;</div><div class='ctx'> 		test_bit(rx_stats-&gt;rs_keyix, common-&gt;tkip_keymap);</div><div class='ctx'> 	strip_mic = is_valid_tkip &amp;&amp; ieee80211_is_data(fc) &amp;&amp;</div><div class='add'>+		ieee80211_has_protected(fc) &amp;&amp;</div><div class='ctx'> 		!(rx_stats-&gt;rs_status &amp;</div><div class='ctx'> 		(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC |</div><div class='ctx'> 		 ATH9K_RXERR_KEYMISS));</div><div class='hunk'>@@ -824,15 +825,20 @@ static bool ath9k_rx_accept(struct ath_common *common,</div><div class='ctx'> 	if (rx_stats-&gt;rs_keyix == ATH9K_RXKEYIX_INVALID)</div><div class='ctx'> 		rx_stats-&gt;rs_status &amp;= ~ATH9K_RXERR_KEYMISS;</div><div class='ctx'> </div><div class='del'>-	if (!rx_stats-&gt;rs_datalen)</div><div class='add'>+	if (!rx_stats-&gt;rs_datalen) {</div><div class='add'>+		RX_STAT_INC(rx_len_err);</div><div class='ctx'> 		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'>         /*</div><div class='ctx'>          * rs_status follows rs_datalen so if rs_datalen is too large</div><div class='ctx'>          * we can take a hint that hardware corrupted it, so ignore</div><div class='ctx'>          * those frames.</div><div class='ctx'>          */</div><div class='del'>-	if (rx_stats-&gt;rs_datalen &gt; (common-&gt;rx_bufsize - rx_status_len))</div><div class='add'>+	if (rx_stats-&gt;rs_datalen &gt; (common-&gt;rx_bufsize - rx_status_len)) {</div><div class='add'>+		RX_STAT_INC(rx_len_err);</div><div class='ctx'> 		return false;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Only use error bits from the last fragment */</div><div class='ctx'> 	if (rx_stats-&gt;rs_more)</div><div class='hunk'>@@ -902,6 +908,7 @@ static int ath9k_process_rate(struct ath_common *common,</div><div class='ctx'> 	struct ieee80211_supported_band *sband;</div><div class='ctx'> 	enum ieee80211_band band;</div><div class='ctx'> 	unsigned int i = 0;</div><div class='add'>+	struct ath_softc __maybe_unused *sc = common-&gt;priv;</div><div class='ctx'> </div><div class='ctx'> 	band = hw-&gt;conf.channel-&gt;band;</div><div class='ctx'> 	sband = hw-&gt;wiphy-&gt;bands[band];</div><div class='hunk'>@@ -936,7 +943,7 @@ static int ath9k_process_rate(struct ath_common *common,</div><div class='ctx'> 	ath_dbg(common, ANY,</div><div class='ctx'> 		"unsupported hw bitrate detected 0x%02x using 1 Mbit\n",</div><div class='ctx'> 		rx_stats-&gt;rs_rate);</div><div class='del'>-</div><div class='add'>+	RX_STAT_INC(rx_rate_err);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1823,10 +1830,14 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)</div><div class='ctx'> </div><div class='ctx'> 		hdr = (struct ieee80211_hdr *) (hdr_skb-&gt;data + rx_status_len);</div><div class='ctx'> 		rxs = IEEE80211_SKB_RXCB(hdr_skb);</div><div class='del'>-		if (ieee80211_is_beacon(hdr-&gt;frame_control) &amp;&amp;</div><div class='del'>-		    !is_zero_ether_addr(common-&gt;curbssid) &amp;&amp;</div><div class='del'>-		    !compare_ether_addr(hdr-&gt;addr3, common-&gt;curbssid))</div><div class='del'>-			rs.is_mybeacon = true;</div><div class='add'>+		if (ieee80211_is_beacon(hdr-&gt;frame_control)) {</div><div class='add'>+			RX_STAT_INC(rx_beacons);</div><div class='add'>+			if (!is_zero_ether_addr(common-&gt;curbssid) &amp;&amp;</div><div class='add'>+			    ether_addr_equal(hdr-&gt;addr3, common-&gt;curbssid))</div><div class='add'>+				rs.is_mybeacon = true;</div><div class='add'>+			else</div><div class='add'>+				rs.is_mybeacon = false;</div><div class='add'>+		}</div><div class='ctx'> 		else</div><div class='ctx'> 			rs.is_mybeacon = false;</div><div class='ctx'> </div><div class='hunk'>@@ -1836,8 +1847,10 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)</div><div class='ctx'> 		 * If we're asked to flush receive queue, directly</div><div class='ctx'> 		 * chain it back at the queue without processing it.</div><div class='ctx'> 		 */</div><div class='del'>-		if (sc-&gt;sc_flags &amp; SC_OP_RXFLUSH)</div><div class='add'>+		if (sc-&gt;sc_flags &amp; SC_OP_RXFLUSH) {</div><div class='add'>+			RX_STAT_INC(rx_drop_rxflush);</div><div class='ctx'> 			goto requeue_drop_frag;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		memset(rxs, 0, sizeof(struct ieee80211_rx_status));</div><div class='ctx'> </div><div class='hunk'>@@ -1855,6 +1868,10 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)</div><div class='ctx'> 		if (retval)</div><div class='ctx'> 			goto requeue_drop_frag;</div><div class='ctx'> </div><div class='add'>+		if (rs.is_mybeacon) {</div><div class='add'>+			sc-&gt;hw_busy_count = 0;</div><div class='add'>+			ath_start_rx_poll(sc, 3);</div><div class='add'>+		}</div><div class='ctx'> 		/* Ensure we always have an skb to requeue once we are done</div><div class='ctx'> 		 * processing the current buffer's skb */</div><div class='ctx'> 		requeue_skb = ath_rxbuf_alloc(common, common-&gt;rx_bufsize, GFP_ATOMIC);</div><div class='hunk'>@@ -1863,8 +1880,10 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)</div><div class='ctx'> 		 * tell hardware it can give us a new frame using the old</div><div class='ctx'> 		 * skb and put it at the tail of the sc-&gt;rx.rxbuf list for</div><div class='ctx'> 		 * processing. */</div><div class='del'>-		if (!requeue_skb)</div><div class='add'>+		if (!requeue_skb) {</div><div class='add'>+			RX_STAT_INC(rx_oom_err);</div><div class='ctx'> 			goto requeue_drop_frag;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* Unmap the frame */</div><div class='ctx'> 		dma_unmap_single(sc-&gt;dev, bf-&gt;bf_buf_addr,</div><div class='hunk'>@@ -1895,6 +1914,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (rs.rs_more) {</div><div class='add'>+			RX_STAT_INC(rx_frags);</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * rs_more indicates chained descriptors which can be</div><div class='ctx'> 			 * used to link buffers together for a sort of</div><div class='hunk'>@@ -1904,6 +1924,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)</div><div class='ctx'> 				/* too many fragments - cannot handle frame */</div><div class='ctx'> 				dev_kfree_skb_any(sc-&gt;rx.frag);</div><div class='ctx'> 				dev_kfree_skb_any(skb);</div><div class='add'>+				RX_STAT_INC(rx_too_many_frags_err);</div><div class='ctx'> 				skb = NULL;</div><div class='ctx'> 			}</div><div class='ctx'> 			sc-&gt;rx.frag = skb;</div><div class='hunk'>@@ -1915,6 +1936,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)</div><div class='ctx'> </div><div class='ctx'> 			if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) &lt; 0) {</div><div class='ctx'> 				dev_kfree_skb(skb);</div><div class='add'>+				RX_STAT_INC(rx_oom_err);</div><div class='ctx'> 				goto requeue_drop_frag;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c<br/>index 23eaa1b26ebe..d59dd01d6cde 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/xmit.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/ath9k/xmit.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/ath9k/xmit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/ath9k/xmit.c</a></div><div class='hunk'>@@ -64,7 +64,8 @@ static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid,</div><div class='ctx'> static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,</div><div class='ctx'> 					   struct ath_txq *txq,</div><div class='ctx'> 					   struct ath_atx_tid *tid,</div><div class='del'>-					   struct sk_buff *skb);</div><div class='add'>+					   struct sk_buff *skb,</div><div class='add'>+					   bool dequeue);</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='ctx'> 	MCS_HT20,</div><div class='hunk'>@@ -811,7 +812,7 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,</div><div class='ctx'> 		fi = get_frame_info(skb);</div><div class='ctx'> 		bf = fi-&gt;bf;</div><div class='ctx'> 		if (!fi-&gt;bf)</div><div class='del'>-			bf = ath_tx_setup_buffer(sc, txq, tid, skb);</div><div class='add'>+			bf = ath_tx_setup_buffer(sc, txq, tid, skb, true);</div><div class='ctx'> </div><div class='ctx'> 		if (!bf)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -1726,7 +1727,7 @@ static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bf = ath_tx_setup_buffer(sc, txctl-&gt;txq, tid, skb);</div><div class='add'>+	bf = ath_tx_setup_buffer(sc, txctl-&gt;txq, tid, skb, false);</div><div class='ctx'> 	if (!bf)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -1753,7 +1754,7 @@ static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,</div><div class='ctx'> </div><div class='ctx'> 	bf = fi-&gt;bf;</div><div class='ctx'> 	if (!bf)</div><div class='del'>-		bf = ath_tx_setup_buffer(sc, txq, tid, skb);</div><div class='add'>+		bf = ath_tx_setup_buffer(sc, txq, tid, skb, false);</div><div class='ctx'> </div><div class='ctx'> 	if (!bf)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1814,7 +1815,8 @@ u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate)</div><div class='ctx'> static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,</div><div class='ctx'> 					   struct ath_txq *txq,</div><div class='ctx'> 					   struct ath_atx_tid *tid,</div><div class='del'>-					   struct sk_buff *skb)</div><div class='add'>+					   struct sk_buff *skb,</div><div class='add'>+					   bool dequeue)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath_common *common = ath9k_hw_common(sc-&gt;sc_ah);</div><div class='ctx'> 	struct ath_frame_info *fi = get_frame_info(skb);</div><div class='hunk'>@@ -1863,6 +1865,8 @@ static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,</div><div class='ctx'> 	return bf;</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='add'>+	if (dequeue)</div><div class='add'>+		__skb_unlink(skb, &amp;tid-&gt;buf_q);</div><div class='ctx'> 	dev_kfree_skb_any(skb);</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -1893,7 +1897,7 @@ static void ath_tx_start_dma(struct ath_softc *sc, struct sk_buff *skb,</div><div class='ctx'> 		 */</div><div class='ctx'> 		ath_tx_send_ampdu(sc, tid, skb, txctl);</div><div class='ctx'> 	} else {</div><div class='del'>-		bf = ath_tx_setup_buffer(sc, txctl-&gt;txq, tid, skb);</div><div class='add'>+		bf = ath_tx_setup_buffer(sc, txctl-&gt;txq, tid, skb, false);</div><div class='ctx'> 		if (!bf)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/carl9170/cmd.h b/drivers/net/wireless/ath/carl9170/cmd.h<br/>index 885c42778b8b..65919c902f55 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/carl9170/cmd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/carl9170/cmd.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/carl9170/cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/carl9170/cmd.h</a></div><div class='hunk'>@@ -114,7 +114,7 @@ __regwrite_out :							\</div><div class='ctx'> </div><div class='ctx'> #define carl9170_regwrite_result()					\</div><div class='ctx'> 	__err;								\</div><div class='del'>-} while (0);</div><div class='add'>+} while (0)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #define carl9170_async_regwrite_get_buf()				\</div><div class='hunk'>@@ -126,7 +126,7 @@ do {									\</div><div class='ctx'> 		__err = -ENOMEM;					\</div><div class='ctx'> 		goto __async_regwrite_out;				\</div><div class='ctx'> 	}								\</div><div class='del'>-} while (0);</div><div class='add'>+} while (0)</div><div class='ctx'> </div><div class='ctx'> #define carl9170_async_regwrite_begin(carl)				\</div><div class='ctx'> do {									\</div><div class='hunk'>@@ -169,6 +169,6 @@ __async_regwrite_out:							\</div><div class='ctx'> </div><div class='ctx'> #define carl9170_async_regwrite_result()				\</div><div class='ctx'> 	__err;								\</div><div class='del'>-} while (0);</div><div class='add'>+} while (0)</div><div class='ctx'> </div><div class='ctx'> #endif /* __CMD_H */</div><div class='head'>diff --git a/drivers/net/wireless/ath/carl9170/fw.c b/drivers/net/wireless/ath/carl9170/fw.c<br/>index cffde8d9a521..5c73c03872f3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/carl9170/fw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/carl9170/fw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/carl9170/fw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/carl9170/fw.c</a></div><div class='hunk'>@@ -355,6 +355,8 @@ static int carl9170_fw(struct ar9170 *ar, const __u8 *data, size_t len)</div><div class='ctx'> </div><div class='ctx'> 	ar-&gt;hw-&gt;wiphy-&gt;interface_modes |= if_comb_types;</div><div class='ctx'> </div><div class='add'>+	ar-&gt;hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;</div><div class='add'>+</div><div class='ctx'> #undef SUPPORTED</div><div class='ctx'> 	return carl9170_fw_tx_sequence(ar);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/ath/carl9170/rx.c b/drivers/net/wireless/ath/carl9170/rx.c<br/>index dc99030ea8b6..84b22eec7abd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/carl9170/rx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/carl9170/rx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/carl9170/rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/carl9170/rx.c</a></div><div class='hunk'>@@ -538,7 +538,7 @@ static void carl9170_ps_beacon(struct ar9170 *ar, void *data, unsigned int len)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* and only beacons from the associated BSSID, please */</div><div class='del'>-	if (compare_ether_addr(hdr-&gt;addr3, ar-&gt;common.curbssid) ||</div><div class='add'>+	if (!ether_addr_equal(hdr-&gt;addr3, ar-&gt;common.curbssid) ||</div><div class='ctx'> 	    !ar-&gt;common.curaid)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/carl9170/usb.c b/drivers/net/wireless/ath/carl9170/usb.c<br/>index 89821e4835c7..888152ce3eca 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/carl9170/usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/carl9170/usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/carl9170/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/carl9170/usb.c</a></div><div class='hunk'>@@ -1159,6 +1159,7 @@ static struct usb_driver carl9170_driver = {</div><div class='ctx'> 	.resume = carl9170_usb_resume,</div><div class='ctx'> 	.reset_resume = carl9170_usb_resume,</div><div class='ctx'> #endif /* CONFIG_PM */</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(carl9170_driver);</div><div class='head'>diff --git a/drivers/net/wireless/ath/main.c b/drivers/net/wireless/ath/main.c<br/>index ea2c737138d3..8e99540cd90e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/main.c</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'>  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -49,7 +51,7 @@ struct sk_buff *ath_rxbuf_alloc(struct ath_common *common,</div><div class='ctx'> 		if (off != 0)</div><div class='ctx'> 			skb_reserve(skb, common-&gt;cachelsz - off);</div><div class='ctx'> 	} else {</div><div class='del'>-		printk(KERN_ERR "skbuff alloc of size %u failed\n", len);</div><div class='add'>+		pr_err("skbuff alloc of size %u failed\n", len);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/regd.c b/drivers/net/wireless/ath/regd.c<br/>index 10dea37431b3..d81698015bf7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ath/regd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ath/regd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ath/regd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ath/regd.c</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'>  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;net/cfg80211.h&gt;</div><div class='hunk'>@@ -562,7 +564,7 @@ static int __ath_regd_init(struct ath_regulatory *reg)</div><div class='ctx'> 	printk(KERN_DEBUG "ath: EEPROM regdomain: 0x%0x\n", reg-&gt;current_rd);</div><div class='ctx'> </div><div class='ctx'> 	if (!ath_regd_is_eeprom_valid(reg)) {</div><div class='del'>-		printk(KERN_ERR "ath: Invalid EEPROM contents\n");</div><div class='add'>+		pr_err("Invalid EEPROM contents\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/atmel.c b/drivers/net/wireless/atmel.c<br/>index 6c87a823f5a9..d07c0301da6a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/atmel.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/atmel.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/atmel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/atmel.c</a></div><div class='hunk'>@@ -3989,8 +3989,7 @@ static int reset_atmel_card(struct net_device *dev)</div><div class='ctx'> 			atmel_copy_to_card(priv-&gt;dev, 0x8000, &amp;fw[0x6000], len - 0x6000);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (fw_entry)</div><div class='del'>-			release_firmware(fw_entry);</div><div class='add'>+		release_firmware(fw_entry);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = atmel_wakeup_firmware(priv);</div><div class='head'>diff --git a/drivers/net/wireless/atmel_pci.c b/drivers/net/wireless/atmel_pci.c<br/>index 9ab1192004c0..51e33b53386e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/atmel_pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/atmel_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/atmel_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/atmel_pci.c</a></div><div class='hunk'>@@ -74,15 +74,4 @@ static void __devexit atmel_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> 	stop_atmel_card(pci_get_drvdata(pdev));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init atmel_init_module(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;atmel_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit atmel_cleanup_module(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;atmel_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(atmel_init_module);</div><div class='del'>-module_exit(atmel_cleanup_module);</div><div class='add'>+module_pci_driver(atmel_driver);</div><div class='head'>diff --git a/drivers/net/wireless/b43/bus.c b/drivers/net/wireless/b43/bus.c<br/>index 424692df239d..565fdbdd6915 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/b43/bus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/b43/bus.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/b43/bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43/bus.c</a></div><div class='hunk'>@@ -107,11 +107,9 @@ struct b43_bus_dev *b43_bus_dev_bcma_init(struct bcma_device *core)</div><div class='ctx'> 	dev-&gt;dma_dev = core-&gt;dma_dev;</div><div class='ctx'> 	dev-&gt;irq = core-&gt;irq;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='ctx'> 	dev-&gt;board_vendor = core-&gt;bus-&gt;boardinfo.vendor;</div><div class='ctx'> 	dev-&gt;board_type = core-&gt;bus-&gt;boardinfo.type;</div><div class='del'>-	dev-&gt;board_rev = core-&gt;bus-&gt;boardinfo.rev;</div><div class='del'>-	*/</div><div class='add'>+	dev-&gt;board_rev = core-&gt;bus-&gt;sprom.board_rev;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;chip_id = core-&gt;bus-&gt;chipinfo.id;</div><div class='ctx'> 	dev-&gt;chip_rev = core-&gt;bus-&gt;chipinfo.rev;</div><div class='hunk'>@@ -210,7 +208,7 @@ struct b43_bus_dev *b43_bus_dev_ssb_init(struct ssb_device *sdev)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;board_vendor = sdev-&gt;bus-&gt;boardinfo.vendor;</div><div class='ctx'> 	dev-&gt;board_type = sdev-&gt;bus-&gt;boardinfo.type;</div><div class='del'>-	dev-&gt;board_rev = sdev-&gt;bus-&gt;boardinfo.rev;</div><div class='add'>+	dev-&gt;board_rev = sdev-&gt;bus-&gt;sprom.board_rev;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;chip_id = sdev-&gt;bus-&gt;chip_id;</div><div class='ctx'> 	dev-&gt;chip_rev = sdev-&gt;bus-&gt;chip_rev;</div><div class='head'>diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c<br/>index b5f1b91002bb..777cd74921d7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/b43/dma.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/b43/dma.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/b43/dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43/dma.c</a></div><div class='hunk'>@@ -1109,7 +1109,7 @@ static bool b43_dma_translation_in_low_word(struct b43_wldev *dev,</div><div class='ctx'> #ifdef CONFIG_B43_SSB</div><div class='ctx'> 	if (dev-&gt;dev-&gt;bus_type == B43_BUS_SSB &amp;&amp;</div><div class='ctx'> 	    dev-&gt;dev-&gt;sdev-&gt;bus-&gt;bustype == SSB_BUSTYPE_PCI &amp;&amp;</div><div class='del'>-	    !(dev-&gt;dev-&gt;sdev-&gt;bus-&gt;host_pci-&gt;is_pcie &amp;&amp;</div><div class='add'>+	    !(pci_is_pcie(dev-&gt;dev-&gt;sdev-&gt;bus-&gt;host_pci) &amp;&amp;</div><div class='ctx'> 	      ssb_read32(dev-&gt;dev-&gt;sdev, SSB_TMSHIGH) &amp; SSB_TMSHIGH_DMA64))</div><div class='ctx'> 			return 1;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c<br/>index c79e6638c88d..5a39b226b2e3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/b43/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/b43/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/b43/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43/main.c</a></div><div class='hunk'>@@ -4010,6 +4010,20 @@ static int b43_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,</div><div class='ctx'> 	if (modparam_nohwcrypt)</div><div class='ctx'> 		return -ENOSPC; /* User disabled HW-crypto */</div><div class='ctx'> </div><div class='add'>+	if ((vif-&gt;type == NL80211_IFTYPE_ADHOC ||</div><div class='add'>+	     vif-&gt;type == NL80211_IFTYPE_MESH_POINT) &amp;&amp;</div><div class='add'>+	    (key-&gt;cipher == WLAN_CIPHER_SUITE_TKIP ||</div><div class='add'>+	     key-&gt;cipher == WLAN_CIPHER_SUITE_CCMP) &amp;&amp;</div><div class='add'>+	    !(key-&gt;flags &amp; IEEE80211_KEY_FLAG_PAIRWISE)) {</div><div class='add'>+		/*</div><div class='add'>+		 * For now, disable hw crypto for the RSN IBSS group keys. This</div><div class='add'>+		 * could be optimized in the future, but until that gets</div><div class='add'>+		 * implemented, use of software crypto for group addressed</div><div class='add'>+		 * frames is a acceptable to allow RSN IBSS to be used.</div><div class='add'>+		 */</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;wl-&gt;mutex);</div><div class='ctx'> </div><div class='ctx'> 	dev = wl-&gt;current_dev;</div><div class='hunk'>@@ -4827,8 +4841,14 @@ static int b43_op_start(struct ieee80211_hw *hw)</div><div class='ctx'>  out_mutex_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;wl-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	/* reload configuration */</div><div class='del'>-	b43_op_config(hw, ~0);</div><div class='add'>+	/*</div><div class='add'>+	 * Configuration may have been overwritten during initialization.</div><div class='add'>+	 * Reload the configuration, but only if initialization was</div><div class='add'>+	 * successful. Reloading the configuration after a failed init</div><div class='add'>+	 * may hang the system.</div><div class='add'>+	 */</div><div class='add'>+	if (!err)</div><div class='add'>+		b43_op_config(hw, ~0);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -5223,10 +5243,10 @@ static void b43_sprom_fixup(struct ssb_bus *bus)</div><div class='ctx'> </div><div class='ctx'> 	/* boardflags workarounds */</div><div class='ctx'> 	if (bus-&gt;boardinfo.vendor == SSB_BOARDVENDOR_DELL &amp;&amp;</div><div class='del'>-	    bus-&gt;chip_id == 0x4301 &amp;&amp; bus-&gt;boardinfo.rev == 0x74)</div><div class='add'>+	    bus-&gt;chip_id == 0x4301 &amp;&amp; bus-&gt;sprom.board_rev == 0x74)</div><div class='ctx'> 		bus-&gt;sprom.boardflags_lo |= B43_BFL_BTCOEXIST;</div><div class='ctx'> 	if (bus-&gt;boardinfo.vendor == PCI_VENDOR_ID_APPLE &amp;&amp;</div><div class='del'>-	    bus-&gt;boardinfo.type == 0x4E &amp;&amp; bus-&gt;boardinfo.rev &gt; 0x40)</div><div class='add'>+	    bus-&gt;boardinfo.type == 0x4E &amp;&amp; bus-&gt;sprom.board_rev &gt; 0x40)</div><div class='ctx'> 		bus-&gt;sprom.boardflags_lo |= B43_BFL_PACTRL;</div><div class='ctx'> 	if (bus-&gt;bustype == SSB_BUSTYPE_PCI) {</div><div class='ctx'> 		pdev = bus-&gt;host_pci;</div><div class='hunk'>@@ -5275,6 +5295,8 @@ static struct b43_wl *b43_wireless_init(struct b43_bus_dev *dev)</div><div class='ctx'> 		BIT(NL80211_IFTYPE_WDS) |</div><div class='ctx'> 		BIT(NL80211_IFTYPE_ADHOC);</div><div class='ctx'> </div><div class='add'>+	hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_IBSS_RSN;</div><div class='add'>+</div><div class='ctx'> 	hw-&gt;queues = modparam_qos ? B43_QOS_QUEUE_NUM : 1;</div><div class='ctx'> 	wl-&gt;mac80211_initially_registered_queues = hw-&gt;queues;</div><div class='ctx'> 	hw-&gt;max_rates = 2;</div><div class='head'>diff --git a/drivers/net/wireless/b43/sdio.c b/drivers/net/wireless/b43/sdio.c<br/>index 80b0755ed3af..a54fb2d29089 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/b43/sdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/b43/sdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/b43/sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43/sdio.c</a></div><div class='hunk'>@@ -193,7 +193,7 @@ static struct sdio_driver b43_sdio_driver = {</div><div class='ctx'> 	.name		= "b43-sdio",</div><div class='ctx'> 	.id_table	= b43_sdio_ids,</div><div class='ctx'> 	.probe		= b43_sdio_probe,</div><div class='del'>-	.remove		= b43_sdio_remove,</div><div class='add'>+	.remove		= __devexit_p(b43_sdio_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int b43_sdio_init(void)</div><div class='head'>diff --git a/drivers/net/wireless/b43/xmit.c b/drivers/net/wireless/b43/xmit.c<br/>index 2c5367884b3f..b31ccc02fa21 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/b43/xmit.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/b43/xmit.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/b43/xmit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43/xmit.c</a></div><div class='hunk'>@@ -290,7 +290,8 @@ int b43_generate_txhdr(struct b43_wldev *dev,</div><div class='ctx'> 		txhdr-&gt;dur_fb = wlhdr-&gt;duration_id;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		txhdr-&gt;dur_fb = ieee80211_generic_frame_duration(</div><div class='del'>-			dev-&gt;wl-&gt;hw, info-&gt;control.vif, fragment_len, fbrate);</div><div class='add'>+			dev-&gt;wl-&gt;hw, info-&gt;control.vif, info-&gt;band,</div><div class='add'>+			fragment_len, fbrate);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	plcp_fragment_len = fragment_len + FCS_LEN;</div><div class='hunk'>@@ -378,7 +379,7 @@ int b43_generate_txhdr(struct b43_wldev *dev,</div><div class='ctx'> 	if (info-&gt;control.rates[0].flags &amp; IEEE80211_TX_RC_USE_SHORT_PREAMBLE)</div><div class='ctx'> 		phy_ctl |= B43_TXH_PHY_SHORTPRMBL;</div><div class='ctx'> </div><div class='del'>-	switch (b43_ieee80211_antenna_sanitize(dev, info-&gt;antenna_sel_tx)) {</div><div class='add'>+	switch (b43_ieee80211_antenna_sanitize(dev, 0)) {</div><div class='ctx'> 	case 0: /* Default */</div><div class='ctx'> 		phy_ctl |= B43_TXH_PHY_ANT01AUTO;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/net/wireless/b43legacy/main.c b/drivers/net/wireless/b43legacy/main.c<br/>index df7e16dfb36c..cd9c9bc186d9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/b43legacy/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/b43legacy/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/b43legacy/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43legacy/main.c</a></div><div class='hunk'>@@ -1056,6 +1056,7 @@ static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,</div><div class='ctx'> 	b43legacy_generate_plcp_hdr(&amp;plcp, size + FCS_LEN, rate-&gt;hw_value);</div><div class='ctx'> 	dur = ieee80211_generic_frame_duration(dev-&gt;wl-&gt;hw,</div><div class='ctx'> 					       dev-&gt;wl-&gt;vif,</div><div class='add'>+					       IEEE80211_BAND_2GHZ,</div><div class='ctx'> 					       size,</div><div class='ctx'> 					       rate);</div><div class='ctx'> 	/* Write PLCP in two parts and timing for packet transfer */</div><div class='hunk'>@@ -1121,6 +1122,7 @@ static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,</div><div class='ctx'> 					 IEEE80211_STYPE_PROBE_RESP);</div><div class='ctx'> 	dur = ieee80211_generic_frame_duration(dev-&gt;wl-&gt;hw,</div><div class='ctx'> 					       dev-&gt;wl-&gt;vif,</div><div class='add'>+					       IEEE80211_BAND_2GHZ,</div><div class='ctx'> 					       *dest_size,</div><div class='ctx'> 					       rate);</div><div class='ctx'> 	hdr-&gt;duration_id = dur;</div><div class='hunk'>@@ -1571,8 +1573,6 @@ static void b43legacy_request_firmware(struct work_struct *work)</div><div class='ctx'> 	const char *filename;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* do dummy read */</div><div class='del'>-	ssb_read32(dev-&gt;dev, SSB_TMSHIGH);</div><div class='ctx'> 	if (!fw-&gt;ucode) {</div><div class='ctx'> 		if (rev == 2)</div><div class='ctx'> 			filename = "ucode2";</div><div class='hunk'>@@ -3779,7 +3779,7 @@ static void b43legacy_sprom_fixup(struct ssb_bus *bus)</div><div class='ctx'> 	/* boardflags workarounds */</div><div class='ctx'> 	if (bus-&gt;boardinfo.vendor == PCI_VENDOR_ID_APPLE &amp;&amp;</div><div class='ctx'> 	    bus-&gt;boardinfo.type == 0x4E &amp;&amp;</div><div class='del'>-	    bus-&gt;boardinfo.rev &gt; 0x40)</div><div class='add'>+	    bus-&gt;sprom.board_rev &gt; 0x40)</div><div class='ctx'> 		bus-&gt;sprom.boardflags_lo |= B43legacy_BFL_PACTRL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/b43legacy/phy.c b/drivers/net/wireless/b43legacy/phy.c<br/>index 950334197f40..995c7d0c212a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/b43legacy/phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/b43legacy/phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/b43legacy/phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43legacy/phy.c</a></div><div class='hunk'>@@ -408,7 +408,7 @@ static void b43legacy_phy_setupg(struct b43legacy_wldev *dev)</div><div class='ctx'> </div><div class='ctx'> 		if (is_bcm_board_vendor(dev) &amp;&amp;</div><div class='ctx'> 		    (dev-&gt;dev-&gt;bus-&gt;boardinfo.type == 0x0416) &amp;&amp;</div><div class='del'>-		    (dev-&gt;dev-&gt;bus-&gt;boardinfo.rev == 0x0017))</div><div class='add'>+		    (dev-&gt;dev-&gt;bus-&gt;sprom.board_rev == 0x0017))</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='ctx'> 		b43legacy_ilt_write(dev, 0x5001, 0x0002);</div><div class='hunk'>@@ -424,7 +424,7 @@ static void b43legacy_phy_setupg(struct b43legacy_wldev *dev)</div><div class='ctx'> </div><div class='ctx'> 		if (is_bcm_board_vendor(dev) &amp;&amp;</div><div class='ctx'> 		    (dev-&gt;dev-&gt;bus-&gt;boardinfo.type == 0x0416) &amp;&amp;</div><div class='del'>-		    (dev-&gt;dev-&gt;bus-&gt;boardinfo.rev == 0x0017))</div><div class='add'>+		    (dev-&gt;dev-&gt;bus-&gt;sprom.board_rev == 0x0017))</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='ctx'> 		b43legacy_ilt_write(dev, 0x0401, 0x0002);</div><div class='head'>diff --git a/drivers/net/wireless/b43legacy/radio.c b/drivers/net/wireless/b43legacy/radio.c<br/>index fcbafcd603cc..896177690394 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/b43legacy/radio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/b43legacy/radio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/b43legacy/radio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43legacy/radio.c</a></div><div class='hunk'>@@ -1998,7 +1998,7 @@ u16 b43legacy_default_radio_attenuation(struct b43legacy_wldev *dev)</div><div class='ctx'> 			if (phy-&gt;type == B43legacy_PHYTYPE_G) {</div><div class='ctx'> 				if (is_bcm_board_vendor(dev) &amp;&amp;</div><div class='ctx'> 				    dev-&gt;dev-&gt;bus-&gt;boardinfo.type == 0x421 &amp;&amp;</div><div class='del'>-				    dev-&gt;dev-&gt;bus-&gt;boardinfo.rev &gt;= 30)</div><div class='add'>+				    dev-&gt;dev-&gt;bus-&gt;sprom.board_rev &gt;= 30)</div><div class='ctx'> 					att = 3;</div><div class='ctx'> 				else if (is_bcm_board_vendor(dev) &amp;&amp;</div><div class='ctx'> 					 dev-&gt;dev-&gt;bus-&gt;boardinfo.type == 0x416)</div><div class='hunk'>@@ -2008,7 +2008,7 @@ u16 b43legacy_default_radio_attenuation(struct b43legacy_wldev *dev)</div><div class='ctx'> 			} else {</div><div class='ctx'> 				if (is_bcm_board_vendor(dev) &amp;&amp;</div><div class='ctx'> 				    dev-&gt;dev-&gt;bus-&gt;boardinfo.type == 0x421 &amp;&amp;</div><div class='del'>-				    dev-&gt;dev-&gt;bus-&gt;boardinfo.rev &gt;= 30)</div><div class='add'>+				    dev-&gt;dev-&gt;bus-&gt;sprom.board_rev &gt;= 30)</div><div class='ctx'> 					att = 7;</div><div class='ctx'> 				else</div><div class='ctx'> 					att = 6;</div><div class='hunk'>@@ -2018,7 +2018,7 @@ u16 b43legacy_default_radio_attenuation(struct b43legacy_wldev *dev)</div><div class='ctx'> 			if (phy-&gt;type == B43legacy_PHYTYPE_G) {</div><div class='ctx'> 				if (is_bcm_board_vendor(dev) &amp;&amp;</div><div class='ctx'> 				    dev-&gt;dev-&gt;bus-&gt;boardinfo.type == 0x421 &amp;&amp;</div><div class='del'>-				    dev-&gt;dev-&gt;bus-&gt;boardinfo.rev &gt;= 30)</div><div class='add'>+				    dev-&gt;dev-&gt;bus-&gt;sprom.board_rev &gt;= 30)</div><div class='ctx'> 					att = 3;</div><div class='ctx'> 				else if (is_bcm_board_vendor(dev) &amp;&amp;</div><div class='ctx'> 					 dev-&gt;dev-&gt;bus-&gt;boardinfo.type ==</div><div class='hunk'>@@ -2052,9 +2052,9 @@ u16 b43legacy_default_radio_attenuation(struct b43legacy_wldev *dev)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (is_bcm_board_vendor(dev) &amp;&amp;</div><div class='ctx'> 	    dev-&gt;dev-&gt;bus-&gt;boardinfo.type == 0x421) {</div><div class='del'>-		if (dev-&gt;dev-&gt;bus-&gt;boardinfo.rev &lt; 0x43)</div><div class='add'>+		if (dev-&gt;dev-&gt;bus-&gt;sprom.board_rev &lt; 0x43)</div><div class='ctx'> 			att = 2;</div><div class='del'>-		else if (dev-&gt;dev-&gt;bus-&gt;boardinfo.rev &lt; 0x51)</div><div class='add'>+		else if (dev-&gt;dev-&gt;bus-&gt;sprom.board_rev &lt; 0x51)</div><div class='ctx'> 			att = 3;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (att == 0xFFFF)</div><div class='head'>diff --git a/drivers/net/wireless/b43legacy/xmit.c b/drivers/net/wireless/b43legacy/xmit.c<br/>index 5188fab0b377..a8012f2749ee 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/b43legacy/xmit.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/b43legacy/xmit.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/b43legacy/xmit.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/b43legacy/xmit.c</a></div><div class='hunk'>@@ -228,6 +228,7 @@ static int generate_txhdr_fw3(struct b43legacy_wldev *dev,</div><div class='ctx'> 	} else {</div><div class='ctx'> 		txhdr-&gt;dur_fb = ieee80211_generic_frame_duration(dev-&gt;wl-&gt;hw,</div><div class='ctx'> 							 info-&gt;control.vif,</div><div class='add'>+							 info-&gt;band,</div><div class='ctx'> 							 fragment_len,</div><div class='ctx'> 							 rate_fb);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -277,19 +278,7 @@ static int generate_txhdr_fw3(struct b43legacy_wldev *dev,</div><div class='ctx'> 		phy_ctl |= B43legacy_TX4_PHY_ENC_OFDM;</div><div class='ctx'> 	if (info-&gt;control.rates[0].flags &amp; IEEE80211_TX_RC_USE_SHORT_PREAMBLE)</div><div class='ctx'> 		phy_ctl |= B43legacy_TX4_PHY_SHORTPRMBL;</div><div class='del'>-	switch (info-&gt;antenna_sel_tx) {</div><div class='del'>-	case 0:</div><div class='del'>-		phy_ctl |= B43legacy_TX4_PHY_ANTLAST;</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		phy_ctl |= B43legacy_TX4_PHY_ANT0;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		phy_ctl |= B43legacy_TX4_PHY_ANT1;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		B43legacy_BUG_ON(1);</div><div class='del'>-	}</div><div class='add'>+	phy_ctl |= B43legacy_TX4_PHY_ANTLAST;</div><div class='ctx'> </div><div class='ctx'> 	/* MAC control */</div><div class='ctx'> 	rates = info-&gt;control.rates;</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/Kconfig b/drivers/net/wireless/brcm80211/Kconfig<br/>index c5104533e24e..b480088b3dbe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/Kconfig</a></div><div class='hunk'>@@ -36,6 +36,15 @@ config BRCMFMAC_SDIO</div><div class='ctx'> 	  IEEE802.11n embedded FullMAC WLAN driver. Say Y if you want to</div><div class='ctx'> 	  use the driver for a SDIO wireless card.</div><div class='ctx'> </div><div class='add'>+config BRCMFMAC_SDIO_OOB</div><div class='add'>+	bool "Out of band interrupt support for SDIO interface chipset"</div><div class='add'>+	depends on BRCMFMAC_SDIO</div><div class='add'>+	---help---</div><div class='add'>+	  This option enables out-of-band interrupt support for Broadcom</div><div class='add'>+	  SDIO Wifi chipset using fullmac in order to gain better</div><div class='add'>+	  performance and deep sleep wake up capability on certain</div><div class='add'>+	  platforms. Say N if you are unsure.</div><div class='add'>+</div><div class='ctx'> config BRCMFMAC_USB</div><div class='ctx'> 	bool "USB bus interface support for FullMAC driver"</div><div class='ctx'> 	depends on USB</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c b/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c<br/>index e925290b432b..e2480d196276 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c</a></div><div class='hunk'>@@ -39,195 +39,262 @@</div><div class='ctx'> </div><div class='ctx'> #define SDIOH_API_ACCESS_RETRY_LIMIT	2</div><div class='ctx'> </div><div class='del'>-static void brcmf_sdioh_irqhandler(struct sdio_func *func)</div><div class='add'>+#ifdef CONFIG_BRCMFMAC_SDIO_OOB</div><div class='add'>+static irqreturn_t brcmf_sdio_irqhandler(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='del'>-	struct brcmf_sdio_dev *sdiodev = dev_get_drvdata(&amp;func-&gt;card-&gt;dev);</div><div class='add'>+	struct brcmf_sdio_dev *sdiodev = dev_get_drvdata(dev_id);</div><div class='ctx'> </div><div class='del'>-	brcmf_dbg(TRACE, "***IRQHandler\n");</div><div class='add'>+	brcmf_dbg(INTR, "oob intr triggered\n");</div><div class='ctx'> </div><div class='del'>-	sdio_release_host(func);</div><div class='add'>+	/*</div><div class='add'>+	 * out-of-band interrupt is level-triggered which won't</div><div class='add'>+	 * be cleared until dpc</div><div class='add'>+	 */</div><div class='add'>+	if (sdiodev-&gt;irq_en) {</div><div class='add'>+		disable_irq_nosync(irq);</div><div class='add'>+		sdiodev-&gt;irq_en = false;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	brcmf_sdbrcm_isr(sdiodev-&gt;bus);</div><div class='ctx'> </div><div class='del'>-	sdio_claim_host(func);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* dummy handler for SDIO function 2 interrupt */</div><div class='del'>-static void brcmf_sdioh_dummy_irq_handler(struct sdio_func *func)</div><div class='add'>+int brcmf_sdio_intr_register(struct brcmf_sdio_dev *sdiodev)</div><div class='ctx'> {</div><div class='del'>-}</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u8 data;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-int brcmf_sdcard_intr_reg(struct brcmf_sdio_dev *sdiodev)</div><div class='del'>-{</div><div class='ctx'> 	brcmf_dbg(TRACE, "Entering\n");</div><div class='ctx'> </div><div class='del'>-	sdio_claim_host(sdiodev-&gt;func[1]);</div><div class='del'>-	sdio_claim_irq(sdiodev-&gt;func[1], brcmf_sdioh_irqhandler);</div><div class='del'>-	sdio_claim_irq(sdiodev-&gt;func[2], brcmf_sdioh_dummy_irq_handler);</div><div class='del'>-	sdio_release_host(sdiodev-&gt;func[1]);</div><div class='add'>+	brcmf_dbg(ERROR, "requesting irq %d\n", sdiodev-&gt;irq);</div><div class='add'>+	ret = request_irq(sdiodev-&gt;irq, brcmf_sdio_irqhandler,</div><div class='add'>+			  sdiodev-&gt;irq_flags, "brcmf_oob_intr",</div><div class='add'>+			  &amp;sdiodev-&gt;func[1]-&gt;card-&gt;dev);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+	spin_lock_init(&amp;sdiodev-&gt;irq_en_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;sdiodev-&gt;irq_en_lock, flags);</div><div class='add'>+	sdiodev-&gt;irq_en = true;</div><div class='add'>+	spin_unlock_irqrestore(&amp;sdiodev-&gt;irq_en_lock, flags);</div><div class='add'>+</div><div class='add'>+	ret = enable_irq_wake(sdiodev-&gt;irq);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+	sdiodev-&gt;irq_wake = true;</div><div class='add'>+</div><div class='add'>+	/* must configure SDIO_CCCR_IENx to enable irq */</div><div class='add'>+	data = brcmf_sdio_regrb(sdiodev, SDIO_CCCR_IENx, &amp;ret);</div><div class='add'>+	data |= 1 &lt;&lt; SDIO_FUNC_1 | 1 &lt;&lt; SDIO_FUNC_2 | 1;</div><div class='add'>+	brcmf_sdio_regwb(sdiodev, SDIO_CCCR_IENx, data, &amp;ret);</div><div class='add'>+</div><div class='add'>+	/* redirect, configure ane enable io for interrupt signal */</div><div class='add'>+	data = SDIO_SEPINT_MASK | SDIO_SEPINT_OE;</div><div class='add'>+	if (sdiodev-&gt;irq_flags | IRQF_TRIGGER_HIGH)</div><div class='add'>+		data |= SDIO_SEPINT_ACT_HI;</div><div class='add'>+	brcmf_sdio_regwb(sdiodev, SDIO_CCCR_BRCM_SEPINT, data, &amp;ret);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int brcmf_sdcard_intr_dereg(struct brcmf_sdio_dev *sdiodev)</div><div class='add'>+int brcmf_sdio_intr_unregister(struct brcmf_sdio_dev *sdiodev)</div><div class='ctx'> {</div><div class='ctx'> 	brcmf_dbg(TRACE, "Entering\n");</div><div class='ctx'> </div><div class='del'>-	sdio_claim_host(sdiodev-&gt;func[1]);</div><div class='del'>-	sdio_release_irq(sdiodev-&gt;func[2]);</div><div class='del'>-	sdio_release_irq(sdiodev-&gt;func[1]);</div><div class='del'>-	sdio_release_host(sdiodev-&gt;func[1]);</div><div class='add'>+	brcmf_sdio_regwb(sdiodev, SDIO_CCCR_BRCM_SEPINT, 0, NULL);</div><div class='add'>+	brcmf_sdio_regwb(sdiodev, SDIO_CCCR_IENx, 0, NULL);</div><div class='add'>+</div><div class='add'>+	if (sdiodev-&gt;irq_wake) {</div><div class='add'>+		disable_irq_wake(sdiodev-&gt;irq);</div><div class='add'>+		sdiodev-&gt;irq_wake = false;</div><div class='add'>+	}</div><div class='add'>+	free_irq(sdiodev-&gt;irq, &amp;sdiodev-&gt;func[1]-&gt;card-&gt;dev);</div><div class='add'>+	sdiodev-&gt;irq_en = false;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+#else		/* CONFIG_BRCMFMAC_SDIO_OOB */</div><div class='add'>+static void brcmf_sdio_irqhandler(struct sdio_func *func)</div><div class='add'>+{</div><div class='add'>+	struct brcmf_sdio_dev *sdiodev = dev_get_drvdata(&amp;func-&gt;card-&gt;dev);</div><div class='add'>+</div><div class='add'>+	brcmf_dbg(INTR, "ib intr triggered\n");</div><div class='ctx'> </div><div class='del'>-u8 brcmf_sdcard_cfg_read(struct brcmf_sdio_dev *sdiodev, uint fnc_num, u32 addr,</div><div class='del'>-			 int *err)</div><div class='add'>+	brcmf_sdbrcm_isr(sdiodev-&gt;bus);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* dummy handler for SDIO function 2 interrupt */</div><div class='add'>+static void brcmf_sdio_dummy_irqhandler(struct sdio_func *func)</div><div class='ctx'> {</div><div class='del'>-	int status;</div><div class='del'>-	s32 retry = 0;</div><div class='del'>-	u8 data = 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	do {</div><div class='del'>-		if (retry)	/* wait for 1 ms till bus get settled down */</div><div class='del'>-			udelay(1000);</div><div class='del'>-		status = brcmf_sdioh_request_byte(sdiodev, SDIOH_READ, fnc_num,</div><div class='del'>-						  addr, (u8 *) &amp;data);</div><div class='del'>-	} while (status != 0</div><div class='del'>-		 &amp;&amp; (retry++ &lt; SDIOH_API_ACCESS_RETRY_LIMIT));</div><div class='del'>-	if (err)</div><div class='del'>-		*err = status;</div><div class='add'>+int brcmf_sdio_intr_register(struct brcmf_sdio_dev *sdiodev)</div><div class='add'>+{</div><div class='add'>+	brcmf_dbg(TRACE, "Entering\n");</div><div class='ctx'> </div><div class='del'>-	brcmf_dbg(INFO, "fun = %d, addr = 0x%x, u8data = 0x%x\n",</div><div class='del'>-		  fnc_num, addr, data);</div><div class='add'>+	sdio_claim_host(sdiodev-&gt;func[1]);</div><div class='add'>+	sdio_claim_irq(sdiodev-&gt;func[1], brcmf_sdio_irqhandler);</div><div class='add'>+	sdio_claim_irq(sdiodev-&gt;func[2], brcmf_sdio_dummy_irqhandler);</div><div class='add'>+	sdio_release_host(sdiodev-&gt;func[1]);</div><div class='ctx'> </div><div class='del'>-	return data;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void</div><div class='del'>-brcmf_sdcard_cfg_write(struct brcmf_sdio_dev *sdiodev, uint fnc_num, u32 addr,</div><div class='del'>-		       u8 data, int *err)</div><div class='add'>+int brcmf_sdio_intr_unregister(struct brcmf_sdio_dev *sdiodev)</div><div class='ctx'> {</div><div class='del'>-	int status;</div><div class='del'>-	s32 retry = 0;</div><div class='add'>+	brcmf_dbg(TRACE, "Entering\n");</div><div class='ctx'> </div><div class='del'>-	do {</div><div class='del'>-		if (retry)	/* wait for 1 ms till bus get settled down */</div><div class='del'>-			udelay(1000);</div><div class='del'>-		status = brcmf_sdioh_request_byte(sdiodev, SDIOH_WRITE, fnc_num,</div><div class='del'>-						  addr, (u8 *) &amp;data);</div><div class='del'>-	} while (status != 0</div><div class='del'>-		 &amp;&amp; (retry++ &lt; SDIOH_API_ACCESS_RETRY_LIMIT));</div><div class='del'>-	if (err)</div><div class='del'>-		*err = status;</div><div class='add'>+	sdio_claim_host(sdiodev-&gt;func[1]);</div><div class='add'>+	sdio_release_irq(sdiodev-&gt;func[2]);</div><div class='add'>+	sdio_release_irq(sdiodev-&gt;func[1]);</div><div class='add'>+	sdio_release_host(sdiodev-&gt;func[1]);</div><div class='ctx'> </div><div class='del'>-	brcmf_dbg(INFO, "fun = %d, addr = 0x%x, u8data = 0x%x\n",</div><div class='del'>-		  fnc_num, addr, data);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='add'>+#endif		/* CONFIG_BRCMFMAC_SDIO_OOB */</div><div class='ctx'> </div><div class='ctx'> int</div><div class='ctx'> brcmf_sdcard_set_sbaddr_window(struct brcmf_sdio_dev *sdiodev, u32 address)</div><div class='ctx'> {</div><div class='del'>-	int err = 0;</div><div class='del'>-	brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW,</div><div class='del'>-			 (address &gt;&gt; 8) &amp; SBSDIO_SBADDRLOW_MASK, &amp;err);</div><div class='del'>-	if (!err)</div><div class='del'>-		brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1,</div><div class='del'>-				       SBSDIO_FUNC1_SBADDRMID,</div><div class='del'>-				       (address &gt;&gt; 16) &amp; SBSDIO_SBADDRMID_MASK,</div><div class='del'>-				       &amp;err);</div><div class='del'>-	if (!err)</div><div class='del'>-		brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1,</div><div class='del'>-				       SBSDIO_FUNC1_SBADDRHIGH,</div><div class='del'>-				       (address &gt;&gt; 24) &amp; SBSDIO_SBADDRHIGH_MASK,</div><div class='del'>-				       &amp;err);</div><div class='add'>+	int err = 0, i;</div><div class='add'>+	u8 addr[3];</div><div class='add'>+	s32 retry;</div><div class='add'>+</div><div class='add'>+	addr[0] = (address &gt;&gt; 8) &amp; SBSDIO_SBADDRLOW_MASK;</div><div class='add'>+	addr[1] = (address &gt;&gt; 16) &amp; SBSDIO_SBADDRMID_MASK;</div><div class='add'>+	addr[2] = (address &gt;&gt; 24) &amp; SBSDIO_SBADDRHIGH_MASK;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		retry = 0;</div><div class='add'>+		do {</div><div class='add'>+			if (retry)</div><div class='add'>+				usleep_range(1000, 2000);</div><div class='add'>+			err = brcmf_sdioh_request_byte(sdiodev, SDIOH_WRITE,</div><div class='add'>+					SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW + i,</div><div class='add'>+					&amp;addr[i]);</div><div class='add'>+		} while (err != 0 &amp;&amp; retry++ &lt; SDIOH_API_ACCESS_RETRY_LIMIT);</div><div class='add'>+</div><div class='add'>+		if (err) {</div><div class='add'>+			brcmf_dbg(ERROR, "failed at addr:0x%0x\n",</div><div class='add'>+				  SBSDIO_FUNC1_SBADDRLOW + i);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u32 brcmf_sdcard_reg_read(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size)</div><div class='add'>+static int</div><div class='add'>+brcmf_sdio_regrw_helper(struct brcmf_sdio_dev *sdiodev, u32 addr,</div><div class='add'>+			void *data, bool write)</div><div class='ctx'> {</div><div class='del'>-	int status;</div><div class='del'>-	u32 word = 0;</div><div class='del'>-	uint bar0 = addr &amp; ~SBSDIO_SB_OFT_ADDR_MASK;</div><div class='del'>-</div><div class='del'>-	brcmf_dbg(INFO, "fun = 1, addr = 0x%x\n", addr);</div><div class='del'>-</div><div class='del'>-	if (bar0 != sdiodev-&gt;sbwad) {</div><div class='del'>-		if (brcmf_sdcard_set_sbaddr_window(sdiodev, bar0))</div><div class='del'>-			return 0xFFFFFFFF;</div><div class='del'>-</div><div class='del'>-		sdiodev-&gt;sbwad = bar0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	addr &amp;= SBSDIO_SB_OFT_ADDR_MASK;</div><div class='del'>-	if (size == 4)</div><div class='add'>+	u8 func_num, reg_size;</div><div class='add'>+	u32 bar;</div><div class='add'>+	s32 retry = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * figure out how to read the register based on address range</div><div class='add'>+	 * 0x00 ~ 0x7FF: function 0 CCCR and FBR</div><div class='add'>+	 * 0x10000 ~ 0x1FFFF: function 1 miscellaneous registers</div><div class='add'>+	 * The rest: function 1 silicon backplane core registers</div><div class='add'>+	 */</div><div class='add'>+	if ((addr &amp; ~REG_F0_REG_MASK) == 0) {</div><div class='add'>+		func_num = SDIO_FUNC_0;</div><div class='add'>+		reg_size = 1;</div><div class='add'>+	} else if ((addr &amp; ~REG_F1_MISC_MASK) == 0) {</div><div class='add'>+		func_num = SDIO_FUNC_1;</div><div class='add'>+		reg_size = 1;</div><div class='add'>+	} else {</div><div class='add'>+		func_num = SDIO_FUNC_1;</div><div class='add'>+		reg_size = 4;</div><div class='add'>+</div><div class='add'>+		/* Set the window for SB core register */</div><div class='add'>+		bar = addr &amp; ~SBSDIO_SB_OFT_ADDR_MASK;</div><div class='add'>+		if (bar != sdiodev-&gt;sbwad) {</div><div class='add'>+			ret = brcmf_sdcard_set_sbaddr_window(sdiodev, bar);</div><div class='add'>+			if (ret != 0) {</div><div class='add'>+				memset(data, 0xFF, reg_size);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+			sdiodev-&gt;sbwad = bar;</div><div class='add'>+		}</div><div class='add'>+		addr &amp;= SBSDIO_SB_OFT_ADDR_MASK;</div><div class='ctx'> 		addr |= SBSDIO_SB_ACCESS_2_4B_FLAG;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	status = brcmf_sdioh_request_word(sdiodev, SDIOH_READ, SDIO_FUNC_1,</div><div class='del'>-					  addr, &amp;word, size);</div><div class='add'>+	do {</div><div class='add'>+		if (!write)</div><div class='add'>+			memset(data, 0, reg_size);</div><div class='add'>+		if (retry)	/* wait for 1 ms till bus get settled down */</div><div class='add'>+			usleep_range(1000, 2000);</div><div class='add'>+		if (reg_size == 1)</div><div class='add'>+			ret = brcmf_sdioh_request_byte(sdiodev, write,</div><div class='add'>+						       func_num, addr, data);</div><div class='add'>+		else</div><div class='add'>+			ret = brcmf_sdioh_request_word(sdiodev, write,</div><div class='add'>+						       func_num, addr, data, 4);</div><div class='add'>+	} while (ret != 0 &amp;&amp; retry++ &lt; SDIOH_API_ACCESS_RETRY_LIMIT);</div><div class='add'>+</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		brcmf_dbg(ERROR, "failed with %d\n", ret);</div><div class='ctx'> </div><div class='del'>-	sdiodev-&gt;regfail = (status != 0);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	brcmf_dbg(INFO, "u32data = 0x%x\n", word);</div><div class='add'>+u8 brcmf_sdio_regrb(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret)</div><div class='add'>+{</div><div class='add'>+	u8 data;</div><div class='add'>+	int retval;</div><div class='ctx'> </div><div class='del'>-	/* if ok, return appropriately masked word */</div><div class='del'>-	if (status == 0) {</div><div class='del'>-		switch (size) {</div><div class='del'>-		case sizeof(u8):</div><div class='del'>-			return word &amp; 0xff;</div><div class='del'>-		case sizeof(u16):</div><div class='del'>-			return word &amp; 0xffff;</div><div class='del'>-		case sizeof(u32):</div><div class='del'>-			return word;</div><div class='del'>-		default:</div><div class='del'>-			sdiodev-&gt;regfail = true;</div><div class='add'>+	brcmf_dbg(INFO, "addr:0x%08x\n", addr);</div><div class='add'>+	retval = brcmf_sdio_regrw_helper(sdiodev, addr, &amp;data, false);</div><div class='add'>+	brcmf_dbg(INFO, "data:0x%02x\n", data);</div><div class='ctx'> </div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (ret)</div><div class='add'>+		*ret = retval;</div><div class='ctx'> </div><div class='del'>-	/* otherwise, bad sdio access or invalid size */</div><div class='del'>-	brcmf_dbg(ERROR, "error reading addr 0x%04x size %d\n", addr, size);</div><div class='del'>-	return 0xFFFFFFFF;</div><div class='add'>+	return data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u32 brcmf_sdcard_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size,</div><div class='del'>-			   u32 data)</div><div class='add'>+u32 brcmf_sdio_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret)</div><div class='ctx'> {</div><div class='del'>-	int status;</div><div class='del'>-	uint bar0 = addr &amp; ~SBSDIO_SB_OFT_ADDR_MASK;</div><div class='del'>-	int err = 0;</div><div class='add'>+	u32 data;</div><div class='add'>+	int retval;</div><div class='ctx'> </div><div class='del'>-	brcmf_dbg(INFO, "fun = 1, addr = 0x%x, uint%ddata = 0x%x\n",</div><div class='del'>-		  addr, size * 8, data);</div><div class='add'>+	brcmf_dbg(INFO, "addr:0x%08x\n", addr);</div><div class='add'>+	retval = brcmf_sdio_regrw_helper(sdiodev, addr, &amp;data, false);</div><div class='add'>+	brcmf_dbg(INFO, "data:0x%08x\n", data);</div><div class='ctx'> </div><div class='del'>-	if (bar0 != sdiodev-&gt;sbwad) {</div><div class='del'>-		err = brcmf_sdcard_set_sbaddr_window(sdiodev, bar0);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='add'>+	if (ret)</div><div class='add'>+		*ret = retval;</div><div class='ctx'> </div><div class='del'>-		sdiodev-&gt;sbwad = bar0;</div><div class='del'>-	}</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	addr &amp;= SBSDIO_SB_OFT_ADDR_MASK;</div><div class='del'>-	if (size == 4)</div><div class='del'>-		addr |= SBSDIO_SB_ACCESS_2_4B_FLAG;</div><div class='del'>-	status =</div><div class='del'>-	    brcmf_sdioh_request_word(sdiodev, SDIOH_WRITE, SDIO_FUNC_1,</div><div class='del'>-				     addr, &amp;data, size);</div><div class='del'>-	sdiodev-&gt;regfail = (status != 0);</div><div class='add'>+void brcmf_sdio_regwb(struct brcmf_sdio_dev *sdiodev, u32 addr,</div><div class='add'>+		      u8 data, int *ret)</div><div class='add'>+{</div><div class='add'>+	int retval;</div><div class='ctx'> </div><div class='del'>-	if (status == 0)</div><div class='del'>-		return 0;</div><div class='add'>+	brcmf_dbg(INFO, "addr:0x%08x, data:0x%02x\n", addr, data);</div><div class='add'>+	retval = brcmf_sdio_regrw_helper(sdiodev, addr, &amp;data, true);</div><div class='ctx'> </div><div class='del'>-	brcmf_dbg(ERROR, "error writing 0x%08x to addr 0x%04x size %d\n",</div><div class='del'>-		  data, addr, size);</div><div class='del'>-	return 0xFFFFFFFF;</div><div class='add'>+	if (ret)</div><div class='add'>+		*ret = retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool brcmf_sdcard_regfail(struct brcmf_sdio_dev *sdiodev)</div><div class='add'>+void brcmf_sdio_regwl(struct brcmf_sdio_dev *sdiodev, u32 addr,</div><div class='add'>+		      u32 data, int *ret)</div><div class='ctx'> {</div><div class='del'>-	return sdiodev-&gt;regfail;</div><div class='add'>+	int retval;</div><div class='add'>+</div><div class='add'>+	brcmf_dbg(INFO, "addr:0x%08x, data:0x%08x\n", addr, data);</div><div class='add'>+	retval = brcmf_sdio_regrw_helper(sdiodev, addr, &amp;data, true);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		*ret = retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int brcmf_sdcard_recv_prepare(struct brcmf_sdio_dev *sdiodev, uint fn,</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c<br/>index 4688904908ec..82f51dbd0d66 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;	/* request_irq() */</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;net/cfg80211.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;defs.h&gt;</div><div class='hunk'>@@ -55,6 +56,15 @@ static const struct sdio_device_id brcmf_sdmmc_ids[] = {</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(sdio, brcmf_sdmmc_ids);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BRCMFMAC_SDIO_OOB</div><div class='add'>+static struct list_head oobirq_lh;</div><div class='add'>+struct brcmf_sdio_oobirq {</div><div class='add'>+	unsigned int irq;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct list_head list;</div><div class='add'>+};</div><div class='add'>+#endif		/* CONFIG_BRCMFMAC_SDIO_OOB */</div><div class='add'>+</div><div class='ctx'> static bool</div><div class='ctx'> brcmf_pm_resume_error(struct brcmf_sdio_dev *sdiodev)</div><div class='ctx'> {</div><div class='hunk'>@@ -107,10 +117,17 @@ static inline int brcmf_sdioh_f0_write_byte(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> 			}</div><div class='ctx'> 			sdio_release_host(sdfunc);</div><div class='ctx'> 		}</div><div class='del'>-	} else if (regaddr == SDIO_CCCR_ABORT) {</div><div class='add'>+	} else if ((regaddr == SDIO_CCCR_ABORT) ||</div><div class='add'>+		   (regaddr == SDIO_CCCR_IENx)) {</div><div class='add'>+		sdfunc = kmemdup(sdiodev-&gt;func[0], sizeof(struct sdio_func),</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+		if (!sdfunc)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		sdfunc-&gt;num = 0;</div><div class='ctx'> 		sdio_claim_host(sdfunc);</div><div class='ctx'> 		sdio_writeb(sdfunc, *byte, regaddr, &amp;err_ret);</div><div class='ctx'> 		sdio_release_host(sdfunc);</div><div class='add'>+		kfree(sdfunc);</div><div class='ctx'> 	} else if (regaddr &lt; 0xF0) {</div><div class='ctx'> 		brcmf_dbg(ERROR, "F0 Wr:0x%02x: write disallowed\n", regaddr);</div><div class='ctx'> 		err_ret = -EPERM;</div><div class='hunk'>@@ -329,43 +346,17 @@ int brcmf_sdioh_request_buffer(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Read client card reg */</div><div class='del'>-static int</div><div class='del'>-brcmf_sdioh_card_regread(struct brcmf_sdio_dev *sdiodev, int func, u32 regaddr,</div><div class='del'>-			 int regsize, u32 *data)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	if ((func == 0) || (regsize == 1)) {</div><div class='del'>-		u8 temp = 0;</div><div class='del'>-</div><div class='del'>-		brcmf_sdioh_request_byte(sdiodev, SDIOH_READ, func, regaddr,</div><div class='del'>-					 &amp;temp);</div><div class='del'>-		*data = temp;</div><div class='del'>-		*data &amp;= 0xff;</div><div class='del'>-		brcmf_dbg(DATA, "byte read data=0x%02x\n", *data);</div><div class='del'>-	} else {</div><div class='del'>-		brcmf_sdioh_request_word(sdiodev, SDIOH_READ, func, regaddr,</div><div class='del'>-					 data, regsize);</div><div class='del'>-		if (regsize == 2)</div><div class='del'>-			*data &amp;= 0xffff;</div><div class='del'>-</div><div class='del'>-		brcmf_dbg(DATA, "word read data=0x%08x\n", *data);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return SUCCESS;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int brcmf_sdioh_get_cisaddr(struct brcmf_sdio_dev *sdiodev, u32 regaddr)</div><div class='ctx'> {</div><div class='ctx'> 	/* read 24 bits and return valid 17 bit addr */</div><div class='del'>-	int i;</div><div class='add'>+	int i, ret;</div><div class='ctx'> 	u32 scratch, regdata;</div><div class='ctx'> 	__le32 scratch_le;</div><div class='ctx'> 	u8 *ptr = (u8 *)&amp;scratch_le;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 3; i++) {</div><div class='del'>-		if ((brcmf_sdioh_card_regread(sdiodev, 0, regaddr, 1,</div><div class='del'>-				&amp;regdata)) != SUCCESS)</div><div class='add'>+		regdata = brcmf_sdio_regrl(sdiodev, regaddr, &amp;ret);</div><div class='add'>+		if (ret != 0)</div><div class='ctx'> 			brcmf_dbg(ERROR, "Can't read!\n");</div><div class='ctx'> </div><div class='ctx'> 		*ptr++ = (u8) regdata;</div><div class='hunk'>@@ -461,12 +452,40 @@ void brcmf_sdioh_detach(struct brcmf_sdio_dev *sdiodev)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BRCMFMAC_SDIO_OOB</div><div class='add'>+static int brcmf_sdio_getintrcfg(struct brcmf_sdio_dev *sdiodev)</div><div class='add'>+{</div><div class='add'>+	struct brcmf_sdio_oobirq *oobirq_entry;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;oobirq_lh)) {</div><div class='add'>+		brcmf_dbg(ERROR, "no valid oob irq resource\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	oobirq_entry = list_first_entry(&amp;oobirq_lh, struct brcmf_sdio_oobirq,</div><div class='add'>+					list);</div><div class='add'>+</div><div class='add'>+	sdiodev-&gt;irq = oobirq_entry-&gt;irq;</div><div class='add'>+	sdiodev-&gt;irq_flags = oobirq_entry-&gt;flags;</div><div class='add'>+	list_del(&amp;oobirq_entry-&gt;list);</div><div class='add'>+	kfree(oobirq_entry);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline int brcmf_sdio_getintrcfg(struct brcmf_sdio_dev *sdiodev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif		/* CONFIG_BRCMFMAC_SDIO_OOB */</div><div class='add'>+</div><div class='ctx'> static int brcmf_ops_sdio_probe(struct sdio_func *func,</div><div class='ctx'> 			      const struct sdio_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	struct brcmf_sdio_dev *sdiodev;</div><div class='ctx'> 	struct brcmf_bus *bus_if;</div><div class='add'>+</div><div class='ctx'> 	brcmf_dbg(TRACE, "Enter\n");</div><div class='ctx'> 	brcmf_dbg(TRACE, "func-&gt;class=%x\n", func-&gt;class);</div><div class='ctx'> 	brcmf_dbg(TRACE, "sdio_vendor: 0x%04x\n", func-&gt;vendor);</div><div class='hunk'>@@ -486,7 +505,7 @@ static int brcmf_ops_sdio_probe(struct sdio_func *func,</div><div class='ctx'> 			kfree(bus_if);</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='del'>-		sdiodev-&gt;func[0] = func-&gt;card-&gt;sdio_func[0];</div><div class='add'>+		sdiodev-&gt;func[0] = func;</div><div class='ctx'> 		sdiodev-&gt;func[1] = func;</div><div class='ctx'> 		sdiodev-&gt;bus_if = bus_if;</div><div class='ctx'> 		bus_if-&gt;bus_priv.sdio = sdiodev;</div><div class='hunk'>@@ -505,6 +524,10 @@ static int brcmf_ops_sdio_probe(struct sdio_func *func,</div><div class='ctx'> 		sdiodev = dev_get_drvdata(&amp;func-&gt;card-&gt;dev);</div><div class='ctx'> 		if ((!sdiodev) || (sdiodev-&gt;func[1]-&gt;card != func-&gt;card))</div><div class='ctx'> 			return -ENODEV;</div><div class='add'>+</div><div class='add'>+		ret = brcmf_sdio_getintrcfg(sdiodev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 		sdiodev-&gt;func[2] = func;</div><div class='ctx'> </div><div class='ctx'> 		bus_if = sdiodev-&gt;bus_if;</div><div class='hunk'>@@ -597,6 +620,65 @@ static struct sdio_driver brcmf_sdmmc_driver = {</div><div class='ctx'> #endif	/* CONFIG_PM_SLEEP */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BRCMFMAC_SDIO_OOB</div><div class='add'>+static int brcmf_sdio_pd_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct resource *res;</div><div class='add'>+	struct brcmf_sdio_oobirq *oobirq_entry;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;oobirq_lh);</div><div class='add'>+</div><div class='add'>+	for (i = 0; ; i++) {</div><div class='add'>+		res = platform_get_resource(pdev, IORESOURCE_IRQ, i);</div><div class='add'>+		if (!res)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		oobirq_entry = kzalloc(sizeof(struct brcmf_sdio_oobirq),</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+		oobirq_entry-&gt;irq = res-&gt;start;</div><div class='add'>+		oobirq_entry-&gt;flags = res-&gt;flags &amp; IRQF_TRIGGER_MASK;</div><div class='add'>+		list_add_tail(&amp;oobirq_entry-&gt;list, &amp;oobirq_lh);</div><div class='add'>+	}</div><div class='add'>+	if (i == 0)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	ret = sdio_register_driver(&amp;brcmf_sdmmc_driver);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		brcmf_dbg(ERROR, "sdio_register_driver failed: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver brcmf_sdio_pd = {</div><div class='add'>+	.probe		= brcmf_sdio_pd_probe,</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "brcmf_sdio_pd"</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void brcmf_sdio_exit(void)</div><div class='add'>+{</div><div class='add'>+	brcmf_dbg(TRACE, "Enter\n");</div><div class='add'>+</div><div class='add'>+	sdio_unregister_driver(&amp;brcmf_sdmmc_driver);</div><div class='add'>+</div><div class='add'>+	platform_driver_unregister(&amp;brcmf_sdio_pd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void brcmf_sdio_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	brcmf_dbg(TRACE, "Enter\n");</div><div class='add'>+</div><div class='add'>+	ret = platform_driver_register(&amp;brcmf_sdio_pd);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		brcmf_dbg(ERROR, "platform_driver_register failed: %d\n", ret);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='ctx'> void brcmf_sdio_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	brcmf_dbg(TRACE, "Enter\n");</div><div class='hunk'>@@ -615,3 +697,4 @@ void brcmf_sdio_init(void)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		brcmf_dbg(ERROR, "sdio_register_driver failed: %d\n", ret);</div><div class='ctx'> }</div><div class='add'>+#endif		/* CONFIG_BRCMFMAC_SDIO_OOB */</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmfmac/dhd.h b/drivers/net/wireless/brcm80211/brcmfmac/dhd.h<br/>index 07686a748d3c..9f637014486e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/dhd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmfmac/dhd.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/dhd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/dhd.h</a></div><div class='hunk'>@@ -632,7 +632,6 @@ extern const struct bcmevent_name bcmevent_names[];</div><div class='ctx'> extern uint brcmf_c_mkiovar(char *name, char *data, uint datalen,</div><div class='ctx'> 			  char *buf, uint len);</div><div class='ctx'> </div><div class='del'>-extern int brcmf_net_attach(struct brcmf_pub *drvr, int idx);</div><div class='ctx'> extern int brcmf_netdev_wait_pend8021x(struct net_device *ndev);</div><div class='ctx'> </div><div class='ctx'> extern s32 brcmf_exec_dcmd(struct net_device *dev, u32 cmd, void *arg, u32 len);</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmfmac/dhd_cdc.c b/drivers/net/wireless/brcm80211/brcmfmac/dhd_cdc.c<br/>index b3e3b7f25d82..a5c15cac5e7d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/dhd_cdc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmfmac/dhd_cdc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/dhd_cdc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/dhd_cdc.c</a></div><div class='hunk'>@@ -421,6 +421,7 @@ int brcmf_proto_hdrpull(struct device *dev, int *ifidx,</div><div class='ctx'> 	pktbuf-&gt;priority = h-&gt;priority &amp; BDC_PRIORITY_MASK;</div><div class='ctx'> </div><div class='ctx'> 	skb_pull(pktbuf, BDC_HEADER_LEN);</div><div class='add'>+	skb_pull(pktbuf, h-&gt;data_offset &lt;&lt; 2);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c b/drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c<br/>index 4187435220f3..236cb9fa460c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c</a></div><div class='hunk'>@@ -799,7 +799,6 @@ int brcmf_c_preinit_dcmds(struct brcmf_pub *drvr)</div><div class='ctx'> {</div><div class='ctx'> 	char iovbuf[BRCMF_EVENTING_MASK_LEN + 12];	/*  Room for</div><div class='ctx'> 				 "event_msgs" + '\0' + bitvec  */</div><div class='del'>-	uint up = 0;</div><div class='ctx'> 	char buf[128], *ptr;</div><div class='ctx'> 	u32 dongle_align = drvr-&gt;bus_if-&gt;align;</div><div class='ctx'> 	u32 glom = 0;</div><div class='hunk'>@@ -853,9 +852,6 @@ int brcmf_c_preinit_dcmds(struct brcmf_pub *drvr)</div><div class='ctx'> 	brcmf_proto_cdc_set_dcmd(drvr, 0, BRCMF_C_SET_VAR, iovbuf,</div><div class='ctx'> 				  sizeof(iovbuf));</div><div class='ctx'> </div><div class='del'>-	/* Force STA UP */</div><div class='del'>-	brcmf_proto_cdc_set_dcmd(drvr, 0, BRCMF_C_UP, (char *)&amp;up, sizeof(up));</div><div class='del'>-</div><div class='ctx'> 	/* Setup event_msgs */</div><div class='ctx'> 	brcmf_c_mkiovar("event_msgs", drvr-&gt;eventmask, BRCMF_EVENTING_MASK_LEN,</div><div class='ctx'> 		      iovbuf, sizeof(iovbuf));</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c b/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c<br/>index 2a1e5ae0c402..8933f9b31a9a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c</a></div><div class='hunk'>@@ -799,6 +799,7 @@ static int brcmf_netdev_open(struct net_device *ndev)</div><div class='ctx'> 	struct brcmf_bus *bus_if = drvr-&gt;bus_if;</div><div class='ctx'> 	u32 toe_ol;</div><div class='ctx'> 	s32 ret = 0;</div><div class='add'>+	uint up = 0;</div><div class='ctx'> </div><div class='ctx'> 	brcmf_dbg(TRACE, "ifidx %d\n", ifp-&gt;idx);</div><div class='ctx'> </div><div class='hunk'>@@ -822,6 +823,10 @@ static int brcmf_netdev_open(struct net_device *ndev)</div><div class='ctx'> 			drvr-&gt;iflist[ifp-&gt;idx]-&gt;ndev-&gt;features &amp;=</div><div class='ctx'> 				~NETIF_F_IP_CSUM;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* make sure RF is ready for work */</div><div class='add'>+	brcmf_proto_cdc_set_dcmd(drvr, 0, BRCMF_C_UP, (char *)&amp;up, sizeof(up));</div><div class='add'>+</div><div class='ctx'> 	/* Allow transmit calls */</div><div class='ctx'> 	netif_start_queue(ndev);</div><div class='ctx'> 	drvr-&gt;bus_if-&gt;drvr_up = true;</div><div class='hunk'>@@ -843,6 +848,63 @@ static const struct net_device_ops brcmf_netdev_ops_pri = {</div><div class='ctx'> 	.ndo_set_rx_mode = brcmf_netdev_set_multicast_list</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int brcmf_net_attach(struct brcmf_if *ifp)</div><div class='add'>+{</div><div class='add'>+	struct brcmf_pub *drvr = ifp-&gt;drvr;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	u8 temp_addr[ETH_ALEN];</div><div class='add'>+</div><div class='add'>+	brcmf_dbg(TRACE, "ifidx %d\n", ifp-&gt;idx);</div><div class='add'>+</div><div class='add'>+	ndev = drvr-&gt;iflist[ifp-&gt;idx]-&gt;ndev;</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;brcmf_netdev_ops_pri;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * determine mac address to use</div><div class='add'>+	 */</div><div class='add'>+	if (is_valid_ether_addr(ifp-&gt;mac_addr))</div><div class='add'>+		memcpy(temp_addr, ifp-&gt;mac_addr, ETH_ALEN);</div><div class='add'>+	else</div><div class='add'>+		memcpy(temp_addr, drvr-&gt;mac, ETH_ALEN);</div><div class='add'>+</div><div class='add'>+	if (ifp-&gt;idx == 1) {</div><div class='add'>+		brcmf_dbg(TRACE, "ACCESS POINT MAC:\n");</div><div class='add'>+		/*  ACCESSPOINT INTERFACE CASE */</div><div class='add'>+		temp_addr[0] |= 0X02;	/* set bit 2 ,</div><div class='add'>+			 - Locally Administered address  */</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+	ndev-&gt;hard_header_len = ETH_HLEN + drvr-&gt;hdrlen;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;brcmf_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	drvr-&gt;rxsz = ndev-&gt;mtu + ndev-&gt;hard_header_len +</div><div class='add'>+			      drvr-&gt;hdrlen;</div><div class='add'>+</div><div class='add'>+	memcpy(ndev-&gt;dev_addr, temp_addr, ETH_ALEN);</div><div class='add'>+</div><div class='add'>+	/* attach to cfg80211 for primary interface */</div><div class='add'>+	if (!ifp-&gt;idx) {</div><div class='add'>+		drvr-&gt;config = brcmf_cfg80211_attach(ndev, drvr-&gt;dev, drvr);</div><div class='add'>+		if (drvr-&gt;config == NULL) {</div><div class='add'>+			brcmf_dbg(ERROR, "wl_cfg80211_attach failed\n");</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (register_netdev(ndev) != 0) {</div><div class='add'>+		brcmf_dbg(ERROR, "couldn't register the net device\n");</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	brcmf_dbg(INFO, "%s: Broadcom Dongle Host Driver\n", ndev-&gt;name);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+fail:</div><div class='add'>+	ndev-&gt;netdev_ops = NULL;</div><div class='add'>+	return -EBADE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int</div><div class='ctx'> brcmf_add_if(struct device *dev, int ifidx, char *name, u8 *mac_addr)</div><div class='ctx'> {</div><div class='hunk'>@@ -882,7 +944,7 @@ brcmf_add_if(struct device *dev, int ifidx, char *name, u8 *mac_addr)</div><div class='ctx'> 	if (mac_addr != NULL)</div><div class='ctx'> 		memcpy(&amp;ifp-&gt;mac_addr, mac_addr, ETH_ALEN);</div><div class='ctx'> </div><div class='del'>-	if (brcmf_net_attach(drvr, ifp-&gt;idx)) {</div><div class='add'>+	if (brcmf_net_attach(ifp)) {</div><div class='ctx'> 		brcmf_dbg(ERROR, "brcmf_net_attach failed");</div><div class='ctx'> 		free_netdev(ifp-&gt;ndev);</div><div class='ctx'> 		drvr-&gt;iflist[ifidx] = NULL;</div><div class='hunk'>@@ -1016,69 +1078,16 @@ int brcmf_bus_start(struct device *dev)</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	/* add primary networking interface */</div><div class='add'>+	ret = brcmf_add_if(dev, 0, "wlan%d", drvr-&gt;mac);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	/* signal bus ready */</div><div class='ctx'> 	bus_if-&gt;state = BRCMF_BUS_DATA;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int brcmf_net_attach(struct brcmf_pub *drvr, int ifidx)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev;</div><div class='del'>-	u8 temp_addr[ETH_ALEN] = {</div><div class='del'>-		0x00, 0x90, 0x4c, 0x11, 0x22, 0x33};</div><div class='del'>-</div><div class='del'>-	brcmf_dbg(TRACE, "ifidx %d\n", ifidx);</div><div class='del'>-</div><div class='del'>-	ndev = drvr-&gt;iflist[ifidx]-&gt;ndev;</div><div class='del'>-	ndev-&gt;netdev_ops = &amp;brcmf_netdev_ops_pri;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We have to use the primary MAC for virtual interfaces</div><div class='del'>-	 */</div><div class='del'>-	if (ifidx != 0) {</div><div class='del'>-		/* for virtual interfaces use the primary MAC  */</div><div class='del'>-		memcpy(temp_addr, drvr-&gt;mac, ETH_ALEN);</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ifidx == 1) {</div><div class='del'>-		brcmf_dbg(TRACE, "ACCESS POINT MAC:\n");</div><div class='del'>-		/*  ACCESSPOINT INTERFACE CASE */</div><div class='del'>-		temp_addr[0] |= 0X02;	/* set bit 2 ,</div><div class='del'>-			 - Locally Administered address  */</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-	ndev-&gt;hard_header_len = ETH_HLEN + drvr-&gt;hdrlen;</div><div class='del'>-	ndev-&gt;ethtool_ops = &amp;brcmf_ethtool_ops;</div><div class='del'>-</div><div class='del'>-	drvr-&gt;rxsz = ndev-&gt;mtu + ndev-&gt;hard_header_len +</div><div class='del'>-			      drvr-&gt;hdrlen;</div><div class='del'>-</div><div class='del'>-	memcpy(ndev-&gt;dev_addr, temp_addr, ETH_ALEN);</div><div class='del'>-</div><div class='del'>-	/* attach to cfg80211 for primary interface */</div><div class='del'>-	if (!ifidx) {</div><div class='del'>-		drvr-&gt;config = brcmf_cfg80211_attach(ndev, drvr-&gt;dev, drvr);</div><div class='del'>-		if (drvr-&gt;config == NULL) {</div><div class='del'>-			brcmf_dbg(ERROR, "wl_cfg80211_attach failed\n");</div><div class='del'>-			goto fail;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (register_netdev(ndev) != 0) {</div><div class='del'>-		brcmf_dbg(ERROR, "couldn't register the net device\n");</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	brcmf_dbg(INFO, "%s: Broadcom Dongle Host Driver\n", ndev-&gt;name);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-fail:</div><div class='del'>-	ndev-&gt;netdev_ops = NULL;</div><div class='del'>-	return -EBADE;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void brcmf_bus_detach(struct brcmf_pub *drvr)</div><div class='ctx'> {</div><div class='ctx'> 	brcmf_dbg(TRACE, "Enter\n");</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c b/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c<br/>index 2bf5dda29291..1dbf2be478c8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c</a></div><div class='hunk'>@@ -574,6 +574,8 @@ struct brcmf_sdio {</div><div class='ctx'> </div><div class='ctx'> 	struct task_struct *dpc_tsk;</div><div class='ctx'> 	struct completion dpc_wait;</div><div class='add'>+	struct list_head dpc_tsklst;</div><div class='add'>+	spinlock_t dpc_tl_lock;</div><div class='ctx'> </div><div class='ctx'> 	struct semaphore sdsem;</div><div class='ctx'> </div><div class='hunk'>@@ -627,43 +629,29 @@ static bool data_ok(struct brcmf_sdio *bus)</div><div class='ctx'>  * Reads a register in the SDIO hardware block. This block occupies a series of</div><div class='ctx'>  * adresses on the 32 bit backplane bus.</div><div class='ctx'>  */</div><div class='del'>-static void</div><div class='del'>-r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)</div><div class='add'>+static int</div><div class='add'>+r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)</div><div class='ctx'> {</div><div class='ctx'> 	u8 idx = brcmf_sdio_chip_getinfidx(bus-&gt;ci, BCMA_CORE_SDIO_DEV);</div><div class='del'>-	*retryvar = 0;</div><div class='del'>-	do {</div><div class='del'>-		*regvar = brcmf_sdcard_reg_read(bus-&gt;sdiodev,</div><div class='del'>-				bus-&gt;ci-&gt;c_inf[idx].base + reg_offset,</div><div class='del'>-				sizeof(u32));</div><div class='del'>-	} while (brcmf_sdcard_regfail(bus-&gt;sdiodev) &amp;&amp;</div><div class='del'>-		 (++(*retryvar) &lt;= retry_limit));</div><div class='del'>-	if (*retryvar) {</div><div class='del'>-		bus-&gt;regfails += (*retryvar-1);</div><div class='del'>-		if (*retryvar &gt; retry_limit) {</div><div class='del'>-			brcmf_dbg(ERROR, "FAILED READ %Xh\n", reg_offset);</div><div class='del'>-			*regvar = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*regvar = brcmf_sdio_regrl(bus-&gt;sdiodev,</div><div class='add'>+				   bus-&gt;ci-&gt;c_inf[idx].base + offset, &amp;ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset, u32 *retryvar)</div><div class='add'>+static int</div><div class='add'>+w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)</div><div class='ctx'> {</div><div class='ctx'> 	u8 idx = brcmf_sdio_chip_getinfidx(bus-&gt;ci, BCMA_CORE_SDIO_DEV);</div><div class='del'>-	*retryvar = 0;</div><div class='del'>-	do {</div><div class='del'>-		brcmf_sdcard_reg_write(bus-&gt;sdiodev,</div><div class='del'>-				       bus-&gt;ci-&gt;c_inf[idx].base + reg_offset,</div><div class='del'>-				       sizeof(u32), regval);</div><div class='del'>-	} while (brcmf_sdcard_regfail(bus-&gt;sdiodev) &amp;&amp;</div><div class='del'>-		 (++(*retryvar) &lt;= retry_limit));</div><div class='del'>-	if (*retryvar) {</div><div class='del'>-		bus-&gt;regfails += (*retryvar-1);</div><div class='del'>-		if (*retryvar &gt; retry_limit)</div><div class='del'>-			brcmf_dbg(ERROR, "FAILED REGISTER WRITE %Xh\n",</div><div class='del'>-				  reg_offset);</div><div class='del'>-	}</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	brcmf_sdio_regwl(bus-&gt;sdiodev,</div><div class='add'>+			 bus-&gt;ci-&gt;c_inf[idx].base + reg_offset,</div><div class='add'>+			 regval, &amp;ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define PKT_AVAILABLE()		(intstatus &amp; I_HMB_FRAME_IND)</div><div class='hunk'>@@ -695,16 +683,16 @@ static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)</div><div class='ctx'> 		clkreq =</div><div class='ctx'> 		    bus-&gt;alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;</div><div class='ctx'> </div><div class='del'>-		brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-				       SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &amp;err);</div><div class='add'>+		brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='add'>+				 clkreq, &amp;err);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);</div><div class='ctx'> 			return -EBADE;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Check current status */</div><div class='del'>-		clkctl = brcmf_sdcard_cfg_read(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-					       SBSDIO_FUNC1_CHIPCLKCSR, &amp;err);</div><div class='add'>+		clkctl = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+					  SBSDIO_FUNC1_CHIPCLKCSR, &amp;err);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);</div><div class='ctx'> 			return -EBADE;</div><div class='hunk'>@@ -713,9 +701,8 @@ static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)</div><div class='ctx'> 		/* Go to pending and await interrupt if appropriate */</div><div class='ctx'> 		if (!SBSDIO_CLKAV(clkctl, bus-&gt;alp_only) &amp;&amp; pendok) {</div><div class='ctx'> 			/* Allow only clock-available interrupt */</div><div class='del'>-			devctl = brcmf_sdcard_cfg_read(bus-&gt;sdiodev,</div><div class='del'>-					SDIO_FUNC_1,</div><div class='del'>-					SBSDIO_DEVICE_CTL, &amp;err);</div><div class='add'>+			devctl = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+						  SBSDIO_DEVICE_CTL, &amp;err);</div><div class='ctx'> 			if (err) {</div><div class='ctx'> 				brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",</div><div class='ctx'> 					  err);</div><div class='hunk'>@@ -723,30 +710,28 @@ static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;</div><div class='del'>-			brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-					       SBSDIO_DEVICE_CTL, devctl, &amp;err);</div><div class='add'>+			brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_DEVICE_CTL,</div><div class='add'>+					 devctl, &amp;err);</div><div class='ctx'> 			brcmf_dbg(INFO, "CLKCTL: set PENDING\n");</div><div class='ctx'> 			bus-&gt;clkstate = CLK_PENDING;</div><div class='ctx'> </div><div class='ctx'> 			return 0;</div><div class='ctx'> 		} else if (bus-&gt;clkstate == CLK_PENDING) {</div><div class='ctx'> 			/* Cancel CA-only interrupt filter */</div><div class='del'>-			devctl =</div><div class='del'>-			    brcmf_sdcard_cfg_read(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='add'>+			devctl = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='ctx'> 						  SBSDIO_DEVICE_CTL, &amp;err);</div><div class='ctx'> 			devctl &amp;= ~SBSDIO_DEVCTL_CA_INT_ONLY;</div><div class='del'>-			brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-				SBSDIO_DEVICE_CTL, devctl, &amp;err);</div><div class='add'>+			brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_DEVICE_CTL,</div><div class='add'>+					 devctl, &amp;err);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Otherwise, wait here (polling) for HT Avail */</div><div class='ctx'> 		timeout = jiffies +</div><div class='ctx'> 			  msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);</div><div class='ctx'> 		while (!SBSDIO_CLKAV(clkctl, bus-&gt;alp_only)) {</div><div class='del'>-			clkctl = brcmf_sdcard_cfg_read(bus-&gt;sdiodev,</div><div class='del'>-						       SDIO_FUNC_1,</div><div class='del'>-						       SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='del'>-						       &amp;err);</div><div class='add'>+			clkctl = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+						  SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='add'>+						  &amp;err);</div><div class='ctx'> 			if (time_after(jiffies, timeout))</div><div class='ctx'> 				break;</div><div class='ctx'> 			else</div><div class='hunk'>@@ -779,17 +764,16 @@ static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)</div><div class='ctx'> </div><div class='ctx'> 		if (bus-&gt;clkstate == CLK_PENDING) {</div><div class='ctx'> 			/* Cancel CA-only interrupt filter */</div><div class='del'>-			devctl = brcmf_sdcard_cfg_read(bus-&gt;sdiodev,</div><div class='del'>-					SDIO_FUNC_1,</div><div class='del'>-					SBSDIO_DEVICE_CTL, &amp;err);</div><div class='add'>+			devctl = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+						  SBSDIO_DEVICE_CTL, &amp;err);</div><div class='ctx'> 			devctl &amp;= ~SBSDIO_DEVCTL_CA_INT_ONLY;</div><div class='del'>-			brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-				SBSDIO_DEVICE_CTL, devctl, &amp;err);</div><div class='add'>+			brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_DEVICE_CTL,</div><div class='add'>+					 devctl, &amp;err);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		bus-&gt;clkstate = CLK_SDONLY;</div><div class='del'>-		brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-			SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &amp;err);</div><div class='add'>+		brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='add'>+				 clkreq, &amp;err);</div><div class='ctx'> 		brcmf_dbg(INFO, "CLKCTL: turned OFF\n");</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",</div><div class='hunk'>@@ -872,7 +856,7 @@ static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)</div><div class='ctx'> </div><div class='ctx'> static int brcmf_sdbrcm_bussleep(struct brcmf_sdio *bus, bool sleep)</div><div class='ctx'> {</div><div class='del'>-	uint retries = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	brcmf_dbg(INFO, "request %s (currently %s)\n",</div><div class='ctx'> 		  sleep ? "SLEEP" : "WAKE",</div><div class='hunk'>@@ -892,22 +876,20 @@ static int brcmf_sdbrcm_bussleep(struct brcmf_sdio *bus, bool sleep)</div><div class='ctx'> 		brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);</div><div class='ctx'> </div><div class='ctx'> 		/* Tell device to start using OOB wakeup */</div><div class='del'>-		w_sdreg32(bus, SMB_USE_OOB,</div><div class='del'>-			  offsetof(struct sdpcmd_regs, tosbmailbox), &amp;retries);</div><div class='del'>-		if (retries &gt; retry_limit)</div><div class='add'>+		ret = w_sdreg32(bus, SMB_USE_OOB,</div><div class='add'>+				offsetof(struct sdpcmd_regs, tosbmailbox));</div><div class='add'>+		if (ret != 0)</div><div class='ctx'> 			brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n");</div><div class='ctx'> </div><div class='ctx'> 		/* Turn off our contribution to the HT clock request */</div><div class='ctx'> 		brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);</div><div class='ctx'> </div><div class='del'>-		brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-			SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='del'>-			SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);</div><div class='add'>+		brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='add'>+				 SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);</div><div class='ctx'> </div><div class='ctx'> 		/* Isolate the bus */</div><div class='del'>-		brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-			SBSDIO_DEVICE_CTL,</div><div class='del'>-			SBSDIO_DEVCTL_PADS_ISO, NULL);</div><div class='add'>+		brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_DEVICE_CTL,</div><div class='add'>+				 SBSDIO_DEVCTL_PADS_ISO, NULL);</div><div class='ctx'> </div><div class='ctx'> 		/* Change state */</div><div class='ctx'> 		bus-&gt;sleeping = true;</div><div class='hunk'>@@ -915,21 +897,20 @@ static int brcmf_sdbrcm_bussleep(struct brcmf_sdio *bus, bool sleep)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Waking up: bus power up is ok, set local state */</div><div class='ctx'> </div><div class='del'>-		brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-			SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);</div><div class='add'>+		brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='add'>+				 0, NULL);</div><div class='ctx'> </div><div class='ctx'> 		/* Make sure the controller has the bus up */</div><div class='ctx'> 		brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);</div><div class='ctx'> </div><div class='ctx'> 		/* Send misc interrupt to indicate OOB not needed */</div><div class='del'>-		w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),</div><div class='del'>-			  &amp;retries);</div><div class='del'>-		if (retries &lt;= retry_limit)</div><div class='del'>-			w_sdreg32(bus, SMB_DEV_INT,</div><div class='del'>-				  offsetof(struct sdpcmd_regs, tosbmailbox),</div><div class='del'>-				  &amp;retries);</div><div class='del'>-</div><div class='del'>-		if (retries &gt; retry_limit)</div><div class='add'>+		ret = w_sdreg32(bus, 0,</div><div class='add'>+				offsetof(struct sdpcmd_regs, tosbmailboxdata));</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			ret = w_sdreg32(bus, SMB_DEV_INT,</div><div class='add'>+				offsetof(struct sdpcmd_regs, tosbmailbox));</div><div class='add'>+</div><div class='add'>+		if (ret != 0)</div><div class='ctx'> 			brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP TO CLEAR OOB!!\n");</div><div class='ctx'> </div><div class='ctx'> 		/* Make sure we have SD bus access */</div><div class='hunk'>@@ -953,17 +934,17 @@ static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)</div><div class='ctx'> 	u32 intstatus = 0;</div><div class='ctx'> 	u32 hmb_data;</div><div class='ctx'> 	u8 fcbits;</div><div class='del'>-	uint retries = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	brcmf_dbg(TRACE, "Enter\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Read mailbox data and ack that we did so */</div><div class='del'>-	r_sdreg32(bus, &amp;hmb_data,</div><div class='del'>-		  offsetof(struct sdpcmd_regs, tohostmailboxdata), &amp;retries);</div><div class='add'>+	ret = r_sdreg32(bus, &amp;hmb_data,</div><div class='add'>+			offsetof(struct sdpcmd_regs, tohostmailboxdata));</div><div class='ctx'> </div><div class='del'>-	if (retries &lt;= retry_limit)</div><div class='add'>+	if (ret == 0)</div><div class='ctx'> 		w_sdreg32(bus, SMB_INT_ACK,</div><div class='del'>-			  offsetof(struct sdpcmd_regs, tosbmailbox), &amp;retries);</div><div class='add'>+			  offsetof(struct sdpcmd_regs, tosbmailbox));</div><div class='ctx'> 	bus-&gt;f1regdata += 2;</div><div class='ctx'> </div><div class='ctx'> 	/* Dongle recomposed rx frames, accept them again */</div><div class='hunk'>@@ -1038,17 +1019,16 @@ static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)</div><div class='ctx'> 	if (abort)</div><div class='ctx'> 		brcmf_sdcard_abort(bus-&gt;sdiodev, SDIO_FUNC_2);</div><div class='ctx'> </div><div class='del'>-	brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-			       SBSDIO_FUNC1_FRAMECTRL,</div><div class='del'>-			       SFC_RF_TERM, &amp;err);</div><div class='add'>+	brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_FRAMECTRL,</div><div class='add'>+			 SFC_RF_TERM, &amp;err);</div><div class='ctx'> 	bus-&gt;f1regdata++;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until the packet has been flushed (device/FIFO stable) */</div><div class='ctx'> 	for (lastrbc = retries = 0xffff; retries &gt; 0; retries--) {</div><div class='del'>-		hi = brcmf_sdcard_cfg_read(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-					   SBSDIO_FUNC1_RFRAMEBCHI, NULL);</div><div class='del'>-		lo = brcmf_sdcard_cfg_read(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-					   SBSDIO_FUNC1_RFRAMEBCLO, NULL);</div><div class='add'>+		hi = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+				      SBSDIO_FUNC1_RFRAMEBCHI, &amp;err);</div><div class='add'>+		lo = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+				      SBSDIO_FUNC1_RFRAMEBCLO, &amp;err);</div><div class='ctx'> 		bus-&gt;f1regdata += 2;</div><div class='ctx'> </div><div class='ctx'> 		if ((hi == 0) &amp;&amp; (lo == 0))</div><div class='hunk'>@@ -1068,11 +1048,11 @@ static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)</div><div class='ctx'> </div><div class='ctx'> 	if (rtx) {</div><div class='ctx'> 		bus-&gt;rxrtx++;</div><div class='del'>-		w_sdreg32(bus, SMB_NAK,</div><div class='del'>-			  offsetof(struct sdpcmd_regs, tosbmailbox), &amp;retries);</div><div class='add'>+		err = w_sdreg32(bus, SMB_NAK,</div><div class='add'>+				offsetof(struct sdpcmd_regs, tosbmailbox));</div><div class='ctx'> </div><div class='ctx'> 		bus-&gt;f1regdata++;</div><div class='del'>-		if (retries &lt;= retry_limit)</div><div class='add'>+		if (err == 0)</div><div class='ctx'> 			bus-&gt;rxskip = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1080,7 +1060,7 @@ static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)</div><div class='ctx'> 	bus-&gt;nextlen = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* If we can't reach the device, signal failure */</div><div class='del'>-	if (err || brcmf_sdcard_regfail(bus-&gt;sdiodev))</div><div class='add'>+	if (err)</div><div class='ctx'> 		bus-&gt;sdiodev-&gt;bus_if-&gt;state = BRCMF_BUS_DOWN;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2176,21 +2156,16 @@ static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,</div><div class='ctx'> 		bus-&gt;tx_sderrs++;</div><div class='ctx'> </div><div class='ctx'> 		brcmf_sdcard_abort(bus-&gt;sdiodev, SDIO_FUNC_2);</div><div class='del'>-		brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-				 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,</div><div class='del'>-				 NULL);</div><div class='add'>+		brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_FRAMECTRL,</div><div class='add'>+				 SFC_WF_TERM, NULL);</div><div class='ctx'> 		bus-&gt;f1regdata++;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; 3; i++) {</div><div class='ctx'> 			u8 hi, lo;</div><div class='del'>-			hi = brcmf_sdcard_cfg_read(bus-&gt;sdiodev,</div><div class='del'>-					     SDIO_FUNC_1,</div><div class='del'>-					     SBSDIO_FUNC1_WFRAMEBCHI,</div><div class='del'>-					     NULL);</div><div class='del'>-			lo = brcmf_sdcard_cfg_read(bus-&gt;sdiodev,</div><div class='del'>-					     SDIO_FUNC_1,</div><div class='del'>-					     SBSDIO_FUNC1_WFRAMEBCLO,</div><div class='del'>-					     NULL);</div><div class='add'>+			hi = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+					      SBSDIO_FUNC1_WFRAMEBCHI, NULL);</div><div class='add'>+			lo = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+					      SBSDIO_FUNC1_WFRAMEBCLO, NULL);</div><div class='ctx'> 			bus-&gt;f1regdata += 2;</div><div class='ctx'> 			if ((hi == 0) &amp;&amp; (lo == 0))</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -2217,7 +2192,6 @@ static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *pkt;</div><div class='ctx'> 	u32 intstatus = 0;</div><div class='del'>-	uint retries = 0;</div><div class='ctx'> 	int ret = 0, prec_out;</div><div class='ctx'> 	uint cnt = 0;</div><div class='ctx'> 	uint datalen;</div><div class='hunk'>@@ -2247,11 +2221,11 @@ static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)</div><div class='ctx'> 		/* In poll mode, need to check for other events */</div><div class='ctx'> 		if (!bus-&gt;intr &amp;&amp; cnt) {</div><div class='ctx'> 			/* Check device status, signal pending interrupt */</div><div class='del'>-			r_sdreg32(bus, &amp;intstatus,</div><div class='del'>-				  offsetof(struct sdpcmd_regs, intstatus),</div><div class='del'>-				  &amp;retries);</div><div class='add'>+			ret = r_sdreg32(bus, &amp;intstatus,</div><div class='add'>+					offsetof(struct sdpcmd_regs,</div><div class='add'>+						 intstatus));</div><div class='ctx'> 			bus-&gt;f2txdata++;</div><div class='del'>-			if (brcmf_sdcard_regfail(bus-&gt;sdiodev))</div><div class='add'>+			if (ret != 0)</div><div class='ctx'> 				break;</div><div class='ctx'> 			if (intstatus &amp; bus-&gt;hostintmask)</div><div class='ctx'> 				bus-&gt;ipend = true;</div><div class='hunk'>@@ -2273,7 +2247,6 @@ static void brcmf_sdbrcm_bus_stop(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	u32 local_hostintmask;</div><div class='ctx'> 	u8 saveclk;</div><div class='del'>-	uint retries;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct brcmf_bus *bus_if = dev_get_drvdata(dev);</div><div class='ctx'> 	struct brcmf_sdio_dev *sdiodev = bus_if-&gt;bus_priv.sdio;</div><div class='hunk'>@@ -2301,7 +2274,7 @@ static void brcmf_sdbrcm_bus_stop(struct device *dev)</div><div class='ctx'> 	brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable and clear interrupts at the chip level also */</div><div class='del'>-	w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &amp;retries);</div><div class='add'>+	w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));</div><div class='ctx'> 	local_hostintmask = bus-&gt;hostintmask;</div><div class='ctx'> 	bus-&gt;hostintmask = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2309,24 +2282,23 @@ static void brcmf_sdbrcm_bus_stop(struct device *dev)</div><div class='ctx'> 	bus-&gt;sdiodev-&gt;bus_if-&gt;state = BRCMF_BUS_DOWN;</div><div class='ctx'> </div><div class='ctx'> 	/* Force clocks on backplane to be sure F2 interrupt propagates */</div><div class='del'>-	saveclk = brcmf_sdcard_cfg_read(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-					SBSDIO_FUNC1_CHIPCLKCSR, &amp;err);</div><div class='add'>+	saveclk = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+				   SBSDIO_FUNC1_CHIPCLKCSR, &amp;err);</div><div class='ctx'> 	if (!err) {</div><div class='del'>-		brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-				       SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='del'>-				       (saveclk | SBSDIO_FORCE_HT), &amp;err);</div><div class='add'>+		brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='add'>+				 (saveclk | SBSDIO_FORCE_HT), &amp;err);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);</div><div class='ctx'> </div><div class='ctx'> 	/* Turn off the bus (F2), free any pending packets */</div><div class='ctx'> 	brcmf_dbg(INTR, "disable SDIO interrupts\n");</div><div class='del'>-	brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,</div><div class='del'>-			 SDIO_FUNC_ENABLE_1, NULL);</div><div class='add'>+	brcmf_sdio_regwb(bus-&gt;sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,</div><div class='add'>+			 NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear any pending interrupts now that F2 is disabled */</div><div class='ctx'> 	w_sdreg32(bus, local_hostintmask,</div><div class='del'>-		  offsetof(struct sdpcmd_regs, intstatus), &amp;retries);</div><div class='add'>+		  offsetof(struct sdpcmd_regs, intstatus));</div><div class='ctx'> </div><div class='ctx'> 	/* Turn off the backplane clock (only) */</div><div class='ctx'> 	brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);</div><div class='hunk'>@@ -2350,15 +2322,33 @@ static void brcmf_sdbrcm_bus_stop(struct device *dev)</div><div class='ctx'> 	up(&amp;bus-&gt;sdsem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_BRCMFMAC_SDIO_OOB</div><div class='add'>+static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;bus-&gt;sdiodev-&gt;irq_en_lock, flags);</div><div class='add'>+	if (!bus-&gt;sdiodev-&gt;irq_en &amp;&amp; !bus-&gt;ipend) {</div><div class='add'>+		enable_irq(bus-&gt;sdiodev-&gt;irq);</div><div class='add'>+		bus-&gt;sdiodev-&gt;irq_en = true;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;bus-&gt;sdiodev-&gt;irq_en_lock, flags);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif		/* CONFIG_BRCMFMAC_SDIO_OOB */</div><div class='add'>+</div><div class='ctx'> static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)</div><div class='ctx'> {</div><div class='ctx'> 	u32 intstatus, newstatus = 0;</div><div class='del'>-	uint retries = 0;</div><div class='ctx'> 	uint rxlimit = bus-&gt;rxbound;	/* Rx frames to read before resched */</div><div class='ctx'> 	uint txlimit = bus-&gt;txbound;	/* Tx frames to send before resched */</div><div class='ctx'> 	uint framecnt = 0;	/* Temporary counter of tx/rx frames */</div><div class='ctx'> 	bool rxdone = true;	/* Flag for no more read data */</div><div class='ctx'> 	bool resched = false;	/* Flag indicating resched wanted */</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	brcmf_dbg(TRACE, "Enter\n");</div><div class='ctx'> </div><div class='hunk'>@@ -2369,13 +2359,12 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)</div><div class='ctx'> </div><div class='ctx'> 	/* If waiting for HTAVAIL, check status */</div><div class='ctx'> 	if (bus-&gt;clkstate == CLK_PENDING) {</div><div class='del'>-		int err;</div><div class='ctx'> 		u8 clkctl, devctl = 0;</div><div class='ctx'> </div><div class='ctx'> #ifdef DEBUG</div><div class='ctx'> 		/* Check for inconsistent device control */</div><div class='del'>-		devctl = brcmf_sdcard_cfg_read(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-					       SBSDIO_DEVICE_CTL, &amp;err);</div><div class='add'>+		devctl = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+					  SBSDIO_DEVICE_CTL, &amp;err);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);</div><div class='ctx'> 			bus-&gt;sdiodev-&gt;bus_if-&gt;state = BRCMF_BUS_DOWN;</div><div class='hunk'>@@ -2383,8 +2372,8 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)</div><div class='ctx'> #endif				/* DEBUG */</div><div class='ctx'> </div><div class='ctx'> 		/* Read CSR, if clock on switch to AVAIL, else ignore */</div><div class='del'>-		clkctl = brcmf_sdcard_cfg_read(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-					       SBSDIO_FUNC1_CHIPCLKCSR, &amp;err);</div><div class='add'>+		clkctl = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+					  SBSDIO_FUNC1_CHIPCLKCSR, &amp;err);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			brcmf_dbg(ERROR, "error reading CSR: %d\n",</div><div class='ctx'> 				  err);</div><div class='hunk'>@@ -2395,17 +2384,16 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)</div><div class='ctx'> 			  devctl, clkctl);</div><div class='ctx'> </div><div class='ctx'> 		if (SBSDIO_HTAV(clkctl)) {</div><div class='del'>-			devctl = brcmf_sdcard_cfg_read(bus-&gt;sdiodev,</div><div class='del'>-						       SDIO_FUNC_1,</div><div class='del'>-						       SBSDIO_DEVICE_CTL, &amp;err);</div><div class='add'>+			devctl = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+						  SBSDIO_DEVICE_CTL, &amp;err);</div><div class='ctx'> 			if (err) {</div><div class='ctx'> 				brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",</div><div class='ctx'> 					  err);</div><div class='ctx'> 				bus-&gt;sdiodev-&gt;bus_if-&gt;state = BRCMF_BUS_DOWN;</div><div class='ctx'> 			}</div><div class='ctx'> 			devctl &amp;= ~SBSDIO_DEVCTL_CA_INT_ONLY;</div><div class='del'>-			brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-				SBSDIO_DEVICE_CTL, devctl, &amp;err);</div><div class='add'>+			brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_DEVICE_CTL,</div><div class='add'>+					 devctl, &amp;err);</div><div class='ctx'> 			if (err) {</div><div class='ctx'> 				brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",</div><div class='ctx'> 					  err);</div><div class='hunk'>@@ -2427,17 +2415,17 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)</div><div class='ctx'> 	/* Pending interrupt indicates new device status */</div><div class='ctx'> 	if (bus-&gt;ipend) {</div><div class='ctx'> 		bus-&gt;ipend = false;</div><div class='del'>-		r_sdreg32(bus, &amp;newstatus,</div><div class='del'>-			  offsetof(struct sdpcmd_regs, intstatus), &amp;retries);</div><div class='add'>+		err = r_sdreg32(bus, &amp;newstatus,</div><div class='add'>+				offsetof(struct sdpcmd_regs, intstatus));</div><div class='ctx'> 		bus-&gt;f1regdata++;</div><div class='del'>-		if (brcmf_sdcard_regfail(bus-&gt;sdiodev))</div><div class='add'>+		if (err != 0)</div><div class='ctx'> 			newstatus = 0;</div><div class='ctx'> 		newstatus &amp;= bus-&gt;hostintmask;</div><div class='ctx'> 		bus-&gt;fcstate = !!(newstatus &amp; I_HMB_FC_STATE);</div><div class='ctx'> 		if (newstatus) {</div><div class='del'>-			w_sdreg32(bus, newstatus,</div><div class='del'>-				  offsetof(struct sdpcmd_regs, intstatus),</div><div class='del'>-				  &amp;retries);</div><div class='add'>+			err = w_sdreg32(bus, newstatus,</div><div class='add'>+					offsetof(struct sdpcmd_regs,</div><div class='add'>+						 intstatus));</div><div class='ctx'> 			bus-&gt;f1regdata++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2452,11 +2440,11 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (intstatus &amp; I_HMB_FC_CHANGE) {</div><div class='ctx'> 		intstatus &amp;= ~I_HMB_FC_CHANGE;</div><div class='del'>-		w_sdreg32(bus, I_HMB_FC_CHANGE,</div><div class='del'>-			  offsetof(struct sdpcmd_regs, intstatus), &amp;retries);</div><div class='add'>+		err = w_sdreg32(bus, I_HMB_FC_CHANGE,</div><div class='add'>+				offsetof(struct sdpcmd_regs, intstatus));</div><div class='ctx'> </div><div class='del'>-		r_sdreg32(bus, &amp;newstatus,</div><div class='del'>-			  offsetof(struct sdpcmd_regs, intstatus), &amp;retries);</div><div class='add'>+		err = r_sdreg32(bus, &amp;newstatus,</div><div class='add'>+				offsetof(struct sdpcmd_regs, intstatus));</div><div class='ctx'> 		bus-&gt;f1regdata += 2;</div><div class='ctx'> 		bus-&gt;fcstate =</div><div class='ctx'> 		    !!(newstatus &amp; (I_HMB_FC_STATE | I_HMB_FC_CHANGE));</div><div class='hunk'>@@ -2507,6 +2495,8 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)</div><div class='ctx'> 	bus-&gt;intstatus = intstatus;</div><div class='ctx'> </div><div class='ctx'> clkwait:</div><div class='add'>+	brcmf_sdbrcm_clrintr(bus);</div><div class='add'>+</div><div class='ctx'> 	if (data_ok(bus) &amp;&amp; bus-&gt;ctrl_frame_stat &amp;&amp;</div><div class='ctx'> 		(bus-&gt;clkstate == CLK_AVAIL)) {</div><div class='ctx'> 		int ret, i;</div><div class='hunk'>@@ -2524,21 +2514,18 @@ clkwait:</div><div class='ctx'> </div><div class='ctx'> 			brcmf_sdcard_abort(bus-&gt;sdiodev, SDIO_FUNC_2);</div><div class='ctx'> </div><div class='del'>-			brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-					 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,</div><div class='del'>-					 NULL);</div><div class='add'>+			brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_FRAMECTRL,</div><div class='add'>+					 SFC_WF_TERM, &amp;err);</div><div class='ctx'> 			bus-&gt;f1regdata++;</div><div class='ctx'> </div><div class='ctx'> 			for (i = 0; i &lt; 3; i++) {</div><div class='ctx'> 				u8 hi, lo;</div><div class='del'>-				hi = brcmf_sdcard_cfg_read(bus-&gt;sdiodev,</div><div class='del'>-						     SDIO_FUNC_1,</div><div class='del'>-						     SBSDIO_FUNC1_WFRAMEBCHI,</div><div class='del'>-						     NULL);</div><div class='del'>-				lo = brcmf_sdcard_cfg_read(bus-&gt;sdiodev,</div><div class='del'>-						     SDIO_FUNC_1,</div><div class='del'>-						     SBSDIO_FUNC1_WFRAMEBCLO,</div><div class='del'>-						     NULL);</div><div class='add'>+				hi = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+						      SBSDIO_FUNC1_WFRAMEBCHI,</div><div class='add'>+						      &amp;err);</div><div class='add'>+				lo = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+						      SBSDIO_FUNC1_WFRAMEBCLO,</div><div class='add'>+						      &amp;err);</div><div class='ctx'> 				bus-&gt;f1regdata += 2;</div><div class='ctx'> 				if ((hi == 0) &amp;&amp; (lo == 0))</div><div class='ctx'> 					break;</div><div class='hunk'>@@ -2565,10 +2552,8 @@ clkwait:</div><div class='ctx'> 		 else await next interrupt */</div><div class='ctx'> 	/* On failed register access, all bets are off:</div><div class='ctx'> 		 no resched or interrupts */</div><div class='del'>-	if ((bus-&gt;sdiodev-&gt;bus_if-&gt;state == BRCMF_BUS_DOWN) ||</div><div class='del'>-	    brcmf_sdcard_regfail(bus-&gt;sdiodev)) {</div><div class='del'>-		brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation %d\n",</div><div class='del'>-			  brcmf_sdcard_regfail(bus-&gt;sdiodev));</div><div class='add'>+	if ((bus-&gt;sdiodev-&gt;bus_if-&gt;state == BRCMF_BUS_DOWN) || (err != 0)) {</div><div class='add'>+		brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation\n");</div><div class='ctx'> 		bus-&gt;sdiodev-&gt;bus_if-&gt;state = BRCMF_BUS_DOWN;</div><div class='ctx'> 		bus-&gt;intstatus = 0;</div><div class='ctx'> 	} else if (bus-&gt;clkstate == CLK_PENDING) {</div><div class='hunk'>@@ -2594,29 +2579,59 @@ clkwait:</div><div class='ctx'> 	return resched;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio *bus)</div><div class='add'>+{</div><div class='add'>+	struct list_head *new_hd;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (in_interrupt())</div><div class='add'>+		new_hd = kzalloc(sizeof(struct list_head), GFP_ATOMIC);</div><div class='add'>+	else</div><div class='add'>+		new_hd = kzalloc(sizeof(struct list_head), GFP_KERNEL);</div><div class='add'>+	if (new_hd == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;bus-&gt;dpc_tl_lock, flags);</div><div class='add'>+	list_add_tail(new_hd, &amp;bus-&gt;dpc_tsklst);</div><div class='add'>+	spin_unlock_irqrestore(&amp;bus-&gt;dpc_tl_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int brcmf_sdbrcm_dpc_thread(void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct brcmf_sdio *bus = (struct brcmf_sdio *) data;</div><div class='add'>+	struct list_head *cur_hd, *tmp_hd;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	allow_signal(SIGTERM);</div><div class='ctx'> 	/* Run until signal received */</div><div class='ctx'> 	while (1) {</div><div class='ctx'> 		if (kthread_should_stop())</div><div class='ctx'> 			break;</div><div class='del'>-		if (!wait_for_completion_interruptible(&amp;bus-&gt;dpc_wait)) {</div><div class='del'>-			/* Call bus dpc unless it indicated down</div><div class='del'>-			(then clean stop) */</div><div class='del'>-			if (bus-&gt;sdiodev-&gt;bus_if-&gt;state != BRCMF_BUS_DOWN) {</div><div class='del'>-				if (brcmf_sdbrcm_dpc(bus))</div><div class='del'>-					complete(&amp;bus-&gt;dpc_wait);</div><div class='del'>-			} else {</div><div class='add'>+</div><div class='add'>+		if (list_empty(&amp;bus-&gt;dpc_tsklst))</div><div class='add'>+			if (wait_for_completion_interruptible(&amp;bus-&gt;dpc_wait))</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;bus-&gt;dpc_tl_lock, flags);</div><div class='add'>+		list_for_each_safe(cur_hd, tmp_hd, &amp;bus-&gt;dpc_tsklst) {</div><div class='add'>+			spin_unlock_irqrestore(&amp;bus-&gt;dpc_tl_lock, flags);</div><div class='add'>+</div><div class='add'>+			if (bus-&gt;sdiodev-&gt;bus_if-&gt;state == BRCMF_BUS_DOWN) {</div><div class='ctx'> 				/* after stopping the bus, exit thread */</div><div class='ctx'> 				brcmf_sdbrcm_bus_stop(bus-&gt;sdiodev-&gt;dev);</div><div class='ctx'> 				bus-&gt;dpc_tsk = NULL;</div><div class='add'>+				spin_lock_irqsave(&amp;bus-&gt;dpc_tl_lock, flags);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='del'>-		} else</div><div class='del'>-			break;</div><div class='add'>+</div><div class='add'>+			if (brcmf_sdbrcm_dpc(bus))</div><div class='add'>+				brcmf_sdbrcm_adddpctsk(bus);</div><div class='add'>+</div><div class='add'>+			spin_lock_irqsave(&amp;bus-&gt;dpc_tl_lock, flags);</div><div class='add'>+			list_del(cur_hd);</div><div class='add'>+			kfree(cur_hd);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;bus-&gt;dpc_tl_lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2669,8 +2684,10 @@ static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)</div><div class='ctx'> 	/* Schedule DPC if needed to send queued packet(s) */</div><div class='ctx'> 	if (!bus-&gt;dpc_sched) {</div><div class='ctx'> 		bus-&gt;dpc_sched = true;</div><div class='del'>-		if (bus-&gt;dpc_tsk)</div><div class='add'>+		if (bus-&gt;dpc_tsk) {</div><div class='add'>+			brcmf_sdbrcm_adddpctsk(bus);</div><div class='ctx'> 			complete(&amp;bus-&gt;dpc_wait);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2832,19 +2849,16 @@ static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)</div><div class='ctx'> </div><div class='ctx'> 		brcmf_sdcard_abort(bus-&gt;sdiodev, SDIO_FUNC_2);</div><div class='ctx'> </div><div class='del'>-		brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-				       SBSDIO_FUNC1_FRAMECTRL,</div><div class='del'>-				       SFC_WF_TERM, NULL);</div><div class='add'>+		brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_FRAMECTRL,</div><div class='add'>+				 SFC_WF_TERM, NULL);</div><div class='ctx'> 		bus-&gt;f1regdata++;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; 3; i++) {</div><div class='ctx'> 			u8 hi, lo;</div><div class='del'>-			hi = brcmf_sdcard_cfg_read(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-						   SBSDIO_FUNC1_WFRAMEBCHI,</div><div class='del'>-						   NULL);</div><div class='del'>-			lo = brcmf_sdcard_cfg_read(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-						   SBSDIO_FUNC1_WFRAMEBCLO,</div><div class='del'>-						   NULL);</div><div class='add'>+			hi = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+					      SBSDIO_FUNC1_WFRAMEBCHI, NULL);</div><div class='add'>+			lo = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+					      SBSDIO_FUNC1_WFRAMEBCLO, NULL);</div><div class='ctx'> 			bus-&gt;f1regdata += 2;</div><div class='ctx'> 			if (hi == 0 &amp;&amp; lo == 0)</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -3134,7 +3148,6 @@ static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)</div><div class='ctx'> </div><div class='ctx'> static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)</div><div class='ctx'> {</div><div class='del'>-	uint retries;</div><div class='ctx'> 	int bcmerror = 0;</div><div class='ctx'> 	struct chip_info *ci = bus-&gt;ci;</div><div class='ctx'> </div><div class='hunk'>@@ -3168,7 +3181,7 @@ static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		w_sdreg32(bus, 0xFFFFFFFF,</div><div class='del'>-			  offsetof(struct sdpcmd_regs, intstatus), &amp;retries);</div><div class='add'>+			  offsetof(struct sdpcmd_regs, intstatus));</div><div class='ctx'> </div><div class='ctx'> 		ci-&gt;resetcore(bus-&gt;sdiodev, ci, BCMA_CORE_ARM_CM3);</div><div class='ctx'> </div><div class='hunk'>@@ -3390,7 +3403,6 @@ static int brcmf_sdbrcm_bus_init(struct device *dev)</div><div class='ctx'> 	struct brcmf_sdio_dev *sdiodev = bus_if-&gt;bus_priv.sdio;</div><div class='ctx'> 	struct brcmf_sdio *bus = sdiodev-&gt;bus;</div><div class='ctx'> 	unsigned long timeout;</div><div class='del'>-	uint retries = 0;</div><div class='ctx'> 	u8 ready, enable;</div><div class='ctx'> 	int err, ret = 0;</div><div class='ctx'> 	u8 saveclk;</div><div class='hunk'>@@ -3418,13 +3430,11 @@ static int brcmf_sdbrcm_bus_init(struct device *dev)</div><div class='ctx'> 		goto exit;</div><div class='ctx'> </div><div class='ctx'> 	/* Force clocks on backplane to be sure F2 interrupt propagates */</div><div class='del'>-	saveclk =</div><div class='del'>-	    brcmf_sdcard_cfg_read(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-				  SBSDIO_FUNC1_CHIPCLKCSR, &amp;err);</div><div class='add'>+	saveclk = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+				   SBSDIO_FUNC1_CHIPCLKCSR, &amp;err);</div><div class='ctx'> 	if (!err) {</div><div class='del'>-		brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-				       SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='del'>-				       (saveclk | SBSDIO_FORCE_HT), &amp;err);</div><div class='add'>+		brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='add'>+				 (saveclk | SBSDIO_FORCE_HT), &amp;err);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);</div><div class='hunk'>@@ -3433,17 +3443,16 @@ static int brcmf_sdbrcm_bus_init(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Enable function 2 (frame transfers) */</div><div class='ctx'> 	w_sdreg32(bus, SDPCM_PROT_VERSION &lt;&lt; SMB_DATA_VERSION_SHIFT,</div><div class='del'>-		  offsetof(struct sdpcmd_regs, tosbmailboxdata), &amp;retries);</div><div class='add'>+		  offsetof(struct sdpcmd_regs, tosbmailboxdata));</div><div class='ctx'> 	enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);</div><div class='ctx'> </div><div class='del'>-	brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,</div><div class='del'>-			       enable, NULL);</div><div class='add'>+	brcmf_sdio_regwb(bus-&gt;sdiodev, SDIO_CCCR_IOEx, enable, NULL);</div><div class='ctx'> </div><div class='ctx'> 	timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);</div><div class='ctx'> 	ready = 0;</div><div class='ctx'> 	while (enable != ready) {</div><div class='del'>-		ready = brcmf_sdcard_cfg_read(bus-&gt;sdiodev, SDIO_FUNC_0,</div><div class='del'>-					      SDIO_CCCR_IORx, NULL);</div><div class='add'>+		ready = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+					 SDIO_CCCR_IORx, NULL);</div><div class='ctx'> 		if (time_after(jiffies, timeout))</div><div class='ctx'> 			break;</div><div class='ctx'> 		else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))</div><div class='hunk'>@@ -3458,24 +3467,27 @@ static int brcmf_sdbrcm_bus_init(struct device *dev)</div><div class='ctx'> 		/* Set up the interrupt mask and enable interrupts */</div><div class='ctx'> 		bus-&gt;hostintmask = HOSTINTMASK;</div><div class='ctx'> 		w_sdreg32(bus, bus-&gt;hostintmask,</div><div class='del'>-			  offsetof(struct sdpcmd_regs, hostintmask), &amp;retries);</div><div class='add'>+			  offsetof(struct sdpcmd_regs, hostintmask));</div><div class='ctx'> </div><div class='del'>-		brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-				       SBSDIO_WATERMARK, 8, &amp;err);</div><div class='add'>+		brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_WATERMARK, 8, &amp;err);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Disable F2 again */</div><div class='ctx'> 		enable = SDIO_FUNC_ENABLE_1;</div><div class='del'>-		brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_0,</div><div class='del'>-				       SDIO_CCCR_IOEx, enable, NULL);</div><div class='add'>+		brcmf_sdio_regwb(bus-&gt;sdiodev, SDIO_CCCR_IOEx, enable, NULL);</div><div class='ctx'> 		ret = -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Restore previous clock setting */</div><div class='del'>-	brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-			       SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &amp;err);</div><div class='add'>+	brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &amp;err);</div><div class='add'>+</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		ret = brcmf_sdio_intr_register(bus-&gt;sdiodev);</div><div class='add'>+		if (ret != 0)</div><div class='add'>+			brcmf_dbg(ERROR, "intr register failed:%d\n", ret);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* If we didn't come up, turn off backplane clock */</div><div class='del'>-	if (!ret)</div><div class='add'>+	if (bus_if-&gt;state != BRCMF_BUS_DATA)</div><div class='ctx'> 		brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);</div><div class='ctx'> </div><div class='ctx'> exit:</div><div class='hunk'>@@ -3514,8 +3526,10 @@ void brcmf_sdbrcm_isr(void *arg)</div><div class='ctx'> 		brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");</div><div class='ctx'> </div><div class='ctx'> 	bus-&gt;dpc_sched = true;</div><div class='del'>-	if (bus-&gt;dpc_tsk)</div><div class='add'>+	if (bus-&gt;dpc_tsk) {</div><div class='add'>+		brcmf_sdbrcm_adddpctsk(bus);</div><div class='ctx'> 		complete(&amp;bus-&gt;dpc_wait);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)</div><div class='hunk'>@@ -3544,9 +3558,9 @@ static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)</div><div class='ctx'> </div><div class='ctx'> 			if (!bus-&gt;dpc_sched) {</div><div class='ctx'> 				u8 devpend;</div><div class='del'>-				devpend = brcmf_sdcard_cfg_read(bus-&gt;sdiodev,</div><div class='del'>-						SDIO_FUNC_0, SDIO_CCCR_INTx,</div><div class='del'>-						NULL);</div><div class='add'>+				devpend = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='add'>+							   SDIO_CCCR_INTx,</div><div class='add'>+							   NULL);</div><div class='ctx'> 				intstatus =</div><div class='ctx'> 				    devpend &amp; (INTR_STATUS_FUNC1 |</div><div class='ctx'> 					       INTR_STATUS_FUNC2);</div><div class='hunk'>@@ -3559,8 +3573,10 @@ static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)</div><div class='ctx'> 				bus-&gt;ipend = true;</div><div class='ctx'> </div><div class='ctx'> 				bus-&gt;dpc_sched = true;</div><div class='del'>-				if (bus-&gt;dpc_tsk)</div><div class='add'>+				if (bus-&gt;dpc_tsk) {</div><div class='add'>+					brcmf_sdbrcm_adddpctsk(bus);</div><div class='ctx'> 					complete(&amp;bus-&gt;dpc_wait);</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -3668,24 +3684,18 @@ brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)</div><div class='ctx'> </div><div class='ctx'> 	bus-&gt;alp_only = true;</div><div class='ctx'> </div><div class='del'>-	/* Return the window to backplane enumeration space for core access */</div><div class='del'>-	if (brcmf_sdcard_set_sbaddr_window(bus-&gt;sdiodev, SI_ENUM_BASE))</div><div class='del'>-		brcmf_dbg(ERROR, "FAILED to return to SI_ENUM_BASE\n");</div><div class='del'>-</div><div class='ctx'> 	pr_debug("F1 signature read @0x18000000=0x%4x\n",</div><div class='del'>-		 brcmf_sdcard_reg_read(bus-&gt;sdiodev, SI_ENUM_BASE, 4));</div><div class='add'>+		 brcmf_sdio_regrl(bus-&gt;sdiodev, SI_ENUM_BASE, NULL));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Force PLL off until brcmf_sdio_chip_attach()</div><div class='ctx'> 	 * programs PLL control regs</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-			       SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='del'>-			       BRCMF_INIT_CLKCTL1, &amp;err);</div><div class='add'>+	brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,</div><div class='add'>+			 BRCMF_INIT_CLKCTL1, &amp;err);</div><div class='ctx'> 	if (!err)</div><div class='del'>-		clkctl =</div><div class='del'>-		    brcmf_sdcard_cfg_read(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='add'>+		clkctl = brcmf_sdio_regrb(bus-&gt;sdiodev,</div><div class='ctx'> 					  SBSDIO_FUNC1_CHIPCLKCSR, &amp;err);</div><div class='ctx'> </div><div class='ctx'> 	if (err || ((clkctl &amp; ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {</div><div class='hunk'>@@ -3718,9 +3728,8 @@ brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)</div><div class='ctx'> 	idx = brcmf_sdio_chip_getinfidx(bus-&gt;ci, BCMA_CORE_SDIO_DEV);</div><div class='ctx'> 	reg_addr = bus-&gt;ci-&gt;c_inf[idx].base +</div><div class='ctx'> 		   offsetof(struct sdpcmd_regs, corecontrol);</div><div class='del'>-	reg_val = brcmf_sdcard_reg_read(bus-&gt;sdiodev, reg_addr, sizeof(u32));</div><div class='del'>-	brcmf_sdcard_reg_write(bus-&gt;sdiodev, reg_addr, sizeof(u32),</div><div class='del'>-			       reg_val | CC_BPRESEN);</div><div class='add'>+	reg_val = brcmf_sdio_regrl(bus-&gt;sdiodev, reg_addr, NULL);</div><div class='add'>+	brcmf_sdio_regwl(bus-&gt;sdiodev, reg_addr, reg_val | CC_BPRESEN, NULL);</div><div class='ctx'> </div><div class='ctx'> 	brcmu_pktq_init(&amp;bus-&gt;txq, (PRIOMASK + 1), TXQLEN);</div><div class='ctx'> </div><div class='hunk'>@@ -3745,16 +3754,15 @@ static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)</div><div class='ctx'> 	brcmf_dbg(TRACE, "Enter\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Disable F2 to clear any intermediate frame state on the dongle */</div><div class='del'>-	brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,</div><div class='del'>-			       SDIO_FUNC_ENABLE_1, NULL);</div><div class='add'>+	brcmf_sdio_regwb(bus-&gt;sdiodev, SDIO_CCCR_IOEx,</div><div class='add'>+			 SDIO_FUNC_ENABLE_1, NULL);</div><div class='ctx'> </div><div class='ctx'> 	bus-&gt;sdiodev-&gt;bus_if-&gt;state = BRCMF_BUS_DOWN;</div><div class='ctx'> 	bus-&gt;sleeping = false;</div><div class='ctx'> 	bus-&gt;rxflow = false;</div><div class='ctx'> </div><div class='ctx'> 	/* Done with backplane-dependent accesses, can drop clock... */</div><div class='del'>-	brcmf_sdcard_cfg_write(bus-&gt;sdiodev, SDIO_FUNC_1,</div><div class='del'>-			       SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);</div><div class='add'>+	brcmf_sdio_regwb(bus-&gt;sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* ...and initialize clock/power states */</div><div class='ctx'> 	bus-&gt;clkstate = CLK_SDONLY;</div><div class='hunk'>@@ -3829,7 +3837,7 @@ static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)</div><div class='ctx'> </div><div class='ctx'> 	if (bus) {</div><div class='ctx'> 		/* De-register interrupt handler */</div><div class='del'>-		brcmf_sdcard_intr_dereg(bus-&gt;sdiodev);</div><div class='add'>+		brcmf_sdio_intr_unregister(bus-&gt;sdiodev);</div><div class='ctx'> </div><div class='ctx'> 		if (bus-&gt;sdiodev-&gt;bus_if-&gt;drvr) {</div><div class='ctx'> 			brcmf_detach(bus-&gt;sdiodev-&gt;dev);</div><div class='hunk'>@@ -3897,6 +3905,8 @@ void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Initialize DPC thread */</div><div class='ctx'> 	init_completion(&amp;bus-&gt;dpc_wait);</div><div class='add'>+	INIT_LIST_HEAD(&amp;bus-&gt;dpc_tsklst);</div><div class='add'>+	spin_lock_init(&amp;bus-&gt;dpc_tl_lock);</div><div class='ctx'> 	bus-&gt;dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,</div><div class='ctx'> 				   bus, "brcmf_dpc");</div><div class='ctx'> 	if (IS_ERR(bus-&gt;dpc_tsk)) {</div><div class='hunk'>@@ -3928,15 +3938,6 @@ void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Register interrupt callback, but mask it (not operational yet). */</div><div class='del'>-	brcmf_dbg(INTR, "disable SDIO interrupts (not interested yet)\n");</div><div class='del'>-	ret = brcmf_sdcard_intr_reg(bus-&gt;sdiodev);</div><div class='del'>-	if (ret != 0) {</div><div class='del'>-		brcmf_dbg(ERROR, "FAILED: sdcard_intr_reg returned %d\n", ret);</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-	brcmf_dbg(INTR, "registered SDIO interrupt function ok\n");</div><div class='del'>-</div><div class='ctx'> 	brcmf_dbg(INFO, "completed!!\n");</div><div class='ctx'> </div><div class='ctx'> 	/* if firmware path present try to download and bring up bus */</div><div class='hunk'>@@ -3948,12 +3949,6 @@ void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* add interface and open for business */</div><div class='del'>-	if (brcmf_add_if(bus-&gt;sdiodev-&gt;dev, 0, "wlan%d", NULL)) {</div><div class='del'>-		brcmf_dbg(ERROR, "Add primary net device interface failed!!\n");</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return bus;</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c b/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c<br/>index 1534efc21631..f8e1f1c84d08 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c</a></div><div class='hunk'>@@ -93,8 +93,9 @@ brcmf_sdio_sb_corerev(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> </div><div class='ctx'> 	idx = brcmf_sdio_chip_getinfidx(ci, coreid);</div><div class='ctx'> </div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbidhigh), 4);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+				   CORE_SB(ci-&gt;c_inf[idx].base, sbidhigh),</div><div class='add'>+				   NULL);</div><div class='ctx'> 	return SBCOREREV(regdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -118,8 +119,9 @@ brcmf_sdio_sb_iscoreup(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> </div><div class='ctx'> 	idx = brcmf_sdio_chip_getinfidx(ci, coreid);</div><div class='ctx'> </div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+				   CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow),</div><div class='add'>+				   NULL);</div><div class='ctx'> 	regdata &amp;= (SSB_TMSLOW_RESET | SSB_TMSLOW_REJECT |</div><div class='ctx'> 		    SSB_IMSTATE_REJECT | SSB_TMSLOW_CLOCK);</div><div class='ctx'> 	return (SSB_TMSLOW_CLOCK == regdata);</div><div class='hunk'>@@ -135,13 +137,13 @@ brcmf_sdio_ai_iscoreup(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> </div><div class='ctx'> 	idx = brcmf_sdio_chip_getinfidx(ci, coreid);</div><div class='ctx'> </div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-					ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL, 4);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL,</div><div class='add'>+				   NULL);</div><div class='ctx'> 	ret = (regdata &amp; (BCMA_IOCTL_FGC | BCMA_IOCTL_CLK)) == BCMA_IOCTL_CLK;</div><div class='ctx'> </div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-					ci-&gt;c_inf[idx].wrapbase+BCMA_RESET_CTL,</div><div class='del'>-					4);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+				   ci-&gt;c_inf[idx].wrapbase+BCMA_RESET_CTL,</div><div class='add'>+				   NULL);</div><div class='ctx'> 	ret = ret &amp;&amp; ((regdata &amp; BCMA_RESET_CTL_RESET) == 0);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -151,84 +153,85 @@ static void</div><div class='ctx'> brcmf_sdio_sb_coredisable(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> 			  struct chip_info *ci, u16 coreid)</div><div class='ctx'> {</div><div class='del'>-	u32 regdata;</div><div class='add'>+	u32 regdata, base;</div><div class='ctx'> 	u8 idx;</div><div class='ctx'> </div><div class='ctx'> 	idx = brcmf_sdio_chip_getinfidx(ci, coreid);</div><div class='add'>+	base = ci-&gt;c_inf[idx].base;</div><div class='ctx'> </div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-		CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbtmstatelow), NULL);</div><div class='ctx'> 	if (regdata &amp; SSB_TMSLOW_RESET)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-		CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbtmstatelow), NULL);</div><div class='ctx'> 	if ((regdata &amp; SSB_TMSLOW_CLOCK) != 0) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * set target reject and spin until busy is clear</div><div class='ctx'> 		 * (preserve core-specific bits)</div><div class='ctx'> 		 */</div><div class='del'>-		regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4);</div><div class='del'>-		brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-				CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow),</div><div class='del'>-				4, regdata | SSB_TMSLOW_REJECT);</div><div class='del'>-</div><div class='del'>-		regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4);</div><div class='add'>+		regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbtmstatelow),</div><div class='add'>+					   NULL);</div><div class='add'>+		brcmf_sdio_regwl(sdiodev, CORE_SB(base, sbtmstatelow),</div><div class='add'>+				 regdata | SSB_TMSLOW_REJECT, NULL);</div><div class='add'>+</div><div class='add'>+		regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbtmstatelow),</div><div class='add'>+					   NULL);</div><div class='ctx'> 		udelay(1);</div><div class='del'>-		SPINWAIT((brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatehigh), 4) &amp;</div><div class='add'>+		SPINWAIT((brcmf_sdio_regrl(sdiodev,</div><div class='add'>+					   CORE_SB(base, sbtmstatehigh),</div><div class='add'>+					   NULL) &amp;</div><div class='ctx'> 			SSB_TMSHIGH_BUSY), 100000);</div><div class='ctx'> </div><div class='del'>-		regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatehigh), 4);</div><div class='add'>+		regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+					   CORE_SB(base, sbtmstatehigh),</div><div class='add'>+					   NULL);</div><div class='ctx'> 		if (regdata &amp; SSB_TMSHIGH_BUSY)</div><div class='ctx'> 			brcmf_dbg(ERROR, "core state still busy\n");</div><div class='ctx'> </div><div class='del'>-		regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbidlow), 4);</div><div class='add'>+		regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbidlow),</div><div class='add'>+					   NULL);</div><div class='ctx'> 		if (regdata &amp; SSB_IDLOW_INITIATOR) {</div><div class='del'>-			regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-				CORE_SB(ci-&gt;c_inf[idx].base, sbimstate), 4) |</div><div class='del'>-				SSB_IMSTATE_REJECT;</div><div class='del'>-			brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-				CORE_SB(ci-&gt;c_inf[idx].base, sbimstate), 4,</div><div class='del'>-				regdata);</div><div class='del'>-			regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-				CORE_SB(ci-&gt;c_inf[idx].base, sbimstate), 4);</div><div class='add'>+			regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+						   CORE_SB(base, sbimstate),</div><div class='add'>+						   NULL);</div><div class='add'>+			regdata |= SSB_IMSTATE_REJECT;</div><div class='add'>+			brcmf_sdio_regwl(sdiodev, CORE_SB(base, sbimstate),</div><div class='add'>+					 regdata, NULL);</div><div class='add'>+			regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+						   CORE_SB(base, sbimstate),</div><div class='add'>+						   NULL);</div><div class='ctx'> 			udelay(1);</div><div class='del'>-			SPINWAIT((brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-				CORE_SB(ci-&gt;c_inf[idx].base, sbimstate), 4) &amp;</div><div class='add'>+			SPINWAIT((brcmf_sdio_regrl(sdiodev,</div><div class='add'>+						   CORE_SB(base, sbimstate),</div><div class='add'>+						   NULL) &amp;</div><div class='ctx'> 				SSB_IMSTATE_BUSY), 100000);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* set reset and reject while enabling the clocks */</div><div class='del'>-		brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4,</div><div class='del'>-			(SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |</div><div class='del'>-			SSB_TMSLOW_REJECT | SSB_TMSLOW_RESET));</div><div class='del'>-		regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4);</div><div class='add'>+		regdata = SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |</div><div class='add'>+			  SSB_TMSLOW_REJECT | SSB_TMSLOW_RESET;</div><div class='add'>+		brcmf_sdio_regwl(sdiodev, CORE_SB(base, sbtmstatelow),</div><div class='add'>+				 regdata, NULL);</div><div class='add'>+		regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbtmstatelow),</div><div class='add'>+					   NULL);</div><div class='ctx'> 		udelay(10);</div><div class='ctx'> </div><div class='ctx'> 		/* clear the initiator reject bit */</div><div class='del'>-		regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbidlow), 4);</div><div class='add'>+		regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbidlow),</div><div class='add'>+					   NULL);</div><div class='ctx'> 		if (regdata &amp; SSB_IDLOW_INITIATOR) {</div><div class='del'>-			regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-				CORE_SB(ci-&gt;c_inf[idx].base, sbimstate), 4) &amp;</div><div class='del'>-				~SSB_IMSTATE_REJECT;</div><div class='del'>-			brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-				CORE_SB(ci-&gt;c_inf[idx].base, sbimstate), 4,</div><div class='del'>-				regdata);</div><div class='add'>+			regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+						   CORE_SB(base, sbimstate),</div><div class='add'>+						   NULL);</div><div class='add'>+			regdata &amp;= ~SSB_IMSTATE_REJECT;</div><div class='add'>+			brcmf_sdio_regwl(sdiodev, CORE_SB(base, sbimstate),</div><div class='add'>+					 regdata, NULL);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* leave reset and reject asserted */</div><div class='del'>-	brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-		CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4,</div><div class='del'>-		(SSB_TMSLOW_REJECT | SSB_TMSLOW_RESET));</div><div class='add'>+	brcmf_sdio_regwl(sdiodev, CORE_SB(base, sbtmstatelow),</div><div class='add'>+			 (SSB_TMSLOW_REJECT | SSB_TMSLOW_RESET), NULL);</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -242,20 +245,19 @@ brcmf_sdio_ai_coredisable(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> 	idx = brcmf_sdio_chip_getinfidx(ci, coreid);</div><div class='ctx'> </div><div class='ctx'> 	/* if core is already in reset, just return */</div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-					ci-&gt;c_inf[idx].wrapbase+BCMA_RESET_CTL,</div><div class='del'>-					4);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+				   ci-&gt;c_inf[idx].wrapbase+BCMA_RESET_CTL,</div><div class='add'>+				   NULL);</div><div class='ctx'> 	if ((regdata &amp; BCMA_RESET_CTL_RESET) != 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	brcmf_sdcard_reg_write(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL,</div><div class='del'>-			       4, 0);</div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-					ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL, 4);</div><div class='add'>+	brcmf_sdio_regwl(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL, 0, NULL);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL,</div><div class='add'>+				   NULL);</div><div class='ctx'> 	udelay(10);</div><div class='ctx'> </div><div class='del'>-	brcmf_sdcard_reg_write(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_RESET_CTL,</div><div class='del'>-			       4, BCMA_RESET_CTL_RESET);</div><div class='add'>+	brcmf_sdio_regwl(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_RESET_CTL,</div><div class='add'>+			 BCMA_RESET_CTL_RESET, NULL);</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -279,41 +281,47 @@ brcmf_sdio_sb_resetcore(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> 	 * set reset while enabling the clock and</div><div class='ctx'> 	 * forcing them on throughout the core</div><div class='ctx'> 	 */</div><div class='del'>-	brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4,</div><div class='del'>-			SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET);</div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-				CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4);</div><div class='add'>+	brcmf_sdio_regwl(sdiodev,</div><div class='add'>+			 CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow),</div><div class='add'>+			 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET,</div><div class='add'>+			 NULL);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+				   CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow),</div><div class='add'>+				   NULL);</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> </div><div class='ctx'> 	/* clear any serror */</div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-				CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatehigh), 4);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+				   CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatehigh),</div><div class='add'>+				   NULL);</div><div class='ctx'> 	if (regdata &amp; SSB_TMSHIGH_SERR)</div><div class='del'>-		brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatehigh), 4, 0);</div><div class='add'>+		brcmf_sdio_regwl(sdiodev,</div><div class='add'>+				 CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatehigh),</div><div class='add'>+				 0, NULL);</div><div class='ctx'> </div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-				CORE_SB(ci-&gt;c_inf[idx].base, sbimstate), 4);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+				   CORE_SB(ci-&gt;c_inf[idx].base, sbimstate),</div><div class='add'>+				   NULL);</div><div class='ctx'> 	if (regdata &amp; (SSB_IMSTATE_IBE | SSB_IMSTATE_TO))</div><div class='del'>-		brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-			CORE_SB(ci-&gt;c_inf[idx].base, sbimstate), 4,</div><div class='del'>-			regdata &amp; ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO));</div><div class='add'>+		brcmf_sdio_regwl(sdiodev,</div><div class='add'>+				 CORE_SB(ci-&gt;c_inf[idx].base, sbimstate),</div><div class='add'>+				 regdata &amp; ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO),</div><div class='add'>+				 NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* clear reset and allow it to propagate throughout the core */</div><div class='del'>-	brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-		CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4,</div><div class='del'>-		SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK);</div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-				CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4);</div><div class='add'>+	brcmf_sdio_regwl(sdiodev, CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow),</div><div class='add'>+			 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK, NULL);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+				   CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow),</div><div class='add'>+				   NULL);</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> </div><div class='ctx'> 	/* leave clock enabled */</div><div class='del'>-	brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-			       CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow),</div><div class='del'>-			       4, SSB_TMSLOW_CLOCK);</div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-				CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow), 4);</div><div class='add'>+	brcmf_sdio_regwl(sdiodev, CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow),</div><div class='add'>+			 SSB_TMSLOW_CLOCK, NULL);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+				   CORE_SB(ci-&gt;c_inf[idx].base, sbtmstatelow),</div><div class='add'>+				   NULL);</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -330,18 +338,18 @@ brcmf_sdio_ai_resetcore(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> 	brcmf_sdio_ai_coredisable(sdiodev, ci, coreid);</div><div class='ctx'> </div><div class='ctx'> 	/* now do initialization sequence */</div><div class='del'>-	brcmf_sdcard_reg_write(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL,</div><div class='del'>-			       4, BCMA_IOCTL_FGC | BCMA_IOCTL_CLK);</div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-					ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL, 4);</div><div class='del'>-	brcmf_sdcard_reg_write(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_RESET_CTL,</div><div class='del'>-			       4, 0);</div><div class='add'>+	brcmf_sdio_regwl(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL,</div><div class='add'>+			 BCMA_IOCTL_FGC | BCMA_IOCTL_CLK, NULL);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL,</div><div class='add'>+				   NULL);</div><div class='add'>+	brcmf_sdio_regwl(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_RESET_CTL,</div><div class='add'>+			 0, NULL);</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> </div><div class='del'>-	brcmf_sdcard_reg_write(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL,</div><div class='del'>-			       4, BCMA_IOCTL_CLK);</div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-					ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL, 4);</div><div class='add'>+	brcmf_sdio_regwl(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL,</div><div class='add'>+			 BCMA_IOCTL_CLK, NULL);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev, ci-&gt;c_inf[idx].wrapbase+BCMA_IOCTL,</div><div class='add'>+				   NULL);</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -358,8 +366,9 @@ static int brcmf_sdio_chip_recognition(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> 	 */</div><div class='ctx'> 	ci-&gt;c_inf[0].id = BCMA_CORE_CHIPCOMMON;</div><div class='ctx'> 	ci-&gt;c_inf[0].base = regs;</div><div class='del'>-	regdata = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-			CORE_CC_REG(ci-&gt;c_inf[0].base, chipid), 4);</div><div class='add'>+	regdata = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+				   CORE_CC_REG(ci-&gt;c_inf[0].base, chipid),</div><div class='add'>+				   NULL);</div><div class='ctx'> 	ci-&gt;chip = regdata &amp; CID_ID_MASK;</div><div class='ctx'> 	ci-&gt;chiprev = (regdata &amp; CID_REV_MASK) &gt;&gt; CID_REV_SHIFT;</div><div class='ctx'> 	ci-&gt;socitype = (regdata &amp; CID_TYPE_MASK) &gt;&gt; CID_TYPE_SHIFT;</div><div class='hunk'>@@ -428,8 +437,7 @@ brcmf_sdio_chip_buscoreprep(struct brcmf_sdio_dev *sdiodev)</div><div class='ctx'> </div><div class='ctx'> 	/* Try forcing SDIO core to do ALPAvail request only */</div><div class='ctx'> 	clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;</div><div class='del'>-	brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1,</div><div class='del'>-			       SBSDIO_FUNC1_CHIPCLKCSR,	clkset, &amp;err);</div><div class='add'>+	brcmf_sdio_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &amp;err);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		brcmf_dbg(ERROR, "error writing for HT off\n");</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -437,8 +445,8 @@ brcmf_sdio_chip_buscoreprep(struct brcmf_sdio_dev *sdiodev)</div><div class='ctx'> </div><div class='ctx'> 	/* If register supported, wait for ALPAvail and then force ALP */</div><div class='ctx'> 	/* This may take up to 15 milliseconds */</div><div class='del'>-	clkval = brcmf_sdcard_cfg_read(sdiodev, SDIO_FUNC_1,</div><div class='del'>-				       SBSDIO_FUNC1_CHIPCLKCSR, NULL);</div><div class='add'>+	clkval = brcmf_sdio_regrb(sdiodev,</div><div class='add'>+				  SBSDIO_FUNC1_CHIPCLKCSR, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if ((clkval &amp; ~SBSDIO_AVBITS) != clkset) {</div><div class='ctx'> 		brcmf_dbg(ERROR, "ChipClkCSR access: wrote 0x%02x read 0x%02x\n",</div><div class='hunk'>@@ -446,8 +454,8 @@ brcmf_sdio_chip_buscoreprep(struct brcmf_sdio_dev *sdiodev)</div><div class='ctx'> 		return -EACCES;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	SPINWAIT(((clkval = brcmf_sdcard_cfg_read(sdiodev, SDIO_FUNC_1,</div><div class='del'>-				SBSDIO_FUNC1_CHIPCLKCSR, NULL)),</div><div class='add'>+	SPINWAIT(((clkval = brcmf_sdio_regrb(sdiodev,</div><div class='add'>+					     SBSDIO_FUNC1_CHIPCLKCSR, NULL)),</div><div class='ctx'> 			!SBSDIO_ALPAV(clkval)),</div><div class='ctx'> 			PMU_MAX_TRANSITION_DLY);</div><div class='ctx'> 	if (!SBSDIO_ALPAV(clkval)) {</div><div class='hunk'>@@ -457,13 +465,11 @@ brcmf_sdio_chip_buscoreprep(struct brcmf_sdio_dev *sdiodev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;</div><div class='del'>-	brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1,</div><div class='del'>-			       SBSDIO_FUNC1_CHIPCLKCSR, clkset, &amp;err);</div><div class='add'>+	brcmf_sdio_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &amp;err);</div><div class='ctx'> 	udelay(65);</div><div class='ctx'> </div><div class='ctx'> 	/* Also, disable the extra SDIO pull-ups */</div><div class='del'>-	brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1,</div><div class='del'>-			       SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);</div><div class='add'>+	brcmf_sdio_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -472,18 +478,22 @@ static void</div><div class='ctx'> brcmf_sdio_chip_buscoresetup(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> 			     struct chip_info *ci)</div><div class='ctx'> {</div><div class='add'>+	u32 base = ci-&gt;c_inf[0].base;</div><div class='add'>+</div><div class='ctx'> 	/* get chipcommon rev */</div><div class='ctx'> 	ci-&gt;c_inf[0].rev = ci-&gt;corerev(sdiodev, ci, ci-&gt;c_inf[0].id);</div><div class='ctx'> </div><div class='ctx'> 	/* get chipcommon capabilites */</div><div class='del'>-	ci-&gt;c_inf[0].caps =</div><div class='del'>-		brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-		CORE_CC_REG(ci-&gt;c_inf[0].base, capabilities), 4);</div><div class='add'>+	ci-&gt;c_inf[0].caps = brcmf_sdio_regrl(sdiodev,</div><div class='add'>+					     CORE_CC_REG(base, capabilities),</div><div class='add'>+					     NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* get pmu caps &amp; rev */</div><div class='ctx'> 	if (ci-&gt;c_inf[0].caps &amp; CC_CAP_PMU) {</div><div class='del'>-		ci-&gt;pmucaps = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-			CORE_CC_REG(ci-&gt;c_inf[0].base, pmucapabilities), 4);</div><div class='add'>+		ci-&gt;pmucaps =</div><div class='add'>+			brcmf_sdio_regrl(sdiodev,</div><div class='add'>+					 CORE_CC_REG(base, pmucapabilities),</div><div class='add'>+					 NULL);</div><div class='ctx'> 		ci-&gt;pmurev = ci-&gt;pmucaps &amp; PCAP_REV_MASK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -523,10 +533,10 @@ int brcmf_sdio_chip_attach(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> </div><div class='ctx'> 	brcmf_sdio_chip_buscoresetup(sdiodev, ci);</div><div class='ctx'> </div><div class='del'>-	brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-		CORE_CC_REG(ci-&gt;c_inf[0].base, gpiopullup), 4, 0);</div><div class='del'>-	brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-		CORE_CC_REG(ci-&gt;c_inf[0].base, gpiopulldown), 4, 0);</div><div class='add'>+	brcmf_sdio_regwl(sdiodev, CORE_CC_REG(ci-&gt;c_inf[0].base, gpiopullup),</div><div class='add'>+			 0, NULL);</div><div class='add'>+	brcmf_sdio_regwl(sdiodev, CORE_CC_REG(ci-&gt;c_inf[0].base, gpiopulldown),</div><div class='add'>+			 0, NULL);</div><div class='ctx'> </div><div class='ctx'> 	*ci_ptr = ci;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -562,6 +572,7 @@ brcmf_sdio_chip_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> 	u32 str_mask = 0;</div><div class='ctx'> 	u32 str_shift = 0;</div><div class='ctx'> 	char chn[8];</div><div class='add'>+	u32 base = ci-&gt;c_inf[0].base;</div><div class='ctx'> </div><div class='ctx'> 	if (!(ci-&gt;c_inf[0].caps &amp; CC_CAP_PMU))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -591,17 +602,17 @@ brcmf_sdio_chip_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-			CORE_CC_REG(ci-&gt;c_inf[0].base, chipcontrol_addr),</div><div class='del'>-			4, 1);</div><div class='del'>-		cc_data_temp = brcmf_sdcard_reg_read(sdiodev,</div><div class='del'>-			CORE_CC_REG(ci-&gt;c_inf[0].base, chipcontrol_addr), 4);</div><div class='add'>+		brcmf_sdio_regwl(sdiodev, CORE_CC_REG(base, chipcontrol_addr),</div><div class='add'>+				 1, NULL);</div><div class='add'>+		cc_data_temp =</div><div class='add'>+			brcmf_sdio_regrl(sdiodev,</div><div class='add'>+					 CORE_CC_REG(base, chipcontrol_addr),</div><div class='add'>+					 NULL);</div><div class='ctx'> 		cc_data_temp &amp;= ~str_mask;</div><div class='ctx'> 		drivestrength_sel &lt;&lt;= str_shift;</div><div class='ctx'> 		cc_data_temp |= drivestrength_sel;</div><div class='del'>-		brcmf_sdcard_reg_write(sdiodev,</div><div class='del'>-			CORE_CC_REG(ci-&gt;c_inf[0].base, chipcontrol_addr),</div><div class='del'>-			4, cc_data_temp);</div><div class='add'>+		brcmf_sdio_regwl(sdiodev, CORE_CC_REG(base, chipcontrol_addr),</div><div class='add'>+				 cc_data_temp, NULL);</div><div class='ctx'> </div><div class='ctx'> 		brcmf_dbg(INFO, "SDIO: %dmA drive strength selected, set to 0x%08x\n",</div><div class='ctx'> 			  drivestrength, cc_data_temp);</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h b/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h<br/>index 0281d207d998..29bf78d264e0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h</a></div><div class='hunk'>@@ -40,9 +40,20 @@</div><div class='ctx'> /* Maximum number of I/O funcs */</div><div class='ctx'> #define SDIOD_MAX_IOFUNCS	7</div><div class='ctx'> </div><div class='add'>+/* mask of register map */</div><div class='add'>+#define REG_F0_REG_MASK		0x7FF</div><div class='add'>+#define REG_F1_MISC_MASK	0x1FFFF</div><div class='add'>+</div><div class='ctx'> /* as of sdiod rev 0, supports 3 functions */</div><div class='ctx'> #define SBSDIO_NUM_FUNCTION		3</div><div class='ctx'> </div><div class='add'>+/* function 0 vendor specific CCCR registers */</div><div class='add'>+#define SDIO_CCCR_BRCM_SEPINT		0xf2</div><div class='add'>+</div><div class='add'>+#define  SDIO_SEPINT_MASK		0x01</div><div class='add'>+#define  SDIO_SEPINT_OE			0x02</div><div class='add'>+#define  SDIO_SEPINT_ACT_HI		0x04</div><div class='add'>+</div><div class='ctx'> /* function 1 miscellaneous registers */</div><div class='ctx'> </div><div class='ctx'> /* sprom command and status */</div><div class='hunk'>@@ -135,7 +146,6 @@ struct brcmf_sdio_dev {</div><div class='ctx'> 	u8 num_funcs;			/* Supported funcs on client */</div><div class='ctx'> 	u32 func_cis_ptr[SDIOD_MAX_IOFUNCS];</div><div class='ctx'> 	u32 sbwad;			/* Save backplane window address */</div><div class='del'>-	bool regfail;			/* status of last reg_r/w call */</div><div class='ctx'> 	void *bus;</div><div class='ctx'> 	atomic_t suspend;		/* suspend flag */</div><div class='ctx'> 	wait_queue_head_t request_byte_wait;</div><div class='hunk'>@@ -144,39 +154,26 @@ struct brcmf_sdio_dev {</div><div class='ctx'> 	wait_queue_head_t request_buffer_wait;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct brcmf_bus *bus_if;</div><div class='add'>+#ifdef CONFIG_BRCMFMAC_SDIO_OOB</div><div class='add'>+	unsigned int irq;		/* oob interrupt number */</div><div class='add'>+	unsigned long irq_flags;	/* board specific oob flags */</div><div class='add'>+	bool irq_en;			/* irq enable flags */</div><div class='add'>+	spinlock_t irq_en_lock;</div><div class='add'>+	bool irq_wake;			/* irq wake enable flags */</div><div class='add'>+#endif		/* CONFIG_BRCMFMAC_SDIO_OOB */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Register/deregister device interrupt handler. */</div><div class='del'>-extern int</div><div class='del'>-brcmf_sdcard_intr_reg(struct brcmf_sdio_dev *sdiodev);</div><div class='del'>-</div><div class='del'>-extern int brcmf_sdcard_intr_dereg(struct brcmf_sdio_dev *sdiodev);</div><div class='del'>-</div><div class='del'>-/* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface).</div><div class='del'>- *   fn:   function number</div><div class='del'>- *   addr: unmodified SDIO-space address</div><div class='del'>- *   data: data byte to write</div><div class='del'>- *   err:  pointer to error code (or NULL)</div><div class='del'>- */</div><div class='del'>-extern u8 brcmf_sdcard_cfg_read(struct brcmf_sdio_dev *sdiodev, uint func,</div><div class='del'>-				u32 addr, int *err);</div><div class='del'>-extern void brcmf_sdcard_cfg_write(struct brcmf_sdio_dev *sdiodev, uint func,</div><div class='del'>-				   u32 addr, u8 data, int *err);</div><div class='del'>-</div><div class='del'>-/* Synchronous access to device (client) core registers via CMD53 to F1.</div><div class='del'>- *   addr: backplane address (i.e. &gt;= regsva from attach)</div><div class='del'>- *   size: register width in bytes (2 or 4)</div><div class='del'>- *   data: data for register write</div><div class='del'>- */</div><div class='del'>-extern u32</div><div class='del'>-brcmf_sdcard_reg_read(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size);</div><div class='del'>-</div><div class='del'>-extern u32</div><div class='del'>-brcmf_sdcard_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size,</div><div class='del'>-		       u32 data);</div><div class='del'>-</div><div class='del'>-/* Indicate if last reg read/write failed */</div><div class='del'>-extern bool brcmf_sdcard_regfail(struct brcmf_sdio_dev *sdiodev);</div><div class='add'>+/* Register/deregister interrupt handler. */</div><div class='add'>+extern int brcmf_sdio_intr_register(struct brcmf_sdio_dev *sdiodev);</div><div class='add'>+extern int brcmf_sdio_intr_unregister(struct brcmf_sdio_dev *sdiodev);</div><div class='add'>+</div><div class='add'>+/* sdio device register access interface */</div><div class='add'>+extern u8 brcmf_sdio_regrb(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);</div><div class='add'>+extern u32 brcmf_sdio_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);</div><div class='add'>+extern void brcmf_sdio_regwb(struct brcmf_sdio_dev *sdiodev, u32 addr,</div><div class='add'>+			     u8 data, int *ret);</div><div class='add'>+extern void brcmf_sdio_regwl(struct brcmf_sdio_dev *sdiodev, u32 addr,</div><div class='add'>+			     u32 data, int *ret);</div><div class='ctx'> </div><div class='ctx'> /* Buffer transfer to/from device (client) core via cmd53.</div><div class='ctx'>  *   fn:       function number</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmfmac/usb.c b/drivers/net/wireless/brcm80211/brcmfmac/usb.c<br/>index 82364223e817..a299d42da8e7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmfmac/usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmfmac/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmfmac/usb.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;net/cfg80211.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;defs.h&gt;</div><div class='hunk'>@@ -1239,7 +1240,7 @@ static int brcmf_usb_get_fw(struct brcmf_usbdev_info *devinfo)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	devinfo-&gt;image = kmalloc(fw-&gt;size, GFP_ATOMIC); /* plus nvram */</div><div class='add'>+	devinfo-&gt;image = vmalloc(fw-&gt;size); /* plus nvram */</div><div class='ctx'> 	if (!devinfo-&gt;image)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -1383,14 +1384,6 @@ static int brcmf_usb_probe_cb(struct device *dev, const char *desc,</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* add interface and open for business */</div><div class='del'>-	ret = brcmf_add_if(dev, 0, "wlan%d", NULL);</div><div class='del'>-	if (ret) {</div><div class='del'>-		brcmf_dbg(ERROR, "Add primary net device interface failed!!\n");</div><div class='del'>-		brcmf_detach(dev);</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> fail:</div><div class='ctx'> 	/* Release resources in reverse order */</div><div class='hunk'>@@ -1604,13 +1597,14 @@ static struct usb_driver brcmf_usbdrvr = {</div><div class='ctx'> 	.id_table = brcmf_usb_devid_table,</div><div class='ctx'> 	.suspend = brcmf_usb_suspend,</div><div class='ctx'> 	.resume = brcmf_usb_resume,</div><div class='del'>-	.supports_autosuspend = 1</div><div class='add'>+	.supports_autosuspend = 1,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void brcmf_usb_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	usb_deregister(&amp;brcmf_usbdrvr);</div><div class='del'>-	kfree(g_image.data);</div><div class='add'>+	vfree(g_image.data);</div><div class='ctx'> 	g_image.data = NULL;</div><div class='ctx'> 	g_image.len = 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/Makefile b/drivers/net/wireless/brcm80211/brcmsmac/Makefile<br/>index c2eb2d0af386..e227c4c68ef9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/Makefile</a></div><div class='hunk'>@@ -39,10 +39,7 @@ BRCMSMAC_OFILES := \</div><div class='ctx'> 	phy/phytbl_lcn.o \</div><div class='ctx'> 	phy/phytbl_n.o \</div><div class='ctx'> 	phy/phy_qmath.o \</div><div class='del'>-	otp.o \</div><div class='del'>-	srom.o \</div><div class='ctx'> 	dma.o \</div><div class='del'>-	nicpci.o \</div><div class='ctx'> 	brcms_trace_events.o</div><div class='ctx'> </div><div class='ctx'> MODULEPFX := brcmsmac</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c<br/>index c93ea35bceec..6d8b7213643a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/aiutils.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/aiutils.c</a></div><div class='hunk'>@@ -19,7 +19,6 @@</div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;defs.h&gt;</div><div class='ctx'> #include &lt;chipcommon.h&gt;</div><div class='hunk'>@@ -29,8 +28,6 @@</div><div class='ctx'> #include "types.h"</div><div class='ctx'> #include "pub.h"</div><div class='ctx'> #include "pmu.h"</div><div class='del'>-#include "srom.h"</div><div class='del'>-#include "nicpci.h"</div><div class='ctx'> #include "aiutils.h"</div><div class='ctx'> </div><div class='ctx'> /* slow_clk_ctl */</div><div class='hunk'>@@ -321,7 +318,6 @@</div><div class='ctx'> #define	IS_SIM(chippkg)	\</div><div class='ctx'> 	((chippkg == HDLSIM_PKG_ID) || (chippkg == HWSIM_PKG_ID))</div><div class='ctx'> </div><div class='del'>-#define PCI(sih)	(ai_get_buscoretype(sih) == PCI_CORE_ID)</div><div class='ctx'> #define PCIE(sih)	(ai_get_buscoretype(sih) == PCIE_CORE_ID)</div><div class='ctx'> </div><div class='ctx'> #define PCI_FORCEHT(sih) (PCIE(sih) &amp;&amp; (ai_get_chip_id(sih) == BCM4716_CHIP_ID))</div><div class='hunk'>@@ -454,36 +450,9 @@ struct aidmp {</div><div class='ctx'> 	u32 componentid3;	/* 0xffc */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* return true if PCIE capability exists in the pci config space */</div><div class='del'>-static bool ai_ispcie(struct si_info *sii)</div><div class='del'>-{</div><div class='del'>-	u8 cap_ptr;</div><div class='del'>-</div><div class='del'>-	cap_ptr =</div><div class='del'>-	    pcicore_find_pci_capability(sii-&gt;pcibus, PCI_CAP_ID_EXP, NULL,</div><div class='del'>-					NULL);</div><div class='del'>-	if (!cap_ptr)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool ai_buscore_prep(struct si_info *sii)</div><div class='del'>-{</div><div class='del'>-	/* kludge to enable the clock on the 4306 which lacks a slowclock */</div><div class='del'>-	if (!ai_ispcie(sii))</div><div class='del'>-		ai_clkctl_xtal(&amp;sii-&gt;pub, XTAL | PLL, ON);</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static bool</div><div class='ctx'> ai_buscore_setup(struct si_info *sii, struct bcma_device *cc)</div><div class='ctx'> {</div><div class='del'>-	struct bcma_device *pci = NULL;</div><div class='del'>-	struct bcma_device *pcie = NULL;</div><div class='del'>-	struct bcma_device *core;</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> 	/* no cores found, bail out */</div><div class='ctx'> 	if (cc-&gt;bus-&gt;nr_cores == 0)</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -492,8 +461,7 @@ ai_buscore_setup(struct si_info *sii, struct bcma_device *cc)</div><div class='ctx'> 	sii-&gt;pub.ccrev = cc-&gt;id.rev;</div><div class='ctx'> </div><div class='ctx'> 	/* get chipcommon chipstatus */</div><div class='del'>-	if (ai_get_ccrev(&amp;sii-&gt;pub) &gt;= 11)</div><div class='del'>-		sii-&gt;chipst = bcma_read32(cc, CHIPCREGOFFS(chipstatus));</div><div class='add'>+	sii-&gt;chipst = bcma_read32(cc, CHIPCREGOFFS(chipstatus));</div><div class='ctx'> </div><div class='ctx'> 	/* get chipcommon capabilites */</div><div class='ctx'> 	sii-&gt;pub.cccaps = bcma_read32(cc, CHIPCREGOFFS(capabilities));</div><div class='hunk'>@@ -506,64 +474,18 @@ ai_buscore_setup(struct si_info *sii, struct bcma_device *cc)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* figure out buscore */</div><div class='del'>-	list_for_each_entry(core, &amp;cc-&gt;bus-&gt;cores, list) {</div><div class='del'>-		uint cid, crev;</div><div class='del'>-</div><div class='del'>-		cid = core-&gt;id.id;</div><div class='del'>-		crev = core-&gt;id.rev;</div><div class='del'>-</div><div class='del'>-		if (cid == PCI_CORE_ID) {</div><div class='del'>-			pci = core;</div><div class='del'>-		} else if (cid == PCIE_CORE_ID) {</div><div class='del'>-			pcie = core;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (pci &amp;&amp; pcie) {</div><div class='del'>-		if (ai_ispcie(sii))</div><div class='del'>-			pci = NULL;</div><div class='del'>-		else</div><div class='del'>-			pcie = NULL;</div><div class='del'>-	}</div><div class='del'>-	if (pci) {</div><div class='del'>-		sii-&gt;buscore = pci;</div><div class='del'>-	} else if (pcie) {</div><div class='del'>-		sii-&gt;buscore = pcie;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* fixup necessary chip/core configurations */</div><div class='del'>-	if (!sii-&gt;pch) {</div><div class='del'>-		sii-&gt;pch = pcicore_init(&amp;sii-&gt;pub, sii-&gt;icbus-&gt;drv_pci.core);</div><div class='del'>-		if (sii-&gt;pch == NULL)</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-	if (ai_pci_fixcfg(&amp;sii-&gt;pub))</div><div class='del'>-		return false;</div><div class='add'>+	sii-&gt;buscore = ai_findcore(&amp;sii-&gt;pub, PCIE_CORE_ID, 0);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * get boardtype and boardrev</div><div class='del'>- */</div><div class='del'>-static __used void ai_nvram_process(struct si_info *sii)</div><div class='del'>-{</div><div class='del'>-	uint w = 0;</div><div class='del'>-</div><div class='del'>-	/* do a pci config read to get subsystem id and subvendor id */</div><div class='del'>-	pci_read_config_dword(sii-&gt;pcibus, PCI_SUBSYSTEM_VENDOR_ID, &amp;w);</div><div class='del'>-</div><div class='del'>-	sii-&gt;pub.boardvendor = w &amp; 0xffff;</div><div class='del'>-	sii-&gt;pub.boardtype = (w &gt;&gt; 16) &amp; 0xffff;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct si_info *ai_doattach(struct si_info *sii,</div><div class='ctx'> 				   struct bcma_bus *pbus)</div><div class='ctx'> {</div><div class='ctx'> 	struct si_pub *sih = &amp;sii-&gt;pub;</div><div class='ctx'> 	u32 w, savewin;</div><div class='ctx'> 	struct bcma_device *cc;</div><div class='del'>-	uint socitype;</div><div class='add'>+	struct ssb_sprom *sprom = &amp;pbus-&gt;sprom;</div><div class='ctx'> </div><div class='ctx'> 	savewin = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -573,38 +495,15 @@ static struct si_info *ai_doattach(struct si_info *sii,</div><div class='ctx'> 	/* switch to Chipcommon core */</div><div class='ctx'> 	cc = pbus-&gt;drv_cc.core;</div><div class='ctx'> </div><div class='del'>-	/* bus/core/clk setup for register access */</div><div class='del'>-	if (!ai_buscore_prep(sii))</div><div class='del'>-		return NULL;</div><div class='add'>+	sih-&gt;chip = pbus-&gt;chipinfo.id;</div><div class='add'>+	sih-&gt;chiprev = pbus-&gt;chipinfo.rev;</div><div class='add'>+	sih-&gt;chippkg = pbus-&gt;chipinfo.pkg;</div><div class='add'>+	sih-&gt;boardvendor = pbus-&gt;boardinfo.vendor;</div><div class='add'>+	sih-&gt;boardtype = pbus-&gt;boardinfo.type;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * ChipID recognition.</div><div class='del'>-	 *   We assume we can read chipid at offset 0 from the regs arg.</div><div class='del'>-	 *   If we add other chiptypes (or if we need to support old sdio</div><div class='del'>-	 *   hosts w/o chipcommon), some way of recognizing them needs to</div><div class='del'>-	 *   be added here.</div><div class='del'>-	 */</div><div class='del'>-	w = bcma_read32(cc, CHIPCREGOFFS(chipid));</div><div class='del'>-	socitype = (w &amp; CID_TYPE_MASK) &gt;&gt; CID_TYPE_SHIFT;</div><div class='del'>-	/* Might as wll fill in chip id rev &amp; pkg */</div><div class='del'>-	sih-&gt;chip = w &amp; CID_ID_MASK;</div><div class='del'>-	sih-&gt;chiprev = (w &amp; CID_REV_MASK) &gt;&gt; CID_REV_SHIFT;</div><div class='del'>-	sih-&gt;chippkg = (w &amp; CID_PKG_MASK) &gt;&gt; CID_PKG_SHIFT;</div><div class='del'>-</div><div class='del'>-	/* scan for cores */</div><div class='del'>-	if (socitype != SOCI_AI)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	SI_MSG("Found chip type AI (0x%08x)\n", w);</div><div class='ctx'> 	if (!ai_buscore_setup(sii, cc))</div><div class='ctx'> 		goto exit;</div><div class='ctx'> </div><div class='del'>-	/* Init nvram from sprom/otp if they exist */</div><div class='del'>-	if (srom_var_init(&amp;sii-&gt;pub))</div><div class='del'>-		goto exit;</div><div class='del'>-</div><div class='del'>-	ai_nvram_process(sii);</div><div class='del'>-</div><div class='ctx'> 	/* === NVRAM, clock is ready === */</div><div class='ctx'> 	bcma_write32(cc, CHIPCREGOFFS(gpiopullup), 0);</div><div class='ctx'> 	bcma_write32(cc, CHIPCREGOFFS(gpiopulldown), 0);</div><div class='hunk'>@@ -617,15 +516,13 @@ static struct si_info *ai_doattach(struct si_info *sii,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* setup the GPIO based LED powersave register */</div><div class='del'>-	w = getintvar(sih, BRCMS_SROM_LEDDC);</div><div class='add'>+	w = (sprom-&gt;leddc_on_time &lt;&lt; BCMA_CC_GPIOTIMER_ONTIME_SHIFT) |</div><div class='add'>+		 (sprom-&gt;leddc_off_time &lt;&lt; BCMA_CC_GPIOTIMER_OFFTIME_SHIFT);</div><div class='ctx'> 	if (w == 0)</div><div class='ctx'> 		w = DEFAULT_GPIOTIMERVAL;</div><div class='ctx'> 	ai_cc_reg(sih, offsetof(struct chipcregs, gpiotimerval),</div><div class='ctx'> 		  ~0, w);</div><div class='ctx'> </div><div class='del'>-	if (PCIE(sih))</div><div class='del'>-		pcicore_attach(sii-&gt;pch, SI_DOATTACH);</div><div class='del'>-</div><div class='ctx'> 	if (ai_get_chip_id(sih) == BCM43224_CHIP_ID) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * enable 12 mA drive strenth for 43224 and</div><div class='hunk'>@@ -659,9 +556,6 @@ static struct si_info *ai_doattach(struct si_info *sii,</div><div class='ctx'> 	return sii;</div><div class='ctx'> </div><div class='ctx'>  exit:</div><div class='del'>-	if (sii-&gt;pch)</div><div class='del'>-		pcicore_deinit(sii-&gt;pch);</div><div class='del'>-	sii-&gt;pch = NULL;</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -700,11 +594,6 @@ void ai_detach(struct si_pub *sih)</div><div class='ctx'> 	if (sii == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (sii-&gt;pch)</div><div class='del'>-		pcicore_deinit(sii-&gt;pch);</div><div class='del'>-	sii-&gt;pch = NULL;</div><div class='del'>-</div><div class='del'>-	srom_free_vars(sih);</div><div class='ctx'> 	kfree(sii);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -755,21 +644,7 @@ uint ai_cc_reg(struct si_pub *sih, uint regoff, u32 mask, u32 val)</div><div class='ctx'> /* return the slow clock source - LPO, XTAL, or PCI */</div><div class='ctx'> static uint ai_slowclk_src(struct si_pub *sih, struct bcma_device *cc)</div><div class='ctx'> {</div><div class='del'>-	struct si_info *sii;</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	sii = (struct si_info *)sih;</div><div class='del'>-	if (ai_get_ccrev(&amp;sii-&gt;pub) &lt; 6) {</div><div class='del'>-		pci_read_config_dword(sii-&gt;pcibus, PCI_GPIO_OUT,</div><div class='del'>-				      &amp;val);</div><div class='del'>-		if (val &amp; PCI_CFG_GPIO_SCS)</div><div class='del'>-			return SCC_SS_PCI;</div><div class='del'>-		return SCC_SS_XTAL;</div><div class='del'>-	} else if (ai_get_ccrev(&amp;sii-&gt;pub) &lt; 10) {</div><div class='del'>-		return bcma_read32(cc, CHIPCREGOFFS(slow_clk_ctl)) &amp;</div><div class='del'>-		       SCC_SS_MASK;</div><div class='del'>-	} else			/* Insta-clock */</div><div class='del'>-		return SCC_SS_XTAL;</div><div class='add'>+	return SCC_SS_XTAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -779,36 +654,12 @@ static uint ai_slowclk_src(struct si_pub *sih, struct bcma_device *cc)</div><div class='ctx'> static uint ai_slowclk_freq(struct si_pub *sih, bool max_freq,</div><div class='ctx'> 			    struct bcma_device *cc)</div><div class='ctx'> {</div><div class='del'>-	u32 slowclk;</div><div class='ctx'> 	uint div;</div><div class='ctx'> </div><div class='del'>-	slowclk = ai_slowclk_src(sih, cc);</div><div class='del'>-	if (ai_get_ccrev(sih) &lt; 6) {</div><div class='del'>-		if (slowclk == SCC_SS_PCI)</div><div class='del'>-			return max_freq ? (PCIMAXFREQ / 64)</div><div class='del'>-				: (PCIMINFREQ / 64);</div><div class='del'>-		else</div><div class='del'>-			return max_freq ? (XTALMAXFREQ / 32)</div><div class='del'>-				: (XTALMINFREQ / 32);</div><div class='del'>-	} else if (ai_get_ccrev(sih) &lt; 10) {</div><div class='del'>-		div = 4 *</div><div class='del'>-		    (((bcma_read32(cc, CHIPCREGOFFS(slow_clk_ctl)) &amp;</div><div class='del'>-		      SCC_CD_MASK) &gt;&gt; SCC_CD_SHIFT) + 1);</div><div class='del'>-		if (slowclk == SCC_SS_LPO)</div><div class='del'>-			return max_freq ? LPOMAXFREQ : LPOMINFREQ;</div><div class='del'>-		else if (slowclk == SCC_SS_XTAL)</div><div class='del'>-			return max_freq ? (XTALMAXFREQ / div)</div><div class='del'>-				: (XTALMINFREQ / div);</div><div class='del'>-		else if (slowclk == SCC_SS_PCI)</div><div class='del'>-			return max_freq ? (PCIMAXFREQ / div)</div><div class='del'>-				: (PCIMINFREQ / div);</div><div class='del'>-	} else {</div><div class='del'>-		/* Chipc rev 10 is InstaClock */</div><div class='del'>-		div = bcma_read32(cc, CHIPCREGOFFS(system_clk_ctl));</div><div class='del'>-		div = 4 * ((div &gt;&gt; SYCC_CD_SHIFT) + 1);</div><div class='del'>-		return max_freq ? XTALMAXFREQ : (XTALMINFREQ / div);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+	/* Chipc rev 10 is InstaClock */</div><div class='add'>+	div = bcma_read32(cc, CHIPCREGOFFS(system_clk_ctl));</div><div class='add'>+	div = 4 * ((div &gt;&gt; SYCC_CD_SHIFT) + 1);</div><div class='add'>+	return max_freq ? XTALMAXFREQ : (XTALMINFREQ / div);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -831,8 +682,7 @@ ai_clkctl_setdelay(struct si_pub *sih, struct bcma_device *cc)</div><div class='ctx'> </div><div class='ctx'> 	/* Starting with 4318 it is ILP that is used for the delays */</div><div class='ctx'> 	slowmaxfreq =</div><div class='del'>-	    ai_slowclk_freq(sih,</div><div class='del'>-			    (ai_get_ccrev(sih) &gt;= 10) ? false : true, cc);</div><div class='add'>+	    ai_slowclk_freq(sih, false, cc);</div><div class='ctx'> </div><div class='ctx'> 	pll_on_delay = ((slowmaxfreq * pll_delay) + 999999) / 1000000;</div><div class='ctx'> 	fref_sel_delay = ((slowmaxfreq * FREF_DELAY) + 999999) / 1000000;</div><div class='hunk'>@@ -854,9 +704,8 @@ void ai_clkctl_init(struct si_pub *sih)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* set all Instaclk chip ILP to 1 MHz */</div><div class='del'>-	if (ai_get_ccrev(sih) &gt;= 10)</div><div class='del'>-		bcma_maskset32(cc, CHIPCREGOFFS(system_clk_ctl), SYCC_CD_MASK,</div><div class='del'>-			       (ILP_DIV_1MHZ &lt;&lt; SYCC_CD_SHIFT));</div><div class='add'>+	bcma_maskset32(cc, CHIPCREGOFFS(system_clk_ctl), SYCC_CD_MASK,</div><div class='add'>+		       (ILP_DIV_1MHZ &lt;&lt; SYCC_CD_SHIFT));</div><div class='ctx'> </div><div class='ctx'> 	ai_clkctl_setdelay(sih, cc);</div><div class='ctx'> }</div><div class='hunk'>@@ -891,140 +740,6 @@ u16 ai_clkctl_fast_pwrup_delay(struct si_pub *sih)</div><div class='ctx'> 	return fpdelay;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* turn primary xtal and/or pll off/on */</div><div class='del'>-int ai_clkctl_xtal(struct si_pub *sih, uint what, bool on)</div><div class='del'>-{</div><div class='del'>-	struct si_info *sii;</div><div class='del'>-	u32 in, out, outen;</div><div class='del'>-</div><div class='del'>-	sii = (struct si_info *)sih;</div><div class='del'>-</div><div class='del'>-	/* pcie core doesn't have any mapping to control the xtal pu */</div><div class='del'>-	if (PCIE(sih))</div><div class='del'>-		return -1;</div><div class='del'>-</div><div class='del'>-	pci_read_config_dword(sii-&gt;pcibus, PCI_GPIO_IN, &amp;in);</div><div class='del'>-	pci_read_config_dword(sii-&gt;pcibus, PCI_GPIO_OUT, &amp;out);</div><div class='del'>-	pci_read_config_dword(sii-&gt;pcibus, PCI_GPIO_OUTEN, &amp;outen);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Avoid glitching the clock if GPRS is already using it.</div><div class='del'>-	 * We can't actually read the state of the PLLPD so we infer it</div><div class='del'>-	 * by the value of XTAL_PU which *is* readable via gpioin.</div><div class='del'>-	 */</div><div class='del'>-	if (on &amp;&amp; (in &amp; PCI_CFG_GPIO_XTAL))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (what &amp; XTAL)</div><div class='del'>-		outen |= PCI_CFG_GPIO_XTAL;</div><div class='del'>-	if (what &amp; PLL)</div><div class='del'>-		outen |= PCI_CFG_GPIO_PLL;</div><div class='del'>-</div><div class='del'>-	if (on) {</div><div class='del'>-		/* turn primary xtal on */</div><div class='del'>-		if (what &amp; XTAL) {</div><div class='del'>-			out |= PCI_CFG_GPIO_XTAL;</div><div class='del'>-			if (what &amp; PLL)</div><div class='del'>-				out |= PCI_CFG_GPIO_PLL;</div><div class='del'>-			pci_write_config_dword(sii-&gt;pcibus,</div><div class='del'>-					       PCI_GPIO_OUT, out);</div><div class='del'>-			pci_write_config_dword(sii-&gt;pcibus,</div><div class='del'>-					       PCI_GPIO_OUTEN, outen);</div><div class='del'>-			udelay(XTAL_ON_DELAY);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* turn pll on */</div><div class='del'>-		if (what &amp; PLL) {</div><div class='del'>-			out &amp;= ~PCI_CFG_GPIO_PLL;</div><div class='del'>-			pci_write_config_dword(sii-&gt;pcibus,</div><div class='del'>-					       PCI_GPIO_OUT, out);</div><div class='del'>-			mdelay(2);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		if (what &amp; XTAL)</div><div class='del'>-			out &amp;= ~PCI_CFG_GPIO_XTAL;</div><div class='del'>-		if (what &amp; PLL)</div><div class='del'>-			out |= PCI_CFG_GPIO_PLL;</div><div class='del'>-		pci_write_config_dword(sii-&gt;pcibus,</div><div class='del'>-				       PCI_GPIO_OUT, out);</div><div class='del'>-		pci_write_config_dword(sii-&gt;pcibus,</div><div class='del'>-				       PCI_GPIO_OUTEN, outen);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* clk control mechanism through chipcommon, no policy checking */</div><div class='del'>-static bool _ai_clkctl_cc(struct si_info *sii, uint mode)</div><div class='del'>-{</div><div class='del'>-	struct bcma_device *cc;</div><div class='del'>-	u32 scc;</div><div class='del'>-</div><div class='del'>-	/* chipcommon cores prior to rev6 don't support dynamic clock control */</div><div class='del'>-	if (ai_get_ccrev(&amp;sii-&gt;pub) &lt; 6)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	cc = ai_findcore(&amp;sii-&gt;pub, BCMA_CORE_CHIPCOMMON, 0);</div><div class='del'>-</div><div class='del'>-	if (!(ai_get_cccaps(&amp;sii-&gt;pub) &amp; CC_CAP_PWR_CTL) &amp;&amp;</div><div class='del'>-	    (ai_get_ccrev(&amp;sii-&gt;pub) &lt; 20))</div><div class='del'>-		return mode == CLK_FAST;</div><div class='del'>-</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case CLK_FAST:		/* FORCEHT, fast (pll) clock */</div><div class='del'>-		if (ai_get_ccrev(&amp;sii-&gt;pub) &lt; 10) {</div><div class='del'>-			/*</div><div class='del'>-			 * don't forget to force xtal back</div><div class='del'>-			 * on before we clear SCC_DYN_XTAL..</div><div class='del'>-			 */</div><div class='del'>-			ai_clkctl_xtal(&amp;sii-&gt;pub, XTAL, ON);</div><div class='del'>-			bcma_maskset32(cc, CHIPCREGOFFS(slow_clk_ctl),</div><div class='del'>-				       (SCC_XC | SCC_FS | SCC_IP), SCC_IP);</div><div class='del'>-		} else if (ai_get_ccrev(&amp;sii-&gt;pub) &lt; 20) {</div><div class='del'>-			bcma_set32(cc, CHIPCREGOFFS(system_clk_ctl), SYCC_HR);</div><div class='del'>-		} else {</div><div class='del'>-			bcma_set32(cc, CHIPCREGOFFS(clk_ctl_st), CCS_FORCEHT);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* wait for the PLL */</div><div class='del'>-		if (ai_get_cccaps(&amp;sii-&gt;pub) &amp; CC_CAP_PMU) {</div><div class='del'>-			u32 htavail = CCS_HTAVAIL;</div><div class='del'>-			SPINWAIT(((bcma_read32(cc, CHIPCREGOFFS(clk_ctl_st)) &amp;</div><div class='del'>-				   htavail) == 0), PMU_MAX_TRANSITION_DLY);</div><div class='del'>-		} else {</div><div class='del'>-			udelay(PLL_DELAY);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case CLK_DYNAMIC:	/* enable dynamic clock control */</div><div class='del'>-		if (ai_get_ccrev(&amp;sii-&gt;pub) &lt; 10) {</div><div class='del'>-			scc = bcma_read32(cc, CHIPCREGOFFS(slow_clk_ctl));</div><div class='del'>-			scc &amp;= ~(SCC_FS | SCC_IP | SCC_XC);</div><div class='del'>-			if ((scc &amp; SCC_SS_MASK) != SCC_SS_XTAL)</div><div class='del'>-				scc |= SCC_XC;</div><div class='del'>-			bcma_write32(cc, CHIPCREGOFFS(slow_clk_ctl), scc);</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * for dynamic control, we have to</div><div class='del'>-			 * release our xtal_pu "force on"</div><div class='del'>-			 */</div><div class='del'>-			if (scc &amp; SCC_XC)</div><div class='del'>-				ai_clkctl_xtal(&amp;sii-&gt;pub, XTAL, OFF);</div><div class='del'>-		} else if (ai_get_ccrev(&amp;sii-&gt;pub) &lt; 20) {</div><div class='del'>-			/* Instaclock */</div><div class='del'>-			bcma_mask32(cc, CHIPCREGOFFS(system_clk_ctl), ~SYCC_HR);</div><div class='del'>-		} else {</div><div class='del'>-			bcma_mask32(cc, CHIPCREGOFFS(clk_ctl_st), ~CCS_FORCEHT);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return mode == CLK_FAST;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  *  clock control policy function throught chipcommon</div><div class='ctx'>  *</div><div class='hunk'>@@ -1033,133 +748,53 @@ static bool _ai_clkctl_cc(struct si_info *sii, uint mode)</div><div class='ctx'>  *    this is a wrapper over the next internal function</div><div class='ctx'>  *      to allow flexible policy settings for outside caller</div><div class='ctx'>  */</div><div class='del'>-bool ai_clkctl_cc(struct si_pub *sih, uint mode)</div><div class='add'>+bool ai_clkctl_cc(struct si_pub *sih, enum bcma_clkmode mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct si_info *sii;</div><div class='add'>+	struct bcma_device *cc;</div><div class='ctx'> </div><div class='ctx'> 	sii = (struct si_info *)sih;</div><div class='ctx'> </div><div class='del'>-	/* chipcommon cores prior to rev6 don't support dynamic clock control */</div><div class='del'>-	if (ai_get_ccrev(sih) &lt; 6)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='ctx'> 	if (PCI_FORCEHT(sih))</div><div class='del'>-		return mode == CLK_FAST;</div><div class='add'>+		return mode == BCMA_CLKMODE_FAST;</div><div class='ctx'> </div><div class='del'>-	return _ai_clkctl_cc(sii, mode);</div><div class='add'>+	cc = ai_findcore(&amp;sii-&gt;pub, BCMA_CORE_CHIPCOMMON, 0);</div><div class='add'>+	bcma_core_set_clockmode(cc, mode);</div><div class='add'>+	return mode == BCMA_CLKMODE_FAST;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ai_pci_up(struct si_pub *sih)</div><div class='ctx'> {</div><div class='ctx'> 	struct si_info *sii;</div><div class='add'>+	struct bcma_device *cc;</div><div class='ctx'> </div><div class='ctx'> 	sii = (struct si_info *)sih;</div><div class='ctx'> </div><div class='del'>-	if (PCI_FORCEHT(sih))</div><div class='del'>-		_ai_clkctl_cc(sii, CLK_FAST);</div><div class='add'>+	if (PCI_FORCEHT(sih)) {</div><div class='add'>+		cc = ai_findcore(&amp;sii-&gt;pub, BCMA_CORE_CHIPCOMMON, 0);</div><div class='add'>+		bcma_core_set_clockmode(cc, BCMA_CLKMODE_FAST);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (PCIE(sih))</div><div class='del'>-		pcicore_up(sii-&gt;pch, SI_PCIUP);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Unconfigure and/or apply various WARs when system is going to sleep mode */</div><div class='del'>-void ai_pci_sleep(struct si_pub *sih)</div><div class='del'>-{</div><div class='del'>-	struct si_info *sii;</div><div class='del'>-</div><div class='del'>-	sii = (struct si_info *)sih;</div><div class='del'>-</div><div class='del'>-	pcicore_sleep(sii-&gt;pch);</div><div class='add'>+		bcma_core_pci_extend_L1timer(&amp;sii-&gt;icbus-&gt;drv_pci, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Unconfigure and/or apply various WARs when going down */</div><div class='ctx'> void ai_pci_down(struct si_pub *sih)</div><div class='ctx'> {</div><div class='ctx'> 	struct si_info *sii;</div><div class='add'>+	struct bcma_device *cc;</div><div class='ctx'> </div><div class='ctx'> 	sii = (struct si_info *)sih;</div><div class='ctx'> </div><div class='ctx'> 	/* release FORCEHT since chip is going to "down" state */</div><div class='del'>-	if (PCI_FORCEHT(sih))</div><div class='del'>-		_ai_clkctl_cc(sii, CLK_DYNAMIC);</div><div class='del'>-</div><div class='del'>-	pcicore_down(sii-&gt;pch, SI_PCIDOWN);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Configure the pci core for pci client (NIC) action</div><div class='del'>- * coremask is the bitvec of cores by index to be enabled.</div><div class='del'>- */</div><div class='del'>-void ai_pci_setup(struct si_pub *sih, uint coremask)</div><div class='del'>-{</div><div class='del'>-	struct si_info *sii;</div><div class='del'>-	u32 w;</div><div class='del'>-</div><div class='del'>-	sii = (struct si_info *)sih;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Enable sb-&gt;pci interrupts.  Assume</div><div class='del'>-	 * PCI rev 2.3 support was added in pci core rev 6 and things changed..</div><div class='del'>-	 */</div><div class='del'>-	if (PCIE(sih) || (PCI(sih) &amp;&amp; (ai_get_buscorerev(sih) &gt;= 6))) {</div><div class='del'>-		/* pci config write to set this core bit in PCIIntMask */</div><div class='del'>-		pci_read_config_dword(sii-&gt;pcibus, PCI_INT_MASK, &amp;w);</div><div class='del'>-		w |= (coremask &lt;&lt; PCI_SBIM_SHIFT);</div><div class='del'>-		pci_write_config_dword(sii-&gt;pcibus, PCI_INT_MASK, w);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (PCI(sih)) {</div><div class='del'>-		pcicore_pci_setup(sii-&gt;pch);</div><div class='add'>+	if (PCI_FORCEHT(sih)) {</div><div class='add'>+		cc = ai_findcore(&amp;sii-&gt;pub, BCMA_CORE_CHIPCOMMON, 0);</div><div class='add'>+		bcma_core_set_clockmode(cc, BCMA_CLKMODE_DYNAMIC);</div><div class='ctx'> 	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Fixup SROMless PCI device's configuration.</div><div class='del'>- * The current core may be changed upon return.</div><div class='del'>- */</div><div class='del'>-int ai_pci_fixcfg(struct si_pub *sih)</div><div class='del'>-{</div><div class='del'>-	struct si_info *sii = (struct si_info *)sih;</div><div class='del'>-</div><div class='del'>-	/* Fixup PI in SROM shadow area to enable the correct PCI core access */</div><div class='del'>-	/* check 'pi' is correct and fix it if not */</div><div class='del'>-	pcicore_fixcfg(sii-&gt;pch);</div><div class='del'>-	pcicore_hwup(sii-&gt;pch);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* mask&amp;set gpiocontrol bits */</div><div class='del'>-u32 ai_gpiocontrol(struct si_pub *sih, u32 mask, u32 val, u8 priority)</div><div class='del'>-{</div><div class='del'>-	uint regoff;</div><div class='del'>-</div><div class='del'>-	regoff = offsetof(struct chipcregs, gpiocontrol);</div><div class='del'>-	return ai_cc_reg(sih, regoff, mask, val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ai_chipcontrl_epa4331(struct si_pub *sih, bool on)</div><div class='del'>-{</div><div class='del'>-	struct bcma_device *cc;</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	cc = ai_findcore(sih, CC_CORE_ID, 0);</div><div class='del'>-</div><div class='del'>-	if (on) {</div><div class='del'>-		if (ai_get_chippkg(sih) == 9 || ai_get_chippkg(sih) == 0xb)</div><div class='del'>-			/* Ext PA Controls for 4331 12x9 Package */</div><div class='del'>-			bcma_set32(cc, CHIPCREGOFFS(chipcontrol),</div><div class='del'>-				   CCTRL4331_EXTPA_EN |</div><div class='del'>-				   CCTRL4331_EXTPA_ON_GPIO2_5);</div><div class='del'>-		else</div><div class='del'>-			/* Ext PA Controls for 4331 12x12 Package */</div><div class='del'>-			bcma_set32(cc, CHIPCREGOFFS(chipcontrol),</div><div class='del'>-				   CCTRL4331_EXTPA_EN);</div><div class='del'>-	} else {</div><div class='del'>-		val &amp;= ~(CCTRL4331_EXTPA_EN | CCTRL4331_EXTPA_ON_GPIO2_5);</div><div class='del'>-		bcma_mask32(cc, CHIPCREGOFFS(chipcontrol),</div><div class='del'>-			    ~(CCTRL4331_EXTPA_EN | CCTRL4331_EXTPA_ON_GPIO2_5));</div><div class='del'>-	}</div><div class='add'>+	if (PCIE(sih))</div><div class='add'>+		bcma_core_pci_extend_L1timer(&amp;sii-&gt;icbus-&gt;drv_pci, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Enable BT-COEX &amp; Ex-PA for 4313 */</div><div class='hunk'>@@ -1181,6 +816,9 @@ bool ai_deviceremoved(struct si_pub *sih)</div><div class='ctx'> </div><div class='ctx'> 	sii = (struct si_info *)sih;</div><div class='ctx'> </div><div class='add'>+	if (sii-&gt;icbus-&gt;hosttype != BCMA_HOSTTYPE_PCI)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	pci_read_config_dword(sii-&gt;pcibus, PCI_VENDOR_ID, &amp;w);</div><div class='ctx'> 	if ((w &amp; 0xFFFF) != PCI_VENDOR_ID_BROADCOM)</div><div class='ctx'> 		return true;</div><div class='hunk'>@@ -1188,45 +826,6 @@ bool ai_deviceremoved(struct si_pub *sih)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool ai_is_sprom_available(struct si_pub *sih)</div><div class='del'>-{</div><div class='del'>-	struct si_info *sii = (struct si_info *)sih;</div><div class='del'>-</div><div class='del'>-	if (ai_get_ccrev(sih) &gt;= 31) {</div><div class='del'>-		struct bcma_device *cc;</div><div class='del'>-		u32 sromctrl;</div><div class='del'>-</div><div class='del'>-		if ((ai_get_cccaps(sih) &amp; CC_CAP_SROM) == 0)</div><div class='del'>-			return false;</div><div class='del'>-</div><div class='del'>-		cc = ai_findcore(sih, BCMA_CORE_CHIPCOMMON, 0);</div><div class='del'>-		sromctrl = bcma_read32(cc, CHIPCREGOFFS(sromcontrol));</div><div class='del'>-		return sromctrl &amp; SRC_PRESENT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (ai_get_chip_id(sih)) {</div><div class='del'>-	case BCM4313_CHIP_ID:</div><div class='del'>-		return (sii-&gt;chipst &amp; CST4313_SPROM_PRESENT) != 0;</div><div class='del'>-	default:</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool ai_is_otp_disabled(struct si_pub *sih)</div><div class='del'>-{</div><div class='del'>-	struct si_info *sii = (struct si_info *)sih;</div><div class='del'>-</div><div class='del'>-	switch (ai_get_chip_id(sih)) {</div><div class='del'>-	case BCM4313_CHIP_ID:</div><div class='del'>-		return (sii-&gt;chipst &amp; CST4313_OTP_PRESENT) == 0;</div><div class='del'>-		/* These chips always have their OTP on */</div><div class='del'>-	case BCM43224_CHIP_ID:</div><div class='del'>-	case BCM43225_CHIP_ID:</div><div class='del'>-	default:</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> uint ai_get_buscoretype(struct si_pub *sih)</div><div class='ctx'> {</div><div class='ctx'> 	struct si_info *sii = (struct si_info *)sih;</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h<br/>index f84c6f781692..d9f04a683bdb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/aiutils.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/aiutils.h</a></div><div class='hunk'>@@ -113,10 +113,6 @@</div><div class='ctx'> #define	XTAL			0x1	/* primary crystal oscillator (2050) */</div><div class='ctx'> #define	PLL			0x2	/* main chip pll */</div><div class='ctx'> </div><div class='del'>-/* clkctl clk mode */</div><div class='del'>-#define	CLK_FAST		0	/* force fast (pll) clock */</div><div class='del'>-#define	CLK_DYNAMIC		2	/* enable dynamic clock control */</div><div class='del'>-</div><div class='ctx'> /* GPIO usage priorities */</div><div class='ctx'> #define GPIO_DRV_PRIORITY	0	/* Driver */</div><div class='ctx'> #define GPIO_APP_PRIORITY	1	/* Application */</div><div class='hunk'>@@ -172,9 +168,7 @@ struct si_info {</div><div class='ctx'> 	struct si_pub pub;	/* back plane public state (must be first) */</div><div class='ctx'> 	struct bcma_bus *icbus;	/* handle to soc interconnect bus */</div><div class='ctx'> 	struct pci_dev *pcibus;	/* handle to pci bus */</div><div class='del'>-	struct pcicore_info *pch; /* PCI/E core handle */</div><div class='ctx'> 	struct bcma_device *buscore;</div><div class='del'>-	struct list_head var_list; /* list of srom variables */</div><div class='ctx'> </div><div class='ctx'> 	u32 chipst;		/* chip status */</div><div class='ctx'> };</div><div class='hunk'>@@ -197,38 +191,20 @@ extern u32 ai_core_cflags(struct bcma_device *core, u32 mask, u32 val);</div><div class='ctx'> extern struct si_pub *ai_attach(struct bcma_bus *pbus);</div><div class='ctx'> extern void ai_detach(struct si_pub *sih);</div><div class='ctx'> extern uint ai_cc_reg(struct si_pub *sih, uint regoff, u32 mask, u32 val);</div><div class='del'>-extern void ai_pci_setup(struct si_pub *sih, uint coremask);</div><div class='ctx'> extern void ai_clkctl_init(struct si_pub *sih);</div><div class='ctx'> extern u16 ai_clkctl_fast_pwrup_delay(struct si_pub *sih);</div><div class='ctx'> extern bool ai_clkctl_cc(struct si_pub *sih, uint mode);</div><div class='del'>-extern int ai_clkctl_xtal(struct si_pub *sih, uint what, bool on);</div><div class='ctx'> extern bool ai_deviceremoved(struct si_pub *sih);</div><div class='del'>-extern u32 ai_gpiocontrol(struct si_pub *sih, u32 mask, u32 val,</div><div class='del'>-			     u8 priority);</div><div class='del'>-</div><div class='del'>-/* OTP status */</div><div class='del'>-extern bool ai_is_otp_disabled(struct si_pub *sih);</div><div class='del'>-</div><div class='del'>-/* SPROM availability */</div><div class='del'>-extern bool ai_is_sprom_available(struct si_pub *sih);</div><div class='ctx'> </div><div class='del'>-extern void ai_pci_sleep(struct si_pub *sih);</div><div class='ctx'> extern void ai_pci_down(struct si_pub *sih);</div><div class='ctx'> extern void ai_pci_up(struct si_pub *sih);</div><div class='del'>-extern int ai_pci_fixcfg(struct si_pub *sih);</div><div class='ctx'> </div><div class='del'>-extern void ai_chipcontrl_epa4331(struct si_pub *sih, bool on);</div><div class='ctx'> /* Enable Ex-PA for 4313 */</div><div class='ctx'> extern void ai_epa_4313war(struct si_pub *sih);</div><div class='ctx'> </div><div class='ctx'> extern uint ai_get_buscoretype(struct si_pub *sih);</div><div class='ctx'> extern uint ai_get_buscorerev(struct si_pub *sih);</div><div class='ctx'> </div><div class='del'>-static inline int ai_get_ccrev(struct si_pub *sih)</div><div class='del'>-{</div><div class='del'>-	return sih-&gt;ccrev;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline u32 ai_get_cccaps(struct si_pub *sih)</div><div class='ctx'> {</div><div class='ctx'> 	return sih-&gt;cccaps;</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/antsel.c b/drivers/net/wireless/brcm80211/brcmsmac/antsel.c<br/>index a47ce25cb9a2..55e12c327911 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/antsel.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/antsel.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/antsel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/antsel.c</a></div><div class='hunk'>@@ -108,7 +108,7 @@ brcms_c_antsel_init_cfg(struct antsel_info *asi, struct brcms_antselcfg *antsel,</div><div class='ctx'> struct antsel_info *brcms_c_antsel_attach(struct brcms_c_info *wlc)</div><div class='ctx'> {</div><div class='ctx'> 	struct antsel_info *asi;</div><div class='del'>-	struct si_pub *sih = wlc-&gt;hw-&gt;sih;</div><div class='add'>+	struct ssb_sprom *sprom = &amp;wlc-&gt;hw-&gt;d11core-&gt;bus-&gt;sprom;</div><div class='ctx'> </div><div class='ctx'> 	asi = kzalloc(sizeof(struct antsel_info), GFP_ATOMIC);</div><div class='ctx'> 	if (!asi)</div><div class='hunk'>@@ -118,7 +118,7 @@ struct antsel_info *brcms_c_antsel_attach(struct brcms_c_info *wlc)</div><div class='ctx'> 	asi-&gt;pub = wlc-&gt;pub;</div><div class='ctx'> 	asi-&gt;antsel_type = ANTSEL_NA;</div><div class='ctx'> 	asi-&gt;antsel_avail = false;</div><div class='del'>-	asi-&gt;antsel_antswitch = (u8) getintvar(sih, BRCMS_SROM_ANTSWITCH);</div><div class='add'>+	asi-&gt;antsel_antswitch = sprom-&gt;antswitch;</div><div class='ctx'> </div><div class='ctx'> 	if ((asi-&gt;pub-&gt;sromrev &gt;= 4) &amp;&amp; (asi-&gt;antsel_antswitch != 0)) {</div><div class='ctx'> 		switch (asi-&gt;antsel_antswitch) {</div><div class='hunk'>@@ -128,12 +128,12 @@ struct antsel_info *brcms_c_antsel_attach(struct brcms_c_info *wlc)</div><div class='ctx'> 			/* 4321/2 board with 2x3 switch logic */</div><div class='ctx'> 			asi-&gt;antsel_type = ANTSEL_2x3;</div><div class='ctx'> 			/* Antenna selection availability */</div><div class='del'>-			if (((u16) getintvar(sih, BRCMS_SROM_AA2G) == 7) ||</div><div class='del'>-			    ((u16) getintvar(sih, BRCMS_SROM_AA5G) == 7)) {</div><div class='add'>+			if ((sprom-&gt;ant_available_bg == 7) ||</div><div class='add'>+			    (sprom-&gt;ant_available_a == 7)) {</div><div class='ctx'> 				asi-&gt;antsel_avail = true;</div><div class='ctx'> 			} else if (</div><div class='del'>-				(u16) getintvar(sih, BRCMS_SROM_AA2G) == 3 ||</div><div class='del'>-				(u16) getintvar(sih, BRCMS_SROM_AA5G) == 3) {</div><div class='add'>+				sprom-&gt;ant_available_bg == 3 ||</div><div class='add'>+				sprom-&gt;ant_available_a == 3) {</div><div class='ctx'> 				asi-&gt;antsel_avail = false;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				asi-&gt;antsel_avail = false;</div><div class='hunk'>@@ -146,8 +146,8 @@ struct antsel_info *brcms_c_antsel_attach(struct brcms_c_info *wlc)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if ((asi-&gt;pub-&gt;sromrev == 4) &amp;&amp;</div><div class='del'>-		   ((u16) getintvar(sih, BRCMS_SROM_AA2G) == 7) &amp;&amp;</div><div class='del'>-		   ((u16) getintvar(sih, BRCMS_SROM_AA5G) == 0)) {</div><div class='add'>+		   (sprom-&gt;ant_available_bg == 7) &amp;&amp;</div><div class='add'>+		   (sprom-&gt;ant_available_a == 0)) {</div><div class='ctx'> 		/* hack to match old 4321CB2 cards with 2of3 antenna switch */</div><div class='ctx'> 		asi-&gt;antsel_type = ANTSEL_2x3;</div><div class='ctx'> 		asi-&gt;antsel_avail = true;</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/channel.c b/drivers/net/wireless/brcm80211/brcmsmac/channel.c<br/>index 55e9f45fce22..eb77ac3cfb6b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/channel.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/channel.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/channel.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/channel.c</a></div><div class='hunk'>@@ -628,6 +628,40 @@ brcms_c_country_aggregate_map(struct brcms_cm_info *wlc_cm, const char *ccode,</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Indicates whether the country provided is valid to pass</div><div class='add'>+ * to cfg80211 or not.</div><div class='add'>+ *</div><div class='add'>+ * returns true if valid; false if not.</div><div class='add'>+ */</div><div class='add'>+static bool brcms_c_country_valid(const char *ccode)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * only allow ascii alpha uppercase for the first 2</div><div class='add'>+	 * chars.</div><div class='add'>+	 */</div><div class='add'>+	if (!((0x80 &amp; ccode[0]) == 0 &amp;&amp; ccode[0] &gt;= 0x41 &amp;&amp; ccode[0] &lt;= 0x5A &amp;&amp;</div><div class='add'>+	      (0x80 &amp; ccode[1]) == 0 &amp;&amp; ccode[1] &gt;= 0x41 &amp;&amp; ccode[1] &lt;= 0x5A &amp;&amp;</div><div class='add'>+	      ccode[2] == '\0'))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * do not match ISO 3166-1 user assigned country codes</div><div class='add'>+	 * that may be in the driver table</div><div class='add'>+	 */</div><div class='add'>+	if (!strcmp("AA", ccode) ||        /* AA */</div><div class='add'>+	    !strcmp("ZZ", ccode) ||        /* ZZ */</div><div class='add'>+	    ccode[0] == 'X' ||             /* XA - XZ */</div><div class='add'>+	    (ccode[0] == 'Q' &amp;&amp;            /* QM - QZ */</div><div class='add'>+	     (ccode[1] &gt;= 'M' &amp;&amp; ccode[1] &lt;= 'Z')))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!strcmp("NA", ccode))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Lookup a country info structure from a null terminated country</div><div class='ctx'>  * abbreviation and regrev directly with no translation.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1076,7 +1110,7 @@ struct brcms_cm_info *brcms_c_channel_mgr_attach(struct brcms_c_info *wlc)</div><div class='ctx'> 	char country_abbrev[BRCM_CNTRY_BUF_SZ];</div><div class='ctx'> 	const struct country_info *country;</div><div class='ctx'> 	struct brcms_pub *pub = wlc-&gt;pub;</div><div class='del'>-	char *ccode;</div><div class='add'>+	struct ssb_sprom *sprom = &amp;wlc-&gt;hw-&gt;d11core-&gt;bus-&gt;sprom;</div><div class='ctx'> </div><div class='ctx'> 	BCMMSG(wlc-&gt;wiphy, "wl%d\n", wlc-&gt;pub-&gt;unit);</div><div class='ctx'> </div><div class='hunk'>@@ -1088,9 +1122,8 @@ struct brcms_cm_info *brcms_c_channel_mgr_attach(struct brcms_c_info *wlc)</div><div class='ctx'> 	wlc-&gt;cmi = wlc_cm;</div><div class='ctx'> </div><div class='ctx'> 	/* store the country code for passing up as a regulatory hint */</div><div class='del'>-	ccode = getvar(wlc-&gt;hw-&gt;sih, BRCMS_SROM_CCODE);</div><div class='del'>-	if (ccode)</div><div class='del'>-		strncpy(wlc-&gt;pub-&gt;srom_ccode, ccode, BRCM_CNTRY_BUF_SZ - 1);</div><div class='add'>+	if (sprom-&gt;alpha2 &amp;&amp; brcms_c_country_valid(sprom-&gt;alpha2))</div><div class='add'>+		strncpy(wlc-&gt;pub-&gt;srom_ccode, sprom-&gt;alpha2, sizeof(sprom-&gt;alpha2));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * internal country information which must match</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/d11.h b/drivers/net/wireless/brcm80211/brcmsmac/d11.h<br/>index 1948cb2771e9..3f659e09f1cc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/d11.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/d11.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/d11.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/d11.h</a></div><div class='hunk'>@@ -733,7 +733,7 @@ struct cck_phy_hdr {</div><div class='ctx'> 	do { \</div><div class='ctx'> 		plcp[1] = len &amp; 0xff; \</div><div class='ctx'> 		plcp[2] = ((len &gt;&gt; 8) &amp; 0xff); \</div><div class='del'>-	} while (0);</div><div class='add'>+	} while (0)</div><div class='ctx'> </div><div class='ctx'> #define BRCMS_SET_MIMO_PLCP_AMPDU(plcp) (plcp[3] |= MIMO_PLCP_AMPDU)</div><div class='ctx'> #define BRCMS_CLR_MIMO_PLCP_AMPDU(plcp) (plcp[3] &amp;= ~MIMO_PLCP_AMPDU)</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c b/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c<br/>index 569ab8abd2a1..50f92a0b7c41 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c</a></div><div class='hunk'>@@ -25,7 +25,6 @@</div><div class='ctx'> #include &lt;linux/bcma/bcma.h&gt;</div><div class='ctx'> #include &lt;net/mac80211.h&gt;</div><div class='ctx'> #include &lt;defs.h&gt;</div><div class='del'>-#include "nicpci.h"</div><div class='ctx'> #include "phy/phy_int.h"</div><div class='ctx'> #include "d11.h"</div><div class='ctx'> #include "channel.h"</div><div class='hunk'>@@ -770,7 +769,7 @@ void brcms_dpc(unsigned long data)</div><div class='ctx'>  * Precondition: Since this function is called in brcms_pci_probe() context,</div><div class='ctx'>  * no locking is required.</div><div class='ctx'>  */</div><div class='del'>-static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev)</div><div class='add'>+static int brcms_request_fw(struct brcms_info *wl, struct bcma_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	int status;</div><div class='ctx'> 	struct device *device = &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -1022,7 +1021,7 @@ static struct brcms_info *brcms_attach(struct bcma_device *pdev)</div><div class='ctx'> 	spin_lock_init(&amp;wl-&gt;isr_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* prepare ucode */</div><div class='del'>-	if (brcms_request_fw(wl, pdev-&gt;bus-&gt;host_pci) &lt; 0) {</div><div class='add'>+	if (brcms_request_fw(wl, pdev) &lt; 0) {</div><div class='ctx'> 		wiphy_err(wl-&gt;wiphy, "%s: Failed to find firmware usually in "</div><div class='ctx'> 			  "%s\n", KBUILD_MODNAME, "/lib/firmware/brcm");</div><div class='ctx'> 		brcms_release_fw(wl);</div><div class='hunk'>@@ -1043,12 +1042,12 @@ static struct brcms_info *brcms_attach(struct bcma_device *pdev)</div><div class='ctx'> 	wl-&gt;pub-&gt;ieee_hw = hw;</div><div class='ctx'> </div><div class='ctx'> 	/* register our interrupt handler */</div><div class='del'>-	if (request_irq(pdev-&gt;bus-&gt;host_pci-&gt;irq, brcms_isr,</div><div class='add'>+	if (request_irq(pdev-&gt;irq, brcms_isr,</div><div class='ctx'> 			IRQF_SHARED, KBUILD_MODNAME, wl)) {</div><div class='ctx'> 		wiphy_err(wl-&gt;wiphy, "wl%d: request_irq() failed\n", unit);</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='del'>-	wl-&gt;irq = pdev-&gt;bus-&gt;host_pci-&gt;irq;</div><div class='add'>+	wl-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> </div><div class='ctx'> 	/* register module */</div><div class='ctx'> 	brcms_c_module_register(wl-&gt;pub, "linux", wl, NULL);</div><div class='hunk'>@@ -1069,11 +1068,7 @@ static struct brcms_info *brcms_attach(struct bcma_device *pdev)</div><div class='ctx'> 		wiphy_err(wl-&gt;wiphy, "%s: ieee80211_register_hw failed, status"</div><div class='ctx'> 			  "%d\n", __func__, err);</div><div class='ctx'> </div><div class='del'>-	if (wl-&gt;pub-&gt;srom_ccode[0])</div><div class='del'>-		err = brcms_set_hint(wl, wl-&gt;pub-&gt;srom_ccode);</div><div class='del'>-	else</div><div class='del'>-		err = brcms_set_hint(wl, "US");</div><div class='del'>-	if (err)</div><div class='add'>+	if (wl-&gt;pub-&gt;srom_ccode[0] &amp;&amp; brcms_set_hint(wl, wl-&gt;pub-&gt;srom_ccode))</div><div class='ctx'> 		wiphy_err(wl-&gt;wiphy, "%s: regulatory_hint failed, status %d\n",</div><div class='ctx'> 			  __func__, err);</div><div class='ctx'> </div><div class='hunk'>@@ -1102,7 +1097,7 @@ static int __devinit brcms_bcma_probe(struct bcma_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "mfg %x core %x rev %d class %d irq %d\n",</div><div class='ctx'> 		 pdev-&gt;id.manuf, pdev-&gt;id.id, pdev-&gt;id.rev, pdev-&gt;id.class,</div><div class='del'>-		 pdev-&gt;bus-&gt;host_pci-&gt;irq);</div><div class='add'>+		 pdev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	if ((pdev-&gt;id.manuf != BCMA_MANUF_BCM) ||</div><div class='ctx'> 	    (pdev-&gt;id.id != BCMA_CORE_80211))</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/main.c b/drivers/net/wireless/brcm80211/brcmsmac/main.c<br/>index 7083db75b00c..19db4052c44c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/main.c</a></div><div class='hunk'>@@ -847,8 +847,7 @@ brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!(txs-&gt;status &amp; TX_STATUS_AMPDU)</div><div class='ctx'> 	    &amp;&amp; (txs-&gt;status &amp; TX_STATUS_INTERMEDIATE)) {</div><div class='del'>-		wiphy_err(wlc-&gt;wiphy, "%s: INTERMEDIATE but not AMPDU\n",</div><div class='del'>-			  __func__);</div><div class='add'>+		BCMMSG(wlc-&gt;wiphy, "INTERMEDIATE but not AMPDU\n");</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1220,7 +1219,7 @@ static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* control chip clock to save power, enable dynamic clock or force fast clock */</div><div class='del'>-static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)</div><div class='add'>+static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, enum bcma_clkmode mode)</div><div class='ctx'> {</div><div class='ctx'> 	if (ai_get_cccaps(wlc_hw-&gt;sih) &amp; CC_CAP_PMU) {</div><div class='ctx'> 		/* new chips with PMU, CCS_FORCEHT will distribute the HT clock</div><div class='hunk'>@@ -1230,7 +1229,7 @@ static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='ctx'> 		if (wlc_hw-&gt;clk) {</div><div class='del'>-			if (mode == CLK_FAST) {</div><div class='add'>+			if (mode == BCMA_CLKMODE_FAST) {</div><div class='ctx'> 				bcma_set32(wlc_hw-&gt;d11core,</div><div class='ctx'> 					   D11REGOFFS(clk_ctl_st),</div><div class='ctx'> 					   CCS_FORCEHT);</div><div class='hunk'>@@ -1261,7 +1260,7 @@ static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)</div><div class='ctx'> 					~CCS_FORCEHT);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		wlc_hw-&gt;forcefastclk = (mode == CLK_FAST);</div><div class='add'>+		wlc_hw-&gt;forcefastclk = (mode == BCMA_CLKMODE_FAST);</div><div class='ctx'> 	} else {</div><div class='ctx'> </div><div class='ctx'> 		/* old chips w/o PMU, force HT through cc,</div><div class='hunk'>@@ -1568,7 +1567,7 @@ void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)</div><div class='ctx'> 	/* request FAST clock if not on */</div><div class='ctx'> 	fastclk = wlc_hw-&gt;forcefastclk;</div><div class='ctx'> 	if (!fastclk)</div><div class='del'>-		brcms_b_clkctl_clk(wlc_hw, CLK_FAST);</div><div class='add'>+		brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);</div><div class='ctx'> </div><div class='ctx'> 	wlc_phy_bw_state_set(wlc_hw-&gt;band-&gt;pi, bw);</div><div class='ctx'> </div><div class='hunk'>@@ -1577,7 +1576,7 @@ void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)</div><div class='ctx'> </div><div class='ctx'> 	/* restore the clk */</div><div class='ctx'> 	if (!fastclk)</div><div class='del'>-		brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);</div><div class='add'>+		brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)</div><div class='hunk'>@@ -1883,27 +1882,20 @@ static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)</div><div class='add'>+static void brcms_c_get_macaddr(struct brcms_hardware *wlc_hw, u8 etheraddr[ETH_ALEN])</div><div class='ctx'> {</div><div class='del'>-	enum brcms_srom_id var_id = BRCMS_SROM_MACADDR;</div><div class='del'>-	char *macaddr;</div><div class='add'>+	struct ssb_sprom *sprom = &amp;wlc_hw-&gt;d11core-&gt;bus-&gt;sprom;</div><div class='ctx'> </div><div class='ctx'> 	/* If macaddr exists, use it (Sromrev4, CIS, ...). */</div><div class='del'>-	macaddr = getvar(wlc_hw-&gt;sih, var_id);</div><div class='del'>-	if (macaddr != NULL)</div><div class='del'>-		return macaddr;</div><div class='add'>+	if (!is_zero_ether_addr(sprom-&gt;il0mac)) {</div><div class='add'>+		memcpy(etheraddr, sprom-&gt;il0mac, 6);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (wlc_hw-&gt;_nbands &gt; 1)</div><div class='del'>-		var_id = BRCMS_SROM_ET1MACADDR;</div><div class='add'>+		memcpy(etheraddr, sprom-&gt;et1mac, 6);</div><div class='ctx'> 	else</div><div class='del'>-		var_id = BRCMS_SROM_IL0MACADDR;</div><div class='del'>-</div><div class='del'>-	macaddr = getvar(wlc_hw-&gt;sih, var_id);</div><div class='del'>-	if (macaddr == NULL)</div><div class='del'>-		wiphy_err(wlc_hw-&gt;wlc-&gt;wiphy, "wl%d: wlc_get_macaddr: macaddr "</div><div class='del'>-			  "getvar(%d) not found\n", wlc_hw-&gt;unit, var_id);</div><div class='del'>-</div><div class='del'>-	return macaddr;</div><div class='add'>+		memcpy(etheraddr, sprom-&gt;il0mac, 6);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* power both the pll and external oscillator on/off */</div><div class='hunk'>@@ -1918,9 +1910,6 @@ static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)</div><div class='ctx'> 	if (!want &amp;&amp; wlc_hw-&gt;pllreq)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (wlc_hw-&gt;sih)</div><div class='del'>-		ai_clkctl_xtal(wlc_hw-&gt;sih, XTAL | PLL, want);</div><div class='del'>-</div><div class='ctx'> 	wlc_hw-&gt;sbclk = want;</div><div class='ctx'> 	if (!wlc_hw-&gt;sbclk) {</div><div class='ctx'> 		wlc_hw-&gt;clk = false;</div><div class='hunk'>@@ -2005,7 +1994,7 @@ void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)</div><div class='ctx'> 	/* request FAST clock if not on  */</div><div class='ctx'> 	fastclk = wlc_hw-&gt;forcefastclk;</div><div class='ctx'> 	if (!fastclk)</div><div class='del'>-		brcms_b_clkctl_clk(wlc_hw, CLK_FAST);</div><div class='add'>+		brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);</div><div class='ctx'> </div><div class='ctx'> 	/* reset the dma engines except first time thru */</div><div class='ctx'> 	if (bcma_core_is_enabled(wlc_hw-&gt;d11core)) {</div><div class='hunk'>@@ -2054,7 +2043,7 @@ void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)</div><div class='ctx'> 	brcms_c_mctrl_reset(wlc_hw);</div><div class='ctx'> </div><div class='ctx'> 	if (ai_get_cccaps(wlc_hw-&gt;sih) &amp; CC_CAP_PMU)</div><div class='del'>-		brcms_b_clkctl_clk(wlc_hw, CLK_FAST);</div><div class='add'>+		brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);</div><div class='ctx'> </div><div class='ctx'> 	brcms_b_phy_reset(wlc_hw);</div><div class='ctx'> </div><div class='hunk'>@@ -2066,7 +2055,7 @@ void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)</div><div class='ctx'> </div><div class='ctx'> 	/* restore the clk setting */</div><div class='ctx'> 	if (!fastclk)</div><div class='del'>-		brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);</div><div class='add'>+		brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* txfifo sizes needs to be modified(increased) since the newer cores</div><div class='hunk'>@@ -2219,7 +2208,7 @@ static void brcms_c_gpio_init(struct brcms_c_info *wlc)</div><div class='ctx'> 		gm |= gc |= BOARD_GPIO_PACTRL;</div><div class='ctx'> </div><div class='ctx'> 	/* apply to gpiocontrol register */</div><div class='del'>-	ai_gpiocontrol(wlc_hw-&gt;sih, gm, gc, GPIO_DRV_PRIORITY);</div><div class='add'>+	bcma_chipco_gpio_control(&amp;wlc_hw-&gt;d11core-&gt;bus-&gt;drv_cc, gm, gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void brcms_ucode_write(struct brcms_hardware *wlc_hw,</div><div class='hunk'>@@ -3372,7 +3361,7 @@ static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec) {</div><div class='ctx'> 	/* request FAST clock if not on */</div><div class='ctx'> 	fastclk = wlc_hw-&gt;forcefastclk;</div><div class='ctx'> 	if (!fastclk)</div><div class='del'>-		brcms_b_clkctl_clk(wlc_hw, CLK_FAST);</div><div class='add'>+		brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);</div><div class='ctx'> </div><div class='ctx'> 	/* disable interrupts */</div><div class='ctx'> 	macintmask = brcms_intrsoff(wlc-&gt;wl);</div><div class='hunk'>@@ -3406,7 +3395,7 @@ static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec) {</div><div class='ctx'> </div><div class='ctx'> 	/* restore the clk */</div><div class='ctx'> 	if (!fastclk)</div><div class='del'>-		brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);</div><div class='add'>+		brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,</div><div class='hunk'>@@ -4437,17 +4426,22 @@ static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,</div><div class='ctx'> 			  uint unit, bool piomode)</div><div class='ctx'> {</div><div class='ctx'> 	struct brcms_hardware *wlc_hw;</div><div class='del'>-	char *macaddr = NULL;</div><div class='ctx'> 	uint err = 0;</div><div class='ctx'> 	uint j;</div><div class='ctx'> 	bool wme = false;</div><div class='ctx'> 	struct shared_phy_params sha_params;</div><div class='ctx'> 	struct wiphy *wiphy = wlc-&gt;wiphy;</div><div class='ctx'> 	struct pci_dev *pcidev = core-&gt;bus-&gt;host_pci;</div><div class='add'>+	struct ssb_sprom *sprom = &amp;core-&gt;bus-&gt;sprom;</div><div class='ctx'> </div><div class='del'>-	BCMMSG(wlc-&gt;wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit,</div><div class='del'>-	       pcidev-&gt;vendor,</div><div class='del'>-	       pcidev-&gt;device);</div><div class='add'>+	if (core-&gt;bus-&gt;hosttype == BCMA_HOSTTYPE_PCI)</div><div class='add'>+		BCMMSG(wlc-&gt;wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit,</div><div class='add'>+		       pcidev-&gt;vendor,</div><div class='add'>+		       pcidev-&gt;device);</div><div class='add'>+	else</div><div class='add'>+		BCMMSG(wlc-&gt;wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit,</div><div class='add'>+		       core-&gt;bus-&gt;boardinfo.vendor,</div><div class='add'>+		       core-&gt;bus-&gt;boardinfo.type);</div><div class='ctx'> </div><div class='ctx'> 	wme = true;</div><div class='ctx'> </div><div class='hunk'>@@ -4473,7 +4467,8 @@ static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* verify again the device is supported */</div><div class='del'>-	if (!brcms_c_chipmatch(pcidev-&gt;vendor, pcidev-&gt;device)) {</div><div class='add'>+	if (core-&gt;bus-&gt;hosttype == BCMA_HOSTTYPE_PCI &amp;&amp;</div><div class='add'>+	    !brcms_c_chipmatch(pcidev-&gt;vendor, pcidev-&gt;device)) {</div><div class='ctx'> 		wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "</div><div class='ctx'> 			"vendor/device (0x%x/0x%x)\n",</div><div class='ctx'> 			 unit, pcidev-&gt;vendor, pcidev-&gt;device);</div><div class='hunk'>@@ -4481,8 +4476,13 @@ static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wlc_hw-&gt;vendorid = pcidev-&gt;vendor;</div><div class='del'>-	wlc_hw-&gt;deviceid = pcidev-&gt;device;</div><div class='add'>+	if (core-&gt;bus-&gt;hosttype == BCMA_HOSTTYPE_PCI) {</div><div class='add'>+		wlc_hw-&gt;vendorid = pcidev-&gt;vendor;</div><div class='add'>+		wlc_hw-&gt;deviceid = pcidev-&gt;device;</div><div class='add'>+	} else {</div><div class='add'>+		wlc_hw-&gt;vendorid = core-&gt;bus-&gt;boardinfo.vendor;</div><div class='add'>+		wlc_hw-&gt;deviceid = core-&gt;bus-&gt;boardinfo.type;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	wlc_hw-&gt;d11core = core;</div><div class='ctx'> 	wlc_hw-&gt;corerev = core-&gt;id.rev;</div><div class='hunk'>@@ -4502,7 +4502,7 @@ static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,</div><div class='ctx'> 	 *   is still false; But it will be called again inside wlc_corereset,</div><div class='ctx'> 	 *   after d11 is out of reset.</div><div class='ctx'> 	 */</div><div class='del'>-	brcms_b_clkctl_clk(wlc_hw, CLK_FAST);</div><div class='add'>+	brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);</div><div class='ctx'> 	brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);</div><div class='ctx'> </div><div class='ctx'> 	if (!brcms_b_validate_chip_access(wlc_hw)) {</div><div class='hunk'>@@ -4513,7 +4513,7 @@ static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* get the board rev, used just below */</div><div class='del'>-	j = getintvar(wlc_hw-&gt;sih, BRCMS_SROM_BOARDREV);</div><div class='add'>+	j = sprom-&gt;board_rev;</div><div class='ctx'> 	/* promote srom boardrev of 0xFF to 1 */</div><div class='ctx'> 	if (j == BOARDREV_PROMOTABLE)</div><div class='ctx'> 		j = BOARDREV_PROMOTED;</div><div class='hunk'>@@ -4526,11 +4526,9 @@ static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,</div><div class='ctx'> 		err = 15;</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='del'>-	wlc_hw-&gt;sromrev = (u8) getintvar(wlc_hw-&gt;sih, BRCMS_SROM_REV);</div><div class='del'>-	wlc_hw-&gt;boardflags = (u32) getintvar(wlc_hw-&gt;sih,</div><div class='del'>-					     BRCMS_SROM_BOARDFLAGS);</div><div class='del'>-	wlc_hw-&gt;boardflags2 = (u32) getintvar(wlc_hw-&gt;sih,</div><div class='del'>-					      BRCMS_SROM_BOARDFLAGS2);</div><div class='add'>+	wlc_hw-&gt;sromrev = sprom-&gt;revision;</div><div class='add'>+	wlc_hw-&gt;boardflags = sprom-&gt;boardflags_lo + (sprom-&gt;boardflags_hi &lt;&lt; 16);</div><div class='add'>+	wlc_hw-&gt;boardflags2 = sprom-&gt;boardflags2_lo + (sprom-&gt;boardflags2_hi &lt;&lt; 16);</div><div class='ctx'> </div><div class='ctx'> 	if (wlc_hw-&gt;boardflags &amp; BFL_NOPLLDOWN)</div><div class='ctx'> 		brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);</div><div class='hunk'>@@ -4703,25 +4701,18 @@ static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	/* init etheraddr state variables */</div><div class='del'>-	macaddr = brcms_c_get_macaddr(wlc_hw);</div><div class='del'>-	if (macaddr == NULL) {</div><div class='del'>-		wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",</div><div class='del'>-			  unit);</div><div class='del'>-		err = 21;</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-	if (!mac_pton(macaddr, wlc_hw-&gt;etheraddr) ||</div><div class='del'>-	    is_broadcast_ether_addr(wlc_hw-&gt;etheraddr) ||</div><div class='add'>+	brcms_c_get_macaddr(wlc_hw, wlc_hw-&gt;etheraddr);</div><div class='add'>+</div><div class='add'>+	if (is_broadcast_ether_addr(wlc_hw-&gt;etheraddr) ||</div><div class='ctx'> 	    is_zero_ether_addr(wlc_hw-&gt;etheraddr)) {</div><div class='del'>-		wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",</div><div class='del'>-			  unit, macaddr);</div><div class='add'>+		wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr\n",</div><div class='add'>+			  unit);</div><div class='ctx'> 		err = 22;</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BCMMSG(wlc-&gt;wiphy, "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",</div><div class='del'>-	       wlc_hw-&gt;deviceid, wlc_hw-&gt;_nbands, ai_get_boardtype(wlc_hw-&gt;sih),</div><div class='del'>-	       macaddr);</div><div class='add'>+	BCMMSG(wlc-&gt;wiphy, "deviceid 0x%x nbands %d board 0x%x\n",</div><div class='add'>+	       wlc_hw-&gt;deviceid, wlc_hw-&gt;_nbands, ai_get_boardtype(wlc_hw-&gt;sih));</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='hunk'>@@ -4771,16 +4762,16 @@ static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)</div><div class='ctx'> 	int aa;</div><div class='ctx'> 	uint unit;</div><div class='ctx'> 	int bandtype;</div><div class='del'>-	struct si_pub *sih = wlc-&gt;hw-&gt;sih;</div><div class='add'>+	struct ssb_sprom *sprom = &amp;wlc-&gt;hw-&gt;d11core-&gt;bus-&gt;sprom;</div><div class='ctx'> </div><div class='ctx'> 	unit = wlc-&gt;pub-&gt;unit;</div><div class='ctx'> 	bandtype = wlc-&gt;band-&gt;bandtype;</div><div class='ctx'> </div><div class='ctx'> 	/* get antennas available */</div><div class='ctx'> 	if (bandtype == BRCM_BAND_5G)</div><div class='del'>-		aa = (s8) getintvar(sih, BRCMS_SROM_AA5G);</div><div class='add'>+		aa = sprom-&gt;ant_available_a;</div><div class='ctx'> 	else</div><div class='del'>-		aa = (s8) getintvar(sih, BRCMS_SROM_AA2G);</div><div class='add'>+		aa = sprom-&gt;ant_available_bg;</div><div class='ctx'> </div><div class='ctx'> 	if ((aa &lt; 1) || (aa &gt; 15)) {</div><div class='ctx'> 		wiphy_err(wlc-&gt;wiphy, "wl%d: %s: Invalid antennas available in"</div><div class='hunk'>@@ -4800,9 +4791,9 @@ static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)</div><div class='ctx'> </div><div class='ctx'> 	/* Compute Antenna Gain */</div><div class='ctx'> 	if (bandtype == BRCM_BAND_5G)</div><div class='del'>-		wlc-&gt;band-&gt;antgain = (s8) getintvar(sih, BRCMS_SROM_AG1);</div><div class='add'>+		wlc-&gt;band-&gt;antgain = sprom-&gt;antenna_gain.a1;</div><div class='ctx'> 	else</div><div class='del'>-		wlc-&gt;band-&gt;antgain = (s8) getintvar(sih, BRCMS_SROM_AG0);</div><div class='add'>+		wlc-&gt;band-&gt;antgain = sprom-&gt;antenna_gain.a0;</div><div class='ctx'> </div><div class='ctx'> 	brcms_c_attach_antgain_init(wlc);</div><div class='ctx'> </div><div class='hunk'>@@ -4953,15 +4944,6 @@ static int brcms_b_detach(struct brcms_c_info *wlc)</div><div class='ctx'> </div><div class='ctx'> 	callbacks = 0;</div><div class='ctx'> </div><div class='del'>-	if (wlc_hw-&gt;sih) {</div><div class='del'>-		/*</div><div class='del'>-		 * detach interrupt sync mechanism since interrupt is disabled</div><div class='del'>-		 * and per-port interrupt object may has been freed. this must</div><div class='del'>-		 * be done before sb core switch</div><div class='del'>-		 */</div><div class='del'>-		ai_pci_sleep(wlc_hw-&gt;sih);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	brcms_b_detach_dmapio(wlc_hw);</div><div class='ctx'> </div><div class='ctx'> 	band = wlc_hw-&gt;band;</div><div class='hunk'>@@ -5048,9 +5030,7 @@ static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)</div><div class='ctx'> 	 */</div><div class='ctx'> 	brcms_b_xtal(wlc_hw, ON);</div><div class='ctx'> 	ai_clkctl_init(wlc_hw-&gt;sih);</div><div class='del'>-	brcms_b_clkctl_clk(wlc_hw, CLK_FAST);</div><div class='del'>-</div><div class='del'>-	ai_pci_fixcfg(wlc_hw-&gt;sih);</div><div class='add'>+	brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * TODO: test suspend/resume</div><div class='hunk'>@@ -5079,8 +5059,6 @@ static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)</div><div class='ctx'> </div><div class='ctx'> static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)</div><div class='ctx'> {</div><div class='del'>-	uint coremask;</div><div class='del'>-</div><div class='ctx'> 	BCMMSG(wlc_hw-&gt;wlc-&gt;wiphy, "wl%d\n", wlc_hw-&gt;unit);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -5089,15 +5067,14 @@ static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)</div><div class='ctx'> 	 */</div><div class='ctx'> 	brcms_b_xtal(wlc_hw, ON);</div><div class='ctx'> 	ai_clkctl_init(wlc_hw-&gt;sih);</div><div class='del'>-	brcms_b_clkctl_clk(wlc_hw, CLK_FAST);</div><div class='add'>+	brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Configure pci/pcmcia here instead of in brcms_c_attach()</div><div class='ctx'> 	 * to allow mfg hotswap:  down, hotswap (chip power cycle), up.</div><div class='ctx'> 	 */</div><div class='del'>-	coremask = (1 &lt;&lt; wlc_hw-&gt;wlc-&gt;core-&gt;coreidx);</div><div class='del'>-</div><div class='del'>-	ai_pci_setup(wlc_hw-&gt;sih, coremask);</div><div class='add'>+	bcma_core_pci_irq_ctl(&amp;wlc_hw-&gt;d11core-&gt;bus-&gt;drv_pci, wlc_hw-&gt;d11core,</div><div class='add'>+			      true);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Need to read the hwradio status here to cover the case where the</div><div class='hunk'>@@ -5127,7 +5104,7 @@ static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)</div><div class='ctx'> 	wlc_phy_hw_state_upd(wlc_hw-&gt;band-&gt;pi, true);</div><div class='ctx'> </div><div class='ctx'> 	/* FULLY enable dynamic power control and d11 core interrupt */</div><div class='del'>-	brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);</div><div class='add'>+	brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC);</div><div class='ctx'> 	brcms_intrson(wlc_hw-&gt;wlc-&gt;wl);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -5268,7 +5245,7 @@ static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)</div><div class='ctx'> 		brcms_intrsoff(wlc_hw-&gt;wlc-&gt;wl);</div><div class='ctx'> </div><div class='ctx'> 		/* ensure we're running on the pll clock again */</div><div class='del'>-		brcms_b_clkctl_clk(wlc_hw, CLK_FAST);</div><div class='add'>+		brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* down phy at the last of this stage */</div><div class='ctx'> 	callbacks += wlc_phy_down(wlc_hw-&gt;band-&gt;pi);</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/nicpci.c b/drivers/net/wireless/brcm80211/brcmsmac/nicpci.c<br/>deleted file mode 100644<br/>index 7fad6dc19258..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/nicpci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/nicpci.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,826 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2010 Broadcom Corporation</div><div class='del'>- *</div><div class='del'>- * Permission to use, copy, modify, and/or distribute this software for any</div><div class='del'>- * purpose with or without fee is hereby granted, provided that the above</div><div class='del'>- * copyright notice and this permission notice appear in all copies.</div><div class='del'>- *</div><div class='del'>- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='del'>- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='del'>- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY</div><div class='del'>- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='del'>- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION</div><div class='del'>- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN</div><div class='del'>- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;defs.h&gt;</div><div class='del'>-#include &lt;soc.h&gt;</div><div class='del'>-#include &lt;chipcommon.h&gt;</div><div class='del'>-#include "aiutils.h"</div><div class='del'>-#include "pub.h"</div><div class='del'>-#include "nicpci.h"</div><div class='del'>-</div><div class='del'>-/* SPROM offsets */</div><div class='del'>-#define SRSH_ASPM_OFFSET		4	/* word 4 */</div><div class='del'>-#define SRSH_ASPM_ENB			0x18	/* bit 3, 4 */</div><div class='del'>-#define SRSH_ASPM_L1_ENB		0x10	/* bit 4 */</div><div class='del'>-#define SRSH_ASPM_L0s_ENB		0x8	/* bit 3 */</div><div class='del'>-</div><div class='del'>-#define SRSH_PCIE_MISC_CONFIG		5	/* word 5 */</div><div class='del'>-#define SRSH_L23READY_EXIT_NOPERST	0x8000	/* bit 15 */</div><div class='del'>-#define SRSH_CLKREQ_OFFSET_REV5		20	/* word 20 for srom rev &lt;= 5 */</div><div class='del'>-#define SRSH_CLKREQ_ENB			0x0800	/* bit 11 */</div><div class='del'>-#define SRSH_BD_OFFSET                  6	/* word 6 */</div><div class='del'>-</div><div class='del'>-/* chipcontrol */</div><div class='del'>-#define CHIPCTRL_4321_PLL_DOWN		0x800000/* serdes PLL down override */</div><div class='del'>-</div><div class='del'>-/* MDIO control */</div><div class='del'>-#define MDIOCTL_DIVISOR_MASK		0x7f	/* clock to be used on MDIO */</div><div class='del'>-#define MDIOCTL_DIVISOR_VAL		0x2</div><div class='del'>-#define MDIOCTL_PREAM_EN		0x80	/* Enable preamble sequnce */</div><div class='del'>-#define MDIOCTL_ACCESS_DONE		0x100	/* Transaction complete */</div><div class='del'>-</div><div class='del'>-/* MDIO Data */</div><div class='del'>-#define MDIODATA_MASK			0x0000ffff	/* data 2 bytes */</div><div class='del'>-#define MDIODATA_TA			0x00020000	/* Turnaround */</div><div class='del'>-</div><div class='del'>-#define MDIODATA_REGADDR_SHF		18		/* Regaddr shift */</div><div class='del'>-#define MDIODATA_REGADDR_MASK		0x007c0000	/* Regaddr Mask */</div><div class='del'>-#define MDIODATA_DEVADDR_SHF		23	/* Physmedia devaddr shift */</div><div class='del'>-#define MDIODATA_DEVADDR_MASK		0x0f800000</div><div class='del'>-						/* Physmedia devaddr Mask */</div><div class='del'>-</div><div class='del'>-/* MDIO Data for older revisions &lt; 10 */</div><div class='del'>-#define MDIODATA_REGADDR_SHF_OLD	18	/* Regaddr shift */</div><div class='del'>-#define MDIODATA_REGADDR_MASK_OLD	0x003c0000</div><div class='del'>-						/* Regaddr Mask */</div><div class='del'>-#define MDIODATA_DEVADDR_SHF_OLD	22	/* Physmedia devaddr shift  */</div><div class='del'>-#define MDIODATA_DEVADDR_MASK_OLD	0x0fc00000</div><div class='del'>-						/* Physmedia devaddr Mask */</div><div class='del'>-</div><div class='del'>-/* Transactions flags */</div><div class='del'>-#define MDIODATA_WRITE			0x10000000</div><div class='del'>-#define MDIODATA_READ			0x20000000</div><div class='del'>-#define MDIODATA_START			0x40000000</div><div class='del'>-</div><div class='del'>-#define MDIODATA_DEV_ADDR		0x0	/* dev address for serdes */</div><div class='del'>-#define	MDIODATA_BLK_ADDR		0x1F	/* blk address for serdes */</div><div class='del'>-</div><div class='del'>-/* serdes regs (rev &lt; 10) */</div><div class='del'>-#define MDIODATA_DEV_PLL		0x1d	/* SERDES PLL Dev */</div><div class='del'>-#define MDIODATA_DEV_TX			0x1e	/* SERDES TX Dev */</div><div class='del'>-#define MDIODATA_DEV_RX			0x1f	/* SERDES RX Dev */</div><div class='del'>-</div><div class='del'>-/* SERDES RX registers */</div><div class='del'>-#define SERDES_RX_CTRL			1	/* Rx cntrl */</div><div class='del'>-#define SERDES_RX_TIMER1		2	/* Rx Timer1 */</div><div class='del'>-#define SERDES_RX_CDR			6	/* CDR */</div><div class='del'>-#define SERDES_RX_CDRBW			7	/* CDR BW */</div><div class='del'>-/* SERDES RX control register */</div><div class='del'>-#define SERDES_RX_CTRL_FORCE		0x80	/* rxpolarity_force */</div><div class='del'>-#define SERDES_RX_CTRL_POLARITY		0x40	/* rxpolarity_value */</div><div class='del'>-</div><div class='del'>-/* SERDES PLL registers */</div><div class='del'>-#define SERDES_PLL_CTRL                 1	/* PLL control reg */</div><div class='del'>-#define PLL_CTRL_FREQDET_EN             0x4000	/* bit 14 is FREQDET on */</div><div class='del'>-</div><div class='del'>-/* Linkcontrol reg offset in PCIE Cap */</div><div class='del'>-#define PCIE_CAP_LINKCTRL_OFFSET	16	/* offset in pcie cap */</div><div class='del'>-#define PCIE_CAP_LCREG_ASPML0s		0x01	/* ASPM L0s in linkctrl */</div><div class='del'>-#define PCIE_CAP_LCREG_ASPML1		0x02	/* ASPM L1 in linkctrl */</div><div class='del'>-#define PCIE_CLKREQ_ENAB		0x100	/* CLKREQ Enab in linkctrl */</div><div class='del'>-</div><div class='del'>-#define PCIE_ASPM_ENAB			3	/* ASPM L0s &amp; L1 in linkctrl */</div><div class='del'>-#define PCIE_ASPM_L1_ENAB		2	/* ASPM L0s &amp; L1 in linkctrl */</div><div class='del'>-#define PCIE_ASPM_L0s_ENAB		1	/* ASPM L0s &amp; L1 in linkctrl */</div><div class='del'>-#define PCIE_ASPM_DISAB			0	/* ASPM L0s &amp; L1 in linkctrl */</div><div class='del'>-</div><div class='del'>-/* Power management threshold */</div><div class='del'>-#define PCIE_L1THRESHOLDTIME_MASK       0xFF00	/* bits 8 - 15 */</div><div class='del'>-#define PCIE_L1THRESHOLDTIME_SHIFT      8	/* PCIE_L1THRESHOLDTIME_SHIFT */</div><div class='del'>-#define PCIE_L1THRESHOLD_WARVAL         0x72	/* WAR value */</div><div class='del'>-#define PCIE_ASPMTIMER_EXTEND		0x01000000</div><div class='del'>-						/* &gt; rev7:</div><div class='del'>-						 * enable extend ASPM timer</div><div class='del'>-						 */</div><div class='del'>-</div><div class='del'>-/* different register spaces to access thru pcie indirect access */</div><div class='del'>-#define PCIE_CONFIGREGS		1	/* Access to config space */</div><div class='del'>-#define PCIE_PCIEREGS		2	/* Access to pcie registers */</div><div class='del'>-</div><div class='del'>-/* PCIE protocol PHY diagnostic registers */</div><div class='del'>-#define	PCIE_PLP_STATUSREG		0x204	/* Status */</div><div class='del'>-</div><div class='del'>-/* Status reg PCIE_PLP_STATUSREG */</div><div class='del'>-#define PCIE_PLP_POLARITYINV_STAT	0x10</div><div class='del'>-</div><div class='del'>-/* PCIE protocol DLLP diagnostic registers */</div><div class='del'>-#define PCIE_DLLP_LCREG			0x100	/* Link Control */</div><div class='del'>-#define PCIE_DLLP_PMTHRESHREG		0x128	/* Power Management Threshold */</div><div class='del'>-</div><div class='del'>-/* PCIE protocol TLP diagnostic registers */</div><div class='del'>-#define PCIE_TLP_WORKAROUNDSREG		0x004	/* TLP Workarounds */</div><div class='del'>-</div><div class='del'>-/* Sonics to PCI translation types */</div><div class='del'>-#define	SBTOPCI_PREF	0x4		/* prefetch enable */</div><div class='del'>-#define	SBTOPCI_BURST	0x8		/* burst enable */</div><div class='del'>-#define	SBTOPCI_RC_READMULTI	0x20	/* memory read multiple */</div><div class='del'>-</div><div class='del'>-#define PCI_CLKRUN_DSBL	0x8000	/* Bit 15 forceClkrun */</div><div class='del'>-</div><div class='del'>-/* PCI core index in SROM shadow area */</div><div class='del'>-#define SRSH_PI_OFFSET	0	/* first word */</div><div class='del'>-#define SRSH_PI_MASK	0xf000	/* bit 15:12 */</div><div class='del'>-#define SRSH_PI_SHIFT	12	/* bit 15:12 */</div><div class='del'>-</div><div class='del'>-#define PCIREGOFFS(field)	offsetof(struct sbpciregs, field)</div><div class='del'>-#define PCIEREGOFFS(field)	offsetof(struct sbpcieregs, field)</div><div class='del'>-</div><div class='del'>-/* Sonics side: PCI core and host control registers */</div><div class='del'>-struct sbpciregs {</div><div class='del'>-	u32 control;		/* PCI control */</div><div class='del'>-	u32 PAD[3];</div><div class='del'>-	u32 arbcontrol;		/* PCI arbiter control */</div><div class='del'>-	u32 clkrun;		/* Clkrun Control (&gt;=rev11) */</div><div class='del'>-	u32 PAD[2];</div><div class='del'>-	u32 intstatus;		/* Interrupt status */</div><div class='del'>-	u32 intmask;		/* Interrupt mask */</div><div class='del'>-	u32 sbtopcimailbox;	/* Sonics to PCI mailbox */</div><div class='del'>-	u32 PAD[9];</div><div class='del'>-	u32 bcastaddr;		/* Sonics broadcast address */</div><div class='del'>-	u32 bcastdata;		/* Sonics broadcast data */</div><div class='del'>-	u32 PAD[2];</div><div class='del'>-	u32 gpioin;		/* ro: gpio input (&gt;=rev2) */</div><div class='del'>-	u32 gpioout;		/* rw: gpio output (&gt;=rev2) */</div><div class='del'>-	u32 gpioouten;		/* rw: gpio output enable (&gt;= rev2) */</div><div class='del'>-	u32 gpiocontrol;	/* rw: gpio control (&gt;= rev2) */</div><div class='del'>-	u32 PAD[36];</div><div class='del'>-	u32 sbtopci0;		/* Sonics to PCI translation 0 */</div><div class='del'>-	u32 sbtopci1;		/* Sonics to PCI translation 1 */</div><div class='del'>-	u32 sbtopci2;		/* Sonics to PCI translation 2 */</div><div class='del'>-	u32 PAD[189];</div><div class='del'>-	u32 pcicfg[4][64];	/* 0x400 - 0x7FF, PCI Cfg Space (&gt;=rev8) */</div><div class='del'>-	u16 sprom[36];		/* SPROM shadow Area */</div><div class='del'>-	u32 PAD[46];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* SB side: PCIE core and host control registers */</div><div class='del'>-struct sbpcieregs {</div><div class='del'>-	u32 control;		/* host mode only */</div><div class='del'>-	u32 PAD[2];</div><div class='del'>-	u32 biststatus;		/* bist Status: 0x00C */</div><div class='del'>-	u32 gpiosel;		/* PCIE gpio sel: 0x010 */</div><div class='del'>-	u32 gpioouten;		/* PCIE gpio outen: 0x14 */</div><div class='del'>-	u32 PAD[2];</div><div class='del'>-	u32 intstatus;		/* Interrupt status: 0x20 */</div><div class='del'>-	u32 intmask;		/* Interrupt mask: 0x24 */</div><div class='del'>-	u32 sbtopcimailbox;	/* sb to pcie mailbox: 0x028 */</div><div class='del'>-	u32 PAD[53];</div><div class='del'>-	u32 sbtopcie0;		/* sb to pcie translation 0: 0x100 */</div><div class='del'>-	u32 sbtopcie1;		/* sb to pcie translation 1: 0x104 */</div><div class='del'>-	u32 sbtopcie2;		/* sb to pcie translation 2: 0x108 */</div><div class='del'>-	u32 PAD[5];</div><div class='del'>-</div><div class='del'>-	/* pcie core supports in direct access to config space */</div><div class='del'>-	u32 configaddr;	/* pcie config space access: Address field: 0x120 */</div><div class='del'>-	u32 configdata;	/* pcie config space access: Data field: 0x124 */</div><div class='del'>-</div><div class='del'>-	/* mdio access to serdes */</div><div class='del'>-	u32 mdiocontrol;	/* controls the mdio access: 0x128 */</div><div class='del'>-	u32 mdiodata;		/* Data to the mdio access: 0x12c */</div><div class='del'>-</div><div class='del'>-	/* pcie protocol phy/dllp/tlp register indirect access mechanism */</div><div class='del'>-	u32 pcieindaddr;	/* indirect access to</div><div class='del'>-				 * the internal register: 0x130</div><div class='del'>-				 */</div><div class='del'>-	u32 pcieinddata;	/* Data to/from the internal regsiter: 0x134 */</div><div class='del'>-</div><div class='del'>-	u32 clkreqenctrl;	/* &gt;= rev 6, Clkreq rdma control : 0x138 */</div><div class='del'>-	u32 PAD[177];</div><div class='del'>-	u32 pciecfg[4][64];	/* 0x400 - 0x7FF, PCIE Cfg Space */</div><div class='del'>-	u16 sprom[64];		/* SPROM shadow Area */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pcicore_info {</div><div class='del'>-	struct bcma_device *core;</div><div class='del'>-	struct si_pub *sih;	/* System interconnect handle */</div><div class='del'>-	struct pci_dev *dev;</div><div class='del'>-	u8 pciecap_lcreg_offset;/* PCIE capability LCreg offset</div><div class='del'>-				 * in the config space</div><div class='del'>-				 */</div><div class='del'>-	bool pcie_pr42767;</div><div class='del'>-	u8 pcie_polarity;</div><div class='del'>-	u8 pcie_war_aspm_ovr;	/* Override ASPM/Clkreq settings */</div><div class='del'>-</div><div class='del'>-	u8 pmecap_offset;	/* PM Capability offset in the config space */</div><div class='del'>-	bool pmecap;		/* Capable of generating PME */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define PCIE_ASPM(sih)							\</div><div class='del'>-	((ai_get_buscoretype(sih) == PCIE_CORE_ID) &amp;&amp;			\</div><div class='del'>-	 ((ai_get_buscorerev(sih) &gt;= 3) &amp;&amp;				\</div><div class='del'>-	  (ai_get_buscorerev(sih) &lt;= 5)))</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* delay needed between the mdio control/ mdiodata register data access */</div><div class='del'>-static void pr28829_delay(void)</div><div class='del'>-{</div><div class='del'>-	udelay(10);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Initialize the PCI core.</div><div class='del'>- * It's caller's responsibility to make sure that this is done only once</div><div class='del'>- */</div><div class='del'>-struct pcicore_info *pcicore_init(struct si_pub *sih, struct bcma_device *core)</div><div class='del'>-{</div><div class='del'>-	struct pcicore_info *pi;</div><div class='del'>-</div><div class='del'>-	/* alloc struct pcicore_info */</div><div class='del'>-	pi = kzalloc(sizeof(struct pcicore_info), GFP_ATOMIC);</div><div class='del'>-	if (pi == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	pi-&gt;sih = sih;</div><div class='del'>-	pi-&gt;dev = core-&gt;bus-&gt;host_pci;</div><div class='del'>-	pi-&gt;core = core;</div><div class='del'>-</div><div class='del'>-	if (core-&gt;id.id == PCIE_CORE_ID) {</div><div class='del'>-		u8 cap_ptr;</div><div class='del'>-		cap_ptr = pcicore_find_pci_capability(pi-&gt;dev, PCI_CAP_ID_EXP,</div><div class='del'>-						      NULL, NULL);</div><div class='del'>-		pi-&gt;pciecap_lcreg_offset = cap_ptr + PCIE_CAP_LINKCTRL_OFFSET;</div><div class='del'>-	}</div><div class='del'>-	return pi;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pcicore_deinit(struct pcicore_info *pch)</div><div class='del'>-{</div><div class='del'>-	kfree(pch);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* return cap_offset if requested capability exists in the PCI config space */</div><div class='del'>-/* Note that it's caller's responsibility to make sure it's a pci bus */</div><div class='del'>-u8</div><div class='del'>-pcicore_find_pci_capability(struct pci_dev *dev, u8 req_cap_id,</div><div class='del'>-			    unsigned char *buf, u32 *buflen)</div><div class='del'>-{</div><div class='del'>-	u8 cap_id;</div><div class='del'>-	u8 cap_ptr = 0;</div><div class='del'>-	u32 bufsize;</div><div class='del'>-	u8 byte_val;</div><div class='del'>-</div><div class='del'>-	/* check for Header type 0 */</div><div class='del'>-	pci_read_config_byte(dev, PCI_HEADER_TYPE, &amp;byte_val);</div><div class='del'>-	if ((byte_val &amp; 0x7f) != PCI_HEADER_TYPE_NORMAL)</div><div class='del'>-		goto end;</div><div class='del'>-</div><div class='del'>-	/* check if the capability pointer field exists */</div><div class='del'>-	pci_read_config_byte(dev, PCI_STATUS, &amp;byte_val);</div><div class='del'>-	if (!(byte_val &amp; PCI_STATUS_CAP_LIST))</div><div class='del'>-		goto end;</div><div class='del'>-</div><div class='del'>-	pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &amp;cap_ptr);</div><div class='del'>-	/* check if the capability pointer is 0x00 */</div><div class='del'>-	if (cap_ptr == 0x00)</div><div class='del'>-		goto end;</div><div class='del'>-</div><div class='del'>-	/* loop thru the capability list</div><div class='del'>-	 * and see if the pcie capability exists</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	pci_read_config_byte(dev, cap_ptr, &amp;cap_id);</div><div class='del'>-</div><div class='del'>-	while (cap_id != req_cap_id) {</div><div class='del'>-		pci_read_config_byte(dev, cap_ptr + 1, &amp;cap_ptr);</div><div class='del'>-		if (cap_ptr == 0x00)</div><div class='del'>-			break;</div><div class='del'>-		pci_read_config_byte(dev, cap_ptr, &amp;cap_id);</div><div class='del'>-	}</div><div class='del'>-	if (cap_id != req_cap_id)</div><div class='del'>-		goto end;</div><div class='del'>-</div><div class='del'>-	/* found the caller requested capability */</div><div class='del'>-	if (buf != NULL &amp;&amp; buflen != NULL) {</div><div class='del'>-		u8 cap_data;</div><div class='del'>-</div><div class='del'>-		bufsize = *buflen;</div><div class='del'>-		if (!bufsize)</div><div class='del'>-			goto end;</div><div class='del'>-		*buflen = 0;</div><div class='del'>-		/* copy the capability data excluding cap ID and next ptr */</div><div class='del'>-		cap_data = cap_ptr + 2;</div><div class='del'>-		if ((bufsize + cap_data) &gt; PCI_SZPCR)</div><div class='del'>-			bufsize = PCI_SZPCR - cap_data;</div><div class='del'>-		*buflen = bufsize;</div><div class='del'>-		while (bufsize--) {</div><div class='del'>-			pci_read_config_byte(dev, cap_data, buf);</div><div class='del'>-			cap_data++;</div><div class='del'>-			buf++;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-end:</div><div class='del'>-	return cap_ptr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* ***** Register Access API */</div><div class='del'>-static uint</div><div class='del'>-pcie_readreg(struct bcma_device *core, uint addrtype, uint offset)</div><div class='del'>-{</div><div class='del'>-	uint retval = 0xFFFFFFFF;</div><div class='del'>-</div><div class='del'>-	switch (addrtype) {</div><div class='del'>-	case PCIE_CONFIGREGS:</div><div class='del'>-		bcma_write32(core, PCIEREGOFFS(configaddr), offset);</div><div class='del'>-		(void)bcma_read32(core, PCIEREGOFFS(configaddr));</div><div class='del'>-		retval = bcma_read32(core, PCIEREGOFFS(configdata));</div><div class='del'>-		break;</div><div class='del'>-	case PCIE_PCIEREGS:</div><div class='del'>-		bcma_write32(core, PCIEREGOFFS(pcieindaddr), offset);</div><div class='del'>-		(void)bcma_read32(core, PCIEREGOFFS(pcieindaddr));</div><div class='del'>-		retval = bcma_read32(core, PCIEREGOFFS(pcieinddata));</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static uint pcie_writereg(struct bcma_device *core, uint addrtype,</div><div class='del'>-			  uint offset, uint val)</div><div class='del'>-{</div><div class='del'>-	switch (addrtype) {</div><div class='del'>-	case PCIE_CONFIGREGS:</div><div class='del'>-		bcma_write32(core, PCIEREGOFFS(configaddr), offset);</div><div class='del'>-		bcma_write32(core, PCIEREGOFFS(configdata), val);</div><div class='del'>-		break;</div><div class='del'>-	case PCIE_PCIEREGS:</div><div class='del'>-		bcma_write32(core, PCIEREGOFFS(pcieindaddr), offset);</div><div class='del'>-		bcma_write32(core, PCIEREGOFFS(pcieinddata), val);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool pcie_mdiosetblock(struct pcicore_info *pi, uint blk)</div><div class='del'>-{</div><div class='del'>-	uint mdiodata, i = 0;</div><div class='del'>-	uint pcie_serdes_spinwait = 200;</div><div class='del'>-</div><div class='del'>-	mdiodata = (MDIODATA_START | MDIODATA_WRITE | MDIODATA_TA |</div><div class='del'>-		    (MDIODATA_DEV_ADDR &lt;&lt; MDIODATA_DEVADDR_SHF) |</div><div class='del'>-		    (MDIODATA_BLK_ADDR &lt;&lt; MDIODATA_REGADDR_SHF) |</div><div class='del'>-		    (blk &lt;&lt; 4));</div><div class='del'>-	bcma_write32(pi-&gt;core, PCIEREGOFFS(mdiodata), mdiodata);</div><div class='del'>-</div><div class='del'>-	pr28829_delay();</div><div class='del'>-	/* retry till the transaction is complete */</div><div class='del'>-	while (i &lt; pcie_serdes_spinwait) {</div><div class='del'>-		if (bcma_read32(pi-&gt;core, PCIEREGOFFS(mdiocontrol)) &amp;</div><div class='del'>-		    MDIOCTL_ACCESS_DONE)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		udelay(1000);</div><div class='del'>-		i++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i &gt;= pcie_serdes_spinwait)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-pcie_mdioop(struct pcicore_info *pi, uint physmedia, uint regaddr, bool write,</div><div class='del'>-	    uint *val)</div><div class='del'>-{</div><div class='del'>-	uint mdiodata;</div><div class='del'>-	uint i = 0;</div><div class='del'>-	uint pcie_serdes_spinwait = 10;</div><div class='del'>-</div><div class='del'>-	/* enable mdio access to SERDES */</div><div class='del'>-	bcma_write32(pi-&gt;core, PCIEREGOFFS(mdiocontrol),</div><div class='del'>-		     MDIOCTL_PREAM_EN | MDIOCTL_DIVISOR_VAL);</div><div class='del'>-</div><div class='del'>-	if (ai_get_buscorerev(pi-&gt;sih) &gt;= 10) {</div><div class='del'>-		/* new serdes is slower in rw,</div><div class='del'>-		 * using two layers of reg address mapping</div><div class='del'>-		 */</div><div class='del'>-		if (!pcie_mdiosetblock(pi, physmedia))</div><div class='del'>-			return 1;</div><div class='del'>-		mdiodata = ((MDIODATA_DEV_ADDR &lt;&lt; MDIODATA_DEVADDR_SHF) |</div><div class='del'>-			    (regaddr &lt;&lt; MDIODATA_REGADDR_SHF));</div><div class='del'>-		pcie_serdes_spinwait *= 20;</div><div class='del'>-	} else {</div><div class='del'>-		mdiodata = ((physmedia &lt;&lt; MDIODATA_DEVADDR_SHF_OLD) |</div><div class='del'>-			    (regaddr &lt;&lt; MDIODATA_REGADDR_SHF_OLD));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!write)</div><div class='del'>-		mdiodata |= (MDIODATA_START | MDIODATA_READ | MDIODATA_TA);</div><div class='del'>-	else</div><div class='del'>-		mdiodata |= (MDIODATA_START | MDIODATA_WRITE | MDIODATA_TA |</div><div class='del'>-			     *val);</div><div class='del'>-</div><div class='del'>-	bcma_write32(pi-&gt;core, PCIEREGOFFS(mdiodata), mdiodata);</div><div class='del'>-</div><div class='del'>-	pr28829_delay();</div><div class='del'>-</div><div class='del'>-	/* retry till the transaction is complete */</div><div class='del'>-	while (i &lt; pcie_serdes_spinwait) {</div><div class='del'>-		if (bcma_read32(pi-&gt;core, PCIEREGOFFS(mdiocontrol)) &amp;</div><div class='del'>-		    MDIOCTL_ACCESS_DONE) {</div><div class='del'>-			if (!write) {</div><div class='del'>-				pr28829_delay();</div><div class='del'>-				*val = (bcma_read32(pi-&gt;core,</div><div class='del'>-						    PCIEREGOFFS(mdiodata)) &amp;</div><div class='del'>-					MDIODATA_MASK);</div><div class='del'>-			}</div><div class='del'>-			/* Disable mdio access to SERDES */</div><div class='del'>-			bcma_write32(pi-&gt;core, PCIEREGOFFS(mdiocontrol), 0);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		udelay(1000);</div><div class='del'>-		i++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Timed out. Disable mdio access to SERDES. */</div><div class='del'>-	bcma_write32(pi-&gt;core, PCIEREGOFFS(mdiocontrol), 0);</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* use the mdio interface to read from mdio slaves */</div><div class='del'>-static int</div><div class='del'>-pcie_mdioread(struct pcicore_info *pi, uint physmedia, uint regaddr,</div><div class='del'>-	      uint *regval)</div><div class='del'>-{</div><div class='del'>-	return pcie_mdioop(pi, physmedia, regaddr, false, regval);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* use the mdio interface to write to mdio slaves */</div><div class='del'>-static int</div><div class='del'>-pcie_mdiowrite(struct pcicore_info *pi, uint physmedia, uint regaddr, uint val)</div><div class='del'>-{</div><div class='del'>-	return pcie_mdioop(pi, physmedia, regaddr, true, &amp;val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* ***** Support functions ***** */</div><div class='del'>-static u8 pcie_clkreq(struct pcicore_info *pi, u32 mask, u32 val)</div><div class='del'>-{</div><div class='del'>-	u32 reg_val;</div><div class='del'>-	u8 offset;</div><div class='del'>-</div><div class='del'>-	offset = pi-&gt;pciecap_lcreg_offset;</div><div class='del'>-	if (!offset)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	pci_read_config_dword(pi-&gt;dev, offset, &amp;reg_val);</div><div class='del'>-	/* set operation */</div><div class='del'>-	if (mask) {</div><div class='del'>-		if (val)</div><div class='del'>-			reg_val |= PCIE_CLKREQ_ENAB;</div><div class='del'>-		else</div><div class='del'>-			reg_val &amp;= ~PCIE_CLKREQ_ENAB;</div><div class='del'>-		pci_write_config_dword(pi-&gt;dev, offset, reg_val);</div><div class='del'>-		pci_read_config_dword(pi-&gt;dev, offset, &amp;reg_val);</div><div class='del'>-	}</div><div class='del'>-	if (reg_val &amp; PCIE_CLKREQ_ENAB)</div><div class='del'>-		return 1;</div><div class='del'>-	else</div><div class='del'>-		return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pcie_extendL1timer(struct pcicore_info *pi, bool extend)</div><div class='del'>-{</div><div class='del'>-	u32 w;</div><div class='del'>-	struct si_pub *sih = pi-&gt;sih;</div><div class='del'>-</div><div class='del'>-	if (ai_get_buscoretype(sih) != PCIE_CORE_ID ||</div><div class='del'>-	    ai_get_buscorerev(sih) &lt; 7)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	w = pcie_readreg(pi-&gt;core, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG);</div><div class='del'>-	if (extend)</div><div class='del'>-		w |= PCIE_ASPMTIMER_EXTEND;</div><div class='del'>-	else</div><div class='del'>-		w &amp;= ~PCIE_ASPMTIMER_EXTEND;</div><div class='del'>-	pcie_writereg(pi-&gt;core, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG, w);</div><div class='del'>-	w = pcie_readreg(pi-&gt;core, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* centralized clkreq control policy */</div><div class='del'>-static void pcie_clkreq_upd(struct pcicore_info *pi, uint state)</div><div class='del'>-{</div><div class='del'>-	struct si_pub *sih = pi-&gt;sih;</div><div class='del'>-</div><div class='del'>-	switch (state) {</div><div class='del'>-	case SI_DOATTACH:</div><div class='del'>-		if (PCIE_ASPM(sih))</div><div class='del'>-			pcie_clkreq(pi, 1, 0);</div><div class='del'>-		break;</div><div class='del'>-	case SI_PCIDOWN:</div><div class='del'>-		/* turn on serdes PLL down */</div><div class='del'>-		if (ai_get_buscorerev(sih) == 6) {</div><div class='del'>-			ai_cc_reg(sih,</div><div class='del'>-				  offsetof(struct chipcregs, chipcontrol_addr),</div><div class='del'>-				  ~0, 0);</div><div class='del'>-			ai_cc_reg(sih,</div><div class='del'>-				  offsetof(struct chipcregs, chipcontrol_data),</div><div class='del'>-				  ~0x40, 0);</div><div class='del'>-		} else if (pi-&gt;pcie_pr42767) {</div><div class='del'>-			pcie_clkreq(pi, 1, 1);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case SI_PCIUP:</div><div class='del'>-		/* turn off serdes PLL down */</div><div class='del'>-		if (ai_get_buscorerev(sih) == 6) {</div><div class='del'>-			ai_cc_reg(sih,</div><div class='del'>-				  offsetof(struct chipcregs, chipcontrol_addr),</div><div class='del'>-				  ~0, 0);</div><div class='del'>-			ai_cc_reg(sih,</div><div class='del'>-				  offsetof(struct chipcregs, chipcontrol_data),</div><div class='del'>-				  ~0x40, 0x40);</div><div class='del'>-		} else if (PCIE_ASPM(sih)) {	/* disable clkreq */</div><div class='del'>-			pcie_clkreq(pi, 1, 0);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* ***** PCI core WARs ***** */</div><div class='del'>-/* Done only once at attach time */</div><div class='del'>-static void pcie_war_polarity(struct pcicore_info *pi)</div><div class='del'>-{</div><div class='del'>-	u32 w;</div><div class='del'>-</div><div class='del'>-	if (pi-&gt;pcie_polarity != 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	w = pcie_readreg(pi-&gt;core, PCIE_PCIEREGS, PCIE_PLP_STATUSREG);</div><div class='del'>-</div><div class='del'>-	/* Detect the current polarity at attach and force that polarity and</div><div class='del'>-	 * disable changing the polarity</div><div class='del'>-	 */</div><div class='del'>-	if ((w &amp; PCIE_PLP_POLARITYINV_STAT) == 0)</div><div class='del'>-		pi-&gt;pcie_polarity = SERDES_RX_CTRL_FORCE;</div><div class='del'>-	else</div><div class='del'>-		pi-&gt;pcie_polarity = (SERDES_RX_CTRL_FORCE |</div><div class='del'>-				     SERDES_RX_CTRL_POLARITY);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* enable ASPM and CLKREQ if srom doesn't have it */</div><div class='del'>-/* Needs to happen when update to shadow SROM is needed</div><div class='del'>- *   : Coming out of 'standby'/'hibernate'</div><div class='del'>- *   : If pcie_war_aspm_ovr state changed</div><div class='del'>- */</div><div class='del'>-static void pcie_war_aspm_clkreq(struct pcicore_info *pi)</div><div class='del'>-{</div><div class='del'>-	struct si_pub *sih = pi-&gt;sih;</div><div class='del'>-	u16 val16;</div><div class='del'>-	u32 w;</div><div class='del'>-</div><div class='del'>-	if (!PCIE_ASPM(sih))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* bypass this on QT or VSIM */</div><div class='del'>-	val16 = bcma_read16(pi-&gt;core, PCIEREGOFFS(sprom[SRSH_ASPM_OFFSET]));</div><div class='del'>-</div><div class='del'>-	val16 &amp;= ~SRSH_ASPM_ENB;</div><div class='del'>-	if (pi-&gt;pcie_war_aspm_ovr == PCIE_ASPM_ENAB)</div><div class='del'>-		val16 |= SRSH_ASPM_ENB;</div><div class='del'>-	else if (pi-&gt;pcie_war_aspm_ovr == PCIE_ASPM_L1_ENAB)</div><div class='del'>-		val16 |= SRSH_ASPM_L1_ENB;</div><div class='del'>-	else if (pi-&gt;pcie_war_aspm_ovr == PCIE_ASPM_L0s_ENAB)</div><div class='del'>-		val16 |= SRSH_ASPM_L0s_ENB;</div><div class='del'>-</div><div class='del'>-	bcma_write16(pi-&gt;core, PCIEREGOFFS(sprom[SRSH_ASPM_OFFSET]), val16);</div><div class='del'>-</div><div class='del'>-	pci_read_config_dword(pi-&gt;dev, pi-&gt;pciecap_lcreg_offset, &amp;w);</div><div class='del'>-	w &amp;= ~PCIE_ASPM_ENAB;</div><div class='del'>-	w |= pi-&gt;pcie_war_aspm_ovr;</div><div class='del'>-	pci_write_config_dword(pi-&gt;dev, pi-&gt;pciecap_lcreg_offset, w);</div><div class='del'>-</div><div class='del'>-	val16 = bcma_read16(pi-&gt;core,</div><div class='del'>-			    PCIEREGOFFS(sprom[SRSH_CLKREQ_OFFSET_REV5]));</div><div class='del'>-</div><div class='del'>-	if (pi-&gt;pcie_war_aspm_ovr != PCIE_ASPM_DISAB) {</div><div class='del'>-		val16 |= SRSH_CLKREQ_ENB;</div><div class='del'>-		pi-&gt;pcie_pr42767 = true;</div><div class='del'>-	} else</div><div class='del'>-		val16 &amp;= ~SRSH_CLKREQ_ENB;</div><div class='del'>-</div><div class='del'>-	bcma_write16(pi-&gt;core, PCIEREGOFFS(sprom[SRSH_CLKREQ_OFFSET_REV5]),</div><div class='del'>-		     val16);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Apply the polarity determined at the start */</div><div class='del'>-/* Needs to happen when coming out of 'standby'/'hibernate' */</div><div class='del'>-static void pcie_war_serdes(struct pcicore_info *pi)</div><div class='del'>-{</div><div class='del'>-	u32 w = 0;</div><div class='del'>-</div><div class='del'>-	if (pi-&gt;pcie_polarity != 0)</div><div class='del'>-		pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_CTRL,</div><div class='del'>-			       pi-&gt;pcie_polarity);</div><div class='del'>-</div><div class='del'>-	pcie_mdioread(pi, MDIODATA_DEV_PLL, SERDES_PLL_CTRL, &amp;w);</div><div class='del'>-	if (w &amp; PLL_CTRL_FREQDET_EN) {</div><div class='del'>-		w &amp;= ~PLL_CTRL_FREQDET_EN;</div><div class='del'>-		pcie_mdiowrite(pi, MDIODATA_DEV_PLL, SERDES_PLL_CTRL, w);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Fix MISC config to allow coming out of L2/L3-Ready state w/o PRST */</div><div class='del'>-/* Needs to happen when coming out of 'standby'/'hibernate' */</div><div class='del'>-static void pcie_misc_config_fixup(struct pcicore_info *pi)</div><div class='del'>-{</div><div class='del'>-	u16 val16;</div><div class='del'>-</div><div class='del'>-	val16 = bcma_read16(pi-&gt;core,</div><div class='del'>-			    PCIEREGOFFS(sprom[SRSH_PCIE_MISC_CONFIG]));</div><div class='del'>-</div><div class='del'>-	if ((val16 &amp; SRSH_L23READY_EXIT_NOPERST) == 0) {</div><div class='del'>-		val16 |= SRSH_L23READY_EXIT_NOPERST;</div><div class='del'>-		bcma_write16(pi-&gt;core,</div><div class='del'>-			     PCIEREGOFFS(sprom[SRSH_PCIE_MISC_CONFIG]), val16);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* quick hack for testing */</div><div class='del'>-/* Needs to happen when coming out of 'standby'/'hibernate' */</div><div class='del'>-static void pcie_war_noplldown(struct pcicore_info *pi)</div><div class='del'>-{</div><div class='del'>-	/* turn off serdes PLL down */</div><div class='del'>-	ai_cc_reg(pi-&gt;sih, offsetof(struct chipcregs, chipcontrol),</div><div class='del'>-		  CHIPCTRL_4321_PLL_DOWN, CHIPCTRL_4321_PLL_DOWN);</div><div class='del'>-</div><div class='del'>-	/* clear srom shadow backdoor */</div><div class='del'>-	bcma_write16(pi-&gt;core, PCIEREGOFFS(sprom[SRSH_BD_OFFSET]), 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Needs to happen when coming out of 'standby'/'hibernate' */</div><div class='del'>-static void pcie_war_pci_setup(struct pcicore_info *pi)</div><div class='del'>-{</div><div class='del'>-	struct si_pub *sih = pi-&gt;sih;</div><div class='del'>-	u32 w;</div><div class='del'>-</div><div class='del'>-	if (ai_get_buscorerev(sih) == 0 || ai_get_buscorerev(sih) == 1) {</div><div class='del'>-		w = pcie_readreg(pi-&gt;core, PCIE_PCIEREGS,</div><div class='del'>-				 PCIE_TLP_WORKAROUNDSREG);</div><div class='del'>-		w |= 0x8;</div><div class='del'>-		pcie_writereg(pi-&gt;core, PCIE_PCIEREGS,</div><div class='del'>-			      PCIE_TLP_WORKAROUNDSREG, w);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ai_get_buscorerev(sih) == 1) {</div><div class='del'>-		w = pcie_readreg(pi-&gt;core, PCIE_PCIEREGS, PCIE_DLLP_LCREG);</div><div class='del'>-		w |= 0x40;</div><div class='del'>-		pcie_writereg(pi-&gt;core, PCIE_PCIEREGS, PCIE_DLLP_LCREG, w);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ai_get_buscorerev(sih) == 0) {</div><div class='del'>-		pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_TIMER1, 0x8128);</div><div class='del'>-		pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_CDR, 0x0100);</div><div class='del'>-		pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_CDRBW, 0x1466);</div><div class='del'>-	} else if (PCIE_ASPM(sih)) {</div><div class='del'>-		/* Change the L1 threshold for better performance */</div><div class='del'>-		w = pcie_readreg(pi-&gt;core, PCIE_PCIEREGS,</div><div class='del'>-				 PCIE_DLLP_PMTHRESHREG);</div><div class='del'>-		w &amp;= ~PCIE_L1THRESHOLDTIME_MASK;</div><div class='del'>-		w |= PCIE_L1THRESHOLD_WARVAL &lt;&lt; PCIE_L1THRESHOLDTIME_SHIFT;</div><div class='del'>-		pcie_writereg(pi-&gt;core, PCIE_PCIEREGS,</div><div class='del'>-			      PCIE_DLLP_PMTHRESHREG, w);</div><div class='del'>-</div><div class='del'>-		pcie_war_serdes(pi);</div><div class='del'>-</div><div class='del'>-		pcie_war_aspm_clkreq(pi);</div><div class='del'>-	} else if (ai_get_buscorerev(pi-&gt;sih) == 7)</div><div class='del'>-		pcie_war_noplldown(pi);</div><div class='del'>-</div><div class='del'>-	/* Note that the fix is actually in the SROM,</div><div class='del'>-	 * that's why this is open-ended</div><div class='del'>-	 */</div><div class='del'>-	if (ai_get_buscorerev(pi-&gt;sih) &gt;= 6)</div><div class='del'>-		pcie_misc_config_fixup(pi);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* ***** Functions called during driver state changes ***** */</div><div class='del'>-void pcicore_attach(struct pcicore_info *pi, int state)</div><div class='del'>-{</div><div class='del'>-	struct si_pub *sih = pi-&gt;sih;</div><div class='del'>-	u32 bfl2 = (u32)getintvar(sih, BRCMS_SROM_BOARDFLAGS2);</div><div class='del'>-</div><div class='del'>-	/* Determine if this board needs override */</div><div class='del'>-	if (PCIE_ASPM(sih)) {</div><div class='del'>-		if (bfl2 &amp; BFL2_PCIEWAR_OVR)</div><div class='del'>-			pi-&gt;pcie_war_aspm_ovr = PCIE_ASPM_DISAB;</div><div class='del'>-		else</div><div class='del'>-			pi-&gt;pcie_war_aspm_ovr = PCIE_ASPM_ENAB;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* These need to happen in this order only */</div><div class='del'>-	pcie_war_polarity(pi);</div><div class='del'>-</div><div class='del'>-	pcie_war_serdes(pi);</div><div class='del'>-</div><div class='del'>-	pcie_war_aspm_clkreq(pi);</div><div class='del'>-</div><div class='del'>-	pcie_clkreq_upd(pi, state);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pcicore_hwup(struct pcicore_info *pi)</div><div class='del'>-{</div><div class='del'>-	if (!pi || ai_get_buscoretype(pi-&gt;sih) != PCIE_CORE_ID)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	pcie_war_pci_setup(pi);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pcicore_up(struct pcicore_info *pi, int state)</div><div class='del'>-{</div><div class='del'>-	if (!pi || ai_get_buscoretype(pi-&gt;sih) != PCIE_CORE_ID)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Restore L1 timer for better performance */</div><div class='del'>-	pcie_extendL1timer(pi, true);</div><div class='del'>-</div><div class='del'>-	pcie_clkreq_upd(pi, state);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* When the device is going to enter D3 state</div><div class='del'>- * (or the system is going to enter S3/S4 states)</div><div class='del'>- */</div><div class='del'>-void pcicore_sleep(struct pcicore_info *pi)</div><div class='del'>-{</div><div class='del'>-	u32 w;</div><div class='del'>-</div><div class='del'>-	if (!pi || !PCIE_ASPM(pi-&gt;sih))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	pci_read_config_dword(pi-&gt;dev, pi-&gt;pciecap_lcreg_offset, &amp;w);</div><div class='del'>-	w &amp;= ~PCIE_CAP_LCREG_ASPML1;</div><div class='del'>-	pci_write_config_dword(pi-&gt;dev, pi-&gt;pciecap_lcreg_offset, w);</div><div class='del'>-</div><div class='del'>-	pi-&gt;pcie_pr42767 = false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pcicore_down(struct pcicore_info *pi, int state)</div><div class='del'>-{</div><div class='del'>-	if (!pi || ai_get_buscoretype(pi-&gt;sih) != PCIE_CORE_ID)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	pcie_clkreq_upd(pi, state);</div><div class='del'>-</div><div class='del'>-	/* Reduce L1 timer for better power savings */</div><div class='del'>-	pcie_extendL1timer(pi, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pcicore_fixcfg(struct pcicore_info *pi)</div><div class='del'>-{</div><div class='del'>-	struct bcma_device *core = pi-&gt;core;</div><div class='del'>-	u16 val16;</div><div class='del'>-	uint regoff;</div><div class='del'>-</div><div class='del'>-	switch (pi-&gt;core-&gt;id.id) {</div><div class='del'>-	case BCMA_CORE_PCI:</div><div class='del'>-		regoff = PCIREGOFFS(sprom[SRSH_PI_OFFSET]);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case BCMA_CORE_PCIE:</div><div class='del'>-		regoff = PCIEREGOFFS(sprom[SRSH_PI_OFFSET]);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	val16 = bcma_read16(pi-&gt;core, regoff);</div><div class='del'>-	if (((val16 &amp; SRSH_PI_MASK) &gt;&gt; SRSH_PI_SHIFT) !=</div><div class='del'>-	    (u16)core-&gt;core_index) {</div><div class='del'>-		val16 = ((u16)core-&gt;core_index &lt;&lt; SRSH_PI_SHIFT) |</div><div class='del'>-			(val16 &amp; ~SRSH_PI_MASK);</div><div class='del'>-		bcma_write16(pi-&gt;core, regoff, val16);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* precondition: current core is pci core */</div><div class='del'>-void</div><div class='del'>-pcicore_pci_setup(struct pcicore_info *pi)</div><div class='del'>-{</div><div class='del'>-	bcma_set32(pi-&gt;core, PCIREGOFFS(sbtopci2),</div><div class='del'>-		   SBTOPCI_PREF | SBTOPCI_BURST);</div><div class='del'>-</div><div class='del'>-	if (pi-&gt;core-&gt;id.rev &gt;= 11) {</div><div class='del'>-		bcma_set32(pi-&gt;core, PCIREGOFFS(sbtopci2),</div><div class='del'>-			   SBTOPCI_RC_READMULTI);</div><div class='del'>-		bcma_set32(pi-&gt;core, PCIREGOFFS(clkrun), PCI_CLKRUN_DSBL);</div><div class='del'>-		(void)bcma_read32(pi-&gt;core, PCIREGOFFS(clkrun));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/nicpci.h b/drivers/net/wireless/brcm80211/brcmsmac/nicpci.h<br/>deleted file mode 100644<br/>index 9fc3ead540a8..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/nicpci.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/nicpci.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,77 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2010 Broadcom Corporation</div><div class='del'>- *</div><div class='del'>- * Permission to use, copy, modify, and/or distribute this software for any</div><div class='del'>- * purpose with or without fee is hereby granted, provided that the above</div><div class='del'>- * copyright notice and this permission notice appear in all copies.</div><div class='del'>- *</div><div class='del'>- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='del'>- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='del'>- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY</div><div class='del'>- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='del'>- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION</div><div class='del'>- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN</div><div class='del'>- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef	_BRCM_NICPCI_H_</div><div class='del'>-#define	_BRCM_NICPCI_H_</div><div class='del'>-</div><div class='del'>-#include "types.h"</div><div class='del'>-</div><div class='del'>-/* PCI configuration address space size */</div><div class='del'>-#define PCI_SZPCR		256</div><div class='del'>-</div><div class='del'>-/* Brcm PCI configuration registers */</div><div class='del'>-/* backplane address space accessed by BAR0 */</div><div class='del'>-#define PCI_BAR0_WIN		0x80</div><div class='del'>-/* sprom property control */</div><div class='del'>-#define PCI_SPROM_CONTROL	0x88</div><div class='del'>-/* mask of PCI and other cores interrupts */</div><div class='del'>-#define PCI_INT_MASK		0x94</div><div class='del'>-/* backplane core interrupt mask bits offset */</div><div class='del'>-#define  PCI_SBIM_SHIFT		8</div><div class='del'>-/* backplane address space accessed by second 4KB of BAR0 */</div><div class='del'>-#define PCI_BAR0_WIN2		0xac</div><div class='del'>-/* pci config space gpio input (&gt;=rev3) */</div><div class='del'>-#define PCI_GPIO_IN		0xb0</div><div class='del'>-/* pci config space gpio output (&gt;=rev3) */</div><div class='del'>-#define PCI_GPIO_OUT		0xb4</div><div class='del'>-/* pci config space gpio output enable (&gt;=rev3) */</div><div class='del'>-#define PCI_GPIO_OUTEN		0xb8</div><div class='del'>-</div><div class='del'>-/* bar0 + 4K accesses external sprom */</div><div class='del'>-#define PCI_BAR0_SPROM_OFFSET	(4 * 1024)</div><div class='del'>-/* bar0 + 6K accesses pci core registers */</div><div class='del'>-#define PCI_BAR0_PCIREGS_OFFSET	(6 * 1024)</div><div class='del'>-/*</div><div class='del'>- * pci core SB registers are at the end of the</div><div class='del'>- * 8KB window, so their address is the "regular"</div><div class='del'>- * address plus 4K</div><div class='del'>- */</div><div class='del'>-#define PCI_BAR0_PCISBR_OFFSET	(4 * 1024)</div><div class='del'>-/* bar0 window size Match with corerev 13 */</div><div class='del'>-#define PCI_BAR0_WINSZ		(16 * 1024)</div><div class='del'>-/* On pci corerev &gt;= 13 and all pcie, the bar0 is now 16KB and it maps: */</div><div class='del'>-/* bar0 + 8K accesses pci/pcie core registers */</div><div class='del'>-#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024)</div><div class='del'>-/* bar0 + 12K accesses chipc core registers */</div><div class='del'>-#define PCI_16KB0_CCREGS_OFFSET	(12 * 1024)</div><div class='del'>-</div><div class='del'>-struct sbpciregs;</div><div class='del'>-struct sbpcieregs;</div><div class='del'>-</div><div class='del'>-extern struct pcicore_info *pcicore_init(struct si_pub *sih,</div><div class='del'>-					 struct bcma_device *core);</div><div class='del'>-extern void pcicore_deinit(struct pcicore_info *pch);</div><div class='del'>-extern void pcicore_attach(struct pcicore_info *pch, int state);</div><div class='del'>-extern void pcicore_hwup(struct pcicore_info *pch);</div><div class='del'>-extern void pcicore_up(struct pcicore_info *pch, int state);</div><div class='del'>-extern void pcicore_sleep(struct pcicore_info *pch);</div><div class='del'>-extern void pcicore_down(struct pcicore_info *pch, int state);</div><div class='del'>-extern u8 pcicore_find_pci_capability(struct pci_dev *dev, u8 req_cap_id,</div><div class='del'>-				      unsigned char *buf, u32 *buflen);</div><div class='del'>-extern void pcicore_fixcfg(struct pcicore_info *pch);</div><div class='del'>-extern void pcicore_pci_setup(struct pcicore_info *pch);</div><div class='del'>-</div><div class='del'>-#endif /* _BRCM_NICPCI_H_ */</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/otp.c b/drivers/net/wireless/brcm80211/brcmsmac/otp.c<br/>deleted file mode 100644<br/>index f1ca12625860..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/otp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/otp.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,410 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2010 Broadcom Corporation</div><div class='del'>- *</div><div class='del'>- * Permission to use, copy, modify, and/or distribute this software for any</div><div class='del'>- * purpose with or without fee is hereby granted, provided that the above</div><div class='del'>- * copyright notice and this permission notice appear in all copies.</div><div class='del'>- *</div><div class='del'>- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='del'>- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='del'>- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY</div><div class='del'>- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='del'>- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION</div><div class='del'>- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN</div><div class='del'>- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;brcm_hw_ids.h&gt;</div><div class='del'>-#include &lt;chipcommon.h&gt;</div><div class='del'>-#include "aiutils.h"</div><div class='del'>-#include "otp.h"</div><div class='del'>-</div><div class='del'>-#define OTPS_GUP_MASK		0x00000f00</div><div class='del'>-#define OTPS_GUP_SHIFT		8</div><div class='del'>-/* h/w subregion is programmed */</div><div class='del'>-#define OTPS_GUP_HW		0x00000100</div><div class='del'>-/* s/w subregion is programmed */</div><div class='del'>-#define OTPS_GUP_SW		0x00000200</div><div class='del'>-/* chipid/pkgopt subregion is programmed */</div><div class='del'>-#define OTPS_GUP_CI		0x00000400</div><div class='del'>-/* fuse subregion is programmed */</div><div class='del'>-#define OTPS_GUP_FUSE		0x00000800</div><div class='del'>-</div><div class='del'>-/* Fields in otpprog in rev &gt;= 21 */</div><div class='del'>-#define OTPP_COL_MASK		0x000000ff</div><div class='del'>-#define OTPP_COL_SHIFT		0</div><div class='del'>-#define OTPP_ROW_MASK		0x0000ff00</div><div class='del'>-#define OTPP_ROW_SHIFT		8</div><div class='del'>-#define OTPP_OC_MASK		0x0f000000</div><div class='del'>-#define OTPP_OC_SHIFT		24</div><div class='del'>-#define OTPP_READERR		0x10000000</div><div class='del'>-#define OTPP_VALUE_MASK		0x20000000</div><div class='del'>-#define OTPP_VALUE_SHIFT	29</div><div class='del'>-#define OTPP_START_BUSY		0x80000000</div><div class='del'>-#define	OTPP_READ		0x40000000</div><div class='del'>-</div><div class='del'>-/* Opcodes for OTPP_OC field */</div><div class='del'>-#define OTPPOC_READ		0</div><div class='del'>-#define OTPPOC_BIT_PROG		1</div><div class='del'>-#define OTPPOC_VERIFY		3</div><div class='del'>-#define OTPPOC_INIT		4</div><div class='del'>-#define OTPPOC_SET		5</div><div class='del'>-#define OTPPOC_RESET		6</div><div class='del'>-#define OTPPOC_OCST		7</div><div class='del'>-#define OTPPOC_ROW_LOCK		8</div><div class='del'>-#define OTPPOC_PRESCN_TEST	9</div><div class='del'>-</div><div class='del'>-#define OTPTYPE_IPX(ccrev)	((ccrev) == 21 || (ccrev) &gt;= 23)</div><div class='del'>-</div><div class='del'>-#define OTPP_TRIES	10000000	/* # of tries for OTPP */</div><div class='del'>-</div><div class='del'>-#define MAXNUMRDES		9	/* Maximum OTP redundancy entries */</div><div class='del'>-</div><div class='del'>-/* Fixed size subregions sizes in words */</div><div class='del'>-#define OTPGU_CI_SZ		2</div><div class='del'>-</div><div class='del'>-struct otpinfo;</div><div class='del'>-</div><div class='del'>-/* OTP function struct */</div><div class='del'>-struct otp_fn_s {</div><div class='del'>-	int (*init)(struct si_pub *sih, struct otpinfo *oi);</div><div class='del'>-	int (*read_region)(struct otpinfo *oi, int region, u16 *data,</div><div class='del'>-			   uint *wlen);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct otpinfo {</div><div class='del'>-	struct bcma_device *core; /* chipc core */</div><div class='del'>-	const struct otp_fn_s *fn;	/* OTP functions */</div><div class='del'>-	struct si_pub *sih;		/* Saved sb handle */</div><div class='del'>-</div><div class='del'>-	/* IPX OTP section */</div><div class='del'>-	u16 wsize;		/* Size of otp in words */</div><div class='del'>-	u16 rows;		/* Geometry */</div><div class='del'>-	u16 cols;		/* Geometry */</div><div class='del'>-	u32 status;		/* Flag bits (lock/prog/rv).</div><div class='del'>-				 * (Reflected only when OTP is power cycled)</div><div class='del'>-				 */</div><div class='del'>-	u16 hwbase;		/* hardware subregion offset */</div><div class='del'>-	u16 hwlim;		/* hardware subregion boundary */</div><div class='del'>-	u16 swbase;		/* software subregion offset */</div><div class='del'>-	u16 swlim;		/* software subregion boundary */</div><div class='del'>-	u16 fbase;		/* fuse subregion offset */</div><div class='del'>-	u16 flim;		/* fuse subregion boundary */</div><div class='del'>-	int otpgu_base;		/* offset to General Use Region */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* OTP layout */</div><div class='del'>-/* CC revs 21, 24 and 27 OTP General Use Region word offset */</div><div class='del'>-#define REVA4_OTPGU_BASE	12</div><div class='del'>-</div><div class='del'>-/* CC revs 23, 25, 26, 28 and above OTP General Use Region word offset */</div><div class='del'>-#define REVB8_OTPGU_BASE	20</div><div class='del'>-</div><div class='del'>-/* CC rev 36 OTP General Use Region word offset */</div><div class='del'>-#define REV36_OTPGU_BASE	12</div><div class='del'>-</div><div class='del'>-/* Subregion word offsets in General Use region */</div><div class='del'>-#define OTPGU_HSB_OFF		0</div><div class='del'>-#define OTPGU_SFB_OFF		1</div><div class='del'>-#define OTPGU_CI_OFF		2</div><div class='del'>-#define OTPGU_P_OFF		3</div><div class='del'>-#define OTPGU_SROM_OFF		4</div><div class='del'>-</div><div class='del'>-/* Flag bit offsets in General Use region  */</div><div class='del'>-#define OTPGU_HWP_OFF		60</div><div class='del'>-#define OTPGU_SWP_OFF		61</div><div class='del'>-#define OTPGU_CIP_OFF		62</div><div class='del'>-#define OTPGU_FUSEP_OFF		63</div><div class='del'>-#define OTPGU_CIP_MSK		0x4000</div><div class='del'>-#define OTPGU_P_MSK		0xf000</div><div class='del'>-#define OTPGU_P_SHIFT		(OTPGU_HWP_OFF % 16)</div><div class='del'>-</div><div class='del'>-/* OTP Size */</div><div class='del'>-#define OTP_SZ_FU_324		((roundup(324, 8))/8)	/* 324 bits */</div><div class='del'>-#define OTP_SZ_FU_288		(288/8)	/* 288 bits */</div><div class='del'>-#define OTP_SZ_FU_216		(216/8)	/* 216 bits */</div><div class='del'>-#define OTP_SZ_FU_72		(72/8)	/* 72 bits */</div><div class='del'>-#define OTP_SZ_CHECKSUM		(16/8)	/* 16 bits */</div><div class='del'>-#define OTP4315_SWREG_SZ	178	/* 178 bytes */</div><div class='del'>-#define OTP_SZ_FU_144		(144/8)	/* 144 bits */</div><div class='del'>-</div><div class='del'>-static u16</div><div class='del'>-ipxotp_otpr(struct otpinfo *oi, uint wn)</div><div class='del'>-{</div><div class='del'>-	return bcma_read16(oi-&gt;core,</div><div class='del'>-			   CHIPCREGOFFS(sromotp[wn]));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Calculate max HW/SW region byte size by subtracting fuse region</div><div class='del'>- * and checksum size, osizew is oi-&gt;wsize (OTP size - GU size) in words</div><div class='del'>- */</div><div class='del'>-static int ipxotp_max_rgnsz(struct si_pub *sih, int osizew)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (ai_get_chip_id(sih)) {</div><div class='del'>-	case BCM43224_CHIP_ID:</div><div class='del'>-	case BCM43225_CHIP_ID:</div><div class='del'>-		ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM;</div><div class='del'>-		break;</div><div class='del'>-	case BCM4313_CHIP_ID:</div><div class='del'>-		ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;	/* Don't know about this chip */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _ipxotp_init(struct otpinfo *oi)</div><div class='del'>-{</div><div class='del'>-	uint k;</div><div class='del'>-	u32 otpp, st;</div><div class='del'>-	int ccrev = ai_get_ccrev(oi-&gt;sih);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * record word offset of General Use Region</div><div class='del'>-	 * for various chipcommon revs</div><div class='del'>-	 */</div><div class='del'>-	if (ccrev == 21 || ccrev == 24</div><div class='del'>-	    || ccrev == 27) {</div><div class='del'>-		oi-&gt;otpgu_base = REVA4_OTPGU_BASE;</div><div class='del'>-	} else if (ccrev == 36) {</div><div class='del'>-		/*</div><div class='del'>-		 * OTP size greater than equal to 2KB (128 words),</div><div class='del'>-		 * otpgu_base is similar to rev23</div><div class='del'>-		 */</div><div class='del'>-		if (oi-&gt;wsize &gt;= 128)</div><div class='del'>-			oi-&gt;otpgu_base = REVB8_OTPGU_BASE;</div><div class='del'>-		else</div><div class='del'>-			oi-&gt;otpgu_base = REV36_OTPGU_BASE;</div><div class='del'>-	} else if (ccrev == 23 || ccrev &gt;= 25) {</div><div class='del'>-		oi-&gt;otpgu_base = REVB8_OTPGU_BASE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* First issue an init command so the status is up to date */</div><div class='del'>-	otpp =</div><div class='del'>-	    OTPP_START_BUSY | ((OTPPOC_INIT &lt;&lt; OTPP_OC_SHIFT) &amp; OTPP_OC_MASK);</div><div class='del'>-</div><div class='del'>-	bcma_write32(oi-&gt;core, CHIPCREGOFFS(otpprog), otpp);</div><div class='del'>-	st = bcma_read32(oi-&gt;core, CHIPCREGOFFS(otpprog));</div><div class='del'>-	for (k = 0; (st &amp; OTPP_START_BUSY) &amp;&amp; (k &lt; OTPP_TRIES); k++)</div><div class='del'>-		st = bcma_read32(oi-&gt;core, CHIPCREGOFFS(otpprog));</div><div class='del'>-	if (k &gt;= OTPP_TRIES)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Read OTP lock bits and subregion programmed indication bits */</div><div class='del'>-	oi-&gt;status = bcma_read32(oi-&gt;core, CHIPCREGOFFS(otpstatus));</div><div class='del'>-</div><div class='del'>-	if ((ai_get_chip_id(oi-&gt;sih) == BCM43224_CHIP_ID)</div><div class='del'>-	    || (ai_get_chip_id(oi-&gt;sih) == BCM43225_CHIP_ID)) {</div><div class='del'>-		u32 p_bits;</div><div class='del'>-		p_bits = (ipxotp_otpr(oi, oi-&gt;otpgu_base + OTPGU_P_OFF) &amp;</div><div class='del'>-			  OTPGU_P_MSK) &gt;&gt; OTPGU_P_SHIFT;</div><div class='del'>-		oi-&gt;status |= (p_bits &lt;&lt; OTPS_GUP_SHIFT);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * h/w region base and fuse region limit are fixed to</div><div class='del'>-	 * the top and the bottom of the general use region.</div><div class='del'>-	 * Everything else can be flexible.</div><div class='del'>-	 */</div><div class='del'>-	oi-&gt;hwbase = oi-&gt;otpgu_base + OTPGU_SROM_OFF;</div><div class='del'>-	oi-&gt;hwlim = oi-&gt;wsize;</div><div class='del'>-	if (oi-&gt;status &amp; OTPS_GUP_HW) {</div><div class='del'>-		oi-&gt;hwlim =</div><div class='del'>-		    ipxotp_otpr(oi, oi-&gt;otpgu_base + OTPGU_HSB_OFF) / 16;</div><div class='del'>-		oi-&gt;swbase = oi-&gt;hwlim;</div><div class='del'>-	} else</div><div class='del'>-		oi-&gt;swbase = oi-&gt;hwbase;</div><div class='del'>-</div><div class='del'>-	/* subtract fuse and checksum from beginning */</div><div class='del'>-	oi-&gt;swlim = ipxotp_max_rgnsz(oi-&gt;sih, oi-&gt;wsize) / 2;</div><div class='del'>-</div><div class='del'>-	if (oi-&gt;status &amp; OTPS_GUP_SW) {</div><div class='del'>-		oi-&gt;swlim =</div><div class='del'>-		    ipxotp_otpr(oi, oi-&gt;otpgu_base + OTPGU_SFB_OFF) / 16;</div><div class='del'>-		oi-&gt;fbase = oi-&gt;swlim;</div><div class='del'>-	} else</div><div class='del'>-		oi-&gt;fbase = oi-&gt;swbase;</div><div class='del'>-</div><div class='del'>-	oi-&gt;flim = oi-&gt;wsize;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ipxotp_init(struct si_pub *sih, struct otpinfo *oi)</div><div class='del'>-{</div><div class='del'>-	/* Make sure we're running IPX OTP */</div><div class='del'>-	if (!OTPTYPE_IPX(ai_get_ccrev(sih)))</div><div class='del'>-		return -EBADE;</div><div class='del'>-</div><div class='del'>-	/* Make sure OTP is not disabled */</div><div class='del'>-	if (ai_is_otp_disabled(sih))</div><div class='del'>-		return -EBADE;</div><div class='del'>-</div><div class='del'>-	/* Check for otp size */</div><div class='del'>-	switch ((ai_get_cccaps(sih) &amp; CC_CAP_OTPSIZE) &gt;&gt; CC_CAP_OTPSIZE_SHIFT) {</div><div class='del'>-	case 0:</div><div class='del'>-		/* Nothing there */</div><div class='del'>-		return -EBADE;</div><div class='del'>-	case 1:		/* 32x64 */</div><div class='del'>-		oi-&gt;rows = 32;</div><div class='del'>-		oi-&gt;cols = 64;</div><div class='del'>-		oi-&gt;wsize = 128;</div><div class='del'>-		break;</div><div class='del'>-	case 2:		/* 64x64 */</div><div class='del'>-		oi-&gt;rows = 64;</div><div class='del'>-		oi-&gt;cols = 64;</div><div class='del'>-		oi-&gt;wsize = 256;</div><div class='del'>-		break;</div><div class='del'>-	case 5:		/* 96x64 */</div><div class='del'>-		oi-&gt;rows = 96;</div><div class='del'>-		oi-&gt;cols = 64;</div><div class='del'>-		oi-&gt;wsize = 384;</div><div class='del'>-		break;</div><div class='del'>-	case 7:		/* 16x64 *//* 1024 bits */</div><div class='del'>-		oi-&gt;rows = 16;</div><div class='del'>-		oi-&gt;cols = 64;</div><div class='del'>-		oi-&gt;wsize = 64;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		/* Don't know the geometry */</div><div class='del'>-		return -EBADE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Retrieve OTP region info */</div><div class='del'>-	_ipxotp_init(oi);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-ipxotp_read_region(struct otpinfo *oi, int region, u16 *data, uint *wlen)</div><div class='del'>-{</div><div class='del'>-	uint base, i, sz;</div><div class='del'>-</div><div class='del'>-	/* Validate region selection */</div><div class='del'>-	switch (region) {</div><div class='del'>-	case OTP_HW_RGN:</div><div class='del'>-		sz = (uint) oi-&gt;hwlim - oi-&gt;hwbase;</div><div class='del'>-		if (!(oi-&gt;status &amp; OTPS_GUP_HW)) {</div><div class='del'>-			*wlen = sz;</div><div class='del'>-			return -ENODATA;</div><div class='del'>-		}</div><div class='del'>-		if (*wlen &lt; sz) {</div><div class='del'>-			*wlen = sz;</div><div class='del'>-			return -EOVERFLOW;</div><div class='del'>-		}</div><div class='del'>-		base = oi-&gt;hwbase;</div><div class='del'>-		break;</div><div class='del'>-	case OTP_SW_RGN:</div><div class='del'>-		sz = ((uint) oi-&gt;swlim - oi-&gt;swbase);</div><div class='del'>-		if (!(oi-&gt;status &amp; OTPS_GUP_SW)) {</div><div class='del'>-			*wlen = sz;</div><div class='del'>-			return -ENODATA;</div><div class='del'>-		}</div><div class='del'>-		if (*wlen &lt; sz) {</div><div class='del'>-			*wlen = sz;</div><div class='del'>-			return -EOVERFLOW;</div><div class='del'>-		}</div><div class='del'>-		base = oi-&gt;swbase;</div><div class='del'>-		break;</div><div class='del'>-	case OTP_CI_RGN:</div><div class='del'>-		sz = OTPGU_CI_SZ;</div><div class='del'>-		if (!(oi-&gt;status &amp; OTPS_GUP_CI)) {</div><div class='del'>-			*wlen = sz;</div><div class='del'>-			return -ENODATA;</div><div class='del'>-		}</div><div class='del'>-		if (*wlen &lt; sz) {</div><div class='del'>-			*wlen = sz;</div><div class='del'>-			return -EOVERFLOW;</div><div class='del'>-		}</div><div class='del'>-		base = oi-&gt;otpgu_base + OTPGU_CI_OFF;</div><div class='del'>-		break;</div><div class='del'>-	case OTP_FUSE_RGN:</div><div class='del'>-		sz = (uint) oi-&gt;flim - oi-&gt;fbase;</div><div class='del'>-		if (!(oi-&gt;status &amp; OTPS_GUP_FUSE)) {</div><div class='del'>-			*wlen = sz;</div><div class='del'>-			return -ENODATA;</div><div class='del'>-		}</div><div class='del'>-		if (*wlen &lt; sz) {</div><div class='del'>-			*wlen = sz;</div><div class='del'>-			return -EOVERFLOW;</div><div class='del'>-		}</div><div class='del'>-		base = oi-&gt;fbase;</div><div class='del'>-		break;</div><div class='del'>-	case OTP_ALL_RGN:</div><div class='del'>-		sz = ((uint) oi-&gt;flim - oi-&gt;hwbase);</div><div class='del'>-		if (!(oi-&gt;status &amp; (OTPS_GUP_HW | OTPS_GUP_SW))) {</div><div class='del'>-			*wlen = sz;</div><div class='del'>-			return -ENODATA;</div><div class='del'>-		}</div><div class='del'>-		if (*wlen &lt; sz) {</div><div class='del'>-			*wlen = sz;</div><div class='del'>-			return -EOVERFLOW;</div><div class='del'>-		}</div><div class='del'>-		base = oi-&gt;hwbase;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Read the data */</div><div class='del'>-	for (i = 0; i &lt; sz; i++)</div><div class='del'>-		data[i] = ipxotp_otpr(oi, base + i);</div><div class='del'>-</div><div class='del'>-	*wlen = sz;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct otp_fn_s ipxotp_fn = {</div><div class='del'>-	(int (*)(struct si_pub *, struct otpinfo *)) ipxotp_init,</div><div class='del'>-	(int (*)(struct otpinfo *, int, u16 *, uint *)) ipxotp_read_region,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int otp_init(struct si_pub *sih, struct otpinfo *oi)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	memset(oi, 0, sizeof(struct otpinfo));</div><div class='del'>-</div><div class='del'>-	oi-&gt;core = ai_findcore(sih, BCMA_CORE_CHIPCOMMON, 0);</div><div class='del'>-</div><div class='del'>-	if (OTPTYPE_IPX(ai_get_ccrev(sih)))</div><div class='del'>-		oi-&gt;fn = &amp;ipxotp_fn;</div><div class='del'>-</div><div class='del'>-	if (oi-&gt;fn == NULL)</div><div class='del'>-		return -EBADE;</div><div class='del'>-</div><div class='del'>-	oi-&gt;sih = sih;</div><div class='del'>-</div><div class='del'>-	ret = (oi-&gt;fn-&gt;init)(sih, oi);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-otp_read_region(struct si_pub *sih, int region, u16 *data, uint *wlen) {</div><div class='del'>-	struct otpinfo otpinfo;</div><div class='del'>-	struct otpinfo *oi = &amp;otpinfo;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (ai_is_otp_disabled(sih)) {</div><div class='del'>-		err = -EPERM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = otp_init(sih, oi);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	err = ((oi)-&gt;fn-&gt;read_region)(oi, region, data, wlen);</div><div class='del'>-</div><div class='del'>- out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/otp.h b/drivers/net/wireless/brcm80211/brcmsmac/otp.h<br/>deleted file mode 100644<br/>index 6b6d31cf9569..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/otp.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/otp.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2010 Broadcom Corporation</div><div class='del'>- *</div><div class='del'>- * Permission to use, copy, modify, and/or distribute this software for any</div><div class='del'>- * purpose with or without fee is hereby granted, provided that the above</div><div class='del'>- * copyright notice and this permission notice appear in all copies.</div><div class='del'>- *</div><div class='del'>- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='del'>- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='del'>- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY</div><div class='del'>- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='del'>- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION</div><div class='del'>- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN</div><div class='del'>- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef	_BRCM_OTP_H_</div><div class='del'>-#define	_BRCM_OTP_H_</div><div class='del'>-</div><div class='del'>-#include "types.h"</div><div class='del'>-</div><div class='del'>-/* OTP regions */</div><div class='del'>-#define OTP_HW_RGN	1</div><div class='del'>-#define OTP_SW_RGN	2</div><div class='del'>-#define OTP_CI_RGN	4</div><div class='del'>-#define OTP_FUSE_RGN	8</div><div class='del'>-/* From h/w region to end of OTP including checksum */</div><div class='del'>-#define OTP_ALL_RGN	0xf</div><div class='del'>-</div><div class='del'>-/* OTP Size */</div><div class='del'>-#define OTP_SZ_MAX		(6144/8)	/* maximum bytes in one CIS */</div><div class='del'>-</div><div class='del'>-extern int otp_read_region(struct si_pub *sih, int region, u16 *data,</div><div class='del'>-			   uint *wlen);</div><div class='del'>-</div><div class='del'>-#endif				/* _BRCM_OTP_H_ */</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.c b/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.c<br/>index ce8562aa5db0..abfd78822fb8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.c</a></div><div class='hunk'>@@ -207,8 +207,7 @@ static const iqcal_gain_params_lcnphy *tbl_iqcal_gainparams_lcnphy[1] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const u16 iqcal_gainparams_numgains_lcnphy[1] = {</div><div class='del'>-	sizeof(tbl_iqcal_gainparams_lcnphy_2G) /</div><div class='del'>-	sizeof(*tbl_iqcal_gainparams_lcnphy_2G),</div><div class='add'>+	ARRAY_SIZE(tbl_iqcal_gainparams_lcnphy_2G),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct lcnphy_sfo_cfg lcnphy_sfo_cfg[] = {</div><div class='hunk'>@@ -4818,28 +4817,23 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)</div><div class='ctx'> 	s8 txpwr = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct brcms_phy_lcnphy *pi_lcn = pi-&gt;u.pi_lcnphy;</div><div class='del'>-	struct phy_shim_info *shim = pi-&gt;sh-&gt;physhim;</div><div class='add'>+	struct ssb_sprom *sprom = &amp;pi-&gt;d11core-&gt;bus-&gt;sprom;</div><div class='ctx'> </div><div class='ctx'> 	if (CHSPEC_IS2G(pi-&gt;radio_chanspec)) {</div><div class='ctx'> 		u16 cckpo = 0;</div><div class='ctx'> 		u32 offset_ofdm, offset_mcs;</div><div class='ctx'> </div><div class='del'>-		pi_lcn-&gt;lcnphy_tr_isolation_mid =</div><div class='del'>-			(u8)wlapi_getintvar(shim, BRCMS_SROM_TRISO2G);</div><div class='add'>+		pi_lcn-&gt;lcnphy_tr_isolation_mid = sprom-&gt;fem.ghz2.tr_iso;</div><div class='ctx'> </div><div class='del'>-		pi_lcn-&gt;lcnphy_rx_power_offset =</div><div class='del'>-			(u8)wlapi_getintvar(shim, BRCMS_SROM_RXPO2G);</div><div class='add'>+		pi_lcn-&gt;lcnphy_rx_power_offset = sprom-&gt;rxpo2g;</div><div class='ctx'> </div><div class='del'>-		pi-&gt;txpa_2g[0] = (s16)wlapi_getintvar(shim, BRCMS_SROM_PA0B0);</div><div class='del'>-		pi-&gt;txpa_2g[1] = (s16)wlapi_getintvar(shim, BRCMS_SROM_PA0B1);</div><div class='del'>-		pi-&gt;txpa_2g[2] = (s16)wlapi_getintvar(shim, BRCMS_SROM_PA0B2);</div><div class='add'>+		pi-&gt;txpa_2g[0] = sprom-&gt;pa0b0;</div><div class='add'>+		pi-&gt;txpa_2g[1] = sprom-&gt;pa0b1;</div><div class='add'>+		pi-&gt;txpa_2g[2] = sprom-&gt;pa0b2;</div><div class='ctx'> </div><div class='del'>-		pi_lcn-&gt;lcnphy_rssi_vf =</div><div class='del'>-				(u8)wlapi_getintvar(shim, BRCMS_SROM_RSSISMF2G);</div><div class='del'>-		pi_lcn-&gt;lcnphy_rssi_vc =</div><div class='del'>-				(u8)wlapi_getintvar(shim, BRCMS_SROM_RSSISMC2G);</div><div class='del'>-		pi_lcn-&gt;lcnphy_rssi_gs =</div><div class='del'>-				(u8)wlapi_getintvar(shim, BRCMS_SROM_RSSISAV2G);</div><div class='add'>+		pi_lcn-&gt;lcnphy_rssi_vf = sprom-&gt;rssismf2g;</div><div class='add'>+		pi_lcn-&gt;lcnphy_rssi_vc = sprom-&gt;rssismc2g;</div><div class='add'>+		pi_lcn-&gt;lcnphy_rssi_gs = sprom-&gt;rssisav2g;</div><div class='ctx'> </div><div class='ctx'> 		pi_lcn-&gt;lcnphy_rssi_vf_lowtemp = pi_lcn-&gt;lcnphy_rssi_vf;</div><div class='ctx'> 		pi_lcn-&gt;lcnphy_rssi_vc_lowtemp = pi_lcn-&gt;lcnphy_rssi_vc;</div><div class='hunk'>@@ -4849,7 +4843,7 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)</div><div class='ctx'> 		pi_lcn-&gt;lcnphy_rssi_vc_hightemp = pi_lcn-&gt;lcnphy_rssi_vc;</div><div class='ctx'> 		pi_lcn-&gt;lcnphy_rssi_gs_hightemp = pi_lcn-&gt;lcnphy_rssi_gs;</div><div class='ctx'> </div><div class='del'>-		txpwr = (s8)wlapi_getintvar(shim, BRCMS_SROM_MAXP2GA0);</div><div class='add'>+		txpwr = sprom-&gt;core_pwr_info[0].maxpwr_2g;</div><div class='ctx'> 		pi-&gt;tx_srom_max_2g = txpwr;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; PWRTBL_NUM_COEFF; i++) {</div><div class='hunk'>@@ -4857,8 +4851,8 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)</div><div class='ctx'> 			pi-&gt;txpa_2g_high_temp[i] = pi-&gt;txpa_2g[i];</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		cckpo = (u16)wlapi_getintvar(shim, BRCMS_SROM_CCK2GPO);</div><div class='del'>-		offset_ofdm = (u32)wlapi_getintvar(shim, BRCMS_SROM_OFDM2GPO);</div><div class='add'>+		cckpo = sprom-&gt;cck2gpo;</div><div class='add'>+		offset_ofdm = sprom-&gt;ofdm2gpo;</div><div class='ctx'> 		if (cckpo) {</div><div class='ctx'> 			uint max_pwr_chan = txpwr;</div><div class='ctx'> </div><div class='hunk'>@@ -4877,7 +4871,7 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			u8 opo = 0;</div><div class='ctx'> </div><div class='del'>-			opo = (u8)wlapi_getintvar(shim, BRCMS_SROM_OPO);</div><div class='add'>+			opo = sprom-&gt;opo;</div><div class='ctx'> </div><div class='ctx'> 			for (i = TXP_FIRST_CCK; i &lt;= TXP_LAST_CCK; i++)</div><div class='ctx'> 				pi-&gt;tx_srom_max_rate_2g[i] = txpwr;</div><div class='hunk'>@@ -4887,12 +4881,8 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)</div><div class='ctx'> 						((offset_ofdm &amp; 0xf) * 2);</div><div class='ctx'> 				offset_ofdm &gt;&gt;= 4;</div><div class='ctx'> 			}</div><div class='del'>-			offset_mcs =</div><div class='del'>-				wlapi_getintvar(shim,</div><div class='del'>-						BRCMS_SROM_MCS2GPO1) &lt;&lt; 16;</div><div class='del'>-			offset_mcs |=</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS2GPO0);</div><div class='add'>+			offset_mcs = sprom-&gt;mcs2gpo[1] &lt;&lt; 16;</div><div class='add'>+			offset_mcs |= sprom-&gt;mcs2gpo[0];</div><div class='ctx'> 			pi_lcn-&gt;lcnphy_mcs20_po = offset_mcs;</div><div class='ctx'> 			for (i = TXP_FIRST_SISO_MCS_20;</div><div class='ctx'> 			     i &lt;= TXP_LAST_SISO_MCS_20; i++) {</div><div class='hunk'>@@ -4902,25 +4892,17 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		pi_lcn-&gt;lcnphy_rawtempsense =</div><div class='del'>-			(u16)wlapi_getintvar(shim, BRCMS_SROM_RAWTEMPSENSE);</div><div class='del'>-		pi_lcn-&gt;lcnphy_measPower =</div><div class='del'>-			(u8)wlapi_getintvar(shim, BRCMS_SROM_MEASPOWER);</div><div class='del'>-		pi_lcn-&gt;lcnphy_tempsense_slope =</div><div class='del'>-			(u8)wlapi_getintvar(shim, BRCMS_SROM_TEMPSENSE_SLOPE);</div><div class='del'>-		pi_lcn-&gt;lcnphy_hw_iqcal_en =</div><div class='del'>-			(bool)wlapi_getintvar(shim, BRCMS_SROM_HW_IQCAL_EN);</div><div class='del'>-		pi_lcn-&gt;lcnphy_iqcal_swp_dis =</div><div class='del'>-			(bool)wlapi_getintvar(shim, BRCMS_SROM_IQCAL_SWP_DIS);</div><div class='del'>-		pi_lcn-&gt;lcnphy_tempcorrx =</div><div class='del'>-			(u8)wlapi_getintvar(shim, BRCMS_SROM_TEMPCORRX);</div><div class='del'>-		pi_lcn-&gt;lcnphy_tempsense_option =</div><div class='del'>-			(u8)wlapi_getintvar(shim, BRCMS_SROM_TEMPSENSE_OPTION);</div><div class='del'>-		pi_lcn-&gt;lcnphy_freqoffset_corr =</div><div class='del'>-			(u8)wlapi_getintvar(shim, BRCMS_SROM_FREQOFFSET_CORR);</div><div class='del'>-		if ((u8)wlapi_getintvar(shim, BRCMS_SROM_AA2G) &gt; 1)</div><div class='add'>+		pi_lcn-&gt;lcnphy_rawtempsense = sprom-&gt;rawtempsense;</div><div class='add'>+		pi_lcn-&gt;lcnphy_measPower = sprom-&gt;measpower;</div><div class='add'>+		pi_lcn-&gt;lcnphy_tempsense_slope = sprom-&gt;tempsense_slope;</div><div class='add'>+		pi_lcn-&gt;lcnphy_hw_iqcal_en = sprom-&gt;hw_iqcal_en;</div><div class='add'>+		pi_lcn-&gt;lcnphy_iqcal_swp_dis = sprom-&gt;iqcal_swp_dis;</div><div class='add'>+		pi_lcn-&gt;lcnphy_tempcorrx = sprom-&gt;tempcorrx;</div><div class='add'>+		pi_lcn-&gt;lcnphy_tempsense_option = sprom-&gt;tempsense_option;</div><div class='add'>+		pi_lcn-&gt;lcnphy_freqoffset_corr = sprom-&gt;freqoffset_corr;</div><div class='add'>+		if (sprom-&gt;ant_available_bg &gt; 1)</div><div class='ctx'> 			wlc_phy_ant_rxdiv_set((struct brcms_phy_pub *) pi,</div><div class='del'>-				(u8) wlapi_getintvar(shim, BRCMS_SROM_AA2G));</div><div class='add'>+				sprom-&gt;ant_available_bg);</div><div class='ctx'> 	}</div><div class='ctx'> 	pi_lcn-&gt;lcnphy_cck_dig_filt_type = -1;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c b/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c<br/>index 39095741fd05..13b261517cce 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c</a></div><div class='hunk'>@@ -14386,30 +14386,30 @@ static void wlc_phy_txpwr_srom_read_ppr_nphy(struct brcms_phy *pi)</div><div class='ctx'> {</div><div class='ctx'> 	u16 bw40po, cddpo, stbcpo, bwduppo;</div><div class='ctx'> 	uint band_num;</div><div class='del'>-	struct phy_shim_info *shim = pi-&gt;sh-&gt;physhim;</div><div class='add'>+	struct ssb_sprom *sprom = &amp;pi-&gt;d11core-&gt;bus-&gt;sprom;</div><div class='ctx'> </div><div class='ctx'> 	if (pi-&gt;sh-&gt;sromrev &gt;= 9)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	bw40po = (u16) wlapi_getintvar(shim, BRCMS_SROM_BW40PO);</div><div class='add'>+	bw40po = sprom-&gt;bw40po;</div><div class='ctx'> 	pi-&gt;bw402gpo = bw40po &amp; 0xf;</div><div class='ctx'> 	pi-&gt;bw405gpo = (bw40po &amp; 0xf0) &gt;&gt; 4;</div><div class='ctx'> 	pi-&gt;bw405glpo = (bw40po &amp; 0xf00) &gt;&gt; 8;</div><div class='ctx'> 	pi-&gt;bw405ghpo = (bw40po &amp; 0xf000) &gt;&gt; 12;</div><div class='ctx'> </div><div class='del'>-	cddpo = (u16) wlapi_getintvar(shim, BRCMS_SROM_CDDPO);</div><div class='add'>+	cddpo = sprom-&gt;cddpo;</div><div class='ctx'> 	pi-&gt;cdd2gpo = cddpo &amp; 0xf;</div><div class='ctx'> 	pi-&gt;cdd5gpo = (cddpo &amp; 0xf0) &gt;&gt; 4;</div><div class='ctx'> 	pi-&gt;cdd5glpo = (cddpo &amp; 0xf00) &gt;&gt; 8;</div><div class='ctx'> 	pi-&gt;cdd5ghpo = (cddpo &amp; 0xf000) &gt;&gt; 12;</div><div class='ctx'> </div><div class='del'>-	stbcpo = (u16) wlapi_getintvar(shim, BRCMS_SROM_STBCPO);</div><div class='add'>+	stbcpo = sprom-&gt;stbcpo;</div><div class='ctx'> 	pi-&gt;stbc2gpo = stbcpo &amp; 0xf;</div><div class='ctx'> 	pi-&gt;stbc5gpo = (stbcpo &amp; 0xf0) &gt;&gt; 4;</div><div class='ctx'> 	pi-&gt;stbc5glpo = (stbcpo &amp; 0xf00) &gt;&gt; 8;</div><div class='ctx'> 	pi-&gt;stbc5ghpo = (stbcpo &amp; 0xf000) &gt;&gt; 12;</div><div class='ctx'> </div><div class='del'>-	bwduppo = (u16) wlapi_getintvar(shim, BRCMS_SROM_BWDUPPO);</div><div class='add'>+	bwduppo = sprom-&gt;bwduppo;</div><div class='ctx'> 	pi-&gt;bwdup2gpo = bwduppo &amp; 0xf;</div><div class='ctx'> 	pi-&gt;bwdup5gpo = (bwduppo &amp; 0xf0) &gt;&gt; 4;</div><div class='ctx'> 	pi-&gt;bwdup5glpo = (bwduppo &amp; 0xf00) &gt;&gt; 8;</div><div class='hunk'>@@ -14419,242 +14419,137 @@ static void wlc_phy_txpwr_srom_read_ppr_nphy(struct brcms_phy *pi)</div><div class='ctx'> 	     band_num++) {</div><div class='ctx'> 		switch (band_num) {</div><div class='ctx'> 		case 0:</div><div class='del'>-</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_0].max_pwr_2g =</div><div class='del'>-				(s8) wlapi_getintvar(shim,</div><div class='del'>-						     BRCMS_SROM_MAXP2GA0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].maxpwr_2g;</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_1].max_pwr_2g =</div><div class='del'>-				(s8) wlapi_getintvar(shim,</div><div class='del'>-						     BRCMS_SROM_MAXP2GA1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].maxpwr_2g;</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_a1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA2GW0A0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].pa_2g[0];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_a1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA2GW0A1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].pa_2g[0];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b0 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA2GW1A0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].pa_2g[1];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b0 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA2GW1A1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].pa_2g[1];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA2GW2A0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].pa_2g[2];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA2GW2A1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].pa_2g[2];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_0].idle_targ_2g =</div><div class='del'>-				(s8) wlapi_getintvar(shim, BRCMS_SROM_ITT2GA0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].itssi_2g;</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_1].idle_targ_2g =</div><div class='del'>-				(s8) wlapi_getintvar(shim, BRCMS_SROM_ITT2GA1);</div><div class='del'>-</div><div class='del'>-			pi-&gt;cck2gpo = (u16) wlapi_getintvar(shim,</div><div class='del'>-							    BRCMS_SROM_CCK2GPO);</div><div class='del'>-</div><div class='del'>-			pi-&gt;ofdm2gpo =</div><div class='del'>-				(u32) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_OFDM2GPO);</div><div class='del'>-</div><div class='del'>-			pi-&gt;mcs2gpo[0] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS2GPO0);</div><div class='del'>-			pi-&gt;mcs2gpo[1] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS2GPO1);</div><div class='del'>-			pi-&gt;mcs2gpo[2] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS2GPO2);</div><div class='del'>-			pi-&gt;mcs2gpo[3] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS2GPO3);</div><div class='del'>-			pi-&gt;mcs2gpo[4] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS2GPO4);</div><div class='del'>-			pi-&gt;mcs2gpo[5] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS2GPO5);</div><div class='del'>-			pi-&gt;mcs2gpo[6] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS2GPO6);</div><div class='del'>-			pi-&gt;mcs2gpo[7] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS2GPO7);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].itssi_2g;</div><div class='add'>+</div><div class='add'>+			pi-&gt;cck2gpo = sprom-&gt;cck2gpo;</div><div class='add'>+</div><div class='add'>+			pi-&gt;ofdm2gpo = sprom-&gt;ofdm2gpo;</div><div class='add'>+</div><div class='add'>+			pi-&gt;mcs2gpo[0] = sprom-&gt;mcs2gpo[0];</div><div class='add'>+			pi-&gt;mcs2gpo[1] = sprom-&gt;mcs2gpo[1];</div><div class='add'>+			pi-&gt;mcs2gpo[2] = sprom-&gt;mcs2gpo[2];</div><div class='add'>+			pi-&gt;mcs2gpo[3] = sprom-&gt;mcs2gpo[3];</div><div class='add'>+			pi-&gt;mcs2gpo[4] = sprom-&gt;mcs2gpo[4];</div><div class='add'>+			pi-&gt;mcs2gpo[5] = sprom-&gt;mcs2gpo[5];</div><div class='add'>+			pi-&gt;mcs2gpo[6] = sprom-&gt;mcs2gpo[6];</div><div class='add'>+			pi-&gt;mcs2gpo[7] = sprom-&gt;mcs2gpo[7];</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 1:</div><div class='ctx'> </div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_0].max_pwr_5gm =</div><div class='del'>-				(s8) wlapi_getintvar(shim, BRCMS_SROM_MAXP5GA0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].maxpwr_5g;</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_1].max_pwr_5gm =</div><div class='del'>-				(s8) wlapi_getintvar(shim,</div><div class='del'>-						     BRCMS_SROM_MAXP5GA1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].maxpwr_5g;</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_a1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GW0A0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].pa_5g[0];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_a1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GW0A1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].pa_5g[0];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b0 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GW1A0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].pa_5g[1];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b0 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GW1A1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].pa_5g[1];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GW2A0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].pa_5g[2];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GW2A1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].pa_5g[2];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_0].idle_targ_5gm =</div><div class='del'>-				(s8) wlapi_getintvar(shim, BRCMS_SROM_ITT5GA0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].itssi_5g;</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[PHY_CORE_1].idle_targ_5gm =</div><div class='del'>-				(s8) wlapi_getintvar(shim, BRCMS_SROM_ITT5GA1);</div><div class='del'>-</div><div class='del'>-			pi-&gt;ofdm5gpo =</div><div class='del'>-				(u32) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_OFDM5GPO);</div><div class='del'>-</div><div class='del'>-			pi-&gt;mcs5gpo[0] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GPO0);</div><div class='del'>-			pi-&gt;mcs5gpo[1] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GPO1);</div><div class='del'>-			pi-&gt;mcs5gpo[2] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GPO2);</div><div class='del'>-			pi-&gt;mcs5gpo[3] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GPO3);</div><div class='del'>-			pi-&gt;mcs5gpo[4] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GPO4);</div><div class='del'>-			pi-&gt;mcs5gpo[5] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GPO5);</div><div class='del'>-			pi-&gt;mcs5gpo[6] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GPO6);</div><div class='del'>-			pi-&gt;mcs5gpo[7] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GPO7);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].itssi_5g;</div><div class='add'>+</div><div class='add'>+			pi-&gt;ofdm5gpo = sprom-&gt;ofdm5gpo;</div><div class='add'>+</div><div class='add'>+			pi-&gt;mcs5gpo[0] = sprom-&gt;mcs5gpo[0];</div><div class='add'>+			pi-&gt;mcs5gpo[1] = sprom-&gt;mcs5gpo[1];</div><div class='add'>+			pi-&gt;mcs5gpo[2] = sprom-&gt;mcs5gpo[2];</div><div class='add'>+			pi-&gt;mcs5gpo[3] = sprom-&gt;mcs5gpo[3];</div><div class='add'>+			pi-&gt;mcs5gpo[4] = sprom-&gt;mcs5gpo[4];</div><div class='add'>+			pi-&gt;mcs5gpo[5] = sprom-&gt;mcs5gpo[5];</div><div class='add'>+			pi-&gt;mcs5gpo[6] = sprom-&gt;mcs5gpo[6];</div><div class='add'>+			pi-&gt;mcs5gpo[7] = sprom-&gt;mcs5gpo[7];</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 2:</div><div class='ctx'> </div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[0].max_pwr_5gl =</div><div class='del'>-				(s8) wlapi_getintvar(shim,</div><div class='del'>-						     BRCMS_SROM_MAXP5GLA0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].maxpwr_5gl;</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[1].max_pwr_5gl =</div><div class='del'>-				(s8) wlapi_getintvar(shim,</div><div class='del'>-						     BRCMS_SROM_MAXP5GLA1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].maxpwr_5gl;</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[0].pwrdet_5gl_a1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GLW0A0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].pa_5gl[0];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[1].pwrdet_5gl_a1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GLW0A1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].pa_5gl[0];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[0].pwrdet_5gl_b0 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GLW1A0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].pa_5gl[1];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[1].pwrdet_5gl_b0 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GLW1A1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].pa_5gl[1];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[0].pwrdet_5gl_b1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GLW2A0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].pa_5gl[2];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[1].pwrdet_5gl_b1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GLW2A1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].pa_5gl[2];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[0].idle_targ_5gl = 0;</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[1].idle_targ_5gl = 0;</div><div class='ctx'> </div><div class='del'>-			pi-&gt;ofdm5glpo =</div><div class='del'>-				(u32) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_OFDM5GLPO);</div><div class='del'>-</div><div class='del'>-			pi-&gt;mcs5glpo[0] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GLPO0);</div><div class='del'>-			pi-&gt;mcs5glpo[1] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GLPO1);</div><div class='del'>-			pi-&gt;mcs5glpo[2] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GLPO2);</div><div class='del'>-			pi-&gt;mcs5glpo[3] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GLPO3);</div><div class='del'>-			pi-&gt;mcs5glpo[4] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GLPO4);</div><div class='del'>-			pi-&gt;mcs5glpo[5] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GLPO5);</div><div class='del'>-			pi-&gt;mcs5glpo[6] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GLPO6);</div><div class='del'>-			pi-&gt;mcs5glpo[7] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GLPO7);</div><div class='add'>+			pi-&gt;ofdm5glpo = sprom-&gt;ofdm5glpo;</div><div class='add'>+</div><div class='add'>+			pi-&gt;mcs5glpo[0] = sprom-&gt;mcs5glpo[0];</div><div class='add'>+			pi-&gt;mcs5glpo[1] = sprom-&gt;mcs5glpo[1];</div><div class='add'>+			pi-&gt;mcs5glpo[2] = sprom-&gt;mcs5glpo[2];</div><div class='add'>+			pi-&gt;mcs5glpo[3] = sprom-&gt;mcs5glpo[3];</div><div class='add'>+			pi-&gt;mcs5glpo[4] = sprom-&gt;mcs5glpo[4];</div><div class='add'>+			pi-&gt;mcs5glpo[5] = sprom-&gt;mcs5glpo[5];</div><div class='add'>+			pi-&gt;mcs5glpo[6] = sprom-&gt;mcs5glpo[6];</div><div class='add'>+			pi-&gt;mcs5glpo[7] = sprom-&gt;mcs5glpo[7];</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 3:</div><div class='ctx'> </div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[0].max_pwr_5gh =</div><div class='del'>-				(s8) wlapi_getintvar(shim,</div><div class='del'>-						     BRCMS_SROM_MAXP5GHA0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].maxpwr_5gh;</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[1].max_pwr_5gh =</div><div class='del'>-				(s8) wlapi_getintvar(shim,</div><div class='del'>-						     BRCMS_SROM_MAXP5GHA1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].maxpwr_5gh;</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[0].pwrdet_5gh_a1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GHW0A0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].pa_5gh[0];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[1].pwrdet_5gh_a1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GHW0A1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].pa_5gh[0];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[0].pwrdet_5gh_b0 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GHW1A0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].pa_5gh[1];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[1].pwrdet_5gh_b0 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GHW1A1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].pa_5gh[1];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[0].pwrdet_5gh_b1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GHW2A0);</div><div class='add'>+				sprom-&gt;core_pwr_info[0].pa_5gh[2];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[1].pwrdet_5gh_b1 =</div><div class='del'>-				(s16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_PA5GHW2A1);</div><div class='add'>+				sprom-&gt;core_pwr_info[1].pa_5gh[2];</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[0].idle_targ_5gh = 0;</div><div class='ctx'> 			pi-&gt;nphy_pwrctrl_info[1].idle_targ_5gh = 0;</div><div class='ctx'> </div><div class='del'>-			pi-&gt;ofdm5ghpo =</div><div class='del'>-				(u32) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_OFDM5GHPO);</div><div class='del'>-</div><div class='del'>-			pi-&gt;mcs5ghpo[0] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GHPO0);</div><div class='del'>-			pi-&gt;mcs5ghpo[1] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GHPO1);</div><div class='del'>-			pi-&gt;mcs5ghpo[2] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GHPO2);</div><div class='del'>-			pi-&gt;mcs5ghpo[3] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GHPO3);</div><div class='del'>-			pi-&gt;mcs5ghpo[4] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GHPO4);</div><div class='del'>-			pi-&gt;mcs5ghpo[5] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GHPO5);</div><div class='del'>-			pi-&gt;mcs5ghpo[6] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GHPO6);</div><div class='del'>-			pi-&gt;mcs5ghpo[7] =</div><div class='del'>-				(u16) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_MCS5GHPO7);</div><div class='add'>+			pi-&gt;ofdm5ghpo = sprom-&gt;ofdm5ghpo;</div><div class='add'>+</div><div class='add'>+			pi-&gt;mcs5ghpo[0] = sprom-&gt;mcs5ghpo[0];</div><div class='add'>+			pi-&gt;mcs5ghpo[1] = sprom-&gt;mcs5ghpo[1];</div><div class='add'>+			pi-&gt;mcs5ghpo[2] = sprom-&gt;mcs5ghpo[2];</div><div class='add'>+			pi-&gt;mcs5ghpo[3] = sprom-&gt;mcs5ghpo[3];</div><div class='add'>+			pi-&gt;mcs5ghpo[4] = sprom-&gt;mcs5ghpo[4];</div><div class='add'>+			pi-&gt;mcs5ghpo[5] = sprom-&gt;mcs5ghpo[5];</div><div class='add'>+			pi-&gt;mcs5ghpo[6] = sprom-&gt;mcs5ghpo[6];</div><div class='add'>+			pi-&gt;mcs5ghpo[7] = sprom-&gt;mcs5ghpo[7];</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -14664,45 +14559,34 @@ static void wlc_phy_txpwr_srom_read_ppr_nphy(struct brcms_phy *pi)</div><div class='ctx'> </div><div class='ctx'> static bool wlc_phy_txpwr_srom_read_nphy(struct brcms_phy *pi)</div><div class='ctx'> {</div><div class='del'>-	struct phy_shim_info *shim = pi-&gt;sh-&gt;physhim;</div><div class='del'>-</div><div class='del'>-	pi-&gt;antswitch = (u8) wlapi_getintvar(shim, BRCMS_SROM_ANTSWITCH);</div><div class='del'>-	pi-&gt;aa2g = (u8) wlapi_getintvar(shim, BRCMS_SROM_AA2G);</div><div class='del'>-	pi-&gt;aa5g = (u8) wlapi_getintvar(shim, BRCMS_SROM_AA5G);</div><div class='del'>-</div><div class='del'>-	pi-&gt;srom_fem2g.tssipos = (u8) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_TSSIPOS2G);</div><div class='del'>-	pi-&gt;srom_fem2g.extpagain = (u8) wlapi_getintvar(shim,</div><div class='del'>-							BRCMS_SROM_EXTPAGAIN2G);</div><div class='del'>-	pi-&gt;srom_fem2g.pdetrange = (u8) wlapi_getintvar(shim,</div><div class='del'>-							BRCMS_SROM_PDETRANGE2G);</div><div class='del'>-	pi-&gt;srom_fem2g.triso = (u8) wlapi_getintvar(shim, BRCMS_SROM_TRISO2G);</div><div class='del'>-	pi-&gt;srom_fem2g.antswctrllut =</div><div class='del'>-			(u8) wlapi_getintvar(shim, BRCMS_SROM_ANTSWCTL2G);</div><div class='del'>-</div><div class='del'>-	pi-&gt;srom_fem5g.tssipos = (u8) wlapi_getintvar(shim,</div><div class='del'>-						      BRCMS_SROM_TSSIPOS5G);</div><div class='del'>-	pi-&gt;srom_fem5g.extpagain = (u8) wlapi_getintvar(shim,</div><div class='del'>-							BRCMS_SROM_EXTPAGAIN5G);</div><div class='del'>-	pi-&gt;srom_fem5g.pdetrange = (u8) wlapi_getintvar(shim,</div><div class='del'>-							BRCMS_SROM_PDETRANGE5G);</div><div class='del'>-	pi-&gt;srom_fem5g.triso = (u8) wlapi_getintvar(shim, BRCMS_SROM_TRISO5G);</div><div class='del'>-	if (wlapi_getvar(shim, BRCMS_SROM_ANTSWCTL5G))</div><div class='del'>-		pi-&gt;srom_fem5g.antswctrllut =</div><div class='del'>-			(u8) wlapi_getintvar(shim, BRCMS_SROM_ANTSWCTL5G);</div><div class='add'>+	struct ssb_sprom *sprom = &amp;pi-&gt;d11core-&gt;bus-&gt;sprom;</div><div class='add'>+</div><div class='add'>+	pi-&gt;antswitch = sprom-&gt;antswitch;</div><div class='add'>+	pi-&gt;aa2g = sprom-&gt;ant_available_bg;</div><div class='add'>+	pi-&gt;aa5g = sprom-&gt;ant_available_a;</div><div class='add'>+</div><div class='add'>+	pi-&gt;srom_fem2g.tssipos = sprom-&gt;fem.ghz2.tssipos;</div><div class='add'>+	pi-&gt;srom_fem2g.extpagain = sprom-&gt;fem.ghz2.extpa_gain;</div><div class='add'>+	pi-&gt;srom_fem2g.pdetrange = sprom-&gt;fem.ghz2.pdet_range;</div><div class='add'>+	pi-&gt;srom_fem2g.triso = sprom-&gt;fem.ghz2.tr_iso;</div><div class='add'>+	pi-&gt;srom_fem2g.antswctrllut = sprom-&gt;fem.ghz2.antswlut;</div><div class='add'>+</div><div class='add'>+	pi-&gt;srom_fem5g.tssipos = sprom-&gt;fem.ghz5.tssipos;</div><div class='add'>+	pi-&gt;srom_fem5g.extpagain = sprom-&gt;fem.ghz5.extpa_gain;</div><div class='add'>+	pi-&gt;srom_fem5g.pdetrange = sprom-&gt;fem.ghz5.pdet_range;</div><div class='add'>+	pi-&gt;srom_fem5g.triso = sprom-&gt;fem.ghz5.tr_iso;</div><div class='add'>+	if (sprom-&gt;fem.ghz5.antswlut)</div><div class='add'>+		pi-&gt;srom_fem5g.antswctrllut = sprom-&gt;fem.ghz5.antswlut;</div><div class='ctx'> 	else</div><div class='del'>-		pi-&gt;srom_fem5g.antswctrllut =</div><div class='del'>-			(u8) wlapi_getintvar(shim, BRCMS_SROM_ANTSWCTL2G);</div><div class='add'>+		pi-&gt;srom_fem5g.antswctrllut = sprom-&gt;fem.ghz2.antswlut;</div><div class='ctx'> </div><div class='ctx'> 	wlc_phy_txpower_ipa_upd(pi);</div><div class='ctx'> </div><div class='del'>-	pi-&gt;phy_txcore_disable_temp =</div><div class='del'>-			(s16) wlapi_getintvar(shim, BRCMS_SROM_TEMPTHRESH);</div><div class='add'>+	pi-&gt;phy_txcore_disable_temp = sprom-&gt;tempthresh;</div><div class='ctx'> 	if (pi-&gt;phy_txcore_disable_temp == 0)</div><div class='ctx'> 		pi-&gt;phy_txcore_disable_temp = PHY_CHAIN_TX_DISABLE_TEMP;</div><div class='ctx'> </div><div class='del'>-	pi-&gt;phy_tempsense_offset = (s8) wlapi_getintvar(shim,</div><div class='del'>-							BRCMS_SROM_TEMPOFFSET);</div><div class='add'>+	pi-&gt;phy_tempsense_offset = sprom-&gt;tempoffset;</div><div class='ctx'> 	if (pi-&gt;phy_tempsense_offset != 0) {</div><div class='ctx'> 		if (pi-&gt;phy_tempsense_offset &gt;</div><div class='ctx'> 		    (NPHY_SROM_TEMPSHIFT + NPHY_SROM_MAXTEMPOFFSET))</div><div class='hunk'>@@ -14717,8 +14601,7 @@ static bool wlc_phy_txpwr_srom_read_nphy(struct brcms_phy *pi)</div><div class='ctx'> 	pi-&gt;phy_txcore_enable_temp =</div><div class='ctx'> 		pi-&gt;phy_txcore_disable_temp - PHY_HYSTERESIS_DELTATEMP;</div><div class='ctx'> </div><div class='del'>-	pi-&gt;phycal_tempdelta =</div><div class='del'>-			(u8) wlapi_getintvar(shim, BRCMS_SROM_PHYCAL_TEMPDELTA);</div><div class='add'>+	pi-&gt;phycal_tempdelta = sprom-&gt;phycal_tempdelta;</div><div class='ctx'> 	if (pi-&gt;phycal_tempdelta &gt; NPHY_CAL_MAXTEMPDELTA)</div><div class='ctx'> 		pi-&gt;phycal_tempdelta = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -16353,11 +16236,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)</div><div class='ctx'> 			wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX,</div><div class='ctx'> 					       rfseq_rx2tx_events_rev3_ipa,</div><div class='ctx'> 					       rfseq_rx2tx_dlys_rev3_ipa,</div><div class='del'>-					       sizeof</div><div class='del'>-					       (rfseq_rx2tx_events_rev3_ipa) /</div><div class='del'>-					       sizeof</div><div class='del'>-					       (rfseq_rx2tx_events_rev3_ipa</div><div class='del'>-						[0]));</div><div class='add'>+					       ARRAY_SIZE(rfseq_rx2tx_events_rev3_ipa));</div><div class='ctx'> </div><div class='ctx'> 		mod_phy_reg(pi, 0x299, (0x3 &lt;&lt; 14), (0x1 &lt;&lt; 14));</div><div class='ctx'> 		mod_phy_reg(pi, 0x29d, (0x3 &lt;&lt; 14), (0x1 &lt;&lt; 14));</div><div class='hunk'>@@ -16858,18 +16737,13 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)</div><div class='ctx'> 		wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX,</div><div class='ctx'> 				       rfseq_tx2rx_events_rev3,</div><div class='ctx'> 				       rfseq_tx2rx_dlys_rev3,</div><div class='del'>-				       sizeof(rfseq_tx2rx_events_rev3) /</div><div class='del'>-				       sizeof(rfseq_tx2rx_events_rev3[0]));</div><div class='add'>+				       ARRAY_SIZE(rfseq_tx2rx_events_rev3));</div><div class='ctx'> </div><div class='ctx'> 		if (PHY_IPA(pi))</div><div class='ctx'> 			wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX,</div><div class='ctx'> 					       rfseq_rx2tx_events_rev3_ipa,</div><div class='ctx'> 					       rfseq_rx2tx_dlys_rev3_ipa,</div><div class='del'>-					       sizeof</div><div class='del'>-					       (rfseq_rx2tx_events_rev3_ipa) /</div><div class='del'>-					       sizeof</div><div class='del'>-					       (rfseq_rx2tx_events_rev3_ipa</div><div class='del'>-						[0]));</div><div class='add'>+					       ARRAY_SIZE(rfseq_rx2tx_events_rev3_ipa));</div><div class='ctx'> </div><div class='ctx'> 		if ((pi-&gt;sh-&gt;hw_phyrxchain != 0x3) &amp;&amp;</div><div class='ctx'> 		    (pi-&gt;sh-&gt;hw_phyrxchain != pi-&gt;sh-&gt;hw_phytxchain)) {</div><div class='hunk'>@@ -16885,8 +16759,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)</div><div class='ctx'> 				pi, NPHY_RFSEQ_RX2TX,</div><div class='ctx'> 				rfseq_rx2tx_events_rev3,</div><div class='ctx'> 				rfseq_rx2tx_dlys_rev3,</div><div class='del'>-				sizeof(rfseq_rx2tx_events_rev3)	/</div><div class='del'>-				sizeof(rfseq_rx2tx_events_rev3[0]));</div><div class='add'>+				ARRAY_SIZE(rfseq_rx2tx_events_rev3));</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (CHSPEC_IS2G(pi-&gt;radio_chanspec))</div><div class='hunk'>@@ -17209,13 +17082,11 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)</div><div class='ctx'> </div><div class='ctx'> 		wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, rfseq_rx2tx_events,</div><div class='ctx'> 				       rfseq_rx2tx_dlys,</div><div class='del'>-				       sizeof(rfseq_rx2tx_events) /</div><div class='del'>-				       sizeof(rfseq_rx2tx_events[0]));</div><div class='add'>+				       ARRAY_SIZE(rfseq_rx2tx_events));</div><div class='ctx'> </div><div class='ctx'> 		wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, rfseq_tx2rx_events,</div><div class='ctx'> 				       rfseq_tx2rx_dlys,</div><div class='del'>-				       sizeof(rfseq_tx2rx_events) /</div><div class='del'>-				       sizeof(rfseq_tx2rx_events[0]));</div><div class='add'>+				       ARRAY_SIZE(rfseq_tx2rx_events));</div><div class='ctx'> </div><div class='ctx'> 		wlc_phy_workarounds_nphy_gainctrl(pi);</div><div class='ctx'> </div><div class='hunk'>@@ -19357,8 +19228,7 @@ static void wlc_phy_spurwar_nphy(struct brcms_phy *pi)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (isAdjustNoiseVar) {</div><div class='del'>-				numTonesAdjust = sizeof(nphy_adj_tone_id_buf) /</div><div class='del'>-						sizeof(nphy_adj_tone_id_buf[0]);</div><div class='add'>+				numTonesAdjust = ARRAY_SIZE(nphy_adj_tone_id_buf);</div><div class='ctx'> </div><div class='ctx'> 				wlc_phy_adjust_min_noisevar_nphy(</div><div class='ctx'> 					pi,</div><div class='hunk'>@@ -21473,7 +21343,7 @@ void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init)</div><div class='ctx'> 		write_phy_reg(pi, 0xc8, 0x0);</div><div class='ctx'> 		write_phy_reg(pi, 0xc9, 0x0);</div><div class='ctx'> </div><div class='del'>-		ai_gpiocontrol(pi-&gt;sh-&gt;sih, mask, mask, GPIO_DRV_PRIORITY);</div><div class='add'>+		bcma_chipco_gpio_control(&amp;pi-&gt;d11core-&gt;bus-&gt;drv_cc, mask, mask);</div><div class='ctx'> </div><div class='ctx'> 		mc = bcma_read32(pi-&gt;d11core, D11REGOFFS(maccontrol));</div><div class='ctx'> 		mc &amp;= ~MCTL_GPOUT_SEL_MASK;</div><div class='hunk'>@@ -25204,32 +25074,26 @@ static u8 wlc_phy_a3_nphy(struct brcms_phy *pi, u8 start_gain, u8 core)</div><div class='ctx'> </div><div class='ctx'> 				phy_a15 = pad_gain_codes_used_2057rev5;</div><div class='ctx'> 				phy_a13 =</div><div class='del'>-					sizeof(pad_gain_codes_used_2057rev5) /</div><div class='del'>-					sizeof(pad_gain_codes_used_2057rev5</div><div class='del'>-						[0]) - 1;</div><div class='add'>+					ARRAY_SIZE(pad_gain_codes_used_2057rev5) - 1;</div><div class='ctx'> </div><div class='ctx'> 			} else if ((pi-&gt;pubpi.radiorev == 7)</div><div class='ctx'> 				   || (pi-&gt;pubpi.radiorev == 8)) {</div><div class='ctx'> </div><div class='ctx'> 				phy_a15 = pad_gain_codes_used_2057rev7;</div><div class='ctx'> 				phy_a13 =</div><div class='del'>-					sizeof(pad_gain_codes_used_2057rev7) /</div><div class='del'>-					sizeof(pad_gain_codes_used_2057rev7</div><div class='del'>-						[0]) - 1;</div><div class='add'>+					ARRAY_SIZE(pad_gain_codes_used_2057rev7) - 1;</div><div class='ctx'> </div><div class='ctx'> 			} else {</div><div class='ctx'> </div><div class='ctx'> 				phy_a15 = pad_all_gain_codes_2057;</div><div class='del'>-				phy_a13 = sizeof(pad_all_gain_codes_2057) /</div><div class='del'>-					  sizeof(pad_all_gain_codes_2057[0]) -</div><div class='add'>+				phy_a13 = ARRAY_SIZE(pad_all_gain_codes_2057) -</div><div class='ctx'> 					  1;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 		} else {</div><div class='ctx'> </div><div class='ctx'> 			phy_a15 = pga_all_gain_codes_2057;</div><div class='del'>-			phy_a13 = sizeof(pga_all_gain_codes_2057) /</div><div class='del'>-				  sizeof(pga_all_gain_codes_2057[0]) - 1;</div><div class='add'>+			phy_a13 = ARRAY_SIZE(pga_all_gain_codes_2057) - 1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		phy_a14 = 0;</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/phy_shim.c b/drivers/net/wireless/brcm80211/brcmsmac/phy_shim.c<br/>index 5926854f62e2..a0de5db0cd64 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/phy_shim.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/phy_shim.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/phy_shim.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/phy_shim.c</a></div><div class='hunk'>@@ -214,12 +214,3 @@ wlapi_copyto_objmem(struct phy_shim_info *physhim, uint offset, const void *buf,</div><div class='ctx'> {</div><div class='ctx'> 	brcms_b_copyto_objmem(physhim-&gt;wlc_hw, offset, buf, l, sel);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-char *wlapi_getvar(struct phy_shim_info *physhim, enum brcms_srom_id id)</div><div class='del'>-{</div><div class='del'>-	return getvar(physhim-&gt;wlc_hw-&gt;sih, id);</div><div class='del'>-}</div><div class='del'>-int wlapi_getintvar(struct phy_shim_info *physhim, enum brcms_srom_id id)</div><div class='del'>-{</div><div class='del'>-	return getintvar(physhim-&gt;wlc_hw-&gt;sih, id);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/phy_shim.h b/drivers/net/wireless/brcm80211/brcmsmac/phy_shim.h<br/>index 9168c459b185..2c5b66b75970 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/phy_shim.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/phy_shim.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/phy_shim.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/phy_shim.h</a></div><div class='hunk'>@@ -175,8 +175,5 @@ extern void wlapi_copyto_objmem(struct phy_shim_info *physhim, uint,</div><div class='ctx'> extern void wlapi_high_update_phy_mode(struct phy_shim_info *physhim,</div><div class='ctx'> 				       u32 phy_mode);</div><div class='ctx'> extern u16 wlapi_bmac_get_txant(struct phy_shim_info *physhim);</div><div class='del'>-extern char *wlapi_getvar(struct phy_shim_info *physhim, enum brcms_srom_id id);</div><div class='del'>-extern int wlapi_getintvar(struct phy_shim_info *physhim,</div><div class='del'>-			   enum brcms_srom_id id);</div><div class='ctx'> </div><div class='ctx'> #endif				/* _BRCM_PHY_SHIM_H_ */</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/pub.h b/drivers/net/wireless/brcm80211/brcmsmac/pub.h<br/>index f0038ad7d7bf..aa5d67f8d874 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/pub.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/pub.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/pub.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/pub.h</a></div><div class='hunk'>@@ -22,232 +22,6 @@</div><div class='ctx'> #include "types.h"</div><div class='ctx'> #include "defs.h"</div><div class='ctx'> </div><div class='del'>-enum brcms_srom_id {</div><div class='del'>-	BRCMS_SROM_NULL,</div><div class='del'>-	BRCMS_SROM_CONT,</div><div class='del'>-	BRCMS_SROM_AA2G,</div><div class='del'>-	BRCMS_SROM_AA5G,</div><div class='del'>-	BRCMS_SROM_AG0,</div><div class='del'>-	BRCMS_SROM_AG1,</div><div class='del'>-	BRCMS_SROM_AG2,</div><div class='del'>-	BRCMS_SROM_AG3,</div><div class='del'>-	BRCMS_SROM_ANTSWCTL2G,</div><div class='del'>-	BRCMS_SROM_ANTSWCTL5G,</div><div class='del'>-	BRCMS_SROM_ANTSWITCH,</div><div class='del'>-	BRCMS_SROM_BOARDFLAGS2,</div><div class='del'>-	BRCMS_SROM_BOARDFLAGS,</div><div class='del'>-	BRCMS_SROM_BOARDNUM,</div><div class='del'>-	BRCMS_SROM_BOARDREV,</div><div class='del'>-	BRCMS_SROM_BOARDTYPE,</div><div class='del'>-	BRCMS_SROM_BW40PO,</div><div class='del'>-	BRCMS_SROM_BWDUPPO,</div><div class='del'>-	BRCMS_SROM_BXA2G,</div><div class='del'>-	BRCMS_SROM_BXA5G,</div><div class='del'>-	BRCMS_SROM_CC,</div><div class='del'>-	BRCMS_SROM_CCK2GPO,</div><div class='del'>-	BRCMS_SROM_CCKBW202GPO,</div><div class='del'>-	BRCMS_SROM_CCKBW20UL2GPO,</div><div class='del'>-	BRCMS_SROM_CCODE,</div><div class='del'>-	BRCMS_SROM_CDDPO,</div><div class='del'>-	BRCMS_SROM_DEVID,</div><div class='del'>-	BRCMS_SROM_ET1MACADDR,</div><div class='del'>-	BRCMS_SROM_EXTPAGAIN2G,</div><div class='del'>-	BRCMS_SROM_EXTPAGAIN5G,</div><div class='del'>-	BRCMS_SROM_FREQOFFSET_CORR,</div><div class='del'>-	BRCMS_SROM_HW_IQCAL_EN,</div><div class='del'>-	BRCMS_SROM_IL0MACADDR,</div><div class='del'>-	BRCMS_SROM_IQCAL_SWP_DIS,</div><div class='del'>-	BRCMS_SROM_LEDBH0,</div><div class='del'>-	BRCMS_SROM_LEDBH1,</div><div class='del'>-	BRCMS_SROM_LEDBH2,</div><div class='del'>-	BRCMS_SROM_LEDBH3,</div><div class='del'>-	BRCMS_SROM_LEDDC,</div><div class='del'>-	BRCMS_SROM_LEGOFDM40DUPPO,</div><div class='del'>-	BRCMS_SROM_LEGOFDMBW202GPO,</div><div class='del'>-	BRCMS_SROM_LEGOFDMBW205GHPO,</div><div class='del'>-	BRCMS_SROM_LEGOFDMBW205GLPO,</div><div class='del'>-	BRCMS_SROM_LEGOFDMBW205GMPO,</div><div class='del'>-	BRCMS_SROM_LEGOFDMBW20UL2GPO,</div><div class='del'>-	BRCMS_SROM_LEGOFDMBW20UL5GHPO,</div><div class='del'>-	BRCMS_SROM_LEGOFDMBW20UL5GLPO,</div><div class='del'>-	BRCMS_SROM_LEGOFDMBW20UL5GMPO,</div><div class='del'>-	BRCMS_SROM_MACADDR,</div><div class='del'>-	BRCMS_SROM_MCS2GPO0,</div><div class='del'>-	BRCMS_SROM_MCS2GPO1,</div><div class='del'>-	BRCMS_SROM_MCS2GPO2,</div><div class='del'>-	BRCMS_SROM_MCS2GPO3,</div><div class='del'>-	BRCMS_SROM_MCS2GPO4,</div><div class='del'>-	BRCMS_SROM_MCS2GPO5,</div><div class='del'>-	BRCMS_SROM_MCS2GPO6,</div><div class='del'>-	BRCMS_SROM_MCS2GPO7,</div><div class='del'>-	BRCMS_SROM_MCS32PO,</div><div class='del'>-	BRCMS_SROM_MCS5GHPO0,</div><div class='del'>-	BRCMS_SROM_MCS5GHPO1,</div><div class='del'>-	BRCMS_SROM_MCS5GHPO2,</div><div class='del'>-	BRCMS_SROM_MCS5GHPO3,</div><div class='del'>-	BRCMS_SROM_MCS5GHPO4,</div><div class='del'>-	BRCMS_SROM_MCS5GHPO5,</div><div class='del'>-	BRCMS_SROM_MCS5GHPO6,</div><div class='del'>-	BRCMS_SROM_MCS5GHPO7,</div><div class='del'>-	BRCMS_SROM_MCS5GLPO0,</div><div class='del'>-	BRCMS_SROM_MCS5GLPO1,</div><div class='del'>-	BRCMS_SROM_MCS5GLPO2,</div><div class='del'>-	BRCMS_SROM_MCS5GLPO3,</div><div class='del'>-	BRCMS_SROM_MCS5GLPO4,</div><div class='del'>-	BRCMS_SROM_MCS5GLPO5,</div><div class='del'>-	BRCMS_SROM_MCS5GLPO6,</div><div class='del'>-	BRCMS_SROM_MCS5GLPO7,</div><div class='del'>-	BRCMS_SROM_MCS5GPO0,</div><div class='del'>-	BRCMS_SROM_MCS5GPO1,</div><div class='del'>-	BRCMS_SROM_MCS5GPO2,</div><div class='del'>-	BRCMS_SROM_MCS5GPO3,</div><div class='del'>-	BRCMS_SROM_MCS5GPO4,</div><div class='del'>-	BRCMS_SROM_MCS5GPO5,</div><div class='del'>-	BRCMS_SROM_MCS5GPO6,</div><div class='del'>-	BRCMS_SROM_MCS5GPO7,</div><div class='del'>-	BRCMS_SROM_MCSBW202GPO,</div><div class='del'>-	BRCMS_SROM_MCSBW205GHPO,</div><div class='del'>-	BRCMS_SROM_MCSBW205GLPO,</div><div class='del'>-	BRCMS_SROM_MCSBW205GMPO,</div><div class='del'>-	BRCMS_SROM_MCSBW20UL2GPO,</div><div class='del'>-	BRCMS_SROM_MCSBW20UL5GHPO,</div><div class='del'>-	BRCMS_SROM_MCSBW20UL5GLPO,</div><div class='del'>-	BRCMS_SROM_MCSBW20UL5GMPO,</div><div class='del'>-	BRCMS_SROM_MCSBW402GPO,</div><div class='del'>-	BRCMS_SROM_MCSBW405GHPO,</div><div class='del'>-	BRCMS_SROM_MCSBW405GLPO,</div><div class='del'>-	BRCMS_SROM_MCSBW405GMPO,</div><div class='del'>-	BRCMS_SROM_MEASPOWER,</div><div class='del'>-	BRCMS_SROM_OFDM2GPO,</div><div class='del'>-	BRCMS_SROM_OFDM5GHPO,</div><div class='del'>-	BRCMS_SROM_OFDM5GLPO,</div><div class='del'>-	BRCMS_SROM_OFDM5GPO,</div><div class='del'>-	BRCMS_SROM_OPO,</div><div class='del'>-	BRCMS_SROM_PA0B0,</div><div class='del'>-	BRCMS_SROM_PA0B1,</div><div class='del'>-	BRCMS_SROM_PA0B2,</div><div class='del'>-	BRCMS_SROM_PA0ITSSIT,</div><div class='del'>-	BRCMS_SROM_PA0MAXPWR,</div><div class='del'>-	BRCMS_SROM_PA1B0,</div><div class='del'>-	BRCMS_SROM_PA1B1,</div><div class='del'>-	BRCMS_SROM_PA1B2,</div><div class='del'>-	BRCMS_SROM_PA1HIB0,</div><div class='del'>-	BRCMS_SROM_PA1HIB1,</div><div class='del'>-	BRCMS_SROM_PA1HIB2,</div><div class='del'>-	BRCMS_SROM_PA1HIMAXPWR,</div><div class='del'>-	BRCMS_SROM_PA1ITSSIT,</div><div class='del'>-	BRCMS_SROM_PA1LOB0,</div><div class='del'>-	BRCMS_SROM_PA1LOB1,</div><div class='del'>-	BRCMS_SROM_PA1LOB2,</div><div class='del'>-	BRCMS_SROM_PA1LOMAXPWR,</div><div class='del'>-	BRCMS_SROM_PA1MAXPWR,</div><div class='del'>-	BRCMS_SROM_PDETRANGE2G,</div><div class='del'>-	BRCMS_SROM_PDETRANGE5G,</div><div class='del'>-	BRCMS_SROM_PHYCAL_TEMPDELTA,</div><div class='del'>-	BRCMS_SROM_RAWTEMPSENSE,</div><div class='del'>-	BRCMS_SROM_REGREV,</div><div class='del'>-	BRCMS_SROM_REV,</div><div class='del'>-	BRCMS_SROM_RSSISAV2G,</div><div class='del'>-	BRCMS_SROM_RSSISAV5G,</div><div class='del'>-	BRCMS_SROM_RSSISMC2G,</div><div class='del'>-	BRCMS_SROM_RSSISMC5G,</div><div class='del'>-	BRCMS_SROM_RSSISMF2G,</div><div class='del'>-	BRCMS_SROM_RSSISMF5G,</div><div class='del'>-	BRCMS_SROM_RXCHAIN,</div><div class='del'>-	BRCMS_SROM_RXPO2G,</div><div class='del'>-	BRCMS_SROM_RXPO5G,</div><div class='del'>-	BRCMS_SROM_STBCPO,</div><div class='del'>-	BRCMS_SROM_TEMPCORRX,</div><div class='del'>-	BRCMS_SROM_TEMPOFFSET,</div><div class='del'>-	BRCMS_SROM_TEMPSENSE_OPTION,</div><div class='del'>-	BRCMS_SROM_TEMPSENSE_SLOPE,</div><div class='del'>-	BRCMS_SROM_TEMPTHRESH,</div><div class='del'>-	BRCMS_SROM_TRI2G,</div><div class='del'>-	BRCMS_SROM_TRI5GH,</div><div class='del'>-	BRCMS_SROM_TRI5GL,</div><div class='del'>-	BRCMS_SROM_TRI5G,</div><div class='del'>-	BRCMS_SROM_TRISO2G,</div><div class='del'>-	BRCMS_SROM_TRISO5G,</div><div class='del'>-	BRCMS_SROM_TSSIPOS2G,</div><div class='del'>-	BRCMS_SROM_TSSIPOS5G,</div><div class='del'>-	BRCMS_SROM_TXCHAIN,</div><div class='del'>-	/*</div><div class='del'>-	 * per-path identifiers (see srom.c)</div><div class='del'>-	 */</div><div class='del'>-	BRCMS_SROM_ITT2GA0,</div><div class='del'>-	BRCMS_SROM_ITT2GA1,</div><div class='del'>-	BRCMS_SROM_ITT2GA2,</div><div class='del'>-	BRCMS_SROM_ITT2GA3,</div><div class='del'>-	BRCMS_SROM_ITT5GA0,</div><div class='del'>-	BRCMS_SROM_ITT5GA1,</div><div class='del'>-	BRCMS_SROM_ITT5GA2,</div><div class='del'>-	BRCMS_SROM_ITT5GA3,</div><div class='del'>-	BRCMS_SROM_MAXP2GA0,</div><div class='del'>-	BRCMS_SROM_MAXP2GA1,</div><div class='del'>-	BRCMS_SROM_MAXP2GA2,</div><div class='del'>-	BRCMS_SROM_MAXP2GA3,</div><div class='del'>-	BRCMS_SROM_MAXP5GA0,</div><div class='del'>-	BRCMS_SROM_MAXP5GA1,</div><div class='del'>-	BRCMS_SROM_MAXP5GA2,</div><div class='del'>-	BRCMS_SROM_MAXP5GA3,</div><div class='del'>-	BRCMS_SROM_MAXP5GHA0,</div><div class='del'>-	BRCMS_SROM_MAXP5GHA1,</div><div class='del'>-	BRCMS_SROM_MAXP5GHA2,</div><div class='del'>-	BRCMS_SROM_MAXP5GHA3,</div><div class='del'>-	BRCMS_SROM_MAXP5GLA0,</div><div class='del'>-	BRCMS_SROM_MAXP5GLA1,</div><div class='del'>-	BRCMS_SROM_MAXP5GLA2,</div><div class='del'>-	BRCMS_SROM_MAXP5GLA3,</div><div class='del'>-	BRCMS_SROM_PA2GW0A0,</div><div class='del'>-	BRCMS_SROM_PA2GW0A1,</div><div class='del'>-	BRCMS_SROM_PA2GW0A2,</div><div class='del'>-	BRCMS_SROM_PA2GW0A3,</div><div class='del'>-	BRCMS_SROM_PA2GW1A0,</div><div class='del'>-	BRCMS_SROM_PA2GW1A1,</div><div class='del'>-	BRCMS_SROM_PA2GW1A2,</div><div class='del'>-	BRCMS_SROM_PA2GW1A3,</div><div class='del'>-	BRCMS_SROM_PA2GW2A0,</div><div class='del'>-	BRCMS_SROM_PA2GW2A1,</div><div class='del'>-	BRCMS_SROM_PA2GW2A2,</div><div class='del'>-	BRCMS_SROM_PA2GW2A3,</div><div class='del'>-	BRCMS_SROM_PA5GHW0A0,</div><div class='del'>-	BRCMS_SROM_PA5GHW0A1,</div><div class='del'>-	BRCMS_SROM_PA5GHW0A2,</div><div class='del'>-	BRCMS_SROM_PA5GHW0A3,</div><div class='del'>-	BRCMS_SROM_PA5GHW1A0,</div><div class='del'>-	BRCMS_SROM_PA5GHW1A1,</div><div class='del'>-	BRCMS_SROM_PA5GHW1A2,</div><div class='del'>-	BRCMS_SROM_PA5GHW1A3,</div><div class='del'>-	BRCMS_SROM_PA5GHW2A0,</div><div class='del'>-	BRCMS_SROM_PA5GHW2A1,</div><div class='del'>-	BRCMS_SROM_PA5GHW2A2,</div><div class='del'>-	BRCMS_SROM_PA5GHW2A3,</div><div class='del'>-	BRCMS_SROM_PA5GLW0A0,</div><div class='del'>-	BRCMS_SROM_PA5GLW0A1,</div><div class='del'>-	BRCMS_SROM_PA5GLW0A2,</div><div class='del'>-	BRCMS_SROM_PA5GLW0A3,</div><div class='del'>-	BRCMS_SROM_PA5GLW1A0,</div><div class='del'>-	BRCMS_SROM_PA5GLW1A1,</div><div class='del'>-	BRCMS_SROM_PA5GLW1A2,</div><div class='del'>-	BRCMS_SROM_PA5GLW1A3,</div><div class='del'>-	BRCMS_SROM_PA5GLW2A0,</div><div class='del'>-	BRCMS_SROM_PA5GLW2A1,</div><div class='del'>-	BRCMS_SROM_PA5GLW2A2,</div><div class='del'>-	BRCMS_SROM_PA5GLW2A3,</div><div class='del'>-	BRCMS_SROM_PA5GW0A0,</div><div class='del'>-	BRCMS_SROM_PA5GW0A1,</div><div class='del'>-	BRCMS_SROM_PA5GW0A2,</div><div class='del'>-	BRCMS_SROM_PA5GW0A3,</div><div class='del'>-	BRCMS_SROM_PA5GW1A0,</div><div class='del'>-	BRCMS_SROM_PA5GW1A1,</div><div class='del'>-	BRCMS_SROM_PA5GW1A2,</div><div class='del'>-	BRCMS_SROM_PA5GW1A3,</div><div class='del'>-	BRCMS_SROM_PA5GW2A0,</div><div class='del'>-	BRCMS_SROM_PA5GW2A1,</div><div class='del'>-	BRCMS_SROM_PA5GW2A2,</div><div class='del'>-	BRCMS_SROM_PA5GW2A3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define	BRCMS_NUMRATES	16	/* max # of rates in a rateset */</div><div class='ctx'> </div><div class='ctx'> /* phy types */</div><div class='hunk'>@@ -565,8 +339,6 @@ extern void brcms_c_ampdu_flush(struct brcms_c_info *wlc,</div><div class='ctx'> 			    struct ieee80211_sta *sta, u16 tid);</div><div class='ctx'> extern void brcms_c_ampdu_tx_operational(struct brcms_c_info *wlc, u8 tid,</div><div class='ctx'> 					 u8 ba_wsize, uint max_rx_ampdu_bytes);</div><div class='del'>-extern char *getvar(struct si_pub *sih, enum brcms_srom_id id);</div><div class='del'>-extern int getintvar(struct si_pub *sih, enum brcms_srom_id id);</div><div class='ctx'> extern int brcms_c_module_register(struct brcms_pub *pub,</div><div class='ctx'> 				   const char *name, struct brcms_info *hdl,</div><div class='ctx'> 				   int (*down_fn)(void *handle));</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/srom.c b/drivers/net/wireless/brcm80211/brcmsmac/srom.c<br/>deleted file mode 100644<br/>index b96f4b9d74bd..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/srom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/srom.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,980 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2010 Broadcom Corporation</div><div class='del'>- *</div><div class='del'>- * Permission to use, copy, modify, and/or distribute this software for any</div><div class='del'>- * purpose with or without fee is hereby granted, provided that the above</div><div class='del'>- * copyright notice and this permission notice appear in all copies.</div><div class='del'>- *</div><div class='del'>- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='del'>- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='del'>- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY</div><div class='del'>- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='del'>- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION</div><div class='del'>- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN</div><div class='del'>- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/crc8.h&gt;</div><div class='del'>-#include &lt;stdarg.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;chipcommon.h&gt;</div><div class='del'>-#include &lt;brcmu_utils.h&gt;</div><div class='del'>-#include "pub.h"</div><div class='del'>-#include "nicpci.h"</div><div class='del'>-#include "aiutils.h"</div><div class='del'>-#include "otp.h"</div><div class='del'>-#include "srom.h"</div><div class='del'>-#include "soc.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SROM CRC8 polynomial value:</div><div class='del'>- *</div><div class='del'>- * x^8 + x^7 +x^6 + x^4 + x^2 + 1</div><div class='del'>- */</div><div class='del'>-#define SROM_CRC8_POLY		0xAB</div><div class='del'>-</div><div class='del'>-/* Maximum srom: 6 Kilobits == 768 bytes */</div><div class='del'>-#define	SROM_MAX		768</div><div class='del'>-</div><div class='del'>-/* PCI fields */</div><div class='del'>-#define PCI_F0DEVID		48</div><div class='del'>-</div><div class='del'>-#define	SROM_WORDS		64</div><div class='del'>-</div><div class='del'>-#define	SROM_SSID		2</div><div class='del'>-</div><div class='del'>-#define	SROM_WL1LHMAXP		29</div><div class='del'>-</div><div class='del'>-#define	SROM_WL1LPAB0		30</div><div class='del'>-#define	SROM_WL1LPAB1		31</div><div class='del'>-#define	SROM_WL1LPAB2		32</div><div class='del'>-</div><div class='del'>-#define	SROM_WL1HPAB0		33</div><div class='del'>-#define	SROM_WL1HPAB1		34</div><div class='del'>-#define	SROM_WL1HPAB2		35</div><div class='del'>-</div><div class='del'>-#define	SROM_MACHI_IL0		36</div><div class='del'>-#define	SROM_MACMID_IL0		37</div><div class='del'>-#define	SROM_MACLO_IL0		38</div><div class='del'>-#define	SROM_MACHI_ET1		42</div><div class='del'>-#define	SROM_MACMID_ET1		43</div><div class='del'>-#define	SROM_MACLO_ET1		44</div><div class='del'>-</div><div class='del'>-#define	SROM_BXARSSI2G		40</div><div class='del'>-#define	SROM_BXARSSI5G		41</div><div class='del'>-</div><div class='del'>-#define	SROM_TRI52G		42</div><div class='del'>-#define	SROM_TRI5GHL		43</div><div class='del'>-</div><div class='del'>-#define	SROM_RXPO52G		45</div><div class='del'>-</div><div class='del'>-#define	SROM_AABREV		46</div><div class='del'>-/* Fields in AABREV */</div><div class='del'>-#define	SROM_BR_MASK		0x00ff</div><div class='del'>-#define	SROM_CC_MASK		0x0f00</div><div class='del'>-#define	SROM_CC_SHIFT		8</div><div class='del'>-#define	SROM_AA0_MASK		0x3000</div><div class='del'>-#define	SROM_AA0_SHIFT		12</div><div class='del'>-#define	SROM_AA1_MASK		0xc000</div><div class='del'>-#define	SROM_AA1_SHIFT		14</div><div class='del'>-</div><div class='del'>-#define	SROM_WL0PAB0		47</div><div class='del'>-#define	SROM_WL0PAB1		48</div><div class='del'>-#define	SROM_WL0PAB2		49</div><div class='del'>-</div><div class='del'>-#define	SROM_LEDBH10		50</div><div class='del'>-#define	SROM_LEDBH32		51</div><div class='del'>-</div><div class='del'>-#define	SROM_WL10MAXP		52</div><div class='del'>-</div><div class='del'>-#define	SROM_WL1PAB0		53</div><div class='del'>-#define	SROM_WL1PAB1		54</div><div class='del'>-#define	SROM_WL1PAB2		55</div><div class='del'>-</div><div class='del'>-#define	SROM_ITT		56</div><div class='del'>-</div><div class='del'>-#define	SROM_BFL		57</div><div class='del'>-#define	SROM_BFL2		28</div><div class='del'>-</div><div class='del'>-#define	SROM_AG10		58</div><div class='del'>-</div><div class='del'>-#define	SROM_CCODE		59</div><div class='del'>-</div><div class='del'>-#define	SROM_OPO		60</div><div class='del'>-</div><div class='del'>-#define	SROM_CRCREV		63</div><div class='del'>-</div><div class='del'>-#define	SROM4_WORDS		220</div><div class='del'>-</div><div class='del'>-#define SROM4_TXCHAIN_MASK	0x000f</div><div class='del'>-#define SROM4_RXCHAIN_MASK	0x00f0</div><div class='del'>-#define SROM4_SWITCH_MASK	0xff00</div><div class='del'>-</div><div class='del'>-/* Per-path fields */</div><div class='del'>-#define	MAX_PATH_SROM		4</div><div class='del'>-</div><div class='del'>-#define	SROM4_CRCREV		219</div><div class='del'>-</div><div class='del'>-/* SROM Rev 8: Make space for a 48word hardware header for PCIe rev &gt;= 6.</div><div class='del'>- * This is acombined srom for both MIMO and SISO boards, usable in</div><div class='del'>- * the .130 4Kilobit OTP with hardware redundancy.</div><div class='del'>- */</div><div class='del'>-#define	SROM8_BREV		65</div><div class='del'>-</div><div class='del'>-#define	SROM8_BFL0		66</div><div class='del'>-#define	SROM8_BFL1		67</div><div class='del'>-#define	SROM8_BFL2		68</div><div class='del'>-#define	SROM8_BFL3		69</div><div class='del'>-</div><div class='del'>-#define	SROM8_MACHI		70</div><div class='del'>-#define	SROM8_MACMID		71</div><div class='del'>-#define	SROM8_MACLO		72</div><div class='del'>-</div><div class='del'>-#define	SROM8_CCODE		73</div><div class='del'>-#define	SROM8_REGREV		74</div><div class='del'>-</div><div class='del'>-#define	SROM8_LEDBH10		75</div><div class='del'>-#define	SROM8_LEDBH32		76</div><div class='del'>-</div><div class='del'>-#define	SROM8_LEDDC		77</div><div class='del'>-</div><div class='del'>-#define	SROM8_AA		78</div><div class='del'>-</div><div class='del'>-#define	SROM8_AG10		79</div><div class='del'>-#define	SROM8_AG32		80</div><div class='del'>-</div><div class='del'>-#define	SROM8_TXRXC		81</div><div class='del'>-</div><div class='del'>-#define	SROM8_BXARSSI2G		82</div><div class='del'>-#define	SROM8_BXARSSI5G		83</div><div class='del'>-#define	SROM8_TRI52G		84</div><div class='del'>-#define	SROM8_TRI5GHL		85</div><div class='del'>-#define	SROM8_RXPO52G		86</div><div class='del'>-</div><div class='del'>-#define SROM8_FEM2G		87</div><div class='del'>-#define SROM8_FEM5G		88</div><div class='del'>-#define SROM8_FEM_ANTSWLUT_MASK		0xf800</div><div class='del'>-#define SROM8_FEM_ANTSWLUT_SHIFT	11</div><div class='del'>-#define SROM8_FEM_TR_ISO_MASK		0x0700</div><div class='del'>-#define SROM8_FEM_TR_ISO_SHIFT		8</div><div class='del'>-#define SROM8_FEM_PDET_RANGE_MASK	0x00f8</div><div class='del'>-#define SROM8_FEM_PDET_RANGE_SHIFT	3</div><div class='del'>-#define SROM8_FEM_EXTPA_GAIN_MASK	0x0006</div><div class='del'>-#define SROM8_FEM_EXTPA_GAIN_SHIFT	1</div><div class='del'>-#define SROM8_FEM_TSSIPOS_MASK		0x0001</div><div class='del'>-#define SROM8_FEM_TSSIPOS_SHIFT		0</div><div class='del'>-</div><div class='del'>-#define SROM8_THERMAL		89</div><div class='del'>-</div><div class='del'>-/* Temp sense related entries */</div><div class='del'>-#define SROM8_MPWR_RAWTS		90</div><div class='del'>-#define SROM8_TS_SLP_OPT_CORRX	91</div><div class='del'>-/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable,</div><div class='del'>- * IQSWP: IQ CAL swap disable */</div><div class='del'>-#define SROM8_FOC_HWIQ_IQSWP	92</div><div class='del'>-</div><div class='del'>-/* Temperature delta for PHY calibration */</div><div class='del'>-#define SROM8_PHYCAL_TEMPDELTA	93</div><div class='del'>-</div><div class='del'>-/* Per-path offsets &amp; fields */</div><div class='del'>-#define	SROM8_PATH0		96</div><div class='del'>-#define	SROM8_PATH1		112</div><div class='del'>-#define	SROM8_PATH2		128</div><div class='del'>-#define	SROM8_PATH3		144</div><div class='del'>-</div><div class='del'>-#define	SROM8_2G_ITT_MAXP	0</div><div class='del'>-#define	SROM8_2G_PA		1</div><div class='del'>-#define	SROM8_5G_ITT_MAXP	4</div><div class='del'>-#define	SROM8_5GLH_MAXP		5</div><div class='del'>-#define	SROM8_5G_PA		6</div><div class='del'>-#define	SROM8_5GL_PA		9</div><div class='del'>-#define	SROM8_5GH_PA		12</div><div class='del'>-</div><div class='del'>-/* All the miriad power offsets */</div><div class='del'>-#define	SROM8_2G_CCKPO		160</div><div class='del'>-</div><div class='del'>-#define	SROM8_2G_OFDMPO		161</div><div class='del'>-#define	SROM8_5G_OFDMPO		163</div><div class='del'>-#define	SROM8_5GL_OFDMPO	165</div><div class='del'>-#define	SROM8_5GH_OFDMPO	167</div><div class='del'>-</div><div class='del'>-#define	SROM8_2G_MCSPO		169</div><div class='del'>-#define	SROM8_5G_MCSPO		177</div><div class='del'>-#define	SROM8_5GL_MCSPO		185</div><div class='del'>-#define	SROM8_5GH_MCSPO		193</div><div class='del'>-</div><div class='del'>-#define	SROM8_CDDPO		201</div><div class='del'>-#define	SROM8_STBCPO		202</div><div class='del'>-#define	SROM8_BW40PO		203</div><div class='del'>-#define	SROM8_BWDUPPO		204</div><div class='del'>-</div><div class='del'>-/* SISO PA parameters are in the path0 spaces */</div><div class='del'>-#define	SROM8_SISO		96</div><div class='del'>-</div><div class='del'>-/* Legacy names for SISO PA paramters */</div><div class='del'>-#define	SROM8_W0_ITTMAXP	(SROM8_SISO + SROM8_2G_ITT_MAXP)</div><div class='del'>-#define	SROM8_W0_PAB0		(SROM8_SISO + SROM8_2G_PA)</div><div class='del'>-#define	SROM8_W0_PAB1		(SROM8_SISO + SROM8_2G_PA + 1)</div><div class='del'>-#define	SROM8_W0_PAB2		(SROM8_SISO + SROM8_2G_PA + 2)</div><div class='del'>-#define	SROM8_W1_ITTMAXP	(SROM8_SISO + SROM8_5G_ITT_MAXP)</div><div class='del'>-#define	SROM8_W1_MAXP_LCHC	(SROM8_SISO + SROM8_5GLH_MAXP)</div><div class='del'>-#define	SROM8_W1_PAB0		(SROM8_SISO + SROM8_5G_PA)</div><div class='del'>-#define	SROM8_W1_PAB1		(SROM8_SISO + SROM8_5G_PA + 1)</div><div class='del'>-#define	SROM8_W1_PAB2		(SROM8_SISO + SROM8_5G_PA + 2)</div><div class='del'>-#define	SROM8_W1_PAB0_LC	(SROM8_SISO + SROM8_5GL_PA)</div><div class='del'>-#define	SROM8_W1_PAB1_LC	(SROM8_SISO + SROM8_5GL_PA + 1)</div><div class='del'>-#define	SROM8_W1_PAB2_LC	(SROM8_SISO + SROM8_5GL_PA + 2)</div><div class='del'>-#define	SROM8_W1_PAB0_HC	(SROM8_SISO + SROM8_5GH_PA)</div><div class='del'>-#define	SROM8_W1_PAB1_HC	(SROM8_SISO + SROM8_5GH_PA + 1)</div><div class='del'>-#define	SROM8_W1_PAB2_HC	(SROM8_SISO + SROM8_5GH_PA + 2)</div><div class='del'>-</div><div class='del'>-/* SROM REV 9 */</div><div class='del'>-#define SROM9_2GPO_CCKBW20	160</div><div class='del'>-#define SROM9_2GPO_CCKBW20UL	161</div><div class='del'>-#define SROM9_2GPO_LOFDMBW20	162</div><div class='del'>-#define SROM9_2GPO_LOFDMBW20UL	164</div><div class='del'>-</div><div class='del'>-#define SROM9_5GLPO_LOFDMBW20	166</div><div class='del'>-#define SROM9_5GLPO_LOFDMBW20UL	168</div><div class='del'>-#define SROM9_5GMPO_LOFDMBW20	170</div><div class='del'>-#define SROM9_5GMPO_LOFDMBW20UL	172</div><div class='del'>-#define SROM9_5GHPO_LOFDMBW20	174</div><div class='del'>-#define SROM9_5GHPO_LOFDMBW20UL	176</div><div class='del'>-</div><div class='del'>-#define SROM9_2GPO_MCSBW20	178</div><div class='del'>-#define SROM9_2GPO_MCSBW20UL	180</div><div class='del'>-#define SROM9_2GPO_MCSBW40	182</div><div class='del'>-</div><div class='del'>-#define SROM9_5GLPO_MCSBW20	184</div><div class='del'>-#define SROM9_5GLPO_MCSBW20UL	186</div><div class='del'>-#define SROM9_5GLPO_MCSBW40	188</div><div class='del'>-#define SROM9_5GMPO_MCSBW20	190</div><div class='del'>-#define SROM9_5GMPO_MCSBW20UL	192</div><div class='del'>-#define SROM9_5GMPO_MCSBW40	194</div><div class='del'>-#define SROM9_5GHPO_MCSBW20	196</div><div class='del'>-#define SROM9_5GHPO_MCSBW20UL	198</div><div class='del'>-#define SROM9_5GHPO_MCSBW40	200</div><div class='del'>-</div><div class='del'>-#define SROM9_PO_MCS32		202</div><div class='del'>-#define SROM9_PO_LOFDM40DUP	203</div><div class='del'>-</div><div class='del'>-/* SROM flags (see sromvar_t) */</div><div class='del'>-</div><div class='del'>-/* value continues as described by the next entry */</div><div class='del'>-#define SRFL_MORE	1</div><div class='del'>-#define	SRFL_NOFFS	2	/* value bits can't be all one's */</div><div class='del'>-#define	SRFL_PRHEX	4	/* value is in hexdecimal format */</div><div class='del'>-#define	SRFL_PRSIGN	8	/* value is in signed decimal format */</div><div class='del'>-#define	SRFL_CCODE	0x10	/* value is in country code format */</div><div class='del'>-#define	SRFL_ETHADDR	0x20	/* value is an Ethernet address */</div><div class='del'>-#define SRFL_LEDDC	0x40	/* value is an LED duty cycle */</div><div class='del'>-/* do not generate a nvram param, entry is for mfgc */</div><div class='del'>-#define SRFL_NOVAR	0x80</div><div class='del'>-</div><div class='del'>-/* Max. nvram variable table size */</div><div class='del'>-#define	MAXSZ_NVRAM_VARS	4096</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * indicates type of value.</div><div class='del'>- */</div><div class='del'>-enum brcms_srom_var_type {</div><div class='del'>-	BRCMS_SROM_STRING,</div><div class='del'>-	BRCMS_SROM_SNUMBER,</div><div class='del'>-	BRCMS_SROM_UNUMBER</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * storage type for srom variable.</div><div class='del'>- *</div><div class='del'>- * var_list: for linked list operations.</div><div class='del'>- * varid: identifier of the variable.</div><div class='del'>- * var_type: type of variable.</div><div class='del'>- * buf: variable value when var_type == BRCMS_SROM_STRING.</div><div class='del'>- * uval: unsigned variable value when var_type == BRCMS_SROM_UNUMBER.</div><div class='del'>- * sval: signed variable value when var_type == BRCMS_SROM_SNUMBER.</div><div class='del'>- */</div><div class='del'>-struct brcms_srom_list_head {</div><div class='del'>-	struct list_head var_list;</div><div class='del'>-	enum brcms_srom_id varid;</div><div class='del'>-	enum brcms_srom_var_type var_type;</div><div class='del'>-	union {</div><div class='del'>-		char buf[0];</div><div class='del'>-		u32 uval;</div><div class='del'>-		s32 sval;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct brcms_sromvar {</div><div class='del'>-	enum brcms_srom_id varid;</div><div class='del'>-	u32 revmask;</div><div class='del'>-	u32 flags;</div><div class='del'>-	u16 off;</div><div class='del'>-	u16 mask;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct brcms_varbuf {</div><div class='del'>-	char *base;		/* pointer to buffer base */</div><div class='del'>-	char *buf;		/* pointer to current position */</div><div class='del'>-	unsigned int size;	/* current (residual) size in bytes */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Assumptions:</div><div class='del'>- * - Ethernet address spans across 3 consecutive words</div><div class='del'>- *</div><div class='del'>- * Table rules:</div><div class='del'>- * - Add multiple entries next to each other if a value spans across multiple</div><div class='del'>- *   words (even multiple fields in the same word) with each entry except the</div><div class='del'>- *   last having it's SRFL_MORE bit set.</div><div class='del'>- * - Ethernet address entry does not follow above rule and must not have</div><div class='del'>- *   SRFL_MORE bit set. Its SRFL_ETHADDR bit implies it takes multiple words.</div><div class='del'>- * - The last entry's name field must be NULL to indicate the end of the table.</div><div class='del'>- *   Other entries must have non-NULL name.</div><div class='del'>- */</div><div class='del'>-static const struct brcms_sromvar pci_sromvars[] = {</div><div class='del'>-	{BRCMS_SROM_DEVID, 0xffffff00, SRFL_PRHEX | SRFL_NOVAR, PCI_F0DEVID,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_BOARDREV, 0xffffff00, SRFL_PRHEX, SROM8_BREV, 0xffff},</div><div class='del'>-	{BRCMS_SROM_BOARDFLAGS, 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL0,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM8_BFL1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_BOARDFLAGS2, 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL2,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM8_BFL3, 0xffff},</div><div class='del'>-	{BRCMS_SROM_BOARDTYPE, 0xfffffffc, SRFL_PRHEX, SROM_SSID, 0xffff},</div><div class='del'>-	{BRCMS_SROM_BOARDNUM, 0xffffff00, 0, SROM8_MACLO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_REGREV, 0xffffff00, 0, SROM8_REGREV, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_LEDBH0, 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_LEDBH1, 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0xff00},</div><div class='del'>-	{BRCMS_SROM_LEDBH2, 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_LEDBH3, 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0xff00},</div><div class='del'>-	{BRCMS_SROM_PA0B0, 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB0, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA0B1, 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA0B2, 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB2, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA0ITSSIT, 0xffffff00, 0, SROM8_W0_ITTMAXP, 0xff00},</div><div class='del'>-	{BRCMS_SROM_PA0MAXPWR, 0xffffff00, 0, SROM8_W0_ITTMAXP, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_OPO, 0xffffff00, 0, SROM8_2G_OFDMPO, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_AA2G, 0xffffff00, 0, SROM8_AA, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_AA5G, 0xffffff00, 0, SROM8_AA, 0xff00},</div><div class='del'>-	{BRCMS_SROM_AG0, 0xffffff00, 0, SROM8_AG10, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_AG1, 0xffffff00, 0, SROM8_AG10, 0xff00},</div><div class='del'>-	{BRCMS_SROM_AG2, 0xffffff00, 0, SROM8_AG32, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_AG3, 0xffffff00, 0, SROM8_AG32, 0xff00},</div><div class='del'>-	{BRCMS_SROM_PA1B0, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA1B1, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA1B2, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA1LOB0, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_LC, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA1LOB1, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_LC, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA1LOB2, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_LC, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA1HIB0, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_HC, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA1HIB1, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_HC, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA1HIB2, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_HC, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA1ITSSIT, 0xffffff00, 0, SROM8_W1_ITTMAXP, 0xff00},</div><div class='del'>-	{BRCMS_SROM_PA1MAXPWR, 0xffffff00, 0, SROM8_W1_ITTMAXP, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_PA1LOMAXPWR, 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0xff00},</div><div class='del'>-	{BRCMS_SROM_PA1HIMAXPWR, 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_BXA2G, 0xffffff00, 0, SROM8_BXARSSI2G, 0x1800},</div><div class='del'>-	{BRCMS_SROM_RSSISAV2G, 0xffffff00, 0, SROM8_BXARSSI2G, 0x0700},</div><div class='del'>-	{BRCMS_SROM_RSSISMC2G, 0xffffff00, 0, SROM8_BXARSSI2G, 0x00f0},</div><div class='del'>-	{BRCMS_SROM_RSSISMF2G, 0xffffff00, 0, SROM8_BXARSSI2G, 0x000f},</div><div class='del'>-	{BRCMS_SROM_BXA5G, 0xffffff00, 0, SROM8_BXARSSI5G, 0x1800},</div><div class='del'>-	{BRCMS_SROM_RSSISAV5G, 0xffffff00, 0, SROM8_BXARSSI5G, 0x0700},</div><div class='del'>-	{BRCMS_SROM_RSSISMC5G, 0xffffff00, 0, SROM8_BXARSSI5G, 0x00f0},</div><div class='del'>-	{BRCMS_SROM_RSSISMF5G, 0xffffff00, 0, SROM8_BXARSSI5G, 0x000f},</div><div class='del'>-	{BRCMS_SROM_TRI2G, 0xffffff00, 0, SROM8_TRI52G, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_TRI5G, 0xffffff00, 0, SROM8_TRI52G, 0xff00},</div><div class='del'>-	{BRCMS_SROM_TRI5GL, 0xffffff00, 0, SROM8_TRI5GHL, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_TRI5GH, 0xffffff00, 0, SROM8_TRI5GHL, 0xff00},</div><div class='del'>-	{BRCMS_SROM_RXPO2G, 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_RXPO5G, 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0xff00},</div><div class='del'>-	{BRCMS_SROM_TXCHAIN, 0xffffff00, SRFL_NOFFS, SROM8_TXRXC,</div><div class='del'>-	 SROM4_TXCHAIN_MASK},</div><div class='del'>-	{BRCMS_SROM_RXCHAIN, 0xffffff00, SRFL_NOFFS, SROM8_TXRXC,</div><div class='del'>-	 SROM4_RXCHAIN_MASK},</div><div class='del'>-	{BRCMS_SROM_ANTSWITCH, 0xffffff00, SRFL_NOFFS, SROM8_TXRXC,</div><div class='del'>-	 SROM4_SWITCH_MASK},</div><div class='del'>-	{BRCMS_SROM_TSSIPOS2G, 0xffffff00, 0, SROM8_FEM2G,</div><div class='del'>-	 SROM8_FEM_TSSIPOS_MASK},</div><div class='del'>-	{BRCMS_SROM_EXTPAGAIN2G, 0xffffff00, 0, SROM8_FEM2G,</div><div class='del'>-	 SROM8_FEM_EXTPA_GAIN_MASK},</div><div class='del'>-	{BRCMS_SROM_PDETRANGE2G, 0xffffff00, 0, SROM8_FEM2G,</div><div class='del'>-	 SROM8_FEM_PDET_RANGE_MASK},</div><div class='del'>-	{BRCMS_SROM_TRISO2G, 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_TR_ISO_MASK},</div><div class='del'>-	{BRCMS_SROM_ANTSWCTL2G, 0xffffff00, 0, SROM8_FEM2G,</div><div class='del'>-	 SROM8_FEM_ANTSWLUT_MASK},</div><div class='del'>-	{BRCMS_SROM_TSSIPOS5G, 0xffffff00, 0, SROM8_FEM5G,</div><div class='del'>-	 SROM8_FEM_TSSIPOS_MASK},</div><div class='del'>-	{BRCMS_SROM_EXTPAGAIN5G, 0xffffff00, 0, SROM8_FEM5G,</div><div class='del'>-	 SROM8_FEM_EXTPA_GAIN_MASK},</div><div class='del'>-	{BRCMS_SROM_PDETRANGE5G, 0xffffff00, 0, SROM8_FEM5G,</div><div class='del'>-	 SROM8_FEM_PDET_RANGE_MASK},</div><div class='del'>-	{BRCMS_SROM_TRISO5G, 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_TR_ISO_MASK},</div><div class='del'>-	{BRCMS_SROM_ANTSWCTL5G, 0xffffff00, 0, SROM8_FEM5G,</div><div class='del'>-	 SROM8_FEM_ANTSWLUT_MASK},</div><div class='del'>-	{BRCMS_SROM_TEMPTHRESH, 0xffffff00, 0, SROM8_THERMAL, 0xff00},</div><div class='del'>-	{BRCMS_SROM_TEMPOFFSET, 0xffffff00, 0, SROM8_THERMAL, 0x00ff},</div><div class='del'>-</div><div class='del'>-	{BRCMS_SROM_CCODE, 0xffffff00, SRFL_CCODE, SROM8_CCODE, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MACADDR, 0xffffff00, SRFL_ETHADDR, SROM8_MACHI, 0xffff},</div><div class='del'>-	{BRCMS_SROM_LEDDC, 0xffffff00, SRFL_NOFFS | SRFL_LEDDC, SROM8_LEDDC,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_RAWTEMPSENSE, 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS,</div><div class='del'>-	 0x01ff},</div><div class='del'>-	{BRCMS_SROM_MEASPOWER, 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS,</div><div class='del'>-	 0xfe00},</div><div class='del'>-	{BRCMS_SROM_TEMPSENSE_SLOPE, 0xffffff00, SRFL_PRHEX,</div><div class='del'>-	 SROM8_TS_SLP_OPT_CORRX, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_TEMPCORRX, 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX,</div><div class='del'>-	 0xfc00},</div><div class='del'>-	{BRCMS_SROM_TEMPSENSE_OPTION, 0xffffff00, SRFL_PRHEX,</div><div class='del'>-	 SROM8_TS_SLP_OPT_CORRX, 0x0300},</div><div class='del'>-	{BRCMS_SROM_FREQOFFSET_CORR, 0xffffff00, SRFL_PRHEX,</div><div class='del'>-	 SROM8_FOC_HWIQ_IQSWP, 0x000f},</div><div class='del'>-	{BRCMS_SROM_IQCAL_SWP_DIS, 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP,</div><div class='del'>-	 0x0010},</div><div class='del'>-	{BRCMS_SROM_HW_IQCAL_EN, 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP,</div><div class='del'>-	 0x0020},</div><div class='del'>-	{BRCMS_SROM_PHYCAL_TEMPDELTA, 0xffffff00, 0, SROM8_PHYCAL_TEMPDELTA,</div><div class='del'>-	 0x00ff},</div><div class='del'>-</div><div class='del'>-	{BRCMS_SROM_CCK2GPO, 0x00000100, 0, SROM8_2G_CCKPO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_OFDM2GPO, 0x00000100, SRFL_MORE, SROM8_2G_OFDMPO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM8_2G_OFDMPO + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_OFDM5GPO, 0x00000100, SRFL_MORE, SROM8_5G_OFDMPO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM8_5G_OFDMPO + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_OFDM5GLPO, 0x00000100, SRFL_MORE, SROM8_5GL_OFDMPO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM8_5GL_OFDMPO + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_OFDM5GHPO, 0x00000100, SRFL_MORE, SROM8_5GH_OFDMPO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM8_5GH_OFDMPO + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS2GPO0, 0x00000100, 0, SROM8_2G_MCSPO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS2GPO1, 0x00000100, 0, SROM8_2G_MCSPO + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS2GPO2, 0x00000100, 0, SROM8_2G_MCSPO + 2, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS2GPO3, 0x00000100, 0, SROM8_2G_MCSPO + 3, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS2GPO4, 0x00000100, 0, SROM8_2G_MCSPO + 4, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS2GPO5, 0x00000100, 0, SROM8_2G_MCSPO + 5, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS2GPO6, 0x00000100, 0, SROM8_2G_MCSPO + 6, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS2GPO7, 0x00000100, 0, SROM8_2G_MCSPO + 7, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GPO0, 0x00000100, 0, SROM8_5G_MCSPO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GPO1, 0x00000100, 0, SROM8_5G_MCSPO + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GPO2, 0x00000100, 0, SROM8_5G_MCSPO + 2, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GPO3, 0x00000100, 0, SROM8_5G_MCSPO + 3, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GPO4, 0x00000100, 0, SROM8_5G_MCSPO + 4, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GPO5, 0x00000100, 0, SROM8_5G_MCSPO + 5, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GPO6, 0x00000100, 0, SROM8_5G_MCSPO + 6, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GPO7, 0x00000100, 0, SROM8_5G_MCSPO + 7, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GLPO0, 0x00000100, 0, SROM8_5GL_MCSPO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GLPO1, 0x00000100, 0, SROM8_5GL_MCSPO + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GLPO2, 0x00000100, 0, SROM8_5GL_MCSPO + 2, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GLPO3, 0x00000100, 0, SROM8_5GL_MCSPO + 3, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GLPO4, 0x00000100, 0, SROM8_5GL_MCSPO + 4, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GLPO5, 0x00000100, 0, SROM8_5GL_MCSPO + 5, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GLPO6, 0x00000100, 0, SROM8_5GL_MCSPO + 6, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GLPO7, 0x00000100, 0, SROM8_5GL_MCSPO + 7, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GHPO0, 0x00000100, 0, SROM8_5GH_MCSPO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GHPO1, 0x00000100, 0, SROM8_5GH_MCSPO + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GHPO2, 0x00000100, 0, SROM8_5GH_MCSPO + 2, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GHPO3, 0x00000100, 0, SROM8_5GH_MCSPO + 3, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GHPO4, 0x00000100, 0, SROM8_5GH_MCSPO + 4, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GHPO5, 0x00000100, 0, SROM8_5GH_MCSPO + 5, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GHPO6, 0x00000100, 0, SROM8_5GH_MCSPO + 6, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS5GHPO7, 0x00000100, 0, SROM8_5GH_MCSPO + 7, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CDDPO, 0x00000100, 0, SROM8_CDDPO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_STBCPO, 0x00000100, 0, SROM8_STBCPO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_BW40PO, 0x00000100, 0, SROM8_BW40PO, 0xffff},</div><div class='del'>-	{BRCMS_SROM_BWDUPPO, 0x00000100, 0, SROM8_BWDUPPO, 0xffff},</div><div class='del'>-</div><div class='del'>-	/* power per rate from sromrev 9 */</div><div class='del'>-	{BRCMS_SROM_CCKBW202GPO, 0xfffffe00, 0, SROM9_2GPO_CCKBW20, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CCKBW20UL2GPO, 0xfffffe00, 0, SROM9_2GPO_CCKBW20UL, 0xffff},</div><div class='del'>-	{BRCMS_SROM_LEGOFDMBW202GPO, 0xfffffe00, SRFL_MORE,</div><div class='del'>-	 SROM9_2GPO_LOFDMBW20, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_2GPO_LOFDMBW20 + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_LEGOFDMBW20UL2GPO, 0xfffffe00, SRFL_MORE,</div><div class='del'>-	 SROM9_2GPO_LOFDMBW20UL, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_2GPO_LOFDMBW20UL + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_LEGOFDMBW205GLPO, 0xfffffe00, SRFL_MORE,</div><div class='del'>-	 SROM9_5GLPO_LOFDMBW20, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GLPO_LOFDMBW20 + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_LEGOFDMBW20UL5GLPO, 0xfffffe00, SRFL_MORE,</div><div class='del'>-	 SROM9_5GLPO_LOFDMBW20UL, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GLPO_LOFDMBW20UL + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_LEGOFDMBW205GMPO, 0xfffffe00, SRFL_MORE,</div><div class='del'>-	 SROM9_5GMPO_LOFDMBW20, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GMPO_LOFDMBW20 + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_LEGOFDMBW20UL5GMPO, 0xfffffe00, SRFL_MORE,</div><div class='del'>-	 SROM9_5GMPO_LOFDMBW20UL, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GMPO_LOFDMBW20UL + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_LEGOFDMBW205GHPO, 0xfffffe00, SRFL_MORE,</div><div class='del'>-	 SROM9_5GHPO_LOFDMBW20, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GHPO_LOFDMBW20 + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_LEGOFDMBW20UL5GHPO, 0xfffffe00, SRFL_MORE,</div><div class='del'>-	 SROM9_5GHPO_LOFDMBW20UL, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GHPO_LOFDMBW20UL + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCSBW202GPO, 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_2GPO_MCSBW20 + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCSBW20UL2GPO, 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20UL,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_2GPO_MCSBW20UL + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCSBW402GPO, 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW40,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_2GPO_MCSBW40 + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCSBW205GLPO, 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW20,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GLPO_MCSBW20 + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCSBW20UL5GLPO, 0xfffffe00, SRFL_MORE,</div><div class='del'>-	 SROM9_5GLPO_MCSBW20UL, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GLPO_MCSBW20UL + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCSBW405GLPO, 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW40,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GLPO_MCSBW40 + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCSBW205GMPO, 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW20,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GMPO_MCSBW20 + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCSBW20UL5GMPO, 0xfffffe00, SRFL_MORE,</div><div class='del'>-	 SROM9_5GMPO_MCSBW20UL, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GMPO_MCSBW20UL + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCSBW405GMPO, 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW40,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GMPO_MCSBW40 + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCSBW205GHPO, 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW20,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GHPO_MCSBW20 + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCSBW20UL5GHPO, 0xfffffe00, SRFL_MORE,</div><div class='del'>-	 SROM9_5GHPO_MCSBW20UL, 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GHPO_MCSBW20UL + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCSBW405GHPO, 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW40,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_CONT, 0, 0, SROM9_5GHPO_MCSBW40 + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MCS32PO, 0xfffffe00, 0, SROM9_PO_MCS32, 0xffff},</div><div class='del'>-	{BRCMS_SROM_LEGOFDM40DUPPO, 0xfffffe00, 0, SROM9_PO_LOFDM40DUP, 0xffff},</div><div class='del'>-</div><div class='del'>-	{BRCMS_SROM_NULL, 0, 0, 0, 0}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct brcms_sromvar perpath_pci_sromvars[] = {</div><div class='del'>-	{BRCMS_SROM_MAXP2GA0, 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_ITT2GA0, 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0xff00},</div><div class='del'>-	{BRCMS_SROM_ITT5GA0, 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0xff00},</div><div class='del'>-	{BRCMS_SROM_PA2GW0A0, 0xffffff00, SRFL_PRHEX, SROM8_2G_PA, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA2GW1A0, 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA2GW2A0, 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 2, 0xffff},</div><div class='del'>-	{BRCMS_SROM_MAXP5GA0, 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_MAXP5GHA0, 0xffffff00, 0, SROM8_5GLH_MAXP, 0x00ff},</div><div class='del'>-	{BRCMS_SROM_MAXP5GLA0, 0xffffff00, 0, SROM8_5GLH_MAXP, 0xff00},</div><div class='del'>-	{BRCMS_SROM_PA5GW0A0, 0xffffff00, SRFL_PRHEX, SROM8_5G_PA, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA5GW1A0, 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 1, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA5GW2A0, 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 2, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA5GLW0A0, 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA5GLW1A0, 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 1,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA5GLW2A0, 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 2,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA5GHW0A0, 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA, 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA5GHW1A0, 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 1,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_PA5GHW2A0, 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 2,</div><div class='del'>-	 0xffff},</div><div class='del'>-	{BRCMS_SROM_NULL, 0, 0, 0, 0}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* crc table has the same contents for every device instance, so it can be</div><div class='del'>- * shared between devices. */</div><div class='del'>-static u8 brcms_srom_crc8_table[CRC8_TABLE_SIZE];</div><div class='del'>-</div><div class='del'>-static uint mask_shift(u16 mask)</div><div class='del'>-{</div><div class='del'>-	uint i;</div><div class='del'>-	for (i = 0; i &lt; (sizeof(mask) &lt;&lt; 3); i++) {</div><div class='del'>-		if (mask &amp; (1 &lt;&lt; i))</div><div class='del'>-			return i;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static uint mask_width(u16 mask)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	for (i = (sizeof(mask) &lt;&lt; 3) - 1; i &gt;= 0; i--) {</div><div class='del'>-		if (mask &amp; (1 &lt;&lt; i))</div><div class='del'>-			return (uint) (i - mask_shift(mask) + 1);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void le16_to_cpu_buf(u16 *buf, uint nwords)</div><div class='del'>-{</div><div class='del'>-	while (nwords--)</div><div class='del'>-		*(buf + nwords) = le16_to_cpu(*(__le16 *)(buf + nwords));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void cpu_to_le16_buf(u16 *buf, uint nwords)</div><div class='del'>-{</div><div class='del'>-	while (nwords--)</div><div class='del'>-		*(__le16 *)(buf + nwords) = cpu_to_le16(*(buf + nwords));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * convert binary srom data into linked list of srom variable items.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-_initvars_srom_pci(u8 sromrev, u16 *srom, struct list_head *var_list)</div><div class='del'>-{</div><div class='del'>-	struct brcms_srom_list_head *entry;</div><div class='del'>-	enum brcms_srom_id id;</div><div class='del'>-	u16 w;</div><div class='del'>-	u32 val = 0;</div><div class='del'>-	const struct brcms_sromvar *srv;</div><div class='del'>-	uint width;</div><div class='del'>-	uint flags;</div><div class='del'>-	u32 sr = (1 &lt;&lt; sromrev);</div><div class='del'>-	uint p;</div><div class='del'>-	uint pb =  SROM8_PATH0;</div><div class='del'>-	const uint psz = SROM8_PATH1 - SROM8_PATH0;</div><div class='del'>-</div><div class='del'>-	/* first store the srom revision */</div><div class='del'>-	entry = kzalloc(sizeof(struct brcms_srom_list_head), GFP_KERNEL);</div><div class='del'>-	if (!entry)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	entry-&gt;varid = BRCMS_SROM_REV;</div><div class='del'>-	entry-&gt;var_type = BRCMS_SROM_UNUMBER;</div><div class='del'>-	entry-&gt;uval = sromrev;</div><div class='del'>-	list_add(&amp;entry-&gt;var_list, var_list);</div><div class='del'>-</div><div class='del'>-	for (srv = pci_sromvars; srv-&gt;varid != BRCMS_SROM_NULL; srv++) {</div><div class='del'>-		enum brcms_srom_var_type type;</div><div class='del'>-		u8 ea[ETH_ALEN];</div><div class='del'>-		u8 extra_space = 0;</div><div class='del'>-</div><div class='del'>-		if ((srv-&gt;revmask &amp; sr) == 0)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		flags = srv-&gt;flags;</div><div class='del'>-		id = srv-&gt;varid;</div><div class='del'>-</div><div class='del'>-		/* This entry is for mfgc only. Don't generate param for it, */</div><div class='del'>-		if (flags &amp; SRFL_NOVAR)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (flags &amp; SRFL_ETHADDR) {</div><div class='del'>-			/*</div><div class='del'>-			 * stored in string format XX:XX:XX:XX:XX:XX (17 chars)</div><div class='del'>-			 */</div><div class='del'>-			ea[0] = (srom[srv-&gt;off] &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-			ea[1] = srom[srv-&gt;off] &amp; 0xff;</div><div class='del'>-			ea[2] = (srom[srv-&gt;off + 1] &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-			ea[3] = srom[srv-&gt;off + 1] &amp; 0xff;</div><div class='del'>-			ea[4] = (srom[srv-&gt;off + 2] &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-			ea[5] = srom[srv-&gt;off + 2] &amp; 0xff;</div><div class='del'>-			/* 17 characters + string terminator - union size */</div><div class='del'>-			extra_space = 18 - sizeof(s32);</div><div class='del'>-			type = BRCMS_SROM_STRING;</div><div class='del'>-		} else {</div><div class='del'>-			w = srom[srv-&gt;off];</div><div class='del'>-			val = (w &amp; srv-&gt;mask) &gt;&gt; mask_shift(srv-&gt;mask);</div><div class='del'>-			width = mask_width(srv-&gt;mask);</div><div class='del'>-</div><div class='del'>-			while (srv-&gt;flags &amp; SRFL_MORE) {</div><div class='del'>-				srv++;</div><div class='del'>-				if (srv-&gt;off == 0)</div><div class='del'>-					continue;</div><div class='del'>-</div><div class='del'>-				w = srom[srv-&gt;off];</div><div class='del'>-				val +=</div><div class='del'>-				    ((w &amp; srv-&gt;mask) &gt;&gt; mask_shift(srv-&gt;</div><div class='del'>-								   mask)) &lt;&lt;</div><div class='del'>-				    width;</div><div class='del'>-				width += mask_width(srv-&gt;mask);</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if ((flags &amp; SRFL_NOFFS)</div><div class='del'>-			    &amp;&amp; ((int)val == (1 &lt;&lt; width) - 1))</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			if (flags &amp; SRFL_CCODE) {</div><div class='del'>-				type = BRCMS_SROM_STRING;</div><div class='del'>-			} else if (flags &amp; SRFL_LEDDC) {</div><div class='del'>-				/* LED Powersave duty cycle has to be scaled:</div><div class='del'>-				 *(oncount &gt;&gt; 24) (offcount &gt;&gt; 8)</div><div class='del'>-				 */</div><div class='del'>-				u32 w32 = /* oncount */</div><div class='del'>-					  (((val &gt;&gt; 8) &amp; 0xff) &lt;&lt; 24) |</div><div class='del'>-					  /* offcount */</div><div class='del'>-					  (((val &amp; 0xff)) &lt;&lt; 8);</div><div class='del'>-				type = BRCMS_SROM_UNUMBER;</div><div class='del'>-				val = w32;</div><div class='del'>-			} else if ((flags &amp; SRFL_PRSIGN)</div><div class='del'>-				 &amp;&amp; (val &amp; (1 &lt;&lt; (width - 1)))) {</div><div class='del'>-				type = BRCMS_SROM_SNUMBER;</div><div class='del'>-				val |= ~0 &lt;&lt; width;</div><div class='del'>-			} else</div><div class='del'>-				type = BRCMS_SROM_UNUMBER;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		entry = kzalloc(sizeof(struct brcms_srom_list_head) +</div><div class='del'>-				extra_space, GFP_KERNEL);</div><div class='del'>-		if (!entry)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		entry-&gt;varid = id;</div><div class='del'>-		entry-&gt;var_type = type;</div><div class='del'>-		if (flags &amp; SRFL_ETHADDR) {</div><div class='del'>-			snprintf(entry-&gt;buf, 18, "%pM", ea);</div><div class='del'>-		} else if (flags &amp; SRFL_CCODE) {</div><div class='del'>-			if (val == 0)</div><div class='del'>-				entry-&gt;buf[0] = '\0';</div><div class='del'>-			else</div><div class='del'>-				snprintf(entry-&gt;buf, 3, "%c%c",</div><div class='del'>-					 (val &gt;&gt; 8), (val &amp; 0xff));</div><div class='del'>-		} else {</div><div class='del'>-			entry-&gt;uval = val;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		list_add(&amp;entry-&gt;var_list, var_list);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (p = 0; p &lt; MAX_PATH_SROM; p++) {</div><div class='del'>-		for (srv = perpath_pci_sromvars;</div><div class='del'>-		     srv-&gt;varid != BRCMS_SROM_NULL; srv++) {</div><div class='del'>-			if ((srv-&gt;revmask &amp; sr) == 0)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			if (srv-&gt;flags &amp; SRFL_NOVAR)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			w = srom[pb + srv-&gt;off];</div><div class='del'>-			val = (w &amp; srv-&gt;mask) &gt;&gt; mask_shift(srv-&gt;mask);</div><div class='del'>-			width = mask_width(srv-&gt;mask);</div><div class='del'>-</div><div class='del'>-			/* Cheating: no per-path var is more than</div><div class='del'>-			 * 1 word */</div><div class='del'>-			if ((srv-&gt;flags &amp; SRFL_NOFFS)</div><div class='del'>-			    &amp;&amp; ((int)val == (1 &lt;&lt; width) - 1))</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			entry =</div><div class='del'>-			    kzalloc(sizeof(struct brcms_srom_list_head),</div><div class='del'>-				    GFP_KERNEL);</div><div class='del'>-			if (!entry)</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-			entry-&gt;varid = srv-&gt;varid+p;</div><div class='del'>-			entry-&gt;var_type = BRCMS_SROM_UNUMBER;</div><div class='del'>-			entry-&gt;uval = val;</div><div class='del'>-			list_add(&amp;entry-&gt;var_list, var_list);</div><div class='del'>-		}</div><div class='del'>-		pb += psz;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The crc check is done on a little-endian array, we need</div><div class='del'>- * to switch the bytes around before checking crc (and</div><div class='del'>- * then switch it back).</div><div class='del'>- */</div><div class='del'>-static int do_crc_check(u16 *buf, unsigned nwords)</div><div class='del'>-{</div><div class='del'>-	u8 crc;</div><div class='del'>-</div><div class='del'>-	cpu_to_le16_buf(buf, nwords);</div><div class='del'>-	crc = crc8(brcms_srom_crc8_table, (void *)buf, nwords &lt;&lt; 1, CRC8_INIT_VALUE);</div><div class='del'>-	le16_to_cpu_buf(buf, nwords);</div><div class='del'>-</div><div class='del'>-	return crc == CRC8_GOOD_VALUE(brcms_srom_crc8_table);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Read in and validate sprom.</div><div class='del'>- * Return 0 on success, nonzero on error.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-sprom_read_pci(struct si_pub *sih, u16 *buf, uint nwords, bool check_crc)</div><div class='del'>-{</div><div class='del'>-	int err = 0;</div><div class='del'>-	uint i;</div><div class='del'>-	struct bcma_device *core;</div><div class='del'>-	uint sprom_offset;</div><div class='del'>-</div><div class='del'>-	/* determine core to read */</div><div class='del'>-	if (ai_get_ccrev(sih) &lt; 32) {</div><div class='del'>-		core = ai_findcore(sih, BCMA_CORE_80211, 0);</div><div class='del'>-		sprom_offset = PCI_BAR0_SPROM_OFFSET;</div><div class='del'>-	} else {</div><div class='del'>-		core = ai_findcore(sih, BCMA_CORE_CHIPCOMMON, 0);</div><div class='del'>-		sprom_offset = CHIPCREGOFFS(sromotp);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* read the sprom */</div><div class='del'>-	for (i = 0; i &lt; nwords; i++)</div><div class='del'>-		buf[i] = bcma_read16(core, sprom_offset+i*2);</div><div class='del'>-</div><div class='del'>-	if (buf[0] == 0xffff)</div><div class='del'>-		/*</div><div class='del'>-		 * The hardware thinks that an srom that starts with</div><div class='del'>-		 * 0xffff is blank, regardless of the rest of the</div><div class='del'>-		 * content, so declare it bad.</div><div class='del'>-		 */</div><div class='del'>-		return -ENODATA;</div><div class='del'>-</div><div class='del'>-	if (check_crc &amp;&amp; !do_crc_check(buf, nwords))</div><div class='del'>-		err = -EIO;</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int otp_read_pci(struct si_pub *sih, u16 *buf, uint nwords)</div><div class='del'>-{</div><div class='del'>-	u8 *otp;</div><div class='del'>-	uint sz = OTP_SZ_MAX / 2;	/* size in words */</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	otp = kzalloc(OTP_SZ_MAX, GFP_ATOMIC);</div><div class='del'>-	if (otp == NULL)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	err = otp_read_region(sih, OTP_HW_RGN, (u16 *) otp, &amp;sz);</div><div class='del'>-</div><div class='del'>-	sz = min_t(uint, sz, nwords);</div><div class='del'>-	memcpy(buf, otp, sz * 2);</div><div class='del'>-</div><div class='del'>-	kfree(otp);</div><div class='del'>-</div><div class='del'>-	/* Check CRC */</div><div class='del'>-	if (buf[0] == 0xffff)</div><div class='del'>-		/* The hardware thinks that an srom that starts with 0xffff</div><div class='del'>-		 * is blank, regardless of the rest of the content, so declare</div><div class='del'>-		 * it bad.</div><div class='del'>-		 */</div><div class='del'>-		return -ENODATA;</div><div class='del'>-</div><div class='del'>-	/* fixup the endianness so crc8 will pass */</div><div class='del'>-	cpu_to_le16_buf(buf, sz);</div><div class='del'>-	if (crc8(brcms_srom_crc8_table, (u8 *) buf, sz * 2,</div><div class='del'>-		 CRC8_INIT_VALUE) != CRC8_GOOD_VALUE(brcms_srom_crc8_table))</div><div class='del'>-		err = -EIO;</div><div class='del'>-	else</div><div class='del'>-		/* now correct the endianness of the byte array */</div><div class='del'>-		le16_to_cpu_buf(buf, sz);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initialize nonvolatile variable table from sprom.</div><div class='del'>- * Return 0 on success, nonzero on error.</div><div class='del'>- */</div><div class='del'>-int srom_var_init(struct si_pub *sih)</div><div class='del'>-{</div><div class='del'>-	u16 *srom;</div><div class='del'>-	u8 sromrev = 0;</div><div class='del'>-	u32 sr;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Apply CRC over SROM content regardless SROM is present or not.</div><div class='del'>-	 */</div><div class='del'>-	srom = kmalloc(SROM_MAX, GFP_ATOMIC);</div><div class='del'>-	if (!srom)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	crc8_populate_lsb(brcms_srom_crc8_table, SROM_CRC8_POLY);</div><div class='del'>-	if (ai_is_sprom_available(sih)) {</div><div class='del'>-		err = sprom_read_pci(sih, srom, SROM4_WORDS, true);</div><div class='del'>-</div><div class='del'>-		if (err == 0)</div><div class='del'>-			/* srom read and passed crc */</div><div class='del'>-			/* top word of sprom contains version and crc8 */</div><div class='del'>-			sromrev = srom[SROM4_CRCREV] &amp; 0xff;</div><div class='del'>-	} else {</div><div class='del'>-		/* Use OTP if SPROM not available */</div><div class='del'>-		err = otp_read_pci(sih, srom, SROM4_WORDS);</div><div class='del'>-		if (err == 0)</div><div class='del'>-			/* OTP only contain SROM rev8/rev9 for now */</div><div class='del'>-			sromrev = srom[SROM4_CRCREV] &amp; 0xff;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!err) {</div><div class='del'>-		struct si_info *sii = (struct si_info *)sih;</div><div class='del'>-</div><div class='del'>-		/* Bitmask for the sromrev */</div><div class='del'>-		sr = 1 &lt;&lt; sromrev;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * srom version check: Current valid versions: 8, 9</div><div class='del'>-		 */</div><div class='del'>-		if ((sr &amp; 0x300) == 0) {</div><div class='del'>-			err = -EINVAL;</div><div class='del'>-			goto errout;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		INIT_LIST_HEAD(&amp;sii-&gt;var_list);</div><div class='del'>-</div><div class='del'>-		/* parse SROM into name=value pairs. */</div><div class='del'>-		err = _initvars_srom_pci(sromrev, srom, &amp;sii-&gt;var_list);</div><div class='del'>-		if (err)</div><div class='del'>-			srom_free_vars(sih);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-errout:</div><div class='del'>-	kfree(srom);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void srom_free_vars(struct si_pub *sih)</div><div class='del'>-{</div><div class='del'>-	struct si_info *sii;</div><div class='del'>-	struct brcms_srom_list_head *entry, *next;</div><div class='del'>-</div><div class='del'>-	sii = (struct si_info *)sih;</div><div class='del'>-	list_for_each_entry_safe(entry, next, &amp;sii-&gt;var_list, var_list) {</div><div class='del'>-		list_del(&amp;entry-&gt;var_list);</div><div class='del'>-		kfree(entry);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Search the name=value vars for a specific one and return its value.</div><div class='del'>- * Returns NULL if not found.</div><div class='del'>- */</div><div class='del'>-char *getvar(struct si_pub *sih, enum brcms_srom_id id)</div><div class='del'>-{</div><div class='del'>-	struct si_info *sii;</div><div class='del'>-	struct brcms_srom_list_head *entry;</div><div class='del'>-</div><div class='del'>-	sii = (struct si_info *)sih;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(entry, &amp;sii-&gt;var_list, var_list)</div><div class='del'>-		if (entry-&gt;varid == id)</div><div class='del'>-			return &amp;entry-&gt;buf[0];</div><div class='del'>-</div><div class='del'>-	/* nothing found */</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Search the vars for a specific one and return its value as</div><div class='del'>- * an integer. Returns 0 if not found.-</div><div class='del'>- */</div><div class='del'>-int getintvar(struct si_pub *sih, enum brcms_srom_id id)</div><div class='del'>-{</div><div class='del'>-	struct si_info *sii;</div><div class='del'>-	struct brcms_srom_list_head *entry;</div><div class='del'>-	unsigned long res;</div><div class='del'>-</div><div class='del'>-	sii = (struct si_info *)sih;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(entry, &amp;sii-&gt;var_list, var_list)</div><div class='del'>-		if (entry-&gt;varid == id) {</div><div class='del'>-			if (entry-&gt;var_type == BRCMS_SROM_SNUMBER ||</div><div class='del'>-			    entry-&gt;var_type == BRCMS_SROM_UNUMBER)</div><div class='del'>-				return (int)entry-&gt;sval;</div><div class='del'>-			else if (!kstrtoul(&amp;entry-&gt;buf[0], 0, &amp;res))</div><div class='del'>-				return (int)res;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/srom.h b/drivers/net/wireless/brcm80211/brcmsmac/srom.h<br/>deleted file mode 100644<br/>index f2a58f262c99..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/srom.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/srom.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (c) 2010 Broadcom Corporation</div><div class='del'>- *</div><div class='del'>- * Permission to use, copy, modify, and/or distribute this software for any</div><div class='del'>- * purpose with or without fee is hereby granted, provided that the above</div><div class='del'>- * copyright notice and this permission notice appear in all copies.</div><div class='del'>- *</div><div class='del'>- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='del'>- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='del'>- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY</div><div class='del'>- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='del'>- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION</div><div class='del'>- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN</div><div class='del'>- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef	_BRCM_SROM_H_</div><div class='del'>-#define	_BRCM_SROM_H_</div><div class='del'>-</div><div class='del'>-#include "types.h"</div><div class='del'>-</div><div class='del'>-/* Prototypes */</div><div class='del'>-extern int srom_var_init(struct si_pub *sih);</div><div class='del'>-extern void srom_free_vars(struct si_pub *sih);</div><div class='del'>-</div><div class='del'>-extern int srom_read(struct si_pub *sih, uint bus, void *curmap,</div><div class='del'>-		     uint byteoff, uint nbytes, u16 *buf, bool check_crc);</div><div class='del'>-</div><div class='del'>-#endif				/* _BRCM_SROM_H_ */</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/brcmsmac/stf.c b/drivers/net/wireless/brcm80211/brcmsmac/stf.c<br/>index d8f528eb180c..ed1d1aa71d2d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/stf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/brcmsmac/stf.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/brcmsmac/stf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/brcmsmac/stf.c</a></div><div class='hunk'>@@ -370,9 +370,11 @@ void brcms_c_stf_phy_txant_upd(struct brcms_c_info *wlc)</div><div class='ctx'> </div><div class='ctx'> void brcms_c_stf_phy_chain_calc(struct brcms_c_info *wlc)</div><div class='ctx'> {</div><div class='add'>+	struct ssb_sprom *sprom = &amp;wlc-&gt;hw-&gt;d11core-&gt;bus-&gt;sprom;</div><div class='add'>+</div><div class='ctx'> 	/* get available rx/tx chains */</div><div class='del'>-	wlc-&gt;stf-&gt;hw_txchain = (u8) getintvar(wlc-&gt;hw-&gt;sih, BRCMS_SROM_TXCHAIN);</div><div class='del'>-	wlc-&gt;stf-&gt;hw_rxchain = (u8) getintvar(wlc-&gt;hw-&gt;sih, BRCMS_SROM_RXCHAIN);</div><div class='add'>+	wlc-&gt;stf-&gt;hw_txchain = sprom-&gt;txchain;</div><div class='add'>+	wlc-&gt;stf-&gt;hw_rxchain = sprom-&gt;rxchain;</div><div class='ctx'> </div><div class='ctx'> 	/* these parameter are intended to be used for all PHY types */</div><div class='ctx'> 	if (wlc-&gt;stf-&gt;hw_txchain == 0 || wlc-&gt;stf-&gt;hw_txchain == 0xf) {</div><div class='head'>diff --git a/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h b/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h<br/>index 5fb17d53c9b2..333193f20e1c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/brcm80211/include/brcm_hw_ids.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/brcm80211/include/brcm_hw_ids.h</a></div><div class='hunk'>@@ -17,17 +17,7 @@</div><div class='ctx'> #ifndef	_BRCM_HW_IDS_H_</div><div class='ctx'> #define	_BRCM_HW_IDS_H_</div><div class='ctx'> </div><div class='del'>-#define	BCM4325_D11DUAL_ID	0x431b</div><div class='del'>-#define	BCM4325_D11G_ID		0x431c</div><div class='del'>-#define	BCM4325_D11A_ID		0x431d</div><div class='del'>-</div><div class='del'>-#define BCM4329_D11N2G_ID	0x432f	/* 4329 802.11n 2.4G device */</div><div class='del'>-#define BCM4329_D11N5G_ID	0x4330	/* 4329 802.11n 5G device */</div><div class='del'>-#define BCM4329_D11NDUAL_ID	0x432e</div><div class='del'>-</div><div class='del'>-#define BCM4319_D11N_ID		0x4337	/* 4319 802.11n dualband device */</div><div class='del'>-#define BCM4319_D11N2G_ID	0x4338	/* 4319 802.11n 2.4G device */</div><div class='del'>-#define BCM4319_D11N5G_ID	0x4339	/* 4319 802.11n 5G device */</div><div class='add'>+#define BCM4313_D11N2G_ID	0x4727	/* 4313 802.11n 2.4G device */</div><div class='ctx'> </div><div class='ctx'> #define BCM43224_D11N_ID	0x4353	/* 43224 802.11n dualband device */</div><div class='ctx'> #define BCM43224_D11N_ID_VEN1	0x0576	/* Vendor specific 43224 802.11n db */</div><div class='hunk'>@@ -37,23 +27,15 @@</div><div class='ctx'> #define BCM43236_D11N_ID	0x4346	/* 43236 802.11n dualband device */</div><div class='ctx'> #define BCM43236_D11N2G_ID	0x4347	/* 43236 802.11n 2.4GHz device */</div><div class='ctx'> </div><div class='del'>-#define BCM4313_D11N2G_ID	0x4727	/* 4313 802.11n 2.4G device */</div><div class='del'>-</div><div class='del'>-/* Chip IDs */</div><div class='del'>-#define BCM4313_CHIP_ID		0x4313	/* 4313 chip id */</div><div class='del'>-#define	BCM4319_CHIP_ID		0x4319	/* 4319 chip id */</div><div class='del'>-</div><div class='del'>-#define	BCM43224_CHIP_ID	43224	/* 43224 chipcommon chipid */</div><div class='del'>-#define	BCM43225_CHIP_ID	43225	/* 43225 chipcommon chipid */</div><div class='del'>-#define	BCM43421_CHIP_ID	43421	/* 43421 chipcommon chipid */</div><div class='del'>-#define	BCM43235_CHIP_ID	43235	/* 43235 chipcommon chipid */</div><div class='del'>-#define	BCM43236_CHIP_ID	43236	/* 43236 chipcommon chipid */</div><div class='del'>-#define	BCM43238_CHIP_ID	43238	/* 43238 chipcommon chipid */</div><div class='del'>-#define	BCM4329_CHIP_ID		0x4329	/* 4329 chipcommon chipid */</div><div class='del'>-#define	BCM4325_CHIP_ID		0x4325	/* 4325 chipcommon chipid */</div><div class='del'>-#define	BCM4331_CHIP_ID		0x4331	/* 4331 chipcommon chipid */</div><div class='del'>-#define BCM4336_CHIP_ID		0x4336	/* 4336 chipcommon chipid */</div><div class='del'>-#define BCM4330_CHIP_ID		0x4330	/* 4330 chipcommon chipid */</div><div class='del'>-#define BCM6362_CHIP_ID		0x6362	/* 6362 chipcommon chipid */</div><div class='add'>+/* Chipcommon Core Chip IDs */</div><div class='add'>+#define BCM4313_CHIP_ID		0x4313</div><div class='add'>+#define BCM43224_CHIP_ID	43224</div><div class='add'>+#define BCM43225_CHIP_ID	43225</div><div class='add'>+#define BCM43235_CHIP_ID	43235</div><div class='add'>+#define BCM43236_CHIP_ID	43236</div><div class='add'>+#define BCM43238_CHIP_ID	43238</div><div class='add'>+#define BCM4329_CHIP_ID		0x4329</div><div class='add'>+#define BCM4330_CHIP_ID		0x4330</div><div class='add'>+#define BCM4331_CHIP_ID		0x4331</div><div class='ctx'> </div><div class='ctx'> #endif				/* _BRCM_HW_IDS_H_ */</div><div class='head'>diff --git a/drivers/net/wireless/hostap/hostap_main.c b/drivers/net/wireless/hostap/hostap_main.c<br/>index bfa0d54221e8..627bc12074c7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/hostap/hostap_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/hostap/hostap_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/hostap/hostap_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/hostap/hostap_main.c</a></div><div class='hunk'>@@ -244,8 +244,7 @@ u16 hostap_tx_callback_register(local_info_t *local,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct hostap_tx_callback_info *entry;</div><div class='ctx'> </div><div class='del'>-	entry = kmalloc(sizeof(*entry),</div><div class='del'>-							   GFP_ATOMIC);</div><div class='add'>+	entry = kmalloc(sizeof(*entry), GFP_KERNEL);</div><div class='ctx'> 	if (entry == NULL)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/hostap/hostap_pci.c b/drivers/net/wireless/hostap/hostap_pci.c<br/>index 972a9c3af39e..05ca3402dca7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/hostap/hostap_pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/hostap/hostap_pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/hostap/hostap_pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/hostap/hostap_pci.c</a></div><div class='hunk'>@@ -457,18 +457,4 @@ static struct pci_driver prism2_pci_driver = {</div><div class='ctx'> #endif /* CONFIG_PM */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static int __init init_prism2_pci(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;prism2_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void __exit exit_prism2_pci(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;prism2_pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-module_init(init_prism2_pci);</div><div class='del'>-module_exit(exit_prism2_pci);</div><div class='add'>+module_pci_driver(prism2_pci_driver);</div><div class='head'>diff --git a/drivers/net/wireless/hostap/hostap_plx.c b/drivers/net/wireless/hostap/hostap_plx.c<br/>index 33e79037770b..c3d067ee4db9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/hostap/hostap_plx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/hostap/hostap_plx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/hostap/hostap_plx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/hostap/hostap_plx.c</a></div><div class='hunk'>@@ -616,18 +616,4 @@ static struct pci_driver prism2_plx_driver = {</div><div class='ctx'> 	.remove		= prism2_plx_remove,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static int __init init_prism2_plx(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;prism2_plx_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void __exit exit_prism2_plx(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;prism2_plx_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-module_init(init_prism2_plx);</div><div class='del'>-module_exit(exit_prism2_plx);</div><div class='add'>+module_pci_driver(prism2_plx_driver);</div><div class='head'>diff --git a/drivers/net/wireless/ipw2x00/ipw.h b/drivers/net/wireless/ipw2x00/ipw.h<br/>new file mode 100644<br/>index 000000000000..4007bf5ed6f3<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ipw2x00/ipw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ipw2x00/ipw.h</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+/*</div><div class='add'>+ * Intel Pro/Wireless 2100, 2200BG, 2915ABG network connection driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2012 Stanislav Yakovlev &lt;stas.yakovlev@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __IPW_H__</div><div class='add'>+#define __IPW_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ieee80211.h&gt;</div><div class='add'>+</div><div class='add'>+static const u32 ipw_cipher_suites[] = {</div><div class='add'>+	WLAN_CIPHER_SUITE_WEP40,</div><div class='add'>+	WLAN_CIPHER_SUITE_WEP104,</div><div class='add'>+	WLAN_CIPHER_SUITE_TKIP,</div><div class='add'>+	WLAN_CIPHER_SUITE_CCMP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c<br/>index f0551f807f69..9cfae0c08707 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ipw2x00/ipw2100.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ipw2x00/ipw2100.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ipw2x00/ipw2100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ipw2x00/ipw2100.c</a></div><div class='hunk'>@@ -166,6 +166,7 @@ that only one external action is invoked at a time.</div><div class='ctx'> #include &lt;net/lib80211.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ipw2100.h"</div><div class='add'>+#include "ipw.h"</div><div class='ctx'> </div><div class='ctx'> #define IPW2100_VERSION "git-1.2.2"</div><div class='ctx'> </div><div class='hunk'>@@ -343,38 +344,50 @@ static struct iw_handler_def ipw2100_wx_handler_def;</div><div class='ctx'> </div><div class='ctx'> static inline void read_register(struct net_device *dev, u32 reg, u32 * val)</div><div class='ctx'> {</div><div class='del'>-	*val = readl((void __iomem *)(dev-&gt;base_addr + reg));</div><div class='add'>+	struct ipw2100_priv *priv = libipw_priv(dev);</div><div class='add'>+</div><div class='add'>+	*val = ioread32(priv-&gt;ioaddr + reg);</div><div class='ctx'> 	IPW_DEBUG_IO("r: 0x%08X =&gt; 0x%08X\n", reg, *val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void write_register(struct net_device *dev, u32 reg, u32 val)</div><div class='ctx'> {</div><div class='del'>-	writel(val, (void __iomem *)(dev-&gt;base_addr + reg));</div><div class='add'>+	struct ipw2100_priv *priv = libipw_priv(dev);</div><div class='add'>+</div><div class='add'>+	iowrite32(val, priv-&gt;ioaddr + reg);</div><div class='ctx'> 	IPW_DEBUG_IO("w: 0x%08X &lt;= 0x%08X\n", reg, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void read_register_word(struct net_device *dev, u32 reg,</div><div class='ctx'> 				      u16 * val)</div><div class='ctx'> {</div><div class='del'>-	*val = readw((void __iomem *)(dev-&gt;base_addr + reg));</div><div class='add'>+	struct ipw2100_priv *priv = libipw_priv(dev);</div><div class='add'>+</div><div class='add'>+	*val = ioread16(priv-&gt;ioaddr + reg);</div><div class='ctx'> 	IPW_DEBUG_IO("r: 0x%08X =&gt; %04X\n", reg, *val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void read_register_byte(struct net_device *dev, u32 reg, u8 * val)</div><div class='ctx'> {</div><div class='del'>-	*val = readb((void __iomem *)(dev-&gt;base_addr + reg));</div><div class='add'>+	struct ipw2100_priv *priv = libipw_priv(dev);</div><div class='add'>+</div><div class='add'>+	*val = ioread8(priv-&gt;ioaddr + reg);</div><div class='ctx'> 	IPW_DEBUG_IO("r: 0x%08X =&gt; %02X\n", reg, *val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void write_register_word(struct net_device *dev, u32 reg, u16 val)</div><div class='ctx'> {</div><div class='del'>-	writew(val, (void __iomem *)(dev-&gt;base_addr + reg));</div><div class='add'>+	struct ipw2100_priv *priv = libipw_priv(dev);</div><div class='add'>+</div><div class='add'>+	iowrite16(val, priv-&gt;ioaddr + reg);</div><div class='ctx'> 	IPW_DEBUG_IO("w: 0x%08X &lt;= %04X\n", reg, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void write_register_byte(struct net_device *dev, u32 reg, u8 val)</div><div class='ctx'> {</div><div class='del'>-	writeb(val, (void __iomem *)(dev-&gt;base_addr + reg));</div><div class='add'>+	struct ipw2100_priv *priv = libipw_priv(dev);</div><div class='add'>+</div><div class='add'>+	iowrite8(val, priv-&gt;ioaddr + reg);</div><div class='ctx'> 	IPW_DEBUG_IO("w: 0x%08X =&lt; %02X\n", reg, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -506,13 +519,13 @@ static void read_nic_memory(struct net_device *dev, u32 addr, u32 len,</div><div class='ctx'> 		read_register_byte(dev, IPW_REG_INDIRECT_ACCESS_DATA + i, buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int ipw2100_hw_is_adapter_in_system(struct net_device *dev)</div><div class='add'>+static bool ipw2100_hw_is_adapter_in_system(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	return (dev-&gt;base_addr &amp;&amp;</div><div class='del'>-		(readl</div><div class='del'>-		 ((void __iomem *)(dev-&gt;base_addr +</div><div class='del'>-				   IPW_REG_DOA_DEBUG_AREA_START))</div><div class='del'>-		 == IPW_DATA_DOA_DEBUG_VALUE));</div><div class='add'>+	u32 dbg;</div><div class='add'>+</div><div class='add'>+	read_register(dev, IPW_REG_DOA_DEBUG_AREA_START, &amp;dbg);</div><div class='add'>+</div><div class='add'>+	return dbg == IPW_DATA_DOA_DEBUG_VALUE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ipw2100_get_ordinal(struct ipw2100_priv *priv, u32 ord,</div><div class='hunk'>@@ -1946,11 +1959,12 @@ static int ipw2100_wdev_init(struct net_device *dev)</div><div class='ctx'> 		wdev-&gt;wiphy-&gt;bands[IEEE80211_BAND_2GHZ] = bg_band;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	wdev-&gt;wiphy-&gt;cipher_suites = ipw_cipher_suites;</div><div class='add'>+	wdev-&gt;wiphy-&gt;n_cipher_suites = ARRAY_SIZE(ipw_cipher_suites);</div><div class='add'>+</div><div class='ctx'> 	set_wiphy_dev(wdev-&gt;wiphy, &amp;priv-&gt;pci_dev-&gt;dev);</div><div class='del'>-	if (wiphy_register(wdev-&gt;wiphy)) {</div><div class='del'>-		ipw2100_down(priv);</div><div class='add'>+	if (wiphy_register(wdev-&gt;wiphy))</div><div class='ctx'> 		return -EIO;</div><div class='del'>-	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3773,7 +3787,7 @@ IPW2100_ORD(STAT_TX_HOST_REQUESTS, "requested Host Tx's (MSDU)"),</div><div class='ctx'> 	    IPW2100_ORD(COUNTRY_CODE,</div><div class='ctx'> 				"IEEE country code as recv'd from beacon"),</div><div class='ctx'> 	    IPW2100_ORD(COUNTRY_CHANNELS,</div><div class='del'>-				"channels suported by country"),</div><div class='add'>+				"channels supported by country"),</div><div class='ctx'> 	    IPW2100_ORD(RESET_CNT, "adapter resets (warm)"),</div><div class='ctx'> 	    IPW2100_ORD(BEACON_INTERVAL, "Beacon interval"),</div><div class='ctx'> 	    IPW2100_ORD(ANTENNA_DIVERSITY,</div><div class='hunk'>@@ -4062,7 +4076,7 @@ static int ipw2100_switch_mode(struct ipw2100_priv *priv, u32 mode)</div><div class='ctx'> 	ipw2100_firmware.version = 0;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "%s: Reseting on mode change.\n", priv-&gt;net_dev-&gt;name);</div><div class='add'>+	printk(KERN_INFO "%s: Resetting on mode change.\n", priv-&gt;net_dev-&gt;name);</div><div class='ctx'> 	priv-&gt;reset_backoff = 0;</div><div class='ctx'> 	schedule_reset(priv);</div><div class='ctx'> </div><div class='hunk'>@@ -6082,9 +6096,7 @@ static const struct net_device_ops ipw2100_netdev_ops = {</div><div class='ctx'> /* Look into using netdev destructor to shutdown libipw? */</div><div class='ctx'> </div><div class='ctx'> static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev,</div><div class='del'>-					       void __iomem * base_addr,</div><div class='del'>-					       unsigned long mem_start,</div><div class='del'>-					       unsigned long mem_len)</div><div class='add'>+					       void __iomem * ioaddr)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipw2100_priv *priv;</div><div class='ctx'> 	struct net_device *dev;</div><div class='hunk'>@@ -6096,6 +6108,7 @@ static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev,</div><div class='ctx'> 	priv-&gt;ieee = netdev_priv(dev);</div><div class='ctx'> 	priv-&gt;pci_dev = pci_dev;</div><div class='ctx'> 	priv-&gt;net_dev = dev;</div><div class='add'>+	priv-&gt;ioaddr = ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;ieee-&gt;hard_start_xmit = ipw2100_tx;</div><div class='ctx'> 	priv-&gt;ieee-&gt;set_security = shim__set_security;</div><div class='hunk'>@@ -6111,10 +6124,6 @@ static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev,</div><div class='ctx'> 	dev-&gt;watchdog_timeo = 3 * HZ;</div><div class='ctx'> 	dev-&gt;irq = 0;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = (unsigned long)base_addr;</div><div class='del'>-	dev-&gt;mem_start = mem_start;</div><div class='del'>-	dev-&gt;mem_end = dev-&gt;mem_start + mem_len - 1;</div><div class='del'>-</div><div class='ctx'> 	/* NOTE: We don't use the wireless_handlers hook</div><div class='ctx'> 	 * in dev as the system will start throwing WX requests</div><div class='ctx'> 	 * to us before we're actually initialized and it just</div><div class='hunk'>@@ -6215,8 +6224,7 @@ static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev,</div><div class='ctx'> static int ipw2100_pci_init_one(struct pci_dev *pci_dev,</div><div class='ctx'> 				const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='del'>-	unsigned long mem_start, mem_len, mem_flags;</div><div class='del'>-	void __iomem *base_addr = NULL;</div><div class='add'>+	void __iomem *ioaddr;</div><div class='ctx'> 	struct net_device *dev = NULL;</div><div class='ctx'> 	struct ipw2100_priv *priv = NULL;</div><div class='ctx'> 	int err = 0;</div><div class='hunk'>@@ -6225,18 +6233,14 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,</div><div class='ctx'> </div><div class='ctx'> 	IPW_DEBUG_INFO("enter\n");</div><div class='ctx'> </div><div class='del'>-	mem_start = pci_resource_start(pci_dev, 0);</div><div class='del'>-	mem_len = pci_resource_len(pci_dev, 0);</div><div class='del'>-	mem_flags = pci_resource_flags(pci_dev, 0);</div><div class='del'>-</div><div class='del'>-	if ((mem_flags &amp; IORESOURCE_MEM) != IORESOURCE_MEM) {</div><div class='add'>+	if (!(pci_resource_flags(pci_dev, 0) &amp; IORESOURCE_MEM)) {</div><div class='ctx'> 		IPW_DEBUG_INFO("weird - resource type is not memory\n");</div><div class='ctx'> 		err = -ENODEV;</div><div class='del'>-		goto fail;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	base_addr = ioremap_nocache(mem_start, mem_len);</div><div class='del'>-	if (!base_addr) {</div><div class='add'>+	ioaddr = pci_iomap(pci_dev, 0, 0);</div><div class='add'>+	if (!ioaddr) {</div><div class='ctx'> 		printk(KERN_WARNING DRV_NAME</div><div class='ctx'> 		       "Error calling ioremap_nocache.\n");</div><div class='ctx'> 		err = -EIO;</div><div class='hunk'>@@ -6244,7 +6248,7 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* allocate and initialize our net_device */</div><div class='del'>-	dev = ipw2100_alloc_device(pci_dev, base_addr, mem_start, mem_len);</div><div class='add'>+	dev = ipw2100_alloc_device(pci_dev, ioaddr);</div><div class='ctx'> 	if (!dev) {</div><div class='ctx'> 		printk(KERN_WARNING DRV_NAME</div><div class='ctx'> 		       "Error calling ipw2100_alloc_device.\n");</div><div class='hunk'>@@ -6325,6 +6329,11 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,</div><div class='ctx'> 	printk(KERN_INFO DRV_NAME</div><div class='ctx'> 	       ": Detected Intel PRO/Wireless 2100 Network Connection\n");</div><div class='ctx'> </div><div class='add'>+	err = ipw2100_wdev_init(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto fail;</div><div class='add'>+	registered = 1;</div><div class='add'>+</div><div class='ctx'> 	/* Bring up the interface.  Pre 0.46, after we registered the</div><div class='ctx'> 	 * network device we would call ipw2100_up.  This introduced a race</div><div class='ctx'> 	 * condition with newer hotplug configurations (network was coming</div><div class='hunk'>@@ -6341,11 +6350,7 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,</div><div class='ctx'> 		       "Error calling register_netdev.\n");</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='del'>-	registered = 1;</div><div class='del'>-</div><div class='del'>-	err = ipw2100_wdev_init(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto fail;</div><div class='add'>+	registered = 2;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;action_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -6379,18 +6384,21 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,</div><div class='ctx'> 	priv-&gt;status |= STATUS_INITIALIZED;</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;action_mutex);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='ctx'> </div><div class='ctx'>       fail_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;action_mutex);</div><div class='del'>-	wiphy_unregister(priv-&gt;ieee-&gt;wdev.wiphy);</div><div class='del'>-	kfree(priv-&gt;ieee-&gt;bg_band.channels);</div><div class='ctx'>       fail:</div><div class='ctx'> 	if (dev) {</div><div class='del'>-		if (registered)</div><div class='add'>+		if (registered &gt;= 2)</div><div class='ctx'> 			unregister_netdev(dev);</div><div class='ctx'> </div><div class='add'>+		if (registered) {</div><div class='add'>+			wiphy_unregister(priv-&gt;ieee-&gt;wdev.wiphy);</div><div class='add'>+			kfree(priv-&gt;ieee-&gt;bg_band.channels);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		ipw2100_hw_stop_adapter(priv);</div><div class='ctx'> </div><div class='ctx'> 		ipw2100_disable_interrupts(priv);</div><div class='hunk'>@@ -6409,63 +6417,56 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,</div><div class='ctx'> 		pci_set_drvdata(pci_dev, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (base_addr)</div><div class='del'>-		iounmap(base_addr);</div><div class='add'>+	pci_iounmap(pci_dev, ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	pci_release_regions(pci_dev);</div><div class='ctx'> 	pci_disable_device(pci_dev);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipw2100_priv *priv = pci_get_drvdata(pci_dev);</div><div class='del'>-	struct net_device *dev;</div><div class='add'>+	struct net_device *dev = priv-&gt;net_dev;</div><div class='ctx'> </div><div class='del'>-	if (priv) {</div><div class='del'>-		mutex_lock(&amp;priv-&gt;action_mutex);</div><div class='add'>+	mutex_lock(&amp;priv-&gt;action_mutex);</div><div class='ctx'> </div><div class='del'>-		priv-&gt;status &amp;= ~STATUS_INITIALIZED;</div><div class='add'>+	priv-&gt;status &amp;= ~STATUS_INITIALIZED;</div><div class='ctx'> </div><div class='del'>-		dev = priv-&gt;net_dev;</div><div class='del'>-		sysfs_remove_group(&amp;pci_dev-&gt;dev.kobj,</div><div class='del'>-				   &amp;ipw2100_attribute_group);</div><div class='add'>+	sysfs_remove_group(&amp;pci_dev-&gt;dev.kobj, &amp;ipw2100_attribute_group);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM</div><div class='del'>-		if (ipw2100_firmware.version)</div><div class='del'>-			ipw2100_release_firmware(priv, &amp;ipw2100_firmware);</div><div class='add'>+	if (ipw2100_firmware.version)</div><div class='add'>+		ipw2100_release_firmware(priv, &amp;ipw2100_firmware);</div><div class='ctx'> #endif</div><div class='del'>-		/* Take down the hardware */</div><div class='del'>-		ipw2100_down(priv);</div><div class='add'>+	/* Take down the hardware */</div><div class='add'>+	ipw2100_down(priv);</div><div class='ctx'> </div><div class='del'>-		/* Release the mutex so that the network subsystem can</div><div class='del'>-		 * complete any needed calls into the driver... */</div><div class='del'>-		mutex_unlock(&amp;priv-&gt;action_mutex);</div><div class='add'>+	/* Release the mutex so that the network subsystem can</div><div class='add'>+	 * complete any needed calls into the driver... */</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;action_mutex);</div><div class='ctx'> </div><div class='del'>-		/* Unregister the device first - this results in close()</div><div class='del'>-		 * being called if the device is open.  If we free storage</div><div class='del'>-		 * first, then close() will crash. */</div><div class='del'>-		unregister_netdev(dev);</div><div class='add'>+	/* Unregister the device first - this results in close()</div><div class='add'>+	 * being called if the device is open.  If we free storage</div><div class='add'>+	 * first, then close() will crash.</div><div class='add'>+	 * FIXME: remove the comment above. */</div><div class='add'>+	unregister_netdev(dev);</div><div class='ctx'> </div><div class='del'>-		ipw2100_kill_works(priv);</div><div class='add'>+	ipw2100_kill_works(priv);</div><div class='ctx'> </div><div class='del'>-		ipw2100_queues_free(priv);</div><div class='add'>+	ipw2100_queues_free(priv);</div><div class='ctx'> </div><div class='del'>-		/* Free potential debugging firmware snapshot */</div><div class='del'>-		ipw2100_snapshot_free(priv);</div><div class='add'>+	/* Free potential debugging firmware snapshot */</div><div class='add'>+	ipw2100_snapshot_free(priv);</div><div class='ctx'> </div><div class='del'>-		if (dev-&gt;irq)</div><div class='del'>-			free_irq(dev-&gt;irq, priv);</div><div class='add'>+	free_irq(dev-&gt;irq, priv);</div><div class='ctx'> </div><div class='del'>-		if (dev-&gt;base_addr)</div><div class='del'>-			iounmap((void __iomem *)dev-&gt;base_addr);</div><div class='add'>+	pci_iounmap(pci_dev, priv-&gt;ioaddr);</div><div class='ctx'> </div><div class='del'>-		/* wiphy_unregister needs to be here, before free_libipw */</div><div class='del'>-		wiphy_unregister(priv-&gt;ieee-&gt;wdev.wiphy);</div><div class='del'>-		kfree(priv-&gt;ieee-&gt;bg_band.channels);</div><div class='del'>-		free_libipw(dev, 0);</div><div class='del'>-	}</div><div class='add'>+	/* wiphy_unregister needs to be here, before free_libipw */</div><div class='add'>+	wiphy_unregister(priv-&gt;ieee-&gt;wdev.wiphy);</div><div class='add'>+	kfree(priv-&gt;ieee-&gt;bg_band.channels);</div><div class='add'>+	free_libipw(dev, 0);</div><div class='ctx'> </div><div class='ctx'> 	pci_release_regions(pci_dev);</div><div class='ctx'> 	pci_disable_device(pci_dev);</div><div class='hunk'>@@ -8508,8 +8509,7 @@ static void ipw2100_release_firmware(struct ipw2100_priv *priv,</div><div class='ctx'> 				     struct ipw2100_fw *fw)</div><div class='ctx'> {</div><div class='ctx'> 	fw-&gt;version = 0;</div><div class='del'>-	if (fw-&gt;fw_entry)</div><div class='del'>-		release_firmware(fw-&gt;fw_entry);</div><div class='add'>+	release_firmware(fw-&gt;fw_entry);</div><div class='ctx'> 	fw-&gt;fw_entry = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -8609,7 +8609,7 @@ static int ipw2100_ucode_download(struct ipw2100_priv *priv,</div><div class='ctx'> 	struct net_device *dev = priv-&gt;net_dev;</div><div class='ctx'> 	const unsigned char *microcode_data = fw-&gt;uc.data;</div><div class='ctx'> 	unsigned int microcode_data_left = fw-&gt;uc.size;</div><div class='del'>-	void __iomem *reg = (void __iomem *)dev-&gt;base_addr;</div><div class='add'>+	void __iomem *reg = priv-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	struct symbol_alive_response response;</div><div class='ctx'> 	int i, j;</div><div class='head'>diff --git a/drivers/net/wireless/ipw2x00/ipw2100.h b/drivers/net/wireless/ipw2x00/ipw2100.h<br/>index 99cba968aa58..973125242490 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ipw2x00/ipw2100.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ipw2x00/ipw2100.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ipw2x00/ipw2100.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ipw2x00/ipw2100.h</a></div><div class='hunk'>@@ -135,15 +135,6 @@ enum {</div><div class='ctx'> 	IPW_HW_STATE_ENABLED = 0</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ssid_context {</div><div class='del'>-	char ssid[IW_ESSID_MAX_SIZE + 1];</div><div class='del'>-	int ssid_len;</div><div class='del'>-	unsigned char bssid[ETH_ALEN];</div><div class='del'>-	int port_type;</div><div class='del'>-	int channel;</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> extern const char *port_type_str[];</div><div class='ctx'> extern const char *band_str[];</div><div class='ctx'> </div><div class='hunk'>@@ -488,6 +479,7 @@ enum {</div><div class='ctx'> #define CAP_PRIVACY_ON          (1&lt;&lt;1)	/* Off = No privacy */</div><div class='ctx'> </div><div class='ctx'> struct ipw2100_priv {</div><div class='add'>+	void __iomem *ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	int stop_hang_check;	/* Set 1 when shutting down to kill hang_check */</div><div class='ctx'> 	int stop_rf_kill;	/* Set 1 when shutting down to kill rf_kill */</div><div class='head'>diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c<br/>index 2b022571a859..0036737fe8e3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ipw2x00/ipw2200.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ipw2x00/ipw2200.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ipw2x00/ipw2200.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ipw2x00/ipw2200.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;net/cfg80211-wext.h&gt;</div><div class='ctx'> #include "ipw2200.h"</div><div class='add'>+#include "ipw.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #ifndef KBUILD_EXTMOD</div><div class='hunk'>@@ -2191,6 +2192,7 @@ static int __ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	unsigned long now, end;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> 	if (priv-&gt;status &amp; STATUS_HCMD_ACTIVE) {</div><div class='hunk'>@@ -2232,10 +2234,20 @@ static int __ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd)</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='ctx'> </div><div class='add'>+	now = jiffies;</div><div class='add'>+	end = now + HOST_COMPLETE_TIMEOUT;</div><div class='add'>+again:</div><div class='ctx'> 	rc = wait_event_interruptible_timeout(priv-&gt;wait_command_queue,</div><div class='ctx'> 					      !(priv-&gt;</div><div class='ctx'> 						status &amp; STATUS_HCMD_ACTIVE),</div><div class='del'>-					      HOST_COMPLETE_TIMEOUT);</div><div class='add'>+					      end - now);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		now = jiffies;</div><div class='add'>+		if (time_before(now, end))</div><div class='add'>+			goto again;</div><div class='add'>+		rc = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (rc == 0) {</div><div class='ctx'> 		spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> 		if (priv-&gt;status &amp; STATUS_HCMD_ACTIVE) {</div><div class='hunk'>@@ -3657,8 +3669,7 @@ static int ipw_load(struct ipw_priv *priv)</div><div class='ctx'> 		priv-&gt;rxq = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	ipw_tx_queue_free(priv);</div><div class='del'>-	if (raw)</div><div class='del'>-		release_firmware(raw);</div><div class='add'>+	release_firmware(raw);</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> 	fw_loaded = 0;</div><div class='ctx'> 	raw = NULL;</div><div class='hunk'>@@ -7024,7 +7035,7 @@ static int ipw_qos_activate(struct ipw_priv *priv,</div><div class='ctx'> 			    cpu_to_le16(burst_duration);</div><div class='ctx'> 	} else if (priv-&gt;ieee-&gt;iw_mode == IW_MODE_ADHOC) {</div><div class='ctx'> 		if (type == IEEE_B) {</div><div class='del'>-			IPW_DEBUG_QOS("QoS activate IBSS nework mode %d\n",</div><div class='add'>+			IPW_DEBUG_QOS("QoS activate IBSS network mode %d\n",</div><div class='ctx'> 				      type);</div><div class='ctx'> 			if (priv-&gt;qos_data.qos_enable == 0)</div><div class='ctx'> 				active_one = &amp;def_parameters_CCK;</div><div class='hunk'>@@ -11432,20 +11443,6 @@ static void ipw_bg_down(struct work_struct *work)</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Called by register_netdev() */</div><div class='del'>-static int ipw_net_init(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int rc = 0;</div><div class='del'>-	struct ipw_priv *priv = libipw_priv(dev);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;priv-&gt;mutex);</div><div class='del'>-	if (ipw_up(priv))</div><div class='del'>-		rc = -EIO;</div><div class='del'>-	mutex_unlock(&amp;priv-&gt;mutex);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ipw_wdev_init(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int i, rc = 0;</div><div class='hunk'>@@ -11533,6 +11530,9 @@ static int ipw_wdev_init(struct net_device *dev)</div><div class='ctx'> 		wdev-&gt;wiphy-&gt;bands[IEEE80211_BAND_5GHZ] = a_band;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	wdev-&gt;wiphy-&gt;cipher_suites = ipw_cipher_suites;</div><div class='add'>+	wdev-&gt;wiphy-&gt;n_cipher_suites = ARRAY_SIZE(ipw_cipher_suites);</div><div class='add'>+</div><div class='ctx'> 	set_wiphy_dev(wdev-&gt;wiphy, &amp;priv-&gt;pci_dev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	/* With that information in place, we can now register the wiphy... */</div><div class='hunk'>@@ -11711,7 +11711,6 @@ static void ipw_prom_free(struct ipw_priv *priv)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops ipw_netdev_ops = {</div><div class='del'>-	.ndo_init		= ipw_net_init,</div><div class='ctx'> 	.ndo_open		= ipw_net_open,</div><div class='ctx'> 	.ndo_stop		= ipw_net_stop,</div><div class='ctx'> 	.ndo_set_rx_mode	= ipw_net_set_multicast_list,</div><div class='hunk'>@@ -11826,10 +11825,6 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	net_dev-&gt;wireless_data = &amp;priv-&gt;wireless_data;</div><div class='ctx'> 	net_dev-&gt;wireless_handlers = &amp;ipw_wx_handler_def;</div><div class='ctx'> 	net_dev-&gt;ethtool_ops = &amp;ipw_ethtool_ops;</div><div class='del'>-	net_dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-	net_dev-&gt;base_addr = (unsigned long)priv-&gt;hw_base;</div><div class='del'>-	net_dev-&gt;mem_start = pci_resource_start(pdev, 0);</div><div class='del'>-	net_dev-&gt;mem_end = net_dev-&gt;mem_start + pci_resource_len(pdev, 0) - 1;</div><div class='ctx'> </div><div class='ctx'> 	err = sysfs_create_group(&amp;pdev-&gt;dev.kobj, &amp;ipw_attribute_group);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -11838,17 +11833,24 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 		goto out_release_irq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;priv-&gt;mutex);</div><div class='del'>-	err = register_netdev(net_dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		IPW_ERROR("failed to register network device\n");</div><div class='add'>+	if (ipw_up(priv)) {</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;mutex);</div><div class='add'>+		err = -EIO;</div><div class='ctx'> 		goto out_remove_sysfs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mutex);</div><div class='add'>+</div><div class='ctx'> 	err = ipw_wdev_init(net_dev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		IPW_ERROR("failed to register wireless device\n");</div><div class='del'>-		goto out_unregister_netdev;</div><div class='add'>+		goto out_remove_sysfs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = register_netdev(net_dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		IPW_ERROR("failed to register network device\n");</div><div class='add'>+		goto out_unregister_wiphy;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_IPW2200_PROMISCUOUS</div><div class='hunk'>@@ -11857,10 +11859,8 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			IPW_ERROR("Failed to register promiscuous network "</div><div class='ctx'> 				  "device (error %d).\n", err);</div><div class='del'>-			wiphy_unregister(priv-&gt;ieee-&gt;wdev.wiphy);</div><div class='del'>-			kfree(priv-&gt;ieee-&gt;a_band.channels);</div><div class='del'>-			kfree(priv-&gt;ieee-&gt;bg_band.channels);</div><div class='del'>-			goto out_unregister_netdev;</div><div class='add'>+			unregister_netdev(priv-&gt;net_dev);</div><div class='add'>+			goto out_unregister_wiphy;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='hunk'>@@ -11872,8 +11872,10 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-      out_unregister_netdev:</div><div class='del'>-	unregister_netdev(priv-&gt;net_dev);</div><div class='add'>+      out_unregister_wiphy:</div><div class='add'>+	wiphy_unregister(priv-&gt;ieee-&gt;wdev.wiphy);</div><div class='add'>+	kfree(priv-&gt;ieee-&gt;a_band.channels);</div><div class='add'>+	kfree(priv-&gt;ieee-&gt;bg_band.channels);</div><div class='ctx'>       out_remove_sysfs:</div><div class='ctx'> 	sysfs_remove_group(&amp;pdev-&gt;dev.kobj, &amp;ipw_attribute_group);</div><div class='ctx'>       out_release_irq:</div><div class='head'>diff --git a/drivers/net/wireless/ipw2x00/libipw.h b/drivers/net/wireless/ipw2x00/libipw.h<br/>index 8874588fb929..0b22fb421735 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ipw2x00/libipw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ipw2x00/libipw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ipw2x00/libipw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ipw2x00/libipw.h</a></div><div class='hunk'>@@ -584,61 +584,6 @@ struct libipw_tim_parameters {</div><div class='ctx'> </div><div class='ctx'> /*******************************************************/</div><div class='ctx'> </div><div class='del'>-enum {				/* libipw_basic_report.map */</div><div class='del'>-	LIBIPW_BASIC_MAP_BSS = (1 &lt;&lt; 0),</div><div class='del'>-	LIBIPW_BASIC_MAP_OFDM = (1 &lt;&lt; 1),</div><div class='del'>-	LIBIPW_BASIC_MAP_UNIDENTIFIED = (1 &lt;&lt; 2),</div><div class='del'>-	LIBIPW_BASIC_MAP_RADAR = (1 &lt;&lt; 3),</div><div class='del'>-	LIBIPW_BASIC_MAP_UNMEASURED = (1 &lt;&lt; 4),</div><div class='del'>-	/* Bits 5-7 are reserved */</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-struct libipw_basic_report {</div><div class='del'>-	u8 channel;</div><div class='del'>-	__le64 start_time;</div><div class='del'>-	__le16 duration;</div><div class='del'>-	u8 map;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-enum {				/* libipw_measurement_request.mode */</div><div class='del'>-	/* Bit 0 is reserved */</div><div class='del'>-	LIBIPW_MEASUREMENT_ENABLE = (1 &lt;&lt; 1),</div><div class='del'>-	LIBIPW_MEASUREMENT_REQUEST = (1 &lt;&lt; 2),</div><div class='del'>-	LIBIPW_MEASUREMENT_REPORT = (1 &lt;&lt; 3),</div><div class='del'>-	/* Bits 4-7 are reserved */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	LIBIPW_REPORT_BASIC = 0,	/* required */</div><div class='del'>-	LIBIPW_REPORT_CCA = 1,	/* optional */</div><div class='del'>-	LIBIPW_REPORT_RPI = 2,	/* optional */</div><div class='del'>-	/* 3-255 reserved */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct libipw_measurement_params {</div><div class='del'>-	u8 channel;</div><div class='del'>-	__le64 start_time;</div><div class='del'>-	__le16 duration;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct libipw_measurement_request {</div><div class='del'>-	struct libipw_info_element ie;</div><div class='del'>-	u8 token;</div><div class='del'>-	u8 mode;</div><div class='del'>-	u8 type;</div><div class='del'>-	struct libipw_measurement_params params[0];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct libipw_measurement_report {</div><div class='del'>-	struct libipw_info_element ie;</div><div class='del'>-	u8 token;</div><div class='del'>-	u8 mode;</div><div class='del'>-	u8 type;</div><div class='del'>-	union {</div><div class='del'>-		struct libipw_basic_report basic[0];</div><div class='del'>-	} u;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='ctx'> struct libipw_tpc_report {</div><div class='ctx'> 	u8 transmit_power;</div><div class='ctx'> 	u8 link_margin;</div><div class='head'>diff --git a/drivers/net/wireless/ipw2x00/libipw_rx.c b/drivers/net/wireless/ipw2x00/libipw_rx.c<br/>index c4955d25a19a..02e057923236 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/ipw2x00/libipw_rx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/ipw2x00/libipw_rx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ipw2x00/libipw_rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ipw2x00/libipw_rx.c</a></div><div class='hunk'>@@ -77,8 +77,8 @@ static struct libipw_frag_entry *libipw_frag_cache_find(struct</div><div class='ctx'> </div><div class='ctx'> 		if (entry-&gt;skb != NULL &amp;&amp; entry-&gt;seq == seq &amp;&amp;</div><div class='ctx'> 		    (entry-&gt;last_frag + 1 == frag || frag == -1) &amp;&amp;</div><div class='del'>-		    !compare_ether_addr(entry-&gt;src_addr, src) &amp;&amp;</div><div class='del'>-		    !compare_ether_addr(entry-&gt;dst_addr, dst))</div><div class='add'>+		    ether_addr_equal(entry-&gt;src_addr, src) &amp;&amp;</div><div class='add'>+		    ether_addr_equal(entry-&gt;dst_addr, dst))</div><div class='ctx'> 			return entry;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -245,12 +245,12 @@ static int libipw_is_eapol_frame(struct libipw_device *ieee,</div><div class='ctx'> 	/* check that the frame is unicast frame to us */</div><div class='ctx'> 	if ((fc &amp; (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==</div><div class='ctx'> 	    IEEE80211_FCTL_TODS &amp;&amp;</div><div class='del'>-	    !compare_ether_addr(hdr-&gt;addr1, dev-&gt;dev_addr) &amp;&amp;</div><div class='del'>-	    !compare_ether_addr(hdr-&gt;addr3, dev-&gt;dev_addr)) {</div><div class='add'>+	    ether_addr_equal(hdr-&gt;addr1, dev-&gt;dev_addr) &amp;&amp;</div><div class='add'>+	    ether_addr_equal(hdr-&gt;addr3, dev-&gt;dev_addr)) {</div><div class='ctx'> 		/* ToDS frame with own addr BSSID and DA */</div><div class='ctx'> 	} else if ((fc &amp; (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==</div><div class='ctx'> 		   IEEE80211_FCTL_FROMDS &amp;&amp;</div><div class='del'>-		   !compare_ether_addr(hdr-&gt;addr1, dev-&gt;dev_addr)) {</div><div class='add'>+		   ether_addr_equal(hdr-&gt;addr1, dev-&gt;dev_addr)) {</div><div class='ctx'> 		/* FromDS frame with own addr as DA */</div><div class='ctx'> 	} else</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -523,8 +523,8 @@ int libipw_rx(struct libipw_device *ieee, struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	if (ieee-&gt;iw_mode == IW_MODE_MASTER &amp;&amp; !wds &amp;&amp;</div><div class='ctx'> 	    (fc &amp; (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==</div><div class='del'>-	    IEEE80211_FCTL_FROMDS &amp;&amp; ieee-&gt;stadev</div><div class='del'>-	    &amp;&amp; !compare_ether_addr(hdr-&gt;addr2, ieee-&gt;assoc_ap_addr)) {</div><div class='add'>+	    IEEE80211_FCTL_FROMDS &amp;&amp; ieee-&gt;stadev &amp;&amp;</div><div class='add'>+	    ether_addr_equal(hdr-&gt;addr2, ieee-&gt;assoc_ap_addr)) {</div><div class='ctx'> 		/* Frame from BSSID of the AP for which we are a client */</div><div class='ctx'> 		skb-&gt;dev = dev = ieee-&gt;stadev;</div><div class='ctx'> 		stats = hostap_get_stats(dev);</div><div class='hunk'>@@ -1468,7 +1468,7 @@ static inline int is_same_network(struct libipw_network *src,</div><div class='ctx'> 	 * as one network */</div><div class='ctx'> 	return ((src-&gt;ssid_len == dst-&gt;ssid_len) &amp;&amp;</div><div class='ctx'> 		(src-&gt;channel == dst-&gt;channel) &amp;&amp;</div><div class='del'>-		!compare_ether_addr(src-&gt;bssid, dst-&gt;bssid) &amp;&amp;</div><div class='add'>+		ether_addr_equal(src-&gt;bssid, dst-&gt;bssid) &amp;&amp;</div><div class='ctx'> 		!memcmp(src-&gt;ssid, dst-&gt;ssid, src-&gt;ssid_len));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/iwlegacy/3945.c b/drivers/net/wireless/iwlegacy/3945.c<br/>index b25c01be0d90..87e539894330 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlegacy/3945.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlegacy/3945.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlegacy/3945.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlegacy/3945.c</a></div><div class='hunk'>@@ -453,10 +453,10 @@ il3945_is_network_packet(struct il_priv *il, struct ieee80211_hdr *header)</div><div class='ctx'> 	switch (il-&gt;iw_mode) {</div><div class='ctx'> 	case NL80211_IFTYPE_ADHOC:	/* Header: Dest. | Source    | BSSID */</div><div class='ctx'> 		/* packets to our IBSS update information */</div><div class='del'>-		return !compare_ether_addr(header-&gt;addr3, il-&gt;bssid);</div><div class='add'>+		return ether_addr_equal(header-&gt;addr3, il-&gt;bssid);</div><div class='ctx'> 	case NL80211_IFTYPE_STATION:	/* Header: Dest. | AP{BSSID} | Source */</div><div class='ctx'> 		/* packets to our IBSS update information */</div><div class='del'>-		return !compare_ether_addr(header-&gt;addr2, il-&gt;bssid);</div><div class='add'>+		return ether_addr_equal(header-&gt;addr2, il-&gt;bssid);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/wireless/iwlegacy/4965-mac.c b/drivers/net/wireless/iwlegacy/4965-mac.c<br/>index c46275a92565..509301a5e7e2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlegacy/4965-mac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlegacy/4965-mac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlegacy/4965-mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlegacy/4965-mac.c</a></div><div class='hunk'>@@ -2565,7 +2565,7 @@ il4965_find_station(struct il_priv *il, const u8 *addr)</div><div class='ctx'> 	spin_lock_irqsave(&amp;il-&gt;sta_lock, flags);</div><div class='ctx'> 	for (i = start; i &lt; il-&gt;hw_params.max_stations; i++)</div><div class='ctx'> 		if (il-&gt;stations[i].used &amp;&amp;</div><div class='del'>-		    (!compare_ether_addr(il-&gt;stations[i].sta.sta.addr, addr))) {</div><div class='add'>+		    ether_addr_equal(il-&gt;stations[i].sta.sta.addr, addr)) {</div><div class='ctx'> 			ret = i;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2850,9 +2850,9 @@ void</div><div class='ctx'> il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags,</div><div class='ctx'> 			    struct ieee80211_tx_info *info)</div><div class='ctx'> {</div><div class='del'>-	struct ieee80211_tx_rate *r = &amp;info-&gt;control.rates[0];</div><div class='add'>+	struct ieee80211_tx_rate *r = &amp;info-&gt;status.rates[0];</div><div class='ctx'> </div><div class='del'>-	info-&gt;antenna_sel_tx =</div><div class='add'>+	info-&gt;status.antenna =</div><div class='ctx'> 	    ((rate_n_flags &amp; RATE_MCS_ANT_ABC_MSK) &gt;&gt; RATE_MCS_ANT_POS);</div><div class='ctx'> 	if (rate_n_flags &amp; RATE_MCS_HT_MSK)</div><div class='ctx'> 		r-&gt;flags |= IEEE80211_TX_RC_MCS;</div><div class='head'>diff --git a/drivers/net/wireless/iwlegacy/4965-rs.c b/drivers/net/wireless/iwlegacy/4965-rs.c<br/>index 11ab1247fae1..f3b8e91aa3dc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlegacy/4965-rs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlegacy/4965-rs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlegacy/4965-rs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlegacy/4965-rs.c</a></div><div class='hunk'>@@ -873,7 +873,7 @@ il4965_rs_tx_status(void *il_r, struct ieee80211_supported_band *sband,</div><div class='ctx'> 	    tbl_type.is_SGI != !!(mac_flags &amp; IEEE80211_TX_RC_SHORT_GI) ||</div><div class='ctx'> 	    tbl_type.is_ht40 != !!(mac_flags &amp; IEEE80211_TX_RC_40_MHZ_WIDTH) ||</div><div class='ctx'> 	    tbl_type.is_dup != !!(mac_flags &amp; IEEE80211_TX_RC_DUP_DATA) ||</div><div class='del'>-	    tbl_type.ant_type != info-&gt;antenna_sel_tx ||</div><div class='add'>+	    tbl_type.ant_type != info-&gt;status.antenna ||</div><div class='ctx'> 	    !!(tx_rate &amp; RATE_MCS_HT_MSK) != !!(mac_flags &amp; IEEE80211_TX_RC_MCS)</div><div class='ctx'> 	    || !!(tx_rate &amp; RATE_MCS_GF_MSK) !=</div><div class='ctx'> 	    !!(mac_flags &amp; IEEE80211_TX_RC_GREEN_FIELD) || rs_idx != mac_idx) {</div><div class='head'>diff --git a/drivers/net/wireless/iwlegacy/common.c b/drivers/net/wireless/iwlegacy/common.c<br/>index eaf249452e51..cbf2dc18341f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlegacy/common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlegacy/common.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlegacy/common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlegacy/common.c</a></div><div class='hunk'>@@ -1896,8 +1896,8 @@ il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,</div><div class='ctx'> 		sta_id = il-&gt;hw_params.bcast_id;</div><div class='ctx'> 	else</div><div class='ctx'> 		for (i = IL_STA_ID; i &lt; il-&gt;hw_params.max_stations; i++) {</div><div class='del'>-			if (!compare_ether_addr</div><div class='del'>-			    (il-&gt;stations[i].sta.sta.addr, addr)) {</div><div class='add'>+			if (ether_addr_equal(il-&gt;stations[i].sta.sta.addr,</div><div class='add'>+					     addr)) {</div><div class='ctx'> 				sta_id = i;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1926,7 +1926,7 @@ il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,</div><div class='ctx'> </div><div class='ctx'> 	if ((il-&gt;stations[sta_id].used &amp; IL_STA_DRIVER_ACTIVE) &amp;&amp;</div><div class='ctx'> 	    (il-&gt;stations[sta_id].used &amp; IL_STA_UCODE_ACTIVE) &amp;&amp;</div><div class='del'>-	    !compare_ether_addr(il-&gt;stations[sta_id].sta.sta.addr, addr)) {</div><div class='add'>+	    ether_addr_equal(il-&gt;stations[sta_id].sta.sta.addr, addr)) {</div><div class='ctx'> 		D_ASSOC("STA %d (%pM) already added, not adding again.\n",</div><div class='ctx'> 			sta_id, addr);</div><div class='ctx'> 		return sta_id;</div><div class='hunk'>@@ -3744,10 +3744,10 @@ il_full_rxon_required(struct il_priv *il)</div><div class='ctx'> </div><div class='ctx'> 	/* These items are only settable from the full RXON command */</div><div class='ctx'> 	CHK(!il_is_associated(il));</div><div class='del'>-	CHK(compare_ether_addr(staging-&gt;bssid_addr, active-&gt;bssid_addr));</div><div class='del'>-	CHK(compare_ether_addr(staging-&gt;node_addr, active-&gt;node_addr));</div><div class='del'>-	CHK(compare_ether_addr</div><div class='del'>-	    (staging-&gt;wlap_bssid_addr, active-&gt;wlap_bssid_addr));</div><div class='add'>+	CHK(!ether_addr_equal(staging-&gt;bssid_addr, active-&gt;bssid_addr));</div><div class='add'>+	CHK(!ether_addr_equal(staging-&gt;node_addr, active-&gt;node_addr));</div><div class='add'>+	CHK(!ether_addr_equal(staging-&gt;wlap_bssid_addr,</div><div class='add'>+			      active-&gt;wlap_bssid_addr));</div><div class='ctx'> 	CHK_NEQ(staging-&gt;dev_type, active-&gt;dev_type);</div><div class='ctx'> 	CHK_NEQ(staging-&gt;channel, active-&gt;channel);</div><div class='ctx'> 	CHK_NEQ(staging-&gt;air_propagation, active-&gt;air_propagation);</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/Kconfig b/drivers/net/wireless/iwlwifi/Kconfig<br/>index 2fe62730dddd..2463c0626438 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/Kconfig</a></div><div class='hunk'>@@ -113,20 +113,21 @@ config IWLWIFI_DEVICE_TESTMODE</div><div class='ctx'> 	  generic netlink message via NL80211_TESTMODE channel.</div><div class='ctx'> </div><div class='ctx'> config IWLWIFI_P2P</div><div class='del'>-       bool "iwlwifi experimental P2P support"</div><div class='del'>-       depends on IWLWIFI</div><div class='del'>-       help</div><div class='del'>-         This option enables experimental P2P support for some devices</div><div class='del'>-         based on microcode support. Since P2P support is still under</div><div class='del'>-         development, this option may even enable it for some devices</div><div class='del'>-         now that turn out to not support it in the future due to</div><div class='del'>-         microcode restrictions.</div><div class='del'>-</div><div class='del'>-         To determine if your microcode supports the experimental P2P</div><div class='del'>-         offered by this option, check if the driver advertises AP</div><div class='del'>-         support when it is loaded.</div><div class='del'>-</div><div class='del'>-         Say Y only if you want to experiment with P2P.</div><div class='add'>+	def_bool y</div><div class='add'>+	bool "iwlwifi experimental P2P support"</div><div class='add'>+	depends on IWLWIFI</div><div class='add'>+	help</div><div class='add'>+	  This option enables experimental P2P support for some devices</div><div class='add'>+	  based on microcode support. Since P2P support is still under</div><div class='add'>+	  development, this option may even enable it for some devices</div><div class='add'>+	  now that turn out to not support it in the future due to</div><div class='add'>+	  microcode restrictions.</div><div class='add'>+</div><div class='add'>+	  To determine if your microcode supports the experimental P2P</div><div class='add'>+	  offered by this option, check if the driver advertises AP</div><div class='add'>+	  support when it is loaded.</div><div class='add'>+</div><div class='add'>+	  Say Y only if you want to experiment with P2P.</div><div class='ctx'> </div><div class='ctx'> config IWLWIFI_EXPERIMENTAL_MFP</div><div class='ctx'> 	bool "support MFP (802.11w) even if uCode doesn't advertise"</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/Makefile b/drivers/net/wireless/iwlwifi/Makefile<br/>index 85d163ed3db1..d615eacbf050 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/Makefile</a></div><div class='hunk'>@@ -5,9 +5,9 @@ iwlwifi-objs		+= iwl-ucode.o iwl-agn-tx.o iwl-debug.o</div><div class='ctx'> iwlwifi-objs		+= iwl-agn-lib.o iwl-agn-calib.o iwl-io.o</div><div class='ctx'> iwlwifi-objs		+= iwl-agn-tt.o iwl-agn-sta.o iwl-agn-rx.o</div><div class='ctx'> </div><div class='del'>-iwlwifi-objs		+= iwl-core.o iwl-eeprom.o iwl-power.o</div><div class='add'>+iwlwifi-objs		+= iwl-eeprom.o iwl-power.o</div><div class='ctx'> iwlwifi-objs		+= iwl-scan.o iwl-led.o</div><div class='del'>-iwlwifi-objs		+= iwl-agn-rxon.o</div><div class='add'>+iwlwifi-objs		+= iwl-agn-rxon.o iwl-agn-devices.o</div><div class='ctx'> iwlwifi-objs		+= iwl-5000.o</div><div class='ctx'> iwlwifi-objs		+= iwl-6000.o</div><div class='ctx'> iwlwifi-objs		+= iwl-1000.o</div><div class='hunk'>@@ -17,6 +17,7 @@ iwlwifi-objs		+= iwl-drv.o</div><div class='ctx'> iwlwifi-objs		+= iwl-notif-wait.o</div><div class='ctx'> iwlwifi-objs		+= iwl-trans-pcie.o iwl-trans-pcie-rx.o iwl-trans-pcie-tx.o</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> iwlwifi-$(CONFIG_IWLWIFI_DEBUGFS) += iwl-debugfs.o</div><div class='ctx'> iwlwifi-$(CONFIG_IWLWIFI_DEVICE_TRACING) += iwl-devtrace.o</div><div class='ctx'> iwlwifi-$(CONFIG_IWLWIFI_DEVICE_TESTMODE) += iwl-testmode.o</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c<br/>index 5b0d888f746b..2629a6602dfa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-1000.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-1000.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-1000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-1000.c</a></div><div class='hunk'>@@ -24,30 +24,16 @@</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;net/mac80211.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;asm/unaligned.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='del'>-</div><div class='del'>-#include "iwl-eeprom.h"</div><div class='del'>-#include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='del'>-#include "iwl-io.h"</div><div class='del'>-#include "iwl-agn.h"</div><div class='del'>-#include "iwl-agn-hw.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='add'>+#include "iwl-config.h"</div><div class='ctx'> #include "iwl-cfg.h"</div><div class='del'>-#include "iwl-prph.h"</div><div class='add'>+#include "iwl-csr.h"</div><div class='add'>+#include "iwl-agn-hw.h"</div><div class='ctx'> </div><div class='ctx'> /* Highest firmware API version supported */</div><div class='del'>-#define IWL1000_UCODE_API_MAX 6</div><div class='del'>-#define IWL100_UCODE_API_MAX 6</div><div class='add'>+#define IWL1000_UCODE_API_MAX 5</div><div class='add'>+#define IWL100_UCODE_API_MAX 5</div><div class='ctx'> </div><div class='ctx'> /* Oldest version we won't warn about */</div><div class='ctx'> #define IWL1000_UCODE_API_OK 5</div><div class='hunk'>@@ -57,6 +43,10 @@</div><div class='ctx'> #define IWL1000_UCODE_API_MIN 1</div><div class='ctx'> #define IWL100_UCODE_API_MIN 5</div><div class='ctx'> </div><div class='add'>+/* EEPROM version */</div><div class='add'>+#define EEPROM_1000_TX_POWER_VERSION	(4)</div><div class='add'>+#define EEPROM_1000_EEPROM_VERSION	(0x15C)</div><div class='add'>+</div><div class='ctx'> #define IWL1000_FW_PRE "iwlwifi-1000-"</div><div class='ctx'> #define IWL1000_MODULE_FIRMWARE(api) IWL1000_FW_PRE __stringify(api) ".ucode"</div><div class='ctx'> </div><div class='hunk'>@@ -64,100 +54,8 @@</div><div class='ctx'> #define IWL100_MODULE_FIRMWARE(api) IWL100_FW_PRE __stringify(api) ".ucode"</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * For 1000, use advance thermal throttling critical temperature threshold,</div><div class='del'>- * but legacy thermal management implementation for now.</div><div class='del'>- * This is for the reason of 1000 uCode using advance thermal throttling API</div><div class='del'>- * but not implement ct_kill_exit based on ct_kill exit temperature</div><div class='del'>- * so the thermal throttling will still based on legacy thermal throttling</div><div class='del'>- * management.</div><div class='del'>- * The code here need to be modified once 1000 uCode has the advanced thermal</div><div class='del'>- * throttling algorithm in place</div><div class='del'>- */</div><div class='del'>-static void iwl1000_set_ct_threshold(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* want Celsius */</div><div class='del'>-	hw_params(priv).ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY;</div><div class='del'>-	hw_params(priv).ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* NIC configuration for 1000 series */</div><div class='del'>-static void iwl1000_nic_config(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* set CSR_HW_CONFIG_REG for uCode use */</div><div class='del'>-	iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,</div><div class='del'>-		    CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |</div><div class='del'>-		    CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);</div><div class='del'>-</div><div class='del'>-	/* Setting digital SVR for 1000 card to 1.32V */</div><div class='del'>-	/* locking is acquired in iwl_set_bits_mask_prph() function */</div><div class='del'>-	iwl_set_bits_mask_prph(trans(priv), APMG_DIGITAL_SVR_REG,</div><div class='del'>-				APMG_SVR_DIGITAL_VOLTAGE_1_32,</div><div class='del'>-				~APMG_SVR_VOLTAGE_CONFIG_BIT_MSK);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct iwl_sensitivity_ranges iwl1000_sensitivity = {</div><div class='del'>-	.min_nrg_cck = 95,</div><div class='del'>-	.auto_corr_min_ofdm = 90,</div><div class='del'>-	.auto_corr_min_ofdm_mrc = 170,</div><div class='del'>-	.auto_corr_min_ofdm_x1 = 120,</div><div class='del'>-	.auto_corr_min_ofdm_mrc_x1 = 240,</div><div class='del'>-</div><div class='del'>-	.auto_corr_max_ofdm = 120,</div><div class='del'>-	.auto_corr_max_ofdm_mrc = 210,</div><div class='del'>-	.auto_corr_max_ofdm_x1 = 155,</div><div class='del'>-	.auto_corr_max_ofdm_mrc_x1 = 290,</div><div class='del'>-</div><div class='del'>-	.auto_corr_min_cck = 125,</div><div class='del'>-	.auto_corr_max_cck = 200,</div><div class='del'>-	.auto_corr_min_cck_mrc = 170,</div><div class='del'>-	.auto_corr_max_cck_mrc = 400,</div><div class='del'>-	.nrg_th_cck = 95,</div><div class='del'>-	.nrg_th_ofdm = 95,</div><div class='del'>-</div><div class='del'>-	.barker_corr_th_min = 190,</div><div class='del'>-	.barker_corr_th_min_mrc = 390,</div><div class='del'>-	.nrg_th_cca = 62,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void iwl1000_hw_set_hw_params(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	hw_params(priv).ht40_channel =  BIT(IEEE80211_BAND_2GHZ);</div><div class='del'>-</div><div class='del'>-	hw_params(priv).tx_chains_num =</div><div class='del'>-		num_of_ant(hw_params(priv).valid_tx_ant);</div><div class='del'>-	if (cfg(priv)-&gt;rx_with_siso_diversity)</div><div class='del'>-		hw_params(priv).rx_chains_num = 1;</div><div class='del'>-	else</div><div class='del'>-		hw_params(priv).rx_chains_num =</div><div class='del'>-			num_of_ant(hw_params(priv).valid_rx_ant);</div><div class='del'>-</div><div class='del'>-	iwl1000_set_ct_threshold(priv);</div><div class='del'>-</div><div class='del'>-	/* Set initial sensitivity parameters */</div><div class='del'>-	hw_params(priv).sens = &amp;iwl1000_sensitivity;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct iwl_lib_ops iwl1000_lib = {</div><div class='del'>-	.set_hw_params = iwl1000_hw_set_hw_params,</div><div class='del'>-	.nic_config = iwl1000_nic_config,</div><div class='del'>-	.eeprom_ops = {</div><div class='del'>-		.regulatory_bands = {</div><div class='del'>-			EEPROM_REG_BAND_1_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_2_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_3_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_4_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_5_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_24_HT40_CHANNELS,</div><div class='del'>-			EEPROM_REGULATORY_BAND_NO_HT40,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.temperature = iwlagn_temperature,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct iwl_base_params iwl1000_base_params = {</div><div class='ctx'> 	.num_of_queues = IWLAGN_NUM_QUEUES,</div><div class='del'>-	.num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,</div><div class='ctx'> 	.eeprom_size = OTP_LOW_IMAGE_SIZE,</div><div class='ctx'> 	.pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,</div><div class='ctx'> 	.max_ll_items = OTP_MAX_LL_ITEMS_1000,</div><div class='hunk'>@@ -166,15 +64,13 @@ static const struct iwl_base_params iwl1000_base_params = {</div><div class='ctx'> 	.support_ct_kill_exit = true,</div><div class='ctx'> 	.plcp_delta_threshold = IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF,</div><div class='ctx'> 	.chain_noise_scale = 1000,</div><div class='del'>-	.wd_timeout = IWL_DEF_WD_TIMEOUT,</div><div class='add'>+	.wd_timeout = IWL_WATCHHDOG_DISABLED,</div><div class='ctx'> 	.max_event_log_size = 128,</div><div class='del'>-	.wd_disable = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct iwl_ht_params iwl1000_ht_params = {</div><div class='ctx'> 	.ht_greenfield_support = true,</div><div class='ctx'> 	.use_rts_for_aggregation = true, /* use rts/cts protection */</div><div class='del'>-	.smps_mode = IEEE80211_SMPS_DYNAMIC,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define IWL_DEVICE_1000						\</div><div class='hunk'>@@ -182,11 +78,11 @@ static const struct iwl_ht_params iwl1000_ht_params = {</div><div class='ctx'> 	.ucode_api_max = IWL1000_UCODE_API_MAX,			\</div><div class='ctx'> 	.ucode_api_ok = IWL1000_UCODE_API_OK,			\</div><div class='ctx'> 	.ucode_api_min = IWL1000_UCODE_API_MIN,			\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_1000,		\</div><div class='ctx'> 	.max_inst_size = IWLAGN_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWLAGN_RTC_DATA_SIZE,			\</div><div class='ctx'> 	.eeprom_ver = EEPROM_1000_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION,	\</div><div class='del'>-	.lib = &amp;iwl1000_lib,					\</div><div class='ctx'> 	.base_params = &amp;iwl1000_base_params,			\</div><div class='ctx'> 	.led_mode = IWL_LED_BLINK</div><div class='ctx'> </div><div class='hunk'>@@ -206,11 +102,11 @@ const struct iwl_cfg iwl1000_bg_cfg = {</div><div class='ctx'> 	.ucode_api_max = IWL100_UCODE_API_MAX,			\</div><div class='ctx'> 	.ucode_api_ok = IWL100_UCODE_API_OK,			\</div><div class='ctx'> 	.ucode_api_min = IWL100_UCODE_API_MIN,			\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_100,			\</div><div class='ctx'> 	.max_inst_size = IWLAGN_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWLAGN_RTC_DATA_SIZE,			\</div><div class='ctx'> 	.eeprom_ver = EEPROM_1000_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_1000_TX_POWER_VERSION,	\</div><div class='del'>-	.lib = &amp;iwl1000_lib,					\</div><div class='ctx'> 	.base_params = &amp;iwl1000_base_params,			\</div><div class='ctx'> 	.led_mode = IWL_LED_RF_STATE,				\</div><div class='ctx'> 	.rx_with_siso_diversity = true</div><div class='hunk'>@@ -226,5 +122,5 @@ const struct iwl_cfg iwl100_bg_cfg = {</div><div class='ctx'> 	IWL_DEVICE_100,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-MODULE_FIRMWARE(IWL1000_MODULE_FIRMWARE(IWL1000_UCODE_API_MAX));</div><div class='del'>-MODULE_FIRMWARE(IWL100_MODULE_FIRMWARE(IWL100_UCODE_API_MAX));</div><div class='add'>+MODULE_FIRMWARE(IWL1000_MODULE_FIRMWARE(IWL1000_UCODE_API_OK));</div><div class='add'>+MODULE_FIRMWARE(IWL100_MODULE_FIRMWARE(IWL100_UCODE_API_OK));</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-2000.c b/drivers/net/wireless/iwlwifi/iwl-2000.c<br/>index 5635b9e2c69e..8133105ac645 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-2000.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-2000.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-2000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-2000.c</a></div><div class='hunk'>@@ -24,25 +24,12 @@</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;net/mac80211.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;asm/unaligned.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='del'>-</div><div class='del'>-#include "iwl-eeprom.h"</div><div class='del'>-#include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='del'>-#include "iwl-io.h"</div><div class='del'>-#include "iwl-agn.h"</div><div class='del'>-#include "iwl-agn-hw.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='add'>+#include "iwl-config.h"</div><div class='ctx'> #include "iwl-cfg.h"</div><div class='add'>+#include "iwl-agn-hw.h"</div><div class='add'>+#include "iwl-commands.h" /* needed for BT for now */</div><div class='ctx'> </div><div class='ctx'> /* Highest firmware API version supported */</div><div class='ctx'> #define IWL2030_UCODE_API_MAX 6</div><div class='hunk'>@@ -51,10 +38,10 @@</div><div class='ctx'> #define IWL135_UCODE_API_MAX 6</div><div class='ctx'> </div><div class='ctx'> /* Oldest version we won't warn about */</div><div class='del'>-#define IWL2030_UCODE_API_OK 5</div><div class='del'>-#define IWL2000_UCODE_API_OK 5</div><div class='del'>-#define IWL105_UCODE_API_OK 5</div><div class='del'>-#define IWL135_UCODE_API_OK 5</div><div class='add'>+#define IWL2030_UCODE_API_OK 6</div><div class='add'>+#define IWL2000_UCODE_API_OK 6</div><div class='add'>+#define IWL105_UCODE_API_OK 6</div><div class='add'>+#define IWL135_UCODE_API_OK 6</div><div class='ctx'> </div><div class='ctx'> /* Lowest firmware API version supported */</div><div class='ctx'> #define IWL2030_UCODE_API_MIN 5</div><div class='hunk'>@@ -62,6 +49,11 @@</div><div class='ctx'> #define IWL105_UCODE_API_MIN 5</div><div class='ctx'> #define IWL135_UCODE_API_MIN 5</div><div class='ctx'> </div><div class='add'>+/* EEPROM version */</div><div class='add'>+#define EEPROM_2000_TX_POWER_VERSION	(6)</div><div class='add'>+#define EEPROM_2000_EEPROM_VERSION	(0x805)</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> #define IWL2030_FW_PRE "iwlwifi-2030-"</div><div class='ctx'> #define IWL2030_MODULE_FIRMWARE(api) IWL2030_FW_PRE __stringify(api) ".ucode"</div><div class='ctx'> </div><div class='hunk'>@@ -74,105 +66,9 @@</div><div class='ctx'> #define IWL135_FW_PRE "iwlwifi-135-"</div><div class='ctx'> #define IWL135_MODULE_FIRMWARE(api) IWL135_FW_PRE __stringify(api) ".ucode"</div><div class='ctx'> </div><div class='del'>-static void iwl2000_set_ct_threshold(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* want Celsius */</div><div class='del'>-	hw_params(priv).ct_kill_threshold = CT_KILL_THRESHOLD;</div><div class='del'>-	hw_params(priv).ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* NIC configuration for 2000 series */</div><div class='del'>-static void iwl2000_nic_config(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	iwl_rf_config(priv);</div><div class='del'>-</div><div class='del'>-	if (cfg(priv)-&gt;iq_invert)</div><div class='del'>-		iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG,</div><div class='del'>-			    CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct iwl_sensitivity_ranges iwl2000_sensitivity = {</div><div class='del'>-	.min_nrg_cck = 97,</div><div class='del'>-	.auto_corr_min_ofdm = 80,</div><div class='del'>-	.auto_corr_min_ofdm_mrc = 128,</div><div class='del'>-	.auto_corr_min_ofdm_x1 = 105,</div><div class='del'>-	.auto_corr_min_ofdm_mrc_x1 = 192,</div><div class='del'>-</div><div class='del'>-	.auto_corr_max_ofdm = 145,</div><div class='del'>-	.auto_corr_max_ofdm_mrc = 232,</div><div class='del'>-	.auto_corr_max_ofdm_x1 = 110,</div><div class='del'>-	.auto_corr_max_ofdm_mrc_x1 = 232,</div><div class='del'>-</div><div class='del'>-	.auto_corr_min_cck = 125,</div><div class='del'>-	.auto_corr_max_cck = 175,</div><div class='del'>-	.auto_corr_min_cck_mrc = 160,</div><div class='del'>-	.auto_corr_max_cck_mrc = 310,</div><div class='del'>-	.nrg_th_cck = 97,</div><div class='del'>-	.nrg_th_ofdm = 100,</div><div class='del'>-</div><div class='del'>-	.barker_corr_th_min = 190,</div><div class='del'>-	.barker_corr_th_min_mrc = 390,</div><div class='del'>-	.nrg_th_cca = 62,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void iwl2000_hw_set_hw_params(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	hw_params(priv).ht40_channel =  BIT(IEEE80211_BAND_2GHZ);</div><div class='del'>-</div><div class='del'>-	hw_params(priv).tx_chains_num =</div><div class='del'>-		num_of_ant(hw_params(priv).valid_tx_ant);</div><div class='del'>-	if (cfg(priv)-&gt;rx_with_siso_diversity)</div><div class='del'>-		hw_params(priv).rx_chains_num = 1;</div><div class='del'>-	else</div><div class='del'>-		hw_params(priv).rx_chains_num =</div><div class='del'>-			num_of_ant(hw_params(priv).valid_rx_ant);</div><div class='del'>-</div><div class='del'>-	iwl2000_set_ct_threshold(priv);</div><div class='del'>-</div><div class='del'>-	/* Set initial sensitivity parameters */</div><div class='del'>-	hw_params(priv).sens = &amp;iwl2000_sensitivity;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct iwl_lib_ops iwl2000_lib = {</div><div class='del'>-	.set_hw_params = iwl2000_hw_set_hw_params,</div><div class='del'>-	.nic_config = iwl2000_nic_config,</div><div class='del'>-	.eeprom_ops = {</div><div class='del'>-		.regulatory_bands = {</div><div class='del'>-			EEPROM_REG_BAND_1_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_2_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_3_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_4_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_5_CHANNELS,</div><div class='del'>-			EEPROM_6000_REG_BAND_24_HT40_CHANNELS,</div><div class='del'>-			EEPROM_REGULATORY_BAND_NO_HT40,</div><div class='del'>-		},</div><div class='del'>-		.enhanced_txpower = true,</div><div class='del'>-	},</div><div class='del'>-	.temperature = iwlagn_temperature,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct iwl_lib_ops iwl2030_lib = {</div><div class='del'>-	.set_hw_params = iwl2000_hw_set_hw_params,</div><div class='del'>-	.nic_config = iwl2000_nic_config,</div><div class='del'>-	.eeprom_ops = {</div><div class='del'>-		.regulatory_bands = {</div><div class='del'>-			EEPROM_REG_BAND_1_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_2_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_3_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_4_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_5_CHANNELS,</div><div class='del'>-			EEPROM_6000_REG_BAND_24_HT40_CHANNELS,</div><div class='del'>-			EEPROM_REGULATORY_BAND_NO_HT40,</div><div class='del'>-		},</div><div class='del'>-		.enhanced_txpower = true,</div><div class='del'>-	},</div><div class='del'>-	.temperature = iwlagn_temperature,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct iwl_base_params iwl2000_base_params = {</div><div class='ctx'> 	.eeprom_size = OTP_LOW_IMAGE_SIZE,</div><div class='ctx'> 	.num_of_queues = IWLAGN_NUM_QUEUES,</div><div class='del'>-	.num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,</div><div class='ctx'> 	.pll_cfg_val = 0,</div><div class='ctx'> 	.max_ll_items = OTP_MAX_LL_ITEMS_2x00,</div><div class='ctx'> 	.shadow_ram_support = true,</div><div class='hunk'>@@ -183,7 +79,7 @@ static const struct iwl_base_params iwl2000_base_params = {</div><div class='ctx'> 	.chain_noise_scale = 1000,</div><div class='ctx'> 	.wd_timeout = IWL_DEF_WD_TIMEOUT,</div><div class='ctx'> 	.max_event_log_size = 512,</div><div class='del'>-	.shadow_reg_enable = true,</div><div class='add'>+	.shadow_reg_enable = false, /* TODO: fix bugs using this feature */</div><div class='ctx'> 	.hd_v2 = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -191,7 +87,6 @@ static const struct iwl_base_params iwl2000_base_params = {</div><div class='ctx'> static const struct iwl_base_params iwl2030_base_params = {</div><div class='ctx'> 	.eeprom_size = OTP_LOW_IMAGE_SIZE,</div><div class='ctx'> 	.num_of_queues = IWLAGN_NUM_QUEUES,</div><div class='del'>-	.num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,</div><div class='ctx'> 	.pll_cfg_val = 0,</div><div class='ctx'> 	.max_ll_items = OTP_MAX_LL_ITEMS_2x00,</div><div class='ctx'> 	.shadow_ram_support = true,</div><div class='hunk'>@@ -202,7 +97,7 @@ static const struct iwl_base_params iwl2030_base_params = {</div><div class='ctx'> 	.chain_noise_scale = 1000,</div><div class='ctx'> 	.wd_timeout = IWL_LONG_WD_TIMEOUT,</div><div class='ctx'> 	.max_event_log_size = 512,</div><div class='del'>-	.shadow_reg_enable = true,</div><div class='add'>+	.shadow_reg_enable = false, /* TODO: fix bugs using this feature */</div><div class='ctx'> 	.hd_v2 = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -226,16 +121,15 @@ static const struct iwl_bt_params iwl2030_bt_params = {</div><div class='ctx'> 	.ucode_api_max = IWL2000_UCODE_API_MAX,			\</div><div class='ctx'> 	.ucode_api_ok = IWL2000_UCODE_API_OK,			\</div><div class='ctx'> 	.ucode_api_min = IWL2000_UCODE_API_MIN,			\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_2000,		\</div><div class='ctx'> 	.max_inst_size = IWL60_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWL60_RTC_DATA_SIZE,			\</div><div class='ctx'> 	.eeprom_ver = EEPROM_2000_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION,	\</div><div class='del'>-	.lib = &amp;iwl2000_lib,					\</div><div class='ctx'> 	.base_params = &amp;iwl2000_base_params,			\</div><div class='ctx'> 	.need_temp_offset_calib = true,				\</div><div class='ctx'> 	.temp_offset_v2 = true,					\</div><div class='del'>-	.led_mode = IWL_LED_RF_STATE,				\</div><div class='del'>-	.iq_invert = true					\</div><div class='add'>+	.led_mode = IWL_LED_RF_STATE</div><div class='ctx'> </div><div class='ctx'> const struct iwl_cfg iwl2000_2bgn_cfg = {</div><div class='ctx'> 	.name = "Intel(R) Centrino(R) Wireless-N 2200 BGN",</div><div class='hunk'>@@ -254,18 +148,17 @@ const struct iwl_cfg iwl2000_2bgn_d_cfg = {</div><div class='ctx'> 	.ucode_api_max = IWL2030_UCODE_API_MAX,			\</div><div class='ctx'> 	.ucode_api_ok = IWL2030_UCODE_API_OK,			\</div><div class='ctx'> 	.ucode_api_min = IWL2030_UCODE_API_MIN,			\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_2030,		\</div><div class='ctx'> 	.max_inst_size = IWL60_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWL60_RTC_DATA_SIZE,			\</div><div class='ctx'> 	.eeprom_ver = EEPROM_2000_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION,	\</div><div class='del'>-	.lib = &amp;iwl2030_lib,					\</div><div class='ctx'> 	.base_params = &amp;iwl2030_base_params,			\</div><div class='ctx'> 	.bt_params = &amp;iwl2030_bt_params,			\</div><div class='ctx'> 	.need_temp_offset_calib = true,				\</div><div class='ctx'> 	.temp_offset_v2 = true,					\</div><div class='ctx'> 	.led_mode = IWL_LED_RF_STATE,				\</div><div class='del'>-	.adv_pm = true,						\</div><div class='del'>-	.iq_invert = true					\</div><div class='add'>+	.adv_pm = true</div><div class='ctx'> </div><div class='ctx'> const struct iwl_cfg iwl2030_2bgn_cfg = {</div><div class='ctx'> 	.name = "Intel(R) Centrino(R) Wireless-N 2230 BGN",</div><div class='hunk'>@@ -278,18 +171,17 @@ const struct iwl_cfg iwl2030_2bgn_cfg = {</div><div class='ctx'> 	.ucode_api_max = IWL105_UCODE_API_MAX,			\</div><div class='ctx'> 	.ucode_api_ok = IWL105_UCODE_API_OK,			\</div><div class='ctx'> 	.ucode_api_min = IWL105_UCODE_API_MIN,			\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_105,			\</div><div class='ctx'> 	.max_inst_size = IWL60_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWL60_RTC_DATA_SIZE,			\</div><div class='ctx'> 	.eeprom_ver = EEPROM_2000_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION,	\</div><div class='del'>-	.lib = &amp;iwl2000_lib,					\</div><div class='ctx'> 	.base_params = &amp;iwl2000_base_params,			\</div><div class='ctx'> 	.need_temp_offset_calib = true,				\</div><div class='ctx'> 	.temp_offset_v2 = true,					\</div><div class='ctx'> 	.led_mode = IWL_LED_RF_STATE,				\</div><div class='ctx'> 	.adv_pm = true,						\</div><div class='del'>-	.rx_with_siso_diversity = true,				\</div><div class='del'>-	.iq_invert = true					\</div><div class='add'>+	.rx_with_siso_diversity = true</div><div class='ctx'> </div><div class='ctx'> const struct iwl_cfg iwl105_bgn_cfg = {</div><div class='ctx'> 	.name = "Intel(R) Centrino(R) Wireless-N 105 BGN",</div><div class='hunk'>@@ -308,19 +200,18 @@ const struct iwl_cfg iwl105_bgn_d_cfg = {</div><div class='ctx'> 	.ucode_api_max = IWL135_UCODE_API_MAX,			\</div><div class='ctx'> 	.ucode_api_ok = IWL135_UCODE_API_OK,			\</div><div class='ctx'> 	.ucode_api_min = IWL135_UCODE_API_MIN,			\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_135,			\</div><div class='ctx'> 	.max_inst_size = IWL60_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWL60_RTC_DATA_SIZE,			\</div><div class='ctx'> 	.eeprom_ver = EEPROM_2000_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_2000_TX_POWER_VERSION,	\</div><div class='del'>-	.lib = &amp;iwl2030_lib,					\</div><div class='ctx'> 	.base_params = &amp;iwl2030_base_params,			\</div><div class='ctx'> 	.bt_params = &amp;iwl2030_bt_params,			\</div><div class='ctx'> 	.need_temp_offset_calib = true,				\</div><div class='ctx'> 	.temp_offset_v2 = true,					\</div><div class='ctx'> 	.led_mode = IWL_LED_RF_STATE,				\</div><div class='ctx'> 	.adv_pm = true,						\</div><div class='del'>-	.rx_with_siso_diversity = true,				\</div><div class='del'>-	.iq_invert = true					\</div><div class='add'>+	.rx_with_siso_diversity = true</div><div class='ctx'> </div><div class='ctx'> const struct iwl_cfg iwl135_bgn_cfg = {</div><div class='ctx'> 	.name = "Intel(R) Centrino(R) Wireless-N 135 BGN",</div><div class='hunk'>@@ -328,7 +219,7 @@ const struct iwl_cfg iwl135_bgn_cfg = {</div><div class='ctx'> 	.ht_params = &amp;iwl2000_ht_params,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-MODULE_FIRMWARE(IWL2000_MODULE_FIRMWARE(IWL2000_UCODE_API_MAX));</div><div class='del'>-MODULE_FIRMWARE(IWL2030_MODULE_FIRMWARE(IWL2030_UCODE_API_MAX));</div><div class='del'>-MODULE_FIRMWARE(IWL105_MODULE_FIRMWARE(IWL105_UCODE_API_MAX));</div><div class='del'>-MODULE_FIRMWARE(IWL135_MODULE_FIRMWARE(IWL135_UCODE_API_MAX));</div><div class='add'>+MODULE_FIRMWARE(IWL2000_MODULE_FIRMWARE(IWL2000_UCODE_API_OK));</div><div class='add'>+MODULE_FIRMWARE(IWL2030_MODULE_FIRMWARE(IWL2030_UCODE_API_OK));</div><div class='add'>+MODULE_FIRMWARE(IWL105_MODULE_FIRMWARE(IWL105_UCODE_API_OK));</div><div class='add'>+MODULE_FIRMWARE(IWL135_MODULE_FIRMWARE(IWL135_UCODE_API_OK));</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c<br/>index a805e97b89af..8e26bc825f23 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-5000.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-5000.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-5000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-5000.c</a></div><div class='hunk'>@@ -24,299 +24,47 @@</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;net/mac80211.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;asm/unaligned.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='del'>-</div><div class='del'>-#include "iwl-eeprom.h"</div><div class='del'>-#include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='del'>-#include "iwl-io.h"</div><div class='del'>-#include "iwl-agn.h"</div><div class='del'>-#include "iwl-agn-hw.h"</div><div class='del'>-#include "iwl-trans.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='add'>+#include "iwl-config.h"</div><div class='ctx'> #include "iwl-cfg.h"</div><div class='del'>-#include "iwl-prph.h"</div><div class='add'>+#include "iwl-agn-hw.h"</div><div class='add'>+#include "iwl-csr.h"</div><div class='ctx'> </div><div class='ctx'> /* Highest firmware API version supported */</div><div class='ctx'> #define IWL5000_UCODE_API_MAX 5</div><div class='ctx'> #define IWL5150_UCODE_API_MAX 2</div><div class='ctx'> </div><div class='add'>+/* Oldest version we won't warn about */</div><div class='add'>+#define IWL5000_UCODE_API_OK 5</div><div class='add'>+#define IWL5150_UCODE_API_OK 2</div><div class='add'>+</div><div class='ctx'> /* Lowest firmware API version supported */</div><div class='ctx'> #define IWL5000_UCODE_API_MIN 1</div><div class='ctx'> #define IWL5150_UCODE_API_MIN 1</div><div class='ctx'> </div><div class='add'>+/* EEPROM versions */</div><div class='add'>+#define EEPROM_5000_TX_POWER_VERSION	(4)</div><div class='add'>+#define EEPROM_5000_EEPROM_VERSION	(0x11A)</div><div class='add'>+#define EEPROM_5050_TX_POWER_VERSION	(4)</div><div class='add'>+#define EEPROM_5050_EEPROM_VERSION	(0x21E)</div><div class='add'>+</div><div class='ctx'> #define IWL5000_FW_PRE "iwlwifi-5000-"</div><div class='ctx'> #define IWL5000_MODULE_FIRMWARE(api) IWL5000_FW_PRE __stringify(api) ".ucode"</div><div class='ctx'> </div><div class='ctx'> #define IWL5150_FW_PRE "iwlwifi-5150-"</div><div class='ctx'> #define IWL5150_MODULE_FIRMWARE(api) IWL5150_FW_PRE __stringify(api) ".ucode"</div><div class='ctx'> </div><div class='del'>-/* NIC configuration for 5000 series */</div><div class='del'>-static void iwl5000_nic_config(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	iwl_rf_config(priv);</div><div class='del'>-</div><div class='del'>-	/* W/A : NIC is stuck in a reset state after Early PCIe power off</div><div class='del'>-	 * (PCIe power is lost before PERST# is asserted),</div><div class='del'>-	 * causing ME FW to lose ownership and not being able to obtain it back.</div><div class='del'>-	 */</div><div class='del'>-	iwl_set_bits_mask_prph(trans(priv), APMG_PS_CTRL_REG,</div><div class='del'>-				APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,</div><div class='del'>-				~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct iwl_sensitivity_ranges iwl5000_sensitivity = {</div><div class='del'>-	.min_nrg_cck = 100,</div><div class='del'>-	.auto_corr_min_ofdm = 90,</div><div class='del'>-	.auto_corr_min_ofdm_mrc = 170,</div><div class='del'>-	.auto_corr_min_ofdm_x1 = 105,</div><div class='del'>-	.auto_corr_min_ofdm_mrc_x1 = 220,</div><div class='del'>-</div><div class='del'>-	.auto_corr_max_ofdm = 120,</div><div class='del'>-	.auto_corr_max_ofdm_mrc = 210,</div><div class='del'>-	.auto_corr_max_ofdm_x1 = 120,</div><div class='del'>-	.auto_corr_max_ofdm_mrc_x1 = 240,</div><div class='del'>-</div><div class='del'>-	.auto_corr_min_cck = 125,</div><div class='del'>-	.auto_corr_max_cck = 200,</div><div class='del'>-	.auto_corr_min_cck_mrc = 200,</div><div class='del'>-	.auto_corr_max_cck_mrc = 400,</div><div class='del'>-	.nrg_th_cck = 100,</div><div class='del'>-	.nrg_th_ofdm = 100,</div><div class='del'>-</div><div class='del'>-	.barker_corr_th_min = 190,</div><div class='del'>-	.barker_corr_th_min_mrc = 390,</div><div class='del'>-	.nrg_th_cca = 62,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct iwl_sensitivity_ranges iwl5150_sensitivity = {</div><div class='del'>-	.min_nrg_cck = 95,</div><div class='del'>-	.auto_corr_min_ofdm = 90,</div><div class='del'>-	.auto_corr_min_ofdm_mrc = 170,</div><div class='del'>-	.auto_corr_min_ofdm_x1 = 105,</div><div class='del'>-	.auto_corr_min_ofdm_mrc_x1 = 220,</div><div class='del'>-</div><div class='del'>-	.auto_corr_max_ofdm = 120,</div><div class='del'>-	.auto_corr_max_ofdm_mrc = 210,</div><div class='del'>-	/* max = min for performance bug in 5150 DSP */</div><div class='del'>-	.auto_corr_max_ofdm_x1 = 105,</div><div class='del'>-	.auto_corr_max_ofdm_mrc_x1 = 220,</div><div class='del'>-</div><div class='del'>-	.auto_corr_min_cck = 125,</div><div class='del'>-	.auto_corr_max_cck = 200,</div><div class='del'>-	.auto_corr_min_cck_mrc = 170,</div><div class='del'>-	.auto_corr_max_cck_mrc = 400,</div><div class='del'>-	.nrg_th_cck = 95,</div><div class='del'>-	.nrg_th_ofdm = 95,</div><div class='del'>-</div><div class='del'>-	.barker_corr_th_min = 190,</div><div class='del'>-	.barker_corr_th_min_mrc = 390,</div><div class='del'>-	.nrg_th_cca = 62,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF	(-5)</div><div class='del'>-</div><div class='del'>-static s32 iwl_temp_calib_to_offset(struct iwl_shared *shrd)</div><div class='del'>-{</div><div class='del'>-	u16 temperature, voltage;</div><div class='del'>-	__le16 *temp_calib = (__le16 *)iwl_eeprom_query_addr(shrd,</div><div class='del'>-				EEPROM_KELVIN_TEMPERATURE);</div><div class='del'>-</div><div class='del'>-	temperature = le16_to_cpu(temp_calib[0]);</div><div class='del'>-	voltage = le16_to_cpu(temp_calib[1]);</div><div class='del'>-</div><div class='del'>-	/* offset = temp - volt / coeff */</div><div class='del'>-	return (s32)(temperature - voltage / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iwl5150_set_ct_threshold(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	const s32 volt2temp_coef = IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF;</div><div class='del'>-	s32 threshold = (s32)CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY) -</div><div class='del'>-			iwl_temp_calib_to_offset(priv-&gt;shrd);</div><div class='del'>-</div><div class='del'>-	hw_params(priv).ct_kill_threshold = threshold * volt2temp_coef;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iwl5000_set_ct_threshold(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* want Celsius */</div><div class='del'>-	hw_params(priv).ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iwl5000_hw_set_hw_params(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	hw_params(priv).ht40_channel =  BIT(IEEE80211_BAND_2GHZ) |</div><div class='del'>-					BIT(IEEE80211_BAND_5GHZ);</div><div class='del'>-</div><div class='del'>-	hw_params(priv).tx_chains_num =</div><div class='del'>-		num_of_ant(hw_params(priv).valid_tx_ant);</div><div class='del'>-	hw_params(priv).rx_chains_num =</div><div class='del'>-		num_of_ant(hw_params(priv).valid_rx_ant);</div><div class='del'>-</div><div class='del'>-	iwl5000_set_ct_threshold(priv);</div><div class='del'>-</div><div class='del'>-	/* Set initial sensitivity parameters */</div><div class='del'>-	hw_params(priv).sens = &amp;iwl5000_sensitivity;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iwl5150_hw_set_hw_params(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	hw_params(priv).ht40_channel =  BIT(IEEE80211_BAND_2GHZ) |</div><div class='del'>-					BIT(IEEE80211_BAND_5GHZ);</div><div class='del'>-</div><div class='del'>-	hw_params(priv).tx_chains_num =</div><div class='del'>-		num_of_ant(hw_params(priv).valid_tx_ant);</div><div class='del'>-	hw_params(priv).rx_chains_num =</div><div class='del'>-		num_of_ant(hw_params(priv).valid_rx_ant);</div><div class='del'>-</div><div class='del'>-	iwl5150_set_ct_threshold(priv);</div><div class='del'>-</div><div class='del'>-	/* Set initial sensitivity parameters */</div><div class='del'>-	hw_params(priv).sens = &amp;iwl5150_sensitivity;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iwl5150_temperature(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	u32 vt = 0;</div><div class='del'>-	s32 offset =  iwl_temp_calib_to_offset(priv-&gt;shrd);</div><div class='del'>-</div><div class='del'>-	vt = le32_to_cpu(priv-&gt;statistics.common.temperature);</div><div class='del'>-	vt = vt / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF + offset;</div><div class='del'>-	/* now vt hold the temperature in Kelvin */</div><div class='del'>-	priv-&gt;temperature = KELVIN_TO_CELSIUS(vt);</div><div class='del'>-	iwl_tt_handler(priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int iwl5000_hw_channel_switch(struct iwl_priv *priv,</div><div class='del'>-				     struct ieee80211_channel_switch *ch_switch)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * MULTI-FIXME</div><div class='del'>-	 * See iwlagn_mac_channel_switch.</div><div class='del'>-	 */</div><div class='del'>-	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_BSS];</div><div class='del'>-	struct iwl5000_channel_switch_cmd cmd;</div><div class='del'>-	const struct iwl_channel_info *ch_info;</div><div class='del'>-	u32 switch_time_in_usec, ucode_switch_time;</div><div class='del'>-	u16 ch;</div><div class='del'>-	u32 tsf_low;</div><div class='del'>-	u8 switch_count;</div><div class='del'>-	u16 beacon_interval = le16_to_cpu(ctx-&gt;timing.beacon_interval);</div><div class='del'>-	struct ieee80211_vif *vif = ctx-&gt;vif;</div><div class='del'>-	struct iwl_host_cmd hcmd = {</div><div class='del'>-		.id = REPLY_CHANNEL_SWITCH,</div><div class='del'>-		.len = { sizeof(cmd), },</div><div class='del'>-		.flags = CMD_SYNC,</div><div class='del'>-		.data = { &amp;cmd, },</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cmd.band = priv-&gt;band == IEEE80211_BAND_2GHZ;</div><div class='del'>-	ch = ch_switch-&gt;channel-&gt;hw_value;</div><div class='del'>-	IWL_DEBUG_11H(priv, "channel switch from %d to %d\n",</div><div class='del'>-		      ctx-&gt;active.channel, ch);</div><div class='del'>-	cmd.channel = cpu_to_le16(ch);</div><div class='del'>-	cmd.rxon_flags = ctx-&gt;staging.flags;</div><div class='del'>-	cmd.rxon_filter_flags = ctx-&gt;staging.filter_flags;</div><div class='del'>-	switch_count = ch_switch-&gt;count;</div><div class='del'>-	tsf_low = ch_switch-&gt;timestamp &amp; 0x0ffffffff;</div><div class='del'>-	/*</div><div class='del'>-	 * calculate the ucode channel switch time</div><div class='del'>-	 * adding TSF as one of the factor for when to switch</div><div class='del'>-	 */</div><div class='del'>-	if ((priv-&gt;ucode_beacon_time &gt; tsf_low) &amp;&amp; beacon_interval) {</div><div class='del'>-		if (switch_count &gt; ((priv-&gt;ucode_beacon_time - tsf_low) /</div><div class='del'>-		    beacon_interval)) {</div><div class='del'>-			switch_count -= (priv-&gt;ucode_beacon_time -</div><div class='del'>-				tsf_low) / beacon_interval;</div><div class='del'>-		} else</div><div class='del'>-			switch_count = 0;</div><div class='del'>-	}</div><div class='del'>-	if (switch_count &lt;= 1)</div><div class='del'>-		cmd.switch_time = cpu_to_le32(priv-&gt;ucode_beacon_time);</div><div class='del'>-	else {</div><div class='del'>-		switch_time_in_usec =</div><div class='del'>-			vif-&gt;bss_conf.beacon_int * switch_count * TIME_UNIT;</div><div class='del'>-		ucode_switch_time = iwl_usecs_to_beacons(priv,</div><div class='del'>-							 switch_time_in_usec,</div><div class='del'>-							 beacon_interval);</div><div class='del'>-		cmd.switch_time = iwl_add_beacon_time(priv,</div><div class='del'>-						      priv-&gt;ucode_beacon_time,</div><div class='del'>-						      ucode_switch_time,</div><div class='del'>-						      beacon_interval);</div><div class='del'>-	}</div><div class='del'>-	IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n",</div><div class='del'>-		      cmd.switch_time);</div><div class='del'>-	ch_info = iwl_get_channel_info(priv, priv-&gt;band, ch);</div><div class='del'>-	if (ch_info)</div><div class='del'>-		cmd.expect_beacon = is_channel_radar(ch_info);</div><div class='del'>-	else {</div><div class='del'>-		IWL_ERR(priv, "invalid channel switch from %u to %u\n",</div><div class='del'>-			ctx-&gt;active.channel, ch);</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return iwl_dvm_send_cmd(priv, &amp;hcmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct iwl_lib_ops iwl5000_lib = {</div><div class='del'>-	.set_hw_params = iwl5000_hw_set_hw_params,</div><div class='del'>-	.set_channel_switch = iwl5000_hw_channel_switch,</div><div class='del'>-	.nic_config = iwl5000_nic_config,</div><div class='del'>-	.eeprom_ops = {</div><div class='del'>-		.regulatory_bands = {</div><div class='del'>-			EEPROM_REG_BAND_1_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_2_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_3_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_4_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_5_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_24_HT40_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_52_HT40_CHANNELS</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.temperature = iwlagn_temperature,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct iwl_lib_ops iwl5150_lib = {</div><div class='del'>-	.set_hw_params = iwl5150_hw_set_hw_params,</div><div class='del'>-	.set_channel_switch = iwl5000_hw_channel_switch,</div><div class='del'>-	.nic_config = iwl5000_nic_config,</div><div class='del'>-	.eeprom_ops = {</div><div class='del'>-		.regulatory_bands = {</div><div class='del'>-			EEPROM_REG_BAND_1_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_2_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_3_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_4_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_5_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_24_HT40_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_52_HT40_CHANNELS</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.temperature = iwl5150_temperature,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct iwl_base_params iwl5000_base_params = {</div><div class='ctx'> 	.eeprom_size = IWLAGN_EEPROM_IMG_SIZE,</div><div class='ctx'> 	.num_of_queues = IWLAGN_NUM_QUEUES,</div><div class='del'>-	.num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,</div><div class='ctx'> 	.pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,</div><div class='ctx'> 	.led_compensation = 51,</div><div class='ctx'> 	.plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,</div><div class='ctx'> 	.chain_noise_scale = 1000,</div><div class='del'>-	.wd_timeout = IWL_LONG_WD_TIMEOUT,</div><div class='add'>+	.wd_timeout = IWL_WATCHHDOG_DISABLED,</div><div class='ctx'> 	.max_event_log_size = 512,</div><div class='ctx'> 	.no_idle_support = true,</div><div class='del'>-	.wd_disable = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct iwl_ht_params iwl5000_ht_params = {</div><div class='hunk'>@@ -326,12 +74,13 @@ static const struct iwl_ht_params iwl5000_ht_params = {</div><div class='ctx'> #define IWL_DEVICE_5000						\</div><div class='ctx'> 	.fw_name_pre = IWL5000_FW_PRE,				\</div><div class='ctx'> 	.ucode_api_max = IWL5000_UCODE_API_MAX,			\</div><div class='add'>+	.ucode_api_ok = IWL5000_UCODE_API_OK,			\</div><div class='ctx'> 	.ucode_api_min = IWL5000_UCODE_API_MIN,			\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_5000,		\</div><div class='ctx'> 	.max_inst_size = IWLAGN_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWLAGN_RTC_DATA_SIZE,			\</div><div class='ctx'> 	.eeprom_ver = EEPROM_5000_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,	\</div><div class='del'>-	.lib = &amp;iwl5000_lib,					\</div><div class='ctx'> 	.base_params = &amp;iwl5000_base_params,			\</div><div class='ctx'> 	.led_mode = IWL_LED_BLINK</div><div class='ctx'> </div><div class='hunk'>@@ -371,12 +120,13 @@ const struct iwl_cfg iwl5350_agn_cfg = {</div><div class='ctx'> 	.name = "Intel(R) WiMAX/WiFi Link 5350 AGN",</div><div class='ctx'> 	.fw_name_pre = IWL5000_FW_PRE,</div><div class='ctx'> 	.ucode_api_max = IWL5000_UCODE_API_MAX,</div><div class='add'>+	.ucode_api_ok = IWL5000_UCODE_API_OK,</div><div class='ctx'> 	.ucode_api_min = IWL5000_UCODE_API_MIN,</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_5000,</div><div class='ctx'> 	.max_inst_size = IWLAGN_RTC_INST_SIZE,</div><div class='ctx'> 	.max_data_size = IWLAGN_RTC_DATA_SIZE,</div><div class='ctx'> 	.eeprom_ver = EEPROM_5050_EEPROM_VERSION,</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,</div><div class='del'>-	.lib = &amp;iwl5000_lib,</div><div class='ctx'> 	.base_params = &amp;iwl5000_base_params,</div><div class='ctx'> 	.ht_params = &amp;iwl5000_ht_params,</div><div class='ctx'> 	.led_mode = IWL_LED_BLINK,</div><div class='hunk'>@@ -386,12 +136,13 @@ const struct iwl_cfg iwl5350_agn_cfg = {</div><div class='ctx'> #define IWL_DEVICE_5150						\</div><div class='ctx'> 	.fw_name_pre = IWL5150_FW_PRE,				\</div><div class='ctx'> 	.ucode_api_max = IWL5150_UCODE_API_MAX,			\</div><div class='add'>+	.ucode_api_ok = IWL5150_UCODE_API_OK,			\</div><div class='ctx'> 	.ucode_api_min = IWL5150_UCODE_API_MIN,			\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_5150,		\</div><div class='ctx'> 	.max_inst_size = IWLAGN_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWLAGN_RTC_DATA_SIZE,			\</div><div class='ctx'> 	.eeprom_ver = EEPROM_5050_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,	\</div><div class='del'>-	.lib = &amp;iwl5150_lib,					\</div><div class='ctx'> 	.base_params = &amp;iwl5000_base_params,			\</div><div class='ctx'> 	.no_xtal_calib = true,					\</div><div class='ctx'> 	.led_mode = IWL_LED_BLINK,				\</div><div class='hunk'>@@ -409,5 +160,5 @@ const struct iwl_cfg iwl5150_abg_cfg = {</div><div class='ctx'> 	IWL_DEVICE_5150,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX));</div><div class='del'>-MODULE_FIRMWARE(IWL5150_MODULE_FIRMWARE(IWL5150_UCODE_API_MAX));</div><div class='add'>+MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_OK));</div><div class='add'>+MODULE_FIRMWARE(IWL5150_MODULE_FIRMWARE(IWL5150_UCODE_API_OK));</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c<br/>index 64060cd738b5..19f7ee84ae89 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-6000.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-6000.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-6000.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-6000.c</a></div><div class='hunk'>@@ -24,26 +24,12 @@</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;net/mac80211.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;asm/unaligned.h&gt;</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='del'>-</div><div class='del'>-#include "iwl-eeprom.h"</div><div class='del'>-#include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='del'>-#include "iwl-io.h"</div><div class='del'>-#include "iwl-agn.h"</div><div class='del'>-#include "iwl-agn-hw.h"</div><div class='del'>-#include "iwl-trans.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='add'>+#include "iwl-config.h"</div><div class='ctx'> #include "iwl-cfg.h"</div><div class='add'>+#include "iwl-agn-hw.h"</div><div class='add'>+#include "iwl-commands.h" /* needed for BT for now */</div><div class='ctx'> </div><div class='ctx'> /* Highest firmware API version supported */</div><div class='ctx'> #define IWL6000_UCODE_API_MAX 6</div><div class='hunk'>@@ -53,12 +39,28 @@</div><div class='ctx'> /* Oldest version we won't warn about */</div><div class='ctx'> #define IWL6000_UCODE_API_OK 4</div><div class='ctx'> #define IWL6000G2_UCODE_API_OK 5</div><div class='add'>+#define IWL6050_UCODE_API_OK 5</div><div class='add'>+#define IWL6000G2B_UCODE_API_OK 6</div><div class='ctx'> </div><div class='ctx'> /* Lowest firmware API version supported */</div><div class='ctx'> #define IWL6000_UCODE_API_MIN 4</div><div class='ctx'> #define IWL6050_UCODE_API_MIN 4</div><div class='ctx'> #define IWL6000G2_UCODE_API_MIN 4</div><div class='ctx'> </div><div class='add'>+/* EEPROM versions */</div><div class='add'>+#define EEPROM_6000_TX_POWER_VERSION	(4)</div><div class='add'>+#define EEPROM_6000_EEPROM_VERSION	(0x423)</div><div class='add'>+#define EEPROM_6050_TX_POWER_VERSION	(4)</div><div class='add'>+#define EEPROM_6050_EEPROM_VERSION	(0x532)</div><div class='add'>+#define EEPROM_6150_TX_POWER_VERSION	(6)</div><div class='add'>+#define EEPROM_6150_EEPROM_VERSION	(0x553)</div><div class='add'>+#define EEPROM_6005_TX_POWER_VERSION	(6)</div><div class='add'>+#define EEPROM_6005_EEPROM_VERSION	(0x709)</div><div class='add'>+#define EEPROM_6030_TX_POWER_VERSION	(6)</div><div class='add'>+#define EEPROM_6030_EEPROM_VERSION	(0x709)</div><div class='add'>+#define EEPROM_6035_TX_POWER_VERSION	(6)</div><div class='add'>+#define EEPROM_6035_EEPROM_VERSION	(0x753)</div><div class='add'>+</div><div class='ctx'> #define IWL6000_FW_PRE "iwlwifi-6000-"</div><div class='ctx'> #define IWL6000_MODULE_FIRMWARE(api) IWL6000_FW_PRE __stringify(api) ".ucode"</div><div class='ctx'> </div><div class='hunk'>@@ -71,205 +73,9 @@</div><div class='ctx'> #define IWL6030_FW_PRE "iwlwifi-6000g2b-"</div><div class='ctx'> #define IWL6030_MODULE_FIRMWARE(api) IWL6030_FW_PRE __stringify(api) ".ucode"</div><div class='ctx'> </div><div class='del'>-static void iwl6000_set_ct_threshold(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* want Celsius */</div><div class='del'>-	hw_params(priv).ct_kill_threshold = CT_KILL_THRESHOLD;</div><div class='del'>-	hw_params(priv).ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iwl6050_additional_nic_config(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* Indicate calibration version to uCode. */</div><div class='del'>-	if (iwl_eeprom_calib_version(priv-&gt;shrd) &gt;= 6)</div><div class='del'>-		iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG,</div><div class='del'>-				CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iwl6150_additional_nic_config(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* Indicate calibration version to uCode. */</div><div class='del'>-	if (iwl_eeprom_calib_version(priv-&gt;shrd) &gt;= 6)</div><div class='del'>-		iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG,</div><div class='del'>-				CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);</div><div class='del'>-	iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG,</div><div class='del'>-		    CSR_GP_DRIVER_REG_BIT_6050_1x2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void iwl6000i_additional_nic_config(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* 2x2 IPA phy type */</div><div class='del'>-	iwl_write32(trans(priv), CSR_GP_DRIVER_REG,</div><div class='del'>-		     CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* NIC configuration for 6000 series */</div><div class='del'>-static void iwl6000_nic_config(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	iwl_rf_config(priv);</div><div class='del'>-</div><div class='del'>-	/* do additional nic configuration if needed */</div><div class='del'>-	if (cfg(priv)-&gt;additional_nic_config)</div><div class='del'>-		cfg(priv)-&gt;additional_nic_config(priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct iwl_sensitivity_ranges iwl6000_sensitivity = {</div><div class='del'>-	.min_nrg_cck = 110,</div><div class='del'>-	.auto_corr_min_ofdm = 80,</div><div class='del'>-	.auto_corr_min_ofdm_mrc = 128,</div><div class='del'>-	.auto_corr_min_ofdm_x1 = 105,</div><div class='del'>-	.auto_corr_min_ofdm_mrc_x1 = 192,</div><div class='del'>-</div><div class='del'>-	.auto_corr_max_ofdm = 145,</div><div class='del'>-	.auto_corr_max_ofdm_mrc = 232,</div><div class='del'>-	.auto_corr_max_ofdm_x1 = 110,</div><div class='del'>-	.auto_corr_max_ofdm_mrc_x1 = 232,</div><div class='del'>-</div><div class='del'>-	.auto_corr_min_cck = 125,</div><div class='del'>-	.auto_corr_max_cck = 175,</div><div class='del'>-	.auto_corr_min_cck_mrc = 160,</div><div class='del'>-	.auto_corr_max_cck_mrc = 310,</div><div class='del'>-	.nrg_th_cck = 110,</div><div class='del'>-	.nrg_th_ofdm = 110,</div><div class='del'>-</div><div class='del'>-	.barker_corr_th_min = 190,</div><div class='del'>-	.barker_corr_th_min_mrc = 336,</div><div class='del'>-	.nrg_th_cca = 62,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void iwl6000_hw_set_hw_params(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	hw_params(priv).ht40_channel =  BIT(IEEE80211_BAND_2GHZ) |</div><div class='del'>-					BIT(IEEE80211_BAND_5GHZ);</div><div class='del'>-</div><div class='del'>-	hw_params(priv).tx_chains_num =</div><div class='del'>-		num_of_ant(hw_params(priv).valid_tx_ant);</div><div class='del'>-	if (cfg(priv)-&gt;rx_with_siso_diversity)</div><div class='del'>-		hw_params(priv).rx_chains_num = 1;</div><div class='del'>-	else</div><div class='del'>-		hw_params(priv).rx_chains_num =</div><div class='del'>-			num_of_ant(hw_params(priv).valid_rx_ant);</div><div class='del'>-</div><div class='del'>-	iwl6000_set_ct_threshold(priv);</div><div class='del'>-</div><div class='del'>-	/* Set initial sensitivity parameters */</div><div class='del'>-	hw_params(priv).sens = &amp;iwl6000_sensitivity;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int iwl6000_hw_channel_switch(struct iwl_priv *priv,</div><div class='del'>-				     struct ieee80211_channel_switch *ch_switch)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * MULTI-FIXME</div><div class='del'>-	 * See iwlagn_mac_channel_switch.</div><div class='del'>-	 */</div><div class='del'>-	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_BSS];</div><div class='del'>-	struct iwl6000_channel_switch_cmd cmd;</div><div class='del'>-	const struct iwl_channel_info *ch_info;</div><div class='del'>-	u32 switch_time_in_usec, ucode_switch_time;</div><div class='del'>-	u16 ch;</div><div class='del'>-	u32 tsf_low;</div><div class='del'>-	u8 switch_count;</div><div class='del'>-	u16 beacon_interval = le16_to_cpu(ctx-&gt;timing.beacon_interval);</div><div class='del'>-	struct ieee80211_vif *vif = ctx-&gt;vif;</div><div class='del'>-	struct iwl_host_cmd hcmd = {</div><div class='del'>-		.id = REPLY_CHANNEL_SWITCH,</div><div class='del'>-		.len = { sizeof(cmd), },</div><div class='del'>-		.flags = CMD_SYNC,</div><div class='del'>-		.data = { &amp;cmd, },</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cmd.band = priv-&gt;band == IEEE80211_BAND_2GHZ;</div><div class='del'>-	ch = ch_switch-&gt;channel-&gt;hw_value;</div><div class='del'>-	IWL_DEBUG_11H(priv, "channel switch from %u to %u\n",</div><div class='del'>-		      ctx-&gt;active.channel, ch);</div><div class='del'>-	cmd.channel = cpu_to_le16(ch);</div><div class='del'>-	cmd.rxon_flags = ctx-&gt;staging.flags;</div><div class='del'>-	cmd.rxon_filter_flags = ctx-&gt;staging.filter_flags;</div><div class='del'>-	switch_count = ch_switch-&gt;count;</div><div class='del'>-	tsf_low = ch_switch-&gt;timestamp &amp; 0x0ffffffff;</div><div class='del'>-	/*</div><div class='del'>-	 * calculate the ucode channel switch time</div><div class='del'>-	 * adding TSF as one of the factor for when to switch</div><div class='del'>-	 */</div><div class='del'>-	if ((priv-&gt;ucode_beacon_time &gt; tsf_low) &amp;&amp; beacon_interval) {</div><div class='del'>-		if (switch_count &gt; ((priv-&gt;ucode_beacon_time - tsf_low) /</div><div class='del'>-		    beacon_interval)) {</div><div class='del'>-			switch_count -= (priv-&gt;ucode_beacon_time -</div><div class='del'>-				tsf_low) / beacon_interval;</div><div class='del'>-		} else</div><div class='del'>-			switch_count = 0;</div><div class='del'>-	}</div><div class='del'>-	if (switch_count &lt;= 1)</div><div class='del'>-		cmd.switch_time = cpu_to_le32(priv-&gt;ucode_beacon_time);</div><div class='del'>-	else {</div><div class='del'>-		switch_time_in_usec =</div><div class='del'>-			vif-&gt;bss_conf.beacon_int * switch_count * TIME_UNIT;</div><div class='del'>-		ucode_switch_time = iwl_usecs_to_beacons(priv,</div><div class='del'>-							 switch_time_in_usec,</div><div class='del'>-							 beacon_interval);</div><div class='del'>-		cmd.switch_time = iwl_add_beacon_time(priv,</div><div class='del'>-						      priv-&gt;ucode_beacon_time,</div><div class='del'>-						      ucode_switch_time,</div><div class='del'>-						      beacon_interval);</div><div class='del'>-	}</div><div class='del'>-	IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n",</div><div class='del'>-		      cmd.switch_time);</div><div class='del'>-	ch_info = iwl_get_channel_info(priv, priv-&gt;band, ch);</div><div class='del'>-	if (ch_info)</div><div class='del'>-		cmd.expect_beacon = is_channel_radar(ch_info);</div><div class='del'>-	else {</div><div class='del'>-		IWL_ERR(priv, "invalid channel switch from %u to %u\n",</div><div class='del'>-			ctx-&gt;active.channel, ch);</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return iwl_dvm_send_cmd(priv, &amp;hcmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct iwl_lib_ops iwl6000_lib = {</div><div class='del'>-	.set_hw_params = iwl6000_hw_set_hw_params,</div><div class='del'>-	.set_channel_switch = iwl6000_hw_channel_switch,</div><div class='del'>-	.nic_config = iwl6000_nic_config,</div><div class='del'>-	.eeprom_ops = {</div><div class='del'>-		.regulatory_bands = {</div><div class='del'>-			EEPROM_REG_BAND_1_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_2_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_3_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_4_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_5_CHANNELS,</div><div class='del'>-			EEPROM_6000_REG_BAND_24_HT40_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_52_HT40_CHANNELS</div><div class='del'>-		},</div><div class='del'>-		.enhanced_txpower = true,</div><div class='del'>-	},</div><div class='del'>-	.temperature = iwlagn_temperature,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct iwl_lib_ops iwl6030_lib = {</div><div class='del'>-	.set_hw_params = iwl6000_hw_set_hw_params,</div><div class='del'>-	.set_channel_switch = iwl6000_hw_channel_switch,</div><div class='del'>-	.nic_config = iwl6000_nic_config,</div><div class='del'>-	.eeprom_ops = {</div><div class='del'>-		.regulatory_bands = {</div><div class='del'>-			EEPROM_REG_BAND_1_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_2_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_3_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_4_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_5_CHANNELS,</div><div class='del'>-			EEPROM_6000_REG_BAND_24_HT40_CHANNELS,</div><div class='del'>-			EEPROM_REG_BAND_52_HT40_CHANNELS</div><div class='del'>-		},</div><div class='del'>-		.enhanced_txpower = true,</div><div class='del'>-	},</div><div class='del'>-	.temperature = iwlagn_temperature,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct iwl_base_params iwl6000_base_params = {</div><div class='ctx'> 	.eeprom_size = OTP_LOW_IMAGE_SIZE,</div><div class='ctx'> 	.num_of_queues = IWLAGN_NUM_QUEUES,</div><div class='del'>-	.num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,</div><div class='ctx'> 	.pll_cfg_val = 0,</div><div class='ctx'> 	.max_ll_items = OTP_MAX_LL_ITEMS_6x00,</div><div class='ctx'> 	.shadow_ram_support = true,</div><div class='hunk'>@@ -280,13 +86,12 @@ static const struct iwl_base_params iwl6000_base_params = {</div><div class='ctx'> 	.chain_noise_scale = 1000,</div><div class='ctx'> 	.wd_timeout = IWL_DEF_WD_TIMEOUT,</div><div class='ctx'> 	.max_event_log_size = 512,</div><div class='del'>-	.shadow_reg_enable = true,</div><div class='add'>+	.shadow_reg_enable = false, /* TODO: fix bugs using this feature */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct iwl_base_params iwl6050_base_params = {</div><div class='ctx'> 	.eeprom_size = OTP_LOW_IMAGE_SIZE,</div><div class='ctx'> 	.num_of_queues = IWLAGN_NUM_QUEUES,</div><div class='del'>-	.num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,</div><div class='ctx'> 	.pll_cfg_val = 0,</div><div class='ctx'> 	.max_ll_items = OTP_MAX_LL_ITEMS_6x50,</div><div class='ctx'> 	.shadow_ram_support = true,</div><div class='hunk'>@@ -297,13 +102,12 @@ static const struct iwl_base_params iwl6050_base_params = {</div><div class='ctx'> 	.chain_noise_scale = 1500,</div><div class='ctx'> 	.wd_timeout = IWL_DEF_WD_TIMEOUT,</div><div class='ctx'> 	.max_event_log_size = 1024,</div><div class='del'>-	.shadow_reg_enable = true,</div><div class='add'>+	.shadow_reg_enable = false, /* TODO: fix bugs using this feature */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct iwl_base_params iwl6000_g2_base_params = {</div><div class='ctx'> 	.eeprom_size = OTP_LOW_IMAGE_SIZE,</div><div class='ctx'> 	.num_of_queues = IWLAGN_NUM_QUEUES,</div><div class='del'>-	.num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,</div><div class='ctx'> 	.pll_cfg_val = 0,</div><div class='ctx'> 	.max_ll_items = OTP_MAX_LL_ITEMS_6x00,</div><div class='ctx'> 	.shadow_ram_support = true,</div><div class='hunk'>@@ -314,7 +118,7 @@ static const struct iwl_base_params iwl6000_g2_base_params = {</div><div class='ctx'> 	.chain_noise_scale = 1000,</div><div class='ctx'> 	.wd_timeout = IWL_LONG_WD_TIMEOUT,</div><div class='ctx'> 	.max_event_log_size = 512,</div><div class='del'>-	.shadow_reg_enable = true,</div><div class='add'>+	.shadow_reg_enable = false, /* TODO: fix bugs using this feature */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct iwl_ht_params iwl6000_ht_params = {</div><div class='hunk'>@@ -336,11 +140,11 @@ static const struct iwl_bt_params iwl6000_bt_params = {</div><div class='ctx'> 	.ucode_api_max = IWL6000G2_UCODE_API_MAX,		\</div><div class='ctx'> 	.ucode_api_ok = IWL6000G2_UCODE_API_OK,			\</div><div class='ctx'> 	.ucode_api_min = IWL6000G2_UCODE_API_MIN,		\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_6005,		\</div><div class='ctx'> 	.max_inst_size = IWL60_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWL60_RTC_DATA_SIZE,			\</div><div class='ctx'> 	.eeprom_ver = EEPROM_6005_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_6005_TX_POWER_VERSION,	\</div><div class='del'>-	.lib = &amp;iwl6000_lib,					\</div><div class='ctx'> 	.base_params = &amp;iwl6000_g2_base_params,			\</div><div class='ctx'> 	.need_temp_offset_calib = true,				\</div><div class='ctx'> 	.led_mode = IWL_LED_RF_STATE</div><div class='hunk'>@@ -388,13 +192,13 @@ const struct iwl_cfg iwl6005_2agn_mow2_cfg = {</div><div class='ctx'> #define IWL_DEVICE_6030						\</div><div class='ctx'> 	.fw_name_pre = IWL6030_FW_PRE,				\</div><div class='ctx'> 	.ucode_api_max = IWL6000G2_UCODE_API_MAX,		\</div><div class='del'>-	.ucode_api_ok = IWL6000G2_UCODE_API_OK,			\</div><div class='add'>+	.ucode_api_ok = IWL6000G2B_UCODE_API_OK,		\</div><div class='ctx'> 	.ucode_api_min = IWL6000G2_UCODE_API_MIN,		\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_6030,		\</div><div class='ctx'> 	.max_inst_size = IWL60_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWL60_RTC_DATA_SIZE,			\</div><div class='ctx'> 	.eeprom_ver = EEPROM_6030_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_6030_TX_POWER_VERSION,	\</div><div class='del'>-	.lib = &amp;iwl6030_lib,					\</div><div class='ctx'> 	.base_params = &amp;iwl6000_g2_base_params,			\</div><div class='ctx'> 	.bt_params = &amp;iwl6000_bt_params,			\</div><div class='ctx'> 	.need_temp_offset_calib = true,				\</div><div class='hunk'>@@ -461,14 +265,13 @@ const struct iwl_cfg iwl130_bg_cfg = {</div><div class='ctx'> 	.ucode_api_max = IWL6000_UCODE_API_MAX,			\</div><div class='ctx'> 	.ucode_api_ok = IWL6000_UCODE_API_OK,			\</div><div class='ctx'> 	.ucode_api_min = IWL6000_UCODE_API_MIN,			\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_6000i,		\</div><div class='ctx'> 	.max_inst_size = IWL60_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWL60_RTC_DATA_SIZE,			\</div><div class='ctx'> 	.valid_tx_ant = ANT_BC,		/* .cfg overwrite */	\</div><div class='ctx'> 	.valid_rx_ant = ANT_BC,		/* .cfg overwrite */	\</div><div class='ctx'> 	.eeprom_ver = EEPROM_6000_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_6000_TX_POWER_VERSION,	\</div><div class='del'>-	.lib = &amp;iwl6000_lib,					\</div><div class='del'>-	.additional_nic_config = iwl6000i_additional_nic_config,\</div><div class='ctx'> 	.base_params = &amp;iwl6000_base_params,			\</div><div class='ctx'> 	.led_mode = IWL_LED_BLINK</div><div class='ctx'> </div><div class='hunk'>@@ -492,12 +295,11 @@ const struct iwl_cfg iwl6000i_2bg_cfg = {</div><div class='ctx'> 	.fw_name_pre = IWL6050_FW_PRE,				\</div><div class='ctx'> 	.ucode_api_max = IWL6050_UCODE_API_MAX,			\</div><div class='ctx'> 	.ucode_api_min = IWL6050_UCODE_API_MIN,			\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_6050,		\</div><div class='ctx'> 	.max_inst_size = IWL60_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWL60_RTC_DATA_SIZE,			\</div><div class='ctx'> 	.valid_tx_ant = ANT_AB,		/* .cfg overwrite */	\</div><div class='ctx'> 	.valid_rx_ant = ANT_AB,		/* .cfg overwrite */	\</div><div class='del'>-	.lib = &amp;iwl6000_lib,					\</div><div class='del'>-	.additional_nic_config = iwl6050_additional_nic_config,	\</div><div class='ctx'> 	.eeprom_ver = EEPROM_6050_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_6050_TX_POWER_VERSION,	\</div><div class='ctx'> 	.base_params = &amp;iwl6050_base_params,			\</div><div class='hunk'>@@ -519,10 +321,9 @@ const struct iwl_cfg iwl6050_2abg_cfg = {</div><div class='ctx'> 	.fw_name_pre = IWL6050_FW_PRE,				\</div><div class='ctx'> 	.ucode_api_max = IWL6050_UCODE_API_MAX,			\</div><div class='ctx'> 	.ucode_api_min = IWL6050_UCODE_API_MIN,			\</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_6150,		\</div><div class='ctx'> 	.max_inst_size = IWL60_RTC_INST_SIZE,			\</div><div class='ctx'> 	.max_data_size = IWL60_RTC_DATA_SIZE,			\</div><div class='del'>-	.lib = &amp;iwl6000_lib,					\</div><div class='del'>-	.additional_nic_config = iwl6150_additional_nic_config,	\</div><div class='ctx'> 	.eeprom_ver = EEPROM_6150_EEPROM_VERSION,		\</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_6150_TX_POWER_VERSION,	\</div><div class='ctx'> 	.base_params = &amp;iwl6050_base_params,			\</div><div class='hunk'>@@ -546,17 +347,17 @@ const struct iwl_cfg iwl6000_3agn_cfg = {</div><div class='ctx'> 	.ucode_api_max = IWL6000_UCODE_API_MAX,</div><div class='ctx'> 	.ucode_api_ok = IWL6000_UCODE_API_OK,</div><div class='ctx'> 	.ucode_api_min = IWL6000_UCODE_API_MIN,</div><div class='add'>+	.device_family = IWL_DEVICE_FAMILY_6000,</div><div class='ctx'> 	.max_inst_size = IWL60_RTC_INST_SIZE,</div><div class='ctx'> 	.max_data_size = IWL60_RTC_DATA_SIZE,</div><div class='ctx'> 	.eeprom_ver = EEPROM_6000_EEPROM_VERSION,</div><div class='ctx'> 	.eeprom_calib_ver = EEPROM_6000_TX_POWER_VERSION,</div><div class='del'>-	.lib = &amp;iwl6000_lib,</div><div class='ctx'> 	.base_params = &amp;iwl6000_base_params,</div><div class='ctx'> 	.ht_params = &amp;iwl6000_ht_params,</div><div class='ctx'> 	.led_mode = IWL_LED_BLINK,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_OK));</div><div class='del'>-MODULE_FIRMWARE(IWL6050_MODULE_FIRMWARE(IWL6050_UCODE_API_MAX));</div><div class='del'>-MODULE_FIRMWARE(IWL6005_MODULE_FIRMWARE(IWL6000G2_UCODE_API_MAX));</div><div class='del'>-MODULE_FIRMWARE(IWL6030_MODULE_FIRMWARE(IWL6000G2_UCODE_API_MAX));</div><div class='add'>+MODULE_FIRMWARE(IWL6050_MODULE_FIRMWARE(IWL6050_UCODE_API_OK));</div><div class='add'>+MODULE_FIRMWARE(IWL6005_MODULE_FIRMWARE(IWL6000G2_UCODE_API_OK));</div><div class='add'>+MODULE_FIRMWARE(IWL6030_MODULE_FIRMWARE(IWL6000G2B_UCODE_API_OK));</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-calib.c b/drivers/net/wireless/iwlwifi/iwl-agn-calib.c<br/>index 84cbe7bb504c..95f27f1a423b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-calib.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn-calib.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-calib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-calib.c</a></div><div class='hunk'>@@ -64,7 +64,6 @@</div><div class='ctx'> #include &lt;net/mac80211.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-agn-calib.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='hunk'>@@ -190,7 +189,7 @@ static int iwl_sens_energy_cck(struct iwl_priv *priv,</div><div class='ctx'> 	u32 max_false_alarms = MAX_FA_CCK * rx_enable_time;</div><div class='ctx'> 	u32 min_false_alarms = MIN_FA_CCK * rx_enable_time;</div><div class='ctx'> 	struct iwl_sensitivity_data *data = NULL;</div><div class='del'>-	const struct iwl_sensitivity_ranges *ranges = hw_params(priv).sens;</div><div class='add'>+	const struct iwl_sensitivity_ranges *ranges = priv-&gt;hw_params.sens;</div><div class='ctx'> </div><div class='ctx'> 	data = &amp;(priv-&gt;sensitivity_data);</div><div class='ctx'> </div><div class='hunk'>@@ -373,7 +372,7 @@ static int iwl_sens_auto_corr_ofdm(struct iwl_priv *priv,</div><div class='ctx'> 	u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time;</div><div class='ctx'> 	u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time;</div><div class='ctx'> 	struct iwl_sensitivity_data *data = NULL;</div><div class='del'>-	const struct iwl_sensitivity_ranges *ranges = hw_params(priv).sens;</div><div class='add'>+	const struct iwl_sensitivity_ranges *ranges = priv-&gt;hw_params.sens;</div><div class='ctx'> </div><div class='ctx'> 	data = &amp;(priv-&gt;sensitivity_data);</div><div class='ctx'> </div><div class='hunk'>@@ -521,7 +520,7 @@ static int iwl_enhance_sensitivity_write(struct iwl_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	iwl_prepare_legacy_sensitivity_tbl(priv, data, &amp;cmd.enhance_table[0]);</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;base_params-&gt;hd_v2) {</div><div class='add'>+	if (priv-&gt;cfg-&gt;base_params-&gt;hd_v2) {</div><div class='ctx'> 		cmd.enhance_table[HD_INA_NON_SQUARE_DET_OFDM_INDEX] =</div><div class='ctx'> 			HD_INA_NON_SQUARE_DET_OFDM_DATA_V2;</div><div class='ctx'> 		cmd.enhance_table[HD_INA_NON_SQUARE_DET_CCK_INDEX] =</div><div class='hunk'>@@ -597,9 +596,9 @@ void iwl_init_sensitivity(struct iwl_priv *priv)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct iwl_sensitivity_data *data = NULL;</div><div class='del'>-	const struct iwl_sensitivity_ranges *ranges = hw_params(priv).sens;</div><div class='add'>+	const struct iwl_sensitivity_ranges *ranges = priv-&gt;hw_params.sens;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;disable_sens_cal)</div><div class='add'>+	if (priv-&gt;calib_disabled &amp; IWL_SENSITIVITY_CALIB_DISABLED)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_CALIB(priv, "Start iwl_init_sensitivity\n");</div><div class='hunk'>@@ -663,7 +662,7 @@ void iwl_sensitivity_calibration(struct iwl_priv *priv)</div><div class='ctx'> 	struct statistics_rx_phy *ofdm, *cck;</div><div class='ctx'> 	struct statistics_general_data statis;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;disable_sens_cal)</div><div class='add'>+	if (priv-&gt;calib_disabled &amp; IWL_SENSITIVITY_CALIB_DISABLED)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	data = &amp;(priv-&gt;sensitivity_data);</div><div class='hunk'>@@ -833,28 +832,28 @@ static void iwl_find_disconn_antenna(struct iwl_priv *priv, u32* average_sig,</div><div class='ctx'> 	 * To be safe, simply mask out any chains that we know</div><div class='ctx'> 	 * are not on the device.</div><div class='ctx'> 	 */</div><div class='del'>-	active_chains &amp;= hw_params(priv).valid_rx_ant;</div><div class='add'>+	active_chains &amp;= priv-&gt;hw_params.valid_rx_ant;</div><div class='ctx'> </div><div class='ctx'> 	num_tx_chains = 0;</div><div class='ctx'> 	for (i = 0; i &lt; NUM_RX_CHAINS; i++) {</div><div class='ctx'> 		/* loops on all the bits of</div><div class='ctx'> 		 * priv-&gt;hw_setting.valid_tx_ant */</div><div class='ctx'> 		u8 ant_msk = (1 &lt;&lt; i);</div><div class='del'>-		if (!(hw_params(priv).valid_tx_ant &amp; ant_msk))</div><div class='add'>+		if (!(priv-&gt;hw_params.valid_tx_ant &amp; ant_msk))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		num_tx_chains++;</div><div class='ctx'> 		if (data-&gt;disconn_array[i] == 0)</div><div class='ctx'> 			/* there is a Tx antenna connected */</div><div class='ctx'> 			break;</div><div class='del'>-		if (num_tx_chains == hw_params(priv).tx_chains_num &amp;&amp;</div><div class='add'>+		if (num_tx_chains == priv-&gt;hw_params.tx_chains_num &amp;&amp;</div><div class='ctx'> 		    data-&gt;disconn_array[i]) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * If all chains are disconnected</div><div class='ctx'> 			 * connect the first valid tx chain</div><div class='ctx'> 			 */</div><div class='ctx'> 			first_chain =</div><div class='del'>-				find_first_chain(hw_params(priv).valid_tx_ant);</div><div class='add'>+				find_first_chain(priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> 			data-&gt;disconn_array[first_chain] = 0;</div><div class='ctx'> 			active_chains |= BIT(first_chain);</div><div class='ctx'> 			IWL_DEBUG_CALIB(priv,</div><div class='hunk'>@@ -864,13 +863,13 @@ static void iwl_find_disconn_antenna(struct iwl_priv *priv, u32* average_sig,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (active_chains != hw_params(priv).valid_rx_ant &amp;&amp;</div><div class='add'>+	if (active_chains != priv-&gt;hw_params.valid_rx_ant &amp;&amp;</div><div class='ctx'> 	    active_chains != priv-&gt;chain_noise_data.active_chains)</div><div class='ctx'> 		IWL_DEBUG_CALIB(priv,</div><div class='ctx'> 				"Detected that not all antennas are connected! "</div><div class='ctx'> 				"Connected: %#x, valid: %#x.\n",</div><div class='ctx'> 				active_chains,</div><div class='del'>-				hw_params(priv).valid_rx_ant);</div><div class='add'>+				priv-&gt;hw_params.valid_rx_ant);</div><div class='ctx'> </div><div class='ctx'> 	/* Save for use within RXON, TX, SCAN commands, etc. */</div><div class='ctx'> 	data-&gt;active_chains = active_chains;</div><div class='hunk'>@@ -895,7 +894,7 @@ static void iwlagn_gain_computation(struct iwl_priv *priv,</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		delta_g = (cfg(priv)-&gt;base_params-&gt;chain_noise_scale *</div><div class='add'>+		delta_g = (priv-&gt;cfg-&gt;base_params-&gt;chain_noise_scale *</div><div class='ctx'> 			((s32)average_noise[default_chain] -</div><div class='ctx'> 			(s32)average_noise[i])) / 1500;</div><div class='ctx'> </div><div class='hunk'>@@ -970,7 +969,7 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv)</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_BSS];</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;disable_chain_noise_cal)</div><div class='add'>+	if (priv-&gt;calib_disabled &amp; IWL_CHAIN_NOISE_CALIB_DISABLED)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	data = &amp;(priv-&gt;chain_noise_data);</div><div class='hunk'>@@ -1051,11 +1050,11 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Analyze signal for disconnected antenna */</div><div class='del'>-	if (cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+	    priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='ctx'> 		/* Disable disconnected antenna algorithm for advanced</div><div class='ctx'> 		   bt coex, assuming valid antennas are connected */</div><div class='del'>-		data-&gt;active_chains = hw_params(priv).valid_rx_ant;</div><div class='add'>+		data-&gt;active_chains = priv-&gt;hw_params.valid_rx_ant;</div><div class='ctx'> 		for (i = 0; i &lt; NUM_RX_CHAINS; i++)</div><div class='ctx'> 			if (!(data-&gt;active_chains &amp; (1&lt;&lt;i)))</div><div class='ctx'> 				data-&gt;disconn_array[i] = 1;</div><div class='hunk'>@@ -1085,7 +1084,7 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv)</div><div class='ctx'> 			min_average_noise, min_average_noise_antenna_i);</div><div class='ctx'> </div><div class='ctx'> 	iwlagn_gain_computation(priv, average_noise,</div><div class='del'>-				find_first_chain(hw_params(priv).valid_rx_ant));</div><div class='add'>+				find_first_chain(priv-&gt;hw_params.valid_rx_ant));</div><div class='ctx'> </div><div class='ctx'> 	/* Some power changes may have been made during the calibration.</div><div class='ctx'> 	 * Update and commit the RXON</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-calib.h b/drivers/net/wireless/iwlwifi/iwl-agn-calib.h<br/>index 9ed6683314a7..dbe13787f272 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-calib.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn-calib.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-calib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-calib.h</a></div><div class='hunk'>@@ -63,7 +63,6 @@</div><div class='ctx'> #define __iwl_calib_h__</div><div class='ctx'> </div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-commands.h"</div><div class='ctx'> </div><div class='ctx'> void iwl_chain_noise_calibration(struct iwl_priv *priv);</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-devices.c b/drivers/net/wireless/iwlwifi/iwl-agn-devices.c<br/>new file mode 100644<br/>index 000000000000..48533b3a0f9a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-devices.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-devices.c</a></div><div class='hunk'>@@ -0,0 +1,755 @@</div><div class='add'>+/******************************************************************************</div><div class='add'>+ *</div><div class='add'>+ * Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of version 2 of the GNU General Public License as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along with</div><div class='add'>+ * this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA</div><div class='add'>+ *</div><div class='add'>+ * The full GNU General Public License is included in this distribution in the</div><div class='add'>+ * file called LICENSE.</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ *  Intel Linux Wireless &lt;ilw@linux.intel.com&gt;</div><div class='add'>+ * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497</div><div class='add'>+ *</div><div class='add'>+ *****************************************************************************/</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DVM device-specific data &amp; functions</div><div class='add'>+ */</div><div class='add'>+#include "iwl-agn.h"</div><div class='add'>+#include "iwl-dev.h"</div><div class='add'>+#include "iwl-commands.h"</div><div class='add'>+#include "iwl-io.h"</div><div class='add'>+#include "iwl-prph.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 1000 series</div><div class='add'>+ * ===========</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For 1000, use advance thermal throttling critical temperature threshold,</div><div class='add'>+ * but legacy thermal management implementation for now.</div><div class='add'>+ * This is for the reason of 1000 uCode using advance thermal throttling API</div><div class='add'>+ * but not implement ct_kill_exit based on ct_kill exit temperature</div><div class='add'>+ * so the thermal throttling will still based on legacy thermal throttling</div><div class='add'>+ * management.</div><div class='add'>+ * The code here need to be modified once 1000 uCode has the advanced thermal</div><div class='add'>+ * throttling algorithm in place</div><div class='add'>+ */</div><div class='add'>+static void iwl1000_set_ct_threshold(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* want Celsius */</div><div class='add'>+	priv-&gt;hw_params.ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY;</div><div class='add'>+	priv-&gt;hw_params.ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* NIC configuration for 1000 series */</div><div class='add'>+static void iwl1000_nic_config(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* set CSR_HW_CONFIG_REG for uCode use */</div><div class='add'>+	iwl_set_bit(priv-&gt;trans, CSR_HW_IF_CONFIG_REG,</div><div class='add'>+		    CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |</div><div class='add'>+		    CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);</div><div class='add'>+</div><div class='add'>+	/* Setting digital SVR for 1000 card to 1.32V */</div><div class='add'>+	/* locking is acquired in iwl_set_bits_mask_prph() function */</div><div class='add'>+	iwl_set_bits_mask_prph(priv-&gt;trans, APMG_DIGITAL_SVR_REG,</div><div class='add'>+				APMG_SVR_DIGITAL_VOLTAGE_1_32,</div><div class='add'>+				~APMG_SVR_VOLTAGE_CONFIG_BIT_MSK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iwl_beacon_time_mask_low - mask of lower 32 bit of beacon time</div><div class='add'>+ * @priv -- pointer to iwl_priv data structure</div><div class='add'>+ * @tsf_bits -- number of bits need to shift for masking)</div><div class='add'>+ */</div><div class='add'>+static inline u32 iwl_beacon_time_mask_low(struct iwl_priv *priv,</div><div class='add'>+					   u16 tsf_bits)</div><div class='add'>+{</div><div class='add'>+	return (1 &lt;&lt; tsf_bits) - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iwl_beacon_time_mask_high - mask of higher 32 bit of beacon time</div><div class='add'>+ * @priv -- pointer to iwl_priv data structure</div><div class='add'>+ * @tsf_bits -- number of bits need to shift for masking)</div><div class='add'>+ */</div><div class='add'>+static inline u32 iwl_beacon_time_mask_high(struct iwl_priv *priv,</div><div class='add'>+					    u16 tsf_bits)</div><div class='add'>+{</div><div class='add'>+	return ((1 &lt;&lt; (32 - tsf_bits)) - 1) &lt;&lt; tsf_bits;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * extended beacon time format</div><div class='add'>+ * time in usec will be changed into a 32-bit value in extended:internal format</div><div class='add'>+ * the extended part is the beacon counts</div><div class='add'>+ * the internal part is the time in usec within one beacon interval</div><div class='add'>+ */</div><div class='add'>+static u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec,</div><div class='add'>+				u32 beacon_interval)</div><div class='add'>+{</div><div class='add'>+	u32 quot;</div><div class='add'>+	u32 rem;</div><div class='add'>+	u32 interval = beacon_interval * TIME_UNIT;</div><div class='add'>+</div><div class='add'>+	if (!interval || !usec)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	quot = (usec / interval) &amp;</div><div class='add'>+		(iwl_beacon_time_mask_high(priv, IWLAGN_EXT_BEACON_TIME_POS) &gt;&gt;</div><div class='add'>+		IWLAGN_EXT_BEACON_TIME_POS);</div><div class='add'>+	rem = (usec % interval) &amp; iwl_beacon_time_mask_low(priv,</div><div class='add'>+				   IWLAGN_EXT_BEACON_TIME_POS);</div><div class='add'>+</div><div class='add'>+	return (quot &lt;&lt; IWLAGN_EXT_BEACON_TIME_POS) + rem;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* base is usually what we get from ucode with each received frame,</div><div class='add'>+ * the same as HW timer counter counting down</div><div class='add'>+ */</div><div class='add'>+static __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,</div><div class='add'>+			   u32 addon, u32 beacon_interval)</div><div class='add'>+{</div><div class='add'>+	u32 base_low = base &amp; iwl_beacon_time_mask_low(priv,</div><div class='add'>+				IWLAGN_EXT_BEACON_TIME_POS);</div><div class='add'>+	u32 addon_low = addon &amp; iwl_beacon_time_mask_low(priv,</div><div class='add'>+				IWLAGN_EXT_BEACON_TIME_POS);</div><div class='add'>+	u32 interval = beacon_interval * TIME_UNIT;</div><div class='add'>+	u32 res = (base &amp; iwl_beacon_time_mask_high(priv,</div><div class='add'>+				IWLAGN_EXT_BEACON_TIME_POS)) +</div><div class='add'>+				(addon &amp; iwl_beacon_time_mask_high(priv,</div><div class='add'>+				IWLAGN_EXT_BEACON_TIME_POS));</div><div class='add'>+</div><div class='add'>+	if (base_low &gt; addon_low)</div><div class='add'>+		res += base_low - addon_low;</div><div class='add'>+	else if (base_low &lt; addon_low) {</div><div class='add'>+		res += interval + base_low - addon_low;</div><div class='add'>+		res += (1 &lt;&lt; IWLAGN_EXT_BEACON_TIME_POS);</div><div class='add'>+	} else</div><div class='add'>+		res += (1 &lt;&lt; IWLAGN_EXT_BEACON_TIME_POS);</div><div class='add'>+</div><div class='add'>+	return cpu_to_le32(res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct iwl_sensitivity_ranges iwl1000_sensitivity = {</div><div class='add'>+	.min_nrg_cck = 95,</div><div class='add'>+	.auto_corr_min_ofdm = 90,</div><div class='add'>+	.auto_corr_min_ofdm_mrc = 170,</div><div class='add'>+	.auto_corr_min_ofdm_x1 = 120,</div><div class='add'>+	.auto_corr_min_ofdm_mrc_x1 = 240,</div><div class='add'>+</div><div class='add'>+	.auto_corr_max_ofdm = 120,</div><div class='add'>+	.auto_corr_max_ofdm_mrc = 210,</div><div class='add'>+	.auto_corr_max_ofdm_x1 = 155,</div><div class='add'>+	.auto_corr_max_ofdm_mrc_x1 = 290,</div><div class='add'>+</div><div class='add'>+	.auto_corr_min_cck = 125,</div><div class='add'>+	.auto_corr_max_cck = 200,</div><div class='add'>+	.auto_corr_min_cck_mrc = 170,</div><div class='add'>+	.auto_corr_max_cck_mrc = 400,</div><div class='add'>+	.nrg_th_cck = 95,</div><div class='add'>+	.nrg_th_ofdm = 95,</div><div class='add'>+</div><div class='add'>+	.barker_corr_th_min = 190,</div><div class='add'>+	.barker_corr_th_min_mrc = 390,</div><div class='add'>+	.nrg_th_cca = 62,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void iwl1000_hw_set_hw_params(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;hw_params.ht40_channel =  BIT(IEEE80211_BAND_2GHZ);</div><div class='add'>+</div><div class='add'>+	priv-&gt;hw_params.tx_chains_num =</div><div class='add'>+		num_of_ant(priv-&gt;hw_params.valid_tx_ant);</div><div class='add'>+	if (priv-&gt;cfg-&gt;rx_with_siso_diversity)</div><div class='add'>+		priv-&gt;hw_params.rx_chains_num = 1;</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;hw_params.rx_chains_num =</div><div class='add'>+			num_of_ant(priv-&gt;hw_params.valid_rx_ant);</div><div class='add'>+</div><div class='add'>+	iwl1000_set_ct_threshold(priv);</div><div class='add'>+</div><div class='add'>+	/* Set initial sensitivity parameters */</div><div class='add'>+	priv-&gt;hw_params.sens = &amp;iwl1000_sensitivity;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct iwl_lib_ops iwl1000_lib = {</div><div class='add'>+	.set_hw_params = iwl1000_hw_set_hw_params,</div><div class='add'>+	.nic_config = iwl1000_nic_config,</div><div class='add'>+	.eeprom_ops = {</div><div class='add'>+		.regulatory_bands = {</div><div class='add'>+			EEPROM_REG_BAND_1_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_2_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_3_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_4_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_5_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_24_HT40_CHANNELS,</div><div class='add'>+			EEPROM_REGULATORY_BAND_NO_HT40,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.temperature = iwlagn_temperature,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 2000 series</div><div class='add'>+ * ===========</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void iwl2000_set_ct_threshold(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* want Celsius */</div><div class='add'>+	priv-&gt;hw_params.ct_kill_threshold = CT_KILL_THRESHOLD;</div><div class='add'>+	priv-&gt;hw_params.ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* NIC configuration for 2000 series */</div><div class='add'>+static void iwl2000_nic_config(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	iwl_rf_config(priv);</div><div class='add'>+</div><div class='add'>+	iwl_set_bit(priv-&gt;trans, CSR_GP_DRIVER_REG,</div><div class='add'>+		    CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct iwl_sensitivity_ranges iwl2000_sensitivity = {</div><div class='add'>+	.min_nrg_cck = 97,</div><div class='add'>+	.auto_corr_min_ofdm = 80,</div><div class='add'>+	.auto_corr_min_ofdm_mrc = 128,</div><div class='add'>+	.auto_corr_min_ofdm_x1 = 105,</div><div class='add'>+	.auto_corr_min_ofdm_mrc_x1 = 192,</div><div class='add'>+</div><div class='add'>+	.auto_corr_max_ofdm = 145,</div><div class='add'>+	.auto_corr_max_ofdm_mrc = 232,</div><div class='add'>+	.auto_corr_max_ofdm_x1 = 110,</div><div class='add'>+	.auto_corr_max_ofdm_mrc_x1 = 232,</div><div class='add'>+</div><div class='add'>+	.auto_corr_min_cck = 125,</div><div class='add'>+	.auto_corr_max_cck = 175,</div><div class='add'>+	.auto_corr_min_cck_mrc = 160,</div><div class='add'>+	.auto_corr_max_cck_mrc = 310,</div><div class='add'>+	.nrg_th_cck = 97,</div><div class='add'>+	.nrg_th_ofdm = 100,</div><div class='add'>+</div><div class='add'>+	.barker_corr_th_min = 190,</div><div class='add'>+	.barker_corr_th_min_mrc = 390,</div><div class='add'>+	.nrg_th_cca = 62,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void iwl2000_hw_set_hw_params(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;hw_params.ht40_channel =  BIT(IEEE80211_BAND_2GHZ);</div><div class='add'>+</div><div class='add'>+	priv-&gt;hw_params.tx_chains_num =</div><div class='add'>+		num_of_ant(priv-&gt;hw_params.valid_tx_ant);</div><div class='add'>+	if (priv-&gt;cfg-&gt;rx_with_siso_diversity)</div><div class='add'>+		priv-&gt;hw_params.rx_chains_num = 1;</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;hw_params.rx_chains_num =</div><div class='add'>+			num_of_ant(priv-&gt;hw_params.valid_rx_ant);</div><div class='add'>+</div><div class='add'>+	iwl2000_set_ct_threshold(priv);</div><div class='add'>+</div><div class='add'>+	/* Set initial sensitivity parameters */</div><div class='add'>+	priv-&gt;hw_params.sens = &amp;iwl2000_sensitivity;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct iwl_lib_ops iwl2000_lib = {</div><div class='add'>+	.set_hw_params = iwl2000_hw_set_hw_params,</div><div class='add'>+	.nic_config = iwl2000_nic_config,</div><div class='add'>+	.eeprom_ops = {</div><div class='add'>+		.regulatory_bands = {</div><div class='add'>+			EEPROM_REG_BAND_1_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_2_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_3_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_4_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_5_CHANNELS,</div><div class='add'>+			EEPROM_6000_REG_BAND_24_HT40_CHANNELS,</div><div class='add'>+			EEPROM_REGULATORY_BAND_NO_HT40,</div><div class='add'>+		},</div><div class='add'>+		.enhanced_txpower = true,</div><div class='add'>+	},</div><div class='add'>+	.temperature = iwlagn_temperature,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct iwl_lib_ops iwl2030_lib = {</div><div class='add'>+	.set_hw_params = iwl2000_hw_set_hw_params,</div><div class='add'>+	.nic_config = iwl2000_nic_config,</div><div class='add'>+	.eeprom_ops = {</div><div class='add'>+		.regulatory_bands = {</div><div class='add'>+			EEPROM_REG_BAND_1_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_2_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_3_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_4_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_5_CHANNELS,</div><div class='add'>+			EEPROM_6000_REG_BAND_24_HT40_CHANNELS,</div><div class='add'>+			EEPROM_REGULATORY_BAND_NO_HT40,</div><div class='add'>+		},</div><div class='add'>+		.enhanced_txpower = true,</div><div class='add'>+	},</div><div class='add'>+	.temperature = iwlagn_temperature,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 5000 series</div><div class='add'>+ * ===========</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* NIC configuration for 5000 series */</div><div class='add'>+static void iwl5000_nic_config(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	iwl_rf_config(priv);</div><div class='add'>+</div><div class='add'>+	/* W/A : NIC is stuck in a reset state after Early PCIe power off</div><div class='add'>+	 * (PCIe power is lost before PERST# is asserted),</div><div class='add'>+	 * causing ME FW to lose ownership and not being able to obtain it back.</div><div class='add'>+	 */</div><div class='add'>+	iwl_set_bits_mask_prph(priv-&gt;trans, APMG_PS_CTRL_REG,</div><div class='add'>+				APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,</div><div class='add'>+				~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct iwl_sensitivity_ranges iwl5000_sensitivity = {</div><div class='add'>+	.min_nrg_cck = 100,</div><div class='add'>+	.auto_corr_min_ofdm = 90,</div><div class='add'>+	.auto_corr_min_ofdm_mrc = 170,</div><div class='add'>+	.auto_corr_min_ofdm_x1 = 105,</div><div class='add'>+	.auto_corr_min_ofdm_mrc_x1 = 220,</div><div class='add'>+</div><div class='add'>+	.auto_corr_max_ofdm = 120,</div><div class='add'>+	.auto_corr_max_ofdm_mrc = 210,</div><div class='add'>+	.auto_corr_max_ofdm_x1 = 120,</div><div class='add'>+	.auto_corr_max_ofdm_mrc_x1 = 240,</div><div class='add'>+</div><div class='add'>+	.auto_corr_min_cck = 125,</div><div class='add'>+	.auto_corr_max_cck = 200,</div><div class='add'>+	.auto_corr_min_cck_mrc = 200,</div><div class='add'>+	.auto_corr_max_cck_mrc = 400,</div><div class='add'>+	.nrg_th_cck = 100,</div><div class='add'>+	.nrg_th_ofdm = 100,</div><div class='add'>+</div><div class='add'>+	.barker_corr_th_min = 190,</div><div class='add'>+	.barker_corr_th_min_mrc = 390,</div><div class='add'>+	.nrg_th_cca = 62,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct iwl_sensitivity_ranges iwl5150_sensitivity = {</div><div class='add'>+	.min_nrg_cck = 95,</div><div class='add'>+	.auto_corr_min_ofdm = 90,</div><div class='add'>+	.auto_corr_min_ofdm_mrc = 170,</div><div class='add'>+	.auto_corr_min_ofdm_x1 = 105,</div><div class='add'>+	.auto_corr_min_ofdm_mrc_x1 = 220,</div><div class='add'>+</div><div class='add'>+	.auto_corr_max_ofdm = 120,</div><div class='add'>+	.auto_corr_max_ofdm_mrc = 210,</div><div class='add'>+	/* max = min for performance bug in 5150 DSP */</div><div class='add'>+	.auto_corr_max_ofdm_x1 = 105,</div><div class='add'>+	.auto_corr_max_ofdm_mrc_x1 = 220,</div><div class='add'>+</div><div class='add'>+	.auto_corr_min_cck = 125,</div><div class='add'>+	.auto_corr_max_cck = 200,</div><div class='add'>+	.auto_corr_min_cck_mrc = 170,</div><div class='add'>+	.auto_corr_max_cck_mrc = 400,</div><div class='add'>+	.nrg_th_cck = 95,</div><div class='add'>+	.nrg_th_ofdm = 95,</div><div class='add'>+</div><div class='add'>+	.barker_corr_th_min = 190,</div><div class='add'>+	.barker_corr_th_min_mrc = 390,</div><div class='add'>+	.nrg_th_cca = 62,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF	(-5)</div><div class='add'>+</div><div class='add'>+static s32 iwl_temp_calib_to_offset(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u16 temperature, voltage;</div><div class='add'>+	__le16 *temp_calib = (__le16 *)iwl_eeprom_query_addr(priv,</div><div class='add'>+				EEPROM_KELVIN_TEMPERATURE);</div><div class='add'>+</div><div class='add'>+	temperature = le16_to_cpu(temp_calib[0]);</div><div class='add'>+	voltage = le16_to_cpu(temp_calib[1]);</div><div class='add'>+</div><div class='add'>+	/* offset = temp - volt / coeff */</div><div class='add'>+	return (s32)(temperature -</div><div class='add'>+			voltage / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void iwl5150_set_ct_threshold(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const s32 volt2temp_coef = IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF;</div><div class='add'>+	s32 threshold = (s32)CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY) -</div><div class='add'>+			iwl_temp_calib_to_offset(priv);</div><div class='add'>+</div><div class='add'>+	priv-&gt;hw_params.ct_kill_threshold = threshold * volt2temp_coef;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void iwl5000_set_ct_threshold(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* want Celsius */</div><div class='add'>+	priv-&gt;hw_params.ct_kill_threshold = CT_KILL_THRESHOLD_LEGACY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void iwl5000_hw_set_hw_params(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;hw_params.ht40_channel =  BIT(IEEE80211_BAND_2GHZ) |</div><div class='add'>+					BIT(IEEE80211_BAND_5GHZ);</div><div class='add'>+</div><div class='add'>+	priv-&gt;hw_params.tx_chains_num =</div><div class='add'>+		num_of_ant(priv-&gt;hw_params.valid_tx_ant);</div><div class='add'>+	priv-&gt;hw_params.rx_chains_num =</div><div class='add'>+		num_of_ant(priv-&gt;hw_params.valid_rx_ant);</div><div class='add'>+</div><div class='add'>+	iwl5000_set_ct_threshold(priv);</div><div class='add'>+</div><div class='add'>+	/* Set initial sensitivity parameters */</div><div class='add'>+	priv-&gt;hw_params.sens = &amp;iwl5000_sensitivity;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void iwl5150_hw_set_hw_params(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;hw_params.ht40_channel =  BIT(IEEE80211_BAND_2GHZ) |</div><div class='add'>+					BIT(IEEE80211_BAND_5GHZ);</div><div class='add'>+</div><div class='add'>+	priv-&gt;hw_params.tx_chains_num =</div><div class='add'>+		num_of_ant(priv-&gt;hw_params.valid_tx_ant);</div><div class='add'>+	priv-&gt;hw_params.rx_chains_num =</div><div class='add'>+		num_of_ant(priv-&gt;hw_params.valid_rx_ant);</div><div class='add'>+</div><div class='add'>+	iwl5150_set_ct_threshold(priv);</div><div class='add'>+</div><div class='add'>+	/* Set initial sensitivity parameters */</div><div class='add'>+	priv-&gt;hw_params.sens = &amp;iwl5150_sensitivity;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void iwl5150_temperature(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 vt = 0;</div><div class='add'>+	s32 offset =  iwl_temp_calib_to_offset(priv);</div><div class='add'>+</div><div class='add'>+	vt = le32_to_cpu(priv-&gt;statistics.common.temperature);</div><div class='add'>+	vt = vt / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF + offset;</div><div class='add'>+	/* now vt hold the temperature in Kelvin */</div><div class='add'>+	priv-&gt;temperature = KELVIN_TO_CELSIUS(vt);</div><div class='add'>+	iwl_tt_handler(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iwl5000_hw_channel_switch(struct iwl_priv *priv,</div><div class='add'>+				     struct ieee80211_channel_switch *ch_switch)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * MULTI-FIXME</div><div class='add'>+	 * See iwlagn_mac_channel_switch.</div><div class='add'>+	 */</div><div class='add'>+	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_BSS];</div><div class='add'>+	struct iwl5000_channel_switch_cmd cmd;</div><div class='add'>+	const struct iwl_channel_info *ch_info;</div><div class='add'>+	u32 switch_time_in_usec, ucode_switch_time;</div><div class='add'>+	u16 ch;</div><div class='add'>+	u32 tsf_low;</div><div class='add'>+	u8 switch_count;</div><div class='add'>+	u16 beacon_interval = le16_to_cpu(ctx-&gt;timing.beacon_interval);</div><div class='add'>+	struct ieee80211_vif *vif = ctx-&gt;vif;</div><div class='add'>+	struct iwl_host_cmd hcmd = {</div><div class='add'>+		.id = REPLY_CHANNEL_SWITCH,</div><div class='add'>+		.len = { sizeof(cmd), },</div><div class='add'>+		.flags = CMD_SYNC,</div><div class='add'>+		.data = { &amp;cmd, },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cmd.band = priv-&gt;band == IEEE80211_BAND_2GHZ;</div><div class='add'>+	ch = ch_switch-&gt;channel-&gt;hw_value;</div><div class='add'>+	IWL_DEBUG_11H(priv, "channel switch from %d to %d\n",</div><div class='add'>+		      ctx-&gt;active.channel, ch);</div><div class='add'>+	cmd.channel = cpu_to_le16(ch);</div><div class='add'>+	cmd.rxon_flags = ctx-&gt;staging.flags;</div><div class='add'>+	cmd.rxon_filter_flags = ctx-&gt;staging.filter_flags;</div><div class='add'>+	switch_count = ch_switch-&gt;count;</div><div class='add'>+	tsf_low = ch_switch-&gt;timestamp &amp; 0x0ffffffff;</div><div class='add'>+	/*</div><div class='add'>+	 * calculate the ucode channel switch time</div><div class='add'>+	 * adding TSF as one of the factor for when to switch</div><div class='add'>+	 */</div><div class='add'>+	if ((priv-&gt;ucode_beacon_time &gt; tsf_low) &amp;&amp; beacon_interval) {</div><div class='add'>+		if (switch_count &gt; ((priv-&gt;ucode_beacon_time - tsf_low) /</div><div class='add'>+		    beacon_interval)) {</div><div class='add'>+			switch_count -= (priv-&gt;ucode_beacon_time -</div><div class='add'>+				tsf_low) / beacon_interval;</div><div class='add'>+		} else</div><div class='add'>+			switch_count = 0;</div><div class='add'>+	}</div><div class='add'>+	if (switch_count &lt;= 1)</div><div class='add'>+		cmd.switch_time = cpu_to_le32(priv-&gt;ucode_beacon_time);</div><div class='add'>+	else {</div><div class='add'>+		switch_time_in_usec =</div><div class='add'>+			vif-&gt;bss_conf.beacon_int * switch_count * TIME_UNIT;</div><div class='add'>+		ucode_switch_time = iwl_usecs_to_beacons(priv,</div><div class='add'>+							 switch_time_in_usec,</div><div class='add'>+							 beacon_interval);</div><div class='add'>+		cmd.switch_time = iwl_add_beacon_time(priv,</div><div class='add'>+						      priv-&gt;ucode_beacon_time,</div><div class='add'>+						      ucode_switch_time,</div><div class='add'>+						      beacon_interval);</div><div class='add'>+	}</div><div class='add'>+	IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n",</div><div class='add'>+		      cmd.switch_time);</div><div class='add'>+	ch_info = iwl_get_channel_info(priv, priv-&gt;band, ch);</div><div class='add'>+	if (ch_info)</div><div class='add'>+		cmd.expect_beacon = is_channel_radar(ch_info);</div><div class='add'>+	else {</div><div class='add'>+		IWL_ERR(priv, "invalid channel switch from %u to %u\n",</div><div class='add'>+			ctx-&gt;active.channel, ch);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return iwl_dvm_send_cmd(priv, &amp;hcmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct iwl_lib_ops iwl5000_lib = {</div><div class='add'>+	.set_hw_params = iwl5000_hw_set_hw_params,</div><div class='add'>+	.set_channel_switch = iwl5000_hw_channel_switch,</div><div class='add'>+	.nic_config = iwl5000_nic_config,</div><div class='add'>+	.eeprom_ops = {</div><div class='add'>+		.regulatory_bands = {</div><div class='add'>+			EEPROM_REG_BAND_1_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_2_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_3_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_4_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_5_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_24_HT40_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_52_HT40_CHANNELS</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.temperature = iwlagn_temperature,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct iwl_lib_ops iwl5150_lib = {</div><div class='add'>+	.set_hw_params = iwl5150_hw_set_hw_params,</div><div class='add'>+	.set_channel_switch = iwl5000_hw_channel_switch,</div><div class='add'>+	.nic_config = iwl5000_nic_config,</div><div class='add'>+	.eeprom_ops = {</div><div class='add'>+		.regulatory_bands = {</div><div class='add'>+			EEPROM_REG_BAND_1_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_2_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_3_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_4_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_5_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_24_HT40_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_52_HT40_CHANNELS</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.temperature = iwl5150_temperature,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 6000 series</div><div class='add'>+ * ===========</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void iwl6000_set_ct_threshold(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* want Celsius */</div><div class='add'>+	priv-&gt;hw_params.ct_kill_threshold = CT_KILL_THRESHOLD;</div><div class='add'>+	priv-&gt;hw_params.ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* NIC configuration for 6000 series */</div><div class='add'>+static void iwl6000_nic_config(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	iwl_rf_config(priv);</div><div class='add'>+</div><div class='add'>+	switch (priv-&gt;cfg-&gt;device_family) {</div><div class='add'>+	case IWL_DEVICE_FAMILY_6005:</div><div class='add'>+	case IWL_DEVICE_FAMILY_6030:</div><div class='add'>+	case IWL_DEVICE_FAMILY_6000:</div><div class='add'>+		break;</div><div class='add'>+	case IWL_DEVICE_FAMILY_6000i:</div><div class='add'>+		/* 2x2 IPA phy type */</div><div class='add'>+		iwl_write32(priv-&gt;trans, CSR_GP_DRIVER_REG,</div><div class='add'>+			     CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA);</div><div class='add'>+		break;</div><div class='add'>+	case IWL_DEVICE_FAMILY_6050:</div><div class='add'>+		/* Indicate calibration version to uCode. */</div><div class='add'>+		if (iwl_eeprom_calib_version(priv) &gt;= 6)</div><div class='add'>+			iwl_set_bit(priv-&gt;trans, CSR_GP_DRIVER_REG,</div><div class='add'>+					CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);</div><div class='add'>+		break;</div><div class='add'>+	case IWL_DEVICE_FAMILY_6150:</div><div class='add'>+		/* Indicate calibration version to uCode. */</div><div class='add'>+		if (iwl_eeprom_calib_version(priv) &gt;= 6)</div><div class='add'>+			iwl_set_bit(priv-&gt;trans, CSR_GP_DRIVER_REG,</div><div class='add'>+					CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);</div><div class='add'>+		iwl_set_bit(priv-&gt;trans, CSR_GP_DRIVER_REG,</div><div class='add'>+			    CSR_GP_DRIVER_REG_BIT_6050_1x2);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON(1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct iwl_sensitivity_ranges iwl6000_sensitivity = {</div><div class='add'>+	.min_nrg_cck = 110,</div><div class='add'>+	.auto_corr_min_ofdm = 80,</div><div class='add'>+	.auto_corr_min_ofdm_mrc = 128,</div><div class='add'>+	.auto_corr_min_ofdm_x1 = 105,</div><div class='add'>+	.auto_corr_min_ofdm_mrc_x1 = 192,</div><div class='add'>+</div><div class='add'>+	.auto_corr_max_ofdm = 145,</div><div class='add'>+	.auto_corr_max_ofdm_mrc = 232,</div><div class='add'>+	.auto_corr_max_ofdm_x1 = 110,</div><div class='add'>+	.auto_corr_max_ofdm_mrc_x1 = 232,</div><div class='add'>+</div><div class='add'>+	.auto_corr_min_cck = 125,</div><div class='add'>+	.auto_corr_max_cck = 175,</div><div class='add'>+	.auto_corr_min_cck_mrc = 160,</div><div class='add'>+	.auto_corr_max_cck_mrc = 310,</div><div class='add'>+	.nrg_th_cck = 110,</div><div class='add'>+	.nrg_th_ofdm = 110,</div><div class='add'>+</div><div class='add'>+	.barker_corr_th_min = 190,</div><div class='add'>+	.barker_corr_th_min_mrc = 336,</div><div class='add'>+	.nrg_th_cca = 62,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void iwl6000_hw_set_hw_params(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;hw_params.ht40_channel =  BIT(IEEE80211_BAND_2GHZ) |</div><div class='add'>+					BIT(IEEE80211_BAND_5GHZ);</div><div class='add'>+</div><div class='add'>+	priv-&gt;hw_params.tx_chains_num =</div><div class='add'>+		num_of_ant(priv-&gt;hw_params.valid_tx_ant);</div><div class='add'>+	if (priv-&gt;cfg-&gt;rx_with_siso_diversity)</div><div class='add'>+		priv-&gt;hw_params.rx_chains_num = 1;</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;hw_params.rx_chains_num =</div><div class='add'>+			num_of_ant(priv-&gt;hw_params.valid_rx_ant);</div><div class='add'>+</div><div class='add'>+	iwl6000_set_ct_threshold(priv);</div><div class='add'>+</div><div class='add'>+	/* Set initial sensitivity parameters */</div><div class='add'>+	priv-&gt;hw_params.sens = &amp;iwl6000_sensitivity;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iwl6000_hw_channel_switch(struct iwl_priv *priv,</div><div class='add'>+				     struct ieee80211_channel_switch *ch_switch)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * MULTI-FIXME</div><div class='add'>+	 * See iwlagn_mac_channel_switch.</div><div class='add'>+	 */</div><div class='add'>+	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_BSS];</div><div class='add'>+	struct iwl6000_channel_switch_cmd cmd;</div><div class='add'>+	const struct iwl_channel_info *ch_info;</div><div class='add'>+	u32 switch_time_in_usec, ucode_switch_time;</div><div class='add'>+	u16 ch;</div><div class='add'>+	u32 tsf_low;</div><div class='add'>+	u8 switch_count;</div><div class='add'>+	u16 beacon_interval = le16_to_cpu(ctx-&gt;timing.beacon_interval);</div><div class='add'>+	struct ieee80211_vif *vif = ctx-&gt;vif;</div><div class='add'>+	struct iwl_host_cmd hcmd = {</div><div class='add'>+		.id = REPLY_CHANNEL_SWITCH,</div><div class='add'>+		.len = { sizeof(cmd), },</div><div class='add'>+		.flags = CMD_SYNC,</div><div class='add'>+		.data = { &amp;cmd, },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cmd.band = priv-&gt;band == IEEE80211_BAND_2GHZ;</div><div class='add'>+	ch = ch_switch-&gt;channel-&gt;hw_value;</div><div class='add'>+	IWL_DEBUG_11H(priv, "channel switch from %u to %u\n",</div><div class='add'>+		      ctx-&gt;active.channel, ch);</div><div class='add'>+	cmd.channel = cpu_to_le16(ch);</div><div class='add'>+	cmd.rxon_flags = ctx-&gt;staging.flags;</div><div class='add'>+	cmd.rxon_filter_flags = ctx-&gt;staging.filter_flags;</div><div class='add'>+	switch_count = ch_switch-&gt;count;</div><div class='add'>+	tsf_low = ch_switch-&gt;timestamp &amp; 0x0ffffffff;</div><div class='add'>+	/*</div><div class='add'>+	 * calculate the ucode channel switch time</div><div class='add'>+	 * adding TSF as one of the factor for when to switch</div><div class='add'>+	 */</div><div class='add'>+	if ((priv-&gt;ucode_beacon_time &gt; tsf_low) &amp;&amp; beacon_interval) {</div><div class='add'>+		if (switch_count &gt; ((priv-&gt;ucode_beacon_time - tsf_low) /</div><div class='add'>+		    beacon_interval)) {</div><div class='add'>+			switch_count -= (priv-&gt;ucode_beacon_time -</div><div class='add'>+				tsf_low) / beacon_interval;</div><div class='add'>+		} else</div><div class='add'>+			switch_count = 0;</div><div class='add'>+	}</div><div class='add'>+	if (switch_count &lt;= 1)</div><div class='add'>+		cmd.switch_time = cpu_to_le32(priv-&gt;ucode_beacon_time);</div><div class='add'>+	else {</div><div class='add'>+		switch_time_in_usec =</div><div class='add'>+			vif-&gt;bss_conf.beacon_int * switch_count * TIME_UNIT;</div><div class='add'>+		ucode_switch_time = iwl_usecs_to_beacons(priv,</div><div class='add'>+							 switch_time_in_usec,</div><div class='add'>+							 beacon_interval);</div><div class='add'>+		cmd.switch_time = iwl_add_beacon_time(priv,</div><div class='add'>+						      priv-&gt;ucode_beacon_time,</div><div class='add'>+						      ucode_switch_time,</div><div class='add'>+						      beacon_interval);</div><div class='add'>+	}</div><div class='add'>+	IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n",</div><div class='add'>+		      cmd.switch_time);</div><div class='add'>+	ch_info = iwl_get_channel_info(priv, priv-&gt;band, ch);</div><div class='add'>+	if (ch_info)</div><div class='add'>+		cmd.expect_beacon = is_channel_radar(ch_info);</div><div class='add'>+	else {</div><div class='add'>+		IWL_ERR(priv, "invalid channel switch from %u to %u\n",</div><div class='add'>+			ctx-&gt;active.channel, ch);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return iwl_dvm_send_cmd(priv, &amp;hcmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct iwl_lib_ops iwl6000_lib = {</div><div class='add'>+	.set_hw_params = iwl6000_hw_set_hw_params,</div><div class='add'>+	.set_channel_switch = iwl6000_hw_channel_switch,</div><div class='add'>+	.nic_config = iwl6000_nic_config,</div><div class='add'>+	.eeprom_ops = {</div><div class='add'>+		.regulatory_bands = {</div><div class='add'>+			EEPROM_REG_BAND_1_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_2_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_3_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_4_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_5_CHANNELS,</div><div class='add'>+			EEPROM_6000_REG_BAND_24_HT40_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_52_HT40_CHANNELS</div><div class='add'>+		},</div><div class='add'>+		.enhanced_txpower = true,</div><div class='add'>+	},</div><div class='add'>+	.temperature = iwlagn_temperature,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct iwl_lib_ops iwl6030_lib = {</div><div class='add'>+	.set_hw_params = iwl6000_hw_set_hw_params,</div><div class='add'>+	.set_channel_switch = iwl6000_hw_channel_switch,</div><div class='add'>+	.nic_config = iwl6000_nic_config,</div><div class='add'>+	.eeprom_ops = {</div><div class='add'>+		.regulatory_bands = {</div><div class='add'>+			EEPROM_REG_BAND_1_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_2_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_3_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_4_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_5_CHANNELS,</div><div class='add'>+			EEPROM_6000_REG_BAND_24_HT40_CHANNELS,</div><div class='add'>+			EEPROM_REG_BAND_52_HT40_CHANNELS</div><div class='add'>+		},</div><div class='add'>+		.enhanced_txpower = true,</div><div class='add'>+	},</div><div class='add'>+	.temperature = iwlagn_temperature,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-hw.h b/drivers/net/wireless/iwlwifi/iwl-agn-hw.h<br/>index d0ec0abd3c89..7960a52f6ad4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-hw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn-hw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-hw.h</a></div><div class='hunk'>@@ -102,10 +102,18 @@</div><div class='ctx'> </div><div class='ctx'> /* EEPROM */</div><div class='ctx'> #define IWLAGN_EEPROM_IMG_SIZE		2048</div><div class='add'>+/* OTP */</div><div class='add'>+/* lower blocks contain EEPROM image and calibration data */</div><div class='add'>+#define OTP_LOW_IMAGE_SIZE		(2 * 512 * sizeof(u16)) /* 2 KB */</div><div class='add'>+/* high blocks contain PAPD data */</div><div class='add'>+#define OTP_HIGH_IMAGE_SIZE_6x00        (6 * 512 * sizeof(u16)) /* 6 KB */</div><div class='add'>+#define OTP_HIGH_IMAGE_SIZE_1000        (0x200 * sizeof(u16)) /* 1024 bytes */</div><div class='add'>+#define OTP_MAX_LL_ITEMS_1000		(3)	/* OTP blocks for 1000 */</div><div class='add'>+#define OTP_MAX_LL_ITEMS_6x00		(4)	/* OTP blocks for 6x00 */</div><div class='add'>+#define OTP_MAX_LL_ITEMS_6x50		(7)	/* OTP blocks for 6x50 */</div><div class='add'>+#define OTP_MAX_LL_ITEMS_2x00		(4)	/* OTP blocks for 2x00 */</div><div class='add'>+</div><div class='ctx'> </div><div class='del'>-#define IWLAGN_CMD_FIFO_NUM		7</div><div class='ctx'> #define IWLAGN_NUM_QUEUES		20</div><div class='del'>-#define IWLAGN_NUM_AMPDU_QUEUES		9</div><div class='del'>-#define IWLAGN_FIRST_AMPDU_QUEUE	11</div><div class='ctx'> </div><div class='ctx'> #endif /* __iwl_agn_hw_h__ */</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c<br/>index 56f41c9409d1..e55ec6c8a920 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-lib.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn-lib.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-lib.c</a></div><div class='hunk'>@@ -31,14 +31,14 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;net/mac80211.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-agn-hw.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='add'>+#include "iwl-modparams.h"</div><div class='ctx'> </div><div class='ctx'> int iwlagn_hw_valid_rtc_data_addr(u32 addr)</div><div class='ctx'> {</div><div class='hunk'>@@ -94,81 +94,6 @@ void iwlagn_temperature(struct iwl_priv *priv)</div><div class='ctx'> 	iwl_tt_handler(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u16 iwl_eeprom_calib_version(struct iwl_shared *shrd)</div><div class='del'>-{</div><div class='del'>-	struct iwl_eeprom_calib_hdr *hdr;</div><div class='del'>-</div><div class='del'>-	hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(shrd,</div><div class='del'>-							EEPROM_CALIB_ALL);</div><div class='del'>-	return hdr-&gt;version;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * EEPROM</div><div class='del'>- */</div><div class='del'>-static u32 eeprom_indirect_address(const struct iwl_shared *shrd, u32 address)</div><div class='del'>-{</div><div class='del'>-	u16 offset = 0;</div><div class='del'>-</div><div class='del'>-	if ((address &amp; INDIRECT_ADDRESS) == 0)</div><div class='del'>-		return address;</div><div class='del'>-</div><div class='del'>-	switch (address &amp; INDIRECT_TYPE_MSK) {</div><div class='del'>-	case INDIRECT_HOST:</div><div class='del'>-		offset = iwl_eeprom_query16(shrd, EEPROM_LINK_HOST);</div><div class='del'>-		break;</div><div class='del'>-	case INDIRECT_GENERAL:</div><div class='del'>-		offset = iwl_eeprom_query16(shrd, EEPROM_LINK_GENERAL);</div><div class='del'>-		break;</div><div class='del'>-	case INDIRECT_REGULATORY:</div><div class='del'>-		offset = iwl_eeprom_query16(shrd, EEPROM_LINK_REGULATORY);</div><div class='del'>-		break;</div><div class='del'>-	case INDIRECT_TXP_LIMIT:</div><div class='del'>-		offset = iwl_eeprom_query16(shrd, EEPROM_LINK_TXP_LIMIT);</div><div class='del'>-		break;</div><div class='del'>-	case INDIRECT_TXP_LIMIT_SIZE:</div><div class='del'>-		offset = iwl_eeprom_query16(shrd, EEPROM_LINK_TXP_LIMIT_SIZE);</div><div class='del'>-		break;</div><div class='del'>-	case INDIRECT_CALIBRATION:</div><div class='del'>-		offset = iwl_eeprom_query16(shrd, EEPROM_LINK_CALIBRATION);</div><div class='del'>-		break;</div><div class='del'>-	case INDIRECT_PROCESS_ADJST:</div><div class='del'>-		offset = iwl_eeprom_query16(shrd, EEPROM_LINK_PROCESS_ADJST);</div><div class='del'>-		break;</div><div class='del'>-	case INDIRECT_OTHERS:</div><div class='del'>-		offset = iwl_eeprom_query16(shrd, EEPROM_LINK_OTHERS);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		IWL_ERR(shrd-&gt;trans, "illegal indirect type: 0x%X\n",</div><div class='del'>-		address &amp; INDIRECT_TYPE_MSK);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* translate the offset from words to byte */</div><div class='del'>-	return (address &amp; ADDRESS_MSK) + (offset &lt;&lt; 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const u8 *iwl_eeprom_query_addr(const struct iwl_shared *shrd, size_t offset)</div><div class='del'>-{</div><div class='del'>-	u32 address = eeprom_indirect_address(shrd, offset);</div><div class='del'>-	BUG_ON(address &gt;= shrd-&gt;cfg-&gt;base_params-&gt;eeprom_size);</div><div class='del'>-	return &amp;shrd-&gt;eeprom[address];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct iwl_mod_params iwlagn_mod_params = {</div><div class='del'>-	.amsdu_size_8K = 1,</div><div class='del'>-	.restart_fw = 1,</div><div class='del'>-	.plcp_check = true,</div><div class='del'>-	.bt_coex_active = true,</div><div class='del'>-	.no_sleep_autoadjust = true,</div><div class='del'>-	.power_level = IWL_POWER_INDEX_1,</div><div class='del'>-	.bt_ch_announce = true,</div><div class='del'>-	.wanted_ucode_alternative = 1,</div><div class='del'>-	.auto_agg = true,</div><div class='del'>-	/* the rest are 0 by default */</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)</div><div class='ctx'> {</div><div class='ctx'> 	int idx = 0;</div><div class='hunk'>@@ -228,13 +153,13 @@ int iwlagn_txfifo_flush(struct iwl_priv *priv, u16 flush_control)</div><div class='ctx'> 				 IWL_SCD_BE_MSK | IWL_SCD_BK_MSK |</div><div class='ctx'> 				 IWL_SCD_MGMT_MSK;</div><div class='ctx'> 	if ((flush_control &amp; BIT(IWL_RXON_CTX_PAN)) &amp;&amp;</div><div class='del'>-	    (priv-&gt;shrd-&gt;valid_contexts != BIT(IWL_RXON_CTX_BSS)))</div><div class='add'>+	    (priv-&gt;valid_contexts != BIT(IWL_RXON_CTX_BSS)))</div><div class='ctx'> 		flush_cmd.fifo_control |= IWL_PAN_SCD_VO_MSK |</div><div class='ctx'> 				IWL_PAN_SCD_VI_MSK | IWL_PAN_SCD_BE_MSK |</div><div class='ctx'> 				IWL_PAN_SCD_BK_MSK | IWL_PAN_SCD_MGMT_MSK |</div><div class='ctx'> 				IWL_PAN_SCD_MULTICAST_MSK;</div><div class='ctx'> </div><div class='del'>-	if (hw_params(priv).sku &amp; EEPROM_SKU_CAP_11N_ENABLE)</div><div class='add'>+	if (priv-&gt;hw_params.sku &amp; EEPROM_SKU_CAP_11N_ENABLE)</div><div class='ctx'> 		flush_cmd.fifo_control |= IWL_AGG_TX_QUEUE_MSK;</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_INFO(priv, "fifo queue control: 0X%x\n",</div><div class='hunk'>@@ -253,7 +178,7 @@ void iwlagn_dev_txfifo_flush(struct iwl_priv *priv, u16 flush_control)</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> 	IWL_DEBUG_INFO(priv, "wait transmit/flush all frames\n");</div><div class='del'>-	iwl_trans_wait_tx_queue_empty(trans(priv));</div><div class='add'>+	iwl_trans_wait_tx_queue_empty(priv-&gt;trans);</div><div class='ctx'> done:</div><div class='ctx'> 	ieee80211_wake_queues(priv-&gt;hw);</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;mutex);</div><div class='hunk'>@@ -262,76 +187,8 @@ done:</div><div class='ctx'> /*</div><div class='ctx'>  * BT coex</div><div class='ctx'>  */</div><div class='del'>-/*</div><div class='del'>- * Macros to access the lookup table.</div><div class='del'>- *</div><div class='del'>- * The lookup table has 7 inputs: bt3_prio, bt3_txrx, bt_rf_act, wifi_req,</div><div class='del'>-* wifi_prio, wifi_txrx and wifi_sh_ant_req.</div><div class='del'>- *</div><div class='del'>- * It has three outputs: WLAN_ACTIVE, WLAN_KILL and ANT_SWITCH</div><div class='del'>- *</div><div class='del'>- * The format is that "registers" 8 through 11 contain the WLAN_ACTIVE bits</div><div class='del'>- * one after another in 32-bit registers, and "registers" 0 through 7 contain</div><div class='del'>- * the WLAN_KILL and ANT_SWITCH bits interleaved (in that order).</div><div class='del'>- *</div><div class='del'>- * These macros encode that format.</div><div class='del'>- */</div><div class='del'>-#define LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, wifi_req, wifi_prio, \</div><div class='del'>-		  wifi_txrx, wifi_sh_ant_req) \</div><div class='del'>-	(bt3_prio | (bt3_txrx &lt;&lt; 1) | (bt_rf_act &lt;&lt; 2) | (wifi_req &lt;&lt; 3) | \</div><div class='del'>-	(wifi_prio &lt;&lt; 4) | (wifi_txrx &lt;&lt; 5) | (wifi_sh_ant_req &lt;&lt; 6))</div><div class='del'>-</div><div class='del'>-#define LUT_PTA_WLAN_ACTIVE_OP(lut, op, val) \</div><div class='del'>-	lut[8 + ((val) &gt;&gt; 5)] op (cpu_to_le32(BIT((val) &amp; 0x1f)))</div><div class='del'>-#define LUT_TEST_PTA_WLAN_ACTIVE(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \</div><div class='del'>-				 wifi_prio, wifi_txrx, wifi_sh_ant_req) \</div><div class='del'>-	(!!(LUT_PTA_WLAN_ACTIVE_OP(lut, &amp;, LUT_VALUE(bt3_prio, bt3_txrx, \</div><div class='del'>-				   bt_rf_act, wifi_req, wifi_prio, wifi_txrx, \</div><div class='del'>-				   wifi_sh_ant_req))))</div><div class='del'>-#define LUT_SET_PTA_WLAN_ACTIVE(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \</div><div class='del'>-				wifi_prio, wifi_txrx, wifi_sh_ant_req) \</div><div class='del'>-	LUT_PTA_WLAN_ACTIVE_OP(lut, |=, LUT_VALUE(bt3_prio, bt3_txrx, \</div><div class='del'>-			       bt_rf_act, wifi_req, wifi_prio, wifi_txrx, \</div><div class='del'>-			       wifi_sh_ant_req))</div><div class='del'>-#define LUT_CLEAR_PTA_WLAN_ACTIVE(lut, bt3_prio, bt3_txrx, bt_rf_act, \</div><div class='del'>-				  wifi_req, wifi_prio, wifi_txrx, \</div><div class='del'>-				  wifi_sh_ant_req) \</div><div class='del'>-	LUT_PTA_WLAN_ACTIVE_OP(lut, &amp;= ~, LUT_VALUE(bt3_prio, bt3_txrx, \</div><div class='del'>-			       bt_rf_act, wifi_req, wifi_prio, wifi_txrx, \</div><div class='del'>-			       wifi_sh_ant_req))</div><div class='del'>-</div><div class='del'>-#define LUT_WLAN_KILL_OP(lut, op, val) \</div><div class='del'>-	lut[(val) &gt;&gt; 4] op (cpu_to_le32(BIT(((val) &lt;&lt; 1) &amp; 0x1e)))</div><div class='del'>-#define LUT_TEST_WLAN_KILL(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \</div><div class='del'>-			   wifi_prio, wifi_txrx, wifi_sh_ant_req) \</div><div class='del'>-	(!!(LUT_WLAN_KILL_OP(lut, &amp;, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \</div><div class='del'>-			     wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))))</div><div class='del'>-#define LUT_SET_WLAN_KILL(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \</div><div class='del'>-			  wifi_prio, wifi_txrx, wifi_sh_ant_req) \</div><div class='del'>-	LUT_WLAN_KILL_OP(lut, |=, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \</div><div class='del'>-			 wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))</div><div class='del'>-#define LUT_CLEAR_WLAN_KILL(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \</div><div class='del'>-			    wifi_prio, wifi_txrx, wifi_sh_ant_req) \</div><div class='del'>-	LUT_WLAN_KILL_OP(lut, &amp;= ~, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \</div><div class='del'>-			 wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))</div><div class='del'>-</div><div class='del'>-#define LUT_ANT_SWITCH_OP(lut, op, val) \</div><div class='del'>-	lut[(val) &gt;&gt; 4] op (cpu_to_le32(BIT((((val) &lt;&lt; 1) &amp; 0x1e) + 1)))</div><div class='del'>-#define LUT_TEST_ANT_SWITCH(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \</div><div class='del'>-			    wifi_prio, wifi_txrx, wifi_sh_ant_req) \</div><div class='del'>-	(!!(LUT_ANT_SWITCH_OP(lut, &amp;, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \</div><div class='del'>-			      wifi_req, wifi_prio, wifi_txrx, \</div><div class='del'>-			      wifi_sh_ant_req))))</div><div class='del'>-#define LUT_SET_ANT_SWITCH(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \</div><div class='del'>-			   wifi_prio, wifi_txrx, wifi_sh_ant_req) \</div><div class='del'>-	LUT_ANT_SWITCH_OP(lut, |=, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \</div><div class='del'>-			  wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))</div><div class='del'>-#define LUT_CLEAR_ANT_SWITCH(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \</div><div class='del'>-			     wifi_prio, wifi_txrx, wifi_sh_ant_req) \</div><div class='del'>-	LUT_ANT_SWITCH_OP(lut, &amp;= ~, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \</div><div class='del'>-			  wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))</div><div class='del'>-</div><div class='del'>-static const __le32 iwlagn_def_3w_lookup[12] = {</div><div class='add'>+/* Notmal TDM */</div><div class='add'>+static const __le32 iwlagn_def_3w_lookup[IWLAGN_BT_DECISION_LUT_SIZE] = {</div><div class='ctx'> 	cpu_to_le32(0xaaaaaaaa),</div><div class='ctx'> 	cpu_to_le32(0xaaaaaaaa),</div><div class='ctx'> 	cpu_to_le32(0xaeaaaaaa),</div><div class='hunk'>@@ -346,7 +203,25 @@ static const __le32 iwlagn_def_3w_lookup[12] = {</div><div class='ctx'> 	cpu_to_le32(0xf0005000),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const __le32 iwlagn_concurrent_lookup[12] = {</div><div class='add'>+</div><div class='add'>+/* Loose Coex */</div><div class='add'>+static const __le32 iwlagn_loose_lookup[IWLAGN_BT_DECISION_LUT_SIZE] = {</div><div class='add'>+	cpu_to_le32(0xaaaaaaaa),</div><div class='add'>+	cpu_to_le32(0xaaaaaaaa),</div><div class='add'>+	cpu_to_le32(0xaeaaaaaa),</div><div class='add'>+	cpu_to_le32(0xaaaaaaaa),</div><div class='add'>+	cpu_to_le32(0xcc00ff28),</div><div class='add'>+	cpu_to_le32(0x0000aaaa),</div><div class='add'>+	cpu_to_le32(0xcc00aaaa),</div><div class='add'>+	cpu_to_le32(0x0000aaaa),</div><div class='add'>+	cpu_to_le32(0x00000000),</div><div class='add'>+	cpu_to_le32(0x00000000),</div><div class='add'>+	cpu_to_le32(0xf0005000),</div><div class='add'>+	cpu_to_le32(0xf0005000),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Full concurrency */</div><div class='add'>+static const __le32 iwlagn_concurrent_lookup[IWLAGN_BT_DECISION_LUT_SIZE] = {</div><div class='ctx'> 	cpu_to_le32(0xaaaaaaaa),</div><div class='ctx'> 	cpu_to_le32(0xaaaaaaaa),</div><div class='ctx'> 	cpu_to_le32(0xaaaaaaaa),</div><div class='hunk'>@@ -369,32 +244,50 @@ void iwlagn_send_advance_bt_config(struct iwl_priv *priv)</div><div class='ctx'> 		.bt3_prio_sample_time = IWLAGN_BT3_PRIO_SAMPLE_DEFAULT,</div><div class='ctx'> 		.bt3_timer_t2_value = IWLAGN_BT3_T2_DEFAULT,</div><div class='ctx'> 	};</div><div class='del'>-	struct iwl6000_bt_cmd bt_cmd_6000;</div><div class='del'>-	struct iwl2000_bt_cmd bt_cmd_2000;</div><div class='add'>+	struct iwl_bt_cmd_v1 bt_cmd_v1;</div><div class='add'>+	struct iwl_bt_cmd_v2 bt_cmd_v2;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON(sizeof(iwlagn_def_3w_lookup) !=</div><div class='ctx'> 			sizeof(basic.bt3_lookup_table));</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;bt_params) {</div><div class='del'>-		if (cfg(priv)-&gt;bt_params-&gt;bt_session_2) {</div><div class='del'>-			bt_cmd_2000.prio_boost = cpu_to_le32(</div><div class='del'>-				cfg(priv)-&gt;bt_params-&gt;bt_prio_boost);</div><div class='del'>-			bt_cmd_2000.tx_prio_boost = 0;</div><div class='del'>-			bt_cmd_2000.rx_prio_boost = 0;</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params) {</div><div class='add'>+		/*</div><div class='add'>+		 * newer generation of devices (2000 series and newer)</div><div class='add'>+		 * use the version 2 of the bt command</div><div class='add'>+		 * we need to make sure sending the host command</div><div class='add'>+		 * with correct data structure to avoid uCode assert</div><div class='add'>+		 */</div><div class='add'>+		if (priv-&gt;cfg-&gt;bt_params-&gt;bt_session_2) {</div><div class='add'>+			bt_cmd_v2.prio_boost = cpu_to_le32(</div><div class='add'>+				priv-&gt;cfg-&gt;bt_params-&gt;bt_prio_boost);</div><div class='add'>+			bt_cmd_v2.tx_prio_boost = 0;</div><div class='add'>+			bt_cmd_v2.rx_prio_boost = 0;</div><div class='ctx'> 		} else {</div><div class='del'>-			bt_cmd_6000.prio_boost =</div><div class='del'>-				cfg(priv)-&gt;bt_params-&gt;bt_prio_boost;</div><div class='del'>-			bt_cmd_6000.tx_prio_boost = 0;</div><div class='del'>-			bt_cmd_6000.rx_prio_boost = 0;</div><div class='add'>+			bt_cmd_v1.prio_boost =</div><div class='add'>+				priv-&gt;cfg-&gt;bt_params-&gt;bt_prio_boost;</div><div class='add'>+			bt_cmd_v1.tx_prio_boost = 0;</div><div class='add'>+			bt_cmd_v1.rx_prio_boost = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		IWL_ERR(priv, "failed to construct BT Coex Config\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Possible situations when BT needs to take over for receive,</div><div class='add'>+	 * at the same time where STA needs to response to AP's frame(s),</div><div class='add'>+	 * reduce the tx power of the required response frames, by that,</div><div class='add'>+	 * allow the concurrent BT receive &amp; WiFi transmit</div><div class='add'>+	 * (BT - ANT A, WiFi -ANT B), without interference to one another</div><div class='add'>+	 *</div><div class='add'>+	 * Reduced tx power apply to control frames only (ACK/Back/CTS)</div><div class='add'>+	 * when indicated by the BT config command</div><div class='add'>+	 */</div><div class='ctx'> 	basic.kill_ack_mask = priv-&gt;kill_ack_mask;</div><div class='ctx'> 	basic.kill_cts_mask = priv-&gt;kill_cts_mask;</div><div class='add'>+	if (priv-&gt;reduced_txpower)</div><div class='add'>+		basic.reduce_txpower = IWLAGN_BT_REDUCED_TX_PWR;</div><div class='ctx'> 	basic.valid = priv-&gt;bt_valid;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -403,7 +296,7 @@ void iwlagn_send_advance_bt_config(struct iwl_priv *priv)</div><div class='ctx'> 	 * (might be in monitor mode), or the interface is in</div><div class='ctx'> 	 * IBSS mode (no proper uCode support for coex then).</div><div class='ctx'> 	 */</div><div class='del'>-	if (!iwlagn_mod_params.bt_coex_active ||</div><div class='add'>+	if (!iwlwifi_mod_params.bt_coex_active ||</div><div class='ctx'> 	    priv-&gt;iw_mode == NL80211_IFTYPE_ADHOC) {</div><div class='ctx'> 		basic.flags = IWLAGN_BT_FLAG_COEX_MODE_DISABLED;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -432,16 +325,16 @@ void iwlagn_send_advance_bt_config(struct iwl_priv *priv)</div><div class='ctx'> 		       priv-&gt;bt_full_concurrent ?</div><div class='ctx'> 		       "full concurrency" : "3-wire");</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;bt_params-&gt;bt_session_2) {</div><div class='del'>-		memcpy(&amp;bt_cmd_2000.basic, &amp;basic,</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params-&gt;bt_session_2) {</div><div class='add'>+		memcpy(&amp;bt_cmd_v2.basic, &amp;basic,</div><div class='ctx'> 			sizeof(basic));</div><div class='ctx'> 		ret = iwl_dvm_send_cmd_pdu(priv, REPLY_BT_CONFIG,</div><div class='del'>-			CMD_SYNC, sizeof(bt_cmd_2000), &amp;bt_cmd_2000);</div><div class='add'>+			CMD_SYNC, sizeof(bt_cmd_v2), &amp;bt_cmd_v2);</div><div class='ctx'> 	} else {</div><div class='del'>-		memcpy(&amp;bt_cmd_6000.basic, &amp;basic,</div><div class='add'>+		memcpy(&amp;bt_cmd_v1.basic, &amp;basic,</div><div class='ctx'> 			sizeof(basic));</div><div class='ctx'> 		ret = iwl_dvm_send_cmd_pdu(priv, REPLY_BT_CONFIG,</div><div class='del'>-			CMD_SYNC, sizeof(bt_cmd_6000), &amp;bt_cmd_6000);</div><div class='add'>+			CMD_SYNC, sizeof(bt_cmd_v1), &amp;bt_cmd_v1);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		IWL_ERR(priv, "failed to send BT Coex Config\n");</div><div class='hunk'>@@ -615,7 +508,7 @@ static void iwlagn_print_uartmsg(struct iwl_priv *priv,</div><div class='ctx'> 				struct iwl_bt_uart_msg *uart_msg)</div><div class='ctx'> {</div><div class='ctx'> 	IWL_DEBUG_COEX(priv, "Message Type = 0x%X, SSN = 0x%X, "</div><div class='del'>-			"Update Req = 0x%X",</div><div class='add'>+			"Update Req = 0x%X\n",</div><div class='ctx'> 		(BT_UART_MSG_FRAME1MSGTYPE_MSK &amp; uart_msg-&gt;frame1) &gt;&gt;</div><div class='ctx'> 			BT_UART_MSG_FRAME1MSGTYPE_POS,</div><div class='ctx'> 		(BT_UART_MSG_FRAME1SSN_MSK &amp; uart_msg-&gt;frame1) &gt;&gt;</div><div class='hunk'>@@ -624,7 +517,7 @@ static void iwlagn_print_uartmsg(struct iwl_priv *priv,</div><div class='ctx'> 			BT_UART_MSG_FRAME1UPDATEREQ_POS);</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_COEX(priv, "Open connections = 0x%X, Traffic load = 0x%X, "</div><div class='del'>-			"Chl_SeqN = 0x%X, In band = 0x%X",</div><div class='add'>+			"Chl_SeqN = 0x%X, In band = 0x%X\n",</div><div class='ctx'> 		(BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK &amp; uart_msg-&gt;frame2) &gt;&gt;</div><div class='ctx'> 			BT_UART_MSG_FRAME2OPENCONNECTIONS_POS,</div><div class='ctx'> 		(BT_UART_MSG_FRAME2TRAFFICLOAD_MSK &amp; uart_msg-&gt;frame2) &gt;&gt;</div><div class='hunk'>@@ -635,7 +528,7 @@ static void iwlagn_print_uartmsg(struct iwl_priv *priv,</div><div class='ctx'> 			BT_UART_MSG_FRAME2INBAND_POS);</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_COEX(priv, "SCO/eSCO = 0x%X, Sniff = 0x%X, A2DP = 0x%X, "</div><div class='del'>-			"ACL = 0x%X, Master = 0x%X, OBEX = 0x%X",</div><div class='add'>+			"ACL = 0x%X, Master = 0x%X, OBEX = 0x%X\n",</div><div class='ctx'> 		(BT_UART_MSG_FRAME3SCOESCO_MSK &amp; uart_msg-&gt;frame3) &gt;&gt;</div><div class='ctx'> 			BT_UART_MSG_FRAME3SCOESCO_POS,</div><div class='ctx'> 		(BT_UART_MSG_FRAME3SNIFF_MSK &amp; uart_msg-&gt;frame3) &gt;&gt;</div><div class='hunk'>@@ -649,12 +542,12 @@ static void iwlagn_print_uartmsg(struct iwl_priv *priv,</div><div class='ctx'> 		(BT_UART_MSG_FRAME3OBEX_MSK &amp; uart_msg-&gt;frame3) &gt;&gt;</div><div class='ctx'> 			BT_UART_MSG_FRAME3OBEX_POS);</div><div class='ctx'> </div><div class='del'>-	IWL_DEBUG_COEX(priv, "Idle duration = 0x%X",</div><div class='add'>+	IWL_DEBUG_COEX(priv, "Idle duration = 0x%X\n",</div><div class='ctx'> 		(BT_UART_MSG_FRAME4IDLEDURATION_MSK &amp; uart_msg-&gt;frame4) &gt;&gt;</div><div class='ctx'> 			BT_UART_MSG_FRAME4IDLEDURATION_POS);</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_COEX(priv, "Tx Activity = 0x%X, Rx Activity = 0x%X, "</div><div class='del'>-			"eSCO Retransmissions = 0x%X",</div><div class='add'>+			"eSCO Retransmissions = 0x%X\n",</div><div class='ctx'> 		(BT_UART_MSG_FRAME5TXACTIVITY_MSK &amp; uart_msg-&gt;frame5) &gt;&gt;</div><div class='ctx'> 			BT_UART_MSG_FRAME5TXACTIVITY_POS,</div><div class='ctx'> 		(BT_UART_MSG_FRAME5RXACTIVITY_MSK &amp; uart_msg-&gt;frame5) &gt;&gt;</div><div class='hunk'>@@ -662,14 +555,14 @@ static void iwlagn_print_uartmsg(struct iwl_priv *priv,</div><div class='ctx'> 		(BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK &amp; uart_msg-&gt;frame5) &gt;&gt;</div><div class='ctx'> 			BT_UART_MSG_FRAME5ESCORETRANSMIT_POS);</div><div class='ctx'> </div><div class='del'>-	IWL_DEBUG_COEX(priv, "Sniff Interval = 0x%X, Discoverable = 0x%X",</div><div class='add'>+	IWL_DEBUG_COEX(priv, "Sniff Interval = 0x%X, Discoverable = 0x%X\n",</div><div class='ctx'> 		(BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK &amp; uart_msg-&gt;frame6) &gt;&gt;</div><div class='ctx'> 			BT_UART_MSG_FRAME6SNIFFINTERVAL_POS,</div><div class='ctx'> 		(BT_UART_MSG_FRAME6DISCOVERABLE_MSK &amp; uart_msg-&gt;frame6) &gt;&gt;</div><div class='ctx'> 			BT_UART_MSG_FRAME6DISCOVERABLE_POS);</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_COEX(priv, "Sniff Activity = 0x%X, Page = "</div><div class='del'>-			"0x%X, Inquiry = 0x%X, Connectable = 0x%X",</div><div class='add'>+			"0x%X, Inquiry = 0x%X, Connectable = 0x%X\n",</div><div class='ctx'> 		(BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK &amp; uart_msg-&gt;frame7) &gt;&gt;</div><div class='ctx'> 			BT_UART_MSG_FRAME7SNIFFACTIVITY_POS,</div><div class='ctx'> 		(BT_UART_MSG_FRAME7PAGE_MSK &amp; uart_msg-&gt;frame7) &gt;&gt;</div><div class='hunk'>@@ -680,29 +573,81 @@ static void iwlagn_print_uartmsg(struct iwl_priv *priv,</div><div class='ctx'> 			BT_UART_MSG_FRAME7CONNECTABLE_POS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwlagn_set_kill_msk(struct iwl_priv *priv,</div><div class='add'>+static bool iwlagn_set_kill_msk(struct iwl_priv *priv,</div><div class='ctx'> 				struct iwl_bt_uart_msg *uart_msg)</div><div class='ctx'> {</div><div class='del'>-	u8 kill_msk;</div><div class='del'>-	static const __le32 bt_kill_ack_msg[2] = {</div><div class='add'>+	bool need_update = false;</div><div class='add'>+	u8 kill_msk = IWL_BT_KILL_REDUCE;</div><div class='add'>+	static const __le32 bt_kill_ack_msg[3] = {</div><div class='ctx'> 		IWLAGN_BT_KILL_ACK_MASK_DEFAULT,</div><div class='del'>-		IWLAGN_BT_KILL_ACK_CTS_MASK_SCO };</div><div class='del'>-	static const __le32 bt_kill_cts_msg[2] = {</div><div class='add'>+		IWLAGN_BT_KILL_ACK_CTS_MASK_SCO,</div><div class='add'>+		IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE};</div><div class='add'>+	static const __le32 bt_kill_cts_msg[3] = {</div><div class='ctx'> 		IWLAGN_BT_KILL_CTS_MASK_DEFAULT,</div><div class='del'>-		IWLAGN_BT_KILL_ACK_CTS_MASK_SCO };</div><div class='add'>+		IWLAGN_BT_KILL_ACK_CTS_MASK_SCO,</div><div class='add'>+		IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE};</div><div class='ctx'> </div><div class='del'>-	kill_msk = (BT_UART_MSG_FRAME3SCOESCO_MSK &amp; uart_msg-&gt;frame3)</div><div class='del'>-		? 1 : 0;</div><div class='add'>+	if (!priv-&gt;reduced_txpower)</div><div class='add'>+		kill_msk = (BT_UART_MSG_FRAME3SCOESCO_MSK &amp; uart_msg-&gt;frame3)</div><div class='add'>+			? IWL_BT_KILL_OVERRIDE : IWL_BT_KILL_DEFAULT;</div><div class='ctx'> 	if (priv-&gt;kill_ack_mask != bt_kill_ack_msg[kill_msk] ||</div><div class='ctx'> 	    priv-&gt;kill_cts_mask != bt_kill_cts_msg[kill_msk]) {</div><div class='ctx'> 		priv-&gt;bt_valid |= IWLAGN_BT_VALID_KILL_ACK_MASK;</div><div class='ctx'> 		priv-&gt;kill_ack_mask = bt_kill_ack_msg[kill_msk];</div><div class='ctx'> 		priv-&gt;bt_valid |= IWLAGN_BT_VALID_KILL_CTS_MASK;</div><div class='ctx'> 		priv-&gt;kill_cts_mask = bt_kill_cts_msg[kill_msk];</div><div class='add'>+		need_update = true;</div><div class='add'>+	}</div><div class='add'>+	return need_update;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		/* schedule to send runtime bt_config */</div><div class='del'>-		queue_work(priv-&gt;workqueue, &amp;priv-&gt;bt_runtime_config);</div><div class='add'>+/*</div><div class='add'>+ * Upon RSSI changes, sends a bt config command with following changes</div><div class='add'>+ *  1. enable/disable "reduced control frames tx power</div><div class='add'>+ *  2. update the "kill)ack_mask" and "kill_cts_mask"</div><div class='add'>+ *</div><div class='add'>+ * If "reduced tx power" is enabled, uCode shall</div><div class='add'>+ *  1. ACK/Back/CTS rate shall reduced to 6Mbps</div><div class='add'>+ *  2. not use duplciate 20/40MHz mode</div><div class='add'>+ */</div><div class='add'>+static bool iwlagn_fill_txpower_mode(struct iwl_priv *priv,</div><div class='add'>+				struct iwl_bt_uart_msg *uart_msg)</div><div class='add'>+{</div><div class='add'>+	bool need_update = false;</div><div class='add'>+	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_BSS];</div><div class='add'>+	int ave_rssi;</div><div class='add'>+</div><div class='add'>+	ave_rssi = ieee80211_ave_rssi(ctx-&gt;vif);</div><div class='add'>+	if (!ave_rssi) {</div><div class='add'>+		/* no rssi data, no changes to reduce tx power */</div><div class='add'>+		IWL_DEBUG_COEX(priv, "no rssi data available\n");</div><div class='add'>+		return need_update;</div><div class='add'>+	}</div><div class='add'>+	if (!priv-&gt;reduced_txpower &amp;&amp;</div><div class='add'>+	    !iwl_is_associated(priv, IWL_RXON_CTX_PAN) &amp;&amp;</div><div class='add'>+	    (ave_rssi &gt; BT_ENABLE_REDUCED_TXPOWER_THRESHOLD) &amp;&amp;</div><div class='add'>+	    (uart_msg-&gt;frame3 &amp; (BT_UART_MSG_FRAME3ACL_MSK |</div><div class='add'>+	    BT_UART_MSG_FRAME3OBEX_MSK)) &amp;&amp;</div><div class='add'>+	    !(uart_msg-&gt;frame3 &amp; (BT_UART_MSG_FRAME3SCOESCO_MSK |</div><div class='add'>+	    BT_UART_MSG_FRAME3SNIFF_MSK | BT_UART_MSG_FRAME3A2DP_MSK))) {</div><div class='add'>+		/* enabling reduced tx power */</div><div class='add'>+		priv-&gt;reduced_txpower = true;</div><div class='add'>+		priv-&gt;bt_valid |= IWLAGN_BT_VALID_REDUCED_TX_PWR;</div><div class='add'>+		need_update = true;</div><div class='add'>+	} else if (priv-&gt;reduced_txpower &amp;&amp;</div><div class='add'>+		   (iwl_is_associated(priv, IWL_RXON_CTX_PAN) ||</div><div class='add'>+		   (ave_rssi &lt; BT_DISABLE_REDUCED_TXPOWER_THRESHOLD) ||</div><div class='add'>+		   (uart_msg-&gt;frame3 &amp; (BT_UART_MSG_FRAME3SCOESCO_MSK |</div><div class='add'>+		   BT_UART_MSG_FRAME3SNIFF_MSK | BT_UART_MSG_FRAME3A2DP_MSK)) ||</div><div class='add'>+		   !(uart_msg-&gt;frame3 &amp; (BT_UART_MSG_FRAME3ACL_MSK |</div><div class='add'>+		   BT_UART_MSG_FRAME3OBEX_MSK)))) {</div><div class='add'>+		/* disable reduced tx power */</div><div class='add'>+		priv-&gt;reduced_txpower = false;</div><div class='add'>+		priv-&gt;bt_valid |= IWLAGN_BT_VALID_REDUCED_TX_PWR;</div><div class='add'>+		need_update = true;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return need_update;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,</div><div class='hunk'>@@ -750,7 +695,12 @@ int iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	iwlagn_set_kill_msk(priv, uart_msg);</div><div class='add'>+	/* schedule to send runtime bt_config */</div><div class='add'>+	/* check reduce power before change ack/cts kill mask */</div><div class='add'>+	if (iwlagn_fill_txpower_mode(priv, uart_msg) ||</div><div class='add'>+	    iwlagn_set_kill_msk(priv, uart_msg))</div><div class='add'>+		queue_work(priv-&gt;workqueue, &amp;priv-&gt;bt_runtime_config);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	/* FIXME: based on notification, adjust the prio_boost */</div><div class='ctx'> </div><div class='hunk'>@@ -798,8 +748,8 @@ static bool is_single_rx_stream(struct iwl_priv *priv)</div><div class='ctx'>  */</div><div class='ctx'> static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	if (cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist &amp;&amp;</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+	    priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist &amp;&amp;</div><div class='ctx'> 	    (priv-&gt;bt_full_concurrent ||</div><div class='ctx'> 	     priv-&gt;bt_traffic_load &gt;= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -856,7 +806,7 @@ static u8 iwl_count_chain_bitmap(u32 chain_bitmap)</div><div class='ctx'> void iwlagn_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	bool is_single = is_single_rx_stream(priv);</div><div class='del'>-	bool is_cam = !test_bit(STATUS_POWER_PMI, &amp;priv-&gt;shrd-&gt;status);</div><div class='add'>+	bool is_cam = !test_bit(STATUS_POWER_PMI, &amp;priv-&gt;status);</div><div class='ctx'> 	u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;</div><div class='ctx'> 	u32 active_chains;</div><div class='ctx'> 	u16 rx_chain;</div><div class='hunk'>@@ -868,10 +818,10 @@ void iwlagn_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx)</div><div class='ctx'> 	if (priv-&gt;chain_noise_data.active_chains)</div><div class='ctx'> 		active_chains = priv-&gt;chain_noise_data.active_chains;</div><div class='ctx'> 	else</div><div class='del'>-		active_chains = hw_params(priv).valid_rx_ant;</div><div class='add'>+		active_chains = priv-&gt;hw_params.valid_rx_ant;</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist &amp;&amp;</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+	    priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist &amp;&amp;</div><div class='ctx'> 	    (priv-&gt;bt_full_concurrent ||</div><div class='ctx'> 	     priv-&gt;bt_traffic_load &gt;= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1190,7 +1140,7 @@ int iwlagn_suspend(struct iwl_priv *priv, struct cfg80211_wowlan *wowlan)</div><div class='ctx'> 	memcpy(&amp;rxon, &amp;ctx-&gt;active, sizeof(rxon));</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;ucode_loaded = false;</div><div class='del'>-	iwl_trans_stop_device(trans(priv));</div><div class='add'>+	iwl_trans_stop_device(priv-&gt;trans);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;wowlan = true;</div><div class='ctx'> </div><div class='hunk'>@@ -1212,7 +1162,7 @@ int iwlagn_suspend(struct iwl_priv *priv, struct cfg80211_wowlan *wowlan)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	if (!iwlagn_mod_params.sw_crypto) {</div><div class='add'>+	if (!iwlwifi_mod_params.sw_crypto) {</div><div class='ctx'> 		/* mark all keys clear */</div><div class='ctx'> 		priv-&gt;ucode_key_table = 0;</div><div class='ctx'> 		ctx-&gt;key_mapping_keys = 0;</div><div class='hunk'>@@ -1298,6 +1248,12 @@ int iwl_dvm_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (test_bit(STATUS_FW_ERROR, &amp;priv-&gt;status)) {</div><div class='add'>+		IWL_ERR(priv, "Command %s failed: FW Error\n",</div><div class='add'>+			iwl_dvm_get_cmd_string(cmd-&gt;id));</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Synchronous commands from this op-mode must hold</div><div class='ctx'> 	 * the mutex, this ensures we don't try to send two</div><div class='hunk'>@@ -1312,7 +1268,7 @@ int iwl_dvm_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return iwl_trans_send_cmd(trans(priv), cmd);</div><div class='add'>+	return iwl_trans_send_cmd(priv-&gt;trans, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int iwl_dvm_send_cmd_pdu(struct iwl_priv *priv, u8 id,</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c<br/>index 7e590b349dd7..8cebd7c363fc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-rs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn-rs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-rs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-rs.c</a></div><div class='hunk'>@@ -36,9 +36,9 @@</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='ctx'> #include "iwl-op-mode.h"</div><div class='add'>+#include "iwl-modparams.h"</div><div class='ctx'> </div><div class='ctx'> #define RS_NAME "iwl-agn-rs"</div><div class='ctx'> </div><div class='hunk'>@@ -420,7 +420,7 @@ static int rs_tl_turn_on_agg_for_tid(struct iwl_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	load = rs_tl_get_load(lq_data, tid);</div><div class='ctx'> </div><div class='del'>-	if ((iwlagn_mod_params.auto_agg) || (load &gt; IWL_AGG_LOAD_THRESHOLD)) {</div><div class='add'>+	if ((iwlwifi_mod_params.auto_agg) || (load &gt; IWL_AGG_LOAD_THRESHOLD)) {</div><div class='ctx'> 		IWL_DEBUG_HT(priv, "Starting Tx agg: STA: %pM tid: %d\n",</div><div class='ctx'> 				sta-&gt;addr, tid);</div><div class='ctx'> 		ret = ieee80211_start_tx_ba_session(sta, tid, 5000);</div><div class='hunk'>@@ -819,7 +819,7 @@ static u32 rs_get_lower_rate(struct iwl_lq_sta *lq_sta,</div><div class='ctx'> </div><div class='ctx'> 		if (num_of_ant(tbl-&gt;ant_type) &gt; 1)</div><div class='ctx'> 			tbl-&gt;ant_type =</div><div class='del'>-			    first_antenna(hw_params(priv).valid_tx_ant);</div><div class='add'>+			    first_antenna(priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> </div><div class='ctx'> 		tbl-&gt;is_ht40 = 0;</div><div class='ctx'> 		tbl-&gt;is_SGI = 0;</div><div class='hunk'>@@ -884,6 +884,7 @@ static void rs_bt_update_lq(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='ctx'> 	if ((priv-&gt;bt_traffic_load != priv-&gt;last_bt_traffic_load) ||</div><div class='ctx'> 	    (priv-&gt;bt_full_concurrent != full_concurrent)) {</div><div class='ctx'> 		priv-&gt;bt_full_concurrent = full_concurrent;</div><div class='add'>+		priv-&gt;last_bt_traffic_load = priv-&gt;bt_traffic_load;</div><div class='ctx'> </div><div class='ctx'> 		/* Update uCode's rate table. */</div><div class='ctx'> 		tbl = &amp;(lq_sta-&gt;lq_info[lq_sta-&gt;active_tbl]);</div><div class='hunk'>@@ -969,7 +970,7 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband,</div><div class='ctx'> 	    (tbl_type.is_SGI != !!(mac_flags &amp; IEEE80211_TX_RC_SHORT_GI)) ||</div><div class='ctx'> 	    (tbl_type.is_ht40 != !!(mac_flags &amp; IEEE80211_TX_RC_40_MHZ_WIDTH)) ||</div><div class='ctx'> 	    (tbl_type.is_dup != !!(mac_flags &amp; IEEE80211_TX_RC_DUP_DATA)) ||</div><div class='del'>-	    (tbl_type.ant_type != info-&gt;antenna_sel_tx) ||</div><div class='add'>+	    (tbl_type.ant_type != info-&gt;status.antenna) ||</div><div class='ctx'> 	    (!!(tx_rate &amp; RATE_MCS_HT_MSK) != !!(mac_flags &amp; IEEE80211_TX_RC_MCS)) ||</div><div class='ctx'> 	    (!!(tx_rate &amp; RATE_MCS_GF_MSK) != !!(mac_flags &amp; IEEE80211_TX_RC_GREEN_FIELD)) ||</div><div class='ctx'> 	    (rs_index != mac_index)) {</div><div class='hunk'>@@ -1085,7 +1086,7 @@ done:</div><div class='ctx'> 	    (priv-&gt;tm_fixed_rate != lq_sta-&gt;dbg_fixed_rate))</div><div class='ctx'> 		rs_program_fix_rate(priv, lq_sta);</div><div class='ctx'> #endif</div><div class='del'>-	if (cfg(priv)-&gt;bt_params &amp;&amp; cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist)</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params &amp;&amp; priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist)</div><div class='ctx'> 		rs_bt_update_lq(priv, ctx, lq_sta);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1291,7 +1292,7 @@ static int rs_switch_to_mimo2(struct iwl_priv *priv,</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	/* Need both Tx chains/antennas to support MIMO */</div><div class='del'>-	if (hw_params(priv).tx_chains_num &lt; 2)</div><div class='add'>+	if (priv-&gt;hw_params.tx_chains_num &lt; 2)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_RATE(priv, "LQ: try to switch to MIMO2\n");</div><div class='hunk'>@@ -1347,7 +1348,7 @@ static int rs_switch_to_mimo3(struct iwl_priv *priv,</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	/* Need both Tx chains/antennas to support MIMO */</div><div class='del'>-	if (hw_params(priv).tx_chains_num &lt; 3)</div><div class='add'>+	if (priv-&gt;hw_params.tx_chains_num &lt; 3)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_RATE(priv, "LQ: try to switch to MIMO3\n");</div><div class='hunk'>@@ -1446,8 +1447,8 @@ static int rs_move_legacy_other(struct iwl_priv *priv,</div><div class='ctx'> 	u32 sz = (sizeof(struct iwl_scale_tbl_info) -</div><div class='ctx'> 		  (sizeof(struct iwl_rate_scale_data) * IWL_RATE_COUNT));</div><div class='ctx'> 	u8 start_action;</div><div class='del'>-	u8 valid_tx_ant = hw_params(priv).valid_tx_ant;</div><div class='del'>-	u8 tx_chains_num = hw_params(priv).tx_chains_num;</div><div class='add'>+	u8 valid_tx_ant = priv-&gt;hw_params.valid_tx_ant;</div><div class='add'>+	u8 tx_chains_num = priv-&gt;hw_params.tx_chains_num;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	u8 update_search_tbl_counter = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1464,7 +1465,7 @@ static int rs_move_legacy_other(struct iwl_priv *priv,</div><div class='ctx'> 	case IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS:</div><div class='ctx'> 		/* avoid antenna B and MIMO */</div><div class='ctx'> 		valid_tx_ant =</div><div class='del'>-			first_antenna(hw_params(priv).valid_tx_ant);</div><div class='add'>+			first_antenna(priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> 		if (tbl-&gt;action &gt;= IWL_LEGACY_SWITCH_ANTENNA2 &amp;&amp;</div><div class='ctx'> 		    tbl-&gt;action != IWL_LEGACY_SWITCH_SISO)</div><div class='ctx'> 			tbl-&gt;action = IWL_LEGACY_SWITCH_SISO;</div><div class='hunk'>@@ -1488,7 +1489,7 @@ static int rs_move_legacy_other(struct iwl_priv *priv,</div><div class='ctx'> 		else if (tbl-&gt;action &gt;= IWL_LEGACY_SWITCH_ANTENNA2)</div><div class='ctx'> 			tbl-&gt;action = IWL_LEGACY_SWITCH_SISO;</div><div class='ctx'> 		valid_tx_ant =</div><div class='del'>-			first_antenna(hw_params(priv).valid_tx_ant);</div><div class='add'>+			first_antenna(priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	start_action = tbl-&gt;action;</div><div class='hunk'>@@ -1622,8 +1623,8 @@ static int rs_move_siso_to_other(struct iwl_priv *priv,</div><div class='ctx'> 	u32 sz = (sizeof(struct iwl_scale_tbl_info) -</div><div class='ctx'> 		  (sizeof(struct iwl_rate_scale_data) * IWL_RATE_COUNT));</div><div class='ctx'> 	u8 start_action;</div><div class='del'>-	u8 valid_tx_ant = hw_params(priv).valid_tx_ant;</div><div class='del'>-	u8 tx_chains_num = hw_params(priv).tx_chains_num;</div><div class='add'>+	u8 valid_tx_ant = priv-&gt;hw_params.valid_tx_ant;</div><div class='add'>+	u8 tx_chains_num = priv-&gt;hw_params.tx_chains_num;</div><div class='ctx'> 	u8 update_search_tbl_counter = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1640,7 +1641,7 @@ static int rs_move_siso_to_other(struct iwl_priv *priv,</div><div class='ctx'> 	case IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS:</div><div class='ctx'> 		/* avoid antenna B and MIMO */</div><div class='ctx'> 		valid_tx_ant =</div><div class='del'>-			first_antenna(hw_params(priv).valid_tx_ant);</div><div class='add'>+			first_antenna(priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> 		if (tbl-&gt;action != IWL_SISO_SWITCH_ANTENNA1)</div><div class='ctx'> 			tbl-&gt;action = IWL_SISO_SWITCH_ANTENNA1;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1658,7 +1659,7 @@ static int rs_move_siso_to_other(struct iwl_priv *priv,</div><div class='ctx'> 	/* configure as 1x1 if bt full concurrency */</div><div class='ctx'> 	if (priv-&gt;bt_full_concurrent) {</div><div class='ctx'> 		valid_tx_ant =</div><div class='del'>-			first_antenna(hw_params(priv).valid_tx_ant);</div><div class='add'>+			first_antenna(priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> 		if (tbl-&gt;action &gt;= IWL_LEGACY_SWITCH_ANTENNA2)</div><div class='ctx'> 			tbl-&gt;action = IWL_SISO_SWITCH_ANTENNA1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1794,8 +1795,8 @@ static int rs_move_mimo2_to_other(struct iwl_priv *priv,</div><div class='ctx'> 	u32 sz = (sizeof(struct iwl_scale_tbl_info) -</div><div class='ctx'> 		  (sizeof(struct iwl_rate_scale_data) * IWL_RATE_COUNT));</div><div class='ctx'> 	u8 start_action;</div><div class='del'>-	u8 valid_tx_ant = hw_params(priv).valid_tx_ant;</div><div class='del'>-	u8 tx_chains_num = hw_params(priv).tx_chains_num;</div><div class='add'>+	u8 valid_tx_ant = priv-&gt;hw_params.valid_tx_ant;</div><div class='add'>+	u8 tx_chains_num = priv-&gt;hw_params.tx_chains_num;</div><div class='ctx'> 	u8 update_search_tbl_counter = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1964,8 +1965,8 @@ static int rs_move_mimo3_to_other(struct iwl_priv *priv,</div><div class='ctx'> 	u32 sz = (sizeof(struct iwl_scale_tbl_info) -</div><div class='ctx'> 		  (sizeof(struct iwl_rate_scale_data) * IWL_RATE_COUNT));</div><div class='ctx'> 	u8 start_action;</div><div class='del'>-	u8 valid_tx_ant = hw_params(priv).valid_tx_ant;</div><div class='del'>-	u8 tx_chains_num = hw_params(priv).tx_chains_num;</div><div class='add'>+	u8 valid_tx_ant = priv-&gt;hw_params.valid_tx_ant;</div><div class='add'>+	u8 tx_chains_num = priv-&gt;hw_params.tx_chains_num;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u8 update_search_tbl_counter = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2166,7 +2167,7 @@ static void rs_stay_in_table(struct iwl_lq_sta *lq_sta, bool force_search)</div><div class='ctx'> 		    (lq_sta-&gt;total_success &gt; lq_sta-&gt;max_success_limit) ||</div><div class='ctx'> 		    ((!lq_sta-&gt;search_better_tbl) &amp;&amp; (lq_sta-&gt;flush_timer)</div><div class='ctx'> 		     &amp;&amp; (flush_interval_passed))) {</div><div class='del'>-			IWL_DEBUG_RATE(priv, "LQ: stay is expired %d %d %d\n:",</div><div class='add'>+			IWL_DEBUG_RATE(priv, "LQ: stay is expired %d %d %d\n",</div><div class='ctx'> 				     lq_sta-&gt;total_failed,</div><div class='ctx'> 				     lq_sta-&gt;total_success,</div><div class='ctx'> 				     flush_interval_passed);</div><div class='hunk'>@@ -2698,7 +2699,7 @@ static void rs_initialize_lq(struct iwl_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	i = lq_sta-&gt;last_txrate_idx;</div><div class='ctx'> </div><div class='del'>-	valid_tx_ant = hw_params(priv).valid_tx_ant;</div><div class='add'>+	valid_tx_ant = priv-&gt;hw_params.valid_tx_ant;</div><div class='ctx'> </div><div class='ctx'> 	if (!lq_sta-&gt;search_better_tbl)</div><div class='ctx'> 		active_tbl = lq_sta-&gt;active_tbl;</div><div class='hunk'>@@ -2826,6 +2827,7 @@ void iwl_rs_rate_init(struct iwl_priv *priv, struct ieee80211_sta *sta, u8 sta_i</div><div class='ctx'> 	struct iwl_station_priv *sta_priv;</div><div class='ctx'> 	struct iwl_lq_sta *lq_sta;</div><div class='ctx'> 	struct ieee80211_supported_band *sband;</div><div class='add'>+	unsigned long supp; /* must be unsigned long for for_each_set_bit */</div><div class='ctx'> </div><div class='ctx'> 	sta_priv = (struct iwl_station_priv *) sta-&gt;drv_priv;</div><div class='ctx'> 	lq_sta = &amp;sta_priv-&gt;lq_sta;</div><div class='hunk'>@@ -2855,8 +2857,15 @@ void iwl_rs_rate_init(struct iwl_priv *priv, struct ieee80211_sta *sta, u8 sta_i</div><div class='ctx'> 	lq_sta-&gt;max_rate_idx = -1;</div><div class='ctx'> 	lq_sta-&gt;missed_rate_counter = IWL_MISSED_RATE_MAX;</div><div class='ctx'> 	lq_sta-&gt;is_green = rs_use_green(sta);</div><div class='del'>-	lq_sta-&gt;active_legacy_rate = priv-&gt;active_rate &amp; ~(0x1000);</div><div class='del'>-	lq_sta-&gt;band = priv-&gt;band;</div><div class='add'>+	lq_sta-&gt;band = sband-&gt;band;</div><div class='add'>+	/*</div><div class='add'>+	 * active legacy rates as per supported rates bitmap</div><div class='add'>+	 */</div><div class='add'>+	supp = sta-&gt;supp_rates[sband-&gt;band];</div><div class='add'>+	lq_sta-&gt;active_legacy_rate = 0;</div><div class='add'>+	for_each_set_bit(i, &amp;supp, BITS_PER_LONG)</div><div class='add'>+		lq_sta-&gt;active_legacy_rate |= BIT(sband-&gt;bitrates[i].hw_value);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * active_siso_rate mask includes 9 MBits (bit 5), and CCK (bits 0-3),</div><div class='ctx'> 	 * supp_rates[] does not; shift to convert format, force 9 MBits off.</div><div class='hunk'>@@ -2884,15 +2893,15 @@ void iwl_rs_rate_init(struct iwl_priv *priv, struct ieee80211_sta *sta, u8 sta_i</div><div class='ctx'> </div><div class='ctx'> 	/* These values will be overridden later */</div><div class='ctx'> 	lq_sta-&gt;lq.general_params.single_stream_ant_msk =</div><div class='del'>-		first_antenna(hw_params(priv).valid_tx_ant);</div><div class='add'>+		first_antenna(priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> 	lq_sta-&gt;lq.general_params.dual_stream_ant_msk =</div><div class='del'>-		hw_params(priv).valid_tx_ant &amp;</div><div class='del'>-		~first_antenna(hw_params(priv).valid_tx_ant);</div><div class='add'>+		priv-&gt;hw_params.valid_tx_ant &amp;</div><div class='add'>+		~first_antenna(priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> 	if (!lq_sta-&gt;lq.general_params.dual_stream_ant_msk) {</div><div class='ctx'> 		lq_sta-&gt;lq.general_params.dual_stream_ant_msk = ANT_AB;</div><div class='del'>-	} else if (num_of_ant(hw_params(priv).valid_tx_ant) == 2) {</div><div class='add'>+	} else if (num_of_ant(priv-&gt;hw_params.valid_tx_ant) == 2) {</div><div class='ctx'> 		lq_sta-&gt;lq.general_params.dual_stream_ant_msk =</div><div class='del'>-			hw_params(priv).valid_tx_ant;</div><div class='add'>+			priv-&gt;hw_params.valid_tx_ant;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* as default allow aggregation for all tids */</div><div class='hunk'>@@ -2938,7 +2947,7 @@ static void rs_fill_link_cmd(struct iwl_priv *priv,</div><div class='ctx'> 	if (priv &amp;&amp; priv-&gt;bt_full_concurrent) {</div><div class='ctx'> 		/* 1x1 only */</div><div class='ctx'> 		tbl_type.ant_type =</div><div class='del'>-			first_antenna(hw_params(priv).valid_tx_ant);</div><div class='add'>+			first_antenna(priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* How many times should we repeat the initial rate? */</div><div class='hunk'>@@ -2970,7 +2979,7 @@ static void rs_fill_link_cmd(struct iwl_priv *priv,</div><div class='ctx'> 		if (priv-&gt;bt_full_concurrent)</div><div class='ctx'> 			valid_tx_ant = ANT_A;</div><div class='ctx'> 		else</div><div class='del'>-			valid_tx_ant = hw_params(priv).valid_tx_ant;</div><div class='add'>+			valid_tx_ant = priv-&gt;hw_params.valid_tx_ant;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Fill rest of rate table */</div><div class='hunk'>@@ -3004,7 +3013,7 @@ static void rs_fill_link_cmd(struct iwl_priv *priv,</div><div class='ctx'> 		if (priv &amp;&amp; priv-&gt;bt_full_concurrent) {</div><div class='ctx'> 			/* 1x1 only */</div><div class='ctx'> 			tbl_type.ant_type =</div><div class='del'>-			    first_antenna(hw_params(priv).valid_tx_ant);</div><div class='add'>+			    first_antenna(priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Indicate to uCode which entries might be MIMO.</div><div class='hunk'>@@ -3055,11 +3064,11 @@ static void rs_fill_link_cmd(struct iwl_priv *priv,</div><div class='ctx'> 	 * overwrite if needed, pass aggregation time limit</div><div class='ctx'> 	 * to uCode in uSec</div><div class='ctx'> 	 */</div><div class='del'>-	if (priv &amp;&amp; cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;bt_params-&gt;agg_time_limit &amp;&amp;</div><div class='add'>+	if (priv &amp;&amp; priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+	    priv-&gt;cfg-&gt;bt_params-&gt;agg_time_limit &amp;&amp;</div><div class='ctx'> 	    priv-&gt;bt_traffic_load &gt;= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)</div><div class='ctx'> 		lq_cmd-&gt;agg_params.agg_time_limit =</div><div class='del'>-			cpu_to_le16(cfg(priv)-&gt;bt_params-&gt;agg_time_limit);</div><div class='add'>+			cpu_to_le16(priv-&gt;cfg-&gt;bt_params-&gt;agg_time_limit);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *rs_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir)</div><div class='hunk'>@@ -3091,7 +3100,7 @@ static void rs_dbgfs_set_mcs(struct iwl_lq_sta *lq_sta,</div><div class='ctx'> 	u8 ant_sel_tx;</div><div class='ctx'> </div><div class='ctx'> 	priv = lq_sta-&gt;drv;</div><div class='del'>-	valid_tx_ant = hw_params(priv).valid_tx_ant;</div><div class='add'>+	valid_tx_ant = priv-&gt;hw_params.valid_tx_ant;</div><div class='ctx'> 	if (lq_sta-&gt;dbg_fixed_rate) {</div><div class='ctx'> 		ant_sel_tx =</div><div class='ctx'> 		  ((lq_sta-&gt;dbg_fixed_rate &amp; RATE_MCS_ANT_ABC_MSK)</div><div class='hunk'>@@ -3162,9 +3171,9 @@ static ssize_t rs_sta_dbgfs_scale_table_read(struct file *file,</div><div class='ctx'> 	desc += sprintf(buff+desc, "fixed rate 0x%X\n",</div><div class='ctx'> 			lq_sta-&gt;dbg_fixed_rate);</div><div class='ctx'> 	desc += sprintf(buff+desc, "valid_tx_ant %s%s%s\n",</div><div class='del'>-	    (hw_params(priv).valid_tx_ant &amp; ANT_A) ? "ANT_A," : "",</div><div class='del'>-	    (hw_params(priv).valid_tx_ant &amp; ANT_B) ? "ANT_B," : "",</div><div class='del'>-	    (hw_params(priv).valid_tx_ant &amp; ANT_C) ? "ANT_C" : "");</div><div class='add'>+	    (priv-&gt;hw_params.valid_tx_ant &amp; ANT_A) ? "ANT_A," : "",</div><div class='add'>+	    (priv-&gt;hw_params.valid_tx_ant &amp; ANT_B) ? "ANT_B," : "",</div><div class='add'>+	    (priv-&gt;hw_params.valid_tx_ant &amp; ANT_C) ? "ANT_C" : "");</div><div class='ctx'> 	desc += sprintf(buff+desc, "lq type %s\n",</div><div class='ctx'> 	   (is_legacy(tbl-&gt;lq_type)) ? "legacy" : "HT");</div><div class='ctx'> 	if (is_Ht(tbl-&gt;lq_type)) {</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.h b/drivers/net/wireless/iwlwifi/iwl-agn-rs.h<br/>index 203b1c13c491..82d02e1ae89f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-rs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn-rs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-rs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-rs.h</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include &lt;net/mac80211.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iwl-commands.h"</div><div class='add'>+#include "iwl-config.h"</div><div class='ctx'> </div><div class='ctx'> struct iwl_rate_info {</div><div class='ctx'> 	u8 plcp;	/* uCode API:  IWL_RATE_6M_PLCP, etc. */</div><div class='hunk'>@@ -174,32 +175,6 @@ enum {</div><div class='ctx'> 	IWL_RATE_11M_IEEE = 22,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define IWL_CCK_BASIC_RATES_MASK    \</div><div class='del'>-       (IWL_RATE_1M_MASK          | \</div><div class='del'>-	IWL_RATE_2M_MASK)</div><div class='del'>-</div><div class='del'>-#define IWL_CCK_RATES_MASK          \</div><div class='del'>-       (IWL_CCK_BASIC_RATES_MASK  | \</div><div class='del'>-	IWL_RATE_5M_MASK          | \</div><div class='del'>-	IWL_RATE_11M_MASK)</div><div class='del'>-</div><div class='del'>-#define IWL_OFDM_BASIC_RATES_MASK   \</div><div class='del'>-	(IWL_RATE_6M_MASK         | \</div><div class='del'>-	IWL_RATE_12M_MASK         | \</div><div class='del'>-	IWL_RATE_24M_MASK)</div><div class='del'>-</div><div class='del'>-#define IWL_OFDM_RATES_MASK         \</div><div class='del'>-       (IWL_OFDM_BASIC_RATES_MASK | \</div><div class='del'>-	IWL_RATE_9M_MASK          | \</div><div class='del'>-	IWL_RATE_18M_MASK         | \</div><div class='del'>-	IWL_RATE_36M_MASK         | \</div><div class='del'>-	IWL_RATE_48M_MASK         | \</div><div class='del'>-	IWL_RATE_54M_MASK)</div><div class='del'>-</div><div class='del'>-#define IWL_BASIC_RATES_MASK         \</div><div class='del'>-	(IWL_OFDM_BASIC_RATES_MASK | \</div><div class='del'>-	 IWL_CCK_BASIC_RATES_MASK)</div><div class='del'>-</div><div class='ctx'> #define IWL_RATES_MASK ((1 &lt;&lt; IWL_RATE_COUNT) - 1)</div><div class='ctx'> </div><div class='ctx'> #define IWL_INVALID_VALUE    -1</div><div class='hunk'>@@ -306,15 +281,6 @@ enum iwl_table_type {</div><div class='ctx'> #define is_a_band(tbl) ((tbl) == LQ_A)</div><div class='ctx'> #define is_g_and(tbl) ((tbl) == LQ_G)</div><div class='ctx'> </div><div class='del'>-#define	ANT_NONE	0x0</div><div class='del'>-#define	ANT_A		BIT(0)</div><div class='del'>-#define	ANT_B		BIT(1)</div><div class='del'>-#define	ANT_AB		(ANT_A | ANT_B)</div><div class='del'>-#define ANT_C		BIT(2)</div><div class='del'>-#define	ANT_AC		(ANT_A | ANT_C)</div><div class='del'>-#define ANT_BC		(ANT_B | ANT_C)</div><div class='del'>-#define ANT_ABC		(ANT_AB | ANT_C)</div><div class='del'>-</div><div class='ctx'> #define IWL_MAX_MCS_DISPLAY_SIZE	12</div><div class='ctx'> </div><div class='ctx'> struct iwl_rate_mcs_info {</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rx.c b/drivers/net/wireless/iwlwifi/iwl-agn-rx.c<br/>index f4b84d1596e3..403de96f9747 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-rx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn-rx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-rx.c</a></div><div class='hunk'>@@ -34,95 +34,91 @@</div><div class='ctx'> #include &lt;asm/unaligned.h&gt;</div><div class='ctx'> #include "iwl-eeprom.h"</div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-agn-calib.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='del'>-</div><div class='del'>-const char *get_cmd_string(u8 cmd)</div><div class='del'>-{</div><div class='del'>-	switch (cmd) {</div><div class='del'>-		IWL_CMD(REPLY_ALIVE);</div><div class='del'>-		IWL_CMD(REPLY_ERROR);</div><div class='del'>-		IWL_CMD(REPLY_ECHO);</div><div class='del'>-		IWL_CMD(REPLY_RXON);</div><div class='del'>-		IWL_CMD(REPLY_RXON_ASSOC);</div><div class='del'>-		IWL_CMD(REPLY_QOS_PARAM);</div><div class='del'>-		IWL_CMD(REPLY_RXON_TIMING);</div><div class='del'>-		IWL_CMD(REPLY_ADD_STA);</div><div class='del'>-		IWL_CMD(REPLY_REMOVE_STA);</div><div class='del'>-		IWL_CMD(REPLY_REMOVE_ALL_STA);</div><div class='del'>-		IWL_CMD(REPLY_TXFIFO_FLUSH);</div><div class='del'>-		IWL_CMD(REPLY_WEPKEY);</div><div class='del'>-		IWL_CMD(REPLY_TX);</div><div class='del'>-		IWL_CMD(REPLY_LEDS_CMD);</div><div class='del'>-		IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);</div><div class='del'>-		IWL_CMD(COEX_PRIORITY_TABLE_CMD);</div><div class='del'>-		IWL_CMD(COEX_MEDIUM_NOTIFICATION);</div><div class='del'>-		IWL_CMD(COEX_EVENT_CMD);</div><div class='del'>-		IWL_CMD(REPLY_QUIET_CMD);</div><div class='del'>-		IWL_CMD(REPLY_CHANNEL_SWITCH);</div><div class='del'>-		IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);</div><div class='del'>-		IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);</div><div class='del'>-		IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);</div><div class='del'>-		IWL_CMD(POWER_TABLE_CMD);</div><div class='del'>-		IWL_CMD(PM_SLEEP_NOTIFICATION);</div><div class='del'>-		IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);</div><div class='del'>-		IWL_CMD(REPLY_SCAN_CMD);</div><div class='del'>-		IWL_CMD(REPLY_SCAN_ABORT_CMD);</div><div class='del'>-		IWL_CMD(SCAN_START_NOTIFICATION);</div><div class='del'>-		IWL_CMD(SCAN_RESULTS_NOTIFICATION);</div><div class='del'>-		IWL_CMD(SCAN_COMPLETE_NOTIFICATION);</div><div class='del'>-		IWL_CMD(BEACON_NOTIFICATION);</div><div class='del'>-		IWL_CMD(REPLY_TX_BEACON);</div><div class='del'>-		IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);</div><div class='del'>-		IWL_CMD(QUIET_NOTIFICATION);</div><div class='del'>-		IWL_CMD(REPLY_TX_PWR_TABLE_CMD);</div><div class='del'>-		IWL_CMD(MEASURE_ABORT_NOTIFICATION);</div><div class='del'>-		IWL_CMD(REPLY_BT_CONFIG);</div><div class='del'>-		IWL_CMD(REPLY_STATISTICS_CMD);</div><div class='del'>-		IWL_CMD(STATISTICS_NOTIFICATION);</div><div class='del'>-		IWL_CMD(REPLY_CARD_STATE_CMD);</div><div class='del'>-		IWL_CMD(CARD_STATE_NOTIFICATION);</div><div class='del'>-		IWL_CMD(MISSED_BEACONS_NOTIFICATION);</div><div class='del'>-		IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);</div><div class='del'>-		IWL_CMD(SENSITIVITY_CMD);</div><div class='del'>-		IWL_CMD(REPLY_PHY_CALIBRATION_CMD);</div><div class='del'>-		IWL_CMD(REPLY_RX_PHY_CMD);</div><div class='del'>-		IWL_CMD(REPLY_RX_MPDU_CMD);</div><div class='del'>-		IWL_CMD(REPLY_RX);</div><div class='del'>-		IWL_CMD(REPLY_COMPRESSED_BA);</div><div class='del'>-		IWL_CMD(CALIBRATION_CFG_CMD);</div><div class='del'>-		IWL_CMD(CALIBRATION_RES_NOTIFICATION);</div><div class='del'>-		IWL_CMD(CALIBRATION_COMPLETE_NOTIFICATION);</div><div class='del'>-		IWL_CMD(REPLY_TX_POWER_DBM_CMD);</div><div class='del'>-		IWL_CMD(TEMPERATURE_NOTIFICATION);</div><div class='del'>-		IWL_CMD(TX_ANT_CONFIGURATION_CMD);</div><div class='del'>-		IWL_CMD(REPLY_BT_COEX_PROFILE_NOTIF);</div><div class='del'>-		IWL_CMD(REPLY_BT_COEX_PRIO_TABLE);</div><div class='del'>-		IWL_CMD(REPLY_BT_COEX_PROT_ENV);</div><div class='del'>-		IWL_CMD(REPLY_WIPAN_PARAMS);</div><div class='del'>-		IWL_CMD(REPLY_WIPAN_RXON);</div><div class='del'>-		IWL_CMD(REPLY_WIPAN_RXON_TIMING);</div><div class='del'>-		IWL_CMD(REPLY_WIPAN_RXON_ASSOC);</div><div class='del'>-		IWL_CMD(REPLY_WIPAN_QOS_PARAM);</div><div class='del'>-		IWL_CMD(REPLY_WIPAN_WEPKEY);</div><div class='del'>-		IWL_CMD(REPLY_WIPAN_P2P_CHANNEL_SWITCH);</div><div class='del'>-		IWL_CMD(REPLY_WIPAN_NOA_NOTIFICATION);</div><div class='del'>-		IWL_CMD(REPLY_WIPAN_DEACTIVATION_COMPLETE);</div><div class='del'>-		IWL_CMD(REPLY_WOWLAN_PATTERNS);</div><div class='del'>-		IWL_CMD(REPLY_WOWLAN_WAKEUP_FILTER);</div><div class='del'>-		IWL_CMD(REPLY_WOWLAN_TSC_RSC_PARAMS);</div><div class='del'>-		IWL_CMD(REPLY_WOWLAN_TKIP_PARAMS);</div><div class='del'>-		IWL_CMD(REPLY_WOWLAN_KEK_KCK_MATERIAL);</div><div class='del'>-		IWL_CMD(REPLY_WOWLAN_GET_STATUS);</div><div class='del'>-		IWL_CMD(REPLY_D3_CONFIG);</div><div class='del'>-	default:</div><div class='del'>-		return "UNKNOWN";</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+#include "iwl-modparams.h"</div><div class='add'>+</div><div class='add'>+#define IWL_CMD_ENTRY(x) [x] = #x</div><div class='add'>+</div><div class='add'>+const char *iwl_dvm_cmd_strings[REPLY_MAX] = {</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_ALIVE),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_ERROR),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_ECHO),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_RXON),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_RXON_ASSOC),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_QOS_PARAM),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_RXON_TIMING),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_ADD_STA),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_REMOVE_STA),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_REMOVE_ALL_STA),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_TXFIFO_FLUSH),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WEPKEY),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_TX),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_LEDS_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_TX_LINK_QUALITY_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(COEX_PRIORITY_TABLE_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(COEX_MEDIUM_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(COEX_EVENT_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_QUIET_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_CHANNEL_SWITCH),</div><div class='add'>+	IWL_CMD_ENTRY(CHANNEL_SWITCH_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_SPECTRUM_MEASUREMENT_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(SPECTRUM_MEASURE_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(POWER_TABLE_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(PM_SLEEP_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(PM_DEBUG_STATISTIC_NOTIFIC),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_SCAN_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_SCAN_ABORT_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(SCAN_START_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(SCAN_RESULTS_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(SCAN_COMPLETE_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(BEACON_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_TX_BEACON),</div><div class='add'>+	IWL_CMD_ENTRY(WHO_IS_AWAKE_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(QUIET_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_TX_PWR_TABLE_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(MEASURE_ABORT_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_BT_CONFIG),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_STATISTICS_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(STATISTICS_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_CARD_STATE_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(CARD_STATE_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(MISSED_BEACONS_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_CT_KILL_CONFIG_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(SENSITIVITY_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_PHY_CALIBRATION_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_RX_PHY_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_RX_MPDU_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_RX),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_COMPRESSED_BA),</div><div class='add'>+	IWL_CMD_ENTRY(CALIBRATION_CFG_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(CALIBRATION_RES_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(CALIBRATION_COMPLETE_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_TX_POWER_DBM_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(TEMPERATURE_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(TX_ANT_CONFIGURATION_CMD),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_BT_COEX_PROFILE_NOTIF),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_BT_COEX_PRIO_TABLE),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_BT_COEX_PROT_ENV),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WIPAN_PARAMS),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WIPAN_RXON),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WIPAN_RXON_TIMING),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WIPAN_RXON_ASSOC),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WIPAN_QOS_PARAM),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WIPAN_WEPKEY),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WIPAN_P2P_CHANNEL_SWITCH),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WIPAN_NOA_NOTIFICATION),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WIPAN_DEACTIVATION_COMPLETE),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WOWLAN_PATTERNS),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WOWLAN_WAKEUP_FILTER),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WOWLAN_TSC_RSC_PARAMS),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WOWLAN_TKIP_PARAMS),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WOWLAN_KEK_KCK_MATERIAL),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_WOWLAN_GET_STATUS),</div><div class='add'>+	IWL_CMD_ENTRY(REPLY_D3_CONFIG),</div><div class='add'>+};</div><div class='add'>+#undef IWL_CMD_ENTRY</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='ctx'>  *</div><div class='hunk'>@@ -137,10 +133,9 @@ static int iwlagn_rx_reply_error(struct iwl_priv *priv,</div><div class='ctx'> 	struct iwl_rx_packet *pkt = rxb_addr(rxb);</div><div class='ctx'> 	struct iwl_error_resp *err_resp = (void *)pkt-&gt;data;</div><div class='ctx'> </div><div class='del'>-	IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "</div><div class='add'>+	IWL_ERR(priv, "Error Reply type 0x%08X cmd REPLY_ERROR (0x%02X) "</div><div class='ctx'> 		"seq 0x%04X ser 0x%08X\n",</div><div class='ctx'> 		le32_to_cpu(err_resp-&gt;error_type),</div><div class='del'>-		get_cmd_string(err_resp-&gt;cmd_id),</div><div class='ctx'> 		err_resp-&gt;cmd_id,</div><div class='ctx'> 		le16_to_cpu(err_resp-&gt;bad_cmd_seq_num),</div><div class='ctx'> 		le32_to_cpu(err_resp-&gt;error_info));</div><div class='hunk'>@@ -216,8 +211,7 @@ static int iwlagn_rx_pm_debug_statistics_notif(struct iwl_priv *priv,</div><div class='ctx'> 	u32 __maybe_unused len =</div><div class='ctx'> 		le32_to_cpu(pkt-&gt;len_n_flags) &amp; FH_RSCSR_FRAME_SIZE_MSK;</div><div class='ctx'> 	IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "</div><div class='del'>-			"notification for %s:\n", len,</div><div class='del'>-			get_cmd_string(pkt-&gt;hdr.cmd));</div><div class='add'>+			"notification for PM_DEBUG_STATISTIC_NOTIFIC:\n", len);</div><div class='ctx'> 	iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt-&gt;data, len);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -246,69 +240,6 @@ static int iwlagn_rx_beacon_notif(struct iwl_priv *priv,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */</div><div class='del'>-#define ACK_CNT_RATIO (50)</div><div class='del'>-#define BA_TIMEOUT_CNT (5)</div><div class='del'>-#define BA_TIMEOUT_MAX (16)</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.</div><div class='del'>- *</div><div class='del'>- * When the ACK count ratio is low and aggregated BA timeout retries exceeding</div><div class='del'>- * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal</div><div class='del'>- * operation state.</div><div class='del'>- */</div><div class='del'>-static bool iwlagn_good_ack_health(struct iwl_priv *priv,</div><div class='del'>-				struct statistics_tx *cur)</div><div class='del'>-{</div><div class='del'>-	int actual_delta, expected_delta, ba_timeout_delta;</div><div class='del'>-	struct statistics_tx *old;</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;agg_tids_count)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;priv-&gt;statistics.lock);</div><div class='del'>-</div><div class='del'>-	old = &amp;priv-&gt;statistics.tx;</div><div class='del'>-</div><div class='del'>-	actual_delta = le32_to_cpu(cur-&gt;actual_ack_cnt) -</div><div class='del'>-		       le32_to_cpu(old-&gt;actual_ack_cnt);</div><div class='del'>-	expected_delta = le32_to_cpu(cur-&gt;expected_ack_cnt) -</div><div class='del'>-			 le32_to_cpu(old-&gt;expected_ack_cnt);</div><div class='del'>-</div><div class='del'>-	/* Values should not be negative, but we do not trust the firmware */</div><div class='del'>-	if (actual_delta &lt;= 0 || expected_delta &lt;= 0)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	ba_timeout_delta = le32_to_cpu(cur-&gt;agg.ba_timeout) -</div><div class='del'>-			   le32_to_cpu(old-&gt;agg.ba_timeout);</div><div class='del'>-</div><div class='del'>-	if ((actual_delta * 100 / expected_delta) &lt; ACK_CNT_RATIO &amp;&amp;</div><div class='del'>-	    ba_timeout_delta &gt; BA_TIMEOUT_CNT) {</div><div class='del'>-		IWL_DEBUG_RADIO(priv,</div><div class='del'>-			"deltas: actual %d expected %d ba_timeout %d\n",</div><div class='del'>-			actual_delta, expected_delta, ba_timeout_delta);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_IWLWIFI_DEBUGFS</div><div class='del'>-		/*</div><div class='del'>-		 * This is ifdef'ed on DEBUGFS because otherwise the</div><div class='del'>-		 * statistics aren't available. If DEBUGFS is set but</div><div class='del'>-		 * DEBUG is not, these will just compile out.</div><div class='del'>-		 */</div><div class='del'>-		IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta %d\n",</div><div class='del'>-				priv-&gt;delta_stats.tx.rx_detected_cnt);</div><div class='del'>-		IWL_DEBUG_RADIO(priv,</div><div class='del'>-				"ack_or_ba_timeout_collision delta %d\n",</div><div class='del'>-				priv-&gt;delta_stats.tx.ack_or_ba_timeout_collision);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		if (ba_timeout_delta &gt;= BA_TIMEOUT_MAX)</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * iwl_good_plcp_health - checks for plcp error.</div><div class='ctx'>  *</div><div class='hunk'>@@ -347,6 +278,45 @@ static bool iwlagn_good_plcp_health(struct iwl_priv *priv,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int iwl_force_rf_reset(struct iwl_priv *priv, bool external)</div><div class='add'>+{</div><div class='add'>+	struct iwl_rf_reset *rf_reset;</div><div class='add'>+</div><div class='add'>+	if (test_bit(STATUS_EXIT_PENDING, &amp;priv-&gt;status))</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	if (!iwl_is_any_associated(priv)) {</div><div class='add'>+		IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");</div><div class='add'>+		return -ENOLINK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rf_reset = &amp;priv-&gt;rf_reset;</div><div class='add'>+	rf_reset-&gt;reset_request_count++;</div><div class='add'>+	if (!external &amp;&amp; rf_reset-&gt;last_reset_jiffies &amp;&amp;</div><div class='add'>+	    time_after(rf_reset-&gt;last_reset_jiffies +</div><div class='add'>+		       IWL_DELAY_NEXT_FORCE_RF_RESET, jiffies)) {</div><div class='add'>+		IWL_DEBUG_INFO(priv, "RF reset rejected\n");</div><div class='add'>+		rf_reset-&gt;reset_reject_count++;</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+	rf_reset-&gt;reset_success_count++;</div><div class='add'>+	rf_reset-&gt;last_reset_jiffies = jiffies;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * There is no easy and better way to force reset the radio,</div><div class='add'>+	 * the only known method is switching channel which will force to</div><div class='add'>+	 * reset and tune the radio.</div><div class='add'>+	 * Use internal short scan (single channel) operation to should</div><div class='add'>+	 * achieve this objective.</div><div class='add'>+	 * Driver should reset the radio when number of consecutive missed</div><div class='add'>+	 * beacon, or any other uCode error condition detected.</div><div class='add'>+	 */</div><div class='add'>+	IWL_DEBUG_INFO(priv, "perform radio reset.\n");</div><div class='add'>+	iwl_internal_short_hw_scan(priv);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> static void iwlagn_recover_from_statistics(struct iwl_priv *priv,</div><div class='ctx'> 				struct statistics_rx_phy *cur_ofdm,</div><div class='ctx'> 				struct statistics_rx_ht_phy *cur_ofdm_ht,</div><div class='hunk'>@@ -368,15 +338,9 @@ static void iwlagn_recover_from_statistics(struct iwl_priv *priv,</div><div class='ctx'> 	if (msecs &lt; 99)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (iwlagn_mod_params.ack_check &amp;&amp; !iwlagn_good_ack_health(priv, tx)) {</div><div class='del'>-		IWL_ERR(priv, "low ack count detected, restart firmware\n");</div><div class='del'>-		if (!iwl_force_reset(priv, IWL_FW_RESET, false))</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (iwlagn_mod_params.plcp_check &amp;&amp;</div><div class='add'>+	if (iwlwifi_mod_params.plcp_check &amp;&amp;</div><div class='ctx'> 	    !iwlagn_good_plcp_health(priv, cur_ofdm, cur_ofdm_ht, msecs))</div><div class='del'>-		iwl_force_reset(priv, IWL_RF_RESET, false);</div><div class='add'>+		iwl_force_rf_reset(priv, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Calculate noise level, based on measurements during network silence just</div><div class='hunk'>@@ -589,8 +553,8 @@ static int iwlagn_rx_statistics(struct iwl_priv *priv,</div><div class='ctx'> 		iwlagn_rx_calc_noise(priv);</div><div class='ctx'> 		queue_work(priv-&gt;workqueue, &amp;priv-&gt;run_time_calib_work);</div><div class='ctx'> 	}</div><div class='del'>-	if (cfg(priv)-&gt;lib-&gt;temperature &amp;&amp; change)</div><div class='del'>-		cfg(priv)-&gt;lib-&gt;temperature(priv);</div><div class='add'>+	if (priv-&gt;lib-&gt;temperature &amp;&amp; change)</div><div class='add'>+		priv-&gt;lib-&gt;temperature(priv);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;priv-&gt;statistics.lock);</div><div class='ctx'> </div><div class='hunk'>@@ -639,16 +603,16 @@ static int iwlagn_rx_card_state_notif(struct iwl_priv *priv,</div><div class='ctx'> 	if (flags &amp; (SW_CARD_DISABLED | HW_CARD_DISABLED |</div><div class='ctx'> 		     CT_CARD_DISABLED)) {</div><div class='ctx'> </div><div class='del'>-		iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_SET,</div><div class='add'>+		iwl_write32(priv-&gt;trans, CSR_UCODE_DRV_GP1_SET,</div><div class='ctx'> 			    CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);</div><div class='ctx'> </div><div class='del'>-		iwl_write_direct32(trans(priv), HBUS_TARG_MBX_C,</div><div class='add'>+		iwl_write_direct32(priv-&gt;trans, HBUS_TARG_MBX_C,</div><div class='ctx'> 					HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);</div><div class='ctx'> </div><div class='ctx'> 		if (!(flags &amp; RXON_CARD_DISABLED)) {</div><div class='del'>-			iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_CLR,</div><div class='add'>+			iwl_write32(priv-&gt;trans, CSR_UCODE_DRV_GP1_CLR,</div><div class='ctx'> 				    CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);</div><div class='del'>-			iwl_write_direct32(trans(priv), HBUS_TARG_MBX_C,</div><div class='add'>+			iwl_write_direct32(priv-&gt;trans, HBUS_TARG_MBX_C,</div><div class='ctx'> 					HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (flags &amp; CT_CARD_DISABLED)</div><div class='hunk'>@@ -671,7 +635,7 @@ static int iwlagn_rx_card_state_notif(struct iwl_priv *priv,</div><div class='ctx'> 		wiphy_rfkill_set_hw_state(priv-&gt;hw-&gt;wiphy,</div><div class='ctx'> 			test_bit(STATUS_RF_KILL_HW, &amp;priv-&gt;status));</div><div class='ctx'> 	else</div><div class='del'>-		wake_up(&amp;trans(priv)-&gt;wait_command_queue);</div><div class='add'>+		wake_up(&amp;priv-&gt;trans-&gt;wait_command_queue);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -773,8 +737,7 @@ static void iwlagn_pass_packet_to_mac80211(struct iwl_priv *priv,</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	__le16 fc = hdr-&gt;frame_control;</div><div class='ctx'> 	struct iwl_rxon_context *ctx;</div><div class='del'>-	struct page *p;</div><div class='del'>-	int offset;</div><div class='add'>+	unsigned int hdrlen, fraglen;</div><div class='ctx'> </div><div class='ctx'> 	/* We only process data packets if the interface is open */</div><div class='ctx'> 	if (unlikely(!priv-&gt;is_open)) {</div><div class='hunk'>@@ -784,21 +747,34 @@ static void iwlagn_pass_packet_to_mac80211(struct iwl_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* In case of HW accelerated crypto and bad decryption, drop */</div><div class='del'>-	if (!iwlagn_mod_params.sw_crypto &amp;&amp;</div><div class='add'>+	if (!iwlwifi_mod_params.sw_crypto &amp;&amp;</div><div class='ctx'> 	    iwlagn_set_decrypted_flag(priv, hdr, ampdu_status, stats))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	skb = dev_alloc_skb(128);</div><div class='add'>+	/* Dont use dev_alloc_skb(), we'll have enough headroom once</div><div class='add'>+	 * ieee80211_hdr pulled.</div><div class='add'>+	 */</div><div class='add'>+	skb = alloc_skb(128, GFP_ATOMIC);</div><div class='ctx'> 	if (!skb) {</div><div class='del'>-		IWL_ERR(priv, "dev_alloc_skb failed\n");</div><div class='add'>+		IWL_ERR(priv, "alloc_skb failed\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+	/* If frame is small enough to fit in skb-&gt;head, pull it completely.</div><div class='add'>+	 * If not, only pull ieee80211_hdr so that splice() or TCP coalesce</div><div class='add'>+	 * are more efficient.</div><div class='add'>+	 */</div><div class='add'>+	hdrlen = (len &lt;= skb_tailroom(skb)) ? len : sizeof(*hdr);</div><div class='add'>+</div><div class='add'>+	memcpy(skb_put(skb, hdrlen), hdr, hdrlen);</div><div class='add'>+	fraglen = len - hdrlen;</div><div class='ctx'> </div><div class='del'>-	offset = (void *)hdr - rxb_addr(rxb);</div><div class='del'>-	p = rxb_steal_page(rxb);</div><div class='del'>-	skb_add_rx_frag(skb, 0, p, offset, len, len);</div><div class='add'>+	if (fraglen) {</div><div class='add'>+		int offset = (void *)hdr + hdrlen -</div><div class='add'>+			     rxb_addr(rxb) + rxb_offset(rxb);</div><div class='ctx'> </div><div class='del'>-	iwl_update_stats(priv, false, fc, len);</div><div class='add'>+		skb_add_rx_frag(skb, 0, rxb_steal_page(rxb), offset,</div><div class='add'>+				fraglen, rxb-&gt;truesize);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	* Wake any queues that were stopped due to a passive channel tx</div><div class='hunk'>@@ -809,8 +785,8 @@ static void iwlagn_pass_packet_to_mac80211(struct iwl_priv *priv,</div><div class='ctx'> 	*/</div><div class='ctx'> 	if (unlikely(ieee80211_is_beacon(fc) &amp;&amp; priv-&gt;passive_no_rx)) {</div><div class='ctx'> 		for_each_context(priv, ctx) {</div><div class='del'>-			if (compare_ether_addr(hdr-&gt;addr3,</div><div class='del'>-					       ctx-&gt;active.bssid_addr))</div><div class='add'>+			if (!ether_addr_equal(hdr-&gt;addr3,</div><div class='add'>+					      ctx-&gt;active.bssid_addr))</div><div class='ctx'> 				continue;</div><div class='ctx'> 			iwlagn_lift_passive_no_rx(priv);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -970,7 +946,7 @@ static int iwlagn_rx_reply_rx(struct iwl_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((unlikely(phy_res-&gt;cfg_phy_cnt &gt; 20))) {</div><div class='del'>-		IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",</div><div class='add'>+		IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d\n",</div><div class='ctx'> 				phy_res-&gt;cfg_phy_cnt);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1005,7 +981,6 @@ static int iwlagn_rx_reply_rx(struct iwl_priv *priv,</div><div class='ctx'> 	/* Find max signal strength (dBm) among 3 antenna/receiver chains */</div><div class='ctx'> 	rx_status.signal = iwlagn_calc_rssi(priv, phy_res);</div><div class='ctx'> </div><div class='del'>-	iwl_dbg_log_rx_data_frame(priv, len, header);</div><div class='ctx'> 	IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, TSF %llu\n",</div><div class='ctx'> 		rx_status.signal, (unsigned long long)rx_status.mactime);</div><div class='ctx'> </div><div class='hunk'>@@ -1134,16 +1109,13 @@ void iwl_setup_rx_handlers(struct iwl_priv *priv)</div><div class='ctx'> 	handlers[REPLY_COMPRESSED_BA]		=</div><div class='ctx'> 		iwlagn_rx_reply_compressed_ba;</div><div class='ctx'> </div><div class='del'>-	/* init calibration handlers */</div><div class='del'>-	priv-&gt;rx_handlers[CALIBRATION_RES_NOTIFICATION] =</div><div class='del'>-					iwlagn_rx_calib_result;</div><div class='ctx'> 	priv-&gt;rx_handlers[REPLY_TX] = iwlagn_rx_reply_tx;</div><div class='ctx'> </div><div class='ctx'> 	/* set up notification wait support */</div><div class='ctx'> 	iwl_notification_wait_init(&amp;priv-&gt;notif_wait);</div><div class='ctx'> </div><div class='ctx'> 	/* Set up BT Rx handlers */</div><div class='del'>-	if (cfg(priv)-&gt;bt_params)</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params)</div><div class='ctx'> 		iwlagn_bt_rx_handler_setup(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1185,9 +1157,9 @@ int iwl_rx_dispatch(struct iwl_op_mode *op_mode, struct iwl_rx_cmd_buffer *rxb,</div><div class='ctx'> 			err = priv-&gt;rx_handlers[pkt-&gt;hdr.cmd] (priv, rxb, cmd);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* No handling needed */</div><div class='del'>-			IWL_DEBUG_RX(priv,</div><div class='del'>-				"No handler needed for %s, 0x%02x\n",</div><div class='del'>-				get_cmd_string(pkt-&gt;hdr.cmd), pkt-&gt;hdr.cmd);</div><div class='add'>+			IWL_DEBUG_RX(priv, "No handler needed for %s, 0x%02x\n",</div><div class='add'>+				     iwl_dvm_get_cmd_string(pkt-&gt;hdr.cmd),</div><div class='add'>+				     pkt-&gt;hdr.cmd);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return err;</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c<br/>index 2e1a31797a9e..0a3aa7c83003 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn-rxon.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-rxon.c</a></div><div class='hunk'>@@ -24,12 +24,83 @@</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include "iwl-dev.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-agn-calib.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='add'>+#include "iwl-modparams.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * initialize rxon structure with default values from eeprom</div><div class='add'>+ */</div><div class='add'>+void iwl_connection_init_rx_config(struct iwl_priv *priv,</div><div class='add'>+				   struct iwl_rxon_context *ctx)</div><div class='add'>+{</div><div class='add'>+	const struct iwl_channel_info *ch_info;</div><div class='add'>+</div><div class='add'>+	memset(&amp;ctx-&gt;staging, 0, sizeof(ctx-&gt;staging));</div><div class='add'>+</div><div class='add'>+	if (!ctx-&gt;vif) {</div><div class='add'>+		ctx-&gt;staging.dev_type = ctx-&gt;unused_devtype;</div><div class='add'>+	} else</div><div class='add'>+	switch (ctx-&gt;vif-&gt;type) {</div><div class='add'>+	case NL80211_IFTYPE_AP:</div><div class='add'>+		ctx-&gt;staging.dev_type = ctx-&gt;ap_devtype;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case NL80211_IFTYPE_STATION:</div><div class='add'>+		ctx-&gt;staging.dev_type = ctx-&gt;station_devtype;</div><div class='add'>+		ctx-&gt;staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case NL80211_IFTYPE_ADHOC:</div><div class='add'>+		ctx-&gt;staging.dev_type = ctx-&gt;ibss_devtype;</div><div class='add'>+		ctx-&gt;staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;</div><div class='add'>+		ctx-&gt;staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |</div><div class='add'>+						  RXON_FILTER_ACCEPT_GRP_MSK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case NL80211_IFTYPE_MONITOR:</div><div class='add'>+		ctx-&gt;staging.dev_type = RXON_DEV_TYPE_SNIFFER;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		IWL_ERR(priv, "Unsupported interface type %d\n",</div><div class='add'>+			ctx-&gt;vif-&gt;type);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#if 0</div><div class='add'>+	/* TODO:  Figure out when short_preamble would be set and cache from</div><div class='add'>+	 * that */</div><div class='add'>+	if (!hw_to_local(priv-&gt;hw)-&gt;short_preamble)</div><div class='add'>+		ctx-&gt;staging.flags &amp;= ~RXON_FLG_SHORT_PREAMBLE_MSK;</div><div class='add'>+	else</div><div class='add'>+		ctx-&gt;staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	ch_info = iwl_get_channel_info(priv, priv-&gt;band,</div><div class='add'>+				       le16_to_cpu(ctx-&gt;active.channel));</div><div class='add'>+</div><div class='add'>+	if (!ch_info)</div><div class='add'>+		ch_info = &amp;priv-&gt;channel_info[0];</div><div class='add'>+</div><div class='add'>+	ctx-&gt;staging.channel = cpu_to_le16(ch_info-&gt;channel);</div><div class='add'>+	priv-&gt;band = ch_info-&gt;band;</div><div class='add'>+</div><div class='add'>+	iwl_set_flags_for_band(priv, ctx, priv-&gt;band, ctx-&gt;vif);</div><div class='add'>+</div><div class='add'>+	/* clear both MIX and PURE40 mode flag */</div><div class='add'>+	ctx-&gt;staging.flags &amp;= ~(RXON_FLG_CHANNEL_MODE_MIXED |</div><div class='add'>+					RXON_FLG_CHANNEL_MODE_PURE_40);</div><div class='add'>+	if (ctx-&gt;vif)</div><div class='add'>+		memcpy(ctx-&gt;staging.node_addr, ctx-&gt;vif-&gt;addr, ETH_ALEN);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;staging.ofdm_ht_single_stream_basic_rates = 0xff;</div><div class='add'>+	ctx-&gt;staging.ofdm_ht_dual_stream_basic_rates = 0xff;</div><div class='add'>+	ctx-&gt;staging.ofdm_ht_triple_stream_basic_rates = 0xff;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int iwlagn_disable_bss(struct iwl_priv *priv,</div><div class='ctx'> 			      struct iwl_rxon_context *ctx,</div><div class='hunk'>@@ -59,9 +130,12 @@ static int iwlagn_disable_pan(struct iwl_priv *priv,</div><div class='ctx'> 	__le32 old_filter = send-&gt;filter_flags;</div><div class='ctx'> 	u8 old_dev_type = send-&gt;dev_type;</div><div class='ctx'> 	int ret;</div><div class='add'>+	static const u8 deactivate_cmd[] = {</div><div class='add'>+		REPLY_WIPAN_DEACTIVATION_COMPLETE</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	iwl_init_notification_wait(&amp;priv-&gt;notif_wait, &amp;disable_wait,</div><div class='del'>-				   REPLY_WIPAN_DEACTIVATION_COMPLETE,</div><div class='add'>+				   deactivate_cmd, ARRAY_SIZE(deactivate_cmd),</div><div class='ctx'> 				   NULL, NULL);</div><div class='ctx'> </div><div class='ctx'> 	send-&gt;filter_flags &amp;= ~RXON_FILTER_ASSOC_MSK;</div><div class='hunk'>@@ -101,8 +175,7 @@ static int iwlagn_disconn_pan(struct iwl_priv *priv,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwlagn_update_qos(struct iwl_priv *priv,</div><div class='del'>-			      struct iwl_rxon_context *ctx)</div><div class='add'>+void iwlagn_update_qos(struct iwl_priv *priv, struct iwl_rxon_context *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -129,8 +202,8 @@ static void iwlagn_update_qos(struct iwl_priv *priv,</div><div class='ctx'> 		IWL_DEBUG_QUIET_RFKILL(priv, "Failed to update QoS\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwlagn_update_beacon(struct iwl_priv *priv,</div><div class='del'>-				struct ieee80211_vif *vif)</div><div class='add'>+int iwlagn_update_beacon(struct iwl_priv *priv,</div><div class='add'>+			 struct ieee80211_vif *vif)</div><div class='ctx'> {</div><div class='ctx'> 	lockdep_assert_held(&amp;priv-&gt;mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -186,6 +259,109 @@ static int iwlagn_send_rxon_assoc(struct iwl_priv *priv,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)</div><div class='add'>+{</div><div class='add'>+	u16 new_val;</div><div class='add'>+	u16 beacon_factor;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If mac80211 hasn't given us a beacon interval, program</div><div class='add'>+	 * the default into the device (not checking this here</div><div class='add'>+	 * would cause the adjustment below to return the maximum</div><div class='add'>+	 * value, which may break PAN.)</div><div class='add'>+	 */</div><div class='add'>+	if (!beacon_val)</div><div class='add'>+		return DEFAULT_BEACON_INTERVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the beacon interval we obtained from the peer</div><div class='add'>+	 * is too large, we'll have to wake up more often</div><div class='add'>+	 * (and in IBSS case, we'll beacon too much)</div><div class='add'>+	 *</div><div class='add'>+	 * For example, if max_beacon_val is 4096, and the</div><div class='add'>+	 * requested beacon interval is 7000, we'll have to</div><div class='add'>+	 * use 3500 to be able to wake up on the beacons.</div><div class='add'>+	 *</div><div class='add'>+	 * This could badly influence beacon detection stats.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;</div><div class='add'>+	new_val = beacon_val / beacon_factor;</div><div class='add'>+</div><div class='add'>+	if (!new_val)</div><div class='add'>+		new_val = max_beacon_val;</div><div class='add'>+</div><div class='add'>+	return new_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iwl_send_rxon_timing(struct iwl_priv *priv,</div><div class='add'>+				struct iwl_rxon_context *ctx)</div><div class='add'>+{</div><div class='add'>+	u64 tsf;</div><div class='add'>+	s32 interval_tm, rem;</div><div class='add'>+	struct ieee80211_conf *conf = NULL;</div><div class='add'>+	u16 beacon_int;</div><div class='add'>+	struct ieee80211_vif *vif = ctx-&gt;vif;</div><div class='add'>+</div><div class='add'>+	conf = &amp;priv-&gt;hw-&gt;conf;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;priv-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	memset(&amp;ctx-&gt;timing, 0, sizeof(struct iwl_rxon_time_cmd));</div><div class='add'>+</div><div class='add'>+	ctx-&gt;timing.timestamp = cpu_to_le64(priv-&gt;timestamp);</div><div class='add'>+	ctx-&gt;timing.listen_interval = cpu_to_le16(conf-&gt;listen_interval);</div><div class='add'>+</div><div class='add'>+	beacon_int = vif ? vif-&gt;bss_conf.beacon_int : 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: For IBSS we need to get atim_window from mac80211,</div><div class='add'>+	 *	 for now just always use 0</div><div class='add'>+	 */</div><div class='add'>+	ctx-&gt;timing.atim_window = 0;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;ctxid == IWL_RXON_CTX_PAN &amp;&amp;</div><div class='add'>+	    (!ctx-&gt;vif || ctx-&gt;vif-&gt;type != NL80211_IFTYPE_STATION) &amp;&amp;</div><div class='add'>+	    iwl_is_associated(priv, IWL_RXON_CTX_BSS) &amp;&amp;</div><div class='add'>+	    priv-&gt;contexts[IWL_RXON_CTX_BSS].vif &amp;&amp;</div><div class='add'>+	    priv-&gt;contexts[IWL_RXON_CTX_BSS].vif-&gt;bss_conf.beacon_int) {</div><div class='add'>+		ctx-&gt;timing.beacon_interval =</div><div class='add'>+			priv-&gt;contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;</div><div class='add'>+		beacon_int = le16_to_cpu(ctx-&gt;timing.beacon_interval);</div><div class='add'>+	} else if (ctx-&gt;ctxid == IWL_RXON_CTX_BSS &amp;&amp;</div><div class='add'>+		   iwl_is_associated(priv, IWL_RXON_CTX_PAN) &amp;&amp;</div><div class='add'>+		   priv-&gt;contexts[IWL_RXON_CTX_PAN].vif &amp;&amp;</div><div class='add'>+		   priv-&gt;contexts[IWL_RXON_CTX_PAN].vif-&gt;bss_conf.beacon_int &amp;&amp;</div><div class='add'>+		   (!iwl_is_associated_ctx(ctx) || !ctx-&gt;vif ||</div><div class='add'>+		    !ctx-&gt;vif-&gt;bss_conf.beacon_int)) {</div><div class='add'>+		ctx-&gt;timing.beacon_interval =</div><div class='add'>+			priv-&gt;contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;</div><div class='add'>+		beacon_int = le16_to_cpu(ctx-&gt;timing.beacon_interval);</div><div class='add'>+	} else {</div><div class='add'>+		beacon_int = iwl_adjust_beacon_interval(beacon_int,</div><div class='add'>+			IWL_MAX_UCODE_BEACON_INTERVAL * TIME_UNIT);</div><div class='add'>+		ctx-&gt;timing.beacon_interval = cpu_to_le16(beacon_int);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;beacon_int = beacon_int;</div><div class='add'>+</div><div class='add'>+	tsf = priv-&gt;timestamp; /* tsf is modifed by do_div: copy it */</div><div class='add'>+	interval_tm = beacon_int * TIME_UNIT;</div><div class='add'>+	rem = do_div(tsf, interval_tm);</div><div class='add'>+	ctx-&gt;timing.beacon_init_val = cpu_to_le32(interval_tm - rem);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;timing.dtim_period = vif ? (vif-&gt;bss_conf.dtim_period ?: 1) : 1;</div><div class='add'>+</div><div class='add'>+	IWL_DEBUG_ASSOC(priv,</div><div class='add'>+			"beacon interval %d beacon timer %d beacon tim %d\n",</div><div class='add'>+			le16_to_cpu(ctx-&gt;timing.beacon_interval),</div><div class='add'>+			le32_to_cpu(ctx-&gt;timing.beacon_init_val),</div><div class='add'>+			le16_to_cpu(ctx-&gt;timing.atim_window));</div><div class='add'>+</div><div class='add'>+	return iwl_dvm_send_cmd_pdu(priv, ctx-&gt;rxon_timing_cmd,</div><div class='add'>+				CMD_SYNC, sizeof(ctx-&gt;timing), &amp;ctx-&gt;timing);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int iwlagn_rxon_disconn(struct iwl_priv *priv,</div><div class='ctx'> 			       struct iwl_rxon_context *ctx)</div><div class='ctx'> {</div><div class='hunk'>@@ -228,6 +404,64 @@ static int iwlagn_rxon_disconn(struct iwl_priv *priv,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	s8 prev_tx_power;</div><div class='add'>+	bool defer;</div><div class='add'>+	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_BSS];</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;calib_disabled &amp; IWL_TX_POWER_CALIB_DISABLED)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;priv-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_power_user_lmt == tx_power &amp;&amp; !force)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (tx_power &lt; IWLAGN_TX_POWER_TARGET_POWER_MIN) {</div><div class='add'>+		IWL_WARN(priv,</div><div class='add'>+			 "Requested user TXPOWER %d below lower limit %d.\n",</div><div class='add'>+			 tx_power,</div><div class='add'>+			 IWLAGN_TX_POWER_TARGET_POWER_MIN);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tx_power &gt; priv-&gt;tx_power_device_lmt) {</div><div class='add'>+		IWL_WARN(priv,</div><div class='add'>+			"Requested user TXPOWER %d above upper limit %d.\n",</div><div class='add'>+			 tx_power, priv-&gt;tx_power_device_lmt);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!iwl_is_ready_rf(priv))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	/* scan complete and commit_rxon use tx_power_next value,</div><div class='add'>+	 * it always need to be updated for newest request */</div><div class='add'>+	priv-&gt;tx_power_next = tx_power;</div><div class='add'>+</div><div class='add'>+	/* do not set tx power when scanning or channel changing */</div><div class='add'>+	defer = test_bit(STATUS_SCANNING, &amp;priv-&gt;status) ||</div><div class='add'>+		memcmp(&amp;ctx-&gt;active, &amp;ctx-&gt;staging, sizeof(ctx-&gt;staging));</div><div class='add'>+	if (defer &amp;&amp; !force) {</div><div class='add'>+		IWL_DEBUG_INFO(priv, "Deferring tx power set\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prev_tx_power = priv-&gt;tx_power_user_lmt;</div><div class='add'>+	priv-&gt;tx_power_user_lmt = tx_power;</div><div class='add'>+</div><div class='add'>+	ret = iwlagn_send_tx_power(priv);</div><div class='add'>+</div><div class='add'>+	/* if fail to set tx_power, restore the orig. tx power */</div><div class='add'>+	if (ret) {</div><div class='add'>+		priv-&gt;tx_power_user_lmt = prev_tx_power;</div><div class='add'>+		priv-&gt;tx_power_next = prev_tx_power;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int iwlagn_rxon_connect(struct iwl_priv *priv,</div><div class='ctx'> 			       struct iwl_rxon_context *ctx)</div><div class='ctx'> {</div><div class='hunk'>@@ -295,9 +529,9 @@ static int iwlagn_rxon_connect(struct iwl_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;vif &amp;&amp; ctx-&gt;vif-&gt;type == NL80211_IFTYPE_STATION &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;ht_params &amp;&amp; cfg(priv)-&gt;ht_params-&gt;smps_mode)</div><div class='add'>+	    priv-&gt;cfg-&gt;ht_params &amp;&amp; priv-&gt;cfg-&gt;ht_params-&gt;smps_mode)</div><div class='ctx'> 		ieee80211_request_smps(ctx-&gt;vif,</div><div class='del'>-				       cfg(priv)-&gt;ht_params-&gt;smps_mode);</div><div class='add'>+				       priv-&gt;cfg-&gt;ht_params-&gt;smps_mode);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -309,7 +543,7 @@ int iwlagn_set_pan_params(struct iwl_priv *priv)</div><div class='ctx'> 	int slot0 = 300, slot1 = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;shrd-&gt;valid_contexts == BIT(IWL_RXON_CTX_BSS))</div><div class='add'>+	if (priv-&gt;valid_contexts == BIT(IWL_RXON_CTX_BSS))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);</div><div class='hunk'>@@ -394,6 +628,414 @@ int iwlagn_set_pan_params(struct iwl_priv *priv)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void _iwl_set_rxon_ht(struct iwl_priv *priv,</div><div class='add'>+			     struct iwl_ht_config *ht_conf,</div><div class='add'>+			     struct iwl_rxon_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct iwl_rxon_cmd *rxon = &amp;ctx-&gt;staging;</div><div class='add'>+</div><div class='add'>+	if (!ctx-&gt;ht.enabled) {</div><div class='add'>+		rxon-&gt;flags &amp;= ~(RXON_FLG_CHANNEL_MODE_MSK |</div><div class='add'>+			RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |</div><div class='add'>+			RXON_FLG_HT40_PROT_MSK |</div><div class='add'>+			RXON_FLG_HT_PROT_MSK);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* FIXME: if the definition of ht.protection changed, the "translation"</div><div class='add'>+	 * will be needed for rxon-&gt;flags</div><div class='add'>+	 */</div><div class='add'>+	rxon-&gt;flags |= cpu_to_le32(ctx-&gt;ht.protection &lt;&lt;</div><div class='add'>+				   RXON_FLG_HT_OPERATING_MODE_POS);</div><div class='add'>+</div><div class='add'>+	/* Set up channel bandwidth:</div><div class='add'>+	 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */</div><div class='add'>+	/* clear the HT channel mode before set the mode */</div><div class='add'>+	rxon-&gt;flags &amp;= ~(RXON_FLG_CHANNEL_MODE_MSK |</div><div class='add'>+			 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);</div><div class='add'>+	if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {</div><div class='add'>+		/* pure ht40 */</div><div class='add'>+		if (ctx-&gt;ht.protection ==</div><div class='add'>+		    IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {</div><div class='add'>+			rxon-&gt;flags |= RXON_FLG_CHANNEL_MODE_PURE_40;</div><div class='add'>+			/*</div><div class='add'>+			 * Note: control channel is opposite of extension</div><div class='add'>+			 * channel</div><div class='add'>+			 */</div><div class='add'>+			switch (ctx-&gt;ht.extension_chan_offset) {</div><div class='add'>+			case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:</div><div class='add'>+				rxon-&gt;flags &amp;=</div><div class='add'>+					~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;</div><div class='add'>+				break;</div><div class='add'>+			case IEEE80211_HT_PARAM_CHA_SEC_BELOW:</div><div class='add'>+				rxon-&gt;flags |=</div><div class='add'>+					RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			/*</div><div class='add'>+			 * Note: control channel is opposite of extension</div><div class='add'>+			 * channel</div><div class='add'>+			 */</div><div class='add'>+			switch (ctx-&gt;ht.extension_chan_offset) {</div><div class='add'>+			case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:</div><div class='add'>+				rxon-&gt;flags &amp;=</div><div class='add'>+					~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);</div><div class='add'>+				rxon-&gt;flags |= RXON_FLG_CHANNEL_MODE_MIXED;</div><div class='add'>+				break;</div><div class='add'>+			case IEEE80211_HT_PARAM_CHA_SEC_BELOW:</div><div class='add'>+				rxon-&gt;flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;</div><div class='add'>+				rxon-&gt;flags |= RXON_FLG_CHANNEL_MODE_MIXED;</div><div class='add'>+				break;</div><div class='add'>+			case IEEE80211_HT_PARAM_CHA_SEC_NONE:</div><div class='add'>+			default:</div><div class='add'>+				/*</div><div class='add'>+				 * channel location only valid if in Mixed</div><div class='add'>+				 * mode</div><div class='add'>+				 */</div><div class='add'>+				IWL_ERR(priv,</div><div class='add'>+					"invalid extension channel offset\n");</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		rxon-&gt;flags |= RXON_FLG_CHANNEL_MODE_LEGACY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iwlagn_set_rxon_chain(priv, ctx);</div><div class='add'>+</div><div class='add'>+	IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "</div><div class='add'>+			"extension channel offset 0x%x\n",</div><div class='add'>+			le32_to_cpu(rxon-&gt;flags), ctx-&gt;ht.protection,</div><div class='add'>+			ctx-&gt;ht.extension_chan_offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)</div><div class='add'>+{</div><div class='add'>+	struct iwl_rxon_context *ctx;</div><div class='add'>+</div><div class='add'>+	for_each_context(priv, ctx)</div><div class='add'>+		_iwl_set_rxon_ht(priv, ht_conf, ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iwl_set_rxon_channel - Set the band and channel values in staging RXON</div><div class='add'>+ * @ch: requested channel as a pointer to struct ieee80211_channel</div><div class='add'>+</div><div class='add'>+ * NOTE:  Does not commit to the hardware; it sets appropriate bit fields</div><div class='add'>+ * in the staging RXON flag structure based on the ch-&gt;band</div><div class='add'>+ */</div><div class='add'>+void iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,</div><div class='add'>+			 struct iwl_rxon_context *ctx)</div><div class='add'>+{</div><div class='add'>+	enum ieee80211_band band = ch-&gt;band;</div><div class='add'>+	u16 channel = ch-&gt;hw_value;</div><div class='add'>+</div><div class='add'>+	if ((le16_to_cpu(ctx-&gt;staging.channel) == channel) &amp;&amp;</div><div class='add'>+	    (priv-&gt;band == band))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;staging.channel = cpu_to_le16(channel);</div><div class='add'>+	if (band == IEEE80211_BAND_5GHZ)</div><div class='add'>+		ctx-&gt;staging.flags &amp;= ~RXON_FLG_BAND_24G_MSK;</div><div class='add'>+	else</div><div class='add'>+		ctx-&gt;staging.flags |= RXON_FLG_BAND_24G_MSK;</div><div class='add'>+</div><div class='add'>+	priv-&gt;band = band;</div><div class='add'>+</div><div class='add'>+	IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void iwl_set_flags_for_band(struct iwl_priv *priv,</div><div class='add'>+			    struct iwl_rxon_context *ctx,</div><div class='add'>+			    enum ieee80211_band band,</div><div class='add'>+			    struct ieee80211_vif *vif)</div><div class='add'>+{</div><div class='add'>+	if (band == IEEE80211_BAND_5GHZ) {</div><div class='add'>+		ctx-&gt;staging.flags &amp;=</div><div class='add'>+		    ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK</div><div class='add'>+		      | RXON_FLG_CCK_MSK);</div><div class='add'>+		ctx-&gt;staging.flags |= RXON_FLG_SHORT_SLOT_MSK;</div><div class='add'>+	} else {</div><div class='add'>+		/* Copied from iwl_post_associate() */</div><div class='add'>+		if (vif &amp;&amp; vif-&gt;bss_conf.use_short_slot)</div><div class='add'>+			ctx-&gt;staging.flags |= RXON_FLG_SHORT_SLOT_MSK;</div><div class='add'>+		else</div><div class='add'>+			ctx-&gt;staging.flags &amp;= ~RXON_FLG_SHORT_SLOT_MSK;</div><div class='add'>+</div><div class='add'>+		ctx-&gt;staging.flags |= RXON_FLG_BAND_24G_MSK;</div><div class='add'>+		ctx-&gt;staging.flags |= RXON_FLG_AUTO_DETECT_MSK;</div><div class='add'>+		ctx-&gt;staging.flags &amp;= ~RXON_FLG_CCK_MSK;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void iwl_set_rxon_hwcrypto(struct iwl_priv *priv,</div><div class='add'>+				  struct iwl_rxon_context *ctx, int hw_decrypt)</div><div class='add'>+{</div><div class='add'>+	struct iwl_rxon_cmd *rxon = &amp;ctx-&gt;staging;</div><div class='add'>+</div><div class='add'>+	if (hw_decrypt)</div><div class='add'>+		rxon-&gt;filter_flags &amp;= ~RXON_FILTER_DIS_DECRYPT_MSK;</div><div class='add'>+	else</div><div class='add'>+		rxon-&gt;filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* validate RXON structure is valid */</div><div class='add'>+static int iwl_check_rxon_cmd(struct iwl_priv *priv,</div><div class='add'>+			      struct iwl_rxon_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct iwl_rxon_cmd *rxon = &amp;ctx-&gt;staging;</div><div class='add'>+	u32 errors = 0;</div><div class='add'>+</div><div class='add'>+	if (rxon-&gt;flags &amp; RXON_FLG_BAND_24G_MSK) {</div><div class='add'>+		if (rxon-&gt;flags &amp; RXON_FLG_TGJ_NARROW_BAND_MSK) {</div><div class='add'>+			IWL_WARN(priv, "check 2.4G: wrong narrow\n");</div><div class='add'>+			errors |= BIT(0);</div><div class='add'>+		}</div><div class='add'>+		if (rxon-&gt;flags &amp; RXON_FLG_RADAR_DETECT_MSK) {</div><div class='add'>+			IWL_WARN(priv, "check 2.4G: wrong radar\n");</div><div class='add'>+			errors |= BIT(1);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (!(rxon-&gt;flags &amp; RXON_FLG_SHORT_SLOT_MSK)) {</div><div class='add'>+			IWL_WARN(priv, "check 5.2G: not short slot!\n");</div><div class='add'>+			errors |= BIT(2);</div><div class='add'>+		}</div><div class='add'>+		if (rxon-&gt;flags &amp; RXON_FLG_CCK_MSK) {</div><div class='add'>+			IWL_WARN(priv, "check 5.2G: CCK!\n");</div><div class='add'>+			errors |= BIT(3);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if ((rxon-&gt;node_addr[0] | rxon-&gt;bssid_addr[0]) &amp; 0x1) {</div><div class='add'>+		IWL_WARN(priv, "mac/bssid mcast!\n");</div><div class='add'>+		errors |= BIT(4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* make sure basic rates 6Mbps and 1Mbps are supported */</div><div class='add'>+	if ((rxon-&gt;ofdm_basic_rates &amp; IWL_RATE_6M_MASK) == 0 &amp;&amp;</div><div class='add'>+	    (rxon-&gt;cck_basic_rates &amp; IWL_RATE_1M_MASK) == 0) {</div><div class='add'>+		IWL_WARN(priv, "neither 1 nor 6 are basic\n");</div><div class='add'>+		errors |= BIT(5);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (le16_to_cpu(rxon-&gt;assoc_id) &gt; 2007) {</div><div class='add'>+		IWL_WARN(priv, "aid &gt; 2007\n");</div><div class='add'>+		errors |= BIT(6);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((rxon-&gt;flags &amp; (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))</div><div class='add'>+			== (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {</div><div class='add'>+		IWL_WARN(priv, "CCK and short slot\n");</div><div class='add'>+		errors |= BIT(7);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((rxon-&gt;flags &amp; (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))</div><div class='add'>+			== (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {</div><div class='add'>+		IWL_WARN(priv, "CCK and auto detect");</div><div class='add'>+		errors |= BIT(8);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((rxon-&gt;flags &amp; (RXON_FLG_AUTO_DETECT_MSK |</div><div class='add'>+			    RXON_FLG_TGG_PROTECT_MSK)) ==</div><div class='add'>+			    RXON_FLG_TGG_PROTECT_MSK) {</div><div class='add'>+		IWL_WARN(priv, "TGg but no auto-detect\n");</div><div class='add'>+		errors |= BIT(9);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rxon-&gt;channel == 0) {</div><div class='add'>+		IWL_WARN(priv, "zero channel is invalid\n");</div><div class='add'>+		errors |= BIT(10);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WARN(errors, "Invalid RXON (%#x), channel %d",</div><div class='add'>+	     errors, le16_to_cpu(rxon-&gt;channel));</div><div class='add'>+</div><div class='add'>+	return errors ? -EINVAL : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed</div><div class='add'>+ * @priv: staging_rxon is compared to active_rxon</div><div class='add'>+ *</div><div class='add'>+ * If the RXON structure is changing enough to require a new tune,</div><div class='add'>+ * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that</div><div class='add'>+ * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.</div><div class='add'>+ */</div><div class='add'>+int iwl_full_rxon_required(struct iwl_priv *priv,</div><div class='add'>+			   struct iwl_rxon_context *ctx)</div><div class='add'>+{</div><div class='add'>+	const struct iwl_rxon_cmd *staging = &amp;ctx-&gt;staging;</div><div class='add'>+	const struct iwl_rxon_cmd *active = &amp;ctx-&gt;active;</div><div class='add'>+</div><div class='add'>+#define CHK(cond)							\</div><div class='add'>+	if ((cond)) {							\</div><div class='add'>+		IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n");	\</div><div class='add'>+		return 1;						\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define CHK_NEQ(c1, c2)						\</div><div class='add'>+	if ((c1) != (c2)) {					\</div><div class='add'>+		IWL_DEBUG_INFO(priv, "need full RXON - "	\</div><div class='add'>+			       #c1 " != " #c2 " - %d != %d\n",	\</div><div class='add'>+			       (c1), (c2));			\</div><div class='add'>+		return 1;					\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* These items are only settable from the full RXON command */</div><div class='add'>+	CHK(!iwl_is_associated_ctx(ctx));</div><div class='add'>+	CHK(!ether_addr_equal(staging-&gt;bssid_addr, active-&gt;bssid_addr));</div><div class='add'>+	CHK(!ether_addr_equal(staging-&gt;node_addr, active-&gt;node_addr));</div><div class='add'>+	CHK(!ether_addr_equal(staging-&gt;wlap_bssid_addr,</div><div class='add'>+			      active-&gt;wlap_bssid_addr));</div><div class='add'>+	CHK_NEQ(staging-&gt;dev_type, active-&gt;dev_type);</div><div class='add'>+	CHK_NEQ(staging-&gt;channel, active-&gt;channel);</div><div class='add'>+	CHK_NEQ(staging-&gt;air_propagation, active-&gt;air_propagation);</div><div class='add'>+	CHK_NEQ(staging-&gt;ofdm_ht_single_stream_basic_rates,</div><div class='add'>+		active-&gt;ofdm_ht_single_stream_basic_rates);</div><div class='add'>+	CHK_NEQ(staging-&gt;ofdm_ht_dual_stream_basic_rates,</div><div class='add'>+		active-&gt;ofdm_ht_dual_stream_basic_rates);</div><div class='add'>+	CHK_NEQ(staging-&gt;ofdm_ht_triple_stream_basic_rates,</div><div class='add'>+		active-&gt;ofdm_ht_triple_stream_basic_rates);</div><div class='add'>+	CHK_NEQ(staging-&gt;assoc_id, active-&gt;assoc_id);</div><div class='add'>+</div><div class='add'>+	/* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can</div><div class='add'>+	 * be updated with the RXON_ASSOC command -- however only some</div><div class='add'>+	 * flag transitions are allowed using RXON_ASSOC */</div><div class='add'>+</div><div class='add'>+	/* Check if we are not switching bands */</div><div class='add'>+	CHK_NEQ(staging-&gt;flags &amp; RXON_FLG_BAND_24G_MSK,</div><div class='add'>+		active-&gt;flags &amp; RXON_FLG_BAND_24G_MSK);</div><div class='add'>+</div><div class='add'>+	/* Check if we are switching association toggle */</div><div class='add'>+	CHK_NEQ(staging-&gt;filter_flags &amp; RXON_FILTER_ASSOC_MSK,</div><div class='add'>+		active-&gt;filter_flags &amp; RXON_FILTER_ASSOC_MSK);</div><div class='add'>+</div><div class='add'>+#undef CHK</div><div class='add'>+#undef CHK_NEQ</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IWLWIFI_DEBUG</div><div class='add'>+void iwl_print_rx_config_cmd(struct iwl_priv *priv,</div><div class='add'>+			     enum iwl_rxon_context_id ctxid)</div><div class='add'>+{</div><div class='add'>+	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[ctxid];</div><div class='add'>+	struct iwl_rxon_cmd *rxon = &amp;ctx-&gt;staging;</div><div class='add'>+</div><div class='add'>+	IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");</div><div class='add'>+	iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));</div><div class='add'>+	IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n",</div><div class='add'>+			le16_to_cpu(rxon-&gt;channel));</div><div class='add'>+	IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n",</div><div class='add'>+			le32_to_cpu(rxon-&gt;flags));</div><div class='add'>+	IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",</div><div class='add'>+			le32_to_cpu(rxon-&gt;filter_flags));</div><div class='add'>+	IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon-&gt;dev_type);</div><div class='add'>+	IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",</div><div class='add'>+			rxon-&gt;ofdm_basic_rates);</div><div class='add'>+	IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n",</div><div class='add'>+			rxon-&gt;cck_basic_rates);</div><div class='add'>+	IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon-&gt;node_addr);</div><div class='add'>+	IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon-&gt;bssid_addr);</div><div class='add'>+	IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n",</div><div class='add'>+			le16_to_cpu(rxon-&gt;assoc_id));</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void iwl_calc_basic_rates(struct iwl_priv *priv,</div><div class='add'>+				 struct iwl_rxon_context *ctx)</div><div class='add'>+{</div><div class='add'>+	int lowest_present_ofdm = 100;</div><div class='add'>+	int lowest_present_cck = 100;</div><div class='add'>+	u8 cck = 0;</div><div class='add'>+	u8 ofdm = 0;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;vif) {</div><div class='add'>+		struct ieee80211_supported_band *sband;</div><div class='add'>+		unsigned long basic = ctx-&gt;vif-&gt;bss_conf.basic_rates;</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		sband = priv-&gt;hw-&gt;wiphy-&gt;bands[priv-&gt;hw-&gt;conf.channel-&gt;band];</div><div class='add'>+</div><div class='add'>+		for_each_set_bit(i, &amp;basic, BITS_PER_LONG) {</div><div class='add'>+			int hw = sband-&gt;bitrates[i].hw_value;</div><div class='add'>+			if (hw &gt;= IWL_FIRST_OFDM_RATE) {</div><div class='add'>+				ofdm |= BIT(hw - IWL_FIRST_OFDM_RATE);</div><div class='add'>+				if (lowest_present_ofdm &gt; hw)</div><div class='add'>+					lowest_present_ofdm = hw;</div><div class='add'>+			} else {</div><div class='add'>+				BUILD_BUG_ON(IWL_FIRST_CCK_RATE != 0);</div><div class='add'>+</div><div class='add'>+				cck |= BIT(hw);</div><div class='add'>+				if (lowest_present_cck &gt; hw)</div><div class='add'>+					lowest_present_cck = hw;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Now we've got the basic rates as bitmaps in the ofdm and cck</div><div class='add'>+	 * variables. This isn't sufficient though, as there might not</div><div class='add'>+	 * be all the right rates in the bitmap. E.g. if the only basic</div><div class='add'>+	 * rates are 5.5 Mbps and 11 Mbps, we still need to add 1 Mbps</div><div class='add'>+	 * and 6 Mbps because the 802.11-2007 standard says in 9.6:</div><div class='add'>+	 *</div><div class='add'>+	 *    [...] a STA responding to a received frame shall transmit</div><div class='add'>+	 *    its Control Response frame [...] at the highest rate in the</div><div class='add'>+	 *    BSSBasicRateSet parameter that is less than or equal to the</div><div class='add'>+	 *    rate of the immediately previous frame in the frame exchange</div><div class='add'>+	 *    sequence ([...]) and that is of the same modulation class</div><div class='add'>+	 *    ([...]) as the received frame. If no rate contained in the</div><div class='add'>+	 *    BSSBasicRateSet parameter meets these conditions, then the</div><div class='add'>+	 *    control frame sent in response to a received frame shall be</div><div class='add'>+	 *    transmitted at the highest mandatory rate of the PHY that is</div><div class='add'>+	 *    less than or equal to the rate of the received frame, and</div><div class='add'>+	 *    that is of the same modulation class as the received frame.</div><div class='add'>+	 *</div><div class='add'>+	 * As a consequence, we need to add all mandatory rates that are</div><div class='add'>+	 * lower than all of the basic rates to these bitmaps.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (IWL_RATE_24M_INDEX &lt; lowest_present_ofdm)</div><div class='add'>+		ofdm |= IWL_RATE_24M_MASK &gt;&gt; IWL_FIRST_OFDM_RATE;</div><div class='add'>+	if (IWL_RATE_12M_INDEX &lt; lowest_present_ofdm)</div><div class='add'>+		ofdm |= IWL_RATE_12M_MASK &gt;&gt; IWL_FIRST_OFDM_RATE;</div><div class='add'>+	/* 6M already there or needed so always add */</div><div class='add'>+	ofdm |= IWL_RATE_6M_MASK &gt;&gt; IWL_FIRST_OFDM_RATE;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * CCK is a bit more complex with DSSS vs. HR/DSSS vs. ERP.</div><div class='add'>+	 * Note, however:</div><div class='add'>+	 *  - if no CCK rates are basic, it must be ERP since there must</div><div class='add'>+	 *    be some basic rates at all, so they're OFDM =&gt; ERP PHY</div><div class='add'>+	 *    (or we're in 5 GHz, and the cck bitmap will never be used)</div><div class='add'>+	 *  - if 11M is a basic rate, it must be ERP as well, so add 5.5M</div><div class='add'>+	 *  - if 5.5M is basic, 1M and 2M are mandatory</div><div class='add'>+	 *  - if 2M is basic, 1M is mandatory</div><div class='add'>+	 *  - if 1M is basic, that's the only valid ACK rate.</div><div class='add'>+	 * As a consequence, it's not as complicated as it sounds, just add</div><div class='add'>+	 * any lower rates to the ACK rate bitmap.</div><div class='add'>+	 */</div><div class='add'>+	if (IWL_RATE_11M_INDEX &lt; lowest_present_ofdm)</div><div class='add'>+		ofdm |= IWL_RATE_11M_MASK &gt;&gt; IWL_FIRST_CCK_RATE;</div><div class='add'>+	if (IWL_RATE_5M_INDEX &lt; lowest_present_ofdm)</div><div class='add'>+		ofdm |= IWL_RATE_5M_MASK &gt;&gt; IWL_FIRST_CCK_RATE;</div><div class='add'>+	if (IWL_RATE_2M_INDEX &lt; lowest_present_ofdm)</div><div class='add'>+		ofdm |= IWL_RATE_2M_MASK &gt;&gt; IWL_FIRST_CCK_RATE;</div><div class='add'>+	/* 1M already there or needed so always add */</div><div class='add'>+	cck |= IWL_RATE_1M_MASK &gt;&gt; IWL_FIRST_CCK_RATE;</div><div class='add'>+</div><div class='add'>+	IWL_DEBUG_RATE(priv, "Set basic rates cck:0x%.2x ofdm:0x%.2x\n",</div><div class='add'>+		       cck, ofdm);</div><div class='add'>+</div><div class='add'>+	/* "basic_rates" is a misnomer here -- should be called ACK rates */</div><div class='add'>+	ctx-&gt;staging.cck_basic_rates = cck;</div><div class='add'>+	ctx-&gt;staging.ofdm_basic_rates = ofdm;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * iwlagn_commit_rxon - commit staging_rxon to hardware</div><div class='ctx'>  *</div><div class='hunk'>@@ -433,11 +1075,14 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)</div><div class='ctx'> 	/* always get timestamp with Rx frame */</div><div class='ctx'> 	ctx-&gt;staging.flags |= RXON_FLG_TSF2HOST_MSK;</div><div class='ctx'> </div><div class='add'>+	/* recalculate basic rates */</div><div class='add'>+	iwl_calc_basic_rates(priv, ctx);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * force CTS-to-self frames protection if RTS-CTS is not preferred</div><div class='ctx'> 	 * one aggregation protection method</div><div class='ctx'> 	 */</div><div class='del'>-	if (!hw_params(priv).use_rts_for_aggregation)</div><div class='add'>+	if (!priv-&gt;hw_params.use_rts_for_aggregation)</div><div class='ctx'> 		ctx-&gt;staging.flags |= RXON_FLG_SELF_CTS_EN;</div><div class='ctx'> </div><div class='ctx'> 	if ((ctx-&gt;vif &amp;&amp; ctx-&gt;vif-&gt;bss_conf.use_short_slot) ||</div><div class='hunk'>@@ -489,7 +1134,7 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	iwl_set_rxon_hwcrypto(priv, ctx, !iwlagn_mod_params.sw_crypto);</div><div class='add'>+	iwl_set_rxon_hwcrypto(priv, ctx, !iwlwifi_mod_params.sw_crypto);</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_INFO(priv,</div><div class='ctx'> 		       "Going to commit RXON\n"</div><div class='hunk'>@@ -547,7 +1192,7 @@ int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed)</div><div class='ctx'> 	const struct iwl_channel_info *ch_info;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	IWL_DEBUG_MAC80211(priv, "enter: changed %#x", changed);</div><div class='add'>+	IWL_DEBUG_MAC80211(priv, "enter: changed %#x\n", changed);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -621,13 +1266,6 @@ int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		iwl_update_bcast_stations(priv);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * The list of supported rates and rate mask can be different</div><div class='del'>-		 * for each band; since the band may have changed, reset</div><div class='del'>-		 * the rate mask to what mac80211 lists.</div><div class='del'>-		 */</div><div class='del'>-		iwl_set_rate(priv);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (changed &amp; (IEEE80211_CONF_CHANGE_PS |</div><div class='hunk'>@@ -656,9 +1294,9 @@ int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwlagn_check_needed_chains(struct iwl_priv *priv,</div><div class='del'>-				       struct iwl_rxon_context *ctx,</div><div class='del'>-				       struct ieee80211_bss_conf *bss_conf)</div><div class='add'>+void iwlagn_check_needed_chains(struct iwl_priv *priv,</div><div class='add'>+				struct iwl_rxon_context *ctx,</div><div class='add'>+				struct ieee80211_bss_conf *bss_conf)</div><div class='ctx'> {</div><div class='ctx'> 	struct ieee80211_vif *vif = ctx-&gt;vif;</div><div class='ctx'> 	struct iwl_rxon_context *tmp;</div><div class='hunk'>@@ -750,11 +1388,14 @@ static void iwlagn_check_needed_chains(struct iwl_priv *priv,</div><div class='ctx'> 	ht_conf-&gt;single_chain_sufficient = !need_multiple;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwlagn_chain_noise_reset(struct iwl_priv *priv)</div><div class='add'>+void iwlagn_chain_noise_reset(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_chain_noise_data *data = &amp;priv-&gt;chain_noise_data;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (!(priv-&gt;calib_disabled &amp; IWL_CHAIN_NOISE_CALIB_DISABLED))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if ((data-&gt;state == IWL_CHAIN_NOISE_ALIVE) &amp;&amp;</div><div class='ctx'> 	    iwl_is_any_associated(priv)) {</div><div class='ctx'> 		struct iwl_calib_chain_noise_reset_cmd cmd;</div><div class='hunk'>@@ -907,8 +1548,7 @@ void iwlagn_bss_info_changed(struct ieee80211_hw *hw,</div><div class='ctx'> 			iwl_power_update_mode(priv, false);</div><div class='ctx'> </div><div class='ctx'> 		/* Enable RX differential gain and sensitivity calibrations */</div><div class='del'>-		if (!priv-&gt;disable_chain_noise_cal)</div><div class='del'>-			iwlagn_chain_noise_reset(priv);</div><div class='add'>+		iwlagn_chain_noise_reset(priv);</div><div class='ctx'> 		priv-&gt;start_calib = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-sta.c b/drivers/net/wireless/iwlwifi/iwl-agn-sta.c<br/>index c4175603864b..aea07aab3c9e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-sta.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn-sta.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-sta.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-sta.c</a></div><div class='hunk'>@@ -30,10 +30,11 @@</div><div class='ctx'> #include &lt;net/mac80211.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='ctx'> </div><div class='add'>+const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };</div><div class='add'>+</div><div class='ctx'> static int iwl_sta_ucode_activate(struct iwl_priv *priv, u8 sta_id)</div><div class='ctx'> {</div><div class='ctx'> 	lockdep_assert_held(&amp;priv-&gt;sta_lock);</div><div class='hunk'>@@ -170,6 +171,50 @@ int iwl_send_add_sta(struct iwl_priv *priv,</div><div class='ctx'> 	return cmd.handler_status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool iwl_is_channel_extension(struct iwl_priv *priv,</div><div class='add'>+				     enum ieee80211_band band,</div><div class='add'>+				     u16 channel, u8 extension_chan_offset)</div><div class='add'>+{</div><div class='add'>+	const struct iwl_channel_info *ch_info;</div><div class='add'>+</div><div class='add'>+	ch_info = iwl_get_channel_info(priv, band, channel);</div><div class='add'>+	if (!is_channel_valid(ch_info))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)</div><div class='add'>+		return !(ch_info-&gt;ht40_extension_channel &amp;</div><div class='add'>+					IEEE80211_CHAN_NO_HT40PLUS);</div><div class='add'>+	else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)</div><div class='add'>+		return !(ch_info-&gt;ht40_extension_channel &amp;</div><div class='add'>+					IEEE80211_CHAN_NO_HT40MINUS);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,</div><div class='add'>+			    struct iwl_rxon_context *ctx,</div><div class='add'>+			    struct ieee80211_sta_ht_cap *ht_cap)</div><div class='add'>+{</div><div class='add'>+	if (!ctx-&gt;ht.enabled || !ctx-&gt;ht.is_40mhz)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40</div><div class='add'>+	 * the bit will not set if it is pure 40MHz case</div><div class='add'>+	 */</div><div class='add'>+	if (ht_cap &amp;&amp; !ht_cap-&gt;ht_supported)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IWLWIFI_DEBUGFS</div><div class='add'>+	if (priv-&gt;disable_ht40)</div><div class='add'>+		return false;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return iwl_is_channel_extension(priv, priv-&gt;band,</div><div class='add'>+			le16_to_cpu(ctx-&gt;staging.channel),</div><div class='add'>+			ctx-&gt;ht.extension_chan_offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void iwl_sta_calc_ht_flags(struct iwl_priv *priv,</div><div class='ctx'> 				  struct ieee80211_sta *sta,</div><div class='ctx'> 				  struct iwl_rxon_context *ctx,</div><div class='hunk'>@@ -277,8 +322,8 @@ u8 iwl_prep_station(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='ctx'> 		sta_id = ctx-&gt;bcast_sta_id;</div><div class='ctx'> 	else</div><div class='ctx'> 		for (i = IWL_STA_ID; i &lt; IWLAGN_STATION_COUNT; i++) {</div><div class='del'>-			if (!compare_ether_addr(priv-&gt;stations[i].sta.sta.addr,</div><div class='del'>-						addr)) {</div><div class='add'>+			if (ether_addr_equal(priv-&gt;stations[i].sta.sta.addr,</div><div class='add'>+					     addr)) {</div><div class='ctx'> 				sta_id = i;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -308,7 +353,7 @@ u8 iwl_prep_station(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='ctx'> </div><div class='ctx'> 	if ((priv-&gt;stations[sta_id].used &amp; IWL_STA_DRIVER_ACTIVE) &amp;&amp;</div><div class='ctx'> 	    (priv-&gt;stations[sta_id].used &amp; IWL_STA_UCODE_ACTIVE) &amp;&amp;</div><div class='del'>-	    !compare_ether_addr(priv-&gt;stations[sta_id].sta.sta.addr, addr)) {</div><div class='add'>+	    ether_addr_equal(priv-&gt;stations[sta_id].sta.sta.addr, addr)) {</div><div class='ctx'> 		IWL_DEBUG_ASSOC(priv, "STA %d (%pM) already added, not "</div><div class='ctx'> 				"adding again.\n", sta_id, addr);</div><div class='ctx'> 		return sta_id;</div><div class='hunk'>@@ -581,6 +626,56 @@ void iwl_deactivate_station(struct iwl_priv *priv, const u8 sta_id,</div><div class='ctx'> 	spin_unlock_bh(&amp;priv-&gt;sta_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void iwl_sta_fill_lq(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='add'>+			    u8 sta_id, struct iwl_link_quality_cmd *link_cmd)</div><div class='add'>+{</div><div class='add'>+	int i, r;</div><div class='add'>+	u32 rate_flags = 0;</div><div class='add'>+	__le32 rate_n_flags;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;priv-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	memset(link_cmd, 0, sizeof(*link_cmd));</div><div class='add'>+</div><div class='add'>+	/* Set up the rate scaling to start at selected rate, fall back</div><div class='add'>+	 * all the way down to 1M in IEEE order, and then spin on 1M */</div><div class='add'>+	if (priv-&gt;band == IEEE80211_BAND_5GHZ)</div><div class='add'>+		r = IWL_RATE_6M_INDEX;</div><div class='add'>+	else if (ctx &amp;&amp; ctx-&gt;vif &amp;&amp; ctx-&gt;vif-&gt;p2p)</div><div class='add'>+		r = IWL_RATE_6M_INDEX;</div><div class='add'>+	else</div><div class='add'>+		r = IWL_RATE_1M_INDEX;</div><div class='add'>+</div><div class='add'>+	if (r &gt;= IWL_FIRST_CCK_RATE &amp;&amp; r &lt;= IWL_LAST_CCK_RATE)</div><div class='add'>+		rate_flags |= RATE_MCS_CCK_MSK;</div><div class='add'>+</div><div class='add'>+	rate_flags |= first_antenna(priv-&gt;hw_params.valid_tx_ant) &lt;&lt;</div><div class='add'>+				RATE_MCS_ANT_POS;</div><div class='add'>+	rate_n_flags = iwl_hw_set_rate_n_flags(iwl_rates[r].plcp, rate_flags);</div><div class='add'>+	for (i = 0; i &lt; LINK_QUAL_MAX_RETRY_NUM; i++)</div><div class='add'>+		link_cmd-&gt;rs_table[i].rate_n_flags = rate_n_flags;</div><div class='add'>+</div><div class='add'>+	link_cmd-&gt;general_params.single_stream_ant_msk =</div><div class='add'>+			first_antenna(priv-&gt;hw_params.valid_tx_ant);</div><div class='add'>+</div><div class='add'>+	link_cmd-&gt;general_params.dual_stream_ant_msk =</div><div class='add'>+		priv-&gt;hw_params.valid_tx_ant &amp;</div><div class='add'>+		~first_antenna(priv-&gt;hw_params.valid_tx_ant);</div><div class='add'>+	if (!link_cmd-&gt;general_params.dual_stream_ant_msk) {</div><div class='add'>+		link_cmd-&gt;general_params.dual_stream_ant_msk = ANT_AB;</div><div class='add'>+	} else if (num_of_ant(priv-&gt;hw_params.valid_tx_ant) == 2) {</div><div class='add'>+		link_cmd-&gt;general_params.dual_stream_ant_msk =</div><div class='add'>+			priv-&gt;hw_params.valid_tx_ant;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	link_cmd-&gt;agg_params.agg_dis_start_th =</div><div class='add'>+		LINK_QUAL_AGG_DISABLE_START_DEF;</div><div class='add'>+	link_cmd-&gt;agg_params.agg_time_limit =</div><div class='add'>+		cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF);</div><div class='add'>+</div><div class='add'>+	link_cmd-&gt;sta_id = sta_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * iwl_clear_ucode_stations - clear ucode station table bits</div><div class='ctx'>  *</div><div class='hunk'>@@ -677,7 +772,7 @@ void iwl_restore_stations(struct iwl_priv *priv, struct iwl_rxon_context *ctx)</div><div class='ctx'> 						~IWL_STA_DRIVER_ACTIVE;</div><div class='ctx'> 				priv-&gt;stations[i].used &amp;=</div><div class='ctx'> 						~IWL_STA_UCODE_INPROGRESS;</div><div class='del'>-				spin_unlock_bh(&amp;priv-&gt;sta_lock);</div><div class='add'>+				continue;</div><div class='ctx'> 			}</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Rate scaling has already been initialized, send</div><div class='hunk'>@@ -841,56 +936,6 @@ int iwl_send_lq_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-void iwl_sta_fill_lq(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='del'>-		     u8 sta_id, struct iwl_link_quality_cmd *link_cmd)</div><div class='del'>-{</div><div class='del'>-	int i, r;</div><div class='del'>-	u32 rate_flags = 0;</div><div class='del'>-	__le32 rate_n_flags;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;priv-&gt;mutex);</div><div class='del'>-</div><div class='del'>-	memset(link_cmd, 0, sizeof(*link_cmd));</div><div class='del'>-</div><div class='del'>-	/* Set up the rate scaling to start at selected rate, fall back</div><div class='del'>-	 * all the way down to 1M in IEEE order, and then spin on 1M */</div><div class='del'>-	if (priv-&gt;band == IEEE80211_BAND_5GHZ)</div><div class='del'>-		r = IWL_RATE_6M_INDEX;</div><div class='del'>-	else if (ctx &amp;&amp; ctx-&gt;vif &amp;&amp; ctx-&gt;vif-&gt;p2p)</div><div class='del'>-		r = IWL_RATE_6M_INDEX;</div><div class='del'>-	else</div><div class='del'>-		r = IWL_RATE_1M_INDEX;</div><div class='del'>-</div><div class='del'>-	if (r &gt;= IWL_FIRST_CCK_RATE &amp;&amp; r &lt;= IWL_LAST_CCK_RATE)</div><div class='del'>-		rate_flags |= RATE_MCS_CCK_MSK;</div><div class='del'>-</div><div class='del'>-	rate_flags |= first_antenna(hw_params(priv).valid_tx_ant) &lt;&lt;</div><div class='del'>-				RATE_MCS_ANT_POS;</div><div class='del'>-	rate_n_flags = iwl_hw_set_rate_n_flags(iwl_rates[r].plcp, rate_flags);</div><div class='del'>-	for (i = 0; i &lt; LINK_QUAL_MAX_RETRY_NUM; i++)</div><div class='del'>-		link_cmd-&gt;rs_table[i].rate_n_flags = rate_n_flags;</div><div class='del'>-</div><div class='del'>-	link_cmd-&gt;general_params.single_stream_ant_msk =</div><div class='del'>-			first_antenna(hw_params(priv).valid_tx_ant);</div><div class='del'>-</div><div class='del'>-	link_cmd-&gt;general_params.dual_stream_ant_msk =</div><div class='del'>-		hw_params(priv).valid_tx_ant &amp;</div><div class='del'>-		~first_antenna(hw_params(priv).valid_tx_ant);</div><div class='del'>-	if (!link_cmd-&gt;general_params.dual_stream_ant_msk) {</div><div class='del'>-		link_cmd-&gt;general_params.dual_stream_ant_msk = ANT_AB;</div><div class='del'>-	} else if (num_of_ant(hw_params(priv).valid_tx_ant) == 2) {</div><div class='del'>-		link_cmd-&gt;general_params.dual_stream_ant_msk =</div><div class='del'>-			hw_params(priv).valid_tx_ant;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	link_cmd-&gt;agg_params.agg_dis_start_th =</div><div class='del'>-		LINK_QUAL_AGG_DISABLE_START_DEF;</div><div class='del'>-	link_cmd-&gt;agg_params.agg_time_limit =</div><div class='del'>-		cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF);</div><div class='del'>-</div><div class='del'>-	link_cmd-&gt;sta_id = sta_id;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct iwl_link_quality_cmd *</div><div class='ctx'> iwl_sta_alloc_lq(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='ctx'> 		 u8 sta_id)</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tt.c b/drivers/net/wireless/iwlwifi/iwl-agn-tt.c<br/>index baaf5ba2fc38..a5cfe0aceedb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-tt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn-tt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-tt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-tt.c</a></div><div class='hunk'>@@ -37,11 +37,11 @@</div><div class='ctx'> #include "iwl-agn.h"</div><div class='ctx'> #include "iwl-eeprom.h"</div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-commands.h"</div><div class='ctx'> #include "iwl-debug.h"</div><div class='ctx'> #include "iwl-agn-tt.h"</div><div class='add'>+#include "iwl-modparams.h"</div><div class='ctx'> </div><div class='ctx'> /* default Thermal Throttling transaction table</div><div class='ctx'>  * Current state   |         Throttling Down               |  Throttling Up</div><div class='hunk'>@@ -179,19 +179,19 @@ static void iwl_tt_check_exit_ct_kill(unsigned long data)</div><div class='ctx'> </div><div class='ctx'> 	if (tt-&gt;state == IWL_TI_CT_KILL) {</div><div class='ctx'> 		if (priv-&gt;thermal_throttle.ct_kill_toggle) {</div><div class='del'>-			iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_CLR,</div><div class='add'>+			iwl_write32(priv-&gt;trans, CSR_UCODE_DRV_GP1_CLR,</div><div class='ctx'> 				    CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);</div><div class='ctx'> 			priv-&gt;thermal_throttle.ct_kill_toggle = false;</div><div class='ctx'> 		} else {</div><div class='del'>-			iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_SET,</div><div class='add'>+			iwl_write32(priv-&gt;trans, CSR_UCODE_DRV_GP1_SET,</div><div class='ctx'> 				    CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);</div><div class='ctx'> 			priv-&gt;thermal_throttle.ct_kill_toggle = true;</div><div class='ctx'> 		}</div><div class='del'>-		iwl_read32(trans(priv), CSR_UCODE_DRV_GP1);</div><div class='del'>-		spin_lock_irqsave(&amp;trans(priv)-&gt;reg_lock, flags);</div><div class='del'>-		if (likely(iwl_grab_nic_access(trans(priv))))</div><div class='del'>-			iwl_release_nic_access(trans(priv));</div><div class='del'>-		spin_unlock_irqrestore(&amp;trans(priv)-&gt;reg_lock, flags);</div><div class='add'>+		iwl_read32(priv-&gt;trans, CSR_UCODE_DRV_GP1);</div><div class='add'>+		spin_lock_irqsave(&amp;priv-&gt;trans-&gt;reg_lock, flags);</div><div class='add'>+		if (likely(iwl_grab_nic_access(priv-&gt;trans)))</div><div class='add'>+			iwl_release_nic_access(priv-&gt;trans);</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;trans-&gt;reg_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 		/* Reschedule the ct_kill timer to occur in</div><div class='ctx'> 		 * CT_KILL_EXIT_DURATION seconds to ensure we get a</div><div class='hunk'>@@ -632,7 +632,7 @@ void iwl_tt_initialize(struct iwl_priv *priv)</div><div class='ctx'> 	INIT_WORK(&amp;priv-&gt;ct_enter, iwl_bg_ct_enter);</div><div class='ctx'> 	INIT_WORK(&amp;priv-&gt;ct_exit, iwl_bg_ct_exit);</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;base_params-&gt;adv_thermal_throttle) {</div><div class='add'>+	if (priv-&gt;cfg-&gt;base_params-&gt;adv_thermal_throttle) {</div><div class='ctx'> 		IWL_DEBUG_TEMP(priv, "Advanced Thermal Throttling\n");</div><div class='ctx'> 		tt-&gt;restriction = kcalloc(IWL_TI_STATE_MAX,</div><div class='ctx'> 					  sizeof(struct iwl_tt_restriction),</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c<br/>index 34adedc74d35..3366e2e2f00f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-tx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn-tx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn-tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn-tx.c</a></div><div class='hunk'>@@ -34,12 +34,22 @@</div><div class='ctx'> #include &lt;linux/ieee80211.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-agn-hw.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='ctx'> </div><div class='add'>+static const u8 tid_to_ac[] = {</div><div class='add'>+	IEEE80211_AC_BE,</div><div class='add'>+	IEEE80211_AC_BK,</div><div class='add'>+	IEEE80211_AC_BK,</div><div class='add'>+	IEEE80211_AC_BE,</div><div class='add'>+	IEEE80211_AC_VI,</div><div class='add'>+	IEEE80211_AC_VI,</div><div class='add'>+	IEEE80211_AC_VO,</div><div class='add'>+	IEEE80211_AC_VO,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void iwlagn_tx_cmd_protection(struct iwl_priv *priv,</div><div class='ctx'> 				     struct ieee80211_tx_info *info,</div><div class='ctx'> 				     __le16 fc, __le32 *tx_flags)</div><div class='hunk'>@@ -74,8 +84,8 @@ static void iwlagn_tx_cmd_build_basic(struct iwl_priv *priv,</div><div class='ctx'> 	else if (ieee80211_is_back_req(fc))</div><div class='ctx'> 		tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;</div><div class='ctx'> 	else if (info-&gt;band == IEEE80211_BAND_2GHZ &amp;&amp;</div><div class='del'>-		 cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-		 cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist &amp;&amp;</div><div class='add'>+		 priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+		 priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist &amp;&amp;</div><div class='ctx'> 		 (ieee80211_is_auth(fc) || ieee80211_is_assoc_req(fc) ||</div><div class='ctx'> 		 ieee80211_is_reassoc_req(fc) ||</div><div class='ctx'> 		 skb-&gt;protocol == cpu_to_be16(ETH_P_PAE)))</div><div class='hunk'>@@ -192,15 +202,15 @@ static void iwlagn_tx_cmd_build_rate(struct iwl_priv *priv,</div><div class='ctx'> 		rate_flags |= RATE_MCS_CCK_MSK;</div><div class='ctx'> </div><div class='ctx'> 	/* Set up antennas */</div><div class='del'>-	 if (cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-	     cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist &amp;&amp;</div><div class='add'>+	 if (priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+	     priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist &amp;&amp;</div><div class='ctx'> 	     priv-&gt;bt_full_concurrent) {</div><div class='ctx'> 		/* operated as 1x1 in full concurrency mode */</div><div class='ctx'> 		priv-&gt;mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv-&gt;mgmt_tx_ant,</div><div class='del'>-				first_antenna(hw_params(priv).valid_tx_ant));</div><div class='add'>+				first_antenna(priv-&gt;hw_params.valid_tx_ant));</div><div class='ctx'> 	} else</div><div class='ctx'> 		priv-&gt;mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv-&gt;mgmt_tx_ant,</div><div class='del'>-						hw_params(priv).valid_tx_ant);</div><div class='add'>+						priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> 	rate_flags |= iwl_ant_idx_to_flags(priv-&gt;mgmt_tx_ant);</div><div class='ctx'> </div><div class='ctx'> 	/* Set the rate in the TX cmd */</div><div class='hunk'>@@ -293,6 +303,7 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)</div><div class='ctx'> 	u16 len, seq_number = 0;</div><div class='ctx'> 	u8 sta_id, tid = IWL_MAX_TID_COUNT;</div><div class='ctx'> 	bool is_agg = false;</div><div class='add'>+	int txq_id;</div><div class='ctx'> </div><div class='ctx'> 	if (info-&gt;control.vif)</div><div class='ctx'> 		ctx = iwl_rxon_ctx_from_vif(info-&gt;control.vif);</div><div class='hunk'>@@ -384,12 +395,9 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	/* TODO need this for burst mode later on */</div><div class='ctx'> 	iwlagn_tx_cmd_build_basic(priv, skb, tx_cmd, info, hdr, sta_id);</div><div class='del'>-	iwl_dbg_log_tx_data_frame(priv, len, hdr);</div><div class='ctx'> </div><div class='ctx'> 	iwlagn_tx_cmd_build_rate(priv, tx_cmd, info, fc);</div><div class='ctx'> </div><div class='del'>-	iwl_update_stats(priv, true, fc, len);</div><div class='del'>-</div><div class='ctx'> 	memset(&amp;info-&gt;status, 0, sizeof(info-&gt;status));</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;driver_data[0] = ctx;</div><div class='hunk'>@@ -435,7 +443,31 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)</div><div class='ctx'> 	/* Copy MAC header from skb into command buffer */</div><div class='ctx'> 	memcpy(tx_cmd-&gt;hdr, hdr, hdr_len);</div><div class='ctx'> </div><div class='del'>-	if (iwl_trans_tx(trans(priv), skb, dev_cmd, ctx-&gt;ctxid, sta_id, tid))</div><div class='add'>+	if (is_agg)</div><div class='add'>+		txq_id = priv-&gt;tid_data[sta_id][tid].agg.txq_id;</div><div class='add'>+	else if (info-&gt;flags &amp; IEEE80211_TX_CTL_SEND_AFTER_DTIM) {</div><div class='add'>+		/*</div><div class='add'>+		 * Send this frame after DTIM -- there's a special queue</div><div class='add'>+		 * reserved for this for contexts that support AP mode.</div><div class='add'>+		 */</div><div class='add'>+		txq_id = ctx-&gt;mcast_queue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The microcode will clear the more data</div><div class='add'>+		 * bit in the last frame it transmits.</div><div class='add'>+		 */</div><div class='add'>+		hdr-&gt;frame_control |=</div><div class='add'>+			cpu_to_le16(IEEE80211_FCTL_MOREDATA);</div><div class='add'>+	} else if (info-&gt;flags &amp; IEEE80211_TX_CTL_TX_OFFCHAN)</div><div class='add'>+		txq_id = IWL_AUX_QUEUE;</div><div class='add'>+	else</div><div class='add'>+		txq_id = ctx-&gt;ac_to_queue[skb_get_queue_mapping(skb)];</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(!is_agg &amp;&amp; txq_id != info-&gt;hw_queue);</div><div class='add'>+	WARN_ON_ONCE(is_agg &amp;&amp;</div><div class='add'>+		     priv-&gt;queue_to_mac80211[txq_id] != info-&gt;hw_queue);</div><div class='add'>+</div><div class='add'>+	if (iwl_trans_tx(priv-&gt;trans, skb, dev_cmd, txq_id))</div><div class='ctx'> 		goto drop_unlock_sta;</div><div class='ctx'> </div><div class='ctx'> 	if (ieee80211_is_data_qos(fc) &amp;&amp; !ieee80211_is_qos_nullfunc(fc) &amp;&amp;</div><div class='hunk'>@@ -464,11 +496,33 @@ drop_unlock_priv:</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int iwlagn_alloc_agg_txq(struct iwl_priv *priv, int mq)</div><div class='add'>+{</div><div class='add'>+	int q;</div><div class='add'>+</div><div class='add'>+	for (q = IWLAGN_FIRST_AMPDU_QUEUE;</div><div class='add'>+	     q &lt; priv-&gt;cfg-&gt;base_params-&gt;num_of_queues; q++) {</div><div class='add'>+		if (!test_and_set_bit(q, priv-&gt;agg_q_alloc)) {</div><div class='add'>+			priv-&gt;queue_to_mac80211[q] = mq;</div><div class='add'>+			return q;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOSPC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void iwlagn_dealloc_agg_txq(struct iwl_priv *priv, int q)</div><div class='add'>+{</div><div class='add'>+	clear_bit(q, priv-&gt;agg_q_alloc);</div><div class='add'>+	priv-&gt;queue_to_mac80211[q] = IWL_INVALID_MAC80211_QUEUE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,</div><div class='ctx'> 			struct ieee80211_sta *sta, u16 tid)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_tid_data *tid_data;</div><div class='del'>-	int sta_id;</div><div class='add'>+	int sta_id, txq_id;</div><div class='add'>+	enum iwl_agg_state agg_state;</div><div class='ctx'> </div><div class='ctx'> 	sta_id = iwl_sta_id(sta);</div><div class='ctx'> </div><div class='hunk'>@@ -480,6 +534,7 @@ int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,</div><div class='ctx'> 	spin_lock_bh(&amp;priv-&gt;sta_lock);</div><div class='ctx'> </div><div class='ctx'> 	tid_data = &amp;priv-&gt;tid_data[sta_id][tid];</div><div class='add'>+	txq_id = priv-&gt;tid_data[sta_id][tid].agg.txq_id;</div><div class='ctx'> </div><div class='ctx'> 	switch (priv-&gt;tid_data[sta_id][tid].agg.state) {</div><div class='ctx'> 	case IWL_EMPTYING_HW_QUEUE_ADDBA:</div><div class='hunk'>@@ -491,6 +546,13 @@ int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,</div><div class='ctx'> 		*/</div><div class='ctx'> 		IWL_DEBUG_HT(priv, "AGG stop before setup done\n");</div><div class='ctx'> 		goto turn_off;</div><div class='add'>+	case IWL_AGG_STARTING:</div><div class='add'>+		/*</div><div class='add'>+		 * This can happen when the session is stopped before</div><div class='add'>+		 * we receive ADDBA response</div><div class='add'>+		 */</div><div class='add'>+		IWL_DEBUG_HT(priv, "AGG stop before AGG became operational\n");</div><div class='add'>+		goto turn_off;</div><div class='ctx'> 	case IWL_AGG_ON:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -504,9 +566,13 @@ int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,</div><div class='ctx'> 	tid_data-&gt;agg.ssn = SEQ_TO_SN(tid_data-&gt;seq_number);</div><div class='ctx'> </div><div class='ctx'> 	/* There are still packets for this RA / TID in the HW */</div><div class='del'>-	if (tid_data-&gt;agg.ssn != tid_data-&gt;next_reclaimed) {</div><div class='add'>+	if (!test_bit(txq_id, priv-&gt;agg_q_alloc)) {</div><div class='add'>+		IWL_DEBUG_TX_QUEUES(priv,</div><div class='add'>+			"stopping AGG on STA/TID %d/%d but hwq %d not used\n",</div><div class='add'>+			sta_id, tid, txq_id);</div><div class='add'>+	} else if (tid_data-&gt;agg.ssn != tid_data-&gt;next_reclaimed) {</div><div class='ctx'> 		IWL_DEBUG_TX_QUEUES(priv, "Can't proceed: ssn %d, "</div><div class='del'>-				    "next_recl = %d",</div><div class='add'>+				    "next_recl = %d\n",</div><div class='ctx'> 				    tid_data-&gt;agg.ssn,</div><div class='ctx'> 				    tid_data-&gt;next_reclaimed);</div><div class='ctx'> 		priv-&gt;tid_data[sta_id][tid].agg.state =</div><div class='hunk'>@@ -515,14 +581,28 @@ int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	IWL_DEBUG_TX_QUEUES(priv, "Can proceed: ssn = next_recl = %d",</div><div class='add'>+	IWL_DEBUG_TX_QUEUES(priv, "Can proceed: ssn = next_recl = %d\n",</div><div class='ctx'> 			    tid_data-&gt;agg.ssn);</div><div class='ctx'> turn_off:</div><div class='add'>+	agg_state = priv-&gt;tid_data[sta_id][tid].agg.state;</div><div class='ctx'> 	priv-&gt;tid_data[sta_id][tid].agg.state = IWL_AGG_OFF;</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_bh(&amp;priv-&gt;sta_lock);</div><div class='ctx'> </div><div class='del'>-	iwl_trans_tx_agg_disable(trans(priv), sta_id, tid);</div><div class='add'>+	if (test_bit(txq_id, priv-&gt;agg_q_alloc)) {</div><div class='add'>+		/*</div><div class='add'>+		 * If the transport didn't know that we wanted to start</div><div class='add'>+		 * agreggation, don't tell it that we want to stop them.</div><div class='add'>+		 * This can happen when we don't get the addBA response on</div><div class='add'>+		 * time, or we hadn't time to drain the AC queues.</div><div class='add'>+		 */</div><div class='add'>+		if (agg_state == IWL_AGG_ON)</div><div class='add'>+			iwl_trans_tx_agg_disable(priv-&gt;trans, txq_id);</div><div class='add'>+		else</div><div class='add'>+			IWL_DEBUG_TX_QUEUES(priv, "Don't disable tx agg: %d\n",</div><div class='add'>+					    agg_state);</div><div class='add'>+		iwlagn_dealloc_agg_txq(priv, txq_id);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ieee80211_stop_tx_ba_cb_irqsafe(vif, sta-&gt;addr, tid);</div><div class='ctx'> </div><div class='hunk'>@@ -532,9 +612,9 @@ turn_off:</div><div class='ctx'> int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,</div><div class='ctx'> 			struct ieee80211_sta *sta, u16 tid, u16 *ssn)</div><div class='ctx'> {</div><div class='add'>+	struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);</div><div class='ctx'> 	struct iwl_tid_data *tid_data;</div><div class='del'>-	int sta_id;</div><div class='del'>-	int ret;</div><div class='add'>+	int sta_id, txq_id, ret;</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_HT(priv, "TX AGG request on ra = %pM tid = %d\n",</div><div class='ctx'> 		     sta-&gt;addr, tid);</div><div class='hunk'>@@ -552,36 +632,37 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	txq_id = iwlagn_alloc_agg_txq(priv, ctx-&gt;ac_to_queue[tid_to_ac[tid]]);</div><div class='add'>+	if (txq_id &lt; 0) {</div><div class='add'>+		IWL_DEBUG_TX_QUEUES(priv,</div><div class='add'>+			"No free aggregation queue for %pM/%d\n",</div><div class='add'>+			sta-&gt;addr, tid);</div><div class='add'>+		return txq_id;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;priv-&gt;sta_lock);</div><div class='del'>-</div><div class='ctx'> 	tid_data = &amp;priv-&gt;tid_data[sta_id][tid];</div><div class='ctx'> 	tid_data-&gt;agg.ssn = SEQ_TO_SN(tid_data-&gt;seq_number);</div><div class='add'>+	tid_data-&gt;agg.txq_id = txq_id;</div><div class='ctx'> </div><div class='ctx'> 	*ssn = tid_data-&gt;agg.ssn;</div><div class='ctx'> </div><div class='del'>-	ret = iwl_trans_tx_agg_alloc(trans(priv), sta_id, tid);</div><div class='del'>-	if (ret) {</div><div class='del'>-		spin_unlock_bh(&amp;priv-&gt;sta_lock);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (*ssn == tid_data-&gt;next_reclaimed) {</div><div class='del'>-		IWL_DEBUG_TX_QUEUES(priv, "Can proceed: ssn = next_recl = %d",</div><div class='add'>+		IWL_DEBUG_TX_QUEUES(priv, "Can proceed: ssn = next_recl = %d\n",</div><div class='ctx'> 				    tid_data-&gt;agg.ssn);</div><div class='del'>-		tid_data-&gt;agg.state = IWL_AGG_ON;</div><div class='add'>+		tid_data-&gt;agg.state = IWL_AGG_STARTING;</div><div class='ctx'> 		ieee80211_start_tx_ba_cb_irqsafe(vif, sta-&gt;addr, tid);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		IWL_DEBUG_TX_QUEUES(priv, "Can't proceed: ssn %d, "</div><div class='del'>-				    "next_reclaimed = %d",</div><div class='add'>+				    "next_reclaimed = %d\n",</div><div class='ctx'> 				    tid_data-&gt;agg.ssn,</div><div class='ctx'> 				    tid_data-&gt;next_reclaimed);</div><div class='ctx'> 		tid_data-&gt;agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	spin_unlock_bh(&amp;priv-&gt;sta_lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -592,15 +673,21 @@ int iwlagn_tx_agg_oper(struct iwl_priv *priv, struct ieee80211_vif *vif,</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_station_priv *sta_priv = (void *) sta-&gt;drv_priv;</div><div class='ctx'> 	struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);</div><div class='add'>+	int q, fifo;</div><div class='ctx'> 	u16 ssn;</div><div class='ctx'> </div><div class='ctx'> 	buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;priv-&gt;sta_lock);</div><div class='ctx'> 	ssn = priv-&gt;tid_data[sta_priv-&gt;sta_id][tid].agg.ssn;</div><div class='add'>+	q = priv-&gt;tid_data[sta_priv-&gt;sta_id][tid].agg.txq_id;</div><div class='add'>+	priv-&gt;tid_data[sta_priv-&gt;sta_id][tid].agg.state = IWL_AGG_ON;</div><div class='ctx'> 	spin_unlock_bh(&amp;priv-&gt;sta_lock);</div><div class='ctx'> </div><div class='del'>-	iwl_trans_tx_agg_setup(trans(priv), ctx-&gt;ctxid, sta_priv-&gt;sta_id, tid,</div><div class='add'>+	fifo = ctx-&gt;ac_to_fifo[tid_to_ac[tid]];</div><div class='add'>+</div><div class='add'>+	iwl_trans_tx_agg_setup(priv-&gt;trans, q, fifo,</div><div class='add'>+			       sta_priv-&gt;sta_id, tid,</div><div class='ctx'> 			       buf_size, ssn);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -623,7 +710,7 @@ int iwlagn_tx_agg_oper(struct iwl_priv *priv, struct ieee80211_vif *vif,</div><div class='ctx'> 	sta_priv-&gt;max_agg_bufsize =</div><div class='ctx'> 		min(sta_priv-&gt;max_agg_bufsize, buf_size);</div><div class='ctx'> </div><div class='del'>-	if (hw_params(priv).use_rts_for_aggregation) {</div><div class='add'>+	if (priv-&gt;hw_params.use_rts_for_aggregation) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * switch to RTS/CTS if it is the prefer protection</div><div class='ctx'> 		 * method for HT traffic</div><div class='hunk'>@@ -666,7 +753,9 @@ static void iwlagn_check_ratid_empty(struct iwl_priv *priv, int sta_id, u8 tid)</div><div class='ctx'> 			IWL_DEBUG_TX_QUEUES(priv,</div><div class='ctx'> 				"Can continue DELBA flow ssn = next_recl ="</div><div class='ctx'> 				" %d", tid_data-&gt;next_reclaimed);</div><div class='del'>-			iwl_trans_tx_agg_disable(trans(priv), sta_id, tid);</div><div class='add'>+			iwl_trans_tx_agg_disable(priv-&gt;trans,</div><div class='add'>+						 tid_data-&gt;agg.txq_id);</div><div class='add'>+			iwlagn_dealloc_agg_txq(priv, tid_data-&gt;agg.txq_id);</div><div class='ctx'> 			tid_data-&gt;agg.state = IWL_AGG_OFF;</div><div class='ctx'> 			ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -677,7 +766,7 @@ static void iwlagn_check_ratid_empty(struct iwl_priv *priv, int sta_id, u8 tid)</div><div class='ctx'> 			IWL_DEBUG_TX_QUEUES(priv,</div><div class='ctx'> 				"Can continue ADDBA flow ssn = next_recl ="</div><div class='ctx'> 				" %d", tid_data-&gt;next_reclaimed);</div><div class='del'>-			tid_data-&gt;agg.state = IWL_AGG_ON;</div><div class='add'>+			tid_data-&gt;agg.state = IWL_AGG_STARTING;</div><div class='ctx'> 			ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -711,9 +800,9 @@ static void iwlagn_non_agg_tx_status(struct iwl_priv *priv,</div><div class='ctx'> static void iwlagn_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,</div><div class='ctx'> 				  struct ieee80211_tx_info *info)</div><div class='ctx'> {</div><div class='del'>-	struct ieee80211_tx_rate *r = &amp;info-&gt;control.rates[0];</div><div class='add'>+	struct ieee80211_tx_rate *r = &amp;info-&gt;status.rates[0];</div><div class='ctx'> </div><div class='del'>-	info-&gt;antenna_sel_tx =</div><div class='add'>+	info-&gt;status.antenna =</div><div class='ctx'> 		((rate_n_flags &amp; RATE_MCS_ANT_ABC_MSK) &gt;&gt; RATE_MCS_ANT_POS);</div><div class='ctx'> 	if (rate_n_flags &amp; RATE_MCS_HT_MSK)</div><div class='ctx'> 		r-&gt;flags |= IEEE80211_TX_RC_MCS;</div><div class='hunk'>@@ -841,8 +930,8 @@ static void iwl_rx_reply_tx_agg(struct iwl_priv *priv,</div><div class='ctx'> 	 * notification again.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (tx_resp-&gt;bt_kill_count &amp;&amp; tx_resp-&gt;frame_count == 1 &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='add'>+	    priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+	    priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='ctx'> 		IWL_DEBUG_COEX(priv, "receive reply tx w/ bt_kill\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1005,6 +1094,29 @@ static void iwl_check_abort_status(struct iwl_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int iwl_reclaim(struct iwl_priv *priv, int sta_id, int tid,</div><div class='add'>+		       int txq_id, int ssn, struct sk_buff_head *skbs)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(txq_id &gt;= IWLAGN_FIRST_AMPDU_QUEUE &amp;&amp;</div><div class='add'>+		     tid != IWL_TID_NON_QOS &amp;&amp;</div><div class='add'>+		     txq_id != priv-&gt;tid_data[sta_id][tid].agg.txq_id)) {</div><div class='add'>+		/*</div><div class='add'>+		 * FIXME: this is a uCode bug which need to be addressed,</div><div class='add'>+		 * log the information and return for now.</div><div class='add'>+		 * Since it is can possibly happen very often and in order</div><div class='add'>+		 * not to fill the syslog, don't use IWL_ERR or IWL_WARN</div><div class='add'>+		 */</div><div class='add'>+		IWL_DEBUG_TX_QUEUES(priv,</div><div class='add'>+			"Bad queue mapping txq_id=%d, agg_txq[sta:%d,tid:%d]=%d\n",</div><div class='add'>+			txq_id, sta_id, tid,</div><div class='add'>+			priv-&gt;tid_data[sta_id][tid].agg.txq_id);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iwl_trans_reclaim(priv-&gt;trans, txq_id, ssn, skbs);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_cmd_buffer *rxb,</div><div class='ctx'> 			       struct iwl_device_cmd *cmd)</div><div class='ctx'> {</div><div class='hunk'>@@ -1059,13 +1171,12 @@ int iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_cmd_buffer *rxb,</div><div class='ctx'> 		if (tid != IWL_TID_NON_QOS) {</div><div class='ctx'> 			priv-&gt;tid_data[sta_id][tid].next_reclaimed =</div><div class='ctx'> 				next_reclaimed;</div><div class='del'>-			IWL_DEBUG_TX_REPLY(priv, "Next reclaimed packet:%d",</div><div class='add'>+			IWL_DEBUG_TX_REPLY(priv, "Next reclaimed packet:%d\n",</div><div class='ctx'> 						  next_reclaimed);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/*we can free until ssn % q.n_bd not inclusive */</div><div class='del'>-		WARN_ON(iwl_trans_reclaim(trans(priv), sta_id, tid,</div><div class='del'>-					  txq_id, ssn, &amp;skbs));</div><div class='add'>+		WARN_ON(iwl_reclaim(priv, sta_id, tid, txq_id, ssn, &amp;skbs));</div><div class='ctx'> 		iwlagn_check_ratid_empty(priv, sta_id, tid);</div><div class='ctx'> 		freed = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1159,7 +1270,7 @@ int iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,</div><div class='ctx'> 	 * (in Tx queue's circular buffer) of first TFD/frame in window */</div><div class='ctx'> 	u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp-&gt;scd_ssn);</div><div class='ctx'> </div><div class='del'>-	if (scd_flow &gt;= cfg(priv)-&gt;base_params-&gt;num_of_queues) {</div><div class='add'>+	if (scd_flow &gt;= priv-&gt;cfg-&gt;base_params-&gt;num_of_queues) {</div><div class='ctx'> 		IWL_ERR(priv,</div><div class='ctx'> 			"BUG_ON scd_flow is bigger than number of queues\n");</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1183,8 +1294,8 @@ int iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,</div><div class='ctx'> 	/* Release all TFDs before the SSN, i.e. all TFDs in front of</div><div class='ctx'> 	 * block-ack window (we assume that they've been successfully</div><div class='ctx'> 	 * transmitted ... if not, it's too late anyway). */</div><div class='del'>-	if (iwl_trans_reclaim(trans(priv), sta_id, tid, scd_flow,</div><div class='del'>-			      ba_resp_scd_ssn, &amp;reclaimed_skbs)) {</div><div class='add'>+	if (iwl_reclaim(priv, sta_id, tid, scd_flow,</div><div class='add'>+			ba_resp_scd_ssn, &amp;reclaimed_skbs)) {</div><div class='ctx'> 		spin_unlock(&amp;priv-&gt;sta_lock);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1195,10 +1306,11 @@ int iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,</div><div class='ctx'> 			   (u8 *) &amp;ba_resp-&gt;sta_addr_lo32,</div><div class='ctx'> 			   ba_resp-&gt;sta_id);</div><div class='ctx'> 	IWL_DEBUG_TX_REPLY(priv, "TID = %d, SeqCtl = %d, bitmap = 0x%llx, "</div><div class='del'>-			   "scd_flow = %d, scd_ssn = %d\n",</div><div class='add'>+			   "scd_flow = %d, scd_ssn = %d sent:%d, acked:%d\n",</div><div class='ctx'> 			   ba_resp-&gt;tid, le16_to_cpu(ba_resp-&gt;seq_ctl),</div><div class='ctx'> 			   (unsigned long long)le64_to_cpu(ba_resp-&gt;bitmap),</div><div class='del'>-			   scd_flow, ba_resp_scd_ssn);</div><div class='add'>+			   scd_flow, ba_resp_scd_ssn, ba_resp-&gt;txed,</div><div class='add'>+			   ba_resp-&gt;txed_2_done);</div><div class='ctx'> </div><div class='ctx'> 	/* Mark that the expected block-ack response arrived */</div><div class='ctx'> 	agg-&gt;wait_for_ba = false;</div><div class='hunk'>@@ -1214,8 +1326,6 @@ int iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,</div><div class='ctx'> 		 */</div><div class='ctx'> 		ba_resp-&gt;txed = ba_resp-&gt;txed_2_done;</div><div class='ctx'> 	}</div><div class='del'>-	IWL_DEBUG_HT(priv, "agg frames sent:%d, acked:%d\n",</div><div class='del'>-			ba_resp-&gt;txed, ba_resp-&gt;txed_2_done);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;tid_data[sta_id][tid].next_reclaimed = ba_resp_scd_ssn;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c<br/>index f1226dbf789d..ec36e2b020b6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn.c</a></div><div class='hunk'>@@ -26,6 +26,9 @@</div><div class='ctx'>  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -43,13 +46,13 @@</div><div class='ctx'> </div><div class='ctx'> #include "iwl-eeprom.h"</div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-agn-calib.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='ctx'> #include "iwl-op-mode.h"</div><div class='add'>+#include "iwl-drv.h"</div><div class='add'>+#include "iwl-modparams.h"</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='ctx'>  *</div><div class='hunk'>@@ -177,7 +180,7 @@ int iwlagn_send_beacon_cmd(struct iwl_priv *priv)</div><div class='ctx'> 		rate = info-&gt;control.rates[0].idx;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv-&gt;mgmt_tx_ant,</div><div class='del'>-					      hw_params(priv).valid_tx_ant);</div><div class='add'>+					      priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> 	rate_flags = iwl_ant_idx_to_flags(priv-&gt;mgmt_tx_ant);</div><div class='ctx'> </div><div class='ctx'> 	/* In mac80211, rates for 5 GHz start at 0 */</div><div class='hunk'>@@ -286,6 +289,25 @@ out:</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)</div><div class='add'>+{</div><div class='add'>+	struct iwl_statistics_cmd statistics_cmd = {</div><div class='add'>+		.configuration_flags =</div><div class='add'>+			clear ? IWL_STATS_CONF_CLEAR_STATS : 0,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (flags &amp; CMD_ASYNC)</div><div class='add'>+		return iwl_dvm_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,</div><div class='add'>+					CMD_ASYNC,</div><div class='add'>+					sizeof(struct iwl_statistics_cmd),</div><div class='add'>+					&amp;statistics_cmd);</div><div class='add'>+	else</div><div class='add'>+		return iwl_dvm_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,</div><div class='add'>+					CMD_SYNC,</div><div class='add'>+					sizeof(struct iwl_statistics_cmd),</div><div class='add'>+					&amp;statistics_cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * iwl_bg_statistics_periodic - Timer callback to queue statistics</div><div class='ctx'>  *</div><div class='hunk'>@@ -326,14 +348,14 @@ static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,</div><div class='ctx'> 		ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure device is powered up for SRAM reads */</div><div class='del'>-	spin_lock_irqsave(&amp;trans(priv)-&gt;reg_lock, reg_flags);</div><div class='del'>-	if (unlikely(!iwl_grab_nic_access(trans(priv)))) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;trans(priv)-&gt;reg_lock, reg_flags);</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;trans-&gt;reg_lock, reg_flags);</div><div class='add'>+	if (unlikely(!iwl_grab_nic_access(priv-&gt;trans))) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;trans-&gt;reg_lock, reg_flags);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set starting address; reads will auto-increment */</div><div class='del'>-	iwl_write32(trans(priv), HBUS_TARG_MEM_RADDR, ptr);</div><div class='add'>+	iwl_write32(priv-&gt;trans, HBUS_TARG_MEM_RADDR, ptr);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Refuse to read more than would have fit into the log from</div><div class='hunk'>@@ -349,20 +371,20 @@ static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,</div><div class='ctx'> 	 * place event id # at far right for easier visual parsing.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; num_events; i++) {</div><div class='del'>-		ev = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);</div><div class='del'>-		time = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);</div><div class='add'>+		ev = iwl_read32(priv-&gt;trans, HBUS_TARG_MEM_RDAT);</div><div class='add'>+		time = iwl_read32(priv-&gt;trans, HBUS_TARG_MEM_RDAT);</div><div class='ctx'> 		if (mode == 0) {</div><div class='ctx'> 			trace_iwlwifi_dev_ucode_cont_event(</div><div class='del'>-					trans(priv)-&gt;dev, 0, time, ev);</div><div class='add'>+					priv-&gt;trans-&gt;dev, 0, time, ev);</div><div class='ctx'> 		} else {</div><div class='del'>-			data = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);</div><div class='add'>+			data = iwl_read32(priv-&gt;trans, HBUS_TARG_MEM_RDAT);</div><div class='ctx'> 			trace_iwlwifi_dev_ucode_cont_event(</div><div class='del'>-					trans(priv)-&gt;dev, time, data, ev);</div><div class='add'>+					priv-&gt;trans-&gt;dev, time, data, ev);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Allow device to power down */</div><div class='del'>-	iwl_release_nic_access(trans(priv));</div><div class='del'>-	spin_unlock_irqrestore(&amp;trans(priv)-&gt;reg_lock, reg_flags);</div><div class='add'>+	iwl_release_nic_access(priv-&gt;trans);</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;trans-&gt;reg_lock, reg_flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void iwl_continuous_event_trace(struct iwl_priv *priv)</div><div class='hunk'>@@ -379,10 +401,9 @@ static void iwl_continuous_event_trace(struct iwl_priv *priv)</div><div class='ctx'> 	u32 num_wraps;  /* # times uCode wrapped to top of log */</div><div class='ctx'> 	u32 next_entry; /* index of next entry to be written by uCode */</div><div class='ctx'> </div><div class='del'>-	base = priv-&gt;shrd-&gt;device_pointers.log_event_table;</div><div class='add'>+	base = priv-&gt;device_pointers.log_event_table;</div><div class='ctx'> 	if (iwlagn_hw_valid_rtc_data_addr(base)) {</div><div class='del'>-		iwl_read_targ_mem_words(trans(priv), base, &amp;read, sizeof(read));</div><div class='del'>-</div><div class='add'>+		iwl_read_targ_mem_words(priv-&gt;trans, base, &amp;read, sizeof(read));</div><div class='ctx'> 		capacity = read.capacity;</div><div class='ctx'> 		mode = read.mode;</div><div class='ctx'> 		num_wraps = read.wrap_counter;</div><div class='hunk'>@@ -422,7 +443,7 @@ static void iwl_continuous_event_trace(struct iwl_priv *priv)</div><div class='ctx'> 		else</div><div class='ctx'> 			priv-&gt;event_log.wraps_once_count++;</div><div class='ctx'> </div><div class='del'>-		trace_iwlwifi_dev_ucode_wrap_event(trans(priv)-&gt;dev,</div><div class='add'>+		trace_iwlwifi_dev_ucode_wrap_event(priv-&gt;trans-&gt;dev,</div><div class='ctx'> 				num_wraps - priv-&gt;event_log.num_wraps,</div><div class='ctx'> 				next_entry, priv-&gt;event_log.next_entry);</div><div class='ctx'> </div><div class='hunk'>@@ -488,7 +509,76 @@ static void iwl_bg_tx_flush(struct work_struct *work)</div><div class='ctx'> 	iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_init_context(struct iwl_priv *priv, u32 ucode_flags)</div><div class='add'>+/*</div><div class='add'>+ * queue/FIFO/AC mapping definitions</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define IWL_TX_FIFO_BK		0	/* shared */</div><div class='add'>+#define IWL_TX_FIFO_BE		1</div><div class='add'>+#define IWL_TX_FIFO_VI		2	/* shared */</div><div class='add'>+#define IWL_TX_FIFO_VO		3</div><div class='add'>+#define IWL_TX_FIFO_BK_IPAN	IWL_TX_FIFO_BK</div><div class='add'>+#define IWL_TX_FIFO_BE_IPAN	4</div><div class='add'>+#define IWL_TX_FIFO_VI_IPAN	IWL_TX_FIFO_VI</div><div class='add'>+#define IWL_TX_FIFO_VO_IPAN	5</div><div class='add'>+/* re-uses the VO FIFO, uCode will properly flush/schedule */</div><div class='add'>+#define IWL_TX_FIFO_AUX		5</div><div class='add'>+#define IWL_TX_FIFO_UNUSED	-1</div><div class='add'>+</div><div class='add'>+#define IWLAGN_CMD_FIFO_NUM	7</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This queue number is required for proper operation</div><div class='add'>+ * because the ucode will stop/start the scheduler as</div><div class='add'>+ * required.</div><div class='add'>+ */</div><div class='add'>+#define IWL_IPAN_MCAST_QUEUE	8</div><div class='add'>+</div><div class='add'>+static const u8 iwlagn_default_queue_to_tx_fifo[] = {</div><div class='add'>+	IWL_TX_FIFO_VO,</div><div class='add'>+	IWL_TX_FIFO_VI,</div><div class='add'>+	IWL_TX_FIFO_BE,</div><div class='add'>+	IWL_TX_FIFO_BK,</div><div class='add'>+	IWLAGN_CMD_FIFO_NUM,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 iwlagn_ipan_queue_to_tx_fifo[] = {</div><div class='add'>+	IWL_TX_FIFO_VO,</div><div class='add'>+	IWL_TX_FIFO_VI,</div><div class='add'>+	IWL_TX_FIFO_BE,</div><div class='add'>+	IWL_TX_FIFO_BK,</div><div class='add'>+	IWL_TX_FIFO_BK_IPAN,</div><div class='add'>+	IWL_TX_FIFO_BE_IPAN,</div><div class='add'>+	IWL_TX_FIFO_VI_IPAN,</div><div class='add'>+	IWL_TX_FIFO_VO_IPAN,</div><div class='add'>+	IWL_TX_FIFO_BE_IPAN,</div><div class='add'>+	IWLAGN_CMD_FIFO_NUM,</div><div class='add'>+	IWL_TX_FIFO_AUX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 iwlagn_bss_ac_to_fifo[] = {</div><div class='add'>+	IWL_TX_FIFO_VO,</div><div class='add'>+	IWL_TX_FIFO_VI,</div><div class='add'>+	IWL_TX_FIFO_BE,</div><div class='add'>+	IWL_TX_FIFO_BK,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 iwlagn_bss_ac_to_queue[] = {</div><div class='add'>+	0, 1, 2, 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 iwlagn_pan_ac_to_fifo[] = {</div><div class='add'>+	IWL_TX_FIFO_VO_IPAN,</div><div class='add'>+	IWL_TX_FIFO_VI_IPAN,</div><div class='add'>+	IWL_TX_FIFO_BE_IPAN,</div><div class='add'>+	IWL_TX_FIFO_BK_IPAN,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 iwlagn_pan_ac_to_queue[] = {</div><div class='add'>+	7, 6, 5, 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void iwl_init_context(struct iwl_priv *priv, u32 ucode_flags)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -496,9 +586,9 @@ static void iwl_init_context(struct iwl_priv *priv, u32 ucode_flags)</div><div class='ctx'> 	 * The default context is always valid,</div><div class='ctx'> 	 * the PAN context depends on uCode.</div><div class='ctx'> 	 */</div><div class='del'>-	priv-&gt;shrd-&gt;valid_contexts = BIT(IWL_RXON_CTX_BSS);</div><div class='add'>+	priv-&gt;valid_contexts = BIT(IWL_RXON_CTX_BSS);</div><div class='ctx'> 	if (ucode_flags &amp; IWL_UCODE_TLV_FLAGS_PAN)</div><div class='del'>-		priv-&gt;shrd-&gt;valid_contexts |= BIT(IWL_RXON_CTX_PAN);</div><div class='add'>+		priv-&gt;valid_contexts |= BIT(IWL_RXON_CTX_PAN);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; NUM_IWL_RXON_CTX; i++)</div><div class='ctx'> 		priv-&gt;contexts[i].ctxid = i;</div><div class='hunk'>@@ -513,13 +603,17 @@ static void iwl_init_context(struct iwl_priv *priv, u32 ucode_flags)</div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;</div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID;</div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =</div><div class='del'>-		BIT(NL80211_IFTYPE_ADHOC);</div><div class='add'>+		BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_MONITOR);</div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_BSS].interface_modes =</div><div class='ctx'> 		BIT(NL80211_IFTYPE_STATION);</div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;</div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;</div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;</div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;</div><div class='add'>+	memcpy(priv-&gt;contexts[IWL_RXON_CTX_BSS].ac_to_queue,</div><div class='add'>+	       iwlagn_bss_ac_to_queue, sizeof(iwlagn_bss_ac_to_queue));</div><div class='add'>+	memcpy(priv-&gt;contexts[IWL_RXON_CTX_BSS].ac_to_fifo,</div><div class='add'>+	       iwlagn_bss_ac_to_fifo, sizeof(iwlagn_bss_ac_to_fifo));</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;</div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd =</div><div class='hunk'>@@ -542,26 +636,31 @@ static void iwl_init_context(struct iwl_priv *priv, u32 ucode_flags)</div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;</div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;</div><div class='ctx'> 	priv-&gt;contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;</div><div class='add'>+	memcpy(priv-&gt;contexts[IWL_RXON_CTX_PAN].ac_to_queue,</div><div class='add'>+	       iwlagn_pan_ac_to_queue, sizeof(iwlagn_pan_ac_to_queue));</div><div class='add'>+	memcpy(priv-&gt;contexts[IWL_RXON_CTX_PAN].ac_to_fifo,</div><div class='add'>+	       iwlagn_pan_ac_to_fifo, sizeof(iwlagn_pan_ac_to_fifo));</div><div class='add'>+	priv-&gt;contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_rf_kill_ct_config(struct iwl_priv *priv)</div><div class='add'>+void iwl_rf_kill_ct_config(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_ct_kill_config cmd;</div><div class='ctx'> 	struct iwl_ct_kill_throttling_config adv_cmd;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_CLR,</div><div class='add'>+	iwl_write32(priv-&gt;trans, CSR_UCODE_DRV_GP1_CLR,</div><div class='ctx'> 		    CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;thermal_throttle.ct_kill_toggle = false;</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;base_params-&gt;support_ct_kill_exit) {</div><div class='add'>+	if (priv-&gt;cfg-&gt;base_params-&gt;support_ct_kill_exit) {</div><div class='ctx'> 		adv_cmd.critical_temperature_enter =</div><div class='del'>-			cpu_to_le32(hw_params(priv).ct_kill_threshold);</div><div class='add'>+			cpu_to_le32(priv-&gt;hw_params.ct_kill_threshold);</div><div class='ctx'> 		adv_cmd.critical_temperature_exit =</div><div class='del'>-			cpu_to_le32(hw_params(priv).ct_kill_exit_threshold);</div><div class='add'>+			cpu_to_le32(priv-&gt;hw_params.ct_kill_exit_threshold);</div><div class='ctx'> </div><div class='ctx'> 		ret = iwl_dvm_send_cmd_pdu(priv,</div><div class='ctx'> 				       REPLY_CT_KILL_CONFIG_CMD,</div><div class='hunk'>@@ -572,11 +671,11 @@ static void iwl_rf_kill_ct_config(struct iwl_priv *priv)</div><div class='ctx'> 			IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "</div><div class='ctx'> 				"succeeded, critical temperature enter is %d,"</div><div class='ctx'> 				"exit is %d\n",</div><div class='del'>-				hw_params(priv).ct_kill_threshold,</div><div class='del'>-				hw_params(priv).ct_kill_exit_threshold);</div><div class='add'>+				priv-&gt;hw_params.ct_kill_threshold,</div><div class='add'>+				priv-&gt;hw_params.ct_kill_exit_threshold);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		cmd.critical_temperature_R =</div><div class='del'>-			cpu_to_le32(hw_params(priv).ct_kill_threshold);</div><div class='add'>+			cpu_to_le32(priv-&gt;hw_params.ct_kill_threshold);</div><div class='ctx'> </div><div class='ctx'> 		ret = iwl_dvm_send_cmd_pdu(priv,</div><div class='ctx'> 				       REPLY_CT_KILL_CONFIG_CMD,</div><div class='hunk'>@@ -587,7 +686,7 @@ static void iwl_rf_kill_ct_config(struct iwl_priv *priv)</div><div class='ctx'> 			IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "</div><div class='ctx'> 				"succeeded, "</div><div class='ctx'> 				"critical temperature is %d\n",</div><div class='del'>-				hw_params(priv).ct_kill_threshold);</div><div class='add'>+				priv-&gt;hw_params.ct_kill_threshold);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -627,6 +726,29 @@ static int iwlagn_send_tx_ant_config(struct iwl_priv *priv, u8 valid_tx_ant)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void iwl_send_bt_config(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct iwl_bt_cmd bt_cmd = {</div><div class='add'>+		.lead_time = BT_LEAD_TIME_DEF,</div><div class='add'>+		.max_kill = BT_MAX_KILL_DEF,</div><div class='add'>+		.kill_ack_mask = 0,</div><div class='add'>+		.kill_cts_mask = 0,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (!iwlwifi_mod_params.bt_coex_active)</div><div class='add'>+		bt_cmd.flags = BT_COEX_DISABLE;</div><div class='add'>+	else</div><div class='add'>+		bt_cmd.flags = BT_COEX_ENABLE;</div><div class='add'>+</div><div class='add'>+	priv-&gt;bt_enable_flag = bt_cmd.flags;</div><div class='add'>+	IWL_DEBUG_INFO(priv, "BT coex %s\n",</div><div class='add'>+		(bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");</div><div class='add'>+</div><div class='add'>+	if (iwl_dvm_send_cmd_pdu(priv, REPLY_BT_CONFIG,</div><div class='add'>+			     CMD_SYNC, sizeof(struct iwl_bt_cmd), &amp;bt_cmd))</div><div class='add'>+		IWL_ERR(priv, "failed to send BT Coex Config\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * iwl_alive_start - called after REPLY_ALIVE notification received</div><div class='ctx'>  *                   from protocol/runtime uCode (initialization uCode's</div><div class='hunk'>@@ -642,9 +764,6 @@ int iwl_alive_start(struct iwl_priv *priv)</div><div class='ctx'> 	/* After the ALIVE response, we can send host commands to the uCode */</div><div class='ctx'> 	set_bit(STATUS_ALIVE, &amp;priv-&gt;status);</div><div class='ctx'> </div><div class='del'>-	/* Enable watchdog to monitor the driver tx queues */</div><div class='del'>-	iwl_setup_watchdog(priv);</div><div class='del'>-</div><div class='ctx'> 	if (iwl_is_rfkill(priv))</div><div class='ctx'> 		return -ERFKILL;</div><div class='ctx'> </div><div class='hunk'>@@ -654,10 +773,10 @@ int iwl_alive_start(struct iwl_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* download priority table before any calibration request */</div><div class='del'>-	if (cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+	    priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='ctx'> 		/* Configure Bluetooth device coexistence support */</div><div class='del'>-		if (cfg(priv)-&gt;bt_params-&gt;bt_sco_disable)</div><div class='add'>+		if (priv-&gt;cfg-&gt;bt_params-&gt;bt_sco_disable)</div><div class='ctx'> 			priv-&gt;bt_enable_pspoll = false;</div><div class='ctx'> 		else</div><div class='ctx'> 			priv-&gt;bt_enable_pspoll = true;</div><div class='hunk'>@@ -694,10 +813,8 @@ int iwl_alive_start(struct iwl_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	ieee80211_wake_queues(priv-&gt;hw);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;active_rate = IWL_RATES_MASK;</div><div class='del'>-</div><div class='ctx'> 	/* Configure Tx antenna selection based on H/W config */</div><div class='del'>-	iwlagn_send_tx_ant_config(priv, hw_params(priv).valid_tx_ant);</div><div class='add'>+	iwlagn_send_tx_ant_config(priv, priv-&gt;hw_params.valid_tx_ant);</div><div class='ctx'> </div><div class='ctx'> 	if (iwl_is_associated_ctx(ctx) &amp;&amp; !priv-&gt;wowlan) {</div><div class='ctx'> 		struct iwl_rxon_cmd *active_rxon =</div><div class='hunk'>@@ -788,10 +905,6 @@ void iwl_down(struct iwl_priv *priv)</div><div class='ctx'> 	exit_pending =</div><div class='ctx'> 		test_and_set_bit(STATUS_EXIT_PENDING, &amp;priv-&gt;status);</div><div class='ctx'> </div><div class='del'>-	/* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set</div><div class='del'>-	 * to prevent rearm timer */</div><div class='del'>-	del_timer_sync(&amp;priv-&gt;watchdog);</div><div class='del'>-</div><div class='ctx'> 	iwl_clear_ucode_stations(priv, NULL);</div><div class='ctx'> 	iwl_dealloc_bcast_stations(priv);</div><div class='ctx'> 	iwl_clear_driver_stations(priv);</div><div class='hunk'>@@ -800,9 +913,9 @@ void iwl_down(struct iwl_priv *priv)</div><div class='ctx'> 	priv-&gt;bt_status = 0;</div><div class='ctx'> 	priv-&gt;cur_rssi_ctx = NULL;</div><div class='ctx'> 	priv-&gt;bt_is_sco = 0;</div><div class='del'>-	if (cfg(priv)-&gt;bt_params)</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params)</div><div class='ctx'> 		priv-&gt;bt_traffic_load =</div><div class='del'>-			 cfg(priv)-&gt;bt_params-&gt;bt_init_traffic_load;</div><div class='add'>+			 priv-&gt;cfg-&gt;bt_params-&gt;bt_init_traffic_load;</div><div class='ctx'> 	else</div><div class='ctx'> 		priv-&gt;bt_traffic_load = 0;</div><div class='ctx'> 	priv-&gt;bt_full_concurrent = false;</div><div class='hunk'>@@ -817,18 +930,17 @@ void iwl_down(struct iwl_priv *priv)</div><div class='ctx'> 		ieee80211_stop_queues(priv-&gt;hw);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;ucode_loaded = false;</div><div class='del'>-	iwl_trans_stop_device(trans(priv));</div><div class='add'>+	iwl_trans_stop_device(priv-&gt;trans);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear out all status bits but a few that are stable across reset */</div><div class='ctx'> 	priv-&gt;status &amp;= test_bit(STATUS_RF_KILL_HW, &amp;priv-&gt;status) &lt;&lt;</div><div class='ctx'> 				STATUS_RF_KILL_HW |</div><div class='ctx'> 			test_bit(STATUS_GEO_CONFIGURED, &amp;priv-&gt;status) &lt;&lt;</div><div class='ctx'> 				STATUS_GEO_CONFIGURED |</div><div class='add'>+			test_bit(STATUS_FW_ERROR, &amp;priv-&gt;status) &lt;&lt;</div><div class='add'>+				STATUS_FW_ERROR |</div><div class='ctx'> 			test_bit(STATUS_EXIT_PENDING, &amp;priv-&gt;status) &lt;&lt;</div><div class='ctx'> 				STATUS_EXIT_PENDING;</div><div class='del'>-	priv-&gt;shrd-&gt;status &amp;=</div><div class='del'>-			test_bit(STATUS_FW_ERROR, &amp;priv-&gt;shrd-&gt;status) &lt;&lt;</div><div class='del'>-				STATUS_FW_ERROR;</div><div class='ctx'> </div><div class='ctx'> 	dev_kfree_skb(priv-&gt;beacon_skb);</div><div class='ctx'> 	priv-&gt;beacon_skb = NULL;</div><div class='hunk'>@@ -863,17 +975,15 @@ static void iwl_bg_run_time_calib_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> void iwlagn_prepare_restart(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct iwl_rxon_context *ctx;</div><div class='ctx'> 	bool bt_full_concurrent;</div><div class='ctx'> 	u8 bt_ci_compliance;</div><div class='ctx'> 	u8 bt_load;</div><div class='ctx'> 	u8 bt_status;</div><div class='ctx'> 	bool bt_is_sco;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;priv-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	for_each_context(priv, ctx)</div><div class='del'>-		ctx-&gt;vif = NULL;</div><div class='ctx'> 	priv-&gt;is_open = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -898,6 +1008,15 @@ void iwlagn_prepare_restart(struct iwl_priv *priv)</div><div class='ctx'> 	priv-&gt;bt_traffic_load = bt_load;</div><div class='ctx'> 	priv-&gt;bt_status = bt_status;</div><div class='ctx'> 	priv-&gt;bt_is_sco = bt_is_sco;</div><div class='add'>+</div><div class='add'>+	/* reset aggregation queues */</div><div class='add'>+	for (i = IWLAGN_FIRST_AMPDU_QUEUE; i &lt; IWL_MAX_HW_QUEUES; i++)</div><div class='add'>+		priv-&gt;queue_to_mac80211[i] = IWL_INVALID_MAC80211_QUEUE;</div><div class='add'>+	/* and stop counts */</div><div class='add'>+	for (i = 0; i &lt; IWL_MAX_HW_QUEUES; i++)</div><div class='add'>+		atomic_set(&amp;priv-&gt;queue_stop_count[i], 0);</div><div class='add'>+</div><div class='add'>+	memset(priv-&gt;agg_q_alloc, 0, sizeof(priv-&gt;agg_q_alloc));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void iwl_bg_restart(struct work_struct *data)</div><div class='hunk'>@@ -907,7 +1026,7 @@ static void iwl_bg_restart(struct work_struct *data)</div><div class='ctx'> 	if (test_bit(STATUS_EXIT_PENDING, &amp;priv-&gt;status))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (test_and_clear_bit(STATUS_FW_ERROR, &amp;priv-&gt;shrd-&gt;status)) {</div><div class='add'>+	if (test_and_clear_bit(STATUS_FW_ERROR, &amp;priv-&gt;status)) {</div><div class='ctx'> 		mutex_lock(&amp;priv-&gt;mutex);</div><div class='ctx'> 		iwlagn_prepare_restart(priv);</div><div class='ctx'> 		mutex_unlock(&amp;priv-&gt;mutex);</div><div class='hunk'>@@ -959,7 +1078,7 @@ static void iwlagn_disable_roc_work(struct work_struct *work)</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='del'>-static void iwl_setup_deferred_work(struct iwl_priv *priv)</div><div class='add'>+void iwl_setup_deferred_work(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	priv-&gt;workqueue = create_singlethread_workqueue(DRV_NAME);</div><div class='ctx'> </div><div class='hunk'>@@ -974,7 +1093,7 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	iwl_setup_scan_deferred_work(priv);</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;bt_params)</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params)</div><div class='ctx'> 		iwlagn_bt_setup_deferred_work(priv);</div><div class='ctx'> </div><div class='ctx'> 	init_timer(&amp;priv-&gt;statistics_periodic);</div><div class='hunk'>@@ -984,15 +1103,11 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)</div><div class='ctx'> 	init_timer(&amp;priv-&gt;ucode_trace);</div><div class='ctx'> 	priv-&gt;ucode_trace.data = (unsigned long)priv;</div><div class='ctx'> 	priv-&gt;ucode_trace.function = iwl_bg_ucode_trace;</div><div class='del'>-</div><div class='del'>-	init_timer(&amp;priv-&gt;watchdog);</div><div class='del'>-	priv-&gt;watchdog.data = (unsigned long)priv;</div><div class='del'>-	priv-&gt;watchdog.function = iwl_bg_watchdog;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void iwl_cancel_deferred_work(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	if (cfg(priv)-&gt;bt_params)</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params)</div><div class='ctx'> 		iwlagn_bt_cancel_deferred_work(priv);</div><div class='ctx'> </div><div class='ctx'> 	cancel_work_sync(&amp;priv-&gt;run_time_calib_work);</div><div class='hunk'>@@ -1028,7 +1143,193 @@ static void iwl_init_hw_rates(struct ieee80211_rate *rates)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwl_init_drv(struct iwl_priv *priv)</div><div class='add'>+#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */</div><div class='add'>+#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */</div><div class='add'>+static void iwl_init_ht_hw_capab(const struct iwl_priv *priv,</div><div class='add'>+			      struct ieee80211_sta_ht_cap *ht_info,</div><div class='add'>+			      enum ieee80211_band band)</div><div class='add'>+{</div><div class='add'>+	u16 max_bit_rate = 0;</div><div class='add'>+	u8 rx_chains_num = priv-&gt;hw_params.rx_chains_num;</div><div class='add'>+	u8 tx_chains_num = priv-&gt;hw_params.tx_chains_num;</div><div class='add'>+</div><div class='add'>+	ht_info-&gt;cap = 0;</div><div class='add'>+	memset(&amp;ht_info-&gt;mcs, 0, sizeof(ht_info-&gt;mcs));</div><div class='add'>+</div><div class='add'>+	ht_info-&gt;ht_supported = true;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;cfg-&gt;ht_params &amp;&amp;</div><div class='add'>+	    priv-&gt;cfg-&gt;ht_params-&gt;ht_greenfield_support)</div><div class='add'>+		ht_info-&gt;cap |= IEEE80211_HT_CAP_GRN_FLD;</div><div class='add'>+	ht_info-&gt;cap |= IEEE80211_HT_CAP_SGI_20;</div><div class='add'>+	max_bit_rate = MAX_BIT_RATE_20_MHZ;</div><div class='add'>+	if (priv-&gt;hw_params.ht40_channel &amp; BIT(band)) {</div><div class='add'>+		ht_info-&gt;cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;</div><div class='add'>+		ht_info-&gt;cap |= IEEE80211_HT_CAP_SGI_40;</div><div class='add'>+		ht_info-&gt;mcs.rx_mask[4] = 0x01;</div><div class='add'>+		max_bit_rate = MAX_BIT_RATE_40_MHZ;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (iwlwifi_mod_params.amsdu_size_8K)</div><div class='add'>+		ht_info-&gt;cap |= IEEE80211_HT_CAP_MAX_AMSDU;</div><div class='add'>+</div><div class='add'>+	ht_info-&gt;ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;</div><div class='add'>+	ht_info-&gt;ampdu_density = CFG_HT_MPDU_DENSITY_DEF;</div><div class='add'>+</div><div class='add'>+	ht_info-&gt;mcs.rx_mask[0] = 0xFF;</div><div class='add'>+	if (rx_chains_num &gt;= 2)</div><div class='add'>+		ht_info-&gt;mcs.rx_mask[1] = 0xFF;</div><div class='add'>+	if (rx_chains_num &gt;= 3)</div><div class='add'>+		ht_info-&gt;mcs.rx_mask[2] = 0xFF;</div><div class='add'>+</div><div class='add'>+	/* Highest supported Rx data rate */</div><div class='add'>+	max_bit_rate *= rx_chains_num;</div><div class='add'>+	WARN_ON(max_bit_rate &amp; ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);</div><div class='add'>+	ht_info-&gt;mcs.rx_highest = cpu_to_le16(max_bit_rate);</div><div class='add'>+</div><div class='add'>+	/* Tx MCS capabilities */</div><div class='add'>+	ht_info-&gt;mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;</div><div class='add'>+	if (tx_chains_num != rx_chains_num) {</div><div class='add'>+		ht_info-&gt;mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;</div><div class='add'>+		ht_info-&gt;mcs.tx_params |= ((tx_chains_num - 1) &lt;&lt;</div><div class='add'>+				IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom</div><div class='add'>+ */</div><div class='add'>+static int iwl_init_geos(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct iwl_channel_info *ch;</div><div class='add'>+	struct ieee80211_supported_band *sband;</div><div class='add'>+	struct ieee80211_channel *channels;</div><div class='add'>+	struct ieee80211_channel *geo_ch;</div><div class='add'>+	struct ieee80211_rate *rates;</div><div class='add'>+	int i = 0;</div><div class='add'>+	s8 max_tx_power = IWLAGN_TX_POWER_TARGET_POWER_MIN;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;bands[IEEE80211_BAND_2GHZ].n_bitrates ||</div><div class='add'>+	    priv-&gt;bands[IEEE80211_BAND_5GHZ].n_bitrates) {</div><div class='add'>+		IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");</div><div class='add'>+		set_bit(STATUS_GEO_CONFIGURED, &amp;priv-&gt;status);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	channels = kcalloc(priv-&gt;channel_count,</div><div class='add'>+			   sizeof(struct ieee80211_channel), GFP_KERNEL);</div><div class='add'>+	if (!channels)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rates = kcalloc(IWL_RATE_COUNT_LEGACY, sizeof(struct ieee80211_rate),</div><div class='add'>+			GFP_KERNEL);</div><div class='add'>+	if (!rates) {</div><div class='add'>+		kfree(channels);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 5.2GHz channels start after the 2.4GHz channels */</div><div class='add'>+	sband = &amp;priv-&gt;bands[IEEE80211_BAND_5GHZ];</div><div class='add'>+	sband-&gt;channels = &amp;channels[ARRAY_SIZE(iwl_eeprom_band_1)];</div><div class='add'>+	/* just OFDM */</div><div class='add'>+	sband-&gt;bitrates = &amp;rates[IWL_FIRST_OFDM_RATE];</div><div class='add'>+	sband-&gt;n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;hw_params.sku &amp; EEPROM_SKU_CAP_11N_ENABLE)</div><div class='add'>+		iwl_init_ht_hw_capab(priv, &amp;sband-&gt;ht_cap,</div><div class='add'>+					 IEEE80211_BAND_5GHZ);</div><div class='add'>+</div><div class='add'>+	sband = &amp;priv-&gt;bands[IEEE80211_BAND_2GHZ];</div><div class='add'>+	sband-&gt;channels = channels;</div><div class='add'>+	/* OFDM &amp; CCK */</div><div class='add'>+	sband-&gt;bitrates = rates;</div><div class='add'>+	sband-&gt;n_bitrates = IWL_RATE_COUNT_LEGACY;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;hw_params.sku &amp; EEPROM_SKU_CAP_11N_ENABLE)</div><div class='add'>+		iwl_init_ht_hw_capab(priv, &amp;sband-&gt;ht_cap,</div><div class='add'>+					 IEEE80211_BAND_2GHZ);</div><div class='add'>+</div><div class='add'>+	priv-&gt;ieee_channels = channels;</div><div class='add'>+	priv-&gt;ieee_rates = rates;</div><div class='add'>+</div><div class='add'>+	for (i = 0;  i &lt; priv-&gt;channel_count; i++) {</div><div class='add'>+		ch = &amp;priv-&gt;channel_info[i];</div><div class='add'>+</div><div class='add'>+		/* FIXME: might be removed if scan is OK */</div><div class='add'>+		if (!is_channel_valid(ch))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		sband =  &amp;priv-&gt;bands[ch-&gt;band];</div><div class='add'>+</div><div class='add'>+		geo_ch = &amp;sband-&gt;channels[sband-&gt;n_channels++];</div><div class='add'>+</div><div class='add'>+		geo_ch-&gt;center_freq =</div><div class='add'>+			ieee80211_channel_to_frequency(ch-&gt;channel, ch-&gt;band);</div><div class='add'>+		geo_ch-&gt;max_power = ch-&gt;max_power_avg;</div><div class='add'>+		geo_ch-&gt;max_antenna_gain = 0xff;</div><div class='add'>+		geo_ch-&gt;hw_value = ch-&gt;channel;</div><div class='add'>+</div><div class='add'>+		if (is_channel_valid(ch)) {</div><div class='add'>+			if (!(ch-&gt;flags &amp; EEPROM_CHANNEL_IBSS))</div><div class='add'>+				geo_ch-&gt;flags |= IEEE80211_CHAN_NO_IBSS;</div><div class='add'>+</div><div class='add'>+			if (!(ch-&gt;flags &amp; EEPROM_CHANNEL_ACTIVE))</div><div class='add'>+				geo_ch-&gt;flags |= IEEE80211_CHAN_PASSIVE_SCAN;</div><div class='add'>+</div><div class='add'>+			if (ch-&gt;flags &amp; EEPROM_CHANNEL_RADAR)</div><div class='add'>+				geo_ch-&gt;flags |= IEEE80211_CHAN_RADAR;</div><div class='add'>+</div><div class='add'>+			geo_ch-&gt;flags |= ch-&gt;ht40_extension_channel;</div><div class='add'>+</div><div class='add'>+			if (ch-&gt;max_power_avg &gt; max_tx_power)</div><div class='add'>+				max_tx_power = ch-&gt;max_power_avg;</div><div class='add'>+		} else {</div><div class='add'>+			geo_ch-&gt;flags |= IEEE80211_CHAN_DISABLED;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",</div><div class='add'>+				ch-&gt;channel, geo_ch-&gt;center_freq,</div><div class='add'>+				is_channel_a_band(ch) ?  "5.2" : "2.4",</div><div class='add'>+				geo_ch-&gt;flags &amp; IEEE80211_CHAN_DISABLED ?</div><div class='add'>+				"restricted" : "valid",</div><div class='add'>+				 geo_ch-&gt;flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_power_device_lmt = max_tx_power;</div><div class='add'>+	priv-&gt;tx_power_user_lmt = max_tx_power;</div><div class='add'>+	priv-&gt;tx_power_next = max_tx_power;</div><div class='add'>+</div><div class='add'>+	if ((priv-&gt;bands[IEEE80211_BAND_5GHZ].n_channels == 0) &amp;&amp;</div><div class='add'>+	     priv-&gt;hw_params.sku &amp; EEPROM_SKU_CAP_BAND_52GHZ) {</div><div class='add'>+		IWL_INFO(priv, "Incorrectly detected BG card as ABG. "</div><div class='add'>+			"Please send your %s to maintainer.\n",</div><div class='add'>+			priv-&gt;trans-&gt;hw_id_str);</div><div class='add'>+		priv-&gt;hw_params.sku &amp;= ~EEPROM_SKU_CAP_BAND_52GHZ;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (iwlwifi_mod_params.disable_5ghz)</div><div class='add'>+		priv-&gt;bands[IEEE80211_BAND_5GHZ].n_channels = 0;</div><div class='add'>+</div><div class='add'>+	IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",</div><div class='add'>+		   priv-&gt;bands[IEEE80211_BAND_2GHZ].n_channels,</div><div class='add'>+		   priv-&gt;bands[IEEE80211_BAND_5GHZ].n_channels);</div><div class='add'>+</div><div class='add'>+	set_bit(STATUS_GEO_CONFIGURED, &amp;priv-&gt;status);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * iwl_free_geos - undo allocations in iwl_init_geos</div><div class='add'>+ */</div><div class='add'>+static void iwl_free_geos(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	kfree(priv-&gt;ieee_channels);</div><div class='add'>+	kfree(priv-&gt;ieee_rates);</div><div class='add'>+	clear_bit(STATUS_GEO_CONFIGURED, &amp;priv-&gt;status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int iwl_init_drv(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1043,7 +1344,7 @@ static int iwl_init_drv(struct iwl_priv *priv)</div><div class='ctx'> 	priv-&gt;band = IEEE80211_BAND_2GHZ;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;plcp_delta_threshold =</div><div class='del'>-		cfg(priv)-&gt;base_params-&gt;plcp_delta_threshold;</div><div class='add'>+		priv-&gt;cfg-&gt;base_params-&gt;plcp_delta_threshold;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;iw_mode = NL80211_IFTYPE_STATION;</div><div class='ctx'> 	priv-&gt;current_ht_config.smps = IEEE80211_SMPS_STATIC;</div><div class='hunk'>@@ -1052,12 +1353,6 @@ static int iwl_init_drv(struct iwl_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;ucode_owner = IWL_OWNERSHIP_DRIVER;</div><div class='ctx'> </div><div class='del'>-	/* initialize force reset */</div><div class='del'>-	priv-&gt;force_reset[IWL_RF_RESET].reset_duration =</div><div class='del'>-		IWL_DELAY_NEXT_FORCE_RF_RESET;</div><div class='del'>-	priv-&gt;force_reset[IWL_FW_RESET].reset_duration =</div><div class='del'>-		IWL_DELAY_NEXT_FORCE_FW_RELOAD;</div><div class='del'>-</div><div class='ctx'> 	priv-&gt;rx_statistics_jiffies = jiffies;</div><div class='ctx'> </div><div class='ctx'> 	/* Choose which receivers/antennas to use */</div><div class='hunk'>@@ -1066,8 +1361,8 @@ static int iwl_init_drv(struct iwl_priv *priv)</div><div class='ctx'> 	iwl_init_scan_params(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* init bt coex */</div><div class='del'>-	if (cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+	    priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='ctx'> 		priv-&gt;kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;</div><div class='ctx'> 		priv-&gt;kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;</div><div class='ctx'> 		priv-&gt;bt_valid = IWLAGN_BT_ALL_VALID_MSK;</div><div class='hunk'>@@ -1097,7 +1392,7 @@ err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_uninit_drv(struct iwl_priv *priv)</div><div class='add'>+void iwl_uninit_drv(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	iwl_free_geos(priv);</div><div class='ctx'> 	iwl_free_channel_map(priv);</div><div class='hunk'>@@ -1110,75 +1405,59 @@ static void iwl_uninit_drv(struct iwl_priv *priv)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Size of one Rx buffer in host DRAM */</div><div class='del'>-#define IWL_RX_BUF_SIZE_4K (4 * 1024)</div><div class='del'>-#define IWL_RX_BUF_SIZE_8K (8 * 1024)</div><div class='del'>-</div><div class='del'>-static void iwl_set_hw_params(struct iwl_priv *priv)</div><div class='add'>+void iwl_set_hw_params(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	if (cfg(priv)-&gt;ht_params)</div><div class='del'>-		hw_params(priv).use_rts_for_aggregation =</div><div class='del'>-			cfg(priv)-&gt;ht_params-&gt;use_rts_for_aggregation;</div><div class='del'>-</div><div class='del'>-	if (iwlagn_mod_params.amsdu_size_8K)</div><div class='del'>-		hw_params(priv).rx_page_order =</div><div class='del'>-			get_order(IWL_RX_BUF_SIZE_8K);</div><div class='del'>-	else</div><div class='del'>-		hw_params(priv).rx_page_order =</div><div class='del'>-			get_order(IWL_RX_BUF_SIZE_4K);</div><div class='add'>+	if (priv-&gt;cfg-&gt;ht_params)</div><div class='add'>+		priv-&gt;hw_params.use_rts_for_aggregation =</div><div class='add'>+			priv-&gt;cfg-&gt;ht_params-&gt;use_rts_for_aggregation;</div><div class='ctx'> </div><div class='del'>-	if (iwlagn_mod_params.disable_11n &amp; IWL_DISABLE_HT_ALL)</div><div class='del'>-		hw_params(priv).sku &amp;= ~EEPROM_SKU_CAP_11N_ENABLE;</div><div class='del'>-</div><div class='del'>-	hw_params(priv).num_ampdu_queues =</div><div class='del'>-		cfg(priv)-&gt;base_params-&gt;num_of_ampdu_queues;</div><div class='del'>-	hw_params(priv).wd_timeout = cfg(priv)-&gt;base_params-&gt;wd_timeout;</div><div class='add'>+	if (iwlwifi_mod_params.disable_11n &amp; IWL_DISABLE_HT_ALL)</div><div class='add'>+		priv-&gt;hw_params.sku &amp;= ~EEPROM_SKU_CAP_11N_ENABLE;</div><div class='ctx'> </div><div class='ctx'> 	/* Device-specific setup */</div><div class='del'>-	cfg(priv)-&gt;lib-&gt;set_hw_params(priv);</div><div class='add'>+	priv-&gt;lib-&gt;set_hw_params(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static void iwl_debug_config(struct iwl_priv *priv)</div><div class='add'>+/* show what optional capabilities we have */</div><div class='add'>+void iwl_option_config(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	dev_printk(KERN_INFO, trans(priv)-&gt;dev, "CONFIG_IWLWIFI_DEBUG "</div><div class='ctx'> #ifdef CONFIG_IWLWIFI_DEBUG</div><div class='del'>-		"enabled\n");</div><div class='add'>+	IWL_INFO(priv, "CONFIG_IWLWIFI_DEBUG enabled\n");</div><div class='ctx'> #else</div><div class='del'>-		"disabled\n");</div><div class='add'>+	IWL_INFO(priv, "CONFIG_IWLWIFI_DEBUG disabled\n");</div><div class='ctx'> #endif</div><div class='del'>-	dev_printk(KERN_INFO, trans(priv)-&gt;dev, "CONFIG_IWLWIFI_DEBUGFS "</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_IWLWIFI_DEBUGFS</div><div class='del'>-		"enabled\n");</div><div class='add'>+	IWL_INFO(priv, "CONFIG_IWLWIFI_DEBUGFS enabled\n");</div><div class='ctx'> #else</div><div class='del'>-		"disabled\n");</div><div class='add'>+	IWL_INFO(priv, "CONFIG_IWLWIFI_DEBUGFS disabled\n");</div><div class='ctx'> #endif</div><div class='del'>-	dev_printk(KERN_INFO, trans(priv)-&gt;dev, "CONFIG_IWLWIFI_DEVICE_TRACING "</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_IWLWIFI_DEVICE_TRACING</div><div class='del'>-		"enabled\n");</div><div class='add'>+	IWL_INFO(priv, "CONFIG_IWLWIFI_DEVICE_TRACING enabled\n");</div><div class='ctx'> #else</div><div class='del'>-		"disabled\n");</div><div class='add'>+	IWL_INFO(priv, "CONFIG_IWLWIFI_DEVICE_TRACING disabled\n");</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	dev_printk(KERN_INFO, trans(priv)-&gt;dev, "CONFIG_IWLWIFI_DEVICE_TESTMODE "</div><div class='ctx'> #ifdef CONFIG_IWLWIFI_DEVICE_TESTMODE</div><div class='del'>-		"enabled\n");</div><div class='add'>+	IWL_INFO(priv, "CONFIG_IWLWIFI_DEVICE_TESTMODE enabled\n");</div><div class='ctx'> #else</div><div class='del'>-		"disabled\n");</div><div class='add'>+	IWL_INFO(priv, "CONFIG_IWLWIFI_DEVICE_TESTMODE disabled\n");</div><div class='ctx'> #endif</div><div class='del'>-	dev_printk(KERN_INFO, trans(priv)-&gt;dev, "CONFIG_IWLWIFI_P2P "</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_IWLWIFI_P2P</div><div class='del'>-		"enabled\n");</div><div class='add'>+	IWL_INFO(priv, "CONFIG_IWLWIFI_P2P enabled\n");</div><div class='ctx'> #else</div><div class='del'>-		"disabled\n");</div><div class='add'>+	IWL_INFO(priv, "CONFIG_IWLWIFI_P2P disabled\n");</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct iwl_op_mode *iwl_op_mode_dvm_start(struct iwl_trans *trans,</div><div class='add'>+						 const struct iwl_cfg *cfg,</div><div class='ctx'> 						 const struct iwl_fw *fw)</div><div class='ctx'> {</div><div class='del'>-	int err = 0;</div><div class='ctx'> 	struct iwl_priv *priv;</div><div class='ctx'> 	struct ieee80211_hw *hw;</div><div class='ctx'> 	struct iwl_op_mode *op_mode;</div><div class='hunk'>@@ -1193,25 +1472,60 @@ static struct iwl_op_mode *iwl_op_mode_dvm_start(struct iwl_trans *trans,</div><div class='ctx'> 		STATISTICS_NOTIFICATION,</div><div class='ctx'> 		REPLY_TX,</div><div class='ctx'> 	};</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	/************************</div><div class='ctx'> 	 * 1. Allocating HW data</div><div class='ctx'> 	 ************************/</div><div class='ctx'> 	hw = iwl_alloc_all();</div><div class='ctx'> 	if (!hw) {</div><div class='del'>-		pr_err("%s: Cannot allocate network device\n",</div><div class='del'>-				cfg(trans)-&gt;name);</div><div class='del'>-		err = -ENOMEM;</div><div class='add'>+		pr_err("%s: Cannot allocate network device\n", cfg-&gt;name);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	op_mode = hw-&gt;priv;</div><div class='ctx'> 	op_mode-&gt;ops = &amp;iwl_dvm_ops;</div><div class='ctx'> 	priv = IWL_OP_MODE_GET_DVM(op_mode);</div><div class='del'>-	priv-&gt;shrd = trans-&gt;shrd;</div><div class='add'>+	priv-&gt;trans = trans;</div><div class='add'>+	priv-&gt;dev = trans-&gt;dev;</div><div class='add'>+	priv-&gt;cfg = cfg;</div><div class='ctx'> 	priv-&gt;fw = fw;</div><div class='del'>-	/* TODO: remove fw from shared data later */</div><div class='del'>-	priv-&gt;shrd-&gt;fw = fw;</div><div class='add'>+</div><div class='add'>+	switch (priv-&gt;cfg-&gt;device_family) {</div><div class='add'>+	case IWL_DEVICE_FAMILY_1000:</div><div class='add'>+	case IWL_DEVICE_FAMILY_100:</div><div class='add'>+		priv-&gt;lib = &amp;iwl1000_lib;</div><div class='add'>+		break;</div><div class='add'>+	case IWL_DEVICE_FAMILY_2000:</div><div class='add'>+	case IWL_DEVICE_FAMILY_105:</div><div class='add'>+		priv-&gt;lib = &amp;iwl2000_lib;</div><div class='add'>+		break;</div><div class='add'>+	case IWL_DEVICE_FAMILY_2030:</div><div class='add'>+	case IWL_DEVICE_FAMILY_135:</div><div class='add'>+		priv-&gt;lib = &amp;iwl2030_lib;</div><div class='add'>+		break;</div><div class='add'>+	case IWL_DEVICE_FAMILY_5000:</div><div class='add'>+		priv-&gt;lib = &amp;iwl5000_lib;</div><div class='add'>+		break;</div><div class='add'>+	case IWL_DEVICE_FAMILY_5150:</div><div class='add'>+		priv-&gt;lib = &amp;iwl5150_lib;</div><div class='add'>+		break;</div><div class='add'>+	case IWL_DEVICE_FAMILY_6000:</div><div class='add'>+	case IWL_DEVICE_FAMILY_6005:</div><div class='add'>+	case IWL_DEVICE_FAMILY_6000i:</div><div class='add'>+	case IWL_DEVICE_FAMILY_6050:</div><div class='add'>+	case IWL_DEVICE_FAMILY_6150:</div><div class='add'>+		priv-&gt;lib = &amp;iwl6000_lib;</div><div class='add'>+		break;</div><div class='add'>+	case IWL_DEVICE_FAMILY_6030:</div><div class='add'>+		priv-&gt;lib = &amp;iwl6030_lib;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(!priv-&gt;lib))</div><div class='add'>+		goto out_free_hw;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Populate the state variables that the transport layer needs</div><div class='hunk'>@@ -1220,87 +1534,90 @@ static struct iwl_op_mode *iwl_op_mode_dvm_start(struct iwl_trans *trans,</div><div class='ctx'> 	trans_cfg.op_mode = op_mode;</div><div class='ctx'> 	trans_cfg.no_reclaim_cmds = no_reclaim_cmds;</div><div class='ctx'> 	trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds);</div><div class='add'>+	trans_cfg.rx_buf_size_8k = iwlwifi_mod_params.amsdu_size_8K;</div><div class='add'>+	if (!iwlwifi_mod_params.wd_disable)</div><div class='add'>+		trans_cfg.queue_watchdog_timeout =</div><div class='add'>+			priv-&gt;cfg-&gt;base_params-&gt;wd_timeout;</div><div class='add'>+	else</div><div class='add'>+		trans_cfg.queue_watchdog_timeout = IWL_WATCHHDOG_DISABLED;</div><div class='add'>+	trans_cfg.command_names = iwl_dvm_cmd_strings;</div><div class='ctx'> </div><div class='ctx'> 	ucode_flags = fw-&gt;ucode_capa.flags;</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_IWLWIFI_P2P</div><div class='del'>-	ucode_flags &amp;= ~IWL_UCODE_TLV_FLAGS_PAN;</div><div class='add'>+	ucode_flags &amp;= ~IWL_UCODE_TLV_FLAGS_P2P;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	if (ucode_flags &amp; IWL_UCODE_TLV_FLAGS_PAN) {</div><div class='ctx'> 		priv-&gt;sta_key_max_num = STA_KEY_MAX_NUM_PAN;</div><div class='ctx'> 		trans_cfg.cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;</div><div class='add'>+		trans_cfg.queue_to_fifo = iwlagn_ipan_queue_to_tx_fifo;</div><div class='add'>+		trans_cfg.n_queue_to_fifo =</div><div class='add'>+			ARRAY_SIZE(iwlagn_ipan_queue_to_tx_fifo);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		priv-&gt;sta_key_max_num = STA_KEY_MAX_NUM;</div><div class='ctx'> 		trans_cfg.cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;</div><div class='add'>+		trans_cfg.queue_to_fifo = iwlagn_default_queue_to_tx_fifo;</div><div class='add'>+		trans_cfg.n_queue_to_fifo =</div><div class='add'>+			ARRAY_SIZE(iwlagn_default_queue_to_tx_fifo);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Configure transport layer */</div><div class='del'>-	iwl_trans_configure(trans(priv), &amp;trans_cfg);</div><div class='add'>+	iwl_trans_configure(priv-&gt;trans, &amp;trans_cfg);</div><div class='ctx'> </div><div class='ctx'> 	/* At this point both hw and priv are allocated. */</div><div class='ctx'> </div><div class='del'>-	SET_IEEE80211_DEV(priv-&gt;hw, trans(priv)-&gt;dev);</div><div class='add'>+	SET_IEEE80211_DEV(priv-&gt;hw, priv-&gt;trans-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	/* show what debugging capabilities we have */</div><div class='del'>-	iwl_debug_config(priv);</div><div class='add'>+	iwl_option_config(priv);</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");</div><div class='ctx'> </div><div class='ctx'> 	/* is antenna coupling more than 35dB ? */</div><div class='ctx'> 	priv-&gt;bt_ant_couple_ok =</div><div class='del'>-		(iwlagn_mod_params.ant_coupling &gt;</div><div class='add'>+		(iwlwifi_mod_params.ant_coupling &gt;</div><div class='ctx'> 			IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?</div><div class='ctx'> 			true : false;</div><div class='ctx'> </div><div class='ctx'> 	/* enable/disable bt channel inhibition */</div><div class='del'>-	priv-&gt;bt_ch_announce = iwlagn_mod_params.bt_ch_announce;</div><div class='add'>+	priv-&gt;bt_ch_announce = iwlwifi_mod_params.bt_ch_announce;</div><div class='ctx'> 	IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n",</div><div class='ctx'> 		       (priv-&gt;bt_ch_announce) ? "On" : "Off");</div><div class='ctx'> </div><div class='del'>-	if (iwl_alloc_traffic_mem(priv))</div><div class='del'>-		IWL_ERR(priv, "Not enough memory to generate traffic log\n");</div><div class='del'>-</div><div class='ctx'> 	/* these spin locks will be used in apm_ops.init and EEPROM access</div><div class='ctx'> 	 * we should init now</div><div class='ctx'> 	 */</div><div class='del'>-	spin_lock_init(&amp;trans(priv)-&gt;reg_lock);</div><div class='ctx'> 	spin_lock_init(&amp;priv-&gt;statistics.lock);</div><div class='ctx'> </div><div class='ctx'> 	/***********************</div><div class='ctx'> 	 * 2. Read REV register</div><div class='ctx'> 	 ***********************/</div><div class='ctx'> 	IWL_INFO(priv, "Detected %s, REV=0x%X\n",</div><div class='del'>-		cfg(priv)-&gt;name, trans(priv)-&gt;hw_rev);</div><div class='add'>+		priv-&gt;cfg-&gt;name, priv-&gt;trans-&gt;hw_rev);</div><div class='ctx'> </div><div class='del'>-	err = iwl_trans_start_hw(trans(priv));</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_free_traffic_mem;</div><div class='add'>+	if (iwl_trans_start_hw(priv-&gt;trans))</div><div class='add'>+		goto out_free_hw;</div><div class='ctx'> </div><div class='del'>-	/*****************</div><div class='del'>-	 * 3. Read EEPROM</div><div class='del'>-	 *****************/</div><div class='del'>-	err = iwl_eeprom_init(trans(priv), trans(priv)-&gt;hw_rev);</div><div class='del'>-	/* Reset chip to save power until we load uCode during "up". */</div><div class='del'>-	iwl_trans_stop_hw(trans(priv));</div><div class='del'>-	if (err) {</div><div class='add'>+	/* Read the EEPROM */</div><div class='add'>+	if (iwl_eeprom_init(priv, priv-&gt;trans-&gt;hw_rev)) {</div><div class='ctx'> 		IWL_ERR(priv, "Unable to init EEPROM\n");</div><div class='del'>-		goto out_free_traffic_mem;</div><div class='add'>+		goto out_free_hw;</div><div class='ctx'> 	}</div><div class='del'>-	err = iwl_eeprom_check_version(priv);</div><div class='del'>-	if (err)</div><div class='add'>+	/* Reset chip to save power until we load uCode during "up". */</div><div class='add'>+	iwl_trans_stop_hw(priv-&gt;trans, false);</div><div class='add'>+</div><div class='add'>+	if (iwl_eeprom_check_version(priv))</div><div class='ctx'> 		goto out_free_eeprom;</div><div class='ctx'> </div><div class='del'>-	err = iwl_eeprom_init_hw_params(priv);</div><div class='del'>-	if (err)</div><div class='add'>+	if (iwl_eeprom_init_hw_params(priv))</div><div class='ctx'> 		goto out_free_eeprom;</div><div class='ctx'> </div><div class='ctx'> 	/* extract MAC Address */</div><div class='del'>-	iwl_eeprom_get_mac(priv-&gt;shrd, priv-&gt;addresses[0].addr);</div><div class='add'>+	iwl_eeprom_get_mac(priv, priv-&gt;addresses[0].addr);</div><div class='ctx'> 	IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv-&gt;addresses[0].addr);</div><div class='ctx'> 	priv-&gt;hw-&gt;wiphy-&gt;addresses = priv-&gt;addresses;</div><div class='ctx'> 	priv-&gt;hw-&gt;wiphy-&gt;n_addresses = 1;</div><div class='del'>-	num_mac = iwl_eeprom_query16(priv-&gt;shrd, EEPROM_NUM_MAC_ADDRESS);</div><div class='add'>+	num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);</div><div class='ctx'> 	if (num_mac &gt; 1) {</div><div class='ctx'> 		memcpy(priv-&gt;addresses[1].addr, priv-&gt;addresses[0].addr,</div><div class='ctx'> 		       ETH_ALEN);</div><div class='hunk'>@@ -1313,7 +1630,7 @@ static struct iwl_op_mode *iwl_op_mode_dvm_start(struct iwl_trans *trans,</div><div class='ctx'> 	 ************************/</div><div class='ctx'> 	iwl_set_hw_params(priv);</div><div class='ctx'> </div><div class='del'>-	if (!(hw_params(priv).sku &amp; EEPROM_SKU_CAP_IPAN_ENABLE)) {</div><div class='add'>+	if (!(priv-&gt;hw_params.sku &amp; EEPROM_SKU_CAP_IPAN_ENABLE)) {</div><div class='ctx'> 		IWL_DEBUG_INFO(priv, "Your EEPROM disabled PAN");</div><div class='ctx'> 		ucode_flags &amp;= ~IWL_UCODE_TLV_FLAGS_PAN;</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1323,18 +1640,32 @@ static struct iwl_op_mode *iwl_op_mode_dvm_start(struct iwl_trans *trans,</div><div class='ctx'> 		ucode_flags &amp;= ~IWL_UCODE_TLV_FLAGS_P2P;</div><div class='ctx'> 		priv-&gt;sta_key_max_num = STA_KEY_MAX_NUM;</div><div class='ctx'> 		trans_cfg.cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;</div><div class='add'>+		trans_cfg.queue_to_fifo = iwlagn_default_queue_to_tx_fifo;</div><div class='add'>+		trans_cfg.n_queue_to_fifo =</div><div class='add'>+			ARRAY_SIZE(iwlagn_default_queue_to_tx_fifo);</div><div class='ctx'> </div><div class='ctx'> 		/* Configure transport layer again*/</div><div class='del'>-		iwl_trans_configure(trans(priv), &amp;trans_cfg);</div><div class='add'>+		iwl_trans_configure(priv-&gt;trans, &amp;trans_cfg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*******************</div><div class='ctx'> 	 * 5. Setup priv</div><div class='ctx'> 	 *******************/</div><div class='add'>+	for (i = 0; i &lt; IWL_MAX_HW_QUEUES; i++) {</div><div class='add'>+		priv-&gt;queue_to_mac80211[i] = IWL_INVALID_MAC80211_QUEUE;</div><div class='add'>+		if (i &lt; IWLAGN_FIRST_AMPDU_QUEUE &amp;&amp;</div><div class='add'>+		    i != IWL_DEFAULT_CMD_QUEUE_NUM &amp;&amp;</div><div class='add'>+		    i != IWL_IPAN_CMD_QUEUE_NUM)</div><div class='add'>+			priv-&gt;queue_to_mac80211[i] = i;</div><div class='add'>+		atomic_set(&amp;priv-&gt;queue_stop_count[i], 0);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	err = iwl_init_drv(priv);</div><div class='del'>-	if (err)</div><div class='add'>+	WARN_ON(trans_cfg.queue_to_fifo[trans_cfg.cmd_queue] !=</div><div class='add'>+						IWLAGN_CMD_FIFO_NUM);</div><div class='add'>+</div><div class='add'>+	if (iwl_init_drv(priv))</div><div class='ctx'> 		goto out_free_eeprom;</div><div class='add'>+</div><div class='ctx'> 	/* At this point both hw and priv are initialized. */</div><div class='ctx'> </div><div class='ctx'> 	/********************</div><div class='hunk'>@@ -1367,15 +1698,12 @@ static struct iwl_op_mode *iwl_op_mode_dvm_start(struct iwl_trans *trans,</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * 7. Setup and register with mac80211 and debugfs</div><div class='ctx'> 	 **************************************************/</div><div class='del'>-	err = iwlagn_mac_setup_register(priv, &amp;fw-&gt;ucode_capa);</div><div class='del'>-	if (err)</div><div class='add'>+	if (iwlagn_mac_setup_register(priv, &amp;fw-&gt;ucode_capa))</div><div class='ctx'> 		goto out_destroy_workqueue;</div><div class='ctx'> </div><div class='del'>-	err = iwl_dbgfs_register(priv, DRV_NAME);</div><div class='del'>-	if (err)</div><div class='add'>+	if (iwl_dbgfs_register(priv, DRV_NAME))</div><div class='ctx'> 		IWL_ERR(priv,</div><div class='del'>-			"failed to create debugfs files. Ignoring error: %d\n",</div><div class='del'>-			err);</div><div class='add'>+			"failed to create debugfs files. Ignoring error\n");</div><div class='ctx'> </div><div class='ctx'> 	return op_mode;</div><div class='ctx'> </div><div class='hunk'>@@ -1384,16 +1712,15 @@ out_destroy_workqueue:</div><div class='ctx'> 	priv-&gt;workqueue = NULL;</div><div class='ctx'> 	iwl_uninit_drv(priv);</div><div class='ctx'> out_free_eeprom:</div><div class='del'>-	iwl_eeprom_free(priv-&gt;shrd);</div><div class='del'>-out_free_traffic_mem:</div><div class='del'>-	iwl_free_traffic_mem(priv);</div><div class='add'>+	iwl_eeprom_free(priv);</div><div class='add'>+out_free_hw:</div><div class='ctx'> 	ieee80211_free_hw(priv-&gt;hw);</div><div class='ctx'> out:</div><div class='ctx'> 	op_mode = NULL;</div><div class='ctx'> 	return op_mode;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_op_mode_dvm_stop(struct iwl_op_mode *op_mode)</div><div class='add'>+void iwl_op_mode_dvm_stop(struct iwl_op_mode *op_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);</div><div class='ctx'> </div><div class='hunk'>@@ -1408,9 +1735,9 @@ static void iwl_op_mode_dvm_stop(struct iwl_op_mode *op_mode)</div><div class='ctx'> </div><div class='ctx'> 	/*This will stop the queues, move the device to low power state */</div><div class='ctx'> 	priv-&gt;ucode_loaded = false;</div><div class='del'>-	iwl_trans_stop_device(trans(priv));</div><div class='add'>+	iwl_trans_stop_device(priv-&gt;trans);</div><div class='ctx'> </div><div class='del'>-	iwl_eeprom_free(priv-&gt;shrd);</div><div class='add'>+	iwl_eeprom_free(priv);</div><div class='ctx'> </div><div class='ctx'> 	/*netif_stop_queue(dev); */</div><div class='ctx'> 	flush_workqueue(priv-&gt;workqueue);</div><div class='hunk'>@@ -1420,69 +1747,562 @@ static void iwl_op_mode_dvm_stop(struct iwl_op_mode *op_mode)</div><div class='ctx'> 	 * until now... */</div><div class='ctx'> 	destroy_workqueue(priv-&gt;workqueue);</div><div class='ctx'> 	priv-&gt;workqueue = NULL;</div><div class='del'>-	iwl_free_traffic_mem(priv);</div><div class='ctx'> </div><div class='ctx'> 	iwl_uninit_drv(priv);</div><div class='ctx'> </div><div class='ctx'> 	dev_kfree_skb(priv-&gt;beacon_skb);</div><div class='ctx'> </div><div class='add'>+	iwl_trans_stop_hw(priv-&gt;trans, true);</div><div class='ctx'> 	ieee80211_free_hw(priv-&gt;hw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_cmd_queue_full(struct iwl_op_mode *op_mode)</div><div class='add'>+static const char * const desc_lookup_text[] = {</div><div class='add'>+	"OK",</div><div class='add'>+	"FAIL",</div><div class='add'>+	"BAD_PARAM",</div><div class='add'>+	"BAD_CHECKSUM",</div><div class='add'>+	"NMI_INTERRUPT_WDG",</div><div class='add'>+	"SYSASSERT",</div><div class='add'>+	"FATAL_ERROR",</div><div class='add'>+	"BAD_COMMAND",</div><div class='add'>+	"HW_ERROR_TUNE_LOCK",</div><div class='add'>+	"HW_ERROR_TEMPERATURE",</div><div class='add'>+	"ILLEGAL_CHAN_FREQ",</div><div class='add'>+	"VCC_NOT_STABLE",</div><div class='add'>+	"FH_ERROR",</div><div class='add'>+	"NMI_INTERRUPT_HOST",</div><div class='add'>+	"NMI_INTERRUPT_ACTION_PT",</div><div class='add'>+	"NMI_INTERRUPT_UNKNOWN",</div><div class='add'>+	"UCODE_VERSION_MISMATCH",</div><div class='add'>+	"HW_ERROR_ABS_LOCK",</div><div class='add'>+	"HW_ERROR_CAL_LOCK_FAIL",</div><div class='add'>+	"NMI_INTERRUPT_INST_ACTION_PT",</div><div class='add'>+	"NMI_INTERRUPT_DATA_ACTION_PT",</div><div class='add'>+	"NMI_TRM_HW_ER",</div><div class='add'>+	"NMI_INTERRUPT_TRM",</div><div class='add'>+	"NMI_INTERRUPT_BREAK_POINT",</div><div class='add'>+	"DEBUG_0",</div><div class='add'>+	"DEBUG_1",</div><div class='add'>+	"DEBUG_2",</div><div class='add'>+	"DEBUG_3",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct { char *name; u8 num; } advanced_lookup[] = {</div><div class='add'>+	{ "NMI_INTERRUPT_WDG", 0x34 },</div><div class='add'>+	{ "SYSASSERT", 0x35 },</div><div class='add'>+	{ "UCODE_VERSION_MISMATCH", 0x37 },</div><div class='add'>+	{ "BAD_COMMAND", 0x38 },</div><div class='add'>+	{ "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },</div><div class='add'>+	{ "FATAL_ERROR", 0x3D },</div><div class='add'>+	{ "NMI_TRM_HW_ERR", 0x46 },</div><div class='add'>+	{ "NMI_INTERRUPT_TRM", 0x4C },</div><div class='add'>+	{ "NMI_INTERRUPT_BREAK_POINT", 0x54 },</div><div class='add'>+	{ "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },</div><div class='add'>+	{ "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },</div><div class='add'>+	{ "NMI_INTERRUPT_HOST", 0x66 },</div><div class='add'>+	{ "NMI_INTERRUPT_ACTION_PT", 0x7C },</div><div class='add'>+	{ "NMI_INTERRUPT_UNKNOWN", 0x84 },</div><div class='add'>+	{ "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },</div><div class='add'>+	{ "ADVANCED_SYSASSERT", 0 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *desc_lookup(u32 num)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int max = ARRAY_SIZE(desc_lookup_text);</div><div class='add'>+</div><div class='add'>+	if (num &lt; max)</div><div class='add'>+		return desc_lookup_text[num];</div><div class='add'>+</div><div class='add'>+	max = ARRAY_SIZE(advanced_lookup) - 1;</div><div class='add'>+	for (i = 0; i &lt; max; i++) {</div><div class='add'>+		if (advanced_lookup[i].num == num)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	return advanced_lookup[i].name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ERROR_START_OFFSET  (1 * sizeof(u32))</div><div class='add'>+#define ERROR_ELEM_SIZE     (7 * sizeof(u32))</div><div class='add'>+</div><div class='add'>+static void iwl_dump_nic_error_log(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct iwl_trans *trans = priv-&gt;trans;</div><div class='add'>+	u32 base;</div><div class='add'>+	struct iwl_error_event_table table;</div><div class='add'>+</div><div class='add'>+	base = priv-&gt;device_pointers.error_event_table;</div><div class='add'>+	if (priv-&gt;cur_ucode == IWL_UCODE_INIT) {</div><div class='add'>+		if (!base)</div><div class='add'>+			base = priv-&gt;fw-&gt;init_errlog_ptr;</div><div class='add'>+	} else {</div><div class='add'>+		if (!base)</div><div class='add'>+			base = priv-&gt;fw-&gt;inst_errlog_ptr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!iwlagn_hw_valid_rtc_data_addr(base)) {</div><div class='add'>+		IWL_ERR(priv,</div><div class='add'>+			"Not valid error log pointer 0x%08X for %s uCode\n",</div><div class='add'>+			base,</div><div class='add'>+			(priv-&gt;cur_ucode == IWL_UCODE_INIT)</div><div class='add'>+					? "Init" : "RT");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*TODO: Update dbgfs with ISR error stats obtained below */</div><div class='add'>+	iwl_read_targ_mem_words(trans, base, &amp;table, sizeof(table));</div><div class='add'>+</div><div class='add'>+	if (ERROR_START_OFFSET &lt;= table.valid * ERROR_ELEM_SIZE) {</div><div class='add'>+		IWL_ERR(trans, "Start IWL Error Log Dump:\n");</div><div class='add'>+		IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",</div><div class='add'>+			priv-&gt;status, table.valid);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	trace_iwlwifi_dev_ucode_error(trans-&gt;dev, table.error_id, table.tsf_low,</div><div class='add'>+				      table.data1, table.data2, table.line,</div><div class='add'>+				      table.blink1, table.blink2, table.ilink1,</div><div class='add'>+				      table.ilink2, table.bcon_time, table.gp1,</div><div class='add'>+				      table.gp2, table.gp3, table.ucode_ver,</div><div class='add'>+				      table.hw_ver, table.brd_ver);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | %-28s\n", table.error_id,</div><div class='add'>+		desc_lookup(table.error_id));</div><div class='add'>+	IWL_ERR(priv, "0x%08X | uPc\n", table.pc);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | branchlink1\n", table.blink1);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | branchlink2\n", table.blink2);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | interruptlink1\n", table.ilink1);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | interruptlink2\n", table.ilink2);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | data1\n", table.data1);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | data2\n", table.data2);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | line\n", table.line);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | beacon time\n", table.bcon_time);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | tsf low\n", table.tsf_low);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | tsf hi\n", table.tsf_hi);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | time gp1\n", table.gp1);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | time gp2\n", table.gp2);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | time gp3\n", table.gp3);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | uCode version\n", table.ucode_ver);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | hw version\n", table.hw_ver);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | board version\n", table.brd_ver);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | hcmd\n", table.hcmd);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | isr0\n", table.isr0);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | isr1\n", table.isr1);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | isr2\n", table.isr2);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | isr3\n", table.isr3);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | isr4\n", table.isr4);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | isr_pref\n", table.isr_pref);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | wait_event\n", table.wait_event);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | l2p_control\n", table.l2p_control);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | l2p_duration\n", table.l2p_duration);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | timestamp\n", table.u_timestamp);</div><div class='add'>+	IWL_ERR(priv, "0x%08X | flow_handler\n", table.flow_handler);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define EVENT_START_OFFSET  (4 * sizeof(u32))</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iwl_print_event_log - Dump error event log to syslog</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,</div><div class='add'>+			       u32 num_events, u32 mode,</div><div class='add'>+			       int pos, char **buf, size_t bufsz)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+	u32 base;       /* SRAM byte address of event log header */</div><div class='add'>+	u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */</div><div class='add'>+	u32 ptr;        /* SRAM byte address of log data */</div><div class='add'>+	u32 ev, time, data; /* event log data */</div><div class='add'>+	unsigned long reg_flags;</div><div class='add'>+</div><div class='add'>+	struct iwl_trans *trans = priv-&gt;trans;</div><div class='add'>+</div><div class='add'>+	if (num_events == 0)</div><div class='add'>+		return pos;</div><div class='add'>+</div><div class='add'>+	base = priv-&gt;device_pointers.log_event_table;</div><div class='add'>+	if (priv-&gt;cur_ucode == IWL_UCODE_INIT) {</div><div class='add'>+		if (!base)</div><div class='add'>+			base = priv-&gt;fw-&gt;init_evtlog_ptr;</div><div class='add'>+	} else {</div><div class='add'>+		if (!base)</div><div class='add'>+			base = priv-&gt;fw-&gt;inst_evtlog_ptr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mode == 0)</div><div class='add'>+		event_size = 2 * sizeof(u32);</div><div class='add'>+	else</div><div class='add'>+		event_size = 3 * sizeof(u32);</div><div class='add'>+</div><div class='add'>+	ptr = base + EVENT_START_OFFSET + (start_idx * event_size);</div><div class='add'>+</div><div class='add'>+	/* Make sure device is powered up for SRAM reads */</div><div class='add'>+	spin_lock_irqsave(&amp;trans-&gt;reg_lock, reg_flags);</div><div class='add'>+	if (unlikely(!iwl_grab_nic_access(trans)))</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	/* Set starting address; reads will auto-increment */</div><div class='add'>+	iwl_write32(trans, HBUS_TARG_MEM_RADDR, ptr);</div><div class='add'>+</div><div class='add'>+	/* "time" is actually "data" for mode 0 (no timestamp).</div><div class='add'>+	* place event id # at far right for easier visual parsing. */</div><div class='add'>+	for (i = 0; i &lt; num_events; i++) {</div><div class='add'>+		ev = iwl_read32(trans, HBUS_TARG_MEM_RDAT);</div><div class='add'>+		time = iwl_read32(trans, HBUS_TARG_MEM_RDAT);</div><div class='add'>+		if (mode == 0) {</div><div class='add'>+			/* data, ev */</div><div class='add'>+			if (bufsz) {</div><div class='add'>+				pos += scnprintf(*buf + pos, bufsz - pos,</div><div class='add'>+						"EVT_LOG:0x%08x:%04u\n",</div><div class='add'>+						time, ev);</div><div class='add'>+			} else {</div><div class='add'>+				trace_iwlwifi_dev_ucode_event(trans-&gt;dev, 0,</div><div class='add'>+					time, ev);</div><div class='add'>+				IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",</div><div class='add'>+					time, ev);</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			data = iwl_read32(trans, HBUS_TARG_MEM_RDAT);</div><div class='add'>+			if (bufsz) {</div><div class='add'>+				pos += scnprintf(*buf + pos, bufsz - pos,</div><div class='add'>+						"EVT_LOGT:%010u:0x%08x:%04u\n",</div><div class='add'>+						 time, data, ev);</div><div class='add'>+			} else {</div><div class='add'>+				IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",</div><div class='add'>+					time, data, ev);</div><div class='add'>+				trace_iwlwifi_dev_ucode_event(trans-&gt;dev, time,</div><div class='add'>+					data, ev);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Allow device to power down */</div><div class='add'>+	iwl_release_nic_access(trans);</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;trans-&gt;reg_lock, reg_flags);</div><div class='add'>+	return pos;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iwl_print_last_event_logs - Dump the newest # of event log to syslog</div><div class='add'>+ */</div><div class='add'>+static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,</div><div class='add'>+				    u32 num_wraps, u32 next_entry,</div><div class='add'>+				    u32 size, u32 mode,</div><div class='add'>+				    int pos, char **buf, size_t bufsz)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * display the newest DEFAULT_LOG_ENTRIES entries</div><div class='add'>+	 * i.e the entries just before the next ont that uCode would fill.</div><div class='add'>+	 */</div><div class='add'>+	if (num_wraps) {</div><div class='add'>+		if (next_entry &lt; size) {</div><div class='add'>+			pos = iwl_print_event_log(priv,</div><div class='add'>+						capacity - (size - next_entry),</div><div class='add'>+						size - next_entry, mode,</div><div class='add'>+						pos, buf, bufsz);</div><div class='add'>+			pos = iwl_print_event_log(priv, 0,</div><div class='add'>+						  next_entry, mode,</div><div class='add'>+						  pos, buf, bufsz);</div><div class='add'>+		} else</div><div class='add'>+			pos = iwl_print_event_log(priv, next_entry - size,</div><div class='add'>+						  size, mode, pos, buf, bufsz);</div><div class='add'>+	} else {</div><div class='add'>+		if (next_entry &lt; size) {</div><div class='add'>+			pos = iwl_print_event_log(priv, 0, next_entry,</div><div class='add'>+						  mode, pos, buf, bufsz);</div><div class='add'>+		} else {</div><div class='add'>+			pos = iwl_print_event_log(priv, next_entry - size,</div><div class='add'>+						  size, mode, pos, buf, bufsz);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return pos;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)</div><div class='add'>+</div><div class='add'>+int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,</div><div class='add'>+			    char **buf, bool display)</div><div class='add'>+{</div><div class='add'>+	u32 base;       /* SRAM byte address of event log header */</div><div class='add'>+	u32 capacity;   /* event log capacity in # entries */</div><div class='add'>+	u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */</div><div class='add'>+	u32 num_wraps;  /* # times uCode wrapped to top of log */</div><div class='add'>+	u32 next_entry; /* index of next entry to be written by uCode */</div><div class='add'>+	u32 size;       /* # entries that we'll print */</div><div class='add'>+	u32 logsize;</div><div class='add'>+	int pos = 0;</div><div class='add'>+	size_t bufsz = 0;</div><div class='add'>+	struct iwl_trans *trans = priv-&gt;trans;</div><div class='add'>+</div><div class='add'>+	base = priv-&gt;device_pointers.log_event_table;</div><div class='add'>+	if (priv-&gt;cur_ucode == IWL_UCODE_INIT) {</div><div class='add'>+		logsize = priv-&gt;fw-&gt;init_evtlog_size;</div><div class='add'>+		if (!base)</div><div class='add'>+			base = priv-&gt;fw-&gt;init_evtlog_ptr;</div><div class='add'>+	} else {</div><div class='add'>+		logsize = priv-&gt;fw-&gt;inst_evtlog_size;</div><div class='add'>+		if (!base)</div><div class='add'>+			base = priv-&gt;fw-&gt;inst_evtlog_ptr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!iwlagn_hw_valid_rtc_data_addr(base)) {</div><div class='add'>+		IWL_ERR(priv,</div><div class='add'>+			"Invalid event log pointer 0x%08X for %s uCode\n",</div><div class='add'>+			base,</div><div class='add'>+			(priv-&gt;cur_ucode == IWL_UCODE_INIT)</div><div class='add'>+					? "Init" : "RT");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* event log header */</div><div class='add'>+	capacity = iwl_read_targ_mem(trans, base);</div><div class='add'>+	mode = iwl_read_targ_mem(trans, base + (1 * sizeof(u32)));</div><div class='add'>+	num_wraps = iwl_read_targ_mem(trans, base + (2 * sizeof(u32)));</div><div class='add'>+	next_entry = iwl_read_targ_mem(trans, base + (3 * sizeof(u32)));</div><div class='add'>+</div><div class='add'>+	if (capacity &gt; logsize) {</div><div class='add'>+		IWL_ERR(priv, "Log capacity %d is bogus, limit to %d "</div><div class='add'>+			"entries\n", capacity, logsize);</div><div class='add'>+		capacity = logsize;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (next_entry &gt; logsize) {</div><div class='add'>+		IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",</div><div class='add'>+			next_entry, logsize);</div><div class='add'>+		next_entry = logsize;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = num_wraps ? capacity : next_entry;</div><div class='add'>+</div><div class='add'>+	/* bail out if nothing in log */</div><div class='add'>+	if (size == 0) {</div><div class='add'>+		IWL_ERR(trans, "Start IWL Event Log Dump: nothing in log\n");</div><div class='add'>+		return pos;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IWLWIFI_DEBUG</div><div class='add'>+	if (!(iwl_have_debug_level(IWL_DL_FW_ERRORS)) &amp;&amp; !full_log)</div><div class='add'>+		size = (size &gt; DEFAULT_DUMP_EVENT_LOG_ENTRIES)</div><div class='add'>+			? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;</div><div class='add'>+#else</div><div class='add'>+	size = (size &gt; DEFAULT_DUMP_EVENT_LOG_ENTRIES)</div><div class='add'>+		? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;</div><div class='add'>+#endif</div><div class='add'>+	IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",</div><div class='add'>+		size);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IWLWIFI_DEBUG</div><div class='add'>+	if (display) {</div><div class='add'>+		if (full_log)</div><div class='add'>+			bufsz = capacity * 48;</div><div class='add'>+		else</div><div class='add'>+			bufsz = size * 48;</div><div class='add'>+		*buf = kmalloc(bufsz, GFP_KERNEL);</div><div class='add'>+		if (!*buf)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	if (iwl_have_debug_level(IWL_DL_FW_ERRORS) || full_log) {</div><div class='add'>+		/*</div><div class='add'>+		 * if uCode has wrapped back to top of log,</div><div class='add'>+		 * start at the oldest entry,</div><div class='add'>+		 * i.e the next one that uCode would fill.</div><div class='add'>+		 */</div><div class='add'>+		if (num_wraps)</div><div class='add'>+			pos = iwl_print_event_log(priv, next_entry,</div><div class='add'>+						capacity - next_entry, mode,</div><div class='add'>+						pos, buf, bufsz);</div><div class='add'>+		/* (then/else) start at top of log */</div><div class='add'>+		pos = iwl_print_event_log(priv, 0,</div><div class='add'>+					  next_entry, mode, pos, buf, bufsz);</div><div class='add'>+	} else</div><div class='add'>+		pos = iwl_print_last_event_logs(priv, capacity, num_wraps,</div><div class='add'>+						next_entry, size, mode,</div><div class='add'>+						pos, buf, bufsz);</div><div class='add'>+#else</div><div class='add'>+	pos = iwl_print_last_event_logs(priv, capacity, num_wraps,</div><div class='add'>+					next_entry, size, mode,</div><div class='add'>+					pos, buf, bufsz);</div><div class='add'>+#endif</div><div class='add'>+	return pos;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)</div><div class='add'>+{</div><div class='add'>+	unsigned int reload_msec;</div><div class='add'>+	unsigned long reload_jiffies;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IWLWIFI_DEBUG</div><div class='add'>+	if (iwl_have_debug_level(IWL_DL_FW_ERRORS))</div><div class='add'>+		iwl_print_rx_config_cmd(priv, IWL_RXON_CTX_BSS);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* uCode is no longer loaded. */</div><div class='add'>+	priv-&gt;ucode_loaded = false;</div><div class='add'>+</div><div class='add'>+	/* Set the FW error flag -- cleared on iwl_down */</div><div class='add'>+	set_bit(STATUS_FW_ERROR, &amp;priv-&gt;status);</div><div class='add'>+</div><div class='add'>+	iwl_abort_notification_waits(&amp;priv-&gt;notif_wait);</div><div class='add'>+</div><div class='add'>+	/* Keep the restart process from trying to send host</div><div class='add'>+	 * commands by clearing the ready bit */</div><div class='add'>+	clear_bit(STATUS_READY, &amp;priv-&gt;status);</div><div class='add'>+</div><div class='add'>+	wake_up(&amp;priv-&gt;trans-&gt;wait_command_queue);</div><div class='add'>+</div><div class='add'>+	if (!ondemand) {</div><div class='add'>+		/*</div><div class='add'>+		 * If firmware keep reloading, then it indicate something</div><div class='add'>+		 * serious wrong and firmware having problem to recover</div><div class='add'>+		 * from it. Instead of keep trying which will fill the syslog</div><div class='add'>+		 * and hang the system, let's just stop it</div><div class='add'>+		 */</div><div class='add'>+		reload_jiffies = jiffies;</div><div class='add'>+		reload_msec = jiffies_to_msecs((long) reload_jiffies -</div><div class='add'>+					(long) priv-&gt;reload_jiffies);</div><div class='add'>+		priv-&gt;reload_jiffies = reload_jiffies;</div><div class='add'>+		if (reload_msec &lt;= IWL_MIN_RELOAD_DURATION) {</div><div class='add'>+			priv-&gt;reload_count++;</div><div class='add'>+			if (priv-&gt;reload_count &gt;= IWL_MAX_CONTINUE_RELOAD_CNT) {</div><div class='add'>+				IWL_ERR(priv, "BUG_ON, Stop restarting\n");</div><div class='add'>+				return;</div><div class='add'>+			}</div><div class='add'>+		} else</div><div class='add'>+			priv-&gt;reload_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!test_bit(STATUS_EXIT_PENDING, &amp;priv-&gt;status)) {</div><div class='add'>+		if (iwlwifi_mod_params.restart_fw) {</div><div class='add'>+			IWL_DEBUG_FW_ERRORS(priv,</div><div class='add'>+				  "Restarting adapter due to uCode error.\n");</div><div class='add'>+			queue_work(priv-&gt;workqueue, &amp;priv-&gt;restart);</div><div class='add'>+		} else</div><div class='add'>+			IWL_DEBUG_FW_ERRORS(priv,</div><div class='add'>+				  "Detected FW error, but not restarting\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void iwl_nic_error(struct iwl_op_mode *op_mode)</div><div class='add'>+{</div><div class='add'>+	struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);</div><div class='add'>+</div><div class='add'>+	IWL_ERR(priv, "Loaded firmware version: %s\n",</div><div class='add'>+		priv-&gt;fw-&gt;fw_version);</div><div class='add'>+</div><div class='add'>+	iwl_dump_nic_error_log(priv);</div><div class='add'>+	iwl_dump_nic_event_log(priv, false, NULL, false);</div><div class='add'>+</div><div class='add'>+	iwlagn_fw_error(priv, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void iwl_cmd_queue_full(struct iwl_op_mode *op_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);</div><div class='ctx'> </div><div class='ctx'> 	if (!iwl_check_for_ct_kill(priv)) {</div><div class='ctx'> 		IWL_ERR(priv, "Restarting adapter queue is full\n");</div><div class='del'>-		iwl_nic_error(op_mode);</div><div class='add'>+		iwlagn_fw_error(priv, false);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_nic_config(struct iwl_op_mode *op_mode)</div><div class='add'>+void iwl_nic_config(struct iwl_op_mode *op_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);</div><div class='ctx'> </div><div class='del'>-	cfg(priv)-&gt;lib-&gt;nic_config(priv);</div><div class='add'>+	priv-&gt;lib-&gt;nic_config(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_stop_sw_queue(struct iwl_op_mode *op_mode, u8 ac)</div><div class='add'>+static void iwl_wimax_active(struct iwl_op_mode *op_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);</div><div class='ctx'> </div><div class='del'>-	set_bit(ac, &amp;priv-&gt;transport_queue_stop);</div><div class='del'>-	ieee80211_stop_queue(priv-&gt;hw, ac);</div><div class='add'>+	clear_bit(STATUS_READY, &amp;priv-&gt;status);</div><div class='add'>+	IWL_ERR(priv, "RF is used by WiMAX\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void iwl_stop_sw_queue(struct iwl_op_mode *op_mode, int queue)</div><div class='add'>+{</div><div class='add'>+	struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);</div><div class='add'>+	int mq = priv-&gt;queue_to_mac80211[queue];</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(mq == IWL_INVALID_MAC80211_QUEUE))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (atomic_inc_return(&amp;priv-&gt;queue_stop_count[mq]) &gt; 1) {</div><div class='add'>+		IWL_DEBUG_TX_QUEUES(priv,</div><div class='add'>+			"queue %d (mac80211 %d) already stopped\n",</div><div class='add'>+			queue, mq);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_bit(mq, &amp;priv-&gt;transport_queue_stop);</div><div class='add'>+	ieee80211_stop_queue(priv-&gt;hw, mq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_wake_sw_queue(struct iwl_op_mode *op_mode, u8 ac)</div><div class='add'>+void iwl_wake_sw_queue(struct iwl_op_mode *op_mode, int queue)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);</div><div class='add'>+	int mq = priv-&gt;queue_to_mac80211[queue];</div><div class='ctx'> </div><div class='del'>-	clear_bit(ac, &amp;priv-&gt;transport_queue_stop);</div><div class='add'>+	if (WARN_ON_ONCE(mq == IWL_INVALID_MAC80211_QUEUE))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (atomic_dec_return(&amp;priv-&gt;queue_stop_count[mq]) &gt; 0) {</div><div class='add'>+		IWL_DEBUG_TX_QUEUES(priv,</div><div class='add'>+			"queue %d (mac80211 %d) already awake\n",</div><div class='add'>+			queue, mq);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clear_bit(mq, &amp;priv-&gt;transport_queue_stop);</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;passive_no_rx)</div><div class='del'>-		ieee80211_wake_queue(priv-&gt;hw, ac);</div><div class='add'>+		ieee80211_wake_queue(priv-&gt;hw, mq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void iwlagn_lift_passive_no_rx(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	int ac;</div><div class='add'>+	int mq;</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;passive_no_rx)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for (ac = IEEE80211_AC_VO; ac &lt; IEEE80211_NUM_ACS; ac++) {</div><div class='del'>-		if (!test_bit(ac, &amp;priv-&gt;transport_queue_stop)) {</div><div class='del'>-			IWL_DEBUG_TX_QUEUES(priv, "Wake queue %d");</div><div class='del'>-			ieee80211_wake_queue(priv-&gt;hw, ac);</div><div class='add'>+	for (mq = 0; mq &lt; IWLAGN_FIRST_AMPDU_QUEUE; mq++) {</div><div class='add'>+		if (!test_bit(mq, &amp;priv-&gt;transport_queue_stop)) {</div><div class='add'>+			IWL_DEBUG_TX_QUEUES(priv, "Wake queue %d", mq);</div><div class='add'>+			ieee80211_wake_queue(priv-&gt;hw, mq);</div><div class='ctx'> 		} else {</div><div class='del'>-			IWL_DEBUG_TX_QUEUES(priv, "Don't wake queue %d");</div><div class='add'>+			IWL_DEBUG_TX_QUEUES(priv, "Don't wake queue %d", mq);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;passive_no_rx = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void iwl_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ieee80211_tx_info *info;</div><div class='add'>+</div><div class='add'>+	info = IEEE80211_SKB_CB(skb);</div><div class='add'>+	kmem_cache_free(iwl_tx_cmd_pool, (info-&gt;driver_data[1]));</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void iwl_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state)</div><div class='add'>+{</div><div class='add'>+	struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);</div><div class='add'>+</div><div class='add'>+	if (state)</div><div class='add'>+		set_bit(STATUS_RF_KILL_HW, &amp;priv-&gt;status);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(STATUS_RF_KILL_HW, &amp;priv-&gt;status);</div><div class='add'>+</div><div class='add'>+	wiphy_rfkill_set_hw_state(priv-&gt;hw-&gt;wiphy, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct iwl_op_mode_ops iwl_dvm_ops = {</div><div class='ctx'> 	.start = iwl_op_mode_dvm_start,</div><div class='ctx'> 	.stop = iwl_op_mode_dvm_stop,</div><div class='hunk'>@@ -1494,6 +2314,7 @@ const struct iwl_op_mode_ops iwl_dvm_ops = {</div><div class='ctx'> 	.nic_error = iwl_nic_error,</div><div class='ctx'> 	.cmd_queue_full = iwl_cmd_queue_full,</div><div class='ctx'> 	.nic_config = iwl_nic_config,</div><div class='add'>+	.wimax_active = iwl_wimax_active,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -1544,96 +2365,3 @@ static void __exit iwl_exit(void)</div><div class='ctx'> </div><div class='ctx'> module_exit(iwl_exit);</div><div class='ctx'> module_init(iwl_init);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_IWLWIFI_DEBUG</div><div class='del'>-module_param_named(debug, iwlagn_mod_params.debug_level, uint,</div><div class='del'>-		   S_IRUGO | S_IWUSR);</div><div class='del'>-MODULE_PARM_DESC(debug, "debug output mask");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");</div><div class='del'>-module_param_named(11n_disable, iwlagn_mod_params.disable_11n, uint, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(11n_disable,</div><div class='del'>-	"disable 11n functionality, bitmap: 1: full, 2: agg TX, 4: agg RX");</div><div class='del'>-module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,</div><div class='del'>-		   int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");</div><div class='del'>-module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");</div><div class='del'>-</div><div class='del'>-module_param_named(ucode_alternative,</div><div class='del'>-		   iwlagn_mod_params.wanted_ucode_alternative,</div><div class='del'>-		   int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(ucode_alternative,</div><div class='del'>-		 "specify ucode alternative to use from ucode file");</div><div class='del'>-</div><div class='del'>-module_param_named(antenna_coupling, iwlagn_mod_params.ant_coupling,</div><div class='del'>-		   int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(antenna_coupling,</div><div class='del'>-		 "specify antenna coupling in dB (defualt: 0 dB)");</div><div class='del'>-</div><div class='del'>-module_param_named(bt_ch_inhibition, iwlagn_mod_params.bt_ch_announce,</div><div class='del'>-		   bool, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(bt_ch_inhibition,</div><div class='del'>-		 "Enable BT channel inhibition (default: enable)");</div><div class='del'>-</div><div class='del'>-module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");</div><div class='del'>-</div><div class='del'>-module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])");</div><div class='del'>-</div><div class='del'>-module_param_named(wd_disable, iwlagn_mod_params.wd_disable, int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(wd_disable,</div><div class='del'>-		"Disable stuck queue watchdog timer 0=system default, "</div><div class='del'>-		"1=disable, 2=enable (default: 0)");</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * set bt_coex_active to true, uCode will do kill/defer</div><div class='del'>- * every time the priority line is asserted (BT is sending signals on the</div><div class='del'>- * priority line in the PCIx).</div><div class='del'>- * set bt_coex_active to false, uCode will ignore the BT activity and</div><div class='del'>- * perform the normal operation</div><div class='del'>- *</div><div class='del'>- * User might experience transmit issue on some platform due to WiFi/BT</div><div class='del'>- * co-exist problem. The possible behaviors are:</div><div class='del'>- *   Able to scan and finding all the available AP</div><div class='del'>- *   Not able to associate with any AP</div><div class='del'>- * On those platforms, WiFi communication can be restored by set</div><div class='del'>- * "bt_coex_active" module parameter to "false"</div><div class='del'>- *</div><div class='del'>- * default: bt_coex_active = true (BT_COEX_ENABLE)</div><div class='del'>- */</div><div class='del'>-module_param_named(bt_coex_active, iwlagn_mod_params.bt_coex_active,</div><div class='del'>-		bool, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(bt_coex_active, "enable wifi/bt co-exist (default: enable)");</div><div class='del'>-</div><div class='del'>-module_param_named(led_mode, iwlagn_mod_params.led_mode, int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(led_mode, "0=system default, "</div><div class='del'>-		"1=On(RF On)/Off(RF Off), 2=blinking, 3=Off (default: 0)");</div><div class='del'>-</div><div class='del'>-module_param_named(power_save, iwlagn_mod_params.power_save,</div><div class='del'>-		bool, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(power_save,</div><div class='del'>-		 "enable WiFi power management (default: disable)");</div><div class='del'>-</div><div class='del'>-module_param_named(power_level, iwlagn_mod_params.power_level,</div><div class='del'>-		int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(power_level,</div><div class='del'>-		 "default power save level (range from 1 - 5, default: 1)");</div><div class='del'>-</div><div class='del'>-module_param_named(auto_agg, iwlagn_mod_params.auto_agg,</div><div class='del'>-		bool, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(auto_agg,</div><div class='del'>-		 "enable agg w/o check traffic load (default: enable)");</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * For now, keep using power level 1 instead of automatically</div><div class='del'>- * adjusting ...</div><div class='del'>- */</div><div class='del'>-module_param_named(no_sleep_autoadjust, iwlagn_mod_params.no_sleep_autoadjust,</div><div class='del'>-		bool, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(no_sleep_autoadjust,</div><div class='del'>-		 "don't automatically adjust sleep level "</div><div class='del'>-		 "according to maximum network latency (default: true)");</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.h b/drivers/net/wireless/iwlwifi/iwl-agn.h<br/>index 3780a03f2716..79c0fe06f4db 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-agn.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-agn.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-agn.h</a></div><div class='hunk'>@@ -64,6 +64,43 @@</div><div class='ctx'> #define __iwl_agn_h__</div><div class='ctx'> </div><div class='ctx'> #include "iwl-dev.h"</div><div class='add'>+#include "iwl-config.h"</div><div class='add'>+</div><div class='add'>+/* The first 11 queues (0-10) are used otherwise */</div><div class='add'>+#define IWLAGN_FIRST_AMPDU_QUEUE	11</div><div class='add'>+</div><div class='add'>+/* AUX (TX during scan dwell) queue */</div><div class='add'>+#define IWL_AUX_QUEUE		10</div><div class='add'>+</div><div class='add'>+/* device operations */</div><div class='add'>+extern struct iwl_lib_ops iwl1000_lib;</div><div class='add'>+extern struct iwl_lib_ops iwl2000_lib;</div><div class='add'>+extern struct iwl_lib_ops iwl2030_lib;</div><div class='add'>+extern struct iwl_lib_ops iwl5000_lib;</div><div class='add'>+extern struct iwl_lib_ops iwl5150_lib;</div><div class='add'>+extern struct iwl_lib_ops iwl6000_lib;</div><div class='add'>+extern struct iwl_lib_ops iwl6030_lib;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define TIME_UNIT		1024</div><div class='add'>+</div><div class='add'>+/*****************************************************</div><div class='add'>+* DRIVER STATUS FUNCTIONS</div><div class='add'>+******************************************************/</div><div class='add'>+#define STATUS_RF_KILL_HW	0</div><div class='add'>+#define STATUS_CT_KILL		1</div><div class='add'>+#define STATUS_ALIVE		2</div><div class='add'>+#define STATUS_READY		3</div><div class='add'>+#define STATUS_GEO_CONFIGURED	4</div><div class='add'>+#define STATUS_EXIT_PENDING	5</div><div class='add'>+#define STATUS_STATISTICS	6</div><div class='add'>+#define STATUS_SCANNING		7</div><div class='add'>+#define STATUS_SCAN_ABORTING	8</div><div class='add'>+#define STATUS_SCAN_HW		9</div><div class='add'>+#define STATUS_FW_ERROR		10</div><div class='add'>+#define STATUS_CHANNEL_SWITCH_PENDING 11</div><div class='add'>+#define STATUS_SCAN_COMPLETE	12</div><div class='add'>+#define STATUS_POWER_PMI	13</div><div class='ctx'> </div><div class='ctx'> struct iwl_ucode_capabilities;</div><div class='ctx'> </div><div class='hunk'>@@ -80,12 +117,9 @@ static inline void iwl_set_calib_hdr(struct iwl_calib_hdr *hdr, u8 cmd)</div><div class='ctx'> void iwl_down(struct iwl_priv *priv);</div><div class='ctx'> void iwl_cancel_deferred_work(struct iwl_priv *priv);</div><div class='ctx'> void iwlagn_prepare_restart(struct iwl_priv *priv);</div><div class='del'>-void iwl_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb);</div><div class='ctx'> int __must_check iwl_rx_dispatch(struct iwl_op_mode *op_mode,</div><div class='ctx'> 				 struct iwl_rx_cmd_buffer *rxb,</div><div class='ctx'> 				 struct iwl_device_cmd *cmd);</div><div class='del'>-void iwl_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state);</div><div class='del'>-void iwl_nic_error(struct iwl_op_mode *op_mode);</div><div class='ctx'> </div><div class='ctx'> bool iwl_check_for_ct_kill(struct iwl_priv *priv);</div><div class='ctx'> </div><div class='hunk'>@@ -103,6 +137,8 @@ int iwl_dvm_send_cmd_pdu(struct iwl_priv *priv, u8 id,</div><div class='ctx'> 			 u32 flags, u16 len, const void *data);</div><div class='ctx'> </div><div class='ctx'> /* RXON */</div><div class='add'>+void iwl_connection_init_rx_config(struct iwl_priv *priv,</div><div class='add'>+				   struct iwl_rxon_context *ctx);</div><div class='ctx'> int iwlagn_set_pan_params(struct iwl_priv *priv);</div><div class='ctx'> int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx);</div><div class='ctx'> void iwlagn_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx);</div><div class='hunk'>@@ -113,11 +149,15 @@ void iwlagn_bss_info_changed(struct ieee80211_hw *hw,</div><div class='ctx'> 			     u32 changes);</div><div class='ctx'> void iwlagn_config_ht40(struct ieee80211_conf *conf,</div><div class='ctx'> 			struct iwl_rxon_context *ctx);</div><div class='add'>+void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf);</div><div class='add'>+void iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,</div><div class='add'>+			 struct iwl_rxon_context *ctx);</div><div class='add'>+void iwl_set_flags_for_band(struct iwl_priv *priv,</div><div class='add'>+			    struct iwl_rxon_context *ctx,</div><div class='add'>+			    enum ieee80211_band band,</div><div class='add'>+			    struct ieee80211_vif *vif);</div><div class='ctx'> </div><div class='ctx'> /* uCode */</div><div class='del'>-int iwlagn_rx_calib_result(struct iwl_priv *priv,</div><div class='del'>-			    struct iwl_rx_cmd_buffer *rxb,</div><div class='del'>-			    struct iwl_device_cmd *cmd);</div><div class='ctx'> int iwl_send_bt_env(struct iwl_priv *priv, u8 action, u8 type);</div><div class='ctx'> void iwl_send_prio_tbl(struct iwl_priv *priv);</div><div class='ctx'> int iwl_init_alive_start(struct iwl_priv *priv);</div><div class='hunk'>@@ -128,14 +168,25 @@ int iwl_send_calib_results(struct iwl_priv *priv);</div><div class='ctx'> int iwl_calib_set(struct iwl_priv *priv,</div><div class='ctx'> 		  const struct iwl_calib_hdr *cmd, int len);</div><div class='ctx'> void iwl_calib_free_results(struct iwl_priv *priv);</div><div class='add'>+int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,</div><div class='add'>+			    char **buf, bool display);</div><div class='add'>+int iwlagn_hw_valid_rtc_data_addr(u32 addr);</div><div class='ctx'> </div><div class='ctx'> /* lib */</div><div class='ctx'> int iwlagn_send_tx_power(struct iwl_priv *priv);</div><div class='ctx'> void iwlagn_temperature(struct iwl_priv *priv);</div><div class='del'>-u16 iwl_eeprom_calib_version(struct iwl_shared *shrd);</div><div class='ctx'> int iwlagn_txfifo_flush(struct iwl_priv *priv, u16 flush_control);</div><div class='ctx'> void iwlagn_dev_txfifo_flush(struct iwl_priv *priv, u16 flush_control);</div><div class='ctx'> int iwlagn_send_beacon_cmd(struct iwl_priv *priv);</div><div class='add'>+int iwl_send_statistics_request(struct iwl_priv *priv,</div><div class='add'>+				u8 flags, bool clear);</div><div class='add'>+</div><div class='add'>+static inline const struct ieee80211_supported_band *iwl_get_hw_mode(</div><div class='add'>+			struct iwl_priv *priv, enum ieee80211_band band)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;hw-&gt;wiphy-&gt;bands[band];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='ctx'> int iwlagn_send_patterns(struct iwl_priv *priv,</div><div class='ctx'> 			 struct cfg80211_wowlan *wowlan);</div><div class='hunk'>@@ -145,6 +196,7 @@ int iwlagn_suspend(struct iwl_priv *priv, struct cfg80211_wowlan *wowlan);</div><div class='ctx'> /* rx */</div><div class='ctx'> int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band);</div><div class='ctx'> void iwl_setup_rx_handlers(struct iwl_priv *priv);</div><div class='add'>+void iwl_chswitch_done(struct iwl_priv *priv, bool is_success);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* tx */</div><div class='hunk'>@@ -189,6 +241,31 @@ u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant_idx, u8 valid);</div><div class='ctx'> /* scan */</div><div class='ctx'> void iwlagn_post_scan(struct iwl_priv *priv);</div><div class='ctx'> void iwlagn_disable_roc(struct iwl_priv *priv);</div><div class='add'>+int iwl_force_rf_reset(struct iwl_priv *priv, bool external);</div><div class='add'>+void iwl_init_scan_params(struct iwl_priv *priv);</div><div class='add'>+int iwl_scan_cancel(struct iwl_priv *priv);</div><div class='add'>+void iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms);</div><div class='add'>+void iwl_force_scan_end(struct iwl_priv *priv);</div><div class='add'>+void iwl_internal_short_hw_scan(struct iwl_priv *priv);</div><div class='add'>+void iwl_setup_rx_scan_handlers(struct iwl_priv *priv);</div><div class='add'>+void iwl_setup_scan_deferred_work(struct iwl_priv *priv);</div><div class='add'>+void iwl_cancel_scan_deferred_work(struct iwl_priv *priv);</div><div class='add'>+int __must_check iwl_scan_initiate(struct iwl_priv *priv,</div><div class='add'>+				   struct ieee80211_vif *vif,</div><div class='add'>+				   enum iwl_scan_type scan_type,</div><div class='add'>+				   enum ieee80211_band band);</div><div class='add'>+</div><div class='add'>+/* For faster active scanning, scan will move to the next channel if fewer than</div><div class='add'>+ * PLCP_QUIET_THRESH packets are heard on this channel within</div><div class='add'>+ * ACTIVE_QUIET_TIME after sending probe request.  This shortens the dwell</div><div class='add'>+ * time if it's a quiet channel (nothing responded to our probe, and there's</div><div class='add'>+ * no other traffic).</div><div class='add'>+ * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */</div><div class='add'>+#define IWL_ACTIVE_QUIET_TIME       cpu_to_le16(10)  /* msec */</div><div class='add'>+#define IWL_PLCP_QUIET_THRESH       cpu_to_le16(1)  /* packets */</div><div class='add'>+</div><div class='add'>+#define IWL_SCAN_CHECK_WATCHDOG		(HZ * 7)</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /* bt coex */</div><div class='ctx'> void iwlagn_send_advance_bt_config(struct iwl_priv *priv);</div><div class='hunk'>@@ -201,6 +278,12 @@ void iwlagn_bt_cancel_deferred_work(struct iwl_priv *priv);</div><div class='ctx'> void iwlagn_bt_coex_rssi_monitor(struct iwl_priv *priv);</div><div class='ctx'> void iwlagn_bt_adjust_rssi_monitor(struct iwl_priv *priv, bool rssi_ena);</div><div class='ctx'> </div><div class='add'>+static inline bool iwl_advanced_bt_coexist(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+	       priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_IWLWIFI_DEBUG</div><div class='ctx'> const char *iwl_get_tx_fail_reason(u32 status);</div><div class='ctx'> const char *iwl_get_agg_tx_fail_reason(u16 status);</div><div class='hunk'>@@ -239,8 +322,6 @@ void iwl_deactivate_station(struct iwl_priv *priv, const u8 sta_id,</div><div class='ctx'> u8 iwl_prep_station(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='ctx'> 		    const u8 *addr, bool is_ap, struct ieee80211_sta *sta);</div><div class='ctx'> </div><div class='del'>-void iwl_sta_fill_lq(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='del'>-		     u8 sta_id, struct iwl_link_quality_cmd *link_cmd);</div><div class='ctx'> int iwl_send_lq_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='ctx'> 		    struct iwl_link_quality_cmd *lq, u8 flags, bool init);</div><div class='ctx'> int iwl_add_sta_callback(struct iwl_priv *priv, struct iwl_rx_cmd_buffer *rxb,</div><div class='hunk'>@@ -248,6 +329,9 @@ int iwl_add_sta_callback(struct iwl_priv *priv, struct iwl_rx_cmd_buffer *rxb,</div><div class='ctx'> int iwl_sta_update_ht(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='ctx'> 		      struct ieee80211_sta *sta);</div><div class='ctx'> </div><div class='add'>+bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,</div><div class='add'>+			    struct iwl_rxon_context *ctx,</div><div class='add'>+			    struct ieee80211_sta_ht_cap *ht_cap);</div><div class='ctx'> </div><div class='ctx'> static inline int iwl_sta_id(struct ieee80211_sta *sta)</div><div class='ctx'> {</div><div class='hunk'>@@ -305,9 +389,6 @@ static inline __le32 iwl_hw_set_rate_n_flags(u8 rate, u32 flags)</div><div class='ctx'> 	return cpu_to_le32(flags|(u32)rate);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* eeprom */</div><div class='del'>-void iwl_eeprom_get_mac(const struct iwl_shared *shrd, u8 *mac);</div><div class='del'>-</div><div class='ctx'> extern int iwl_alive_start(struct iwl_priv *priv);</div><div class='ctx'> /* svtool */</div><div class='ctx'> #ifdef CONFIG_IWLWIFI_DEVICE_TESTMODE</div><div class='hunk'>@@ -386,13 +467,35 @@ static inline int iwl_is_ready_rf(struct iwl_priv *priv)</div><div class='ctx'> 	return iwl_is_ready(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void iwl_dvm_set_pmi(struct iwl_priv *priv, bool state)</div><div class='add'>+{</div><div class='add'>+	if (state)</div><div class='add'>+		set_bit(STATUS_POWER_PMI, &amp;priv-&gt;status);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(STATUS_POWER_PMI, &amp;priv-&gt;status);</div><div class='add'>+	iwl_trans_set_pmi(priv-&gt;trans, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IWLWIFI_DEBUGFS</div><div class='add'>+int iwl_dbgfs_register(struct iwl_priv *priv, const char *name);</div><div class='add'>+void iwl_dbgfs_unregister(struct iwl_priv *priv);</div><div class='add'>+#else</div><div class='add'>+static inline int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+static inline void iwl_dbgfs_unregister(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_IWLWIFI_DEBUGFS */</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_IWLWIFI_DEBUG</div><div class='ctx'> #define IWL_DEBUG_QUIET_RFKILL(m, fmt, args...)	\</div><div class='ctx'> do {									\</div><div class='ctx'> 	if (!iwl_is_rfkill((m)))					\</div><div class='ctx'> 		IWL_ERR(m, fmt, ##args);				\</div><div class='ctx'> 	else								\</div><div class='del'>-		__iwl_err(trans(m)-&gt;dev, true,				\</div><div class='add'>+		__iwl_err((m)-&gt;dev, true,				\</div><div class='ctx'> 			  !iwl_have_debug_level(IWL_DL_RADIO),		\</div><div class='ctx'> 			  fmt, ##args);					\</div><div class='ctx'> } while (0)</div><div class='hunk'>@@ -402,8 +505,98 @@ do {									\</div><div class='ctx'> 	if (!iwl_is_rfkill((m)))					\</div><div class='ctx'> 		IWL_ERR(m, fmt, ##args);				\</div><div class='ctx'> 	else								\</div><div class='del'>-		__iwl_err(trans(m)-&gt;dev, true, true, fmt, ##args);	\</div><div class='add'>+		__iwl_err((m)-&gt;dev, true, true, fmt, ##args);	\</div><div class='ctx'> } while (0)</div><div class='ctx'> #endif				/* CONFIG_IWLWIFI_DEBUG */</div><div class='ctx'> </div><div class='add'>+extern const char *iwl_dvm_cmd_strings[REPLY_MAX];</div><div class='add'>+</div><div class='add'>+static inline const char *iwl_dvm_get_cmd_string(u8 cmd)</div><div class='add'>+{</div><div class='add'>+	const char *s = iwl_dvm_cmd_strings[cmd];</div><div class='add'>+	if (s)</div><div class='add'>+		return s;</div><div class='add'>+	return "UNKNOWN";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* API method exported for mvm hybrid state */</div><div class='add'>+void iwl_setup_deferred_work(struct iwl_priv *priv);</div><div class='add'>+int iwl_send_wimax_coex(struct iwl_priv *priv);</div><div class='add'>+int iwl_send_bt_env(struct iwl_priv *priv, u8 action, u8 type);</div><div class='add'>+void iwl_option_config(struct iwl_priv *priv);</div><div class='add'>+void iwl_set_hw_params(struct iwl_priv *priv);</div><div class='add'>+void iwl_init_context(struct iwl_priv *priv, u32 ucode_flags);</div><div class='add'>+int iwl_init_drv(struct iwl_priv *priv);</div><div class='add'>+void iwl_uninit_drv(struct iwl_priv *priv);</div><div class='add'>+void iwl_send_bt_config(struct iwl_priv *priv);</div><div class='add'>+void iwl_rf_kill_ct_config(struct iwl_priv *priv);</div><div class='add'>+int iwl_setup_interface(struct iwl_priv *priv, struct iwl_rxon_context *ctx);</div><div class='add'>+void iwl_teardown_interface(struct iwl_priv *priv,</div><div class='add'>+			    struct ieee80211_vif *vif,</div><div class='add'>+			    bool mode_change);</div><div class='add'>+int iwl_full_rxon_required(struct iwl_priv *priv, struct iwl_rxon_context *ctx);</div><div class='add'>+void iwlagn_update_qos(struct iwl_priv *priv, struct iwl_rxon_context *ctx);</div><div class='add'>+void iwlagn_check_needed_chains(struct iwl_priv *priv,</div><div class='add'>+				struct iwl_rxon_context *ctx,</div><div class='add'>+				struct ieee80211_bss_conf *bss_conf);</div><div class='add'>+void iwlagn_chain_noise_reset(struct iwl_priv *priv);</div><div class='add'>+int iwlagn_update_beacon(struct iwl_priv *priv,</div><div class='add'>+			 struct ieee80211_vif *vif);</div><div class='add'>+void iwl_tt_handler(struct iwl_priv *priv);</div><div class='add'>+void iwl_op_mode_dvm_stop(struct iwl_op_mode *op_mode);</div><div class='add'>+void iwl_stop_sw_queue(struct iwl_op_mode *op_mode, int queue);</div><div class='add'>+void iwl_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state);</div><div class='add'>+void iwl_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb);</div><div class='add'>+void iwl_nic_error(struct iwl_op_mode *op_mode);</div><div class='add'>+void iwl_cmd_queue_full(struct iwl_op_mode *op_mode);</div><div class='add'>+void iwl_nic_config(struct iwl_op_mode *op_mode);</div><div class='add'>+int iwlagn_mac_set_tim(struct ieee80211_hw *hw,</div><div class='add'>+		       struct ieee80211_sta *sta, bool set);</div><div class='add'>+void iwlagn_mac_rssi_callback(struct ieee80211_hw *hw,</div><div class='add'>+			      enum ieee80211_rssi_event rssi_event);</div><div class='add'>+int iwlagn_mac_cancel_remain_on_channel(struct ieee80211_hw *hw);</div><div class='add'>+int iwlagn_mac_tx_last_beacon(struct ieee80211_hw *hw);</div><div class='add'>+void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop);</div><div class='add'>+void iwl_wake_sw_queue(struct iwl_op_mode *op_mode, int queue);</div><div class='add'>+void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,</div><div class='add'>+			       struct ieee80211_channel_switch *ch_switch);</div><div class='add'>+int iwlagn_mac_sta_state(struct ieee80211_hw *hw,</div><div class='add'>+			 struct ieee80211_vif *vif,</div><div class='add'>+			 struct ieee80211_sta *sta,</div><div class='add'>+			 enum ieee80211_sta_state old_state,</div><div class='add'>+			 enum ieee80211_sta_state new_state);</div><div class='add'>+int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,</div><div class='add'>+			    struct ieee80211_vif *vif,</div><div class='add'>+			    enum ieee80211_ampdu_mlme_action action,</div><div class='add'>+			    struct ieee80211_sta *sta, u16 tid, u16 *ssn,</div><div class='add'>+			    u8 buf_size);</div><div class='add'>+int iwlagn_mac_hw_scan(struct ieee80211_hw *hw,</div><div class='add'>+		       struct ieee80211_vif *vif,</div><div class='add'>+		       struct cfg80211_scan_request *req);</div><div class='add'>+void iwlagn_mac_sta_notify(struct ieee80211_hw *hw,</div><div class='add'>+			   struct ieee80211_vif *vif,</div><div class='add'>+			   enum sta_notify_cmd cmd,</div><div class='add'>+			   struct ieee80211_sta *sta);</div><div class='add'>+void iwlagn_configure_filter(struct ieee80211_hw *hw,</div><div class='add'>+			     unsigned int changed_flags,</div><div class='add'>+			     unsigned int *total_flags,</div><div class='add'>+			     u64 multicast);</div><div class='add'>+int iwlagn_mac_conf_tx(struct ieee80211_hw *hw,</div><div class='add'>+		       struct ieee80211_vif *vif, u16 queue,</div><div class='add'>+		       const struct ieee80211_tx_queue_params *params);</div><div class='add'>+void iwlagn_mac_set_rekey_data(struct ieee80211_hw *hw,</div><div class='add'>+			       struct ieee80211_vif *vif,</div><div class='add'>+			       struct cfg80211_gtk_rekey_data *data);</div><div class='add'>+void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,</div><div class='add'>+				struct ieee80211_vif *vif,</div><div class='add'>+				struct ieee80211_key_conf *keyconf,</div><div class='add'>+				struct ieee80211_sta *sta,</div><div class='add'>+				u32 iv32, u16 *phase1key);</div><div class='add'>+int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,</div><div class='add'>+		       struct ieee80211_vif *vif,</div><div class='add'>+		       struct ieee80211_sta *sta,</div><div class='add'>+		       struct ieee80211_key_conf *key);</div><div class='add'>+void iwlagn_mac_stop(struct ieee80211_hw *hw);</div><div class='add'>+void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb);</div><div class='add'>+int iwlagn_mac_suspend(struct ieee80211_hw *hw, struct cfg80211_wowlan *wowlan);</div><div class='ctx'> #endif /* __iwl_agn_h__ */</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-commands.h b/drivers/net/wireless/iwlwifi/iwl-commands.h<br/>index 9ed73e5154be..9af6a239b384 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-commands.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-commands.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-commands.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-commands.h</a></div><div class='hunk'>@@ -1877,9 +1877,16 @@ struct iwl_bt_cmd {</div><div class='ctx'> </div><div class='ctx'> #define IWLAGN_BT3_T7_DEFAULT		1</div><div class='ctx'> </div><div class='add'>+enum iwl_bt_kill_idx {</div><div class='add'>+	IWL_BT_KILL_DEFAULT = 0,</div><div class='add'>+	IWL_BT_KILL_OVERRIDE = 1,</div><div class='add'>+	IWL_BT_KILL_REDUCE = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define IWLAGN_BT_KILL_ACK_MASK_DEFAULT	cpu_to_le32(0xffff0000)</div><div class='ctx'> #define IWLAGN_BT_KILL_CTS_MASK_DEFAULT	cpu_to_le32(0xffff0000)</div><div class='ctx'> #define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO	cpu_to_le32(0xffffffff)</div><div class='add'>+#define IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE	cpu_to_le32(0)</div><div class='ctx'> </div><div class='ctx'> #define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT	2</div><div class='ctx'> </div><div class='hunk'>@@ -1891,7 +1898,7 @@ struct iwl_bt_cmd {</div><div class='ctx'> #define IWLAGN_BT_VALID_3W_TIMERS	cpu_to_le16(BIT(3))</div><div class='ctx'> #define IWLAGN_BT_VALID_KILL_ACK_MASK	cpu_to_le16(BIT(4))</div><div class='ctx'> #define IWLAGN_BT_VALID_KILL_CTS_MASK	cpu_to_le16(BIT(5))</div><div class='del'>-#define IWLAGN_BT_VALID_BT4_TIMES	cpu_to_le16(BIT(6))</div><div class='add'>+#define IWLAGN_BT_VALID_REDUCED_TX_PWR	cpu_to_le16(BIT(6))</div><div class='ctx'> #define IWLAGN_BT_VALID_3W_LUT		cpu_to_le16(BIT(7))</div><div class='ctx'> </div><div class='ctx'> #define IWLAGN_BT_ALL_VALID_MSK		(IWLAGN_BT_VALID_ENABLE_FLAGS | \</div><div class='hunk'>@@ -1900,9 +1907,13 @@ struct iwl_bt_cmd {</div><div class='ctx'> 					IWLAGN_BT_VALID_3W_TIMERS | \</div><div class='ctx'> 					IWLAGN_BT_VALID_KILL_ACK_MASK | \</div><div class='ctx'> 					IWLAGN_BT_VALID_KILL_CTS_MASK | \</div><div class='del'>-					IWLAGN_BT_VALID_BT4_TIMES | \</div><div class='add'>+					IWLAGN_BT_VALID_REDUCED_TX_PWR | \</div><div class='ctx'> 					IWLAGN_BT_VALID_3W_LUT)</div><div class='ctx'> </div><div class='add'>+#define IWLAGN_BT_REDUCED_TX_PWR	BIT(0)</div><div class='add'>+</div><div class='add'>+#define IWLAGN_BT_DECISION_LUT_SIZE	12</div><div class='add'>+</div><div class='ctx'> struct iwl_basic_bt_cmd {</div><div class='ctx'> 	u8 flags;</div><div class='ctx'> 	u8 ledtime; /* unused */</div><div class='hunk'>@@ -1913,12 +1924,17 @@ struct iwl_basic_bt_cmd {</div><div class='ctx'> 	u8 bt3_prio_sample_time;</div><div class='ctx'> 	u8 bt3_timer_t2_value;</div><div class='ctx'> 	__le16 bt4_reaction_time; /* unused */</div><div class='del'>-	__le32 bt3_lookup_table[12];</div><div class='del'>-	__le16 bt4_decision_time; /* unused */</div><div class='add'>+	__le32 bt3_lookup_table[IWLAGN_BT_DECISION_LUT_SIZE];</div><div class='add'>+	/*</div><div class='add'>+	 * bit 0: use reduced tx power for control frame</div><div class='add'>+	 * bit 1 - 7: reserved</div><div class='add'>+	 */</div><div class='add'>+	u8 reduce_txpower;</div><div class='add'>+	u8 reserved;</div><div class='ctx'> 	__le16 valid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct iwl6000_bt_cmd {</div><div class='add'>+struct iwl_bt_cmd_v1 {</div><div class='ctx'> 	struct iwl_basic_bt_cmd basic;</div><div class='ctx'> 	u8 prio_boost;</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1929,7 +1945,7 @@ struct iwl6000_bt_cmd {</div><div class='ctx'> 	__le16 rx_prio_boost;	/* SW boost of WiFi rx priority */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct iwl2000_bt_cmd {</div><div class='add'>+struct iwl_bt_cmd_v2 {</div><div class='ctx'> 	struct iwl_basic_bt_cmd basic;</div><div class='ctx'> 	__le32 prio_boost;</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2262,7 +2278,6 @@ struct iwl_ssid_ie {</div><div class='ctx'> #define IWL_GOOD_CRC_TH_DISABLED	0</div><div class='ctx'> #define IWL_GOOD_CRC_TH_DEFAULT		cpu_to_le16(1)</div><div class='ctx'> #define IWL_GOOD_CRC_TH_NEVER		cpu_to_le16(0xffff)</div><div class='del'>-#define IWL_MAX_SCAN_SIZE 1024</div><div class='ctx'> #define IWL_MAX_CMD_SIZE 4096</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -3634,6 +3649,9 @@ enum iwl_bt_coex_profile_traffic_load {</div><div class='ctx'> 		(0x3&lt;&lt;BT_UART_MSG_2_FRAME7RESERVED_POS)</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+#define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD	(-62)</div><div class='add'>+#define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD	(-65)</div><div class='add'>+</div><div class='ctx'> struct iwl_bt_uart_msg {</div><div class='ctx'> 	u8 header;</div><div class='ctx'> 	u8 frame1;</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-shared.h b/drivers/net/wireless/iwlwifi/iwl-config.h<br/>index b515d657a0ad..67b28aa7f9be 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-shared.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-shared.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-config.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-config.h</a></div><div class='hunk'>@@ -60,136 +60,29 @@</div><div class='ctx'>  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='del'>-#ifndef __iwl_shared_h__</div><div class='del'>-#define __iwl_shared_h__</div><div class='add'>+#ifndef __IWL_CONFIG_H__</div><div class='add'>+#define __IWL_CONFIG_H__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;net/mac80211.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "iwl-commands.h"</div><div class='del'>-#include "iwl-fw.h"</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * DOC: shared area - role and goal</div><div class='del'>- *</div><div class='del'>- * The shared area contains all the data exported by the upper layer to the</div><div class='del'>- * other layers. Since the bus and transport layer shouldn't dereference</div><div class='del'>- * iwl_priv, all the data needed by the upper layer and the transport / bus</div><div class='del'>- * layer must be here.</div><div class='del'>- * The shared area also holds pointer to all the other layers. This allows a</div><div class='del'>- * layer to call a function from another layer.</div><div class='del'>- *</div><div class='del'>- * NOTE: All the layers hold a pointer to the shared area which must be shrd.</div><div class='del'>- *	A few macros assume that (_m)-&gt;shrd points to the shared area no matter</div><div class='del'>- *	what _m is.</div><div class='del'>- *</div><div class='del'>- * gets notifications about enumeration, suspend, resume.</div><div class='del'>- * For the moment, the bus layer is not a linux kernel module as itself, and</div><div class='del'>- * the module_init function of the driver must call the bus specific</div><div class='del'>- * registration functions. These functions are listed at the end of this file.</div><div class='del'>- * For the moment, there is only one implementation of this interface: PCI-e.</div><div class='del'>- * This implementation is iwl-pci.c</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct iwl_priv;</div><div class='del'>-struct iwl_trans;</div><div class='del'>-struct iwl_sensitivity_ranges;</div><div class='del'>-struct iwl_trans_ops;</div><div class='del'>-</div><div class='del'>-#define DRV_NAME        "iwlwifi"</div><div class='del'>-#define IWLWIFI_VERSION "in-tree:"</div><div class='del'>-#define DRV_COPYRIGHT	"Copyright(c) 2003-2012 Intel Corporation"</div><div class='del'>-#define DRV_AUTHOR     "&lt;ilw@linux.intel.com&gt;"</div><div class='del'>-</div><div class='del'>-extern struct iwl_mod_params iwlagn_mod_params;</div><div class='del'>-</div><div class='del'>-#define IWL_DISABLE_HT_ALL	BIT(0)</div><div class='del'>-#define IWL_DISABLE_HT_TXAGG	BIT(1)</div><div class='del'>-#define IWL_DISABLE_HT_RXAGG	BIT(2)</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct iwl_mod_params</div><div class='del'>- *</div><div class='del'>- * Holds the module parameters</div><div class='del'>- *</div><div class='del'>- * @sw_crypto: using hardware encryption, default = 0</div><div class='del'>- * @disable_11n: disable 11n capabilities, default = 0,</div><div class='del'>- *	use IWL_DISABLE_HT_* constants</div><div class='del'>- * @amsdu_size_8K: enable 8K amsdu size, default = 1</div><div class='del'>- * @antenna: both antennas (use diversity), default = 0</div><div class='del'>- * @restart_fw: restart firmware, default = 1</div><div class='del'>- * @plcp_check: enable plcp health check, default = true</div><div class='del'>- * @ack_check: disable ack health check, default = false</div><div class='del'>- * @wd_disable: enable stuck queue check, default = 0</div><div class='del'>- * @bt_coex_active: enable bt coex, default = true</div><div class='del'>- * @led_mode: system default, default = 0</div><div class='del'>- * @no_sleep_autoadjust: disable autoadjust, default = true</div><div class='del'>- * @power_save: disable power save, default = false</div><div class='del'>- * @power_level: power level, default = 1</div><div class='del'>- * @debug_level: levels are IWL_DL_*</div><div class='del'>- * @ant_coupling: antenna coupling in dB, default = 0</div><div class='del'>- * @bt_ch_announce: BT channel inhibition, default = enable</div><div class='del'>- * @wanted_ucode_alternative: ucode alternative to use, default = 1</div><div class='del'>- * @auto_agg: enable agg. without check, default = true</div><div class='del'>- */</div><div class='del'>-struct iwl_mod_params {</div><div class='del'>-	int sw_crypto;</div><div class='del'>-	unsigned int disable_11n;</div><div class='del'>-	int amsdu_size_8K;</div><div class='del'>-	int antenna;</div><div class='del'>-	int restart_fw;</div><div class='del'>-	bool plcp_check;</div><div class='del'>-	bool ack_check;</div><div class='del'>-	int  wd_disable;</div><div class='del'>-	bool bt_coex_active;</div><div class='del'>-	int led_mode;</div><div class='del'>-	bool no_sleep_autoadjust;</div><div class='del'>-	bool power_save;</div><div class='del'>-	int power_level;</div><div class='del'>-	u32 debug_level;</div><div class='del'>-	int ant_coupling;</div><div class='del'>-	bool bt_ch_announce;</div><div class='del'>-	int wanted_ucode_alternative;</div><div class='del'>-	bool auto_agg;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct iwl_hw_params</div><div class='del'>- *</div><div class='del'>- * Holds the module parameters</div><div class='del'>- *</div><div class='del'>- * @num_ampdu_queues: num of ampdu queues</div><div class='del'>- * @tx_chains_num: Number of TX chains</div><div class='del'>- * @rx_chains_num: Number of RX chains</div><div class='del'>- * @valid_tx_ant: usable antennas for TX</div><div class='del'>- * @valid_rx_ant: usable antennas for RX</div><div class='del'>- * @ht40_channel: is 40MHz width possible: BIT(IEEE80211_BAND_XXX)</div><div class='del'>- * @sku: sku read from EEPROM</div><div class='del'>- * @rx_page_order: Rx buffer page order</div><div class='del'>- * @ct_kill_threshold: temperature threshold - in hw dependent unit</div><div class='del'>- * @ct_kill_exit_threshold: when to reeable the device - in hw dependent unit</div><div class='del'>- *	relevant for 1000, 6000 and up</div><div class='del'>- * @wd_timeout: TX queues watchdog timeout</div><div class='del'>- * @struct iwl_sensitivity_ranges: range of sensitivity values</div><div class='del'>- * @use_rts_for_aggregation: use rts/cts protection for HT traffic</div><div class='del'>- */</div><div class='del'>-struct iwl_hw_params {</div><div class='del'>-	u8  num_ampdu_queues;</div><div class='del'>-	u8  tx_chains_num;</div><div class='del'>-	u8  rx_chains_num;</div><div class='del'>-	u8  valid_tx_ant;</div><div class='del'>-	u8  valid_rx_ant;</div><div class='del'>-	u8  ht40_channel;</div><div class='del'>-	bool use_rts_for_aggregation;</div><div class='del'>-	u16 sku;</div><div class='del'>-	u32 rx_page_order;</div><div class='del'>-	u32 ct_kill_threshold;</div><div class='del'>-	u32 ct_kill_exit_threshold;</div><div class='del'>-	unsigned int wd_timeout;</div><div class='del'>-</div><div class='del'>-	const struct iwl_sensitivity_ranges *sens;</div><div class='add'>+enum iwl_device_family {</div><div class='add'>+	IWL_DEVICE_FAMILY_UNDEFINED,</div><div class='add'>+	IWL_DEVICE_FAMILY_1000,</div><div class='add'>+	IWL_DEVICE_FAMILY_100,</div><div class='add'>+	IWL_DEVICE_FAMILY_2000,</div><div class='add'>+	IWL_DEVICE_FAMILY_2030,</div><div class='add'>+	IWL_DEVICE_FAMILY_105,</div><div class='add'>+	IWL_DEVICE_FAMILY_135,</div><div class='add'>+	IWL_DEVICE_FAMILY_5000,</div><div class='add'>+	IWL_DEVICE_FAMILY_5150,</div><div class='add'>+	IWL_DEVICE_FAMILY_6000,</div><div class='add'>+	IWL_DEVICE_FAMILY_6000i,</div><div class='add'>+	IWL_DEVICE_FAMILY_6005,</div><div class='add'>+	IWL_DEVICE_FAMILY_6030,</div><div class='add'>+	IWL_DEVICE_FAMILY_6050,</div><div class='add'>+	IWL_DEVICE_FAMILY_6150,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -209,6 +102,34 @@ enum iwl_led_mode {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * This is the threshold value of plcp error rate per 100mSecs.  It is</div><div class='add'>+ * used to set and check for the validity of plcp_delta.</div><div class='add'>+ */</div><div class='add'>+#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN		1</div><div class='add'>+#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF		50</div><div class='add'>+#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF	100</div><div class='add'>+#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF	200</div><div class='add'>+#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX		255</div><div class='add'>+#define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE	0</div><div class='add'>+</div><div class='add'>+/* TX queue watchdog timeouts in mSecs */</div><div class='add'>+#define IWL_WATCHHDOG_DISABLED	0</div><div class='add'>+#define IWL_DEF_WD_TIMEOUT	2000</div><div class='add'>+#define IWL_LONG_WD_TIMEOUT	10000</div><div class='add'>+#define IWL_MAX_WD_TIMEOUT	120000</div><div class='add'>+</div><div class='add'>+/* Antenna presence definitions */</div><div class='add'>+#define	ANT_NONE	0x0</div><div class='add'>+#define	ANT_A		BIT(0)</div><div class='add'>+#define	ANT_B		BIT(1)</div><div class='add'>+#define ANT_C		BIT(2)</div><div class='add'>+#define	ANT_AB		(ANT_A | ANT_B)</div><div class='add'>+#define	ANT_AC		(ANT_A | ANT_C)</div><div class='add'>+#define ANT_BC		(ANT_B | ANT_C)</div><div class='add'>+#define ANT_ABC		(ANT_A | ANT_B | ANT_C)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * @max_ll_items: max number of OTP blocks</div><div class='ctx'>  * @shadow_ram_support: shadow support for OTP memory</div><div class='ctx'>  * @led_compensation: compensate on the led on/off time per HW according</div><div class='hunk'>@@ -217,7 +138,6 @@ enum iwl_led_mode {</div><div class='ctx'>  * @chain_noise_num_beacons: number of beacons used to compute chain noise</div><div class='ctx'>  * @adv_thermal_throttle: support advance thermal throttle</div><div class='ctx'>  * @support_ct_kill_exit: support ct kill exit condition</div><div class='del'>- * @support_wimax_coexist: support wimax/wifi co-exist</div><div class='ctx'>  * @plcp_delta_threshold: plcp error rate threshold used to trigger</div><div class='ctx'>  *	radio tuning when there is a high receiving plcp error rate</div><div class='ctx'>  * @chain_noise_scale: default chain noise scale used for gain computation</div><div class='hunk'>@@ -226,12 +146,10 @@ enum iwl_led_mode {</div><div class='ctx'>  * @shadow_reg_enable: HW shadhow register bit</div><div class='ctx'>  * @hd_v2: v2 of enhanced sensitivity value, used for 2000 series and up</div><div class='ctx'>  * @no_idle_support: do not support idle mode</div><div class='del'>- * wd_disable: disable watchdog timer</div><div class='ctx'>  */</div><div class='ctx'> struct iwl_base_params {</div><div class='ctx'> 	int eeprom_size;</div><div class='ctx'> 	int num_of_queues;	/* def: HW dependent */</div><div class='del'>-	int num_of_ampdu_queues;/* def: HW dependent */</div><div class='ctx'> 	/* for iwl_apm_init() */</div><div class='ctx'> 	u32 pll_cfg_val;</div><div class='ctx'> </div><div class='hunk'>@@ -240,7 +158,6 @@ struct iwl_base_params {</div><div class='ctx'> 	u16 led_compensation;</div><div class='ctx'> 	bool adv_thermal_throttle;</div><div class='ctx'> 	bool support_ct_kill_exit;</div><div class='del'>-	const bool support_wimax_coexist;</div><div class='ctx'> 	u8 plcp_delta_threshold;</div><div class='ctx'> 	s32 chain_noise_scale;</div><div class='ctx'> 	unsigned int wd_timeout;</div><div class='hunk'>@@ -248,7 +165,6 @@ struct iwl_base_params {</div><div class='ctx'> 	const bool shadow_reg_enable;</div><div class='ctx'> 	const bool hd_v2;</div><div class='ctx'> 	const bool no_idle_support;</div><div class='del'>-	const bool wd_disable;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -292,28 +208,21 @@ struct iwl_ht_params {</div><div class='ctx'>  * @eeprom_ver: EEPROM version</div><div class='ctx'>  * @eeprom_calib_ver: EEPROM calibration version</div><div class='ctx'>  * @lib: pointer to the lib ops</div><div class='del'>- * @additional_nic_config: additional nic configuration</div><div class='ctx'>  * @base_params: pointer to basic parameters</div><div class='ctx'>  * @ht_params: point to ht patameters</div><div class='ctx'>  * @bt_params: pointer to bt parameters</div><div class='ctx'>  * @need_temp_offset_calib: need to perform temperature offset calibration</div><div class='ctx'>  * @no_xtal_calib: some devices do not need crystal calibration data,</div><div class='ctx'>  *	don't send it to those</div><div class='del'>- * @scan_rx_antennas: available antenna for scan operation</div><div class='ctx'>  * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)</div><div class='ctx'>  * @adv_pm: advance power management</div><div class='ctx'>  * @rx_with_siso_diversity: 1x1 device with rx antenna diversity</div><div class='ctx'>  * @internal_wimax_coex: internal wifi/wimax combo device</div><div class='del'>- * @iq_invert: I/Q inversion</div><div class='ctx'>  * @temp_offset_v2: support v2 of temperature offset calibration</div><div class='ctx'>  *</div><div class='del'>- * We enable the driver to be backward compatible wrt API version. The</div><div class='del'>- * driver specifies which APIs it supports (with @ucode_api_max being the</div><div class='del'>- * highest and @ucode_api_min the lowest). Firmware will only be loaded if</div><div class='del'>- * it has a supported API version.</div><div class='del'>- *</div><div class='del'>- * The ideal usage of this infrastructure is to treat a new ucode API</div><div class='del'>- * release as a new hardware revision.</div><div class='add'>+ * We enable the driver to be backward compatible wrt. hardware features.</div><div class='add'>+ * API differences in uCode shouldn't be handled here but through TLVs</div><div class='add'>+ * and/or the uCode API version instead.</div><div class='ctx'>  */</div><div class='ctx'> struct iwl_cfg {</div><div class='ctx'> 	/* params specific to an individual device within a device family */</div><div class='hunk'>@@ -322,14 +231,13 @@ struct iwl_cfg {</div><div class='ctx'> 	const unsigned int ucode_api_max;</div><div class='ctx'> 	const unsigned int ucode_api_ok;</div><div class='ctx'> 	const unsigned int ucode_api_min;</div><div class='add'>+	const enum iwl_device_family device_family;</div><div class='ctx'> 	const u32 max_data_size;</div><div class='ctx'> 	const u32 max_inst_size;</div><div class='ctx'> 	u8   valid_tx_ant;</div><div class='ctx'> 	u8   valid_rx_ant;</div><div class='ctx'> 	u16  eeprom_ver;</div><div class='ctx'> 	u16  eeprom_calib_ver;</div><div class='del'>-	const struct iwl_lib_ops *lib;</div><div class='del'>-	void (*additional_nic_config)(struct iwl_priv *priv);</div><div class='ctx'> 	/* params not likely to change within a device family */</div><div class='ctx'> 	const struct iwl_base_params *base_params;</div><div class='ctx'> 	/* params likely to change within a device family */</div><div class='hunk'>@@ -337,99 +245,11 @@ struct iwl_cfg {</div><div class='ctx'> 	const struct iwl_bt_params *bt_params;</div><div class='ctx'> 	const bool need_temp_offset_calib; /* if used set to true */</div><div class='ctx'> 	const bool no_xtal_calib;</div><div class='del'>-	u8 scan_rx_antennas[IEEE80211_NUM_BANDS];</div><div class='ctx'> 	enum iwl_led_mode led_mode;</div><div class='ctx'> 	const bool adv_pm;</div><div class='ctx'> 	const bool rx_with_siso_diversity;</div><div class='ctx'> 	const bool internal_wimax_coex;</div><div class='del'>-	const bool iq_invert;</div><div class='ctx'> 	const bool temp_offset_v2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * struct iwl_shared - shared fields for all the layers of the driver</div><div class='del'>- *</div><div class='del'>- * @status: STATUS_*</div><div class='del'>- * @wowlan: are we running wowlan uCode</div><div class='del'>- * @valid_contexts: microcode/device supports multiple contexts</div><div class='del'>- * @bus: pointer to the bus layer data</div><div class='del'>- * @cfg: see struct iwl_cfg</div><div class='del'>- * @priv: pointer to the upper layer data</div><div class='del'>- * @trans: pointer to the transport layer data</div><div class='del'>- * @nic: pointer to the nic data</div><div class='del'>- * @hw_params: see struct iwl_hw_params</div><div class='del'>- * @lock: protect general shared data</div><div class='del'>- * @eeprom: pointer to the eeprom/OTP image</div><div class='del'>- * @ucode_type: indicator of loaded ucode image</div><div class='del'>- * @device_pointers: pointers to ucode event tables</div><div class='del'>- */</div><div class='del'>-struct iwl_shared {</div><div class='del'>-	unsigned long status;</div><div class='del'>-	u8 valid_contexts;</div><div class='del'>-</div><div class='del'>-	const struct iwl_cfg *cfg;</div><div class='del'>-	struct iwl_trans *trans;</div><div class='del'>-	void *drv;</div><div class='del'>-	struct iwl_hw_params hw_params;</div><div class='del'>-	const struct iwl_fw *fw;</div><div class='del'>-</div><div class='del'>-	/* eeprom -- this is in the card's little endian byte order */</div><div class='del'>-	u8 *eeprom;</div><div class='del'>-</div><div class='del'>-	/* ucode related variables */</div><div class='del'>-	enum iwl_ucode_type ucode_type;</div><div class='del'>-</div><div class='del'>-	struct {</div><div class='del'>-		u32 error_event_table;</div><div class='del'>-		u32 log_event_table;</div><div class='del'>-	} device_pointers;</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*Whatever _m is (iwl_trans, iwl_priv, these macros will work */</div><div class='del'>-#define cfg(_m)		((_m)-&gt;shrd-&gt;cfg)</div><div class='del'>-#define trans(_m)	((_m)-&gt;shrd-&gt;trans)</div><div class='del'>-#define hw_params(_m)	((_m)-&gt;shrd-&gt;hw_params)</div><div class='del'>-</div><div class='del'>-static inline bool iwl_have_debug_level(u32 level)</div><div class='del'>-{</div><div class='del'>-	return iwlagn_mod_params.debug_level &amp; level;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-enum iwl_rxon_context_id {</div><div class='del'>-	IWL_RXON_CTX_BSS,</div><div class='del'>-	IWL_RXON_CTX_PAN,</div><div class='del'>-</div><div class='del'>-	NUM_IWL_RXON_CTX</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int iwlagn_hw_valid_rtc_data_addr(u32 addr);</div><div class='del'>-const char *get_cmd_string(u8 cmd);</div><div class='del'>-</div><div class='del'>-#define IWL_CMD(x) case x: return #x</div><div class='del'>-</div><div class='del'>-/*****************************************************</div><div class='del'>-* DRIVER STATUS FUNCTIONS</div><div class='del'>-******************************************************/</div><div class='del'>-#define STATUS_HCMD_ACTIVE	0	/* host command in progress */</div><div class='del'>-/* 1 is unused (used to be STATUS_HCMD_SYNC_ACTIVE) */</div><div class='del'>-#define STATUS_INT_ENABLED	2</div><div class='del'>-#define STATUS_RF_KILL_HW	3</div><div class='del'>-#define STATUS_CT_KILL		4</div><div class='del'>-#define STATUS_INIT		5</div><div class='del'>-#define STATUS_ALIVE		6</div><div class='del'>-#define STATUS_READY		7</div><div class='del'>-#define STATUS_TEMPERATURE	8</div><div class='del'>-#define STATUS_GEO_CONFIGURED	9</div><div class='del'>-#define STATUS_EXIT_PENDING	10</div><div class='del'>-#define STATUS_STATISTICS	12</div><div class='del'>-#define STATUS_SCANNING		13</div><div class='del'>-#define STATUS_SCAN_ABORTING	14</div><div class='del'>-#define STATUS_SCAN_HW		15</div><div class='del'>-#define STATUS_POWER_PMI	16</div><div class='del'>-#define STATUS_FW_ERROR		17</div><div class='del'>-#define STATUS_DEVICE_ENABLED	18</div><div class='del'>-#define STATUS_CHANNEL_SWITCH_PENDING 19</div><div class='del'>-#define STATUS_SCAN_COMPLETE	20</div><div class='del'>-</div><div class='del'>-#endif /* #__iwl_shared_h__ */</div><div class='add'>+#endif /* __IWL_CONFIG_H__ */</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c<br/>deleted file mode 100644<br/>index 46490d3b95b9..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-core.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1480 +0,0 @@</div><div class='del'>-/******************************************************************************</div><div class='del'>- *</div><div class='del'>- * GPL LICENSE SUMMARY</div><div class='del'>- *</div><div class='del'>- * Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of version 2 of the GNU General Public License as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,</div><div class='del'>- * USA</div><div class='del'>- *</div><div class='del'>- * The full GNU General Public License is included in this distribution</div><div class='del'>- * in the file called LICENSE.GPL.</div><div class='del'>- *</div><div class='del'>- * Contact Information:</div><div class='del'>- *  Intel Linux Wireless &lt;ilw@linux.intel.com&gt;</div><div class='del'>- * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497</div><div class='del'>- *****************************************************************************/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;net/mac80211.h&gt;</div><div class='del'>-</div><div class='del'>-#include "iwl-eeprom.h"</div><div class='del'>-#include "iwl-debug.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='del'>-#include "iwl-io.h"</div><div class='del'>-#include "iwl-power.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='del'>-#include "iwl-agn.h"</div><div class='del'>-#include "iwl-trans.h"</div><div class='del'>-</div><div class='del'>-const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };</div><div class='del'>-</div><div class='del'>-#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */</div><div class='del'>-#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */</div><div class='del'>-static void iwl_init_ht_hw_capab(const struct iwl_priv *priv,</div><div class='del'>-			      struct ieee80211_sta_ht_cap *ht_info,</div><div class='del'>-			      enum ieee80211_band band)</div><div class='del'>-{</div><div class='del'>-	u16 max_bit_rate = 0;</div><div class='del'>-	u8 rx_chains_num = hw_params(priv).rx_chains_num;</div><div class='del'>-	u8 tx_chains_num = hw_params(priv).tx_chains_num;</div><div class='del'>-</div><div class='del'>-	ht_info-&gt;cap = 0;</div><div class='del'>-	memset(&amp;ht_info-&gt;mcs, 0, sizeof(ht_info-&gt;mcs));</div><div class='del'>-</div><div class='del'>-	ht_info-&gt;ht_supported = true;</div><div class='del'>-</div><div class='del'>-	if (cfg(priv)-&gt;ht_params &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;ht_params-&gt;ht_greenfield_support)</div><div class='del'>-		ht_info-&gt;cap |= IEEE80211_HT_CAP_GRN_FLD;</div><div class='del'>-	ht_info-&gt;cap |= IEEE80211_HT_CAP_SGI_20;</div><div class='del'>-	max_bit_rate = MAX_BIT_RATE_20_MHZ;</div><div class='del'>-	if (hw_params(priv).ht40_channel &amp; BIT(band)) {</div><div class='del'>-		ht_info-&gt;cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;</div><div class='del'>-		ht_info-&gt;cap |= IEEE80211_HT_CAP_SGI_40;</div><div class='del'>-		ht_info-&gt;mcs.rx_mask[4] = 0x01;</div><div class='del'>-		max_bit_rate = MAX_BIT_RATE_40_MHZ;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (iwlagn_mod_params.amsdu_size_8K)</div><div class='del'>-		ht_info-&gt;cap |= IEEE80211_HT_CAP_MAX_AMSDU;</div><div class='del'>-</div><div class='del'>-	ht_info-&gt;ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;</div><div class='del'>-	ht_info-&gt;ampdu_density = CFG_HT_MPDU_DENSITY_DEF;</div><div class='del'>-</div><div class='del'>-	ht_info-&gt;mcs.rx_mask[0] = 0xFF;</div><div class='del'>-	if (rx_chains_num &gt;= 2)</div><div class='del'>-		ht_info-&gt;mcs.rx_mask[1] = 0xFF;</div><div class='del'>-	if (rx_chains_num &gt;= 3)</div><div class='del'>-		ht_info-&gt;mcs.rx_mask[2] = 0xFF;</div><div class='del'>-</div><div class='del'>-	/* Highest supported Rx data rate */</div><div class='del'>-	max_bit_rate *= rx_chains_num;</div><div class='del'>-	WARN_ON(max_bit_rate &amp; ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);</div><div class='del'>-	ht_info-&gt;mcs.rx_highest = cpu_to_le16(max_bit_rate);</div><div class='del'>-</div><div class='del'>-	/* Tx MCS capabilities */</div><div class='del'>-	ht_info-&gt;mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;</div><div class='del'>-	if (tx_chains_num != rx_chains_num) {</div><div class='del'>-		ht_info-&gt;mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;</div><div class='del'>-		ht_info-&gt;mcs.tx_params |= ((tx_chains_num - 1) &lt;&lt;</div><div class='del'>-				IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom</div><div class='del'>- */</div><div class='del'>-int iwl_init_geos(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct iwl_channel_info *ch;</div><div class='del'>-	struct ieee80211_supported_band *sband;</div><div class='del'>-	struct ieee80211_channel *channels;</div><div class='del'>-	struct ieee80211_channel *geo_ch;</div><div class='del'>-	struct ieee80211_rate *rates;</div><div class='del'>-	int i = 0;</div><div class='del'>-	s8 max_tx_power = IWLAGN_TX_POWER_TARGET_POWER_MIN;</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;bands[IEEE80211_BAND_2GHZ].n_bitrates ||</div><div class='del'>-	    priv-&gt;bands[IEEE80211_BAND_5GHZ].n_bitrates) {</div><div class='del'>-		IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");</div><div class='del'>-		set_bit(STATUS_GEO_CONFIGURED, &amp;priv-&gt;status);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	channels = kcalloc(priv-&gt;channel_count,</div><div class='del'>-			   sizeof(struct ieee80211_channel), GFP_KERNEL);</div><div class='del'>-	if (!channels)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	rates = kcalloc(IWL_RATE_COUNT_LEGACY, sizeof(struct ieee80211_rate),</div><div class='del'>-			GFP_KERNEL);</div><div class='del'>-	if (!rates) {</div><div class='del'>-		kfree(channels);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* 5.2GHz channels start after the 2.4GHz channels */</div><div class='del'>-	sband = &amp;priv-&gt;bands[IEEE80211_BAND_5GHZ];</div><div class='del'>-	sband-&gt;channels = &amp;channels[ARRAY_SIZE(iwl_eeprom_band_1)];</div><div class='del'>-	/* just OFDM */</div><div class='del'>-	sband-&gt;bitrates = &amp;rates[IWL_FIRST_OFDM_RATE];</div><div class='del'>-	sband-&gt;n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;</div><div class='del'>-</div><div class='del'>-	if (hw_params(priv).sku &amp; EEPROM_SKU_CAP_11N_ENABLE)</div><div class='del'>-		iwl_init_ht_hw_capab(priv, &amp;sband-&gt;ht_cap,</div><div class='del'>-					 IEEE80211_BAND_5GHZ);</div><div class='del'>-</div><div class='del'>-	sband = &amp;priv-&gt;bands[IEEE80211_BAND_2GHZ];</div><div class='del'>-	sband-&gt;channels = channels;</div><div class='del'>-	/* OFDM &amp; CCK */</div><div class='del'>-	sband-&gt;bitrates = rates;</div><div class='del'>-	sband-&gt;n_bitrates = IWL_RATE_COUNT_LEGACY;</div><div class='del'>-</div><div class='del'>-	if (hw_params(priv).sku &amp; EEPROM_SKU_CAP_11N_ENABLE)</div><div class='del'>-		iwl_init_ht_hw_capab(priv, &amp;sband-&gt;ht_cap,</div><div class='del'>-					 IEEE80211_BAND_2GHZ);</div><div class='del'>-</div><div class='del'>-	priv-&gt;ieee_channels = channels;</div><div class='del'>-	priv-&gt;ieee_rates = rates;</div><div class='del'>-</div><div class='del'>-	for (i = 0;  i &lt; priv-&gt;channel_count; i++) {</div><div class='del'>-		ch = &amp;priv-&gt;channel_info[i];</div><div class='del'>-</div><div class='del'>-		/* FIXME: might be removed if scan is OK */</div><div class='del'>-		if (!is_channel_valid(ch))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		sband =  &amp;priv-&gt;bands[ch-&gt;band];</div><div class='del'>-</div><div class='del'>-		geo_ch = &amp;sband-&gt;channels[sband-&gt;n_channels++];</div><div class='del'>-</div><div class='del'>-		geo_ch-&gt;center_freq =</div><div class='del'>-			ieee80211_channel_to_frequency(ch-&gt;channel, ch-&gt;band);</div><div class='del'>-		geo_ch-&gt;max_power = ch-&gt;max_power_avg;</div><div class='del'>-		geo_ch-&gt;max_antenna_gain = 0xff;</div><div class='del'>-		geo_ch-&gt;hw_value = ch-&gt;channel;</div><div class='del'>-</div><div class='del'>-		if (is_channel_valid(ch)) {</div><div class='del'>-			if (!(ch-&gt;flags &amp; EEPROM_CHANNEL_IBSS))</div><div class='del'>-				geo_ch-&gt;flags |= IEEE80211_CHAN_NO_IBSS;</div><div class='del'>-</div><div class='del'>-			if (!(ch-&gt;flags &amp; EEPROM_CHANNEL_ACTIVE))</div><div class='del'>-				geo_ch-&gt;flags |= IEEE80211_CHAN_PASSIVE_SCAN;</div><div class='del'>-</div><div class='del'>-			if (ch-&gt;flags &amp; EEPROM_CHANNEL_RADAR)</div><div class='del'>-				geo_ch-&gt;flags |= IEEE80211_CHAN_RADAR;</div><div class='del'>-</div><div class='del'>-			geo_ch-&gt;flags |= ch-&gt;ht40_extension_channel;</div><div class='del'>-</div><div class='del'>-			if (ch-&gt;max_power_avg &gt; max_tx_power)</div><div class='del'>-				max_tx_power = ch-&gt;max_power_avg;</div><div class='del'>-		} else {</div><div class='del'>-			geo_ch-&gt;flags |= IEEE80211_CHAN_DISABLED;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",</div><div class='del'>-				ch-&gt;channel, geo_ch-&gt;center_freq,</div><div class='del'>-				is_channel_a_band(ch) ?  "5.2" : "2.4",</div><div class='del'>-				geo_ch-&gt;flags &amp; IEEE80211_CHAN_DISABLED ?</div><div class='del'>-				"restricted" : "valid",</div><div class='del'>-				 geo_ch-&gt;flags);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;tx_power_device_lmt = max_tx_power;</div><div class='del'>-	priv-&gt;tx_power_user_lmt = max_tx_power;</div><div class='del'>-	priv-&gt;tx_power_next = max_tx_power;</div><div class='del'>-</div><div class='del'>-	if ((priv-&gt;bands[IEEE80211_BAND_5GHZ].n_channels == 0) &amp;&amp;</div><div class='del'>-	     hw_params(priv).sku &amp; EEPROM_SKU_CAP_BAND_52GHZ) {</div><div class='del'>-		IWL_INFO(priv, "Incorrectly detected BG card as ABG. "</div><div class='del'>-			"Please send your %s to maintainer.\n",</div><div class='del'>-			trans(priv)-&gt;hw_id_str);</div><div class='del'>-		hw_params(priv).sku &amp;= ~EEPROM_SKU_CAP_BAND_52GHZ;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",</div><div class='del'>-		   priv-&gt;bands[IEEE80211_BAND_2GHZ].n_channels,</div><div class='del'>-		   priv-&gt;bands[IEEE80211_BAND_5GHZ].n_channels);</div><div class='del'>-</div><div class='del'>-	set_bit(STATUS_GEO_CONFIGURED, &amp;priv-&gt;status);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * iwl_free_geos - undo allocations in iwl_init_geos</div><div class='del'>- */</div><div class='del'>-void iwl_free_geos(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	kfree(priv-&gt;ieee_channels);</div><div class='del'>-	kfree(priv-&gt;ieee_rates);</div><div class='del'>-	clear_bit(STATUS_GEO_CONFIGURED, &amp;priv-&gt;status);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool iwl_is_channel_extension(struct iwl_priv *priv,</div><div class='del'>-				     enum ieee80211_band band,</div><div class='del'>-				     u16 channel, u8 extension_chan_offset)</div><div class='del'>-{</div><div class='del'>-	const struct iwl_channel_info *ch_info;</div><div class='del'>-</div><div class='del'>-	ch_info = iwl_get_channel_info(priv, band, channel);</div><div class='del'>-	if (!is_channel_valid(ch_info))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)</div><div class='del'>-		return !(ch_info-&gt;ht40_extension_channel &amp;</div><div class='del'>-					IEEE80211_CHAN_NO_HT40PLUS);</div><div class='del'>-	else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)</div><div class='del'>-		return !(ch_info-&gt;ht40_extension_channel &amp;</div><div class='del'>-					IEEE80211_CHAN_NO_HT40MINUS);</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,</div><div class='del'>-			    struct iwl_rxon_context *ctx,</div><div class='del'>-			    struct ieee80211_sta_ht_cap *ht_cap)</div><div class='del'>-{</div><div class='del'>-	if (!ctx-&gt;ht.enabled || !ctx-&gt;ht.is_40mhz)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40</div><div class='del'>-	 * the bit will not set if it is pure 40MHz case</div><div class='del'>-	 */</div><div class='del'>-	if (ht_cap &amp;&amp; !ht_cap-&gt;ht_supported)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_IWLWIFI_DEBUGFS</div><div class='del'>-	if (priv-&gt;disable_ht40)</div><div class='del'>-		return false;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	return iwl_is_channel_extension(priv, priv-&gt;band,</div><div class='del'>-			le16_to_cpu(ctx-&gt;staging.channel),</div><div class='del'>-			ctx-&gt;ht.extension_chan_offset);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)</div><div class='del'>-{</div><div class='del'>-	u16 new_val;</div><div class='del'>-	u16 beacon_factor;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If mac80211 hasn't given us a beacon interval, program</div><div class='del'>-	 * the default into the device (not checking this here</div><div class='del'>-	 * would cause the adjustment below to return the maximum</div><div class='del'>-	 * value, which may break PAN.)</div><div class='del'>-	 */</div><div class='del'>-	if (!beacon_val)</div><div class='del'>-		return DEFAULT_BEACON_INTERVAL;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the beacon interval we obtained from the peer</div><div class='del'>-	 * is too large, we'll have to wake up more often</div><div class='del'>-	 * (and in IBSS case, we'll beacon too much)</div><div class='del'>-	 *</div><div class='del'>-	 * For example, if max_beacon_val is 4096, and the</div><div class='del'>-	 * requested beacon interval is 7000, we'll have to</div><div class='del'>-	 * use 3500 to be able to wake up on the beacons.</div><div class='del'>-	 *</div><div class='del'>-	 * This could badly influence beacon detection stats.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;</div><div class='del'>-	new_val = beacon_val / beacon_factor;</div><div class='del'>-</div><div class='del'>-	if (!new_val)</div><div class='del'>-		new_val = max_beacon_val;</div><div class='del'>-</div><div class='del'>-	return new_val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)</div><div class='del'>-{</div><div class='del'>-	u64 tsf;</div><div class='del'>-	s32 interval_tm, rem;</div><div class='del'>-	struct ieee80211_conf *conf = NULL;</div><div class='del'>-	u16 beacon_int;</div><div class='del'>-	struct ieee80211_vif *vif = ctx-&gt;vif;</div><div class='del'>-</div><div class='del'>-	conf = &amp;priv-&gt;hw-&gt;conf;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;priv-&gt;mutex);</div><div class='del'>-</div><div class='del'>-	memset(&amp;ctx-&gt;timing, 0, sizeof(struct iwl_rxon_time_cmd));</div><div class='del'>-</div><div class='del'>-	ctx-&gt;timing.timestamp = cpu_to_le64(priv-&gt;timestamp);</div><div class='del'>-	ctx-&gt;timing.listen_interval = cpu_to_le16(conf-&gt;listen_interval);</div><div class='del'>-</div><div class='del'>-	beacon_int = vif ? vif-&gt;bss_conf.beacon_int : 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * TODO: For IBSS we need to get atim_window from mac80211,</div><div class='del'>-	 *	 for now just always use 0</div><div class='del'>-	 */</div><div class='del'>-	ctx-&gt;timing.atim_window = 0;</div><div class='del'>-</div><div class='del'>-	if (ctx-&gt;ctxid == IWL_RXON_CTX_PAN &amp;&amp;</div><div class='del'>-	    (!ctx-&gt;vif || ctx-&gt;vif-&gt;type != NL80211_IFTYPE_STATION) &amp;&amp;</div><div class='del'>-	    iwl_is_associated(priv, IWL_RXON_CTX_BSS) &amp;&amp;</div><div class='del'>-	    priv-&gt;contexts[IWL_RXON_CTX_BSS].vif &amp;&amp;</div><div class='del'>-	    priv-&gt;contexts[IWL_RXON_CTX_BSS].vif-&gt;bss_conf.beacon_int) {</div><div class='del'>-		ctx-&gt;timing.beacon_interval =</div><div class='del'>-			priv-&gt;contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;</div><div class='del'>-		beacon_int = le16_to_cpu(ctx-&gt;timing.beacon_interval);</div><div class='del'>-	} else if (ctx-&gt;ctxid == IWL_RXON_CTX_BSS &amp;&amp;</div><div class='del'>-		   iwl_is_associated(priv, IWL_RXON_CTX_PAN) &amp;&amp;</div><div class='del'>-		   priv-&gt;contexts[IWL_RXON_CTX_PAN].vif &amp;&amp;</div><div class='del'>-		   priv-&gt;contexts[IWL_RXON_CTX_PAN].vif-&gt;bss_conf.beacon_int &amp;&amp;</div><div class='del'>-		   (!iwl_is_associated_ctx(ctx) || !ctx-&gt;vif ||</div><div class='del'>-		    !ctx-&gt;vif-&gt;bss_conf.beacon_int)) {</div><div class='del'>-		ctx-&gt;timing.beacon_interval =</div><div class='del'>-			priv-&gt;contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;</div><div class='del'>-		beacon_int = le16_to_cpu(ctx-&gt;timing.beacon_interval);</div><div class='del'>-	} else {</div><div class='del'>-		beacon_int = iwl_adjust_beacon_interval(beacon_int,</div><div class='del'>-			IWL_MAX_UCODE_BEACON_INTERVAL * TIME_UNIT);</div><div class='del'>-		ctx-&gt;timing.beacon_interval = cpu_to_le16(beacon_int);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ctx-&gt;beacon_int = beacon_int;</div><div class='del'>-</div><div class='del'>-	tsf = priv-&gt;timestamp; /* tsf is modifed by do_div: copy it */</div><div class='del'>-	interval_tm = beacon_int * TIME_UNIT;</div><div class='del'>-	rem = do_div(tsf, interval_tm);</div><div class='del'>-	ctx-&gt;timing.beacon_init_val = cpu_to_le32(interval_tm - rem);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;timing.dtim_period = vif ? (vif-&gt;bss_conf.dtim_period ?: 1) : 1;</div><div class='del'>-</div><div class='del'>-	IWL_DEBUG_ASSOC(priv,</div><div class='del'>-			"beacon interval %d beacon timer %d beacon tim %d\n",</div><div class='del'>-			le16_to_cpu(ctx-&gt;timing.beacon_interval),</div><div class='del'>-			le32_to_cpu(ctx-&gt;timing.beacon_init_val),</div><div class='del'>-			le16_to_cpu(ctx-&gt;timing.atim_window));</div><div class='del'>-</div><div class='del'>-	return iwl_dvm_send_cmd_pdu(priv, ctx-&gt;rxon_timing_cmd,</div><div class='del'>-				CMD_SYNC, sizeof(ctx-&gt;timing), &amp;ctx-&gt;timing);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='del'>-			   int hw_decrypt)</div><div class='del'>-{</div><div class='del'>-	struct iwl_rxon_cmd *rxon = &amp;ctx-&gt;staging;</div><div class='del'>-</div><div class='del'>-	if (hw_decrypt)</div><div class='del'>-		rxon-&gt;filter_flags &amp;= ~RXON_FILTER_DIS_DECRYPT_MSK;</div><div class='del'>-	else</div><div class='del'>-		rxon-&gt;filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* validate RXON structure is valid */</div><div class='del'>-int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)</div><div class='del'>-{</div><div class='del'>-	struct iwl_rxon_cmd *rxon = &amp;ctx-&gt;staging;</div><div class='del'>-	u32 errors = 0;</div><div class='del'>-</div><div class='del'>-	if (rxon-&gt;flags &amp; RXON_FLG_BAND_24G_MSK) {</div><div class='del'>-		if (rxon-&gt;flags &amp; RXON_FLG_TGJ_NARROW_BAND_MSK) {</div><div class='del'>-			IWL_WARN(priv, "check 2.4G: wrong narrow\n");</div><div class='del'>-			errors |= BIT(0);</div><div class='del'>-		}</div><div class='del'>-		if (rxon-&gt;flags &amp; RXON_FLG_RADAR_DETECT_MSK) {</div><div class='del'>-			IWL_WARN(priv, "check 2.4G: wrong radar\n");</div><div class='del'>-			errors |= BIT(1);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		if (!(rxon-&gt;flags &amp; RXON_FLG_SHORT_SLOT_MSK)) {</div><div class='del'>-			IWL_WARN(priv, "check 5.2G: not short slot!\n");</div><div class='del'>-			errors |= BIT(2);</div><div class='del'>-		}</div><div class='del'>-		if (rxon-&gt;flags &amp; RXON_FLG_CCK_MSK) {</div><div class='del'>-			IWL_WARN(priv, "check 5.2G: CCK!\n");</div><div class='del'>-			errors |= BIT(3);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if ((rxon-&gt;node_addr[0] | rxon-&gt;bssid_addr[0]) &amp; 0x1) {</div><div class='del'>-		IWL_WARN(priv, "mac/bssid mcast!\n");</div><div class='del'>-		errors |= BIT(4);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* make sure basic rates 6Mbps and 1Mbps are supported */</div><div class='del'>-	if ((rxon-&gt;ofdm_basic_rates &amp; IWL_RATE_6M_MASK) == 0 &amp;&amp;</div><div class='del'>-	    (rxon-&gt;cck_basic_rates &amp; IWL_RATE_1M_MASK) == 0) {</div><div class='del'>-		IWL_WARN(priv, "neither 1 nor 6 are basic\n");</div><div class='del'>-		errors |= BIT(5);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (le16_to_cpu(rxon-&gt;assoc_id) &gt; 2007) {</div><div class='del'>-		IWL_WARN(priv, "aid &gt; 2007\n");</div><div class='del'>-		errors |= BIT(6);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((rxon-&gt;flags &amp; (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))</div><div class='del'>-			== (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {</div><div class='del'>-		IWL_WARN(priv, "CCK and short slot\n");</div><div class='del'>-		errors |= BIT(7);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((rxon-&gt;flags &amp; (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))</div><div class='del'>-			== (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {</div><div class='del'>-		IWL_WARN(priv, "CCK and auto detect");</div><div class='del'>-		errors |= BIT(8);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((rxon-&gt;flags &amp; (RXON_FLG_AUTO_DETECT_MSK |</div><div class='del'>-			    RXON_FLG_TGG_PROTECT_MSK)) ==</div><div class='del'>-			    RXON_FLG_TGG_PROTECT_MSK) {</div><div class='del'>-		IWL_WARN(priv, "TGg but no auto-detect\n");</div><div class='del'>-		errors |= BIT(9);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rxon-&gt;channel == 0) {</div><div class='del'>-		IWL_WARN(priv, "zero channel is invalid\n");</div><div class='del'>-		errors |= BIT(10);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	WARN(errors, "Invalid RXON (%#x), channel %d",</div><div class='del'>-	     errors, le16_to_cpu(rxon-&gt;channel));</div><div class='del'>-</div><div class='del'>-	return errors ? -EINVAL : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed</div><div class='del'>- * @priv: staging_rxon is compared to active_rxon</div><div class='del'>- *</div><div class='del'>- * If the RXON structure is changing enough to require a new tune,</div><div class='del'>- * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that</div><div class='del'>- * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.</div><div class='del'>- */</div><div class='del'>-int iwl_full_rxon_required(struct iwl_priv *priv,</div><div class='del'>-			   struct iwl_rxon_context *ctx)</div><div class='del'>-{</div><div class='del'>-	const struct iwl_rxon_cmd *staging = &amp;ctx-&gt;staging;</div><div class='del'>-	const struct iwl_rxon_cmd *active = &amp;ctx-&gt;active;</div><div class='del'>-</div><div class='del'>-#define CHK(cond)							\</div><div class='del'>-	if ((cond)) {							\</div><div class='del'>-		IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n");	\</div><div class='del'>-		return 1;						\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#define CHK_NEQ(c1, c2)						\</div><div class='del'>-	if ((c1) != (c2)) {					\</div><div class='del'>-		IWL_DEBUG_INFO(priv, "need full RXON - "	\</div><div class='del'>-			       #c1 " != " #c2 " - %d != %d\n",	\</div><div class='del'>-			       (c1), (c2));			\</div><div class='del'>-		return 1;					\</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* These items are only settable from the full RXON command */</div><div class='del'>-	CHK(!iwl_is_associated_ctx(ctx));</div><div class='del'>-	CHK(compare_ether_addr(staging-&gt;bssid_addr, active-&gt;bssid_addr));</div><div class='del'>-	CHK(compare_ether_addr(staging-&gt;node_addr, active-&gt;node_addr));</div><div class='del'>-	CHK(compare_ether_addr(staging-&gt;wlap_bssid_addr,</div><div class='del'>-				active-&gt;wlap_bssid_addr));</div><div class='del'>-	CHK_NEQ(staging-&gt;dev_type, active-&gt;dev_type);</div><div class='del'>-	CHK_NEQ(staging-&gt;channel, active-&gt;channel);</div><div class='del'>-	CHK_NEQ(staging-&gt;air_propagation, active-&gt;air_propagation);</div><div class='del'>-	CHK_NEQ(staging-&gt;ofdm_ht_single_stream_basic_rates,</div><div class='del'>-		active-&gt;ofdm_ht_single_stream_basic_rates);</div><div class='del'>-	CHK_NEQ(staging-&gt;ofdm_ht_dual_stream_basic_rates,</div><div class='del'>-		active-&gt;ofdm_ht_dual_stream_basic_rates);</div><div class='del'>-	CHK_NEQ(staging-&gt;ofdm_ht_triple_stream_basic_rates,</div><div class='del'>-		active-&gt;ofdm_ht_triple_stream_basic_rates);</div><div class='del'>-	CHK_NEQ(staging-&gt;assoc_id, active-&gt;assoc_id);</div><div class='del'>-</div><div class='del'>-	/* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can</div><div class='del'>-	 * be updated with the RXON_ASSOC command -- however only some</div><div class='del'>-	 * flag transitions are allowed using RXON_ASSOC */</div><div class='del'>-</div><div class='del'>-	/* Check if we are not switching bands */</div><div class='del'>-	CHK_NEQ(staging-&gt;flags &amp; RXON_FLG_BAND_24G_MSK,</div><div class='del'>-		active-&gt;flags &amp; RXON_FLG_BAND_24G_MSK);</div><div class='del'>-</div><div class='del'>-	/* Check if we are switching association toggle */</div><div class='del'>-	CHK_NEQ(staging-&gt;filter_flags &amp; RXON_FILTER_ASSOC_MSK,</div><div class='del'>-		active-&gt;filter_flags &amp; RXON_FILTER_ASSOC_MSK);</div><div class='del'>-</div><div class='del'>-#undef CHK</div><div class='del'>-#undef CHK_NEQ</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _iwl_set_rxon_ht(struct iwl_priv *priv,</div><div class='del'>-			     struct iwl_ht_config *ht_conf,</div><div class='del'>-			     struct iwl_rxon_context *ctx)</div><div class='del'>-{</div><div class='del'>-	struct iwl_rxon_cmd *rxon = &amp;ctx-&gt;staging;</div><div class='del'>-</div><div class='del'>-	if (!ctx-&gt;ht.enabled) {</div><div class='del'>-		rxon-&gt;flags &amp;= ~(RXON_FLG_CHANNEL_MODE_MSK |</div><div class='del'>-			RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |</div><div class='del'>-			RXON_FLG_HT40_PROT_MSK |</div><div class='del'>-			RXON_FLG_HT_PROT_MSK);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* FIXME: if the definition of ht.protection changed, the "translation"</div><div class='del'>-	 * will be needed for rxon-&gt;flags</div><div class='del'>-	 */</div><div class='del'>-	rxon-&gt;flags |= cpu_to_le32(ctx-&gt;ht.protection &lt;&lt; RXON_FLG_HT_OPERATING_MODE_POS);</div><div class='del'>-</div><div class='del'>-	/* Set up channel bandwidth:</div><div class='del'>-	 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */</div><div class='del'>-	/* clear the HT channel mode before set the mode */</div><div class='del'>-	rxon-&gt;flags &amp;= ~(RXON_FLG_CHANNEL_MODE_MSK |</div><div class='del'>-			 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);</div><div class='del'>-	if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {</div><div class='del'>-		/* pure ht40 */</div><div class='del'>-		if (ctx-&gt;ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {</div><div class='del'>-			rxon-&gt;flags |= RXON_FLG_CHANNEL_MODE_PURE_40;</div><div class='del'>-			/* Note: control channel is opposite of extension channel */</div><div class='del'>-			switch (ctx-&gt;ht.extension_chan_offset) {</div><div class='del'>-			case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:</div><div class='del'>-				rxon-&gt;flags &amp;= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;</div><div class='del'>-				break;</div><div class='del'>-			case IEEE80211_HT_PARAM_CHA_SEC_BELOW:</div><div class='del'>-				rxon-&gt;flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			/* Note: control channel is opposite of extension channel */</div><div class='del'>-			switch (ctx-&gt;ht.extension_chan_offset) {</div><div class='del'>-			case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:</div><div class='del'>-				rxon-&gt;flags &amp;= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);</div><div class='del'>-				rxon-&gt;flags |= RXON_FLG_CHANNEL_MODE_MIXED;</div><div class='del'>-				break;</div><div class='del'>-			case IEEE80211_HT_PARAM_CHA_SEC_BELOW:</div><div class='del'>-				rxon-&gt;flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;</div><div class='del'>-				rxon-&gt;flags |= RXON_FLG_CHANNEL_MODE_MIXED;</div><div class='del'>-				break;</div><div class='del'>-			case IEEE80211_HT_PARAM_CHA_SEC_NONE:</div><div class='del'>-			default:</div><div class='del'>-				/* channel location only valid if in Mixed mode */</div><div class='del'>-				IWL_ERR(priv, "invalid extension channel offset\n");</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		rxon-&gt;flags |= RXON_FLG_CHANNEL_MODE_LEGACY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	iwlagn_set_rxon_chain(priv, ctx);</div><div class='del'>-</div><div class='del'>-	IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "</div><div class='del'>-			"extension channel offset 0x%x\n",</div><div class='del'>-			le32_to_cpu(rxon-&gt;flags), ctx-&gt;ht.protection,</div><div class='del'>-			ctx-&gt;ht.extension_chan_offset);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)</div><div class='del'>-{</div><div class='del'>-	struct iwl_rxon_context *ctx;</div><div class='del'>-</div><div class='del'>-	for_each_context(priv, ctx)</div><div class='del'>-		_iwl_set_rxon_ht(priv, ht_conf, ctx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Return valid, unused, channel for a passive scan to reset the RF */</div><div class='del'>-u8 iwl_get_single_channel_number(struct iwl_priv *priv,</div><div class='del'>-				 enum ieee80211_band band)</div><div class='del'>-{</div><div class='del'>-	const struct iwl_channel_info *ch_info;</div><div class='del'>-	int i;</div><div class='del'>-	u8 channel = 0;</div><div class='del'>-	u8 min, max;</div><div class='del'>-	struct iwl_rxon_context *ctx;</div><div class='del'>-</div><div class='del'>-	if (band == IEEE80211_BAND_5GHZ) {</div><div class='del'>-		min = 14;</div><div class='del'>-		max = priv-&gt;channel_count;</div><div class='del'>-	} else {</div><div class='del'>-		min = 0;</div><div class='del'>-		max = 14;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = min; i &lt; max; i++) {</div><div class='del'>-		bool busy = false;</div><div class='del'>-</div><div class='del'>-		for_each_context(priv, ctx) {</div><div class='del'>-			busy = priv-&gt;channel_info[i].channel ==</div><div class='del'>-				le16_to_cpu(ctx-&gt;staging.channel);</div><div class='del'>-			if (busy)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (busy)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		channel = priv-&gt;channel_info[i].channel;</div><div class='del'>-		ch_info = iwl_get_channel_info(priv, band, channel);</div><div class='del'>-		if (is_channel_valid(ch_info))</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return channel;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * iwl_set_rxon_channel - Set the band and channel values in staging RXON</div><div class='del'>- * @ch: requested channel as a pointer to struct ieee80211_channel</div><div class='del'>-</div><div class='del'>- * NOTE:  Does not commit to the hardware; it sets appropriate bit fields</div><div class='del'>- * in the staging RXON flag structure based on the ch-&gt;band</div><div class='del'>- */</div><div class='del'>-void iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,</div><div class='del'>-			 struct iwl_rxon_context *ctx)</div><div class='del'>-{</div><div class='del'>-	enum ieee80211_band band = ch-&gt;band;</div><div class='del'>-	u16 channel = ch-&gt;hw_value;</div><div class='del'>-</div><div class='del'>-	if ((le16_to_cpu(ctx-&gt;staging.channel) == channel) &amp;&amp;</div><div class='del'>-	    (priv-&gt;band == band))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ctx-&gt;staging.channel = cpu_to_le16(channel);</div><div class='del'>-	if (band == IEEE80211_BAND_5GHZ)</div><div class='del'>-		ctx-&gt;staging.flags &amp;= ~RXON_FLG_BAND_24G_MSK;</div><div class='del'>-	else</div><div class='del'>-		ctx-&gt;staging.flags |= RXON_FLG_BAND_24G_MSK;</div><div class='del'>-</div><div class='del'>-	priv-&gt;band = band;</div><div class='del'>-</div><div class='del'>-	IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_set_flags_for_band(struct iwl_priv *priv,</div><div class='del'>-			    struct iwl_rxon_context *ctx,</div><div class='del'>-			    enum ieee80211_band band,</div><div class='del'>-			    struct ieee80211_vif *vif)</div><div class='del'>-{</div><div class='del'>-	if (band == IEEE80211_BAND_5GHZ) {</div><div class='del'>-		ctx-&gt;staging.flags &amp;=</div><div class='del'>-		    ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK</div><div class='del'>-		      | RXON_FLG_CCK_MSK);</div><div class='del'>-		ctx-&gt;staging.flags |= RXON_FLG_SHORT_SLOT_MSK;</div><div class='del'>-	} else {</div><div class='del'>-		/* Copied from iwl_post_associate() */</div><div class='del'>-		if (vif &amp;&amp; vif-&gt;bss_conf.use_short_slot)</div><div class='del'>-			ctx-&gt;staging.flags |= RXON_FLG_SHORT_SLOT_MSK;</div><div class='del'>-		else</div><div class='del'>-			ctx-&gt;staging.flags &amp;= ~RXON_FLG_SHORT_SLOT_MSK;</div><div class='del'>-</div><div class='del'>-		ctx-&gt;staging.flags |= RXON_FLG_BAND_24G_MSK;</div><div class='del'>-		ctx-&gt;staging.flags |= RXON_FLG_AUTO_DETECT_MSK;</div><div class='del'>-		ctx-&gt;staging.flags &amp;= ~RXON_FLG_CCK_MSK;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * initialize rxon structure with default values from eeprom</div><div class='del'>- */</div><div class='del'>-void iwl_connection_init_rx_config(struct iwl_priv *priv,</div><div class='del'>-				   struct iwl_rxon_context *ctx)</div><div class='del'>-{</div><div class='del'>-	const struct iwl_channel_info *ch_info;</div><div class='del'>-</div><div class='del'>-	memset(&amp;ctx-&gt;staging, 0, sizeof(ctx-&gt;staging));</div><div class='del'>-</div><div class='del'>-	if (!ctx-&gt;vif) {</div><div class='del'>-		ctx-&gt;staging.dev_type = ctx-&gt;unused_devtype;</div><div class='del'>-	} else switch (ctx-&gt;vif-&gt;type) {</div><div class='del'>-	case NL80211_IFTYPE_AP:</div><div class='del'>-		ctx-&gt;staging.dev_type = ctx-&gt;ap_devtype;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case NL80211_IFTYPE_STATION:</div><div class='del'>-		ctx-&gt;staging.dev_type = ctx-&gt;station_devtype;</div><div class='del'>-		ctx-&gt;staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case NL80211_IFTYPE_ADHOC:</div><div class='del'>-		ctx-&gt;staging.dev_type = ctx-&gt;ibss_devtype;</div><div class='del'>-		ctx-&gt;staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;</div><div class='del'>-		ctx-&gt;staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |</div><div class='del'>-						  RXON_FILTER_ACCEPT_GRP_MSK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		IWL_ERR(priv, "Unsupported interface type %d\n",</div><div class='del'>-			ctx-&gt;vif-&gt;type);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#if 0</div><div class='del'>-	/* TODO:  Figure out when short_preamble would be set and cache from</div><div class='del'>-	 * that */</div><div class='del'>-	if (!hw_to_local(priv-&gt;hw)-&gt;short_preamble)</div><div class='del'>-		ctx-&gt;staging.flags &amp;= ~RXON_FLG_SHORT_PREAMBLE_MSK;</div><div class='del'>-	else</div><div class='del'>-		ctx-&gt;staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	ch_info = iwl_get_channel_info(priv, priv-&gt;band,</div><div class='del'>-				       le16_to_cpu(ctx-&gt;active.channel));</div><div class='del'>-</div><div class='del'>-	if (!ch_info)</div><div class='del'>-		ch_info = &amp;priv-&gt;channel_info[0];</div><div class='del'>-</div><div class='del'>-	ctx-&gt;staging.channel = cpu_to_le16(ch_info-&gt;channel);</div><div class='del'>-	priv-&gt;band = ch_info-&gt;band;</div><div class='del'>-</div><div class='del'>-	iwl_set_flags_for_band(priv, ctx, priv-&gt;band, ctx-&gt;vif);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;staging.ofdm_basic_rates =</div><div class='del'>-	    (IWL_OFDM_RATES_MASK &gt;&gt; IWL_FIRST_OFDM_RATE) &amp; 0xFF;</div><div class='del'>-	ctx-&gt;staging.cck_basic_rates =</div><div class='del'>-	    (IWL_CCK_RATES_MASK &gt;&gt; IWL_FIRST_CCK_RATE) &amp; 0xF;</div><div class='del'>-</div><div class='del'>-	/* clear both MIX and PURE40 mode flag */</div><div class='del'>-	ctx-&gt;staging.flags &amp;= ~(RXON_FLG_CHANNEL_MODE_MIXED |</div><div class='del'>-					RXON_FLG_CHANNEL_MODE_PURE_40);</div><div class='del'>-	if (ctx-&gt;vif)</div><div class='del'>-		memcpy(ctx-&gt;staging.node_addr, ctx-&gt;vif-&gt;addr, ETH_ALEN);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;staging.ofdm_ht_single_stream_basic_rates = 0xff;</div><div class='del'>-	ctx-&gt;staging.ofdm_ht_dual_stream_basic_rates = 0xff;</div><div class='del'>-	ctx-&gt;staging.ofdm_ht_triple_stream_basic_rates = 0xff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_set_rate(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	const struct ieee80211_supported_band *hw = NULL;</div><div class='del'>-	struct ieee80211_rate *rate;</div><div class='del'>-	struct iwl_rxon_context *ctx;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	hw = iwl_get_hw_mode(priv, priv-&gt;band);</div><div class='del'>-	if (!hw) {</div><div class='del'>-		IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;active_rate = 0;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; hw-&gt;n_bitrates; i++) {</div><div class='del'>-		rate = &amp;(hw-&gt;bitrates[i]);</div><div class='del'>-		if (rate-&gt;hw_value &lt; IWL_RATE_COUNT_LEGACY)</div><div class='del'>-			priv-&gt;active_rate |= (1 &lt;&lt; rate-&gt;hw_value);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv-&gt;active_rate);</div><div class='del'>-</div><div class='del'>-	for_each_context(priv, ctx) {</div><div class='del'>-		ctx-&gt;staging.cck_basic_rates =</div><div class='del'>-		    (IWL_CCK_BASIC_RATES_MASK &gt;&gt; IWL_FIRST_CCK_RATE) &amp; 0xF;</div><div class='del'>-</div><div class='del'>-		ctx-&gt;staging.ofdm_basic_rates =</div><div class='del'>-		   (IWL_OFDM_BASIC_RATES_MASK &gt;&gt; IWL_FIRST_OFDM_RATE) &amp; 0xFF;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * MULTI-FIXME</div><div class='del'>-	 * See iwlagn_mac_channel_switch.</div><div class='del'>-	 */</div><div class='del'>-	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_BSS];</div><div class='del'>-</div><div class='del'>-	if (test_bit(STATUS_EXIT_PENDING, &amp;priv-&gt;status))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (test_and_clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &amp;priv-&gt;status))</div><div class='del'>-		ieee80211_chswitch_done(ctx-&gt;vif, is_success);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_IWLWIFI_DEBUG</div><div class='del'>-void iwl_print_rx_config_cmd(struct iwl_priv *priv,</div><div class='del'>-			     enum iwl_rxon_context_id ctxid)</div><div class='del'>-{</div><div class='del'>-	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[ctxid];</div><div class='del'>-	struct iwl_rxon_cmd *rxon = &amp;ctx-&gt;staging;</div><div class='del'>-</div><div class='del'>-	IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");</div><div class='del'>-	iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));</div><div class='del'>-	IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon-&gt;channel));</div><div class='del'>-	IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon-&gt;flags));</div><div class='del'>-	IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",</div><div class='del'>-			le32_to_cpu(rxon-&gt;filter_flags));</div><div class='del'>-	IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon-&gt;dev_type);</div><div class='del'>-	IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",</div><div class='del'>-			rxon-&gt;ofdm_basic_rates);</div><div class='del'>-	IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon-&gt;cck_basic_rates);</div><div class='del'>-	IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon-&gt;node_addr);</div><div class='del'>-	IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon-&gt;bssid_addr);</div><div class='del'>-	IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon-&gt;assoc_id));</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)</div><div class='del'>-{</div><div class='del'>-	unsigned int reload_msec;</div><div class='del'>-	unsigned long reload_jiffies;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_IWLWIFI_DEBUG</div><div class='del'>-	if (iwl_have_debug_level(IWL_DL_FW_ERRORS))</div><div class='del'>-		iwl_print_rx_config_cmd(priv, IWL_RXON_CTX_BSS);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* uCode is no longer loaded. */</div><div class='del'>-	priv-&gt;ucode_loaded = false;</div><div class='del'>-</div><div class='del'>-	/* Set the FW error flag -- cleared on iwl_down */</div><div class='del'>-	set_bit(STATUS_FW_ERROR, &amp;priv-&gt;shrd-&gt;status);</div><div class='del'>-</div><div class='del'>-	/* Cancel currently queued command. */</div><div class='del'>-	clear_bit(STATUS_HCMD_ACTIVE, &amp;priv-&gt;shrd-&gt;status);</div><div class='del'>-</div><div class='del'>-	iwl_abort_notification_waits(&amp;priv-&gt;notif_wait);</div><div class='del'>-</div><div class='del'>-	/* Keep the restart process from trying to send host</div><div class='del'>-	 * commands by clearing the ready bit */</div><div class='del'>-	clear_bit(STATUS_READY, &amp;priv-&gt;status);</div><div class='del'>-</div><div class='del'>-	wake_up(&amp;trans(priv)-&gt;wait_command_queue);</div><div class='del'>-</div><div class='del'>-	if (!ondemand) {</div><div class='del'>-		/*</div><div class='del'>-		 * If firmware keep reloading, then it indicate something</div><div class='del'>-		 * serious wrong and firmware having problem to recover</div><div class='del'>-		 * from it. Instead of keep trying which will fill the syslog</div><div class='del'>-		 * and hang the system, let's just stop it</div><div class='del'>-		 */</div><div class='del'>-		reload_jiffies = jiffies;</div><div class='del'>-		reload_msec = jiffies_to_msecs((long) reload_jiffies -</div><div class='del'>-					(long) priv-&gt;reload_jiffies);</div><div class='del'>-		priv-&gt;reload_jiffies = reload_jiffies;</div><div class='del'>-		if (reload_msec &lt;= IWL_MIN_RELOAD_DURATION) {</div><div class='del'>-			priv-&gt;reload_count++;</div><div class='del'>-			if (priv-&gt;reload_count &gt;= IWL_MAX_CONTINUE_RELOAD_CNT) {</div><div class='del'>-				IWL_ERR(priv, "BUG_ON, Stop restarting\n");</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-		} else</div><div class='del'>-			priv-&gt;reload_count = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!test_bit(STATUS_EXIT_PENDING, &amp;priv-&gt;status)) {</div><div class='del'>-		if (iwlagn_mod_params.restart_fw) {</div><div class='del'>-			IWL_DEBUG_FW_ERRORS(priv,</div><div class='del'>-				  "Restarting adapter due to uCode error.\n");</div><div class='del'>-			queue_work(priv-&gt;workqueue, &amp;priv-&gt;restart);</div><div class='del'>-		} else</div><div class='del'>-			IWL_DEBUG_FW_ERRORS(priv,</div><div class='del'>-				  "Detected FW error, but not restarting\n");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	s8 prev_tx_power;</div><div class='del'>-	bool defer;</div><div class='del'>-	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_BSS];</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;priv-&gt;mutex);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;tx_power_user_lmt == tx_power &amp;&amp; !force)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (tx_power &lt; IWLAGN_TX_POWER_TARGET_POWER_MIN) {</div><div class='del'>-		IWL_WARN(priv,</div><div class='del'>-			 "Requested user TXPOWER %d below lower limit %d.\n",</div><div class='del'>-			 tx_power,</div><div class='del'>-			 IWLAGN_TX_POWER_TARGET_POWER_MIN);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (tx_power &gt; priv-&gt;tx_power_device_lmt) {</div><div class='del'>-		IWL_WARN(priv,</div><div class='del'>-			"Requested user TXPOWER %d above upper limit %d.\n",</div><div class='del'>-			 tx_power, priv-&gt;tx_power_device_lmt);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!iwl_is_ready_rf(priv))</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	/* scan complete and commit_rxon use tx_power_next value,</div><div class='del'>-	 * it always need to be updated for newest request */</div><div class='del'>-	priv-&gt;tx_power_next = tx_power;</div><div class='del'>-</div><div class='del'>-	/* do not set tx power when scanning or channel changing */</div><div class='del'>-	defer = test_bit(STATUS_SCANNING, &amp;priv-&gt;status) ||</div><div class='del'>-		memcmp(&amp;ctx-&gt;active, &amp;ctx-&gt;staging, sizeof(ctx-&gt;staging));</div><div class='del'>-	if (defer &amp;&amp; !force) {</div><div class='del'>-		IWL_DEBUG_INFO(priv, "Deferring tx power set\n");</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	prev_tx_power = priv-&gt;tx_power_user_lmt;</div><div class='del'>-	priv-&gt;tx_power_user_lmt = tx_power;</div><div class='del'>-</div><div class='del'>-	ret = iwlagn_send_tx_power(priv);</div><div class='del'>-</div><div class='del'>-	/* if fail to set tx_power, restore the orig. tx power */</div><div class='del'>-	if (ret) {</div><div class='del'>-		priv-&gt;tx_power_user_lmt = prev_tx_power;</div><div class='del'>-		priv-&gt;tx_power_next = prev_tx_power;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_send_bt_config(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct iwl_bt_cmd bt_cmd = {</div><div class='del'>-		.lead_time = BT_LEAD_TIME_DEF,</div><div class='del'>-		.max_kill = BT_MAX_KILL_DEF,</div><div class='del'>-		.kill_ack_mask = 0,</div><div class='del'>-		.kill_cts_mask = 0,</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	if (!iwlagn_mod_params.bt_coex_active)</div><div class='del'>-		bt_cmd.flags = BT_COEX_DISABLE;</div><div class='del'>-	else</div><div class='del'>-		bt_cmd.flags = BT_COEX_ENABLE;</div><div class='del'>-</div><div class='del'>-	priv-&gt;bt_enable_flag = bt_cmd.flags;</div><div class='del'>-	IWL_DEBUG_INFO(priv, "BT coex %s\n",</div><div class='del'>-		(bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");</div><div class='del'>-</div><div class='del'>-	if (iwl_dvm_send_cmd_pdu(priv, REPLY_BT_CONFIG,</div><div class='del'>-			     CMD_SYNC, sizeof(struct iwl_bt_cmd), &amp;bt_cmd))</div><div class='del'>-		IWL_ERR(priv, "failed to send BT Coex Config\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)</div><div class='del'>-{</div><div class='del'>-	struct iwl_statistics_cmd statistics_cmd = {</div><div class='del'>-		.configuration_flags =</div><div class='del'>-			clear ? IWL_STATS_CONF_CLEAR_STATS : 0,</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	if (flags &amp; CMD_ASYNC)</div><div class='del'>-		return iwl_dvm_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,</div><div class='del'>-					      CMD_ASYNC,</div><div class='del'>-					       sizeof(struct iwl_statistics_cmd),</div><div class='del'>-					       &amp;statistics_cmd);</div><div class='del'>-	else</div><div class='del'>-		return iwl_dvm_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,</div><div class='del'>-					CMD_SYNC,</div><div class='del'>-					sizeof(struct iwl_statistics_cmd),</div><div class='del'>-					&amp;statistics_cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_IWLWIFI_DEBUGFS</div><div class='del'>-</div><div class='del'>-#define IWL_TRAFFIC_DUMP_SIZE	(IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)</div><div class='del'>-</div><div class='del'>-void iwl_reset_traffic_log(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	priv-&gt;tx_traffic_idx = 0;</div><div class='del'>-	priv-&gt;rx_traffic_idx = 0;</div><div class='del'>-	if (priv-&gt;tx_traffic)</div><div class='del'>-		memset(priv-&gt;tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);</div><div class='del'>-	if (priv-&gt;rx_traffic)</div><div class='del'>-		memset(priv-&gt;rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int iwl_alloc_traffic_mem(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;</div><div class='del'>-</div><div class='del'>-	if (iwl_have_debug_level(IWL_DL_TX)) {</div><div class='del'>-		if (!priv-&gt;tx_traffic) {</div><div class='del'>-			priv-&gt;tx_traffic =</div><div class='del'>-				kzalloc(traffic_size, GFP_KERNEL);</div><div class='del'>-			if (!priv-&gt;tx_traffic)</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (iwl_have_debug_level(IWL_DL_RX)) {</div><div class='del'>-		if (!priv-&gt;rx_traffic) {</div><div class='del'>-			priv-&gt;rx_traffic =</div><div class='del'>-				kzalloc(traffic_size, GFP_KERNEL);</div><div class='del'>-			if (!priv-&gt;rx_traffic)</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	iwl_reset_traffic_log(priv);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_free_traffic_mem(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	kfree(priv-&gt;tx_traffic);</div><div class='del'>-	priv-&gt;tx_traffic = NULL;</div><div class='del'>-</div><div class='del'>-	kfree(priv-&gt;rx_traffic);</div><div class='del'>-	priv-&gt;rx_traffic = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,</div><div class='del'>-		      u16 length, struct ieee80211_hdr *header)</div><div class='del'>-{</div><div class='del'>-	__le16 fc;</div><div class='del'>-	u16 len;</div><div class='del'>-</div><div class='del'>-	if (likely(!iwl_have_debug_level(IWL_DL_TX)))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (!priv-&gt;tx_traffic)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	fc = header-&gt;frame_control;</div><div class='del'>-	if (ieee80211_is_data(fc)) {</div><div class='del'>-		len = (length &gt; IWL_TRAFFIC_ENTRY_SIZE)</div><div class='del'>-		       ? IWL_TRAFFIC_ENTRY_SIZE : length;</div><div class='del'>-		memcpy((priv-&gt;tx_traffic +</div><div class='del'>-		       (priv-&gt;tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),</div><div class='del'>-		       header, len);</div><div class='del'>-		priv-&gt;tx_traffic_idx =</div><div class='del'>-			(priv-&gt;tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,</div><div class='del'>-		      u16 length, struct ieee80211_hdr *header)</div><div class='del'>-{</div><div class='del'>-	__le16 fc;</div><div class='del'>-	u16 len;</div><div class='del'>-</div><div class='del'>-	if (likely(!iwl_have_debug_level(IWL_DL_RX)))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (!priv-&gt;rx_traffic)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	fc = header-&gt;frame_control;</div><div class='del'>-	if (ieee80211_is_data(fc)) {</div><div class='del'>-		len = (length &gt; IWL_TRAFFIC_ENTRY_SIZE)</div><div class='del'>-		       ? IWL_TRAFFIC_ENTRY_SIZE : length;</div><div class='del'>-		memcpy((priv-&gt;rx_traffic +</div><div class='del'>-		       (priv-&gt;rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),</div><div class='del'>-		       header, len);</div><div class='del'>-		priv-&gt;rx_traffic_idx =</div><div class='del'>-			(priv-&gt;rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const char *get_mgmt_string(int cmd)</div><div class='del'>-{</div><div class='del'>-	switch (cmd) {</div><div class='del'>-		IWL_CMD(MANAGEMENT_ASSOC_REQ);</div><div class='del'>-		IWL_CMD(MANAGEMENT_ASSOC_RESP);</div><div class='del'>-		IWL_CMD(MANAGEMENT_REASSOC_REQ);</div><div class='del'>-		IWL_CMD(MANAGEMENT_REASSOC_RESP);</div><div class='del'>-		IWL_CMD(MANAGEMENT_PROBE_REQ);</div><div class='del'>-		IWL_CMD(MANAGEMENT_PROBE_RESP);</div><div class='del'>-		IWL_CMD(MANAGEMENT_BEACON);</div><div class='del'>-		IWL_CMD(MANAGEMENT_ATIM);</div><div class='del'>-		IWL_CMD(MANAGEMENT_DISASSOC);</div><div class='del'>-		IWL_CMD(MANAGEMENT_AUTH);</div><div class='del'>-		IWL_CMD(MANAGEMENT_DEAUTH);</div><div class='del'>-		IWL_CMD(MANAGEMENT_ACTION);</div><div class='del'>-	default:</div><div class='del'>-		return "UNKNOWN";</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const char *get_ctrl_string(int cmd)</div><div class='del'>-{</div><div class='del'>-	switch (cmd) {</div><div class='del'>-		IWL_CMD(CONTROL_BACK_REQ);</div><div class='del'>-		IWL_CMD(CONTROL_BACK);</div><div class='del'>-		IWL_CMD(CONTROL_PSPOLL);</div><div class='del'>-		IWL_CMD(CONTROL_RTS);</div><div class='del'>-		IWL_CMD(CONTROL_CTS);</div><div class='del'>-		IWL_CMD(CONTROL_ACK);</div><div class='del'>-		IWL_CMD(CONTROL_CFEND);</div><div class='del'>-		IWL_CMD(CONTROL_CFENDACK);</div><div class='del'>-	default:</div><div class='del'>-		return "UNKNOWN";</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_clear_traffic_stats(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	memset(&amp;priv-&gt;tx_stats, 0, sizeof(struct traffic_stats));</div><div class='del'>-	memset(&amp;priv-&gt;rx_stats, 0, sizeof(struct traffic_stats));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will</div><div class='del'>- * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.</div><div class='del'>- * Use debugFs to display the rx/rx_statistics</div><div class='del'>- * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL</div><div class='del'>- * information will be recorded, but DATA pkt still will be recorded</div><div class='del'>- * for the reason of iwl_led.c need to control the led blinking based on</div><div class='del'>- * number of tx and rx data.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)</div><div class='del'>-{</div><div class='del'>-	struct traffic_stats	*stats;</div><div class='del'>-</div><div class='del'>-	if (is_tx)</div><div class='del'>-		stats = &amp;priv-&gt;tx_stats;</div><div class='del'>-	else</div><div class='del'>-		stats = &amp;priv-&gt;rx_stats;</div><div class='del'>-</div><div class='del'>-	if (ieee80211_is_mgmt(fc)) {</div><div class='del'>-		switch (fc &amp; cpu_to_le16(IEEE80211_FCTL_STYPE)) {</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):</div><div class='del'>-			stats-&gt;mgmt[MANAGEMENT_ASSOC_REQ]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):</div><div class='del'>-			stats-&gt;mgmt[MANAGEMENT_ASSOC_RESP]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):</div><div class='del'>-			stats-&gt;mgmt[MANAGEMENT_REASSOC_REQ]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):</div><div class='del'>-			stats-&gt;mgmt[MANAGEMENT_REASSOC_RESP]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):</div><div class='del'>-			stats-&gt;mgmt[MANAGEMENT_PROBE_REQ]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):</div><div class='del'>-			stats-&gt;mgmt[MANAGEMENT_PROBE_RESP]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_BEACON):</div><div class='del'>-			stats-&gt;mgmt[MANAGEMENT_BEACON]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_ATIM):</div><div class='del'>-			stats-&gt;mgmt[MANAGEMENT_ATIM]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_DISASSOC):</div><div class='del'>-			stats-&gt;mgmt[MANAGEMENT_DISASSOC]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_AUTH):</div><div class='del'>-			stats-&gt;mgmt[MANAGEMENT_AUTH]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_DEAUTH):</div><div class='del'>-			stats-&gt;mgmt[MANAGEMENT_DEAUTH]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_ACTION):</div><div class='del'>-			stats-&gt;mgmt[MANAGEMENT_ACTION]++;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	} else if (ieee80211_is_ctl(fc)) {</div><div class='del'>-		switch (fc &amp; cpu_to_le16(IEEE80211_FCTL_STYPE)) {</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):</div><div class='del'>-			stats-&gt;ctrl[CONTROL_BACK_REQ]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_BACK):</div><div class='del'>-			stats-&gt;ctrl[CONTROL_BACK]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_PSPOLL):</div><div class='del'>-			stats-&gt;ctrl[CONTROL_PSPOLL]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_RTS):</div><div class='del'>-			stats-&gt;ctrl[CONTROL_RTS]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_CTS):</div><div class='del'>-			stats-&gt;ctrl[CONTROL_CTS]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_ACK):</div><div class='del'>-			stats-&gt;ctrl[CONTROL_ACK]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_CFEND):</div><div class='del'>-			stats-&gt;ctrl[CONTROL_CFEND]++;</div><div class='del'>-			break;</div><div class='del'>-		case cpu_to_le16(IEEE80211_STYPE_CFENDACK):</div><div class='del'>-			stats-&gt;ctrl[CONTROL_CFENDACK]++;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		/* data */</div><div class='del'>-		stats-&gt;data_cnt++;</div><div class='del'>-		stats-&gt;data_bytes += len;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void iwl_force_rf_reset(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	if (test_bit(STATUS_EXIT_PENDING, &amp;priv-&gt;status))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (!iwl_is_any_associated(priv)) {</div><div class='del'>-		IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 * There is no easy and better way to force reset the radio,</div><div class='del'>-	 * the only known method is switching channel which will force to</div><div class='del'>-	 * reset and tune the radio.</div><div class='del'>-	 * Use internal short scan (single channel) operation to should</div><div class='del'>-	 * achieve this objective.</div><div class='del'>-	 * Driver should reset the radio when number of consecutive missed</div><div class='del'>-	 * beacon, or any other uCode error condition detected.</div><div class='del'>-	 */</div><div class='del'>-	IWL_DEBUG_INFO(priv, "perform radio reset.\n");</div><div class='del'>-	iwl_internal_short_hw_scan(priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)</div><div class='del'>-{</div><div class='del'>-	struct iwl_force_reset *force_reset;</div><div class='del'>-</div><div class='del'>-	if (test_bit(STATUS_EXIT_PENDING, &amp;priv-&gt;status))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (mode &gt;= IWL_MAX_FORCE_RESET) {</div><div class='del'>-		IWL_DEBUG_INFO(priv, "invalid reset request.\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	force_reset = &amp;priv-&gt;force_reset[mode];</div><div class='del'>-	force_reset-&gt;reset_request_count++;</div><div class='del'>-	if (!external) {</div><div class='del'>-		if (force_reset-&gt;last_force_reset_jiffies &amp;&amp;</div><div class='del'>-		    time_after(force_reset-&gt;last_force_reset_jiffies +</div><div class='del'>-		    force_reset-&gt;reset_duration, jiffies)) {</div><div class='del'>-			IWL_DEBUG_INFO(priv, "force reset rejected\n");</div><div class='del'>-			force_reset-&gt;reset_reject_count++;</div><div class='del'>-			return -EAGAIN;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	force_reset-&gt;reset_success_count++;</div><div class='del'>-	force_reset-&gt;last_force_reset_jiffies = jiffies;</div><div class='del'>-	IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case IWL_RF_RESET:</div><div class='del'>-		iwl_force_rf_reset(priv);</div><div class='del'>-		break;</div><div class='del'>-	case IWL_FW_RESET:</div><div class='del'>-		/*</div><div class='del'>-		 * if the request is from external(ex: debugfs),</div><div class='del'>-		 * then always perform the request in regardless the module</div><div class='del'>-		 * parameter setting</div><div class='del'>-		 * if the request is from internal (uCode error or driver</div><div class='del'>-		 * detect failure), then fw_restart module parameter</div><div class='del'>-		 * need to be check before performing firmware reload</div><div class='del'>-		 */</div><div class='del'>-		if (!external &amp;&amp; !iwlagn_mod_params.restart_fw) {</div><div class='del'>-			IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "</div><div class='del'>-				       "module parameter setting\n");</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		IWL_ERR(priv, "On demand firmware reload\n");</div><div class='del'>-		iwlagn_fw_error(priv, true);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-int iwl_cmd_echo_test(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	struct iwl_host_cmd cmd = {</div><div class='del'>-		.id = REPLY_ECHO,</div><div class='del'>-		.len = { 0 },</div><div class='del'>-		.flags = CMD_SYNC,</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ret = iwl_dvm_send_cmd(priv, &amp;cmd);</div><div class='del'>-	if (ret)</div><div class='del'>-		IWL_ERR(priv, "echo testing fail: 0X%x\n", ret);</div><div class='del'>-	else</div><div class='del'>-		IWL_DEBUG_INFO(priv, "echo testing pass\n");</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int iwl_check_stuck_queue(struct iwl_priv *priv, int txq)</div><div class='del'>-{</div><div class='del'>-	if (iwl_trans_check_stuck_queue(trans(priv), txq)) {</div><div class='del'>-		int ret;</div><div class='del'>-		ret = iwl_force_reset(priv, IWL_FW_RESET, false);</div><div class='del'>-		return (ret == -EAGAIN) ? 0 : 1;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Making watchdog tick be a quarter of timeout assure we will</div><div class='del'>- * discover the queue hung between timeout and 1.25*timeout</div><div class='del'>- */</div><div class='del'>-#define IWL_WD_TICK(timeout) ((timeout) / 4)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Watchdog timer callback, we check each tx queue for stuck, if if hung</div><div class='del'>- * we reset the firmware. If everything is fine just rearm the timer.</div><div class='del'>- */</div><div class='del'>-void iwl_bg_watchdog(unsigned long data)</div><div class='del'>-{</div><div class='del'>-	struct iwl_priv *priv = (struct iwl_priv *)data;</div><div class='del'>-	int cnt;</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-</div><div class='del'>-	if (test_bit(STATUS_EXIT_PENDING, &amp;priv-&gt;status))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (iwl_is_rfkill(priv))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	timeout = hw_params(priv).wd_timeout;</div><div class='del'>-	if (timeout == 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* monitor and check for stuck queues */</div><div class='del'>-	for (cnt = 0; cnt &lt; cfg(priv)-&gt;base_params-&gt;num_of_queues; cnt++)</div><div class='del'>-		if (iwl_check_stuck_queue(priv, cnt))</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-	mod_timer(&amp;priv-&gt;watchdog, jiffies +</div><div class='del'>-		  msecs_to_jiffies(IWL_WD_TICK(timeout)));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_setup_watchdog(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	unsigned int timeout = hw_params(priv).wd_timeout;</div><div class='del'>-</div><div class='del'>-	if (!iwlagn_mod_params.wd_disable) {</div><div class='del'>-		/* use system default */</div><div class='del'>-		if (timeout &amp;&amp; !cfg(priv)-&gt;base_params-&gt;wd_disable)</div><div class='del'>-			mod_timer(&amp;priv-&gt;watchdog,</div><div class='del'>-				jiffies +</div><div class='del'>-				msecs_to_jiffies(IWL_WD_TICK(timeout)));</div><div class='del'>-		else</div><div class='del'>-			del_timer(&amp;priv-&gt;watchdog);</div><div class='del'>-	} else {</div><div class='del'>-		/* module parameter overwrite default configuration */</div><div class='del'>-		if (timeout &amp;&amp; iwlagn_mod_params.wd_disable == 2)</div><div class='del'>-			mod_timer(&amp;priv-&gt;watchdog,</div><div class='del'>-				jiffies +</div><div class='del'>-				msecs_to_jiffies(IWL_WD_TICK(timeout)));</div><div class='del'>-		else</div><div class='del'>-			del_timer(&amp;priv-&gt;watchdog);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * iwl_beacon_time_mask_low - mask of lower 32 bit of beacon time</div><div class='del'>- * @priv -- pointer to iwl_priv data structure</div><div class='del'>- * @tsf_bits -- number of bits need to shift for masking)</div><div class='del'>- */</div><div class='del'>-static inline u32 iwl_beacon_time_mask_low(struct iwl_priv *priv,</div><div class='del'>-					   u16 tsf_bits)</div><div class='del'>-{</div><div class='del'>-	return (1 &lt;&lt; tsf_bits) - 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * iwl_beacon_time_mask_high - mask of higher 32 bit of beacon time</div><div class='del'>- * @priv -- pointer to iwl_priv data structure</div><div class='del'>- * @tsf_bits -- number of bits need to shift for masking)</div><div class='del'>- */</div><div class='del'>-static inline u32 iwl_beacon_time_mask_high(struct iwl_priv *priv,</div><div class='del'>-					    u16 tsf_bits)</div><div class='del'>-{</div><div class='del'>-	return ((1 &lt;&lt; (32 - tsf_bits)) - 1) &lt;&lt; tsf_bits;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * extended beacon time format</div><div class='del'>- * time in usec will be changed into a 32-bit value in extended:internal format</div><div class='del'>- * the extended part is the beacon counts</div><div class='del'>- * the internal part is the time in usec within one beacon interval</div><div class='del'>- */</div><div class='del'>-u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)</div><div class='del'>-{</div><div class='del'>-	u32 quot;</div><div class='del'>-	u32 rem;</div><div class='del'>-	u32 interval = beacon_interval * TIME_UNIT;</div><div class='del'>-</div><div class='del'>-	if (!interval || !usec)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	quot = (usec / interval) &amp;</div><div class='del'>-		(iwl_beacon_time_mask_high(priv, IWLAGN_EXT_BEACON_TIME_POS) &gt;&gt;</div><div class='del'>-		IWLAGN_EXT_BEACON_TIME_POS);</div><div class='del'>-	rem = (usec % interval) &amp; iwl_beacon_time_mask_low(priv,</div><div class='del'>-				   IWLAGN_EXT_BEACON_TIME_POS);</div><div class='del'>-</div><div class='del'>-	return (quot &lt;&lt; IWLAGN_EXT_BEACON_TIME_POS) + rem;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* base is usually what we get from ucode with each received frame,</div><div class='del'>- * the same as HW timer counter counting down</div><div class='del'>- */</div><div class='del'>-__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,</div><div class='del'>-			   u32 addon, u32 beacon_interval)</div><div class='del'>-{</div><div class='del'>-	u32 base_low = base &amp; iwl_beacon_time_mask_low(priv,</div><div class='del'>-				IWLAGN_EXT_BEACON_TIME_POS);</div><div class='del'>-	u32 addon_low = addon &amp; iwl_beacon_time_mask_low(priv,</div><div class='del'>-				IWLAGN_EXT_BEACON_TIME_POS);</div><div class='del'>-	u32 interval = beacon_interval * TIME_UNIT;</div><div class='del'>-	u32 res = (base &amp; iwl_beacon_time_mask_high(priv,</div><div class='del'>-				IWLAGN_EXT_BEACON_TIME_POS)) +</div><div class='del'>-				(addon &amp; iwl_beacon_time_mask_high(priv,</div><div class='del'>-				IWLAGN_EXT_BEACON_TIME_POS));</div><div class='del'>-</div><div class='del'>-	if (base_low &gt; addon_low)</div><div class='del'>-		res += base_low - addon_low;</div><div class='del'>-	else if (base_low &lt; addon_low) {</div><div class='del'>-		res += interval + base_low - addon_low;</div><div class='del'>-		res += (1 &lt;&lt; IWLAGN_EXT_BEACON_TIME_POS);</div><div class='del'>-	} else</div><div class='del'>-		res += (1 &lt;&lt; IWLAGN_EXT_BEACON_TIME_POS);</div><div class='del'>-</div><div class='del'>-	return cpu_to_le32(res);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_nic_error(struct iwl_op_mode *op_mode)</div><div class='del'>-{</div><div class='del'>-	struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);</div><div class='del'>-</div><div class='del'>-	iwlagn_fw_error(priv, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state)</div><div class='del'>-{</div><div class='del'>-	struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);</div><div class='del'>-</div><div class='del'>-	if (state)</div><div class='del'>-		set_bit(STATUS_RF_KILL_HW, &amp;priv-&gt;status);</div><div class='del'>-	else</div><div class='del'>-		clear_bit(STATUS_RF_KILL_HW, &amp;priv-&gt;status);</div><div class='del'>-</div><div class='del'>-	wiphy_rfkill_set_hw_state(priv-&gt;hw-&gt;wiphy, state);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void iwl_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb)</div><div class='del'>-{</div><div class='del'>-	struct ieee80211_tx_info *info;</div><div class='del'>-</div><div class='del'>-	info = IEEE80211_SKB_CB(skb);</div><div class='del'>-	kmem_cache_free(iwl_tx_cmd_pool, (info-&gt;driver_data[1]));</div><div class='del'>-	dev_kfree_skb_any(skb);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h<br/>deleted file mode 100644<br/>index 635eb685edeb..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-core.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-core.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,234 +0,0 @@</div><div class='del'>-/******************************************************************************</div><div class='del'>- *</div><div class='del'>- * This file is provided under a dual BSD/GPLv2 license.  When using or</div><div class='del'>- * redistributing this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * GPL LICENSE SUMMARY</div><div class='del'>- *</div><div class='del'>- * Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of version 2 of the GNU General Public License as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,</div><div class='del'>- * USA</div><div class='del'>- *</div><div class='del'>- * The full GNU General Public License is included in this distribution</div><div class='del'>- * in the file called LICENSE.GPL.</div><div class='del'>- *</div><div class='del'>- * Contact Information:</div><div class='del'>- *  Intel Linux Wireless &lt;ilw@linux.intel.com&gt;</div><div class='del'>- * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497</div><div class='del'>- *</div><div class='del'>- * BSD LICENSE</div><div class='del'>- *</div><div class='del'>- * Copyright(c) 2005 - 2012 Intel Corporation. All rights reserved.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions</div><div class='del'>- * are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *  * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer in</div><div class='del'>- *    the documentation and/or other materials provided with the</div><div class='del'>- *    distribution.</div><div class='del'>- *  * Neither the name Intel Corporation nor the names of its</div><div class='del'>- *    contributors may be used to endorse or promote products derived</div><div class='del'>- *    from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS</div><div class='del'>- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT</div><div class='del'>- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR</div><div class='del'>- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT</div><div class='del'>- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,</div><div class='del'>- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT</div><div class='del'>- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,</div><div class='del'>- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY</div><div class='del'>- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE</div><div class='del'>- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *****************************************************************************/</div><div class='del'>-</div><div class='del'>-#ifndef __iwl_core_h__</div><div class='del'>-#define __iwl_core_h__</div><div class='del'>-</div><div class='del'>-#include "iwl-dev.h"</div><div class='del'>-#include "iwl-io.h"</div><div class='del'>-</div><div class='del'>-/************************</div><div class='del'>- * forward declarations *</div><div class='del'>- ************************/</div><div class='del'>-struct iwl_host_cmd;</div><div class='del'>-struct iwl_cmd;</div><div class='del'>-</div><div class='del'>-#define TIME_UNIT		1024</div><div class='del'>-</div><div class='del'>-struct iwl_lib_ops {</div><div class='del'>-	/* set hw dependent parameters */</div><div class='del'>-	void (*set_hw_params)(struct iwl_priv *priv);</div><div class='del'>-	int (*set_channel_switch)(struct iwl_priv *priv,</div><div class='del'>-				  struct ieee80211_channel_switch *ch_switch);</div><div class='del'>-	/* device specific configuration */</div><div class='del'>-	void (*nic_config)(struct iwl_priv *priv);</div><div class='del'>-</div><div class='del'>-	/* eeprom operations (as defined in iwl-eeprom.h) */</div><div class='del'>-	struct iwl_eeprom_ops eeprom_ops;</div><div class='del'>-</div><div class='del'>-	/* temperature */</div><div class='del'>-	void (*temperature)(struct iwl_priv *priv);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/***************************</div><div class='del'>- *   L i b                 *</div><div class='del'>- ***************************/</div><div class='del'>-</div><div class='del'>-void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,</div><div class='del'>-			   int hw_decrypt);</div><div class='del'>-int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx);</div><div class='del'>-int iwl_full_rxon_required(struct iwl_priv *priv, struct iwl_rxon_context *ctx);</div><div class='del'>-void iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,</div><div class='del'>-			 struct iwl_rxon_context *ctx);</div><div class='del'>-void iwl_set_flags_for_band(struct iwl_priv *priv,</div><div class='del'>-			    struct iwl_rxon_context *ctx,</div><div class='del'>-			    enum ieee80211_band band,</div><div class='del'>-			    struct ieee80211_vif *vif);</div><div class='del'>-u8 iwl_get_single_channel_number(struct iwl_priv *priv,</div><div class='del'>-				  enum ieee80211_band band);</div><div class='del'>-void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf);</div><div class='del'>-bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,</div><div class='del'>-			    struct iwl_rxon_context *ctx,</div><div class='del'>-			    struct ieee80211_sta_ht_cap *ht_cap);</div><div class='del'>-void iwl_connection_init_rx_config(struct iwl_priv *priv,</div><div class='del'>-				   struct iwl_rxon_context *ctx);</div><div class='del'>-void iwl_set_rate(struct iwl_priv *priv);</div><div class='del'>-int iwl_cmd_echo_test(struct iwl_priv *priv);</div><div class='del'>-#ifdef CONFIG_IWLWIFI_DEBUGFS</div><div class='del'>-int iwl_alloc_traffic_mem(struct iwl_priv *priv);</div><div class='del'>-void iwl_free_traffic_mem(struct iwl_priv *priv);</div><div class='del'>-void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,</div><div class='del'>-				u16 length, struct ieee80211_hdr *header);</div><div class='del'>-void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,</div><div class='del'>-				u16 length, struct ieee80211_hdr *header);</div><div class='del'>-const char *get_mgmt_string(int cmd);</div><div class='del'>-const char *get_ctrl_string(int cmd);</div><div class='del'>-void iwl_clear_traffic_stats(struct iwl_priv *priv);</div><div class='del'>-void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc,</div><div class='del'>-		      u16 len);</div><div class='del'>-void iwl_reset_traffic_log(struct iwl_priv *priv);</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-static inline int iwl_alloc_traffic_mem(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-static inline void iwl_free_traffic_mem(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-static inline void iwl_reset_traffic_log(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-static inline void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,</div><div class='del'>-		      u16 length, struct ieee80211_hdr *header)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-static inline void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,</div><div class='del'>-		      u16 length, struct ieee80211_hdr *header)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-static inline void iwl_update_stats(struct iwl_priv *priv, bool is_tx,</div><div class='del'>-				    __le16 fc, u16 len)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*****************************************************</div><div class='del'>-* RX</div><div class='del'>-******************************************************/</div><div class='del'>-void iwl_chswitch_done(struct iwl_priv *priv, bool is_success);</div><div class='del'>-</div><div class='del'>-void iwl_setup_watchdog(struct iwl_priv *priv);</div><div class='del'>-/*****************************************************</div><div class='del'>- * TX power</div><div class='del'>- ****************************************************/</div><div class='del'>-int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force);</div><div class='del'>-</div><div class='del'>-/*******************************************************************************</div><div class='del'>- * Scanning</div><div class='del'>- ******************************************************************************/</div><div class='del'>-void iwl_init_scan_params(struct iwl_priv *priv);</div><div class='del'>-int iwl_scan_cancel(struct iwl_priv *priv);</div><div class='del'>-void iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms);</div><div class='del'>-void iwl_force_scan_end(struct iwl_priv *priv);</div><div class='del'>-void iwl_internal_short_hw_scan(struct iwl_priv *priv);</div><div class='del'>-int iwl_force_reset(struct iwl_priv *priv, int mode, bool external);</div><div class='del'>-void iwl_setup_rx_scan_handlers(struct iwl_priv *priv);</div><div class='del'>-void iwl_setup_scan_deferred_work(struct iwl_priv *priv);</div><div class='del'>-void iwl_cancel_scan_deferred_work(struct iwl_priv *priv);</div><div class='del'>-int __must_check iwl_scan_initiate(struct iwl_priv *priv,</div><div class='del'>-				   struct ieee80211_vif *vif,</div><div class='del'>-				   enum iwl_scan_type scan_type,</div><div class='del'>-				   enum ieee80211_band band);</div><div class='del'>-</div><div class='del'>-/* For faster active scanning, scan will move to the next channel if fewer than</div><div class='del'>- * PLCP_QUIET_THRESH packets are heard on this channel within</div><div class='del'>- * ACTIVE_QUIET_TIME after sending probe request.  This shortens the dwell</div><div class='del'>- * time if it's a quiet channel (nothing responded to our probe, and there's</div><div class='del'>- * no other traffic).</div><div class='del'>- * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */</div><div class='del'>-#define IWL_ACTIVE_QUIET_TIME       cpu_to_le16(10)  /* msec */</div><div class='del'>-#define IWL_PLCP_QUIET_THRESH       cpu_to_le16(1)  /* packets */</div><div class='del'>-</div><div class='del'>-#define IWL_SCAN_CHECK_WATCHDOG		(HZ * 7)</div><div class='del'>-</div><div class='del'>-/* traffic log definitions */</div><div class='del'>-#define IWL_TRAFFIC_ENTRIES	(256)</div><div class='del'>-#define IWL_TRAFFIC_ENTRY_SIZE  (64)</div><div class='del'>-</div><div class='del'>-/*****************************************************</div><div class='del'>- *   S e n d i n g     H o s t     C o m m a n d s   *</div><div class='del'>- *****************************************************/</div><div class='del'>-</div><div class='del'>-void iwl_bg_watchdog(unsigned long data);</div><div class='del'>-u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval);</div><div class='del'>-__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,</div><div class='del'>-			   u32 addon, u32 beacon_interval);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*****************************************************</div><div class='del'>-*  GEOS</div><div class='del'>-******************************************************/</div><div class='del'>-int iwl_init_geos(struct iwl_priv *priv);</div><div class='del'>-void iwl_free_geos(struct iwl_priv *priv);</div><div class='del'>-</div><div class='del'>-extern void iwl_send_bt_config(struct iwl_priv *priv);</div><div class='del'>-extern int iwl_send_statistics_request(struct iwl_priv *priv,</div><div class='del'>-				       u8 flags, bool clear);</div><div class='del'>-</div><div class='del'>-int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx);</div><div class='del'>-</div><div class='del'>-static inline const struct ieee80211_supported_band *iwl_get_hw_mode(</div><div class='del'>-			struct iwl_priv *priv, enum ieee80211_band band)</div><div class='del'>-{</div><div class='del'>-	return priv-&gt;hw-&gt;wiphy-&gt;bands[band];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool iwl_advanced_bt_coexist(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-	return cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-	       cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-extern bool bt_siso_mode;</div><div class='del'>-</div><div class='del'>-#endif /* __iwl_core_h__ */</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h<br/>index 5f96ce105f08..59750543fce7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-csr.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-csr.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-csr.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-csr.h</a></div><div class='hunk'>@@ -430,6 +430,9 @@</div><div class='ctx'> #define HBUS_TARG_PRPH_WDAT     (HBUS_BASE+0x04c)</div><div class='ctx'> #define HBUS_TARG_PRPH_RDAT     (HBUS_BASE+0x050)</div><div class='ctx'> </div><div class='add'>+/* Used to enable DBGM */</div><div class='add'>+#define HBUS_TARG_TEST_REG	(HBUS_BASE+0x05c)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Per-Tx-queue write pointer (index, really!)</div><div class='ctx'>  * Indicates index to next TFD that driver will fill (1 past latest filled).</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-debug.c b/drivers/net/wireless/iwlwifi/iwl-debug.c<br/>index 059efabda184..2d1b42847b9b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-debug.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-debug.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-debug.c</a></div><div class='hunk'>@@ -63,6 +63,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include "iwl-debug.h"</div><div class='add'>+#include "iwl-devtrace.h"</div><div class='ctx'> </div><div class='ctx'> #define __iwl_fn(fn)						\</div><div class='ctx'> void __iwl_ ##fn(struct device *dev, const char *fmt, ...)	\</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-debug.h b/drivers/net/wireless/iwlwifi/iwl-debug.h<br/>index a6b32a11e103..8376b842bdba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-debug.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-debug.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-debug.h</a></div><div class='hunk'>@@ -29,10 +29,13 @@</div><div class='ctx'> #ifndef __iwl_debug_h__</div><div class='ctx'> #define __iwl_debug_h__</div><div class='ctx'> </div><div class='del'>-#include "iwl-shared.h"</div><div class='del'>-#include "iwl-devtrace.h"</div><div class='add'>+#include "iwl-modparams.h"</div><div class='ctx'> </div><div class='del'>-struct iwl_priv;</div><div class='add'>+</div><div class='add'>+static inline bool iwl_have_debug_level(u32 level)</div><div class='add'>+{</div><div class='add'>+	return iwlwifi_mod_params.debug_level &amp; level;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> void __iwl_err(struct device *dev, bool rfkill_prefix, bool only_trace,</div><div class='ctx'> 		const char *fmt, ...);</div><div class='hunk'>@@ -41,10 +44,10 @@ void __iwl_info(struct device *dev, const char *fmt, ...);</div><div class='ctx'> void __iwl_crit(struct device *dev, const char *fmt, ...);</div><div class='ctx'> </div><div class='ctx'> /* No matter what is m (priv, bus, trans), this will work */</div><div class='del'>-#define IWL_ERR(m, f, a...) __iwl_err(trans(m)-&gt;dev, false, false, f, ## a)</div><div class='del'>-#define IWL_WARN(m, f, a...) __iwl_warn(trans(m)-&gt;dev, f, ## a)</div><div class='del'>-#define IWL_INFO(m, f, a...) __iwl_info(trans(m)-&gt;dev, f, ## a)</div><div class='del'>-#define IWL_CRIT(m, f, a...) __iwl_crit(trans(m)-&gt;dev, f, ## a)</div><div class='add'>+#define IWL_ERR(m, f, a...) __iwl_err((m)-&gt;dev, false, false, f, ## a)</div><div class='add'>+#define IWL_WARN(m, f, a...) __iwl_warn((m)-&gt;dev, f, ## a)</div><div class='add'>+#define IWL_INFO(m, f, a...) __iwl_info((m)-&gt;dev, f, ## a)</div><div class='add'>+#define IWL_CRIT(m, f, a...) __iwl_crit((m)-&gt;dev, f, ## a)</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_IWLWIFI_DEBUG) || defined(CONFIG_IWLWIFI_DEVICE_TRACING)</div><div class='ctx'> void __iwl_dbg(struct device *dev,</div><div class='hunk'>@@ -65,9 +68,9 @@ do {									\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='ctx'> #define IWL_DEBUG(m, level, fmt, args...)				\</div><div class='del'>-	__iwl_dbg(trans(m)-&gt;dev, level, false, __func__, fmt, ##args)</div><div class='add'>+	__iwl_dbg((m)-&gt;dev, level, false, __func__, fmt, ##args)</div><div class='ctx'> #define IWL_DEBUG_LIMIT(m, level, fmt, args...)				\</div><div class='del'>-	__iwl_dbg(trans(m)-&gt;dev, level, true, __func__, fmt, ##args)</div><div class='add'>+	__iwl_dbg((m)-&gt;dev, level, true, __func__, fmt, ##args)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_IWLWIFI_DEBUG</div><div class='ctx'> #define iwl_print_hex_dump(m, level, p, len)				\</div><div class='hunk'>@@ -80,19 +83,6 @@ do {                                            			\</div><div class='ctx'> #define iwl_print_hex_dump(m, level, p, len)</div><div class='ctx'> #endif				/* CONFIG_IWLWIFI_DEBUG */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_IWLWIFI_DEBUGFS</div><div class='del'>-int iwl_dbgfs_register(struct iwl_priv *priv, const char *name);</div><div class='del'>-void iwl_dbgfs_unregister(struct iwl_priv *priv);</div><div class='del'>-#else</div><div class='del'>-static inline int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-static inline void iwl_dbgfs_unregister(struct iwl_priv *priv)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-#endif				/* CONFIG_IWLWIFI_DEBUGFS */</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * To use the debug system:</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c<br/>index 2bbaebd99ad4..e7c157e5ebeb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-debugfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-debugfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-debugfs.c</a></div><div class='hunk'>@@ -37,9 +37,9 @@</div><div class='ctx'> </div><div class='ctx'> #include "iwl-dev.h"</div><div class='ctx'> #include "iwl-debug.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='add'>+#include "iwl-modparams.h"</div><div class='ctx'> </div><div class='ctx'> /* create and remove of files */</div><div class='ctx'> #define DEBUGFS_ADD_FILE(name, parent, mode) do {			\</div><div class='hunk'>@@ -111,105 +111,6 @@ static const struct file_operations iwl_dbgfs_##name##_ops = {          \</div><div class='ctx'> 	.llseek = generic_file_llseek,					\</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static ssize_t iwl_dbgfs_tx_statistics_read(struct file *file,</div><div class='del'>-						char __user *user_buf,</div><div class='del'>-						size_t count, loff_t *ppos) {</div><div class='del'>-</div><div class='del'>-	struct iwl_priv *priv = file-&gt;private_data;</div><div class='del'>-	char *buf;</div><div class='del'>-	int pos = 0;</div><div class='del'>-</div><div class='del'>-	int cnt;</div><div class='del'>-	ssize_t ret;</div><div class='del'>-	const size_t bufsz = 100 +</div><div class='del'>-		sizeof(char) * 50 * (MANAGEMENT_MAX + CONTROL_MAX);</div><div class='del'>-	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	pos += scnprintf(buf + pos, bufsz - pos, "Management:\n");</div><div class='del'>-	for (cnt = 0; cnt &lt; MANAGEMENT_MAX; cnt++) {</div><div class='del'>-		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				 "\t%25s\t\t: %u\n",</div><div class='del'>-				 get_mgmt_string(cnt),</div><div class='del'>-				 priv-&gt;tx_stats.mgmt[cnt]);</div><div class='del'>-	}</div><div class='del'>-	pos += scnprintf(buf + pos, bufsz - pos, "Control\n");</div><div class='del'>-	for (cnt = 0; cnt &lt; CONTROL_MAX; cnt++) {</div><div class='del'>-		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				 "\t%25s\t\t: %u\n",</div><div class='del'>-				 get_ctrl_string(cnt),</div><div class='del'>-				 priv-&gt;tx_stats.ctrl[cnt]);</div><div class='del'>-	}</div><div class='del'>-	pos += scnprintf(buf + pos, bufsz - pos, "Data:\n");</div><div class='del'>-	pos += scnprintf(buf + pos, bufsz - pos, "\tcnt: %u\n",</div><div class='del'>-			 priv-&gt;tx_stats.data_cnt);</div><div class='del'>-	pos += scnprintf(buf + pos, bufsz - pos, "\tbytes: %llu\n",</div><div class='del'>-			 priv-&gt;tx_stats.data_bytes);</div><div class='del'>-	ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);</div><div class='del'>-	kfree(buf);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t iwl_dbgfs_clear_traffic_statistics_write(struct file *file,</div><div class='del'>-					const char __user *user_buf,</div><div class='del'>-					size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct iwl_priv *priv = file-&gt;private_data;</div><div class='del'>-	u32 clear_flag;</div><div class='del'>-	char buf[8];</div><div class='del'>-	int buf_size;</div><div class='del'>-</div><div class='del'>-	memset(buf, 0, sizeof(buf));</div><div class='del'>-	buf_size = min(count, sizeof(buf) -  1);</div><div class='del'>-	if (copy_from_user(buf, user_buf, buf_size))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	if (sscanf(buf, "%x", &amp;clear_flag) != 1)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	iwl_clear_traffic_stats(priv);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t iwl_dbgfs_rx_statistics_read(struct file *file,</div><div class='del'>-						char __user *user_buf,</div><div class='del'>-						size_t count, loff_t *ppos) {</div><div class='del'>-</div><div class='del'>-	struct iwl_priv *priv = file-&gt;private_data;</div><div class='del'>-	char *buf;</div><div class='del'>-	int pos = 0;</div><div class='del'>-	int cnt;</div><div class='del'>-	ssize_t ret;</div><div class='del'>-	const size_t bufsz = 100 +</div><div class='del'>-		sizeof(char) * 50 * (MANAGEMENT_MAX + CONTROL_MAX);</div><div class='del'>-	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	pos += scnprintf(buf + pos, bufsz - pos, "Management:\n");</div><div class='del'>-	for (cnt = 0; cnt &lt; MANAGEMENT_MAX; cnt++) {</div><div class='del'>-		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				 "\t%25s\t\t: %u\n",</div><div class='del'>-				 get_mgmt_string(cnt),</div><div class='del'>-				 priv-&gt;rx_stats.mgmt[cnt]);</div><div class='del'>-	}</div><div class='del'>-	pos += scnprintf(buf + pos, bufsz - pos, "Control:\n");</div><div class='del'>-	for (cnt = 0; cnt &lt; CONTROL_MAX; cnt++) {</div><div class='del'>-		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				 "\t%25s\t\t: %u\n",</div><div class='del'>-				 get_ctrl_string(cnt),</div><div class='del'>-				 priv-&gt;rx_stats.ctrl[cnt]);</div><div class='del'>-	}</div><div class='del'>-	pos += scnprintf(buf + pos, bufsz - pos, "Data:\n");</div><div class='del'>-	pos += scnprintf(buf + pos, bufsz - pos, "\tcnt: %u\n",</div><div class='del'>-			 priv-&gt;rx_stats.data_cnt);</div><div class='del'>-	pos += scnprintf(buf + pos, bufsz - pos, "\tbytes: %llu\n",</div><div class='del'>-			 priv-&gt;rx_stats.data_bytes);</div><div class='del'>-</div><div class='del'>-	ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);</div><div class='del'>-	kfree(buf);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static ssize_t iwl_dbgfs_sram_read(struct file *file,</div><div class='ctx'> 					char __user *user_buf,</div><div class='ctx'> 					size_t count, loff_t *ppos)</div><div class='hunk'>@@ -230,11 +131,9 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,</div><div class='ctx'> 	/* default is to dump the entire data segment */</div><div class='ctx'> 	if (!priv-&gt;dbgfs_sram_offset &amp;&amp; !priv-&gt;dbgfs_sram_len) {</div><div class='ctx'> 		priv-&gt;dbgfs_sram_offset = 0x800000;</div><div class='del'>-		if (!priv-&gt;ucode_loaded) {</div><div class='del'>-			IWL_ERR(priv, "No uCode has been loadded.\n");</div><div class='add'>+		if (!priv-&gt;ucode_loaded)</div><div class='ctx'> 			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-		img = &amp;priv-&gt;fw-&gt;img[priv-&gt;shrd-&gt;ucode_type];</div><div class='add'>+		img = &amp;priv-&gt;fw-&gt;img[priv-&gt;cur_ucode];</div><div class='ctx'> 		priv-&gt;dbgfs_sram_len = img-&gt;sec[IWL_UCODE_SECTION_DATA].len;</div><div class='ctx'> 	}</div><div class='ctx'> 	len = priv-&gt;dbgfs_sram_len;</div><div class='hunk'>@@ -259,7 +158,7 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,</div><div class='ctx'> 	sram = priv-&gt;dbgfs_sram_offset &amp; ~0x3;</div><div class='ctx'> </div><div class='ctx'> 	/* read the first u32 from sram */</div><div class='del'>-	val = iwl_read_targ_mem(trans(priv), sram);</div><div class='add'>+	val = iwl_read_targ_mem(priv-&gt;trans, sram);</div><div class='ctx'> </div><div class='ctx'> 	for (; len; len--) {</div><div class='ctx'> 		/* put the address at the start of every line */</div><div class='hunk'>@@ -278,7 +177,7 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,</div><div class='ctx'> 		if (++offset == 4) {</div><div class='ctx'> 			sram += 4;</div><div class='ctx'> 			offset = 0;</div><div class='del'>-			val = iwl_read_targ_mem(trans(priv), sram);</div><div class='add'>+			val = iwl_read_targ_mem(priv-&gt;trans, sram);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* put in extra spaces and split lines for human readability */</div><div class='hunk'>@@ -369,14 +268,19 @@ static ssize_t iwl_dbgfs_stations_read(struct file *file, char __user *user_buf,</div><div class='ctx'> 				 i, station-&gt;sta.sta.addr,</div><div class='ctx'> 				 station-&gt;sta.station_flags_msk);</div><div class='ctx'> 		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				"TID\tseq_num\trate_n_flags\n");</div><div class='add'>+				"TID seqno  next_rclmd "</div><div class='add'>+				"rate_n_flags state txq\n");</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; IWL_MAX_TID_COUNT; j++) {</div><div class='ctx'> 			tid_data = &amp;priv-&gt;tid_data[i][j];</div><div class='ctx'> 			pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				"%d:\t%#x\t%#x",</div><div class='add'>+				"%d:  0x%.4x 0x%.4x     0x%.8x   "</div><div class='add'>+				"%d     %.2d",</div><div class='ctx'> 				j, tid_data-&gt;seq_number,</div><div class='del'>-				tid_data-&gt;agg.rate_n_flags);</div><div class='add'>+				tid_data-&gt;next_reclaimed,</div><div class='add'>+				tid_data-&gt;agg.rate_n_flags,</div><div class='add'>+				tid_data-&gt;agg.state,</div><div class='add'>+				tid_data-&gt;agg.txq_id);</div><div class='ctx'> </div><div class='ctx'> 			if (tid_data-&gt;agg.wait_for_ba)</div><div class='ctx'> 				pos += scnprintf(buf + pos, bufsz - pos,</div><div class='hunk'>@@ -403,30 +307,25 @@ static ssize_t iwl_dbgfs_nvm_read(struct file *file,</div><div class='ctx'> 	const u8 *ptr;</div><div class='ctx'> 	char *buf;</div><div class='ctx'> 	u16 eeprom_ver;</div><div class='del'>-	size_t eeprom_len = cfg(priv)-&gt;base_params-&gt;eeprom_size;</div><div class='add'>+	size_t eeprom_len = priv-&gt;cfg-&gt;base_params-&gt;eeprom_size;</div><div class='ctx'> 	buf_size = 4 * eeprom_len + 256;</div><div class='ctx'> </div><div class='del'>-	if (eeprom_len % 16) {</div><div class='del'>-		IWL_ERR(priv, "NVM size is not multiple of 16.\n");</div><div class='add'>+	if (eeprom_len % 16)</div><div class='ctx'> 		return -ENODATA;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	ptr = priv-&gt;shrd-&gt;eeprom;</div><div class='del'>-	if (!ptr) {</div><div class='del'>-		IWL_ERR(priv, "Invalid EEPROM/OTP memory\n");</div><div class='add'>+	ptr = priv-&gt;eeprom;</div><div class='add'>+	if (!ptr)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* 4 characters for byte 0xYY */</div><div class='ctx'> 	buf = kzalloc(buf_size, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		IWL_ERR(priv, "Can not allocate Buffer\n");</div><div class='add'>+	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	eeprom_ver = iwl_eeprom_query16(priv-&gt;shrd, EEPROM_VERSION);</div><div class='add'>+</div><div class='add'>+	eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);</div><div class='ctx'> 	pos += scnprintf(buf + pos, buf_size - pos, "NVM Type: %s, "</div><div class='ctx'> 			"version: 0x%x\n",</div><div class='del'>-			(trans(priv)-&gt;nvm_device_type == NVM_DEVICE_TYPE_OTP)</div><div class='add'>+			(priv-&gt;nvm_device_type == NVM_DEVICE_TYPE_OTP)</div><div class='ctx'> 			 ? "OTP" : "EEPROM", eeprom_ver);</div><div class='ctx'> 	for (ofs = 0 ; ofs &lt; eeprom_len ; ofs += 16) {</div><div class='ctx'> 		pos += scnprintf(buf + pos, buf_size - pos, "0x%.4x ", ofs);</div><div class='hunk'>@@ -456,10 +355,8 @@ static ssize_t iwl_dbgfs_channels_read(struct file *file, char __user *user_buf,</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> </div><div class='ctx'> 	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		IWL_ERR(priv, "Can not allocate Buffer\n");</div><div class='add'>+	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_2GHZ);</div><div class='ctx'> 	if (supp_band) {</div><div class='hunk'>@@ -521,8 +418,6 @@ static ssize_t iwl_dbgfs_status_read(struct file *file,</div><div class='ctx'> 	int pos = 0;</div><div class='ctx'> 	const size_t bufsz = sizeof(buf);</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, bufsz - pos, "STATUS_HCMD_ACTIVE:\t %d\n",</div><div class='del'>-		test_bit(STATUS_HCMD_ACTIVE, &amp;priv-&gt;shrd-&gt;status));</div><div class='ctx'> 	pos += scnprintf(buf + pos, bufsz - pos, "STATUS_RF_KILL_HW:\t %d\n",</div><div class='ctx'> 		test_bit(STATUS_RF_KILL_HW, &amp;priv-&gt;status));</div><div class='ctx'> 	pos += scnprintf(buf + pos, bufsz - pos, "STATUS_CT_KILL:\t\t %d\n",</div><div class='hunk'>@@ -544,9 +439,9 @@ static ssize_t iwl_dbgfs_status_read(struct file *file,</div><div class='ctx'> 	pos += scnprintf(buf + pos, bufsz - pos, "STATUS_SCAN_HW:\t\t %d\n",</div><div class='ctx'> 		test_bit(STATUS_SCAN_HW, &amp;priv-&gt;status));</div><div class='ctx'> 	pos += scnprintf(buf + pos, bufsz - pos, "STATUS_POWER_PMI:\t %d\n",</div><div class='del'>-		test_bit(STATUS_POWER_PMI, &amp;priv-&gt;shrd-&gt;status));</div><div class='add'>+		test_bit(STATUS_POWER_PMI, &amp;priv-&gt;status));</div><div class='ctx'> 	pos += scnprintf(buf + pos, bufsz - pos, "STATUS_FW_ERROR:\t %d\n",</div><div class='del'>-		test_bit(STATUS_FW_ERROR, &amp;priv-&gt;shrd-&gt;status));</div><div class='add'>+		test_bit(STATUS_FW_ERROR, &amp;priv-&gt;status));</div><div class='ctx'> 	return simple_read_from_buffer(user_buf, count, ppos, buf, pos);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -563,16 +458,14 @@ static ssize_t iwl_dbgfs_rx_handlers_read(struct file *file,</div><div class='ctx'> 	ssize_t ret;</div><div class='ctx'> </div><div class='ctx'> 	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		IWL_ERR(priv, "Can not allocate Buffer\n");</div><div class='add'>+	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	for (cnt = 0; cnt &lt; REPLY_MAX; cnt++) {</div><div class='ctx'> 		if (priv-&gt;rx_handlers_stats[cnt] &gt; 0)</div><div class='ctx'> 			pos += scnprintf(buf + pos, bufsz - pos,</div><div class='ctx'> 				"\tRx handler[%36s]:\t\t %u\n",</div><div class='del'>-				get_cmd_string(cnt),</div><div class='add'>+				iwl_dvm_get_cmd_string(cnt),</div><div class='ctx'> 				priv-&gt;rx_handlers_stats[cnt]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -680,11 +573,8 @@ static ssize_t iwl_dbgfs_disable_ht40_write(struct file *file,</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	if (!iwl_is_any_associated(priv))</div><div class='ctx'> 		priv-&gt;disable_ht40 = ht40 ? true : false;</div><div class='del'>-	else {</div><div class='del'>-		IWL_ERR(priv, "Sta associated with AP - "</div><div class='del'>-			"Change to 40MHz channel support is not allowed\n");</div><div class='add'>+	else</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='hunk'>@@ -816,87 +706,6 @@ DEBUGFS_READ_FILE_OPS(temperature);</div><div class='ctx'> DEBUGFS_READ_WRITE_FILE_OPS(sleep_level_override);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(current_sleep_command);</div><div class='ctx'> </div><div class='del'>-static ssize_t iwl_dbgfs_traffic_log_read(struct file *file,</div><div class='del'>-					 char __user *user_buf,</div><div class='del'>-					 size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct iwl_priv *priv = file-&gt;private_data;</div><div class='del'>-	int pos = 0, ofs = 0;</div><div class='del'>-	int cnt = 0, entry;</div><div class='del'>-</div><div class='del'>-	char *buf;</div><div class='del'>-	int bufsz = ((IWL_TRAFFIC_ENTRIES * IWL_TRAFFIC_ENTRY_SIZE * 64) * 2) +</div><div class='del'>-		(cfg(priv)-&gt;base_params-&gt;num_of_queues * 32 * 8) + 400;</div><div class='del'>-	const u8 *ptr;</div><div class='del'>-	ssize_t ret;</div><div class='del'>-</div><div class='del'>-	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		IWL_ERR(priv, "Can not allocate buffer\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	if (priv-&gt;tx_traffic &amp;&amp; iwl_have_debug_level(IWL_DL_TX)) {</div><div class='del'>-		ptr = priv-&gt;tx_traffic;</div><div class='del'>-		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				"Tx Traffic idx: %u\n", priv-&gt;tx_traffic_idx);</div><div class='del'>-		for (cnt = 0, ofs = 0; cnt &lt; IWL_TRAFFIC_ENTRIES; cnt++) {</div><div class='del'>-			for (entry = 0; entry &lt; IWL_TRAFFIC_ENTRY_SIZE / 16;</div><div class='del'>-			     entry++,  ofs += 16) {</div><div class='del'>-				pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-						"0x%.4x ", ofs);</div><div class='del'>-				hex_dump_to_buffer(ptr + ofs, 16, 16, 2,</div><div class='del'>-						   buf + pos, bufsz - pos, 0);</div><div class='del'>-				pos += strlen(buf + pos);</div><div class='del'>-				if (bufsz - pos &gt; 0)</div><div class='del'>-					buf[pos++] = '\n';</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;rx_traffic &amp;&amp; iwl_have_debug_level(IWL_DL_RX)) {</div><div class='del'>-		ptr = priv-&gt;rx_traffic;</div><div class='del'>-		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				"Rx Traffic idx: %u\n", priv-&gt;rx_traffic_idx);</div><div class='del'>-		for (cnt = 0, ofs = 0; cnt &lt; IWL_TRAFFIC_ENTRIES; cnt++) {</div><div class='del'>-			for (entry = 0; entry &lt; IWL_TRAFFIC_ENTRY_SIZE / 16;</div><div class='del'>-			     entry++,  ofs += 16) {</div><div class='del'>-				pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-						"0x%.4x ", ofs);</div><div class='del'>-				hex_dump_to_buffer(ptr + ofs, 16, 16, 2,</div><div class='del'>-						   buf + pos, bufsz - pos, 0);</div><div class='del'>-				pos += strlen(buf + pos);</div><div class='del'>-				if (bufsz - pos &gt; 0)</div><div class='del'>-					buf[pos++] = '\n';</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);</div><div class='del'>-	kfree(buf);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t iwl_dbgfs_traffic_log_write(struct file *file,</div><div class='del'>-					 const char __user *user_buf,</div><div class='del'>-					 size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct iwl_priv *priv = file-&gt;private_data;</div><div class='del'>-	char buf[8];</div><div class='del'>-	int buf_size;</div><div class='del'>-	int traffic_log;</div><div class='del'>-</div><div class='del'>-	memset(buf, 0, sizeof(buf));</div><div class='del'>-	buf_size = min(count, sizeof(buf) -  1);</div><div class='del'>-	if (copy_from_user(buf, user_buf, buf_size))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	if (sscanf(buf, "%d", &amp;traffic_log) != 1)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	if (traffic_log == 0)</div><div class='del'>-		iwl_reset_traffic_log(priv);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const char *fmt_value = "  %-30s %10u\n";</div><div class='ctx'> static const char *fmt_hex   = "  %-30s       0x%02X\n";</div><div class='ctx'> static const char *fmt_table = "  %-30s %10u  %10u  %10u  %10u\n";</div><div class='hunk'>@@ -947,10 +756,8 @@ static ssize_t iwl_dbgfs_ucode_rx_stats_read(struct file *file,</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> </div><div class='ctx'> 	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		IWL_ERR(priv, "Can not allocate Buffer\n");</div><div class='add'>+	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * the statistic information display here is based on</div><div class='hunk'>@@ -1376,10 +1183,8 @@ static ssize_t iwl_dbgfs_ucode_tx_stats_read(struct file *file,</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> </div><div class='ctx'> 	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		IWL_ERR(priv, "Can not allocate Buffer\n");</div><div class='add'>+	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* the statistic information display here is based on</div><div class='ctx'> 	 * the last statistics notification from uCode</div><div class='hunk'>@@ -1536,17 +1341,17 @@ static ssize_t iwl_dbgfs_ucode_tx_stats_read(struct file *file,</div><div class='ctx'> 	if (tx-&gt;tx_power.ant_a || tx-&gt;tx_power.ant_b || tx-&gt;tx_power.ant_c) {</div><div class='ctx'> 		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='ctx'> 			"tx power: (1/2 dB step)\n");</div><div class='del'>-		if ((hw_params(priv).valid_tx_ant &amp; ANT_A) &amp;&amp;</div><div class='add'>+		if ((priv-&gt;hw_params.valid_tx_ant &amp; ANT_A) &amp;&amp;</div><div class='ctx'> 		    tx-&gt;tx_power.ant_a)</div><div class='ctx'> 			pos += scnprintf(buf + pos, bufsz - pos,</div><div class='ctx'> 					fmt_hex, "antenna A:",</div><div class='ctx'> 					tx-&gt;tx_power.ant_a);</div><div class='del'>-		if ((hw_params(priv).valid_tx_ant &amp; ANT_B) &amp;&amp;</div><div class='add'>+		if ((priv-&gt;hw_params.valid_tx_ant &amp; ANT_B) &amp;&amp;</div><div class='ctx'> 		    tx-&gt;tx_power.ant_b)</div><div class='ctx'> 			pos += scnprintf(buf + pos, bufsz - pos,</div><div class='ctx'> 					fmt_hex, "antenna B:",</div><div class='ctx'> 					tx-&gt;tx_power.ant_b);</div><div class='del'>-		if ((hw_params(priv).valid_tx_ant &amp; ANT_C) &amp;&amp;</div><div class='add'>+		if ((priv-&gt;hw_params.valid_tx_ant &amp; ANT_C) &amp;&amp;</div><div class='ctx'> 		    tx-&gt;tx_power.ant_c)</div><div class='ctx'> 			pos += scnprintf(buf + pos, bufsz - pos,</div><div class='ctx'> 					fmt_hex, "antenna C:",</div><div class='hunk'>@@ -1578,10 +1383,8 @@ static ssize_t iwl_dbgfs_ucode_general_stats_read(struct file *file,</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> </div><div class='ctx'> 	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		IWL_ERR(priv, "Can not allocate Buffer\n");</div><div class='add'>+	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* the statistic information display here is based on</div><div class='ctx'> 	 * the last statistics notification from uCode</div><div class='hunk'>@@ -1704,16 +1507,11 @@ static ssize_t iwl_dbgfs_ucode_bt_stats_read(struct file *file,</div><div class='ctx'> 	ret = iwl_send_statistics_request(priv, CMD_SYNC, false);</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	if (ret) {</div><div class='del'>-		IWL_ERR(priv,</div><div class='del'>-			"Error sending statistics request: %zd\n", ret);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return -EAGAIN;</div><div class='del'>-	}</div><div class='ctx'> 	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		IWL_ERR(priv, "Can not allocate Buffer\n");</div><div class='add'>+	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * the statistic information display here is based on</div><div class='hunk'>@@ -1790,10 +1588,8 @@ static ssize_t iwl_dbgfs_reply_tx_error_read(struct file *file,</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> </div><div class='ctx'> 	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		IWL_ERR(priv, "Can not allocate Buffer\n");</div><div class='add'>+	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	pos += scnprintf(buf + pos, bufsz - pos, "Statistics_TX_Error:\n");</div><div class='ctx'> 	pos += scnprintf(buf + pos, bufsz - pos, "%s:\t\t\t\t%u\n",</div><div class='hunk'>@@ -1933,10 +1729,8 @@ static ssize_t iwl_dbgfs_sensitivity_read(struct file *file,</div><div class='ctx'> </div><div class='ctx'> 	data = &amp;priv-&gt;sensitivity_data;</div><div class='ctx'> 	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		IWL_ERR(priv, "Can not allocate Buffer\n");</div><div class='add'>+	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	pos += scnprintf(buf + pos, bufsz - pos, "auto_corr_ofdm:\t\t\t %u\n",</div><div class='ctx'> 			data-&gt;auto_corr_ofdm);</div><div class='hunk'>@@ -2014,10 +1808,8 @@ static ssize_t iwl_dbgfs_chain_noise_read(struct file *file,</div><div class='ctx'> </div><div class='ctx'> 	data = &amp;priv-&gt;chain_noise_data;</div><div class='ctx'> 	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		IWL_ERR(priv, "Can not allocate Buffer\n");</div><div class='add'>+	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	pos += scnprintf(buf + pos, bufsz - pos, "active_chains:\t\t\t %u\n",</div><div class='ctx'> 			data-&gt;active_chains);</div><div class='hunk'>@@ -2068,7 +1860,7 @@ static ssize_t iwl_dbgfs_power_save_status_read(struct file *file,</div><div class='ctx'> 	const size_t bufsz = sizeof(buf);</div><div class='ctx'> 	u32 pwrsave_status;</div><div class='ctx'> </div><div class='del'>-	pwrsave_status = iwl_read32(trans(priv), CSR_GP_CNTRL) &amp;</div><div class='add'>+	pwrsave_status = iwl_read32(priv-&gt;trans, CSR_GP_CNTRL) &amp;</div><div class='ctx'> 			CSR_GP_REG_POWER_SAVE_STATUS_MSK;</div><div class='ctx'> </div><div class='ctx'> 	pos += scnprintf(buf + pos, bufsz - pos, "Power Save Status: ");</div><div class='hunk'>@@ -2262,59 +2054,39 @@ static ssize_t iwl_dbgfs_plcp_delta_write(struct file *file,</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t iwl_dbgfs_force_reset_read(struct file *file,</div><div class='del'>-					char __user *user_buf,</div><div class='del'>-					size_t count, loff_t *ppos)</div><div class='add'>+static ssize_t iwl_dbgfs_rf_reset_read(struct file *file,</div><div class='add'>+				       char __user *user_buf,</div><div class='add'>+				       size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = file-&gt;private_data;</div><div class='del'>-	int i, pos = 0;</div><div class='add'>+	int pos = 0;</div><div class='ctx'> 	char buf[300];</div><div class='ctx'> 	const size_t bufsz = sizeof(buf);</div><div class='del'>-	struct iwl_force_reset *force_reset;</div><div class='add'>+	struct iwl_rf_reset *rf_reset = &amp;priv-&gt;rf_reset;</div><div class='add'>+</div><div class='add'>+	pos += scnprintf(buf + pos, bufsz - pos,</div><div class='add'>+			"RF reset statistics\n");</div><div class='add'>+	pos += scnprintf(buf + pos, bufsz - pos,</div><div class='add'>+			"\tnumber of reset request: %d\n",</div><div class='add'>+			rf_reset-&gt;reset_request_count);</div><div class='add'>+	pos += scnprintf(buf + pos, bufsz - pos,</div><div class='add'>+			"\tnumber of reset request success: %d\n",</div><div class='add'>+			rf_reset-&gt;reset_success_count);</div><div class='add'>+	pos += scnprintf(buf + pos, bufsz - pos,</div><div class='add'>+			"\tnumber of reset request reject: %d\n",</div><div class='add'>+			rf_reset-&gt;reset_reject_count);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; IWL_MAX_FORCE_RESET; i++) {</div><div class='del'>-		force_reset = &amp;priv-&gt;force_reset[i];</div><div class='del'>-		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				"Force reset method %d\n", i);</div><div class='del'>-		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				"\tnumber of reset request: %d\n",</div><div class='del'>-				force_reset-&gt;reset_request_count);</div><div class='del'>-		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				"\tnumber of reset request success: %d\n",</div><div class='del'>-				force_reset-&gt;reset_success_count);</div><div class='del'>-		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				"\tnumber of reset request reject: %d\n",</div><div class='del'>-				force_reset-&gt;reset_reject_count);</div><div class='del'>-		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				"\treset duration: %lu\n",</div><div class='del'>-				force_reset-&gt;reset_duration);</div><div class='del'>-	}</div><div class='ctx'> 	return simple_read_from_buffer(user_buf, count, ppos, buf, pos);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t iwl_dbgfs_force_reset_write(struct file *file,</div><div class='add'>+static ssize_t iwl_dbgfs_rf_reset_write(struct file *file,</div><div class='ctx'> 					const char __user *user_buf,</div><div class='ctx'> 					size_t count, loff_t *ppos) {</div><div class='ctx'> </div><div class='ctx'> 	struct iwl_priv *priv = file-&gt;private_data;</div><div class='del'>-	char buf[8];</div><div class='del'>-	int buf_size;</div><div class='del'>-	int reset, ret;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	memset(buf, 0, sizeof(buf));</div><div class='del'>-	buf_size = min(count, sizeof(buf) -  1);</div><div class='del'>-	if (copy_from_user(buf, user_buf, buf_size))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	if (sscanf(buf, "%d", &amp;reset) != 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	switch (reset) {</div><div class='del'>-	case IWL_RF_RESET:</div><div class='del'>-	case IWL_FW_RESET:</div><div class='del'>-		ret = iwl_force_reset(priv, reset, true);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	ret = iwl_force_rf_reset(priv, true);</div><div class='ctx'> 	return ret ? ret : count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2342,29 +2114,6 @@ static ssize_t iwl_dbgfs_txfifo_flush_write(struct file *file,</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t iwl_dbgfs_wd_timeout_write(struct file *file,</div><div class='del'>-					const char __user *user_buf,</div><div class='del'>-					size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct iwl_priv *priv = file-&gt;private_data;</div><div class='del'>-	char buf[8];</div><div class='del'>-	int buf_size;</div><div class='del'>-	int timeout;</div><div class='del'>-</div><div class='del'>-	memset(buf, 0, sizeof(buf));</div><div class='del'>-	buf_size = min(count, sizeof(buf) -  1);</div><div class='del'>-	if (copy_from_user(buf, user_buf, buf_size))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	if (sscanf(buf, "%d", &amp;timeout) != 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (timeout &lt; 0 || timeout &gt; IWL_MAX_WD_TIMEOUT)</div><div class='del'>-		timeout = IWL_DEF_WD_TIMEOUT;</div><div class='del'>-</div><div class='del'>-	hw_params(priv).wd_timeout = timeout;</div><div class='del'>-	iwl_setup_watchdog(priv);</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static ssize_t iwl_dbgfs_bt_traffic_read(struct file *file,</div><div class='ctx'> 					char __user *user_buf,</div><div class='ctx'> 					size_t count, loff_t *ppos) {</div><div class='hunk'>@@ -2420,10 +2169,10 @@ static ssize_t iwl_dbgfs_protection_mode_read(struct file *file,</div><div class='ctx'> 	char buf[40];</div><div class='ctx'> 	const size_t bufsz = sizeof(buf);</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;ht_params)</div><div class='add'>+	if (priv-&gt;cfg-&gt;ht_params)</div><div class='ctx'> 		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='ctx'> 			 "use %s for aggregation\n",</div><div class='del'>-			 (hw_params(priv).use_rts_for_aggregation) ?</div><div class='add'>+			 (priv-&gt;hw_params.use_rts_for_aggregation) ?</div><div class='ctx'> 				"rts/cts" : "cts-to-self");</div><div class='ctx'> 	else</div><div class='ctx'> 		pos += scnprintf(buf + pos, bufsz - pos, "N/A");</div><div class='hunk'>@@ -2440,7 +2189,7 @@ static ssize_t iwl_dbgfs_protection_mode_write(struct file *file,</div><div class='ctx'> 	int buf_size;</div><div class='ctx'> 	int rts;</div><div class='ctx'> </div><div class='del'>-	if (!cfg(priv)-&gt;ht_params)</div><div class='add'>+	if (!priv-&gt;cfg-&gt;ht_params)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	memset(buf, 0, sizeof(buf));</div><div class='hunk'>@@ -2450,12 +2199,29 @@ static ssize_t iwl_dbgfs_protection_mode_write(struct file *file,</div><div class='ctx'> 	if (sscanf(buf, "%d", &amp;rts) != 1)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (rts)</div><div class='del'>-		hw_params(priv).use_rts_for_aggregation = true;</div><div class='add'>+		priv-&gt;hw_params.use_rts_for_aggregation = true;</div><div class='ctx'> 	else</div><div class='del'>-		hw_params(priv).use_rts_for_aggregation = false;</div><div class='add'>+		priv-&gt;hw_params.use_rts_for_aggregation = false;</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int iwl_cmd_echo_test(struct iwl_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct iwl_host_cmd cmd = {</div><div class='add'>+		.id = REPLY_ECHO,</div><div class='add'>+		.len = { 0 },</div><div class='add'>+		.flags = CMD_SYNC,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ret = iwl_dvm_send_cmd(priv, &amp;cmd);</div><div class='add'>+	if (ret)</div><div class='add'>+		IWL_ERR(priv, "echo testing fail: 0X%x\n", ret);</div><div class='add'>+	else</div><div class='add'>+		IWL_DEBUG_INFO(priv, "echo testing pass\n");</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static ssize_t iwl_dbgfs_echo_test_write(struct file *file,</div><div class='ctx'> 					const char __user *user_buf,</div><div class='ctx'> 					size_t count, loff_t *ppos)</div><div class='hunk'>@@ -2473,9 +2239,93 @@ static ssize_t iwl_dbgfs_echo_test_write(struct file *file,</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-DEBUGFS_READ_FILE_OPS(rx_statistics);</div><div class='del'>-DEBUGFS_READ_FILE_OPS(tx_statistics);</div><div class='del'>-DEBUGFS_READ_WRITE_FILE_OPS(traffic_log);</div><div class='add'>+static ssize_t iwl_dbgfs_log_event_read(struct file *file,</div><div class='add'>+					 char __user *user_buf,</div><div class='add'>+					 size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct iwl_priv *priv = file-&gt;private_data;</div><div class='add'>+	char *buf;</div><div class='add'>+	int pos = 0;</div><div class='add'>+	ssize_t ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = pos = iwl_dump_nic_event_log(priv, true, &amp;buf, true);</div><div class='add'>+	if (buf) {</div><div class='add'>+		ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);</div><div class='add'>+		kfree(buf);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t iwl_dbgfs_log_event_write(struct file *file,</div><div class='add'>+					const char __user *user_buf,</div><div class='add'>+					size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct iwl_priv *priv = file-&gt;private_data;</div><div class='add'>+	u32 event_log_flag;</div><div class='add'>+	char buf[8];</div><div class='add'>+	int buf_size;</div><div class='add'>+</div><div class='add'>+	memset(buf, 0, sizeof(buf));</div><div class='add'>+	buf_size = min(count, sizeof(buf) -  1);</div><div class='add'>+	if (copy_from_user(buf, user_buf, buf_size))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	if (sscanf(buf, "%d", &amp;event_log_flag) != 1)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	if (event_log_flag == 1)</div><div class='add'>+		iwl_dump_nic_event_log(priv, true, NULL, false);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t iwl_dbgfs_calib_disabled_read(struct file *file,</div><div class='add'>+					 char __user *user_buf,</div><div class='add'>+					 size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct iwl_priv *priv = file-&gt;private_data;</div><div class='add'>+	char buf[120];</div><div class='add'>+	int pos = 0;</div><div class='add'>+	const size_t bufsz = sizeof(buf);</div><div class='add'>+</div><div class='add'>+	pos += scnprintf(buf + pos, bufsz - pos,</div><div class='add'>+			 "Sensitivity calibrations %s\n",</div><div class='add'>+			 (priv-&gt;calib_disabled &amp;</div><div class='add'>+					IWL_SENSITIVITY_CALIB_DISABLED) ?</div><div class='add'>+			 "DISABLED" : "ENABLED");</div><div class='add'>+	pos += scnprintf(buf + pos, bufsz - pos,</div><div class='add'>+			 "Chain noise calibrations %s\n",</div><div class='add'>+			 (priv-&gt;calib_disabled &amp;</div><div class='add'>+					IWL_CHAIN_NOISE_CALIB_DISABLED) ?</div><div class='add'>+			 "DISABLED" : "ENABLED");</div><div class='add'>+	pos += scnprintf(buf + pos, bufsz - pos,</div><div class='add'>+			 "Tx power calibrations %s\n",</div><div class='add'>+			 (priv-&gt;calib_disabled &amp;</div><div class='add'>+					IWL_TX_POWER_CALIB_DISABLED) ?</div><div class='add'>+			 "DISABLED" : "ENABLED");</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(user_buf, count, ppos, buf, pos);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t iwl_dbgfs_calib_disabled_write(struct file *file,</div><div class='add'>+					      const char __user *user_buf,</div><div class='add'>+					      size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct iwl_priv *priv = file-&gt;private_data;</div><div class='add'>+	char buf[8];</div><div class='add'>+	u32 calib_disabled;</div><div class='add'>+	int buf_size;</div><div class='add'>+</div><div class='add'>+	memset(buf, 0, sizeof(buf));</div><div class='add'>+	buf_size = min(count, sizeof(buf) - 1);</div><div class='add'>+	if (copy_from_user(buf, user_buf, buf_size))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	if (sscanf(buf, "%x", &amp;calib_disabled) != 1)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	priv-&gt;calib_disabled = calib_disabled;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(ucode_rx_stats);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(ucode_tx_stats);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(ucode_general_stats);</div><div class='hunk'>@@ -2483,20 +2333,20 @@ DEBUGFS_READ_FILE_OPS(sensitivity);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(chain_noise);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(power_save_status);</div><div class='ctx'> DEBUGFS_WRITE_FILE_OPS(clear_ucode_statistics);</div><div class='del'>-DEBUGFS_WRITE_FILE_OPS(clear_traffic_statistics);</div><div class='ctx'> DEBUGFS_READ_WRITE_FILE_OPS(ucode_tracing);</div><div class='ctx'> DEBUGFS_READ_WRITE_FILE_OPS(missed_beacon);</div><div class='ctx'> DEBUGFS_READ_WRITE_FILE_OPS(plcp_delta);</div><div class='del'>-DEBUGFS_READ_WRITE_FILE_OPS(force_reset);</div><div class='add'>+DEBUGFS_READ_WRITE_FILE_OPS(rf_reset);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(rxon_flags);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(rxon_filter_flags);</div><div class='ctx'> DEBUGFS_WRITE_FILE_OPS(txfifo_flush);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(ucode_bt_stats);</div><div class='del'>-DEBUGFS_WRITE_FILE_OPS(wd_timeout);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(bt_traffic);</div><div class='ctx'> DEBUGFS_READ_WRITE_FILE_OPS(protection_mode);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(reply_tx_error);</div><div class='ctx'> DEBUGFS_WRITE_FILE_OPS(echo_test);</div><div class='add'>+DEBUGFS_READ_WRITE_FILE_OPS(log_event);</div><div class='add'>+DEBUGFS_READ_WRITE_FILE_OPS(calib_disabled);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Create the debugfs files and directories</div><div class='hunk'>@@ -2537,15 +2387,11 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)</div><div class='ctx'> 	DEBUGFS_ADD_FILE(disable_ht40, dir_data, S_IWUSR | S_IRUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(temperature, dir_data, S_IRUSR);</div><div class='ctx'> </div><div class='del'>-	DEBUGFS_ADD_FILE(rx_statistics, dir_debug, S_IRUSR);</div><div class='del'>-	DEBUGFS_ADD_FILE(tx_statistics, dir_debug, S_IRUSR);</div><div class='del'>-	DEBUGFS_ADD_FILE(traffic_log, dir_debug, S_IWUSR | S_IRUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(power_save_status, dir_debug, S_IRUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(clear_ucode_statistics, dir_debug, S_IWUSR);</div><div class='del'>-	DEBUGFS_ADD_FILE(clear_traffic_statistics, dir_debug, S_IWUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(missed_beacon, dir_debug, S_IWUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(plcp_delta, dir_debug, S_IWUSR | S_IRUSR);</div><div class='del'>-	DEBUGFS_ADD_FILE(force_reset, dir_debug, S_IWUSR | S_IRUSR);</div><div class='add'>+	DEBUGFS_ADD_FILE(rf_reset, dir_debug, S_IWUSR | S_IRUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(ucode_rx_stats, dir_debug, S_IRUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(ucode_tx_stats, dir_debug, S_IRUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(ucode_general_stats, dir_debug, S_IRUSR);</div><div class='hunk'>@@ -2558,17 +2404,16 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)</div><div class='ctx'> 	DEBUGFS_ADD_FILE(reply_tx_error, dir_debug, S_IRUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(rxon_flags, dir_debug, S_IWUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(rxon_filter_flags, dir_debug, S_IWUSR);</div><div class='del'>-	DEBUGFS_ADD_FILE(wd_timeout, dir_debug, S_IWUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(echo_test, dir_debug, S_IWUSR);</div><div class='add'>+	DEBUGFS_ADD_FILE(log_event, dir_debug, S_IWUSR | S_IRUSR);</div><div class='add'>+</div><div class='ctx'> 	if (iwl_advanced_bt_coexist(priv))</div><div class='ctx'> 		DEBUGFS_ADD_FILE(bt_traffic, dir_debug, S_IRUSR);</div><div class='ctx'> </div><div class='del'>-	DEBUGFS_ADD_BOOL(disable_sensitivity, dir_rf,</div><div class='del'>-			 &amp;priv-&gt;disable_sens_cal);</div><div class='del'>-	DEBUGFS_ADD_BOOL(disable_chain_noise, dir_rf,</div><div class='del'>-			 &amp;priv-&gt;disable_chain_noise_cal);</div><div class='add'>+	/* Calibrations disabled/enabled status*/</div><div class='add'>+	DEBUGFS_ADD_FILE(calib_disabled, dir_rf, S_IWUSR | S_IRUSR);</div><div class='ctx'> </div><div class='del'>-	if (iwl_trans_dbgfs_register(trans(priv), dir_debug))</div><div class='add'>+	if (iwl_trans_dbgfs_register(priv-&gt;trans, dir_debug))</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h<br/>index 16956b777f96..70062379d0ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-dev.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-dev.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-dev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-dev.h</a></div><div class='hunk'>@@ -38,6 +38,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "iwl-fw.h"</div><div class='ctx'> #include "iwl-eeprom.h"</div><div class='ctx'> #include "iwl-csr.h"</div><div class='ctx'> #include "iwl-debug.h"</div><div class='hunk'>@@ -47,12 +48,9 @@</div><div class='ctx'> #include "iwl-agn-rs.h"</div><div class='ctx'> #include "iwl-agn-tt.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='ctx'> #include "iwl-op-mode.h"</div><div class='ctx'> #include "iwl-notif-wait.h"</div><div class='ctx'> </div><div class='del'>-struct iwl_tx_queue;</div><div class='del'>-</div><div class='ctx'> /* CT-KILL constants */</div><div class='ctx'> #define CT_KILL_THRESHOLD_LEGACY   110 /* in Celsius */</div><div class='ctx'> #define CT_KILL_THRESHOLD	   114 /* in Celsius */</div><div class='hunk'>@@ -196,6 +194,7 @@ struct iwl_qos_info {</div><div class='ctx'>  * These states relate to a specific RA / TID.</div><div class='ctx'>  *</div><div class='ctx'>  * @IWL_AGG_OFF: aggregation is not used</div><div class='add'>+ * @IWL_AGG_STARTING: aggregation are starting (between start and oper)</div><div class='ctx'>  * @IWL_AGG_ON: aggregation session is up</div><div class='ctx'>  * @IWL_EMPTYING_HW_QUEUE_ADDBA: establishing a BA session - waiting for the</div><div class='ctx'>  *	HW queue to be empty from packets for this RA /TID.</div><div class='hunk'>@@ -204,6 +203,7 @@ struct iwl_qos_info {</div><div class='ctx'>  */</div><div class='ctx'> enum iwl_agg_state {</div><div class='ctx'> 	IWL_AGG_OFF = 0,</div><div class='add'>+	IWL_AGG_STARTING,</div><div class='ctx'> 	IWL_AGG_ON,</div><div class='ctx'> 	IWL_EMPTYING_HW_QUEUE_ADDBA,</div><div class='ctx'> 	IWL_EMPTYING_HW_QUEUE_DELBA,</div><div class='hunk'>@@ -220,8 +220,7 @@ enum iwl_agg_state {</div><div class='ctx'>  *	Tx response (REPLY_TX), and the block ack notification</div><div class='ctx'>  *	(REPLY_COMPRESSED_BA).</div><div class='ctx'>  * @state: state of the BA agreement establishment / tear down.</div><div class='del'>- * @txq_id: Tx queue used by the BA session - used by the transport layer.</div><div class='del'>- *	Needed by the upper layer for debugfs only.</div><div class='add'>+ * @txq_id: Tx queue used by the BA session</div><div class='ctx'>  * @ssn: the first packet to be sent in AGG HW queue in Tx AGG start flow, or</div><div class='ctx'>  *	the first packet to be sent in legacy HW queue in Tx AGG stop flow.</div><div class='ctx'>  *	Basically when next_reclaimed reaches ssn, we can tell mac80211 that</div><div class='hunk'>@@ -507,44 +506,6 @@ struct reply_agg_tx_error_statistics {</div><div class='ctx'> 	u32 unknown;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* management statistics */</div><div class='del'>-enum iwl_mgmt_stats {</div><div class='del'>-	MANAGEMENT_ASSOC_REQ = 0,</div><div class='del'>-	MANAGEMENT_ASSOC_RESP,</div><div class='del'>-	MANAGEMENT_REASSOC_REQ,</div><div class='del'>-	MANAGEMENT_REASSOC_RESP,</div><div class='del'>-	MANAGEMENT_PROBE_REQ,</div><div class='del'>-	MANAGEMENT_PROBE_RESP,</div><div class='del'>-	MANAGEMENT_BEACON,</div><div class='del'>-	MANAGEMENT_ATIM,</div><div class='del'>-	MANAGEMENT_DISASSOC,</div><div class='del'>-	MANAGEMENT_AUTH,</div><div class='del'>-	MANAGEMENT_DEAUTH,</div><div class='del'>-	MANAGEMENT_ACTION,</div><div class='del'>-	MANAGEMENT_MAX,</div><div class='del'>-};</div><div class='del'>-/* control statistics */</div><div class='del'>-enum iwl_ctrl_stats {</div><div class='del'>-	CONTROL_BACK_REQ =  0,</div><div class='del'>-	CONTROL_BACK,</div><div class='del'>-	CONTROL_PSPOLL,</div><div class='del'>-	CONTROL_RTS,</div><div class='del'>-	CONTROL_CTS,</div><div class='del'>-	CONTROL_ACK,</div><div class='del'>-	CONTROL_CFEND,</div><div class='del'>-	CONTROL_CFENDACK,</div><div class='del'>-	CONTROL_MAX,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct traffic_stats {</div><div class='del'>-#ifdef CONFIG_IWLWIFI_DEBUGFS</div><div class='del'>-	u32 mgmt[MANAGEMENT_MAX];</div><div class='del'>-	u32 ctrl[CONTROL_MAX];</div><div class='del'>-	u32 data_cnt;</div><div class='del'>-	u64 data_bytes;</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds</div><div class='ctx'>  * to perform continuous uCode event logging operation if enabled</div><div class='hunk'>@@ -571,24 +532,7 @@ struct iwl_event_log {</div><div class='ctx'> 	int wraps_more_count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This is the threshold value of plcp error rate per 100mSecs.  It is</div><div class='del'>- * used to set and check for the validity of plcp_delta.</div><div class='del'>- */</div><div class='del'>-#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN	(1)</div><div class='del'>-#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF	(50)</div><div class='del'>-#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF	(100)</div><div class='del'>-#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF	(200)</div><div class='del'>-#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX	(255)</div><div class='del'>-#define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE	(0)</div><div class='del'>-</div><div class='ctx'> #define IWL_DELAY_NEXT_FORCE_RF_RESET  (HZ*3)</div><div class='del'>-#define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)</div><div class='del'>-</div><div class='del'>-/* TX queue watchdog timeouts in mSecs */</div><div class='del'>-#define IWL_DEF_WD_TIMEOUT	(2000)</div><div class='del'>-#define IWL_LONG_WD_TIMEOUT	(10000)</div><div class='del'>-#define IWL_MAX_WD_TIMEOUT	(120000)</div><div class='ctx'> </div><div class='ctx'> /* BT Antenna Coupling Threshold (dB) */</div><div class='ctx'> #define IWL_BT_ANTENNA_COUPLING_THRESHOLD	(35)</div><div class='hunk'>@@ -598,18 +542,18 @@ struct iwl_event_log {</div><div class='ctx'> #define IWL_MAX_CONTINUE_RELOAD_CNT	4</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-enum iwl_reset {</div><div class='del'>-	IWL_RF_RESET = 0,</div><div class='del'>-	IWL_FW_RESET,</div><div class='del'>-	IWL_MAX_FORCE_RESET,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct iwl_force_reset {</div><div class='add'>+struct iwl_rf_reset {</div><div class='ctx'> 	int reset_request_count;</div><div class='ctx'> 	int reset_success_count;</div><div class='ctx'> 	int reset_reject_count;</div><div class='del'>-	unsigned long reset_duration;</div><div class='del'>-	unsigned long last_force_reset_jiffies;</div><div class='add'>+	unsigned long last_reset_jiffies;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum iwl_rxon_context_id {</div><div class='add'>+	IWL_RXON_CTX_BSS,</div><div class='add'>+	IWL_RXON_CTX_PAN,</div><div class='add'>+</div><div class='add'>+	NUM_IWL_RXON_CTX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* extend beacon time format bit shifting  */</div><div class='hunk'>@@ -623,6 +567,10 @@ struct iwl_force_reset {</div><div class='ctx'> struct iwl_rxon_context {</div><div class='ctx'> 	struct ieee80211_vif *vif;</div><div class='ctx'> </div><div class='add'>+	u8 mcast_queue;</div><div class='add'>+	u8 ac_to_queue[IEEE80211_NUM_ACS];</div><div class='add'>+	u8 ac_to_fifo[IEEE80211_NUM_ACS];</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We could use the vif to indicate active, but we</div><div class='ctx'> 	 * also need it to be active during disabling when</div><div class='hunk'>@@ -677,6 +625,52 @@ enum iwl_scan_type {</div><div class='ctx'> 	IWL_SCAN_ROC,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * struct iwl_hw_params</div><div class='add'>+ *</div><div class='add'>+ * Holds the module parameters</div><div class='add'>+ *</div><div class='add'>+ * @tx_chains_num: Number of TX chains</div><div class='add'>+ * @rx_chains_num: Number of RX chains</div><div class='add'>+ * @valid_tx_ant: usable antennas for TX</div><div class='add'>+ * @valid_rx_ant: usable antennas for RX</div><div class='add'>+ * @ht40_channel: is 40MHz width possible: BIT(IEEE80211_BAND_XXX)</div><div class='add'>+ * @sku: sku read from EEPROM</div><div class='add'>+ * @ct_kill_threshold: temperature threshold - in hw dependent unit</div><div class='add'>+ * @ct_kill_exit_threshold: when to reeable the device - in hw dependent unit</div><div class='add'>+ *	relevant for 1000, 6000 and up</div><div class='add'>+ * @struct iwl_sensitivity_ranges: range of sensitivity values</div><div class='add'>+ * @use_rts_for_aggregation: use rts/cts protection for HT traffic</div><div class='add'>+ */</div><div class='add'>+struct iwl_hw_params {</div><div class='add'>+	u8  tx_chains_num;</div><div class='add'>+	u8  rx_chains_num;</div><div class='add'>+	u8  valid_tx_ant;</div><div class='add'>+	u8  valid_rx_ant;</div><div class='add'>+	u8  ht40_channel;</div><div class='add'>+	bool use_rts_for_aggregation;</div><div class='add'>+	u16 sku;</div><div class='add'>+	u32 ct_kill_threshold;</div><div class='add'>+	u32 ct_kill_exit_threshold;</div><div class='add'>+</div><div class='add'>+	const struct iwl_sensitivity_ranges *sens;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct iwl_lib_ops {</div><div class='add'>+	/* set hw dependent parameters */</div><div class='add'>+	void (*set_hw_params)(struct iwl_priv *priv);</div><div class='add'>+	int (*set_channel_switch)(struct iwl_priv *priv,</div><div class='add'>+				  struct ieee80211_channel_switch *ch_switch);</div><div class='add'>+	/* device specific configuration */</div><div class='add'>+	void (*nic_config)(struct iwl_priv *priv);</div><div class='add'>+</div><div class='add'>+	/* eeprom operations (as defined in iwl-eeprom.h) */</div><div class='add'>+	struct iwl_eeprom_ops eeprom_ops;</div><div class='add'>+</div><div class='add'>+	/* temperature */</div><div class='add'>+	void (*temperature)(struct iwl_priv *priv);</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_IWLWIFI_DEVICE_TESTMODE</div><div class='ctx'> struct iwl_testmode_trace {</div><div class='ctx'> 	u32 buff_size;</div><div class='hunk'>@@ -701,6 +695,17 @@ struct iwl_wipan_noa_data {</div><div class='ctx'> 	u8 data[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Calibration disabling bit mask */</div><div class='add'>+enum {</div><div class='add'>+	IWL_CALIB_ENABLE_ALL			= 0,</div><div class='add'>+</div><div class='add'>+	IWL_SENSITIVITY_CALIB_DISABLED		= BIT(0),</div><div class='add'>+	IWL_CHAIN_NOISE_CALIB_DISABLED		= BIT(1),</div><div class='add'>+	IWL_TX_POWER_CALIB_DISABLED		= BIT(2),</div><div class='add'>+</div><div class='add'>+	IWL_CALIB_DISABLE_ALL			= 0xFFFFFFFF,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define IWL_OP_MODE_GET_DVM(_iwl_op_mode) \</div><div class='ctx'> 	((struct iwl_priv *) ((_iwl_op_mode)-&gt;op_mode_specific))</div><div class='ctx'> </div><div class='hunk'>@@ -710,9 +715,11 @@ struct iwl_wipan_noa_data {</div><div class='ctx'> </div><div class='ctx'> struct iwl_priv {</div><div class='ctx'> </div><div class='del'>-	/*data shared among all the driver's layers */</div><div class='del'>-	struct iwl_shared *shrd;</div><div class='add'>+	struct iwl_trans *trans;</div><div class='add'>+	struct device *dev;		/* for debug prints only */</div><div class='add'>+	const struct iwl_cfg *cfg;</div><div class='ctx'> 	const struct iwl_fw *fw;</div><div class='add'>+	const struct iwl_lib_ops *lib;</div><div class='ctx'> 	unsigned long status;</div><div class='ctx'> </div><div class='ctx'> 	spinlock_t sta_lock;</div><div class='hunk'>@@ -720,6 +727,11 @@ struct iwl_priv {</div><div class='ctx'> </div><div class='ctx'> 	unsigned long transport_queue_stop;</div><div class='ctx'> 	bool passive_no_rx;</div><div class='add'>+#define IWL_INVALID_MAC80211_QUEUE	0xff</div><div class='add'>+	u8 queue_to_mac80211[IWL_MAX_HW_QUEUES];</div><div class='add'>+	atomic_t queue_stop_count[IWL_MAX_HW_QUEUES];</div><div class='add'>+</div><div class='add'>+	unsigned long agg_q_alloc[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)];</div><div class='ctx'> </div><div class='ctx'> 	/* ieee device used by generic ieee processing code */</div><div class='ctx'> 	struct ieee80211_hw *hw;</div><div class='hunk'>@@ -730,7 +742,10 @@ struct iwl_priv {</div><div class='ctx'> </div><div class='ctx'> 	struct workqueue_struct *workqueue;</div><div class='ctx'> </div><div class='add'>+	struct iwl_hw_params hw_params;</div><div class='add'>+</div><div class='ctx'> 	enum ieee80211_band band;</div><div class='add'>+	u8 valid_contexts;</div><div class='ctx'> </div><div class='ctx'> 	void (*pre_rx_handler)(struct iwl_priv *priv,</div><div class='ctx'> 			       struct iwl_rx_cmd_buffer *rxb);</div><div class='hunk'>@@ -763,8 +778,8 @@ struct iwl_priv {</div><div class='ctx'> 	/*counters */</div><div class='ctx'> 	u32 rx_handlers_stats[REPLY_MAX];</div><div class='ctx'> </div><div class='del'>-	/* force reset */</div><div class='del'>-	struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET];</div><div class='add'>+	/* rf reset */</div><div class='add'>+	struct iwl_rf_reset rf_reset;</div><div class='ctx'> </div><div class='ctx'> 	/* firmware reload counter and timestamp */</div><div class='ctx'> 	unsigned long reload_jiffies;</div><div class='hunk'>@@ -810,8 +825,6 @@ struct iwl_priv {</div><div class='ctx'> </div><div class='ctx'> 	__le16 switch_channel;</div><div class='ctx'> </div><div class='del'>-	u16 active_rate;</div><div class='del'>-</div><div class='ctx'> 	u8 start_calib;</div><div class='ctx'> 	struct iwl_sensitivity_data sensitivity_data;</div><div class='ctx'> 	struct iwl_chain_noise_data chain_noise_data;</div><div class='hunk'>@@ -825,10 +838,6 @@ struct iwl_priv {</div><div class='ctx'> </div><div class='ctx'> 	int activity_timer_active;</div><div class='ctx'> </div><div class='del'>-	/* counts mgmt, ctl, and data packets */</div><div class='del'>-	struct traffic_stats tx_stats;</div><div class='del'>-	struct traffic_stats rx_stats;</div><div class='del'>-</div><div class='ctx'> 	struct iwl_power_mgr power_data;</div><div class='ctx'> 	struct iwl_tt_mgmt thermal_throttle;</div><div class='ctx'> </div><div class='hunk'>@@ -912,6 +921,7 @@ struct iwl_priv {</div><div class='ctx'> 	__le32 kill_ack_mask;</div><div class='ctx'> 	__le32 kill_cts_mask;</div><div class='ctx'> 	__le16 bt_valid;</div><div class='add'>+	bool reduced_txpower;</div><div class='ctx'> 	u16 bt_on_thresh;</div><div class='ctx'> 	u16 bt_duration;</div><div class='ctx'> 	u16 dynamic_frag_thresh;</div><div class='hunk'>@@ -948,23 +958,21 @@ struct iwl_priv {</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_IWLWIFI_DEBUGFS</div><div class='ctx'> 	/* debugfs */</div><div class='del'>-	u16 tx_traffic_idx;</div><div class='del'>-	u16 rx_traffic_idx;</div><div class='del'>-	u8 *tx_traffic;</div><div class='del'>-	u8 *rx_traffic;</div><div class='ctx'> 	struct dentry *debugfs_dir;</div><div class='ctx'> 	u32 dbgfs_sram_offset, dbgfs_sram_len;</div><div class='ctx'> 	bool disable_ht40;</div><div class='ctx'> 	void *wowlan_sram;</div><div class='ctx'> #endif /* CONFIG_IWLWIFI_DEBUGFS */</div><div class='ctx'> </div><div class='add'>+	/* eeprom -- this is in the card's little endian byte order */</div><div class='add'>+	u8 *eeprom;</div><div class='add'>+	enum iwl_nvm_type nvm_device_type;</div><div class='add'>+</div><div class='ctx'> 	struct work_struct txpower_work;</div><div class='del'>-	u32 disable_sens_cal;</div><div class='del'>-	u32 disable_chain_noise_cal;</div><div class='add'>+	u32 calib_disabled;</div><div class='ctx'> 	struct work_struct run_time_calib_work;</div><div class='ctx'> 	struct timer_list statistics_periodic;</div><div class='ctx'> 	struct timer_list ucode_trace;</div><div class='del'>-	struct timer_list watchdog;</div><div class='ctx'> </div><div class='ctx'> 	struct iwl_event_log event_log;</div><div class='ctx'> </div><div class='hunk'>@@ -982,10 +990,18 @@ struct iwl_priv {</div><div class='ctx'> 	__le64 replay_ctr;</div><div class='ctx'> 	__le16 last_seq_ctl;</div><div class='ctx'> 	bool have_rekey_data;</div><div class='add'>+</div><div class='add'>+	/* device_pointers: pointers to ucode event tables */</div><div class='add'>+	struct {</div><div class='add'>+		u32 error_event_table;</div><div class='add'>+		u32 log_event_table;</div><div class='add'>+	} device_pointers;</div><div class='add'>+</div><div class='add'>+	/* indicator of loaded ucode image */</div><div class='add'>+	enum iwl_ucode_type cur_ucode;</div><div class='ctx'> }; /*iwl_priv */</div><div class='ctx'> </div><div class='ctx'> extern struct kmem_cache *iwl_tx_cmd_pool;</div><div class='del'>-extern struct iwl_mod_params iwlagn_mod_params;</div><div class='ctx'> </div><div class='ctx'> static inline struct iwl_rxon_context *</div><div class='ctx'> iwl_rxon_ctx_from_vif(struct ieee80211_vif *vif)</div><div class='hunk'>@@ -998,7 +1014,7 @@ iwl_rxon_ctx_from_vif(struct ieee80211_vif *vif)</div><div class='ctx'> #define for_each_context(priv, ctx)				\</div><div class='ctx'> 	for (ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_BSS];		\</div><div class='ctx'> 	     ctx &lt; &amp;priv-&gt;contexts[NUM_IWL_RXON_CTX]; ctx++)	\</div><div class='del'>-		if (priv-&gt;shrd-&gt;valid_contexts &amp; BIT(ctx-&gt;ctxid))</div><div class='add'>+		if (priv-&gt;valid_contexts &amp; BIT(ctx-&gt;ctxid))</div><div class='ctx'> </div><div class='ctx'> static inline int iwl_is_associated_ctx(struct iwl_rxon_context *ctx)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-drv.c b/drivers/net/wireless/iwlwifi/iwl-drv.c<br/>index 6f312c77af5e..d742900969ea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-drv.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-drv.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-drv.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-drv.c</a></div><div class='hunk'>@@ -66,10 +66,13 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iwl-drv.h"</div><div class='add'>+#include "iwl-debug.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='ctx'> #include "iwl-op-mode.h"</div><div class='ctx'> #include "iwl-agn-hw.h"</div><div class='add'>+#include "iwl-fw.h"</div><div class='add'>+#include "iwl-config.h"</div><div class='add'>+#include "iwl-modparams.h"</div><div class='ctx'> </div><div class='ctx'> /* private includes */</div><div class='ctx'> #include "iwl-fw-file.h"</div><div class='hunk'>@@ -77,8 +80,10 @@</div><div class='ctx'> /**</div><div class='ctx'>  * struct iwl_drv - drv common data</div><div class='ctx'>  * @fw: the iwl_fw structure</div><div class='del'>- * @shrd: pointer to common shared structure</div><div class='ctx'>  * @op_mode: the running op_mode</div><div class='add'>+ * @trans: transport layer</div><div class='add'>+ * @dev: for debug prints only</div><div class='add'>+ * @cfg: configuration struct</div><div class='ctx'>  * @fw_index: firmware revision to try loading</div><div class='ctx'>  * @firmware_name: composite filename of ucode file to load</div><div class='ctx'>  * @request_firmware_complete: the firmware has been obtained from user space</div><div class='hunk'>@@ -86,8 +91,10 @@</div><div class='ctx'> struct iwl_drv {</div><div class='ctx'> 	struct iwl_fw fw;</div><div class='ctx'> </div><div class='del'>-	struct iwl_shared *shrd;</div><div class='ctx'> 	struct iwl_op_mode *op_mode;</div><div class='add'>+	struct iwl_trans *trans;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	const struct iwl_cfg *cfg;</div><div class='ctx'> </div><div class='ctx'> 	int fw_index;                   /* firmware we're trying to load */</div><div class='ctx'> 	char firmware_name[25];         /* name of firmware file to load */</div><div class='hunk'>@@ -110,7 +117,7 @@ struct fw_sec {</div><div class='ctx'> static void iwl_free_fw_desc(struct iwl_drv *drv, struct fw_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	if (desc-&gt;v_addr)</div><div class='del'>-		dma_free_coherent(trans(drv)-&gt;dev, desc-&gt;len,</div><div class='add'>+		dma_free_coherent(drv-&gt;trans-&gt;dev, desc-&gt;len,</div><div class='ctx'> 				  desc-&gt;v_addr, desc-&gt;p_addr);</div><div class='ctx'> 	desc-&gt;v_addr = NULL;</div><div class='ctx'> 	desc-&gt;len = 0;</div><div class='hunk'>@@ -138,7 +145,7 @@ static int iwl_alloc_fw_desc(struct iwl_drv *drv, struct fw_desc *desc,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	desc-&gt;v_addr = dma_alloc_coherent(trans(drv)-&gt;dev, sec-&gt;size,</div><div class='add'>+	desc-&gt;v_addr = dma_alloc_coherent(drv-&gt;trans-&gt;dev, sec-&gt;size,</div><div class='ctx'> 					  &amp;desc-&gt;p_addr, GFP_KERNEL);</div><div class='ctx'> 	if (!desc-&gt;v_addr)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -156,8 +163,7 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);</div><div class='ctx'> </div><div class='ctx'> static int iwl_request_firmware(struct iwl_drv *drv, bool first)</div><div class='ctx'> {</div><div class='del'>-	const struct iwl_cfg *cfg = cfg(drv);</div><div class='del'>-	const char *name_pre = cfg-&gt;fw_name_pre;</div><div class='add'>+	const char *name_pre = drv-&gt;cfg-&gt;fw_name_pre;</div><div class='ctx'> 	char tag[8];</div><div class='ctx'> </div><div class='ctx'> 	if (first) {</div><div class='hunk'>@@ -166,14 +172,14 @@ static int iwl_request_firmware(struct iwl_drv *drv, bool first)</div><div class='ctx'> 		strcpy(tag, UCODE_EXPERIMENTAL_TAG);</div><div class='ctx'> 	} else if (drv-&gt;fw_index == UCODE_EXPERIMENTAL_INDEX) {</div><div class='ctx'> #endif</div><div class='del'>-		drv-&gt;fw_index = cfg-&gt;ucode_api_max;</div><div class='add'>+		drv-&gt;fw_index = drv-&gt;cfg-&gt;ucode_api_max;</div><div class='ctx'> 		sprintf(tag, "%d", drv-&gt;fw_index);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		drv-&gt;fw_index--;</div><div class='ctx'> 		sprintf(tag, "%d", drv-&gt;fw_index);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (drv-&gt;fw_index &lt; cfg-&gt;ucode_api_min) {</div><div class='add'>+	if (drv-&gt;fw_index &lt; drv-&gt;cfg-&gt;ucode_api_min) {</div><div class='ctx'> 		IWL_ERR(drv, "no suitable firmware found!\n");</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -186,7 +192,7 @@ static int iwl_request_firmware(struct iwl_drv *drv, bool first)</div><div class='ctx'> 		       drv-&gt;firmware_name);</div><div class='ctx'> </div><div class='ctx'> 	return request_firmware_nowait(THIS_MODULE, 1, drv-&gt;firmware_name,</div><div class='del'>-				       trans(drv)-&gt;dev,</div><div class='add'>+				       drv-&gt;trans-&gt;dev,</div><div class='ctx'> 				       GFP_KERNEL, drv, iwl_ucode_callback);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -284,6 +290,7 @@ static int iwl_store_ucode_sec(struct iwl_firmware_pieces *pieces,</div><div class='ctx'> </div><div class='ctx'> 	sec-&gt;offset = le32_to_cpu(sec_parse-&gt;offset);</div><div class='ctx'> 	sec-&gt;data = sec_parse-&gt;data;</div><div class='add'>+	sec-&gt;size = size - sizeof(sec_parse-&gt;offset);</div><div class='ctx'> </div><div class='ctx'> 	++img-&gt;sec_counter;</div><div class='ctx'> </div><div class='hunk'>@@ -414,9 +421,6 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv,</div><div class='ctx'> 	struct iwl_ucode_tlv *tlv;</div><div class='ctx'> 	size_t len = ucode_raw-&gt;size;</div><div class='ctx'> 	const u8 *data;</div><div class='del'>-	int wanted_alternative = iwlagn_mod_params.wanted_ucode_alternative;</div><div class='del'>-	int tmp;</div><div class='del'>-	u64 alternatives;</div><div class='ctx'> 	u32 tlv_len;</div><div class='ctx'> 	enum iwl_ucode_tlv_type tlv_type;</div><div class='ctx'> 	const u8 *tlv_data;</div><div class='hunk'>@@ -434,23 +438,6 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Check which alternatives are present, and "downgrade"</div><div class='del'>-	 * when the chosen alternative is not present, warning</div><div class='del'>-	 * the user when that happens. Some files may not have</div><div class='del'>-	 * any alternatives, so don't warn in that case.</div><div class='del'>-	 */</div><div class='del'>-	alternatives = le64_to_cpu(ucode-&gt;alternatives);</div><div class='del'>-	tmp = wanted_alternative;</div><div class='del'>-	if (wanted_alternative &gt; 63)</div><div class='del'>-		wanted_alternative = 63;</div><div class='del'>-	while (wanted_alternative &amp;&amp; !(alternatives &amp; BIT(wanted_alternative)))</div><div class='del'>-		wanted_alternative--;</div><div class='del'>-	if (wanted_alternative &amp;&amp; wanted_alternative != tmp)</div><div class='del'>-		IWL_WARN(drv,</div><div class='del'>-			 "uCode alternative %d not available, choosing %d\n",</div><div class='del'>-			 tmp, wanted_alternative);</div><div class='del'>-</div><div class='ctx'> 	drv-&gt;fw.ucode_ver = le32_to_cpu(ucode-&gt;ver);</div><div class='ctx'> 	build = le32_to_cpu(ucode-&gt;build);</div><div class='ctx'> </div><div class='hunk'>@@ -475,14 +462,11 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv,</div><div class='ctx'> 	len -= sizeof(*ucode);</div><div class='ctx'> </div><div class='ctx'> 	while (len &gt;= sizeof(*tlv)) {</div><div class='del'>-		u16 tlv_alt;</div><div class='del'>-</div><div class='ctx'> 		len -= sizeof(*tlv);</div><div class='ctx'> 		tlv = (void *)data;</div><div class='ctx'> </div><div class='ctx'> 		tlv_len = le32_to_cpu(tlv-&gt;length);</div><div class='del'>-		tlv_type = le16_to_cpu(tlv-&gt;type);</div><div class='del'>-		tlv_alt = le16_to_cpu(tlv-&gt;alternative);</div><div class='add'>+		tlv_type = le32_to_cpu(tlv-&gt;type);</div><div class='ctx'> 		tlv_data = tlv-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 		if (len &lt; tlv_len) {</div><div class='hunk'>@@ -493,14 +477,6 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv,</div><div class='ctx'> 		len -= ALIGN(tlv_len, 4);</div><div class='ctx'> 		data += sizeof(*tlv) + ALIGN(tlv_len, 4);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Alternative 0 is always valid.</div><div class='del'>-		 *</div><div class='del'>-		 * Skip alternative TLVs that are not selected.</div><div class='del'>-		 */</div><div class='del'>-		if (tlv_alt != 0 &amp;&amp; tlv_alt != wanted_alternative)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='ctx'> 		switch (tlv_type) {</div><div class='ctx'> 		case IWL_UCODE_TLV_INST:</div><div class='ctx'> 			set_sec_data(pieces, IWL_UCODE_REGULAR,</div><div class='hunk'>@@ -681,17 +657,17 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv,</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int alloc_pci_desc(struct iwl_drv *drv,</div><div class='del'>-			  struct iwl_firmware_pieces *pieces,</div><div class='del'>-			  enum iwl_ucode_type type)</div><div class='add'>+static int iwl_alloc_ucode(struct iwl_drv *drv,</div><div class='add'>+			   struct iwl_firmware_pieces *pieces,</div><div class='add'>+			   enum iwl_ucode_type type)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	for (i = 0;</div><div class='ctx'> 	     i &lt; IWL_UCODE_SECTION_MAX &amp;&amp; get_sec_size(pieces, type, i);</div><div class='ctx'> 	     i++)</div><div class='ctx'> 		if (iwl_alloc_fw_desc(drv, &amp;(drv-&gt;fw.img[type].sec[i]),</div><div class='del'>-						get_sec(pieces, type, i)))</div><div class='del'>-			return -1;</div><div class='add'>+				      get_sec(pieces, type, i)))</div><div class='add'>+			return -ENOMEM;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -755,14 +731,13 @@ static int validate_sec_sizes(struct iwl_drv *drv,</div><div class='ctx'> static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_drv *drv = context;</div><div class='del'>-	const struct iwl_cfg *cfg = cfg(drv);</div><div class='ctx'> 	struct iwl_fw *fw = &amp;drv-&gt;fw;</div><div class='ctx'> 	struct iwl_ucode_header *ucode;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct iwl_firmware_pieces pieces;</div><div class='del'>-	const unsigned int api_max = cfg-&gt;ucode_api_max;</div><div class='del'>-	unsigned int api_ok = cfg-&gt;ucode_api_ok;</div><div class='del'>-	const unsigned int api_min = cfg-&gt;ucode_api_min;</div><div class='add'>+	const unsigned int api_max = drv-&gt;cfg-&gt;ucode_api_max;</div><div class='add'>+	unsigned int api_ok = drv-&gt;cfg-&gt;ucode_api_ok;</div><div class='add'>+	const unsigned int api_min = drv-&gt;cfg-&gt;ucode_api_min;</div><div class='ctx'> 	u32 api_ver;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -838,46 +813,10 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)</div><div class='ctx'> 	IWL_INFO(drv, "loaded firmware version %s", drv-&gt;fw.fw_version);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * For any of the failures below (before allocating pci memory)</div><div class='del'>-	 * we will try to load a version with a smaller API -- maybe the</div><div class='del'>-	 * user just got a corrupted version of the latest API.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	IWL_DEBUG_INFO(drv, "f/w package hdr ucode version raw = 0x%x\n",</div><div class='del'>-		       drv-&gt;fw.ucode_ver);</div><div class='del'>-	IWL_DEBUG_INFO(drv, "f/w package hdr runtime inst size = %Zd\n",</div><div class='del'>-		get_sec_size(&amp;pieces, IWL_UCODE_REGULAR,</div><div class='del'>-			     IWL_UCODE_SECTION_INST));</div><div class='del'>-	IWL_DEBUG_INFO(drv, "f/w package hdr runtime data size = %Zd\n",</div><div class='del'>-		get_sec_size(&amp;pieces, IWL_UCODE_REGULAR,</div><div class='del'>-			     IWL_UCODE_SECTION_DATA));</div><div class='del'>-	IWL_DEBUG_INFO(drv, "f/w package hdr init inst size = %Zd\n",</div><div class='del'>-		get_sec_size(&amp;pieces, IWL_UCODE_INIT, IWL_UCODE_SECTION_INST));</div><div class='del'>-	IWL_DEBUG_INFO(drv, "f/w package hdr init data size = %Zd\n",</div><div class='del'>-		get_sec_size(&amp;pieces, IWL_UCODE_INIT, IWL_UCODE_SECTION_DATA));</div><div class='del'>-</div><div class='del'>-	/* Verify that uCode images will fit in card's SRAM */</div><div class='del'>-	if (get_sec_size(&amp;pieces, IWL_UCODE_REGULAR, IWL_UCODE_SECTION_INST) &gt;</div><div class='del'>-							cfg-&gt;max_inst_size) {</div><div class='del'>-		IWL_ERR(drv, "uCode instr len %Zd too large to fit in\n",</div><div class='del'>-			get_sec_size(&amp;pieces, IWL_UCODE_REGULAR,</div><div class='del'>-				     IWL_UCODE_SECTION_INST));</div><div class='del'>-		goto try_again;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (get_sec_size(&amp;pieces, IWL_UCODE_REGULAR, IWL_UCODE_SECTION_DATA) &gt;</div><div class='del'>-							cfg-&gt;max_data_size) {</div><div class='del'>-		IWL_ERR(drv, "uCode data len %Zd too large to fit in\n",</div><div class='del'>-			get_sec_size(&amp;pieces, IWL_UCODE_REGULAR,</div><div class='del'>-				     IWL_UCODE_SECTION_DATA));</div><div class='del'>-		goto try_again;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * In mvm uCode there is no difference between data and instructions</div><div class='ctx'> 	 * sections.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!fw-&gt;mvm_fw &amp;&amp; validate_sec_sizes(drv, &amp;pieces, cfg))</div><div class='add'>+	if (!fw-&gt;mvm_fw &amp;&amp; validate_sec_sizes(drv, &amp;pieces, drv-&gt;cfg))</div><div class='ctx'> 		goto try_again;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate ucode buffers for card's bus-master loading ... */</div><div class='hunk'>@@ -886,8 +825,8 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)</div><div class='ctx'> 	 * 1) unmodified from disk</div><div class='ctx'> 	 * 2) backup cache for save/restore during power-downs */</div><div class='ctx'> 	for (i = 0; i &lt; IWL_UCODE_TYPE_MAX; i++)</div><div class='del'>-		if (alloc_pci_desc(drv, &amp;pieces, i))</div><div class='del'>-			goto err_pci_alloc;</div><div class='add'>+		if (iwl_alloc_ucode(drv, &amp;pieces, i))</div><div class='add'>+			goto out_free_fw;</div><div class='ctx'> </div><div class='ctx'> 	/* Now that we can no longer fail, copy information */</div><div class='ctx'> </div><div class='hunk'>@@ -901,14 +840,14 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)</div><div class='ctx'> 		fw-&gt;init_evtlog_size = (pieces.init_evtlog_size - 16)/12;</div><div class='ctx'> 	else</div><div class='ctx'> 		fw-&gt;init_evtlog_size =</div><div class='del'>-			cfg-&gt;base_params-&gt;max_event_log_size;</div><div class='add'>+			drv-&gt;cfg-&gt;base_params-&gt;max_event_log_size;</div><div class='ctx'> 	fw-&gt;init_errlog_ptr = pieces.init_errlog_ptr;</div><div class='ctx'> 	fw-&gt;inst_evtlog_ptr = pieces.inst_evtlog_ptr;</div><div class='ctx'> 	if (pieces.inst_evtlog_size)</div><div class='ctx'> 		fw-&gt;inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;</div><div class='ctx'> 	else</div><div class='ctx'> 		fw-&gt;inst_evtlog_size =</div><div class='del'>-			cfg-&gt;base_params-&gt;max_event_log_size;</div><div class='add'>+			drv-&gt;cfg-&gt;base_params-&gt;max_event_log_size;</div><div class='ctx'> 	fw-&gt;inst_errlog_ptr = pieces.inst_errlog_ptr;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -924,10 +863,10 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)</div><div class='ctx'> 	release_firmware(ucode_raw);</div><div class='ctx'> 	complete(&amp;drv-&gt;request_firmware_complete);</div><div class='ctx'> </div><div class='del'>-	drv-&gt;op_mode = iwl_dvm_ops.start(drv-&gt;shrd-&gt;trans, &amp;drv-&gt;fw);</div><div class='add'>+	drv-&gt;op_mode = iwl_dvm_ops.start(drv-&gt;trans, drv-&gt;cfg, &amp;drv-&gt;fw);</div><div class='ctx'> </div><div class='ctx'> 	if (!drv-&gt;op_mode)</div><div class='del'>-		goto out_unbind;</div><div class='add'>+		goto out_free_fw;</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='hunk'>@@ -938,48 +877,44 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)</div><div class='ctx'> 		goto out_unbind;</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='del'>- err_pci_alloc:</div><div class='add'>+ out_free_fw:</div><div class='ctx'> 	IWL_ERR(drv, "failed to allocate pci memory\n");</div><div class='ctx'> 	iwl_dealloc_ucode(drv);</div><div class='ctx'> 	release_firmware(ucode_raw);</div><div class='ctx'>  out_unbind:</div><div class='ctx'> 	complete(&amp;drv-&gt;request_firmware_complete);</div><div class='del'>-	device_release_driver(trans(drv)-&gt;dev);</div><div class='add'>+	device_release_driver(drv-&gt;trans-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int iwl_drv_start(struct iwl_shared *shrd,</div><div class='del'>-		  struct iwl_trans *trans, const struct iwl_cfg *cfg)</div><div class='add'>+struct iwl_drv *iwl_drv_start(struct iwl_trans *trans,</div><div class='add'>+			      const struct iwl_cfg *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_drv *drv;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	shrd-&gt;cfg = cfg;</div><div class='del'>-</div><div class='ctx'> 	drv = kzalloc(sizeof(*drv), GFP_KERNEL);</div><div class='del'>-	if (!drv) {</div><div class='del'>-		dev_printk(KERN_ERR, trans-&gt;dev, "Couldn't allocate iwl_drv");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	drv-&gt;shrd = shrd;</div><div class='del'>-	shrd-&gt;drv = drv;</div><div class='add'>+	if (!drv)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	drv-&gt;trans = trans;</div><div class='add'>+	drv-&gt;dev = trans-&gt;dev;</div><div class='add'>+	drv-&gt;cfg = cfg;</div><div class='ctx'> </div><div class='ctx'> 	init_completion(&amp;drv-&gt;request_firmware_complete);</div><div class='ctx'> </div><div class='ctx'> 	ret = iwl_request_firmware(drv, true);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='del'>-		dev_printk(KERN_ERR, trans-&gt;dev, "Couldn't request the fw");</div><div class='add'>+		IWL_ERR(trans, "Couldn't request the fw\n");</div><div class='ctx'> 		kfree(drv);</div><div class='del'>-		shrd-&gt;drv = NULL;</div><div class='add'>+		drv = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return drv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void iwl_drv_stop(struct iwl_shared *shrd)</div><div class='add'>+void iwl_drv_stop(struct iwl_drv *drv)</div><div class='ctx'> {</div><div class='del'>-	struct iwl_drv *drv = shrd-&gt;drv;</div><div class='del'>-</div><div class='ctx'> 	wait_for_completion(&amp;drv-&gt;request_firmware_complete);</div><div class='ctx'> </div><div class='ctx'> 	/* op_mode can be NULL if its start failed */</div><div class='hunk'>@@ -989,5 +924,95 @@ void iwl_drv_stop(struct iwl_shared *shrd)</div><div class='ctx'> 	iwl_dealloc_ucode(drv);</div><div class='ctx'> </div><div class='ctx'> 	kfree(drv);</div><div class='del'>-	shrd-&gt;drv = NULL;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* shared module parameters */</div><div class='add'>+struct iwl_mod_params iwlwifi_mod_params = {</div><div class='add'>+	.amsdu_size_8K = 1,</div><div class='add'>+	.restart_fw = 1,</div><div class='add'>+	.plcp_check = true,</div><div class='add'>+	.bt_coex_active = true,</div><div class='add'>+	.power_level = IWL_POWER_INDEX_1,</div><div class='add'>+	.bt_ch_announce = true,</div><div class='add'>+	.auto_agg = true,</div><div class='add'>+	/* the rest are 0 by default */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IWLWIFI_DEBUG</div><div class='add'>+module_param_named(debug, iwlwifi_mod_params.debug_level, uint,</div><div class='add'>+		   S_IRUGO | S_IWUSR);</div><div class='add'>+MODULE_PARM_DESC(debug, "debug output mask");</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+module_param_named(swcrypto, iwlwifi_mod_params.sw_crypto, int, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");</div><div class='add'>+module_param_named(11n_disable, iwlwifi_mod_params.disable_11n, uint, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(11n_disable,</div><div class='add'>+	"disable 11n functionality, bitmap: 1: full, 2: agg TX, 4: agg RX");</div><div class='add'>+module_param_named(amsdu_size_8K, iwlwifi_mod_params.amsdu_size_8K,</div><div class='add'>+		   int, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");</div><div class='add'>+module_param_named(fw_restart, iwlwifi_mod_params.restart_fw, int, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");</div><div class='add'>+</div><div class='add'>+module_param_named(antenna_coupling, iwlwifi_mod_params.ant_coupling,</div><div class='add'>+		   int, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(antenna_coupling,</div><div class='add'>+		 "specify antenna coupling in dB (defualt: 0 dB)");</div><div class='add'>+</div><div class='add'>+module_param_named(bt_ch_inhibition, iwlwifi_mod_params.bt_ch_announce,</div><div class='add'>+		   bool, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(bt_ch_inhibition,</div><div class='add'>+		 "Enable BT channel inhibition (default: enable)");</div><div class='add'>+</div><div class='add'>+module_param_named(plcp_check, iwlwifi_mod_params.plcp_check, bool, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");</div><div class='add'>+</div><div class='add'>+module_param_named(wd_disable, iwlwifi_mod_params.wd_disable, int, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(wd_disable,</div><div class='add'>+		"Disable stuck queue watchdog timer 0=system default, "</div><div class='add'>+		"1=disable, 2=enable (default: 0)");</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * set bt_coex_active to true, uCode will do kill/defer</div><div class='add'>+ * every time the priority line is asserted (BT is sending signals on the</div><div class='add'>+ * priority line in the PCIx).</div><div class='add'>+ * set bt_coex_active to false, uCode will ignore the BT activity and</div><div class='add'>+ * perform the normal operation</div><div class='add'>+ *</div><div class='add'>+ * User might experience transmit issue on some platform due to WiFi/BT</div><div class='add'>+ * co-exist problem. The possible behaviors are:</div><div class='add'>+ *   Able to scan and finding all the available AP</div><div class='add'>+ *   Not able to associate with any AP</div><div class='add'>+ * On those platforms, WiFi communication can be restored by set</div><div class='add'>+ * "bt_coex_active" module parameter to "false"</div><div class='add'>+ *</div><div class='add'>+ * default: bt_coex_active = true (BT_COEX_ENABLE)</div><div class='add'>+ */</div><div class='add'>+module_param_named(bt_coex_active, iwlwifi_mod_params.bt_coex_active,</div><div class='add'>+		bool, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(bt_coex_active, "enable wifi/bt co-exist (default: enable)");</div><div class='add'>+</div><div class='add'>+module_param_named(led_mode, iwlwifi_mod_params.led_mode, int, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(led_mode, "0=system default, "</div><div class='add'>+		"1=On(RF On)/Off(RF Off), 2=blinking, 3=Off (default: 0)");</div><div class='add'>+</div><div class='add'>+module_param_named(power_save, iwlwifi_mod_params.power_save,</div><div class='add'>+		bool, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(power_save,</div><div class='add'>+		 "enable WiFi power management (default: disable)");</div><div class='add'>+</div><div class='add'>+module_param_named(power_level, iwlwifi_mod_params.power_level,</div><div class='add'>+		int, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(power_level,</div><div class='add'>+		 "default power save level (range from 1 - 5, default: 1)");</div><div class='add'>+</div><div class='add'>+module_param_named(auto_agg, iwlwifi_mod_params.auto_agg,</div><div class='add'>+		bool, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(auto_agg,</div><div class='add'>+		 "enable agg w/o check traffic load (default: enable)");</div><div class='add'>+</div><div class='add'>+module_param_named(5ghz_disable, iwlwifi_mod_params.disable_5ghz,</div><div class='add'>+		bool, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(5ghz_disable, "disable 5GHz band (default: 0 [enabled])");</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-drv.h b/drivers/net/wireless/iwlwifi/iwl-drv.h<br/>index 3b771c1d9096..2cbf137b25bf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-drv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-drv.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-drv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-drv.h</a></div><div class='hunk'>@@ -63,7 +63,12 @@</div><div class='ctx'> #ifndef __iwl_drv_h__</div><div class='ctx'> #define __iwl_drv_h__</div><div class='ctx'> </div><div class='del'>-#include "iwl-shared.h"</div><div class='add'>+/* for all modules */</div><div class='add'>+#define DRV_NAME        "iwlwifi"</div><div class='add'>+#define IWLWIFI_VERSION "in-tree:"</div><div class='add'>+#define DRV_COPYRIGHT	"Copyright(c) 2003-2012 Intel Corporation"</div><div class='add'>+#define DRV_AUTHOR     "&lt;ilw@linux.intel.com&gt;"</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * DOC: Driver system flows - drv component</div><div class='hunk'>@@ -90,34 +95,32 @@</div><div class='ctx'>  * 8) iwl_ucode_callback starts the wifi implementation to matches the fw</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+struct iwl_drv;</div><div class='add'>+struct iwl_trans;</div><div class='add'>+struct iwl_cfg;</div><div class='ctx'> /**</div><div class='ctx'>  * iwl_drv_start - start the drv</div><div class='ctx'>  *</div><div class='del'>- * @shrd: the shrd area</div><div class='ctx'>  * @trans_ops: the ops of the transport</div><div class='ctx'>  * @cfg: device specific constants / virtual functions</div><div class='ctx'>  *</div><div class='del'>- * TODO: review the parameters given to this function</div><div class='del'>- *</div><div class='ctx'>  * starts the driver: fetches the firmware. This should be called by bus</div><div class='ctx'>  * specific system flows implementations. For example, the bus specific probe</div><div class='ctx'>  * function should do bus related operations only, and then call to this</div><div class='del'>- * function.</div><div class='add'>+ * function. It returns the driver object or %NULL if an error occured.</div><div class='ctx'>  */</div><div class='del'>-int iwl_drv_start(struct iwl_shared *shrd,</div><div class='del'>-		  struct iwl_trans *trans, const struct iwl_cfg *cfg);</div><div class='add'>+struct iwl_drv *iwl_drv_start(struct iwl_trans *trans,</div><div class='add'>+			      const struct iwl_cfg *cfg);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * iwl_drv_stop - stop the drv</div><div class='ctx'>  *</div><div class='del'>- * @shrd: the shrd area</div><div class='del'>- *</div><div class='del'>- * TODO: review the parameters given to this function</div><div class='add'>+ * @drv:</div><div class='ctx'>  *</div><div class='ctx'>  * Stop the driver. This should be called by bus specific system flows</div><div class='ctx'>  * implementations. For example, the bus specific remove function should first</div><div class='ctx'>  * call this function and then do the bus related operations only.</div><div class='ctx'>  */</div><div class='del'>-void iwl_drv_stop(struct iwl_shared *shrd);</div><div class='add'>+void iwl_drv_stop(struct iwl_drv *drv);</div><div class='ctx'> </div><div class='ctx'> #endif /* __iwl_drv_h__ */</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c<br/>index 23cea42b9495..50c58911e718 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-eeprom.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-eeprom.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-eeprom.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-eeprom.c</a></div><div class='hunk'>@@ -68,9 +68,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/mac80211.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "iwl-commands.h"</div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-debug.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='ctx'> #include "iwl-eeprom.h"</div><div class='hunk'>@@ -187,33 +185,33 @@ static void iwl_eeprom_release_semaphore(struct iwl_trans *trans)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwl_eeprom_verify_signature(struct iwl_trans *trans)</div><div class='add'>+static int iwl_eeprom_verify_signature(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	u32 gp = iwl_read32(trans, CSR_EEPROM_GP) &amp;</div><div class='add'>+	u32 gp = iwl_read32(priv-&gt;trans, CSR_EEPROM_GP) &amp;</div><div class='ctx'> 			   CSR_EEPROM_GP_VALID_MSK;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	IWL_DEBUG_EEPROM(trans, "EEPROM signature=0x%08x\n", gp);</div><div class='add'>+	IWL_DEBUG_EEPROM(priv, "EEPROM signature=0x%08x\n", gp);</div><div class='ctx'> 	switch (gp) {</div><div class='ctx'> 	case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP:</div><div class='del'>-		if (trans-&gt;nvm_device_type != NVM_DEVICE_TYPE_OTP) {</div><div class='del'>-			IWL_ERR(trans, "EEPROM with bad signature: 0x%08x\n",</div><div class='add'>+		if (priv-&gt;nvm_device_type != NVM_DEVICE_TYPE_OTP) {</div><div class='add'>+			IWL_ERR(priv, "EEPROM with bad signature: 0x%08x\n",</div><div class='ctx'> 				gp);</div><div class='ctx'> 			ret = -ENOENT;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:</div><div class='ctx'> 	case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:</div><div class='del'>-		if (trans-&gt;nvm_device_type != NVM_DEVICE_TYPE_EEPROM) {</div><div class='del'>-			IWL_ERR(trans, "OTP with bad signature: 0x%08x\n", gp);</div><div class='add'>+		if (priv-&gt;nvm_device_type != NVM_DEVICE_TYPE_EEPROM) {</div><div class='add'>+			IWL_ERR(priv, "OTP with bad signature: 0x%08x\n", gp);</div><div class='ctx'> 			ret = -ENOENT;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP:</div><div class='ctx'> 	default:</div><div class='del'>-		IWL_ERR(trans, "bad EEPROM/OTP signature, type=%s, "</div><div class='add'>+		IWL_ERR(priv, "bad EEPROM/OTP signature, type=%s, "</div><div class='ctx'> 			"EEPROM_GP=0x%08x\n",</div><div class='del'>-			(trans-&gt;nvm_device_type == NVM_DEVICE_TYPE_OTP)</div><div class='add'>+			(priv-&gt;nvm_device_type == NVM_DEVICE_TYPE_OTP)</div><div class='ctx'> 			? "OTP" : "EEPROM", gp);</div><div class='ctx'> 		ret = -ENOENT;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -221,11 +219,11 @@ static int iwl_eeprom_verify_signature(struct iwl_trans *trans)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u16 iwl_eeprom_query16(const struct iwl_shared *shrd, size_t offset)</div><div class='add'>+u16 iwl_eeprom_query16(struct iwl_priv *priv, size_t offset)</div><div class='ctx'> {</div><div class='del'>-	if (!shrd-&gt;eeprom)</div><div class='add'>+	if (!priv-&gt;eeprom)</div><div class='ctx'> 		return 0;</div><div class='del'>-	return (u16)shrd-&gt;eeprom[offset] | ((u16)shrd-&gt;eeprom[offset + 1] &lt;&lt; 8);</div><div class='add'>+	return (u16)priv-&gt;eeprom[offset] | ((u16)priv-&gt;eeprom[offset + 1] &lt;&lt; 8);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int iwl_eeprom_check_version(struct iwl_priv *priv)</div><div class='hunk'>@@ -233,11 +231,11 @@ int iwl_eeprom_check_version(struct iwl_priv *priv)</div><div class='ctx'> 	u16 eeprom_ver;</div><div class='ctx'> 	u16 calib_ver;</div><div class='ctx'> </div><div class='del'>-	eeprom_ver = iwl_eeprom_query16(priv-&gt;shrd, EEPROM_VERSION);</div><div class='del'>-	calib_ver = iwl_eeprom_calib_version(priv-&gt;shrd);</div><div class='add'>+	eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);</div><div class='add'>+	calib_ver = iwl_eeprom_calib_version(priv);</div><div class='ctx'> </div><div class='del'>-	if (eeprom_ver &lt; cfg(priv)-&gt;eeprom_ver ||</div><div class='del'>-	    calib_ver &lt; cfg(priv)-&gt;eeprom_calib_ver)</div><div class='add'>+	if (eeprom_ver &lt; priv-&gt;cfg-&gt;eeprom_ver ||</div><div class='add'>+	    calib_ver &lt; priv-&gt;cfg-&gt;eeprom_calib_ver)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='ctx'> 	IWL_INFO(priv, "device EEPROM VER=0x%x, CALIB=0x%x\n",</div><div class='hunk'>@@ -247,58 +245,115 @@ int iwl_eeprom_check_version(struct iwl_priv *priv)</div><div class='ctx'> err:</div><div class='ctx'> 	IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x &lt; 0x%x "</div><div class='ctx'> 		  "CALIB=0x%x &lt; 0x%x\n",</div><div class='del'>-		  eeprom_ver, cfg(priv)-&gt;eeprom_ver,</div><div class='del'>-		  calib_ver,  cfg(priv)-&gt;eeprom_calib_ver);</div><div class='add'>+		  eeprom_ver, priv-&gt;cfg-&gt;eeprom_ver,</div><div class='add'>+		  calib_ver,  priv-&gt;cfg-&gt;eeprom_calib_ver);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int iwl_eeprom_init_hw_params(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct iwl_shared *shrd = priv-&gt;shrd;</div><div class='ctx'> 	u16 radio_cfg;</div><div class='ctx'> </div><div class='del'>-	hw_params(priv).sku = iwl_eeprom_query16(shrd, EEPROM_SKU_CAP);</div><div class='del'>-	if (hw_params(priv).sku &amp; EEPROM_SKU_CAP_11N_ENABLE &amp;&amp;</div><div class='del'>-	    !cfg(priv)-&gt;ht_params) {</div><div class='add'>+	priv-&gt;hw_params.sku = iwl_eeprom_query16(priv, EEPROM_SKU_CAP);</div><div class='add'>+	if (priv-&gt;hw_params.sku &amp; EEPROM_SKU_CAP_11N_ENABLE &amp;&amp;</div><div class='add'>+	    !priv-&gt;cfg-&gt;ht_params) {</div><div class='ctx'> 		IWL_ERR(priv, "Invalid 11n configuration\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!hw_params(priv).sku) {</div><div class='add'>+	if (!priv-&gt;hw_params.sku) {</div><div class='ctx'> 		IWL_ERR(priv, "Invalid device sku\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	IWL_INFO(priv, "Device SKU: 0x%X\n", hw_params(priv).sku);</div><div class='add'>+	IWL_INFO(priv, "Device SKU: 0x%X\n", priv-&gt;hw_params.sku);</div><div class='ctx'> </div><div class='del'>-	radio_cfg = iwl_eeprom_query16(shrd, EEPROM_RADIO_CONFIG);</div><div class='add'>+	radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);</div><div class='ctx'> </div><div class='del'>-	hw_params(priv).valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);</div><div class='del'>-	hw_params(priv).valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);</div><div class='add'>+	priv-&gt;hw_params.valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);</div><div class='add'>+	priv-&gt;hw_params.valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);</div><div class='ctx'> </div><div class='ctx'> 	/* check overrides (some devices have wrong EEPROM) */</div><div class='del'>-	if (cfg(priv)-&gt;valid_tx_ant)</div><div class='del'>-		hw_params(priv).valid_tx_ant = cfg(priv)-&gt;valid_tx_ant;</div><div class='del'>-	if (cfg(priv)-&gt;valid_rx_ant)</div><div class='del'>-		hw_params(priv).valid_rx_ant = cfg(priv)-&gt;valid_rx_ant;</div><div class='add'>+	if (priv-&gt;cfg-&gt;valid_tx_ant)</div><div class='add'>+		priv-&gt;hw_params.valid_tx_ant = priv-&gt;cfg-&gt;valid_tx_ant;</div><div class='add'>+	if (priv-&gt;cfg-&gt;valid_rx_ant)</div><div class='add'>+		priv-&gt;hw_params.valid_rx_ant = priv-&gt;cfg-&gt;valid_rx_ant;</div><div class='ctx'> </div><div class='del'>-	if (!hw_params(priv).valid_tx_ant || !hw_params(priv).valid_rx_ant) {</div><div class='add'>+	if (!priv-&gt;hw_params.valid_tx_ant || !priv-&gt;hw_params.valid_rx_ant) {</div><div class='ctx'> 		IWL_ERR(priv, "Invalid chain (0x%X, 0x%X)\n",</div><div class='del'>-			hw_params(priv).valid_tx_ant,</div><div class='del'>-			hw_params(priv).valid_rx_ant);</div><div class='add'>+			priv-&gt;hw_params.valid_tx_ant,</div><div class='add'>+			priv-&gt;hw_params.valid_rx_ant);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	IWL_INFO(priv, "Valid Tx ant: 0x%X, Valid Rx ant: 0x%X\n",</div><div class='del'>-		 hw_params(priv).valid_tx_ant, hw_params(priv).valid_rx_ant);</div><div class='add'>+		 priv-&gt;hw_params.valid_tx_ant, priv-&gt;hw_params.valid_rx_ant);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void iwl_eeprom_get_mac(const struct iwl_shared *shrd, u8 *mac)</div><div class='add'>+u16 iwl_eeprom_calib_version(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	const u8 *addr = iwl_eeprom_query_addr(shrd,</div><div class='add'>+	struct iwl_eeprom_calib_hdr *hdr;</div><div class='add'>+</div><div class='add'>+	hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,</div><div class='add'>+							EEPROM_CALIB_ALL);</div><div class='add'>+	return hdr-&gt;version;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 eeprom_indirect_address(struct iwl_priv *priv, u32 address)</div><div class='add'>+{</div><div class='add'>+	u16 offset = 0;</div><div class='add'>+</div><div class='add'>+	if ((address &amp; INDIRECT_ADDRESS) == 0)</div><div class='add'>+		return address;</div><div class='add'>+</div><div class='add'>+	switch (address &amp; INDIRECT_TYPE_MSK) {</div><div class='add'>+	case INDIRECT_HOST:</div><div class='add'>+		offset = iwl_eeprom_query16(priv, EEPROM_LINK_HOST);</div><div class='add'>+		break;</div><div class='add'>+	case INDIRECT_GENERAL:</div><div class='add'>+		offset = iwl_eeprom_query16(priv, EEPROM_LINK_GENERAL);</div><div class='add'>+		break;</div><div class='add'>+	case INDIRECT_REGULATORY:</div><div class='add'>+		offset = iwl_eeprom_query16(priv, EEPROM_LINK_REGULATORY);</div><div class='add'>+		break;</div><div class='add'>+	case INDIRECT_TXP_LIMIT:</div><div class='add'>+		offset = iwl_eeprom_query16(priv, EEPROM_LINK_TXP_LIMIT);</div><div class='add'>+		break;</div><div class='add'>+	case INDIRECT_TXP_LIMIT_SIZE:</div><div class='add'>+		offset = iwl_eeprom_query16(priv, EEPROM_LINK_TXP_LIMIT_SIZE);</div><div class='add'>+		break;</div><div class='add'>+	case INDIRECT_CALIBRATION:</div><div class='add'>+		offset = iwl_eeprom_query16(priv, EEPROM_LINK_CALIBRATION);</div><div class='add'>+		break;</div><div class='add'>+	case INDIRECT_PROCESS_ADJST:</div><div class='add'>+		offset = iwl_eeprom_query16(priv, EEPROM_LINK_PROCESS_ADJST);</div><div class='add'>+		break;</div><div class='add'>+	case INDIRECT_OTHERS:</div><div class='add'>+		offset = iwl_eeprom_query16(priv, EEPROM_LINK_OTHERS);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		IWL_ERR(priv, "illegal indirect type: 0x%X\n",</div><div class='add'>+		address &amp; INDIRECT_TYPE_MSK);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* translate the offset from words to byte */</div><div class='add'>+	return (address &amp; ADDRESS_MSK) + (offset &lt;&lt; 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const u8 *iwl_eeprom_query_addr(struct iwl_priv *priv, size_t offset)</div><div class='add'>+{</div><div class='add'>+	u32 address = eeprom_indirect_address(priv, offset);</div><div class='add'>+	BUG_ON(address &gt;= priv-&gt;cfg-&gt;base_params-&gt;eeprom_size);</div><div class='add'>+	return &amp;priv-&gt;eeprom[address];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void iwl_eeprom_get_mac(struct iwl_priv *priv, u8 *mac)</div><div class='add'>+{</div><div class='add'>+	const u8 *addr = iwl_eeprom_query_addr(priv,</div><div class='ctx'> 					EEPROM_MAC_ADDRESS);</div><div class='ctx'> 	memcpy(mac, addr, ETH_ALEN);</div><div class='ctx'> }</div><div class='hunk'>@@ -376,7 +431,7 @@ static int iwl_init_otp_access(struct iwl_trans *trans)</div><div class='ctx'> 		 * CSR auto clock gate disable bit -</div><div class='ctx'> 		 * this is only applicable for HW with OTP shadow RAM</div><div class='ctx'> 		 */</div><div class='del'>-		if (cfg(trans)-&gt;base_params-&gt;shadow_ram_support)</div><div class='add'>+		if (trans-&gt;cfg-&gt;base_params-&gt;shadow_ram_support)</div><div class='ctx'> 			iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,</div><div class='ctx'> 				CSR_RESET_LINK_PWR_MGMT_DISABLED);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -497,7 +552,7 @@ static int iwl_find_otp_image(struct iwl_trans *trans,</div><div class='ctx'> 		}</div><div class='ctx'> 		/* more in the link list, continue */</div><div class='ctx'> 		usedblocks++;</div><div class='del'>-	} while (usedblocks &lt;= cfg(trans)-&gt;base_params-&gt;max_ll_items);</div><div class='add'>+	} while (usedblocks &lt;= trans-&gt;cfg-&gt;base_params-&gt;max_ll_items);</div><div class='ctx'> </div><div class='ctx'> 	/* OTP has no valid blocks */</div><div class='ctx'> 	IWL_DEBUG_EEPROM(trans, "OTP has no valid blocks\n");</div><div class='hunk'>@@ -591,7 +646,6 @@ iwl_eeprom_enh_txp_read_element(struct iwl_priv *priv,</div><div class='ctx'> </div><div class='ctx'> static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct iwl_shared *shrd = priv-&gt;shrd;</div><div class='ctx'> 	struct iwl_eeprom_enhanced_txpwr *txp_array, *txp;</div><div class='ctx'> 	int idx, entries;</div><div class='ctx'> 	__le16 *txp_len;</div><div class='hunk'>@@ -600,10 +654,10 @@ static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)</div><div class='ctx'> 	BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8);</div><div class='ctx'> </div><div class='ctx'> 	/* the length is in 16-bit words, but we want entries */</div><div class='del'>-	txp_len = (__le16 *) iwl_eeprom_query_addr(shrd, EEPROM_TXP_SZ_OFFS);</div><div class='add'>+	txp_len = (__le16 *) iwl_eeprom_query_addr(priv, EEPROM_TXP_SZ_OFFS);</div><div class='ctx'> 	entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN;</div><div class='ctx'> </div><div class='del'>-	txp_array = (void *) iwl_eeprom_query_addr(shrd, EEPROM_TXP_OFFS);</div><div class='add'>+	txp_array = (void *) iwl_eeprom_query_addr(priv, EEPROM_TXP_OFFS);</div><div class='ctx'> </div><div class='ctx'> 	for (idx = 0; idx &lt; entries; idx++) {</div><div class='ctx'> 		txp = &amp;txp_array[idx];</div><div class='hunk'>@@ -637,7 +691,7 @@ static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)</div><div class='ctx'> 				 ((txp-&gt;delta_20_in_40 &amp; 0xf0) &gt;&gt; 4),</div><div class='ctx'> 				 (txp-&gt;delta_20_in_40 &amp; 0x0f));</div><div class='ctx'> </div><div class='del'>-		max_txp_avg = iwl_get_max_txpower_avg(cfg(priv), txp_array, idx,</div><div class='add'>+		max_txp_avg = iwl_get_max_txpower_avg(priv-&gt;cfg, txp_array, idx,</div><div class='ctx'> 						      &amp;max_txp_avg_halfdbm);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -656,66 +710,66 @@ static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)</div><div class='ctx'> /**</div><div class='ctx'>  * iwl_eeprom_init - read EEPROM contents</div><div class='ctx'>  *</div><div class='del'>- * Load the EEPROM contents from adapter into shrd-&gt;eeprom</div><div class='add'>+ * Load the EEPROM contents from adapter into priv-&gt;eeprom</div><div class='ctx'>  *</div><div class='ctx'>  * NOTE:  This routine uses the non-debug IO access functions.</div><div class='ctx'>  */</div><div class='del'>-int iwl_eeprom_init(struct iwl_trans *trans, u32 hw_rev)</div><div class='add'>+int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)</div><div class='ctx'> {</div><div class='ctx'> 	__le16 *e;</div><div class='del'>-	u32 gp = iwl_read32(trans, CSR_EEPROM_GP);</div><div class='add'>+	u32 gp = iwl_read32(priv-&gt;trans, CSR_EEPROM_GP);</div><div class='ctx'> 	int sz;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u16 addr;</div><div class='ctx'> 	u16 validblockaddr = 0;</div><div class='ctx'> 	u16 cache_addr = 0;</div><div class='ctx'> </div><div class='del'>-	trans-&gt;nvm_device_type = iwl_get_nvm_type(trans, hw_rev);</div><div class='del'>-	if (trans-&gt;nvm_device_type == -ENOENT)</div><div class='add'>+	priv-&gt;nvm_device_type = iwl_get_nvm_type(priv-&gt;trans, hw_rev);</div><div class='add'>+	if (priv-&gt;nvm_device_type == -ENOENT)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	/* allocate eeprom */</div><div class='del'>-	sz = cfg(trans)-&gt;base_params-&gt;eeprom_size;</div><div class='del'>-	IWL_DEBUG_EEPROM(trans, "NVM size = %d\n", sz);</div><div class='del'>-	trans-&gt;shrd-&gt;eeprom = kzalloc(sz, GFP_KERNEL);</div><div class='del'>-	if (!trans-&gt;shrd-&gt;eeprom) {</div><div class='add'>+	sz = priv-&gt;cfg-&gt;base_params-&gt;eeprom_size;</div><div class='add'>+	IWL_DEBUG_EEPROM(priv, "NVM size = %d\n", sz);</div><div class='add'>+	priv-&gt;eeprom = kzalloc(sz, GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;eeprom) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto alloc_err;</div><div class='ctx'> 	}</div><div class='del'>-	e = (__le16 *)trans-&gt;shrd-&gt;eeprom;</div><div class='add'>+	e = (__le16 *)priv-&gt;eeprom;</div><div class='ctx'> </div><div class='del'>-	ret = iwl_eeprom_verify_signature(trans);</div><div class='add'>+	ret = iwl_eeprom_verify_signature(priv);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		IWL_ERR(trans, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);</div><div class='add'>+		IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);</div><div class='ctx'> 		ret = -ENOENT;</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure driver (instead of uCode) is allowed to read EEPROM */</div><div class='del'>-	ret = iwl_eeprom_acquire_semaphore(trans);</div><div class='add'>+	ret = iwl_eeprom_acquire_semaphore(priv-&gt;trans);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		IWL_ERR(trans, "Failed to acquire EEPROM semaphore.\n");</div><div class='add'>+		IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");</div><div class='ctx'> 		ret = -ENOENT;</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (trans-&gt;nvm_device_type == NVM_DEVICE_TYPE_OTP) {</div><div class='add'>+	if (priv-&gt;nvm_device_type == NVM_DEVICE_TYPE_OTP) {</div><div class='ctx'> </div><div class='del'>-		ret = iwl_init_otp_access(trans);</div><div class='add'>+		ret = iwl_init_otp_access(priv-&gt;trans);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			IWL_ERR(trans, "Failed to initialize OTP access.\n");</div><div class='add'>+			IWL_ERR(priv, "Failed to initialize OTP access.\n");</div><div class='ctx'> 			ret = -ENOENT;</div><div class='ctx'> 			goto done;</div><div class='ctx'> 		}</div><div class='del'>-		iwl_write32(trans, CSR_EEPROM_GP,</div><div class='del'>-			    iwl_read32(trans, CSR_EEPROM_GP) &amp;</div><div class='add'>+		iwl_write32(priv-&gt;trans, CSR_EEPROM_GP,</div><div class='add'>+			    iwl_read32(priv-&gt;trans, CSR_EEPROM_GP) &amp;</div><div class='ctx'> 			    ~CSR_EEPROM_GP_IF_OWNER_MSK);</div><div class='ctx'> </div><div class='del'>-		iwl_set_bit(trans, CSR_OTP_GP_REG,</div><div class='add'>+		iwl_set_bit(priv-&gt;trans, CSR_OTP_GP_REG,</div><div class='ctx'> 			     CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |</div><div class='ctx'> 			     CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);</div><div class='ctx'> 		/* traversing the linked list if no shadow ram supported */</div><div class='del'>-		if (!cfg(trans)-&gt;base_params-&gt;shadow_ram_support) {</div><div class='del'>-			if (iwl_find_otp_image(trans, &amp;validblockaddr)) {</div><div class='add'>+		if (!priv-&gt;cfg-&gt;base_params-&gt;shadow_ram_support) {</div><div class='add'>+			if (iwl_find_otp_image(priv-&gt;trans, &amp;validblockaddr)) {</div><div class='ctx'> 				ret = -ENOENT;</div><div class='ctx'> 				goto done;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -724,7 +778,8 @@ int iwl_eeprom_init(struct iwl_trans *trans, u32 hw_rev)</div><div class='ctx'> 		     addr += sizeof(u16)) {</div><div class='ctx'> 			__le16 eeprom_data;</div><div class='ctx'> </div><div class='del'>-			ret = iwl_read_otp_word(trans, addr, &amp;eeprom_data);</div><div class='add'>+			ret = iwl_read_otp_word(priv-&gt;trans, addr,</div><div class='add'>+						&amp;eeprom_data);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				goto done;</div><div class='ctx'> 			e[cache_addr / 2] = eeprom_data;</div><div class='hunk'>@@ -735,94 +790,93 @@ int iwl_eeprom_init(struct iwl_trans *trans, u32 hw_rev)</div><div class='ctx'> 		for (addr = 0; addr &lt; sz; addr += sizeof(u16)) {</div><div class='ctx'> 			u32 r;</div><div class='ctx'> </div><div class='del'>-			iwl_write32(trans, CSR_EEPROM_REG,</div><div class='add'>+			iwl_write32(priv-&gt;trans, CSR_EEPROM_REG,</div><div class='ctx'> 				    CSR_EEPROM_REG_MSK_ADDR &amp; (addr &lt;&lt; 1));</div><div class='ctx'> </div><div class='del'>-			ret = iwl_poll_bit(trans, CSR_EEPROM_REG,</div><div class='add'>+			ret = iwl_poll_bit(priv-&gt;trans, CSR_EEPROM_REG,</div><div class='ctx'> 						  CSR_EEPROM_REG_READ_VALID_MSK,</div><div class='ctx'> 						  CSR_EEPROM_REG_READ_VALID_MSK,</div><div class='ctx'> 						  IWL_EEPROM_ACCESS_TIMEOUT);</div><div class='ctx'> 			if (ret &lt; 0) {</div><div class='del'>-				IWL_ERR(trans,</div><div class='add'>+				IWL_ERR(priv,</div><div class='ctx'> 					"Time out reading EEPROM[%d]\n", addr);</div><div class='ctx'> 				goto done;</div><div class='ctx'> 			}</div><div class='del'>-			r = iwl_read32(trans, CSR_EEPROM_REG);</div><div class='add'>+			r = iwl_read32(priv-&gt;trans, CSR_EEPROM_REG);</div><div class='ctx'> 			e[addr / 2] = cpu_to_le16(r &gt;&gt; 16);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	IWL_DEBUG_EEPROM(trans, "NVM Type: %s, version: 0x%x\n",</div><div class='del'>-		       (trans-&gt;nvm_device_type == NVM_DEVICE_TYPE_OTP)</div><div class='add'>+	IWL_DEBUG_EEPROM(priv, "NVM Type: %s, version: 0x%x\n",</div><div class='add'>+		       (priv-&gt;nvm_device_type == NVM_DEVICE_TYPE_OTP)</div><div class='ctx'> 		       ? "OTP" : "EEPROM",</div><div class='del'>-		       iwl_eeprom_query16(trans-&gt;shrd, EEPROM_VERSION));</div><div class='add'>+		       iwl_eeprom_query16(priv, EEPROM_VERSION));</div><div class='ctx'> </div><div class='ctx'> 	ret = 0;</div><div class='ctx'> done:</div><div class='del'>-	iwl_eeprom_release_semaphore(trans);</div><div class='add'>+	iwl_eeprom_release_semaphore(priv-&gt;trans);</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='ctx'> 	if (ret)</div><div class='del'>-		iwl_eeprom_free(trans-&gt;shrd);</div><div class='add'>+		iwl_eeprom_free(priv);</div><div class='ctx'> alloc_err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void iwl_eeprom_free(struct iwl_shared *shrd)</div><div class='add'>+void iwl_eeprom_free(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	kfree(shrd-&gt;eeprom);</div><div class='del'>-	shrd-&gt;eeprom = NULL;</div><div class='add'>+	kfree(priv-&gt;eeprom);</div><div class='add'>+	priv-&gt;eeprom = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_init_band_reference(const struct iwl_priv *priv,</div><div class='add'>+static void iwl_init_band_reference(struct iwl_priv *priv,</div><div class='ctx'> 			int eep_band, int *eeprom_ch_count,</div><div class='ctx'> 			const struct iwl_eeprom_channel **eeprom_ch_info,</div><div class='ctx'> 			const u8 **eeprom_ch_index)</div><div class='ctx'> {</div><div class='del'>-	struct iwl_shared *shrd = priv-&gt;shrd;</div><div class='del'>-	u32 offset = cfg(priv)-&gt;lib-&gt;</div><div class='add'>+	u32 offset = priv-&gt;lib-&gt;</div><div class='ctx'> 			eeprom_ops.regulatory_bands[eep_band - 1];</div><div class='ctx'> 	switch (eep_band) {</div><div class='ctx'> 	case 1:		/* 2.4GHz band */</div><div class='ctx'> 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);</div><div class='ctx'> 		*eeprom_ch_info = (struct iwl_eeprom_channel *)</div><div class='del'>-				iwl_eeprom_query_addr(shrd, offset);</div><div class='add'>+				iwl_eeprom_query_addr(priv, offset);</div><div class='ctx'> 		*eeprom_ch_index = iwl_eeprom_band_1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:		/* 4.9GHz band */</div><div class='ctx'> 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);</div><div class='ctx'> 		*eeprom_ch_info = (struct iwl_eeprom_channel *)</div><div class='del'>-				iwl_eeprom_query_addr(shrd, offset);</div><div class='add'>+				iwl_eeprom_query_addr(priv, offset);</div><div class='ctx'> 		*eeprom_ch_index = iwl_eeprom_band_2;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:		/* 5.2GHz band */</div><div class='ctx'> 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);</div><div class='ctx'> 		*eeprom_ch_info = (struct iwl_eeprom_channel *)</div><div class='del'>-				iwl_eeprom_query_addr(shrd, offset);</div><div class='add'>+				iwl_eeprom_query_addr(priv, offset);</div><div class='ctx'> 		*eeprom_ch_index = iwl_eeprom_band_3;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 4:		/* 5.5GHz band */</div><div class='ctx'> 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);</div><div class='ctx'> 		*eeprom_ch_info = (struct iwl_eeprom_channel *)</div><div class='del'>-				iwl_eeprom_query_addr(shrd, offset);</div><div class='add'>+				iwl_eeprom_query_addr(priv, offset);</div><div class='ctx'> 		*eeprom_ch_index = iwl_eeprom_band_4;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 5:		/* 5.7GHz band */</div><div class='ctx'> 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);</div><div class='ctx'> 		*eeprom_ch_info = (struct iwl_eeprom_channel *)</div><div class='del'>-				iwl_eeprom_query_addr(shrd, offset);</div><div class='add'>+				iwl_eeprom_query_addr(priv, offset);</div><div class='ctx'> 		*eeprom_ch_index = iwl_eeprom_band_5;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 6:		/* 2.4GHz ht40 channels */</div><div class='ctx'> 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);</div><div class='ctx'> 		*eeprom_ch_info = (struct iwl_eeprom_channel *)</div><div class='del'>-				iwl_eeprom_query_addr(shrd, offset);</div><div class='add'>+				iwl_eeprom_query_addr(priv, offset);</div><div class='ctx'> 		*eeprom_ch_index = iwl_eeprom_band_6;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 7:		/* 5 GHz ht40 channels */</div><div class='ctx'> 		*eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);</div><div class='ctx'> 		*eeprom_ch_info = (struct iwl_eeprom_channel *)</div><div class='del'>-				iwl_eeprom_query_addr(shrd, offset);</div><div class='add'>+				iwl_eeprom_query_addr(priv, offset);</div><div class='ctx'> 		*eeprom_ch_index = iwl_eeprom_band_7;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -987,9 +1041,9 @@ int iwl_init_channel_map(struct iwl_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check if we do have HT40 channels */</div><div class='del'>-	if (cfg(priv)-&gt;lib-&gt;eeprom_ops.regulatory_bands[5] ==</div><div class='add'>+	if (priv-&gt;lib-&gt;eeprom_ops.regulatory_bands[5] ==</div><div class='ctx'> 	    EEPROM_REGULATORY_BAND_NO_HT40 &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;lib-&gt;eeprom_ops.regulatory_bands[6] ==</div><div class='add'>+	    priv-&gt;lib-&gt;eeprom_ops.regulatory_bands[6] ==</div><div class='ctx'> 	    EEPROM_REGULATORY_BAND_NO_HT40)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1025,7 +1079,7 @@ int iwl_init_channel_map(struct iwl_priv *priv)</div><div class='ctx'> 	 * driver need to process addition information</div><div class='ctx'> 	 * to determine the max channel tx power limits</div><div class='ctx'> 	 */</div><div class='del'>-	if (cfg(priv)-&gt;lib-&gt;eeprom_ops.enhanced_txpower)</div><div class='add'>+	if (priv-&gt;lib-&gt;eeprom_ops.enhanced_txpower)</div><div class='ctx'> 		iwl_eeprom_enhanced_txpower(priv);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1072,11 +1126,11 @@ void iwl_rf_config(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	u16 radio_cfg;</div><div class='ctx'> </div><div class='del'>-	radio_cfg = iwl_eeprom_query16(priv-&gt;shrd, EEPROM_RADIO_CONFIG);</div><div class='add'>+	radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	/* write radio config values to register */</div><div class='ctx'> 	if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) &lt;= EEPROM_RF_CONFIG_TYPE_MAX) {</div><div class='del'>-		iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,</div><div class='add'>+		iwl_set_bit(priv-&gt;trans, CSR_HW_IF_CONFIG_REG,</div><div class='ctx'> 			    EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |</div><div class='ctx'> 			    EEPROM_RF_CFG_STEP_MSK(radio_cfg) |</div><div class='ctx'> 			    EEPROM_RF_CFG_DASH_MSK(radio_cfg));</div><div class='hunk'>@@ -1088,7 +1142,7 @@ void iwl_rf_config(struct iwl_priv *priv)</div><div class='ctx'> 		WARN_ON(1);</div><div class='ctx'> </div><div class='ctx'> 	/* set CSR_HW_CONFIG_REG for uCode use */</div><div class='del'>-	iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,</div><div class='add'>+	iwl_set_bit(priv-&gt;trans, CSR_HW_IF_CONFIG_REG,</div><div class='ctx'> 		    CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |</div><div class='ctx'> 		    CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h<br/>index e4a758340996..64bfd947caeb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-eeprom.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-eeprom.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-eeprom.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-eeprom.h</a></div><div class='hunk'>@@ -66,8 +66,6 @@</div><div class='ctx'> #include &lt;net/mac80211.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct iwl_priv;</div><div class='del'>-struct iwl_shared;</div><div class='del'>-struct iwl_trans;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * EEPROM access time values:</div><div class='hunk'>@@ -208,59 +206,6 @@ struct iwl_eeprom_calib_hdr {</div><div class='ctx'> /* 6000 regulatory - indirect access */</div><div class='ctx'> #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS  ((0x80)\</div><div class='ctx'> 		| INDIRECT_ADDRESS | INDIRECT_REGULATORY)   /* 14  bytes */</div><div class='del'>-</div><div class='del'>-/* 5000 Specific */</div><div class='del'>-#define EEPROM_5000_TX_POWER_VERSION    (4)</div><div class='del'>-#define EEPROM_5000_EEPROM_VERSION	(0x11A)</div><div class='del'>-</div><div class='del'>-/* 5050 Specific */</div><div class='del'>-#define EEPROM_5050_TX_POWER_VERSION    (4)</div><div class='del'>-#define EEPROM_5050_EEPROM_VERSION	(0x21E)</div><div class='del'>-</div><div class='del'>-/* 1000 Specific */</div><div class='del'>-#define EEPROM_1000_TX_POWER_VERSION    (4)</div><div class='del'>-#define EEPROM_1000_EEPROM_VERSION	(0x15C)</div><div class='del'>-</div><div class='del'>-/* 6x00 Specific */</div><div class='del'>-#define EEPROM_6000_TX_POWER_VERSION    (4)</div><div class='del'>-#define EEPROM_6000_EEPROM_VERSION	(0x423)</div><div class='del'>-</div><div class='del'>-/* 6x50 Specific */</div><div class='del'>-#define EEPROM_6050_TX_POWER_VERSION    (4)</div><div class='del'>-#define EEPROM_6050_EEPROM_VERSION	(0x532)</div><div class='del'>-</div><div class='del'>-/* 6150 Specific */</div><div class='del'>-#define EEPROM_6150_TX_POWER_VERSION    (6)</div><div class='del'>-#define EEPROM_6150_EEPROM_VERSION	(0x553)</div><div class='del'>-</div><div class='del'>-/* 6x05 Specific */</div><div class='del'>-#define EEPROM_6005_TX_POWER_VERSION    (6)</div><div class='del'>-#define EEPROM_6005_EEPROM_VERSION	(0x709)</div><div class='del'>-</div><div class='del'>-/* 6x30 Specific */</div><div class='del'>-#define EEPROM_6030_TX_POWER_VERSION    (6)</div><div class='del'>-#define EEPROM_6030_EEPROM_VERSION	(0x709)</div><div class='del'>-</div><div class='del'>-/* 2x00 Specific */</div><div class='del'>-#define EEPROM_2000_TX_POWER_VERSION    (6)</div><div class='del'>-#define EEPROM_2000_EEPROM_VERSION	(0x805)</div><div class='del'>-</div><div class='del'>-/* 6x35 Specific */</div><div class='del'>-#define EEPROM_6035_TX_POWER_VERSION    (6)</div><div class='del'>-#define EEPROM_6035_EEPROM_VERSION	(0x753)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* OTP */</div><div class='del'>-/* lower blocks contain EEPROM image and calibration data */</div><div class='del'>-#define OTP_LOW_IMAGE_SIZE		(2 * 512 * sizeof(u16)) /* 2 KB */</div><div class='del'>-/* high blocks contain PAPD data */</div><div class='del'>-#define OTP_HIGH_IMAGE_SIZE_6x00        (6 * 512 * sizeof(u16)) /* 6 KB */</div><div class='del'>-#define OTP_HIGH_IMAGE_SIZE_1000        (0x200 * sizeof(u16)) /* 1024 bytes */</div><div class='del'>-#define OTP_MAX_LL_ITEMS_1000		(3)	/* OTP blocks for 1000 */</div><div class='del'>-#define OTP_MAX_LL_ITEMS_6x00		(4)	/* OTP blocks for 6x00 */</div><div class='del'>-#define OTP_MAX_LL_ITEMS_6x50		(7)	/* OTP blocks for 6x50 */</div><div class='del'>-#define OTP_MAX_LL_ITEMS_2x00		(4)	/* OTP blocks for 2x00 */</div><div class='del'>-</div><div class='ctx'> /* 2.4 GHz */</div><div class='ctx'> extern const u8 iwl_eeprom_band_1[14];</div><div class='ctx'> </div><div class='hunk'>@@ -306,12 +251,14 @@ struct iwl_eeprom_ops {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-int iwl_eeprom_init(struct iwl_trans *trans, u32 hw_rev);</div><div class='del'>-void iwl_eeprom_free(struct iwl_shared *shrd);</div><div class='del'>-int  iwl_eeprom_check_version(struct iwl_priv *priv);</div><div class='add'>+int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev);</div><div class='add'>+void iwl_eeprom_free(struct iwl_priv *priv);</div><div class='add'>+int iwl_eeprom_check_version(struct iwl_priv *priv);</div><div class='ctx'> int iwl_eeprom_init_hw_params(struct iwl_priv *priv);</div><div class='del'>-const u8 *iwl_eeprom_query_addr(const struct iwl_shared *shrd, size_t offset);</div><div class='del'>-u16 iwl_eeprom_query16(const struct iwl_shared *shrd, size_t offset);</div><div class='add'>+u16 iwl_eeprom_calib_version(struct iwl_priv *priv);</div><div class='add'>+const u8 *iwl_eeprom_query_addr(struct iwl_priv *priv, size_t offset);</div><div class='add'>+u16 iwl_eeprom_query16(struct iwl_priv *priv, size_t offset);</div><div class='add'>+void iwl_eeprom_get_mac(struct iwl_priv *priv, u8 *mac);</div><div class='ctx'> int iwl_init_channel_map(struct iwl_priv *priv);</div><div class='ctx'> void iwl_free_channel_map(struct iwl_priv *priv);</div><div class='ctx'> const struct iwl_channel_info *iwl_get_channel_info(</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-fh.h b/drivers/net/wireless/iwlwifi/iwl-fh.h<br/>index 90208094b8eb..74bce97a8600 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-fh.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-fh.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-fh.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-fh.h</a></div><div class='hunk'>@@ -104,15 +104,29 @@</div><div class='ctx'>  * (see struct iwl_tfd_frame).  These 16 pointer registers are offset by 0x04</div><div class='ctx'>  * bytes from one another.  Each TFD circular buffer in DRAM must be 256-byte</div><div class='ctx'>  * aligned (address bits 0-7 must be 0).</div><div class='add'>+ * Later devices have 20 (5000 series) or 30 (higher) queues, but the registers</div><div class='add'>+ * for them are in different places.</div><div class='ctx'>  *</div><div class='ctx'>  * Bit fields in each pointer register:</div><div class='ctx'>  *  27-0: TFD CB physical base address [35:8], must be 256-byte aligned</div><div class='ctx'>  */</div><div class='del'>-#define FH_MEM_CBBC_LOWER_BOUND          (FH_MEM_LOWER_BOUND + 0x9D0)</div><div class='del'>-#define FH_MEM_CBBC_UPPER_BOUND          (FH_MEM_LOWER_BOUND + 0xA10)</div><div class='del'>-</div><div class='del'>-/* Find TFD CB base pointer for given queue (range 0-15). */</div><div class='del'>-#define FH_MEM_CBBC_QUEUE(x)  (FH_MEM_CBBC_LOWER_BOUND + (x) * 0x4)</div><div class='add'>+#define FH_MEM_CBBC_0_15_LOWER_BOUND		(FH_MEM_LOWER_BOUND + 0x9D0)</div><div class='add'>+#define FH_MEM_CBBC_0_15_UPPER_BOUND		(FH_MEM_LOWER_BOUND + 0xA10)</div><div class='add'>+#define FH_MEM_CBBC_16_19_LOWER_BOUND		(FH_MEM_LOWER_BOUND + 0xBF0)</div><div class='add'>+#define FH_MEM_CBBC_16_19_UPPER_BOUND		(FH_MEM_LOWER_BOUND + 0xC00)</div><div class='add'>+#define FH_MEM_CBBC_20_31_LOWER_BOUND		(FH_MEM_LOWER_BOUND + 0xB20)</div><div class='add'>+#define FH_MEM_CBBC_20_31_UPPER_BOUND		(FH_MEM_LOWER_BOUND + 0xB80)</div><div class='add'>+</div><div class='add'>+/* Find TFD CB base pointer for given queue */</div><div class='add'>+static inline unsigned int FH_MEM_CBBC_QUEUE(unsigned int chnl)</div><div class='add'>+{</div><div class='add'>+	if (chnl &lt; 16)</div><div class='add'>+		return FH_MEM_CBBC_0_15_LOWER_BOUND + 4 * chnl;</div><div class='add'>+	if (chnl &lt; 20)</div><div class='add'>+		return FH_MEM_CBBC_16_19_LOWER_BOUND + 4 * (chnl - 16);</div><div class='add'>+	WARN_ON_ONCE(chnl &gt;= 32);</div><div class='add'>+	return FH_MEM_CBBC_20_31_LOWER_BOUND + 4 * (chnl - 20);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-fw-file.h b/drivers/net/wireless/iwlwifi/iwl-fw-file.h<br/>index c924ccb93c8c..e71564053e7f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-fw-file.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-fw-file.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-fw-file.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-fw-file.h</a></div><div class='hunk'>@@ -93,15 +93,7 @@ struct iwl_ucode_header {</div><div class='ctx'>  * new TLV uCode file layout</div><div class='ctx'>  *</div><div class='ctx'>  * The new TLV file format contains TLVs, that each specify</div><div class='del'>- * some piece of data. To facilitate "groups", for example</div><div class='del'>- * different instruction image with different capabilities,</div><div class='del'>- * bundled with the same init image, an alternative mechanism</div><div class='del'>- * is provided:</div><div class='del'>- * When the alternative field is 0, that means that the item</div><div class='del'>- * is always valid. When it is non-zero, then it is only</div><div class='del'>- * valid in conjunction with items of the same alternative,</div><div class='del'>- * in which case the driver (user) selects one alternative</div><div class='del'>- * to use.</div><div class='add'>+ * some piece of data.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> enum iwl_ucode_tlv_type {</div><div class='hunk'>@@ -132,8 +124,7 @@ enum iwl_ucode_tlv_type {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct iwl_ucode_tlv {</div><div class='del'>-	__le16 type;		/* see above */</div><div class='del'>-	__le16 alternative;	/* see comment */</div><div class='add'>+	__le32 type;		/* see above */</div><div class='ctx'> 	__le32 length;		/* not including type/length fields */</div><div class='ctx'> 	u8 data[0];</div><div class='ctx'> };</div><div class='hunk'>@@ -152,7 +143,7 @@ struct iwl_tlv_ucode_header {</div><div class='ctx'> 	u8 human_readable[64];</div><div class='ctx'> 	__le32 ver;		/* major/minor/API/serial */</div><div class='ctx'> 	__le32 build;</div><div class='del'>-	__le64 alternatives;	/* bitmask of valid alternatives */</div><div class='add'>+	__le64 ignore;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The data contained herein has a TLV layout,</div><div class='ctx'> 	 * see above for the TLV header and types.</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-fw.h b/drivers/net/wireless/iwlwifi/iwl-fw.h<br/>index 8e36bdc1e522..2153e4cc5572 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-fw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-fw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-fw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-fw.h</a></div><div class='hunk'>@@ -63,6 +63,7 @@</div><div class='ctx'> #ifndef __iwl_fw_h__</div><div class='ctx'> #define __iwl_fw_h__</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;net/mac80211.h&gt;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * enum iwl_ucode_tlv_flag - ucode API flags</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-io.h b/drivers/net/wireless/iwlwifi/iwl-io.h<br/>index 09b856768f62..abb3250164ba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-io.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-io.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-io.h</a></div><div class='hunk'>@@ -30,7 +30,6 @@</div><div class='ctx'> #define __iwl_io_h__</div><div class='ctx'> </div><div class='ctx'> #include "iwl-devtrace.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='ctx'> </div><div class='ctx'> static inline void iwl_write8(struct iwl_trans *trans, u32 ofs, u8 val)</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-led.c b/drivers/net/wireless/iwlwifi/iwl-led.c<br/>index 1993a2b7ae63..47000419f916 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-led.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-led.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-led.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-led.c</a></div><div class='hunk'>@@ -36,11 +36,10 @@</div><div class='ctx'> #include &lt;asm/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='add'>+#include "iwl-modparams.h"</div><div class='ctx'> </div><div class='ctx'> /* Throughput		OFF time(ms)	ON time (ms)</div><div class='ctx'>  *	&gt;300			25		25</div><div class='hunk'>@@ -71,7 +70,7 @@ static const struct ieee80211_tpt_blink iwl_blink[] = {</div><div class='ctx'> /* Set led register off */</div><div class='ctx'> void iwlagn_led_enable(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	iwl_write32(trans(priv), CSR_LED_REG, CSR_LED_REG_TRUN_ON);</div><div class='add'>+	iwl_write32(priv-&gt;trans, CSR_LED_REG, CSR_LED_REG_TRUN_ON);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -107,9 +106,9 @@ static int iwl_send_led_cmd(struct iwl_priv *priv, struct iwl_led_cmd *led_cmd)</div><div class='ctx'> 	};</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='del'>-	reg = iwl_read32(trans(priv), CSR_LED_REG);</div><div class='add'>+	reg = iwl_read32(priv-&gt;trans, CSR_LED_REG);</div><div class='ctx'> 	if (reg != (reg &amp; CSR_LED_BSM_CTRL_MSK))</div><div class='del'>-		iwl_write32(trans(priv), CSR_LED_REG,</div><div class='add'>+		iwl_write32(priv-&gt;trans, CSR_LED_REG,</div><div class='ctx'> 			    reg &amp; CSR_LED_BSM_CTRL_MSK);</div><div class='ctx'> </div><div class='ctx'> 	return iwl_dvm_send_cmd(priv, &amp;cmd);</div><div class='hunk'>@@ -138,11 +137,11 @@ static int iwl_led_cmd(struct iwl_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_LED(priv, "Led blink time compensation=%u\n",</div><div class='del'>-			cfg(priv)-&gt;base_params-&gt;led_compensation);</div><div class='add'>+			priv-&gt;cfg-&gt;base_params-&gt;led_compensation);</div><div class='ctx'> 	led_cmd.on = iwl_blink_compensation(priv, on,</div><div class='del'>-				cfg(priv)-&gt;base_params-&gt;led_compensation);</div><div class='add'>+				priv-&gt;cfg-&gt;base_params-&gt;led_compensation);</div><div class='ctx'> 	led_cmd.off = iwl_blink_compensation(priv, off,</div><div class='del'>-				cfg(priv)-&gt;base_params-&gt;led_compensation);</div><div class='add'>+				priv-&gt;cfg-&gt;base_params-&gt;led_compensation);</div><div class='ctx'> </div><div class='ctx'> 	ret = iwl_send_led_cmd(priv, &amp;led_cmd);</div><div class='ctx'> 	if (!ret) {</div><div class='hunk'>@@ -175,7 +174,7 @@ static int iwl_led_blink_set(struct led_classdev *led_cdev,</div><div class='ctx'> </div><div class='ctx'> void iwl_leds_init(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	int mode = iwlagn_mod_params.led_mode;</div><div class='add'>+	int mode = iwlwifi_mod_params.led_mode;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (mode == IWL_LED_DISABLE) {</div><div class='hunk'>@@ -183,7 +182,7 @@ void iwl_leds_init(struct iwl_priv *priv)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (mode == IWL_LED_DEFAULT)</div><div class='del'>-		mode = cfg(priv)-&gt;led_mode;</div><div class='add'>+		mode = priv-&gt;cfg-&gt;led_mode;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;led.name = kasprintf(GFP_KERNEL, "%s-led",</div><div class='ctx'> 				   wiphy_name(priv-&gt;hw-&gt;wiphy));</div><div class='hunk'>@@ -207,7 +206,7 @@ void iwl_leds_init(struct iwl_priv *priv)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = led_classdev_register(trans(priv)-&gt;dev, &amp;priv-&gt;led);</div><div class='add'>+	ret = led_classdev_register(priv-&gt;trans-&gt;dev, &amp;priv-&gt;led);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		kfree(priv-&gt;led.name);</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-mac80211.c b/drivers/net/wireless/iwlwifi/iwl-mac80211.c<br/>index b6805f8e9a01..ab2f4d7500a4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-mac80211.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-mac80211.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-mac80211.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-mac80211.c</a></div><div class='hunk'>@@ -44,13 +44,12 @@</div><div class='ctx'> </div><div class='ctx'> #include "iwl-eeprom.h"</div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-agn-calib.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='ctx'> #include "iwl-op-mode.h"</div><div class='add'>+#include "iwl-modparams.h"</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='ctx'>  *</div><div class='hunk'>@@ -147,7 +146,14 @@ int iwlagn_mac_setup_register(struct iwl_priv *priv,</div><div class='ctx'> 		    IEEE80211_HW_AMPDU_AGGREGATION |</div><div class='ctx'> 		    IEEE80211_HW_NEED_DTIM_PERIOD |</div><div class='ctx'> 		    IEEE80211_HW_SPECTRUM_MGMT |</div><div class='del'>-		    IEEE80211_HW_REPORTS_TX_ACK_STATUS;</div><div class='add'>+		    IEEE80211_HW_REPORTS_TX_ACK_STATUS |</div><div class='add'>+		    IEEE80211_HW_QUEUE_CONTROL |</div><div class='add'>+		    IEEE80211_HW_SUPPORTS_PS |</div><div class='add'>+		    IEEE80211_HW_SUPPORTS_DYNAMIC_PS |</div><div class='add'>+		    IEEE80211_HW_WANT_MONITOR_VIF |</div><div class='add'>+		    IEEE80211_HW_SCAN_WHILE_IDLE;</div><div class='add'>+</div><div class='add'>+	hw-&gt;offchannel_tx_hw_queue = IWL_AUX_QUEUE;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Including the following line will crash some AP's.  This</div><div class='hunk'>@@ -156,10 +162,7 @@ int iwlagn_mac_setup_register(struct iwl_priv *priv,</div><div class='ctx'> 	hw-&gt;max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	hw-&gt;flags |= IEEE80211_HW_SUPPORTS_PS |</div><div class='del'>-		     IEEE80211_HW_SUPPORTS_DYNAMIC_PS;</div><div class='del'>-</div><div class='del'>-	if (hw_params(priv).sku &amp; EEPROM_SKU_CAP_11N_ENABLE)</div><div class='add'>+	if (priv-&gt;hw_params.sku &amp; EEPROM_SKU_CAP_11N_ENABLE)</div><div class='ctx'> 		hw-&gt;flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |</div><div class='ctx'> 			     IEEE80211_HW_SUPPORTS_STATIC_SMPS;</div><div class='ctx'> </div><div class='hunk'>@@ -197,13 +200,13 @@ int iwlagn_mac_setup_register(struct iwl_priv *priv,</div><div class='ctx'> 			    WIPHY_FLAG_IBSS_RSN;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;fw-&gt;img[IWL_UCODE_WOWLAN].sec[0].len &amp;&amp;</div><div class='del'>-	    trans(priv)-&gt;ops-&gt;wowlan_suspend &amp;&amp;</div><div class='del'>-	    device_can_wakeup(trans(priv)-&gt;dev)) {</div><div class='add'>+	    priv-&gt;trans-&gt;ops-&gt;wowlan_suspend &amp;&amp;</div><div class='add'>+	    device_can_wakeup(priv-&gt;trans-&gt;dev)) {</div><div class='ctx'> 		hw-&gt;wiphy-&gt;wowlan.flags = WIPHY_WOWLAN_MAGIC_PKT |</div><div class='ctx'> 					  WIPHY_WOWLAN_DISCONNECT |</div><div class='ctx'> 					  WIPHY_WOWLAN_EAP_IDENTITY_REQ |</div><div class='ctx'> 					  WIPHY_WOWLAN_RFKILL_RELEASE;</div><div class='del'>-		if (!iwlagn_mod_params.sw_crypto)</div><div class='add'>+		if (!iwlwifi_mod_params.sw_crypto)</div><div class='ctx'> 			hw-&gt;wiphy-&gt;wowlan.flags |=</div><div class='ctx'> 				WIPHY_WOWLAN_SUPPORTS_GTK_REKEY |</div><div class='ctx'> 				WIPHY_WOWLAN_GTK_REKEY_FAILURE;</div><div class='hunk'>@@ -215,17 +218,20 @@ int iwlagn_mac_setup_register(struct iwl_priv *priv,</div><div class='ctx'> 					IWLAGN_WOWLAN_MAX_PATTERN_LEN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (iwlagn_mod_params.power_save)</div><div class='add'>+	if (iwlwifi_mod_params.power_save)</div><div class='ctx'> 		hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT;</div><div class='ctx'> 	else</div><div class='ctx'> 		hw-&gt;wiphy-&gt;flags &amp;= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;wiphy-&gt;max_scan_ssids = PROBE_OPTION_MAX;</div><div class='del'>-	/* we create the 802.11 header and a zero-length SSID element */</div><div class='del'>-	hw-&gt;wiphy-&gt;max_scan_ie_len = capa-&gt;max_probe_length - 24 - 2;</div><div class='add'>+	/* we create the 802.11 header and a max-length SSID element */</div><div class='add'>+	hw-&gt;wiphy-&gt;max_scan_ie_len = capa-&gt;max_probe_length - 24 - 34;</div><div class='ctx'> </div><div class='del'>-	/* Default value; 4 EDCA QOS priorities */</div><div class='del'>-	hw-&gt;queues = 4;</div><div class='add'>+	/*</div><div class='add'>+	 * We don't use all queues: 4 and 9 are unused and any</div><div class='add'>+	 * aggregation queue gets mapped down to the AC queue.</div><div class='add'>+	 */</div><div class='add'>+	hw-&gt;queues = IWLAGN_FIRST_AMPDU_QUEUE;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -236,7 +242,7 @@ int iwlagn_mac_setup_register(struct iwl_priv *priv,</div><div class='ctx'> 		priv-&gt;hw-&gt;wiphy-&gt;bands[IEEE80211_BAND_5GHZ] =</div><div class='ctx'> 			&amp;priv-&gt;bands[IEEE80211_BAND_5GHZ];</div><div class='ctx'> </div><div class='del'>-	hw-&gt;wiphy-&gt;hw_version = trans(priv)-&gt;hw_id;</div><div class='add'>+	hw-&gt;wiphy-&gt;hw_version = priv-&gt;trans-&gt;hw_id;</div><div class='ctx'> </div><div class='ctx'> 	iwl_leds_init(priv);</div><div class='ctx'> </div><div class='hunk'>@@ -332,7 +338,7 @@ static int iwlagn_mac_start(struct ieee80211_hw *hw)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwlagn_mac_stop(struct ieee80211_hw *hw)</div><div class='add'>+void iwlagn_mac_stop(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> </div><div class='hunk'>@@ -355,18 +361,18 @@ static void iwlagn_mac_stop(struct ieee80211_hw *hw)</div><div class='ctx'> 	 * even if interface is down, trans-&gt;down will leave the RF</div><div class='ctx'> 	 * kill interrupt enabled</div><div class='ctx'> 	 */</div><div class='del'>-	iwl_trans_stop_hw(trans(priv));</div><div class='add'>+	iwl_trans_stop_hw(priv-&gt;trans, false);</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_MAC80211(priv, "leave\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwlagn_mac_set_rekey_data(struct ieee80211_hw *hw,</div><div class='del'>-				      struct ieee80211_vif *vif,</div><div class='del'>-				      struct cfg80211_gtk_rekey_data *data)</div><div class='add'>+void iwlagn_mac_set_rekey_data(struct ieee80211_hw *hw,</div><div class='add'>+			       struct ieee80211_vif *vif,</div><div class='add'>+			       struct cfg80211_gtk_rekey_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> </div><div class='del'>-	if (iwlagn_mod_params.sw_crypto)</div><div class='add'>+	if (iwlwifi_mod_params.sw_crypto)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_MAC80211(priv, "enter\n");</div><div class='hunk'>@@ -388,8 +394,7 @@ static void iwlagn_mac_set_rekey_data(struct ieee80211_hw *hw,</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='ctx'> </div><div class='del'>-static int iwlagn_mac_suspend(struct ieee80211_hw *hw,</div><div class='del'>-			      struct cfg80211_wowlan *wowlan)</div><div class='add'>+int iwlagn_mac_suspend(struct ieee80211_hw *hw, struct cfg80211_wowlan *wowlan)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> 	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_BSS];</div><div class='hunk'>@@ -412,9 +417,9 @@ static int iwlagn_mac_suspend(struct ieee80211_hw *hw,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='del'>-	device_set_wakeup_enable(trans(priv)-&gt;dev, true);</div><div class='add'>+	device_set_wakeup_enable(priv-&gt;trans-&gt;dev, true);</div><div class='ctx'> </div><div class='del'>-	iwl_trans_wowlan_suspend(trans(priv));</div><div class='add'>+	iwl_trans_wowlan_suspend(priv-&gt;trans);</div><div class='ctx'> </div><div class='ctx'> 	goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -437,27 +442,28 @@ static int iwlagn_mac_resume(struct ieee80211_hw *hw)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 base, status = 0xffffffff;</div><div class='ctx'> 	int ret = -EIO;</div><div class='del'>-	const struct fw_img *img;</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_MAC80211(priv, "enter\n");</div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_CLR,</div><div class='add'>+	iwl_write32(priv-&gt;trans, CSR_UCODE_DRV_GP1_CLR,</div><div class='ctx'> 			  CSR_UCODE_DRV_GP1_BIT_D3_CFG_COMPLETE);</div><div class='ctx'> </div><div class='del'>-	base = priv-&gt;shrd-&gt;device_pointers.error_event_table;</div><div class='add'>+	base = priv-&gt;device_pointers.error_event_table;</div><div class='ctx'> 	if (iwlagn_hw_valid_rtc_data_addr(base)) {</div><div class='del'>-		spin_lock_irqsave(&amp;trans(priv)-&gt;reg_lock, flags);</div><div class='del'>-		ret = iwl_grab_nic_access_silent(trans(priv));</div><div class='add'>+		spin_lock_irqsave(&amp;priv-&gt;trans-&gt;reg_lock, flags);</div><div class='add'>+		ret = iwl_grab_nic_access_silent(priv-&gt;trans);</div><div class='ctx'> 		if (likely(ret == 0)) {</div><div class='del'>-			iwl_write32(trans(priv), HBUS_TARG_MEM_RADDR, base);</div><div class='del'>-			status = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);</div><div class='del'>-			iwl_release_nic_access(trans(priv));</div><div class='add'>+			iwl_write32(priv-&gt;trans, HBUS_TARG_MEM_RADDR, base);</div><div class='add'>+			status = iwl_read32(priv-&gt;trans, HBUS_TARG_MEM_RDAT);</div><div class='add'>+			iwl_release_nic_access(priv-&gt;trans);</div><div class='ctx'> 		}</div><div class='del'>-		spin_unlock_irqrestore(&amp;trans(priv)-&gt;reg_lock, flags);</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;trans-&gt;reg_lock, flags);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_IWLWIFI_DEBUGFS</div><div class='ctx'> 		if (ret == 0) {</div><div class='add'>+			const struct fw_img *img;</div><div class='add'>+</div><div class='ctx'> 			img = &amp;(priv-&gt;fw-&gt;img[IWL_UCODE_WOWLAN]);</div><div class='ctx'> 			if (!priv-&gt;wowlan_sram) {</div><div class='ctx'> 				priv-&gt;wowlan_sram =</div><div class='hunk'>@@ -467,7 +473,7 @@ static int iwlagn_mac_resume(struct ieee80211_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 			if (priv-&gt;wowlan_sram)</div><div class='ctx'> 				_iwl_read_targ_mem_words(</div><div class='del'>-				      trans(priv), 0x800000,</div><div class='add'>+				      priv-&gt;trans, 0x800000,</div><div class='ctx'> 				      priv-&gt;wowlan_sram,</div><div class='ctx'> 				      img-&gt;sec[IWL_UCODE_SECTION_DATA].len / 4);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -479,7 +485,7 @@ static int iwlagn_mac_resume(struct ieee80211_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;wowlan = false;</div><div class='ctx'> </div><div class='del'>-	device_set_wakeup_enable(trans(priv)-&gt;dev, false);</div><div class='add'>+	device_set_wakeup_enable(priv-&gt;trans-&gt;dev, false);</div><div class='ctx'> </div><div class='ctx'> 	iwlagn_prepare_restart(priv);</div><div class='ctx'> </div><div class='hunk'>@@ -497,7 +503,7 @@ static int iwlagn_mac_resume(struct ieee80211_hw *hw)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)</div><div class='add'>+void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> </div><div class='hunk'>@@ -508,21 +514,21 @@ static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)</div><div class='ctx'> 		dev_kfree_skb_any(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,</div><div class='del'>-				       struct ieee80211_vif *vif,</div><div class='del'>-				       struct ieee80211_key_conf *keyconf,</div><div class='del'>-				       struct ieee80211_sta *sta,</div><div class='del'>-				       u32 iv32, u16 *phase1key)</div><div class='add'>+void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,</div><div class='add'>+				struct ieee80211_vif *vif,</div><div class='add'>+				struct ieee80211_key_conf *keyconf,</div><div class='add'>+				struct ieee80211_sta *sta,</div><div class='add'>+				u32 iv32, u16 *phase1key)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> </div><div class='ctx'> 	iwl_update_tkip_key(priv, vif, keyconf, sta, iv32, phase1key);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,</div><div class='del'>-			      struct ieee80211_vif *vif,</div><div class='del'>-			      struct ieee80211_sta *sta,</div><div class='del'>-			      struct ieee80211_key_conf *key)</div><div class='add'>+int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,</div><div class='add'>+		       struct ieee80211_vif *vif,</div><div class='add'>+		       struct ieee80211_sta *sta,</div><div class='add'>+		       struct ieee80211_key_conf *key)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> 	struct iwl_vif_priv *vif_priv = (void *)vif-&gt;drv_priv;</div><div class='hunk'>@@ -532,7 +538,7 @@ static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_MAC80211(priv, "enter\n");</div><div class='ctx'> </div><div class='del'>-	if (iwlagn_mod_params.sw_crypto) {</div><div class='add'>+	if (iwlwifi_mod_params.sw_crypto) {</div><div class='ctx'> 		IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -622,11 +628,11 @@ static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,</div><div class='del'>-				   struct ieee80211_vif *vif,</div><div class='del'>-				   enum ieee80211_ampdu_mlme_action action,</div><div class='del'>-				   struct ieee80211_sta *sta, u16 tid, u16 *ssn,</div><div class='del'>-				   u8 buf_size)</div><div class='add'>+int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,</div><div class='add'>+			    struct ieee80211_vif *vif,</div><div class='add'>+			    enum ieee80211_ampdu_mlme_action action,</div><div class='add'>+			    struct ieee80211_sta *sta, u16 tid, u16 *ssn,</div><div class='add'>+			    u8 buf_size)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='hunk'>@@ -635,7 +641,7 @@ static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,</div><div class='ctx'> 	IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",</div><div class='ctx'> 		     sta-&gt;addr, tid);</div><div class='ctx'> </div><div class='del'>-	if (!(hw_params(priv).sku &amp; EEPROM_SKU_CAP_11N_ENABLE))</div><div class='add'>+	if (!(priv-&gt;hw_params.sku &amp; EEPROM_SKU_CAP_11N_ENABLE))</div><div class='ctx'> 		return -EACCES;</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_MAC80211(priv, "enter\n");</div><div class='hunk'>@@ -643,7 +649,7 @@ static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	switch (action) {</div><div class='ctx'> 	case IEEE80211_AMPDU_RX_START:</div><div class='del'>-		if (iwlagn_mod_params.disable_11n &amp; IWL_DISABLE_HT_RXAGG)</div><div class='add'>+		if (iwlwifi_mod_params.disable_11n &amp; IWL_DISABLE_HT_RXAGG)</div><div class='ctx'> 			break;</div><div class='ctx'> 		IWL_DEBUG_HT(priv, "start Rx\n");</div><div class='ctx'> 		ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);</div><div class='hunk'>@@ -653,7 +659,9 @@ static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,</div><div class='ctx'> 		ret = iwl_sta_rx_agg_stop(priv, sta, tid);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IEEE80211_AMPDU_TX_START:</div><div class='del'>-		if (iwlagn_mod_params.disable_11n &amp; IWL_DISABLE_HT_TXAGG)</div><div class='add'>+		if (!priv-&gt;trans-&gt;ops-&gt;tx_agg_setup)</div><div class='add'>+			break;</div><div class='add'>+		if (iwlwifi_mod_params.disable_11n &amp; IWL_DISABLE_HT_TXAGG)</div><div class='ctx'> 			break;</div><div class='ctx'> 		IWL_DEBUG_HT(priv, "start Tx\n");</div><div class='ctx'> 		ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);</div><div class='hunk'>@@ -667,7 +675,7 @@ static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,</div><div class='ctx'> 				     priv-&gt;agg_tids_count);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!priv-&gt;agg_tids_count &amp;&amp;</div><div class='del'>-		    hw_params(priv).use_rts_for_aggregation) {</div><div class='add'>+		    priv-&gt;hw_params.use_rts_for_aggregation) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * switch off RTS/CTS if it was previously enabled</div><div class='ctx'> 			 */</div><div class='hunk'>@@ -746,11 +754,11 @@ static int iwlagn_mac_sta_remove(struct ieee80211_hw *hw,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwlagn_mac_sta_state(struct ieee80211_hw *hw,</div><div class='del'>-				struct ieee80211_vif *vif,</div><div class='del'>-				struct ieee80211_sta *sta,</div><div class='del'>-				enum ieee80211_sta_state old_state,</div><div class='del'>-				enum ieee80211_sta_state new_state)</div><div class='add'>+int iwlagn_mac_sta_state(struct ieee80211_hw *hw,</div><div class='add'>+			 struct ieee80211_vif *vif,</div><div class='add'>+			 struct ieee80211_sta *sta,</div><div class='add'>+			 enum ieee80211_sta_state old_state,</div><div class='add'>+			 enum ieee80211_sta_state new_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> 	struct iwl_vif_priv *vif_priv = (void *)vif-&gt;drv_priv;</div><div class='hunk'>@@ -829,8 +837,8 @@ static int iwlagn_mac_sta_state(struct ieee80211_hw *hw,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,</div><div class='del'>-				struct ieee80211_channel_switch *ch_switch)</div><div class='add'>+void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,</div><div class='add'>+			       struct ieee80211_channel_switch *ch_switch)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> 	const struct iwl_channel_info *ch_info;</div><div class='hunk'>@@ -863,7 +871,7 @@ static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,</div><div class='ctx'> 	if (!iwl_is_associated_ctx(ctx))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	if (!cfg(priv)-&gt;lib-&gt;set_channel_switch)</div><div class='add'>+	if (!priv-&gt;lib-&gt;set_channel_switch)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ch = channel-&gt;hw_value;</div><div class='hunk'>@@ -892,14 +900,13 @@ static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,</div><div class='ctx'> 	iwl_set_rxon_ht(priv, ht_conf);</div><div class='ctx'> 	iwl_set_flags_for_band(priv, ctx, channel-&gt;band, ctx-&gt;vif);</div><div class='ctx'> </div><div class='del'>-	iwl_set_rate(priv);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * at this point, staging_rxon has the</div><div class='ctx'> 	 * configuration for channel switch</div><div class='ctx'> 	 */</div><div class='ctx'> 	set_bit(STATUS_CHANNEL_SWITCH_PENDING, &amp;priv-&gt;status);</div><div class='ctx'> 	priv-&gt;switch_channel = cpu_to_le16(ch);</div><div class='del'>-	if (cfg(priv)-&gt;lib-&gt;set_channel_switch(priv, ch_switch)) {</div><div class='add'>+	if (priv-&gt;lib-&gt;set_channel_switch(priv, ch_switch)) {</div><div class='ctx'> 		clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &amp;priv-&gt;status);</div><div class='ctx'> 		priv-&gt;switch_channel = 0;</div><div class='ctx'> 		ieee80211_chswitch_done(ctx-&gt;vif, false);</div><div class='hunk'>@@ -910,10 +917,25 @@ out:</div><div class='ctx'> 	IWL_DEBUG_MAC80211(priv, "leave\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwlagn_configure_filter(struct ieee80211_hw *hw,</div><div class='del'>-				    unsigned int changed_flags,</div><div class='del'>-				    unsigned int *total_flags,</div><div class='del'>-				    u64 multicast)</div><div class='add'>+void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * MULTI-FIXME</div><div class='add'>+	 * See iwlagn_mac_channel_switch.</div><div class='add'>+	 */</div><div class='add'>+	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_BSS];</div><div class='add'>+</div><div class='add'>+	if (test_bit(STATUS_EXIT_PENDING, &amp;priv-&gt;status))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &amp;priv-&gt;status))</div><div class='add'>+		ieee80211_chswitch_done(ctx-&gt;vif, is_success);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void iwlagn_configure_filter(struct ieee80211_hw *hw,</div><div class='add'>+			     unsigned int changed_flags,</div><div class='add'>+			     unsigned int *total_flags,</div><div class='add'>+			     u64 multicast)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> 	__le32 filter_or = 0, filter_nand = 0;</div><div class='hunk'>@@ -960,7 +982,7 @@ static void iwlagn_configure_filter(struct ieee80211_hw *hw,</div><div class='ctx'> 			FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)</div><div class='add'>+void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> </div><div class='hunk'>@@ -988,7 +1010,7 @@ static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");</div><div class='del'>-	iwl_trans_wait_tx_queue_empty(trans(priv));</div><div class='add'>+	iwl_trans_wait_tx_queue_empty(priv-&gt;trans);</div><div class='ctx'> done:</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;mutex);</div><div class='ctx'> 	IWL_DEBUG_MAC80211(priv, "leave\n");</div><div class='hunk'>@@ -1003,7 +1025,7 @@ static int iwlagn_mac_remain_on_channel(struct ieee80211_hw *hw,</div><div class='ctx'> 	struct iwl_rxon_context *ctx = &amp;priv-&gt;contexts[IWL_RXON_CTX_PAN];</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	if (!(priv-&gt;shrd-&gt;valid_contexts &amp; BIT(IWL_RXON_CTX_PAN)))</div><div class='add'>+	if (!(priv-&gt;valid_contexts &amp; BIT(IWL_RXON_CTX_PAN)))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	if (!(ctx-&gt;interface_modes &amp; BIT(NL80211_IFTYPE_P2P_CLIENT)))</div><div class='hunk'>@@ -1087,11 +1109,11 @@ static int iwlagn_mac_remain_on_channel(struct ieee80211_hw *hw,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwlagn_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)</div><div class='add'>+int iwlagn_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> </div><div class='del'>-	if (!(priv-&gt;shrd-&gt;valid_contexts &amp; BIT(IWL_RXON_CTX_PAN)))</div><div class='add'>+	if (!(priv-&gt;valid_contexts &amp; BIT(IWL_RXON_CTX_PAN)))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_MAC80211(priv, "enter\n");</div><div class='hunk'>@@ -1104,16 +1126,16 @@ static int iwlagn_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwlagn_mac_rssi_callback(struct ieee80211_hw *hw,</div><div class='del'>-			   enum ieee80211_rssi_event rssi_event)</div><div class='add'>+void iwlagn_mac_rssi_callback(struct ieee80211_hw *hw,</div><div class='add'>+			      enum ieee80211_rssi_event rssi_event)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_MAC80211(priv, "enter\n");</div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-			cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+			priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='ctx'> 		if (rssi_event == RSSI_EVENT_LOW)</div><div class='ctx'> 			priv-&gt;bt_enable_pspoll = true;</div><div class='ctx'> 		else if (rssi_event == RSSI_EVENT_HIGH)</div><div class='hunk'>@@ -1129,8 +1151,8 @@ static void iwlagn_mac_rssi_callback(struct ieee80211_hw *hw,</div><div class='ctx'> 	IWL_DEBUG_MAC80211(priv, "leave\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwlagn_mac_set_tim(struct ieee80211_hw *hw,</div><div class='del'>-			   struct ieee80211_sta *sta, bool set)</div><div class='add'>+int iwlagn_mac_set_tim(struct ieee80211_hw *hw,</div><div class='add'>+		       struct ieee80211_sta *sta, bool set)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> </div><div class='hunk'>@@ -1139,9 +1161,9 @@ static int iwlagn_mac_set_tim(struct ieee80211_hw *hw,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwlagn_mac_conf_tx(struct ieee80211_hw *hw,</div><div class='del'>-		    struct ieee80211_vif *vif, u16 queue,</div><div class='del'>-		    const struct ieee80211_tx_queue_params *params)</div><div class='add'>+int iwlagn_mac_conf_tx(struct ieee80211_hw *hw,</div><div class='add'>+		       struct ieee80211_vif *vif, u16 queue,</div><div class='add'>+		       const struct ieee80211_tx_queue_params *params)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> 	struct iwl_vif_priv *vif_priv = (void *)vif-&gt;drv_priv;</div><div class='hunk'>@@ -1183,7 +1205,7 @@ static int iwlagn_mac_conf_tx(struct ieee80211_hw *hw,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwlagn_mac_tx_last_beacon(struct ieee80211_hw *hw)</div><div class='add'>+int iwlagn_mac_tx_last_beacon(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> </div><div class='hunk'>@@ -1199,11 +1221,10 @@ static int iwl_set_mode(struct iwl_priv *priv, struct iwl_rxon_context *ctx)</div><div class='ctx'> 	return iwlagn_commit_rxon(priv, ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwl_setup_interface(struct iwl_priv *priv,</div><div class='del'>-			       struct iwl_rxon_context *ctx)</div><div class='add'>+int iwl_setup_interface(struct iwl_priv *priv, struct iwl_rxon_context *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct ieee80211_vif *vif = ctx-&gt;vif;</div><div class='del'>-	int err;</div><div class='add'>+	int err, ac;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;priv-&gt;mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -1223,7 +1244,7 @@ static int iwl_setup_interface(struct iwl_priv *priv,</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;bt_params &amp;&amp; cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist &amp;&amp;</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params &amp;&amp; priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist &amp;&amp;</div><div class='ctx'> 	    vif-&gt;type == NL80211_IFTYPE_ADHOC) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * pretend to have high BT traffic as long as we</div><div class='hunk'>@@ -1233,17 +1254,27 @@ static int iwl_setup_interface(struct iwl_priv *priv,</div><div class='ctx'> 		priv-&gt;bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* set up queue mappings */</div><div class='add'>+	for (ac = 0; ac &lt; IEEE80211_NUM_ACS; ac++)</div><div class='add'>+		vif-&gt;hw_queue[ac] = ctx-&gt;ac_to_queue[ac];</div><div class='add'>+</div><div class='add'>+	if (vif-&gt;type == NL80211_IFTYPE_AP)</div><div class='add'>+		vif-&gt;cab_queue = ctx-&gt;mcast_queue;</div><div class='add'>+	else</div><div class='add'>+		vif-&gt;cab_queue = IEEE80211_INVAL_HW_QUEUE;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int iwlagn_mac_add_interface(struct ieee80211_hw *hw,</div><div class='del'>-			     struct ieee80211_vif *vif)</div><div class='add'>+				    struct ieee80211_vif *vif)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> 	struct iwl_vif_priv *vif_priv = (void *)vif-&gt;drv_priv;</div><div class='ctx'> 	struct iwl_rxon_context *tmp, *ctx = NULL;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	enum nl80211_iftype viftype = ieee80211_vif_type_p2p(vif);</div><div class='add'>+	bool reset = false;</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",</div><div class='ctx'> 			   viftype, vif-&gt;addr);</div><div class='hunk'>@@ -1265,6 +1296,13 @@ static int iwlagn_mac_add_interface(struct ieee80211_hw *hw,</div><div class='ctx'> 			tmp-&gt;interface_modes | tmp-&gt;exclusive_interface_modes;</div><div class='ctx'> </div><div class='ctx'> 		if (tmp-&gt;vif) {</div><div class='add'>+			/* On reset we need to add the same interface again */</div><div class='add'>+			if (tmp-&gt;vif == vif) {</div><div class='add'>+				reset = true;</div><div class='add'>+				ctx = tmp;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			/* check if this busy context is exclusive */</div><div class='ctx'> 			if (tmp-&gt;exclusive_interface_modes &amp;</div><div class='ctx'> 						BIT(tmp-&gt;vif-&gt;type)) {</div><div class='hunk'>@@ -1291,7 +1329,7 @@ static int iwlagn_mac_add_interface(struct ieee80211_hw *hw,</div><div class='ctx'> 	ctx-&gt;vif = vif;</div><div class='ctx'> </div><div class='ctx'> 	err = iwl_setup_interface(priv, ctx);</div><div class='del'>-	if (!err)</div><div class='add'>+	if (!err || reset)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;vif = NULL;</div><div class='hunk'>@@ -1303,9 +1341,9 @@ static int iwlagn_mac_add_interface(struct ieee80211_hw *hw,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_teardown_interface(struct iwl_priv *priv,</div><div class='del'>-				   struct ieee80211_vif *vif,</div><div class='del'>-				   bool mode_change)</div><div class='add'>+void iwl_teardown_interface(struct iwl_priv *priv,</div><div class='add'>+			    struct ieee80211_vif *vif,</div><div class='add'>+			    bool mode_change)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);</div><div class='ctx'> </div><div class='hunk'>@@ -1446,9 +1484,9 @@ static int iwlagn_mac_change_interface(struct ieee80211_hw *hw,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwlagn_mac_hw_scan(struct ieee80211_hw *hw,</div><div class='del'>-		    struct ieee80211_vif *vif,</div><div class='del'>-		    struct cfg80211_scan_request *req)</div><div class='add'>+int iwlagn_mac_hw_scan(struct ieee80211_hw *hw,</div><div class='add'>+		       struct ieee80211_vif *vif,</div><div class='add'>+		       struct cfg80211_scan_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1503,7 +1541,7 @@ static void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)</div><div class='ctx'> 	iwl_send_add_sta(priv, &amp;cmd, CMD_ASYNC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwlagn_mac_sta_notify(struct ieee80211_hw *hw,</div><div class='add'>+void iwlagn_mac_sta_notify(struct ieee80211_hw *hw,</div><div class='ctx'> 			   struct ieee80211_vif *vif,</div><div class='ctx'> 			   enum sta_notify_cmd cmd,</div><div class='ctx'> 			   struct ieee80211_sta *sta)</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-modparams.h b/drivers/net/wireless/iwlwifi/iwl-modparams.h<br/>new file mode 100644<br/>index 000000000000..d9a86d6b2bd7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-modparams.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-modparams.h</a></div><div class='hunk'>@@ -0,0 +1,126 @@</div><div class='add'>+/******************************************************************************</div><div class='add'>+ *</div><div class='add'>+ * This file is provided under a dual BSD/GPLv2 license.  When using or</div><div class='add'>+ * redistributing this file, you may do so under either license.</div><div class='add'>+ *</div><div class='add'>+ * GPL LICENSE SUMMARY</div><div class='add'>+ *</div><div class='add'>+ * Copyright(c) 2007 - 2012 Intel Corporation. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of version 2 of the GNU General Public License as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,</div><div class='add'>+ * USA</div><div class='add'>+ *</div><div class='add'>+ * The full GNU General Public License is included in this distribution</div><div class='add'>+ * in the file called LICENSE.GPL.</div><div class='add'>+ *</div><div class='add'>+ * Contact Information:</div><div class='add'>+ *  Intel Linux Wireless &lt;ilw@linux.intel.com&gt;</div><div class='add'>+ * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497</div><div class='add'>+ *</div><div class='add'>+ * BSD LICENSE</div><div class='add'>+ *</div><div class='add'>+ * Copyright(c) 2005 - 2012 Intel Corporation. All rights reserved.</div><div class='add'>+ * All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * Redistribution and use in source and binary forms, with or without</div><div class='add'>+ * modification, are permitted provided that the following conditions</div><div class='add'>+ * are met:</div><div class='add'>+ *</div><div class='add'>+ *  * Redistributions of source code must retain the above copyright</div><div class='add'>+ *    notice, this list of conditions and the following disclaimer.</div><div class='add'>+ *  * Redistributions in binary form must reproduce the above copyright</div><div class='add'>+ *    notice, this list of conditions and the following disclaimer in</div><div class='add'>+ *    the documentation and/or other materials provided with the</div><div class='add'>+ *    distribution.</div><div class='add'>+ *  * Neither the name Intel Corporation nor the names of its</div><div class='add'>+ *    contributors may be used to endorse or promote products derived</div><div class='add'>+ *    from this software without specific prior written permission.</div><div class='add'>+ *</div><div class='add'>+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS</div><div class='add'>+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT</div><div class='add'>+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR</div><div class='add'>+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT</div><div class='add'>+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,</div><div class='add'>+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT</div><div class='add'>+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,</div><div class='add'>+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY</div><div class='add'>+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='add'>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE</div><div class='add'>+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ *</div><div class='add'>+ *****************************************************************************/</div><div class='add'>+#ifndef __iwl_modparams_h__</div><div class='add'>+#define __iwl_modparams_h__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;net/mac80211.h&gt;</div><div class='add'>+</div><div class='add'>+extern struct iwl_mod_params iwlwifi_mod_params;</div><div class='add'>+</div><div class='add'>+enum iwl_power_level {</div><div class='add'>+	IWL_POWER_INDEX_1,</div><div class='add'>+	IWL_POWER_INDEX_2,</div><div class='add'>+	IWL_POWER_INDEX_3,</div><div class='add'>+	IWL_POWER_INDEX_4,</div><div class='add'>+	IWL_POWER_INDEX_5,</div><div class='add'>+	IWL_POWER_NUM</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define IWL_DISABLE_HT_ALL	BIT(0)</div><div class='add'>+#define IWL_DISABLE_HT_TXAGG	BIT(1)</div><div class='add'>+#define IWL_DISABLE_HT_RXAGG	BIT(2)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct iwl_mod_params</div><div class='add'>+ *</div><div class='add'>+ * Holds the module parameters</div><div class='add'>+ *</div><div class='add'>+ * @sw_crypto: using hardware encryption, default = 0</div><div class='add'>+ * @disable_11n: disable 11n capabilities, default = 0,</div><div class='add'>+ *	use IWL_DISABLE_HT_* constants</div><div class='add'>+ * @amsdu_size_8K: enable 8K amsdu size, default = 1</div><div class='add'>+ * @restart_fw: restart firmware, default = 1</div><div class='add'>+ * @plcp_check: enable plcp health check, default = true</div><div class='add'>+ * @wd_disable: enable stuck queue check, default = 0</div><div class='add'>+ * @bt_coex_active: enable bt coex, default = true</div><div class='add'>+ * @led_mode: system default, default = 0</div><div class='add'>+ * @power_save: disable power save, default = false</div><div class='add'>+ * @power_level: power level, default = 1</div><div class='add'>+ * @debug_level: levels are IWL_DL_*</div><div class='add'>+ * @ant_coupling: antenna coupling in dB, default = 0</div><div class='add'>+ * @bt_ch_announce: BT channel inhibition, default = enable</div><div class='add'>+ * @auto_agg: enable agg. without check, default = true</div><div class='add'>+ * @disable_5ghz: disable 5GHz capability, default = false</div><div class='add'>+ */</div><div class='add'>+struct iwl_mod_params {</div><div class='add'>+	int sw_crypto;</div><div class='add'>+	unsigned int disable_11n;</div><div class='add'>+	int amsdu_size_8K;</div><div class='add'>+	int restart_fw;</div><div class='add'>+	bool plcp_check;</div><div class='add'>+	int  wd_disable;</div><div class='add'>+	bool bt_coex_active;</div><div class='add'>+	int led_mode;</div><div class='add'>+	bool power_save;</div><div class='add'>+	int power_level;</div><div class='add'>+	u32 debug_level;</div><div class='add'>+	int ant_coupling;</div><div class='add'>+	bool bt_ch_announce;</div><div class='add'>+	bool auto_agg;</div><div class='add'>+	bool disable_5ghz;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* #__iwl_modparams_h__ */</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-notif-wait.c b/drivers/net/wireless/iwlwifi/iwl-notif-wait.c<br/>index 88dc4a0f96b4..0066b899fe5c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-notif-wait.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-notif-wait.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-notif-wait.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-notif-wait.c</a></div><div class='hunk'>@@ -75,21 +75,45 @@ void iwl_notification_wait_init(struct iwl_notif_wait_data *notif_wait)</div><div class='ctx'> void iwl_notification_wait_notify(struct iwl_notif_wait_data *notif_wait,</div><div class='ctx'> 				  struct iwl_rx_packet *pkt)</div><div class='ctx'> {</div><div class='add'>+	bool triggered = false;</div><div class='add'>+</div><div class='ctx'> 	if (!list_empty(&amp;notif_wait-&gt;notif_waits)) {</div><div class='ctx'> 		struct iwl_notification_wait *w;</div><div class='ctx'> </div><div class='ctx'> 		spin_lock(&amp;notif_wait-&gt;notif_wait_lock);</div><div class='ctx'> 		list_for_each_entry(w, &amp;notif_wait-&gt;notif_waits, list) {</div><div class='del'>-			if (w-&gt;cmd != pkt-&gt;hdr.cmd)</div><div class='add'>+			int i;</div><div class='add'>+			bool found = false;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * If it already finished (triggered) or has been</div><div class='add'>+			 * aborted then don't evaluate it again to avoid races,</div><div class='add'>+			 * Otherwise the function could be called again even</div><div class='add'>+			 * though it returned true before</div><div class='add'>+			 */</div><div class='add'>+			if (w-&gt;triggered || w-&gt;aborted)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; w-&gt;n_cmds; i++) {</div><div class='add'>+				if (w-&gt;cmds[i] == pkt-&gt;hdr.cmd) {</div><div class='add'>+					found = true;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			if (!found)</div><div class='ctx'> 				continue;</div><div class='del'>-			w-&gt;triggered = true;</div><div class='del'>-			if (w-&gt;fn)</div><div class='del'>-				w-&gt;fn(notif_wait, pkt, w-&gt;fn_data);</div><div class='add'>+</div><div class='add'>+			if (!w-&gt;fn || w-&gt;fn(notif_wait, pkt, w-&gt;fn_data)) {</div><div class='add'>+				w-&gt;triggered = true;</div><div class='add'>+				triggered = true;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		spin_unlock(&amp;notif_wait-&gt;notif_wait_lock);</div><div class='ctx'> </div><div class='del'>-		wake_up_all(&amp;notif_wait-&gt;notif_waitq);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (triggered)</div><div class='add'>+		wake_up_all(&amp;notif_wait-&gt;notif_waitq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void iwl_abort_notification_waits(struct iwl_notif_wait_data *notif_wait)</div><div class='hunk'>@@ -109,14 +133,18 @@ void iwl_abort_notification_waits(struct iwl_notif_wait_data *notif_wait)</div><div class='ctx'> void</div><div class='ctx'> iwl_init_notification_wait(struct iwl_notif_wait_data *notif_wait,</div><div class='ctx'> 			   struct iwl_notification_wait *wait_entry,</div><div class='del'>-			   u8 cmd,</div><div class='del'>-			   void (*fn)(struct iwl_notif_wait_data *notif_wait,</div><div class='add'>+			   const u8 *cmds, int n_cmds,</div><div class='add'>+			   bool (*fn)(struct iwl_notif_wait_data *notif_wait,</div><div class='ctx'> 				      struct iwl_rx_packet *pkt, void *data),</div><div class='ctx'> 			   void *fn_data)</div><div class='ctx'> {</div><div class='add'>+	if (WARN_ON(n_cmds &gt; MAX_NOTIF_CMDS))</div><div class='add'>+		n_cmds = MAX_NOTIF_CMDS;</div><div class='add'>+</div><div class='ctx'> 	wait_entry-&gt;fn = fn;</div><div class='ctx'> 	wait_entry-&gt;fn_data = fn_data;</div><div class='del'>-	wait_entry-&gt;cmd = cmd;</div><div class='add'>+	wait_entry-&gt;n_cmds = n_cmds;</div><div class='add'>+	memcpy(wait_entry-&gt;cmds, cmds, n_cmds);</div><div class='ctx'> 	wait_entry-&gt;triggered = false;</div><div class='ctx'> 	wait_entry-&gt;aborted = false;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-notif-wait.h b/drivers/net/wireless/iwlwifi/iwl-notif-wait.h<br/>index 5e8af957aa7b..821523100cf1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-notif-wait.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-notif-wait.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-notif-wait.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-notif-wait.h</a></div><div class='hunk'>@@ -72,11 +72,19 @@ struct iwl_notif_wait_data {</div><div class='ctx'> 	wait_queue_head_t notif_waitq;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define MAX_NOTIF_CMDS	5</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct iwl_notification_wait - notification wait entry</div><div class='ctx'>  * @list: list head for global list</div><div class='del'>- * @fn: function called with the notification</div><div class='del'>- * @cmd: command ID</div><div class='add'>+ * @fn: Function called with the notification. If the function</div><div class='add'>+ *	returns true, the wait is over, if it returns false then</div><div class='add'>+ *	the waiter stays blocked. If no function is given, any</div><div class='add'>+ *	of the listed commands will unblock the waiter.</div><div class='add'>+ * @cmds: command IDs</div><div class='add'>+ * @n_cmds: number of command IDs</div><div class='add'>+ * @triggered: waiter should be woken up</div><div class='add'>+ * @aborted: wait was aborted</div><div class='ctx'>  *</div><div class='ctx'>  * This structure is not used directly, to wait for a</div><div class='ctx'>  * notification declare it on the stack, and call</div><div class='hunk'>@@ -93,11 +101,12 @@ struct iwl_notif_wait_data {</div><div class='ctx'> struct iwl_notification_wait {</div><div class='ctx'> 	struct list_head list;</div><div class='ctx'> </div><div class='del'>-	void (*fn)(struct iwl_notif_wait_data *notif_data,</div><div class='add'>+	bool (*fn)(struct iwl_notif_wait_data *notif_data,</div><div class='ctx'> 		   struct iwl_rx_packet *pkt, void *data);</div><div class='ctx'> 	void *fn_data;</div><div class='ctx'> </div><div class='del'>-	u8 cmd;</div><div class='add'>+	u8 cmds[MAX_NOTIF_CMDS];</div><div class='add'>+	u8 n_cmds;</div><div class='ctx'> 	bool triggered, aborted;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -112,8 +121,8 @@ void iwl_abort_notification_waits(struct iwl_notif_wait_data *notif_data);</div><div class='ctx'> void __acquires(wait_entry)</div><div class='ctx'> iwl_init_notification_wait(struct iwl_notif_wait_data *notif_data,</div><div class='ctx'> 			   struct iwl_notification_wait *wait_entry,</div><div class='del'>-			   u8 cmd,</div><div class='del'>-			   void (*fn)(struct iwl_notif_wait_data *notif_data,</div><div class='add'>+			   const u8 *cmds, int n_cmds,</div><div class='add'>+			   bool (*fn)(struct iwl_notif_wait_data *notif_data,</div><div class='ctx'> 				      struct iwl_rx_packet *pkt, void *data),</div><div class='ctx'> 			   void *fn_data);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-op-mode.h b/drivers/net/wireless/iwlwifi/iwl-op-mode.h<br/>index 6ea4163ff56a..4ef742b28e08 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-op-mode.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-op-mode.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-op-mode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-op-mode.h</a></div><div class='hunk'>@@ -69,6 +69,7 @@ struct sk_buff;</div><div class='ctx'> struct iwl_device_cmd;</div><div class='ctx'> struct iwl_rx_cmd_buffer;</div><div class='ctx'> struct iwl_fw;</div><div class='add'>+struct iwl_cfg;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * DOC: Operational mode - what is it ?</div><div class='hunk'>@@ -111,10 +112,10 @@ struct iwl_fw;</div><div class='ctx'>  * @rx: Rx notification to the op_mode. rxb is the Rx buffer itself. Cmd is the</div><div class='ctx'>  *	HCMD the this Rx responds to.</div><div class='ctx'>  *	Must be atomic.</div><div class='del'>- * @queue_full: notifies that a HW queue is full. Ac is the ac of the queue</div><div class='add'>+ * @queue_full: notifies that a HW queue is full.</div><div class='ctx'>  *	Must be atomic</div><div class='ctx'>  * @queue_not_full: notifies that a HW queue is not full any more.</div><div class='del'>- *	Ac is the ac of the queue. Must be atomic</div><div class='add'>+ *	Must be atomic</div><div class='ctx'>  * @hw_rf_kill:notifies of a change in the HW rf kill switch. True means that</div><div class='ctx'>  *	the radio is killed. Must be atomic.</div><div class='ctx'>  * @free_skb: allows the transport layer to free skbs that haven't been</div><div class='hunk'>@@ -125,20 +126,23 @@ struct iwl_fw;</div><div class='ctx'>  * @cmd_queue_full: Called when the command queue gets full. Must be atomic.</div><div class='ctx'>  * @nic_config: configure NIC, called before firmware is started.</div><div class='ctx'>  *	May sleep</div><div class='add'>+ * @wimax_active: invoked when WiMax becomes active.  Must be atomic.</div><div class='ctx'>  */</div><div class='ctx'> struct iwl_op_mode_ops {</div><div class='ctx'> 	struct iwl_op_mode *(*start)(struct iwl_trans *trans,</div><div class='add'>+				     const struct iwl_cfg *cfg,</div><div class='ctx'> 				     const struct iwl_fw *fw);</div><div class='ctx'> 	void (*stop)(struct iwl_op_mode *op_mode);</div><div class='ctx'> 	int (*rx)(struct iwl_op_mode *op_mode, struct iwl_rx_cmd_buffer *rxb,</div><div class='ctx'> 		  struct iwl_device_cmd *cmd);</div><div class='del'>-	void (*queue_full)(struct iwl_op_mode *op_mode, u8 ac);</div><div class='del'>-	void (*queue_not_full)(struct iwl_op_mode *op_mode, u8 ac);</div><div class='add'>+	void (*queue_full)(struct iwl_op_mode *op_mode, int queue);</div><div class='add'>+	void (*queue_not_full)(struct iwl_op_mode *op_mode, int queue);</div><div class='ctx'> 	void (*hw_rf_kill)(struct iwl_op_mode *op_mode, bool state);</div><div class='ctx'> 	void (*free_skb)(struct iwl_op_mode *op_mode, struct sk_buff *skb);</div><div class='ctx'> 	void (*nic_error)(struct iwl_op_mode *op_mode);</div><div class='ctx'> 	void (*cmd_queue_full)(struct iwl_op_mode *op_mode);</div><div class='ctx'> 	void (*nic_config)(struct iwl_op_mode *op_mode);</div><div class='add'>+	void (*wimax_active)(struct iwl_op_mode *op_mode);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -169,15 +173,16 @@ static inline int iwl_op_mode_rx(struct iwl_op_mode *op_mode,</div><div class='ctx'> 	return op_mode-&gt;ops-&gt;rx(op_mode, rxb, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void iwl_op_mode_queue_full(struct iwl_op_mode *op_mode, u8 ac)</div><div class='add'>+static inline void iwl_op_mode_queue_full(struct iwl_op_mode *op_mode,</div><div class='add'>+					  int queue)</div><div class='ctx'> {</div><div class='del'>-	op_mode-&gt;ops-&gt;queue_full(op_mode, ac);</div><div class='add'>+	op_mode-&gt;ops-&gt;queue_full(op_mode, queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void iwl_op_mode_queue_not_full(struct iwl_op_mode *op_mode,</div><div class='del'>-					      u8 ac)</div><div class='add'>+					      int queue)</div><div class='ctx'> {</div><div class='del'>-	op_mode-&gt;ops-&gt;queue_not_full(op_mode, ac);</div><div class='add'>+	op_mode-&gt;ops-&gt;queue_not_full(op_mode, queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void iwl_op_mode_hw_rf_kill(struct iwl_op_mode *op_mode,</div><div class='hunk'>@@ -208,6 +213,11 @@ static inline void iwl_op_mode_nic_config(struct iwl_op_mode *op_mode)</div><div class='ctx'> 	op_mode-&gt;ops-&gt;nic_config(op_mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void iwl_op_mode_wimax_active(struct iwl_op_mode *op_mode)</div><div class='add'>+{</div><div class='add'>+	op_mode-&gt;ops-&gt;wimax_active(op_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*****************************************************</div><div class='ctx'> * Op mode layers implementations</div><div class='ctx'> ******************************************************/</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-pci.c b/drivers/net/wireless/iwlwifi/iwl-pci.c<br/>index c5e339ee918b..0c8a1c2d8847 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-pci.c</a></div><div class='hunk'>@@ -60,17 +60,18 @@</div><div class='ctx'>  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/pci-aspm.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "iwl-io.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='del'>-#include "iwl-csr.h"</div><div class='ctx'> #include "iwl-cfg.h"</div><div class='ctx'> #include "iwl-drv.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='add'>+#include "iwl-trans-pcie-int.h"</div><div class='ctx'> </div><div class='ctx'> #define IWL_PCI_DEVICE(dev, subdev, cfg) \</div><div class='ctx'> 	.vendor = PCI_VENDOR_ID_INTEL,  .device = (dev), \</div><div class='hunk'>@@ -261,61 +262,46 @@ MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);</div><div class='ctx'> /* PCI registers */</div><div class='ctx'> #define PCI_CFG_RETRY_TIMEOUT	0x041</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_IWLWIFI_IDI</div><div class='add'>+</div><div class='ctx'> static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='ctx'> 	const struct iwl_cfg *cfg = (struct iwl_cfg *)(ent-&gt;driver_data);</div><div class='del'>-	struct iwl_shared *shrd;</div><div class='ctx'> 	struct iwl_trans *iwl_trans;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	shrd = kzalloc(sizeof(*iwl_trans-&gt;shrd), GFP_KERNEL);</div><div class='del'>-	if (!shrd) {</div><div class='del'>-		dev_printk(KERN_ERR, &amp;pdev-&gt;dev,</div><div class='del'>-			   "Couldn't allocate iwl_shared");</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto out_free_bus;</div><div class='del'>-	}</div><div class='add'>+	struct iwl_trans_pcie *trans_pcie;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_IWLWIFI_IDI</div><div class='del'>-	iwl_trans = iwl_trans_idi_alloc(shrd, pdev, ent);</div><div class='del'>-#else</div><div class='del'>-	iwl_trans = iwl_trans_pcie_alloc(shrd, pdev, ent);</div><div class='del'>-#endif</div><div class='del'>-	if (iwl_trans == NULL) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto out_free_bus;</div><div class='del'>-	}</div><div class='add'>+	iwl_trans = iwl_trans_pcie_alloc(pdev, ent, cfg);</div><div class='add'>+	if (iwl_trans == NULL)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	shrd-&gt;trans = iwl_trans;</div><div class='ctx'> 	pci_set_drvdata(pdev, iwl_trans);</div><div class='ctx'> </div><div class='del'>-	err = iwl_drv_start(shrd, iwl_trans, cfg);</div><div class='del'>-	if (err)</div><div class='add'>+	trans_pcie = IWL_TRANS_GET_PCIE_TRANS(iwl_trans);</div><div class='add'>+	trans_pcie-&gt;drv = iwl_drv_start(iwl_trans, cfg);</div><div class='add'>+	if (!trans_pcie-&gt;drv)</div><div class='ctx'> 		goto out_free_trans;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_free_trans:</div><div class='del'>-	iwl_trans_free(iwl_trans);</div><div class='add'>+	iwl_trans_pcie_free(iwl_trans);</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='del'>-out_free_bus:</div><div class='del'>-	kfree(shrd);</div><div class='del'>-	return err;</div><div class='add'>+	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __devexit iwl_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct iwl_trans *iwl_trans = pci_get_drvdata(pdev);</div><div class='del'>-	struct iwl_shared *shrd = iwl_trans-&gt;shrd;</div><div class='add'>+	struct iwl_trans *trans = pci_get_drvdata(pdev);</div><div class='add'>+	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> </div><div class='del'>-	iwl_drv_stop(shrd);</div><div class='del'>-	iwl_trans_free(shrd-&gt;trans);</div><div class='add'>+	iwl_drv_stop(trans_pcie-&gt;drv);</div><div class='add'>+	iwl_trans_pcie_free(trans);</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='del'>-</div><div class='del'>-	kfree(shrd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#endif /* CONFIG_IWLWIFI_IDI */</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='ctx'> </div><div class='ctx'> static int iwl_pci_suspend(struct device *device)</div><div class='hunk'>@@ -360,6 +346,15 @@ static SIMPLE_DEV_PM_OPS(iwl_dev_pm_ops, iwl_pci_suspend, iwl_pci_resume);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_IWLWIFI_IDI</div><div class='add'>+/*</div><div class='add'>+ * Defined externally in iwl-idi.c</div><div class='add'>+ */</div><div class='add'>+int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);</div><div class='add'>+void __devexit iwl_pci_remove(struct pci_dev *pdev);</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_IWLWIFI_IDI */</div><div class='add'>+</div><div class='ctx'> static struct pci_driver iwl_pci_driver = {</div><div class='ctx'> 	.name = DRV_NAME,</div><div class='ctx'> 	.id_table = iwl_hw_card_ids,</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-power.c b/drivers/net/wireless/iwlwifi/iwl-power.c<br/>index 958d9d09aee3..544ddf17f5bd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-power.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-power.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-power.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-power.c</a></div><div class='hunk'>@@ -37,13 +37,12 @@</div><div class='ctx'> #include "iwl-eeprom.h"</div><div class='ctx'> #include "iwl-dev.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-commands.h"</div><div class='ctx'> #include "iwl-debug.h"</div><div class='ctx'> #include "iwl-power.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='add'>+#include "iwl-modparams.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Setting power level allows the card to go to sleep when not busy.</div><div class='hunk'>@@ -167,7 +166,7 @@ static void iwl_static_sleep_cmd(struct iwl_priv *priv,</div><div class='ctx'> 	u8 skip;</div><div class='ctx'> 	u32 slp_itrvl;</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;adv_pm) {</div><div class='add'>+	if (priv-&gt;cfg-&gt;adv_pm) {</div><div class='ctx'> 		table = apm_range_2;</div><div class='ctx'> 		if (period &lt;= IWL_DTIM_RANGE_1_MAX)</div><div class='ctx'> 			table = apm_range_1;</div><div class='hunk'>@@ -215,13 +214,13 @@ static void iwl_static_sleep_cmd(struct iwl_priv *priv,</div><div class='ctx'> 	else</div><div class='ctx'> 		cmd-&gt;flags &amp;= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;base_params-&gt;shadow_reg_enable)</div><div class='add'>+	if (priv-&gt;cfg-&gt;base_params-&gt;shadow_reg_enable)</div><div class='ctx'> 		cmd-&gt;flags |= IWL_POWER_SHADOW_REG_ENA;</div><div class='ctx'> 	else</div><div class='ctx'> 		cmd-&gt;flags &amp;= ~IWL_POWER_SHADOW_REG_ENA;</div><div class='ctx'> </div><div class='ctx'> 	if (iwl_advanced_bt_coexist(priv)) {</div><div class='del'>-		if (!cfg(priv)-&gt;bt_params-&gt;bt_sco_disable)</div><div class='add'>+		if (!priv-&gt;cfg-&gt;bt_params-&gt;bt_sco_disable)</div><div class='ctx'> 			cmd-&gt;flags |= IWL_POWER_BT_SCO_ENA;</div><div class='ctx'> 		else</div><div class='ctx'> 			cmd-&gt;flags &amp;= ~IWL_POWER_BT_SCO_ENA;</div><div class='hunk'>@@ -254,6 +253,8 @@ static void iwl_static_sleep_cmd(struct iwl_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n",</div><div class='ctx'> 			skip, period);</div><div class='add'>+	/* The power level here is 0-4 (used as array index), but user expects</div><div class='add'>+	to see 1-5 (according to spec). */</div><div class='ctx'> 	IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -268,61 +269,6 @@ static void iwl_power_sleep_cam_cmd(struct iwl_priv *priv,</div><div class='ctx'> 	IWL_DEBUG_POWER(priv, "Sleep command for CAM\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_power_fill_sleep_cmd(struct iwl_priv *priv,</div><div class='del'>-				     struct iwl_powertable_cmd *cmd,</div><div class='del'>-				     int dynps_ms, int wakeup_period)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * These are the original power level 3 sleep successions. The</div><div class='del'>-	 * device may behave better with such succession and was also</div><div class='del'>-	 * only tested with that. Just like the original sleep commands,</div><div class='del'>-	 * also adjust the succession here to the wakeup_period below.</div><div class='del'>-	 * The ranges are the same as for the sleep commands, 0-2, 3-9</div><div class='del'>-	 * and &gt;10, which is selected based on the DTIM interval for</div><div class='del'>-	 * the sleep index but here we use the wakeup period since that</div><div class='del'>-	 * is what we need to do for the latency requirements.</div><div class='del'>-	 */</div><div class='del'>-	static const u8 slp_succ_r0[IWL_POWER_VEC_SIZE] = { 2, 2, 2, 2, 2 };</div><div class='del'>-	static const u8 slp_succ_r1[IWL_POWER_VEC_SIZE] = { 2, 4, 6, 7, 9 };</div><div class='del'>-	static const u8 slp_succ_r2[IWL_POWER_VEC_SIZE] = { 2, 7, 9, 9, 0xFF };</div><div class='del'>-	const u8 *slp_succ = slp_succ_r0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (wakeup_period &gt; IWL_DTIM_RANGE_0_MAX)</div><div class='del'>-		slp_succ = slp_succ_r1;</div><div class='del'>-	if (wakeup_period &gt; IWL_DTIM_RANGE_1_MAX)</div><div class='del'>-		slp_succ = slp_succ_r2;</div><div class='del'>-</div><div class='del'>-	memset(cmd, 0, sizeof(*cmd));</div><div class='del'>-</div><div class='del'>-	cmd-&gt;flags = IWL_POWER_DRIVER_ALLOW_SLEEP_MSK |</div><div class='del'>-		     IWL_POWER_FAST_PD; /* no use seeing frames for others */</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;power_data.bus_pm)</div><div class='del'>-		cmd-&gt;flags |= IWL_POWER_PCI_PM_MSK;</div><div class='del'>-</div><div class='del'>-	if (cfg(priv)-&gt;base_params-&gt;shadow_reg_enable)</div><div class='del'>-		cmd-&gt;flags |= IWL_POWER_SHADOW_REG_ENA;</div><div class='del'>-	else</div><div class='del'>-		cmd-&gt;flags &amp;= ~IWL_POWER_SHADOW_REG_ENA;</div><div class='del'>-</div><div class='del'>-	if (iwl_advanced_bt_coexist(priv)) {</div><div class='del'>-		if (!cfg(priv)-&gt;bt_params-&gt;bt_sco_disable)</div><div class='del'>-			cmd-&gt;flags |= IWL_POWER_BT_SCO_ENA;</div><div class='del'>-		else</div><div class='del'>-			cmd-&gt;flags &amp;= ~IWL_POWER_BT_SCO_ENA;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cmd-&gt;rx_data_timeout = cpu_to_le32(1000 * dynps_ms);</div><div class='del'>-	cmd-&gt;tx_data_timeout = cpu_to_le32(1000 * dynps_ms);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; IWL_POWER_VEC_SIZE; i++)</div><div class='del'>-		cmd-&gt;sleep_interval[i] =</div><div class='del'>-			cpu_to_le32(min_t(int, slp_succ[i], wakeup_period));</div><div class='del'>-</div><div class='del'>-	IWL_DEBUG_POWER(priv, "Automatic sleep command\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	IWL_DEBUG_POWER(priv, "Sending power/sleep command\n");</div><div class='hunk'>@@ -350,7 +296,7 @@ static void iwl_power_build_cmd(struct iwl_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;wowlan)</div><div class='ctx'> 		iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, dtimper);</div><div class='del'>-	else if (!cfg(priv)-&gt;base_params-&gt;no_idle_support &amp;&amp;</div><div class='add'>+	else if (!priv-&gt;cfg-&gt;base_params-&gt;no_idle_support &amp;&amp;</div><div class='ctx'> 		 priv-&gt;hw-&gt;conf.flags &amp; IEEE80211_CONF_IDLE)</div><div class='ctx'> 		iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, 20);</div><div class='ctx'> 	else if (iwl_tt_is_low_power_state(priv)) {</div><div class='hunk'>@@ -363,18 +309,17 @@ static void iwl_power_build_cmd(struct iwl_priv *priv,</div><div class='ctx'> 		iwl_static_sleep_cmd(priv, cmd,</div><div class='ctx'> 				     priv-&gt;power_data.debug_sleep_level_override,</div><div class='ctx'> 				     dtimper);</div><div class='del'>-	else if (iwlagn_mod_params.no_sleep_autoadjust) {</div><div class='del'>-		if (iwlagn_mod_params.power_level &gt; IWL_POWER_INDEX_1 &amp;&amp;</div><div class='del'>-		    iwlagn_mod_params.power_level &lt;= IWL_POWER_INDEX_5)</div><div class='add'>+	else {</div><div class='add'>+		/* Note that the user parameter is 1-5 (according to spec),</div><div class='add'>+		but we pass 0-4 because it acts as an array index. */</div><div class='add'>+		if (iwlwifi_mod_params.power_level &gt; IWL_POWER_INDEX_1 &amp;&amp;</div><div class='add'>+		    iwlwifi_mod_params.power_level &lt;= IWL_POWER_NUM)</div><div class='ctx'> 			iwl_static_sleep_cmd(priv, cmd,</div><div class='del'>-				iwlagn_mod_params.power_level, dtimper);</div><div class='add'>+				iwlwifi_mod_params.power_level - 1, dtimper);</div><div class='ctx'> 		else</div><div class='ctx'> 			iwl_static_sleep_cmd(priv, cmd,</div><div class='ctx'> 				IWL_POWER_INDEX_1, dtimper);</div><div class='del'>-	} else</div><div class='del'>-		iwl_power_fill_sleep_cmd(priv, cmd,</div><div class='del'>-					 priv-&gt;hw-&gt;conf.dynamic_ps_timeout,</div><div class='del'>-					 priv-&gt;hw-&gt;conf.max_sleep_period);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int iwl_power_set_mode(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd,</div><div class='hunk'>@@ -403,12 +348,12 @@ int iwl_power_set_mode(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cmd-&gt;flags &amp; IWL_POWER_DRIVER_ALLOW_SLEEP_MSK)</div><div class='del'>-		set_bit(STATUS_POWER_PMI, &amp;priv-&gt;shrd-&gt;status);</div><div class='add'>+		iwl_dvm_set_pmi(priv, true);</div><div class='ctx'> </div><div class='ctx'> 	ret = iwl_set_power(priv, cmd);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		if (!(cmd-&gt;flags &amp; IWL_POWER_DRIVER_ALLOW_SLEEP_MSK))</div><div class='del'>-			clear_bit(STATUS_POWER_PMI, &amp;priv-&gt;shrd-&gt;status);</div><div class='add'>+			iwl_dvm_set_pmi(priv, false);</div><div class='ctx'> </div><div class='ctx'> 		if (update_chains)</div><div class='ctx'> 			iwl_update_chain_flags(priv);</div><div class='hunk'>@@ -436,7 +381,7 @@ int iwl_power_update_mode(struct iwl_priv *priv, bool force)</div><div class='ctx'> /* initialize to default */</div><div class='ctx'> void iwl_power_initialize(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	priv-&gt;power_data.bus_pm = trans(priv)-&gt;pm_support;</div><div class='add'>+	priv-&gt;power_data.bus_pm = priv-&gt;trans-&gt;pm_support;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;power_data.debug_sleep_level_override = -1;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-power.h b/drivers/net/wireless/iwlwifi/iwl-power.h<br/>index 07a19fce5fdc..21afc92efacb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-power.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-power.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-power.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-power.h</a></div><div class='hunk'>@@ -30,15 +30,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "iwl-commands.h"</div><div class='ctx'> </div><div class='del'>-enum iwl_power_level {</div><div class='del'>-	IWL_POWER_INDEX_1,</div><div class='del'>-	IWL_POWER_INDEX_2,</div><div class='del'>-	IWL_POWER_INDEX_3,</div><div class='del'>-	IWL_POWER_INDEX_4,</div><div class='del'>-	IWL_POWER_INDEX_5,</div><div class='del'>-	IWL_POWER_NUM</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct iwl_power_mgr {</div><div class='ctx'> 	struct iwl_powertable_cmd sleep_cmd;</div><div class='ctx'> 	struct iwl_powertable_cmd sleep_cmd_next;</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-prph.h b/drivers/net/wireless/iwlwifi/iwl-prph.h<br/>index 75dc20bd965b..3b1069290fa9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-prph.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-prph.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-prph.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-prph.h</a></div><div class='hunk'>@@ -223,12 +223,33 @@</div><div class='ctx'> #define SCD_AIT			(SCD_BASE + 0x0c)</div><div class='ctx'> #define SCD_TXFACT		(SCD_BASE + 0x10)</div><div class='ctx'> #define SCD_ACTIVE		(SCD_BASE + 0x14)</div><div class='del'>-#define SCD_QUEUE_WRPTR(x)	(SCD_BASE + 0x18 + (x) * 4)</div><div class='del'>-#define SCD_QUEUE_RDPTR(x)	(SCD_BASE + 0x68 + (x) * 4)</div><div class='ctx'> #define SCD_QUEUECHAIN_SEL	(SCD_BASE + 0xe8)</div><div class='ctx'> #define SCD_AGGR_SEL		(SCD_BASE + 0x248)</div><div class='ctx'> #define SCD_INTERRUPT_MASK	(SCD_BASE + 0x108)</div><div class='del'>-#define SCD_QUEUE_STATUS_BITS(x)	(SCD_BASE + 0x10c + (x) * 4)</div><div class='add'>+</div><div class='add'>+static inline unsigned int SCD_QUEUE_WRPTR(unsigned int chnl)</div><div class='add'>+{</div><div class='add'>+	if (chnl &lt; 20)</div><div class='add'>+		return SCD_BASE + 0x18 + chnl * 4;</div><div class='add'>+	WARN_ON_ONCE(chnl &gt;= 32);</div><div class='add'>+	return SCD_BASE + 0x284 + (chnl - 20) * 4;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int SCD_QUEUE_RDPTR(unsigned int chnl)</div><div class='add'>+{</div><div class='add'>+	if (chnl &lt; 20)</div><div class='add'>+		return SCD_BASE + 0x68 + chnl * 4;</div><div class='add'>+	WARN_ON_ONCE(chnl &gt;= 32);</div><div class='add'>+	return SCD_BASE + 0x2B4 + (chnl - 20) * 4;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int SCD_QUEUE_STATUS_BITS(unsigned int chnl)</div><div class='add'>+{</div><div class='add'>+	if (chnl &lt; 20)</div><div class='add'>+		return SCD_BASE + 0x10c + chnl * 4;</div><div class='add'>+	WARN_ON_ONCE(chnl &gt;= 32);</div><div class='add'>+	return SCD_BASE + 0x384 + (chnl - 20) * 4;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*********************** END TX SCHEDULER *************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c<br/>index 902efe4bc898..031d8e21f82f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-scan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-scan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-scan.c</a></div><div class='hunk'>@@ -32,7 +32,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "iwl-eeprom.h"</div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='hunk'>@@ -53,6 +52,7 @@</div><div class='ctx'> #define IWL_PASSIVE_DWELL_TIME_52   (10)</div><div class='ctx'> #define IWL_PASSIVE_DWELL_BASE      (100)</div><div class='ctx'> #define IWL_CHANNEL_TUNE_TIME       5</div><div class='add'>+#define MAX_SCAN_CHANNEL	    50</div><div class='ctx'> </div><div class='ctx'> static int iwl_send_scan_abort(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='hunk'>@@ -69,7 +69,7 @@ static int iwl_send_scan_abort(struct iwl_priv *priv)</div><div class='ctx'> 	if (!test_bit(STATUS_READY, &amp;priv-&gt;status) ||</div><div class='ctx'> 	    !test_bit(STATUS_GEO_CONFIGURED, &amp;priv-&gt;status) ||</div><div class='ctx'> 	    !test_bit(STATUS_SCAN_HW, &amp;priv-&gt;status) ||</div><div class='del'>-	    test_bit(STATUS_FW_ERROR, &amp;priv-&gt;shrd-&gt;status))</div><div class='add'>+	    test_bit(STATUS_FW_ERROR, &amp;priv-&gt;status))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	ret = iwl_dvm_send_cmd(priv, &amp;cmd);</div><div class='hunk'>@@ -451,6 +451,46 @@ static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv,</div><div class='ctx'> 	return iwl_limit_dwell(priv, passive);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Return valid, unused, channel for a passive scan to reset the RF */</div><div class='add'>+static u8 iwl_get_single_channel_number(struct iwl_priv *priv,</div><div class='add'>+				 enum ieee80211_band band)</div><div class='add'>+{</div><div class='add'>+	const struct iwl_channel_info *ch_info;</div><div class='add'>+	int i;</div><div class='add'>+	u8 channel = 0;</div><div class='add'>+	u8 min, max;</div><div class='add'>+	struct iwl_rxon_context *ctx;</div><div class='add'>+</div><div class='add'>+	if (band == IEEE80211_BAND_5GHZ) {</div><div class='add'>+		min = 14;</div><div class='add'>+		max = priv-&gt;channel_count;</div><div class='add'>+	} else {</div><div class='add'>+		min = 0;</div><div class='add'>+		max = 14;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = min; i &lt; max; i++) {</div><div class='add'>+		bool busy = false;</div><div class='add'>+</div><div class='add'>+		for_each_context(priv, ctx) {</div><div class='add'>+			busy = priv-&gt;channel_info[i].channel ==</div><div class='add'>+				le16_to_cpu(ctx-&gt;staging.channel);</div><div class='add'>+			if (busy)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (busy)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		channel = priv-&gt;channel_info[i].channel;</div><div class='add'>+		ch_info = iwl_get_channel_info(priv, band, channel);</div><div class='add'>+		if (is_channel_valid(ch_info))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return channel;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int iwl_get_single_channel_for_scan(struct iwl_priv *priv,</div><div class='ctx'> 					   struct ieee80211_vif *vif,</div><div class='ctx'> 					   enum ieee80211_band band,</div><div class='hunk'>@@ -577,7 +617,8 @@ static int iwl_get_channels_for_scan(struct iwl_priv *priv,</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static u16 iwl_fill_probe_req(struct ieee80211_mgmt *frame, const u8 *ta,</div><div class='del'>-			      const u8 *ies, int ie_len, int left)</div><div class='add'>+			      const u8 *ies, int ie_len, const u8 *ssid,</div><div class='add'>+			      u8 ssid_len, int left)</div><div class='ctx'> {</div><div class='ctx'> 	int len = 0;</div><div class='ctx'> 	u8 *pos = NULL;</div><div class='hunk'>@@ -599,14 +640,18 @@ static u16 iwl_fill_probe_req(struct ieee80211_mgmt *frame, const u8 *ta,</div><div class='ctx'> 	/* ...next IE... */</div><div class='ctx'> 	pos = &amp;frame-&gt;u.probe_req.variable[0];</div><div class='ctx'> </div><div class='del'>-	/* fill in our indirect SSID IE */</div><div class='del'>-	left -= 2;</div><div class='add'>+	/* fill in our SSID IE */</div><div class='add'>+	left -= ssid_len + 2;</div><div class='ctx'> 	if (left &lt; 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	*pos++ = WLAN_EID_SSID;</div><div class='del'>-	*pos++ = 0;</div><div class='add'>+	*pos++ = ssid_len;</div><div class='add'>+	if (ssid &amp;&amp; ssid_len) {</div><div class='add'>+		memcpy(pos, ssid, ssid_len);</div><div class='add'>+		pos += ssid_len;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	len += 2;</div><div class='add'>+	len += ssid_len + 2;</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(left &lt; ie_len))</div><div class='ctx'> 		return len;</div><div class='hunk'>@@ -633,13 +678,22 @@ static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)</div><div class='ctx'> 	u16 rx_chain = 0;</div><div class='ctx'> 	enum ieee80211_band band;</div><div class='ctx'> 	u8 n_probes = 0;</div><div class='del'>-	u8 rx_ant = hw_params(priv).valid_rx_ant;</div><div class='add'>+	u8 rx_ant = priv-&gt;hw_params.valid_rx_ant;</div><div class='ctx'> 	u8 rate;</div><div class='ctx'> 	bool is_active = false;</div><div class='ctx'> 	int  chan_mod;</div><div class='ctx'> 	u8 active_chains;</div><div class='del'>-	u8 scan_tx_antennas = hw_params(priv).valid_tx_ant;</div><div class='add'>+	u8 scan_tx_antennas = priv-&gt;hw_params.valid_tx_ant;</div><div class='ctx'> 	int ret;</div><div class='add'>+	int scan_cmd_size = sizeof(struct iwl_scan_cmd) +</div><div class='add'>+			    MAX_SCAN_CHANNEL * sizeof(struct iwl_scan_channel) +</div><div class='add'>+			    priv-&gt;fw-&gt;ucode_capa.max_probe_length;</div><div class='add'>+	const u8 *ssid = NULL;</div><div class='add'>+	u8 ssid_len = 0;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(priv-&gt;scan_request &amp;&amp;</div><div class='add'>+			 priv-&gt;scan_request-&gt;n_channels &gt; MAX_SCAN_CHANNEL))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;priv-&gt;mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -647,8 +701,7 @@ static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)</div><div class='ctx'> 		ctx = iwl_rxon_ctx_from_vif(vif);</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;scan_cmd) {</div><div class='del'>-		priv-&gt;scan_cmd = kmalloc(sizeof(struct iwl_scan_cmd) +</div><div class='del'>-					 IWL_MAX_SCAN_SIZE, GFP_KERNEL);</div><div class='add'>+		priv-&gt;scan_cmd = kmalloc(scan_cmd_size, GFP_KERNEL);</div><div class='ctx'> 		if (!priv-&gt;scan_cmd) {</div><div class='ctx'> 			IWL_DEBUG_SCAN(priv,</div><div class='ctx'> 				       "fail to allocate memory for scan\n");</div><div class='hunk'>@@ -656,7 +709,7 @@ static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	scan = priv-&gt;scan_cmd;</div><div class='del'>-	memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);</div><div class='add'>+	memset(scan, 0, scan_cmd_size);</div><div class='ctx'> </div><div class='ctx'> 	scan-&gt;quiet_plcp_th = IWL_PLCP_QUIET_THRESH;</div><div class='ctx'> 	scan-&gt;quiet_time = IWL_ACTIVE_QUIET_TIME;</div><div class='hunk'>@@ -707,10 +760,18 @@ static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)</div><div class='ctx'> 		if (priv-&gt;scan_request-&gt;n_ssids) {</div><div class='ctx'> 			int i, p = 0;</div><div class='ctx'> 			IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");</div><div class='del'>-			for (i = 0; i &lt; priv-&gt;scan_request-&gt;n_ssids; i++) {</div><div class='del'>-				/* always does wildcard anyway */</div><div class='del'>-				if (!priv-&gt;scan_request-&gt;ssids[i].ssid_len)</div><div class='del'>-					continue;</div><div class='add'>+			/*</div><div class='add'>+			 * The highest priority SSID is inserted to the</div><div class='add'>+			 * probe request template.</div><div class='add'>+			 */</div><div class='add'>+			ssid_len = priv-&gt;scan_request-&gt;ssids[0].ssid_len;</div><div class='add'>+			ssid = priv-&gt;scan_request-&gt;ssids[0].ssid;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Invert the order of ssids, the firmware will invert</div><div class='add'>+			 * it back.</div><div class='add'>+			 */</div><div class='add'>+			for (i = priv-&gt;scan_request-&gt;n_ssids - 1; i &gt;= 1; i--) {</div><div class='ctx'> 				scan-&gt;direct_scan[p].id = WLAN_EID_SSID;</div><div class='ctx'> 				scan-&gt;direct_scan[p].len =</div><div class='ctx'> 					priv-&gt;scan_request-&gt;ssids[i].ssid_len;</div><div class='hunk'>@@ -751,8 +812,8 @@ static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)</div><div class='ctx'> 		 * Internal scans are passive, so we can indiscriminately set</div><div class='ctx'> 		 * the BT ignore flag on 2.4 GHz since it applies to TX only.</div><div class='ctx'> 		 */</div><div class='del'>-		if (cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-		    cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist)</div><div class='add'>+		if (priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+		    priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist)</div><div class='ctx'> 			scan-&gt;tx_cmd.tx_flags |= TX_CMD_FLG_IGNORE_BT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IEEE80211_BAND_5GHZ:</div><div class='hunk'>@@ -793,12 +854,9 @@ static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)</div><div class='ctx'> </div><div class='ctx'> 	band = priv-&gt;scan_band;</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;scan_rx_antennas[band])</div><div class='del'>-		rx_ant = cfg(priv)-&gt;scan_rx_antennas[band];</div><div class='del'>-</div><div class='ctx'> 	if (band == IEEE80211_BAND_2GHZ &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='add'>+	    priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+	    priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='ctx'> 		/* transmit 2.4 GHz probes only on first antenna */</div><div class='ctx'> 		scan_tx_antennas = first_antenna(scan_tx_antennas);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -809,8 +867,12 @@ static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)</div><div class='ctx'> 	rate_flags |= iwl_ant_idx_to_flags(priv-&gt;scan_tx_ant[band]);</div><div class='ctx'> 	scan-&gt;tx_cmd.rate_n_flags = iwl_hw_set_rate_n_flags(rate, rate_flags);</div><div class='ctx'> </div><div class='del'>-	/* In power save mode use one chain, otherwise use all chains */</div><div class='del'>-	if (test_bit(STATUS_POWER_PMI, &amp;priv-&gt;shrd-&gt;status)) {</div><div class='add'>+	/*</div><div class='add'>+	 * In power save mode while associated use one chain,</div><div class='add'>+	 * otherwise use all chains</div><div class='add'>+	 */</div><div class='add'>+	if (test_bit(STATUS_POWER_PMI, &amp;priv-&gt;status) &amp;&amp;</div><div class='add'>+	    !(priv-&gt;hw-&gt;conf.flags &amp; IEEE80211_CONF_IDLE)) {</div><div class='ctx'> 		/* rx_ant has been set to all valid chains previously */</div><div class='ctx'> 		active_chains = rx_ant &amp;</div><div class='ctx'> 				((u8)(priv-&gt;chain_noise_data.active_chains));</div><div class='hunk'>@@ -822,8 +884,8 @@ static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)</div><div class='ctx'> </div><div class='ctx'> 		rx_ant = first_antenna(active_chains);</div><div class='ctx'> 	}</div><div class='del'>-	if (cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist &amp;&amp;</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+	    priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist &amp;&amp;</div><div class='ctx'> 	    priv-&gt;bt_full_concurrent) {</div><div class='ctx'> 		/* operated as 1x1 in full concurrency mode */</div><div class='ctx'> 		rx_ant = first_antenna(rx_ant);</div><div class='hunk'>@@ -831,7 +893,7 @@ static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)</div><div class='ctx'> </div><div class='ctx'> 	/* MIMO is not used here, but value is required */</div><div class='ctx'> 	rx_chain |=</div><div class='del'>-		hw_params(priv).valid_rx_ant &lt;&lt; RXON_RX_CHAIN_VALID_POS;</div><div class='add'>+		priv-&gt;hw_params.valid_rx_ant &lt;&lt; RXON_RX_CHAIN_VALID_POS;</div><div class='ctx'> 	rx_chain |= rx_ant &lt;&lt; RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;</div><div class='ctx'> 	rx_chain |= rx_ant &lt;&lt; RXON_RX_CHAIN_FORCE_SEL_POS;</div><div class='ctx'> 	rx_chain |= 0x1 &lt;&lt; RXON_RX_CHAIN_DRIVER_FORCE_POS;</div><div class='hunk'>@@ -843,7 +905,8 @@ static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)</div><div class='ctx'> 					vif-&gt;addr,</div><div class='ctx'> 					priv-&gt;scan_request-&gt;ie,</div><div class='ctx'> 					priv-&gt;scan_request-&gt;ie_len,</div><div class='del'>-					IWL_MAX_SCAN_SIZE - sizeof(*scan));</div><div class='add'>+					ssid, ssid_len,</div><div class='add'>+					scan_cmd_size - sizeof(*scan));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IWL_SCAN_RADIO_RESET:</div><div class='ctx'> 	case IWL_SCAN_ROC:</div><div class='hunk'>@@ -851,7 +914,8 @@ static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)</div><div class='ctx'> 		cmd_len = iwl_fill_probe_req(</div><div class='ctx'> 					(struct ieee80211_mgmt *)scan-&gt;data,</div><div class='ctx'> 					iwl_bcast_addr, NULL, 0,</div><div class='del'>-					IWL_MAX_SCAN_SIZE - sizeof(*scan));</div><div class='add'>+					NULL, 0,</div><div class='add'>+					scan_cmd_size - sizeof(*scan));</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		BUG();</div><div class='hunk'>@@ -944,7 +1008,7 @@ static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)</div><div class='ctx'> </div><div class='ctx'> void iwl_init_scan_params(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	u8 ant_idx = fls(hw_params(priv).valid_tx_ant) - 1;</div><div class='add'>+	u8 ant_idx = fls(priv-&gt;hw_params.valid_tx_ant) - 1;</div><div class='ctx'> 	if (!priv-&gt;scan_tx_ant[IEEE80211_BAND_5GHZ])</div><div class='ctx'> 		priv-&gt;scan_tx_ant[IEEE80211_BAND_5GHZ] = ant_idx;</div><div class='ctx'> 	if (!priv-&gt;scan_tx_ant[IEEE80211_BAND_2GHZ])</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-testmode.c b/drivers/net/wireless/iwlwifi/iwl-testmode.c<br/>index 76f7f9251436..060aac3e22f1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-testmode.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-testmode.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-testmode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-testmode.c</a></div><div class='hunk'>@@ -71,7 +71,6 @@</div><div class='ctx'> #include &lt;net/netlink.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-debug.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='hunk'>@@ -184,9 +183,10 @@ static void iwl_testmode_ucode_rx_pkt(struct iwl_priv *priv,</div><div class='ctx'> 			 "Run out of memory for messages to user space ?\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	NLA_PUT_U32(skb, IWL_TM_ATTR_COMMAND, IWL_TM_CMD_DEV2APP_UCODE_RX_PKT);</div><div class='del'>-	/* the length doesn't include len_n_flags field, so add it manually */</div><div class='del'>-	NLA_PUT(skb, IWL_TM_ATTR_UCODE_RX_PKT, length + sizeof(__le32), data);</div><div class='add'>+	if (nla_put_u32(skb, IWL_TM_ATTR_COMMAND, IWL_TM_CMD_DEV2APP_UCODE_RX_PKT) ||</div><div class='add'>+	    /* the length doesn't include len_n_flags field, so add it manually */</div><div class='add'>+	    nla_put(skb, IWL_TM_ATTR_UCODE_RX_PKT, length + sizeof(__le32), data))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	cfg80211_testmode_event(skb, GFP_ATOMIC);</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='hunk'>@@ -218,7 +218,7 @@ static void iwl_trace_cleanup(struct iwl_priv *priv)</div><div class='ctx'> 	if (priv-&gt;testmode_trace.trace_enabled) {</div><div class='ctx'> 		if (priv-&gt;testmode_trace.cpu_addr &amp;&amp;</div><div class='ctx'> 		    priv-&gt;testmode_trace.dma_addr)</div><div class='del'>-			dma_free_coherent(trans(priv)-&gt;dev,</div><div class='add'>+			dma_free_coherent(priv-&gt;trans-&gt;dev,</div><div class='ctx'> 					priv-&gt;testmode_trace.total_size,</div><div class='ctx'> 					priv-&gt;testmode_trace.cpu_addr,</div><div class='ctx'> 					priv-&gt;testmode_trace.dma_addr);</div><div class='hunk'>@@ -314,8 +314,9 @@ static int iwl_testmode_ucode(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> 	memcpy(reply_buf, &amp;(pkt-&gt;hdr), reply_len);</div><div class='ctx'> 	iwl_free_resp(&amp;cmd);</div><div class='ctx'> </div><div class='del'>-	NLA_PUT_U32(skb, IWL_TM_ATTR_COMMAND, IWL_TM_CMD_DEV2APP_UCODE_RX_PKT);</div><div class='del'>-	NLA_PUT(skb, IWL_TM_ATTR_UCODE_RX_PKT, reply_len, reply_buf);</div><div class='add'>+	if (nla_put_u32(skb, IWL_TM_ATTR_COMMAND, IWL_TM_CMD_DEV2APP_UCODE_RX_PKT) ||</div><div class='add'>+	    nla_put(skb, IWL_TM_ATTR_UCODE_RX_PKT, reply_len, reply_buf))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	return cfg80211_testmode_reply(skb);</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='hunk'>@@ -371,7 +372,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32:</div><div class='del'>-		val32 = iwl_read_direct32(trans(priv), ofs);</div><div class='add'>+		val32 = iwl_read_direct32(priv-&gt;trans, ofs);</div><div class='ctx'> 		IWL_INFO(priv, "32bit value to read 0x%x\n", val32);</div><div class='ctx'> </div><div class='ctx'> 		skb = cfg80211_testmode_alloc_reply_skb(hw-&gt;wiphy, 20);</div><div class='hunk'>@@ -379,7 +380,8 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> 			IWL_ERR(priv, "Memory allocation fail\n");</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='del'>-		NLA_PUT_U32(skb, IWL_TM_ATTR_REG_VALUE32, val32);</div><div class='add'>+		if (nla_put_u32(skb, IWL_TM_ATTR_REG_VALUE32, val32))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		status = cfg80211_testmode_reply(skb);</div><div class='ctx'> 		if (status &lt; 0)</div><div class='ctx'> 			IWL_ERR(priv, "Error sending msg : %d\n", status);</div><div class='hunk'>@@ -391,7 +393,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			val32 = nla_get_u32(tb[IWL_TM_ATTR_REG_VALUE32]);</div><div class='ctx'> 			IWL_INFO(priv, "32bit value to write 0x%x\n", val32);</div><div class='del'>-			iwl_write_direct32(trans(priv), ofs, val32);</div><div class='add'>+			iwl_write_direct32(priv-&gt;trans, ofs, val32);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8:</div><div class='hunk'>@@ -401,7 +403,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			val8 = nla_get_u8(tb[IWL_TM_ATTR_REG_VALUE8]);</div><div class='ctx'> 			IWL_INFO(priv, "8bit value to write 0x%x\n", val8);</div><div class='del'>-			iwl_write8(trans(priv), ofs, val8);</div><div class='add'>+			iwl_write8(priv-&gt;trans, ofs, val8);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -420,10 +422,13 @@ nla_put_failure:</div><div class='ctx'> static int iwl_testmode_cfg_init_calib(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_notification_wait calib_wait;</div><div class='add'>+	static const u8 calib_complete[] = {</div><div class='add'>+		CALIBRATION_COMPLETE_NOTIFICATION</div><div class='add'>+	};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	iwl_init_notification_wait(&amp;priv-&gt;notif_wait, &amp;calib_wait,</div><div class='del'>-				   CALIBRATION_COMPLETE_NOTIFICATION,</div><div class='add'>+				   calib_complete, ARRAY_SIZE(calib_complete),</div><div class='ctx'> 				   NULL, NULL);</div><div class='ctx'> 	ret = iwl_init_alive_start(priv);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -461,7 +466,7 @@ cfg_init_calib_error:</div><div class='ctx'> static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='del'>-	struct iwl_trans *trans = trans(priv);</div><div class='add'>+	struct iwl_trans *trans = priv-&gt;trans;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	unsigned char *rsp_data_ptr = NULL;</div><div class='ctx'> 	int status = 0, rsp_data_len = 0;</div><div class='hunk'>@@ -470,18 +475,19 @@ static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> </div><div class='ctx'> 	switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) {</div><div class='ctx'> 	case IWL_TM_CMD_APP2DEV_GET_DEVICENAME:</div><div class='del'>-		rsp_data_ptr = (unsigned char *)cfg(priv)-&gt;name;</div><div class='del'>-		rsp_data_len = strlen(cfg(priv)-&gt;name);</div><div class='add'>+		rsp_data_ptr = (unsigned char *)priv-&gt;cfg-&gt;name;</div><div class='add'>+		rsp_data_len = strlen(priv-&gt;cfg-&gt;name);</div><div class='ctx'> 		skb = cfg80211_testmode_alloc_reply_skb(hw-&gt;wiphy,</div><div class='ctx'> 							rsp_data_len + 20);</div><div class='ctx'> 		if (!skb) {</div><div class='ctx'> 			IWL_ERR(priv, "Memory allocation fail\n");</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='del'>-		NLA_PUT_U32(skb, IWL_TM_ATTR_COMMAND,</div><div class='del'>-			    IWL_TM_CMD_DEV2APP_SYNC_RSP);</div><div class='del'>-		NLA_PUT(skb, IWL_TM_ATTR_SYNC_RSP,</div><div class='del'>-			rsp_data_len, rsp_data_ptr);</div><div class='add'>+		if (nla_put_u32(skb, IWL_TM_ATTR_COMMAND,</div><div class='add'>+				IWL_TM_CMD_DEV2APP_SYNC_RSP) ||</div><div class='add'>+		    nla_put(skb, IWL_TM_ATTR_SYNC_RSP,</div><div class='add'>+			    rsp_data_len, rsp_data_ptr))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		status = cfg80211_testmode_reply(skb);</div><div class='ctx'> 		if (status &lt; 0)</div><div class='ctx'> 			IWL_ERR(priv, "Error sending msg : %d\n", status);</div><div class='hunk'>@@ -529,18 +535,19 @@ static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IWL_TM_CMD_APP2DEV_GET_EEPROM:</div><div class='del'>-		if (priv-&gt;shrd-&gt;eeprom) {</div><div class='add'>+		if (priv-&gt;eeprom) {</div><div class='ctx'> 			skb = cfg80211_testmode_alloc_reply_skb(hw-&gt;wiphy,</div><div class='del'>-				cfg(priv)-&gt;base_params-&gt;eeprom_size + 20);</div><div class='add'>+				priv-&gt;cfg-&gt;base_params-&gt;eeprom_size + 20);</div><div class='ctx'> 			if (!skb) {</div><div class='ctx'> 				IWL_ERR(priv, "Memory allocation fail\n");</div><div class='ctx'> 				return -ENOMEM;</div><div class='ctx'> 			}</div><div class='del'>-			NLA_PUT_U32(skb, IWL_TM_ATTR_COMMAND,</div><div class='del'>-				IWL_TM_CMD_DEV2APP_EEPROM_RSP);</div><div class='del'>-			NLA_PUT(skb, IWL_TM_ATTR_EEPROM,</div><div class='del'>-				cfg(priv)-&gt;base_params-&gt;eeprom_size,</div><div class='del'>-				priv-&gt;shrd-&gt;eeprom);</div><div class='add'>+			if (nla_put_u32(skb, IWL_TM_ATTR_COMMAND,</div><div class='add'>+					IWL_TM_CMD_DEV2APP_EEPROM_RSP) ||</div><div class='add'>+			    nla_put(skb, IWL_TM_ATTR_EEPROM,</div><div class='add'>+				    priv-&gt;cfg-&gt;base_params-&gt;eeprom_size,</div><div class='add'>+				    priv-&gt;eeprom))</div><div class='add'>+				goto nla_put_failure;</div><div class='ctx'> 			status = cfg80211_testmode_reply(skb);</div><div class='ctx'> 			if (status &lt; 0)</div><div class='ctx'> 				IWL_ERR(priv, "Error sending msg : %d\n",</div><div class='hunk'>@@ -566,15 +573,16 @@ static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> 			IWL_ERR(priv, "Memory allocation fail\n");</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='del'>-		NLA_PUT_U32(skb, IWL_TM_ATTR_FW_VERSION,</div><div class='del'>-			    priv-&gt;fw-&gt;ucode_ver);</div><div class='add'>+		if (nla_put_u32(skb, IWL_TM_ATTR_FW_VERSION,</div><div class='add'>+				priv-&gt;fw-&gt;ucode_ver))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		status = cfg80211_testmode_reply(skb);</div><div class='ctx'> 		if (status &lt; 0)</div><div class='ctx'> 			IWL_ERR(priv, "Error sending msg : %d\n", status);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IWL_TM_CMD_APP2DEV_GET_DEVICE_ID:</div><div class='del'>-		devid = trans(priv)-&gt;hw_id;</div><div class='add'>+		devid = priv-&gt;trans-&gt;hw_id;</div><div class='ctx'> 		IWL_INFO(priv, "hw version: 0x%x\n", devid);</div><div class='ctx'> </div><div class='ctx'> 		skb = cfg80211_testmode_alloc_reply_skb(hw-&gt;wiphy, 20);</div><div class='hunk'>@@ -582,7 +590,8 @@ static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> 			IWL_ERR(priv, "Memory allocation fail\n");</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='del'>-		NLA_PUT_U32(skb, IWL_TM_ATTR_DEVICE_ID, devid);</div><div class='add'>+		if (nla_put_u32(skb, IWL_TM_ATTR_DEVICE_ID, devid))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		status = cfg80211_testmode_reply(skb);</div><div class='ctx'> 		if (status &lt; 0)</div><div class='ctx'> 			IWL_ERR(priv, "Error sending msg : %d\n", status);</div><div class='hunk'>@@ -598,13 +607,14 @@ static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> 			IWL_ERR(priv, "No uCode has not been loaded\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		} else {</div><div class='del'>-			img = &amp;priv-&gt;fw-&gt;img[priv-&gt;shrd-&gt;ucode_type];</div><div class='add'>+			img = &amp;priv-&gt;fw-&gt;img[priv-&gt;cur_ucode];</div><div class='ctx'> 			inst_size = img-&gt;sec[IWL_UCODE_SECTION_INST].len;</div><div class='ctx'> 			data_size = img-&gt;sec[IWL_UCODE_SECTION_DATA].len;</div><div class='ctx'> 		}</div><div class='del'>-		NLA_PUT_U32(skb, IWL_TM_ATTR_FW_TYPE, priv-&gt;shrd-&gt;ucode_type);</div><div class='del'>-		NLA_PUT_U32(skb, IWL_TM_ATTR_FW_INST_SIZE, inst_size);</div><div class='del'>-		NLA_PUT_U32(skb, IWL_TM_ATTR_FW_DATA_SIZE, data_size);</div><div class='add'>+		if (nla_put_u32(skb, IWL_TM_ATTR_FW_TYPE, priv-&gt;cur_ucode) ||</div><div class='add'>+		    nla_put_u32(skb, IWL_TM_ATTR_FW_INST_SIZE, inst_size) ||</div><div class='add'>+		    nla_put_u32(skb, IWL_TM_ATTR_FW_DATA_SIZE, data_size))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		status = cfg80211_testmode_reply(skb);</div><div class='ctx'> 		if (status &lt; 0)</div><div class='ctx'> 			IWL_ERR(priv, "Error sending msg : %d\n", status);</div><div class='hunk'>@@ -639,7 +649,7 @@ static int iwl_testmode_trace(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> 	struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	int status = 0;</div><div class='del'>-	struct device *dev = trans(priv)-&gt;dev;</div><div class='add'>+	struct device *dev = priv-&gt;trans-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) {</div><div class='ctx'> 	case IWL_TM_CMD_APP2DEV_BEGIN_TRACE:</div><div class='hunk'>@@ -678,9 +688,10 @@ static int iwl_testmode_trace(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> 			iwl_trace_cleanup(priv);</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='del'>-		NLA_PUT(skb, IWL_TM_ATTR_TRACE_ADDR,</div><div class='del'>-			sizeof(priv-&gt;testmode_trace.dma_addr),</div><div class='del'>-			(u64 *)&amp;priv-&gt;testmode_trace.dma_addr);</div><div class='add'>+		if (nla_put(skb, IWL_TM_ATTR_TRACE_ADDR,</div><div class='add'>+			    sizeof(priv-&gt;testmode_trace.dma_addr),</div><div class='add'>+			    (u64 *)&amp;priv-&gt;testmode_trace.dma_addr))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		status = cfg80211_testmode_reply(skb);</div><div class='ctx'> 		if (status &lt; 0) {</div><div class='ctx'> 			IWL_ERR(priv, "Error sending msg : %d\n", status);</div><div class='hunk'>@@ -725,9 +736,10 @@ static int iwl_testmode_trace_dump(struct ieee80211_hw *hw,</div><div class='ctx'> 			length = priv-&gt;testmode_trace.buff_size %</div><div class='ctx'> 				DUMP_CHUNK_SIZE;</div><div class='ctx'> </div><div class='del'>-		NLA_PUT(skb, IWL_TM_ATTR_TRACE_DUMP, length,</div><div class='del'>-			priv-&gt;testmode_trace.trace_addr +</div><div class='del'>-			(DUMP_CHUNK_SIZE * idx));</div><div class='add'>+		if (nla_put(skb, IWL_TM_ATTR_TRACE_DUMP, length,</div><div class='add'>+			    priv-&gt;testmode_trace.trace_addr +</div><div class='add'>+			    (DUMP_CHUNK_SIZE * idx)))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		idx++;</div><div class='ctx'> 		cb-&gt;args[4] = idx;</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -779,7 +791,7 @@ static int iwl_testmode_ownership(struct ieee80211_hw *hw, struct nlattr **tb)</div><div class='ctx'> </div><div class='ctx'> static int iwl_testmode_indirect_read(struct iwl_priv *priv, u32 addr, u32 size)</div><div class='ctx'> {</div><div class='del'>-	struct iwl_trans *trans = trans(priv);</div><div class='add'>+	struct iwl_trans *trans = priv-&gt;trans;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -819,7 +831,7 @@ static int iwl_testmode_indirect_read(struct iwl_priv *priv, u32 addr, u32 size)</div><div class='ctx'> static int iwl_testmode_indirect_write(struct iwl_priv *priv, u32 addr,</div><div class='ctx'> 	u32 size, unsigned char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct iwl_trans *trans = trans(priv);</div><div class='add'>+	struct iwl_trans *trans = priv-&gt;trans;</div><div class='ctx'> 	u32 val, i;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -922,9 +934,10 @@ static int iwl_testmode_buffer_dump(struct ieee80211_hw *hw,</div><div class='ctx'> 			length = priv-&gt;testmode_mem.buff_size %</div><div class='ctx'> 				DUMP_CHUNK_SIZE;</div><div class='ctx'> </div><div class='del'>-		NLA_PUT(skb, IWL_TM_ATTR_BUFFER_DUMP, length,</div><div class='del'>-			priv-&gt;testmode_mem.buff_addr +</div><div class='del'>-			(DUMP_CHUNK_SIZE * idx));</div><div class='add'>+		if (nla_put(skb, IWL_TM_ATTR_BUFFER_DUMP, length,</div><div class='add'>+			    priv-&gt;testmode_mem.buff_addr +</div><div class='add'>+			    (DUMP_CHUNK_SIZE * idx)))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		idx++;</div><div class='ctx'> 		cb-&gt;args[4] = idx;</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h b/drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h<br/>index 1c2fe87bd7e2..e959207c630a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h</a></div><div class='hunk'>@@ -34,17 +34,15 @@</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;linux/wait.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/timer.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iwl-fh.h"</div><div class='ctx'> #include "iwl-csr.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='ctx'> #include "iwl-debug.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-op-mode.h"</div><div class='ctx'> </div><div class='del'>-struct iwl_tx_queue;</div><div class='del'>-struct iwl_queue;</div><div class='ctx'> struct iwl_host_cmd;</div><div class='ctx'> </div><div class='ctx'> /*This file includes the declaration that are internal to the</div><div class='hunk'>@@ -136,21 +134,14 @@ static inline int iwl_queue_dec_wrap(int index, int n_bd)</div><div class='ctx'> 	return --index &amp; (n_bd - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This queue number is required for proper operation</div><div class='del'>- * because the ucode will stop/start the scheduler as</div><div class='del'>- * required.</div><div class='del'>- */</div><div class='del'>-#define IWL_IPAN_MCAST_QUEUE		8</div><div class='del'>-</div><div class='ctx'> struct iwl_cmd_meta {</div><div class='ctx'> 	/* only for SYNC commands, iff the reply skb is wanted */</div><div class='ctx'> 	struct iwl_host_cmd *source;</div><div class='ctx'> </div><div class='del'>-	u32 flags;</div><div class='del'>-</div><div class='ctx'> 	DEFINE_DMA_UNMAP_ADDR(mapping);</div><div class='ctx'> 	DEFINE_DMA_UNMAP_LEN(len);</div><div class='add'>+</div><div class='add'>+	u32 flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -188,72 +179,66 @@ struct iwl_queue {</div><div class='ctx'> 				* space less than this */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define TFD_TX_CMD_SLOTS 256</div><div class='add'>+#define TFD_CMD_SLOTS 32</div><div class='add'>+</div><div class='add'>+struct iwl_pcie_tx_queue_entry {</div><div class='add'>+	struct iwl_device_cmd *cmd;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct iwl_cmd_meta meta;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct iwl_tx_queue - Tx Queue for DMA</div><div class='ctx'>  * @q: generic Rx/Tx queue descriptor</div><div class='del'>- * @bd: base of circular buffer of TFDs</div><div class='del'>- * @cmd: array of command/TX buffer pointers</div><div class='del'>- * @meta: array of meta data for each command/tx buffer</div><div class='del'>- * @dma_addr_cmd: physical address of cmd/tx buffer array</div><div class='del'>- * @txb: array of per-TFD driver data</div><div class='del'>- * lock: queue lock</div><div class='del'>- * @time_stamp: time (in jiffies) of last read_ptr change</div><div class='add'>+ * @tfds: transmit frame descriptors (DMA memory)</div><div class='add'>+ * @entries: transmit entries (driver state)</div><div class='add'>+ * @lock: queue lock</div><div class='add'>+ * @stuck_timer: timer that fires if queue gets stuck</div><div class='add'>+ * @trans_pcie: pointer back to transport (for timer)</div><div class='ctx'>  * @need_update: indicates need to update read/write index</div><div class='del'>- * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled</div><div class='del'>- * @sta_id: valid if sched_retry is set</div><div class='del'>- * @tid: valid if sched_retry is set</div><div class='add'>+ * @active: stores if queue is active</div><div class='ctx'>  *</div><div class='ctx'>  * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame</div><div class='ctx'>  * descriptors) and required locking structures.</div><div class='ctx'>  */</div><div class='del'>-#define TFD_TX_CMD_SLOTS 256</div><div class='del'>-#define TFD_CMD_SLOTS 32</div><div class='del'>-</div><div class='ctx'> struct iwl_tx_queue {</div><div class='ctx'> 	struct iwl_queue q;</div><div class='ctx'> 	struct iwl_tfd *tfds;</div><div class='del'>-	struct iwl_device_cmd **cmd;</div><div class='del'>-	struct iwl_cmd_meta *meta;</div><div class='del'>-	struct sk_buff **skbs;</div><div class='add'>+	struct iwl_pcie_tx_queue_entry *entries;</div><div class='ctx'> 	spinlock_t lock;</div><div class='del'>-	unsigned long time_stamp;</div><div class='add'>+	struct timer_list stuck_timer;</div><div class='add'>+	struct iwl_trans_pcie *trans_pcie;</div><div class='ctx'> 	u8 need_update;</div><div class='del'>-	u8 sched_retry;</div><div class='ctx'> 	u8 active;</div><div class='del'>-	u8 swq_id;</div><div class='del'>-</div><div class='del'>-	u16 sta_id;</div><div class='del'>-	u16 tid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct iwl_trans_pcie - PCIe transport specific data</div><div class='ctx'>  * @rxq: all the RX queue data</div><div class='ctx'>  * @rx_replenish: work that will be called when buffers need to be allocated</div><div class='add'>+ * @drv - pointer to iwl_drv</div><div class='ctx'>  * @trans: pointer to the generic transport area</div><div class='ctx'>  * @irq - the irq number for the device</div><div class='ctx'>  * @irq_requested: true when the irq has been requested</div><div class='ctx'>  * @scd_base_addr: scheduler sram base address in SRAM</div><div class='ctx'>  * @scd_bc_tbls: pointer to the byte count table of the scheduler</div><div class='ctx'>  * @kw: keep warm address</div><div class='del'>- * @ac_to_fifo: to what fifo is a specifc AC mapped ?</div><div class='del'>- * @ac_to_queue: to what tx queue  is a specifc AC mapped ?</div><div class='del'>- * @mcast_queue:</div><div class='del'>- * @txq: Tx DMA processing queues</div><div class='del'>- * @txq_ctx_active_msk: what queue is active</div><div class='del'>- * queue_stopped: tracks what queue is stopped</div><div class='del'>- * queue_stop_count: tracks what SW queue is stopped</div><div class='ctx'>  * @pci_dev: basic pci-network driver stuff</div><div class='ctx'>  * @hw_base: pci hardware address support</div><div class='ctx'>  * @ucode_write_complete: indicates that the ucode has been copied.</div><div class='ctx'>  * @ucode_write_waitq: wait queue for uCode load</div><div class='ctx'>  * @status - transport specific status flags</div><div class='ctx'>  * @cmd_queue - command queue number</div><div class='add'>+ * @rx_buf_size_8k: 8 kB RX buffer size</div><div class='add'>+ * @rx_page_order: page order for receive buffer size</div><div class='add'>+ * @wd_timeout: queue watchdog timeout (jiffies)</div><div class='ctx'>  */</div><div class='ctx'> struct iwl_trans_pcie {</div><div class='ctx'> 	struct iwl_rx_queue rxq;</div><div class='ctx'> 	struct work_struct rx_replenish;</div><div class='ctx'> 	struct iwl_trans *trans;</div><div class='add'>+	struct iwl_drv *drv;</div><div class='ctx'> </div><div class='ctx'> 	/* INT ICT Table */</div><div class='ctx'> 	__le32 *ict_tbl;</div><div class='hunk'>@@ -272,16 +257,9 @@ struct iwl_trans_pcie {</div><div class='ctx'> 	struct iwl_dma_ptr scd_bc_tbls;</div><div class='ctx'> 	struct iwl_dma_ptr kw;</div><div class='ctx'> </div><div class='del'>-	const u8 *ac_to_fifo[NUM_IWL_RXON_CTX];</div><div class='del'>-	const u8 *ac_to_queue[NUM_IWL_RXON_CTX];</div><div class='del'>-	u8 mcast_queue[NUM_IWL_RXON_CTX];</div><div class='del'>-	u8 agg_txq[IWLAGN_STATION_COUNT][IWL_MAX_TID_COUNT];</div><div class='del'>-</div><div class='ctx'> 	struct iwl_tx_queue *txq;</div><div class='del'>-	unsigned long txq_ctx_active_msk;</div><div class='del'>-#define IWL_MAX_HW_QUEUES	32</div><div class='add'>+	unsigned long queue_used[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)];</div><div class='ctx'> 	unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)];</div><div class='del'>-	atomic_t queue_stop_count[4];</div><div class='ctx'> </div><div class='ctx'> 	/* PCI bus related data */</div><div class='ctx'> 	struct pci_dev *pci_dev;</div><div class='hunk'>@@ -293,11 +271,41 @@ struct iwl_trans_pcie {</div><div class='ctx'> 	u8 cmd_queue;</div><div class='ctx'> 	u8 n_no_reclaim_cmds;</div><div class='ctx'> 	u8 no_reclaim_cmds[MAX_NO_RECLAIM_CMDS];</div><div class='add'>+	u8 setup_q_to_fifo[IWL_MAX_HW_QUEUES];</div><div class='add'>+	u8 n_q_to_fifo;</div><div class='add'>+</div><div class='add'>+	bool rx_buf_size_8k;</div><div class='add'>+	u32 rx_page_order;</div><div class='add'>+</div><div class='add'>+	const char **command_names;</div><div class='add'>+</div><div class='add'>+	/* queue watchdog */</div><div class='add'>+	unsigned long wd_timeout;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*****************************************************</div><div class='add'>+* DRIVER STATUS FUNCTIONS</div><div class='add'>+******************************************************/</div><div class='add'>+#define STATUS_HCMD_ACTIVE	0</div><div class='add'>+#define STATUS_DEVICE_ENABLED	1</div><div class='add'>+#define STATUS_TPOWER_PMI	2</div><div class='add'>+#define STATUS_INT_ENABLED	3</div><div class='add'>+</div><div class='ctx'> #define IWL_TRANS_GET_PCIE_TRANS(_iwl_trans) \</div><div class='ctx'> 	((struct iwl_trans_pcie *) ((_iwl_trans)-&gt;trans_specific))</div><div class='ctx'> </div><div class='add'>+static inline struct iwl_trans *</div><div class='add'>+iwl_trans_pcie_get_trans(struct iwl_trans_pcie *trans_pcie)</div><div class='add'>+{</div><div class='add'>+	return container_of((void *)trans_pcie, struct iwl_trans,</div><div class='add'>+			    trans_specific);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,</div><div class='add'>+				       const struct pci_device_id *ent,</div><div class='add'>+				       const struct iwl_cfg *cfg);</div><div class='add'>+void iwl_trans_pcie_free(struct iwl_trans *trans);</div><div class='add'>+</div><div class='ctx'> /*****************************************************</div><div class='ctx'> * RX</div><div class='ctx'> ******************************************************/</div><div class='hunk'>@@ -331,18 +339,15 @@ void iwl_tx_cmd_complete(struct iwl_trans *trans,</div><div class='ctx'> void iwl_trans_txq_update_byte_cnt_tbl(struct iwl_trans *trans,</div><div class='ctx'> 					   struct iwl_tx_queue *txq,</div><div class='ctx'> 					   u16 byte_cnt);</div><div class='del'>-int iwl_trans_pcie_tx_agg_disable(struct iwl_trans *trans,</div><div class='del'>-				  int sta_id, int tid);</div><div class='add'>+void iwl_trans_pcie_tx_agg_disable(struct iwl_trans *trans, int queue);</div><div class='ctx'> void iwl_trans_set_wr_ptrs(struct iwl_trans *trans, int txq_id, u32 index);</div><div class='ctx'> void iwl_trans_tx_queue_set_status(struct iwl_trans *trans,</div><div class='del'>-			     struct iwl_tx_queue *txq,</div><div class='del'>-			     int tx_fifo_id, int scd_retry);</div><div class='del'>-int iwl_trans_pcie_tx_agg_alloc(struct iwl_trans *trans, int sta_id, int tid);</div><div class='del'>-void iwl_trans_pcie_tx_agg_setup(struct iwl_trans *trans,</div><div class='del'>-				 enum iwl_rxon_context_id ctx,</div><div class='add'>+				   struct iwl_tx_queue *txq,</div><div class='add'>+				   int tx_fifo_id, bool active);</div><div class='add'>+void iwl_trans_pcie_tx_agg_setup(struct iwl_trans *trans, int queue, int fifo,</div><div class='ctx'> 				 int sta_id, int tid, int frame_limit, u16 ssn);</div><div class='ctx'> void iwlagn_txq_free_tfd(struct iwl_trans *trans, struct iwl_tx_queue *txq,</div><div class='del'>-	int index, enum dma_data_direction dma_dir);</div><div class='add'>+			 enum dma_data_direction dma_dir);</div><div class='ctx'> int iwl_tx_queue_reclaim(struct iwl_trans *trans, int txq_id, int index,</div><div class='ctx'> 			 struct sk_buff_head *skbs);</div><div class='ctx'> int iwl_queue_space(const struct iwl_queue *q);</div><div class='hunk'>@@ -350,8 +355,6 @@ int iwl_queue_space(const struct iwl_queue *q);</div><div class='ctx'> /*****************************************************</div><div class='ctx'> * Error handling</div><div class='ctx'> ******************************************************/</div><div class='del'>-int iwl_dump_nic_event_log(struct iwl_trans *trans, bool full_log,</div><div class='del'>-			    char **buf, bool display);</div><div class='ctx'> int iwl_dump_fh(struct iwl_trans *trans, char **buf, bool display);</div><div class='ctx'> void iwl_dump_csr(struct iwl_trans *trans);</div><div class='ctx'> </div><div class='hunk'>@@ -388,91 +391,28 @@ static inline void iwl_enable_rfkill_int(struct iwl_trans *trans)</div><div class='ctx'> 	iwl_write32(trans, CSR_INT_MASK, CSR_INT_BIT_RF_KILL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * we have 8 bits used like this:</div><div class='del'>- *</div><div class='del'>- * 7 6 5 4 3 2 1 0</div><div class='del'>- * | | | | | | | |</div><div class='del'>- * | | | | | | +-+-------- AC queue (0-3)</div><div class='del'>- * | | | | | |</div><div class='del'>- * | +-+-+-+-+------------ HW queue ID</div><div class='del'>- * |</div><div class='del'>- * +---------------------- unused</div><div class='del'>- */</div><div class='del'>-static inline void iwl_set_swq_id(struct iwl_tx_queue *txq, u8 ac, u8 hwq)</div><div class='del'>-{</div><div class='del'>-	BUG_ON(ac &gt; 3);   /* only have 2 bits */</div><div class='del'>-	BUG_ON(hwq &gt; 31); /* only use 5 bits */</div><div class='del'>-</div><div class='del'>-	txq-&gt;swq_id = (hwq &lt;&lt; 2) | ac;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u8 iwl_get_queue_ac(struct iwl_tx_queue *txq)</div><div class='del'>-{</div><div class='del'>-	return txq-&gt;swq_id &amp; 0x3;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void iwl_wake_queue(struct iwl_trans *trans,</div><div class='ctx'> 				  struct iwl_tx_queue *txq)</div><div class='ctx'> {</div><div class='del'>-	u8 queue = txq-&gt;swq_id;</div><div class='del'>-	u8 ac = queue &amp; 3;</div><div class='del'>-	u8 hwq = (queue &gt;&gt; 2) &amp; 0x1f;</div><div class='del'>-	struct iwl_trans_pcie *trans_pcie =</div><div class='del'>-		IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='del'>-</div><div class='del'>-	if (test_and_clear_bit(hwq, trans_pcie-&gt;queue_stopped)) {</div><div class='del'>-		if (atomic_dec_return(&amp;trans_pcie-&gt;queue_stop_count[ac]) &lt;= 0) {</div><div class='del'>-			iwl_op_mode_queue_not_full(trans-&gt;op_mode, ac);</div><div class='del'>-			IWL_DEBUG_TX_QUEUES(trans, "Wake hwq %d ac %d",</div><div class='del'>-					    hwq, ac);</div><div class='del'>-		} else {</div><div class='del'>-			IWL_DEBUG_TX_QUEUES(trans,</div><div class='del'>-				"Don't wake hwq %d ac %d stop count %d",</div><div class='del'>-				hwq, ac,</div><div class='del'>-				atomic_read(&amp;trans_pcie-&gt;queue_stop_count[ac]));</div><div class='del'>-		}</div><div class='add'>+	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_bit(txq-&gt;q.id, trans_pcie-&gt;queue_stopped)) {</div><div class='add'>+		IWL_DEBUG_TX_QUEUES(trans, "Wake hwq %d\n", txq-&gt;q.id);</div><div class='add'>+		iwl_op_mode_queue_not_full(trans-&gt;op_mode, txq-&gt;q.id);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void iwl_stop_queue(struct iwl_trans *trans,</div><div class='ctx'> 				  struct iwl_tx_queue *txq)</div><div class='ctx'> {</div><div class='del'>-	u8 queue = txq-&gt;swq_id;</div><div class='del'>-	u8 ac = queue &amp; 3;</div><div class='del'>-	u8 hwq = (queue &gt;&gt; 2) &amp; 0x1f;</div><div class='del'>-	struct iwl_trans_pcie *trans_pcie =</div><div class='del'>-		IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='del'>-</div><div class='del'>-	if (!test_and_set_bit(hwq, trans_pcie-&gt;queue_stopped)) {</div><div class='del'>-		if (atomic_inc_return(&amp;trans_pcie-&gt;queue_stop_count[ac]) &gt; 0) {</div><div class='del'>-			iwl_op_mode_queue_full(trans-&gt;op_mode, ac);</div><div class='del'>-			IWL_DEBUG_TX_QUEUES(trans,</div><div class='del'>-				"Stop hwq %d ac %d stop count %d",</div><div class='del'>-				hwq, ac,</div><div class='del'>-				atomic_read(&amp;trans_pcie-&gt;queue_stop_count[ac]));</div><div class='del'>-		} else {</div><div class='del'>-			IWL_DEBUG_TX_QUEUES(trans,</div><div class='del'>-				"Don't stop hwq %d ac %d stop count %d",</div><div class='del'>-				hwq, ac,</div><div class='del'>-				atomic_read(&amp;trans_pcie-&gt;queue_stop_count[ac]));</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		IWL_DEBUG_TX_QUEUES(trans, "stop hwq %d, but it is stopped",</div><div class='del'>-				    hwq);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void iwl_txq_ctx_activate(struct iwl_trans_pcie *trans_pcie,</div><div class='del'>-					int txq_id)</div><div class='del'>-{</div><div class='del'>-	set_bit(txq_id, &amp;trans_pcie-&gt;txq_ctx_active_msk);</div><div class='del'>-}</div><div class='add'>+	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> </div><div class='del'>-static inline void iwl_txq_ctx_deactivate(struct iwl_trans_pcie *trans_pcie,</div><div class='del'>-					  int txq_id)</div><div class='del'>-{</div><div class='del'>-	clear_bit(txq_id, &amp;trans_pcie-&gt;txq_ctx_active_msk);</div><div class='add'>+	if (!test_and_set_bit(txq-&gt;q.id, trans_pcie-&gt;queue_stopped)) {</div><div class='add'>+		iwl_op_mode_queue_full(trans-&gt;op_mode, txq-&gt;q.id);</div><div class='add'>+		IWL_DEBUG_TX_QUEUES(trans, "Stop hwq %d\n", txq-&gt;q.id);</div><div class='add'>+	} else</div><div class='add'>+		IWL_DEBUG_TX_QUEUES(trans, "hwq %d already stopped\n",</div><div class='add'>+				    txq-&gt;q.id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int iwl_queue_used(const struct iwl_queue *q, int i)</div><div class='hunk'>@@ -487,19 +427,18 @@ static inline u8 get_cmd_index(struct iwl_queue *q, u32 index)</div><div class='ctx'> 	return index &amp; (q-&gt;n_window - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define IWL_TX_FIFO_BK		0	/* shared */</div><div class='del'>-#define IWL_TX_FIFO_BE		1</div><div class='del'>-#define IWL_TX_FIFO_VI		2	/* shared */</div><div class='del'>-#define IWL_TX_FIFO_VO		3</div><div class='del'>-#define IWL_TX_FIFO_BK_IPAN	IWL_TX_FIFO_BK</div><div class='del'>-#define IWL_TX_FIFO_BE_IPAN	4</div><div class='del'>-#define IWL_TX_FIFO_VI_IPAN	IWL_TX_FIFO_VI</div><div class='del'>-#define IWL_TX_FIFO_VO_IPAN	5</div><div class='del'>-/* re-uses the VO FIFO, uCode will properly flush/schedule */</div><div class='del'>-#define IWL_TX_FIFO_AUX		5</div><div class='del'>-#define IWL_TX_FIFO_UNUSED	-1</div><div class='del'>-</div><div class='del'>-/* AUX (TX during scan dwell) queue */</div><div class='del'>-#define IWL_AUX_QUEUE		10</div><div class='add'>+static inline const char *</div><div class='add'>+trans_pcie_get_cmd_string(struct iwl_trans_pcie *trans_pcie, u8 cmd)</div><div class='add'>+{</div><div class='add'>+	if (!trans_pcie-&gt;command_names || !trans_pcie-&gt;command_names[cmd])</div><div class='add'>+		return "UNKNOWN";</div><div class='add'>+	return trans_pcie-&gt;command_names[cmd];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool iwl_is_rfkill_set(struct iwl_trans *trans)</div><div class='add'>+{</div><div class='add'>+	return !(iwl_read32(trans, CSR_GP_CNTRL) &amp;</div><div class='add'>+		CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #endif /* __iwl_trans_int_pcie_h__ */</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c b/drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c<br/>index 8b1a7988e176..08517d3c80bb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c</a></div><div class='hunk'>@@ -140,14 +140,17 @@ void iwl_rx_queue_update_write_ptr(struct iwl_trans *trans,</div><div class='ctx'> 	if (q-&gt;need_update == 0)</div><div class='ctx'> 		goto exit_unlock;</div><div class='ctx'> </div><div class='del'>-	if (cfg(trans)-&gt;base_params-&gt;shadow_reg_enable) {</div><div class='add'>+	if (trans-&gt;cfg-&gt;base_params-&gt;shadow_reg_enable) {</div><div class='ctx'> 		/* shadow register enabled */</div><div class='ctx'> 		/* Device expects a multiple of 8 */</div><div class='ctx'> 		q-&gt;write_actual = (q-&gt;write &amp; ~0x7);</div><div class='ctx'> 		iwl_write32(trans, FH_RSCSR_CHNL0_WPTR, q-&gt;write_actual);</div><div class='ctx'> 	} else {</div><div class='add'>+		struct iwl_trans_pcie *trans_pcie =</div><div class='add'>+			IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='add'>+</div><div class='ctx'> 		/* If power-saving is in use, make sure device is awake */</div><div class='del'>-		if (test_bit(STATUS_POWER_PMI, &amp;trans-&gt;shrd-&gt;status)) {</div><div class='add'>+		if (test_bit(STATUS_TPOWER_PMI, &amp;trans_pcie-&gt;status)) {</div><div class='ctx'> 			reg = iwl_read32(trans, CSR_UCODE_DRV_GP1);</div><div class='ctx'> </div><div class='ctx'> 			if (reg &amp; CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {</div><div class='hunk'>@@ -271,17 +274,17 @@ static void iwlagn_rx_allocate(struct iwl_trans *trans, gfp_t priority)</div><div class='ctx'> 		if (rxq-&gt;free_count &gt; RX_LOW_WATERMARK)</div><div class='ctx'> 			gfp_mask |= __GFP_NOWARN;</div><div class='ctx'> </div><div class='del'>-		if (hw_params(trans).rx_page_order &gt; 0)</div><div class='add'>+		if (trans_pcie-&gt;rx_page_order &gt; 0)</div><div class='ctx'> 			gfp_mask |= __GFP_COMP;</div><div class='ctx'> </div><div class='ctx'> 		/* Alloc a new receive buffer */</div><div class='ctx'> 		page = alloc_pages(gfp_mask,</div><div class='del'>-				  hw_params(trans).rx_page_order);</div><div class='add'>+				  trans_pcie-&gt;rx_page_order);</div><div class='ctx'> 		if (!page) {</div><div class='ctx'> 			if (net_ratelimit())</div><div class='ctx'> 				IWL_DEBUG_INFO(trans, "alloc_pages failed, "</div><div class='ctx'> 					   "order: %d\n",</div><div class='del'>-					   hw_params(trans).rx_page_order);</div><div class='add'>+					   trans_pcie-&gt;rx_page_order);</div><div class='ctx'> </div><div class='ctx'> 			if ((rxq-&gt;free_count &lt;= RX_LOW_WATERMARK) &amp;&amp;</div><div class='ctx'> 			    net_ratelimit())</div><div class='hunk'>@@ -300,7 +303,7 @@ static void iwlagn_rx_allocate(struct iwl_trans *trans, gfp_t priority)</div><div class='ctx'> </div><div class='ctx'> 		if (list_empty(&amp;rxq-&gt;rx_used)) {</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;rxq-&gt;lock, flags);</div><div class='del'>-			__free_pages(page, hw_params(trans).rx_page_order);</div><div class='add'>+			__free_pages(page, trans_pcie-&gt;rx_page_order);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 		element = rxq-&gt;rx_used.next;</div><div class='hunk'>@@ -313,7 +316,7 @@ static void iwlagn_rx_allocate(struct iwl_trans *trans, gfp_t priority)</div><div class='ctx'> 		rxb-&gt;page = page;</div><div class='ctx'> 		/* Get physical address of the RB */</div><div class='ctx'> 		rxb-&gt;page_dma = dma_map_page(trans-&gt;dev, page, 0,</div><div class='del'>-				PAGE_SIZE &lt;&lt; hw_params(trans).rx_page_order,</div><div class='add'>+				PAGE_SIZE &lt;&lt; trans_pcie-&gt;rx_page_order,</div><div class='ctx'> 				DMA_FROM_DEVICE);</div><div class='ctx'> 		/* dma address must be no more than 36 bits */</div><div class='ctx'> 		BUG_ON(rxb-&gt;page_dma &amp; ~DMA_BIT_MASK(36));</div><div class='hunk'>@@ -362,83 +365,98 @@ static void iwl_rx_handle_rxbuf(struct iwl_trans *trans,</div><div class='ctx'> 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> 	struct iwl_rx_queue *rxq = &amp;trans_pcie-&gt;rxq;</div><div class='ctx'> 	struct iwl_tx_queue *txq = &amp;trans_pcie-&gt;txq[trans_pcie-&gt;cmd_queue];</div><div class='del'>-	struct iwl_device_cmd *cmd;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int len, err;</div><div class='del'>-	u16 sequence;</div><div class='del'>-	struct iwl_rx_cmd_buffer rxcb;</div><div class='del'>-	struct iwl_rx_packet *pkt;</div><div class='del'>-	bool reclaim;</div><div class='del'>-	int index, cmd_index;</div><div class='add'>+	bool page_stolen = false;</div><div class='add'>+	int max_len = PAGE_SIZE &lt;&lt; trans_pcie-&gt;rx_page_order;</div><div class='add'>+	u32 offset = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(!rxb))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	dma_unmap_page(trans-&gt;dev, rxb-&gt;page_dma,</div><div class='del'>-		       PAGE_SIZE &lt;&lt; hw_params(trans).rx_page_order,</div><div class='del'>-		       DMA_FROM_DEVICE);</div><div class='del'>-</div><div class='del'>-	rxcb._page = rxb-&gt;page;</div><div class='del'>-	pkt = rxb_addr(&amp;rxcb);</div><div class='add'>+	dma_unmap_page(trans-&gt;dev, rxb-&gt;page_dma, max_len, DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='del'>-	IWL_DEBUG_RX(trans, "%s, 0x%02x\n",</div><div class='del'>-		     get_cmd_string(pkt-&gt;hdr.cmd), pkt-&gt;hdr.cmd);</div><div class='add'>+	while (offset + sizeof(u32) + sizeof(struct iwl_cmd_header) &lt; max_len) {</div><div class='add'>+		struct iwl_rx_packet *pkt;</div><div class='add'>+		struct iwl_device_cmd *cmd;</div><div class='add'>+		u16 sequence;</div><div class='add'>+		bool reclaim;</div><div class='add'>+		int index, cmd_index, err, len;</div><div class='add'>+		struct iwl_rx_cmd_buffer rxcb = {</div><div class='add'>+			._offset = offset,</div><div class='add'>+			._page = rxb-&gt;page,</div><div class='add'>+			._page_stolen = false,</div><div class='add'>+			.truesize = max_len,</div><div class='add'>+		};</div><div class='ctx'> </div><div class='add'>+		pkt = rxb_addr(&amp;rxcb);</div><div class='ctx'> </div><div class='del'>-	len = le32_to_cpu(pkt-&gt;len_n_flags) &amp; FH_RSCSR_FRAME_SIZE_MSK;</div><div class='del'>-	len += sizeof(u32); /* account for status word */</div><div class='del'>-	trace_iwlwifi_dev_rx(trans-&gt;dev, pkt, len);</div><div class='del'>-</div><div class='del'>-	/* Reclaim a command buffer only if this packet is a response</div><div class='del'>-	 *   to a (driver-originated) command.</div><div class='del'>-	 * If the packet (e.g. Rx frame) originated from uCode,</div><div class='del'>-	 *   there is no command buffer to reclaim.</div><div class='del'>-	 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,</div><div class='del'>-	 *   but apparently a few don't get set; catch them here. */</div><div class='del'>-	reclaim = !(pkt-&gt;hdr.sequence &amp; SEQ_RX_FRAME);</div><div class='del'>-	if (reclaim) {</div><div class='del'>-		int i;</div><div class='add'>+		if (pkt-&gt;len_n_flags == cpu_to_le32(FH_RSCSR_FRAME_INVALID))</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; trans_pcie-&gt;n_no_reclaim_cmds; i++) {</div><div class='del'>-			if (trans_pcie-&gt;no_reclaim_cmds[i] == pkt-&gt;hdr.cmd) {</div><div class='del'>-				reclaim = false;</div><div class='del'>-				break;</div><div class='add'>+		IWL_DEBUG_RX(trans, "cmd at offset %d: %s (0x%.2x)\n",</div><div class='add'>+			rxcb._offset,</div><div class='add'>+			trans_pcie_get_cmd_string(trans_pcie, pkt-&gt;hdr.cmd),</div><div class='add'>+			pkt-&gt;hdr.cmd);</div><div class='add'>+</div><div class='add'>+		len = le32_to_cpu(pkt-&gt;len_n_flags) &amp; FH_RSCSR_FRAME_SIZE_MSK;</div><div class='add'>+		len += sizeof(u32); /* account for status word */</div><div class='add'>+		trace_iwlwifi_dev_rx(trans-&gt;dev, pkt, len);</div><div class='add'>+</div><div class='add'>+		/* Reclaim a command buffer only if this packet is a response</div><div class='add'>+		 *   to a (driver-originated) command.</div><div class='add'>+		 * If the packet (e.g. Rx frame) originated from uCode,</div><div class='add'>+		 *   there is no command buffer to reclaim.</div><div class='add'>+		 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,</div><div class='add'>+		 *   but apparently a few don't get set; catch them here. */</div><div class='add'>+		reclaim = !(pkt-&gt;hdr.sequence &amp; SEQ_RX_FRAME);</div><div class='add'>+		if (reclaim) {</div><div class='add'>+			int i;</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; trans_pcie-&gt;n_no_reclaim_cmds; i++) {</div><div class='add'>+				if (trans_pcie-&gt;no_reclaim_cmds[i] ==</div><div class='add'>+							pkt-&gt;hdr.cmd) {</div><div class='add'>+					reclaim = false;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	sequence = le16_to_cpu(pkt-&gt;hdr.sequence);</div><div class='del'>-	index = SEQ_TO_INDEX(sequence);</div><div class='del'>-	cmd_index = get_cmd_index(&amp;txq-&gt;q, index);</div><div class='add'>+		sequence = le16_to_cpu(pkt-&gt;hdr.sequence);</div><div class='add'>+		index = SEQ_TO_INDEX(sequence);</div><div class='add'>+		cmd_index = get_cmd_index(&amp;txq-&gt;q, index);</div><div class='ctx'> </div><div class='del'>-	if (reclaim)</div><div class='del'>-		cmd = txq-&gt;cmd[cmd_index];</div><div class='del'>-	else</div><div class='del'>-		cmd = NULL;</div><div class='add'>+		if (reclaim)</div><div class='add'>+			cmd = txq-&gt;entries[cmd_index].cmd;</div><div class='add'>+		else</div><div class='add'>+			cmd = NULL;</div><div class='ctx'> </div><div class='del'>-	err = iwl_op_mode_rx(trans-&gt;op_mode, &amp;rxcb, cmd);</div><div class='add'>+		err = iwl_op_mode_rx(trans-&gt;op_mode, &amp;rxcb, cmd);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * XXX: After here, we should always check rxcb._page</div><div class='del'>-	 * against NULL before touching it or its virtual</div><div class='del'>-	 * memory (pkt). Because some rx_handler might have</div><div class='del'>-	 * already taken or freed the pages.</div><div class='del'>-	 */</div><div class='add'>+		/*</div><div class='add'>+		 * After here, we should always check rxcb._page_stolen,</div><div class='add'>+		 * if it is true then one of the handlers took the page.</div><div class='add'>+		 */</div><div class='ctx'> </div><div class='del'>-	if (reclaim) {</div><div class='del'>-		/* Invoke any callbacks, transfer the buffer to caller,</div><div class='del'>-		 * and fire off the (possibly) blocking</div><div class='del'>-		 * iwl_trans_send_cmd()</div><div class='del'>-		 * as we reclaim the driver command queue */</div><div class='del'>-		if (rxcb._page)</div><div class='del'>-			iwl_tx_cmd_complete(trans, &amp;rxcb, err);</div><div class='del'>-		else</div><div class='del'>-			IWL_WARN(trans, "Claim null rxb?\n");</div><div class='add'>+		if (reclaim) {</div><div class='add'>+			/* Invoke any callbacks, transfer the buffer to caller,</div><div class='add'>+			 * and fire off the (possibly) blocking</div><div class='add'>+			 * iwl_trans_send_cmd()</div><div class='add'>+			 * as we reclaim the driver command queue */</div><div class='add'>+			if (!rxcb._page_stolen)</div><div class='add'>+				iwl_tx_cmd_complete(trans, &amp;rxcb, err);</div><div class='add'>+			else</div><div class='add'>+				IWL_WARN(trans, "Claim null rxb?\n");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		page_stolen |= rxcb._page_stolen;</div><div class='add'>+		offset += ALIGN(len, FH_RSCSR_FRAME_ALIGN);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* page was stolen from us */</div><div class='del'>-	if (rxcb._page == NULL)</div><div class='add'>+	/* page was stolen from us -- free our reference */</div><div class='add'>+	if (page_stolen) {</div><div class='add'>+		__free_pages(rxb-&gt;page, trans_pcie-&gt;rx_page_order);</div><div class='ctx'> 		rxb-&gt;page = NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Reuse the page if possible. For notification packets and</div><div class='ctx'> 	 * SKBs that fail to Rx correctly, add them back into the</div><div class='hunk'>@@ -447,7 +465,7 @@ static void iwl_rx_handle_rxbuf(struct iwl_trans *trans,</div><div class='ctx'> 	if (rxb-&gt;page != NULL) {</div><div class='ctx'> 		rxb-&gt;page_dma =</div><div class='ctx'> 			dma_map_page(trans-&gt;dev, rxb-&gt;page, 0,</div><div class='del'>-				PAGE_SIZE &lt;&lt; hw_params(trans).rx_page_order,</div><div class='add'>+				PAGE_SIZE &lt;&lt; trans_pcie-&gt;rx_page_order,</div><div class='ctx'> 				DMA_FROM_DEVICE);</div><div class='ctx'> 		list_add_tail(&amp;rxb-&gt;list, &amp;rxq-&gt;rx_free);</div><div class='ctx'> 		rxq-&gt;free_count++;</div><div class='hunk'>@@ -520,412 +538,32 @@ static void iwl_rx_handle(struct iwl_trans *trans)</div><div class='ctx'> 		iwlagn_rx_queue_restock(trans);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char * const desc_lookup_text[] = {</div><div class='del'>-	"OK",</div><div class='del'>-	"FAIL",</div><div class='del'>-	"BAD_PARAM",</div><div class='del'>-	"BAD_CHECKSUM",</div><div class='del'>-	"NMI_INTERRUPT_WDG",</div><div class='del'>-	"SYSASSERT",</div><div class='del'>-	"FATAL_ERROR",</div><div class='del'>-	"BAD_COMMAND",</div><div class='del'>-	"HW_ERROR_TUNE_LOCK",</div><div class='del'>-	"HW_ERROR_TEMPERATURE",</div><div class='del'>-	"ILLEGAL_CHAN_FREQ",</div><div class='del'>-	"VCC_NOT_STABLE",</div><div class='del'>-	"FH_ERROR",</div><div class='del'>-	"NMI_INTERRUPT_HOST",</div><div class='del'>-	"NMI_INTERRUPT_ACTION_PT",</div><div class='del'>-	"NMI_INTERRUPT_UNKNOWN",</div><div class='del'>-	"UCODE_VERSION_MISMATCH",</div><div class='del'>-	"HW_ERROR_ABS_LOCK",</div><div class='del'>-	"HW_ERROR_CAL_LOCK_FAIL",</div><div class='del'>-	"NMI_INTERRUPT_INST_ACTION_PT",</div><div class='del'>-	"NMI_INTERRUPT_DATA_ACTION_PT",</div><div class='del'>-	"NMI_TRM_HW_ER",</div><div class='del'>-	"NMI_INTERRUPT_TRM",</div><div class='del'>-	"NMI_INTERRUPT_BREAK_POINT",</div><div class='del'>-	"DEBUG_0",</div><div class='del'>-	"DEBUG_1",</div><div class='del'>-	"DEBUG_2",</div><div class='del'>-	"DEBUG_3",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct { char *name; u8 num; } advanced_lookup[] = {</div><div class='del'>-	{ "NMI_INTERRUPT_WDG", 0x34 },</div><div class='del'>-	{ "SYSASSERT", 0x35 },</div><div class='del'>-	{ "UCODE_VERSION_MISMATCH", 0x37 },</div><div class='del'>-	{ "BAD_COMMAND", 0x38 },</div><div class='del'>-	{ "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },</div><div class='del'>-	{ "FATAL_ERROR", 0x3D },</div><div class='del'>-	{ "NMI_TRM_HW_ERR", 0x46 },</div><div class='del'>-	{ "NMI_INTERRUPT_TRM", 0x4C },</div><div class='del'>-	{ "NMI_INTERRUPT_BREAK_POINT", 0x54 },</div><div class='del'>-	{ "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },</div><div class='del'>-	{ "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },</div><div class='del'>-	{ "NMI_INTERRUPT_HOST", 0x66 },</div><div class='del'>-	{ "NMI_INTERRUPT_ACTION_PT", 0x7C },</div><div class='del'>-	{ "NMI_INTERRUPT_UNKNOWN", 0x84 },</div><div class='del'>-	{ "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },</div><div class='del'>-	{ "ADVANCED_SYSASSERT", 0 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const char *desc_lookup(u32 num)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int max = ARRAY_SIZE(desc_lookup_text);</div><div class='del'>-</div><div class='del'>-	if (num &lt; max)</div><div class='del'>-		return desc_lookup_text[num];</div><div class='del'>-</div><div class='del'>-	max = ARRAY_SIZE(advanced_lookup) - 1;</div><div class='del'>-	for (i = 0; i &lt; max; i++) {</div><div class='del'>-		if (advanced_lookup[i].num == num)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	return advanced_lookup[i].name;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define ERROR_START_OFFSET  (1 * sizeof(u32))</div><div class='del'>-#define ERROR_ELEM_SIZE     (7 * sizeof(u32))</div><div class='del'>-</div><div class='del'>-static void iwl_dump_nic_error_log(struct iwl_trans *trans)</div><div class='del'>-{</div><div class='del'>-	u32 base;</div><div class='del'>-	struct iwl_error_event_table table;</div><div class='del'>-	struct iwl_trans_pcie *trans_pcie =</div><div class='del'>-		IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='del'>-</div><div class='del'>-	base = trans-&gt;shrd-&gt;device_pointers.error_event_table;</div><div class='del'>-	if (trans-&gt;shrd-&gt;ucode_type == IWL_UCODE_INIT) {</div><div class='del'>-		if (!base)</div><div class='del'>-			base = trans-&gt;shrd-&gt;fw-&gt;init_errlog_ptr;</div><div class='del'>-	} else {</div><div class='del'>-		if (!base)</div><div class='del'>-			base = trans-&gt;shrd-&gt;fw-&gt;inst_errlog_ptr;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!iwlagn_hw_valid_rtc_data_addr(base)) {</div><div class='del'>-		IWL_ERR(trans,</div><div class='del'>-			"Not valid error log pointer 0x%08X for %s uCode\n",</div><div class='del'>-			base,</div><div class='del'>-			(trans-&gt;shrd-&gt;ucode_type == IWL_UCODE_INIT)</div><div class='del'>-					? "Init" : "RT");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	iwl_read_targ_mem_words(trans, base, &amp;table, sizeof(table));</div><div class='del'>-</div><div class='del'>-	if (ERROR_START_OFFSET &lt;= table.valid * ERROR_ELEM_SIZE) {</div><div class='del'>-		IWL_ERR(trans, "Start IWL Error Log Dump:\n");</div><div class='del'>-		IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",</div><div class='del'>-			trans-&gt;shrd-&gt;status, table.valid);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	trans_pcie-&gt;isr_stats.err_code = table.error_id;</div><div class='del'>-</div><div class='del'>-	trace_iwlwifi_dev_ucode_error(trans-&gt;dev, table.error_id, table.tsf_low,</div><div class='del'>-				      table.data1, table.data2, table.line,</div><div class='del'>-				      table.blink1, table.blink2, table.ilink1,</div><div class='del'>-				      table.ilink2, table.bcon_time, table.gp1,</div><div class='del'>-				      table.gp2, table.gp3, table.ucode_ver,</div><div class='del'>-				      table.hw_ver, table.brd_ver);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | %-28s\n", table.error_id,</div><div class='del'>-		desc_lookup(table.error_id));</div><div class='del'>-	IWL_ERR(trans, "0x%08X | uPc\n", table.pc);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | branchlink1\n", table.blink1);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | branchlink2\n", table.blink2);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | interruptlink1\n", table.ilink1);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | interruptlink2\n", table.ilink2);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | data1\n", table.data1);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | data2\n", table.data2);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | line\n", table.line);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | beacon time\n", table.bcon_time);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | tsf low\n", table.tsf_low);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | tsf hi\n", table.tsf_hi);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | time gp1\n", table.gp1);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | time gp2\n", table.gp2);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | time gp3\n", table.gp3);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | uCode version\n", table.ucode_ver);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | hw version\n", table.hw_ver);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | board version\n", table.brd_ver);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | hcmd\n", table.hcmd);</div><div class='del'>-</div><div class='del'>-	IWL_ERR(trans, "0x%08X | isr0\n", table.isr0);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | isr1\n", table.isr1);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | isr2\n", table.isr2);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | isr3\n", table.isr3);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | isr4\n", table.isr4);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | isr_pref\n", table.isr_pref);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | wait_event\n", table.wait_event);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | l2p_control\n", table.l2p_control);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | l2p_duration\n", table.l2p_duration);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | timestamp\n", table.u_timestamp);</div><div class='del'>-	IWL_ERR(trans, "0x%08X | flow_handler\n", table.flow_handler);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * iwl_irq_handle_error - called for HW or SW error interrupt from card</div><div class='ctx'>  */</div><div class='ctx'> static void iwl_irq_handle_error(struct iwl_trans *trans)</div><div class='ctx'> {</div><div class='ctx'> 	/* W/A for WiFi/WiMAX coex and WiMAX own the RF */</div><div class='del'>-	if (cfg(trans)-&gt;internal_wimax_coex &amp;&amp;</div><div class='add'>+	if (trans-&gt;cfg-&gt;internal_wimax_coex &amp;&amp;</div><div class='ctx'> 	    (!(iwl_read_prph(trans, APMG_CLK_CTRL_REG) &amp;</div><div class='ctx'> 			APMS_CLK_VAL_MRB_FUNC_MODE) ||</div><div class='ctx'> 	     (iwl_read_prph(trans, APMG_PS_CTRL_REG) &amp;</div><div class='ctx'> 			APMG_PS_CTRL_VAL_RESET_REQ))) {</div><div class='del'>-		/*</div><div class='del'>-		 * Keep the restart process from trying to send host</div><div class='del'>-		 * commands by clearing the ready bit.</div><div class='del'>-		 */</div><div class='del'>-		clear_bit(STATUS_READY, &amp;trans-&gt;shrd-&gt;status);</div><div class='del'>-		clear_bit(STATUS_HCMD_ACTIVE, &amp;trans-&gt;shrd-&gt;status);</div><div class='add'>+		struct iwl_trans_pcie *trans_pcie;</div><div class='add'>+</div><div class='add'>+		trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='add'>+		clear_bit(STATUS_HCMD_ACTIVE, &amp;trans_pcie-&gt;status);</div><div class='add'>+		iwl_op_mode_wimax_active(trans-&gt;op_mode);</div><div class='ctx'> 		wake_up(&amp;trans-&gt;wait_command_queue);</div><div class='del'>-		IWL_ERR(trans, "RF is used by WiMAX\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	IWL_ERR(trans, "Loaded firmware version: %s\n",</div><div class='del'>-		trans-&gt;shrd-&gt;fw-&gt;fw_version);</div><div class='del'>-</div><div class='del'>-	iwl_dump_nic_error_log(trans);</div><div class='ctx'> 	iwl_dump_csr(trans);</div><div class='ctx'> 	iwl_dump_fh(trans, NULL, false);</div><div class='del'>-	iwl_dump_nic_event_log(trans, false, NULL, false);</div><div class='ctx'> </div><div class='ctx'> 	iwl_op_mode_nic_error(trans-&gt;op_mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define EVENT_START_OFFSET  (4 * sizeof(u32))</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * iwl_print_event_log - Dump error event log to syslog</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static int iwl_print_event_log(struct iwl_trans *trans, u32 start_idx,</div><div class='del'>-			       u32 num_events, u32 mode,</div><div class='del'>-			       int pos, char **buf, size_t bufsz)</div><div class='del'>-{</div><div class='del'>-	u32 i;</div><div class='del'>-	u32 base;       /* SRAM byte address of event log header */</div><div class='del'>-	u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */</div><div class='del'>-	u32 ptr;        /* SRAM byte address of log data */</div><div class='del'>-	u32 ev, time, data; /* event log data */</div><div class='del'>-	unsigned long reg_flags;</div><div class='del'>-</div><div class='del'>-	if (num_events == 0)</div><div class='del'>-		return pos;</div><div class='del'>-</div><div class='del'>-	base = trans-&gt;shrd-&gt;device_pointers.log_event_table;</div><div class='del'>-	if (trans-&gt;shrd-&gt;ucode_type == IWL_UCODE_INIT) {</div><div class='del'>-		if (!base)</div><div class='del'>-			base = trans-&gt;shrd-&gt;fw-&gt;init_evtlog_ptr;</div><div class='del'>-	} else {</div><div class='del'>-		if (!base)</div><div class='del'>-			base = trans-&gt;shrd-&gt;fw-&gt;inst_evtlog_ptr;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (mode == 0)</div><div class='del'>-		event_size = 2 * sizeof(u32);</div><div class='del'>-	else</div><div class='del'>-		event_size = 3 * sizeof(u32);</div><div class='del'>-</div><div class='del'>-	ptr = base + EVENT_START_OFFSET + (start_idx * event_size);</div><div class='del'>-</div><div class='del'>-	/* Make sure device is powered up for SRAM reads */</div><div class='del'>-	spin_lock_irqsave(&amp;trans-&gt;reg_lock, reg_flags);</div><div class='del'>-	if (unlikely(!iwl_grab_nic_access(trans)))</div><div class='del'>-		goto out_unlock;</div><div class='del'>-</div><div class='del'>-	/* Set starting address; reads will auto-increment */</div><div class='del'>-	iwl_write32(trans, HBUS_TARG_MEM_RADDR, ptr);</div><div class='del'>-</div><div class='del'>-	/* "time" is actually "data" for mode 0 (no timestamp).</div><div class='del'>-	* place event id # at far right for easier visual parsing. */</div><div class='del'>-	for (i = 0; i &lt; num_events; i++) {</div><div class='del'>-		ev = iwl_read32(trans, HBUS_TARG_MEM_RDAT);</div><div class='del'>-		time = iwl_read32(trans, HBUS_TARG_MEM_RDAT);</div><div class='del'>-		if (mode == 0) {</div><div class='del'>-			/* data, ev */</div><div class='del'>-			if (bufsz) {</div><div class='del'>-				pos += scnprintf(*buf + pos, bufsz - pos,</div><div class='del'>-						"EVT_LOG:0x%08x:%04u\n",</div><div class='del'>-						time, ev);</div><div class='del'>-			} else {</div><div class='del'>-				trace_iwlwifi_dev_ucode_event(trans-&gt;dev, 0,</div><div class='del'>-					time, ev);</div><div class='del'>-				IWL_ERR(trans, "EVT_LOG:0x%08x:%04u\n",</div><div class='del'>-					time, ev);</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			data = iwl_read32(trans, HBUS_TARG_MEM_RDAT);</div><div class='del'>-			if (bufsz) {</div><div class='del'>-				pos += scnprintf(*buf + pos, bufsz - pos,</div><div class='del'>-						"EVT_LOGT:%010u:0x%08x:%04u\n",</div><div class='del'>-						 time, data, ev);</div><div class='del'>-			} else {</div><div class='del'>-				IWL_ERR(trans, "EVT_LOGT:%010u:0x%08x:%04u\n",</div><div class='del'>-					time, data, ev);</div><div class='del'>-				trace_iwlwifi_dev_ucode_event(trans-&gt;dev, time,</div><div class='del'>-					data, ev);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Allow device to power down */</div><div class='del'>-	iwl_release_nic_access(trans);</div><div class='del'>-out_unlock:</div><div class='del'>-	spin_unlock_irqrestore(&amp;trans-&gt;reg_lock, reg_flags);</div><div class='del'>-	return pos;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * iwl_print_last_event_logs - Dump the newest # of event log to syslog</div><div class='del'>- */</div><div class='del'>-static int iwl_print_last_event_logs(struct iwl_trans *trans, u32 capacity,</div><div class='del'>-				    u32 num_wraps, u32 next_entry,</div><div class='del'>-				    u32 size, u32 mode,</div><div class='del'>-				    int pos, char **buf, size_t bufsz)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * display the newest DEFAULT_LOG_ENTRIES entries</div><div class='del'>-	 * i.e the entries just before the next ont that uCode would fill.</div><div class='del'>-	 */</div><div class='del'>-	if (num_wraps) {</div><div class='del'>-		if (next_entry &lt; size) {</div><div class='del'>-			pos = iwl_print_event_log(trans,</div><div class='del'>-						capacity - (size - next_entry),</div><div class='del'>-						size - next_entry, mode,</div><div class='del'>-						pos, buf, bufsz);</div><div class='del'>-			pos = iwl_print_event_log(trans, 0,</div><div class='del'>-						  next_entry, mode,</div><div class='del'>-						  pos, buf, bufsz);</div><div class='del'>-		} else</div><div class='del'>-			pos = iwl_print_event_log(trans, next_entry - size,</div><div class='del'>-						  size, mode, pos, buf, bufsz);</div><div class='del'>-	} else {</div><div class='del'>-		if (next_entry &lt; size) {</div><div class='del'>-			pos = iwl_print_event_log(trans, 0, next_entry,</div><div class='del'>-						  mode, pos, buf, bufsz);</div><div class='del'>-		} else {</div><div class='del'>-			pos = iwl_print_event_log(trans, next_entry - size,</div><div class='del'>-						  size, mode, pos, buf, bufsz);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return pos;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)</div><div class='del'>-</div><div class='del'>-int iwl_dump_nic_event_log(struct iwl_trans *trans, bool full_log,</div><div class='del'>-			    char **buf, bool display)</div><div class='del'>-{</div><div class='del'>-	u32 base;       /* SRAM byte address of event log header */</div><div class='del'>-	u32 capacity;   /* event log capacity in # entries */</div><div class='del'>-	u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */</div><div class='del'>-	u32 num_wraps;  /* # times uCode wrapped to top of log */</div><div class='del'>-	u32 next_entry; /* index of next entry to be written by uCode */</div><div class='del'>-	u32 size;       /* # entries that we'll print */</div><div class='del'>-	u32 logsize;</div><div class='del'>-	int pos = 0;</div><div class='del'>-	size_t bufsz = 0;</div><div class='del'>-</div><div class='del'>-	base = trans-&gt;shrd-&gt;device_pointers.log_event_table;</div><div class='del'>-	if (trans-&gt;shrd-&gt;ucode_type == IWL_UCODE_INIT) {</div><div class='del'>-		logsize = trans-&gt;shrd-&gt;fw-&gt;init_evtlog_size;</div><div class='del'>-		if (!base)</div><div class='del'>-			base = trans-&gt;shrd-&gt;fw-&gt;init_evtlog_ptr;</div><div class='del'>-	} else {</div><div class='del'>-		logsize = trans-&gt;shrd-&gt;fw-&gt;inst_evtlog_size;</div><div class='del'>-		if (!base)</div><div class='del'>-			base = trans-&gt;shrd-&gt;fw-&gt;inst_evtlog_ptr;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!iwlagn_hw_valid_rtc_data_addr(base)) {</div><div class='del'>-		IWL_ERR(trans,</div><div class='del'>-			"Invalid event log pointer 0x%08X for %s uCode\n",</div><div class='del'>-			base,</div><div class='del'>-			(trans-&gt;shrd-&gt;ucode_type == IWL_UCODE_INIT)</div><div class='del'>-					? "Init" : "RT");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* event log header */</div><div class='del'>-	capacity = iwl_read_targ_mem(trans, base);</div><div class='del'>-	mode = iwl_read_targ_mem(trans, base + (1 * sizeof(u32)));</div><div class='del'>-	num_wraps = iwl_read_targ_mem(trans, base + (2 * sizeof(u32)));</div><div class='del'>-	next_entry = iwl_read_targ_mem(trans, base + (3 * sizeof(u32)));</div><div class='del'>-</div><div class='del'>-	if (capacity &gt; logsize) {</div><div class='del'>-		IWL_ERR(trans, "Log capacity %d is bogus, limit to %d "</div><div class='del'>-			"entries\n", capacity, logsize);</div><div class='del'>-		capacity = logsize;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (next_entry &gt; logsize) {</div><div class='del'>-		IWL_ERR(trans, "Log write index %d is bogus, limit to %d\n",</div><div class='del'>-			next_entry, logsize);</div><div class='del'>-		next_entry = logsize;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	size = num_wraps ? capacity : next_entry;</div><div class='del'>-</div><div class='del'>-	/* bail out if nothing in log */</div><div class='del'>-	if (size == 0) {</div><div class='del'>-		IWL_ERR(trans, "Start IWL Event Log Dump: nothing in log\n");</div><div class='del'>-		return pos;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_IWLWIFI_DEBUG</div><div class='del'>-	if (!(iwl_have_debug_level(IWL_DL_FW_ERRORS)) &amp;&amp; !full_log)</div><div class='del'>-		size = (size &gt; DEFAULT_DUMP_EVENT_LOG_ENTRIES)</div><div class='del'>-			? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;</div><div class='del'>-#else</div><div class='del'>-	size = (size &gt; DEFAULT_DUMP_EVENT_LOG_ENTRIES)</div><div class='del'>-		? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;</div><div class='del'>-#endif</div><div class='del'>-	IWL_ERR(trans, "Start IWL Event Log Dump: display last %u entries\n",</div><div class='del'>-		size);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_IWLWIFI_DEBUG</div><div class='del'>-	if (display) {</div><div class='del'>-		if (full_log)</div><div class='del'>-			bufsz = capacity * 48;</div><div class='del'>-		else</div><div class='del'>-			bufsz = size * 48;</div><div class='del'>-		*buf = kmalloc(bufsz, GFP_KERNEL);</div><div class='del'>-		if (!*buf)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	if (iwl_have_debug_level(IWL_DL_FW_ERRORS) || full_log) {</div><div class='del'>-		/*</div><div class='del'>-		 * if uCode has wrapped back to top of log,</div><div class='del'>-		 * start at the oldest entry,</div><div class='del'>-		 * i.e the next one that uCode would fill.</div><div class='del'>-		 */</div><div class='del'>-		if (num_wraps)</div><div class='del'>-			pos = iwl_print_event_log(trans, next_entry,</div><div class='del'>-						capacity - next_entry, mode,</div><div class='del'>-						pos, buf, bufsz);</div><div class='del'>-		/* (then/else) start at top of log */</div><div class='del'>-		pos = iwl_print_event_log(trans, 0,</div><div class='del'>-					  next_entry, mode, pos, buf, bufsz);</div><div class='del'>-	} else</div><div class='del'>-		pos = iwl_print_last_event_logs(trans, capacity, num_wraps,</div><div class='del'>-						next_entry, size, mode,</div><div class='del'>-						pos, buf, bufsz);</div><div class='del'>-#else</div><div class='del'>-	pos = iwl_print_last_event_logs(trans, capacity, num_wraps,</div><div class='del'>-					next_entry, size, mode,</div><div class='del'>-					pos, buf, bufsz);</div><div class='del'>-#endif</div><div class='del'>-	return pos;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* tasklet for iwlagn interrupt */</div><div class='ctx'> void iwl_irq_tasklet(struct iwl_trans *trans)</div><div class='ctx'> {</div><div class='hunk'>@@ -963,7 +601,7 @@ void iwl_irq_tasklet(struct iwl_trans *trans)</div><div class='ctx'> 	if (iwl_have_debug_level(IWL_DL_ISR)) {</div><div class='ctx'> 		/* just for debug */</div><div class='ctx'> 		inta_mask = iwl_read32(trans, CSR_INT_MASK);</div><div class='del'>-		IWL_DEBUG_ISR(trans, "inta 0x%08x, enabled 0x%08x\n ",</div><div class='add'>+		IWL_DEBUG_ISR(trans, "inta 0x%08x, enabled 0x%08x\n",</div><div class='ctx'> 				inta, inta_mask);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1011,8 +649,7 @@ void iwl_irq_tasklet(struct iwl_trans *trans)</div><div class='ctx'> 	if (inta &amp; CSR_INT_BIT_RF_KILL) {</div><div class='ctx'> 		bool hw_rfkill;</div><div class='ctx'> </div><div class='del'>-		hw_rfkill = !(iwl_read32(trans, CSR_GP_CNTRL) &amp;</div><div class='del'>-				CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);</div><div class='add'>+		hw_rfkill = iwl_is_rfkill_set(trans);</div><div class='ctx'> 		IWL_WARN(trans, "RF_KILL bit toggled to %s.\n",</div><div class='ctx'> 				hw_rfkill ? "disable radio" : "enable radio");</div><div class='ctx'> </div><div class='hunk'>@@ -1043,7 +680,7 @@ void iwl_irq_tasklet(struct iwl_trans *trans)</div><div class='ctx'> 	if (inta &amp; CSR_INT_BIT_WAKEUP) {</div><div class='ctx'> 		IWL_DEBUG_ISR(trans, "Wakeup interrupt\n");</div><div class='ctx'> 		iwl_rx_queue_update_write_ptr(trans, &amp;trans_pcie-&gt;rxq);</div><div class='del'>-		for (i = 0; i &lt; cfg(trans)-&gt;base_params-&gt;num_of_queues; i++)</div><div class='add'>+		for (i = 0; i &lt; trans-&gt;cfg-&gt;base_params-&gt;num_of_queues; i++)</div><div class='ctx'> 			iwl_txq_update_write_ptr(trans,</div><div class='ctx'> 						 &amp;trans_pcie-&gt;txq[i]);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-pcie-tx.c b/drivers/net/wireless/iwlwifi/iwl-trans-pcie-tx.c<br/>index e92972fd6ecf..a8750238ee09 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-trans-pcie-tx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-trans-pcie-tx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-trans-pcie-tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-trans-pcie-tx.c</a></div><div class='hunk'>@@ -37,47 +37,12 @@</div><div class='ctx'> #include "iwl-agn-hw.h"</div><div class='ctx'> #include "iwl-op-mode.h"</div><div class='ctx'> #include "iwl-trans-pcie-int.h"</div><div class='add'>+/* FIXME: need to abstract out TX command (once we know what it looks like) */</div><div class='add'>+#include "iwl-commands.h"</div><div class='ctx'> </div><div class='ctx'> #define IWL_TX_CRC_SIZE 4</div><div class='ctx'> #define IWL_TX_DELIMITER_SIZE 4</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * mac80211 queues, ACs, hardware queues, FIFOs.</div><div class='del'>- *</div><div class='del'>- * Cf. http://wireless.kernel.org/en/developers/Documentation/mac80211/queues</div><div class='del'>- *</div><div class='del'>- * Mac80211 uses the following numbers, which we get as from it</div><div class='del'>- * by way of skb_get_queue_mapping(skb):</div><div class='del'>- *</div><div class='del'>- *	VO	0</div><div class='del'>- *	VI	1</div><div class='del'>- *	BE	2</div><div class='del'>- *	BK	3</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * Regular (not A-MPDU) frames are put into hardware queues corresponding</div><div class='del'>- * to the FIFOs, see comments in iwl-prph.h. Aggregated frames get their</div><div class='del'>- * own queue per aggregation session (RA/TID combination), such queues are</div><div class='del'>- * set up to map into FIFOs too, for which we need an AC-&gt;FIFO mapping. In</div><div class='del'>- * order to map frames to the right queue, we also need an AC-&gt;hw queue</div><div class='del'>- * mapping. This is implemented here.</div><div class='del'>- *</div><div class='del'>- * Due to the way hw queues are set up (by the hw specific code), the AC-&gt;hw</div><div class='del'>- * queue mapping is the identity mapping.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static const u8 tid_to_ac[] = {</div><div class='del'>-	IEEE80211_AC_BE,</div><div class='del'>-	IEEE80211_AC_BK,</div><div class='del'>-	IEEE80211_AC_BK,</div><div class='del'>-	IEEE80211_AC_BE,</div><div class='del'>-	IEEE80211_AC_VI,</div><div class='del'>-	IEEE80211_AC_VI,</div><div class='del'>-	IEEE80211_AC_VO,</div><div class='del'>-	IEEE80211_AC_VO</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * iwl_trans_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array</div><div class='ctx'>  */</div><div class='hunk'>@@ -95,7 +60,7 @@ void iwl_trans_txq_update_byte_cnt_tbl(struct iwl_trans *trans,</div><div class='ctx'> 	u16 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;</div><div class='ctx'> 	__le16 bc_ent;</div><div class='ctx'> 	struct iwl_tx_cmd *tx_cmd =</div><div class='del'>-		(struct iwl_tx_cmd *) txq-&gt;cmd[txq-&gt;q.write_ptr]-&gt;payload;</div><div class='add'>+		(void *) txq-&gt;entries[txq-&gt;q.write_ptr].cmd-&gt;payload;</div><div class='ctx'> </div><div class='ctx'> 	scd_bc_tbl = trans_pcie-&gt;scd_bc_tbls.addr;</div><div class='ctx'> </div><div class='hunk'>@@ -136,13 +101,15 @@ void iwl_txq_update_write_ptr(struct iwl_trans *trans, struct iwl_tx_queue *txq)</div><div class='ctx'> 	if (txq-&gt;need_update == 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (cfg(trans)-&gt;base_params-&gt;shadow_reg_enable) {</div><div class='add'>+	if (trans-&gt;cfg-&gt;base_params-&gt;shadow_reg_enable) {</div><div class='ctx'> 		/* shadow register enabled */</div><div class='ctx'> 		iwl_write32(trans, HBUS_TARG_WRPTR,</div><div class='ctx'> 			    txq-&gt;q.write_ptr | (txq_id &lt;&lt; 8));</div><div class='ctx'> 	} else {</div><div class='add'>+		struct iwl_trans_pcie *trans_pcie =</div><div class='add'>+			IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> 		/* if we're trying to save power */</div><div class='del'>-		if (test_bit(STATUS_POWER_PMI, &amp;trans-&gt;shrd-&gt;status)) {</div><div class='add'>+		if (test_bit(STATUS_TPOWER_PMI, &amp;trans_pcie-&gt;status)) {</div><div class='ctx'> 			/* wake up nic if it's powered down ...</div><div class='ctx'> 			 * uCode will wake up, and interrupt us again, so next</div><div class='ctx'> 			 * time we'll skip this part. */</div><div class='hunk'>@@ -237,32 +204,39 @@ static void iwlagn_unmap_tfd(struct iwl_trans *trans, struct iwl_cmd_meta *meta,</div><div class='ctx'> 	for (i = 1; i &lt; num_tbs; i++)</div><div class='ctx'> 		dma_unmap_single(trans-&gt;dev, iwl_tfd_tb_get_addr(tfd, i),</div><div class='ctx'> 				iwl_tfd_tb_get_len(tfd, i), dma_dir);</div><div class='add'>+</div><div class='add'>+	tfd-&gt;num_tbs = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * iwlagn_txq_free_tfd - Free all chunks referenced by TFD [txq-&gt;q.read_ptr]</div><div class='ctx'>  * @trans - transport private data</div><div class='ctx'>  * @txq - tx queue</div><div class='del'>- * @index - the index of the TFD to be freed</div><div class='del'>- *@dma_dir - the direction of the DMA mapping</div><div class='add'>+ * @dma_dir - the direction of the DMA mapping</div><div class='ctx'>  *</div><div class='ctx'>  * Does NOT advance any TFD circular buffer read/write indexes</div><div class='ctx'>  * Does NOT free the TFD itself (which is within circular buffer)</div><div class='ctx'>  */</div><div class='ctx'> void iwlagn_txq_free_tfd(struct iwl_trans *trans, struct iwl_tx_queue *txq,</div><div class='del'>-	int index, enum dma_data_direction dma_dir)</div><div class='add'>+			 enum dma_data_direction dma_dir)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_tfd *tfd_tmp = txq-&gt;tfds;</div><div class='ctx'> </div><div class='add'>+	/* rd_ptr is bounded by n_bd and idx is bounded by n_window */</div><div class='add'>+	int rd_ptr = txq-&gt;q.read_ptr;</div><div class='add'>+	int idx = get_cmd_index(&amp;txq-&gt;q, rd_ptr);</div><div class='add'>+</div><div class='ctx'> 	lockdep_assert_held(&amp;txq-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	iwlagn_unmap_tfd(trans, &amp;txq-&gt;meta[index], &amp;tfd_tmp[index], dma_dir);</div><div class='add'>+	/* We have only q-&gt;n_window txq-&gt;entries, but we use q-&gt;n_bd tfds */</div><div class='add'>+	iwlagn_unmap_tfd(trans, &amp;txq-&gt;entries[idx].meta,</div><div class='add'>+			 &amp;tfd_tmp[rd_ptr], dma_dir);</div><div class='ctx'> </div><div class='ctx'> 	/* free SKB */</div><div class='del'>-	if (txq-&gt;skbs) {</div><div class='add'>+	if (txq-&gt;entries) {</div><div class='ctx'> 		struct sk_buff *skb;</div><div class='ctx'> </div><div class='del'>-		skb = txq-&gt;skbs[index];</div><div class='add'>+		skb = txq-&gt;entries[idx].skb;</div><div class='ctx'> </div><div class='ctx'> 		/* Can be called from irqs-disabled context</div><div class='ctx'> 		 * If skb is not NULL, it means that the whole queue is being</div><div class='hunk'>@@ -270,7 +244,7 @@ void iwlagn_txq_free_tfd(struct iwl_trans *trans, struct iwl_tx_queue *txq,</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (skb) {</div><div class='ctx'> 			iwl_op_mode_free_skb(trans-&gt;op_mode, skb);</div><div class='del'>-			txq-&gt;skbs[index] = NULL;</div><div class='add'>+			txq-&gt;entries[idx].skb = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -393,7 +367,7 @@ static void iwlagn_txq_inval_byte_cnt_tbl(struct iwl_trans *trans,</div><div class='ctx'> 	u8 sta_id = 0;</div><div class='ctx'> 	__le16 bc_ent;</div><div class='ctx'> 	struct iwl_tx_cmd *tx_cmd =</div><div class='del'>-		(struct iwl_tx_cmd *) txq-&gt;cmd[txq-&gt;q.read_ptr]-&gt;payload;</div><div class='add'>+		(void *)txq-&gt;entries[txq-&gt;q.read_ptr].cmd-&gt;payload;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(read_ptr &gt;= TFD_QUEUE_SIZE_MAX);</div><div class='ctx'> </div><div class='hunk'>@@ -448,20 +422,17 @@ static void iwlagn_tx_queue_stop_scheduler(struct iwl_trans *trans, u16 txq_id)</div><div class='ctx'> void iwl_trans_set_wr_ptrs(struct iwl_trans *trans,</div><div class='ctx'> 				int txq_id, u32 index)</div><div class='ctx'> {</div><div class='del'>-	IWL_DEBUG_TX_QUEUES(trans, "Q %d  WrPtr: %d", txq_id, index &amp; 0xff);</div><div class='add'>+	IWL_DEBUG_TX_QUEUES(trans, "Q %d  WrPtr: %d\n", txq_id, index &amp; 0xff);</div><div class='ctx'> 	iwl_write_direct32(trans, HBUS_TARG_WRPTR,</div><div class='ctx'> 			(index &amp; 0xff) | (txq_id &lt;&lt; 8));</div><div class='ctx'> 	iwl_write_prph(trans, SCD_QUEUE_RDPTR(txq_id), index);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void iwl_trans_tx_queue_set_status(struct iwl_trans *trans,</div><div class='del'>-					struct iwl_tx_queue *txq,</div><div class='del'>-					int tx_fifo_id, int scd_retry)</div><div class='add'>+				   struct iwl_tx_queue *txq,</div><div class='add'>+				   int tx_fifo_id, bool active)</div><div class='ctx'> {</div><div class='del'>-	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> 	int txq_id = txq-&gt;q.id;</div><div class='del'>-	int active =</div><div class='del'>-		test_bit(txq_id, &amp;trans_pcie-&gt;txq_ctx_active_msk) ? 1 : 0;</div><div class='ctx'> </div><div class='ctx'> 	iwl_write_prph(trans, SCD_QUEUE_STATUS_BITS(txq_id),</div><div class='ctx'> 			(active &lt;&lt; SCD_QUEUE_STTS_REG_POS_ACTIVE) |</div><div class='hunk'>@@ -469,77 +440,22 @@ void iwl_trans_tx_queue_set_status(struct iwl_trans *trans,</div><div class='ctx'> 			(1 &lt;&lt; SCD_QUEUE_STTS_REG_POS_WSL) |</div><div class='ctx'> 			SCD_QUEUE_STTS_REG_MSK);</div><div class='ctx'> </div><div class='del'>-	txq-&gt;sched_retry = scd_retry;</div><div class='del'>-</div><div class='ctx'> 	if (active)</div><div class='del'>-		IWL_DEBUG_TX_QUEUES(trans, "Activate %s Queue %d on FIFO %d\n",</div><div class='del'>-			scd_retry ? "BA" : "AC/CMD", txq_id, tx_fifo_id);</div><div class='add'>+		IWL_DEBUG_TX_QUEUES(trans, "Activate queue %d on FIFO %d\n",</div><div class='add'>+				    txq_id, tx_fifo_id);</div><div class='ctx'> 	else</div><div class='del'>-		IWL_DEBUG_TX_QUEUES(trans, "Deactivate %s Queue %d\n",</div><div class='del'>-			scd_retry ? "BA" : "AC/CMD", txq_id);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int get_ac_from_tid(u16 tid)</div><div class='del'>-{</div><div class='del'>-	if (likely(tid &lt; ARRAY_SIZE(tid_to_ac)))</div><div class='del'>-		return tid_to_ac[tid];</div><div class='del'>-</div><div class='del'>-	/* no support for TIDs 8-15 yet */</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int get_fifo_from_tid(struct iwl_trans_pcie *trans_pcie,</div><div class='del'>-				    u8 ctx, u16 tid)</div><div class='del'>-{</div><div class='del'>-	const u8 *ac_to_fifo = trans_pcie-&gt;ac_to_fifo[ctx];</div><div class='del'>-	if (likely(tid &lt; ARRAY_SIZE(tid_to_ac)))</div><div class='del'>-		return ac_to_fifo[tid_to_ac[tid]];</div><div class='del'>-</div><div class='del'>-	/* no support for TIDs 8-15 yet */</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool is_agg_txqid_valid(struct iwl_trans *trans, int txq_id)</div><div class='del'>-{</div><div class='del'>-	if (txq_id &lt; IWLAGN_FIRST_AMPDU_QUEUE)</div><div class='del'>-		return false;</div><div class='del'>-	return txq_id &lt; (IWLAGN_FIRST_AMPDU_QUEUE +</div><div class='del'>-		hw_params(trans).num_ampdu_queues);</div><div class='add'>+		IWL_DEBUG_TX_QUEUES(trans, "Deactivate queue %d\n", txq_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void iwl_trans_pcie_tx_agg_setup(struct iwl_trans *trans,</div><div class='del'>-				 enum iwl_rxon_context_id ctx, int sta_id,</div><div class='del'>-				 int tid, int frame_limit, u16 ssn)</div><div class='add'>+void iwl_trans_pcie_tx_agg_setup(struct iwl_trans *trans, int txq_id, int fifo,</div><div class='add'>+				 int sta_id, int tid, int frame_limit, u16 ssn)</div><div class='ctx'> {</div><div class='del'>-	int tx_fifo, txq_id;</div><div class='del'>-	u16 ra_tid;</div><div class='add'>+	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	u16 ra_tid = BUILD_RAxTID(sta_id, tid);</div><div class='ctx'> </div><div class='del'>-	struct iwl_trans_pcie *trans_pcie =</div><div class='del'>-		IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='del'>-</div><div class='del'>-	if (WARN_ON(sta_id == IWL_INVALID_STATION))</div><div class='del'>-		return;</div><div class='del'>-	if (WARN_ON(tid &gt;= IWL_MAX_TID_COUNT))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	tx_fifo = get_fifo_from_tid(trans_pcie, ctx, tid);</div><div class='del'>-	if (WARN_ON(tx_fifo &lt; 0)) {</div><div class='del'>-		IWL_ERR(trans, "txq_agg_setup, bad fifo: %d\n", tx_fifo);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	txq_id = trans_pcie-&gt;agg_txq[sta_id][tid];</div><div class='del'>-	if (WARN_ON_ONCE(!is_agg_txqid_valid(trans, txq_id))) {</div><div class='del'>-		IWL_ERR(trans,</div><div class='del'>-			"queue number out of range: %d, must be %d to %d\n",</div><div class='del'>-			txq_id, IWLAGN_FIRST_AMPDU_QUEUE,</div><div class='del'>-			IWLAGN_FIRST_AMPDU_QUEUE +</div><div class='del'>-			hw_params(trans).num_ampdu_queues - 1);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ra_tid = BUILD_RAxTID(sta_id, tid);</div><div class='add'>+	if (test_and_set_bit(txq_id, trans_pcie-&gt;queue_used))</div><div class='add'>+		WARN_ONCE(1, "queue %d already used - expect issues", txq_id);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;trans_pcie-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -550,10 +466,10 @@ void iwl_trans_pcie_tx_agg_setup(struct iwl_trans *trans,</div><div class='ctx'> 	iwlagn_tx_queue_set_q2ratid(trans, ra_tid, txq_id);</div><div class='ctx'> </div><div class='ctx'> 	/* Set this queue as a chain-building queue */</div><div class='del'>-	iwl_set_bits_prph(trans, SCD_QUEUECHAIN_SEL, (1&lt;&lt;txq_id));</div><div class='add'>+	iwl_set_bits_prph(trans, SCD_QUEUECHAIN_SEL, BIT(txq_id));</div><div class='ctx'> </div><div class='ctx'> 	/* enable aggregations for the queue */</div><div class='del'>-	iwl_set_bits_prph(trans, SCD_AGGR_SEL, (1&lt;&lt;txq_id));</div><div class='add'>+	iwl_set_bits_prph(trans, SCD_AGGR_SEL, BIT(txq_id));</div><div class='ctx'> </div><div class='ctx'> 	/* Place first TFD at index corresponding to start sequence number.</div><div class='ctx'> 	 * Assumes that ssn_idx is valid (!= 0xFFF) */</div><div class='hunk'>@@ -563,92 +479,42 @@ void iwl_trans_pcie_tx_agg_setup(struct iwl_trans *trans,</div><div class='ctx'> </div><div class='ctx'> 	/* Set up Tx window size and frame limit for this queue */</div><div class='ctx'> 	iwl_write_targ_mem(trans, trans_pcie-&gt;scd_base_addr +</div><div class='del'>-			SCD_CONTEXT_QUEUE_OFFSET(txq_id) +</div><div class='del'>-			sizeof(u32),</div><div class='del'>-			((frame_limit &lt;&lt;</div><div class='del'>-			SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) &amp;</div><div class='del'>-			SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) |</div><div class='del'>-			((frame_limit &lt;&lt;</div><div class='del'>-			SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &amp;</div><div class='del'>-			SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK));</div><div class='add'>+			SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),</div><div class='add'>+			((frame_limit &lt;&lt; SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) &amp;</div><div class='add'>+				SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) |</div><div class='add'>+			((frame_limit &lt;&lt; SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &amp;</div><div class='add'>+				SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK));</div><div class='ctx'> </div><div class='ctx'> 	iwl_set_bits_prph(trans, SCD_INTERRUPT_MASK, (1 &lt;&lt; txq_id));</div><div class='ctx'> </div><div class='ctx'> 	/* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */</div><div class='ctx'> 	iwl_trans_tx_queue_set_status(trans, &amp;trans_pcie-&gt;txq[txq_id],</div><div class='del'>-					tx_fifo, 1);</div><div class='del'>-</div><div class='del'>-	trans_pcie-&gt;txq[txq_id].sta_id = sta_id;</div><div class='del'>-	trans_pcie-&gt;txq[txq_id].tid = tid;</div><div class='add'>+				      fifo, true);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;trans_pcie-&gt;irq_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Find first available (lowest unused) Tx Queue, mark it "active".</div><div class='del'>- * Called only when finding queue for aggregation.</div><div class='del'>- * Should never return anything &lt; 7, because they should already</div><div class='del'>- * be in use as EDCA AC (0-3), Command (4), reserved (5, 6)</div><div class='del'>- */</div><div class='del'>-static int iwlagn_txq_ctx_activate_free(struct iwl_trans *trans)</div><div class='del'>-{</div><div class='del'>-	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='del'>-	int txq_id;</div><div class='del'>-</div><div class='del'>-	for (txq_id = 0; txq_id &lt; cfg(trans)-&gt;base_params-&gt;num_of_queues;</div><div class='del'>-	     txq_id++)</div><div class='del'>-		if (!test_and_set_bit(txq_id,</div><div class='del'>-					&amp;trans_pcie-&gt;txq_ctx_active_msk))</div><div class='del'>-			return txq_id;</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int iwl_trans_pcie_tx_agg_alloc(struct iwl_trans *trans,</div><div class='del'>-				int sta_id, int tid)</div><div class='del'>-{</div><div class='del'>-	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='del'>-	int txq_id;</div><div class='del'>-</div><div class='del'>-	txq_id = iwlagn_txq_ctx_activate_free(trans);</div><div class='del'>-	if (txq_id == -1) {</div><div class='del'>-		IWL_ERR(trans, "No free aggregation queue available\n");</div><div class='del'>-		return -ENXIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	trans_pcie-&gt;agg_txq[sta_id][tid] = txq_id;</div><div class='del'>-	iwl_set_swq_id(&amp;trans_pcie-&gt;txq[txq_id], get_ac_from_tid(tid), txq_id);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int iwl_trans_pcie_tx_agg_disable(struct iwl_trans *trans, int sta_id, int tid)</div><div class='add'>+void iwl_trans_pcie_tx_agg_disable(struct iwl_trans *trans, int txq_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='del'>-	u8 txq_id = trans_pcie-&gt;agg_txq[sta_id][tid];</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON_ONCE(!is_agg_txqid_valid(trans, txq_id))) {</div><div class='del'>-		IWL_ERR(trans,</div><div class='del'>-			"queue number out of range: %d, must be %d to %d\n",</div><div class='del'>-			txq_id, IWLAGN_FIRST_AMPDU_QUEUE,</div><div class='del'>-			IWLAGN_FIRST_AMPDU_QUEUE +</div><div class='del'>-			hw_params(trans).num_ampdu_queues - 1);</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (!test_and_clear_bit(txq_id, trans_pcie-&gt;queue_used)) {</div><div class='add'>+		WARN_ONCE(1, "queue %d not used", txq_id);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	iwlagn_tx_queue_stop_scheduler(trans, txq_id);</div><div class='ctx'> </div><div class='del'>-	iwl_clear_bits_prph(trans, SCD_AGGR_SEL, (1 &lt;&lt; txq_id));</div><div class='add'>+	iwl_clear_bits_prph(trans, SCD_AGGR_SEL, BIT(txq_id));</div><div class='ctx'> </div><div class='del'>-	trans_pcie-&gt;agg_txq[sta_id][tid] = 0;</div><div class='ctx'> 	trans_pcie-&gt;txq[txq_id].q.read_ptr = 0;</div><div class='ctx'> 	trans_pcie-&gt;txq[txq_id].q.write_ptr = 0;</div><div class='del'>-	/* supposes that ssn_idx is valid (!= 0xFFF) */</div><div class='ctx'> 	iwl_trans_set_wr_ptrs(trans, txq_id, 0);</div><div class='ctx'> </div><div class='del'>-	iwl_clear_bits_prph(trans, SCD_INTERRUPT_MASK, (1 &lt;&lt; txq_id));</div><div class='del'>-	iwl_txq_ctx_deactivate(trans_pcie, txq_id);</div><div class='del'>-	iwl_trans_tx_queue_set_status(trans, &amp;trans_pcie-&gt;txq[txq_id], 0, 0);</div><div class='del'>-	return 0;</div><div class='add'>+	iwl_clear_bits_prph(trans, SCD_INTERRUPT_MASK, BIT(txq_id));</div><div class='add'>+</div><div class='add'>+	iwl_trans_tx_queue_set_status(trans, &amp;trans_pcie-&gt;txq[txq_id],</div><div class='add'>+				      0, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*************** HOST COMMAND QUEUE FUNCTIONS   *****/</div><div class='hunk'>@@ -681,11 +547,6 @@ static int iwl_enqueue_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd)</div><div class='ctx'> 	int trace_idx;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	if (test_bit(STATUS_FW_ERROR, &amp;trans-&gt;shrd-&gt;status)) {</div><div class='del'>-		IWL_WARN(trans, "fw recovery, no hcmd send\n");</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	copy_size = sizeof(out_cmd-&gt;hdr);</div><div class='ctx'> 	cmd_size = sizeof(out_cmd-&gt;hdr);</div><div class='ctx'> </div><div class='hunk'>@@ -726,8 +587,8 @@ static int iwl_enqueue_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	idx = get_cmd_index(q, q-&gt;write_ptr);</div><div class='del'>-	out_cmd = txq-&gt;cmd[idx];</div><div class='del'>-	out_meta = &amp;txq-&gt;meta[idx];</div><div class='add'>+	out_cmd = txq-&gt;entries[idx].cmd;</div><div class='add'>+	out_meta = &amp;txq-&gt;entries[idx].meta;</div><div class='ctx'> </div><div class='ctx'> 	memset(out_meta, 0, sizeof(*out_meta));	/* re-initialize to NULL */</div><div class='ctx'> 	if (cmd-&gt;flags &amp; CMD_WANT_SKB)</div><div class='hunk'>@@ -753,12 +614,11 @@ static int iwl_enqueue_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd)</div><div class='ctx'> 		cmd_dest += cmd-&gt;len[i];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	IWL_DEBUG_HC(trans, "Sending command %s (#%x), seq: 0x%04X, "</div><div class='del'>-			"%d bytes at %d[%d]:%d\n",</div><div class='del'>-			get_cmd_string(out_cmd-&gt;hdr.cmd),</div><div class='del'>-			out_cmd-&gt;hdr.cmd,</div><div class='del'>-			le16_to_cpu(out_cmd-&gt;hdr.sequence), cmd_size,</div><div class='del'>-			q-&gt;write_ptr, idx, trans_pcie-&gt;cmd_queue);</div><div class='add'>+	IWL_DEBUG_HC(trans,</div><div class='add'>+		"Sending command %s (#%x), seq: 0x%04X, %d bytes at %d[%d]:%d\n",</div><div class='add'>+		trans_pcie_get_cmd_string(trans_pcie, out_cmd-&gt;hdr.cmd),</div><div class='add'>+		out_cmd-&gt;hdr.cmd, le16_to_cpu(out_cmd-&gt;hdr.sequence), cmd_size,</div><div class='add'>+		q-&gt;write_ptr, idx, trans_pcie-&gt;cmd_queue);</div><div class='ctx'> </div><div class='ctx'> 	phys_addr = dma_map_single(trans-&gt;dev, &amp;out_cmd-&gt;hdr, copy_size,</div><div class='ctx'> 				DMA_BIDIRECTIONAL);</div><div class='hunk'>@@ -816,6 +676,10 @@ static int iwl_enqueue_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd)</div><div class='ctx'> 			       trace_bufs[2], trace_lens[2]);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+	/* start timer if queue currently empty */</div><div class='add'>+	if (q-&gt;read_ptr == q-&gt;write_ptr &amp;&amp; trans_pcie-&gt;wd_timeout)</div><div class='add'>+		mod_timer(&amp;txq-&gt;stuck_timer, jiffies + trans_pcie-&gt;wd_timeout);</div><div class='add'>+</div><div class='ctx'> 	/* Increment and update queue's write index */</div><div class='ctx'> 	q-&gt;write_ptr = iwl_queue_inc_wrap(q-&gt;write_ptr, q-&gt;n_bd);</div><div class='ctx'> 	iwl_txq_update_write_ptr(trans, txq);</div><div class='hunk'>@@ -825,6 +689,22 @@ static int iwl_enqueue_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd)</div><div class='ctx'> 	return idx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void iwl_queue_progress(struct iwl_trans_pcie *trans_pcie,</div><div class='add'>+				      struct iwl_tx_queue *txq)</div><div class='add'>+{</div><div class='add'>+	if (!trans_pcie-&gt;wd_timeout)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * if empty delete timer, otherwise move timer forward</div><div class='add'>+	 * since we're making progress on this queue</div><div class='add'>+	 */</div><div class='add'>+	if (txq-&gt;q.read_ptr == txq-&gt;q.write_ptr)</div><div class='add'>+		del_timer(&amp;txq-&gt;stuck_timer);</div><div class='add'>+	else</div><div class='add'>+		mod_timer(&amp;txq-&gt;stuck_timer, jiffies + trans_pcie-&gt;wd_timeout);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * iwl_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd</div><div class='ctx'>  *</div><div class='hunk'>@@ -859,6 +739,8 @@ static void iwl_hcmd_queue_reclaim(struct iwl_trans *trans, int txq_id,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	iwl_queue_progress(trans_pcie, txq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -899,10 +781,8 @@ void iwl_tx_cmd_complete(struct iwl_trans *trans, struct iwl_rx_cmd_buffer *rxb,</div><div class='ctx'> 	spin_lock(&amp;txq-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	cmd_index = get_cmd_index(&amp;txq-&gt;q, index);</div><div class='del'>-	cmd = txq-&gt;cmd[cmd_index];</div><div class='del'>-	meta = &amp;txq-&gt;meta[cmd_index];</div><div class='del'>-</div><div class='del'>-	txq-&gt;time_stamp = jiffies;</div><div class='add'>+	cmd = txq-&gt;entries[cmd_index].cmd;</div><div class='add'>+	meta = &amp;txq-&gt;entries[cmd_index].meta;</div><div class='ctx'> </div><div class='ctx'> 	iwlagn_unmap_tfd(trans, meta, &amp;txq-&gt;tfds[index],</div><div class='ctx'> 			 DMA_BIDIRECTIONAL);</div><div class='hunk'>@@ -913,21 +793,23 @@ void iwl_tx_cmd_complete(struct iwl_trans *trans, struct iwl_rx_cmd_buffer *rxb,</div><div class='ctx'> </div><div class='ctx'> 		meta-&gt;source-&gt;resp_pkt = pkt;</div><div class='ctx'> 		meta-&gt;source-&gt;_rx_page_addr = (unsigned long)page_address(p);</div><div class='del'>-		meta-&gt;source-&gt;_rx_page_order = hw_params(trans).rx_page_order;</div><div class='add'>+		meta-&gt;source-&gt;_rx_page_order = trans_pcie-&gt;rx_page_order;</div><div class='ctx'> 		meta-&gt;source-&gt;handler_status = handler_status;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	iwl_hcmd_queue_reclaim(trans, txq_id, index);</div><div class='ctx'> </div><div class='ctx'> 	if (!(meta-&gt;flags &amp; CMD_ASYNC)) {</div><div class='del'>-		if (!test_bit(STATUS_HCMD_ACTIVE, &amp;trans-&gt;shrd-&gt;status)) {</div><div class='add'>+		if (!test_bit(STATUS_HCMD_ACTIVE, &amp;trans_pcie-&gt;status)) {</div><div class='ctx'> 			IWL_WARN(trans,</div><div class='ctx'> 				 "HCMD_ACTIVE already clear for command %s\n",</div><div class='del'>-				 get_cmd_string(cmd-&gt;hdr.cmd));</div><div class='add'>+				 trans_pcie_get_cmd_string(trans_pcie,</div><div class='add'>+							   cmd-&gt;hdr.cmd));</div><div class='ctx'> 		}</div><div class='del'>-		clear_bit(STATUS_HCMD_ACTIVE, &amp;trans-&gt;shrd-&gt;status);</div><div class='add'>+		clear_bit(STATUS_HCMD_ACTIVE, &amp;trans_pcie-&gt;status);</div><div class='ctx'> 		IWL_DEBUG_INFO(trans, "Clearing HCMD_ACTIVE for command %s\n",</div><div class='del'>-			       get_cmd_string(cmd-&gt;hdr.cmd));</div><div class='add'>+			       trans_pcie_get_cmd_string(trans_pcie,</div><div class='add'>+							 cmd-&gt;hdr.cmd));</div><div class='ctx'> 		wake_up(&amp;trans-&gt;wait_command_queue);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -940,6 +822,7 @@ void iwl_tx_cmd_complete(struct iwl_trans *trans, struct iwl_rx_cmd_buffer *rxb,</div><div class='ctx'> </div><div class='ctx'> static int iwl_send_cmd_async(struct iwl_trans *trans, struct iwl_host_cmd *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* An asynchronous command can not expect an SKB to be set. */</div><div class='hunk'>@@ -951,7 +834,7 @@ static int iwl_send_cmd_async(struct iwl_trans *trans, struct iwl_host_cmd *cmd)</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		IWL_ERR(trans,</div><div class='ctx'> 			"Error sending %s: enqueue_hcmd failed: %d\n",</div><div class='del'>-			  get_cmd_string(cmd-&gt;id), ret);</div><div class='add'>+			trans_pcie_get_cmd_string(trans_pcie, cmd-&gt;id), ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -964,55 +847,51 @@ static int iwl_send_cmd_sync(struct iwl_trans *trans, struct iwl_host_cmd *cmd)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_INFO(trans, "Attempting to send sync command %s\n",</div><div class='del'>-			get_cmd_string(cmd-&gt;id));</div><div class='del'>-</div><div class='del'>-	if (test_bit(STATUS_FW_ERROR, &amp;trans-&gt;shrd-&gt;status)) {</div><div class='del'>-		IWL_ERR(trans, "Command %s failed: FW Error\n",</div><div class='del'>-			       get_cmd_string(cmd-&gt;id));</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='add'>+		       trans_pcie_get_cmd_string(trans_pcie, cmd-&gt;id));</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(test_and_set_bit(STATUS_HCMD_ACTIVE,</div><div class='del'>-				     &amp;trans-&gt;shrd-&gt;status))) {</div><div class='add'>+				     &amp;trans_pcie-&gt;status))) {</div><div class='ctx'> 		IWL_ERR(trans, "Command %s: a command is already active!\n",</div><div class='del'>-			get_cmd_string(cmd-&gt;id));</div><div class='add'>+			trans_pcie_get_cmd_string(trans_pcie, cmd-&gt;id));</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_INFO(trans, "Setting HCMD_ACTIVE for command %s\n",</div><div class='del'>-			get_cmd_string(cmd-&gt;id));</div><div class='add'>+		       trans_pcie_get_cmd_string(trans_pcie, cmd-&gt;id));</div><div class='ctx'> </div><div class='ctx'> 	cmd_idx = iwl_enqueue_hcmd(trans, cmd);</div><div class='ctx'> 	if (cmd_idx &lt; 0) {</div><div class='ctx'> 		ret = cmd_idx;</div><div class='del'>-		clear_bit(STATUS_HCMD_ACTIVE, &amp;trans-&gt;shrd-&gt;status);</div><div class='add'>+		clear_bit(STATUS_HCMD_ACTIVE, &amp;trans_pcie-&gt;status);</div><div class='ctx'> 		IWL_ERR(trans,</div><div class='ctx'> 			"Error sending %s: enqueue_hcmd failed: %d\n",</div><div class='del'>-			  get_cmd_string(cmd-&gt;id), ret);</div><div class='add'>+			trans_pcie_get_cmd_string(trans_pcie, cmd-&gt;id), ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = wait_event_timeout(trans-&gt;wait_command_queue,</div><div class='del'>-			!test_bit(STATUS_HCMD_ACTIVE, &amp;trans-&gt;shrd-&gt;status),</div><div class='add'>+			!test_bit(STATUS_HCMD_ACTIVE, &amp;trans_pcie-&gt;status),</div><div class='ctx'> 			HOST_COMPLETE_TIMEOUT);</div><div class='ctx'> 	if (!ret) {</div><div class='del'>-		if (test_bit(STATUS_HCMD_ACTIVE, &amp;trans-&gt;shrd-&gt;status)) {</div><div class='add'>+		if (test_bit(STATUS_HCMD_ACTIVE, &amp;trans_pcie-&gt;status)) {</div><div class='ctx'> 			struct iwl_tx_queue *txq =</div><div class='ctx'> 				&amp;trans_pcie-&gt;txq[trans_pcie-&gt;cmd_queue];</div><div class='ctx'> 			struct iwl_queue *q = &amp;txq-&gt;q;</div><div class='ctx'> </div><div class='ctx'> 			IWL_ERR(trans,</div><div class='ctx'> 				"Error sending %s: time out after %dms.\n",</div><div class='del'>-				get_cmd_string(cmd-&gt;id),</div><div class='add'>+				trans_pcie_get_cmd_string(trans_pcie, cmd-&gt;id),</div><div class='ctx'> 				jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));</div><div class='ctx'> </div><div class='ctx'> 			IWL_ERR(trans,</div><div class='ctx'> 				"Current CMD queue read_ptr %d write_ptr %d\n",</div><div class='ctx'> 				q-&gt;read_ptr, q-&gt;write_ptr);</div><div class='ctx'> </div><div class='del'>-			clear_bit(STATUS_HCMD_ACTIVE, &amp;trans-&gt;shrd-&gt;status);</div><div class='del'>-			IWL_DEBUG_INFO(trans, "Clearing HCMD_ACTIVE for command"</div><div class='del'>-				 "%s\n", get_cmd_string(cmd-&gt;id));</div><div class='add'>+			clear_bit(STATUS_HCMD_ACTIVE, &amp;trans_pcie-&gt;status);</div><div class='add'>+			IWL_DEBUG_INFO(trans,</div><div class='add'>+				       "Clearing HCMD_ACTIVE for command %s\n",</div><div class='add'>+				       trans_pcie_get_cmd_string(trans_pcie,</div><div class='add'>+								 cmd-&gt;id));</div><div class='ctx'> 			ret = -ETIMEDOUT;</div><div class='ctx'> 			goto cancel;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1020,7 +899,7 @@ static int iwl_send_cmd_sync(struct iwl_trans *trans, struct iwl_host_cmd *cmd)</div><div class='ctx'> </div><div class='ctx'> 	if ((cmd-&gt;flags &amp; CMD_WANT_SKB) &amp;&amp; !cmd-&gt;resp_pkt) {</div><div class='ctx'> 		IWL_ERR(trans, "Error: Response NULL in '%s'\n",</div><div class='del'>-			  get_cmd_string(cmd-&gt;id));</div><div class='add'>+			trans_pcie_get_cmd_string(trans_pcie, cmd-&gt;id));</div><div class='ctx'> 		ret = -EIO;</div><div class='ctx'> 		goto cancel;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1035,8 +914,8 @@ cancel:</div><div class='ctx'> 		 * in later, it will possibly set an invalid</div><div class='ctx'> 		 * address (cmd-&gt;meta.source).</div><div class='ctx'> 		 */</div><div class='del'>-		trans_pcie-&gt;txq[trans_pcie-&gt;cmd_queue].meta[cmd_idx].flags &amp;=</div><div class='del'>-							~CMD_WANT_SKB;</div><div class='add'>+		trans_pcie-&gt;txq[trans_pcie-&gt;cmd_queue].</div><div class='add'>+			entries[cmd_idx].meta.flags &amp;= ~CMD_WANT_SKB;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cmd-&gt;resp_pkt) {</div><div class='hunk'>@@ -1091,17 +970,20 @@ int iwl_tx_queue_reclaim(struct iwl_trans *trans, int txq_id, int index,</div><div class='ctx'> 	     q-&gt;read_ptr != index;</div><div class='ctx'> 	     q-&gt;read_ptr = iwl_queue_inc_wrap(q-&gt;read_ptr, q-&gt;n_bd)) {</div><div class='ctx'> </div><div class='del'>-		if (WARN_ON_ONCE(txq-&gt;skbs[txq-&gt;q.read_ptr] == NULL))</div><div class='add'>+		if (WARN_ON_ONCE(txq-&gt;entries[txq-&gt;q.read_ptr].skb == NULL))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		__skb_queue_tail(skbs, txq-&gt;skbs[txq-&gt;q.read_ptr]);</div><div class='add'>+		__skb_queue_tail(skbs, txq-&gt;entries[txq-&gt;q.read_ptr].skb);</div><div class='ctx'> </div><div class='del'>-		txq-&gt;skbs[txq-&gt;q.read_ptr] = NULL;</div><div class='add'>+		txq-&gt;entries[txq-&gt;q.read_ptr].skb = NULL;</div><div class='ctx'> </div><div class='ctx'> 		iwlagn_txq_inval_byte_cnt_tbl(trans, txq);</div><div class='ctx'> </div><div class='del'>-		iwlagn_txq_free_tfd(trans, txq, txq-&gt;q.read_ptr, DMA_TO_DEVICE);</div><div class='add'>+		iwlagn_txq_free_tfd(trans, txq, DMA_TO_DEVICE);</div><div class='ctx'> 		freed++;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	iwl_queue_progress(trans_pcie, txq);</div><div class='add'>+</div><div class='ctx'> 	return freed;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c b/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c<br/>index 4d7b30d3e648..ec6fb395b84d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-trans-pcie.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-trans-pcie.c</a></div><div class='hunk'>@@ -68,18 +68,20 @@</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "iwl-drv.h"</div><div class='ctx'> #include "iwl-trans.h"</div><div class='ctx'> #include "iwl-trans-pcie-int.h"</div><div class='ctx'> #include "iwl-csr.h"</div><div class='ctx'> #include "iwl-prph.h"</div><div class='del'>-#include "iwl-shared.h"</div><div class='ctx'> #include "iwl-eeprom.h"</div><div class='ctx'> #include "iwl-agn-hw.h"</div><div class='add'>+/* FIXME: need to abstract out TX command (once we know what it looks like) */</div><div class='add'>+#include "iwl-commands.h"</div><div class='ctx'> </div><div class='ctx'> #define IWL_MASK(lo, hi) ((1 &lt;&lt; (hi)) | ((1 &lt;&lt; (hi)) - (1 &lt;&lt; (lo))))</div><div class='ctx'> </div><div class='ctx'> #define SCD_QUEUECHAIN_SEL_ALL(trans, trans_pcie)	\</div><div class='del'>-	(((1&lt;&lt;cfg(trans)-&gt;base_params-&gt;num_of_queues) - 1) &amp;\</div><div class='add'>+	(((1&lt;&lt;trans-&gt;cfg-&gt;base_params-&gt;num_of_queues) - 1) &amp;\</div><div class='ctx'> 	(~(1&lt;&lt;(trans_pcie)-&gt;cmd_queue)))</div><div class='ctx'> </div><div class='ctx'> static int iwl_trans_rx_alloc(struct iwl_trans *trans)</div><div class='hunk'>@@ -132,10 +134,10 @@ static void iwl_trans_rxq_free_rx_bufs(struct iwl_trans *trans)</div><div class='ctx'> 		 * to an SKB, so we need to unmap and free potential storage */</div><div class='ctx'> 		if (rxq-&gt;pool[i].page != NULL) {</div><div class='ctx'> 			dma_unmap_page(trans-&gt;dev, rxq-&gt;pool[i].page_dma,</div><div class='del'>-				PAGE_SIZE &lt;&lt; hw_params(trans).rx_page_order,</div><div class='add'>+				PAGE_SIZE &lt;&lt; trans_pcie-&gt;rx_page_order,</div><div class='ctx'> 				DMA_FROM_DEVICE);</div><div class='ctx'> 			__free_pages(rxq-&gt;pool[i].page,</div><div class='del'>-				     hw_params(trans).rx_page_order);</div><div class='add'>+				     trans_pcie-&gt;rx_page_order);</div><div class='ctx'> 			rxq-&gt;pool[i].page = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> 		list_add_tail(&amp;rxq-&gt;pool[i].list, &amp;rxq-&gt;rx_used);</div><div class='hunk'>@@ -145,11 +147,12 @@ static void iwl_trans_rxq_free_rx_bufs(struct iwl_trans *trans)</div><div class='ctx'> static void iwl_trans_rx_hw_init(struct iwl_trans *trans,</div><div class='ctx'> 				 struct iwl_rx_queue *rxq)</div><div class='ctx'> {</div><div class='add'>+	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> 	u32 rb_size;</div><div class='ctx'> 	const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */</div><div class='ctx'> 	u32 rb_timeout = RX_RB_TIMEOUT; /* FIXME: RX_RB_TIMEOUT for all devices? */</div><div class='ctx'> </div><div class='del'>-	if (iwlagn_mod_params.amsdu_size_8K)</div><div class='add'>+	if (trans_pcie-&gt;rx_buf_size_8k)</div><div class='ctx'> 		rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;</div><div class='ctx'> 	else</div><div class='ctx'> 		rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;</div><div class='hunk'>@@ -180,7 +183,6 @@ static void iwl_trans_rx_hw_init(struct iwl_trans *trans,</div><div class='ctx'> 			   FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |</div><div class='ctx'> 			   FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |</div><div class='ctx'> 			   FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |</div><div class='del'>-			   FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |</div><div class='ctx'> 			   rb_size|</div><div class='ctx'> 			   (rb_timeout &lt;&lt; FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|</div><div class='ctx'> 			   (rfdnlog &lt;&lt; FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));</div><div class='hunk'>@@ -299,6 +301,33 @@ static inline void iwlagn_free_dma_ptr(struct iwl_trans *trans,</div><div class='ctx'> 	memset(ptr, 0, sizeof(*ptr));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void iwl_trans_pcie_queue_stuck_timer(unsigned long data)</div><div class='add'>+{</div><div class='add'>+	struct iwl_tx_queue *txq = (void *)data;</div><div class='add'>+	struct iwl_trans_pcie *trans_pcie = txq-&gt;trans_pcie;</div><div class='add'>+	struct iwl_trans *trans = iwl_trans_pcie_get_trans(trans_pcie);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;txq-&gt;lock);</div><div class='add'>+	/* check if triggered erroneously */</div><div class='add'>+	if (txq-&gt;q.read_ptr == txq-&gt;q.write_ptr) {</div><div class='add'>+		spin_unlock(&amp;txq-&gt;lock);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;txq-&gt;lock);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	IWL_ERR(trans, "Queue %d stuck for %u ms.\n", txq-&gt;q.id,</div><div class='add'>+		jiffies_to_msecs(trans_pcie-&gt;wd_timeout));</div><div class='add'>+	IWL_ERR(trans, "Current SW read_ptr %d write_ptr %d\n",</div><div class='add'>+		txq-&gt;q.read_ptr, txq-&gt;q.write_ptr);</div><div class='add'>+	IWL_ERR(trans, "Current HW read_ptr %d write_ptr %d\n",</div><div class='add'>+		iwl_read_prph(trans, SCD_QUEUE_RDPTR(txq-&gt;q.id))</div><div class='add'>+					&amp; (TFD_QUEUE_SIZE_MAX - 1),</div><div class='add'>+		iwl_read_prph(trans, SCD_QUEUE_WRPTR(txq-&gt;q.id)));</div><div class='add'>+</div><div class='add'>+	iwl_op_mode_nic_error(trans-&gt;op_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int iwl_trans_txq_alloc(struct iwl_trans *trans,</div><div class='ctx'> 				struct iwl_tx_queue *txq, int slots_num,</div><div class='ctx'> 				u32 txq_id)</div><div class='hunk'>@@ -307,40 +336,31 @@ static int iwl_trans_txq_alloc(struct iwl_trans *trans,</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(txq-&gt;meta || txq-&gt;cmd || txq-&gt;skbs || txq-&gt;tfds))</div><div class='add'>+	if (WARN_ON(txq-&gt;entries || txq-&gt;tfds))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	setup_timer(&amp;txq-&gt;stuck_timer, iwl_trans_pcie_queue_stuck_timer,</div><div class='add'>+		    (unsigned long)txq);</div><div class='add'>+	txq-&gt;trans_pcie = trans_pcie;</div><div class='add'>+</div><div class='ctx'> 	txq-&gt;q.n_window = slots_num;</div><div class='ctx'> </div><div class='del'>-	txq-&gt;meta = kcalloc(slots_num, sizeof(txq-&gt;meta[0]), GFP_KERNEL);</div><div class='del'>-	txq-&gt;cmd = kcalloc(slots_num, sizeof(txq-&gt;cmd[0]), GFP_KERNEL);</div><div class='add'>+	txq-&gt;entries = kcalloc(slots_num,</div><div class='add'>+			       sizeof(struct iwl_pcie_tx_queue_entry),</div><div class='add'>+			       GFP_KERNEL);</div><div class='ctx'> </div><div class='del'>-	if (!txq-&gt;meta || !txq-&gt;cmd)</div><div class='add'>+	if (!txq-&gt;entries)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='ctx'> 	if (txq_id == trans_pcie-&gt;cmd_queue)</div><div class='ctx'> 		for (i = 0; i &lt; slots_num; i++) {</div><div class='del'>-			txq-&gt;cmd[i] = kmalloc(sizeof(struct iwl_device_cmd),</div><div class='del'>-						GFP_KERNEL);</div><div class='del'>-			if (!txq-&gt;cmd[i])</div><div class='add'>+			txq-&gt;entries[i].cmd =</div><div class='add'>+				kmalloc(sizeof(struct iwl_device_cmd),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+			if (!txq-&gt;entries[i].cmd)</div><div class='ctx'> 				goto error;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-	/* Alloc driver data array and TFD circular buffer */</div><div class='del'>-	/* Driver private data, only for Tx (not command) queues,</div><div class='del'>-	 * not shared with device. */</div><div class='del'>-	if (txq_id != trans_pcie-&gt;cmd_queue) {</div><div class='del'>-		txq-&gt;skbs = kcalloc(TFD_QUEUE_SIZE_MAX, sizeof(txq-&gt;skbs[0]),</div><div class='del'>-				    GFP_KERNEL);</div><div class='del'>-		if (!txq-&gt;skbs) {</div><div class='del'>-			IWL_ERR(trans, "kmalloc for auxiliary BD "</div><div class='del'>-				  "structures failed\n");</div><div class='del'>-			goto error;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		txq-&gt;skbs = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Circular buffer of transmit frame descriptors (TFDs),</div><div class='ctx'> 	 * shared with device */</div><div class='ctx'> 	txq-&gt;tfds = dma_alloc_coherent(trans-&gt;dev, tfd_sz,</div><div class='hunk'>@@ -353,37 +373,22 @@ static int iwl_trans_txq_alloc(struct iwl_trans *trans,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> error:</div><div class='del'>-	kfree(txq-&gt;skbs);</div><div class='del'>-	txq-&gt;skbs = NULL;</div><div class='del'>-	/* since txq-&gt;cmd has been zeroed,</div><div class='del'>-	 * all non allocated cmd[i] will be NULL */</div><div class='del'>-	if (txq-&gt;cmd &amp;&amp; txq_id == trans_pcie-&gt;cmd_queue)</div><div class='add'>+	if (txq-&gt;entries &amp;&amp; txq_id == trans_pcie-&gt;cmd_queue)</div><div class='ctx'> 		for (i = 0; i &lt; slots_num; i++)</div><div class='del'>-			kfree(txq-&gt;cmd[i]);</div><div class='del'>-	kfree(txq-&gt;meta);</div><div class='del'>-	kfree(txq-&gt;cmd);</div><div class='del'>-	txq-&gt;meta = NULL;</div><div class='del'>-	txq-&gt;cmd = NULL;</div><div class='add'>+			kfree(txq-&gt;entries[i].cmd);</div><div class='add'>+	kfree(txq-&gt;entries);</div><div class='add'>+	txq-&gt;entries = NULL;</div><div class='ctx'> </div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int iwl_trans_txq_init(struct iwl_trans *trans, struct iwl_tx_queue *txq,</div><div class='del'>-		      int slots_num, u32 txq_id)</div><div class='add'>+			      int slots_num, u32 txq_id)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	txq-&gt;need_update = 0;</div><div class='del'>-	memset(txq-&gt;meta, 0, sizeof(txq-&gt;meta[0]) * slots_num);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * For the default queues 0-3, set up the swq_id</div><div class='del'>-	 * already -- all others need to get one later</div><div class='del'>-	 * (if they need one at all).</div><div class='del'>-	 */</div><div class='del'>-	if (txq_id &lt; 4)</div><div class='del'>-		iwl_set_swq_id(txq, txq_id, txq_id);</div><div class='ctx'> </div><div class='ctx'> 	/* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise</div><div class='ctx'> 	 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */</div><div class='hunk'>@@ -430,9 +435,7 @@ static void iwl_tx_queue_unmap(struct iwl_trans *trans, int txq_id)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;txq-&gt;lock);</div><div class='ctx'> 	while (q-&gt;write_ptr != q-&gt;read_ptr) {</div><div class='del'>-		/* The read_ptr needs to bound by q-&gt;n_window */</div><div class='del'>-		iwlagn_txq_free_tfd(trans, txq, get_cmd_index(q, q-&gt;read_ptr),</div><div class='del'>-				    dma_dir);</div><div class='add'>+		iwlagn_txq_free_tfd(trans, txq, dma_dir);</div><div class='ctx'> 		q-&gt;read_ptr = iwl_queue_inc_wrap(q-&gt;read_ptr, q-&gt;n_bd);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_bh(&amp;txq-&gt;lock);</div><div class='hunk'>@@ -461,7 +464,7 @@ static void iwl_tx_queue_free(struct iwl_trans *trans, int txq_id)</div><div class='ctx'> </div><div class='ctx'> 	if (txq_id == trans_pcie-&gt;cmd_queue)</div><div class='ctx'> 		for (i = 0; i &lt; txq-&gt;q.n_window; i++)</div><div class='del'>-			kfree(txq-&gt;cmd[i]);</div><div class='add'>+			kfree(txq-&gt;entries[i].cmd);</div><div class='ctx'> </div><div class='ctx'> 	/* De-alloc circular buffer of TFDs */</div><div class='ctx'> 	if (txq-&gt;q.n_bd) {</div><div class='hunk'>@@ -470,15 +473,10 @@ static void iwl_tx_queue_free(struct iwl_trans *trans, int txq_id)</div><div class='ctx'> 		memset(&amp;txq-&gt;q.dma_addr, 0, sizeof(txq-&gt;q.dma_addr));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* De-alloc array of per-TFD driver data */</div><div class='del'>-	kfree(txq-&gt;skbs);</div><div class='del'>-	txq-&gt;skbs = NULL;</div><div class='add'>+	kfree(txq-&gt;entries);</div><div class='add'>+	txq-&gt;entries = NULL;</div><div class='ctx'> </div><div class='del'>-	/* deallocate arrays */</div><div class='del'>-	kfree(txq-&gt;cmd);</div><div class='del'>-	kfree(txq-&gt;meta);</div><div class='del'>-	txq-&gt;cmd = NULL;</div><div class='del'>-	txq-&gt;meta = NULL;</div><div class='add'>+	del_timer_sync(&amp;txq-&gt;stuck_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* 0-fill queue descriptor structure */</div><div class='ctx'> 	memset(txq, 0, sizeof(*txq));</div><div class='hunk'>@@ -497,7 +495,7 @@ static void iwl_trans_pcie_tx_free(struct iwl_trans *trans)</div><div class='ctx'> 	/* Tx queues */</div><div class='ctx'> 	if (trans_pcie-&gt;txq) {</div><div class='ctx'> 		for (txq_id = 0;</div><div class='del'>-		     txq_id &lt; cfg(trans)-&gt;base_params-&gt;num_of_queues; txq_id++)</div><div class='add'>+		     txq_id &lt; trans-&gt;cfg-&gt;base_params-&gt;num_of_queues; txq_id++)</div><div class='ctx'> 			iwl_tx_queue_free(trans, txq_id);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -522,7 +520,7 @@ static int iwl_trans_tx_alloc(struct iwl_trans *trans)</div><div class='ctx'> 	int txq_id, slots_num;</div><div class='ctx'> 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> </div><div class='del'>-	u16 scd_bc_tbls_size = cfg(trans)-&gt;base_params-&gt;num_of_queues *</div><div class='add'>+	u16 scd_bc_tbls_size = trans-&gt;cfg-&gt;base_params-&gt;num_of_queues *</div><div class='ctx'> 			sizeof(struct iwlagn_scd_bc_tbl);</div><div class='ctx'> </div><div class='ctx'> 	/*It is not allowed to alloc twice, so warn when this happens.</div><div class='hunk'>@@ -546,7 +544,7 @@ static int iwl_trans_tx_alloc(struct iwl_trans *trans)</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	trans_pcie-&gt;txq = kcalloc(cfg(trans)-&gt;base_params-&gt;num_of_queues,</div><div class='add'>+	trans_pcie-&gt;txq = kcalloc(trans-&gt;cfg-&gt;base_params-&gt;num_of_queues,</div><div class='ctx'> 				  sizeof(struct iwl_tx_queue), GFP_KERNEL);</div><div class='ctx'> 	if (!trans_pcie-&gt;txq) {</div><div class='ctx'> 		IWL_ERR(trans, "Not enough memory for txq\n");</div><div class='hunk'>@@ -555,7 +553,7 @@ static int iwl_trans_tx_alloc(struct iwl_trans *trans)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Alloc and init all Tx queues, including the command queue (#4/#9) */</div><div class='del'>-	for (txq_id = 0; txq_id &lt; cfg(trans)-&gt;base_params-&gt;num_of_queues;</div><div class='add'>+	for (txq_id = 0; txq_id &lt; trans-&gt;cfg-&gt;base_params-&gt;num_of_queues;</div><div class='ctx'> 	     txq_id++) {</div><div class='ctx'> 		slots_num = (txq_id == trans_pcie-&gt;cmd_queue) ?</div><div class='ctx'> 					TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;</div><div class='hunk'>@@ -601,7 +599,7 @@ static int iwl_tx_init(struct iwl_trans *trans)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;trans_pcie-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* Alloc and init all Tx queues, including the command queue (#4/#9) */</div><div class='del'>-	for (txq_id = 0; txq_id &lt; cfg(trans)-&gt;base_params-&gt;num_of_queues;</div><div class='add'>+	for (txq_id = 0; txq_id &lt; trans-&gt;cfg-&gt;base_params-&gt;num_of_queues;</div><div class='ctx'> 	     txq_id++) {</div><div class='ctx'> 		slots_num = (txq_id == trans_pcie-&gt;cmd_queue) ?</div><div class='ctx'> 					TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;</div><div class='hunk'>@@ -724,9 +722,9 @@ static int iwl_apm_init(struct iwl_trans *trans)</div><div class='ctx'> 	iwl_apm_config(trans);</div><div class='ctx'> </div><div class='ctx'> 	/* Configure analog phase-lock-loop before activating to D0A */</div><div class='del'>-	if (cfg(trans)-&gt;base_params-&gt;pll_cfg_val)</div><div class='add'>+	if (trans-&gt;cfg-&gt;base_params-&gt;pll_cfg_val)</div><div class='ctx'> 		iwl_set_bit(trans, CSR_ANA_PLL_CFG,</div><div class='del'>-			    cfg(trans)-&gt;base_params-&gt;pll_cfg_val);</div><div class='add'>+			    trans-&gt;cfg-&gt;base_params-&gt;pll_cfg_val);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Set "initialization complete" bit to move adapter from</div><div class='hunk'>@@ -836,7 +834,7 @@ static int iwl_nic_init(struct iwl_trans *trans)</div><div class='ctx'> 	if (iwl_tx_init(trans))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (cfg(trans)-&gt;base_params-&gt;shadow_reg_enable) {</div><div class='add'>+	if (trans-&gt;cfg-&gt;base_params-&gt;shadow_reg_enable) {</div><div class='ctx'> 		/* enable shadow regs in HW */</div><div class='ctx'> 		iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTRL,</div><div class='ctx'> 			0x800FFFFF);</div><div class='hunk'>@@ -895,59 +893,6 @@ static int iwl_prepare_card_hw(struct iwl_trans *trans)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define IWL_AC_UNSET -1</div><div class='del'>-</div><div class='del'>-struct queue_to_fifo_ac {</div><div class='del'>-	s8 fifo, ac;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct queue_to_fifo_ac iwlagn_default_queue_to_tx_fifo[] = {</div><div class='del'>-	{ IWL_TX_FIFO_VO, IEEE80211_AC_VO, },</div><div class='del'>-	{ IWL_TX_FIFO_VI, IEEE80211_AC_VI, },</div><div class='del'>-	{ IWL_TX_FIFO_BE, IEEE80211_AC_BE, },</div><div class='del'>-	{ IWL_TX_FIFO_BK, IEEE80211_AC_BK, },</div><div class='del'>-	{ IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },</div><div class='del'>-	{ IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },</div><div class='del'>-	{ IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },</div><div class='del'>-	{ IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },</div><div class='del'>-	{ IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },</div><div class='del'>-	{ IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },</div><div class='del'>-	{ IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct queue_to_fifo_ac iwlagn_ipan_queue_to_tx_fifo[] = {</div><div class='del'>-	{ IWL_TX_FIFO_VO, IEEE80211_AC_VO, },</div><div class='del'>-	{ IWL_TX_FIFO_VI, IEEE80211_AC_VI, },</div><div class='del'>-	{ IWL_TX_FIFO_BE, IEEE80211_AC_BE, },</div><div class='del'>-	{ IWL_TX_FIFO_BK, IEEE80211_AC_BK, },</div><div class='del'>-	{ IWL_TX_FIFO_BK_IPAN, IEEE80211_AC_BK, },</div><div class='del'>-	{ IWL_TX_FIFO_BE_IPAN, IEEE80211_AC_BE, },</div><div class='del'>-	{ IWL_TX_FIFO_VI_IPAN, IEEE80211_AC_VI, },</div><div class='del'>-	{ IWL_TX_FIFO_VO_IPAN, IEEE80211_AC_VO, },</div><div class='del'>-	{ IWL_TX_FIFO_BE_IPAN, 2, },</div><div class='del'>-	{ IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },</div><div class='del'>-	{ IWL_TX_FIFO_AUX, IWL_AC_UNSET, },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const u8 iwlagn_bss_ac_to_fifo[] = {</div><div class='del'>-	IWL_TX_FIFO_VO,</div><div class='del'>-	IWL_TX_FIFO_VI,</div><div class='del'>-	IWL_TX_FIFO_BE,</div><div class='del'>-	IWL_TX_FIFO_BK,</div><div class='del'>-};</div><div class='del'>-static const u8 iwlagn_bss_ac_to_queue[] = {</div><div class='del'>-	0, 1, 2, 3,</div><div class='del'>-};</div><div class='del'>-static const u8 iwlagn_pan_ac_to_fifo[] = {</div><div class='del'>-	IWL_TX_FIFO_VO_IPAN,</div><div class='del'>-	IWL_TX_FIFO_VI_IPAN,</div><div class='del'>-	IWL_TX_FIFO_BE_IPAN,</div><div class='del'>-	IWL_TX_FIFO_BK_IPAN,</div><div class='del'>-};</div><div class='del'>-static const u8 iwlagn_pan_ac_to_queue[] = {</div><div class='del'>-	7, 6, 5, 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * ucode</div><div class='ctx'>  */</div><div class='hunk'>@@ -1028,34 +973,21 @@ static int iwl_trans_pcie_start_fw(struct iwl_trans *trans,</div><div class='ctx'> 				   const struct fw_img *fw)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct iwl_trans_pcie *trans_pcie =</div><div class='del'>-		IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> 	bool hw_rfkill;</div><div class='ctx'> </div><div class='del'>-	trans_pcie-&gt;ac_to_queue[IWL_RXON_CTX_BSS] = iwlagn_bss_ac_to_queue;</div><div class='del'>-	trans_pcie-&gt;ac_to_queue[IWL_RXON_CTX_PAN] = iwlagn_pan_ac_to_queue;</div><div class='del'>-</div><div class='del'>-	trans_pcie-&gt;ac_to_fifo[IWL_RXON_CTX_BSS] = iwlagn_bss_ac_to_fifo;</div><div class='del'>-	trans_pcie-&gt;ac_to_fifo[IWL_RXON_CTX_PAN] = iwlagn_pan_ac_to_fifo;</div><div class='del'>-</div><div class='del'>-	trans_pcie-&gt;mcast_queue[IWL_RXON_CTX_BSS] = 0;</div><div class='del'>-	trans_pcie-&gt;mcast_queue[IWL_RXON_CTX_PAN] = IWL_IPAN_MCAST_QUEUE;</div><div class='del'>-</div><div class='ctx'> 	/* This may fail if AMT took ownership of the device */</div><div class='ctx'> 	if (iwl_prepare_card_hw(trans)) {</div><div class='ctx'> 		IWL_WARN(trans, "Exit HW not ready\n");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	iwl_enable_rfkill_int(trans);</div><div class='add'>+</div><div class='ctx'> 	/* If platform's RF_KILL switch is NOT set to KILL */</div><div class='del'>-	hw_rfkill = !(iwl_read32(trans, CSR_GP_CNTRL) &amp;</div><div class='del'>-				CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);</div><div class='add'>+	hw_rfkill = iwl_is_rfkill_set(trans);</div><div class='ctx'> 	iwl_op_mode_hw_rf_kill(trans-&gt;op_mode, hw_rfkill);</div><div class='del'>-</div><div class='del'>-	if (hw_rfkill) {</div><div class='del'>-		iwl_enable_rfkill_int(trans);</div><div class='add'>+	if (hw_rfkill)</div><div class='ctx'> 		return -ERFKILL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);</div><div class='ctx'> </div><div class='hunk'>@@ -1098,9 +1030,7 @@ static void iwl_trans_txq_set_sched(struct iwl_trans *trans, u32 mask)</div><div class='ctx'> </div><div class='ctx'> static void iwl_tx_start(struct iwl_trans *trans)</div><div class='ctx'> {</div><div class='del'>-	const struct queue_to_fifo_ac *queue_to_fifo;</div><div class='del'>-	struct iwl_trans_pcie *trans_pcie =</div><div class='del'>-		IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='add'>+	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> 	u32 a;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int i, chan;</div><div class='hunk'>@@ -1121,7 +1051,7 @@ static void iwl_tx_start(struct iwl_trans *trans)</div><div class='ctx'> 		iwl_write_targ_mem(trans, a, 0);</div><div class='ctx'> 	for (; a &lt; trans_pcie-&gt;scd_base_addr +</div><div class='ctx'> 	       SCD_TRANS_TBL_OFFSET_QUEUE(</div><div class='del'>-				cfg(trans)-&gt;base_params-&gt;num_of_queues);</div><div class='add'>+				trans-&gt;cfg-&gt;base_params-&gt;num_of_queues);</div><div class='ctx'> 	       a += 4)</div><div class='ctx'> 		iwl_write_targ_mem(trans, a, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -1144,7 +1074,7 @@ static void iwl_tx_start(struct iwl_trans *trans)</div><div class='ctx'> 	iwl_write_prph(trans, SCD_AGGR_SEL, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* initiate the queues */</div><div class='del'>-	for (i = 0; i &lt; cfg(trans)-&gt;base_params-&gt;num_of_queues; i++) {</div><div class='add'>+	for (i = 0; i &lt; trans-&gt;cfg-&gt;base_params-&gt;num_of_queues; i++) {</div><div class='ctx'> 		iwl_write_prph(trans, SCD_QUEUE_RDPTR(i), 0);</div><div class='ctx'> 		iwl_write_direct32(trans, HBUS_TARG_WRPTR, 0 | (i &lt;&lt; 8));</div><div class='ctx'> 		iwl_write_targ_mem(trans, trans_pcie-&gt;scd_base_addr +</div><div class='hunk'>@@ -1161,46 +1091,24 @@ static void iwl_tx_start(struct iwl_trans *trans)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	iwl_write_prph(trans, SCD_INTERRUPT_MASK,</div><div class='del'>-			IWL_MASK(0, cfg(trans)-&gt;base_params-&gt;num_of_queues));</div><div class='add'>+			IWL_MASK(0, trans-&gt;cfg-&gt;base_params-&gt;num_of_queues));</div><div class='ctx'> </div><div class='ctx'> 	/* Activate all Tx DMA/FIFO channels */</div><div class='ctx'> 	iwl_trans_txq_set_sched(trans, IWL_MASK(0, 7));</div><div class='ctx'> </div><div class='del'>-	/* map queues to FIFOs */</div><div class='del'>-	if (trans-&gt;shrd-&gt;valid_contexts != BIT(IWL_RXON_CTX_BSS))</div><div class='del'>-		queue_to_fifo = iwlagn_ipan_queue_to_tx_fifo;</div><div class='del'>-	else</div><div class='del'>-		queue_to_fifo = iwlagn_default_queue_to_tx_fifo;</div><div class='del'>-</div><div class='ctx'> 	iwl_trans_set_wr_ptrs(trans, trans_pcie-&gt;cmd_queue, 0);</div><div class='ctx'> </div><div class='del'>-	/* make sure all queue are not stopped */</div><div class='del'>-	memset(&amp;trans_pcie-&gt;queue_stopped[0], 0,</div><div class='del'>-		sizeof(trans_pcie-&gt;queue_stopped));</div><div class='del'>-	for (i = 0; i &lt; 4; i++)</div><div class='del'>-		atomic_set(&amp;trans_pcie-&gt;queue_stop_count[i], 0);</div><div class='del'>-</div><div class='del'>-	/* reset to 0 to enable all the queue first */</div><div class='del'>-	trans_pcie-&gt;txq_ctx_active_msk = 0;</div><div class='add'>+	/* make sure all queue are not stopped/used */</div><div class='add'>+	memset(trans_pcie-&gt;queue_stopped, 0, sizeof(trans_pcie-&gt;queue_stopped));</div><div class='add'>+	memset(trans_pcie-&gt;queue_used, 0, sizeof(trans_pcie-&gt;queue_used));</div><div class='ctx'> </div><div class='del'>-	BUILD_BUG_ON(ARRAY_SIZE(iwlagn_default_queue_to_tx_fifo) &lt;</div><div class='del'>-						IWLAGN_FIRST_AMPDU_QUEUE);</div><div class='del'>-	BUILD_BUG_ON(ARRAY_SIZE(iwlagn_ipan_queue_to_tx_fifo) &lt;</div><div class='del'>-						IWLAGN_FIRST_AMPDU_QUEUE);</div><div class='add'>+	for (i = 0; i &lt; trans_pcie-&gt;n_q_to_fifo; i++) {</div><div class='add'>+		int fifo = trans_pcie-&gt;setup_q_to_fifo[i];</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; IWLAGN_FIRST_AMPDU_QUEUE; i++) {</div><div class='del'>-		int fifo = queue_to_fifo[i].fifo;</div><div class='del'>-		int ac = queue_to_fifo[i].ac;</div><div class='add'>+		set_bit(i, trans_pcie-&gt;queue_used);</div><div class='ctx'> </div><div class='del'>-		iwl_txq_ctx_activate(trans_pcie, i);</div><div class='del'>-</div><div class='del'>-		if (fifo == IWL_TX_FIFO_UNUSED)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (ac != IWL_AC_UNSET)</div><div class='del'>-			iwl_set_swq_id(&amp;trans_pcie-&gt;txq[i], ac, i);</div><div class='ctx'> 		iwl_trans_tx_queue_set_status(trans, &amp;trans_pcie-&gt;txq[i],</div><div class='del'>-					      fifo, 0);</div><div class='add'>+					      fifo, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;trans_pcie-&gt;irq_lock, flags);</div><div class='hunk'>@@ -1251,7 +1159,7 @@ static int iwl_trans_tx_stop(struct iwl_trans *trans)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Unmap DMA from host system and free skb's */</div><div class='del'>-	for (txq_id = 0; txq_id &lt; cfg(trans)-&gt;base_params-&gt;num_of_queues;</div><div class='add'>+	for (txq_id = 0; txq_id &lt; trans-&gt;cfg-&gt;base_params-&gt;num_of_queues;</div><div class='ctx'> 	     txq_id++)</div><div class='ctx'> 		iwl_tx_queue_unmap(trans, txq_id);</div><div class='ctx'> </div><div class='hunk'>@@ -1303,6 +1211,8 @@ static void iwl_trans_pcie_stop_device(struct iwl_trans *trans)</div><div class='ctx'> 	iwl_disable_interrupts(trans);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;trans_pcie-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='add'>+	iwl_enable_rfkill_int(trans);</div><div class='add'>+</div><div class='ctx'> 	/* wait to make sure we flush pending tasklet*/</div><div class='ctx'> 	synchronize_irq(trans_pcie-&gt;irq);</div><div class='ctx'> 	tasklet_kill(&amp;trans_pcie-&gt;irq_tasklet);</div><div class='hunk'>@@ -1311,6 +1221,12 @@ static void iwl_trans_pcie_stop_device(struct iwl_trans *trans)</div><div class='ctx'> </div><div class='ctx'> 	/* stop and reset the on-board processor */</div><div class='ctx'> 	iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);</div><div class='add'>+</div><div class='add'>+	/* clear all status bits */</div><div class='add'>+	clear_bit(STATUS_HCMD_ACTIVE, &amp;trans_pcie-&gt;status);</div><div class='add'>+	clear_bit(STATUS_INT_ENABLED, &amp;trans_pcie-&gt;status);</div><div class='add'>+	clear_bit(STATUS_DEVICE_ENABLED, &amp;trans_pcie-&gt;status);</div><div class='add'>+	clear_bit(STATUS_TPOWER_PMI, &amp;trans_pcie-&gt;status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void iwl_trans_pcie_wowlan_suspend(struct iwl_trans *trans)</div><div class='hunk'>@@ -1325,81 +1241,43 @@ static void iwl_trans_pcie_wowlan_suspend(struct iwl_trans *trans)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb,</div><div class='del'>-		struct iwl_device_cmd *dev_cmd, enum iwl_rxon_context_id ctx,</div><div class='del'>-		u8 sta_id, u8 tid)</div><div class='add'>+			     struct iwl_device_cmd *dev_cmd, int txq_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb-&gt;data;</div><div class='del'>-	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);</div><div class='ctx'> 	struct iwl_tx_cmd *tx_cmd = (struct iwl_tx_cmd *) dev_cmd-&gt;payload;</div><div class='ctx'> 	struct iwl_cmd_meta *out_meta;</div><div class='ctx'> 	struct iwl_tx_queue *txq;</div><div class='ctx'> 	struct iwl_queue *q;</div><div class='del'>-</div><div class='ctx'> 	dma_addr_t phys_addr = 0;</div><div class='ctx'> 	dma_addr_t txcmd_phys;</div><div class='ctx'> 	dma_addr_t scratch_phys;</div><div class='ctx'> 	u16 len, firstlen, secondlen;</div><div class='ctx'> 	u8 wait_write_ptr = 0;</div><div class='del'>-	u8 txq_id;</div><div class='del'>-	bool is_agg = false;</div><div class='ctx'> 	__le16 fc = hdr-&gt;frame_control;</div><div class='ctx'> 	u8 hdr_len = ieee80211_hdrlen(fc);</div><div class='ctx'> 	u16 __maybe_unused wifi_seq;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Send this frame after DTIM -- there's a special queue</div><div class='del'>-	 * reserved for this for contexts that support AP mode.</div><div class='del'>-	 */</div><div class='del'>-	if (info-&gt;flags &amp; IEEE80211_TX_CTL_SEND_AFTER_DTIM) {</div><div class='del'>-		txq_id = trans_pcie-&gt;mcast_queue[ctx];</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * The microcode will clear the more data</div><div class='del'>-		 * bit in the last frame it transmits.</div><div class='del'>-		 */</div><div class='del'>-		hdr-&gt;frame_control |=</div><div class='del'>-			cpu_to_le16(IEEE80211_FCTL_MOREDATA);</div><div class='del'>-	} else if (info-&gt;flags &amp; IEEE80211_TX_CTL_TX_OFFCHAN)</div><div class='del'>-		txq_id = IWL_AUX_QUEUE;</div><div class='del'>-	else</div><div class='del'>-		txq_id =</div><div class='del'>-		    trans_pcie-&gt;ac_to_queue[ctx][skb_get_queue_mapping(skb)];</div><div class='del'>-</div><div class='del'>-	/* aggregation is on for this &lt;sta,tid&gt; */</div><div class='del'>-	if (info-&gt;flags &amp; IEEE80211_TX_CTL_AMPDU) {</div><div class='del'>-		WARN_ON(tid &gt;= IWL_MAX_TID_COUNT);</div><div class='del'>-		txq_id = trans_pcie-&gt;agg_txq[sta_id][tid];</div><div class='del'>-		is_agg = true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	txq = &amp;trans_pcie-&gt;txq[txq_id];</div><div class='ctx'> 	q = &amp;txq-&gt;q;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;txq-&gt;lock);</div><div class='add'>+	if (unlikely(!test_bit(txq_id, trans_pcie-&gt;queue_used))) {</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* In AGG mode, the index in the ring must correspond to the WiFi</div><div class='del'>-	 * sequence number. This is a HW requirements to help the SCD to parse</div><div class='del'>-	 * the BA.</div><div class='del'>-	 * Check here that the packets are in the right place on the ring.</div><div class='del'>-	 */</div><div class='del'>-#ifdef CONFIG_IWLWIFI_DEBUG</div><div class='del'>-	wifi_seq = SEQ_TO_SN(le16_to_cpu(hdr-&gt;seq_ctrl));</div><div class='del'>-	WARN_ONCE(is_agg &amp;&amp; ((wifi_seq &amp; 0xff) != q-&gt;write_ptr),</div><div class='del'>-		  "Q: %d WiFi Seq %d tfdNum %d",</div><div class='del'>-		  txq_id, wifi_seq, q-&gt;write_ptr);</div><div class='del'>-#endif</div><div class='add'>+	spin_lock(&amp;txq-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Set up driver data for this TFD */</div><div class='del'>-	txq-&gt;skbs[q-&gt;write_ptr] = skb;</div><div class='del'>-	txq-&gt;cmd[q-&gt;write_ptr] = dev_cmd;</div><div class='add'>+	txq-&gt;entries[q-&gt;write_ptr].skb = skb;</div><div class='add'>+	txq-&gt;entries[q-&gt;write_ptr].cmd = dev_cmd;</div><div class='ctx'> </div><div class='ctx'> 	dev_cmd-&gt;hdr.cmd = REPLY_TX;</div><div class='ctx'> 	dev_cmd-&gt;hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |</div><div class='ctx'> 				INDEX_TO_SEQ(q-&gt;write_ptr)));</div><div class='ctx'> </div><div class='ctx'> 	/* Set up first empty entry in queue's array of Tx/cmd buffers */</div><div class='del'>-	out_meta = &amp;txq-&gt;meta[q-&gt;write_ptr];</div><div class='add'>+	out_meta = &amp;txq-&gt;entries[q-&gt;write_ptr].meta;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Use the first empty entry in this queue's command buffer array</div><div class='hunk'>@@ -1481,6 +1359,10 @@ static int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb,</div><div class='ctx'> 			     &amp;dev_cmd-&gt;hdr, firstlen,</div><div class='ctx'> 			     skb-&gt;data + hdr_len, secondlen);</div><div class='ctx'> </div><div class='add'>+	/* start timer if queue currently empty */</div><div class='add'>+	if (q-&gt;read_ptr == q-&gt;write_ptr &amp;&amp; trans_pcie-&gt;wd_timeout)</div><div class='add'>+		mod_timer(&amp;txq-&gt;stuck_timer, jiffies + trans_pcie-&gt;wd_timeout);</div><div class='add'>+</div><div class='ctx'> 	/* Tell device the write index *just past* this latest filled TFD */</div><div class='ctx'> 	q-&gt;write_ptr = iwl_queue_inc_wrap(q-&gt;write_ptr, q-&gt;n_bd);</div><div class='ctx'> 	iwl_txq_update_write_ptr(trans, txq);</div><div class='hunk'>@@ -1541,8 +1423,10 @@ static int iwl_trans_pcie_start_hw(struct iwl_trans *trans)</div><div class='ctx'> </div><div class='ctx'> 	iwl_apm_init(trans);</div><div class='ctx'> </div><div class='del'>-	hw_rfkill = !(iwl_read32(trans, CSR_GP_CNTRL) &amp;</div><div class='del'>-				CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);</div><div class='add'>+	/* From now on, the op_mode will be kept updated about RF kill state */</div><div class='add'>+	iwl_enable_rfkill_int(trans);</div><div class='add'>+</div><div class='add'>+	hw_rfkill = iwl_is_rfkill_set(trans);</div><div class='ctx'> 	iwl_op_mode_hw_rf_kill(trans-&gt;op_mode, hw_rfkill);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1555,18 +1439,41 @@ error:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_trans_pcie_stop_hw(struct iwl_trans *trans)</div><div class='add'>+static void iwl_trans_pcie_stop_hw(struct iwl_trans *trans,</div><div class='add'>+				   bool op_mode_leaving)</div><div class='ctx'> {</div><div class='add'>+	bool hw_rfkill;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='add'>+</div><div class='ctx'> 	iwl_apm_stop(trans);</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;trans_pcie-&gt;irq_lock, flags);</div><div class='add'>+	iwl_disable_interrupts(trans);</div><div class='add'>+	spin_unlock_irqrestore(&amp;trans_pcie-&gt;irq_lock, flags);</div><div class='add'>+</div><div class='ctx'> 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);</div><div class='ctx'> </div><div class='del'>-	/* Even if we stop the HW, we still want the RF kill interrupt */</div><div class='del'>-	iwl_enable_rfkill_int(trans);</div><div class='add'>+	if (!op_mode_leaving) {</div><div class='add'>+		/*</div><div class='add'>+		 * Even if we stop the HW, we still want the RF kill</div><div class='add'>+		 * interrupt</div><div class='add'>+		 */</div><div class='add'>+		iwl_enable_rfkill_int(trans);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Check again since the RF kill state may have changed while</div><div class='add'>+		 * all the interrupts were disabled, in this case we couldn't</div><div class='add'>+		 * receive the RF kill interrupt and update the state in the</div><div class='add'>+		 * op_mode.</div><div class='add'>+		 */</div><div class='add'>+		hw_rfkill = iwl_is_rfkill_set(trans);</div><div class='add'>+		iwl_op_mode_hw_rf_kill(trans-&gt;op_mode, hw_rfkill);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwl_trans_pcie_reclaim(struct iwl_trans *trans, int sta_id, int tid,</div><div class='del'>-		      int txq_id, int ssn, struct sk_buff_head *skbs)</div><div class='add'>+static void iwl_trans_pcie_reclaim(struct iwl_trans *trans, int txq_id, int ssn,</div><div class='add'>+				   struct sk_buff_head *skbs)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> 	struct iwl_tx_queue *txq = &amp;trans_pcie-&gt;txq[txq_id];</div><div class='hunk'>@@ -1576,35 +1483,15 @@ static int iwl_trans_pcie_reclaim(struct iwl_trans *trans, int sta_id, int tid,</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;txq-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	txq-&gt;time_stamp = jiffies;</div><div class='del'>-</div><div class='del'>-	if (unlikely(txq_id &gt;= IWLAGN_FIRST_AMPDU_QUEUE &amp;&amp;</div><div class='del'>-		     tid != IWL_TID_NON_QOS &amp;&amp;</div><div class='del'>-		     txq_id != trans_pcie-&gt;agg_txq[sta_id][tid])) {</div><div class='del'>-		/*</div><div class='del'>-		 * FIXME: this is a uCode bug which need to be addressed,</div><div class='del'>-		 * log the information and return for now.</div><div class='del'>-		 * Since it is can possibly happen very often and in order</div><div class='del'>-		 * not to fill the syslog, don't use IWL_ERR or IWL_WARN</div><div class='del'>-		 */</div><div class='del'>-		IWL_DEBUG_TX_QUEUES(trans, "Bad queue mapping txq_id %d, "</div><div class='del'>-			"agg_txq[sta_id[tid] %d", txq_id,</div><div class='del'>-			trans_pcie-&gt;agg_txq[sta_id][tid]);</div><div class='del'>-		spin_unlock(&amp;txq-&gt;lock);</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (txq-&gt;q.read_ptr != tfd_num) {</div><div class='del'>-		IWL_DEBUG_TX_REPLY(trans, "[Q %d | AC %d] %d -&gt; %d (%d)\n",</div><div class='del'>-				txq_id, iwl_get_queue_ac(txq), txq-&gt;q.read_ptr,</div><div class='del'>-				tfd_num, ssn);</div><div class='add'>+		IWL_DEBUG_TX_REPLY(trans, "[Q %d] %d -&gt; %d (%d)\n",</div><div class='add'>+				   txq_id, txq-&gt;q.read_ptr, tfd_num, ssn);</div><div class='ctx'> 		freed = iwl_tx_queue_reclaim(trans, txq_id, tfd_num, skbs);</div><div class='ctx'> 		if (iwl_queue_space(&amp;txq-&gt;q) &gt; txq-&gt;q.low_mark)</div><div class='ctx'> 			iwl_wake_queue(trans, txq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;txq-&gt;lock);</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void iwl_trans_pcie_write8(struct iwl_trans *trans, u32 ofs, u8 val)</div><div class='hunk'>@@ -1623,7 +1510,7 @@ static u32 iwl_trans_pcie_read32(struct iwl_trans *trans, u32 ofs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void iwl_trans_pcie_configure(struct iwl_trans *trans,</div><div class='del'>-			      const struct iwl_trans_config *trans_cfg)</div><div class='add'>+				     const struct iwl_trans_config *trans_cfg)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> </div><div class='hunk'>@@ -1635,9 +1522,31 @@ static void iwl_trans_pcie_configure(struct iwl_trans *trans,</div><div class='ctx'> 	if (trans_pcie-&gt;n_no_reclaim_cmds)</div><div class='ctx'> 		memcpy(trans_pcie-&gt;no_reclaim_cmds, trans_cfg-&gt;no_reclaim_cmds,</div><div class='ctx'> 		       trans_pcie-&gt;n_no_reclaim_cmds * sizeof(u8));</div><div class='add'>+</div><div class='add'>+	trans_pcie-&gt;n_q_to_fifo = trans_cfg-&gt;n_queue_to_fifo;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(trans_pcie-&gt;n_q_to_fifo &gt; IWL_MAX_HW_QUEUES))</div><div class='add'>+		trans_pcie-&gt;n_q_to_fifo = IWL_MAX_HW_QUEUES;</div><div class='add'>+</div><div class='add'>+	/* at least the command queue must be mapped */</div><div class='add'>+	WARN_ON(!trans_pcie-&gt;n_q_to_fifo);</div><div class='add'>+</div><div class='add'>+	memcpy(trans_pcie-&gt;setup_q_to_fifo, trans_cfg-&gt;queue_to_fifo,</div><div class='add'>+	       trans_pcie-&gt;n_q_to_fifo * sizeof(u8));</div><div class='add'>+</div><div class='add'>+	trans_pcie-&gt;rx_buf_size_8k = trans_cfg-&gt;rx_buf_size_8k;</div><div class='add'>+	if (trans_pcie-&gt;rx_buf_size_8k)</div><div class='add'>+		trans_pcie-&gt;rx_page_order = get_order(8 * 1024);</div><div class='add'>+	else</div><div class='add'>+		trans_pcie-&gt;rx_page_order = get_order(4 * 1024);</div><div class='add'>+</div><div class='add'>+	trans_pcie-&gt;wd_timeout =</div><div class='add'>+		msecs_to_jiffies(trans_cfg-&gt;queue_watchdog_timeout);</div><div class='add'>+</div><div class='add'>+	trans_pcie-&gt;command_names = trans_cfg-&gt;command_names;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void iwl_trans_pcie_free(struct iwl_trans *trans)</div><div class='add'>+void iwl_trans_pcie_free(struct iwl_trans *trans)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_trans_pcie *trans_pcie =</div><div class='ctx'> 		IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='hunk'>@@ -1656,10 +1565,19 @@ static void iwl_trans_pcie_free(struct iwl_trans *trans)</div><div class='ctx'> 	pci_release_regions(trans_pcie-&gt;pci_dev);</div><div class='ctx'> 	pci_disable_device(trans_pcie-&gt;pci_dev);</div><div class='ctx'> </div><div class='del'>-	trans-&gt;shrd-&gt;trans = NULL;</div><div class='ctx'> 	kfree(trans);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void iwl_trans_pcie_set_pmi(struct iwl_trans *trans, bool state)</div><div class='add'>+{</div><div class='add'>+	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='add'>+</div><div class='add'>+	if (state)</div><div class='add'>+		set_bit(STATUS_TPOWER_PMI, &amp;trans_pcie-&gt;status);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(STATUS_TPOWER_PMI, &amp;trans_pcie-&gt;status);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='ctx'> static int iwl_trans_pcie_suspend(struct iwl_trans *trans)</div><div class='ctx'> {</div><div class='hunk'>@@ -1670,16 +1588,14 @@ static int iwl_trans_pcie_resume(struct iwl_trans *trans)</div><div class='ctx'> {</div><div class='ctx'> 	bool hw_rfkill;</div><div class='ctx'> </div><div class='del'>-	hw_rfkill = !(iwl_read32(trans, CSR_GP_CNTRL) &amp;</div><div class='del'>-				CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);</div><div class='del'>-</div><div class='del'>-	if (hw_rfkill)</div><div class='del'>-		iwl_enable_rfkill_int(trans);</div><div class='del'>-	else</div><div class='del'>-		iwl_enable_interrupts(trans);</div><div class='add'>+	iwl_enable_rfkill_int(trans);</div><div class='ctx'> </div><div class='add'>+	hw_rfkill = iwl_is_rfkill_set(trans);</div><div class='ctx'> 	iwl_op_mode_hw_rf_kill(trans-&gt;op_mode, hw_rfkill);</div><div class='ctx'> </div><div class='add'>+	if (!hw_rfkill)</div><div class='add'>+		iwl_enable_interrupts(trans);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_PM_SLEEP */</div><div class='hunk'>@@ -1696,7 +1612,7 @@ static int iwl_trans_pcie_wait_tx_queue_empty(struct iwl_trans *trans)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* waiting for all the tx frames complete might take a while */</div><div class='del'>-	for (cnt = 0; cnt &lt; cfg(trans)-&gt;base_params-&gt;num_of_queues; cnt++) {</div><div class='add'>+	for (cnt = 0; cnt &lt; trans-&gt;cfg-&gt;base_params-&gt;num_of_queues; cnt++) {</div><div class='ctx'> 		if (cnt == trans_pcie-&gt;cmd_queue)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		txq = &amp;trans_pcie-&gt;txq[cnt];</div><div class='hunk'>@@ -1714,42 +1630,9 @@ static int iwl_trans_pcie_wait_tx_queue_empty(struct iwl_trans *trans)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * On every watchdog tick we check (latest) time stamp. If it does not</div><div class='del'>- * change during timeout period and queue is not empty we reset firmware.</div><div class='del'>- */</div><div class='del'>-static int iwl_trans_pcie_check_stuck_queue(struct iwl_trans *trans, int cnt)</div><div class='del'>-{</div><div class='del'>-	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='del'>-	struct iwl_tx_queue *txq = &amp;trans_pcie-&gt;txq[cnt];</div><div class='del'>-	struct iwl_queue *q = &amp;txq-&gt;q;</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-</div><div class='del'>-	if (q-&gt;read_ptr == q-&gt;write_ptr) {</div><div class='del'>-		txq-&gt;time_stamp = jiffies;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	timeout = txq-&gt;time_stamp +</div><div class='del'>-		  msecs_to_jiffies(hw_params(trans).wd_timeout);</div><div class='del'>-</div><div class='del'>-	if (time_after(jiffies, timeout)) {</div><div class='del'>-		IWL_ERR(trans, "Queue %d stuck for %u ms.\n", q-&gt;id,</div><div class='del'>-			hw_params(trans).wd_timeout);</div><div class='del'>-		IWL_ERR(trans, "Current SW read_ptr %d write_ptr %d\n",</div><div class='del'>-			q-&gt;read_ptr, q-&gt;write_ptr);</div><div class='del'>-		IWL_ERR(trans, "Current HW read_ptr %d write_ptr %d\n",</div><div class='del'>-			iwl_read_prph(trans, SCD_QUEUE_RDPTR(cnt))</div><div class='del'>-				&amp; (TFD_QUEUE_SIZE_MAX - 1),</div><div class='del'>-			iwl_read_prph(trans, SCD_QUEUE_WRPTR(cnt)));</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const char *get_fh_string(int cmd)</div><div class='ctx'> {</div><div class='add'>+#define IWL_CMD(x) case x: return #x</div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);</div><div class='ctx'> 	IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);</div><div class='hunk'>@@ -1763,6 +1646,7 @@ static const char *get_fh_string(int cmd)</div><div class='ctx'> 	default:</div><div class='ctx'> 		return "UNKNOWN";</div><div class='ctx'> 	}</div><div class='add'>+#undef IWL_CMD</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int iwl_dump_fh(struct iwl_trans *trans, char **buf, bool display)</div><div class='hunk'>@@ -1811,6 +1695,7 @@ int iwl_dump_fh(struct iwl_trans *trans, char **buf, bool display)</div><div class='ctx'> </div><div class='ctx'> static const char *get_csr_string(int cmd)</div><div class='ctx'> {</div><div class='add'>+#define IWL_CMD(x) case x: return #x</div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	IWL_CMD(CSR_HW_IF_CONFIG_REG);</div><div class='ctx'> 	IWL_CMD(CSR_INT_COALESCING);</div><div class='hunk'>@@ -1838,6 +1723,7 @@ static const char *get_csr_string(int cmd)</div><div class='ctx'> 	default:</div><div class='ctx'> 		return "UNKNOWN";</div><div class='ctx'> 	}</div><div class='add'>+#undef IWL_CMD</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void iwl_dump_csr(struct iwl_trans *trans)</div><div class='hunk'>@@ -1938,32 +1824,23 @@ static ssize_t iwl_dbgfs_tx_queue_read(struct file *file,</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	size_t bufsz;</div><div class='ctx'> </div><div class='del'>-	bufsz = sizeof(char) * 64 * cfg(trans)-&gt;base_params-&gt;num_of_queues;</div><div class='add'>+	bufsz = sizeof(char) * 64 * trans-&gt;cfg-&gt;base_params-&gt;num_of_queues;</div><div class='ctx'> </div><div class='del'>-	if (!trans_pcie-&gt;txq) {</div><div class='del'>-		IWL_ERR(trans, "txq not ready\n");</div><div class='add'>+	if (!trans_pcie-&gt;txq)</div><div class='ctx'> 		return -EAGAIN;</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='ctx'> 	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (cnt = 0; cnt &lt; cfg(trans)-&gt;base_params-&gt;num_of_queues; cnt++) {</div><div class='add'>+	for (cnt = 0; cnt &lt; trans-&gt;cfg-&gt;base_params-&gt;num_of_queues; cnt++) {</div><div class='ctx'> 		txq = &amp;trans_pcie-&gt;txq[cnt];</div><div class='ctx'> 		q = &amp;txq-&gt;q;</div><div class='ctx'> 		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-				"hwq %.2d: read=%u write=%u stop=%d"</div><div class='del'>-				" swq_id=%#.2x (ac %d/hwq %d)\n",</div><div class='add'>+				"hwq %.2d: read=%u write=%u use=%d stop=%d\n",</div><div class='ctx'> 				cnt, q-&gt;read_ptr, q-&gt;write_ptr,</div><div class='del'>-				!!test_bit(cnt, trans_pcie-&gt;queue_stopped),</div><div class='del'>-				txq-&gt;swq_id, txq-&gt;swq_id &amp; 3,</div><div class='del'>-				(txq-&gt;swq_id &gt;&gt; 2) &amp; 0x1f);</div><div class='del'>-		if (cnt &gt;= 4)</div><div class='del'>-			continue;</div><div class='del'>-		/* for the ACs, display the stop count too */</div><div class='del'>-		pos += scnprintf(buf + pos, bufsz - pos,</div><div class='del'>-			"        stop-count: %d\n",</div><div class='del'>-			atomic_read(&amp;trans_pcie-&gt;queue_stop_count[cnt]));</div><div class='add'>+				!!test_bit(cnt, trans_pcie-&gt;queue_used),</div><div class='add'>+				!!test_bit(cnt, trans_pcie-&gt;queue_stopped));</div><div class='ctx'> 	}</div><div class='ctx'> 	ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);</div><div class='ctx'> 	kfree(buf);</div><div class='hunk'>@@ -1997,44 +1874,6 @@ static ssize_t iwl_dbgfs_rx_queue_read(struct file *file,</div><div class='ctx'> 	return simple_read_from_buffer(user_buf, count, ppos, buf, pos);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t iwl_dbgfs_log_event_read(struct file *file,</div><div class='del'>-					 char __user *user_buf,</div><div class='del'>-					 size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct iwl_trans *trans = file-&gt;private_data;</div><div class='del'>-	char *buf;</div><div class='del'>-	int pos = 0;</div><div class='del'>-	ssize_t ret = -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ret = pos = iwl_dump_nic_event_log(trans, true, &amp;buf, true);</div><div class='del'>-	if (buf) {</div><div class='del'>-		ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);</div><div class='del'>-		kfree(buf);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t iwl_dbgfs_log_event_write(struct file *file,</div><div class='del'>-					const char __user *user_buf,</div><div class='del'>-					size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct iwl_trans *trans = file-&gt;private_data;</div><div class='del'>-	u32 event_log_flag;</div><div class='del'>-	char buf[8];</div><div class='del'>-	int buf_size;</div><div class='del'>-</div><div class='del'>-	memset(buf, 0, sizeof(buf));</div><div class='del'>-	buf_size = min(count, sizeof(buf) -  1);</div><div class='del'>-	if (copy_from_user(buf, user_buf, buf_size))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	if (sscanf(buf, "%d", &amp;event_log_flag) != 1)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	if (event_log_flag == 1)</div><div class='del'>-		iwl_dump_nic_event_log(trans, true, NULL, false);</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static ssize_t iwl_dbgfs_interrupt_read(struct file *file,</div><div class='ctx'> 					char __user *user_buf,</div><div class='ctx'> 					size_t count, loff_t *ppos) {</div><div class='hunk'>@@ -2050,10 +1889,8 @@ static ssize_t iwl_dbgfs_interrupt_read(struct file *file,</div><div class='ctx'> 	ssize_t ret;</div><div class='ctx'> </div><div class='ctx'> 	buf = kzalloc(bufsz, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		IWL_ERR(trans, "Can not allocate Buffer\n");</div><div class='add'>+	if (!buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	pos += scnprintf(buf + pos, bufsz - pos,</div><div class='ctx'> 			"Interrupt Statistics Report:\n");</div><div class='hunk'>@@ -2161,12 +1998,26 @@ static ssize_t iwl_dbgfs_fh_reg_read(struct file *file,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-DEBUGFS_READ_WRITE_FILE_OPS(log_event);</div><div class='add'>+static ssize_t iwl_dbgfs_fw_restart_write(struct file *file,</div><div class='add'>+					  const char __user *user_buf,</div><div class='add'>+					  size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct iwl_trans *trans = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	if (!trans-&gt;op_mode)</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	iwl_op_mode_nic_error(trans-&gt;op_mode);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> DEBUGFS_READ_WRITE_FILE_OPS(interrupt);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(fh_reg);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(rx_queue);</div><div class='ctx'> DEBUGFS_READ_FILE_OPS(tx_queue);</div><div class='ctx'> DEBUGFS_WRITE_FILE_OPS(csr);</div><div class='add'>+DEBUGFS_WRITE_FILE_OPS(fw_restart);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Create the debugfs files and directories</div><div class='hunk'>@@ -2177,10 +2028,10 @@ static int iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans,</div><div class='ctx'> {</div><div class='ctx'> 	DEBUGFS_ADD_FILE(rx_queue, dir, S_IRUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(tx_queue, dir, S_IRUSR);</div><div class='del'>-	DEBUGFS_ADD_FILE(log_event, dir, S_IWUSR | S_IRUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(interrupt, dir, S_IWUSR | S_IRUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(csr, dir, S_IWUSR);</div><div class='ctx'> 	DEBUGFS_ADD_FILE(fh_reg, dir, S_IRUSR);</div><div class='add'>+	DEBUGFS_ADD_FILE(fw_restart, dir, S_IWUSR);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='hunk'>@@ -2190,7 +2041,7 @@ static int iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans,</div><div class='ctx'> </div><div class='ctx'> #endif /*CONFIG_IWLWIFI_DEBUGFS */</div><div class='ctx'> </div><div class='del'>-const struct iwl_trans_ops trans_ops_pcie = {</div><div class='add'>+static const struct iwl_trans_ops trans_ops_pcie = {</div><div class='ctx'> 	.start_hw = iwl_trans_pcie_start_hw,</div><div class='ctx'> 	.stop_hw = iwl_trans_pcie_stop_hw,</div><div class='ctx'> 	.fw_alive = iwl_trans_pcie_fw_alive,</div><div class='hunk'>@@ -2205,15 +2056,11 @@ const struct iwl_trans_ops trans_ops_pcie = {</div><div class='ctx'> 	.reclaim = iwl_trans_pcie_reclaim,</div><div class='ctx'> </div><div class='ctx'> 	.tx_agg_disable = iwl_trans_pcie_tx_agg_disable,</div><div class='del'>-	.tx_agg_alloc = iwl_trans_pcie_tx_agg_alloc,</div><div class='ctx'> 	.tx_agg_setup = iwl_trans_pcie_tx_agg_setup,</div><div class='ctx'> </div><div class='del'>-	.free = iwl_trans_pcie_free,</div><div class='del'>-</div><div class='ctx'> 	.dbgfs_register = iwl_trans_pcie_dbgfs_register,</div><div class='ctx'> </div><div class='ctx'> 	.wait_tx_queue_empty = iwl_trans_pcie_wait_tx_queue_empty,</div><div class='del'>-	.check_stuck_queue = iwl_trans_pcie_check_stuck_queue,</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='ctx'> 	.suspend = iwl_trans_pcie_suspend,</div><div class='hunk'>@@ -2223,11 +2070,12 @@ const struct iwl_trans_ops trans_ops_pcie = {</div><div class='ctx'> 	.write32 = iwl_trans_pcie_write32,</div><div class='ctx'> 	.read32 = iwl_trans_pcie_read32,</div><div class='ctx'> 	.configure = iwl_trans_pcie_configure,</div><div class='add'>+	.set_pmi = iwl_trans_pcie_set_pmi,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct iwl_trans *iwl_trans_pcie_alloc(struct iwl_shared *shrd,</div><div class='del'>-				       struct pci_dev *pdev,</div><div class='del'>-				       const struct pci_device_id *ent)</div><div class='add'>+struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,</div><div class='add'>+				       const struct pci_device_id *ent,</div><div class='add'>+				       const struct iwl_cfg *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_trans_pcie *trans_pcie;</div><div class='ctx'> 	struct iwl_trans *trans;</div><div class='hunk'>@@ -2243,7 +2091,7 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct iwl_shared *shrd,</div><div class='ctx'> 	trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);</div><div class='ctx'> </div><div class='ctx'> 	trans-&gt;ops = &amp;trans_ops_pcie;</div><div class='del'>-	trans-&gt;shrd = shrd;</div><div class='add'>+	trans-&gt;cfg = cfg;</div><div class='ctx'> 	trans_pcie-&gt;trans = trans;</div><div class='ctx'> 	spin_lock_init(&amp;trans_pcie-&gt;irq_lock);</div><div class='ctx'> 	init_waitqueue_head(&amp;trans_pcie-&gt;ucode_write_waitq);</div><div class='hunk'>@@ -2325,6 +2173,7 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct iwl_shared *shrd,</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize the wait queue for commands */</div><div class='ctx'> 	init_waitqueue_head(&amp;trans-&gt;wait_command_queue);</div><div class='add'>+	spin_lock_init(&amp;trans-&gt;reg_lock);</div><div class='ctx'> </div><div class='ctx'> 	return trans;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-trans.h b/drivers/net/wireless/iwlwifi/iwl-trans.h<br/>index 0c81cbaa8088..79a1e7ae4995 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-trans.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-trans.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-trans.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-trans.h</a></div><div class='hunk'>@@ -66,8 +66,9 @@</div><div class='ctx'> #include &lt;linux/ieee80211.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt; /* for page_address */</div><div class='ctx'> </div><div class='del'>-#include "iwl-shared.h"</div><div class='ctx'> #include "iwl-debug.h"</div><div class='add'>+#include "iwl-config.h"</div><div class='add'>+#include "iwl-fw.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * DOC: Transport layer - what is it ?</div><div class='hunk'>@@ -104,13 +105,6 @@</div><div class='ctx'>  *	6) Eventually, the free function will be called.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-struct iwl_priv;</div><div class='del'>-struct iwl_shared;</div><div class='del'>-struct iwl_op_mode;</div><div class='del'>-struct fw_img;</div><div class='del'>-struct sk_buff;</div><div class='del'>-struct dentry;</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * DOC: Host command section</div><div class='ctx'>  *</div><div class='hunk'>@@ -162,6 +156,8 @@ struct iwl_cmd_header {</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #define FH_RSCSR_FRAME_SIZE_MSK		0x00003FFF	/* bits 0-13 */</div><div class='add'>+#define FH_RSCSR_FRAME_INVALID		0x55550000</div><div class='add'>+#define FH_RSCSR_FRAME_ALIGN		0x40</div><div class='ctx'> </div><div class='ctx'> struct iwl_rx_packet {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -260,27 +256,43 @@ static inline void iwl_free_resp(struct iwl_host_cmd *cmd)</div><div class='ctx'> </div><div class='ctx'> struct iwl_rx_cmd_buffer {</div><div class='ctx'> 	struct page *_page;</div><div class='add'>+	int _offset;</div><div class='add'>+	bool _page_stolen;</div><div class='add'>+	unsigned int truesize;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline void *rxb_addr(struct iwl_rx_cmd_buffer *r)</div><div class='ctx'> {</div><div class='del'>-	return page_address(r-&gt;_page);</div><div class='add'>+	return (void *)((unsigned long)page_address(r-&gt;_page) + r-&gt;_offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int rxb_offset(struct iwl_rx_cmd_buffer *r)</div><div class='add'>+{</div><div class='add'>+	return r-&gt;_offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline struct page *rxb_steal_page(struct iwl_rx_cmd_buffer *r)</div><div class='ctx'> {</div><div class='del'>-	struct page *p = r-&gt;_page;</div><div class='del'>-	r-&gt;_page = NULL;</div><div class='del'>-	return p;</div><div class='add'>+	r-&gt;_page_stolen = true;</div><div class='add'>+	get_page(r-&gt;_page);</div><div class='add'>+	return r-&gt;_page;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define MAX_NO_RECLAIM_CMDS	6</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Maximum number of HW queues the transport layer</div><div class='add'>+ * currently supports</div><div class='add'>+ */</div><div class='add'>+#define IWL_MAX_HW_QUEUES		32</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct iwl_trans_config - transport configuration</div><div class='ctx'>  *</div><div class='ctx'>  * @op_mode: pointer to the upper layer.</div><div class='del'>- *	Must be set before any other call.</div><div class='add'>+ * @queue_to_fifo: queue to FIFO mapping to set up by</div><div class='add'>+ *	default</div><div class='add'>+ * @n_queue_to_fifo: number of queues to set up</div><div class='ctx'>  * @cmd_queue: the index of the command queue.</div><div class='ctx'>  *	Must be set before start_fw.</div><div class='ctx'>  * @no_reclaim_cmds: Some devices erroneously don't set the</div><div class='hunk'>@@ -288,14 +300,29 @@ static inline struct page *rxb_steal_page(struct iwl_rx_cmd_buffer *r)</div><div class='ctx'>  *	list of such notifications to filter. Max length is</div><div class='ctx'>  *	%MAX_NO_RECLAIM_CMDS.</div><div class='ctx'>  * @n_no_reclaim_cmds: # of commands in list</div><div class='add'>+ * @rx_buf_size_8k: 8 kB RX buffer size needed for A-MSDUs,</div><div class='add'>+ *	if unset 4k will be the RX buffer size</div><div class='add'>+ * @queue_watchdog_timeout: time (in ms) after which queues</div><div class='add'>+ *	are considered stuck and will trigger device restart</div><div class='add'>+ * @command_names: array of command names, must be 256 entries</div><div class='add'>+ *	(one for each command); for debugging only</div><div class='ctx'>  */</div><div class='ctx'> struct iwl_trans_config {</div><div class='ctx'> 	struct iwl_op_mode *op_mode;</div><div class='add'>+	const u8 *queue_to_fifo;</div><div class='add'>+	u8 n_queue_to_fifo;</div><div class='add'>+</div><div class='ctx'> 	u8 cmd_queue;</div><div class='ctx'> 	const u8 *no_reclaim_cmds;</div><div class='ctx'> 	int n_no_reclaim_cmds;</div><div class='add'>+</div><div class='add'>+	bool rx_buf_size_8k;</div><div class='add'>+	unsigned int queue_watchdog_timeout;</div><div class='add'>+	const char **command_names;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct iwl_trans;</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct iwl_trans_ops - transport specific operations</div><div class='ctx'>  *</div><div class='hunk'>@@ -304,7 +331,8 @@ struct iwl_trans_config {</div><div class='ctx'>  * @start_hw: starts the HW- from that point on, the HW can send interrupts</div><div class='ctx'>  *	May sleep</div><div class='ctx'>  * @stop_hw: stops the HW- from that point on, the HW will be in low power but</div><div class='del'>- *	will still issue interrupt if the HW RF kill is triggered.</div><div class='add'>+ *	will still issue interrupt if the HW RF kill is triggered unless</div><div class='add'>+ *	op_mode_leaving is true.</div><div class='ctx'>  *	May sleep</div><div class='ctx'>  * @start_fw: allocates and inits all the resources for the transport</div><div class='ctx'>  *	layer. Also kick a fw image.</div><div class='hunk'>@@ -322,18 +350,11 @@ struct iwl_trans_config {</div><div class='ctx'>  *	Must be atomic</div><div class='ctx'>  * @reclaim: free packet until ssn. Returns a list of freed packets.</div><div class='ctx'>  *	Must be atomic</div><div class='del'>- * @tx_agg_alloc: allocate resources for a TX BA session</div><div class='del'>- *	Must be atomic</div><div class='ctx'>  * @tx_agg_setup: setup a tx queue for AMPDU - will be called once the HW is</div><div class='ctx'>  *	ready and a successful ADDBA response has been received.</div><div class='ctx'>  *	May sleep</div><div class='ctx'>  * @tx_agg_disable: de-configure a Tx queue to send AMPDUs</div><div class='ctx'>  *	Must be atomic</div><div class='del'>- * @free: release all the ressource for the transport layer itself such as</div><div class='del'>- *	irq, tasklet etc... From this point on, the device may not issue</div><div class='del'>- *	any interrupt (incl. RFKILL).</div><div class='del'>- *	May sleep</div><div class='del'>- * @check_stuck_queue: check if a specific queue is stuck</div><div class='ctx'>  * @wait_tx_queue_empty: wait until all tx queues are empty</div><div class='ctx'>  *	May sleep</div><div class='ctx'>  * @dbgfs_register: add the dbgfs files under this directory. Files will be</div><div class='hunk'>@@ -346,11 +367,12 @@ struct iwl_trans_config {</div><div class='ctx'>  * @configure: configure parameters required by the transport layer from</div><div class='ctx'>  *	the op_mode. May be called several times before start_fw, can't be</div><div class='ctx'>  *	called after that.</div><div class='add'>+ * @set_pmi: set the power pmi state</div><div class='ctx'>  */</div><div class='ctx'> struct iwl_trans_ops {</div><div class='ctx'> </div><div class='ctx'> 	int (*start_hw)(struct iwl_trans *iwl_trans);</div><div class='del'>-	void (*stop_hw)(struct iwl_trans *iwl_trans);</div><div class='add'>+	void (*stop_hw)(struct iwl_trans *iwl_trans, bool op_mode_leaving);</div><div class='ctx'> 	int (*start_fw)(struct iwl_trans *trans, const struct fw_img *fw);</div><div class='ctx'> 	void (*fw_alive)(struct iwl_trans *trans);</div><div class='ctx'> 	void (*stop_device)(struct iwl_trans *trans);</div><div class='hunk'>@@ -360,23 +382,15 @@ struct iwl_trans_ops {</div><div class='ctx'> 	int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd);</div><div class='ctx'> </div><div class='ctx'> 	int (*tx)(struct iwl_trans *trans, struct sk_buff *skb,</div><div class='del'>-		struct iwl_device_cmd *dev_cmd, enum iwl_rxon_context_id ctx,</div><div class='del'>-		u8 sta_id, u8 tid);</div><div class='del'>-	int (*reclaim)(struct iwl_trans *trans, int sta_id, int tid,</div><div class='del'>-			int txq_id, int ssn, struct sk_buff_head *skbs);</div><div class='add'>+		  struct iwl_device_cmd *dev_cmd, int queue);</div><div class='add'>+	void (*reclaim)(struct iwl_trans *trans, int queue, int ssn,</div><div class='add'>+			struct sk_buff_head *skbs);</div><div class='ctx'> </div><div class='del'>-	int (*tx_agg_disable)(struct iwl_trans *trans,</div><div class='del'>-			      int sta_id, int tid);</div><div class='del'>-	int (*tx_agg_alloc)(struct iwl_trans *trans,</div><div class='del'>-			    int sta_id, int tid);</div><div class='del'>-	void (*tx_agg_setup)(struct iwl_trans *trans,</div><div class='del'>-			     enum iwl_rxon_context_id ctx, int sta_id, int tid,</div><div class='del'>-			     int frame_limit, u16 ssn);</div><div class='del'>-</div><div class='del'>-	void (*free)(struct iwl_trans *trans);</div><div class='add'>+	void (*tx_agg_setup)(struct iwl_trans *trans, int queue, int fifo,</div><div class='add'>+			     int sta_id, int tid, int frame_limit, u16 ssn);</div><div class='add'>+	void (*tx_agg_disable)(struct iwl_trans *trans, int queue);</div><div class='ctx'> </div><div class='ctx'> 	int (*dbgfs_register)(struct iwl_trans *trans, struct dentry* dir);</div><div class='del'>-	int (*check_stuck_queue)(struct iwl_trans *trans, int q);</div><div class='ctx'> 	int (*wait_tx_queue_empty)(struct iwl_trans *trans);</div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='ctx'> 	int (*suspend)(struct iwl_trans *trans);</div><div class='hunk'>@@ -387,6 +401,7 @@ struct iwl_trans_ops {</div><div class='ctx'> 	u32 (*read32)(struct iwl_trans *trans, u32 ofs);</div><div class='ctx'> 	void (*configure)(struct iwl_trans *trans,</div><div class='ctx'> 			  const struct iwl_trans_config *trans_cfg);</div><div class='add'>+	void (*set_pmi)(struct iwl_trans *trans, bool state);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -405,20 +420,19 @@ enum iwl_trans_state {</div><div class='ctx'>  *</div><div class='ctx'>  * @ops - pointer to iwl_trans_ops</div><div class='ctx'>  * @op_mode - pointer to the op_mode</div><div class='del'>- * @shrd - pointer to iwl_shared which holds shared data from the upper layer</div><div class='add'>+ * @cfg - pointer to the configuration</div><div class='ctx'>  * @reg_lock - protect hw register access</div><div class='ctx'>  * @dev - pointer to struct device * that represents the device</div><div class='ctx'>  * @hw_id: a u32 with the ID of the device / subdevice.</div><div class='ctx'>  *	Set during transport allocation.</div><div class='ctx'>  * @hw_id_str: a string with info about HW ID. Set during transport allocation.</div><div class='del'>- * @nvm_device_type: indicates OTP or eeprom</div><div class='ctx'>  * @pm_support: set to true in start_hw if link pm is supported</div><div class='ctx'>  * @wait_command_queue: the wait_queue for SYNC host commands</div><div class='ctx'>  */</div><div class='ctx'> struct iwl_trans {</div><div class='ctx'> 	const struct iwl_trans_ops *ops;</div><div class='ctx'> 	struct iwl_op_mode *op_mode;</div><div class='del'>-	struct iwl_shared *shrd;</div><div class='add'>+	const struct iwl_cfg *cfg;</div><div class='ctx'> 	enum iwl_trans_state state;</div><div class='ctx'> 	spinlock_t reg_lock;</div><div class='ctx'> </div><div class='hunk'>@@ -427,7 +441,6 @@ struct iwl_trans {</div><div class='ctx'> 	u32 hw_id;</div><div class='ctx'> 	char hw_id_str[52];</div><div class='ctx'> </div><div class='del'>-	int    nvm_device_type;</div><div class='ctx'> 	bool pm_support;</div><div class='ctx'> </div><div class='ctx'> 	wait_queue_head_t wait_command_queue;</div><div class='hunk'>@@ -456,11 +469,12 @@ static inline int iwl_trans_start_hw(struct iwl_trans *trans)</div><div class='ctx'> 	return trans-&gt;ops-&gt;start_hw(trans);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void iwl_trans_stop_hw(struct iwl_trans *trans)</div><div class='add'>+static inline void iwl_trans_stop_hw(struct iwl_trans *trans,</div><div class='add'>+				     bool op_mode_leaving)</div><div class='ctx'> {</div><div class='ctx'> 	might_sleep();</div><div class='ctx'> </div><div class='del'>-	trans-&gt;ops-&gt;stop_hw(trans);</div><div class='add'>+	trans-&gt;ops-&gt;stop_hw(trans, op_mode_leaving);</div><div class='ctx'> </div><div class='ctx'> 	trans-&gt;state = IWL_TRANS_NO_FW;</div><div class='ctx'> }</div><div class='hunk'>@@ -507,60 +521,42 @@ static inline int iwl_trans_send_cmd(struct iwl_trans *trans,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb,</div><div class='del'>-		struct iwl_device_cmd *dev_cmd, enum iwl_rxon_context_id ctx,</div><div class='del'>-		u8 sta_id, u8 tid)</div><div class='del'>-{</div><div class='del'>-	if (trans-&gt;state != IWL_TRANS_FW_ALIVE)</div><div class='del'>-		IWL_ERR(trans, "%s bad state = %d", __func__, trans-&gt;state);</div><div class='del'>-</div><div class='del'>-	return trans-&gt;ops-&gt;tx(trans, skb, dev_cmd, ctx, sta_id, tid);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int iwl_trans_reclaim(struct iwl_trans *trans, int sta_id,</div><div class='del'>-				 int tid, int txq_id, int ssn,</div><div class='del'>-				 struct sk_buff_head *skbs)</div><div class='add'>+			       struct iwl_device_cmd *dev_cmd, int queue)</div><div class='ctx'> {</div><div class='ctx'> 	WARN_ONCE(trans-&gt;state != IWL_TRANS_FW_ALIVE,</div><div class='ctx'> 		  "%s bad state = %d", __func__, trans-&gt;state);</div><div class='ctx'> </div><div class='del'>-	return trans-&gt;ops-&gt;reclaim(trans, sta_id, tid, txq_id, ssn, skbs);</div><div class='add'>+	return trans-&gt;ops-&gt;tx(trans, skb, dev_cmd, queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int iwl_trans_tx_agg_disable(struct iwl_trans *trans,</div><div class='del'>-					    int sta_id, int tid)</div><div class='add'>+static inline void iwl_trans_reclaim(struct iwl_trans *trans, int queue,</div><div class='add'>+				     int ssn, struct sk_buff_head *skbs)</div><div class='ctx'> {</div><div class='ctx'> 	WARN_ONCE(trans-&gt;state != IWL_TRANS_FW_ALIVE,</div><div class='ctx'> 		  "%s bad state = %d", __func__, trans-&gt;state);</div><div class='ctx'> </div><div class='del'>-	return trans-&gt;ops-&gt;tx_agg_disable(trans, sta_id, tid);</div><div class='add'>+	trans-&gt;ops-&gt;reclaim(trans, queue, ssn, skbs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int iwl_trans_tx_agg_alloc(struct iwl_trans *trans,</div><div class='del'>-					 int sta_id, int tid)</div><div class='add'>+static inline void iwl_trans_tx_agg_disable(struct iwl_trans *trans, int queue)</div><div class='ctx'> {</div><div class='ctx'> 	WARN_ONCE(trans-&gt;state != IWL_TRANS_FW_ALIVE,</div><div class='ctx'> 		  "%s bad state = %d", __func__, trans-&gt;state);</div><div class='ctx'> </div><div class='del'>-	return trans-&gt;ops-&gt;tx_agg_alloc(trans, sta_id, tid);</div><div class='add'>+	trans-&gt;ops-&gt;tx_agg_disable(trans, queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static inline void iwl_trans_tx_agg_setup(struct iwl_trans *trans,</div><div class='del'>-					   enum iwl_rxon_context_id ctx,</div><div class='del'>-					   int sta_id, int tid,</div><div class='del'>-					   int frame_limit, u16 ssn)</div><div class='add'>+static inline void iwl_trans_tx_agg_setup(struct iwl_trans *trans, int queue,</div><div class='add'>+					  int fifo, int sta_id, int tid,</div><div class='add'>+					  int frame_limit, u16 ssn)</div><div class='ctx'> {</div><div class='ctx'> 	might_sleep();</div><div class='ctx'> </div><div class='ctx'> 	WARN_ONCE(trans-&gt;state != IWL_TRANS_FW_ALIVE,</div><div class='ctx'> 		  "%s bad state = %d", __func__, trans-&gt;state);</div><div class='ctx'> </div><div class='del'>-	trans-&gt;ops-&gt;tx_agg_setup(trans, ctx, sta_id, tid, frame_limit, ssn);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void iwl_trans_free(struct iwl_trans *trans)</div><div class='del'>-{</div><div class='del'>-	trans-&gt;ops-&gt;free(trans);</div><div class='add'>+	trans-&gt;ops-&gt;tx_agg_setup(trans, queue, fifo, sta_id, tid,</div><div class='add'>+				 frame_limit, ssn);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int iwl_trans_wait_tx_queue_empty(struct iwl_trans *trans)</div><div class='hunk'>@@ -571,13 +567,6 @@ static inline int iwl_trans_wait_tx_queue_empty(struct iwl_trans *trans)</div><div class='ctx'> 	return trans-&gt;ops-&gt;wait_tx_queue_empty(trans);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int iwl_trans_check_stuck_queue(struct iwl_trans *trans, int q)</div><div class='del'>-{</div><div class='del'>-	WARN_ONCE(trans-&gt;state != IWL_TRANS_FW_ALIVE,</div><div class='del'>-		  "%s bad state = %d", __func__, trans-&gt;state);</div><div class='del'>-</div><div class='del'>-	return trans-&gt;ops-&gt;check_stuck_queue(trans, q);</div><div class='del'>-}</div><div class='ctx'> static inline int iwl_trans_dbgfs_register(struct iwl_trans *trans,</div><div class='ctx'> 					    struct dentry *dir)</div><div class='ctx'> {</div><div class='hunk'>@@ -611,20 +600,15 @@ static inline u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs)</div><div class='ctx'> 	return trans-&gt;ops-&gt;read32(trans, ofs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state)</div><div class='add'>+{</div><div class='add'>+	trans-&gt;ops-&gt;set_pmi(trans, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*****************************************************</div><div class='del'>-* Transport layers implementations + their allocation function</div><div class='add'>+* driver (transport) register/unregister functions</div><div class='ctx'> ******************************************************/</div><div class='del'>-struct pci_dev;</div><div class='del'>-struct pci_device_id;</div><div class='del'>-extern const struct iwl_trans_ops trans_ops_pcie;</div><div class='del'>-struct iwl_trans *iwl_trans_pcie_alloc(struct iwl_shared *shrd,</div><div class='del'>-				       struct pci_dev *pdev,</div><div class='del'>-				       const struct pci_device_id *ent);</div><div class='ctx'> int __must_check iwl_pci_register_driver(void);</div><div class='ctx'> void iwl_pci_unregister_driver(void);</div><div class='ctx'> </div><div class='del'>-extern const struct iwl_trans_ops trans_ops_idi;</div><div class='del'>-struct iwl_trans *iwl_trans_idi_alloc(struct iwl_shared *shrd,</div><div class='del'>-				      void *pdev_void,</div><div class='del'>-				      const void *ent_void);</div><div class='ctx'> #endif /* __iwl_trans_h__ */</div><div class='head'>diff --git a/drivers/net/wireless/iwlwifi/iwl-ucode.c b/drivers/net/wireless/iwlwifi/iwl-ucode.c<br/>index 252828728837..bc40dc68b0f4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-ucode.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwlwifi/iwl-ucode.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwlwifi/iwl-ucode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwlwifi/iwl-ucode.c</a></div><div class='hunk'>@@ -31,7 +31,6 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iwl-dev.h"</div><div class='del'>-#include "iwl-core.h"</div><div class='ctx'> #include "iwl-io.h"</div><div class='ctx'> #include "iwl-agn-hw.h"</div><div class='ctx'> #include "iwl-agn.h"</div><div class='hunk'>@@ -40,37 +39,6 @@</div><div class='ctx'> #include "iwl-fh.h"</div><div class='ctx'> #include "iwl-op-mode.h"</div><div class='ctx'> </div><div class='del'>-static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {</div><div class='del'>-	{COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,</div><div class='del'>-	 0, COEX_UNASSOC_IDLE_FLAGS},</div><div class='del'>-	{COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,</div><div class='del'>-	 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},</div><div class='del'>-	{COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,</div><div class='del'>-	 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},</div><div class='del'>-	{COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,</div><div class='del'>-	 0, COEX_CALIBRATION_FLAGS},</div><div class='del'>-	{COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,</div><div class='del'>-	 0, COEX_PERIODIC_CALIBRATION_FLAGS},</div><div class='del'>-	{COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,</div><div class='del'>-	 0, COEX_CONNECTION_ESTAB_FLAGS},</div><div class='del'>-	{COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,</div><div class='del'>-	 0, COEX_ASSOCIATED_IDLE_FLAGS},</div><div class='del'>-	{COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,</div><div class='del'>-	 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},</div><div class='del'>-	{COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,</div><div class='del'>-	 0, COEX_ASSOC_AUTO_SCAN_FLAGS},</div><div class='del'>-	{COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,</div><div class='del'>-	 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},</div><div class='del'>-	{COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},</div><div class='del'>-	{COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},</div><div class='del'>-	{COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,</div><div class='del'>-	 0, COEX_STAND_ALONE_DEBUG_FLAGS},</div><div class='del'>-	{COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,</div><div class='del'>-	 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},</div><div class='del'>-	{COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},</div><div class='del'>-	{COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /******************************************************************************</div><div class='ctx'>  *</div><div class='ctx'>  * uCode download functions</div><div class='hunk'>@@ -93,7 +61,7 @@ static int iwl_set_Xtal_calib(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_calib_xtal_freq_cmd cmd;</div><div class='ctx'> 	__le16 *xtal_calib =</div><div class='del'>-		(__le16 *)iwl_eeprom_query_addr(priv-&gt;shrd, EEPROM_XTAL);</div><div class='add'>+		(__le16 *)iwl_eeprom_query_addr(priv, EEPROM_XTAL);</div><div class='ctx'> </div><div class='ctx'> 	iwl_set_calib_hdr(&amp;cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);</div><div class='ctx'> 	cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);</div><div class='hunk'>@@ -105,8 +73,7 @@ static int iwl_set_temperature_offset_calib(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_calib_temperature_offset_cmd cmd;</div><div class='ctx'> 	__le16 *offset_calib =</div><div class='del'>-		(__le16 *)iwl_eeprom_query_addr(priv-&gt;shrd,</div><div class='del'>-						EEPROM_RAW_TEMPERATURE);</div><div class='add'>+		(__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;cmd, 0, sizeof(cmd));</div><div class='ctx'> 	iwl_set_calib_hdr(&amp;cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);</div><div class='hunk'>@@ -122,16 +89,15 @@ static int iwl_set_temperature_offset_calib(struct iwl_priv *priv)</div><div class='ctx'> static int iwl_set_temperature_offset_calib_v2(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_calib_temperature_offset_v2_cmd cmd;</div><div class='del'>-	__le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv-&gt;shrd,</div><div class='add'>+	__le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv,</div><div class='ctx'> 				     EEPROM_KELVIN_TEMPERATURE);</div><div class='ctx'> 	__le16 *offset_calib_low =</div><div class='del'>-		(__le16 *)iwl_eeprom_query_addr(priv-&gt;shrd,</div><div class='del'>-						EEPROM_RAW_TEMPERATURE);</div><div class='add'>+		(__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);</div><div class='ctx'> 	struct iwl_eeprom_calib_hdr *hdr;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;cmd, 0, sizeof(cmd));</div><div class='ctx'> 	iwl_set_calib_hdr(&amp;cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);</div><div class='del'>-	hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv-&gt;shrd,</div><div class='add'>+	hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,</div><div class='ctx'> 							EEPROM_CALIB_ALL);</div><div class='ctx'> 	memcpy(&amp;cmd.radio_sensor_offset_high, offset_calib_high,</div><div class='ctx'> 		sizeof(*offset_calib_high));</div><div class='hunk'>@@ -174,30 +140,12 @@ static int iwl_send_calib_cfg(struct iwl_priv *priv)</div><div class='ctx'> 	return iwl_dvm_send_cmd(priv, &amp;cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int iwlagn_rx_calib_result(struct iwl_priv *priv,</div><div class='del'>-			    struct iwl_rx_cmd_buffer *rxb,</div><div class='del'>-			    struct iwl_device_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	struct iwl_rx_packet *pkt = rxb_addr(rxb);</div><div class='del'>-	struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt-&gt;data;</div><div class='del'>-	int len = le32_to_cpu(pkt-&gt;len_n_flags) &amp; FH_RSCSR_FRAME_SIZE_MSK;</div><div class='del'>-</div><div class='del'>-	/* reduce the size of the length field itself */</div><div class='del'>-	len -= 4;</div><div class='del'>-</div><div class='del'>-	if (iwl_calib_set(priv, hdr, len))</div><div class='del'>-		IWL_ERR(priv, "Failed to record calibration data %d\n",</div><div class='del'>-			hdr-&gt;op_code);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int iwl_init_alive_start(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;bt_params &amp;&amp;</div><div class='del'>-	    cfg(priv)-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='add'>+	if (priv-&gt;cfg-&gt;bt_params &amp;&amp;</div><div class='add'>+	    priv-&gt;cfg-&gt;bt_params-&gt;advanced_bt_coexist) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Tell uCode we are ready to perform calibration</div><div class='ctx'> 		 * need to perform this before any calibration</div><div class='hunk'>@@ -219,8 +167,8 @@ int iwl_init_alive_start(struct iwl_priv *priv)</div><div class='ctx'> 	 * temperature offset calibration is only needed for runtime ucode,</div><div class='ctx'> 	 * so prepare the value now.</div><div class='ctx'> 	 */</div><div class='del'>-	if (cfg(priv)-&gt;need_temp_offset_calib) {</div><div class='del'>-		if (cfg(priv)-&gt;temp_offset_v2)</div><div class='add'>+	if (priv-&gt;cfg-&gt;need_temp_offset_calib) {</div><div class='add'>+		if (priv-&gt;cfg-&gt;temp_offset_v2)</div><div class='ctx'> 			return iwl_set_temperature_offset_calib_v2(priv);</div><div class='ctx'> 		else</div><div class='ctx'> 			return iwl_set_temperature_offset_calib(priv);</div><div class='hunk'>@@ -229,29 +177,13 @@ int iwl_init_alive_start(struct iwl_priv *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int iwl_send_wimax_coex(struct iwl_priv *priv)</div><div class='add'>+int iwl_send_wimax_coex(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_wimax_coex_cmd coex_cmd;</div><div class='ctx'> </div><div class='del'>-	if (cfg(priv)-&gt;base_params-&gt;support_wimax_coexist) {</div><div class='del'>-		/* UnMask wake up src at associated sleep */</div><div class='del'>-		coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;</div><div class='add'>+	/* coexistence is disabled */</div><div class='add'>+	memset(&amp;coex_cmd, 0, sizeof(coex_cmd));</div><div class='ctx'> </div><div class='del'>-		/* UnMask wake up src at unassociated sleep */</div><div class='del'>-		coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;</div><div class='del'>-		memcpy(coex_cmd.sta_prio, cu_priorities,</div><div class='del'>-			sizeof(struct iwl_wimax_coex_event_entry) *</div><div class='del'>-			 COEX_NUM_OF_EVENTS);</div><div class='del'>-</div><div class='del'>-		/* enabling the coexistence feature */</div><div class='del'>-		coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;</div><div class='del'>-</div><div class='del'>-		/* enabling the priorities tables */</div><div class='del'>-		coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;</div><div class='del'>-	} else {</div><div class='del'>-		/* coexistence is disabled */</div><div class='del'>-		memset(&amp;coex_cmd, 0, sizeof(coex_cmd));</div><div class='del'>-	}</div><div class='ctx'> 	return iwl_dvm_send_cmd_pdu(priv,</div><div class='ctx'> 				COEX_PRIORITY_TABLE_CMD, CMD_SYNC,</div><div class='ctx'> 				sizeof(coex_cmd), &amp;coex_cmd);</div><div class='hunk'>@@ -311,7 +243,7 @@ static int iwl_alive_notify(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	iwl_trans_fw_alive(trans(priv));</div><div class='add'>+	iwl_trans_fw_alive(priv-&gt;trans);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;passive_no_rx = false;</div><div class='ctx'> 	priv-&gt;transport_queue_stop = 0;</div><div class='hunk'>@@ -320,7 +252,7 @@ static int iwl_alive_notify(struct iwl_priv *priv)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (!cfg(priv)-&gt;no_xtal_calib) {</div><div class='add'>+	if (!priv-&gt;cfg-&gt;no_xtal_calib) {</div><div class='ctx'> 		ret = iwl_set_Xtal_calib(priv);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='hunk'>@@ -349,9 +281,9 @@ static int iwl_verify_sec_sparse(struct iwl_priv *priv,</div><div class='ctx'> 		/* read data comes through single port, auto-incr addr */</div><div class='ctx'> 		/* NOTE: Use the debugless read so we don't flood kernel log</div><div class='ctx'> 		 * if IWL_DL_IO is set */</div><div class='del'>-		iwl_write_direct32(trans(priv), HBUS_TARG_MEM_RADDR,</div><div class='add'>+		iwl_write_direct32(priv-&gt;trans, HBUS_TARG_MEM_RADDR,</div><div class='ctx'> 			i + fw_desc-&gt;offset);</div><div class='del'>-		val = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);</div><div class='add'>+		val = iwl_read32(priv-&gt;trans, HBUS_TARG_MEM_RDAT);</div><div class='ctx'> 		if (val != le32_to_cpu(*image))</div><div class='ctx'> 			return -EIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -370,14 +302,14 @@ static void iwl_print_mismatch_sec(struct iwl_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);</div><div class='ctx'> </div><div class='del'>-	iwl_write_direct32(trans(priv), HBUS_TARG_MEM_RADDR,</div><div class='add'>+	iwl_write_direct32(priv-&gt;trans, HBUS_TARG_MEM_RADDR,</div><div class='ctx'> 				fw_desc-&gt;offset);</div><div class='ctx'> </div><div class='ctx'> 	for (offs = 0;</div><div class='ctx'> 	     offs &lt; len &amp;&amp; errors &lt; 20;</div><div class='ctx'> 	     offs += sizeof(u32), image++) {</div><div class='ctx'> 		/* read data comes through single port, auto-incr addr */</div><div class='del'>-		val = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);</div><div class='add'>+		val = iwl_read32(priv-&gt;trans, HBUS_TARG_MEM_RDAT);</div><div class='ctx'> 		if (val != le32_to_cpu(*image)) {</div><div class='ctx'> 			IWL_ERR(priv, "uCode INST section at "</div><div class='ctx'> 				"offset 0x%x, is 0x%x, s/b 0x%x\n",</div><div class='hunk'>@@ -417,9 +349,8 @@ struct iwl_alive_data {</div><div class='ctx'> 	u8 subtype;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,</div><div class='del'>-			    struct iwl_rx_packet *pkt,</div><div class='del'>-			    void *data)</div><div class='add'>+static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,</div><div class='add'>+			 struct iwl_rx_packet *pkt, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_priv *priv =</div><div class='ctx'> 		container_of(notif_wait, struct iwl_priv, notif_wait);</div><div class='hunk'>@@ -433,13 +364,15 @@ static void iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,</div><div class='ctx'> 		       palive-&gt;is_valid, palive-&gt;ver_type,</div><div class='ctx'> 		       palive-&gt;ver_subtype);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;shrd-&gt;device_pointers.error_event_table =</div><div class='add'>+	priv-&gt;device_pointers.error_event_table =</div><div class='ctx'> 		le32_to_cpu(palive-&gt;error_event_table_ptr);</div><div class='del'>-	priv-&gt;shrd-&gt;device_pointers.log_event_table =</div><div class='add'>+	priv-&gt;device_pointers.log_event_table =</div><div class='ctx'> 		le32_to_cpu(palive-&gt;log_event_table_ptr);</div><div class='ctx'> </div><div class='ctx'> 	alive_data-&gt;subtype = palive-&gt;ver_subtype;</div><div class='ctx'> 	alive_data-&gt;valid = palive-&gt;is_valid == UCODE_VALID_OK;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define UCODE_ALIVE_TIMEOUT	HZ</div><div class='hunk'>@@ -453,9 +386,10 @@ int iwl_load_ucode_wait_alive(struct iwl_priv *priv,</div><div class='ctx'> 	const struct fw_img *fw;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	enum iwl_ucode_type old_type;</div><div class='add'>+	static const u8 alive_cmd[] = { REPLY_ALIVE };</div><div class='ctx'> </div><div class='del'>-	old_type = priv-&gt;shrd-&gt;ucode_type;</div><div class='del'>-	priv-&gt;shrd-&gt;ucode_type = ucode_type;</div><div class='add'>+	old_type = priv-&gt;cur_ucode;</div><div class='add'>+	priv-&gt;cur_ucode = ucode_type;</div><div class='ctx'> 	fw = iwl_get_ucode_image(priv, ucode_type);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;ucode_loaded = false;</div><div class='hunk'>@@ -463,12 +397,13 @@ int iwl_load_ucode_wait_alive(struct iwl_priv *priv,</div><div class='ctx'> 	if (!fw)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	iwl_init_notification_wait(&amp;priv-&gt;notif_wait, &amp;alive_wait, REPLY_ALIVE,</div><div class='del'>-				      iwl_alive_fn, &amp;alive_data);</div><div class='add'>+	iwl_init_notification_wait(&amp;priv-&gt;notif_wait, &amp;alive_wait,</div><div class='add'>+				   alive_cmd, ARRAY_SIZE(alive_cmd),</div><div class='add'>+				   iwl_alive_fn, &amp;alive_data);</div><div class='ctx'> </div><div class='del'>-	ret = iwl_trans_start_fw(trans(priv), fw);</div><div class='add'>+	ret = iwl_trans_start_fw(priv-&gt;trans, fw);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		priv-&gt;shrd-&gt;ucode_type = old_type;</div><div class='add'>+		priv-&gt;cur_ucode = old_type;</div><div class='ctx'> 		iwl_remove_notification(&amp;priv-&gt;notif_wait, &amp;alive_wait);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -480,13 +415,13 @@ int iwl_load_ucode_wait_alive(struct iwl_priv *priv,</div><div class='ctx'> 	ret = iwl_wait_notification(&amp;priv-&gt;notif_wait, &amp;alive_wait,</div><div class='ctx'> 					UCODE_ALIVE_TIMEOUT);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		priv-&gt;shrd-&gt;ucode_type = old_type;</div><div class='add'>+		priv-&gt;cur_ucode = old_type;</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!alive_data.valid) {</div><div class='ctx'> 		IWL_ERR(priv, "Loaded ucode is not valid!\n");</div><div class='del'>-		priv-&gt;shrd-&gt;ucode_type = old_type;</div><div class='add'>+		priv-&gt;cur_ucode = old_type;</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -498,7 +433,7 @@ int iwl_load_ucode_wait_alive(struct iwl_priv *priv,</div><div class='ctx'> 	if (ucode_type != IWL_UCODE_WOWLAN) {</div><div class='ctx'> 		ret = iwl_verify_ucode(priv, ucode_type);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			priv-&gt;shrd-&gt;ucode_type = old_type;</div><div class='add'>+			priv-&gt;cur_ucode = old_type;</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -510,7 +445,7 @@ int iwl_load_ucode_wait_alive(struct iwl_priv *priv,</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		IWL_WARN(priv,</div><div class='ctx'> 			"Could not complete ALIVE transition: %d\n", ret);</div><div class='del'>-		priv-&gt;shrd-&gt;ucode_type = old_type;</div><div class='add'>+		priv-&gt;cur_ucode = old_type;</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -519,9 +454,38 @@ int iwl_load_ucode_wait_alive(struct iwl_priv *priv,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool iwlagn_wait_calib(struct iwl_notif_wait_data *notif_wait,</div><div class='add'>+			      struct iwl_rx_packet *pkt, void *data)</div><div class='add'>+{</div><div class='add'>+	struct iwl_priv *priv = data;</div><div class='add'>+	struct iwl_calib_hdr *hdr;</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	if (pkt-&gt;hdr.cmd != CALIBRATION_RES_NOTIFICATION) {</div><div class='add'>+		WARN_ON(pkt-&gt;hdr.cmd != CALIBRATION_COMPLETE_NOTIFICATION);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hdr = (struct iwl_calib_hdr *)pkt-&gt;data;</div><div class='add'>+	len = le32_to_cpu(pkt-&gt;len_n_flags) &amp; FH_RSCSR_FRAME_SIZE_MSK;</div><div class='add'>+</div><div class='add'>+	/* reduce the size by the length field itself */</div><div class='add'>+	len -= sizeof(__le32);</div><div class='add'>+</div><div class='add'>+	if (iwl_calib_set(priv, hdr, len))</div><div class='add'>+		IWL_ERR(priv, "Failed to record calibration data %d\n",</div><div class='add'>+			hdr-&gt;op_code);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int iwl_run_init_ucode(struct iwl_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct iwl_notification_wait calib_wait;</div><div class='add'>+	static const u8 calib_complete[] = {</div><div class='add'>+		CALIBRATION_RES_NOTIFICATION,</div><div class='add'>+		CALIBRATION_COMPLETE_NOTIFICATION</div><div class='add'>+	};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;priv-&gt;mutex);</div><div class='hunk'>@@ -534,8 +498,8 @@ int iwl_run_init_ucode(struct iwl_priv *priv)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	iwl_init_notification_wait(&amp;priv-&gt;notif_wait, &amp;calib_wait,</div><div class='del'>-				      CALIBRATION_COMPLETE_NOTIFICATION,</div><div class='del'>-				      NULL, NULL);</div><div class='add'>+				   calib_complete, ARRAY_SIZE(calib_complete),</div><div class='add'>+				   iwlagn_wait_calib, priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Will also start the device */</div><div class='ctx'> 	ret = iwl_load_ucode_wait_alive(priv, IWL_UCODE_INIT);</div><div class='hunk'>@@ -561,7 +525,7 @@ int iwl_run_init_ucode(struct iwl_priv *priv)</div><div class='ctx'> 	iwl_remove_notification(&amp;priv-&gt;notif_wait, &amp;calib_wait);</div><div class='ctx'>  out:</div><div class='ctx'> 	/* Whatever happened, stop the device */</div><div class='del'>-	iwl_trans_stop_device(trans(priv));</div><div class='add'>+	iwl_trans_stop_device(priv-&gt;trans);</div><div class='ctx'> 	priv-&gt;ucode_loaded = false;</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/drivers/net/wireless/iwmc3200wifi/Kconfig b/drivers/net/wireless/iwmc3200wifi/Kconfig<br/>index 03f998d098c5..7107ce53d4d4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/iwmc3200wifi/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/iwmc3200wifi/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/iwmc3200wifi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/iwmc3200wifi/Kconfig</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> config IWM</div><div class='del'>-	tristate "Intel Wireless Multicomm 3200 WiFi driver"</div><div class='add'>+	tristate "Intel Wireless Multicomm 3200 WiFi driver (EXPERIMENTAL)"</div><div class='ctx'> 	depends on MMC &amp;&amp; EXPERIMENTAL</div><div class='ctx'> 	depends on CFG80211</div><div class='ctx'> 	select FW_LOADER</div><div class='head'>diff --git a/drivers/net/wireless/libertas/Makefile b/drivers/net/wireless/libertas/Makefile<br/>index f7d01bfa2e4a..eac72f7bd341 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/libertas/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/libertas/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/libertas/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/Makefile</a></div><div class='hunk'>@@ -6,6 +6,7 @@ libertas-y += ethtool.o</div><div class='ctx'> libertas-y += main.o</div><div class='ctx'> libertas-y += rx.o</div><div class='ctx'> libertas-y += tx.o</div><div class='add'>+libertas-y += firmware.o</div><div class='ctx'> libertas-$(CONFIG_LIBERTAS_MESH) += mesh.o</div><div class='ctx'> </div><div class='ctx'> usb8xxx-objs += if_usb.o</div><div class='head'>diff --git a/drivers/net/wireless/libertas/decl.h b/drivers/net/wireless/libertas/decl.h<br/>index bc951ab4b681..84a3aa7ac570 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/libertas/decl.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/libertas/decl.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/libertas/decl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/decl.h</a></div><div class='hunk'>@@ -19,6 +19,10 @@ struct lbs_fw_table {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct lbs_private;</div><div class='add'>+typedef void (*lbs_fw_cb)(struct lbs_private *priv, int ret,</div><div class='add'>+		const struct firmware *helper, const struct firmware *mainfw);</div><div class='add'>+</div><div class='add'>+struct lbs_private;</div><div class='ctx'> struct sk_buff;</div><div class='ctx'> struct net_device;</div><div class='ctx'> struct cmd_ds_command;</div><div class='hunk'>@@ -66,10 +70,13 @@ int lbs_exit_auto_deep_sleep(struct lbs_private *priv);</div><div class='ctx'> u32 lbs_fw_index_to_data_rate(u8 index);</div><div class='ctx'> u8 lbs_data_rate_to_fw_index(u32 rate);</div><div class='ctx'> </div><div class='del'>-int lbs_get_firmware(struct device *dev, const char *user_helper,</div><div class='del'>-			const char *user_mainfw, u32 card_model,</div><div class='add'>+int lbs_get_firmware(struct device *dev, u32 card_model,</div><div class='ctx'> 			const struct lbs_fw_table *fw_table,</div><div class='ctx'> 			const struct firmware **helper,</div><div class='ctx'> 			const struct firmware **mainfw);</div><div class='add'>+int lbs_get_firmware_async(struct lbs_private *priv, struct device *device,</div><div class='add'>+			   u32 card_model, const struct lbs_fw_table *fw_table,</div><div class='add'>+			   lbs_fw_cb callback);</div><div class='add'>+void lbs_wait_for_firmware_load(struct lbs_private *priv);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/libertas/dev.h b/drivers/net/wireless/libertas/dev.h<br/>index f3fd447131c2..672005430aca 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/libertas/dev.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/libertas/dev.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/libertas/dev.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/dev.h</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #define _LBS_DEV_H_</div><div class='ctx'> </div><div class='ctx'> #include "defs.h"</div><div class='add'>+#include "decl.h"</div><div class='ctx'> #include "host.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kfifo.h&gt;</div><div class='hunk'>@@ -180,6 +181,15 @@ struct lbs_private {</div><div class='ctx'> 	wait_queue_head_t scan_q;</div><div class='ctx'> 	/* Whether the scan was initiated internally and not by cfg80211 */</div><div class='ctx'> 	bool internal_scan;</div><div class='add'>+</div><div class='add'>+	/* Firmware load */</div><div class='add'>+	u32 fw_model;</div><div class='add'>+	wait_queue_head_t fw_waitq;</div><div class='add'>+	struct device *fw_device;</div><div class='add'>+	const struct firmware *helper_fw;</div><div class='add'>+	const struct lbs_fw_table *fw_table;</div><div class='add'>+	const struct lbs_fw_table *fw_iter;</div><div class='add'>+	lbs_fw_cb fw_callback;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern struct cmd_confirm_sleep confirm_sleep;</div><div class='head'>diff --git a/drivers/net/wireless/libertas/firmware.c b/drivers/net/wireless/libertas/firmware.c<br/>new file mode 100644<br/>index 000000000000..601f2075355e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/libertas/firmware.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/firmware.c</a></div><div class='hunk'>@@ -0,0 +1,224 @@</div><div class='add'>+/*</div><div class='add'>+ * Firmware loading and handling functions.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+</div><div class='add'>+#include "dev.h"</div><div class='add'>+#include "decl.h"</div><div class='add'>+</div><div class='add'>+static void load_next_firmware_from_table(struct lbs_private *private);</div><div class='add'>+</div><div class='add'>+static void lbs_fw_loaded(struct lbs_private *priv, int ret,</div><div class='add'>+	const struct firmware *helper, const struct firmware *mainfw)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	lbs_deb_fw("firmware load complete, code %d\n", ret);</div><div class='add'>+</div><div class='add'>+	/* User must free helper/mainfw */</div><div class='add'>+	priv-&gt;fw_callback(priv, ret, helper, mainfw);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;driver_lock, flags);</div><div class='add'>+	priv-&gt;fw_callback = NULL;</div><div class='add'>+	wake_up(&amp;priv-&gt;fw_waitq);</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;driver_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void do_load_firmware(struct lbs_private *priv, const char *name,</div><div class='add'>+	void (*cb)(const struct firmware *fw, void *context))</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lbs_deb_fw("Requesting %s\n", name);</div><div class='add'>+	ret = request_firmware_nowait(THIS_MODULE, true, name,</div><div class='add'>+			priv-&gt;fw_device, GFP_KERNEL, priv, cb);</div><div class='add'>+	if (ret) {</div><div class='add'>+		lbs_deb_fw("request_firmware_nowait error %d\n", ret);</div><div class='add'>+		lbs_fw_loaded(priv, ret, NULL, NULL);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void main_firmware_cb(const struct firmware *firmware, void *context)</div><div class='add'>+{</div><div class='add'>+	struct lbs_private *priv = context;</div><div class='add'>+</div><div class='add'>+	if (!firmware) {</div><div class='add'>+		/* Failed to find firmware: try next table entry */</div><div class='add'>+		load_next_firmware_from_table(priv);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Firmware found! */</div><div class='add'>+	lbs_fw_loaded(priv, 0, priv-&gt;helper_fw, firmware);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void helper_firmware_cb(const struct firmware *firmware, void *context)</div><div class='add'>+{</div><div class='add'>+	struct lbs_private *priv = context;</div><div class='add'>+</div><div class='add'>+	if (!firmware) {</div><div class='add'>+		/* Failed to find firmware: try next table entry */</div><div class='add'>+		load_next_firmware_from_table(priv);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Firmware found! */</div><div class='add'>+	if (priv-&gt;fw_iter-&gt;fwname) {</div><div class='add'>+		priv-&gt;helper_fw = firmware;</div><div class='add'>+		do_load_firmware(priv, priv-&gt;fw_iter-&gt;fwname, main_firmware_cb);</div><div class='add'>+	} else {</div><div class='add'>+		/* No main firmware needed for this helper --&gt; success! */</div><div class='add'>+		lbs_fw_loaded(priv, 0, firmware, NULL);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void load_next_firmware_from_table(struct lbs_private *priv)</div><div class='add'>+{</div><div class='add'>+	const struct lbs_fw_table *iter;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;fw_iter)</div><div class='add'>+		iter = priv-&gt;fw_table;</div><div class='add'>+	else</div><div class='add'>+		iter = ++priv-&gt;fw_iter;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;helper_fw) {</div><div class='add'>+		release_firmware(priv-&gt;helper_fw);</div><div class='add'>+		priv-&gt;helper_fw = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+next:</div><div class='add'>+	if (!iter-&gt;helper) {</div><div class='add'>+		/* End of table hit. */</div><div class='add'>+		lbs_fw_loaded(priv, -ENOENT, NULL, NULL);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (iter-&gt;model != priv-&gt;fw_model) {</div><div class='add'>+		iter++;</div><div class='add'>+		goto next;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;fw_iter = iter;</div><div class='add'>+	do_load_firmware(priv, iter-&gt;helper, helper_firmware_cb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void lbs_wait_for_firmware_load(struct lbs_private *priv)</div><div class='add'>+{</div><div class='add'>+	wait_event(priv-&gt;fw_waitq, priv-&gt;fw_callback == NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  lbs_get_firmware_async - Retrieves firmware asynchronously. Can load</div><div class='add'>+ *  either a helper firmware and a main firmware (2-stage), or just the helper.</div><div class='add'>+ *</div><div class='add'>+ *  @priv:      Pointer to lbs_private instance</div><div class='add'>+ *  @dev:     	A pointer to &amp;device structure</div><div class='add'>+ *  @card_model: Bus-specific card model ID used to filter firmware table</div><div class='add'>+ *		elements</div><div class='add'>+ *  @fw_table:	Table of firmware file names and device model numbers</div><div class='add'>+ *		terminated by an entry with a NULL helper name</div><div class='add'>+ *	@callback: User callback to invoke when firmware load succeeds or fails.</div><div class='add'>+ */</div><div class='add'>+int lbs_get_firmware_async(struct lbs_private *priv, struct device *device,</div><div class='add'>+			    u32 card_model, const struct lbs_fw_table *fw_table,</div><div class='add'>+			    lbs_fw_cb callback)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;driver_lock, flags);</div><div class='add'>+	if (priv-&gt;fw_callback) {</div><div class='add'>+		lbs_deb_fw("firmware load already in progress\n");</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;driver_lock, flags);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;fw_device = device;</div><div class='add'>+	priv-&gt;fw_callback = callback;</div><div class='add'>+	priv-&gt;fw_table = fw_table;</div><div class='add'>+	priv-&gt;fw_iter = NULL;</div><div class='add'>+	priv-&gt;fw_model = card_model;</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;driver_lock, flags);</div><div class='add'>+</div><div class='add'>+	lbs_deb_fw("Starting async firmware load\n");</div><div class='add'>+	load_next_firmware_from_table(priv);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(lbs_get_firmware_async);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  lbs_get_firmware - Retrieves two-stage firmware</div><div class='add'>+ *</div><div class='add'>+ *  @dev:     	A pointer to &amp;device structure</div><div class='add'>+ *  @card_model: Bus-specific card model ID used to filter firmware table</div><div class='add'>+ *		elements</div><div class='add'>+ *  @fw_table:	Table of firmware file names and device model numbers</div><div class='add'>+ *		terminated by an entry with a NULL helper name</div><div class='add'>+ *  @helper:	On success, the helper firmware; caller must free</div><div class='add'>+ *  @mainfw:	On success, the main firmware; caller must free</div><div class='add'>+ *</div><div class='add'>+ * Deprecated: use lbs_get_firmware_async() instead.</div><div class='add'>+ *</div><div class='add'>+ *  returns:		0 on success, non-zero on failure</div><div class='add'>+ */</div><div class='add'>+int lbs_get_firmware(struct device *dev, u32 card_model,</div><div class='add'>+			const struct lbs_fw_table *fw_table,</div><div class='add'>+			const struct firmware **helper,</div><div class='add'>+			const struct firmware **mainfw)</div><div class='add'>+{</div><div class='add'>+	const struct lbs_fw_table *iter;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	BUG_ON(helper == NULL);</div><div class='add'>+	BUG_ON(mainfw == NULL);</div><div class='add'>+</div><div class='add'>+	/* Search for firmware to use from the table. */</div><div class='add'>+	iter = fw_table;</div><div class='add'>+	while (iter &amp;&amp; iter-&gt;helper) {</div><div class='add'>+		if (iter-&gt;model != card_model)</div><div class='add'>+			goto next;</div><div class='add'>+</div><div class='add'>+		if (*helper == NULL) {</div><div class='add'>+			ret = request_firmware(helper, iter-&gt;helper, dev);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto next;</div><div class='add'>+</div><div class='add'>+			/* If the device has one-stage firmware (ie cf8305) and</div><div class='add'>+			 * we've got it then we don't need to bother with the</div><div class='add'>+			 * main firmware.</div><div class='add'>+			 */</div><div class='add'>+			if (iter-&gt;fwname == NULL)</div><div class='add'>+				return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (*mainfw == NULL) {</div><div class='add'>+			ret = request_firmware(mainfw, iter-&gt;fwname, dev);</div><div class='add'>+			if (ret) {</div><div class='add'>+				/* Clear the helper to ensure we don't have</div><div class='add'>+				 * mismatched firmware pairs.</div><div class='add'>+				 */</div><div class='add'>+				release_firmware(*helper);</div><div class='add'>+				*helper = NULL;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (*helper &amp;&amp; *mainfw)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+  next:</div><div class='add'>+		iter++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Failed */</div><div class='add'>+	release_firmware(*helper);</div><div class='add'>+	*helper = NULL;</div><div class='add'>+	release_firmware(*mainfw);</div><div class='add'>+	*mainfw = NULL;</div><div class='add'>+</div><div class='add'>+	return -ENOENT;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(lbs_get_firmware);</div><div class='head'>diff --git a/drivers/net/wireless/libertas/if_cs.c b/drivers/net/wireless/libertas/if_cs.c<br/>index 234ee88dec95..16beaf39dc53 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/libertas/if_cs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/libertas/if_cs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/libertas/if_cs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/if_cs.c</a></div><div class='hunk'>@@ -738,6 +738,50 @@ done:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void if_cs_prog_firmware(struct lbs_private *priv, int ret,</div><div class='add'>+				 const struct firmware *helper,</div><div class='add'>+				 const struct firmware *mainfw)</div><div class='add'>+{</div><div class='add'>+	struct if_cs_card *card = priv-&gt;card;</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("failed to find firmware (%d)\n", ret);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Load the firmware */</div><div class='add'>+	ret = if_cs_prog_helper(card, helper);</div><div class='add'>+	if (ret == 0 &amp;&amp; (card-&gt;model != MODEL_8305))</div><div class='add'>+		ret = if_cs_prog_real(card, mainfw);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Now actually get the IRQ */</div><div class='add'>+	ret = request_irq(card-&gt;p_dev-&gt;irq, if_cs_interrupt,</div><div class='add'>+		IRQF_SHARED, DRV_NAME, card);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("error in request_irq\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Clear any interrupt cause that happened while sending</div><div class='add'>+	 * firmware/initializing card</div><div class='add'>+	 */</div><div class='add'>+	if_cs_write16(card, IF_CS_CARD_INT_CAUSE, IF_CS_BIT_MASK);</div><div class='add'>+	if_cs_enable_ints(card);</div><div class='add'>+</div><div class='add'>+	/* And finally bring the card up */</div><div class='add'>+	priv-&gt;fw_ready = 1;</div><div class='add'>+	if (lbs_start_card(priv) != 0) {</div><div class='add'>+		pr_err("could not activate card\n");</div><div class='add'>+		free_irq(card-&gt;p_dev-&gt;irq, card);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	release_firmware(helper);</div><div class='add'>+	release_firmware(mainfw);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /********************************************************************/</div><div class='hunk'>@@ -809,8 +853,6 @@ static int if_cs_probe(struct pcmcia_device *p_dev)</div><div class='ctx'> 	unsigned int prod_id;</div><div class='ctx'> 	struct lbs_private *priv;</div><div class='ctx'> 	struct if_cs_card *card;</div><div class='del'>-	const struct firmware *helper = NULL;</div><div class='del'>-	const struct firmware *mainfw = NULL;</div><div class='ctx'> </div><div class='ctx'> 	lbs_deb_enter(LBS_DEB_CS);</div><div class='ctx'> </div><div class='hunk'>@@ -890,20 +932,6 @@ static int if_cs_probe(struct pcmcia_device *p_dev)</div><div class='ctx'> 		goto out2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = lbs_get_firmware(&amp;p_dev-&gt;dev, NULL, NULL, card-&gt;model,</div><div class='del'>-				&amp;fw_table[0], &amp;helper, &amp;mainfw);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_err("failed to find firmware (%d)\n", ret);</div><div class='del'>-		goto out2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Load the firmware early, before calling into libertas.ko */</div><div class='del'>-	ret = if_cs_prog_helper(card, helper);</div><div class='del'>-	if (ret == 0 &amp;&amp; (card-&gt;model != MODEL_8305))</div><div class='del'>-		ret = if_cs_prog_real(card, mainfw);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out2;</div><div class='del'>-</div><div class='ctx'> 	/* Make this card known to the libertas driver */</div><div class='ctx'> 	priv = lbs_add_card(card, &amp;p_dev-&gt;dev);</div><div class='ctx'> 	if (!priv) {</div><div class='hunk'>@@ -911,37 +939,22 @@ static int if_cs_probe(struct pcmcia_device *p_dev)</div><div class='ctx'> 		goto out2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Finish setting up fields in lbs_private */</div><div class='add'>+	/* Set up fields in lbs_private */</div><div class='ctx'> 	card-&gt;priv = priv;</div><div class='ctx'> 	priv-&gt;card = card;</div><div class='ctx'> 	priv-&gt;hw_host_to_card = if_cs_host_to_card;</div><div class='ctx'> 	priv-&gt;enter_deep_sleep = NULL;</div><div class='ctx'> 	priv-&gt;exit_deep_sleep = NULL;</div><div class='ctx'> 	priv-&gt;reset_deep_sleep_wakeup = NULL;</div><div class='del'>-	priv-&gt;fw_ready = 1;</div><div class='ctx'> </div><div class='del'>-	/* Now actually get the IRQ */</div><div class='del'>-	ret = request_irq(p_dev-&gt;irq, if_cs_interrupt,</div><div class='del'>-		IRQF_SHARED, DRV_NAME, card);</div><div class='add'>+	/* Get firmware */</div><div class='add'>+	ret = lbs_get_firmware_async(priv, &amp;p_dev-&gt;dev, card-&gt;model, fw_table,</div><div class='add'>+				     if_cs_prog_firmware);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		pr_err("error in request_irq\n");</div><div class='del'>-		goto out3;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Clear any interrupt cause that happened while sending</div><div class='del'>-	 * firmware/initializing card</div><div class='del'>-	 */</div><div class='del'>-	if_cs_write16(card, IF_CS_CARD_INT_CAUSE, IF_CS_BIT_MASK);</div><div class='del'>-	if_cs_enable_ints(card);</div><div class='del'>-</div><div class='del'>-	/* And finally bring the card up */</div><div class='del'>-	if (lbs_start_card(priv) != 0) {</div><div class='del'>-		pr_err("could not activate card\n");</div><div class='add'>+		pr_err("failed to find firmware (%d)\n", ret);</div><div class='ctx'> 		goto out3;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = 0;</div><div class='ctx'> 	goto out;</div><div class='ctx'> </div><div class='ctx'> out3:</div><div class='hunk'>@@ -951,11 +964,6 @@ out2:</div><div class='ctx'> out1:</div><div class='ctx'> 	pcmcia_disable_device(p_dev);</div><div class='ctx'> out:</div><div class='del'>-	if (helper)</div><div class='del'>-		release_firmware(helper);</div><div class='del'>-	if (mainfw)</div><div class='del'>-		release_firmware(mainfw);</div><div class='del'>-</div><div class='ctx'> 	lbs_deb_leave_args(LBS_DEB_CS, "ret %d", ret);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/libertas/if_sdio.c b/drivers/net/wireless/libertas/if_sdio.c<br/>index 9804ebc892d4..76caebaa4397 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/libertas/if_sdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/libertas/if_sdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/libertas/if_sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/if_sdio.c</a></div><div class='hunk'>@@ -65,12 +65,6 @@ static void if_sdio_interrupt(struct sdio_func *func);</div><div class='ctx'>  */</div><div class='ctx'> static u8 user_rmmod;</div><div class='ctx'> </div><div class='del'>-static char *lbs_helper_name = NULL;</div><div class='del'>-module_param_named(helper_name, lbs_helper_name, charp, 0644);</div><div class='del'>-</div><div class='del'>-static char *lbs_fw_name = NULL;</div><div class='del'>-module_param_named(fw_name, lbs_fw_name, charp, 0644);</div><div class='del'>-</div><div class='ctx'> static const struct sdio_device_id if_sdio_ids[] = {</div><div class='ctx'> 	{ SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL,</div><div class='ctx'> 			SDIO_DEVICE_ID_MARVELL_LIBERTAS) },</div><div class='hunk'>@@ -123,11 +117,8 @@ struct if_sdio_card {</div><div class='ctx'> 	int			model;</div><div class='ctx'> 	unsigned long		ioport;</div><div class='ctx'> 	unsigned int		scratch_reg;</div><div class='del'>-</div><div class='del'>-	const char		*helper;</div><div class='del'>-	const char		*firmware;</div><div class='del'>-	bool			helper_allocated;</div><div class='del'>-	bool			firmware_allocated;</div><div class='add'>+	bool			started;</div><div class='add'>+	wait_queue_head_t	pwron_waitq;</div><div class='ctx'> </div><div class='ctx'> 	u8			buffer[65536] __attribute__((aligned(4)));</div><div class='ctx'> </div><div class='hunk'>@@ -140,6 +131,9 @@ struct if_sdio_card {</div><div class='ctx'> 	u8			rx_unit;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void if_sdio_finish_power_on(struct if_sdio_card *card);</div><div class='add'>+static int if_sdio_power_off(struct if_sdio_card *card);</div><div class='add'>+</div><div class='ctx'> /********************************************************************/</div><div class='ctx'> /* I/O                                                              */</div><div class='ctx'> /********************************************************************/</div><div class='hunk'>@@ -680,12 +674,39 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void if_sdio_do_prog_firmware(struct lbs_private *priv, int ret,</div><div class='add'>+				     const struct firmware *helper,</div><div class='add'>+				     const struct firmware *mainfw)</div><div class='add'>+{</div><div class='add'>+	struct if_sdio_card *card = priv-&gt;card;</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("failed to find firmware (%d)\n", ret);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = if_sdio_prog_helper(card, helper);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	lbs_deb_sdio("Helper firmware loaded\n");</div><div class='add'>+</div><div class='add'>+	ret = if_sdio_prog_real(card, mainfw);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	lbs_deb_sdio("Firmware loaded\n");</div><div class='add'>+	if_sdio_finish_power_on(card);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	release_firmware(helper);</div><div class='add'>+	release_firmware(mainfw);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int if_sdio_prog_firmware(struct if_sdio_card *card)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u16 scratch;</div><div class='del'>-	const struct firmware *helper = NULL;</div><div class='del'>-	const struct firmware *mainfw = NULL;</div><div class='ctx'> </div><div class='ctx'> 	lbs_deb_enter(LBS_DEB_SDIO);</div><div class='ctx'> </div><div class='hunk'>@@ -719,43 +740,18 @@ static int if_sdio_prog_firmware(struct if_sdio_card *card)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (scratch == IF_SDIO_FIRMWARE_OK) {</div><div class='ctx'> 		lbs_deb_sdio("firmware already loaded\n");</div><div class='del'>-		goto success;</div><div class='add'>+		if_sdio_finish_power_on(card);</div><div class='add'>+		return 0;</div><div class='ctx'> 	} else if ((card-&gt;model == MODEL_8686) &amp;&amp; (scratch &amp; 0x7fff)) {</div><div class='ctx'> 		lbs_deb_sdio("firmware may be running\n");</div><div class='del'>-		goto success;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = lbs_get_firmware(&amp;card-&gt;func-&gt;dev, lbs_helper_name, lbs_fw_name,</div><div class='del'>-				card-&gt;model, &amp;fw_table[0], &amp;helper, &amp;mainfw);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_err("failed to find firmware (%d)\n", ret);</div><div class='del'>-		goto out;</div><div class='add'>+		if_sdio_finish_power_on(card);</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = if_sdio_prog_helper(card, helper);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	lbs_deb_sdio("Helper firmware loaded\n");</div><div class='del'>-</div><div class='del'>-	ret = if_sdio_prog_real(card, mainfw);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	lbs_deb_sdio("Firmware loaded\n");</div><div class='del'>-</div><div class='del'>-success:</div><div class='del'>-	sdio_claim_host(card-&gt;func);</div><div class='del'>-	sdio_set_block_size(card-&gt;func, IF_SDIO_BLOCK_SIZE);</div><div class='del'>-	sdio_release_host(card-&gt;func);</div><div class='del'>-	ret = 0;</div><div class='add'>+	ret = lbs_get_firmware_async(card-&gt;priv, &amp;card-&gt;func-&gt;dev, card-&gt;model,</div><div class='add'>+				     fw_table, if_sdio_do_prog_firmware);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (helper)</div><div class='del'>-		release_firmware(helper);</div><div class='del'>-	if (mainfw)</div><div class='del'>-		release_firmware(mainfw);</div><div class='del'>-</div><div class='ctx'> 	lbs_deb_leave_args(LBS_DEB_SDIO, "ret %d", ret);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -764,55 +760,15 @@ out:</div><div class='ctx'> /* Power management                                                 */</div><div class='ctx'> /********************************************************************/</div><div class='ctx'> </div><div class='del'>-static int if_sdio_power_on(struct if_sdio_card *card)</div><div class='add'>+/* Finish power on sequence (after firmware is loaded) */</div><div class='add'>+static void if_sdio_finish_power_on(struct if_sdio_card *card)</div><div class='ctx'> {</div><div class='ctx'> 	struct sdio_func *func = card-&gt;func;</div><div class='ctx'> 	struct lbs_private *priv = card-&gt;priv;</div><div class='del'>-	struct mmc_host *host = func-&gt;card-&gt;host;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	sdio_claim_host(func);</div><div class='del'>-</div><div class='del'>-	ret = sdio_enable_func(func);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto release;</div><div class='del'>-</div><div class='del'>-	/* For 1-bit transfers to the 8686 model, we need to enable the</div><div class='del'>-	 * interrupt flag in the CCCR register. Set the MMC_QUIRK_LENIENT_FN0</div><div class='del'>-	 * bit to allow access to non-vendor registers. */</div><div class='del'>-	if ((card-&gt;model == MODEL_8686) &amp;&amp;</div><div class='del'>-	    (host-&gt;caps &amp; MMC_CAP_SDIO_IRQ) &amp;&amp;</div><div class='del'>-	    (host-&gt;ios.bus_width == MMC_BUS_WIDTH_1)) {</div><div class='del'>-		u8 reg;</div><div class='del'>-</div><div class='del'>-		func-&gt;card-&gt;quirks |= MMC_QUIRK_LENIENT_FN0;</div><div class='del'>-		reg = sdio_f0_readb(func, SDIO_CCCR_IF, &amp;ret);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto disable;</div><div class='del'>-</div><div class='del'>-		reg |= SDIO_BUS_ECSI;</div><div class='del'>-		sdio_f0_writeb(func, reg, SDIO_CCCR_IF, &amp;ret);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto disable;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	card-&gt;ioport = sdio_readb(func, IF_SDIO_IOPORT, &amp;ret);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto disable;</div><div class='del'>-</div><div class='del'>-	card-&gt;ioport |= sdio_readb(func, IF_SDIO_IOPORT + 1, &amp;ret) &lt;&lt; 8;</div><div class='del'>-	if (ret)</div><div class='del'>-		goto disable;</div><div class='del'>-</div><div class='del'>-	card-&gt;ioport |= sdio_readb(func, IF_SDIO_IOPORT + 2, &amp;ret) &lt;&lt; 16;</div><div class='del'>-	if (ret)</div><div class='del'>-		goto disable;</div><div class='del'>-</div><div class='del'>-	sdio_release_host(func);</div><div class='del'>-	ret = if_sdio_prog_firmware(card);</div><div class='del'>-	sdio_claim_host(func);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto disable;</div><div class='add'>+	sdio_set_block_size(card-&gt;func, IF_SDIO_BLOCK_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Get rx_unit if the chip is SD8688 or newer.</div><div class='hunk'>@@ -837,7 +793,7 @@ static int if_sdio_power_on(struct if_sdio_card *card)</div><div class='ctx'> 	 */</div><div class='ctx'> 	ret = sdio_claim_irq(func, if_sdio_interrupt);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto disable;</div><div class='add'>+		goto release;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Enable interrupts now that everything is set up</div><div class='hunk'>@@ -863,11 +819,79 @@ static int if_sdio_power_on(struct if_sdio_card *card)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;fw_ready = 1;</div><div class='add'>+	wake_up(&amp;card-&gt;pwron_waitq);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	if (!card-&gt;started) {</div><div class='add'>+		ret = lbs_start_card(priv);</div><div class='add'>+		if_sdio_power_off(card);</div><div class='add'>+		if (ret == 0) {</div><div class='add'>+			card-&gt;started = true;</div><div class='add'>+			/* Tell PM core that we don't need the card to be</div><div class='add'>+			 * powered now */</div><div class='add'>+			pm_runtime_put_noidle(&amp;func-&gt;dev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='ctx'> </div><div class='ctx'> release_irq:</div><div class='ctx'> 	sdio_release_irq(func);</div><div class='add'>+release:</div><div class='add'>+	sdio_release_host(func);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int if_sdio_power_on(struct if_sdio_card *card)</div><div class='add'>+{</div><div class='add'>+	struct sdio_func *func = card-&gt;func;</div><div class='add'>+	struct mmc_host *host = func-&gt;card-&gt;host;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	sdio_claim_host(func);</div><div class='add'>+</div><div class='add'>+	ret = sdio_enable_func(func);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto release;</div><div class='add'>+</div><div class='add'>+	/* For 1-bit transfers to the 8686 model, we need to enable the</div><div class='add'>+	 * interrupt flag in the CCCR register. Set the MMC_QUIRK_LENIENT_FN0</div><div class='add'>+	 * bit to allow access to non-vendor registers. */</div><div class='add'>+	if ((card-&gt;model == MODEL_8686) &amp;&amp;</div><div class='add'>+	    (host-&gt;caps &amp; MMC_CAP_SDIO_IRQ) &amp;&amp;</div><div class='add'>+	    (host-&gt;ios.bus_width == MMC_BUS_WIDTH_1)) {</div><div class='add'>+		u8 reg;</div><div class='add'>+</div><div class='add'>+		func-&gt;card-&gt;quirks |= MMC_QUIRK_LENIENT_FN0;</div><div class='add'>+		reg = sdio_f0_readb(func, SDIO_CCCR_IF, &amp;ret);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto disable;</div><div class='add'>+</div><div class='add'>+		reg |= SDIO_BUS_ECSI;</div><div class='add'>+		sdio_f0_writeb(func, reg, SDIO_CCCR_IF, &amp;ret);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	card-&gt;ioport = sdio_readb(func, IF_SDIO_IOPORT, &amp;ret);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto disable;</div><div class='add'>+</div><div class='add'>+	card-&gt;ioport |= sdio_readb(func, IF_SDIO_IOPORT + 1, &amp;ret) &lt;&lt; 8;</div><div class='add'>+	if (ret)</div><div class='add'>+		goto disable;</div><div class='add'>+</div><div class='add'>+	card-&gt;ioport |= sdio_readb(func, IF_SDIO_IOPORT + 2, &amp;ret) &lt;&lt; 16;</div><div class='add'>+	if (ret)</div><div class='add'>+		goto disable;</div><div class='add'>+</div><div class='add'>+	sdio_release_host(func);</div><div class='add'>+	ret = if_sdio_prog_firmware(card);</div><div class='add'>+	if (ret) {</div><div class='add'>+		sdio_disable_func(func);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='ctx'> disable:</div><div class='ctx'> 	sdio_disable_func(func);</div><div class='ctx'> release:</div><div class='hunk'>@@ -1074,11 +1098,17 @@ static int if_sdio_power_save(struct lbs_private *priv)</div><div class='ctx'> static int if_sdio_power_restore(struct lbs_private *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct if_sdio_card *card = priv-&gt;card;</div><div class='add'>+	int r;</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure the card will not be powered off by runtime PM */</div><div class='ctx'> 	pm_runtime_get_sync(&amp;card-&gt;func-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	return if_sdio_power_on(card);</div><div class='add'>+	r = if_sdio_power_on(card);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	wait_event(card-&gt;pwron_waitq, priv-&gt;fw_ready);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1179,6 +1209,7 @@ static int if_sdio_probe(struct sdio_func *func,</div><div class='ctx'> 	spin_lock_init(&amp;card-&gt;lock);</div><div class='ctx'> 	card-&gt;workqueue = create_workqueue("libertas_sdio");</div><div class='ctx'> 	INIT_WORK(&amp;card-&gt;packet_worker, if_sdio_host_to_card_worker);</div><div class='add'>+	init_waitqueue_head(&amp;card-&gt;pwron_waitq);</div><div class='ctx'> </div><div class='ctx'> 	/* Check if we support this card */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(fw_table); i++) {</div><div class='hunk'>@@ -1220,14 +1251,6 @@ static int if_sdio_probe(struct sdio_func *func,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_activate_card;</div><div class='ctx'> </div><div class='del'>-	ret = lbs_start_card(priv);</div><div class='del'>-	if_sdio_power_off(card);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_activate_card;</div><div class='del'>-</div><div class='del'>-	/* Tell PM core that we don't need the card to be powered now */</div><div class='del'>-	pm_runtime_put_noidle(&amp;func-&gt;dev);</div><div class='del'>-</div><div class='ctx'> out:</div><div class='ctx'> 	lbs_deb_leave_args(LBS_DEB_SDIO, "ret %d", ret);</div><div class='ctx'> </div><div class='hunk'>@@ -1244,10 +1267,6 @@ free:</div><div class='ctx'> 		kfree(packet);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (card-&gt;helper_allocated)</div><div class='del'>-		kfree(card-&gt;helper);</div><div class='del'>-	if (card-&gt;firmware_allocated)</div><div class='del'>-		kfree(card-&gt;firmware);</div><div class='ctx'> 	kfree(card);</div><div class='ctx'> </div><div class='ctx'> 	goto out;</div><div class='hunk'>@@ -1295,12 +1314,6 @@ static void if_sdio_remove(struct sdio_func *func)</div><div class='ctx'> 		kfree(packet);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (card-&gt;helper_allocated)</div><div class='del'>-		kfree(card-&gt;helper);</div><div class='del'>-	if (card-&gt;firmware_allocated)</div><div class='del'>-		kfree(card-&gt;firmware);</div><div class='del'>-	kfree(card);</div><div class='del'>-</div><div class='ctx'> 	lbs_deb_leave(LBS_DEB_SDIO);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/libertas/if_spi.c b/drivers/net/wireless/libertas/if_spi.c<br/>index 50b1ee7721e9..9604a1c4a74d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/libertas/if_spi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/libertas/if_spi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/libertas/if_spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/if_spi.c</a></div><div class='hunk'>@@ -1064,9 +1064,8 @@ static int if_spi_init_card(struct if_spi_card *card)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		err = lbs_get_firmware(&amp;card-&gt;spi-&gt;dev, NULL, NULL,</div><div class='del'>-					card-&gt;card_id, &amp;fw_table[0], &amp;helper,</div><div class='del'>-					&amp;mainfw);</div><div class='add'>+		err = lbs_get_firmware(&amp;card-&gt;spi-&gt;dev, card-&gt;card_id,</div><div class='add'>+					&amp;fw_table[0], &amp;helper, &amp;mainfw);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			netdev_err(priv-&gt;dev, "failed to find firmware (%d)\n",</div><div class='ctx'> 				   err);</div><div class='hunk'>@@ -1095,10 +1094,8 @@ static int if_spi_init_card(struct if_spi_card *card)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (helper)</div><div class='del'>-		release_firmware(helper);</div><div class='del'>-	if (mainfw)</div><div class='del'>-		release_firmware(mainfw);</div><div class='add'>+	release_firmware(helper);</div><div class='add'>+	release_firmware(mainfw);</div><div class='ctx'> </div><div class='ctx'> 	lbs_deb_leave_args(LBS_DEB_SPI, "err %d\n", err);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/libertas/if_usb.c b/drivers/net/wireless/libertas/if_usb.c<br/>index 74da5f1ea243..cd3b0d400618 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/libertas/if_usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/libertas/if_usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/libertas/if_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/if_usb.c</a></div><div class='hunk'>@@ -29,9 +29,6 @@</div><div class='ctx'> </div><div class='ctx'> #define MESSAGE_HEADER_LEN	4</div><div class='ctx'> </div><div class='del'>-static char *lbs_fw_name = NULL;</div><div class='del'>-module_param_named(fw_name, lbs_fw_name, charp, 0644);</div><div class='del'>-</div><div class='ctx'> MODULE_FIRMWARE("libertas/usb8388_v9.bin");</div><div class='ctx'> MODULE_FIRMWARE("libertas/usb8388_v5.bin");</div><div class='ctx'> MODULE_FIRMWARE("libertas/usb8388.bin");</div><div class='hunk'>@@ -44,6 +41,16 @@ enum {</div><div class='ctx'> 	MODEL_8682 = 0x2</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* table of firmware file names */</div><div class='add'>+static const struct lbs_fw_table fw_table[] = {</div><div class='add'>+	{ MODEL_8388, "libertas/usb8388_olpc.bin", NULL },</div><div class='add'>+	{ MODEL_8388, "libertas/usb8388_v9.bin", NULL },</div><div class='add'>+	{ MODEL_8388, "libertas/usb8388_v5.bin", NULL },</div><div class='add'>+	{ MODEL_8388, "libertas/usb8388.bin", NULL },</div><div class='add'>+	{ MODEL_8388, "usb8388.bin", NULL },</div><div class='add'>+	{ MODEL_8682, "libertas/usb8682.bin", NULL }</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct usb_device_id if_usb_table[] = {</div><div class='ctx'> 	/* Enter the device signature inside */</div><div class='ctx'> 	{ USB_DEVICE(0x1286, 0x2001), .driver_info = MODEL_8388 },</div><div class='hunk'>@@ -55,10 +62,9 @@ MODULE_DEVICE_TABLE(usb, if_usb_table);</div><div class='ctx'> </div><div class='ctx'> static void if_usb_receive(struct urb *urb);</div><div class='ctx'> static void if_usb_receive_fwload(struct urb *urb);</div><div class='del'>-static int __if_usb_prog_firmware(struct if_usb_card *cardp,</div><div class='del'>-					const char *fwname, int cmd);</div><div class='del'>-static int if_usb_prog_firmware(struct if_usb_card *cardp,</div><div class='del'>-					const char *fwname, int cmd);</div><div class='add'>+static void if_usb_prog_firmware(struct lbs_private *priv, int ret,</div><div class='add'>+				 const struct firmware *fw,</div><div class='add'>+				 const struct firmware *unused);</div><div class='ctx'> static int if_usb_host_to_card(struct lbs_private *priv, uint8_t type,</div><div class='ctx'> 			       uint8_t *payload, uint16_t nb);</div><div class='ctx'> static int usb_tx_block(struct if_usb_card *cardp, uint8_t *payload,</div><div class='hunk'>@@ -67,69 +73,6 @@ static void if_usb_free(struct if_usb_card *cardp);</div><div class='ctx'> static int if_usb_submit_rx_urb(struct if_usb_card *cardp);</div><div class='ctx'> static int if_usb_reset_device(struct if_usb_card *cardp);</div><div class='ctx'> </div><div class='del'>-/* sysfs hooks */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *  Set function to write firmware to device's persistent memory</div><div class='del'>- */</div><div class='del'>-static ssize_t if_usb_firmware_set(struct device *dev,</div><div class='del'>-		struct device_attribute *attr, const char *buf, size_t count)</div><div class='del'>-{</div><div class='del'>-	struct lbs_private *priv = to_net_dev(dev)-&gt;ml_priv;</div><div class='del'>-	struct if_usb_card *cardp = priv-&gt;card;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	BUG_ON(buf == NULL);</div><div class='del'>-</div><div class='del'>-	ret = if_usb_prog_firmware(cardp, buf, BOOT_CMD_UPDATE_FW);</div><div class='del'>-	if (ret == 0)</div><div class='del'>-		return count;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * lbs_flash_fw attribute to be exported per ethX interface through sysfs</div><div class='del'>- * (/sys/class/net/ethX/lbs_flash_fw).  Use this like so to write firmware to</div><div class='del'>- * the device's persistent memory:</div><div class='del'>- * echo usb8388-5.126.0.p5.bin &gt; /sys/class/net/ethX/lbs_flash_fw</div><div class='del'>- */</div><div class='del'>-static DEVICE_ATTR(lbs_flash_fw, 0200, NULL, if_usb_firmware_set);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * if_usb_boot2_set - write firmware to device's persistent memory</div><div class='del'>- *</div><div class='del'>- * @dev: target device</div><div class='del'>- * @attr: device attributes</div><div class='del'>- * @buf: firmware buffer to write</div><div class='del'>- * @count: number of bytes to write</div><div class='del'>- *</div><div class='del'>- * returns: number of bytes written or negative error code</div><div class='del'>- */</div><div class='del'>-static ssize_t if_usb_boot2_set(struct device *dev,</div><div class='del'>-		struct device_attribute *attr, const char *buf, size_t count)</div><div class='del'>-{</div><div class='del'>-	struct lbs_private *priv = to_net_dev(dev)-&gt;ml_priv;</div><div class='del'>-	struct if_usb_card *cardp = priv-&gt;card;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	BUG_ON(buf == NULL);</div><div class='del'>-</div><div class='del'>-	ret = if_usb_prog_firmware(cardp, buf, BOOT_CMD_UPDATE_BOOT2);</div><div class='del'>-	if (ret == 0)</div><div class='del'>-		return count;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * lbs_flash_boot2 attribute to be exported per ethX interface through sysfs</div><div class='del'>- * (/sys/class/net/ethX/lbs_flash_boot2).  Use this like so to write firmware</div><div class='del'>- * to the device's persistent memory:</div><div class='del'>- * echo usb8388-5.126.0.p5.bin &gt; /sys/class/net/ethX/lbs_flash_boot2</div><div class='del'>- */</div><div class='del'>-static DEVICE_ATTR(lbs_flash_boot2, 0200, NULL, if_usb_boot2_set);</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * if_usb_write_bulk_callback - callback function to handle the status</div><div class='ctx'>  * of the URB</div><div class='hunk'>@@ -256,6 +199,7 @@ static int if_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 	struct usb_endpoint_descriptor *endpoint;</div><div class='ctx'> 	struct lbs_private *priv;</div><div class='ctx'> 	struct if_usb_card *cardp;</div><div class='add'>+	int r = -ENOMEM;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	udev = interface_to_usbdev(intf);</div><div class='hunk'>@@ -313,20 +257,10 @@ static int if_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 		goto dealloc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Upload firmware */</div><div class='del'>-	kparam_block_sysfs_write(fw_name);</div><div class='del'>-	if (__if_usb_prog_firmware(cardp, lbs_fw_name, BOOT_CMD_FW_BY_USB)) {</div><div class='del'>-		kparam_unblock_sysfs_write(fw_name);</div><div class='del'>-		lbs_deb_usbd(&amp;udev-&gt;dev, "FW upload failed\n");</div><div class='del'>-		goto err_prog_firmware;</div><div class='del'>-	}</div><div class='del'>-	kparam_unblock_sysfs_write(fw_name);</div><div class='del'>-</div><div class='ctx'> 	if (!(priv = lbs_add_card(cardp, &amp;intf-&gt;dev)))</div><div class='del'>-		goto err_prog_firmware;</div><div class='add'>+		goto err_add_card;</div><div class='ctx'> </div><div class='ctx'> 	cardp-&gt;priv = priv;</div><div class='del'>-	cardp-&gt;priv-&gt;fw_ready = 1;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;hw_host_to_card = if_usb_host_to_card;</div><div class='ctx'> 	priv-&gt;enter_deep_sleep = NULL;</div><div class='hunk'>@@ -339,42 +273,25 @@ static int if_usb_probe(struct usb_interface *intf,</div><div class='ctx'> </div><div class='ctx'> 	cardp-&gt;boot2_version = udev-&gt;descriptor.bcdDevice;</div><div class='ctx'> </div><div class='del'>-	if_usb_submit_rx_urb(cardp);</div><div class='del'>-</div><div class='del'>-	if (lbs_start_card(priv))</div><div class='del'>-		goto err_start_card;</div><div class='del'>-</div><div class='del'>-	if_usb_setup_firmware(priv);</div><div class='del'>-</div><div class='ctx'> 	usb_get_dev(udev);</div><div class='ctx'> 	usb_set_intfdata(intf, cardp);</div><div class='ctx'> </div><div class='del'>-	if (device_create_file(&amp;priv-&gt;dev-&gt;dev, &amp;dev_attr_lbs_flash_fw))</div><div class='del'>-		netdev_err(priv-&gt;dev,</div><div class='del'>-			   "cannot register lbs_flash_fw attribute\n");</div><div class='del'>-</div><div class='del'>-	if (device_create_file(&amp;priv-&gt;dev-&gt;dev, &amp;dev_attr_lbs_flash_boot2))</div><div class='del'>-		netdev_err(priv-&gt;dev,</div><div class='del'>-			   "cannot register lbs_flash_boot2 attribute\n");</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * EHS_REMOVE_WAKEUP is not supported on all versions of the firmware.</div><div class='del'>-	 */</div><div class='del'>-	priv-&gt;wol_criteria = EHS_REMOVE_WAKEUP;</div><div class='del'>-	if (lbs_host_sleep_cfg(priv, priv-&gt;wol_criteria, NULL))</div><div class='del'>-		priv-&gt;ehs_remove_supported = false;</div><div class='add'>+	r = lbs_get_firmware_async(priv, &amp;udev-&gt;dev, cardp-&gt;model,</div><div class='add'>+				   fw_table, if_usb_prog_firmware);</div><div class='add'>+	if (r)</div><div class='add'>+		goto err_get_fw;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_start_card:</div><div class='add'>+err_get_fw:</div><div class='ctx'> 	lbs_remove_card(priv);</div><div class='del'>-err_prog_firmware:</div><div class='add'>+err_add_card:</div><div class='ctx'> 	if_usb_reset_device(cardp);</div><div class='ctx'> dealloc:</div><div class='ctx'> 	if_usb_free(cardp);</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='del'>-	return -ENOMEM;</div><div class='add'>+	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -389,9 +306,6 @@ static void if_usb_disconnect(struct usb_interface *intf)</div><div class='ctx'> </div><div class='ctx'> 	lbs_deb_enter(LBS_DEB_MAIN);</div><div class='ctx'> </div><div class='del'>-	device_remove_file(&amp;priv-&gt;dev-&gt;dev, &amp;dev_attr_lbs_flash_boot2);</div><div class='del'>-	device_remove_file(&amp;priv-&gt;dev-&gt;dev, &amp;dev_attr_lbs_flash_fw);</div><div class='del'>-</div><div class='ctx'> 	cardp-&gt;surprise_removed = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (priv) {</div><div class='hunk'>@@ -912,121 +826,22 @@ static int check_fwfile_format(const uint8_t *data, uint32_t totlen)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>-*  if_usb_prog_firmware - programs the firmware subject to cmd</div><div class='del'>-*</div><div class='del'>-*  @cardp:	the if_usb_card descriptor</div><div class='del'>-*  @fwname:	firmware or boot2 image file name</div><div class='del'>-*  @cmd:	either BOOT_CMD_FW_BY_USB, BOOT_CMD_UPDATE_FW,</div><div class='del'>-*		or BOOT_CMD_UPDATE_BOOT2.</div><div class='del'>-*  returns:	0 or error code</div><div class='del'>-*/</div><div class='del'>-static int if_usb_prog_firmware(struct if_usb_card *cardp,</div><div class='del'>-				const char *fwname, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct lbs_private *priv = cardp-&gt;priv;</div><div class='del'>-	unsigned long flags, caps;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	caps = priv-&gt;fwcapinfo;</div><div class='del'>-	if (((cmd == BOOT_CMD_UPDATE_FW) &amp;&amp; !(caps &amp; FW_CAPINFO_FIRMWARE_UPGRADE)) ||</div><div class='del'>-	    ((cmd == BOOT_CMD_UPDATE_BOOT2) &amp;&amp; !(caps &amp; FW_CAPINFO_BOOT2_UPGRADE)))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	/* Ensure main thread is idle. */</div><div class='del'>-	spin_lock_irqsave(&amp;priv-&gt;driver_lock, flags);</div><div class='del'>-	while (priv-&gt;cur_cmd != NULL || priv-&gt;dnld_sent != DNLD_RES_RECEIVED) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;priv-&gt;driver_lock, flags);</div><div class='del'>-		if (wait_event_interruptible(priv-&gt;waitq,</div><div class='del'>-				(priv-&gt;cur_cmd == NULL &amp;&amp;</div><div class='del'>-				priv-&gt;dnld_sent == DNLD_RES_RECEIVED))) {</div><div class='del'>-			return -ERESTARTSYS;</div><div class='del'>-		}</div><div class='del'>-		spin_lock_irqsave(&amp;priv-&gt;driver_lock, flags);</div><div class='del'>-	}</div><div class='del'>-	priv-&gt;dnld_sent = DNLD_BOOTCMD_SENT;</div><div class='del'>-	spin_unlock_irqrestore(&amp;priv-&gt;driver_lock, flags);</div><div class='del'>-</div><div class='del'>-	ret = __if_usb_prog_firmware(cardp, fwname, cmd);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;priv-&gt;driver_lock, flags);</div><div class='del'>-	priv-&gt;dnld_sent = DNLD_RES_RECEIVED;</div><div class='del'>-	spin_unlock_irqrestore(&amp;priv-&gt;driver_lock, flags);</div><div class='del'>-</div><div class='del'>-	wake_up(&amp;priv-&gt;waitq);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* table of firmware file names */</div><div class='del'>-static const struct {</div><div class='del'>-	u32 model;</div><div class='del'>-	const char *fwname;</div><div class='del'>-} fw_table[] = {</div><div class='del'>-	{ MODEL_8388, "libertas/usb8388_v9.bin" },</div><div class='del'>-	{ MODEL_8388, "libertas/usb8388_v5.bin" },</div><div class='del'>-	{ MODEL_8388, "libertas/usb8388.bin" },</div><div class='del'>-	{ MODEL_8388, "usb8388.bin" },</div><div class='del'>-	{ MODEL_8682, "libertas/usb8682.bin" }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_OLPC</div><div class='del'>-</div><div class='del'>-static int try_olpc_fw(struct if_usb_card *cardp)</div><div class='del'>-{</div><div class='del'>-	int retval = -ENOENT;</div><div class='del'>-</div><div class='del'>-	/* try the OLPC firmware first; fall back to fw_table list */</div><div class='del'>-	if (machine_is_olpc() &amp;&amp; cardp-&gt;model == MODEL_8388)</div><div class='del'>-		retval = request_firmware(&amp;cardp-&gt;fw,</div><div class='del'>-				"libertas/usb8388_olpc.bin", &amp;cardp-&gt;udev-&gt;dev);</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-static int try_olpc_fw(struct if_usb_card *cardp) { return -ENOENT; }</div><div class='del'>-#endif /* !CONFIG_OLPC */</div><div class='del'>-</div><div class='del'>-static int get_fw(struct if_usb_card *cardp, const char *fwname)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Try user-specified firmware first */</div><div class='del'>-	if (fwname)</div><div class='del'>-		return request_firmware(&amp;cardp-&gt;fw, fwname, &amp;cardp-&gt;udev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	/* Handle OLPC firmware */</div><div class='del'>-	if (try_olpc_fw(cardp) == 0)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Otherwise search for firmware to use */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(fw_table); i++) {</div><div class='del'>-		if (fw_table[i].model != cardp-&gt;model)</div><div class='del'>-			continue;</div><div class='del'>-		if (request_firmware(&amp;cardp-&gt;fw, fw_table[i].fwname,</div><div class='del'>-					&amp;cardp-&gt;udev-&gt;dev) == 0)</div><div class='del'>-			return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ENOENT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __if_usb_prog_firmware(struct if_usb_card *cardp,</div><div class='del'>-					const char *fwname, int cmd)</div><div class='add'>+static void if_usb_prog_firmware(struct lbs_private *priv, int ret,</div><div class='add'>+				 const struct firmware *fw,</div><div class='add'>+				 const struct firmware *unused)</div><div class='ctx'> {</div><div class='add'>+	struct if_usb_card *cardp = priv-&gt;card;</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> 	static int reset_count = 10;</div><div class='del'>-	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	lbs_deb_enter(LBS_DEB_USB);</div><div class='ctx'> </div><div class='del'>-	ret = get_fw(cardp, fwname);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		pr_err("failed to find firmware (%d)\n", ret);</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	cardp-&gt;fw = fw;</div><div class='ctx'> 	if (check_fwfile_format(cardp-&gt;fw-&gt;data, cardp-&gt;fw-&gt;size)) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto release_fw;</div><div class='hunk'>@@ -1053,7 +868,7 @@ restart:</div><div class='ctx'> 	do {</div><div class='ctx'> 		int j = 0;</div><div class='ctx'> 		i++;</div><div class='del'>-		if_usb_issue_boot_command(cardp, cmd);</div><div class='add'>+		if_usb_issue_boot_command(cardp, BOOT_CMD_FW_BY_USB);</div><div class='ctx'> 		/* wait for command response */</div><div class='ctx'> 		do {</div><div class='ctx'> 			j++;</div><div class='hunk'>@@ -1109,13 +924,27 @@ restart:</div><div class='ctx'> 		goto release_fw;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	cardp-&gt;priv-&gt;fw_ready = 1;</div><div class='add'>+	if_usb_submit_rx_urb(cardp);</div><div class='add'>+</div><div class='add'>+	if (lbs_start_card(priv))</div><div class='add'>+		goto release_fw;</div><div class='add'>+</div><div class='add'>+	if_usb_setup_firmware(priv);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * EHS_REMOVE_WAKEUP is not supported on all versions of the firmware.</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;wol_criteria = EHS_REMOVE_WAKEUP;</div><div class='add'>+	if (lbs_host_sleep_cfg(priv, priv-&gt;wol_criteria, NULL))</div><div class='add'>+		priv-&gt;ehs_remove_supported = false;</div><div class='add'>+</div><div class='ctx'>  release_fw:</div><div class='ctx'> 	release_firmware(cardp-&gt;fw);</div><div class='ctx'> 	cardp-&gt;fw = NULL;</div><div class='ctx'> </div><div class='ctx'>  done:</div><div class='del'>-	lbs_deb_leave_args(LBS_DEB_USB, "ret %d", ret);</div><div class='del'>-	return ret;</div><div class='add'>+	lbs_deb_leave(LBS_DEB_USB);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1128,8 +957,10 @@ static int if_usb_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='ctx'> </div><div class='ctx'> 	lbs_deb_enter(LBS_DEB_USB);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;psstate != PS_STATE_FULL_POWER)</div><div class='del'>-		return -1;</div><div class='add'>+	if (priv-&gt;psstate != PS_STATE_FULL_POWER) {</div><div class='add'>+		ret = -1;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OLPC</div><div class='ctx'> 	if (machine_is_olpc()) {</div><div class='hunk'>@@ -1180,6 +1011,7 @@ static struct usb_driver if_usb_driver = {</div><div class='ctx'> 	.suspend = if_usb_suspend,</div><div class='ctx'> 	.resume = if_usb_resume,</div><div class='ctx'> 	.reset_resume = if_usb_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(if_usb_driver);</div><div class='head'>diff --git a/drivers/net/wireless/libertas/main.c b/drivers/net/wireless/libertas/main.c<br/>index 957681dede17..e96ee0aa8439 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/libertas/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/libertas/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/libertas/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas/main.c</a></div><div class='hunk'>@@ -878,6 +878,7 @@ static int lbs_init_adapter(struct lbs_private *priv)</div><div class='ctx'> 	priv-&gt;is_host_sleep_configured = 0;</div><div class='ctx'> 	priv-&gt;is_host_sleep_activated = 0;</div><div class='ctx'> 	init_waitqueue_head(&amp;priv-&gt;host_sleep_q);</div><div class='add'>+	init_waitqueue_head(&amp;priv-&gt;fw_waitq);</div><div class='ctx'> 	mutex_init(&amp;priv-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	setup_timer(&amp;priv-&gt;command_timer, lbs_cmd_timeout_handler,</div><div class='hunk'>@@ -1033,7 +1034,11 @@ void lbs_remove_card(struct lbs_private *priv)</div><div class='ctx'> 	lbs_deb_enter(LBS_DEB_MAIN);</div><div class='ctx'> </div><div class='ctx'> 	lbs_remove_mesh(priv);</div><div class='del'>-	lbs_scan_deinit(priv);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;wiphy_registered)</div><div class='add'>+		lbs_scan_deinit(priv);</div><div class='add'>+</div><div class='add'>+	lbs_wait_for_firmware_load(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* worker thread destruction blocks on the in-flight command which</div><div class='ctx'> 	 * should have been cleared already in lbs_stop_card().</div><div class='hunk'>@@ -1128,6 +1133,11 @@ void lbs_stop_card(struct lbs_private *priv)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	dev = priv-&gt;dev;</div><div class='ctx'> </div><div class='add'>+	/* If the netdev isn't registered, it means that lbs_start_card() was</div><div class='add'>+	 * never called so we have nothing to do here. */</div><div class='add'>+	if (dev-&gt;reg_state != NETREG_REGISTERED)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1177,111 +1187,6 @@ void lbs_notify_command_response(struct lbs_private *priv, u8 resp_idx)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(lbs_notify_command_response);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- *  lbs_get_firmware - Retrieves two-stage firmware</div><div class='del'>- *</div><div class='del'>- *  @dev:     	A pointer to &amp;device structure</div><div class='del'>- *  @user_helper: User-defined helper firmware file</div><div class='del'>- *  @user_mainfw: User-defined main firmware file</div><div class='del'>- *  @card_model: Bus-specific card model ID used to filter firmware table</div><div class='del'>- *		elements</div><div class='del'>- *  @fw_table:	Table of firmware file names and device model numbers</div><div class='del'>- *		terminated by an entry with a NULL helper name</div><div class='del'>- *  @helper:	On success, the helper firmware; caller must free</div><div class='del'>- *  @mainfw:	On success, the main firmware; caller must free</div><div class='del'>- *</div><div class='del'>- *  returns:		0 on success, non-zero on failure</div><div class='del'>- */</div><div class='del'>-int lbs_get_firmware(struct device *dev, const char *user_helper,</div><div class='del'>-			const char *user_mainfw, u32 card_model,</div><div class='del'>-			const struct lbs_fw_table *fw_table,</div><div class='del'>-			const struct firmware **helper,</div><div class='del'>-			const struct firmware **mainfw)</div><div class='del'>-{</div><div class='del'>-	const struct lbs_fw_table *iter;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	BUG_ON(helper == NULL);</div><div class='del'>-	BUG_ON(mainfw == NULL);</div><div class='del'>-</div><div class='del'>-	/* Try user-specified firmware first */</div><div class='del'>-	if (user_helper) {</div><div class='del'>-		ret = request_firmware(helper, user_helper, dev);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(dev, "couldn't find helper firmware %s\n",</div><div class='del'>-				user_helper);</div><div class='del'>-			goto fail;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (user_mainfw) {</div><div class='del'>-		ret = request_firmware(mainfw, user_mainfw, dev);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(dev, "couldn't find main firmware %s\n",</div><div class='del'>-				user_mainfw);</div><div class='del'>-			goto fail;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (*helper &amp;&amp; *mainfw)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Otherwise search for firmware to use.  If neither the helper or</div><div class='del'>-	 * the main firmware were specified by the user, then we need to</div><div class='del'>-	 * make sure that found helper &amp; main are from the same entry in</div><div class='del'>-	 * fw_table.</div><div class='del'>-	 */</div><div class='del'>-	iter = fw_table;</div><div class='del'>-	while (iter &amp;&amp; iter-&gt;helper) {</div><div class='del'>-		if (iter-&gt;model != card_model)</div><div class='del'>-			goto next;</div><div class='del'>-</div><div class='del'>-		if (*helper == NULL) {</div><div class='del'>-			ret = request_firmware(helper, iter-&gt;helper, dev);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto next;</div><div class='del'>-</div><div class='del'>-			/* If the device has one-stage firmware (ie cf8305) and</div><div class='del'>-			 * we've got it then we don't need to bother with the</div><div class='del'>-			 * main firmware.</div><div class='del'>-			 */</div><div class='del'>-			if (iter-&gt;fwname == NULL)</div><div class='del'>-				return 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (*mainfw == NULL) {</div><div class='del'>-			ret = request_firmware(mainfw, iter-&gt;fwname, dev);</div><div class='del'>-			if (ret &amp;&amp; !user_helper) {</div><div class='del'>-				/* Clear the helper if it wasn't user-specified</div><div class='del'>-				 * and the main firmware load failed, to ensure</div><div class='del'>-				 * we don't have mismatched firmware pairs.</div><div class='del'>-				 */</div><div class='del'>-				release_firmware(*helper);</div><div class='del'>-				*helper = NULL;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (*helper &amp;&amp; *mainfw)</div><div class='del'>-			return 0;</div><div class='del'>-</div><div class='del'>-  next:</div><div class='del'>-		iter++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-  fail:</div><div class='del'>-	/* Failed */</div><div class='del'>-	if (*helper) {</div><div class='del'>-		release_firmware(*helper);</div><div class='del'>-		*helper = NULL;</div><div class='del'>-	}</div><div class='del'>-	if (*mainfw) {</div><div class='del'>-		release_firmware(*mainfw);</div><div class='del'>-		*mainfw = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ENOENT;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(lbs_get_firmware);</div><div class='del'>-</div><div class='ctx'> static int __init lbs_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	lbs_deb_enter(LBS_DEB_MAIN);</div><div class='head'>diff --git a/drivers/net/wireless/libertas_tf/if_usb.c b/drivers/net/wireless/libertas_tf/if_usb.c<br/>index 7ced130f4f9e..19a5a92dd779 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/libertas_tf/if_usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/libertas_tf/if_usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/libertas_tf/if_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/libertas_tf/if_usb.c</a></div><div class='hunk'>@@ -920,6 +920,7 @@ static struct usb_driver if_usb_driver = {</div><div class='ctx'> 	.id_table = if_usb_table,</div><div class='ctx'> 	.suspend = if_usb_suspend,</div><div class='ctx'> 	.resume = if_usb_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(if_usb_driver);</div><div class='head'>diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c<br/>index b7ce6a6e355f..fb787df01666 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mac80211_hwsim.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mac80211_hwsim.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mac80211_hwsim.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mac80211_hwsim.c</a></div><div class='hunk'>@@ -582,11 +582,13 @@ static void mac80211_hwsim_tx_frame_nl(struct ieee80211_hw *hw,</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, HWSIM_ATTR_ADDR_TRANSMITTER,</div><div class='del'>-		     sizeof(struct mac_address), data-&gt;addresses[1].addr);</div><div class='add'>+	if (nla_put(skb, HWSIM_ATTR_ADDR_TRANSMITTER,</div><div class='add'>+		    sizeof(struct mac_address), data-&gt;addresses[1].addr))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 	/* We get the skb-&gt;data */</div><div class='del'>-	NLA_PUT(skb, HWSIM_ATTR_FRAME, my_skb-&gt;len, my_skb-&gt;data);</div><div class='add'>+	if (nla_put(skb, HWSIM_ATTR_FRAME, my_skb-&gt;len, my_skb-&gt;data))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 	/* We get the flags for this transmission, and we translate them to</div><div class='ctx'> 	   wmediumd flags  */</div><div class='hunk'>@@ -597,7 +599,8 @@ static void mac80211_hwsim_tx_frame_nl(struct ieee80211_hw *hw,</div><div class='ctx'> 	if (info-&gt;flags &amp; IEEE80211_TX_CTL_NO_ACK)</div><div class='ctx'> 		hwsim_flags |= HWSIM_TX_CTL_NO_ACK;</div><div class='ctx'> </div><div class='del'>-	NLA_PUT_U32(skb, HWSIM_ATTR_FLAGS, hwsim_flags);</div><div class='add'>+	if (nla_put_u32(skb, HWSIM_ATTR_FLAGS, hwsim_flags))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 	/* We get the tx control (rate and retries) info*/</div><div class='ctx'> </div><div class='hunk'>@@ -606,12 +609,14 @@ static void mac80211_hwsim_tx_frame_nl(struct ieee80211_hw *hw,</div><div class='ctx'> 		tx_attempts[i].count = info-&gt;status.rates[i].count;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, HWSIM_ATTR_TX_INFO,</div><div class='del'>-		     sizeof(struct hwsim_tx_rate)*IEEE80211_TX_MAX_RATES,</div><div class='del'>-		     tx_attempts);</div><div class='add'>+	if (nla_put(skb, HWSIM_ATTR_TX_INFO,</div><div class='add'>+		    sizeof(struct hwsim_tx_rate)*IEEE80211_TX_MAX_RATES,</div><div class='add'>+		    tx_attempts))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 	/* We create a cookie to identify this skb */</div><div class='del'>-	NLA_PUT_U64(skb, HWSIM_ATTR_COOKIE, (unsigned long) my_skb);</div><div class='add'>+	if (nla_put_u64(skb, HWSIM_ATTR_COOKIE, (unsigned long) my_skb))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 	genlmsg_end(skb, msg_head);</div><div class='ctx'> 	genlmsg_unicast(&amp;init_net, skb, dst_pid);</div><div class='hunk'>@@ -632,6 +637,7 @@ static bool mac80211_hwsim_tx_frame_no_nl(struct ieee80211_hw *hw,</div><div class='ctx'> 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb-&gt;data;</div><div class='ctx'> 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);</div><div class='ctx'> 	struct ieee80211_rx_status rx_status;</div><div class='add'>+	struct ieee80211_rate *txrate = ieee80211_get_tx_rate(hw, info);</div><div class='ctx'> </div><div class='ctx'> 	if (data-&gt;idle) {</div><div class='ctx'> 		wiphy_debug(hw-&gt;wiphy, "Trying to TX when idle - reject\n");</div><div class='hunk'>@@ -666,6 +672,7 @@ static bool mac80211_hwsim_tx_frame_no_nl(struct ieee80211_hw *hw,</div><div class='ctx'> 	spin_lock(&amp;hwsim_radio_lock);</div><div class='ctx'> 	list_for_each_entry(data2, &amp;hwsim_radios, list) {</div><div class='ctx'> 		struct sk_buff *nskb;</div><div class='add'>+		struct ieee80211_mgmt *mgmt;</div><div class='ctx'> </div><div class='ctx'> 		if (data == data2)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -683,8 +690,18 @@ static bool mac80211_hwsim_tx_frame_no_nl(struct ieee80211_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 		if (mac80211_hwsim_addr_match(data2, hdr-&gt;addr1))</div><div class='ctx'> 			ack = true;</div><div class='add'>+</div><div class='add'>+		/* set bcn timestamp relative to receiver mactime */</div><div class='ctx'> 		rx_status.mactime =</div><div class='del'>-			le64_to_cpu(__mac80211_hwsim_get_tsf(data2));</div><div class='add'>+				le64_to_cpu(__mac80211_hwsim_get_tsf(data2));</div><div class='add'>+		mgmt = (struct ieee80211_mgmt *) nskb-&gt;data;</div><div class='add'>+		if (ieee80211_is_beacon(mgmt-&gt;frame_control) ||</div><div class='add'>+		    ieee80211_is_probe_resp(mgmt-&gt;frame_control))</div><div class='add'>+			mgmt-&gt;u.beacon.timestamp = cpu_to_le64(</div><div class='add'>+				rx_status.mactime +</div><div class='add'>+				(data-&gt;tsf_offset - data2-&gt;tsf_offset) +</div><div class='add'>+				24 * 8 * 10 / txrate-&gt;bitrate);</div><div class='add'>+</div><div class='ctx'> 		memcpy(IEEE80211_SKB_RXCB(nskb), &amp;rx_status, sizeof(rx_status));</div><div class='ctx'> 		ieee80211_rx_irqsafe(data2-&gt;hw, nskb);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -698,12 +715,6 @@ static void mac80211_hwsim_tx(struct ieee80211_hw *hw, struct sk_buff *skb)</div><div class='ctx'> 	bool ack;</div><div class='ctx'> 	struct ieee80211_tx_info *txi;</div><div class='ctx'> 	u32 _pid;</div><div class='del'>-	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *) skb-&gt;data;</div><div class='del'>-	struct mac80211_hwsim_data *data = hw-&gt;priv;</div><div class='del'>-</div><div class='del'>-	if (ieee80211_is_beacon(mgmt-&gt;frame_control) ||</div><div class='del'>-	    ieee80211_is_probe_resp(mgmt-&gt;frame_control))</div><div class='del'>-		mgmt-&gt;u.beacon.timestamp = __mac80211_hwsim_get_tsf(data);</div><div class='ctx'> </div><div class='ctx'> 	mac80211_hwsim_monitor_rx(hw, skb);</div><div class='ctx'> </div><div class='hunk'>@@ -735,6 +746,11 @@ static void mac80211_hwsim_tx(struct ieee80211_hw *hw, struct sk_buff *skb)</div><div class='ctx'> 		hwsim_check_sta_magic(txi-&gt;control.sta);</div><div class='ctx'> </div><div class='ctx'> 	ieee80211_tx_info_clear_status(txi);</div><div class='add'>+</div><div class='add'>+	/* frame was transmitted at most favorable rate at first attempt */</div><div class='add'>+	txi-&gt;control.rates[0].count = 1;</div><div class='add'>+	txi-&gt;control.rates[1].idx = -1;</div><div class='add'>+</div><div class='ctx'> 	if (!(txi-&gt;flags &amp; IEEE80211_TX_CTL_NO_ACK) &amp;&amp; ack)</div><div class='ctx'> 		txi-&gt;flags |= IEEE80211_TX_STAT_ACK;</div><div class='ctx'> 	ieee80211_tx_status_irqsafe(hw, skb);</div><div class='hunk'>@@ -800,11 +816,9 @@ static void mac80211_hwsim_beacon_tx(void *arg, u8 *mac,</div><div class='ctx'> 				     struct ieee80211_vif *vif)</div><div class='ctx'> {</div><div class='ctx'> 	struct ieee80211_hw *hw = arg;</div><div class='del'>-	struct mac80211_hwsim_data *data = hw-&gt;priv;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct ieee80211_tx_info *info;</div><div class='ctx'> 	u32 _pid;</div><div class='del'>-	struct ieee80211_mgmt *mgmt;</div><div class='ctx'> </div><div class='ctx'> 	hwsim_check_magic(vif);</div><div class='ctx'> </div><div class='hunk'>@@ -818,9 +832,6 @@ static void mac80211_hwsim_beacon_tx(void *arg, u8 *mac,</div><div class='ctx'> 		return;</div><div class='ctx'> 	info = IEEE80211_SKB_CB(skb);</div><div class='ctx'> </div><div class='del'>-	mgmt = (struct ieee80211_mgmt *) skb-&gt;data;</div><div class='del'>-	mgmt-&gt;u.beacon.timestamp = __mac80211_hwsim_get_tsf(data);</div><div class='del'>-</div><div class='ctx'> 	mac80211_hwsim_monitor_rx(hw, skb);</div><div class='ctx'> </div><div class='ctx'> 	/* wmediumd mode check */</div><div class='hunk'>@@ -1108,7 +1119,8 @@ static int mac80211_hwsim_testmode_cmd(struct ieee80211_hw *hw,</div><div class='ctx'> 						nla_total_size(sizeof(u32)));</div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			return -ENOMEM;</div><div class='del'>-		NLA_PUT_U32(skb, HWSIM_TM_ATTR_PS, hwsim-&gt;ps);</div><div class='add'>+		if (nla_put_u32(skb, HWSIM_TM_ATTR_PS, hwsim-&gt;ps))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		return cfg80211_testmode_reply(skb);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -1444,7 +1456,7 @@ DEFINE_SIMPLE_ATTRIBUTE(hwsim_fops_group,</div><div class='ctx'> 			hwsim_fops_group_read, hwsim_fops_group_write,</div><div class='ctx'> 			"%llx\n");</div><div class='ctx'> </div><div class='del'>-struct mac80211_hwsim_data *get_hwsim_data_ref_from_addr(</div><div class='add'>+static struct mac80211_hwsim_data *get_hwsim_data_ref_from_addr(</div><div class='ctx'> 			     struct mac_address *addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct mac80211_hwsim_data *data;</div><div class='hunk'>@@ -1789,9 +1801,11 @@ static int __init init_mac80211_hwsim(void)</div><div class='ctx'> 			    IEEE80211_HW_SIGNAL_DBM |</div><div class='ctx'> 			    IEEE80211_HW_SUPPORTS_STATIC_SMPS |</div><div class='ctx'> 			    IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |</div><div class='del'>-			    IEEE80211_HW_AMPDU_AGGREGATION;</div><div class='add'>+			    IEEE80211_HW_AMPDU_AGGREGATION |</div><div class='add'>+			    IEEE80211_HW_WANT_MONITOR_VIF;</div><div class='ctx'> </div><div class='del'>-		hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_SUPPORTS_TDLS;</div><div class='add'>+		hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_SUPPORTS_TDLS |</div><div class='add'>+				    WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;</div><div class='ctx'> </div><div class='ctx'> 		/* ask mac80211 to reserve space for magic */</div><div class='ctx'> 		hw-&gt;vif_data_size = sizeof(struct hwsim_vif_priv);</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/11n.c b/drivers/net/wireless/mwifiex/11n.c<br/>index a5e182b5e944..fe8ebfebcc0e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/11n.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/11n.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/11n.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/11n.c</a></div><div class='hunk'>@@ -350,25 +350,26 @@ mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv,</div><div class='ctx'> 		ret_len += sizeof(struct mwifiex_ie_types_htcap);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (bss_desc-&gt;bcn_ht_info) {</div><div class='add'>+	if (bss_desc-&gt;bcn_ht_oper) {</div><div class='ctx'> 		if (priv-&gt;bss_mode == NL80211_IFTYPE_ADHOC) {</div><div class='ctx'> 			ht_info = (struct mwifiex_ie_types_htinfo *) *buffer;</div><div class='ctx'> 			memset(ht_info, 0,</div><div class='ctx'> 			       sizeof(struct mwifiex_ie_types_htinfo));</div><div class='ctx'> 			ht_info-&gt;header.type =</div><div class='del'>-					cpu_to_le16(WLAN_EID_HT_INFORMATION);</div><div class='add'>+					cpu_to_le16(WLAN_EID_HT_OPERATION);</div><div class='ctx'> 			ht_info-&gt;header.len =</div><div class='del'>-				cpu_to_le16(sizeof(struct ieee80211_ht_info));</div><div class='add'>+				cpu_to_le16(</div><div class='add'>+					sizeof(struct ieee80211_ht_operation));</div><div class='ctx'> </div><div class='ctx'> 			memcpy((u8 *) ht_info +</div><div class='ctx'> 			       sizeof(struct mwifiex_ie_types_header),</div><div class='del'>-			       (u8 *) bss_desc-&gt;bcn_ht_info +</div><div class='add'>+			       (u8 *) bss_desc-&gt;bcn_ht_oper +</div><div class='ctx'> 			       sizeof(struct ieee_types_header),</div><div class='ctx'> 			       le16_to_cpu(ht_info-&gt;header.len));</div><div class='ctx'> </div><div class='ctx'> 			if (!(sband-&gt;ht_cap.cap &amp;</div><div class='ctx'> 					IEEE80211_HT_CAP_SUP_WIDTH_20_40))</div><div class='del'>-				ht_info-&gt;ht_info.ht_param &amp;=</div><div class='add'>+				ht_info-&gt;ht_oper.ht_param &amp;=</div><div class='ctx'> 					~(IEEE80211_HT_PARAM_CHAN_WIDTH_ANY |</div><div class='ctx'> 					IEEE80211_HT_PARAM_CHA_SEC_OFFSET);</div><div class='ctx'> </div><div class='hunk'>@@ -385,16 +386,16 @@ mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv,</div><div class='ctx'> 			sizeof(struct mwifiex_ie_types_chan_list_param_set) -</div><div class='ctx'> 			sizeof(struct mwifiex_ie_types_header));</div><div class='ctx'> 		chan_list-&gt;chan_scan_param[0].chan_number =</div><div class='del'>-			bss_desc-&gt;bcn_ht_info-&gt;control_chan;</div><div class='add'>+			bss_desc-&gt;bcn_ht_oper-&gt;primary_chan;</div><div class='ctx'> 		chan_list-&gt;chan_scan_param[0].radio_type =</div><div class='ctx'> 			mwifiex_band_to_radio_type((u8) bss_desc-&gt;bss_band);</div><div class='ctx'> </div><div class='ctx'> 		if (sband-&gt;ht_cap.cap &amp; IEEE80211_HT_CAP_SUP_WIDTH_20_40 &amp;&amp;</div><div class='del'>-		    bss_desc-&gt;bcn_ht_info-&gt;ht_param &amp;</div><div class='add'>+		    bss_desc-&gt;bcn_ht_oper-&gt;ht_param &amp;</div><div class='ctx'> 		    IEEE80211_HT_PARAM_CHAN_WIDTH_ANY)</div><div class='ctx'> 			SET_SECONDARYCHAN(chan_list-&gt;chan_scan_param[0].</div><div class='ctx'> 					  radio_type,</div><div class='del'>-					  (bss_desc-&gt;bcn_ht_info-&gt;ht_param &amp;</div><div class='add'>+					  (bss_desc-&gt;bcn_ht_oper-&gt;ht_param &amp;</div><div class='ctx'> 					  IEEE80211_HT_PARAM_CHA_SEC_OFFSET));</div><div class='ctx'> </div><div class='ctx'> 		*buffer += sizeof(struct mwifiex_ie_types_chan_list_param_set);</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/11n_aggr.c b/drivers/net/wireless/mwifiex/11n_aggr.c<br/>index 9eefb2a0ce9f..ab84eb943749 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/11n_aggr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/11n_aggr.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/11n_aggr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/11n_aggr.c</a></div><div class='hunk'>@@ -233,21 +233,27 @@ mwifiex_11n_aggregate_pkt(struct mwifiex_private *priv,</div><div class='ctx'> </div><div class='ctx'> 	skb_push(skb_aggr, headroom);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Padding per MSDU will affect the length of next</div><div class='del'>-	 * packet and hence the exact length of next packet</div><div class='del'>-	 * is uncertain here.</div><div class='del'>-	 *</div><div class='del'>-	 * Also, aggregation of transmission buffer, while</div><div class='del'>-	 * downloading the data to the card, wont gain much</div><div class='del'>-	 * on the AMSDU packets as the AMSDU packets utilizes</div><div class='del'>-	 * the transmission buffer space to the maximum</div><div class='del'>-	 * (adapter-&gt;tx_buf_size).</div><div class='del'>-	 */</div><div class='del'>-	tx_param.next_pkt_len = 0;</div><div class='del'>-</div><div class='del'>-	ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_TYPE_DATA,</div><div class='del'>-					   skb_aggr, &amp;tx_param);</div><div class='add'>+	if (adapter-&gt;iface_type == MWIFIEX_USB) {</div><div class='add'>+		adapter-&gt;data_sent = true;</div><div class='add'>+		ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_USB_EP_DATA,</div><div class='add'>+						   skb_aggr, NULL);</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * Padding per MSDU will affect the length of next</div><div class='add'>+		 * packet and hence the exact length of next packet</div><div class='add'>+		 * is uncertain here.</div><div class='add'>+		 *</div><div class='add'>+		 * Also, aggregation of transmission buffer, while</div><div class='add'>+		 * downloading the data to the card, wont gain much</div><div class='add'>+		 * on the AMSDU packets as the AMSDU packets utilizes</div><div class='add'>+		 * the transmission buffer space to the maximum</div><div class='add'>+		 * (adapter-&gt;tx_buf_size).</div><div class='add'>+		 */</div><div class='add'>+		tx_param.next_pkt_len = 0;</div><div class='add'>+</div><div class='add'>+		ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_TYPE_DATA,</div><div class='add'>+						   skb_aggr, &amp;tx_param);</div><div class='add'>+	}</div><div class='ctx'> 	switch (ret) {</div><div class='ctx'> 	case -EBUSY:</div><div class='ctx'> 		spin_lock_irqsave(&amp;priv-&gt;wmm.ra_list_spinlock, ra_list_flags);</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/Kconfig b/drivers/net/wireless/mwifiex/Kconfig<br/>index 2a078cea830a..8e384fae3e68 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/Kconfig</a></div><div class='hunk'>@@ -10,12 +10,12 @@ config MWIFIEX</div><div class='ctx'> 	  mwifiex.</div><div class='ctx'> </div><div class='ctx'> config MWIFIEX_SDIO</div><div class='del'>-	tristate "Marvell WiFi-Ex Driver for SD8787/SD8797"</div><div class='add'>+	tristate "Marvell WiFi-Ex Driver for SD8786/SD8787/SD8797"</div><div class='ctx'> 	depends on MWIFIEX &amp;&amp; MMC</div><div class='ctx'> 	select FW_LOADER</div><div class='ctx'> 	---help---</div><div class='ctx'> 	  This adds support for wireless adapters based on Marvell</div><div class='del'>-	  8787/8797 chipsets with SDIO interface.</div><div class='add'>+	  8786/8787/8797 chipsets with SDIO interface.</div><div class='ctx'> </div><div class='ctx'> 	  If you choose to build it as a module, it will be called</div><div class='ctx'> 	  mwifiex_sdio.</div><div class='hunk'>@@ -30,3 +30,14 @@ config MWIFIEX_PCIE</div><div class='ctx'> </div><div class='ctx'> 	  If you choose to build it as a module, it will be called</div><div class='ctx'> 	  mwifiex_pcie.</div><div class='add'>+</div><div class='add'>+config MWIFIEX_USB</div><div class='add'>+	tristate "Marvell WiFi-Ex Driver for USB8797"</div><div class='add'>+	depends on MWIFIEX &amp;&amp; USB</div><div class='add'>+	select FW_LOADER</div><div class='add'>+	---help---</div><div class='add'>+	  This adds support for wireless adapters based on Marvell</div><div class='add'>+	  Avastar 88W8797 chipset with USB interface.</div><div class='add'>+</div><div class='add'>+	  If you choose to build it as a module, it will be called</div><div class='add'>+	  mwifiex_usb.</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/Makefile b/drivers/net/wireless/mwifiex/Makefile<br/>index b0257ad1bbed..3f66ebb0a630 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/Makefile</a></div><div class='hunk'>@@ -29,6 +29,8 @@ mwifiex-y += scan.o</div><div class='ctx'> mwifiex-y += join.o</div><div class='ctx'> mwifiex-y += sta_ioctl.o</div><div class='ctx'> mwifiex-y += sta_cmd.o</div><div class='add'>+mwifiex-y += uap_cmd.o</div><div class='add'>+mwifiex-y += ie.o</div><div class='ctx'> mwifiex-y += sta_cmdresp.o</div><div class='ctx'> mwifiex-y += sta_event.o</div><div class='ctx'> mwifiex-y += sta_tx.o</div><div class='hunk'>@@ -42,3 +44,6 @@ obj-$(CONFIG_MWIFIEX_SDIO) += mwifiex_sdio.o</div><div class='ctx'> </div><div class='ctx'> mwifiex_pcie-y += pcie.o</div><div class='ctx'> obj-$(CONFIG_MWIFIEX_PCIE) += mwifiex_pcie.o</div><div class='add'>+</div><div class='add'>+mwifiex_usb-y += usb.o</div><div class='add'>+obj-$(CONFIG_MWIFIEX_USB) += mwifiex_usb.o</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/cfg80211.c b/drivers/net/wireless/mwifiex/cfg80211.c<br/>index 65050384c42b..87671446e24b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/cfg80211.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/cfg80211.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/cfg80211.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/cfg80211.c</a></div><div class='hunk'>@@ -20,6 +20,23 @@</div><div class='ctx'> #include "cfg80211.h"</div><div class='ctx'> #include "main.h"</div><div class='ctx'> </div><div class='add'>+static const struct ieee80211_iface_limit mwifiex_ap_sta_limits[] = {</div><div class='add'>+	{</div><div class='add'>+		.max = 1, .types = BIT(NL80211_IFTYPE_STATION),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.max = 1, .types = BIT(NL80211_IFTYPE_AP),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ieee80211_iface_combination mwifiex_iface_comb_ap_sta = {</div><div class='add'>+	.limits = mwifiex_ap_sta_limits,</div><div class='add'>+	.num_different_channels = 1,</div><div class='add'>+	.n_limits = ARRAY_SIZE(mwifiex_ap_sta_limits),</div><div class='add'>+	.max_interfaces = MWIFIEX_MAX_BSS_NUM,</div><div class='add'>+	.beacon_int_infra_match = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This function maps the nl802.11 channel type into driver channel type.</div><div class='ctx'>  *</div><div class='hunk'>@@ -67,7 +84,7 @@ mwifiex_is_alg_wep(u32 cipher)</div><div class='ctx'> /*</div><div class='ctx'>  * This function retrieves the private structure from kernel wiphy structure.</div><div class='ctx'>  */</div><div class='del'>-static void *mwifiex_cfg80211_get_priv(struct wiphy *wiphy)</div><div class='add'>+static void *mwifiex_cfg80211_get_adapter(struct wiphy *wiphy)</div><div class='ctx'> {</div><div class='ctx'> 	return (void *) (*(unsigned long *) wiphy_priv(wiphy));</div><div class='ctx'> }</div><div class='hunk'>@@ -80,8 +97,10 @@ mwifiex_cfg80211_del_key(struct wiphy *wiphy, struct net_device *netdev,</div><div class='ctx'> 			 u8 key_index, bool pairwise, const u8 *mac_addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct mwifiex_private *priv = mwifiex_netdev_get_priv(netdev);</div><div class='add'>+	const u8 bc_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};</div><div class='add'>+	const u8 *peer_mac = pairwise ? mac_addr : bc_mac;</div><div class='ctx'> </div><div class='del'>-	if (mwifiex_set_encode(priv, NULL, 0, key_index, 1)) {</div><div class='add'>+	if (mwifiex_set_encode(priv, NULL, 0, key_index, peer_mac, 1)) {</div><div class='ctx'> 		wiphy_err(wiphy, "deleting the crypto keys\n");</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -98,7 +117,8 @@ mwifiex_cfg80211_set_tx_power(struct wiphy *wiphy,</div><div class='ctx'> 			      enum nl80211_tx_power_setting type,</div><div class='ctx'> 			      int mbm)</div><div class='ctx'> {</div><div class='del'>-	struct mwifiex_private *priv = mwifiex_cfg80211_get_priv(wiphy);</div><div class='add'>+	struct mwifiex_adapter *adapter = mwifiex_cfg80211_get_adapter(wiphy);</div><div class='add'>+	struct mwifiex_private *priv;</div><div class='ctx'> 	struct mwifiex_power_cfg power_cfg;</div><div class='ctx'> 	int dbm = MBM_TO_DBM(mbm);</div><div class='ctx'> </div><div class='hunk'>@@ -109,6 +129,8 @@ mwifiex_cfg80211_set_tx_power(struct wiphy *wiphy,</div><div class='ctx'> 		power_cfg.is_power_auto = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);</div><div class='add'>+</div><div class='ctx'> 	return mwifiex_set_tx_power(priv, &amp;power_cfg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -148,7 +170,7 @@ mwifiex_cfg80211_set_default_key(struct wiphy *wiphy, struct net_device *netdev,</div><div class='ctx'> 	if (!priv-&gt;sec_info.wep_enabled)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (mwifiex_set_encode(priv, NULL, 0, key_index, 0)) {</div><div class='add'>+	if (mwifiex_set_encode(priv, NULL, 0, key_index, NULL, 0)) {</div><div class='ctx'> 		wiphy_err(wiphy, "set default Tx key index\n");</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -165,9 +187,11 @@ mwifiex_cfg80211_add_key(struct wiphy *wiphy, struct net_device *netdev,</div><div class='ctx'> 			 struct key_params *params)</div><div class='ctx'> {</div><div class='ctx'> 	struct mwifiex_private *priv = mwifiex_netdev_get_priv(netdev);</div><div class='add'>+	const u8 bc_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};</div><div class='add'>+	const u8 *peer_mac = pairwise ? mac_addr : bc_mac;</div><div class='ctx'> </div><div class='ctx'> 	if (mwifiex_set_encode(priv, params-&gt;key, params-&gt;key_len,</div><div class='del'>-			       key_index, 0)) {</div><div class='add'>+			       key_index, peer_mac, 0)) {</div><div class='ctx'> 		wiphy_err(wiphy, "crypto keys added\n");</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -192,13 +216,13 @@ static int mwifiex_send_domain_info_cmd_fw(struct wiphy *wiphy)</div><div class='ctx'> 	enum ieee80211_band band;</div><div class='ctx'> 	struct ieee80211_supported_band *sband;</div><div class='ctx'> 	struct ieee80211_channel *ch;</div><div class='del'>-	struct mwifiex_private *priv = mwifiex_cfg80211_get_priv(wiphy);</div><div class='del'>-	struct mwifiex_adapter *adapter = priv-&gt;adapter;</div><div class='add'>+	struct mwifiex_adapter *adapter = mwifiex_cfg80211_get_adapter(wiphy);</div><div class='add'>+	struct mwifiex_private *priv;</div><div class='ctx'> 	struct mwifiex_802_11d_domain_reg *domain_info = &amp;adapter-&gt;domain_reg;</div><div class='ctx'> </div><div class='ctx'> 	/* Set country code */</div><div class='del'>-	domain_info-&gt;country_code[0] = priv-&gt;country_code[0];</div><div class='del'>-	domain_info-&gt;country_code[1] = priv-&gt;country_code[1];</div><div class='add'>+	domain_info-&gt;country_code[0] = adapter-&gt;country_code[0];</div><div class='add'>+	domain_info-&gt;country_code[1] = adapter-&gt;country_code[1];</div><div class='ctx'> 	domain_info-&gt;country_code[2] = ' ';</div><div class='ctx'> </div><div class='ctx'> 	band = mwifiex_band_to_radio_type(adapter-&gt;config_bands);</div><div class='hunk'>@@ -250,6 +274,8 @@ static int mwifiex_send_domain_info_cmd_fw(struct wiphy *wiphy)</div><div class='ctx'> </div><div class='ctx'> 	domain_info-&gt;no_of_triplet = no_of_triplet;</div><div class='ctx'> </div><div class='add'>+	priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);</div><div class='add'>+</div><div class='ctx'> 	if (mwifiex_send_cmd_async(priv, HostCmd_CMD_802_11D_DOMAIN_INFO,</div><div class='ctx'> 				   HostCmd_ACT_GEN_SET, 0, NULL)) {</div><div class='ctx'> 		wiphy_err(wiphy, "11D: setting domain info in FW\n");</div><div class='hunk'>@@ -272,12 +298,12 @@ static int mwifiex_send_domain_info_cmd_fw(struct wiphy *wiphy)</div><div class='ctx'> static int mwifiex_reg_notifier(struct wiphy *wiphy,</div><div class='ctx'> 				struct regulatory_request *request)</div><div class='ctx'> {</div><div class='del'>-	struct mwifiex_private *priv = mwifiex_cfg80211_get_priv(wiphy);</div><div class='add'>+	struct mwifiex_adapter *adapter = mwifiex_cfg80211_get_adapter(wiphy);</div><div class='ctx'> </div><div class='del'>-	wiphy_dbg(wiphy, "info: cfg80211 regulatory domain callback for domain"</div><div class='del'>-			" %c%c\n", request-&gt;alpha2[0], request-&gt;alpha2[1]);</div><div class='add'>+	wiphy_dbg(wiphy, "info: cfg80211 regulatory domain callback for %c%c\n",</div><div class='add'>+		  request-&gt;alpha2[0], request-&gt;alpha2[1]);</div><div class='ctx'> </div><div class='del'>-	memcpy(priv-&gt;country_code, request-&gt;alpha2, sizeof(request-&gt;alpha2));</div><div class='add'>+	memcpy(adapter-&gt;country_code, request-&gt;alpha2, sizeof(request-&gt;alpha2));</div><div class='ctx'> </div><div class='ctx'> 	switch (request-&gt;initiator) {</div><div class='ctx'> 	case NL80211_REGDOM_SET_BY_DRIVER:</div><div class='hunk'>@@ -361,33 +387,10 @@ mwifiex_set_rf_channel(struct mwifiex_private *priv,</div><div class='ctx'> 	if (mwifiex_bss_set_channel(priv, &amp;cfp))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	return mwifiex_drv_change_adhoc_chan(priv, cfp.channel);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * CFG802.11 operation handler to set channel.</div><div class='del'>- *</div><div class='del'>- * This function can only be used when station is not connected.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-mwifiex_cfg80211_set_channel(struct wiphy *wiphy, struct net_device *dev,</div><div class='del'>-			     struct ieee80211_channel *chan,</div><div class='del'>-			     enum nl80211_channel_type channel_type)</div><div class='del'>-{</div><div class='del'>-	struct mwifiex_private *priv;</div><div class='del'>-</div><div class='del'>-	if (dev)</div><div class='del'>-		priv = mwifiex_netdev_get_priv(dev);</div><div class='add'>+	if (priv-&gt;bss_type == MWIFIEX_BSS_TYPE_STA)</div><div class='add'>+		return mwifiex_drv_change_adhoc_chan(priv, cfp.channel);</div><div class='ctx'> 	else</div><div class='del'>-		priv = mwifiex_cfg80211_get_priv(wiphy);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;media_connected) {</div><div class='del'>-		wiphy_err(wiphy, "This setting is valid only when station "</div><div class='del'>-				"is not connected\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return mwifiex_set_rf_channel(priv, chan, channel_type);</div><div class='add'>+		return mwifiex_uap_set_channel(priv, cfp.channel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -399,18 +402,13 @@ mwifiex_cfg80211_set_channel(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> static int</div><div class='ctx'> mwifiex_set_frag(struct mwifiex_private *priv, u32 frag_thr)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='ctx'> 	if (frag_thr &lt; MWIFIEX_FRAG_MIN_VALUE ||</div><div class='ctx'> 	    frag_thr &gt; MWIFIEX_FRAG_MAX_VALUE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* Send request to firmware */</div><div class='del'>-	ret = mwifiex_send_cmd_sync(priv, HostCmd_CMD_802_11_SNMP_MIB,</div><div class='del'>-				    HostCmd_ACT_GEN_SET, FRAG_THRESH_I,</div><div class='del'>-				    &amp;frag_thr);</div><div class='add'>+		frag_thr = MWIFIEX_FRAG_MAX_VALUE;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return mwifiex_send_cmd_sync(priv, HostCmd_CMD_802_11_SNMP_MIB,</div><div class='add'>+				     HostCmd_ACT_GEN_SET, FRAG_THRESH_I,</div><div class='add'>+				     &amp;frag_thr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -439,19 +437,85 @@ mwifiex_set_rts(struct mwifiex_private *priv, u32 rts_thr)</div><div class='ctx'> static int</div><div class='ctx'> mwifiex_cfg80211_set_wiphy_params(struct wiphy *wiphy, u32 changed)</div><div class='ctx'> {</div><div class='del'>-	struct mwifiex_private *priv = mwifiex_cfg80211_get_priv(wiphy);</div><div class='del'>-	int ret = 0;</div><div class='add'>+	struct mwifiex_adapter *adapter = mwifiex_cfg80211_get_adapter(wiphy);</div><div class='add'>+	struct mwifiex_private *priv;</div><div class='add'>+	struct mwifiex_uap_bss_param *bss_cfg;</div><div class='add'>+	int ret, bss_started, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;priv_num; i++) {</div><div class='add'>+		priv = adapter-&gt;priv[i];</div><div class='add'>+</div><div class='add'>+		switch (priv-&gt;bss_role) {</div><div class='add'>+		case MWIFIEX_BSS_ROLE_UAP:</div><div class='add'>+			bss_cfg = kzalloc(sizeof(struct mwifiex_uap_bss_param),</div><div class='add'>+					  GFP_KERNEL);</div><div class='add'>+			if (!bss_cfg)</div><div class='add'>+				return -ENOMEM;</div><div class='add'>+</div><div class='add'>+			mwifiex_set_sys_config_invalid_data(bss_cfg);</div><div class='add'>+</div><div class='add'>+			if (changed &amp; WIPHY_PARAM_RTS_THRESHOLD)</div><div class='add'>+				bss_cfg-&gt;rts_threshold = wiphy-&gt;rts_threshold;</div><div class='add'>+			if (changed &amp; WIPHY_PARAM_FRAG_THRESHOLD)</div><div class='add'>+				bss_cfg-&gt;frag_threshold = wiphy-&gt;frag_threshold;</div><div class='add'>+			if (changed &amp; WIPHY_PARAM_RETRY_LONG)</div><div class='add'>+				bss_cfg-&gt;retry_limit = wiphy-&gt;retry_long;</div><div class='add'>+</div><div class='add'>+			bss_started = priv-&gt;bss_started;</div><div class='add'>+</div><div class='add'>+			ret = mwifiex_send_cmd_sync(priv,</div><div class='add'>+						    HostCmd_CMD_UAP_BSS_STOP,</div><div class='add'>+						    HostCmd_ACT_GEN_SET, 0,</div><div class='add'>+						    NULL);</div><div class='add'>+			if (ret) {</div><div class='add'>+				wiphy_err(wiphy, "Failed to stop the BSS\n");</div><div class='add'>+				kfree(bss_cfg);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-	if (changed &amp; WIPHY_PARAM_RTS_THRESHOLD) {</div><div class='del'>-		ret = mwifiex_set_rts(priv, wiphy-&gt;rts_threshold);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='add'>+			ret = mwifiex_send_cmd_async(priv,</div><div class='add'>+						     HostCmd_CMD_UAP_SYS_CONFIG,</div><div class='add'>+						     HostCmd_ACT_GEN_SET,</div><div class='add'>+						     UAP_BSS_PARAMS_I, bss_cfg);</div><div class='ctx'> </div><div class='del'>-	if (changed &amp; WIPHY_PARAM_FRAG_THRESHOLD)</div><div class='del'>-		ret = mwifiex_set_frag(priv, wiphy-&gt;frag_threshold);</div><div class='add'>+			kfree(bss_cfg);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+			if (ret) {</div><div class='add'>+				wiphy_err(wiphy, "Failed to set bss config\n");</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (!bss_started)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			ret = mwifiex_send_cmd_async(priv,</div><div class='add'>+						     HostCmd_CMD_UAP_BSS_START,</div><div class='add'>+						     HostCmd_ACT_GEN_SET, 0,</div><div class='add'>+						     NULL);</div><div class='add'>+			if (ret) {</div><div class='add'>+				wiphy_err(wiphy, "Failed to start BSS\n");</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		case MWIFIEX_BSS_ROLE_STA:</div><div class='add'>+			if (changed &amp; WIPHY_PARAM_RTS_THRESHOLD) {</div><div class='add'>+				ret = mwifiex_set_rts(priv,</div><div class='add'>+						      wiphy-&gt;rts_threshold);</div><div class='add'>+				if (ret)</div><div class='add'>+					return ret;</div><div class='add'>+			}</div><div class='add'>+			if (changed &amp; WIPHY_PARAM_FRAG_THRESHOLD) {</div><div class='add'>+				ret = mwifiex_set_frag(priv,</div><div class='add'>+						       wiphy-&gt;frag_threshold);</div><div class='add'>+				if (ret)</div><div class='add'>+					return ret;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -466,31 +530,59 @@ mwifiex_cfg80211_change_virtual_intf(struct wiphy *wiphy,</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct mwifiex_private *priv = mwifiex_netdev_get_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;bss_mode == type) {</div><div class='del'>-		wiphy_warn(wiphy, "already set to required type\n");</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;bss_mode = type;</div><div class='del'>-</div><div class='del'>-	switch (type) {</div><div class='add'>+	switch (dev-&gt;ieee80211_ptr-&gt;iftype) {</div><div class='ctx'> 	case NL80211_IFTYPE_ADHOC:</div><div class='del'>-		dev-&gt;ieee80211_ptr-&gt;iftype = NL80211_IFTYPE_ADHOC;</div><div class='del'>-		wiphy_dbg(wiphy, "info: setting interface type to adhoc\n");</div><div class='add'>+		switch (type) {</div><div class='add'>+		case NL80211_IFTYPE_STATION:</div><div class='add'>+			break;</div><div class='add'>+		case NL80211_IFTYPE_UNSPECIFIED:</div><div class='add'>+			wiphy_warn(wiphy, "%s: kept type as IBSS\n", dev-&gt;name);</div><div class='add'>+		case NL80211_IFTYPE_ADHOC:	/* This shouldn't happen */</div><div class='add'>+			return 0;</div><div class='add'>+		case NL80211_IFTYPE_AP:</div><div class='add'>+		default:</div><div class='add'>+			wiphy_err(wiphy, "%s: changing to %d not supported\n",</div><div class='add'>+				  dev-&gt;name, type);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NL80211_IFTYPE_STATION:</div><div class='del'>-		dev-&gt;ieee80211_ptr-&gt;iftype = NL80211_IFTYPE_STATION;</div><div class='del'>-		wiphy_dbg(wiphy, "info: setting interface type to managed\n");</div><div class='add'>+		switch (type) {</div><div class='add'>+		case NL80211_IFTYPE_ADHOC:</div><div class='add'>+			break;</div><div class='add'>+		case NL80211_IFTYPE_UNSPECIFIED:</div><div class='add'>+			wiphy_warn(wiphy, "%s: kept type as STA\n", dev-&gt;name);</div><div class='add'>+		case NL80211_IFTYPE_STATION:	/* This shouldn't happen */</div><div class='add'>+			return 0;</div><div class='add'>+		case NL80211_IFTYPE_AP:</div><div class='add'>+		default:</div><div class='add'>+			wiphy_err(wiphy, "%s: changing to %d not supported\n",</div><div class='add'>+				  dev-&gt;name, type);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case NL80211_IFTYPE_AP:</div><div class='add'>+		switch (type) {</div><div class='add'>+		case NL80211_IFTYPE_UNSPECIFIED:</div><div class='add'>+			wiphy_warn(wiphy, "%s: kept type as AP\n", dev-&gt;name);</div><div class='add'>+		case NL80211_IFTYPE_AP:		/* This shouldn't happen */</div><div class='add'>+			return 0;</div><div class='add'>+		case NL80211_IFTYPE_ADHOC:</div><div class='add'>+		case NL80211_IFTYPE_STATION:</div><div class='add'>+		default:</div><div class='add'>+			wiphy_err(wiphy, "%s: changing to %d not supported\n",</div><div class='add'>+				  dev-&gt;name, type);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='del'>-	case NL80211_IFTYPE_UNSPECIFIED:</div><div class='del'>-		dev-&gt;ieee80211_ptr-&gt;iftype = NL80211_IFTYPE_STATION;</div><div class='del'>-		wiphy_dbg(wiphy, "info: setting interface type to auto\n");</div><div class='del'>-		return 0;</div><div class='ctx'> 	default:</div><div class='del'>-		wiphy_err(wiphy, "unknown interface type: %d\n", type);</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		wiphy_err(wiphy, "%s: unknown iftype: %d\n",</div><div class='add'>+			  dev-&gt;name, dev-&gt;ieee80211_ptr-&gt;iftype);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	dev-&gt;ieee80211_ptr-&gt;iftype = type;</div><div class='add'>+	priv-&gt;bss_mode = type;</div><div class='ctx'> 	mwifiex_deauthenticate(priv, NULL);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;sec_info.authentication_mode = NL80211_AUTHTYPE_OPEN_SYSTEM;</div><div class='hunk'>@@ -516,25 +608,23 @@ static int</div><div class='ctx'> mwifiex_dump_station_info(struct mwifiex_private *priv,</div><div class='ctx'> 			  struct station_info *sinfo)</div><div class='ctx'> {</div><div class='del'>-	struct mwifiex_ds_get_signal signal;</div><div class='ctx'> 	struct mwifiex_rate_cfg rate;</div><div class='del'>-	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	sinfo-&gt;filled = STATION_INFO_RX_BYTES | STATION_INFO_TX_BYTES |</div><div class='del'>-		STATION_INFO_RX_PACKETS |</div><div class='del'>-		STATION_INFO_TX_PACKETS</div><div class='del'>-		| STATION_INFO_SIGNAL | STATION_INFO_TX_BITRATE;</div><div class='add'>+			STATION_INFO_RX_PACKETS | STATION_INFO_TX_PACKETS |</div><div class='add'>+			STATION_INFO_TX_BITRATE |</div><div class='add'>+			STATION_INFO_SIGNAL | STATION_INFO_SIGNAL_AVG;</div><div class='ctx'> </div><div class='ctx'> 	/* Get signal information from the firmware */</div><div class='del'>-	memset(&amp;signal, 0, sizeof(struct mwifiex_ds_get_signal));</div><div class='del'>-	if (mwifiex_get_signal_info(priv, &amp;signal)) {</div><div class='del'>-		dev_err(priv-&gt;adapter-&gt;dev, "getting signal information\n");</div><div class='del'>-		ret = -EFAULT;</div><div class='add'>+	if (mwifiex_send_cmd_sync(priv, HostCmd_CMD_RSSI_INFO,</div><div class='add'>+				  HostCmd_ACT_GEN_GET, 0, NULL)) {</div><div class='add'>+		dev_err(priv-&gt;adapter-&gt;dev, "failed to get signal information\n");</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (mwifiex_drv_get_data_rate(priv, &amp;rate)) {</div><div class='ctx'> 		dev_err(priv-&gt;adapter-&gt;dev, "getting data rate\n");</div><div class='del'>-		ret = -EFAULT;</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Get DTIM period information from firmware */</div><div class='hunk'>@@ -557,11 +647,12 @@ mwifiex_dump_station_info(struct mwifiex_private *priv,</div><div class='ctx'> 			sinfo-&gt;txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	sinfo-&gt;signal_avg = priv-&gt;bcn_rssi_avg;</div><div class='ctx'> 	sinfo-&gt;rx_bytes = priv-&gt;stats.rx_bytes;</div><div class='ctx'> 	sinfo-&gt;tx_bytes = priv-&gt;stats.tx_bytes;</div><div class='ctx'> 	sinfo-&gt;rx_packets = priv-&gt;stats.rx_packets;</div><div class='ctx'> 	sinfo-&gt;tx_packets = priv-&gt;stats.tx_packets;</div><div class='del'>-	sinfo-&gt;signal = priv-&gt;qual_level;</div><div class='add'>+	sinfo-&gt;signal = priv-&gt;bcn_rssi_avg;</div><div class='ctx'> 	/* bit rate is in 500 kb/s units. Convert it to 100kb/s units */</div><div class='ctx'> 	sinfo-&gt;txrate.legacy = rate.rate * 5;</div><div class='ctx'> </div><div class='hunk'>@@ -581,7 +672,7 @@ mwifiex_dump_station_info(struct mwifiex_private *priv,</div><div class='ctx'> 			priv-&gt;curr_bss_params.bss_descriptor.beacon_period;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -604,6 +695,23 @@ mwifiex_cfg80211_get_station(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> 	return mwifiex_dump_station_info(priv, sinfo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * CFG802.11 operation handler to dump station information.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+mwifiex_cfg80211_dump_station(struct wiphy *wiphy, struct net_device *dev,</div><div class='add'>+			      int idx, u8 *mac, struct station_info *sinfo)</div><div class='add'>+{</div><div class='add'>+	struct mwifiex_private *priv = mwifiex_netdev_get_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;media_connected || idx)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	memcpy(mac, priv-&gt;cfg_bssid, ETH_ALEN);</div><div class='add'>+</div><div class='add'>+	return mwifiex_dump_station_info(priv, sinfo);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Supported rates to be advertised to the cfg80211 */</div><div class='ctx'> </div><div class='ctx'> static struct ieee80211_rate mwifiex_rates[] = {</div><div class='hunk'>@@ -750,6 +858,129 @@ static int mwifiex_cfg80211_set_bitrate_mask(struct wiphy *wiphy,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * CFG802.11 operation handler for connection quality monitoring.</div><div class='add'>+ *</div><div class='add'>+ * This function subscribes/unsubscribes HIGH_RSSI and LOW_RSSI</div><div class='add'>+ * events to FW.</div><div class='add'>+ */</div><div class='add'>+static int mwifiex_cfg80211_set_cqm_rssi_config(struct wiphy *wiphy,</div><div class='add'>+						struct net_device *dev,</div><div class='add'>+						s32 rssi_thold, u32 rssi_hyst)</div><div class='add'>+{</div><div class='add'>+	struct mwifiex_private *priv = mwifiex_netdev_get_priv(dev);</div><div class='add'>+	struct mwifiex_ds_misc_subsc_evt subsc_evt;</div><div class='add'>+</div><div class='add'>+	priv-&gt;cqm_rssi_thold = rssi_thold;</div><div class='add'>+	priv-&gt;cqm_rssi_hyst = rssi_hyst;</div><div class='add'>+</div><div class='add'>+	memset(&amp;subsc_evt, 0x00, sizeof(struct mwifiex_ds_misc_subsc_evt));</div><div class='add'>+	subsc_evt.events = BITMASK_BCN_RSSI_LOW | BITMASK_BCN_RSSI_HIGH;</div><div class='add'>+</div><div class='add'>+	/* Subscribe/unsubscribe low and high rssi events */</div><div class='add'>+	if (rssi_thold &amp;&amp; rssi_hyst) {</div><div class='add'>+		subsc_evt.action = HostCmd_ACT_BITWISE_SET;</div><div class='add'>+		subsc_evt.bcn_l_rssi_cfg.abs_value = abs(rssi_thold);</div><div class='add'>+		subsc_evt.bcn_h_rssi_cfg.abs_value = abs(rssi_thold);</div><div class='add'>+		subsc_evt.bcn_l_rssi_cfg.evt_freq = 1;</div><div class='add'>+		subsc_evt.bcn_h_rssi_cfg.evt_freq = 1;</div><div class='add'>+		return mwifiex_send_cmd_sync(priv,</div><div class='add'>+					     HostCmd_CMD_802_11_SUBSCRIBE_EVENT,</div><div class='add'>+					     0, 0, &amp;subsc_evt);</div><div class='add'>+	} else {</div><div class='add'>+		subsc_evt.action = HostCmd_ACT_BITWISE_CLR;</div><div class='add'>+		return mwifiex_send_cmd_sync(priv,</div><div class='add'>+					     HostCmd_CMD_802_11_SUBSCRIBE_EVENT,</div><div class='add'>+					     0, 0, &amp;subsc_evt);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* cfg80211 operation handler for stop ap.</div><div class='add'>+ * Function stops BSS running at uAP interface.</div><div class='add'>+ */</div><div class='add'>+static int mwifiex_cfg80211_stop_ap(struct wiphy *wiphy, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mwifiex_private *priv = mwifiex_netdev_get_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (mwifiex_del_mgmt_ies(priv))</div><div class='add'>+		wiphy_err(wiphy, "Failed to delete mgmt IEs!\n");</div><div class='add'>+</div><div class='add'>+	if (mwifiex_send_cmd_sync(priv, HostCmd_CMD_UAP_BSS_STOP,</div><div class='add'>+				  HostCmd_ACT_GEN_SET, 0, NULL)) {</div><div class='add'>+		wiphy_err(wiphy, "Failed to stop the BSS\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* cfg80211 operation handler for start_ap.</div><div class='add'>+ * Function sets beacon period, DTIM period, SSID and security into</div><div class='add'>+ * AP config structure.</div><div class='add'>+ * AP is configured with these settings and BSS is started.</div><div class='add'>+ */</div><div class='add'>+static int mwifiex_cfg80211_start_ap(struct wiphy *wiphy,</div><div class='add'>+				     struct net_device *dev,</div><div class='add'>+				     struct cfg80211_ap_settings *params)</div><div class='add'>+{</div><div class='add'>+	struct mwifiex_uap_bss_param *bss_cfg;</div><div class='add'>+	struct mwifiex_private *priv = mwifiex_netdev_get_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;bss_type != MWIFIEX_BSS_TYPE_UAP)</div><div class='add'>+		return -1;</div><div class='add'>+	if (mwifiex_set_mgmt_ies(priv, params))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	bss_cfg = kzalloc(sizeof(struct mwifiex_uap_bss_param), GFP_KERNEL);</div><div class='add'>+	if (!bss_cfg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mwifiex_set_sys_config_invalid_data(bss_cfg);</div><div class='add'>+</div><div class='add'>+	if (params-&gt;beacon_interval)</div><div class='add'>+		bss_cfg-&gt;beacon_period = params-&gt;beacon_interval;</div><div class='add'>+	if (params-&gt;dtim_period)</div><div class='add'>+		bss_cfg-&gt;dtim_period = params-&gt;dtim_period;</div><div class='add'>+</div><div class='add'>+	if (params-&gt;ssid &amp;&amp; params-&gt;ssid_len) {</div><div class='add'>+		memcpy(bss_cfg-&gt;ssid.ssid, params-&gt;ssid, params-&gt;ssid_len);</div><div class='add'>+		bss_cfg-&gt;ssid.ssid_len = params-&gt;ssid_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mwifiex_set_secure_params(priv, bss_cfg, params)) {</div><div class='add'>+		kfree(bss_cfg);</div><div class='add'>+		wiphy_err(wiphy, "Failed to parse secuirty parameters!\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mwifiex_send_cmd_sync(priv, HostCmd_CMD_UAP_BSS_STOP,</div><div class='add'>+				  HostCmd_ACT_GEN_SET, 0, NULL)) {</div><div class='add'>+		wiphy_err(wiphy, "Failed to stop the BSS\n");</div><div class='add'>+		kfree(bss_cfg);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mwifiex_send_cmd_async(priv, HostCmd_CMD_UAP_SYS_CONFIG,</div><div class='add'>+				   HostCmd_ACT_GEN_SET,</div><div class='add'>+				   UAP_BSS_PARAMS_I, bss_cfg)) {</div><div class='add'>+		wiphy_err(wiphy, "Failed to set the SSID\n");</div><div class='add'>+		kfree(bss_cfg);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(bss_cfg);</div><div class='add'>+</div><div class='add'>+	if (mwifiex_send_cmd_async(priv, HostCmd_CMD_UAP_BSS_START,</div><div class='add'>+				   HostCmd_ACT_GEN_SET, 0, NULL)) {</div><div class='add'>+		wiphy_err(wiphy, "Failed to start the BSS\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * CFG802.11 operation handler for disconnection request.</div><div class='ctx'>  *</div><div class='ctx'>  * This function does not work when there is already a disconnection</div><div class='hunk'>@@ -868,7 +1099,7 @@ mwifiex_cfg80211_assoc(struct mwifiex_private *priv, size_t ssid_len, u8 *ssid,</div><div class='ctx'> 	priv-&gt;wep_key_curr_index = 0;</div><div class='ctx'> 	priv-&gt;sec_info.encryption_mode = 0;</div><div class='ctx'> 	priv-&gt;sec_info.is_authtype_auto = 0;</div><div class='del'>-	ret = mwifiex_set_encode(priv, NULL, 0, 0, 1);</div><div class='add'>+	ret = mwifiex_set_encode(priv, NULL, 0, 0, NULL, 1);</div><div class='ctx'> </div><div class='ctx'> 	if (mode == NL80211_IFTYPE_ADHOC) {</div><div class='ctx'> 		/* "privacy" is set only for ad-hoc mode */</div><div class='hunk'>@@ -916,7 +1147,7 @@ mwifiex_cfg80211_assoc(struct mwifiex_private *priv, size_t ssid_len, u8 *ssid,</div><div class='ctx'> 				" with key len %d\n", sme-&gt;key_len);</div><div class='ctx'> 			priv-&gt;wep_key_curr_index = sme-&gt;key_idx;</div><div class='ctx'> 			ret = mwifiex_set_encode(priv, sme-&gt;key, sme-&gt;key_len,</div><div class='del'>-							sme-&gt;key_idx, 0);</div><div class='add'>+						 sme-&gt;key_idx, NULL, 0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> done:</div><div class='hunk'>@@ -995,6 +1226,11 @@ mwifiex_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;bss_mode == NL80211_IFTYPE_AP) {</div><div class='add'>+		wiphy_err(wiphy, "skip association request for AP interface\n");</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	wiphy_dbg(wiphy, "info: Trying to associate to %s and bssid %pM\n",</div><div class='ctx'> 		  (char *) sme-&gt;ssid, sme-&gt;bssid);</div><div class='ctx'> </div><div class='hunk'>@@ -1107,6 +1343,17 @@ mwifiex_cfg80211_scan(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> 	priv-&gt;user_scan_cfg-&gt;num_ssids = request-&gt;n_ssids;</div><div class='ctx'> 	priv-&gt;user_scan_cfg-&gt;ssid_list = request-&gt;ssids;</div><div class='ctx'> </div><div class='add'>+	if (request-&gt;ie &amp;&amp; request-&gt;ie_len) {</div><div class='add'>+		for (i = 0; i &lt; MWIFIEX_MAX_VSIE_NUM; i++) {</div><div class='add'>+			if (priv-&gt;vs_ie[i].mask != MWIFIEX_VSIE_MASK_CLEAR)</div><div class='add'>+				continue;</div><div class='add'>+			priv-&gt;vs_ie[i].mask = MWIFIEX_VSIE_MASK_SCAN;</div><div class='add'>+			memcpy(&amp;priv-&gt;vs_ie[i].ie, request-&gt;ie,</div><div class='add'>+			       request-&gt;ie_len);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; request-&gt;n_channels; i++) {</div><div class='ctx'> 		chan = request-&gt;channels[i];</div><div class='ctx'> 		priv-&gt;user_scan_cfg-&gt;chan_list[i].chan_number = chan-&gt;hw_value;</div><div class='hunk'>@@ -1124,6 +1371,15 @@ mwifiex_cfg80211_scan(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> 	if (mwifiex_set_user_scan_ioctl(priv, priv-&gt;user_scan_cfg))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='add'>+	if (request-&gt;ie &amp;&amp; request-&gt;ie_len) {</div><div class='add'>+		for (i = 0; i &lt; MWIFIEX_MAX_VSIE_NUM; i++) {</div><div class='add'>+			if (priv-&gt;vs_ie[i].mask == MWIFIEX_VSIE_MASK_SCAN) {</div><div class='add'>+				priv-&gt;vs_ie[i].mask = MWIFIEX_VSIE_MASK_CLEAR;</div><div class='add'>+				memset(&amp;priv-&gt;vs_ie[i].ie, 0,</div><div class='add'>+				       MWIFIEX_MAX_VSIE_LEN);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1208,15 +1464,12 @@ struct net_device *mwifiex_add_virtual_intf(struct wiphy *wiphy,</div><div class='ctx'> 					    u32 *flags,</div><div class='ctx'> 					    struct vif_params *params)</div><div class='ctx'> {</div><div class='del'>-	struct mwifiex_private *priv = mwifiex_cfg80211_get_priv(wiphy);</div><div class='del'>-	struct mwifiex_adapter *adapter;</div><div class='add'>+	struct mwifiex_adapter *adapter = mwifiex_cfg80211_get_adapter(wiphy);</div><div class='add'>+	struct mwifiex_private *priv;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	void *mdev_priv;</div><div class='add'>+	struct wireless_dev *wdev;</div><div class='ctx'> </div><div class='del'>-	if (!priv)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	adapter = priv-&gt;adapter;</div><div class='ctx'> 	if (!adapter)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -1224,12 +1477,21 @@ struct net_device *mwifiex_add_virtual_intf(struct wiphy *wiphy,</div><div class='ctx'> 	case NL80211_IFTYPE_UNSPECIFIED:</div><div class='ctx'> 	case NL80211_IFTYPE_STATION:</div><div class='ctx'> 	case NL80211_IFTYPE_ADHOC:</div><div class='add'>+		priv = adapter-&gt;priv[MWIFIEX_BSS_TYPE_STA];</div><div class='ctx'> 		if (priv-&gt;bss_mode) {</div><div class='del'>-			wiphy_err(wiphy, "cannot create multiple"</div><div class='del'>-					" station/adhoc interfaces\n");</div><div class='add'>+			wiphy_err(wiphy,</div><div class='add'>+				  "cannot create multiple sta/adhoc ifaces\n");</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		wdev = kzalloc(sizeof(struct wireless_dev), GFP_KERNEL);</div><div class='add'>+		if (!wdev)</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		wdev-&gt;wiphy = wiphy;</div><div class='add'>+		priv-&gt;wdev = wdev;</div><div class='add'>+		wdev-&gt;iftype = NL80211_IFTYPE_STATION;</div><div class='add'>+</div><div class='ctx'> 		if (type == NL80211_IFTYPE_UNSPECIFIED)</div><div class='ctx'> 			priv-&gt;bss_mode = NL80211_IFTYPE_STATION;</div><div class='ctx'> 		else</div><div class='hunk'>@@ -1237,11 +1499,36 @@ struct net_device *mwifiex_add_virtual_intf(struct wiphy *wiphy,</div><div class='ctx'> </div><div class='ctx'> 		priv-&gt;bss_type = MWIFIEX_BSS_TYPE_STA;</div><div class='ctx'> 		priv-&gt;frame_type = MWIFIEX_DATA_FRAME_TYPE_ETH_II;</div><div class='del'>-		priv-&gt;bss_priority = 0;</div><div class='add'>+		priv-&gt;bss_priority = MWIFIEX_BSS_ROLE_STA;</div><div class='ctx'> 		priv-&gt;bss_role = MWIFIEX_BSS_ROLE_STA;</div><div class='ctx'> 		priv-&gt;bss_num = 0;</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='add'>+	case NL80211_IFTYPE_AP:</div><div class='add'>+		priv = adapter-&gt;priv[MWIFIEX_BSS_TYPE_UAP];</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;bss_mode) {</div><div class='add'>+			wiphy_err(wiphy, "Can't create multiple AP interfaces");</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		wdev = kzalloc(sizeof(struct wireless_dev), GFP_KERNEL);</div><div class='add'>+		if (!wdev)</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		priv-&gt;wdev = wdev;</div><div class='add'>+		wdev-&gt;wiphy = wiphy;</div><div class='add'>+		wdev-&gt;iftype = NL80211_IFTYPE_AP;</div><div class='add'>+</div><div class='add'>+		priv-&gt;bss_type = MWIFIEX_BSS_TYPE_UAP;</div><div class='add'>+		priv-&gt;frame_type = MWIFIEX_DATA_FRAME_TYPE_ETH_II;</div><div class='add'>+		priv-&gt;bss_priority = MWIFIEX_BSS_ROLE_UAP;</div><div class='add'>+		priv-&gt;bss_role = MWIFIEX_BSS_ROLE_UAP;</div><div class='add'>+		priv-&gt;bss_started = 0;</div><div class='add'>+		priv-&gt;bss_num = 0;</div><div class='add'>+		priv-&gt;bss_mode = type;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		wiphy_err(wiphy, "type not supported\n");</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -1254,6 +1541,15 @@ struct net_device *mwifiex_add_virtual_intf(struct wiphy *wiphy,</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mwifiex_init_priv_params(priv, dev);</div><div class='add'>+	priv-&gt;netdev = dev;</div><div class='add'>+</div><div class='add'>+	mwifiex_setup_ht_caps(&amp;wiphy-&gt;bands[IEEE80211_BAND_2GHZ]-&gt;ht_cap, priv);</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;config_bands &amp; BAND_A)</div><div class='add'>+		mwifiex_setup_ht_caps(</div><div class='add'>+			&amp;wiphy-&gt;bands[IEEE80211_BAND_5GHZ]-&gt;ht_cap, priv);</div><div class='add'>+</div><div class='ctx'> 	dev_net_set(dev, wiphy_net(wiphy));</div><div class='ctx'> 	dev-&gt;ieee80211_ptr = priv-&gt;wdev;</div><div class='ctx'> 	dev-&gt;ieee80211_ptr-&gt;iftype = priv-&gt;bss_mode;</div><div class='hunk'>@@ -1268,9 +1564,6 @@ struct net_device *mwifiex_add_virtual_intf(struct wiphy *wiphy,</div><div class='ctx'> 	mdev_priv = netdev_priv(dev);</div><div class='ctx'> 	*((unsigned long *) mdev_priv) = (unsigned long) priv;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;netdev = dev;</div><div class='del'>-	mwifiex_init_priv_params(priv, dev);</div><div class='del'>-</div><div class='ctx'> 	SET_NETDEV_DEV(dev, adapter-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Register network device */</div><div class='hunk'>@@ -1340,8 +1633,8 @@ static struct cfg80211_ops mwifiex_cfg80211_ops = {</div><div class='ctx'> 	.connect = mwifiex_cfg80211_connect,</div><div class='ctx'> 	.disconnect = mwifiex_cfg80211_disconnect,</div><div class='ctx'> 	.get_station = mwifiex_cfg80211_get_station,</div><div class='add'>+	.dump_station = mwifiex_cfg80211_dump_station,</div><div class='ctx'> 	.set_wiphy_params = mwifiex_cfg80211_set_wiphy_params,</div><div class='del'>-	.set_channel = mwifiex_cfg80211_set_channel,</div><div class='ctx'> 	.join_ibss = mwifiex_cfg80211_join_ibss,</div><div class='ctx'> 	.leave_ibss = mwifiex_cfg80211_leave_ibss,</div><div class='ctx'> 	.add_key = mwifiex_cfg80211_add_key,</div><div class='hunk'>@@ -1350,6 +1643,9 @@ static struct cfg80211_ops mwifiex_cfg80211_ops = {</div><div class='ctx'> 	.set_power_mgmt = mwifiex_cfg80211_set_power_mgmt,</div><div class='ctx'> 	.set_tx_power = mwifiex_cfg80211_set_tx_power,</div><div class='ctx'> 	.set_bitrate_mask = mwifiex_cfg80211_set_bitrate_mask,</div><div class='add'>+	.start_ap = mwifiex_cfg80211_start_ap,</div><div class='add'>+	.stop_ap = mwifiex_cfg80211_stop_ap,</div><div class='add'>+	.set_cqm_rssi_config = mwifiex_cfg80211_set_cqm_rssi_config,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1359,75 +1655,67 @@ static struct cfg80211_ops mwifiex_cfg80211_ops = {</div><div class='ctx'>  * default parameters and handler function pointers, and finally</div><div class='ctx'>  * registers the device.</div><div class='ctx'>  */</div><div class='del'>-int mwifiex_register_cfg80211(struct mwifiex_private *priv)</div><div class='add'>+</div><div class='add'>+int mwifiex_register_cfg80211(struct mwifiex_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	void *wdev_priv;</div><div class='del'>-	struct wireless_dev *wdev;</div><div class='del'>-	struct ieee80211_sta_ht_cap *ht_info;</div><div class='del'>-</div><div class='del'>-	wdev = kzalloc(sizeof(struct wireless_dev), GFP_KERNEL);</div><div class='del'>-	if (!wdev) {</div><div class='del'>-		dev_err(priv-&gt;adapter-&gt;dev, "%s: allocating wireless device\n",</div><div class='del'>-			__func__);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	wdev-&gt;wiphy =</div><div class='del'>-		wiphy_new(&amp;mwifiex_cfg80211_ops,</div><div class='del'>-			  sizeof(struct mwifiex_private *));</div><div class='del'>-	if (!wdev-&gt;wiphy) {</div><div class='del'>-		kfree(wdev);</div><div class='add'>+	struct wiphy *wiphy;</div><div class='add'>+	struct mwifiex_private *priv = adapter-&gt;priv[MWIFIEX_BSS_TYPE_STA];</div><div class='add'>+	u8 *country_code;</div><div class='add'>+</div><div class='add'>+	/* create a new wiphy for use with cfg80211 */</div><div class='add'>+	wiphy = wiphy_new(&amp;mwifiex_cfg80211_ops,</div><div class='add'>+			  sizeof(struct mwifiex_adapter *));</div><div class='add'>+	if (!wiphy) {</div><div class='add'>+		dev_err(adapter-&gt;dev, "%s: creating new wiphy\n", __func__);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='del'>-	wdev-&gt;iftype = NL80211_IFTYPE_STATION;</div><div class='del'>-	wdev-&gt;wiphy-&gt;max_scan_ssids = 10;</div><div class='del'>-	wdev-&gt;wiphy-&gt;interface_modes = BIT(NL80211_IFTYPE_STATION) |</div><div class='del'>-				       BIT(NL80211_IFTYPE_ADHOC);</div><div class='del'>-</div><div class='del'>-	wdev-&gt;wiphy-&gt;bands[IEEE80211_BAND_2GHZ] = &amp;mwifiex_band_2ghz;</div><div class='del'>-	ht_info = &amp;wdev-&gt;wiphy-&gt;bands[IEEE80211_BAND_2GHZ]-&gt;ht_cap;</div><div class='del'>-	mwifiex_setup_ht_caps(ht_info, priv);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;adapter-&gt;config_bands &amp; BAND_A) {</div><div class='del'>-		wdev-&gt;wiphy-&gt;bands[IEEE80211_BAND_5GHZ] = &amp;mwifiex_band_5ghz;</div><div class='del'>-		ht_info = &amp;wdev-&gt;wiphy-&gt;bands[IEEE80211_BAND_5GHZ]-&gt;ht_cap;</div><div class='del'>-		mwifiex_setup_ht_caps(ht_info, priv);</div><div class='del'>-	} else {</div><div class='del'>-		wdev-&gt;wiphy-&gt;bands[IEEE80211_BAND_5GHZ] = NULL;</div><div class='del'>-	}</div><div class='add'>+	wiphy-&gt;max_scan_ssids = MWIFIEX_MAX_SSID_LIST_LENGTH;</div><div class='add'>+	wiphy-&gt;max_scan_ie_len = MWIFIEX_MAX_VSIE_LEN;</div><div class='add'>+	wiphy-&gt;interface_modes = BIT(NL80211_IFTYPE_STATION) |</div><div class='add'>+				 BIT(NL80211_IFTYPE_ADHOC) |</div><div class='add'>+				 BIT(NL80211_IFTYPE_AP);</div><div class='add'>+</div><div class='add'>+	wiphy-&gt;bands[IEEE80211_BAND_2GHZ] = &amp;mwifiex_band_2ghz;</div><div class='add'>+	if (adapter-&gt;config_bands &amp; BAND_A)</div><div class='add'>+		wiphy-&gt;bands[IEEE80211_BAND_5GHZ] = &amp;mwifiex_band_5ghz;</div><div class='add'>+	else</div><div class='add'>+		wiphy-&gt;bands[IEEE80211_BAND_5GHZ] = NULL;</div><div class='ctx'> </div><div class='del'>-	/* Initialize cipher suits */</div><div class='del'>-	wdev-&gt;wiphy-&gt;cipher_suites = mwifiex_cipher_suites;</div><div class='del'>-	wdev-&gt;wiphy-&gt;n_cipher_suites = ARRAY_SIZE(mwifiex_cipher_suites);</div><div class='add'>+	wiphy-&gt;iface_combinations = &amp;mwifiex_iface_comb_ap_sta;</div><div class='add'>+	wiphy-&gt;n_iface_combinations = 1;</div><div class='ctx'> </div><div class='del'>-	memcpy(wdev-&gt;wiphy-&gt;perm_addr, priv-&gt;curr_addr, ETH_ALEN);</div><div class='del'>-	wdev-&gt;wiphy-&gt;signal_type = CFG80211_SIGNAL_TYPE_MBM;</div><div class='add'>+	/* Initialize cipher suits */</div><div class='add'>+	wiphy-&gt;cipher_suites = mwifiex_cipher_suites;</div><div class='add'>+	wiphy-&gt;n_cipher_suites = ARRAY_SIZE(mwifiex_cipher_suites);</div><div class='ctx'> </div><div class='del'>-	/* Reserve space for bss band information */</div><div class='del'>-	wdev-&gt;wiphy-&gt;bss_priv_size = sizeof(u8);</div><div class='add'>+	memcpy(wiphy-&gt;perm_addr, priv-&gt;curr_addr, ETH_ALEN);</div><div class='add'>+	wiphy-&gt;signal_type = CFG80211_SIGNAL_TYPE_MBM;</div><div class='add'>+	wiphy-&gt;flags |= WIPHY_FLAG_HAVE_AP_SME | WIPHY_FLAG_CUSTOM_REGULATORY;</div><div class='ctx'> </div><div class='del'>-	wdev-&gt;wiphy-&gt;reg_notifier = mwifiex_reg_notifier;</div><div class='add'>+	/* Reserve space for mwifiex specific private data for BSS */</div><div class='add'>+	wiphy-&gt;bss_priv_size = sizeof(struct mwifiex_bss_priv);</div><div class='ctx'> </div><div class='del'>-	/* Set struct mwifiex_private pointer in wiphy_priv */</div><div class='del'>-	wdev_priv = wiphy_priv(wdev-&gt;wiphy);</div><div class='add'>+	wiphy-&gt;reg_notifier = mwifiex_reg_notifier;</div><div class='ctx'> </div><div class='del'>-	*(unsigned long *) wdev_priv = (unsigned long) priv;</div><div class='add'>+	/* Set struct mwifiex_adapter pointer in wiphy_priv */</div><div class='add'>+	wdev_priv = wiphy_priv(wiphy);</div><div class='add'>+	*(unsigned long *)wdev_priv = (unsigned long)adapter;</div><div class='ctx'> </div><div class='del'>-	set_wiphy_dev(wdev-&gt;wiphy, (struct device *) priv-&gt;adapter-&gt;dev);</div><div class='add'>+	set_wiphy_dev(wiphy, (struct device *)priv-&gt;adapter-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	ret = wiphy_register(wdev-&gt;wiphy);</div><div class='add'>+	ret = wiphy_register(wiphy);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		dev_err(priv-&gt;adapter-&gt;dev, "%s: registering cfg80211 device\n",</div><div class='del'>-			__func__);</div><div class='del'>-		wiphy_free(wdev-&gt;wiphy);</div><div class='del'>-		kfree(wdev);</div><div class='add'>+		dev_err(adapter-&gt;dev,</div><div class='add'>+			"%s: wiphy_register failed: %d\n", __func__, ret);</div><div class='add'>+		wiphy_free(wiphy);</div><div class='ctx'> 		return ret;</div><div class='del'>-	} else {</div><div class='del'>-		dev_dbg(priv-&gt;adapter-&gt;dev,</div><div class='del'>-			"info: successfully registered wiphy device\n");</div><div class='ctx'> 	}</div><div class='add'>+	country_code = mwifiex_11d_code_2_region(priv-&gt;adapter-&gt;region_code);</div><div class='add'>+	if (country_code &amp;&amp; regulatory_hint(wiphy, country_code))</div><div class='add'>+		dev_err(adapter-&gt;dev, "regulatory_hint() failed\n");</div><div class='ctx'> </div><div class='del'>-	priv-&gt;wdev = wdev;</div><div class='del'>-</div><div class='add'>+	adapter-&gt;wiphy = wiphy;</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/cfg80211.h b/drivers/net/wireless/mwifiex/cfg80211.h<br/>index 76c76c60438b..c5848934f111 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/cfg80211.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/cfg80211.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/cfg80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/cfg80211.h</a></div><div class='hunk'>@@ -24,6 +24,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "main.h"</div><div class='ctx'> </div><div class='del'>-int mwifiex_register_cfg80211(struct mwifiex_private *);</div><div class='add'>+int mwifiex_register_cfg80211(struct mwifiex_adapter *);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/cfp.c b/drivers/net/wireless/mwifiex/cfp.c<br/>index 2fe1c33765b8..560871b0e236 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/cfp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/cfp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/cfp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/cfp.c</a></div><div class='hunk'>@@ -71,6 +71,37 @@ u16 region_code_index[MWIFIEX_MAX_REGION_CODE] = { 0x10, 0x20, 0x30,</div><div class='ctx'> </div><div class='ctx'> static u8 supported_rates_n[N_SUPPORTED_RATES] = { 0x02, 0x04, 0 };</div><div class='ctx'> </div><div class='add'>+struct region_code_mapping {</div><div class='add'>+	u8 code;</div><div class='add'>+	u8 region[IEEE80211_COUNTRY_STRING_LEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct region_code_mapping region_code_mapping_t[] = {</div><div class='add'>+	{ 0x10, "US " }, /* US FCC */</div><div class='add'>+	{ 0x20, "CA " }, /* IC Canada */</div><div class='add'>+	{ 0x30, "EU " }, /* ETSI */</div><div class='add'>+	{ 0x31, "ES " }, /* Spain */</div><div class='add'>+	{ 0x32, "FR " }, /* France */</div><div class='add'>+	{ 0x40, "JP " }, /* Japan */</div><div class='add'>+	{ 0x41, "JP " }, /* Japan */</div><div class='add'>+	{ 0x50, "CN " }, /* China */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This function converts integer code to region string */</div><div class='add'>+u8 *mwifiex_11d_code_2_region(u8 code)</div><div class='add'>+{</div><div class='add'>+	u8 i;</div><div class='add'>+	u8 size = sizeof(region_code_mapping_t)/</div><div class='add'>+				sizeof(struct region_code_mapping);</div><div class='add'>+</div><div class='add'>+	/* Look for code in mapping table */</div><div class='add'>+	for (i = 0; i &lt; size; i++)</div><div class='add'>+		if (region_code_mapping_t[i].code == code)</div><div class='add'>+			return region_code_mapping_t[i].region;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This function maps an index in supported rates table into</div><div class='ctx'>  * the corresponding data rate.</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/cmdevt.c b/drivers/net/wireless/mwifiex/cmdevt.c<br/>index 07f6e0092552..51e023ec1de4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/cmdevt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/cmdevt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/cmdevt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/cmdevt.c</a></div><div class='hunk'>@@ -139,6 +139,7 @@ static int mwifiex_dnld_cmd_to_fw(struct mwifiex_private *priv,</div><div class='ctx'> 	uint16_t cmd_size;</div><div class='ctx'> 	struct timeval tstamp;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	__le32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	if (!adapter || !cmd_node)</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -178,15 +179,28 @@ static int mwifiex_dnld_cmd_to_fw(struct mwifiex_private *priv,</div><div class='ctx'> 		le16_to_cpu(*(__le16 *) ((u8 *) host_cmd + S_DS_GEN)), cmd_size,</div><div class='ctx'> 		le16_to_cpu(host_cmd-&gt;seq_num));</div><div class='ctx'> </div><div class='del'>-	skb_push(cmd_node-&gt;cmd_skb, INTF_HEADER_LEN);</div><div class='del'>-</div><div class='del'>-	ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_TYPE_CMD,</div><div class='del'>-					   cmd_node-&gt;cmd_skb, NULL);</div><div class='del'>-</div><div class='del'>-	skb_pull(cmd_node-&gt;cmd_skb, INTF_HEADER_LEN);</div><div class='add'>+	if (adapter-&gt;iface_type == MWIFIEX_USB) {</div><div class='add'>+		tmp = cpu_to_le32(MWIFIEX_USB_TYPE_CMD);</div><div class='add'>+		skb_push(cmd_node-&gt;cmd_skb, MWIFIEX_TYPE_LEN);</div><div class='add'>+		memcpy(cmd_node-&gt;cmd_skb-&gt;data, &amp;tmp, MWIFIEX_TYPE_LEN);</div><div class='add'>+		adapter-&gt;cmd_sent = true;</div><div class='add'>+		ret = adapter-&gt;if_ops.host_to_card(adapter,</div><div class='add'>+						   MWIFIEX_USB_EP_CMD_EVENT,</div><div class='add'>+						   cmd_node-&gt;cmd_skb, NULL);</div><div class='add'>+		skb_pull(cmd_node-&gt;cmd_skb, MWIFIEX_TYPE_LEN);</div><div class='add'>+		if (ret == -EBUSY)</div><div class='add'>+			cmd_node-&gt;cmd_skb = NULL;</div><div class='add'>+	} else {</div><div class='add'>+		skb_push(cmd_node-&gt;cmd_skb, INTF_HEADER_LEN);</div><div class='add'>+		ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_TYPE_CMD,</div><div class='add'>+						   cmd_node-&gt;cmd_skb, NULL);</div><div class='add'>+		skb_pull(cmd_node-&gt;cmd_skb, INTF_HEADER_LEN);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (ret == -1) {</div><div class='ctx'> 		dev_err(adapter-&gt;dev, "DNLD_CMD: host to card failed\n");</div><div class='add'>+		if (adapter-&gt;iface_type == MWIFIEX_USB)</div><div class='add'>+			adapter-&gt;cmd_sent = false;</div><div class='ctx'> 		if (cmd_node-&gt;wait_q_enabled)</div><div class='ctx'> 			adapter-&gt;cmd_wait_q.status = -1;</div><div class='ctx'> 		mwifiex_insert_cmd_to_free_q(adapter, adapter-&gt;curr_cmd);</div><div class='hunk'>@@ -232,6 +246,9 @@ static int mwifiex_dnld_sleep_confirm_cmd(struct mwifiex_adapter *adapter)</div><div class='ctx'> 	struct mwifiex_opt_sleep_confirm *sleep_cfm_buf =</div><div class='ctx'> 				(struct mwifiex_opt_sleep_confirm *)</div><div class='ctx'> 						adapter-&gt;sleep_cfm-&gt;data;</div><div class='add'>+	struct sk_buff *sleep_cfm_tmp;</div><div class='add'>+	__le32 tmp;</div><div class='add'>+</div><div class='ctx'> 	priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);</div><div class='ctx'> </div><div class='ctx'> 	sleep_cfm_buf-&gt;seq_num =</div><div class='hunk'>@@ -240,10 +257,28 @@ static int mwifiex_dnld_sleep_confirm_cmd(struct mwifiex_adapter *adapter)</div><div class='ctx'> 					 priv-&gt;bss_type)));</div><div class='ctx'> 	adapter-&gt;seq_num++;</div><div class='ctx'> </div><div class='del'>-	skb_push(adapter-&gt;sleep_cfm, INTF_HEADER_LEN);</div><div class='del'>-	ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_TYPE_CMD,</div><div class='del'>-					   adapter-&gt;sleep_cfm, NULL);</div><div class='del'>-	skb_pull(adapter-&gt;sleep_cfm, INTF_HEADER_LEN);</div><div class='add'>+	if (adapter-&gt;iface_type == MWIFIEX_USB) {</div><div class='add'>+		sleep_cfm_tmp =</div><div class='add'>+			dev_alloc_skb(sizeof(struct mwifiex_opt_sleep_confirm)</div><div class='add'>+				      + MWIFIEX_TYPE_LEN);</div><div class='add'>+		skb_put(sleep_cfm_tmp, sizeof(struct mwifiex_opt_sleep_confirm)</div><div class='add'>+			+ MWIFIEX_TYPE_LEN);</div><div class='add'>+		tmp = cpu_to_le32(MWIFIEX_USB_TYPE_CMD);</div><div class='add'>+		memcpy(sleep_cfm_tmp-&gt;data, &amp;tmp, MWIFIEX_TYPE_LEN);</div><div class='add'>+		memcpy(sleep_cfm_tmp-&gt;data + MWIFIEX_TYPE_LEN,</div><div class='add'>+		       adapter-&gt;sleep_cfm-&gt;data,</div><div class='add'>+		       sizeof(struct mwifiex_opt_sleep_confirm));</div><div class='add'>+		ret = adapter-&gt;if_ops.host_to_card(adapter,</div><div class='add'>+						   MWIFIEX_USB_EP_CMD_EVENT,</div><div class='add'>+						   sleep_cfm_tmp, NULL);</div><div class='add'>+		if (ret != -EBUSY)</div><div class='add'>+			dev_kfree_skb_any(sleep_cfm_tmp);</div><div class='add'>+	} else {</div><div class='add'>+		skb_push(adapter-&gt;sleep_cfm, INTF_HEADER_LEN);</div><div class='add'>+		ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_TYPE_CMD,</div><div class='add'>+						   adapter-&gt;sleep_cfm, NULL);</div><div class='add'>+		skb_pull(adapter-&gt;sleep_cfm, INTF_HEADER_LEN);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (ret == -1) {</div><div class='ctx'> 		dev_err(adapter-&gt;dev, "SLEEP_CFM: failed\n");</div><div class='hunk'>@@ -343,7 +378,12 @@ int mwifiex_free_cmd_buffer(struct mwifiex_adapter *adapter)</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!cmd_array[i].resp_skb)</div><div class='ctx'> 			continue;</div><div class='del'>-		dev_kfree_skb_any(cmd_array[i].resp_skb);</div><div class='add'>+</div><div class='add'>+		if (adapter-&gt;iface_type == MWIFIEX_USB)</div><div class='add'>+			adapter-&gt;if_ops.cmdrsp_complete(adapter,</div><div class='add'>+							cmd_array[i].resp_skb);</div><div class='add'>+		else</div><div class='add'>+			dev_kfree_skb_any(cmd_array[i].resp_skb);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Release struct cmd_ctrl_node */</div><div class='ctx'> 	if (adapter-&gt;cmd_pool) {</div><div class='hunk'>@@ -400,6 +440,11 @@ int mwifiex_process_event(struct mwifiex_adapter *adapter)</div><div class='ctx'> 		do_gettimeofday(&amp;tstamp);</div><div class='ctx'> 		dev_dbg(adapter-&gt;dev, "event: %lu.%lu: cause: %#x\n",</div><div class='ctx'> 			tstamp.tv_sec, tstamp.tv_usec, eventcause);</div><div class='add'>+	} else {</div><div class='add'>+		/* Handle PS_SLEEP/AWAKE events on STA */</div><div class='add'>+		priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA);</div><div class='add'>+		if (!priv)</div><div class='add'>+			priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = mwifiex_process_sta_event(priv);</div><div class='hunk'>@@ -500,8 +545,20 @@ int mwifiex_send_cmd_async(struct mwifiex_private *priv, uint16_t cmd_no,</div><div class='ctx'> </div><div class='ctx'> 	/* Prepare command */</div><div class='ctx'> 	if (cmd_no) {</div><div class='del'>-		ret = mwifiex_sta_prepare_cmd(priv, cmd_no, cmd_action,</div><div class='del'>-					      cmd_oid, data_buf, cmd_ptr);</div><div class='add'>+		switch (cmd_no) {</div><div class='add'>+		case HostCmd_CMD_UAP_SYS_CONFIG:</div><div class='add'>+		case HostCmd_CMD_UAP_BSS_START:</div><div class='add'>+		case HostCmd_CMD_UAP_BSS_STOP:</div><div class='add'>+			ret = mwifiex_uap_prepare_cmd(priv, cmd_no, cmd_action,</div><div class='add'>+						      cmd_oid, data_buf,</div><div class='add'>+						      cmd_ptr);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			ret = mwifiex_sta_prepare_cmd(priv, cmd_no, cmd_action,</div><div class='add'>+						      cmd_oid, data_buf,</div><div class='add'>+						      cmd_ptr);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ret = mwifiex_cmd_host_cmd(priv, cmd_ptr, data_buf);</div><div class='ctx'> 		cmd_node-&gt;cmd_flag |= CMD_F_HOSTCMD;</div><div class='hunk'>@@ -1083,6 +1140,7 @@ mwifiex_process_hs_config(struct mwifiex_adapter *adapter)</div><div class='ctx'> 						    MWIFIEX_BSS_ROLE_ANY),</div><div class='ctx'> 				   false);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(mwifiex_process_hs_config);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This function handles the command response of a sleep confirm command.</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/debugfs.c b/drivers/net/wireless/mwifiex/debugfs.c<br/>index 1a845074c52a..a870b5885c09 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/debugfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/debugfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/debugfs.c</a></div><div class='hunk'>@@ -212,7 +212,7 @@ mwifiex_info_read(struct file *file, char __user *ubuf,</div><div class='ctx'> 		p += sprintf(p, "essid=\"%s\"\n", info.ssid.ssid);</div><div class='ctx'> 		p += sprintf(p, "bssid=\"%pM\"\n", info.bssid);</div><div class='ctx'> 		p += sprintf(p, "channel=\"%d\"\n", (int) info.bss_chan);</div><div class='del'>-		p += sprintf(p, "region_code = \"%02x\"\n", info.region_code);</div><div class='add'>+		p += sprintf(p, "country_code = \"%s\"\n", info.country_code);</div><div class='ctx'> </div><div class='ctx'> 		netdev_for_each_mc_addr(ha, netdev)</div><div class='ctx'> 			p += sprintf(p, "multicast_address[%d]=\"%pM\"\n",</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/decl.h b/drivers/net/wireless/mwifiex/decl.h<br/>index be5fd1652e53..f918f66e5e27 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/decl.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/decl.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/decl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/decl.h</a></div><div class='hunk'>@@ -28,7 +28,7 @@</div><div class='ctx'> #include &lt;linux/ieee80211.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#define MWIFIEX_MAX_BSS_NUM         (1)</div><div class='add'>+#define MWIFIEX_MAX_BSS_NUM         (2)</div><div class='ctx'> </div><div class='ctx'> #define MWIFIEX_MIN_DATA_HEADER_LEN 36	/* sizeof(mwifiex_txpd)</div><div class='ctx'> 					 *   + 4 byte alignment</div><div class='hunk'>@@ -53,12 +53,19 @@</div><div class='ctx'> #define MWIFIEX_RATE_BITMAP_MCS127 159</div><div class='ctx'> </div><div class='ctx'> #define MWIFIEX_RX_DATA_BUF_SIZE     (4 * 1024)</div><div class='add'>+#define MWIFIEX_RX_CMD_BUF_SIZE	     (2 * 1024)</div><div class='add'>+</div><div class='add'>+#define MAX_BEACON_PERIOD                  (4000)</div><div class='add'>+#define MIN_BEACON_PERIOD                  (50)</div><div class='add'>+#define MAX_DTIM_PERIOD                    (100)</div><div class='add'>+#define MIN_DTIM_PERIOD                    (1)</div><div class='ctx'> </div><div class='ctx'> #define MWIFIEX_RTS_MIN_VALUE              (0)</div><div class='ctx'> #define MWIFIEX_RTS_MAX_VALUE              (2347)</div><div class='ctx'> #define MWIFIEX_FRAG_MIN_VALUE             (256)</div><div class='ctx'> #define MWIFIEX_FRAG_MAX_VALUE             (2346)</div><div class='ctx'> </div><div class='add'>+#define MWIFIEX_RETRY_LIMIT                14</div><div class='ctx'> #define MWIFIEX_SDIO_BLOCK_SIZE            256</div><div class='ctx'> </div><div class='ctx'> #define MWIFIEX_BUF_FLAG_REQUEUED_PKT      BIT(0)</div><div class='hunk'>@@ -91,6 +98,11 @@ struct mwifiex_fw_image {</div><div class='ctx'> 	u32 fw_len;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mwifiex_802_11_ssid {</div><div class='add'>+	u32 ssid_len;</div><div class='add'>+	u8 ssid[IEEE80211_MAX_SSID_LEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mwifiex_wait_queue {</div><div class='ctx'> 	wait_queue_head_t wait;</div><div class='ctx'> 	int status;</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/fw.h b/drivers/net/wireless/mwifiex/fw.h<br/>index e98fc5af73dc..9f674bbebe65 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/fw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/fw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/fw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/fw.h</a></div><div class='hunk'>@@ -81,6 +81,11 @@ enum KEY_TYPE_ID {</div><div class='ctx'> #define FIRMWARE_READY_SDIO				0xfedc</div><div class='ctx'> #define FIRMWARE_READY_PCIE				0xfedcba00</div><div class='ctx'> </div><div class='add'>+enum mwifiex_usb_ep {</div><div class='add'>+	MWIFIEX_USB_EP_CMD_EVENT = 1,</div><div class='add'>+	MWIFIEX_USB_EP_DATA = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum MWIFIEX_802_11_PRIVACY_FILTER {</div><div class='ctx'> 	MWIFIEX_802_11_PRIV_FILTER_ACCEPT_ALL,</div><div class='ctx'> 	MWIFIEX_802_11_PRIV_FILTER_8021X_WEP</div><div class='hunk'>@@ -88,22 +93,51 @@ enum MWIFIEX_802_11_PRIVACY_FILTER {</div><div class='ctx'> </div><div class='ctx'> #define CAL_SNR(RSSI, NF)		((s16)((s16)(RSSI)-(s16)(NF)))</div><div class='ctx'> </div><div class='add'>+#define UAP_BSS_PARAMS_I			0</div><div class='add'>+#define UAP_CUSTOM_IE_I				1</div><div class='add'>+#define MWIFIEX_AUTO_IDX_MASK			0xffff</div><div class='add'>+#define MWIFIEX_DELETE_MASK			0x0000</div><div class='add'>+#define MGMT_MASK_ASSOC_REQ			0x01</div><div class='add'>+#define MGMT_MASK_REASSOC_REQ			0x04</div><div class='add'>+#define MGMT_MASK_ASSOC_RESP			0x02</div><div class='add'>+#define MGMT_MASK_REASSOC_RESP			0x08</div><div class='add'>+#define MGMT_MASK_PROBE_REQ			0x10</div><div class='add'>+#define MGMT_MASK_PROBE_RESP			0x20</div><div class='add'>+#define MGMT_MASK_BEACON			0x100</div><div class='add'>+</div><div class='add'>+#define TLV_TYPE_UAP_SSID			0x0000</div><div class='add'>+</div><div class='ctx'> #define PROPRIETARY_TLV_BASE_ID                 0x0100</div><div class='ctx'> #define TLV_TYPE_KEY_MATERIAL       (PROPRIETARY_TLV_BASE_ID + 0)</div><div class='ctx'> #define TLV_TYPE_CHANLIST           (PROPRIETARY_TLV_BASE_ID + 1)</div><div class='ctx'> #define TLV_TYPE_NUMPROBES          (PROPRIETARY_TLV_BASE_ID + 2)</div><div class='add'>+#define TLV_TYPE_RSSI_LOW           (PROPRIETARY_TLV_BASE_ID + 4)</div><div class='ctx'> #define TLV_TYPE_PASSTHROUGH        (PROPRIETARY_TLV_BASE_ID + 10)</div><div class='ctx'> #define TLV_TYPE_WMMQSTATUS         (PROPRIETARY_TLV_BASE_ID + 16)</div><div class='ctx'> #define TLV_TYPE_WILDCARDSSID       (PROPRIETARY_TLV_BASE_ID + 18)</div><div class='ctx'> #define TLV_TYPE_TSFTIMESTAMP       (PROPRIETARY_TLV_BASE_ID + 19)</div><div class='add'>+#define TLV_TYPE_RSSI_HIGH          (PROPRIETARY_TLV_BASE_ID + 22)</div><div class='ctx'> #define TLV_TYPE_AUTH_TYPE          (PROPRIETARY_TLV_BASE_ID + 31)</div><div class='add'>+#define TLV_TYPE_STA_MAC_ADDR       (PROPRIETARY_TLV_BASE_ID + 32)</div><div class='ctx'> #define TLV_TYPE_CHANNELBANDLIST    (PROPRIETARY_TLV_BASE_ID + 42)</div><div class='add'>+#define TLV_TYPE_UAP_BEACON_PERIOD  (PROPRIETARY_TLV_BASE_ID + 44)</div><div class='add'>+#define TLV_TYPE_UAP_DTIM_PERIOD    (PROPRIETARY_TLV_BASE_ID + 45)</div><div class='add'>+#define TLV_TYPE_UAP_RTS_THRESHOLD  (PROPRIETARY_TLV_BASE_ID + 51)</div><div class='add'>+#define TLV_TYPE_UAP_WPA_PASSPHRASE (PROPRIETARY_TLV_BASE_ID + 60)</div><div class='add'>+#define TLV_TYPE_UAP_ENCRY_PROTOCOL (PROPRIETARY_TLV_BASE_ID + 64)</div><div class='add'>+#define TLV_TYPE_UAP_AKMP           (PROPRIETARY_TLV_BASE_ID + 65)</div><div class='add'>+#define TLV_TYPE_UAP_FRAG_THRESHOLD (PROPRIETARY_TLV_BASE_ID + 70)</div><div class='ctx'> #define TLV_TYPE_RATE_DROP_CONTROL  (PROPRIETARY_TLV_BASE_ID + 82)</div><div class='ctx'> #define TLV_TYPE_RATE_SCOPE         (PROPRIETARY_TLV_BASE_ID + 83)</div><div class='ctx'> #define TLV_TYPE_POWER_GROUP        (PROPRIETARY_TLV_BASE_ID + 84)</div><div class='add'>+#define TLV_TYPE_UAP_RETRY_LIMIT    (PROPRIETARY_TLV_BASE_ID + 93)</div><div class='ctx'> #define TLV_TYPE_WAPI_IE            (PROPRIETARY_TLV_BASE_ID + 94)</div><div class='add'>+#define TLV_TYPE_UAP_MGMT_FRAME     (PROPRIETARY_TLV_BASE_ID + 104)</div><div class='add'>+#define TLV_TYPE_MGMT_IE            (PROPRIETARY_TLV_BASE_ID + 105)</div><div class='ctx'> #define TLV_TYPE_AUTO_DS_PARAM      (PROPRIETARY_TLV_BASE_ID + 113)</div><div class='ctx'> #define TLV_TYPE_PS_PARAM           (PROPRIETARY_TLV_BASE_ID + 114)</div><div class='add'>+#define TLV_TYPE_PWK_CIPHER         (PROPRIETARY_TLV_BASE_ID + 145)</div><div class='add'>+#define TLV_TYPE_GWK_CIPHER         (PROPRIETARY_TLV_BASE_ID + 146)</div><div class='ctx'> </div><div class='ctx'> #define MWIFIEX_TX_DATA_BUF_SIZE_2K        2048</div><div class='ctx'> </div><div class='hunk'>@@ -194,12 +228,16 @@ enum MWIFIEX_802_11_PRIVACY_FILTER {</div><div class='ctx'> #define HostCmd_CMD_802_11_KEY_MATERIAL               0x005e</div><div class='ctx'> #define HostCmd_CMD_802_11_BG_SCAN_QUERY              0x006c</div><div class='ctx'> #define HostCmd_CMD_WMM_GET_STATUS                    0x0071</div><div class='add'>+#define HostCmd_CMD_802_11_SUBSCRIBE_EVENT            0x0075</div><div class='ctx'> #define HostCmd_CMD_802_11_TX_RATE_QUERY              0x007f</div><div class='ctx'> #define HostCmd_CMD_802_11_IBSS_COALESCING_STATUS     0x0083</div><div class='ctx'> #define HostCmd_CMD_VERSION_EXT                       0x0097</div><div class='ctx'> #define HostCmd_CMD_RSSI_INFO                         0x00a4</div><div class='ctx'> #define HostCmd_CMD_FUNC_INIT                         0x00a9</div><div class='ctx'> #define HostCmd_CMD_FUNC_SHUTDOWN                     0x00aa</div><div class='add'>+#define HostCmd_CMD_UAP_SYS_CONFIG                    0x00b0</div><div class='add'>+#define HostCmd_CMD_UAP_BSS_START                     0x00b1</div><div class='add'>+#define HostCmd_CMD_UAP_BSS_STOP                      0x00b2</div><div class='ctx'> #define HostCmd_CMD_11N_CFG                           0x00cd</div><div class='ctx'> #define HostCmd_CMD_11N_ADDBA_REQ                     0x00ce</div><div class='ctx'> #define HostCmd_CMD_11N_ADDBA_RSP                     0x00cf</div><div class='hunk'>@@ -214,6 +252,19 @@ enum MWIFIEX_802_11_PRIVACY_FILTER {</div><div class='ctx'> #define HostCmd_CMD_SET_BSS_MODE                      0x00f7</div><div class='ctx'> #define HostCmd_CMD_PCIE_DESC_DETAILS                 0x00fa</div><div class='ctx'> </div><div class='add'>+#define PROTOCOL_NO_SECURITY        0x01</div><div class='add'>+#define PROTOCOL_STATIC_WEP         0x02</div><div class='add'>+#define PROTOCOL_WPA                0x08</div><div class='add'>+#define PROTOCOL_WPA2               0x20</div><div class='add'>+#define PROTOCOL_WPA2_MIXED         0x28</div><div class='add'>+#define PROTOCOL_EAP                0x40</div><div class='add'>+#define KEY_MGMT_NONE               0x04</div><div class='add'>+#define KEY_MGMT_PSK                0x02</div><div class='add'>+#define KEY_MGMT_EAP                0x01</div><div class='add'>+#define CIPHER_TKIP                 0x04</div><div class='add'>+#define CIPHER_AES_CCMP             0x08</div><div class='add'>+#define VALID_CIPHER_BITMAP         0x0c</div><div class='add'>+</div><div class='ctx'> enum ENH_PS_MODES {</div><div class='ctx'> 	EN_PS = 1,</div><div class='ctx'> 	DIS_PS = 2,</div><div class='hunk'>@@ -228,6 +279,8 @@ enum ENH_PS_MODES {</div><div class='ctx'> #define HostCmd_RET_BIT                       0x8000</div><div class='ctx'> #define HostCmd_ACT_GEN_GET                   0x0000</div><div class='ctx'> #define HostCmd_ACT_GEN_SET                   0x0001</div><div class='add'>+#define HostCmd_ACT_BITWISE_SET               0x0002</div><div class='add'>+#define HostCmd_ACT_BITWISE_CLR               0x0003</div><div class='ctx'> #define HostCmd_RESULT_OK                     0x0000</div><div class='ctx'> </div><div class='ctx'> #define HostCmd_ACT_MAC_RX_ON                 0x0001</div><div class='hunk'>@@ -302,15 +355,20 @@ enum ENH_PS_MODES {</div><div class='ctx'> #define EVENT_DATA_SNR_HIGH             0x00000027</div><div class='ctx'> #define EVENT_LINK_QUALITY              0x00000028</div><div class='ctx'> #define EVENT_PORT_RELEASE              0x0000002b</div><div class='add'>+#define EVENT_UAP_STA_DEAUTH            0x0000002c</div><div class='add'>+#define EVENT_UAP_STA_ASSOC             0x0000002d</div><div class='add'>+#define EVENT_UAP_BSS_START             0x0000002e</div><div class='ctx'> #define EVENT_PRE_BEACON_LOST           0x00000031</div><div class='ctx'> #define EVENT_ADDBA                     0x00000033</div><div class='ctx'> #define EVENT_DELBA                     0x00000034</div><div class='ctx'> #define EVENT_BA_STREAM_TIEMOUT         0x00000037</div><div class='ctx'> #define EVENT_AMSDU_AGGR_CTRL           0x00000042</div><div class='add'>+#define EVENT_UAP_BSS_IDLE              0x00000043</div><div class='add'>+#define EVENT_UAP_BSS_ACTIVE            0x00000044</div><div class='ctx'> #define EVENT_WEP_ICV_ERR               0x00000046</div><div class='ctx'> #define EVENT_HS_ACT_REQ                0x00000047</div><div class='ctx'> #define EVENT_BW_CHANGE                 0x00000048</div><div class='del'>-</div><div class='add'>+#define EVENT_UAP_MIC_COUNTERMEASURES   0x0000004c</div><div class='ctx'> #define EVENT_HOSTWAKE_STAIE		0x0000004d</div><div class='ctx'> </div><div class='ctx'> #define EVENT_ID_MASK                   0xffff</div><div class='hunk'>@@ -813,7 +871,7 @@ struct host_cmd_ds_txpwr_cfg {</div><div class='ctx'> struct mwifiex_bcn_param {</div><div class='ctx'> 	u8 bssid[ETH_ALEN];</div><div class='ctx'> 	u8 rssi;</div><div class='del'>-	__le32 timestamp[2];</div><div class='add'>+	__le64 timestamp;</div><div class='ctx'> 	__le16 beacon_period;</div><div class='ctx'> 	__le16 cap_info_bitmap;</div><div class='ctx'> } __packed;</div><div class='hunk'>@@ -982,8 +1040,7 @@ struct mwifiex_ie_types_wmm_queue_status {</div><div class='ctx'> struct ieee_types_vendor_header {</div><div class='ctx'> 	u8 element_id;</div><div class='ctx'> 	u8 len;</div><div class='del'>-	u8 oui[3];</div><div class='del'>-	u8 oui_type;</div><div class='add'>+	u8 oui[4];	/* 0~2: oui, 3: oui_type */</div><div class='ctx'> 	u8 oui_subtype;</div><div class='ctx'> 	u8 version;</div><div class='ctx'> } __packed;</div><div class='hunk'>@@ -1007,7 +1064,7 @@ struct ieee_types_wmm_parameter {</div><div class='ctx'> 	struct ieee_types_vendor_header vend_hdr;</div><div class='ctx'> 	u8 qos_info_bitmap;</div><div class='ctx'> 	u8 reserved;</div><div class='del'>-	struct ieee_types_wmm_ac_parameters ac_params[IEEE80211_MAX_QUEUES];</div><div class='add'>+	struct ieee_types_wmm_ac_parameters ac_params[IEEE80211_NUM_ACS];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct ieee_types_wmm_info {</div><div class='hunk'>@@ -1028,7 +1085,7 @@ struct ieee_types_wmm_info {</div><div class='ctx'> </div><div class='ctx'> struct host_cmd_ds_wmm_get_status {</div><div class='ctx'> 	u8 queue_status_tlv[sizeof(struct mwifiex_ie_types_wmm_queue_status) *</div><div class='del'>-			      IEEE80211_MAX_QUEUES];</div><div class='add'>+			      IEEE80211_NUM_ACS];</div><div class='ctx'> 	u8 wmm_param_tlv[sizeof(struct ieee_types_wmm_parameter) + 2];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='hunk'>@@ -1045,7 +1102,7 @@ struct mwifiex_ie_types_htcap {</div><div class='ctx'> </div><div class='ctx'> struct mwifiex_ie_types_htinfo {</div><div class='ctx'> 	struct mwifiex_ie_types_header header;</div><div class='del'>-	struct ieee80211_ht_info ht_info;</div><div class='add'>+	struct ieee80211_ht_operation ht_oper;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct mwifiex_ie_types_2040bssco {</div><div class='hunk'>@@ -1093,6 +1150,101 @@ struct host_cmd_ds_802_11_eeprom_access {</div><div class='ctx'> 	u8 value;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+struct host_cmd_tlv {</div><div class='add'>+	__le16 type;</div><div class='add'>+	__le16 len;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct mwifiex_assoc_event {</div><div class='add'>+	u8 sta_addr[ETH_ALEN];</div><div class='add'>+	__le16 type;</div><div class='add'>+	__le16 len;</div><div class='add'>+	__le16 frame_control;</div><div class='add'>+	__le16 cap_info;</div><div class='add'>+	__le16 listen_interval;</div><div class='add'>+	u8 data[0];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_ds_sys_config {</div><div class='add'>+	__le16 action;</div><div class='add'>+	u8 tlv[0];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_akmp {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	__le16 key_mgmt;</div><div class='add'>+	__le16 key_mgmt_operation;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_pwk_cipher {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	__le16 proto;</div><div class='add'>+	u8 cipher;</div><div class='add'>+	u8 reserved;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_gwk_cipher {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	u8 cipher;</div><div class='add'>+	u8 reserved;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_passphrase {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	u8 passphrase[0];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_auth_type {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	u8 auth_type;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_encrypt_protocol {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	__le16 proto;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_ssid {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	u8 ssid[0];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_beacon_period {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	__le16 period;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_dtim_period {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	u8 period;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_frag_threshold {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	__le16 frag_thr;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_rts_threshold {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	__le16 rts_thr;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_retry_limit {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	u8 limit;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_mac_addr {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	u8 mac_addr[ETH_ALEN];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_tlv_channel_band {</div><div class='add'>+	struct host_cmd_tlv tlv;</div><div class='add'>+	u8 band_config;</div><div class='add'>+	u8 channel;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> struct host_cmd_ds_802_11_rf_channel {</div><div class='ctx'> 	__le16 action;</div><div class='ctx'> 	__le16 current_channel;</div><div class='hunk'>@@ -1146,6 +1298,31 @@ struct host_cmd_ds_pcie_details {</div><div class='ctx'> 	u32 sleep_cookie_addr_hi;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+struct mwifiex_ie_types_rssi_threshold {</div><div class='add'>+	struct mwifiex_ie_types_header header;</div><div class='add'>+	u8 abs_value;</div><div class='add'>+	u8 evt_freq;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct host_cmd_ds_802_11_subsc_evt {</div><div class='add'>+	__le16 action;</div><div class='add'>+	__le16 events;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct mwifiex_ie {</div><div class='add'>+	__le16 ie_index;</div><div class='add'>+	__le16 mgmt_subtype_mask;</div><div class='add'>+	__le16 ie_length;</div><div class='add'>+	u8 ie_buffer[IEEE_MAX_IE_SIZE];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define MAX_MGMT_IE_INDEX	16</div><div class='add'>+struct mwifiex_ie_list {</div><div class='add'>+	__le16 type;</div><div class='add'>+	__le16 len;</div><div class='add'>+	struct mwifiex_ie ie_list[MAX_MGMT_IE_INDEX];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> struct host_cmd_ds_command {</div><div class='ctx'> 	__le16 command;</div><div class='ctx'> 	__le16 size;</div><div class='hunk'>@@ -1195,6 +1372,8 @@ struct host_cmd_ds_command {</div><div class='ctx'> 		struct host_cmd_ds_set_bss_mode bss_mode;</div><div class='ctx'> 		struct host_cmd_ds_pcie_details pcie_host_spec;</div><div class='ctx'> 		struct host_cmd_ds_802_11_eeprom_access eeprom;</div><div class='add'>+		struct host_cmd_ds_802_11_subsc_evt subsc_evt;</div><div class='add'>+		struct host_cmd_ds_sys_config uap_sys_config;</div><div class='ctx'> 	} params;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/ie.c b/drivers/net/wireless/mwifiex/ie.c<br/>new file mode 100644<br/>index 000000000000..ceb82cd749cc<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/ie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/ie.c</a></div><div class='hunk'>@@ -0,0 +1,396 @@</div><div class='add'>+/*</div><div class='add'>+ * Marvell Wireless LAN device driver: management IE handling- setting and</div><div class='add'>+ * deleting IE.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012, Marvell International Ltd.</div><div class='add'>+ *</div><div class='add'>+ * This software file (the "File") is distributed by Marvell International</div><div class='add'>+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991</div><div class='add'>+ * (the "License").  You may use, redistribute and/or modify this File in</div><div class='add'>+ * accordance with the terms and conditions of the License, a copy of which</div><div class='add'>+ * is available by writing to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the</div><div class='add'>+ * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.</div><div class='add'>+ *</div><div class='add'>+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE</div><div class='add'>+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE</div><div class='add'>+ * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about</div><div class='add'>+ * this warranty disclaimer.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+/* This function checks if current IE index is used by any on other interface.</div><div class='add'>+ * Return: -1: yes, current IE index is used by someone else.</div><div class='add'>+ *          0: no, current IE index is NOT used by other interface.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+mwifiex_ie_index_used_by_other_intf(struct mwifiex_private *priv, u16 idx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct mwifiex_adapter *adapter = priv-&gt;adapter;</div><div class='add'>+	struct mwifiex_ie *ie;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;priv_num; i++) {</div><div class='add'>+		if (adapter-&gt;priv[i] != priv) {</div><div class='add'>+			ie = &amp;adapter-&gt;priv[i]-&gt;mgmt_ie[idx];</div><div class='add'>+			if (ie-&gt;mgmt_subtype_mask &amp;&amp; ie-&gt;ie_length)</div><div class='add'>+				return -1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Get unused IE index. This index will be used for setting new IE */</div><div class='add'>+static int</div><div class='add'>+mwifiex_ie_get_autoidx(struct mwifiex_private *priv, u16 subtype_mask,</div><div class='add'>+		       struct mwifiex_ie *ie, u16 *index)</div><div class='add'>+{</div><div class='add'>+	u16 mask, len, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;adapter-&gt;max_mgmt_ie_index; i++) {</div><div class='add'>+		mask = le16_to_cpu(priv-&gt;mgmt_ie[i].mgmt_subtype_mask);</div><div class='add'>+		len = le16_to_cpu(priv-&gt;mgmt_ie[i].ie_length) +</div><div class='add'>+		      le16_to_cpu(ie-&gt;ie_length);</div><div class='add'>+</div><div class='add'>+		if (mask == MWIFIEX_AUTO_IDX_MASK)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (mask == subtype_mask) {</div><div class='add'>+			if (len &gt; IEEE_MAX_IE_SIZE)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			*index = i;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!priv-&gt;mgmt_ie[i].ie_length) {</div><div class='add'>+			if (mwifiex_ie_index_used_by_other_intf(priv, i))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			*index = i;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function prepares IE data buffer for command to be sent to FW */</div><div class='add'>+static int</div><div class='add'>+mwifiex_update_autoindex_ies(struct mwifiex_private *priv,</div><div class='add'>+			     struct mwifiex_ie_list *ie_list)</div><div class='add'>+{</div><div class='add'>+	u16 travel_len, index, mask;</div><div class='add'>+	s16 input_len;</div><div class='add'>+	struct mwifiex_ie *ie;</div><div class='add'>+	u8 *tmp;</div><div class='add'>+</div><div class='add'>+	input_len = le16_to_cpu(ie_list-&gt;len);</div><div class='add'>+	travel_len = sizeof(struct host_cmd_tlv);</div><div class='add'>+</div><div class='add'>+	ie_list-&gt;len = 0;</div><div class='add'>+</div><div class='add'>+	while (input_len &gt; 0) {</div><div class='add'>+		ie = (struct mwifiex_ie *)(((u8 *)ie_list) + travel_len);</div><div class='add'>+		input_len -= le16_to_cpu(ie-&gt;ie_length) + MWIFIEX_IE_HDR_SIZE;</div><div class='add'>+		travel_len += le16_to_cpu(ie-&gt;ie_length) + MWIFIEX_IE_HDR_SIZE;</div><div class='add'>+</div><div class='add'>+		index = le16_to_cpu(ie-&gt;ie_index);</div><div class='add'>+		mask = le16_to_cpu(ie-&gt;mgmt_subtype_mask);</div><div class='add'>+</div><div class='add'>+		if (index == MWIFIEX_AUTO_IDX_MASK) {</div><div class='add'>+			/* automatic addition */</div><div class='add'>+			if (mwifiex_ie_get_autoidx(priv, mask, ie, &amp;index))</div><div class='add'>+				return -1;</div><div class='add'>+			if (index == MWIFIEX_AUTO_IDX_MASK)</div><div class='add'>+				return -1;</div><div class='add'>+</div><div class='add'>+			tmp = (u8 *)&amp;priv-&gt;mgmt_ie[index].ie_buffer;</div><div class='add'>+			tmp += le16_to_cpu(priv-&gt;mgmt_ie[index].ie_length);</div><div class='add'>+			memcpy(tmp, &amp;ie-&gt;ie_buffer, le16_to_cpu(ie-&gt;ie_length));</div><div class='add'>+			le16_add_cpu(&amp;priv-&gt;mgmt_ie[index].ie_length,</div><div class='add'>+				     le16_to_cpu(ie-&gt;ie_length));</div><div class='add'>+			priv-&gt;mgmt_ie[index].ie_index = cpu_to_le16(index);</div><div class='add'>+			priv-&gt;mgmt_ie[index].mgmt_subtype_mask =</div><div class='add'>+							cpu_to_le16(mask);</div><div class='add'>+</div><div class='add'>+			ie-&gt;ie_index = cpu_to_le16(index);</div><div class='add'>+			ie-&gt;ie_length = priv-&gt;mgmt_ie[index].ie_length;</div><div class='add'>+			memcpy(&amp;ie-&gt;ie_buffer, &amp;priv-&gt;mgmt_ie[index].ie_buffer,</div><div class='add'>+			       le16_to_cpu(priv-&gt;mgmt_ie[index].ie_length));</div><div class='add'>+		} else {</div><div class='add'>+			if (mask != MWIFIEX_DELETE_MASK)</div><div class='add'>+				return -1;</div><div class='add'>+			/*</div><div class='add'>+			 * Check if this index is being used on any</div><div class='add'>+			 * other interface.</div><div class='add'>+			 */</div><div class='add'>+			if (mwifiex_ie_index_used_by_other_intf(priv, index))</div><div class='add'>+				return -1;</div><div class='add'>+</div><div class='add'>+			ie-&gt;ie_length = 0;</div><div class='add'>+			memcpy(&amp;priv-&gt;mgmt_ie[index], ie,</div><div class='add'>+			       sizeof(struct mwifiex_ie));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		le16_add_cpu(&amp;ie_list-&gt;len,</div><div class='add'>+			     le16_to_cpu(priv-&gt;mgmt_ie[index].ie_length) +</div><div class='add'>+			     MWIFIEX_IE_HDR_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_UAP)</div><div class='add'>+		return mwifiex_send_cmd_async(priv, HostCmd_CMD_UAP_SYS_CONFIG,</div><div class='add'>+					      HostCmd_ACT_GEN_SET,</div><div class='add'>+					      UAP_CUSTOM_IE_I, ie_list);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Copy individual custom IEs for beacon, probe response and assoc response</div><div class='add'>+ * and prepare single structure for IE setting.</div><div class='add'>+ * This function also updates allocated IE indices from driver.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+mwifiex_update_uap_custom_ie(struct mwifiex_private *priv,</div><div class='add'>+			     struct mwifiex_ie *beacon_ie, u16 *beacon_idx,</div><div class='add'>+			     struct mwifiex_ie *pr_ie, u16 *probe_idx,</div><div class='add'>+			     struct mwifiex_ie *ar_ie, u16 *assoc_idx)</div><div class='add'>+{</div><div class='add'>+	struct mwifiex_ie_list *ap_custom_ie;</div><div class='add'>+	u8 *pos;</div><div class='add'>+	u16 len;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ap_custom_ie = kzalloc(sizeof(struct mwifiex_ie), GFP_KERNEL);</div><div class='add'>+	if (!ap_custom_ie)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ap_custom_ie-&gt;type = cpu_to_le16(TLV_TYPE_MGMT_IE);</div><div class='add'>+	pos = (u8 *)ap_custom_ie-&gt;ie_list;</div><div class='add'>+</div><div class='add'>+	if (beacon_ie) {</div><div class='add'>+		len = sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE +</div><div class='add'>+		      le16_to_cpu(beacon_ie-&gt;ie_length);</div><div class='add'>+		memcpy(pos, beacon_ie, len);</div><div class='add'>+		pos += len;</div><div class='add'>+		le16_add_cpu(&amp;ap_custom_ie-&gt;len, len);</div><div class='add'>+	}</div><div class='add'>+	if (pr_ie) {</div><div class='add'>+		len = sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE +</div><div class='add'>+		      le16_to_cpu(pr_ie-&gt;ie_length);</div><div class='add'>+		memcpy(pos, pr_ie, len);</div><div class='add'>+		pos += len;</div><div class='add'>+		le16_add_cpu(&amp;ap_custom_ie-&gt;len, len);</div><div class='add'>+	}</div><div class='add'>+	if (ar_ie) {</div><div class='add'>+		len = sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE +</div><div class='add'>+		      le16_to_cpu(ar_ie-&gt;ie_length);</div><div class='add'>+		memcpy(pos, ar_ie, len);</div><div class='add'>+		pos += len;</div><div class='add'>+		le16_add_cpu(&amp;ap_custom_ie-&gt;len, len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mwifiex_update_autoindex_ies(priv, ap_custom_ie);</div><div class='add'>+</div><div class='add'>+	pos = (u8 *)(&amp;ap_custom_ie-&gt;ie_list[0].ie_index);</div><div class='add'>+	if (beacon_ie &amp;&amp; *beacon_idx == MWIFIEX_AUTO_IDX_MASK) {</div><div class='add'>+		/* save beacon ie index after auto-indexing */</div><div class='add'>+		*beacon_idx = le16_to_cpu(ap_custom_ie-&gt;ie_list[0].ie_index);</div><div class='add'>+		len = sizeof(*beacon_ie) - IEEE_MAX_IE_SIZE +</div><div class='add'>+		      le16_to_cpu(beacon_ie-&gt;ie_length);</div><div class='add'>+		pos += len;</div><div class='add'>+	}</div><div class='add'>+	if (pr_ie &amp;&amp; le16_to_cpu(pr_ie-&gt;ie_index) == MWIFIEX_AUTO_IDX_MASK) {</div><div class='add'>+		/* save probe resp ie index after auto-indexing */</div><div class='add'>+		*probe_idx = *((u16 *)pos);</div><div class='add'>+		len = sizeof(*pr_ie) - IEEE_MAX_IE_SIZE +</div><div class='add'>+		      le16_to_cpu(pr_ie-&gt;ie_length);</div><div class='add'>+		pos += len;</div><div class='add'>+	}</div><div class='add'>+	if (ar_ie &amp;&amp; le16_to_cpu(ar_ie-&gt;ie_index) == MWIFIEX_AUTO_IDX_MASK)</div><div class='add'>+		/* save assoc resp ie index after auto-indexing */</div><div class='add'>+		*assoc_idx = *((u16 *)pos);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function parses different IEs- Tail IEs, beacon IEs, probe response IEs,</div><div class='add'>+ * association response IEs from cfg80211_ap_settings function and sets these IE</div><div class='add'>+ * to FW.</div><div class='add'>+ */</div><div class='add'>+int mwifiex_set_mgmt_ies(struct mwifiex_private *priv,</div><div class='add'>+			 struct cfg80211_ap_settings *params)</div><div class='add'>+{</div><div class='add'>+	struct mwifiex_ie *beacon_ie = NULL, *pr_ie = NULL;</div><div class='add'>+	struct mwifiex_ie *ar_ie = NULL, *rsn_ie = NULL;</div><div class='add'>+	struct ieee_types_header *ie = NULL;</div><div class='add'>+	u16 beacon_idx = MWIFIEX_AUTO_IDX_MASK, pr_idx = MWIFIEX_AUTO_IDX_MASK;</div><div class='add'>+	u16 ar_idx = MWIFIEX_AUTO_IDX_MASK, rsn_idx = MWIFIEX_AUTO_IDX_MASK;</div><div class='add'>+	u16 mask;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (params-&gt;beacon.tail &amp;&amp; params-&gt;beacon.tail_len) {</div><div class='add'>+		ie = (void *)cfg80211_find_ie(WLAN_EID_RSN, params-&gt;beacon.tail,</div><div class='add'>+					      params-&gt;beacon.tail_len);</div><div class='add'>+		if (ie) {</div><div class='add'>+			rsn_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL);</div><div class='add'>+			if (!rsn_ie)</div><div class='add'>+				return -ENOMEM;</div><div class='add'>+</div><div class='add'>+			rsn_ie-&gt;ie_index = cpu_to_le16(rsn_idx);</div><div class='add'>+			mask = MGMT_MASK_BEACON | MGMT_MASK_PROBE_RESP |</div><div class='add'>+			       MGMT_MASK_ASSOC_RESP;</div><div class='add'>+			rsn_ie-&gt;mgmt_subtype_mask = cpu_to_le16(mask);</div><div class='add'>+			rsn_ie-&gt;ie_length = cpu_to_le16(ie-&gt;len + 2);</div><div class='add'>+			memcpy(rsn_ie-&gt;ie_buffer, ie, ie-&gt;len + 2);</div><div class='add'>+</div><div class='add'>+			if (mwifiex_update_uap_custom_ie(priv, rsn_ie, &amp;rsn_idx,</div><div class='add'>+							 NULL, NULL,</div><div class='add'>+							 NULL, NULL)) {</div><div class='add'>+				ret = -1;</div><div class='add'>+				goto done;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			priv-&gt;rsn_idx = rsn_idx;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (params-&gt;beacon.beacon_ies &amp;&amp; params-&gt;beacon.beacon_ies_len) {</div><div class='add'>+		beacon_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL);</div><div class='add'>+		if (!beacon_ie) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		beacon_ie-&gt;ie_index = cpu_to_le16(beacon_idx);</div><div class='add'>+		beacon_ie-&gt;mgmt_subtype_mask = cpu_to_le16(MGMT_MASK_BEACON);</div><div class='add'>+		beacon_ie-&gt;ie_length =</div><div class='add'>+				cpu_to_le16(params-&gt;beacon.beacon_ies_len);</div><div class='add'>+		memcpy(beacon_ie-&gt;ie_buffer, params-&gt;beacon.beacon_ies,</div><div class='add'>+		       params-&gt;beacon.beacon_ies_len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (params-&gt;beacon.proberesp_ies &amp;&amp; params-&gt;beacon.proberesp_ies_len) {</div><div class='add'>+		pr_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL);</div><div class='add'>+		if (!pr_ie) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pr_ie-&gt;ie_index = cpu_to_le16(pr_idx);</div><div class='add'>+		pr_ie-&gt;mgmt_subtype_mask = cpu_to_le16(MGMT_MASK_PROBE_RESP);</div><div class='add'>+		pr_ie-&gt;ie_length =</div><div class='add'>+				cpu_to_le16(params-&gt;beacon.proberesp_ies_len);</div><div class='add'>+		memcpy(pr_ie-&gt;ie_buffer, params-&gt;beacon.proberesp_ies,</div><div class='add'>+		       params-&gt;beacon.proberesp_ies_len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (params-&gt;beacon.assocresp_ies &amp;&amp; params-&gt;beacon.assocresp_ies_len) {</div><div class='add'>+		ar_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL);</div><div class='add'>+		if (!ar_ie) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ar_ie-&gt;ie_index = cpu_to_le16(ar_idx);</div><div class='add'>+		mask = MGMT_MASK_ASSOC_RESP | MGMT_MASK_REASSOC_RESP;</div><div class='add'>+		ar_ie-&gt;mgmt_subtype_mask = cpu_to_le16(mask);</div><div class='add'>+		ar_ie-&gt;ie_length =</div><div class='add'>+				cpu_to_le16(params-&gt;beacon.assocresp_ies_len);</div><div class='add'>+		memcpy(ar_ie-&gt;ie_buffer, params-&gt;beacon.assocresp_ies,</div><div class='add'>+		       params-&gt;beacon.assocresp_ies_len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (beacon_ie || pr_ie || ar_ie) {</div><div class='add'>+		ret = mwifiex_update_uap_custom_ie(priv, beacon_ie,</div><div class='add'>+						   &amp;beacon_idx, pr_ie,</div><div class='add'>+						   &amp;pr_idx, ar_ie, &amp;ar_idx);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;beacon_idx = beacon_idx;</div><div class='add'>+	priv-&gt;proberesp_idx = pr_idx;</div><div class='add'>+	priv-&gt;assocresp_idx = ar_idx;</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	kfree(beacon_ie);</div><div class='add'>+	kfree(pr_ie);</div><div class='add'>+	kfree(ar_ie);</div><div class='add'>+	kfree(rsn_ie);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function removes management IE set */</div><div class='add'>+int mwifiex_del_mgmt_ies(struct mwifiex_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct mwifiex_ie *beacon_ie = NULL, *pr_ie = NULL;</div><div class='add'>+	struct mwifiex_ie *ar_ie = NULL, *rsn_ie = NULL;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;rsn_idx != MWIFIEX_AUTO_IDX_MASK) {</div><div class='add'>+		rsn_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL);</div><div class='add'>+		if (!rsn_ie)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		rsn_ie-&gt;ie_index = cpu_to_le16(priv-&gt;rsn_idx);</div><div class='add'>+		rsn_ie-&gt;mgmt_subtype_mask = cpu_to_le16(MWIFIEX_DELETE_MASK);</div><div class='add'>+		rsn_ie-&gt;ie_length = 0;</div><div class='add'>+		if (mwifiex_update_uap_custom_ie(priv, rsn_ie, &amp;priv-&gt;rsn_idx,</div><div class='add'>+						 NULL, &amp;priv-&gt;proberesp_idx,</div><div class='add'>+						 NULL, &amp;priv-&gt;assocresp_idx)) {</div><div class='add'>+			ret = -1;</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;rsn_idx = MWIFIEX_AUTO_IDX_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;beacon_idx != MWIFIEX_AUTO_IDX_MASK) {</div><div class='add'>+		beacon_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL);</div><div class='add'>+		if (!beacon_ie) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+		beacon_ie-&gt;ie_index = cpu_to_le16(priv-&gt;beacon_idx);</div><div class='add'>+		beacon_ie-&gt;mgmt_subtype_mask = cpu_to_le16(MWIFIEX_DELETE_MASK);</div><div class='add'>+		beacon_ie-&gt;ie_length = 0;</div><div class='add'>+	}</div><div class='add'>+	if (priv-&gt;proberesp_idx != MWIFIEX_AUTO_IDX_MASK) {</div><div class='add'>+		pr_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL);</div><div class='add'>+		if (!pr_ie) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+		pr_ie-&gt;ie_index = cpu_to_le16(priv-&gt;proberesp_idx);</div><div class='add'>+		pr_ie-&gt;mgmt_subtype_mask = cpu_to_le16(MWIFIEX_DELETE_MASK);</div><div class='add'>+		pr_ie-&gt;ie_length = 0;</div><div class='add'>+	}</div><div class='add'>+	if (priv-&gt;assocresp_idx != MWIFIEX_AUTO_IDX_MASK) {</div><div class='add'>+		ar_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL);</div><div class='add'>+		if (!ar_ie) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+		ar_ie-&gt;ie_index = cpu_to_le16(priv-&gt;assocresp_idx);</div><div class='add'>+		ar_ie-&gt;mgmt_subtype_mask = cpu_to_le16(MWIFIEX_DELETE_MASK);</div><div class='add'>+		ar_ie-&gt;ie_length = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (beacon_ie || pr_ie || ar_ie)</div><div class='add'>+		ret = mwifiex_update_uap_custom_ie(priv,</div><div class='add'>+						   beacon_ie, &amp;priv-&gt;beacon_idx,</div><div class='add'>+						   pr_ie, &amp;priv-&gt;proberesp_idx,</div><div class='add'>+						   ar_ie, &amp;priv-&gt;assocresp_idx);</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	kfree(beacon_ie);</div><div class='add'>+	kfree(pr_ie);</div><div class='add'>+	kfree(ar_ie);</div><div class='add'>+	kfree(rsn_ie);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/init.c b/drivers/net/wireless/mwifiex/init.c<br/>index 54bb4839b57c..c1cb004db913 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/init.c</a></div><div class='hunk'>@@ -131,6 +131,8 @@ static int mwifiex_init_priv(struct mwifiex_private *priv)</div><div class='ctx'> 	priv-&gt;wmm_qosinfo = 0;</div><div class='ctx'> 	priv-&gt;curr_bcn_buf = NULL;</div><div class='ctx'> 	priv-&gt;curr_bcn_size = 0;</div><div class='add'>+	priv-&gt;wps_ie = NULL;</div><div class='add'>+	priv-&gt;wps_ie_len = 0;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;scan_block = false;</div><div class='ctx'> </div><div class='hunk'>@@ -186,10 +188,10 @@ static void mwifiex_init_adapter(struct mwifiex_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;cmd_sent = false;</div><div class='ctx'> </div><div class='del'>-	if (adapter-&gt;iface_type == MWIFIEX_PCIE)</div><div class='del'>-		adapter-&gt;data_sent = false;</div><div class='del'>-	else</div><div class='add'>+	if (adapter-&gt;iface_type == MWIFIEX_SDIO)</div><div class='ctx'> 		adapter-&gt;data_sent = true;</div><div class='add'>+	else</div><div class='add'>+		adapter-&gt;data_sent = false;</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;cmd_resp_received = false;</div><div class='ctx'> 	adapter-&gt;event_received = false;</div><div class='hunk'>@@ -277,6 +279,7 @@ static void mwifiex_init_adapter(struct mwifiex_adapter *adapter)</div><div class='ctx'> 	memset(&amp;adapter-&gt;arp_filter, 0, sizeof(adapter-&gt;arp_filter));</div><div class='ctx'> 	adapter-&gt;arp_filter_size = 0;</div><div class='ctx'> 	adapter-&gt;channel_type = NL80211_CHAN_HT20;</div><div class='add'>+	adapter-&gt;max_mgmt_ie_index = MAX_MGMT_IE_INDEX;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -377,7 +380,8 @@ mwifiex_free_adapter(struct mwifiex_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(adapter-&gt;dev, "info: free scan table\n");</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;if_ops.cleanup_if(adapter);</div><div class='add'>+	if (adapter-&gt;if_ops.cleanup_if)</div><div class='add'>+		adapter-&gt;if_ops.cleanup_if(adapter);</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;sleep_cfm)</div><div class='ctx'> 		dev_kfree_skb_any(adapter-&gt;sleep_cfm);</div><div class='hunk'>@@ -417,6 +421,8 @@ int mwifiex_init_lock_list(struct mwifiex_adapter *adapter)</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;cmd_pending_q_lock);</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;scan_pending_q_lock);</div><div class='ctx'> </div><div class='add'>+	skb_queue_head_init(&amp;adapter-&gt;usb_rx_data_q);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; adapter-&gt;priv_num; ++i) {</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;adapter-&gt;bss_prio_tbl[i].bss_prio_head);</div><div class='ctx'> 		adapter-&gt;bss_prio_tbl[i].bss_prio_cur = NULL;</div><div class='hunk'>@@ -572,6 +578,7 @@ mwifiex_shutdown_drv(struct mwifiex_adapter *adapter)</div><div class='ctx'> 	struct mwifiex_private *priv;</div><div class='ctx'> 	s32 i;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	struct sk_buff *skb;</div><div class='ctx'> </div><div class='ctx'> 	/* mwifiex already shutdown */</div><div class='ctx'> 	if (adapter-&gt;hw_status == MWIFIEX_HW_STATUS_NOT_READY)</div><div class='hunk'>@@ -599,6 +606,18 @@ mwifiex_shutdown_drv(struct mwifiex_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;adapter-&gt;mwifiex_lock, flags);</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;if_ops.data_complete) {</div><div class='add'>+		while ((skb = skb_dequeue(&amp;adapter-&gt;usb_rx_data_q))) {</div><div class='add'>+			struct mwifiex_rxinfo *rx_info = MWIFIEX_SKB_RXCB(skb);</div><div class='add'>+</div><div class='add'>+			priv = adapter-&gt;priv[rx_info-&gt;bss_num];</div><div class='add'>+			if (priv)</div><div class='add'>+				priv-&gt;stats.rx_dropped++;</div><div class='add'>+</div><div class='add'>+			adapter-&gt;if_ops.data_complete(adapter, skb);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Free adapter structure */</div><div class='ctx'> 	mwifiex_free_adapter(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -628,24 +647,28 @@ int mwifiex_dnld_fw(struct mwifiex_adapter *adapter,</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u32 poll_num = 1;</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;winner = 0;</div><div class='add'>+	if (adapter-&gt;if_ops.check_fw_status) {</div><div class='add'>+		adapter-&gt;winner = 0;</div><div class='ctx'> </div><div class='del'>-	/* Check if firmware is already running */</div><div class='del'>-	ret = adapter-&gt;if_ops.check_fw_status(adapter, poll_num);</div><div class='del'>-	if (!ret) {</div><div class='del'>-		dev_notice(adapter-&gt;dev,</div><div class='del'>-			   "WLAN FW already running! Skip FW download\n");</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-	poll_num = MAX_FIRMWARE_POLL_TRIES;</div><div class='del'>-</div><div class='del'>-	/* Check if we are the winner for downloading FW */</div><div class='del'>-	if (!adapter-&gt;winner) {</div><div class='del'>-		dev_notice(adapter-&gt;dev,</div><div class='del'>-			   "Other intf already running! Skip FW download\n");</div><div class='del'>-		poll_num = MAX_MULTI_INTERFACE_POLL_TRIES;</div><div class='del'>-		goto poll_fw;</div><div class='add'>+		/* check if firmware is already running */</div><div class='add'>+		ret = adapter-&gt;if_ops.check_fw_status(adapter, poll_num);</div><div class='add'>+		if (!ret) {</div><div class='add'>+			dev_notice(adapter-&gt;dev,</div><div class='add'>+				   "WLAN FW already running! Skip FW dnld\n");</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		poll_num = MAX_FIRMWARE_POLL_TRIES;</div><div class='add'>+</div><div class='add'>+		/* check if we are the winner for downloading FW */</div><div class='add'>+		if (!adapter-&gt;winner) {</div><div class='add'>+			dev_notice(adapter-&gt;dev,</div><div class='add'>+				   "FW already running! Skip FW dnld\n");</div><div class='add'>+			poll_num = MAX_MULTI_INTERFACE_POLL_TRIES;</div><div class='add'>+			goto poll_fw;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	if (pmfw) {</div><div class='ctx'> 		/* Download firmware with helper */</div><div class='ctx'> 		ret = adapter-&gt;if_ops.prog_fw(adapter, pmfw);</div><div class='hunk'>@@ -664,6 +687,8 @@ poll_fw:</div><div class='ctx'> 	}</div><div class='ctx'> done:</div><div class='ctx'> 	/* re-enable host interrupt for mwifiex after fw dnld is successful */</div><div class='del'>-	adapter-&gt;if_ops.enable_int(adapter);</div><div class='add'>+	if (adapter-&gt;if_ops.enable_int)</div><div class='add'>+		adapter-&gt;if_ops.enable_int(adapter);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/ioctl.h b/drivers/net/wireless/mwifiex/ioctl.h<br/>index 7ca4e8234f3e..e6be6ee75951 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/ioctl.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/ioctl.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/ioctl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/ioctl.h</a></div><div class='hunk'>@@ -62,6 +62,36 @@ enum {</div><div class='ctx'> 	BAND_AN = 16,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define MWIFIEX_WPA_PASSHPHRASE_LEN 64</div><div class='add'>+struct wpa_param {</div><div class='add'>+	u8 pairwise_cipher_wpa;</div><div class='add'>+	u8 pairwise_cipher_wpa2;</div><div class='add'>+	u8 group_cipher;</div><div class='add'>+	u32 length;</div><div class='add'>+	u8 passphrase[MWIFIEX_WPA_PASSHPHRASE_LEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define KEY_MGMT_ON_HOST        0x03</div><div class='add'>+#define MWIFIEX_AUTH_MODE_AUTO  0xFF</div><div class='add'>+#define BAND_CONFIG_MANUAL      0x00</div><div class='add'>+struct mwifiex_uap_bss_param {</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 band_cfg;</div><div class='add'>+	u16 rts_threshold;</div><div class='add'>+	u16 frag_threshold;</div><div class='add'>+	u8 retry_limit;</div><div class='add'>+	struct mwifiex_802_11_ssid ssid;</div><div class='add'>+	u8 bcast_ssid_ctl;</div><div class='add'>+	u8 radio_ctl;</div><div class='add'>+	u8 dtim_period;</div><div class='add'>+	u16 beacon_period;</div><div class='add'>+	u16 auth_mode;</div><div class='add'>+	u16 protocol;</div><div class='add'>+	u16 key_mgmt;</div><div class='add'>+	u16 key_mgmt_operation;</div><div class='add'>+	struct wpa_param wpa_cfg;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> 	ADHOC_IDLE,</div><div class='ctx'> 	ADHOC_STARTED,</div><div class='hunk'>@@ -85,34 +115,6 @@ struct mwifiex_ds_get_stats {</div><div class='ctx'> 	u32 wep_icv_error[4];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define BCN_RSSI_AVG_MASK               0x00000002</div><div class='del'>-#define BCN_NF_AVG_MASK                 0x00000200</div><div class='del'>-#define ALL_RSSI_INFO_MASK              0x00000fff</div><div class='del'>-</div><div class='del'>-struct mwifiex_ds_get_signal {</div><div class='del'>-	/*</div><div class='del'>-	 * Bit0:  Last Beacon RSSI,  Bit1:  Average Beacon RSSI,</div><div class='del'>-	 * Bit2:  Last Data RSSI,    Bit3:  Average Data RSSI,</div><div class='del'>-	 * Bit4:  Last Beacon SNR,   Bit5:  Average Beacon SNR,</div><div class='del'>-	 * Bit6:  Last Data SNR,     Bit7:  Average Data SNR,</div><div class='del'>-	 * Bit8:  Last Beacon NF,    Bit9:  Average Beacon NF,</div><div class='del'>-	 * Bit10: Last Data NF,      Bit11: Average Data NF</div><div class='del'>-	 */</div><div class='del'>-	u16 selector;</div><div class='del'>-	s16 bcn_rssi_last;</div><div class='del'>-	s16 bcn_rssi_avg;</div><div class='del'>-	s16 data_rssi_last;</div><div class='del'>-	s16 data_rssi_avg;</div><div class='del'>-	s16 bcn_snr_last;</div><div class='del'>-	s16 bcn_snr_avg;</div><div class='del'>-	s16 data_snr_last;</div><div class='del'>-	s16 data_snr_avg;</div><div class='del'>-	s16 bcn_nf_last;</div><div class='del'>-	s16 bcn_nf_avg;</div><div class='del'>-	s16 data_nf_last;</div><div class='del'>-	s16 data_nf_avg;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define MWIFIEX_MAX_VER_STR_LEN    128</div><div class='ctx'> </div><div class='ctx'> struct mwifiex_ver_ext {</div><div class='hunk'>@@ -124,7 +126,7 @@ struct mwifiex_bss_info {</div><div class='ctx'> 	u32 bss_mode;</div><div class='ctx'> 	struct cfg80211_ssid ssid;</div><div class='ctx'> 	u32 bss_chan;</div><div class='del'>-	u32 region_code;</div><div class='add'>+	u8 country_code[3];</div><div class='ctx'> 	u32 media_connected;</div><div class='ctx'> 	u32 max_power_level;</div><div class='ctx'> 	u32 min_power_level;</div><div class='hunk'>@@ -297,6 +299,8 @@ struct mwifiex_ds_read_eeprom {</div><div class='ctx'> </div><div class='ctx'> #define IEEE_MAX_IE_SIZE		256</div><div class='ctx'> </div><div class='add'>+#define MWIFIEX_IE_HDR_SIZE	(sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE)</div><div class='add'>+</div><div class='ctx'> struct mwifiex_ds_misc_gen_ie {</div><div class='ctx'> 	u32 type;</div><div class='ctx'> 	u32 len;</div><div class='hunk'>@@ -308,8 +312,30 @@ struct mwifiex_ds_misc_cmd {</div><div class='ctx'> 	u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define BITMASK_BCN_RSSI_LOW	BIT(0)</div><div class='add'>+#define BITMASK_BCN_RSSI_HIGH	BIT(4)</div><div class='add'>+</div><div class='add'>+enum subsc_evt_rssi_state {</div><div class='add'>+	EVENT_HANDLED,</div><div class='add'>+	RSSI_LOW_RECVD,</div><div class='add'>+	RSSI_HIGH_RECVD</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct subsc_evt_cfg {</div><div class='add'>+	u8 abs_value;</div><div class='add'>+	u8 evt_freq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mwifiex_ds_misc_subsc_evt {</div><div class='add'>+	u16 action;</div><div class='add'>+	u16 events;</div><div class='add'>+	struct subsc_evt_cfg bcn_l_rssi_cfg;</div><div class='add'>+	struct subsc_evt_cfg bcn_h_rssi_cfg;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define MWIFIEX_MAX_VSIE_LEN       (256)</div><div class='ctx'> #define MWIFIEX_MAX_VSIE_NUM       (8)</div><div class='add'>+#define MWIFIEX_VSIE_MASK_CLEAR    0x00</div><div class='ctx'> #define MWIFIEX_VSIE_MASK_SCAN     0x01</div><div class='ctx'> #define MWIFIEX_VSIE_MASK_ASSOC    0x02</div><div class='ctx'> #define MWIFIEX_VSIE_MASK_ADHOC    0x04</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/join.c b/drivers/net/wireless/mwifiex/join.c<br/>index 8f9382b9c3ca..d6b4fb04011f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/join.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/join.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/join.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/join.c</a></div><div class='hunk'>@@ -118,15 +118,15 @@ mwifiex_cmd_append_tsf_tlv(struct mwifiex_private *priv, u8 **buffer,</div><div class='ctx'> 	*buffer += sizeof(tsf_tlv.header);</div><div class='ctx'> </div><div class='ctx'> 	/* TSF at the time when beacon/probe_response was received */</div><div class='del'>-	tsf_val = cpu_to_le64(bss_desc-&gt;network_tsf);</div><div class='add'>+	tsf_val = cpu_to_le64(bss_desc-&gt;fw_tsf);</div><div class='ctx'> 	memcpy(*buffer, &amp;tsf_val, sizeof(tsf_val));</div><div class='ctx'> 	*buffer += sizeof(tsf_val);</div><div class='ctx'> </div><div class='del'>-	memcpy(&amp;tsf_val, bss_desc-&gt;time_stamp, sizeof(tsf_val));</div><div class='add'>+	tsf_val = cpu_to_le64(bss_desc-&gt;timestamp);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(priv-&gt;adapter-&gt;dev,</div><div class='ctx'> 		"info: %s: TSF offset calc: %016llx - %016llx\n",</div><div class='del'>-		__func__, tsf_val, bss_desc-&gt;network_tsf);</div><div class='add'>+		__func__, bss_desc-&gt;timestamp, bss_desc-&gt;fw_tsf);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(*buffer, &amp;tsf_val, sizeof(tsf_val));</div><div class='ctx'> 	*buffer += sizeof(tsf_val);</div><div class='hunk'>@@ -225,6 +225,48 @@ mwifiex_setup_rates_from_bssdesc(struct mwifiex_private *priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * This function appends a WPS IE. It is called from the network join command</div><div class='add'>+ * preparation routine.</div><div class='add'>+ *</div><div class='add'>+ * If the IE buffer has been setup by the application, this routine appends</div><div class='add'>+ * the buffer as a WPS TLV type to the request.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+mwifiex_cmd_append_wps_ie(struct mwifiex_private *priv, u8 **buffer)</div><div class='add'>+{</div><div class='add'>+	int retLen = 0;</div><div class='add'>+	struct mwifiex_ie_types_header ie_header;</div><div class='add'>+</div><div class='add'>+	if (!buffer || !*buffer)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If there is a wps ie buffer setup, append it to the return</div><div class='add'>+	 * parameter buffer pointer.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;wps_ie_len) {</div><div class='add'>+		dev_dbg(priv-&gt;adapter-&gt;dev, "cmd: append wps ie %d to %p\n",</div><div class='add'>+			priv-&gt;wps_ie_len, *buffer);</div><div class='add'>+</div><div class='add'>+		/* Wrap the generic IE buffer with a pass through TLV type */</div><div class='add'>+		ie_header.type = cpu_to_le16(TLV_TYPE_MGMT_IE);</div><div class='add'>+		ie_header.len = cpu_to_le16(priv-&gt;wps_ie_len);</div><div class='add'>+		memcpy(*buffer, &amp;ie_header, sizeof(ie_header));</div><div class='add'>+		*buffer += sizeof(ie_header);</div><div class='add'>+		retLen += sizeof(ie_header);</div><div class='add'>+</div><div class='add'>+		memcpy(*buffer, priv-&gt;wps_ie, priv-&gt;wps_ie_len);</div><div class='add'>+		*buffer += priv-&gt;wps_ie_len;</div><div class='add'>+		retLen += priv-&gt;wps_ie_len;</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(priv-&gt;wps_ie);</div><div class='add'>+	priv-&gt;wps_ie_len = 0;</div><div class='add'>+	return retLen;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * This function appends a WAPI IE.</div><div class='ctx'>  *</div><div class='ctx'>  * This function is called from the network join command preparation routine.</div><div class='hunk'>@@ -480,6 +522,8 @@ int mwifiex_cmd_802_11_associate(struct mwifiex_private *priv,</div><div class='ctx'> 	if (priv-&gt;sec_info.wapi_enabled &amp;&amp; priv-&gt;wapi_ie_len)</div><div class='ctx'> 		mwifiex_cmd_append_wapi_ie(priv, &amp;pos);</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;wps.session_enable &amp;&amp; priv-&gt;wps_ie_len)</div><div class='add'>+		mwifiex_cmd_append_wps_ie(priv, &amp;pos);</div><div class='ctx'> </div><div class='ctx'> 	mwifiex_cmd_append_generic_ie(priv, &amp;pos);</div><div class='ctx'> </div><div class='hunk'>@@ -932,20 +976,20 @@ mwifiex_cmd_802_11_ad_hoc_start(struct mwifiex_private *priv,</div><div class='ctx'> 		/* Fill HT INFORMATION */</div><div class='ctx'> 		ht_info = (struct mwifiex_ie_types_htinfo *) pos;</div><div class='ctx'> 		memset(ht_info, 0, sizeof(struct mwifiex_ie_types_htinfo));</div><div class='del'>-		ht_info-&gt;header.type = cpu_to_le16(WLAN_EID_HT_INFORMATION);</div><div class='add'>+		ht_info-&gt;header.type = cpu_to_le16(WLAN_EID_HT_OPERATION);</div><div class='ctx'> 		ht_info-&gt;header.len =</div><div class='del'>-				cpu_to_le16(sizeof(struct ieee80211_ht_info));</div><div class='add'>+			cpu_to_le16(sizeof(struct ieee80211_ht_operation));</div><div class='ctx'> </div><div class='del'>-		ht_info-&gt;ht_info.control_chan =</div><div class='add'>+		ht_info-&gt;ht_oper.primary_chan =</div><div class='ctx'> 			(u8) priv-&gt;curr_bss_params.bss_descriptor.channel;</div><div class='ctx'> 		if (adapter-&gt;sec_chan_offset) {</div><div class='del'>-			ht_info-&gt;ht_info.ht_param = adapter-&gt;sec_chan_offset;</div><div class='del'>-			ht_info-&gt;ht_info.ht_param |=</div><div class='add'>+			ht_info-&gt;ht_oper.ht_param = adapter-&gt;sec_chan_offset;</div><div class='add'>+			ht_info-&gt;ht_oper.ht_param |=</div><div class='ctx'> 					IEEE80211_HT_PARAM_CHAN_WIDTH_ANY;</div><div class='ctx'> 		}</div><div class='del'>-		ht_info-&gt;ht_info.operation_mode =</div><div class='add'>+		ht_info-&gt;ht_oper.operation_mode =</div><div class='ctx'> 		     cpu_to_le16(IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);</div><div class='del'>-		ht_info-&gt;ht_info.basic_set[0] = 0xff;</div><div class='add'>+		ht_info-&gt;ht_oper.basic_set[0] = 0xff;</div><div class='ctx'> 		pos += sizeof(struct mwifiex_ie_types_htinfo);</div><div class='ctx'> 		cmd_append_size +=</div><div class='ctx'> 				sizeof(struct mwifiex_ie_types_htinfo);</div><div class='hunk'>@@ -1330,22 +1374,28 @@ static int mwifiex_deauthenticate_infra(struct mwifiex_private *priv, u8 *mac)</div><div class='ctx'>  *</div><div class='ctx'>  * In case of infra made, it sends deauthentication request, and</div><div class='ctx'>  * in case of ad-hoc mode, a stop network request is sent to the firmware.</div><div class='add'>+ * In AP mode, a command to stop bss is sent to firmware.</div><div class='ctx'>  */</div><div class='ctx'> int mwifiex_deauthenticate(struct mwifiex_private *priv, u8 *mac)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	if (!priv-&gt;media_connected)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;media_connected) {</div><div class='del'>-		if (priv-&gt;bss_mode == NL80211_IFTYPE_STATION) {</div><div class='del'>-			ret = mwifiex_deauthenticate_infra(priv, mac);</div><div class='del'>-		} else if (priv-&gt;bss_mode == NL80211_IFTYPE_ADHOC) {</div><div class='del'>-			ret = mwifiex_send_cmd_sync(priv,</div><div class='del'>-						HostCmd_CMD_802_11_AD_HOC_STOP,</div><div class='del'>-						HostCmd_ACT_GEN_SET, 0, NULL);</div><div class='del'>-		}</div><div class='add'>+	switch (priv-&gt;bss_mode) {</div><div class='add'>+	case NL80211_IFTYPE_STATION:</div><div class='add'>+		return mwifiex_deauthenticate_infra(priv, mac);</div><div class='add'>+	case NL80211_IFTYPE_ADHOC:</div><div class='add'>+		return mwifiex_send_cmd_sync(priv,</div><div class='add'>+					     HostCmd_CMD_802_11_AD_HOC_STOP,</div><div class='add'>+					     HostCmd_ACT_GEN_SET, 0, NULL);</div><div class='add'>+	case NL80211_IFTYPE_AP:</div><div class='add'>+		return mwifiex_send_cmd_sync(priv, HostCmd_CMD_UAP_BSS_STOP,</div><div class='add'>+					     HostCmd_ACT_GEN_SET, 0, NULL);</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(mwifiex_deauthenticate);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/main.c b/drivers/net/wireless/mwifiex/main.c<br/>index 9d1b3ca6334b..3192855c31c0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/main.c</a></div><div class='hunk'>@@ -58,22 +58,23 @@ static int mwifiex_register(void *card, struct mwifiex_if_ops *if_ops,</div><div class='ctx'> 	memmove(&amp;adapter-&gt;if_ops, if_ops, sizeof(struct mwifiex_if_ops));</div><div class='ctx'> </div><div class='ctx'> 	/* card specific initialization has been deferred until now .. */</div><div class='del'>-	if (adapter-&gt;if_ops.init_if(adapter))</div><div class='del'>-		goto error;</div><div class='add'>+	if (adapter-&gt;if_ops.init_if)</div><div class='add'>+		if (adapter-&gt;if_ops.init_if(adapter))</div><div class='add'>+			goto error;</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;priv_num = 0;</div><div class='ctx'> </div><div class='del'>-	/* Allocate memory for private structure */</div><div class='del'>-	adapter-&gt;priv[0] = kzalloc(sizeof(struct mwifiex_private), GFP_KERNEL);</div><div class='del'>-	if (!adapter-&gt;priv[0]) {</div><div class='del'>-		dev_err(adapter-&gt;dev,</div><div class='del'>-			"%s: failed to alloc priv[0]\n", __func__);</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	adapter-&gt;priv_num++;</div><div class='add'>+	for (i = 0; i &lt; MWIFIEX_MAX_BSS_NUM; i++) {</div><div class='add'>+		/* Allocate memory for private structure */</div><div class='add'>+		adapter-&gt;priv[i] =</div><div class='add'>+			kzalloc(sizeof(struct mwifiex_private), GFP_KERNEL);</div><div class='add'>+		if (!adapter-&gt;priv[i])</div><div class='add'>+			goto error;</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;priv[0]-&gt;adapter = adapter;</div><div class='add'>+		adapter-&gt;priv[i]-&gt;adapter = adapter;</div><div class='add'>+		adapter-&gt;priv[i]-&gt;bss_priority = i;</div><div class='add'>+		adapter-&gt;priv_num++;</div><div class='add'>+	}</div><div class='ctx'> 	mwifiex_init_lock_list(adapter);</div><div class='ctx'> </div><div class='ctx'> 	init_timer(&amp;adapter-&gt;cmd_timer);</div><div class='hunk'>@@ -140,6 +141,7 @@ int mwifiex_main_process(struct mwifiex_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	struct sk_buff *skb;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;adapter-&gt;main_proc_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -161,7 +163,8 @@ process_start:</div><div class='ctx'> 		if (adapter-&gt;int_status) {</div><div class='ctx'> 			if (adapter-&gt;hs_activated)</div><div class='ctx'> 				mwifiex_process_hs_config(adapter);</div><div class='del'>-			adapter-&gt;if_ops.process_int_status(adapter);</div><div class='add'>+			if (adapter-&gt;if_ops.process_int_status)</div><div class='add'>+				adapter-&gt;if_ops.process_int_status(adapter);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Need to wake up the card ? */</div><div class='hunk'>@@ -174,6 +177,7 @@ process_start:</div><div class='ctx'> 			adapter-&gt;if_ops.wakeup(adapter);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		if (IS_CARD_RX_RCVD(adapter)) {</div><div class='ctx'> 			adapter-&gt;pm_wakeup_fw_try = false;</div><div class='ctx'> 			if (adapter-&gt;ps_state == PS_STATE_SLEEP)</div><div class='hunk'>@@ -194,6 +198,11 @@ process_start:</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		/* Check Rx data for USB */</div><div class='add'>+		if (adapter-&gt;iface_type == MWIFIEX_USB)</div><div class='add'>+			while ((skb = skb_dequeue(&amp;adapter-&gt;usb_rx_data_q)))</div><div class='add'>+				mwifiex_handle_rx_packet(adapter, skb);</div><div class='add'>+</div><div class='ctx'> 		/* Check for Cmd Resp */</div><div class='ctx'> 		if (adapter-&gt;cmd_resp_received) {</div><div class='ctx'> 			adapter-&gt;cmd_resp_received = false;</div><div class='hunk'>@@ -292,33 +301,35 @@ static void mwifiex_free_adapter(struct mwifiex_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * This function initializes the hardware and firmware.</div><div class='add'>+ * This function gets firmware and initializes it.</div><div class='ctx'>  *</div><div class='ctx'>  * The main initialization steps followed are -</div><div class='ctx'>  *      - Download the correct firmware to card</div><div class='del'>- *      - Allocate and initialize the adapter structure</div><div class='del'>- *      - Initialize the private structures</div><div class='ctx'>  *      - Issue the init commands to firmware</div><div class='ctx'>  */</div><div class='del'>-static int mwifiex_init_hw_fw(struct mwifiex_adapter *adapter)</div><div class='add'>+static void mwifiex_fw_dpc(const struct firmware *firmware, void *context)</div><div class='ctx'> {</div><div class='del'>-	int ret, err;</div><div class='add'>+	int ret;</div><div class='add'>+	char fmt[64];</div><div class='add'>+	struct mwifiex_private *priv;</div><div class='add'>+	struct mwifiex_adapter *adapter = context;</div><div class='ctx'> 	struct mwifiex_fw_image fw;</div><div class='ctx'> </div><div class='del'>-	memset(&amp;fw, 0, sizeof(struct mwifiex_fw_image));</div><div class='del'>-</div><div class='del'>-	err = request_firmware(&amp;adapter-&gt;firmware, adapter-&gt;fw_name,</div><div class='del'>-			       adapter-&gt;dev);</div><div class='del'>-	if (err &lt; 0) {</div><div class='del'>-		dev_err(adapter-&gt;dev, "request_firmware() returned"</div><div class='del'>-				" error code %#x\n", err);</div><div class='del'>-		ret = -1;</div><div class='add'>+	if (!firmware) {</div><div class='add'>+		dev_err(adapter-&gt;dev,</div><div class='add'>+			"Failed to get firmware %s\n", adapter-&gt;fw_name);</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;fw, 0, sizeof(struct mwifiex_fw_image));</div><div class='add'>+	adapter-&gt;firmware = firmware;</div><div class='ctx'> 	fw.fw_buf = (u8 *) adapter-&gt;firmware-&gt;data;</div><div class='ctx'> 	fw.fw_len = adapter-&gt;firmware-&gt;size;</div><div class='ctx'> </div><div class='del'>-	ret = mwifiex_dnld_fw(adapter, &amp;fw);</div><div class='add'>+	if (adapter-&gt;if_ops.dnld_fw)</div><div class='add'>+		ret = adapter-&gt;if_ops.dnld_fw(adapter, &amp;fw);</div><div class='add'>+	else</div><div class='add'>+		ret = mwifiex_dnld_fw(adapter, &amp;fw);</div><div class='ctx'> 	if (ret == -1)</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='hunk'>@@ -335,17 +346,61 @@ static int mwifiex_init_hw_fw(struct mwifiex_adapter *adapter)</div><div class='ctx'> 	/* Wait for mwifiex_init to complete */</div><div class='ctx'> 	wait_event_interruptible(adapter-&gt;init_wait_q,</div><div class='ctx'> 				 adapter-&gt;init_wait_q_woken);</div><div class='del'>-	if (adapter-&gt;hw_status != MWIFIEX_HW_STATUS_READY) {</div><div class='del'>-		ret = -1;</div><div class='add'>+	if (adapter-&gt;hw_status != MWIFIEX_HW_STATUS_READY)</div><div class='ctx'> 		goto done;</div><div class='add'>+</div><div class='add'>+	priv = adapter-&gt;priv[MWIFIEX_BSS_ROLE_STA];</div><div class='add'>+	if (mwifiex_register_cfg80211(adapter)) {</div><div class='add'>+		dev_err(adapter-&gt;dev, "cannot register with cfg80211\n");</div><div class='add'>+		goto err_init_fw;</div><div class='ctx'> 	}</div><div class='del'>-	ret = 0;</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='add'>+	/* Create station interface by default */</div><div class='add'>+	if (!mwifiex_add_virtual_intf(adapter-&gt;wiphy, "mlan%d",</div><div class='add'>+				      NL80211_IFTYPE_STATION, NULL, NULL)) {</div><div class='add'>+		dev_err(adapter-&gt;dev, "cannot create default STA interface\n");</div><div class='add'>+		goto err_add_intf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Create AP interface by default */</div><div class='add'>+	if (!mwifiex_add_virtual_intf(adapter-&gt;wiphy, "uap%d",</div><div class='add'>+				      NL80211_IFTYPE_AP, NULL, NULL)) {</div><div class='add'>+		dev_err(adapter-&gt;dev, "cannot create default AP interface\n");</div><div class='add'>+		goto err_add_intf;</div><div class='add'>+	}</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	mwifiex_drv_get_driver_version(adapter, fmt, sizeof(fmt) - 1);</div><div class='add'>+	dev_notice(adapter-&gt;dev, "driver_version = %s\n", fmt);</div><div class='add'>+	goto done;</div><div class='add'>+</div><div class='add'>+err_add_intf:</div><div class='add'>+	mwifiex_del_virtual_intf(adapter-&gt;wiphy, priv-&gt;netdev);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+err_init_fw:</div><div class='add'>+	pr_debug("info: %s: unregister device\n", __func__);</div><div class='add'>+	adapter-&gt;if_ops.unregister_dev(adapter);</div><div class='ctx'> done:</div><div class='del'>-	if (adapter-&gt;firmware)</div><div class='del'>-		release_firmware(adapter-&gt;firmware);</div><div class='del'>-	if (ret)</div><div class='del'>-		ret = -1;</div><div class='add'>+	release_firmware(adapter-&gt;firmware);</div><div class='add'>+	complete(&amp;adapter-&gt;fw_load);</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function initializes the hardware and gets firmware.</div><div class='add'>+ */</div><div class='add'>+static int mwifiex_init_hw_fw(struct mwifiex_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	init_completion(&amp;adapter-&gt;fw_load);</div><div class='add'>+	ret = request_firmware_nowait(THIS_MODULE, 1, adapter-&gt;fw_name,</div><div class='add'>+				      adapter-&gt;dev, GFP_KERNEL, adapter,</div><div class='add'>+				      mwifiex_fw_dpc);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err(adapter-&gt;dev,</div><div class='add'>+			"request_firmware_nowait() returned error %d\n", ret);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -585,6 +640,12 @@ void mwifiex_init_priv_params(struct mwifiex_private *priv,</div><div class='ctx'> 	priv-&gt;current_key_index = 0;</div><div class='ctx'> 	priv-&gt;media_connected = false;</div><div class='ctx'> 	memset(&amp;priv-&gt;nick_name, 0, sizeof(priv-&gt;nick_name));</div><div class='add'>+	memset(priv-&gt;mgmt_ie, 0,</div><div class='add'>+	       sizeof(struct mwifiex_ie) * MAX_MGMT_IE_INDEX);</div><div class='add'>+	priv-&gt;beacon_idx = MWIFIEX_AUTO_IDX_MASK;</div><div class='add'>+	priv-&gt;proberesp_idx = MWIFIEX_AUTO_IDX_MASK;</div><div class='add'>+	priv-&gt;assocresp_idx = MWIFIEX_AUTO_IDX_MASK;</div><div class='add'>+	priv-&gt;rsn_idx = MWIFIEX_AUTO_IDX_MASK;</div><div class='ctx'> 	priv-&gt;num_tx_timeout = 0;</div><div class='ctx'> 	memcpy(dev-&gt;dev_addr, priv-&gt;curr_addr, ETH_ALEN);</div><div class='ctx'> }</div><div class='hunk'>@@ -650,8 +711,6 @@ mwifiex_add_card(void *card, struct semaphore *sem,</div><div class='ctx'> 		 struct mwifiex_if_ops *if_ops, u8 iface_type)</div><div class='ctx'> {</div><div class='ctx'> 	struct mwifiex_adapter *adapter;</div><div class='del'>-	char fmt[64];</div><div class='del'>-	struct mwifiex_private *priv;</div><div class='ctx'> </div><div class='ctx'> 	if (down_interruptible(sem))</div><div class='ctx'> 		goto exit_sem_err;</div><div class='hunk'>@@ -692,40 +751,13 @@ mwifiex_add_card(void *card, struct semaphore *sem,</div><div class='ctx'> 		goto err_init_fw;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv = adapter-&gt;priv[0];</div><div class='del'>-</div><div class='del'>-	if (mwifiex_register_cfg80211(priv) != 0) {</div><div class='del'>-		dev_err(adapter-&gt;dev, "cannot register netdevice"</div><div class='del'>-			       " with cfg80211\n");</div><div class='del'>-			goto err_init_fw;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rtnl_lock();</div><div class='del'>-	/* Create station interface by default */</div><div class='del'>-	if (!mwifiex_add_virtual_intf(priv-&gt;wdev-&gt;wiphy, "mlan%d",</div><div class='del'>-				      NL80211_IFTYPE_STATION, NULL, NULL)) {</div><div class='del'>-		rtnl_unlock();</div><div class='del'>-		dev_err(adapter-&gt;dev, "cannot create default station"</div><div class='del'>-				" interface\n");</div><div class='del'>-		goto err_add_intf;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rtnl_unlock();</div><div class='del'>-</div><div class='ctx'> 	up(sem);</div><div class='del'>-</div><div class='del'>-	mwifiex_drv_get_driver_version(adapter, fmt, sizeof(fmt) - 1);</div><div class='del'>-	dev_notice(adapter-&gt;dev, "driver_version = %s\n", fmt);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_add_intf:</div><div class='del'>-	rtnl_lock();</div><div class='del'>-	mwifiex_del_virtual_intf(priv-&gt;wdev-&gt;wiphy, priv-&gt;netdev);</div><div class='del'>-	rtnl_unlock();</div><div class='ctx'> err_init_fw:</div><div class='ctx'> 	pr_debug("info: %s: unregister device\n", __func__);</div><div class='del'>-	adapter-&gt;if_ops.unregister_dev(adapter);</div><div class='add'>+	if (adapter-&gt;if_ops.unregister_dev)</div><div class='add'>+		adapter-&gt;if_ops.unregister_dev(adapter);</div><div class='ctx'> err_registerdev:</div><div class='ctx'> 	adapter-&gt;surprise_removed = true;</div><div class='ctx'> 	mwifiex_terminate_workqueue(adapter);</div><div class='hunk'>@@ -811,26 +843,29 @@ int mwifiex_remove_card(struct mwifiex_adapter *adapter, struct semaphore *sem)</div><div class='ctx'> </div><div class='ctx'> 		rtnl_lock();</div><div class='ctx'> 		if (priv-&gt;wdev &amp;&amp; priv-&gt;netdev)</div><div class='del'>-			mwifiex_del_virtual_intf(priv-&gt;wdev-&gt;wiphy,</div><div class='del'>-						 priv-&gt;netdev);</div><div class='add'>+			mwifiex_del_virtual_intf(adapter-&gt;wiphy, priv-&gt;netdev);</div><div class='ctx'> 		rtnl_unlock();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	priv = adapter-&gt;priv[0];</div><div class='del'>-	if (!priv)</div><div class='add'>+	if (!priv || !priv-&gt;wdev)</div><div class='ctx'> 		goto exit_remove;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;wdev) {</div><div class='del'>-		wiphy_unregister(priv-&gt;wdev-&gt;wiphy);</div><div class='del'>-		wiphy_free(priv-&gt;wdev-&gt;wiphy);</div><div class='del'>-		kfree(priv-&gt;wdev);</div><div class='add'>+	wiphy_unregister(priv-&gt;wdev-&gt;wiphy);</div><div class='add'>+	wiphy_free(priv-&gt;wdev-&gt;wiphy);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;priv_num; i++) {</div><div class='add'>+		priv = adapter-&gt;priv[i];</div><div class='add'>+		if (priv)</div><div class='add'>+			kfree(priv-&gt;wdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mwifiex_terminate_workqueue(adapter);</div><div class='ctx'> </div><div class='ctx'> 	/* Unregister device */</div><div class='ctx'> 	dev_dbg(adapter-&gt;dev, "info: unregister device\n");</div><div class='del'>-	adapter-&gt;if_ops.unregister_dev(adapter);</div><div class='add'>+	if (adapter-&gt;if_ops.unregister_dev)</div><div class='add'>+		adapter-&gt;if_ops.unregister_dev(adapter);</div><div class='ctx'> 	/* Free adapter structure */</div><div class='ctx'> 	dev_dbg(adapter-&gt;dev, "info: free adapter\n");</div><div class='ctx'> 	mwifiex_free_adapter(adapter);</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/main.h b/drivers/net/wireless/mwifiex/main.h<br/>index 35225e9b1080..bd3b0bf94b9e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/main.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/main.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/main.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/main.h</a></div><div class='hunk'>@@ -92,9 +92,16 @@ enum {</div><div class='ctx'> #define MWIFIEX_OUI_NOT_PRESENT			0</div><div class='ctx'> #define MWIFIEX_OUI_PRESENT				1</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Do not check for data_received for USB, as data_received</div><div class='add'>+ * is handled in mwifiex_usb_recv for USB</div><div class='add'>+ */</div><div class='ctx'> #define IS_CARD_RX_RCVD(adapter) (adapter-&gt;cmd_resp_received || \</div><div class='del'>-					adapter-&gt;event_received || \</div><div class='del'>-					adapter-&gt;data_received)</div><div class='add'>+				adapter-&gt;event_received || \</div><div class='add'>+				((adapter-&gt;iface_type != MWIFIEX_USB) &amp;&amp; \</div><div class='add'>+				adapter-&gt;data_received) || \</div><div class='add'>+				((adapter-&gt;iface_type == MWIFIEX_USB) &amp;&amp; \</div><div class='add'>+				!skb_queue_empty(&amp;adapter-&gt;usb_rx_data_q)))</div><div class='ctx'> </div><div class='ctx'> #define MWIFIEX_TYPE_CMD				1</div><div class='ctx'> #define MWIFIEX_TYPE_DATA				0</div><div class='hunk'>@@ -109,6 +116,12 @@ enum {</div><div class='ctx'> #define MAX_FREQUENCY_BAND_BG   2484</div><div class='ctx'> </div><div class='ctx'> #define MWIFIEX_EVENT_HEADER_LEN           4</div><div class='add'>+#define MWIFIEX_UAP_EVENT_EXTRA_HEADER	   2</div><div class='add'>+</div><div class='add'>+#define MWIFIEX_TYPE_LEN			4</div><div class='add'>+#define MWIFIEX_USB_TYPE_CMD			0xF00DFACE</div><div class='add'>+#define MWIFIEX_USB_TYPE_DATA			0xBEADC0DE</div><div class='add'>+#define MWIFIEX_USB_TYPE_EVENT			0xBEEFFACE</div><div class='ctx'> </div><div class='ctx'> struct mwifiex_dbg {</div><div class='ctx'> 	u32 num_cmd_host_to_card_failure;</div><div class='hunk'>@@ -162,6 +175,7 @@ enum MWIFIEX_PS_STATE {</div><div class='ctx'> enum mwifiex_iface_type {</div><div class='ctx'> 	MWIFIEX_SDIO,</div><div class='ctx'> 	MWIFIEX_PCIE,</div><div class='add'>+	MWIFIEX_USB</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mwifiex_add_ba_param {</div><div class='hunk'>@@ -201,10 +215,10 @@ struct mwifiex_wmm_desc {</div><div class='ctx'> 	u32 packets_out[MAX_NUM_TID];</div><div class='ctx'> 	/* spin lock to protect ra_list */</div><div class='ctx'> 	spinlock_t ra_list_spinlock;</div><div class='del'>-	struct mwifiex_wmm_ac_status ac_status[IEEE80211_MAX_QUEUES];</div><div class='del'>-	enum mwifiex_wmm_ac_e ac_down_graded_vals[IEEE80211_MAX_QUEUES];</div><div class='add'>+	struct mwifiex_wmm_ac_status ac_status[IEEE80211_NUM_ACS];</div><div class='add'>+	enum mwifiex_wmm_ac_e ac_down_graded_vals[IEEE80211_NUM_ACS];</div><div class='ctx'> 	u32 drv_pkt_delay_max;</div><div class='del'>-	u8 queue_priority[IEEE80211_MAX_QUEUES];</div><div class='add'>+	u8 queue_priority[IEEE80211_NUM_ACS];</div><div class='ctx'> 	u32 user_pri_pkt_tx_ctrl[WMM_HIGHEST_PRIORITY + 1];	/* UP: 0 to 7 */</div><div class='ctx'> 	/* Number of transmit packets queued */</div><div class='ctx'> 	atomic_t tx_pkts_queued;</div><div class='hunk'>@@ -260,8 +274,8 @@ struct mwifiex_bssdescriptor {</div><div class='ctx'> 	 * BAND_A(0X04): 'a' band</div><div class='ctx'> 	 */</div><div class='ctx'> 	u16 bss_band;</div><div class='del'>-	u64 network_tsf;</div><div class='del'>-	u8 time_stamp[8];</div><div class='add'>+	u64 fw_tsf;</div><div class='add'>+	u64 timestamp;</div><div class='ctx'> 	union ieee_types_phy_param_set phy_param_set;</div><div class='ctx'> 	union ieee_types_ss_param_set ss_param_set;</div><div class='ctx'> 	u16 cap_info_bitmap;</div><div class='hunk'>@@ -269,7 +283,7 @@ struct mwifiex_bssdescriptor {</div><div class='ctx'> 	u8  disable_11n;</div><div class='ctx'> 	struct ieee80211_ht_cap *bcn_ht_cap;</div><div class='ctx'> 	u16 ht_cap_offset;</div><div class='del'>-	struct ieee80211_ht_info *bcn_ht_info;</div><div class='add'>+	struct ieee80211_ht_operation *bcn_ht_oper;</div><div class='ctx'> 	u16 ht_info_offset;</div><div class='ctx'> 	u8 *bcn_bss_co_2040;</div><div class='ctx'> 	u16 bss_co_2040_offset;</div><div class='hunk'>@@ -357,6 +371,7 @@ struct mwifiex_private {</div><div class='ctx'> 	u8 bss_role;</div><div class='ctx'> 	u8 bss_priority;</div><div class='ctx'> 	u8 bss_num;</div><div class='add'>+	u8 bss_started;</div><div class='ctx'> 	u8 frame_type;</div><div class='ctx'> 	u8 curr_addr[ETH_ALEN];</div><div class='ctx'> 	u8 media_connected;</div><div class='hunk'>@@ -407,6 +422,8 @@ struct mwifiex_private {</div><div class='ctx'> 	struct host_cmd_ds_802_11_key_material aes_key;</div><div class='ctx'> 	u8 wapi_ie[256];</div><div class='ctx'> 	u8 wapi_ie_len;</div><div class='add'>+	u8 *wps_ie;</div><div class='add'>+	u8 wps_ie_len;</div><div class='ctx'> 	u8 wmm_required;</div><div class='ctx'> 	u8 wmm_enabled;</div><div class='ctx'> 	u8 wmm_qosinfo;</div><div class='hunk'>@@ -448,7 +465,6 @@ struct mwifiex_private {</div><div class='ctx'> 	struct dentry *dfs_dev_dir;</div><div class='ctx'> #endif</div><div class='ctx'> 	u8 nick_name[16];</div><div class='del'>-	u8 qual_level, qual_noise;</div><div class='ctx'> 	u16 current_key_index;</div><div class='ctx'> 	struct semaphore async_sem;</div><div class='ctx'> 	u8 scan_pending_on_block;</div><div class='hunk'>@@ -456,9 +472,16 @@ struct mwifiex_private {</div><div class='ctx'> 	struct cfg80211_scan_request *scan_request;</div><div class='ctx'> 	struct mwifiex_user_scan_cfg *user_scan_cfg;</div><div class='ctx'> 	u8 cfg_bssid[6];</div><div class='del'>-	u8 country_code[IEEE80211_COUNTRY_STRING_LEN];</div><div class='ctx'> 	struct wps wps;</div><div class='ctx'> 	u8 scan_block;</div><div class='add'>+	s32 cqm_rssi_thold;</div><div class='add'>+	u32 cqm_rssi_hyst;</div><div class='add'>+	u8 subsc_evt_rssi_state;</div><div class='add'>+	struct mwifiex_ie mgmt_ie[MAX_MGMT_IE_INDEX];</div><div class='add'>+	u16 beacon_idx;</div><div class='add'>+	u16 proberesp_idx;</div><div class='add'>+	u16 assocresp_idx;</div><div class='add'>+	u16 rsn_idx;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum mwifiex_ba_status {</div><div class='hunk'>@@ -518,6 +541,11 @@ struct cmd_ctrl_node {</div><div class='ctx'> 	u8 cmd_wait_q_woken;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mwifiex_bss_priv {</div><div class='add'>+	u8 band;</div><div class='add'>+	u64 fw_tsf;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mwifiex_if_ops {</div><div class='ctx'> 	int (*init_if) (struct mwifiex_adapter *);</div><div class='ctx'> 	void (*cleanup_if) (struct mwifiex_adapter *);</div><div class='hunk'>@@ -537,6 +565,8 @@ struct mwifiex_if_ops {</div><div class='ctx'> 	void (*cleanup_mpa_buf) (struct mwifiex_adapter *);</div><div class='ctx'> 	int (*cmdrsp_complete) (struct mwifiex_adapter *, struct sk_buff *);</div><div class='ctx'> 	int (*event_complete) (struct mwifiex_adapter *, struct sk_buff *);</div><div class='add'>+	int (*data_complete) (struct mwifiex_adapter *, struct sk_buff *);</div><div class='add'>+	int (*dnld_fw) (struct mwifiex_adapter *, struct mwifiex_fw_image *);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mwifiex_adapter {</div><div class='hunk'>@@ -547,6 +577,7 @@ struct mwifiex_adapter {</div><div class='ctx'> 	char fw_name[32];</div><div class='ctx'> 	int winner;</div><div class='ctx'> 	struct device *dev;</div><div class='add'>+	struct wiphy *wiphy;</div><div class='ctx'> 	bool surprise_removed;</div><div class='ctx'> 	u32 fw_release_number;</div><div class='ctx'> 	u16 init_wait_q_woken;</div><div class='hunk'>@@ -599,6 +630,7 @@ struct mwifiex_adapter {</div><div class='ctx'> 	struct list_head scan_pending_q;</div><div class='ctx'> 	/* spin lock for scan_pending_q */</div><div class='ctx'> 	spinlock_t scan_pending_q_lock;</div><div class='add'>+	struct sk_buff_head usb_rx_data_q;</div><div class='ctx'> 	u32 scan_processing;</div><div class='ctx'> 	u16 region_code;</div><div class='ctx'> 	struct mwifiex_802_11d_domain_reg domain_reg;</div><div class='hunk'>@@ -651,6 +683,9 @@ struct mwifiex_adapter {</div><div class='ctx'> 	u8 scan_wait_q_woken;</div><div class='ctx'> 	struct cmd_ctrl_node *cmd_queued;</div><div class='ctx'> 	spinlock_t queue_lock;		/* lock for tx queues */</div><div class='add'>+	struct completion fw_load;</div><div class='add'>+	u8 country_code[IEEE80211_COUNTRY_STRING_LEN];</div><div class='add'>+	u16 max_mgmt_ie_index;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int mwifiex_init_lock_list(struct mwifiex_adapter *adapter);</div><div class='hunk'>@@ -734,6 +769,9 @@ int mwifiex_process_rx_packet(struct mwifiex_adapter *adapter,</div><div class='ctx'> int mwifiex_sta_prepare_cmd(struct mwifiex_private *, uint16_t cmd_no,</div><div class='ctx'> 			    u16 cmd_action, u32 cmd_oid,</div><div class='ctx'> 			    void *data_buf, void *cmd_buf);</div><div class='add'>+int mwifiex_uap_prepare_cmd(struct mwifiex_private *priv, uint16_t cmd_no,</div><div class='add'>+			    u16 cmd_action, u32 cmd_oid,</div><div class='add'>+			    void *data_buf, void *cmd_buf);</div><div class='ctx'> int mwifiex_process_sta_cmdresp(struct mwifiex_private *, u16 cmdresp_no,</div><div class='ctx'> 				struct host_cmd_ds_command *resp);</div><div class='ctx'> int mwifiex_process_sta_rx_packet(struct mwifiex_adapter *,</div><div class='hunk'>@@ -794,6 +832,9 @@ int mwifiex_ret_get_hw_spec(struct mwifiex_private *priv,</div><div class='ctx'> int is_command_pending(struct mwifiex_adapter *adapter);</div><div class='ctx'> void mwifiex_init_priv_params(struct mwifiex_private *priv,</div><div class='ctx'> 						struct net_device *dev);</div><div class='add'>+int mwifiex_set_secure_params(struct mwifiex_private *priv,</div><div class='add'>+			      struct mwifiex_uap_bss_param *bss_config,</div><div class='add'>+			      struct cfg80211_ap_settings *params);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This function checks if the queuing is RA based or not.</div><div class='hunk'>@@ -896,8 +937,6 @@ int mwifiex_bss_start(struct mwifiex_private *priv, struct cfg80211_bss *bss,</div><div class='ctx'> int mwifiex_cancel_hs(struct mwifiex_private *priv, int cmd_type);</div><div class='ctx'> int mwifiex_enable_hs(struct mwifiex_adapter *adapter);</div><div class='ctx'> int mwifiex_disable_auto_ds(struct mwifiex_private *priv);</div><div class='del'>-int mwifiex_get_signal_info(struct mwifiex_private *priv,</div><div class='del'>-			    struct mwifiex_ds_get_signal *signal);</div><div class='ctx'> int mwifiex_drv_get_data_rate(struct mwifiex_private *priv,</div><div class='ctx'> 			      struct mwifiex_rate_cfg *rate);</div><div class='ctx'> int mwifiex_request_scan(struct mwifiex_private *priv,</div><div class='hunk'>@@ -909,7 +948,8 @@ int mwifiex_set_radio(struct mwifiex_private *priv, u8 option);</div><div class='ctx'> int mwifiex_drv_change_adhoc_chan(struct mwifiex_private *priv, u16 channel);</div><div class='ctx'> </div><div class='ctx'> int mwifiex_set_encode(struct mwifiex_private *priv, const u8 *key,</div><div class='del'>-		       int key_len, u8 key_index, int disable);</div><div class='add'>+		       int key_len, u8 key_index, const u8 *mac_addr,</div><div class='add'>+		       int disable);</div><div class='ctx'> </div><div class='ctx'> int mwifiex_set_gen_ie(struct mwifiex_private *priv, u8 *ie, int ie_len);</div><div class='ctx'> </div><div class='hunk'>@@ -945,18 +985,16 @@ int mwifiex_set_tx_power(struct mwifiex_private *priv,</div><div class='ctx'> </div><div class='ctx'> int mwifiex_main_process(struct mwifiex_adapter *);</div><div class='ctx'> </div><div class='add'>+int mwifiex_uap_set_channel(struct mwifiex_private *priv, int channel);</div><div class='ctx'> int mwifiex_bss_set_channel(struct mwifiex_private *,</div><div class='ctx'> 			    struct mwifiex_chan_freq_power *cfp);</div><div class='ctx'> int mwifiex_get_bss_info(struct mwifiex_private *,</div><div class='ctx'> 			 struct mwifiex_bss_info *);</div><div class='ctx'> int mwifiex_fill_new_bss_desc(struct mwifiex_private *priv,</div><div class='del'>-			      u8 *bssid, s32 rssi, u8 *ie_buf,</div><div class='del'>-			      size_t ie_len, u16 beacon_period,</div><div class='del'>-			      u16 cap_info_bitmap, u8 band,</div><div class='add'>+			      struct cfg80211_bss *bss,</div><div class='ctx'> 			      struct mwifiex_bssdescriptor *bss_desc);</div><div class='ctx'> int mwifiex_update_bss_desc_with_ie(struct mwifiex_adapter *adapter,</div><div class='del'>-				struct mwifiex_bssdescriptor *bss_entry,</div><div class='del'>-				u8 *ie_buf, u32 ie_len);</div><div class='add'>+				    struct mwifiex_bssdescriptor *bss_entry);</div><div class='ctx'> int mwifiex_check_network_compatibility(struct mwifiex_private *priv,</div><div class='ctx'> 					struct mwifiex_bssdescriptor *bss_desc);</div><div class='ctx'> </div><div class='hunk'>@@ -965,6 +1003,12 @@ struct net_device *mwifiex_add_virtual_intf(struct wiphy *wiphy,</div><div class='ctx'> 					u32 *flags, struct vif_params *params);</div><div class='ctx'> int mwifiex_del_virtual_intf(struct wiphy *wiphy, struct net_device *dev);</div><div class='ctx'> </div><div class='add'>+void mwifiex_set_sys_config_invalid_data(struct mwifiex_uap_bss_param *config);</div><div class='add'>+</div><div class='add'>+int mwifiex_set_mgmt_ies(struct mwifiex_private *priv,</div><div class='add'>+			 struct cfg80211_ap_settings *params);</div><div class='add'>+int mwifiex_del_mgmt_ies(struct mwifiex_private *priv);</div><div class='add'>+u8 *mwifiex_11d_code_2_region(u8 code);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> void mwifiex_debugfs_init(void);</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/pcie.c b/drivers/net/wireless/mwifiex/pcie.c<br/>index 5867facd415d..13fbc4eb1595 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/pcie.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/pcie.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/pcie.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/pcie.c</a></div><div class='hunk'>@@ -119,6 +119,9 @@ static void mwifiex_pcie_remove(struct pci_dev *pdev)</div><div class='ctx'> 	if (!adapter || !adapter-&gt;priv_num)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* In case driver is removed when asynchronous FW load is in progress */</div><div class='add'>+	wait_for_completion(&amp;adapter-&gt;fw_load);</div><div class='add'>+</div><div class='ctx'> 	if (user_rmmod) {</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> 		if (adapter-&gt;is_suspended)</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/scan.c b/drivers/net/wireless/mwifiex/scan.c<br/>index aff9cd763f2b..74f045715723 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/scan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/scan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/scan.c</a></div><div class='hunk'>@@ -1048,10 +1048,8 @@ mwifiex_ret_802_11_scan_get_tlv_ptrs(struct mwifiex_adapter *adapter,</div><div class='ctx'>  * This function parses provided beacon buffer and updates</div><div class='ctx'>  * respective fields in bss descriptor structure.</div><div class='ctx'>  */</div><div class='del'>-int</div><div class='del'>-mwifiex_update_bss_desc_with_ie(struct mwifiex_adapter *adapter,</div><div class='del'>-				struct mwifiex_bssdescriptor *bss_entry,</div><div class='del'>-				u8 *ie_buf, u32 ie_len)</div><div class='add'>+int mwifiex_update_bss_desc_with_ie(struct mwifiex_adapter *adapter,</div><div class='add'>+				    struct mwifiex_bssdescriptor *bss_entry)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	u8 element_id;</div><div class='hunk'>@@ -1073,10 +1071,8 @@ mwifiex_update_bss_desc_with_ie(struct mwifiex_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	found_data_rate_ie = false;</div><div class='ctx'> 	rate_size = 0;</div><div class='del'>-	current_ptr = ie_buf;</div><div class='del'>-	bytes_left = ie_len;</div><div class='del'>-	bss_entry-&gt;beacon_buf = ie_buf;</div><div class='del'>-	bss_entry-&gt;beacon_buf_size = ie_len;</div><div class='add'>+	current_ptr = bss_entry-&gt;beacon_buf;</div><div class='add'>+	bytes_left = bss_entry-&gt;beacon_buf_size;</div><div class='ctx'> </div><div class='ctx'> 	/* Process variable IE */</div><div class='ctx'> 	while (bytes_left &gt;= 2) {</div><div class='hunk'>@@ -1221,9 +1217,9 @@ mwifiex_update_bss_desc_with_ie(struct mwifiex_adapter *adapter,</div><div class='ctx'> 					sizeof(struct ieee_types_header) -</div><div class='ctx'> 					bss_entry-&gt;beacon_buf);</div><div class='ctx'> 			break;</div><div class='del'>-		case WLAN_EID_HT_INFORMATION:</div><div class='del'>-			bss_entry-&gt;bcn_ht_info = (struct ieee80211_ht_info *)</div><div class='del'>-					(current_ptr +</div><div class='add'>+		case WLAN_EID_HT_OPERATION:</div><div class='add'>+			bss_entry-&gt;bcn_ht_oper =</div><div class='add'>+				(struct ieee80211_ht_operation *)(current_ptr +</div><div class='ctx'> 					sizeof(struct ieee_types_header));</div><div class='ctx'> 			bss_entry-&gt;ht_info_offset = (u16) (current_ptr +</div><div class='ctx'> 					sizeof(struct ieee_types_header) -</div><div class='hunk'>@@ -1447,15 +1443,12 @@ int mwifiex_check_network_compatibility(struct mwifiex_private *priv,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-mwifiex_update_curr_bss_params(struct mwifiex_private *priv, u8 *bssid,</div><div class='del'>-			       s32 rssi, const u8 *ie_buf, size_t ie_len,</div><div class='del'>-			       u16 beacon_period, u16 cap_info_bitmap, u8 band)</div><div class='add'>+static int mwifiex_update_curr_bss_params(struct mwifiex_private *priv,</div><div class='add'>+					  struct cfg80211_bss *bss)</div><div class='ctx'> {</div><div class='ctx'> 	struct mwifiex_bssdescriptor *bss_desc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	u8 *beacon_ie;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate and fill new bss descriptor */</div><div class='ctx'> 	bss_desc = kzalloc(sizeof(struct mwifiex_bssdescriptor),</div><div class='hunk'>@@ -1465,16 +1458,7 @@ mwifiex_update_curr_bss_params(struct mwifiex_private *priv, u8 *bssid,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	beacon_ie = kmemdup(ie_buf, ie_len, GFP_KERNEL);</div><div class='del'>-	if (!beacon_ie) {</div><div class='del'>-		kfree(bss_desc);</div><div class='del'>-		dev_err(priv-&gt;adapter-&gt;dev, " failed to alloc beacon_ie\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = mwifiex_fill_new_bss_desc(priv, bssid, rssi, beacon_ie,</div><div class='del'>-					ie_len, beacon_period,</div><div class='del'>-					cap_info_bitmap, band, bss_desc);</div><div class='add'>+	ret = mwifiex_fill_new_bss_desc(priv, bss, bss_desc);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='hunk'>@@ -1493,7 +1477,7 @@ mwifiex_update_curr_bss_params(struct mwifiex_private *priv, u8 *bssid,</div><div class='ctx'> 	priv-&gt;curr_bss_params.bss_descriptor.bcn_ht_cap = NULL;</div><div class='ctx'> 	priv-&gt;curr_bss_params.bss_descriptor.ht_cap_offset =</div><div class='ctx'> 		0;</div><div class='del'>-	priv-&gt;curr_bss_params.bss_descriptor.bcn_ht_info = NULL;</div><div class='add'>+	priv-&gt;curr_bss_params.bss_descriptor.bcn_ht_oper = NULL;</div><div class='ctx'> 	priv-&gt;curr_bss_params.bss_descriptor.ht_info_offset =</div><div class='ctx'> 		0;</div><div class='ctx'> 	priv-&gt;curr_bss_params.bss_descriptor.bcn_bss_co_2040 =</div><div class='hunk'>@@ -1514,7 +1498,6 @@ mwifiex_update_curr_bss_params(struct mwifiex_private *priv, u8 *bssid,</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='ctx'> 	kfree(bss_desc);</div><div class='del'>-	kfree(beacon_ie);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1620,14 +1603,16 @@ int mwifiex_ret_802_11_scan(struct mwifiex_private *priv,</div><div class='ctx'> 		const u8 *ie_buf;</div><div class='ctx'> 		size_t ie_len;</div><div class='ctx'> 		u16 channel = 0;</div><div class='del'>-		u64 network_tsf = 0;</div><div class='add'>+		u64 fw_tsf = 0;</div><div class='ctx'> 		u16 beacon_size = 0;</div><div class='ctx'> 		u32 curr_bcn_bytes;</div><div class='ctx'> 		u32 freq;</div><div class='ctx'> 		u16 beacon_period;</div><div class='ctx'> 		u16 cap_info_bitmap;</div><div class='ctx'> 		u8 *current_ptr;</div><div class='add'>+		u64 timestamp;</div><div class='ctx'> 		struct mwifiex_bcn_param *bcn_param;</div><div class='add'>+		struct mwifiex_bss_priv *bss_priv;</div><div class='ctx'> </div><div class='ctx'> 		if (bytes_left &gt;= sizeof(beacon_size)) {</div><div class='ctx'> 			/* Extract &amp; convert beacon size from command buffer */</div><div class='hunk'>@@ -1667,9 +1652,11 @@ int mwifiex_ret_802_11_scan(struct mwifiex_private *priv,</div><div class='ctx'> </div><div class='ctx'> 		memcpy(bssid, bcn_param-&gt;bssid, ETH_ALEN);</div><div class='ctx'> </div><div class='del'>-		rssi = (s32) (bcn_param-&gt;rssi);</div><div class='del'>-		dev_dbg(adapter-&gt;dev, "info: InterpretIE: RSSI=%02X\n", rssi);</div><div class='add'>+		rssi = (s32) bcn_param-&gt;rssi;</div><div class='add'>+		rssi = (-rssi) * 100;		/* Convert dBm to mBm */</div><div class='add'>+		dev_dbg(adapter-&gt;dev, "info: InterpretIE: RSSI=%d\n", rssi);</div><div class='ctx'> </div><div class='add'>+		timestamp = le64_to_cpu(bcn_param-&gt;timestamp);</div><div class='ctx'> 		beacon_period = le16_to_cpu(bcn_param-&gt;beacon_period);</div><div class='ctx'> </div><div class='ctx'> 		cap_info_bitmap = le16_to_cpu(bcn_param-&gt;cap_info_bitmap);</div><div class='hunk'>@@ -1709,14 +1696,13 @@ int mwifiex_ret_802_11_scan(struct mwifiex_private *priv,</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If the TSF TLV was appended to the scan results, save this</div><div class='del'>-		 * entry's TSF value in the networkTSF field.The networkTSF is</div><div class='del'>-		 * the firmware's TSF value at the time the beacon or probe</div><div class='del'>-		 * response was received.</div><div class='add'>+		 * entry's TSF value in the fw_tsf field. It is the firmware's</div><div class='add'>+		 * TSF value at the time the beacon or probe response was</div><div class='add'>+		 * received.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (tsf_tlv)</div><div class='del'>-			memcpy(&amp;network_tsf,</div><div class='del'>-			       &amp;tsf_tlv-&gt;tsf_data[idx * TSF_DATA_SIZE],</div><div class='del'>-			       sizeof(network_tsf));</div><div class='add'>+			memcpy(&amp;fw_tsf, &amp;tsf_tlv-&gt;tsf_data[idx * TSF_DATA_SIZE],</div><div class='add'>+			       sizeof(fw_tsf));</div><div class='ctx'> </div><div class='ctx'> 		if (channel) {</div><div class='ctx'> 			struct ieee80211_channel *chan;</div><div class='hunk'>@@ -1739,21 +1725,19 @@ int mwifiex_ret_802_11_scan(struct mwifiex_private *priv,</div><div class='ctx'> </div><div class='ctx'> 			if (chan &amp;&amp; !(chan-&gt;flags &amp; IEEE80211_CHAN_DISABLED)) {</div><div class='ctx'> 				bss = cfg80211_inform_bss(priv-&gt;wdev-&gt;wiphy,</div><div class='del'>-					      chan, bssid, network_tsf,</div><div class='add'>+					      chan, bssid, timestamp,</div><div class='ctx'> 					      cap_info_bitmap, beacon_period,</div><div class='ctx'> 					      ie_buf, ie_len, rssi, GFP_KERNEL);</div><div class='del'>-				*(u8 *)bss-&gt;priv = band;</div><div class='del'>-				cfg80211_put_bss(bss);</div><div class='del'>-</div><div class='add'>+				bss_priv = (struct mwifiex_bss_priv *)bss-&gt;priv;</div><div class='add'>+				bss_priv-&gt;band = band;</div><div class='add'>+				bss_priv-&gt;fw_tsf = fw_tsf;</div><div class='ctx'> 				if (priv-&gt;media_connected &amp;&amp;</div><div class='ctx'> 				    !memcmp(bssid,</div><div class='ctx'> 					    priv-&gt;curr_bss_params.bss_descriptor</div><div class='ctx'> 					    .mac_address, ETH_ALEN))</div><div class='del'>-					mwifiex_update_curr_bss_params</div><div class='del'>-							(priv, bssid, rssi,</div><div class='del'>-							 ie_buf, ie_len,</div><div class='del'>-							 beacon_period,</div><div class='del'>-							 cap_info_bitmap, band);</div><div class='add'>+					mwifiex_update_curr_bss_params(priv,</div><div class='add'>+								       bss);</div><div class='add'>+				cfg80211_put_bss(bss);</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dev_dbg(adapter-&gt;dev, "missing BSS channel IE\n");</div><div class='hunk'>@@ -2019,8 +2003,8 @@ mwifiex_save_curr_bcn(struct mwifiex_private *priv)</div><div class='ctx'> 			(curr_bss-&gt;beacon_buf +</div><div class='ctx'> 			 curr_bss-&gt;ht_cap_offset);</div><div class='ctx'> </div><div class='del'>-	if (curr_bss-&gt;bcn_ht_info)</div><div class='del'>-		curr_bss-&gt;bcn_ht_info = (struct ieee80211_ht_info *)</div><div class='add'>+	if (curr_bss-&gt;bcn_ht_oper)</div><div class='add'>+		curr_bss-&gt;bcn_ht_oper = (struct ieee80211_ht_operation *)</div><div class='ctx'> 			(curr_bss-&gt;beacon_buf +</div><div class='ctx'> 			 curr_bss-&gt;ht_info_offset);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/sdio.c b/drivers/net/wireless/mwifiex/sdio.c<br/>index f8012e2b7f7c..e0377473282f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/sdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sdio.c</a></div><div class='hunk'>@@ -123,6 +123,9 @@ mwifiex_sdio_remove(struct sdio_func *func)</div><div class='ctx'> 	if (!adapter || !adapter-&gt;priv_num)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* In case driver is removed when asynchronous FW load is in progress */</div><div class='add'>+	wait_for_completion(&amp;adapter-&gt;fw_load);</div><div class='add'>+</div><div class='ctx'> 	if (user_rmmod) {</div><div class='ctx'> 		if (adapter-&gt;is_suspended)</div><div class='ctx'> 			mwifiex_sdio_resume(adapter-&gt;dev);</div><div class='hunk'>@@ -250,6 +253,8 @@ static int mwifiex_sdio_resume(struct device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Device ID for SD8786 */</div><div class='add'>+#define SDIO_DEVICE_ID_MARVELL_8786   (0x9116)</div><div class='ctx'> /* Device ID for SD8787 */</div><div class='ctx'> #define SDIO_DEVICE_ID_MARVELL_8787   (0x9119)</div><div class='ctx'> /* Device ID for SD8797 */</div><div class='hunk'>@@ -257,6 +262,7 @@ static int mwifiex_sdio_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> /* WLAN IDs */</div><div class='ctx'> static const struct sdio_device_id mwifiex_ids[] = {</div><div class='add'>+	{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8786)},</div><div class='ctx'> 	{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8787)},</div><div class='ctx'> 	{SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797)},</div><div class='ctx'> 	{},</div><div class='hunk'>@@ -1596,6 +1602,9 @@ static int mwifiex_register_dev(struct mwifiex_adapter *adapter)</div><div class='ctx'> 	adapter-&gt;dev = &amp;func-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	switch (func-&gt;device) {</div><div class='add'>+	case SDIO_DEVICE_ID_MARVELL_8786:</div><div class='add'>+		strcpy(adapter-&gt;fw_name, SD8786_DEFAULT_FW_NAME);</div><div class='add'>+		break;</div><div class='ctx'> 	case SDIO_DEVICE_ID_MARVELL_8797:</div><div class='ctx'> 		strcpy(adapter-&gt;fw_name, SD8797_DEFAULT_FW_NAME);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1804,5 +1813,6 @@ MODULE_AUTHOR("Marvell International Ltd.");</div><div class='ctx'> MODULE_DESCRIPTION("Marvell WiFi-Ex SDIO Driver version " SDIO_VERSION);</div><div class='ctx'> MODULE_VERSION(SDIO_VERSION);</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_FIRMWARE(SD8786_DEFAULT_FW_NAME);</div><div class='ctx'> MODULE_FIRMWARE(SD8787_DEFAULT_FW_NAME);</div><div class='ctx'> MODULE_FIRMWARE(SD8797_DEFAULT_FW_NAME);</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/sdio.h b/drivers/net/wireless/mwifiex/sdio.h<br/>index a3fb322205b0..21033738ef0c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sdio.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/sdio.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sdio.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sdio.h</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "main.h"</div><div class='ctx'> </div><div class='add'>+#define SD8786_DEFAULT_FW_NAME "mrvl/sd8786_uapsta.bin"</div><div class='ctx'> #define SD8787_DEFAULT_FW_NAME "mrvl/sd8787_uapsta.bin"</div><div class='ctx'> #define SD8797_DEFAULT_FW_NAME "mrvl/sd8797_uapsta.bin"</div><div class='ctx'> </div><div class='hunk'>@@ -193,7 +194,7 @@</div><div class='ctx'> 		a-&gt;mpa_tx.ports |= (1&lt;&lt;(a-&gt;mpa_tx.pkt_cnt+1+(MAX_PORT -	\</div><div class='ctx'> 						a-&gt;mp_end_port)));	\</div><div class='ctx'> 	a-&gt;mpa_tx.pkt_cnt++;						\</div><div class='del'>-} while (0);</div><div class='add'>+} while (0)</div><div class='ctx'> </div><div class='ctx'> /* SDIO Tx aggregation limit ? */</div><div class='ctx'> #define MP_TX_AGGR_PKT_LIMIT_REACHED(a)					\</div><div class='hunk'>@@ -211,7 +212,7 @@</div><div class='ctx'> 	a-&gt;mpa_tx.buf_len = 0;						\</div><div class='ctx'> 	a-&gt;mpa_tx.ports = 0;						\</div><div class='ctx'> 	a-&gt;mpa_tx.start_port = 0;					\</div><div class='del'>-} while (0);</div><div class='add'>+} while (0)</div><div class='ctx'> </div><div class='ctx'> /* SDIO Rx aggregation limit ? */</div><div class='ctx'> #define MP_RX_AGGR_PKT_LIMIT_REACHED(a)					\</div><div class='hunk'>@@ -242,7 +243,7 @@</div><div class='ctx'> 	a-&gt;mpa_rx.skb_arr[a-&gt;mpa_rx.pkt_cnt] = skb;			\</div><div class='ctx'> 	a-&gt;mpa_rx.len_arr[a-&gt;mpa_rx.pkt_cnt] = skb-&gt;len;		\</div><div class='ctx'> 	a-&gt;mpa_rx.pkt_cnt++;						\</div><div class='del'>-} while (0);</div><div class='add'>+} while (0)</div><div class='ctx'> </div><div class='ctx'> /* Reset SDIO Rx aggregation buffer parameters */</div><div class='ctx'> #define MP_RX_AGGR_BUF_RESET(a) do {					\</div><div class='hunk'>@@ -250,7 +251,7 @@</div><div class='ctx'> 	a-&gt;mpa_rx.buf_len = 0;						\</div><div class='ctx'> 	a-&gt;mpa_rx.ports = 0;						\</div><div class='ctx'> 	a-&gt;mpa_rx.start_port = 0;					\</div><div class='del'>-} while (0);</div><div class='add'>+} while (0)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* data structure for SDIO MPA TX */</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/sta_cmd.c b/drivers/net/wireless/mwifiex/sta_cmd.c<br/>index 6c8e4594b48b..40e025da6bc2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sta_cmd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/sta_cmd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sta_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sta_cmd.c</a></div><div class='hunk'>@@ -498,7 +498,8 @@ mwifiex_cmd_802_11_key_material(struct mwifiex_private *priv,</div><div class='ctx'> {</div><div class='ctx'> 	struct host_cmd_ds_802_11_key_material *key_material =</div><div class='ctx'> 		&amp;cmd-&gt;params.key_material;</div><div class='del'>-	u16 key_param_len = 0;</div><div class='add'>+	struct host_cmd_tlv_mac_addr *tlv_mac;</div><div class='add'>+	u16 key_param_len = 0, cmd_size;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	const u8 bc_mac[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };</div><div class='ctx'> </div><div class='hunk'>@@ -614,11 +615,26 @@ mwifiex_cmd_802_11_key_material(struct mwifiex_private *priv,</div><div class='ctx'> 			cpu_to_le16((u16) enc_key-&gt;key_len +</div><div class='ctx'> 				    KEYPARAMSET_FIXED_LEN);</div><div class='ctx'> </div><div class='del'>-		key_param_len = (u16) (enc_key-&gt;key_len + KEYPARAMSET_FIXED_LEN)</div><div class='add'>+		key_param_len = (u16)(enc_key-&gt;key_len + KEYPARAMSET_FIXED_LEN)</div><div class='ctx'> 				+ sizeof(struct mwifiex_ie_types_header);</div><div class='ctx'> </div><div class='ctx'> 		cmd-&gt;size = cpu_to_le16(sizeof(key_material-&gt;action) + S_DS_GEN</div><div class='ctx'> 					+ key_param_len);</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;bss_type == MWIFIEX_BSS_TYPE_UAP) {</div><div class='add'>+			tlv_mac = (void *)((u8 *)&amp;key_material-&gt;key_param_set +</div><div class='add'>+					   key_param_len);</div><div class='add'>+			tlv_mac-&gt;tlv.type = cpu_to_le16(TLV_TYPE_STA_MAC_ADDR);</div><div class='add'>+			tlv_mac-&gt;tlv.len = cpu_to_le16(ETH_ALEN);</div><div class='add'>+			memcpy(tlv_mac-&gt;mac_addr, enc_key-&gt;mac_addr, ETH_ALEN);</div><div class='add'>+			cmd_size = key_param_len + S_DS_GEN +</div><div class='add'>+				   sizeof(key_material-&gt;action) +</div><div class='add'>+				   sizeof(struct host_cmd_tlv_mac_addr);</div><div class='add'>+		} else {</div><div class='add'>+			cmd_size = key_param_len + S_DS_GEN +</div><div class='add'>+				   sizeof(key_material-&gt;action);</div><div class='add'>+		}</div><div class='add'>+		cmd-&gt;size = cpu_to_le16(cmd_size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -907,6 +923,101 @@ mwifiex_cmd_pcie_host_spec(struct mwifiex_private *priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * This function prepares command for event subscription, configuration</div><div class='add'>+ * and query. Events can be subscribed or unsubscribed. Current subscribed</div><div class='add'>+ * events can be queried. Also, current subscribed events are reported in</div><div class='add'>+ * every FW response.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+mwifiex_cmd_802_11_subsc_evt(struct mwifiex_private *priv,</div><div class='add'>+			     struct host_cmd_ds_command *cmd,</div><div class='add'>+			     struct mwifiex_ds_misc_subsc_evt *subsc_evt_cfg)</div><div class='add'>+{</div><div class='add'>+	struct host_cmd_ds_802_11_subsc_evt *subsc_evt = &amp;cmd-&gt;params.subsc_evt;</div><div class='add'>+	struct mwifiex_ie_types_rssi_threshold *rssi_tlv;</div><div class='add'>+	u16 event_bitmap;</div><div class='add'>+	u8 *pos;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;command = cpu_to_le16(HostCmd_CMD_802_11_SUBSCRIBE_EVENT);</div><div class='add'>+	cmd-&gt;size = cpu_to_le16(sizeof(struct host_cmd_ds_802_11_subsc_evt) +</div><div class='add'>+				S_DS_GEN);</div><div class='add'>+</div><div class='add'>+	subsc_evt-&gt;action = cpu_to_le16(subsc_evt_cfg-&gt;action);</div><div class='add'>+	dev_dbg(priv-&gt;adapter-&gt;dev, "cmd: action: %d\n", subsc_evt_cfg-&gt;action);</div><div class='add'>+</div><div class='add'>+	/*For query requests, no configuration TLV structures are to be added.*/</div><div class='add'>+	if (subsc_evt_cfg-&gt;action == HostCmd_ACT_GEN_GET)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	subsc_evt-&gt;events = cpu_to_le16(subsc_evt_cfg-&gt;events);</div><div class='add'>+</div><div class='add'>+	event_bitmap = subsc_evt_cfg-&gt;events;</div><div class='add'>+	dev_dbg(priv-&gt;adapter-&gt;dev, "cmd: event bitmap : %16x\n",</div><div class='add'>+		event_bitmap);</div><div class='add'>+</div><div class='add'>+	if (((subsc_evt_cfg-&gt;action == HostCmd_ACT_BITWISE_CLR) ||</div><div class='add'>+	     (subsc_evt_cfg-&gt;action == HostCmd_ACT_BITWISE_SET)) &amp;&amp;</div><div class='add'>+	    (event_bitmap == 0)) {</div><div class='add'>+		dev_dbg(priv-&gt;adapter-&gt;dev, "Error: No event specified "</div><div class='add'>+			"for bitwise action type\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Append TLV structures for each of the specified events for</div><div class='add'>+	 * subscribing or re-configuring. This is not required for</div><div class='add'>+	 * bitwise unsubscribing request.</div><div class='add'>+	 */</div><div class='add'>+	if (subsc_evt_cfg-&gt;action == HostCmd_ACT_BITWISE_CLR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	pos = ((u8 *)subsc_evt) +</div><div class='add'>+			sizeof(struct host_cmd_ds_802_11_subsc_evt);</div><div class='add'>+</div><div class='add'>+	if (event_bitmap &amp; BITMASK_BCN_RSSI_LOW) {</div><div class='add'>+		rssi_tlv = (struct mwifiex_ie_types_rssi_threshold *) pos;</div><div class='add'>+</div><div class='add'>+		rssi_tlv-&gt;header.type = cpu_to_le16(TLV_TYPE_RSSI_LOW);</div><div class='add'>+		rssi_tlv-&gt;header.len =</div><div class='add'>+		    cpu_to_le16(sizeof(struct mwifiex_ie_types_rssi_threshold) -</div><div class='add'>+				sizeof(struct mwifiex_ie_types_header));</div><div class='add'>+		rssi_tlv-&gt;abs_value = subsc_evt_cfg-&gt;bcn_l_rssi_cfg.abs_value;</div><div class='add'>+		rssi_tlv-&gt;evt_freq = subsc_evt_cfg-&gt;bcn_l_rssi_cfg.evt_freq;</div><div class='add'>+</div><div class='add'>+		dev_dbg(priv-&gt;adapter-&gt;dev, "Cfg Beacon Low Rssi event, "</div><div class='add'>+			"RSSI:-%d dBm, Freq:%d\n",</div><div class='add'>+			subsc_evt_cfg-&gt;bcn_l_rssi_cfg.abs_value,</div><div class='add'>+			subsc_evt_cfg-&gt;bcn_l_rssi_cfg.evt_freq);</div><div class='add'>+</div><div class='add'>+		pos += sizeof(struct mwifiex_ie_types_rssi_threshold);</div><div class='add'>+		le16_add_cpu(&amp;cmd-&gt;size,</div><div class='add'>+			     sizeof(struct mwifiex_ie_types_rssi_threshold));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (event_bitmap &amp; BITMASK_BCN_RSSI_HIGH) {</div><div class='add'>+		rssi_tlv = (struct mwifiex_ie_types_rssi_threshold *) pos;</div><div class='add'>+</div><div class='add'>+		rssi_tlv-&gt;header.type = cpu_to_le16(TLV_TYPE_RSSI_HIGH);</div><div class='add'>+		rssi_tlv-&gt;header.len =</div><div class='add'>+		    cpu_to_le16(sizeof(struct mwifiex_ie_types_rssi_threshold) -</div><div class='add'>+				sizeof(struct mwifiex_ie_types_header));</div><div class='add'>+		rssi_tlv-&gt;abs_value = subsc_evt_cfg-&gt;bcn_h_rssi_cfg.abs_value;</div><div class='add'>+		rssi_tlv-&gt;evt_freq = subsc_evt_cfg-&gt;bcn_h_rssi_cfg.evt_freq;</div><div class='add'>+</div><div class='add'>+		dev_dbg(priv-&gt;adapter-&gt;dev, "Cfg Beacon High Rssi event, "</div><div class='add'>+			"RSSI:-%d dBm, Freq:%d\n",</div><div class='add'>+			subsc_evt_cfg-&gt;bcn_h_rssi_cfg.abs_value,</div><div class='add'>+			subsc_evt_cfg-&gt;bcn_h_rssi_cfg.evt_freq);</div><div class='add'>+</div><div class='add'>+		pos += sizeof(struct mwifiex_ie_types_rssi_threshold);</div><div class='add'>+		le16_add_cpu(&amp;cmd-&gt;size,</div><div class='add'>+			     sizeof(struct mwifiex_ie_types_rssi_threshold));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * This function prepares the commands before sending them to the firmware.</div><div class='ctx'>  *</div><div class='ctx'>  * This is a generic function which calls specific command preparation</div><div class='hunk'>@@ -1086,6 +1197,9 @@ int mwifiex_sta_prepare_cmd(struct mwifiex_private *priv, uint16_t cmd_no,</div><div class='ctx'> 	case HostCmd_CMD_PCIE_DESC_DETAILS:</div><div class='ctx'> 		ret = mwifiex_cmd_pcie_host_spec(priv, cmd_ptr, cmd_action);</div><div class='ctx'> 		break;</div><div class='add'>+	case HostCmd_CMD_802_11_SUBSCRIBE_EVENT:</div><div class='add'>+		ret = mwifiex_cmd_802_11_subsc_evt(priv, cmd_ptr, data_buf);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_err(priv-&gt;adapter-&gt;dev,</div><div class='ctx'> 			"PREP_CMD: unknown cmd- %#x\n", cmd_no);</div><div class='hunk'>@@ -1150,13 +1264,15 @@ int mwifiex_sta_init_cmd(struct mwifiex_private *priv, u8 first_sta)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return -1;</div><div class='ctx'> </div><div class='del'>-		/* Enable IEEE PS by default */</div><div class='del'>-		priv-&gt;adapter-&gt;ps_mode = MWIFIEX_802_11_POWER_MODE_PSP;</div><div class='del'>-		ret = mwifiex_send_cmd_async(priv,</div><div class='del'>-					     HostCmd_CMD_802_11_PS_MODE_ENH,</div><div class='del'>-					     EN_AUTO_PS, BITMAP_STA_PS, NULL);</div><div class='del'>-		if (ret)</div><div class='del'>-			return -1;</div><div class='add'>+		if (priv-&gt;bss_type != MWIFIEX_BSS_TYPE_UAP) {</div><div class='add'>+			/* Enable IEEE PS by default */</div><div class='add'>+			priv-&gt;adapter-&gt;ps_mode = MWIFIEX_802_11_POWER_MODE_PSP;</div><div class='add'>+			ret = mwifiex_send_cmd_async(</div><div class='add'>+					priv, HostCmd_CMD_802_11_PS_MODE_ENH,</div><div class='add'>+					EN_AUTO_PS, BITMAP_STA_PS, NULL);</div><div class='add'>+			if (ret)</div><div class='add'>+				return -1;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* get tx rate */</div><div class='hunk'>@@ -1172,12 +1288,14 @@ int mwifiex_sta_init_cmd(struct mwifiex_private *priv, u8 first_sta)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	/* set ibss coalescing_status */</div><div class='del'>-	ret = mwifiex_send_cmd_async(priv,</div><div class='del'>-				     HostCmd_CMD_802_11_IBSS_COALESCING_STATUS,</div><div class='del'>-				     HostCmd_ACT_GEN_SET, 0, &amp;enable);</div><div class='del'>-	if (ret)</div><div class='del'>-		return -1;</div><div class='add'>+	if (priv-&gt;bss_type == MWIFIEX_BSS_TYPE_STA) {</div><div class='add'>+		/* set ibss coalescing_status */</div><div class='add'>+		ret = mwifiex_send_cmd_async(</div><div class='add'>+				priv, HostCmd_CMD_802_11_IBSS_COALESCING_STATUS,</div><div class='add'>+				HostCmd_ACT_GEN_SET, 0, &amp;enable);</div><div class='add'>+		if (ret)</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;amsdu_aggr_ctrl, 0, sizeof(amsdu_aggr_ctrl));</div><div class='ctx'> 	amsdu_aggr_ctrl.enable = true;</div><div class='hunk'>@@ -1195,7 +1313,8 @@ int mwifiex_sta_init_cmd(struct mwifiex_private *priv, u8 first_sta)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	if (first_sta) {</div><div class='add'>+	if (first_sta &amp;&amp; priv-&gt;adapter-&gt;iface_type != MWIFIEX_USB &amp;&amp;</div><div class='add'>+	    priv-&gt;bss_type != MWIFIEX_BSS_TYPE_UAP) {</div><div class='ctx'> 		/* Enable auto deep sleep */</div><div class='ctx'> 		auto_ds.auto_ds = DEEP_SLEEP_ON;</div><div class='ctx'> 		auto_ds.idle_time = DEEP_SLEEP_IDLE_TIME;</div><div class='hunk'>@@ -1207,12 +1326,16 @@ int mwifiex_sta_init_cmd(struct mwifiex_private *priv, u8 first_sta)</div><div class='ctx'> 			return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Send cmd to FW to enable/disable 11D function */</div><div class='del'>-	state_11d = ENABLE_11D;</div><div class='del'>-	ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_802_11_SNMP_MIB,</div><div class='del'>-				     HostCmd_ACT_GEN_SET, DOT11D_I, &amp;state_11d);</div><div class='del'>-	if (ret)</div><div class='del'>-		dev_err(priv-&gt;adapter-&gt;dev, "11D: failed to enable 11D\n");</div><div class='add'>+	if (priv-&gt;bss_type != MWIFIEX_BSS_TYPE_UAP) {</div><div class='add'>+		/* Send cmd to FW to enable/disable 11D function */</div><div class='add'>+		state_11d = ENABLE_11D;</div><div class='add'>+		ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_802_11_SNMP_MIB,</div><div class='add'>+					     HostCmd_ACT_GEN_SET, DOT11D_I,</div><div class='add'>+					     &amp;state_11d);</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_err(priv-&gt;adapter-&gt;dev,</div><div class='add'>+				"11D: failed to enable 11D\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Send cmd to FW to configure 11n specific configuration</div><div class='ctx'> 	 * (Short GI, Channel BW, Green field support etc.) for transmit</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/sta_cmdresp.c b/drivers/net/wireless/mwifiex/sta_cmdresp.c<br/>index 4da19ed0f078..a79ed9bd9695 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sta_cmdresp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/sta_cmdresp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sta_cmdresp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sta_cmdresp.c</a></div><div class='hunk'>@@ -119,11 +119,11 @@ mwifiex_process_cmdresp_error(struct mwifiex_private *priv,</div><div class='ctx'>  * calculated SNR values.</div><div class='ctx'>  */</div><div class='ctx'> static int mwifiex_ret_802_11_rssi_info(struct mwifiex_private *priv,</div><div class='del'>-					struct host_cmd_ds_command *resp,</div><div class='del'>-					struct mwifiex_ds_get_signal *signal)</div><div class='add'>+					struct host_cmd_ds_command *resp)</div><div class='ctx'> {</div><div class='ctx'> 	struct host_cmd_ds_802_11_rssi_info_rsp *rssi_info_rsp =</div><div class='ctx'> 						&amp;resp-&gt;params.rssi_info_rsp;</div><div class='add'>+	struct mwifiex_ds_misc_subsc_evt subsc_evt;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;data_rssi_last = le16_to_cpu(rssi_info_rsp-&gt;data_rssi_last);</div><div class='ctx'> 	priv-&gt;data_nf_last = le16_to_cpu(rssi_info_rsp-&gt;data_nf_last);</div><div class='hunk'>@@ -137,34 +137,29 @@ static int mwifiex_ret_802_11_rssi_info(struct mwifiex_private *priv,</div><div class='ctx'> 	priv-&gt;bcn_rssi_avg = le16_to_cpu(rssi_info_rsp-&gt;bcn_rssi_avg);</div><div class='ctx'> 	priv-&gt;bcn_nf_avg = le16_to_cpu(rssi_info_rsp-&gt;bcn_nf_avg);</div><div class='ctx'> </div><div class='del'>-	/* Need to indicate IOCTL complete */</div><div class='del'>-	if (signal) {</div><div class='del'>-		memset(signal, 0, sizeof(*signal));</div><div class='del'>-</div><div class='del'>-		signal-&gt;selector = ALL_RSSI_INFO_MASK;</div><div class='del'>-</div><div class='del'>-		/* RSSI */</div><div class='del'>-		signal-&gt;bcn_rssi_last = priv-&gt;bcn_rssi_last;</div><div class='del'>-		signal-&gt;bcn_rssi_avg = priv-&gt;bcn_rssi_avg;</div><div class='del'>-		signal-&gt;data_rssi_last = priv-&gt;data_rssi_last;</div><div class='del'>-		signal-&gt;data_rssi_avg = priv-&gt;data_rssi_avg;</div><div class='del'>-</div><div class='del'>-		/* SNR */</div><div class='del'>-		signal-&gt;bcn_snr_last =</div><div class='del'>-			CAL_SNR(priv-&gt;bcn_rssi_last, priv-&gt;bcn_nf_last);</div><div class='del'>-		signal-&gt;bcn_snr_avg =</div><div class='del'>-			CAL_SNR(priv-&gt;bcn_rssi_avg, priv-&gt;bcn_nf_avg);</div><div class='del'>-		signal-&gt;data_snr_last =</div><div class='del'>-			CAL_SNR(priv-&gt;data_rssi_last, priv-&gt;data_nf_last);</div><div class='del'>-		signal-&gt;data_snr_avg =</div><div class='del'>-			CAL_SNR(priv-&gt;data_rssi_avg, priv-&gt;data_nf_avg);</div><div class='del'>-</div><div class='del'>-		/* NF */</div><div class='del'>-		signal-&gt;bcn_nf_last = priv-&gt;bcn_nf_last;</div><div class='del'>-		signal-&gt;bcn_nf_avg = priv-&gt;bcn_nf_avg;</div><div class='del'>-		signal-&gt;data_nf_last = priv-&gt;data_nf_last;</div><div class='del'>-		signal-&gt;data_nf_avg = priv-&gt;data_nf_avg;</div><div class='add'>+	if (priv-&gt;subsc_evt_rssi_state == EVENT_HANDLED)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Resubscribe low and high rssi events with new thresholds */</div><div class='add'>+	memset(&amp;subsc_evt, 0x00, sizeof(struct mwifiex_ds_misc_subsc_evt));</div><div class='add'>+	subsc_evt.events = BITMASK_BCN_RSSI_LOW | BITMASK_BCN_RSSI_HIGH;</div><div class='add'>+	subsc_evt.action = HostCmd_ACT_BITWISE_SET;</div><div class='add'>+	if (priv-&gt;subsc_evt_rssi_state == RSSI_LOW_RECVD) {</div><div class='add'>+		subsc_evt.bcn_l_rssi_cfg.abs_value = abs(priv-&gt;bcn_rssi_avg -</div><div class='add'>+				priv-&gt;cqm_rssi_hyst);</div><div class='add'>+		subsc_evt.bcn_h_rssi_cfg.abs_value = abs(priv-&gt;cqm_rssi_thold);</div><div class='add'>+	} else if (priv-&gt;subsc_evt_rssi_state == RSSI_HIGH_RECVD) {</div><div class='add'>+		subsc_evt.bcn_l_rssi_cfg.abs_value = abs(priv-&gt;cqm_rssi_thold);</div><div class='add'>+		subsc_evt.bcn_h_rssi_cfg.abs_value = abs(priv-&gt;bcn_rssi_avg +</div><div class='add'>+				priv-&gt;cqm_rssi_hyst);</div><div class='ctx'> 	}</div><div class='add'>+	subsc_evt.bcn_l_rssi_cfg.evt_freq = 1;</div><div class='add'>+	subsc_evt.bcn_h_rssi_cfg.evt_freq = 1;</div><div class='add'>+</div><div class='add'>+	priv-&gt;subsc_evt_rssi_state = EVENT_HANDLED;</div><div class='add'>+</div><div class='add'>+	mwifiex_send_cmd_async(priv, HostCmd_CMD_802_11_SUBSCRIBE_EVENT,</div><div class='add'>+			       0, 0, &amp;subsc_evt);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -785,6 +780,28 @@ static int mwifiex_ret_ibss_coalescing_status(struct mwifiex_private *priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * This function handles the command response for subscribe event command.</div><div class='add'>+ */</div><div class='add'>+static int mwifiex_ret_subsc_evt(struct mwifiex_private *priv,</div><div class='add'>+				 struct host_cmd_ds_command *resp,</div><div class='add'>+				 struct mwifiex_ds_misc_subsc_evt *sub_event)</div><div class='add'>+{</div><div class='add'>+	struct host_cmd_ds_802_11_subsc_evt *cmd_sub_event =</div><div class='add'>+		(struct host_cmd_ds_802_11_subsc_evt *)&amp;resp-&gt;params.subsc_evt;</div><div class='add'>+</div><div class='add'>+	/* For every subscribe event command (Get/Set/Clear), FW reports the</div><div class='add'>+	 * current set of subscribed events*/</div><div class='add'>+	dev_dbg(priv-&gt;adapter-&gt;dev, "Bitmap of currently subscribed events: %16x\n",</div><div class='add'>+		le16_to_cpu(cmd_sub_event-&gt;events));</div><div class='add'>+</div><div class='add'>+	/*Return the subscribed event info for a Get request*/</div><div class='add'>+	if (sub_event)</div><div class='add'>+		sub_event-&gt;events = le16_to_cpu(cmd_sub_event-&gt;events);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * This function handles the command responses.</div><div class='ctx'>  *</div><div class='ctx'>  * This is a generic function, which calls command specific</div><div class='hunk'>@@ -853,7 +870,7 @@ int mwifiex_process_sta_cmdresp(struct mwifiex_private *priv, u16 cmdresp_no,</div><div class='ctx'> 		ret = mwifiex_ret_get_log(priv, resp, data_buf);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HostCmd_CMD_RSSI_INFO:</div><div class='del'>-		ret = mwifiex_ret_802_11_rssi_info(priv, resp, data_buf);</div><div class='add'>+		ret = mwifiex_ret_802_11_rssi_info(priv, resp);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HostCmd_CMD_802_11_SNMP_MIB:</div><div class='ctx'> 		ret = mwifiex_ret_802_11_snmp_mib(priv, resp, data_buf);</div><div class='hunk'>@@ -924,6 +941,17 @@ int mwifiex_process_sta_cmdresp(struct mwifiex_private *priv, u16 cmdresp_no,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HostCmd_CMD_PCIE_DESC_DETAILS:</div><div class='ctx'> 		break;</div><div class='add'>+	case HostCmd_CMD_802_11_SUBSCRIBE_EVENT:</div><div class='add'>+		ret = mwifiex_ret_subsc_evt(priv, resp, data_buf);</div><div class='add'>+		break;</div><div class='add'>+	case HostCmd_CMD_UAP_SYS_CONFIG:</div><div class='add'>+		break;</div><div class='add'>+	case HostCmd_CMD_UAP_BSS_START:</div><div class='add'>+		priv-&gt;bss_started = 1;</div><div class='add'>+		break;</div><div class='add'>+	case HostCmd_CMD_UAP_BSS_STOP:</div><div class='add'>+		priv-&gt;bss_started = 0;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_err(adapter-&gt;dev, "CMD_RESP: unknown cmd response %#x\n",</div><div class='ctx'> 			resp-&gt;command);</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/sta_event.c b/drivers/net/wireless/mwifiex/sta_event.c<br/>index cc531b536a56..4ace5a3dcd23 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sta_event.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/sta_event.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sta_event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sta_event.c</a></div><div class='hunk'>@@ -128,9 +128,6 @@ mwifiex_reset_connect_state(struct mwifiex_private *priv)</div><div class='ctx'> 		mwifiex_stop_net_dev_queue(priv-&gt;netdev, adapter);</div><div class='ctx'> 	if (netif_carrier_ok(priv-&gt;netdev))</div><div class='ctx'> 		netif_carrier_off(priv-&gt;netdev);</div><div class='del'>-	/* Reset wireless stats signal info */</div><div class='del'>-	priv-&gt;qual_level = 0;</div><div class='del'>-	priv-&gt;qual_noise = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -187,8 +184,10 @@ mwifiex_reset_connect_state(struct mwifiex_private *priv)</div><div class='ctx'> int mwifiex_process_sta_event(struct mwifiex_private *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct mwifiex_adapter *adapter = priv-&gt;adapter;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int len, ret = 0;</div><div class='ctx'> 	u32 eventcause = adapter-&gt;event_cause;</div><div class='add'>+	struct station_info sinfo;</div><div class='add'>+	struct mwifiex_assoc_event *event;</div><div class='ctx'> </div><div class='ctx'> 	switch (eventcause) {</div><div class='ctx'> 	case EVENT_DUMMY_HOST_WAKEUP_SIGNAL:</div><div class='hunk'>@@ -317,6 +316,12 @@ int mwifiex_process_sta_event(struct mwifiex_private *priv)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case EVENT_RSSI_LOW:</div><div class='add'>+		cfg80211_cqm_rssi_notify(priv-&gt;netdev,</div><div class='add'>+					 NL80211_CQM_RSSI_THRESHOLD_EVENT_LOW,</div><div class='add'>+					 GFP_KERNEL);</div><div class='add'>+		mwifiex_send_cmd_async(priv, HostCmd_CMD_RSSI_INFO,</div><div class='add'>+				       HostCmd_ACT_GEN_GET, 0, NULL);</div><div class='add'>+		priv-&gt;subsc_evt_rssi_state = RSSI_LOW_RECVD;</div><div class='ctx'> 		dev_dbg(adapter-&gt;dev, "event: Beacon RSSI_LOW\n");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case EVENT_SNR_LOW:</div><div class='hunk'>@@ -326,6 +331,12 @@ int mwifiex_process_sta_event(struct mwifiex_private *priv)</div><div class='ctx'> 		dev_dbg(adapter-&gt;dev, "event: MAX_FAIL\n");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case EVENT_RSSI_HIGH:</div><div class='add'>+		cfg80211_cqm_rssi_notify(priv-&gt;netdev,</div><div class='add'>+					 NL80211_CQM_RSSI_THRESHOLD_EVENT_HIGH,</div><div class='add'>+					 GFP_KERNEL);</div><div class='add'>+		mwifiex_send_cmd_async(priv, HostCmd_CMD_RSSI_INFO,</div><div class='add'>+				       HostCmd_ACT_GEN_GET, 0, NULL);</div><div class='add'>+		priv-&gt;subsc_evt_rssi_state = RSSI_HIGH_RECVD;</div><div class='ctx'> 		dev_dbg(adapter-&gt;dev, "event: Beacon RSSI_HIGH\n");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case EVENT_SNR_HIGH:</div><div class='hunk'>@@ -393,6 +404,53 @@ int mwifiex_process_sta_event(struct mwifiex_private *priv)</div><div class='ctx'> 	case EVENT_HOSTWAKE_STAIE:</div><div class='ctx'> 		dev_dbg(adapter-&gt;dev, "event: HOSTWAKE_STAIE %d\n", eventcause);</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='add'>+	case EVENT_UAP_STA_ASSOC:</div><div class='add'>+		skb_pull(adapter-&gt;event_skb, MWIFIEX_UAP_EVENT_EXTRA_HEADER);</div><div class='add'>+		memset(&amp;sinfo, 0, sizeof(sinfo));</div><div class='add'>+		event = (struct mwifiex_assoc_event *)adapter-&gt;event_skb-&gt;data;</div><div class='add'>+		if (le16_to_cpu(event-&gt;type) == TLV_TYPE_UAP_MGMT_FRAME) {</div><div class='add'>+			len = -1;</div><div class='add'>+</div><div class='add'>+			if (ieee80211_is_assoc_req(event-&gt;frame_control))</div><div class='add'>+				len = 0;</div><div class='add'>+			else if (ieee80211_is_reassoc_req(event-&gt;frame_control))</div><div class='add'>+				/* There will be ETH_ALEN bytes of</div><div class='add'>+				 * current_ap_addr before the re-assoc ies.</div><div class='add'>+				 */</div><div class='add'>+				len = ETH_ALEN;</div><div class='add'>+</div><div class='add'>+			if (len != -1) {</div><div class='add'>+				sinfo.filled = STATION_INFO_ASSOC_REQ_IES;</div><div class='add'>+				sinfo.assoc_req_ies = (u8 *)&amp;event-&gt;data[len];</div><div class='add'>+				len = (u8 *)sinfo.assoc_req_ies -</div><div class='add'>+				      (u8 *)&amp;event-&gt;frame_control;</div><div class='add'>+				sinfo.assoc_req_ies_len =</div><div class='add'>+					le16_to_cpu(event-&gt;len) - (u16)len;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		cfg80211_new_sta(priv-&gt;netdev, event-&gt;sta_addr, &amp;sinfo,</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+		break;</div><div class='add'>+	case EVENT_UAP_STA_DEAUTH:</div><div class='add'>+		skb_pull(adapter-&gt;event_skb, MWIFIEX_UAP_EVENT_EXTRA_HEADER);</div><div class='add'>+		cfg80211_del_sta(priv-&gt;netdev, adapter-&gt;event_skb-&gt;data,</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+		break;</div><div class='add'>+	case EVENT_UAP_BSS_IDLE:</div><div class='add'>+		priv-&gt;media_connected = false;</div><div class='add'>+		break;</div><div class='add'>+	case EVENT_UAP_BSS_ACTIVE:</div><div class='add'>+		priv-&gt;media_connected = true;</div><div class='add'>+		break;</div><div class='add'>+	case EVENT_UAP_BSS_START:</div><div class='add'>+		dev_dbg(adapter-&gt;dev, "AP EVENT: event id: %#x\n", eventcause);</div><div class='add'>+		memcpy(priv-&gt;netdev-&gt;dev_addr, adapter-&gt;event_body+2, ETH_ALEN);</div><div class='add'>+		break;</div><div class='add'>+	case EVENT_UAP_MIC_COUNTERMEASURES:</div><div class='add'>+		/* For future development */</div><div class='add'>+		dev_dbg(adapter-&gt;dev, "AP EVENT: event id: %#x\n", eventcause);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_dbg(adapter-&gt;dev, "event: unknown event id: %#x\n",</div><div class='ctx'> 			eventcause);</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/sta_ioctl.c b/drivers/net/wireless/mwifiex/sta_ioctl.c<br/>index d7b11defafe0..106c449477b2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sta_ioctl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/sta_ioctl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sta_ioctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sta_ioctl.c</a></div><div class='hunk'>@@ -155,20 +155,29 @@ int mwifiex_request_set_multicast_list(struct mwifiex_private *priv,</div><div class='ctx'>  * information.</div><div class='ctx'>  */</div><div class='ctx'> int mwifiex_fill_new_bss_desc(struct mwifiex_private *priv,</div><div class='del'>-			      u8 *bssid, s32 rssi, u8 *ie_buf,</div><div class='del'>-			      size_t ie_len, u16 beacon_period,</div><div class='del'>-			      u16 cap_info_bitmap, u8 band,</div><div class='add'>+			      struct cfg80211_bss *bss,</div><div class='ctx'> 			      struct mwifiex_bssdescriptor *bss_desc)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='add'>+	u8 *beacon_ie;</div><div class='add'>+	struct mwifiex_bss_priv *bss_priv = (void *)bss-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	memcpy(bss_desc-&gt;mac_address, bssid, ETH_ALEN);</div><div class='del'>-	bss_desc-&gt;rssi = rssi;</div><div class='del'>-	bss_desc-&gt;beacon_buf = ie_buf;</div><div class='del'>-	bss_desc-&gt;beacon_buf_size = ie_len;</div><div class='del'>-	bss_desc-&gt;beacon_period = beacon_period;</div><div class='del'>-	bss_desc-&gt;cap_info_bitmap = cap_info_bitmap;</div><div class='del'>-	bss_desc-&gt;bss_band = band;</div><div class='add'>+	beacon_ie = kmemdup(bss-&gt;information_elements, bss-&gt;len_beacon_ies,</div><div class='add'>+			    GFP_KERNEL);</div><div class='add'>+	if (!beacon_ie) {</div><div class='add'>+		dev_err(priv-&gt;adapter-&gt;dev, " failed to alloc beacon_ie\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(bss_desc-&gt;mac_address, bss-&gt;bssid, ETH_ALEN);</div><div class='add'>+	bss_desc-&gt;rssi = bss-&gt;signal;</div><div class='add'>+	bss_desc-&gt;beacon_buf = beacon_ie;</div><div class='add'>+	bss_desc-&gt;beacon_buf_size = bss-&gt;len_beacon_ies;</div><div class='add'>+	bss_desc-&gt;beacon_period = bss-&gt;beacon_interval;</div><div class='add'>+	bss_desc-&gt;cap_info_bitmap = bss-&gt;capability;</div><div class='add'>+	bss_desc-&gt;bss_band = bss_priv-&gt;band;</div><div class='add'>+	bss_desc-&gt;fw_tsf = bss_priv-&gt;fw_tsf;</div><div class='add'>+	bss_desc-&gt;timestamp = bss-&gt;tsf;</div><div class='ctx'> 	if (bss_desc-&gt;cap_info_bitmap &amp; WLAN_CAPABILITY_PRIVACY) {</div><div class='ctx'> 		dev_dbg(priv-&gt;adapter-&gt;dev, "info: InterpretIE: AP WEP enabled\n");</div><div class='ctx'> 		bss_desc-&gt;privacy = MWIFIEX_802_11_PRIV_FILTER_8021X_WEP;</div><div class='hunk'>@@ -180,9 +189,9 @@ int mwifiex_fill_new_bss_desc(struct mwifiex_private *priv,</div><div class='ctx'> 	else</div><div class='ctx'> 		bss_desc-&gt;bss_mode = NL80211_IFTYPE_STATION;</div><div class='ctx'> </div><div class='del'>-	ret = mwifiex_update_bss_desc_with_ie(priv-&gt;adapter, bss_desc,</div><div class='del'>-					      ie_buf, ie_len);</div><div class='add'>+	ret = mwifiex_update_bss_desc_with_ie(priv-&gt;adapter, bss_desc);</div><div class='ctx'> </div><div class='add'>+	kfree(beacon_ie);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -197,7 +206,6 @@ int mwifiex_bss_start(struct mwifiex_private *priv, struct cfg80211_bss *bss,</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct mwifiex_adapter *adapter = priv-&gt;adapter;</div><div class='ctx'> 	struct mwifiex_bssdescriptor *bss_desc = NULL;</div><div class='del'>-	u8 *beacon_ie = NULL;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;scan_block = false;</div><div class='ctx'> </div><div class='hunk'>@@ -210,19 +218,7 @@ int mwifiex_bss_start(struct mwifiex_private *priv, struct cfg80211_bss *bss,</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		beacon_ie = kmemdup(bss-&gt;information_elements,</div><div class='del'>-					bss-&gt;len_beacon_ies, GFP_KERNEL);</div><div class='del'>-		if (!beacon_ie) {</div><div class='del'>-			kfree(bss_desc);</div><div class='del'>-			dev_err(priv-&gt;adapter-&gt;dev, " failed to alloc beacon_ie\n");</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ret = mwifiex_fill_new_bss_desc(priv, bss-&gt;bssid, bss-&gt;signal,</div><div class='del'>-						beacon_ie, bss-&gt;len_beacon_ies,</div><div class='del'>-						bss-&gt;beacon_interval,</div><div class='del'>-						bss-&gt;capability,</div><div class='del'>-						*(u8 *)bss-&gt;priv, bss_desc);</div><div class='add'>+		ret = mwifiex_fill_new_bss_desc(priv, bss, bss_desc);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto done;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -269,7 +265,6 @@ int mwifiex_bss_start(struct mwifiex_private *priv, struct cfg80211_bss *bss,</div><div class='ctx'> 		    (!mwifiex_ssid_cmp(&amp;priv-&gt;curr_bss_params.bss_descriptor.</div><div class='ctx'> 				       ssid, &amp;bss_desc-&gt;ssid))) {</div><div class='ctx'> 			kfree(bss_desc);</div><div class='del'>-			kfree(beacon_ie);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -304,7 +299,6 @@ int mwifiex_bss_start(struct mwifiex_private *priv, struct cfg80211_bss *bss,</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='ctx'> 	kfree(bss_desc);</div><div class='del'>-	kfree(beacon_ie);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -468,7 +462,8 @@ int mwifiex_get_bss_info(struct mwifiex_private *priv,</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;bss_chan = bss_desc-&gt;channel;</div><div class='ctx'> </div><div class='del'>-	info-&gt;region_code = adapter-&gt;region_code;</div><div class='add'>+	memcpy(info-&gt;country_code, adapter-&gt;country_code,</div><div class='add'>+	       IEEE80211_COUNTRY_STRING_LEN);</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;media_connected = priv-&gt;media_connected;</div><div class='ctx'> </div><div class='hunk'>@@ -996,6 +991,39 @@ static int mwifiex_set_wapi_ie(struct mwifiex_private *priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * IOCTL request handler to set/reset WPS IE.</div><div class='add'>+ *</div><div class='add'>+ * The supplied WPS IE is treated as a opaque buffer. Only the first field</div><div class='add'>+ * is checked to internally enable WPS. If buffer length is zero, the existing</div><div class='add'>+ * WPS IE is reset.</div><div class='add'>+ */</div><div class='add'>+static int mwifiex_set_wps_ie(struct mwifiex_private *priv,</div><div class='add'>+			       u8 *ie_data_ptr, u16 ie_len)</div><div class='add'>+{</div><div class='add'>+	if (ie_len) {</div><div class='add'>+		priv-&gt;wps_ie = kzalloc(MWIFIEX_MAX_VSIE_LEN, GFP_KERNEL);</div><div class='add'>+		if (!priv-&gt;wps_ie)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		if (ie_len &gt; sizeof(priv-&gt;wps_ie)) {</div><div class='add'>+			dev_dbg(priv-&gt;adapter-&gt;dev,</div><div class='add'>+				"info: failed to copy WPS IE, too big\n");</div><div class='add'>+			kfree(priv-&gt;wps_ie);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+		memcpy(priv-&gt;wps_ie, ie_data_ptr, ie_len);</div><div class='add'>+		priv-&gt;wps_ie_len = ie_len;</div><div class='add'>+		dev_dbg(priv-&gt;adapter-&gt;dev, "cmd: Set wps_ie_len=%d IE=%#x\n",</div><div class='add'>+			priv-&gt;wps_ie_len, priv-&gt;wps_ie[0]);</div><div class='add'>+	} else {</div><div class='add'>+		kfree(priv-&gt;wps_ie);</div><div class='add'>+		priv-&gt;wps_ie_len = ie_len;</div><div class='add'>+		dev_dbg(priv-&gt;adapter-&gt;dev,</div><div class='add'>+			"info: Reset wps_ie_len=%d\n", priv-&gt;wps_ie_len);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * IOCTL request handler to set WAPI key.</div><div class='ctx'>  *</div><div class='ctx'>  * This function prepares the correct firmware command and</div><div class='hunk'>@@ -1185,46 +1213,14 @@ mwifiex_drv_get_driver_version(struct mwifiex_adapter *adapter, char *version,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Sends IOCTL request to get signal information.</div><div class='del'>- *</div><div class='del'>- * This function allocates the IOCTL request buffer, fills it</div><div class='del'>- * with requisite parameters and calls the IOCTL handler.</div><div class='del'>- */</div><div class='del'>-int mwifiex_get_signal_info(struct mwifiex_private *priv,</div><div class='del'>-			    struct mwifiex_ds_get_signal *signal)</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	signal-&gt;selector = ALL_RSSI_INFO_MASK;</div><div class='del'>-</div><div class='del'>-	/* Signal info can be obtained only if connected */</div><div class='del'>-	if (!priv-&gt;media_connected) {</div><div class='del'>-		dev_dbg(priv-&gt;adapter-&gt;dev,</div><div class='del'>-			"info: Can not get signal in disconnected state\n");</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	status = mwifiex_send_cmd_sync(priv, HostCmd_CMD_RSSI_INFO,</div><div class='del'>-				       HostCmd_ACT_GEN_GET, 0, signal);</div><div class='del'>-</div><div class='del'>-	if (!status) {</div><div class='del'>-		if (signal-&gt;selector &amp; BCN_RSSI_AVG_MASK)</div><div class='del'>-			priv-&gt;qual_level = signal-&gt;bcn_rssi_avg;</div><div class='del'>-		if (signal-&gt;selector &amp; BCN_NF_AVG_MASK)</div><div class='del'>-			priv-&gt;qual_noise = signal-&gt;bcn_nf_avg;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Sends IOCTL request to set encoding parameters.</div><div class='ctx'>  *</div><div class='ctx'>  * This function allocates the IOCTL request buffer, fills it</div><div class='ctx'>  * with requisite parameters and calls the IOCTL handler.</div><div class='ctx'>  */</div><div class='ctx'> int mwifiex_set_encode(struct mwifiex_private *priv, const u8 *key,</div><div class='del'>-			int key_len, u8 key_index, int disable)</div><div class='add'>+			int key_len, u8 key_index,</div><div class='add'>+			const u8 *mac_addr, int disable)</div><div class='ctx'> {</div><div class='ctx'> 	struct mwifiex_ds_encrypt_key encrypt_key;</div><div class='ctx'> </div><div class='hunk'>@@ -1234,8 +1230,12 @@ int mwifiex_set_encode(struct mwifiex_private *priv, const u8 *key,</div><div class='ctx'> 		encrypt_key.key_index = key_index;</div><div class='ctx'> 		if (key_len)</div><div class='ctx'> 			memcpy(encrypt_key.key_material, key, key_len);</div><div class='add'>+		if (mac_addr)</div><div class='add'>+			memcpy(encrypt_key.mac_addr, mac_addr, ETH_ALEN);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		encrypt_key.key_disable = true;</div><div class='add'>+		if (mac_addr)</div><div class='add'>+			memcpy(encrypt_key.mac_addr, mac_addr, ETH_ALEN);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return mwifiex_sec_ioctl_encrypt_key(priv, &amp;encrypt_key);</div><div class='hunk'>@@ -1441,6 +1441,7 @@ mwifiex_set_gen_ie_helper(struct mwifiex_private *priv, u8 *ie_data_ptr,</div><div class='ctx'> 			priv-&gt;wps.session_enable = true;</div><div class='ctx'> 			dev_dbg(priv-&gt;adapter-&gt;dev,</div><div class='ctx'> 				"info: WPS Session Enabled.\n");</div><div class='add'>+			ret = mwifiex_set_wps_ie(priv, ie_data_ptr, ie_len);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Append the passed data to the end of the</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/sta_rx.c b/drivers/net/wireless/mwifiex/sta_rx.c<br/>index 750b695aca12..02ce3b77d3e7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sta_rx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/sta_rx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sta_rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sta_rx.c</a></div><div class='hunk'>@@ -145,7 +145,12 @@ int mwifiex_process_sta_rx_packet(struct mwifiex_adapter *adapter,</div><div class='ctx'> 			" rx_pkt_offset=%d, rx_pkt_length=%d\n", skb-&gt;len,</div><div class='ctx'> 		       local_rx_pd-&gt;rx_pkt_offset, local_rx_pd-&gt;rx_pkt_length);</div><div class='ctx'> 		priv-&gt;stats.rx_dropped++;</div><div class='del'>-		dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='add'>+		if (adapter-&gt;if_ops.data_complete)</div><div class='add'>+			adapter-&gt;if_ops.data_complete(adapter, skb);</div><div class='add'>+		else</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -196,8 +201,12 @@ int mwifiex_process_sta_rx_packet(struct mwifiex_adapter *adapter,</div><div class='ctx'> 					     (u8) local_rx_pd-&gt;rx_pkt_type,</div><div class='ctx'> 					     skb);</div><div class='ctx'> </div><div class='del'>-	if (ret || (rx_pkt_type == PKT_TYPE_BAR))</div><div class='del'>-		dev_kfree_skb_any(skb);</div><div class='add'>+	if (ret || (rx_pkt_type == PKT_TYPE_BAR)) {</div><div class='add'>+		if (adapter-&gt;if_ops.data_complete)</div><div class='add'>+			adapter-&gt;if_ops.data_complete(adapter, skb);</div><div class='add'>+		else</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		priv-&gt;stats.rx_dropped++;</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/sta_tx.c b/drivers/net/wireless/mwifiex/sta_tx.c<br/>index 7af534feb420..0a046d3a0c16 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sta_tx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/sta_tx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/sta_tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/sta_tx.c</a></div><div class='hunk'>@@ -149,10 +149,14 @@ int mwifiex_send_null_packet(struct mwifiex_private *priv, u8 flags)</div><div class='ctx'> 	local_tx_pd-&gt;bss_num = priv-&gt;bss_num;</div><div class='ctx'> 	local_tx_pd-&gt;bss_type = priv-&gt;bss_type;</div><div class='ctx'> </div><div class='del'>-	skb_push(skb, INTF_HEADER_LEN);</div><div class='del'>-</div><div class='del'>-	ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_TYPE_DATA,</div><div class='del'>-					   skb, NULL);</div><div class='add'>+	if (adapter-&gt;iface_type == MWIFIEX_USB) {</div><div class='add'>+		ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_USB_EP_DATA,</div><div class='add'>+						   skb, NULL);</div><div class='add'>+	} else {</div><div class='add'>+		skb_push(skb, INTF_HEADER_LEN);</div><div class='add'>+		ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_TYPE_DATA,</div><div class='add'>+						   skb, NULL);</div><div class='add'>+	}</div><div class='ctx'> 	switch (ret) {</div><div class='ctx'> 	case -EBUSY:</div><div class='ctx'> 		adapter-&gt;data_sent = true;</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/txrx.c b/drivers/net/wireless/mwifiex/txrx.c<br/>index d2af8cb98541..e2faec4db108 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/txrx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/txrx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/txrx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/txrx.c</a></div><div class='hunk'>@@ -77,12 +77,23 @@ int mwifiex_process_tx(struct mwifiex_private *priv, struct sk_buff *skb,</div><div class='ctx'> 		if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_STA)</div><div class='ctx'> 			local_tx_pd =</div><div class='ctx'> 				(struct txpd *) (head_ptr + INTF_HEADER_LEN);</div><div class='del'>-</div><div class='del'>-		ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_TYPE_DATA,</div><div class='del'>-						   skb, tx_param);</div><div class='add'>+		if (adapter-&gt;iface_type == MWIFIEX_USB) {</div><div class='add'>+			adapter-&gt;data_sent = true;</div><div class='add'>+			skb_pull(skb, INTF_HEADER_LEN);</div><div class='add'>+			ret = adapter-&gt;if_ops.host_to_card(adapter,</div><div class='add'>+							   MWIFIEX_USB_EP_DATA,</div><div class='add'>+							   skb, NULL);</div><div class='add'>+		} else {</div><div class='add'>+			ret = adapter-&gt;if_ops.host_to_card(adapter,</div><div class='add'>+							   MWIFIEX_TYPE_DATA,</div><div class='add'>+							   skb, tx_param);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (ret) {</div><div class='add'>+	case -ENOSR:</div><div class='add'>+		dev_err(adapter-&gt;dev, "data: -ENOSR is returned\n");</div><div class='add'>+		break;</div><div class='ctx'> 	case -EBUSY:</div><div class='ctx'> 		if ((GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_STA) &amp;&amp;</div><div class='ctx'> 		    (adapter-&gt;pps_uapsd_mode) &amp;&amp; (adapter-&gt;tx_lock_flag)) {</div><div class='hunk'>@@ -135,6 +146,9 @@ int mwifiex_write_data_complete(struct mwifiex_adapter *adapter,</div><div class='ctx'> 	if (!priv)</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;iface_type == MWIFIEX_USB)</div><div class='add'>+		adapter-&gt;data_sent = false;</div><div class='add'>+</div><div class='ctx'> 	mwifiex_set_trans_start(priv-&gt;netdev);</div><div class='ctx'> 	if (!status) {</div><div class='ctx'> 		priv-&gt;stats.tx_packets++;</div><div class='hunk'>@@ -162,4 +176,5 @@ done:</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(mwifiex_write_data_complete);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/uap_cmd.c b/drivers/net/wireless/mwifiex/uap_cmd.c<br/>new file mode 100644<br/>index 000000000000..76dfbc42a732<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/uap_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/uap_cmd.c</a></div><div class='hunk'>@@ -0,0 +1,432 @@</div><div class='add'>+/*</div><div class='add'>+ * Marvell Wireless LAN device driver: AP specific command handling</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012, Marvell International Ltd.</div><div class='add'>+ *</div><div class='add'>+ * This software file (the "File") is distributed by Marvell International</div><div class='add'>+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991</div><div class='add'>+ * (the "License").  You may use, redistribute and/or modify this File in</div><div class='add'>+ * accordance with the terms and conditions of the License, a copy of which</div><div class='add'>+ * is available by writing to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the</div><div class='add'>+ * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.</div><div class='add'>+ *</div><div class='add'>+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE</div><div class='add'>+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE</div><div class='add'>+ * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about</div><div class='add'>+ * this warranty disclaimer.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+/* This function parses security related parameters from cfg80211_ap_settings</div><div class='add'>+ * and sets into FW understandable bss_config structure.</div><div class='add'>+ */</div><div class='add'>+int mwifiex_set_secure_params(struct mwifiex_private *priv,</div><div class='add'>+			      struct mwifiex_uap_bss_param *bss_config,</div><div class='add'>+			      struct cfg80211_ap_settings *params) {</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	switch (params-&gt;auth_type) {</div><div class='add'>+	case NL80211_AUTHTYPE_OPEN_SYSTEM:</div><div class='add'>+		bss_config-&gt;auth_mode = WLAN_AUTH_OPEN;</div><div class='add'>+		break;</div><div class='add'>+	case NL80211_AUTHTYPE_SHARED_KEY:</div><div class='add'>+		bss_config-&gt;auth_mode = WLAN_AUTH_SHARED_KEY;</div><div class='add'>+		break;</div><div class='add'>+	case NL80211_AUTHTYPE_NETWORK_EAP:</div><div class='add'>+		bss_config-&gt;auth_mode = WLAN_AUTH_LEAP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		bss_config-&gt;auth_mode = MWIFIEX_AUTH_MODE_AUTO;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bss_config-&gt;key_mgmt_operation |= KEY_MGMT_ON_HOST;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; params-&gt;crypto.n_akm_suites; i++) {</div><div class='add'>+		switch (params-&gt;crypto.akm_suites[i]) {</div><div class='add'>+		case WLAN_AKM_SUITE_8021X:</div><div class='add'>+			if (params-&gt;crypto.wpa_versions &amp;</div><div class='add'>+			    NL80211_WPA_VERSION_1) {</div><div class='add'>+				bss_config-&gt;protocol = PROTOCOL_WPA;</div><div class='add'>+				bss_config-&gt;key_mgmt = KEY_MGMT_EAP;</div><div class='add'>+			}</div><div class='add'>+			if (params-&gt;crypto.wpa_versions &amp;</div><div class='add'>+			    NL80211_WPA_VERSION_2) {</div><div class='add'>+				bss_config-&gt;protocol = PROTOCOL_WPA2;</div><div class='add'>+				bss_config-&gt;key_mgmt = KEY_MGMT_EAP;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case WLAN_AKM_SUITE_PSK:</div><div class='add'>+			if (params-&gt;crypto.wpa_versions &amp;</div><div class='add'>+			    NL80211_WPA_VERSION_1) {</div><div class='add'>+				bss_config-&gt;protocol = PROTOCOL_WPA;</div><div class='add'>+				bss_config-&gt;key_mgmt = KEY_MGMT_PSK;</div><div class='add'>+			}</div><div class='add'>+			if (params-&gt;crypto.wpa_versions &amp;</div><div class='add'>+			    NL80211_WPA_VERSION_2) {</div><div class='add'>+				bss_config-&gt;protocol = PROTOCOL_WPA2;</div><div class='add'>+				bss_config-&gt;key_mgmt = KEY_MGMT_PSK;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; params-&gt;crypto.n_ciphers_pairwise; i++) {</div><div class='add'>+		switch (params-&gt;crypto.ciphers_pairwise[i]) {</div><div class='add'>+		case WLAN_CIPHER_SUITE_WEP40:</div><div class='add'>+		case WLAN_CIPHER_SUITE_WEP104:</div><div class='add'>+			break;</div><div class='add'>+		case WLAN_CIPHER_SUITE_TKIP:</div><div class='add'>+			bss_config-&gt;wpa_cfg.pairwise_cipher_wpa = CIPHER_TKIP;</div><div class='add'>+			break;</div><div class='add'>+		case WLAN_CIPHER_SUITE_CCMP:</div><div class='add'>+			bss_config-&gt;wpa_cfg.pairwise_cipher_wpa2 =</div><div class='add'>+								CIPHER_AES_CCMP;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (params-&gt;crypto.cipher_group) {</div><div class='add'>+	case WLAN_CIPHER_SUITE_WEP40:</div><div class='add'>+	case WLAN_CIPHER_SUITE_WEP104:</div><div class='add'>+		break;</div><div class='add'>+	case WLAN_CIPHER_SUITE_TKIP:</div><div class='add'>+		bss_config-&gt;wpa_cfg.group_cipher = CIPHER_TKIP;</div><div class='add'>+		break;</div><div class='add'>+	case WLAN_CIPHER_SUITE_CCMP:</div><div class='add'>+		bss_config-&gt;wpa_cfg.group_cipher = CIPHER_AES_CCMP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function initializes some of mwifiex_uap_bss_param variables.</div><div class='add'>+ * This helps FW in ignoring invalid values. These values may or may not</div><div class='add'>+ * be get updated to valid ones at later stage.</div><div class='add'>+ */</div><div class='add'>+void mwifiex_set_sys_config_invalid_data(struct mwifiex_uap_bss_param *config)</div><div class='add'>+{</div><div class='add'>+	config-&gt;bcast_ssid_ctl = 0x7F;</div><div class='add'>+	config-&gt;radio_ctl = 0x7F;</div><div class='add'>+	config-&gt;dtim_period = 0x7F;</div><div class='add'>+	config-&gt;beacon_period = 0x7FFF;</div><div class='add'>+	config-&gt;auth_mode = 0x7F;</div><div class='add'>+	config-&gt;rts_threshold = 0x7FFF;</div><div class='add'>+	config-&gt;frag_threshold = 0x7FFF;</div><div class='add'>+	config-&gt;retry_limit = 0x7F;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function parses BSS related parameters from structure</div><div class='add'>+ * and prepares TLVs. These TLVs are appended to command buffer.</div><div class='add'>+*/</div><div class='add'>+static int</div><div class='add'>+mwifiex_uap_bss_param_prepare(u8 *tlv, void *cmd_buf, u16 *param_size)</div><div class='add'>+{</div><div class='add'>+	struct host_cmd_tlv_dtim_period *dtim_period;</div><div class='add'>+	struct host_cmd_tlv_beacon_period *beacon_period;</div><div class='add'>+	struct host_cmd_tlv_ssid *ssid;</div><div class='add'>+	struct host_cmd_tlv_channel_band *chan_band;</div><div class='add'>+	struct host_cmd_tlv_frag_threshold *frag_threshold;</div><div class='add'>+	struct host_cmd_tlv_rts_threshold *rts_threshold;</div><div class='add'>+	struct host_cmd_tlv_retry_limit *retry_limit;</div><div class='add'>+	struct host_cmd_tlv_pwk_cipher *pwk_cipher;</div><div class='add'>+	struct host_cmd_tlv_gwk_cipher *gwk_cipher;</div><div class='add'>+	struct host_cmd_tlv_encrypt_protocol *encrypt_protocol;</div><div class='add'>+	struct host_cmd_tlv_auth_type *auth_type;</div><div class='add'>+	struct host_cmd_tlv_passphrase *passphrase;</div><div class='add'>+	struct host_cmd_tlv_akmp *tlv_akmp;</div><div class='add'>+	struct mwifiex_uap_bss_param *bss_cfg = cmd_buf;</div><div class='add'>+	u16 cmd_size = *param_size;</div><div class='add'>+</div><div class='add'>+	if (bss_cfg-&gt;ssid.ssid_len) {</div><div class='add'>+		ssid = (struct host_cmd_tlv_ssid *)tlv;</div><div class='add'>+		ssid-&gt;tlv.type = cpu_to_le16(TLV_TYPE_UAP_SSID);</div><div class='add'>+		ssid-&gt;tlv.len = cpu_to_le16((u16)bss_cfg-&gt;ssid.ssid_len);</div><div class='add'>+		memcpy(ssid-&gt;ssid, bss_cfg-&gt;ssid.ssid, bss_cfg-&gt;ssid.ssid_len);</div><div class='add'>+		cmd_size += sizeof(struct host_cmd_tlv) +</div><div class='add'>+			    bss_cfg-&gt;ssid.ssid_len;</div><div class='add'>+		tlv += sizeof(struct host_cmd_tlv) + bss_cfg-&gt;ssid.ssid_len;</div><div class='add'>+	}</div><div class='add'>+	if (bss_cfg-&gt;channel &amp;&amp; bss_cfg-&gt;channel &lt;= MAX_CHANNEL_BAND_BG) {</div><div class='add'>+		chan_band = (struct host_cmd_tlv_channel_band *)tlv;</div><div class='add'>+		chan_band-&gt;tlv.type = cpu_to_le16(TLV_TYPE_CHANNELBANDLIST);</div><div class='add'>+		chan_band-&gt;tlv.len =</div><div class='add'>+			cpu_to_le16(sizeof(struct host_cmd_tlv_channel_band) -</div><div class='add'>+				    sizeof(struct host_cmd_tlv));</div><div class='add'>+		chan_band-&gt;band_config = bss_cfg-&gt;band_cfg;</div><div class='add'>+		chan_band-&gt;channel = bss_cfg-&gt;channel;</div><div class='add'>+		cmd_size += sizeof(struct host_cmd_tlv_channel_band);</div><div class='add'>+		tlv += sizeof(struct host_cmd_tlv_channel_band);</div><div class='add'>+	}</div><div class='add'>+	if (bss_cfg-&gt;beacon_period &gt;= MIN_BEACON_PERIOD &amp;&amp;</div><div class='add'>+	    bss_cfg-&gt;beacon_period &lt;= MAX_BEACON_PERIOD) {</div><div class='add'>+		beacon_period = (struct host_cmd_tlv_beacon_period *)tlv;</div><div class='add'>+		beacon_period-&gt;tlv.type =</div><div class='add'>+					cpu_to_le16(TLV_TYPE_UAP_BEACON_PERIOD);</div><div class='add'>+		beacon_period-&gt;tlv.len =</div><div class='add'>+			cpu_to_le16(sizeof(struct host_cmd_tlv_beacon_period) -</div><div class='add'>+				    sizeof(struct host_cmd_tlv));</div><div class='add'>+		beacon_period-&gt;period = cpu_to_le16(bss_cfg-&gt;beacon_period);</div><div class='add'>+		cmd_size += sizeof(struct host_cmd_tlv_beacon_period);</div><div class='add'>+		tlv += sizeof(struct host_cmd_tlv_beacon_period);</div><div class='add'>+	}</div><div class='add'>+	if (bss_cfg-&gt;dtim_period &gt;= MIN_DTIM_PERIOD &amp;&amp;</div><div class='add'>+	    bss_cfg-&gt;dtim_period &lt;= MAX_DTIM_PERIOD) {</div><div class='add'>+		dtim_period = (struct host_cmd_tlv_dtim_period *)tlv;</div><div class='add'>+		dtim_period-&gt;tlv.type = cpu_to_le16(TLV_TYPE_UAP_DTIM_PERIOD);</div><div class='add'>+		dtim_period-&gt;tlv.len =</div><div class='add'>+			cpu_to_le16(sizeof(struct host_cmd_tlv_dtim_period) -</div><div class='add'>+				    sizeof(struct host_cmd_tlv));</div><div class='add'>+		dtim_period-&gt;period = bss_cfg-&gt;dtim_period;</div><div class='add'>+		cmd_size += sizeof(struct host_cmd_tlv_dtim_period);</div><div class='add'>+		tlv += sizeof(struct host_cmd_tlv_dtim_period);</div><div class='add'>+	}</div><div class='add'>+	if (bss_cfg-&gt;rts_threshold &lt;= MWIFIEX_RTS_MAX_VALUE) {</div><div class='add'>+		rts_threshold = (struct host_cmd_tlv_rts_threshold *)tlv;</div><div class='add'>+		rts_threshold-&gt;tlv.type =</div><div class='add'>+					cpu_to_le16(TLV_TYPE_UAP_RTS_THRESHOLD);</div><div class='add'>+		rts_threshold-&gt;tlv.len =</div><div class='add'>+			cpu_to_le16(sizeof(struct host_cmd_tlv_rts_threshold) -</div><div class='add'>+				    sizeof(struct host_cmd_tlv));</div><div class='add'>+		rts_threshold-&gt;rts_thr = cpu_to_le16(bss_cfg-&gt;rts_threshold);</div><div class='add'>+		cmd_size += sizeof(struct host_cmd_tlv_frag_threshold);</div><div class='add'>+		tlv += sizeof(struct host_cmd_tlv_frag_threshold);</div><div class='add'>+	}</div><div class='add'>+	if ((bss_cfg-&gt;frag_threshold &gt;= MWIFIEX_FRAG_MIN_VALUE) &amp;&amp;</div><div class='add'>+	    (bss_cfg-&gt;frag_threshold &lt;= MWIFIEX_FRAG_MAX_VALUE)) {</div><div class='add'>+		frag_threshold = (struct host_cmd_tlv_frag_threshold *)tlv;</div><div class='add'>+		frag_threshold-&gt;tlv.type =</div><div class='add'>+				cpu_to_le16(TLV_TYPE_UAP_FRAG_THRESHOLD);</div><div class='add'>+		frag_threshold-&gt;tlv.len =</div><div class='add'>+			cpu_to_le16(sizeof(struct host_cmd_tlv_frag_threshold) -</div><div class='add'>+				    sizeof(struct host_cmd_tlv));</div><div class='add'>+		frag_threshold-&gt;frag_thr = cpu_to_le16(bss_cfg-&gt;frag_threshold);</div><div class='add'>+		cmd_size += sizeof(struct host_cmd_tlv_frag_threshold);</div><div class='add'>+		tlv += sizeof(struct host_cmd_tlv_frag_threshold);</div><div class='add'>+	}</div><div class='add'>+	if (bss_cfg-&gt;retry_limit &lt;= MWIFIEX_RETRY_LIMIT) {</div><div class='add'>+		retry_limit = (struct host_cmd_tlv_retry_limit *)tlv;</div><div class='add'>+		retry_limit-&gt;tlv.type = cpu_to_le16(TLV_TYPE_UAP_RETRY_LIMIT);</div><div class='add'>+		retry_limit-&gt;tlv.len =</div><div class='add'>+			cpu_to_le16(sizeof(struct host_cmd_tlv_retry_limit) -</div><div class='add'>+				    sizeof(struct host_cmd_tlv));</div><div class='add'>+		retry_limit-&gt;limit = (u8)bss_cfg-&gt;retry_limit;</div><div class='add'>+		cmd_size += sizeof(struct host_cmd_tlv_retry_limit);</div><div class='add'>+		tlv += sizeof(struct host_cmd_tlv_retry_limit);</div><div class='add'>+	}</div><div class='add'>+	if ((bss_cfg-&gt;protocol &amp; PROTOCOL_WPA) ||</div><div class='add'>+	    (bss_cfg-&gt;protocol &amp; PROTOCOL_WPA2) ||</div><div class='add'>+	    (bss_cfg-&gt;protocol &amp; PROTOCOL_EAP)) {</div><div class='add'>+		tlv_akmp = (struct host_cmd_tlv_akmp *)tlv;</div><div class='add'>+		tlv_akmp-&gt;tlv.type = cpu_to_le16(TLV_TYPE_UAP_AKMP);</div><div class='add'>+		tlv_akmp-&gt;tlv.len =</div><div class='add'>+		    cpu_to_le16(sizeof(struct host_cmd_tlv_akmp) -</div><div class='add'>+				sizeof(struct host_cmd_tlv));</div><div class='add'>+		tlv_akmp-&gt;key_mgmt_operation =</div><div class='add'>+			cpu_to_le16(bss_cfg-&gt;key_mgmt_operation);</div><div class='add'>+		tlv_akmp-&gt;key_mgmt = cpu_to_le16(bss_cfg-&gt;key_mgmt);</div><div class='add'>+		cmd_size += sizeof(struct host_cmd_tlv_akmp);</div><div class='add'>+		tlv += sizeof(struct host_cmd_tlv_akmp);</div><div class='add'>+</div><div class='add'>+		if (bss_cfg-&gt;wpa_cfg.pairwise_cipher_wpa &amp;</div><div class='add'>+				VALID_CIPHER_BITMAP) {</div><div class='add'>+			pwk_cipher = (struct host_cmd_tlv_pwk_cipher *)tlv;</div><div class='add'>+			pwk_cipher-&gt;tlv.type =</div><div class='add'>+				cpu_to_le16(TLV_TYPE_PWK_CIPHER);</div><div class='add'>+			pwk_cipher-&gt;tlv.len = cpu_to_le16(</div><div class='add'>+				sizeof(struct host_cmd_tlv_pwk_cipher) -</div><div class='add'>+				sizeof(struct host_cmd_tlv));</div><div class='add'>+			pwk_cipher-&gt;proto = cpu_to_le16(PROTOCOL_WPA);</div><div class='add'>+			pwk_cipher-&gt;cipher =</div><div class='add'>+				bss_cfg-&gt;wpa_cfg.pairwise_cipher_wpa;</div><div class='add'>+			cmd_size += sizeof(struct host_cmd_tlv_pwk_cipher);</div><div class='add'>+			tlv += sizeof(struct host_cmd_tlv_pwk_cipher);</div><div class='add'>+		}</div><div class='add'>+		if (bss_cfg-&gt;wpa_cfg.pairwise_cipher_wpa2 &amp;</div><div class='add'>+				VALID_CIPHER_BITMAP) {</div><div class='add'>+			pwk_cipher = (struct host_cmd_tlv_pwk_cipher *)tlv;</div><div class='add'>+			pwk_cipher-&gt;tlv.type = cpu_to_le16(TLV_TYPE_PWK_CIPHER);</div><div class='add'>+			pwk_cipher-&gt;tlv.len = cpu_to_le16(</div><div class='add'>+				sizeof(struct host_cmd_tlv_pwk_cipher) -</div><div class='add'>+				sizeof(struct host_cmd_tlv));</div><div class='add'>+			pwk_cipher-&gt;proto = cpu_to_le16(PROTOCOL_WPA2);</div><div class='add'>+			pwk_cipher-&gt;cipher =</div><div class='add'>+				bss_cfg-&gt;wpa_cfg.pairwise_cipher_wpa2;</div><div class='add'>+			cmd_size += sizeof(struct host_cmd_tlv_pwk_cipher);</div><div class='add'>+			tlv += sizeof(struct host_cmd_tlv_pwk_cipher);</div><div class='add'>+		}</div><div class='add'>+		if (bss_cfg-&gt;wpa_cfg.group_cipher &amp; VALID_CIPHER_BITMAP) {</div><div class='add'>+			gwk_cipher = (struct host_cmd_tlv_gwk_cipher *)tlv;</div><div class='add'>+			gwk_cipher-&gt;tlv.type = cpu_to_le16(TLV_TYPE_GWK_CIPHER);</div><div class='add'>+			gwk_cipher-&gt;tlv.len = cpu_to_le16(</div><div class='add'>+				sizeof(struct host_cmd_tlv_gwk_cipher) -</div><div class='add'>+				sizeof(struct host_cmd_tlv));</div><div class='add'>+			gwk_cipher-&gt;cipher = bss_cfg-&gt;wpa_cfg.group_cipher;</div><div class='add'>+			cmd_size += sizeof(struct host_cmd_tlv_gwk_cipher);</div><div class='add'>+			tlv += sizeof(struct host_cmd_tlv_gwk_cipher);</div><div class='add'>+		}</div><div class='add'>+		if (bss_cfg-&gt;wpa_cfg.length) {</div><div class='add'>+			passphrase = (struct host_cmd_tlv_passphrase *)tlv;</div><div class='add'>+			passphrase-&gt;tlv.type =</div><div class='add'>+				cpu_to_le16(TLV_TYPE_UAP_WPA_PASSPHRASE);</div><div class='add'>+			passphrase-&gt;tlv.len =</div><div class='add'>+				cpu_to_le16(bss_cfg-&gt;wpa_cfg.length);</div><div class='add'>+			memcpy(passphrase-&gt;passphrase,</div><div class='add'>+			       bss_cfg-&gt;wpa_cfg.passphrase,</div><div class='add'>+			       bss_cfg-&gt;wpa_cfg.length);</div><div class='add'>+			cmd_size += sizeof(struct host_cmd_tlv) +</div><div class='add'>+				    bss_cfg-&gt;wpa_cfg.length;</div><div class='add'>+			tlv += sizeof(struct host_cmd_tlv) +</div><div class='add'>+			       bss_cfg-&gt;wpa_cfg.length;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if ((bss_cfg-&gt;auth_mode &lt;= WLAN_AUTH_SHARED_KEY) ||</div><div class='add'>+	    (bss_cfg-&gt;auth_mode == MWIFIEX_AUTH_MODE_AUTO)) {</div><div class='add'>+		auth_type = (struct host_cmd_tlv_auth_type *)tlv;</div><div class='add'>+		auth_type-&gt;tlv.type = cpu_to_le16(TLV_TYPE_AUTH_TYPE);</div><div class='add'>+		auth_type-&gt;tlv.len =</div><div class='add'>+			cpu_to_le16(sizeof(struct host_cmd_tlv_auth_type) -</div><div class='add'>+			sizeof(struct host_cmd_tlv));</div><div class='add'>+		auth_type-&gt;auth_type = (u8)bss_cfg-&gt;auth_mode;</div><div class='add'>+		cmd_size += sizeof(struct host_cmd_tlv_auth_type);</div><div class='add'>+		tlv += sizeof(struct host_cmd_tlv_auth_type);</div><div class='add'>+	}</div><div class='add'>+	if (bss_cfg-&gt;protocol) {</div><div class='add'>+		encrypt_protocol = (struct host_cmd_tlv_encrypt_protocol *)tlv;</div><div class='add'>+		encrypt_protocol-&gt;tlv.type =</div><div class='add'>+			cpu_to_le16(TLV_TYPE_UAP_ENCRY_PROTOCOL);</div><div class='add'>+		encrypt_protocol-&gt;tlv.len =</div><div class='add'>+			cpu_to_le16(sizeof(struct host_cmd_tlv_encrypt_protocol)</div><div class='add'>+			- sizeof(struct host_cmd_tlv));</div><div class='add'>+		encrypt_protocol-&gt;proto = cpu_to_le16(bss_cfg-&gt;protocol);</div><div class='add'>+		cmd_size += sizeof(struct host_cmd_tlv_encrypt_protocol);</div><div class='add'>+		tlv += sizeof(struct host_cmd_tlv_encrypt_protocol);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*param_size = cmd_size;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function parses custom IEs from IE list and prepares command buffer */</div><div class='add'>+static int mwifiex_uap_custom_ie_prepare(u8 *tlv, void *cmd_buf, u16 *ie_size)</div><div class='add'>+{</div><div class='add'>+	struct mwifiex_ie_list *ap_ie = cmd_buf;</div><div class='add'>+	struct host_cmd_tlv *tlv_ie = (struct host_cmd_tlv *)tlv;</div><div class='add'>+</div><div class='add'>+	if (!ap_ie || !ap_ie-&gt;len || !ap_ie-&gt;ie_list)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	*ie_size += le16_to_cpu(ap_ie-&gt;len) + sizeof(struct host_cmd_tlv);</div><div class='add'>+</div><div class='add'>+	tlv_ie-&gt;type = cpu_to_le16(TLV_TYPE_MGMT_IE);</div><div class='add'>+	tlv_ie-&gt;len = ap_ie-&gt;len;</div><div class='add'>+	tlv += sizeof(struct host_cmd_tlv);</div><div class='add'>+</div><div class='add'>+	memcpy(tlv, ap_ie-&gt;ie_list, le16_to_cpu(ap_ie-&gt;len));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Parse AP config structure and prepare TLV based command structure</div><div class='add'>+ * to be sent to FW for uAP configuration</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+mwifiex_cmd_uap_sys_config(struct host_cmd_ds_command *cmd, u16 cmd_action,</div><div class='add'>+			   u32 type, void *cmd_buf)</div><div class='add'>+{</div><div class='add'>+	u8 *tlv;</div><div class='add'>+	u16 cmd_size, param_size, ie_size;</div><div class='add'>+	struct host_cmd_ds_sys_config *sys_cfg;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;command = cpu_to_le16(HostCmd_CMD_UAP_SYS_CONFIG);</div><div class='add'>+	cmd_size = (u16)(sizeof(struct host_cmd_ds_sys_config) + S_DS_GEN);</div><div class='add'>+	sys_cfg = (struct host_cmd_ds_sys_config *)&amp;cmd-&gt;params.uap_sys_config;</div><div class='add'>+	sys_cfg-&gt;action = cpu_to_le16(cmd_action);</div><div class='add'>+	tlv = sys_cfg-&gt;tlv;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case UAP_BSS_PARAMS_I:</div><div class='add'>+		param_size = cmd_size;</div><div class='add'>+		if (mwifiex_uap_bss_param_prepare(tlv, cmd_buf, &amp;param_size))</div><div class='add'>+			return -1;</div><div class='add'>+		cmd-&gt;size = cpu_to_le16(param_size);</div><div class='add'>+		break;</div><div class='add'>+	case UAP_CUSTOM_IE_I:</div><div class='add'>+		ie_size = cmd_size;</div><div class='add'>+		if (mwifiex_uap_custom_ie_prepare(tlv, cmd_buf, &amp;ie_size))</div><div class='add'>+			return -1;</div><div class='add'>+		cmd-&gt;size = cpu_to_le16(ie_size);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function prepares the AP specific commands before sending them</div><div class='add'>+ * to the firmware.</div><div class='add'>+ * This is a generic function which calls specific command preparation</div><div class='add'>+ * routines based upon the command number.</div><div class='add'>+ */</div><div class='add'>+int mwifiex_uap_prepare_cmd(struct mwifiex_private *priv, u16 cmd_no,</div><div class='add'>+			    u16 cmd_action, u32 type,</div><div class='add'>+			    void *data_buf, void *cmd_buf)</div><div class='add'>+{</div><div class='add'>+	struct host_cmd_ds_command *cmd = cmd_buf;</div><div class='add'>+</div><div class='add'>+	switch (cmd_no) {</div><div class='add'>+	case HostCmd_CMD_UAP_SYS_CONFIG:</div><div class='add'>+		if (mwifiex_cmd_uap_sys_config(cmd, cmd_action, type, data_buf))</div><div class='add'>+			return -1;</div><div class='add'>+		break;</div><div class='add'>+	case HostCmd_CMD_UAP_BSS_START:</div><div class='add'>+	case HostCmd_CMD_UAP_BSS_STOP:</div><div class='add'>+		cmd-&gt;command = cpu_to_le16(cmd_no);</div><div class='add'>+		cmd-&gt;size = cpu_to_le16(S_DS_GEN);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(priv-&gt;adapter-&gt;dev,</div><div class='add'>+			"PREP_CMD: unknown cmd %#x\n", cmd_no);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function sets the RF channel for AP.</div><div class='add'>+ *</div><div class='add'>+ * This function populates channel information in AP config structure</div><div class='add'>+ * and sends command to configure channel information in AP.</div><div class='add'>+ */</div><div class='add'>+int mwifiex_uap_set_channel(struct mwifiex_private *priv, int channel)</div><div class='add'>+{</div><div class='add'>+	struct mwifiex_uap_bss_param *bss_cfg;</div><div class='add'>+	struct wiphy *wiphy = priv-&gt;wdev-&gt;wiphy;</div><div class='add'>+</div><div class='add'>+	bss_cfg = kzalloc(sizeof(struct mwifiex_uap_bss_param), GFP_KERNEL);</div><div class='add'>+	if (!bss_cfg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bss_cfg-&gt;band_cfg = BAND_CONFIG_MANUAL;</div><div class='add'>+	bss_cfg-&gt;channel = channel;</div><div class='add'>+</div><div class='add'>+	if (mwifiex_send_cmd_async(priv, HostCmd_CMD_UAP_SYS_CONFIG,</div><div class='add'>+				   HostCmd_ACT_GEN_SET,</div><div class='add'>+				   UAP_BSS_PARAMS_I, bss_cfg)) {</div><div class='add'>+		wiphy_err(wiphy, "Failed to set the uAP channel\n");</div><div class='add'>+		kfree(bss_cfg);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(bss_cfg);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/usb.c b/drivers/net/wireless/mwifiex/usb.c<br/>new file mode 100644<br/>index 000000000000..49ebf20c56eb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/usb.c</a></div><div class='hunk'>@@ -0,0 +1,1052 @@</div><div class='add'>+/*</div><div class='add'>+ * Marvell Wireless LAN device driver: USB specific handling</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012, Marvell International Ltd.</div><div class='add'>+ *</div><div class='add'>+ * This software file (the "File") is distributed by Marvell International</div><div class='add'>+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991</div><div class='add'>+ * (the "License").  You may use, redistribute and/or modify this File in</div><div class='add'>+ * accordance with the terms and conditions of the License, a copy of which</div><div class='add'>+ * is available by writing to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the</div><div class='add'>+ * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.</div><div class='add'>+ *</div><div class='add'>+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE</div><div class='add'>+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE</div><div class='add'>+ * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about</div><div class='add'>+ * this warranty disclaimer.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+#include "usb.h"</div><div class='add'>+</div><div class='add'>+#define USB_VERSION	"1.0"</div><div class='add'>+</div><div class='add'>+static const char usbdriver_name[] = "usb8797";</div><div class='add'>+</div><div class='add'>+static u8 user_rmmod;</div><div class='add'>+static struct mwifiex_if_ops usb_ops;</div><div class='add'>+static struct semaphore add_remove_card_sem;</div><div class='add'>+</div><div class='add'>+static struct usb_device_id mwifiex_usb_table[] = {</div><div class='add'>+	{USB_DEVICE(USB8797_VID, USB8797_PID_1)},</div><div class='add'>+	{USB_DEVICE_AND_INTERFACE_INFO(USB8797_VID, USB8797_PID_2,</div><div class='add'>+				       USB_CLASS_VENDOR_SPEC,</div><div class='add'>+				       USB_SUBCLASS_VENDOR_SPEC, 0xff)},</div><div class='add'>+	{ }	/* Terminating entry */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(usb, mwifiex_usb_table);</div><div class='add'>+</div><div class='add'>+static int mwifiex_usb_submit_rx_urb(struct urb_context *ctx, int size);</div><div class='add'>+</div><div class='add'>+/* This function handles received packet. Necessary action is taken based on</div><div class='add'>+ * cmd/event/data.</div><div class='add'>+ */</div><div class='add'>+static int mwifiex_usb_recv(struct mwifiex_adapter *adapter,</div><div class='add'>+			    struct sk_buff *skb, u8 ep)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = adapter-&gt;dev;</div><div class='add'>+	u32 recv_type;</div><div class='add'>+	__le32 tmp;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;hs_activated)</div><div class='add'>+		mwifiex_process_hs_config(adapter);</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;len &lt; INTF_HEADER_LEN) {</div><div class='add'>+		dev_err(dev, "%s: invalid skb-&gt;len\n", __func__);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (ep) {</div><div class='add'>+	case MWIFIEX_USB_EP_CMD_EVENT:</div><div class='add'>+		dev_dbg(dev, "%s: EP_CMD_EVENT\n", __func__);</div><div class='add'>+		skb_copy_from_linear_data(skb, &amp;tmp, INTF_HEADER_LEN);</div><div class='add'>+		recv_type = le32_to_cpu(tmp);</div><div class='add'>+		skb_pull(skb, INTF_HEADER_LEN);</div><div class='add'>+</div><div class='add'>+		switch (recv_type) {</div><div class='add'>+		case MWIFIEX_USB_TYPE_CMD:</div><div class='add'>+			if (skb-&gt;len &gt; MWIFIEX_SIZE_OF_CMD_BUFFER) {</div><div class='add'>+				dev_err(dev, "CMD: skb-&gt;len too large\n");</div><div class='add'>+				return -1;</div><div class='add'>+			} else if (!adapter-&gt;curr_cmd) {</div><div class='add'>+				dev_dbg(dev, "CMD: no curr_cmd\n");</div><div class='add'>+				if (adapter-&gt;ps_state == PS_STATE_SLEEP_CFM) {</div><div class='add'>+					mwifiex_process_sleep_confirm_resp(</div><div class='add'>+							adapter, skb-&gt;data,</div><div class='add'>+							skb-&gt;len);</div><div class='add'>+					return 0;</div><div class='add'>+				}</div><div class='add'>+				return -1;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			adapter-&gt;curr_cmd-&gt;resp_skb = skb;</div><div class='add'>+			adapter-&gt;cmd_resp_received = true;</div><div class='add'>+			break;</div><div class='add'>+		case MWIFIEX_USB_TYPE_EVENT:</div><div class='add'>+			if (skb-&gt;len &lt; sizeof(u32)) {</div><div class='add'>+				dev_err(dev, "EVENT: skb-&gt;len too small\n");</div><div class='add'>+				return -1;</div><div class='add'>+			}</div><div class='add'>+			skb_copy_from_linear_data(skb, &amp;tmp, sizeof(u32));</div><div class='add'>+			adapter-&gt;event_cause = le32_to_cpu(tmp);</div><div class='add'>+			skb_pull(skb, sizeof(u32));</div><div class='add'>+			dev_dbg(dev, "event_cause %#x\n", adapter-&gt;event_cause);</div><div class='add'>+</div><div class='add'>+			if (skb-&gt;len &gt; MAX_EVENT_SIZE) {</div><div class='add'>+				dev_err(dev, "EVENT: event body too large\n");</div><div class='add'>+				return -1;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			skb_copy_from_linear_data(skb, adapter-&gt;event_body,</div><div class='add'>+						  skb-&gt;len);</div><div class='add'>+			adapter-&gt;event_received = true;</div><div class='add'>+			adapter-&gt;event_skb = skb;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			dev_err(dev, "unknown recv_type %#x\n", recv_type);</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case MWIFIEX_USB_EP_DATA:</div><div class='add'>+		dev_dbg(dev, "%s: EP_DATA\n", __func__);</div><div class='add'>+		if (skb-&gt;len &gt; MWIFIEX_RX_DATA_BUF_SIZE) {</div><div class='add'>+			dev_err(dev, "DATA: skb-&gt;len too large\n");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+		skb_queue_tail(&amp;adapter-&gt;usb_rx_data_q, skb);</div><div class='add'>+		adapter-&gt;data_received = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dev, "%s: unknown endport %#x\n", __func__, ep);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINPROGRESS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mwifiex_usb_rx_complete(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct urb_context *context = (struct urb_context *)urb-&gt;context;</div><div class='add'>+	struct mwifiex_adapter *adapter = context-&gt;adapter;</div><div class='add'>+	struct sk_buff *skb = context-&gt;skb;</div><div class='add'>+	struct usb_card_rec *card;</div><div class='add'>+	int recv_length = urb-&gt;actual_length;</div><div class='add'>+	int size, status;</div><div class='add'>+</div><div class='add'>+	if (!adapter || !adapter-&gt;card) {</div><div class='add'>+		pr_err("mwifiex adapter or card structure is not valid\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	card = (struct usb_card_rec *)adapter-&gt;card;</div><div class='add'>+	if (card-&gt;rx_cmd_ep == context-&gt;ep)</div><div class='add'>+		atomic_dec(&amp;card-&gt;rx_cmd_urb_pending);</div><div class='add'>+	else</div><div class='add'>+		atomic_dec(&amp;card-&gt;rx_data_urb_pending);</div><div class='add'>+</div><div class='add'>+	if (recv_length) {</div><div class='add'>+		if (urb-&gt;status || (adapter-&gt;surprise_removed)) {</div><div class='add'>+			dev_err(adapter-&gt;dev,</div><div class='add'>+				"URB status is failed: %d\n", urb-&gt;status);</div><div class='add'>+			/* Do not free skb in case of command ep */</div><div class='add'>+			if (card-&gt;rx_cmd_ep != context-&gt;ep)</div><div class='add'>+				dev_kfree_skb_any(skb);</div><div class='add'>+			goto setup_for_next;</div><div class='add'>+		}</div><div class='add'>+		if (skb-&gt;len &gt; recv_length)</div><div class='add'>+			skb_trim(skb, recv_length);</div><div class='add'>+		else</div><div class='add'>+			skb_put(skb, recv_length - skb-&gt;len);</div><div class='add'>+</div><div class='add'>+		atomic_inc(&amp;adapter-&gt;rx_pending);</div><div class='add'>+		status = mwifiex_usb_recv(adapter, skb, context-&gt;ep);</div><div class='add'>+</div><div class='add'>+		dev_dbg(adapter-&gt;dev, "info: recv_length=%d, status=%d\n",</div><div class='add'>+			recv_length, status);</div><div class='add'>+		if (status == -EINPROGRESS) {</div><div class='add'>+			queue_work(adapter-&gt;workqueue, &amp;adapter-&gt;main_work);</div><div class='add'>+</div><div class='add'>+			/* urb for data_ep is re-submitted now;</div><div class='add'>+			 * urb for cmd_ep will be re-submitted in callback</div><div class='add'>+			 * mwifiex_usb_recv_complete</div><div class='add'>+			 */</div><div class='add'>+			if (card-&gt;rx_cmd_ep == context-&gt;ep)</div><div class='add'>+				return;</div><div class='add'>+		} else {</div><div class='add'>+			atomic_dec(&amp;adapter-&gt;rx_pending);</div><div class='add'>+			if (status == -1)</div><div class='add'>+				dev_err(adapter-&gt;dev,</div><div class='add'>+					"received data processing failed!\n");</div><div class='add'>+</div><div class='add'>+			/* Do not free skb in case of command ep */</div><div class='add'>+			if (card-&gt;rx_cmd_ep != context-&gt;ep)</div><div class='add'>+				dev_kfree_skb_any(skb);</div><div class='add'>+		}</div><div class='add'>+	} else if (urb-&gt;status) {</div><div class='add'>+		if (!adapter-&gt;is_suspended) {</div><div class='add'>+			dev_warn(adapter-&gt;dev,</div><div class='add'>+				 "Card is removed: %d\n", urb-&gt;status);</div><div class='add'>+			adapter-&gt;surprise_removed = true;</div><div class='add'>+		}</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+		return;</div><div class='add'>+	} else {</div><div class='add'>+		/* Do not free skb in case of command ep */</div><div class='add'>+		if (card-&gt;rx_cmd_ep != context-&gt;ep)</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='add'>+		/* fall through setup_for_next */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+setup_for_next:</div><div class='add'>+	if (card-&gt;rx_cmd_ep == context-&gt;ep)</div><div class='add'>+		size = MWIFIEX_RX_CMD_BUF_SIZE;</div><div class='add'>+	else</div><div class='add'>+		size = MWIFIEX_RX_DATA_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	mwifiex_usb_submit_rx_urb(context, size);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mwifiex_usb_tx_complete(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct urb_context *context = (struct urb_context *)(urb-&gt;context);</div><div class='add'>+	struct mwifiex_adapter *adapter = context-&gt;adapter;</div><div class='add'>+	struct usb_card_rec *card = adapter-&gt;card;</div><div class='add'>+</div><div class='add'>+	dev_dbg(adapter-&gt;dev, "%s: status: %d\n", __func__, urb-&gt;status);</div><div class='add'>+</div><div class='add'>+	if (context-&gt;ep == card-&gt;tx_cmd_ep) {</div><div class='add'>+		dev_dbg(adapter-&gt;dev, "%s: CMD\n", __func__);</div><div class='add'>+		atomic_dec(&amp;card-&gt;tx_cmd_urb_pending);</div><div class='add'>+		adapter-&gt;cmd_sent = false;</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(adapter-&gt;dev, "%s: DATA\n", __func__);</div><div class='add'>+		atomic_dec(&amp;card-&gt;tx_data_urb_pending);</div><div class='add'>+		mwifiex_write_data_complete(adapter, context-&gt;skb,</div><div class='add'>+					    urb-&gt;status ? -1 : 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	queue_work(adapter-&gt;workqueue, &amp;adapter-&gt;main_work);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mwifiex_usb_submit_rx_urb(struct urb_context *ctx, int size)</div><div class='add'>+{</div><div class='add'>+	struct mwifiex_adapter *adapter = ctx-&gt;adapter;</div><div class='add'>+	struct usb_card_rec *card = (struct usb_card_rec *)adapter-&gt;card;</div><div class='add'>+</div><div class='add'>+	if (card-&gt;rx_cmd_ep != ctx-&gt;ep) {</div><div class='add'>+		ctx-&gt;skb = dev_alloc_skb(size);</div><div class='add'>+		if (!ctx-&gt;skb) {</div><div class='add'>+			dev_err(adapter-&gt;dev,</div><div class='add'>+				"%s: dev_alloc_skb failed\n", __func__);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	usb_fill_bulk_urb(ctx-&gt;urb, card-&gt;udev,</div><div class='add'>+			  usb_rcvbulkpipe(card-&gt;udev, ctx-&gt;ep), ctx-&gt;skb-&gt;data,</div><div class='add'>+			  size, mwifiex_usb_rx_complete, (void *)ctx);</div><div class='add'>+</div><div class='add'>+	if (card-&gt;rx_cmd_ep == ctx-&gt;ep)</div><div class='add'>+		atomic_inc(&amp;card-&gt;rx_cmd_urb_pending);</div><div class='add'>+	else</div><div class='add'>+		atomic_inc(&amp;card-&gt;rx_data_urb_pending);</div><div class='add'>+</div><div class='add'>+	if (usb_submit_urb(ctx-&gt;urb, GFP_ATOMIC)) {</div><div class='add'>+		dev_err(adapter-&gt;dev, "usb_submit_urb failed\n");</div><div class='add'>+		dev_kfree_skb_any(ctx-&gt;skb);</div><div class='add'>+		ctx-&gt;skb = NULL;</div><div class='add'>+</div><div class='add'>+		if (card-&gt;rx_cmd_ep == ctx-&gt;ep)</div><div class='add'>+			atomic_dec(&amp;card-&gt;rx_cmd_urb_pending);</div><div class='add'>+		else</div><div class='add'>+			atomic_dec(&amp;card-&gt;rx_data_urb_pending);</div><div class='add'>+</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mwifiex_usb_free(struct usb_card_rec *card)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (atomic_read(&amp;card-&gt;rx_cmd_urb_pending) &amp;&amp; card-&gt;rx_cmd.urb)</div><div class='add'>+		usb_kill_urb(card-&gt;rx_cmd.urb);</div><div class='add'>+</div><div class='add'>+	usb_free_urb(card-&gt;rx_cmd.urb);</div><div class='add'>+	card-&gt;rx_cmd.urb = NULL;</div><div class='add'>+</div><div class='add'>+	if (atomic_read(&amp;card-&gt;rx_data_urb_pending))</div><div class='add'>+		for (i = 0; i &lt; MWIFIEX_RX_DATA_URB; i++)</div><div class='add'>+			if (card-&gt;rx_data_list[i].urb)</div><div class='add'>+				usb_kill_urb(card-&gt;rx_data_list[i].urb);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MWIFIEX_RX_DATA_URB; i++) {</div><div class='add'>+		usb_free_urb(card-&gt;rx_data_list[i].urb);</div><div class='add'>+		card-&gt;rx_data_list[i].urb = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MWIFIEX_TX_DATA_URB; i++) {</div><div class='add'>+		usb_free_urb(card-&gt;tx_data_list[i].urb);</div><div class='add'>+		card-&gt;tx_data_list[i].urb = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	usb_free_urb(card-&gt;tx_cmd.urb);</div><div class='add'>+	card-&gt;tx_cmd.urb = NULL;</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function probes an mwifiex device and registers it. It allocates</div><div class='add'>+ * the card structure, initiates the device registration and initialization</div><div class='add'>+ * procedure by adding a logical interface.</div><div class='add'>+ */</div><div class='add'>+static int mwifiex_usb_probe(struct usb_interface *intf,</div><div class='add'>+			     const struct usb_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct usb_device *udev = interface_to_usbdev(intf);</div><div class='add'>+	struct usb_host_interface *iface_desc = intf-&gt;cur_altsetting;</div><div class='add'>+	struct usb_endpoint_descriptor *epd;</div><div class='add'>+	int ret, i;</div><div class='add'>+	struct usb_card_rec *card;</div><div class='add'>+	u16 id_vendor, id_product, bcd_device, bcd_usb;</div><div class='add'>+</div><div class='add'>+	card = kzalloc(sizeof(struct usb_card_rec), GFP_KERNEL);</div><div class='add'>+	if (!card)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	id_vendor = le16_to_cpu(udev-&gt;descriptor.idVendor);</div><div class='add'>+	id_product = le16_to_cpu(udev-&gt;descriptor.idProduct);</div><div class='add'>+	bcd_device = le16_to_cpu(udev-&gt;descriptor.bcdDevice);</div><div class='add'>+	bcd_usb = le16_to_cpu(udev-&gt;descriptor.bcdUSB);</div><div class='add'>+	pr_debug("info: VID/PID = %X/%X, Boot2 version = %X\n",</div><div class='add'>+		 id_vendor, id_product, bcd_device);</div><div class='add'>+</div><div class='add'>+	/* PID_1 is used for firmware downloading only */</div><div class='add'>+	if (id_product == USB8797_PID_1)</div><div class='add'>+		card-&gt;usb_boot_state = USB8797_FW_DNLD;</div><div class='add'>+	else</div><div class='add'>+		card-&gt;usb_boot_state = USB8797_FW_READY;</div><div class='add'>+</div><div class='add'>+	card-&gt;udev = udev;</div><div class='add'>+	card-&gt;intf = intf;</div><div class='add'>+</div><div class='add'>+	pr_debug("info: bcdUSB=%#x Device Class=%#x SubClass=%#x Protocl=%#x\n",</div><div class='add'>+		 udev-&gt;descriptor.bcdUSB, udev-&gt;descriptor.bDeviceClass,</div><div class='add'>+		 udev-&gt;descriptor.bDeviceSubClass,</div><div class='add'>+		 udev-&gt;descriptor.bDeviceProtocol);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; iface_desc-&gt;desc.bNumEndpoints; ++i) {</div><div class='add'>+		epd = &amp;iface_desc-&gt;endpoint[i].desc;</div><div class='add'>+		if (usb_endpoint_dir_in(epd) &amp;&amp;</div><div class='add'>+		    usb_endpoint_num(epd) == MWIFIEX_USB_EP_CMD_EVENT &amp;&amp;</div><div class='add'>+		    usb_endpoint_xfer_bulk(epd)) {</div><div class='add'>+			pr_debug("info: bulk IN: max pkt size: %d, addr: %d\n",</div><div class='add'>+				 le16_to_cpu(epd-&gt;wMaxPacketSize),</div><div class='add'>+				 epd-&gt;bEndpointAddress);</div><div class='add'>+			card-&gt;rx_cmd_ep = usb_endpoint_num(epd);</div><div class='add'>+			atomic_set(&amp;card-&gt;rx_cmd_urb_pending, 0);</div><div class='add'>+		}</div><div class='add'>+		if (usb_endpoint_dir_in(epd) &amp;&amp;</div><div class='add'>+		    usb_endpoint_num(epd) == MWIFIEX_USB_EP_DATA &amp;&amp;</div><div class='add'>+		    usb_endpoint_xfer_bulk(epd)) {</div><div class='add'>+			pr_debug("info: bulk IN: max pkt size: %d, addr: %d\n",</div><div class='add'>+				 le16_to_cpu(epd-&gt;wMaxPacketSize),</div><div class='add'>+				 epd-&gt;bEndpointAddress);</div><div class='add'>+			card-&gt;rx_data_ep = usb_endpoint_num(epd);</div><div class='add'>+			atomic_set(&amp;card-&gt;rx_data_urb_pending, 0);</div><div class='add'>+		}</div><div class='add'>+		if (usb_endpoint_dir_out(epd) &amp;&amp;</div><div class='add'>+		    usb_endpoint_num(epd) == MWIFIEX_USB_EP_DATA &amp;&amp;</div><div class='add'>+		    usb_endpoint_xfer_bulk(epd)) {</div><div class='add'>+			pr_debug("info: bulk OUT: max pkt size: %d, addr: %d\n",</div><div class='add'>+				 le16_to_cpu(epd-&gt;wMaxPacketSize),</div><div class='add'>+				 epd-&gt;bEndpointAddress);</div><div class='add'>+			card-&gt;tx_data_ep = usb_endpoint_num(epd);</div><div class='add'>+			atomic_set(&amp;card-&gt;tx_data_urb_pending, 0);</div><div class='add'>+		}</div><div class='add'>+		if (usb_endpoint_dir_out(epd) &amp;&amp;</div><div class='add'>+		    usb_endpoint_num(epd) == MWIFIEX_USB_EP_CMD_EVENT &amp;&amp;</div><div class='add'>+		    usb_endpoint_xfer_bulk(epd)) {</div><div class='add'>+			pr_debug("info: bulk OUT: max pkt size: %d, addr: %d\n",</div><div class='add'>+				 le16_to_cpu(epd-&gt;wMaxPacketSize),</div><div class='add'>+				 epd-&gt;bEndpointAddress);</div><div class='add'>+			card-&gt;tx_cmd_ep = usb_endpoint_num(epd);</div><div class='add'>+			atomic_set(&amp;card-&gt;tx_cmd_urb_pending, 0);</div><div class='add'>+			card-&gt;bulk_out_maxpktsize =</div><div class='add'>+					le16_to_cpu(epd-&gt;wMaxPacketSize);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	usb_set_intfdata(intf, card);</div><div class='add'>+</div><div class='add'>+	ret = mwifiex_add_card(card, &amp;add_remove_card_sem, &amp;usb_ops,</div><div class='add'>+			       MWIFIEX_USB);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("%s: mwifiex_add_card failed: %d\n", __func__, ret);</div><div class='add'>+		usb_reset_device(udev);</div><div class='add'>+		kfree(card);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	usb_get_dev(udev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Kernel needs to suspend all functions separately. Therefore all</div><div class='add'>+ * registered functions must have drivers with suspend and resume</div><div class='add'>+ * methods. Failing that the kernel simply removes the whole card.</div><div class='add'>+ *</div><div class='add'>+ * If already not suspended, this function allocates and sends a</div><div class='add'>+ * 'host sleep activate' request to the firmware and turns off the traffic.</div><div class='add'>+ */</div><div class='add'>+static int mwifiex_usb_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='add'>+{</div><div class='add'>+	struct usb_card_rec *card = usb_get_intfdata(intf);</div><div class='add'>+	struct mwifiex_adapter *adapter;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!card || !card-&gt;adapter) {</div><div class='add'>+		pr_err("%s: card or card-&gt;adapter is NULL\n", __func__);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	adapter = card-&gt;adapter;</div><div class='add'>+</div><div class='add'>+	if (unlikely(adapter-&gt;is_suspended))</div><div class='add'>+		dev_warn(adapter-&gt;dev, "Device already suspended\n");</div><div class='add'>+</div><div class='add'>+	mwifiex_enable_hs(adapter);</div><div class='add'>+</div><div class='add'>+	/* 'is_suspended' flag indicates device is suspended.</div><div class='add'>+	 * It must be set here before the usb_kill_urb() calls. Reason</div><div class='add'>+	 * is in the complete handlers, urb-&gt;status(= -ENOENT) and</div><div class='add'>+	 * this flag is used in combination to distinguish between a</div><div class='add'>+	 * 'suspended' state and a 'disconnect' one.</div><div class='add'>+	 */</div><div class='add'>+	adapter-&gt;is_suspended = true;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;priv_num; i++)</div><div class='add'>+		netif_carrier_off(adapter-&gt;priv[i]-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	if (atomic_read(&amp;card-&gt;rx_cmd_urb_pending) &amp;&amp; card-&gt;rx_cmd.urb)</div><div class='add'>+		usb_kill_urb(card-&gt;rx_cmd.urb);</div><div class='add'>+</div><div class='add'>+	if (atomic_read(&amp;card-&gt;rx_data_urb_pending))</div><div class='add'>+		for (i = 0; i &lt; MWIFIEX_RX_DATA_URB; i++)</div><div class='add'>+			if (card-&gt;rx_data_list[i].urb)</div><div class='add'>+				usb_kill_urb(card-&gt;rx_data_list[i].urb);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MWIFIEX_TX_DATA_URB; i++)</div><div class='add'>+		if (card-&gt;tx_data_list[i].urb)</div><div class='add'>+			usb_kill_urb(card-&gt;tx_data_list[i].urb);</div><div class='add'>+</div><div class='add'>+	if (card-&gt;tx_cmd.urb)</div><div class='add'>+		usb_kill_urb(card-&gt;tx_cmd.urb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Kernel needs to suspend all functions separately. Therefore all</div><div class='add'>+ * registered functions must have drivers with suspend and resume</div><div class='add'>+ * methods. Failing that the kernel simply removes the whole card.</div><div class='add'>+ *</div><div class='add'>+ * If already not resumed, this function turns on the traffic and</div><div class='add'>+ * sends a 'host sleep cancel' request to the firmware.</div><div class='add'>+ */</div><div class='add'>+static int mwifiex_usb_resume(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	struct usb_card_rec *card = usb_get_intfdata(intf);</div><div class='add'>+	struct mwifiex_adapter *adapter;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!card || !card-&gt;adapter) {</div><div class='add'>+		pr_err("%s: card or card-&gt;adapter is NULL\n", __func__);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	adapter = card-&gt;adapter;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!adapter-&gt;is_suspended)) {</div><div class='add'>+		dev_warn(adapter-&gt;dev, "Device already resumed\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Indicate device resumed. The netdev queue will be resumed only</div><div class='add'>+	 * after the urbs have been re-submitted</div><div class='add'>+	 */</div><div class='add'>+	adapter-&gt;is_suspended = false;</div><div class='add'>+</div><div class='add'>+	if (!atomic_read(&amp;card-&gt;rx_data_urb_pending))</div><div class='add'>+		for (i = 0; i &lt; MWIFIEX_RX_DATA_URB; i++)</div><div class='add'>+			mwifiex_usb_submit_rx_urb(&amp;card-&gt;rx_data_list[i],</div><div class='add'>+						  MWIFIEX_RX_DATA_BUF_SIZE);</div><div class='add'>+</div><div class='add'>+	if (!atomic_read(&amp;card-&gt;rx_cmd_urb_pending)) {</div><div class='add'>+		card-&gt;rx_cmd.skb = dev_alloc_skb(MWIFIEX_RX_CMD_BUF_SIZE);</div><div class='add'>+		if (card-&gt;rx_cmd.skb)</div><div class='add'>+			mwifiex_usb_submit_rx_urb(&amp;card-&gt;rx_cmd,</div><div class='add'>+						  MWIFIEX_RX_CMD_BUF_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;priv_num; i++)</div><div class='add'>+		if (adapter-&gt;priv[i]-&gt;media_connected)</div><div class='add'>+			netif_carrier_on(adapter-&gt;priv[i]-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	/* Disable Host Sleep */</div><div class='add'>+	if (adapter-&gt;hs_activated)</div><div class='add'>+		mwifiex_cancel_hs(mwifiex_get_priv(adapter,</div><div class='add'>+						   MWIFIEX_BSS_ROLE_ANY),</div><div class='add'>+				  MWIFIEX_ASYNC_CMD);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+	/* Resume handler may be called due to remote wakeup,</div><div class='add'>+	 * force to exit suspend anyway</div><div class='add'>+	 */</div><div class='add'>+	usb_disable_autosuspend(card-&gt;udev);</div><div class='add'>+#endif /* CONFIG_PM */</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mwifiex_usb_disconnect(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	struct usb_card_rec *card = usb_get_intfdata(intf);</div><div class='add'>+	struct mwifiex_adapter *adapter;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!card || !card-&gt;adapter) {</div><div class='add'>+		pr_err("%s: card or card-&gt;adapter is NULL\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adapter = card-&gt;adapter;</div><div class='add'>+	if (!adapter-&gt;priv_num)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* In case driver is removed when asynchronous FW downloading is</div><div class='add'>+	 * in progress</div><div class='add'>+	 */</div><div class='add'>+	wait_for_completion(&amp;adapter-&gt;fw_load);</div><div class='add'>+</div><div class='add'>+	if (user_rmmod) {</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+		if (adapter-&gt;is_suspended)</div><div class='add'>+			mwifiex_usb_resume(intf);</div><div class='add'>+#endif</div><div class='add'>+		for (i = 0; i &lt; adapter-&gt;priv_num; i++)</div><div class='add'>+			if ((GET_BSS_ROLE(adapter-&gt;priv[i]) ==</div><div class='add'>+			     MWIFIEX_BSS_ROLE_STA) &amp;&amp;</div><div class='add'>+			    adapter-&gt;priv[i]-&gt;media_connected)</div><div class='add'>+				mwifiex_deauthenticate(adapter-&gt;priv[i], NULL);</div><div class='add'>+</div><div class='add'>+		mwifiex_init_shutdown_fw(mwifiex_get_priv(adapter,</div><div class='add'>+							  MWIFIEX_BSS_ROLE_ANY),</div><div class='add'>+					 MWIFIEX_FUNC_SHUTDOWN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mwifiex_usb_free(card);</div><div class='add'>+</div><div class='add'>+	dev_dbg(adapter-&gt;dev, "%s: removing card\n", __func__);</div><div class='add'>+	mwifiex_remove_card(adapter, &amp;add_remove_card_sem);</div><div class='add'>+</div><div class='add'>+	usb_set_intfdata(intf, NULL);</div><div class='add'>+	usb_put_dev(interface_to_usbdev(intf));</div><div class='add'>+	kfree(card);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct usb_driver mwifiex_usb_driver = {</div><div class='add'>+	.name = usbdriver_name,</div><div class='add'>+	.probe = mwifiex_usb_probe,</div><div class='add'>+	.disconnect = mwifiex_usb_disconnect,</div><div class='add'>+	.id_table = mwifiex_usb_table,</div><div class='add'>+	.suspend = mwifiex_usb_suspend,</div><div class='add'>+	.resume = mwifiex_usb_resume,</div><div class='add'>+	.supports_autosuspend = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mwifiex_usb_tx_init(struct mwifiex_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct usb_card_rec *card = (struct usb_card_rec *)adapter-&gt;card;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	card-&gt;tx_cmd.adapter = adapter;</div><div class='add'>+	card-&gt;tx_cmd.ep = card-&gt;tx_cmd_ep;</div><div class='add'>+</div><div class='add'>+	card-&gt;tx_cmd.urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+	if (!card-&gt;tx_cmd.urb) {</div><div class='add'>+		dev_err(adapter-&gt;dev, "tx_cmd.urb allocation failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	card-&gt;tx_data_ix = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MWIFIEX_TX_DATA_URB; i++) {</div><div class='add'>+		card-&gt;tx_data_list[i].adapter = adapter;</div><div class='add'>+		card-&gt;tx_data_list[i].ep = card-&gt;tx_data_ep;</div><div class='add'>+</div><div class='add'>+		card-&gt;tx_data_list[i].urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+		if (!card-&gt;tx_data_list[i].urb) {</div><div class='add'>+			dev_err(adapter-&gt;dev,</div><div class='add'>+				"tx_data_list[] urb allocation failed\n");</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mwifiex_usb_rx_init(struct mwifiex_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct usb_card_rec *card = (struct usb_card_rec *)adapter-&gt;card;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	card-&gt;rx_cmd.adapter = adapter;</div><div class='add'>+	card-&gt;rx_cmd.ep = card-&gt;rx_cmd_ep;</div><div class='add'>+</div><div class='add'>+	card-&gt;rx_cmd.urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+	if (!card-&gt;rx_cmd.urb) {</div><div class='add'>+		dev_err(adapter-&gt;dev, "rx_cmd.urb allocation failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	card-&gt;rx_cmd.skb = dev_alloc_skb(MWIFIEX_RX_CMD_BUF_SIZE);</div><div class='add'>+	if (!card-&gt;rx_cmd.skb) {</div><div class='add'>+		dev_err(adapter-&gt;dev, "rx_cmd.skb allocation failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mwifiex_usb_submit_rx_urb(&amp;card-&gt;rx_cmd, MWIFIEX_RX_CMD_BUF_SIZE))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MWIFIEX_RX_DATA_URB; i++) {</div><div class='add'>+		card-&gt;rx_data_list[i].adapter = adapter;</div><div class='add'>+		card-&gt;rx_data_list[i].ep = card-&gt;rx_data_ep;</div><div class='add'>+</div><div class='add'>+		card-&gt;rx_data_list[i].urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+		if (!card-&gt;rx_data_list[i].urb) {</div><div class='add'>+			dev_err(adapter-&gt;dev,</div><div class='add'>+				"rx_data_list[] urb allocation failed\n");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+		if (mwifiex_usb_submit_rx_urb(&amp;card-&gt;rx_data_list[i],</div><div class='add'>+					      MWIFIEX_RX_DATA_BUF_SIZE))</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mwifiex_write_data_sync(struct mwifiex_adapter *adapter, u8 *pbuf,</div><div class='add'>+				   u32 *len, u8 ep, u32 timeout)</div><div class='add'>+{</div><div class='add'>+	struct usb_card_rec *card = adapter-&gt;card;</div><div class='add'>+	int actual_length, ret;</div><div class='add'>+</div><div class='add'>+	if (!(*len % card-&gt;bulk_out_maxpktsize))</div><div class='add'>+		(*len)++;</div><div class='add'>+</div><div class='add'>+	/* Send the data block */</div><div class='add'>+	ret = usb_bulk_msg(card-&gt;udev, usb_sndbulkpipe(card-&gt;udev, ep), pbuf,</div><div class='add'>+			   *len, &amp;actual_length, timeout);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(adapter-&gt;dev, "usb_bulk_msg for tx failed: %d\n", ret);</div><div class='add'>+		ret = -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*len = actual_length;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mwifiex_read_data_sync(struct mwifiex_adapter *adapter, u8 *pbuf,</div><div class='add'>+				  u32 *len, u8 ep, u32 timeout)</div><div class='add'>+{</div><div class='add'>+	struct usb_card_rec *card = adapter-&gt;card;</div><div class='add'>+	int actual_length, ret;</div><div class='add'>+</div><div class='add'>+	/* Receive the data response */</div><div class='add'>+	ret = usb_bulk_msg(card-&gt;udev, usb_rcvbulkpipe(card-&gt;udev, ep), pbuf,</div><div class='add'>+			   *len, &amp;actual_length, timeout);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(adapter-&gt;dev, "usb_bulk_msg for rx failed: %d\n", ret);</div><div class='add'>+		ret = -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*len = actual_length;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function write a command/data packet to card. */</div><div class='add'>+static int mwifiex_usb_host_to_card(struct mwifiex_adapter *adapter, u8 ep,</div><div class='add'>+				    struct sk_buff *skb,</div><div class='add'>+				    struct mwifiex_tx_param *tx_param)</div><div class='add'>+{</div><div class='add'>+	struct usb_card_rec *card = adapter-&gt;card;</div><div class='add'>+	struct urb_context *context;</div><div class='add'>+	u8 *data = (u8 *)skb-&gt;data;</div><div class='add'>+	struct urb *tx_urb;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;is_suspended) {</div><div class='add'>+		dev_err(adapter-&gt;dev,</div><div class='add'>+			"%s: not allowed while suspended\n", __func__);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;surprise_removed) {</div><div class='add'>+		dev_err(adapter-&gt;dev, "%s: device removed\n", __func__);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ep == card-&gt;tx_data_ep &amp;&amp;</div><div class='add'>+	    atomic_read(&amp;card-&gt;tx_data_urb_pending) &gt;= MWIFIEX_TX_DATA_URB) {</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(adapter-&gt;dev, "%s: ep=%d\n", __func__, ep);</div><div class='add'>+</div><div class='add'>+	if (ep == card-&gt;tx_cmd_ep) {</div><div class='add'>+		context = &amp;card-&gt;tx_cmd;</div><div class='add'>+	} else {</div><div class='add'>+		if (card-&gt;tx_data_ix &gt;= MWIFIEX_TX_DATA_URB)</div><div class='add'>+			card-&gt;tx_data_ix = 0;</div><div class='add'>+		context = &amp;card-&gt;tx_data_list[card-&gt;tx_data_ix++];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	context-&gt;adapter = adapter;</div><div class='add'>+	context-&gt;ep = ep;</div><div class='add'>+	context-&gt;skb = skb;</div><div class='add'>+	tx_urb = context-&gt;urb;</div><div class='add'>+</div><div class='add'>+	usb_fill_bulk_urb(tx_urb, card-&gt;udev, usb_sndbulkpipe(card-&gt;udev, ep),</div><div class='add'>+			  data, skb-&gt;len, mwifiex_usb_tx_complete,</div><div class='add'>+			  (void *)context);</div><div class='add'>+</div><div class='add'>+	tx_urb-&gt;transfer_flags |= URB_ZERO_PACKET;</div><div class='add'>+</div><div class='add'>+	if (ep == card-&gt;tx_cmd_ep)</div><div class='add'>+		atomic_inc(&amp;card-&gt;tx_cmd_urb_pending);</div><div class='add'>+	else</div><div class='add'>+		atomic_inc(&amp;card-&gt;tx_data_urb_pending);</div><div class='add'>+</div><div class='add'>+	if (usb_submit_urb(tx_urb, GFP_ATOMIC)) {</div><div class='add'>+		dev_err(adapter-&gt;dev, "%s: usb_submit_urb failed\n", __func__);</div><div class='add'>+		if (ep == card-&gt;tx_cmd_ep) {</div><div class='add'>+			atomic_dec(&amp;card-&gt;tx_cmd_urb_pending);</div><div class='add'>+		} else {</div><div class='add'>+			atomic_dec(&amp;card-&gt;tx_data_urb_pending);</div><div class='add'>+			if (card-&gt;tx_data_ix)</div><div class='add'>+				card-&gt;tx_data_ix--;</div><div class='add'>+			else</div><div class='add'>+				card-&gt;tx_data_ix = MWIFIEX_TX_DATA_URB;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return -1;</div><div class='add'>+	} else {</div><div class='add'>+		if (ep == card-&gt;tx_data_ep &amp;&amp;</div><div class='add'>+		    atomic_read(&amp;card-&gt;tx_data_urb_pending) ==</div><div class='add'>+							MWIFIEX_TX_DATA_URB)</div><div class='add'>+			return -ENOSR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINPROGRESS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function register usb device and initialize parameter. */</div><div class='add'>+static int mwifiex_register_dev(struct mwifiex_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct usb_card_rec *card = (struct usb_card_rec *)adapter-&gt;card;</div><div class='add'>+</div><div class='add'>+	card-&gt;adapter = adapter;</div><div class='add'>+	adapter-&gt;dev = &amp;card-&gt;udev-&gt;dev;</div><div class='add'>+	strcpy(adapter-&gt;fw_name, USB8797_DEFAULT_FW_NAME);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function reads one block of firmware data. */</div><div class='add'>+static int mwifiex_get_fw_data(struct mwifiex_adapter *adapter,</div><div class='add'>+			       u32 offset, u32 len, u8 *buf)</div><div class='add'>+{</div><div class='add'>+	if (!buf || !len)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (offset + len &gt; adapter-&gt;firmware-&gt;size)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	memcpy(buf, adapter-&gt;firmware-&gt;data + offset, len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,</div><div class='add'>+				    struct mwifiex_fw_image *fw)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u8 *firmware = fw-&gt;fw_buf, *recv_buff;</div><div class='add'>+	u32 retries = USB8797_FW_MAX_RETRY, dlen;</div><div class='add'>+	u32 fw_seqnum = 0, tlen = 0, dnld_cmd = 0;</div><div class='add'>+	struct fw_data *fwdata;</div><div class='add'>+	struct fw_sync_header sync_fw;</div><div class='add'>+	u8 check_winner = 1;</div><div class='add'>+</div><div class='add'>+	if (!firmware) {</div><div class='add'>+		dev_err(adapter-&gt;dev,</div><div class='add'>+			"No firmware image found! Terminating download\n");</div><div class='add'>+		ret = -1;</div><div class='add'>+		goto fw_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Allocate memory for transmit */</div><div class='add'>+	fwdata = kzalloc(FW_DNLD_TX_BUF_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!fwdata)</div><div class='add'>+		goto fw_exit;</div><div class='add'>+</div><div class='add'>+	/* Allocate memory for receive */</div><div class='add'>+	recv_buff = kzalloc(FW_DNLD_RX_BUF_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!recv_buff)</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		/* Send pseudo data to check winner status first */</div><div class='add'>+		if (check_winner) {</div><div class='add'>+			memset(&amp;fwdata-&gt;fw_hdr, 0, sizeof(struct fw_header));</div><div class='add'>+			dlen = 0;</div><div class='add'>+		} else {</div><div class='add'>+			/* copy the header of the fw_data to get the length */</div><div class='add'>+			if (firmware)</div><div class='add'>+				memcpy(&amp;fwdata-&gt;fw_hdr, &amp;firmware[tlen],</div><div class='add'>+				       sizeof(struct fw_header));</div><div class='add'>+			else</div><div class='add'>+				mwifiex_get_fw_data(adapter, tlen,</div><div class='add'>+						    sizeof(struct fw_header),</div><div class='add'>+						    (u8 *)&amp;fwdata-&gt;fw_hdr);</div><div class='add'>+</div><div class='add'>+			dlen = le32_to_cpu(fwdata-&gt;fw_hdr.data_len);</div><div class='add'>+			dnld_cmd = le32_to_cpu(fwdata-&gt;fw_hdr.dnld_cmd);</div><div class='add'>+			tlen += sizeof(struct fw_header);</div><div class='add'>+</div><div class='add'>+			if (firmware)</div><div class='add'>+				memcpy(fwdata-&gt;data, &amp;firmware[tlen], dlen);</div><div class='add'>+			else</div><div class='add'>+				mwifiex_get_fw_data(adapter, tlen, dlen,</div><div class='add'>+						    (u8 *)fwdata-&gt;data);</div><div class='add'>+</div><div class='add'>+			fwdata-&gt;seq_num = cpu_to_le32(fw_seqnum);</div><div class='add'>+			tlen += dlen;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* If the send/receive fails or CRC occurs then retry */</div><div class='add'>+		while (retries--) {</div><div class='add'>+			u8 *buf = (u8 *)fwdata;</div><div class='add'>+			u32 len = FW_DATA_XMIT_SIZE;</div><div class='add'>+</div><div class='add'>+			/* send the firmware block */</div><div class='add'>+			ret = mwifiex_write_data_sync(adapter, buf, &amp;len,</div><div class='add'>+						MWIFIEX_USB_EP_CMD_EVENT,</div><div class='add'>+						MWIFIEX_USB_TIMEOUT);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(adapter-&gt;dev,</div><div class='add'>+					"write_data_sync: failed: %d\n", ret);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			buf = recv_buff;</div><div class='add'>+			len = FW_DNLD_RX_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+			/* Receive the firmware block response */</div><div class='add'>+			ret = mwifiex_read_data_sync(adapter, buf, &amp;len,</div><div class='add'>+						MWIFIEX_USB_EP_CMD_EVENT,</div><div class='add'>+						MWIFIEX_USB_TIMEOUT);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(adapter-&gt;dev,</div><div class='add'>+					"read_data_sync: failed: %d\n", ret);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			memcpy(&amp;sync_fw, recv_buff,</div><div class='add'>+			       sizeof(struct fw_sync_header));</div><div class='add'>+</div><div class='add'>+			/* check 1st firmware block resp for highest bit set */</div><div class='add'>+			if (check_winner) {</div><div class='add'>+				if (le32_to_cpu(sync_fw.cmd) &amp; 0x80000000) {</div><div class='add'>+					dev_warn(adapter-&gt;dev,</div><div class='add'>+						 "USB is not the winner %#x\n",</div><div class='add'>+						 sync_fw.cmd);</div><div class='add'>+</div><div class='add'>+					/* returning success */</div><div class='add'>+					ret = 0;</div><div class='add'>+					goto cleanup;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				dev_dbg(adapter-&gt;dev,</div><div class='add'>+					"USB is the winner, start to download FW\n");</div><div class='add'>+</div><div class='add'>+				check_winner = 0;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* check the firmware block response for CRC errors */</div><div class='add'>+			if (sync_fw.cmd) {</div><div class='add'>+				dev_err(adapter-&gt;dev,</div><div class='add'>+					"FW received block with CRC %#x\n",</div><div class='add'>+					sync_fw.cmd);</div><div class='add'>+				ret = -1;</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			retries = USB8797_FW_MAX_RETRY;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		fw_seqnum++;</div><div class='add'>+	} while ((dnld_cmd != FW_HAS_LAST_BLOCK) &amp;&amp; retries);</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	dev_dbg(adapter-&gt;dev, "%s: %d bytes downloaded\n", __func__, tlen);</div><div class='add'>+</div><div class='add'>+	kfree(recv_buff);</div><div class='add'>+	kfree(fwdata);</div><div class='add'>+</div><div class='add'>+	if (retries)</div><div class='add'>+		ret = 0;</div><div class='add'>+fw_exit:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mwifiex_usb_dnld_fw(struct mwifiex_adapter *adapter,</div><div class='add'>+			struct mwifiex_fw_image *fw)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct usb_card_rec *card = (struct usb_card_rec *)adapter-&gt;card;</div><div class='add'>+</div><div class='add'>+	if (card-&gt;usb_boot_state == USB8797_FW_DNLD) {</div><div class='add'>+		ret = mwifiex_prog_fw_w_helper(adapter, fw);</div><div class='add'>+		if (ret)</div><div class='add'>+			return -1;</div><div class='add'>+</div><div class='add'>+		/* Boot state changes after successful firmware download */</div><div class='add'>+		if (card-&gt;usb_boot_state == USB8797_FW_DNLD)</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mwifiex_usb_rx_init(adapter);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = mwifiex_usb_tx_init(adapter);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mwifiex_submit_rx_urb(struct mwifiex_adapter *adapter, u8 ep)</div><div class='add'>+{</div><div class='add'>+	struct usb_card_rec *card = (struct usb_card_rec *)adapter-&gt;card;</div><div class='add'>+</div><div class='add'>+	skb_push(card-&gt;rx_cmd.skb, INTF_HEADER_LEN);</div><div class='add'>+	if ((ep == card-&gt;rx_cmd_ep) &amp;&amp;</div><div class='add'>+	    (!atomic_read(&amp;card-&gt;rx_cmd_urb_pending)))</div><div class='add'>+		mwifiex_usb_submit_rx_urb(&amp;card-&gt;rx_cmd,</div><div class='add'>+					  MWIFIEX_RX_CMD_BUF_SIZE);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mwifiex_usb_cmd_event_complete(struct mwifiex_adapter *adapter,</div><div class='add'>+				       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	atomic_dec(&amp;adapter-&gt;rx_pending);</div><div class='add'>+	mwifiex_submit_rx_urb(adapter, MWIFIEX_USB_EP_CMD_EVENT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mwifiex_usb_data_complete(struct mwifiex_adapter *adapter,</div><div class='add'>+				     struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	atomic_dec(&amp;adapter-&gt;rx_pending);</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function wakes up the card. */</div><div class='add'>+static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	/* Simulation of HS_AWAKE event */</div><div class='add'>+	adapter-&gt;pm_wakeup_fw_try = false;</div><div class='add'>+	adapter-&gt;pm_wakeup_card_req = false;</div><div class='add'>+	adapter-&gt;ps_state = PS_STATE_AWAKE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mwifiex_if_ops usb_ops = {</div><div class='add'>+	.register_dev =		mwifiex_register_dev,</div><div class='add'>+	.wakeup =		mwifiex_pm_wakeup_card,</div><div class='add'>+	.wakeup_complete =	mwifiex_pm_wakeup_card_complete,</div><div class='add'>+</div><div class='add'>+	/* USB specific */</div><div class='add'>+	.dnld_fw =		mwifiex_usb_dnld_fw,</div><div class='add'>+	.cmdrsp_complete =	mwifiex_usb_cmd_event_complete,</div><div class='add'>+	.event_complete =	mwifiex_usb_cmd_event_complete,</div><div class='add'>+	.data_complete =	mwifiex_usb_data_complete,</div><div class='add'>+	.host_to_card =		mwifiex_usb_host_to_card,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This function initializes the USB driver module.</div><div class='add'>+ *</div><div class='add'>+ * This initiates the semaphore and registers the device with</div><div class='add'>+ * USB bus.</div><div class='add'>+ */</div><div class='add'>+static int mwifiex_usb_init_module(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pr_debug("Marvell USB8797 Driver\n");</div><div class='add'>+</div><div class='add'>+	sema_init(&amp;add_remove_card_sem, 1);</div><div class='add'>+</div><div class='add'>+	ret = usb_register(&amp;mwifiex_usb_driver);</div><div class='add'>+	if (ret)</div><div class='add'>+		pr_err("Driver register failed!\n");</div><div class='add'>+	else</div><div class='add'>+		pr_debug("info: Driver registered successfully!\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function cleans up the USB driver.</div><div class='add'>+ *</div><div class='add'>+ * The following major steps are followed in .disconnect for cleanup:</div><div class='add'>+ *      - Resume the device if its suspended</div><div class='add'>+ *      - Disconnect the device if connected</div><div class='add'>+ *      - Shutdown the firmware</div><div class='add'>+ *      - Unregister the device from USB bus.</div><div class='add'>+ */</div><div class='add'>+static void mwifiex_usb_cleanup_module(void)</div><div class='add'>+{</div><div class='add'>+	if (!down_interruptible(&amp;add_remove_card_sem))</div><div class='add'>+		up(&amp;add_remove_card_sem);</div><div class='add'>+</div><div class='add'>+	/* set the flag as user is removing this module */</div><div class='add'>+	user_rmmod = 1;</div><div class='add'>+</div><div class='add'>+	usb_deregister(&amp;mwifiex_usb_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(mwifiex_usb_init_module);</div><div class='add'>+module_exit(mwifiex_usb_cleanup_module);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Marvell International Ltd.");</div><div class='add'>+MODULE_DESCRIPTION("Marvell WiFi-Ex USB Driver version" USB_VERSION);</div><div class='add'>+MODULE_VERSION(USB_VERSION);</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_FIRMWARE("mrvl/usb8797_uapsta.bin");</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/usb.h b/drivers/net/wireless/mwifiex/usb.h<br/>new file mode 100644<br/>index 000000000000..98c4316cd1a9<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/usb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/usb.h</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+/*</div><div class='add'>+ * This file contains definitions for mwifiex USB interface driver.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012, Marvell International Ltd.</div><div class='add'>+ *</div><div class='add'>+ * This software file (the "File") is distributed by Marvell International</div><div class='add'>+ * Ltd. under the terms of the GNU General Public License Version 2, June 1991</div><div class='add'>+ * (the "License").  You may use, redistribute and/or modify this File in</div><div class='add'>+ * accordance with the terms and conditions of the License, a copy of which</div><div class='add'>+ * is available by writing to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the</div><div class='add'>+ * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.</div><div class='add'>+ *</div><div class='add'>+ * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE</div><div class='add'>+ * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE</div><div class='add'>+ * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about</div><div class='add'>+ * this warranty disclaimer.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MWIFIEX_USB_H</div><div class='add'>+#define _MWIFIEX_USB_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+</div><div class='add'>+#define USB8797_VID		0x1286</div><div class='add'>+#define USB8797_PID_1		0x2043</div><div class='add'>+#define USB8797_PID_2		0x2044</div><div class='add'>+</div><div class='add'>+#define USB8797_FW_DNLD		1</div><div class='add'>+#define USB8797_FW_READY	2</div><div class='add'>+#define USB8797_FW_MAX_RETRY	3</div><div class='add'>+</div><div class='add'>+#define MWIFIEX_TX_DATA_URB	6</div><div class='add'>+#define MWIFIEX_RX_DATA_URB	6</div><div class='add'>+#define MWIFIEX_USB_TIMEOUT	100</div><div class='add'>+</div><div class='add'>+#define USB8797_DEFAULT_FW_NAME	"mrvl/usb8797_uapsta.bin"</div><div class='add'>+</div><div class='add'>+#define FW_DNLD_TX_BUF_SIZE	620</div><div class='add'>+#define FW_DNLD_RX_BUF_SIZE	2048</div><div class='add'>+#define FW_HAS_LAST_BLOCK	0x00000004</div><div class='add'>+</div><div class='add'>+#define FW_DATA_XMIT_SIZE \</div><div class='add'>+	(sizeof(struct fw_header) + dlen + sizeof(u32))</div><div class='add'>+</div><div class='add'>+struct urb_context {</div><div class='add'>+	struct mwifiex_adapter *adapter;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	u8 ep;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct usb_card_rec {</div><div class='add'>+	struct mwifiex_adapter *adapter;</div><div class='add'>+	struct usb_device *udev;</div><div class='add'>+	struct usb_interface *intf;</div><div class='add'>+	u8 rx_cmd_ep;</div><div class='add'>+	struct urb_context rx_cmd;</div><div class='add'>+	atomic_t rx_cmd_urb_pending;</div><div class='add'>+	struct urb_context rx_data_list[MWIFIEX_RX_DATA_URB];</div><div class='add'>+	u8 usb_boot_state;</div><div class='add'>+	u8 rx_data_ep;</div><div class='add'>+	atomic_t rx_data_urb_pending;</div><div class='add'>+	u8 tx_data_ep;</div><div class='add'>+	u8 tx_cmd_ep;</div><div class='add'>+	atomic_t tx_data_urb_pending;</div><div class='add'>+	atomic_t tx_cmd_urb_pending;</div><div class='add'>+	int bulk_out_maxpktsize;</div><div class='add'>+	struct urb_context tx_cmd;</div><div class='add'>+	int tx_data_ix;</div><div class='add'>+	struct urb_context tx_data_list[MWIFIEX_TX_DATA_URB];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fw_header {</div><div class='add'>+	__le32 dnld_cmd;</div><div class='add'>+	__le32 base_addr;</div><div class='add'>+	__le32 data_len;</div><div class='add'>+	__le32 crc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fw_sync_header {</div><div class='add'>+	__le32 cmd;</div><div class='add'>+	__le32 seq_num;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fw_data {</div><div class='add'>+	struct fw_header fw_hdr;</div><div class='add'>+	__le32 seq_num;</div><div class='add'>+	u8 data[1];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This function is called after the card has woken up. */</div><div class='add'>+static inline int</div><div class='add'>+mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /*_MWIFIEX_USB_H */</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/util.c b/drivers/net/wireless/mwifiex/util.c<br/>index 6b399976d6c8..2864c74bdb6f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/util.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/util.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/util.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/util.c</a></div><div class='hunk'>@@ -167,6 +167,28 @@ int mwifiex_recv_packet(struct mwifiex_adapter *adapter, struct sk_buff *skb)</div><div class='ctx'> 	skb-&gt;dev = priv-&gt;netdev;</div><div class='ctx'> 	skb-&gt;protocol = eth_type_trans(skb, priv-&gt;netdev);</div><div class='ctx'> 	skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+</div><div class='add'>+	/* This is required only in case of 11n and USB as we alloc</div><div class='add'>+	 * a buffer of 4K only if its 11N (to be able to receive 4K</div><div class='add'>+	 * AMSDU packets). In case of SD we allocate buffers based</div><div class='add'>+	 * on the size of packet and hence this is not needed.</div><div class='add'>+	 *</div><div class='add'>+	 * Modifying the truesize here as our allocation for each</div><div class='add'>+	 * skb is 4K but we only receive 2K packets and this cause</div><div class='add'>+	 * the kernel to start dropping packets in case where</div><div class='add'>+	 * application has allocated buffer based on 2K size i.e.</div><div class='add'>+	 * if there a 64K packet received (in IP fragments and</div><div class='add'>+	 * application allocates 64K to receive this packet but</div><div class='add'>+	 * this packet would almost double up because we allocate</div><div class='add'>+	 * each 1.5K fragment in 4K and pass it up. As soon as the</div><div class='add'>+	 * 64K limit hits kernel will start to drop rest of the</div><div class='add'>+	 * fragments. Currently we fail the Filesndl-ht.scr script</div><div class='add'>+	 * for UDP, hence this fix</div><div class='add'>+	 */</div><div class='add'>+	if ((adapter-&gt;iface_type == MWIFIEX_USB) &amp;&amp;</div><div class='add'>+	    (skb-&gt;truesize &gt; MWIFIEX_RX_DATA_BUF_SIZE))</div><div class='add'>+		skb-&gt;truesize += (skb-&gt;len - MWIFIEX_RX_DATA_BUF_SIZE);</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;stats.rx_bytes += skb-&gt;len;</div><div class='ctx'> 	priv-&gt;stats.rx_packets++;</div><div class='ctx'> 	if (in_interrupt())</div><div class='head'>diff --git a/drivers/net/wireless/mwifiex/wmm.c b/drivers/net/wireless/mwifiex/wmm.c<br/>index 5a7316c6f125..f3fc65515857 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/wmm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwifiex/wmm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwifiex/wmm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwifiex/wmm.c</a></div><div class='hunk'>@@ -885,6 +885,10 @@ mwifiex_wmm_get_highest_priolist_ptr(struct mwifiex_adapter *adapter,</div><div class='ctx'> 				tid_ptr = &amp;(priv_tmp)-&gt;wmm.</div><div class='ctx'> 					tid_tbl_ptr[tos_to_tid[i]];</div><div class='ctx'> </div><div class='add'>+				/* For non-STA ra_list_curr may be NULL */</div><div class='add'>+				if (!tid_ptr-&gt;ra_list_curr)</div><div class='add'>+					continue;</div><div class='add'>+</div><div class='ctx'> 				spin_lock_irqsave(&amp;tid_ptr-&gt;tid_tbl_lock,</div><div class='ctx'> 						  flags);</div><div class='ctx'> 				is_list_empty =</div><div class='hunk'>@@ -1120,11 +1124,19 @@ mwifiex_send_processed_packet(struct mwifiex_private *priv,</div><div class='ctx'> 	tx_info = MWIFIEX_SKB_TXCB(skb);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;priv-&gt;wmm.ra_list_spinlock, ra_list_flags);</div><div class='del'>-	tx_param.next_pkt_len =</div><div class='del'>-		((skb_next) ? skb_next-&gt;len +</div><div class='del'>-		 sizeof(struct txpd) : 0);</div><div class='del'>-	ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_TYPE_DATA, skb,</div><div class='del'>-					   &amp;tx_param);</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;iface_type == MWIFIEX_USB) {</div><div class='add'>+		adapter-&gt;data_sent = true;</div><div class='add'>+		ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_USB_EP_DATA,</div><div class='add'>+						   skb, NULL);</div><div class='add'>+	} else {</div><div class='add'>+		tx_param.next_pkt_len =</div><div class='add'>+			((skb_next) ? skb_next-&gt;len +</div><div class='add'>+			 sizeof(struct txpd) : 0);</div><div class='add'>+		ret = adapter-&gt;if_ops.host_to_card(adapter, MWIFIEX_TYPE_DATA,</div><div class='add'>+						   skb, &amp;tx_param);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (ret) {</div><div class='ctx'> 	case -EBUSY:</div><div class='ctx'> 		dev_dbg(adapter-&gt;dev, "data: -EBUSY is returned\n");</div><div class='head'>diff --git a/drivers/net/wireless/mwl8k.c b/drivers/net/wireless/mwl8k.c<br/>index b48674b577e6..cf7bdc66f822 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/mwl8k.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/mwl8k.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/mwl8k.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/mwl8k.c</a></div><div class='hunk'>@@ -1235,7 +1235,7 @@ mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)</div><div class='ctx'> {</div><div class='ctx'> 	return priv-&gt;capture_beacon &amp;&amp;</div><div class='ctx'> 		ieee80211_is_beacon(wh-&gt;frame_control) &amp;&amp;</div><div class='del'>-		!compare_ether_addr(wh-&gt;addr3, priv-&gt;capture_bssid);</div><div class='add'>+		ether_addr_equal(wh-&gt;addr3, priv-&gt;capture_bssid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,</div><div class='hunk'>@@ -5893,18 +5893,7 @@ static struct pci_driver mwl8k_driver = {</div><div class='ctx'> 	.shutdown	= __devexit_p(mwl8k_shutdown),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init mwl8k_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;mwl8k_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit mwl8k_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;mwl8k_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(mwl8k_init);</div><div class='del'>-module_exit(mwl8k_exit);</div><div class='add'>+module_pci_driver(mwl8k_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION(MWL8K_DESC);</div><div class='ctx'> MODULE_VERSION(MWL8K_VERSION);</div><div class='head'>diff --git a/drivers/net/wireless/orinoco/fw.c b/drivers/net/wireless/orinoco/fw.c<br/>index 4df8cf64b56c..400a35217644 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/orinoco/fw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/orinoco/fw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/orinoco/fw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/orinoco/fw.c</a></div><div class='hunk'>@@ -379,11 +379,8 @@ void orinoco_cache_fw(struct orinoco_private *priv, int ap)</div><div class='ctx'> </div><div class='ctx'> void orinoco_uncache_fw(struct orinoco_private *priv)</div><div class='ctx'> {</div><div class='del'>-	if (priv-&gt;cached_pri_fw)</div><div class='del'>-		release_firmware(priv-&gt;cached_pri_fw);</div><div class='del'>-	if (priv-&gt;cached_fw)</div><div class='del'>-		release_firmware(priv-&gt;cached_fw);</div><div class='del'>-</div><div class='add'>+	release_firmware(priv-&gt;cached_pri_fw);</div><div class='add'>+	release_firmware(priv-&gt;cached_fw);</div><div class='ctx'> 	priv-&gt;cached_pri_fw = NULL;</div><div class='ctx'> 	priv-&gt;cached_fw = NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/orinoco/orinoco_usb.c b/drivers/net/wireless/orinoco/orinoco_usb.c<br/>index f634d4582bfe..7f53cea2f205 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/orinoco/orinoco_usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/orinoco/orinoco_usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/orinoco/orinoco_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/orinoco/orinoco_usb.c</a></div><div class='hunk'>@@ -1752,6 +1752,7 @@ static struct usb_driver orinoco_driver = {</div><div class='ctx'> 	.probe = ezusb_probe,</div><div class='ctx'> 	.disconnect = ezusb_disconnect,</div><div class='ctx'> 	.id_table = ezusb_table,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(orinoco_driver);</div><div class='head'>diff --git a/drivers/net/wireless/p54/main.c b/drivers/net/wireless/p54/main.c<br/>index ee8af1f047c8..7cffea795ad2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/p54/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/p54/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/p54/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/p54/main.c</a></div><div class='hunk'>@@ -796,11 +796,14 @@ int p54_register_common(struct ieee80211_hw *dev, struct device *pdev)</div><div class='ctx'> 		dev_err(pdev, "Cannot register device (%d).\n", err);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='add'>+	priv-&gt;registered = true;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_P54_LEDS</div><div class='ctx'> 	err = p54_init_leds(priv);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		p54_unregister_common(dev);</div><div class='ctx'> 		return err;</div><div class='add'>+	}</div><div class='ctx'> #endif /* CONFIG_P54_LEDS */</div><div class='ctx'> </div><div class='ctx'> 	dev_info(pdev, "is registered as '%s'\n", wiphy_name(dev-&gt;wiphy));</div><div class='hunk'>@@ -840,7 +843,11 @@ void p54_unregister_common(struct ieee80211_hw *dev)</div><div class='ctx'> 	p54_unregister_leds(priv);</div><div class='ctx'> #endif /* CONFIG_P54_LEDS */</div><div class='ctx'> </div><div class='del'>-	ieee80211_unregister_hw(dev);</div><div class='add'>+	if (priv-&gt;registered) {</div><div class='add'>+		priv-&gt;registered = false;</div><div class='add'>+		ieee80211_unregister_hw(dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mutex_destroy(&amp;priv-&gt;conf_mutex);</div><div class='ctx'> 	mutex_destroy(&amp;priv-&gt;eeprom_mutex);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/p54/p54.h b/drivers/net/wireless/p54/p54.h<br/>index 452fa3a64aa1..40b401ed6845 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/p54/p54.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/p54/p54.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/p54/p54.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/p54/p54.h</a></div><div class='hunk'>@@ -173,6 +173,7 @@ struct p54_common {</div><div class='ctx'> 	struct sk_buff_head tx_pending;</div><div class='ctx'> 	struct sk_buff_head tx_queue;</div><div class='ctx'> 	struct mutex conf_mutex;</div><div class='add'>+	bool registered;</div><div class='ctx'> </div><div class='ctx'> 	/* memory management (as seen by the firmware) */</div><div class='ctx'> 	u32 rx_start;</div><div class='head'>diff --git a/drivers/net/wireless/p54/p54pci.c b/drivers/net/wireless/p54/p54pci.c<br/>index 45df728183fd..89318adc8c7f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/p54/p54pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/p54/p54pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/p54/p54pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/p54/p54pci.c</a></div><div class='hunk'>@@ -667,15 +667,4 @@ static struct pci_driver p54p_driver = {</div><div class='ctx'> 	.driver.pm	= P54P_PM_OPS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init p54p_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;p54p_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit p54p_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;p54p_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(p54p_init);</div><div class='del'>-module_exit(p54p_exit);</div><div class='add'>+module_pci_driver(p54p_driver);</div><div class='head'>diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c<br/>index f4d28c39aac7..7f207b6e9552 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/p54/p54usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/p54/p54usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/p54/p54usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/p54/p54usb.c</a></div><div class='hunk'>@@ -117,21 +117,18 @@ static const struct {</div><div class='ctx'> 	u32 intf;</div><div class='ctx'> 	enum p54u_hw_type type;</div><div class='ctx'> 	const char *fw;</div><div class='del'>-	const char *fw_legacy;</div><div class='ctx'> 	char hw[20];</div><div class='ctx'> } p54u_fwlist[__NUM_P54U_HWTYPES] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.type = P54U_NET2280,</div><div class='ctx'> 		.intf = FW_LM86,</div><div class='ctx'> 		.fw = "isl3886usb",</div><div class='del'>-		.fw_legacy = "isl3890usb",</div><div class='ctx'> 		.hw = "ISL3886 + net2280",</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.type = P54U_3887,</div><div class='ctx'> 		.intf = FW_LM87,</div><div class='ctx'> 		.fw = "isl3887usb",</div><div class='del'>-		.fw_legacy = "isl3887usb_bare",</div><div class='ctx'> 		.hw = "ISL3887",</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -208,6 +205,16 @@ static void p54u_free_urbs(struct ieee80211_hw *dev)</div><div class='ctx'> 	usb_kill_anchored_urbs(&amp;priv-&gt;submitted);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void p54u_stop(struct ieee80211_hw *dev)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: figure out how to reliably stop the 3887 and net2280 so</div><div class='add'>+	 * the hardware is still usable next time we want to start it.</div><div class='add'>+	 * until then, we just stop listening to the hardware..</div><div class='add'>+	 */</div><div class='add'>+	p54u_free_urbs(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int p54u_init_urbs(struct ieee80211_hw *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct p54u_priv *priv = dev-&gt;priv;</div><div class='hunk'>@@ -257,6 +264,16 @@ static int p54u_init_urbs(struct ieee80211_hw *dev)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int p54u_open(struct ieee80211_hw *dev)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: Because we don't know how to reliably stop the 3887 and</div><div class='add'>+	 * the isl3886+net2280, other than brutally cut off all</div><div class='add'>+	 * communications. We have to reinitialize the urbs on every start.</div><div class='add'>+	 */</div><div class='add'>+	return p54u_init_urbs(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static __le32 p54u_lm87_chksum(const __le32 *data, size_t length)</div><div class='ctx'> {</div><div class='ctx'> 	u32 chk = 0;</div><div class='hunk'>@@ -836,70 +853,137 @@ fail:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int p54u_load_firmware(struct ieee80211_hw *dev)</div><div class='add'>+static int p54_find_type(struct p54u_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct p54u_priv *priv = dev-&gt;priv;</div><div class='del'>-	int err, i;</div><div class='del'>-</div><div class='del'>-	BUILD_BUG_ON(ARRAY_SIZE(p54u_fwlist) != __NUM_P54U_HWTYPES);</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; __NUM_P54U_HWTYPES; i++)</div><div class='ctx'> 		if (p54u_fwlist[i].type == priv-&gt;hw_type)</div><div class='ctx'> 			break;</div><div class='del'>-</div><div class='ctx'> 	if (i == __NUM_P54U_HWTYPES)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	err = request_firmware(&amp;priv-&gt;fw, p54u_fwlist[i].fw, &amp;priv-&gt;udev-&gt;dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;priv-&gt;udev-&gt;dev, "(p54usb) cannot load firmware %s "</div><div class='del'>-					  "(%d)!\n", p54u_fwlist[i].fw, err);</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		err = request_firmware(&amp;priv-&gt;fw, p54u_fwlist[i].fw_legacy,</div><div class='del'>-				       &amp;priv-&gt;udev-&gt;dev);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='add'>+static int p54u_start_ops(struct p54u_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct ieee80211_hw *dev = priv-&gt;common.hw;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	err = p54_parse_firmware(dev, priv-&gt;fw);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='add'>+	ret = p54_parse_firmware(dev, priv-&gt;fw);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	ret = p54_find_type(priv);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_out;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;common.fw_interface != p54u_fwlist[i].intf) {</div><div class='add'>+	if (priv-&gt;common.fw_interface != p54u_fwlist[ret].intf) {</div><div class='ctx'> 		dev_err(&amp;priv-&gt;udev-&gt;dev, "wrong firmware, please get "</div><div class='ctx'> 			"a firmware for \"%s\" and try again.\n",</div><div class='del'>-			p54u_fwlist[i].hw);</div><div class='del'>-		err = -EINVAL;</div><div class='add'>+			p54u_fwlist[ret].hw);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	if (err)</div><div class='del'>-		release_firmware(priv-&gt;fw);</div><div class='add'>+	ret = priv-&gt;upload_fw(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_out;</div><div class='ctx'> </div><div class='del'>-	return err;</div><div class='add'>+	ret = p54u_open(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	ret = p54_read_eeprom(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_stop;</div><div class='add'>+</div><div class='add'>+	p54u_stop(dev);</div><div class='add'>+</div><div class='add'>+	ret = p54_register_common(dev, &amp;priv-&gt;udev-&gt;dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_stop;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_stop:</div><div class='add'>+	p54u_stop(dev);</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	/*</div><div class='add'>+	 * p54u_disconnect will do the rest of the</div><div class='add'>+	 * cleanup</div><div class='add'>+	 */</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int p54u_open(struct ieee80211_hw *dev)</div><div class='add'>+static void p54u_load_firmware_cb(const struct firmware *firmware,</div><div class='add'>+				  void *context)</div><div class='ctx'> {</div><div class='del'>-	struct p54u_priv *priv = dev-&gt;priv;</div><div class='add'>+	struct p54u_priv *priv = context;</div><div class='add'>+	struct usb_device *udev = priv-&gt;udev;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = p54u_init_urbs(dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		return err;</div><div class='add'>+	complete(&amp;priv-&gt;fw_wait_load);</div><div class='add'>+	if (firmware) {</div><div class='add'>+		priv-&gt;fw = firmware;</div><div class='add'>+		err = p54u_start_ops(priv);</div><div class='add'>+	} else {</div><div class='add'>+		err = -ENOENT;</div><div class='add'>+		dev_err(&amp;udev-&gt;dev, "Firmware not found.\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;common.open = p54u_init_urbs;</div><div class='add'>+	if (err) {</div><div class='add'>+		struct device *parent = priv-&gt;udev-&gt;dev.parent;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+		dev_err(&amp;udev-&gt;dev, "failed to initialize device (%d)\n", err);</div><div class='add'>+</div><div class='add'>+		if (parent)</div><div class='add'>+			device_lock(parent);</div><div class='add'>+</div><div class='add'>+		device_release_driver(&amp;udev-&gt;dev);</div><div class='add'>+		/*</div><div class='add'>+		 * At this point p54u_disconnect has already freed</div><div class='add'>+		 * the "priv" context. Do not use it anymore!</div><div class='add'>+		 */</div><div class='add'>+		priv = NULL;</div><div class='add'>+</div><div class='add'>+		if (parent)</div><div class='add'>+			device_unlock(parent);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	usb_put_dev(udev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void p54u_stop(struct ieee80211_hw *dev)</div><div class='add'>+static int p54u_load_firmware(struct ieee80211_hw *dev,</div><div class='add'>+			      struct usb_interface *intf)</div><div class='ctx'> {</div><div class='del'>-	/* TODO: figure out how to reliably stop the 3887 and net2280 so</div><div class='del'>-	   the hardware is still usable next time we want to start it.</div><div class='del'>-	   until then, we just stop listening to the hardware.. */</div><div class='del'>-	p54u_free_urbs(dev);</div><div class='add'>+	struct usb_device *udev = interface_to_usbdev(intf);</div><div class='add'>+	struct p54u_priv *priv = dev-&gt;priv;</div><div class='add'>+	struct device *device = &amp;udev-&gt;dev;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(ARRAY_SIZE(p54u_fwlist) != __NUM_P54U_HWTYPES);</div><div class='add'>+</div><div class='add'>+	init_completion(&amp;priv-&gt;fw_wait_load);</div><div class='add'>+	i = p54_find_type(priv);</div><div class='add'>+	if (i &lt; 0)</div><div class='add'>+		return i;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;priv-&gt;udev-&gt;dev, "Loading firmware file %s\n",</div><div class='add'>+	       p54u_fwlist[i].fw);</div><div class='add'>+</div><div class='add'>+	usb_get_dev(udev);</div><div class='add'>+	err = request_firmware_nowait(THIS_MODULE, 1, p54u_fwlist[i].fw,</div><div class='add'>+				      device, GFP_KERNEL, priv,</div><div class='add'>+				      p54u_load_firmware_cb);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;priv-&gt;udev-&gt;dev, "(p54usb) cannot load firmware %s "</div><div class='add'>+					  "(%d)!\n", p54u_fwlist[i].fw, err);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devinit p54u_probe(struct usb_interface *intf,</div><div class='hunk'>@@ -969,33 +1053,7 @@ static int __devinit p54u_probe(struct usb_interface *intf,</div><div class='ctx'> 		priv-&gt;common.tx = p54u_tx_net2280;</div><div class='ctx'> 		priv-&gt;upload_fw = p54u_upload_firmware_net2280;</div><div class='ctx'> 	}</div><div class='del'>-	err = p54u_load_firmware(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_free_dev;</div><div class='del'>-</div><div class='del'>-	err = priv-&gt;upload_fw(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_free_fw;</div><div class='del'>-</div><div class='del'>-	p54u_open(dev);</div><div class='del'>-	err = p54_read_eeprom(dev);</div><div class='del'>-	p54u_stop(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_free_fw;</div><div class='del'>-</div><div class='del'>-	err = p54_register_common(dev, &amp;udev-&gt;dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_free_fw;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_free_fw:</div><div class='del'>-	release_firmware(priv-&gt;fw);</div><div class='del'>-</div><div class='del'>-err_free_dev:</div><div class='del'>-	p54_free_common(dev);</div><div class='del'>-	usb_set_intfdata(intf, NULL);</div><div class='del'>-	usb_put_dev(udev);</div><div class='add'>+	err = p54u_load_firmware(dev, intf);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1007,9 +1065,10 @@ static void __devexit p54u_disconnect(struct usb_interface *intf)</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	priv = dev-&gt;priv;</div><div class='add'>+	wait_for_completion(&amp;priv-&gt;fw_wait_load);</div><div class='ctx'> 	p54_unregister_common(dev);</div><div class='ctx'> </div><div class='del'>-	priv = dev-&gt;priv;</div><div class='ctx'> 	usb_put_dev(interface_to_usbdev(intf));</div><div class='ctx'> 	release_firmware(priv-&gt;fw);</div><div class='ctx'> 	p54_free_common(dev);</div><div class='hunk'>@@ -1072,7 +1131,7 @@ static struct usb_driver p54u_driver = {</div><div class='ctx'> 	.name	= "p54usb",</div><div class='ctx'> 	.id_table = p54u_table,</div><div class='ctx'> 	.probe = p54u_probe,</div><div class='del'>-	.disconnect = p54u_disconnect,</div><div class='add'>+	.disconnect = __devexit_p(p54u_disconnect),</div><div class='ctx'> 	.pre_reset = p54u_pre_reset,</div><div class='ctx'> 	.post_reset = p54u_post_reset,</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='hunk'>@@ -1081,6 +1140,7 @@ static struct usb_driver p54u_driver = {</div><div class='ctx'> 	.reset_resume = p54u_resume,</div><div class='ctx'> #endif /* CONFIG_PM */</div><div class='ctx'> 	.soft_unbind = 1,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(p54u_driver);</div><div class='head'>diff --git a/drivers/net/wireless/p54/p54usb.h b/drivers/net/wireless/p54/p54usb.h<br/>index ed4034ade59a..d273be7272b9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/p54/p54usb.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/p54/p54usb.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/p54/p54usb.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/p54/p54usb.h</a></div><div class='hunk'>@@ -143,6 +143,9 @@ struct p54u_priv {</div><div class='ctx'> 	struct sk_buff_head rx_queue;</div><div class='ctx'> 	struct usb_anchor submitted;</div><div class='ctx'> 	const struct firmware *fw;</div><div class='add'>+</div><div class='add'>+	/* asynchronous firmware callback */</div><div class='add'>+	struct completion fw_wait_load;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif /* P54USB_H */</div><div class='head'>diff --git a/drivers/net/wireless/p54/txrx.c b/drivers/net/wireless/p54/txrx.c<br/>index a08a6f0e4dd1..82a1cac920bd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/p54/txrx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/p54/txrx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/p54/txrx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/p54/txrx.c</a></div><div class='hunk'>@@ -308,7 +308,7 @@ static void p54_pspoll_workaround(struct p54_common *priv, struct sk_buff *skb)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* only consider beacons from the associated BSSID */</div><div class='del'>-	if (compare_ether_addr(hdr-&gt;addr3, priv-&gt;bssid))</div><div class='add'>+	if (!ether_addr_equal(hdr-&gt;addr3, priv-&gt;bssid))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	tim = p54_find_ie(skb, WLAN_EID_TIM);</div><div class='hunk'>@@ -914,8 +914,7 @@ void p54_tx_80211(struct ieee80211_hw *dev, struct sk_buff *skb)</div><div class='ctx'> 	txhdr-&gt;hw_queue = queue;</div><div class='ctx'> 	txhdr-&gt;backlog = priv-&gt;tx_stats[queue].len - 1;</div><div class='ctx'> 	memset(txhdr-&gt;durations, 0, sizeof(txhdr-&gt;durations));</div><div class='del'>-	txhdr-&gt;tx_antenna = ((info-&gt;antenna_sel_tx == 0) ?</div><div class='del'>-		2 : info-&gt;antenna_sel_tx - 1) &amp; priv-&gt;tx_diversity_mask;</div><div class='add'>+	txhdr-&gt;tx_antenna = 2 &amp; priv-&gt;tx_diversity_mask;</div><div class='ctx'> 	if (priv-&gt;rxhw == 5) {</div><div class='ctx'> 		txhdr-&gt;longbow.cts_rate = cts_rate;</div><div class='ctx'> 		txhdr-&gt;longbow.output_power = cpu_to_le16(priv-&gt;output_power);</div><div class='head'>diff --git a/drivers/net/wireless/prism54/oid_mgt.c b/drivers/net/wireless/prism54/oid_mgt.c<br/>index 9b796cae4afe..a01606b36e03 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/prism54/oid_mgt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/prism54/oid_mgt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/prism54/oid_mgt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/prism54/oid_mgt.c</a></div><div class='hunk'>@@ -693,8 +693,6 @@ mgt_update_addr(islpci_private *priv)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define VEC_SIZE(a) ARRAY_SIZE(a)</div><div class='del'>-</div><div class='ctx'> int</div><div class='ctx'> mgt_commit(islpci_private *priv)</div><div class='ctx'> {</div><div class='hunk'>@@ -704,10 +702,10 @@ mgt_commit(islpci_private *priv)</div><div class='ctx'> 	if (islpci_get_state(priv) &lt; PRV_STATE_INIT)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	rvalue = mgt_commit_list(priv, commit_part1, VEC_SIZE(commit_part1));</div><div class='add'>+	rvalue = mgt_commit_list(priv, commit_part1, ARRAY_SIZE(commit_part1));</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;iw_mode != IW_MODE_MONITOR)</div><div class='del'>-		rvalue |= mgt_commit_list(priv, commit_part2, VEC_SIZE(commit_part2));</div><div class='add'>+		rvalue |= mgt_commit_list(priv, commit_part2, ARRAY_SIZE(commit_part2));</div><div class='ctx'> </div><div class='ctx'> 	u = OID_INL_MODE;</div><div class='ctx'> 	rvalue |= mgt_commit_list(priv, &amp;u, 1);</div><div class='head'>diff --git a/drivers/net/wireless/rndis_wlan.c b/drivers/net/wireless/rndis_wlan.c<br/>index d66e2980bc27..2e9e6af21362 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rndis_wlan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rndis_wlan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rndis_wlan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rndis_wlan.c</a></div><div class='hunk'>@@ -88,49 +88,6 @@ module_param_named(workaround_interval, modparam_workaround_interval,</div><div class='ctx'> MODULE_PARM_DESC(workaround_interval,</div><div class='ctx'> 	"set stall workaround interval in msecs (0=disabled) (default: 0)");</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* various RNDIS OID defs */</div><div class='del'>-#define OID_GEN_LINK_SPEED			cpu_to_le32(0x00010107)</div><div class='del'>-#define OID_GEN_RNDIS_CONFIG_PARAMETER		cpu_to_le32(0x0001021b)</div><div class='del'>-</div><div class='del'>-#define OID_GEN_XMIT_OK				cpu_to_le32(0x00020101)</div><div class='del'>-#define OID_GEN_RCV_OK				cpu_to_le32(0x00020102)</div><div class='del'>-#define OID_GEN_XMIT_ERROR			cpu_to_le32(0x00020103)</div><div class='del'>-#define OID_GEN_RCV_ERROR			cpu_to_le32(0x00020104)</div><div class='del'>-#define OID_GEN_RCV_NO_BUFFER			cpu_to_le32(0x00020105)</div><div class='del'>-</div><div class='del'>-#define OID_802_3_CURRENT_ADDRESS		cpu_to_le32(0x01010102)</div><div class='del'>-#define OID_802_3_MULTICAST_LIST		cpu_to_le32(0x01010103)</div><div class='del'>-#define OID_802_3_MAXIMUM_LIST_SIZE		cpu_to_le32(0x01010104)</div><div class='del'>-</div><div class='del'>-#define OID_802_11_BSSID			cpu_to_le32(0x0d010101)</div><div class='del'>-#define OID_802_11_SSID				cpu_to_le32(0x0d010102)</div><div class='del'>-#define OID_802_11_INFRASTRUCTURE_MODE		cpu_to_le32(0x0d010108)</div><div class='del'>-#define OID_802_11_ADD_WEP			cpu_to_le32(0x0d010113)</div><div class='del'>-#define OID_802_11_REMOVE_WEP			cpu_to_le32(0x0d010114)</div><div class='del'>-#define OID_802_11_DISASSOCIATE			cpu_to_le32(0x0d010115)</div><div class='del'>-#define OID_802_11_AUTHENTICATION_MODE		cpu_to_le32(0x0d010118)</div><div class='del'>-#define OID_802_11_PRIVACY_FILTER		cpu_to_le32(0x0d010119)</div><div class='del'>-#define OID_802_11_BSSID_LIST_SCAN		cpu_to_le32(0x0d01011a)</div><div class='del'>-#define OID_802_11_ENCRYPTION_STATUS		cpu_to_le32(0x0d01011b)</div><div class='del'>-#define OID_802_11_ADD_KEY			cpu_to_le32(0x0d01011d)</div><div class='del'>-#define OID_802_11_REMOVE_KEY			cpu_to_le32(0x0d01011e)</div><div class='del'>-#define OID_802_11_ASSOCIATION_INFORMATION	cpu_to_le32(0x0d01011f)</div><div class='del'>-#define OID_802_11_CAPABILITY			cpu_to_le32(0x0d010122)</div><div class='del'>-#define OID_802_11_PMKID			cpu_to_le32(0x0d010123)</div><div class='del'>-#define OID_802_11_NETWORK_TYPES_SUPPORTED	cpu_to_le32(0x0d010203)</div><div class='del'>-#define OID_802_11_NETWORK_TYPE_IN_USE		cpu_to_le32(0x0d010204)</div><div class='del'>-#define OID_802_11_TX_POWER_LEVEL		cpu_to_le32(0x0d010205)</div><div class='del'>-#define OID_802_11_RSSI				cpu_to_le32(0x0d010206)</div><div class='del'>-#define OID_802_11_RSSI_TRIGGER			cpu_to_le32(0x0d010207)</div><div class='del'>-#define OID_802_11_FRAGMENTATION_THRESHOLD	cpu_to_le32(0x0d010209)</div><div class='del'>-#define OID_802_11_RTS_THRESHOLD		cpu_to_le32(0x0d01020a)</div><div class='del'>-#define OID_802_11_SUPPORTED_RATES		cpu_to_le32(0x0d01020e)</div><div class='del'>-#define OID_802_11_CONFIGURATION		cpu_to_le32(0x0d010211)</div><div class='del'>-#define OID_802_11_POWER_MODE			cpu_to_le32(0x0d010216)</div><div class='del'>-#define OID_802_11_BSSID_LIST			cpu_to_le32(0x0d010217)</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /* Typical noise/maximum signal level values taken from ndiswrapper iw_ndis.h */</div><div class='ctx'> #define	WL_NOISE	-96	/* typical noise level in dBm */</div><div class='ctx'> #define	WL_SIGMAX	-32	/* typical maximum signal level in dBm */</div><div class='hunk'>@@ -149,12 +106,6 @@ MODULE_PARM_DESC(workaround_interval,</div><div class='ctx'> #define BCM4320_DEFAULT_TXPOWER_DBM_50  10</div><div class='ctx'> #define BCM4320_DEFAULT_TXPOWER_DBM_25  7</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* codes for "status" field of completion messages */</div><div class='del'>-#define RNDIS_STATUS_ADAPTER_NOT_READY		cpu_to_le32(0xc0010011)</div><div class='del'>-#define RNDIS_STATUS_ADAPTER_NOT_OPEN		cpu_to_le32(0xc0010012)</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /* Known device types */</div><div class='ctx'> #define RNDIS_UNKNOWN	0</div><div class='ctx'> #define RNDIS_BCM4320A	1</div><div class='hunk'>@@ -515,7 +466,7 @@ struct rndis_wlan_private {</div><div class='ctx'> 	int infra_mode;</div><div class='ctx'> 	bool connected;</div><div class='ctx'> 	u8 bssid[ETH_ALEN];</div><div class='del'>-	__le32 current_command_oid;</div><div class='add'>+	u32 current_command_oid;</div><div class='ctx'> </div><div class='ctx'> 	/* encryption stuff */</div><div class='ctx'> 	u8 encr_tx_key_index;</div><div class='hunk'>@@ -554,9 +505,6 @@ static int rndis_join_ibss(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> static int rndis_leave_ibss(struct wiphy *wiphy, struct net_device *dev);</div><div class='ctx'> </div><div class='del'>-static int rndis_set_channel(struct wiphy *wiphy, struct net_device *dev,</div><div class='del'>-	struct ieee80211_channel *chan, enum nl80211_channel_type channel_type);</div><div class='del'>-</div><div class='ctx'> static int rndis_add_key(struct wiphy *wiphy, struct net_device *netdev,</div><div class='ctx'> 			 u8 key_index, bool pairwise, const u8 *mac_addr,</div><div class='ctx'> 			 struct key_params *params);</div><div class='hunk'>@@ -598,7 +546,6 @@ static const struct cfg80211_ops rndis_config_ops = {</div><div class='ctx'> 	.disconnect = rndis_disconnect,</div><div class='ctx'> 	.join_ibss = rndis_join_ibss,</div><div class='ctx'> 	.leave_ibss = rndis_leave_ibss,</div><div class='del'>-	.set_channel = rndis_set_channel,</div><div class='ctx'> 	.add_key = rndis_add_key,</div><div class='ctx'> 	.del_key = rndis_del_key,</div><div class='ctx'> 	.set_default_key = rndis_set_default_key,</div><div class='hunk'>@@ -670,63 +617,63 @@ static int rndis_akm_suite_to_key_mgmt(u32 akm_suite)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef DEBUG</div><div class='del'>-static const char *oid_to_string(__le32 oid)</div><div class='add'>+static const char *oid_to_string(u32 oid)</div><div class='ctx'> {</div><div class='ctx'> 	switch (oid) {</div><div class='ctx'> #define OID_STR(oid) case oid: return(#oid)</div><div class='ctx'> 		/* from rndis_host.h */</div><div class='del'>-		OID_STR(OID_802_3_PERMANENT_ADDRESS);</div><div class='del'>-		OID_STR(OID_GEN_MAXIMUM_FRAME_SIZE);</div><div class='del'>-		OID_STR(OID_GEN_CURRENT_PACKET_FILTER);</div><div class='del'>-		OID_STR(OID_GEN_PHYSICAL_MEDIUM);</div><div class='add'>+		OID_STR(RNDIS_OID_802_3_PERMANENT_ADDRESS);</div><div class='add'>+		OID_STR(RNDIS_OID_GEN_MAXIMUM_FRAME_SIZE);</div><div class='add'>+		OID_STR(RNDIS_OID_GEN_CURRENT_PACKET_FILTER);</div><div class='add'>+		OID_STR(RNDIS_OID_GEN_PHYSICAL_MEDIUM);</div><div class='ctx'> </div><div class='ctx'> 		/* from rndis_wlan.c */</div><div class='del'>-		OID_STR(OID_GEN_LINK_SPEED);</div><div class='del'>-		OID_STR(OID_GEN_RNDIS_CONFIG_PARAMETER);</div><div class='del'>-</div><div class='del'>-		OID_STR(OID_GEN_XMIT_OK);</div><div class='del'>-		OID_STR(OID_GEN_RCV_OK);</div><div class='del'>-		OID_STR(OID_GEN_XMIT_ERROR);</div><div class='del'>-		OID_STR(OID_GEN_RCV_ERROR);</div><div class='del'>-		OID_STR(OID_GEN_RCV_NO_BUFFER);</div><div class='del'>-</div><div class='del'>-		OID_STR(OID_802_3_CURRENT_ADDRESS);</div><div class='del'>-		OID_STR(OID_802_3_MULTICAST_LIST);</div><div class='del'>-		OID_STR(OID_802_3_MAXIMUM_LIST_SIZE);</div><div class='del'>-</div><div class='del'>-		OID_STR(OID_802_11_BSSID);</div><div class='del'>-		OID_STR(OID_802_11_SSID);</div><div class='del'>-		OID_STR(OID_802_11_INFRASTRUCTURE_MODE);</div><div class='del'>-		OID_STR(OID_802_11_ADD_WEP);</div><div class='del'>-		OID_STR(OID_802_11_REMOVE_WEP);</div><div class='del'>-		OID_STR(OID_802_11_DISASSOCIATE);</div><div class='del'>-		OID_STR(OID_802_11_AUTHENTICATION_MODE);</div><div class='del'>-		OID_STR(OID_802_11_PRIVACY_FILTER);</div><div class='del'>-		OID_STR(OID_802_11_BSSID_LIST_SCAN);</div><div class='del'>-		OID_STR(OID_802_11_ENCRYPTION_STATUS);</div><div class='del'>-		OID_STR(OID_802_11_ADD_KEY);</div><div class='del'>-		OID_STR(OID_802_11_REMOVE_KEY);</div><div class='del'>-		OID_STR(OID_802_11_ASSOCIATION_INFORMATION);</div><div class='del'>-		OID_STR(OID_802_11_CAPABILITY);</div><div class='del'>-		OID_STR(OID_802_11_PMKID);</div><div class='del'>-		OID_STR(OID_802_11_NETWORK_TYPES_SUPPORTED);</div><div class='del'>-		OID_STR(OID_802_11_NETWORK_TYPE_IN_USE);</div><div class='del'>-		OID_STR(OID_802_11_TX_POWER_LEVEL);</div><div class='del'>-		OID_STR(OID_802_11_RSSI);</div><div class='del'>-		OID_STR(OID_802_11_RSSI_TRIGGER);</div><div class='del'>-		OID_STR(OID_802_11_FRAGMENTATION_THRESHOLD);</div><div class='del'>-		OID_STR(OID_802_11_RTS_THRESHOLD);</div><div class='del'>-		OID_STR(OID_802_11_SUPPORTED_RATES);</div><div class='del'>-		OID_STR(OID_802_11_CONFIGURATION);</div><div class='del'>-		OID_STR(OID_802_11_POWER_MODE);</div><div class='del'>-		OID_STR(OID_802_11_BSSID_LIST);</div><div class='add'>+		OID_STR(RNDIS_OID_GEN_LINK_SPEED);</div><div class='add'>+		OID_STR(RNDIS_OID_GEN_RNDIS_CONFIG_PARAMETER);</div><div class='add'>+</div><div class='add'>+		OID_STR(RNDIS_OID_GEN_XMIT_OK);</div><div class='add'>+		OID_STR(RNDIS_OID_GEN_RCV_OK);</div><div class='add'>+		OID_STR(RNDIS_OID_GEN_XMIT_ERROR);</div><div class='add'>+		OID_STR(RNDIS_OID_GEN_RCV_ERROR);</div><div class='add'>+		OID_STR(RNDIS_OID_GEN_RCV_NO_BUFFER);</div><div class='add'>+</div><div class='add'>+		OID_STR(RNDIS_OID_802_3_CURRENT_ADDRESS);</div><div class='add'>+		OID_STR(RNDIS_OID_802_3_MULTICAST_LIST);</div><div class='add'>+		OID_STR(RNDIS_OID_802_3_MAXIMUM_LIST_SIZE);</div><div class='add'>+</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_BSSID);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_SSID);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_INFRASTRUCTURE_MODE);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_ADD_WEP);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_REMOVE_WEP);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_DISASSOCIATE);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_AUTHENTICATION_MODE);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_PRIVACY_FILTER);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_BSSID_LIST_SCAN);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_ENCRYPTION_STATUS);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_ADD_KEY);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_REMOVE_KEY);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_ASSOCIATION_INFORMATION);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_CAPABILITY);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_PMKID);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_NETWORK_TYPES_SUPPORTED);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_NETWORK_TYPE_IN_USE);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_TX_POWER_LEVEL);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_RSSI);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_RSSI_TRIGGER);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_FRAGMENTATION_THRESHOLD);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_RTS_THRESHOLD);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_SUPPORTED_RATES);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_CONFIGURATION);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_POWER_MODE);</div><div class='add'>+		OID_STR(RNDIS_OID_802_11_BSSID_LIST);</div><div class='ctx'> #undef OID_STR</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return "?";</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='del'>-static const char *oid_to_string(__le32 oid)</div><div class='add'>+static const char *oid_to_string(u32 oid)</div><div class='ctx'> {</div><div class='ctx'> 	return "?";</div><div class='ctx'> }</div><div class='hunk'>@@ -736,7 +683,7 @@ static const char *oid_to_string(__le32 oid)</div><div class='ctx'> static int rndis_error_status(__le32 rndis_status)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='del'>-	switch (rndis_status) {</div><div class='add'>+	switch (le32_to_cpu(rndis_status)) {</div><div class='ctx'> 	case RNDIS_STATUS_SUCCESS:</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -755,7 +702,7 @@ static int rndis_error_status(__le32 rndis_status)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rndis_query_oid(struct usbnet *dev, __le32 oid, void *data, int *len)</div><div class='add'>+static int rndis_query_oid(struct usbnet *dev, u32 oid, void *data, int *len)</div><div class='ctx'> {</div><div class='ctx'> 	struct rndis_wlan_private *priv = get_rndis_wlan_priv(dev);</div><div class='ctx'> 	union {</div><div class='hunk'>@@ -782,9 +729,9 @@ static int rndis_query_oid(struct usbnet *dev, __le32 oid, void *data, int *len)</div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;command_lock);</div><div class='ctx'> </div><div class='ctx'> 	memset(u.get, 0, sizeof *u.get);</div><div class='del'>-	u.get-&gt;msg_type = RNDIS_MSG_QUERY;</div><div class='add'>+	u.get-&gt;msg_type = cpu_to_le32(RNDIS_MSG_QUERY);</div><div class='ctx'> 	u.get-&gt;msg_len = cpu_to_le32(sizeof *u.get);</div><div class='del'>-	u.get-&gt;oid = oid;</div><div class='add'>+	u.get-&gt;oid = cpu_to_le32(oid);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;current_command_oid = oid;</div><div class='ctx'> 	ret = rndis_command(dev, u.header, buflen);</div><div class='hunk'>@@ -839,7 +786,7 @@ exit_unlock:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rndis_set_oid(struct usbnet *dev, __le32 oid, const void *data,</div><div class='add'>+static int rndis_set_oid(struct usbnet *dev, u32 oid, const void *data,</div><div class='ctx'> 			 int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct rndis_wlan_private *priv = get_rndis_wlan_priv(dev);</div><div class='hunk'>@@ -866,9 +813,9 @@ static int rndis_set_oid(struct usbnet *dev, __le32 oid, const void *data,</div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;command_lock);</div><div class='ctx'> </div><div class='ctx'> 	memset(u.set, 0, sizeof *u.set);</div><div class='del'>-	u.set-&gt;msg_type = RNDIS_MSG_SET;</div><div class='add'>+	u.set-&gt;msg_type = cpu_to_le32(RNDIS_MSG_SET);</div><div class='ctx'> 	u.set-&gt;msg_len = cpu_to_le32(sizeof(*u.set) + len);</div><div class='del'>-	u.set-&gt;oid = oid;</div><div class='add'>+	u.set-&gt;oid = cpu_to_le32(oid);</div><div class='ctx'> 	u.set-&gt;len = cpu_to_le32(len);</div><div class='ctx'> 	u.set-&gt;offset = cpu_to_le32(sizeof(*u.set) - 8);</div><div class='ctx'> 	u.set-&gt;handle = cpu_to_le32(0);</div><div class='hunk'>@@ -908,7 +855,7 @@ static int rndis_reset(struct usbnet *usbdev)</div><div class='ctx'> </div><div class='ctx'> 	reset = (void *)priv-&gt;command_buffer;</div><div class='ctx'> 	memset(reset, 0, sizeof(*reset));</div><div class='del'>-	reset-&gt;msg_type = RNDIS_MSG_RESET;</div><div class='add'>+	reset-&gt;msg_type = cpu_to_le32(RNDIS_MSG_RESET);</div><div class='ctx'> 	reset-&gt;msg_len = cpu_to_le32(sizeof(*reset));</div><div class='ctx'> 	priv-&gt;current_command_oid = 0;</div><div class='ctx'> 	ret = rndis_command(usbdev, (void *)reset, CONTROL_BUFFER_SIZE);</div><div class='hunk'>@@ -994,7 +941,7 @@ static int rndis_set_config_parameter(struct usbnet *dev, char *param,</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	ret = rndis_set_oid(dev, OID_GEN_RNDIS_CONFIG_PARAMETER,</div><div class='add'>+	ret = rndis_set_oid(dev, RNDIS_OID_GEN_RNDIS_CONFIG_PARAMETER,</div><div class='ctx'> 							infobuf, info_len);</div><div class='ctx'> 	if (ret != 0)</div><div class='ctx'> 		netdev_dbg(dev-&gt;net, "setting rndis config parameter failed, %d\n",</div><div class='hunk'>@@ -1031,9 +978,9 @@ static int rndis_start_bssid_list_scan(struct usbnet *usbdev)</div><div class='ctx'> {</div><div class='ctx'> 	__le32 tmp;</div><div class='ctx'> </div><div class='del'>-	/* Note: OID_802_11_BSSID_LIST_SCAN clears internal BSS list. */</div><div class='add'>+	/* Note: RNDIS_OID_802_11_BSSID_LIST_SCAN clears internal BSS list. */</div><div class='ctx'> 	tmp = cpu_to_le32(1);</div><div class='del'>-	return rndis_set_oid(usbdev, OID_802_11_BSSID_LIST_SCAN, &amp;tmp,</div><div class='add'>+	return rndis_set_oid(usbdev, RNDIS_OID_802_11_BSSID_LIST_SCAN, &amp;tmp,</div><div class='ctx'> 							sizeof(tmp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1042,7 +989,8 @@ static int set_essid(struct usbnet *usbdev, struct ndis_80211_ssid *ssid)</div><div class='ctx'> 	struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = rndis_set_oid(usbdev, OID_802_11_SSID, ssid, sizeof(*ssid));</div><div class='add'>+	ret = rndis_set_oid(usbdev, RNDIS_OID_802_11_SSID,</div><div class='add'>+			    ssid, sizeof(*ssid));</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		netdev_warn(usbdev-&gt;net, "setting SSID failed (%08X)\n", ret);</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1059,7 +1007,8 @@ static int set_bssid(struct usbnet *usbdev, const u8 *bssid)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = rndis_set_oid(usbdev, OID_802_11_BSSID, bssid, ETH_ALEN);</div><div class='add'>+	ret = rndis_set_oid(usbdev, RNDIS_OID_802_11_BSSID,</div><div class='add'>+			    bssid, ETH_ALEN);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		netdev_warn(usbdev-&gt;net, "setting BSSID[%pM] failed (%08X)\n",</div><div class='ctx'> 			    bssid, ret);</div><div class='hunk'>@@ -1083,7 +1032,8 @@ static int get_bssid(struct usbnet *usbdev, u8 bssid[ETH_ALEN])</div><div class='ctx'> 	int ret, len;</div><div class='ctx'> </div><div class='ctx'> 	len = ETH_ALEN;</div><div class='del'>-	ret = rndis_query_oid(usbdev, OID_802_11_BSSID, bssid, &amp;len);</div><div class='add'>+	ret = rndis_query_oid(usbdev, RNDIS_OID_802_11_BSSID,</div><div class='add'>+			      bssid, &amp;len);</div><div class='ctx'> </div><div class='ctx'> 	if (ret != 0)</div><div class='ctx'> 		memset(bssid, 0, ETH_ALEN);</div><div class='hunk'>@@ -1094,8 +1044,9 @@ static int get_bssid(struct usbnet *usbdev, u8 bssid[ETH_ALEN])</div><div class='ctx'> static int get_association_info(struct usbnet *usbdev,</div><div class='ctx'> 			struct ndis_80211_assoc_info *info, int len)</div><div class='ctx'> {</div><div class='del'>-	return rndis_query_oid(usbdev, OID_802_11_ASSOCIATION_INFORMATION,</div><div class='del'>-				info, &amp;len);</div><div class='add'>+	return rndis_query_oid(usbdev,</div><div class='add'>+			RNDIS_OID_802_11_ASSOCIATION_INFORMATION,</div><div class='add'>+			info, &amp;len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool is_associated(struct usbnet *usbdev)</div><div class='hunk'>@@ -1119,7 +1070,9 @@ static int disassociate(struct usbnet *usbdev, bool reset_ssid)</div><div class='ctx'> 	int i, ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;radio_on) {</div><div class='del'>-		ret = rndis_set_oid(usbdev, OID_802_11_DISASSOCIATE, NULL, 0);</div><div class='add'>+		ret = rndis_set_oid(usbdev,</div><div class='add'>+				RNDIS_OID_802_11_DISASSOCIATE,</div><div class='add'>+				NULL, 0);</div><div class='ctx'> 		if (ret == 0) {</div><div class='ctx'> 			priv-&gt;radio_on = false;</div><div class='ctx'> 			netdev_dbg(usbdev-&gt;net, "%s(): radio_on = false\n",</div><div class='hunk'>@@ -1181,8 +1134,9 @@ static int set_auth_mode(struct usbnet *usbdev, u32 wpa_version,</div><div class='ctx'> 		return -ENOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	tmp = cpu_to_le32(auth_mode);</div><div class='del'>-	ret = rndis_set_oid(usbdev, OID_802_11_AUTHENTICATION_MODE, &amp;tmp,</div><div class='del'>-								sizeof(tmp));</div><div class='add'>+	ret = rndis_set_oid(usbdev,</div><div class='add'>+			    RNDIS_OID_802_11_AUTHENTICATION_MODE,</div><div class='add'>+			    &amp;tmp, sizeof(tmp));</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		netdev_warn(usbdev-&gt;net, "setting auth mode failed (%08X)\n",</div><div class='ctx'> 			    ret);</div><div class='hunk'>@@ -1208,8 +1162,9 @@ static int set_priv_filter(struct usbnet *usbdev)</div><div class='ctx'> 	else</div><div class='ctx'> 		tmp = cpu_to_le32(NDIS_80211_PRIV_ACCEPT_ALL);</div><div class='ctx'> </div><div class='del'>-	return rndis_set_oid(usbdev, OID_802_11_PRIVACY_FILTER, &amp;tmp,</div><div class='del'>-								sizeof(tmp));</div><div class='add'>+	return rndis_set_oid(usbdev,</div><div class='add'>+			     RNDIS_OID_802_11_PRIVACY_FILTER, &amp;tmp,</div><div class='add'>+			     sizeof(tmp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int set_encr_mode(struct usbnet *usbdev, int pairwise, int groupwise)</div><div class='hunk'>@@ -1234,8 +1189,9 @@ static int set_encr_mode(struct usbnet *usbdev, int pairwise, int groupwise)</div><div class='ctx'> 		encr_mode = NDIS_80211_ENCR_DISABLED;</div><div class='ctx'> </div><div class='ctx'> 	tmp = cpu_to_le32(encr_mode);</div><div class='del'>-	ret = rndis_set_oid(usbdev, OID_802_11_ENCRYPTION_STATUS, &amp;tmp,</div><div class='del'>-								sizeof(tmp));</div><div class='add'>+	ret = rndis_set_oid(usbdev,</div><div class='add'>+			RNDIS_OID_802_11_ENCRYPTION_STATUS, &amp;tmp,</div><div class='add'>+			sizeof(tmp));</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		netdev_warn(usbdev-&gt;net, "setting encr mode failed (%08X)\n",</div><div class='ctx'> 			    ret);</div><div class='hunk'>@@ -1255,8 +1211,9 @@ static int set_infra_mode(struct usbnet *usbdev, int mode)</div><div class='ctx'> 		   __func__, priv-&gt;infra_mode);</div><div class='ctx'> </div><div class='ctx'> 	tmp = cpu_to_le32(mode);</div><div class='del'>-	ret = rndis_set_oid(usbdev, OID_802_11_INFRASTRUCTURE_MODE, &amp;tmp,</div><div class='del'>-								sizeof(tmp));</div><div class='add'>+	ret = rndis_set_oid(usbdev,</div><div class='add'>+			    RNDIS_OID_802_11_INFRASTRUCTURE_MODE,</div><div class='add'>+			    &amp;tmp, sizeof(tmp));</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		netdev_warn(usbdev-&gt;net, "setting infra mode failed (%08X)\n",</div><div class='ctx'> 			    ret);</div><div class='hunk'>@@ -1282,8 +1239,9 @@ static int set_rts_threshold(struct usbnet *usbdev, u32 rts_threshold)</div><div class='ctx'> 		rts_threshold = 2347;</div><div class='ctx'> </div><div class='ctx'> 	tmp = cpu_to_le32(rts_threshold);</div><div class='del'>-	return rndis_set_oid(usbdev, OID_802_11_RTS_THRESHOLD, &amp;tmp,</div><div class='del'>-								sizeof(tmp));</div><div class='add'>+	return rndis_set_oid(usbdev,</div><div class='add'>+			     RNDIS_OID_802_11_RTS_THRESHOLD,</div><div class='add'>+			     &amp;tmp, sizeof(tmp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int set_frag_threshold(struct usbnet *usbdev, u32 frag_threshold)</div><div class='hunk'>@@ -1296,8 +1254,9 @@ static int set_frag_threshold(struct usbnet *usbdev, u32 frag_threshold)</div><div class='ctx'> 		frag_threshold = 2346;</div><div class='ctx'> </div><div class='ctx'> 	tmp = cpu_to_le32(frag_threshold);</div><div class='del'>-	return rndis_set_oid(usbdev, OID_802_11_FRAGMENTATION_THRESHOLD, &amp;tmp,</div><div class='del'>-								sizeof(tmp));</div><div class='add'>+	return rndis_set_oid(usbdev,</div><div class='add'>+			RNDIS_OID_802_11_FRAGMENTATION_THRESHOLD,</div><div class='add'>+			&amp;tmp, sizeof(tmp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void set_default_iw_params(struct usbnet *usbdev)</div><div class='hunk'>@@ -1333,7 +1292,9 @@ static int set_channel(struct usbnet *usbdev, int channel)</div><div class='ctx'> 	dsconfig = ieee80211_dsss_chan_to_freq(channel) * 1000;</div><div class='ctx'> </div><div class='ctx'> 	len = sizeof(config);</div><div class='del'>-	ret = rndis_query_oid(usbdev, OID_802_11_CONFIGURATION, &amp;config, &amp;len);</div><div class='add'>+	ret = rndis_query_oid(usbdev,</div><div class='add'>+			RNDIS_OID_802_11_CONFIGURATION,</div><div class='add'>+			&amp;config, &amp;len);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		netdev_dbg(usbdev-&gt;net, "%s(): querying configuration failed\n",</div><div class='ctx'> 			   __func__);</div><div class='hunk'>@@ -1341,8 +1302,9 @@ static int set_channel(struct usbnet *usbdev, int channel)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	config.ds_config = cpu_to_le32(dsconfig);</div><div class='del'>-	ret = rndis_set_oid(usbdev, OID_802_11_CONFIGURATION, &amp;config,</div><div class='del'>-								sizeof(config));</div><div class='add'>+	ret = rndis_set_oid(usbdev,</div><div class='add'>+			RNDIS_OID_802_11_CONFIGURATION,</div><div class='add'>+			&amp;config, sizeof(config));</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(usbdev-&gt;net, "%s(): %d -&gt; %d\n", __func__, channel, ret);</div><div class='ctx'> </div><div class='hunk'>@@ -1359,8 +1321,10 @@ static struct ieee80211_channel *get_current_channel(struct usbnet *usbdev,</div><div class='ctx'> </div><div class='ctx'> 	/* Get channel and beacon interval */</div><div class='ctx'> 	len = sizeof(config);</div><div class='del'>-	ret = rndis_query_oid(usbdev, OID_802_11_CONFIGURATION, &amp;config, &amp;len);</div><div class='del'>-	netdev_dbg(usbdev-&gt;net, "%s(): OID_802_11_CONFIGURATION -&gt; %d\n",</div><div class='add'>+	ret = rndis_query_oid(usbdev,</div><div class='add'>+			RNDIS_OID_802_11_CONFIGURATION,</div><div class='add'>+			&amp;config, &amp;len);</div><div class='add'>+	netdev_dbg(usbdev-&gt;net, "%s(): RNDIS_OID_802_11_CONFIGURATION -&gt; %d\n",</div><div class='ctx'> 				__func__, ret);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -1413,8 +1377,9 @@ static int add_wep_key(struct usbnet *usbdev, const u8 *key, int key_len,</div><div class='ctx'> 				    ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = rndis_set_oid(usbdev, OID_802_11_ADD_WEP, &amp;ndis_key,</div><div class='del'>-							sizeof(ndis_key));</div><div class='add'>+	ret = rndis_set_oid(usbdev,</div><div class='add'>+			RNDIS_OID_802_11_ADD_WEP, &amp;ndis_key,</div><div class='add'>+			sizeof(ndis_key));</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		netdev_warn(usbdev-&gt;net, "adding encryption key %d failed (%08X)\n",</div><div class='ctx'> 			    index + 1, ret);</div><div class='hunk'>@@ -1504,9 +1469,10 @@ static int add_wpa_key(struct usbnet *usbdev, const u8 *key, int key_len,</div><div class='ctx'> 			get_bssid(usbdev, ndis_key.bssid);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = rndis_set_oid(usbdev, OID_802_11_ADD_KEY, &amp;ndis_key,</div><div class='del'>-					le32_to_cpu(ndis_key.size));</div><div class='del'>-	netdev_dbg(usbdev-&gt;net, "%s(): OID_802_11_ADD_KEY -&gt; %08X\n",</div><div class='add'>+	ret = rndis_set_oid(usbdev,</div><div class='add'>+			RNDIS_OID_802_11_ADD_KEY, &amp;ndis_key,</div><div class='add'>+			le32_to_cpu(ndis_key.size));</div><div class='add'>+	netdev_dbg(usbdev-&gt;net, "%s(): RNDIS_OID_802_11_ADD_KEY -&gt; %08X\n",</div><div class='ctx'> 		   __func__, ret);</div><div class='ctx'> 	if (ret != 0)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1594,14 +1560,16 @@ static int remove_key(struct usbnet *usbdev, u8 index, const u8 *bssid)</div><div class='ctx'> 			memset(remove_key.bssid, 0xff,</div><div class='ctx'> 						sizeof(remove_key.bssid));</div><div class='ctx'> </div><div class='del'>-		ret = rndis_set_oid(usbdev, OID_802_11_REMOVE_KEY, &amp;remove_key,</div><div class='del'>-							sizeof(remove_key));</div><div class='add'>+		ret = rndis_set_oid(usbdev,</div><div class='add'>+				RNDIS_OID_802_11_REMOVE_KEY,</div><div class='add'>+				&amp;remove_key, sizeof(remove_key));</div><div class='ctx'> 		if (ret != 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		keyindex = cpu_to_le32(index);</div><div class='del'>-		ret = rndis_set_oid(usbdev, OID_802_11_REMOVE_WEP, &amp;keyindex,</div><div class='del'>-							sizeof(keyindex));</div><div class='add'>+		ret = rndis_set_oid(usbdev,</div><div class='add'>+				RNDIS_OID_802_11_REMOVE_WEP,</div><div class='add'>+				&amp;keyindex, sizeof(keyindex));</div><div class='ctx'> 		if (ret != 0) {</div><div class='ctx'> 			netdev_warn(usbdev-&gt;net,</div><div class='ctx'> 				    "removing encryption key %d failed (%08X)\n",</div><div class='hunk'>@@ -1626,14 +1594,14 @@ static void set_multicast_list(struct usbnet *usbdev)</div><div class='ctx'> 	char *mc_addrs = NULL;</div><div class='ctx'> 	int mc_count;</div><div class='ctx'> </div><div class='del'>-	basefilter = filter = RNDIS_PACKET_TYPE_DIRECTED |</div><div class='del'>-			      RNDIS_PACKET_TYPE_BROADCAST;</div><div class='add'>+	basefilter = filter = cpu_to_le32(RNDIS_PACKET_TYPE_DIRECTED |</div><div class='add'>+					  RNDIS_PACKET_TYPE_BROADCAST);</div><div class='ctx'> </div><div class='ctx'> 	if (usbdev-&gt;net-&gt;flags &amp; IFF_PROMISC) {</div><div class='del'>-		filter |= RNDIS_PACKET_TYPE_PROMISCUOUS |</div><div class='del'>-			RNDIS_PACKET_TYPE_ALL_LOCAL;</div><div class='add'>+		filter |= cpu_to_le32(RNDIS_PACKET_TYPE_PROMISCUOUS |</div><div class='add'>+				      RNDIS_PACKET_TYPE_ALL_LOCAL);</div><div class='ctx'> 	} else if (usbdev-&gt;net-&gt;flags &amp; IFF_ALLMULTI) {</div><div class='del'>-		filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST;</div><div class='add'>+		filter |= cpu_to_le32(RNDIS_PACKET_TYPE_ALL_MULTICAST);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (filter != basefilter)</div><div class='hunk'>@@ -1646,7 +1614,7 @@ static void set_multicast_list(struct usbnet *usbdev)</div><div class='ctx'> 	netif_addr_lock_bh(usbdev-&gt;net);</div><div class='ctx'> 	mc_count = netdev_mc_count(usbdev-&gt;net);</div><div class='ctx'> 	if (mc_count &gt; priv-&gt;multicast_size) {</div><div class='del'>-		filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST;</div><div class='add'>+		filter |= cpu_to_le32(RNDIS_PACKET_TYPE_ALL_MULTICAST);</div><div class='ctx'> 	} else if (mc_count) {</div><div class='ctx'> 		int i = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1669,27 +1637,28 @@ static void set_multicast_list(struct usbnet *usbdev)</div><div class='ctx'> 		goto set_filter;</div><div class='ctx'> </div><div class='ctx'> 	if (mc_count) {</div><div class='del'>-		ret = rndis_set_oid(usbdev, OID_802_3_MULTICAST_LIST, mc_addrs,</div><div class='del'>-				    mc_count * ETH_ALEN);</div><div class='add'>+		ret = rndis_set_oid(usbdev,</div><div class='add'>+				RNDIS_OID_802_3_MULTICAST_LIST,</div><div class='add'>+				mc_addrs, mc_count * ETH_ALEN);</div><div class='ctx'> 		kfree(mc_addrs);</div><div class='ctx'> 		if (ret == 0)</div><div class='del'>-			filter |= RNDIS_PACKET_TYPE_MULTICAST;</div><div class='add'>+			filter |= cpu_to_le32(RNDIS_PACKET_TYPE_MULTICAST);</div><div class='ctx'> 		else</div><div class='del'>-			filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST;</div><div class='add'>+			filter |= cpu_to_le32(RNDIS_PACKET_TYPE_ALL_MULTICAST);</div><div class='ctx'> </div><div class='del'>-		netdev_dbg(usbdev-&gt;net, "OID_802_3_MULTICAST_LIST(%d, max: %d) -&gt; %d\n",</div><div class='add'>+		netdev_dbg(usbdev-&gt;net, "RNDIS_OID_802_3_MULTICAST_LIST(%d, max: %d) -&gt; %d\n",</div><div class='ctx'> 			   mc_count, priv-&gt;multicast_size, ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> set_filter:</div><div class='del'>-	ret = rndis_set_oid(usbdev, OID_GEN_CURRENT_PACKET_FILTER, &amp;filter,</div><div class='add'>+	ret = rndis_set_oid(usbdev, RNDIS_OID_GEN_CURRENT_PACKET_FILTER, &amp;filter,</div><div class='ctx'> 							sizeof(filter));</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		netdev_warn(usbdev-&gt;net, "couldn't set packet filter: %08x\n",</div><div class='ctx'> 			    le32_to_cpu(filter));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(usbdev-&gt;net, "OID_GEN_CURRENT_PACKET_FILTER(%08x) -&gt; %d\n",</div><div class='add'>+	netdev_dbg(usbdev-&gt;net, "RNDIS_OID_GEN_CURRENT_PACKET_FILTER(%08x) -&gt; %d\n",</div><div class='ctx'> 		   le32_to_cpu(filter), ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1748,9 +1717,10 @@ static struct ndis_80211_pmkid *get_device_pmkids(struct usbnet *usbdev)</div><div class='ctx'> 	pmkids-&gt;length = cpu_to_le32(len);</div><div class='ctx'> 	pmkids-&gt;bssid_info_count = cpu_to_le32(max_pmkids);</div><div class='ctx'> </div><div class='del'>-	ret = rndis_query_oid(usbdev, OID_802_11_PMKID, pmkids, &amp;len);</div><div class='add'>+	ret = rndis_query_oid(usbdev, RNDIS_OID_802_11_PMKID,</div><div class='add'>+			pmkids, &amp;len);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		netdev_dbg(usbdev-&gt;net, "%s(): OID_802_11_PMKID(%d, %d)"</div><div class='add'>+		netdev_dbg(usbdev-&gt;net, "%s(): RNDIS_OID_802_11_PMKID(%d, %d)"</div><div class='ctx'> 				" -&gt; %d\n", __func__, len, max_pmkids, ret);</div><div class='ctx'> </div><div class='ctx'> 		kfree(pmkids);</div><div class='hunk'>@@ -1776,10 +1746,10 @@ static int set_device_pmkids(struct usbnet *usbdev,</div><div class='ctx'> </div><div class='ctx'> 	debug_print_pmkids(usbdev, pmkids, __func__);</div><div class='ctx'> </div><div class='del'>-	ret = rndis_set_oid(usbdev, OID_802_11_PMKID, pmkids,</div><div class='del'>-						le32_to_cpu(pmkids-&gt;length));</div><div class='add'>+	ret = rndis_set_oid(usbdev, RNDIS_OID_802_11_PMKID, pmkids,</div><div class='add'>+			    le32_to_cpu(pmkids-&gt;length));</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		netdev_dbg(usbdev-&gt;net, "%s(): OID_802_11_PMKID(%d, %d) -&gt; %d"</div><div class='add'>+		netdev_dbg(usbdev-&gt;net, "%s(): RNDIS_OID_802_11_PMKID(%d, %d) -&gt; %d"</div><div class='ctx'> 				"\n", __func__, len, num_pmkids, ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1801,8 +1771,8 @@ static struct ndis_80211_pmkid *remove_pmkid(struct usbnet *usbdev,</div><div class='ctx'> 		count = max_pmkids;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; count; i++)</div><div class='del'>-		if (!compare_ether_addr(pmkids-&gt;bssid_info[i].bssid,</div><div class='del'>-							pmksa-&gt;bssid))</div><div class='add'>+		if (ether_addr_equal(pmkids-&gt;bssid_info[i].bssid,</div><div class='add'>+				     pmksa-&gt;bssid))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 	/* pmkid not found */</div><div class='hunk'>@@ -1843,8 +1813,8 @@ static struct ndis_80211_pmkid *update_pmkid(struct usbnet *usbdev,</div><div class='ctx'> </div><div class='ctx'> 	/* update with new pmkid */</div><div class='ctx'> 	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		if (compare_ether_addr(pmkids-&gt;bssid_info[i].bssid,</div><div class='del'>-							pmksa-&gt;bssid))</div><div class='add'>+		if (!ether_addr_equal(pmkids-&gt;bssid_info[i].bssid,</div><div class='add'>+				      pmksa-&gt;bssid))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		memcpy(pmkids-&gt;bssid_info[i].pmkid, pmksa-&gt;pmkid,</div><div class='hunk'>@@ -2113,7 +2083,8 @@ resize_buf:</div><div class='ctx'> 	 * resizing until it won't get any bigger.</div><div class='ctx'> 	 */</div><div class='ctx'> 	new_len = len;</div><div class='del'>-	ret = rndis_query_oid(usbdev, OID_802_11_BSSID_LIST, buf, &amp;new_len);</div><div class='add'>+	ret = rndis_query_oid(usbdev, RNDIS_OID_802_11_BSSID_LIST,</div><div class='add'>+			      buf, &amp;new_len);</div><div class='ctx'> 	if (ret != 0 || new_len &lt; sizeof(struct ndis_80211_bssid_list_ex))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -2139,7 +2110,7 @@ resize_buf:</div><div class='ctx'> 	while (check_bssid_list_item(bssid, bssid_len, buf, len)) {</div><div class='ctx'> 		if (rndis_bss_info_update(usbdev, bssid) &amp;&amp; match_bssid &amp;&amp;</div><div class='ctx'> 		    matched) {</div><div class='del'>-			if (compare_ether_addr(bssid-&gt;mac, match_bssid))</div><div class='add'>+			if (!ether_addr_equal(bssid-&gt;mac, match_bssid))</div><div class='ctx'> 				*matched = true;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2423,16 +2394,6 @@ static int rndis_leave_ibss(struct wiphy *wiphy, struct net_device *dev)</div><div class='ctx'> 	return deauthenticate(usbdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rndis_set_channel(struct wiphy *wiphy, struct net_device *netdev,</div><div class='del'>-	struct ieee80211_channel *chan, enum nl80211_channel_type channel_type)</div><div class='del'>-{</div><div class='del'>-	struct rndis_wlan_private *priv = wiphy_priv(wiphy);</div><div class='del'>-	struct usbnet *usbdev = priv-&gt;usbdev;</div><div class='del'>-</div><div class='del'>-	return set_channel(usbdev,</div><div class='del'>-			ieee80211_frequency_to_channel(chan-&gt;center_freq));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int rndis_add_key(struct wiphy *wiphy, struct net_device *netdev,</div><div class='ctx'> 			 u8 key_index, bool pairwise, const u8 *mac_addr,</div><div class='ctx'> 			 struct key_params *params)</div><div class='hunk'>@@ -2511,14 +2472,15 @@ static void rndis_fill_station_info(struct usbnet *usbdev,</div><div class='ctx'> 	memset(sinfo, 0, sizeof(*sinfo));</div><div class='ctx'> </div><div class='ctx'> 	len = sizeof(linkspeed);</div><div class='del'>-	ret = rndis_query_oid(usbdev, OID_GEN_LINK_SPEED, &amp;linkspeed, &amp;len);</div><div class='add'>+	ret = rndis_query_oid(usbdev, RNDIS_OID_GEN_LINK_SPEED, &amp;linkspeed, &amp;len);</div><div class='ctx'> 	if (ret == 0) {</div><div class='ctx'> 		sinfo-&gt;txrate.legacy = le32_to_cpu(linkspeed) / 1000;</div><div class='ctx'> 		sinfo-&gt;filled |= STATION_INFO_TX_BITRATE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	len = sizeof(rssi);</div><div class='del'>-	ret = rndis_query_oid(usbdev, OID_802_11_RSSI, &amp;rssi, &amp;len);</div><div class='add'>+	ret = rndis_query_oid(usbdev, RNDIS_OID_802_11_RSSI,</div><div class='add'>+			      &amp;rssi, &amp;len);</div><div class='ctx'> 	if (ret == 0) {</div><div class='ctx'> 		sinfo-&gt;signal = level_to_qual(le32_to_cpu(rssi));</div><div class='ctx'> 		sinfo-&gt;filled |= STATION_INFO_SIGNAL;</div><div class='hunk'>@@ -2531,7 +2493,7 @@ static int rndis_get_station(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> 	struct rndis_wlan_private *priv = wiphy_priv(wiphy);</div><div class='ctx'> 	struct usbnet *usbdev = priv-&gt;usbdev;</div><div class='ctx'> </div><div class='del'>-	if (compare_ether_addr(priv-&gt;bssid, mac))</div><div class='add'>+	if (!ether_addr_equal(priv-&gt;bssid, mac))</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='ctx'> 	rndis_fill_station_info(usbdev, sinfo);</div><div class='hunk'>@@ -2624,7 +2586,8 @@ static int rndis_flush_pmksa(struct wiphy *wiphy, struct net_device *netdev)</div><div class='ctx'> 	pmkid.length = cpu_to_le32(sizeof(pmkid));</div><div class='ctx'> 	pmkid.bssid_info_count = cpu_to_le32(0);</div><div class='ctx'> </div><div class='del'>-	return rndis_set_oid(usbdev, OID_802_11_PMKID, &amp;pmkid, sizeof(pmkid));</div><div class='add'>+	return rndis_set_oid(usbdev, RNDIS_OID_802_11_PMKID,</div><div class='add'>+			     &amp;pmkid, sizeof(pmkid));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rndis_set_power_mgmt(struct wiphy *wiphy, struct net_device *dev,</div><div class='hunk'>@@ -2654,9 +2617,10 @@ static int rndis_set_power_mgmt(struct wiphy *wiphy, struct net_device *dev,</div><div class='ctx'> 	priv-&gt;power_mode = power_mode;</div><div class='ctx'> </div><div class='ctx'> 	mode = cpu_to_le32(power_mode);</div><div class='del'>-	ret = rndis_set_oid(usbdev, OID_802_11_POWER_MODE, &amp;mode, sizeof(mode));</div><div class='add'>+	ret = rndis_set_oid(usbdev, RNDIS_OID_802_11_POWER_MODE,</div><div class='add'>+			    &amp;mode, sizeof(mode));</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(usbdev-&gt;net, "%s(): OID_802_11_POWER_MODE -&gt; %d\n",</div><div class='add'>+	netdev_dbg(usbdev-&gt;net, "%s(): RNDIS_OID_802_11_POWER_MODE -&gt; %d\n",</div><div class='ctx'> 				__func__, ret);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2693,10 +2657,11 @@ static void rndis_wlan_craft_connected_bss(struct usbnet *usbdev, u8 *bssid,</div><div class='ctx'> 	/* Get signal quality, in case of error use rssi=0 and ignore error. */</div><div class='ctx'> 	len = sizeof(rssi);</div><div class='ctx'> 	rssi = 0;</div><div class='del'>-	ret = rndis_query_oid(usbdev, OID_802_11_RSSI, &amp;rssi, &amp;len);</div><div class='add'>+	ret = rndis_query_oid(usbdev, RNDIS_OID_802_11_RSSI,</div><div class='add'>+			      &amp;rssi, &amp;len);</div><div class='ctx'> 	signal = level_to_qual(le32_to_cpu(rssi));</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(usbdev-&gt;net, "%s(): OID_802_11_RSSI -&gt; %d, "</div><div class='add'>+	netdev_dbg(usbdev-&gt;net, "%s(): RNDIS_OID_802_11_RSSI -&gt; %d, "</div><div class='ctx'> 		   "rssi:%d, qual: %d\n", __func__, ret, le32_to_cpu(rssi),</div><div class='ctx'> 		   level_to_qual(le32_to_cpu(rssi)));</div><div class='ctx'> </div><div class='hunk'>@@ -2720,8 +2685,9 @@ static void rndis_wlan_craft_connected_bss(struct usbnet *usbdev, u8 *bssid,</div><div class='ctx'> 	/* Get SSID, in case of error, use zero length SSID and ignore error. */</div><div class='ctx'> 	len = sizeof(ssid);</div><div class='ctx'> 	memset(&amp;ssid, 0, sizeof(ssid));</div><div class='del'>-	ret = rndis_query_oid(usbdev, OID_802_11_SSID, &amp;ssid, &amp;len);</div><div class='del'>-	netdev_dbg(usbdev-&gt;net, "%s(): OID_802_11_SSID -&gt; %d, len: %d, ssid: "</div><div class='add'>+	ret = rndis_query_oid(usbdev, RNDIS_OID_802_11_SSID,</div><div class='add'>+			      &amp;ssid, &amp;len);</div><div class='add'>+	netdev_dbg(usbdev-&gt;net, "%s(): RNDIS_OID_802_11_SSID -&gt; %d, len: %d, ssid: "</div><div class='ctx'> 				"'%.32s'\n", __func__, ret,</div><div class='ctx'> 				le32_to_cpu(ssid.length), ssid.essid);</div><div class='ctx'> </div><div class='hunk'>@@ -2843,7 +2809,7 @@ static void rndis_wlan_do_link_up_work(struct usbnet *usbdev)</div><div class='ctx'> 	 * NDIS spec says: "If the device is associated, but the associated</div><div class='ctx'> 	 *  BSSID is not in its BSSID scan list, then the driver must add an</div><div class='ctx'> 	 *  entry for the BSSID at the end of the data that it returns in</div><div class='del'>-	 *  response to query of OID_802_11_BSSID_LIST."</div><div class='add'>+	 *  response to query of RNDIS_OID_802_11_BSSID_LIST."</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * NOTE: Seems to be true for BCM4320b variant, but not BCM4320a.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -3095,15 +3061,15 @@ static void rndis_wlan_indication(struct usbnet *usbdev, void *ind, int buflen)</div><div class='ctx'> 	struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev);</div><div class='ctx'> 	struct rndis_indicate *msg = ind;</div><div class='ctx'> </div><div class='del'>-	switch (msg-&gt;status) {</div><div class='add'>+	switch (le32_to_cpu(msg-&gt;status)) {</div><div class='ctx'> 	case RNDIS_STATUS_MEDIA_CONNECT:</div><div class='del'>-		if (priv-&gt;current_command_oid == OID_802_11_ADD_KEY) {</div><div class='del'>-			/* OID_802_11_ADD_KEY causes sometimes extra</div><div class='add'>+		if (priv-&gt;current_command_oid == RNDIS_OID_802_11_ADD_KEY) {</div><div class='add'>+			/* RNDIS_OID_802_11_ADD_KEY causes sometimes extra</div><div class='ctx'> 			 * "media connect" indications which confuses driver</div><div class='ctx'> 			 * and userspace to think that device is</div><div class='ctx'> 			 * roaming/reassociating when it isn't.</div><div class='ctx'> 			 */</div><div class='del'>-			netdev_dbg(usbdev-&gt;net, "ignored OID_802_11_ADD_KEY triggered 'media connect'\n");</div><div class='add'>+			netdev_dbg(usbdev-&gt;net, "ignored RNDIS_OID_802_11_ADD_KEY triggered 'media connect'\n");</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -3148,8 +3114,9 @@ static int rndis_wlan_get_caps(struct usbnet *usbdev, struct wiphy *wiphy)</div><div class='ctx'> </div><div class='ctx'> 	/* determine supported modes */</div><div class='ctx'> 	len = sizeof(networks_supported);</div><div class='del'>-	retval = rndis_query_oid(usbdev, OID_802_11_NETWORK_TYPES_SUPPORTED,</div><div class='del'>-						&amp;networks_supported, &amp;len);</div><div class='add'>+	retval = rndis_query_oid(usbdev,</div><div class='add'>+				 RNDIS_OID_802_11_NETWORK_TYPES_SUPPORTED,</div><div class='add'>+				 &amp;networks_supported, &amp;len);</div><div class='ctx'> 	if (retval &gt;= 0) {</div><div class='ctx'> 		n = le32_to_cpu(networks_supported.num_items);</div><div class='ctx'> 		if (n &gt; 8)</div><div class='hunk'>@@ -3173,9 +3140,11 @@ static int rndis_wlan_get_caps(struct usbnet *usbdev, struct wiphy *wiphy)</div><div class='ctx'> 	/* get device 802.11 capabilities, number of PMKIDs */</div><div class='ctx'> 	caps = (struct ndis_80211_capability *)caps_buf;</div><div class='ctx'> 	len = sizeof(caps_buf);</div><div class='del'>-	retval = rndis_query_oid(usbdev, OID_802_11_CAPABILITY, caps, &amp;len);</div><div class='add'>+	retval = rndis_query_oid(usbdev,</div><div class='add'>+				 RNDIS_OID_802_11_CAPABILITY,</div><div class='add'>+				 caps, &amp;len);</div><div class='ctx'> 	if (retval &gt;= 0) {</div><div class='del'>-		netdev_dbg(usbdev-&gt;net, "OID_802_11_CAPABILITY -&gt; len %d, "</div><div class='add'>+		netdev_dbg(usbdev-&gt;net, "RNDIS_OID_802_11_CAPABILITY -&gt; len %d, "</div><div class='ctx'> 				"ver %d, pmkids %d, auth-encr-pairs %d\n",</div><div class='ctx'> 				le32_to_cpu(caps-&gt;length),</div><div class='ctx'> 				le32_to_cpu(caps-&gt;version),</div><div class='hunk'>@@ -3247,13 +3216,14 @@ static void rndis_device_poller(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	len = sizeof(rssi);</div><div class='del'>-	ret = rndis_query_oid(usbdev, OID_802_11_RSSI, &amp;rssi, &amp;len);</div><div class='add'>+	ret = rndis_query_oid(usbdev, RNDIS_OID_802_11_RSSI,</div><div class='add'>+			      &amp;rssi, &amp;len);</div><div class='ctx'> 	if (ret == 0) {</div><div class='ctx'> 		priv-&gt;last_qual = level_to_qual(le32_to_cpu(rssi));</div><div class='ctx'> 		rndis_do_cqm(usbdev, le32_to_cpu(rssi));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(usbdev-&gt;net, "dev-poller: OID_802_11_RSSI -&gt; %d, rssi:%d, qual: %d\n",</div><div class='add'>+	netdev_dbg(usbdev-&gt;net, "dev-poller: RNDIS_OID_802_11_RSSI -&gt; %d, rssi:%d, qual: %d\n",</div><div class='ctx'> 		   ret, le32_to_cpu(rssi), level_to_qual(le32_to_cpu(rssi)));</div><div class='ctx'> </div><div class='ctx'> 	/* Workaround transfer stalls on poor quality links.</div><div class='hunk'>@@ -3275,15 +3245,18 @@ static void rndis_device_poller(struct work_struct *work)</div><div class='ctx'> 		 * working.</div><div class='ctx'> 		 */</div><div class='ctx'> 		tmp = cpu_to_le32(1);</div><div class='del'>-		rndis_set_oid(usbdev, OID_802_11_BSSID_LIST_SCAN, &amp;tmp,</div><div class='del'>-								sizeof(tmp));</div><div class='add'>+		rndis_set_oid(usbdev,</div><div class='add'>+			      RNDIS_OID_802_11_BSSID_LIST_SCAN,</div><div class='add'>+			      &amp;tmp, sizeof(tmp));</div><div class='ctx'> </div><div class='ctx'> 		len = CONTROL_BUFFER_SIZE;</div><div class='ctx'> 		buf = kmalloc(len, GFP_KERNEL);</div><div class='ctx'> 		if (!buf)</div><div class='ctx'> 			goto end;</div><div class='ctx'> </div><div class='del'>-		rndis_query_oid(usbdev, OID_802_11_BSSID_LIST, buf, &amp;len);</div><div class='add'>+		rndis_query_oid(usbdev,</div><div class='add'>+				RNDIS_OID_802_11_BSSID_LIST,</div><div class='add'>+				buf, &amp;len);</div><div class='ctx'> 		kfree(buf);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3465,13 +3438,15 @@ static int rndis_wlan_bind(struct usbnet *usbdev, struct usb_interface *intf)</div><div class='ctx'> 	 */</div><div class='ctx'> 	usbdev-&gt;net-&gt;netdev_ops = &amp;rndis_wlan_netdev_ops;</div><div class='ctx'> </div><div class='del'>-	tmp = RNDIS_PACKET_TYPE_DIRECTED | RNDIS_PACKET_TYPE_BROADCAST;</div><div class='del'>-	retval = rndis_set_oid(usbdev, OID_GEN_CURRENT_PACKET_FILTER, &amp;tmp,</div><div class='del'>-								sizeof(tmp));</div><div class='add'>+	tmp = cpu_to_le32(RNDIS_PACKET_TYPE_DIRECTED | RNDIS_PACKET_TYPE_BROADCAST);</div><div class='add'>+	retval = rndis_set_oid(usbdev,</div><div class='add'>+			       RNDIS_OID_GEN_CURRENT_PACKET_FILTER,</div><div class='add'>+			       &amp;tmp, sizeof(tmp));</div><div class='ctx'> </div><div class='ctx'> 	len = sizeof(tmp);</div><div class='del'>-	retval = rndis_query_oid(usbdev, OID_802_3_MAXIMUM_LIST_SIZE, &amp;tmp,</div><div class='del'>-								&amp;len);</div><div class='add'>+	retval = rndis_query_oid(usbdev,</div><div class='add'>+				 RNDIS_OID_802_3_MAXIMUM_LIST_SIZE,</div><div class='add'>+				 &amp;tmp, &amp;len);</div><div class='ctx'> 	priv-&gt;multicast_size = le32_to_cpu(tmp);</div><div class='ctx'> 	if (retval &lt; 0 || priv-&gt;multicast_size &lt; 0)</div><div class='ctx'> 		priv-&gt;multicast_size = 0;</div><div class='hunk'>@@ -3601,7 +3576,7 @@ static int rndis_wlan_stop(struct usbnet *usbdev)</div><div class='ctx'> 	/* Set current packet filter zero to block receiving data packets from</div><div class='ctx'> 	   device. */</div><div class='ctx'> 	filter = 0;</div><div class='del'>-	rndis_set_oid(usbdev, OID_GEN_CURRENT_PACKET_FILTER, &amp;filter,</div><div class='add'>+	rndis_set_oid(usbdev, RNDIS_OID_GEN_CURRENT_PACKET_FILTER, &amp;filter,</div><div class='ctx'> 								sizeof(filter));</div><div class='ctx'> </div><div class='ctx'> 	return retval;</div><div class='hunk'>@@ -3776,6 +3751,7 @@ static struct usb_driver rndis_wlan_driver = {</div><div class='ctx'> 	.disconnect =	usbnet_disconnect,</div><div class='ctx'> 	.suspend =	usbnet_suspend,</div><div class='ctx'> 	.resume =	usbnet_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(rndis_wlan_driver);</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c<br/>index 3a6b40239bc1..5e6b50143165 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2400pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2400pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2400pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2400pci.c</a></div><div class='hunk'>@@ -1828,15 +1828,4 @@ static struct pci_driver rt2400pci_driver = {</div><div class='ctx'> 	.resume		= rt2x00pci_resume,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init rt2400pci_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;rt2400pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit rt2400pci_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;rt2400pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(rt2400pci_init);</div><div class='del'>-module_exit(rt2400pci_exit);</div><div class='add'>+module_pci_driver(rt2400pci_driver);</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c<br/>index dcc0e1fcca77..136b849f11b5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2500pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2500pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2500pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2500pci.c</a></div><div class='hunk'>@@ -2119,15 +2119,4 @@ static struct pci_driver rt2500pci_driver = {</div><div class='ctx'> 	.resume		= rt2x00pci_resume,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init rt2500pci_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;rt2500pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit rt2500pci_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;rt2500pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(rt2500pci_init);</div><div class='del'>-module_exit(rt2500pci_exit);</div><div class='add'>+module_pci_driver(rt2500pci_driver);</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c<br/>index 1de9c752c88b..669aecdb411d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2500usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2500usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2500usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2500usb.c</a></div><div class='hunk'>@@ -1912,7 +1912,7 @@ static struct usb_device_id rt2500usb_device_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x0b05, 0x1706) },</div><div class='ctx'> 	{ USB_DEVICE(0x0b05, 0x1707) },</div><div class='ctx'> 	/* Belkin */</div><div class='del'>-	{ USB_DEVICE(0x050d, 0x7050) },</div><div class='add'>+	{ USB_DEVICE(0x050d, 0x7050) },	/* FCC ID: K7SF5D7050A ver. 2.x */</div><div class='ctx'> 	{ USB_DEVICE(0x050d, 0x7051) },</div><div class='ctx'> 	/* Cisco Systems */</div><div class='ctx'> 	{ USB_DEVICE(0x13b1, 0x000d) },</div><div class='hunk'>@@ -1980,6 +1980,7 @@ static struct usb_driver rt2500usb_driver = {</div><div class='ctx'> 	.disconnect	= rt2x00usb_disconnect,</div><div class='ctx'> 	.suspend	= rt2x00usb_suspend,</div><div class='ctx'> 	.resume		= rt2x00usb_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(rt2500usb_driver);</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h<br/>index 063bfa8b91f4..9348521e0832 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2800.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2800.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2800.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2800.h</a></div><div class='hunk'>@@ -83,6 +83,7 @@</div><div class='ctx'> #define REV_RT3090E			0x0211</div><div class='ctx'> #define REV_RT3390E			0x0211</div><div class='ctx'> #define REV_RT5390F			0x0502</div><div class='add'>+#define REV_RT5390R			0x1502</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Signal information.</div><div class='hunk'>@@ -98,9 +99,11 @@</div><div class='ctx'> #define EEPROM_BASE			0x0000</div><div class='ctx'> #define EEPROM_SIZE			0x0110</div><div class='ctx'> #define BBP_BASE			0x0000</div><div class='del'>-#define BBP_SIZE			0x0080</div><div class='add'>+#define BBP_SIZE			0x00ff</div><div class='ctx'> #define RF_BASE				0x0004</div><div class='ctx'> #define RF_SIZE				0x0010</div><div class='add'>+#define RFCSR_BASE			0x0000</div><div class='add'>+#define RFCSR_SIZE			0x0040</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Number of TX queues.</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c<br/>index 6c0a12ea6a15..dfc90d34be6d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2800lib.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2800lib.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2800lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2800lib.c</a></div><div class='hunk'>@@ -290,11 +290,25 @@ int rt2800_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> 		msleep(10);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ERROR(rt2x00dev, "WPDMA TX/RX busy, aborting.\n");</div><div class='add'>+	ERROR(rt2x00dev, "WPDMA TX/RX busy [0x%08x].\n", reg);</div><div class='ctx'> 	return -EACCES;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(rt2800_wait_wpdma_ready);</div><div class='ctx'> </div><div class='add'>+void rt2800_disable_wpdma(struct rt2x00_dev *rt2x00dev)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &amp;reg);</div><div class='add'>+	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);</div><div class='add'>+	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);</div><div class='add'>+	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);</div><div class='add'>+	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);</div><div class='add'>+	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);</div><div class='add'>+	rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(rt2800_disable_wpdma);</div><div class='add'>+</div><div class='ctx'> static bool rt2800_check_firmware_crc(const u8 *data, const size_t len)</div><div class='ctx'> {</div><div class='ctx'> 	u16 fw_crc;</div><div class='hunk'>@@ -412,6 +426,8 @@ int rt2800_load_firmware(struct rt2x00_dev *rt2x00dev,</div><div class='ctx'> 		rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000002);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	rt2800_disable_wpdma(rt2x00dev);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Write firmware to the device.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -436,10 +452,7 @@ int rt2800_load_firmware(struct rt2x00_dev *rt2x00dev,</div><div class='ctx'> 	 * Disable DMA, will be reenabled later when enabling</div><div class='ctx'> 	 * the radio.</div><div class='ctx'> 	 */</div><div class='del'>-	rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &amp;reg);</div><div class='del'>-	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);</div><div class='del'>-	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);</div><div class='del'>-	rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);</div><div class='add'>+	rt2800_disable_wpdma(rt2x00dev);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize firmware.</div><div class='hunk'>@@ -823,6 +836,13 @@ const struct rt2x00debug rt2800_rt2x00debug = {</div><div class='ctx'> 		.word_size	= sizeof(u32),</div><div class='ctx'> 		.word_count	= RF_SIZE / sizeof(u32),</div><div class='ctx'> 	},</div><div class='add'>+	.rfcsr	= {</div><div class='add'>+		.read		= rt2800_rfcsr_read,</div><div class='add'>+		.write		= rt2800_rfcsr_write,</div><div class='add'>+		.word_base	= RFCSR_BASE,</div><div class='add'>+		.word_size	= sizeof(u8),</div><div class='add'>+		.word_count	= RFCSR_SIZE / sizeof(u8),</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL_GPL(rt2800_rt2x00debug);</div><div class='ctx'> #endif /* CONFIG_RT2X00_LIB_DEBUGFS */</div><div class='hunk'>@@ -2717,13 +2737,7 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &amp;reg);</div><div class='del'>-	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);</div><div class='del'>-	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);</div><div class='del'>-	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);</div><div class='del'>-	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);</div><div class='del'>-	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);</div><div class='del'>-	rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);</div><div class='add'>+	rt2800_disable_wpdma(rt2x00dev);</div><div class='ctx'> </div><div class='ctx'> 	ret = rt2800_drv_init_registers(rt2x00dev);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -3349,6 +3363,13 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> 			rt2800_register_write(rt2x00dev, GPIO_CTRL_CFG, reg);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		/* This chip has hardware antenna diversity*/</div><div class='add'>+		if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390R)) {</div><div class='add'>+			rt2800_bbp_write(rt2x00dev, 150, 0); /* Disable Antenna Software OFDM */</div><div class='add'>+			rt2800_bbp_write(rt2x00dev, 151, 0); /* Disable Antenna Software CCK */</div><div class='add'>+			rt2800_bbp_write(rt2x00dev, 154, 0); /* Clear previously selected antenna */</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		rt2800_bbp_read(rt2x00dev, 152, &amp;value);</div><div class='ctx'> 		if (ant == 0)</div><div class='ctx'> 			rt2x00_set_field8(&amp;value, BBP152_RX_DEFAULT_ANT, 1);</div><div class='hunk'>@@ -3997,10 +4018,7 @@ void rt2800_disable_radio(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> {</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='del'>-	rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &amp;reg);</div><div class='del'>-	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);</div><div class='del'>-	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);</div><div class='del'>-	rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);</div><div class='add'>+	rt2800_disable_wpdma(rt2x00dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for DMA, ignore error */</div><div class='ctx'> 	rt2800_wait_wpdma_ready(rt2x00dev);</div><div class='hunk'>@@ -4287,6 +4305,11 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> 		rt2x00dev-&gt;default_ant.rx = ANTENNA_A;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390R)) {</div><div class='add'>+		rt2x00dev-&gt;default_ant.tx = ANTENNA_HW_DIVERSITY; /* Unused */</div><div class='add'>+		rt2x00dev-&gt;default_ant.rx = ANTENNA_HW_DIVERSITY; /* Unused */</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Determine external LNA informations.</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2800lib.h b/drivers/net/wireless/rt2x00/rt2800lib.h<br/>index 419e36cb06be..18a0b67b4c68 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2800lib.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2800lib.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2800lib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2800lib.h</a></div><div class='hunk'>@@ -208,5 +208,6 @@ int rt2800_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,</div><div class='ctx'> 			u8 buf_size);</div><div class='ctx'> int rt2800_get_survey(struct ieee80211_hw *hw, int idx,</div><div class='ctx'> 		      struct survey_info *survey);</div><div class='add'>+void rt2800_disable_wpdma(struct rt2x00_dev *rt2x00dev);</div><div class='ctx'> </div><div class='ctx'> #endif /* RT2800LIB_H */</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c<br/>index 0397bbf0ce01..cad25bfebd7a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2800pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2800pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2800pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2800pci.c</a></div><div class='hunk'>@@ -361,7 +361,6 @@ static void rt2800pci_clear_entry(struct queue_entry *entry)</div><div class='ctx'> static int rt2800pci_init_queues(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct queue_entry_priv_pci *entry_priv;</div><div class='del'>-	u32 reg;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize registers.</div><div class='hunk'>@@ -394,6 +393,16 @@ static int rt2800pci_init_queues(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> 	rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX3, 0);</div><div class='ctx'> 	rt2x00pci_register_write(rt2x00dev, TX_DTX_IDX3, 0);</div><div class='ctx'> </div><div class='add'>+	rt2x00pci_register_write(rt2x00dev, TX_BASE_PTR4, 0);</div><div class='add'>+	rt2x00pci_register_write(rt2x00dev, TX_MAX_CNT4, 0);</div><div class='add'>+	rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX4, 0);</div><div class='add'>+	rt2x00pci_register_write(rt2x00dev, TX_DTX_IDX4, 0);</div><div class='add'>+</div><div class='add'>+	rt2x00pci_register_write(rt2x00dev, TX_BASE_PTR5, 0);</div><div class='add'>+	rt2x00pci_register_write(rt2x00dev, TX_MAX_CNT5, 0);</div><div class='add'>+	rt2x00pci_register_write(rt2x00dev, TX_CTX_IDX5, 0);</div><div class='add'>+	rt2x00pci_register_write(rt2x00dev, TX_DTX_IDX5, 0);</div><div class='add'>+</div><div class='ctx'> 	entry_priv = rt2x00dev-&gt;rx-&gt;entries[0].priv_data;</div><div class='ctx'> 	rt2x00pci_register_write(rt2x00dev, RX_BASE_PTR, entry_priv-&gt;desc_dma);</div><div class='ctx'> 	rt2x00pci_register_write(rt2x00dev, RX_MAX_CNT,</div><div class='hunk'>@@ -402,14 +411,7 @@ static int rt2800pci_init_queues(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> 				 rt2x00dev-&gt;rx[0].limit - 1);</div><div class='ctx'> 	rt2x00pci_register_write(rt2x00dev, RX_DRX_IDX, 0);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Enable global DMA configuration</div><div class='del'>-	 */</div><div class='del'>-	rt2x00pci_register_read(rt2x00dev, WPDMA_GLO_CFG, &amp;reg);</div><div class='del'>-	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);</div><div class='del'>-	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);</div><div class='del'>-	rt2x00_set_field32(&amp;reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);</div><div class='del'>-	rt2x00pci_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);</div><div class='add'>+	rt2800_disable_wpdma(rt2x00dev);</div><div class='ctx'> </div><div class='ctx'> 	rt2x00pci_register_write(rt2x00dev, DELAY_INT_CFG, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -504,8 +506,10 @@ static int rt2800pci_enable_radio(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> {</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(rt2800_wait_wpdma_ready(rt2x00dev) ||</div><div class='del'>-		     rt2800pci_init_queues(rt2x00dev)))</div><div class='add'>+	/* Wait for DMA, ignore error until we initialize queues. */</div><div class='add'>+	rt2800_wait_wpdma_ready(rt2x00dev);</div><div class='add'>+</div><div class='add'>+	if (unlikely(rt2800pci_init_queues(rt2x00dev)))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	retval = rt2800_enable_radio(rt2x00dev);</div><div class='hunk'>@@ -1184,8 +1188,11 @@ static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = {</div><div class='ctx'> 	{ PCI_DEVICE(0x1814, 0x3593) },</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_RT2800PCI_RT53XX</div><div class='add'>+	{ PCI_DEVICE(0x1814, 0x5362) },</div><div class='ctx'> 	{ PCI_DEVICE(0x1814, 0x5390) },</div><div class='add'>+	{ PCI_DEVICE(0x1814, 0x5392) },</div><div class='ctx'> 	{ PCI_DEVICE(0x1814, 0x539a) },</div><div class='add'>+	{ PCI_DEVICE(0x1814, 0x539b) },</div><div class='ctx'> 	{ PCI_DEVICE(0x1814, 0x539f) },</div><div class='ctx'> #endif</div><div class='ctx'> 	{ 0, }</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c<br/>index 001735f7a661..bf78317a6adb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2800usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2800usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2800usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2800usb.c</a></div><div class='hunk'>@@ -922,6 +922,7 @@ static struct usb_device_id rt2800usb_device_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x1482, 0x3c09) },</div><div class='ctx'> 	/* AirTies */</div><div class='ctx'> 	{ USB_DEVICE(0x1eda, 0x2012) },</div><div class='add'>+	{ USB_DEVICE(0x1eda, 0x2210) },</div><div class='ctx'> 	{ USB_DEVICE(0x1eda, 0x2310) },</div><div class='ctx'> 	/* Allwin */</div><div class='ctx'> 	{ USB_DEVICE(0x8516, 0x2070) },</div><div class='hunk'>@@ -991,6 +992,7 @@ static struct usb_device_id rt2800usb_device_table[] = {</div><div class='ctx'> 	/* DVICO */</div><div class='ctx'> 	{ USB_DEVICE(0x0fe9, 0xb307) },</div><div class='ctx'> 	/* Edimax */</div><div class='add'>+	{ USB_DEVICE(0x7392, 0x4085) },</div><div class='ctx'> 	{ USB_DEVICE(0x7392, 0x7711) },</div><div class='ctx'> 	{ USB_DEVICE(0x7392, 0x7717) },</div><div class='ctx'> 	{ USB_DEVICE(0x7392, 0x7718) },</div><div class='hunk'>@@ -1066,6 +1068,7 @@ static struct usb_device_id rt2800usb_device_table[] = {</div><div class='ctx'> 	/* Philips */</div><div class='ctx'> 	{ USB_DEVICE(0x0471, 0x200f) },</div><div class='ctx'> 	/* Planex */</div><div class='add'>+	{ USB_DEVICE(0x2019, 0x5201) },</div><div class='ctx'> 	{ USB_DEVICE(0x2019, 0xab25) },</div><div class='ctx'> 	{ USB_DEVICE(0x2019, 0xed06) },</div><div class='ctx'> 	/* Quanta */</div><div class='hunk'>@@ -1134,6 +1137,10 @@ static struct usb_device_id rt2800usb_device_table[] = {</div><div class='ctx'> #ifdef CONFIG_RT2800USB_RT33XX</div><div class='ctx'> 	/* Belkin */</div><div class='ctx'> 	{ USB_DEVICE(0x050d, 0x945b) },</div><div class='add'>+	/* Panasonic */</div><div class='add'>+	{ USB_DEVICE(0x083a, 0xb511) },</div><div class='add'>+	/* Philips */</div><div class='add'>+	{ USB_DEVICE(0x0471, 0x20dd) },</div><div class='ctx'> 	/* Ralink */</div><div class='ctx'> 	{ USB_DEVICE(0x148f, 0x3370) },</div><div class='ctx'> 	{ USB_DEVICE(0x148f, 0x8070) },</div><div class='hunk'>@@ -1145,6 +1152,8 @@ static struct usb_device_id rt2800usb_device_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x8516, 0x3572) },</div><div class='ctx'> 	/* Askey */</div><div class='ctx'> 	{ USB_DEVICE(0x1690, 0x0744) },</div><div class='add'>+	{ USB_DEVICE(0x1690, 0x0761) },</div><div class='add'>+	{ USB_DEVICE(0x1690, 0x0764) },</div><div class='ctx'> 	/* Cisco */</div><div class='ctx'> 	{ USB_DEVICE(0x167b, 0x4001) },</div><div class='ctx'> 	/* EnGenius */</div><div class='hunk'>@@ -1159,20 +1168,25 @@ static struct usb_device_id rt2800usb_device_table[] = {</div><div class='ctx'> 	/* Sitecom */</div><div class='ctx'> 	{ USB_DEVICE(0x0df6, 0x0041) },</div><div class='ctx'> 	{ USB_DEVICE(0x0df6, 0x0062) },</div><div class='add'>+	{ USB_DEVICE(0x0df6, 0x0065) },</div><div class='add'>+	{ USB_DEVICE(0x0df6, 0x0066) },</div><div class='add'>+	{ USB_DEVICE(0x0df6, 0x0068) },</div><div class='ctx'> 	/* Toshiba */</div><div class='ctx'> 	{ USB_DEVICE(0x0930, 0x0a07) },</div><div class='ctx'> 	/* Zinwell */</div><div class='ctx'> 	{ USB_DEVICE(0x5a57, 0x0284) },</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_RT2800USB_RT53XX</div><div class='del'>-	/* Alpha */</div><div class='del'>-	{ USB_DEVICE(0x2001, 0x3c15) },</div><div class='del'>-	{ USB_DEVICE(0x2001, 0x3c19) },</div><div class='ctx'> 	/* Arcadyan */</div><div class='ctx'> 	{ USB_DEVICE(0x043e, 0x7a12) },</div><div class='ctx'> 	/* Azurewave */</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3329) },</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3365) },</div><div class='add'>+	/* D-Link */</div><div class='add'>+	{ USB_DEVICE(0x2001, 0x3c15) },</div><div class='add'>+	{ USB_DEVICE(0x2001, 0x3c19) },</div><div class='add'>+	{ USB_DEVICE(0x2001, 0x3c1c) },</div><div class='add'>+	{ USB_DEVICE(0x2001, 0x3c1d) },</div><div class='ctx'> 	/* LG innotek */</div><div class='ctx'> 	{ USB_DEVICE(0x043e, 0x7a22) },</div><div class='ctx'> 	/* Panasonic */</div><div class='hunk'>@@ -1224,12 +1238,8 @@ static struct usb_device_id rt2800usb_device_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x07d1, 0x3c0b) },</div><div class='ctx'> 	{ USB_DEVICE(0x07d1, 0x3c17) },</div><div class='ctx'> 	{ USB_DEVICE(0x2001, 0x3c17) },</div><div class='del'>-	/* Edimax */</div><div class='del'>-	{ USB_DEVICE(0x7392, 0x4085) },</div><div class='ctx'> 	/* Encore */</div><div class='ctx'> 	{ USB_DEVICE(0x203d, 0x14a1) },</div><div class='del'>-	/* Fujitsu Stylistic 550 */</div><div class='del'>-	{ USB_DEVICE(0x1690, 0x0761) },</div><div class='ctx'> 	/* Gemtek */</div><div class='ctx'> 	{ USB_DEVICE(0x15a9, 0x0010) },</div><div class='ctx'> 	/* Gigabyte */</div><div class='hunk'>@@ -1250,7 +1260,6 @@ static struct usb_device_id rt2800usb_device_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x05a6, 0x0101) },</div><div class='ctx'> 	{ USB_DEVICE(0x1d4d, 0x0010) },</div><div class='ctx'> 	/* Planex */</div><div class='del'>-	{ USB_DEVICE(0x2019, 0x5201) },</div><div class='ctx'> 	{ USB_DEVICE(0x2019, 0xab24) },</div><div class='ctx'> 	/* Qcom */</div><div class='ctx'> 	{ USB_DEVICE(0x18e8, 0x6259) },</div><div class='hunk'>@@ -1293,6 +1302,7 @@ static struct usb_driver rt2800usb_driver = {</div><div class='ctx'> 	.disconnect	= rt2x00usb_disconnect,</div><div class='ctx'> 	.suspend	= rt2x00usb_suspend,</div><div class='ctx'> 	.resume		= rt2x00usb_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(rt2800usb_driver);</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h<br/>index 471f87cab4ab..ca36cccaba31 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2x00.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00.h</a></div><div class='hunk'>@@ -692,6 +692,8 @@ enum rt2x00_state_flags {</div><div class='ctx'> 	 */</div><div class='ctx'> 	CONFIG_CHANNEL_HT40,</div><div class='ctx'> 	CONFIG_POWERSAVING,</div><div class='add'>+	CONFIG_HT_DISABLED,</div><div class='add'>+	CONFIG_QOS_DISABLED,</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Mark we currently are sequentially reading TX_STA_FIFO register</div><div class='hunk'>@@ -1280,7 +1282,7 @@ void rt2x00lib_dmadone(struct queue_entry *entry);</div><div class='ctx'> void rt2x00lib_txdone(struct queue_entry *entry,</div><div class='ctx'> 		      struct txdone_entry_desc *txdesc);</div><div class='ctx'> void rt2x00lib_txdone_noinfo(struct queue_entry *entry, u32 status);</div><div class='del'>-void rt2x00lib_rxdone(struct queue_entry *entry);</div><div class='add'>+void rt2x00lib_rxdone(struct queue_entry *entry, gfp_t gfp);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * mac80211 handlers.</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2x00config.c b/drivers/net/wireless/rt2x00/rt2x00config.c<br/>index 293676bfa571..e7361d913e8e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2x00config.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00config.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00config.c</a></div><div class='hunk'>@@ -217,6 +217,11 @@ void rt2x00lib_config(struct rt2x00_dev *rt2x00dev,</div><div class='ctx'> 	libconf.conf = conf;</div><div class='ctx'> </div><div class='ctx'> 	if (ieee80211_flags &amp; IEEE80211_CONF_CHANGE_CHANNEL) {</div><div class='add'>+		if (!conf_is_ht(conf))</div><div class='add'>+			set_bit(CONFIG_HT_DISABLED, &amp;rt2x00dev-&gt;flags);</div><div class='add'>+		else</div><div class='add'>+			clear_bit(CONFIG_HT_DISABLED, &amp;rt2x00dev-&gt;flags);</div><div class='add'>+</div><div class='ctx'> 		if (conf_is_ht40(conf)) {</div><div class='ctx'> 			set_bit(CONFIG_CHANNEL_HT40, &amp;rt2x00dev-&gt;flags);</div><div class='ctx'> 			hw_value = rt2x00ht_center_channel(rt2x00dev, conf);</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.c b/drivers/net/wireless/rt2x00/rt2x00debug.c<br/>index 78787fcc919e..3bb8cafbac59 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00debug.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2x00debug.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00debug.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00debug.c</a></div><div class='hunk'>@@ -70,6 +70,7 @@ struct rt2x00debug_intf {</div><div class='ctx'> 	 *     - eeprom offset/value files</div><div class='ctx'> 	 *     - bbp offset/value files</div><div class='ctx'> 	 *     - rf offset/value files</div><div class='add'>+	 *     - rfcsr offset/value files</div><div class='ctx'> 	 *   - queue folder</div><div class='ctx'> 	 *     - frame dump file</div><div class='ctx'> 	 *     - queue stats file</div><div class='hunk'>@@ -89,6 +90,8 @@ struct rt2x00debug_intf {</div><div class='ctx'> 	struct dentry *bbp_val_entry;</div><div class='ctx'> 	struct dentry *rf_off_entry;</div><div class='ctx'> 	struct dentry *rf_val_entry;</div><div class='add'>+	struct dentry *rfcsr_off_entry;</div><div class='add'>+	struct dentry *rfcsr_val_entry;</div><div class='ctx'> 	struct dentry *queue_folder;</div><div class='ctx'> 	struct dentry *queue_frame_dump_entry;</div><div class='ctx'> 	struct dentry *queue_stats_entry;</div><div class='hunk'>@@ -131,6 +134,7 @@ struct rt2x00debug_intf {</div><div class='ctx'> 	unsigned int offset_eeprom;</div><div class='ctx'> 	unsigned int offset_bbp;</div><div class='ctx'> 	unsigned int offset_rf;</div><div class='add'>+	unsigned int offset_rfcsr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void rt2x00debug_update_crypto(struct rt2x00_dev *rt2x00dev,</div><div class='hunk'>@@ -525,6 +529,7 @@ RT2X00DEBUGFS_OPS(csr, "0x%.8x\n", u32);</div><div class='ctx'> RT2X00DEBUGFS_OPS(eeprom, "0x%.4x\n", u16);</div><div class='ctx'> RT2X00DEBUGFS_OPS(bbp, "0x%.2x\n", u8);</div><div class='ctx'> RT2X00DEBUGFS_OPS(rf, "0x%.8x\n", u32);</div><div class='add'>+RT2X00DEBUGFS_OPS(rfcsr, "0x%.2x\n", u8);</div><div class='ctx'> </div><div class='ctx'> static ssize_t rt2x00debug_read_dev_flags(struct file *file,</div><div class='ctx'> 					  char __user *buf,</div><div class='hunk'>@@ -614,7 +619,7 @@ static struct dentry *rt2x00debug_create_file_chipset(const char *name,</div><div class='ctx'> 	const struct rt2x00debug *debug = intf-&gt;debug;</div><div class='ctx'> 	char *data;</div><div class='ctx'> </div><div class='del'>-	data = kzalloc(8 * MAX_LINE_LENGTH, GFP_KERNEL);</div><div class='add'>+	data = kzalloc(9 * MAX_LINE_LENGTH, GFP_KERNEL);</div><div class='ctx'> 	if (!data)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -624,22 +629,22 @@ static struct dentry *rt2x00debug_create_file_chipset(const char *name,</div><div class='ctx'> 	data += sprintf(data, "revision:\t%04x\n", intf-&gt;rt2x00dev-&gt;chip.rev);</div><div class='ctx'> 	data += sprintf(data, "\n");</div><div class='ctx'> 	data += sprintf(data, "register\tbase\twords\twordsize\n");</div><div class='del'>-	data += sprintf(data, "csr\t%d\t%d\t%d\n",</div><div class='del'>-			debug-&gt;csr.word_base,</div><div class='del'>-			debug-&gt;csr.word_count,</div><div class='del'>-			debug-&gt;csr.word_size);</div><div class='del'>-	data += sprintf(data, "eeprom\t%d\t%d\t%d\n",</div><div class='del'>-			debug-&gt;eeprom.word_base,</div><div class='del'>-			debug-&gt;eeprom.word_count,</div><div class='del'>-			debug-&gt;eeprom.word_size);</div><div class='del'>-	data += sprintf(data, "bbp\t%d\t%d\t%d\n",</div><div class='del'>-			debug-&gt;bbp.word_base,</div><div class='del'>-			debug-&gt;bbp.word_count,</div><div class='del'>-			debug-&gt;bbp.word_size);</div><div class='del'>-	data += sprintf(data, "rf\t%d\t%d\t%d\n",</div><div class='del'>-			debug-&gt;rf.word_base,</div><div class='del'>-			debug-&gt;rf.word_count,</div><div class='del'>-			debug-&gt;rf.word_size);</div><div class='add'>+#define RT2X00DEBUGFS_SPRINTF_REGISTER(__name)			\</div><div class='add'>+{								\</div><div class='add'>+	if(debug-&gt;__name.read)					\</div><div class='add'>+		data += sprintf(data, __stringify(__name)	\</div><div class='add'>+				"\t%d\t%d\t%d\n",		\</div><div class='add'>+				debug-&gt;__name.word_base,	\</div><div class='add'>+				debug-&gt;__name.word_count,	\</div><div class='add'>+				debug-&gt;__name.word_size);	\</div><div class='add'>+}</div><div class='add'>+	RT2X00DEBUGFS_SPRINTF_REGISTER(csr);</div><div class='add'>+	RT2X00DEBUGFS_SPRINTF_REGISTER(eeprom);</div><div class='add'>+	RT2X00DEBUGFS_SPRINTF_REGISTER(bbp);</div><div class='add'>+	RT2X00DEBUGFS_SPRINTF_REGISTER(rf);</div><div class='add'>+	RT2X00DEBUGFS_SPRINTF_REGISTER(rfcsr);</div><div class='add'>+#undef RT2X00DEBUGFS_SPRINTF_REGISTER</div><div class='add'>+</div><div class='ctx'> 	blob-&gt;size = strlen(blob-&gt;data);</div><div class='ctx'> </div><div class='ctx'> 	return debugfs_create_blob(name, S_IRUSR, intf-&gt;driver_folder, blob);</div><div class='hunk'>@@ -694,31 +699,34 @@ void rt2x00debug_register(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> 	if (IS_ERR(intf-&gt;register_folder) || !intf-&gt;register_folder)</div><div class='ctx'> 		goto exit;</div><div class='ctx'> </div><div class='del'>-#define RT2X00DEBUGFS_CREATE_REGISTER_ENTRY(__intf, __name)	\</div><div class='del'>-({								\</div><div class='del'>-	(__intf)-&gt;__name##_off_entry =				\</div><div class='del'>-	    debugfs_create_u32(__stringify(__name) "_offset",	\</div><div class='del'>-			       S_IRUSR | S_IWUSR,		\</div><div class='del'>-			       (__intf)-&gt;register_folder,	\</div><div class='del'>-			       &amp;(__intf)-&gt;offset_##__name);	\</div><div class='del'>-	if (IS_ERR((__intf)-&gt;__name##_off_entry)		\</div><div class='del'>-			|| !(__intf)-&gt;__name##_off_entry)	\</div><div class='del'>-		goto exit;					\</div><div class='del'>-								\</div><div class='del'>-	(__intf)-&gt;__name##_val_entry =				\</div><div class='del'>-	    debugfs_create_file(__stringify(__name) "_value",	\</div><div class='del'>-				S_IRUSR | S_IWUSR,		\</div><div class='del'>-				(__intf)-&gt;register_folder,	\</div><div class='del'>-				(__intf), &amp;rt2x00debug_fop_##__name);\</div><div class='del'>-	if (IS_ERR((__intf)-&gt;__name##_val_entry)		\</div><div class='del'>-			|| !(__intf)-&gt;__name##_val_entry)	\</div><div class='del'>-		goto exit;					\</div><div class='add'>+#define RT2X00DEBUGFS_CREATE_REGISTER_ENTRY(__intf, __name)			\</div><div class='add'>+({										\</div><div class='add'>+	if(debug-&gt;__name.read) {						\</div><div class='add'>+		(__intf)-&gt;__name##_off_entry =					\</div><div class='add'>+		debugfs_create_u32(__stringify(__name) "_offset",		\</div><div class='add'>+				       S_IRUSR | S_IWUSR,			\</div><div class='add'>+				       (__intf)-&gt;register_folder,		\</div><div class='add'>+				       &amp;(__intf)-&gt;offset_##__name);		\</div><div class='add'>+		if (IS_ERR((__intf)-&gt;__name##_off_entry)			\</div><div class='add'>+				|| !(__intf)-&gt;__name##_off_entry)		\</div><div class='add'>+			goto exit;						\</div><div class='add'>+										\</div><div class='add'>+		(__intf)-&gt;__name##_val_entry =					\</div><div class='add'>+		debugfs_create_file(__stringify(__name) "_value",		\</div><div class='add'>+					S_IRUSR | S_IWUSR,			\</div><div class='add'>+					(__intf)-&gt;register_folder,		\</div><div class='add'>+					(__intf), &amp;rt2x00debug_fop_##__name);	\</div><div class='add'>+		if (IS_ERR((__intf)-&gt;__name##_val_entry)			\</div><div class='add'>+				|| !(__intf)-&gt;__name##_val_entry)		\</div><div class='add'>+			goto exit;						\</div><div class='add'>+	}									\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> 	RT2X00DEBUGFS_CREATE_REGISTER_ENTRY(intf, csr);</div><div class='ctx'> 	RT2X00DEBUGFS_CREATE_REGISTER_ENTRY(intf, eeprom);</div><div class='ctx'> 	RT2X00DEBUGFS_CREATE_REGISTER_ENTRY(intf, bbp);</div><div class='ctx'> 	RT2X00DEBUGFS_CREATE_REGISTER_ENTRY(intf, rf);</div><div class='add'>+	RT2X00DEBUGFS_CREATE_REGISTER_ENTRY(intf, rfcsr);</div><div class='ctx'> </div><div class='ctx'> #undef RT2X00DEBUGFS_CREATE_REGISTER_ENTRY</div><div class='ctx'> </div><div class='hunk'>@@ -770,6 +778,8 @@ void rt2x00debug_deregister(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> 	debugfs_remove(intf-&gt;queue_stats_entry);</div><div class='ctx'> 	debugfs_remove(intf-&gt;queue_frame_dump_entry);</div><div class='ctx'> 	debugfs_remove(intf-&gt;queue_folder);</div><div class='add'>+	debugfs_remove(intf-&gt;rfcsr_val_entry);</div><div class='add'>+	debugfs_remove(intf-&gt;rfcsr_off_entry);</div><div class='ctx'> 	debugfs_remove(intf-&gt;rf_val_entry);</div><div class='ctx'> 	debugfs_remove(intf-&gt;rf_off_entry);</div><div class='ctx'> 	debugfs_remove(intf-&gt;bbp_val_entry);</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.h b/drivers/net/wireless/rt2x00/rt2x00debug.h<br/>index fa11409cb5c6..e11d39bdfef7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00debug.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2x00debug.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00debug.h</a></div><div class='hunk'>@@ -65,6 +65,7 @@ struct rt2x00debug {</div><div class='ctx'> 	RT2X00DEBUGFS_REGISTER_ENTRY(eeprom, u16);</div><div class='ctx'> 	RT2X00DEBUGFS_REGISTER_ENTRY(bbp, u8);</div><div class='ctx'> 	RT2X00DEBUGFS_REGISTER_ENTRY(rf, u32);</div><div class='add'>+	RT2X00DEBUGFS_REGISTER_ENTRY(rfcsr, u8);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif /* RT2X00DEBUG_H */</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c<br/>index 90cc5e772650..e5404e576251 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00dev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2x00dev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00dev.c</a></div><div class='hunk'>@@ -391,9 +391,10 @@ void rt2x00lib_txdone(struct queue_entry *entry,</div><div class='ctx'> 		tx_info-&gt;flags |= IEEE80211_TX_STAT_AMPDU;</div><div class='ctx'> 		tx_info-&gt;status.ampdu_len = 1;</div><div class='ctx'> 		tx_info-&gt;status.ampdu_ack_len = success ? 1 : 0;</div><div class='del'>-</div><div class='del'>-		if (!success)</div><div class='del'>-			tx_info-&gt;flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;</div><div class='add'>+		/*</div><div class='add'>+		 * TODO: Need to tear down BA session here</div><div class='add'>+		 * if not successful.</div><div class='add'>+		 */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rate_flags &amp; IEEE80211_TX_RC_USE_RTS_CTS) {</div><div class='hunk'>@@ -587,7 +588,7 @@ static int rt2x00lib_rxdone_read_signal(struct rt2x00_dev *rt2x00dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void rt2x00lib_rxdone(struct queue_entry *entry)</div><div class='add'>+void rt2x00lib_rxdone(struct queue_entry *entry, gfp_t gfp)</div><div class='ctx'> {</div><div class='ctx'> 	struct rt2x00_dev *rt2x00dev = entry-&gt;queue-&gt;rt2x00dev;</div><div class='ctx'> 	struct rxdone_entry_desc rxdesc;</div><div class='hunk'>@@ -607,7 +608,7 @@ void rt2x00lib_rxdone(struct queue_entry *entry)</div><div class='ctx'> 	 * Allocate a new sk_buffer. If no new buffer available, drop the</div><div class='ctx'> 	 * received frame and reuse the existing buffer.</div><div class='ctx'> 	 */</div><div class='del'>-	skb = rt2x00queue_alloc_rxskb(entry);</div><div class='add'>+	skb = rt2x00queue_alloc_rxskb(entry, gfp);</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		goto submit_entry;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2x00leds.c b/drivers/net/wireless/rt2x00/rt2x00leds.c<br/>index ca585e34d00e..8679d781a264 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00leds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2x00leds.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00leds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00leds.c</a></div><div class='hunk'>@@ -124,17 +124,15 @@ static int rt2x00leds_register_led(struct rt2x00_dev *rt2x00dev,</div><div class='ctx'> </div><div class='ctx'> void rt2x00leds_register(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> {</div><div class='del'>-	char dev_name[16];</div><div class='del'>-	char name[32];</div><div class='add'>+	char name[36];</div><div class='ctx'> 	int retval;</div><div class='ctx'> 	unsigned long on_period;</div><div class='ctx'> 	unsigned long off_period;</div><div class='del'>-</div><div class='del'>-	snprintf(dev_name, sizeof(dev_name), "%s-%s",</div><div class='del'>-		 rt2x00dev-&gt;ops-&gt;name, wiphy_name(rt2x00dev-&gt;hw-&gt;wiphy));</div><div class='add'>+	const char *phy_name = wiphy_name(rt2x00dev-&gt;hw-&gt;wiphy);</div><div class='ctx'> </div><div class='ctx'> 	if (rt2x00dev-&gt;led_radio.flags &amp; LED_INITIALIZED) {</div><div class='del'>-		snprintf(name, sizeof(name), "%s::radio", dev_name);</div><div class='add'>+		snprintf(name, sizeof(name), "%s-%s::radio",</div><div class='add'>+			 rt2x00dev-&gt;ops-&gt;name, phy_name);</div><div class='ctx'> </div><div class='ctx'> 		retval = rt2x00leds_register_led(rt2x00dev,</div><div class='ctx'> 						 &amp;rt2x00dev-&gt;led_radio,</div><div class='hunk'>@@ -144,7 +142,8 @@ void rt2x00leds_register(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rt2x00dev-&gt;led_assoc.flags &amp; LED_INITIALIZED) {</div><div class='del'>-		snprintf(name, sizeof(name), "%s::assoc", dev_name);</div><div class='add'>+		snprintf(name, sizeof(name), "%s-%s::assoc",</div><div class='add'>+			 rt2x00dev-&gt;ops-&gt;name, phy_name);</div><div class='ctx'> </div><div class='ctx'> 		retval = rt2x00leds_register_led(rt2x00dev,</div><div class='ctx'> 						 &amp;rt2x00dev-&gt;led_assoc,</div><div class='hunk'>@@ -154,7 +153,8 @@ void rt2x00leds_register(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rt2x00dev-&gt;led_qual.flags &amp; LED_INITIALIZED) {</div><div class='del'>-		snprintf(name, sizeof(name), "%s::quality", dev_name);</div><div class='add'>+		snprintf(name, sizeof(name), "%s-%s::quality",</div><div class='add'>+			 rt2x00dev-&gt;ops-&gt;name, phy_name);</div><div class='ctx'> </div><div class='ctx'> 		retval = rt2x00leds_register_led(rt2x00dev,</div><div class='ctx'> 						 &amp;rt2x00dev-&gt;led_qual,</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2x00lib.h b/drivers/net/wireless/rt2x00/rt2x00lib.h<br/>index 78bd43b8961f..a0935987fa3a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00lib.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2x00lib.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00lib.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00lib.h</a></div><div class='hunk'>@@ -103,7 +103,7 @@ void rt2x00lib_config(struct rt2x00_dev *rt2x00dev,</div><div class='ctx'>  * rt2x00queue_alloc_rxskb - allocate a skb for RX purposes.</div><div class='ctx'>  * @entry: The entry for which the skb will be applicable.</div><div class='ctx'>  */</div><div class='del'>-struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry);</div><div class='add'>+struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * rt2x00queue_free_skb - free a skb</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c<br/>index 2df2eb6d3e06..b49773ef72f2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00mac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2x00mac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00mac.c</a></div><div class='hunk'>@@ -709,9 +709,19 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,</div><div class='ctx'> 			rt2x00dev-&gt;intf_associated--;</div><div class='ctx'> </div><div class='ctx'> 		rt2x00leds_led_assoc(rt2x00dev, !!rt2x00dev-&gt;intf_associated);</div><div class='add'>+</div><div class='add'>+		clear_bit(CONFIG_QOS_DISABLED, &amp;rt2x00dev-&gt;flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * Check for access point which do not support 802.11e . We have to</div><div class='add'>+	 * generate data frames sequence number in S/W for such AP, because</div><div class='add'>+	 * of H/W bug.</div><div class='add'>+	 */</div><div class='add'>+	if (changes &amp; BSS_CHANGED_QOS &amp;&amp; !bss_conf-&gt;qos)</div><div class='add'>+		set_bit(CONFIG_QOS_DISABLED, &amp;rt2x00dev-&gt;flags);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * When the erp information has changed, we should perform</div><div class='ctx'> 	 * additional configuration steps. For all other changes we are done.</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.c b/drivers/net/wireless/rt2x00/rt2x00pci.c<br/>index 17148bb24426..0a4653a92cab 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2x00pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00pci.c</a></div><div class='hunk'>@@ -92,7 +92,7 @@ bool rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Send the frame to rt2x00lib for further processing.</div><div class='ctx'> 		 */</div><div class='del'>-		rt2x00lib_rxdone(entry);</div><div class='add'>+		rt2x00lib_rxdone(entry, GFP_ATOMIC);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return !max_rx;</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c<br/>index 9b1b2b7a7807..4c662eccf53c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00queue.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2x00queue.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00queue.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00queue.c</a></div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> #include "rt2x00.h"</div><div class='ctx'> #include "rt2x00lib.h"</div><div class='ctx'> </div><div class='del'>-struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry)</div><div class='add'>+struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp)</div><div class='ctx'> {</div><div class='ctx'> 	struct rt2x00_dev *rt2x00dev = entry-&gt;queue-&gt;rt2x00dev;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='hunk'>@@ -68,7 +68,7 @@ struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Allocate skbuffer.</div><div class='ctx'> 	 */</div><div class='del'>-	skb = dev_alloc_skb(frame_size + head_size + tail_size);</div><div class='add'>+	skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp);</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -213,8 +213,19 @@ static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,</div><div class='ctx'> </div><div class='ctx'> 	__set_bit(ENTRY_TXD_GENERATE_SEQ, &amp;txdesc-&gt;flags);</div><div class='ctx'> </div><div class='del'>-	if (!test_bit(REQUIRE_SW_SEQNO, &amp;rt2x00dev-&gt;cap_flags))</div><div class='del'>-		return;</div><div class='add'>+	if (!test_bit(REQUIRE_SW_SEQNO, &amp;rt2x00dev-&gt;cap_flags)) {</div><div class='add'>+		/*</div><div class='add'>+		 * rt2800 has a H/W (or F/W) bug, device incorrectly increase</div><div class='add'>+		 * seqno on retransmited data (non-QOS) frames. To workaround</div><div class='add'>+		 * the problem let's generate seqno in software if QOS is</div><div class='add'>+		 * disabled.</div><div class='add'>+		 */</div><div class='add'>+		if (test_bit(CONFIG_QOS_DISABLED, &amp;rt2x00dev-&gt;flags))</div><div class='add'>+			__clear_bit(ENTRY_TXD_GENERATE_SEQ, &amp;txdesc-&gt;flags);</div><div class='add'>+		else</div><div class='add'>+			/* H/W will generate sequence number */</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The hardware is not able to insert a sequence number. Assign a</div><div class='hunk'>@@ -320,14 +331,6 @@ static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,</div><div class='ctx'> 		txdesc-&gt;u.ht.wcid = sta_priv-&gt;wcid;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	txdesc-&gt;u.ht.ba_size = 7;	/* FIXME: What value is needed? */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Only one STBC stream is supported for now.</div><div class='del'>-	 */</div><div class='del'>-	if (tx_info-&gt;flags &amp; IEEE80211_TX_CTL_STBC)</div><div class='del'>-		txdesc-&gt;u.ht.stbc = 1;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If IEEE80211_TX_RC_MCS is set txrate-&gt;idx just contains the</div><div class='ctx'> 	 * mcs rate to be used</div><div class='hunk'>@@ -351,6 +354,24 @@ static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,</div><div class='ctx'> 			txdesc-&gt;u.ht.mcs |= 0x08;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (test_bit(CONFIG_HT_DISABLED, &amp;rt2x00dev-&gt;flags)) {</div><div class='add'>+		if (!(tx_info-&gt;flags &amp; IEEE80211_TX_CTL_FIRST_FRAGMENT))</div><div class='add'>+			txdesc-&gt;u.ht.txop = TXOP_SIFS;</div><div class='add'>+		else</div><div class='add'>+			txdesc-&gt;u.ht.txop = TXOP_BACKOFF;</div><div class='add'>+</div><div class='add'>+		/* Left zero on all other settings. */</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	txdesc-&gt;u.ht.ba_size = 7;	/* FIXME: What value is needed? */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Only one STBC stream is supported for now.</div><div class='add'>+	 */</div><div class='add'>+	if (tx_info-&gt;flags &amp; IEEE80211_TX_CTL_STBC)</div><div class='add'>+		txdesc-&gt;u.ht.stbc = 1;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This frame is eligible for an AMPDU, however, don't aggregate</div><div class='ctx'> 	 * frames that are intended to probe a specific tx rate.</div><div class='hunk'>@@ -1142,7 +1163,7 @@ static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; queue-&gt;limit; i++) {</div><div class='del'>-		skb = rt2x00queue_alloc_rxskb(&amp;queue-&gt;entries[i]);</div><div class='add'>+		skb = rt2x00queue_alloc_rxskb(&amp;queue-&gt;entries[i], GFP_KERNEL);</div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		queue-&gt;entries[i].skb = skb;</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c<br/>index 66094eb21b61..d357d1ed92f6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt2x00usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt2x00usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt2x00usb.c</a></div><div class='hunk'>@@ -358,7 +358,7 @@ static void rt2x00usb_work_rxdone(struct work_struct *work)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Send the frame to rt2x00lib for further processing.</div><div class='ctx'> 		 */</div><div class='del'>-		rt2x00lib_rxdone(entry);</div><div class='add'>+		rt2x00lib_rxdone(entry, GFP_KERNEL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c<br/>index e0c6d117429d..ee22bd74579d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt61pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt61pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt61pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt61pci.c</a></div><div class='hunk'>@@ -3092,15 +3092,4 @@ static struct pci_driver rt61pci_driver = {</div><div class='ctx'> 	.resume		= rt2x00pci_resume,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init rt61pci_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;rt61pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit rt61pci_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;rt61pci_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(rt61pci_init);</div><div class='del'>-module_exit(rt61pci_exit);</div><div class='add'>+module_pci_driver(rt61pci_driver);</div><div class='head'>diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c<br/>index e477a964081d..77ccbbc7da41 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt73usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rt2x00/rt73usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rt2x00/rt73usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rt2x00/rt73usb.c</a></div><div class='hunk'>@@ -2412,6 +2412,7 @@ static struct usb_device_id rt73usb_device_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(0x0b05, 0x1723) },</div><div class='ctx'> 	{ USB_DEVICE(0x0b05, 0x1724) },</div><div class='ctx'> 	/* Belkin */</div><div class='add'>+	{ USB_DEVICE(0x050d, 0x7050) },	/* FCC ID: K7SF5D7050B ver. 3.x */</div><div class='ctx'> 	{ USB_DEVICE(0x050d, 0x705a) },</div><div class='ctx'> 	{ USB_DEVICE(0x050d, 0x905b) },</div><div class='ctx'> 	{ USB_DEVICE(0x050d, 0x905c) },</div><div class='hunk'>@@ -2526,6 +2527,7 @@ static struct usb_driver rt73usb_driver = {</div><div class='ctx'> 	.disconnect	= rt2x00usb_disconnect,</div><div class='ctx'> 	.suspend	= rt2x00usb_suspend,</div><div class='ctx'> 	.resume		= rt2x00usb_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(rt73usb_driver);</div><div class='head'>diff --git a/drivers/net/wireless/rtl818x/rtl8180/dev.c b/drivers/net/wireless/rtl818x/rtl8180/dev.c<br/>index 2f14a5fb0cbb..2bebcb71a1e9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtl818x/rtl8180/dev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtl818x/rtl8180/dev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtl818x/rtl8180/dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtl818x/rtl8180/dev.c</a></div><div class='hunk'>@@ -1173,15 +1173,4 @@ static struct pci_driver rtl8180_driver = {</div><div class='ctx'> #endif /* CONFIG_PM */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init rtl8180_init(void)</div><div class='del'>-{</div><div class='del'>-	return pci_register_driver(&amp;rtl8180_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit rtl8180_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;rtl8180_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(rtl8180_init);</div><div class='del'>-module_exit(rtl8180_exit);</div><div class='add'>+module_pci_driver(rtl8180_driver);</div><div class='head'>diff --git a/drivers/net/wireless/rtl818x/rtl8187/dev.c b/drivers/net/wireless/rtl818x/rtl8187/dev.c<br/>index cf53ac9d6f23..4fb1ca1b86b9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtl818x/rtl8187/dev.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtl818x/rtl8187/dev.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtl818x/rtl8187/dev.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtl818x/rtl8187/dev.c</a></div><div class='hunk'>@@ -294,6 +294,7 @@ static void rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)</div><div class='ctx'> 		hdr-&gt;retry = cpu_to_le32((info-&gt;control.rates[0].count - 1) &lt;&lt; 8);</div><div class='ctx'> 		hdr-&gt;tx_duration =</div><div class='ctx'> 			ieee80211_generic_frame_duration(dev, priv-&gt;vif,</div><div class='add'>+							 info-&gt;band,</div><div class='ctx'> 							 skb-&gt;len, txrate);</div><div class='ctx'> 		buf = hdr;</div><div class='ctx'> </div><div class='hunk'>@@ -1662,6 +1663,7 @@ static struct usb_driver rtl8187_driver = {</div><div class='ctx'> 	.id_table	= rtl8187_table,</div><div class='ctx'> 	.probe		= rtl8187_probe,</div><div class='ctx'> 	.disconnect	= __devexit_p(rtl8187_disconnect),</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(rtl8187_driver);</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/base.c b/drivers/net/wireless/rtlwifi/base.c<br/>index e54488db0e10..f4c852c6749b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/base.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/base.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/base.c</a></div><div class='hunk'>@@ -1460,7 +1460,7 @@ void rtl_recognize_peer(struct ieee80211_hw *hw, u8 *data, unsigned int len)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* and only beacons from the associated BSSID, please */</div><div class='del'>-	if (compare_ether_addr(hdr-&gt;addr3, rtlpriv-&gt;mac80211.bssid))</div><div class='add'>+	if (!ether_addr_equal(hdr-&gt;addr3, rtlpriv-&gt;mac80211.bssid))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (rtl_find_221_ie(hw, data, len))</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/cam.c b/drivers/net/wireless/rtlwifi/cam.c<br/>index 5c7d57947d23..3d8cc4a0c86d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/cam.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/cam.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/cam.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/cam.c</a></div><div class='hunk'>@@ -328,10 +328,9 @@ void rtl_cam_del_entry(struct ieee80211_hw *hw, u8 *sta_addr)</div><div class='ctx'> 		RT_TRACE(rtlpriv, COMP_SEC, DBG_EMERG, "sta_addr is NULL\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((sta_addr[0]|sta_addr[1]|sta_addr[2]|sta_addr[3]|\</div><div class='del'>-				sta_addr[4]|sta_addr[5]) == 0) {</div><div class='add'>+	if (is_zero_ether_addr(sta_addr)) {</div><div class='ctx'> 		RT_TRACE(rtlpriv, COMP_SEC, DBG_EMERG,</div><div class='del'>-			 "sta_addr is 00:00:00:00:00:00\n");</div><div class='add'>+			 "sta_addr is %pM\n", sta_addr);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Does STA already exist? */</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/pci.c b/drivers/net/wireless/rtlwifi/pci.c<br/>index 288b035a3579..2062ea1d7c80 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/pci.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #include "ps.h"</div><div class='ctx'> #include "efuse.h"</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/kmemleak.h&gt;</div><div class='ctx'> </div><div class='ctx'> static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {</div><div class='ctx'> 	PCI_VENDOR_ID_INTEL,</div><div class='hunk'>@@ -1099,6 +1100,7 @@ static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)</div><div class='ctx'> 			u32 bufferaddress;</div><div class='ctx'> 			if (!skb)</div><div class='ctx'> 				return 0;</div><div class='add'>+			kmemleak_not_leak(skb);</div><div class='ctx'> 			entry = &amp;rtlpci-&gt;rx_ring[rx_queue_idx].desc[i];</div><div class='ctx'> </div><div class='ctx'> 			/*skb-&gt;dev = dev; */</div><div class='hunk'>@@ -1851,14 +1853,6 @@ int __devinit rtl_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	/*like read eeprom and so on */</div><div class='ctx'> 	rtlpriv-&gt;cfg-&gt;ops-&gt;read_eeprom_info(hw);</div><div class='ctx'> </div><div class='del'>-	if (rtlpriv-&gt;cfg-&gt;ops-&gt;init_sw_vars(hw)) {</div><div class='del'>-		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");</div><div class='del'>-		err = -ENODEV;</div><div class='del'>-		goto fail3;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rtlpriv-&gt;cfg-&gt;ops-&gt;init_sw_leds(hw);</div><div class='del'>-</div><div class='ctx'> 	/*aspm */</div><div class='ctx'> 	rtl_pci_init_aspm(hw);</div><div class='ctx'> </div><div class='hunk'>@@ -1877,6 +1871,14 @@ int __devinit rtl_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 		goto fail3;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (rtlpriv-&gt;cfg-&gt;ops-&gt;init_sw_vars(hw)) {</div><div class='add'>+		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto fail3;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rtlpriv-&gt;cfg-&gt;ops-&gt;init_sw_leds(hw);</div><div class='add'>+</div><div class='ctx'> 	err = sysfs_create_group(&amp;pdev-&gt;dev.kobj, &amp;rtl_attribute_group);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,</div><div class='hunk'>@@ -1941,6 +1943,7 @@ void rtl_pci_disconnect(struct pci_dev *pdev)</div><div class='ctx'> 		rtl_deinit_deferred_work(hw);</div><div class='ctx'> 		rtlpriv-&gt;intf_ops-&gt;adapter_stop(hw);</div><div class='ctx'> 	}</div><div class='add'>+	rtlpriv-&gt;cfg-&gt;ops-&gt;disable_interrupt(hw);</div><div class='ctx'> </div><div class='ctx'> 	/*deinit rfkill */</div><div class='ctx'> 	rtl_deinit_rfkill(hw);</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/ps.c b/drivers/net/wireless/rtlwifi/ps.c<br/>index 5b9c3b5e8c92..5ae26647f340 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/ps.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/ps.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/ps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/ps.c</a></div><div class='hunk'>@@ -480,7 +480,7 @@ void rtl_swlps_beacon(struct ieee80211_hw *hw, void *data, unsigned int len)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* and only beacons from the associated BSSID, please */</div><div class='del'>-	if (compare_ether_addr(hdr-&gt;addr3, rtlpriv-&gt;mac80211.bssid))</div><div class='add'>+	if (!ether_addr_equal(hdr-&gt;addr3, rtlpriv-&gt;mac80211.bssid))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	rtlpriv-&gt;psc.last_beacon = jiffies;</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rc.c b/drivers/net/wireless/rtlwifi/rc.c<br/>index c66f08a0524a..d5cbf01da8ac 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rc.c</a></div><div class='hunk'>@@ -225,8 +225,7 @@ static void rtl_rate_init(void *ppriv,</div><div class='ctx'> static void rtl_rate_update(void *ppriv,</div><div class='ctx'> 			    struct ieee80211_supported_band *sband,</div><div class='ctx'> 			    struct ieee80211_sta *sta, void *priv_sta,</div><div class='del'>-			    u32 changed,</div><div class='del'>-			    enum nl80211_channel_type oper_chan_type)</div><div class='add'>+			    u32 changed)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c b/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c<br/>index 1208b753f62f..f7f48c7ac854 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c</a></div><div class='hunk'>@@ -33,9 +33,6 @@</div><div class='ctx'> #include "../pci.h"</div><div class='ctx'> #include "../base.h"</div><div class='ctx'> </div><div class='del'>-struct dig_t dm_digtable;</div><div class='del'>-static struct ps_t dm_pstable;</div><div class='del'>-</div><div class='ctx'> #define BT_RSSI_STATE_NORMAL_POWER	BIT_OFFSET_LEN_MASK_32(0, 1)</div><div class='ctx'> #define BT_RSSI_STATE_AMDPU_OFF		BIT_OFFSET_LEN_MASK_32(1, 1)</div><div class='ctx'> #define BT_RSSI_STATE_SPECIAL_LOW	BIT_OFFSET_LEN_MASK_32(2, 1)</div><div class='hunk'>@@ -163,33 +160,37 @@ static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {</div><div class='ctx'> </div><div class='ctx'> static void rtl92c_dm_diginit(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	dm_digtable.dig_enable_flag = true;</div><div class='del'>-	dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;</div><div class='del'>-	dm_digtable.cur_igvalue = 0x20;</div><div class='del'>-	dm_digtable.pre_igvalue = 0x0;</div><div class='del'>-	dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;</div><div class='del'>-	dm_digtable.presta_connectstate = DIG_STA_DISCONNECT;</div><div class='del'>-	dm_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;</div><div class='del'>-	dm_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;</div><div class='del'>-	dm_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;</div><div class='del'>-	dm_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;</div><div class='del'>-	dm_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;</div><div class='del'>-	dm_digtable.rx_gain_range_max = DM_DIG_MAX;</div><div class='del'>-	dm_digtable.rx_gain_range_min = DM_DIG_MIN;</div><div class='del'>-	dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;</div><div class='del'>-	dm_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;</div><div class='del'>-	dm_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;</div><div class='del'>-	dm_digtable.pre_cck_pd_state = CCK_PD_STAGE_MAX;</div><div class='del'>-	dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;</div><div class='add'>+	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *dm_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='add'>+</div><div class='add'>+	dm_digtable-&gt;dig_enable_flag = true;</div><div class='add'>+	dm_digtable-&gt;dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;</div><div class='add'>+	dm_digtable-&gt;cur_igvalue = 0x20;</div><div class='add'>+	dm_digtable-&gt;pre_igvalue = 0x0;</div><div class='add'>+	dm_digtable-&gt;cursta_connectctate = DIG_STA_DISCONNECT;</div><div class='add'>+	dm_digtable-&gt;presta_connectstate = DIG_STA_DISCONNECT;</div><div class='add'>+	dm_digtable-&gt;curmultista_connectstate = DIG_MULTISTA_DISCONNECT;</div><div class='add'>+	dm_digtable-&gt;rssi_lowthresh = DM_DIG_THRESH_LOW;</div><div class='add'>+	dm_digtable-&gt;rssi_highthresh = DM_DIG_THRESH_HIGH;</div><div class='add'>+	dm_digtable-&gt;fa_lowthresh = DM_FALSEALARM_THRESH_LOW;</div><div class='add'>+	dm_digtable-&gt;fa_highthresh = DM_FALSEALARM_THRESH_HIGH;</div><div class='add'>+	dm_digtable-&gt;rx_gain_range_max = DM_DIG_MAX;</div><div class='add'>+	dm_digtable-&gt;rx_gain_range_min = DM_DIG_MIN;</div><div class='add'>+	dm_digtable-&gt;backoff_val = DM_DIG_BACKOFF_DEFAULT;</div><div class='add'>+	dm_digtable-&gt;backoff_val_range_max = DM_DIG_BACKOFF_MAX;</div><div class='add'>+	dm_digtable-&gt;backoff_val_range_min = DM_DIG_BACKOFF_MIN;</div><div class='add'>+	dm_digtable-&gt;pre_cck_pd_state = CCK_PD_STAGE_MAX;</div><div class='add'>+	dm_digtable-&gt;cur_cck_pd_state = CCK_PD_STAGE_MAX;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u8 rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *dm_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> 	long rssi_val_min = 0;</div><div class='ctx'> </div><div class='del'>-	if ((dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) &amp;&amp;</div><div class='del'>-	    (dm_digtable.cursta_connectctate == DIG_STA_CONNECT)) {</div><div class='add'>+	if ((dm_digtable-&gt;curmultista_connectstate == DIG_MULTISTA_CONNECT) &amp;&amp;</div><div class='add'>+	    (dm_digtable-&gt;cursta_connectctate == DIG_STA_CONNECT)) {</div><div class='ctx'> 		if (rtlpriv-&gt;dm.entry_min_undecoratedsmoothed_pwdb != 0)</div><div class='ctx'> 			rssi_val_min =</div><div class='ctx'> 			    (rtlpriv-&gt;dm.entry_min_undecoratedsmoothed_pwdb &gt;</div><div class='hunk'>@@ -198,10 +199,10 @@ static u8 rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw *hw)</div><div class='ctx'> 			    rtlpriv-&gt;dm.entry_min_undecoratedsmoothed_pwdb;</div><div class='ctx'> 		else</div><div class='ctx'> 			rssi_val_min = rtlpriv-&gt;dm.undecorated_smoothed_pwdb;</div><div class='del'>-	} else if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT ||</div><div class='del'>-		   dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT) {</div><div class='add'>+	} else if (dm_digtable-&gt;cursta_connectctate == DIG_STA_CONNECT ||</div><div class='add'>+		   dm_digtable-&gt;cursta_connectctate == DIG_STA_BEFORE_CONNECT) {</div><div class='ctx'> 		rssi_val_min = rtlpriv-&gt;dm.undecorated_smoothed_pwdb;</div><div class='del'>-	} else if (dm_digtable.curmultista_connectstate ==</div><div class='add'>+	} else if (dm_digtable-&gt;curmultista_connectstate ==</div><div class='ctx'> 		   DIG_MULTISTA_CONNECT) {</div><div class='ctx'> 		rssi_val_min = rtlpriv-&gt;dm.entry_min_undecoratedsmoothed_pwdb;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -260,7 +261,8 @@ static void rtl92c_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)</div><div class='ctx'> static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='del'>-	u8 value_igi = dm_digtable.cur_igvalue;</div><div class='add'>+	struct dig_t *dm_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='add'>+	u8 value_igi = dm_digtable-&gt;cur_igvalue;</div><div class='ctx'> </div><div class='ctx'> 	if (rtlpriv-&gt;falsealm_cnt.cnt_all &lt; DM_DIG_FA_TH0)</div><div class='ctx'> 		value_igi--;</div><div class='hunk'>@@ -277,43 +279,44 @@ static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw)</div><div class='ctx'> 	if (rtlpriv-&gt;falsealm_cnt.cnt_all &gt; 10000)</div><div class='ctx'> 		value_igi = 0x32;</div><div class='ctx'> </div><div class='del'>-	dm_digtable.cur_igvalue = value_igi;</div><div class='add'>+	dm_digtable-&gt;cur_igvalue = value_igi;</div><div class='ctx'> 	rtl92c_dm_write_dig(hw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *dm_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> </div><div class='del'>-	if (rtlpriv-&gt;falsealm_cnt.cnt_all &gt; dm_digtable.fa_highthresh) {</div><div class='del'>-		if ((dm_digtable.backoff_val - 2) &lt;</div><div class='del'>-		    dm_digtable.backoff_val_range_min)</div><div class='del'>-			dm_digtable.backoff_val =</div><div class='del'>-			    dm_digtable.backoff_val_range_min;</div><div class='add'>+	if (rtlpriv-&gt;falsealm_cnt.cnt_all &gt; dm_digtable-&gt;fa_highthresh) {</div><div class='add'>+		if ((dm_digtable-&gt;backoff_val - 2) &lt;</div><div class='add'>+		    dm_digtable-&gt;backoff_val_range_min)</div><div class='add'>+			dm_digtable-&gt;backoff_val =</div><div class='add'>+			    dm_digtable-&gt;backoff_val_range_min;</div><div class='ctx'> 		else</div><div class='del'>-			dm_digtable.backoff_val -= 2;</div><div class='del'>-	} else if (rtlpriv-&gt;falsealm_cnt.cnt_all &lt; dm_digtable.fa_lowthresh) {</div><div class='del'>-		if ((dm_digtable.backoff_val + 2) &gt;</div><div class='del'>-		    dm_digtable.backoff_val_range_max)</div><div class='del'>-			dm_digtable.backoff_val =</div><div class='del'>-			    dm_digtable.backoff_val_range_max;</div><div class='add'>+			dm_digtable-&gt;backoff_val -= 2;</div><div class='add'>+	} else if (rtlpriv-&gt;falsealm_cnt.cnt_all &lt; dm_digtable-&gt;fa_lowthresh) {</div><div class='add'>+		if ((dm_digtable-&gt;backoff_val + 2) &gt;</div><div class='add'>+		    dm_digtable-&gt;backoff_val_range_max)</div><div class='add'>+			dm_digtable-&gt;backoff_val =</div><div class='add'>+			    dm_digtable-&gt;backoff_val_range_max;</div><div class='ctx'> 		else</div><div class='del'>-			dm_digtable.backoff_val += 2;</div><div class='add'>+			dm_digtable-&gt;backoff_val += 2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((dm_digtable.rssi_val_min + 10 - dm_digtable.backoff_val) &gt;</div><div class='del'>-	    dm_digtable.rx_gain_range_max)</div><div class='del'>-		dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_max;</div><div class='del'>-	else if ((dm_digtable.rssi_val_min + 10 -</div><div class='del'>-		  dm_digtable.backoff_val) &lt; dm_digtable.rx_gain_range_min)</div><div class='del'>-		dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_min;</div><div class='add'>+	if ((dm_digtable-&gt;rssi_val_min + 10 - dm_digtable-&gt;backoff_val) &gt;</div><div class='add'>+	    dm_digtable-&gt;rx_gain_range_max)</div><div class='add'>+		dm_digtable-&gt;cur_igvalue = dm_digtable-&gt;rx_gain_range_max;</div><div class='add'>+	else if ((dm_digtable-&gt;rssi_val_min + 10 -</div><div class='add'>+		  dm_digtable-&gt;backoff_val) &lt; dm_digtable-&gt;rx_gain_range_min)</div><div class='add'>+		dm_digtable-&gt;cur_igvalue = dm_digtable-&gt;rx_gain_range_min;</div><div class='ctx'> 	else</div><div class='del'>-		dm_digtable.cur_igvalue = dm_digtable.rssi_val_min + 10 -</div><div class='del'>-		    dm_digtable.backoff_val;</div><div class='add'>+		dm_digtable-&gt;cur_igvalue = dm_digtable-&gt;rssi_val_min + 10 -</div><div class='add'>+		    dm_digtable-&gt;backoff_val;</div><div class='ctx'> </div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,</div><div class='ctx'> 		 "rssi_val_min = %x backoff_val %x\n",</div><div class='del'>-		 dm_digtable.rssi_val_min, dm_digtable.backoff_val);</div><div class='add'>+		 dm_digtable-&gt;rssi_val_min, dm_digtable-&gt;backoff_val);</div><div class='ctx'> </div><div class='ctx'> 	rtl92c_dm_write_dig(hw);</div><div class='ctx'> }</div><div class='hunk'>@@ -322,6 +325,7 @@ static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	static u8 initialized; /* initialized to false */</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *dm_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));</div><div class='ctx'> 	long rssi_strength = rtlpriv-&gt;dm.entry_min_undecoratedsmoothed_pwdb;</div><div class='ctx'> 	bool multi_sta = false;</div><div class='hunk'>@@ -330,68 +334,69 @@ static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)</div><div class='ctx'> 		multi_sta = true;</div><div class='ctx'> </div><div class='ctx'> 	if (!multi_sta ||</div><div class='del'>-	    dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {</div><div class='add'>+	    dm_digtable-&gt;cursta_connectctate != DIG_STA_DISCONNECT) {</div><div class='ctx'> 		initialized = false;</div><div class='del'>-		dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;</div><div class='add'>+		dm_digtable-&gt;dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;</div><div class='ctx'> 		return;</div><div class='ctx'> 	} else if (initialized == false) {</div><div class='ctx'> 		initialized = true;</div><div class='del'>-		dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;</div><div class='del'>-		dm_digtable.cur_igvalue = 0x20;</div><div class='add'>+		dm_digtable-&gt;dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;</div><div class='add'>+		dm_digtable-&gt;cur_igvalue = 0x20;</div><div class='ctx'> 		rtl92c_dm_write_dig(hw);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) {</div><div class='del'>-		if ((rssi_strength &lt; dm_digtable.rssi_lowthresh) &amp;&amp;</div><div class='del'>-		    (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) {</div><div class='add'>+	if (dm_digtable-&gt;curmultista_connectstate == DIG_MULTISTA_CONNECT) {</div><div class='add'>+		if ((rssi_strength &lt; dm_digtable-&gt;rssi_lowthresh) &amp;&amp;</div><div class='add'>+		    (dm_digtable-&gt;dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) {</div><div class='ctx'> </div><div class='del'>-			if (dm_digtable.dig_ext_port_stage ==</div><div class='add'>+			if (dm_digtable-&gt;dig_ext_port_stage ==</div><div class='ctx'> 			    DIG_EXT_PORT_STAGE_2) {</div><div class='del'>-				dm_digtable.cur_igvalue = 0x20;</div><div class='add'>+				dm_digtable-&gt;cur_igvalue = 0x20;</div><div class='ctx'> 				rtl92c_dm_write_dig(hw);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_1;</div><div class='del'>-		} else if (rssi_strength &gt; dm_digtable.rssi_highthresh) {</div><div class='del'>-			dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_2;</div><div class='add'>+			dm_digtable-&gt;dig_ext_port_stage = DIG_EXT_PORT_STAGE_1;</div><div class='add'>+		} else if (rssi_strength &gt; dm_digtable-&gt;rssi_highthresh) {</div><div class='add'>+			dm_digtable-&gt;dig_ext_port_stage = DIG_EXT_PORT_STAGE_2;</div><div class='ctx'> 			rtl92c_dm_ctrl_initgain_by_fa(hw);</div><div class='ctx'> 		}</div><div class='del'>-	} else if (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_0) {</div><div class='del'>-		dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;</div><div class='del'>-		dm_digtable.cur_igvalue = 0x20;</div><div class='add'>+	} else if (dm_digtable-&gt;dig_ext_port_stage != DIG_EXT_PORT_STAGE_0) {</div><div class='add'>+		dm_digtable-&gt;dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;</div><div class='add'>+		dm_digtable-&gt;cur_igvalue = 0x20;</div><div class='ctx'> 		rtl92c_dm_write_dig(hw);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,</div><div class='ctx'> 		 "curmultista_connectstate = %x dig_ext_port_stage %x\n",</div><div class='del'>-		 dm_digtable.curmultista_connectstate,</div><div class='del'>-		 dm_digtable.dig_ext_port_stage);</div><div class='add'>+		 dm_digtable-&gt;curmultista_connectstate,</div><div class='add'>+		 dm_digtable-&gt;dig_ext_port_stage);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *dm_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> </div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,</div><div class='ctx'> 		 "presta_connectstate = %x, cursta_connectctate = %x\n",</div><div class='del'>-		 dm_digtable.presta_connectstate,</div><div class='del'>-		 dm_digtable.cursta_connectctate);</div><div class='add'>+		 dm_digtable-&gt;presta_connectstate,</div><div class='add'>+		 dm_digtable-&gt;cursta_connectctate);</div><div class='ctx'> </div><div class='del'>-	if (dm_digtable.presta_connectstate == dm_digtable.cursta_connectctate</div><div class='del'>-	    || dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT</div><div class='del'>-	    || dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {</div><div class='add'>+	if (dm_digtable-&gt;presta_connectstate == dm_digtable-&gt;cursta_connectctate</div><div class='add'>+	    || dm_digtable-&gt;cursta_connectctate == DIG_STA_BEFORE_CONNECT</div><div class='add'>+	    || dm_digtable-&gt;cursta_connectctate == DIG_STA_CONNECT) {</div><div class='ctx'> </div><div class='del'>-		if (dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {</div><div class='del'>-			dm_digtable.rssi_val_min =</div><div class='add'>+		if (dm_digtable-&gt;cursta_connectctate != DIG_STA_DISCONNECT) {</div><div class='add'>+			dm_digtable-&gt;rssi_val_min =</div><div class='ctx'> 			    rtl92c_dm_initial_gain_min_pwdb(hw);</div><div class='ctx'> 			rtl92c_dm_ctrl_initgain_by_rssi(hw);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		dm_digtable.rssi_val_min = 0;</div><div class='del'>-		dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;</div><div class='del'>-		dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;</div><div class='del'>-		dm_digtable.cur_igvalue = 0x20;</div><div class='del'>-		dm_digtable.pre_igvalue = 0;</div><div class='add'>+		dm_digtable-&gt;rssi_val_min = 0;</div><div class='add'>+		dm_digtable-&gt;dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;</div><div class='add'>+		dm_digtable-&gt;backoff_val = DM_DIG_BACKOFF_DEFAULT;</div><div class='add'>+		dm_digtable-&gt;cur_igvalue = 0x20;</div><div class='add'>+		dm_digtable-&gt;pre_igvalue = 0;</div><div class='ctx'> 		rtl92c_dm_write_dig(hw);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -400,40 +405,41 @@ static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='ctx'> 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));</div><div class='add'>+	struct dig_t *dm_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> </div><div class='del'>-	if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {</div><div class='del'>-		dm_digtable.rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw);</div><div class='add'>+	if (dm_digtable-&gt;cursta_connectctate == DIG_STA_CONNECT) {</div><div class='add'>+		dm_digtable-&gt;rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw);</div><div class='ctx'> </div><div class='del'>-		if (dm_digtable.pre_cck_pd_state == CCK_PD_STAGE_LowRssi) {</div><div class='del'>-			if (dm_digtable.rssi_val_min &lt;= 25)</div><div class='del'>-				dm_digtable.cur_cck_pd_state =</div><div class='add'>+		if (dm_digtable-&gt;pre_cck_pd_state == CCK_PD_STAGE_LowRssi) {</div><div class='add'>+			if (dm_digtable-&gt;rssi_val_min &lt;= 25)</div><div class='add'>+				dm_digtable-&gt;cur_cck_pd_state =</div><div class='ctx'> 				    CCK_PD_STAGE_LowRssi;</div><div class='ctx'> 			else</div><div class='del'>-				dm_digtable.cur_cck_pd_state =</div><div class='add'>+				dm_digtable-&gt;cur_cck_pd_state =</div><div class='ctx'> 				    CCK_PD_STAGE_HighRssi;</div><div class='ctx'> 		} else {</div><div class='del'>-			if (dm_digtable.rssi_val_min &lt;= 20)</div><div class='del'>-				dm_digtable.cur_cck_pd_state =</div><div class='add'>+			if (dm_digtable-&gt;rssi_val_min &lt;= 20)</div><div class='add'>+				dm_digtable-&gt;cur_cck_pd_state =</div><div class='ctx'> 				    CCK_PD_STAGE_LowRssi;</div><div class='ctx'> 			else</div><div class='del'>-				dm_digtable.cur_cck_pd_state =</div><div class='add'>+				dm_digtable-&gt;cur_cck_pd_state =</div><div class='ctx'> 				    CCK_PD_STAGE_HighRssi;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;</div><div class='add'>+		dm_digtable-&gt;cur_cck_pd_state = CCK_PD_STAGE_MAX;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dm_digtable.pre_cck_pd_state != dm_digtable.cur_cck_pd_state) {</div><div class='del'>-		if (dm_digtable.cur_cck_pd_state == CCK_PD_STAGE_LowRssi) {</div><div class='add'>+	if (dm_digtable-&gt;pre_cck_pd_state != dm_digtable-&gt;cur_cck_pd_state) {</div><div class='add'>+		if (dm_digtable-&gt;cur_cck_pd_state == CCK_PD_STAGE_LowRssi) {</div><div class='ctx'> 			if (rtlpriv-&gt;falsealm_cnt.cnt_cck_fail &gt; 800)</div><div class='del'>-				dm_digtable.cur_cck_fa_state =</div><div class='add'>+				dm_digtable-&gt;cur_cck_fa_state =</div><div class='ctx'> 				    CCK_FA_STAGE_High;</div><div class='ctx'> 			else</div><div class='del'>-				dm_digtable.cur_cck_fa_state = CCK_FA_STAGE_Low;</div><div class='add'>+				dm_digtable-&gt;cur_cck_fa_state = CCK_FA_STAGE_Low;</div><div class='ctx'> </div><div class='del'>-			if (dm_digtable.pre_cck_fa_state !=</div><div class='del'>-			    dm_digtable.cur_cck_fa_state) {</div><div class='del'>-				if (dm_digtable.cur_cck_fa_state ==</div><div class='add'>+			if (dm_digtable-&gt;pre_cck_fa_state !=</div><div class='add'>+			    dm_digtable-&gt;cur_cck_fa_state) {</div><div class='add'>+				if (dm_digtable-&gt;cur_cck_fa_state ==</div><div class='ctx'> 				    CCK_FA_STAGE_Low)</div><div class='ctx'> 					rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,</div><div class='ctx'> 						      0x83);</div><div class='hunk'>@@ -441,8 +447,8 @@ static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)</div><div class='ctx'> 					rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,</div><div class='ctx'> 						      0xcd);</div><div class='ctx'> </div><div class='del'>-				dm_digtable.pre_cck_fa_state =</div><div class='del'>-				    dm_digtable.cur_cck_fa_state;</div><div class='add'>+				dm_digtable-&gt;pre_cck_fa_state =</div><div class='add'>+				    dm_digtable-&gt;cur_cck_fa_state;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40);</div><div class='hunk'>@@ -458,11 +464,11 @@ static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)</div><div class='ctx'> 				rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT,</div><div class='ctx'> 					      MASKBYTE2, 0xd3);</div><div class='ctx'> 		}</div><div class='del'>-		dm_digtable.pre_cck_pd_state = dm_digtable.cur_cck_pd_state;</div><div class='add'>+		dm_digtable-&gt;pre_cck_pd_state = dm_digtable-&gt;cur_cck_pd_state;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, "CCKPDStage=%x\n",</div><div class='del'>-		 dm_digtable.cur_cck_pd_state);</div><div class='add'>+		 dm_digtable-&gt;cur_cck_pd_state);</div><div class='ctx'> </div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, "is92C=%x\n",</div><div class='ctx'> 		 IS_92C_SERIAL(rtlhal-&gt;version));</div><div class='hunk'>@@ -470,31 +476,34 @@ static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)</div><div class='ctx'> </div><div class='ctx'> static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='add'>+	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *dm_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));</div><div class='ctx'> </div><div class='ctx'> 	if (mac-&gt;act_scanning)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (mac-&gt;link_state &gt;= MAC80211_LINKED)</div><div class='del'>-		dm_digtable.cursta_connectctate = DIG_STA_CONNECT;</div><div class='add'>+		dm_digtable-&gt;cursta_connectctate = DIG_STA_CONNECT;</div><div class='ctx'> 	else</div><div class='del'>-		dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT;</div><div class='add'>+		dm_digtable-&gt;cursta_connectctate = DIG_STA_DISCONNECT;</div><div class='ctx'> </div><div class='ctx'> 	rtl92c_dm_initial_gain_sta(hw);</div><div class='ctx'> 	rtl92c_dm_initial_gain_multi_sta(hw);</div><div class='ctx'> 	rtl92c_dm_cck_packet_detection_thresh(hw);</div><div class='ctx'> </div><div class='del'>-	dm_digtable.presta_connectstate = dm_digtable.cursta_connectctate;</div><div class='add'>+	dm_digtable-&gt;presta_connectstate = dm_digtable-&gt;cursta_connectctate;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl92c_dm_dig(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *dm_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> </div><div class='ctx'> 	if (rtlpriv-&gt;dm.dm_initialgain_enable == false)</div><div class='ctx'> 		return;</div><div class='del'>-	if (dm_digtable.dig_enable_flag == false)</div><div class='add'>+	if (dm_digtable-&gt;dig_enable_flag == false)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	rtl92c_dm_ctrl_initgain_by_twoport(hw);</div><div class='hunk'>@@ -514,23 +523,24 @@ static void rtl92c_dm_init_dynamic_txpower(struct ieee80211_hw *hw)</div><div class='ctx'> void rtl92c_dm_write_dig(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *dm_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> </div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,</div><div class='ctx'> 		 "cur_igvalue = 0x%x, pre_igvalue = 0x%x, backoff_val = %d\n",</div><div class='del'>-		 dm_digtable.cur_igvalue, dm_digtable.pre_igvalue,</div><div class='del'>-		 dm_digtable.backoff_val);</div><div class='add'>+		 dm_digtable-&gt;cur_igvalue, dm_digtable-&gt;pre_igvalue,</div><div class='add'>+		 dm_digtable-&gt;backoff_val);</div><div class='ctx'> </div><div class='del'>-	dm_digtable.cur_igvalue += 2;</div><div class='del'>-	if (dm_digtable.cur_igvalue &gt; 0x3f)</div><div class='del'>-		dm_digtable.cur_igvalue = 0x3f;</div><div class='add'>+	dm_digtable-&gt;cur_igvalue += 2;</div><div class='add'>+	if (dm_digtable-&gt;cur_igvalue &gt; 0x3f)</div><div class='add'>+		dm_digtable-&gt;cur_igvalue = 0x3f;</div><div class='ctx'> </div><div class='del'>-	if (dm_digtable.pre_igvalue != dm_digtable.cur_igvalue) {</div><div class='add'>+	if (dm_digtable-&gt;pre_igvalue != dm_digtable-&gt;cur_igvalue) {</div><div class='ctx'> 		rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,</div><div class='del'>-			      dm_digtable.cur_igvalue);</div><div class='add'>+			      dm_digtable-&gt;cur_igvalue);</div><div class='ctx'> 		rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,</div><div class='del'>-			      dm_digtable.cur_igvalue);</div><div class='add'>+			      dm_digtable-&gt;cur_igvalue);</div><div class='ctx'> </div><div class='del'>-		dm_digtable.pre_igvalue = dm_digtable.cur_igvalue;</div><div class='add'>+		dm_digtable-&gt;pre_igvalue = dm_digtable-&gt;cur_igvalue;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(rtl92c_dm_write_dig);</div><div class='hunk'>@@ -1223,15 +1233,20 @@ static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw)</div><div class='ctx'> </div><div class='ctx'> static void rtl92c_dm_init_dynamic_bb_powersaving(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	dm_pstable.pre_ccastate = CCA_MAX;</div><div class='del'>-	dm_pstable.cur_ccasate = CCA_MAX;</div><div class='del'>-	dm_pstable.pre_rfstate = RF_MAX;</div><div class='del'>-	dm_pstable.cur_rfstate = RF_MAX;</div><div class='del'>-	dm_pstable.rssi_val_min = 0;</div><div class='add'>+	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct ps_t *dm_pstable = &amp;rtlpriv-&gt;dm_pstable;</div><div class='add'>+</div><div class='add'>+	dm_pstable-&gt;pre_ccastate = CCA_MAX;</div><div class='add'>+	dm_pstable-&gt;cur_ccasate = CCA_MAX;</div><div class='add'>+	dm_pstable-&gt;pre_rfstate = RF_MAX;</div><div class='add'>+	dm_pstable-&gt;cur_rfstate = RF_MAX;</div><div class='add'>+	dm_pstable-&gt;rssi_val_min = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal)</div><div class='ctx'> {</div><div class='add'>+	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct ps_t *dm_pstable = &amp;rtlpriv-&gt;dm_pstable;</div><div class='ctx'> 	static u8 initialize;</div><div class='ctx'> 	static u32 reg_874, reg_c70, reg_85c, reg_a74;</div><div class='ctx'> </div><div class='hunk'>@@ -1251,27 +1266,27 @@ void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!bforce_in_normal) {</div><div class='del'>-		if (dm_pstable.rssi_val_min != 0) {</div><div class='del'>-			if (dm_pstable.pre_rfstate == RF_NORMAL) {</div><div class='del'>-				if (dm_pstable.rssi_val_min &gt;= 30)</div><div class='del'>-					dm_pstable.cur_rfstate = RF_SAVE;</div><div class='add'>+		if (dm_pstable-&gt;rssi_val_min != 0) {</div><div class='add'>+			if (dm_pstable-&gt;pre_rfstate == RF_NORMAL) {</div><div class='add'>+				if (dm_pstable-&gt;rssi_val_min &gt;= 30)</div><div class='add'>+					dm_pstable-&gt;cur_rfstate = RF_SAVE;</div><div class='ctx'> 				else</div><div class='del'>-					dm_pstable.cur_rfstate = RF_NORMAL;</div><div class='add'>+					dm_pstable-&gt;cur_rfstate = RF_NORMAL;</div><div class='ctx'> 			} else {</div><div class='del'>-				if (dm_pstable.rssi_val_min &lt;= 25)</div><div class='del'>-					dm_pstable.cur_rfstate = RF_NORMAL;</div><div class='add'>+				if (dm_pstable-&gt;rssi_val_min &lt;= 25)</div><div class='add'>+					dm_pstable-&gt;cur_rfstate = RF_NORMAL;</div><div class='ctx'> 				else</div><div class='del'>-					dm_pstable.cur_rfstate = RF_SAVE;</div><div class='add'>+					dm_pstable-&gt;cur_rfstate = RF_SAVE;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='del'>-			dm_pstable.cur_rfstate = RF_MAX;</div><div class='add'>+			dm_pstable-&gt;cur_rfstate = RF_MAX;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		dm_pstable.cur_rfstate = RF_NORMAL;</div><div class='add'>+		dm_pstable-&gt;cur_rfstate = RF_NORMAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dm_pstable.pre_rfstate != dm_pstable.cur_rfstate) {</div><div class='del'>-		if (dm_pstable.cur_rfstate == RF_SAVE) {</div><div class='add'>+	if (dm_pstable-&gt;pre_rfstate != dm_pstable-&gt;cur_rfstate) {</div><div class='add'>+		if (dm_pstable-&gt;cur_rfstate == RF_SAVE) {</div><div class='ctx'> 			rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,</div><div class='ctx'> 				      0x1C0000, 0x2);</div><div class='ctx'> 			rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3), 0);</div><div class='hunk'>@@ -1293,7 +1308,7 @@ void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal)</div><div class='ctx'> 			rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		dm_pstable.pre_rfstate = dm_pstable.cur_rfstate;</div><div class='add'>+		dm_pstable-&gt;pre_rfstate = dm_pstable-&gt;cur_rfstate;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(rtl92c_dm_rf_saving);</div><div class='hunk'>@@ -1301,36 +1316,37 @@ EXPORT_SYMBOL(rtl92c_dm_rf_saving);</div><div class='ctx'> static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct ps_t *dm_pstable = &amp;rtlpriv-&gt;dm_pstable;</div><div class='ctx'> 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));</div><div class='ctx'> 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));</div><div class='ctx'> </div><div class='ctx'> 	if (((mac-&gt;link_state == MAC80211_NOLINK)) &amp;&amp;</div><div class='ctx'> 	    (rtlpriv-&gt;dm.entry_min_undecoratedsmoothed_pwdb == 0)) {</div><div class='del'>-		dm_pstable.rssi_val_min = 0;</div><div class='add'>+		dm_pstable-&gt;rssi_val_min = 0;</div><div class='ctx'> 		RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, "Not connected to any\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (mac-&gt;link_state == MAC80211_LINKED) {</div><div class='ctx'> 		if (mac-&gt;opmode == NL80211_IFTYPE_ADHOC) {</div><div class='del'>-			dm_pstable.rssi_val_min =</div><div class='add'>+			dm_pstable-&gt;rssi_val_min =</div><div class='ctx'> 			    rtlpriv-&gt;dm.entry_min_undecoratedsmoothed_pwdb;</div><div class='ctx'> 			RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,</div><div class='ctx'> 				 "AP Client PWDB = 0x%lx\n",</div><div class='del'>-				 dm_pstable.rssi_val_min);</div><div class='add'>+				 dm_pstable-&gt;rssi_val_min);</div><div class='ctx'> 		} else {</div><div class='del'>-			dm_pstable.rssi_val_min =</div><div class='add'>+			dm_pstable-&gt;rssi_val_min =</div><div class='ctx'> 			    rtlpriv-&gt;dm.undecorated_smoothed_pwdb;</div><div class='ctx'> 			RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,</div><div class='ctx'> 				 "STA Default Port PWDB = 0x%lx\n",</div><div class='del'>-				 dm_pstable.rssi_val_min);</div><div class='add'>+				 dm_pstable-&gt;rssi_val_min);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		dm_pstable.rssi_val_min =</div><div class='add'>+		dm_pstable-&gt;rssi_val_min =</div><div class='ctx'> 		    rtlpriv-&gt;dm.entry_min_undecoratedsmoothed_pwdb;</div><div class='ctx'> </div><div class='ctx'> 		RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD,</div><div class='ctx'> 			 "AP Ext Port PWDB = 0x%lx\n",</div><div class='del'>-			 dm_pstable.rssi_val_min);</div><div class='add'>+			 dm_pstable-&gt;rssi_val_min);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (IS_92C_SERIAL(rtlhal-&gt;version))</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.h b/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.h<br/>index 2178e3761883..518e208c0180 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192c/dm_common.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192c/dm_common.h</a></div><div class='hunk'>@@ -91,40 +91,6 @@</div><div class='ctx'> #define TX_POWER_NEAR_FIELD_THRESH_LVL2		74</div><div class='ctx'> #define TX_POWER_NEAR_FIELD_THRESH_LVL1		67</div><div class='ctx'> </div><div class='del'>-struct ps_t {</div><div class='del'>-	u8 pre_ccastate;</div><div class='del'>-	u8 cur_ccasate;</div><div class='del'>-	u8 pre_rfstate;</div><div class='del'>-	u8 cur_rfstate;</div><div class='del'>-	long rssi_val_min;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct dig_t {</div><div class='del'>-	u8 dig_enable_flag;</div><div class='del'>-	u8 dig_ext_port_stage;</div><div class='del'>-	u32 rssi_lowthresh;</div><div class='del'>-	u32 rssi_highthresh;</div><div class='del'>-	u32 fa_lowthresh;</div><div class='del'>-	u32 fa_highthresh;</div><div class='del'>-	u8 cursta_connectctate;</div><div class='del'>-	u8 presta_connectstate;</div><div class='del'>-	u8 curmultista_connectstate;</div><div class='del'>-	u8 pre_igvalue;</div><div class='del'>-	u8 cur_igvalue;</div><div class='del'>-	char backoff_val;</div><div class='del'>-	char backoff_val_range_max;</div><div class='del'>-	char backoff_val_range_min;</div><div class='del'>-	u8 rx_gain_range_max;</div><div class='del'>-	u8 rx_gain_range_min;</div><div class='del'>-	u8 rssi_val_min;</div><div class='del'>-	u8 pre_cck_pd_state;</div><div class='del'>-	u8 cur_cck_pd_state;</div><div class='del'>-	u8 pre_cck_fa_state;</div><div class='del'>-	u8 cur_cck_fa_state;</div><div class='del'>-	u8 pre_ccastate;</div><div class='del'>-	u8 cur_ccasate;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct swat_t {</div><div class='ctx'> 	u8 failure_cnt;</div><div class='ctx'> 	u8 try_flag;</div><div class='hunk'>@@ -189,7 +155,6 @@ enum dm_dig_connect_e {</div><div class='ctx'> 	DIG_CONNECT_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-extern struct dig_t dm_digtable;</div><div class='ctx'> void rtl92c_dm_init(struct ieee80211_hw *hw);</div><div class='ctx'> void rtl92c_dm_watchdog(struct ieee80211_hw *hw);</div><div class='ctx'> void rtl92c_dm_write_dig(struct ieee80211_hw *hw);</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c b/drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c<br/>index c20b3c30f62e..692c8ef5ee89 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #include "../rtl8192ce/def.h"</div><div class='ctx'> #include "fw_common.h"</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/kmemleak.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void _rtl92c_enable_fw_download(struct ieee80211_hw *hw, bool enable)</div><div class='ctx'> {</div><div class='hunk'>@@ -776,6 +777,8 @@ void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool dl_finished)</div><div class='ctx'> 	skb = dev_alloc_skb(totalpacketlen);</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return;</div><div class='add'>+	kmemleak_not_leak(skb);</div><div class='add'>+</div><div class='ctx'> 	memcpy((u8 *) skb_put(skb, totalpacketlen),</div><div class='ctx'> 	       &amp;reserved_page_packet, totalpacketlen);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c b/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c<br/>index 4c016241f340..cdcad7d9f15e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c</a></div><div class='hunk'>@@ -1881,6 +1881,7 @@ void rtl92c_phy_set_io(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='ctx'> 	struct rtl_phy *rtlphy = &amp;(rtlpriv-&gt;phy);</div><div class='add'>+	struct dig_t dm_digtable = rtlpriv-&gt;dm_digtable;</div><div class='ctx'> </div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,</div><div class='ctx'> 		 "---&gt;Cmd(%#x), set_io_inprogress(%d)\n",</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h b/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h<br/>index 26747fa86005..d4a3d032c7bf 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192ce/dm.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192ce/dm.h</a></div><div class='hunk'>@@ -86,40 +86,6 @@</div><div class='ctx'> #define TX_POWER_NEAR_FIELD_THRESH_LVL2		74</div><div class='ctx'> #define TX_POWER_NEAR_FIELD_THRESH_LVL1		67</div><div class='ctx'> </div><div class='del'>-struct ps_t {</div><div class='del'>-	u8 pre_ccastate;</div><div class='del'>-	u8 cur_ccasate;</div><div class='del'>-	u8 pre_rfstate;</div><div class='del'>-	u8 cur_rfstate;</div><div class='del'>-	long rssi_val_min;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct dig_t {</div><div class='del'>-	u8 dig_enable_flag;</div><div class='del'>-	u8 dig_ext_port_stage;</div><div class='del'>-	u32 rssi_lowthresh;</div><div class='del'>-	u32 rssi_highthresh;</div><div class='del'>-	u32 fa_lowthresh;</div><div class='del'>-	u32 fa_highthresh;</div><div class='del'>-	u8 cursta_connectctate;</div><div class='del'>-	u8 presta_connectstate;</div><div class='del'>-	u8 curmultista_connectstate;</div><div class='del'>-	u8 pre_igvalue;</div><div class='del'>-	u8 cur_igvalue;</div><div class='del'>-	char backoff_val;</div><div class='del'>-	char backoff_val_range_max;</div><div class='del'>-	char backoff_val_range_min;</div><div class='del'>-	u8 rx_gain_range_max;</div><div class='del'>-	u8 rx_gain_range_min;</div><div class='del'>-	u8 rssi_val_min;</div><div class='del'>-	u8 pre_cck_pd_state;</div><div class='del'>-	u8 cur_cck_pd_state;</div><div class='del'>-	u8 pre_cck_fa_state;</div><div class='del'>-	u8 cur_cck_fa_state;</div><div class='del'>-	u8 pre_ccastate;</div><div class='del'>-	u8 cur_ccasate;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct swat_t {</div><div class='ctx'> 	u8 failure_cnt;</div><div class='ctx'> 	u8 try_flag;</div><div class='hunk'>@@ -184,7 +150,6 @@ enum dm_dig_connect_e {</div><div class='ctx'> 	DIG_CONNECT_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-extern struct dig_t dm_digtable;</div><div class='ctx'> void rtl92c_dm_init(struct ieee80211_hw *hw);</div><div class='ctx'> void rtl92c_dm_watchdog(struct ieee80211_hw *hw);</div><div class='ctx'> void rtl92c_dm_write_dig(struct ieee80211_hw *hw);</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c<br/>index 2c3b73366cd2..3aa927f8b9b9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192ce/sw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192ce/sw.c</a></div><div class='hunk'>@@ -389,21 +389,4 @@ static struct pci_driver rtl92ce_driver = {</div><div class='ctx'> 	.driver.pm = &amp;rtlwifi_pm_ops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init rtl92ce_module_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = pci_register_driver(&amp;rtl92ce_driver);</div><div class='del'>-	if (ret)</div><div class='del'>-		RT_ASSERT(false, "No device found\n");</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit rtl92ce_module_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;rtl92ce_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(rtl92ce_module_init);</div><div class='del'>-module_exit(rtl92ce_module_exit);</div><div class='add'>+module_pci_driver(rtl92ce_driver);</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c<br/>index 37b13636a778..3af874e69595 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192ce/trx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192ce/trx.c</a></div><div class='hunk'>@@ -508,14 +508,14 @@ static void _rtl92ce_translate_rx_signal_stuff(struct ieee80211_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	packet_matchbssid =</div><div class='ctx'> 	    ((IEEE80211_FTYPE_CTL != type) &amp;&amp;</div><div class='del'>-	     (!compare_ether_addr(mac-&gt;bssid,</div><div class='del'>-				  (c_fc &amp; IEEE80211_FCTL_TODS) ?</div><div class='del'>-				  hdr-&gt;addr1 : (c_fc &amp; IEEE80211_FCTL_FROMDS) ?</div><div class='del'>-				  hdr-&gt;addr2 : hdr-&gt;addr3)) &amp;&amp;</div><div class='add'>+	     ether_addr_equal(mac-&gt;bssid,</div><div class='add'>+			      (c_fc &amp; IEEE80211_FCTL_TODS) ? hdr-&gt;addr1 :</div><div class='add'>+			      (c_fc &amp; IEEE80211_FCTL_FROMDS) ? hdr-&gt;addr2 :</div><div class='add'>+			      hdr-&gt;addr3) &amp;&amp;</div><div class='ctx'> 	     (!pstats-&gt;hwerror) &amp;&amp; (!pstats-&gt;crc) &amp;&amp; (!pstats-&gt;icv));</div><div class='ctx'> </div><div class='ctx'> 	packet_toself = packet_matchbssid &amp;&amp;</div><div class='del'>-	    (!compare_ether_addr(praddr, rtlefuse-&gt;dev_addr));</div><div class='add'>+	     ether_addr_equal(praddr, rtlefuse-&gt;dev_addr);</div><div class='ctx'> </div><div class='ctx'> 	if (ieee80211_is_beacon(fc))</div><div class='ctx'> 		packet_beacon = true;</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h<br/>index efb9ab270403..c4adb9777365 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192ce/trx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192ce/trx.h</a></div><div class='hunk'>@@ -530,12 +530,7 @@</div><div class='ctx'> 	SET_BITS_OFFSET_LE(__pdesc+28, 0, 32, __val)</div><div class='ctx'> </div><div class='ctx'> #define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size)	\</div><div class='del'>-do {							\</div><div class='del'>-	if (_size &gt; TX_DESC_NEXT_DESC_OFFSET)		\</div><div class='del'>-		memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET);	\</div><div class='del'>-	else						\</div><div class='del'>-		memset(__pdesc, 0, _size);	\</div><div class='del'>-} while (0);</div><div class='add'>+	memset(__pdesc, 0, min_t(size_t, _size, TX_DESC_NEXT_DESC_OFFSET))</div><div class='ctx'> </div><div class='ctx'> struct rx_fwinfo_92c {</div><div class='ctx'> 	u8 gain_trsw[4];</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c b/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c<br/>index 025bdc2eba44..7e91c76582ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192cu/mac.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192cu/mac.c</a></div><div class='hunk'>@@ -1099,14 +1099,14 @@ void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,</div><div class='ctx'> 	praddr = hdr-&gt;addr1;</div><div class='ctx'> 	packet_matchbssid =</div><div class='ctx'> 	    ((IEEE80211_FTYPE_CTL != type) &amp;&amp;</div><div class='del'>-	     (!compare_ether_addr(mac-&gt;bssid,</div><div class='del'>-			  (cpu_fc &amp; IEEE80211_FCTL_TODS) ?</div><div class='del'>-			  hdr-&gt;addr1 : (cpu_fc &amp; IEEE80211_FCTL_FROMDS) ?</div><div class='del'>-			  hdr-&gt;addr2 : hdr-&gt;addr3)) &amp;&amp;</div><div class='add'>+	     ether_addr_equal(mac-&gt;bssid,</div><div class='add'>+			      (cpu_fc &amp; IEEE80211_FCTL_TODS) ? hdr-&gt;addr1 :</div><div class='add'>+			      (cpu_fc &amp; IEEE80211_FCTL_FROMDS) ? hdr-&gt;addr2 :</div><div class='add'>+			      hdr-&gt;addr3) &amp;&amp;</div><div class='ctx'> 	     (!pstats-&gt;hwerror) &amp;&amp; (!pstats-&gt;crc) &amp;&amp; (!pstats-&gt;icv));</div><div class='ctx'> </div><div class='ctx'> 	packet_toself = packet_matchbssid &amp;&amp;</div><div class='del'>-	    (!compare_ether_addr(praddr, rtlefuse-&gt;dev_addr));</div><div class='add'>+	    ether_addr_equal(praddr, rtlefuse-&gt;dev_addr);</div><div class='ctx'> 	if (ieee80211_is_beacon(fc))</div><div class='ctx'> 		packet_beacon = true;</div><div class='ctx'> 	_rtl92c_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c<br/>index 82c85286ab2e..d228358e6a40 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192cu/sw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192cu/sw.c</a></div><div class='hunk'>@@ -338,6 +338,7 @@ static struct usb_device_id rtl8192c_usb_ids[] = {</div><div class='ctx'> 	{RTL_USB_DEVICE(0x2019, 0x1201, rtl92cu_hal_cfg)}, /*Planex-Vencer*/</div><div class='ctx'> </div><div class='ctx'> 	/****** 8192CU ********/</div><div class='add'>+	{RTL_USB_DEVICE(0x050d, 0x1004, rtl92cu_hal_cfg)}, /*Belcom-SurfN300*/</div><div class='ctx'> 	{RTL_USB_DEVICE(0x050d, 0x2102, rtl92cu_hal_cfg)}, /*Belcom-Sercomm*/</div><div class='ctx'> 	{RTL_USB_DEVICE(0x050d, 0x2103, rtl92cu_hal_cfg)}, /*Belcom-Edimax*/</div><div class='ctx'> 	{RTL_USB_DEVICE(0x0586, 0x341f, rtl92cu_hal_cfg)}, /*Zyxel -Abocom*/</div><div class='hunk'>@@ -372,6 +373,7 @@ static struct usb_driver rtl8192cu_driver = {</div><div class='ctx'> #ifdef CONFIG_AUTOSUSPEND</div><div class='ctx'> 	.supports_autosuspend = 1,</div><div class='ctx'> #endif</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(rtl8192cu_driver);</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/def.h b/drivers/net/wireless/rtlwifi/rtl8192de/def.h<br/>index eafdf76ed64d..939c905f547f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/def.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192de/def.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/def.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/def.h</a></div><div class='hunk'>@@ -151,9 +151,6 @@ enum version_8192d {</div><div class='ctx'> </div><div class='ctx'> /* for 92D */</div><div class='ctx'> #define CHIP_92D_SINGLEPHY		BIT(9)</div><div class='del'>-#define C_CUT_VERSION			BIT(13)</div><div class='del'>-#define D_CUT_VERSION			((BIT(12)|BIT(13)))</div><div class='del'>-#define E_CUT_VERSION			BIT(14)</div><div class='ctx'> </div><div class='ctx'> /* Chip specific */</div><div class='ctx'> #define CHIP_BONDING_IDENTIFIER(_value)	(((_value)&gt;&gt;22)&amp;0x3)</div><div class='hunk'>@@ -173,7 +170,10 @@ enum version_8192d {</div><div class='ctx'> #define RF_TYPE_1T2R			BIT(4)</div><div class='ctx'> #define RF_TYPE_2T2R			BIT(5)</div><div class='ctx'> #define CHIP_VENDOR_UMC			BIT(7)</div><div class='del'>-#define B_CUT_VERSION			BIT(12)</div><div class='add'>+#define CHIP_92D_B_CUT			BIT(12)</div><div class='add'>+#define CHIP_92D_C_CUT			BIT(13)</div><div class='add'>+#define CHIP_92D_D_CUT			(BIT(13)|BIT(12))</div><div class='add'>+#define CHIP_92D_E_CUT			BIT(14)</div><div class='ctx'> </div><div class='ctx'> /* MASK */</div><div class='ctx'> #define IC_TYPE_MASK			(BIT(0)|BIT(1)|BIT(2))</div><div class='hunk'>@@ -205,15 +205,13 @@ enum version_8192d {</div><div class='ctx'> 					 CHIP_92D) ? true : false)</div><div class='ctx'> #define IS_92D_C_CUT(version)		((IS_92D(version)) ?		\</div><div class='ctx'> 				 ((GET_CVID_CUT_VERSION(version) ==	\</div><div class='del'>-				 0x2000) ? true : false) : false)</div><div class='add'>+				 CHIP_92D_C_CUT) ? true : false) : false)</div><div class='ctx'> #define IS_92D_D_CUT(version)			((IS_92D(version)) ?	\</div><div class='ctx'> 				 ((GET_CVID_CUT_VERSION(version) ==	\</div><div class='del'>-				 0x3000) ? true : false) : false)</div><div class='add'>+				 CHIP_92D_D_CUT) ? true : false) : false)</div><div class='ctx'> #define IS_92D_E_CUT(version)		((IS_92D(version)) ?		\</div><div class='ctx'> 				 ((GET_CVID_CUT_VERSION(version) ==	\</div><div class='del'>-				 0x4000) ? true : false) : false)</div><div class='del'>-#define CHIP_92D_C_CUT			BIT(10)</div><div class='del'>-#define CHIP_92D_D_CUT			BIT(11)</div><div class='add'>+				 CHIP_92D_E_CUT) ? true : false) : false)</div><div class='ctx'> </div><div class='ctx'> enum rf_optype {</div><div class='ctx'> 	RF_OP_BY_SW_3WIRE = 0,</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/dm.c b/drivers/net/wireless/rtlwifi/rtl8192de/dm.c<br/>index 4737018c9daa..a7d63a84551a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/dm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192de/dm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/dm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/dm.c</a></div><div class='hunk'>@@ -37,8 +37,6 @@</div><div class='ctx'> </div><div class='ctx'> #define UNDEC_SM_PWDB	entry_min_undecoratedsmoothed_pwdb</div><div class='ctx'> </div><div class='del'>-struct dig_t de_digtable;</div><div class='del'>-</div><div class='ctx'> static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = {</div><div class='ctx'> 	0x7f8001fe,		/* 0, +6.0dB */</div><div class='ctx'> 	0x788001e2,		/* 1, +5.5dB */</div><div class='hunk'>@@ -159,27 +157,30 @@ static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {</div><div class='ctx'> </div><div class='ctx'> static void rtl92d_dm_diginit(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	de_digtable.dig_enable_flag = true;</div><div class='del'>-	de_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;</div><div class='del'>-	de_digtable.cur_igvalue = 0x20;</div><div class='del'>-	de_digtable.pre_igvalue = 0x0;</div><div class='del'>-	de_digtable.cursta_connectctate = DIG_STA_DISCONNECT;</div><div class='del'>-	de_digtable.presta_connectstate = DIG_STA_DISCONNECT;</div><div class='del'>-	de_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;</div><div class='del'>-	de_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;</div><div class='del'>-	de_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;</div><div class='del'>-	de_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;</div><div class='del'>-	de_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;</div><div class='del'>-	de_digtable.rx_gain_range_max = DM_DIG_FA_UPPER;</div><div class='del'>-	de_digtable.rx_gain_range_min = DM_DIG_FA_LOWER;</div><div class='del'>-	de_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;</div><div class='del'>-	de_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;</div><div class='del'>-	de_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;</div><div class='del'>-	de_digtable.pre_cck_pd_state = CCK_PD_STAGE_LOWRSSI;</div><div class='del'>-	de_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;</div><div class='del'>-	de_digtable.large_fa_hit = 0;</div><div class='del'>-	de_digtable.recover_cnt = 0;</div><div class='del'>-	de_digtable.forbidden_igi = DM_DIG_FA_LOWER;</div><div class='add'>+	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *de_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='add'>+</div><div class='add'>+	de_digtable-&gt;dig_enable_flag = true;</div><div class='add'>+	de_digtable-&gt;dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;</div><div class='add'>+	de_digtable-&gt;cur_igvalue = 0x20;</div><div class='add'>+	de_digtable-&gt;pre_igvalue = 0x0;</div><div class='add'>+	de_digtable-&gt;cursta_connectctate = DIG_STA_DISCONNECT;</div><div class='add'>+	de_digtable-&gt;presta_connectstate = DIG_STA_DISCONNECT;</div><div class='add'>+	de_digtable-&gt;curmultista_connectstate = DIG_MULTISTA_DISCONNECT;</div><div class='add'>+	de_digtable-&gt;rssi_lowthresh = DM_DIG_THRESH_LOW;</div><div class='add'>+	de_digtable-&gt;rssi_highthresh = DM_DIG_THRESH_HIGH;</div><div class='add'>+	de_digtable-&gt;fa_lowthresh = DM_FALSEALARM_THRESH_LOW;</div><div class='add'>+	de_digtable-&gt;fa_highthresh = DM_FALSEALARM_THRESH_HIGH;</div><div class='add'>+	de_digtable-&gt;rx_gain_range_max = DM_DIG_FA_UPPER;</div><div class='add'>+	de_digtable-&gt;rx_gain_range_min = DM_DIG_FA_LOWER;</div><div class='add'>+	de_digtable-&gt;backoff_val = DM_DIG_BACKOFF_DEFAULT;</div><div class='add'>+	de_digtable-&gt;backoff_val_range_max = DM_DIG_BACKOFF_MAX;</div><div class='add'>+	de_digtable-&gt;backoff_val_range_min = DM_DIG_BACKOFF_MIN;</div><div class='add'>+	de_digtable-&gt;pre_cck_pd_state = CCK_PD_STAGE_LOWRSSI;</div><div class='add'>+	de_digtable-&gt;cur_cck_pd_state = CCK_PD_STAGE_MAX;</div><div class='add'>+	de_digtable-&gt;large_fa_hit = 0;</div><div class='add'>+	de_digtable-&gt;recover_cnt = 0;</div><div class='add'>+	de_digtable-&gt;forbidden_igi = DM_DIG_FA_LOWER;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)</div><div class='hunk'>@@ -266,68 +267,70 @@ static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)</div><div class='ctx'> static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *de_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> 	struct rtl_mac *mac = rtl_mac(rtlpriv);</div><div class='ctx'> </div><div class='ctx'> 	/* Determine the minimum RSSI  */</div><div class='ctx'> 	if ((mac-&gt;link_state &lt; MAC80211_LINKED) &amp;&amp;</div><div class='ctx'> 	    (rtlpriv-&gt;dm.UNDEC_SM_PWDB == 0)) {</div><div class='del'>-		de_digtable.min_undecorated_pwdb_for_dm = 0;</div><div class='add'>+		de_digtable-&gt;min_undecorated_pwdb_for_dm = 0;</div><div class='ctx'> 		RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,</div><div class='ctx'> 			 "Not connected to any\n");</div><div class='ctx'> 	}</div><div class='ctx'> 	if (mac-&gt;link_state &gt;= MAC80211_LINKED) {</div><div class='ctx'> 		if (mac-&gt;opmode == NL80211_IFTYPE_AP ||</div><div class='ctx'> 		    mac-&gt;opmode == NL80211_IFTYPE_ADHOC) {</div><div class='del'>-			de_digtable.min_undecorated_pwdb_for_dm =</div><div class='add'>+			de_digtable-&gt;min_undecorated_pwdb_for_dm =</div><div class='ctx'> 			    rtlpriv-&gt;dm.UNDEC_SM_PWDB;</div><div class='ctx'> 			RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,</div><div class='ctx'> 				 "AP Client PWDB = 0x%lx\n",</div><div class='ctx'> 				 rtlpriv-&gt;dm.UNDEC_SM_PWDB);</div><div class='ctx'> 		} else {</div><div class='del'>-			de_digtable.min_undecorated_pwdb_for_dm =</div><div class='add'>+			de_digtable-&gt;min_undecorated_pwdb_for_dm =</div><div class='ctx'> 			    rtlpriv-&gt;dm.undecorated_smoothed_pwdb;</div><div class='ctx'> 			RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,</div><div class='ctx'> 				 "STA Default Port PWDB = 0x%x\n",</div><div class='del'>-				 de_digtable.min_undecorated_pwdb_for_dm);</div><div class='add'>+				 de_digtable-&gt;min_undecorated_pwdb_for_dm);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		de_digtable.min_undecorated_pwdb_for_dm =</div><div class='add'>+		de_digtable-&gt;min_undecorated_pwdb_for_dm =</div><div class='ctx'> 		    rtlpriv-&gt;dm.UNDEC_SM_PWDB;</div><div class='ctx'> 		RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,</div><div class='ctx'> 			 "AP Ext Port or disconnect PWDB = 0x%x\n",</div><div class='del'>-			 de_digtable.min_undecorated_pwdb_for_dm);</div><div class='add'>+			 de_digtable-&gt;min_undecorated_pwdb_for_dm);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n",</div><div class='del'>-		 de_digtable.min_undecorated_pwdb_for_dm);</div><div class='add'>+		 de_digtable-&gt;min_undecorated_pwdb_for_dm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *de_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> 	unsigned long flag = 0;</div><div class='ctx'> </div><div class='del'>-	if (de_digtable.cursta_connectctate == DIG_STA_CONNECT) {</div><div class='del'>-		if (de_digtable.pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {</div><div class='del'>-			if (de_digtable.min_undecorated_pwdb_for_dm &lt;= 25)</div><div class='del'>-				de_digtable.cur_cck_pd_state =</div><div class='add'>+	if (de_digtable-&gt;cursta_connectctate == DIG_STA_CONNECT) {</div><div class='add'>+		if (de_digtable-&gt;pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {</div><div class='add'>+			if (de_digtable-&gt;min_undecorated_pwdb_for_dm &lt;= 25)</div><div class='add'>+				de_digtable-&gt;cur_cck_pd_state =</div><div class='ctx'> 							 CCK_PD_STAGE_LOWRSSI;</div><div class='ctx'> 			else</div><div class='del'>-				de_digtable.cur_cck_pd_state =</div><div class='add'>+				de_digtable-&gt;cur_cck_pd_state =</div><div class='ctx'> 							 CCK_PD_STAGE_HIGHRSSI;</div><div class='ctx'> 		} else {</div><div class='del'>-			if (de_digtable.min_undecorated_pwdb_for_dm &lt;= 20)</div><div class='del'>-				de_digtable.cur_cck_pd_state =</div><div class='add'>+			if (de_digtable-&gt;min_undecorated_pwdb_for_dm &lt;= 20)</div><div class='add'>+				de_digtable-&gt;cur_cck_pd_state =</div><div class='ctx'> 							 CCK_PD_STAGE_LOWRSSI;</div><div class='ctx'> 			else</div><div class='del'>-				de_digtable.cur_cck_pd_state =</div><div class='add'>+				de_digtable-&gt;cur_cck_pd_state =</div><div class='ctx'> 							 CCK_PD_STAGE_HIGHRSSI;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		de_digtable.cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI;</div><div class='add'>+		de_digtable-&gt;cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI;</div><div class='ctx'> 	}</div><div class='del'>-	if (de_digtable.pre_cck_pd_state != de_digtable.cur_cck_pd_state) {</div><div class='del'>-		if (de_digtable.cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {</div><div class='add'>+	if (de_digtable-&gt;pre_cck_pd_state != de_digtable-&gt;cur_cck_pd_state) {</div><div class='add'>+		if (de_digtable-&gt;cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {</div><div class='ctx'> 			rtl92d_acquire_cckandrw_pagea_ctl(hw, &amp;flag);</div><div class='ctx'> 			rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0x83);</div><div class='ctx'> 			rtl92d_release_cckandrw_pagea_ctl(hw, &amp;flag);</div><div class='hunk'>@@ -336,13 +339,13 @@ static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)</div><div class='ctx'> 			rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0xcd);</div><div class='ctx'> 			rtl92d_release_cckandrw_pagea_ctl(hw, &amp;flag);</div><div class='ctx'> 		}</div><div class='del'>-		de_digtable.pre_cck_pd_state = de_digtable.cur_cck_pd_state;</div><div class='add'>+		de_digtable-&gt;pre_cck_pd_state = de_digtable-&gt;cur_cck_pd_state;</div><div class='ctx'> 	}</div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CurSTAConnectState=%s\n",</div><div class='del'>-		 de_digtable.cursta_connectctate == DIG_STA_CONNECT ?</div><div class='add'>+		 de_digtable-&gt;cursta_connectctate == DIG_STA_CONNECT ?</div><div class='ctx'> 		 "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT");</div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CCKPDStage=%s\n",</div><div class='del'>-		 de_digtable.cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ?</div><div class='add'>+		 de_digtable-&gt;cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ?</div><div class='ctx'> 		 "Low RSSI " : "High RSSI ");</div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "is92d single phy =%x\n",</div><div class='ctx'> 		 IS_92D_SINGLEPHY(rtlpriv-&gt;rtlhal.version));</div><div class='hunk'>@@ -352,37 +355,40 @@ static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)</div><div class='ctx'> void rtl92d_dm_write_dig(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *de_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> </div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,</div><div class='ctx'> 		 "cur_igvalue = 0x%x, pre_igvalue = 0x%x, backoff_val = %d\n",</div><div class='del'>-		 de_digtable.cur_igvalue, de_digtable.pre_igvalue,</div><div class='del'>-		 de_digtable.backoff_val);</div><div class='del'>-	if (de_digtable.dig_enable_flag == false) {</div><div class='add'>+		 de_digtable-&gt;cur_igvalue, de_digtable-&gt;pre_igvalue,</div><div class='add'>+		 de_digtable-&gt;backoff_val);</div><div class='add'>+	if (de_digtable-&gt;dig_enable_flag == false) {</div><div class='ctx'> 		RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "DIG is disabled\n");</div><div class='del'>-		de_digtable.pre_igvalue = 0x17;</div><div class='add'>+		de_digtable-&gt;pre_igvalue = 0x17;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	if (de_digtable.pre_igvalue != de_digtable.cur_igvalue) {</div><div class='add'>+	if (de_digtable-&gt;pre_igvalue != de_digtable-&gt;cur_igvalue) {</div><div class='ctx'> 		rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,</div><div class='del'>-			      de_digtable.cur_igvalue);</div><div class='add'>+			      de_digtable-&gt;cur_igvalue);</div><div class='ctx'> 		rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,</div><div class='del'>-			      de_digtable.cur_igvalue);</div><div class='del'>-		de_digtable.pre_igvalue = de_digtable.cur_igvalue;</div><div class='add'>+			      de_digtable-&gt;cur_igvalue);</div><div class='add'>+		de_digtable-&gt;pre_igvalue = de_digtable-&gt;cur_igvalue;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv)</div><div class='ctx'> {</div><div class='add'>+	struct dig_t *de_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='add'>+</div><div class='ctx'> 	if ((rtlpriv-&gt;mac80211.link_state &gt;= MAC80211_LINKED) &amp;&amp;</div><div class='ctx'> 	    (rtlpriv-&gt;mac80211.vendor == PEER_CISCO)) {</div><div class='ctx'> 		RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "IOT_PEER = CISCO\n");</div><div class='del'>-		if (de_digtable.last_min_undecorated_pwdb_for_dm &gt;= 50</div><div class='del'>-		    &amp;&amp; de_digtable.min_undecorated_pwdb_for_dm &lt; 50) {</div><div class='add'>+		if (de_digtable-&gt;last_min_undecorated_pwdb_for_dm &gt;= 50</div><div class='add'>+		    &amp;&amp; de_digtable-&gt;min_undecorated_pwdb_for_dm &lt; 50) {</div><div class='ctx'> 			rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00);</div><div class='ctx'> 			RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,</div><div class='ctx'> 				 "Early Mode Off\n");</div><div class='del'>-		} else if (de_digtable.last_min_undecorated_pwdb_for_dm &lt;= 55 &amp;&amp;</div><div class='del'>-			   de_digtable.min_undecorated_pwdb_for_dm &gt; 55) {</div><div class='add'>+		} else if (de_digtable-&gt;last_min_undecorated_pwdb_for_dm &lt;= 55 &amp;&amp;</div><div class='add'>+			   de_digtable-&gt;min_undecorated_pwdb_for_dm &gt; 55) {</div><div class='ctx'> 			rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);</div><div class='ctx'> 			RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,</div><div class='ctx'> 				 "Early Mode On\n");</div><div class='hunk'>@@ -396,14 +402,15 @@ static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv)</div><div class='ctx'> static void rtl92d_dm_dig(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='del'>-	u8 value_igi = de_digtable.cur_igvalue;</div><div class='add'>+	struct dig_t *de_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='add'>+	u8 value_igi = de_digtable-&gt;cur_igvalue;</div><div class='ctx'> 	struct false_alarm_statistics *falsealm_cnt = &amp;(rtlpriv-&gt;falsealm_cnt);</div><div class='ctx'> </div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "==&gt;\n");</div><div class='ctx'> 	if (rtlpriv-&gt;rtlhal.earlymode_enable) {</div><div class='ctx'> 		rtl92d_early_mode_enabled(rtlpriv);</div><div class='del'>-		de_digtable.last_min_undecorated_pwdb_for_dm =</div><div class='del'>-				 de_digtable.min_undecorated_pwdb_for_dm;</div><div class='add'>+		de_digtable-&gt;last_min_undecorated_pwdb_for_dm =</div><div class='add'>+				 de_digtable-&gt;min_undecorated_pwdb_for_dm;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!rtlpriv-&gt;dm.dm_initialgain_enable)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -421,9 +428,9 @@ static void rtl92d_dm_dig(struct ieee80211_hw *hw)</div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "progress\n");</div><div class='ctx'> 	/* Decide the current status and if modify initial gain or not */</div><div class='ctx'> 	if (rtlpriv-&gt;mac80211.link_state &gt;= MAC80211_LINKED)</div><div class='del'>-		de_digtable.cursta_connectctate = DIG_STA_CONNECT;</div><div class='add'>+		de_digtable-&gt;cursta_connectctate = DIG_STA_CONNECT;</div><div class='ctx'> 	else</div><div class='del'>-		de_digtable.cursta_connectctate = DIG_STA_DISCONNECT;</div><div class='add'>+		de_digtable-&gt;cursta_connectctate = DIG_STA_DISCONNECT;</div><div class='ctx'> </div><div class='ctx'> 	/* adjust initial gain according to false alarm counter */</div><div class='ctx'> 	if (falsealm_cnt-&gt;cnt_all &lt; DM_DIG_FA_TH0)</div><div class='hunk'>@@ -436,64 +443,64 @@ static void rtl92d_dm_dig(struct ieee80211_hw *hw)</div><div class='ctx'> 		value_igi += 2;</div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,</div><div class='ctx'> 		 "dm_DIG() Before: large_fa_hit=%d, forbidden_igi=%x\n",</div><div class='del'>-		 de_digtable.large_fa_hit, de_digtable.forbidden_igi);</div><div class='add'>+		 de_digtable-&gt;large_fa_hit, de_digtable-&gt;forbidden_igi);</div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,</div><div class='ctx'> 		 "dm_DIG() Before: Recover_cnt=%d, rx_gain_range_min=%x\n",</div><div class='del'>-		 de_digtable.recover_cnt, de_digtable.rx_gain_range_min);</div><div class='add'>+		 de_digtable-&gt;recover_cnt, de_digtable-&gt;rx_gain_range_min);</div><div class='ctx'> </div><div class='ctx'> 	/* deal with abnorally large false alarm */</div><div class='ctx'> 	if (falsealm_cnt-&gt;cnt_all &gt; 10000) {</div><div class='ctx'> 		RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,</div><div class='ctx'> 			 "dm_DIG(): Abnormally false alarm case\n");</div><div class='ctx'> </div><div class='del'>-		de_digtable.large_fa_hit++;</div><div class='del'>-		if (de_digtable.forbidden_igi &lt; de_digtable.cur_igvalue) {</div><div class='del'>-			de_digtable.forbidden_igi = de_digtable.cur_igvalue;</div><div class='del'>-			de_digtable.large_fa_hit = 1;</div><div class='add'>+		de_digtable-&gt;large_fa_hit++;</div><div class='add'>+		if (de_digtable-&gt;forbidden_igi &lt; de_digtable-&gt;cur_igvalue) {</div><div class='add'>+			de_digtable-&gt;forbidden_igi = de_digtable-&gt;cur_igvalue;</div><div class='add'>+			de_digtable-&gt;large_fa_hit = 1;</div><div class='ctx'> 		}</div><div class='del'>-		if (de_digtable.large_fa_hit &gt;= 3) {</div><div class='del'>-			if ((de_digtable.forbidden_igi + 1) &gt; DM_DIG_MAX)</div><div class='del'>-				de_digtable.rx_gain_range_min = DM_DIG_MAX;</div><div class='add'>+		if (de_digtable-&gt;large_fa_hit &gt;= 3) {</div><div class='add'>+			if ((de_digtable-&gt;forbidden_igi + 1) &gt; DM_DIG_MAX)</div><div class='add'>+				de_digtable-&gt;rx_gain_range_min = DM_DIG_MAX;</div><div class='ctx'> 			else</div><div class='del'>-				de_digtable.rx_gain_range_min =</div><div class='del'>-				    (de_digtable.forbidden_igi + 1);</div><div class='del'>-			de_digtable.recover_cnt = 3600;	/* 3600=2hr */</div><div class='add'>+				de_digtable-&gt;rx_gain_range_min =</div><div class='add'>+				    (de_digtable-&gt;forbidden_igi + 1);</div><div class='add'>+			de_digtable-&gt;recover_cnt = 3600;	/* 3600=2hr */</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Recovery mechanism for IGI lower bound */</div><div class='del'>-		if (de_digtable.recover_cnt != 0) {</div><div class='del'>-			de_digtable.recover_cnt--;</div><div class='add'>+		if (de_digtable-&gt;recover_cnt != 0) {</div><div class='add'>+			de_digtable-&gt;recover_cnt--;</div><div class='ctx'> 		} else {</div><div class='del'>-			if (de_digtable.large_fa_hit == 0) {</div><div class='del'>-				if ((de_digtable.forbidden_igi - 1) &lt;</div><div class='add'>+			if (de_digtable-&gt;large_fa_hit == 0) {</div><div class='add'>+				if ((de_digtable-&gt;forbidden_igi - 1) &lt;</div><div class='ctx'> 				    DM_DIG_FA_LOWER) {</div><div class='del'>-					de_digtable.forbidden_igi =</div><div class='add'>+					de_digtable-&gt;forbidden_igi =</div><div class='ctx'> 							 DM_DIG_FA_LOWER;</div><div class='del'>-					de_digtable.rx_gain_range_min =</div><div class='add'>+					de_digtable-&gt;rx_gain_range_min =</div><div class='ctx'> 							 DM_DIG_FA_LOWER;</div><div class='ctx'> </div><div class='ctx'> 				} else {</div><div class='del'>-					de_digtable.forbidden_igi--;</div><div class='del'>-					de_digtable.rx_gain_range_min =</div><div class='del'>-					    (de_digtable.forbidden_igi + 1);</div><div class='add'>+					de_digtable-&gt;forbidden_igi--;</div><div class='add'>+					de_digtable-&gt;rx_gain_range_min =</div><div class='add'>+					    (de_digtable-&gt;forbidden_igi + 1);</div><div class='ctx'> 				}</div><div class='del'>-			} else if (de_digtable.large_fa_hit == 3) {</div><div class='del'>-				de_digtable.large_fa_hit = 0;</div><div class='add'>+			} else if (de_digtable-&gt;large_fa_hit == 3) {</div><div class='add'>+				de_digtable-&gt;large_fa_hit = 0;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,</div><div class='ctx'> 		 "dm_DIG() After: large_fa_hit=%d, forbidden_igi=%x\n",</div><div class='del'>-		 de_digtable.large_fa_hit, de_digtable.forbidden_igi);</div><div class='add'>+		 de_digtable-&gt;large_fa_hit, de_digtable-&gt;forbidden_igi);</div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,</div><div class='ctx'> 		 "dm_DIG() After: recover_cnt=%d, rx_gain_range_min=%x\n",</div><div class='del'>-		 de_digtable.recover_cnt, de_digtable.rx_gain_range_min);</div><div class='add'>+		 de_digtable-&gt;recover_cnt, de_digtable-&gt;rx_gain_range_min);</div><div class='ctx'> </div><div class='ctx'> 	if (value_igi &gt; DM_DIG_MAX)</div><div class='ctx'> 		value_igi = DM_DIG_MAX;</div><div class='del'>-	else if (value_igi &lt; de_digtable.rx_gain_range_min)</div><div class='del'>-		value_igi = de_digtable.rx_gain_range_min;</div><div class='del'>-	de_digtable.cur_igvalue = value_igi;</div><div class='add'>+	else if (value_igi &lt; de_digtable-&gt;rx_gain_range_min)</div><div class='add'>+		value_igi = de_digtable-&gt;rx_gain_range_min;</div><div class='add'>+	de_digtable-&gt;cur_igvalue = value_igi;</div><div class='ctx'> 	rtl92d_dm_write_dig(hw);</div><div class='ctx'> 	if (rtlpriv-&gt;rtlhal.current_bandtype != BAND_ON_5G)</div><div class='ctx'> 		rtl92d_dm_cck_packet_detection_thresh(hw);</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/dm.h b/drivers/net/wireless/rtlwifi/rtl8192de/dm.h<br/>index 91030ec8ac3e..3fea0c11c24a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/dm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192de/dm.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/dm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/dm.h</a></div><div class='hunk'>@@ -87,55 +87,6 @@</div><div class='ctx'> #define TX_POWER_NEAR_FIELD_THRESH_LVL1		67</div><div class='ctx'> #define INDEX_MAPPING_NUM			13</div><div class='ctx'> </div><div class='del'>-struct ps_t {</div><div class='del'>-	u8 pre_ccastate;</div><div class='del'>-	u8 cur_ccasate;</div><div class='del'>-</div><div class='del'>-	u8 pre_rfstate;</div><div class='del'>-	u8 cur_rfstate;</div><div class='del'>-</div><div class='del'>-	long rssi_val_min;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct dig_t {</div><div class='del'>-	u8 dig_enable_flag;</div><div class='del'>-	u8 dig_ext_port_stage;</div><div class='del'>-</div><div class='del'>-	u32 rssi_lowthresh;</div><div class='del'>-	u32 rssi_highthresh;</div><div class='del'>-</div><div class='del'>-	u32 fa_lowthresh;</div><div class='del'>-	u32 fa_highthresh;</div><div class='del'>-</div><div class='del'>-	u8 cursta_connectctate;</div><div class='del'>-	u8 presta_connectstate;</div><div class='del'>-	u8 curmultista_connectstate;</div><div class='del'>-</div><div class='del'>-	u8 pre_igvalue;</div><div class='del'>-	u8 cur_igvalue;</div><div class='del'>-</div><div class='del'>-	char backoff_val;</div><div class='del'>-	char backoff_val_range_max;</div><div class='del'>-	char backoff_val_range_min;</div><div class='del'>-	u8 rx_gain_range_max;</div><div class='del'>-	u8 rx_gain_range_min;</div><div class='del'>-	u8 min_undecorated_pwdb_for_dm;</div><div class='del'>-	long last_min_undecorated_pwdb_for_dm;</div><div class='del'>-</div><div class='del'>-	u8 pre_cck_pd_state;</div><div class='del'>-	u8 cur_cck_pd_state;</div><div class='del'>-</div><div class='del'>-	u8 pre_cck_fa_state;</div><div class='del'>-	u8 cur_cck_fa_state;</div><div class='del'>-</div><div class='del'>-	u8 pre_ccastate;</div><div class='del'>-	u8 cur_ccasate;</div><div class='del'>-</div><div class='del'>-	u8 large_fa_hit;</div><div class='del'>-	u8 forbidden_igi;</div><div class='del'>-	u32 recover_cnt;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct swat {</div><div class='ctx'> 	u8 failure_cnt;</div><div class='ctx'> 	u8 try_flag;</div><div class='hunk'>@@ -200,8 +151,6 @@ enum dm_dig_connect {</div><div class='ctx'> 	DIG_CONNECT_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-extern struct dig_t de_digtable;</div><div class='del'>-</div><div class='ctx'> void rtl92d_dm_init(struct ieee80211_hw *hw);</div><div class='ctx'> void rtl92d_dm_watchdog(struct ieee80211_hw *hw);</div><div class='ctx'> void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw);</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/hw.c b/drivers/net/wireless/rtlwifi/rtl8192de/hw.c<br/>index 509f5af38adf..b338d526c422 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/hw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192de/hw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/hw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/hw.c</a></div><div class='hunk'>@@ -1743,9 +1743,13 @@ static void _rtl92de_efuse_update_chip_version(struct ieee80211_hw *hw)</div><div class='ctx'> 		chipver |= CHIP_92D_D_CUT;</div><div class='ctx'> 		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "D-CUT!!!\n");</div><div class='ctx'> 		break;</div><div class='add'>+	case 0xCC33:</div><div class='add'>+		chipver |= CHIP_92D_E_CUT;</div><div class='add'>+		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "E-CUT!!!\n");</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		chipver |= CHIP_92D_D_CUT;</div><div class='del'>-		RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Unkown CUT!\n");</div><div class='add'>+		RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "Unknown CUT!\n");</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	rtlpriv-&gt;rtlhal.version = chipver;</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/phy.c b/drivers/net/wireless/rtlwifi/rtl8192de/phy.c<br/>index 28fc5fb8057b..18380a7829f1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192de/phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/phy.c</a></div><div class='hunk'>@@ -3064,6 +3064,7 @@ u8 rtl92d_phy_sw_chnl(struct ieee80211_hw *hw)</div><div class='ctx'> static void rtl92d_phy_set_io(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *de_digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> 	struct rtl_phy *rtlphy = &amp;(rtlpriv-&gt;phy);</div><div class='ctx'> </div><div class='ctx'> 	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,</div><div class='hunk'>@@ -3071,13 +3072,13 @@ static void rtl92d_phy_set_io(struct ieee80211_hw *hw)</div><div class='ctx'> 		 rtlphy-&gt;current_io_type, rtlphy-&gt;set_io_inprogress);</div><div class='ctx'> 	switch (rtlphy-&gt;current_io_type) {</div><div class='ctx'> 	case IO_CMD_RESUME_DM_BY_SCAN:</div><div class='del'>-		de_digtable.cur_igvalue = rtlphy-&gt;initgain_backup.xaagccore1;</div><div class='add'>+		de_digtable-&gt;cur_igvalue = rtlphy-&gt;initgain_backup.xaagccore1;</div><div class='ctx'> 		rtl92d_dm_write_dig(hw);</div><div class='ctx'> 		rtl92d_phy_set_txpower_level(hw, rtlphy-&gt;current_channel);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IO_CMD_PAUSE_DM_BY_SCAN:</div><div class='del'>-		rtlphy-&gt;initgain_backup.xaagccore1 = de_digtable.cur_igvalue;</div><div class='del'>-		de_digtable.cur_igvalue = 0x37;</div><div class='add'>+		rtlphy-&gt;initgain_backup.xaagccore1 = de_digtable-&gt;cur_igvalue;</div><div class='add'>+		de_digtable-&gt;cur_igvalue = 0x37;</div><div class='ctx'> 		rtl92d_dm_write_dig(hw);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/trx.c b/drivers/net/wireless/rtlwifi/rtl8192de/trx.c<br/>index a7f6126e2f86..1666ef7fd87b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/trx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192de/trx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/trx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/trx.c</a></div><div class='hunk'>@@ -466,12 +466,13 @@ static void _rtl92de_translate_rx_signal_stuff(struct ieee80211_hw *hw,</div><div class='ctx'> 	type = WLAN_FC_GET_TYPE(fc);</div><div class='ctx'> 	praddr = hdr-&gt;addr1;</div><div class='ctx'> 	packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &amp;&amp;</div><div class='del'>-	     (!compare_ether_addr(mac-&gt;bssid, (cfc &amp; IEEE80211_FCTL_TODS) ?</div><div class='del'>-		  hdr-&gt;addr1 : (cfc &amp; IEEE80211_FCTL_FROMDS) ?</div><div class='del'>-		  hdr-&gt;addr2 : hdr-&gt;addr3)) &amp;&amp; (!pstats-&gt;hwerror) &amp;&amp;</div><div class='del'>-		  (!pstats-&gt;crc) &amp;&amp; (!pstats-&gt;icv));</div><div class='add'>+	     ether_addr_equal(mac-&gt;bssid,</div><div class='add'>+			      (cfc &amp; IEEE80211_FCTL_TODS) ? hdr-&gt;addr1 :</div><div class='add'>+			      (cfc &amp; IEEE80211_FCTL_FROMDS) ? hdr-&gt;addr2 :</div><div class='add'>+			      hdr-&gt;addr3) &amp;&amp;</div><div class='add'>+	     (!pstats-&gt;hwerror) &amp;&amp; (!pstats-&gt;crc) &amp;&amp; (!pstats-&gt;icv));</div><div class='ctx'> 	packet_toself = packet_matchbssid &amp;&amp;</div><div class='del'>-			(!compare_ether_addr(praddr, rtlefuse-&gt;dev_addr));</div><div class='add'>+			ether_addr_equal(praddr, rtlefuse-&gt;dev_addr);</div><div class='ctx'> 	if (ieee80211_is_beacon(fc))</div><div class='ctx'> 		packet_beacon = true;</div><div class='ctx'> 	_rtl92de_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/trx.h b/drivers/net/wireless/rtlwifi/rtl8192de/trx.h<br/>index 0dc736c2723b..057a52431b00 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/trx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192de/trx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192de/trx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192de/trx.h</a></div><div class='hunk'>@@ -530,12 +530,8 @@</div><div class='ctx'> 	SET_BITS_OFFSET_LE(__pdesc+28, 0, 32, __val)</div><div class='ctx'> </div><div class='ctx'> #define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size)	\</div><div class='del'>-do {							\</div><div class='del'>-	if (_size &gt; TX_DESC_NEXT_DESC_OFFSET)		\</div><div class='del'>-		memset((void *)__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET);	\</div><div class='del'>-	else						\</div><div class='del'>-		memset((void *)__pdesc, 0, _size);	\</div><div class='del'>-} while (0);</div><div class='add'>+	memset((void *)__pdesc, 0,			\</div><div class='add'>+	       min_t(size_t, _size, TX_DESC_NEXT_DESC_OFFSET))</div><div class='ctx'> </div><div class='ctx'> /* For 92D early mode */</div><div class='ctx'> #define SET_EARLYMODE_PKTNUM(__paddr, __value)		\</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/def.h b/drivers/net/wireless/rtlwifi/rtl8192se/def.h<br/>index d1b0a1e14971..20afec62ce05 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/def.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192se/def.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/def.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/def.h</a></div><div class='hunk'>@@ -252,12 +252,7 @@</div><div class='ctx'>  * the desc is cleared. */</div><div class='ctx'> #define	TX_DESC_NEXT_DESC_OFFSET			36</div><div class='ctx'> #define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size)		\</div><div class='del'>-do {								\</div><div class='del'>-	if (_size &gt; TX_DESC_NEXT_DESC_OFFSET)			\</div><div class='del'>-		memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET);	\</div><div class='del'>-	else							\</div><div class='del'>-		memset(__pdesc, 0, _size);			\</div><div class='del'>-} while (0);</div><div class='add'>+	memset(__pdesc, 0, min_t(size_t, _size, TX_DESC_NEXT_DESC_OFFSET))</div><div class='ctx'> </div><div class='ctx'> /* Rx Desc */</div><div class='ctx'> #define RX_STATUS_DESC_SIZE				24</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/dm.c b/drivers/net/wireless/rtlwifi/rtl8192se/dm.c<br/>index fbabae17259e..2e1158026fb7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/dm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192se/dm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/dm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/dm.c</a></div><div class='hunk'>@@ -35,7 +35,6 @@</div><div class='ctx'> #include "dm.h"</div><div class='ctx'> #include "fw.h"</div><div class='ctx'> </div><div class='del'>-struct dig_t digtable;</div><div class='ctx'> static const u32 edca_setting_dl[PEER_MAX] = {</div><div class='ctx'> 	0xa44f,		/* 0 UNKNOWN */</div><div class='ctx'> 	0x5ea44f,	/* 1 REALTEK_90 */</div><div class='hunk'>@@ -421,62 +420,64 @@ static void _rtl92s_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)</div><div class='ctx'> static void rtl92s_backoff_enable_flag(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> 	struct false_alarm_statistics *falsealm_cnt = &amp;(rtlpriv-&gt;falsealm_cnt);</div><div class='ctx'> </div><div class='del'>-	if (falsealm_cnt-&gt;cnt_all &gt; digtable.fa_highthresh) {</div><div class='del'>-		if ((digtable.backoff_val - 6) &lt;</div><div class='del'>-			digtable.backoffval_range_min)</div><div class='del'>-			digtable.backoff_val = digtable.backoffval_range_min;</div><div class='add'>+	if (falsealm_cnt-&gt;cnt_all &gt; digtable-&gt;fa_highthresh) {</div><div class='add'>+		if ((digtable-&gt;backoff_val - 6) &lt;</div><div class='add'>+			digtable-&gt;backoffval_range_min)</div><div class='add'>+			digtable-&gt;backoff_val = digtable-&gt;backoffval_range_min;</div><div class='ctx'> 		else</div><div class='del'>-			digtable.backoff_val -= 6;</div><div class='del'>-	} else if (falsealm_cnt-&gt;cnt_all &lt; digtable.fa_lowthresh) {</div><div class='del'>-		if ((digtable.backoff_val + 6) &gt;</div><div class='del'>-			digtable.backoffval_range_max)</div><div class='del'>-			digtable.backoff_val =</div><div class='del'>-				 digtable.backoffval_range_max;</div><div class='add'>+			digtable-&gt;backoff_val -= 6;</div><div class='add'>+	} else if (falsealm_cnt-&gt;cnt_all &lt; digtable-&gt;fa_lowthresh) {</div><div class='add'>+		if ((digtable-&gt;backoff_val + 6) &gt;</div><div class='add'>+			digtable-&gt;backoffval_range_max)</div><div class='add'>+			digtable-&gt;backoff_val =</div><div class='add'>+				 digtable-&gt;backoffval_range_max;</div><div class='ctx'> 		else</div><div class='del'>-			digtable.backoff_val += 6;</div><div class='add'>+			digtable-&gt;backoff_val += 6;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void _rtl92s_dm_initial_gain_sta_beforeconnect(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> 	struct false_alarm_statistics *falsealm_cnt = &amp;(rtlpriv-&gt;falsealm_cnt);</div><div class='ctx'> 	static u8 initialized, force_write;</div><div class='ctx'> 	u8 initial_gain = 0;</div><div class='ctx'> </div><div class='del'>-	if ((digtable.pre_sta_connectstate == digtable.cur_sta_connectstate) ||</div><div class='del'>-		(digtable.cur_sta_connectstate == DIG_STA_BEFORE_CONNECT)) {</div><div class='del'>-		if (digtable.cur_sta_connectstate == DIG_STA_BEFORE_CONNECT) {</div><div class='add'>+	if ((digtable-&gt;pre_sta_connectstate == digtable-&gt;cur_sta_connectstate) ||</div><div class='add'>+		(digtable-&gt;cur_sta_connectstate == DIG_STA_BEFORE_CONNECT)) {</div><div class='add'>+		if (digtable-&gt;cur_sta_connectstate == DIG_STA_BEFORE_CONNECT) {</div><div class='ctx'> 			if (rtlpriv-&gt;psc.rfpwr_state != ERFON)</div><div class='ctx'> 				return;</div><div class='ctx'> </div><div class='del'>-			if (digtable.backoff_enable_flag)</div><div class='add'>+			if (digtable-&gt;backoff_enable_flag)</div><div class='ctx'> 				rtl92s_backoff_enable_flag(hw);</div><div class='ctx'> 			else</div><div class='del'>-				digtable.backoff_val = DM_DIG_BACKOFF;</div><div class='del'>-</div><div class='del'>-			if ((digtable.rssi_val + 10 - digtable.backoff_val) &gt;</div><div class='del'>-				digtable.rx_gain_range_max)</div><div class='del'>-				digtable.cur_igvalue =</div><div class='del'>-						digtable.rx_gain_range_max;</div><div class='del'>-			else if ((digtable.rssi_val + 10 - digtable.backoff_val)</div><div class='del'>-				 &lt; digtable.rx_gain_range_min)</div><div class='del'>-				digtable.cur_igvalue =</div><div class='del'>-						digtable.rx_gain_range_min;</div><div class='add'>+				digtable-&gt;backoff_val = DM_DIG_BACKOFF;</div><div class='add'>+</div><div class='add'>+			if ((digtable-&gt;rssi_val + 10 - digtable-&gt;backoff_val) &gt;</div><div class='add'>+				digtable-&gt;rx_gain_range_max)</div><div class='add'>+				digtable-&gt;cur_igvalue =</div><div class='add'>+						digtable-&gt;rx_gain_range_max;</div><div class='add'>+			else if ((digtable-&gt;rssi_val + 10 - digtable-&gt;backoff_val)</div><div class='add'>+				 &lt; digtable-&gt;rx_gain_range_min)</div><div class='add'>+				digtable-&gt;cur_igvalue =</div><div class='add'>+						digtable-&gt;rx_gain_range_min;</div><div class='ctx'> 			else</div><div class='del'>-				digtable.cur_igvalue = digtable.rssi_val + 10 -</div><div class='del'>-						digtable.backoff_val;</div><div class='add'>+				digtable-&gt;cur_igvalue = digtable-&gt;rssi_val + 10 -</div><div class='add'>+						digtable-&gt;backoff_val;</div><div class='ctx'> </div><div class='ctx'> 			if (falsealm_cnt-&gt;cnt_all &gt; 10000)</div><div class='del'>-				digtable.cur_igvalue =</div><div class='del'>-					 (digtable.cur_igvalue &gt; 0x33) ?</div><div class='del'>-					 digtable.cur_igvalue : 0x33;</div><div class='add'>+				digtable-&gt;cur_igvalue =</div><div class='add'>+					 (digtable-&gt;cur_igvalue &gt; 0x33) ?</div><div class='add'>+					 digtable-&gt;cur_igvalue : 0x33;</div><div class='ctx'> </div><div class='ctx'> 			if (falsealm_cnt-&gt;cnt_all &gt; 16000)</div><div class='del'>-				digtable.cur_igvalue =</div><div class='del'>-						 digtable.rx_gain_range_max;</div><div class='add'>+				digtable-&gt;cur_igvalue =</div><div class='add'>+						 digtable-&gt;rx_gain_range_max;</div><div class='ctx'> 		/* connected -&gt; connected or disconnected -&gt; disconnected  */</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Firmware control DIG, do nothing in driver dm */</div><div class='hunk'>@@ -486,31 +487,31 @@ static void _rtl92s_dm_initial_gain_sta_beforeconnect(struct ieee80211_hw *hw)</div><div class='ctx'> 		 * disconnected or beforeconnect-&gt;(dis)connected */</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Enable FW DIG */</div><div class='del'>-		digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;</div><div class='add'>+		digtable-&gt;dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;</div><div class='ctx'> 		rtl92s_phy_set_fw_cmd(hw, FW_CMD_DIG_ENABLE);</div><div class='ctx'> </div><div class='del'>-		digtable.backoff_val = DM_DIG_BACKOFF;</div><div class='del'>-		digtable.cur_igvalue = rtlpriv-&gt;phy.default_initialgain[0];</div><div class='del'>-		digtable.pre_igvalue = 0;</div><div class='add'>+		digtable-&gt;backoff_val = DM_DIG_BACKOFF;</div><div class='add'>+		digtable-&gt;cur_igvalue = rtlpriv-&gt;phy.default_initialgain[0];</div><div class='add'>+		digtable-&gt;pre_igvalue = 0;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Forced writing to prevent from fw-dig overwriting. */</div><div class='del'>-	if (digtable.pre_igvalue != rtl_get_bbreg(hw, ROFDM0_XAAGCCORE1,</div><div class='add'>+	if (digtable-&gt;pre_igvalue != rtl_get_bbreg(hw, ROFDM0_XAAGCCORE1,</div><div class='ctx'> 						  MASKBYTE0))</div><div class='ctx'> 		force_write = 1;</div><div class='ctx'> </div><div class='del'>-	if ((digtable.pre_igvalue != digtable.cur_igvalue) ||</div><div class='add'>+	if ((digtable-&gt;pre_igvalue != digtable-&gt;cur_igvalue) ||</div><div class='ctx'> 	    !initialized || force_write) {</div><div class='ctx'> 		/* Disable FW DIG */</div><div class='ctx'> 		rtl92s_phy_set_fw_cmd(hw, FW_CMD_DIG_DISABLE);</div><div class='ctx'> </div><div class='del'>-		initial_gain = (u8)digtable.cur_igvalue;</div><div class='add'>+		initial_gain = (u8)digtable-&gt;cur_igvalue;</div><div class='ctx'> </div><div class='ctx'> 		/* Set initial gain. */</div><div class='ctx'> 		rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, MASKBYTE0, initial_gain);</div><div class='ctx'> 		rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, MASKBYTE0, initial_gain);</div><div class='del'>-		digtable.pre_igvalue = digtable.cur_igvalue;</div><div class='add'>+		digtable-&gt;pre_igvalue = digtable-&gt;cur_igvalue;</div><div class='ctx'> 		initialized = 1;</div><div class='ctx'> 		force_write = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -519,6 +520,7 @@ static void _rtl92s_dm_initial_gain_sta_beforeconnect(struct ieee80211_hw *hw)</div><div class='ctx'> static void _rtl92s_dm_ctrl_initgain_bytwoport(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> </div><div class='ctx'> 	if (rtlpriv-&gt;mac80211.act_scanning)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -526,17 +528,17 @@ static void _rtl92s_dm_ctrl_initgain_bytwoport(struct ieee80211_hw *hw)</div><div class='ctx'> 	/* Decide the current status and if modify initial gain or not */</div><div class='ctx'> 	if (rtlpriv-&gt;mac80211.link_state &gt;= MAC80211_LINKED ||</div><div class='ctx'> 	    rtlpriv-&gt;mac80211.opmode == NL80211_IFTYPE_ADHOC)</div><div class='del'>-		digtable.cur_sta_connectstate = DIG_STA_CONNECT;</div><div class='add'>+		digtable-&gt;cur_sta_connectstate = DIG_STA_CONNECT;</div><div class='ctx'> 	else</div><div class='del'>-		digtable.cur_sta_connectstate = DIG_STA_DISCONNECT;</div><div class='add'>+		digtable-&gt;cur_sta_connectstate = DIG_STA_DISCONNECT;</div><div class='ctx'> </div><div class='del'>-	digtable.rssi_val = rtlpriv-&gt;dm.undecorated_smoothed_pwdb;</div><div class='add'>+	digtable-&gt;rssi_val = rtlpriv-&gt;dm.undecorated_smoothed_pwdb;</div><div class='ctx'> </div><div class='ctx'> 	/* Change dig mode to rssi */</div><div class='del'>-	if (digtable.cur_sta_connectstate != DIG_STA_DISCONNECT) {</div><div class='del'>-		if (digtable.dig_twoport_algorithm ==</div><div class='add'>+	if (digtable-&gt;cur_sta_connectstate != DIG_STA_DISCONNECT) {</div><div class='add'>+		if (digtable-&gt;dig_twoport_algorithm ==</div><div class='ctx'> 		    DIG_TWO_PORT_ALGO_FALSE_ALARM) {</div><div class='del'>-			digtable.dig_twoport_algorithm = DIG_TWO_PORT_ALGO_RSSI;</div><div class='add'>+			digtable-&gt;dig_twoport_algorithm = DIG_TWO_PORT_ALGO_RSSI;</div><div class='ctx'> 			rtl92s_phy_set_fw_cmd(hw, FW_CMD_DIG_MODE_SS);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -544,13 +546,14 @@ static void _rtl92s_dm_ctrl_initgain_bytwoport(struct ieee80211_hw *hw)</div><div class='ctx'> 	_rtl92s_dm_false_alarm_counter_statistics(hw);</div><div class='ctx'> 	_rtl92s_dm_initial_gain_sta_beforeconnect(hw);</div><div class='ctx'> </div><div class='del'>-	digtable.pre_sta_connectstate = digtable.cur_sta_connectstate;</div><div class='add'>+	digtable-&gt;pre_sta_connectstate = digtable-&gt;cur_sta_connectstate;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void _rtl92s_dm_ctrl_initgain_byrssi(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='ctx'> 	struct rtl_phy *rtlphy = &amp;(rtlpriv-&gt;phy);</div><div class='add'>+	struct dig_t *digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> </div><div class='ctx'> 	/* 2T2R TP issue */</div><div class='ctx'> 	if (rtlphy-&gt;rf_type == RF_2T2R)</div><div class='hunk'>@@ -559,7 +562,7 @@ static void _rtl92s_dm_ctrl_initgain_byrssi(struct ieee80211_hw *hw)</div><div class='ctx'> 	if (!rtlpriv-&gt;dm.dm_initialgain_enable)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (digtable.dig_enable_flag == false)</div><div class='add'>+	if (digtable-&gt;dig_enable_flag == false)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	_rtl92s_dm_ctrl_initgain_bytwoport(hw);</div><div class='hunk'>@@ -639,51 +642,52 @@ static void _rtl92s_dm_dynamic_txpower(struct ieee80211_hw *hw)</div><div class='ctx'> static void _rtl92s_dm_init_dig(struct ieee80211_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable DIG scheme now.*/</div><div class='del'>-	digtable.dig_enable_flag = true;</div><div class='del'>-	digtable.backoff_enable_flag = true;</div><div class='add'>+	digtable-&gt;dig_enable_flag = true;</div><div class='add'>+	digtable-&gt;backoff_enable_flag = true;</div><div class='ctx'> </div><div class='ctx'> 	if ((rtlpriv-&gt;dm.dm_type == DM_TYPE_BYDRIVER) &amp;&amp;</div><div class='ctx'> 	    (hal_get_firmwareversion(rtlpriv) &gt;= 0x3c))</div><div class='del'>-		digtable.dig_algorithm = DIG_ALGO_BY_TOW_PORT;</div><div class='add'>+		digtable-&gt;dig_algorithm = DIG_ALGO_BY_TOW_PORT;</div><div class='ctx'> 	else</div><div class='del'>-		digtable.dig_algorithm =</div><div class='add'>+		digtable-&gt;dig_algorithm =</div><div class='ctx'> 			 DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM;</div><div class='ctx'> </div><div class='del'>-	digtable.dig_twoport_algorithm = DIG_TWO_PORT_ALGO_RSSI;</div><div class='del'>-	digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;</div><div class='del'>-	/* off=by real rssi value, on=by digtable.rssi_val for new dig */</div><div class='del'>-	digtable.dig_dbgmode = DM_DBG_OFF;</div><div class='del'>-	digtable.dig_slgorithm_switch = 0;</div><div class='add'>+	digtable-&gt;dig_twoport_algorithm = DIG_TWO_PORT_ALGO_RSSI;</div><div class='add'>+	digtable-&gt;dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;</div><div class='add'>+	/* off=by real rssi value, on=by digtable-&gt;rssi_val for new dig */</div><div class='add'>+	digtable-&gt;dig_dbgmode = DM_DBG_OFF;</div><div class='add'>+	digtable-&gt;dig_slgorithm_switch = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* 2007/10/04 MH Define init gain threshol. */</div><div class='del'>-	digtable.dig_state = DM_STA_DIG_MAX;</div><div class='del'>-	digtable.dig_highpwrstate = DM_STA_DIG_MAX;</div><div class='add'>+	digtable-&gt;dig_state = DM_STA_DIG_MAX;</div><div class='add'>+	digtable-&gt;dig_highpwrstate = DM_STA_DIG_MAX;</div><div class='ctx'> </div><div class='del'>-	digtable.cur_sta_connectstate = DIG_STA_DISCONNECT;</div><div class='del'>-	digtable.pre_sta_connectstate = DIG_STA_DISCONNECT;</div><div class='del'>-	digtable.cur_ap_connectstate = DIG_AP_DISCONNECT;</div><div class='del'>-	digtable.pre_ap_connectstate = DIG_AP_DISCONNECT;</div><div class='add'>+	digtable-&gt;cur_sta_connectstate = DIG_STA_DISCONNECT;</div><div class='add'>+	digtable-&gt;pre_sta_connectstate = DIG_STA_DISCONNECT;</div><div class='add'>+	digtable-&gt;cur_ap_connectstate = DIG_AP_DISCONNECT;</div><div class='add'>+	digtable-&gt;pre_ap_connectstate = DIG_AP_DISCONNECT;</div><div class='ctx'> </div><div class='del'>-	digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;</div><div class='del'>-	digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;</div><div class='add'>+	digtable-&gt;rssi_lowthresh = DM_DIG_THRESH_LOW;</div><div class='add'>+	digtable-&gt;rssi_highthresh = DM_DIG_THRESH_HIGH;</div><div class='ctx'> </div><div class='del'>-	digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;</div><div class='del'>-	digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;</div><div class='add'>+	digtable-&gt;fa_lowthresh = DM_FALSEALARM_THRESH_LOW;</div><div class='add'>+	digtable-&gt;fa_highthresh = DM_FALSEALARM_THRESH_HIGH;</div><div class='ctx'> </div><div class='del'>-	digtable.rssi_highpower_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;</div><div class='del'>-	digtable.rssi_highpower_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;</div><div class='add'>+	digtable-&gt;rssi_highpower_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;</div><div class='add'>+	digtable-&gt;rssi_highpower_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;</div><div class='ctx'> </div><div class='ctx'> 	/* for dig debug rssi value */</div><div class='del'>-	digtable.rssi_val = 50;</div><div class='del'>-	digtable.backoff_val = DM_DIG_BACKOFF;</div><div class='del'>-	digtable.rx_gain_range_max = DM_DIG_MAX;</div><div class='add'>+	digtable-&gt;rssi_val = 50;</div><div class='add'>+	digtable-&gt;backoff_val = DM_DIG_BACKOFF;</div><div class='add'>+	digtable-&gt;rx_gain_range_max = DM_DIG_MAX;</div><div class='ctx'> </div><div class='del'>-	digtable.rx_gain_range_min = DM_DIG_MIN;</div><div class='add'>+	digtable-&gt;rx_gain_range_min = DM_DIG_MIN;</div><div class='ctx'> </div><div class='del'>-	digtable.backoffval_range_max = DM_DIG_BACKOFF_MAX;</div><div class='del'>-	digtable.backoffval_range_min = DM_DIG_BACKOFF_MIN;</div><div class='add'>+	digtable-&gt;backoffval_range_max = DM_DIG_BACKOFF_MAX;</div><div class='add'>+	digtable-&gt;backoffval_range_min = DM_DIG_BACKOFF_MIN;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void _rtl92s_dm_init_dynamic_txpower(struct ieee80211_hw *hw)</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/dm.h b/drivers/net/wireless/rtlwifi/rtl8192se/dm.h<br/>index e1b19a641765..2e9052c8fe4b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/dm.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192se/dm.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/dm.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/dm.h</a></div><div class='hunk'>@@ -29,48 +29,6 @@</div><div class='ctx'> #ifndef	__RTL_92S_DM_H__</div><div class='ctx'> #define __RTL_92S_DM_H__</div><div class='ctx'> </div><div class='del'>-struct dig_t {</div><div class='del'>-	u8 dig_enable_flag;</div><div class='del'>-	u8 dig_algorithm;</div><div class='del'>-	u8 dig_twoport_algorithm;</div><div class='del'>-	u8 dig_ext_port_stage;</div><div class='del'>-	u8 dig_dbgmode;</div><div class='del'>-	u8 dig_slgorithm_switch;</div><div class='del'>-</div><div class='del'>-	long rssi_lowthresh;</div><div class='del'>-	long rssi_highthresh;</div><div class='del'>-</div><div class='del'>-	u32 fa_lowthresh;</div><div class='del'>-	u32 fa_highthresh;</div><div class='del'>-</div><div class='del'>-	long rssi_highpower_lowthresh;</div><div class='del'>-	long rssi_highpower_highthresh;</div><div class='del'>-</div><div class='del'>-	u8 dig_state;</div><div class='del'>-	u8 dig_highpwrstate;</div><div class='del'>-	u8 cur_sta_connectstate;</div><div class='del'>-	u8 pre_sta_connectstate;</div><div class='del'>-	u8 cur_ap_connectstate;</div><div class='del'>-	u8 pre_ap_connectstate;</div><div class='del'>-</div><div class='del'>-	u8 cur_pd_thstate;</div><div class='del'>-	u8 pre_pd_thstate;</div><div class='del'>-	u8 cur_cs_ratiostate;</div><div class='del'>-	u8 pre_cs_ratiostate;</div><div class='del'>-</div><div class='del'>-	u32 pre_igvalue;</div><div class='del'>-	u32	cur_igvalue;</div><div class='del'>-</div><div class='del'>-	u8 backoff_enable_flag;</div><div class='del'>-	char backoff_val;</div><div class='del'>-	char backoffval_range_max;</div><div class='del'>-	char backoffval_range_min;</div><div class='del'>-	u8 rx_gain_range_max;</div><div class='del'>-	u8 rx_gain_range_min;</div><div class='del'>-</div><div class='del'>-	long rssi_val;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> enum dm_dig_alg {</div><div class='ctx'> 	DIG_ALGO_BY_FALSE_ALARM = 0,</div><div class='ctx'> 	DIG_ALGO_BY_RSSI	= 1,</div><div class='hunk'>@@ -154,8 +112,6 @@ enum dm_ratr_sta {</div><div class='ctx'> #define	DM_DIG_BACKOFF_MAX		12</div><div class='ctx'> #define	DM_DIG_BACKOFF_MIN		-4</div><div class='ctx'> </div><div class='del'>-extern struct dig_t digtable;</div><div class='del'>-</div><div class='ctx'> void rtl92s_dm_watchdog(struct ieee80211_hw *hw);</div><div class='ctx'> void rtl92s_dm_init(struct ieee80211_hw *hw);</div><div class='ctx'> void rtl92s_dm_init_edca_turbo(struct ieee80211_hw *hw);</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/fw.h b/drivers/net/wireless/rtlwifi/rtl8192se/fw.h<br/>index b4afff626437..d53f4332464d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/fw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192se/fw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/fw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/fw.h</a></div><div class='hunk'>@@ -345,7 +345,7 @@ enum fw_h2c_cmd {</div><div class='ctx'> 	do {							\</div><div class='ctx'> 		udelay(1000);					\</div><div class='ctx'> 		rtlpriv-&gt;rtlhal.fwcmd_iomap &amp;= (~_Bit);		\</div><div class='del'>-	} while (0);</div><div class='add'>+	} while (0)</div><div class='ctx'> </div><div class='ctx'> #define FW_CMD_IO_UPDATE(rtlpriv, _val)				\</div><div class='ctx'> 	rtlpriv-&gt;rtlhal.fwcmd_iomap = _val;</div><div class='hunk'>@@ -354,13 +354,13 @@ enum fw_h2c_cmd {</div><div class='ctx'> 	do {							\</div><div class='ctx'> 		rtl_write_word(rtlpriv, LBUS_MON_ADDR, (u16)_val);	\</div><div class='ctx'> 		FW_CMD_IO_UPDATE(rtlpriv, _val);		\</div><div class='del'>-	} while (0);</div><div class='add'>+	} while (0)</div><div class='ctx'> </div><div class='ctx'> #define FW_CMD_PARA_SET(rtlpriv, _val)				\</div><div class='ctx'> 	do {							\</div><div class='ctx'> 		rtl_write_dword(rtlpriv, LBUS_ADDR_MASK, _val);	\</div><div class='ctx'> 		rtlpriv-&gt;rtlhal.fwcmd_ioparam = _val;		\</div><div class='del'>-	} while (0);</div><div class='add'>+	} while (0)</div><div class='ctx'> </div><div class='ctx'> #define FW_CMD_IO_QUERY(rtlpriv)				\</div><div class='ctx'> 	(u16)(rtlpriv-&gt;rtlhal.fwcmd_iomap)</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/phy.c b/drivers/net/wireless/rtlwifi/rtl8192se/phy.c<br/>index 4a499928e4c6..8d7099bc472c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192se/phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/phy.c</a></div><div class='hunk'>@@ -1450,6 +1450,7 @@ static void _rtl92s_phy_set_fwcmd_io(struct ieee80211_hw *hw)</div><div class='ctx'> bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl_priv *rtlpriv = rtl_priv(hw);</div><div class='add'>+	struct dig_t *digtable = &amp;rtlpriv-&gt;dm_digtable;</div><div class='ctx'> 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));</div><div class='ctx'> 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));</div><div class='ctx'> 	u32	fw_param = FW_CMD_IO_PARA_QUERY(rtlpriv);</div><div class='hunk'>@@ -1588,16 +1589,16 @@ bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)</div><div class='ctx'> 				      FW_SS_CTL);</div><div class='ctx'> </div><div class='ctx'> 			if (rtlpriv-&gt;dm.dm_flag &amp; HAL_DM_DIG_DISABLE ||</div><div class='del'>-				!digtable.dig_enable_flag)</div><div class='add'>+				!digtable-&gt;dig_enable_flag)</div><div class='ctx'> 				fw_cmdmap &amp;= ~FW_DIG_ENABLE_CTL;</div><div class='ctx'> </div><div class='ctx'> 			if ((rtlpriv-&gt;dm.dm_flag &amp; HAL_DM_HIPWR_DISABLE) ||</div><div class='ctx'> 			    rtlpriv-&gt;dm.dynamic_txpower_enable)</div><div class='ctx'> 				fw_cmdmap &amp;= ~FW_HIGH_PWR_ENABLE_CTL;</div><div class='ctx'> </div><div class='del'>-			if ((digtable.dig_ext_port_stage ==</div><div class='add'>+			if ((digtable-&gt;dig_ext_port_stage ==</div><div class='ctx'> 			    DIG_EXT_PORT_STAGE_0) ||</div><div class='del'>-			    (digtable.dig_ext_port_stage ==</div><div class='add'>+			    (digtable-&gt;dig_ext_port_stage ==</div><div class='ctx'> 			    DIG_EXT_PORT_STAGE_1))</div><div class='ctx'> 				fw_cmdmap &amp;= ~FW_DIG_ENABLE_CTL;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/sw.c b/drivers/net/wireless/rtlwifi/rtl8192se/sw.c<br/>index f1b36005c6a2..730bcc919529 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/sw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192se/sw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/sw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/sw.c</a></div><div class='hunk'>@@ -450,21 +450,4 @@ static struct pci_driver rtl92se_driver = {</div><div class='ctx'> 	.driver.pm = &amp;rtlwifi_pm_ops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init rtl92se_module_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	ret = pci_register_driver(&amp;rtl92se_driver);</div><div class='del'>-	if (ret)</div><div class='del'>-		RT_ASSERT(false, "No device found\n");</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit rtl92se_module_exit(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;rtl92se_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(rtl92se_module_init);</div><div class='del'>-module_exit(rtl92se_module_exit);</div><div class='add'>+module_pci_driver(rtl92se_driver);</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/trx.c b/drivers/net/wireless/rtlwifi/rtl8192se/trx.c<br/>index 2fd3d13b7ced..812b5858f14a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/trx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/rtl8192se/trx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/rtl8192se/trx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/rtl8192se/trx.c</a></div><div class='hunk'>@@ -492,13 +492,14 @@ static void _rtl92se_translate_rx_signal_stuff(struct ieee80211_hw *hw,</div><div class='ctx'> 	praddr = hdr-&gt;addr1;</div><div class='ctx'> </div><div class='ctx'> 	packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &amp;&amp;</div><div class='del'>-	     (!compare_ether_addr(mac-&gt;bssid, (cfc &amp; IEEE80211_FCTL_TODS) ?</div><div class='del'>-			hdr-&gt;addr1 : (cfc &amp; IEEE80211_FCTL_FROMDS) ?</div><div class='del'>-			hdr-&gt;addr2 : hdr-&gt;addr3)) &amp;&amp; (!pstats-&gt;hwerror) &amp;&amp;</div><div class='del'>-			(!pstats-&gt;crc) &amp;&amp; (!pstats-&gt;icv));</div><div class='add'>+	     ether_addr_equal(mac-&gt;bssid,</div><div class='add'>+			      (cfc &amp; IEEE80211_FCTL_TODS) ? hdr-&gt;addr1 :</div><div class='add'>+			      (cfc &amp; IEEE80211_FCTL_FROMDS) ? hdr-&gt;addr2 :</div><div class='add'>+			      hdr-&gt;addr3) &amp;&amp;</div><div class='add'>+	     (!pstats-&gt;hwerror) &amp;&amp; (!pstats-&gt;crc) &amp;&amp; (!pstats-&gt;icv));</div><div class='ctx'> </div><div class='ctx'> 	packet_toself = packet_matchbssid &amp;&amp;</div><div class='del'>-	    (!compare_ether_addr(praddr, rtlefuse-&gt;dev_addr));</div><div class='add'>+	    ether_addr_equal(praddr, rtlefuse-&gt;dev_addr);</div><div class='ctx'> </div><div class='ctx'> 	if (ieee80211_is_beacon(fc))</div><div class='ctx'> 		packet_beacon = true;</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/usb.c b/drivers/net/wireless/rtlwifi/usb.c<br/>index d04dbda13f5a..a6049d7d51b3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/usb.c</a></div><div class='hunk'>@@ -971,11 +971,6 @@ int __devinit rtl_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 	rtlpriv-&gt;cfg-&gt;ops-&gt;read_chip_version(hw);</div><div class='ctx'> 	/*like read eeprom and so on */</div><div class='ctx'> 	rtlpriv-&gt;cfg-&gt;ops-&gt;read_eeprom_info(hw);</div><div class='del'>-	if (rtlpriv-&gt;cfg-&gt;ops-&gt;init_sw_vars(hw)) {</div><div class='del'>-		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");</div><div class='del'>-		goto error_out;</div><div class='del'>-	}</div><div class='del'>-	rtlpriv-&gt;cfg-&gt;ops-&gt;init_sw_leds(hw);</div><div class='ctx'> 	err = _rtl_usb_init(hw);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto error_out;</div><div class='hunk'>@@ -987,6 +982,11 @@ int __devinit rtl_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 			 "Can't allocate sw for mac80211\n");</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> 	}</div><div class='add'>+	if (rtlpriv-&gt;cfg-&gt;ops-&gt;init_sw_vars(hw)) {</div><div class='add'>+		RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");</div><div class='add'>+		goto error_out;</div><div class='add'>+	}</div><div class='add'>+	rtlpriv-&gt;cfg-&gt;ops-&gt;init_sw_leds(hw);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> error_out:</div><div class='head'>diff --git a/drivers/net/wireless/rtlwifi/wifi.h b/drivers/net/wireless/rtlwifi/wifi.h<br/>index 28ebc69218a3..bd816aef26dc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/wifi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/rtlwifi/wifi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/rtlwifi/wifi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/rtlwifi/wifi.h</a></div><div class='hunk'>@@ -1592,6 +1592,65 @@ struct rtl_debug {</div><div class='ctx'> 	char proc_name[20];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ps_t {</div><div class='add'>+	u8 pre_ccastate;</div><div class='add'>+	u8 cur_ccasate;</div><div class='add'>+	u8 pre_rfstate;</div><div class='add'>+	u8 cur_rfstate;</div><div class='add'>+	long rssi_val_min;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dig_t {</div><div class='add'>+	u32 rssi_lowthresh;</div><div class='add'>+	u32 rssi_highthresh;</div><div class='add'>+	u32 fa_lowthresh;</div><div class='add'>+	u32 fa_highthresh;</div><div class='add'>+	long last_min_undecorated_pwdb_for_dm;</div><div class='add'>+	long rssi_highpower_lowthresh;</div><div class='add'>+	long rssi_highpower_highthresh;</div><div class='add'>+	u32 recover_cnt;</div><div class='add'>+	u32 pre_igvalue;</div><div class='add'>+	u32 cur_igvalue;</div><div class='add'>+	long rssi_val;</div><div class='add'>+	u8 dig_enable_flag;</div><div class='add'>+	u8 dig_ext_port_stage;</div><div class='add'>+	u8 dig_algorithm;</div><div class='add'>+	u8 dig_twoport_algorithm;</div><div class='add'>+	u8 dig_dbgmode;</div><div class='add'>+	u8 dig_slgorithm_switch;</div><div class='add'>+	u8 cursta_connectctate;</div><div class='add'>+	u8 presta_connectstate;</div><div class='add'>+	u8 curmultista_connectstate;</div><div class='add'>+	char backoff_val;</div><div class='add'>+	char backoff_val_range_max;</div><div class='add'>+	char backoff_val_range_min;</div><div class='add'>+	u8 rx_gain_range_max;</div><div class='add'>+	u8 rx_gain_range_min;</div><div class='add'>+	u8 min_undecorated_pwdb_for_dm;</div><div class='add'>+	u8 rssi_val_min;</div><div class='add'>+	u8 pre_cck_pd_state;</div><div class='add'>+	u8 cur_cck_pd_state;</div><div class='add'>+	u8 pre_cck_fa_state;</div><div class='add'>+	u8 cur_cck_fa_state;</div><div class='add'>+	u8 pre_ccastate;</div><div class='add'>+	u8 cur_ccasate;</div><div class='add'>+	u8 large_fa_hit;</div><div class='add'>+	u8 forbidden_igi;</div><div class='add'>+	u8 dig_state;</div><div class='add'>+	u8 dig_highpwrstate;</div><div class='add'>+	u8 cur_sta_connectstate;</div><div class='add'>+	u8 pre_sta_connectstate;</div><div class='add'>+	u8 cur_ap_connectstate;</div><div class='add'>+	u8 pre_ap_connectstate;</div><div class='add'>+	u8 cur_pd_thstate;</div><div class='add'>+	u8 pre_pd_thstate;</div><div class='add'>+	u8 cur_cs_ratiostate;</div><div class='add'>+	u8 pre_cs_ratiostate;</div><div class='add'>+	u8 backoff_enable_flag;</div><div class='add'>+	char backoffval_range_max;</div><div class='add'>+	char backoffval_range_min;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct rtl_priv {</div><div class='ctx'> 	struct completion firmware_loading_complete;</div><div class='ctx'> 	struct rtl_locks locks;</div><div class='hunk'>@@ -1629,6 +1688,10 @@ struct rtl_priv {</div><div class='ctx'> 	   interface or hardware */</div><div class='ctx'> 	unsigned long status;</div><div class='ctx'> </div><div class='add'>+	/* tables for dm */</div><div class='add'>+	struct dig_t dm_digtable;</div><div class='add'>+	struct ps_t dm_pstable;</div><div class='add'>+</div><div class='ctx'> 	/* data buffer pointer for USB reads */</div><div class='ctx'> 	__le32 *usb_data;</div><div class='ctx'> 	int usb_data_index;</div><div class='hunk'>@@ -1958,37 +2021,35 @@ static inline void rtl_write_dword(struct rtl_priv *rtlpriv,</div><div class='ctx'> static inline u32 rtl_get_bbreg(struct ieee80211_hw *hw,</div><div class='ctx'> 				u32 regaddr, u32 bitmask)</div><div class='ctx'> {</div><div class='del'>-	return ((struct rtl_priv *)(hw)-&gt;priv)-&gt;cfg-&gt;ops-&gt;get_bbreg(hw,</div><div class='del'>-								    regaddr,</div><div class='del'>-								    bitmask);</div><div class='add'>+	struct rtl_priv *rtlpriv = hw-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return rtlpriv-&gt;cfg-&gt;ops-&gt;get_bbreg(hw, regaddr, bitmask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void rtl_set_bbreg(struct ieee80211_hw *hw, u32 regaddr,</div><div class='ctx'> 				 u32 bitmask, u32 data)</div><div class='ctx'> {</div><div class='del'>-	((struct rtl_priv *)(hw)-&gt;priv)-&gt;cfg-&gt;ops-&gt;set_bbreg(hw,</div><div class='del'>-							     regaddr, bitmask,</div><div class='del'>-							     data);</div><div class='add'>+	struct rtl_priv *rtlpriv = hw-&gt;priv;</div><div class='ctx'> </div><div class='add'>+	rtlpriv-&gt;cfg-&gt;ops-&gt;set_bbreg(hw, regaddr, bitmask, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u32 rtl_get_rfreg(struct ieee80211_hw *hw,</div><div class='ctx'> 				enum radio_path rfpath, u32 regaddr,</div><div class='ctx'> 				u32 bitmask)</div><div class='ctx'> {</div><div class='del'>-	return ((struct rtl_priv *)(hw)-&gt;priv)-&gt;cfg-&gt;ops-&gt;get_rfreg(hw,</div><div class='del'>-								    rfpath,</div><div class='del'>-								    regaddr,</div><div class='del'>-								    bitmask);</div><div class='add'>+	struct rtl_priv *rtlpriv = hw-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return rtlpriv-&gt;cfg-&gt;ops-&gt;get_rfreg(hw, rfpath, regaddr, bitmask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void rtl_set_rfreg(struct ieee80211_hw *hw,</div><div class='ctx'> 				 enum radio_path rfpath, u32 regaddr,</div><div class='ctx'> 				 u32 bitmask, u32 data)</div><div class='ctx'> {</div><div class='del'>-	((struct rtl_priv *)(hw)-&gt;priv)-&gt;cfg-&gt;ops-&gt;set_rfreg(hw,</div><div class='del'>-							     rfpath, regaddr,</div><div class='del'>-							     bitmask, data);</div><div class='add'>+	struct rtl_priv *rtlpriv = hw-&gt;priv;</div><div class='add'>+</div><div class='add'>+	rtlpriv-&gt;cfg-&gt;ops-&gt;set_rfreg(hw, rfpath, regaddr, bitmask, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool is_hal_stop(struct rtl_hal *rtlhal)</div><div class='head'>diff --git a/drivers/net/wireless/ti/Kconfig b/drivers/net/wireless/ti/Kconfig<br/>new file mode 100644<br/>index 000000000000..1a72932e2213<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+menuconfig WL_TI</div><div class='add'>+	bool "TI Wireless LAN support"</div><div class='add'>+	---help---</div><div class='add'>+	  This section contains support for all the wireless drivers</div><div class='add'>+	  for Texas Instruments WLAN chips, such as wl1251 and the wl12xx</div><div class='add'>+	  family.</div><div class='add'>+</div><div class='add'>+if WL_TI</div><div class='add'>+source "drivers/net/wireless/ti/wl1251/Kconfig"</div><div class='add'>+source "drivers/net/wireless/ti/wl12xx/Kconfig"</div><div class='add'>+</div><div class='add'>+# keep last for automatic dependencies</div><div class='add'>+source "drivers/net/wireless/ti/wlcore/Kconfig"</div><div class='add'>+endif # WL_TI</div><div class='head'>diff --git a/drivers/net/wireless/ti/Makefile b/drivers/net/wireless/ti/Makefile<br/>new file mode 100644<br/>index 000000000000..0a565622d4a4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/Makefile</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+obj-$(CONFIG_WLCORE)			+= wlcore/</div><div class='add'>+obj-$(CONFIG_WL12XX)			+= wl12xx/</div><div class='add'>+obj-$(CONFIG_WL12XX_PLATFORM_DATA)	+= wlcore/</div><div class='add'>+obj-$(CONFIG_WL1251)			+= wl1251/</div><div class='head'>diff --git a/drivers/net/wireless/wl1251/Kconfig b/drivers/net/wireless/ti/wl1251/Kconfig<br/>index 1fb65849414f..1fb65849414f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/Kconfig</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/Makefile b/drivers/net/wireless/ti/wl1251/Makefile<br/>index a5c6328b5f72..a5c6328b5f72 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/Makefile</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/acx.c b/drivers/net/wireless/ti/wl1251/acx.c<br/>index ad87a1ac6462..ad87a1ac6462 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/acx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/acx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/acx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/acx.c</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/acx.h b/drivers/net/wireless/ti/wl1251/acx.h<br/>index c2ba100f9b1a..c2ba100f9b1a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/acx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/acx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/acx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/acx.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/boot.c b/drivers/net/wireless/ti/wl1251/boot.c<br/>index a2e5241382da..a2e5241382da 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/boot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/boot.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/boot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/boot.c</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/boot.h b/drivers/net/wireless/ti/wl1251/boot.h<br/>index 7661bc5e4662..7661bc5e4662 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/boot.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/boot.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/boot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/boot.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/cmd.c b/drivers/net/wireless/ti/wl1251/cmd.c<br/>index d14d69d733a0..d14d69d733a0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/cmd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/cmd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/cmd.c</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/cmd.h b/drivers/net/wireless/ti/wl1251/cmd.h<br/>index ee4f2b391822..ee4f2b391822 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/cmd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/cmd.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/cmd.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/debugfs.c b/drivers/net/wireless/ti/wl1251/debugfs.c<br/>index 448da1f8c22f..448da1f8c22f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/debugfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/debugfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/debugfs.c</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/debugfs.h b/drivers/net/wireless/ti/wl1251/debugfs.h<br/>index b3417c02a218..b3417c02a218 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/debugfs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/debugfs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/debugfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/debugfs.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/event.c b/drivers/net/wireless/ti/wl1251/event.c<br/>index 9f15ccaf8f05..9f15ccaf8f05 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/event.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/event.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/event.c</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/event.h b/drivers/net/wireless/ti/wl1251/event.h<br/>index 30eb5d150bf7..30eb5d150bf7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/event.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/event.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/event.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/init.c b/drivers/net/wireless/ti/wl1251/init.c<br/>index 89b43d35473c..89b43d35473c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/init.c</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/init.h b/drivers/net/wireless/ti/wl1251/init.h<br/>index 543f17582ead..543f17582ead 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/init.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/init.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/init.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/init.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/io.c b/drivers/net/wireless/ti/wl1251/io.c<br/>index cdcadbf6ac2c..cdcadbf6ac2c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/io.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/io.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/io.c</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/io.h b/drivers/net/wireless/ti/wl1251/io.h<br/>index d382877c34cc..d382877c34cc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/io.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/io.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/io.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/main.c b/drivers/net/wireless/ti/wl1251/main.c<br/>index 41302c7b1ad0..d1afb8e3b2ef 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/main.c</a></div><div class='hunk'>@@ -479,6 +479,7 @@ static void wl1251_op_stop(struct ieee80211_hw *hw)</div><div class='ctx'> 	cancel_work_sync(&amp;wl-&gt;irq_work);</div><div class='ctx'> 	cancel_work_sync(&amp;wl-&gt;tx_work);</div><div class='ctx'> 	cancel_work_sync(&amp;wl-&gt;filter_work);</div><div class='add'>+	cancel_delayed_work_sync(&amp;wl-&gt;elp_work);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;wl-&gt;mutex);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/wl1251/ps.c b/drivers/net/wireless/ti/wl1251/ps.c<br/>index db719f7d2692..db719f7d2692 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/ps.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/ps.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/ps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/ps.c</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/ps.h b/drivers/net/wireless/ti/wl1251/ps.h<br/>index 75efad246d67..75efad246d67 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/ps.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/ps.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/ps.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/ps.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/reg.h b/drivers/net/wireless/ti/wl1251/reg.h<br/>index a5809019c5c1..a5809019c5c1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/reg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/reg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/reg.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/rx.c b/drivers/net/wireless/ti/wl1251/rx.c<br/>index 6af35265c900..6af35265c900 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/rx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/rx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/rx.c</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/rx.h b/drivers/net/wireless/ti/wl1251/rx.h<br/>index 4448f635a4d8..4448f635a4d8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/rx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/rx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/rx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/rx.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/sdio.c b/drivers/net/wireless/ti/wl1251/sdio.c<br/>index f78694295c39..e2750a12c6f1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/sdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/sdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/sdio.c</a></div><div class='hunk'>@@ -260,6 +260,7 @@ static int wl1251_sdio_probe(struct sdio_func *func,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (wl-&gt;irq) {</div><div class='add'>+		irq_set_status_flags(wl-&gt;irq, IRQ_NOAUTOEN);</div><div class='ctx'> 		ret = request_irq(wl-&gt;irq, wl1251_line_irq, 0, "wl1251", wl);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			wl1251_error("request_irq() failed: %d", ret);</div><div class='hunk'>@@ -267,7 +268,6 @@ static int wl1251_sdio_probe(struct sdio_func *func,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		irq_set_irq_type(wl-&gt;irq, IRQ_TYPE_EDGE_RISING);</div><div class='del'>-		disable_irq(wl-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 		wl1251_sdio_ops.enable_irq = wl1251_enable_line_irq;</div><div class='ctx'> 		wl1251_sdio_ops.disable_irq = wl1251_disable_line_irq;</div><div class='hunk'>@@ -315,8 +315,8 @@ static void __devexit wl1251_sdio_remove(struct sdio_func *func)</div><div class='ctx'> </div><div class='ctx'> 	if (wl-&gt;irq)</div><div class='ctx'> 		free_irq(wl-&gt;irq, wl);</div><div class='del'>-	kfree(wl_sdio);</div><div class='ctx'> 	wl1251_free_hw(wl);</div><div class='add'>+	kfree(wl_sdio);</div><div class='ctx'> </div><div class='ctx'> 	sdio_claim_host(func);</div><div class='ctx'> 	sdio_release_irq(func);</div><div class='head'>diff --git a/drivers/net/wireless/wl1251/spi.c b/drivers/net/wireless/ti/wl1251/spi.c<br/>index 6248c354fc5c..87f6305bda2c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/spi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/spi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/spi.c</a></div><div class='hunk'>@@ -281,6 +281,7 @@ static int __devinit wl1251_spi_probe(struct spi_device *spi)</div><div class='ctx'> </div><div class='ctx'> 	wl-&gt;use_eeprom = pdata-&gt;use_eeprom;</div><div class='ctx'> </div><div class='add'>+	irq_set_status_flags(wl-&gt;irq, IRQ_NOAUTOEN);</div><div class='ctx'> 	ret = request_irq(wl-&gt;irq, wl1251_irq, 0, DRIVER_NAME, wl);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		wl1251_error("request_irq() failed: %d", ret);</div><div class='hunk'>@@ -289,8 +290,6 @@ static int __devinit wl1251_spi_probe(struct spi_device *spi)</div><div class='ctx'> </div><div class='ctx'> 	irq_set_irq_type(wl-&gt;irq, IRQ_TYPE_EDGE_RISING);</div><div class='ctx'> </div><div class='del'>-	disable_irq(wl-&gt;irq);</div><div class='del'>-</div><div class='ctx'> 	ret = wl1251_init_ieee80211(wl);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_irq;</div><div class='head'>diff --git a/drivers/net/wireless/wl1251/spi.h b/drivers/net/wireless/ti/wl1251/spi.h<br/>index 16d506955cc0..16d506955cc0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/spi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/spi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/spi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/spi.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/tx.c b/drivers/net/wireless/ti/wl1251/tx.c<br/>index 28121c590a2b..28121c590a2b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/tx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/tx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/tx.c</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/tx.h b/drivers/net/wireless/ti/wl1251/tx.h<br/>index 81338d39b43e..81338d39b43e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/tx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/tx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/tx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/tx.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/wl1251.h b/drivers/net/wireless/ti/wl1251/wl1251.h<br/>index 9d8f5816c6f9..9d8f5816c6f9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/wl1251.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/wl1251.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/wl1251.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/wl1251.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl1251/wl12xx_80211.h b/drivers/net/wireless/ti/wl1251/wl12xx_80211.h<br/>index 04ed51495772..04ed51495772 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl1251/wl12xx_80211.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl1251/wl12xx_80211.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl1251/wl12xx_80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl1251/wl12xx_80211.h</a></div><div class='head'>diff --git a/drivers/net/wireless/ti/wl12xx/Kconfig b/drivers/net/wireless/ti/wl12xx/Kconfig<br/>new file mode 100644<br/>index 000000000000..c2183594655a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl12xx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+config WL12XX</div><div class='add'>+       tristate "TI wl12xx support"</div><div class='add'>+	depends on MAC80211</div><div class='add'>+       select WLCORE</div><div class='add'>+       ---help---</div><div class='add'>+	  This module adds support for wireless adapters based on TI wl1271,</div><div class='add'>+	  wl1273, wl1281 and wl1283 chipsets. This module does *not* include</div><div class='add'>+	  support for wl1251.  For wl1251 support, use the separate homonymous</div><div class='add'>+	   driver instead.</div><div class='head'>diff --git a/drivers/net/wireless/ti/wl12xx/Makefile b/drivers/net/wireless/ti/wl12xx/Makefile<br/>new file mode 100644<br/>index 000000000000..87f64b14db35<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl12xx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/Makefile</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+wl12xx-objs	= main.o cmd.o acx.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_WL12XX)		+= wl12xx.o</div><div class='head'>diff --git a/drivers/net/wireless/ti/wl12xx/acx.c b/drivers/net/wireless/ti/wl12xx/acx.c<br/>new file mode 100644<br/>index 000000000000..bea06b2d7bf4<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl12xx/acx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/acx.c</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is part of wl12xx</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2008-2009 Nokia Corporation</div><div class='add'>+ * Copyright (C) 2011 Texas Instruments Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "../wlcore/cmd.h"</div><div class='add'>+#include "../wlcore/debug.h"</div><div class='add'>+#include "../wlcore/acx.h"</div><div class='add'>+</div><div class='add'>+#include "acx.h"</div><div class='add'>+</div><div class='add'>+int wl1271_acx_host_if_cfg_bitmap(struct wl1271 *wl, u32 host_cfg_bitmap)</div><div class='add'>+{</div><div class='add'>+	struct wl1271_acx_host_config_bitmap *bitmap_conf;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	bitmap_conf = kzalloc(sizeof(*bitmap_conf), GFP_KERNEL);</div><div class='add'>+	if (!bitmap_conf) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bitmap_conf-&gt;host_cfg_bitmap = cpu_to_le32(host_cfg_bitmap);</div><div class='add'>+</div><div class='add'>+	ret = wl1271_cmd_configure(wl, ACX_HOST_IF_CFG_BITMAP,</div><div class='add'>+				   bitmap_conf, sizeof(*bitmap_conf));</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		wl1271_warning("wl1271 bitmap config opt failed: %d", ret);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree(bitmap_conf);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/wireless/ti/wl12xx/acx.h b/drivers/net/wireless/ti/wl12xx/acx.h<br/>new file mode 100644<br/>index 000000000000..d1f5aba0afce<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl12xx/acx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/acx.h</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is part of wl12xx</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 1998-2009, 2011 Texas Instruments. All rights reserved.</div><div class='add'>+ * Copyright (C) 2008-2010 Nokia Corporation</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __WL12XX_ACX_H__</div><div class='add'>+#define __WL12XX_ACX_H__</div><div class='add'>+</div><div class='add'>+#include "../wlcore/wlcore.h"</div><div class='add'>+</div><div class='add'>+struct wl1271_acx_host_config_bitmap {</div><div class='add'>+	struct acx_header header;</div><div class='add'>+</div><div class='add'>+	__le32 host_cfg_bitmap;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+int wl1271_acx_host_if_cfg_bitmap(struct wl1271 *wl, u32 host_cfg_bitmap);</div><div class='add'>+</div><div class='add'>+#endif /* __WL12XX_ACX_H__ */</div><div class='head'>diff --git a/drivers/net/wireless/ti/wl12xx/cmd.c b/drivers/net/wireless/ti/wl12xx/cmd.c<br/>new file mode 100644<br/>index 000000000000..8ffaeb5f2147<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl12xx/cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/cmd.c</a></div><div class='hunk'>@@ -0,0 +1,254 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is part of wl12xx</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2009-2010 Nokia Corporation</div><div class='add'>+ * Copyright (C) 2011 Texas Instruments Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "../wlcore/cmd.h"</div><div class='add'>+#include "../wlcore/debug.h"</div><div class='add'>+</div><div class='add'>+#include "wl12xx.h"</div><div class='add'>+#include "cmd.h"</div><div class='add'>+</div><div class='add'>+int wl1271_cmd_ext_radio_parms(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	struct wl1271_ext_radio_parms_cmd *ext_radio_parms;</div><div class='add'>+	struct wl12xx_priv *priv = wl-&gt;priv;</div><div class='add'>+	struct wl12xx_conf_rf *rf = &amp;priv-&gt;conf.rf;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!wl-&gt;nvs)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	ext_radio_parms = kzalloc(sizeof(*ext_radio_parms), GFP_KERNEL);</div><div class='add'>+	if (!ext_radio_parms)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ext_radio_parms-&gt;test.id = TEST_CMD_INI_FILE_RF_EXTENDED_PARAM;</div><div class='add'>+</div><div class='add'>+	memcpy(ext_radio_parms-&gt;tx_per_channel_power_compensation_2,</div><div class='add'>+	       rf-&gt;tx_per_channel_power_compensation_2,</div><div class='add'>+	       CONF_TX_PWR_COMPENSATION_LEN_2);</div><div class='add'>+	memcpy(ext_radio_parms-&gt;tx_per_channel_power_compensation_5,</div><div class='add'>+	       rf-&gt;tx_per_channel_power_compensation_5,</div><div class='add'>+	       CONF_TX_PWR_COMPENSATION_LEN_5);</div><div class='add'>+</div><div class='add'>+	wl1271_dump(DEBUG_CMD, "TEST_CMD_INI_FILE_EXT_RADIO_PARAM: ",</div><div class='add'>+		    ext_radio_parms, sizeof(*ext_radio_parms));</div><div class='add'>+</div><div class='add'>+	ret = wl1271_cmd_test(wl, ext_radio_parms, sizeof(*ext_radio_parms), 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		wl1271_warning("TEST_CMD_INI_FILE_RF_EXTENDED_PARAM failed");</div><div class='add'>+</div><div class='add'>+	kfree(ext_radio_parms);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wl1271_cmd_general_parms(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	struct wl1271_general_parms_cmd *gen_parms;</div><div class='add'>+	struct wl1271_ini_general_params *gp =</div><div class='add'>+		&amp;((struct wl1271_nvs_file *)wl-&gt;nvs)-&gt;general_params;</div><div class='add'>+	bool answer = false;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!wl-&gt;nvs)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (gp-&gt;tx_bip_fem_manufacturer &gt;= WL1271_INI_FEM_MODULE_COUNT) {</div><div class='add'>+		wl1271_warning("FEM index from INI out of bounds");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gen_parms = kzalloc(sizeof(*gen_parms), GFP_KERNEL);</div><div class='add'>+	if (!gen_parms)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	gen_parms-&gt;test.id = TEST_CMD_INI_FILE_GENERAL_PARAM;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;gen_parms-&gt;general_params, gp, sizeof(*gp));</div><div class='add'>+</div><div class='add'>+	if (gp-&gt;tx_bip_fem_auto_detect)</div><div class='add'>+		answer = true;</div><div class='add'>+</div><div class='add'>+	/* Override the REF CLK from the NVS with the one from platform data */</div><div class='add'>+	gen_parms-&gt;general_params.ref_clock = wl-&gt;ref_clock;</div><div class='add'>+</div><div class='add'>+	ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), answer);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		wl1271_warning("CMD_INI_FILE_GENERAL_PARAM failed");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gp-&gt;tx_bip_fem_manufacturer =</div><div class='add'>+		gen_parms-&gt;general_params.tx_bip_fem_manufacturer;</div><div class='add'>+</div><div class='add'>+	if (gp-&gt;tx_bip_fem_manufacturer &gt;= WL1271_INI_FEM_MODULE_COUNT) {</div><div class='add'>+		wl1271_warning("FEM index from FW out of bounds");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_CMD, "FEM autodetect: %s, manufacturer: %d\n",</div><div class='add'>+		     answer ? "auto" : "manual", gp-&gt;tx_bip_fem_manufacturer);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree(gen_parms);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wl128x_cmd_general_parms(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	struct wl128x_general_parms_cmd *gen_parms;</div><div class='add'>+	struct wl128x_ini_general_params *gp =</div><div class='add'>+		&amp;((struct wl128x_nvs_file *)wl-&gt;nvs)-&gt;general_params;</div><div class='add'>+	bool answer = false;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!wl-&gt;nvs)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (gp-&gt;tx_bip_fem_manufacturer &gt;= WL1271_INI_FEM_MODULE_COUNT) {</div><div class='add'>+		wl1271_warning("FEM index from ini out of bounds");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gen_parms = kzalloc(sizeof(*gen_parms), GFP_KERNEL);</div><div class='add'>+	if (!gen_parms)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	gen_parms-&gt;test.id = TEST_CMD_INI_FILE_GENERAL_PARAM;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;gen_parms-&gt;general_params, gp, sizeof(*gp));</div><div class='add'>+</div><div class='add'>+	if (gp-&gt;tx_bip_fem_auto_detect)</div><div class='add'>+		answer = true;</div><div class='add'>+</div><div class='add'>+	/* Replace REF and TCXO CLKs with the ones from platform data */</div><div class='add'>+	gen_parms-&gt;general_params.ref_clock = wl-&gt;ref_clock;</div><div class='add'>+	gen_parms-&gt;general_params.tcxo_ref_clock = wl-&gt;tcxo_clock;</div><div class='add'>+</div><div class='add'>+	ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), answer);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		wl1271_warning("CMD_INI_FILE_GENERAL_PARAM failed");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gp-&gt;tx_bip_fem_manufacturer =</div><div class='add'>+		gen_parms-&gt;general_params.tx_bip_fem_manufacturer;</div><div class='add'>+</div><div class='add'>+	if (gp-&gt;tx_bip_fem_manufacturer &gt;= WL1271_INI_FEM_MODULE_COUNT) {</div><div class='add'>+		wl1271_warning("FEM index from FW out of bounds");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_CMD, "FEM autodetect: %s, manufacturer: %d\n",</div><div class='add'>+		     answer ? "auto" : "manual", gp-&gt;tx_bip_fem_manufacturer);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree(gen_parms);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wl1271_cmd_radio_parms(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	struct wl1271_nvs_file *nvs = (struct wl1271_nvs_file *)wl-&gt;nvs;</div><div class='add'>+	struct wl1271_radio_parms_cmd *radio_parms;</div><div class='add'>+	struct wl1271_ini_general_params *gp = &amp;nvs-&gt;general_params;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!wl-&gt;nvs)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	radio_parms = kzalloc(sizeof(*radio_parms), GFP_KERNEL);</div><div class='add'>+	if (!radio_parms)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	radio_parms-&gt;test.id = TEST_CMD_INI_FILE_RADIO_PARAM;</div><div class='add'>+</div><div class='add'>+	/* 2.4GHz parameters */</div><div class='add'>+	memcpy(&amp;radio_parms-&gt;static_params_2, &amp;nvs-&gt;stat_radio_params_2,</div><div class='add'>+	       sizeof(struct wl1271_ini_band_params_2));</div><div class='add'>+	memcpy(&amp;radio_parms-&gt;dyn_params_2,</div><div class='add'>+	       &amp;nvs-&gt;dyn_radio_params_2[gp-&gt;tx_bip_fem_manufacturer].params,</div><div class='add'>+	       sizeof(struct wl1271_ini_fem_params_2));</div><div class='add'>+</div><div class='add'>+	/* 5GHz parameters */</div><div class='add'>+	memcpy(&amp;radio_parms-&gt;static_params_5,</div><div class='add'>+	       &amp;nvs-&gt;stat_radio_params_5,</div><div class='add'>+	       sizeof(struct wl1271_ini_band_params_5));</div><div class='add'>+	memcpy(&amp;radio_parms-&gt;dyn_params_5,</div><div class='add'>+	       &amp;nvs-&gt;dyn_radio_params_5[gp-&gt;tx_bip_fem_manufacturer].params,</div><div class='add'>+	       sizeof(struct wl1271_ini_fem_params_5));</div><div class='add'>+</div><div class='add'>+	wl1271_dump(DEBUG_CMD, "TEST_CMD_INI_FILE_RADIO_PARAM: ",</div><div class='add'>+		    radio_parms, sizeof(*radio_parms));</div><div class='add'>+</div><div class='add'>+	ret = wl1271_cmd_test(wl, radio_parms, sizeof(*radio_parms), 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		wl1271_warning("CMD_INI_FILE_RADIO_PARAM failed");</div><div class='add'>+</div><div class='add'>+	kfree(radio_parms);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wl128x_cmd_radio_parms(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	struct wl128x_nvs_file *nvs = (struct wl128x_nvs_file *)wl-&gt;nvs;</div><div class='add'>+	struct wl128x_radio_parms_cmd *radio_parms;</div><div class='add'>+	struct wl128x_ini_general_params *gp = &amp;nvs-&gt;general_params;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!wl-&gt;nvs)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	radio_parms = kzalloc(sizeof(*radio_parms), GFP_KERNEL);</div><div class='add'>+	if (!radio_parms)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	radio_parms-&gt;test.id = TEST_CMD_INI_FILE_RADIO_PARAM;</div><div class='add'>+</div><div class='add'>+	/* 2.4GHz parameters */</div><div class='add'>+	memcpy(&amp;radio_parms-&gt;static_params_2, &amp;nvs-&gt;stat_radio_params_2,</div><div class='add'>+	       sizeof(struct wl128x_ini_band_params_2));</div><div class='add'>+	memcpy(&amp;radio_parms-&gt;dyn_params_2,</div><div class='add'>+	       &amp;nvs-&gt;dyn_radio_params_2[gp-&gt;tx_bip_fem_manufacturer].params,</div><div class='add'>+	       sizeof(struct wl128x_ini_fem_params_2));</div><div class='add'>+</div><div class='add'>+	/* 5GHz parameters */</div><div class='add'>+	memcpy(&amp;radio_parms-&gt;static_params_5,</div><div class='add'>+	       &amp;nvs-&gt;stat_radio_params_5,</div><div class='add'>+	       sizeof(struct wl128x_ini_band_params_5));</div><div class='add'>+	memcpy(&amp;radio_parms-&gt;dyn_params_5,</div><div class='add'>+	       &amp;nvs-&gt;dyn_radio_params_5[gp-&gt;tx_bip_fem_manufacturer].params,</div><div class='add'>+	       sizeof(struct wl128x_ini_fem_params_5));</div><div class='add'>+</div><div class='add'>+	radio_parms-&gt;fem_vendor_and_options = nvs-&gt;fem_vendor_and_options;</div><div class='add'>+</div><div class='add'>+	wl1271_dump(DEBUG_CMD, "TEST_CMD_INI_FILE_RADIO_PARAM: ",</div><div class='add'>+		    radio_parms, sizeof(*radio_parms));</div><div class='add'>+</div><div class='add'>+	ret = wl1271_cmd_test(wl, radio_parms, sizeof(*radio_parms), 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		wl1271_warning("CMD_INI_FILE_RADIO_PARAM failed");</div><div class='add'>+</div><div class='add'>+	kfree(radio_parms);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/wireless/ti/wl12xx/cmd.h b/drivers/net/wireless/ti/wl12xx/cmd.h<br/>new file mode 100644<br/>index 000000000000..140a0e8829d5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl12xx/cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/cmd.h</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is part of wl12xx</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 1998-2009, 2011 Texas Instruments. All rights reserved.</div><div class='add'>+ * Copyright (C) 2009 Nokia Corporation</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __WL12XX_CMD_H__</div><div class='add'>+#define __WL12XX_CMD_H__</div><div class='add'>+</div><div class='add'>+#include "conf.h"</div><div class='add'>+</div><div class='add'>+#define TEST_CMD_INI_FILE_RADIO_PARAM       0x19</div><div class='add'>+#define TEST_CMD_INI_FILE_GENERAL_PARAM     0x1E</div><div class='add'>+</div><div class='add'>+struct wl1271_general_parms_cmd {</div><div class='add'>+	struct wl1271_cmd_header header;</div><div class='add'>+</div><div class='add'>+	struct wl1271_cmd_test_header test;</div><div class='add'>+</div><div class='add'>+	struct wl1271_ini_general_params general_params;</div><div class='add'>+</div><div class='add'>+	u8 sr_debug_table[WL1271_INI_MAX_SMART_REFLEX_PARAM];</div><div class='add'>+	u8 sr_sen_n_p;</div><div class='add'>+	u8 sr_sen_n_p_gain;</div><div class='add'>+	u8 sr_sen_nrn;</div><div class='add'>+	u8 sr_sen_prn;</div><div class='add'>+	u8 padding[3];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct wl128x_general_parms_cmd {</div><div class='add'>+	struct wl1271_cmd_header header;</div><div class='add'>+</div><div class='add'>+	struct wl1271_cmd_test_header test;</div><div class='add'>+</div><div class='add'>+	struct wl128x_ini_general_params general_params;</div><div class='add'>+</div><div class='add'>+	u8 sr_debug_table[WL1271_INI_MAX_SMART_REFLEX_PARAM];</div><div class='add'>+	u8 sr_sen_n_p;</div><div class='add'>+	u8 sr_sen_n_p_gain;</div><div class='add'>+	u8 sr_sen_nrn;</div><div class='add'>+	u8 sr_sen_prn;</div><div class='add'>+	u8 padding[3];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct wl1271_radio_parms_cmd {</div><div class='add'>+	struct wl1271_cmd_header header;</div><div class='add'>+</div><div class='add'>+	struct wl1271_cmd_test_header test;</div><div class='add'>+</div><div class='add'>+	/* Static radio parameters */</div><div class='add'>+	struct wl1271_ini_band_params_2 static_params_2;</div><div class='add'>+	struct wl1271_ini_band_params_5 static_params_5;</div><div class='add'>+</div><div class='add'>+	/* Dynamic radio parameters */</div><div class='add'>+	struct wl1271_ini_fem_params_2 dyn_params_2;</div><div class='add'>+	u8 padding2;</div><div class='add'>+	struct wl1271_ini_fem_params_5 dyn_params_5;</div><div class='add'>+	u8 padding3[2];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct wl128x_radio_parms_cmd {</div><div class='add'>+	struct wl1271_cmd_header header;</div><div class='add'>+</div><div class='add'>+	struct wl1271_cmd_test_header test;</div><div class='add'>+</div><div class='add'>+	/* Static radio parameters */</div><div class='add'>+	struct wl128x_ini_band_params_2 static_params_2;</div><div class='add'>+	struct wl128x_ini_band_params_5 static_params_5;</div><div class='add'>+</div><div class='add'>+	u8 fem_vendor_and_options;</div><div class='add'>+</div><div class='add'>+	/* Dynamic radio parameters */</div><div class='add'>+	struct wl128x_ini_fem_params_2 dyn_params_2;</div><div class='add'>+	u8 padding2;</div><div class='add'>+	struct wl128x_ini_fem_params_5 dyn_params_5;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define TEST_CMD_INI_FILE_RF_EXTENDED_PARAM 0x26</div><div class='add'>+</div><div class='add'>+struct wl1271_ext_radio_parms_cmd {</div><div class='add'>+	struct wl1271_cmd_header header;</div><div class='add'>+</div><div class='add'>+	struct wl1271_cmd_test_header test;</div><div class='add'>+</div><div class='add'>+	u8 tx_per_channel_power_compensation_2[CONF_TX_PWR_COMPENSATION_LEN_2];</div><div class='add'>+	u8 tx_per_channel_power_compensation_5[CONF_TX_PWR_COMPENSATION_LEN_5];</div><div class='add'>+	u8 padding[3];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+int wl1271_cmd_general_parms(struct wl1271 *wl);</div><div class='add'>+int wl128x_cmd_general_parms(struct wl1271 *wl);</div><div class='add'>+int wl1271_cmd_radio_parms(struct wl1271 *wl);</div><div class='add'>+int wl128x_cmd_radio_parms(struct wl1271 *wl);</div><div class='add'>+int wl1271_cmd_ext_radio_parms(struct wl1271 *wl);</div><div class='add'>+</div><div class='add'>+#endif /* __WL12XX_CMD_H__ */</div><div class='head'>diff --git a/drivers/net/wireless/ti/wl12xx/conf.h b/drivers/net/wireless/ti/wl12xx/conf.h<br/>new file mode 100644<br/>index 000000000000..75e29897a0f5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl12xx/conf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/conf.h</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is part of wl12xx</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011 Texas Instruments Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __WL12XX_CONF_H__</div><div class='add'>+#define __WL12XX_CONF_H__</div><div class='add'>+</div><div class='add'>+/* these are number of channels on the band divided by two, rounded up */</div><div class='add'>+#define CONF_TX_PWR_COMPENSATION_LEN_2 7</div><div class='add'>+#define CONF_TX_PWR_COMPENSATION_LEN_5 18</div><div class='add'>+</div><div class='add'>+struct wl12xx_conf_rf {</div><div class='add'>+	/*</div><div class='add'>+	 * Per channel power compensation for 2.4GHz</div><div class='add'>+	 *</div><div class='add'>+	 * Range: s8</div><div class='add'>+	 */</div><div class='add'>+	u8 tx_per_channel_power_compensation_2[CONF_TX_PWR_COMPENSATION_LEN_2];</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Per channel power compensation for 5GHz</div><div class='add'>+	 *</div><div class='add'>+	 * Range: s8</div><div class='add'>+	 */</div><div class='add'>+	u8 tx_per_channel_power_compensation_5[CONF_TX_PWR_COMPENSATION_LEN_5];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct wl12xx_priv_conf {</div><div class='add'>+	struct wl12xx_conf_rf rf;</div><div class='add'>+	struct conf_memory_settings mem_wl127x;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* __WL12XX_CONF_H__ */</div><div class='head'>diff --git a/drivers/net/wireless/ti/wl12xx/main.c b/drivers/net/wireless/ti/wl12xx/main.c<br/>new file mode 100644<br/>index 000000000000..d7dd3def07b5<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl12xx/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/main.c</a></div><div class='hunk'>@@ -0,0 +1,1388 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is part of wl1271</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2008-2010 Nokia Corporation</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/wl12xx.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../wlcore/wlcore.h"</div><div class='add'>+#include "../wlcore/debug.h"</div><div class='add'>+#include "../wlcore/io.h"</div><div class='add'>+#include "../wlcore/acx.h"</div><div class='add'>+#include "../wlcore/tx.h"</div><div class='add'>+#include "../wlcore/rx.h"</div><div class='add'>+#include "../wlcore/io.h"</div><div class='add'>+#include "../wlcore/boot.h"</div><div class='add'>+</div><div class='add'>+#include "wl12xx.h"</div><div class='add'>+#include "reg.h"</div><div class='add'>+#include "cmd.h"</div><div class='add'>+#include "acx.h"</div><div class='add'>+</div><div class='add'>+static struct wlcore_conf wl12xx_conf = {</div><div class='add'>+	.sg = {</div><div class='add'>+		.params = {</div><div class='add'>+			[CONF_SG_ACL_BT_MASTER_MIN_BR] = 10,</div><div class='add'>+			[CONF_SG_ACL_BT_MASTER_MAX_BR] = 180,</div><div class='add'>+			[CONF_SG_ACL_BT_SLAVE_MIN_BR] = 10,</div><div class='add'>+			[CONF_SG_ACL_BT_SLAVE_MAX_BR] = 180,</div><div class='add'>+			[CONF_SG_ACL_BT_MASTER_MIN_EDR] = 10,</div><div class='add'>+			[CONF_SG_ACL_BT_MASTER_MAX_EDR] = 80,</div><div class='add'>+			[CONF_SG_ACL_BT_SLAVE_MIN_EDR] = 10,</div><div class='add'>+			[CONF_SG_ACL_BT_SLAVE_MAX_EDR] = 80,</div><div class='add'>+			[CONF_SG_ACL_WLAN_PS_MASTER_BR] = 8,</div><div class='add'>+			[CONF_SG_ACL_WLAN_PS_SLAVE_BR] = 8,</div><div class='add'>+			[CONF_SG_ACL_WLAN_PS_MASTER_EDR] = 20,</div><div class='add'>+			[CONF_SG_ACL_WLAN_PS_SLAVE_EDR] = 20,</div><div class='add'>+			[CONF_SG_ACL_WLAN_ACTIVE_MASTER_MIN_BR] = 20,</div><div class='add'>+			[CONF_SG_ACL_WLAN_ACTIVE_MASTER_MAX_BR] = 35,</div><div class='add'>+			[CONF_SG_ACL_WLAN_ACTIVE_SLAVE_MIN_BR] = 16,</div><div class='add'>+			[CONF_SG_ACL_WLAN_ACTIVE_SLAVE_MAX_BR] = 35,</div><div class='add'>+			[CONF_SG_ACL_WLAN_ACTIVE_MASTER_MIN_EDR] = 32,</div><div class='add'>+			[CONF_SG_ACL_WLAN_ACTIVE_MASTER_MAX_EDR] = 50,</div><div class='add'>+			[CONF_SG_ACL_WLAN_ACTIVE_SLAVE_MIN_EDR] = 28,</div><div class='add'>+			[CONF_SG_ACL_WLAN_ACTIVE_SLAVE_MAX_EDR] = 50,</div><div class='add'>+			[CONF_SG_ACL_ACTIVE_SCAN_WLAN_BR] = 10,</div><div class='add'>+			[CONF_SG_ACL_ACTIVE_SCAN_WLAN_EDR] = 20,</div><div class='add'>+			[CONF_SG_ACL_PASSIVE_SCAN_BT_BR] = 75,</div><div class='add'>+			[CONF_SG_ACL_PASSIVE_SCAN_WLAN_BR] = 15,</div><div class='add'>+			[CONF_SG_ACL_PASSIVE_SCAN_BT_EDR] = 27,</div><div class='add'>+			[CONF_SG_ACL_PASSIVE_SCAN_WLAN_EDR] = 17,</div><div class='add'>+			/* active scan params */</div><div class='add'>+			[CONF_SG_AUTO_SCAN_PROBE_REQ] = 170,</div><div class='add'>+			[CONF_SG_ACTIVE_SCAN_DURATION_FACTOR_HV3] = 50,</div><div class='add'>+			[CONF_SG_ACTIVE_SCAN_DURATION_FACTOR_A2DP] = 100,</div><div class='add'>+			/* passive scan params */</div><div class='add'>+			[CONF_SG_PASSIVE_SCAN_DURATION_FACTOR_A2DP_BR] = 800,</div><div class='add'>+			[CONF_SG_PASSIVE_SCAN_DURATION_FACTOR_A2DP_EDR] = 200,</div><div class='add'>+			[CONF_SG_PASSIVE_SCAN_DURATION_FACTOR_HV3] = 200,</div><div class='add'>+			/* passive scan in dual antenna params */</div><div class='add'>+			[CONF_SG_CONSECUTIVE_HV3_IN_PASSIVE_SCAN] = 0,</div><div class='add'>+			[CONF_SG_BCN_HV3_COLLISION_THRESH_IN_PASSIVE_SCAN] = 0,</div><div class='add'>+			[CONF_SG_TX_RX_PROTECTION_BWIDTH_IN_PASSIVE_SCAN] = 0,</div><div class='add'>+			/* general params */</div><div class='add'>+			[CONF_SG_STA_FORCE_PS_IN_BT_SCO] = 1,</div><div class='add'>+			[CONF_SG_ANTENNA_CONFIGURATION] = 0,</div><div class='add'>+			[CONF_SG_BEACON_MISS_PERCENT] = 60,</div><div class='add'>+			[CONF_SG_DHCP_TIME] = 5000,</div><div class='add'>+			[CONF_SG_RXT] = 1200,</div><div class='add'>+			[CONF_SG_TXT] = 1000,</div><div class='add'>+			[CONF_SG_ADAPTIVE_RXT_TXT] = 1,</div><div class='add'>+			[CONF_SG_GENERAL_USAGE_BIT_MAP] = 3,</div><div class='add'>+			[CONF_SG_HV3_MAX_SERVED] = 6,</div><div class='add'>+			[CONF_SG_PS_POLL_TIMEOUT] = 10,</div><div class='add'>+			[CONF_SG_UPSD_TIMEOUT] = 10,</div><div class='add'>+			[CONF_SG_CONSECUTIVE_CTS_THRESHOLD] = 2,</div><div class='add'>+			[CONF_SG_STA_RX_WINDOW_AFTER_DTIM] = 5,</div><div class='add'>+			[CONF_SG_STA_CONNECTION_PROTECTION_TIME] = 30,</div><div class='add'>+			/* AP params */</div><div class='add'>+			[CONF_AP_BEACON_MISS_TX] = 3,</div><div class='add'>+			[CONF_AP_RX_WINDOW_AFTER_BEACON] = 10,</div><div class='add'>+			[CONF_AP_BEACON_WINDOW_INTERVAL] = 2,</div><div class='add'>+			[CONF_AP_CONNECTION_PROTECTION_TIME] = 0,</div><div class='add'>+			[CONF_AP_BT_ACL_VAL_BT_SERVE_TIME] = 25,</div><div class='add'>+			[CONF_AP_BT_ACL_VAL_WL_SERVE_TIME] = 25,</div><div class='add'>+			/* CTS Diluting params */</div><div class='add'>+			[CONF_SG_CTS_DILUTED_BAD_RX_PACKETS_TH] = 0,</div><div class='add'>+			[CONF_SG_CTS_CHOP_IN_DUAL_ANT_SCO_MASTER] = 0,</div><div class='add'>+		},</div><div class='add'>+		.state = CONF_SG_PROTECTIVE,</div><div class='add'>+	},</div><div class='add'>+	.rx = {</div><div class='add'>+		.rx_msdu_life_time           = 512000,</div><div class='add'>+		.packet_detection_threshold  = 0,</div><div class='add'>+		.ps_poll_timeout             = 15,</div><div class='add'>+		.upsd_timeout                = 15,</div><div class='add'>+		.rts_threshold               = IEEE80211_MAX_RTS_THRESHOLD,</div><div class='add'>+		.rx_cca_threshold            = 0,</div><div class='add'>+		.irq_blk_threshold           = 0xFFFF,</div><div class='add'>+		.irq_pkt_threshold           = 0,</div><div class='add'>+		.irq_timeout                 = 600,</div><div class='add'>+		.queue_type                  = CONF_RX_QUEUE_TYPE_LOW_PRIORITY,</div><div class='add'>+	},</div><div class='add'>+	.tx = {</div><div class='add'>+		.tx_energy_detection         = 0,</div><div class='add'>+		.sta_rc_conf                 = {</div><div class='add'>+			.enabled_rates       = 0,</div><div class='add'>+			.short_retry_limit   = 10,</div><div class='add'>+			.long_retry_limit    = 10,</div><div class='add'>+			.aflags              = 0,</div><div class='add'>+		},</div><div class='add'>+		.ac_conf_count               = 4,</div><div class='add'>+		.ac_conf                     = {</div><div class='add'>+			[CONF_TX_AC_BE] = {</div><div class='add'>+				.ac          = CONF_TX_AC_BE,</div><div class='add'>+				.cw_min      = 15,</div><div class='add'>+				.cw_max      = 63,</div><div class='add'>+				.aifsn       = 3,</div><div class='add'>+				.tx_op_limit = 0,</div><div class='add'>+			},</div><div class='add'>+			[CONF_TX_AC_BK] = {</div><div class='add'>+				.ac          = CONF_TX_AC_BK,</div><div class='add'>+				.cw_min      = 15,</div><div class='add'>+				.cw_max      = 63,</div><div class='add'>+				.aifsn       = 7,</div><div class='add'>+				.tx_op_limit = 0,</div><div class='add'>+			},</div><div class='add'>+			[CONF_TX_AC_VI] = {</div><div class='add'>+				.ac          = CONF_TX_AC_VI,</div><div class='add'>+				.cw_min      = 15,</div><div class='add'>+				.cw_max      = 63,</div><div class='add'>+				.aifsn       = CONF_TX_AIFS_PIFS,</div><div class='add'>+				.tx_op_limit = 3008,</div><div class='add'>+			},</div><div class='add'>+			[CONF_TX_AC_VO] = {</div><div class='add'>+				.ac          = CONF_TX_AC_VO,</div><div class='add'>+				.cw_min      = 15,</div><div class='add'>+				.cw_max      = 63,</div><div class='add'>+				.aifsn       = CONF_TX_AIFS_PIFS,</div><div class='add'>+				.tx_op_limit = 1504,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+		.max_tx_retries = 100,</div><div class='add'>+		.ap_aging_period = 300,</div><div class='add'>+		.tid_conf_count = 4,</div><div class='add'>+		.tid_conf = {</div><div class='add'>+			[CONF_TX_AC_BE] = {</div><div class='add'>+				.queue_id    = CONF_TX_AC_BE,</div><div class='add'>+				.channel_type = CONF_CHANNEL_TYPE_EDCF,</div><div class='add'>+				.tsid        = CONF_TX_AC_BE,</div><div class='add'>+				.ps_scheme   = CONF_PS_SCHEME_LEGACY,</div><div class='add'>+				.ack_policy  = CONF_ACK_POLICY_LEGACY,</div><div class='add'>+				.apsd_conf   = {0, 0},</div><div class='add'>+			},</div><div class='add'>+			[CONF_TX_AC_BK] = {</div><div class='add'>+				.queue_id    = CONF_TX_AC_BK,</div><div class='add'>+				.channel_type = CONF_CHANNEL_TYPE_EDCF,</div><div class='add'>+				.tsid        = CONF_TX_AC_BK,</div><div class='add'>+				.ps_scheme   = CONF_PS_SCHEME_LEGACY,</div><div class='add'>+				.ack_policy  = CONF_ACK_POLICY_LEGACY,</div><div class='add'>+				.apsd_conf   = {0, 0},</div><div class='add'>+			},</div><div class='add'>+			[CONF_TX_AC_VI] = {</div><div class='add'>+				.queue_id    = CONF_TX_AC_VI,</div><div class='add'>+				.channel_type = CONF_CHANNEL_TYPE_EDCF,</div><div class='add'>+				.tsid        = CONF_TX_AC_VI,</div><div class='add'>+				.ps_scheme   = CONF_PS_SCHEME_LEGACY,</div><div class='add'>+				.ack_policy  = CONF_ACK_POLICY_LEGACY,</div><div class='add'>+				.apsd_conf   = {0, 0},</div><div class='add'>+			},</div><div class='add'>+			[CONF_TX_AC_VO] = {</div><div class='add'>+				.queue_id    = CONF_TX_AC_VO,</div><div class='add'>+				.channel_type = CONF_CHANNEL_TYPE_EDCF,</div><div class='add'>+				.tsid        = CONF_TX_AC_VO,</div><div class='add'>+				.ps_scheme   = CONF_PS_SCHEME_LEGACY,</div><div class='add'>+				.ack_policy  = CONF_ACK_POLICY_LEGACY,</div><div class='add'>+				.apsd_conf   = {0, 0},</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+		.frag_threshold              = IEEE80211_MAX_FRAG_THRESHOLD,</div><div class='add'>+		.tx_compl_timeout            = 700,</div><div class='add'>+		.tx_compl_threshold          = 4,</div><div class='add'>+		.basic_rate                  = CONF_HW_BIT_RATE_1MBPS,</div><div class='add'>+		.basic_rate_5                = CONF_HW_BIT_RATE_6MBPS,</div><div class='add'>+		.tmpl_short_retry_limit      = 10,</div><div class='add'>+		.tmpl_long_retry_limit       = 10,</div><div class='add'>+		.tx_watchdog_timeout         = 5000,</div><div class='add'>+	},</div><div class='add'>+	.conn = {</div><div class='add'>+		.wake_up_event               = CONF_WAKE_UP_EVENT_DTIM,</div><div class='add'>+		.listen_interval             = 1,</div><div class='add'>+		.suspend_wake_up_event       = CONF_WAKE_UP_EVENT_N_DTIM,</div><div class='add'>+		.suspend_listen_interval     = 3,</div><div class='add'>+		.bcn_filt_mode               = CONF_BCN_FILT_MODE_ENABLED,</div><div class='add'>+		.bcn_filt_ie_count           = 2,</div><div class='add'>+		.bcn_filt_ie = {</div><div class='add'>+			[0] = {</div><div class='add'>+				.ie          = WLAN_EID_CHANNEL_SWITCH,</div><div class='add'>+				.rule        = CONF_BCN_RULE_PASS_ON_APPEARANCE,</div><div class='add'>+			},</div><div class='add'>+			[1] = {</div><div class='add'>+				.ie          = WLAN_EID_HT_OPERATION,</div><div class='add'>+				.rule        = CONF_BCN_RULE_PASS_ON_CHANGE,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+		.synch_fail_thold            = 10,</div><div class='add'>+		.bss_lose_timeout            = 100,</div><div class='add'>+		.beacon_rx_timeout           = 10000,</div><div class='add'>+		.broadcast_timeout           = 20000,</div><div class='add'>+		.rx_broadcast_in_ps          = 1,</div><div class='add'>+		.ps_poll_threshold           = 10,</div><div class='add'>+		.bet_enable                  = CONF_BET_MODE_ENABLE,</div><div class='add'>+		.bet_max_consecutive         = 50,</div><div class='add'>+		.psm_entry_retries           = 8,</div><div class='add'>+		.psm_exit_retries            = 16,</div><div class='add'>+		.psm_entry_nullfunc_retries  = 3,</div><div class='add'>+		.dynamic_ps_timeout          = 40,</div><div class='add'>+		.forced_ps                   = false,</div><div class='add'>+		.keep_alive_interval         = 55000,</div><div class='add'>+		.max_listen_interval         = 20,</div><div class='add'>+	},</div><div class='add'>+	.itrim = {</div><div class='add'>+		.enable = false,</div><div class='add'>+		.timeout = 50000,</div><div class='add'>+	},</div><div class='add'>+	.pm_config = {</div><div class='add'>+		.host_clk_settling_time = 5000,</div><div class='add'>+		.host_fast_wakeup_support = false</div><div class='add'>+	},</div><div class='add'>+	.roam_trigger = {</div><div class='add'>+		.trigger_pacing               = 1,</div><div class='add'>+		.avg_weight_rssi_beacon       = 20,</div><div class='add'>+		.avg_weight_rssi_data         = 10,</div><div class='add'>+		.avg_weight_snr_beacon        = 20,</div><div class='add'>+		.avg_weight_snr_data          = 10,</div><div class='add'>+	},</div><div class='add'>+	.scan = {</div><div class='add'>+		.min_dwell_time_active        = 7500,</div><div class='add'>+		.max_dwell_time_active        = 30000,</div><div class='add'>+		.min_dwell_time_passive       = 100000,</div><div class='add'>+		.max_dwell_time_passive       = 100000,</div><div class='add'>+		.num_probe_reqs               = 2,</div><div class='add'>+		.split_scan_timeout           = 50000,</div><div class='add'>+	},</div><div class='add'>+	.sched_scan = {</div><div class='add'>+		/*</div><div class='add'>+		 * Values are in TU/1000 but since sched scan FW command</div><div class='add'>+		 * params are in TUs rounding up may occur.</div><div class='add'>+		 */</div><div class='add'>+		.base_dwell_time		= 7500,</div><div class='add'>+		.max_dwell_time_delta		= 22500,</div><div class='add'>+		/* based on 250bits per probe @1Mbps */</div><div class='add'>+		.dwell_time_delta_per_probe	= 2000,</div><div class='add'>+		/* based on 250bits per probe @6Mbps (plus a bit more) */</div><div class='add'>+		.dwell_time_delta_per_probe_5	= 350,</div><div class='add'>+		.dwell_time_passive		= 100000,</div><div class='add'>+		.dwell_time_dfs			= 150000,</div><div class='add'>+		.num_probe_reqs			= 2,</div><div class='add'>+		.rssi_threshold			= -90,</div><div class='add'>+		.snr_threshold			= 0,</div><div class='add'>+	},</div><div class='add'>+	.ht = {</div><div class='add'>+		.rx_ba_win_size = 8,</div><div class='add'>+		.tx_ba_win_size = 64,</div><div class='add'>+		.inactivity_timeout = 10000,</div><div class='add'>+		.tx_ba_tid_bitmap = CONF_TX_BA_ENABLED_TID_BITMAP,</div><div class='add'>+	},</div><div class='add'>+	/*</div><div class='add'>+	 * Memory config for wl127x chips is given in the</div><div class='add'>+	 * wl12xx_default_priv_conf struct. The below configuration is</div><div class='add'>+	 * for wl128x chips.</div><div class='add'>+	 */</div><div class='add'>+	.mem = {</div><div class='add'>+		.num_stations                 = 1,</div><div class='add'>+		.ssid_profiles                = 1,</div><div class='add'>+		.rx_block_num                 = 40,</div><div class='add'>+		.tx_min_block_num             = 40,</div><div class='add'>+		.dynamic_memory               = 1,</div><div class='add'>+		.min_req_tx_blocks            = 45,</div><div class='add'>+		.min_req_rx_blocks            = 22,</div><div class='add'>+		.tx_min                       = 27,</div><div class='add'>+	},</div><div class='add'>+	.fm_coex = {</div><div class='add'>+		.enable                       = true,</div><div class='add'>+		.swallow_period               = 5,</div><div class='add'>+		.n_divider_fref_set_1         = 0xff,       /* default */</div><div class='add'>+		.n_divider_fref_set_2         = 12,</div><div class='add'>+		.m_divider_fref_set_1         = 148,</div><div class='add'>+		.m_divider_fref_set_2         = 0xffff,     /* default */</div><div class='add'>+		.coex_pll_stabilization_time  = 0xffffffff, /* default */</div><div class='add'>+		.ldo_stabilization_time       = 0xffff,     /* default */</div><div class='add'>+		.fm_disturbed_band_margin     = 0xff,       /* default */</div><div class='add'>+		.swallow_clk_diff             = 0xff,       /* default */</div><div class='add'>+	},</div><div class='add'>+	.rx_streaming = {</div><div class='add'>+		.duration                      = 150,</div><div class='add'>+		.queues                        = 0x1,</div><div class='add'>+		.interval                      = 20,</div><div class='add'>+		.always                        = 0,</div><div class='add'>+	},</div><div class='add'>+	.fwlog = {</div><div class='add'>+		.mode                         = WL12XX_FWLOG_ON_DEMAND,</div><div class='add'>+		.mem_blocks                   = 2,</div><div class='add'>+		.severity                     = 0,</div><div class='add'>+		.timestamp                    = WL12XX_FWLOG_TIMESTAMP_DISABLED,</div><div class='add'>+		.output                       = WL12XX_FWLOG_OUTPUT_HOST,</div><div class='add'>+		.threshold                    = 0,</div><div class='add'>+	},</div><div class='add'>+	.rate = {</div><div class='add'>+		.rate_retry_score = 32000,</div><div class='add'>+		.per_add = 8192,</div><div class='add'>+		.per_th1 = 2048,</div><div class='add'>+		.per_th2 = 4096,</div><div class='add'>+		.max_per = 8100,</div><div class='add'>+		.inverse_curiosity_factor = 5,</div><div class='add'>+		.tx_fail_low_th = 4,</div><div class='add'>+		.tx_fail_high_th = 10,</div><div class='add'>+		.per_alpha_shift = 4,</div><div class='add'>+		.per_add_shift = 13,</div><div class='add'>+		.per_beta1_shift = 10,</div><div class='add'>+		.per_beta2_shift = 8,</div><div class='add'>+		.rate_check_up = 2,</div><div class='add'>+		.rate_check_down = 12,</div><div class='add'>+		.rate_retry_policy = {</div><div class='add'>+			0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='add'>+			0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='add'>+			0x00, 0x00, 0x00,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.hangover = {</div><div class='add'>+		.recover_time               = 0,</div><div class='add'>+		.hangover_period            = 20,</div><div class='add'>+		.dynamic_mode               = 1,</div><div class='add'>+		.early_termination_mode     = 1,</div><div class='add'>+		.max_period                 = 20,</div><div class='add'>+		.min_period                 = 1,</div><div class='add'>+		.increase_delta             = 1,</div><div class='add'>+		.decrease_delta             = 2,</div><div class='add'>+		.quiet_time                 = 4,</div><div class='add'>+		.increase_time              = 1,</div><div class='add'>+		.window_size                = 16,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct wl12xx_priv_conf wl12xx_default_priv_conf = {</div><div class='add'>+	.rf = {</div><div class='add'>+		.tx_per_channel_power_compensation_2 = {</div><div class='add'>+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='add'>+		},</div><div class='add'>+		.tx_per_channel_power_compensation_5 = {</div><div class='add'>+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='add'>+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='add'>+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.mem_wl127x = {</div><div class='add'>+		.num_stations                 = 1,</div><div class='add'>+		.ssid_profiles                = 1,</div><div class='add'>+		.rx_block_num                 = 70,</div><div class='add'>+		.tx_min_block_num             = 40,</div><div class='add'>+		.dynamic_memory               = 1,</div><div class='add'>+		.min_req_tx_blocks            = 100,</div><div class='add'>+		.min_req_rx_blocks            = 22,</div><div class='add'>+		.tx_min                       = 27,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define WL12XX_TX_HW_BLOCK_SPARE_DEFAULT        1</div><div class='add'>+#define WL12XX_TX_HW_BLOCK_GEM_SPARE            2</div><div class='add'>+#define WL12XX_TX_HW_BLOCK_SIZE                 252</div><div class='add'>+</div><div class='add'>+static const u8 wl12xx_rate_to_idx_2ghz[] = {</div><div class='add'>+	/* MCS rates are used only with 11n */</div><div class='add'>+	7,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS7_SGI */</div><div class='add'>+	7,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS7 */</div><div class='add'>+	6,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS6 */</div><div class='add'>+	5,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS5 */</div><div class='add'>+	4,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS4 */</div><div class='add'>+	3,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS3 */</div><div class='add'>+	2,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS2 */</div><div class='add'>+	1,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS1 */</div><div class='add'>+	0,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS0 */</div><div class='add'>+</div><div class='add'>+	11,                            /* WL12XX_CONF_HW_RXTX_RATE_54   */</div><div class='add'>+	10,                            /* WL12XX_CONF_HW_RXTX_RATE_48   */</div><div class='add'>+	9,                             /* WL12XX_CONF_HW_RXTX_RATE_36   */</div><div class='add'>+	8,                             /* WL12XX_CONF_HW_RXTX_RATE_24   */</div><div class='add'>+</div><div class='add'>+	/* TI-specific rate */</div><div class='add'>+	CONF_HW_RXTX_RATE_UNSUPPORTED, /* WL12XX_CONF_HW_RXTX_RATE_22   */</div><div class='add'>+</div><div class='add'>+	7,                             /* WL12XX_CONF_HW_RXTX_RATE_18   */</div><div class='add'>+	6,                             /* WL12XX_CONF_HW_RXTX_RATE_12   */</div><div class='add'>+	3,                             /* WL12XX_CONF_HW_RXTX_RATE_11   */</div><div class='add'>+	5,                             /* WL12XX_CONF_HW_RXTX_RATE_9    */</div><div class='add'>+	4,                             /* WL12XX_CONF_HW_RXTX_RATE_6    */</div><div class='add'>+	2,                             /* WL12XX_CONF_HW_RXTX_RATE_5_5  */</div><div class='add'>+	1,                             /* WL12XX_CONF_HW_RXTX_RATE_2    */</div><div class='add'>+	0                              /* WL12XX_CONF_HW_RXTX_RATE_1    */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 wl12xx_rate_to_idx_5ghz[] = {</div><div class='add'>+	/* MCS rates are used only with 11n */</div><div class='add'>+	7,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS7_SGI */</div><div class='add'>+	7,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS7 */</div><div class='add'>+	6,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS6 */</div><div class='add'>+	5,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS5 */</div><div class='add'>+	4,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS4 */</div><div class='add'>+	3,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS3 */</div><div class='add'>+	2,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS2 */</div><div class='add'>+	1,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS1 */</div><div class='add'>+	0,                             /* WL12XX_CONF_HW_RXTX_RATE_MCS0 */</div><div class='add'>+</div><div class='add'>+	7,                             /* WL12XX_CONF_HW_RXTX_RATE_54   */</div><div class='add'>+	6,                             /* WL12XX_CONF_HW_RXTX_RATE_48   */</div><div class='add'>+	5,                             /* WL12XX_CONF_HW_RXTX_RATE_36   */</div><div class='add'>+	4,                             /* WL12XX_CONF_HW_RXTX_RATE_24   */</div><div class='add'>+</div><div class='add'>+	/* TI-specific rate */</div><div class='add'>+	CONF_HW_RXTX_RATE_UNSUPPORTED, /* WL12XX_CONF_HW_RXTX_RATE_22   */</div><div class='add'>+</div><div class='add'>+	3,                             /* WL12XX_CONF_HW_RXTX_RATE_18   */</div><div class='add'>+	2,                             /* WL12XX_CONF_HW_RXTX_RATE_12   */</div><div class='add'>+	CONF_HW_RXTX_RATE_UNSUPPORTED, /* WL12XX_CONF_HW_RXTX_RATE_11   */</div><div class='add'>+	1,                             /* WL12XX_CONF_HW_RXTX_RATE_9    */</div><div class='add'>+	0,                             /* WL12XX_CONF_HW_RXTX_RATE_6    */</div><div class='add'>+	CONF_HW_RXTX_RATE_UNSUPPORTED, /* WL12XX_CONF_HW_RXTX_RATE_5_5  */</div><div class='add'>+	CONF_HW_RXTX_RATE_UNSUPPORTED, /* WL12XX_CONF_HW_RXTX_RATE_2    */</div><div class='add'>+	CONF_HW_RXTX_RATE_UNSUPPORTED  /* WL12XX_CONF_HW_RXTX_RATE_1    */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 *wl12xx_band_rate_to_idx[] = {</div><div class='add'>+	[IEEE80211_BAND_2GHZ] = wl12xx_rate_to_idx_2ghz,</div><div class='add'>+	[IEEE80211_BAND_5GHZ] = wl12xx_rate_to_idx_5ghz</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum wl12xx_hw_rates {</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_MCS7_SGI = 0,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_MCS7,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_MCS6,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_MCS5,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_MCS4,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_MCS3,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_MCS2,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_MCS1,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_MCS0,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_54,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_48,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_36,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_24,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_22,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_18,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_12,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_11,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_9,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_6,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_5_5,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_2,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_1,</div><div class='add'>+	WL12XX_CONF_HW_RXTX_RATE_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct wlcore_partition_set wl12xx_ptable[PART_TABLE_LEN] = {</div><div class='add'>+	[PART_DOWN] = {</div><div class='add'>+		.mem = {</div><div class='add'>+			.start = 0x00000000,</div><div class='add'>+			.size  = 0x000177c0</div><div class='add'>+		},</div><div class='add'>+		.reg = {</div><div class='add'>+			.start = REGISTERS_BASE,</div><div class='add'>+			.size  = 0x00008800</div><div class='add'>+		},</div><div class='add'>+		.mem2 = {</div><div class='add'>+			.start = 0x00000000,</div><div class='add'>+			.size  = 0x00000000</div><div class='add'>+		},</div><div class='add'>+		.mem3 = {</div><div class='add'>+			.start = 0x00000000,</div><div class='add'>+			.size  = 0x00000000</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[PART_BOOT] = { /* in wl12xx we can use a mix of work and down</div><div class='add'>+			 * partition here */</div><div class='add'>+		.mem = {</div><div class='add'>+			.start = 0x00040000,</div><div class='add'>+			.size  = 0x00014fc0</div><div class='add'>+		},</div><div class='add'>+		.reg = {</div><div class='add'>+			.start = REGISTERS_BASE,</div><div class='add'>+			.size  = 0x00008800</div><div class='add'>+		},</div><div class='add'>+		.mem2 = {</div><div class='add'>+			.start = 0x00000000,</div><div class='add'>+			.size  = 0x00000000</div><div class='add'>+		},</div><div class='add'>+		.mem3 = {</div><div class='add'>+			.start = 0x00000000,</div><div class='add'>+			.size  = 0x00000000</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[PART_WORK] = {</div><div class='add'>+		.mem = {</div><div class='add'>+			.start = 0x00040000,</div><div class='add'>+			.size  = 0x00014fc0</div><div class='add'>+		},</div><div class='add'>+		.reg = {</div><div class='add'>+			.start = REGISTERS_BASE,</div><div class='add'>+			.size  = 0x0000a000</div><div class='add'>+		},</div><div class='add'>+		.mem2 = {</div><div class='add'>+			.start = 0x003004f8,</div><div class='add'>+			.size  = 0x00000004</div><div class='add'>+		},</div><div class='add'>+		.mem3 = {</div><div class='add'>+			.start = 0x00040404,</div><div class='add'>+			.size  = 0x00000000</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[PART_DRPW] = {</div><div class='add'>+		.mem = {</div><div class='add'>+			.start = 0x00040000,</div><div class='add'>+			.size  = 0x00014fc0</div><div class='add'>+		},</div><div class='add'>+		.reg = {</div><div class='add'>+			.start = DRPW_BASE,</div><div class='add'>+			.size  = 0x00006000</div><div class='add'>+		},</div><div class='add'>+		.mem2 = {</div><div class='add'>+			.start = 0x00000000,</div><div class='add'>+			.size  = 0x00000000</div><div class='add'>+		},</div><div class='add'>+		.mem3 = {</div><div class='add'>+			.start = 0x00000000,</div><div class='add'>+			.size  = 0x00000000</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const int wl12xx_rtable[REG_TABLE_LEN] = {</div><div class='add'>+	[REG_ECPU_CONTROL]		= WL12XX_REG_ECPU_CONTROL,</div><div class='add'>+	[REG_INTERRUPT_NO_CLEAR]	= WL12XX_REG_INTERRUPT_NO_CLEAR,</div><div class='add'>+	[REG_INTERRUPT_ACK]		= WL12XX_REG_INTERRUPT_ACK,</div><div class='add'>+	[REG_COMMAND_MAILBOX_PTR]	= WL12XX_REG_COMMAND_MAILBOX_PTR,</div><div class='add'>+	[REG_EVENT_MAILBOX_PTR]		= WL12XX_REG_EVENT_MAILBOX_PTR,</div><div class='add'>+	[REG_INTERRUPT_TRIG]		= WL12XX_REG_INTERRUPT_TRIG,</div><div class='add'>+	[REG_INTERRUPT_MASK]		= WL12XX_REG_INTERRUPT_MASK,</div><div class='add'>+	[REG_PC_ON_RECOVERY]		= WL12XX_SCR_PAD4,</div><div class='add'>+	[REG_CHIP_ID_B]			= WL12XX_CHIP_ID_B,</div><div class='add'>+	[REG_CMD_MBOX_ADDRESS]		= WL12XX_CMD_MBOX_ADDRESS,</div><div class='add'>+</div><div class='add'>+	/* data access memory addresses, used with partition translation */</div><div class='add'>+	[REG_SLV_MEM_DATA]		= WL1271_SLV_MEM_DATA,</div><div class='add'>+	[REG_SLV_REG_DATA]		= WL1271_SLV_REG_DATA,</div><div class='add'>+</div><div class='add'>+	/* raw data access memory addresses */</div><div class='add'>+	[REG_RAW_FW_STATUS_ADDR]	= FW_STATUS_ADDR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TODO: maybe move to a new header file? */</div><div class='add'>+#define WL127X_FW_NAME_MULTI	"ti-connectivity/wl127x-fw-4-mr.bin"</div><div class='add'>+#define WL127X_FW_NAME_SINGLE	"ti-connectivity/wl127x-fw-4-sr.bin"</div><div class='add'>+#define WL127X_PLT_FW_NAME	"ti-connectivity/wl127x-fw-4-plt.bin"</div><div class='add'>+</div><div class='add'>+#define WL128X_FW_NAME_MULTI	"ti-connectivity/wl128x-fw-4-mr.bin"</div><div class='add'>+#define WL128X_FW_NAME_SINGLE	"ti-connectivity/wl128x-fw-4-sr.bin"</div><div class='add'>+#define WL128X_PLT_FW_NAME	"ti-connectivity/wl128x-fw-4-plt.bin"</div><div class='add'>+</div><div class='add'>+static void wl127x_prepare_read(struct wl1271 *wl, u32 rx_desc, u32 len)</div><div class='add'>+{</div><div class='add'>+	if (wl-&gt;chip.id != CHIP_ID_1283_PG20) {</div><div class='add'>+		struct wl1271_acx_mem_map *wl_mem_map = wl-&gt;target_mem_map;</div><div class='add'>+		struct wl1271_rx_mem_pool_addr rx_mem_addr;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Choose the block we want to read</div><div class='add'>+		 * For aggregated packets, only the first memory block</div><div class='add'>+		 * should be retrieved. The FW takes care of the rest.</div><div class='add'>+		 */</div><div class='add'>+		u32 mem_block = rx_desc &amp; RX_MEM_BLOCK_MASK;</div><div class='add'>+</div><div class='add'>+		rx_mem_addr.addr = (mem_block &lt;&lt; 8) +</div><div class='add'>+			le32_to_cpu(wl_mem_map-&gt;packet_memory_pool_start);</div><div class='add'>+</div><div class='add'>+		rx_mem_addr.addr_extra = rx_mem_addr.addr + 4;</div><div class='add'>+</div><div class='add'>+		wl1271_write(wl, WL1271_SLV_REG_DATA,</div><div class='add'>+			     &amp;rx_mem_addr, sizeof(rx_mem_addr), false);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wl12xx_identify_chip(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (wl-&gt;chip.id) {</div><div class='add'>+	case CHIP_ID_1271_PG10:</div><div class='add'>+		wl1271_warning("chip id 0x%x (1271 PG10) support is obsolete",</div><div class='add'>+			       wl-&gt;chip.id);</div><div class='add'>+</div><div class='add'>+		/* clear the alignment quirk, since we don't support it */</div><div class='add'>+		wl-&gt;quirks &amp;= ~WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN;</div><div class='add'>+</div><div class='add'>+		wl-&gt;quirks |= WLCORE_QUIRK_LEGACY_NVS;</div><div class='add'>+		wl-&gt;sr_fw_name = WL127X_FW_NAME_SINGLE;</div><div class='add'>+		wl-&gt;mr_fw_name = WL127X_FW_NAME_MULTI;</div><div class='add'>+		memcpy(&amp;wl-&gt;conf.mem, &amp;wl12xx_default_priv_conf.mem_wl127x,</div><div class='add'>+		       sizeof(wl-&gt;conf.mem));</div><div class='add'>+</div><div class='add'>+		/* read data preparation is only needed by wl127x */</div><div class='add'>+		wl-&gt;ops-&gt;prepare_read = wl127x_prepare_read;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CHIP_ID_1271_PG20:</div><div class='add'>+		wl1271_debug(DEBUG_BOOT, "chip id 0x%x (1271 PG20)",</div><div class='add'>+			     wl-&gt;chip.id);</div><div class='add'>+</div><div class='add'>+		/* clear the alignment quirk, since we don't support it */</div><div class='add'>+		wl-&gt;quirks &amp;= ~WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN;</div><div class='add'>+</div><div class='add'>+		wl-&gt;quirks |= WLCORE_QUIRK_LEGACY_NVS;</div><div class='add'>+		wl-&gt;plt_fw_name = WL127X_PLT_FW_NAME;</div><div class='add'>+		wl-&gt;sr_fw_name = WL127X_FW_NAME_SINGLE;</div><div class='add'>+		wl-&gt;mr_fw_name = WL127X_FW_NAME_MULTI;</div><div class='add'>+		memcpy(&amp;wl-&gt;conf.mem, &amp;wl12xx_default_priv_conf.mem_wl127x,</div><div class='add'>+		       sizeof(wl-&gt;conf.mem));</div><div class='add'>+</div><div class='add'>+		/* read data preparation is only needed by wl127x */</div><div class='add'>+		wl-&gt;ops-&gt;prepare_read = wl127x_prepare_read;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CHIP_ID_1283_PG20:</div><div class='add'>+		wl1271_debug(DEBUG_BOOT, "chip id 0x%x (1283 PG20)",</div><div class='add'>+			     wl-&gt;chip.id);</div><div class='add'>+		wl-&gt;plt_fw_name = WL128X_PLT_FW_NAME;</div><div class='add'>+		wl-&gt;sr_fw_name = WL128X_FW_NAME_SINGLE;</div><div class='add'>+		wl-&gt;mr_fw_name = WL128X_FW_NAME_MULTI;</div><div class='add'>+		break;</div><div class='add'>+	case CHIP_ID_1283_PG10:</div><div class='add'>+	default:</div><div class='add'>+		wl1271_warning("unsupported chip id: 0x%x", wl-&gt;chip.id);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wl12xx_top_reg_write(struct wl1271 *wl, int addr, u16 val)</div><div class='add'>+{</div><div class='add'>+	/* write address &gt;&gt; 1 + 0x30000 to OCP_POR_CTR */</div><div class='add'>+	addr = (addr &gt;&gt; 1) + 0x30000;</div><div class='add'>+	wl1271_write32(wl, WL12XX_OCP_POR_CTR, addr);</div><div class='add'>+</div><div class='add'>+	/* write value to OCP_POR_WDATA */</div><div class='add'>+	wl1271_write32(wl, WL12XX_OCP_DATA_WRITE, val);</div><div class='add'>+</div><div class='add'>+	/* write 1 to OCP_CMD */</div><div class='add'>+	wl1271_write32(wl, WL12XX_OCP_CMD, OCP_CMD_WRITE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 wl12xx_top_reg_read(struct wl1271 *wl, int addr)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int timeout = OCP_CMD_LOOP;</div><div class='add'>+</div><div class='add'>+	/* write address &gt;&gt; 1 + 0x30000 to OCP_POR_CTR */</div><div class='add'>+	addr = (addr &gt;&gt; 1) + 0x30000;</div><div class='add'>+	wl1271_write32(wl, WL12XX_OCP_POR_CTR, addr);</div><div class='add'>+</div><div class='add'>+	/* write 2 to OCP_CMD */</div><div class='add'>+	wl1271_write32(wl, WL12XX_OCP_CMD, OCP_CMD_READ);</div><div class='add'>+</div><div class='add'>+	/* poll for data ready */</div><div class='add'>+	do {</div><div class='add'>+		val = wl1271_read32(wl, WL12XX_OCP_DATA_READ);</div><div class='add'>+	} while (!(val &amp; OCP_READY_MASK) &amp;&amp; --timeout);</div><div class='add'>+</div><div class='add'>+	if (!timeout) {</div><div class='add'>+		wl1271_warning("Top register access timed out.");</div><div class='add'>+		return 0xffff;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check data status and return if OK */</div><div class='add'>+	if ((val &amp; OCP_STATUS_MASK) == OCP_STATUS_OK)</div><div class='add'>+		return val &amp; 0xffff;</div><div class='add'>+	else {</div><div class='add'>+		wl1271_warning("Top register access returned error.");</div><div class='add'>+		return 0xffff;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wl128x_switch_tcxo_to_fref(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	u16 spare_reg;</div><div class='add'>+</div><div class='add'>+	/* Mask bits [2] &amp; [8:4] in the sys_clk_cfg register */</div><div class='add'>+	spare_reg = wl12xx_top_reg_read(wl, WL_SPARE_REG);</div><div class='add'>+	if (spare_reg == 0xFFFF)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	spare_reg |= (BIT(3) | BIT(5) | BIT(6));</div><div class='add'>+	wl12xx_top_reg_write(wl, WL_SPARE_REG, spare_reg);</div><div class='add'>+</div><div class='add'>+	/* Enable FREF_CLK_REQ &amp; mux MCS and coex PLLs to FREF */</div><div class='add'>+	wl12xx_top_reg_write(wl, SYS_CLK_CFG_REG,</div><div class='add'>+			     WL_CLK_REQ_TYPE_PG2 | MCS_PLL_CLK_SEL_FREF);</div><div class='add'>+</div><div class='add'>+	/* Delay execution for 15msec, to let the HW settle */</div><div class='add'>+	mdelay(15);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool wl128x_is_tcxo_valid(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	u16 tcxo_detection;</div><div class='add'>+</div><div class='add'>+	tcxo_detection = wl12xx_top_reg_read(wl, TCXO_CLK_DETECT_REG);</div><div class='add'>+	if (tcxo_detection &amp; TCXO_DET_FAILED)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool wl128x_is_fref_valid(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	u16 fref_detection;</div><div class='add'>+</div><div class='add'>+	fref_detection = wl12xx_top_reg_read(wl, FREF_CLK_DETECT_REG);</div><div class='add'>+	if (fref_detection &amp; FREF_CLK_DETECT_FAIL)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wl128x_manually_configure_mcs_pll(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	wl12xx_top_reg_write(wl, MCS_PLL_M_REG, MCS_PLL_M_REG_VAL);</div><div class='add'>+	wl12xx_top_reg_write(wl, MCS_PLL_N_REG, MCS_PLL_N_REG_VAL);</div><div class='add'>+	wl12xx_top_reg_write(wl, MCS_PLL_CONFIG_REG, MCS_PLL_CONFIG_REG_VAL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk)</div><div class='add'>+{</div><div class='add'>+	u16 spare_reg;</div><div class='add'>+	u16 pll_config;</div><div class='add'>+	u8 input_freq;</div><div class='add'>+</div><div class='add'>+	/* Mask bits [3:1] in the sys_clk_cfg register */</div><div class='add'>+	spare_reg = wl12xx_top_reg_read(wl, WL_SPARE_REG);</div><div class='add'>+	if (spare_reg == 0xFFFF)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	spare_reg |= BIT(2);</div><div class='add'>+	wl12xx_top_reg_write(wl, WL_SPARE_REG, spare_reg);</div><div class='add'>+</div><div class='add'>+	/* Handle special cases of the TCXO clock */</div><div class='add'>+	if (wl-&gt;tcxo_clock == WL12XX_TCXOCLOCK_16_8 ||</div><div class='add'>+	    wl-&gt;tcxo_clock == WL12XX_TCXOCLOCK_33_6)</div><div class='add'>+		return wl128x_manually_configure_mcs_pll(wl);</div><div class='add'>+</div><div class='add'>+	/* Set the input frequency according to the selected clock source */</div><div class='add'>+	input_freq = (clk &amp; 1) + 1;</div><div class='add'>+</div><div class='add'>+	pll_config = wl12xx_top_reg_read(wl, MCS_PLL_CONFIG_REG);</div><div class='add'>+	if (pll_config == 0xFFFF)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	pll_config |= (input_freq &lt;&lt; MCS_SEL_IN_FREQ_SHIFT);</div><div class='add'>+	pll_config |= MCS_PLL_ENABLE_HP;</div><div class='add'>+	wl12xx_top_reg_write(wl, MCS_PLL_CONFIG_REG, pll_config);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * WL128x has two clocks input - TCXO and FREF.</div><div class='add'>+ * TCXO is the main clock of the device, while FREF is used to sync</div><div class='add'>+ * between the GPS and the cellular modem.</div><div class='add'>+ * In cases where TCXO is 32.736MHz or 16.368MHz, the FREF will be used</div><div class='add'>+ * as the WLAN/BT main clock.</div><div class='add'>+ */</div><div class='add'>+static int wl128x_boot_clk(struct wl1271 *wl, int *selected_clock)</div><div class='add'>+{</div><div class='add'>+	u16 sys_clk_cfg;</div><div class='add'>+</div><div class='add'>+	/* For XTAL-only modes, FREF will be used after switching from TCXO */</div><div class='add'>+	if (wl-&gt;ref_clock == WL12XX_REFCLOCK_26_XTAL ||</div><div class='add'>+	    wl-&gt;ref_clock == WL12XX_REFCLOCK_38_XTAL) {</div><div class='add'>+		if (!wl128x_switch_tcxo_to_fref(wl))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		goto fref_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Query the HW, to determine which clock source we should use */</div><div class='add'>+	sys_clk_cfg = wl12xx_top_reg_read(wl, SYS_CLK_CFG_REG);</div><div class='add'>+	if (sys_clk_cfg == 0xFFFF)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (sys_clk_cfg &amp; PRCM_CM_EN_MUX_WLAN_FREF)</div><div class='add'>+		goto fref_clk;</div><div class='add'>+</div><div class='add'>+	/* If TCXO is either 32.736MHz or 16.368MHz, switch to FREF */</div><div class='add'>+	if (wl-&gt;tcxo_clock == WL12XX_TCXOCLOCK_16_368 ||</div><div class='add'>+	    wl-&gt;tcxo_clock == WL12XX_TCXOCLOCK_32_736) {</div><div class='add'>+		if (!wl128x_switch_tcxo_to_fref(wl))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		goto fref_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* TCXO clock is selected */</div><div class='add'>+	if (!wl128x_is_tcxo_valid(wl))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	*selected_clock = wl-&gt;tcxo_clock;</div><div class='add'>+	goto config_mcs_pll;</div><div class='add'>+</div><div class='add'>+fref_clk:</div><div class='add'>+	/* FREF clock is selected */</div><div class='add'>+	if (!wl128x_is_fref_valid(wl))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	*selected_clock = wl-&gt;ref_clock;</div><div class='add'>+</div><div class='add'>+config_mcs_pll:</div><div class='add'>+	return wl128x_configure_mcs_pll(wl, *selected_clock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wl127x_boot_clk(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	u32 pause;</div><div class='add'>+	u32 clk;</div><div class='add'>+</div><div class='add'>+	if (WL127X_PG_GET_MAJOR(wl-&gt;hw_pg_ver) &lt; 3)</div><div class='add'>+		wl-&gt;quirks |= WLCORE_QUIRK_END_OF_TRANSACTION;</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;ref_clock == CONF_REF_CLK_19_2_E ||</div><div class='add'>+	    wl-&gt;ref_clock == CONF_REF_CLK_38_4_E ||</div><div class='add'>+	    wl-&gt;ref_clock == CONF_REF_CLK_38_4_M_XTAL)</div><div class='add'>+		/* ref clk: 19.2/38.4/38.4-XTAL */</div><div class='add'>+		clk = 0x3;</div><div class='add'>+	else if (wl-&gt;ref_clock == CONF_REF_CLK_26_E ||</div><div class='add'>+		 wl-&gt;ref_clock == CONF_REF_CLK_52_E)</div><div class='add'>+		/* ref clk: 26/52 */</div><div class='add'>+		clk = 0x5;</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;ref_clock != CONF_REF_CLK_19_2_E) {</div><div class='add'>+		u16 val;</div><div class='add'>+		/* Set clock type (open drain) */</div><div class='add'>+		val = wl12xx_top_reg_read(wl, OCP_REG_CLK_TYPE);</div><div class='add'>+		val &amp;= FREF_CLK_TYPE_BITS;</div><div class='add'>+		wl12xx_top_reg_write(wl, OCP_REG_CLK_TYPE, val);</div><div class='add'>+</div><div class='add'>+		/* Set clock pull mode (no pull) */</div><div class='add'>+		val = wl12xx_top_reg_read(wl, OCP_REG_CLK_PULL);</div><div class='add'>+		val |= NO_PULL;</div><div class='add'>+		wl12xx_top_reg_write(wl, OCP_REG_CLK_PULL, val);</div><div class='add'>+	} else {</div><div class='add'>+		u16 val;</div><div class='add'>+		/* Set clock polarity */</div><div class='add'>+		val = wl12xx_top_reg_read(wl, OCP_REG_CLK_POLARITY);</div><div class='add'>+		val &amp;= FREF_CLK_POLARITY_BITS;</div><div class='add'>+		val |= CLK_REQ_OUTN_SEL;</div><div class='add'>+		wl12xx_top_reg_write(wl, OCP_REG_CLK_POLARITY, val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wl1271_write32(wl, WL12XX_PLL_PARAMETERS, clk);</div><div class='add'>+</div><div class='add'>+	pause = wl1271_read32(wl, WL12XX_PLL_PARAMETERS);</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_BOOT, "pause1 0x%x", pause);</div><div class='add'>+</div><div class='add'>+	pause &amp;= ~(WU_COUNTER_PAUSE_VAL);</div><div class='add'>+	pause |= WU_COUNTER_PAUSE_VAL;</div><div class='add'>+	wl1271_write32(wl, WL12XX_WU_COUNTER_PAUSE, pause);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wl1271_boot_soft_reset(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	unsigned long timeout;</div><div class='add'>+	u32 boot_data;</div><div class='add'>+</div><div class='add'>+	/* perform soft reset */</div><div class='add'>+	wl1271_write32(wl, WL12XX_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT);</div><div class='add'>+</div><div class='add'>+	/* SOFT_RESET is self clearing */</div><div class='add'>+	timeout = jiffies + usecs_to_jiffies(SOFT_RESET_MAX_TIME);</div><div class='add'>+	while (1) {</div><div class='add'>+		boot_data = wl1271_read32(wl, WL12XX_SLV_SOFT_RESET);</div><div class='add'>+		wl1271_debug(DEBUG_BOOT, "soft reset bootdata 0x%x", boot_data);</div><div class='add'>+		if ((boot_data &amp; ACX_SLV_SOFT_RESET_BIT) == 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (time_after(jiffies, timeout)) {</div><div class='add'>+			/* 1.2 check pWhalBus-&gt;uSelfClearTime if the</div><div class='add'>+			 * timeout was reached */</div><div class='add'>+			wl1271_error("soft reset timeout");</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		udelay(SOFT_RESET_STALL_TIME);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* disable Rx/Tx */</div><div class='add'>+	wl1271_write32(wl, WL12XX_ENABLE, 0x0);</div><div class='add'>+</div><div class='add'>+	/* disable auto calibration on start*/</div><div class='add'>+	wl1271_write32(wl, WL12XX_SPARE_A2, 0xffff);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wl12xx_pre_boot(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 clk;</div><div class='add'>+	int selected_clock = -1;</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='add'>+		ret = wl128x_boot_clk(wl, &amp;selected_clock);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+	} else {</div><div class='add'>+		ret = wl127x_boot_clk(wl);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Continue the ELP wake up sequence */</div><div class='add'>+	wl1271_write32(wl, WL12XX_WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL);</div><div class='add'>+	udelay(500);</div><div class='add'>+</div><div class='add'>+	wlcore_set_partition(wl, &amp;wl-&gt;ptable[PART_DRPW]);</div><div class='add'>+</div><div class='add'>+	/* Read-modify-write DRPW_SCRATCH_START register (see next state)</div><div class='add'>+	   to be used by DRPw FW. The RTRIM value will be added by the FW</div><div class='add'>+	   before taking DRPw out of reset */</div><div class='add'>+</div><div class='add'>+	clk = wl1271_read32(wl, WL12XX_DRPW_SCRATCH_START);</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_BOOT, "clk2 0x%x", clk);</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;chip.id == CHIP_ID_1283_PG20)</div><div class='add'>+		clk |= ((selected_clock &amp; 0x3) &lt;&lt; 1) &lt;&lt; 4;</div><div class='add'>+	else</div><div class='add'>+		clk |= (wl-&gt;ref_clock &lt;&lt; 1) &lt;&lt; 4;</div><div class='add'>+</div><div class='add'>+	wl1271_write32(wl, WL12XX_DRPW_SCRATCH_START, clk);</div><div class='add'>+</div><div class='add'>+	wlcore_set_partition(wl, &amp;wl-&gt;ptable[PART_WORK]);</div><div class='add'>+</div><div class='add'>+	/* Disable interrupts */</div><div class='add'>+	wlcore_write_reg(wl, REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL);</div><div class='add'>+</div><div class='add'>+	ret = wl1271_boot_soft_reset(wl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wl12xx_pre_upload(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	u32 tmp;</div><div class='add'>+</div><div class='add'>+	/* write firmware's last address (ie. it's length) to</div><div class='add'>+	 * ACX_EEPROMLESS_IND_REG */</div><div class='add'>+	wl1271_debug(DEBUG_BOOT, "ACX_EEPROMLESS_IND_REG");</div><div class='add'>+</div><div class='add'>+	wl1271_write32(wl, WL12XX_EEPROMLESS_IND, WL12XX_EEPROMLESS_IND);</div><div class='add'>+</div><div class='add'>+	tmp = wlcore_read_reg(wl, REG_CHIP_ID_B);</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_BOOT, "chip id 0x%x", tmp);</div><div class='add'>+</div><div class='add'>+	/* 6. read the EEPROM parameters */</div><div class='add'>+	tmp = wl1271_read32(wl, WL12XX_SCR_PAD2);</div><div class='add'>+</div><div class='add'>+	/* WL1271: The reference driver skips steps 7 to 10 (jumps directly</div><div class='add'>+	 * to upload_fw) */</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;chip.id == CHIP_ID_1283_PG20)</div><div class='add'>+		wl12xx_top_reg_write(wl, SDIO_IO_DS, HCI_IO_DS_6MA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wl12xx_enable_interrupts(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	u32 polarity;</div><div class='add'>+</div><div class='add'>+	polarity = wl12xx_top_reg_read(wl, OCP_REG_POLARITY);</div><div class='add'>+</div><div class='add'>+	/* We use HIGH polarity, so unset the LOW bit */</div><div class='add'>+	polarity &amp;= ~POLARITY_LOW;</div><div class='add'>+	wl12xx_top_reg_write(wl, OCP_REG_POLARITY, polarity);</div><div class='add'>+</div><div class='add'>+	wlcore_write_reg(wl, REG_INTERRUPT_MASK, WL1271_ACX_ALL_EVENTS_VECTOR);</div><div class='add'>+</div><div class='add'>+	wlcore_enable_interrupts(wl);</div><div class='add'>+	wlcore_write_reg(wl, REG_INTERRUPT_MASK,</div><div class='add'>+			 WL1271_ACX_INTR_ALL &amp; ~(WL1271_INTR_MASK));</div><div class='add'>+</div><div class='add'>+	wl1271_write32(wl, WL12XX_HI_CFG, HI_CFG_DEF_VAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wl12xx_boot(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = wl12xx_pre_boot(wl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = wlcore_boot_upload_nvs(wl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	wl12xx_pre_upload(wl);</div><div class='add'>+</div><div class='add'>+	ret = wlcore_boot_upload_firmware(wl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = wlcore_boot_run_firmware(wl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	wl12xx_enable_interrupts(wl);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wl12xx_trigger_cmd(struct wl1271 *wl, int cmd_box_addr,</div><div class='add'>+			       void *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	wl1271_write(wl, cmd_box_addr, buf, len, false);</div><div class='add'>+	wlcore_write_reg(wl, REG_INTERRUPT_TRIG, WL12XX_INTR_TRIG_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wl12xx_ack_event(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	wlcore_write_reg(wl, REG_INTERRUPT_TRIG, WL12XX_INTR_TRIG_EVENT_ACK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 wl12xx_calc_tx_blocks(struct wl1271 *wl, u32 len, u32 spare_blks)</div><div class='add'>+{</div><div class='add'>+	u32 blk_size = WL12XX_TX_HW_BLOCK_SIZE;</div><div class='add'>+	u32 align_len = wlcore_calc_packet_alignment(wl, len);</div><div class='add'>+</div><div class='add'>+	return (align_len + blk_size - 1) / blk_size + spare_blks;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+wl12xx_set_tx_desc_blocks(struct wl1271 *wl, struct wl1271_tx_hw_descr *desc,</div><div class='add'>+			  u32 blks, u32 spare_blks)</div><div class='add'>+{</div><div class='add'>+	if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='add'>+		desc-&gt;wl128x_mem.total_mem_blocks = blks;</div><div class='add'>+	} else {</div><div class='add'>+		desc-&gt;wl127x_mem.extra_blocks = spare_blks;</div><div class='add'>+		desc-&gt;wl127x_mem.total_mem_blocks = blks;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+wl12xx_set_tx_desc_data_len(struct wl1271 *wl, struct wl1271_tx_hw_descr *desc,</div><div class='add'>+			    struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	u32 aligned_len = wlcore_calc_packet_alignment(wl, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='add'>+		desc-&gt;wl128x_mem.extra_bytes = aligned_len - skb-&gt;len;</div><div class='add'>+		desc-&gt;length = cpu_to_le16(aligned_len &gt;&gt; 2);</div><div class='add'>+</div><div class='add'>+		wl1271_debug(DEBUG_TX,</div><div class='add'>+			     "tx_fill_hdr: hlid: %d len: %d life: %d mem: %d extra: %d",</div><div class='add'>+			     desc-&gt;hlid,</div><div class='add'>+			     le16_to_cpu(desc-&gt;length),</div><div class='add'>+			     le16_to_cpu(desc-&gt;life_time),</div><div class='add'>+			     desc-&gt;wl128x_mem.total_mem_blocks,</div><div class='add'>+			     desc-&gt;wl128x_mem.extra_bytes);</div><div class='add'>+	} else {</div><div class='add'>+		/* calculate number of padding bytes */</div><div class='add'>+		int pad = aligned_len - skb-&gt;len;</div><div class='add'>+		desc-&gt;tx_attr |=</div><div class='add'>+			cpu_to_le16(pad &lt;&lt; TX_HW_ATTR_OFST_LAST_WORD_PAD);</div><div class='add'>+</div><div class='add'>+		/* Store the aligned length in terms of words */</div><div class='add'>+		desc-&gt;length = cpu_to_le16(aligned_len &gt;&gt; 2);</div><div class='add'>+</div><div class='add'>+		wl1271_debug(DEBUG_TX,</div><div class='add'>+			     "tx_fill_hdr: pad: %d hlid: %d len: %d life: %d mem: %d",</div><div class='add'>+			     pad, desc-&gt;hlid,</div><div class='add'>+			     le16_to_cpu(desc-&gt;length),</div><div class='add'>+			     le16_to_cpu(desc-&gt;life_time),</div><div class='add'>+			     desc-&gt;wl127x_mem.total_mem_blocks);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum wl_rx_buf_align</div><div class='add'>+wl12xx_get_rx_buf_align(struct wl1271 *wl, u32 rx_desc)</div><div class='add'>+{</div><div class='add'>+	if (rx_desc &amp; RX_BUF_UNALIGNED_PAYLOAD)</div><div class='add'>+		return WLCORE_RX_BUF_UNALIGNED;</div><div class='add'>+</div><div class='add'>+	return WLCORE_RX_BUF_ALIGNED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 wl12xx_get_rx_packet_len(struct wl1271 *wl, void *rx_data,</div><div class='add'>+				    u32 data_len)</div><div class='add'>+{</div><div class='add'>+	struct wl1271_rx_descriptor *desc = rx_data;</div><div class='add'>+</div><div class='add'>+	/* invalid packet */</div><div class='add'>+	if (data_len &lt; sizeof(*desc) ||</div><div class='add'>+	    data_len &lt; sizeof(*desc) + desc-&gt;pad_len)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return data_len - sizeof(*desc) - desc-&gt;pad_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wl12xx_tx_delayed_compl(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	if (wl-&gt;fw_status-&gt;tx_results_counter == (wl-&gt;tx_results_count &amp; 0xff))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	wl1271_tx_complete(wl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wl12xx_hw_init(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='add'>+		u32 host_cfg_bitmap = HOST_IF_CFG_RX_FIFO_ENABLE;</div><div class='add'>+</div><div class='add'>+		ret = wl128x_cmd_general_parms(wl);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+		ret = wl128x_cmd_radio_parms(wl);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		if (wl-&gt;quirks &amp; WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN)</div><div class='add'>+			/* Enable SDIO padding */</div><div class='add'>+			host_cfg_bitmap |= HOST_IF_CFG_TX_PAD_TO_SDIO_BLK;</div><div class='add'>+</div><div class='add'>+		/* Must be before wl1271_acx_init_mem_config() */</div><div class='add'>+		ret = wl1271_acx_host_if_cfg_bitmap(wl, host_cfg_bitmap);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+	} else {</div><div class='add'>+		ret = wl1271_cmd_general_parms(wl);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+		ret = wl1271_cmd_radio_parms(wl);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+		ret = wl1271_cmd_ext_radio_parms(wl);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 wl12xx_sta_get_ap_rate_mask(struct wl1271 *wl,</div><div class='add'>+				       struct wl12xx_vif *wlvif)</div><div class='add'>+{</div><div class='add'>+	return wlvif-&gt;rate_set;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wl12xx_identify_fw(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	unsigned int *fw_ver = wl-&gt;chip.fw_ver;</div><div class='add'>+</div><div class='add'>+	/* Only new station firmwares support routing fw logs to the host */</div><div class='add'>+	if ((fw_ver[FW_VER_IF_TYPE] == FW_VER_IF_TYPE_STA) &amp;&amp;</div><div class='add'>+	    (fw_ver[FW_VER_MINOR] &lt; FW_VER_MINOR_FWLOG_STA_MIN))</div><div class='add'>+		wl-&gt;quirks |= WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED;</div><div class='add'>+</div><div class='add'>+	/* This feature is not yet supported for AP mode */</div><div class='add'>+	if (fw_ver[FW_VER_IF_TYPE] == FW_VER_IF_TYPE_AP)</div><div class='add'>+		wl-&gt;quirks |= WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wl12xx_conf_init(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	struct wl12xx_priv *priv = wl-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* apply driver default configuration */</div><div class='add'>+	memcpy(&amp;wl-&gt;conf, &amp;wl12xx_conf, sizeof(wl12xx_conf));</div><div class='add'>+</div><div class='add'>+	/* apply default private configuration */</div><div class='add'>+	memcpy(&amp;priv-&gt;conf, &amp;wl12xx_default_priv_conf, sizeof(priv-&gt;conf));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool wl12xx_mac_in_fuse(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	bool supported = false;</div><div class='add'>+	u8 major, minor;</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='add'>+		major = WL128X_PG_GET_MAJOR(wl-&gt;hw_pg_ver);</div><div class='add'>+		minor = WL128X_PG_GET_MINOR(wl-&gt;hw_pg_ver);</div><div class='add'>+</div><div class='add'>+		/* in wl128x we have the MAC address if the PG is &gt;= (2, 1) */</div><div class='add'>+		if (major &gt; 2 || (major == 2 &amp;&amp; minor &gt;= 1))</div><div class='add'>+			supported = true;</div><div class='add'>+	} else {</div><div class='add'>+		major = WL127X_PG_GET_MAJOR(wl-&gt;hw_pg_ver);</div><div class='add'>+		minor = WL127X_PG_GET_MINOR(wl-&gt;hw_pg_ver);</div><div class='add'>+</div><div class='add'>+		/* in wl127x we have the MAC address if the PG is &gt;= (3, 1) */</div><div class='add'>+		if (major == 3 &amp;&amp; minor &gt;= 1)</div><div class='add'>+			supported = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_PROBE,</div><div class='add'>+		     "PG Ver major = %d minor = %d, MAC %s present",</div><div class='add'>+		     major, minor, supported ? "is" : "is not");</div><div class='add'>+</div><div class='add'>+	return supported;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wl12xx_get_fuse_mac(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	u32 mac1, mac2;</div><div class='add'>+</div><div class='add'>+	wlcore_set_partition(wl, &amp;wl-&gt;ptable[PART_DRPW]);</div><div class='add'>+</div><div class='add'>+	mac1 = wl1271_read32(wl, WL12XX_REG_FUSE_BD_ADDR_1);</div><div class='add'>+	mac2 = wl1271_read32(wl, WL12XX_REG_FUSE_BD_ADDR_2);</div><div class='add'>+</div><div class='add'>+	/* these are the two parts of the BD_ADDR */</div><div class='add'>+	wl-&gt;fuse_oui_addr = ((mac2 &amp; 0xffff) &lt;&lt; 8) +</div><div class='add'>+		((mac1 &amp; 0xff000000) &gt;&gt; 24);</div><div class='add'>+	wl-&gt;fuse_nic_addr = mac1 &amp; 0xffffff;</div><div class='add'>+</div><div class='add'>+	wlcore_set_partition(wl, &amp;wl-&gt;ptable[PART_DOWN]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static s8 wl12xx_get_pg_ver(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	u32 die_info;</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;chip.id == CHIP_ID_1283_PG20)</div><div class='add'>+		die_info = wl12xx_top_reg_read(wl, WL128X_REG_FUSE_DATA_2_1);</div><div class='add'>+	else</div><div class='add'>+		die_info = wl12xx_top_reg_read(wl, WL127X_REG_FUSE_DATA_2_1);</div><div class='add'>+</div><div class='add'>+	return (s8) (die_info &amp; PG_VER_MASK) &gt;&gt; PG_VER_OFFSET;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wl12xx_get_mac(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	if (wl12xx_mac_in_fuse(wl))</div><div class='add'>+		wl12xx_get_fuse_mac(wl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct wlcore_ops wl12xx_ops = {</div><div class='add'>+	.identify_chip		= wl12xx_identify_chip,</div><div class='add'>+	.identify_fw		= wl12xx_identify_fw,</div><div class='add'>+	.boot			= wl12xx_boot,</div><div class='add'>+	.trigger_cmd		= wl12xx_trigger_cmd,</div><div class='add'>+	.ack_event		= wl12xx_ack_event,</div><div class='add'>+	.calc_tx_blocks		= wl12xx_calc_tx_blocks,</div><div class='add'>+	.set_tx_desc_blocks	= wl12xx_set_tx_desc_blocks,</div><div class='add'>+	.set_tx_desc_data_len	= wl12xx_set_tx_desc_data_len,</div><div class='add'>+	.get_rx_buf_align	= wl12xx_get_rx_buf_align,</div><div class='add'>+	.get_rx_packet_len	= wl12xx_get_rx_packet_len,</div><div class='add'>+	.tx_immediate_compl	= NULL,</div><div class='add'>+	.tx_delayed_compl	= wl12xx_tx_delayed_compl,</div><div class='add'>+	.hw_init		= wl12xx_hw_init,</div><div class='add'>+	.init_vif		= NULL,</div><div class='add'>+	.sta_get_ap_rate_mask	= wl12xx_sta_get_ap_rate_mask,</div><div class='add'>+	.get_pg_ver		= wl12xx_get_pg_ver,</div><div class='add'>+	.get_mac		= wl12xx_get_mac,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ieee80211_sta_ht_cap wl12xx_ht_cap = {</div><div class='add'>+	.cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20 |</div><div class='add'>+	       (1 &lt;&lt; IEEE80211_HT_CAP_RX_STBC_SHIFT),</div><div class='add'>+	.ht_supported = true,</div><div class='add'>+	.ampdu_factor = IEEE80211_HT_MAX_AMPDU_8K,</div><div class='add'>+	.ampdu_density = IEEE80211_HT_MPDU_DENSITY_8,</div><div class='add'>+	.mcs = {</div><div class='add'>+		.rx_mask = { 0xff, 0, 0, 0, 0, 0, 0, 0, 0, 0, },</div><div class='add'>+		.rx_highest = cpu_to_le16(72),</div><div class='add'>+		.tx_params = IEEE80211_HT_MCS_TX_DEFINED,</div><div class='add'>+		},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit wl12xx_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct wl1271 *wl;</div><div class='add'>+	struct ieee80211_hw *hw;</div><div class='add'>+	struct wl12xx_priv *priv;</div><div class='add'>+</div><div class='add'>+	hw = wlcore_alloc_hw(sizeof(*priv));</div><div class='add'>+	if (IS_ERR(hw)) {</div><div class='add'>+		wl1271_error("can't allocate hw");</div><div class='add'>+		return PTR_ERR(hw);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wl = hw-&gt;priv;</div><div class='add'>+	wl-&gt;ops = &amp;wl12xx_ops;</div><div class='add'>+	wl-&gt;ptable = wl12xx_ptable;</div><div class='add'>+	wl-&gt;rtable = wl12xx_rtable;</div><div class='add'>+	wl-&gt;num_tx_desc = 16;</div><div class='add'>+	wl-&gt;normal_tx_spare = WL12XX_TX_HW_BLOCK_SPARE_DEFAULT;</div><div class='add'>+	wl-&gt;gem_tx_spare = WL12XX_TX_HW_BLOCK_GEM_SPARE;</div><div class='add'>+	wl-&gt;band_rate_to_idx = wl12xx_band_rate_to_idx;</div><div class='add'>+	wl-&gt;hw_tx_rate_tbl_size = WL12XX_CONF_HW_RXTX_RATE_MAX;</div><div class='add'>+	wl-&gt;hw_min_ht_rate = WL12XX_CONF_HW_RXTX_RATE_MCS0;</div><div class='add'>+	wl-&gt;fw_status_priv_len = 0;</div><div class='add'>+	memcpy(&amp;wl-&gt;ht_cap, &amp;wl12xx_ht_cap, sizeof(wl12xx_ht_cap));</div><div class='add'>+	wl12xx_conf_init(wl);</div><div class='add'>+</div><div class='add'>+	return wlcore_probe(wl, pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct platform_device_id wl12xx_id_table[] __devinitconst = {</div><div class='add'>+	{ "wl12xx", 0 },</div><div class='add'>+	{  } /* Terminating Entry */</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(platform, wl12xx_id_table);</div><div class='add'>+</div><div class='add'>+static struct platform_driver wl12xx_driver = {</div><div class='add'>+	.probe		= wl12xx_probe,</div><div class='add'>+	.remove		= __devexit_p(wlcore_remove),</div><div class='add'>+	.id_table	= wl12xx_id_table,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "wl12xx_driver",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init wl12xx_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;wl12xx_driver);</div><div class='add'>+}</div><div class='add'>+module_init(wl12xx_init);</div><div class='add'>+</div><div class='add'>+static void __exit wl12xx_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;wl12xx_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(wl12xx_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_AUTHOR("Luciano Coelho &lt;coelho@ti.com&gt;");</div><div class='add'>+MODULE_FIRMWARE(WL127X_FW_NAME_SINGLE);</div><div class='add'>+MODULE_FIRMWARE(WL127X_FW_NAME_MULTI);</div><div class='add'>+MODULE_FIRMWARE(WL127X_PLT_FW_NAME);</div><div class='add'>+MODULE_FIRMWARE(WL128X_FW_NAME_SINGLE);</div><div class='add'>+MODULE_FIRMWARE(WL128X_FW_NAME_MULTI);</div><div class='add'>+MODULE_FIRMWARE(WL128X_PLT_FW_NAME);</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/reg.h b/drivers/net/wireless/ti/wl12xx/reg.h<br/>index 340db324bc26..79ede02e2587 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/reg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/reg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl12xx/reg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/reg.h</a></div><div class='hunk'>@@ -33,16 +33,8 @@</div><div class='ctx'> #define REGISTERS_DOWN_SIZE 0x00008800</div><div class='ctx'> #define REGISTERS_WORK_SIZE 0x0000b000</div><div class='ctx'> </div><div class='del'>-#define HW_ACCESS_ELP_CTRL_REG_ADDR         0x1FFFC</div><div class='ctx'> #define FW_STATUS_ADDR                      (0x14FC0 + 0xA000)</div><div class='ctx'> </div><div class='del'>-/* ELP register commands */</div><div class='del'>-#define ELPCTRL_WAKE_UP             0x1</div><div class='del'>-#define ELPCTRL_WAKE_UP_WLAN_READY  0x5</div><div class='del'>-#define ELPCTRL_SLEEP               0x0</div><div class='del'>-/* ELP WLAN_READY bit */</div><div class='del'>-#define ELPCTRL_WLAN_READY          0x2</div><div class='del'>-</div><div class='ctx'> /*===============================================</div><div class='ctx'>    Host Software Reset - 32bit RW</div><div class='ctx'>  ------------------------------------------</div><div class='hunk'>@@ -57,14 +49,14 @@</div><div class='ctx'>     (not self-clearing), the Wlan hardware</div><div class='ctx'>     exits the software reset state.</div><div class='ctx'> ===============================================*/</div><div class='del'>-#define ACX_REG_SLV_SOFT_RESET         (REGISTERS_BASE + 0x0000)</div><div class='add'>+#define WL12XX_SLV_SOFT_RESET		(REGISTERS_BASE + 0x0000)</div><div class='ctx'> </div><div class='ctx'> #define WL1271_SLV_REG_DATA            (REGISTERS_BASE + 0x0008)</div><div class='ctx'> #define WL1271_SLV_REG_ADATA           (REGISTERS_BASE + 0x000c)</div><div class='ctx'> #define WL1271_SLV_MEM_DATA            (REGISTERS_BASE + 0x0018)</div><div class='ctx'> </div><div class='del'>-#define ACX_REG_INTERRUPT_TRIG         (REGISTERS_BASE + 0x0474)</div><div class='del'>-#define ACX_REG_INTERRUPT_TRIG_H       (REGISTERS_BASE + 0x0478)</div><div class='add'>+#define WL12XX_REG_INTERRUPT_TRIG         (REGISTERS_BASE + 0x0474)</div><div class='add'>+#define WL12XX_REG_INTERRUPT_TRIG_H       (REGISTERS_BASE + 0x0478)</div><div class='ctx'> </div><div class='ctx'> /*=============================================</div><div class='ctx'>   Host Interrupt Mask Register - 32bit (RW)</div><div class='hunk'>@@ -94,7 +86,7 @@</div><div class='ctx'>  21-			-</div><div class='ctx'>  Default: 0x0001</div><div class='ctx'> *==============================================*/</div><div class='del'>-#define ACX_REG_INTERRUPT_MASK         (REGISTERS_BASE + 0x04DC)</div><div class='add'>+#define WL12XX_REG_INTERRUPT_MASK         (REGISTERS_BASE + 0x04DC)</div><div class='ctx'> </div><div class='ctx'> /*=============================================</div><div class='ctx'>   Host Interrupt Mask Set 16bit, (Write only)</div><div class='hunk'>@@ -125,7 +117,7 @@</div><div class='ctx'>  Reading this register doesn't</div><div class='ctx'>  effect its content.</div><div class='ctx'> =============================================*/</div><div class='del'>-#define ACX_REG_INTERRUPT_NO_CLEAR     (REGISTERS_BASE + 0x04E8)</div><div class='add'>+#define WL12XX_REG_INTERRUPT_NO_CLEAR     (REGISTERS_BASE + 0x04E8)</div><div class='ctx'> </div><div class='ctx'> /*=============================================</div><div class='ctx'>   Host Interrupt Status Clear on Read  Register</div><div class='hunk'>@@ -148,9 +140,9 @@</div><div class='ctx'>  HINT_STS_ND registers, thus making the</div><div class='ctx'>  assotiated interrupt inactive. (0-no effect)</div><div class='ctx'> ==============================================*/</div><div class='del'>-#define ACX_REG_INTERRUPT_ACK          (REGISTERS_BASE + 0x04F0)</div><div class='add'>+#define WL12XX_REG_INTERRUPT_ACK          (REGISTERS_BASE + 0x04F0)</div><div class='ctx'> </div><div class='del'>-#define RX_DRIVER_COUNTER_ADDRESS      (REGISTERS_BASE + 0x0538)</div><div class='add'>+#define WL12XX_REG_RX_DRIVER_COUNTER	(REGISTERS_BASE + 0x0538)</div><div class='ctx'> </div><div class='ctx'> /* Device Configuration registers*/</div><div class='ctx'> #define SOR_CFG                        (REGISTERS_BASE + 0x0800)</div><div class='hunk'>@@ -175,9 +167,9 @@</div><div class='ctx'>  1 halt eCPU</div><div class='ctx'>  0 enable eCPU</div><div class='ctx'>  ===============================================*/</div><div class='del'>-#define ACX_REG_ECPU_CONTROL           (REGISTERS_BASE + 0x0804)</div><div class='add'>+#define WL12XX_REG_ECPU_CONTROL           (REGISTERS_BASE + 0x0804)</div><div class='ctx'> </div><div class='del'>-#define HI_CFG                         (REGISTERS_BASE + 0x0808)</div><div class='add'>+#define WL12XX_HI_CFG			(REGISTERS_BASE + 0x0808)</div><div class='ctx'> </div><div class='ctx'> /*===============================================</div><div class='ctx'>  EEPROM Burst Read Start  - 32bit RW</div><div class='hunk'>@@ -196,72 +188,67 @@</div><div class='ctx'> *================================================*/</div><div class='ctx'> #define ACX_REG_EE_START               (REGISTERS_BASE + 0x080C)</div><div class='ctx'> </div><div class='del'>-#define OCP_POR_CTR                    (REGISTERS_BASE + 0x09B4)</div><div class='del'>-#define OCP_DATA_WRITE                 (REGISTERS_BASE + 0x09B8)</div><div class='del'>-#define OCP_DATA_READ                  (REGISTERS_BASE + 0x09BC)</div><div class='del'>-#define OCP_CMD                        (REGISTERS_BASE + 0x09C0)</div><div class='del'>-</div><div class='del'>-#define WL1271_HOST_WR_ACCESS          (REGISTERS_BASE + 0x09F8)</div><div class='add'>+#define WL12XX_OCP_POR_CTR		(REGISTERS_BASE + 0x09B4)</div><div class='add'>+#define WL12XX_OCP_DATA_WRITE		(REGISTERS_BASE + 0x09B8)</div><div class='add'>+#define WL12XX_OCP_DATA_READ		(REGISTERS_BASE + 0x09BC)</div><div class='add'>+#define WL12XX_OCP_CMD			(REGISTERS_BASE + 0x09C0)</div><div class='ctx'> </div><div class='del'>-#define CHIP_ID_B                      (REGISTERS_BASE + 0x5674)</div><div class='add'>+#define WL12XX_HOST_WR_ACCESS		(REGISTERS_BASE + 0x09F8)</div><div class='ctx'> </div><div class='del'>-#define CHIP_ID_1271_PG10              (0x4030101)</div><div class='del'>-#define CHIP_ID_1271_PG20              (0x4030111)</div><div class='del'>-#define CHIP_ID_1283_PG10              (0x05030101)</div><div class='del'>-#define CHIP_ID_1283_PG20              (0x05030111)</div><div class='add'>+#define WL12XX_CHIP_ID_B		(REGISTERS_BASE + 0x5674)</div><div class='ctx'> </div><div class='del'>-#define ENABLE                         (REGISTERS_BASE + 0x5450)</div><div class='add'>+#define WL12XX_ENABLE			(REGISTERS_BASE + 0x5450)</div><div class='ctx'> </div><div class='ctx'> /* Power Management registers */</div><div class='del'>-#define ELP_CFG_MODE                   (REGISTERS_BASE + 0x5804)</div><div class='del'>-#define ELP_CMD                        (REGISTERS_BASE + 0x5808)</div><div class='del'>-#define PLL_CAL_TIME                   (REGISTERS_BASE + 0x5810)</div><div class='del'>-#define CLK_REQ_TIME                   (REGISTERS_BASE + 0x5814)</div><div class='del'>-#define CLK_BUF_TIME                   (REGISTERS_BASE + 0x5818)</div><div class='add'>+#define WL12XX_ELP_CFG_MODE		(REGISTERS_BASE + 0x5804)</div><div class='add'>+#define WL12XX_ELP_CMD			(REGISTERS_BASE + 0x5808)</div><div class='add'>+#define WL12XX_PLL_CAL_TIME		(REGISTERS_BASE + 0x5810)</div><div class='add'>+#define WL12XX_CLK_REQ_TIME		(REGISTERS_BASE + 0x5814)</div><div class='add'>+#define WL12XX_CLK_BUF_TIME		(REGISTERS_BASE + 0x5818)</div><div class='ctx'> </div><div class='del'>-#define CFG_PLL_SYNC_CNT               (REGISTERS_BASE + 0x5820)</div><div class='add'>+#define WL12XX_CFG_PLL_SYNC_CNT		(REGISTERS_BASE + 0x5820)</div><div class='ctx'> </div><div class='ctx'> /* Scratch Pad registers*/</div><div class='del'>-#define SCR_PAD0                       (REGISTERS_BASE + 0x5608)</div><div class='del'>-#define SCR_PAD1                       (REGISTERS_BASE + 0x560C)</div><div class='del'>-#define SCR_PAD2                       (REGISTERS_BASE + 0x5610)</div><div class='del'>-#define SCR_PAD3                       (REGISTERS_BASE + 0x5614)</div><div class='del'>-#define SCR_PAD4                       (REGISTERS_BASE + 0x5618)</div><div class='del'>-#define SCR_PAD4_SET                   (REGISTERS_BASE + 0x561C)</div><div class='del'>-#define SCR_PAD4_CLR                   (REGISTERS_BASE + 0x5620)</div><div class='del'>-#define SCR_PAD5                       (REGISTERS_BASE + 0x5624)</div><div class='del'>-#define SCR_PAD5_SET                   (REGISTERS_BASE + 0x5628)</div><div class='del'>-#define SCR_PAD5_CLR                   (REGISTERS_BASE + 0x562C)</div><div class='del'>-#define SCR_PAD6                       (REGISTERS_BASE + 0x5630)</div><div class='del'>-#define SCR_PAD7                       (REGISTERS_BASE + 0x5634)</div><div class='del'>-#define SCR_PAD8                       (REGISTERS_BASE + 0x5638)</div><div class='del'>-#define SCR_PAD9                       (REGISTERS_BASE + 0x563C)</div><div class='add'>+#define WL12XX_SCR_PAD0			(REGISTERS_BASE + 0x5608)</div><div class='add'>+#define WL12XX_SCR_PAD1			(REGISTERS_BASE + 0x560C)</div><div class='add'>+#define WL12XX_SCR_PAD2			(REGISTERS_BASE + 0x5610)</div><div class='add'>+#define WL12XX_SCR_PAD3			(REGISTERS_BASE + 0x5614)</div><div class='add'>+#define WL12XX_SCR_PAD4			(REGISTERS_BASE + 0x5618)</div><div class='add'>+#define WL12XX_SCR_PAD4_SET		(REGISTERS_BASE + 0x561C)</div><div class='add'>+#define WL12XX_SCR_PAD4_CLR		(REGISTERS_BASE + 0x5620)</div><div class='add'>+#define WL12XX_SCR_PAD5			(REGISTERS_BASE + 0x5624)</div><div class='add'>+#define WL12XX_SCR_PAD5_SET		(REGISTERS_BASE + 0x5628)</div><div class='add'>+#define WL12XX_SCR_PAD5_CLR		(REGISTERS_BASE + 0x562C)</div><div class='add'>+#define WL12XX_SCR_PAD6			(REGISTERS_BASE + 0x5630)</div><div class='add'>+#define WL12XX_SCR_PAD7			(REGISTERS_BASE + 0x5634)</div><div class='add'>+#define WL12XX_SCR_PAD8			(REGISTERS_BASE + 0x5638)</div><div class='add'>+#define WL12XX_SCR_PAD9			(REGISTERS_BASE + 0x563C)</div><div class='ctx'> </div><div class='ctx'> /* Spare registers*/</div><div class='del'>-#define SPARE_A1                       (REGISTERS_BASE + 0x0994)</div><div class='del'>-#define SPARE_A2                       (REGISTERS_BASE + 0x0998)</div><div class='del'>-#define SPARE_A3                       (REGISTERS_BASE + 0x099C)</div><div class='del'>-#define SPARE_A4                       (REGISTERS_BASE + 0x09A0)</div><div class='del'>-#define SPARE_A5                       (REGISTERS_BASE + 0x09A4)</div><div class='del'>-#define SPARE_A6                       (REGISTERS_BASE + 0x09A8)</div><div class='del'>-#define SPARE_A7                       (REGISTERS_BASE + 0x09AC)</div><div class='del'>-#define SPARE_A8                       (REGISTERS_BASE + 0x09B0)</div><div class='del'>-#define SPARE_B1                       (REGISTERS_BASE + 0x5420)</div><div class='del'>-#define SPARE_B2                       (REGISTERS_BASE + 0x5424)</div><div class='del'>-#define SPARE_B3                       (REGISTERS_BASE + 0x5428)</div><div class='del'>-#define SPARE_B4                       (REGISTERS_BASE + 0x542C)</div><div class='del'>-#define SPARE_B5                       (REGISTERS_BASE + 0x5430)</div><div class='del'>-#define SPARE_B6                       (REGISTERS_BASE + 0x5434)</div><div class='del'>-#define SPARE_B7                       (REGISTERS_BASE + 0x5438)</div><div class='del'>-#define SPARE_B8                       (REGISTERS_BASE + 0x543C)</div><div class='del'>-</div><div class='del'>-#define PLL_PARAMETERS                 (REGISTERS_BASE + 0x6040)</div><div class='del'>-#define WU_COUNTER_PAUSE               (REGISTERS_BASE + 0x6008)</div><div class='del'>-#define WELP_ARM_COMMAND               (REGISTERS_BASE + 0x6100)</div><div class='del'>-#define DRPW_SCRATCH_START             (DRPW_BASE + 0x002C)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define ACX_SLV_SOFT_RESET_BIT   BIT(1)</div><div class='add'>+#define WL12XX_SPARE_A1			(REGISTERS_BASE + 0x0994)</div><div class='add'>+#define WL12XX_SPARE_A2			(REGISTERS_BASE + 0x0998)</div><div class='add'>+#define WL12XX_SPARE_A3			(REGISTERS_BASE + 0x099C)</div><div class='add'>+#define WL12XX_SPARE_A4			(REGISTERS_BASE + 0x09A0)</div><div class='add'>+#define WL12XX_SPARE_A5			(REGISTERS_BASE + 0x09A4)</div><div class='add'>+#define WL12XX_SPARE_A6			(REGISTERS_BASE + 0x09A8)</div><div class='add'>+#define WL12XX_SPARE_A7			(REGISTERS_BASE + 0x09AC)</div><div class='add'>+#define WL12XX_SPARE_A8			(REGISTERS_BASE + 0x09B0)</div><div class='add'>+#define WL12XX_SPARE_B1			(REGISTERS_BASE + 0x5420)</div><div class='add'>+#define WL12XX_SPARE_B2			(REGISTERS_BASE + 0x5424)</div><div class='add'>+#define WL12XX_SPARE_B3			(REGISTERS_BASE + 0x5428)</div><div class='add'>+#define WL12XX_SPARE_B4			(REGISTERS_BASE + 0x542C)</div><div class='add'>+#define WL12XX_SPARE_B5			(REGISTERS_BASE + 0x5430)</div><div class='add'>+#define WL12XX_SPARE_B6			(REGISTERS_BASE + 0x5434)</div><div class='add'>+#define WL12XX_SPARE_B7			(REGISTERS_BASE + 0x5438)</div><div class='add'>+#define WL12XX_SPARE_B8			(REGISTERS_BASE + 0x543C)</div><div class='add'>+</div><div class='add'>+#define WL12XX_PLL_PARAMETERS		(REGISTERS_BASE + 0x6040)</div><div class='add'>+#define WL12XX_WU_COUNTER_PAUSE		(REGISTERS_BASE + 0x6008)</div><div class='add'>+#define WL12XX_WELP_ARM_COMMAND		(REGISTERS_BASE + 0x6100)</div><div class='add'>+#define WL12XX_DRPW_SCRATCH_START	(DRPW_BASE + 0x002C)</div><div class='add'>+</div><div class='add'>+#define WL12XX_CMD_MBOX_ADDRESS		0x407B4</div><div class='add'>+</div><div class='ctx'> #define ACX_REG_EEPROM_START_BIT BIT(1)</div><div class='ctx'> </div><div class='ctx'> /* Command/Information Mailbox Pointers */</div><div class='hunk'>@@ -279,7 +266,7 @@</div><div class='ctx'>  the host receives the Init Complete interrupt from</div><div class='ctx'>  the Wlan hardware.</div><div class='ctx'>  ===============================================*/</div><div class='del'>-#define REG_COMMAND_MAILBOX_PTR				(SCR_PAD0)</div><div class='add'>+#define WL12XX_REG_COMMAND_MAILBOX_PTR		(WL12XX_SCR_PAD0)</div><div class='ctx'> </div><div class='ctx'> /*===============================================</div><div class='ctx'>   Information Mailbox Pointer - 32bit RW</div><div class='hunk'>@@ -294,7 +281,7 @@</div><div class='ctx'>  until after the host receives the Init Complete interrupt from</div><div class='ctx'>  the Wlan hardware.</div><div class='ctx'>  ===============================================*/</div><div class='del'>-#define REG_EVENT_MAILBOX_PTR				(SCR_PAD1)</div><div class='add'>+#define WL12XX_REG_EVENT_MAILBOX_PTR		(WL12XX_SCR_PAD1)</div><div class='ctx'> </div><div class='ctx'> /*===============================================</div><div class='ctx'>  EEPROM Read/Write Request 32bit RW</div><div class='hunk'>@@ -365,26 +352,6 @@</div><div class='ctx'> #define ACX_CONT_WIND_MIN_MASK   0x0000007f</div><div class='ctx'> #define ACX_CONT_WIND_MAX        0x03ff0000</div><div class='ctx'> </div><div class='del'>-/*===============================================</div><div class='del'>-  HI_CFG Interface Configuration Register Values</div><div class='del'>-  ------------------------------------------</div><div class='del'>-  ===============================================*/</div><div class='del'>-#define HI_CFG_UART_ENABLE          0x00000004</div><div class='del'>-#define HI_CFG_RST232_ENABLE        0x00000008</div><div class='del'>-#define HI_CFG_CLOCK_REQ_SELECT     0x00000010</div><div class='del'>-#define HI_CFG_HOST_INT_ENABLE      0x00000020</div><div class='del'>-#define HI_CFG_VLYNQ_OUTPUT_ENABLE  0x00000040</div><div class='del'>-#define HI_CFG_HOST_INT_ACTIVE_LOW  0x00000080</div><div class='del'>-#define HI_CFG_UART_TX_OUT_GPIO_15  0x00000100</div><div class='del'>-#define HI_CFG_UART_TX_OUT_GPIO_14  0x00000200</div><div class='del'>-#define HI_CFG_UART_TX_OUT_GPIO_7   0x00000400</div><div class='del'>-</div><div class='del'>-#define HI_CFG_DEF_VAL              \</div><div class='del'>-	(HI_CFG_UART_ENABLE |        \</div><div class='del'>-	HI_CFG_RST232_ENABLE |      \</div><div class='del'>-	HI_CFG_CLOCK_REQ_SELECT |   \</div><div class='del'>-	HI_CFG_HOST_INT_ENABLE)</div><div class='del'>-</div><div class='ctx'> #define REF_FREQ_19_2                       0</div><div class='ctx'> #define REF_FREQ_26_0                       1</div><div class='ctx'> #define REF_FREQ_38_4                       2</div><div class='hunk'>@@ -400,38 +367,19 @@</div><div class='ctx'> #define LUT_PARAM_BB_PLL_LOOP_FILTER        5</div><div class='ctx'> #define LUT_PARAM_NUM                       6</div><div class='ctx'> </div><div class='del'>-#define ACX_EEPROMLESS_IND_REG              (SCR_PAD4)</div><div class='add'>+#define WL12XX_EEPROMLESS_IND		(WL12XX_SCR_PAD4)</div><div class='ctx'> #define USE_EEPROM                          0</div><div class='del'>-#define SOFT_RESET_MAX_TIME                 1000000</div><div class='del'>-#define SOFT_RESET_STALL_TIME               1000</div><div class='ctx'> #define NVS_DATA_BUNDARY_ALIGNMENT          4</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* Firmware image load chunk size */</div><div class='del'>-#define CHUNK_SIZE	16384</div><div class='del'>-</div><div class='ctx'> /* Firmware image header size */</div><div class='ctx'> #define FW_HDR_SIZE 8</div><div class='ctx'> </div><div class='del'>-#define ECPU_CONTROL_HALT					0x00000101</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /******************************************************************************</div><div class='ctx'> </div><div class='ctx'>     CHANNELS, BAND &amp; REG DOMAINS definitions</div><div class='ctx'> </div><div class='ctx'> ******************************************************************************/</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	RADIO_BAND_2_4GHZ = 0,  /* 2.4 Ghz band */</div><div class='del'>-	RADIO_BAND_5GHZ = 1,    /* 5 Ghz band */</div><div class='del'>-	RADIO_BAND_JAPAN_4_9_GHZ = 2,</div><div class='del'>-	DEFAULT_BAND = RADIO_BAND_2_4GHZ,</div><div class='del'>-	INVALID_BAND = 0xFE,</div><div class='del'>-	MAX_RADIO_BANDS = 0xFF</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define SHORT_PREAMBLE_BIT   BIT(0) /* CCK or Barker depending on the rate */</div><div class='ctx'> #define OFDM_RATE_BIT        BIT(6)</div><div class='ctx'> #define PBCC_RATE_BIT        BIT(7)</div><div class='hunk'>@@ -465,14 +413,82 @@ b12-b0 - Supported Rate indicator bits as defined below.</div><div class='ctx'> </div><div class='ctx'> ******************************************************************************/</div><div class='ctx'> </div><div class='add'>+#define OCP_CMD_LOOP		32</div><div class='add'>+#define OCP_CMD_WRITE		0x1</div><div class='add'>+#define OCP_CMD_READ		0x2</div><div class='add'>+#define OCP_READY_MASK		BIT(18)</div><div class='add'>+#define OCP_STATUS_MASK		(BIT(16) | BIT(17))</div><div class='add'>+#define OCP_STATUS_NO_RESP	0x00000</div><div class='add'>+#define OCP_STATUS_OK		0x10000</div><div class='add'>+#define OCP_STATUS_REQ_FAILED	0x20000</div><div class='add'>+#define OCP_STATUS_RESP_ERROR	0x30000</div><div class='add'>+</div><div class='add'>+#define OCP_REG_POLARITY     0x0064</div><div class='add'>+#define OCP_REG_CLK_TYPE     0x0448</div><div class='add'>+#define OCP_REG_CLK_POLARITY 0x0cb2</div><div class='add'>+#define OCP_REG_CLK_PULL     0x0cb4</div><div class='add'>+</div><div class='add'>+#define POLARITY_LOW         BIT(1)</div><div class='add'>+#define NO_PULL              (BIT(14) | BIT(15))</div><div class='add'>+</div><div class='add'>+#define FREF_CLK_TYPE_BITS     0xfffffe7f</div><div class='add'>+#define CLK_REQ_PRCM           0x100</div><div class='add'>+#define FREF_CLK_POLARITY_BITS 0xfffff8ff</div><div class='add'>+#define CLK_REQ_OUTN_SEL       0x700</div><div class='add'>+</div><div class='add'>+#define WU_COUNTER_PAUSE_VAL 0x3FF</div><div class='add'>+</div><div class='add'>+/* PLL configuration algorithm for wl128x */</div><div class='add'>+#define SYS_CLK_CFG_REG              0x2200</div><div class='add'>+/* Bit[0]   -  0-TCXO,  1-FREF */</div><div class='add'>+#define MCS_PLL_CLK_SEL_FREF         BIT(0)</div><div class='add'>+/* Bit[3:2] - 01-TCXO, 10-FREF */</div><div class='add'>+#define WL_CLK_REQ_TYPE_FREF         BIT(3)</div><div class='add'>+#define WL_CLK_REQ_TYPE_PG2          (BIT(3) | BIT(2))</div><div class='add'>+/* Bit[4]   -  0-TCXO,  1-FREF */</div><div class='add'>+#define PRCM_CM_EN_MUX_WLAN_FREF     BIT(4)</div><div class='add'>+</div><div class='add'>+#define TCXO_ILOAD_INT_REG           0x2264</div><div class='add'>+#define TCXO_CLK_DETECT_REG          0x2266</div><div class='add'>+</div><div class='add'>+#define TCXO_DET_FAILED              BIT(4)</div><div class='add'>+</div><div class='add'>+#define FREF_ILOAD_INT_REG           0x2084</div><div class='add'>+#define FREF_CLK_DETECT_REG          0x2086</div><div class='add'>+#define FREF_CLK_DETECT_FAIL         BIT(4)</div><div class='add'>+</div><div class='add'>+/* Use this reg for masking during driver access */</div><div class='add'>+#define WL_SPARE_REG                 0x2320</div><div class='add'>+#define WL_SPARE_VAL                 BIT(2)</div><div class='add'>+/* Bit[6:5:3] -  mask wl write SYS_CLK_CFG[8:5:2:4] */</div><div class='add'>+#define WL_SPARE_MASK_8526           (BIT(6) | BIT(5) | BIT(3))</div><div class='add'>+</div><div class='add'>+#define PLL_LOCK_COUNTERS_REG        0xD8C</div><div class='add'>+#define PLL_LOCK_COUNTERS_COEX       0x0F</div><div class='add'>+#define PLL_LOCK_COUNTERS_MCS        0xF0</div><div class='add'>+#define MCS_PLL_OVERRIDE_REG         0xD90</div><div class='add'>+#define MCS_PLL_CONFIG_REG           0xD92</div><div class='add'>+#define MCS_SEL_IN_FREQ_MASK         0x0070</div><div class='add'>+#define MCS_SEL_IN_FREQ_SHIFT        4</div><div class='add'>+#define MCS_PLL_CONFIG_REG_VAL       0x73</div><div class='add'>+#define MCS_PLL_ENABLE_HP            (BIT(0) | BIT(1))</div><div class='add'>+</div><div class='add'>+#define MCS_PLL_M_REG                0xD94</div><div class='add'>+#define MCS_PLL_N_REG                0xD96</div><div class='add'>+#define MCS_PLL_M_REG_VAL            0xC8</div><div class='add'>+#define MCS_PLL_N_REG_VAL            0x07</div><div class='add'>+</div><div class='add'>+#define SDIO_IO_DS                   0xd14</div><div class='add'>+</div><div class='add'>+/* SDIO/wSPI DS configuration values */</div><div class='add'>+enum {</div><div class='add'>+	HCI_IO_DS_8MA = 0,</div><div class='add'>+	HCI_IO_DS_4MA = 1, /* default */</div><div class='add'>+	HCI_IO_DS_6MA = 2,</div><div class='add'>+	HCI_IO_DS_2MA = 3,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/*************************************************************************</div><div class='del'>-</div><div class='del'>-    Interrupt Trigger Register (Host -&gt; WiLink)</div><div class='del'>-</div><div class='del'>-**************************************************************************/</div><div class='del'>-</div><div class='del'>-/* Hardware to Embedded CPU Interrupts - first 32-bit register set */</div><div class='add'>+/* end PLL configuration algorithm for wl128x */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Host Command Interrupt. Setting this bit masks</div><div class='hunk'>@@ -480,7 +496,7 @@ b12-b0 - Supported Rate indicator bits as defined below.</div><div class='ctx'>  * the FW that it has sent a command</div><div class='ctx'>  * to the Wlan hardware Command Mailbox.</div><div class='ctx'>  */</div><div class='del'>-#define INTR_TRIG_CMD       BIT(0)</div><div class='add'>+#define WL12XX_INTR_TRIG_CMD		BIT(0)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Host Event Acknowlegde Interrupt. The host</div><div class='hunk'>@@ -488,42 +504,27 @@ b12-b0 - Supported Rate indicator bits as defined below.</div><div class='ctx'>  * the unsolicited information from the event</div><div class='ctx'>  * mailbox.</div><div class='ctx'>  */</div><div class='del'>-#define INTR_TRIG_EVENT_ACK BIT(1)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The host sets this bit to inform the Wlan</div><div class='del'>- * FW that a TX packet is in the XFER</div><div class='del'>- * Buffer #0.</div><div class='del'>- */</div><div class='del'>-#define INTR_TRIG_TX_PROC0 BIT(2)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The host sets this bit to inform the FW</div><div class='del'>- * that it read a packet from RX XFER</div><div class='del'>- * Buffer #0.</div><div class='del'>- */</div><div class='del'>-#define INTR_TRIG_RX_PROC0 BIT(3)</div><div class='del'>-</div><div class='del'>-#define INTR_TRIG_DEBUG_ACK BIT(4)</div><div class='add'>+#define WL12XX_INTR_TRIG_EVENT_ACK	BIT(1)</div><div class='ctx'> </div><div class='del'>-#define INTR_TRIG_STATE_CHANGED BIT(5)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Hardware to Embedded CPU Interrupts - second 32-bit register set */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The host sets this bit to inform the FW</div><div class='del'>- * that it read a packet from RX XFER</div><div class='del'>- * Buffer #1.</div><div class='del'>- */</div><div class='del'>-#define INTR_TRIG_RX_PROC1 BIT(17)</div><div class='add'>+/*===============================================</div><div class='add'>+  HI_CFG Interface Configuration Register Values</div><div class='add'>+  ------------------------------------------</div><div class='add'>+  ===============================================*/</div><div class='add'>+#define HI_CFG_UART_ENABLE          0x00000004</div><div class='add'>+#define HI_CFG_RST232_ENABLE        0x00000008</div><div class='add'>+#define HI_CFG_CLOCK_REQ_SELECT     0x00000010</div><div class='add'>+#define HI_CFG_HOST_INT_ENABLE      0x00000020</div><div class='add'>+#define HI_CFG_VLYNQ_OUTPUT_ENABLE  0x00000040</div><div class='add'>+#define HI_CFG_HOST_INT_ACTIVE_LOW  0x00000080</div><div class='add'>+#define HI_CFG_UART_TX_OUT_GPIO_15  0x00000100</div><div class='add'>+#define HI_CFG_UART_TX_OUT_GPIO_14  0x00000200</div><div class='add'>+#define HI_CFG_UART_TX_OUT_GPIO_7   0x00000400</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The host sets this bit to inform the Wlan</div><div class='del'>- * hardware that a TX packet is in the XFER</div><div class='del'>- * Buffer #1.</div><div class='del'>- */</div><div class='del'>-#define INTR_TRIG_TX_PROC1 BIT(18)</div><div class='add'>+#define HI_CFG_DEF_VAL              \</div><div class='add'>+	(HI_CFG_UART_ENABLE |        \</div><div class='add'>+	HI_CFG_RST232_ENABLE |      \</div><div class='add'>+	HI_CFG_CLOCK_REQ_SELECT |   \</div><div class='add'>+	HI_CFG_HOST_INT_ENABLE)</div><div class='ctx'> </div><div class='ctx'> #define WL127X_REG_FUSE_DATA_2_1	0x050a</div><div class='ctx'> #define WL128X_REG_FUSE_DATA_2_1	0x2152</div><div class='head'>diff --git a/drivers/net/wireless/ti/wl12xx/wl12xx.h b/drivers/net/wireless/ti/wl12xx/wl12xx.h<br/>new file mode 100644<br/>index 000000000000..74cd332e23ef<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wl12xx/wl12xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wl12xx/wl12xx.h</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is part of wl12xx</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011 Texas Instruments Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __WL12XX_PRIV_H__</div><div class='add'>+#define __WL12XX_PRIV_H__</div><div class='add'>+</div><div class='add'>+#include "conf.h"</div><div class='add'>+</div><div class='add'>+struct wl12xx_priv {</div><div class='add'>+	struct wl12xx_priv_conf conf;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* __WL12XX_PRIV_H__ */</div><div class='head'>diff --git a/drivers/net/wireless/ti/wlcore/Kconfig b/drivers/net/wireless/ti/wlcore/Kconfig<br/>new file mode 100644<br/>index 000000000000..54156b0b5c2d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+config WLCORE</div><div class='add'>+	tristate "TI wlcore support"</div><div class='add'>+	depends on WL_TI &amp;&amp; GENERIC_HARDIRQS &amp;&amp; MAC80211</div><div class='add'>+	depends on INET</div><div class='add'>+	select FW_LOADER</div><div class='add'>+	---help---</div><div class='add'>+	  This module contains the main code for TI WLAN chips.  It abstracts</div><div class='add'>+	  hardware-specific differences among different chipset families.</div><div class='add'>+	  Each chipset family needs to implement its own lower-level module</div><div class='add'>+	  that will depend on this module for the common code.</div><div class='add'>+</div><div class='add'>+	  If you choose to build a module, it will be called wlcore. Say N if</div><div class='add'>+	  unsure.</div><div class='add'>+</div><div class='add'>+config WLCORE_SPI</div><div class='add'>+	tristate "TI wlcore SPI support"</div><div class='add'>+	depends on WLCORE &amp;&amp; SPI_MASTER</div><div class='add'>+	select CRC7</div><div class='add'>+	---help---</div><div class='add'>+	  This module adds support for the SPI interface of adapters using</div><div class='add'>+	  TI WLAN chipsets.  Select this if your platform is using</div><div class='add'>+	  the SPI bus.</div><div class='add'>+</div><div class='add'>+	  If you choose to build a module, it'll be called wlcore_spi.</div><div class='add'>+	  Say N if unsure.</div><div class='add'>+</div><div class='add'>+config WLCORE_SDIO</div><div class='add'>+	tristate "TI wlcore SDIO support"</div><div class='add'>+	depends on WLCORE &amp;&amp; MMC</div><div class='add'>+	---help---</div><div class='add'>+	  This module adds support for the SDIO interface of adapters using</div><div class='add'>+	  TI WLAN chipsets.  Select this if your platform is using</div><div class='add'>+	  the SDIO bus.</div><div class='add'>+</div><div class='add'>+	  If you choose to build a module, it'll be called wlcore_sdio.</div><div class='add'>+	  Say N if unsure.</div><div class='add'>+</div><div class='add'>+config WL12XX_PLATFORM_DATA</div><div class='add'>+	bool</div><div class='add'>+	depends on WLCORE_SDIO != n || WL1251_SDIO != n</div><div class='add'>+	default y</div><div class='head'>diff --git a/drivers/net/wireless/ti/wlcore/Makefile b/drivers/net/wireless/ti/wlcore/Makefile<br/>new file mode 100644<br/>index 000000000000..d9fba9e32130<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/Makefile</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+wlcore-objs		= main.o cmd.o io.o event.o tx.o rx.o ps.o acx.o \</div><div class='add'>+			  boot.o init.o debugfs.o scan.o</div><div class='add'>+</div><div class='add'>+wlcore_spi-objs 	= spi.o</div><div class='add'>+wlcore_sdio-objs	= sdio.o</div><div class='add'>+</div><div class='add'>+wlcore-$(CONFIG_NL80211_TESTMODE)	+= testmode.o</div><div class='add'>+obj-$(CONFIG_WLCORE)			+= wlcore.o</div><div class='add'>+obj-$(CONFIG_WLCORE_SPI)		+= wlcore_spi.o</div><div class='add'>+obj-$(CONFIG_WLCORE_SDIO)		+= wlcore_sdio.o</div><div class='add'>+</div><div class='add'>+# small builtin driver bit</div><div class='add'>+obj-$(CONFIG_WL12XX_PLATFORM_DATA)	+= wl12xx_platform_data.o</div><div class='add'>+</div><div class='add'>+ccflags-y += -D__CHECK_ENDIAN__</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/acx.c b/drivers/net/wireless/ti/wlcore/acx.c<br/>index bc96db0683a5..f3d6fa508269 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/acx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/acx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/acx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/acx.c</a></div><div class='hunk'>@@ -28,11 +28,11 @@</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "wl12xx_80211.h"</div><div class='del'>-#include "reg.h"</div><div class='ctx'> #include "ps.h"</div><div class='add'>+#include "hw_ops.h"</div><div class='ctx'> </div><div class='ctx'> int wl1271_acx_wake_up_conditions(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='ctx'> 				  u8 wake_up_event, u8 listen_interval)</div><div class='hunk'>@@ -757,7 +757,10 @@ int wl1271_acx_sta_rate_policies(struct wl1271 *wl, struct wl12xx_vif *wlvif)</div><div class='ctx'> </div><div class='ctx'> 	/* configure one AP supported rate class */</div><div class='ctx'> 	acx-&gt;rate_policy_idx = cpu_to_le32(wlvif-&gt;sta.ap_rate_idx);</div><div class='del'>-	acx-&gt;rate_policy.enabled_rates = cpu_to_le32(wlvif-&gt;rate_set);</div><div class='add'>+</div><div class='add'>+	/* the AP policy is HW specific */</div><div class='add'>+	acx-&gt;rate_policy.enabled_rates =</div><div class='add'>+		cpu_to_le32(wlcore_hw_sta_get_ap_rate_mask(wl, wlvif));</div><div class='ctx'> 	acx-&gt;rate_policy.short_retry_limit = c-&gt;short_retry_limit;</div><div class='ctx'> 	acx-&gt;rate_policy.long_retry_limit = c-&gt;long_retry_limit;</div><div class='ctx'> 	acx-&gt;rate_policy.aflags = c-&gt;aflags;</div><div class='hunk'>@@ -969,17 +972,14 @@ int wl12xx_acx_mem_cfg(struct wl1271 *wl)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (wl-&gt;chip.id == CHIP_ID_1283_PG20)</div><div class='del'>-		mem = &amp;wl-&gt;conf.mem_wl128x;</div><div class='del'>-	else</div><div class='del'>-		mem = &amp;wl-&gt;conf.mem_wl127x;</div><div class='add'>+	mem = &amp;wl-&gt;conf.mem;</div><div class='ctx'> </div><div class='ctx'> 	/* memory config */</div><div class='ctx'> 	mem_conf-&gt;num_stations = mem-&gt;num_stations;</div><div class='ctx'> 	mem_conf-&gt;rx_mem_block_num = mem-&gt;rx_block_num;</div><div class='ctx'> 	mem_conf-&gt;tx_min_mem_block_num = mem-&gt;tx_min_block_num;</div><div class='ctx'> 	mem_conf-&gt;num_ssid_profiles = mem-&gt;ssid_profiles;</div><div class='del'>-	mem_conf-&gt;total_tx_descriptors = cpu_to_le32(ACX_TX_DESCRIPTORS);</div><div class='add'>+	mem_conf-&gt;total_tx_descriptors = cpu_to_le32(wl-&gt;num_tx_desc);</div><div class='ctx'> 	mem_conf-&gt;dyn_mem_enable = mem-&gt;dynamic_memory;</div><div class='ctx'> 	mem_conf-&gt;tx_free_req = mem-&gt;min_req_tx_blocks;</div><div class='ctx'> 	mem_conf-&gt;rx_free_req = mem-&gt;min_req_rx_blocks;</div><div class='hunk'>@@ -998,32 +998,6 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int wl1271_acx_host_if_cfg_bitmap(struct wl1271 *wl, u32 host_cfg_bitmap)</div><div class='del'>-{</div><div class='del'>-	struct wl1271_acx_host_config_bitmap *bitmap_conf;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	bitmap_conf = kzalloc(sizeof(*bitmap_conf), GFP_KERNEL);</div><div class='del'>-	if (!bitmap_conf) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bitmap_conf-&gt;host_cfg_bitmap = cpu_to_le32(host_cfg_bitmap);</div><div class='del'>-</div><div class='del'>-	ret = wl1271_cmd_configure(wl, ACX_HOST_IF_CFG_BITMAP,</div><div class='del'>-				   bitmap_conf, sizeof(*bitmap_conf));</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		wl1271_warning("wl1271 bitmap config opt failed: %d", ret);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	kfree(bitmap_conf);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int wl1271_acx_init_mem_config(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1740,3 +1714,85 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+/* Set the global behaviour of RX filters - On/Off + default action */</div><div class='add'>+int wl1271_acx_default_rx_filter_enable(struct wl1271 *wl, bool enable,</div><div class='add'>+					enum rx_filter_action action)</div><div class='add'>+{</div><div class='add'>+	struct acx_default_rx_filter *acx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_ACX, "acx default rx filter en: %d act: %d",</div><div class='add'>+		     enable, action);</div><div class='add'>+</div><div class='add'>+	acx = kzalloc(sizeof(*acx), GFP_KERNEL);</div><div class='add'>+	if (!acx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	acx-&gt;enable = enable;</div><div class='add'>+	acx-&gt;default_action = action;</div><div class='add'>+</div><div class='add'>+	ret = wl1271_cmd_configure(wl, ACX_ENABLE_RX_DATA_FILTER, acx,</div><div class='add'>+				   sizeof(*acx));</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		wl1271_warning("acx default rx filter enable failed: %d", ret);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree(acx);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configure or disable a specific RX filter pattern */</div><div class='add'>+int wl1271_acx_set_rx_filter(struct wl1271 *wl, u8 index, bool enable,</div><div class='add'>+			     struct wl12xx_rx_filter *filter)</div><div class='add'>+{</div><div class='add'>+	struct acx_rx_filter_cfg *acx;</div><div class='add'>+	int fields_size = 0;</div><div class='add'>+	int acx_size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	WARN_ON(enable &amp;&amp; !filter);</div><div class='add'>+	WARN_ON(index &gt;= WL1271_MAX_RX_FILTERS);</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_ACX,</div><div class='add'>+		     "acx set rx filter idx: %d enable: %d filter: %p",</div><div class='add'>+		     index, enable, filter);</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		fields_size = wl1271_rx_filter_get_fields_size(filter);</div><div class='add'>+</div><div class='add'>+		wl1271_debug(DEBUG_ACX, "act: %d num_fields: %d field_size: %d",</div><div class='add'>+		      filter-&gt;action, filter-&gt;num_fields, fields_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	acx_size = ALIGN(sizeof(*acx) + fields_size, 4);</div><div class='add'>+	acx = kzalloc(acx_size, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!acx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	acx-&gt;enable = enable;</div><div class='add'>+	acx-&gt;index = index;</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		acx-&gt;num_fields = filter-&gt;num_fields;</div><div class='add'>+		acx-&gt;action = filter-&gt;action;</div><div class='add'>+		wl1271_rx_filter_flatten_fields(filter, acx-&gt;fields);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wl1271_dump(DEBUG_ACX, "RX_FILTER: ", acx, acx_size);</div><div class='add'>+</div><div class='add'>+	ret = wl1271_cmd_configure(wl, ACX_SET_RX_DATA_FILTER, acx, acx_size);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		wl1271_warning("setting rx filter failed: %d", ret);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree(acx);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_PM */</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/acx.h b/drivers/net/wireless/ti/wlcore/acx.h<br/>index a28fc044034c..e6a74869a5ff 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/acx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/acx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/acx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/acx.h</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> #ifndef __ACX_H__</div><div class='ctx'> #define __ACX_H__</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "cmd.h"</div><div class='ctx'> </div><div class='ctx'> /*************************************************************************</div><div class='hunk'>@@ -824,16 +824,11 @@ struct wl1271_acx_keep_alive_config {</div><div class='ctx'> 	__le32 period;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+/* TODO: maybe this needs to be moved somewhere else? */</div><div class='ctx'> #define HOST_IF_CFG_RX_FIFO_ENABLE     BIT(0)</div><div class='ctx'> #define HOST_IF_CFG_TX_EXTRA_BLKS_SWAP BIT(1)</div><div class='ctx'> #define HOST_IF_CFG_TX_PAD_TO_SDIO_BLK BIT(3)</div><div class='ctx'> </div><div class='del'>-struct wl1271_acx_host_config_bitmap {</div><div class='del'>-	struct acx_header header;</div><div class='del'>-</div><div class='del'>-	__le32 host_cfg_bitmap;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='ctx'> enum {</div><div class='ctx'> 	WL1271_ACX_TRIG_TYPE_LEVEL = 0,</div><div class='ctx'> 	WL1271_ACX_TRIG_TYPE_EDGE,</div><div class='hunk'>@@ -1152,6 +1147,32 @@ struct wl12xx_acx_config_hangover {</div><div class='ctx'> 	u8 padding[2];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+struct acx_default_rx_filter {</div><div class='add'>+	struct acx_header header;</div><div class='add'>+	u8 enable;</div><div class='add'>+</div><div class='add'>+	/* action of type FILTER_XXX */</div><div class='add'>+	u8 default_action;</div><div class='add'>+</div><div class='add'>+	u8 pad[2];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct acx_rx_filter_cfg {</div><div class='add'>+	struct acx_header header;</div><div class='add'>+</div><div class='add'>+	u8 enable;</div><div class='add'>+</div><div class='add'>+	/* 0 - WL1271_MAX_RX_FILTERS-1 */</div><div class='add'>+	u8 index;</div><div class='add'>+</div><div class='add'>+	u8 action;</div><div class='add'>+</div><div class='add'>+	u8 num_fields;</div><div class='add'>+	u8 fields[0];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> 	ACX_WAKE_UP_CONDITIONS           = 0x0000,</div><div class='ctx'> 	ACX_MEM_CFG                      = 0x0001,</div><div class='hunk'>@@ -1274,7 +1295,6 @@ int wl1271_acx_frag_threshold(struct wl1271 *wl, u32 frag_threshold);</div><div class='ctx'> int wl1271_acx_tx_config_options(struct wl1271 *wl);</div><div class='ctx'> int wl12xx_acx_mem_cfg(struct wl1271 *wl);</div><div class='ctx'> int wl1271_acx_init_mem_config(struct wl1271 *wl);</div><div class='del'>-int wl1271_acx_host_if_cfg_bitmap(struct wl1271 *wl, u32 host_cfg_bitmap);</div><div class='ctx'> int wl1271_acx_init_rx_interrupt(struct wl1271 *wl);</div><div class='ctx'> int wl1271_acx_smart_reflex(struct wl1271 *wl);</div><div class='ctx'> int wl1271_acx_bet_enable(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='hunk'>@@ -1311,4 +1331,10 @@ int wl1271_acx_fm_coex(struct wl1271 *wl);</div><div class='ctx'> int wl12xx_acx_set_rate_mgmt_params(struct wl1271 *wl);</div><div class='ctx'> int wl12xx_acx_config_hangover(struct wl1271 *wl);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+int wl1271_acx_default_rx_filter_enable(struct wl1271 *wl, bool enable,</div><div class='add'>+					enum rx_filter_action action);</div><div class='add'>+int wl1271_acx_set_rx_filter(struct wl1271 *wl, u8 index, bool enable,</div><div class='add'>+			     struct wl12xx_rx_filter *filter);</div><div class='add'>+#endif /* CONFIG_PM */</div><div class='ctx'> #endif /* __WL1271_ACX_H__ */</div><div class='head'>diff --git a/drivers/net/wireless/ti/wlcore/boot.c b/drivers/net/wireless/ti/wlcore/boot.c<br/>new file mode 100644<br/>index 000000000000..9b98230f84ce<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/boot.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/boot.c</a></div><div class='hunk'>@@ -0,0 +1,444 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is part of wl1271</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2008-2010 Nokia Corporation</div><div class='add'>+ *</div><div class='add'>+ * Contact: Luciano Coelho &lt;luciano.coelho@nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/wl12xx.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+#include "debug.h"</div><div class='add'>+#include "acx.h"</div><div class='add'>+#include "boot.h"</div><div class='add'>+#include "io.h"</div><div class='add'>+#include "event.h"</div><div class='add'>+#include "rx.h"</div><div class='add'>+#include "hw_ops.h"</div><div class='add'>+</div><div class='add'>+static void wl1271_boot_set_ecpu_ctrl(struct wl1271 *wl, u32 flag)</div><div class='add'>+{</div><div class='add'>+	u32 cpu_ctrl;</div><div class='add'>+</div><div class='add'>+	/* 10.5.0 run the firmware (I) */</div><div class='add'>+	cpu_ctrl = wlcore_read_reg(wl, REG_ECPU_CONTROL);</div><div class='add'>+</div><div class='add'>+	/* 10.5.1 run the firmware (II) */</div><div class='add'>+	cpu_ctrl |= flag;</div><div class='add'>+	wlcore_write_reg(wl, REG_ECPU_CONTROL, cpu_ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wlcore_parse_fw_ver(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = sscanf(wl-&gt;chip.fw_ver_str + 4, "%u.%u.%u.%u.%u",</div><div class='add'>+		     &amp;wl-&gt;chip.fw_ver[0], &amp;wl-&gt;chip.fw_ver[1],</div><div class='add'>+		     &amp;wl-&gt;chip.fw_ver[2], &amp;wl-&gt;chip.fw_ver[3],</div><div class='add'>+		     &amp;wl-&gt;chip.fw_ver[4]);</div><div class='add'>+</div><div class='add'>+	if (ret != 5) {</div><div class='add'>+		wl1271_warning("fw version incorrect value");</div><div class='add'>+		memset(wl-&gt;chip.fw_ver, 0, sizeof(wl-&gt;chip.fw_ver));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = wlcore_identify_fw(wl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wlcore_boot_fw_version(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	struct wl1271_static_data *static_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	static_data = kmalloc(sizeof(*static_data), GFP_KERNEL | GFP_DMA);</div><div class='add'>+	if (!static_data) {</div><div class='add'>+		wl1271_error("Couldn't allocate memory for static data!");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wl1271_read(wl, wl-&gt;cmd_box_addr, static_data, sizeof(*static_data),</div><div class='add'>+		    false);</div><div class='add'>+</div><div class='add'>+	strncpy(wl-&gt;chip.fw_ver_str, static_data-&gt;fw_version,</div><div class='add'>+		sizeof(wl-&gt;chip.fw_ver_str));</div><div class='add'>+</div><div class='add'>+	kfree(static_data);</div><div class='add'>+</div><div class='add'>+	/* make sure the string is NULL-terminated */</div><div class='add'>+	wl-&gt;chip.fw_ver_str[sizeof(wl-&gt;chip.fw_ver_str) - 1] = '\0';</div><div class='add'>+</div><div class='add'>+	ret = wlcore_parse_fw_ver(wl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,</div><div class='add'>+					     size_t fw_data_len, u32 dest)</div><div class='add'>+{</div><div class='add'>+	struct wlcore_partition_set partition;</div><div class='add'>+	int addr, chunk_num, partition_limit;</div><div class='add'>+	u8 *p, *chunk;</div><div class='add'>+</div><div class='add'>+	/* whal_FwCtrl_LoadFwImageSm() */</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_BOOT, "starting firmware upload");</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_BOOT, "fw_data_len %zd chunk_size %d",</div><div class='add'>+		     fw_data_len, CHUNK_SIZE);</div><div class='add'>+</div><div class='add'>+	if ((fw_data_len % 4) != 0) {</div><div class='add'>+		wl1271_error("firmware length not multiple of four");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chunk = kmalloc(CHUNK_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!chunk) {</div><div class='add'>+		wl1271_error("allocation for firmware upload chunk failed");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;partition, &amp;wl-&gt;ptable[PART_DOWN], sizeof(partition));</div><div class='add'>+	partition.mem.start = dest;</div><div class='add'>+	wlcore_set_partition(wl, &amp;partition);</div><div class='add'>+</div><div class='add'>+	/* 10.1 set partition limit and chunk num */</div><div class='add'>+	chunk_num = 0;</div><div class='add'>+	partition_limit = wl-&gt;ptable[PART_DOWN].mem.size;</div><div class='add'>+</div><div class='add'>+	while (chunk_num &lt; fw_data_len / CHUNK_SIZE) {</div><div class='add'>+		/* 10.2 update partition, if needed */</div><div class='add'>+		addr = dest + (chunk_num + 2) * CHUNK_SIZE;</div><div class='add'>+		if (addr &gt; partition_limit) {</div><div class='add'>+			addr = dest + chunk_num * CHUNK_SIZE;</div><div class='add'>+			partition_limit = chunk_num * CHUNK_SIZE +</div><div class='add'>+				wl-&gt;ptable[PART_DOWN].mem.size;</div><div class='add'>+			partition.mem.start = addr;</div><div class='add'>+			wlcore_set_partition(wl, &amp;partition);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* 10.3 upload the chunk */</div><div class='add'>+		addr = dest + chunk_num * CHUNK_SIZE;</div><div class='add'>+		p = buf + chunk_num * CHUNK_SIZE;</div><div class='add'>+		memcpy(chunk, p, CHUNK_SIZE);</div><div class='add'>+		wl1271_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",</div><div class='add'>+			     p, addr);</div><div class='add'>+		wl1271_write(wl, addr, chunk, CHUNK_SIZE, false);</div><div class='add'>+</div><div class='add'>+		chunk_num++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 10.4 upload the last chunk */</div><div class='add'>+	addr = dest + chunk_num * CHUNK_SIZE;</div><div class='add'>+	p = buf + chunk_num * CHUNK_SIZE;</div><div class='add'>+	memcpy(chunk, p, fw_data_len % CHUNK_SIZE);</div><div class='add'>+	wl1271_debug(DEBUG_BOOT, "uploading fw last chunk (%zd B) 0x%p to 0x%x",</div><div class='add'>+		     fw_data_len % CHUNK_SIZE, p, addr);</div><div class='add'>+	wl1271_write(wl, addr, chunk, fw_data_len % CHUNK_SIZE, false);</div><div class='add'>+</div><div class='add'>+	kfree(chunk);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wlcore_boot_upload_firmware(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	u32 chunks, addr, len;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u8 *fw;</div><div class='add'>+</div><div class='add'>+	fw = wl-&gt;fw;</div><div class='add'>+	chunks = be32_to_cpup((__be32 *) fw);</div><div class='add'>+	fw += sizeof(u32);</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_BOOT, "firmware chunks to be uploaded: %u", chunks);</div><div class='add'>+</div><div class='add'>+	while (chunks--) {</div><div class='add'>+		addr = be32_to_cpup((__be32 *) fw);</div><div class='add'>+		fw += sizeof(u32);</div><div class='add'>+		len = be32_to_cpup((__be32 *) fw);</div><div class='add'>+		fw += sizeof(u32);</div><div class='add'>+</div><div class='add'>+		if (len &gt; 300000) {</div><div class='add'>+			wl1271_info("firmware chunk too long: %u", len);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		wl1271_debug(DEBUG_BOOT, "chunk %d addr 0x%x len %u",</div><div class='add'>+			     chunks, addr, len);</div><div class='add'>+		ret = wl1271_boot_upload_firmware_chunk(wl, fw, len, addr);</div><div class='add'>+		if (ret != 0)</div><div class='add'>+			break;</div><div class='add'>+		fw += len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(wlcore_boot_upload_firmware);</div><div class='add'>+</div><div class='add'>+int wlcore_boot_upload_nvs(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	size_t nvs_len, burst_len;</div><div class='add'>+	int i;</div><div class='add'>+	u32 dest_addr, val;</div><div class='add'>+	u8 *nvs_ptr, *nvs_aligned;</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;nvs == NULL)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;quirks &amp; WLCORE_QUIRK_LEGACY_NVS) {</div><div class='add'>+		struct wl1271_nvs_file *nvs =</div><div class='add'>+			(struct wl1271_nvs_file *)wl-&gt;nvs;</div><div class='add'>+		/*</div><div class='add'>+		 * FIXME: the LEGACY NVS image support (NVS's missing the 5GHz</div><div class='add'>+		 * band configurations) can be removed when those NVS files stop</div><div class='add'>+		 * floating around.</div><div class='add'>+		 */</div><div class='add'>+		if (wl-&gt;nvs_len == sizeof(struct wl1271_nvs_file) ||</div><div class='add'>+		    wl-&gt;nvs_len == WL1271_INI_LEGACY_NVS_FILE_SIZE) {</div><div class='add'>+			if (nvs-&gt;general_params.dual_mode_select)</div><div class='add'>+				wl-&gt;enable_11a = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (wl-&gt;nvs_len != sizeof(struct wl1271_nvs_file) &amp;&amp;</div><div class='add'>+		    (wl-&gt;nvs_len != WL1271_INI_LEGACY_NVS_FILE_SIZE ||</div><div class='add'>+		     wl-&gt;enable_11a)) {</div><div class='add'>+			wl1271_error("nvs size is not as expected: %zu != %zu",</div><div class='add'>+				wl-&gt;nvs_len, sizeof(struct wl1271_nvs_file));</div><div class='add'>+			kfree(wl-&gt;nvs);</div><div class='add'>+			wl-&gt;nvs = NULL;</div><div class='add'>+			wl-&gt;nvs_len = 0;</div><div class='add'>+			return -EILSEQ;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* only the first part of the NVS needs to be uploaded */</div><div class='add'>+		nvs_len = sizeof(nvs-&gt;nvs);</div><div class='add'>+		nvs_ptr = (u8 *) nvs-&gt;nvs;</div><div class='add'>+	} else {</div><div class='add'>+		struct wl128x_nvs_file *nvs = (struct wl128x_nvs_file *)wl-&gt;nvs;</div><div class='add'>+</div><div class='add'>+		if (wl-&gt;nvs_len == sizeof(struct wl128x_nvs_file)) {</div><div class='add'>+			if (nvs-&gt;general_params.dual_mode_select)</div><div class='add'>+				wl-&gt;enable_11a = true;</div><div class='add'>+		} else {</div><div class='add'>+			wl1271_error("nvs size is not as expected: %zu != %zu",</div><div class='add'>+				     wl-&gt;nvs_len,</div><div class='add'>+				     sizeof(struct wl128x_nvs_file));</div><div class='add'>+			kfree(wl-&gt;nvs);</div><div class='add'>+			wl-&gt;nvs = NULL;</div><div class='add'>+			wl-&gt;nvs_len = 0;</div><div class='add'>+			return -EILSEQ;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* only the first part of the NVS needs to be uploaded */</div><div class='add'>+		nvs_len = sizeof(nvs-&gt;nvs);</div><div class='add'>+		nvs_ptr = (u8 *)nvs-&gt;nvs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* update current MAC address to NVS */</div><div class='add'>+	nvs_ptr[11] = wl-&gt;addresses[0].addr[0];</div><div class='add'>+	nvs_ptr[10] = wl-&gt;addresses[0].addr[1];</div><div class='add'>+	nvs_ptr[6] = wl-&gt;addresses[0].addr[2];</div><div class='add'>+	nvs_ptr[5] = wl-&gt;addresses[0].addr[3];</div><div class='add'>+	nvs_ptr[4] = wl-&gt;addresses[0].addr[4];</div><div class='add'>+	nvs_ptr[3] = wl-&gt;addresses[0].addr[5];</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Layout before the actual NVS tables:</div><div class='add'>+	 * 1 byte : burst length.</div><div class='add'>+	 * 2 bytes: destination address.</div><div class='add'>+	 * n bytes: data to burst copy.</div><div class='add'>+	 *</div><div class='add'>+	 * This is ended by a 0 length, then the NVS tables.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* FIXME: Do we need to check here whether the LSB is 1? */</div><div class='add'>+	while (nvs_ptr[0]) {</div><div class='add'>+		burst_len = nvs_ptr[0];</div><div class='add'>+		dest_addr = (nvs_ptr[1] &amp; 0xfe) | ((u32)(nvs_ptr[2] &lt;&lt; 8));</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Due to our new wl1271_translate_reg_addr function,</div><div class='add'>+		 * we need to add the register partition start address</div><div class='add'>+		 * to the destination</div><div class='add'>+		 */</div><div class='add'>+		dest_addr += wl-&gt;curr_part.reg.start;</div><div class='add'>+</div><div class='add'>+		/* We move our pointer to the data */</div><div class='add'>+		nvs_ptr += 3;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; burst_len; i++) {</div><div class='add'>+			if (nvs_ptr + 3 &gt;= (u8 *) wl-&gt;nvs + nvs_len)</div><div class='add'>+				goto out_badnvs;</div><div class='add'>+</div><div class='add'>+			val = (nvs_ptr[0] | (nvs_ptr[1] &lt;&lt; 8)</div><div class='add'>+			       | (nvs_ptr[2] &lt;&lt; 16) | (nvs_ptr[3] &lt;&lt; 24));</div><div class='add'>+</div><div class='add'>+			wl1271_debug(DEBUG_BOOT,</div><div class='add'>+				     "nvs burst write 0x%x: 0x%x",</div><div class='add'>+				     dest_addr, val);</div><div class='add'>+			wl1271_write32(wl, dest_addr, val);</div><div class='add'>+</div><div class='add'>+			nvs_ptr += 4;</div><div class='add'>+			dest_addr += 4;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (nvs_ptr &gt;= (u8 *) wl-&gt;nvs + nvs_len)</div><div class='add'>+			goto out_badnvs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We've reached the first zero length, the first NVS table</div><div class='add'>+	 * is located at an aligned offset which is at least 7 bytes further.</div><div class='add'>+	 * NOTE: The wl-&gt;nvs-&gt;nvs element must be first, in order to</div><div class='add'>+	 * simplify the casting, we assume it is at the beginning of</div><div class='add'>+	 * the wl-&gt;nvs structure.</div><div class='add'>+	 */</div><div class='add'>+	nvs_ptr = (u8 *)wl-&gt;nvs +</div><div class='add'>+			ALIGN(nvs_ptr - (u8 *)wl-&gt;nvs + 7, 4);</div><div class='add'>+</div><div class='add'>+	if (nvs_ptr &gt;= (u8 *) wl-&gt;nvs + nvs_len)</div><div class='add'>+		goto out_badnvs;</div><div class='add'>+</div><div class='add'>+	nvs_len -= nvs_ptr - (u8 *)wl-&gt;nvs;</div><div class='add'>+</div><div class='add'>+	/* Now we must set the partition correctly */</div><div class='add'>+	wlcore_set_partition(wl, &amp;wl-&gt;ptable[PART_WORK]);</div><div class='add'>+</div><div class='add'>+	/* Copy the NVS tables to a new block to ensure alignment */</div><div class='add'>+	nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL);</div><div class='add'>+	if (!nvs_aligned)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* And finally we upload the NVS tables */</div><div class='add'>+	wlcore_write_data(wl, REG_CMD_MBOX_ADDRESS,</div><div class='add'>+			  nvs_aligned, nvs_len, false);</div><div class='add'>+</div><div class='add'>+	kfree(nvs_aligned);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_badnvs:</div><div class='add'>+	wl1271_error("nvs data is malformed");</div><div class='add'>+	return -EILSEQ;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(wlcore_boot_upload_nvs);</div><div class='add'>+</div><div class='add'>+int wlcore_boot_run_firmware(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	int loop, ret;</div><div class='add'>+	u32 chip_id, intr;</div><div class='add'>+</div><div class='add'>+	/* Make sure we have the boot partition */</div><div class='add'>+	wlcore_set_partition(wl, &amp;wl-&gt;ptable[PART_BOOT]);</div><div class='add'>+</div><div class='add'>+	wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);</div><div class='add'>+</div><div class='add'>+	chip_id = wlcore_read_reg(wl, REG_CHIP_ID_B);</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);</div><div class='add'>+</div><div class='add'>+	if (chip_id != wl-&gt;chip.id) {</div><div class='add'>+		wl1271_error("chip id doesn't match after firmware boot");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* wait for init to complete */</div><div class='add'>+	loop = 0;</div><div class='add'>+	while (loop++ &lt; INIT_LOOP) {</div><div class='add'>+		udelay(INIT_LOOP_DELAY);</div><div class='add'>+		intr = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR);</div><div class='add'>+</div><div class='add'>+		if (intr == 0xffffffff) {</div><div class='add'>+			wl1271_error("error reading hardware complete "</div><div class='add'>+				     "init indication");</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+		/* check that ACX_INTR_INIT_COMPLETE is enabled */</div><div class='add'>+		else if (intr &amp; WL1271_ACX_INTR_INIT_COMPLETE) {</div><div class='add'>+			wlcore_write_reg(wl, REG_INTERRUPT_ACK,</div><div class='add'>+					 WL1271_ACX_INTR_INIT_COMPLETE);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (loop &gt; INIT_LOOP) {</div><div class='add'>+		wl1271_error("timeout waiting for the hardware to "</div><div class='add'>+			     "complete initialization");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* get hardware config command mail box */</div><div class='add'>+	wl-&gt;cmd_box_addr = wlcore_read_reg(wl, REG_COMMAND_MAILBOX_PTR);</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x", wl-&gt;cmd_box_addr);</div><div class='add'>+</div><div class='add'>+	/* get hardware config event mail box */</div><div class='add'>+	wl-&gt;mbox_ptr[0] = wlcore_read_reg(wl, REG_EVENT_MAILBOX_PTR);</div><div class='add'>+	wl-&gt;mbox_ptr[1] = wl-&gt;mbox_ptr[0] + sizeof(struct event_mailbox);</div><div class='add'>+</div><div class='add'>+	wl1271_debug(DEBUG_MAILBOX, "MBOX ptrs: 0x%x 0x%x",</div><div class='add'>+		     wl-&gt;mbox_ptr[0], wl-&gt;mbox_ptr[1]);</div><div class='add'>+</div><div class='add'>+	ret = wlcore_boot_fw_version(wl);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		wl1271_error("couldn't boot firmware");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * in case of full asynchronous mode the firmware event must be</div><div class='add'>+	 * ready to receive event from the command mailbox</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* unmask required mbox events  */</div><div class='add'>+	wl-&gt;event_mask = BSS_LOSE_EVENT_ID |</div><div class='add'>+		REGAINED_BSS_EVENT_ID |</div><div class='add'>+		SCAN_COMPLETE_EVENT_ID |</div><div class='add'>+		ROLE_STOP_COMPLETE_EVENT_ID |</div><div class='add'>+		RSSI_SNR_TRIGGER_0_EVENT_ID |</div><div class='add'>+		PSPOLL_DELIVERY_FAILURE_EVENT_ID |</div><div class='add'>+		SOFT_GEMINI_SENSE_EVENT_ID |</div><div class='add'>+		PERIODIC_SCAN_REPORT_EVENT_ID |</div><div class='add'>+		PERIODIC_SCAN_COMPLETE_EVENT_ID |</div><div class='add'>+		DUMMY_PACKET_EVENT_ID |</div><div class='add'>+		PEER_REMOVE_COMPLETE_EVENT_ID |</div><div class='add'>+		BA_SESSION_RX_CONSTRAINT_EVENT_ID |</div><div class='add'>+		REMAIN_ON_CHANNEL_COMPLETE_EVENT_ID |</div><div class='add'>+		INACTIVE_STA_EVENT_ID |</div><div class='add'>+		MAX_TX_RETRY_EVENT_ID |</div><div class='add'>+		CHANNEL_SWITCH_COMPLETE_EVENT_ID;</div><div class='add'>+</div><div class='add'>+	ret = wl1271_event_unmask(wl);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		wl1271_error("EVENT mask setting failed");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* set the working partition to its "running" mode offset */</div><div class='add'>+	wlcore_set_partition(wl, &amp;wl-&gt;ptable[PART_WORK]);</div><div class='add'>+</div><div class='add'>+	/* firmware startup completed */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(wlcore_boot_run_firmware);</div><div class='head'>diff --git a/drivers/net/wireless/ti/wlcore/boot.h b/drivers/net/wireless/ti/wlcore/boot.h<br/>new file mode 100644<br/>index 000000000000..094981dd2227<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/boot.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/boot.h</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is part of wl1271</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2008-2009 Nokia Corporation</div><div class='add'>+ *</div><div class='add'>+ * Contact: Luciano Coelho &lt;luciano.coelho@nokia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __BOOT_H__</div><div class='add'>+#define __BOOT_H__</div><div class='add'>+</div><div class='add'>+#include "wlcore.h"</div><div class='add'>+</div><div class='add'>+int wlcore_boot_upload_firmware(struct wl1271 *wl);</div><div class='add'>+int wlcore_boot_upload_nvs(struct wl1271 *wl);</div><div class='add'>+int wlcore_boot_run_firmware(struct wl1271 *wl);</div><div class='add'>+</div><div class='add'>+#define WL1271_NO_SUBBANDS 8</div><div class='add'>+#define WL1271_NO_POWER_LEVELS 4</div><div class='add'>+#define WL1271_FW_VERSION_MAX_LEN 20</div><div class='add'>+</div><div class='add'>+struct wl1271_static_data {</div><div class='add'>+	u8 mac_address[ETH_ALEN];</div><div class='add'>+	u8 padding[2];</div><div class='add'>+	u8 fw_version[WL1271_FW_VERSION_MAX_LEN];</div><div class='add'>+	u32 hw_version;</div><div class='add'>+	u8 tx_power_table[WL1271_NO_SUBBANDS][WL1271_NO_POWER_LEVELS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* number of times we try to read the INIT interrupt */</div><div class='add'>+#define INIT_LOOP 20000</div><div class='add'>+</div><div class='add'>+/* delay between retries */</div><div class='add'>+#define INIT_LOOP_DELAY 50</div><div class='add'>+</div><div class='add'>+#define WU_COUNTER_PAUSE_VAL 0x3FF</div><div class='add'>+#define WELP_ARM_COMMAND_VAL 0x4</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/cmd.c b/drivers/net/wireless/ti/wlcore/cmd.c<br/>index 3414fc11e9ba..5b128a971449 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/cmd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/cmd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/cmd.c</a></div><div class='hunk'>@@ -28,9 +28,8 @@</div><div class='ctx'> #include &lt;linux/ieee80211.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "debug.h"</div><div class='del'>-#include "reg.h"</div><div class='ctx'> #include "io.h"</div><div class='ctx'> #include "acx.h"</div><div class='ctx'> #include "wl12xx_80211.h"</div><div class='hunk'>@@ -67,11 +66,15 @@ int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len,</div><div class='ctx'> </div><div class='ctx'> 	wl1271_write(wl, wl-&gt;cmd_box_addr, buf, len, false);</div><div class='ctx'> </div><div class='del'>-	wl1271_write32(wl, ACX_REG_INTERRUPT_TRIG, INTR_TRIG_CMD);</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: we just need this because one bit is in a different</div><div class='add'>+	 * place.  Is there any better way?</div><div class='add'>+	 */</div><div class='add'>+	wl-&gt;ops-&gt;trigger_cmd(wl, wl-&gt;cmd_box_addr, buf, len);</div><div class='ctx'> </div><div class='ctx'> 	timeout = jiffies + msecs_to_jiffies(WL1271_COMMAND_TIMEOUT);</div><div class='ctx'> </div><div class='del'>-	intr = wl1271_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);</div><div class='add'>+	intr = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR);</div><div class='ctx'> 	while (!(intr &amp; WL1271_ACX_INTR_CMD_COMPLETE)) {</div><div class='ctx'> 		if (time_after(jiffies, timeout)) {</div><div class='ctx'> 			wl1271_error("command complete timeout");</div><div class='hunk'>@@ -85,7 +88,7 @@ int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len,</div><div class='ctx'> 		else</div><div class='ctx'> 			msleep(1);</div><div class='ctx'> </div><div class='del'>-		intr = wl1271_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);</div><div class='add'>+		intr = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* read back the status code of the command */</div><div class='hunk'>@@ -100,8 +103,7 @@ int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len,</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wl1271_write32(wl, ACX_REG_INTERRUPT_ACK,</div><div class='del'>-		       WL1271_ACX_INTR_CMD_COMPLETE);</div><div class='add'>+	wlcore_write_reg(wl, REG_INTERRUPT_ACK, WL1271_ACX_INTR_CMD_COMPLETE);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='hunk'>@@ -110,240 +112,20 @@ fail:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int wl1271_cmd_general_parms(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	struct wl1271_general_parms_cmd *gen_parms;</div><div class='del'>-	struct wl1271_ini_general_params *gp =</div><div class='del'>-		&amp;((struct wl1271_nvs_file *)wl-&gt;nvs)-&gt;general_params;</div><div class='del'>-	bool answer = false;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!wl-&gt;nvs)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	if (gp-&gt;tx_bip_fem_manufacturer &gt;= WL1271_INI_FEM_MODULE_COUNT) {</div><div class='del'>-		wl1271_warning("FEM index from INI out of bounds");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gen_parms = kzalloc(sizeof(*gen_parms), GFP_KERNEL);</div><div class='del'>-	if (!gen_parms)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	gen_parms-&gt;test.id = TEST_CMD_INI_FILE_GENERAL_PARAM;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;gen_parms-&gt;general_params, gp, sizeof(*gp));</div><div class='del'>-</div><div class='del'>-	if (gp-&gt;tx_bip_fem_auto_detect)</div><div class='del'>-		answer = true;</div><div class='del'>-</div><div class='del'>-	/* Override the REF CLK from the NVS with the one from platform data */</div><div class='del'>-	gen_parms-&gt;general_params.ref_clock = wl-&gt;ref_clock;</div><div class='del'>-</div><div class='del'>-	ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), answer);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		wl1271_warning("CMD_INI_FILE_GENERAL_PARAM failed");</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gp-&gt;tx_bip_fem_manufacturer =</div><div class='del'>-		gen_parms-&gt;general_params.tx_bip_fem_manufacturer;</div><div class='del'>-</div><div class='del'>-	if (gp-&gt;tx_bip_fem_manufacturer &gt;= WL1271_INI_FEM_MODULE_COUNT) {</div><div class='del'>-		wl1271_warning("FEM index from FW out of bounds");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	wl1271_debug(DEBUG_CMD, "FEM autodetect: %s, manufacturer: %d\n",</div><div class='del'>-		     answer ? "auto" : "manual", gp-&gt;tx_bip_fem_manufacturer);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	kfree(gen_parms);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int wl128x_cmd_general_parms(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	struct wl128x_general_parms_cmd *gen_parms;</div><div class='del'>-	struct wl128x_ini_general_params *gp =</div><div class='del'>-		&amp;((struct wl128x_nvs_file *)wl-&gt;nvs)-&gt;general_params;</div><div class='del'>-	bool answer = false;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!wl-&gt;nvs)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	if (gp-&gt;tx_bip_fem_manufacturer &gt;= WL1271_INI_FEM_MODULE_COUNT) {</div><div class='del'>-		wl1271_warning("FEM index from ini out of bounds");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gen_parms = kzalloc(sizeof(*gen_parms), GFP_KERNEL);</div><div class='del'>-	if (!gen_parms)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	gen_parms-&gt;test.id = TEST_CMD_INI_FILE_GENERAL_PARAM;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;gen_parms-&gt;general_params, gp, sizeof(*gp));</div><div class='del'>-</div><div class='del'>-	if (gp-&gt;tx_bip_fem_auto_detect)</div><div class='del'>-		answer = true;</div><div class='del'>-</div><div class='del'>-	/* Replace REF and TCXO CLKs with the ones from platform data */</div><div class='del'>-	gen_parms-&gt;general_params.ref_clock = wl-&gt;ref_clock;</div><div class='del'>-	gen_parms-&gt;general_params.tcxo_ref_clock = wl-&gt;tcxo_clock;</div><div class='del'>-</div><div class='del'>-	ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), answer);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		wl1271_warning("CMD_INI_FILE_GENERAL_PARAM failed");</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gp-&gt;tx_bip_fem_manufacturer =</div><div class='del'>-		gen_parms-&gt;general_params.tx_bip_fem_manufacturer;</div><div class='del'>-</div><div class='del'>-	if (gp-&gt;tx_bip_fem_manufacturer &gt;= WL1271_INI_FEM_MODULE_COUNT) {</div><div class='del'>-		wl1271_warning("FEM index from FW out of bounds");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	wl1271_debug(DEBUG_CMD, "FEM autodetect: %s, manufacturer: %d\n",</div><div class='del'>-		     answer ? "auto" : "manual", gp-&gt;tx_bip_fem_manufacturer);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	kfree(gen_parms);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int wl1271_cmd_radio_parms(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	struct wl1271_nvs_file *nvs = (struct wl1271_nvs_file *)wl-&gt;nvs;</div><div class='del'>-	struct wl1271_radio_parms_cmd *radio_parms;</div><div class='del'>-	struct wl1271_ini_general_params *gp = &amp;nvs-&gt;general_params;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!wl-&gt;nvs)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	radio_parms = kzalloc(sizeof(*radio_parms), GFP_KERNEL);</div><div class='del'>-	if (!radio_parms)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	radio_parms-&gt;test.id = TEST_CMD_INI_FILE_RADIO_PARAM;</div><div class='del'>-</div><div class='del'>-	/* 2.4GHz parameters */</div><div class='del'>-	memcpy(&amp;radio_parms-&gt;static_params_2, &amp;nvs-&gt;stat_radio_params_2,</div><div class='del'>-	       sizeof(struct wl1271_ini_band_params_2));</div><div class='del'>-	memcpy(&amp;radio_parms-&gt;dyn_params_2,</div><div class='del'>-	       &amp;nvs-&gt;dyn_radio_params_2[gp-&gt;tx_bip_fem_manufacturer].params,</div><div class='del'>-	       sizeof(struct wl1271_ini_fem_params_2));</div><div class='del'>-</div><div class='del'>-	/* 5GHz parameters */</div><div class='del'>-	memcpy(&amp;radio_parms-&gt;static_params_5,</div><div class='del'>-	       &amp;nvs-&gt;stat_radio_params_5,</div><div class='del'>-	       sizeof(struct wl1271_ini_band_params_5));</div><div class='del'>-	memcpy(&amp;radio_parms-&gt;dyn_params_5,</div><div class='del'>-	       &amp;nvs-&gt;dyn_radio_params_5[gp-&gt;tx_bip_fem_manufacturer].params,</div><div class='del'>-	       sizeof(struct wl1271_ini_fem_params_5));</div><div class='del'>-</div><div class='del'>-	wl1271_dump(DEBUG_CMD, "TEST_CMD_INI_FILE_RADIO_PARAM: ",</div><div class='del'>-		    radio_parms, sizeof(*radio_parms));</div><div class='del'>-</div><div class='del'>-	ret = wl1271_cmd_test(wl, radio_parms, sizeof(*radio_parms), 0);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		wl1271_warning("CMD_INI_FILE_RADIO_PARAM failed");</div><div class='del'>-</div><div class='del'>-	kfree(radio_parms);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int wl128x_cmd_radio_parms(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	struct wl128x_nvs_file *nvs = (struct wl128x_nvs_file *)wl-&gt;nvs;</div><div class='del'>-	struct wl128x_radio_parms_cmd *radio_parms;</div><div class='del'>-	struct wl128x_ini_general_params *gp = &amp;nvs-&gt;general_params;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!wl-&gt;nvs)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	radio_parms = kzalloc(sizeof(*radio_parms), GFP_KERNEL);</div><div class='del'>-	if (!radio_parms)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	radio_parms-&gt;test.id = TEST_CMD_INI_FILE_RADIO_PARAM;</div><div class='del'>-</div><div class='del'>-	/* 2.4GHz parameters */</div><div class='del'>-	memcpy(&amp;radio_parms-&gt;static_params_2, &amp;nvs-&gt;stat_radio_params_2,</div><div class='del'>-	       sizeof(struct wl128x_ini_band_params_2));</div><div class='del'>-	memcpy(&amp;radio_parms-&gt;dyn_params_2,</div><div class='del'>-	       &amp;nvs-&gt;dyn_radio_params_2[gp-&gt;tx_bip_fem_manufacturer].params,</div><div class='del'>-	       sizeof(struct wl128x_ini_fem_params_2));</div><div class='del'>-</div><div class='del'>-	/* 5GHz parameters */</div><div class='del'>-	memcpy(&amp;radio_parms-&gt;static_params_5,</div><div class='del'>-	       &amp;nvs-&gt;stat_radio_params_5,</div><div class='del'>-	       sizeof(struct wl128x_ini_band_params_5));</div><div class='del'>-	memcpy(&amp;radio_parms-&gt;dyn_params_5,</div><div class='del'>-	       &amp;nvs-&gt;dyn_radio_params_5[gp-&gt;tx_bip_fem_manufacturer].params,</div><div class='del'>-	       sizeof(struct wl128x_ini_fem_params_5));</div><div class='del'>-</div><div class='del'>-	radio_parms-&gt;fem_vendor_and_options = nvs-&gt;fem_vendor_and_options;</div><div class='del'>-</div><div class='del'>-	wl1271_dump(DEBUG_CMD, "TEST_CMD_INI_FILE_RADIO_PARAM: ",</div><div class='del'>-		    radio_parms, sizeof(*radio_parms));</div><div class='del'>-</div><div class='del'>-	ret = wl1271_cmd_test(wl, radio_parms, sizeof(*radio_parms), 0);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		wl1271_warning("CMD_INI_FILE_RADIO_PARAM failed");</div><div class='del'>-</div><div class='del'>-	kfree(radio_parms);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int wl1271_cmd_ext_radio_parms(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	struct wl1271_ext_radio_parms_cmd *ext_radio_parms;</div><div class='del'>-	struct conf_rf_settings *rf = &amp;wl-&gt;conf.rf;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!wl-&gt;nvs)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	ext_radio_parms = kzalloc(sizeof(*ext_radio_parms), GFP_KERNEL);</div><div class='del'>-	if (!ext_radio_parms)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ext_radio_parms-&gt;test.id = TEST_CMD_INI_FILE_RF_EXTENDED_PARAM;</div><div class='del'>-</div><div class='del'>-	memcpy(ext_radio_parms-&gt;tx_per_channel_power_compensation_2,</div><div class='del'>-	       rf-&gt;tx_per_channel_power_compensation_2,</div><div class='del'>-	       CONF_TX_PWR_COMPENSATION_LEN_2);</div><div class='del'>-	memcpy(ext_radio_parms-&gt;tx_per_channel_power_compensation_5,</div><div class='del'>-	       rf-&gt;tx_per_channel_power_compensation_5,</div><div class='del'>-	       CONF_TX_PWR_COMPENSATION_LEN_5);</div><div class='del'>-</div><div class='del'>-	wl1271_dump(DEBUG_CMD, "TEST_CMD_INI_FILE_EXT_RADIO_PARAM: ",</div><div class='del'>-		    ext_radio_parms, sizeof(*ext_radio_parms));</div><div class='del'>-</div><div class='del'>-	ret = wl1271_cmd_test(wl, ext_radio_parms, sizeof(*ext_radio_parms), 0);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		wl1271_warning("TEST_CMD_INI_FILE_RF_EXTENDED_PARAM failed");</div><div class='del'>-</div><div class='del'>-	kfree(ext_radio_parms);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Poll the mailbox event field until any of the bits in the mask is set or a</div><div class='ctx'>  * timeout occurs (WL1271_EVENT_TIMEOUT in msecs)</div><div class='ctx'>  */</div><div class='ctx'> static int wl1271_cmd_wait_for_event_or_timeout(struct wl1271 *wl, u32 mask)</div><div class='ctx'> {</div><div class='del'>-	u32 events_vector, event;</div><div class='add'>+	u32 *events_vector;</div><div class='add'>+	u32 event;</div><div class='ctx'> 	unsigned long timeout;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	events_vector = kmalloc(sizeof(*events_vector), GFP_KERNEL | GFP_DMA);</div><div class='add'>+	if (!events_vector)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	timeout = jiffies + msecs_to_jiffies(WL1271_EVENT_TIMEOUT);</div><div class='ctx'> </div><div class='hunk'>@@ -351,21 +133,24 @@ static int wl1271_cmd_wait_for_event_or_timeout(struct wl1271 *wl, u32 mask)</div><div class='ctx'> 		if (time_after(jiffies, timeout)) {</div><div class='ctx'> 			wl1271_debug(DEBUG_CMD, "timeout waiting for event %d",</div><div class='ctx'> 				     (int)mask);</div><div class='del'>-			return -ETIMEDOUT;</div><div class='add'>+			ret = -ETIMEDOUT;</div><div class='add'>+			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		msleep(1);</div><div class='ctx'> </div><div class='ctx'> 		/* read from both event fields */</div><div class='del'>-		wl1271_read(wl, wl-&gt;mbox_ptr[0], &amp;events_vector,</div><div class='del'>-			    sizeof(events_vector), false);</div><div class='del'>-		event = events_vector &amp; mask;</div><div class='del'>-		wl1271_read(wl, wl-&gt;mbox_ptr[1], &amp;events_vector,</div><div class='del'>-			    sizeof(events_vector), false);</div><div class='del'>-		event |= events_vector &amp; mask;</div><div class='add'>+		wl1271_read(wl, wl-&gt;mbox_ptr[0], events_vector,</div><div class='add'>+			    sizeof(*events_vector), false);</div><div class='add'>+		event = *events_vector &amp; mask;</div><div class='add'>+		wl1271_read(wl, wl-&gt;mbox_ptr[1], events_vector,</div><div class='add'>+			    sizeof(*events_vector), false);</div><div class='add'>+		event |= *events_vector &amp; mask;</div><div class='ctx'> 	} while (!event);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+out:</div><div class='add'>+	kfree(events_vector);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int wl1271_cmd_wait_for_event(struct wl1271 *wl, u32 mask)</div><div class='hunk'>@@ -522,7 +307,7 @@ static int wl12xx_cmd_role_start_dev(struct wl1271 *wl,</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;role_id = wlvif-&gt;dev_role_id;</div><div class='ctx'> 	if (wlvif-&gt;band == IEEE80211_BAND_5GHZ)</div><div class='del'>-		cmd-&gt;band = WL12XX_BAND_5GHZ;</div><div class='add'>+		cmd-&gt;band = WLCORE_BAND_5GHZ;</div><div class='ctx'> 	cmd-&gt;channel = wlvif-&gt;channel;</div><div class='ctx'> </div><div class='ctx'> 	if (wlvif-&gt;dev_hlid == WL12XX_INVALID_LINK_ID) {</div><div class='hunk'>@@ -613,7 +398,7 @@ int wl12xx_cmd_role_start_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif)</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;role_id = wlvif-&gt;role_id;</div><div class='ctx'> 	if (wlvif-&gt;band == IEEE80211_BAND_5GHZ)</div><div class='del'>-		cmd-&gt;band = WL12XX_BAND_5GHZ;</div><div class='add'>+		cmd-&gt;band = WLCORE_BAND_5GHZ;</div><div class='ctx'> 	cmd-&gt;channel = wlvif-&gt;channel;</div><div class='ctx'> 	cmd-&gt;sta.basic_rate_set = cpu_to_le32(wlvif-&gt;basic_rate_set);</div><div class='ctx'> 	cmd-&gt;sta.beacon_interval = cpu_to_le16(wlvif-&gt;beacon_int);</div><div class='hunk'>@@ -750,14 +535,14 @@ int wl12xx_cmd_role_start_ap(struct wl1271 *wl, struct wl12xx_vif *wlvif)</div><div class='ctx'> </div><div class='ctx'> 	switch (wlvif-&gt;band) {</div><div class='ctx'> 	case IEEE80211_BAND_2GHZ:</div><div class='del'>-		cmd-&gt;band = RADIO_BAND_2_4GHZ;</div><div class='add'>+		cmd-&gt;band = WLCORE_BAND_2_4GHZ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IEEE80211_BAND_5GHZ:</div><div class='del'>-		cmd-&gt;band = RADIO_BAND_5GHZ;</div><div class='add'>+		cmd-&gt;band = WLCORE_BAND_5GHZ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		wl1271_warning("ap start - unknown band: %d", (int)wlvif-&gt;band);</div><div class='del'>-		cmd-&gt;band = RADIO_BAND_2_4GHZ;</div><div class='add'>+		cmd-&gt;band = WLCORE_BAND_2_4GHZ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -830,7 +615,7 @@ int wl12xx_cmd_role_start_ibss(struct wl1271 *wl, struct wl12xx_vif *wlvif)</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;role_id = wlvif-&gt;role_id;</div><div class='ctx'> 	if (wlvif-&gt;band == IEEE80211_BAND_5GHZ)</div><div class='del'>-		cmd-&gt;band = WL12XX_BAND_5GHZ;</div><div class='add'>+		cmd-&gt;band = WLCORE_BAND_5GHZ;</div><div class='ctx'> 	cmd-&gt;channel = wlvif-&gt;channel;</div><div class='ctx'> 	cmd-&gt;ibss.basic_rate_set = cpu_to_le32(wlvif-&gt;basic_rate_set);</div><div class='ctx'> 	cmd-&gt;ibss.beacon_interval = cpu_to_le16(wlvif-&gt;beacon_int);</div><div class='hunk'>@@ -904,6 +689,7 @@ int wl1271_cmd_test(struct wl1271 *wl, void *buf, size_t buf_len, u8 answer)</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(wl1271_cmd_test);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * read acx from firmware</div><div class='hunk'>@@ -960,6 +746,7 @@ int wl1271_cmd_configure(struct wl1271 *wl, u16 id, void *buf, size_t len)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(wl1271_cmd_configure);</div><div class='ctx'> </div><div class='ctx'> int wl1271_cmd_data_path(struct wl1271 *wl, bool enable)</div><div class='ctx'> {</div><div class='hunk'>@@ -1249,7 +1036,7 @@ int wl1271_cmd_build_arp_rsp(struct wl1271 *wl, struct wl12xx_vif *wlvif)</div><div class='ctx'> 	skb_reserve(skb, sizeof(*hdr) + WL1271_EXTRA_SPACE_MAX);</div><div class='ctx'> </div><div class='ctx'> 	tmpl = (struct wl12xx_arp_rsp_template *)skb_put(skb, sizeof(*tmpl));</div><div class='del'>-	memset(tmpl, 0, sizeof(tmpl));</div><div class='add'>+	memset(tmpl, 0, sizeof(*tmpl));</div><div class='ctx'> </div><div class='ctx'> 	/* llc layer */</div><div class='ctx'> 	memcpy(tmpl-&gt;llc_hdr, rfc1042_header, sizeof(rfc1042_header));</div><div class='hunk'>@@ -1298,7 +1085,7 @@ int wl1271_cmd_build_arp_rsp(struct wl1271 *wl, struct wl12xx_vif *wlvif)</div><div class='ctx'> </div><div class='ctx'> 	/* mac80211 header */</div><div class='ctx'> 	hdr = (struct ieee80211_hdr_3addr *)skb_push(skb, sizeof(*hdr));</div><div class='del'>-	memset(hdr, 0, sizeof(hdr));</div><div class='add'>+	memset(hdr, 0, sizeof(*hdr));</div><div class='ctx'> 	fc = IEEE80211_FTYPE_DATA | IEEE80211_FCTL_TODS;</div><div class='ctx'> 	if (wlvif-&gt;sta.qos)</div><div class='ctx'> 		fc |= IEEE80211_STYPE_QOS_DATA;</div><div class='hunk'>@@ -1730,10 +1517,10 @@ static int wl12xx_cmd_roc(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='ctx'> 	cmd-&gt;channel = wlvif-&gt;channel;</div><div class='ctx'> 	switch (wlvif-&gt;band) {</div><div class='ctx'> 	case IEEE80211_BAND_2GHZ:</div><div class='del'>-		cmd-&gt;band = RADIO_BAND_2_4GHZ;</div><div class='add'>+		cmd-&gt;band = WLCORE_BAND_2_4GHZ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IEEE80211_BAND_5GHZ:</div><div class='del'>-		cmd-&gt;band = RADIO_BAND_5GHZ;</div><div class='add'>+		cmd-&gt;band = WLCORE_BAND_5GHZ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		wl1271_error("roc - unknown band: %d", (int)wlvif-&gt;band);</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/cmd.h b/drivers/net/wireless/ti/wlcore/cmd.h<br/>index de217d92516b..a46ae07cb77e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/cmd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/cmd.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/cmd.h</a></div><div class='hunk'>@@ -25,17 +25,12 @@</div><div class='ctx'> #ifndef __CMD_H__</div><div class='ctx'> #define __CMD_H__</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> </div><div class='ctx'> struct acx_header;</div><div class='ctx'> </div><div class='ctx'> int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len,</div><div class='ctx'> 		    size_t res_len);</div><div class='del'>-int wl1271_cmd_general_parms(struct wl1271 *wl);</div><div class='del'>-int wl128x_cmd_general_parms(struct wl1271 *wl);</div><div class='del'>-int wl1271_cmd_radio_parms(struct wl1271 *wl);</div><div class='del'>-int wl128x_cmd_radio_parms(struct wl1271 *wl);</div><div class='del'>-int wl1271_cmd_ext_radio_parms(struct wl1271 *wl);</div><div class='ctx'> int wl12xx_cmd_role_enable(struct wl1271 *wl, u8 *addr, u8 role_type,</div><div class='ctx'> 			   u8 *role_id);</div><div class='ctx'> int wl12xx_cmd_role_disable(struct wl1271 *wl, u8 *role_id);</div><div class='hunk'>@@ -262,13 +257,13 @@ struct wl12xx_cmd_role_disable {</div><div class='ctx'> 	u8 padding[3];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-enum wl12xx_band {</div><div class='del'>-	WL12XX_BAND_2_4GHZ		= 0,</div><div class='del'>-	WL12XX_BAND_5GHZ		= 1,</div><div class='del'>-	WL12XX_BAND_JAPAN_4_9_GHZ	= 2,</div><div class='del'>-	WL12XX_BAND_DEFAULT		= WL12XX_BAND_2_4GHZ,</div><div class='del'>-	WL12XX_BAND_INVALID		= 0x7E,</div><div class='del'>-	WL12XX_BAND_MAX_RADIO		= 0x7F,</div><div class='add'>+enum wlcore_band {</div><div class='add'>+	WLCORE_BAND_2_4GHZ		= 0,</div><div class='add'>+	WLCORE_BAND_5GHZ		= 1,</div><div class='add'>+	WLCORE_BAND_JAPAN_4_9_GHZ	= 2,</div><div class='add'>+	WLCORE_BAND_DEFAULT		= WLCORE_BAND_2_4GHZ,</div><div class='add'>+	WLCORE_BAND_INVALID		= 0x7E,</div><div class='add'>+	WLCORE_BAND_MAX_RADIO		= 0x7F,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct wl12xx_cmd_role_start {</div><div class='hunk'>@@ -494,83 +489,6 @@ enum wl1271_channel_tune_bands {</div><div class='ctx'> </div><div class='ctx'> #define WL1271_PD_REFERENCE_POINT_BAND_B_G  0</div><div class='ctx'> </div><div class='del'>-#define TEST_CMD_INI_FILE_RADIO_PARAM       0x19</div><div class='del'>-#define TEST_CMD_INI_FILE_GENERAL_PARAM     0x1E</div><div class='del'>-#define TEST_CMD_INI_FILE_RF_EXTENDED_PARAM 0x26</div><div class='del'>-</div><div class='del'>-struct wl1271_general_parms_cmd {</div><div class='del'>-	struct wl1271_cmd_header header;</div><div class='del'>-</div><div class='del'>-	struct wl1271_cmd_test_header test;</div><div class='del'>-</div><div class='del'>-	struct wl1271_ini_general_params general_params;</div><div class='del'>-</div><div class='del'>-	u8 sr_debug_table[WL1271_INI_MAX_SMART_REFLEX_PARAM];</div><div class='del'>-	u8 sr_sen_n_p;</div><div class='del'>-	u8 sr_sen_n_p_gain;</div><div class='del'>-	u8 sr_sen_nrn;</div><div class='del'>-	u8 sr_sen_prn;</div><div class='del'>-	u8 padding[3];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct wl128x_general_parms_cmd {</div><div class='del'>-	struct wl1271_cmd_header header;</div><div class='del'>-</div><div class='del'>-	struct wl1271_cmd_test_header test;</div><div class='del'>-</div><div class='del'>-	struct wl128x_ini_general_params general_params;</div><div class='del'>-</div><div class='del'>-	u8 sr_debug_table[WL1271_INI_MAX_SMART_REFLEX_PARAM];</div><div class='del'>-	u8 sr_sen_n_p;</div><div class='del'>-	u8 sr_sen_n_p_gain;</div><div class='del'>-	u8 sr_sen_nrn;</div><div class='del'>-	u8 sr_sen_prn;</div><div class='del'>-	u8 padding[3];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct wl1271_radio_parms_cmd {</div><div class='del'>-	struct wl1271_cmd_header header;</div><div class='del'>-</div><div class='del'>-	struct wl1271_cmd_test_header test;</div><div class='del'>-</div><div class='del'>-	/* Static radio parameters */</div><div class='del'>-	struct wl1271_ini_band_params_2 static_params_2;</div><div class='del'>-	struct wl1271_ini_band_params_5 static_params_5;</div><div class='del'>-</div><div class='del'>-	/* Dynamic radio parameters */</div><div class='del'>-	struct wl1271_ini_fem_params_2 dyn_params_2;</div><div class='del'>-	u8 padding2;</div><div class='del'>-	struct wl1271_ini_fem_params_5 dyn_params_5;</div><div class='del'>-	u8 padding3[2];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct wl128x_radio_parms_cmd {</div><div class='del'>-	struct wl1271_cmd_header header;</div><div class='del'>-</div><div class='del'>-	struct wl1271_cmd_test_header test;</div><div class='del'>-</div><div class='del'>-	/* Static radio parameters */</div><div class='del'>-	struct wl128x_ini_band_params_2 static_params_2;</div><div class='del'>-	struct wl128x_ini_band_params_5 static_params_5;</div><div class='del'>-</div><div class='del'>-	u8 fem_vendor_and_options;</div><div class='del'>-</div><div class='del'>-	/* Dynamic radio parameters */</div><div class='del'>-	struct wl128x_ini_fem_params_2 dyn_params_2;</div><div class='del'>-	u8 padding2;</div><div class='del'>-	struct wl128x_ini_fem_params_5 dyn_params_5;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct wl1271_ext_radio_parms_cmd {</div><div class='del'>-	struct wl1271_cmd_header header;</div><div class='del'>-</div><div class='del'>-	struct wl1271_cmd_test_header test;</div><div class='del'>-</div><div class='del'>-	u8 tx_per_channel_power_compensation_2[CONF_TX_PWR_COMPENSATION_LEN_2];</div><div class='del'>-	u8 tx_per_channel_power_compensation_5[CONF_TX_PWR_COMPENSATION_LEN_5];</div><div class='del'>-	u8 padding[3];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * There are three types of disconnections:</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/conf.h b/drivers/net/wireless/ti/wlcore/conf.h<br/>index 3e581e19424c..fef0db4213bc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/conf.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/conf.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/conf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/conf.h</a></div><div class='hunk'>@@ -65,36 +65,7 @@ enum {</div><div class='ctx'> 	CONF_HW_RATE_INDEX_MAX     = CONF_HW_RATE_INDEX_54MBPS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum {</div><div class='del'>-	CONF_HW_RXTX_RATE_MCS7_SGI = 0,</div><div class='del'>-	CONF_HW_RXTX_RATE_MCS7,</div><div class='del'>-	CONF_HW_RXTX_RATE_MCS6,</div><div class='del'>-	CONF_HW_RXTX_RATE_MCS5,</div><div class='del'>-	CONF_HW_RXTX_RATE_MCS4,</div><div class='del'>-	CONF_HW_RXTX_RATE_MCS3,</div><div class='del'>-	CONF_HW_RXTX_RATE_MCS2,</div><div class='del'>-	CONF_HW_RXTX_RATE_MCS1,</div><div class='del'>-	CONF_HW_RXTX_RATE_MCS0,</div><div class='del'>-	CONF_HW_RXTX_RATE_54,</div><div class='del'>-	CONF_HW_RXTX_RATE_48,</div><div class='del'>-	CONF_HW_RXTX_RATE_36,</div><div class='del'>-	CONF_HW_RXTX_RATE_24,</div><div class='del'>-	CONF_HW_RXTX_RATE_22,</div><div class='del'>-	CONF_HW_RXTX_RATE_18,</div><div class='del'>-	CONF_HW_RXTX_RATE_12,</div><div class='del'>-	CONF_HW_RXTX_RATE_11,</div><div class='del'>-	CONF_HW_RXTX_RATE_9,</div><div class='del'>-	CONF_HW_RXTX_RATE_6,</div><div class='del'>-	CONF_HW_RXTX_RATE_5_5,</div><div class='del'>-	CONF_HW_RXTX_RATE_2,</div><div class='del'>-	CONF_HW_RXTX_RATE_1,</div><div class='del'>-	CONF_HW_RXTX_RATE_MAX,</div><div class='del'>-	CONF_HW_RXTX_RATE_UNSUPPORTED = 0xff</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Rates between and including these are MCS rates */</div><div class='del'>-#define CONF_HW_RXTX_RATE_MCS_MIN CONF_HW_RXTX_RATE_MCS7_SGI</div><div class='del'>-#define CONF_HW_RXTX_RATE_MCS_MAX CONF_HW_RXTX_RATE_MCS0</div><div class='add'>+#define CONF_HW_RXTX_RATE_UNSUPPORTED 0xff</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='ctx'> 	CONF_SG_DISABLE = 0,</div><div class='hunk'>@@ -1096,16 +1067,31 @@ struct conf_scan_settings {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct conf_sched_scan_settings {</div><div class='del'>-	/* minimum time to wait on the channel for active scans (in TUs) */</div><div class='del'>-	u16 min_dwell_time_active;</div><div class='add'>+	/*</div><div class='add'>+	 * The base time to wait on the channel for active scans (in TU/1000).</div><div class='add'>+	 * The minimum dwell time is calculated according to this:</div><div class='add'>+	 * min_dwell_time = base + num_of_probes_to_be_sent * delta_per_probe</div><div class='add'>+	 * The maximum dwell time is calculated according to this:</div><div class='add'>+	 * max_dwell_time = min_dwell_time + max_dwell_time_delta</div><div class='add'>+	 */</div><div class='add'>+	u32 base_dwell_time;</div><div class='ctx'> </div><div class='del'>-	/* maximum time to wait on the channel for active scans (in TUs) */</div><div class='del'>-	u16 max_dwell_time_active;</div><div class='add'>+	/* The delta between the min dwell time and max dwell time for</div><div class='add'>+	 * active scans (in TU/1000s). The max dwell time is used by the FW once</div><div class='add'>+	 * traffic is detected on the channel.</div><div class='add'>+	 */</div><div class='add'>+	u32 max_dwell_time_delta;</div><div class='add'>+</div><div class='add'>+	/* Delta added to min dwell time per each probe in 2.4 GHz (TU/1000) */</div><div class='add'>+	u32 dwell_time_delta_per_probe;</div><div class='ctx'> </div><div class='del'>-	/* time to wait on the channel for passive scans (in TUs) */</div><div class='add'>+	/* Delta added to min dwell time per each probe in 5 GHz (TU/1000) */</div><div class='add'>+	u32 dwell_time_delta_per_probe_5;</div><div class='add'>+</div><div class='add'>+	/* time to wait on the channel for passive scans (in TU/1000) */</div><div class='ctx'> 	u32 dwell_time_passive;</div><div class='ctx'> </div><div class='del'>-	/* time to wait on the channel for DFS scans (in TUs) */</div><div class='add'>+	/* time to wait on the channel for DFS scans (in TU/1000) */</div><div class='ctx'> 	u32 dwell_time_dfs;</div><div class='ctx'> </div><div class='ctx'> 	/* number of probe requests to send on each channel in active scans */</div><div class='hunk'>@@ -1118,26 +1104,6 @@ struct conf_sched_scan_settings {</div><div class='ctx'> 	s8 snr_threshold;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* these are number of channels on the band divided by two, rounded up */</div><div class='del'>-#define CONF_TX_PWR_COMPENSATION_LEN_2 7</div><div class='del'>-#define CONF_TX_PWR_COMPENSATION_LEN_5 18</div><div class='del'>-</div><div class='del'>-struct conf_rf_settings {</div><div class='del'>-	/*</div><div class='del'>-	 * Per channel power compensation for 2.4GHz</div><div class='del'>-	 *</div><div class='del'>-	 * Range: s8</div><div class='del'>-	 */</div><div class='del'>-	u8 tx_per_channel_power_compensation_2[CONF_TX_PWR_COMPENSATION_LEN_2];</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Per channel power compensation for 5GHz</div><div class='del'>-	 *</div><div class='del'>-	 * Range: s8</div><div class='del'>-	 */</div><div class='del'>-	u8 tx_per_channel_power_compensation_5[CONF_TX_PWR_COMPENSATION_LEN_5];</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct conf_ht_setting {</div><div class='ctx'> 	u8 rx_ba_win_size;</div><div class='ctx'> 	u8 tx_ba_win_size;</div><div class='hunk'>@@ -1286,7 +1252,7 @@ struct conf_hangover_settings {</div><div class='ctx'> 	u8 window_size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct conf_drv_settings {</div><div class='add'>+struct wlcore_conf {</div><div class='ctx'> 	struct conf_sg_settings sg;</div><div class='ctx'> 	struct conf_rx_settings rx;</div><div class='ctx'> 	struct conf_tx_settings tx;</div><div class='hunk'>@@ -1296,16 +1262,13 @@ struct conf_drv_settings {</div><div class='ctx'> 	struct conf_roam_trigger_settings roam_trigger;</div><div class='ctx'> 	struct conf_scan_settings scan;</div><div class='ctx'> 	struct conf_sched_scan_settings sched_scan;</div><div class='del'>-	struct conf_rf_settings rf;</div><div class='ctx'> 	struct conf_ht_setting ht;</div><div class='del'>-	struct conf_memory_settings mem_wl127x;</div><div class='del'>-	struct conf_memory_settings mem_wl128x;</div><div class='add'>+	struct conf_memory_settings mem;</div><div class='ctx'> 	struct conf_fm_coex fm_coex;</div><div class='ctx'> 	struct conf_rx_streaming_settings rx_streaming;</div><div class='ctx'> 	struct conf_fwlog fwlog;</div><div class='ctx'> 	struct conf_rate_policy_settings rate;</div><div class='ctx'> 	struct conf_hangover_settings hangover;</div><div class='del'>-	u8 hci_io_ds;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/debug.h b/drivers/net/wireless/ti/wlcore/debug.h<br/>index ec0fdc25b280..6b800b3cbea5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/debug.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/debug.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/debug.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/debug.h</a></div><div class='hunk'>@@ -52,6 +52,7 @@ enum {</div><div class='ctx'> 	DEBUG_ADHOC     = BIT(16),</div><div class='ctx'> 	DEBUG_AP	= BIT(17),</div><div class='ctx'> 	DEBUG_PROBE	= BIT(18),</div><div class='add'>+	DEBUG_IO	= BIT(19),</div><div class='ctx'> 	DEBUG_MASTER	= (DEBUG_ADHOC | DEBUG_AP),</div><div class='ctx'> 	DEBUG_ALL	= ~0,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/debugfs.c b/drivers/net/wireless/ti/wlcore/debugfs.c<br/>index 564d49575c94..d5aea1ff5ad1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/debugfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/debugfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/debugfs.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "acx.h"</div><div class='ctx'> #include "ps.h"</div><div class='hunk'>@@ -647,6 +647,7 @@ static ssize_t vifs_state_read(struct file *file, char __user *user_buf,</div><div class='ctx'> 		VIF_STATE_PRINT_INT(last_rssi_event);</div><div class='ctx'> 		VIF_STATE_PRINT_INT(ba_support);</div><div class='ctx'> 		VIF_STATE_PRINT_INT(ba_allowed);</div><div class='add'>+		VIF_STATE_PRINT_INT(is_gem);</div><div class='ctx'> 		VIF_STATE_PRINT_LLHEX(tx_security_seq);</div><div class='ctx'> 		VIF_STATE_PRINT_INT(tx_security_last_seq_lsb);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/debugfs.h b/drivers/net/wireless/ti/wlcore/debugfs.h<br/>index 254c5b292cf6..a8d3aef011ff 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/debugfs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/debugfs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/debugfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/debugfs.h</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #ifndef __DEBUGFS_H__</div><div class='ctx'> #define __DEBUGFS_H__</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> </div><div class='ctx'> int wl1271_debugfs_init(struct wl1271 *wl);</div><div class='ctx'> void wl1271_debugfs_exit(struct wl1271 *wl);</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/event.c b/drivers/net/wireless/ti/wlcore/event.c<br/>index c953717f38eb..28e2a633c3be 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/event.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/event.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/event.c</a></div><div class='hunk'>@@ -21,9 +21,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "debug.h"</div><div class='del'>-#include "reg.h"</div><div class='ctx'> #include "io.h"</div><div class='ctx'> #include "event.h"</div><div class='ctx'> #include "ps.h"</div><div class='hunk'>@@ -98,12 +97,12 @@ static void wl1271_event_mbox_dump(struct event_mailbox *mbox)</div><div class='ctx'> 	wl1271_debug(DEBUG_EVENT, "\tmask: 0x%x", mbox-&gt;events_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wl1271_event_process(struct wl1271 *wl, struct event_mailbox *mbox)</div><div class='add'>+static int wl1271_event_process(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='add'>+	struct event_mailbox *mbox = wl-&gt;mbox;</div><div class='ctx'> 	struct ieee80211_vif *vif;</div><div class='ctx'> 	struct wl12xx_vif *wlvif;</div><div class='ctx'> 	u32 vector;</div><div class='del'>-	bool beacon_loss = false;</div><div class='ctx'> 	bool disconnect_sta = false;</div><div class='ctx'> 	unsigned long sta_bitmap = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -141,20 +140,23 @@ static int wl1271_event_process(struct wl1271 *wl, struct event_mailbox *mbox)</div><div class='ctx'> 					       mbox-&gt;soft_gemini_sense_info);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * The BSS_LOSE_EVENT_ID is only needed while psm (and hence beacon</div><div class='del'>-	 * filtering) is enabled. Without PSM, the stack will receive all</div><div class='del'>-	 * beacons and can detect beacon loss by itself.</div><div class='del'>-	 *</div><div class='del'>-	 * As there's possibility that the driver disables PSM before receiving</div><div class='del'>-	 * BSS_LOSE_EVENT, beacon loss has to be reported to the stack.</div><div class='del'>-	 *</div><div class='add'>+	 * We are HW_MONITOR device. On beacon loss - queue</div><div class='add'>+	 * connection loss work. Cancel it on REGAINED event.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (vector &amp; BSS_LOSE_EVENT_ID) {</div><div class='ctx'> 		/* TODO: check for multi-role */</div><div class='add'>+		int delay = wl-&gt;conf.conn.synch_fail_thold *</div><div class='add'>+					wl-&gt;conf.conn.bss_lose_timeout;</div><div class='ctx'> 		wl1271_info("Beacon loss detected.");</div><div class='add'>+		cancel_delayed_work_sync(&amp;wl-&gt;connection_loss_work);</div><div class='add'>+		ieee80211_queue_delayed_work(wl-&gt;hw, &amp;wl-&gt;connection_loss_work,</div><div class='add'>+		      msecs_to_jiffies(delay));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* indicate to the stack, that beacons have been lost */</div><div class='del'>-		beacon_loss = true;</div><div class='add'>+	if (vector &amp; REGAINED_BSS_EVENT_ID) {</div><div class='add'>+		/* TODO: check for multi-role */</div><div class='add'>+		wl1271_info("Beacon regained.");</div><div class='add'>+		cancel_delayed_work_sync(&amp;wl-&gt;connection_loss_work);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vector &amp; RSSI_SNR_TRIGGER_0_EVENT_ID) {</div><div class='hunk'>@@ -196,7 +198,7 @@ static int wl1271_event_process(struct wl1271 *wl, struct event_mailbox *mbox)</div><div class='ctx'> 			bool success;</div><div class='ctx'> </div><div class='ctx'> 			if (!test_and_clear_bit(WLVIF_FLAG_CS_PROGRESS,</div><div class='del'>-						&amp;wl-&gt;flags))</div><div class='add'>+						&amp;wlvif-&gt;flags))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			success = mbox-&gt;channel_switch_status ? false : true;</div><div class='hunk'>@@ -257,13 +259,6 @@ static int wl1271_event_process(struct wl1271 *wl, struct event_mailbox *mbox)</div><div class='ctx'> 			rcu_read_unlock();</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (beacon_loss)</div><div class='del'>-		wl12xx_for_each_wlvif_sta(wl, wlvif) {</div><div class='del'>-			vif = wl12xx_wlvif_to_vif(wlvif);</div><div class='del'>-			ieee80211_connection_loss(vif);</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -278,18 +273,8 @@ int wl1271_event_unmask(struct wl1271 *wl)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void wl1271_event_mbox_config(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	wl-&gt;mbox_ptr[0] = wl1271_read32(wl, REG_EVENT_MAILBOX_PTR);</div><div class='del'>-	wl-&gt;mbox_ptr[1] = wl-&gt;mbox_ptr[0] + sizeof(struct event_mailbox);</div><div class='del'>-</div><div class='del'>-	wl1271_debug(DEBUG_EVENT, "MBOX ptrs: 0x%x 0x%x",</div><div class='del'>-		     wl-&gt;mbox_ptr[0], wl-&gt;mbox_ptr[1]);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int wl1271_event_handle(struct wl1271 *wl, u8 mbox_num)</div><div class='ctx'> {</div><div class='del'>-	struct event_mailbox mbox;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	wl1271_debug(DEBUG_EVENT, "EVENT on mbox %d", mbox_num);</div><div class='hunk'>@@ -298,16 +283,19 @@ int wl1271_event_handle(struct wl1271 *wl, u8 mbox_num)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* first we read the mbox descriptor */</div><div class='del'>-	wl1271_read(wl, wl-&gt;mbox_ptr[mbox_num], &amp;mbox,</div><div class='del'>-		    sizeof(struct event_mailbox), false);</div><div class='add'>+	wl1271_read(wl, wl-&gt;mbox_ptr[mbox_num], wl-&gt;mbox,</div><div class='add'>+		    sizeof(*wl-&gt;mbox), false);</div><div class='ctx'> </div><div class='ctx'> 	/* process the descriptor */</div><div class='del'>-	ret = wl1271_event_process(wl, &amp;mbox);</div><div class='add'>+	ret = wl1271_event_process(wl);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	/* then we let the firmware know it can go on...*/</div><div class='del'>-	wl1271_write32(wl, ACX_REG_INTERRUPT_TRIG, INTR_TRIG_EVENT_ACK);</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: we just need this because one bit is in a different</div><div class='add'>+	 * place.  Is there any better way?</div><div class='add'>+	 */</div><div class='add'>+	wl-&gt;ops-&gt;ack_event(wl);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/event.h b/drivers/net/wireless/ti/wlcore/event.h<br/>index 057d193d3525..8adf18d6c58f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/event.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/event.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/event.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/event.h</a></div><div class='hunk'>@@ -132,8 +132,9 @@ struct event_mailbox {</div><div class='ctx'> 	u8 reserved_8[9];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+struct wl1271;</div><div class='add'>+</div><div class='ctx'> int wl1271_event_unmask(struct wl1271 *wl);</div><div class='del'>-void wl1271_event_mbox_config(struct wl1271 *wl);</div><div class='ctx'> int wl1271_event_handle(struct wl1271 *wl, u8 mbox);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/ti/wlcore/hw_ops.h b/drivers/net/wireless/ti/wlcore/hw_ops.h<br/>new file mode 100644<br/>index 000000000000..9384b4d56c24<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/hw_ops.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/hw_ops.h</a></div><div class='hunk'>@@ -0,0 +1,122 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is part of wlcore</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011 Texas Instruments Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __WLCORE_HW_OPS_H__</div><div class='add'>+#define __WLCORE_HW_OPS_H__</div><div class='add'>+</div><div class='add'>+#include "wlcore.h"</div><div class='add'>+#include "rx.h"</div><div class='add'>+</div><div class='add'>+static inline u32</div><div class='add'>+wlcore_hw_calc_tx_blocks(struct wl1271 *wl, u32 len, u32 spare_blks)</div><div class='add'>+{</div><div class='add'>+	if (!wl-&gt;ops-&gt;calc_tx_blocks)</div><div class='add'>+		BUG_ON(1);</div><div class='add'>+</div><div class='add'>+	return wl-&gt;ops-&gt;calc_tx_blocks(wl, len, spare_blks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+wlcore_hw_set_tx_desc_blocks(struct wl1271 *wl, struct wl1271_tx_hw_descr *desc,</div><div class='add'>+			     u32 blks, u32 spare_blks)</div><div class='add'>+{</div><div class='add'>+	if (!wl-&gt;ops-&gt;set_tx_desc_blocks)</div><div class='add'>+		BUG_ON(1);</div><div class='add'>+</div><div class='add'>+	return wl-&gt;ops-&gt;set_tx_desc_blocks(wl, desc, blks, spare_blks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+wlcore_hw_set_tx_desc_data_len(struct wl1271 *wl,</div><div class='add'>+			       struct wl1271_tx_hw_descr *desc,</div><div class='add'>+			       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	if (!wl-&gt;ops-&gt;set_tx_desc_data_len)</div><div class='add'>+		BUG_ON(1);</div><div class='add'>+</div><div class='add'>+	wl-&gt;ops-&gt;set_tx_desc_data_len(wl, desc, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline enum wl_rx_buf_align</div><div class='add'>+wlcore_hw_get_rx_buf_align(struct wl1271 *wl, u32 rx_desc)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	if (!wl-&gt;ops-&gt;get_rx_buf_align)</div><div class='add'>+		BUG_ON(1);</div><div class='add'>+</div><div class='add'>+	return wl-&gt;ops-&gt;get_rx_buf_align(wl, rx_desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+wlcore_hw_prepare_read(struct wl1271 *wl, u32 rx_desc, u32 len)</div><div class='add'>+{</div><div class='add'>+	if (wl-&gt;ops-&gt;prepare_read)</div><div class='add'>+		wl-&gt;ops-&gt;prepare_read(wl, rx_desc, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32</div><div class='add'>+wlcore_hw_get_rx_packet_len(struct wl1271 *wl, void *rx_data, u32 data_len)</div><div class='add'>+{</div><div class='add'>+	if (!wl-&gt;ops-&gt;get_rx_packet_len)</div><div class='add'>+		BUG_ON(1);</div><div class='add'>+</div><div class='add'>+	return wl-&gt;ops-&gt;get_rx_packet_len(wl, rx_data, data_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void wlcore_hw_tx_delayed_compl(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	if (wl-&gt;ops-&gt;tx_delayed_compl)</div><div class='add'>+		wl-&gt;ops-&gt;tx_delayed_compl(wl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void wlcore_hw_tx_immediate_compl(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	if (wl-&gt;ops-&gt;tx_immediate_compl)</div><div class='add'>+		wl-&gt;ops-&gt;tx_immediate_compl(wl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+wlcore_hw_init_vif(struct wl1271 *wl, struct wl12xx_vif *wlvif)</div><div class='add'>+{</div><div class='add'>+	if (wl-&gt;ops-&gt;init_vif)</div><div class='add'>+		return wl-&gt;ops-&gt;init_vif(wl, wlvif);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32</div><div class='add'>+wlcore_hw_sta_get_ap_rate_mask(struct wl1271 *wl, struct wl12xx_vif *wlvif)</div><div class='add'>+{</div><div class='add'>+	if (!wl-&gt;ops-&gt;sta_get_ap_rate_mask)</div><div class='add'>+		BUG_ON(1);</div><div class='add'>+</div><div class='add'>+	return wl-&gt;ops-&gt;sta_get_ap_rate_mask(wl, wlvif);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int wlcore_identify_fw(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	if (wl-&gt;ops-&gt;identify_fw)</div><div class='add'>+		return wl-&gt;ops-&gt;identify_fw(wl);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/ini.h b/drivers/net/wireless/ti/wlcore/ini.h<br/>index 4cf9ecc56212..4cf9ecc56212 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/ini.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/ini.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/ini.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/ini.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/init.c b/drivers/net/wireless/ti/wlcore/init.c<br/>index 203fbebf09eb..9f89255eb6e6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/init.c</a></div><div class='hunk'>@@ -30,9 +30,9 @@</div><div class='ctx'> #include "wl12xx_80211.h"</div><div class='ctx'> #include "acx.h"</div><div class='ctx'> #include "cmd.h"</div><div class='del'>-#include "reg.h"</div><div class='ctx'> #include "tx.h"</div><div class='ctx'> #include "io.h"</div><div class='add'>+#include "hw_ops.h"</div><div class='ctx'> </div><div class='ctx'> int wl1271_init_templates_config(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='hunk'>@@ -319,7 +319,7 @@ static int wl12xx_init_fwlog(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (wl-&gt;quirks &amp; WL12XX_QUIRK_FWLOG_NOT_IMPLEMENTED)</div><div class='add'>+	if (wl-&gt;quirks &amp; WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = wl12xx_cmd_config_fwlog(wl);</div><div class='hunk'>@@ -494,26 +494,6 @@ static int wl1271_set_ba_policies(struct wl1271 *wl, struct wl12xx_vif *wlvif)</div><div class='ctx'> 	return wl12xx_acx_set_ba_initiator_policy(wl, wlvif);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int wl1271_chip_specific_init(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='del'>-		u32 host_cfg_bitmap = HOST_IF_CFG_RX_FIFO_ENABLE;</div><div class='del'>-</div><div class='del'>-		if (!(wl-&gt;quirks &amp; WL12XX_QUIRK_NO_BLOCKSIZE_ALIGNMENT))</div><div class='del'>-			/* Enable SDIO padding */</div><div class='del'>-			host_cfg_bitmap |= HOST_IF_CFG_TX_PAD_TO_SDIO_BLK;</div><div class='del'>-</div><div class='del'>-		/* Must be before wl1271_acx_init_mem_config() */</div><div class='del'>-		ret = wl1271_acx_host_if_cfg_bitmap(wl, host_cfg_bitmap);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto out;</div><div class='del'>-	}</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* vif-specifc initialization */</div><div class='ctx'> static int wl12xx_init_sta_role(struct wl1271 *wl, struct wl12xx_vif *wlvif)</div><div class='ctx'> {</div><div class='hunk'>@@ -582,10 +562,17 @@ int wl1271_init_vif_specific(struct wl1271 *wl, struct ieee80211_vif *vif)</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='ctx'> 				return ret;</div><div class='ctx'> 		} else if (!wl-&gt;sta_count) {</div><div class='del'>-			/* Configure for ELP power saving */</div><div class='del'>-			ret = wl1271_acx_sleep_auth(wl, WL1271_PSM_ELP);</div><div class='del'>-			if (ret &lt; 0)</div><div class='del'>-				return ret;</div><div class='add'>+			if (wl-&gt;quirks &amp; WLCORE_QUIRK_NO_ELP) {</div><div class='add'>+				/* Configure for power always on */</div><div class='add'>+				ret = wl1271_acx_sleep_auth(wl, WL1271_PSM_CAM);</div><div class='add'>+				if (ret &lt; 0)</div><div class='add'>+					return ret;</div><div class='add'>+			} else {</div><div class='add'>+				/* Configure for ELP power saving */</div><div class='add'>+				ret = wl1271_acx_sleep_auth(wl, WL1271_PSM_ELP);</div><div class='add'>+				if (ret &lt; 0)</div><div class='add'>+					return ret;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -652,6 +639,10 @@ int wl1271_init_vif_specific(struct wl1271 *wl, struct ieee80211_vif *vif)</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	ret = wlcore_hw_init_vif(wl, wlvif);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -659,27 +650,8 @@ int wl1271_hw_init(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='del'>-		ret = wl128x_cmd_general_parms(wl);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-		ret = wl128x_cmd_radio_parms(wl);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-	} else {</div><div class='del'>-		ret = wl1271_cmd_general_parms(wl);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-		ret = wl1271_cmd_radio_parms(wl);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-		ret = wl1271_cmd_ext_radio_parms(wl);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Chip-specific init */</div><div class='del'>-	ret = wl1271_chip_specific_init(wl);</div><div class='add'>+	/* Chip-specific hw init */</div><div class='add'>+	ret = wl-&gt;ops-&gt;hw_init(wl);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/init.h b/drivers/net/wireless/ti/wlcore/init.h<br/>index 2da0f404ef6e..a45fbfddec19 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/init.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/init.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/init.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/init.h</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #ifndef __INIT_H__</div><div class='ctx'> #define __INIT_H__</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> </div><div class='ctx'> int wl1271_hw_init_power_auth(struct wl1271 *wl);</div><div class='ctx'> int wl1271_init_templates_config(struct wl1271 *wl);</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/io.c b/drivers/net/wireless/ti/wlcore/io.c<br/>index c574a3b31e31..7cd0081aede5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/io.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/io.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/io.c</a></div><div class='hunk'>@@ -26,84 +26,12 @@</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "wl12xx_80211.h"</div><div class='ctx'> #include "io.h"</div><div class='ctx'> #include "tx.h"</div><div class='ctx'> </div><div class='del'>-#define OCP_CMD_LOOP  32</div><div class='del'>-</div><div class='del'>-#define OCP_CMD_WRITE 0x1</div><div class='del'>-#define OCP_CMD_READ  0x2</div><div class='del'>-</div><div class='del'>-#define OCP_READY_MASK  BIT(18)</div><div class='del'>-#define OCP_STATUS_MASK (BIT(16) | BIT(17))</div><div class='del'>-</div><div class='del'>-#define OCP_STATUS_NO_RESP    0x00000</div><div class='del'>-#define OCP_STATUS_OK         0x10000</div><div class='del'>-#define OCP_STATUS_REQ_FAILED 0x20000</div><div class='del'>-#define OCP_STATUS_RESP_ERROR 0x30000</div><div class='del'>-</div><div class='del'>-struct wl1271_partition_set wl12xx_part_table[PART_TABLE_LEN] = {</div><div class='del'>-	[PART_DOWN] = {</div><div class='del'>-		.mem = {</div><div class='del'>-			.start = 0x00000000,</div><div class='del'>-			.size  = 0x000177c0</div><div class='del'>-		},</div><div class='del'>-		.reg = {</div><div class='del'>-			.start = REGISTERS_BASE,</div><div class='del'>-			.size  = 0x00008800</div><div class='del'>-		},</div><div class='del'>-		.mem2 = {</div><div class='del'>-			.start = 0x00000000,</div><div class='del'>-			.size  = 0x00000000</div><div class='del'>-		},</div><div class='del'>-		.mem3 = {</div><div class='del'>-			.start = 0x00000000,</div><div class='del'>-			.size  = 0x00000000</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	[PART_WORK] = {</div><div class='del'>-		.mem = {</div><div class='del'>-			.start = 0x00040000,</div><div class='del'>-			.size  = 0x00014fc0</div><div class='del'>-		},</div><div class='del'>-		.reg = {</div><div class='del'>-			.start = REGISTERS_BASE,</div><div class='del'>-			.size  = 0x0000a000</div><div class='del'>-		},</div><div class='del'>-		.mem2 = {</div><div class='del'>-			.start = 0x003004f8,</div><div class='del'>-			.size  = 0x00000004</div><div class='del'>-		},</div><div class='del'>-		.mem3 = {</div><div class='del'>-			.start = 0x00040404,</div><div class='del'>-			.size  = 0x00000000</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	[PART_DRPW] = {</div><div class='del'>-		.mem = {</div><div class='del'>-			.start = 0x00040000,</div><div class='del'>-			.size  = 0x00014fc0</div><div class='del'>-		},</div><div class='del'>-		.reg = {</div><div class='del'>-			.start = DRPW_BASE,</div><div class='del'>-			.size  = 0x00006000</div><div class='del'>-		},</div><div class='del'>-		.mem2 = {</div><div class='del'>-			.start = 0x00000000,</div><div class='del'>-			.size  = 0x00000000</div><div class='del'>-		},</div><div class='del'>-		.mem3 = {</div><div class='del'>-			.start = 0x00000000,</div><div class='del'>-			.size  = 0x00000000</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> bool wl1271_set_block_size(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='ctx'> 	if (wl-&gt;if_ops-&gt;set_block_size) {</div><div class='hunk'>@@ -114,17 +42,53 @@ bool wl1271_set_block_size(struct wl1271 *wl)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void wl1271_disable_interrupts(struct wl1271 *wl)</div><div class='add'>+void wlcore_disable_interrupts(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='ctx'> 	disable_irq(wl-&gt;irq);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(wlcore_disable_interrupts);</div><div class='ctx'> </div><div class='del'>-void wl1271_enable_interrupts(struct wl1271 *wl)</div><div class='add'>+void wlcore_enable_interrupts(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='ctx'> 	enable_irq(wl-&gt;irq);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(wlcore_enable_interrupts);</div><div class='ctx'> </div><div class='del'>-/* Set the SPI partitions to access the chip addresses</div><div class='add'>+int wlcore_translate_addr(struct wl1271 *wl, int addr)</div><div class='add'>+{</div><div class='add'>+	struct wlcore_partition_set *part = &amp;wl-&gt;curr_part;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * To translate, first check to which window of addresses the</div><div class='add'>+	 * particular address belongs. Then subtract the starting address</div><div class='add'>+	 * of that window from the address. Then, add offset of the</div><div class='add'>+	 * translated region.</div><div class='add'>+	 *</div><div class='add'>+	 * The translated regions occur next to each other in physical device</div><div class='add'>+	 * memory, so just add the sizes of the preceding address regions to</div><div class='add'>+	 * get the offset to the new region.</div><div class='add'>+	 */</div><div class='add'>+	if ((addr &gt;= part-&gt;mem.start) &amp;&amp;</div><div class='add'>+	    (addr &lt; part-&gt;mem.start + part-&gt;mem.size))</div><div class='add'>+		return addr - part-&gt;mem.start;</div><div class='add'>+	else if ((addr &gt;= part-&gt;reg.start) &amp;&amp;</div><div class='add'>+		 (addr &lt; part-&gt;reg.start + part-&gt;reg.size))</div><div class='add'>+		return addr - part-&gt;reg.start + part-&gt;mem.size;</div><div class='add'>+	else if ((addr &gt;= part-&gt;mem2.start) &amp;&amp;</div><div class='add'>+		 (addr &lt; part-&gt;mem2.start + part-&gt;mem2.size))</div><div class='add'>+		return addr - part-&gt;mem2.start + part-&gt;mem.size +</div><div class='add'>+			part-&gt;reg.size;</div><div class='add'>+	else if ((addr &gt;= part-&gt;mem3.start) &amp;&amp;</div><div class='add'>+		 (addr &lt; part-&gt;mem3.start + part-&gt;mem3.size))</div><div class='add'>+		return addr - part-&gt;mem3.start + part-&gt;mem.size +</div><div class='add'>+			part-&gt;reg.size + part-&gt;mem2.size;</div><div class='add'>+</div><div class='add'>+	WARN(1, "HW address 0x%x out of range", addr);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(wlcore_translate_addr);</div><div class='add'>+</div><div class='add'>+/* Set the partitions to access the chip addresses</div><div class='ctx'>  *</div><div class='ctx'>  * To simplify driver code, a fixed (virtual) memory map is defined for</div><div class='ctx'>  * register and memory addresses. Because in the chipset, in different stages</div><div class='hunk'>@@ -158,33 +122,43 @@ void wl1271_enable_interrupts(struct wl1271 *wl)</div><div class='ctx'>  *                                    |    |</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-int wl1271_set_partition(struct wl1271 *wl,</div><div class='del'>-			 struct wl1271_partition_set *p)</div><div class='add'>+void wlcore_set_partition(struct wl1271 *wl,</div><div class='add'>+			  const struct wlcore_partition_set *p)</div><div class='ctx'> {</div><div class='ctx'> 	/* copy partition info */</div><div class='del'>-	memcpy(&amp;wl-&gt;part, p, sizeof(*p));</div><div class='add'>+	memcpy(&amp;wl-&gt;curr_part, p, sizeof(*p));</div><div class='ctx'> </div><div class='del'>-	wl1271_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",</div><div class='add'>+	wl1271_debug(DEBUG_IO, "mem_start %08X mem_size %08X",</div><div class='ctx'> 		     p-&gt;mem.start, p-&gt;mem.size);</div><div class='del'>-	wl1271_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",</div><div class='add'>+	wl1271_debug(DEBUG_IO, "reg_start %08X reg_size %08X",</div><div class='ctx'> 		     p-&gt;reg.start, p-&gt;reg.size);</div><div class='del'>-	wl1271_debug(DEBUG_SPI, "mem2_start %08X mem2_size %08X",</div><div class='add'>+	wl1271_debug(DEBUG_IO, "mem2_start %08X mem2_size %08X",</div><div class='ctx'> 		     p-&gt;mem2.start, p-&gt;mem2.size);</div><div class='del'>-	wl1271_debug(DEBUG_SPI, "mem3_start %08X mem3_size %08X",</div><div class='add'>+	wl1271_debug(DEBUG_IO, "mem3_start %08X mem3_size %08X",</div><div class='ctx'> 		     p-&gt;mem3.start, p-&gt;mem3.size);</div><div class='ctx'> </div><div class='del'>-	/* write partition info to the chipset */</div><div class='ctx'> 	wl1271_raw_write32(wl, HW_PART0_START_ADDR, p-&gt;mem.start);</div><div class='ctx'> 	wl1271_raw_write32(wl, HW_PART0_SIZE_ADDR, p-&gt;mem.size);</div><div class='ctx'> 	wl1271_raw_write32(wl, HW_PART1_START_ADDR, p-&gt;reg.start);</div><div class='ctx'> 	wl1271_raw_write32(wl, HW_PART1_SIZE_ADDR, p-&gt;reg.size);</div><div class='ctx'> 	wl1271_raw_write32(wl, HW_PART2_START_ADDR, p-&gt;mem2.start);</div><div class='ctx'> 	wl1271_raw_write32(wl, HW_PART2_SIZE_ADDR, p-&gt;mem2.size);</div><div class='add'>+	/*</div><div class='add'>+	 * We don't need the size of the last partition, as it is</div><div class='add'>+	 * automatically calculated based on the total memory size and</div><div class='add'>+	 * the sizes of the previous partitions.</div><div class='add'>+	 */</div><div class='ctx'> 	wl1271_raw_write32(wl, HW_PART3_START_ADDR, p-&gt;mem3.start);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(wlcore_set_partition);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+void wlcore_select_partition(struct wl1271 *wl, u8 part)</div><div class='add'>+{</div><div class='add'>+	wl1271_debug(DEBUG_IO, "setting partition %d", part);</div><div class='add'>+</div><div class='add'>+	wlcore_set_partition(wl, &amp;wl-&gt;ptable[part]);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(wl1271_set_partition);</div><div class='add'>+EXPORT_SYMBOL_GPL(wlcore_select_partition);</div><div class='ctx'> </div><div class='ctx'> void wl1271_io_reset(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='hunk'>@@ -197,48 +171,3 @@ void wl1271_io_init(struct wl1271 *wl)</div><div class='ctx'> 	if (wl-&gt;if_ops-&gt;init)</div><div class='ctx'> 		wl-&gt;if_ops-&gt;init(wl-&gt;dev);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-void wl1271_top_reg_write(struct wl1271 *wl, int addr, u16 val)</div><div class='del'>-{</div><div class='del'>-	/* write address &gt;&gt; 1 + 0x30000 to OCP_POR_CTR */</div><div class='del'>-	addr = (addr &gt;&gt; 1) + 0x30000;</div><div class='del'>-	wl1271_write32(wl, OCP_POR_CTR, addr);</div><div class='del'>-</div><div class='del'>-	/* write value to OCP_POR_WDATA */</div><div class='del'>-	wl1271_write32(wl, OCP_DATA_WRITE, val);</div><div class='del'>-</div><div class='del'>-	/* write 1 to OCP_CMD */</div><div class='del'>-	wl1271_write32(wl, OCP_CMD, OCP_CMD_WRITE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u16 wl1271_top_reg_read(struct wl1271 *wl, int addr)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-	int timeout = OCP_CMD_LOOP;</div><div class='del'>-</div><div class='del'>-	/* write address &gt;&gt; 1 + 0x30000 to OCP_POR_CTR */</div><div class='del'>-	addr = (addr &gt;&gt; 1) + 0x30000;</div><div class='del'>-	wl1271_write32(wl, OCP_POR_CTR, addr);</div><div class='del'>-</div><div class='del'>-	/* write 2 to OCP_CMD */</div><div class='del'>-	wl1271_write32(wl, OCP_CMD, OCP_CMD_READ);</div><div class='del'>-</div><div class='del'>-	/* poll for data ready */</div><div class='del'>-	do {</div><div class='del'>-		val = wl1271_read32(wl, OCP_DATA_READ);</div><div class='del'>-	} while (!(val &amp; OCP_READY_MASK) &amp;&amp; --timeout);</div><div class='del'>-</div><div class='del'>-	if (!timeout) {</div><div class='del'>-		wl1271_warning("Top register access timed out.");</div><div class='del'>-		return 0xffff;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* check data status and return if OK */</div><div class='del'>-	if ((val &amp; OCP_STATUS_MASK) == OCP_STATUS_OK)</div><div class='del'>-		return val &amp; 0xffff;</div><div class='del'>-	else {</div><div class='del'>-		wl1271_warning("Top register access returned error.");</div><div class='del'>-		return 0xffff;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/io.h b/drivers/net/wireless/ti/wlcore/io.h<br/>index 4fb3dab8c3b2..8942954b56a0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/io.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/io.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/io.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/io.h</a></div><div class='hunk'>@@ -26,7 +26,6 @@</div><div class='ctx'> #define __IO_H__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/irqreturn.h&gt;</div><div class='del'>-#include "reg.h"</div><div class='ctx'> </div><div class='ctx'> #define HW_ACCESS_MEMORY_MAX_RANGE	0x1FFC0</div><div class='ctx'> </div><div class='hunk'>@@ -43,15 +42,14 @@</div><div class='ctx'> </div><div class='ctx'> #define HW_ACCESS_PRAM_MAX_RANGE	0x3c000</div><div class='ctx'> </div><div class='del'>-extern struct wl1271_partition_set wl12xx_part_table[PART_TABLE_LEN];</div><div class='del'>-</div><div class='ctx'> struct wl1271;</div><div class='ctx'> </div><div class='del'>-void wl1271_disable_interrupts(struct wl1271 *wl);</div><div class='del'>-void wl1271_enable_interrupts(struct wl1271 *wl);</div><div class='add'>+void wlcore_disable_interrupts(struct wl1271 *wl);</div><div class='add'>+void wlcore_enable_interrupts(struct wl1271 *wl);</div><div class='ctx'> </div><div class='ctx'> void wl1271_io_reset(struct wl1271 *wl);</div><div class='ctx'> void wl1271_io_init(struct wl1271 *wl);</div><div class='add'>+int wlcore_translate_addr(struct wl1271 *wl, int addr);</div><div class='ctx'> </div><div class='ctx'> /* Raw target IO, address is not translated */</div><div class='ctx'> static inline void wl1271_raw_write(struct wl1271 *wl, int addr, void *buf,</div><div class='hunk'>@@ -66,6 +64,18 @@ static inline void wl1271_raw_read(struct wl1271 *wl, int addr, void *buf,</div><div class='ctx'> 	wl-&gt;if_ops-&gt;read(wl-&gt;dev, addr, buf, len, fixed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void wlcore_raw_read_data(struct wl1271 *wl, int reg, void *buf,</div><div class='add'>+					size_t len, bool fixed)</div><div class='add'>+{</div><div class='add'>+	wl1271_raw_read(wl, wl-&gt;rtable[reg], buf, len, fixed);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void wlcore_raw_write_data(struct wl1271 *wl, int reg, void *buf,</div><div class='add'>+					 size_t len, bool fixed)</div><div class='add'>+{</div><div class='add'>+	wl1271_raw_write(wl, wl-&gt;rtable[reg], buf, len, fixed);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u32 wl1271_raw_read32(struct wl1271 *wl, int addr)</div><div class='ctx'> {</div><div class='ctx'> 	wl1271_raw_read(wl, addr, &amp;wl-&gt;buffer_32,</div><div class='hunk'>@@ -81,36 +91,12 @@ static inline void wl1271_raw_write32(struct wl1271 *wl, int addr, u32 val)</div><div class='ctx'> 			     sizeof(wl-&gt;buffer_32), false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Translated target IO */</div><div class='del'>-static inline int wl1271_translate_addr(struct wl1271 *wl, int addr)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * To translate, first check to which window of addresses the</div><div class='del'>-	 * particular address belongs. Then subtract the starting address</div><div class='del'>-	 * of that window from the address. Then, add offset of the</div><div class='del'>-	 * translated region.</div><div class='del'>-	 *</div><div class='del'>-	 * The translated regions occur next to each other in physical device</div><div class='del'>-	 * memory, so just add the sizes of the preceding address regions to</div><div class='del'>-	 * get the offset to the new region.</div><div class='del'>-	 *</div><div class='del'>-	 * Currently, only the two first regions are addressed, and the</div><div class='del'>-	 * assumption is that all addresses will fall into either of those</div><div class='del'>-	 * two.</div><div class='del'>-	 */</div><div class='del'>-	if ((addr &gt;= wl-&gt;part.reg.start) &amp;&amp;</div><div class='del'>-	    (addr &lt; wl-&gt;part.reg.start + wl-&gt;part.reg.size))</div><div class='del'>-		return addr - wl-&gt;part.reg.start + wl-&gt;part.mem.size;</div><div class='del'>-	else</div><div class='del'>-		return addr - wl-&gt;part.mem.start;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void wl1271_read(struct wl1271 *wl, int addr, void *buf,</div><div class='ctx'> 			       size_t len, bool fixed)</div><div class='ctx'> {</div><div class='ctx'> 	int physical;</div><div class='ctx'> </div><div class='del'>-	physical = wl1271_translate_addr(wl, addr);</div><div class='add'>+	physical = wlcore_translate_addr(wl, addr);</div><div class='ctx'> </div><div class='ctx'> 	wl1271_raw_read(wl, physical, buf, len, fixed);</div><div class='ctx'> }</div><div class='hunk'>@@ -120,11 +106,23 @@ static inline void wl1271_write(struct wl1271 *wl, int addr, void *buf,</div><div class='ctx'> {</div><div class='ctx'> 	int physical;</div><div class='ctx'> </div><div class='del'>-	physical = wl1271_translate_addr(wl, addr);</div><div class='add'>+	physical = wlcore_translate_addr(wl, addr);</div><div class='ctx'> </div><div class='ctx'> 	wl1271_raw_write(wl, physical, buf, len, fixed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void wlcore_write_data(struct wl1271 *wl, int reg, void *buf,</div><div class='add'>+				     size_t len, bool fixed)</div><div class='add'>+{</div><div class='add'>+	wl1271_write(wl, wl-&gt;rtable[reg], buf, len, fixed);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void wlcore_read_data(struct wl1271 *wl, int reg, void *buf,</div><div class='add'>+				    size_t len, bool fixed)</div><div class='add'>+{</div><div class='add'>+	wl1271_read(wl, wl-&gt;rtable[reg], buf, len, fixed);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void wl1271_read_hwaddr(struct wl1271 *wl, int hwaddr,</div><div class='ctx'> 				      void *buf, size_t len, bool fixed)</div><div class='ctx'> {</div><div class='hunk'>@@ -134,19 +132,30 @@ static inline void wl1271_read_hwaddr(struct wl1271 *wl, int hwaddr,</div><div class='ctx'> 	/* Addresses are stored internally as addresses to 32 bytes blocks */</div><div class='ctx'> 	addr = hwaddr &lt;&lt; 5;</div><div class='ctx'> </div><div class='del'>-	physical = wl1271_translate_addr(wl, addr);</div><div class='add'>+	physical = wlcore_translate_addr(wl, addr);</div><div class='ctx'> </div><div class='ctx'> 	wl1271_raw_read(wl, physical, buf, len, fixed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u32 wl1271_read32(struct wl1271 *wl, int addr)</div><div class='ctx'> {</div><div class='del'>-	return wl1271_raw_read32(wl, wl1271_translate_addr(wl, addr));</div><div class='add'>+	return wl1271_raw_read32(wl, wlcore_translate_addr(wl, addr));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void wl1271_write32(struct wl1271 *wl, int addr, u32 val)</div><div class='ctx'> {</div><div class='del'>-	wl1271_raw_write32(wl, wl1271_translate_addr(wl, addr), val);</div><div class='add'>+	wl1271_raw_write32(wl, wlcore_translate_addr(wl, addr), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 wlcore_read_reg(struct wl1271 *wl, int reg)</div><div class='add'>+{</div><div class='add'>+	return wl1271_raw_read32(wl,</div><div class='add'>+				 wlcore_translate_addr(wl, wl-&gt;rtable[reg]));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void wlcore_write_reg(struct wl1271 *wl, int reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	wl1271_raw_write32(wl, wlcore_translate_addr(wl, wl-&gt;rtable[reg]), val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void wl1271_power_off(struct wl1271 *wl)</div><div class='hunk'>@@ -164,13 +173,8 @@ static inline int wl1271_power_on(struct wl1271 *wl)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* Top Register IO */</div><div class='del'>-void wl1271_top_reg_write(struct wl1271 *wl, int addr, u16 val);</div><div class='del'>-u16 wl1271_top_reg_read(struct wl1271 *wl, int addr);</div><div class='del'>-</div><div class='del'>-int wl1271_set_partition(struct wl1271 *wl,</div><div class='del'>-			 struct wl1271_partition_set *p);</div><div class='add'>+void wlcore_set_partition(struct wl1271 *wl,</div><div class='add'>+			  const struct wlcore_partition_set *p);</div><div class='ctx'> </div><div class='ctx'> bool wl1271_set_block_size(struct wl1271 *wl);</div><div class='ctx'> </div><div class='hunk'>@@ -178,4 +182,6 @@ bool wl1271_set_block_size(struct wl1271 *wl);</div><div class='ctx'> </div><div class='ctx'> int wl1271_tx_dummy_packet(struct wl1271 *wl);</div><div class='ctx'> </div><div class='add'>+void wlcore_select_partition(struct wl1271 *wl, u8 part);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/main.c b/drivers/net/wireless/ti/wlcore/main.c<br/>index 39002363611e..acef93390d3d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/main.c</a></div><div class='hunk'>@@ -35,10 +35,9 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "wl12xx_80211.h"</div><div class='del'>-#include "reg.h"</div><div class='ctx'> #include "io.h"</div><div class='ctx'> #include "event.h"</div><div class='ctx'> #include "tx.h"</div><div class='hunk'>@@ -50,342 +49,15 @@</div><div class='ctx'> #include "boot.h"</div><div class='ctx'> #include "testmode.h"</div><div class='ctx'> #include "scan.h"</div><div class='add'>+#include "hw_ops.h"</div><div class='ctx'> </div><div class='ctx'> #define WL1271_BOOT_RETRIES 3</div><div class='ctx'> </div><div class='del'>-static struct conf_drv_settings default_conf = {</div><div class='del'>-	.sg = {</div><div class='del'>-		.params = {</div><div class='del'>-			[CONF_SG_ACL_BT_MASTER_MIN_BR] = 10,</div><div class='del'>-			[CONF_SG_ACL_BT_MASTER_MAX_BR] = 180,</div><div class='del'>-			[CONF_SG_ACL_BT_SLAVE_MIN_BR] = 10,</div><div class='del'>-			[CONF_SG_ACL_BT_SLAVE_MAX_BR] = 180,</div><div class='del'>-			[CONF_SG_ACL_BT_MASTER_MIN_EDR] = 10,</div><div class='del'>-			[CONF_SG_ACL_BT_MASTER_MAX_EDR] = 80,</div><div class='del'>-			[CONF_SG_ACL_BT_SLAVE_MIN_EDR] = 10,</div><div class='del'>-			[CONF_SG_ACL_BT_SLAVE_MAX_EDR] = 80,</div><div class='del'>-			[CONF_SG_ACL_WLAN_PS_MASTER_BR] = 8,</div><div class='del'>-			[CONF_SG_ACL_WLAN_PS_SLAVE_BR] = 8,</div><div class='del'>-			[CONF_SG_ACL_WLAN_PS_MASTER_EDR] = 20,</div><div class='del'>-			[CONF_SG_ACL_WLAN_PS_SLAVE_EDR] = 20,</div><div class='del'>-			[CONF_SG_ACL_WLAN_ACTIVE_MASTER_MIN_BR] = 20,</div><div class='del'>-			[CONF_SG_ACL_WLAN_ACTIVE_MASTER_MAX_BR] = 35,</div><div class='del'>-			[CONF_SG_ACL_WLAN_ACTIVE_SLAVE_MIN_BR] = 16,</div><div class='del'>-			[CONF_SG_ACL_WLAN_ACTIVE_SLAVE_MAX_BR] = 35,</div><div class='del'>-			[CONF_SG_ACL_WLAN_ACTIVE_MASTER_MIN_EDR] = 32,</div><div class='del'>-			[CONF_SG_ACL_WLAN_ACTIVE_MASTER_MAX_EDR] = 50,</div><div class='del'>-			[CONF_SG_ACL_WLAN_ACTIVE_SLAVE_MIN_EDR] = 28,</div><div class='del'>-			[CONF_SG_ACL_WLAN_ACTIVE_SLAVE_MAX_EDR] = 50,</div><div class='del'>-			[CONF_SG_ACL_ACTIVE_SCAN_WLAN_BR] = 10,</div><div class='del'>-			[CONF_SG_ACL_ACTIVE_SCAN_WLAN_EDR] = 20,</div><div class='del'>-			[CONF_SG_ACL_PASSIVE_SCAN_BT_BR] = 75,</div><div class='del'>-			[CONF_SG_ACL_PASSIVE_SCAN_WLAN_BR] = 15,</div><div class='del'>-			[CONF_SG_ACL_PASSIVE_SCAN_BT_EDR] = 27,</div><div class='del'>-			[CONF_SG_ACL_PASSIVE_SCAN_WLAN_EDR] = 17,</div><div class='del'>-			/* active scan params */</div><div class='del'>-			[CONF_SG_AUTO_SCAN_PROBE_REQ] = 170,</div><div class='del'>-			[CONF_SG_ACTIVE_SCAN_DURATION_FACTOR_HV3] = 50,</div><div class='del'>-			[CONF_SG_ACTIVE_SCAN_DURATION_FACTOR_A2DP] = 100,</div><div class='del'>-			/* passive scan params */</div><div class='del'>-			[CONF_SG_PASSIVE_SCAN_DURATION_FACTOR_A2DP_BR] = 800,</div><div class='del'>-			[CONF_SG_PASSIVE_SCAN_DURATION_FACTOR_A2DP_EDR] = 200,</div><div class='del'>-			[CONF_SG_PASSIVE_SCAN_DURATION_FACTOR_HV3] = 200,</div><div class='del'>-			/* passive scan in dual antenna params */</div><div class='del'>-			[CONF_SG_CONSECUTIVE_HV3_IN_PASSIVE_SCAN] = 0,</div><div class='del'>-			[CONF_SG_BCN_HV3_COLLISION_THRESH_IN_PASSIVE_SCAN] = 0,</div><div class='del'>-			[CONF_SG_TX_RX_PROTECTION_BWIDTH_IN_PASSIVE_SCAN] = 0,</div><div class='del'>-			/* general params */</div><div class='del'>-			[CONF_SG_STA_FORCE_PS_IN_BT_SCO] = 1,</div><div class='del'>-			[CONF_SG_ANTENNA_CONFIGURATION] = 0,</div><div class='del'>-			[CONF_SG_BEACON_MISS_PERCENT] = 60,</div><div class='del'>-			[CONF_SG_DHCP_TIME] = 5000,</div><div class='del'>-			[CONF_SG_RXT] = 1200,</div><div class='del'>-			[CONF_SG_TXT] = 1000,</div><div class='del'>-			[CONF_SG_ADAPTIVE_RXT_TXT] = 1,</div><div class='del'>-			[CONF_SG_GENERAL_USAGE_BIT_MAP] = 3,</div><div class='del'>-			[CONF_SG_HV3_MAX_SERVED] = 6,</div><div class='del'>-			[CONF_SG_PS_POLL_TIMEOUT] = 10,</div><div class='del'>-			[CONF_SG_UPSD_TIMEOUT] = 10,</div><div class='del'>-			[CONF_SG_CONSECUTIVE_CTS_THRESHOLD] = 2,</div><div class='del'>-			[CONF_SG_STA_RX_WINDOW_AFTER_DTIM] = 5,</div><div class='del'>-			[CONF_SG_STA_CONNECTION_PROTECTION_TIME] = 30,</div><div class='del'>-			/* AP params */</div><div class='del'>-			[CONF_AP_BEACON_MISS_TX] = 3,</div><div class='del'>-			[CONF_AP_RX_WINDOW_AFTER_BEACON] = 10,</div><div class='del'>-			[CONF_AP_BEACON_WINDOW_INTERVAL] = 2,</div><div class='del'>-			[CONF_AP_CONNECTION_PROTECTION_TIME] = 0,</div><div class='del'>-			[CONF_AP_BT_ACL_VAL_BT_SERVE_TIME] = 25,</div><div class='del'>-			[CONF_AP_BT_ACL_VAL_WL_SERVE_TIME] = 25,</div><div class='del'>-			/* CTS Diluting params */</div><div class='del'>-			[CONF_SG_CTS_DILUTED_BAD_RX_PACKETS_TH] = 0,</div><div class='del'>-			[CONF_SG_CTS_CHOP_IN_DUAL_ANT_SCO_MASTER] = 0,</div><div class='del'>-		},</div><div class='del'>-		.state = CONF_SG_PROTECTIVE,</div><div class='del'>-	},</div><div class='del'>-	.rx = {</div><div class='del'>-		.rx_msdu_life_time           = 512000,</div><div class='del'>-		.packet_detection_threshold  = 0,</div><div class='del'>-		.ps_poll_timeout             = 15,</div><div class='del'>-		.upsd_timeout                = 15,</div><div class='del'>-		.rts_threshold               = IEEE80211_MAX_RTS_THRESHOLD,</div><div class='del'>-		.rx_cca_threshold            = 0,</div><div class='del'>-		.irq_blk_threshold           = 0xFFFF,</div><div class='del'>-		.irq_pkt_threshold           = 0,</div><div class='del'>-		.irq_timeout                 = 600,</div><div class='del'>-		.queue_type                  = CONF_RX_QUEUE_TYPE_LOW_PRIORITY,</div><div class='del'>-	},</div><div class='del'>-	.tx = {</div><div class='del'>-		.tx_energy_detection         = 0,</div><div class='del'>-		.sta_rc_conf                 = {</div><div class='del'>-			.enabled_rates       = 0,</div><div class='del'>-			.short_retry_limit   = 10,</div><div class='del'>-			.long_retry_limit    = 10,</div><div class='del'>-			.aflags              = 0,</div><div class='del'>-		},</div><div class='del'>-		.ac_conf_count               = 4,</div><div class='del'>-		.ac_conf                     = {</div><div class='del'>-			[CONF_TX_AC_BE] = {</div><div class='del'>-				.ac          = CONF_TX_AC_BE,</div><div class='del'>-				.cw_min      = 15,</div><div class='del'>-				.cw_max      = 63,</div><div class='del'>-				.aifsn       = 3,</div><div class='del'>-				.tx_op_limit = 0,</div><div class='del'>-			},</div><div class='del'>-			[CONF_TX_AC_BK] = {</div><div class='del'>-				.ac          = CONF_TX_AC_BK,</div><div class='del'>-				.cw_min      = 15,</div><div class='del'>-				.cw_max      = 63,</div><div class='del'>-				.aifsn       = 7,</div><div class='del'>-				.tx_op_limit = 0,</div><div class='del'>-			},</div><div class='del'>-			[CONF_TX_AC_VI] = {</div><div class='del'>-				.ac          = CONF_TX_AC_VI,</div><div class='del'>-				.cw_min      = 15,</div><div class='del'>-				.cw_max      = 63,</div><div class='del'>-				.aifsn       = CONF_TX_AIFS_PIFS,</div><div class='del'>-				.tx_op_limit = 3008,</div><div class='del'>-			},</div><div class='del'>-			[CONF_TX_AC_VO] = {</div><div class='del'>-				.ac          = CONF_TX_AC_VO,</div><div class='del'>-				.cw_min      = 15,</div><div class='del'>-				.cw_max      = 63,</div><div class='del'>-				.aifsn       = CONF_TX_AIFS_PIFS,</div><div class='del'>-				.tx_op_limit = 1504,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-		.max_tx_retries = 100,</div><div class='del'>-		.ap_aging_period = 300,</div><div class='del'>-		.tid_conf_count = 4,</div><div class='del'>-		.tid_conf = {</div><div class='del'>-			[CONF_TX_AC_BE] = {</div><div class='del'>-				.queue_id    = CONF_TX_AC_BE,</div><div class='del'>-				.channel_type = CONF_CHANNEL_TYPE_EDCF,</div><div class='del'>-				.tsid        = CONF_TX_AC_BE,</div><div class='del'>-				.ps_scheme   = CONF_PS_SCHEME_LEGACY,</div><div class='del'>-				.ack_policy  = CONF_ACK_POLICY_LEGACY,</div><div class='del'>-				.apsd_conf   = {0, 0},</div><div class='del'>-			},</div><div class='del'>-			[CONF_TX_AC_BK] = {</div><div class='del'>-				.queue_id    = CONF_TX_AC_BK,</div><div class='del'>-				.channel_type = CONF_CHANNEL_TYPE_EDCF,</div><div class='del'>-				.tsid        = CONF_TX_AC_BK,</div><div class='del'>-				.ps_scheme   = CONF_PS_SCHEME_LEGACY,</div><div class='del'>-				.ack_policy  = CONF_ACK_POLICY_LEGACY,</div><div class='del'>-				.apsd_conf   = {0, 0},</div><div class='del'>-			},</div><div class='del'>-			[CONF_TX_AC_VI] = {</div><div class='del'>-				.queue_id    = CONF_TX_AC_VI,</div><div class='del'>-				.channel_type = CONF_CHANNEL_TYPE_EDCF,</div><div class='del'>-				.tsid        = CONF_TX_AC_VI,</div><div class='del'>-				.ps_scheme   = CONF_PS_SCHEME_LEGACY,</div><div class='del'>-				.ack_policy  = CONF_ACK_POLICY_LEGACY,</div><div class='del'>-				.apsd_conf   = {0, 0},</div><div class='del'>-			},</div><div class='del'>-			[CONF_TX_AC_VO] = {</div><div class='del'>-				.queue_id    = CONF_TX_AC_VO,</div><div class='del'>-				.channel_type = CONF_CHANNEL_TYPE_EDCF,</div><div class='del'>-				.tsid        = CONF_TX_AC_VO,</div><div class='del'>-				.ps_scheme   = CONF_PS_SCHEME_LEGACY,</div><div class='del'>-				.ack_policy  = CONF_ACK_POLICY_LEGACY,</div><div class='del'>-				.apsd_conf   = {0, 0},</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-		.frag_threshold              = IEEE80211_MAX_FRAG_THRESHOLD,</div><div class='del'>-		.tx_compl_timeout            = 700,</div><div class='del'>-		.tx_compl_threshold          = 4,</div><div class='del'>-		.basic_rate                  = CONF_HW_BIT_RATE_1MBPS,</div><div class='del'>-		.basic_rate_5                = CONF_HW_BIT_RATE_6MBPS,</div><div class='del'>-		.tmpl_short_retry_limit      = 10,</div><div class='del'>-		.tmpl_long_retry_limit       = 10,</div><div class='del'>-		.tx_watchdog_timeout         = 5000,</div><div class='del'>-	},</div><div class='del'>-	.conn = {</div><div class='del'>-		.wake_up_event               = CONF_WAKE_UP_EVENT_DTIM,</div><div class='del'>-		.listen_interval             = 1,</div><div class='del'>-		.suspend_wake_up_event       = CONF_WAKE_UP_EVENT_N_DTIM,</div><div class='del'>-		.suspend_listen_interval     = 3,</div><div class='del'>-		.bcn_filt_mode               = CONF_BCN_FILT_MODE_ENABLED,</div><div class='del'>-		.bcn_filt_ie_count           = 2,</div><div class='del'>-		.bcn_filt_ie = {</div><div class='del'>-			[0] = {</div><div class='del'>-				.ie          = WLAN_EID_CHANNEL_SWITCH,</div><div class='del'>-				.rule        = CONF_BCN_RULE_PASS_ON_APPEARANCE,</div><div class='del'>-			},</div><div class='del'>-			[1] = {</div><div class='del'>-				.ie          = WLAN_EID_HT_INFORMATION,</div><div class='del'>-				.rule        = CONF_BCN_RULE_PASS_ON_CHANGE,</div><div class='del'>-			},</div><div class='del'>-		},</div><div class='del'>-		.synch_fail_thold            = 10,</div><div class='del'>-		.bss_lose_timeout            = 100,</div><div class='del'>-		.beacon_rx_timeout           = 10000,</div><div class='del'>-		.broadcast_timeout           = 20000,</div><div class='del'>-		.rx_broadcast_in_ps          = 1,</div><div class='del'>-		.ps_poll_threshold           = 10,</div><div class='del'>-		.bet_enable                  = CONF_BET_MODE_ENABLE,</div><div class='del'>-		.bet_max_consecutive         = 50,</div><div class='del'>-		.psm_entry_retries           = 8,</div><div class='del'>-		.psm_exit_retries            = 16,</div><div class='del'>-		.psm_entry_nullfunc_retries  = 3,</div><div class='del'>-		.dynamic_ps_timeout          = 200,</div><div class='del'>-		.forced_ps                   = false,</div><div class='del'>-		.keep_alive_interval         = 55000,</div><div class='del'>-		.max_listen_interval         = 20,</div><div class='del'>-	},</div><div class='del'>-	.itrim = {</div><div class='del'>-		.enable = false,</div><div class='del'>-		.timeout = 50000,</div><div class='del'>-	},</div><div class='del'>-	.pm_config = {</div><div class='del'>-		.host_clk_settling_time = 5000,</div><div class='del'>-		.host_fast_wakeup_support = false</div><div class='del'>-	},</div><div class='del'>-	.roam_trigger = {</div><div class='del'>-		.trigger_pacing               = 1,</div><div class='del'>-		.avg_weight_rssi_beacon       = 20,</div><div class='del'>-		.avg_weight_rssi_data         = 10,</div><div class='del'>-		.avg_weight_snr_beacon        = 20,</div><div class='del'>-		.avg_weight_snr_data          = 10,</div><div class='del'>-	},</div><div class='del'>-	.scan = {</div><div class='del'>-		.min_dwell_time_active        = 7500,</div><div class='del'>-		.max_dwell_time_active        = 30000,</div><div class='del'>-		.min_dwell_time_passive       = 100000,</div><div class='del'>-		.max_dwell_time_passive       = 100000,</div><div class='del'>-		.num_probe_reqs               = 2,</div><div class='del'>-		.split_scan_timeout           = 50000,</div><div class='del'>-	},</div><div class='del'>-	.sched_scan = {</div><div class='del'>-		/* sched_scan requires dwell times in TU instead of TU/1000 */</div><div class='del'>-		.min_dwell_time_active = 30,</div><div class='del'>-		.max_dwell_time_active = 60,</div><div class='del'>-		.dwell_time_passive    = 100,</div><div class='del'>-		.dwell_time_dfs        = 150,</div><div class='del'>-		.num_probe_reqs        = 2,</div><div class='del'>-		.rssi_threshold        = -90,</div><div class='del'>-		.snr_threshold         = 0,</div><div class='del'>-	},</div><div class='del'>-	.rf = {</div><div class='del'>-		.tx_per_channel_power_compensation_2 = {</div><div class='del'>-			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='del'>-		},</div><div class='del'>-		.tx_per_channel_power_compensation_5 = {</div><div class='del'>-			0x00, 0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='del'>-			0x00, 0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='del'>-			0x00, 0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.ht = {</div><div class='del'>-		.rx_ba_win_size = 8,</div><div class='del'>-		.tx_ba_win_size = 64,</div><div class='del'>-		.inactivity_timeout = 10000,</div><div class='del'>-		.tx_ba_tid_bitmap = CONF_TX_BA_ENABLED_TID_BITMAP,</div><div class='del'>-	},</div><div class='del'>-	.mem_wl127x = {</div><div class='del'>-		.num_stations                 = 1,</div><div class='del'>-		.ssid_profiles                = 1,</div><div class='del'>-		.rx_block_num                 = 70,</div><div class='del'>-		.tx_min_block_num             = 40,</div><div class='del'>-		.dynamic_memory               = 1,</div><div class='del'>-		.min_req_tx_blocks            = 100,</div><div class='del'>-		.min_req_rx_blocks            = 22,</div><div class='del'>-		.tx_min                       = 27,</div><div class='del'>-	},</div><div class='del'>-	.mem_wl128x = {</div><div class='del'>-		.num_stations                 = 1,</div><div class='del'>-		.ssid_profiles                = 1,</div><div class='del'>-		.rx_block_num                 = 40,</div><div class='del'>-		.tx_min_block_num             = 40,</div><div class='del'>-		.dynamic_memory               = 1,</div><div class='del'>-		.min_req_tx_blocks            = 45,</div><div class='del'>-		.min_req_rx_blocks            = 22,</div><div class='del'>-		.tx_min                       = 27,</div><div class='del'>-	},</div><div class='del'>-	.fm_coex = {</div><div class='del'>-		.enable                       = true,</div><div class='del'>-		.swallow_period               = 5,</div><div class='del'>-		.n_divider_fref_set_1         = 0xff,       /* default */</div><div class='del'>-		.n_divider_fref_set_2         = 12,</div><div class='del'>-		.m_divider_fref_set_1         = 148,</div><div class='del'>-		.m_divider_fref_set_2         = 0xffff,     /* default */</div><div class='del'>-		.coex_pll_stabilization_time  = 0xffffffff, /* default */</div><div class='del'>-		.ldo_stabilization_time       = 0xffff,     /* default */</div><div class='del'>-		.fm_disturbed_band_margin     = 0xff,       /* default */</div><div class='del'>-		.swallow_clk_diff             = 0xff,       /* default */</div><div class='del'>-	},</div><div class='del'>-	.rx_streaming = {</div><div class='del'>-		.duration                      = 150,</div><div class='del'>-		.queues                        = 0x1,</div><div class='del'>-		.interval                      = 20,</div><div class='del'>-		.always                        = 0,</div><div class='del'>-	},</div><div class='del'>-	.fwlog = {</div><div class='del'>-		.mode                         = WL12XX_FWLOG_ON_DEMAND,</div><div class='del'>-		.mem_blocks                   = 2,</div><div class='del'>-		.severity                     = 0,</div><div class='del'>-		.timestamp                    = WL12XX_FWLOG_TIMESTAMP_DISABLED,</div><div class='del'>-		.output                       = WL12XX_FWLOG_OUTPUT_HOST,</div><div class='del'>-		.threshold                    = 0,</div><div class='del'>-	},</div><div class='del'>-	.hci_io_ds = HCI_IO_DS_6MA,</div><div class='del'>-	.rate = {</div><div class='del'>-		.rate_retry_score = 32000,</div><div class='del'>-		.per_add = 8192,</div><div class='del'>-		.per_th1 = 2048,</div><div class='del'>-		.per_th2 = 4096,</div><div class='del'>-		.max_per = 8100,</div><div class='del'>-		.inverse_curiosity_factor = 5,</div><div class='del'>-		.tx_fail_low_th = 4,</div><div class='del'>-		.tx_fail_high_th = 10,</div><div class='del'>-		.per_alpha_shift = 4,</div><div class='del'>-		.per_add_shift = 13,</div><div class='del'>-		.per_beta1_shift = 10,</div><div class='del'>-		.per_beta2_shift = 8,</div><div class='del'>-		.rate_check_up = 2,</div><div class='del'>-		.rate_check_down = 12,</div><div class='del'>-		.rate_retry_policy = {</div><div class='del'>-			0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='del'>-			0x00, 0x00, 0x00, 0x00, 0x00,</div><div class='del'>-			0x00, 0x00, 0x00,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	.hangover = {</div><div class='del'>-		.recover_time               = 0,</div><div class='del'>-		.hangover_period            = 20,</div><div class='del'>-		.dynamic_mode               = 1,</div><div class='del'>-		.early_termination_mode     = 1,</div><div class='del'>-		.max_period                 = 20,</div><div class='del'>-		.min_period                 = 1,</div><div class='del'>-		.increase_delta             = 1,</div><div class='del'>-		.decrease_delta             = 2,</div><div class='del'>-		.quiet_time                 = 4,</div><div class='del'>-		.increase_time              = 1,</div><div class='del'>-		.window_size                = 16,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='add'>+#define WL1271_BOOT_RETRIES 3</div><div class='ctx'> </div><div class='ctx'> static char *fwlog_param;</div><div class='ctx'> static bool bug_on_recovery;</div><div class='add'>+static bool no_recovery;</div><div class='ctx'> </div><div class='ctx'> static void __wl1271_op_remove_interface(struct wl1271 *wl,</div><div class='ctx'> 					 struct ieee80211_vif *vif,</div><div class='hunk'>@@ -628,22 +300,8 @@ out:</div><div class='ctx'> 	mutex_unlock(&amp;wl-&gt;mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void wl1271_conf_init(struct wl1271 *wl)</div><div class='add'>+static void wlcore_adjust_conf(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * This function applies the default configuration to the driver. This</div><div class='del'>-	 * function is invoked upon driver load (spi probe.)</div><div class='del'>-	 *</div><div class='del'>-	 * The configuration is stored in a run-time structure in order to</div><div class='del'>-	 * facilitate for run-time adjustment of any of the parameters. Making</div><div class='del'>-	 * changes to the configuration structure will apply the new values on</div><div class='del'>-	 * the next interface up (wl1271_op_start.)</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/* apply driver default configuration */</div><div class='del'>-	memcpy(&amp;wl-&gt;conf, &amp;default_conf, sizeof(default_conf));</div><div class='del'>-</div><div class='ctx'> 	/* Adjust settings according to optional module parameters */</div><div class='ctx'> 	if (fwlog_param) {</div><div class='ctx'> 		if (!strcmp(fwlog_param, "continuous")) {</div><div class='hunk'>@@ -666,28 +324,7 @@ static int wl1271_plt_init(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (wl-&gt;chip.id == CHIP_ID_1283_PG20)</div><div class='del'>-		ret = wl128x_cmd_general_parms(wl);</div><div class='del'>-	else</div><div class='del'>-		ret = wl1271_cmd_general_parms(wl);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (wl-&gt;chip.id == CHIP_ID_1283_PG20)</div><div class='del'>-		ret = wl128x_cmd_radio_parms(wl);</div><div class='del'>-	else</div><div class='del'>-		ret = wl1271_cmd_radio_parms(wl);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (wl-&gt;chip.id != CHIP_ID_1283_PG20) {</div><div class='del'>-		ret = wl1271_cmd_ext_radio_parms(wl);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Chip-specific initializations */</div><div class='del'>-	ret = wl1271_chip_specific_init(wl);</div><div class='add'>+	ret = wl-&gt;ops-&gt;hw_init(wl);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -750,7 +387,7 @@ static void wl12xx_irq_ps_regulate_link(struct wl1271 *wl,</div><div class='ctx'> </div><div class='ctx'> static void wl12xx_irq_update_links_status(struct wl1271 *wl,</div><div class='ctx'> 					   struct wl12xx_vif *wlvif,</div><div class='del'>-					   struct wl12xx_fw_status *status)</div><div class='add'>+					   struct wl_fw_status *status)</div><div class='ctx'> {</div><div class='ctx'> 	struct wl1271_link *lnk;</div><div class='ctx'> 	u32 cur_fw_ps_map;</div><div class='hunk'>@@ -770,9 +407,10 @@ static void wl12xx_irq_update_links_status(struct wl1271 *wl,</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(hlid, wlvif-&gt;ap.sta_hlid_map, WL12XX_MAX_LINKS) {</div><div class='ctx'> 		lnk = &amp;wl-&gt;links[hlid];</div><div class='del'>-		cnt = status-&gt;tx_lnk_free_pkts[hlid] - lnk-&gt;prev_freed_pkts;</div><div class='add'>+		cnt = status-&gt;counters.tx_lnk_free_pkts[hlid] -</div><div class='add'>+			lnk-&gt;prev_freed_pkts;</div><div class='ctx'> </div><div class='del'>-		lnk-&gt;prev_freed_pkts = status-&gt;tx_lnk_free_pkts[hlid];</div><div class='add'>+		lnk-&gt;prev_freed_pkts = status-&gt;counters.tx_lnk_free_pkts[hlid];</div><div class='ctx'> 		lnk-&gt;allocated_pkts -= cnt;</div><div class='ctx'> </div><div class='ctx'> 		wl12xx_irq_ps_regulate_link(wl, wlvif, hlid,</div><div class='hunk'>@@ -781,15 +419,19 @@ static void wl12xx_irq_update_links_status(struct wl1271 *wl,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void wl12xx_fw_status(struct wl1271 *wl,</div><div class='del'>-			     struct wl12xx_fw_status *status)</div><div class='add'>+			     struct wl_fw_status *status)</div><div class='ctx'> {</div><div class='ctx'> 	struct wl12xx_vif *wlvif;</div><div class='ctx'> 	struct timespec ts;</div><div class='ctx'> 	u32 old_tx_blk_count = wl-&gt;tx_blocks_available;</div><div class='ctx'> 	int avail, freed_blocks;</div><div class='ctx'> 	int i;</div><div class='add'>+	size_t status_len;</div><div class='add'>+</div><div class='add'>+	status_len = sizeof(*status) + wl-&gt;fw_status_priv_len;</div><div class='ctx'> </div><div class='del'>-	wl1271_raw_read(wl, FW_STATUS_ADDR, status, sizeof(*status), false);</div><div class='add'>+	wlcore_raw_read_data(wl, REG_RAW_FW_STATUS_ADDR, status,</div><div class='add'>+			     status_len, false);</div><div class='ctx'> </div><div class='ctx'> 	wl1271_debug(DEBUG_IRQ, "intr: 0x%x (fw_rx_counter = %d, "</div><div class='ctx'> 		     "drv_rx_counter = %d, tx_results_counter = %d)",</div><div class='hunk'>@@ -801,10 +443,10 @@ static void wl12xx_fw_status(struct wl1271 *wl,</div><div class='ctx'> 	for (i = 0; i &lt; NUM_TX_QUEUES; i++) {</div><div class='ctx'> 		/* prevent wrap-around in freed-packets counter */</div><div class='ctx'> 		wl-&gt;tx_allocated_pkts[i] -=</div><div class='del'>-				(status-&gt;tx_released_pkts[i] -</div><div class='add'>+				(status-&gt;counters.tx_released_pkts[i] -</div><div class='ctx'> 				wl-&gt;tx_pkts_freed[i]) &amp; 0xff;</div><div class='ctx'> </div><div class='del'>-		wl-&gt;tx_pkts_freed[i] = status-&gt;tx_released_pkts[i];</div><div class='add'>+		wl-&gt;tx_pkts_freed[i] = status-&gt;counters.tx_released_pkts[i];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* prevent wrap-around in total blocks counter */</div><div class='hunk'>@@ -927,6 +569,9 @@ static irqreturn_t wl1271_irq(int irq, void *cookie)</div><div class='ctx'> 		smp_mb__after_clear_bit();</div><div class='ctx'> </div><div class='ctx'> 		wl12xx_fw_status(wl, wl-&gt;fw_status);</div><div class='add'>+</div><div class='add'>+		wlcore_hw_tx_immediate_compl(wl);</div><div class='add'>+</div><div class='ctx'> 		intr = le32_to_cpu(wl-&gt;fw_status-&gt;intr);</div><div class='ctx'> 		intr &amp;= WL1271_INTR_MASK;</div><div class='ctx'> 		if (!intr) {</div><div class='hunk'>@@ -963,9 +608,7 @@ static irqreturn_t wl1271_irq(int irq, void *cookie)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* check for tx results */</div><div class='del'>-			if (wl-&gt;fw_status-&gt;tx_results_counter !=</div><div class='del'>-			    (wl-&gt;tx_results_count &amp; 0xff))</div><div class='del'>-				wl1271_tx_complete(wl);</div><div class='add'>+			wlcore_hw_tx_delayed_compl(wl);</div><div class='ctx'> </div><div class='ctx'> 			/* Make sure the deferred queues don't get too long */</div><div class='ctx'> 			defer_count = skb_queue_len(&amp;wl-&gt;deferred_tx_queue) +</div><div class='hunk'>@@ -1046,10 +689,7 @@ static int wl12xx_fetch_firmware(struct wl1271 *wl, bool plt)</div><div class='ctx'> </div><div class='ctx'> 	if (plt) {</div><div class='ctx'> 		fw_type = WL12XX_FW_TYPE_PLT;</div><div class='del'>-		if (wl-&gt;chip.id == CHIP_ID_1283_PG20)</div><div class='del'>-			fw_name = WL128X_PLT_FW_NAME;</div><div class='del'>-		else</div><div class='del'>-			fw_name	= WL127X_PLT_FW_NAME;</div><div class='add'>+		fw_name = wl-&gt;plt_fw_name;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * we can't call wl12xx_get_vif_count() here because</div><div class='hunk'>@@ -1057,16 +697,10 @@ static int wl12xx_fetch_firmware(struct wl1271 *wl, bool plt)</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (wl-&gt;last_vif_count &gt; 1) {</div><div class='ctx'> 			fw_type = WL12XX_FW_TYPE_MULTI;</div><div class='del'>-			if (wl-&gt;chip.id == CHIP_ID_1283_PG20)</div><div class='del'>-				fw_name = WL128X_FW_NAME_MULTI;</div><div class='del'>-			else</div><div class='del'>-				fw_name = WL127X_FW_NAME_MULTI;</div><div class='add'>+			fw_name = wl-&gt;mr_fw_name;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			fw_type = WL12XX_FW_TYPE_NORMAL;</div><div class='del'>-			if (wl-&gt;chip.id == CHIP_ID_1283_PG20)</div><div class='del'>-				fw_name = WL128X_FW_NAME_SINGLE;</div><div class='del'>-			else</div><div class='del'>-				fw_name = WL127X_FW_NAME_SINGLE;</div><div class='add'>+			fw_name = wl-&gt;sr_fw_name;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1173,7 +807,7 @@ static void wl12xx_read_fwlog_panic(struct wl1271 *wl)</div><div class='ctx'> 	u32 first_addr;</div><div class='ctx'> 	u8 *block;</div><div class='ctx'> </div><div class='del'>-	if ((wl-&gt;quirks &amp; WL12XX_QUIRK_FWLOG_NOT_IMPLEMENTED) ||</div><div class='add'>+	if ((wl-&gt;quirks &amp; WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED) ||</div><div class='ctx'> 	    (wl-&gt;conf.fwlog.mode != WL12XX_FWLOG_ON_DEMAND) ||</div><div class='ctx'> 	    (wl-&gt;conf.fwlog.mem_blocks == 0))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1239,11 +873,20 @@ static void wl1271_recovery_work(struct work_struct *work)</div><div class='ctx'> 	wl12xx_read_fwlog_panic(wl);</div><div class='ctx'> </div><div class='ctx'> 	wl1271_info("Hardware recovery in progress. FW ver: %s pc: 0x%x",</div><div class='del'>-		    wl-&gt;chip.fw_ver_str, wl1271_read32(wl, SCR_PAD4));</div><div class='add'>+		    wl-&gt;chip.fw_ver_str,</div><div class='add'>+		    wlcore_read_reg(wl, REG_PC_ON_RECOVERY));</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(bug_on_recovery &amp;&amp;</div><div class='ctx'> 	       !test_bit(WL1271_FLAG_INTENDED_FW_RECOVERY, &amp;wl-&gt;flags));</div><div class='ctx'> </div><div class='add'>+	if (no_recovery) {</div><div class='add'>+		wl1271_info("No recovery (chosen on module load). Fw will remain stuck.");</div><div class='add'>+		clear_bit(WL1271_FLAG_RECOVERY_IN_PROGRESS, &amp;wl-&gt;flags);</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	BUG_ON(bug_on_recovery);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Advance security sequence number to overcome potential progress</div><div class='ctx'> 	 * in the firmware during recovery. This doens't hurt if the network is</div><div class='hunk'>@@ -1290,10 +933,7 @@ out_unlock:</div><div class='ctx'> </div><div class='ctx'> static void wl1271_fw_wakeup(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='del'>-	u32 elp_reg;</div><div class='del'>-</div><div class='del'>-	elp_reg = ELPCTRL_WAKE_UP;</div><div class='del'>-	wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, elp_reg);</div><div class='add'>+	wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG, ELPCTRL_WAKE_UP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int wl1271_setup(struct wl1271 *wl)</div><div class='hunk'>@@ -1323,7 +963,7 @@ static int wl12xx_set_power_on(struct wl1271 *wl)</div><div class='ctx'> 	wl1271_io_reset(wl);</div><div class='ctx'> 	wl1271_io_init(wl);</div><div class='ctx'> </div><div class='del'>-	wl1271_set_partition(wl, &amp;wl12xx_part_table[PART_DOWN]);</div><div class='add'>+	wlcore_set_partition(wl, &amp;wl-&gt;ptable[PART_BOOT]);</div><div class='ctx'> </div><div class='ctx'> 	/* ELP module wake up */</div><div class='ctx'> 	wl1271_fw_wakeup(wl);</div><div class='hunk'>@@ -1348,44 +988,18 @@ static int wl12xx_chip_wakeup(struct wl1271 *wl, bool plt)</div><div class='ctx'> 	 * negligible, we use the same block size for all different</div><div class='ctx'> 	 * chip types.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!wl1271_set_block_size(wl))</div><div class='del'>-		wl-&gt;quirks |= WL12XX_QUIRK_NO_BLOCKSIZE_ALIGNMENT;</div><div class='del'>-</div><div class='del'>-	switch (wl-&gt;chip.id) {</div><div class='del'>-	case CHIP_ID_1271_PG10:</div><div class='del'>-		wl1271_warning("chip id 0x%x (1271 PG10) support is obsolete",</div><div class='del'>-			       wl-&gt;chip.id);</div><div class='del'>-</div><div class='del'>-		ret = wl1271_setup(wl);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto out;</div><div class='del'>-		wl-&gt;quirks |= WL12XX_QUIRK_NO_BLOCKSIZE_ALIGNMENT;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case CHIP_ID_1271_PG20:</div><div class='del'>-		wl1271_debug(DEBUG_BOOT, "chip id 0x%x (1271 PG20)",</div><div class='del'>-			     wl-&gt;chip.id);</div><div class='add'>+	if (wl1271_set_block_size(wl))</div><div class='add'>+		wl-&gt;quirks |= WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN;</div><div class='ctx'> </div><div class='del'>-		ret = wl1271_setup(wl);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto out;</div><div class='del'>-		wl-&gt;quirks |= WL12XX_QUIRK_NO_BLOCKSIZE_ALIGNMENT;</div><div class='del'>-		break;</div><div class='add'>+	ret = wl-&gt;ops-&gt;identify_chip(wl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	case CHIP_ID_1283_PG20:</div><div class='del'>-		wl1271_debug(DEBUG_BOOT, "chip id 0x%x (1283 PG20)",</div><div class='del'>-			     wl-&gt;chip.id);</div><div class='add'>+	/* TODO: make sure the lower driver has set things up correctly */</div><div class='ctx'> </div><div class='del'>-		ret = wl1271_setup(wl);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto out;</div><div class='del'>-		break;</div><div class='del'>-	case CHIP_ID_1283_PG10:</div><div class='del'>-	default:</div><div class='del'>-		wl1271_warning("unsupported chip id: 0x%x", wl-&gt;chip.id);</div><div class='del'>-		ret = -ENODEV;</div><div class='add'>+	ret = wl1271_setup(wl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='ctx'> 		goto out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ret = wl12xx_fetch_firmware(wl, plt);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -1425,7 +1039,7 @@ int wl1271_plt_start(struct wl1271 *wl)</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto power_off;</div><div class='ctx'> </div><div class='del'>-		ret = wl1271_boot(wl);</div><div class='add'>+		ret = wl-&gt;ops-&gt;boot(wl);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto power_off;</div><div class='ctx'> </div><div class='hunk'>@@ -1454,7 +1068,7 @@ irq_disable:</div><div class='ctx'> 		   work function will not do anything.) Also, any other</div><div class='ctx'> 		   possible concurrent operations will fail due to the</div><div class='ctx'> 		   current state, hence the wl1271 struct should be safe. */</div><div class='del'>-		wl1271_disable_interrupts(wl);</div><div class='add'>+		wlcore_disable_interrupts(wl);</div><div class='ctx'> 		wl1271_flush_deferred_work(wl);</div><div class='ctx'> 		cancel_work_sync(&amp;wl-&gt;netstack_work);</div><div class='ctx'> 		mutex_lock(&amp;wl-&gt;mutex);</div><div class='hunk'>@@ -1481,7 +1095,7 @@ int wl1271_plt_stop(struct wl1271 *wl)</div><div class='ctx'> 	 * Otherwise, the interrupt handler might be called and exit without</div><div class='ctx'> 	 * reading the interrupt status.</div><div class='ctx'> 	 */</div><div class='del'>-	wl1271_disable_interrupts(wl);</div><div class='add'>+	wlcore_disable_interrupts(wl);</div><div class='ctx'> 	mutex_lock(&amp;wl-&gt;mutex);</div><div class='ctx'> 	if (!wl-&gt;plt) {</div><div class='ctx'> 		mutex_unlock(&amp;wl-&gt;mutex);</div><div class='hunk'>@@ -1491,7 +1105,7 @@ int wl1271_plt_stop(struct wl1271 *wl)</div><div class='ctx'> 		 * may have been disabled when op_stop was called. It will,</div><div class='ctx'> 		 * however, balance the above call to disable_interrupts().</div><div class='ctx'> 		 */</div><div class='del'>-		wl1271_enable_interrupts(wl);</div><div class='add'>+		wlcore_enable_interrupts(wl);</div><div class='ctx'> </div><div class='ctx'> 		wl1271_error("cannot power down because not in PLT "</div><div class='ctx'> 			     "state: %d", wl-&gt;state);</div><div class='hunk'>@@ -1506,6 +1120,7 @@ int wl1271_plt_stop(struct wl1271 *wl)</div><div class='ctx'> 	cancel_work_sync(&amp;wl-&gt;recovery_work);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;wl-&gt;elp_work);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;wl-&gt;tx_watchdog_work);</div><div class='add'>+	cancel_delayed_work_sync(&amp;wl-&gt;connection_loss_work);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;wl-&gt;mutex);</div><div class='ctx'> 	wl1271_power_off(wl);</div><div class='hunk'>@@ -1647,20 +1262,281 @@ static struct sk_buff *wl12xx_alloc_dummy_packet(struct wl1271 *wl)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM</div><div class='add'>+static int</div><div class='add'>+wl1271_validate_wowlan_pattern(struct cfg80211_wowlan_trig_pkt_pattern *p)</div><div class='add'>+{</div><div class='add'>+	int num_fields = 0, in_field = 0, fields_size = 0;</div><div class='add'>+	int i, pattern_len = 0;</div><div class='add'>+</div><div class='add'>+	if (!p-&gt;mask) {</div><div class='add'>+		wl1271_warning("No mask in WoWLAN pattern");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The pattern is broken up into segments of bytes at different offsets</div><div class='add'>+	 * that need to be checked by the FW filter. Each segment is called</div><div class='add'>+	 * a field in the FW API. We verify that the total number of fields</div><div class='add'>+	 * required for this pattern won't exceed FW limits (8)</div><div class='add'>+	 * as well as the total fields buffer won't exceed the FW limit.</div><div class='add'>+	 * Note that if there's a pattern which crosses Ethernet/IP header</div><div class='add'>+	 * boundary a new field is required.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; p-&gt;pattern_len; i++) {</div><div class='add'>+		if (test_bit(i, (unsigned long *)p-&gt;mask)) {</div><div class='add'>+			if (!in_field) {</div><div class='add'>+				in_field = 1;</div><div class='add'>+				pattern_len = 1;</div><div class='add'>+			} else {</div><div class='add'>+				if (i == WL1271_RX_FILTER_ETH_HEADER_SIZE) {</div><div class='add'>+					num_fields++;</div><div class='add'>+					fields_size += pattern_len +</div><div class='add'>+						RX_FILTER_FIELD_OVERHEAD;</div><div class='add'>+					pattern_len = 1;</div><div class='add'>+				} else</div><div class='add'>+					pattern_len++;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			if (in_field) {</div><div class='add'>+				in_field = 0;</div><div class='add'>+				fields_size += pattern_len +</div><div class='add'>+					RX_FILTER_FIELD_OVERHEAD;</div><div class='add'>+				num_fields++;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (in_field) {</div><div class='add'>+		fields_size += pattern_len + RX_FILTER_FIELD_OVERHEAD;</div><div class='add'>+		num_fields++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (num_fields &gt; WL1271_RX_FILTER_MAX_FIELDS) {</div><div class='add'>+		wl1271_warning("RX Filter too complex. Too many segments");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fields_size &gt; WL1271_RX_FILTER_MAX_FIELDS_SIZE) {</div><div class='add'>+		wl1271_warning("RX filter pattern is too big");</div><div class='add'>+		return -E2BIG;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct wl12xx_rx_filter *wl1271_rx_filter_alloc(void)</div><div class='add'>+{</div><div class='add'>+	return kzalloc(sizeof(struct wl12xx_rx_filter), GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wl1271_rx_filter_free(struct wl12xx_rx_filter *filter)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (filter == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; filter-&gt;num_fields; i++)</div><div class='add'>+		kfree(filter-&gt;fields[i].pattern);</div><div class='add'>+</div><div class='add'>+	kfree(filter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wl1271_rx_filter_alloc_field(struct wl12xx_rx_filter *filter,</div><div class='add'>+				 u16 offset, u8 flags,</div><div class='add'>+				 u8 *pattern, u8 len)</div><div class='add'>+{</div><div class='add'>+	struct wl12xx_rx_filter_field *field;</div><div class='add'>+</div><div class='add'>+	if (filter-&gt;num_fields == WL1271_RX_FILTER_MAX_FIELDS) {</div><div class='add'>+		wl1271_warning("Max fields per RX filter. can't alloc another");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	field = &amp;filter-&gt;fields[filter-&gt;num_fields];</div><div class='add'>+</div><div class='add'>+	field-&gt;pattern = kzalloc(len, GFP_KERNEL);</div><div class='add'>+	if (!field-&gt;pattern) {</div><div class='add'>+		wl1271_warning("Failed to allocate RX filter pattern");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	filter-&gt;num_fields++;</div><div class='add'>+</div><div class='add'>+	field-&gt;offset = cpu_to_le16(offset);</div><div class='add'>+	field-&gt;flags = flags;</div><div class='add'>+	field-&gt;len = len;</div><div class='add'>+	memcpy(field-&gt;pattern, pattern, len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wl1271_rx_filter_get_fields_size(struct wl12xx_rx_filter *filter)</div><div class='add'>+{</div><div class='add'>+	int i, fields_size = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; filter-&gt;num_fields; i++)</div><div class='add'>+		fields_size += filter-&gt;fields[i].len +</div><div class='add'>+			sizeof(struct wl12xx_rx_filter_field) -</div><div class='add'>+			sizeof(u8 *);</div><div class='add'>+</div><div class='add'>+	return fields_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wl1271_rx_filter_flatten_fields(struct wl12xx_rx_filter *filter,</div><div class='add'>+				    u8 *buf)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct wl12xx_rx_filter_field *field;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; filter-&gt;num_fields; i++) {</div><div class='add'>+		field = (struct wl12xx_rx_filter_field *)buf;</div><div class='add'>+</div><div class='add'>+		field-&gt;offset = filter-&gt;fields[i].offset;</div><div class='add'>+		field-&gt;flags = filter-&gt;fields[i].flags;</div><div class='add'>+		field-&gt;len = filter-&gt;fields[i].len;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;field-&gt;pattern, filter-&gt;fields[i].pattern, field-&gt;len);</div><div class='add'>+		buf += sizeof(struct wl12xx_rx_filter_field) -</div><div class='add'>+			sizeof(u8 *) + field-&gt;len;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Allocates an RX filter returned through f</div><div class='add'>+ * which needs to be freed using rx_filter_free()</div><div class='add'>+ */</div><div class='add'>+static int wl1271_convert_wowlan_pattern_to_rx_filter(</div><div class='add'>+	struct cfg80211_wowlan_trig_pkt_pattern *p,</div><div class='add'>+	struct wl12xx_rx_filter **f)</div><div class='add'>+{</div><div class='add'>+	int i, j, ret = 0;</div><div class='add'>+	struct wl12xx_rx_filter *filter;</div><div class='add'>+	u16 offset;</div><div class='add'>+	u8 flags, len;</div><div class='add'>+</div><div class='add'>+	filter = wl1271_rx_filter_alloc();</div><div class='add'>+	if (!filter) {</div><div class='add'>+		wl1271_warning("Failed to alloc rx filter");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i = 0;</div><div class='add'>+	while (i &lt; p-&gt;pattern_len) {</div><div class='add'>+		if (!test_bit(i, (unsigned long *)p-&gt;mask)) {</div><div class='add'>+			i++;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (j = i; j &lt; p-&gt;pattern_len; j++) {</div><div class='add'>+			if (!test_bit(j, (unsigned long *)p-&gt;mask))</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			if (i &lt; WL1271_RX_FILTER_ETH_HEADER_SIZE &amp;&amp;</div><div class='add'>+			    j &gt;= WL1271_RX_FILTER_ETH_HEADER_SIZE)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (i &lt; WL1271_RX_FILTER_ETH_HEADER_SIZE) {</div><div class='add'>+			offset = i;</div><div class='add'>+			flags = WL1271_RX_FILTER_FLAG_ETHERNET_HEADER;</div><div class='add'>+		} else {</div><div class='add'>+			offset = i - WL1271_RX_FILTER_ETH_HEADER_SIZE;</div><div class='add'>+			flags = WL1271_RX_FILTER_FLAG_IP_HEADER;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		len = j - i;</div><div class='add'>+</div><div class='add'>+		ret = wl1271_rx_filter_alloc_field(filter,</div><div class='add'>+						   offset,</div><div class='add'>+						   flags,</div><div class='add'>+						   &amp;p-&gt;pattern[i], len);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		i = j;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	filter-&gt;action = FILTER_SIGNAL;</div><div class='add'>+</div><div class='add'>+	*f = filter;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	wl1271_rx_filter_free(filter);</div><div class='add'>+	*f = NULL;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wl1271_configure_wowlan(struct wl1271 *wl,</div><div class='add'>+				   struct cfg80211_wowlan *wow)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	if (!wow || wow-&gt;any || !wow-&gt;n_patterns) {</div><div class='add'>+		wl1271_acx_default_rx_filter_enable(wl, 0, FILTER_SIGNAL);</div><div class='add'>+		wl1271_rx_filter_clear_all(wl);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(wow-&gt;n_patterns &gt; WL1271_MAX_RX_FILTERS))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Validate all incoming patterns before clearing current FW state */</div><div class='add'>+	for (i = 0; i &lt; wow-&gt;n_patterns; i++) {</div><div class='add'>+		ret = wl1271_validate_wowlan_pattern(&amp;wow-&gt;patterns[i]);</div><div class='add'>+		if (ret) {</div><div class='add'>+			wl1271_warning("Bad wowlan pattern %d", i);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wl1271_acx_default_rx_filter_enable(wl, 0, FILTER_SIGNAL);</div><div class='add'>+	wl1271_rx_filter_clear_all(wl);</div><div class='add'>+</div><div class='add'>+	/* Translate WoWLAN patterns into filters */</div><div class='add'>+	for (i = 0; i &lt; wow-&gt;n_patterns; i++) {</div><div class='add'>+		struct cfg80211_wowlan_trig_pkt_pattern *p;</div><div class='add'>+		struct wl12xx_rx_filter *filter = NULL;</div><div class='add'>+</div><div class='add'>+		p = &amp;wow-&gt;patterns[i];</div><div class='add'>+</div><div class='add'>+		ret = wl1271_convert_wowlan_pattern_to_rx_filter(p, &amp;filter);</div><div class='add'>+		if (ret) {</div><div class='add'>+			wl1271_warning("Failed to create an RX filter from "</div><div class='add'>+				       "wowlan pattern %d", i);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = wl1271_rx_filter_enable(wl, i, 1, filter);</div><div class='add'>+</div><div class='add'>+		wl1271_rx_filter_free(filter);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = wl1271_acx_default_rx_filter_enable(wl, 1, FILTER_DROP);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int wl1271_configure_suspend_sta(struct wl1271 *wl,</div><div class='del'>-					struct wl12xx_vif *wlvif)</div><div class='add'>+					struct wl12xx_vif *wlvif,</div><div class='add'>+					struct cfg80211_wowlan *wow)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;wl-&gt;mutex);</div><div class='del'>-</div><div class='ctx'> 	if (!test_bit(WLVIF_FLAG_STA_ASSOCIATED, &amp;wlvif-&gt;flags))</div><div class='del'>-		goto out_unlock;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ret = wl1271_ps_elp_wakeup(wl);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto out_unlock;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='add'>+	wl1271_configure_wowlan(wl, wow);</div><div class='ctx'> 	ret = wl1271_acx_wake_up_conditions(wl, wlvif,</div><div class='ctx'> 				    wl-&gt;conf.conn.suspend_wake_up_event,</div><div class='ctx'> 				    wl-&gt;conf.conn.suspend_listen_interval);</div><div class='hunk'>@@ -1668,11 +1544,9 @@ static int wl1271_configure_suspend_sta(struct wl1271 *wl,</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		wl1271_error("suspend: set wake up conditions failed: %d", ret);</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	wl1271_ps_elp_sleep(wl);</div><div class='ctx'> </div><div class='del'>-out_unlock:</div><div class='del'>-	mutex_unlock(&amp;wl-&gt;mutex);</div><div class='add'>+out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -1682,29 +1556,27 @@ static int wl1271_configure_suspend_ap(struct wl1271 *wl,</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;wl-&gt;mutex);</div><div class='del'>-</div><div class='ctx'> 	if (!test_bit(WLVIF_FLAG_AP_STARTED, &amp;wlvif-&gt;flags))</div><div class='del'>-		goto out_unlock;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ret = wl1271_ps_elp_wakeup(wl);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto out_unlock;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ret = wl1271_acx_beacon_filter_opt(wl, wlvif, true);</div><div class='ctx'> </div><div class='ctx'> 	wl1271_ps_elp_sleep(wl);</div><div class='del'>-out_unlock:</div><div class='del'>-	mutex_unlock(&amp;wl-&gt;mutex);</div><div class='add'>+out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int wl1271_configure_suspend(struct wl1271 *wl,</div><div class='del'>-				    struct wl12xx_vif *wlvif)</div><div class='add'>+				    struct wl12xx_vif *wlvif,</div><div class='add'>+				    struct cfg80211_wowlan *wow)</div><div class='ctx'> {</div><div class='ctx'> 	if (wlvif-&gt;bss_type == BSS_TYPE_STA_BSS)</div><div class='del'>-		return wl1271_configure_suspend_sta(wl, wlvif);</div><div class='add'>+		return wl1271_configure_suspend_sta(wl, wlvif, wow);</div><div class='ctx'> 	if (wlvif-&gt;bss_type == BSS_TYPE_AP_BSS)</div><div class='ctx'> 		return wl1271_configure_suspend_ap(wl, wlvif);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1720,12 +1592,13 @@ static void wl1271_configure_resume(struct wl1271 *wl,</div><div class='ctx'> 	if ((!is_ap) &amp;&amp; (!is_sta))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;wl-&gt;mutex);</div><div class='ctx'> 	ret = wl1271_ps_elp_wakeup(wl);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	if (is_sta) {</div><div class='add'>+		wl1271_configure_wowlan(wl, NULL);</div><div class='add'>+</div><div class='ctx'> 		ret = wl1271_acx_wake_up_conditions(wl, wlvif,</div><div class='ctx'> 				    wl-&gt;conf.conn.wake_up_event,</div><div class='ctx'> 				    wl-&gt;conf.conn.listen_interval);</div><div class='hunk'>@@ -1739,8 +1612,6 @@ static void wl1271_configure_resume(struct wl1271 *wl,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	wl1271_ps_elp_sleep(wl);</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;wl-&gt;mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int wl1271_op_suspend(struct ieee80211_hw *hw,</div><div class='hunk'>@@ -1751,18 +1622,21 @@ static int wl1271_op_suspend(struct ieee80211_hw *hw,</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	wl1271_debug(DEBUG_MAC80211, "mac80211 suspend wow=%d", !!wow);</div><div class='del'>-	WARN_ON(!wow || !wow-&gt;any);</div><div class='add'>+	WARN_ON(!wow);</div><div class='ctx'> </div><div class='ctx'> 	wl1271_tx_flush(wl);</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;wl-&gt;mutex);</div><div class='ctx'> 	wl-&gt;wow_enabled = true;</div><div class='ctx'> 	wl12xx_for_each_wlvif(wl, wlvif) {</div><div class='del'>-		ret = wl1271_configure_suspend(wl, wlvif);</div><div class='add'>+		ret = wl1271_configure_suspend(wl, wlvif, wow);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='add'>+			mutex_unlock(&amp;wl-&gt;mutex);</div><div class='ctx'> 			wl1271_warning("couldn't prepare device to suspend");</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	mutex_unlock(&amp;wl-&gt;mutex);</div><div class='ctx'> 	/* flush any remaining work */</div><div class='ctx'> 	wl1271_debug(DEBUG_MAC80211, "flushing remaining works");</div><div class='ctx'> </div><div class='hunk'>@@ -1770,7 +1644,7 @@ static int wl1271_op_suspend(struct ieee80211_hw *hw,</div><div class='ctx'> 	 * disable and re-enable interrupts in order to flush</div><div class='ctx'> 	 * the threaded_irq</div><div class='ctx'> 	 */</div><div class='del'>-	wl1271_disable_interrupts(wl);</div><div class='add'>+	wlcore_disable_interrupts(wl);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * set suspended flag to avoid triggering a new threaded_irq</div><div class='hunk'>@@ -1778,7 +1652,7 @@ static int wl1271_op_suspend(struct ieee80211_hw *hw,</div><div class='ctx'> 	 */</div><div class='ctx'> 	set_bit(WL1271_FLAG_SUSPENDED, &amp;wl-&gt;flags);</div><div class='ctx'> </div><div class='del'>-	wl1271_enable_interrupts(wl);</div><div class='add'>+	wlcore_enable_interrupts(wl);</div><div class='ctx'> 	flush_work(&amp;wl-&gt;tx_work);</div><div class='ctx'> 	flush_delayed_work(&amp;wl-&gt;elp_work);</div><div class='ctx'> </div><div class='hunk'>@@ -1810,12 +1684,15 @@ static int wl1271_op_resume(struct ieee80211_hw *hw)</div><div class='ctx'> 		wl1271_debug(DEBUG_MAC80211,</div><div class='ctx'> 			     "run postponed irq_work directly");</div><div class='ctx'> 		wl1271_irq(0, wl);</div><div class='del'>-		wl1271_enable_interrupts(wl);</div><div class='add'>+		wlcore_enable_interrupts(wl);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;wl-&gt;mutex);</div><div class='ctx'> 	wl12xx_for_each_wlvif(wl, wlvif) {</div><div class='ctx'> 		wl1271_configure_resume(wl, wlvif);</div><div class='ctx'> 	}</div><div class='ctx'> 	wl-&gt;wow_enabled = false;</div><div class='add'>+	mutex_unlock(&amp;wl-&gt;mutex);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1851,7 +1728,7 @@ static void wl1271_op_stop(struct ieee80211_hw *hw)</div><div class='ctx'> 	 * Otherwise, the interrupt handler might be called and exit without</div><div class='ctx'> 	 * reading the interrupt status.</div><div class='ctx'> 	 */</div><div class='del'>-	wl1271_disable_interrupts(wl);</div><div class='add'>+	wlcore_disable_interrupts(wl);</div><div class='ctx'> 	mutex_lock(&amp;wl-&gt;mutex);</div><div class='ctx'> 	if (wl-&gt;state == WL1271_STATE_OFF) {</div><div class='ctx'> 		mutex_unlock(&amp;wl-&gt;mutex);</div><div class='hunk'>@@ -1861,7 +1738,7 @@ static void wl1271_op_stop(struct ieee80211_hw *hw)</div><div class='ctx'> 		 * may have been disabled when op_stop was called. It will,</div><div class='ctx'> 		 * however, balance the above call to disable_interrupts().</div><div class='ctx'> 		 */</div><div class='del'>-		wl1271_enable_interrupts(wl);</div><div class='add'>+		wlcore_enable_interrupts(wl);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1878,6 +1755,7 @@ static void wl1271_op_stop(struct ieee80211_hw *hw)</div><div class='ctx'> 	cancel_work_sync(&amp;wl-&gt;tx_work);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;wl-&gt;elp_work);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;wl-&gt;tx_watchdog_work);</div><div class='add'>+	cancel_delayed_work_sync(&amp;wl-&gt;connection_loss_work);</div><div class='ctx'> </div><div class='ctx'> 	/* let's notify MAC80211 about the remaining pending TX frames */</div><div class='ctx'> 	wl12xx_tx_reset(wl, true);</div><div class='hunk'>@@ -1894,7 +1772,6 @@ static void wl1271_op_stop(struct ieee80211_hw *hw)</div><div class='ctx'> 	wl-&gt;tx_results_count = 0;</div><div class='ctx'> 	wl-&gt;tx_packets_count = 0;</div><div class='ctx'> 	wl-&gt;time_offset = 0;</div><div class='del'>-	wl-&gt;tx_spare_blocks = TX_HW_BLOCK_SPARE_DEFAULT;</div><div class='ctx'> 	wl-&gt;ap_fw_ps_map = 0;</div><div class='ctx'> 	wl-&gt;ap_ps_map = 0;</div><div class='ctx'> 	wl-&gt;sched_scanning = false;</div><div class='hunk'>@@ -2067,7 +1944,7 @@ static bool wl12xx_init_fw(struct wl1271 *wl)</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto power_off;</div><div class='ctx'> </div><div class='del'>-		ret = wl1271_boot(wl);</div><div class='add'>+		ret = wl-&gt;ops-&gt;boot(wl);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto power_off;</div><div class='ctx'> </div><div class='hunk'>@@ -2087,7 +1964,7 @@ irq_disable:</div><div class='ctx'> 		   work function will not do anything.) Also, any other</div><div class='ctx'> 		   possible concurrent operations will fail due to the</div><div class='ctx'> 		   current state, hence the wl1271 struct should be safe. */</div><div class='del'>-		wl1271_disable_interrupts(wl);</div><div class='add'>+		wlcore_disable_interrupts(wl);</div><div class='ctx'> 		wl1271_flush_deferred_work(wl);</div><div class='ctx'> 		cancel_work_sync(&amp;wl-&gt;netstack_work);</div><div class='ctx'> 		mutex_lock(&amp;wl-&gt;mutex);</div><div class='hunk'>@@ -2360,10 +2237,12 @@ deinit:</div><div class='ctx'> 		for (i = 0; i &lt; CONF_TX_MAX_AC_COUNT; i++)</div><div class='ctx'> 			wl12xx_free_rate_policy(wl,</div><div class='ctx'> 						&amp;wlvif-&gt;ap.ucast_rate_idx[i]);</div><div class='add'>+		wl1271_free_ap_keys(wl, wlvif);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	dev_kfree_skb(wlvif-&gt;probereq);</div><div class='add'>+	wlvif-&gt;probereq = NULL;</div><div class='ctx'> 	wl12xx_tx_reset_wlvif(wl, wlvif);</div><div class='del'>-	wl1271_free_ap_keys(wl, wlvif);</div><div class='ctx'> 	if (wl-&gt;last_wlvif == wlvif)</div><div class='ctx'> 		wl-&gt;last_wlvif = NULL;</div><div class='ctx'> 	list_del(&amp;wlvif-&gt;list);</div><div class='hunk'>@@ -2946,6 +2825,17 @@ static int wl1271_set_key(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	bool is_ap = (wlvif-&gt;bss_type == BSS_TYPE_AP_BSS);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * A role set to GEM cipher requires different Tx settings (namely</div><div class='add'>+	 * spare blocks). Note when we are in this mode so the HW can adjust.</div><div class='add'>+	 */</div><div class='add'>+	if (key_type == KEY_GEM) {</div><div class='add'>+		if (action == KEY_ADD_OR_REPLACE)</div><div class='add'>+			wlvif-&gt;is_gem = true;</div><div class='add'>+		else if (action == KEY_REMOVE)</div><div class='add'>+			wlvif-&gt;is_gem = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (is_ap) {</div><div class='ctx'> 		struct wl1271_station *wl_sta;</div><div class='ctx'> 		u8 hlid;</div><div class='hunk'>@@ -2984,17 +2874,6 @@ static int wl1271_set_key(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='ctx'> 			0xff, 0xff, 0xff, 0xff, 0xff, 0xff</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * A STA set to GEM cipher requires 2 tx spare blocks.</div><div class='del'>-		 * Return to default value when GEM cipher key is removed</div><div class='del'>-		 */</div><div class='del'>-		if (key_type == KEY_GEM) {</div><div class='del'>-			if (action == KEY_ADD_OR_REPLACE)</div><div class='del'>-				wl-&gt;tx_spare_blocks = 2;</div><div class='del'>-			else if (action == KEY_REMOVE)</div><div class='del'>-				wl-&gt;tx_spare_blocks = TX_HW_BLOCK_SPARE_DEFAULT;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		addr = sta ? sta-&gt;addr : bcast_addr;</div><div class='ctx'> </div><div class='ctx'> 		if (is_zero_ether_addr(addr)) {</div><div class='hunk'>@@ -3791,8 +3670,7 @@ static void wl1271_bss_info_changed_sta(struct wl1271 *wl,</div><div class='ctx'> 		wlvif-&gt;rssi_thold = bss_conf-&gt;cqm_rssi_thold;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (changed &amp; BSS_CHANGED_BSSID &amp;&amp;</div><div class='del'>-	    (is_ibss || bss_conf-&gt;assoc))</div><div class='add'>+	if (changed &amp; BSS_CHANGED_BSSID)</div><div class='ctx'> 		if (!is_zero_ether_addr(bss_conf-&gt;bssid)) {</div><div class='ctx'> 			ret = wl12xx_cmd_build_null_data(wl, wlvif);</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='hunk'>@@ -3801,9 +3679,6 @@ static void wl1271_bss_info_changed_sta(struct wl1271 *wl,</div><div class='ctx'> 			ret = wl1271_build_qos_null_data(wl, vif);</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='ctx'> 				goto out;</div><div class='del'>-</div><div class='del'>-			/* Need to update the BSSID (for filtering etc) */</div><div class='del'>-			do_join = true;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 	if (changed &amp; (BSS_CHANGED_ASSOC | BSS_CHANGED_HT)) {</div><div class='hunk'>@@ -3830,8 +3705,12 @@ sta_not_found:</div><div class='ctx'> 			int ieoffset;</div><div class='ctx'> 			wlvif-&gt;aid = bss_conf-&gt;aid;</div><div class='ctx'> 			wlvif-&gt;beacon_int = bss_conf-&gt;beacon_int;</div><div class='add'>+			do_join = true;</div><div class='ctx'> 			set_assoc = true;</div><div class='ctx'> </div><div class='add'>+			/* Cancel connection_loss_work */</div><div class='add'>+			cancel_delayed_work_sync(&amp;wl-&gt;connection_loss_work);</div><div class='add'>+</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * use basic rates from AP, and determine lowest rate</div><div class='ctx'> 			 * to use with control frames.</div><div class='hunk'>@@ -4662,60 +4541,12 @@ static struct ieee80211_channel wl1271_channels[] = {</div><div class='ctx'> 	{ .hw_value = 14, .center_freq = 2484, .max_power = 25 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* mapping to indexes for wl1271_rates */</div><div class='del'>-static const u8 wl1271_rate_to_idx_2ghz[] = {</div><div class='del'>-	/* MCS rates are used only with 11n */</div><div class='del'>-	7,                            /* CONF_HW_RXTX_RATE_MCS7_SGI */</div><div class='del'>-	7,                            /* CONF_HW_RXTX_RATE_MCS7 */</div><div class='del'>-	6,                            /* CONF_HW_RXTX_RATE_MCS6 */</div><div class='del'>-	5,                            /* CONF_HW_RXTX_RATE_MCS5 */</div><div class='del'>-	4,                            /* CONF_HW_RXTX_RATE_MCS4 */</div><div class='del'>-	3,                            /* CONF_HW_RXTX_RATE_MCS3 */</div><div class='del'>-	2,                            /* CONF_HW_RXTX_RATE_MCS2 */</div><div class='del'>-	1,                            /* CONF_HW_RXTX_RATE_MCS1 */</div><div class='del'>-	0,                            /* CONF_HW_RXTX_RATE_MCS0 */</div><div class='del'>-</div><div class='del'>-	11,                            /* CONF_HW_RXTX_RATE_54   */</div><div class='del'>-	10,                            /* CONF_HW_RXTX_RATE_48   */</div><div class='del'>-	9,                             /* CONF_HW_RXTX_RATE_36   */</div><div class='del'>-	8,                             /* CONF_HW_RXTX_RATE_24   */</div><div class='del'>-</div><div class='del'>-	/* TI-specific rate */</div><div class='del'>-	CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_22   */</div><div class='del'>-</div><div class='del'>-	7,                             /* CONF_HW_RXTX_RATE_18   */</div><div class='del'>-	6,                             /* CONF_HW_RXTX_RATE_12   */</div><div class='del'>-	3,                             /* CONF_HW_RXTX_RATE_11   */</div><div class='del'>-	5,                             /* CONF_HW_RXTX_RATE_9    */</div><div class='del'>-	4,                             /* CONF_HW_RXTX_RATE_6    */</div><div class='del'>-	2,                             /* CONF_HW_RXTX_RATE_5_5  */</div><div class='del'>-	1,                             /* CONF_HW_RXTX_RATE_2    */</div><div class='del'>-	0                              /* CONF_HW_RXTX_RATE_1    */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* 11n STA capabilities */</div><div class='del'>-#define HW_RX_HIGHEST_RATE	72</div><div class='del'>-</div><div class='del'>-#define WL12XX_HT_CAP { \</div><div class='del'>-	.cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20 | \</div><div class='del'>-	       (1 &lt;&lt; IEEE80211_HT_CAP_RX_STBC_SHIFT), \</div><div class='del'>-	.ht_supported = true, \</div><div class='del'>-	.ampdu_factor = IEEE80211_HT_MAX_AMPDU_8K, \</div><div class='del'>-	.ampdu_density = IEEE80211_HT_MPDU_DENSITY_8, \</div><div class='del'>-	.mcs = { \</div><div class='del'>-		.rx_mask = { 0xff, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, \</div><div class='del'>-		.rx_highest = cpu_to_le16(HW_RX_HIGHEST_RATE), \</div><div class='del'>-		.tx_params = IEEE80211_HT_MCS_TX_DEFINED, \</div><div class='del'>-		}, \</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* can't be const, mac80211 writes to this */</div><div class='ctx'> static struct ieee80211_supported_band wl1271_band_2ghz = {</div><div class='ctx'> 	.channels = wl1271_channels,</div><div class='ctx'> 	.n_channels = ARRAY_SIZE(wl1271_channels),</div><div class='ctx'> 	.bitrates = wl1271_rates,</div><div class='ctx'> 	.n_bitrates = ARRAY_SIZE(wl1271_rates),</div><div class='del'>-	.ht_cap	= WL12XX_HT_CAP,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* 5 GHz data rates for WL1273 */</div><div class='hunk'>@@ -4784,48 +4615,11 @@ static struct ieee80211_channel wl1271_channels_5ghz[] = {</div><div class='ctx'> 	{ .hw_value = 165, .center_freq = 5825, .max_power = 25 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* mapping to indexes for wl1271_rates_5ghz */</div><div class='del'>-static const u8 wl1271_rate_to_idx_5ghz[] = {</div><div class='del'>-	/* MCS rates are used only with 11n */</div><div class='del'>-	7,                            /* CONF_HW_RXTX_RATE_MCS7_SGI */</div><div class='del'>-	7,                            /* CONF_HW_RXTX_RATE_MCS7 */</div><div class='del'>-	6,                            /* CONF_HW_RXTX_RATE_MCS6 */</div><div class='del'>-	5,                            /* CONF_HW_RXTX_RATE_MCS5 */</div><div class='del'>-	4,                            /* CONF_HW_RXTX_RATE_MCS4 */</div><div class='del'>-	3,                            /* CONF_HW_RXTX_RATE_MCS3 */</div><div class='del'>-	2,                            /* CONF_HW_RXTX_RATE_MCS2 */</div><div class='del'>-	1,                            /* CONF_HW_RXTX_RATE_MCS1 */</div><div class='del'>-	0,                            /* CONF_HW_RXTX_RATE_MCS0 */</div><div class='del'>-</div><div class='del'>-	7,                             /* CONF_HW_RXTX_RATE_54   */</div><div class='del'>-	6,                             /* CONF_HW_RXTX_RATE_48   */</div><div class='del'>-	5,                             /* CONF_HW_RXTX_RATE_36   */</div><div class='del'>-	4,                             /* CONF_HW_RXTX_RATE_24   */</div><div class='del'>-</div><div class='del'>-	/* TI-specific rate */</div><div class='del'>-	CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_22   */</div><div class='del'>-</div><div class='del'>-	3,                             /* CONF_HW_RXTX_RATE_18   */</div><div class='del'>-	2,                             /* CONF_HW_RXTX_RATE_12   */</div><div class='del'>-	CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_11   */</div><div class='del'>-	1,                             /* CONF_HW_RXTX_RATE_9    */</div><div class='del'>-	0,                             /* CONF_HW_RXTX_RATE_6    */</div><div class='del'>-	CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_5_5  */</div><div class='del'>-	CONF_HW_RXTX_RATE_UNSUPPORTED, /* CONF_HW_RXTX_RATE_2    */</div><div class='del'>-	CONF_HW_RXTX_RATE_UNSUPPORTED  /* CONF_HW_RXTX_RATE_1    */</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct ieee80211_supported_band wl1271_band_5ghz = {</div><div class='ctx'> 	.channels = wl1271_channels_5ghz,</div><div class='ctx'> 	.n_channels = ARRAY_SIZE(wl1271_channels_5ghz),</div><div class='ctx'> 	.bitrates = wl1271_rates_5ghz,</div><div class='ctx'> 	.n_bitrates = ARRAY_SIZE(wl1271_rates_5ghz),</div><div class='del'>-	.ht_cap	= WL12XX_HT_CAP,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const u8 *wl1271_band_rate_to_idx[] = {</div><div class='del'>-	[IEEE80211_BAND_2GHZ] = wl1271_rate_to_idx_2ghz,</div><div class='del'>-	[IEEE80211_BAND_5GHZ] = wl1271_rate_to_idx_5ghz</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ieee80211_ops wl1271_ops = {</div><div class='hunk'>@@ -4862,18 +4656,18 @@ static const struct ieee80211_ops wl1271_ops = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-u8 wl1271_rate_to_idx(int rate, enum ieee80211_band band)</div><div class='add'>+u8 wlcore_rate_to_idx(struct wl1271 *wl, u8 rate, enum ieee80211_band band)</div><div class='ctx'> {</div><div class='ctx'> 	u8 idx;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(band &gt;= sizeof(wl1271_band_rate_to_idx)/sizeof(u8 *));</div><div class='add'>+	BUG_ON(band &gt;= 2);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(rate &gt;= CONF_HW_RXTX_RATE_MAX)) {</div><div class='add'>+	if (unlikely(rate &gt;= wl-&gt;hw_tx_rate_tbl_size)) {</div><div class='ctx'> 		wl1271_error("Illegal RX rate from HW: %d", rate);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	idx = wl1271_band_rate_to_idx[band][rate];</div><div class='add'>+	idx = wl-&gt;band_rate_to_idx[band][rate];</div><div class='ctx'> 	if (unlikely(idx == CONF_HW_RXTX_RATE_UNSUPPORTED)) {</div><div class='ctx'> 		wl1271_error("Unsupported RX rate from HW: %d", rate);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -5027,32 +4821,32 @@ static struct bin_attribute fwlog_attr = {</div><div class='ctx'> 	.read = wl1271_sysfs_read_fwlog,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static bool wl12xx_mac_in_fuse(struct wl1271 *wl)</div><div class='add'>+static void wl1271_connection_loss_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	bool supported = false;</div><div class='del'>-	u8 major, minor;</div><div class='add'>+	struct delayed_work *dwork;</div><div class='add'>+	struct wl1271 *wl;</div><div class='add'>+	struct ieee80211_vif *vif;</div><div class='add'>+	struct wl12xx_vif *wlvif;</div><div class='ctx'> </div><div class='del'>-	if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='del'>-		major = WL128X_PG_GET_MAJOR(wl-&gt;hw_pg_ver);</div><div class='del'>-		minor = WL128X_PG_GET_MINOR(wl-&gt;hw_pg_ver);</div><div class='add'>+	dwork = container_of(work, struct delayed_work, work);</div><div class='add'>+	wl = container_of(dwork, struct wl1271, connection_loss_work);</div><div class='ctx'> </div><div class='del'>-		/* in wl128x we have the MAC address if the PG is &gt;= (2, 1) */</div><div class='del'>-		if (major &gt; 2 || (major == 2 &amp;&amp; minor &gt;= 1))</div><div class='del'>-			supported = true;</div><div class='del'>-	} else {</div><div class='del'>-		major = WL127X_PG_GET_MAJOR(wl-&gt;hw_pg_ver);</div><div class='del'>-		minor = WL127X_PG_GET_MINOR(wl-&gt;hw_pg_ver);</div><div class='add'>+	wl1271_info("Connection loss work.");</div><div class='ctx'> </div><div class='del'>-		/* in wl127x we have the MAC address if the PG is &gt;= (3, 1) */</div><div class='del'>-		if (major == 3 &amp;&amp; minor &gt;= 1)</div><div class='del'>-			supported = true;</div><div class='del'>-	}</div><div class='add'>+	mutex_lock(&amp;wl-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	wl1271_debug(DEBUG_PROBE,</div><div class='del'>-		     "PG Ver major = %d minor = %d, MAC %s present",</div><div class='del'>-		     major, minor, supported ? "is" : "is not");</div><div class='add'>+	if (unlikely(wl-&gt;state == WL1271_STATE_OFF))</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	return supported;</div><div class='add'>+	/* Call mac80211 connection loss */</div><div class='add'>+	wl12xx_for_each_wlvif_sta(wl, wlvif) {</div><div class='add'>+		if (!test_bit(WLVIF_FLAG_STA_ASSOCIATED, &amp;wlvif-&gt;flags))</div><div class='add'>+			goto out;</div><div class='add'>+		vif = wl12xx_wlvif_to_vif(wlvif);</div><div class='add'>+		ieee80211_connection_loss(vif);</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;wl-&gt;mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void wl12xx_derive_mac_addresses(struct wl1271 *wl,</div><div class='hunk'>@@ -5080,47 +4874,23 @@ static void wl12xx_derive_mac_addresses(struct wl1271 *wl,</div><div class='ctx'> 	wl-&gt;hw-&gt;wiphy-&gt;addresses = wl-&gt;addresses;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void wl12xx_get_fuse_mac(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	u32 mac1, mac2;</div><div class='del'>-</div><div class='del'>-	wl1271_set_partition(wl, &amp;wl12xx_part_table[PART_DRPW]);</div><div class='del'>-</div><div class='del'>-	mac1 = wl1271_read32(wl, WL12XX_REG_FUSE_BD_ADDR_1);</div><div class='del'>-	mac2 = wl1271_read32(wl, WL12XX_REG_FUSE_BD_ADDR_2);</div><div class='del'>-</div><div class='del'>-	/* these are the two parts of the BD_ADDR */</div><div class='del'>-	wl-&gt;fuse_oui_addr = ((mac2 &amp; 0xffff) &lt;&lt; 8) +</div><div class='del'>-		((mac1 &amp; 0xff000000) &gt;&gt; 24);</div><div class='del'>-	wl-&gt;fuse_nic_addr = mac1 &amp; 0xffffff;</div><div class='del'>-</div><div class='del'>-	wl1271_set_partition(wl, &amp;wl12xx_part_table[PART_DOWN]);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int wl12xx_get_hw_info(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	u32 die_info;</div><div class='ctx'> </div><div class='ctx'> 	ret = wl12xx_set_power_on(wl);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	wl-&gt;chip.id = wl1271_read32(wl, CHIP_ID_B);</div><div class='add'>+	wl-&gt;chip.id = wlcore_read_reg(wl, REG_CHIP_ID_B);</div><div class='ctx'> </div><div class='del'>-	if (wl-&gt;chip.id == CHIP_ID_1283_PG20)</div><div class='del'>-		die_info = wl1271_top_reg_read(wl, WL128X_REG_FUSE_DATA_2_1);</div><div class='del'>-	else</div><div class='del'>-		die_info = wl1271_top_reg_read(wl, WL127X_REG_FUSE_DATA_2_1);</div><div class='add'>+	wl-&gt;fuse_oui_addr = 0;</div><div class='add'>+	wl-&gt;fuse_nic_addr = 0;</div><div class='ctx'> </div><div class='del'>-	wl-&gt;hw_pg_ver = (s8) (die_info &amp; PG_VER_MASK) &gt;&gt; PG_VER_OFFSET;</div><div class='add'>+	wl-&gt;hw_pg_ver = wl-&gt;ops-&gt;get_pg_ver(wl);</div><div class='ctx'> </div><div class='del'>-	if (!wl12xx_mac_in_fuse(wl)) {</div><div class='del'>-		wl-&gt;fuse_oui_addr = 0;</div><div class='del'>-		wl-&gt;fuse_nic_addr = 0;</div><div class='del'>-	} else {</div><div class='del'>-		wl12xx_get_fuse_mac(wl);</div><div class='del'>-	}</div><div class='add'>+	if (wl-&gt;ops-&gt;get_mac)</div><div class='add'>+		wl-&gt;ops-&gt;get_mac(wl);</div><div class='ctx'> </div><div class='ctx'> 	wl1271_power_off(wl);</div><div class='ctx'> out:</div><div class='hunk'>@@ -5242,7 +5012,8 @@ static int wl1271_init_ieee80211(struct wl1271 *wl)</div><div class='ctx'> 	wl-&gt;hw-&gt;wiphy-&gt;max_sched_scan_ie_len = WL1271_CMD_TEMPL_MAX_SIZE -</div><div class='ctx'> 		sizeof(struct ieee80211_header);</div><div class='ctx'> </div><div class='del'>-	wl-&gt;hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_AP_UAPSD;</div><div class='add'>+	wl-&gt;hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_AP_UAPSD |</div><div class='add'>+				WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;</div><div class='ctx'> </div><div class='ctx'> 	/* make sure all our channels fit in the scanned_ch bitmask */</div><div class='ctx'> 	BUILD_BUG_ON(ARRAY_SIZE(wl1271_channels) +</div><div class='hunk'>@@ -5254,8 +5025,12 @@ static int wl1271_init_ieee80211(struct wl1271 *wl)</div><div class='ctx'> 	 */</div><div class='ctx'> 	memcpy(&amp;wl-&gt;bands[IEEE80211_BAND_2GHZ], &amp;wl1271_band_2ghz,</div><div class='ctx'> 	       sizeof(wl1271_band_2ghz));</div><div class='add'>+	memcpy(&amp;wl-&gt;bands[IEEE80211_BAND_2GHZ].ht_cap, &amp;wl-&gt;ht_cap,</div><div class='add'>+	       sizeof(wl-&gt;ht_cap));</div><div class='ctx'> 	memcpy(&amp;wl-&gt;bands[IEEE80211_BAND_5GHZ], &amp;wl1271_band_5ghz,</div><div class='ctx'> 	       sizeof(wl1271_band_5ghz));</div><div class='add'>+	memcpy(&amp;wl-&gt;bands[IEEE80211_BAND_5GHZ].ht_cap, &amp;wl-&gt;ht_cap,</div><div class='add'>+	       sizeof(wl-&gt;ht_cap));</div><div class='ctx'> </div><div class='ctx'> 	wl-&gt;hw-&gt;wiphy-&gt;bands[IEEE80211_BAND_2GHZ] =</div><div class='ctx'> 		&amp;wl-&gt;bands[IEEE80211_BAND_2GHZ];</div><div class='hunk'>@@ -5279,14 +5054,14 @@ static int wl1271_init_ieee80211(struct wl1271 *wl)</div><div class='ctx'> 	wl-&gt;hw-&gt;sta_data_size = sizeof(struct wl1271_station);</div><div class='ctx'> 	wl-&gt;hw-&gt;vif_data_size = sizeof(struct wl12xx_vif);</div><div class='ctx'> </div><div class='del'>-	wl-&gt;hw-&gt;max_rx_aggregation_subframes = 8;</div><div class='add'>+	wl-&gt;hw-&gt;max_rx_aggregation_subframes = wl-&gt;conf.ht.rx_ba_win_size;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define WL1271_DEFAULT_CHANNEL 0</div><div class='ctx'> </div><div class='del'>-static struct ieee80211_hw *wl1271_alloc_hw(void)</div><div class='add'>+struct ieee80211_hw *wlcore_alloc_hw(size_t priv_size)</div><div class='ctx'> {</div><div class='ctx'> 	struct ieee80211_hw *hw;</div><div class='ctx'> 	struct wl1271 *wl;</div><div class='hunk'>@@ -5305,6 +5080,13 @@ static struct ieee80211_hw *wl1271_alloc_hw(void)</div><div class='ctx'> 	wl = hw-&gt;priv;</div><div class='ctx'> 	memset(wl, 0, sizeof(*wl));</div><div class='ctx'> </div><div class='add'>+	wl-&gt;priv = kzalloc(priv_size, GFP_KERNEL);</div><div class='add'>+	if (!wl-&gt;priv) {</div><div class='add'>+		wl1271_error("could not alloc wl priv");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_priv_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;wl-&gt;wlvif_list);</div><div class='ctx'> </div><div class='ctx'> 	wl-&gt;hw = hw;</div><div class='hunk'>@@ -5322,6 +5104,8 @@ static struct ieee80211_hw *wl1271_alloc_hw(void)</div><div class='ctx'> 	INIT_WORK(&amp;wl-&gt;recovery_work, wl1271_recovery_work);</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;wl-&gt;scan_complete_work, wl1271_scan_complete_work);</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;wl-&gt;tx_watchdog_work, wl12xx_tx_watchdog_work);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;wl-&gt;connection_loss_work,</div><div class='add'>+			  wl1271_connection_loss_work);</div><div class='ctx'> </div><div class='ctx'> 	wl-&gt;freezable_wq = create_freezable_workqueue("wl12xx_wq");</div><div class='ctx'> 	if (!wl-&gt;freezable_wq) {</div><div class='hunk'>@@ -5341,7 +5125,6 @@ static struct ieee80211_hw *wl1271_alloc_hw(void)</div><div class='ctx'> 	wl-&gt;quirks = 0;</div><div class='ctx'> 	wl-&gt;platform_quirks = 0;</div><div class='ctx'> 	wl-&gt;sched_scanning = false;</div><div class='del'>-	wl-&gt;tx_spare_blocks = TX_HW_BLOCK_SPARE_DEFAULT;</div><div class='ctx'> 	wl-&gt;system_hlid = WL12XX_SYSTEM_HLID;</div><div class='ctx'> 	wl-&gt;active_sta_count = 0;</div><div class='ctx'> 	wl-&gt;fwlog_size = 0;</div><div class='hunk'>@@ -5351,7 +5134,7 @@ static struct ieee80211_hw *wl1271_alloc_hw(void)</div><div class='ctx'> 	__set_bit(WL12XX_SYSTEM_HLID, wl-&gt;links_map);</div><div class='ctx'> </div><div class='ctx'> 	memset(wl-&gt;tx_frames_map, 0, sizeof(wl-&gt;tx_frames_map));</div><div class='del'>-	for (i = 0; i &lt; ACX_TX_DESCRIPTORS; i++)</div><div class='add'>+	for (i = 0; i &lt; wl-&gt;num_tx_desc; i++)</div><div class='ctx'> 		wl-&gt;tx_frames[i] = NULL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;wl-&gt;wl_lock);</div><div class='hunk'>@@ -5360,9 +5143,6 @@ static struct ieee80211_hw *wl1271_alloc_hw(void)</div><div class='ctx'> 	wl-&gt;fw_type = WL12XX_FW_TYPE_NONE;</div><div class='ctx'> 	mutex_init(&amp;wl-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	/* Apply default driver configuration. */</div><div class='del'>-	wl1271_conf_init(wl);</div><div class='del'>-</div><div class='ctx'> 	order = get_order(WL1271_AGGR_BUFFER_SIZE);</div><div class='ctx'> 	wl-&gt;aggr_buf = (u8 *)__get_free_pages(GFP_KERNEL, order);</div><div class='ctx'> 	if (!wl-&gt;aggr_buf) {</div><div class='hunk'>@@ -5383,8 +5163,17 @@ static struct ieee80211_hw *wl1271_alloc_hw(void)</div><div class='ctx'> 		goto err_dummy_packet;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	wl-&gt;mbox = kmalloc(sizeof(*wl-&gt;mbox), GFP_KERNEL | GFP_DMA);</div><div class='add'>+	if (!wl-&gt;mbox) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_fwlog;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return hw;</div><div class='ctx'> </div><div class='add'>+err_fwlog:</div><div class='add'>+	free_page((unsigned long)wl-&gt;fwlog);</div><div class='add'>+</div><div class='ctx'> err_dummy_packet:</div><div class='ctx'> 	dev_kfree_skb(wl-&gt;dummy_packet);</div><div class='ctx'> </div><div class='hunk'>@@ -5396,14 +5185,18 @@ err_wq:</div><div class='ctx'> </div><div class='ctx'> err_hw:</div><div class='ctx'> 	wl1271_debugfs_exit(wl);</div><div class='add'>+	kfree(wl-&gt;priv);</div><div class='add'>+</div><div class='add'>+err_priv_alloc:</div><div class='ctx'> 	ieee80211_free_hw(hw);</div><div class='ctx'> </div><div class='ctx'> err_hw_alloc:</div><div class='ctx'> </div><div class='ctx'> 	return ERR_PTR(ret);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(wlcore_alloc_hw);</div><div class='ctx'> </div><div class='del'>-static int wl1271_free_hw(struct wl1271 *wl)</div><div class='add'>+int wlcore_free_hw(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='ctx'> 	/* Unblock any fwlog readers */</div><div class='ctx'> 	mutex_lock(&amp;wl-&gt;mutex);</div><div class='hunk'>@@ -5433,10 +5226,12 @@ static int wl1271_free_hw(struct wl1271 *wl)</div><div class='ctx'> 	kfree(wl-&gt;tx_res_if);</div><div class='ctx'> 	destroy_workqueue(wl-&gt;freezable_wq);</div><div class='ctx'> </div><div class='add'>+	kfree(wl-&gt;priv);</div><div class='ctx'> 	ieee80211_free_hw(wl-&gt;hw);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(wlcore_free_hw);</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t wl12xx_hardirq(int irq, void *cookie)</div><div class='ctx'> {</div><div class='hunk'>@@ -5467,22 +5262,22 @@ static irqreturn_t wl12xx_hardirq(int irq, void *cookie)</div><div class='ctx'> 	return IRQ_WAKE_THREAD;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __devinit wl12xx_probe(struct platform_device *pdev)</div><div class='add'>+int __devinit wlcore_probe(struct wl1271 *wl, struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wl12xx_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='del'>-	struct ieee80211_hw *hw;</div><div class='del'>-	struct wl1271 *wl;</div><div class='ctx'> 	unsigned long irqflags;</div><div class='del'>-	int ret = -ENODEV;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	hw = wl1271_alloc_hw();</div><div class='del'>-	if (IS_ERR(hw)) {</div><div class='del'>-		wl1271_error("can't allocate hw");</div><div class='del'>-		ret = PTR_ERR(hw);</div><div class='del'>-		goto out;</div><div class='add'>+	if (!wl-&gt;ops || !wl-&gt;ptable) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out_free_hw;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wl = hw-&gt;priv;</div><div class='add'>+	BUG_ON(wl-&gt;num_tx_desc &gt; WLCORE_MAX_TX_DESCRIPTORS);</div><div class='add'>+</div><div class='add'>+	/* adjust some runtime configuration parameters */</div><div class='add'>+	wlcore_adjust_conf(wl);</div><div class='add'>+</div><div class='ctx'> 	wl-&gt;irq = platform_get_irq(pdev, 0);</div><div class='ctx'> 	wl-&gt;ref_clock = pdata-&gt;board_ref_clock;</div><div class='ctx'> 	wl-&gt;tcxo_clock = pdata-&gt;board_tcxo_clock;</div><div class='hunk'>@@ -5510,9 +5305,14 @@ static int __devinit wl12xx_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		wl-&gt;irq_wake_enabled = true;</div><div class='ctx'> 		device_init_wakeup(wl-&gt;dev, 1);</div><div class='del'>-		if (pdata-&gt;pwr_in_suspend)</div><div class='del'>-			hw-&gt;wiphy-&gt;wowlan.flags = WIPHY_WOWLAN_ANY;</div><div class='del'>-</div><div class='add'>+		if (pdata-&gt;pwr_in_suspend) {</div><div class='add'>+			wl-&gt;hw-&gt;wiphy-&gt;wowlan.flags = WIPHY_WOWLAN_ANY;</div><div class='add'>+			wl-&gt;hw-&gt;wiphy-&gt;wowlan.n_patterns =</div><div class='add'>+				WL1271_MAX_RX_FILTERS;</div><div class='add'>+			wl-&gt;hw-&gt;wiphy-&gt;wowlan.pattern_min_len = 1;</div><div class='add'>+			wl-&gt;hw-&gt;wiphy-&gt;wowlan.pattern_max_len =</div><div class='add'>+				WL1271_RX_FILTER_MAX_PATTERN_SIZE;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	disable_irq(wl-&gt;irq);</div><div class='ctx'> </div><div class='hunk'>@@ -5545,7 +5345,7 @@ static int __devinit wl12xx_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto out_hw_pg_ver;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	goto out;</div><div class='ctx'> </div><div class='ctx'> out_hw_pg_ver:</div><div class='ctx'> 	device_remove_file(wl-&gt;dev, &amp;dev_attr_hw_pg_ver);</div><div class='hunk'>@@ -5557,13 +5357,14 @@ out_irq:</div><div class='ctx'> 	free_irq(wl-&gt;irq, wl);</div><div class='ctx'> </div><div class='ctx'> out_free_hw:</div><div class='del'>-	wl1271_free_hw(wl);</div><div class='add'>+	wlcore_free_hw(wl);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(wlcore_probe);</div><div class='ctx'> </div><div class='del'>-static int __devexit wl12xx_remove(struct platform_device *pdev)</div><div class='add'>+int __devexit wlcore_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wl1271 *wl = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -5573,38 +5374,11 @@ static int __devexit wl12xx_remove(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> 	wl1271_unregister_hw(wl);</div><div class='ctx'> 	free_irq(wl-&gt;irq, wl);</div><div class='del'>-	wl1271_free_hw(wl);</div><div class='add'>+	wlcore_free_hw(wl);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static const struct platform_device_id wl12xx_id_table[] __devinitconst = {</div><div class='del'>-	{ "wl12xx", 0 },</div><div class='del'>-	{  } /* Terminating Entry */</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(platform, wl12xx_id_table);</div><div class='del'>-</div><div class='del'>-static struct platform_driver wl12xx_driver = {</div><div class='del'>-	.probe		= wl12xx_probe,</div><div class='del'>-	.remove		= __devexit_p(wl12xx_remove),</div><div class='del'>-	.id_table	= wl12xx_id_table,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name	= "wl12xx_driver",</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init wl12xx_init(void)</div><div class='del'>-{</div><div class='del'>-	return platform_driver_register(&amp;wl12xx_driver);</div><div class='del'>-}</div><div class='del'>-module_init(wl12xx_init);</div><div class='del'>-</div><div class='del'>-static void __exit wl12xx_exit(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;wl12xx_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(wl12xx_exit);</div><div class='add'>+EXPORT_SYMBOL_GPL(wlcore_remove);</div><div class='ctx'> </div><div class='ctx'> u32 wl12xx_debug_level = DEBUG_NONE;</div><div class='ctx'> EXPORT_SYMBOL_GPL(wl12xx_debug_level);</div><div class='hunk'>@@ -5618,6 +5392,9 @@ MODULE_PARM_DESC(fwlog,</div><div class='ctx'> module_param(bug_on_recovery, bool, S_IRUSR | S_IWUSR);</div><div class='ctx'> MODULE_PARM_DESC(bug_on_recovery, "BUG() on fw recovery");</div><div class='ctx'> </div><div class='add'>+module_param(no_recovery, bool, S_IRUSR | S_IWUSR);</div><div class='add'>+MODULE_PARM_DESC(no_recovery, "Prevent HW recovery. FW will remain stuck.");</div><div class='add'>+</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Luciano Coelho &lt;coelho@ti.com&gt;");</div><div class='ctx'> MODULE_AUTHOR("Juuso Oikarinen &lt;juuso.oikarinen@nokia.com&gt;");</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/ps.c b/drivers/net/wireless/ti/wlcore/ps.c<br/>index 78f598b4f97b..756eee2257b4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/ps.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/ps.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/ps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/ps.c</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include "reg.h"</div><div class='ctx'> #include "ps.h"</div><div class='ctx'> #include "io.h"</div><div class='ctx'> #include "tx.h"</div><div class='hunk'>@@ -62,7 +61,7 @@ void wl1271_elp_work(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	wl1271_debug(DEBUG_PSM, "chip to elp");</div><div class='del'>-	wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_SLEEP);</div><div class='add'>+	wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG, ELPCTRL_SLEEP);</div><div class='ctx'> 	set_bit(WL1271_FLAG_IN_ELP, &amp;wl-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -74,6 +73,9 @@ void wl1271_ps_elp_sleep(struct wl1271 *wl)</div><div class='ctx'> {</div><div class='ctx'> 	struct wl12xx_vif *wlvif;</div><div class='ctx'> </div><div class='add'>+	if (wl-&gt;quirks &amp; WLCORE_QUIRK_NO_ELP)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	/* we shouldn't get consecutive sleep requests */</div><div class='ctx'> 	if (WARN_ON(test_and_set_bit(WL1271_FLAG_ELP_REQUESTED, &amp;wl-&gt;flags)))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -125,7 +127,7 @@ int wl1271_ps_elp_wakeup(struct wl1271 *wl)</div><div class='ctx'> 		wl-&gt;elp_compl = &amp;compl;</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;wl-&gt;wl_lock, flags);</div><div class='ctx'> </div><div class='del'>-	wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_WAKE_UP);</div><div class='add'>+	wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG, ELPCTRL_WAKE_UP);</div><div class='ctx'> </div><div class='ctx'> 	if (!pending) {</div><div class='ctx'> 		ret = wait_for_completion_timeout(</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/ps.h b/drivers/net/wireless/ti/wlcore/ps.h<br/>index 5f19d4fbbf27..de4f9da8ed26 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/ps.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/ps.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/ps.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/ps.h</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #ifndef __PS_H__</div><div class='ctx'> #define __PS_H__</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "acx.h"</div><div class='ctx'> </div><div class='ctx'> int wl1271_ps_set_mode(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/rx.c b/drivers/net/wireless/ti/wlcore/rx.c<br/>index cfa6071704c5..d6a3c6b07827 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/rx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/rx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/rx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/rx.c</a></div><div class='hunk'>@@ -24,34 +24,36 @@</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "acx.h"</div><div class='del'>-#include "reg.h"</div><div class='ctx'> #include "rx.h"</div><div class='ctx'> #include "tx.h"</div><div class='ctx'> #include "io.h"</div><div class='add'>+#include "hw_ops.h"</div><div class='ctx'> </div><div class='del'>-static u8 wl12xx_rx_get_mem_block(struct wl12xx_fw_status *status,</div><div class='del'>-				  u32 drv_rx_counter)</div><div class='del'>-{</div><div class='del'>-	return le32_to_cpu(status-&gt;rx_pkt_descs[drv_rx_counter]) &amp;</div><div class='del'>-		RX_MEM_BLOCK_MASK;</div><div class='del'>-}</div><div class='add'>+/*</div><div class='add'>+ * TODO: this is here just for now, it must be removed when the data</div><div class='add'>+ * operations are in place.</div><div class='add'>+ */</div><div class='add'>+#include "../wl12xx/reg.h"</div><div class='ctx'> </div><div class='del'>-static u32 wl12xx_rx_get_buf_size(struct wl12xx_fw_status *status,</div><div class='del'>-				 u32 drv_rx_counter)</div><div class='add'>+static u32 wlcore_rx_get_buf_size(struct wl1271 *wl,</div><div class='add'>+				  u32 rx_pkt_desc)</div><div class='ctx'> {</div><div class='del'>-	return (le32_to_cpu(status-&gt;rx_pkt_descs[drv_rx_counter]) &amp;</div><div class='del'>-		RX_BUF_SIZE_MASK) &gt;&gt; RX_BUF_SIZE_SHIFT_DIV;</div><div class='add'>+	if (wl-&gt;quirks &amp; WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN)</div><div class='add'>+		return (rx_pkt_desc &amp; ALIGNED_RX_BUF_SIZE_MASK) &gt;&gt;</div><div class='add'>+		       ALIGNED_RX_BUF_SIZE_SHIFT;</div><div class='add'>+</div><div class='add'>+	return (rx_pkt_desc &amp; RX_BUF_SIZE_MASK) &gt;&gt; RX_BUF_SIZE_SHIFT_DIV;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool wl12xx_rx_get_unaligned(struct wl12xx_fw_status *status,</div><div class='del'>-				    u32 drv_rx_counter)</div><div class='add'>+static u32 wlcore_rx_get_align_buf_size(struct wl1271 *wl, u32 pkt_len)</div><div class='ctx'> {</div><div class='del'>-	/* Convert the value to bool */</div><div class='del'>-	return !!(le32_to_cpu(status-&gt;rx_pkt_descs[drv_rx_counter]) &amp;</div><div class='del'>-		RX_BUF_UNALIGNED_PAYLOAD);</div><div class='add'>+	if (wl-&gt;quirks &amp; WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN)</div><div class='add'>+		return ALIGN(pkt_len, WL12XX_BUS_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	return pkt_len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void wl1271_rx_status(struct wl1271 *wl,</div><div class='hunk'>@@ -66,10 +68,10 @@ static void wl1271_rx_status(struct wl1271 *wl,</div><div class='ctx'> 	else</div><div class='ctx'> 		status-&gt;band = IEEE80211_BAND_5GHZ;</div><div class='ctx'> </div><div class='del'>-	status-&gt;rate_idx = wl1271_rate_to_idx(desc-&gt;rate, status-&gt;band);</div><div class='add'>+	status-&gt;rate_idx = wlcore_rate_to_idx(wl, desc-&gt;rate, status-&gt;band);</div><div class='ctx'> </div><div class='ctx'> 	/* 11n support */</div><div class='del'>-	if (desc-&gt;rate &lt;= CONF_HW_RXTX_RATE_MCS0)</div><div class='add'>+	if (desc-&gt;rate &lt;= wl-&gt;hw_min_ht_rate)</div><div class='ctx'> 		status-&gt;flag |= RX_FLAG_HT;</div><div class='ctx'> </div><div class='ctx'> 	status-&gt;signal = desc-&gt;rssi;</div><div class='hunk'>@@ -98,7 +100,7 @@ static void wl1271_rx_status(struct wl1271 *wl,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,</div><div class='del'>-				 bool unaligned, u8 *hlid)</div><div class='add'>+				 enum wl_rx_buf_align rx_align, u8 *hlid)</div><div class='ctx'> {</div><div class='ctx'> 	struct wl1271_rx_descriptor *desc;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='hunk'>@@ -106,8 +108,9 @@ static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,</div><div class='ctx'> 	u8 *buf;</div><div class='ctx'> 	u8 beacon = 0;</div><div class='ctx'> 	u8 is_data = 0;</div><div class='del'>-	u8 reserved = unaligned ? NET_IP_ALIGN : 0;</div><div class='add'>+	u8 reserved = 0;</div><div class='ctx'> 	u16 seq_num;</div><div class='add'>+	u32 pkt_data_len;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * In PLT mode we seem to get frames and mac80211 warns about them,</div><div class='hunk'>@@ -116,6 +119,16 @@ static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,</div><div class='ctx'> 	if (unlikely(wl-&gt;plt))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	pkt_data_len = wlcore_hw_get_rx_packet_len(wl, data, length);</div><div class='add'>+	if (!pkt_data_len) {</div><div class='add'>+		wl1271_error("Invalid packet arrived from HW. length %d",</div><div class='add'>+			     length);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_align == WLCORE_RX_BUF_UNALIGNED)</div><div class='add'>+		reserved = NET_IP_ALIGN;</div><div class='add'>+</div><div class='ctx'> 	/* the data read starts with the descriptor */</div><div class='ctx'> 	desc = (struct wl1271_rx_descriptor *) data;</div><div class='ctx'> </div><div class='hunk'>@@ -142,8 +155,8 @@ static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* skb length not included rx descriptor */</div><div class='del'>-	skb = __dev_alloc_skb(length + reserved - sizeof(*desc), GFP_KERNEL);</div><div class='add'>+	/* skb length not including rx descriptor */</div><div class='add'>+	skb = __dev_alloc_skb(pkt_data_len + reserved, GFP_KERNEL);</div><div class='ctx'> 	if (!skb) {</div><div class='ctx'> 		wl1271_error("Couldn't allocate RX frame");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -152,7 +165,7 @@ static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,</div><div class='ctx'> 	/* reserve the unaligned payload(if any) */</div><div class='ctx'> 	skb_reserve(skb, reserved);</div><div class='ctx'> </div><div class='del'>-	buf = skb_put(skb, length - sizeof(*desc));</div><div class='add'>+	buf = skb_put(skb, pkt_data_len);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Copy packets from aggregation buffer to the skbs without rx</div><div class='hunk'>@@ -160,7 +173,10 @@ static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,</div><div class='ctx'> 	 * packets copy the packets in offset of 2 bytes guarantee IP header</div><div class='ctx'> 	 * payload aligned to 4 bytes.</div><div class='ctx'> 	 */</div><div class='del'>-	memcpy(buf, data + sizeof(*desc), length - sizeof(*desc));</div><div class='add'>+	memcpy(buf, data + sizeof(*desc), pkt_data_len);</div><div class='add'>+	if (rx_align == WLCORE_RX_BUF_PADDED)</div><div class='add'>+		skb_pull(skb, NET_IP_ALIGN);</div><div class='add'>+</div><div class='ctx'> 	*hlid = desc-&gt;hlid;</div><div class='ctx'> </div><div class='ctx'> 	hdr = (struct ieee80211_hdr *)skb-&gt;data;</div><div class='hunk'>@@ -177,36 +193,35 @@ static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,</div><div class='ctx'> 		     beacon ? "beacon" : "",</div><div class='ctx'> 		     seq_num, *hlid);</div><div class='ctx'> </div><div class='del'>-	skb_trim(skb, skb-&gt;len - desc-&gt;pad_len);</div><div class='del'>-</div><div class='ctx'> 	skb_queue_tail(&amp;wl-&gt;deferred_rx_queue, skb);</div><div class='ctx'> 	queue_work(wl-&gt;freezable_wq, &amp;wl-&gt;netstack_work);</div><div class='ctx'> </div><div class='ctx'> 	return is_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void wl12xx_rx(struct wl1271 *wl, struct wl12xx_fw_status *status)</div><div class='add'>+void wl12xx_rx(struct wl1271 *wl, struct wl_fw_status *status)</div><div class='ctx'> {</div><div class='del'>-	struct wl1271_acx_mem_map *wl_mem_map = wl-&gt;target_mem_map;</div><div class='ctx'> 	unsigned long active_hlids[BITS_TO_LONGS(WL12XX_MAX_LINKS)] = {0};</div><div class='ctx'> 	u32 buf_size;</div><div class='ctx'> 	u32 fw_rx_counter  = status-&gt;fw_rx_counter &amp; NUM_RX_PKT_DESC_MOD_MASK;</div><div class='ctx'> 	u32 drv_rx_counter = wl-&gt;rx_counter &amp; NUM_RX_PKT_DESC_MOD_MASK;</div><div class='ctx'> 	u32 rx_counter;</div><div class='del'>-	u32 mem_block;</div><div class='del'>-	u32 pkt_length;</div><div class='del'>-	u32 pkt_offset;</div><div class='add'>+	u32 pkt_len, align_pkt_len;</div><div class='add'>+	u32 pkt_offset, des;</div><div class='ctx'> 	u8 hlid;</div><div class='del'>-	bool unaligned = false;</div><div class='add'>+	enum wl_rx_buf_align rx_align;</div><div class='ctx'> </div><div class='ctx'> 	while (drv_rx_counter != fw_rx_counter) {</div><div class='ctx'> 		buf_size = 0;</div><div class='ctx'> 		rx_counter = drv_rx_counter;</div><div class='ctx'> 		while (rx_counter != fw_rx_counter) {</div><div class='del'>-			pkt_length = wl12xx_rx_get_buf_size(status, rx_counter);</div><div class='del'>-			if (buf_size + pkt_length &gt; WL1271_AGGR_BUFFER_SIZE)</div><div class='add'>+			des = le32_to_cpu(status-&gt;rx_pkt_descs[rx_counter]);</div><div class='add'>+			pkt_len = wlcore_rx_get_buf_size(wl, des);</div><div class='add'>+			align_pkt_len = wlcore_rx_get_align_buf_size(wl,</div><div class='add'>+								     pkt_len);</div><div class='add'>+			if (buf_size + align_pkt_len &gt; WL1271_AGGR_BUFFER_SIZE)</div><div class='ctx'> 				break;</div><div class='del'>-			buf_size += pkt_length;</div><div class='add'>+			buf_size += align_pkt_len;</div><div class='ctx'> 			rx_counter++;</div><div class='ctx'> 			rx_counter &amp;= NUM_RX_PKT_DESC_MOD_MASK;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -216,38 +231,18 @@ void wl12xx_rx(struct wl1271 *wl, struct wl12xx_fw_status *status)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (wl-&gt;chip.id != CHIP_ID_1283_PG20) {</div><div class='del'>-			/*</div><div class='del'>-			 * Choose the block we want to read</div><div class='del'>-			 * For aggregated packets, only the first memory block</div><div class='del'>-			 * should be retrieved. The FW takes care of the rest.</div><div class='del'>-			 */</div><div class='del'>-			mem_block = wl12xx_rx_get_mem_block(status,</div><div class='del'>-							    drv_rx_counter);</div><div class='del'>-</div><div class='del'>-			wl-&gt;rx_mem_pool_addr.addr = (mem_block &lt;&lt; 8) +</div><div class='del'>-			   le32_to_cpu(wl_mem_map-&gt;packet_memory_pool_start);</div><div class='del'>-</div><div class='del'>-			wl-&gt;rx_mem_pool_addr.addr_extra =</div><div class='del'>-				wl-&gt;rx_mem_pool_addr.addr + 4;</div><div class='del'>-</div><div class='del'>-			wl1271_write(wl, WL1271_SLV_REG_DATA,</div><div class='del'>-				     &amp;wl-&gt;rx_mem_pool_addr,</div><div class='del'>-				     sizeof(wl-&gt;rx_mem_pool_addr), false);</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		/* Read all available packets at once */</div><div class='del'>-		wl1271_read(wl, WL1271_SLV_MEM_DATA, wl-&gt;aggr_buf,</div><div class='del'>-				buf_size, true);</div><div class='add'>+		des = le32_to_cpu(status-&gt;rx_pkt_descs[drv_rx_counter]);</div><div class='add'>+		wlcore_hw_prepare_read(wl, des, buf_size);</div><div class='add'>+		wlcore_read_data(wl, REG_SLV_MEM_DATA, wl-&gt;aggr_buf,</div><div class='add'>+				 buf_size, true);</div><div class='ctx'> </div><div class='ctx'> 		/* Split data into separate packets */</div><div class='ctx'> 		pkt_offset = 0;</div><div class='ctx'> 		while (pkt_offset &lt; buf_size) {</div><div class='del'>-			pkt_length = wl12xx_rx_get_buf_size(status,</div><div class='del'>-					drv_rx_counter);</div><div class='del'>-</div><div class='del'>-			unaligned = wl12xx_rx_get_unaligned(status,</div><div class='del'>-					drv_rx_counter);</div><div class='add'>+			des = le32_to_cpu(status-&gt;rx_pkt_descs[drv_rx_counter]);</div><div class='add'>+			pkt_len = wlcore_rx_get_buf_size(wl, des);</div><div class='add'>+			rx_align = wlcore_hw_get_rx_buf_align(wl, des);</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='ctx'> 			 * the handle data call can only fail in memory-outage</div><div class='hunk'>@@ -256,7 +251,7 @@ void wl12xx_rx(struct wl1271 *wl, struct wl12xx_fw_status *status)</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (wl1271_rx_handle_data(wl,</div><div class='ctx'> 						  wl-&gt;aggr_buf + pkt_offset,</div><div class='del'>-						  pkt_length, unaligned,</div><div class='add'>+						  pkt_len, rx_align,</div><div class='ctx'> 						  &amp;hlid) == 1) {</div><div class='ctx'> 				if (hlid &lt; WL12XX_MAX_LINKS)</div><div class='ctx'> 					__set_bit(hlid, active_hlids);</div><div class='hunk'>@@ -269,7 +264,7 @@ void wl12xx_rx(struct wl1271 *wl, struct wl12xx_fw_status *status)</div><div class='ctx'> 			wl-&gt;rx_counter++;</div><div class='ctx'> 			drv_rx_counter++;</div><div class='ctx'> 			drv_rx_counter &amp;= NUM_RX_PKT_DESC_MOD_MASK;</div><div class='del'>-			pkt_offset += pkt_length;</div><div class='add'>+			pkt_offset += wlcore_rx_get_align_buf_size(wl, pkt_len);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -277,8 +272,47 @@ void wl12xx_rx(struct wl1271 *wl, struct wl12xx_fw_status *status)</div><div class='ctx'> 	 * Write the driver's packet counter to the FW. This is only required</div><div class='ctx'> 	 * for older hardware revisions</div><div class='ctx'> 	 */</div><div class='del'>-	if (wl-&gt;quirks &amp; WL12XX_QUIRK_END_OF_TRANSACTION)</div><div class='del'>-		wl1271_write32(wl, RX_DRIVER_COUNTER_ADDRESS, wl-&gt;rx_counter);</div><div class='add'>+	if (wl-&gt;quirks &amp; WLCORE_QUIRK_END_OF_TRANSACTION)</div><div class='add'>+		wl1271_write32(wl, WL12XX_REG_RX_DRIVER_COUNTER,</div><div class='add'>+			       wl-&gt;rx_counter);</div><div class='ctx'> </div><div class='ctx'> 	wl12xx_rearm_rx_streaming(wl, active_hlids);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+int wl1271_rx_filter_enable(struct wl1271 *wl,</div><div class='add'>+			    int index, bool enable,</div><div class='add'>+			    struct wl12xx_rx_filter *filter)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (wl-&gt;rx_filter_enabled[index] == enable) {</div><div class='add'>+		wl1271_warning("Request to enable an already "</div><div class='add'>+			     "enabled rx filter %d", index);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = wl1271_acx_set_rx_filter(wl, index, enable, filter);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		wl1271_error("Failed to %s rx data filter %d (err=%d)",</div><div class='add'>+			     enable ? "enable" : "disable", index, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wl-&gt;rx_filter_enabled[index] = enable;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wl1271_rx_filter_clear_all(struct wl1271 *wl)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; WL1271_MAX_RX_FILTERS; i++) {</div><div class='add'>+		if (!wl-&gt;rx_filter_enabled[i])</div><div class='add'>+			continue;</div><div class='add'>+		wl1271_rx_filter_enable(wl, i, 0, NULL);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_PM */</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/rx.h b/drivers/net/wireless/ti/wlcore/rx.h<br/>index 86ba6b1d0cdc..e9a162a864ca 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/rx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/rx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/rx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/rx.h</a></div><div class='hunk'>@@ -96,9 +96,19 @@</div><div class='ctx'> #define RX_MEM_BLOCK_MASK            0xFF</div><div class='ctx'> #define RX_BUF_SIZE_MASK             0xFFF00</div><div class='ctx'> #define RX_BUF_SIZE_SHIFT_DIV        6</div><div class='add'>+#define ALIGNED_RX_BUF_SIZE_MASK     0xFFFF00</div><div class='add'>+#define ALIGNED_RX_BUF_SIZE_SHIFT    8</div><div class='add'>+</div><div class='ctx'> /* If set, the start of IP payload is not 4 bytes aligned */</div><div class='ctx'> #define RX_BUF_UNALIGNED_PAYLOAD     BIT(20)</div><div class='ctx'> </div><div class='add'>+/* Describes the alignment state of a Rx buffer */</div><div class='add'>+enum wl_rx_buf_align {</div><div class='add'>+	WLCORE_RX_BUF_ALIGNED,</div><div class='add'>+	WLCORE_RX_BUF_UNALIGNED,</div><div class='add'>+	WLCORE_RX_BUF_PADDED,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> 	WL12XX_RX_CLASS_UNKNOWN,</div><div class='ctx'> 	WL12XX_RX_CLASS_MANAGEMENT,</div><div class='hunk'>@@ -126,7 +136,11 @@ struct wl1271_rx_descriptor {</div><div class='ctx'> 	u8  reserved;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-void wl12xx_rx(struct wl1271 *wl, struct wl12xx_fw_status *status);</div><div class='add'>+void wl12xx_rx(struct wl1271 *wl, struct wl_fw_status *status);</div><div class='ctx'> u8 wl1271_rate_to_idx(int rate, enum ieee80211_band band);</div><div class='add'>+int wl1271_rx_filter_enable(struct wl1271 *wl,</div><div class='add'>+			    int index, bool enable,</div><div class='add'>+			    struct wl12xx_rx_filter *filter);</div><div class='add'>+void wl1271_rx_filter_clear_all(struct wl1271 *wl);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/scan.c b/drivers/net/wireless/ti/wlcore/scan.c<br/>index fcba055ef196..ade21a011c45 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/scan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/scan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/scan.c</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ieee80211.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "cmd.h"</div><div class='ctx'> #include "scan.h"</div><div class='hunk'>@@ -417,6 +417,23 @@ wl1271_scan_get_sched_scan_channels(struct wl1271 *wl,</div><div class='ctx'> 	int i, j;</div><div class='ctx'> 	u32 flags;</div><div class='ctx'> 	bool force_passive = !req-&gt;n_ssids;</div><div class='add'>+	u32 min_dwell_time_active, max_dwell_time_active, delta_per_probe;</div><div class='add'>+	u32 dwell_time_passive, dwell_time_dfs;</div><div class='add'>+</div><div class='add'>+	if (band == IEEE80211_BAND_5GHZ)</div><div class='add'>+		delta_per_probe = c-&gt;dwell_time_delta_per_probe_5;</div><div class='add'>+	else</div><div class='add'>+		delta_per_probe = c-&gt;dwell_time_delta_per_probe;</div><div class='add'>+</div><div class='add'>+	min_dwell_time_active = c-&gt;base_dwell_time +</div><div class='add'>+		 req-&gt;n_ssids * c-&gt;num_probe_reqs * delta_per_probe;</div><div class='add'>+</div><div class='add'>+	max_dwell_time_active = min_dwell_time_active + c-&gt;max_dwell_time_delta;</div><div class='add'>+</div><div class='add'>+	min_dwell_time_active = DIV_ROUND_UP(min_dwell_time_active, 1000);</div><div class='add'>+	max_dwell_time_active = DIV_ROUND_UP(max_dwell_time_active, 1000);</div><div class='add'>+	dwell_time_passive = DIV_ROUND_UP(c-&gt;dwell_time_passive, 1000);</div><div class='add'>+	dwell_time_dfs = DIV_ROUND_UP(c-&gt;dwell_time_dfs, 1000);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0, j = start;</div><div class='ctx'> 	     i &lt; req-&gt;n_channels &amp;&amp; j &lt; max_channels;</div><div class='hunk'>@@ -440,21 +457,24 @@ wl1271_scan_get_sched_scan_channels(struct wl1271 *wl,</div><div class='ctx'> 				     req-&gt;channels[i]-&gt;flags);</div><div class='ctx'> 			wl1271_debug(DEBUG_SCAN, "max_power %d",</div><div class='ctx'> 				     req-&gt;channels[i]-&gt;max_power);</div><div class='add'>+			wl1271_debug(DEBUG_SCAN, "min_dwell_time %d max dwell time %d",</div><div class='add'>+				     min_dwell_time_active,</div><div class='add'>+				     max_dwell_time_active);</div><div class='ctx'> </div><div class='ctx'> 			if (flags &amp; IEEE80211_CHAN_RADAR) {</div><div class='ctx'> 				channels[j].flags |= SCAN_CHANNEL_FLAGS_DFS;</div><div class='ctx'> </div><div class='ctx'> 				channels[j].passive_duration =</div><div class='del'>-					cpu_to_le16(c-&gt;dwell_time_dfs);</div><div class='add'>+					cpu_to_le16(dwell_time_dfs);</div><div class='ctx'> 			} else {</div><div class='ctx'> 				channels[j].passive_duration =</div><div class='del'>-					cpu_to_le16(c-&gt;dwell_time_passive);</div><div class='add'>+					cpu_to_le16(dwell_time_passive);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			channels[j].min_duration =</div><div class='del'>-				cpu_to_le16(c-&gt;min_dwell_time_active);</div><div class='add'>+				cpu_to_le16(min_dwell_time_active);</div><div class='ctx'> 			channels[j].max_duration =</div><div class='del'>-				cpu_to_le16(c-&gt;max_dwell_time_active);</div><div class='add'>+				cpu_to_le16(max_dwell_time_active);</div><div class='ctx'> </div><div class='ctx'> 			channels[j].tx_power_att = req-&gt;channels[i]-&gt;max_power;</div><div class='ctx'> 			channels[j].channel = req-&gt;channels[i]-&gt;hw_value;</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/scan.h b/drivers/net/wireless/ti/wlcore/scan.h<br/>index 96ff457a3a0b..81ee36ac2078 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/scan.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/scan.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/scan.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/scan.h</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #ifndef __SCAN_H__</div><div class='ctx'> #define __SCAN_H__</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> </div><div class='ctx'> int wl1271_scan(struct wl1271 *wl, struct ieee80211_vif *vif,</div><div class='ctx'> 		const u8 *ssid, size_t ssid_len,</div><div class='hunk'>@@ -55,7 +55,7 @@ void wl1271_scan_sched_scan_results(struct wl1271 *wl);</div><div class='ctx'> #define WL1271_SCAN_BAND_2_4_GHZ 0</div><div class='ctx'> #define WL1271_SCAN_BAND_5_GHZ 1</div><div class='ctx'> </div><div class='del'>-#define WL1271_SCAN_TIMEOUT    10000 /* msec */</div><div class='add'>+#define WL1271_SCAN_TIMEOUT    30000 /* msec */</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='ctx'> 	WL1271_SCAN_STATE_IDLE,</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/sdio.c b/drivers/net/wireless/ti/wlcore/sdio.c<br/>index 4b3c32774bae..0a72347cfc4c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/sdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/sdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/sdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/sdio.c</a></div><div class='hunk'>@@ -33,7 +33,7 @@</div><div class='ctx'> #include &lt;linux/wl12xx.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "wl12xx_80211.h"</div><div class='ctx'> #include "io.h"</div><div class='ctx'> </div><div class='hunk'>@@ -76,7 +76,7 @@ static void wl12xx_sdio_raw_read(struct device *child, int addr, void *buf,</div><div class='ctx'> </div><div class='ctx'> 	sdio_claim_host(func);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(addr == HW_ACCESS_ELP_CTRL_REG_ADDR)) {</div><div class='add'>+	if (unlikely(addr == HW_ACCESS_ELP_CTRL_REG)) {</div><div class='ctx'> 		((u8 *)buf)[0] = sdio_f0_readb(func, addr, &amp;ret);</div><div class='ctx'> 		dev_dbg(child-&gt;parent, "sdio read 52 addr 0x%x, byte 0x%02x\n",</div><div class='ctx'> 			addr, ((u8 *)buf)[0]);</div><div class='hunk'>@@ -105,7 +105,7 @@ static void wl12xx_sdio_raw_write(struct device *child, int addr, void *buf,</div><div class='ctx'> </div><div class='ctx'> 	sdio_claim_host(func);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(addr == HW_ACCESS_ELP_CTRL_REG_ADDR)) {</div><div class='add'>+	if (unlikely(addr == HW_ACCESS_ELP_CTRL_REG)) {</div><div class='ctx'> 		sdio_f0_writeb(func, ((u8 *)buf)[0], addr, &amp;ret);</div><div class='ctx'> 		dev_dbg(child-&gt;parent, "sdio write 52 addr 0x%x, byte 0x%02x\n",</div><div class='ctx'> 			addr, ((u8 *)buf)[0]);</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/spi.c b/drivers/net/wireless/ti/wlcore/spi.c<br/>index 2fc18a8dcce8..553cd3cbb98c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/spi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/spi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/spi.c</a></div><div class='hunk'>@@ -30,12 +30,10 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "wl12xx_80211.h"</div><div class='ctx'> #include "io.h"</div><div class='ctx'> </div><div class='del'>-#include "reg.h"</div><div class='del'>-</div><div class='ctx'> #define WSPI_CMD_READ                 0x40000000</div><div class='ctx'> #define WSPI_CMD_WRITE                0x00000000</div><div class='ctx'> #define WSPI_CMD_FIXED                0x20000000</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/testmode.c b/drivers/net/wireless/ti/wlcore/testmode.c<br/>index 1e93bb9c0246..0e59ea2cdd39 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/testmode.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/testmode.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/testmode.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/testmode.c</a></div><div class='hunk'>@@ -25,10 +25,9 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;net/genetlink.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "acx.h"</div><div class='del'>-#include "reg.h"</div><div class='ctx'> #include "ps.h"</div><div class='ctx'> #include "io.h"</div><div class='ctx'> </div><div class='hunk'>@@ -116,7 +115,8 @@ static int wl1271_tm_cmd_test(struct wl1271 *wl, struct nlattr *tb[])</div><div class='ctx'> 			goto out_sleep;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		NLA_PUT(skb, WL1271_TM_ATTR_DATA, buf_len, buf);</div><div class='add'>+		if (nla_put(skb, WL1271_TM_ATTR_DATA, buf_len, buf))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 		ret = cfg80211_testmode_reply(skb);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto out_sleep;</div><div class='hunk'>@@ -178,7 +178,8 @@ static int wl1271_tm_cmd_interrogate(struct wl1271 *wl, struct nlattr *tb[])</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, WL1271_TM_ATTR_DATA, sizeof(*cmd), cmd);</div><div class='add'>+	if (nla_put(skb, WL1271_TM_ATTR_DATA, sizeof(*cmd), cmd))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	ret = cfg80211_testmode_reply(skb);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto out_free;</div><div class='hunk'>@@ -297,7 +298,8 @@ static int wl12xx_tm_cmd_get_mac(struct wl1271 *wl, struct nlattr *tb[])</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	NLA_PUT(skb, WL1271_TM_ATTR_DATA, ETH_ALEN, mac_addr);</div><div class='add'>+	if (nla_put(skb, WL1271_TM_ATTR_DATA, ETH_ALEN, mac_addr))</div><div class='add'>+		goto nla_put_failure;</div><div class='ctx'> 	ret = cfg80211_testmode_reply(skb);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto out;</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/testmode.h b/drivers/net/wireless/ti/wlcore/testmode.h<br/>index 8071654259ea..8071654259ea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/testmode.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/testmode.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/testmode.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/testmode.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/tx.c b/drivers/net/wireless/ti/wlcore/tx.c<br/>index 43ae49143d68..6893bc207994 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/tx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/tx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/tx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/tx.c</a></div><div class='hunk'>@@ -25,13 +25,19 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "wl12xx.h"</div><div class='add'>+#include "wlcore.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "io.h"</div><div class='del'>-#include "reg.h"</div><div class='ctx'> #include "ps.h"</div><div class='ctx'> #include "tx.h"</div><div class='ctx'> #include "event.h"</div><div class='add'>+#include "hw_ops.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TODO: this is here just for now, it must be removed when the data</div><div class='add'>+ * operations are in place.</div><div class='add'>+ */</div><div class='add'>+#include "../wl12xx/reg.h"</div><div class='ctx'> </div><div class='ctx'> static int wl1271_set_default_wep_key(struct wl1271 *wl,</div><div class='ctx'> 				      struct wl12xx_vif *wlvif, u8 id)</div><div class='hunk'>@@ -56,8 +62,8 @@ static int wl1271_alloc_tx_id(struct wl1271 *wl, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	int id;</div><div class='ctx'> </div><div class='del'>-	id = find_first_zero_bit(wl-&gt;tx_frames_map, ACX_TX_DESCRIPTORS);</div><div class='del'>-	if (id &gt;= ACX_TX_DESCRIPTORS)</div><div class='add'>+	id = find_first_zero_bit(wl-&gt;tx_frames_map, wl-&gt;num_tx_desc);</div><div class='add'>+	if (id &gt;= wl-&gt;num_tx_desc)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	__set_bit(id, wl-&gt;tx_frames_map);</div><div class='hunk'>@@ -69,7 +75,7 @@ static int wl1271_alloc_tx_id(struct wl1271 *wl, struct sk_buff *skb)</div><div class='ctx'> static void wl1271_free_tx_id(struct wl1271 *wl, int id)</div><div class='ctx'> {</div><div class='ctx'> 	if (__test_and_clear_bit(id, wl-&gt;tx_frames_map)) {</div><div class='del'>-		if (unlikely(wl-&gt;tx_frames_cnt == ACX_TX_DESCRIPTORS))</div><div class='add'>+		if (unlikely(wl-&gt;tx_frames_cnt == wl-&gt;num_tx_desc))</div><div class='ctx'> 			clear_bit(WL1271_FLAG_FW_TX_BUSY, &amp;wl-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 		wl-&gt;tx_frames[id] = NULL;</div><div class='hunk'>@@ -167,14 +173,15 @@ u8 wl12xx_tx_get_hlid(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='ctx'> 		return wlvif-&gt;dev_hlid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int wl12xx_calc_packet_alignment(struct wl1271 *wl,</div><div class='del'>-						unsigned int packet_length)</div><div class='add'>+unsigned int wlcore_calc_packet_alignment(struct wl1271 *wl,</div><div class='add'>+					  unsigned int packet_length)</div><div class='ctx'> {</div><div class='del'>-	if (wl-&gt;quirks &amp; WL12XX_QUIRK_NO_BLOCKSIZE_ALIGNMENT)</div><div class='del'>-		return ALIGN(packet_length, WL1271_TX_ALIGN_TO);</div><div class='del'>-	else</div><div class='add'>+	if (wl-&gt;quirks &amp; WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN)</div><div class='ctx'> 		return ALIGN(packet_length, WL12XX_BUS_BLOCK_SIZE);</div><div class='add'>+	else</div><div class='add'>+		return ALIGN(packet_length, WL1271_TX_ALIGN_TO);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(wlcore_calc_packet_alignment);</div><div class='ctx'> </div><div class='ctx'> static int wl1271_tx_allocate(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='ctx'> 			      struct sk_buff *skb, u32 extra, u32 buf_offset,</div><div class='hunk'>@@ -182,10 +189,9 @@ static int wl1271_tx_allocate(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='ctx'> {</div><div class='ctx'> 	struct wl1271_tx_hw_descr *desc;</div><div class='ctx'> 	u32 total_len = skb-&gt;len + sizeof(struct wl1271_tx_hw_descr) + extra;</div><div class='del'>-	u32 len;</div><div class='ctx'> 	u32 total_blocks;</div><div class='ctx'> 	int id, ret = -EBUSY, ac;</div><div class='del'>-	u32 spare_blocks = wl-&gt;tx_spare_blocks;</div><div class='add'>+	u32 spare_blocks = wl-&gt;normal_tx_spare;</div><div class='ctx'> 	bool is_dummy = false;</div><div class='ctx'> </div><div class='ctx'> 	if (buf_offset + total_len &gt; WL1271_AGGR_BUFFER_SIZE)</div><div class='hunk'>@@ -196,30 +202,19 @@ static int wl1271_tx_allocate(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='ctx'> 	if (id &lt; 0)</div><div class='ctx'> 		return id;</div><div class='ctx'> </div><div class='del'>-	/* approximate the number of blocks required for this packet</div><div class='del'>-	   in the firmware */</div><div class='del'>-	len = wl12xx_calc_packet_alignment(wl, total_len);</div><div class='del'>-</div><div class='del'>-	/* in case of a dummy packet, use default amount of spare mem blocks */</div><div class='del'>-	if (unlikely(wl12xx_is_dummy_packet(wl, skb))) {</div><div class='add'>+	if (unlikely(wl12xx_is_dummy_packet(wl, skb)))</div><div class='ctx'> 		is_dummy = true;</div><div class='del'>-		spare_blocks = TX_HW_BLOCK_SPARE_DEFAULT;</div><div class='del'>-	}</div><div class='add'>+	else if (wlvif-&gt;is_gem)</div><div class='add'>+		spare_blocks = wl-&gt;gem_tx_spare;</div><div class='ctx'> </div><div class='del'>-	total_blocks = (len + TX_HW_BLOCK_SIZE - 1) / TX_HW_BLOCK_SIZE +</div><div class='del'>-		spare_blocks;</div><div class='add'>+	total_blocks = wlcore_hw_calc_tx_blocks(wl, total_len, spare_blocks);</div><div class='ctx'> </div><div class='ctx'> 	if (total_blocks &lt;= wl-&gt;tx_blocks_available) {</div><div class='ctx'> 		desc = (struct wl1271_tx_hw_descr *)skb_push(</div><div class='ctx'> 			skb, total_len - skb-&gt;len);</div><div class='ctx'> </div><div class='del'>-		/* HW descriptor fields change between wl127x and wl128x */</div><div class='del'>-		if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='del'>-			desc-&gt;wl128x_mem.total_mem_blocks = total_blocks;</div><div class='del'>-		} else {</div><div class='del'>-			desc-&gt;wl127x_mem.extra_blocks = spare_blocks;</div><div class='del'>-			desc-&gt;wl127x_mem.total_mem_blocks = total_blocks;</div><div class='del'>-		}</div><div class='add'>+		wlcore_hw_set_tx_desc_blocks(wl, desc, total_blocks,</div><div class='add'>+					     spare_blocks);</div><div class='ctx'> </div><div class='ctx'> 		desc-&gt;id = id;</div><div class='ctx'> </div><div class='hunk'>@@ -256,7 +251,7 @@ static void wl1271_tx_fill_hdr(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='ctx'> {</div><div class='ctx'> 	struct timespec ts;</div><div class='ctx'> 	struct wl1271_tx_hw_descr *desc;</div><div class='del'>-	int aligned_len, ac, rate_idx;</div><div class='add'>+	int ac, rate_idx;</div><div class='ctx'> 	s64 hosttime;</div><div class='ctx'> 	u16 tx_attr = 0;</div><div class='ctx'> 	__le16 frame_control;</div><div class='hunk'>@@ -329,44 +324,16 @@ static void wl1271_tx_fill_hdr(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tx_attr |= rate_idx &lt;&lt; TX_HW_ATTR_OFST_RATE_POLICY;</div><div class='del'>-	desc-&gt;reserved = 0;</div><div class='del'>-</div><div class='del'>-	aligned_len = wl12xx_calc_packet_alignment(wl, skb-&gt;len);</div><div class='del'>-</div><div class='del'>-	if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='del'>-		desc-&gt;wl128x_mem.extra_bytes = aligned_len - skb-&gt;len;</div><div class='del'>-		desc-&gt;length = cpu_to_le16(aligned_len &gt;&gt; 2);</div><div class='del'>-</div><div class='del'>-		wl1271_debug(DEBUG_TX, "tx_fill_hdr: hlid: %d "</div><div class='del'>-			     "tx_attr: 0x%x len: %d life: %d mem: %d",</div><div class='del'>-			     desc-&gt;hlid, tx_attr,</div><div class='del'>-			     le16_to_cpu(desc-&gt;length),</div><div class='del'>-			     le16_to_cpu(desc-&gt;life_time),</div><div class='del'>-			     desc-&gt;wl128x_mem.total_mem_blocks);</div><div class='del'>-	} else {</div><div class='del'>-		int pad;</div><div class='del'>-</div><div class='del'>-		/* Store the aligned length in terms of words */</div><div class='del'>-		desc-&gt;length = cpu_to_le16(aligned_len &gt;&gt; 2);</div><div class='del'>-</div><div class='del'>-		/* calculate number of padding bytes */</div><div class='del'>-		pad = aligned_len - skb-&gt;len;</div><div class='del'>-		tx_attr |= pad &lt;&lt; TX_HW_ATTR_OFST_LAST_WORD_PAD;</div><div class='del'>-</div><div class='del'>-		wl1271_debug(DEBUG_TX, "tx_fill_hdr: pad: %d hlid: %d "</div><div class='del'>-			     "tx_attr: 0x%x len: %d life: %d mem: %d", pad,</div><div class='del'>-			     desc-&gt;hlid, tx_attr,</div><div class='del'>-			     le16_to_cpu(desc-&gt;length),</div><div class='del'>-			     le16_to_cpu(desc-&gt;life_time),</div><div class='del'>-			     desc-&gt;wl127x_mem.total_mem_blocks);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* for WEP shared auth - no fw encryption is needed */</div><div class='ctx'> 	if (ieee80211_is_auth(frame_control) &amp;&amp;</div><div class='ctx'> 	    ieee80211_has_protected(frame_control))</div><div class='ctx'> 		tx_attr |= TX_HW_ATTR_HOST_ENCRYPT;</div><div class='ctx'> </div><div class='add'>+	desc-&gt;reserved = 0;</div><div class='ctx'> 	desc-&gt;tx_attr = cpu_to_le16(tx_attr);</div><div class='add'>+</div><div class='add'>+	wlcore_hw_set_tx_desc_data_len(wl, desc, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* caller must hold wl-&gt;mutex */</div><div class='hunk'>@@ -432,7 +399,7 @@ static int wl1271_prepare_tx_frame(struct wl1271 *wl, struct wl12xx_vif *wlvif,</div><div class='ctx'> 	 * In special cases, we want to align to a specific block size</div><div class='ctx'> 	 * (eg. for wl128x with SDIO we align to 256).</div><div class='ctx'> 	 */</div><div class='del'>-	total_len = wl12xx_calc_packet_alignment(wl, skb-&gt;len);</div><div class='add'>+	total_len = wlcore_calc_packet_alignment(wl, skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(wl-&gt;aggr_buf + buf_offset, skb-&gt;data, skb-&gt;len);</div><div class='ctx'> 	memset(wl-&gt;aggr_buf + buf_offset + skb-&gt;len, 0, total_len - skb-&gt;len);</div><div class='hunk'>@@ -718,8 +685,8 @@ void wl1271_tx_work_locked(struct wl1271 *wl)</div><div class='ctx'> 			 * Flush buffer and try again.</div><div class='ctx'> 			 */</div><div class='ctx'> 			wl1271_skb_queue_head(wl, wlvif, skb);</div><div class='del'>-			wl1271_write(wl, WL1271_SLV_MEM_DATA, wl-&gt;aggr_buf,</div><div class='del'>-				     buf_offset, true);</div><div class='add'>+			wlcore_write_data(wl, REG_SLV_MEM_DATA, wl-&gt;aggr_buf,</div><div class='add'>+					  buf_offset, true);</div><div class='ctx'> 			sent_packets = true;</div><div class='ctx'> 			buf_offset = 0;</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -753,8 +720,8 @@ void wl1271_tx_work_locked(struct wl1271 *wl)</div><div class='ctx'> </div><div class='ctx'> out_ack:</div><div class='ctx'> 	if (buf_offset) {</div><div class='del'>-		wl1271_write(wl, WL1271_SLV_MEM_DATA, wl-&gt;aggr_buf,</div><div class='del'>-				buf_offset, true);</div><div class='add'>+		wlcore_write_data(wl, REG_SLV_MEM_DATA, wl-&gt;aggr_buf,</div><div class='add'>+				  buf_offset, true);</div><div class='ctx'> 		sent_packets = true;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (sent_packets) {</div><div class='hunk'>@@ -762,8 +729,8 @@ out_ack:</div><div class='ctx'> 		 * Interrupt the firmware with the new packets. This is only</div><div class='ctx'> 		 * required for older hardware revisions</div><div class='ctx'> 		 */</div><div class='del'>-		if (wl-&gt;quirks &amp; WL12XX_QUIRK_END_OF_TRANSACTION)</div><div class='del'>-			wl1271_write32(wl, WL1271_HOST_WR_ACCESS,</div><div class='add'>+		if (wl-&gt;quirks &amp; WLCORE_QUIRK_END_OF_TRANSACTION)</div><div class='add'>+			wl1271_write32(wl, WL12XX_HOST_WR_ACCESS,</div><div class='ctx'> 				       wl-&gt;tx_packets_count);</div><div class='ctx'> </div><div class='ctx'> 		wl1271_handle_tx_low_watermark(wl);</div><div class='hunk'>@@ -792,11 +759,20 @@ static u8 wl1271_tx_get_rate_flags(u8 rate_class_index)</div><div class='ctx'> {</div><div class='ctx'> 	u8 flags = 0;</div><div class='ctx'> </div><div class='del'>-	if (rate_class_index &gt;= CONF_HW_RXTX_RATE_MCS_MIN &amp;&amp;</div><div class='del'>-	    rate_class_index &lt;= CONF_HW_RXTX_RATE_MCS_MAX)</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: use wl12xx constants when this code is moved to wl12xx, as</div><div class='add'>+	 * only it uses Tx-completion.</div><div class='add'>+	 */</div><div class='add'>+	if (rate_class_index &lt;= 8)</div><div class='ctx'> 		flags |= IEEE80211_TX_RC_MCS;</div><div class='del'>-	if (rate_class_index == CONF_HW_RXTX_RATE_MCS7_SGI)</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: use wl12xx constants when this code is moved to wl12xx, as</div><div class='add'>+	 * only it uses Tx-completion.</div><div class='add'>+	 */</div><div class='add'>+	if (rate_class_index == 0)</div><div class='ctx'> 		flags |= IEEE80211_TX_RC_SHORT_GI;</div><div class='add'>+</div><div class='ctx'> 	return flags;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -813,7 +789,7 @@ static void wl1271_tx_complete_packet(struct wl1271 *wl,</div><div class='ctx'> 	u8 retries = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* check for id legality */</div><div class='del'>-	if (unlikely(id &gt;= ACX_TX_DESCRIPTORS || wl-&gt;tx_frames[id] == NULL)) {</div><div class='add'>+	if (unlikely(id &gt;= wl-&gt;num_tx_desc || wl-&gt;tx_frames[id] == NULL)) {</div><div class='ctx'> 		wl1271_warning("TX result illegal id: %d", id);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -834,7 +810,7 @@ static void wl1271_tx_complete_packet(struct wl1271 *wl,</div><div class='ctx'> 	if (result-&gt;status == TX_SUCCESS) {</div><div class='ctx'> 		if (!(info-&gt;flags &amp; IEEE80211_TX_CTL_NO_ACK))</div><div class='ctx'> 			info-&gt;flags |= IEEE80211_TX_STAT_ACK;</div><div class='del'>-		rate = wl1271_rate_to_idx(result-&gt;rate_class_index,</div><div class='add'>+		rate = wlcore_rate_to_idx(wl, result-&gt;rate_class_index,</div><div class='ctx'> 					  wlvif-&gt;band);</div><div class='ctx'> 		rate_flags = wl1271_tx_get_rate_flags(result-&gt;rate_class_index);</div><div class='ctx'> 		retries = result-&gt;ack_failures;</div><div class='hunk'>@@ -929,6 +905,7 @@ void wl1271_tx_complete(struct wl1271 *wl)</div><div class='ctx'> 		wl-&gt;tx_results_count++;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(wl1271_tx_complete);</div><div class='ctx'> </div><div class='ctx'> void wl1271_tx_reset_link_queues(struct wl1271 *wl, u8 hlid)</div><div class='ctx'> {</div><div class='hunk'>@@ -1006,7 +983,7 @@ void wl12xx_tx_reset(struct wl1271 *wl, bool reset_tx_queues)</div><div class='ctx'> 	if (reset_tx_queues)</div><div class='ctx'> 		wl1271_handle_tx_low_watermark(wl);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ACX_TX_DESCRIPTORS; i++) {</div><div class='add'>+	for (i = 0; i &lt; wl-&gt;num_tx_desc; i++) {</div><div class='ctx'> 		if (wl-&gt;tx_frames[i] == NULL)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/tx.h b/drivers/net/wireless/ti/wlcore/tx.h<br/>index 5cf8c32d40d1..2fd6e5dc6f75 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/tx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/tx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/tx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/tx.h</a></div><div class='hunk'>@@ -25,9 +25,6 @@</div><div class='ctx'> #ifndef __TX_H__</div><div class='ctx'> #define __TX_H__</div><div class='ctx'> </div><div class='del'>-#define TX_HW_BLOCK_SPARE_DEFAULT        1</div><div class='del'>-#define TX_HW_BLOCK_SIZE                 252</div><div class='del'>-</div><div class='ctx'> #define TX_HW_MGMT_PKT_LIFETIME_TU       2000</div><div class='ctx'> #define TX_HW_AP_MODE_PKT_LIFETIME_TU    8000</div><div class='ctx'> </div><div class='hunk'>@@ -212,7 +209,7 @@ void wl1271_tx_complete(struct wl1271 *wl);</div><div class='ctx'> void wl12xx_tx_reset_wlvif(struct wl1271 *wl, struct wl12xx_vif *wlvif);</div><div class='ctx'> void wl12xx_tx_reset(struct wl1271 *wl, bool reset_tx_queues);</div><div class='ctx'> void wl1271_tx_flush(struct wl1271 *wl);</div><div class='del'>-u8 wl1271_rate_to_idx(int rate, enum ieee80211_band band);</div><div class='add'>+u8 wlcore_rate_to_idx(struct wl1271 *wl, u8 rate, enum ieee80211_band band);</div><div class='ctx'> u32 wl1271_tx_enabled_rates_get(struct wl1271 *wl, u32 rate_set,</div><div class='ctx'> 				enum ieee80211_band rate_band);</div><div class='ctx'> u32 wl1271_tx_min_rate_get(struct wl1271 *wl, u32 rate_set);</div><div class='hunk'>@@ -224,6 +221,8 @@ void wl1271_tx_reset_link_queues(struct wl1271 *wl, u8 hlid);</div><div class='ctx'> void wl1271_handle_tx_low_watermark(struct wl1271 *wl);</div><div class='ctx'> bool wl12xx_is_dummy_packet(struct wl1271 *wl, struct sk_buff *skb);</div><div class='ctx'> void wl12xx_rearm_rx_streaming(struct wl1271 *wl, unsigned long *active_hlids);</div><div class='add'>+unsigned int wlcore_calc_packet_alignment(struct wl1271 *wl,</div><div class='add'>+					  unsigned int packet_length);</div><div class='ctx'> </div><div class='ctx'> /* from main.c */</div><div class='ctx'> void wl1271_free_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 hlid);</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/wl12xx.h b/drivers/net/wireless/ti/wlcore/wl12xx.h<br/>index 749a15a75d38..f12bdf745180 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/wl12xx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/wl12xx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/wl12xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/wl12xx.h</a></div><div class='hunk'>@@ -89,8 +89,6 @@</div><div class='ctx'> #define WL1271_AP_BSS_INDEX        0</div><div class='ctx'> #define WL1271_AP_DEF_BEACON_EXP   20</div><div class='ctx'> </div><div class='del'>-#define ACX_TX_DESCRIPTORS         16</div><div class='del'>-</div><div class='ctx'> #define WL1271_AGGR_BUFFER_SIZE (4 * PAGE_SIZE)</div><div class='ctx'> </div><div class='ctx'> enum wl1271_state {</div><div class='hunk'>@@ -105,26 +103,6 @@ enum wl12xx_fw_type {</div><div class='ctx'> 	WL12XX_FW_TYPE_PLT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum wl1271_partition_type {</div><div class='del'>-	PART_DOWN,</div><div class='del'>-	PART_WORK,</div><div class='del'>-	PART_DRPW,</div><div class='del'>-</div><div class='del'>-	PART_TABLE_LEN</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct wl1271_partition {</div><div class='del'>-	u32 size;</div><div class='del'>-	u32 start;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct wl1271_partition_set {</div><div class='del'>-	struct wl1271_partition mem;</div><div class='del'>-	struct wl1271_partition reg;</div><div class='del'>-	struct wl1271_partition mem2;</div><div class='del'>-	struct wl1271_partition mem3;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct wl1271;</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -167,8 +145,21 @@ struct wl1271_stats {</div><div class='ctx'> </div><div class='ctx'> #define AP_MAX_STATIONS            8</div><div class='ctx'> </div><div class='add'>+struct wl_fw_packet_counters {</div><div class='add'>+	/* Cumulative counter of released packets per AC */</div><div class='add'>+	u8 tx_released_pkts[NUM_TX_QUEUES];</div><div class='add'>+</div><div class='add'>+	/* Cumulative counter of freed packets per HLID */</div><div class='add'>+	u8 tx_lnk_free_pkts[WL12XX_MAX_LINKS];</div><div class='add'>+</div><div class='add'>+	/* Cumulative counter of released Voice memory blocks */</div><div class='add'>+	u8 tx_voice_released_blks;</div><div class='add'>+</div><div class='add'>+	u8 padding[3];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> /* FW status registers */</div><div class='del'>-struct wl12xx_fw_status {</div><div class='add'>+struct wl_fw_status {</div><div class='ctx'> 	__le32 intr;</div><div class='ctx'> 	u8  fw_rx_counter;</div><div class='ctx'> 	u8  drv_rx_counter;</div><div class='hunk'>@@ -195,16 +186,12 @@ struct wl12xx_fw_status {</div><div class='ctx'> 	/* Size (in Memory Blocks) of TX pool */</div><div class='ctx'> 	__le32 tx_total;</div><div class='ctx'> </div><div class='del'>-	/* Cumulative counter of released packets per AC */</div><div class='del'>-	u8 tx_released_pkts[NUM_TX_QUEUES];</div><div class='del'>-</div><div class='del'>-	/* Cumulative counter of freed packets per HLID */</div><div class='del'>-	u8 tx_lnk_free_pkts[WL12XX_MAX_LINKS];</div><div class='add'>+	struct wl_fw_packet_counters counters;</div><div class='ctx'> </div><div class='del'>-	/* Cumulative counter of released Voice memory blocks */</div><div class='del'>-	u8 tx_voice_released_blks;</div><div class='del'>-	u8 padding_1[3];</div><div class='ctx'> 	__le32 log_start_addr;</div><div class='add'>+</div><div class='add'>+	/* Private status to be used by the lower drivers */</div><div class='add'>+	u8 priv[0];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct wl1271_rx_mem_pool_addr {</div><div class='hunk'>@@ -292,212 +279,37 @@ struct wl1271_link {</div><div class='ctx'> 	u8 ba_bitmap;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct wl1271 {</div><div class='del'>-	struct ieee80211_hw *hw;</div><div class='del'>-	bool mac80211_registered;</div><div class='del'>-</div><div class='del'>-	struct device *dev;</div><div class='del'>-</div><div class='del'>-	void *if_priv;</div><div class='del'>-</div><div class='del'>-	struct wl1271_if_operations *if_ops;</div><div class='del'>-</div><div class='del'>-	void (*set_power)(bool enable);</div><div class='del'>-	int irq;</div><div class='del'>-	int ref_clock;</div><div class='del'>-</div><div class='del'>-	spinlock_t wl_lock;</div><div class='del'>-</div><div class='del'>-	enum wl1271_state state;</div><div class='del'>-	enum wl12xx_fw_type fw_type;</div><div class='del'>-	bool plt;</div><div class='del'>-	u8 last_vif_count;</div><div class='del'>-	struct mutex mutex;</div><div class='del'>-</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	struct wl1271_partition_set part;</div><div class='del'>-</div><div class='del'>-	struct wl1271_chip chip;</div><div class='del'>-</div><div class='del'>-	int cmd_box_addr;</div><div class='del'>-	int event_box_addr;</div><div class='del'>-</div><div class='del'>-	u8 *fw;</div><div class='del'>-	size_t fw_len;</div><div class='del'>-	void *nvs;</div><div class='del'>-	size_t nvs_len;</div><div class='del'>-</div><div class='del'>-	s8 hw_pg_ver;</div><div class='del'>-</div><div class='del'>-	/* address read from the fuse ROM */</div><div class='del'>-	u32 fuse_oui_addr;</div><div class='del'>-	u32 fuse_nic_addr;</div><div class='del'>-</div><div class='del'>-	/* we have up to 2 MAC addresses */</div><div class='del'>-	struct mac_address addresses[2];</div><div class='del'>-	int channel;</div><div class='del'>-	u8 system_hlid;</div><div class='del'>-</div><div class='del'>-	unsigned long links_map[BITS_TO_LONGS(WL12XX_MAX_LINKS)];</div><div class='del'>-	unsigned long roles_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];</div><div class='del'>-	unsigned long roc_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];</div><div class='del'>-	unsigned long rate_policies_map[</div><div class='del'>-			BITS_TO_LONGS(WL12XX_MAX_RATE_POLICIES)];</div><div class='del'>-</div><div class='del'>-	struct list_head wlvif_list;</div><div class='del'>-</div><div class='del'>-	u8 sta_count;</div><div class='del'>-	u8 ap_count;</div><div class='del'>-</div><div class='del'>-	struct wl1271_acx_mem_map *target_mem_map;</div><div class='del'>-</div><div class='del'>-	/* Accounting for allocated / available TX blocks on HW */</div><div class='del'>-	u32 tx_blocks_freed;</div><div class='del'>-	u32 tx_blocks_available;</div><div class='del'>-	u32 tx_allocated_blocks;</div><div class='del'>-	u32 tx_results_count;</div><div class='del'>-</div><div class='del'>-	/* amount of spare TX blocks to use */</div><div class='del'>-	u32 tx_spare_blocks;</div><div class='del'>-</div><div class='del'>-	/* Accounting for allocated / available Tx packets in HW */</div><div class='del'>-	u32 tx_pkts_freed[NUM_TX_QUEUES];</div><div class='del'>-	u32 tx_allocated_pkts[NUM_TX_QUEUES];</div><div class='del'>-</div><div class='del'>-	/* Transmitted TX packets counter for chipset interface */</div><div class='del'>-	u32 tx_packets_count;</div><div class='add'>+#define WL1271_MAX_RX_FILTERS 5</div><div class='add'>+#define WL1271_RX_FILTER_MAX_FIELDS 8</div><div class='ctx'> </div><div class='del'>-	/* Time-offset between host and chipset clocks */</div><div class='del'>-	s64 time_offset;</div><div class='add'>+#define WL1271_RX_FILTER_ETH_HEADER_SIZE 14</div><div class='add'>+#define WL1271_RX_FILTER_MAX_FIELDS_SIZE 95</div><div class='add'>+#define RX_FILTER_FIELD_OVERHEAD				\</div><div class='add'>+	(sizeof(struct wl12xx_rx_filter_field) - sizeof(u8 *))</div><div class='add'>+#define WL1271_RX_FILTER_MAX_PATTERN_SIZE			\</div><div class='add'>+	(WL1271_RX_FILTER_MAX_FIELDS_SIZE - RX_FILTER_FIELD_OVERHEAD)</div><div class='ctx'> </div><div class='del'>-	/* Frames scheduled for transmission, not handled yet */</div><div class='del'>-	int tx_queue_count[NUM_TX_QUEUES];</div><div class='del'>-	long stopped_queues_map;</div><div class='add'>+#define WL1271_RX_FILTER_FLAG_MASK                BIT(0)</div><div class='add'>+#define WL1271_RX_FILTER_FLAG_IP_HEADER           0</div><div class='add'>+#define WL1271_RX_FILTER_FLAG_ETHERNET_HEADER     BIT(1)</div><div class='ctx'> </div><div class='del'>-	/* Frames received, not handled yet by mac80211 */</div><div class='del'>-	struct sk_buff_head deferred_rx_queue;</div><div class='del'>-</div><div class='del'>-	/* Frames sent, not returned yet to mac80211 */</div><div class='del'>-	struct sk_buff_head deferred_tx_queue;</div><div class='del'>-</div><div class='del'>-	struct work_struct tx_work;</div><div class='del'>-	struct workqueue_struct *freezable_wq;</div><div class='del'>-</div><div class='del'>-	/* Pending TX frames */</div><div class='del'>-	unsigned long tx_frames_map[BITS_TO_LONGS(ACX_TX_DESCRIPTORS)];</div><div class='del'>-	struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];</div><div class='del'>-	int tx_frames_cnt;</div><div class='del'>-</div><div class='del'>-	/* FW Rx counter */</div><div class='del'>-	u32 rx_counter;</div><div class='del'>-</div><div class='del'>-	/* Rx memory pool address */</div><div class='del'>-	struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;</div><div class='del'>-</div><div class='del'>-	/* Intermediate buffer, used for packet aggregation */</div><div class='del'>-	u8 *aggr_buf;</div><div class='del'>-</div><div class='del'>-	/* Reusable dummy packet template */</div><div class='del'>-	struct sk_buff *dummy_packet;</div><div class='del'>-</div><div class='del'>-	/* Network stack work  */</div><div class='del'>-	struct work_struct netstack_work;</div><div class='del'>-</div><div class='del'>-	/* FW log buffer */</div><div class='del'>-	u8 *fwlog;</div><div class='del'>-</div><div class='del'>-	/* Number of valid bytes in the FW log buffer */</div><div class='del'>-	ssize_t fwlog_size;</div><div class='del'>-</div><div class='del'>-	/* Sysfs FW log entry readers wait queue */</div><div class='del'>-	wait_queue_head_t fwlog_waitq;</div><div class='del'>-</div><div class='del'>-	/* Hardware recovery work */</div><div class='del'>-	struct work_struct recovery_work;</div><div class='del'>-</div><div class='del'>-	/* The mbox event mask */</div><div class='del'>-	u32 event_mask;</div><div class='del'>-</div><div class='del'>-	/* Mailbox pointers */</div><div class='del'>-	u32 mbox_ptr[2];</div><div class='del'>-</div><div class='del'>-	/* Are we currently scanning */</div><div class='del'>-	struct ieee80211_vif *scan_vif;</div><div class='del'>-	struct wl1271_scan scan;</div><div class='del'>-	struct delayed_work scan_complete_work;</div><div class='del'>-</div><div class='del'>-	bool sched_scanning;</div><div class='del'>-</div><div class='del'>-	/* The current band */</div><div class='del'>-	enum ieee80211_band band;</div><div class='del'>-</div><div class='del'>-	struct completion *elp_compl;</div><div class='del'>-	struct delayed_work elp_work;</div><div class='del'>-</div><div class='del'>-	/* in dBm */</div><div class='del'>-	int power_level;</div><div class='del'>-</div><div class='del'>-	struct wl1271_stats stats;</div><div class='del'>-</div><div class='del'>-	__le32 buffer_32;</div><div class='del'>-	u32 buffer_cmd;</div><div class='del'>-	u32 buffer_busyword[WL1271_BUSY_WORD_CNT];</div><div class='del'>-</div><div class='del'>-	struct wl12xx_fw_status *fw_status;</div><div class='del'>-	struct wl1271_tx_hw_res_if *tx_res_if;</div><div class='del'>-</div><div class='del'>-	/* Current chipset configuration */</div><div class='del'>-	struct conf_drv_settings conf;</div><div class='del'>-</div><div class='del'>-	bool sg_enabled;</div><div class='del'>-</div><div class='del'>-	bool enable_11a;</div><div class='del'>-</div><div class='del'>-	/* Most recently reported noise in dBm */</div><div class='del'>-	s8 noise;</div><div class='del'>-</div><div class='del'>-	/* bands supported by this instance of wl12xx */</div><div class='del'>-	struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];</div><div class='del'>-</div><div class='del'>-	int tcxo_clock;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * wowlan trigger was configured during suspend.</div><div class='del'>-	 * (currently, only "ANY" trigger is supported)</div><div class='del'>-	 */</div><div class='del'>-	bool wow_enabled;</div><div class='del'>-	bool irq_wake_enabled;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * AP-mode - links indexed by HLID. The global and broadcast links</div><div class='del'>-	 * are always active.</div><div class='del'>-	 */</div><div class='del'>-	struct wl1271_link links[WL12XX_MAX_LINKS];</div><div class='del'>-</div><div class='del'>-	/* AP-mode - a bitmap of links currently in PS mode according to FW */</div><div class='del'>-	u32 ap_fw_ps_map;</div><div class='del'>-</div><div class='del'>-	/* AP-mode - a bitmap of links currently in PS mode in mac80211 */</div><div class='del'>-	unsigned long ap_ps_map;</div><div class='del'>-</div><div class='del'>-	/* Quirks of specific hardware revisions */</div><div class='del'>-	unsigned int quirks;</div><div class='del'>-</div><div class='del'>-	/* Platform limitations */</div><div class='del'>-	unsigned int platform_quirks;</div><div class='del'>-</div><div class='del'>-	/* number of currently active RX BA sessions */</div><div class='del'>-	int ba_rx_session_count;</div><div class='del'>-</div><div class='del'>-	/* AP-mode - number of currently connected stations */</div><div class='del'>-	int active_sta_count;</div><div class='add'>+enum rx_filter_action {</div><div class='add'>+	FILTER_DROP = 0,</div><div class='add'>+	FILTER_SIGNAL = 1,</div><div class='add'>+	FILTER_FW_HANDLE = 2</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* last wlvif we transmitted from */</div><div class='del'>-	struct wl12xx_vif *last_wlvif;</div><div class='add'>+struct wl12xx_rx_filter_field {</div><div class='add'>+	__le16 offset;</div><div class='add'>+	u8 len;</div><div class='add'>+	u8 flags;</div><div class='add'>+	u8 *pattern;</div><div class='add'>+} __packed;</div><div class='ctx'> </div><div class='del'>-	/* work to fire when Tx is stuck */</div><div class='del'>-	struct delayed_work tx_watchdog_work;</div><div class='add'>+struct wl12xx_rx_filter {</div><div class='add'>+	u8 action;</div><div class='add'>+	int num_fields;</div><div class='add'>+	struct wl12xx_rx_filter_field fields[WL1271_RX_FILTER_MAX_FIELDS];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct wl1271_station {</div><div class='hunk'>@@ -605,6 +417,9 @@ struct wl12xx_vif {</div><div class='ctx'> 	struct work_struct rx_streaming_disable_work;</div><div class='ctx'> 	struct timer_list rx_streaming_timer;</div><div class='ctx'> </div><div class='add'>+	/* does the current role use GEM for encryption (AP or STA) */</div><div class='add'>+	bool is_gem;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This struct must be last!</div><div class='ctx'> 	 * data that has to be saved acrossed reconfigs (e.g. recovery)</div><div class='hunk'>@@ -657,6 +472,14 @@ int wl1271_plt_stop(struct wl1271 *wl);</div><div class='ctx'> int wl1271_recalc_rx_streaming(struct wl1271 *wl, struct wl12xx_vif *wlvif);</div><div class='ctx'> void wl12xx_queue_recovery_work(struct wl1271 *wl);</div><div class='ctx'> size_t wl12xx_copy_fwlog(struct wl1271 *wl, u8 *memblock, size_t maxlen);</div><div class='add'>+int wl1271_rx_filter_alloc_field(struct wl12xx_rx_filter *filter,</div><div class='add'>+					u16 offset, u8 flags,</div><div class='add'>+					u8 *pattern, u8 len);</div><div class='add'>+void wl1271_rx_filter_free(struct wl12xx_rx_filter *filter);</div><div class='add'>+struct wl12xx_rx_filter *wl1271_rx_filter_alloc(void);</div><div class='add'>+int wl1271_rx_filter_get_fields_size(struct wl12xx_rx_filter *filter);</div><div class='add'>+void wl1271_rx_filter_flatten_fields(struct wl12xx_rx_filter *filter,</div><div class='add'>+				     u8 *buf);</div><div class='ctx'> </div><div class='ctx'> #define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */</div><div class='ctx'> </div><div class='hunk'>@@ -679,17 +502,6 @@ size_t wl12xx_copy_fwlog(struct wl1271 *wl, u8 *memblock, size_t maxlen);</div><div class='ctx'> #define HW_BG_RATES_MASK	0xffff</div><div class='ctx'> #define HW_HT_RATES_OFFSET	16</div><div class='ctx'> </div><div class='del'>-/* Quirks */</div><div class='del'>-</div><div class='del'>-/* Each RX/TX transaction requires an end-of-transaction transfer */</div><div class='del'>-#define WL12XX_QUIRK_END_OF_TRANSACTION		BIT(0)</div><div class='del'>-</div><div class='del'>-/* wl127x and SPI don't support SDIO block size alignment */</div><div class='del'>-#define WL12XX_QUIRK_NO_BLOCKSIZE_ALIGNMENT	BIT(2)</div><div class='del'>-</div><div class='del'>-/* Older firmwares did not implement the FW logger over bus feature */</div><div class='del'>-#define WL12XX_QUIRK_FWLOG_NOT_IMPLEMENTED	BIT(4)</div><div class='del'>-</div><div class='ctx'> #define WL12XX_HW_BLOCK_SIZE	256</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/wl12xx_80211.h b/drivers/net/wireless/ti/wlcore/wl12xx_80211.h<br/>index 22b0bc98d7b5..22b0bc98d7b5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/wl12xx_80211.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/wl12xx_80211.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/wl12xx_80211.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/wl12xx_80211.h</a></div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/wl12xx_platform_data.c b/drivers/net/wireless/ti/wlcore/wl12xx_platform_data.c<br/>index 998e95895f9d..998e95895f9d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/wl12xx_platform_data.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/wl12xx_platform_data.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/wl12xx_platform_data.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/wl12xx_platform_data.c</a></div><div class='head'>diff --git a/drivers/net/wireless/ti/wlcore/wlcore.h b/drivers/net/wireless/ti/wlcore/wlcore.h<br/>new file mode 100644<br/>index 000000000000..0b3f0b586f4b<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/ti/wlcore/wlcore.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/ti/wlcore/wlcore.h</a></div><div class='hunk'>@@ -0,0 +1,454 @@</div><div class='add'>+/*</div><div class='add'>+ * This file is part of wlcore</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011 Texas Instruments Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or</div><div class='add'>+ * modify it under the terms of the GNU General Public License</div><div class='add'>+ * version 2 as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the Free Software</div><div class='add'>+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='add'>+ * 02110-1301 USA</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __WLCORE_H__</div><div class='add'>+#define __WLCORE_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include "wl12xx.h"</div><div class='add'>+#include "event.h"</div><div class='add'>+</div><div class='add'>+/* The maximum number of Tx descriptors in all chip families */</div><div class='add'>+#define WLCORE_MAX_TX_DESCRIPTORS 32</div><div class='add'>+</div><div class='add'>+/* forward declaration */</div><div class='add'>+struct wl1271_tx_hw_descr;</div><div class='add'>+enum wl_rx_buf_align;</div><div class='add'>+</div><div class='add'>+struct wlcore_ops {</div><div class='add'>+	int (*identify_chip)(struct wl1271 *wl);</div><div class='add'>+	int (*identify_fw)(struct wl1271 *wl);</div><div class='add'>+	int (*boot)(struct wl1271 *wl);</div><div class='add'>+	void (*trigger_cmd)(struct wl1271 *wl, int cmd_box_addr,</div><div class='add'>+			    void *buf, size_t len);</div><div class='add'>+	void (*ack_event)(struct wl1271 *wl);</div><div class='add'>+	u32 (*calc_tx_blocks)(struct wl1271 *wl, u32 len, u32 spare_blks);</div><div class='add'>+	void (*set_tx_desc_blocks)(struct wl1271 *wl,</div><div class='add'>+				   struct wl1271_tx_hw_descr *desc,</div><div class='add'>+				   u32 blks, u32 spare_blks);</div><div class='add'>+	void (*set_tx_desc_data_len)(struct wl1271 *wl,</div><div class='add'>+				     struct wl1271_tx_hw_descr *desc,</div><div class='add'>+				     struct sk_buff *skb);</div><div class='add'>+	enum wl_rx_buf_align (*get_rx_buf_align)(struct wl1271 *wl,</div><div class='add'>+						 u32 rx_desc);</div><div class='add'>+	void (*prepare_read)(struct wl1271 *wl, u32 rx_desc, u32 len);</div><div class='add'>+	u32 (*get_rx_packet_len)(struct wl1271 *wl, void *rx_data,</div><div class='add'>+				 u32 data_len);</div><div class='add'>+	void (*tx_delayed_compl)(struct wl1271 *wl);</div><div class='add'>+	void (*tx_immediate_compl)(struct wl1271 *wl);</div><div class='add'>+	int (*hw_init)(struct wl1271 *wl);</div><div class='add'>+	int (*init_vif)(struct wl1271 *wl, struct wl12xx_vif *wlvif);</div><div class='add'>+	u32 (*sta_get_ap_rate_mask)(struct wl1271 *wl,</div><div class='add'>+				    struct wl12xx_vif *wlvif);</div><div class='add'>+	s8 (*get_pg_ver)(struct wl1271 *wl);</div><div class='add'>+	void (*get_mac)(struct wl1271 *wl);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum wlcore_partitions {</div><div class='add'>+	PART_DOWN,</div><div class='add'>+	PART_WORK,</div><div class='add'>+	PART_BOOT,</div><div class='add'>+	PART_DRPW,</div><div class='add'>+	PART_TOP_PRCM_ELP_SOC,</div><div class='add'>+	PART_PHY_INIT,</div><div class='add'>+</div><div class='add'>+	PART_TABLE_LEN,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct wlcore_partition {</div><div class='add'>+	u32 size;</div><div class='add'>+	u32 start;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct wlcore_partition_set {</div><div class='add'>+	struct wlcore_partition mem;</div><div class='add'>+	struct wlcore_partition reg;</div><div class='add'>+	struct wlcore_partition mem2;</div><div class='add'>+	struct wlcore_partition mem3;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum wlcore_registers {</div><div class='add'>+	/* register addresses, used with partition translation */</div><div class='add'>+	REG_ECPU_CONTROL,</div><div class='add'>+	REG_INTERRUPT_NO_CLEAR,</div><div class='add'>+	REG_INTERRUPT_ACK,</div><div class='add'>+	REG_COMMAND_MAILBOX_PTR,</div><div class='add'>+	REG_EVENT_MAILBOX_PTR,</div><div class='add'>+	REG_INTERRUPT_TRIG,</div><div class='add'>+	REG_INTERRUPT_MASK,</div><div class='add'>+	REG_PC_ON_RECOVERY,</div><div class='add'>+	REG_CHIP_ID_B,</div><div class='add'>+	REG_CMD_MBOX_ADDRESS,</div><div class='add'>+</div><div class='add'>+	/* data access memory addresses, used with partition translation */</div><div class='add'>+	REG_SLV_MEM_DATA,</div><div class='add'>+	REG_SLV_REG_DATA,</div><div class='add'>+</div><div class='add'>+	/* raw data access memory addresses */</div><div class='add'>+	REG_RAW_FW_STATUS_ADDR,</div><div class='add'>+</div><div class='add'>+	REG_TABLE_LEN,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct wl1271 {</div><div class='add'>+	struct ieee80211_hw *hw;</div><div class='add'>+	bool mac80211_registered;</div><div class='add'>+</div><div class='add'>+	struct device *dev;</div><div class='add'>+</div><div class='add'>+	void *if_priv;</div><div class='add'>+</div><div class='add'>+	struct wl1271_if_operations *if_ops;</div><div class='add'>+</div><div class='add'>+	void (*set_power)(bool enable);</div><div class='add'>+	int irq;</div><div class='add'>+	int ref_clock;</div><div class='add'>+</div><div class='add'>+	spinlock_t wl_lock;</div><div class='add'>+</div><div class='add'>+	enum wl1271_state state;</div><div class='add'>+	enum wl12xx_fw_type fw_type;</div><div class='add'>+	bool plt;</div><div class='add'>+	u8 last_vif_count;</div><div class='add'>+	struct mutex mutex;</div><div class='add'>+</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	struct wlcore_partition_set curr_part;</div><div class='add'>+</div><div class='add'>+	struct wl1271_chip chip;</div><div class='add'>+</div><div class='add'>+	int cmd_box_addr;</div><div class='add'>+</div><div class='add'>+	u8 *fw;</div><div class='add'>+	size_t fw_len;</div><div class='add'>+	void *nvs;</div><div class='add'>+	size_t nvs_len;</div><div class='add'>+</div><div class='add'>+	s8 hw_pg_ver;</div><div class='add'>+</div><div class='add'>+	/* address read from the fuse ROM */</div><div class='add'>+	u32 fuse_oui_addr;</div><div class='add'>+	u32 fuse_nic_addr;</div><div class='add'>+</div><div class='add'>+	/* we have up to 2 MAC addresses */</div><div class='add'>+	struct mac_address addresses[2];</div><div class='add'>+	int channel;</div><div class='add'>+	u8 system_hlid;</div><div class='add'>+</div><div class='add'>+	unsigned long links_map[BITS_TO_LONGS(WL12XX_MAX_LINKS)];</div><div class='add'>+	unsigned long roles_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];</div><div class='add'>+	unsigned long roc_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)];</div><div class='add'>+	unsigned long rate_policies_map[</div><div class='add'>+			BITS_TO_LONGS(WL12XX_MAX_RATE_POLICIES)];</div><div class='add'>+</div><div class='add'>+	struct list_head wlvif_list;</div><div class='add'>+</div><div class='add'>+	u8 sta_count;</div><div class='add'>+	u8 ap_count;</div><div class='add'>+</div><div class='add'>+	struct wl1271_acx_mem_map *target_mem_map;</div><div class='add'>+</div><div class='add'>+	/* Accounting for allocated / available TX blocks on HW */</div><div class='add'>+	u32 tx_blocks_freed;</div><div class='add'>+	u32 tx_blocks_available;</div><div class='add'>+	u32 tx_allocated_blocks;</div><div class='add'>+	u32 tx_results_count;</div><div class='add'>+</div><div class='add'>+	/* Accounting for allocated / available Tx packets in HW */</div><div class='add'>+	u32 tx_pkts_freed[NUM_TX_QUEUES];</div><div class='add'>+	u32 tx_allocated_pkts[NUM_TX_QUEUES];</div><div class='add'>+</div><div class='add'>+	/* Transmitted TX packets counter for chipset interface */</div><div class='add'>+	u32 tx_packets_count;</div><div class='add'>+</div><div class='add'>+	/* Time-offset between host and chipset clocks */</div><div class='add'>+	s64 time_offset;</div><div class='add'>+</div><div class='add'>+	/* Frames scheduled for transmission, not handled yet */</div><div class='add'>+	int tx_queue_count[NUM_TX_QUEUES];</div><div class='add'>+	long stopped_queues_map;</div><div class='add'>+</div><div class='add'>+	/* Frames received, not handled yet by mac80211 */</div><div class='add'>+	struct sk_buff_head deferred_rx_queue;</div><div class='add'>+</div><div class='add'>+	/* Frames sent, not returned yet to mac80211 */</div><div class='add'>+	struct sk_buff_head deferred_tx_queue;</div><div class='add'>+</div><div class='add'>+	struct work_struct tx_work;</div><div class='add'>+	struct workqueue_struct *freezable_wq;</div><div class='add'>+</div><div class='add'>+	/* Pending TX frames */</div><div class='add'>+	unsigned long tx_frames_map[BITS_TO_LONGS(WLCORE_MAX_TX_DESCRIPTORS)];</div><div class='add'>+	struct sk_buff *tx_frames[WLCORE_MAX_TX_DESCRIPTORS];</div><div class='add'>+	int tx_frames_cnt;</div><div class='add'>+</div><div class='add'>+	/* FW Rx counter */</div><div class='add'>+	u32 rx_counter;</div><div class='add'>+</div><div class='add'>+	/* Rx memory pool address */</div><div class='add'>+	struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;</div><div class='add'>+</div><div class='add'>+	/* Intermediate buffer, used for packet aggregation */</div><div class='add'>+	u8 *aggr_buf;</div><div class='add'>+</div><div class='add'>+	/* Reusable dummy packet template */</div><div class='add'>+	struct sk_buff *dummy_packet;</div><div class='add'>+</div><div class='add'>+	/* Network stack work  */</div><div class='add'>+	struct work_struct netstack_work;</div><div class='add'>+</div><div class='add'>+	/* FW log buffer */</div><div class='add'>+	u8 *fwlog;</div><div class='add'>+</div><div class='add'>+	/* Number of valid bytes in the FW log buffer */</div><div class='add'>+	ssize_t fwlog_size;</div><div class='add'>+</div><div class='add'>+	/* Sysfs FW log entry readers wait queue */</div><div class='add'>+	wait_queue_head_t fwlog_waitq;</div><div class='add'>+</div><div class='add'>+	/* Hardware recovery work */</div><div class='add'>+	struct work_struct recovery_work;</div><div class='add'>+</div><div class='add'>+	/* Pointer that holds DMA-friendly block for the mailbox */</div><div class='add'>+	struct event_mailbox *mbox;</div><div class='add'>+</div><div class='add'>+	/* The mbox event mask */</div><div class='add'>+	u32 event_mask;</div><div class='add'>+</div><div class='add'>+	/* Mailbox pointers */</div><div class='add'>+	u32 mbox_ptr[2];</div><div class='add'>+</div><div class='add'>+	/* Are we currently scanning */</div><div class='add'>+	struct ieee80211_vif *scan_vif;</div><div class='add'>+	struct wl1271_scan scan;</div><div class='add'>+	struct delayed_work scan_complete_work;</div><div class='add'>+</div><div class='add'>+	/* Connection loss work */</div><div class='add'>+	struct delayed_work connection_loss_work;</div><div class='add'>+</div><div class='add'>+	bool sched_scanning;</div><div class='add'>+</div><div class='add'>+	/* The current band */</div><div class='add'>+	enum ieee80211_band band;</div><div class='add'>+</div><div class='add'>+	struct completion *elp_compl;</div><div class='add'>+	struct delayed_work elp_work;</div><div class='add'>+</div><div class='add'>+	/* in dBm */</div><div class='add'>+	int power_level;</div><div class='add'>+</div><div class='add'>+	struct wl1271_stats stats;</div><div class='add'>+</div><div class='add'>+	__le32 buffer_32;</div><div class='add'>+	u32 buffer_cmd;</div><div class='add'>+	u32 buffer_busyword[WL1271_BUSY_WORD_CNT];</div><div class='add'>+</div><div class='add'>+	struct wl_fw_status *fw_status;</div><div class='add'>+	struct wl1271_tx_hw_res_if *tx_res_if;</div><div class='add'>+</div><div class='add'>+	/* Current chipset configuration */</div><div class='add'>+	struct wlcore_conf conf;</div><div class='add'>+</div><div class='add'>+	bool sg_enabled;</div><div class='add'>+</div><div class='add'>+	bool enable_11a;</div><div class='add'>+</div><div class='add'>+	/* Most recently reported noise in dBm */</div><div class='add'>+	s8 noise;</div><div class='add'>+</div><div class='add'>+	/* bands supported by this instance of wl12xx */</div><div class='add'>+	struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];</div><div class='add'>+</div><div class='add'>+	int tcxo_clock;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * wowlan trigger was configured during suspend.</div><div class='add'>+	 * (currently, only "ANY" trigger is supported)</div><div class='add'>+	 */</div><div class='add'>+	bool wow_enabled;</div><div class='add'>+	bool irq_wake_enabled;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * AP-mode - links indexed by HLID. The global and broadcast links</div><div class='add'>+	 * are always active.</div><div class='add'>+	 */</div><div class='add'>+	struct wl1271_link links[WL12XX_MAX_LINKS];</div><div class='add'>+</div><div class='add'>+	/* AP-mode - a bitmap of links currently in PS mode according to FW */</div><div class='add'>+	u32 ap_fw_ps_map;</div><div class='add'>+</div><div class='add'>+	/* AP-mode - a bitmap of links currently in PS mode in mac80211 */</div><div class='add'>+	unsigned long ap_ps_map;</div><div class='add'>+</div><div class='add'>+	/* Quirks of specific hardware revisions */</div><div class='add'>+	unsigned int quirks;</div><div class='add'>+</div><div class='add'>+	/* Platform limitations */</div><div class='add'>+	unsigned int platform_quirks;</div><div class='add'>+</div><div class='add'>+	/* number of currently active RX BA sessions */</div><div class='add'>+	int ba_rx_session_count;</div><div class='add'>+</div><div class='add'>+	/* AP-mode - number of currently connected stations */</div><div class='add'>+	int active_sta_count;</div><div class='add'>+</div><div class='add'>+	/* last wlvif we transmitted from */</div><div class='add'>+	struct wl12xx_vif *last_wlvif;</div><div class='add'>+</div><div class='add'>+	/* work to fire when Tx is stuck */</div><div class='add'>+	struct delayed_work tx_watchdog_work;</div><div class='add'>+</div><div class='add'>+	struct wlcore_ops *ops;</div><div class='add'>+	/* pointer to the lower driver partition table */</div><div class='add'>+	const struct wlcore_partition_set *ptable;</div><div class='add'>+	/* pointer to the lower driver register table */</div><div class='add'>+	const int *rtable;</div><div class='add'>+	/* name of the firmwares to load - for PLT, single role, multi-role */</div><div class='add'>+	const char *plt_fw_name;</div><div class='add'>+	const char *sr_fw_name;</div><div class='add'>+	const char *mr_fw_name;</div><div class='add'>+</div><div class='add'>+	/* per-chip-family private structure */</div><div class='add'>+	void *priv;</div><div class='add'>+</div><div class='add'>+	/* number of TX descriptors the HW supports. */</div><div class='add'>+	u32 num_tx_desc;</div><div class='add'>+</div><div class='add'>+	/* spare Tx blocks for normal/GEM operating modes */</div><div class='add'>+	u32 normal_tx_spare;</div><div class='add'>+	u32 gem_tx_spare;</div><div class='add'>+</div><div class='add'>+	/* translate HW Tx rates to standard rate-indices */</div><div class='add'>+	const u8 **band_rate_to_idx;</div><div class='add'>+</div><div class='add'>+	/* size of table for HW rates that can be received from chip */</div><div class='add'>+	u8 hw_tx_rate_tbl_size;</div><div class='add'>+</div><div class='add'>+	/* this HW rate and below are considered HT rates for this chip */</div><div class='add'>+	u8 hw_min_ht_rate;</div><div class='add'>+</div><div class='add'>+	/* HW HT (11n) capabilities */</div><div class='add'>+	struct ieee80211_sta_ht_cap ht_cap;</div><div class='add'>+</div><div class='add'>+	/* size of the private FW status data */</div><div class='add'>+	size_t fw_status_priv_len;</div><div class='add'>+</div><div class='add'>+	/* RX Data filter rule state - enabled/disabled */</div><div class='add'>+	bool rx_filter_enabled[WL1271_MAX_RX_FILTERS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __devinit wlcore_probe(struct wl1271 *wl, struct platform_device *pdev);</div><div class='add'>+int __devexit wlcore_remove(struct platform_device *pdev);</div><div class='add'>+struct ieee80211_hw *wlcore_alloc_hw(size_t priv_size);</div><div class='add'>+int wlcore_free_hw(struct wl1271 *wl);</div><div class='add'>+</div><div class='add'>+/* Firmware image load chunk size */</div><div class='add'>+#define CHUNK_SIZE	16384</div><div class='add'>+</div><div class='add'>+/* Quirks */</div><div class='add'>+</div><div class='add'>+/* Each RX/TX transaction requires an end-of-transaction transfer */</div><div class='add'>+#define WLCORE_QUIRK_END_OF_TRANSACTION		BIT(0)</div><div class='add'>+</div><div class='add'>+/* wl127x and SPI don't support SDIO block size alignment */</div><div class='add'>+#define WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN		BIT(2)</div><div class='add'>+</div><div class='add'>+/* means aggregated Rx packets are aligned to a SDIO block */</div><div class='add'>+#define WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN		BIT(3)</div><div class='add'>+</div><div class='add'>+/* Older firmwares did not implement the FW logger over bus feature */</div><div class='add'>+#define WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED	BIT(4)</div><div class='add'>+</div><div class='add'>+/* Older firmwares use an old NVS format */</div><div class='add'>+#define WLCORE_QUIRK_LEGACY_NVS			BIT(5)</div><div class='add'>+</div><div class='add'>+/* Some firmwares may not support ELP */</div><div class='add'>+#define WLCORE_QUIRK_NO_ELP			BIT(6)</div><div class='add'>+</div><div class='add'>+/* TODO: move to the lower drivers when all usages are abstracted */</div><div class='add'>+#define CHIP_ID_1271_PG10              (0x4030101)</div><div class='add'>+#define CHIP_ID_1271_PG20              (0x4030111)</div><div class='add'>+#define CHIP_ID_1283_PG10              (0x05030101)</div><div class='add'>+#define CHIP_ID_1283_PG20              (0x05030111)</div><div class='add'>+</div><div class='add'>+/* TODO: move all these common registers and values elsewhere */</div><div class='add'>+#define HW_ACCESS_ELP_CTRL_REG		0x1FFFC</div><div class='add'>+</div><div class='add'>+/* ELP register commands */</div><div class='add'>+#define ELPCTRL_WAKE_UP             0x1</div><div class='add'>+#define ELPCTRL_WAKE_UP_WLAN_READY  0x5</div><div class='add'>+#define ELPCTRL_SLEEP               0x0</div><div class='add'>+/* ELP WLAN_READY bit */</div><div class='add'>+#define ELPCTRL_WLAN_READY          0x2</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+</div><div class='add'>+    Interrupt Trigger Register (Host -&gt; WiLink)</div><div class='add'>+</div><div class='add'>+**************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Hardware to Embedded CPU Interrupts - first 32-bit register set */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The host sets this bit to inform the Wlan</div><div class='add'>+ * FW that a TX packet is in the XFER</div><div class='add'>+ * Buffer #0.</div><div class='add'>+ */</div><div class='add'>+#define INTR_TRIG_TX_PROC0 BIT(2)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The host sets this bit to inform the FW</div><div class='add'>+ * that it read a packet from RX XFER</div><div class='add'>+ * Buffer #0.</div><div class='add'>+ */</div><div class='add'>+#define INTR_TRIG_RX_PROC0 BIT(3)</div><div class='add'>+</div><div class='add'>+#define INTR_TRIG_DEBUG_ACK BIT(4)</div><div class='add'>+</div><div class='add'>+#define INTR_TRIG_STATE_CHANGED BIT(5)</div><div class='add'>+</div><div class='add'>+/* Hardware to Embedded CPU Interrupts - second 32-bit register set */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The host sets this bit to inform the FW</div><div class='add'>+ * that it read a packet from RX XFER</div><div class='add'>+ * Buffer #1.</div><div class='add'>+ */</div><div class='add'>+#define INTR_TRIG_RX_PROC1 BIT(17)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The host sets this bit to inform the Wlan</div><div class='add'>+ * hardware that a TX packet is in the XFER</div><div class='add'>+ * Buffer #1.</div><div class='add'>+ */</div><div class='add'>+#define INTR_TRIG_TX_PROC1 BIT(18)</div><div class='add'>+</div><div class='add'>+#define ACX_SLV_SOFT_RESET_BIT	BIT(1)</div><div class='add'>+#define SOFT_RESET_MAX_TIME	1000000</div><div class='add'>+#define SOFT_RESET_STALL_TIME	1000</div><div class='add'>+</div><div class='add'>+#define ECPU_CONTROL_HALT	0x00000101</div><div class='add'>+</div><div class='add'>+#define WELP_ARM_COMMAND_VAL	0x4</div><div class='add'>+</div><div class='add'>+#endif /* __WLCORE_H__ */</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/Kconfig b/drivers/net/wireless/wl12xx/Kconfig<br/>deleted file mode 100644<br/>index af08c8609c63..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,48 +0,0 @@</div><div class='del'>-menuconfig WL12XX_MENU</div><div class='del'>-	tristate "TI wl12xx driver support"</div><div class='del'>-	depends on MAC80211 &amp;&amp; EXPERIMENTAL</div><div class='del'>-	---help---</div><div class='del'>-	  This will enable TI wl12xx driver support for the following chips:</div><div class='del'>-	  wl1271, wl1273, wl1281 and wl1283.</div><div class='del'>-	  The drivers make use of the mac80211 stack.</div><div class='del'>-</div><div class='del'>-config WL12XX</div><div class='del'>-	tristate "TI wl12xx support"</div><div class='del'>-	depends on WL12XX_MENU &amp;&amp; GENERIC_HARDIRQS</div><div class='del'>-	depends on INET</div><div class='del'>-	select FW_LOADER</div><div class='del'>-	---help---</div><div class='del'>-	  This module adds support for wireless adapters based on TI wl1271 and</div><div class='del'>-	  TI wl1273 chipsets. This module does *not* include support for wl1251.</div><div class='del'>-	  For wl1251 support, use the separate homonymous driver instead.</div><div class='del'>-</div><div class='del'>-	  If you choose to build a module, it will be called wl12xx. Say N if</div><div class='del'>-	  unsure.</div><div class='del'>-</div><div class='del'>-config WL12XX_SPI</div><div class='del'>-	tristate "TI wl12xx SPI support"</div><div class='del'>-	depends on WL12XX &amp;&amp; SPI_MASTER</div><div class='del'>-	select CRC7</div><div class='del'>-	---help---</div><div class='del'>-	  This module adds support for the SPI interface of adapters using</div><div class='del'>-	  TI wl12xx chipsets.  Select this if your platform is using</div><div class='del'>-	  the SPI bus.</div><div class='del'>-</div><div class='del'>-	  If you choose to build a module, it'll be called wl12xx_spi.</div><div class='del'>-	  Say N if unsure.</div><div class='del'>-</div><div class='del'>-config WL12XX_SDIO</div><div class='del'>-	tristate "TI wl12xx SDIO support"</div><div class='del'>-	depends on WL12XX &amp;&amp; MMC</div><div class='del'>-	---help---</div><div class='del'>-	  This module adds support for the SDIO interface of adapters using</div><div class='del'>-	  TI wl12xx chipsets.  Select this if your platform is using</div><div class='del'>-	  the SDIO bus.</div><div class='del'>-</div><div class='del'>-	  If you choose to build a module, it'll be called wl12xx_sdio.</div><div class='del'>-	  Say N if unsure.</div><div class='del'>-</div><div class='del'>-config WL12XX_PLATFORM_DATA</div><div class='del'>-	bool</div><div class='del'>-	depends on WL12XX_SDIO != n || WL1251_SDIO != n</div><div class='del'>-	default y</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/Makefile b/drivers/net/wireless/wl12xx/Makefile<br/>deleted file mode 100644<br/>index 98f289c907a9..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,15 +0,0 @@</div><div class='del'>-wl12xx-objs		= main.o cmd.o io.o event.o tx.o rx.o ps.o acx.o \</div><div class='del'>-			  boot.o init.o debugfs.o scan.o</div><div class='del'>-</div><div class='del'>-wl12xx_spi-objs 	= spi.o</div><div class='del'>-wl12xx_sdio-objs	= sdio.o</div><div class='del'>-</div><div class='del'>-wl12xx-$(CONFIG_NL80211_TESTMODE)	+= testmode.o</div><div class='del'>-obj-$(CONFIG_WL12XX)			+= wl12xx.o</div><div class='del'>-obj-$(CONFIG_WL12XX_SPI)		+= wl12xx_spi.o</div><div class='del'>-obj-$(CONFIG_WL12XX_SDIO)		+= wl12xx_sdio.o</div><div class='del'>-</div><div class='del'>-# small builtin driver bit</div><div class='del'>-obj-$(CONFIG_WL12XX_PLATFORM_DATA)	+= wl12xx_platform_data.o</div><div class='del'>-</div><div class='del'>-ccflags-y += -D__CHECK_ENDIAN__</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/boot.c b/drivers/net/wireless/wl12xx/boot.c<br/>deleted file mode 100644<br/>index 954101d03f06..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/boot.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/boot.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,786 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * This file is part of wl1271</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2008-2010 Nokia Corporation</div><div class='del'>- *</div><div class='del'>- * Contact: Luciano Coelho &lt;luciano.coelho@nokia.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='del'>- * 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/wl12xx.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-</div><div class='del'>-#include "debug.h"</div><div class='del'>-#include "acx.h"</div><div class='del'>-#include "reg.h"</div><div class='del'>-#include "boot.h"</div><div class='del'>-#include "io.h"</div><div class='del'>-#include "event.h"</div><div class='del'>-#include "rx.h"</div><div class='del'>-</div><div class='del'>-static void wl1271_boot_set_ecpu_ctrl(struct wl1271 *wl, u32 flag)</div><div class='del'>-{</div><div class='del'>-	u32 cpu_ctrl;</div><div class='del'>-</div><div class='del'>-	/* 10.5.0 run the firmware (I) */</div><div class='del'>-	cpu_ctrl = wl1271_read32(wl, ACX_REG_ECPU_CONTROL);</div><div class='del'>-</div><div class='del'>-	/* 10.5.1 run the firmware (II) */</div><div class='del'>-	cpu_ctrl |= flag;</div><div class='del'>-	wl1271_write32(wl, ACX_REG_ECPU_CONTROL, cpu_ctrl);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int wl12xx_get_fw_ver_quirks(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	unsigned int quirks = 0;</div><div class='del'>-	unsigned int *fw_ver = wl-&gt;chip.fw_ver;</div><div class='del'>-</div><div class='del'>-	/* Only new station firmwares support routing fw logs to the host */</div><div class='del'>-	if ((fw_ver[FW_VER_IF_TYPE] == FW_VER_IF_TYPE_STA) &amp;&amp;</div><div class='del'>-	    (fw_ver[FW_VER_MINOR] &lt; FW_VER_MINOR_FWLOG_STA_MIN))</div><div class='del'>-		quirks |= WL12XX_QUIRK_FWLOG_NOT_IMPLEMENTED;</div><div class='del'>-</div><div class='del'>-	/* This feature is not yet supported for AP mode */</div><div class='del'>-	if (fw_ver[FW_VER_IF_TYPE] == FW_VER_IF_TYPE_AP)</div><div class='del'>-		quirks |= WL12XX_QUIRK_FWLOG_NOT_IMPLEMENTED;</div><div class='del'>-</div><div class='del'>-	return quirks;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void wl1271_parse_fw_ver(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = sscanf(wl-&gt;chip.fw_ver_str + 4, "%u.%u.%u.%u.%u",</div><div class='del'>-		     &amp;wl-&gt;chip.fw_ver[0], &amp;wl-&gt;chip.fw_ver[1],</div><div class='del'>-		     &amp;wl-&gt;chip.fw_ver[2], &amp;wl-&gt;chip.fw_ver[3],</div><div class='del'>-		     &amp;wl-&gt;chip.fw_ver[4]);</div><div class='del'>-</div><div class='del'>-	if (ret != 5) {</div><div class='del'>-		wl1271_warning("fw version incorrect value");</div><div class='del'>-		memset(wl-&gt;chip.fw_ver, 0, sizeof(wl-&gt;chip.fw_ver));</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Check if any quirks are needed with older fw versions */</div><div class='del'>-	wl-&gt;quirks |= wl12xx_get_fw_ver_quirks(wl);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void wl1271_boot_fw_version(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	struct wl1271_static_data static_data;</div><div class='del'>-</div><div class='del'>-	wl1271_read(wl, wl-&gt;cmd_box_addr, &amp;static_data, sizeof(static_data),</div><div class='del'>-		    false);</div><div class='del'>-</div><div class='del'>-	strncpy(wl-&gt;chip.fw_ver_str, static_data.fw_version,</div><div class='del'>-		sizeof(wl-&gt;chip.fw_ver_str));</div><div class='del'>-</div><div class='del'>-	/* make sure the string is NULL-terminated */</div><div class='del'>-	wl-&gt;chip.fw_ver_str[sizeof(wl-&gt;chip.fw_ver_str) - 1] = '\0';</div><div class='del'>-</div><div class='del'>-	wl1271_parse_fw_ver(wl);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,</div><div class='del'>-					     size_t fw_data_len, u32 dest)</div><div class='del'>-{</div><div class='del'>-	struct wl1271_partition_set partition;</div><div class='del'>-	int addr, chunk_num, partition_limit;</div><div class='del'>-	u8 *p, *chunk;</div><div class='del'>-</div><div class='del'>-	/* whal_FwCtrl_LoadFwImageSm() */</div><div class='del'>-</div><div class='del'>-	wl1271_debug(DEBUG_BOOT, "starting firmware upload");</div><div class='del'>-</div><div class='del'>-	wl1271_debug(DEBUG_BOOT, "fw_data_len %zd chunk_size %d",</div><div class='del'>-		     fw_data_len, CHUNK_SIZE);</div><div class='del'>-</div><div class='del'>-	if ((fw_data_len % 4) != 0) {</div><div class='del'>-		wl1271_error("firmware length not multiple of four");</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	chunk = kmalloc(CHUNK_SIZE, GFP_KERNEL);</div><div class='del'>-	if (!chunk) {</div><div class='del'>-		wl1271_error("allocation for firmware upload chunk failed");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;partition, &amp;wl12xx_part_table[PART_DOWN], sizeof(partition));</div><div class='del'>-	partition.mem.start = dest;</div><div class='del'>-	wl1271_set_partition(wl, &amp;partition);</div><div class='del'>-</div><div class='del'>-	/* 10.1 set partition limit and chunk num */</div><div class='del'>-	chunk_num = 0;</div><div class='del'>-	partition_limit = wl12xx_part_table[PART_DOWN].mem.size;</div><div class='del'>-</div><div class='del'>-	while (chunk_num &lt; fw_data_len / CHUNK_SIZE) {</div><div class='del'>-		/* 10.2 update partition, if needed */</div><div class='del'>-		addr = dest + (chunk_num + 2) * CHUNK_SIZE;</div><div class='del'>-		if (addr &gt; partition_limit) {</div><div class='del'>-			addr = dest + chunk_num * CHUNK_SIZE;</div><div class='del'>-			partition_limit = chunk_num * CHUNK_SIZE +</div><div class='del'>-				wl12xx_part_table[PART_DOWN].mem.size;</div><div class='del'>-			partition.mem.start = addr;</div><div class='del'>-			wl1271_set_partition(wl, &amp;partition);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* 10.3 upload the chunk */</div><div class='del'>-		addr = dest + chunk_num * CHUNK_SIZE;</div><div class='del'>-		p = buf + chunk_num * CHUNK_SIZE;</div><div class='del'>-		memcpy(chunk, p, CHUNK_SIZE);</div><div class='del'>-		wl1271_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",</div><div class='del'>-			     p, addr);</div><div class='del'>-		wl1271_write(wl, addr, chunk, CHUNK_SIZE, false);</div><div class='del'>-</div><div class='del'>-		chunk_num++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* 10.4 upload the last chunk */</div><div class='del'>-	addr = dest + chunk_num * CHUNK_SIZE;</div><div class='del'>-	p = buf + chunk_num * CHUNK_SIZE;</div><div class='del'>-	memcpy(chunk, p, fw_data_len % CHUNK_SIZE);</div><div class='del'>-	wl1271_debug(DEBUG_BOOT, "uploading fw last chunk (%zd B) 0x%p to 0x%x",</div><div class='del'>-		     fw_data_len % CHUNK_SIZE, p, addr);</div><div class='del'>-	wl1271_write(wl, addr, chunk, fw_data_len % CHUNK_SIZE, false);</div><div class='del'>-</div><div class='del'>-	kfree(chunk);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wl1271_boot_upload_firmware(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	u32 chunks, addr, len;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	u8 *fw;</div><div class='del'>-</div><div class='del'>-	fw = wl-&gt;fw;</div><div class='del'>-	chunks = be32_to_cpup((__be32 *) fw);</div><div class='del'>-	fw += sizeof(u32);</div><div class='del'>-</div><div class='del'>-	wl1271_debug(DEBUG_BOOT, "firmware chunks to be uploaded: %u", chunks);</div><div class='del'>-</div><div class='del'>-	while (chunks--) {</div><div class='del'>-		addr = be32_to_cpup((__be32 *) fw);</div><div class='del'>-		fw += sizeof(u32);</div><div class='del'>-		len = be32_to_cpup((__be32 *) fw);</div><div class='del'>-		fw += sizeof(u32);</div><div class='del'>-</div><div class='del'>-		if (len &gt; 300000) {</div><div class='del'>-			wl1271_info("firmware chunk too long: %u", len);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-		wl1271_debug(DEBUG_BOOT, "chunk %d addr 0x%x len %u",</div><div class='del'>-			     chunks, addr, len);</div><div class='del'>-		ret = wl1271_boot_upload_firmware_chunk(wl, fw, len, addr);</div><div class='del'>-		if (ret != 0)</div><div class='del'>-			break;</div><div class='del'>-		fw += len;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wl1271_boot_upload_nvs(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	size_t nvs_len, burst_len;</div><div class='del'>-	int i;</div><div class='del'>-	u32 dest_addr, val;</div><div class='del'>-	u8 *nvs_ptr, *nvs_aligned;</div><div class='del'>-</div><div class='del'>-	if (wl-&gt;nvs == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='del'>-		struct wl128x_nvs_file *nvs = (struct wl128x_nvs_file *)wl-&gt;nvs;</div><div class='del'>-</div><div class='del'>-		if (wl-&gt;nvs_len == sizeof(struct wl128x_nvs_file)) {</div><div class='del'>-			if (nvs-&gt;general_params.dual_mode_select)</div><div class='del'>-				wl-&gt;enable_11a = true;</div><div class='del'>-		} else {</div><div class='del'>-			wl1271_error("nvs size is not as expected: %zu != %zu",</div><div class='del'>-				     wl-&gt;nvs_len,</div><div class='del'>-				     sizeof(struct wl128x_nvs_file));</div><div class='del'>-			kfree(wl-&gt;nvs);</div><div class='del'>-			wl-&gt;nvs = NULL;</div><div class='del'>-			wl-&gt;nvs_len = 0;</div><div class='del'>-			return -EILSEQ;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* only the first part of the NVS needs to be uploaded */</div><div class='del'>-		nvs_len = sizeof(nvs-&gt;nvs);</div><div class='del'>-		nvs_ptr = (u8 *)nvs-&gt;nvs;</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-		struct wl1271_nvs_file *nvs =</div><div class='del'>-			(struct wl1271_nvs_file *)wl-&gt;nvs;</div><div class='del'>-		/*</div><div class='del'>-		 * FIXME: the LEGACY NVS image support (NVS's missing the 5GHz</div><div class='del'>-		 * band configurations) can be removed when those NVS files stop</div><div class='del'>-		 * floating around.</div><div class='del'>-		 */</div><div class='del'>-		if (wl-&gt;nvs_len == sizeof(struct wl1271_nvs_file) ||</div><div class='del'>-		    wl-&gt;nvs_len == WL1271_INI_LEGACY_NVS_FILE_SIZE) {</div><div class='del'>-			if (nvs-&gt;general_params.dual_mode_select)</div><div class='del'>-				wl-&gt;enable_11a = true;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (wl-&gt;nvs_len != sizeof(struct wl1271_nvs_file) &amp;&amp;</div><div class='del'>-		    (wl-&gt;nvs_len != WL1271_INI_LEGACY_NVS_FILE_SIZE ||</div><div class='del'>-		     wl-&gt;enable_11a)) {</div><div class='del'>-			wl1271_error("nvs size is not as expected: %zu != %zu",</div><div class='del'>-				wl-&gt;nvs_len, sizeof(struct wl1271_nvs_file));</div><div class='del'>-			kfree(wl-&gt;nvs);</div><div class='del'>-			wl-&gt;nvs = NULL;</div><div class='del'>-			wl-&gt;nvs_len = 0;</div><div class='del'>-			return -EILSEQ;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* only the first part of the NVS needs to be uploaded */</div><div class='del'>-		nvs_len = sizeof(nvs-&gt;nvs);</div><div class='del'>-		nvs_ptr = (u8 *) nvs-&gt;nvs;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* update current MAC address to NVS */</div><div class='del'>-	nvs_ptr[11] = wl-&gt;addresses[0].addr[0];</div><div class='del'>-	nvs_ptr[10] = wl-&gt;addresses[0].addr[1];</div><div class='del'>-	nvs_ptr[6] = wl-&gt;addresses[0].addr[2];</div><div class='del'>-	nvs_ptr[5] = wl-&gt;addresses[0].addr[3];</div><div class='del'>-	nvs_ptr[4] = wl-&gt;addresses[0].addr[4];</div><div class='del'>-	nvs_ptr[3] = wl-&gt;addresses[0].addr[5];</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Layout before the actual NVS tables:</div><div class='del'>-	 * 1 byte : burst length.</div><div class='del'>-	 * 2 bytes: destination address.</div><div class='del'>-	 * n bytes: data to burst copy.</div><div class='del'>-	 *</div><div class='del'>-	 * This is ended by a 0 length, then the NVS tables.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/* FIXME: Do we need to check here whether the LSB is 1? */</div><div class='del'>-	while (nvs_ptr[0]) {</div><div class='del'>-		burst_len = nvs_ptr[0];</div><div class='del'>-		dest_addr = (nvs_ptr[1] &amp; 0xfe) | ((u32)(nvs_ptr[2] &lt;&lt; 8));</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Due to our new wl1271_translate_reg_addr function,</div><div class='del'>-		 * we need to add the REGISTER_BASE to the destination</div><div class='del'>-		 */</div><div class='del'>-		dest_addr += REGISTERS_BASE;</div><div class='del'>-</div><div class='del'>-		/* We move our pointer to the data */</div><div class='del'>-		nvs_ptr += 3;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; burst_len; i++) {</div><div class='del'>-			if (nvs_ptr + 3 &gt;= (u8 *) wl-&gt;nvs + nvs_len)</div><div class='del'>-				goto out_badnvs;</div><div class='del'>-</div><div class='del'>-			val = (nvs_ptr[0] | (nvs_ptr[1] &lt;&lt; 8)</div><div class='del'>-			       | (nvs_ptr[2] &lt;&lt; 16) | (nvs_ptr[3] &lt;&lt; 24));</div><div class='del'>-</div><div class='del'>-			wl1271_debug(DEBUG_BOOT,</div><div class='del'>-				     "nvs burst write 0x%x: 0x%x",</div><div class='del'>-				     dest_addr, val);</div><div class='del'>-			wl1271_write32(wl, dest_addr, val);</div><div class='del'>-</div><div class='del'>-			nvs_ptr += 4;</div><div class='del'>-			dest_addr += 4;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (nvs_ptr &gt;= (u8 *) wl-&gt;nvs + nvs_len)</div><div class='del'>-			goto out_badnvs;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We've reached the first zero length, the first NVS table</div><div class='del'>-	 * is located at an aligned offset which is at least 7 bytes further.</div><div class='del'>-	 * NOTE: The wl-&gt;nvs-&gt;nvs element must be first, in order to</div><div class='del'>-	 * simplify the casting, we assume it is at the beginning of</div><div class='del'>-	 * the wl-&gt;nvs structure.</div><div class='del'>-	 */</div><div class='del'>-	nvs_ptr = (u8 *)wl-&gt;nvs +</div><div class='del'>-			ALIGN(nvs_ptr - (u8 *)wl-&gt;nvs + 7, 4);</div><div class='del'>-</div><div class='del'>-	if (nvs_ptr &gt;= (u8 *) wl-&gt;nvs + nvs_len)</div><div class='del'>-		goto out_badnvs;</div><div class='del'>-</div><div class='del'>-	nvs_len -= nvs_ptr - (u8 *)wl-&gt;nvs;</div><div class='del'>-</div><div class='del'>-	/* Now we must set the partition correctly */</div><div class='del'>-	wl1271_set_partition(wl, &amp;wl12xx_part_table[PART_WORK]);</div><div class='del'>-</div><div class='del'>-	/* Copy the NVS tables to a new block to ensure alignment */</div><div class='del'>-	nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL);</div><div class='del'>-	if (!nvs_aligned)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	/* And finally we upload the NVS tables */</div><div class='del'>-	wl1271_write(wl, CMD_MBOX_ADDRESS, nvs_aligned, nvs_len, false);</div><div class='del'>-</div><div class='del'>-	kfree(nvs_aligned);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_badnvs:</div><div class='del'>-	wl1271_error("nvs data is malformed");</div><div class='del'>-	return -EILSEQ;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void wl1271_boot_enable_interrupts(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	wl1271_enable_interrupts(wl);</div><div class='del'>-	wl1271_write32(wl, ACX_REG_INTERRUPT_MASK,</div><div class='del'>-		       WL1271_ACX_INTR_ALL &amp; ~(WL1271_INTR_MASK));</div><div class='del'>-	wl1271_write32(wl, HI_CFG, HI_CFG_DEF_VAL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wl1271_boot_soft_reset(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-	u32 boot_data;</div><div class='del'>-</div><div class='del'>-	/* perform soft reset */</div><div class='del'>-	wl1271_write32(wl, ACX_REG_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT);</div><div class='del'>-</div><div class='del'>-	/* SOFT_RESET is self clearing */</div><div class='del'>-	timeout = jiffies + usecs_to_jiffies(SOFT_RESET_MAX_TIME);</div><div class='del'>-	while (1) {</div><div class='del'>-		boot_data = wl1271_read32(wl, ACX_REG_SLV_SOFT_RESET);</div><div class='del'>-		wl1271_debug(DEBUG_BOOT, "soft reset bootdata 0x%x", boot_data);</div><div class='del'>-		if ((boot_data &amp; ACX_SLV_SOFT_RESET_BIT) == 0)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if (time_after(jiffies, timeout)) {</div><div class='del'>-			/* 1.2 check pWhalBus-&gt;uSelfClearTime if the</div><div class='del'>-			 * timeout was reached */</div><div class='del'>-			wl1271_error("soft reset timeout");</div><div class='del'>-			return -1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		udelay(SOFT_RESET_STALL_TIME);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* disable Rx/Tx */</div><div class='del'>-	wl1271_write32(wl, ENABLE, 0x0);</div><div class='del'>-</div><div class='del'>-	/* disable auto calibration on start*/</div><div class='del'>-	wl1271_write32(wl, SPARE_A2, 0xffff);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wl1271_boot_run_firmware(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	int loop, ret;</div><div class='del'>-	u32 chip_id, intr;</div><div class='del'>-</div><div class='del'>-	wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);</div><div class='del'>-</div><div class='del'>-	chip_id = wl1271_read32(wl, CHIP_ID_B);</div><div class='del'>-</div><div class='del'>-	wl1271_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);</div><div class='del'>-</div><div class='del'>-	if (chip_id != wl-&gt;chip.id) {</div><div class='del'>-		wl1271_error("chip id doesn't match after firmware boot");</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* wait for init to complete */</div><div class='del'>-	loop = 0;</div><div class='del'>-	while (loop++ &lt; INIT_LOOP) {</div><div class='del'>-		udelay(INIT_LOOP_DELAY);</div><div class='del'>-		intr = wl1271_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);</div><div class='del'>-</div><div class='del'>-		if (intr == 0xffffffff) {</div><div class='del'>-			wl1271_error("error reading hardware complete "</div><div class='del'>-				     "init indication");</div><div class='del'>-			return -EIO;</div><div class='del'>-		}</div><div class='del'>-		/* check that ACX_INTR_INIT_COMPLETE is enabled */</div><div class='del'>-		else if (intr &amp; WL1271_ACX_INTR_INIT_COMPLETE) {</div><div class='del'>-			wl1271_write32(wl, ACX_REG_INTERRUPT_ACK,</div><div class='del'>-				       WL1271_ACX_INTR_INIT_COMPLETE);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (loop &gt; INIT_LOOP) {</div><div class='del'>-		wl1271_error("timeout waiting for the hardware to "</div><div class='del'>-			     "complete initialization");</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* get hardware config command mail box */</div><div class='del'>-	wl-&gt;cmd_box_addr = wl1271_read32(wl, REG_COMMAND_MAILBOX_PTR);</div><div class='del'>-</div><div class='del'>-	/* get hardware config event mail box */</div><div class='del'>-	wl-&gt;event_box_addr = wl1271_read32(wl, REG_EVENT_MAILBOX_PTR);</div><div class='del'>-</div><div class='del'>-	/* set the working partition to its "running" mode offset */</div><div class='del'>-	wl1271_set_partition(wl, &amp;wl12xx_part_table[PART_WORK]);</div><div class='del'>-</div><div class='del'>-	wl1271_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x event_box_addr 0x%x",</div><div class='del'>-		     wl-&gt;cmd_box_addr, wl-&gt;event_box_addr);</div><div class='del'>-</div><div class='del'>-	wl1271_boot_fw_version(wl);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * in case of full asynchronous mode the firmware event must be</div><div class='del'>-	 * ready to receive event from the command mailbox</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/* unmask required mbox events  */</div><div class='del'>-	wl-&gt;event_mask = BSS_LOSE_EVENT_ID |</div><div class='del'>-		SCAN_COMPLETE_EVENT_ID |</div><div class='del'>-		ROLE_STOP_COMPLETE_EVENT_ID |</div><div class='del'>-		RSSI_SNR_TRIGGER_0_EVENT_ID |</div><div class='del'>-		PSPOLL_DELIVERY_FAILURE_EVENT_ID |</div><div class='del'>-		SOFT_GEMINI_SENSE_EVENT_ID |</div><div class='del'>-		PERIODIC_SCAN_REPORT_EVENT_ID |</div><div class='del'>-		PERIODIC_SCAN_COMPLETE_EVENT_ID |</div><div class='del'>-		DUMMY_PACKET_EVENT_ID |</div><div class='del'>-		PEER_REMOVE_COMPLETE_EVENT_ID |</div><div class='del'>-		BA_SESSION_RX_CONSTRAINT_EVENT_ID |</div><div class='del'>-		REMAIN_ON_CHANNEL_COMPLETE_EVENT_ID |</div><div class='del'>-		INACTIVE_STA_EVENT_ID |</div><div class='del'>-		MAX_TX_RETRY_EVENT_ID |</div><div class='del'>-		CHANNEL_SWITCH_COMPLETE_EVENT_ID;</div><div class='del'>-</div><div class='del'>-	ret = wl1271_event_unmask(wl);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		wl1271_error("EVENT mask setting failed");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	wl1271_event_mbox_config(wl);</div><div class='del'>-</div><div class='del'>-	/* firmware startup completed */</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wl1271_boot_write_irq_polarity(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	u32 polarity;</div><div class='del'>-</div><div class='del'>-	polarity = wl1271_top_reg_read(wl, OCP_REG_POLARITY);</div><div class='del'>-</div><div class='del'>-	/* We use HIGH polarity, so unset the LOW bit */</div><div class='del'>-	polarity &amp;= ~POLARITY_LOW;</div><div class='del'>-	wl1271_top_reg_write(wl, OCP_REG_POLARITY, polarity);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wl128x_switch_tcxo_to_fref(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	u16 spare_reg;</div><div class='del'>-</div><div class='del'>-	/* Mask bits [2] &amp; [8:4] in the sys_clk_cfg register */</div><div class='del'>-	spare_reg = wl1271_top_reg_read(wl, WL_SPARE_REG);</div><div class='del'>-	if (spare_reg == 0xFFFF)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	spare_reg |= (BIT(3) | BIT(5) | BIT(6));</div><div class='del'>-	wl1271_top_reg_write(wl, WL_SPARE_REG, spare_reg);</div><div class='del'>-</div><div class='del'>-	/* Enable FREF_CLK_REQ &amp; mux MCS and coex PLLs to FREF */</div><div class='del'>-	wl1271_top_reg_write(wl, SYS_CLK_CFG_REG,</div><div class='del'>-			     WL_CLK_REQ_TYPE_PG2 | MCS_PLL_CLK_SEL_FREF);</div><div class='del'>-</div><div class='del'>-	/* Delay execution for 15msec, to let the HW settle */</div><div class='del'>-	mdelay(15);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool wl128x_is_tcxo_valid(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	u16 tcxo_detection;</div><div class='del'>-</div><div class='del'>-	tcxo_detection = wl1271_top_reg_read(wl, TCXO_CLK_DETECT_REG);</div><div class='del'>-	if (tcxo_detection &amp; TCXO_DET_FAILED)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool wl128x_is_fref_valid(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	u16 fref_detection;</div><div class='del'>-</div><div class='del'>-	fref_detection = wl1271_top_reg_read(wl, FREF_CLK_DETECT_REG);</div><div class='del'>-	if (fref_detection &amp; FREF_CLK_DETECT_FAIL)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wl128x_manually_configure_mcs_pll(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	wl1271_top_reg_write(wl, MCS_PLL_M_REG, MCS_PLL_M_REG_VAL);</div><div class='del'>-	wl1271_top_reg_write(wl, MCS_PLL_N_REG, MCS_PLL_N_REG_VAL);</div><div class='del'>-	wl1271_top_reg_write(wl, MCS_PLL_CONFIG_REG, MCS_PLL_CONFIG_REG_VAL);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk)</div><div class='del'>-{</div><div class='del'>-	u16 spare_reg;</div><div class='del'>-	u16 pll_config;</div><div class='del'>-	u8 input_freq;</div><div class='del'>-</div><div class='del'>-	/* Mask bits [3:1] in the sys_clk_cfg register */</div><div class='del'>-	spare_reg = wl1271_top_reg_read(wl, WL_SPARE_REG);</div><div class='del'>-	if (spare_reg == 0xFFFF)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	spare_reg |= BIT(2);</div><div class='del'>-	wl1271_top_reg_write(wl, WL_SPARE_REG, spare_reg);</div><div class='del'>-</div><div class='del'>-	/* Handle special cases of the TCXO clock */</div><div class='del'>-	if (wl-&gt;tcxo_clock == WL12XX_TCXOCLOCK_16_8 ||</div><div class='del'>-	    wl-&gt;tcxo_clock == WL12XX_TCXOCLOCK_33_6)</div><div class='del'>-		return wl128x_manually_configure_mcs_pll(wl);</div><div class='del'>-</div><div class='del'>-	/* Set the input frequency according to the selected clock source */</div><div class='del'>-	input_freq = (clk &amp; 1) + 1;</div><div class='del'>-</div><div class='del'>-	pll_config = wl1271_top_reg_read(wl, MCS_PLL_CONFIG_REG);</div><div class='del'>-	if (pll_config == 0xFFFF)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	pll_config |= (input_freq &lt;&lt; MCS_SEL_IN_FREQ_SHIFT);</div><div class='del'>-	pll_config |= MCS_PLL_ENABLE_HP;</div><div class='del'>-	wl1271_top_reg_write(wl, MCS_PLL_CONFIG_REG, pll_config);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * WL128x has two clocks input - TCXO and FREF.</div><div class='del'>- * TCXO is the main clock of the device, while FREF is used to sync</div><div class='del'>- * between the GPS and the cellular modem.</div><div class='del'>- * In cases where TCXO is 32.736MHz or 16.368MHz, the FREF will be used</div><div class='del'>- * as the WLAN/BT main clock.</div><div class='del'>- */</div><div class='del'>-static int wl128x_boot_clk(struct wl1271 *wl, int *selected_clock)</div><div class='del'>-{</div><div class='del'>-	u16 sys_clk_cfg;</div><div class='del'>-</div><div class='del'>-	/* For XTAL-only modes, FREF will be used after switching from TCXO */</div><div class='del'>-	if (wl-&gt;ref_clock == WL12XX_REFCLOCK_26_XTAL ||</div><div class='del'>-	    wl-&gt;ref_clock == WL12XX_REFCLOCK_38_XTAL) {</div><div class='del'>-		if (!wl128x_switch_tcxo_to_fref(wl))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		goto fref_clk;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Query the HW, to determine which clock source we should use */</div><div class='del'>-	sys_clk_cfg = wl1271_top_reg_read(wl, SYS_CLK_CFG_REG);</div><div class='del'>-	if (sys_clk_cfg == 0xFFFF)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (sys_clk_cfg &amp; PRCM_CM_EN_MUX_WLAN_FREF)</div><div class='del'>-		goto fref_clk;</div><div class='del'>-</div><div class='del'>-	/* If TCXO is either 32.736MHz or 16.368MHz, switch to FREF */</div><div class='del'>-	if (wl-&gt;tcxo_clock == WL12XX_TCXOCLOCK_16_368 ||</div><div class='del'>-	    wl-&gt;tcxo_clock == WL12XX_TCXOCLOCK_32_736) {</div><div class='del'>-		if (!wl128x_switch_tcxo_to_fref(wl))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		goto fref_clk;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* TCXO clock is selected */</div><div class='del'>-	if (!wl128x_is_tcxo_valid(wl))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	*selected_clock = wl-&gt;tcxo_clock;</div><div class='del'>-	goto config_mcs_pll;</div><div class='del'>-</div><div class='del'>-fref_clk:</div><div class='del'>-	/* FREF clock is selected */</div><div class='del'>-	if (!wl128x_is_fref_valid(wl))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	*selected_clock = wl-&gt;ref_clock;</div><div class='del'>-</div><div class='del'>-config_mcs_pll:</div><div class='del'>-	return wl128x_configure_mcs_pll(wl, *selected_clock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wl127x_boot_clk(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	u32 pause;</div><div class='del'>-	u32 clk;</div><div class='del'>-</div><div class='del'>-	if (WL127X_PG_GET_MAJOR(wl-&gt;hw_pg_ver) &lt; 3)</div><div class='del'>-		wl-&gt;quirks |= WL12XX_QUIRK_END_OF_TRANSACTION;</div><div class='del'>-</div><div class='del'>-	if (wl-&gt;ref_clock == CONF_REF_CLK_19_2_E ||</div><div class='del'>-	    wl-&gt;ref_clock == CONF_REF_CLK_38_4_E ||</div><div class='del'>-	    wl-&gt;ref_clock == CONF_REF_CLK_38_4_M_XTAL)</div><div class='del'>-		/* ref clk: 19.2/38.4/38.4-XTAL */</div><div class='del'>-		clk = 0x3;</div><div class='del'>-	else if (wl-&gt;ref_clock == CONF_REF_CLK_26_E ||</div><div class='del'>-		 wl-&gt;ref_clock == CONF_REF_CLK_52_E)</div><div class='del'>-		/* ref clk: 26/52 */</div><div class='del'>-		clk = 0x5;</div><div class='del'>-	else</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (wl-&gt;ref_clock != CONF_REF_CLK_19_2_E) {</div><div class='del'>-		u16 val;</div><div class='del'>-		/* Set clock type (open drain) */</div><div class='del'>-		val = wl1271_top_reg_read(wl, OCP_REG_CLK_TYPE);</div><div class='del'>-		val &amp;= FREF_CLK_TYPE_BITS;</div><div class='del'>-		wl1271_top_reg_write(wl, OCP_REG_CLK_TYPE, val);</div><div class='del'>-</div><div class='del'>-		/* Set clock pull mode (no pull) */</div><div class='del'>-		val = wl1271_top_reg_read(wl, OCP_REG_CLK_PULL);</div><div class='del'>-		val |= NO_PULL;</div><div class='del'>-		wl1271_top_reg_write(wl, OCP_REG_CLK_PULL, val);</div><div class='del'>-	} else {</div><div class='del'>-		u16 val;</div><div class='del'>-		/* Set clock polarity */</div><div class='del'>-		val = wl1271_top_reg_read(wl, OCP_REG_CLK_POLARITY);</div><div class='del'>-		val &amp;= FREF_CLK_POLARITY_BITS;</div><div class='del'>-		val |= CLK_REQ_OUTN_SEL;</div><div class='del'>-		wl1271_top_reg_write(wl, OCP_REG_CLK_POLARITY, val);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	wl1271_write32(wl, PLL_PARAMETERS, clk);</div><div class='del'>-</div><div class='del'>-	pause = wl1271_read32(wl, PLL_PARAMETERS);</div><div class='del'>-</div><div class='del'>-	wl1271_debug(DEBUG_BOOT, "pause1 0x%x", pause);</div><div class='del'>-</div><div class='del'>-	pause &amp;= ~(WU_COUNTER_PAUSE_VAL);</div><div class='del'>-	pause |= WU_COUNTER_PAUSE_VAL;</div><div class='del'>-	wl1271_write32(wl, WU_COUNTER_PAUSE, pause);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* uploads NVS and firmware */</div><div class='del'>-int wl1271_load_firmware(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-	u32 tmp, clk;</div><div class='del'>-	int selected_clock = -1;</div><div class='del'>-</div><div class='del'>-	if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='del'>-		ret = wl128x_boot_clk(wl, &amp;selected_clock);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto out;</div><div class='del'>-	} else {</div><div class='del'>-		ret = wl127x_boot_clk(wl);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Continue the ELP wake up sequence */</div><div class='del'>-	wl1271_write32(wl, WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL);</div><div class='del'>-	udelay(500);</div><div class='del'>-</div><div class='del'>-	wl1271_set_partition(wl, &amp;wl12xx_part_table[PART_DRPW]);</div><div class='del'>-</div><div class='del'>-	/* Read-modify-write DRPW_SCRATCH_START register (see next state)</div><div class='del'>-	   to be used by DRPw FW. The RTRIM value will be added by the FW</div><div class='del'>-	   before taking DRPw out of reset */</div><div class='del'>-</div><div class='del'>-	wl1271_debug(DEBUG_BOOT, "DRPW_SCRATCH_START %08x", DRPW_SCRATCH_START);</div><div class='del'>-	clk = wl1271_read32(wl, DRPW_SCRATCH_START);</div><div class='del'>-</div><div class='del'>-	wl1271_debug(DEBUG_BOOT, "clk2 0x%x", clk);</div><div class='del'>-</div><div class='del'>-	if (wl-&gt;chip.id == CHIP_ID_1283_PG20) {</div><div class='del'>-		clk |= ((selected_clock &amp; 0x3) &lt;&lt; 1) &lt;&lt; 4;</div><div class='del'>-	} else {</div><div class='del'>-		clk |= (wl-&gt;ref_clock &lt;&lt; 1) &lt;&lt; 4;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	wl1271_write32(wl, DRPW_SCRATCH_START, clk);</div><div class='del'>-</div><div class='del'>-	wl1271_set_partition(wl, &amp;wl12xx_part_table[PART_WORK]);</div><div class='del'>-</div><div class='del'>-	/* Disable interrupts */</div><div class='del'>-	wl1271_write32(wl, ACX_REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL);</div><div class='del'>-</div><div class='del'>-	ret = wl1271_boot_soft_reset(wl);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	/* 2. start processing NVS file */</div><div class='del'>-	ret = wl1271_boot_upload_nvs(wl);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	/* write firmware's last address (ie. it's length) to</div><div class='del'>-	 * ACX_EEPROMLESS_IND_REG */</div><div class='del'>-	wl1271_debug(DEBUG_BOOT, "ACX_EEPROMLESS_IND_REG");</div><div class='del'>-</div><div class='del'>-	wl1271_write32(wl, ACX_EEPROMLESS_IND_REG, ACX_EEPROMLESS_IND_REG);</div><div class='del'>-</div><div class='del'>-	tmp = wl1271_read32(wl, CHIP_ID_B);</div><div class='del'>-</div><div class='del'>-	wl1271_debug(DEBUG_BOOT, "chip id 0x%x", tmp);</div><div class='del'>-</div><div class='del'>-	/* 6. read the EEPROM parameters */</div><div class='del'>-	tmp = wl1271_read32(wl, SCR_PAD2);</div><div class='del'>-</div><div class='del'>-	/* WL1271: The reference driver skips steps 7 to 10 (jumps directly</div><div class='del'>-	 * to upload_fw) */</div><div class='del'>-</div><div class='del'>-	if (wl-&gt;chip.id == CHIP_ID_1283_PG20)</div><div class='del'>-		wl1271_top_reg_write(wl, SDIO_IO_DS, wl-&gt;conf.hci_io_ds);</div><div class='del'>-</div><div class='del'>-	ret = wl1271_boot_upload_firmware(wl);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(wl1271_load_firmware);</div><div class='del'>-</div><div class='del'>-int wl1271_boot(struct wl1271 *wl)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* upload NVS and firmware */</div><div class='del'>-	ret = wl1271_load_firmware(wl);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* 10.5 start firmware */</div><div class='del'>-	ret = wl1271_boot_run_firmware(wl);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	ret = wl1271_boot_write_irq_polarity(wl);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	wl1271_write32(wl, ACX_REG_INTERRUPT_MASK,</div><div class='del'>-		       WL1271_ACX_ALL_EVENTS_VECTOR);</div><div class='del'>-</div><div class='del'>-	/* Enable firmware interrupts now */</div><div class='del'>-	wl1271_boot_enable_interrupts(wl);</div><div class='del'>-</div><div class='del'>-	wl1271_event_mbox_config(wl);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/wireless/wl12xx/boot.h b/drivers/net/wireless/wl12xx/boot.h<br/>deleted file mode 100644<br/>index c3adc09f403d..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/wl12xx/boot.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/wl12xx/boot.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,120 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * This file is part of wl1271</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2008-2009 Nokia Corporation</div><div class='del'>- *</div><div class='del'>- * Contact: Luciano Coelho &lt;luciano.coelho@nokia.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * version 2 as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA</div><div class='del'>- * 02110-1301 USA</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __BOOT_H__</div><div class='del'>-#define __BOOT_H__</div><div class='del'>-</div><div class='del'>-#include "wl12xx.h"</div><div class='del'>-</div><div class='del'>-int wl1271_boot(struct wl1271 *wl);</div><div class='del'>-int wl1271_load_firmware(struct wl1271 *wl);</div><div class='del'>-</div><div class='del'>-#define WL1271_NO_SUBBANDS 8</div><div class='del'>-#define WL1271_NO_POWER_LEVELS 4</div><div class='del'>-#define WL1271_FW_VERSION_MAX_LEN 20</div><div class='del'>-</div><div class='del'>-struct wl1271_static_data {</div><div class='del'>-	u8 mac_address[ETH_ALEN];</div><div class='del'>-	u8 padding[2];</div><div class='del'>-	u8 fw_version[WL1271_FW_VERSION_MAX_LEN];</div><div class='del'>-	u32 hw_version;</div><div class='del'>-	u8 tx_power_table[WL1271_NO_SUBBANDS][WL1271_NO_POWER_LEVELS];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* number of times we try to read the INIT interrupt */</div><div class='del'>-#define INIT_LOOP 20000</div><div class='del'>-</div><div class='del'>-/* delay between retries */</div><div class='del'>-#define INIT_LOOP_DELAY 50</div><div class='del'>-</div><div class='del'>-#define WU_COUNTER_PAUSE_VAL 0x3FF</div><div class='del'>-#define WELP_ARM_COMMAND_VAL 0x4</div><div class='del'>-</div><div class='del'>-#define OCP_REG_POLARITY     0x0064</div><div class='del'>-#define OCP_REG_CLK_TYPE     0x0448</div><div class='del'>-#define OCP_REG_CLK_POLARITY 0x0cb2</div><div class='del'>-#define OCP_REG_CLK_PULL     0x0cb4</div><div class='del'>-</div><div class='del'>-#define CMD_MBOX_ADDRESS     0x407B4</div><div class='del'>-</div><div class='del'>-#define POLARITY_LOW         BIT(1)</div><div class='del'>-#define NO_PULL              (BIT(14) | BIT(15))</div><div class='del'>-</div><div class='del'>-#define FREF_CLK_TYPE_BITS     0xfffffe7f</div><div class='del'>-#define CLK_REQ_PRCM           0x100</div><div class='del'>-#define FREF_CLK_POLARITY_BITS 0xfffff8ff</div><div class='del'>-#define CLK_REQ_OUTN_SEL       0x700</div><div class='del'>-</div><div class='del'>-/* PLL configuration algorithm for wl128x */</div><div class='del'>-#define SYS_CLK_CFG_REG              0x2200</div><div class='del'>-/* Bit[0]   -  0-TCXO,  1-FREF */</div><div class='del'>-#define MCS_PLL_CLK_SEL_FREF         BIT(0)</div><div class='del'>-/* Bit[3:2] - 01-TCXO, 10-FREF */</div><div class='del'>-#define WL_CLK_REQ_TYPE_FREF         BIT(3)</div><div class='del'>-#define WL_CLK_REQ_TYPE_PG2          (BIT(3) | BIT(2))</div><div class='del'>-/* Bit[4]   -  0-TCXO,  1-FREF */</div><div class='del'>-#define PRCM_CM_EN_MUX_WLAN_FREF     BIT(4)</div><div class='del'>-</div><div class='del'>-#define TCXO_ILOAD_INT_REG           0x2264</div><div class='del'>-#define TCXO_CLK_DETECT_REG          0x2266</div><div class='del'>-</div><div class='del'>-#define TCXO_DET_FAILED              BIT(4)</div><div class='del'>-</div><div class='del'>-#define FREF_ILOAD_INT_REG           0x2084</div><div class='del'>-#define FREF_CLK_DETECT_REG          0x2086</div><div class='del'>-#define FREF_CLK_DETECT_FAIL         BIT(4)</div><div class='del'>-</div><div class='del'>-/* Use this reg for masking during driver access */</div><div class='del'>-#define WL_SPARE_REG                 0x2320</div><div class='del'>-#define WL_SPARE_VAL                 BIT(2)</div><div class='del'>-/* Bit[6:5:3] -  mask wl write SYS_CLK_CFG[8:5:2:4] */</div><div class='del'>-#define WL_SPARE_MASK_8526           (BIT(6) | BIT(5) | BIT(3))</div><div class='del'>-</div><div class='del'>-#define PLL_LOCK_COUNTERS_REG        0xD8C</div><div class='del'>-#define PLL_LOCK_COUNTERS_COEX       0x0F</div><div class='del'>-#define PLL_LOCK_COUNTERS_MCS        0xF0</div><div class='del'>-#define MCS_PLL_OVERRIDE_REG         0xD90</div><div class='del'>-#define MCS_PLL_CONFIG_REG           0xD92</div><div class='del'>-#define MCS_SEL_IN_FREQ_MASK         0x0070</div><div class='del'>-#define MCS_SEL_IN_FREQ_SHIFT        4</div><div class='del'>-#define MCS_PLL_CONFIG_REG_VAL       0x73</div><div class='del'>-#define MCS_PLL_ENABLE_HP            (BIT(0) | BIT(1))</div><div class='del'>-</div><div class='del'>-#define MCS_PLL_M_REG                0xD94</div><div class='del'>-#define MCS_PLL_N_REG                0xD96</div><div class='del'>-#define MCS_PLL_M_REG_VAL            0xC8</div><div class='del'>-#define MCS_PLL_N_REG_VAL            0x07</div><div class='del'>-</div><div class='del'>-#define SDIO_IO_DS                   0xd14</div><div class='del'>-</div><div class='del'>-/* SDIO/wSPI DS configuration values */</div><div class='del'>-enum {</div><div class='del'>-	HCI_IO_DS_8MA = 0,</div><div class='del'>-	HCI_IO_DS_4MA = 1, /* default */</div><div class='del'>-	HCI_IO_DS_6MA = 2,</div><div class='del'>-	HCI_IO_DS_2MA = 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* end PLL configuration algorithm for wl128x */</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/wireless/zd1201.c b/drivers/net/wireless/zd1201.c<br/>index a66b93b7ff9a..48273dd05b63 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/zd1201.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/zd1201.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/zd1201.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/zd1201.c</a></div><div class='hunk'>@@ -1905,6 +1905,7 @@ static struct usb_driver zd1201_usb = {</div><div class='ctx'> 	.id_table = zd1201_table,</div><div class='ctx'> 	.suspend = zd1201_suspend,</div><div class='ctx'> 	.resume = zd1201_resume,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(zd1201_usb);</div><div class='head'>diff --git a/drivers/net/wireless/zd1211rw/zd_usb.c b/drivers/net/wireless/zd1211rw/zd_usb.c<br/>index f766b3e67c6d..af83c43bcdb1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/wireless/zd1211rw/zd_usb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/wireless/zd1211rw/zd_usb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/wireless/zd1211rw/zd_usb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/wireless/zd1211rw/zd_usb.c</a></div><div class='hunk'>@@ -1542,6 +1542,7 @@ static struct usb_driver driver = {</div><div class='ctx'> 	.disconnect	= disconnect,</div><div class='ctx'> 	.pre_reset	= pre_reset,</div><div class='ctx'> 	.post_reset	= post_reset,</div><div class='add'>+	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct workqueue_struct *zd_workqueue;</div><div class='head'>diff --git a/drivers/net/xen-netback/netback.c b/drivers/net/xen-netback/netback.c<br/>index 2596401308a8..f4a6fcaeffb1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/xen-netback/netback.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/xen-netback/netback.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/xen-netback/netback.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/xen-netback/netback.c</a></div><div class='hunk'>@@ -325,8 +325,7 @@ unsigned int xen_netbk_count_skb_slots(struct xenvif *vif, struct sk_buff *skb)</div><div class='ctx'> 	unsigned int count;</div><div class='ctx'> 	int i, copy_off;</div><div class='ctx'> </div><div class='del'>-	count = DIV_ROUND_UP(</div><div class='del'>-			offset_in_page(skb-&gt;data)+skb_headlen(skb), PAGE_SIZE);</div><div class='add'>+	count = DIV_ROUND_UP(skb_headlen(skb), PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	copy_off = skb_headlen(skb) % PAGE_SIZE;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c<br/>index 0ebbb1906c30..2027afe405fe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/net/xen-netfront.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/net/xen-netfront.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/net/xen-netfront.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/net/xen-netfront.c</a></div><div class='hunk'>@@ -1962,9 +1962,6 @@ static int __init netif_init(void)</div><div class='ctx'> 	if (!xen_domain())</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (xen_initial_domain())</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	if (xen_hvm_domain() &amp;&amp; !xen_platform_pci_unplug)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -1977,9 +1974,6 @@ module_init(netif_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit netif_exit(void)</div><div class='ctx'> {</div><div class='del'>-	if (xen_initial_domain())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	xenbus_unregister_driver(&amp;netfront_driver);</div><div class='ctx'> }</div><div class='ctx'> module_exit(netif_exit);</div><div class='head'>diff --git a/drivers/nfc/Kconfig b/drivers/nfc/Kconfig<br/>index 5af959274d4e..3b20b73ee649 100644<br/>--- a/<a href='/drm-misc/tree/drivers/nfc/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/nfc/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/nfc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/nfc/Kconfig</a></div><div class='hunk'>@@ -17,6 +17,19 @@ config PN544_NFC</div><div class='ctx'> 	  To compile this driver as a module, choose m here. The module will</div><div class='ctx'> 	  be called pn544.</div><div class='ctx'> </div><div class='add'>+config PN544_HCI_NFC</div><div class='add'>+	tristate "HCI PN544 NFC driver"</div><div class='add'>+	depends on I2C &amp;&amp; NFC_SHDLC</div><div class='add'>+	select CRC_CCITT</div><div class='add'>+	default n</div><div class='add'>+	---help---</div><div class='add'>+	  NXP PN544 i2c driver.</div><div class='add'>+	  This is a driver based on the SHDLC and HCI NFC kernel layers and</div><div class='add'>+	  will thus not work with NXP libnfc library.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose m here. The module will</div><div class='add'>+	  be called pn544_hci.</div><div class='add'>+</div><div class='ctx'> config NFC_PN533</div><div class='ctx'> 	tristate "NXP PN533 USB driver"</div><div class='ctx'> 	depends on USB</div><div class='head'>diff --git a/drivers/nfc/Makefile b/drivers/nfc/Makefile<br/>index ab99e8572f02..473e44cef612 100644<br/>--- a/<a href='/drm-misc/tree/drivers/nfc/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/nfc/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/nfc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/nfc/Makefile</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PN544_NFC)		+= pn544.o</div><div class='add'>+obj-$(CONFIG_PN544_HCI_NFC)	+= pn544_hci.o</div><div class='ctx'> obj-$(CONFIG_NFC_PN533)		+= pn533.o</div><div class='ctx'> obj-$(CONFIG_NFC_WILINK)	+= nfcwilink.o</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/nfc/pn533.c b/drivers/nfc/pn533.c<br/>index cb6204f78300..19110f0eb15f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/nfc/pn533.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/nfc/pn533.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/nfc/pn533.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/nfc/pn533.c</a></div><div class='hunk'>@@ -266,9 +266,13 @@ struct pn533 {</div><div class='ctx'> 	int in_maxlen;</div><div class='ctx'> 	struct pn533_frame *in_frame;</div><div class='ctx'> </div><div class='del'>-	struct tasklet_struct tasklet;</div><div class='del'>-	struct pn533_frame *tklt_in_frame;</div><div class='del'>-	int tklt_in_error;</div><div class='add'>+	struct sk_buff_head resp_q;</div><div class='add'>+</div><div class='add'>+	struct workqueue_struct	*wq;</div><div class='add'>+	struct work_struct cmd_work;</div><div class='add'>+	struct work_struct mi_work;</div><div class='add'>+	struct pn533_frame *wq_in_frame;</div><div class='add'>+	int wq_in_error;</div><div class='ctx'> </div><div class='ctx'> 	pn533_cmd_complete_t cmd_complete;</div><div class='ctx'> 	void *cmd_complete_arg;</div><div class='hunk'>@@ -383,15 +387,18 @@ static bool pn533_rx_frame_is_cmd_response(struct pn533_frame *frame, u8 cmd)</div><div class='ctx'> 	return (PN533_FRAME_CMD(frame) == PN533_CMD_RESPONSE(cmd));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pn533_tasklet_cmd_complete(unsigned long arg)</div><div class='add'>+</div><div class='add'>+static void pn533_wq_cmd_complete(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct pn533 *dev = (struct pn533 *) arg;</div><div class='del'>-	struct pn533_frame *in_frame = dev-&gt;tklt_in_frame;</div><div class='add'>+	struct pn533 *dev = container_of(work, struct pn533, cmd_work);</div><div class='add'>+	struct pn533_frame *in_frame;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;tklt_in_error)</div><div class='add'>+	in_frame = dev-&gt;wq_in_frame;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;wq_in_error)</div><div class='ctx'> 		rc = dev-&gt;cmd_complete(dev, dev-&gt;cmd_complete_arg, NULL,</div><div class='del'>-							dev-&gt;tklt_in_error);</div><div class='add'>+							dev-&gt;wq_in_error);</div><div class='ctx'> 	else</div><div class='ctx'> 		rc = dev-&gt;cmd_complete(dev, dev-&gt;cmd_complete_arg,</div><div class='ctx'> 					PN533_FRAME_CMD_PARAMS_PTR(in_frame),</div><div class='hunk'>@@ -406,7 +413,7 @@ static void pn533_recv_response(struct urb *urb)</div><div class='ctx'> 	struct pn533 *dev = urb-&gt;context;</div><div class='ctx'> 	struct pn533_frame *in_frame;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;tklt_in_frame = NULL;</div><div class='add'>+	dev-&gt;wq_in_frame = NULL;</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='ctx'> 	case 0:</div><div class='hunk'>@@ -417,36 +424,36 @@ static void pn533_recv_response(struct urb *urb)</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		nfc_dev_dbg(&amp;dev-&gt;interface-&gt;dev, "Urb shutting down with"</div><div class='ctx'> 						" status: %d", urb-&gt;status);</div><div class='del'>-		dev-&gt;tklt_in_error = urb-&gt;status;</div><div class='del'>-		goto sched_tasklet;</div><div class='add'>+		dev-&gt;wq_in_error = urb-&gt;status;</div><div class='add'>+		goto sched_wq;</div><div class='ctx'> 	default:</div><div class='ctx'> 		nfc_dev_err(&amp;dev-&gt;interface-&gt;dev, "Nonzero urb status received:"</div><div class='ctx'> 							" %d", urb-&gt;status);</div><div class='del'>-		dev-&gt;tklt_in_error = urb-&gt;status;</div><div class='del'>-		goto sched_tasklet;</div><div class='add'>+		dev-&gt;wq_in_error = urb-&gt;status;</div><div class='add'>+		goto sched_wq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	in_frame = dev-&gt;in_urb-&gt;transfer_buffer;</div><div class='ctx'> </div><div class='ctx'> 	if (!pn533_rx_frame_is_valid(in_frame)) {</div><div class='ctx'> 		nfc_dev_err(&amp;dev-&gt;interface-&gt;dev, "Received an invalid frame");</div><div class='del'>-		dev-&gt;tklt_in_error = -EIO;</div><div class='del'>-		goto sched_tasklet;</div><div class='add'>+		dev-&gt;wq_in_error = -EIO;</div><div class='add'>+		goto sched_wq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!pn533_rx_frame_is_cmd_response(in_frame, dev-&gt;cmd)) {</div><div class='ctx'> 		nfc_dev_err(&amp;dev-&gt;interface-&gt;dev, "The received frame is not "</div><div class='ctx'> 						"response to the last command");</div><div class='del'>-		dev-&gt;tklt_in_error = -EIO;</div><div class='del'>-		goto sched_tasklet;</div><div class='add'>+		dev-&gt;wq_in_error = -EIO;</div><div class='add'>+		goto sched_wq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	nfc_dev_dbg(&amp;dev-&gt;interface-&gt;dev, "Received a valid frame");</div><div class='del'>-	dev-&gt;tklt_in_error = 0;</div><div class='del'>-	dev-&gt;tklt_in_frame = in_frame;</div><div class='add'>+	dev-&gt;wq_in_error = 0;</div><div class='add'>+	dev-&gt;wq_in_frame = in_frame;</div><div class='ctx'> </div><div class='del'>-sched_tasklet:</div><div class='del'>-	tasklet_schedule(&amp;dev-&gt;tasklet);</div><div class='add'>+sched_wq:</div><div class='add'>+	queue_work(dev-&gt;wq, &amp;dev-&gt;cmd_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pn533_submit_urb_for_response(struct pn533 *dev, gfp_t flags)</div><div class='hunk'>@@ -471,21 +478,21 @@ static void pn533_recv_ack(struct urb *urb)</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		nfc_dev_dbg(&amp;dev-&gt;interface-&gt;dev, "Urb shutting down with"</div><div class='ctx'> 						" status: %d", urb-&gt;status);</div><div class='del'>-		dev-&gt;tklt_in_error = urb-&gt;status;</div><div class='del'>-		goto sched_tasklet;</div><div class='add'>+		dev-&gt;wq_in_error = urb-&gt;status;</div><div class='add'>+		goto sched_wq;</div><div class='ctx'> 	default:</div><div class='ctx'> 		nfc_dev_err(&amp;dev-&gt;interface-&gt;dev, "Nonzero urb status received:"</div><div class='ctx'> 							" %d", urb-&gt;status);</div><div class='del'>-		dev-&gt;tklt_in_error = urb-&gt;status;</div><div class='del'>-		goto sched_tasklet;</div><div class='add'>+		dev-&gt;wq_in_error = urb-&gt;status;</div><div class='add'>+		goto sched_wq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	in_frame = dev-&gt;in_urb-&gt;transfer_buffer;</div><div class='ctx'> </div><div class='ctx'> 	if (!pn533_rx_frame_is_ack(in_frame)) {</div><div class='ctx'> 		nfc_dev_err(&amp;dev-&gt;interface-&gt;dev, "Received an invalid ack");</div><div class='del'>-		dev-&gt;tklt_in_error = -EIO;</div><div class='del'>-		goto sched_tasklet;</div><div class='add'>+		dev-&gt;wq_in_error = -EIO;</div><div class='add'>+		goto sched_wq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	nfc_dev_dbg(&amp;dev-&gt;interface-&gt;dev, "Received a valid ack");</div><div class='hunk'>@@ -494,15 +501,15 @@ static void pn533_recv_ack(struct urb *urb)</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		nfc_dev_err(&amp;dev-&gt;interface-&gt;dev, "usb_submit_urb failed with"</div><div class='ctx'> 							" result %d", rc);</div><div class='del'>-		dev-&gt;tklt_in_error = rc;</div><div class='del'>-		goto sched_tasklet;</div><div class='add'>+		dev-&gt;wq_in_error = rc;</div><div class='add'>+		goto sched_wq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='del'>-sched_tasklet:</div><div class='del'>-	dev-&gt;tklt_in_frame = NULL;</div><div class='del'>-	tasklet_schedule(&amp;dev-&gt;tasklet);</div><div class='add'>+sched_wq:</div><div class='add'>+	dev-&gt;wq_in_frame = NULL;</div><div class='add'>+	queue_work(dev-&gt;wq, &amp;dev-&gt;cmd_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pn533_submit_urb_for_ack(struct pn533 *dev, gfp_t flags)</div><div class='hunk'>@@ -1184,8 +1191,8 @@ static int pn533_activate_target_nfcdep(struct pn533 *dev)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pn533_activate_target(struct nfc_dev *nfc_dev, u32 target_idx,</div><div class='del'>-								u32 protocol)</div><div class='add'>+static int pn533_activate_target(struct nfc_dev *nfc_dev,</div><div class='add'>+				 struct nfc_target *target, u32 protocol)</div><div class='ctx'> {</div><div class='ctx'> 	struct pn533 *dev = nfc_get_drvdata(nfc_dev);</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -1233,7 +1240,8 @@ static int pn533_activate_target(struct nfc_dev *nfc_dev, u32 target_idx,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pn533_deactivate_target(struct nfc_dev *nfc_dev, u32 target_idx)</div><div class='add'>+static void pn533_deactivate_target(struct nfc_dev *nfc_dev,</div><div class='add'>+				    struct nfc_target *target)</div><div class='ctx'> {</div><div class='ctx'> 	struct pn533 *dev = nfc_get_drvdata(nfc_dev);</div><div class='ctx'> 	u8 tg;</div><div class='hunk'>@@ -1249,6 +1257,8 @@ static void pn533_deactivate_target(struct nfc_dev *nfc_dev, u32 target_idx)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;tgt_active_prot = 0;</div><div class='ctx'> </div><div class='add'>+	skb_queue_purge(&amp;dev-&gt;resp_q);</div><div class='add'>+</div><div class='ctx'> 	pn533_tx_frame_init(dev-&gt;out_frame, PN533_CMD_IN_RELEASE);</div><div class='ctx'> </div><div class='ctx'> 	tg = 1;</div><div class='hunk'>@@ -1339,7 +1349,7 @@ static int pn533_in_dep_link_up_complete(struct pn533 *dev, void *arg,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pn533_dep_link_up(struct nfc_dev *nfc_dev, int target_idx,</div><div class='add'>+static int pn533_dep_link_up(struct nfc_dev *nfc_dev, struct nfc_target *target,</div><div class='ctx'> 			     u8 comm_mode, u8* gb, size_t gb_len)</div><div class='ctx'> {</div><div class='ctx'> 	struct pn533 *dev = nfc_get_drvdata(nfc_dev);</div><div class='hunk'>@@ -1447,11 +1457,49 @@ struct pn533_data_exchange_arg {</div><div class='ctx'> 	void *cb_context;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct sk_buff *pn533_build_response(struct pn533 *dev)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb, *tmp, *t;</div><div class='add'>+	unsigned int skb_len = 0, tmp_len = 0;</div><div class='add'>+</div><div class='add'>+	nfc_dev_dbg(&amp;dev-&gt;interface-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	if (skb_queue_empty(&amp;dev-&gt;resp_q))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (skb_queue_len(&amp;dev-&gt;resp_q) == 1) {</div><div class='add'>+		skb = skb_dequeue(&amp;dev-&gt;resp_q);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_queue_walk_safe(&amp;dev-&gt;resp_q, tmp, t)</div><div class='add'>+		skb_len += tmp-&gt;len;</div><div class='add'>+</div><div class='add'>+	nfc_dev_dbg(&amp;dev-&gt;interface-&gt;dev, "%s total length %d\n",</div><div class='add'>+		    __func__, skb_len);</div><div class='add'>+</div><div class='add'>+	skb = alloc_skb(skb_len, GFP_KERNEL);</div><div class='add'>+	if (skb == NULL)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	skb_put(skb, skb_len);</div><div class='add'>+</div><div class='add'>+	skb_queue_walk_safe(&amp;dev-&gt;resp_q, tmp, t) {</div><div class='add'>+		memcpy(skb-&gt;data + tmp_len, tmp-&gt;data, tmp-&gt;len);</div><div class='add'>+		tmp_len += tmp-&gt;len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	skb_queue_purge(&amp;dev-&gt;resp_q);</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int pn533_data_exchange_complete(struct pn533 *dev, void *_arg,</div><div class='ctx'> 						u8 *params, int params_len)</div><div class='ctx'> {</div><div class='ctx'> 	struct pn533_data_exchange_arg *arg = _arg;</div><div class='del'>-	struct sk_buff *skb_resp = arg-&gt;skb_resp;</div><div class='add'>+	struct sk_buff *skb = NULL, *skb_resp = arg-&gt;skb_resp;</div><div class='ctx'> 	struct pn533_frame *in_frame = (struct pn533_frame *) skb_resp-&gt;data;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	u8 status;</div><div class='hunk'>@@ -1459,15 +1507,13 @@ static int pn533_data_exchange_complete(struct pn533 *dev, void *_arg,</div><div class='ctx'> </div><div class='ctx'> 	nfc_dev_dbg(&amp;dev-&gt;interface-&gt;dev, "%s", __func__);</div><div class='ctx'> </div><div class='del'>-	dev_kfree_skb_irq(arg-&gt;skb_out);</div><div class='add'>+	dev_kfree_skb(arg-&gt;skb_out);</div><div class='ctx'> </div><div class='ctx'> 	if (params_len &lt; 0) { /* error */</div><div class='ctx'> 		err = params_len;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	skb_put(skb_resp, PN533_FRAME_SIZE(in_frame));</div><div class='del'>-</div><div class='ctx'> 	status = params[0];</div><div class='ctx'> </div><div class='ctx'> 	cmd_ret = status &amp; PN533_CMD_RET_MASK;</div><div class='hunk'>@@ -1478,34 +1524,35 @@ static int pn533_data_exchange_complete(struct pn533 *dev, void *_arg,</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	skb_put(skb_resp, PN533_FRAME_SIZE(in_frame));</div><div class='add'>+	skb_pull(skb_resp, PN533_CMD_DATAEXCH_HEAD_LEN);</div><div class='add'>+	skb_trim(skb_resp, skb_resp-&gt;len - PN533_FRAME_TAIL_SIZE);</div><div class='add'>+	skb_queue_tail(&amp;dev-&gt;resp_q, skb_resp);</div><div class='add'>+</div><div class='ctx'> 	if (status &amp; PN533_CMD_MI_MASK) {</div><div class='del'>-		/* TODO: Implement support to multi-part data exchange */</div><div class='del'>-		nfc_dev_err(&amp;dev-&gt;interface-&gt;dev, "Multi-part message not yet"</div><div class='del'>-								" supported");</div><div class='del'>-		/* Prevent the other messages from controller */</div><div class='del'>-		pn533_send_ack(dev, GFP_ATOMIC);</div><div class='del'>-		err = -ENOSYS;</div><div class='del'>-		goto error;</div><div class='add'>+		queue_work(dev-&gt;wq, &amp;dev-&gt;mi_work);</div><div class='add'>+		return -EINPROGRESS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	skb_pull(skb_resp, PN533_CMD_DATAEXCH_HEAD_LEN);</div><div class='del'>-	skb_trim(skb_resp, skb_resp-&gt;len - PN533_FRAME_TAIL_SIZE);</div><div class='add'>+	skb = pn533_build_response(dev);</div><div class='add'>+	if (skb == NULL)</div><div class='add'>+		goto error;</div><div class='ctx'> </div><div class='del'>-	arg-&gt;cb(arg-&gt;cb_context, skb_resp, 0);</div><div class='add'>+	arg-&gt;cb(arg-&gt;cb_context, skb, 0);</div><div class='ctx'> 	kfree(arg);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='del'>-	dev_kfree_skb_irq(skb_resp);</div><div class='add'>+	skb_queue_purge(&amp;dev-&gt;resp_q);</div><div class='add'>+	dev_kfree_skb(skb_resp);</div><div class='ctx'> 	arg-&gt;cb(arg-&gt;cb_context, NULL, err);</div><div class='ctx'> 	kfree(arg);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pn533_data_exchange(struct nfc_dev *nfc_dev, u32 target_idx,</div><div class='del'>-						struct sk_buff *skb,</div><div class='del'>-						data_exchange_cb_t cb,</div><div class='del'>-						void *cb_context)</div><div class='add'>+static int pn533_data_exchange(struct nfc_dev *nfc_dev,</div><div class='add'>+			       struct nfc_target *target, struct sk_buff *skb,</div><div class='add'>+			       data_exchange_cb_t cb, void *cb_context)</div><div class='ctx'> {</div><div class='ctx'> 	struct pn533 *dev = nfc_get_drvdata(nfc_dev);</div><div class='ctx'> 	struct pn533_frame *out_frame, *in_frame;</div><div class='hunk'>@@ -1571,6 +1618,68 @@ error:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void pn533_wq_mi_recv(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct pn533 *dev = container_of(work, struct pn533, mi_work);</div><div class='add'>+	struct sk_buff *skb_cmd;</div><div class='add'>+	struct pn533_data_exchange_arg *arg = dev-&gt;cmd_complete_arg;</div><div class='add'>+	struct pn533_frame *out_frame, *in_frame;</div><div class='add'>+	struct sk_buff *skb_resp;</div><div class='add'>+	int skb_resp_len;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	nfc_dev_dbg(&amp;dev-&gt;interface-&gt;dev, "%s", __func__);</div><div class='add'>+</div><div class='add'>+	/* This is a zero payload size skb */</div><div class='add'>+	skb_cmd = alloc_skb(PN533_CMD_DATAEXCH_HEAD_LEN + PN533_FRAME_TAIL_SIZE,</div><div class='add'>+			    GFP_KERNEL);</div><div class='add'>+	if (skb_cmd == NULL)</div><div class='add'>+		goto error_cmd;</div><div class='add'>+</div><div class='add'>+	skb_reserve(skb_cmd, PN533_CMD_DATAEXCH_HEAD_LEN);</div><div class='add'>+</div><div class='add'>+	rc = pn533_data_exchange_tx_frame(dev, skb_cmd);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto error_frame;</div><div class='add'>+</div><div class='add'>+	skb_resp_len = PN533_CMD_DATAEXCH_HEAD_LEN +</div><div class='add'>+			PN533_CMD_DATAEXCH_DATA_MAXLEN +</div><div class='add'>+			PN533_FRAME_TAIL_SIZE;</div><div class='add'>+	skb_resp = alloc_skb(skb_resp_len, GFP_KERNEL);</div><div class='add'>+	if (!skb_resp) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto error_frame;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	in_frame = (struct pn533_frame *) skb_resp-&gt;data;</div><div class='add'>+	out_frame = (struct pn533_frame *) skb_cmd-&gt;data;</div><div class='add'>+</div><div class='add'>+	arg-&gt;skb_resp = skb_resp;</div><div class='add'>+	arg-&gt;skb_out = skb_cmd;</div><div class='add'>+</div><div class='add'>+	rc = __pn533_send_cmd_frame_async(dev, out_frame, in_frame,</div><div class='add'>+					  skb_resp_len,</div><div class='add'>+					  pn533_data_exchange_complete,</div><div class='add'>+					  dev-&gt;cmd_complete_arg, GFP_KERNEL);</div><div class='add'>+	if (!rc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	nfc_dev_err(&amp;dev-&gt;interface-&gt;dev, "Error %d when trying to"</div><div class='add'>+						" perform data_exchange", rc);</div><div class='add'>+</div><div class='add'>+	kfree_skb(skb_resp);</div><div class='add'>+</div><div class='add'>+error_frame:</div><div class='add'>+	kfree_skb(skb_cmd);</div><div class='add'>+</div><div class='add'>+error_cmd:</div><div class='add'>+	pn533_send_ack(dev, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	kfree(arg);</div><div class='add'>+</div><div class='add'>+	up(&amp;dev-&gt;cmd_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int pn533_set_configuration(struct pn533 *dev, u8 cfgitem, u8 *cfgdata,</div><div class='ctx'> 								u8 cfgdata_len)</div><div class='ctx'> {</div><div class='hunk'>@@ -1668,7 +1777,15 @@ static int pn533_probe(struct usb_interface *interface,</div><div class='ctx'> 			NULL, 0,</div><div class='ctx'> 			pn533_send_complete, dev);</div><div class='ctx'> </div><div class='del'>-	tasklet_init(&amp;dev-&gt;tasklet, pn533_tasklet_cmd_complete, (ulong)dev);</div><div class='add'>+	INIT_WORK(&amp;dev-&gt;cmd_work, pn533_wq_cmd_complete);</div><div class='add'>+	INIT_WORK(&amp;dev-&gt;mi_work, pn533_wq_mi_recv);</div><div class='add'>+	dev-&gt;wq = alloc_workqueue("pn533",</div><div class='add'>+				  WQ_NON_REENTRANT | WQ_UNBOUND | WQ_MEM_RECLAIM,</div><div class='add'>+				  1);</div><div class='add'>+	if (dev-&gt;wq == NULL)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	skb_queue_head_init(&amp;dev-&gt;resp_q);</div><div class='ctx'> </div><div class='ctx'> 	usb_set_intfdata(interface, dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1678,7 +1795,7 @@ static int pn533_probe(struct usb_interface *interface,</div><div class='ctx'> 	rc = pn533_send_cmd_frame_sync(dev, dev-&gt;out_frame, dev-&gt;in_frame,</div><div class='ctx'> 								dev-&gt;in_maxlen);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		goto kill_tasklet;</div><div class='add'>+		goto destroy_wq;</div><div class='ctx'> </div><div class='ctx'> 	fw_ver = (struct pn533_fw_version *)</div><div class='ctx'> 				PN533_FRAME_CMD_PARAMS_PTR(dev-&gt;in_frame);</div><div class='hunk'>@@ -1694,7 +1811,7 @@ static int pn533_probe(struct usb_interface *interface,</div><div class='ctx'> 					   PN533_CMD_DATAEXCH_HEAD_LEN,</div><div class='ctx'> 					   PN533_FRAME_TAIL_SIZE);</div><div class='ctx'> 	if (!dev-&gt;nfc_dev)</div><div class='del'>-		goto kill_tasklet;</div><div class='add'>+		goto destroy_wq;</div><div class='ctx'> </div><div class='ctx'> 	nfc_set_parent_dev(dev-&gt;nfc_dev, &amp;interface-&gt;dev);</div><div class='ctx'> 	nfc_set_drvdata(dev-&gt;nfc_dev, dev);</div><div class='hunk'>@@ -1720,8 +1837,8 @@ static int pn533_probe(struct usb_interface *interface,</div><div class='ctx'> </div><div class='ctx'> free_nfc_dev:</div><div class='ctx'> 	nfc_free_device(dev-&gt;nfc_dev);</div><div class='del'>-kill_tasklet:</div><div class='del'>-	tasklet_kill(&amp;dev-&gt;tasklet);</div><div class='add'>+destroy_wq:</div><div class='add'>+	destroy_workqueue(dev-&gt;wq);</div><div class='ctx'> error:</div><div class='ctx'> 	kfree(dev-&gt;in_frame);</div><div class='ctx'> 	usb_free_urb(dev-&gt;in_urb);</div><div class='hunk'>@@ -1744,7 +1861,9 @@ static void pn533_disconnect(struct usb_interface *interface)</div><div class='ctx'> 	usb_kill_urb(dev-&gt;in_urb);</div><div class='ctx'> 	usb_kill_urb(dev-&gt;out_urb);</div><div class='ctx'> </div><div class='del'>-	tasklet_kill(&amp;dev-&gt;tasklet);</div><div class='add'>+	destroy_workqueue(dev-&gt;wq);</div><div class='add'>+</div><div class='add'>+	skb_queue_purge(&amp;dev-&gt;resp_q);</div><div class='ctx'> </div><div class='ctx'> 	kfree(dev-&gt;in_frame);</div><div class='ctx'> 	usb_free_urb(dev-&gt;in_urb);</div><div class='head'>diff --git a/drivers/nfc/pn544_hci.c b/drivers/nfc/pn544_hci.c<br/>new file mode 100644<br/>index 000000000000..281f18c2fb82<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/nfc/pn544_hci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/nfc/pn544_hci.c</a></div><div class='hunk'>@@ -0,0 +1,947 @@</div><div class='add'>+/*</div><div class='add'>+ * HCI based Driver for NXP PN544 NFC Chip</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012  Intel Corporation. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program; if not, write to the</div><div class='add'>+ * Free Software Foundation, Inc.,</div><div class='add'>+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/crc-ccitt.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/miscdevice.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/nfc.h&gt;</div><div class='add'>+#include &lt;net/nfc/hci.h&gt;</div><div class='add'>+#include &lt;net/nfc/shdlc.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/nfc/pn544.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRIVER_DESC "HCI NFC driver for PN544"</div><div class='add'>+</div><div class='add'>+#define PN544_HCI_DRIVER_NAME "pn544_hci"</div><div class='add'>+</div><div class='add'>+/* Timing restrictions (ms) */</div><div class='add'>+#define PN544_HCI_RESETVEN_TIME		30</div><div class='add'>+</div><div class='add'>+static struct i2c_device_id pn544_hci_id_table[] = {</div><div class='add'>+	{"pn544", 0},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, pn544_hci_id_table);</div><div class='add'>+</div><div class='add'>+#define HCI_MODE 0</div><div class='add'>+#define FW_MODE 1</div><div class='add'>+</div><div class='add'>+/* framing in HCI mode */</div><div class='add'>+#define PN544_HCI_LLC_LEN		1</div><div class='add'>+#define PN544_HCI_LLC_CRC		2</div><div class='add'>+#define PN544_HCI_LLC_LEN_CRC		(PN544_HCI_LLC_LEN + PN544_HCI_LLC_CRC)</div><div class='add'>+#define PN544_HCI_LLC_MIN_SIZE		(1 + PN544_HCI_LLC_LEN_CRC)</div><div class='add'>+#define PN544_HCI_LLC_MAX_PAYLOAD	29</div><div class='add'>+#define PN544_HCI_LLC_MAX_SIZE		(PN544_HCI_LLC_LEN_CRC + 1 + \</div><div class='add'>+					 PN544_HCI_LLC_MAX_PAYLOAD)</div><div class='add'>+</div><div class='add'>+enum pn544_state {</div><div class='add'>+	PN544_ST_COLD,</div><div class='add'>+	PN544_ST_FW_READY,</div><div class='add'>+	PN544_ST_READY,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FULL_VERSION_LEN 11</div><div class='add'>+</div><div class='add'>+/* Proprietary commands */</div><div class='add'>+#define PN544_WRITE		0x3f</div><div class='add'>+</div><div class='add'>+/* Proprietary gates, events, commands and registers */</div><div class='add'>+</div><div class='add'>+/* NFC_HCI_RF_READER_A_GATE additional registers and commands */</div><div class='add'>+#define PN544_RF_READER_A_AUTO_ACTIVATION			0x10</div><div class='add'>+#define PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION		0x12</div><div class='add'>+#define PN544_MIFARE_CMD					0x21</div><div class='add'>+</div><div class='add'>+/* Commands that apply to all RF readers */</div><div class='add'>+#define PN544_RF_READER_CMD_PRESENCE_CHECK	0x30</div><div class='add'>+#define PN544_RF_READER_CMD_ACTIVATE_NEXT	0x32</div><div class='add'>+</div><div class='add'>+/* NFC_HCI_ID_MGMT_GATE additional registers */</div><div class='add'>+#define PN544_ID_MGMT_FULL_VERSION_SW		0x10</div><div class='add'>+</div><div class='add'>+#define PN544_RF_READER_ISO15693_GATE		0x12</div><div class='add'>+</div><div class='add'>+#define PN544_RF_READER_F_GATE			0x14</div><div class='add'>+#define PN544_FELICA_ID				0x04</div><div class='add'>+#define PN544_FELICA_RAW			0x20</div><div class='add'>+</div><div class='add'>+#define PN544_RF_READER_JEWEL_GATE		0x15</div><div class='add'>+#define PN544_JEWEL_RAW_CMD			0x23</div><div class='add'>+</div><div class='add'>+#define PN544_RF_READER_NFCIP1_INITIATOR_GATE	0x30</div><div class='add'>+#define PN544_RF_READER_NFCIP1_TARGET_GATE	0x31</div><div class='add'>+</div><div class='add'>+#define PN544_SYS_MGMT_GATE			0x90</div><div class='add'>+#define PN544_SYS_MGMT_INFO_NOTIFICATION	0x02</div><div class='add'>+</div><div class='add'>+#define PN544_POLLING_LOOP_MGMT_GATE		0x94</div><div class='add'>+#define PN544_PL_RDPHASES			0x06</div><div class='add'>+#define PN544_PL_EMULATION			0x07</div><div class='add'>+#define PN544_PL_NFCT_DEACTIVATED		0x09</div><div class='add'>+</div><div class='add'>+#define PN544_SWP_MGMT_GATE			0xA0</div><div class='add'>+</div><div class='add'>+#define PN544_NFC_WI_MGMT_GATE			0xA1</div><div class='add'>+</div><div class='add'>+static u8 pn544_custom_gates[] = {</div><div class='add'>+	PN544_SYS_MGMT_GATE,</div><div class='add'>+	PN544_SWP_MGMT_GATE,</div><div class='add'>+	PN544_POLLING_LOOP_MGMT_GATE,</div><div class='add'>+	PN544_NFC_WI_MGMT_GATE,</div><div class='add'>+	PN544_RF_READER_F_GATE,</div><div class='add'>+	PN544_RF_READER_JEWEL_GATE,</div><div class='add'>+	PN544_RF_READER_ISO15693_GATE,</div><div class='add'>+	PN544_RF_READER_NFCIP1_INITIATOR_GATE,</div><div class='add'>+	PN544_RF_READER_NFCIP1_TARGET_GATE</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Largest headroom needed for outgoing custom commands */</div><div class='add'>+#define PN544_CMDS_HEADROOM	2</div><div class='add'>+</div><div class='add'>+struct pn544_hci_info {</div><div class='add'>+	struct i2c_client *i2c_dev;</div><div class='add'>+	struct nfc_shdlc *shdlc;</div><div class='add'>+</div><div class='add'>+	enum pn544_state state;</div><div class='add'>+</div><div class='add'>+	struct mutex info_lock;</div><div class='add'>+</div><div class='add'>+	unsigned int gpio_en;</div><div class='add'>+	unsigned int gpio_irq;</div><div class='add'>+	unsigned int gpio_fw;</div><div class='add'>+	unsigned int en_polarity;</div><div class='add'>+</div><div class='add'>+	int hard_fault;		/*</div><div class='add'>+				 * &lt; 0 if hardware error occured (e.g. i2c err)</div><div class='add'>+				 * and prevents normal operation.</div><div class='add'>+				 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void pn544_hci_platform_init(struct pn544_hci_info *info)</div><div class='add'>+{</div><div class='add'>+	int polarity, retry, ret;</div><div class='add'>+	char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 };</div><div class='add'>+	int count = sizeof(rset_cmd);</div><div class='add'>+</div><div class='add'>+	pr_info(DRIVER_DESC ": %s\n", __func__);</div><div class='add'>+	dev_info(&amp;info-&gt;i2c_dev-&gt;dev, "Detecting nfc_en polarity\n");</div><div class='add'>+</div><div class='add'>+	/* Disable fw download */</div><div class='add'>+	gpio_set_value(info-&gt;gpio_fw, 0);</div><div class='add'>+</div><div class='add'>+	for (polarity = 0; polarity &lt; 2; polarity++) {</div><div class='add'>+		info-&gt;en_polarity = polarity;</div><div class='add'>+		retry = 3;</div><div class='add'>+		while (retry--) {</div><div class='add'>+			/* power off */</div><div class='add'>+			gpio_set_value(info-&gt;gpio_en, !info-&gt;en_polarity);</div><div class='add'>+			usleep_range(10000, 15000);</div><div class='add'>+</div><div class='add'>+			/* power on */</div><div class='add'>+			gpio_set_value(info-&gt;gpio_en, info-&gt;en_polarity);</div><div class='add'>+			usleep_range(10000, 15000);</div><div class='add'>+</div><div class='add'>+			/* send reset */</div><div class='add'>+			dev_dbg(&amp;info-&gt;i2c_dev-&gt;dev, "Sending reset cmd\n");</div><div class='add'>+			ret = i2c_master_send(info-&gt;i2c_dev, rset_cmd, count);</div><div class='add'>+			if (ret == count) {</div><div class='add'>+				dev_info(&amp;info-&gt;i2c_dev-&gt;dev,</div><div class='add'>+					 "nfc_en polarity : active %s\n",</div><div class='add'>+					 (polarity == 0 ? "low" : "high"));</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_err(&amp;info-&gt;i2c_dev-&gt;dev,</div><div class='add'>+		"Could not detect nfc_en polarity, fallback to active high\n");</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	gpio_set_value(info-&gt;gpio_en, !info-&gt;en_polarity);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pn544_hci_enable(struct pn544_hci_info *info, int mode)</div><div class='add'>+{</div><div class='add'>+	pr_info(DRIVER_DESC ": %s\n", __func__);</div><div class='add'>+</div><div class='add'>+	gpio_set_value(info-&gt;gpio_fw, 0);</div><div class='add'>+	gpio_set_value(info-&gt;gpio_en, info-&gt;en_polarity);</div><div class='add'>+	usleep_range(10000, 15000);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pn544_hci_disable(struct pn544_hci_info *info)</div><div class='add'>+{</div><div class='add'>+	pr_info(DRIVER_DESC ": %s\n", __func__);</div><div class='add'>+</div><div class='add'>+	gpio_set_value(info-&gt;gpio_fw, 0);</div><div class='add'>+	gpio_set_value(info-&gt;gpio_en, !info-&gt;en_polarity);</div><div class='add'>+	usleep_range(10000, 15000);</div><div class='add'>+</div><div class='add'>+	gpio_set_value(info-&gt;gpio_en, info-&gt;en_polarity);</div><div class='add'>+	usleep_range(10000, 15000);</div><div class='add'>+</div><div class='add'>+	gpio_set_value(info-&gt;gpio_en, !info-&gt;en_polarity);</div><div class='add'>+	usleep_range(10000, 15000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pn544_hci_i2c_write(struct i2c_client *client, u8 *buf, int len)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	usleep_range(3000, 6000);</div><div class='add'>+</div><div class='add'>+	r = i2c_master_send(client, buf, len);</div><div class='add'>+</div><div class='add'>+	if (r == -EREMOTEIO) {	/* Retry, chip was in standby */</div><div class='add'>+		usleep_range(6000, 10000);</div><div class='add'>+		r = i2c_master_send(client, buf, len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (r &gt;= 0 &amp;&amp; r != len)</div><div class='add'>+		r = -EREMOTEIO;</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int check_crc(u8 *buf, int buflen)</div><div class='add'>+{</div><div class='add'>+	int len;</div><div class='add'>+	u16 crc;</div><div class='add'>+</div><div class='add'>+	len = buf[0] + 1;</div><div class='add'>+	crc = crc_ccitt(0xffff, buf, len - 2);</div><div class='add'>+	crc = ~crc;</div><div class='add'>+</div><div class='add'>+	if (buf[len - 2] != (crc &amp; 0xff) || buf[len - 1] != (crc &gt;&gt; 8)) {</div><div class='add'>+		pr_err(PN544_HCI_DRIVER_NAME ": CRC error 0x%x != 0x%x 0x%x\n",</div><div class='add'>+		       crc, buf[len - 1], buf[len - 2]);</div><div class='add'>+</div><div class='add'>+		pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);</div><div class='add'>+		print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,</div><div class='add'>+			       16, 2, buf, buflen, false);</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees</div><div class='add'>+ * that i2c bus will be flushed and that next read will start on a new frame.</div><div class='add'>+ * returned skb contains only LLC header and payload.</div><div class='add'>+ * returns:</div><div class='add'>+ * -EREMOTEIO : i2c read error (fatal)</div><div class='add'>+ * -EBADMSG : frame was incorrect and discarded</div><div class='add'>+ * -ENOMEM : cannot allocate skb, frame dropped</div><div class='add'>+ */</div><div class='add'>+static int pn544_hci_i2c_read(struct i2c_client *client, struct sk_buff **skb)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+	u8 len;</div><div class='add'>+	u8 tmp[PN544_HCI_LLC_MAX_SIZE - 1];</div><div class='add'>+</div><div class='add'>+	r = i2c_master_recv(client, &amp;len, 1);</div><div class='add'>+	if (r != 1) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "cannot read len byte\n");</div><div class='add'>+		return -EREMOTEIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((len &lt; (PN544_HCI_LLC_MIN_SIZE - 1)) ||</div><div class='add'>+	    (len &gt; (PN544_HCI_LLC_MAX_SIZE - 1))) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "invalid len byte\n");</div><div class='add'>+		r = -EBADMSG;</div><div class='add'>+		goto flush;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*skb = alloc_skb(1 + len, GFP_KERNEL);</div><div class='add'>+	if (*skb == NULL) {</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto flush;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*skb_put(*skb, 1) = len;</div><div class='add'>+</div><div class='add'>+	r = i2c_master_recv(client, skb_put(*skb, len), len);</div><div class='add'>+	if (r != len) {</div><div class='add'>+		kfree_skb(*skb);</div><div class='add'>+		return -EREMOTEIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = check_crc((*skb)-&gt;data, (*skb)-&gt;len);</div><div class='add'>+	if (r != 0) {</div><div class='add'>+		kfree_skb(*skb);</div><div class='add'>+		r = -EBADMSG;</div><div class='add'>+		goto flush;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_pull(*skb, 1);</div><div class='add'>+	skb_trim(*skb, (*skb)-&gt;len - 2);</div><div class='add'>+</div><div class='add'>+	usleep_range(3000, 6000);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+flush:</div><div class='add'>+	if (i2c_master_recv(client, tmp, sizeof(tmp)) &lt; 0)</div><div class='add'>+		r = -EREMOTEIO;</div><div class='add'>+</div><div class='add'>+	usleep_range(3000, 6000);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Reads an shdlc frame from the chip. This is not as straightforward as it</div><div class='add'>+ * seems. There are cases where we could loose the frame start synchronization.</div><div class='add'>+ * The frame format is len-data-crc, and corruption can occur anywhere while</div><div class='add'>+ * transiting on i2c bus, such that we could read an invalid len.</div><div class='add'>+ * In order to recover synchronization with the next frame, we must be sure</div><div class='add'>+ * to read the real amount of data without using the len byte. We do this by</div><div class='add'>+ * assuming the following:</div><div class='add'>+ * - the chip will always present only one single complete frame on the bus</div><div class='add'>+ *   before triggering the interrupt</div><div class='add'>+ * - the chip will not present a new frame until we have completely read</div><div class='add'>+ *   the previous one (or until we have handled the interrupt).</div><div class='add'>+ * The tricky case is when we read a corrupted len that is less than the real</div><div class='add'>+ * len. We must detect this here in order to determine that we need to flush</div><div class='add'>+ * the bus. This is the reason why we check the crc here.</div><div class='add'>+ */</div><div class='add'>+static irqreturn_t pn544_hci_irq_thread_fn(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct pn544_hci_info *info = dev_id;</div><div class='add'>+	struct i2c_client *client = info-&gt;i2c_dev;</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	BUG_ON(!info);</div><div class='add'>+	BUG_ON(irq != info-&gt;i2c_dev-&gt;irq);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "IRQ\n");</div><div class='add'>+</div><div class='add'>+	if (info-&gt;hard_fault != 0)</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+	r = pn544_hci_i2c_read(client, &amp;skb);</div><div class='add'>+	if (r == -EREMOTEIO) {</div><div class='add'>+		info-&gt;hard_fault = r;</div><div class='add'>+</div><div class='add'>+		nfc_shdlc_recv_frame(info-&gt;shdlc, NULL);</div><div class='add'>+</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	} else if ((r == -ENOMEM) || (r == -EBADMSG)) {</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nfc_shdlc_recv_frame(info-&gt;shdlc, skb);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pn544_hci_open(struct nfc_shdlc *shdlc)</div><div class='add'>+{</div><div class='add'>+	struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);</div><div class='add'>+	int r = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;info-&gt;info_lock);</div><div class='add'>+</div><div class='add'>+	if (info-&gt;state != PN544_ST_COLD) {</div><div class='add'>+		r = -EBUSY;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = pn544_hci_enable(info, HCI_MODE);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;info-&gt;info_lock);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pn544_hci_close(struct nfc_shdlc *shdlc)</div><div class='add'>+{</div><div class='add'>+	struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;info-&gt;info_lock);</div><div class='add'>+</div><div class='add'>+	if (info-&gt;state == PN544_ST_COLD)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	pn544_hci_disable(info);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;info-&gt;info_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pn544_hci_ready(struct nfc_shdlc *shdlc)</div><div class='add'>+{</div><div class='add'>+	struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	static struct hw_config {</div><div class='add'>+		u8 adr[2];</div><div class='add'>+		u8 value;</div><div class='add'>+	} hw_config[] = {</div><div class='add'>+		{{0x9f, 0x9a}, 0x00},</div><div class='add'>+</div><div class='add'>+		{{0x98, 0x10}, 0xbc},</div><div class='add'>+</div><div class='add'>+		{{0x9e, 0x71}, 0x00},</div><div class='add'>+</div><div class='add'>+		{{0x98, 0x09}, 0x00},</div><div class='add'>+</div><div class='add'>+		{{0x9e, 0xb4}, 0x00},</div><div class='add'>+</div><div class='add'>+		{{0x9e, 0xd9}, 0xff},</div><div class='add'>+		{{0x9e, 0xda}, 0xff},</div><div class='add'>+		{{0x9e, 0xdb}, 0x23},</div><div class='add'>+		{{0x9e, 0xdc}, 0x21},</div><div class='add'>+		{{0x9e, 0xdd}, 0x22},</div><div class='add'>+		{{0x9e, 0xde}, 0x24},</div><div class='add'>+</div><div class='add'>+		{{0x9c, 0x01}, 0x08},</div><div class='add'>+</div><div class='add'>+		{{0x9e, 0xaa}, 0x01},</div><div class='add'>+</div><div class='add'>+		{{0x9b, 0xd1}, 0x0d},</div><div class='add'>+		{{0x9b, 0xd2}, 0x24},</div><div class='add'>+		{{0x9b, 0xd3}, 0x0a},</div><div class='add'>+		{{0x9b, 0xd4}, 0x22},</div><div class='add'>+		{{0x9b, 0xd5}, 0x08},</div><div class='add'>+		{{0x9b, 0xd6}, 0x1e},</div><div class='add'>+		{{0x9b, 0xdd}, 0x1c},</div><div class='add'>+</div><div class='add'>+		{{0x9b, 0x84}, 0x13},</div><div class='add'>+		{{0x99, 0x81}, 0x7f},</div><div class='add'>+		{{0x99, 0x31}, 0x70},</div><div class='add'>+</div><div class='add'>+		{{0x98, 0x00}, 0x3f},</div><div class='add'>+</div><div class='add'>+		{{0x9f, 0x09}, 0x00},</div><div class='add'>+</div><div class='add'>+		{{0x9f, 0x0a}, 0x05},</div><div class='add'>+</div><div class='add'>+		{{0x9e, 0xd1}, 0xa1},</div><div class='add'>+		{{0x99, 0x23}, 0x00},</div><div class='add'>+</div><div class='add'>+		{{0x9e, 0x74}, 0x80},</div><div class='add'>+</div><div class='add'>+		{{0x9f, 0x28}, 0x10},</div><div class='add'>+</div><div class='add'>+		{{0x9f, 0x35}, 0x14},</div><div class='add'>+</div><div class='add'>+		{{0x9f, 0x36}, 0x60},</div><div class='add'>+</div><div class='add'>+		{{0x9c, 0x31}, 0x00},</div><div class='add'>+</div><div class='add'>+		{{0x9c, 0x32}, 0xc8},</div><div class='add'>+</div><div class='add'>+		{{0x9c, 0x19}, 0x40},</div><div class='add'>+</div><div class='add'>+		{{0x9c, 0x1a}, 0x40},</div><div class='add'>+</div><div class='add'>+		{{0x9c, 0x0c}, 0x00},</div><div class='add'>+</div><div class='add'>+		{{0x9c, 0x0d}, 0x00},</div><div class='add'>+</div><div class='add'>+		{{0x9c, 0x12}, 0x00},</div><div class='add'>+</div><div class='add'>+		{{0x9c, 0x13}, 0x00},</div><div class='add'>+</div><div class='add'>+		{{0x98, 0xa2}, 0x0e},</div><div class='add'>+</div><div class='add'>+		{{0x98, 0x93}, 0x40},</div><div class='add'>+</div><div class='add'>+		{{0x98, 0x7d}, 0x02},</div><div class='add'>+		{{0x98, 0x7e}, 0x00},</div><div class='add'>+		{{0x9f, 0xc8}, 0x01},</div><div class='add'>+	};</div><div class='add'>+	struct hw_config *p = hw_config;</div><div class='add'>+	int count = ARRAY_SIZE(hw_config);</div><div class='add'>+	struct sk_buff *res_skb;</div><div class='add'>+	u8 param[4];</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	param[0] = 0;</div><div class='add'>+	while (count--) {</div><div class='add'>+		param[1] = p-&gt;adr[0];</div><div class='add'>+		param[2] = p-&gt;adr[1];</div><div class='add'>+		param[3] = p-&gt;value;</div><div class='add'>+</div><div class='add'>+		r = nfc_hci_send_cmd(hdev, PN544_SYS_MGMT_GATE, PN544_WRITE,</div><div class='add'>+				     param, 4, &amp;res_skb);</div><div class='add'>+		if (r &lt; 0)</div><div class='add'>+			return r;</div><div class='add'>+</div><div class='add'>+		if (res_skb-&gt;len != 1) {</div><div class='add'>+			kfree_skb(res_skb);</div><div class='add'>+			return -EPROTO;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (res_skb-&gt;data[0] != p-&gt;value) {</div><div class='add'>+			kfree_skb(res_skb);</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		kfree_skb(res_skb);</div><div class='add'>+</div><div class='add'>+		p++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	param[0] = NFC_HCI_UICC_HOST_ID;</div><div class='add'>+	r = nfc_hci_set_param(hdev, NFC_HCI_ADMIN_GATE,</div><div class='add'>+			      NFC_HCI_ADMIN_WHITELIST, param, 1);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	param[0] = 0x3d;</div><div class='add'>+	r = nfc_hci_set_param(hdev, PN544_SYS_MGMT_GATE,</div><div class='add'>+			      PN544_SYS_MGMT_INFO_NOTIFICATION, param, 1);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	param[0] = 0x0;</div><div class='add'>+	r = nfc_hci_set_param(hdev, NFC_HCI_RF_READER_A_GATE,</div><div class='add'>+			      PN544_RF_READER_A_AUTO_ACTIVATION, param, 1);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,</div><div class='add'>+			       NFC_HCI_EVT_END_OPERATION, NULL, 0);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	param[0] = 0x1;</div><div class='add'>+	r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,</div><div class='add'>+			      PN544_PL_NFCT_DEACTIVATED, param, 1);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	param[0] = 0x0;</div><div class='add'>+	r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,</div><div class='add'>+			      PN544_PL_RDPHASES, param, 1);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	r = nfc_hci_get_param(hdev, NFC_HCI_ID_MGMT_GATE,</div><div class='add'>+			      PN544_ID_MGMT_FULL_VERSION_SW, &amp;skb);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;len != FULL_VERSION_LEN) {</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	print_hex_dump(KERN_DEBUG, "FULL VERSION SOFTWARE INFO: ",</div><div class='add'>+		       DUMP_PREFIX_NONE, 16, 1,</div><div class='add'>+		       skb-&gt;data, FULL_VERSION_LEN, false);</div><div class='add'>+</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pn544_hci_xmit(struct nfc_shdlc *shdlc, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);</div><div class='add'>+	struct i2c_client *client = info-&gt;i2c_dev;</div><div class='add'>+</div><div class='add'>+	if (info-&gt;hard_fault != 0)</div><div class='add'>+		return info-&gt;hard_fault;</div><div class='add'>+</div><div class='add'>+	return pn544_hci_i2c_write(client, skb-&gt;data, skb-&gt;len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pn544_hci_start_poll(struct nfc_shdlc *shdlc, u32 protocols)</div><div class='add'>+{</div><div class='add'>+	struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);</div><div class='add'>+	u8 phases = 0;</div><div class='add'>+	int r;</div><div class='add'>+	u8 duration[2];</div><div class='add'>+	u8 activated;</div><div class='add'>+</div><div class='add'>+	pr_info(DRIVER_DESC ": %s protocols = %d\n", __func__, protocols);</div><div class='add'>+</div><div class='add'>+	r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,</div><div class='add'>+			       NFC_HCI_EVT_END_OPERATION, NULL, 0);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	duration[0] = 0x18;</div><div class='add'>+	duration[1] = 0x6a;</div><div class='add'>+	r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,</div><div class='add'>+			      PN544_PL_EMULATION, duration, 2);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	activated = 0;</div><div class='add'>+	r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,</div><div class='add'>+			      PN544_PL_NFCT_DEACTIVATED, &amp;activated, 1);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	if (protocols &amp; (NFC_PROTO_ISO14443_MASK | NFC_PROTO_MIFARE_MASK |</div><div class='add'>+			 NFC_PROTO_JEWEL_MASK))</div><div class='add'>+		phases |= 1;		/* Type A */</div><div class='add'>+	if (protocols &amp; NFC_PROTO_FELICA_MASK) {</div><div class='add'>+		phases |= (1 &lt;&lt; 2);	/* Type F 212 */</div><div class='add'>+		phases |= (1 &lt;&lt; 3);	/* Type F 424 */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phases |= (1 &lt;&lt; 5);		/* NFC active */</div><div class='add'>+</div><div class='add'>+	r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,</div><div class='add'>+			      PN544_PL_RDPHASES, &amp;phases, 1);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,</div><div class='add'>+			       NFC_HCI_EVT_READER_REQUESTED, NULL, 0);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,</div><div class='add'>+				   NFC_HCI_EVT_END_OPERATION, NULL, 0);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pn544_hci_target_from_gate(struct nfc_shdlc *shdlc, u8 gate,</div><div class='add'>+				      struct nfc_target *target)</div><div class='add'>+{</div><div class='add'>+	switch (gate) {</div><div class='add'>+	case PN544_RF_READER_F_GATE:</div><div class='add'>+		target-&gt;supported_protocols = NFC_PROTO_FELICA_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case PN544_RF_READER_JEWEL_GATE:</div><div class='add'>+		target-&gt;supported_protocols = NFC_PROTO_JEWEL_MASK;</div><div class='add'>+		target-&gt;sens_res = 0x0c00;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EPROTO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pn544_hci_complete_target_discovered(struct nfc_shdlc *shdlc,</div><div class='add'>+						u8 gate,</div><div class='add'>+						struct nfc_target *target)</div><div class='add'>+{</div><div class='add'>+	struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);</div><div class='add'>+	struct sk_buff *uid_skb;</div><div class='add'>+	int r = 0;</div><div class='add'>+</div><div class='add'>+	if (target-&gt;supported_protocols &amp; NFC_PROTO_MIFARE_MASK) {</div><div class='add'>+		if (target-&gt;nfcid1_len != 4 &amp;&amp; target-&gt;nfcid1_len != 7 &amp;&amp;</div><div class='add'>+		    target-&gt;nfcid1_len != 10)</div><div class='add'>+			return -EPROTO;</div><div class='add'>+</div><div class='add'>+		r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,</div><div class='add'>+				     PN544_RF_READER_CMD_ACTIVATE_NEXT,</div><div class='add'>+				     target-&gt;nfcid1, target-&gt;nfcid1_len, NULL);</div><div class='add'>+	} else if (target-&gt;supported_protocols &amp; NFC_PROTO_FELICA_MASK) {</div><div class='add'>+		r = nfc_hci_get_param(hdev, PN544_RF_READER_F_GATE,</div><div class='add'>+				      PN544_FELICA_ID, &amp;uid_skb);</div><div class='add'>+		if (r &lt; 0)</div><div class='add'>+			return r;</div><div class='add'>+</div><div class='add'>+		if (uid_skb-&gt;len != 8) {</div><div class='add'>+			kfree_skb(uid_skb);</div><div class='add'>+			return -EPROTO;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		r = nfc_hci_send_cmd(hdev, PN544_RF_READER_F_GATE,</div><div class='add'>+				     PN544_RF_READER_CMD_ACTIVATE_NEXT,</div><div class='add'>+				     uid_skb-&gt;data, uid_skb-&gt;len, NULL);</div><div class='add'>+		kfree_skb(uid_skb);</div><div class='add'>+	} else if (target-&gt;supported_protocols &amp; NFC_PROTO_ISO14443_MASK) {</div><div class='add'>+		/*</div><div class='add'>+		 * TODO: maybe other ISO 14443 require some kind of continue</div><div class='add'>+		 * activation, but for now we've seen only this one below.</div><div class='add'>+		 */</div><div class='add'>+		if (target-&gt;sens_res == 0x4403)	/* Type 4 Mifare DESFire */</div><div class='add'>+			r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,</div><div class='add'>+			      PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION,</div><div class='add'>+			      NULL, 0, NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MIFARE_CMD_AUTH_KEY_A	0x60</div><div class='add'>+#define MIFARE_CMD_AUTH_KEY_B	0x61</div><div class='add'>+#define MIFARE_CMD_HEADER	2</div><div class='add'>+#define MIFARE_UID_LEN		4</div><div class='add'>+#define MIFARE_KEY_LEN		6</div><div class='add'>+#define MIFARE_CMD_LEN		12</div><div class='add'>+/*</div><div class='add'>+ * Returns:</div><div class='add'>+ * &lt;= 0: driver handled the data exchange</div><div class='add'>+ *    1: driver doesn't especially handle, please do standard processing</div><div class='add'>+ */</div><div class='add'>+static int pn544_hci_data_exchange(struct nfc_shdlc *shdlc,</div><div class='add'>+				   struct nfc_target *target,</div><div class='add'>+				   struct sk_buff *skb,</div><div class='add'>+				   struct sk_buff **res_skb)</div><div class='add'>+{</div><div class='add'>+	struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	pr_info(DRIVER_DESC ": %s for gate=%d\n", __func__,</div><div class='add'>+		target-&gt;hci_reader_gate);</div><div class='add'>+</div><div class='add'>+	switch (target-&gt;hci_reader_gate) {</div><div class='add'>+	case NFC_HCI_RF_READER_A_GATE:</div><div class='add'>+		if (target-&gt;supported_protocols &amp; NFC_PROTO_MIFARE_MASK) {</div><div class='add'>+			/*</div><div class='add'>+			 * It seems that pn544 is inverting key and UID for</div><div class='add'>+			 * MIFARE authentication commands.</div><div class='add'>+			 */</div><div class='add'>+			if (skb-&gt;len == MIFARE_CMD_LEN &amp;&amp;</div><div class='add'>+			    (skb-&gt;data[0] == MIFARE_CMD_AUTH_KEY_A ||</div><div class='add'>+			     skb-&gt;data[0] == MIFARE_CMD_AUTH_KEY_B)) {</div><div class='add'>+				u8 uid[MIFARE_UID_LEN];</div><div class='add'>+				u8 *data = skb-&gt;data + MIFARE_CMD_HEADER;</div><div class='add'>+</div><div class='add'>+				memcpy(uid, data + MIFARE_KEY_LEN,</div><div class='add'>+				       MIFARE_UID_LEN);</div><div class='add'>+				memmove(data + MIFARE_UID_LEN, data,</div><div class='add'>+					MIFARE_KEY_LEN);</div><div class='add'>+				memcpy(data, uid, MIFARE_UID_LEN);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			return nfc_hci_send_cmd(hdev, target-&gt;hci_reader_gate,</div><div class='add'>+						PN544_MIFARE_CMD,</div><div class='add'>+						skb-&gt;data, skb-&gt;len, res_skb);</div><div class='add'>+		} else</div><div class='add'>+			return 1;</div><div class='add'>+	case PN544_RF_READER_F_GATE:</div><div class='add'>+		*skb_push(skb, 1) = 0;</div><div class='add'>+		*skb_push(skb, 1) = 0;</div><div class='add'>+</div><div class='add'>+		r = nfc_hci_send_cmd(hdev, target-&gt;hci_reader_gate,</div><div class='add'>+				     PN544_FELICA_RAW,</div><div class='add'>+				     skb-&gt;data, skb-&gt;len, res_skb);</div><div class='add'>+		if (r == 0)</div><div class='add'>+			skb_pull(*res_skb, 1);</div><div class='add'>+		return r;</div><div class='add'>+	case PN544_RF_READER_JEWEL_GATE:</div><div class='add'>+		return nfc_hci_send_cmd(hdev, target-&gt;hci_reader_gate,</div><div class='add'>+					PN544_JEWEL_RAW_CMD,</div><div class='add'>+					skb-&gt;data, skb-&gt;len, res_skb);</div><div class='add'>+	default:</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pn544_hci_check_presence(struct nfc_shdlc *shdlc,</div><div class='add'>+				   struct nfc_target *target)</div><div class='add'>+{</div><div class='add'>+	struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);</div><div class='add'>+</div><div class='add'>+	return nfc_hci_send_cmd(hdev, target-&gt;hci_reader_gate,</div><div class='add'>+				PN544_RF_READER_CMD_PRESENCE_CHECK,</div><div class='add'>+				NULL, 0, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct nfc_shdlc_ops pn544_shdlc_ops = {</div><div class='add'>+	.open = pn544_hci_open,</div><div class='add'>+	.close = pn544_hci_close,</div><div class='add'>+	.hci_ready = pn544_hci_ready,</div><div class='add'>+	.xmit = pn544_hci_xmit,</div><div class='add'>+	.start_poll = pn544_hci_start_poll,</div><div class='add'>+	.target_from_gate = pn544_hci_target_from_gate,</div><div class='add'>+	.complete_target_discovered = pn544_hci_complete_target_discovered,</div><div class='add'>+	.data_exchange = pn544_hci_data_exchange,</div><div class='add'>+	.check_presence = pn544_hci_check_presence,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit pn544_hci_probe(struct i2c_client *client,</div><div class='add'>+				     const struct i2c_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct pn544_hci_info *info;</div><div class='add'>+	struct pn544_nfc_platform_data *pdata;</div><div class='add'>+	int r = 0;</div><div class='add'>+	u32 protocols;</div><div class='add'>+	struct nfc_hci_init_data init_data;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "%s\n", __func__);</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "IRQ: %d\n", client-&gt;irq);</div><div class='add'>+</div><div class='add'>+	if (!i2c_check_functionality(client-&gt;adapter, I2C_FUNC_I2C)) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Need I2C_FUNC_I2C\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info = kzalloc(sizeof(struct pn544_hci_info), GFP_KERNEL);</div><div class='add'>+	if (!info) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev,</div><div class='add'>+			"Cannot allocate memory for pn544_hci_info.\n");</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto err_info_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info-&gt;i2c_dev = client;</div><div class='add'>+	info-&gt;state = PN544_ST_COLD;</div><div class='add'>+	mutex_init(&amp;info-&gt;info_lock);</div><div class='add'>+	i2c_set_clientdata(client, info);</div><div class='add'>+</div><div class='add'>+	pdata = client-&gt;dev.platform_data;</div><div class='add'>+	if (pdata == NULL) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "No platform data\n");</div><div class='add'>+		r = -EINVAL;</div><div class='add'>+		goto err_pdata;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;request_resources == NULL) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "request_resources() missing\n");</div><div class='add'>+		r = -EINVAL;</div><div class='add'>+		goto err_pdata;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = pdata-&gt;request_resources(client);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Cannot get platform resources\n");</div><div class='add'>+		goto err_pdata;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info-&gt;gpio_en = pdata-&gt;get_gpio(NFC_GPIO_ENABLE);</div><div class='add'>+	info-&gt;gpio_fw = pdata-&gt;get_gpio(NFC_GPIO_FW_RESET);</div><div class='add'>+	info-&gt;gpio_irq = pdata-&gt;get_gpio(NFC_GPIO_IRQ);</div><div class='add'>+</div><div class='add'>+	pn544_hci_platform_init(info);</div><div class='add'>+</div><div class='add'>+	r = request_threaded_irq(client-&gt;irq, NULL, pn544_hci_irq_thread_fn,</div><div class='add'>+				 IRQF_TRIGGER_RISING, PN544_HCI_DRIVER_NAME,</div><div class='add'>+				 info);</div><div class='add'>+	if (r &lt; 0) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Unable to register IRQ handler\n");</div><div class='add'>+		goto err_rti;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	init_data.gate_count = ARRAY_SIZE(pn544_custom_gates);</div><div class='add'>+</div><div class='add'>+	memcpy(init_data.gates, pn544_custom_gates,</div><div class='add'>+	       ARRAY_SIZE(pn544_custom_gates));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TODO: Session id must include the driver name + some bus addr</div><div class='add'>+	 * persistent info to discriminate 2 identical chips</div><div class='add'>+	 */</div><div class='add'>+	strcpy(init_data.session_id, "ID544HCI");</div><div class='add'>+</div><div class='add'>+	protocols = NFC_PROTO_JEWEL_MASK |</div><div class='add'>+		    NFC_PROTO_MIFARE_MASK |</div><div class='add'>+		    NFC_PROTO_FELICA_MASK |</div><div class='add'>+		    NFC_PROTO_ISO14443_MASK |</div><div class='add'>+		    NFC_PROTO_NFC_DEP_MASK;</div><div class='add'>+</div><div class='add'>+	info-&gt;shdlc = nfc_shdlc_allocate(&amp;pn544_shdlc_ops,</div><div class='add'>+					 &amp;init_data, protocols,</div><div class='add'>+					 PN544_CMDS_HEADROOM, 0,</div><div class='add'>+					 PN544_HCI_LLC_MAX_PAYLOAD,</div><div class='add'>+					 dev_name(&amp;client-&gt;dev));</div><div class='add'>+	if (!info-&gt;shdlc) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Cannot allocate nfc shdlc.\n");</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto err_allocshdlc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nfc_shdlc_set_clientdata(info-&gt;shdlc, info);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_allocshdlc:</div><div class='add'>+	free_irq(client-&gt;irq, info);</div><div class='add'>+</div><div class='add'>+err_rti:</div><div class='add'>+	if (pdata-&gt;free_resources != NULL)</div><div class='add'>+		pdata-&gt;free_resources();</div><div class='add'>+</div><div class='add'>+err_pdata:</div><div class='add'>+	kfree(info);</div><div class='add'>+</div><div class='add'>+err_info_alloc:</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __devexit int pn544_hci_remove(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct pn544_hci_info *info = i2c_get_clientdata(client);</div><div class='add'>+	struct pn544_nfc_platform_data *pdata = client-&gt;dev.platform_data;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	nfc_shdlc_free(info-&gt;shdlc);</div><div class='add'>+</div><div class='add'>+	if (info-&gt;state != PN544_ST_COLD) {</div><div class='add'>+		if (pdata-&gt;disable)</div><div class='add'>+			pdata-&gt;disable();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	free_irq(client-&gt;irq, info);</div><div class='add'>+	if (pdata-&gt;free_resources)</div><div class='add'>+		pdata-&gt;free_resources();</div><div class='add'>+</div><div class='add'>+	kfree(info);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct i2c_driver pn544_hci_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		   .name = PN544_HCI_DRIVER_NAME,</div><div class='add'>+		  },</div><div class='add'>+	.probe = pn544_hci_probe,</div><div class='add'>+	.id_table = pn544_hci_id_table,</div><div class='add'>+	.remove = __devexit_p(pn544_hci_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init pn544_hci_init(void)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	pr_debug(DRIVER_DESC ": %s\n", __func__);</div><div class='add'>+</div><div class='add'>+	r = i2c_add_driver(&amp;pn544_hci_driver);</div><div class='add'>+	if (r) {</div><div class='add'>+		pr_err(PN544_HCI_DRIVER_NAME ": driver registration failed\n");</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit pn544_hci_exit(void)</div><div class='add'>+{</div><div class='add'>+	i2c_del_driver(&amp;pn544_hci_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(pn544_hci_init);</div><div class='add'>+module_exit(pn544_hci_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION(DRIVER_DESC);</div><div class='head'>diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig<br/>index 8e84ce9765a9..dfba3e64d595 100644<br/>--- a/<a href='/drm-misc/tree/drivers/of/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/of/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/of/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/Kconfig</a></div><div class='hunk'>@@ -51,12 +51,6 @@ config OF_IRQ</div><div class='ctx'> config OF_DEVICE</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config OF_GPIO</div><div class='del'>-	def_bool y</div><div class='del'>-	depends on GPIOLIB &amp;&amp; !SPARC</div><div class='del'>-	help</div><div class='del'>-	  OpenFirmware GPIO accessors</div><div class='del'>-</div><div class='ctx'> config OF_I2C</div><div class='ctx'> 	def_tristate I2C</div><div class='ctx'> 	depends on I2C &amp;&amp; !SPARC</div><div class='hunk'>@@ -67,12 +61,6 @@ config OF_NET</div><div class='ctx'> 	depends on NETDEVICES</div><div class='ctx'> 	def_bool y</div><div class='ctx'> </div><div class='del'>-config OF_SPI</div><div class='del'>-	def_tristate SPI</div><div class='del'>-	depends on SPI &amp;&amp; !SPARC</div><div class='del'>-	help</div><div class='del'>-	  OpenFirmware SPI accessors</div><div class='del'>-</div><div class='ctx'> config OF_MDIO</div><div class='ctx'> 	def_tristate PHYLIB</div><div class='ctx'> 	depends on PHYLIB</div><div class='head'>diff --git a/drivers/of/Makefile b/drivers/of/Makefile<br/>index aa90e602c8a7..e027f444d10c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/of/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/of/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/of/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/Makefile</a></div><div class='hunk'>@@ -4,10 +4,8 @@ obj-$(CONFIG_OF_PROMTREE) += pdt.o</div><div class='ctx'> obj-$(CONFIG_OF_ADDRESS)  += address.o</div><div class='ctx'> obj-$(CONFIG_OF_IRQ)    += irq.o</div><div class='ctx'> obj-$(CONFIG_OF_DEVICE) += device.o platform.o</div><div class='del'>-obj-$(CONFIG_OF_GPIO)   += gpio.o</div><div class='ctx'> obj-$(CONFIG_OF_I2C)	+= of_i2c.o</div><div class='ctx'> obj-$(CONFIG_OF_NET)	+= of_net.o</div><div class='del'>-obj-$(CONFIG_OF_SPI)	+= of_spi.o</div><div class='ctx'> obj-$(CONFIG_OF_SELFTEST) += selftest.o</div><div class='ctx'> obj-$(CONFIG_OF_MDIO)	+= of_mdio.o</div><div class='ctx'> obj-$(CONFIG_OF_PCI)	+= of_pci.o</div><div class='head'>diff --git a/drivers/of/address.c b/drivers/of/address.c<br/>index 66d96f14c274..7e262a6124c5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/of/address.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/of/address.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/of/address.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/address.c</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='head'>diff --git a/drivers/of/base.c b/drivers/of/base.c<br/>index 580644986945..d9bfd49b1935 100644<br/>--- a/<a href='/drm-misc/tree/drivers/of/base.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/of/base.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/of/base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/base.c</a></div><div class='hunk'>@@ -1260,3 +1260,44 @@ int of_alias_get_id(struct device_node *np, const char *stem)</div><div class='ctx'> 	return id;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(of_alias_get_id);</div><div class='add'>+</div><div class='add'>+const __be32 *of_prop_next_u32(struct property *prop, const __be32 *cur,</div><div class='add'>+			       u32 *pu)</div><div class='add'>+{</div><div class='add'>+	const void *curv = cur;</div><div class='add'>+</div><div class='add'>+	if (!prop)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!cur) {</div><div class='add'>+		curv = prop-&gt;value;</div><div class='add'>+		goto out_val;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	curv += sizeof(*cur);</div><div class='add'>+	if (curv &gt;= prop-&gt;value + prop-&gt;length)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+out_val:</div><div class='add'>+	*pu = be32_to_cpup(curv);</div><div class='add'>+	return curv;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(of_prop_next_u32);</div><div class='add'>+</div><div class='add'>+const char *of_prop_next_string(struct property *prop, const char *cur)</div><div class='add'>+{</div><div class='add'>+	const void *curv = cur;</div><div class='add'>+</div><div class='add'>+	if (!prop)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!cur)</div><div class='add'>+		return prop-&gt;value;</div><div class='add'>+</div><div class='add'>+	curv += strlen(cur) + 1;</div><div class='add'>+	if (curv &gt;= prop-&gt;value + prop-&gt;length)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return curv;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(of_prop_next_string);</div><div class='head'>diff --git a/drivers/of/of_i2c.c b/drivers/of/of_i2c.c<br/>index f37fbeb66a44..1e173f357674 100644<br/>--- a/<a href='/drm-misc/tree/drivers/of/of_i2c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/of/of_i2c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/of/of_i2c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/of_i2c.c</a></div><div class='hunk'>@@ -90,8 +90,22 @@ struct i2c_client *of_find_i2c_device_by_node(struct device_node *node)</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	return to_i2c_client(dev);</div><div class='add'>+	return i2c_verify_client(dev);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(of_find_i2c_device_by_node);</div><div class='ctx'> </div><div class='add'>+/* must call put_device() when done with returned i2c_adapter device */</div><div class='add'>+struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node)</div><div class='add'>+{</div><div class='add'>+	struct device *dev;</div><div class='add'>+</div><div class='add'>+	dev = bus_find_device(&amp;i2c_bus_type, NULL, node,</div><div class='add'>+					 of_dev_node_match);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return i2c_verify_adapter(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(of_find_i2c_adapter_by_node);</div><div class='add'>+</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c<br/>index 483c0adcad87..2574abde8d99 100644<br/>--- a/<a href='/drm-misc/tree/drivers/of/of_mdio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/of/of_mdio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/of/of_mdio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/of_mdio.c</a></div><div class='hunk'>@@ -45,6 +45,8 @@ int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np)</div><div class='ctx'> 		for (i=0; i&lt;PHY_MAX_ADDR; i++)</div><div class='ctx'> 			mdio-&gt;irq[i] = PHY_POLL;</div><div class='ctx'> </div><div class='add'>+	mdio-&gt;dev.of_node = np;</div><div class='add'>+</div><div class='ctx'> 	/* Register the MDIO bus */</div><div class='ctx'> 	rc = mdiobus_register(mdio);</div><div class='ctx'> 	if (rc)</div><div class='head'>diff --git a/drivers/of/of_pci_irq.c b/drivers/of/of_pci_irq.c<br/>index 93125163dea2..677053813211 100644<br/>--- a/<a href='/drm-misc/tree/drivers/of/of_pci_irq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/of/of_pci_irq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/of/of_pci_irq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/of/of_pci_irq.c</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'>  * PCI tree until an device-node is found, at which point it will finish</div><div class='ctx'>  * resolving using the OF tree walking.</div><div class='ctx'>  */</div><div class='del'>-int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)</div><div class='add'>+int of_irq_map_pci(const struct pci_dev *pdev, struct of_irq *out_irq)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *dn, *ppnode;</div><div class='ctx'> 	struct pci_dev *ppdev;</div><div class='head'>diff --git a/drivers/of/of_spi.c b/drivers/of/of_spi.c<br/>deleted file mode 100644<br/>index 6dbc074e4876..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/of/of_spi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/of/of_spi.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,99 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * SPI OF support routines</div><div class='del'>- * Copyright (C) 2008 Secret Lab Technologies Ltd.</div><div class='del'>- *</div><div class='del'>- * Support routines for deriving SPI device attachments from the device</div><div class='del'>- * tree.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/spi/spi.h&gt;</div><div class='del'>-#include &lt;linux/of_irq.h&gt;</div><div class='del'>-#include &lt;linux/of_spi.h&gt;</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * of_register_spi_devices - Register child devices onto the SPI bus</div><div class='del'>- * @master:	Pointer to spi_master device</div><div class='del'>- *</div><div class='del'>- * Registers an spi_device for each child node of master node which has a 'reg'</div><div class='del'>- * property.</div><div class='del'>- */</div><div class='del'>-void of_register_spi_devices(struct spi_master *master)</div><div class='del'>-{</div><div class='del'>-	struct spi_device *spi;</div><div class='del'>-	struct device_node *nc;</div><div class='del'>-	const __be32 *prop;</div><div class='del'>-	int rc;</div><div class='del'>-	int len;</div><div class='del'>-</div><div class='del'>-	if (!master-&gt;dev.of_node)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for_each_child_of_node(master-&gt;dev.of_node, nc) {</div><div class='del'>-		/* Alloc an spi_device */</div><div class='del'>-		spi = spi_alloc_device(master);</div><div class='del'>-		if (!spi) {</div><div class='del'>-			dev_err(&amp;master-&gt;dev, "spi_device alloc error for %s\n",</div><div class='del'>-				nc-&gt;full_name);</div><div class='del'>-			spi_dev_put(spi);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Select device driver */</div><div class='del'>-		if (of_modalias_node(nc, spi-&gt;modalias,</div><div class='del'>-				     sizeof(spi-&gt;modalias)) &lt; 0) {</div><div class='del'>-			dev_err(&amp;master-&gt;dev, "cannot find modalias for %s\n",</div><div class='del'>-				nc-&gt;full_name);</div><div class='del'>-			spi_dev_put(spi);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Device address */</div><div class='del'>-		prop = of_get_property(nc, "reg", &amp;len);</div><div class='del'>-		if (!prop || len &lt; sizeof(*prop)) {</div><div class='del'>-			dev_err(&amp;master-&gt;dev, "%s has no 'reg' property\n",</div><div class='del'>-				nc-&gt;full_name);</div><div class='del'>-			spi_dev_put(spi);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		spi-&gt;chip_select = be32_to_cpup(prop);</div><div class='del'>-</div><div class='del'>-		/* Mode (clock phase/polarity/etc.) */</div><div class='del'>-		if (of_find_property(nc, "spi-cpha", NULL))</div><div class='del'>-			spi-&gt;mode |= SPI_CPHA;</div><div class='del'>-		if (of_find_property(nc, "spi-cpol", NULL))</div><div class='del'>-			spi-&gt;mode |= SPI_CPOL;</div><div class='del'>-		if (of_find_property(nc, "spi-cs-high", NULL))</div><div class='del'>-			spi-&gt;mode |= SPI_CS_HIGH;</div><div class='del'>-</div><div class='del'>-		/* Device speed */</div><div class='del'>-		prop = of_get_property(nc, "spi-max-frequency", &amp;len);</div><div class='del'>-		if (!prop || len &lt; sizeof(*prop)) {</div><div class='del'>-			dev_err(&amp;master-&gt;dev, "%s has no 'spi-max-frequency' property\n",</div><div class='del'>-				nc-&gt;full_name);</div><div class='del'>-			spi_dev_put(spi);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		spi-&gt;max_speed_hz = be32_to_cpup(prop);</div><div class='del'>-</div><div class='del'>-		/* IRQ */</div><div class='del'>-		spi-&gt;irq = irq_of_parse_and_map(nc, 0);</div><div class='del'>-</div><div class='del'>-		/* Store a pointer to the node in the device structure */</div><div class='del'>-		of_node_get(nc);</div><div class='del'>-		spi-&gt;dev.of_node = nc;</div><div class='del'>-</div><div class='del'>-		/* Register the new device */</div><div class='del'>-		request_module(spi-&gt;modalias);</div><div class='del'>-		rc = spi_add_device(spi);</div><div class='del'>-		if (rc) {</div><div class='del'>-			dev_err(&amp;master-&gt;dev, "spi_device register error %s\n",</div><div class='del'>-				nc-&gt;full_name);</div><div class='del'>-			spi_dev_put(spi);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(of_register_spi_devices);</div><div class='head'>diff --git a/drivers/parisc/sba_iommu.c b/drivers/parisc/sba_iommu.c<br/>index 8644d5372e7f..42cfcd9eb9aa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/parisc/sba_iommu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/parisc/sba_iommu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/parisc/sba_iommu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parisc/sba_iommu.c</a></div><div class='hunk'>@@ -44,6 +44,7 @@</div><div class='ctx'> #include &lt;asm/ropes.h&gt;</div><div class='ctx'> #include &lt;asm/mckinley.h&gt;	/* for proc_mckinley_root */</div><div class='ctx'> #include &lt;asm/runway.h&gt;		/* for proc_runway_root */</div><div class='add'>+#include &lt;asm/page.h&gt;		/* for PAGE0 */</div><div class='ctx'> #include &lt;asm/pdc.h&gt;		/* for PDC_MODEL_* */</div><div class='ctx'> #include &lt;asm/pdcpat.h&gt;		/* for is_pdc_pat() */</div><div class='ctx'> #include &lt;asm/parisc-device.h&gt;</div><div class='head'>diff --git a/drivers/parisc/superio.c b/drivers/parisc/superio.c<br/>index e3b76d409dee..5003458980d3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/parisc/superio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/parisc/superio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/parisc/superio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parisc/superio.c</a></div><div class='hunk'>@@ -348,7 +348,7 @@ int superio_fixup_irq(struct pci_dev *pcidev)</div><div class='ctx'> 		BUG();</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='del'>-	printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",</div><div class='add'>+	printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %pf\n",</div><div class='ctx'> 		pci_name(pcidev),</div><div class='ctx'> 		pcidev-&gt;vendor, pcidev-&gt;device,</div><div class='ctx'> 		__builtin_return_address(0));</div><div class='head'>diff --git a/drivers/parport/parport_amiga.c b/drivers/parport/parport_amiga.c<br/>index 8bef6d60f88b..ee78e0ee6e05 100644<br/>--- a/<a href='/drm-misc/tree/drivers/parport/parport_amiga.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/parport/parport_amiga.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/parport/parport_amiga.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parport/parport_amiga.c</a></div><div class='hunk'>@@ -48,23 +48,6 @@ static unsigned char amiga_read_data(struct parport *p)</div><div class='ctx'> 	return ciaa.prb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if 0</div><div class='del'>-static unsigned char control_pc_to_amiga(unsigned char control)</div><div class='del'>-{</div><div class='del'>-	unsigned char ret = 0;</div><div class='del'>-</div><div class='del'>-	if (control &amp; PARPORT_CONTROL_SELECT) /* XXX: What is SELECP? */</div><div class='del'>-		;</div><div class='del'>-	if (control &amp; PARPORT_CONTROL_INIT) /* INITP */</div><div class='del'>-		/* reset connected to cpu reset pin */;</div><div class='del'>-	if (control &amp; PARPORT_CONTROL_AUTOFD) /* AUTOLF */</div><div class='del'>-		/* Not connected */;</div><div class='del'>-	if (control &amp; PARPORT_CONTROL_STROBE) /* Strobe */</div><div class='del'>-		/* Handled only directly by hardware */;</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static unsigned char control_amiga_to_pc(unsigned char control)</div><div class='ctx'> {</div><div class='ctx'> 	return PARPORT_CONTROL_SELECT |</div><div class='hunk'>@@ -95,25 +78,6 @@ static unsigned char amiga_frob_control( struct parport *p, unsigned char mask,</div><div class='ctx'> 	return old;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if 0 /* currently unused */</div><div class='del'>-static unsigned char status_pc_to_amiga(unsigned char status)</div><div class='del'>-{</div><div class='del'>-	unsigned char ret = 1;</div><div class='del'>-</div><div class='del'>-	if (status &amp; PARPORT_STATUS_BUSY) /* Busy */</div><div class='del'>-		ret &amp;= ~1;</div><div class='del'>-	if (status &amp; PARPORT_STATUS_ACK) /* Ack */</div><div class='del'>-		/* handled in hardware */;</div><div class='del'>-	if (status &amp; PARPORT_STATUS_PAPEROUT) /* PaperOut */</div><div class='del'>-		ret |= 2;</div><div class='del'>-	if (status &amp; PARPORT_STATUS_SELECT) /* select */</div><div class='del'>-		ret |= 4;</div><div class='del'>-	if (status &amp; PARPORT_STATUS_ERROR) /* error */</div><div class='del'>-		/* not connected */;</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static unsigned char status_amiga_to_pc(unsigned char status)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char ret = PARPORT_STATUS_BUSY | PARPORT_STATUS_ACK | PARPORT_STATUS_ERROR;</div><div class='head'>diff --git a/drivers/parport/parport_atari.c b/drivers/parport/parport_atari.c<br/>index 0b28fccec03f..7ad59ac68cf6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/parport/parport_atari.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/parport/parport_atari.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/parport/parport_atari.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parport/parport_atari.c</a></div><div class='hunk'>@@ -130,15 +130,6 @@ parport_atari_data_forward(struct parport *p)</div><div class='ctx'> static void</div><div class='ctx'> parport_atari_data_reverse(struct parport *p)</div><div class='ctx'> {</div><div class='del'>-#if 0 /* too dangerous, can kill sound chip */</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	/* Soundchip port B as input. */</div><div class='del'>-	sound_ym.rd_data_reg_sel = 7;</div><div class='del'>-	sound_ym.wd_data = sound_ym.rd_data_reg_sel &amp; ~0x40;</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct parport_operations parport_atari_ops = {</div><div class='head'>diff --git a/drivers/parport/parport_mfc3.c b/drivers/parport/parport_mfc3.c<br/>index 1c0c642b3e23..7578d79b3688 100644<br/>--- a/<a href='/drm-misc/tree/drivers/parport/parport_mfc3.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/parport/parport_mfc3.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/parport/parport_mfc3.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parport/parport_mfc3.c</a></div><div class='hunk'>@@ -147,25 +147,6 @@ DPRINTK(KERN_DEBUG "frob_control mask %02x, value %02x\n",mask,val);</div><div class='ctx'> 	return old;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if 0 /* currently unused */</div><div class='del'>-static unsigned char status_pc_to_mfc3(unsigned char status)</div><div class='del'>-{</div><div class='del'>-	unsigned char ret = 1;</div><div class='del'>-</div><div class='del'>-	if (status &amp; PARPORT_STATUS_BUSY) /* Busy */</div><div class='del'>-		ret &amp;= ~1;</div><div class='del'>-	if (status &amp; PARPORT_STATUS_ACK) /* Ack */</div><div class='del'>-		ret |= 8;</div><div class='del'>-	if (status &amp; PARPORT_STATUS_PAPEROUT) /* PaperOut */</div><div class='del'>-		ret |= 2;</div><div class='del'>-	if (status &amp; PARPORT_STATUS_SELECT) /* select */</div><div class='del'>-		ret |= 4;</div><div class='del'>-	if (status &amp; PARPORT_STATUS_ERROR) /* error */</div><div class='del'>-		ret |= 16;</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static unsigned char status_mfc3_to_pc(unsigned char status)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char ret = PARPORT_STATUS_BUSY;</div><div class='hunk'>@@ -184,14 +165,6 @@ static unsigned char status_mfc3_to_pc(unsigned char status)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if 0 /* currently unused */</div><div class='del'>-static void mfc3_write_status( struct parport *p, unsigned char status)</div><div class='del'>-{</div><div class='del'>-DPRINTK(KERN_DEBUG "write_status %02x\n",status);</div><div class='del'>-	pia(p)-&gt;ppra = (pia(p)-&gt;ppra &amp; 0xe0) | status_pc_to_mfc3(status);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static unsigned char mfc3_read_status(struct parport *p)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char status;</div><div class='hunk'>@@ -201,14 +174,6 @@ DPRINTK(KERN_DEBUG "read_status %02x\n", status);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if 0 /* currently unused */</div><div class='del'>-static void mfc3_change_mode( struct parport *p, int m)</div><div class='del'>-{</div><div class='del'>-	/* XXX: This port only has one mode, and I am</div><div class='del'>-	not sure about the corresponding PC-style mode*/</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static int use_cnt = 0;</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t mfc3_interrupt(int irq, void *dev_id)</div><div class='head'>diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c<br/>index 0cb64f50cecd..5abffe58a9d2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/parport/parport_pc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/parport/parport_pc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/parport/parport_pc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parport/parport_pc.c</a></div><div class='hunk'>@@ -197,54 +197,6 @@ static int change_mode(struct parport *p, int m)</div><div class='ctx'> 	ECR_WRITE(p, oecr);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PARPORT_1284</div><div class='del'>-/* Find FIFO lossage; FIFO is reset */</div><div class='del'>-#if 0</div><div class='del'>-static int get_fifo_residue(struct parport *p)</div><div class='del'>-{</div><div class='del'>-	int residue;</div><div class='del'>-	int cnfga;</div><div class='del'>-	const struct parport_pc_private *priv = p-&gt;physport-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	/* Adjust for the contents of the FIFO. */</div><div class='del'>-	for (residue = priv-&gt;fifo_depth; ; residue--) {</div><div class='del'>-		if (inb(ECONTROL(p)) &amp; 0x2)</div><div class='del'>-				/* Full up. */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		outb(0, FIFO(p));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "%s: %d PWords were left in FIFO\n", p-&gt;name,</div><div class='del'>-		residue);</div><div class='del'>-</div><div class='del'>-	/* Reset the FIFO. */</div><div class='del'>-	frob_set_mode(p, ECR_PS2);</div><div class='del'>-</div><div class='del'>-	/* Now change to config mode and clean up. FIXME */</div><div class='del'>-	frob_set_mode(p, ECR_CNF);</div><div class='del'>-	cnfga = inb(CONFIGA(p));</div><div class='del'>-	printk(KERN_DEBUG "%s: cnfgA contains 0x%02x\n", p-&gt;name, cnfga);</div><div class='del'>-</div><div class='del'>-	if (!(cnfga &amp; (1&lt;&lt;2))) {</div><div class='del'>-		printk(KERN_DEBUG "%s: Accounting for extra byte\n", p-&gt;name);</div><div class='del'>-		residue++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Don't care about partial PWords until support is added for</div><div class='del'>-	 * PWord != 1 byte. */</div><div class='del'>-</div><div class='del'>-	/* Back to PS2 mode. */</div><div class='del'>-	frob_set_mode(p, ECR_PS2);</div><div class='del'>-</div><div class='del'>-	DPRINTK(KERN_DEBUG</div><div class='del'>-	     "*** get_fifo_residue: done residue collecting (ecr = 0x%2.2x)\n",</div><div class='del'>-							inb(ECONTROL(p)));</div><div class='del'>-	return residue;</div><div class='del'>-}</div><div class='del'>-#endif  /*  0 */</div><div class='del'>-#endif /* IEEE 1284 support */</div><div class='ctx'> #endif /* FIFO support */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -940,234 +892,6 @@ static size_t parport_pc_ecp_write_block_pio(struct parport *port,</div><div class='ctx'> </div><div class='ctx'> 	return written;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#if 0</div><div class='del'>-static size_t parport_pc_ecp_read_block_pio(struct parport *port,</div><div class='del'>-					     void *buf, size_t length,</div><div class='del'>-					     int flags)</div><div class='del'>-{</div><div class='del'>-	size_t left = length;</div><div class='del'>-	size_t fifofull;</div><div class='del'>-	int r;</div><div class='del'>-	const int fifo = FIFO(port);</div><div class='del'>-	const struct parport_pc_private *priv = port-&gt;physport-&gt;private_data;</div><div class='del'>-	const int fifo_depth = priv-&gt;fifo_depth;</div><div class='del'>-	char *bufp = buf;</div><div class='del'>-</div><div class='del'>-	port = port-&gt;physport;</div><div class='del'>-	DPRINTK(KERN_DEBUG "parport_pc: parport_pc_ecp_read_block_pio\n");</div><div class='del'>-	dump_parport_state("enter fcn", port);</div><div class='del'>-</div><div class='del'>-	/* Special case: a timeout of zero means we cannot call schedule().</div><div class='del'>-	 * Also if O_NONBLOCK is set then use the default implementation. */</div><div class='del'>-	if (port-&gt;cad-&gt;timeout &lt;= PARPORT_INACTIVITY_O_NONBLOCK)</div><div class='del'>-		return parport_ieee1284_ecp_read_data(port, buf,</div><div class='del'>-						       length, flags);</div><div class='del'>-</div><div class='del'>-	if (port-&gt;ieee1284.mode == IEEE1284_MODE_ECPRLE) {</div><div class='del'>-		/* If the peripheral is allowed to send RLE compressed</div><div class='del'>-		 * data, it is possible for a byte to expand to 128</div><div class='del'>-		 * bytes in the FIFO. */</div><div class='del'>-		fifofull = 128;</div><div class='del'>-	} else {</div><div class='del'>-		fifofull = fifo_depth;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If the caller wants less than a full FIFO's worth of data,</div><div class='del'>-	 * go through software emulation.  Otherwise we may have to throw</div><div class='del'>-	 * away data. */</div><div class='del'>-	if (length &lt; fifofull)</div><div class='del'>-		return parport_ieee1284_ecp_read_data(port, buf,</div><div class='del'>-						       length, flags);</div><div class='del'>-</div><div class='del'>-	if (port-&gt;ieee1284.phase != IEEE1284_PH_REV_IDLE) {</div><div class='del'>-		/* change to reverse-idle phase (must be in forward-idle) */</div><div class='del'>-</div><div class='del'>-		/* Event 38: Set nAutoFd low (also make sure nStrobe is high) */</div><div class='del'>-		parport_frob_control(port,</div><div class='del'>-				      PARPORT_CONTROL_AUTOFD</div><div class='del'>-				      | PARPORT_CONTROL_STROBE,</div><div class='del'>-				      PARPORT_CONTROL_AUTOFD);</div><div class='del'>-		parport_pc_data_reverse(port); /* Must be in PS2 mode */</div><div class='del'>-		udelay(5);</div><div class='del'>-		/* Event 39: Set nInit low to initiate bus reversal */</div><div class='del'>-		parport_frob_control(port,</div><div class='del'>-				      PARPORT_CONTROL_INIT,</div><div class='del'>-				      0);</div><div class='del'>-		/* Event 40: Wait for  nAckReverse (PError) to go low */</div><div class='del'>-		r = parport_wait_peripheral(port, PARPORT_STATUS_PAPEROUT, 0);</div><div class='del'>-		if (r) {</div><div class='del'>-			printk(KERN_DEBUG "%s: PE timeout Event 40 (%d) "</div><div class='del'>-				"in ecp_read_block_pio\n", port-&gt;name, r);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set up ECP FIFO mode.*/</div><div class='del'>-/*	parport_pc_frob_control(port,</div><div class='del'>-				 PARPORT_CONTROL_STROBE |</div><div class='del'>-				 PARPORT_CONTROL_AUTOFD,</div><div class='del'>-				 PARPORT_CONTROL_AUTOFD); */</div><div class='del'>-	r = change_mode(port, ECR_ECP); /* ECP FIFO */</div><div class='del'>-	if (r)</div><div class='del'>-		printk(KERN_DEBUG "%s: Warning change_mode ECR_ECP failed\n",</div><div class='del'>-								port-&gt;name);</div><div class='del'>-</div><div class='del'>-	port-&gt;ieee1284.phase = IEEE1284_PH_REV_DATA;</div><div class='del'>-</div><div class='del'>-	/* the first byte must be collected manually */</div><div class='del'>-	dump_parport_state("pre 43", port);</div><div class='del'>-	/* Event 43: Wait for nAck to go low */</div><div class='del'>-	r = parport_wait_peripheral(port, PARPORT_STATUS_ACK, 0);</div><div class='del'>-	if (r) {</div><div class='del'>-		/* timed out while reading -- no data */</div><div class='del'>-		printk(KERN_DEBUG "PIO read timed out (initial byte)\n");</div><div class='del'>-		goto out_no_data;</div><div class='del'>-	}</div><div class='del'>-	/* read byte */</div><div class='del'>-	*bufp++ = inb(DATA(port));</div><div class='del'>-	left--;</div><div class='del'>-	dump_parport_state("43-44", port);</div><div class='del'>-	/* Event 44: nAutoFd (HostAck) goes high to acknowledge */</div><div class='del'>-	parport_pc_frob_control(port,</div><div class='del'>-				 PARPORT_CONTROL_AUTOFD,</div><div class='del'>-				 0);</div><div class='del'>-	dump_parport_state("pre 45", port);</div><div class='del'>-	/* Event 45: Wait for nAck to go high */</div><div class='del'>-	/* r = parport_wait_peripheral(port, PARPORT_STATUS_ACK,</div><div class='del'>-						PARPORT_STATUS_ACK); */</div><div class='del'>-	dump_parport_state("post 45", port);</div><div class='del'>-	r = 0;</div><div class='del'>-	if (r) {</div><div class='del'>-		/* timed out while waiting for peripheral to respond to ack */</div><div class='del'>-		printk(KERN_DEBUG "ECP PIO read timed out (waiting for nAck)\n");</div><div class='del'>-</div><div class='del'>-		/* keep hold of the byte we've got already */</div><div class='del'>-		goto out_no_data;</div><div class='del'>-	}</div><div class='del'>-	/* Event 46: nAutoFd (HostAck) goes low to accept more data */</div><div class='del'>-	parport_pc_frob_control(port,</div><div class='del'>-				 PARPORT_CONTROL_AUTOFD,</div><div class='del'>-				 PARPORT_CONTROL_AUTOFD);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	dump_parport_state("rev idle", port);</div><div class='del'>-	/* Do the transfer. */</div><div class='del'>-	while (left &gt; fifofull) {</div><div class='del'>-		int ret;</div><div class='del'>-		unsigned long expire = jiffies + port-&gt;cad-&gt;timeout;</div><div class='del'>-		unsigned char ecrval = inb(ECONTROL(port));</div><div class='del'>-</div><div class='del'>-		if (need_resched() &amp;&amp; time_before(jiffies, expire))</div><div class='del'>-			/* Can't yield the port. */</div><div class='del'>-			schedule();</div><div class='del'>-</div><div class='del'>-		/* At this point, the FIFO may already be full. In</div><div class='del'>-		 * that case ECP is already holding back the</div><div class='del'>-		 * peripheral (assuming proper design) with a delayed</div><div class='del'>-		 * handshake.  Work fast to avoid a peripheral</div><div class='del'>-		 * timeout.  */</div><div class='del'>-</div><div class='del'>-		if (ecrval &amp; 0x01) {</div><div class='del'>-			/* FIFO is empty. Wait for interrupt. */</div><div class='del'>-			dump_parport_state("FIFO empty", port);</div><div class='del'>-</div><div class='del'>-			/* Anyone else waiting for the port? */</div><div class='del'>-			if (port-&gt;waithead) {</div><div class='del'>-				printk(KERN_DEBUG "Somebody wants the port\n");</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* Clear serviceIntr */</div><div class='del'>-			ECR_WRITE(port, ecrval &amp; ~(1&lt;&lt;2));</div><div class='del'>-false_alarm:</div><div class='del'>-			dump_parport_state("waiting", port);</div><div class='del'>-			ret = parport_wait_event(port, HZ);</div><div class='del'>-			DPRINTK(KERN_DEBUG "parport_wait_event returned %d\n",</div><div class='del'>-									ret);</div><div class='del'>-			if (ret &lt; 0)</div><div class='del'>-				break;</div><div class='del'>-			ret = 0;</div><div class='del'>-			if (!time_before(jiffies, expire)) {</div><div class='del'>-				/* Timed out. */</div><div class='del'>-				dump_parport_state("timeout", port);</div><div class='del'>-				printk(KERN_DEBUG "PIO read timed out\n");</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			ecrval = inb(ECONTROL(port));</div><div class='del'>-			if (!(ecrval &amp; (1&lt;&lt;2))) {</div><div class='del'>-				if (need_resched() &amp;&amp;</div><div class='del'>-				    time_before(jiffies, expire)) {</div><div class='del'>-					schedule();</div><div class='del'>-				}</div><div class='del'>-				goto false_alarm;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* Depending on how the FIFO threshold was</div><div class='del'>-			 * set, how long interrupt service took, and</div><div class='del'>-			 * how fast the peripheral is, we might be</div><div class='del'>-			 * lucky and have a just filled FIFO. */</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (ecrval &amp; 0x02) {</div><div class='del'>-			/* FIFO is full. */</div><div class='del'>-			dump_parport_state("FIFO full", port);</div><div class='del'>-			insb(fifo, bufp, fifo_depth);</div><div class='del'>-			bufp += fifo_depth;</div><div class='del'>-			left -= fifo_depth;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		DPRINTK(KERN_DEBUG</div><div class='del'>-		  "*** ecp_read_block_pio: reading one byte from the FIFO\n");</div><div class='del'>-</div><div class='del'>-		/* FIFO not filled.  We will cycle this loop for a while</div><div class='del'>-		 * and either the peripheral will fill it faster,</div><div class='del'>-		 * tripping a fast empty with insb, or we empty it. */</div><div class='del'>-		*bufp++ = inb(fifo);</div><div class='del'>-		left--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* scoop up anything left in the FIFO */</div><div class='del'>-	while (left &amp;&amp; !(inb(ECONTROL(port) &amp; 0x01))) {</div><div class='del'>-		*bufp++ = inb(fifo);</div><div class='del'>-		left--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	port-&gt;ieee1284.phase = IEEE1284_PH_REV_IDLE;</div><div class='del'>-	dump_parport_state("rev idle2", port);</div><div class='del'>-</div><div class='del'>-out_no_data:</div><div class='del'>-</div><div class='del'>-	/* Go to forward idle mode to shut the peripheral up (event 47). */</div><div class='del'>-	parport_frob_control(port, PARPORT_CONTROL_INIT, PARPORT_CONTROL_INIT);</div><div class='del'>-</div><div class='del'>-	/* event 49: PError goes high */</div><div class='del'>-	r = parport_wait_peripheral(port,</div><div class='del'>-				     PARPORT_STATUS_PAPEROUT,</div><div class='del'>-				     PARPORT_STATUS_PAPEROUT);</div><div class='del'>-	if (r) {</div><div class='del'>-		printk(KERN_DEBUG</div><div class='del'>-			"%s: PE timeout FWDIDLE (%d) in ecp_read_block_pio\n",</div><div class='del'>-			port-&gt;name, r);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	port-&gt;ieee1284.phase = IEEE1284_PH_FWD_IDLE;</div><div class='del'>-</div><div class='del'>-	/* Finish up. */</div><div class='del'>-	{</div><div class='del'>-		int lost = get_fifo_residue(port);</div><div class='del'>-		if (lost)</div><div class='del'>-			/* Shouldn't happen with compliant peripherals. */</div><div class='del'>-			printk(KERN_DEBUG "%s: DATA LOSS (%d bytes)!\n",</div><div class='del'>-				port-&gt;name, lost);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dump_parport_state("fwd idle", port);</div><div class='del'>-	return length - left;</div><div class='del'>-}</div><div class='del'>-#endif  /*  0  */</div><div class='ctx'> #endif /* IEEE 1284 support */</div><div class='ctx'> #endif /* Allowed to use FIFO/DMA */</div><div class='ctx'> </div><div class='hunk'>@@ -2351,7 +2075,7 @@ struct parport *parport_pc_probe_port(unsigned long int base,</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_INFO "%s: PC-style at 0x%lx", p-&gt;name, p-&gt;base);</div><div class='ctx'> 	if (p-&gt;base_hi &amp;&amp; priv-&gt;ecr)</div><div class='del'>-		printk(" (0x%lx)", p-&gt;base_hi);</div><div class='add'>+		printk(KERN_CONT " (0x%lx)", p-&gt;base_hi);</div><div class='ctx'> 	if (p-&gt;irq == PARPORT_IRQ_AUTO) {</div><div class='ctx'> 		p-&gt;irq = PARPORT_IRQ_NONE;</div><div class='ctx'> 		parport_irq_probe(p);</div><div class='hunk'>@@ -2362,7 +2086,7 @@ struct parport *parport_pc_probe_port(unsigned long int base,</div><div class='ctx'> 		p-&gt;irq = PARPORT_IRQ_NONE;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (p-&gt;irq != PARPORT_IRQ_NONE) {</div><div class='del'>-		printk(", irq %d", p-&gt;irq);</div><div class='add'>+		printk(KERN_CONT ", irq %d", p-&gt;irq);</div><div class='ctx'> 		priv-&gt;ctr_writable |= 0x10;</div><div class='ctx'> </div><div class='ctx'> 		if (p-&gt;dma == PARPORT_DMA_AUTO) {</div><div class='hunk'>@@ -2386,21 +2110,21 @@ struct parport *parport_pc_probe_port(unsigned long int base,</div><div class='ctx'> 		/* p-&gt;ops-&gt;ecp_read_data = parport_pc_ecp_read_block_pio; */</div><div class='ctx'> #endif /* IEEE 1284 support */</div><div class='ctx'> 		if (p-&gt;dma != PARPORT_DMA_NONE) {</div><div class='del'>-			printk(", dma %d", p-&gt;dma);</div><div class='add'>+			printk(KERN_CONT ", dma %d", p-&gt;dma);</div><div class='ctx'> 			p-&gt;modes |= PARPORT_MODE_DMA;</div><div class='ctx'> 		} else</div><div class='del'>-			printk(", using FIFO");</div><div class='add'>+			printk(KERN_CONT ", using FIFO");</div><div class='ctx'> 	} else</div><div class='ctx'> 		/* We can't use the DMA channel after all. */</div><div class='ctx'> 		p-&gt;dma = PARPORT_DMA_NONE;</div><div class='ctx'> #endif /* Allowed to use FIFO/DMA */</div><div class='ctx'> </div><div class='del'>-	printk(" [");</div><div class='add'>+	printk(KERN_CONT " [");</div><div class='ctx'> </div><div class='ctx'> #define printmode(x) \</div><div class='ctx'> 	{\</div><div class='ctx'> 		if (p-&gt;modes &amp; PARPORT_MODE_##x) {\</div><div class='del'>-			printk("%s%s", f ? "," : "", #x);\</div><div class='add'>+			printk(KERN_CONT "%s%s", f ? "," : "", #x);\</div><div class='ctx'> 			f++;\</div><div class='ctx'> 		} \</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2416,9 +2140,9 @@ struct parport *parport_pc_probe_port(unsigned long int base,</div><div class='ctx'> 	}</div><div class='ctx'> #undef printmode</div><div class='ctx'> #ifndef CONFIG_PARPORT_1284</div><div class='del'>-	printk("(,...)");</div><div class='add'>+	printk(KERN_CONT "(,...)");</div><div class='ctx'> #endif /* CONFIG_PARPORT_1284 */</div><div class='del'>-	printk("]\n");</div><div class='add'>+	printk(KERN_CONT "]\n");</div><div class='ctx'> 	if (probedirq != PARPORT_IRQ_NONE)</div><div class='ctx'> 		printk(KERN_INFO "%s: irq %d detected\n", p-&gt;name, probedirq);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/parport/parport_sunbpp.c b/drivers/parport/parport_sunbpp.c<br/>index 9390a534a2b2..983a2d2df659 100644<br/>--- a/<a href='/drm-misc/tree/drivers/parport/parport_sunbpp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/parport/parport_sunbpp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/parport/parport_sunbpp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/parport/parport_sunbpp.c</a></div><div class='hunk'>@@ -82,27 +82,6 @@ static unsigned char parport_sunbpp_read_data(struct parport *p)</div><div class='ctx'> 	return sbus_readb(&amp;regs-&gt;p_dr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if 0</div><div class='del'>-static void control_pc_to_sunbpp(struct parport *p, unsigned char status)</div><div class='del'>-{</div><div class='del'>-	struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p-&gt;base;</div><div class='del'>-	unsigned char value_tcr = sbus_readb(&amp;regs-&gt;p_tcr);</div><div class='del'>-	unsigned char value_or = sbus_readb(&amp;regs-&gt;p_or);</div><div class='del'>-</div><div class='del'>-	if (status &amp; PARPORT_CONTROL_STROBE) </div><div class='del'>-		value_tcr |= P_TCR_DS;</div><div class='del'>-	if (status &amp; PARPORT_CONTROL_AUTOFD) </div><div class='del'>-		value_or |= P_OR_AFXN;</div><div class='del'>-	if (status &amp; PARPORT_CONTROL_INIT) </div><div class='del'>-		value_or |= P_OR_INIT;</div><div class='del'>-	if (status &amp; PARPORT_CONTROL_SELECT) </div><div class='del'>-		value_or |= P_OR_SLCT_IN;</div><div class='del'>-</div><div class='del'>-	sbus_writeb(value_or, &amp;regs-&gt;p_or);</div><div class='del'>-	sbus_writeb(value_tcr, &amp;regs-&gt;p_tcr);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static unsigned char status_sunbpp_to_pc(struct parport *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p-&gt;base;</div><div class='head'>diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile<br/>index 165274c064bc..01c001f3b766 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pci/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pci/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pci/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Makefile for the PCI bus specific drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-y		+= access.o bus.o probe.o remove.o pci.o \</div><div class='add'>+obj-y		+= access.o bus.o probe.o host-bridge.o remove.o pci.o \</div><div class='ctx'> 			pci-driver.o search.o pci-sysfs.o rom.o setup-res.o \</div><div class='ctx'> 			irq.o vpd.o</div><div class='ctx'> obj-$(CONFIG_PROC_FS) += proc.o</div><div class='head'>diff --git a/drivers/pci/host-bridge.c b/drivers/pci/host-bridge.c<br/>new file mode 100644<br/>index 000000000000..a68dc613a5be<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pci/host-bridge.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/host-bridge.c</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+/*</div><div class='add'>+ * host bridge related code</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include "pci.h"</div><div class='add'>+</div><div class='add'>+static struct pci_bus *find_pci_root_bus(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_bus *bus;</div><div class='add'>+</div><div class='add'>+	bus = dev-&gt;bus;</div><div class='add'>+	while (bus-&gt;parent)</div><div class='add'>+		bus = bus-&gt;parent;</div><div class='add'>+</div><div class='add'>+	return bus;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_host_bridge *find_pci_host_bridge(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_bus *bus = find_pci_root_bus(dev);</div><div class='add'>+</div><div class='add'>+	return to_pci_host_bridge(bus-&gt;bridge);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pci_set_host_bridge_release(struct pci_host_bridge *bridge,</div><div class='add'>+				 void (*release_fn)(struct pci_host_bridge *),</div><div class='add'>+				 void *release_data)</div><div class='add'>+{</div><div class='add'>+	bridge-&gt;release_fn = release_fn;</div><div class='add'>+	bridge-&gt;release_data = release_data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool resource_contains(struct resource *res1, struct resource *res2)</div><div class='add'>+{</div><div class='add'>+	return res1-&gt;start &lt;= res2-&gt;start &amp;&amp; res1-&gt;end &gt;= res2-&gt;end;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,</div><div class='add'>+			     struct resource *res)</div><div class='add'>+{</div><div class='add'>+	struct pci_host_bridge *bridge = find_pci_host_bridge(dev);</div><div class='add'>+	struct pci_host_bridge_window *window;</div><div class='add'>+	resource_size_t offset = 0;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(window, &amp;bridge-&gt;windows, list) {</div><div class='add'>+		if (resource_type(res) != resource_type(window-&gt;res))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (resource_contains(window-&gt;res, res)) {</div><div class='add'>+			offset = window-&gt;offset;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	region-&gt;start = res-&gt;start - offset;</div><div class='add'>+	region-&gt;end = res-&gt;end - offset;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(pcibios_resource_to_bus);</div><div class='add'>+</div><div class='add'>+static bool region_contains(struct pci_bus_region *region1,</div><div class='add'>+			    struct pci_bus_region *region2)</div><div class='add'>+{</div><div class='add'>+	return region1-&gt;start &lt;= region2-&gt;start &amp;&amp; region1-&gt;end &gt;= region2-&gt;end;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,</div><div class='add'>+			     struct pci_bus_region *region)</div><div class='add'>+{</div><div class='add'>+	struct pci_host_bridge *bridge = find_pci_host_bridge(dev);</div><div class='add'>+	struct pci_host_bridge_window *window;</div><div class='add'>+	resource_size_t offset = 0;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(window, &amp;bridge-&gt;windows, list) {</div><div class='add'>+		struct pci_bus_region bus_region;</div><div class='add'>+</div><div class='add'>+		if (resource_type(res) != resource_type(window-&gt;res))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		bus_region.start = window-&gt;res-&gt;start - window-&gt;offset;</div><div class='add'>+		bus_region.end = window-&gt;res-&gt;end - window-&gt;offset;</div><div class='add'>+</div><div class='add'>+		if (region_contains(&amp;bus_region, region)) {</div><div class='add'>+			offset = window-&gt;offset;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res-&gt;start = region-&gt;start + offset;</div><div class='add'>+	res-&gt;end = region-&gt;end + offset;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(pcibios_bus_to_resource);</div><div class='head'>diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c<br/>index 0f150f271c2a..61e2fefeedab 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pci/pci-acpi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pci/pci-acpi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pci/pci-acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/pci-acpi.c</a></div><div class='hunk'>@@ -200,7 +200,7 @@ static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev)</div><div class='ctx'> 		return PCI_D1;</div><div class='ctx'> 	case ACPI_STATE_D2:</div><div class='ctx'> 		return PCI_D2;</div><div class='del'>-	case ACPI_STATE_D3:</div><div class='add'>+	case ACPI_STATE_D3_HOT:</div><div class='ctx'> 		return PCI_D3hot;</div><div class='ctx'> 	case ACPI_STATE_D3_COLD:</div><div class='ctx'> 		return PCI_D3cold;</div><div class='head'>diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c<br/>index 6b54b23b990b..bf0cee629b60 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pci/pci-driver.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pci/pci-driver.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pci/pci-driver.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/pci-driver.c</a></div><div class='hunk'>@@ -421,6 +421,12 @@ static void pci_device_shutdown(struct device *dev)</div><div class='ctx'> 	pci_msix_shutdown(pci_dev);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * Turn off Bus Master bit on the device to tell it to not</div><div class='add'>+	 * continue to do DMA</div><div class='add'>+	 */</div><div class='add'>+	pci_disable_device(pci_dev);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='ctx'> 	 * Devices may be enabled to wake up by runtime PM, but they need not</div><div class='ctx'> 	 * be supposed to wake up the system from its "power off" state (e.g.</div><div class='ctx'> 	 * ACPI S5).  Therefore disable wakeup for all devices that aren't</div><div class='head'>diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c<br/>index a55e248618cd..86c63fe45d11 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pci/pci-sysfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pci/pci-sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pci/pci-sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/pci-sysfs.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/security.h&gt;</div><div class='ctx'> #include &lt;linux/pci-aspm.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/vgaarb.h&gt;</div><div class='ctx'> #include "pci.h"</div><div class='ctx'> </div><div class='ctx'> static int sysfs_initialized;	/* = 0 */</div><div class='hunk'>@@ -417,6 +418,10 @@ static ssize_t</div><div class='ctx'> boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	struct pci_dev *vga_dev = vga_default_device();</div><div class='add'>+</div><div class='add'>+	if (vga_dev)</div><div class='add'>+		return sprintf(buf, "%u\n", (pdev == vga_dev));</div><div class='ctx'> </div><div class='ctx'> 	return sprintf(buf, "%u\n",</div><div class='ctx'> 		!!(pdev-&gt;resource[PCI_ROM_RESOURCE].flags &amp;</div><div class='head'>diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c<br/>index 111569ccab43..447e83472c01 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pci/pci.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pci/pci.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pci/pci.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/pci.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;asm-generic/pci-bridge.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include "pci.h"</div><div class='ctx'> </div><div class='hunk'>@@ -2369,7 +2370,7 @@ void pci_enable_acs(struct pci_dev *dev)</div><div class='ctx'>  * number is always 0 (see the Implementation Note in section 2.2.8.1 of</div><div class='ctx'>  * the PCI Express Base Specification, Revision 2.1)</div><div class='ctx'>  */</div><div class='del'>-u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin)</div><div class='add'>+u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin)</div><div class='ctx'> {</div><div class='ctx'> 	int slot;</div><div class='ctx'> </div><div class='hunk'>@@ -3164,18 +3165,12 @@ static int pci_parent_bus_reset(struct pci_dev *dev, int probe)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pci_dev_reset(struct pci_dev *dev, int probe)</div><div class='add'>+static int __pci_dev_reset(struct pci_dev *dev, int probe)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	might_sleep();</div><div class='ctx'> </div><div class='del'>-	if (!probe) {</div><div class='del'>-		pci_cfg_access_lock(dev);</div><div class='del'>-		/* block PM suspend, driver probe, etc. */</div><div class='del'>-		device_lock(&amp;dev-&gt;dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	rc = pci_dev_specific_reset(dev, probe);</div><div class='ctx'> 	if (rc != -ENOTTY)</div><div class='ctx'> 		goto done;</div><div class='hunk'>@@ -3194,14 +3189,27 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)</div><div class='ctx'> </div><div class='ctx'> 	rc = pci_parent_bus_reset(dev, probe);</div><div class='ctx'> done:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pci_dev_reset(struct pci_dev *dev, int probe)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!probe) {</div><div class='add'>+		pci_cfg_access_lock(dev);</div><div class='add'>+		/* block PM suspend, driver probe, etc. */</div><div class='add'>+		device_lock(&amp;dev-&gt;dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = __pci_dev_reset(dev, probe);</div><div class='add'>+</div><div class='ctx'> 	if (!probe) {</div><div class='ctx'> 		device_unlock(&amp;dev-&gt;dev);</div><div class='ctx'> 		pci_cfg_access_unlock(dev);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * __pci_reset_function - reset a PCI device function</div><div class='ctx'>  * @dev: PCI device to reset</div><div class='hunk'>@@ -3246,7 +3254,7 @@ EXPORT_SYMBOL_GPL(__pci_reset_function);</div><div class='ctx'>  */</div><div class='ctx'> int __pci_reset_function_locked(struct pci_dev *dev)</div><div class='ctx'> {</div><div class='del'>-	return pci_dev_reset(dev, 1);</div><div class='add'>+	return __pci_dev_reset(dev, 0);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(__pci_reset_function_locked);</div><div class='ctx'> </div><div class='hunk'>@@ -3893,6 +3901,8 @@ static int __init pci_setup(char *str)</div><div class='ctx'> 				pcie_bus_config = PCIE_BUS_PERFORMANCE;</div><div class='ctx'> 			} else if (!strncmp(str, "pcie_bus_peer2peer", 18)) {</div><div class='ctx'> 				pcie_bus_config = PCIE_BUS_PEER2PEER;</div><div class='add'>+			} else if (!strncmp(str, "pcie_scan_all", 13)) {</div><div class='add'>+				pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS);</div><div class='ctx'> 			} else {</div><div class='ctx'> 				printk(KERN_ERR "PCI: Unknown option `%s'\n",</div><div class='ctx'> 						str);</div><div class='head'>diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c<br/>index 2f589a54f9bd..75915b30ad19 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pci/pcie/portdrv_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pci/pcie/portdrv_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pci/pcie/portdrv_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/pcie/portdrv_core.c</a></div><div class='hunk'>@@ -249,7 +249,7 @@ static int get_port_device_capability(struct pci_dev *dev)</div><div class='ctx'> 	int services = 0, pos;</div><div class='ctx'> 	u16 reg16;</div><div class='ctx'> 	u32 reg32;</div><div class='del'>-	int cap_mask;</div><div class='add'>+	int cap_mask = 0;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (pcie_ports_disabled)</div><div class='head'>diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c<br/>index 5e1ca3c58a7d..658ac977cb56 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pci/probe.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pci/probe.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pci/probe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/probe.c</a></div><div class='hunk'>@@ -10,18 +10,16 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/cpumask.h&gt;</div><div class='ctx'> #include &lt;linux/pci-aspm.h&gt;</div><div class='add'>+#include &lt;asm-generic/pci-bridge.h&gt;</div><div class='ctx'> #include "pci.h"</div><div class='ctx'> </div><div class='ctx'> #define CARDBUS_LATENCY_TIMER	176	/* secondary latency timer */</div><div class='ctx'> #define CARDBUS_RESERVE_BUSNR	3</div><div class='ctx'> </div><div class='del'>-static LIST_HEAD(pci_host_bridges);</div><div class='del'>-</div><div class='ctx'> /* Ugh.  Need to stop exporting this to modules. */</div><div class='ctx'> LIST_HEAD(pci_root_buses);</div><div class='ctx'> EXPORT_SYMBOL(pci_root_buses);</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int find_anything(struct device *dev, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -44,82 +42,6 @@ int no_pci_devices(void)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(no_pci_devices);</div><div class='ctx'> </div><div class='del'>-static struct pci_host_bridge *pci_host_bridge(struct pci_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct pci_bus *bus;</div><div class='del'>-	struct pci_host_bridge *bridge;</div><div class='del'>-</div><div class='del'>-	bus = dev-&gt;bus;</div><div class='del'>-	while (bus-&gt;parent)</div><div class='del'>-		bus = bus-&gt;parent;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(bridge, &amp;pci_host_bridges, list) {</div><div class='del'>-		if (bridge-&gt;bus == bus)</div><div class='del'>-			return bridge;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool resource_contains(struct resource *res1, struct resource *res2)</div><div class='del'>-{</div><div class='del'>-	return res1-&gt;start &lt;= res2-&gt;start &amp;&amp; res1-&gt;end &gt;= res2-&gt;end;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,</div><div class='del'>-			     struct resource *res)</div><div class='del'>-{</div><div class='del'>-	struct pci_host_bridge *bridge = pci_host_bridge(dev);</div><div class='del'>-	struct pci_host_bridge_window *window;</div><div class='del'>-	resource_size_t offset = 0;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(window, &amp;bridge-&gt;windows, list) {</div><div class='del'>-		if (resource_type(res) != resource_type(window-&gt;res))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (resource_contains(window-&gt;res, res)) {</div><div class='del'>-			offset = window-&gt;offset;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	region-&gt;start = res-&gt;start - offset;</div><div class='del'>-	region-&gt;end = res-&gt;end - offset;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(pcibios_resource_to_bus);</div><div class='del'>-</div><div class='del'>-static bool region_contains(struct pci_bus_region *region1,</div><div class='del'>-			    struct pci_bus_region *region2)</div><div class='del'>-{</div><div class='del'>-	return region1-&gt;start &lt;= region2-&gt;start &amp;&amp; region1-&gt;end &gt;= region2-&gt;end;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,</div><div class='del'>-			     struct pci_bus_region *region)</div><div class='del'>-{</div><div class='del'>-	struct pci_host_bridge *bridge = pci_host_bridge(dev);</div><div class='del'>-	struct pci_host_bridge_window *window;</div><div class='del'>-	struct pci_bus_region bus_region;</div><div class='del'>-	resource_size_t offset = 0;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(window, &amp;bridge-&gt;windows, list) {</div><div class='del'>-		if (resource_type(res) != resource_type(window-&gt;res))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		bus_region.start = window-&gt;res-&gt;start - window-&gt;offset;</div><div class='del'>-		bus_region.end = window-&gt;res-&gt;end - window-&gt;offset;</div><div class='del'>-</div><div class='del'>-		if (region_contains(&amp;bus_region, region)) {</div><div class='del'>-			offset = window-&gt;offset;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	res-&gt;start = region-&gt;start + offset;</div><div class='del'>-	res-&gt;end = region-&gt;end + offset;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(pcibios_bus_to_resource);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * PCI Bus Class</div><div class='ctx'>  */</div><div class='hunk'>@@ -501,6 +423,19 @@ static struct pci_bus * pci_alloc_bus(void)</div><div class='ctx'> 	return b;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct pci_host_bridge *pci_alloc_host_bridge(struct pci_bus *b)</div><div class='add'>+{</div><div class='add'>+	struct pci_host_bridge *bridge;</div><div class='add'>+</div><div class='add'>+	bridge = kzalloc(sizeof(*bridge), GFP_KERNEL);</div><div class='add'>+	if (bridge) {</div><div class='add'>+		INIT_LIST_HEAD(&amp;bridge-&gt;windows);</div><div class='add'>+		bridge-&gt;bus = b;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return bridge;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static unsigned char pcix_bus_speed[] = {</div><div class='ctx'> 	PCI_SPEED_UNKNOWN,		/* 0 */</div><div class='ctx'> 	PCI_SPEED_66MHz_PCIX,		/* 1 */</div><div class='hunk'>@@ -1201,7 +1136,14 @@ int pci_cfg_space_size(struct pci_dev *dev)</div><div class='ctx'> </div><div class='ctx'> static void pci_release_bus_bridge_dev(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	kfree(dev);</div><div class='add'>+	struct pci_host_bridge *bridge = to_pci_host_bridge(dev);</div><div class='add'>+</div><div class='add'>+	if (bridge-&gt;release_fn)</div><div class='add'>+		bridge-&gt;release_fn(bridge);</div><div class='add'>+</div><div class='add'>+	pci_free_resource_list(&amp;bridge-&gt;windows);</div><div class='add'>+</div><div class='add'>+	kfree(bridge);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct pci_dev *alloc_pci_dev(void)</div><div class='hunk'>@@ -1395,10 +1337,13 @@ static unsigned no_next_fn(struct pci_dev *dev, unsigned fn)</div><div class='ctx'> static int only_one_child(struct pci_bus *bus)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *parent = bus-&gt;self;</div><div class='add'>+</div><div class='ctx'> 	if (!parent || !pci_is_pcie(parent))</div><div class='ctx'> 		return 0;</div><div class='del'>-	if (parent-&gt;pcie_type == PCI_EXP_TYPE_ROOT_PORT ||</div><div class='del'>-	    parent-&gt;pcie_type == PCI_EXP_TYPE_DOWNSTREAM)</div><div class='add'>+	if (parent-&gt;pcie_type == PCI_EXP_TYPE_ROOT_PORT)</div><div class='add'>+		return 1;</div><div class='add'>+	if (parent-&gt;pcie_type == PCI_EXP_TYPE_DOWNSTREAM &amp;&amp;</div><div class='add'>+	    !pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1650,28 +1595,19 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,</div><div class='ctx'> 	int error;</div><div class='ctx'> 	struct pci_host_bridge *bridge;</div><div class='ctx'> 	struct pci_bus *b, *b2;</div><div class='del'>-	struct device *dev;</div><div class='ctx'> 	struct pci_host_bridge_window *window, *n;</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	resource_size_t offset;</div><div class='ctx'> 	char bus_addr[64];</div><div class='ctx'> 	char *fmt;</div><div class='ctx'> </div><div class='del'>-	bridge = kzalloc(sizeof(*bridge), GFP_KERNEL);</div><div class='del'>-	if (!bridge)</div><div class='del'>-		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	b = pci_alloc_bus();</div><div class='ctx'> 	if (!b)</div><div class='del'>-		goto err_bus;</div><div class='del'>-</div><div class='del'>-	dev = kzalloc(sizeof(*dev), GFP_KERNEL);</div><div class='del'>-	if (!dev)</div><div class='del'>-		goto err_dev;</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	b-&gt;sysdata = sysdata;</div><div class='ctx'> 	b-&gt;ops = ops;</div><div class='del'>-</div><div class='ctx'> 	b2 = pci_find_bus(pci_domain_nr(b), bus);</div><div class='ctx'> 	if (b2) {</div><div class='ctx'> 		/* If we already got to this bus through a different bridge, ignore it */</div><div class='hunk'>@@ -1679,13 +1615,17 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev-&gt;parent = parent;</div><div class='del'>-	dev-&gt;release = pci_release_bus_bridge_dev;</div><div class='del'>-	dev_set_name(dev, "pci%04x:%02x", pci_domain_nr(b), bus);</div><div class='del'>-	error = device_register(dev);</div><div class='add'>+	bridge = pci_alloc_host_bridge(b);</div><div class='add'>+	if (!bridge)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	bridge-&gt;dev.parent = parent;</div><div class='add'>+	bridge-&gt;dev.release = pci_release_bus_bridge_dev;</div><div class='add'>+	dev_set_name(&amp;bridge-&gt;dev, "pci%04x:%02x", pci_domain_nr(b), bus);</div><div class='add'>+	error = device_register(&amp;bridge-&gt;dev);</div><div class='ctx'> 	if (error)</div><div class='del'>-		goto dev_reg_err;</div><div class='del'>-	b-&gt;bridge = get_device(dev);</div><div class='add'>+		goto bridge_dev_reg_err;</div><div class='add'>+	b-&gt;bridge = get_device(&amp;bridge-&gt;dev);</div><div class='ctx'> 	device_enable_async_suspend(b-&gt;bridge);</div><div class='ctx'> 	pci_set_bus_of_node(b);</div><div class='ctx'> </div><div class='hunk'>@@ -1704,9 +1644,6 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,</div><div class='ctx'> </div><div class='ctx'> 	b-&gt;number = b-&gt;secondary = bus;</div><div class='ctx'> </div><div class='del'>-	bridge-&gt;bus = b;</div><div class='del'>-	INIT_LIST_HEAD(&amp;bridge-&gt;windows);</div><div class='del'>-</div><div class='ctx'> 	if (parent)</div><div class='ctx'> 		dev_info(parent, "PCI host bridge to bus %s\n", dev_name(&amp;b-&gt;dev));</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1732,25 +1669,18 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	down_write(&amp;pci_bus_sem);</div><div class='del'>-	list_add_tail(&amp;bridge-&gt;list, &amp;pci_host_bridges);</div><div class='ctx'> 	list_add_tail(&amp;b-&gt;node, &amp;pci_root_buses);</div><div class='ctx'> 	up_write(&amp;pci_bus_sem);</div><div class='ctx'> </div><div class='ctx'> 	return b;</div><div class='ctx'> </div><div class='ctx'> class_dev_reg_err:</div><div class='del'>-	device_unregister(dev);</div><div class='del'>-dev_reg_err:</div><div class='del'>-	down_write(&amp;pci_bus_sem);</div><div class='del'>-	list_del(&amp;bridge-&gt;list);</div><div class='del'>-	list_del(&amp;b-&gt;node);</div><div class='del'>-	up_write(&amp;pci_bus_sem);</div><div class='add'>+	put_device(&amp;bridge-&gt;dev);</div><div class='add'>+	device_unregister(&amp;bridge-&gt;dev);</div><div class='add'>+bridge_dev_reg_err:</div><div class='add'>+	kfree(bridge);</div><div class='ctx'> err_out:</div><div class='del'>-	kfree(dev);</div><div class='del'>-err_dev:</div><div class='ctx'> 	kfree(b);</div><div class='del'>-err_bus:</div><div class='del'>-	kfree(bridge);</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c<br/>index 4bf71028556b..2a7521677541 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pci/quirks.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pci/quirks.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pci/quirks.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pci/quirks.c</a></div><div class='hunk'>@@ -2626,6 +2626,18 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4374,</div><div class='ctx'> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4375,</div><div class='ctx'> 			quirk_msi_intx_disable_bug);</div><div class='ctx'> </div><div class='add'>+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1062,</div><div class='add'>+			quirk_msi_intx_disable_bug);</div><div class='add'>+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1063,</div><div class='add'>+			quirk_msi_intx_disable_bug);</div><div class='add'>+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x2060,</div><div class='add'>+			quirk_msi_intx_disable_bug);</div><div class='add'>+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x2062,</div><div class='add'>+			quirk_msi_intx_disable_bug);</div><div class='add'>+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1073,</div><div class='add'>+			quirk_msi_intx_disable_bug);</div><div class='add'>+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1083,</div><div class='add'>+			quirk_msi_intx_disable_bug);</div><div class='ctx'> #endif /* CONFIG_PCI_MSI */</div><div class='ctx'> </div><div class='ctx'> /* Allow manual resource allocation for PCI hotplug bridges</div><div class='hunk'>@@ -3085,16 +3097,74 @@ static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, int probe)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#include "../gpu/drm/i915/i915_reg.h"</div><div class='add'>+#define MSG_CTL			0x45010</div><div class='add'>+#define NSDE_PWR_STATE		0xd0100</div><div class='add'>+#define IGD_OPERATION_TIMEOUT	10000     /* set timeout 10 seconds */</div><div class='add'>+</div><div class='add'>+static int reset_ivb_igd(struct pci_dev *dev, int probe)</div><div class='add'>+{</div><div class='add'>+	void __iomem *mmio_base;</div><div class='add'>+	unsigned long timeout;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (probe)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mmio_base = pci_iomap(dev, 0, 0);</div><div class='add'>+	if (!mmio_base)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	iowrite32(0x00000002, mmio_base + MSG_CTL);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Clobbering SOUTH_CHICKEN2 register is fine only if the next</div><div class='add'>+	 * driver loaded sets the right bits. However, this's a reset and</div><div class='add'>+	 * the bits have been set by i915 previously, so we clobber</div><div class='add'>+	 * SOUTH_CHICKEN2 register directly here.</div><div class='add'>+	 */</div><div class='add'>+	iowrite32(0x00000005, mmio_base + SOUTH_CHICKEN2);</div><div class='add'>+</div><div class='add'>+	val = ioread32(mmio_base + PCH_PP_CONTROL) &amp; 0xfffffffe;</div><div class='add'>+	iowrite32(val, mmio_base + PCH_PP_CONTROL);</div><div class='add'>+</div><div class='add'>+	timeout = jiffies + msecs_to_jiffies(IGD_OPERATION_TIMEOUT);</div><div class='add'>+	do {</div><div class='add'>+		val = ioread32(mmio_base + PCH_PP_STATUS);</div><div class='add'>+		if ((val &amp; 0xb0000000) == 0)</div><div class='add'>+			goto reset_complete;</div><div class='add'>+		msleep(10);</div><div class='add'>+	} while (time_before(jiffies, timeout));</div><div class='add'>+	dev_warn(&amp;dev-&gt;dev, "timeout during reset\n");</div><div class='add'>+</div><div class='add'>+reset_complete:</div><div class='add'>+	iowrite32(0x00000002, mmio_base + NSDE_PWR_STATE);</div><div class='add'>+</div><div class='add'>+	pci_iounmap(dev, mmio_base);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_82599_SFP_VF   0x10ed</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_IVB_M_VGA      0x0156</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_IVB_M2_VGA     0x0166</div><div class='ctx'> </div><div class='ctx'> static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {</div><div class='ctx'> 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82599_SFP_VF,</div><div class='ctx'> 		 reset_intel_82599_sfp_virtfn },</div><div class='add'>+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IVB_M_VGA,</div><div class='add'>+		reset_ivb_igd },</div><div class='add'>+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IVB_M2_VGA,</div><div class='add'>+		reset_ivb_igd },</div><div class='ctx'> 	{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID,</div><div class='ctx'> 		reset_intel_generic_dev },</div><div class='ctx'> 	{ 0 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * These device-specific reset methods are here rather than in a driver</div><div class='add'>+ * because when a host assigns a device to a guest VM, the host may need</div><div class='add'>+ * to reset the device but probably doesn't have a driver for it.</div><div class='add'>+ */</div><div class='ctx'> int pci_dev_specific_reset(struct pci_dev *dev, int probe)</div><div class='ctx'> {</div><div class='ctx'> 	const struct pci_dev_reset_methods *i;</div><div class='head'>diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig<br/>index bba3ab2066ee..8fd255f7ee40 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pcmcia/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pcmcia/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pcmcia/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pcmcia/Kconfig</a></div><div class='hunk'>@@ -217,7 +217,7 @@ config PCMCIA_PXA2XX</div><div class='ctx'> 		    || MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \</div><div class='ctx'> 		    || ARCOM_PCMCIA || ARCH_PXA_ESERIES || MACH_STARGATE2 \</div><div class='ctx'> 		    || MACH_VPAC270 || MACH_BALLOON3 || MACH_COLIBRI \</div><div class='del'>-		    || MACH_COLIBRI320)</div><div class='add'>+		    || MACH_COLIBRI320 || MACH_H4700)</div><div class='ctx'> 	select PCMCIA_SA1111 if ARCH_LUBBOCK &amp;&amp; SA1111</div><div class='ctx'> 	select PCMCIA_SOC_COMMON</div><div class='ctx'> 	help</div><div class='head'>diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile<br/>index 47525de6a631..7745b512a87c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pcmcia/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pcmcia/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pcmcia/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pcmcia/Makefile</a></div><div class='hunk'>@@ -69,6 +69,7 @@ pxa2xx-obj-$(CONFIG_MACH_VPAC270)		+= pxa2xx_vpac270.o</div><div class='ctx'> pxa2xx-obj-$(CONFIG_MACH_BALLOON3)		+= pxa2xx_balloon3.o</div><div class='ctx'> pxa2xx-obj-$(CONFIG_MACH_COLIBRI)		+= pxa2xx_colibri.o</div><div class='ctx'> pxa2xx-obj-$(CONFIG_MACH_COLIBRI320)		+= pxa2xx_colibri.o</div><div class='add'>+pxa2xx-obj-$(CONFIG_MACH_H4700)			+= pxa2xx_hx4700.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PCMCIA_PXA2XX)			+= pxa2xx_base.o $(pxa2xx-obj-y)</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/pcmcia/pxa2xx_hx4700.c b/drivers/pcmcia/pxa2xx_hx4700.c<br/>new file mode 100644<br/>index 000000000000..7dfef3ee5b53<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pcmcia/pxa2xx_hx4700.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pcmcia/pxa2xx_hx4700.c</a></div><div class='hunk'>@@ -0,0 +1,121 @@</div><div class='add'>+/*</div><div class='add'>+ *  Copyright (C) 2012 Paul Parsons &lt;lost.distance@yahoo.com&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify</div><div class='add'>+ *  it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ *  published by the Free Software Foundation.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/mach-types.h&gt;</div><div class='add'>+#include &lt;mach/hx4700.h&gt;</div><div class='add'>+</div><div class='add'>+#include "soc_common.h"</div><div class='add'>+</div><div class='add'>+static struct gpio gpios[] = {</div><div class='add'>+	{ GPIO114_HX4700_CF_RESET,    GPIOF_OUT_INIT_LOW,   "CF reset"        },</div><div class='add'>+	{ EGPIO4_CF_3V3_ON,           GPIOF_OUT_INIT_LOW,   "CF 3.3V enable"  },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int hx4700_pcmcia_hw_init(struct soc_pcmcia_socket *skt)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = gpio_request_array(gpios, ARRAY_SIZE(gpios));</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * IRQ type must be set before soc_pcmcia_hw_init() calls request_irq().</div><div class='add'>+	 * The asic3 default IRQ type is level trigger low level detect, exactly</div><div class='add'>+	 * the the signal present on GPIOD4_CF_nCD when a CF card is inserted.</div><div class='add'>+	 * If the IRQ type is not changed, the asic3 interrupt handler will loop</div><div class='add'>+	 * repeatedly because it is unable to clear the level trigger interrupt.</div><div class='add'>+	 */</div><div class='add'>+	irq_set_irq_type(gpio_to_irq(GPIOD4_CF_nCD), IRQ_TYPE_EDGE_BOTH);</div><div class='add'>+</div><div class='add'>+	skt-&gt;stat[SOC_STAT_CD].gpio = GPIOD4_CF_nCD;</div><div class='add'>+	skt-&gt;stat[SOC_STAT_CD].name = "PCMCIA CD";</div><div class='add'>+	skt-&gt;stat[SOC_STAT_RDY].gpio = GPIO60_HX4700_CF_RNB;</div><div class='add'>+	skt-&gt;stat[SOC_STAT_RDY].name = "PCMCIA Ready";</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hx4700_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)</div><div class='add'>+{</div><div class='add'>+	gpio_free_array(gpios, ARRAY_SIZE(gpios));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hx4700_pcmcia_socket_state(struct soc_pcmcia_socket *skt,</div><div class='add'>+	struct pcmcia_state *state)</div><div class='add'>+{</div><div class='add'>+	state-&gt;vs_3v = 1;</div><div class='add'>+	state-&gt;vs_Xv = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hx4700_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,</div><div class='add'>+	const socket_state_t *state)</div><div class='add'>+{</div><div class='add'>+	switch (state-&gt;Vcc) {</div><div class='add'>+	case 0:</div><div class='add'>+		gpio_set_value(EGPIO4_CF_3V3_ON, 0);</div><div class='add'>+		break;</div><div class='add'>+	case 33:</div><div class='add'>+		gpio_set_value(EGPIO4_CF_3V3_ON, 1);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		printk(KERN_ERR "pcmcia: Unsupported Vcc: %d\n", state-&gt;Vcc);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gpio_set_value(GPIO114_HX4700_CF_RESET, (state-&gt;flags &amp; SS_RESET) != 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pcmcia_low_level hx4700_pcmcia_ops = {</div><div class='add'>+	.owner          = THIS_MODULE,</div><div class='add'>+	.nr             = 1,</div><div class='add'>+	.hw_init        = hx4700_pcmcia_hw_init,</div><div class='add'>+	.hw_shutdown    = hx4700_pcmcia_hw_shutdown,</div><div class='add'>+	.socket_state   = hx4700_pcmcia_socket_state,</div><div class='add'>+	.configure_socket = hx4700_pcmcia_configure_socket,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_device *hx4700_pcmcia_device;</div><div class='add'>+</div><div class='add'>+static int __init hx4700_pcmcia_init(void)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+</div><div class='add'>+	if (!machine_is_h4700())</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	pdev = platform_device_register_data(NULL, "pxa2xx-pcmcia", -1,</div><div class='add'>+		&amp;hx4700_pcmcia_ops, sizeof(hx4700_pcmcia_ops));</div><div class='add'>+	if (IS_ERR(pdev))</div><div class='add'>+		return PTR_ERR(pdev);</div><div class='add'>+</div><div class='add'>+	hx4700_pcmcia_device = pdev;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit hx4700_pcmcia_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_device_unregister(hx4700_pcmcia_device);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(hx4700_pcmcia_init);</div><div class='add'>+module_exit(hx4700_pcmcia_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Paul Parsons &lt;lost.distance@yahoo.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("HP iPAQ hx4700 PCMCIA driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig<br/>index abfb96408779..c6e6ae0aa3b1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/Kconfig</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'> </div><div class='ctx'> config PINCTRL</div><div class='ctx'> 	bool</div><div class='del'>-	depends on EXPERIMENTAL</div><div class='ctx'> </div><div class='ctx'> if PINCTRL</div><div class='ctx'> </div><div class='hunk'>@@ -27,6 +26,35 @@ config DEBUG_PINCTRL</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here to add some extra checks and diagnostics to PINCTRL calls.</div><div class='ctx'> </div><div class='add'>+config PINCTRL_IMX</div><div class='add'>+	bool</div><div class='add'>+	select PINMUX</div><div class='add'>+	select PINCONF</div><div class='add'>+</div><div class='add'>+config PINCTRL_IMX51</div><div class='add'>+	bool "IMX51 pinctrl driver"</div><div class='add'>+	depends on OF</div><div class='add'>+	depends on SOC_IMX51</div><div class='add'>+	select PINCTRL_IMX</div><div class='add'>+	help</div><div class='add'>+	  Say Y here to enable the imx51 pinctrl driver</div><div class='add'>+</div><div class='add'>+config PINCTRL_IMX53</div><div class='add'>+	bool "IMX53 pinctrl driver"</div><div class='add'>+	depends on OF</div><div class='add'>+	depends on SOC_IMX53</div><div class='add'>+	select PINCTRL_IMX</div><div class='add'>+	help</div><div class='add'>+	  Say Y here to enable the imx53 pinctrl driver</div><div class='add'>+</div><div class='add'>+config PINCTRL_IMX6Q</div><div class='add'>+	bool "IMX6Q pinctrl driver"</div><div class='add'>+	depends on OF</div><div class='add'>+	depends on SOC_IMX6Q</div><div class='add'>+	select PINCTRL_IMX</div><div class='add'>+	help</div><div class='add'>+	  Say Y here to enable the imx6q pinctrl driver</div><div class='add'>+</div><div class='ctx'> config PINCTRL_PXA3xx</div><div class='ctx'> 	bool</div><div class='ctx'> 	select PINMUX</div><div class='hunk'>@@ -37,6 +65,31 @@ config PINCTRL_MMP2</div><div class='ctx'> 	select PINCTRL_PXA3xx</div><div class='ctx'> 	select PINCONF</div><div class='ctx'> </div><div class='add'>+config PINCTRL_MXS</div><div class='add'>+	bool</div><div class='add'>+</div><div class='add'>+config PINCTRL_IMX23</div><div class='add'>+	bool</div><div class='add'>+	select PINMUX</div><div class='add'>+	select PINCONF</div><div class='add'>+	select PINCTRL_MXS</div><div class='add'>+</div><div class='add'>+config PINCTRL_IMX28</div><div class='add'>+	bool</div><div class='add'>+	select PINMUX</div><div class='add'>+	select PINCONF</div><div class='add'>+	select PINCTRL_MXS</div><div class='add'>+</div><div class='add'>+config PINCTRL_NOMADIK</div><div class='add'>+	bool "Nomadik pin controller driver"</div><div class='add'>+	depends on ARCH_U8500 || ARCH_NOMADIK</div><div class='add'>+	select PINMUX</div><div class='add'>+	select PINCONF</div><div class='add'>+</div><div class='add'>+config PINCTRL_DB8500</div><div class='add'>+	bool "DB8500 pin controller driver"</div><div class='add'>+	depends on PINCTRL_NOMADIK &amp;&amp; ARCH_U8500</div><div class='add'>+</div><div class='ctx'> config PINCTRL_PXA168</div><div class='ctx'> 	bool "PXA168 pin controller driver"</div><div class='ctx'> 	depends on ARCH_MMP</div><div class='hunk'>@@ -84,6 +137,8 @@ config PINCTRL_COH901</div><div class='ctx'> 	  COH 901 335 and COH 901 571/3. They contain 3, 5 or 7</div><div class='ctx'> 	  ports of 8 GPIO pins each.</div><div class='ctx'> </div><div class='add'>+source "drivers/pinctrl/spear/Kconfig"</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='head'>diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile<br/>index 6d4150b4eced..8c074376cdea 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/Makefile</a></div><div class='hunk'>@@ -5,9 +5,21 @@ ccflags-$(CONFIG_DEBUG_PINCTRL)	+= -DDEBUG</div><div class='ctx'> obj-$(CONFIG_PINCTRL)		+= core.o</div><div class='ctx'> obj-$(CONFIG_PINMUX)		+= pinmux.o</div><div class='ctx'> obj-$(CONFIG_PINCONF)		+= pinconf.o</div><div class='add'>+ifeq ($(CONFIG_OF),y)</div><div class='add'>+obj-$(CONFIG_PINCTRL)		+= devicetree.o</div><div class='add'>+endif</div><div class='ctx'> obj-$(CONFIG_GENERIC_PINCONF)	+= pinconf-generic.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_IMX)	+= pinctrl-imx.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_IMX51)	+= pinctrl-imx51.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_IMX53)	+= pinctrl-imx53.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_IMX6Q)	+= pinctrl-imx6q.o</div><div class='ctx'> obj-$(CONFIG_PINCTRL_PXA3xx)	+= pinctrl-pxa3xx.o</div><div class='ctx'> obj-$(CONFIG_PINCTRL_MMP2)	+= pinctrl-mmp2.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_MXS)	+= pinctrl-mxs.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_IMX23)	+= pinctrl-imx23.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_IMX28)	+= pinctrl-imx28.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_NOMADIK)	+= pinctrl-nomadik.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_DB8500)	+= pinctrl-nomadik-db8500.o</div><div class='ctx'> obj-$(CONFIG_PINCTRL_PXA168)	+= pinctrl-pxa168.o</div><div class='ctx'> obj-$(CONFIG_PINCTRL_PXA910)	+= pinctrl-pxa910.o</div><div class='ctx'> obj-$(CONFIG_PINCTRL_SIRF)	+= pinctrl-sirf.o</div><div class='hunk'>@@ -16,3 +28,5 @@ obj-$(CONFIG_PINCTRL_TEGRA20)	+= pinctrl-tegra20.o</div><div class='ctx'> obj-$(CONFIG_PINCTRL_TEGRA30)	+= pinctrl-tegra30.o</div><div class='ctx'> obj-$(CONFIG_PINCTRL_U300)	+= pinctrl-u300.o</div><div class='ctx'> obj-$(CONFIG_PINCTRL_COH901)	+= pinctrl-coh901.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_PLAT_SPEAR)	+= spear/</div><div class='head'>diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c<br/>index df6296c5f47b..c3b331b74fa0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/core.c</a></div><div class='hunk'>@@ -23,9 +23,11 @@</div><div class='ctx'> #include &lt;linux/sysfs.h&gt;</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='ctx'> #include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> #include "core.h"</div><div class='add'>+#include "devicetree.h"</div><div class='ctx'> #include "pinmux.h"</div><div class='ctx'> #include "pinconf.h"</div><div class='ctx'> </div><div class='hunk'>@@ -41,11 +43,13 @@ struct pinctrl_maps {</div><div class='ctx'> 	unsigned num_maps;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static bool pinctrl_dummy_state;</div><div class='add'>+</div><div class='ctx'> /* Mutex taken by all entry points */</div><div class='ctx'> DEFINE_MUTEX(pinctrl_mutex);</div><div class='ctx'> </div><div class='ctx'> /* Global list of pin control devices (struct pinctrl_dev) */</div><div class='del'>-static LIST_HEAD(pinctrldev_list);</div><div class='add'>+LIST_HEAD(pinctrldev_list);</div><div class='ctx'> </div><div class='ctx'> /* List of pin controller handles (struct pinctrl) */</div><div class='ctx'> static LIST_HEAD(pinctrl_list);</div><div class='hunk'>@@ -59,6 +63,19 @@ static LIST_HEAD(pinctrl_maps);</div><div class='ctx'> 			_i_ &lt; _maps_node_-&gt;num_maps; \</div><div class='ctx'> 			i++, _map_ = &amp;_maps_node_-&gt;maps[_i_])</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support</div><div class='add'>+ *</div><div class='add'>+ * Usually this function is called by platforms without pinctrl driver support</div><div class='add'>+ * but run with some shared drivers using pinctrl APIs.</div><div class='add'>+ * After calling this function, the pinctrl core will return successfully</div><div class='add'>+ * with creating a dummy state for the driver to keep going smoothly.</div><div class='add'>+ */</div><div class='add'>+void pinctrl_provide_dummies(void)</div><div class='add'>+{</div><div class='add'>+	pinctrl_dummy_state = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev)</div><div class='ctx'> {</div><div class='ctx'> 	/* We're not allowed to register devices without name */</div><div class='hunk'>@@ -124,6 +141,25 @@ int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * pin_get_name_from_id() - look up a pin name from a pin id</div><div class='add'>+ * @pctldev: the pin control device to lookup the pin on</div><div class='add'>+ * @name: the name of the pin to look up</div><div class='add'>+ */</div><div class='add'>+const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin)</div><div class='add'>+{</div><div class='add'>+	const struct pin_desc *desc;</div><div class='add'>+</div><div class='add'>+	desc = pin_desc_get(pctldev, pin);</div><div class='add'>+	if (desc == NULL) {</div><div class='add'>+		dev_err(pctldev-&gt;dev, "failed to get pin(%d) name\n",</div><div class='add'>+			pin);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return desc-&gt;name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * pin_is_valid() - check if pin exists on controller</div><div class='ctx'>  * @pctldev: the pin control device to check the pin on</div><div class='ctx'>  * @pin: pin to check, use the local pin controller index number</div><div class='hunk'>@@ -255,7 +291,8 @@ pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio)</div><div class='ctx'>  *</div><div class='ctx'>  * Find the pin controller handling a certain GPIO pin from the pinspace of</div><div class='ctx'>  * the GPIO subsystem, return the device and the matching GPIO range. Returns</div><div class='del'>- * negative if the GPIO range could not be found in any device.</div><div class='add'>+ * -EPROBE_DEFER if the GPIO range could not be found in any device since it</div><div class='add'>+ * may still have not been registered.</div><div class='ctx'>  */</div><div class='ctx'> static int pinctrl_get_device_gpio_range(unsigned gpio,</div><div class='ctx'> 					 struct pinctrl_dev **outdev,</div><div class='hunk'>@@ -275,7 +312,7 @@ static int pinctrl_get_device_gpio_range(unsigned gpio,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return -EINVAL;</div><div class='add'>+	return -EPROBE_DEFER;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -318,9 +355,10 @@ int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,</div><div class='ctx'> 			       const char *pin_group)</div><div class='ctx'> {</div><div class='ctx'> 	const struct pinctrl_ops *pctlops = pctldev-&gt;desc-&gt;pctlops;</div><div class='add'>+	unsigned ngroups = pctlops-&gt;get_groups_count(pctldev);</div><div class='ctx'> 	unsigned group_selector = 0;</div><div class='ctx'> </div><div class='del'>-	while (pctlops-&gt;list_groups(pctldev, group_selector) &gt;= 0) {</div><div class='add'>+	while (group_selector &lt; ngroups) {</div><div class='ctx'> 		const char *gname = pctlops-&gt;get_group_name(pctldev,</div><div class='ctx'> 							    group_selector);</div><div class='ctx'> 		if (!strcmp(gname, pin_group)) {</div><div class='hunk'>@@ -360,7 +398,7 @@ int pinctrl_request_gpio(unsigned gpio)</div><div class='ctx'> 	ret = pinctrl_get_device_gpio_range(gpio, &amp;pctldev, &amp;range);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		mutex_unlock(&amp;pinctrl_mutex);</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Convert to the pin controllers number space */</div><div class='hunk'>@@ -516,11 +554,14 @@ static int add_setting(struct pinctrl *p, struct pinctrl_map const *map)</div><div class='ctx'> </div><div class='ctx'> 	setting-&gt;pctldev = get_pinctrl_dev_from_devname(map-&gt;ctrl_dev_name);</div><div class='ctx'> 	if (setting-&gt;pctldev == NULL) {</div><div class='del'>-		dev_err(p-&gt;dev, "unknown pinctrl device %s in map entry",</div><div class='add'>+		dev_info(p-&gt;dev, "unknown pinctrl device %s in map entry, deferring probe",</div><div class='ctx'> 			map-&gt;ctrl_dev_name);</div><div class='ctx'> 		kfree(setting);</div><div class='del'>-		/* Eventually, this should trigger deferred probe */</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		/*</div><div class='add'>+		 * OK let us guess that the driver is not there yet, and</div><div class='add'>+		 * let's defer obtaining this pinctrl handle to later...</div><div class='add'>+		 */</div><div class='add'>+		return -EPROBE_DEFER;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (map-&gt;type) {</div><div class='hunk'>@@ -579,6 +620,13 @@ static struct pinctrl *create_pinctrl(struct device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> 	p-&gt;dev = dev;</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;p-&gt;states);</div><div class='add'>+	INIT_LIST_HEAD(&amp;p-&gt;dt_maps);</div><div class='add'>+</div><div class='add'>+	ret = pinctrl_dt_to_map(p);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		kfree(p);</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	devname = dev_name(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -662,6 +710,8 @@ static void pinctrl_put_locked(struct pinctrl *p, bool inlist)</div><div class='ctx'> 		kfree(state);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	pinctrl_dt_free_maps(p);</div><div class='add'>+</div><div class='ctx'> 	if (inlist)</div><div class='ctx'> 		list_del(&amp;p-&gt;node);</div><div class='ctx'> 	kfree(p);</div><div class='hunk'>@@ -685,8 +735,18 @@ static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p,</div><div class='ctx'> 	struct pinctrl_state *state;</div><div class='ctx'> </div><div class='ctx'> 	state = find_state(p, name);</div><div class='del'>-	if (!state)</div><div class='del'>-		return ERR_PTR(-ENODEV);</div><div class='add'>+	if (!state) {</div><div class='add'>+		if (pinctrl_dummy_state) {</div><div class='add'>+			/* create dummy state */</div><div class='add'>+			dev_dbg(p-&gt;dev, "using pinctrl dummy state (%s)\n",</div><div class='add'>+				name);</div><div class='add'>+			state = create_state(p, name);</div><div class='add'>+			if (IS_ERR(state))</div><div class='add'>+				return state;</div><div class='add'>+		} else {</div><div class='add'>+			return ERR_PTR(-ENODEV);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return state;</div><div class='ctx'> }</div><div class='hunk'>@@ -787,15 +847,63 @@ int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(pinctrl_select_state);</div><div class='ctx'> </div><div class='add'>+static void devm_pinctrl_release(struct device *dev, void *res)</div><div class='add'>+{</div><div class='add'>+	pinctrl_put(*(struct pinctrl **)res);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='del'>- * pinctrl_register_mappings() - register a set of pin controller mappings</div><div class='del'>- * @maps: the pincontrol mappings table to register. This should probably be</div><div class='del'>- *	marked with __initdata so it can be discarded after boot. This</div><div class='del'>- *	function will perform a shallow copy for the mapping entries.</div><div class='del'>- * @num_maps: the number of maps in the mapping table</div><div class='add'>+ * struct devm_pinctrl_get() - Resource managed pinctrl_get()</div><div class='add'>+ * @dev: the device to obtain the handle for</div><div class='add'>+ *</div><div class='add'>+ * If there is a need to explicitly destroy the returned struct pinctrl,</div><div class='add'>+ * devm_pinctrl_put() should be used, rather than plain pinctrl_put().</div><div class='ctx'>  */</div><div class='del'>-int pinctrl_register_mappings(struct pinctrl_map const *maps,</div><div class='del'>-			      unsigned num_maps)</div><div class='add'>+struct pinctrl *devm_pinctrl_get(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pinctrl **ptr, *p;</div><div class='add'>+</div><div class='add'>+	ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL);</div><div class='add'>+	if (!ptr)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	p = pinctrl_get(dev);</div><div class='add'>+	if (!IS_ERR(p)) {</div><div class='add'>+		*ptr = p;</div><div class='add'>+		devres_add(dev, ptr);</div><div class='add'>+	} else {</div><div class='add'>+		devres_free(ptr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return p;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(devm_pinctrl_get);</div><div class='add'>+</div><div class='add'>+static int devm_pinctrl_match(struct device *dev, void *res, void *data)</div><div class='add'>+{</div><div class='add'>+	struct pinctrl **p = res;</div><div class='add'>+</div><div class='add'>+	return *p == data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * devm_pinctrl_put() - Resource managed pinctrl_put()</div><div class='add'>+ * @p: the pinctrl handle to release</div><div class='add'>+ *</div><div class='add'>+ * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally</div><div class='add'>+ * this function will not need to be called and the resource management</div><div class='add'>+ * code will ensure that the resource is freed.</div><div class='add'>+ */</div><div class='add'>+void devm_pinctrl_put(struct pinctrl *p)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(devres_destroy(p-&gt;dev, devm_pinctrl_release,</div><div class='add'>+			       devm_pinctrl_match, p));</div><div class='add'>+	pinctrl_put(p);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(devm_pinctrl_put);</div><div class='add'>+</div><div class='add'>+int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps,</div><div class='add'>+			 bool dup, bool locked)</div><div class='ctx'> {</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> 	struct pinctrl_maps *maps_node;</div><div class='hunk'>@@ -829,13 +937,13 @@ int pinctrl_register_mappings(struct pinctrl_map const *maps,</div><div class='ctx'> 		case PIN_MAP_TYPE_MUX_GROUP:</div><div class='ctx'> 			ret = pinmux_validate_map(&amp;maps[i], i);</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='del'>-				return 0;</div><div class='add'>+				return ret;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case PIN_MAP_TYPE_CONFIGS_PIN:</div><div class='ctx'> 		case PIN_MAP_TYPE_CONFIGS_GROUP:</div><div class='ctx'> 			ret = pinconf_validate_map(&amp;maps[i], i);</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='del'>-				return 0;</div><div class='add'>+				return ret;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			pr_err("failed to register map %s (%d): invalid type given\n",</div><div class='hunk'>@@ -851,20 +959,52 @@ int pinctrl_register_mappings(struct pinctrl_map const *maps,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	maps_node-&gt;num_maps = num_maps;</div><div class='del'>-	maps_node-&gt;maps = kmemdup(maps, sizeof(*maps) * num_maps, GFP_KERNEL);</div><div class='del'>-	if (!maps_node-&gt;maps) {</div><div class='del'>-		pr_err("failed to duplicate mapping table\n");</div><div class='del'>-		kfree(maps_node);</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (dup) {</div><div class='add'>+		maps_node-&gt;maps = kmemdup(maps, sizeof(*maps) * num_maps,</div><div class='add'>+					  GFP_KERNEL);</div><div class='add'>+		if (!maps_node-&gt;maps) {</div><div class='add'>+			pr_err("failed to duplicate mapping table\n");</div><div class='add'>+			kfree(maps_node);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		maps_node-&gt;maps = maps;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;pinctrl_mutex);</div><div class='add'>+	if (!locked)</div><div class='add'>+		mutex_lock(&amp;pinctrl_mutex);</div><div class='ctx'> 	list_add_tail(&amp;maps_node-&gt;node, &amp;pinctrl_maps);</div><div class='del'>-	mutex_unlock(&amp;pinctrl_mutex);</div><div class='add'>+	if (!locked)</div><div class='add'>+		mutex_unlock(&amp;pinctrl_mutex);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * pinctrl_register_mappings() - register a set of pin controller mappings</div><div class='add'>+ * @maps: the pincontrol mappings table to register. This should probably be</div><div class='add'>+ *	marked with __initdata so it can be discarded after boot. This</div><div class='add'>+ *	function will perform a shallow copy for the mapping entries.</div><div class='add'>+ * @num_maps: the number of maps in the mapping table</div><div class='add'>+ */</div><div class='add'>+int pinctrl_register_mappings(struct pinctrl_map const *maps,</div><div class='add'>+			      unsigned num_maps)</div><div class='add'>+{</div><div class='add'>+	return pinctrl_register_map(maps, num_maps, true, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pinctrl_unregister_map(struct pinctrl_map const *map)</div><div class='add'>+{</div><div class='add'>+	struct pinctrl_maps *maps_node;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(maps_node, &amp;pinctrl_maps, node) {</div><div class='add'>+		if (maps_node-&gt;maps == map) {</div><div class='add'>+			list_del(&amp;maps_node-&gt;node);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> </div><div class='ctx'> static int pinctrl_pins_show(struct seq_file *s, void *what)</div><div class='hunk'>@@ -906,15 +1046,17 @@ static int pinctrl_groups_show(struct seq_file *s, void *what)</div><div class='ctx'> {</div><div class='ctx'> 	struct pinctrl_dev *pctldev = s-&gt;private;</div><div class='ctx'> 	const struct pinctrl_ops *ops = pctldev-&gt;desc-&gt;pctlops;</div><div class='del'>-	unsigned selector = 0;</div><div class='add'>+	unsigned ngroups, selector = 0;</div><div class='ctx'> </div><div class='add'>+	ngroups = ops-&gt;get_groups_count(pctldev);</div><div class='ctx'> 	mutex_lock(&amp;pinctrl_mutex);</div><div class='ctx'> </div><div class='ctx'> 	seq_puts(s, "registered pin groups:\n");</div><div class='del'>-	while (ops-&gt;list_groups(pctldev, selector) &gt;= 0) {</div><div class='add'>+	while (selector &lt; ngroups) {</div><div class='ctx'> 		const unsigned *pins;</div><div class='ctx'> 		unsigned num_pins;</div><div class='ctx'> 		const char *gname = ops-&gt;get_group_name(pctldev, selector);</div><div class='add'>+		const char *pname;</div><div class='ctx'> 		int ret;</div><div class='ctx'> 		int i;</div><div class='ctx'> </div><div class='hunk'>@@ -924,10 +1066,14 @@ static int pinctrl_groups_show(struct seq_file *s, void *what)</div><div class='ctx'> 			seq_printf(s, "%s [ERROR GETTING PINS]\n",</div><div class='ctx'> 				   gname);</div><div class='ctx'> 		else {</div><div class='del'>-			seq_printf(s, "group: %s, pins = [ ", gname);</div><div class='del'>-			for (i = 0; i &lt; num_pins; i++)</div><div class='del'>-				seq_printf(s, "%d ", pins[i]);</div><div class='del'>-			seq_puts(s, "]\n");</div><div class='add'>+			seq_printf(s, "group: %s\n", gname);</div><div class='add'>+			for (i = 0; i &lt; num_pins; i++) {</div><div class='add'>+				pname = pin_get_name(pctldev, pins[i]);</div><div class='add'>+				if (WARN_ON(!pname))</div><div class='add'>+					return -EINVAL;</div><div class='add'>+				seq_printf(s, "pin %d (%s)\n", pins[i], pname);</div><div class='add'>+			}</div><div class='add'>+			seq_puts(s, "\n");</div><div class='ctx'> 		}</div><div class='ctx'> 		selector++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1226,11 +1372,14 @@ static int pinctrl_check_ops(struct pinctrl_dev *pctldev)</div><div class='ctx'> 	const struct pinctrl_ops *ops = pctldev-&gt;desc-&gt;pctlops;</div><div class='ctx'> </div><div class='ctx'> 	if (!ops ||</div><div class='del'>-	    !ops-&gt;list_groups ||</div><div class='add'>+	    !ops-&gt;get_groups_count ||</div><div class='ctx'> 	    !ops-&gt;get_group_name ||</div><div class='ctx'> 	    !ops-&gt;get_group_pins)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (ops-&gt;dt_node_to_map &amp;&amp; !ops-&gt;dt_free_map)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1268,37 +1417,29 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,</div><div class='ctx'> 	/* check core ops for sanity */</div><div class='ctx'> 	ret = pinctrl_check_ops(pctldev);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		pr_err("%s pinctrl ops lacks necessary functions\n",</div><div class='del'>-			pctldesc-&gt;name);</div><div class='add'>+		dev_err(dev, "pinctrl ops lacks necessary functions\n");</div><div class='ctx'> 		goto out_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* If we're implementing pinmuxing, check the ops for sanity */</div><div class='ctx'> 	if (pctldesc-&gt;pmxops) {</div><div class='ctx'> 		ret = pinmux_check_ops(pctldev);</div><div class='del'>-		if (ret) {</div><div class='del'>-			pr_err("%s pinmux ops lacks necessary functions\n",</div><div class='del'>-			       pctldesc-&gt;name);</div><div class='add'>+		if (ret)</div><div class='ctx'> 			goto out_err;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* If we're implementing pinconfig, check the ops for sanity */</div><div class='ctx'> 	if (pctldesc-&gt;confops) {</div><div class='ctx'> 		ret = pinconf_check_ops(pctldev);</div><div class='del'>-		if (ret) {</div><div class='del'>-			pr_err("%s pin config ops lacks necessary functions\n",</div><div class='del'>-			       pctldesc-&gt;name);</div><div class='add'>+		if (ret)</div><div class='ctx'> 			goto out_err;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Register all the pins */</div><div class='del'>-	pr_debug("try to register %d pins on %s...\n",</div><div class='del'>-		 pctldesc-&gt;npins, pctldesc-&gt;name);</div><div class='add'>+	dev_dbg(dev, "try to register %d pins ...\n",  pctldesc-&gt;npins);</div><div class='ctx'> 	ret = pinctrl_register_pins(pctldev, pctldesc-&gt;pins, pctldesc-&gt;npins);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		pr_err("error during pin registration\n");</div><div class='add'>+		dev_err(dev, "error during pin registration\n");</div><div class='ctx'> 		pinctrl_free_pindescs(pctldev, pctldesc-&gt;pins,</div><div class='ctx'> 				      pctldesc-&gt;npins);</div><div class='ctx'> 		goto out_err;</div><div class='hunk'>@@ -1313,8 +1454,15 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,</div><div class='ctx'> 		struct pinctrl_state *s =</div><div class='ctx'> 			pinctrl_lookup_state_locked(pctldev-&gt;p,</div><div class='ctx'> 						    PINCTRL_STATE_DEFAULT);</div><div class='del'>-		if (!IS_ERR(s))</div><div class='del'>-			pinctrl_select_state_locked(pctldev-&gt;p, s);</div><div class='add'>+		if (IS_ERR(s)) {</div><div class='add'>+			dev_dbg(dev, "failed to lookup the default state\n");</div><div class='add'>+		} else {</div><div class='add'>+			ret = pinctrl_select_state_locked(pctldev-&gt;p, s);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(dev,</div><div class='add'>+					"failed to select default state\n");</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;pinctrl_mutex);</div><div class='head'>diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h<br/>index 17ecf651b123..1f40ff68a8c4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/core.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/core.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/core.h</a></div><div class='hunk'>@@ -52,12 +52,15 @@ struct pinctrl_dev {</div><div class='ctx'>  * @dev: the device using this pin control handle</div><div class='ctx'>  * @states: a list of states for this device</div><div class='ctx'>  * @state: the current state</div><div class='add'>+ * @dt_maps: the mapping table chunks dynamically parsed from device tree for</div><div class='add'>+ *	this device, if any</div><div class='ctx'>  */</div><div class='ctx'> struct pinctrl {</div><div class='ctx'> 	struct list_head node;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct list_head states;</div><div class='ctx'> 	struct pinctrl_state *state;</div><div class='add'>+	struct list_head dt_maps;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -100,7 +103,8 @@ struct pinctrl_setting_configs {</div><div class='ctx'>  * struct pinctrl_setting - an individual mux or config setting</div><div class='ctx'>  * @node: list node for struct pinctrl_settings's @settings field</div><div class='ctx'>  * @type: the type of setting</div><div class='del'>- * @pctldev: pin control device handling to be programmed</div><div class='add'>+ * @pctldev: pin control device handling to be programmed. Not used for</div><div class='add'>+ *   PIN_MAP_TYPE_DUMMY_STATE.</div><div class='ctx'>  * @data: Data specific to the setting type</div><div class='ctx'>  */</div><div class='ctx'> struct pinctrl_setting {</div><div class='hunk'>@@ -144,6 +148,7 @@ struct pin_desc {</div><div class='ctx'> </div><div class='ctx'> struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *dev_name);</div><div class='ctx'> int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name);</div><div class='add'>+const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin);</div><div class='ctx'> int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,</div><div class='ctx'> 			       const char *pin_group);</div><div class='ctx'> </div><div class='hunk'>@@ -153,4 +158,9 @@ static inline struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev,</div><div class='ctx'> 	return radix_tree_lookup(&amp;pctldev-&gt;pin_desc_tree, pin);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps,</div><div class='add'>+			 bool dup, bool locked);</div><div class='add'>+void pinctrl_unregister_map(struct pinctrl_map const *map);</div><div class='add'>+</div><div class='ctx'> extern struct mutex pinctrl_mutex;</div><div class='add'>+extern struct list_head pinctrldev_list;</div><div class='head'>diff --git a/drivers/pinctrl/devicetree.c b/drivers/pinctrl/devicetree.c<br/>new file mode 100644<br/>index 000000000000..fcb1de45473c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/devicetree.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/devicetree.c</a></div><div class='hunk'>@@ -0,0 +1,249 @@</div><div class='add'>+/*</div><div class='add'>+ * Device tree integration for the pin control subsystem</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+#include "core.h"</div><div class='add'>+#include "devicetree.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct pinctrl_dt_map - mapping table chunk parsed from device tree</div><div class='add'>+ * @node: list node for struct pinctrl's @dt_maps field</div><div class='add'>+ * @pctldev: the pin controller that allocated this struct, and will free it</div><div class='add'>+ * @maps: the mapping table entries</div><div class='add'>+ */</div><div class='add'>+struct pinctrl_dt_map {</div><div class='add'>+	struct list_head node;</div><div class='add'>+	struct pinctrl_dev *pctldev;</div><div class='add'>+	struct pinctrl_map *map;</div><div class='add'>+	unsigned num_maps;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void dt_free_map(struct pinctrl_dev *pctldev,</div><div class='add'>+		     struct pinctrl_map *map, unsigned num_maps)</div><div class='add'>+{</div><div class='add'>+	if (pctldev) {</div><div class='add'>+		struct pinctrl_ops *ops = pctldev-&gt;desc-&gt;pctlops;</div><div class='add'>+		ops-&gt;dt_free_map(pctldev, map, num_maps);</div><div class='add'>+	} else {</div><div class='add'>+		/* There is no pctldev for PIN_MAP_TYPE_DUMMY_STATE */</div><div class='add'>+		kfree(map);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pinctrl_dt_free_maps(struct pinctrl *p)</div><div class='add'>+{</div><div class='add'>+	struct pinctrl_dt_map *dt_map, *n1;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(dt_map, n1, &amp;p-&gt;dt_maps, node) {</div><div class='add'>+		pinctrl_unregister_map(dt_map-&gt;map);</div><div class='add'>+		list_del(&amp;dt_map-&gt;node);</div><div class='add'>+		dt_free_map(dt_map-&gt;pctldev, dt_map-&gt;map,</div><div class='add'>+			    dt_map-&gt;num_maps);</div><div class='add'>+		kfree(dt_map);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	of_node_put(p-&gt;dev-&gt;of_node);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dt_remember_or_free_map(struct pinctrl *p, const char *statename,</div><div class='add'>+				   struct pinctrl_dev *pctldev,</div><div class='add'>+				   struct pinctrl_map *map, unsigned num_maps)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct pinctrl_dt_map *dt_map;</div><div class='add'>+</div><div class='add'>+	/* Initialize common mapping table entry fields */</div><div class='add'>+	for (i = 0; i &lt; num_maps; i++) {</div><div class='add'>+		map[i].dev_name = dev_name(p-&gt;dev);</div><div class='add'>+		map[i].name = statename;</div><div class='add'>+		if (pctldev)</div><div class='add'>+			map[i].ctrl_dev_name = dev_name(pctldev-&gt;dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Remember the converted mapping table entries */</div><div class='add'>+	dt_map = kzalloc(sizeof(*dt_map), GFP_KERNEL);</div><div class='add'>+	if (!dt_map) {</div><div class='add'>+		dev_err(p-&gt;dev, "failed to alloc struct pinctrl_dt_map\n");</div><div class='add'>+		dt_free_map(pctldev, map, num_maps);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dt_map-&gt;pctldev = pctldev;</div><div class='add'>+	dt_map-&gt;map = map;</div><div class='add'>+	dt_map-&gt;num_maps = num_maps;</div><div class='add'>+	list_add_tail(&amp;dt_map-&gt;node, &amp;p-&gt;dt_maps);</div><div class='add'>+</div><div class='add'>+	return pinctrl_register_map(map, num_maps, false, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pinctrl_dev *find_pinctrl_by_of_node(struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	struct pinctrl_dev *pctldev;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(pctldev, &amp;pinctrldev_list, node)</div><div class='add'>+		if (pctldev-&gt;dev-&gt;of_node == np)</div><div class='add'>+			return pctldev;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dt_to_map_one_config(struct pinctrl *p, const char *statename,</div><div class='add'>+				struct device_node *np_config)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np_pctldev;</div><div class='add'>+	struct pinctrl_dev *pctldev;</div><div class='add'>+	struct pinctrl_ops *ops;</div><div class='add'>+	int ret;</div><div class='add'>+	struct pinctrl_map *map;</div><div class='add'>+	unsigned num_maps;</div><div class='add'>+</div><div class='add'>+	/* Find the pin controller containing np_config */</div><div class='add'>+	np_pctldev = of_node_get(np_config);</div><div class='add'>+	for (;;) {</div><div class='add'>+		np_pctldev = of_get_next_parent(np_pctldev);</div><div class='add'>+		if (!np_pctldev || of_node_is_root(np_pctldev)) {</div><div class='add'>+			dev_info(p-&gt;dev, "could not find pctldev for node %s, deferring probe\n",</div><div class='add'>+				np_config-&gt;full_name);</div><div class='add'>+			of_node_put(np_pctldev);</div><div class='add'>+			/* OK let's just assume this will appear later then */</div><div class='add'>+			return -EPROBE_DEFER;</div><div class='add'>+		}</div><div class='add'>+		pctldev = find_pinctrl_by_of_node(np_pctldev);</div><div class='add'>+		if (pctldev)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	of_node_put(np_pctldev);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Call pinctrl driver to parse device tree node, and</div><div class='add'>+	 * generate mapping table entries</div><div class='add'>+	 */</div><div class='add'>+	ops = pctldev-&gt;desc-&gt;pctlops;</div><div class='add'>+	if (!ops-&gt;dt_node_to_map) {</div><div class='add'>+		dev_err(p-&gt;dev, "pctldev %s doesn't support DT\n",</div><div class='add'>+			dev_name(pctldev-&gt;dev));</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+	ret = ops-&gt;dt_node_to_map(pctldev, np_config, &amp;map, &amp;num_maps);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Stash the mapping table chunk away for later use */</div><div class='add'>+	return dt_remember_or_free_map(p, statename, pctldev, map, num_maps);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dt_remember_dummy_state(struct pinctrl *p, const char *statename)</div><div class='add'>+{</div><div class='add'>+	struct pinctrl_map *map;</div><div class='add'>+</div><div class='add'>+	map = kzalloc(sizeof(*map), GFP_KERNEL);</div><div class='add'>+	if (!map) {</div><div class='add'>+		dev_err(p-&gt;dev, "failed to alloc struct pinctrl_map\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* There is no pctldev for PIN_MAP_TYPE_DUMMY_STATE */</div><div class='add'>+	map-&gt;type = PIN_MAP_TYPE_DUMMY_STATE;</div><div class='add'>+</div><div class='add'>+	return dt_remember_or_free_map(p, statename, NULL, map, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pinctrl_dt_to_map(struct pinctrl *p)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = p-&gt;dev-&gt;of_node;</div><div class='add'>+	int state, ret;</div><div class='add'>+	char *propname;</div><div class='add'>+	struct property *prop;</div><div class='add'>+	const char *statename;</div><div class='add'>+	const __be32 *list;</div><div class='add'>+	int size, config;</div><div class='add'>+	phandle phandle;</div><div class='add'>+	struct device_node *np_config;</div><div class='add'>+</div><div class='add'>+	/* CONFIG_OF enabled, p-&gt;dev not instantiated from DT */</div><div class='add'>+	if (!np) {</div><div class='add'>+		dev_dbg(p-&gt;dev, "no of_node; not parsing pinctrl DT\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We may store pointers to property names within the node */</div><div class='add'>+	of_node_get(np);</div><div class='add'>+</div><div class='add'>+	/* For each defined state ID */</div><div class='add'>+	for (state = 0; ; state++) {</div><div class='add'>+		/* Retrieve the pinctrl-* property */</div><div class='add'>+		propname = kasprintf(GFP_KERNEL, "pinctrl-%d", state);</div><div class='add'>+		prop = of_find_property(np, propname, &amp;size);</div><div class='add'>+		kfree(propname);</div><div class='add'>+		if (!prop)</div><div class='add'>+			break;</div><div class='add'>+		list = prop-&gt;value;</div><div class='add'>+		size /= sizeof(*list);</div><div class='add'>+</div><div class='add'>+		/* Determine whether pinctrl-names property names the state */</div><div class='add'>+		ret = of_property_read_string_index(np, "pinctrl-names",</div><div class='add'>+						    state, &amp;statename);</div><div class='add'>+		/*</div><div class='add'>+		 * If not, statename is just the integer state ID. But rather</div><div class='add'>+		 * than dynamically allocate it and have to free it later,</div><div class='add'>+		 * just point part way into the property name for the string.</div><div class='add'>+		 */</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			/* strlen("pinctrl-") == 8 */</div><div class='add'>+			statename = prop-&gt;name + 8;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* For every referenced pin configuration node in it */</div><div class='add'>+		for (config = 0; config &lt; size; config++) {</div><div class='add'>+			phandle = be32_to_cpup(list++);</div><div class='add'>+</div><div class='add'>+			/* Look up the pin configuration node */</div><div class='add'>+			np_config = of_find_node_by_phandle(phandle);</div><div class='add'>+			if (!np_config) {</div><div class='add'>+				dev_err(p-&gt;dev,</div><div class='add'>+					"prop %s index %i invalid phandle\n",</div><div class='add'>+					prop-&gt;name, config);</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto err;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* Parse the node */</div><div class='add'>+			ret = dt_to_map_one_config(p, statename, np_config);</div><div class='add'>+			of_node_put(np_config);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* No entries in DT? Generate a dummy state table entry */</div><div class='add'>+		if (!size) {</div><div class='add'>+			ret = dt_remember_dummy_state(p, statename);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				goto err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pinctrl_dt_free_maps(p);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/pinctrl/devicetree.h b/drivers/pinctrl/devicetree.h<br/>new file mode 100644<br/>index 000000000000..760bc4960f58<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/devicetree.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/devicetree.h</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+/*</div><div class='add'>+ * Internal interface to pinctrl device tree integration</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+</div><div class='add'>+void pinctrl_dt_free_maps(struct pinctrl *p);</div><div class='add'>+int pinctrl_dt_to_map(struct pinctrl *p);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline int pinctrl_dt_to_map(struct pinctrl *p)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void pinctrl_dt_free_maps(struct pinctrl *p)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/pinctrl/pinconf.c b/drivers/pinctrl/pinconf.c<br/>index 7321e8601294..43f474cdc110 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/pinconf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/pinconf.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinconf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinconf.c</a></div><div class='hunk'>@@ -28,11 +28,17 @@ int pinconf_check_ops(struct pinctrl_dev *pctldev)</div><div class='ctx'> 	const struct pinconf_ops *ops = pctldev-&gt;desc-&gt;confops;</div><div class='ctx'> </div><div class='ctx'> 	/* We must be able to read out pin status */</div><div class='del'>-	if (!ops-&gt;pin_config_get &amp;&amp; !ops-&gt;pin_config_group_get)</div><div class='add'>+	if (!ops-&gt;pin_config_get &amp;&amp; !ops-&gt;pin_config_group_get) {</div><div class='add'>+		dev_err(pctldev-&gt;dev,</div><div class='add'>+			"pinconf must be able to read out pin status\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> 	/* We have to be able to config the pins in SOME way */</div><div class='del'>-	if (!ops-&gt;pin_config_set &amp;&amp; !ops-&gt;pin_config_group_set)</div><div class='add'>+	if (!ops-&gt;pin_config_set &amp;&amp; !ops-&gt;pin_config_group_set) {</div><div class='add'>+		dev_err(pctldev-&gt;dev,</div><div class='add'>+			"pinconf has to be able to set a pins config\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -44,9 +50,9 @@ int pinconf_validate_map(struct pinctrl_map const *map, int i)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (map-&gt;data.configs.num_configs &amp;&amp;</div><div class='add'>+	if (!map-&gt;data.configs.num_configs ||</div><div class='ctx'> 			!map-&gt;data.configs.configs) {</div><div class='del'>-		pr_err("failed to register map %s (%d): no configs ptr given\n",</div><div class='add'>+		pr_err("failed to register map %s (%d): no configs given\n",</div><div class='ctx'> 		       map-&gt;name, i);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -379,8 +385,16 @@ int pinconf_apply_setting(struct pinctrl_setting const *setting)</div><div class='ctx'> </div><div class='ctx'> void pinconf_show_map(struct seq_file *s, struct pinctrl_map const *map)</div><div class='ctx'> {</div><div class='add'>+	struct pinctrl_dev *pctldev;</div><div class='add'>+	const struct pinconf_ops *confops;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	pctldev = get_pinctrl_dev_from_devname(map-&gt;ctrl_dev_name);</div><div class='add'>+	if (pctldev)</div><div class='add'>+		confops = pctldev-&gt;desc-&gt;confops;</div><div class='add'>+	else</div><div class='add'>+		confops = NULL;</div><div class='add'>+</div><div class='ctx'> 	switch (map-&gt;type) {</div><div class='ctx'> 	case PIN_MAP_TYPE_CONFIGS_PIN:</div><div class='ctx'> 		seq_printf(s, "pin ");</div><div class='hunk'>@@ -394,8 +408,15 @@ void pinconf_show_map(struct seq_file *s, struct pinctrl_map const *map)</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(s, "%s\n", map-&gt;data.configs.group_or_pin);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; map-&gt;data.configs.num_configs; i++)</div><div class='del'>-		seq_printf(s, "config %08lx\n", map-&gt;data.configs.configs[i]);</div><div class='add'>+	for (i = 0; i &lt; map-&gt;data.configs.num_configs; i++) {</div><div class='add'>+		seq_printf(s, "config ");</div><div class='add'>+		if (confops &amp;&amp; confops-&gt;pin_config_config_dbg_show)</div><div class='add'>+			confops-&gt;pin_config_config_dbg_show(pctldev, s,</div><div class='add'>+						map-&gt;data.configs.configs[i]);</div><div class='add'>+		else</div><div class='add'>+			seq_printf(s, "%08lx", map-&gt;data.configs.configs[i]);</div><div class='add'>+		seq_printf(s, "\n");</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void pinconf_show_setting(struct seq_file *s,</div><div class='hunk'>@@ -403,6 +424,7 @@ void pinconf_show_setting(struct seq_file *s,</div><div class='ctx'> {</div><div class='ctx'> 	struct pinctrl_dev *pctldev = setting-&gt;pctldev;</div><div class='ctx'> 	const struct pinctrl_ops *pctlops = pctldev-&gt;desc-&gt;pctlops;</div><div class='add'>+	const struct pinconf_ops *confops = pctldev-&gt;desc-&gt;confops;</div><div class='ctx'> 	struct pin_desc *desc;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -428,8 +450,15 @@ void pinconf_show_setting(struct seq_file *s,</div><div class='ctx'> 	 * FIXME: We should really get the pin controler to dump the config</div><div class='ctx'> 	 * values, so they can be decoded to something meaningful.</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; setting-&gt;data.configs.num_configs; i++)</div><div class='del'>-		seq_printf(s, " %08lx", setting-&gt;data.configs.configs[i]);</div><div class='add'>+	for (i = 0; i &lt; setting-&gt;data.configs.num_configs; i++) {</div><div class='add'>+		seq_printf(s, " ");</div><div class='add'>+		if (confops &amp;&amp; confops-&gt;pin_config_config_dbg_show)</div><div class='add'>+			confops-&gt;pin_config_config_dbg_show(pctldev, s,</div><div class='add'>+				setting-&gt;data.configs.configs[i]);</div><div class='add'>+		else</div><div class='add'>+			seq_printf(s, "%08lx",</div><div class='add'>+				   setting-&gt;data.configs.configs[i]);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(s, "\n");</div><div class='ctx'> }</div><div class='hunk'>@@ -448,10 +477,14 @@ static void pinconf_dump_pin(struct pinctrl_dev *pctldev,</div><div class='ctx'> static int pinconf_pins_show(struct seq_file *s, void *what)</div><div class='ctx'> {</div><div class='ctx'> 	struct pinctrl_dev *pctldev = s-&gt;private;</div><div class='add'>+	const struct pinconf_ops *ops = pctldev-&gt;desc-&gt;confops;</div><div class='ctx'> 	unsigned i, pin;</div><div class='ctx'> </div><div class='add'>+	if (!ops || !ops-&gt;pin_config_get)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	seq_puts(s, "Pin config settings per pin\n");</div><div class='del'>-	seq_puts(s, "Format: pin (name): pinmux setting array\n");</div><div class='add'>+	seq_puts(s, "Format: pin (name): configs\n");</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pinctrl_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -495,17 +528,18 @@ static int pinconf_groups_show(struct seq_file *s, void *what)</div><div class='ctx'> 	struct pinctrl_dev *pctldev = s-&gt;private;</div><div class='ctx'> 	const struct pinctrl_ops *pctlops = pctldev-&gt;desc-&gt;pctlops;</div><div class='ctx'> 	const struct pinconf_ops *ops = pctldev-&gt;desc-&gt;confops;</div><div class='add'>+	unsigned ngroups = pctlops-&gt;get_groups_count(pctldev);</div><div class='ctx'> 	unsigned selector = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!ops || !ops-&gt;pin_config_group_get)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	seq_puts(s, "Pin config settings per pin group\n");</div><div class='del'>-	seq_puts(s, "Format: group (name): pinmux setting array\n");</div><div class='add'>+	seq_puts(s, "Format: group (name): configs\n");</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pinctrl_mutex);</div><div class='ctx'> </div><div class='del'>-	while (pctlops-&gt;list_groups(pctldev, selector) &gt;= 0) {</div><div class='add'>+	while (selector &lt; ngroups) {</div><div class='ctx'> 		const char *gname = pctlops-&gt;get_group_name(pctldev, selector);</div><div class='ctx'> </div><div class='ctx'> 		seq_printf(s, "%u (%s):", selector, gname);</div><div class='head'>diff --git a/drivers/pinctrl/pinconf.h b/drivers/pinctrl/pinconf.h<br/>index 54510de5e8c6..e3ed8cb072a5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/pinconf.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/pinconf.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinconf.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinconf.h</a></div><div class='hunk'>@@ -19,11 +19,6 @@ int pinconf_map_to_setting(struct pinctrl_map const *map,</div><div class='ctx'> 			  struct pinctrl_setting *setting);</div><div class='ctx'> void pinconf_free_setting(struct pinctrl_setting const *setting);</div><div class='ctx'> int pinconf_apply_setting(struct pinctrl_setting const *setting);</div><div class='del'>-void pinconf_show_map(struct seq_file *s, struct pinctrl_map const *map);</div><div class='del'>-void pinconf_show_setting(struct seq_file *s,</div><div class='del'>-			  struct pinctrl_setting const *setting);</div><div class='del'>-void pinconf_init_device_debugfs(struct dentry *devroot,</div><div class='del'>-				 struct pinctrl_dev *pctldev);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * You will only be interested in these if you're using PINCONF</div><div class='hunk'>@@ -61,6 +56,18 @@ static inline int pinconf_apply_setting(struct pinctrl_setting const *setting)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_PINCONF) &amp;&amp; defined(CONFIG_DEBUG_FS)</div><div class='add'>+</div><div class='add'>+void pinconf_show_map(struct seq_file *s, struct pinctrl_map const *map);</div><div class='add'>+void pinconf_show_setting(struct seq_file *s,</div><div class='add'>+			  struct pinctrl_setting const *setting);</div><div class='add'>+void pinconf_init_device_debugfs(struct dentry *devroot,</div><div class='add'>+				 struct pinctrl_dev *pctldev);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='ctx'> static inline void pinconf_show_map(struct seq_file *s,</div><div class='ctx'> 				    struct pinctrl_map const *map)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-coh901.c b/drivers/pinctrl/pinctrl-coh901.c<br/>index 0797eba3e33a..55697a5d7482 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-coh901.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/pinctrl-coh901.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-coh901.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-coh901.c</a></div><div class='hunk'>@@ -174,7 +174,7 @@ struct u300_gpio_confdata {</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* Initial configuration */</div><div class='del'>-static const struct __initdata u300_gpio_confdata</div><div class='add'>+static const struct __initconst u300_gpio_confdata</div><div class='ctx'> bs335_gpio_config[BS335_GPIO_NUM_PORTS][U300_GPIO_PINS_PER_PORT] = {</div><div class='ctx'> 	/* Port 0, pins 0-7 */</div><div class='ctx'> 	{</div><div class='hunk'>@@ -255,7 +255,7 @@ bs335_gpio_config[BS335_GPIO_NUM_PORTS][U300_GPIO_PINS_PER_PORT] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct __initdata u300_gpio_confdata</div><div class='add'>+static const struct __initconst u300_gpio_confdata</div><div class='ctx'> bs365_gpio_config[BS365_GPIO_NUM_PORTS][U300_GPIO_PINS_PER_PORT] = {</div><div class='ctx'> 	/* Port 0, pins 0-7 */</div><div class='ctx'> 	{</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-imx.c b/drivers/pinctrl/pinctrl-imx.c<br/>new file mode 100644<br/>index 000000000000..f6e7c670906c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-imx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx.c</a></div><div class='hunk'>@@ -0,0 +1,620 @@</div><div class='add'>+/*</div><div class='add'>+ * Core driver for the imx pin controller</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright (C) 2012 Linaro Ltd.</div><div class='add'>+ *</div><div class='add'>+ * Author: Dong Aisheng &lt;dong.aisheng@linaro.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinconf.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinmux.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+#include "core.h"</div><div class='add'>+#include "pinctrl-imx.h"</div><div class='add'>+</div><div class='add'>+#define IMX_PMX_DUMP(info, p, m, c, n)		\</div><div class='add'>+{						\</div><div class='add'>+	int i, j;				\</div><div class='add'>+	printk("Format: Pin Mux Config\n");	\</div><div class='add'>+	for (i = 0; i &lt; n; i++) {		\</div><div class='add'>+		j = p[i];			\</div><div class='add'>+		printk("%s %d 0x%lx\n",		\</div><div class='add'>+			info-&gt;pins[j].name,	\</div><div class='add'>+			m[i], c[i]);		\</div><div class='add'>+	}					\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The bits in CONFIG cell defined in binding doc*/</div><div class='add'>+#define IMX_NO_PAD_CTL	0x80000000	/* no pin config need */</div><div class='add'>+#define IMX_PAD_SION 0x40000000		/* set SION */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * @dev: a pointer back to containing device</div><div class='add'>+ * @base: the offset to the controller in virtual memory</div><div class='add'>+ */</div><div class='add'>+struct imx_pinctrl {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct pinctrl_dev *pctl;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	const struct imx_pinctrl_soc_info *info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct imx_pin_reg *imx_find_pin_reg(</div><div class='add'>+				const struct imx_pinctrl_soc_info *info,</div><div class='add'>+				unsigned pin, bool is_mux, unsigned mux)</div><div class='add'>+{</div><div class='add'>+	const struct imx_pin_reg *pin_reg = NULL;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; info-&gt;npin_regs; i++) {</div><div class='add'>+		pin_reg = &amp;info-&gt;pin_regs[i];</div><div class='add'>+		if (pin_reg-&gt;pid != pin)</div><div class='add'>+			continue;</div><div class='add'>+		if (!is_mux)</div><div class='add'>+			break;</div><div class='add'>+		else if (pin_reg-&gt;mux_mode == (mux &amp; IMX_MUX_MASK))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pin_reg) {</div><div class='add'>+		dev_err(info-&gt;dev, "Pin(%s): unable to find pin reg map\n",</div><div class='add'>+			info-&gt;pins[pin].name);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pin_reg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const inline struct imx_pin_group *imx_pinctrl_find_group_by_name(</div><div class='add'>+				const struct imx_pinctrl_soc_info *info,</div><div class='add'>+				const char *name)</div><div class='add'>+{</div><div class='add'>+	const struct imx_pin_group *grp = NULL;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; info-&gt;ngroups; i++) {</div><div class='add'>+		if (!strcmp(info-&gt;groups[i].name, name)) {</div><div class='add'>+			grp = &amp;info-&gt;groups[i];</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return grp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx_get_groups_count(struct pinctrl_dev *pctldev)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct imx_pinctrl_soc_info *info = ipctl-&gt;info;</div><div class='add'>+</div><div class='add'>+	return info-&gt;ngroups;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *imx_get_group_name(struct pinctrl_dev *pctldev,</div><div class='add'>+				       unsigned selector)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct imx_pinctrl_soc_info *info = ipctl-&gt;info;</div><div class='add'>+</div><div class='add'>+	return info-&gt;groups[selector].name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='add'>+			       const unsigned **pins,</div><div class='add'>+			       unsigned *npins)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct imx_pinctrl_soc_info *info = ipctl-&gt;info;</div><div class='add'>+</div><div class='add'>+	if (selector &gt;= info-&gt;ngroups)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*pins = info-&gt;groups[selector].pins;</div><div class='add'>+	*npins = info-&gt;groups[selector].npins;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void imx_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,</div><div class='add'>+		   unsigned offset)</div><div class='add'>+{</div><div class='add'>+	seq_printf(s, "%s", dev_name(pctldev-&gt;dev));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx_dt_node_to_map(struct pinctrl_dev *pctldev,</div><div class='add'>+			struct device_node *np,</div><div class='add'>+			struct pinctrl_map **map, unsigned *num_maps)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct imx_pinctrl_soc_info *info = ipctl-&gt;info;</div><div class='add'>+	const struct imx_pin_group *grp;</div><div class='add'>+	struct pinctrl_map *new_map;</div><div class='add'>+	struct device_node *parent;</div><div class='add'>+	int map_num = 1;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * first find the group of this node and check if we need create</div><div class='add'>+	 * config maps for pins</div><div class='add'>+	 */</div><div class='add'>+	grp = imx_pinctrl_find_group_by_name(info, np-&gt;name);</div><div class='add'>+	if (!grp) {</div><div class='add'>+		dev_err(info-&gt;dev, "unable to find group for node %s\n",</div><div class='add'>+			np-&gt;name);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; grp-&gt;npins; i++) {</div><div class='add'>+		if (!(grp-&gt;configs[i] &amp; IMX_NO_PAD_CTL))</div><div class='add'>+			map_num++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	new_map = kmalloc(sizeof(struct pinctrl_map) * map_num, GFP_KERNEL);</div><div class='add'>+	if (!new_map)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	*map = new_map;</div><div class='add'>+	*num_maps = map_num;</div><div class='add'>+</div><div class='add'>+	/* create mux map */</div><div class='add'>+	parent = of_get_parent(np);</div><div class='add'>+	if (!parent)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;</div><div class='add'>+	new_map[0].data.mux.function = parent-&gt;name;</div><div class='add'>+	new_map[0].data.mux.group = np-&gt;name;</div><div class='add'>+	of_node_put(parent);</div><div class='add'>+</div><div class='add'>+	/* create config map */</div><div class='add'>+	new_map++;</div><div class='add'>+	for (i = 0; i &lt; grp-&gt;npins; i++) {</div><div class='add'>+		if (!(grp-&gt;configs[i] &amp; IMX_NO_PAD_CTL)) {</div><div class='add'>+			new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN;</div><div class='add'>+			new_map[i].data.configs.group_or_pin =</div><div class='add'>+					pin_get_name(pctldev, grp-&gt;pins[i]);</div><div class='add'>+			new_map[i].data.configs.configs = &amp;grp-&gt;configs[i];</div><div class='add'>+			new_map[i].data.configs.num_configs = 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(pctldev-&gt;dev, "maps: function %s group %s num %d\n",</div><div class='add'>+		new_map-&gt;data.mux.function, new_map-&gt;data.mux.group, map_num);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void imx_dt_free_map(struct pinctrl_dev *pctldev,</div><div class='add'>+				struct pinctrl_map *map, unsigned num_maps)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_maps; i++)</div><div class='add'>+		kfree(map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pinctrl_ops imx_pctrl_ops = {</div><div class='add'>+	.get_groups_count = imx_get_groups_count,</div><div class='add'>+	.get_group_name = imx_get_group_name,</div><div class='add'>+	.get_group_pins = imx_get_group_pins,</div><div class='add'>+	.pin_dbg_show = imx_pin_dbg_show,</div><div class='add'>+	.dt_node_to_map = imx_dt_node_to_map,</div><div class='add'>+	.dt_free_map = imx_dt_free_map,</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='add'>+			   unsigned group)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct imx_pinctrl_soc_info *info = ipctl-&gt;info;</div><div class='add'>+	const struct imx_pin_reg *pin_reg;</div><div class='add'>+	const unsigned *pins, *mux;</div><div class='add'>+	unsigned int npins, pin_id;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Configure the mux mode for each pin in the group for a specific</div><div class='add'>+	 * function.</div><div class='add'>+	 */</div><div class='add'>+	pins = info-&gt;groups[group].pins;</div><div class='add'>+	npins = info-&gt;groups[group].npins;</div><div class='add'>+	mux = info-&gt;groups[group].mux_mode;</div><div class='add'>+</div><div class='add'>+	WARN_ON(!pins || !npins || !mux);</div><div class='add'>+</div><div class='add'>+	dev_dbg(ipctl-&gt;dev, "enable function %s group %s\n",</div><div class='add'>+		info-&gt;functions[selector].name, info-&gt;groups[group].name);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; npins; i++) {</div><div class='add'>+		pin_id = pins[i];</div><div class='add'>+</div><div class='add'>+		pin_reg = imx_find_pin_reg(info, pin_id, 1, mux[i]);</div><div class='add'>+		if (!pin_reg)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		if (!pin_reg-&gt;mux_reg) {</div><div class='add'>+			dev_err(ipctl-&gt;dev, "Pin(%s) does not support mux function\n",</div><div class='add'>+				info-&gt;pins[pin_id].name);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		writel(mux[i], ipctl-&gt;base + pin_reg-&gt;mux_reg);</div><div class='add'>+		dev_dbg(ipctl-&gt;dev, "write: offset 0x%x val 0x%x\n",</div><div class='add'>+			pin_reg-&gt;mux_reg, mux[i]);</div><div class='add'>+</div><div class='add'>+		/* some pins also need select input setting, set it if found */</div><div class='add'>+		if (pin_reg-&gt;input_reg) {</div><div class='add'>+			writel(pin_reg-&gt;input_val, ipctl-&gt;base + pin_reg-&gt;input_reg);</div><div class='add'>+			dev_dbg(ipctl-&gt;dev,</div><div class='add'>+				"==&gt;select_input: offset 0x%x val 0x%x\n",</div><div class='add'>+				pin_reg-&gt;input_reg, pin_reg-&gt;input_val);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct imx_pinctrl_soc_info *info = ipctl-&gt;info;</div><div class='add'>+</div><div class='add'>+	return info-&gt;nfunctions;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *imx_pmx_get_func_name(struct pinctrl_dev *pctldev,</div><div class='add'>+					  unsigned selector)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct imx_pinctrl_soc_info *info = ipctl-&gt;info;</div><div class='add'>+</div><div class='add'>+	return info-&gt;functions[selector].name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='add'>+			       const char * const **groups,</div><div class='add'>+			       unsigned * const num_groups)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct imx_pinctrl_soc_info *info = ipctl-&gt;info;</div><div class='add'>+</div><div class='add'>+	*groups = info-&gt;functions[selector].groups;</div><div class='add'>+	*num_groups = info-&gt;functions[selector].num_groups;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pinmux_ops imx_pmx_ops = {</div><div class='add'>+	.get_functions_count = imx_pmx_get_funcs_count,</div><div class='add'>+	.get_function_name = imx_pmx_get_func_name,</div><div class='add'>+	.get_function_groups = imx_pmx_get_groups,</div><div class='add'>+	.enable = imx_pmx_enable,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int imx_pinconf_get(struct pinctrl_dev *pctldev,</div><div class='add'>+			     unsigned pin_id, unsigned long *config)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct imx_pinctrl_soc_info *info = ipctl-&gt;info;</div><div class='add'>+	const struct imx_pin_reg *pin_reg;</div><div class='add'>+</div><div class='add'>+	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);</div><div class='add'>+	if (!pin_reg)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!pin_reg-&gt;conf_reg) {</div><div class='add'>+		dev_err(info-&gt;dev, "Pin(%s) does not support config function\n",</div><div class='add'>+			info-&gt;pins[pin_id].name);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*config = readl(ipctl-&gt;base + pin_reg-&gt;conf_reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx_pinconf_set(struct pinctrl_dev *pctldev,</div><div class='add'>+			     unsigned pin_id, unsigned long config)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct imx_pinctrl_soc_info *info = ipctl-&gt;info;</div><div class='add'>+	const struct imx_pin_reg *pin_reg;</div><div class='add'>+</div><div class='add'>+	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);</div><div class='add'>+	if (!pin_reg)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!pin_reg-&gt;conf_reg) {</div><div class='add'>+		dev_err(info-&gt;dev, "Pin(%s) does not support config function\n",</div><div class='add'>+			info-&gt;pins[pin_id].name);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(ipctl-&gt;dev, "pinconf set pin %s\n",</div><div class='add'>+		info-&gt;pins[pin_id].name);</div><div class='add'>+</div><div class='add'>+	writel(config, ipctl-&gt;base + pin_reg-&gt;conf_reg);</div><div class='add'>+	dev_dbg(ipctl-&gt;dev, "write: offset 0x%x val 0x%lx\n",</div><div class='add'>+		pin_reg-&gt;conf_reg, config);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,</div><div class='add'>+				   struct seq_file *s, unsigned pin_id)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct imx_pinctrl_soc_info *info = ipctl-&gt;info;</div><div class='add'>+	const struct imx_pin_reg *pin_reg;</div><div class='add'>+	unsigned long config;</div><div class='add'>+</div><div class='add'>+	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);</div><div class='add'>+	if (!pin_reg || !pin_reg-&gt;conf_reg) {</div><div class='add'>+		seq_printf(s, "N/A");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config = readl(ipctl-&gt;base + pin_reg-&gt;conf_reg);</div><div class='add'>+	seq_printf(s, "0x%lx", config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void imx_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,</div><div class='add'>+					 struct seq_file *s, unsigned group)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct imx_pinctrl_soc_info *info = ipctl-&gt;info;</div><div class='add'>+	struct imx_pin_group *grp;</div><div class='add'>+	unsigned long config;</div><div class='add'>+	const char *name;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	if (group &gt; info-&gt;ngroups)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	seq_printf(s, "\n");</div><div class='add'>+	grp = &amp;info-&gt;groups[group];</div><div class='add'>+	for (i = 0; i &lt; grp-&gt;npins; i++) {</div><div class='add'>+		name = pin_get_name(pctldev, grp-&gt;pins[i]);</div><div class='add'>+		ret = imx_pinconf_get(pctldev, grp-&gt;pins[i], &amp;config);</div><div class='add'>+		if (ret)</div><div class='add'>+			return;</div><div class='add'>+		seq_printf(s, "%s: 0x%lx", name, config);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct pinconf_ops imx_pinconf_ops = {</div><div class='add'>+	.pin_config_get = imx_pinconf_get,</div><div class='add'>+	.pin_config_set = imx_pinconf_set,</div><div class='add'>+	.pin_config_dbg_show = imx_pinconf_dbg_show,</div><div class='add'>+	.pin_config_group_dbg_show = imx_pinconf_group_dbg_show,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinctrl_desc imx_pinctrl_desc = {</div><div class='add'>+	.pctlops = &amp;imx_pctrl_ops,</div><div class='add'>+	.pmxops = &amp;imx_pmx_ops,</div><div class='add'>+	.confops = &amp;imx_pinconf_ops,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* decode pin id and mux from pin function id got from device tree*/</div><div class='add'>+static int imx_pinctrl_get_pin_id_and_mux(const struct imx_pinctrl_soc_info *info,</div><div class='add'>+				unsigned int pin_func_id, unsigned int *pin_id,</div><div class='add'>+				unsigned int *mux)</div><div class='add'>+{</div><div class='add'>+	if (pin_func_id &gt; info-&gt;npin_regs)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*pin_id = info-&gt;pin_regs[pin_func_id].pid;</div><div class='add'>+	*mux = info-&gt;pin_regs[pin_func_id].mux_mode;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit imx_pinctrl_parse_groups(struct device_node *np,</div><div class='add'>+				struct imx_pin_group *grp,</div><div class='add'>+				struct imx_pinctrl_soc_info *info,</div><div class='add'>+				u32 index)</div><div class='add'>+{</div><div class='add'>+	unsigned int pin_func_id;</div><div class='add'>+	int ret, size;</div><div class='add'>+	const const __be32 *list;</div><div class='add'>+	int i, j;</div><div class='add'>+	u32 config;</div><div class='add'>+</div><div class='add'>+	dev_dbg(info-&gt;dev, "group(%d): %s\n", index, np-&gt;name);</div><div class='add'>+</div><div class='add'>+	/* Initialise group */</div><div class='add'>+	grp-&gt;name = np-&gt;name;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * the binding format is fsl,pins = &lt;PIN_FUNC_ID CONFIG ...&gt;,</div><div class='add'>+	 * do sanity check and calculate pins number</div><div class='add'>+	 */</div><div class='add'>+	list = of_get_property(np, "fsl,pins", &amp;size);</div><div class='add'>+	/* we do not check return since it's safe node passed down */</div><div class='add'>+	size /= sizeof(*list);</div><div class='add'>+	if (!size || size % 2) {</div><div class='add'>+		dev_err(info-&gt;dev, "wrong pins number or pins and configs should be pairs\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	grp-&gt;npins = size / 2;</div><div class='add'>+	grp-&gt;pins = devm_kzalloc(info-&gt;dev, grp-&gt;npins * sizeof(unsigned int),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	grp-&gt;mux_mode = devm_kzalloc(info-&gt;dev, grp-&gt;npins * sizeof(unsigned int),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	grp-&gt;configs = devm_kzalloc(info-&gt;dev, grp-&gt;npins * sizeof(unsigned long),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	for (i = 0, j = 0; i &lt; size; i += 2, j++) {</div><div class='add'>+		pin_func_id = be32_to_cpu(*list++);</div><div class='add'>+		ret = imx_pinctrl_get_pin_id_and_mux(info, pin_func_id,</div><div class='add'>+					&amp;grp-&gt;pins[j], &amp;grp-&gt;mux_mode[j]);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(info-&gt;dev, "get invalid pin function id\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		/* SION bit is in mux register */</div><div class='add'>+		config = be32_to_cpu(*list++);</div><div class='add'>+		if (config &amp; IMX_PAD_SION)</div><div class='add'>+			grp-&gt;mux_mode[j] |= IOMUXC_CONFIG_SION;</div><div class='add'>+		grp-&gt;configs[j] = config &amp; ~IMX_PAD_SION;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#ifdef DEBUG</div><div class='add'>+	IMX_PMX_DUMP(info, grp-&gt;pins, grp-&gt;mux_mode, grp-&gt;configs, grp-&gt;npins);</div><div class='add'>+#endif</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit imx_pinctrl_parse_functions(struct device_node *np,</div><div class='add'>+			struct imx_pinctrl_soc_info *info, u32 index)</div><div class='add'>+{</div><div class='add'>+	struct device_node *child;</div><div class='add'>+	struct imx_pmx_func *func;</div><div class='add'>+	struct imx_pin_group *grp;</div><div class='add'>+	int ret;</div><div class='add'>+	static u32 grp_index;</div><div class='add'>+	u32 i = 0;</div><div class='add'>+</div><div class='add'>+	dev_dbg(info-&gt;dev, "parse function(%d): %s\n", index, np-&gt;name);</div><div class='add'>+</div><div class='add'>+	func = &amp;info-&gt;functions[index];</div><div class='add'>+</div><div class='add'>+	/* Initialise function */</div><div class='add'>+	func-&gt;name = np-&gt;name;</div><div class='add'>+	func-&gt;num_groups = of_get_child_count(np);</div><div class='add'>+	if (func-&gt;num_groups &lt;= 0) {</div><div class='add'>+		dev_err(info-&gt;dev, "no groups defined\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	func-&gt;groups = devm_kzalloc(info-&gt;dev,</div><div class='add'>+			func-&gt;num_groups * sizeof(char *), GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	for_each_child_of_node(np, child) {</div><div class='add'>+		func-&gt;groups[i] = child-&gt;name;</div><div class='add'>+		grp = &amp;info-&gt;groups[grp_index++];</div><div class='add'>+		ret = imx_pinctrl_parse_groups(child, grp, info, i++);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit imx_pinctrl_probe_dt(struct platform_device *pdev,</div><div class='add'>+				struct imx_pinctrl_soc_info *info)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct device_node *child;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 nfuncs = 0;</div><div class='add'>+	u32 i = 0;</div><div class='add'>+</div><div class='add'>+	if (!np)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	nfuncs = of_get_child_count(np);</div><div class='add'>+	if (nfuncs &lt;= 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "no functions defined\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info-&gt;nfunctions = nfuncs;</div><div class='add'>+	info-&gt;functions = devm_kzalloc(&amp;pdev-&gt;dev, nfuncs * sizeof(struct imx_pmx_func),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!info-&gt;functions)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	info-&gt;ngroups = 0;</div><div class='add'>+	for_each_child_of_node(np, child)</div><div class='add'>+		info-&gt;ngroups += of_get_child_count(child);</div><div class='add'>+	info-&gt;groups = devm_kzalloc(&amp;pdev-&gt;dev, info-&gt;ngroups * sizeof(struct imx_pin_group),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!info-&gt;groups)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for_each_child_of_node(np, child) {</div><div class='add'>+		ret = imx_pinctrl_parse_functions(child, info, i++);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "failed to parse function\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __devinit imx_pinctrl_probe(struct platform_device *pdev,</div><div class='add'>+				struct imx_pinctrl_soc_info *info)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!info || !info-&gt;pins || !info-&gt;npins</div><div class='add'>+		  || !info-&gt;pin_regs || !info-&gt;npin_regs) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "wrong pinctrl info\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	info-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	/* Create state holders etc for this driver */</div><div class='add'>+	ipctl = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*ipctl), GFP_KERNEL);</div><div class='add'>+	if (!ipctl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	ipctl-&gt;base = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='add'>+	if (!ipctl-&gt;base)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	imx_pinctrl_desc.name = dev_name(&amp;pdev-&gt;dev);</div><div class='add'>+	imx_pinctrl_desc.pins = info-&gt;pins;</div><div class='add'>+	imx_pinctrl_desc.npins = info-&gt;npins;</div><div class='add'>+</div><div class='add'>+	ret = imx_pinctrl_probe_dt(pdev, info);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "fail to probe dt properties\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ipctl-&gt;info = info;</div><div class='add'>+	ipctl-&gt;dev = info-&gt;dev;</div><div class='add'>+	platform_set_drvdata(pdev, ipctl);</div><div class='add'>+	ipctl-&gt;pctl = pinctrl_register(&amp;imx_pinctrl_desc, &amp;pdev-&gt;dev, ipctl);</div><div class='add'>+	if (!ipctl-&gt;pctl) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "could not register IMX pinctrl driver\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev, "initialized IMX pinctrl driver\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __devexit imx_pinctrl_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct imx_pinctrl *ipctl = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	pinctrl_unregister(ipctl-&gt;pctl);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-imx.h b/drivers/pinctrl/pinctrl-imx.h<br/>new file mode 100644<br/>index 000000000000..9b65e7828f1d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-imx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx.h</a></div><div class='hunk'>@@ -0,0 +1,106 @@</div><div class='add'>+/*</div><div class='add'>+ * IMX pinmux core definitions</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright (C) 2012 Linaro Ltd.</div><div class='add'>+ *</div><div class='add'>+ * Author: Dong Aisheng &lt;dong.aisheng@linaro.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __DRIVERS_PINCTRL_IMX_H</div><div class='add'>+#define __DRIVERS_PINCTRL_IMX_H</div><div class='add'>+</div><div class='add'>+struct platform_device;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct imx_pin_group - describes an IMX pin group</div><div class='add'>+ * @name: the name of this specific pin group</div><div class='add'>+ * @pins: an array of discrete physical pins used in this group, taken</div><div class='add'>+ *	from the driver-local pin enumeration space</div><div class='add'>+ * @npins: the number of pins in this group array, i.e. the number of</div><div class='add'>+ *	elements in .pins so we can iterate over that array</div><div class='add'>+ * @mux_mode: the mux mode for each pin in this group. The size of this</div><div class='add'>+ *	array is the same as pins.</div><div class='add'>+ * @configs: the config for each pin in this group. The size of this</div><div class='add'>+ *	array is the same as pins.</div><div class='add'>+ */</div><div class='add'>+struct imx_pin_group {</div><div class='add'>+	const char *name;</div><div class='add'>+	unsigned int *pins;</div><div class='add'>+	unsigned npins;</div><div class='add'>+	unsigned int *mux_mode;</div><div class='add'>+	unsigned long *configs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct imx_pmx_func - describes IMX pinmux functions</div><div class='add'>+ * @name: the name of this specific function</div><div class='add'>+ * @groups: corresponding pin groups</div><div class='add'>+ * @num_groups: the number of groups</div><div class='add'>+ */</div><div class='add'>+struct imx_pmx_func {</div><div class='add'>+	const char *name;</div><div class='add'>+	const char **groups;</div><div class='add'>+	unsigned num_groups;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct imx_pin_reg - describe a pin reg map</div><div class='add'>+ * The last 3 members are used for select input setting</div><div class='add'>+ * @pid: pin id</div><div class='add'>+ * @mux_reg: mux register offset</div><div class='add'>+ * @conf_reg: config register offset</div><div class='add'>+ * @mux_mode: mux mode</div><div class='add'>+ * @input_reg: select input register offset for this mux if any</div><div class='add'>+ *  0 if no select input setting needed.</div><div class='add'>+ * @input_val: the value set to select input register</div><div class='add'>+ */</div><div class='add'>+struct imx_pin_reg {</div><div class='add'>+	u16 pid;</div><div class='add'>+	u16 mux_reg;</div><div class='add'>+	u16 conf_reg;</div><div class='add'>+	u8 mux_mode;</div><div class='add'>+	u16 input_reg;</div><div class='add'>+	u8 input_val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct imx_pinctrl_soc_info {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	const struct pinctrl_pin_desc *pins;</div><div class='add'>+	unsigned int npins;</div><div class='add'>+	const struct imx_pin_reg *pin_regs;</div><div class='add'>+	unsigned int npin_regs;</div><div class='add'>+	struct imx_pin_group *groups;</div><div class='add'>+	unsigned int ngroups;</div><div class='add'>+	struct imx_pmx_func *functions;</div><div class='add'>+	unsigned int nfunctions;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define NO_MUX		0x0</div><div class='add'>+#define NO_PAD		0x0</div><div class='add'>+</div><div class='add'>+#define IMX_PIN_REG(id, conf, mux, mode, input, val)	\</div><div class='add'>+	{						\</div><div class='add'>+		.pid = id,				\</div><div class='add'>+		.conf_reg = conf,			\</div><div class='add'>+		.mux_reg = mux,				\</div><div class='add'>+		.mux_mode  = mode,			\</div><div class='add'>+		.input_reg = input,			\</div><div class='add'>+		.input_val = val,			\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)</div><div class='add'>+</div><div class='add'>+#define PAD_CTL_MASK(len)	((1 &lt;&lt; len) - 1)</div><div class='add'>+#define IMX_MUX_MASK	0x7</div><div class='add'>+#define IOMUXC_CONFIG_SION	(0x1 &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+int imx_pinctrl_probe(struct platform_device *pdev,</div><div class='add'>+			struct imx_pinctrl_soc_info *info);</div><div class='add'>+int imx_pinctrl_remove(struct platform_device *pdev);</div><div class='add'>+#endif /* __DRIVERS_PINCTRL_IMX_H */</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-imx23.c b/drivers/pinctrl/pinctrl-imx23.c<br/>new file mode 100644<br/>index 000000000000..75d3eff94296<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-imx23.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx23.c</a></div><div class='hunk'>@@ -0,0 +1,305 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+#include "pinctrl-mxs.h"</div><div class='add'>+</div><div class='add'>+enum imx23_pin_enum {</div><div class='add'>+	GPMI_D00	= PINID(0, 0),</div><div class='add'>+	GPMI_D01	= PINID(0, 1),</div><div class='add'>+	GPMI_D02	= PINID(0, 2),</div><div class='add'>+	GPMI_D03	= PINID(0, 3),</div><div class='add'>+	GPMI_D04	= PINID(0, 4),</div><div class='add'>+	GPMI_D05	= PINID(0, 5),</div><div class='add'>+	GPMI_D06	= PINID(0, 6),</div><div class='add'>+	GPMI_D07	= PINID(0, 7),</div><div class='add'>+	GPMI_D08	= PINID(0, 8),</div><div class='add'>+	GPMI_D09	= PINID(0, 9),</div><div class='add'>+	GPMI_D10	= PINID(0, 10),</div><div class='add'>+	GPMI_D11	= PINID(0, 11),</div><div class='add'>+	GPMI_D12	= PINID(0, 12),</div><div class='add'>+	GPMI_D13	= PINID(0, 13),</div><div class='add'>+	GPMI_D14	= PINID(0, 14),</div><div class='add'>+	GPMI_D15	= PINID(0, 15),</div><div class='add'>+	GPMI_CLE	= PINID(0, 16),</div><div class='add'>+	GPMI_ALE	= PINID(0, 17),</div><div class='add'>+	GPMI_CE2N	= PINID(0, 18),</div><div class='add'>+	GPMI_RDY0	= PINID(0, 19),</div><div class='add'>+	GPMI_RDY1	= PINID(0, 20),</div><div class='add'>+	GPMI_RDY2	= PINID(0, 21),</div><div class='add'>+	GPMI_RDY3	= PINID(0, 22),</div><div class='add'>+	GPMI_WPN	= PINID(0, 23),</div><div class='add'>+	GPMI_WRN	= PINID(0, 24),</div><div class='add'>+	GPMI_RDN	= PINID(0, 25),</div><div class='add'>+	AUART1_CTS	= PINID(0, 26),</div><div class='add'>+	AUART1_RTS	= PINID(0, 27),</div><div class='add'>+	AUART1_RX	= PINID(0, 28),</div><div class='add'>+	AUART1_TX	= PINID(0, 29),</div><div class='add'>+	I2C_SCL		= PINID(0, 30),</div><div class='add'>+	I2C_SDA		= PINID(0, 31),</div><div class='add'>+	LCD_D00		= PINID(1, 0),</div><div class='add'>+	LCD_D01		= PINID(1, 1),</div><div class='add'>+	LCD_D02		= PINID(1, 2),</div><div class='add'>+	LCD_D03		= PINID(1, 3),</div><div class='add'>+	LCD_D04		= PINID(1, 4),</div><div class='add'>+	LCD_D05		= PINID(1, 5),</div><div class='add'>+	LCD_D06		= PINID(1, 6),</div><div class='add'>+	LCD_D07		= PINID(1, 7),</div><div class='add'>+	LCD_D08		= PINID(1, 8),</div><div class='add'>+	LCD_D09		= PINID(1, 9),</div><div class='add'>+	LCD_D10		= PINID(1, 10),</div><div class='add'>+	LCD_D11		= PINID(1, 11),</div><div class='add'>+	LCD_D12		= PINID(1, 12),</div><div class='add'>+	LCD_D13		= PINID(1, 13),</div><div class='add'>+	LCD_D14		= PINID(1, 14),</div><div class='add'>+	LCD_D15		= PINID(1, 15),</div><div class='add'>+	LCD_D16		= PINID(1, 16),</div><div class='add'>+	LCD_D17		= PINID(1, 17),</div><div class='add'>+	LCD_RESET	= PINID(1, 18),</div><div class='add'>+	LCD_RS		= PINID(1, 19),</div><div class='add'>+	LCD_WR		= PINID(1, 20),</div><div class='add'>+	LCD_CS		= PINID(1, 21),</div><div class='add'>+	LCD_DOTCK	= PINID(1, 22),</div><div class='add'>+	LCD_ENABLE	= PINID(1, 23),</div><div class='add'>+	LCD_HSYNC	= PINID(1, 24),</div><div class='add'>+	LCD_VSYNC	= PINID(1, 25),</div><div class='add'>+	PWM0		= PINID(1, 26),</div><div class='add'>+	PWM1		= PINID(1, 27),</div><div class='add'>+	PWM2		= PINID(1, 28),</div><div class='add'>+	PWM3		= PINID(1, 29),</div><div class='add'>+	PWM4		= PINID(1, 30),</div><div class='add'>+	SSP1_CMD	= PINID(2, 0),</div><div class='add'>+	SSP1_DETECT	= PINID(2, 1),</div><div class='add'>+	SSP1_DATA0	= PINID(2, 2),</div><div class='add'>+	SSP1_DATA1	= PINID(2, 3),</div><div class='add'>+	SSP1_DATA2	= PINID(2, 4),</div><div class='add'>+	SSP1_DATA3	= PINID(2, 5),</div><div class='add'>+	SSP1_SCK	= PINID(2, 6),</div><div class='add'>+	ROTARYA		= PINID(2, 7),</div><div class='add'>+	ROTARYB		= PINID(2, 8),</div><div class='add'>+	EMI_A00		= PINID(2, 9),</div><div class='add'>+	EMI_A01		= PINID(2, 10),</div><div class='add'>+	EMI_A02		= PINID(2, 11),</div><div class='add'>+	EMI_A03		= PINID(2, 12),</div><div class='add'>+	EMI_A04		= PINID(2, 13),</div><div class='add'>+	EMI_A05		= PINID(2, 14),</div><div class='add'>+	EMI_A06		= PINID(2, 15),</div><div class='add'>+	EMI_A07		= PINID(2, 16),</div><div class='add'>+	EMI_A08		= PINID(2, 17),</div><div class='add'>+	EMI_A09		= PINID(2, 18),</div><div class='add'>+	EMI_A10		= PINID(2, 19),</div><div class='add'>+	EMI_A11		= PINID(2, 20),</div><div class='add'>+	EMI_A12		= PINID(2, 21),</div><div class='add'>+	EMI_BA0		= PINID(2, 22),</div><div class='add'>+	EMI_BA1		= PINID(2, 23),</div><div class='add'>+	EMI_CASN	= PINID(2, 24),</div><div class='add'>+	EMI_CE0N	= PINID(2, 25),</div><div class='add'>+	EMI_CE1N	= PINID(2, 26),</div><div class='add'>+	GPMI_CE1N	= PINID(2, 27),</div><div class='add'>+	GPMI_CE0N	= PINID(2, 28),</div><div class='add'>+	EMI_CKE		= PINID(2, 29),</div><div class='add'>+	EMI_RASN	= PINID(2, 30),</div><div class='add'>+	EMI_WEN		= PINID(2, 31),</div><div class='add'>+	EMI_D00		= PINID(3, 0),</div><div class='add'>+	EMI_D01		= PINID(3, 1),</div><div class='add'>+	EMI_D02		= PINID(3, 2),</div><div class='add'>+	EMI_D03		= PINID(3, 3),</div><div class='add'>+	EMI_D04		= PINID(3, 4),</div><div class='add'>+	EMI_D05		= PINID(3, 5),</div><div class='add'>+	EMI_D06		= PINID(3, 6),</div><div class='add'>+	EMI_D07		= PINID(3, 7),</div><div class='add'>+	EMI_D08		= PINID(3, 8),</div><div class='add'>+	EMI_D09		= PINID(3, 9),</div><div class='add'>+	EMI_D10		= PINID(3, 10),</div><div class='add'>+	EMI_D11		= PINID(3, 11),</div><div class='add'>+	EMI_D12		= PINID(3, 12),</div><div class='add'>+	EMI_D13		= PINID(3, 13),</div><div class='add'>+	EMI_D14		= PINID(3, 14),</div><div class='add'>+	EMI_D15		= PINID(3, 15),</div><div class='add'>+	EMI_DQM0	= PINID(3, 16),</div><div class='add'>+	EMI_DQM1	= PINID(3, 17),</div><div class='add'>+	EMI_DQS0	= PINID(3, 18),</div><div class='add'>+	EMI_DQS1	= PINID(3, 19),</div><div class='add'>+	EMI_CLK		= PINID(3, 20),</div><div class='add'>+	EMI_CLKN	= PINID(3, 21),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct pinctrl_pin_desc imx23_pins[] = {</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D00),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D01),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D02),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D03),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D04),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D05),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D06),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D07),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D08),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D09),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D10),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D11),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D12),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D13),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D14),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D15),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_CLE),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_ALE),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_CE2N),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_RDY0),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_RDY1),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_RDY2),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_RDY3),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_WPN),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_WRN),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_RDN),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART1_CTS),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART1_RTS),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART1_RX),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART1_TX),</div><div class='add'>+	MXS_PINCTRL_PIN(I2C_SCL),</div><div class='add'>+	MXS_PINCTRL_PIN(I2C_SDA),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D00),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D01),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D02),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D03),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D04),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D05),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D06),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D07),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D08),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D09),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D10),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D11),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D12),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D13),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D14),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D15),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D16),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D17),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_RESET),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_RS),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_WR),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_CS),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_DOTCK),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_ENABLE),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_HSYNC),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_VSYNC),</div><div class='add'>+	MXS_PINCTRL_PIN(PWM0),</div><div class='add'>+	MXS_PINCTRL_PIN(PWM1),</div><div class='add'>+	MXS_PINCTRL_PIN(PWM2),</div><div class='add'>+	MXS_PINCTRL_PIN(PWM3),</div><div class='add'>+	MXS_PINCTRL_PIN(PWM4),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP1_CMD),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP1_DETECT),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP1_DATA0),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP1_DATA1),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP1_DATA2),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP1_DATA3),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP1_SCK),</div><div class='add'>+	MXS_PINCTRL_PIN(ROTARYA),</div><div class='add'>+	MXS_PINCTRL_PIN(ROTARYB),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A00),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A01),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A02),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A03),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A04),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A05),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A06),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A07),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A08),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A09),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A10),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A11),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A12),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_BA0),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_BA1),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_CASN),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_CE0N),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_CE1N),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_CE1N),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_CE0N),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_CKE),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_RASN),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_WEN),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D00),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D01),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D02),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D03),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D04),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D05),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D06),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D07),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D08),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D09),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D10),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D11),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D12),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D13),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D14),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D15),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_DQM0),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_DQM1),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_DQS0),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_DQS1),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_CLK),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_CLKN),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mxs_regs imx23_regs = {</div><div class='add'>+	.muxsel = 0x100,</div><div class='add'>+	.drive = 0x200,</div><div class='add'>+	.pull = 0x400,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mxs_pinctrl_soc_data imx23_pinctrl_data = {</div><div class='add'>+	.regs = &amp;imx23_regs,</div><div class='add'>+	.pins = imx23_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(imx23_pins),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit imx23_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return mxs_pinctrl_probe(pdev, &amp;imx23_pinctrl_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct of_device_id imx23_pinctrl_of_match[] __devinitdata = {</div><div class='add'>+	{ .compatible = "fsl,imx23-pinctrl", },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, imx23_pinctrl_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver imx23_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "imx23-pinctrl",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = imx23_pinctrl_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = imx23_pinctrl_probe,</div><div class='add'>+	.remove = __devexit_p(mxs_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init imx23_pinctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;imx23_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(imx23_pinctrl_init);</div><div class='add'>+</div><div class='add'>+static void __exit imx23_pinctrl_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;imx23_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(imx23_pinctrl_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Shawn Guo &lt;shawn.guo@linaro.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Freescale i.MX23 pinctrl driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-imx28.c b/drivers/pinctrl/pinctrl-imx28.c<br/>new file mode 100644<br/>index 000000000000..b973026811a2<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-imx28.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx28.c</a></div><div class='hunk'>@@ -0,0 +1,421 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+#include "pinctrl-mxs.h"</div><div class='add'>+</div><div class='add'>+enum imx28_pin_enum {</div><div class='add'>+	GPMI_D00	= PINID(0, 0),</div><div class='add'>+	GPMI_D01	= PINID(0, 1),</div><div class='add'>+	GPMI_D02	= PINID(0, 2),</div><div class='add'>+	GPMI_D03	= PINID(0, 3),</div><div class='add'>+	GPMI_D04	= PINID(0, 4),</div><div class='add'>+	GPMI_D05	= PINID(0, 5),</div><div class='add'>+	GPMI_D06	= PINID(0, 6),</div><div class='add'>+	GPMI_D07	= PINID(0, 7),</div><div class='add'>+	GPMI_CE0N	= PINID(0, 16),</div><div class='add'>+	GPMI_CE1N	= PINID(0, 17),</div><div class='add'>+	GPMI_CE2N	= PINID(0, 18),</div><div class='add'>+	GPMI_CE3N	= PINID(0, 19),</div><div class='add'>+	GPMI_RDY0	= PINID(0, 20),</div><div class='add'>+	GPMI_RDY1	= PINID(0, 21),</div><div class='add'>+	GPMI_RDY2	= PINID(0, 22),</div><div class='add'>+	GPMI_RDY3	= PINID(0, 23),</div><div class='add'>+	GPMI_RDN	= PINID(0, 24),</div><div class='add'>+	GPMI_WRN	= PINID(0, 25),</div><div class='add'>+	GPMI_ALE	= PINID(0, 26),</div><div class='add'>+	GPMI_CLE	= PINID(0, 27),</div><div class='add'>+	GPMI_RESETN	= PINID(0, 28),</div><div class='add'>+	LCD_D00		= PINID(1, 0),</div><div class='add'>+	LCD_D01		= PINID(1, 1),</div><div class='add'>+	LCD_D02		= PINID(1, 2),</div><div class='add'>+	LCD_D03		= PINID(1, 3),</div><div class='add'>+	LCD_D04		= PINID(1, 4),</div><div class='add'>+	LCD_D05		= PINID(1, 5),</div><div class='add'>+	LCD_D06		= PINID(1, 6),</div><div class='add'>+	LCD_D07		= PINID(1, 7),</div><div class='add'>+	LCD_D08		= PINID(1, 8),</div><div class='add'>+	LCD_D09		= PINID(1, 9),</div><div class='add'>+	LCD_D10		= PINID(1, 10),</div><div class='add'>+	LCD_D11		= PINID(1, 11),</div><div class='add'>+	LCD_D12		= PINID(1, 12),</div><div class='add'>+	LCD_D13		= PINID(1, 13),</div><div class='add'>+	LCD_D14		= PINID(1, 14),</div><div class='add'>+	LCD_D15		= PINID(1, 15),</div><div class='add'>+	LCD_D16		= PINID(1, 16),</div><div class='add'>+	LCD_D17		= PINID(1, 17),</div><div class='add'>+	LCD_D18		= PINID(1, 18),</div><div class='add'>+	LCD_D19		= PINID(1, 19),</div><div class='add'>+	LCD_D20		= PINID(1, 20),</div><div class='add'>+	LCD_D21		= PINID(1, 21),</div><div class='add'>+	LCD_D22		= PINID(1, 22),</div><div class='add'>+	LCD_D23		= PINID(1, 23),</div><div class='add'>+	LCD_RD_E	= PINID(1, 24),</div><div class='add'>+	LCD_WR_RWN	= PINID(1, 25),</div><div class='add'>+	LCD_RS		= PINID(1, 26),</div><div class='add'>+	LCD_CS		= PINID(1, 27),</div><div class='add'>+	LCD_VSYNC	= PINID(1, 28),</div><div class='add'>+	LCD_HSYNC	= PINID(1, 29),</div><div class='add'>+	LCD_DOTCLK	= PINID(1, 30),</div><div class='add'>+	LCD_ENABLE	= PINID(1, 31),</div><div class='add'>+	SSP0_DATA0	= PINID(2, 0),</div><div class='add'>+	SSP0_DATA1	= PINID(2, 1),</div><div class='add'>+	SSP0_DATA2	= PINID(2, 2),</div><div class='add'>+	SSP0_DATA3	= PINID(2, 3),</div><div class='add'>+	SSP0_DATA4	= PINID(2, 4),</div><div class='add'>+	SSP0_DATA5	= PINID(2, 5),</div><div class='add'>+	SSP0_DATA6	= PINID(2, 6),</div><div class='add'>+	SSP0_DATA7	= PINID(2, 7),</div><div class='add'>+	SSP0_CMD	= PINID(2, 8),</div><div class='add'>+	SSP0_DETECT	= PINID(2, 9),</div><div class='add'>+	SSP0_SCK	= PINID(2, 10),</div><div class='add'>+	SSP1_SCK	= PINID(2, 12),</div><div class='add'>+	SSP1_CMD	= PINID(2, 13),</div><div class='add'>+	SSP1_DATA0	= PINID(2, 14),</div><div class='add'>+	SSP1_DATA3	= PINID(2, 15),</div><div class='add'>+	SSP2_SCK	= PINID(2, 16),</div><div class='add'>+	SSP2_MOSI	= PINID(2, 17),</div><div class='add'>+	SSP2_MISO	= PINID(2, 18),</div><div class='add'>+	SSP2_SS0	= PINID(2, 19),</div><div class='add'>+	SSP2_SS1	= PINID(2, 20),</div><div class='add'>+	SSP2_SS2	= PINID(2, 21),</div><div class='add'>+	SSP3_SCK	= PINID(2, 24),</div><div class='add'>+	SSP3_MOSI	= PINID(2, 25),</div><div class='add'>+	SSP3_MISO	= PINID(2, 26),</div><div class='add'>+	SSP3_SS0	= PINID(2, 27),</div><div class='add'>+	AUART0_RX	= PINID(3, 0),</div><div class='add'>+	AUART0_TX	= PINID(3, 1),</div><div class='add'>+	AUART0_CTS	= PINID(3, 2),</div><div class='add'>+	AUART0_RTS	= PINID(3, 3),</div><div class='add'>+	AUART1_RX	= PINID(3, 4),</div><div class='add'>+	AUART1_TX	= PINID(3, 5),</div><div class='add'>+	AUART1_CTS	= PINID(3, 6),</div><div class='add'>+	AUART1_RTS	= PINID(3, 7),</div><div class='add'>+	AUART2_RX	= PINID(3, 8),</div><div class='add'>+	AUART2_TX	= PINID(3, 9),</div><div class='add'>+	AUART2_CTS	= PINID(3, 10),</div><div class='add'>+	AUART2_RTS	= PINID(3, 11),</div><div class='add'>+	AUART3_RX	= PINID(3, 12),</div><div class='add'>+	AUART3_TX	= PINID(3, 13),</div><div class='add'>+	AUART3_CTS	= PINID(3, 14),</div><div class='add'>+	AUART3_RTS	= PINID(3, 15),</div><div class='add'>+	PWM0		= PINID(3, 16),</div><div class='add'>+	PWM1		= PINID(3, 17),</div><div class='add'>+	PWM2		= PINID(3, 18),</div><div class='add'>+	SAIF0_MCLK	= PINID(3, 20),</div><div class='add'>+	SAIF0_LRCLK	= PINID(3, 21),</div><div class='add'>+	SAIF0_BITCLK	= PINID(3, 22),</div><div class='add'>+	SAIF0_SDATA0	= PINID(3, 23),</div><div class='add'>+	I2C0_SCL	= PINID(3, 24),</div><div class='add'>+	I2C0_SDA	= PINID(3, 25),</div><div class='add'>+	SAIF1_SDATA0	= PINID(3, 26),</div><div class='add'>+	SPDIF		= PINID(3, 27),</div><div class='add'>+	PWM3		= PINID(3, 28),</div><div class='add'>+	PWM4		= PINID(3, 29),</div><div class='add'>+	LCD_RESET	= PINID(3, 30),</div><div class='add'>+	ENET0_MDC	= PINID(4, 0),</div><div class='add'>+	ENET0_MDIO	= PINID(4, 1),</div><div class='add'>+	ENET0_RX_EN	= PINID(4, 2),</div><div class='add'>+	ENET0_RXD0	= PINID(4, 3),</div><div class='add'>+	ENET0_RXD1	= PINID(4, 4),</div><div class='add'>+	ENET0_TX_CLK	= PINID(4, 5),</div><div class='add'>+	ENET0_TX_EN	= PINID(4, 6),</div><div class='add'>+	ENET0_TXD0	= PINID(4, 7),</div><div class='add'>+	ENET0_TXD1	= PINID(4, 8),</div><div class='add'>+	ENET0_RXD2	= PINID(4, 9),</div><div class='add'>+	ENET0_RXD3	= PINID(4, 10),</div><div class='add'>+	ENET0_TXD2	= PINID(4, 11),</div><div class='add'>+	ENET0_TXD3	= PINID(4, 12),</div><div class='add'>+	ENET0_RX_CLK	= PINID(4, 13),</div><div class='add'>+	ENET0_COL	= PINID(4, 14),</div><div class='add'>+	ENET0_CRS	= PINID(4, 15),</div><div class='add'>+	ENET_CLK	= PINID(4, 16),</div><div class='add'>+	JTAG_RTCK	= PINID(4, 20),</div><div class='add'>+	EMI_D00		= PINID(5, 0),</div><div class='add'>+	EMI_D01		= PINID(5, 1),</div><div class='add'>+	EMI_D02		= PINID(5, 2),</div><div class='add'>+	EMI_D03		= PINID(5, 3),</div><div class='add'>+	EMI_D04		= PINID(5, 4),</div><div class='add'>+	EMI_D05		= PINID(5, 5),</div><div class='add'>+	EMI_D06		= PINID(5, 6),</div><div class='add'>+	EMI_D07		= PINID(5, 7),</div><div class='add'>+	EMI_D08		= PINID(5, 8),</div><div class='add'>+	EMI_D09		= PINID(5, 9),</div><div class='add'>+	EMI_D10		= PINID(5, 10),</div><div class='add'>+	EMI_D11		= PINID(5, 11),</div><div class='add'>+	EMI_D12		= PINID(5, 12),</div><div class='add'>+	EMI_D13		= PINID(5, 13),</div><div class='add'>+	EMI_D14		= PINID(5, 14),</div><div class='add'>+	EMI_D15		= PINID(5, 15),</div><div class='add'>+	EMI_ODT0	= PINID(5, 16),</div><div class='add'>+	EMI_DQM0	= PINID(5, 17),</div><div class='add'>+	EMI_ODT1	= PINID(5, 18),</div><div class='add'>+	EMI_DQM1	= PINID(5, 19),</div><div class='add'>+	EMI_DDR_OPEN_FB	= PINID(5, 20),</div><div class='add'>+	EMI_CLK		= PINID(5, 21),</div><div class='add'>+	EMI_DQS0	= PINID(5, 22),</div><div class='add'>+	EMI_DQS1	= PINID(5, 23),</div><div class='add'>+	EMI_DDR_OPEN	= PINID(5, 26),</div><div class='add'>+	EMI_A00		= PINID(6, 0),</div><div class='add'>+	EMI_A01		= PINID(6, 1),</div><div class='add'>+	EMI_A02		= PINID(6, 2),</div><div class='add'>+	EMI_A03		= PINID(6, 3),</div><div class='add'>+	EMI_A04		= PINID(6, 4),</div><div class='add'>+	EMI_A05		= PINID(6, 5),</div><div class='add'>+	EMI_A06		= PINID(6, 6),</div><div class='add'>+	EMI_A07		= PINID(6, 7),</div><div class='add'>+	EMI_A08		= PINID(6, 8),</div><div class='add'>+	EMI_A09		= PINID(6, 9),</div><div class='add'>+	EMI_A10		= PINID(6, 10),</div><div class='add'>+	EMI_A11		= PINID(6, 11),</div><div class='add'>+	EMI_A12		= PINID(6, 12),</div><div class='add'>+	EMI_A13		= PINID(6, 13),</div><div class='add'>+	EMI_A14		= PINID(6, 14),</div><div class='add'>+	EMI_BA0		= PINID(6, 16),</div><div class='add'>+	EMI_BA1		= PINID(6, 17),</div><div class='add'>+	EMI_BA2		= PINID(6, 18),</div><div class='add'>+	EMI_CASN	= PINID(6, 19),</div><div class='add'>+	EMI_RASN	= PINID(6, 20),</div><div class='add'>+	EMI_WEN		= PINID(6, 21),</div><div class='add'>+	EMI_CE0N	= PINID(6, 22),</div><div class='add'>+	EMI_CE1N	= PINID(6, 23),</div><div class='add'>+	EMI_CKE		= PINID(6, 24),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct pinctrl_pin_desc imx28_pins[] = {</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D00),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D01),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D02),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D03),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D04),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D05),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D06),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_D07),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_CE0N),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_CE1N),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_CE2N),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_CE3N),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_RDY0),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_RDY1),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_RDY2),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_RDY3),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_RDN),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_WRN),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_ALE),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_CLE),</div><div class='add'>+	MXS_PINCTRL_PIN(GPMI_RESETN),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D00),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D01),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D02),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D03),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D04),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D05),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D06),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D07),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D08),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D09),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D10),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D11),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D12),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D13),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D14),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D15),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D16),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D17),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D18),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D19),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D20),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D21),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D22),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_D23),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_RD_E),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_WR_RWN),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_RS),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_CS),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_VSYNC),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_HSYNC),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_DOTCLK),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_ENABLE),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP0_DATA0),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP0_DATA1),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP0_DATA2),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP0_DATA3),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP0_DATA4),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP0_DATA5),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP0_DATA6),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP0_DATA7),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP0_CMD),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP0_DETECT),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP0_SCK),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP1_SCK),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP1_CMD),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP1_DATA0),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP1_DATA3),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP2_SCK),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP2_MOSI),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP2_MISO),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP2_SS0),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP2_SS1),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP2_SS2),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP3_SCK),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP3_MOSI),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP3_MISO),</div><div class='add'>+	MXS_PINCTRL_PIN(SSP3_SS0),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART0_RX),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART0_TX),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART0_CTS),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART0_RTS),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART1_RX),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART1_TX),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART1_CTS),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART1_RTS),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART2_RX),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART2_TX),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART2_CTS),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART2_RTS),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART3_RX),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART3_TX),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART3_CTS),</div><div class='add'>+	MXS_PINCTRL_PIN(AUART3_RTS),</div><div class='add'>+	MXS_PINCTRL_PIN(PWM0),</div><div class='add'>+	MXS_PINCTRL_PIN(PWM1),</div><div class='add'>+	MXS_PINCTRL_PIN(PWM2),</div><div class='add'>+	MXS_PINCTRL_PIN(SAIF0_MCLK),</div><div class='add'>+	MXS_PINCTRL_PIN(SAIF0_LRCLK),</div><div class='add'>+	MXS_PINCTRL_PIN(SAIF0_BITCLK),</div><div class='add'>+	MXS_PINCTRL_PIN(SAIF0_SDATA0),</div><div class='add'>+	MXS_PINCTRL_PIN(I2C0_SCL),</div><div class='add'>+	MXS_PINCTRL_PIN(I2C0_SDA),</div><div class='add'>+	MXS_PINCTRL_PIN(SAIF1_SDATA0),</div><div class='add'>+	MXS_PINCTRL_PIN(SPDIF),</div><div class='add'>+	MXS_PINCTRL_PIN(PWM3),</div><div class='add'>+	MXS_PINCTRL_PIN(PWM4),</div><div class='add'>+	MXS_PINCTRL_PIN(LCD_RESET),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_MDC),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_MDIO),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_RX_EN),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_RXD0),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_RXD1),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_TX_CLK),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_TX_EN),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_TXD0),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_TXD1),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_RXD2),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_RXD3),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_TXD2),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_TXD3),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_RX_CLK),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_COL),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET0_CRS),</div><div class='add'>+	MXS_PINCTRL_PIN(ENET_CLK),</div><div class='add'>+	MXS_PINCTRL_PIN(JTAG_RTCK),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D00),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D01),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D02),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D03),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D04),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D05),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D06),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D07),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D08),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D09),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D10),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D11),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D12),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D13),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D14),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_D15),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_ODT0),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_DQM0),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_ODT1),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_DQM1),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_DDR_OPEN_FB),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_CLK),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_DQS0),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_DQS1),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_DDR_OPEN),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A00),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A01),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A02),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A03),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A04),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A05),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A06),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A07),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A08),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A09),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A10),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A11),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A12),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A13),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_A14),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_BA0),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_BA1),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_BA2),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_CASN),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_RASN),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_WEN),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_CE0N),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_CE1N),</div><div class='add'>+	MXS_PINCTRL_PIN(EMI_CKE),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mxs_regs imx28_regs = {</div><div class='add'>+	.muxsel = 0x100,</div><div class='add'>+	.drive = 0x300,</div><div class='add'>+	.pull = 0x600,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mxs_pinctrl_soc_data imx28_pinctrl_data = {</div><div class='add'>+	.regs = &amp;imx28_regs,</div><div class='add'>+	.pins = imx28_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(imx28_pins),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit imx28_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return mxs_pinctrl_probe(pdev, &amp;imx28_pinctrl_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct of_device_id imx28_pinctrl_of_match[] __devinitdata = {</div><div class='add'>+	{ .compatible = "fsl,imx28-pinctrl", },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, imx28_pinctrl_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver imx28_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "imx28-pinctrl",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = imx28_pinctrl_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = imx28_pinctrl_probe,</div><div class='add'>+	.remove = __devexit_p(mxs_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init imx28_pinctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;imx28_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(imx28_pinctrl_init);</div><div class='add'>+</div><div class='add'>+static void __exit imx28_pinctrl_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;imx28_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(imx28_pinctrl_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Shawn Guo &lt;shawn.guo@linaro.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Freescale i.MX28 pinctrl driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-imx51.c b/drivers/pinctrl/pinctrl-imx51.c<br/>new file mode 100644<br/>index 000000000000..689b3c88dd2e<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-imx51.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx51.c</a></div><div class='hunk'>@@ -0,0 +1,1322 @@</div><div class='add'>+/*</div><div class='add'>+ * imx51 pinctrl driver based on imx pinmux core</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright (C) 2012 Linaro, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Author: Dong Aisheng &lt;dong.aisheng@linaro.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+#include "pinctrl-imx.h"</div><div class='add'>+</div><div class='add'>+enum imx51_pads {</div><div class='add'>+	MX51_PAD_EIM_D16 = 1,</div><div class='add'>+	MX51_PAD_EIM_D17 = 2,</div><div class='add'>+	MX51_PAD_EIM_D18 = 3,</div><div class='add'>+	MX51_PAD_EIM_D19 = 4,</div><div class='add'>+	MX51_PAD_EIM_D20 = 5,</div><div class='add'>+	MX51_PAD_EIM_D21 = 6,</div><div class='add'>+	MX51_PAD_EIM_D22 = 7,</div><div class='add'>+	MX51_PAD_EIM_D23 = 8,</div><div class='add'>+	MX51_PAD_EIM_D24 = 9,</div><div class='add'>+	MX51_PAD_EIM_D25 = 10,</div><div class='add'>+	MX51_PAD_EIM_D26 = 11,</div><div class='add'>+	MX51_PAD_EIM_D27 = 12,</div><div class='add'>+	MX51_PAD_EIM_D28 = 13,</div><div class='add'>+	MX51_PAD_EIM_D29 = 14,</div><div class='add'>+	MX51_PAD_EIM_D30 = 15,</div><div class='add'>+	MX51_PAD_EIM_D31 = 16,</div><div class='add'>+	MX51_PAD_EIM_A16 = 17,</div><div class='add'>+	MX51_PAD_EIM_A17 = 18,</div><div class='add'>+	MX51_PAD_EIM_A18 = 19,</div><div class='add'>+	MX51_PAD_EIM_A19 = 20,</div><div class='add'>+	MX51_PAD_EIM_A20 = 21,</div><div class='add'>+	MX51_PAD_EIM_A21 = 22,</div><div class='add'>+	MX51_PAD_EIM_A22 = 23,</div><div class='add'>+	MX51_PAD_EIM_A23 = 24,</div><div class='add'>+	MX51_PAD_EIM_A24 = 25,</div><div class='add'>+	MX51_PAD_EIM_A25 = 26,</div><div class='add'>+	MX51_PAD_EIM_A26 = 27,</div><div class='add'>+	MX51_PAD_EIM_A27 = 28,</div><div class='add'>+	MX51_PAD_EIM_EB0 = 29,</div><div class='add'>+	MX51_PAD_EIM_EB1 = 30,</div><div class='add'>+	MX51_PAD_EIM_EB2 = 31,</div><div class='add'>+	MX51_PAD_EIM_EB3 = 32,</div><div class='add'>+	MX51_PAD_EIM_OE = 33,</div><div class='add'>+	MX51_PAD_EIM_CS0 = 34,</div><div class='add'>+	MX51_PAD_EIM_CS1 = 35,</div><div class='add'>+	MX51_PAD_EIM_CS2 = 36,</div><div class='add'>+	MX51_PAD_EIM_CS3 = 37,</div><div class='add'>+	MX51_PAD_EIM_CS4 = 38,</div><div class='add'>+	MX51_PAD_EIM_CS5 = 39,</div><div class='add'>+	MX51_PAD_EIM_DTACK = 40,</div><div class='add'>+	MX51_PAD_EIM_LBA = 41,</div><div class='add'>+	MX51_PAD_EIM_CRE = 42,</div><div class='add'>+	MX51_PAD_DRAM_CS1 = 43,</div><div class='add'>+	MX51_PAD_NANDF_WE_B = 44,</div><div class='add'>+	MX51_PAD_NANDF_RE_B = 45,</div><div class='add'>+	MX51_PAD_NANDF_ALE = 46,</div><div class='add'>+	MX51_PAD_NANDF_CLE = 47,</div><div class='add'>+	MX51_PAD_NANDF_WP_B = 48,</div><div class='add'>+	MX51_PAD_NANDF_RB0 = 49,</div><div class='add'>+	MX51_PAD_NANDF_RB1 = 50,</div><div class='add'>+	MX51_PAD_NANDF_RB2 = 51,</div><div class='add'>+	MX51_PAD_NANDF_RB3 = 52,</div><div class='add'>+	MX51_PAD_GPIO_NAND = 53,</div><div class='add'>+	MX51_PAD_NANDF_CS0 = 54,</div><div class='add'>+	MX51_PAD_NANDF_CS1 = 55,</div><div class='add'>+	MX51_PAD_NANDF_CS2 = 56,</div><div class='add'>+	MX51_PAD_NANDF_CS3 = 57,</div><div class='add'>+	MX51_PAD_NANDF_CS4 = 58,</div><div class='add'>+	MX51_PAD_NANDF_CS5 = 59,</div><div class='add'>+	MX51_PAD_NANDF_CS6 = 60,</div><div class='add'>+	MX51_PAD_NANDF_CS7 = 61,</div><div class='add'>+	MX51_PAD_NANDF_RDY_INT = 62,</div><div class='add'>+	MX51_PAD_NANDF_D15 = 63,</div><div class='add'>+	MX51_PAD_NANDF_D14 = 64,</div><div class='add'>+	MX51_PAD_NANDF_D13 = 65,</div><div class='add'>+	MX51_PAD_NANDF_D12 = 66,</div><div class='add'>+	MX51_PAD_NANDF_D11 = 67,</div><div class='add'>+	MX51_PAD_NANDF_D10 = 68,</div><div class='add'>+	MX51_PAD_NANDF_D9 = 69,</div><div class='add'>+	MX51_PAD_NANDF_D8 = 70,</div><div class='add'>+	MX51_PAD_NANDF_D7 = 71,</div><div class='add'>+	MX51_PAD_NANDF_D6 = 72,</div><div class='add'>+	MX51_PAD_NANDF_D5 = 73,</div><div class='add'>+	MX51_PAD_NANDF_D4 = 74,</div><div class='add'>+	MX51_PAD_NANDF_D3 = 75,</div><div class='add'>+	MX51_PAD_NANDF_D2 = 76,</div><div class='add'>+	MX51_PAD_NANDF_D1 = 77,</div><div class='add'>+	MX51_PAD_NANDF_D0 = 78,</div><div class='add'>+	MX51_PAD_CSI1_D8 = 79,</div><div class='add'>+	MX51_PAD_CSI1_D9 = 80,</div><div class='add'>+	MX51_PAD_CSI1_D10 = 81,</div><div class='add'>+	MX51_PAD_CSI1_D11 = 82,</div><div class='add'>+	MX51_PAD_CSI1_D12 = 83,</div><div class='add'>+	MX51_PAD_CSI1_D13 = 84,</div><div class='add'>+	MX51_PAD_CSI1_D14 = 85,</div><div class='add'>+	MX51_PAD_CSI1_D15 = 86,</div><div class='add'>+	MX51_PAD_CSI1_D16 = 87,</div><div class='add'>+	MX51_PAD_CSI1_D17 = 88,</div><div class='add'>+	MX51_PAD_CSI1_D18 = 89,</div><div class='add'>+	MX51_PAD_CSI1_D19 = 90,</div><div class='add'>+	MX51_PAD_CSI1_VSYNC = 91,</div><div class='add'>+	MX51_PAD_CSI1_HSYNC = 92,</div><div class='add'>+	MX51_PAD_CSI1_PIXCLK = 93,</div><div class='add'>+	MX51_PAD_CSI1_MCLK = 94,</div><div class='add'>+	MX51_PAD_CSI2_D12 = 95,</div><div class='add'>+	MX51_PAD_CSI2_D13 = 96,</div><div class='add'>+	MX51_PAD_CSI2_D14 = 97,</div><div class='add'>+	MX51_PAD_CSI2_D15 = 98,</div><div class='add'>+	MX51_PAD_CSI2_D16 = 99,</div><div class='add'>+	MX51_PAD_CSI2_D17 = 100,</div><div class='add'>+	MX51_PAD_CSI2_D18 = 101,</div><div class='add'>+	MX51_PAD_CSI2_D19 = 102,</div><div class='add'>+	MX51_PAD_CSI2_VSYNC = 103,</div><div class='add'>+	MX51_PAD_CSI2_HSYNC = 104,</div><div class='add'>+	MX51_PAD_CSI2_PIXCLK = 105,</div><div class='add'>+	MX51_PAD_I2C1_CLK = 106,</div><div class='add'>+	MX51_PAD_I2C1_DAT = 107,</div><div class='add'>+	MX51_PAD_AUD3_BB_TXD = 108,</div><div class='add'>+	MX51_PAD_AUD3_BB_RXD = 109,</div><div class='add'>+	MX51_PAD_AUD3_BB_CK = 110,</div><div class='add'>+	MX51_PAD_AUD3_BB_FS = 111,</div><div class='add'>+	MX51_PAD_CSPI1_MOSI = 112,</div><div class='add'>+	MX51_PAD_CSPI1_MISO = 113,</div><div class='add'>+	MX51_PAD_CSPI1_SS0 = 114,</div><div class='add'>+	MX51_PAD_CSPI1_SS1 = 115,</div><div class='add'>+	MX51_PAD_CSPI1_RDY = 116,</div><div class='add'>+	MX51_PAD_CSPI1_SCLK = 117,</div><div class='add'>+	MX51_PAD_UART1_RXD = 118,</div><div class='add'>+	MX51_PAD_UART1_TXD = 119,</div><div class='add'>+	MX51_PAD_UART1_RTS = 120,</div><div class='add'>+	MX51_PAD_UART1_CTS = 121,</div><div class='add'>+	MX51_PAD_UART2_RXD = 122,</div><div class='add'>+	MX51_PAD_UART2_TXD = 123,</div><div class='add'>+	MX51_PAD_UART3_RXD = 124,</div><div class='add'>+	MX51_PAD_UART3_TXD = 125,</div><div class='add'>+	MX51_PAD_OWIRE_LINE = 126,</div><div class='add'>+	MX51_PAD_KEY_ROW0 = 127,</div><div class='add'>+	MX51_PAD_KEY_ROW1 = 128,</div><div class='add'>+	MX51_PAD_KEY_ROW2 = 129,</div><div class='add'>+	MX51_PAD_KEY_ROW3 = 130,</div><div class='add'>+	MX51_PAD_KEY_COL0 = 131,</div><div class='add'>+	MX51_PAD_KEY_COL1 = 132,</div><div class='add'>+	MX51_PAD_KEY_COL2 = 133,</div><div class='add'>+	MX51_PAD_KEY_COL3 = 134,</div><div class='add'>+	MX51_PAD_KEY_COL4 = 135,</div><div class='add'>+	MX51_PAD_KEY_COL5 = 136,</div><div class='add'>+	MX51_PAD_USBH1_CLK = 137,</div><div class='add'>+	MX51_PAD_USBH1_DIR = 138,</div><div class='add'>+	MX51_PAD_USBH1_STP = 139,</div><div class='add'>+	MX51_PAD_USBH1_NXT = 140,</div><div class='add'>+	MX51_PAD_USBH1_DATA0 = 141,</div><div class='add'>+	MX51_PAD_USBH1_DATA1 = 142,</div><div class='add'>+	MX51_PAD_USBH1_DATA2 = 143,</div><div class='add'>+	MX51_PAD_USBH1_DATA3 = 144,</div><div class='add'>+	MX51_PAD_USBH1_DATA4 = 145,</div><div class='add'>+	MX51_PAD_USBH1_DATA5 = 146,</div><div class='add'>+	MX51_PAD_USBH1_DATA6 = 147,</div><div class='add'>+	MX51_PAD_USBH1_DATA7 = 148,</div><div class='add'>+	MX51_PAD_DI1_PIN11 = 149,</div><div class='add'>+	MX51_PAD_DI1_PIN12 = 150,</div><div class='add'>+	MX51_PAD_DI1_PIN13 = 151,</div><div class='add'>+	MX51_PAD_DI1_D0_CS = 152,</div><div class='add'>+	MX51_PAD_DI1_D1_CS = 153,</div><div class='add'>+	MX51_PAD_DISPB2_SER_DIN = 154,</div><div class='add'>+	MX51_PAD_DISPB2_SER_DIO = 155,</div><div class='add'>+	MX51_PAD_DISPB2_SER_CLK = 156,</div><div class='add'>+	MX51_PAD_DISPB2_SER_RS = 157,</div><div class='add'>+	MX51_PAD_DISP1_DAT0 = 158,</div><div class='add'>+	MX51_PAD_DISP1_DAT1 = 159,</div><div class='add'>+	MX51_PAD_DISP1_DAT2 = 160,</div><div class='add'>+	MX51_PAD_DISP1_DAT3 = 161,</div><div class='add'>+	MX51_PAD_DISP1_DAT4 = 162,</div><div class='add'>+	MX51_PAD_DISP1_DAT5 = 163,</div><div class='add'>+	MX51_PAD_DISP1_DAT6 = 164,</div><div class='add'>+	MX51_PAD_DISP1_DAT7 = 165,</div><div class='add'>+	MX51_PAD_DISP1_DAT8 = 166,</div><div class='add'>+	MX51_PAD_DISP1_DAT9 = 167,</div><div class='add'>+	MX51_PAD_DISP1_DAT10 = 168,</div><div class='add'>+	MX51_PAD_DISP1_DAT11 = 169,</div><div class='add'>+	MX51_PAD_DISP1_DAT12 = 170,</div><div class='add'>+	MX51_PAD_DISP1_DAT13 = 171,</div><div class='add'>+	MX51_PAD_DISP1_DAT14 = 172,</div><div class='add'>+	MX51_PAD_DISP1_DAT15 = 173,</div><div class='add'>+	MX51_PAD_DISP1_DAT16 = 174,</div><div class='add'>+	MX51_PAD_DISP1_DAT17 = 175,</div><div class='add'>+	MX51_PAD_DISP1_DAT18 = 176,</div><div class='add'>+	MX51_PAD_DISP1_DAT19 = 177,</div><div class='add'>+	MX51_PAD_DISP1_DAT20 = 178,</div><div class='add'>+	MX51_PAD_DISP1_DAT21 = 179,</div><div class='add'>+	MX51_PAD_DISP1_DAT22 = 180,</div><div class='add'>+	MX51_PAD_DISP1_DAT23 = 181,</div><div class='add'>+	MX51_PAD_DI1_PIN3 = 182,</div><div class='add'>+	MX51_PAD_DI1_PIN2 = 183,</div><div class='add'>+	MX51_PAD_DI_GP2 = 184,</div><div class='add'>+	MX51_PAD_DI_GP3 = 185,</div><div class='add'>+	MX51_PAD_DI2_PIN4 = 186,</div><div class='add'>+	MX51_PAD_DI2_PIN2 = 187,</div><div class='add'>+	MX51_PAD_DI2_PIN3 = 188,</div><div class='add'>+	MX51_PAD_DI2_DISP_CLK = 189,</div><div class='add'>+	MX51_PAD_DI_GP4 = 190,</div><div class='add'>+	MX51_PAD_DISP2_DAT0 = 191,</div><div class='add'>+	MX51_PAD_DISP2_DAT1 = 192,</div><div class='add'>+	MX51_PAD_DISP2_DAT2 = 193,</div><div class='add'>+	MX51_PAD_DISP2_DAT3 = 194,</div><div class='add'>+	MX51_PAD_DISP2_DAT4 = 195,</div><div class='add'>+	MX51_PAD_DISP2_DAT5 = 196,</div><div class='add'>+	MX51_PAD_DISP2_DAT6 = 197,</div><div class='add'>+	MX51_PAD_DISP2_DAT7 = 198,</div><div class='add'>+	MX51_PAD_DISP2_DAT8 = 199,</div><div class='add'>+	MX51_PAD_DISP2_DAT9 = 200,</div><div class='add'>+	MX51_PAD_DISP2_DAT10 = 201,</div><div class='add'>+	MX51_PAD_DISP2_DAT11 = 202,</div><div class='add'>+	MX51_PAD_DISP2_DAT12 = 203,</div><div class='add'>+	MX51_PAD_DISP2_DAT13 = 204,</div><div class='add'>+	MX51_PAD_DISP2_DAT14 = 205,</div><div class='add'>+	MX51_PAD_DISP2_DAT15 = 206,</div><div class='add'>+	MX51_PAD_SD1_CMD = 207,</div><div class='add'>+	MX51_PAD_SD1_CLK = 208,</div><div class='add'>+	MX51_PAD_SD1_DATA0 = 209,</div><div class='add'>+	MX51_PAD_EIM_DA0 = 210,</div><div class='add'>+	MX51_PAD_EIM_DA1 = 211,</div><div class='add'>+	MX51_PAD_EIM_DA2 = 212,</div><div class='add'>+	MX51_PAD_EIM_DA3 = 213,</div><div class='add'>+	MX51_PAD_SD1_DATA1 = 214,</div><div class='add'>+	MX51_PAD_EIM_DA4 = 215,</div><div class='add'>+	MX51_PAD_EIM_DA5 = 216,</div><div class='add'>+	MX51_PAD_EIM_DA6 = 217,</div><div class='add'>+	MX51_PAD_EIM_DA7 = 218,</div><div class='add'>+	MX51_PAD_SD1_DATA2 = 219,</div><div class='add'>+	MX51_PAD_EIM_DA10 = 220,</div><div class='add'>+	MX51_PAD_EIM_DA11 = 221,</div><div class='add'>+	MX51_PAD_EIM_DA8 = 222,</div><div class='add'>+	MX51_PAD_EIM_DA9 = 223,</div><div class='add'>+	MX51_PAD_SD1_DATA3 = 224,</div><div class='add'>+	MX51_PAD_GPIO1_0 = 225,</div><div class='add'>+	MX51_PAD_GPIO1_1 = 226,</div><div class='add'>+	MX51_PAD_EIM_DA12 = 227,</div><div class='add'>+	MX51_PAD_EIM_DA13 = 228,</div><div class='add'>+	MX51_PAD_EIM_DA14 = 229,</div><div class='add'>+	MX51_PAD_EIM_DA15 = 230,</div><div class='add'>+	MX51_PAD_SD2_CMD = 231,</div><div class='add'>+	MX51_PAD_SD2_CLK = 232,</div><div class='add'>+	MX51_PAD_SD2_DATA0 = 233,</div><div class='add'>+	MX51_PAD_SD2_DATA1 = 234,</div><div class='add'>+	MX51_PAD_SD2_DATA2 = 235,</div><div class='add'>+	MX51_PAD_SD2_DATA3 = 236,</div><div class='add'>+	MX51_PAD_GPIO1_2 = 237,</div><div class='add'>+	MX51_PAD_GPIO1_3 = 238,</div><div class='add'>+	MX51_PAD_PMIC_INT_REQ = 239,</div><div class='add'>+	MX51_PAD_GPIO1_4 = 240,</div><div class='add'>+	MX51_PAD_GPIO1_5 = 241,</div><div class='add'>+	MX51_PAD_GPIO1_6 = 242,</div><div class='add'>+	MX51_PAD_GPIO1_7 = 243,</div><div class='add'>+	MX51_PAD_GPIO1_8 = 244,</div><div class='add'>+	MX51_PAD_GPIO1_9 = 245,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* imx51 register maps */</div><div class='add'>+static struct imx_pin_reg imx51_pin_regs[] = {</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D16, 0x3f0, 0x05c, 5, 0x000, 0), /* MX51_PAD_EIM_D16__AUD4_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D16, 0x3f0, 0x05c, 7, 0x8d8, 0), /* MX51_PAD_EIM_D16__AUD5_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D16, 0x3f0, 0x05c, 0, 0x000, 0), /* MX51_PAD_EIM_D16__EIM_D16 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D16, 0x3f0, 0x05c, 1, 0x000, 0), /* MX51_PAD_EIM_D16__GPIO2_0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D16, 0x3f0, 0x05c, 4, 0x9b4, 0), /* MX51_PAD_EIM_D16__I2C1_SDA */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D16, 0x3f0, 0x05c, 3, 0x000, 0), /* MX51_PAD_EIM_D16__UART2_CTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D16, 0x3f0, 0x05c, 2, 0x000, 0), /* MX51_PAD_EIM_D16__USBH2_DATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D17, 0x3f4, 0x060, 7, 0x8d4, 0), /* MX51_PAD_EIM_D17__AUD5_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D17, 0x3f4, 0x060, 0, 0x000, 0), /* MX51_PAD_EIM_D17__EIM_D17 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D17, 0x3f4, 0x060, 1, 0x000, 0), /* MX51_PAD_EIM_D17__GPIO2_1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D17, 0x3f4, 0x060, 3, 0x9ec, 0), /* MX51_PAD_EIM_D17__UART2_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D17, 0x3f4, 0x060, 4, 0x000, 0), /* MX51_PAD_EIM_D17__UART3_CTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D17, 0x3f4, 0x060, 2, 0x000, 0), /* MX51_PAD_EIM_D17__USBH2_DATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D18, 0x3f8, 0x064, 7, 0x8e4, 0), /* MX51_PAD_EIM_D18__AUD5_TXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D18, 0x3f8, 0x064, 0, 0x000, 0), /* MX51_PAD_EIM_D18__EIM_D18 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D18, 0x3f8, 0x064, 1, 0x000, 0), /* MX51_PAD_EIM_D18__GPIO2_2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D18, 0x3f8, 0x064, 3, 0x000, 0), /* MX51_PAD_EIM_D18__UART2_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D18, 0x3f8, 0x064, 4, 0x9f0, 1), /* MX51_PAD_EIM_D18__UART3_RTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D18, 0x3f8, 0x064, 2, 0x000, 0), /* MX51_PAD_EIM_D18__USBH2_DATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D19, 0x3fc, 0x068, 5, 0x000, 0), /* MX51_PAD_EIM_D19__AUD4_RXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D19, 0x3fc, 0x068, 7, 0x8e8, 0), /* MX51_PAD_EIM_D19__AUD5_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D19, 0x3fc, 0x068, 0, 0x000, 0), /* MX51_PAD_EIM_D19__EIM_D19 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D19, 0x3fc, 0x068, 1, 0x000, 0), /* MX51_PAD_EIM_D19__GPIO2_3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D19, 0x3fc, 0x068, 4, 0x9b0, 0), /* MX51_PAD_EIM_D19__I2C1_SCL */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D19, 0x3fc, 0x068, 3, 0x9e8, 1), /* MX51_PAD_EIM_D19__UART2_RTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D19, 0x3fc, 0x068, 2, 0x000, 0), /* MX51_PAD_EIM_D19__USBH2_DATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D20, 0x400, 0x06c, 5, 0x8c8, 0), /* MX51_PAD_EIM_D20__AUD4_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D20, 0x400, 0x06c, 0, 0x000, 0), /* MX51_PAD_EIM_D20__EIM_D20 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D20, 0x400, 0x06c, 1, 0x000, 0), /* MX51_PAD_EIM_D20__GPIO2_4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D20, 0x400, 0x06c, 4, 0x000, 0), /* MX51_PAD_EIM_D20__SRTC_ALARM_DEB */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D20, 0x400, 0x06c, 2, 0x000, 0), /* MX51_PAD_EIM_D20__USBH2_DATA4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D21, 0x404, 0x070, 5, 0x8c4, 0), /* MX51_PAD_EIM_D21__AUD4_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D21, 0x404, 0x070, 0, 0x000, 0), /* MX51_PAD_EIM_D21__EIM_D21 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D21, 0x404, 0x070, 1, 0x000, 0), /* MX51_PAD_EIM_D21__GPIO2_5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D21, 0x404, 0x070, 3, 0x000, 0), /* MX51_PAD_EIM_D21__SRTC_ALARM_DEB */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D21, 0x404, 0x070, 2, 0x000, 0), /* MX51_PAD_EIM_D21__USBH2_DATA5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D22, 0x408, 0x074, 5, 0x8cc, 0), /* MX51_PAD_EIM_D22__AUD4_TXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D22, 0x408, 0x074, 0, 0x000, 0), /* MX51_PAD_EIM_D22__EIM_D22 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D22, 0x408, 0x074, 1, 0x000, 0), /* MX51_PAD_EIM_D22__GPIO2_6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D22, 0x408, 0x074, 2, 0x000, 0), /* MX51_PAD_EIM_D22__USBH2_DATA6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D23, 0x40c, 0x078, 5, 0x8d0, 0), /* MX51_PAD_EIM_D23__AUD4_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D23, 0x40c, 0x078, 0, 0x000, 0), /* MX51_PAD_EIM_D23__EIM_D23 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D23, 0x40c, 0x078, 1, 0x000, 0), /* MX51_PAD_EIM_D23__GPIO2_7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D23, 0x40c, 0x078, 4, 0x000, 0), /* MX51_PAD_EIM_D23__SPDIF_OUT1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D23, 0x40c, 0x078, 2, 0x000, 0), /* MX51_PAD_EIM_D23__USBH2_DATA7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D24, 0x410, 0x07c, 5, 0x8f8, 0), /* MX51_PAD_EIM_D24__AUD6_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D24, 0x410, 0x07c, 0, 0x000, 0), /* MX51_PAD_EIM_D24__EIM_D24 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D24, 0x410, 0x07c, 1, 0x000, 0), /* MX51_PAD_EIM_D24__GPIO2_8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D24, 0x410, 0x07c, 4, 0x9bc, 0), /* MX51_PAD_EIM_D24__I2C2_SDA */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D24, 0x410, 0x07c, 3, 0x000, 0), /* MX51_PAD_EIM_D24__UART3_CTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D24, 0x410, 0x07c, 2, 0x000, 0), /* MX51_PAD_EIM_D24__USBOTG_DATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D25, 0x414, 0x080, 0, 0x000, 0), /* MX51_PAD_EIM_D25__EIM_D25 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D25, 0x414, 0x080, 1, 0x9c8, 0), /* MX51_PAD_EIM_D25__KEY_COL6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D25, 0x414, 0x080, 4, 0x000, 0), /* MX51_PAD_EIM_D25__UART2_CTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D25, 0x414, 0x080, 3, 0x9f4, 0), /* MX51_PAD_EIM_D25__UART3_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D25, 0x414, 0x080, 2, 0x000, 0), /* MX51_PAD_EIM_D25__USBOTG_DATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D26, 0x418, 0x084, 0, 0x000, 0), /* MX51_PAD_EIM_D26__EIM_D26 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D26, 0x418, 0x084, 1, 0x9cc, 0), /* MX51_PAD_EIM_D26__KEY_COL7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D26, 0x418, 0x084, 4, 0x9e8, 3), /* MX51_PAD_EIM_D26__UART2_RTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D26, 0x418, 0x084, 3, 0x000, 0), /* MX51_PAD_EIM_D26__UART3_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D26, 0x418, 0x084, 2, 0x000, 0), /* MX51_PAD_EIM_D26__USBOTG_DATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D27, 0x41c, 0x088, 5, 0x8f4, 0), /* MX51_PAD_EIM_D27__AUD6_RXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D27, 0x41c, 0x088, 0, 0x000, 0), /* MX51_PAD_EIM_D27__EIM_D27 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D27, 0x41c, 0x088, 1, 0x000, 0), /* MX51_PAD_EIM_D27__GPIO2_9 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D27, 0x41c, 0x088, 4, 0x9b8, 0), /* MX51_PAD_EIM_D27__I2C2_SCL */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D27, 0x41c, 0x088, 3, 0x9f0, 3), /* MX51_PAD_EIM_D27__UART3_RTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D27, 0x41c, 0x088, 2, 0x000, 0), /* MX51_PAD_EIM_D27__USBOTG_DATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D28, 0x420, 0x08c, 5, 0x8f0, 0), /* MX51_PAD_EIM_D28__AUD6_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D28, 0x420, 0x08c, 0, 0x000, 0), /* MX51_PAD_EIM_D28__EIM_D28 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D28, 0x420, 0x08c, 1, 0x9d0, 0), /* MX51_PAD_EIM_D28__KEY_ROW4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D28, 0x420, 0x08c, 2, 0x000, 0), /* MX51_PAD_EIM_D28__USBOTG_DATA4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D29, 0x424, 0x090, 5, 0x8ec, 0), /* MX51_PAD_EIM_D29__AUD6_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D29, 0x424, 0x090, 0, 0x000, 0), /* MX51_PAD_EIM_D29__EIM_D29 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D29, 0x424, 0x090, 1, 0x9d4, 0), /* MX51_PAD_EIM_D29__KEY_ROW5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D29, 0x424, 0x090, 2, 0x000, 0), /* MX51_PAD_EIM_D29__USBOTG_DATA5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D30, 0x428, 0x094, 5, 0x8fc, 0), /* MX51_PAD_EIM_D30__AUD6_TXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D30, 0x428, 0x094, 0, 0x000, 0), /* MX51_PAD_EIM_D30__EIM_D30 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D30, 0x428, 0x094, 1, 0x9d8, 0), /* MX51_PAD_EIM_D30__KEY_ROW6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D30, 0x428, 0x094, 2, 0x000, 0), /* MX51_PAD_EIM_D30__USBOTG_DATA6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D31, 0x42c, 0x098, 5, 0x900, 0), /* MX51_PAD_EIM_D31__AUD6_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D31, 0x42c, 0x098, 0, 0x000, 0), /* MX51_PAD_EIM_D31__EIM_D31 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D31, 0x42c, 0x098, 1, 0x9dc, 0), /* MX51_PAD_EIM_D31__KEY_ROW7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_D31, 0x42c, 0x098, 2, 0x000, 0), /* MX51_PAD_EIM_D31__USBOTG_DATA7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A16, 0x430, 0x09c, 0, 0x000, 0), /* MX51_PAD_EIM_A16__EIM_A16 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A16, 0x430, 0x09c, 1, 0x000, 0), /* MX51_PAD_EIM_A16__GPIO2_10 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A16, 0x430, 0x09c, 7, 0x000, 0), /* MX51_PAD_EIM_A16__OSC_FREQ_SEL0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A17, 0x434, 0x0a0, 0, 0x000, 0), /* MX51_PAD_EIM_A17__EIM_A17 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A17, 0x434, 0x0a0, 1, 0x000, 0), /* MX51_PAD_EIM_A17__GPIO2_11 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A17, 0x434, 0x0a0, 7, 0x000, 0), /* MX51_PAD_EIM_A17__OSC_FREQ_SEL1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A18, 0x438, 0x0a4, 7, 0x000, 0), /* MX51_PAD_EIM_A18__BOOT_LPB0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A18, 0x438, 0x0a4, 0, 0x000, 0), /* MX51_PAD_EIM_A18__EIM_A18 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A18, 0x438, 0x0a4, 1, 0x000, 0), /* MX51_PAD_EIM_A18__GPIO2_12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A19, 0x43c, 0x0a8, 7, 0x000, 0), /* MX51_PAD_EIM_A19__BOOT_LPB1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A19, 0x43c, 0x0a8, 0, 0x000, 0), /* MX51_PAD_EIM_A19__EIM_A19 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A19, 0x43c, 0x0a8, 1, 0x000, 0), /* MX51_PAD_EIM_A19__GPIO2_13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A20, 0x440, 0x0ac, 7, 0x000, 0), /* MX51_PAD_EIM_A20__BOOT_UART_SRC0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A20, 0x440, 0x0ac, 0, 0x000, 0), /* MX51_PAD_EIM_A20__EIM_A20 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A20, 0x440, 0x0ac, 1, 0x000, 0), /* MX51_PAD_EIM_A20__GPIO2_14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A21, 0x444, 0x0b0, 7, 0x000, 0), /* MX51_PAD_EIM_A21__BOOT_UART_SRC1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A21, 0x444, 0x0b0, 0, 0x000, 0), /* MX51_PAD_EIM_A21__EIM_A21 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A21, 0x444, 0x0b0, 1, 0x000, 0), /* MX51_PAD_EIM_A21__GPIO2_15 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A22, 0x448, 0x0b4, 0, 0x000, 0), /* MX51_PAD_EIM_A22__EIM_A22 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A22, 0x448, 0x0b4, 1, 0x000, 0), /* MX51_PAD_EIM_A22__GPIO2_16 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A23, 0x44c, 0x0b8, 7, 0x000, 0), /* MX51_PAD_EIM_A23__BOOT_HPN_EN */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A23, 0x44c, 0x0b8, 0, 0x000, 0), /* MX51_PAD_EIM_A23__EIM_A23 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A23, 0x44c, 0x0b8, 1, 0x000, 0), /* MX51_PAD_EIM_A23__GPIO2_17 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A24, 0x450, 0x0bc, 0, 0x000, 0), /* MX51_PAD_EIM_A24__EIM_A24 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A24, 0x450, 0x0bc, 1, 0x000, 0), /* MX51_PAD_EIM_A24__GPIO2_18 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A24, 0x450, 0x0bc, 2, 0x000, 0), /* MX51_PAD_EIM_A24__USBH2_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A25, 0x454, 0x0c0, 6, 0x000, 0), /* MX51_PAD_EIM_A25__DISP1_PIN4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A25, 0x454, 0x0c0, 0, 0x000, 0), /* MX51_PAD_EIM_A25__EIM_A25 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A25, 0x454, 0x0c0, 1, 0x000, 0), /* MX51_PAD_EIM_A25__GPIO2_19 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A25, 0x454, 0x0c0, 2, 0x000, 0), /* MX51_PAD_EIM_A25__USBH2_DIR */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A26, 0x458, 0x0c4, 5, 0x9a0, 0), /* MX51_PAD_EIM_A26__CSI1_DATA_EN */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A26, 0x458, 0x0c4, 6, 0x908, 0), /* MX51_PAD_EIM_A26__DISP2_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A26, 0x458, 0x0c4, 0, 0x000, 0), /* MX51_PAD_EIM_A26__EIM_A26 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A26, 0x458, 0x0c4, 1, 0x000, 0), /* MX51_PAD_EIM_A26__GPIO2_20 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A26, 0x458, 0x0c4, 2, 0x000, 0), /* MX51_PAD_EIM_A26__USBH2_STP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A27, 0x45c, 0x0c8, 5, 0x99c, 0), /* MX51_PAD_EIM_A27__CSI2_DATA_EN */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A27, 0x45c, 0x0c8, 6, 0x9a4, 0), /* MX51_PAD_EIM_A27__DISP1_PIN1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A27, 0x45c, 0x0c8, 0, 0x000, 0), /* MX51_PAD_EIM_A27__EIM_A27 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A27, 0x45c, 0x0c8, 1, 0x000, 0), /* MX51_PAD_EIM_A27__GPIO2_21 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_A27, 0x45c, 0x0c8, 2, 0x000, 0), /* MX51_PAD_EIM_A27__USBH2_NXT */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB0, 0x460, 0x0cc, 0, 0x000, 0), /* MX51_PAD_EIM_EB0__EIM_EB0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB1, 0x464, 0x0d0, 0, 0x000, 0), /* MX51_PAD_EIM_EB1__EIM_EB1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB2, 0x468, 0x0d4, 6, 0x8e0, 0), /* MX51_PAD_EIM_EB2__AUD5_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB2, 0x468, 0x0d4, 5, 0x000, 0), /* MX51_PAD_EIM_EB2__CSI1_D2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB2, 0x468, 0x0d4, 0, 0x000, 0), /* MX51_PAD_EIM_EB2__EIM_EB2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB2, 0x468, 0x0d4, 3, 0x954, 0), /* MX51_PAD_EIM_EB2__FEC_MDIO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB2, 0x468, 0x0d4, 1, 0x000, 0), /* MX51_PAD_EIM_EB2__GPIO2_22 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB2, 0x468, 0x0d4, 7, 0x000, 0), /* MX51_PAD_EIM_EB2__GPT_CMPOUT1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB3, 0x46c, 0x0d8, 6, 0x8dc, 0), /* MX51_PAD_EIM_EB3__AUD5_RXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB3, 0x46c, 0x0d8, 5, 0x000, 0), /* MX51_PAD_EIM_EB3__CSI1_D3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB3, 0x46c, 0x0d8, 0, 0x000, 0), /* MX51_PAD_EIM_EB3__EIM_EB3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB3, 0x46c, 0x0d8, 3, 0x95c, 0), /* MX51_PAD_EIM_EB3__FEC_RDATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB3, 0x46c, 0x0d8, 1, 0x000, 0), /* MX51_PAD_EIM_EB3__GPIO2_23 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_EB3, 0x46c, 0x0d8, 7, 0x000, 0), /* MX51_PAD_EIM_EB3__GPT_CMPOUT2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_OE, 0x470, 0x0dc, 0, 0x000, 0), /* MX51_PAD_EIM_OE__EIM_OE */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_OE, 0x470, 0x0dc, 1, 0x000, 0), /* MX51_PAD_EIM_OE__GPIO2_24 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS0, 0x474, 0x0e0, 0, 0x000, 0), /* MX51_PAD_EIM_CS0__EIM_CS0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS0, 0x474, 0x0e0, 1, 0x000, 0), /* MX51_PAD_EIM_CS0__GPIO2_25 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS1, 0x478, 0x0e4, 0, 0x000, 0), /* MX51_PAD_EIM_CS1__EIM_CS1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS1, 0x478, 0x0e4, 1, 0x000, 0), /* MX51_PAD_EIM_CS1__GPIO2_26 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS2, 0x47c, 0x0e8, 6, 0x8d8, 1), /* MX51_PAD_EIM_CS2__AUD5_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS2, 0x47c, 0x0e8, 5, 0x000, 0), /* MX51_PAD_EIM_CS2__CSI1_D4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS2, 0x47c, 0x0e8, 0, 0x000, 0), /* MX51_PAD_EIM_CS2__EIM_CS2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS2, 0x47c, 0x0e8, 3, 0x960, 0), /* MX51_PAD_EIM_CS2__FEC_RDATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS2, 0x47c, 0x0e8, 1, 0x000, 0), /* MX51_PAD_EIM_CS2__GPIO2_27 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS2, 0x47c, 0x0e8, 2, 0x000, 0), /* MX51_PAD_EIM_CS2__USBOTG_STP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS3, 0x480, 0x0ec, 6, 0x8d4, 1), /* MX51_PAD_EIM_CS3__AUD5_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS3, 0x480, 0x0ec, 5, 0x000, 0), /* MX51_PAD_EIM_CS3__CSI1_D5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS3, 0x480, 0x0ec, 0, 0x000, 0), /* MX51_PAD_EIM_CS3__EIM_CS3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS3, 0x480, 0x0ec, 3, 0x964, 0), /* MX51_PAD_EIM_CS3__FEC_RDATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS3, 0x480, 0x0ec, 1, 0x000, 0), /* MX51_PAD_EIM_CS3__GPIO2_28 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS3, 0x480, 0x0ec, 2, 0x000, 0), /* MX51_PAD_EIM_CS3__USBOTG_NXT */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS4, 0x484, 0x0f0, 6, 0x8e4, 1), /* MX51_PAD_EIM_CS4__AUD5_TXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS4, 0x484, 0x0f0, 5, 0x000, 0), /* MX51_PAD_EIM_CS4__CSI1_D6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS4, 0x484, 0x0f0, 0, 0x000, 0), /* MX51_PAD_EIM_CS4__EIM_CS4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS4, 0x484, 0x0f0, 3, 0x970, 0), /* MX51_PAD_EIM_CS4__FEC_RX_ER */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS4, 0x484, 0x0f0, 1, 0x000, 0), /* MX51_PAD_EIM_CS4__GPIO2_29 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS4, 0x484, 0x0f0, 2, 0x000, 0), /* MX51_PAD_EIM_CS4__USBOTG_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS5, 0x488, 0x0f4, 6, 0x8e8, 1), /* MX51_PAD_EIM_CS5__AUD5_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS5, 0x488, 0x0f4, 5, 0x000, 0), /* MX51_PAD_EIM_CS5__CSI1_D7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS5, 0x488, 0x0f4, 4, 0x904, 0), /* MX51_PAD_EIM_CS5__DISP1_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS5, 0x488, 0x0f4, 0, 0x000, 0), /* MX51_PAD_EIM_CS5__EIM_CS5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS5, 0x488, 0x0f4, 3, 0x950, 0), /* MX51_PAD_EIM_CS5__FEC_CRS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS5, 0x488, 0x0f4, 1, 0x000, 0), /* MX51_PAD_EIM_CS5__GPIO2_30 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CS5, 0x488, 0x0f4, 2, 0x000, 0), /* MX51_PAD_EIM_CS5__USBOTG_DIR */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DTACK, 0x48c, 0x0f8, 0, 0x000, 0), /* MX51_PAD_EIM_DTACK__EIM_DTACK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DTACK, 0x48c, 0x0f8, 1, 0x000, 0), /* MX51_PAD_EIM_DTACK__GPIO2_31 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_LBA, 0x494, 0x0fc, 0, 0x000, 0), /* MX51_PAD_EIM_LBA__EIM_LBA */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_LBA, 0x494, 0x0fc, 1, 0x978, 0), /* MX51_PAD_EIM_LBA__GPIO3_1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CRE, 0x4a0, 0x100, 0, 0x000, 0), /* MX51_PAD_EIM_CRE__EIM_CRE */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_CRE, 0x4a0, 0x100, 1, 0x97c, 0), /* MX51_PAD_EIM_CRE__GPIO3_2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DRAM_CS1, 0x4d0, 0x104, 0, 0x000, 0), /* MX51_PAD_DRAM_CS1__DRAM_CS1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_WE_B, 0x4e4, 0x108, 3, 0x980, 0), /* MX51_PAD_NANDF_WE_B__GPIO3_3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_WE_B, 0x4e4, 0x108, 0, 0x000, 0), /* MX51_PAD_NANDF_WE_B__NANDF_WE_B */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_WE_B, 0x4e4, 0x108, 1, 0x000, 0), /* MX51_PAD_NANDF_WE_B__PATA_DIOW */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_WE_B, 0x4e4, 0x108, 2, 0x93c, 0), /* MX51_PAD_NANDF_WE_B__SD3_DATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RE_B, 0x4e8, 0x10c, 3, 0x984, 0), /* MX51_PAD_NANDF_RE_B__GPIO3_4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RE_B, 0x4e8, 0x10c, 0, 0x000, 0), /* MX51_PAD_NANDF_RE_B__NANDF_RE_B */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RE_B, 0x4e8, 0x10c, 1, 0x000, 0), /* MX51_PAD_NANDF_RE_B__PATA_DIOR */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RE_B, 0x4e8, 0x10c, 2, 0x940, 0), /* MX51_PAD_NANDF_RE_B__SD3_DATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_ALE, 0x4ec, 0x110, 3, 0x988, 0), /* MX51_PAD_NANDF_ALE__GPIO3_5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_ALE, 0x4ec, 0x110, 0, 0x000, 0), /* MX51_PAD_NANDF_ALE__NANDF_ALE */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_ALE, 0x4ec, 0x110, 1, 0x000, 0), /* MX51_PAD_NANDF_ALE__PATA_BUFFER_EN */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CLE, 0x4f0, 0x114, 3, 0x98c, 0), /* MX51_PAD_NANDF_CLE__GPIO3_6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CLE, 0x4f0, 0x114, 0, 0x000, 0), /* MX51_PAD_NANDF_CLE__NANDF_CLE */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CLE, 0x4f0, 0x114, 1, 0x000, 0), /* MX51_PAD_NANDF_CLE__PATA_RESET_B */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_WP_B, 0x4f4, 0x118, 3, 0x990, 0), /* MX51_PAD_NANDF_WP_B__GPIO3_7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_WP_B, 0x4f4, 0x118, 0, 0x000, 0), /* MX51_PAD_NANDF_WP_B__NANDF_WP_B */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_WP_B, 0x4f4, 0x118, 1, 0x000, 0), /* MX51_PAD_NANDF_WP_B__PATA_DMACK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_WP_B, 0x4f4, 0x118, 2, 0x944, 0), /* MX51_PAD_NANDF_WP_B__SD3_DATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB0, 0x4f8, 0x11c, 5, 0x930, 0), /* MX51_PAD_NANDF_RB0__ECSPI2_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB0, 0x4f8, 0x11c, 3, 0x994, 0), /* MX51_PAD_NANDF_RB0__GPIO3_8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB0, 0x4f8, 0x11c, 0, 0x000, 0), /* MX51_PAD_NANDF_RB0__NANDF_RB0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB0, 0x4f8, 0x11c, 1, 0x000, 0), /* MX51_PAD_NANDF_RB0__PATA_DMARQ */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB0, 0x4f8, 0x11c, 2, 0x948, 0), /* MX51_PAD_NANDF_RB0__SD3_DATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB1, 0x4fc, 0x120, 6, 0x91c, 0), /* MX51_PAD_NANDF_RB1__CSPI_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB1, 0x4fc, 0x120, 2, 0x000, 0), /* MX51_PAD_NANDF_RB1__ECSPI2_RDY */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB1, 0x4fc, 0x120, 3, 0x000, 0), /* MX51_PAD_NANDF_RB1__GPIO3_9 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB1, 0x4fc, 0x120, 0, 0x000, 0), /* MX51_PAD_NANDF_RB1__NANDF_RB1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB1, 0x4fc, 0x120, 1, 0x000, 0), /* MX51_PAD_NANDF_RB1__PATA_IORDY */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB1, 0x4fc, 0x120, 5, 0x000, 0), /* MX51_PAD_NANDF_RB1__SD4_CMD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB2, 0x500, 0x124, 5, 0x9a8, 0), /* MX51_PAD_NANDF_RB2__DISP2_WAIT */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB2, 0x500, 0x124, 2, 0x000, 0), /* MX51_PAD_NANDF_RB2__ECSPI2_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB2, 0x500, 0x124, 1, 0x94c, 0), /* MX51_PAD_NANDF_RB2__FEC_COL */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB2, 0x500, 0x124, 3, 0x000, 0), /* MX51_PAD_NANDF_RB2__GPIO3_10 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB2, 0x500, 0x124, 0, 0x000, 0), /* MX51_PAD_NANDF_RB2__NANDF_RB2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB2, 0x500, 0x124, 7, 0x000, 0), /* MX51_PAD_NANDF_RB2__USBH3_H3_DP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB2, 0x500, 0x124, 6, 0xa20, 0), /* MX51_PAD_NANDF_RB2__USBH3_NXT */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB3, 0x504, 0x128, 5, 0x000, 0), /* MX51_PAD_NANDF_RB3__DISP1_WAIT */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB3, 0x504, 0x128, 2, 0x000, 0), /* MX51_PAD_NANDF_RB3__ECSPI2_MISO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB3, 0x504, 0x128, 1, 0x968, 0), /* MX51_PAD_NANDF_RB3__FEC_RX_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB3, 0x504, 0x128, 3, 0x000, 0), /* MX51_PAD_NANDF_RB3__GPIO3_11 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB3, 0x504, 0x128, 0, 0x000, 0), /* MX51_PAD_NANDF_RB3__NANDF_RB3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB3, 0x504, 0x128, 6, 0x9f8, 0), /* MX51_PAD_NANDF_RB3__USBH3_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RB3, 0x504, 0x128, 7, 0x000, 0), /* MX51_PAD_NANDF_RB3__USBH3_H3_DM */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO_NAND, 0x514, 0x12c, 0, 0x998, 0), /* MX51_PAD_GPIO_NAND__GPIO_NAND */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO_NAND, 0x514, 0x12c, 1, 0x000, 0), /* MX51_PAD_GPIO_NAND__PATA_INTRQ */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS0, 0x518, 0x130, 3, 0x000, 0), /* MX51_PAD_NANDF_CS0__GPIO3_16 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS0, 0x518, 0x130, 0, 0x000, 0), /* MX51_PAD_NANDF_CS0__NANDF_CS0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS1, 0x51c, 0x134, 3, 0x000, 0), /* MX51_PAD_NANDF_CS1__GPIO3_17 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS1, 0x51c, 0x134, 0, 0x000, 0), /* MX51_PAD_NANDF_CS1__NANDF_CS1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS2, 0x520, 0x138, 6, 0x914, 0), /* MX51_PAD_NANDF_CS2__CSPI_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS2, 0x520, 0x138, 2, 0x000, 0), /* MX51_PAD_NANDF_CS2__FEC_TX_ER */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS2, 0x520, 0x138, 3, 0x000, 0), /* MX51_PAD_NANDF_CS2__GPIO3_18 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS2, 0x520, 0x138, 0, 0x000, 0), /* MX51_PAD_NANDF_CS2__NANDF_CS2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS2, 0x520, 0x138, 1, 0x000, 0), /* MX51_PAD_NANDF_CS2__PATA_CS_0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS2, 0x520, 0x138, 5, 0x000, 0), /* MX51_PAD_NANDF_CS2__SD4_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS2, 0x520, 0x138, 7, 0x000, 0), /* MX51_PAD_NANDF_CS2__USBH3_H1_DP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS3, 0x524, 0x13c, 2, 0x000, 0), /* MX51_PAD_NANDF_CS3__FEC_MDC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS3, 0x524, 0x13c, 3, 0x000, 0), /* MX51_PAD_NANDF_CS3__GPIO3_19 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS3, 0x524, 0x13c, 0, 0x000, 0), /* MX51_PAD_NANDF_CS3__NANDF_CS3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS3, 0x524, 0x13c, 1, 0x000, 0), /* MX51_PAD_NANDF_CS3__PATA_CS_1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS3, 0x524, 0x13c, 5, 0x000, 0), /* MX51_PAD_NANDF_CS3__SD4_DAT0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS3, 0x524, 0x13c, 7, 0x000, 0), /* MX51_PAD_NANDF_CS3__USBH3_H1_DM */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS4, 0x528, 0x140, 2, 0x000, 0), /* MX51_PAD_NANDF_CS4__FEC_TDATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS4, 0x528, 0x140, 3, 0x000, 0), /* MX51_PAD_NANDF_CS4__GPIO3_20 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS4, 0x528, 0x140, 0, 0x000, 0), /* MX51_PAD_NANDF_CS4__NANDF_CS4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS4, 0x528, 0x140, 1, 0x000, 0), /* MX51_PAD_NANDF_CS4__PATA_DA_0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS4, 0x528, 0x140, 5, 0x000, 0), /* MX51_PAD_NANDF_CS4__SD4_DAT1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS4, 0x528, 0x140, 7, 0xa24, 0), /* MX51_PAD_NANDF_CS4__USBH3_STP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS5, 0x52c, 0x144, 2, 0x000, 0), /* MX51_PAD_NANDF_CS5__FEC_TDATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS5, 0x52c, 0x144, 3, 0x000, 0), /* MX51_PAD_NANDF_CS5__GPIO3_21 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS5, 0x52c, 0x144, 0, 0x000, 0), /* MX51_PAD_NANDF_CS5__NANDF_CS5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS5, 0x52c, 0x144, 1, 0x000, 0), /* MX51_PAD_NANDF_CS5__PATA_DA_1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS5, 0x52c, 0x144, 5, 0x000, 0), /* MX51_PAD_NANDF_CS5__SD4_DAT2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS5, 0x52c, 0x144, 7, 0xa1c, 0), /* MX51_PAD_NANDF_CS5__USBH3_DIR */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS6, 0x530, 0x148, 7, 0x928, 0), /* MX51_PAD_NANDF_CS6__CSPI_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS6, 0x530, 0x148, 2, 0x000, 0), /* MX51_PAD_NANDF_CS6__FEC_TDATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS6, 0x530, 0x148, 3, 0x000, 0), /* MX51_PAD_NANDF_CS6__GPIO3_22 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS6, 0x530, 0x148, 0, 0x000, 0), /* MX51_PAD_NANDF_CS6__NANDF_CS6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS6, 0x530, 0x148, 1, 0x000, 0), /* MX51_PAD_NANDF_CS6__PATA_DA_2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS6, 0x530, 0x148, 5, 0x000, 0), /* MX51_PAD_NANDF_CS6__SD4_DAT3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS7, 0x534, 0x14c, 1, 0x000, 0), /* MX51_PAD_NANDF_CS7__FEC_TX_EN */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS7, 0x534, 0x14c, 3, 0x000, 0), /* MX51_PAD_NANDF_CS7__GPIO3_23 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS7, 0x534, 0x14c, 0, 0x000, 0), /* MX51_PAD_NANDF_CS7__NANDF_CS7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_CS7, 0x534, 0x14c, 5, 0x000, 0), /* MX51_PAD_NANDF_CS7__SD3_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RDY_INT, 0x538, 0x150, 2, 0x000, 0), /* MX51_PAD_NANDF_RDY_INT__ECSPI2_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RDY_INT, 0x538, 0x150, 1, 0x974, 0), /* MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RDY_INT, 0x538, 0x150, 3, 0x000, 0), /* MX51_PAD_NANDF_RDY_INT__GPIO3_24 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RDY_INT, 0x538, 0x150, 0, 0x938, 0), /* MX51_PAD_NANDF_RDY_INT__NANDF_RDY_INT */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_RDY_INT, 0x538, 0x150, 5, 0x000, 0), /* MX51_PAD_NANDF_RDY_INT__SD3_CMD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D15, 0x53c, 0x154, 2, 0x000, 0), /* MX51_PAD_NANDF_D15__ECSPI2_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D15, 0x53c, 0x154, 3, 0x000, 0), /* MX51_PAD_NANDF_D15__GPIO3_25 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D15, 0x53c, 0x154, 0, 0x000, 0), /* MX51_PAD_NANDF_D15__NANDF_D15 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D15, 0x53c, 0x154, 1, 0x000, 0), /* MX51_PAD_NANDF_D15__PATA_DATA15 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D15, 0x53c, 0x154, 5, 0x000, 0), /* MX51_PAD_NANDF_D15__SD3_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D14, 0x540, 0x158, 2, 0x934, 0), /* MX51_PAD_NANDF_D14__ECSPI2_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D14, 0x540, 0x158, 3, 0x000, 0), /* MX51_PAD_NANDF_D14__GPIO3_26 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D14, 0x540, 0x158, 0, 0x000, 0), /* MX51_PAD_NANDF_D14__NANDF_D14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D14, 0x540, 0x158, 1, 0x000, 0), /* MX51_PAD_NANDF_D14__PATA_DATA14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D14, 0x540, 0x158, 5, 0x000, 0), /* MX51_PAD_NANDF_D14__SD3_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D13, 0x544, 0x15c, 2, 0x000, 0), /* MX51_PAD_NANDF_D13__ECSPI2_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D13, 0x544, 0x15c, 3, 0x000, 0), /* MX51_PAD_NANDF_D13__GPIO3_27 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D13, 0x544, 0x15c, 0, 0x000, 0), /* MX51_PAD_NANDF_D13__NANDF_D13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D13, 0x544, 0x15c, 1, 0x000, 0), /* MX51_PAD_NANDF_D13__PATA_DATA13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D13, 0x544, 0x15c, 5, 0x000, 0), /* MX51_PAD_NANDF_D13__SD3_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D12, 0x548, 0x160, 2, 0x930, 1), /* MX51_PAD_NANDF_D12__ECSPI2_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D12, 0x548, 0x160, 3, 0x000, 0), /* MX51_PAD_NANDF_D12__GPIO3_28 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D12, 0x548, 0x160, 0, 0x000, 0), /* MX51_PAD_NANDF_D12__NANDF_D12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D12, 0x548, 0x160, 1, 0x000, 0), /* MX51_PAD_NANDF_D12__PATA_DATA12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D12, 0x548, 0x160, 5, 0x000, 0), /* MX51_PAD_NANDF_D12__SD3_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D11, 0x54c, 0x164, 2, 0x96c, 0), /* MX51_PAD_NANDF_D11__FEC_RX_DV */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D11, 0x54c, 0x164, 3, 0x000, 0), /* MX51_PAD_NANDF_D11__GPIO3_29 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D11, 0x54c, 0x164, 0, 0x000, 0), /* MX51_PAD_NANDF_D11__NANDF_D11 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D11, 0x54c, 0x164, 1, 0x000, 0), /* MX51_PAD_NANDF_D11__PATA_DATA11 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D11, 0x54c, 0x164, 5, 0x948, 1), /* MX51_PAD_NANDF_D11__SD3_DATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D10, 0x550, 0x168, 3, 0x000, 0), /* MX51_PAD_NANDF_D10__GPIO3_30 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D10, 0x550, 0x168, 0, 0x000, 0), /* MX51_PAD_NANDF_D10__NANDF_D10 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D10, 0x550, 0x168, 1, 0x000, 0), /* MX51_PAD_NANDF_D10__PATA_DATA10 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D10, 0x550, 0x168, 5, 0x944, 1), /* MX51_PAD_NANDF_D10__SD3_DATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D9, 0x554, 0x16c, 2, 0x958, 0), /* MX51_PAD_NANDF_D9__FEC_RDATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D9, 0x554, 0x16c, 3, 0x000, 0), /* MX51_PAD_NANDF_D9__GPIO3_31 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D9, 0x554, 0x16c, 0, 0x000, 0), /* MX51_PAD_NANDF_D9__NANDF_D9 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D9, 0x554, 0x16c, 1, 0x000, 0), /* MX51_PAD_NANDF_D9__PATA_DATA9 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D9, 0x554, 0x16c, 5, 0x940, 1), /* MX51_PAD_NANDF_D9__SD3_DATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D8, 0x558, 0x170, 2, 0x000, 0), /* MX51_PAD_NANDF_D8__FEC_TDATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D8, 0x558, 0x170, 3, 0x000, 0), /* MX51_PAD_NANDF_D8__GPIO4_0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D8, 0x558, 0x170, 0, 0x000, 0), /* MX51_PAD_NANDF_D8__NANDF_D8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D8, 0x558, 0x170, 1, 0x000, 0), /* MX51_PAD_NANDF_D8__PATA_DATA8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D8, 0x558, 0x170, 5, 0x93c, 1), /* MX51_PAD_NANDF_D8__SD3_DATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D7, 0x55c, 0x174, 3, 0x000, 0), /* MX51_PAD_NANDF_D7__GPIO4_1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D7, 0x55c, 0x174, 0, 0x000, 0), /* MX51_PAD_NANDF_D7__NANDF_D7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D7, 0x55c, 0x174, 1, 0x000, 0), /* MX51_PAD_NANDF_D7__PATA_DATA7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D7, 0x55c, 0x174, 5, 0x9fc, 0), /* MX51_PAD_NANDF_D7__USBH3_DATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D6, 0x560, 0x178, 3, 0x000, 0), /* MX51_PAD_NANDF_D6__GPIO4_2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D6, 0x560, 0x178, 0, 0x000, 0), /* MX51_PAD_NANDF_D6__NANDF_D6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D6, 0x560, 0x178, 1, 0x000, 0), /* MX51_PAD_NANDF_D6__PATA_DATA6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D6, 0x560, 0x178, 2, 0x000, 0), /* MX51_PAD_NANDF_D6__SD4_LCTL */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D6, 0x560, 0x178, 5, 0xa00, 0), /* MX51_PAD_NANDF_D6__USBH3_DATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D5, 0x564, 0x17c, 3, 0x000, 0), /* MX51_PAD_NANDF_D5__GPIO4_3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D5, 0x564, 0x17c, 0, 0x000, 0), /* MX51_PAD_NANDF_D5__NANDF_D5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D5, 0x564, 0x17c, 1, 0x000, 0), /* MX51_PAD_NANDF_D5__PATA_DATA5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D5, 0x564, 0x17c, 2, 0x000, 0), /* MX51_PAD_NANDF_D5__SD4_WP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D5, 0x564, 0x17c, 5, 0xa04, 0), /* MX51_PAD_NANDF_D5__USBH3_DATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D4, 0x568, 0x180, 3, 0x000, 0), /* MX51_PAD_NANDF_D4__GPIO4_4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D4, 0x568, 0x180, 0, 0x000, 0), /* MX51_PAD_NANDF_D4__NANDF_D4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D4, 0x568, 0x180, 1, 0x000, 0), /* MX51_PAD_NANDF_D4__PATA_DATA4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D4, 0x568, 0x180, 2, 0x000, 0), /* MX51_PAD_NANDF_D4__SD4_CD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D4, 0x568, 0x180, 5, 0xa08, 0), /* MX51_PAD_NANDF_D4__USBH3_DATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D3, 0x56c, 0x184, 3, 0x000, 0), /* MX51_PAD_NANDF_D3__GPIO4_5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D3, 0x56c, 0x184, 0, 0x000, 0), /* MX51_PAD_NANDF_D3__NANDF_D3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D3, 0x56c, 0x184, 1, 0x000, 0), /* MX51_PAD_NANDF_D3__PATA_DATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D3, 0x56c, 0x184, 2, 0x000, 0), /* MX51_PAD_NANDF_D3__SD4_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D3, 0x56c, 0x184, 5, 0xa0c, 0), /* MX51_PAD_NANDF_D3__USBH3_DATA4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D2, 0x570, 0x188, 3, 0x000, 0), /* MX51_PAD_NANDF_D2__GPIO4_6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D2, 0x570, 0x188, 0, 0x000, 0), /* MX51_PAD_NANDF_D2__NANDF_D2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D2, 0x570, 0x188, 1, 0x000, 0), /* MX51_PAD_NANDF_D2__PATA_DATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D2, 0x570, 0x188, 2, 0x000, 0), /* MX51_PAD_NANDF_D2__SD4_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D2, 0x570, 0x188, 5, 0xa10, 0), /* MX51_PAD_NANDF_D2__USBH3_DATA5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D1, 0x574, 0x18c, 3, 0x000, 0), /* MX51_PAD_NANDF_D1__GPIO4_7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D1, 0x574, 0x18c, 0, 0x000, 0), /* MX51_PAD_NANDF_D1__NANDF_D1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D1, 0x574, 0x18c, 1, 0x000, 0), /* MX51_PAD_NANDF_D1__PATA_DATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D1, 0x574, 0x18c, 2, 0x000, 0), /* MX51_PAD_NANDF_D1__SD4_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D1, 0x574, 0x18c, 5, 0xa14, 0), /* MX51_PAD_NANDF_D1__USBH3_DATA6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D0, 0x578, 0x190, 3, 0x000, 0), /* MX51_PAD_NANDF_D0__GPIO4_8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D0, 0x578, 0x190, 0, 0x000, 0), /* MX51_PAD_NANDF_D0__NANDF_D0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D0, 0x578, 0x190, 1, 0x000, 0), /* MX51_PAD_NANDF_D0__PATA_DATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D0, 0x578, 0x190, 2, 0x000, 0), /* MX51_PAD_NANDF_D0__SD4_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_NANDF_D0, 0x578, 0x190, 5, 0xa18, 0), /* MX51_PAD_NANDF_D0__USBH3_DATA7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D8, 0x57c, 0x194, 0, 0x000, 0), /* MX51_PAD_CSI1_D8__CSI1_D8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D8, 0x57c, 0x194, 3, 0x998, 1), /* MX51_PAD_CSI1_D8__GPIO3_12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D9, 0x580, 0x198, 0, 0x000, 0), /* MX51_PAD_CSI1_D9__CSI1_D9 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D9, 0x580, 0x198, 3, 0x000, 0), /* MX51_PAD_CSI1_D9__GPIO3_13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D10, 0x584, 0x19c, 0, 0x000, 0), /* MX51_PAD_CSI1_D10__CSI1_D10 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D11, 0x588, 0x1a0, 0, 0x000, 0), /* MX51_PAD_CSI1_D11__CSI1_D11 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D12, 0x58c, 0x1a4, 0, 0x000, 0), /* MX51_PAD_CSI1_D12__CSI1_D12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D13, 0x590, 0x1a8, 0, 0x000, 0), /* MX51_PAD_CSI1_D13__CSI1_D13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D14, 0x594, 0x1ac, 0, 0x000, 0), /* MX51_PAD_CSI1_D14__CSI1_D14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D15, 0x598, 0x1b0, 0, 0x000, 0), /* MX51_PAD_CSI1_D15__CSI1_D15 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D16, 0x59c, 0x1b4, 0, 0x000, 0), /* MX51_PAD_CSI1_D16__CSI1_D16 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D17, 0x5a0, 0x1b8, 0, 0x000, 0), /* MX51_PAD_CSI1_D17__CSI1_D17 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D18, 0x5a4, 0x1bc, 0, 0x000, 0), /* MX51_PAD_CSI1_D18__CSI1_D18 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_D19, 0x5a8, 0x1c0, 0, 0x000, 0), /* MX51_PAD_CSI1_D19__CSI1_D19 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_VSYNC, 0x5ac, 0x1c4, 0, 0x000, 0), /* MX51_PAD_CSI1_VSYNC__CSI1_VSYNC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_VSYNC, 0x5ac, 0x1c4, 3, 0x000, 0), /* MX51_PAD_CSI1_VSYNC__GPIO3_14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_HSYNC, 0x5b0, 0x1c8, 0, 0x000, 0), /* MX51_PAD_CSI1_HSYNC__CSI1_HSYNC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_HSYNC, 0x5b0, 0x1c8, 3, 0x000, 0), /* MX51_PAD_CSI1_HSYNC__GPIO3_15 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_PIXCLK, 0x5b4, NO_MUX, 0, 0x000, 0), /* MX51_PAD_CSI1_PIXCLK__CSI1_PIXCLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI1_MCLK, 0x5b8, NO_MUX, 0, 0x000, 0), /* MX51_PAD_CSI1_MCLK__CSI1_MCLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_D12, 0x5bc, 0x1cc, 0, 0x000, 0), /* MX51_PAD_CSI2_D12__CSI2_D12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_D12, 0x5bc, 0x1cc, 3, 0x000, 0), /* MX51_PAD_CSI2_D12__GPIO4_9 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_D13, 0x5c0, 0x1d0, 0, 0x000, 0), /* MX51_PAD_CSI2_D13__CSI2_D13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_D13, 0x5c0, 0x1d0, 3, 0x000, 0), /* MX51_PAD_CSI2_D13__GPIO4_10 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_D14, 0x5c4, 0x1d4, 0, 0x000, 0), /* MX51_PAD_CSI2_D14__CSI2_D14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_D15, 0x5c8, 0x1d8, 0, 0x000, 0), /* MX51_PAD_CSI2_D15__CSI2_D15 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_D16, 0x5cc, 0x1dc, 0, 0x000, 0), /* MX51_PAD_CSI2_D16__CSI2_D16 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_D17, 0x5d0, 0x1e0, 0, 0x000, 0), /* MX51_PAD_CSI2_D17__CSI2_D17 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_D18, 0x5d4, 0x1e4, 0, 0x000, 0), /* MX51_PAD_CSI2_D18__CSI2_D18 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_D18, 0x5d4, 0x1e4, 3, 0x000, 0), /* MX51_PAD_CSI2_D18__GPIO4_11 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_D19, 0x5d8, 0x1e8, 0, 0x000, 0), /* MX51_PAD_CSI2_D19__CSI2_D19 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_D19, 0x5d8, 0x1e8, 3, 0x000, 0), /* MX51_PAD_CSI2_D19__GPIO4_12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_VSYNC, 0x5dc, 0x1ec, 0, 0x000, 0), /* MX51_PAD_CSI2_VSYNC__CSI2_VSYNC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_VSYNC, 0x5dc, 0x1ec, 3, 0x000, 0), /* MX51_PAD_CSI2_VSYNC__GPIO4_13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_HSYNC, 0x5e0, 0x1f0, 0, 0x000, 0), /* MX51_PAD_CSI2_HSYNC__CSI2_HSYNC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_HSYNC, 0x5e0, 0x1f0, 3, 0x000, 0), /* MX51_PAD_CSI2_HSYNC__GPIO4_14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_PIXCLK, 0x5e4, 0x1f4, 0, 0x000, 0), /* MX51_PAD_CSI2_PIXCLK__CSI2_PIXCLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSI2_PIXCLK, 0x5e4, 0x1f4, 3, 0x000, 0), /* MX51_PAD_CSI2_PIXCLK__GPIO4_15 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_I2C1_CLK, 0x5e8, 0x1f8, 3, 0x000, 0), /* MX51_PAD_I2C1_CLK__GPIO4_16 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_I2C1_CLK, 0x5e8, 0x1f8, 0, 0x000, 0), /* MX51_PAD_I2C1_CLK__I2C1_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_I2C1_DAT, 0x5ec, 0x1fc, 3, 0x000, 0), /* MX51_PAD_I2C1_DAT__GPIO4_17 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_I2C1_DAT, 0x5ec, 0x1fc, 0, 0x000, 0), /* MX51_PAD_I2C1_DAT__I2C1_DAT */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_AUD3_BB_TXD, 0x5f0, 0x200, 0, 0x000, 0), /* MX51_PAD_AUD3_BB_TXD__AUD3_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_AUD3_BB_TXD, 0x5f0, 0x200, 3, 0x000, 0), /* MX51_PAD_AUD3_BB_TXD__GPIO4_18 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_AUD3_BB_RXD, 0x5f4, 0x204, 0, 0x000, 0), /* MX51_PAD_AUD3_BB_RXD__AUD3_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_AUD3_BB_RXD, 0x5f4, 0x204, 3, 0x000, 0), /* MX51_PAD_AUD3_BB_RXD__GPIO4_19 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_AUD3_BB_RXD, 0x5f4, 0x204, 1, 0x9f4, 2), /* MX51_PAD_AUD3_BB_RXD__UART3_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_AUD3_BB_CK, 0x5f8, 0x208, 0, 0x000, 0), /* MX51_PAD_AUD3_BB_CK__AUD3_TXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_AUD3_BB_CK, 0x5f8, 0x208, 3, 0x000, 0), /* MX51_PAD_AUD3_BB_CK__GPIO4_20 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_AUD3_BB_FS, 0x5fc, 0x20c, 0, 0x000, 0), /* MX51_PAD_AUD3_BB_FS__AUD3_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_AUD3_BB_FS, 0x5fc, 0x20c, 3, 0x000, 0), /* MX51_PAD_AUD3_BB_FS__GPIO4_21 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_AUD3_BB_FS, 0x5fc, 0x20c, 1, 0x000, 0), /* MX51_PAD_AUD3_BB_FS__UART3_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_MOSI, 0x600, 0x210, 0, 0x000, 0), /* MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_MOSI, 0x600, 0x210, 3, 0x000, 0), /* MX51_PAD_CSPI1_MOSI__GPIO4_22 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_MOSI, 0x600, 0x210, 1, 0x9b4, 1), /* MX51_PAD_CSPI1_MOSI__I2C1_SDA */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_MISO, 0x604, 0x214, 1, 0x8c4, 1), /* MX51_PAD_CSPI1_MISO__AUD4_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_MISO, 0x604, 0x214, 0, 0x000, 0), /* MX51_PAD_CSPI1_MISO__ECSPI1_MISO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_MISO, 0x604, 0x214, 3, 0x000, 0), /* MX51_PAD_CSPI1_MISO__GPIO4_23 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_SS0, 0x608, 0x218, 1, 0x8cc, 1), /* MX51_PAD_CSPI1_SS0__AUD4_TXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_SS0, 0x608, 0x218, 0, 0x000, 0), /* MX51_PAD_CSPI1_SS0__ECSPI1_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_SS0, 0x608, 0x218, 3, 0x000, 0), /* MX51_PAD_CSPI1_SS0__GPIO4_24 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_SS1, 0x60c, 0x21c, 1, 0x8c8, 1), /* MX51_PAD_CSPI1_SS1__AUD4_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_SS1, 0x60c, 0x21c, 0, 0x000, 0), /* MX51_PAD_CSPI1_SS1__ECSPI1_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_SS1, 0x60c, 0x21c, 3, 0x000, 0), /* MX51_PAD_CSPI1_SS1__GPIO4_25 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_RDY, 0x610, 0x220, 1, 0x8d0, 1), /* MX51_PAD_CSPI1_RDY__AUD4_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_RDY, 0x610, 0x220, 0, 0x000, 0), /* MX51_PAD_CSPI1_RDY__ECSPI1_RDY */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_RDY, 0x610, 0x220, 3, 0x000, 0), /* MX51_PAD_CSPI1_RDY__GPIO4_26 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_SCLK, 0x614, 0x224, 0, 0x000, 0), /* MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_SCLK, 0x614, 0x224, 3, 0x000, 0), /* MX51_PAD_CSPI1_SCLK__GPIO4_27 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_CSPI1_SCLK, 0x614, 0x224, 1, 0x9b0, 1), /* MX51_PAD_CSPI1_SCLK__I2C1_SCL */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART1_RXD, 0x618, 0x228, 3, 0x000, 0), /* MX51_PAD_UART1_RXD__GPIO4_28 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART1_RXD, 0x618, 0x228, 0, 0x9e4, 0), /* MX51_PAD_UART1_RXD__UART1_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART1_TXD, 0x61c, 0x22c, 3, 0x000, 0), /* MX51_PAD_UART1_TXD__GPIO4_29 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART1_TXD, 0x61c, 0x22c, 1, 0x000, 0), /* MX51_PAD_UART1_TXD__PWM2_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART1_TXD, 0x61c, 0x22c, 0, 0x000, 0), /* MX51_PAD_UART1_TXD__UART1_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART1_RTS, 0x620, 0x230, 3, 0x000, 0), /* MX51_PAD_UART1_RTS__GPIO4_30 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART1_RTS, 0x620, 0x230, 0, 0x9e0, 0), /* MX51_PAD_UART1_RTS__UART1_RTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART1_CTS, 0x624, 0x234, 3, 0x000, 0), /* MX51_PAD_UART1_CTS__GPIO4_31 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART1_CTS, 0x624, 0x234, 0, 0x000, 0), /* MX51_PAD_UART1_CTS__UART1_CTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART2_RXD, 0x628, 0x238, 1, 0x000, 0), /* MX51_PAD_UART2_RXD__FIRI_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART2_RXD, 0x628, 0x238, 3, 0x000, 0), /* MX51_PAD_UART2_RXD__GPIO1_20 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART2_RXD, 0x628, 0x238, 0, 0x9ec, 2), /* MX51_PAD_UART2_RXD__UART2_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART2_TXD, 0x62c, 0x23c, 1, 0x000, 0), /* MX51_PAD_UART2_TXD__FIRI_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART2_TXD, 0x62c, 0x23c, 3, 0x000, 0), /* MX51_PAD_UART2_TXD__GPIO1_21 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART2_TXD, 0x62c, 0x23c, 0, 0x000, 0), /* MX51_PAD_UART2_TXD__UART2_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART3_RXD, 0x630, 0x240, 2, 0x000, 0), /* MX51_PAD_UART3_RXD__CSI1_D0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART3_RXD, 0x630, 0x240, 3, 0x000, 0), /* MX51_PAD_UART3_RXD__GPIO1_22 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART3_RXD, 0x630, 0x240, 0, 0x000, 0), /* MX51_PAD_UART3_RXD__UART1_DTR */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART3_RXD, 0x630, 0x240, 1, 0x9f4, 4), /* MX51_PAD_UART3_RXD__UART3_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART3_TXD, 0x634, 0x244, 2, 0x000, 0), /* MX51_PAD_UART3_TXD__CSI1_D1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART3_TXD, 0x634, 0x244, 3, 0x000, 0), /* MX51_PAD_UART3_TXD__GPIO1_23 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART3_TXD, 0x634, 0x244, 0, 0x000, 0), /* MX51_PAD_UART3_TXD__UART1_DSR */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_UART3_TXD, 0x634, 0x244, 1, 0x000, 0), /* MX51_PAD_UART3_TXD__UART3_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_OWIRE_LINE, 0x638, 0x248, 3, 0x000, 0), /* MX51_PAD_OWIRE_LINE__GPIO1_24 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_OWIRE_LINE, 0x638, 0x248, 0, 0x000, 0), /* MX51_PAD_OWIRE_LINE__OWIRE_LINE */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_OWIRE_LINE, 0x638, 0x248, 6, 0x000, 0), /* MX51_PAD_OWIRE_LINE__SPDIF_OUT */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_ROW0, 0x63c, 0x24c, 0, 0x000, 0), /* MX51_PAD_KEY_ROW0__KEY_ROW0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_ROW1, 0x640, 0x250, 0, 0x000, 0), /* MX51_PAD_KEY_ROW1__KEY_ROW1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_ROW2, 0x644, 0x254, 0, 0x000, 0), /* MX51_PAD_KEY_ROW2__KEY_ROW2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_ROW3, 0x648, 0x258, 0, 0x000, 0), /* MX51_PAD_KEY_ROW3__KEY_ROW3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL0, 0x64c, 0x25c, 0, 0x000, 0), /* MX51_PAD_KEY_COL0__KEY_COL0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL0, 0x64c, 0x25c, 7, 0x90c, 0), /* MX51_PAD_KEY_COL0__PLL1_BYP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL1, 0x650, 0x260, 0, 0x000, 0), /* MX51_PAD_KEY_COL1__KEY_COL1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL1, 0x650, 0x260, 7, 0x910, 0), /* MX51_PAD_KEY_COL1__PLL2_BYP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL2, 0x654, 0x264, 0, 0x000, 0), /* MX51_PAD_KEY_COL2__KEY_COL2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL2, 0x654, 0x264, 7, 0x000, 0), /* MX51_PAD_KEY_COL2__PLL3_BYP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL3, 0x658, 0x268, 0, 0x000, 0), /* MX51_PAD_KEY_COL3__KEY_COL3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL4, 0x65c, 0x26c, 3, 0x9b8, 1), /* MX51_PAD_KEY_COL4__I2C2_SCL */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL4, 0x65c, 0x26c, 0, 0x000, 0), /* MX51_PAD_KEY_COL4__KEY_COL4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL4, 0x65c, 0x26c, 6, 0x000, 0), /* MX51_PAD_KEY_COL4__SPDIF_OUT1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL4, 0x65c, 0x26c, 1, 0x000, 0), /* MX51_PAD_KEY_COL4__UART1_RI */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL4, 0x65c, 0x26c, 2, 0x9f0, 4), /* MX51_PAD_KEY_COL4__UART3_RTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL5, 0x660, 0x270, 3, 0x9bc, 1), /* MX51_PAD_KEY_COL5__I2C2_SDA */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL5, 0x660, 0x270, 0, 0x000, 0), /* MX51_PAD_KEY_COL5__KEY_COL5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL5, 0x660, 0x270, 1, 0x000, 0), /* MX51_PAD_KEY_COL5__UART1_DCD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_KEY_COL5, 0x660, 0x270, 2, 0x000, 0), /* MX51_PAD_KEY_COL5__UART3_CTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_CLK, 0x678, 0x278, 1, 0x914, 1), /* MX51_PAD_USBH1_CLK__CSPI_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_CLK, 0x678, 0x278, 2, 0x000, 0), /* MX51_PAD_USBH1_CLK__GPIO1_25 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_CLK, 0x678, 0x278, 5, 0x9b8, 2), /* MX51_PAD_USBH1_CLK__I2C2_SCL */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_CLK, 0x678, 0x278, 0, 0x000, 0), /* MX51_PAD_USBH1_CLK__USBH1_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DIR, 0x67c, 0x27c, 1, 0x91c, 1), /* MX51_PAD_USBH1_DIR__CSPI_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DIR, 0x67c, 0x27c, 2, 0x000, 0), /* MX51_PAD_USBH1_DIR__GPIO1_26 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DIR, 0x67c, 0x27c, 5, 0x9bc, 2), /* MX51_PAD_USBH1_DIR__I2C2_SDA */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DIR, 0x67c, 0x27c, 0, 0x000, 0), /* MX51_PAD_USBH1_DIR__USBH1_DIR */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_STP, 0x680, 0x280, 1, 0x000, 0), /* MX51_PAD_USBH1_STP__CSPI_RDY */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_STP, 0x680, 0x280, 2, 0x000, 0), /* MX51_PAD_USBH1_STP__GPIO1_27 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_STP, 0x680, 0x280, 5, 0x9f4, 6), /* MX51_PAD_USBH1_STP__UART3_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_STP, 0x680, 0x280, 0, 0x000, 0), /* MX51_PAD_USBH1_STP__USBH1_STP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_NXT, 0x684, 0x284, 1, 0x918, 0), /* MX51_PAD_USBH1_NXT__CSPI_MISO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_NXT, 0x684, 0x284, 2, 0x000, 0), /* MX51_PAD_USBH1_NXT__GPIO1_28 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_NXT, 0x684, 0x284, 5, 0x000, 0), /* MX51_PAD_USBH1_NXT__UART3_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_NXT, 0x684, 0x284, 0, 0x000, 0), /* MX51_PAD_USBH1_NXT__USBH1_NXT */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA0, 0x688, 0x288, 2, 0x000, 0), /* MX51_PAD_USBH1_DATA0__GPIO1_11 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA0, 0x688, 0x288, 1, 0x000, 0), /* MX51_PAD_USBH1_DATA0__UART2_CTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA0, 0x688, 0x288, 0, 0x000, 0), /* MX51_PAD_USBH1_DATA0__USBH1_DATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA1, 0x68c, 0x28c, 2, 0x000, 0), /* MX51_PAD_USBH1_DATA1__GPIO1_12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA1, 0x68c, 0x28c, 1, 0x9ec, 4), /* MX51_PAD_USBH1_DATA1__UART2_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA1, 0x68c, 0x28c, 0, 0x000, 0), /* MX51_PAD_USBH1_DATA1__USBH1_DATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA2, 0x690, 0x290, 2, 0x000, 0), /* MX51_PAD_USBH1_DATA2__GPIO1_13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA2, 0x690, 0x290, 1, 0x000, 0), /* MX51_PAD_USBH1_DATA2__UART2_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA2, 0x690, 0x290, 0, 0x000, 0), /* MX51_PAD_USBH1_DATA2__USBH1_DATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA3, 0x694, 0x294, 2, 0x000, 0), /* MX51_PAD_USBH1_DATA3__GPIO1_14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA3, 0x694, 0x294, 1, 0x9e8, 5), /* MX51_PAD_USBH1_DATA3__UART2_RTS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA3, 0x694, 0x294, 0, 0x000, 0), /* MX51_PAD_USBH1_DATA3__USBH1_DATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA4, 0x698, 0x298, 1, 0x000, 0), /* MX51_PAD_USBH1_DATA4__CSPI_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA4, 0x698, 0x298, 2, 0x000, 0), /* MX51_PAD_USBH1_DATA4__GPIO1_15 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA4, 0x698, 0x298, 0, 0x000, 0), /* MX51_PAD_USBH1_DATA4__USBH1_DATA4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA5, 0x69c, 0x29c, 1, 0x920, 0), /* MX51_PAD_USBH1_DATA5__CSPI_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA5, 0x69c, 0x29c, 2, 0x000, 0), /* MX51_PAD_USBH1_DATA5__GPIO1_16 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA5, 0x69c, 0x29c, 0, 0x000, 0), /* MX51_PAD_USBH1_DATA5__USBH1_DATA5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA6, 0x6a0, 0x2a0, 1, 0x928, 1), /* MX51_PAD_USBH1_DATA6__CSPI_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA6, 0x6a0, 0x2a0, 2, 0x000, 0), /* MX51_PAD_USBH1_DATA6__GPIO1_17 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA6, 0x6a0, 0x2a0, 0, 0x000, 0), /* MX51_PAD_USBH1_DATA6__USBH1_DATA6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA7, 0x6a4, 0x2a4, 1, 0x000, 0), /* MX51_PAD_USBH1_DATA7__ECSPI1_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA7, 0x6a4, 0x2a4, 5, 0x934, 1), /* MX51_PAD_USBH1_DATA7__ECSPI2_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA7, 0x6a4, 0x2a4, 2, 0x000, 0), /* MX51_PAD_USBH1_DATA7__GPIO1_18 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_USBH1_DATA7, 0x6a4, 0x2a4, 0, 0x000, 0), /* MX51_PAD_USBH1_DATA7__USBH1_DATA7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_PIN11, 0x6a8, 0x2a8, 0, 0x000, 0), /* MX51_PAD_DI1_PIN11__DI1_PIN11 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_PIN11, 0x6a8, 0x2a8, 7, 0x000, 0), /* MX51_PAD_DI1_PIN11__ECSPI1_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_PIN11, 0x6a8, 0x2a8, 4, 0x000, 0), /* MX51_PAD_DI1_PIN11__GPIO3_0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_PIN12, 0x6ac, 0x2ac, 0, 0x000, 0), /* MX51_PAD_DI1_PIN12__DI1_PIN12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_PIN12, 0x6ac, 0x2ac, 4, 0x978, 1), /* MX51_PAD_DI1_PIN12__GPIO3_1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_PIN13, 0x6b0, 0x2b0, 0, 0x000, 0), /* MX51_PAD_DI1_PIN13__DI1_PIN13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_PIN13, 0x6b0, 0x2b0, 4, 0x97c, 1), /* MX51_PAD_DI1_PIN13__GPIO3_2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_D0_CS, 0x6b4, 0x2b4, 0, 0x000, 0), /* MX51_PAD_DI1_D0_CS__DI1_D0_CS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_D0_CS, 0x6b4, 0x2b4, 4, 0x980, 1), /* MX51_PAD_DI1_D0_CS__GPIO3_3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_D1_CS, 0x6b8, 0x2b8, 0, 0x000, 0), /* MX51_PAD_DI1_D1_CS__DI1_D1_CS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_D1_CS, 0x6b8, 0x2b8, 2, 0x000, 0), /* MX51_PAD_DI1_D1_CS__DISP1_PIN14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_D1_CS, 0x6b8, 0x2b8, 3, 0x000, 0), /* MX51_PAD_DI1_D1_CS__DISP1_PIN5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_D1_CS, 0x6b8, 0x2b8, 4, 0x984, 1), /* MX51_PAD_DI1_D1_CS__GPIO3_4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_DIN, 0x6bc, 0x2bc, 2, 0x9a4, 1), /* MX51_PAD_DISPB2_SER_DIN__DISP1_PIN1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_DIN, 0x6bc, 0x2bc, 0, 0x9c4, 0), /* MX51_PAD_DISPB2_SER_DIN__DISPB2_SER_DIN */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_DIN, 0x6bc, 0x2bc, 4, 0x988, 1), /* MX51_PAD_DISPB2_SER_DIN__GPIO3_5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_DIO, 0x6c0, 0x2c0, 3, 0x000, 0), /* MX51_PAD_DISPB2_SER_DIO__DISP1_PIN6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_DIO, 0x6c0, 0x2c0, 0, 0x9c4, 1), /* MX51_PAD_DISPB2_SER_DIO__DISPB2_SER_DIO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_DIO, 0x6c0, 0x2c0, 4, 0x98c, 1), /* MX51_PAD_DISPB2_SER_DIO__GPIO3_6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_CLK, 0x6c4, 0x2c4, 2, 0x000, 0), /* MX51_PAD_DISPB2_SER_CLK__DISP1_PIN17 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_CLK, 0x6c4, 0x2c4, 3, 0x000, 0), /* MX51_PAD_DISPB2_SER_CLK__DISP1_PIN7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_CLK, 0x6c4, 0x2c4, 0, 0x000, 0), /* MX51_PAD_DISPB2_SER_CLK__DISPB2_SER_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_CLK, 0x6c4, 0x2c4, 4, 0x990, 1), /* MX51_PAD_DISPB2_SER_CLK__GPIO3_7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_RS, 0x6c8, 0x2c8, 2, 0x000, 0), /* MX51_PAD_DISPB2_SER_RS__DISP1_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_RS, 0x6c8, 0x2c8, 2, 0x000, 0), /* MX51_PAD_DISPB2_SER_RS__DISP1_PIN16 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_RS, 0x6c8, 0x2c8, 3, 0x000, 0), /* MX51_PAD_DISPB2_SER_RS__DISP1_PIN8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_RS, 0x6c8, 0x2c8, 0, 0x000, 0), /* MX51_PAD_DISPB2_SER_RS__DISPB2_SER_RS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_RS, 0x6c8, 0x2c8, 0, 0x000, 0), /* MX51_PAD_DISPB2_SER_RS__DISPB2_SER_RS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISPB2_SER_RS, 0x6c8, 0x2c8, 4, 0x994, 1), /* MX51_PAD_DISPB2_SER_RS__GPIO3_8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT0, 0x6cc, 0x2cc, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT0__DISP1_DAT0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT1, 0x6d0, 0x2d0, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT1__DISP1_DAT1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT2, 0x6d4, 0x2d4, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT2__DISP1_DAT2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT3, 0x6d8, 0x2d8, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT3__DISP1_DAT3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT4, 0x6dc, 0x2dc, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT4__DISP1_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT5, 0x6e0, 0x2e0, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT5__DISP1_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT6, 0x6e4, 0x2e4, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT6__BOOT_USB_SRC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT6, 0x6e4, 0x2e4, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT6__DISP1_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT7, 0x6e8, 0x2e8, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT7__BOOT_EEPROM_CFG */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT7, 0x6e8, 0x2e8, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT7__DISP1_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT8, 0x6ec, 0x2ec, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT8__BOOT_SRC0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT8, 0x6ec, 0x2ec, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT8__DISP1_DAT8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT9, 0x6f0, 0x2f0, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT9__BOOT_SRC1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT9, 0x6f0, 0x2f0, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT9__DISP1_DAT9 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT10, 0x6f4, 0x2f4, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT10__BOOT_SPARE_SIZE */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT10, 0x6f4, 0x2f4, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT10__DISP1_DAT10 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT11, 0x6f8, 0x2f8, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT11__BOOT_LPB_FREQ2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT11, 0x6f8, 0x2f8, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT11__DISP1_DAT11 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT12, 0x6fc, 0x2fc, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT12__BOOT_MLC_SEL */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT12, 0x6fc, 0x2fc, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT12__DISP1_DAT12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT13, 0x700, 0x300, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT13__BOOT_MEM_CTL0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT13, 0x700, 0x300, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT13__DISP1_DAT13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT14, 0x704, 0x304, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT14__BOOT_MEM_CTL1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT14, 0x704, 0x304, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT14__DISP1_DAT14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT15, 0x708, 0x308, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT15__BOOT_BUS_WIDTH */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT15, 0x708, 0x308, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT15__DISP1_DAT15 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT16, 0x70c, 0x30c, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT16__BOOT_PAGE_SIZE0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT16, 0x70c, 0x30c, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT16__DISP1_DAT16 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT17, 0x710, 0x310, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT17__BOOT_PAGE_SIZE1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT17, 0x710, 0x310, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT17__DISP1_DAT17 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT18, 0x714, 0x314, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT18__BOOT_WEIM_MUXED0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT18, 0x714, 0x314, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT18__DISP1_DAT18 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT18, 0x714, 0x314, 5, 0x000, 0), /* MX51_PAD_DISP1_DAT18__DISP2_PIN11 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT18, 0x714, 0x314, 4, 0x000, 0), /* MX51_PAD_DISP1_DAT18__DISP2_PIN5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT19, 0x718, 0x318, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT19__BOOT_WEIM_MUXED1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT19, 0x718, 0x318, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT19__DISP1_DAT19 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT19, 0x718, 0x318, 5, 0x000, 0), /* MX51_PAD_DISP1_DAT19__DISP2_PIN12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT19, 0x718, 0x318, 4, 0x000, 0), /* MX51_PAD_DISP1_DAT19__DISP2_PIN6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT20, 0x71c, 0x31c, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT20__BOOT_MEM_TYPE0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT20, 0x71c, 0x31c, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT20__DISP1_DAT20 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT20, 0x71c, 0x31c, 5, 0x000, 0), /* MX51_PAD_DISP1_DAT20__DISP2_PIN13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT20, 0x71c, 0x31c, 4, 0x000, 0), /* MX51_PAD_DISP1_DAT20__DISP2_PIN7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT21, 0x720, 0x320, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT21__BOOT_MEM_TYPE1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT21, 0x720, 0x320, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT21__DISP1_DAT21 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT21, 0x720, 0x320, 5, 0x000, 0), /* MX51_PAD_DISP1_DAT21__DISP2_PIN14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT21, 0x720, 0x320, 4, 0x000, 0), /* MX51_PAD_DISP1_DAT21__DISP2_PIN8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT22, 0x724, 0x324, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT22__BOOT_LPB_FREQ0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT22, 0x724, 0x324, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT22__DISP1_DAT22 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT22, 0x724, 0x324, 6, 0x000, 0), /* MX51_PAD_DISP1_DAT22__DISP2_D0_CS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT22, 0x724, 0x324, 5, 0x000, 0), /* MX51_PAD_DISP1_DAT22__DISP2_DAT16 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT23, 0x728, 0x328, 7, 0x000, 0), /* MX51_PAD_DISP1_DAT23__BOOT_LPB_FREQ1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT23, 0x728, 0x328, 0, 0x000, 0), /* MX51_PAD_DISP1_DAT23__DISP1_DAT23 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT23, 0x728, 0x328, 6, 0x000, 0), /* MX51_PAD_DISP1_DAT23__DISP2_D1_CS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT23, 0x728, 0x328, 5, 0x000, 0), /* MX51_PAD_DISP1_DAT23__DISP2_DAT17 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP1_DAT23, 0x728, 0x328, 4, 0x000, 0), /* MX51_PAD_DISP1_DAT23__DISP2_SER_CS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_PIN3, 0x72c, 0x32c, 0, 0x000, 0), /* MX51_PAD_DI1_PIN3__DI1_PIN3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI1_PIN2, 0x734, 0x330, 0, 0x000, 0), /* MX51_PAD_DI1_PIN2__DI1_PIN2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI_GP2, 0x740, 0x338, 0, 0x000, 0), /* MX51_PAD_DI_GP2__DISP1_SER_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI_GP2, 0x740, 0x338, 2, 0x9a8, 1), /* MX51_PAD_DI_GP2__DISP2_WAIT */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI_GP3, 0x744, 0x33c, 3, 0x9a0, 1), /* MX51_PAD_DI_GP3__CSI1_DATA_EN */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI_GP3, 0x744, 0x33c, 0, 0x9c0, 0), /* MX51_PAD_DI_GP3__DISP1_SER_DIO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI_GP3, 0x744, 0x33c, 2, 0x000, 0), /* MX51_PAD_DI_GP3__FEC_TX_ER */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI2_PIN4, 0x748, 0x340, 3, 0x99c, 1), /* MX51_PAD_DI2_PIN4__CSI2_DATA_EN */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI2_PIN4, 0x748, 0x340, 0, 0x000, 0), /* MX51_PAD_DI2_PIN4__DI2_PIN4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI2_PIN4, 0x748, 0x340, 2, 0x950, 1), /* MX51_PAD_DI2_PIN4__FEC_CRS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI2_PIN2, 0x74c, 0x344, 0, 0x000, 0), /* MX51_PAD_DI2_PIN2__DI2_PIN2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI2_PIN2, 0x74c, 0x344, 2, 0x000, 0), /* MX51_PAD_DI2_PIN2__FEC_MDC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI2_PIN3, 0x750, 0x348, 0, 0x000, 0), /* MX51_PAD_DI2_PIN3__DI2_PIN3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI2_PIN3, 0x750, 0x348, 2, 0x954, 1), /* MX51_PAD_DI2_PIN3__FEC_MDIO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI2_DISP_CLK, 0x754, 0x34c, 0, 0x000, 0), /* MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI2_DISP_CLK, 0x754, 0x34c, 2, 0x95c, 1), /* MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI_GP4, 0x758, 0x350, 4, 0x000, 0), /* MX51_PAD_DI_GP4__DI2_PIN15 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI_GP4, 0x758, 0x350, 0, 0x9c0, 1), /* MX51_PAD_DI_GP4__DISP1_SER_DIN */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI_GP4, 0x758, 0x350, 3, 0x000, 0), /* MX51_PAD_DI_GP4__DISP2_PIN1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DI_GP4, 0x758, 0x350, 2, 0x960, 1), /* MX51_PAD_DI_GP4__FEC_RDATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT0, 0x75c, 0x354, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT0__DISP2_DAT0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT0, 0x75c, 0x354, 2, 0x964, 1), /* MX51_PAD_DISP2_DAT0__FEC_RDATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT0, 0x75c, 0x354, 4, 0x9c8, 1), /* MX51_PAD_DISP2_DAT0__KEY_COL6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT0, 0x75c, 0x354, 5, 0x9f4, 8), /* MX51_PAD_DISP2_DAT0__UART3_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT0, 0x75c, 0x354, 3, 0x9f8, 1), /* MX51_PAD_DISP2_DAT0__USBH3_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT1, 0x760, 0x358, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT1__DISP2_DAT1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT1, 0x760, 0x358, 2, 0x970, 1), /* MX51_PAD_DISP2_DAT1__FEC_RX_ER */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT1, 0x760, 0x358, 4, 0x9cc, 1), /* MX51_PAD_DISP2_DAT1__KEY_COL7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT1, 0x760, 0x358, 5, 0x000, 0), /* MX51_PAD_DISP2_DAT1__UART3_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT1, 0x760, 0x358, 3, 0xa1c, 1), /* MX51_PAD_DISP2_DAT1__USBH3_DIR */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT2, 0x764, 0x35c, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT2__DISP2_DAT2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT3, 0x768, 0x360, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT3__DISP2_DAT3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT4, 0x76c, 0x364, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT4__DISP2_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT5, 0x770, 0x368, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT5__DISP2_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT6, 0x774, 0x36c, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT6__DISP2_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT6, 0x774, 0x36c, 2, 0x000, 0), /* MX51_PAD_DISP2_DAT6__FEC_TDATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT6, 0x774, 0x36c, 5, 0x000, 0), /* MX51_PAD_DISP2_DAT6__GPIO1_19 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT6, 0x774, 0x36c, 4, 0x9d0, 1), /* MX51_PAD_DISP2_DAT6__KEY_ROW4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT6, 0x774, 0x36c, 3, 0xa24, 1), /* MX51_PAD_DISP2_DAT6__USBH3_STP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT7, 0x778, 0x370, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT7__DISP2_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT7, 0x778, 0x370, 2, 0x000, 0), /* MX51_PAD_DISP2_DAT7__FEC_TDATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT7, 0x778, 0x370, 5, 0x000, 0), /* MX51_PAD_DISP2_DAT7__GPIO1_29 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT7, 0x778, 0x370, 4, 0x9d4, 1), /* MX51_PAD_DISP2_DAT7__KEY_ROW5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT7, 0x778, 0x370, 3, 0xa20, 1), /* MX51_PAD_DISP2_DAT7__USBH3_NXT */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT8, 0x77c, 0x374, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT8__DISP2_DAT8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT8, 0x77c, 0x374, 2, 0x000, 0), /* MX51_PAD_DISP2_DAT8__FEC_TDATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT8, 0x77c, 0x374, 5, 0x000, 0), /* MX51_PAD_DISP2_DAT8__GPIO1_30 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT8, 0x77c, 0x374, 4, 0x9d8, 1), /* MX51_PAD_DISP2_DAT8__KEY_ROW6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT8, 0x77c, 0x374, 3, 0x9fc, 1), /* MX51_PAD_DISP2_DAT8__USBH3_DATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT9, 0x780, 0x378, 4, 0x8f4, 1), /* MX51_PAD_DISP2_DAT9__AUD6_RXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT9, 0x780, 0x378, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT9__DISP2_DAT9 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT9, 0x780, 0x378, 2, 0x000, 0), /* MX51_PAD_DISP2_DAT9__FEC_TX_EN */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT9, 0x780, 0x378, 5, 0x000, 0), /* MX51_PAD_DISP2_DAT9__GPIO1_31 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT9, 0x780, 0x378, 3, 0xa00, 1), /* MX51_PAD_DISP2_DAT9__USBH3_DATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT10, 0x784, 0x37c, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT10__DISP2_DAT10 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT10, 0x784, 0x37c, 5, 0x000, 0), /* MX51_PAD_DISP2_DAT10__DISP2_SER_CS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT10, 0x784, 0x37c, 2, 0x94c, 1), /* MX51_PAD_DISP2_DAT10__FEC_COL */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT10, 0x784, 0x37c, 4, 0x9dc, 1), /* MX51_PAD_DISP2_DAT10__KEY_ROW7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT10, 0x784, 0x37c, 3, 0xa04, 1), /* MX51_PAD_DISP2_DAT10__USBH3_DATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT11, 0x788, 0x380, 4, 0x8f0, 1), /* MX51_PAD_DISP2_DAT11__AUD6_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT11, 0x788, 0x380, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT11__DISP2_DAT11 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT11, 0x788, 0x380, 2, 0x968, 1), /* MX51_PAD_DISP2_DAT11__FEC_RX_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT11, 0x788, 0x380, 7, 0x000, 0), /* MX51_PAD_DISP2_DAT11__GPIO1_10 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT11, 0x788, 0x380, 3, 0xa08, 1), /* MX51_PAD_DISP2_DAT11__USBH3_DATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT12, 0x78c, 0x384, 4, 0x8ec, 1), /* MX51_PAD_DISP2_DAT12__AUD6_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT12, 0x78c, 0x384, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT12__DISP2_DAT12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT12, 0x78c, 0x384, 2, 0x96c, 1), /* MX51_PAD_DISP2_DAT12__FEC_RX_DV */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT12, 0x78c, 0x384, 3, 0xa0c, 1), /* MX51_PAD_DISP2_DAT12__USBH3_DATA4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT13, 0x790, 0x388, 4, 0x8fc, 1), /* MX51_PAD_DISP2_DAT13__AUD6_TXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT13, 0x790, 0x388, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT13__DISP2_DAT13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT13, 0x790, 0x388, 2, 0x974, 1), /* MX51_PAD_DISP2_DAT13__FEC_TX_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT13, 0x790, 0x388, 3, 0xa10, 1), /* MX51_PAD_DISP2_DAT13__USBH3_DATA5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT14, 0x794, 0x38c, 4, 0x900, 1), /* MX51_PAD_DISP2_DAT14__AUD6_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT14, 0x794, 0x38c, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT14__DISP2_DAT14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT14, 0x794, 0x38c, 2, 0x958, 1), /* MX51_PAD_DISP2_DAT14__FEC_RDATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT14, 0x794, 0x38c, 3, 0xa14, 1), /* MX51_PAD_DISP2_DAT14__USBH3_DATA6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT15, 0x798, 0x390, 4, 0x8f8, 1), /* MX51_PAD_DISP2_DAT15__AUD6_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT15, 0x798, 0x390, 5, 0x000, 0), /* MX51_PAD_DISP2_DAT15__DISP1_SER_CS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT15, 0x798, 0x390, 0, 0x000, 0), /* MX51_PAD_DISP2_DAT15__DISP2_DAT15 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT15, 0x798, 0x390, 2, 0x000, 0), /* MX51_PAD_DISP2_DAT15__FEC_TDATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_DISP2_DAT15, 0x798, 0x390, 3, 0xa18, 1), /* MX51_PAD_DISP2_DAT15__USBH3_DATA7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_CMD, 0x79c, 0x394, 1, 0x8e0, 1), /* MX51_PAD_SD1_CMD__AUD5_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_CMD, 0x79c, 0x394, 2, 0x91c, 2), /* MX51_PAD_SD1_CMD__CSPI_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_CMD, 0x79c, 0x394, 0, 0x000, 0), /* MX51_PAD_SD1_CMD__SD1_CMD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_CLK, 0x7a0, 0x398, 1, 0x8dc, 1), /* MX51_PAD_SD1_CLK__AUD5_RXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_CLK, 0x7a0, 0x398, 2, 0x914, 2), /* MX51_PAD_SD1_CLK__CSPI_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_CLK, 0x7a0, 0x398, 0, 0x000, 0), /* MX51_PAD_SD1_CLK__SD1_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_DATA0, 0x7a4, 0x39c, 1, 0x8d8, 2), /* MX51_PAD_SD1_DATA0__AUD5_TXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_DATA0, 0x7a4, 0x39c, 2, 0x918, 1), /* MX51_PAD_SD1_DATA0__CSPI_MISO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_DATA0, 0x7a4, 0x39c, 0, 0x000, 0), /* MX51_PAD_SD1_DATA0__SD1_DATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA0, NO_PAD, 0x01c, 0, 0x000, 0), /* MX51_PAD_EIM_DA0__EIM_DA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA1, NO_PAD, 0x020, 0, 0x000, 0), /* MX51_PAD_EIM_DA1__EIM_DA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA2, NO_PAD, 0x024, 0, 0x000, 0), /* MX51_PAD_EIM_DA2__EIM_DA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA3, NO_PAD, 0x028, 0, 0x000, 0), /* MX51_PAD_EIM_DA3__EIM_DA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_DATA1, 0x7a8, 0x3a0, 1, 0x8d4, 2), /* MX51_PAD_SD1_DATA1__AUD5_RXD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_DATA1, 0x7a8, 0x3a0, 0, 0x000, 0), /* MX51_PAD_SD1_DATA1__SD1_DATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA4, NO_PAD, 0x02c, 0, 0x000, 0), /* MX51_PAD_EIM_DA4__EIM_DA4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA5, NO_PAD, 0x030, 0, 0x000, 0), /* MX51_PAD_EIM_DA5__EIM_DA5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA6, NO_PAD, 0x034, 0, 0x000, 0), /* MX51_PAD_EIM_DA6__EIM_DA6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA7, NO_PAD, 0x038, 0, 0x000, 0), /* MX51_PAD_EIM_DA7__EIM_DA7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_DATA2, 0x7ac, 0x3a4, 1, 0x8e4, 2), /* MX51_PAD_SD1_DATA2__AUD5_TXC */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_DATA2, 0x7ac, 0x3a4, 0, 0x000, 0), /* MX51_PAD_SD1_DATA2__SD1_DATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA10, NO_PAD, 0x044, 0, 0x000, 0), /* MX51_PAD_EIM_DA10__EIM_DA10 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA11, NO_PAD, 0x048, 0, 0x000, 0), /* MX51_PAD_EIM_DA11__EIM_DA11 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA8, NO_PAD, 0x03c, 0, 0x000, 0), /* MX51_PAD_EIM_DA8__EIM_DA8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA9, NO_PAD, 0x040, 0, 0x000, 0), /* MX51_PAD_EIM_DA9__EIM_DA9 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_DATA3, 0x7b0, 0x3a8, 1, 0x8e8, 2), /* MX51_PAD_SD1_DATA3__AUD5_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_DATA3, 0x7b0, 0x3a8, 2, 0x920, 1), /* MX51_PAD_SD1_DATA3__CSPI_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD1_DATA3, 0x7b0, 0x3a8, 0, 0x000, 0), /* MX51_PAD_SD1_DATA3__SD1_DATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_0, 0x7b4, 0x3ac, 2, 0x924, 0), /* MX51_PAD_GPIO1_0__CSPI_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_0, 0x7b4, 0x3ac, 1, 0x000, 0), /* MX51_PAD_GPIO1_0__GPIO1_0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_0, 0x7b4, 0x3ac, 0, 0x000, 0), /* MX51_PAD_GPIO1_0__SD1_CD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_1, 0x7b8, 0x3b0, 2, 0x918, 2), /* MX51_PAD_GPIO1_1__CSPI_MISO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_1, 0x7b8, 0x3b0, 1, 0x000, 0), /* MX51_PAD_GPIO1_1__GPIO1_1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_1, 0x7b8, 0x3b0, 0, 0x000, 0), /* MX51_PAD_GPIO1_1__SD1_WP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA12, NO_PAD, 0x04c, 0, 0x000, 0), /* MX51_PAD_EIM_DA12__EIM_DA12 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA13, NO_PAD, 0x050, 0, 0x000, 0), /* MX51_PAD_EIM_DA13__EIM_DA13 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA14, NO_PAD, 0x054, 0, 0x000, 0), /* MX51_PAD_EIM_DA14__EIM_DA14 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_EIM_DA15, NO_PAD, 0x058, 0, 0x000, 0), /* MX51_PAD_EIM_DA15__EIM_DA15 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_CMD, NO_PAD, 0x3b4, 2, 0x91c, 3), /* MX51_PAD_SD2_CMD__CSPI_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_CMD, 0x7bc, 0x3b4, 1, 0x9b0, 2), /* MX51_PAD_SD2_CMD__I2C1_SCL */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_CMD, 0x7bc, 0x3b4, 0, 0x000, 0), /* MX51_PAD_SD2_CMD__SD2_CMD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_CLK, 0x7c0, 0x3b8, 2, 0x914, 3), /* MX51_PAD_SD2_CLK__CSPI_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_CLK, 0x7c0, 0x3b8, 1, 0x9b4, 2), /* MX51_PAD_SD2_CLK__I2C1_SDA */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_CLK, 0x7c0, 0x3b8, 0, 0x000, 0), /* MX51_PAD_SD2_CLK__SD2_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_DATA0, 0x7c4, 0x3bc, 2, 0x918, 3), /* MX51_PAD_SD2_DATA0__CSPI_MISO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_DATA0, 0x7c4, 0x3bc, 1, 0x000, 0), /* MX51_PAD_SD2_DATA0__SD1_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_DATA0, 0x7c4, 0x3bc, 0, 0x000, 0), /* MX51_PAD_SD2_DATA0__SD2_DATA0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_DATA1, 0x7c8, 0x3c0, 1, 0x000, 0), /* MX51_PAD_SD2_DATA1__SD1_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_DATA1, 0x7c8, 0x3c0, 0, 0x000, 0), /* MX51_PAD_SD2_DATA1__SD2_DATA1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_DATA1, 0x7c8, 0x3c0, 2, 0x000, 0), /* MX51_PAD_SD2_DATA1__USBH3_H2_DP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_DATA2, 0x7cc, 0x3c4, 1, 0x000, 0), /* MX51_PAD_SD2_DATA2__SD1_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_DATA2, 0x7cc, 0x3c4, 0, 0x000, 0), /* MX51_PAD_SD2_DATA2__SD2_DATA2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_DATA2, 0x7cc, 0x3c4, 2, 0x000, 0), /* MX51_PAD_SD2_DATA2__USBH3_H2_DM */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_DATA3, 0x7d0, 0x3c8, 2, 0x924, 1), /* MX51_PAD_SD2_DATA3__CSPI_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_DATA3, 0x7d0, 0x3c8, 1, 0x000, 0), /* MX51_PAD_SD2_DATA3__SD1_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_SD2_DATA3, 0x7d0, 0x3c8, 0, 0x000, 0), /* MX51_PAD_SD2_DATA3__SD2_DATA3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_2, 0x7d4, 0x3cc, 5, 0x000, 0), /* MX51_PAD_GPIO1_2__CCM_OUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_2, 0x7d4, 0x3cc, 0, 0x000, 0), /* MX51_PAD_GPIO1_2__GPIO1_2 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_2, 0x7d4, 0x3cc, 2, 0x9b8, 3), /* MX51_PAD_GPIO1_2__I2C2_SCL */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_2, 0x7d4, 0x3cc, 7, 0x90c, 1), /* MX51_PAD_GPIO1_2__PLL1_BYP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_2, 0x7d4, 0x3cc, 1, 0x000, 0), /* MX51_PAD_GPIO1_2__PWM1_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_3, 0x7d8, 0x3d0, 0, 0x000, 0), /* MX51_PAD_GPIO1_3__GPIO1_3 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_3, 0x7d8, 0x3d0, 2, 0x9bc, 3), /* MX51_PAD_GPIO1_3__I2C2_SDA */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_3, 0x7d8, 0x3d0, 7, 0x910, 1), /* MX51_PAD_GPIO1_3__PLL2_BYP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_3, 0x7d8, 0x3d0, 1, 0x000, 0), /* MX51_PAD_GPIO1_3__PWM2_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_PMIC_INT_REQ, 0x7fc, 0x3d4, 0, 0x000, 0), /* MX51_PAD_PMIC_INT_REQ__PMIC_INT_REQ */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_PMIC_INT_REQ, 0x7fc, 0x3d4, 1, 0x000, 0), /* MX51_PAD_PMIC_INT_REQ__PMIC_PMU_IRQ_B */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_4, 0x804, 0x3d8, 4, 0x908, 1), /* MX51_PAD_GPIO1_4__DISP2_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_4, 0x804, 0x3d8, 3, 0x938, 1), /* MX51_PAD_GPIO1_4__EIM_RDY */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_4, 0x804, 0x3d8, 0, 0x000, 0), /* MX51_PAD_GPIO1_4__GPIO1_4 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_4, 0x804, 0x3d8, 2, 0x000, 0), /* MX51_PAD_GPIO1_4__WDOG1_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_5, 0x808, 0x3dc, 6, 0x000, 0), /* MX51_PAD_GPIO1_5__CSI2_MCLK */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_5, 0x808, 0x3dc, 3, 0x000, 0), /* MX51_PAD_GPIO1_5__DISP2_PIN16 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_5, 0x808, 0x3dc, 0, 0x000, 0), /* MX51_PAD_GPIO1_5__GPIO1_5 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_5, 0x808, 0x3dc, 2, 0x000, 0), /* MX51_PAD_GPIO1_5__WDOG2_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_6, 0x80c, 0x3e0, 4, 0x000, 0), /* MX51_PAD_GPIO1_6__DISP2_PIN17 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_6, 0x80c, 0x3e0, 0, 0x000, 0), /* MX51_PAD_GPIO1_6__GPIO1_6 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_6, 0x80c, 0x3e0, 3, 0x000, 0), /* MX51_PAD_GPIO1_6__REF_EN_B */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_7, 0x810, 0x3e4, 3, 0x000, 0), /* MX51_PAD_GPIO1_7__CCM_OUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_7, 0x810, 0x3e4, 0, 0x000, 0), /* MX51_PAD_GPIO1_7__GPIO1_7 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_7, 0x810, 0x3e4, 6, 0x000, 0), /* MX51_PAD_GPIO1_7__SD2_WP */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_7, 0x810, 0x3e4, 2, 0x000, 0), /* MX51_PAD_GPIO1_7__SPDIF_OUT1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_8, 0x814, 0x3e8, 2, 0x99c, 2), /* MX51_PAD_GPIO1_8__CSI2_DATA_EN */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_8, 0x814, 0x3e8, 0, 0x000, 0), /* MX51_PAD_GPIO1_8__GPIO1_8 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_8, 0x814, 0x3e8, 6, 0x000, 0), /* MX51_PAD_GPIO1_8__SD2_CD */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_8, 0x814, 0x3e8, 1, 0x000, 0), /* MX51_PAD_GPIO1_8__USBH3_PWR */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_9, 0x818, 0x3ec, 3, 0x000, 0), /* MX51_PAD_GPIO1_9__CCM_OUT_1 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_9, 0x818, 0x3ec, 2, 0x000, 0), /* MX51_PAD_GPIO1_9__DISP2_D1_CS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_9, 0x818, 0x3ec, 7, 0x000, 0), /* MX51_PAD_GPIO1_9__DISP2_SER_CS */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_9, 0x818, 0x3ec, 0, 0x000, 0), /* MX51_PAD_GPIO1_9__GPIO1_9 */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_9, 0x818, 0x3ec, 6, 0x000, 0), /* MX51_PAD_GPIO1_9__SD2_LCTL */</div><div class='add'>+	IMX_PIN_REG(MX51_PAD_GPIO1_9, 0x818, 0x3ec, 1, 0x000, 0), /* MX51_PAD_GPIO1_9__USBH3_OC */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad names for the pinmux subsystem */</div><div class='add'>+static const struct pinctrl_pin_desc imx51_pinctrl_pads[] = {</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D20),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D21),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D22),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D23),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D24),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D25),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D26),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D27),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D28),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D29),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D30),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_D31),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_A16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_A17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_A18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_A19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_A20),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_A21),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_A22),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_A23),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_A24),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_A25),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_A26),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_A27),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_EB0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_EB1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_EB2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_EB3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_OE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_CS0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_CS1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_CS2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_CS3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_CS4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_CS5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DTACK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_LBA),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_CRE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DRAM_CS1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_WE_B),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_RE_B),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_ALE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_CLE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_WP_B),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_RB0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_RB1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_RB2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_RB3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_GPIO_NAND),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_RDY_INT),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_NANDF_D0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_D8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_D9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_D10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_D11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_D12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_D13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_D14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_D15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_D16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_D17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_D18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_D19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_VSYNC),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_HSYNC),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_PIXCLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI1_MCLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI2_D12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI2_D13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI2_D14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI2_D15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI2_D16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI2_D17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI2_D18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI2_D19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI2_VSYNC),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI2_HSYNC),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSI2_PIXCLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_I2C1_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_I2C1_DAT),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_AUD3_BB_TXD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_AUD3_BB_RXD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_AUD3_BB_CK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_AUD3_BB_FS),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSPI1_MOSI),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSPI1_MISO),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSPI1_SS0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSPI1_SS1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSPI1_RDY),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_CSPI1_SCLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_UART1_RXD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_UART1_TXD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_UART1_RTS),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_UART1_CTS),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_UART2_RXD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_UART2_TXD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_UART3_RXD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_UART3_TXD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_OWIRE_LINE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_KEY_ROW0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_KEY_ROW1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_KEY_ROW2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_KEY_ROW3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_KEY_COL0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_KEY_COL1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_KEY_COL2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_KEY_COL3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_KEY_COL4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_KEY_COL5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_USBH1_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_USBH1_DIR),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_USBH1_STP),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_USBH1_NXT),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI1_D0_CS),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI1_D1_CS),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISPB2_SER_DIN),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISPB2_SER_DIO),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISPB2_SER_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISPB2_SER_RS),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT20),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT21),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT22),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT23),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI_GP2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI_GP3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI2_PIN4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI2_PIN2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI2_PIN3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI2_DISP_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DI_GP4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_SD1_CMD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_SD1_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_SD1_DATA0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_SD1_DATA1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_SD1_DATA2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_SD1_DATA3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_GPIO1_0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_GPIO1_1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_EIM_DA15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_SD2_CMD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_SD2_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_SD2_DATA0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_SD2_DATA1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_SD2_DATA2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_SD2_DATA3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_GPIO1_2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_GPIO1_3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_PMIC_INT_REQ),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_GPIO1_4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_GPIO1_5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_GPIO1_6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_GPIO1_7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_GPIO1_8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX51_PAD_GPIO1_9),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct imx_pinctrl_soc_info imx51_pinctrl_info = {</div><div class='add'>+	.pins = imx51_pinctrl_pads,</div><div class='add'>+	.npins = ARRAY_SIZE(imx51_pinctrl_pads),</div><div class='add'>+	.pin_regs = imx51_pin_regs,</div><div class='add'>+	.npin_regs = ARRAY_SIZE(imx51_pin_regs),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct of_device_id imx51_pinctrl_of_match[] __devinitdata = {</div><div class='add'>+	{ .compatible = "fsl,imx51-iomuxc", },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit imx51_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return imx_pinctrl_probe(pdev, &amp;imx51_pinctrl_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver imx51_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "imx51-pinctrl",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = of_match_ptr(imx51_pinctrl_of_match),</div><div class='add'>+	},</div><div class='add'>+	.probe = imx51_pinctrl_probe,</div><div class='add'>+	.remove = __devexit_p(imx_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init imx51_pinctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;imx51_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(imx51_pinctrl_init);</div><div class='add'>+</div><div class='add'>+static void __exit imx51_pinctrl_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;imx51_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(imx51_pinctrl_exit);</div><div class='add'>+MODULE_AUTHOR("Dong Aisheng &lt;dong.aisheng@linaro.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Freescale IMX51 pinctrl driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-imx53.c b/drivers/pinctrl/pinctrl-imx53.c<br/>new file mode 100644<br/>index 000000000000..1f49e16a9bcd<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-imx53.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx53.c</a></div><div class='hunk'>@@ -0,0 +1,1649 @@</div><div class='add'>+/*</div><div class='add'>+ * imx53 pinctrl driver based on imx pinmux core</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright (C) 2012 Linaro, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Author: Dong Aisheng &lt;dong.aisheng@linaro.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+#include "pinctrl-imx.h"</div><div class='add'>+</div><div class='add'>+enum imx53_pads {</div><div class='add'>+	MX53_PAD_GPIO_19 = 1,</div><div class='add'>+	MX53_PAD_KEY_COL0 = 2,</div><div class='add'>+	MX53_PAD_KEY_ROW0 = 3,</div><div class='add'>+	MX53_PAD_KEY_COL1 = 4,</div><div class='add'>+	MX53_PAD_KEY_ROW1 = 5,</div><div class='add'>+	MX53_PAD_KEY_COL2 = 6,</div><div class='add'>+	MX53_PAD_KEY_ROW2 = 7,</div><div class='add'>+	MX53_PAD_KEY_COL3 = 8,</div><div class='add'>+	MX53_PAD_KEY_ROW3 = 9,</div><div class='add'>+	MX53_PAD_KEY_COL4 = 10,</div><div class='add'>+	MX53_PAD_KEY_ROW4 = 11,</div><div class='add'>+	MX53_PAD_DI0_DISP_CLK = 12,</div><div class='add'>+	MX53_PAD_DI0_PIN15 = 13,</div><div class='add'>+	MX53_PAD_DI0_PIN2 = 14,</div><div class='add'>+	MX53_PAD_DI0_PIN3 = 15,</div><div class='add'>+	MX53_PAD_DI0_PIN4 = 16,</div><div class='add'>+	MX53_PAD_DISP0_DAT0 = 17,</div><div class='add'>+	MX53_PAD_DISP0_DAT1 = 18,</div><div class='add'>+	MX53_PAD_DISP0_DAT2 = 19,</div><div class='add'>+	MX53_PAD_DISP0_DAT3 = 20,</div><div class='add'>+	MX53_PAD_DISP0_DAT4 = 21,</div><div class='add'>+	MX53_PAD_DISP0_DAT5 = 22,</div><div class='add'>+	MX53_PAD_DISP0_DAT6 = 23,</div><div class='add'>+	MX53_PAD_DISP0_DAT7 = 24,</div><div class='add'>+	MX53_PAD_DISP0_DAT8 = 25,</div><div class='add'>+	MX53_PAD_DISP0_DAT9 = 26,</div><div class='add'>+	MX53_PAD_DISP0_DAT10 = 27,</div><div class='add'>+	MX53_PAD_DISP0_DAT11 = 28,</div><div class='add'>+	MX53_PAD_DISP0_DAT12 = 29,</div><div class='add'>+	MX53_PAD_DISP0_DAT13 = 30,</div><div class='add'>+	MX53_PAD_DISP0_DAT14 = 31,</div><div class='add'>+	MX53_PAD_DISP0_DAT15 = 32,</div><div class='add'>+	MX53_PAD_DISP0_DAT16 = 33,</div><div class='add'>+	MX53_PAD_DISP0_DAT17 = 34,</div><div class='add'>+	MX53_PAD_DISP0_DAT18 = 35,</div><div class='add'>+	MX53_PAD_DISP0_DAT19 = 36,</div><div class='add'>+	MX53_PAD_DISP0_DAT20 = 37,</div><div class='add'>+	MX53_PAD_DISP0_DAT21 = 38,</div><div class='add'>+	MX53_PAD_DISP0_DAT22 = 39,</div><div class='add'>+	MX53_PAD_DISP0_DAT23 = 40,</div><div class='add'>+	MX53_PAD_CSI0_PIXCLK = 41,</div><div class='add'>+	MX53_PAD_CSI0_MCLK = 42,</div><div class='add'>+	MX53_PAD_CSI0_DATA_EN = 43,</div><div class='add'>+	MX53_PAD_CSI0_VSYNC = 44,</div><div class='add'>+	MX53_PAD_CSI0_DAT4 = 45,</div><div class='add'>+	MX53_PAD_CSI0_DAT5 = 46,</div><div class='add'>+	MX53_PAD_CSI0_DAT6 = 47,</div><div class='add'>+	MX53_PAD_CSI0_DAT7 = 48,</div><div class='add'>+	MX53_PAD_CSI0_DAT8 = 49,</div><div class='add'>+	MX53_PAD_CSI0_DAT9 = 50,</div><div class='add'>+	MX53_PAD_CSI0_DAT10 = 51,</div><div class='add'>+	MX53_PAD_CSI0_DAT11 = 52,</div><div class='add'>+	MX53_PAD_CSI0_DAT12 = 53,</div><div class='add'>+	MX53_PAD_CSI0_DAT13 = 54,</div><div class='add'>+	MX53_PAD_CSI0_DAT14 = 55,</div><div class='add'>+	MX53_PAD_CSI0_DAT15 = 56,</div><div class='add'>+	MX53_PAD_CSI0_DAT16 = 57,</div><div class='add'>+	MX53_PAD_CSI0_DAT17 = 58,</div><div class='add'>+	MX53_PAD_CSI0_DAT18 = 59,</div><div class='add'>+	MX53_PAD_CSI0_DAT19 = 60,</div><div class='add'>+	MX53_PAD_EIM_A25 = 61,</div><div class='add'>+	MX53_PAD_EIM_EB2 = 62,</div><div class='add'>+	MX53_PAD_EIM_D16 = 63,</div><div class='add'>+	MX53_PAD_EIM_D17 = 64,</div><div class='add'>+	MX53_PAD_EIM_D18 = 65,</div><div class='add'>+	MX53_PAD_EIM_D19 = 66,</div><div class='add'>+	MX53_PAD_EIM_D20 = 67,</div><div class='add'>+	MX53_PAD_EIM_D21 = 68,</div><div class='add'>+	MX53_PAD_EIM_D22 = 69,</div><div class='add'>+	MX53_PAD_EIM_D23 = 70,</div><div class='add'>+	MX53_PAD_EIM_EB3 = 71,</div><div class='add'>+	MX53_PAD_EIM_D24 = 72,</div><div class='add'>+	MX53_PAD_EIM_D25 = 73,</div><div class='add'>+	MX53_PAD_EIM_D26 = 74,</div><div class='add'>+	MX53_PAD_EIM_D27 = 75,</div><div class='add'>+	MX53_PAD_EIM_D28 = 76,</div><div class='add'>+	MX53_PAD_EIM_D29 = 77,</div><div class='add'>+	MX53_PAD_EIM_D30 = 78,</div><div class='add'>+	MX53_PAD_EIM_D31 = 79,</div><div class='add'>+	MX53_PAD_EIM_A24 = 80,</div><div class='add'>+	MX53_PAD_EIM_A23 = 81,</div><div class='add'>+	MX53_PAD_EIM_A22 = 82,</div><div class='add'>+	MX53_PAD_EIM_A21 = 83,</div><div class='add'>+	MX53_PAD_EIM_A20 = 84,</div><div class='add'>+	MX53_PAD_EIM_A19 = 85,</div><div class='add'>+	MX53_PAD_EIM_A18 = 86,</div><div class='add'>+	MX53_PAD_EIM_A17 = 87,</div><div class='add'>+	MX53_PAD_EIM_A16 = 88,</div><div class='add'>+	MX53_PAD_EIM_CS0 = 89,</div><div class='add'>+	MX53_PAD_EIM_CS1 = 90,</div><div class='add'>+	MX53_PAD_EIM_OE = 91,</div><div class='add'>+	MX53_PAD_EIM_RW = 92,</div><div class='add'>+	MX53_PAD_EIM_LBA = 93,</div><div class='add'>+	MX53_PAD_EIM_EB0 = 94,</div><div class='add'>+	MX53_PAD_EIM_EB1 = 95,</div><div class='add'>+	MX53_PAD_EIM_DA0 = 96,</div><div class='add'>+	MX53_PAD_EIM_DA1 = 97,</div><div class='add'>+	MX53_PAD_EIM_DA2 = 98,</div><div class='add'>+	MX53_PAD_EIM_DA3 = 99,</div><div class='add'>+	MX53_PAD_EIM_DA4 = 100,</div><div class='add'>+	MX53_PAD_EIM_DA5 = 101,</div><div class='add'>+	MX53_PAD_EIM_DA6 = 102,</div><div class='add'>+	MX53_PAD_EIM_DA7 = 103,</div><div class='add'>+	MX53_PAD_EIM_DA8 = 104,</div><div class='add'>+	MX53_PAD_EIM_DA9 = 105,</div><div class='add'>+	MX53_PAD_EIM_DA10 = 106,</div><div class='add'>+	MX53_PAD_EIM_DA11 = 107,</div><div class='add'>+	MX53_PAD_EIM_DA12 = 108,</div><div class='add'>+	MX53_PAD_EIM_DA13 = 109,</div><div class='add'>+	MX53_PAD_EIM_DA14 = 110,</div><div class='add'>+	MX53_PAD_EIM_DA15 = 111,</div><div class='add'>+	MX53_PAD_NANDF_WE_B = 112,</div><div class='add'>+	MX53_PAD_NANDF_RE_B = 113,</div><div class='add'>+	MX53_PAD_EIM_WAIT = 114,</div><div class='add'>+	MX53_PAD_LVDS1_TX3_P = 115,</div><div class='add'>+	MX53_PAD_LVDS1_TX2_P = 116,</div><div class='add'>+	MX53_PAD_LVDS1_CLK_P = 117,</div><div class='add'>+	MX53_PAD_LVDS1_TX1_P = 118,</div><div class='add'>+	MX53_PAD_LVDS1_TX0_P = 119,</div><div class='add'>+	MX53_PAD_LVDS0_TX3_P = 120,</div><div class='add'>+	MX53_PAD_LVDS0_CLK_P = 121,</div><div class='add'>+	MX53_PAD_LVDS0_TX2_P = 122,</div><div class='add'>+	MX53_PAD_LVDS0_TX1_P = 123,</div><div class='add'>+	MX53_PAD_LVDS0_TX0_P = 124,</div><div class='add'>+	MX53_PAD_GPIO_10 = 125,</div><div class='add'>+	MX53_PAD_GPIO_11 = 126,</div><div class='add'>+	MX53_PAD_GPIO_12 = 127,</div><div class='add'>+	MX53_PAD_GPIO_13 = 128,</div><div class='add'>+	MX53_PAD_GPIO_14 = 129,</div><div class='add'>+	MX53_PAD_NANDF_CLE = 130,</div><div class='add'>+	MX53_PAD_NANDF_ALE = 131,</div><div class='add'>+	MX53_PAD_NANDF_WP_B = 132,</div><div class='add'>+	MX53_PAD_NANDF_RB0 = 133,</div><div class='add'>+	MX53_PAD_NANDF_CS0 = 134,</div><div class='add'>+	MX53_PAD_NANDF_CS1 = 135,</div><div class='add'>+	MX53_PAD_NANDF_CS2 = 136,</div><div class='add'>+	MX53_PAD_NANDF_CS3 = 137,</div><div class='add'>+	MX53_PAD_FEC_MDIO = 138,</div><div class='add'>+	MX53_PAD_FEC_REF_CLK = 139,</div><div class='add'>+	MX53_PAD_FEC_RX_ER = 140,</div><div class='add'>+	MX53_PAD_FEC_CRS_DV = 141,</div><div class='add'>+	MX53_PAD_FEC_RXD1 = 142,</div><div class='add'>+	MX53_PAD_FEC_RXD0 = 143,</div><div class='add'>+	MX53_PAD_FEC_TX_EN = 144,</div><div class='add'>+	MX53_PAD_FEC_TXD1 = 145,</div><div class='add'>+	MX53_PAD_FEC_TXD0 = 146,</div><div class='add'>+	MX53_PAD_FEC_MDC = 147,</div><div class='add'>+	MX53_PAD_PATA_DIOW = 148,</div><div class='add'>+	MX53_PAD_PATA_DMACK = 149,</div><div class='add'>+	MX53_PAD_PATA_DMARQ = 150,</div><div class='add'>+	MX53_PAD_PATA_BUFFER_EN = 151,</div><div class='add'>+	MX53_PAD_PATA_INTRQ = 152,</div><div class='add'>+	MX53_PAD_PATA_DIOR = 153,</div><div class='add'>+	MX53_PAD_PATA_RESET_B = 154,</div><div class='add'>+	MX53_PAD_PATA_IORDY = 155,</div><div class='add'>+	MX53_PAD_PATA_DA_0 = 156,</div><div class='add'>+	MX53_PAD_PATA_DA_1 = 157,</div><div class='add'>+	MX53_PAD_PATA_DA_2 = 158,</div><div class='add'>+	MX53_PAD_PATA_CS_0 = 159,</div><div class='add'>+	MX53_PAD_PATA_CS_1 = 160,</div><div class='add'>+	MX53_PAD_PATA_DATA0 = 161,</div><div class='add'>+	MX53_PAD_PATA_DATA1 = 162,</div><div class='add'>+	MX53_PAD_PATA_DATA2 = 163,</div><div class='add'>+	MX53_PAD_PATA_DATA3 = 164,</div><div class='add'>+	MX53_PAD_PATA_DATA4 = 165,</div><div class='add'>+	MX53_PAD_PATA_DATA5 = 166,</div><div class='add'>+	MX53_PAD_PATA_DATA6 = 167,</div><div class='add'>+	MX53_PAD_PATA_DATA7 = 168,</div><div class='add'>+	MX53_PAD_PATA_DATA8 = 169,</div><div class='add'>+	MX53_PAD_PATA_DATA9 = 170,</div><div class='add'>+	MX53_PAD_PATA_DATA10 = 171,</div><div class='add'>+	MX53_PAD_PATA_DATA11 = 172,</div><div class='add'>+	MX53_PAD_PATA_DATA12 = 173,</div><div class='add'>+	MX53_PAD_PATA_DATA13 = 174,</div><div class='add'>+	MX53_PAD_PATA_DATA14 = 175,</div><div class='add'>+	MX53_PAD_PATA_DATA15 = 176,</div><div class='add'>+	MX53_PAD_SD1_DATA0 = 177,</div><div class='add'>+	MX53_PAD_SD1_DATA1 = 178,</div><div class='add'>+	MX53_PAD_SD1_CMD = 179,</div><div class='add'>+	MX53_PAD_SD1_DATA2 = 180,</div><div class='add'>+	MX53_PAD_SD1_CLK = 181,</div><div class='add'>+	MX53_PAD_SD1_DATA3 = 182,</div><div class='add'>+	MX53_PAD_SD2_CLK = 183,</div><div class='add'>+	MX53_PAD_SD2_CMD = 184,</div><div class='add'>+	MX53_PAD_SD2_DATA3 = 185,</div><div class='add'>+	MX53_PAD_SD2_DATA2 = 186,</div><div class='add'>+	MX53_PAD_SD2_DATA1 = 187,</div><div class='add'>+	MX53_PAD_SD2_DATA0 = 188,</div><div class='add'>+	MX53_PAD_GPIO_0 = 189,</div><div class='add'>+	MX53_PAD_GPIO_1 = 190,</div><div class='add'>+	MX53_PAD_GPIO_9 = 191,</div><div class='add'>+	MX53_PAD_GPIO_3 = 192,</div><div class='add'>+	MX53_PAD_GPIO_6 = 193,</div><div class='add'>+	MX53_PAD_GPIO_2 = 194,</div><div class='add'>+	MX53_PAD_GPIO_4 = 195,</div><div class='add'>+	MX53_PAD_GPIO_5 = 196,</div><div class='add'>+	MX53_PAD_GPIO_7 = 197,</div><div class='add'>+	MX53_PAD_GPIO_8 = 198,</div><div class='add'>+	MX53_PAD_GPIO_16 = 199,</div><div class='add'>+	MX53_PAD_GPIO_17 = 200,</div><div class='add'>+	MX53_PAD_GPIO_18 = 201,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* imx53 register maps */</div><div class='add'>+static struct imx_pin_reg imx53_pin_regs[] = {</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_19, 0x348, 0x020, 0, 0x840, 0), /* MX53_PAD_GPIO_19__KPP_COL_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_19, 0x348, 0x020, 1, 0x000, 0), /* MX53_PAD_GPIO_19__GPIO4_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_19, 0x348, 0x020, 2, 0x000, 0), /* MX53_PAD_GPIO_19__CCM_CLKO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_19, 0x348, 0x020, 3, 0x000, 0), /* MX53_PAD_GPIO_19__SPDIF_OUT1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_19, 0x348, 0x020, 4, 0x000, 0), /* MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_19, 0x348, 0x020, 5, 0x000, 0), /* MX53_PAD_GPIO_19__ECSPI1_RDY */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_19, 0x348, 0x020, 6, 0x000, 0), /* MX53_PAD_GPIO_19__FEC_TDATA_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_19, 0x348, 0x020, 7, 0x000, 0), /* MX53_PAD_GPIO_19__SRC_INT_BOOT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL0, 0x34C, 0x024, 0, 0x000, 0), /* MX53_PAD_KEY_COL0__KPP_COL_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL0, 0x34C, 0x024, 1, 0x000, 0), /* MX53_PAD_KEY_COL0__GPIO4_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL0, 0x34C, 0x024, 2, 0x758, 0), /* MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL0, 0x34C, 0x024, 4, 0x000, 0), /* MX53_PAD_KEY_COL0__UART4_TXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL0, 0x34C, 0x024, 5, 0x79C, 0), /* MX53_PAD_KEY_COL0__ECSPI1_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL0, 0x34C, 0x024, 6, 0x000, 0), /* MX53_PAD_KEY_COL0__FEC_RDATA_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL0, 0x34C, 0x024, 7, 0x000, 0), /* MX53_PAD_KEY_COL0__SRC_ANY_PU_RST */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW0, 0x350, 0x028, 0, 0x000, 0), /* MX53_PAD_KEY_ROW0__KPP_ROW_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW0, 0x350, 0x028, 1, 0x000, 0), /* MX53_PAD_KEY_ROW0__GPIO4_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW0, 0x350, 0x028, 2, 0x74C, 0), /* MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW0, 0x350, 0x028, 4, 0x890, 1), /* MX53_PAD_KEY_ROW0__UART4_RXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW0, 0x350, 0x028, 5, 0x7A4, 0), /* MX53_PAD_KEY_ROW0__ECSPI1_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW0, 0x350, 0x028, 6, 0x000, 0), /* MX53_PAD_KEY_ROW0__FEC_TX_ER */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL1, 0x354, 0x02C, 0, 0x000, 0), /* MX53_PAD_KEY_COL1__KPP_COL_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL1, 0x354, 0x02C, 1, 0x000, 0), /* MX53_PAD_KEY_COL1__GPIO4_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL1, 0x354, 0x02C, 2, 0x75C, 0), /* MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL1, 0x354, 0x02C, 4, 0x000, 0), /* MX53_PAD_KEY_COL1__UART5_TXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL1, 0x354, 0x02C, 5, 0x7A0, 0), /* MX53_PAD_KEY_COL1__ECSPI1_MISO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL1, 0x354, 0x02C, 6, 0x808, 0), /* MX53_PAD_KEY_COL1__FEC_RX_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL1, 0x354, 0x02C, 7, 0x000, 0), /* MX53_PAD_KEY_COL1__USBPHY1_TXREADY */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW1, 0x358, 0x030, 0, 0x000, 0), /* MX53_PAD_KEY_ROW1__KPP_ROW_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW1, 0x358, 0x030, 1, 0x000, 0), /* MX53_PAD_KEY_ROW1__GPIO4_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW1, 0x358, 0x030, 2, 0x748, 0), /* MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW1, 0x358, 0x030, 4, 0x898, 1), /* MX53_PAD_KEY_ROW1__UART5_RXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW1, 0x358, 0x030, 5, 0x7A8, 0), /* MX53_PAD_KEY_ROW1__ECSPI1_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW1, 0x358, 0x030, 6, 0x800, 0), /* MX53_PAD_KEY_ROW1__FEC_COL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW1, 0x358, 0x030, 7, 0x000, 0), /* MX53_PAD_KEY_ROW1__USBPHY1_RXVALID */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL2, 0x35C, 0x034, 0, 0x000, 0), /* MX53_PAD_KEY_COL2__KPP_COL_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL2, 0x35C, 0x034, 1, 0x000, 0), /* MX53_PAD_KEY_COL2__GPIO4_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL2, 0x35C, 0x034, 2, 0x000, 0), /* MX53_PAD_KEY_COL2__CAN1_TXCAN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL2, 0x35C, 0x034, 4, 0x804, 0), /* MX53_PAD_KEY_COL2__FEC_MDIO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL2, 0x35C, 0x034, 5, 0x7AC, 0), /* MX53_PAD_KEY_COL2__ECSPI1_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL2, 0x35C, 0x034, 6, 0x000, 0), /* MX53_PAD_KEY_COL2__FEC_RDATA_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL2, 0x35C, 0x034, 7, 0x000, 0), /* MX53_PAD_KEY_COL2__USBPHY1_RXACTIVE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW2, 0x360, 0x038, 0, 0x000, 0), /* MX53_PAD_KEY_ROW2__KPP_ROW_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW2, 0x360, 0x038, 1, 0x000, 0), /* MX53_PAD_KEY_ROW2__GPIO4_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW2, 0x360, 0x038, 2, 0x760, 0), /* MX53_PAD_KEY_ROW2__CAN1_RXCAN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW2, 0x360, 0x038, 4, 0x000, 0), /* MX53_PAD_KEY_ROW2__FEC_MDC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW2, 0x360, 0x038, 5, 0x7B0, 0), /* MX53_PAD_KEY_ROW2__ECSPI1_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW2, 0x360, 0x038, 6, 0x000, 0), /* MX53_PAD_KEY_ROW2__FEC_TDATA_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW2, 0x360, 0x038, 7, 0x000, 0), /* MX53_PAD_KEY_ROW2__USBPHY1_RXERROR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL3, 0x364, 0x03C, 0, 0x000, 0), /* MX53_PAD_KEY_COL3__KPP_COL_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL3, 0x364, 0x03C, 1, 0x000, 0), /* MX53_PAD_KEY_COL3__GPIO4_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL3, 0x364, 0x03C, 2, 0x000, 0), /* MX53_PAD_KEY_COL3__USBOH3_H2_DP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL3, 0x364, 0x03C, 3, 0x870, 0), /* MX53_PAD_KEY_COL3__SPDIF_IN1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL3, 0x364, 0x03C, 4, 0x81C, 0), /* MX53_PAD_KEY_COL3__I2C2_SCL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL3, 0x364, 0x03C, 5, 0x7B4, 0), /* MX53_PAD_KEY_COL3__ECSPI1_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL3, 0x364, 0x03C, 6, 0x000, 0), /* MX53_PAD_KEY_COL3__FEC_CRS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL3, 0x364, 0x03C, 7, 0x000, 0), /* MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW3, 0x368, 0x040, 0, 0x000, 0), /* MX53_PAD_KEY_ROW3__KPP_ROW_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW3, 0x368, 0x040, 1, 0x000, 0), /* MX53_PAD_KEY_ROW3__GPIO4_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW3, 0x368, 0x040, 2, 0x000, 0), /* MX53_PAD_KEY_ROW3__USBOH3_H2_DM */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW3, 0x368, 0x040, 3, 0x768, 0), /* MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW3, 0x368, 0x040, 4, 0x820, 0), /* MX53_PAD_KEY_ROW3__I2C2_SDA */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW3, 0x368, 0x040, 5, 0x000, 0), /* MX53_PAD_KEY_ROW3__OSC32K_32K_OUT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW3, 0x368, 0x040, 6, 0x77C, 0), /* MX53_PAD_KEY_ROW3__CCM_PLL4_BYP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW3, 0x368, 0x040, 7, 0x000, 0), /* MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL4, 0x36C, 0x044, 0, 0x000, 0), /* MX53_PAD_KEY_COL4__KPP_COL_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL4, 0x36C, 0x044, 1, 0x000, 0), /* MX53_PAD_KEY_COL4__GPIO4_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL4, 0x36C, 0x044, 2, 0x000, 0), /* MX53_PAD_KEY_COL4__CAN2_TXCAN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL4, 0x36C, 0x044, 3, 0x000, 0), /* MX53_PAD_KEY_COL4__IPU_SISG_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL4, 0x36C, 0x044, 4, 0x894, 0), /* MX53_PAD_KEY_COL4__UART5_RTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL4, 0x36C, 0x044, 5, 0x89C, 0), /* MX53_PAD_KEY_COL4__USBOH3_USBOTG_OC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_COL4, 0x36C, 0x044, 7, 0x000, 0), /* MX53_PAD_KEY_COL4__USBPHY1_LINESTATE_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW4, 0x370, 0x048, 0, 0x000, 0), /* MX53_PAD_KEY_ROW4__KPP_ROW_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW4, 0x370, 0x048, 1, 0x000, 0), /* MX53_PAD_KEY_ROW4__GPIO4_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW4, 0x370, 0x048, 2, 0x764, 0), /* MX53_PAD_KEY_ROW4__CAN2_RXCAN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW4, 0x370, 0x048, 3, 0x000, 0), /* MX53_PAD_KEY_ROW4__IPU_SISG_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW4, 0x370, 0x048, 4, 0x000, 0), /* MX53_PAD_KEY_ROW4__UART5_CTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW4, 0x370, 0x048, 5, 0x000, 0), /* MX53_PAD_KEY_ROW4__USBOH3_USBOTG_PWR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_KEY_ROW4, 0x370, 0x048, 7, 0x000, 0), /* MX53_PAD_KEY_ROW4__USBPHY1_VBUSVALID */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_DISP_CLK, 0x378, 0x04C, 0, 0x000, 0), /* MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_DISP_CLK, 0x378, 0x04C, 1, 0x000, 0), /* MX53_PAD_DI0_DISP_CLK__GPIO4_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_DISP_CLK, 0x378, 0x04C, 2, 0x000, 0), /* MX53_PAD_DI0_DISP_CLK__USBOH3_USBH2_DIR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_DISP_CLK, 0x378, 0x04C, 5, 0x000, 0), /* MX53_PAD_DI0_DISP_CLK__SDMA_DEBUG_CORE_STATE_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_DISP_CLK, 0x378, 0x04C, 6, 0x000, 0), /* MX53_PAD_DI0_DISP_CLK__EMI_EMI_DEBUG_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_DISP_CLK, 0x378, 0x04C, 7, 0x000, 0), /* MX53_PAD_DI0_DISP_CLK__USBPHY1_AVALID */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN15, 0x37C, 0x050, 0, 0x000, 0), /* MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN15, 0x37C, 0x050, 1, 0x000, 0), /* MX53_PAD_DI0_PIN15__GPIO4_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN15, 0x37C, 0x050, 2, 0x000, 0), /* MX53_PAD_DI0_PIN15__AUDMUX_AUD6_TXC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN15, 0x37C, 0x050, 5, 0x000, 0), /* MX53_PAD_DI0_PIN15__SDMA_DEBUG_CORE_STATE_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN15, 0x37C, 0x050, 6, 0x000, 0), /* MX53_PAD_DI0_PIN15__EMI_EMI_DEBUG_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN15, 0x37C, 0x050, 7, 0x000, 0), /* MX53_PAD_DI0_PIN15__USBPHY1_BVALID */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN2, 0x380, 0x054, 0, 0x000, 0), /* MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN2, 0x380, 0x054, 1, 0x000, 0), /* MX53_PAD_DI0_PIN2__GPIO4_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN2, 0x380, 0x054, 2, 0x000, 0), /* MX53_PAD_DI0_PIN2__AUDMUX_AUD6_TXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN2, 0x380, 0x054, 5, 0x000, 0), /* MX53_PAD_DI0_PIN2__SDMA_DEBUG_CORE_STATE_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN2, 0x380, 0x054, 6, 0x000, 0), /* MX53_PAD_DI0_PIN2__EMI_EMI_DEBUG_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN2, 0x380, 0x054, 7, 0x000, 0), /* MX53_PAD_DI0_PIN2__USBPHY1_ENDSESSION */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN3, 0x384, 0x058, 0, 0x000, 0), /* MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN3, 0x384, 0x058, 1, 0x000, 0), /* MX53_PAD_DI0_PIN3__GPIO4_19 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN3, 0x384, 0x058, 2, 0x000, 0), /* MX53_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN3, 0x384, 0x058, 5, 0x000, 0), /* MX53_PAD_DI0_PIN3__SDMA_DEBUG_CORE_STATE_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN3, 0x384, 0x058, 6, 0x000, 0), /* MX53_PAD_DI0_PIN3__EMI_EMI_DEBUG_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN3, 0x384, 0x058, 7, 0x000, 0), /* MX53_PAD_DI0_PIN3__USBPHY1_IDDIG */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN4, 0x388, 0x05C, 0, 0x000, 0), /* MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN4, 0x388, 0x05C, 1, 0x000, 0), /* MX53_PAD_DI0_PIN4__GPIO4_20 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN4, 0x388, 0x05C, 2, 0x000, 0), /* MX53_PAD_DI0_PIN4__AUDMUX_AUD6_RXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN4, 0x388, 0x05C, 3, 0x7FC, 0), /* MX53_PAD_DI0_PIN4__ESDHC1_WP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN4, 0x388, 0x05C, 5, 0x000, 0), /* MX53_PAD_DI0_PIN4__SDMA_DEBUG_YIELD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN4, 0x388, 0x05C, 6, 0x000, 0), /* MX53_PAD_DI0_PIN4__EMI_EMI_DEBUG_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DI0_PIN4, 0x388, 0x05C, 7, 0x000, 0), /* MX53_PAD_DI0_PIN4__USBPHY1_HOSTDISCONNECT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT0, 0x38C, 0x060, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT0, 0x38C, 0x060, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT0__GPIO4_21 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT0, 0x38C, 0x060, 2, 0x780, 0), /* MX53_PAD_DISP0_DAT0__CSPI_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT0, 0x38C, 0x060, 3, 0x000, 0), /* MX53_PAD_DISP0_DAT0__USBOH3_USBH2_DATA_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT0, 0x38C, 0x060, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT0__SDMA_DEBUG_CORE_RUN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT0, 0x38C, 0x060, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT0__EMI_EMI_DEBUG_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT0, 0x38C, 0x060, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT0__USBPHY2_TXREADY */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT1, 0x390, 0x064, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT1, 0x390, 0x064, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT1__GPIO4_22 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT1, 0x390, 0x064, 2, 0x788, 0), /* MX53_PAD_DISP0_DAT1__CSPI_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT1, 0x390, 0x064, 3, 0x000, 0), /* MX53_PAD_DISP0_DAT1__USBOH3_USBH2_DATA_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT1, 0x390, 0x064, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT1__SDMA_DEBUG_EVENT_CHANNEL_SEL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT1, 0x390, 0x064, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT1__EMI_EMI_DEBUG_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT1, 0x390, 0x064, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT1__USBPHY2_RXVALID */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT2, 0x394, 0x068, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT2, 0x394, 0x068, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT2__GPIO4_23 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT2, 0x394, 0x068, 2, 0x784, 0), /* MX53_PAD_DISP0_DAT2__CSPI_MISO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT2, 0x394, 0x068, 3, 0x000, 0), /* MX53_PAD_DISP0_DAT2__USBOH3_USBH2_DATA_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT2, 0x394, 0x068, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT2__SDMA_DEBUG_MODE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT2, 0x394, 0x068, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT2__EMI_EMI_DEBUG_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT2, 0x394, 0x068, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT2__USBPHY2_RXACTIVE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT3, 0x398, 0x06C, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT3, 0x398, 0x06C, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT3__GPIO4_24 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT3, 0x398, 0x06C, 2, 0x78C, 0), /* MX53_PAD_DISP0_DAT3__CSPI_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT3, 0x398, 0x06C, 3, 0x000, 0), /* MX53_PAD_DISP0_DAT3__USBOH3_USBH2_DATA_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT3, 0x398, 0x06C, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT3__SDMA_DEBUG_BUS_ERROR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT3, 0x398, 0x06C, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT3__EMI_EMI_DEBUG_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT3, 0x398, 0x06C, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT3__USBPHY2_RXERROR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT4, 0x39C, 0x070, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT4, 0x39C, 0x070, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT4__GPIO4_25 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT4, 0x39C, 0x070, 2, 0x790, 0), /* MX53_PAD_DISP0_DAT4__CSPI_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT4, 0x39C, 0x070, 3, 0x000, 0), /* MX53_PAD_DISP0_DAT4__USBOH3_USBH2_DATA_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT4, 0x39C, 0x070, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT4__SDMA_DEBUG_BUS_RWB */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT4, 0x39C, 0x070, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT4__EMI_EMI_DEBUG_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT4, 0x39C, 0x070, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT4__USBPHY2_SIECLOCK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT5, 0x3A0, 0x074, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT5, 0x3A0, 0x074, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT5__GPIO4_26 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT5, 0x3A0, 0x074, 2, 0x794, 0), /* MX53_PAD_DISP0_DAT5__CSPI_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT5, 0x3A0, 0x074, 3, 0x000, 0), /* MX53_PAD_DISP0_DAT5__USBOH3_USBH2_DATA_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT5, 0x3A0, 0x074, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT5__SDMA_DEBUG_MATCHED_DMBUS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT5, 0x3A0, 0x074, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT5__EMI_EMI_DEBUG_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT5, 0x3A0, 0x074, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT5__USBPHY2_LINESTATE_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT6, 0x3A4, 0x078, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT6, 0x3A4, 0x078, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT6__GPIO4_27 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT6, 0x3A4, 0x078, 2, 0x798, 0), /* MX53_PAD_DISP0_DAT6__CSPI_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT6, 0x3A4, 0x078, 3, 0x000, 0), /* MX53_PAD_DISP0_DAT6__USBOH3_USBH2_DATA_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT6, 0x3A4, 0x078, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT6__SDMA_DEBUG_RTBUFFER_WRITE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT6, 0x3A4, 0x078, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT6__EMI_EMI_DEBUG_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT6, 0x3A4, 0x078, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT6__USBPHY2_LINESTATE_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT7, 0x3A8, 0x07C, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT7, 0x3A8, 0x07C, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT7__GPIO4_28 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT7, 0x3A8, 0x07C, 2, 0x000, 0), /* MX53_PAD_DISP0_DAT7__CSPI_RDY */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT7, 0x3A8, 0x07C, 3, 0x000, 0), /* MX53_PAD_DISP0_DAT7__USBOH3_USBH2_DATA_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT7, 0x3A8, 0x07C, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT7__SDMA_DEBUG_EVENT_CHANNEL_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT7, 0x3A8, 0x07C, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT7__EMI_EMI_DEBUG_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT7, 0x3A8, 0x07C, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT7__USBPHY2_VBUSVALID */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT8, 0x3AC, 0x080, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT8, 0x3AC, 0x080, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT8__GPIO4_29 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT8, 0x3AC, 0x080, 2, 0x000, 0), /* MX53_PAD_DISP0_DAT8__PWM1_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT8, 0x3AC, 0x080, 3, 0x000, 0), /* MX53_PAD_DISP0_DAT8__WDOG1_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT8, 0x3AC, 0x080, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT8__SDMA_DEBUG_EVENT_CHANNEL_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT8, 0x3AC, 0x080, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT8__EMI_EMI_DEBUG_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT8, 0x3AC, 0x080, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT8__USBPHY2_AVALID */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT9, 0x3B0, 0x084, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT9, 0x3B0, 0x084, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT9__GPIO4_30 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT9, 0x3B0, 0x084, 2, 0x000, 0), /* MX53_PAD_DISP0_DAT9__PWM2_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT9, 0x3B0, 0x084, 3, 0x000, 0), /* MX53_PAD_DISP0_DAT9__WDOG2_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT9, 0x3B0, 0x084, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT9__SDMA_DEBUG_EVENT_CHANNEL_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT9, 0x3B0, 0x084, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT9__EMI_EMI_DEBUG_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT9, 0x3B0, 0x084, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT9__USBPHY2_VSTATUS_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT10, 0x3B4, 0x088, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT10, 0x3B4, 0x088, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT10__GPIO4_31 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT10, 0x3B4, 0x088, 2, 0x000, 0), /* MX53_PAD_DISP0_DAT10__USBOH3_USBH2_STP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT10, 0x3B4, 0x088, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT10__SDMA_DEBUG_EVENT_CHANNEL_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT10, 0x3B4, 0x088, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT10__EMI_EMI_DEBUG_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT10, 0x3B4, 0x088, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT10__USBPHY2_VSTATUS_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT11, 0x3B8, 0x08C, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT11, 0x3B8, 0x08C, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT11__GPIO5_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT11, 0x3B8, 0x08C, 2, 0x000, 0), /* MX53_PAD_DISP0_DAT11__USBOH3_USBH2_NXT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT11, 0x3B8, 0x08C, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT11__SDMA_DEBUG_EVENT_CHANNEL_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT11, 0x3B8, 0x08C, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT11__EMI_EMI_DEBUG_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT11, 0x3B8, 0x08C, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT11__USBPHY2_VSTATUS_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT12, 0x3BC, 0x090, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT12, 0x3BC, 0x090, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT12__GPIO5_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT12, 0x3BC, 0x090, 2, 0x000, 0), /* MX53_PAD_DISP0_DAT12__USBOH3_USBH2_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT12, 0x3BC, 0x090, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT12__SDMA_DEBUG_EVENT_CHANNEL_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT12, 0x3BC, 0x090, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT12__EMI_EMI_DEBUG_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT12, 0x3BC, 0x090, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT12__USBPHY2_VSTATUS_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT13, 0x3C0, 0x094, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT13, 0x3C0, 0x094, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT13__GPIO5_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT13, 0x3C0, 0x094, 3, 0x754, 0), /* MX53_PAD_DISP0_DAT13__AUDMUX_AUD5_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT13, 0x3C0, 0x094, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT13__SDMA_DEBUG_EVT_CHN_LINES_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT13, 0x3C0, 0x094, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT13__EMI_EMI_DEBUG_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT13, 0x3C0, 0x094, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT13__USBPHY2_VSTATUS_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT14, 0x3C4, 0x098, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT14, 0x3C4, 0x098, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT14__GPIO5_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT14, 0x3C4, 0x098, 3, 0x750, 0), /* MX53_PAD_DISP0_DAT14__AUDMUX_AUD5_RXC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT14, 0x3C4, 0x098, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT14__SDMA_DEBUG_EVT_CHN_LINES_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT14, 0x3C4, 0x098, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT14__EMI_EMI_DEBUG_19 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT14, 0x3C4, 0x098, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT14__USBPHY2_VSTATUS_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT15, 0x3C8, 0x09C, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT15, 0x3C8, 0x09C, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT15__GPIO5_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT15, 0x3C8, 0x09C, 2, 0x7AC, 1), /* MX53_PAD_DISP0_DAT15__ECSPI1_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT15, 0x3C8, 0x09C, 3, 0x7C8, 0), /* MX53_PAD_DISP0_DAT15__ECSPI2_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT15, 0x3C8, 0x09C, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT15__SDMA_DEBUG_EVT_CHN_LINES_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT15, 0x3C8, 0x09C, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT15__EMI_EMI_DEBUG_20 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT15, 0x3C8, 0x09C, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT15__USBPHY2_VSTATUS_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT16, 0x3CC, 0x0A0, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT16, 0x3CC, 0x0A0, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT16__GPIO5_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT16, 0x3CC, 0x0A0, 2, 0x7C0, 0), /* MX53_PAD_DISP0_DAT16__ECSPI2_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT16, 0x3CC, 0x0A0, 3, 0x758, 1), /* MX53_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT16, 0x3CC, 0x0A0, 4, 0x868, 0), /* MX53_PAD_DISP0_DAT16__SDMA_EXT_EVENT_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT16, 0x3CC, 0x0A0, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT16__SDMA_DEBUG_EVT_CHN_LINES_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT16, 0x3CC, 0x0A0, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT16__EMI_EMI_DEBUG_21 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT16, 0x3CC, 0x0A0, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT16__USBPHY2_VSTATUS_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT17, 0x3D0, 0x0A4, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT17, 0x3D0, 0x0A4, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT17__GPIO5_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT17, 0x3D0, 0x0A4, 2, 0x7BC, 0), /* MX53_PAD_DISP0_DAT17__ECSPI2_MISO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT17, 0x3D0, 0x0A4, 3, 0x74C, 1), /* MX53_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT17, 0x3D0, 0x0A4, 4, 0x86C, 0), /* MX53_PAD_DISP0_DAT17__SDMA_EXT_EVENT_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT17, 0x3D0, 0x0A4, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT17__SDMA_DEBUG_EVT_CHN_LINES_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT17, 0x3D0, 0x0A4, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT17__EMI_EMI_DEBUG_22 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT18, 0x3D4, 0x0A8, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT18, 0x3D4, 0x0A8, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT18__GPIO5_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT18, 0x3D4, 0x0A8, 2, 0x7C4, 0), /* MX53_PAD_DISP0_DAT18__ECSPI2_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT18, 0x3D4, 0x0A8, 3, 0x75C, 1), /* MX53_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT18, 0x3D4, 0x0A8, 4, 0x73C, 0), /* MX53_PAD_DISP0_DAT18__AUDMUX_AUD4_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT18, 0x3D4, 0x0A8, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT18__SDMA_DEBUG_EVT_CHN_LINES_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT18, 0x3D4, 0x0A8, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT18__EMI_EMI_DEBUG_23 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT18, 0x3D4, 0x0A8, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT18__EMI_WEIM_CS_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT19, 0x3D8, 0x0AC, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT19, 0x3D8, 0x0AC, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT19__GPIO5_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT19, 0x3D8, 0x0AC, 2, 0x7B8, 0), /* MX53_PAD_DISP0_DAT19__ECSPI2_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT19, 0x3D8, 0x0AC, 3, 0x748, 1), /* MX53_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT19, 0x3D8, 0x0AC, 4, 0x738, 0), /* MX53_PAD_DISP0_DAT19__AUDMUX_AUD4_RXC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT19, 0x3D8, 0x0AC, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT19__SDMA_DEBUG_EVT_CHN_LINES_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT19, 0x3D8, 0x0AC, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT19__EMI_EMI_DEBUG_24 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT19, 0x3D8, 0x0AC, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT19__EMI_WEIM_CS_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT20, 0x3DC, 0x0B0, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT20, 0x3DC, 0x0B0, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT20__GPIO5_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT20, 0x3DC, 0x0B0, 2, 0x79C, 1), /* MX53_PAD_DISP0_DAT20__ECSPI1_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT20, 0x3DC, 0x0B0, 3, 0x740, 0), /* MX53_PAD_DISP0_DAT20__AUDMUX_AUD4_TXC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT20, 0x3DC, 0x0B0, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT20__SDMA_DEBUG_EVT_CHN_LINES_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT20, 0x3DC, 0x0B0, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT20__EMI_EMI_DEBUG_25 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT20, 0x3DC, 0x0B0, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT20__SATA_PHY_TDI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT21, 0x3E0, 0x0B4, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT21, 0x3E0, 0x0B4, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT21__GPIO5_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT21, 0x3E0, 0x0B4, 2, 0x7A4, 1), /* MX53_PAD_DISP0_DAT21__ECSPI1_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT21, 0x3E0, 0x0B4, 3, 0x734, 0), /* MX53_PAD_DISP0_DAT21__AUDMUX_AUD4_TXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT21, 0x3E0, 0x0B4, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT21__SDMA_DEBUG_BUS_DEVICE_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT21, 0x3E0, 0x0B4, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT21__EMI_EMI_DEBUG_26 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT21, 0x3E0, 0x0B4, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT21__SATA_PHY_TDO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT22, 0x3E4, 0x0B8, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT22, 0x3E4, 0x0B8, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT22__GPIO5_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT22, 0x3E4, 0x0B8, 2, 0x7A0, 1), /* MX53_PAD_DISP0_DAT22__ECSPI1_MISO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT22, 0x3E4, 0x0B8, 3, 0x744, 0), /* MX53_PAD_DISP0_DAT22__AUDMUX_AUD4_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT22, 0x3E4, 0x0B8, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT22__SDMA_DEBUG_BUS_DEVICE_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT22, 0x3E4, 0x0B8, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT22__EMI_EMI_DEBUG_27 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT22, 0x3E4, 0x0B8, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT22__SATA_PHY_TCK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT23, 0x3E8, 0x0BC, 0, 0x000, 0), /* MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT23, 0x3E8, 0x0BC, 1, 0x000, 0), /* MX53_PAD_DISP0_DAT23__GPIO5_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT23, 0x3E8, 0x0BC, 2, 0x7A8, 1), /* MX53_PAD_DISP0_DAT23__ECSPI1_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT23, 0x3E8, 0x0BC, 3, 0x730, 0), /* MX53_PAD_DISP0_DAT23__AUDMUX_AUD4_RXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT23, 0x3E8, 0x0BC, 5, 0x000, 0), /* MX53_PAD_DISP0_DAT23__SDMA_DEBUG_BUS_DEVICE_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT23, 0x3E8, 0x0BC, 6, 0x000, 0), /* MX53_PAD_DISP0_DAT23__EMI_EMI_DEBUG_28 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_DISP0_DAT23, 0x3E8, 0x0BC, 7, 0x000, 0), /* MX53_PAD_DISP0_DAT23__SATA_PHY_TMS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_PIXCLK, 0x3EC, 0x0C0, 0, 0x000, 0), /* MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_PIXCLK, 0x3EC, 0x0C0, 1, 0x000, 0), /* MX53_PAD_CSI0_PIXCLK__GPIO5_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_PIXCLK, 0x3EC, 0x0C0, 5, 0x000, 0), /* MX53_PAD_CSI0_PIXCLK__SDMA_DEBUG_PC_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_PIXCLK, 0x3EC, 0x0C0, 6, 0x000, 0), /* MX53_PAD_CSI0_PIXCLK__EMI_EMI_DEBUG_29 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_MCLK, 0x3F0, 0x0C4, 0, 0x000, 0), /* MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_MCLK, 0x3F0, 0x0C4, 1, 0x000, 0), /* MX53_PAD_CSI0_MCLK__GPIO5_19 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_MCLK, 0x3F0, 0x0C4, 2, 0x000, 0), /* MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_MCLK, 0x3F0, 0x0C4, 5, 0x000, 0), /* MX53_PAD_CSI0_MCLK__SDMA_DEBUG_PC_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_MCLK, 0x3F0, 0x0C4, 6, 0x000, 0), /* MX53_PAD_CSI0_MCLK__EMI_EMI_DEBUG_30 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_MCLK, 0x3F0, 0x0C4, 7, 0x000, 0), /* MX53_PAD_CSI0_MCLK__TPIU_TRCTL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DATA_EN, 0x3F4, 0x0C8, 0, 0x000, 0), /* MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DATA_EN, 0x3F4, 0x0C8, 1, 0x000, 0), /* MX53_PAD_CSI0_DATA_EN__GPIO5_20 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DATA_EN, 0x3F4, 0x0C8, 5, 0x000, 0), /* MX53_PAD_CSI0_DATA_EN__SDMA_DEBUG_PC_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DATA_EN, 0x3F4, 0x0C8, 6, 0x000, 0), /* MX53_PAD_CSI0_DATA_EN__EMI_EMI_DEBUG_31 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DATA_EN, 0x3F4, 0x0C8, 7, 0x000, 0), /* MX53_PAD_CSI0_DATA_EN__TPIU_TRCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_VSYNC, 0x3F8, 0x0CC, 0, 0x000, 0), /* MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_VSYNC, 0x3F8, 0x0CC, 1, 0x000, 0), /* MX53_PAD_CSI0_VSYNC__GPIO5_21 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_VSYNC, 0x3F8, 0x0CC, 5, 0x000, 0), /* MX53_PAD_CSI0_VSYNC__SDMA_DEBUG_PC_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_VSYNC, 0x3F8, 0x0CC, 6, 0x000, 0), /* MX53_PAD_CSI0_VSYNC__EMI_EMI_DEBUG_32 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_VSYNC, 0x3F8, 0x0CC, 7, 0x000, 0), /* MX53_PAD_CSI0_VSYNC__TPIU_TRACE_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT4, 0x3FC, 0x0D0, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT4__IPU_CSI0_D_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT4, 0x3FC, 0x0D0, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT4__GPIO5_22 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT4, 0x3FC, 0x0D0, 2, 0x840, 1), /* MX53_PAD_CSI0_DAT4__KPP_COL_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT4, 0x3FC, 0x0D0, 3, 0x79C, 2), /* MX53_PAD_CSI0_DAT4__ECSPI1_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT4, 0x3FC, 0x0D0, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT4__USBOH3_USBH3_STP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT4, 0x3FC, 0x0D0, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT4, 0x3FC, 0x0D0, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT4__EMI_EMI_DEBUG_33 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT4, 0x3FC, 0x0D0, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT4__TPIU_TRACE_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT5, 0x400, 0x0D4, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT5__IPU_CSI0_D_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT5, 0x400, 0x0D4, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT5__GPIO5_23 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT5, 0x400, 0x0D4, 2, 0x84C, 0), /* MX53_PAD_CSI0_DAT5__KPP_ROW_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT5, 0x400, 0x0D4, 3, 0x7A4, 2), /* MX53_PAD_CSI0_DAT5__ECSPI1_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT5, 0x400, 0x0D4, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT5__USBOH3_USBH3_NXT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT5, 0x400, 0x0D4, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT5, 0x400, 0x0D4, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT5__EMI_EMI_DEBUG_34 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT5, 0x400, 0x0D4, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT5__TPIU_TRACE_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT6, 0x404, 0x0D8, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT6__IPU_CSI0_D_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT6, 0x404, 0x0D8, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT6__GPIO5_24 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT6, 0x404, 0x0D8, 2, 0x844, 0), /* MX53_PAD_CSI0_DAT6__KPP_COL_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT6, 0x404, 0x0D8, 3, 0x7A0, 2), /* MX53_PAD_CSI0_DAT6__ECSPI1_MISO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT6, 0x404, 0x0D8, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT6__USBOH3_USBH3_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT6, 0x404, 0x0D8, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT6, 0x404, 0x0D8, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT6__EMI_EMI_DEBUG_35 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT6, 0x404, 0x0D8, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT6__TPIU_TRACE_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT7, 0x408, 0x0DC, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT7__IPU_CSI0_D_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT7, 0x408, 0x0DC, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT7__GPIO5_25 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT7, 0x408, 0x0DC, 2, 0x850, 0), /* MX53_PAD_CSI0_DAT7__KPP_ROW_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT7, 0x408, 0x0DC, 3, 0x7A8, 2), /* MX53_PAD_CSI0_DAT7__ECSPI1_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT7, 0x408, 0x0DC, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT7__USBOH3_USBH3_DIR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT7, 0x408, 0x0DC, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT7, 0x408, 0x0DC, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT7__EMI_EMI_DEBUG_36 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT7, 0x408, 0x0DC, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT7__TPIU_TRACE_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT8, 0x40C, 0x0E0, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT8__IPU_CSI0_D_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT8, 0x40C, 0x0E0, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT8__GPIO5_26 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT8, 0x40C, 0x0E0, 2, 0x848, 0), /* MX53_PAD_CSI0_DAT8__KPP_COL_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT8, 0x40C, 0x0E0, 3, 0x7B8, 1), /* MX53_PAD_CSI0_DAT8__ECSPI2_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT8, 0x40C, 0x0E0, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT8, 0x40C, 0x0E0, 5, 0x818, 0), /* MX53_PAD_CSI0_DAT8__I2C1_SDA */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT8, 0x40C, 0x0E0, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT8, 0x40C, 0x0E0, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT8__TPIU_TRACE_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT9, 0x410, 0x0E4, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT9, 0x410, 0x0E4, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT9__GPIO5_27 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT9, 0x410, 0x0E4, 2, 0x854, 0), /* MX53_PAD_CSI0_DAT9__KPP_ROW_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT9, 0x410, 0x0E4, 3, 0x7C0, 1), /* MX53_PAD_CSI0_DAT9__ECSPI2_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT9, 0x410, 0x0E4, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT9, 0x410, 0x0E4, 5, 0x814, 0), /* MX53_PAD_CSI0_DAT9__I2C1_SCL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT9, 0x410, 0x0E4, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT9, 0x410, 0x0E4, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT9__TPIU_TRACE_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT10, 0x414, 0x0E8, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT10, 0x414, 0x0E8, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT10__GPIO5_28 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT10, 0x414, 0x0E8, 2, 0x000, 0), /* MX53_PAD_CSI0_DAT10__UART1_TXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT10, 0x414, 0x0E8, 3, 0x7BC, 1), /* MX53_PAD_CSI0_DAT10__ECSPI2_MISO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT10, 0x414, 0x0E8, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT10__AUDMUX_AUD3_RXC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT10, 0x414, 0x0E8, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT10__SDMA_DEBUG_PC_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT10, 0x414, 0x0E8, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT10__EMI_EMI_DEBUG_39 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT10, 0x414, 0x0E8, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT10__TPIU_TRACE_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT11, 0x418, 0x0EC, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT11__IPU_CSI0_D_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT11, 0x418, 0x0EC, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT11__GPIO5_29 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT11, 0x418, 0x0EC, 2, 0x878, 1), /* MX53_PAD_CSI0_DAT11__UART1_RXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT11, 0x418, 0x0EC, 3, 0x7C4, 1), /* MX53_PAD_CSI0_DAT11__ECSPI2_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT11, 0x418, 0x0EC, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT11__AUDMUX_AUD3_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT11, 0x418, 0x0EC, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT11__SDMA_DEBUG_PC_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT11, 0x418, 0x0EC, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT11__EMI_EMI_DEBUG_40 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT11, 0x418, 0x0EC, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT11__TPIU_TRACE_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT12, 0x41C, 0x0F0, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT12, 0x41C, 0x0F0, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT12__GPIO5_30 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT12, 0x41C, 0x0F0, 2, 0x000, 0), /* MX53_PAD_CSI0_DAT12__UART4_TXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT12, 0x41C, 0x0F0, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT12__USBOH3_USBH3_DATA_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT12, 0x41C, 0x0F0, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT12__SDMA_DEBUG_PC_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT12, 0x41C, 0x0F0, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT12__EMI_EMI_DEBUG_41 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT12, 0x41C, 0x0F0, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT12__TPIU_TRACE_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT13, 0x420, 0x0F4, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT13, 0x420, 0x0F4, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT13__GPIO5_31 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT13, 0x420, 0x0F4, 2, 0x890, 3), /* MX53_PAD_CSI0_DAT13__UART4_RXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT13, 0x420, 0x0F4, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT13__USBOH3_USBH3_DATA_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT13, 0x420, 0x0F4, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT13__SDMA_DEBUG_PC_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT13, 0x420, 0x0F4, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT13__EMI_EMI_DEBUG_42 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT13, 0x420, 0x0F4, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT13__TPIU_TRACE_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT14, 0x424, 0x0F8, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT14, 0x424, 0x0F8, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT14__GPIO6_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT14, 0x424, 0x0F8, 2, 0x000, 0), /* MX53_PAD_CSI0_DAT14__UART5_TXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT14, 0x424, 0x0F8, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT14__USBOH3_USBH3_DATA_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT14, 0x424, 0x0F8, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT14__SDMA_DEBUG_PC_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT14, 0x424, 0x0F8, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT14__EMI_EMI_DEBUG_43 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT14, 0x424, 0x0F8, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT14__TPIU_TRACE_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT15, 0x428, 0x0FC, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT15, 0x428, 0x0FC, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT15__GPIO6_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT15, 0x428, 0x0FC, 2, 0x898, 3), /* MX53_PAD_CSI0_DAT15__UART5_RXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT15, 0x428, 0x0FC, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT15__USBOH3_USBH3_DATA_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT15, 0x428, 0x0FC, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT15__SDMA_DEBUG_PC_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT15, 0x428, 0x0FC, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT15__EMI_EMI_DEBUG_44 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT15, 0x428, 0x0FC, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT15__TPIU_TRACE_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT16, 0x42C, 0x100, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT16, 0x42C, 0x100, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT16__GPIO6_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT16, 0x42C, 0x100, 2, 0x88C, 0), /* MX53_PAD_CSI0_DAT16__UART4_RTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT16, 0x42C, 0x100, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT16__USBOH3_USBH3_DATA_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT16, 0x42C, 0x100, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT16__SDMA_DEBUG_PC_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT16, 0x42C, 0x100, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT16__EMI_EMI_DEBUG_45 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT16, 0x42C, 0x100, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT16__TPIU_TRACE_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT17, 0x430, 0x104, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT17, 0x430, 0x104, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT17__GPIO6_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT17, 0x430, 0x104, 2, 0x000, 0), /* MX53_PAD_CSI0_DAT17__UART4_CTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT17, 0x430, 0x104, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT17__USBOH3_USBH3_DATA_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT17, 0x430, 0x104, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT17__SDMA_DEBUG_PC_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT17, 0x430, 0x104, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT17__EMI_EMI_DEBUG_46 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT17, 0x430, 0x104, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT17__TPIU_TRACE_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT18, 0x434, 0x108, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT18, 0x434, 0x108, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT18__GPIO6_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT18, 0x434, 0x108, 2, 0x894, 2), /* MX53_PAD_CSI0_DAT18__UART5_RTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT18, 0x434, 0x108, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT18__USBOH3_USBH3_DATA_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT18, 0x434, 0x108, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT18__SDMA_DEBUG_PC_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT18, 0x434, 0x108, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT18__EMI_EMI_DEBUG_47 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT18, 0x434, 0x108, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT18__TPIU_TRACE_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT19, 0x438, 0x10C, 0, 0x000, 0), /* MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT19, 0x438, 0x10C, 1, 0x000, 0), /* MX53_PAD_CSI0_DAT19__GPIO6_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT19, 0x438, 0x10C, 2, 0x000, 0), /* MX53_PAD_CSI0_DAT19__UART5_CTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT19, 0x438, 0x10C, 4, 0x000, 0), /* MX53_PAD_CSI0_DAT19__USBOH3_USBH3_DATA_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT19, 0x438, 0x10C, 5, 0x000, 0), /* MX53_PAD_CSI0_DAT19__SDMA_DEBUG_PC_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT19, 0x438, 0x10C, 6, 0x000, 0), /* MX53_PAD_CSI0_DAT19__EMI_EMI_DEBUG_48 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_CSI0_DAT19, 0x438, 0x10C, 7, 0x000, 0), /* MX53_PAD_CSI0_DAT19__USBPHY2_BISTOK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A25, 0x458, 0x110, 0, 0x000, 0), /* MX53_PAD_EIM_A25__EMI_WEIM_A_25 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A25, 0x458, 0x110, 1, 0x000, 0), /* MX53_PAD_EIM_A25__GPIO5_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A25, 0x458, 0x110, 2, 0x000, 0), /* MX53_PAD_EIM_A25__ECSPI2_RDY */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A25, 0x458, 0x110, 3, 0x000, 0), /* MX53_PAD_EIM_A25__IPU_DI1_PIN12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A25, 0x458, 0x110, 4, 0x790, 1), /* MX53_PAD_EIM_A25__CSPI_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A25, 0x458, 0x110, 6, 0x000, 0), /* MX53_PAD_EIM_A25__IPU_DI0_D1_CS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A25, 0x458, 0x110, 7, 0x000, 0), /* MX53_PAD_EIM_A25__USBPHY1_BISTOK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB2, 0x45C, 0x114, 0, 0x000, 0), /* MX53_PAD_EIM_EB2__EMI_WEIM_EB_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB2, 0x45C, 0x114, 1, 0x000, 0), /* MX53_PAD_EIM_EB2__GPIO2_30 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB2, 0x45C, 0x114, 2, 0x76C, 0), /* MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB2, 0x45C, 0x114, 3, 0x000, 0), /* MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB2, 0x45C, 0x114, 4, 0x7A8, 3), /* MX53_PAD_EIM_EB2__ECSPI1_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB2, 0x45C, 0x114, 5, 0x81C, 1), /* MX53_PAD_EIM_EB2__I2C2_SCL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D16, 0x460, 0x118, 0, 0x000, 0), /* MX53_PAD_EIM_D16__EMI_WEIM_D_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D16, 0x460, 0x118, 1, 0x000, 0), /* MX53_PAD_EIM_D16__GPIO3_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D16, 0x460, 0x118, 2, 0x000, 0), /* MX53_PAD_EIM_D16__IPU_DI0_PIN5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D16, 0x460, 0x118, 3, 0x000, 0), /* MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D16, 0x460, 0x118, 4, 0x79C, 3), /* MX53_PAD_EIM_D16__ECSPI1_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D16, 0x460, 0x118, 5, 0x820, 1), /* MX53_PAD_EIM_D16__I2C2_SDA */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D17, 0x464, 0x11C, 0, 0x000, 0), /* MX53_PAD_EIM_D17__EMI_WEIM_D_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D17, 0x464, 0x11C, 1, 0x000, 0), /* MX53_PAD_EIM_D17__GPIO3_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D17, 0x464, 0x11C, 2, 0x000, 0), /* MX53_PAD_EIM_D17__IPU_DI0_PIN6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D17, 0x464, 0x11C, 3, 0x830, 0), /* MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D17, 0x464, 0x11C, 4, 0x7A0, 3), /* MX53_PAD_EIM_D17__ECSPI1_MISO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D17, 0x464, 0x11C, 5, 0x824, 0), /* MX53_PAD_EIM_D17__I2C3_SCL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D18, 0x468, 0x120, 0, 0x000, 0), /* MX53_PAD_EIM_D18__EMI_WEIM_D_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D18, 0x468, 0x120, 1, 0x000, 0), /* MX53_PAD_EIM_D18__GPIO3_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D18, 0x468, 0x120, 2, 0x000, 0), /* MX53_PAD_EIM_D18__IPU_DI0_PIN7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D18, 0x468, 0x120, 3, 0x830, 1), /* MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D18, 0x468, 0x120, 4, 0x7A4, 3), /* MX53_PAD_EIM_D18__ECSPI1_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D18, 0x468, 0x120, 5, 0x828, 0), /* MX53_PAD_EIM_D18__I2C3_SDA */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D18, 0x468, 0x120, 6, 0x000, 0), /* MX53_PAD_EIM_D18__IPU_DI1_D0_CS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D19, 0x46C, 0x124, 0, 0x000, 0), /* MX53_PAD_EIM_D19__EMI_WEIM_D_19 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D19, 0x46C, 0x124, 1, 0x000, 0), /* MX53_PAD_EIM_D19__GPIO3_19 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D19, 0x46C, 0x124, 2, 0x000, 0), /* MX53_PAD_EIM_D19__IPU_DI0_PIN8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D19, 0x46C, 0x124, 3, 0x000, 0), /* MX53_PAD_EIM_D19__IPU_DISPB1_SER_RS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D19, 0x46C, 0x124, 4, 0x7AC, 2), /* MX53_PAD_EIM_D19__ECSPI1_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D19, 0x46C, 0x124, 5, 0x000, 0), /* MX53_PAD_EIM_D19__EPIT1_EPITO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D19, 0x46C, 0x124, 6, 0x000, 0), /* MX53_PAD_EIM_D19__UART1_CTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D19, 0x46C, 0x124, 7, 0x8A4, 0), /* MX53_PAD_EIM_D19__USBOH3_USBH2_OC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D20, 0x470, 0x128, 0, 0x000, 0), /* MX53_PAD_EIM_D20__EMI_WEIM_D_20 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D20, 0x470, 0x128, 1, 0x000, 0), /* MX53_PAD_EIM_D20__GPIO3_20 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D20, 0x470, 0x128, 2, 0x000, 0), /* MX53_PAD_EIM_D20__IPU_DI0_PIN16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D20, 0x470, 0x128, 3, 0x000, 0), /* MX53_PAD_EIM_D20__IPU_SER_DISP0_CS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D20, 0x470, 0x128, 4, 0x78C, 1), /* MX53_PAD_EIM_D20__CSPI_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D20, 0x470, 0x128, 5, 0x000, 0), /* MX53_PAD_EIM_D20__EPIT2_EPITO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D20, 0x470, 0x128, 6, 0x874, 1), /* MX53_PAD_EIM_D20__UART1_RTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D20, 0x470, 0x128, 7, 0x000, 0), /* MX53_PAD_EIM_D20__USBOH3_USBH2_PWR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D21, 0x474, 0x12C, 0, 0x000, 0), /* MX53_PAD_EIM_D21__EMI_WEIM_D_21 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D21, 0x474, 0x12C, 1, 0x000, 0), /* MX53_PAD_EIM_D21__GPIO3_21 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D21, 0x474, 0x12C, 2, 0x000, 0), /* MX53_PAD_EIM_D21__IPU_DI0_PIN17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D21, 0x474, 0x12C, 3, 0x000, 0), /* MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D21, 0x474, 0x12C, 4, 0x780, 1), /* MX53_PAD_EIM_D21__CSPI_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D21, 0x474, 0x12C, 5, 0x814, 1), /* MX53_PAD_EIM_D21__I2C1_SCL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D21, 0x474, 0x12C, 6, 0x89C, 1), /* MX53_PAD_EIM_D21__USBOH3_USBOTG_OC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D22, 0x478, 0x130, 0, 0x000, 0), /* MX53_PAD_EIM_D22__EMI_WEIM_D_22 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D22, 0x478, 0x130, 1, 0x000, 0), /* MX53_PAD_EIM_D22__GPIO3_22 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D22, 0x478, 0x130, 2, 0x000, 0), /* MX53_PAD_EIM_D22__IPU_DI0_PIN1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D22, 0x478, 0x130, 3, 0x82C, 0), /* MX53_PAD_EIM_D22__IPU_DISPB0_SER_DIN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D22, 0x478, 0x130, 4, 0x784, 1), /* MX53_PAD_EIM_D22__CSPI_MISO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D22, 0x478, 0x130, 6, 0x000, 0), /* MX53_PAD_EIM_D22__USBOH3_USBOTG_PWR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D23, 0x47C, 0x134, 0, 0x000, 0), /* MX53_PAD_EIM_D23__EMI_WEIM_D_23 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D23, 0x47C, 0x134, 1, 0x000, 0), /* MX53_PAD_EIM_D23__GPIO3_23 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D23, 0x47C, 0x134, 2, 0x000, 0), /* MX53_PAD_EIM_D23__UART3_CTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D23, 0x47C, 0x134, 3, 0x000, 0), /* MX53_PAD_EIM_D23__UART1_DCD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D23, 0x47C, 0x134, 4, 0x000, 0), /* MX53_PAD_EIM_D23__IPU_DI0_D0_CS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D23, 0x47C, 0x134, 5, 0x000, 0), /* MX53_PAD_EIM_D23__IPU_DI1_PIN2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D23, 0x47C, 0x134, 6, 0x834, 0), /* MX53_PAD_EIM_D23__IPU_CSI1_DATA_EN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D23, 0x47C, 0x134, 7, 0x000, 0), /* MX53_PAD_EIM_D23__IPU_DI1_PIN14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB3, 0x480, 0x138, 0, 0x000, 0), /* MX53_PAD_EIM_EB3__EMI_WEIM_EB_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB3, 0x480, 0x138, 1, 0x000, 0), /* MX53_PAD_EIM_EB3__GPIO2_31 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB3, 0x480, 0x138, 2, 0x884, 1), /* MX53_PAD_EIM_EB3__UART3_RTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB3, 0x480, 0x138, 3, 0x000, 0), /* MX53_PAD_EIM_EB3__UART1_RI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB3, 0x480, 0x138, 5, 0x000, 0), /* MX53_PAD_EIM_EB3__IPU_DI1_PIN3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB3, 0x480, 0x138, 6, 0x838, 0), /* MX53_PAD_EIM_EB3__IPU_CSI1_HSYNC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB3, 0x480, 0x138, 7, 0x000, 0), /* MX53_PAD_EIM_EB3__IPU_DI1_PIN16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D24, 0x484, 0x13C, 0, 0x000, 0), /* MX53_PAD_EIM_D24__EMI_WEIM_D_24 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D24, 0x484, 0x13C, 1, 0x000, 0), /* MX53_PAD_EIM_D24__GPIO3_24 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D24, 0x484, 0x13C, 2, 0x000, 0), /* MX53_PAD_EIM_D24__UART3_TXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D24, 0x484, 0x13C, 3, 0x7B0, 1), /* MX53_PAD_EIM_D24__ECSPI1_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D24, 0x484, 0x13C, 4, 0x794, 1), /* MX53_PAD_EIM_D24__CSPI_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D24, 0x484, 0x13C, 5, 0x754, 1), /* MX53_PAD_EIM_D24__AUDMUX_AUD5_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D24, 0x484, 0x13C, 6, 0x000, 0), /* MX53_PAD_EIM_D24__ECSPI2_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D24, 0x484, 0x13C, 7, 0x000, 0), /* MX53_PAD_EIM_D24__UART1_DTR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D25, 0x488, 0x140, 0, 0x000, 0), /* MX53_PAD_EIM_D25__EMI_WEIM_D_25 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D25, 0x488, 0x140, 1, 0x000, 0), /* MX53_PAD_EIM_D25__GPIO3_25 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D25, 0x488, 0x140, 2, 0x888, 1), /* MX53_PAD_EIM_D25__UART3_RXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D25, 0x488, 0x140, 3, 0x7B4, 1), /* MX53_PAD_EIM_D25__ECSPI1_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D25, 0x488, 0x140, 4, 0x798, 1), /* MX53_PAD_EIM_D25__CSPI_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D25, 0x488, 0x140, 5, 0x750, 1), /* MX53_PAD_EIM_D25__AUDMUX_AUD5_RXC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D25, 0x488, 0x140, 6, 0x000, 0), /* MX53_PAD_EIM_D25__ECSPI2_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D25, 0x488, 0x140, 7, 0x000, 0), /* MX53_PAD_EIM_D25__UART1_DSR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D26, 0x48C, 0x144, 0, 0x000, 0), /* MX53_PAD_EIM_D26__EMI_WEIM_D_26 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D26, 0x48C, 0x144, 1, 0x000, 0), /* MX53_PAD_EIM_D26__GPIO3_26 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D26, 0x48C, 0x144, 2, 0x000, 0), /* MX53_PAD_EIM_D26__UART2_TXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D26, 0x48C, 0x144, 3, 0x80C, 0), /* MX53_PAD_EIM_D26__FIRI_RXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D26, 0x48C, 0x144, 4, 0x000, 0), /* MX53_PAD_EIM_D26__IPU_CSI0_D_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D26, 0x48C, 0x144, 5, 0x000, 0), /* MX53_PAD_EIM_D26__IPU_DI1_PIN11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D26, 0x48C, 0x144, 6, 0x000, 0), /* MX53_PAD_EIM_D26__IPU_SISG_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D26, 0x48C, 0x144, 7, 0x000, 0), /* MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D27, 0x490, 0x148, 0, 0x000, 0), /* MX53_PAD_EIM_D27__EMI_WEIM_D_27 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D27, 0x490, 0x148, 1, 0x000, 0), /* MX53_PAD_EIM_D27__GPIO3_27 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D27, 0x490, 0x148, 2, 0x880, 1), /* MX53_PAD_EIM_D27__UART2_RXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D27, 0x490, 0x148, 3, 0x000, 0), /* MX53_PAD_EIM_D27__FIRI_TXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D27, 0x490, 0x148, 4, 0x000, 0), /* MX53_PAD_EIM_D27__IPU_CSI0_D_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D27, 0x490, 0x148, 5, 0x000, 0), /* MX53_PAD_EIM_D27__IPU_DI1_PIN13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D27, 0x490, 0x148, 6, 0x000, 0), /* MX53_PAD_EIM_D27__IPU_SISG_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D27, 0x490, 0x148, 7, 0x000, 0), /* MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D28, 0x494, 0x14C, 0, 0x000, 0), /* MX53_PAD_EIM_D28__EMI_WEIM_D_28 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D28, 0x494, 0x14C, 1, 0x000, 0), /* MX53_PAD_EIM_D28__GPIO3_28 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D28, 0x494, 0x14C, 2, 0x000, 0), /* MX53_PAD_EIM_D28__UART2_CTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D28, 0x494, 0x14C, 3, 0x82C, 1), /* MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D28, 0x494, 0x14C, 4, 0x788, 1), /* MX53_PAD_EIM_D28__CSPI_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D28, 0x494, 0x14C, 5, 0x818, 1), /* MX53_PAD_EIM_D28__I2C1_SDA */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D28, 0x494, 0x14C, 6, 0x000, 0), /* MX53_PAD_EIM_D28__IPU_EXT_TRIG */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D28, 0x494, 0x14C, 7, 0x000, 0), /* MX53_PAD_EIM_D28__IPU_DI0_PIN13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D29, 0x498, 0x150, 0, 0x000, 0), /* MX53_PAD_EIM_D29__EMI_WEIM_D_29 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D29, 0x498, 0x150, 1, 0x000, 0), /* MX53_PAD_EIM_D29__GPIO3_29 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D29, 0x498, 0x150, 2, 0x87C, 1), /* MX53_PAD_EIM_D29__UART2_RTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D29, 0x498, 0x150, 3, 0x000, 0), /* MX53_PAD_EIM_D29__IPU_DISPB0_SER_RS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D29, 0x498, 0x150, 4, 0x78C, 2), /* MX53_PAD_EIM_D29__CSPI_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D29, 0x498, 0x150, 5, 0x000, 0), /* MX53_PAD_EIM_D29__IPU_DI1_PIN15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D29, 0x498, 0x150, 6, 0x83C, 0), /* MX53_PAD_EIM_D29__IPU_CSI1_VSYNC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D29, 0x498, 0x150, 7, 0x000, 0), /* MX53_PAD_EIM_D29__IPU_DI0_PIN14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D30, 0x49C, 0x154, 0, 0x000, 0), /* MX53_PAD_EIM_D30__EMI_WEIM_D_30 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D30, 0x49C, 0x154, 1, 0x000, 0), /* MX53_PAD_EIM_D30__GPIO3_30 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D30, 0x49C, 0x154, 2, 0x000, 0), /* MX53_PAD_EIM_D30__UART3_CTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D30, 0x49C, 0x154, 3, 0x000, 0), /* MX53_PAD_EIM_D30__IPU_CSI0_D_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D30, 0x49C, 0x154, 4, 0x000, 0), /* MX53_PAD_EIM_D30__IPU_DI0_PIN11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D30, 0x49C, 0x154, 5, 0x000, 0), /* MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D30, 0x49C, 0x154, 6, 0x8A0, 0), /* MX53_PAD_EIM_D30__USBOH3_USBH1_OC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D30, 0x49C, 0x154, 7, 0x8A4, 1), /* MX53_PAD_EIM_D30__USBOH3_USBH2_OC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D31, 0x4A0, 0x158, 0, 0x000, 0), /* MX53_PAD_EIM_D31__EMI_WEIM_D_31 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D31, 0x4A0, 0x158, 1, 0x000, 0), /* MX53_PAD_EIM_D31__GPIO3_31 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D31, 0x4A0, 0x158, 2, 0x884, 3), /* MX53_PAD_EIM_D31__UART3_RTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D31, 0x4A0, 0x158, 3, 0x000, 0), /* MX53_PAD_EIM_D31__IPU_CSI0_D_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D31, 0x4A0, 0x158, 4, 0x000, 0), /* MX53_PAD_EIM_D31__IPU_DI0_PIN12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D31, 0x4A0, 0x158, 5, 0x000, 0), /* MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D31, 0x4A0, 0x158, 6, 0x000, 0), /* MX53_PAD_EIM_D31__USBOH3_USBH1_PWR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_D31, 0x4A0, 0x158, 7, 0x000, 0), /* MX53_PAD_EIM_D31__USBOH3_USBH2_PWR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A24, 0x4A8, 0x15C, 0, 0x000, 0), /* MX53_PAD_EIM_A24__EMI_WEIM_A_24 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A24, 0x4A8, 0x15C, 1, 0x000, 0), /* MX53_PAD_EIM_A24__GPIO5_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A24, 0x4A8, 0x15C, 2, 0x000, 0), /* MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A24, 0x4A8, 0x15C, 3, 0x000, 0), /* MX53_PAD_EIM_A24__IPU_CSI1_D_19 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A24, 0x4A8, 0x15C, 6, 0x000, 0), /* MX53_PAD_EIM_A24__IPU_SISG_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A24, 0x4A8, 0x15C, 7, 0x000, 0), /* MX53_PAD_EIM_A24__USBPHY2_BVALID */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A23, 0x4AC, 0x160, 0, 0x000, 0), /* MX53_PAD_EIM_A23__EMI_WEIM_A_23 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A23, 0x4AC, 0x160, 1, 0x000, 0), /* MX53_PAD_EIM_A23__GPIO6_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A23, 0x4AC, 0x160, 2, 0x000, 0), /* MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A23, 0x4AC, 0x160, 3, 0x000, 0), /* MX53_PAD_EIM_A23__IPU_CSI1_D_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A23, 0x4AC, 0x160, 6, 0x000, 0), /* MX53_PAD_EIM_A23__IPU_SISG_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A23, 0x4AC, 0x160, 7, 0x000, 0), /* MX53_PAD_EIM_A23__USBPHY2_ENDSESSION */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A22, 0x4B0, 0x164, 0, 0x000, 0), /* MX53_PAD_EIM_A22__EMI_WEIM_A_22 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A22, 0x4B0, 0x164, 1, 0x000, 0), /* MX53_PAD_EIM_A22__GPIO2_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A22, 0x4B0, 0x164, 2, 0x000, 0), /* MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A22, 0x4B0, 0x164, 3, 0x000, 0), /* MX53_PAD_EIM_A22__IPU_CSI1_D_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A22, 0x4B0, 0x164, 7, 0x000, 0), /* MX53_PAD_EIM_A22__SRC_BT_CFG1_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A21, 0x4B4, 0x168, 0, 0x000, 0), /* MX53_PAD_EIM_A21__EMI_WEIM_A_21 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A21, 0x4B4, 0x168, 1, 0x000, 0), /* MX53_PAD_EIM_A21__GPIO2_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A21, 0x4B4, 0x168, 2, 0x000, 0), /* MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A21, 0x4B4, 0x168, 3, 0x000, 0), /* MX53_PAD_EIM_A21__IPU_CSI1_D_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A21, 0x4B4, 0x168, 7, 0x000, 0), /* MX53_PAD_EIM_A21__SRC_BT_CFG1_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A20, 0x4B8, 0x16C, 0, 0x000, 0), /* MX53_PAD_EIM_A20__EMI_WEIM_A_20 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A20, 0x4B8, 0x16C, 1, 0x000, 0), /* MX53_PAD_EIM_A20__GPIO2_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A20, 0x4B8, 0x16C, 2, 0x000, 0), /* MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A20, 0x4B8, 0x16C, 3, 0x000, 0), /* MX53_PAD_EIM_A20__IPU_CSI1_D_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A20, 0x4B8, 0x16C, 7, 0x000, 0), /* MX53_PAD_EIM_A20__SRC_BT_CFG1_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A19, 0x4BC, 0x170, 0, 0x000, 0), /* MX53_PAD_EIM_A19__EMI_WEIM_A_19 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A19, 0x4BC, 0x170, 1, 0x000, 0), /* MX53_PAD_EIM_A19__GPIO2_19 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A19, 0x4BC, 0x170, 2, 0x000, 0), /* MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A19, 0x4BC, 0x170, 3, 0x000, 0), /* MX53_PAD_EIM_A19__IPU_CSI1_D_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A19, 0x4BC, 0x170, 7, 0x000, 0), /* MX53_PAD_EIM_A19__SRC_BT_CFG1_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A18, 0x4C0, 0x174, 0, 0x000, 0), /* MX53_PAD_EIM_A18__EMI_WEIM_A_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A18, 0x4C0, 0x174, 1, 0x000, 0), /* MX53_PAD_EIM_A18__GPIO2_20 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A18, 0x4C0, 0x174, 2, 0x000, 0), /* MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A18, 0x4C0, 0x174, 3, 0x000, 0), /* MX53_PAD_EIM_A18__IPU_CSI1_D_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A18, 0x4C0, 0x174, 7, 0x000, 0), /* MX53_PAD_EIM_A18__SRC_BT_CFG1_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A17, 0x4C4, 0x178, 0, 0x000, 0), /* MX53_PAD_EIM_A17__EMI_WEIM_A_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A17, 0x4C4, 0x178, 1, 0x000, 0), /* MX53_PAD_EIM_A17__GPIO2_21 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A17, 0x4C4, 0x178, 2, 0x000, 0), /* MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A17, 0x4C4, 0x178, 3, 0x000, 0), /* MX53_PAD_EIM_A17__IPU_CSI1_D_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A17, 0x4C4, 0x178, 7, 0x000, 0), /* MX53_PAD_EIM_A17__SRC_BT_CFG1_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A16, 0x4C8, 0x17C, 0, 0x000, 0), /* MX53_PAD_EIM_A16__EMI_WEIM_A_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A16, 0x4C8, 0x17C, 1, 0x000, 0), /* MX53_PAD_EIM_A16__GPIO2_22 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A16, 0x4C8, 0x17C, 2, 0x000, 0), /* MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A16, 0x4C8, 0x17C, 3, 0x000, 0), /* MX53_PAD_EIM_A16__IPU_CSI1_PIXCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_A16, 0x4C8, 0x17C, 7, 0x000, 0), /* MX53_PAD_EIM_A16__SRC_BT_CFG1_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_CS0, 0x4CC, 0x180, 0, 0x000, 0), /* MX53_PAD_EIM_CS0__EMI_WEIM_CS_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_CS0, 0x4CC, 0x180, 1, 0x000, 0), /* MX53_PAD_EIM_CS0__GPIO2_23 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_CS0, 0x4CC, 0x180, 2, 0x7B8, 2), /* MX53_PAD_EIM_CS0__ECSPI2_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_CS0, 0x4CC, 0x180, 3, 0x000, 0), /* MX53_PAD_EIM_CS0__IPU_DI1_PIN5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_CS1, 0x4D0, 0x184, 0, 0x000, 0), /* MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_CS1, 0x4D0, 0x184, 1, 0x000, 0), /* MX53_PAD_EIM_CS1__GPIO2_24 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_CS1, 0x4D0, 0x184, 2, 0x7C0, 2), /* MX53_PAD_EIM_CS1__ECSPI2_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_CS1, 0x4D0, 0x184, 3, 0x000, 0), /* MX53_PAD_EIM_CS1__IPU_DI1_PIN6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_OE, 0x4D4, 0x188, 0, 0x000, 0), /* MX53_PAD_EIM_OE__EMI_WEIM_OE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_OE, 0x4D4, 0x188, 1, 0x000, 0), /* MX53_PAD_EIM_OE__GPIO2_25 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_OE, 0x4D4, 0x188, 2, 0x7BC, 2), /* MX53_PAD_EIM_OE__ECSPI2_MISO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_OE, 0x4D4, 0x188, 3, 0x000, 0), /* MX53_PAD_EIM_OE__IPU_DI1_PIN7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_OE, 0x4D4, 0x188, 7, 0x000, 0), /* MX53_PAD_EIM_OE__USBPHY2_IDDIG */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_RW, 0x4D8, 0x18C, 0, 0x000, 0), /* MX53_PAD_EIM_RW__EMI_WEIM_RW */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_RW, 0x4D8, 0x18C, 1, 0x000, 0), /* MX53_PAD_EIM_RW__GPIO2_26 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_RW, 0x4D8, 0x18C, 2, 0x7C4, 2), /* MX53_PAD_EIM_RW__ECSPI2_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_RW, 0x4D8, 0x18C, 3, 0x000, 0), /* MX53_PAD_EIM_RW__IPU_DI1_PIN8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_RW, 0x4D8, 0x18C, 7, 0x000, 0), /* MX53_PAD_EIM_RW__USBPHY2_HOSTDISCONNECT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_LBA, 0x4DC, 0x190, 0, 0x000, 0), /* MX53_PAD_EIM_LBA__EMI_WEIM_LBA */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_LBA, 0x4DC, 0x190, 1, 0x000, 0), /* MX53_PAD_EIM_LBA__GPIO2_27 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_LBA, 0x4DC, 0x190, 2, 0x7C8, 1), /* MX53_PAD_EIM_LBA__ECSPI2_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_LBA, 0x4DC, 0x190, 3, 0x000, 0), /* MX53_PAD_EIM_LBA__IPU_DI1_PIN17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_LBA, 0x4DC, 0x190, 7, 0x000, 0), /* MX53_PAD_EIM_LBA__SRC_BT_CFG1_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB0, 0x4E4, 0x194, 0, 0x000, 0), /* MX53_PAD_EIM_EB0__EMI_WEIM_EB_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB0, 0x4E4, 0x194, 1, 0x000, 0), /* MX53_PAD_EIM_EB0__GPIO2_28 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB0, 0x4E4, 0x194, 3, 0x000, 0), /* MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB0, 0x4E4, 0x194, 4, 0x000, 0), /* MX53_PAD_EIM_EB0__IPU_CSI1_D_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB0, 0x4E4, 0x194, 5, 0x810, 0), /* MX53_PAD_EIM_EB0__GPC_PMIC_RDY */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB0, 0x4E4, 0x194, 7, 0x000, 0), /* MX53_PAD_EIM_EB0__SRC_BT_CFG2_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB1, 0x4E8, 0x198, 0, 0x000, 0), /* MX53_PAD_EIM_EB1__EMI_WEIM_EB_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB1, 0x4E8, 0x198, 1, 0x000, 0), /* MX53_PAD_EIM_EB1__GPIO2_29 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB1, 0x4E8, 0x198, 3, 0x000, 0), /* MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB1, 0x4E8, 0x198, 4, 0x000, 0), /* MX53_PAD_EIM_EB1__IPU_CSI1_D_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_EB1, 0x4E8, 0x198, 7, 0x000, 0), /* MX53_PAD_EIM_EB1__SRC_BT_CFG2_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA0, 0x4EC, 0x19C, 0, 0x000, 0), /* MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA0, 0x4EC, 0x19C, 1, 0x000, 0), /* MX53_PAD_EIM_DA0__GPIO3_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA0, 0x4EC, 0x19C, 3, 0x000, 0), /* MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA0, 0x4EC, 0x19C, 4, 0x000, 0), /* MX53_PAD_EIM_DA0__IPU_CSI1_D_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA0, 0x4EC, 0x19C, 7, 0x000, 0), /* MX53_PAD_EIM_DA0__SRC_BT_CFG2_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA1, 0x4F0, 0x1A0, 0, 0x000, 0), /* MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA1, 0x4F0, 0x1A0, 1, 0x000, 0), /* MX53_PAD_EIM_DA1__GPIO3_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA1, 0x4F0, 0x1A0, 3, 0x000, 0), /* MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA1, 0x4F0, 0x1A0, 4, 0x000, 0), /* MX53_PAD_EIM_DA1__IPU_CSI1_D_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA1, 0x4F0, 0x1A0, 7, 0x000, 0), /* MX53_PAD_EIM_DA1__SRC_BT_CFG2_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA2, 0x4F4, 0x1A4, 0, 0x000, 0), /* MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA2, 0x4F4, 0x1A4, 1, 0x000, 0), /* MX53_PAD_EIM_DA2__GPIO3_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA2, 0x4F4, 0x1A4, 3, 0x000, 0), /* MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA2, 0x4F4, 0x1A4, 4, 0x000, 0), /* MX53_PAD_EIM_DA2__IPU_CSI1_D_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA2, 0x4F4, 0x1A4, 7, 0x000, 0), /* MX53_PAD_EIM_DA2__SRC_BT_CFG2_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA3, 0x4F8, 0x1A8, 0, 0x000, 0), /* MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA3, 0x4F8, 0x1A8, 1, 0x000, 0), /* MX53_PAD_EIM_DA3__GPIO3_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA3, 0x4F8, 0x1A8, 3, 0x000, 0), /* MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA3, 0x4F8, 0x1A8, 4, 0x000, 0), /* MX53_PAD_EIM_DA3__IPU_CSI1_D_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA3, 0x4F8, 0x1A8, 7, 0x000, 0), /* MX53_PAD_EIM_DA3__SRC_BT_CFG2_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA4, 0x4FC, 0x1AC, 0, 0x000, 0), /* MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA4, 0x4FC, 0x1AC, 1, 0x000, 0), /* MX53_PAD_EIM_DA4__GPIO3_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA4, 0x4FC, 0x1AC, 3, 0x000, 0), /* MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA4, 0x4FC, 0x1AC, 4, 0x000, 0), /* MX53_PAD_EIM_DA4__IPU_CSI1_D_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA4, 0x4FC, 0x1AC, 7, 0x000, 0), /* MX53_PAD_EIM_DA4__SRC_BT_CFG3_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA5, 0x500, 0x1B0, 0, 0x000, 0), /* MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA5, 0x500, 0x1B0, 1, 0x000, 0), /* MX53_PAD_EIM_DA5__GPIO3_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA5, 0x500, 0x1B0, 3, 0x000, 0), /* MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA5, 0x500, 0x1B0, 4, 0x000, 0), /* MX53_PAD_EIM_DA5__IPU_CSI1_D_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA5, 0x500, 0x1B0, 7, 0x000, 0), /* MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA6, 0x504, 0x1B4, 0, 0x000, 0), /* MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA6, 0x504, 0x1B4, 1, 0x000, 0), /* MX53_PAD_EIM_DA6__GPIO3_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA6, 0x504, 0x1B4, 3, 0x000, 0), /* MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA6, 0x504, 0x1B4, 4, 0x000, 0), /* MX53_PAD_EIM_DA6__IPU_CSI1_D_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA6, 0x504, 0x1B4, 7, 0x000, 0), /* MX53_PAD_EIM_DA6__SRC_BT_CFG3_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA7, 0x508, 0x1B8, 0, 0x000, 0), /* MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA7, 0x508, 0x1B8, 1, 0x000, 0), /* MX53_PAD_EIM_DA7__GPIO3_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA7, 0x508, 0x1B8, 3, 0x000, 0), /* MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA7, 0x508, 0x1B8, 4, 0x000, 0), /* MX53_PAD_EIM_DA7__IPU_CSI1_D_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA7, 0x508, 0x1B8, 7, 0x000, 0), /* MX53_PAD_EIM_DA7__SRC_BT_CFG3_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA8, 0x50C, 0x1BC, 0, 0x000, 0), /* MX53_PAD_EIM_DA8__EMI_NAND_WEIM_DA_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA8, 0x50C, 0x1BC, 1, 0x000, 0), /* MX53_PAD_EIM_DA8__GPIO3_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA8, 0x50C, 0x1BC, 3, 0x000, 0), /* MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA8, 0x50C, 0x1BC, 4, 0x000, 0), /* MX53_PAD_EIM_DA8__IPU_CSI1_D_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA8, 0x50C, 0x1BC, 7, 0x000, 0), /* MX53_PAD_EIM_DA8__SRC_BT_CFG3_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA9, 0x510, 0x1C0, 0, 0x000, 0), /* MX53_PAD_EIM_DA9__EMI_NAND_WEIM_DA_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA9, 0x510, 0x1C0, 1, 0x000, 0), /* MX53_PAD_EIM_DA9__GPIO3_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA9, 0x510, 0x1C0, 3, 0x000, 0), /* MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA9, 0x510, 0x1C0, 4, 0x000, 0), /* MX53_PAD_EIM_DA9__IPU_CSI1_D_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA9, 0x510, 0x1C0, 7, 0x000, 0), /* MX53_PAD_EIM_DA9__SRC_BT_CFG3_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA10, 0x514, 0x1C4, 0, 0x000, 0), /* MX53_PAD_EIM_DA10__EMI_NAND_WEIM_DA_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA10, 0x514, 0x1C4, 1, 0x000, 0), /* MX53_PAD_EIM_DA10__GPIO3_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA10, 0x514, 0x1C4, 3, 0x000, 0), /* MX53_PAD_EIM_DA10__IPU_DI1_PIN15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA10, 0x514, 0x1C4, 4, 0x834, 1), /* MX53_PAD_EIM_DA10__IPU_CSI1_DATA_EN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA10, 0x514, 0x1C4, 7, 0x000, 0), /* MX53_PAD_EIM_DA10__SRC_BT_CFG3_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA11, 0x518, 0x1C8, 0, 0x000, 0), /* MX53_PAD_EIM_DA11__EMI_NAND_WEIM_DA_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA11, 0x518, 0x1C8, 1, 0x000, 0), /* MX53_PAD_EIM_DA11__GPIO3_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA11, 0x518, 0x1C8, 3, 0x000, 0), /* MX53_PAD_EIM_DA11__IPU_DI1_PIN2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA11, 0x518, 0x1C8, 4, 0x838, 1), /* MX53_PAD_EIM_DA11__IPU_CSI1_HSYNC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA12, 0x51C, 0x1CC, 0, 0x000, 0), /* MX53_PAD_EIM_DA12__EMI_NAND_WEIM_DA_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA12, 0x51C, 0x1CC, 1, 0x000, 0), /* MX53_PAD_EIM_DA12__GPIO3_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA12, 0x51C, 0x1CC, 3, 0x000, 0), /* MX53_PAD_EIM_DA12__IPU_DI1_PIN3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA12, 0x51C, 0x1CC, 4, 0x83C, 1), /* MX53_PAD_EIM_DA12__IPU_CSI1_VSYNC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA13, 0x520, 0x1D0, 0, 0x000, 0), /* MX53_PAD_EIM_DA13__EMI_NAND_WEIM_DA_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA13, 0x520, 0x1D0, 1, 0x000, 0), /* MX53_PAD_EIM_DA13__GPIO3_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA13, 0x520, 0x1D0, 3, 0x000, 0), /* MX53_PAD_EIM_DA13__IPU_DI1_D0_CS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA13, 0x520, 0x1D0, 4, 0x76C, 1), /* MX53_PAD_EIM_DA13__CCM_DI1_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA14, 0x524, 0x1D4, 0, 0x000, 0), /* MX53_PAD_EIM_DA14__EMI_NAND_WEIM_DA_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA14, 0x524, 0x1D4, 1, 0x000, 0), /* MX53_PAD_EIM_DA14__GPIO3_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA14, 0x524, 0x1D4, 3, 0x000, 0), /* MX53_PAD_EIM_DA14__IPU_DI1_D1_CS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA14, 0x524, 0x1D4, 4, 0x000, 0), /* MX53_PAD_EIM_DA14__CCM_DI0_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA15, 0x528, 0x1D8, 0, 0x000, 0), /* MX53_PAD_EIM_DA15__EMI_NAND_WEIM_DA_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA15, 0x528, 0x1D8, 1, 0x000, 0), /* MX53_PAD_EIM_DA15__GPIO3_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA15, 0x528, 0x1D8, 3, 0x000, 0), /* MX53_PAD_EIM_DA15__IPU_DI1_PIN1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_DA15, 0x528, 0x1D8, 4, 0x000, 0), /* MX53_PAD_EIM_DA15__IPU_DI1_PIN4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_WE_B, 0x52C, 0x1DC, 0, 0x000, 0), /* MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_WE_B, 0x52C, 0x1DC, 1, 0x000, 0), /* MX53_PAD_NANDF_WE_B__GPIO6_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_RE_B, 0x530, 0x1E0, 0, 0x000, 0), /* MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_RE_B, 0x530, 0x1E0, 1, 0x000, 0), /* MX53_PAD_NANDF_RE_B__GPIO6_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_WAIT, 0x534, 0x1E4, 0, 0x000, 0), /* MX53_PAD_EIM_WAIT__EMI_WEIM_WAIT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_WAIT, 0x534, 0x1E4, 1, 0x000, 0), /* MX53_PAD_EIM_WAIT__GPIO5_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_EIM_WAIT, 0x534, 0x1E4, 2, 0x000, 0), /* MX53_PAD_EIM_WAIT__EMI_WEIM_DTACK_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS1_TX3_P, NO_PAD, 0x1EC, 0, 0x000, 0), /* MX53_PAD_LVDS1_TX3_P__GPIO6_22 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS1_TX3_P, NO_PAD, 0x1EC, 1, 0x000, 0), /* MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS1_TX2_P, NO_PAD, 0x1F0, 0, 0x000, 0), /* MX53_PAD_LVDS1_TX2_P__GPIO6_24 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS1_TX2_P, NO_PAD, 0x1F0, 1, 0x000, 0), /* MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS1_CLK_P, NO_PAD, 0x1F4, 0, 0x000, 0), /* MX53_PAD_LVDS1_CLK_P__GPIO6_26 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS1_CLK_P, NO_PAD, 0x1F4, 1, 0x000, 0), /* MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS1_TX1_P, NO_PAD, 0x1F8, 0, 0x000, 0), /* MX53_PAD_LVDS1_TX1_P__GPIO6_28 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS1_TX1_P, NO_PAD, 0x1F8, 1, 0x000, 0), /* MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS1_TX0_P, NO_PAD, 0x1FC, 0, 0x000, 0), /* MX53_PAD_LVDS1_TX0_P__GPIO6_30 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS1_TX0_P, NO_PAD, 0x1FC, 1, 0x000, 0), /* MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS0_TX3_P, NO_PAD, 0x200, 0, 0x000, 0), /* MX53_PAD_LVDS0_TX3_P__GPIO7_22 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS0_TX3_P, NO_PAD, 0x200, 1, 0x000, 0), /* MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS0_CLK_P, NO_PAD, 0x204, 0, 0x000, 0), /* MX53_PAD_LVDS0_CLK_P__GPIO7_24 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS0_CLK_P, NO_PAD, 0x204, 1, 0x000, 0), /* MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS0_TX2_P, NO_PAD, 0x208, 0, 0x000, 0), /* MX53_PAD_LVDS0_TX2_P__GPIO7_26 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS0_TX2_P, NO_PAD, 0x208, 1, 0x000, 0), /* MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS0_TX1_P, NO_PAD, 0x20C, 0, 0x000, 0), /* MX53_PAD_LVDS0_TX1_P__GPIO7_28 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS0_TX1_P, NO_PAD, 0x20C, 1, 0x000, 0), /* MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS0_TX0_P, NO_PAD, 0x210, 0, 0x000, 0), /* MX53_PAD_LVDS0_TX0_P__GPIO7_30 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_LVDS0_TX0_P, NO_PAD, 0x210, 1, 0x000, 0), /* MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_10, 0x540, 0x214, 0, 0x000, 0), /* MX53_PAD_GPIO_10__GPIO4_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_10, 0x540, 0x214, 1, 0x000, 0), /* MX53_PAD_GPIO_10__OSC32k_32K_OUT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_11, 0x544, 0x218, 0, 0x000, 0), /* MX53_PAD_GPIO_11__GPIO4_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_12, 0x548, 0x21C, 0, 0x000, 0), /* MX53_PAD_GPIO_12__GPIO4_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_13, 0x54C, 0x220, 0, 0x000, 0), /* MX53_PAD_GPIO_13__GPIO4_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_14, 0x550, 0x224, 0, 0x000, 0), /* MX53_PAD_GPIO_14__GPIO4_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CLE, 0x5A0, 0x228, 0, 0x000, 0), /* MX53_PAD_NANDF_CLE__EMI_NANDF_CLE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CLE, 0x5A0, 0x228, 1, 0x000, 0), /* MX53_PAD_NANDF_CLE__GPIO6_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CLE, 0x5A0, 0x228, 7, 0x000, 0), /* MX53_PAD_NANDF_CLE__USBPHY1_VSTATUS_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_ALE, 0x5A4, 0x22C, 0, 0x000, 0), /* MX53_PAD_NANDF_ALE__EMI_NANDF_ALE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_ALE, 0x5A4, 0x22C, 1, 0x000, 0), /* MX53_PAD_NANDF_ALE__GPIO6_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_ALE, 0x5A4, 0x22C, 7, 0x000, 0), /* MX53_PAD_NANDF_ALE__USBPHY1_VSTATUS_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_WP_B, 0x5A8, 0x230, 0, 0x000, 0), /* MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_WP_B, 0x5A8, 0x230, 1, 0x000, 0), /* MX53_PAD_NANDF_WP_B__GPIO6_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_WP_B, 0x5A8, 0x230, 7, 0x000, 0), /* MX53_PAD_NANDF_WP_B__USBPHY1_VSTATUS_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_RB0, 0x5AC, 0x234, 0, 0x000, 0), /* MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_RB0, 0x5AC, 0x234, 1, 0x000, 0), /* MX53_PAD_NANDF_RB0__GPIO6_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_RB0, 0x5AC, 0x234, 7, 0x000, 0), /* MX53_PAD_NANDF_RB0__USBPHY1_VSTATUS_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS0, 0x5B0, 0x238, 0, 0x000, 0), /* MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS0, 0x5B0, 0x238, 1, 0x000, 0), /* MX53_PAD_NANDF_CS0__GPIO6_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS0, 0x5B0, 0x238, 7, 0x000, 0), /* MX53_PAD_NANDF_CS0__USBPHY1_VSTATUS_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS1, 0x5B4, 0x23C, 0, 0x000, 0), /* MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS1, 0x5B4, 0x23C, 1, 0x000, 0), /* MX53_PAD_NANDF_CS1__GPIO6_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS1, 0x5B4, 0x23C, 6, 0x858, 0), /* MX53_PAD_NANDF_CS1__MLB_MLBCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS1, 0x5B4, 0x23C, 7, 0x000, 0), /* MX53_PAD_NANDF_CS1__USBPHY1_VSTATUS_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS2, 0x5B8, 0x240, 0, 0x000, 0), /* MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS2, 0x5B8, 0x240, 1, 0x000, 0), /* MX53_PAD_NANDF_CS2__GPIO6_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS2, 0x5B8, 0x240, 2, 0x000, 0), /* MX53_PAD_NANDF_CS2__IPU_SISG_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS2, 0x5B8, 0x240, 3, 0x7E4, 0), /* MX53_PAD_NANDF_CS2__ESAI1_TX0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS2, 0x5B8, 0x240, 4, 0x000, 0), /* MX53_PAD_NANDF_CS2__EMI_WEIM_CRE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS2, 0x5B8, 0x240, 5, 0x000, 0), /* MX53_PAD_NANDF_CS2__CCM_CSI0_MCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS2, 0x5B8, 0x240, 6, 0x860, 0), /* MX53_PAD_NANDF_CS2__MLB_MLBSIG */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS2, 0x5B8, 0x240, 7, 0x000, 0), /* MX53_PAD_NANDF_CS2__USBPHY1_VSTATUS_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS3, 0x5BC, 0x244, 0, 0x000, 0), /* MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS3, 0x5BC, 0x244, 1, 0x000, 0), /* MX53_PAD_NANDF_CS3__GPIO6_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS3, 0x5BC, 0x244, 2, 0x000, 0), /* MX53_PAD_NANDF_CS3__IPU_SISG_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS3, 0x5BC, 0x244, 3, 0x7E8, 0), /* MX53_PAD_NANDF_CS3__ESAI1_TX1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS3, 0x5BC, 0x244, 4, 0x000, 0), /* MX53_PAD_NANDF_CS3__EMI_WEIM_A_26 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS3, 0x5BC, 0x244, 6, 0x85C, 0), /* MX53_PAD_NANDF_CS3__MLB_MLBDAT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_NANDF_CS3, 0x5BC, 0x244, 7, 0x000, 0), /* MX53_PAD_NANDF_CS3__USBPHY1_VSTATUS_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDIO, 0x5C4, 0x248, 0, 0x804, 1), /* MX53_PAD_FEC_MDIO__FEC_MDIO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDIO, 0x5C4, 0x248, 1, 0x000, 0), /* MX53_PAD_FEC_MDIO__GPIO1_22 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDIO, 0x5C4, 0x248, 2, 0x7DC, 0), /* MX53_PAD_FEC_MDIO__ESAI1_SCKR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDIO, 0x5C4, 0x248, 3, 0x800, 1), /* MX53_PAD_FEC_MDIO__FEC_COL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDIO, 0x5C4, 0x248, 4, 0x000, 0), /* MX53_PAD_FEC_MDIO__RTC_CE_RTC_PS2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDIO, 0x5C4, 0x248, 5, 0x000, 0), /* MX53_PAD_FEC_MDIO__SDMA_DEBUG_BUS_DEVICE_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDIO, 0x5C4, 0x248, 6, 0x000, 0), /* MX53_PAD_FEC_MDIO__EMI_EMI_DEBUG_49 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_REF_CLK, 0x5C8, 0x24C, 0, 0x000, 0), /* MX53_PAD_FEC_REF_CLK__FEC_TX_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_REF_CLK, 0x5C8, 0x24C, 1, 0x000, 0), /* MX53_PAD_FEC_REF_CLK__GPIO1_23 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_REF_CLK, 0x5C8, 0x24C, 2, 0x7CC, 0), /* MX53_PAD_FEC_REF_CLK__ESAI1_FSR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_REF_CLK, 0x5C8, 0x24C, 5, 0x000, 0), /* MX53_PAD_FEC_REF_CLK__SDMA_DEBUG_BUS_DEVICE_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_REF_CLK, 0x5C8, 0x24C, 6, 0x000, 0), /* MX53_PAD_FEC_REF_CLK__EMI_EMI_DEBUG_50 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RX_ER, 0x5CC, 0x250, 0, 0x000, 0), /* MX53_PAD_FEC_RX_ER__FEC_RX_ER */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RX_ER, 0x5CC, 0x250, 1, 0x000, 0), /* MX53_PAD_FEC_RX_ER__GPIO1_24 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RX_ER, 0x5CC, 0x250, 2, 0x7D4, 0), /* MX53_PAD_FEC_RX_ER__ESAI1_HCKR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RX_ER, 0x5CC, 0x250, 3, 0x808, 1), /* MX53_PAD_FEC_RX_ER__FEC_RX_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RX_ER, 0x5CC, 0x250, 4, 0x000, 0), /* MX53_PAD_FEC_RX_ER__RTC_CE_RTC_PS3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_CRS_DV, 0x5D0, 0x254, 0, 0x000, 0), /* MX53_PAD_FEC_CRS_DV__FEC_RX_DV */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_CRS_DV, 0x5D0, 0x254, 1, 0x000, 0), /* MX53_PAD_FEC_CRS_DV__GPIO1_25 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_CRS_DV, 0x5D0, 0x254, 2, 0x7E0, 0), /* MX53_PAD_FEC_CRS_DV__ESAI1_SCKT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RXD1, 0x5D4, 0x258, 0, 0x000, 0), /* MX53_PAD_FEC_RXD1__FEC_RDATA_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RXD1, 0x5D4, 0x258, 1, 0x000, 0), /* MX53_PAD_FEC_RXD1__GPIO1_26 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RXD1, 0x5D4, 0x258, 2, 0x7D0, 0), /* MX53_PAD_FEC_RXD1__ESAI1_FST */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RXD1, 0x5D4, 0x258, 3, 0x860, 1), /* MX53_PAD_FEC_RXD1__MLB_MLBSIG */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RXD1, 0x5D4, 0x258, 4, 0x000, 0), /* MX53_PAD_FEC_RXD1__RTC_CE_RTC_PS1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RXD0, 0x5D8, 0x25C, 0, 0x000, 0), /* MX53_PAD_FEC_RXD0__FEC_RDATA_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RXD0, 0x5D8, 0x25C, 1, 0x000, 0), /* MX53_PAD_FEC_RXD0__GPIO1_27 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RXD0, 0x5D8, 0x25C, 2, 0x7D8, 0), /* MX53_PAD_FEC_RXD0__ESAI1_HCKT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_RXD0, 0x5D8, 0x25C, 3, 0x000, 0), /* MX53_PAD_FEC_RXD0__OSC32k_32K_OUT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_TX_EN, 0x5DC, 0x260, 0, 0x000, 0), /* MX53_PAD_FEC_TX_EN__FEC_TX_EN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_TX_EN, 0x5DC, 0x260, 1, 0x000, 0), /* MX53_PAD_FEC_TX_EN__GPIO1_28 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_TX_EN, 0x5DC, 0x260, 2, 0x7F0, 0), /* MX53_PAD_FEC_TX_EN__ESAI1_TX3_RX2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_TXD1, 0x5E0, 0x264, 0, 0x000, 0), /* MX53_PAD_FEC_TXD1__FEC_TDATA_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_TXD1, 0x5E0, 0x264, 1, 0x000, 0), /* MX53_PAD_FEC_TXD1__GPIO1_29 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_TXD1, 0x5E0, 0x264, 2, 0x7EC, 0), /* MX53_PAD_FEC_TXD1__ESAI1_TX2_RX3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_TXD1, 0x5E0, 0x264, 3, 0x858, 1), /* MX53_PAD_FEC_TXD1__MLB_MLBCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_TXD1, 0x5E0, 0x264, 4, 0x000, 0), /* MX53_PAD_FEC_TXD1__RTC_CE_RTC_PRSC_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_TXD0, 0x5E4, 0x268, 0, 0x000, 0), /* MX53_PAD_FEC_TXD0__FEC_TDATA_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_TXD0, 0x5E4, 0x268, 1, 0x000, 0), /* MX53_PAD_FEC_TXD0__GPIO1_30 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_TXD0, 0x5E4, 0x268, 2, 0x7F4, 0), /* MX53_PAD_FEC_TXD0__ESAI1_TX4_RX1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_TXD0, 0x5E4, 0x268, 7, 0x000, 0), /* MX53_PAD_FEC_TXD0__USBPHY2_DATAOUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDC, 0x5E8, 0x26C, 0, 0x000, 0), /* MX53_PAD_FEC_MDC__FEC_MDC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDC, 0x5E8, 0x26C, 1, 0x000, 0), /* MX53_PAD_FEC_MDC__GPIO1_31 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDC, 0x5E8, 0x26C, 2, 0x7F8, 0), /* MX53_PAD_FEC_MDC__ESAI1_TX5_RX0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDC, 0x5E8, 0x26C, 3, 0x85C, 1), /* MX53_PAD_FEC_MDC__MLB_MLBDAT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDC, 0x5E8, 0x26C, 4, 0x000, 0), /* MX53_PAD_FEC_MDC__RTC_CE_RTC_ALARM1_TRIG */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_FEC_MDC, 0x5E8, 0x26C, 7, 0x000, 0), /* MX53_PAD_FEC_MDC__USBPHY2_DATAOUT_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DIOW, 0x5F0, 0x270, 0, 0x000, 0), /* MX53_PAD_PATA_DIOW__PATA_DIOW */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DIOW, 0x5F0, 0x270, 1, 0x000, 0), /* MX53_PAD_PATA_DIOW__GPIO6_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DIOW, 0x5F0, 0x270, 3, 0x000, 0), /* MX53_PAD_PATA_DIOW__UART1_TXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DIOW, 0x5F0, 0x270, 7, 0x000, 0), /* MX53_PAD_PATA_DIOW__USBPHY2_DATAOUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DMACK, 0x5F4, 0x274, 0, 0x000, 0), /* MX53_PAD_PATA_DMACK__PATA_DMACK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DMACK, 0x5F4, 0x274, 1, 0x000, 0), /* MX53_PAD_PATA_DMACK__GPIO6_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DMACK, 0x5F4, 0x274, 3, 0x878, 3), /* MX53_PAD_PATA_DMACK__UART1_RXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DMACK, 0x5F4, 0x274, 7, 0x000, 0), /* MX53_PAD_PATA_DMACK__USBPHY2_DATAOUT_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DMARQ, 0x5F8, 0x278, 0, 0x000, 0), /* MX53_PAD_PATA_DMARQ__PATA_DMARQ */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DMARQ, 0x5F8, 0x278, 1, 0x000, 0), /* MX53_PAD_PATA_DMARQ__GPIO7_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DMARQ, 0x5F8, 0x278, 3, 0x000, 0), /* MX53_PAD_PATA_DMARQ__UART2_TXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DMARQ, 0x5F8, 0x278, 5, 0x000, 0), /* MX53_PAD_PATA_DMARQ__CCM_CCM_OUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DMARQ, 0x5F8, 0x278, 7, 0x000, 0), /* MX53_PAD_PATA_DMARQ__USBPHY2_DATAOUT_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_BUFFER_EN, 0x5FC, 0x27C, 0, 0x000, 0), /* MX53_PAD_PATA_BUFFER_EN__PATA_BUFFER_EN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_BUFFER_EN, 0x5FC, 0x27C, 1, 0x000, 0), /* MX53_PAD_PATA_BUFFER_EN__GPIO7_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_BUFFER_EN, 0x5FC, 0x27C, 3, 0x880, 3), /* MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_BUFFER_EN, 0x5FC, 0x27C, 5, 0x000, 0), /* MX53_PAD_PATA_BUFFER_EN__CCM_CCM_OUT_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_BUFFER_EN, 0x5FC, 0x27C, 7, 0x000, 0), /* MX53_PAD_PATA_BUFFER_EN__USBPHY2_DATAOUT_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_INTRQ, 0x600, 0x280, 0, 0x000, 0), /* MX53_PAD_PATA_INTRQ__PATA_INTRQ */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_INTRQ, 0x600, 0x280, 1, 0x000, 0), /* MX53_PAD_PATA_INTRQ__GPIO7_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_INTRQ, 0x600, 0x280, 3, 0x000, 0), /* MX53_PAD_PATA_INTRQ__UART2_CTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_INTRQ, 0x600, 0x280, 4, 0x000, 0), /* MX53_PAD_PATA_INTRQ__CAN1_TXCAN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_INTRQ, 0x600, 0x280, 5, 0x000, 0), /* MX53_PAD_PATA_INTRQ__CCM_CCM_OUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_INTRQ, 0x600, 0x280, 7, 0x000, 0), /* MX53_PAD_PATA_INTRQ__USBPHY2_DATAOUT_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DIOR, 0x604, 0x284, 0, 0x000, 0), /* MX53_PAD_PATA_DIOR__PATA_DIOR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DIOR, 0x604, 0x284, 1, 0x000, 0), /* MX53_PAD_PATA_DIOR__GPIO7_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DIOR, 0x604, 0x284, 3, 0x87C, 3), /* MX53_PAD_PATA_DIOR__UART2_RTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DIOR, 0x604, 0x284, 4, 0x760, 1), /* MX53_PAD_PATA_DIOR__CAN1_RXCAN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DIOR, 0x604, 0x284, 7, 0x000, 0), /* MX53_PAD_PATA_DIOR__USBPHY2_DATAOUT_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_RESET_B, 0x608, 0x288, 0, 0x000, 0), /* MX53_PAD_PATA_RESET_B__PATA_PATA_RESET_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_RESET_B, 0x608, 0x288, 1, 0x000, 0), /* MX53_PAD_PATA_RESET_B__GPIO7_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_RESET_B, 0x608, 0x288, 2, 0x000, 0), /* MX53_PAD_PATA_RESET_B__ESDHC3_CMD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_RESET_B, 0x608, 0x288, 3, 0x000, 0), /* MX53_PAD_PATA_RESET_B__UART1_CTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_RESET_B, 0x608, 0x288, 4, 0x000, 0), /* MX53_PAD_PATA_RESET_B__CAN2_TXCAN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_RESET_B, 0x608, 0x288, 7, 0x000, 0), /* MX53_PAD_PATA_RESET_B__USBPHY1_DATAOUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_IORDY, 0x60C, 0x28C, 0, 0x000, 0), /* MX53_PAD_PATA_IORDY__PATA_IORDY */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_IORDY, 0x60C, 0x28C, 1, 0x000, 0), /* MX53_PAD_PATA_IORDY__GPIO7_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_IORDY, 0x60C, 0x28C, 2, 0x000, 0), /* MX53_PAD_PATA_IORDY__ESDHC3_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_IORDY, 0x60C, 0x28C, 3, 0x874, 3), /* MX53_PAD_PATA_IORDY__UART1_RTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_IORDY, 0x60C, 0x28C, 4, 0x764, 1), /* MX53_PAD_PATA_IORDY__CAN2_RXCAN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_IORDY, 0x60C, 0x28C, 7, 0x000, 0), /* MX53_PAD_PATA_IORDY__USBPHY1_DATAOUT_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_0, 0x610, 0x290, 0, 0x000, 0), /* MX53_PAD_PATA_DA_0__PATA_DA_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_0, 0x610, 0x290, 1, 0x000, 0), /* MX53_PAD_PATA_DA_0__GPIO7_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_0, 0x610, 0x290, 2, 0x000, 0), /* MX53_PAD_PATA_DA_0__ESDHC3_RST */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_0, 0x610, 0x290, 4, 0x864, 0), /* MX53_PAD_PATA_DA_0__OWIRE_LINE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_0, 0x610, 0x290, 7, 0x000, 0), /* MX53_PAD_PATA_DA_0__USBPHY1_DATAOUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_1, 0x614, 0x294, 0, 0x000, 0), /* MX53_PAD_PATA_DA_1__PATA_DA_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_1, 0x614, 0x294, 1, 0x000, 0), /* MX53_PAD_PATA_DA_1__GPIO7_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_1, 0x614, 0x294, 2, 0x000, 0), /* MX53_PAD_PATA_DA_1__ESDHC4_CMD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_1, 0x614, 0x294, 4, 0x000, 0), /* MX53_PAD_PATA_DA_1__UART3_CTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_1, 0x614, 0x294, 7, 0x000, 0), /* MX53_PAD_PATA_DA_1__USBPHY1_DATAOUT_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_2, 0x618, 0x298, 0, 0x000, 0), /* MX53_PAD_PATA_DA_2__PATA_DA_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_2, 0x618, 0x298, 1, 0x000, 0), /* MX53_PAD_PATA_DA_2__GPIO7_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_2, 0x618, 0x298, 2, 0x000, 0), /* MX53_PAD_PATA_DA_2__ESDHC4_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_2, 0x618, 0x298, 4, 0x884, 5), /* MX53_PAD_PATA_DA_2__UART3_RTS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DA_2, 0x618, 0x298, 7, 0x000, 0), /* MX53_PAD_PATA_DA_2__USBPHY1_DATAOUT_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_CS_0, 0x61C, 0x29C, 0, 0x000, 0), /* MX53_PAD_PATA_CS_0__PATA_CS_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_CS_0, 0x61C, 0x29C, 1, 0x000, 0), /* MX53_PAD_PATA_CS_0__GPIO7_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_CS_0, 0x61C, 0x29C, 4, 0x000, 0), /* MX53_PAD_PATA_CS_0__UART3_TXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_CS_0, 0x61C, 0x29C, 7, 0x000, 0), /* MX53_PAD_PATA_CS_0__USBPHY1_DATAOUT_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_CS_1, 0x620, 0x2A0, 0, 0x000, 0), /* MX53_PAD_PATA_CS_1__PATA_CS_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_CS_1, 0x620, 0x2A0, 1, 0x000, 0), /* MX53_PAD_PATA_CS_1__GPIO7_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_CS_1, 0x620, 0x2A0, 4, 0x888, 3), /* MX53_PAD_PATA_CS_1__UART3_RXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_CS_1, 0x620, 0x2A0, 7, 0x000, 0), /* MX53_PAD_PATA_CS_1__USBPHY1_DATAOUT_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA0, 0x628, 0x2A4, 0, 0x000, 0), /* MX53_PAD_PATA_DATA0__PATA_DATA_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA0, 0x628, 0x2A4, 1, 0x000, 0), /* MX53_PAD_PATA_DATA0__GPIO2_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA0, 0x628, 0x2A4, 3, 0x000, 0), /* MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA0, 0x628, 0x2A4, 4, 0x000, 0), /* MX53_PAD_PATA_DATA0__ESDHC3_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA0, 0x628, 0x2A4, 5, 0x000, 0), /* MX53_PAD_PATA_DATA0__GPU3d_GPU_DEBUG_OUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA0, 0x628, 0x2A4, 6, 0x000, 0), /* MX53_PAD_PATA_DATA0__IPU_DIAG_BUS_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA0, 0x628, 0x2A4, 7, 0x000, 0), /* MX53_PAD_PATA_DATA0__USBPHY1_DATAOUT_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA1, 0x62C, 0x2A8, 0, 0x000, 0), /* MX53_PAD_PATA_DATA1__PATA_DATA_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA1, 0x62C, 0x2A8, 1, 0x000, 0), /* MX53_PAD_PATA_DATA1__GPIO2_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA1, 0x62C, 0x2A8, 3, 0x000, 0), /* MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA1, 0x62C, 0x2A8, 4, 0x000, 0), /* MX53_PAD_PATA_DATA1__ESDHC3_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA1, 0x62C, 0x2A8, 5, 0x000, 0), /* MX53_PAD_PATA_DATA1__GPU3d_GPU_DEBUG_OUT_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA1, 0x62C, 0x2A8, 6, 0x000, 0), /* MX53_PAD_PATA_DATA1__IPU_DIAG_BUS_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA2, 0x630, 0x2AC, 0, 0x000, 0), /* MX53_PAD_PATA_DATA2__PATA_DATA_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA2, 0x630, 0x2AC, 1, 0x000, 0), /* MX53_PAD_PATA_DATA2__GPIO2_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA2, 0x630, 0x2AC, 3, 0x000, 0), /* MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA2, 0x630, 0x2AC, 4, 0x000, 0), /* MX53_PAD_PATA_DATA2__ESDHC3_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA2, 0x630, 0x2AC, 5, 0x000, 0), /* MX53_PAD_PATA_DATA2__GPU3d_GPU_DEBUG_OUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA2, 0x630, 0x2AC, 6, 0x000, 0), /* MX53_PAD_PATA_DATA2__IPU_DIAG_BUS_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA3, 0x634, 0x2B0, 0, 0x000, 0), /* MX53_PAD_PATA_DATA3__PATA_DATA_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA3, 0x634, 0x2B0, 1, 0x000, 0), /* MX53_PAD_PATA_DATA3__GPIO2_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA3, 0x634, 0x2B0, 3, 0x000, 0), /* MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA3, 0x634, 0x2B0, 4, 0x000, 0), /* MX53_PAD_PATA_DATA3__ESDHC3_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA3, 0x634, 0x2B0, 5, 0x000, 0), /* MX53_PAD_PATA_DATA3__GPU3d_GPU_DEBUG_OUT_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA3, 0x634, 0x2B0, 6, 0x000, 0), /* MX53_PAD_PATA_DATA3__IPU_DIAG_BUS_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA4, 0x638, 0x2B4, 0, 0x000, 0), /* MX53_PAD_PATA_DATA4__PATA_DATA_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA4, 0x638, 0x2B4, 1, 0x000, 0), /* MX53_PAD_PATA_DATA4__GPIO2_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA4, 0x638, 0x2B4, 3, 0x000, 0), /* MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA4, 0x638, 0x2B4, 4, 0x000, 0), /* MX53_PAD_PATA_DATA4__ESDHC4_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA4, 0x638, 0x2B4, 5, 0x000, 0), /* MX53_PAD_PATA_DATA4__GPU3d_GPU_DEBUG_OUT_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA4, 0x638, 0x2B4, 6, 0x000, 0), /* MX53_PAD_PATA_DATA4__IPU_DIAG_BUS_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA5, 0x63C, 0x2B8, 0, 0x000, 0), /* MX53_PAD_PATA_DATA5__PATA_DATA_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA5, 0x63C, 0x2B8, 1, 0x000, 0), /* MX53_PAD_PATA_DATA5__GPIO2_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA5, 0x63C, 0x2B8, 3, 0x000, 0), /* MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA5, 0x63C, 0x2B8, 4, 0x000, 0), /* MX53_PAD_PATA_DATA5__ESDHC4_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA5, 0x63C, 0x2B8, 5, 0x000, 0), /* MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA5, 0x63C, 0x2B8, 6, 0x000, 0), /* MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA6, 0x640, 0x2BC, 0, 0x000, 0), /* MX53_PAD_PATA_DATA6__PATA_DATA_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA6, 0x640, 0x2BC, 1, 0x000, 0), /* MX53_PAD_PATA_DATA6__GPIO2_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA6, 0x640, 0x2BC, 3, 0x000, 0), /* MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA6, 0x640, 0x2BC, 4, 0x000, 0), /* MX53_PAD_PATA_DATA6__ESDHC4_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA6, 0x640, 0x2BC, 5, 0x000, 0), /* MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA6, 0x640, 0x2BC, 6, 0x000, 0), /* MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA7, 0x644, 0x2C0, 0, 0x000, 0), /* MX53_PAD_PATA_DATA7__PATA_DATA_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA7, 0x644, 0x2C0, 1, 0x000, 0), /* MX53_PAD_PATA_DATA7__GPIO2_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA7, 0x644, 0x2C0, 3, 0x000, 0), /* MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA7, 0x644, 0x2C0, 4, 0x000, 0), /* MX53_PAD_PATA_DATA7__ESDHC4_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA7, 0x644, 0x2C0, 5, 0x000, 0), /* MX53_PAD_PATA_DATA7__GPU3d_GPU_DEBUG_OUT_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA7, 0x644, 0x2C0, 6, 0x000, 0), /* MX53_PAD_PATA_DATA7__IPU_DIAG_BUS_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA8, 0x648, 0x2C4, 0, 0x000, 0), /* MX53_PAD_PATA_DATA8__PATA_DATA_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA8, 0x648, 0x2C4, 1, 0x000, 0), /* MX53_PAD_PATA_DATA8__GPIO2_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA8, 0x648, 0x2C4, 2, 0x000, 0), /* MX53_PAD_PATA_DATA8__ESDHC1_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA8, 0x648, 0x2C4, 3, 0x000, 0), /* MX53_PAD_PATA_DATA8__EMI_NANDF_D_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA8, 0x648, 0x2C4, 4, 0x000, 0), /* MX53_PAD_PATA_DATA8__ESDHC3_DAT0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA8, 0x648, 0x2C4, 5, 0x000, 0), /* MX53_PAD_PATA_DATA8__GPU3d_GPU_DEBUG_OUT_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA8, 0x648, 0x2C4, 6, 0x000, 0), /* MX53_PAD_PATA_DATA8__IPU_DIAG_BUS_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA9, 0x64C, 0x2C8, 0, 0x000, 0), /* MX53_PAD_PATA_DATA9__PATA_DATA_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA9, 0x64C, 0x2C8, 1, 0x000, 0), /* MX53_PAD_PATA_DATA9__GPIO2_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA9, 0x64C, 0x2C8, 2, 0x000, 0), /* MX53_PAD_PATA_DATA9__ESDHC1_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA9, 0x64C, 0x2C8, 3, 0x000, 0), /* MX53_PAD_PATA_DATA9__EMI_NANDF_D_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA9, 0x64C, 0x2C8, 4, 0x000, 0), /* MX53_PAD_PATA_DATA9__ESDHC3_DAT1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA9, 0x64C, 0x2C8, 5, 0x000, 0), /* MX53_PAD_PATA_DATA9__GPU3d_GPU_DEBUG_OUT_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA9, 0x64C, 0x2C8, 6, 0x000, 0), /* MX53_PAD_PATA_DATA9__IPU_DIAG_BUS_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA10, 0x650, 0x2CC, 0, 0x000, 0), /* MX53_PAD_PATA_DATA10__PATA_DATA_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA10, 0x650, 0x2CC, 1, 0x000, 0), /* MX53_PAD_PATA_DATA10__GPIO2_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA10, 0x650, 0x2CC, 2, 0x000, 0), /* MX53_PAD_PATA_DATA10__ESDHC1_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA10, 0x650, 0x2CC, 3, 0x000, 0), /* MX53_PAD_PATA_DATA10__EMI_NANDF_D_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA10, 0x650, 0x2CC, 4, 0x000, 0), /* MX53_PAD_PATA_DATA10__ESDHC3_DAT2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA10, 0x650, 0x2CC, 5, 0x000, 0), /* MX53_PAD_PATA_DATA10__GPU3d_GPU_DEBUG_OUT_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA10, 0x650, 0x2CC, 6, 0x000, 0), /* MX53_PAD_PATA_DATA10__IPU_DIAG_BUS_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA11, 0x654, 0x2D0, 0, 0x000, 0), /* MX53_PAD_PATA_DATA11__PATA_DATA_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA11, 0x654, 0x2D0, 1, 0x000, 0), /* MX53_PAD_PATA_DATA11__GPIO2_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA11, 0x654, 0x2D0, 2, 0x000, 0), /* MX53_PAD_PATA_DATA11__ESDHC1_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA11, 0x654, 0x2D0, 3, 0x000, 0), /* MX53_PAD_PATA_DATA11__EMI_NANDF_D_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA11, 0x654, 0x2D0, 4, 0x000, 0), /* MX53_PAD_PATA_DATA11__ESDHC3_DAT3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA11, 0x654, 0x2D0, 5, 0x000, 0), /* MX53_PAD_PATA_DATA11__GPU3d_GPU_DEBUG_OUT_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA11, 0x654, 0x2D0, 6, 0x000, 0), /* MX53_PAD_PATA_DATA11__IPU_DIAG_BUS_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA12, 0x658, 0x2D4, 0, 0x000, 0), /* MX53_PAD_PATA_DATA12__PATA_DATA_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA12, 0x658, 0x2D4, 1, 0x000, 0), /* MX53_PAD_PATA_DATA12__GPIO2_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA12, 0x658, 0x2D4, 2, 0x000, 0), /* MX53_PAD_PATA_DATA12__ESDHC2_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA12, 0x658, 0x2D4, 3, 0x000, 0), /* MX53_PAD_PATA_DATA12__EMI_NANDF_D_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA12, 0x658, 0x2D4, 4, 0x000, 0), /* MX53_PAD_PATA_DATA12__ESDHC4_DAT0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA12, 0x658, 0x2D4, 5, 0x000, 0), /* MX53_PAD_PATA_DATA12__GPU3d_GPU_DEBUG_OUT_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA12, 0x658, 0x2D4, 6, 0x000, 0), /* MX53_PAD_PATA_DATA12__IPU_DIAG_BUS_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA13, 0x65C, 0x2D8, 0, 0x000, 0), /* MX53_PAD_PATA_DATA13__PATA_DATA_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA13, 0x65C, 0x2D8, 1, 0x000, 0), /* MX53_PAD_PATA_DATA13__GPIO2_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA13, 0x65C, 0x2D8, 2, 0x000, 0), /* MX53_PAD_PATA_DATA13__ESDHC2_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA13, 0x65C, 0x2D8, 3, 0x000, 0), /* MX53_PAD_PATA_DATA13__EMI_NANDF_D_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA13, 0x65C, 0x2D8, 4, 0x000, 0), /* MX53_PAD_PATA_DATA13__ESDHC4_DAT1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA13, 0x65C, 0x2D8, 5, 0x000, 0), /* MX53_PAD_PATA_DATA13__GPU3d_GPU_DEBUG_OUT_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA13, 0x65C, 0x2D8, 6, 0x000, 0), /* MX53_PAD_PATA_DATA13__IPU_DIAG_BUS_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA14, 0x660, 0x2DC, 0, 0x000, 0), /* MX53_PAD_PATA_DATA14__PATA_DATA_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA14, 0x660, 0x2DC, 1, 0x000, 0), /* MX53_PAD_PATA_DATA14__GPIO2_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA14, 0x660, 0x2DC, 2, 0x000, 0), /* MX53_PAD_PATA_DATA14__ESDHC2_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA14, 0x660, 0x2DC, 3, 0x000, 0), /* MX53_PAD_PATA_DATA14__EMI_NANDF_D_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA14, 0x660, 0x2DC, 4, 0x000, 0), /* MX53_PAD_PATA_DATA14__ESDHC4_DAT2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA14, 0x660, 0x2DC, 5, 0x000, 0), /* MX53_PAD_PATA_DATA14__GPU3d_GPU_DEBUG_OUT_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA14, 0x660, 0x2DC, 6, 0x000, 0), /* MX53_PAD_PATA_DATA14__IPU_DIAG_BUS_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA15, 0x664, 0x2E0, 0, 0x000, 0), /* MX53_PAD_PATA_DATA15__PATA_DATA_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA15, 0x664, 0x2E0, 1, 0x000, 0), /* MX53_PAD_PATA_DATA15__GPIO2_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA15, 0x664, 0x2E0, 2, 0x000, 0), /* MX53_PAD_PATA_DATA15__ESDHC2_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA15, 0x664, 0x2E0, 3, 0x000, 0), /* MX53_PAD_PATA_DATA15__EMI_NANDF_D_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA15, 0x664, 0x2E0, 4, 0x000, 0), /* MX53_PAD_PATA_DATA15__ESDHC4_DAT3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA15, 0x664, 0x2E0, 5, 0x000, 0), /* MX53_PAD_PATA_DATA15__GPU3d_GPU_DEBUG_OUT_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_PATA_DATA15, 0x664, 0x2E0, 6, 0x000, 0), /* MX53_PAD_PATA_DATA15__IPU_DIAG_BUS_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA0, 0x66C, 0x2E4, 0, 0x000, 0), /* MX53_PAD_SD1_DATA0__ESDHC1_DAT0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA0, 0x66C, 0x2E4, 1, 0x000, 0), /* MX53_PAD_SD1_DATA0__GPIO1_16 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA0, 0x66C, 0x2E4, 3, 0x000, 0), /* MX53_PAD_SD1_DATA0__GPT_CAPIN1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA0, 0x66C, 0x2E4, 5, 0x784, 2), /* MX53_PAD_SD1_DATA0__CSPI_MISO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA0, 0x66C, 0x2E4, 7, 0x778, 0), /* MX53_PAD_SD1_DATA0__CCM_PLL3_BYP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA1, 0x670, 0x2E8, 0, 0x000, 0), /* MX53_PAD_SD1_DATA1__ESDHC1_DAT1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA1, 0x670, 0x2E8, 1, 0x000, 0), /* MX53_PAD_SD1_DATA1__GPIO1_17 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA1, 0x670, 0x2E8, 3, 0x000, 0), /* MX53_PAD_SD1_DATA1__GPT_CAPIN2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA1, 0x670, 0x2E8, 5, 0x78C, 3), /* MX53_PAD_SD1_DATA1__CSPI_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA1, 0x670, 0x2E8, 7, 0x77C, 1), /* MX53_PAD_SD1_DATA1__CCM_PLL4_BYP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_CMD, 0x674, 0x2EC, 0, 0x000, 0), /* MX53_PAD_SD1_CMD__ESDHC1_CMD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_CMD, 0x674, 0x2EC, 1, 0x000, 0), /* MX53_PAD_SD1_CMD__GPIO1_18 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_CMD, 0x674, 0x2EC, 3, 0x000, 0), /* MX53_PAD_SD1_CMD__GPT_CMPOUT1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_CMD, 0x674, 0x2EC, 5, 0x788, 2), /* MX53_PAD_SD1_CMD__CSPI_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_CMD, 0x674, 0x2EC, 7, 0x770, 0), /* MX53_PAD_SD1_CMD__CCM_PLL1_BYP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA2, 0x678, 0x2F0, 0, 0x000, 0), /* MX53_PAD_SD1_DATA2__ESDHC1_DAT2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA2, 0x678, 0x2F0, 1, 0x000, 0), /* MX53_PAD_SD1_DATA2__GPIO1_19 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA2, 0x678, 0x2F0, 2, 0x000, 0), /* MX53_PAD_SD1_DATA2__GPT_CMPOUT2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA2, 0x678, 0x2F0, 3, 0x000, 0), /* MX53_PAD_SD1_DATA2__PWM2_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA2, 0x678, 0x2F0, 4, 0x000, 0), /* MX53_PAD_SD1_DATA2__WDOG1_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA2, 0x678, 0x2F0, 5, 0x790, 2), /* MX53_PAD_SD1_DATA2__CSPI_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA2, 0x678, 0x2F0, 6, 0x000, 0), /* MX53_PAD_SD1_DATA2__WDOG1_WDOG_RST_B_DEB */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA2, 0x678, 0x2F0, 7, 0x774, 0), /* MX53_PAD_SD1_DATA2__CCM_PLL2_BYP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_CLK, 0x67C, 0x2F4, 0, 0x000, 0), /* MX53_PAD_SD1_CLK__ESDHC1_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_CLK, 0x67C, 0x2F4, 1, 0x000, 0), /* MX53_PAD_SD1_CLK__GPIO1_20 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_CLK, 0x67C, 0x2F4, 2, 0x000, 0), /* MX53_PAD_SD1_CLK__OSC32k_32K_OUT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_CLK, 0x67C, 0x2F4, 3, 0x000, 0), /* MX53_PAD_SD1_CLK__GPT_CLKIN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_CLK, 0x67C, 0x2F4, 5, 0x780, 2), /* MX53_PAD_SD1_CLK__CSPI_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_CLK, 0x67C, 0x2F4, 7, 0x000, 0), /* MX53_PAD_SD1_CLK__SATA_PHY_DTB_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA3, 0x680, 0x2F8, 0, 0x000, 0), /* MX53_PAD_SD1_DATA3__ESDHC1_DAT3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA3, 0x680, 0x2F8, 1, 0x000, 0), /* MX53_PAD_SD1_DATA3__GPIO1_21 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA3, 0x680, 0x2F8, 2, 0x000, 0), /* MX53_PAD_SD1_DATA3__GPT_CMPOUT3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA3, 0x680, 0x2F8, 3, 0x000, 0), /* MX53_PAD_SD1_DATA3__PWM1_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA3, 0x680, 0x2F8, 4, 0x000, 0), /* MX53_PAD_SD1_DATA3__WDOG2_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA3, 0x680, 0x2F8, 5, 0x794, 2), /* MX53_PAD_SD1_DATA3__CSPI_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA3, 0x680, 0x2F8, 6, 0x000, 0), /* MX53_PAD_SD1_DATA3__WDOG2_WDOG_RST_B_DEB */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD1_DATA3, 0x680, 0x2F8, 7, 0x000, 0), /* MX53_PAD_SD1_DATA3__SATA_PHY_DTB_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_CLK, 0x688, 0x2FC, 0, 0x000, 0), /* MX53_PAD_SD2_CLK__ESDHC2_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_CLK, 0x688, 0x2FC, 1, 0x000, 0), /* MX53_PAD_SD2_CLK__GPIO1_10 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_CLK, 0x688, 0x2FC, 2, 0x840, 2), /* MX53_PAD_SD2_CLK__KPP_COL_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_CLK, 0x688, 0x2FC, 3, 0x73C, 1), /* MX53_PAD_SD2_CLK__AUDMUX_AUD4_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_CLK, 0x688, 0x2FC, 5, 0x780, 3), /* MX53_PAD_SD2_CLK__CSPI_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_CLK, 0x688, 0x2FC, 7, 0x000, 0), /* MX53_PAD_SD2_CLK__SCC_RANDOM_V */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_CMD, 0x68C, 0x300, 0, 0x000, 0), /* MX53_PAD_SD2_CMD__ESDHC2_CMD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_CMD, 0x68C, 0x300, 1, 0x000, 0), /* MX53_PAD_SD2_CMD__GPIO1_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_CMD, 0x68C, 0x300, 2, 0x84C, 1), /* MX53_PAD_SD2_CMD__KPP_ROW_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_CMD, 0x68C, 0x300, 3, 0x738, 1), /* MX53_PAD_SD2_CMD__AUDMUX_AUD4_RXC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_CMD, 0x68C, 0x300, 5, 0x788, 3), /* MX53_PAD_SD2_CMD__CSPI_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_CMD, 0x68C, 0x300, 7, 0x000, 0), /* MX53_PAD_SD2_CMD__SCC_RANDOM */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA3, 0x690, 0x304, 0, 0x000, 0), /* MX53_PAD_SD2_DATA3__ESDHC2_DAT3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA3, 0x690, 0x304, 1, 0x000, 0), /* MX53_PAD_SD2_DATA3__GPIO1_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA3, 0x690, 0x304, 2, 0x844, 1), /* MX53_PAD_SD2_DATA3__KPP_COL_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA3, 0x690, 0x304, 3, 0x740, 1), /* MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA3, 0x690, 0x304, 5, 0x794, 3), /* MX53_PAD_SD2_DATA3__CSPI_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA3, 0x690, 0x304, 7, 0x000, 0), /* MX53_PAD_SD2_DATA3__SJC_DONE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA2, 0x694, 0x308, 0, 0x000, 0), /* MX53_PAD_SD2_DATA2__ESDHC2_DAT2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA2, 0x694, 0x308, 1, 0x000, 0), /* MX53_PAD_SD2_DATA2__GPIO1_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA2, 0x694, 0x308, 2, 0x850, 1), /* MX53_PAD_SD2_DATA2__KPP_ROW_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA2, 0x694, 0x308, 3, 0x734, 1), /* MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA2, 0x694, 0x308, 5, 0x790, 3), /* MX53_PAD_SD2_DATA2__CSPI_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA2, 0x694, 0x308, 7, 0x000, 0), /* MX53_PAD_SD2_DATA2__SJC_FAIL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA1, 0x698, 0x30C, 0, 0x000, 0), /* MX53_PAD_SD2_DATA1__ESDHC2_DAT1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA1, 0x698, 0x30C, 1, 0x000, 0), /* MX53_PAD_SD2_DATA1__GPIO1_14 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA1, 0x698, 0x30C, 2, 0x848, 1), /* MX53_PAD_SD2_DATA1__KPP_COL_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA1, 0x698, 0x30C, 3, 0x744, 0), /* MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA1, 0x698, 0x30C, 5, 0x78C, 4), /* MX53_PAD_SD2_DATA1__CSPI_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA1, 0x698, 0x30C, 7, 0x000, 0), /* MX53_PAD_SD2_DATA1__RTIC_SEC_VIO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA0, 0x69C, 0x310, 0, 0x000, 0), /* MX53_PAD_SD2_DATA0__ESDHC2_DAT0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA0, 0x69C, 0x310, 1, 0x000, 0), /* MX53_PAD_SD2_DATA0__GPIO1_15 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA0, 0x69C, 0x310, 2, 0x854, 1), /* MX53_PAD_SD2_DATA0__KPP_ROW_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA0, 0x69C, 0x310, 3, 0x730, 1), /* MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA0, 0x69C, 0x310, 5, 0x784, 3), /* MX53_PAD_SD2_DATA0__CSPI_MISO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_SD2_DATA0, 0x69C, 0x310, 7, 0x000, 0), /* MX53_PAD_SD2_DATA0__RTIC_DONE_INT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_0, 0x6A4, 0x314, 0, 0x000, 0), /* MX53_PAD_GPIO_0__CCM_CLKO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_0, 0x6A4, 0x314, 1, 0x000, 0), /* MX53_PAD_GPIO_0__GPIO1_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_0, 0x6A4, 0x314, 2, 0x840, 3), /* MX53_PAD_GPIO_0__KPP_COL_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_0, 0x6A4, 0x314, 3, 0x000, 0), /* MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_0, 0x6A4, 0x314, 4, 0x000, 0), /* MX53_PAD_GPIO_0__EPIT1_EPITO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_0, 0x6A4, 0x314, 5, 0x000, 0), /* MX53_PAD_GPIO_0__SRTC_ALARM_DEB */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_0, 0x6A4, 0x314, 6, 0x000, 0), /* MX53_PAD_GPIO_0__USBOH3_USBH1_PWR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_0, 0x6A4, 0x314, 7, 0x000, 0), /* MX53_PAD_GPIO_0__CSU_TD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_1, 0x6A8, 0x318, 0, 0x7DC, 1), /* MX53_PAD_GPIO_1__ESAI1_SCKR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_1, 0x6A8, 0x318, 1, 0x000, 0), /* MX53_PAD_GPIO_1__GPIO1_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_1, 0x6A8, 0x318, 2, 0x84C, 2), /* MX53_PAD_GPIO_1__KPP_ROW_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_1, 0x6A8, 0x318, 3, 0x000, 0), /* MX53_PAD_GPIO_1__CCM_SSI_EXT2_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_1, 0x6A8, 0x318, 4, 0x000, 0), /* MX53_PAD_GPIO_1__PWM2_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_1, 0x6A8, 0x318, 5, 0x000, 0), /* MX53_PAD_GPIO_1__WDOG2_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_1, 0x6A8, 0x318, 6, 0x000, 0), /* MX53_PAD_GPIO_1__ESDHC1_CD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_1, 0x6A8, 0x318, 7, 0x000, 0), /* MX53_PAD_GPIO_1__SRC_TESTER_ACK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_9, 0x6AC, 0x31C, 0, 0x7CC, 1), /* MX53_PAD_GPIO_9__ESAI1_FSR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_9, 0x6AC, 0x31C, 1, 0x000, 0), /* MX53_PAD_GPIO_9__GPIO1_9 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_9, 0x6AC, 0x31C, 2, 0x844, 2), /* MX53_PAD_GPIO_9__KPP_COL_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_9, 0x6AC, 0x31C, 3, 0x000, 0), /* MX53_PAD_GPIO_9__CCM_REF_EN_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_9, 0x6AC, 0x31C, 4, 0x000, 0), /* MX53_PAD_GPIO_9__PWM1_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_9, 0x6AC, 0x31C, 5, 0x000, 0), /* MX53_PAD_GPIO_9__WDOG1_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_9, 0x6AC, 0x31C, 6, 0x7FC, 1), /* MX53_PAD_GPIO_9__ESDHC1_WP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_9, 0x6AC, 0x31C, 7, 0x000, 0), /* MX53_PAD_GPIO_9__SCC_FAIL_STATE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_3, 0x6B0, 0x320, 0, 0x7D4, 1), /* MX53_PAD_GPIO_3__ESAI1_HCKR */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_3, 0x6B0, 0x320, 1, 0x000, 0), /* MX53_PAD_GPIO_3__GPIO1_3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_3, 0x6B0, 0x320, 2, 0x824, 1), /* MX53_PAD_GPIO_3__I2C3_SCL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_3, 0x6B0, 0x320, 3, 0x000, 0), /* MX53_PAD_GPIO_3__DPLLIP1_TOG_EN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_3, 0x6B0, 0x320, 4, 0x000, 0), /* MX53_PAD_GPIO_3__CCM_CLKO2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_3, 0x6B0, 0x320, 5, 0x000, 0), /* MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_3, 0x6B0, 0x320, 6, 0x8A0, 1), /* MX53_PAD_GPIO_3__USBOH3_USBH1_OC */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_3, 0x6B0, 0x320, 7, 0x858, 2), /* MX53_PAD_GPIO_3__MLB_MLBCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_6, 0x6B4, 0x324, 0, 0x7E0, 1), /* MX53_PAD_GPIO_6__ESAI1_SCKT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_6, 0x6B4, 0x324, 1, 0x000, 0), /* MX53_PAD_GPIO_6__GPIO1_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_6, 0x6B4, 0x324, 2, 0x828, 1), /* MX53_PAD_GPIO_6__I2C3_SDA */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_6, 0x6B4, 0x324, 3, 0x000, 0), /* MX53_PAD_GPIO_6__CCM_CCM_OUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_6, 0x6B4, 0x324, 4, 0x000, 0), /* MX53_PAD_GPIO_6__CSU_CSU_INT_DEB */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_6, 0x6B4, 0x324, 5, 0x000, 0), /* MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_6, 0x6B4, 0x324, 6, 0x000, 0), /* MX53_PAD_GPIO_6__ESDHC2_LCTL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_6, 0x6B4, 0x324, 7, 0x860, 2), /* MX53_PAD_GPIO_6__MLB_MLBSIG */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_2, 0x6B8, 0x328, 0, 0x7D0, 1), /* MX53_PAD_GPIO_2__ESAI1_FST */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_2, 0x6B8, 0x328, 1, 0x000, 0), /* MX53_PAD_GPIO_2__GPIO1_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_2, 0x6B8, 0x328, 2, 0x850, 2), /* MX53_PAD_GPIO_2__KPP_ROW_6 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_2, 0x6B8, 0x328, 3, 0x000, 0), /* MX53_PAD_GPIO_2__CCM_CCM_OUT_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_2, 0x6B8, 0x328, 4, 0x000, 0), /* MX53_PAD_GPIO_2__CSU_CSU_ALARM_AUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_2, 0x6B8, 0x328, 5, 0x000, 0), /* MX53_PAD_GPIO_2__OBSERVE_MUX_OBSRV_INT_OUT2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_2, 0x6B8, 0x328, 6, 0x000, 0), /* MX53_PAD_GPIO_2__ESDHC2_WP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_2, 0x6B8, 0x328, 7, 0x85C, 2), /* MX53_PAD_GPIO_2__MLB_MLBDAT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_4, 0x6BC, 0x32C, 0, 0x7D8, 1), /* MX53_PAD_GPIO_4__ESAI1_HCKT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_4, 0x6BC, 0x32C, 1, 0x000, 0), /* MX53_PAD_GPIO_4__GPIO1_4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_4, 0x6BC, 0x32C, 2, 0x848, 2), /* MX53_PAD_GPIO_4__KPP_COL_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_4, 0x6BC, 0x32C, 3, 0x000, 0), /* MX53_PAD_GPIO_4__CCM_CCM_OUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_4, 0x6BC, 0x32C, 4, 0x000, 0), /* MX53_PAD_GPIO_4__CSU_CSU_ALARM_AUT_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_4, 0x6BC, 0x32C, 5, 0x000, 0), /* MX53_PAD_GPIO_4__OBSERVE_MUX_OBSRV_INT_OUT3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_4, 0x6BC, 0x32C, 6, 0x000, 0), /* MX53_PAD_GPIO_4__ESDHC2_CD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_4, 0x6BC, 0x32C, 7, 0x000, 0), /* MX53_PAD_GPIO_4__SCC_SEC_STATE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_5, 0x6C0, 0x330, 0, 0x7EC, 1), /* MX53_PAD_GPIO_5__ESAI1_TX2_RX3 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_5, 0x6C0, 0x330, 1, 0x000, 0), /* MX53_PAD_GPIO_5__GPIO1_5 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_5, 0x6C0, 0x330, 2, 0x854, 2), /* MX53_PAD_GPIO_5__KPP_ROW_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_5, 0x6C0, 0x330, 3, 0x000, 0), /* MX53_PAD_GPIO_5__CCM_CLKO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_5, 0x6C0, 0x330, 4, 0x000, 0), /* MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_5, 0x6C0, 0x330, 5, 0x000, 0), /* MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_5, 0x6C0, 0x330, 6, 0x824, 2), /* MX53_PAD_GPIO_5__I2C3_SCL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_5, 0x6C0, 0x330, 7, 0x770, 1), /* MX53_PAD_GPIO_5__CCM_PLL1_BYP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_7, 0x6C4, 0x334, 0, 0x7F4, 1), /* MX53_PAD_GPIO_7__ESAI1_TX4_RX1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_7, 0x6C4, 0x334, 1, 0x000, 0), /* MX53_PAD_GPIO_7__GPIO1_7 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_7, 0x6C4, 0x334, 2, 0x000, 0), /* MX53_PAD_GPIO_7__EPIT1_EPITO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_7, 0x6C4, 0x334, 3, 0x000, 0), /* MX53_PAD_GPIO_7__CAN1_TXCAN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_7, 0x6C4, 0x334, 4, 0x000, 0), /* MX53_PAD_GPIO_7__UART2_TXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_7, 0x6C4, 0x334, 5, 0x80C, 1), /* MX53_PAD_GPIO_7__FIRI_RXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_7, 0x6C4, 0x334, 6, 0x000, 0), /* MX53_PAD_GPIO_7__SPDIF_PLOCK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_7, 0x6C4, 0x334, 7, 0x774, 1), /* MX53_PAD_GPIO_7__CCM_PLL2_BYP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 0, 0x7F8, 1), /* MX53_PAD_GPIO_8__ESAI1_TX5_RX0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 1, 0x000, 0), /* MX53_PAD_GPIO_8__GPIO1_8 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 2, 0x000, 0), /* MX53_PAD_GPIO_8__EPIT2_EPITO */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 3, 0x760, 3), /* MX53_PAD_GPIO_8__CAN1_RXCAN */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 4, 0x880, 5), /* MX53_PAD_GPIO_8__UART2_RXD_MUX */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 5, 0x000, 0), /* MX53_PAD_GPIO_8__FIRI_TXD */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 6, 0x000, 0), /* MX53_PAD_GPIO_8__SPDIF_SRCLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_8, 0x6C8, 0x338, 7, 0x778, 1), /* MX53_PAD_GPIO_8__CCM_PLL3_BYP */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_16, 0x6CC, 0x33C, 0, 0x7F0, 1), /* MX53_PAD_GPIO_16__ESAI1_TX3_RX2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_16, 0x6CC, 0x33C, 1, 0x000, 0), /* MX53_PAD_GPIO_16__GPIO7_11 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_16, 0x6CC, 0x33C, 2, 0x000, 0), /* MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_16, 0x6CC, 0x33C, 4, 0x000, 0), /* MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_16, 0x6CC, 0x33C, 5, 0x870, 1), /* MX53_PAD_GPIO_16__SPDIF_IN1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_16, 0x6CC, 0x33C, 6, 0x828, 2), /* MX53_PAD_GPIO_16__I2C3_SDA */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_16, 0x6CC, 0x33C, 7, 0x000, 0), /* MX53_PAD_GPIO_16__SJC_DE_B */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_17, 0x6D0, 0x340, 0, 0x7E4, 1), /* MX53_PAD_GPIO_17__ESAI1_TX0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_17, 0x6D0, 0x340, 1, 0x000, 0), /* MX53_PAD_GPIO_17__GPIO7_12 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_17, 0x6D0, 0x340, 2, 0x868, 1), /* MX53_PAD_GPIO_17__SDMA_EXT_EVENT_0 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_17, 0x6D0, 0x340, 3, 0x810, 1), /* MX53_PAD_GPIO_17__GPC_PMIC_RDY */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_17, 0x6D0, 0x340, 4, 0x000, 0), /* MX53_PAD_GPIO_17__RTC_CE_RTC_FSV_TRIG */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_17, 0x6D0, 0x340, 5, 0x000, 0), /* MX53_PAD_GPIO_17__SPDIF_OUT1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_17, 0x6D0, 0x340, 6, 0x000, 0), /* MX53_PAD_GPIO_17__IPU_SNOOP2 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_17, 0x6D0, 0x340, 7, 0x000, 0), /* MX53_PAD_GPIO_17__SJC_JTAG_ACT */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_18, 0x6D4, 0x344, 0, 0x7E8, 1), /* MX53_PAD_GPIO_18__ESAI1_TX1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_18, 0x6D4, 0x344, 1, 0x000, 0), /* MX53_PAD_GPIO_18__GPIO7_13 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_18, 0x6D4, 0x344, 2, 0x86C, 1), /* MX53_PAD_GPIO_18__SDMA_EXT_EVENT_1 */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_18, 0x6D4, 0x344, 3, 0x864, 1), /* MX53_PAD_GPIO_18__OWIRE_LINE */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_18, 0x6D4, 0x344, 4, 0x000, 0), /* MX53_PAD_GPIO_18__RTC_CE_RTC_ALARM2_TRIG */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_18, 0x6D4, 0x344, 5, 0x768, 1), /* MX53_PAD_GPIO_18__CCM_ASRC_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_18, 0x6D4, 0x344, 6, 0x000, 0), /* MX53_PAD_GPIO_18__ESDHC1_LCTL */</div><div class='add'>+	IMX_PIN_REG(MX53_PAD_GPIO_18, 0x6D4, 0x344, 7, 0x000, 0), /* MX53_PAD_GPIO_18__SRC_SYSTEM_RST */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad names for the pinmux subsystem */</div><div class='add'>+static const struct pinctrl_pin_desc imx53_pinctrl_pads[] = {</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_KEY_COL0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_KEY_ROW0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_KEY_COL1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_KEY_ROW1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_KEY_COL2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_KEY_ROW2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_KEY_COL3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_KEY_ROW3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_KEY_COL4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_KEY_ROW4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DI0_DISP_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DI0_PIN15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DI0_PIN2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DI0_PIN3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DI0_PIN4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT20),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT21),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT22),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_DISP0_DAT23),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_PIXCLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_MCLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DATA_EN),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_VSYNC),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_CSI0_DAT19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_A25),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_EB2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D20),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D21),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D22),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D23),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_EB3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D24),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D25),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D26),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D27),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D28),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D29),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D30),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_D31),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_A24),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_A23),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_A22),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_A21),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_A20),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_A19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_A18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_A17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_A16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_CS0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_CS1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_OE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_RW),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_LBA),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_EB0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_EB1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_DA15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_NANDF_WE_B),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_NANDF_RE_B),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_EIM_WAIT),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_LVDS1_TX3_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_LVDS1_TX2_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_LVDS1_CLK_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_LVDS1_TX1_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_LVDS1_TX0_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_LVDS0_TX3_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_LVDS0_CLK_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_LVDS0_TX2_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_LVDS0_TX1_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_LVDS0_TX0_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_NANDF_CLE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_NANDF_ALE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_NANDF_WP_B),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_NANDF_RB0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_NANDF_CS0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_NANDF_CS1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_NANDF_CS2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_NANDF_CS3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_FEC_MDIO),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_FEC_REF_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_FEC_RX_ER),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_FEC_CRS_DV),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_FEC_RXD1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_FEC_RXD0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_FEC_TX_EN),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_FEC_TXD1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_FEC_TXD0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_FEC_MDC),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DIOW),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DMACK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DMARQ),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_BUFFER_EN),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_INTRQ),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DIOR),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_RESET_B),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_IORDY),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DA_0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DA_1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DA_2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_CS_0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_CS_1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_PATA_DATA15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_SD1_DATA0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_SD1_DATA1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_SD1_CMD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_SD1_DATA2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_SD1_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_SD1_DATA3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_SD2_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_SD2_CMD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_SD2_DATA3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_SD2_DATA2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_SD2_DATA1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_SD2_DATA0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX53_PAD_GPIO_18),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct imx_pinctrl_soc_info imx53_pinctrl_info = {</div><div class='add'>+	.pins = imx53_pinctrl_pads,</div><div class='add'>+	.npins = ARRAY_SIZE(imx53_pinctrl_pads),</div><div class='add'>+	.pin_regs = imx53_pin_regs,</div><div class='add'>+	.npin_regs = ARRAY_SIZE(imx53_pin_regs),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct of_device_id imx53_pinctrl_of_match[] __devinitdata = {</div><div class='add'>+	{ .compatible = "fsl,imx53-iomuxc", },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit imx53_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return imx_pinctrl_probe(pdev, &amp;imx53_pinctrl_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver imx53_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "imx53-pinctrl",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = of_match_ptr(imx53_pinctrl_of_match),</div><div class='add'>+	},</div><div class='add'>+	.probe = imx53_pinctrl_probe,</div><div class='add'>+	.remove = __devexit_p(imx_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init imx53_pinctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;imx53_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(imx53_pinctrl_init);</div><div class='add'>+</div><div class='add'>+static void __exit imx53_pinctrl_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;imx53_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(imx53_pinctrl_exit);</div><div class='add'>+MODULE_AUTHOR("Dong Aisheng &lt;dong.aisheng@linaro.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Freescale IMX53 pinctrl driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-imx6q.c b/drivers/pinctrl/pinctrl-imx6q.c<br/>new file mode 100644<br/>index 000000000000..7737d4d71a3c<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-imx6q.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-imx6q.c</a></div><div class='hunk'>@@ -0,0 +1,2331 @@</div><div class='add'>+/*</div><div class='add'>+ * imx6q pinctrl driver based on imx pinmux core</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright (C) 2012 Linaro, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Author: Dong Aisheng &lt;dong.aisheng@linaro.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+#include "pinctrl-imx.h"</div><div class='add'>+</div><div class='add'>+enum imx6q_pads {</div><div class='add'>+	MX6Q_PAD_SD2_DAT1 = 0,</div><div class='add'>+	MX6Q_PAD_SD2_DAT2 = 1,</div><div class='add'>+	MX6Q_PAD_SD2_DAT0 = 2,</div><div class='add'>+	MX6Q_PAD_RGMII_TXC = 3,</div><div class='add'>+	MX6Q_PAD_RGMII_TD0 = 4,</div><div class='add'>+	MX6Q_PAD_RGMII_TD1 = 5,</div><div class='add'>+	MX6Q_PAD_RGMII_TD2 = 6,</div><div class='add'>+	MX6Q_PAD_RGMII_TD3 = 7,</div><div class='add'>+	MX6Q_PAD_RGMII_RX_CTL = 8,</div><div class='add'>+	MX6Q_PAD_RGMII_RD0 = 9,</div><div class='add'>+	MX6Q_PAD_RGMII_TX_CTL = 10,</div><div class='add'>+	MX6Q_PAD_RGMII_RD1 = 11,</div><div class='add'>+	MX6Q_PAD_RGMII_RD2 = 12,</div><div class='add'>+	MX6Q_PAD_RGMII_RD3 = 13,</div><div class='add'>+	MX6Q_PAD_RGMII_RXC = 14,</div><div class='add'>+	MX6Q_PAD_EIM_A25 = 15,</div><div class='add'>+	MX6Q_PAD_EIM_EB2 = 16,</div><div class='add'>+	MX6Q_PAD_EIM_D16 = 17,</div><div class='add'>+	MX6Q_PAD_EIM_D17 = 18,</div><div class='add'>+	MX6Q_PAD_EIM_D18 = 19,</div><div class='add'>+	MX6Q_PAD_EIM_D19 = 20,</div><div class='add'>+	MX6Q_PAD_EIM_D20 = 21,</div><div class='add'>+	MX6Q_PAD_EIM_D21 = 22,</div><div class='add'>+	MX6Q_PAD_EIM_D22 = 23,</div><div class='add'>+	MX6Q_PAD_EIM_D23 = 24,</div><div class='add'>+	MX6Q_PAD_EIM_EB3 = 25,</div><div class='add'>+	MX6Q_PAD_EIM_D24 = 26,</div><div class='add'>+	MX6Q_PAD_EIM_D25 = 27,</div><div class='add'>+	MX6Q_PAD_EIM_D26 = 28,</div><div class='add'>+	MX6Q_PAD_EIM_D27 = 29,</div><div class='add'>+	MX6Q_PAD_EIM_D28 = 30,</div><div class='add'>+	MX6Q_PAD_EIM_D29 = 31,</div><div class='add'>+	MX6Q_PAD_EIM_D30 = 32,</div><div class='add'>+	MX6Q_PAD_EIM_D31 = 33,</div><div class='add'>+	MX6Q_PAD_EIM_A24 = 34,</div><div class='add'>+	MX6Q_PAD_EIM_A23 = 35,</div><div class='add'>+	MX6Q_PAD_EIM_A22 = 36,</div><div class='add'>+	MX6Q_PAD_EIM_A21 = 37,</div><div class='add'>+	MX6Q_PAD_EIM_A20 = 38,</div><div class='add'>+	MX6Q_PAD_EIM_A19 = 39,</div><div class='add'>+	MX6Q_PAD_EIM_A18 = 40,</div><div class='add'>+	MX6Q_PAD_EIM_A17 = 41,</div><div class='add'>+	MX6Q_PAD_EIM_A16 = 42,</div><div class='add'>+	MX6Q_PAD_EIM_CS0 = 43,</div><div class='add'>+	MX6Q_PAD_EIM_CS1 = 44,</div><div class='add'>+	MX6Q_PAD_EIM_OE = 45,</div><div class='add'>+	MX6Q_PAD_EIM_RW = 46,</div><div class='add'>+	MX6Q_PAD_EIM_LBA = 47,</div><div class='add'>+	MX6Q_PAD_EIM_EB0 = 48,</div><div class='add'>+	MX6Q_PAD_EIM_EB1 = 49,</div><div class='add'>+	MX6Q_PAD_EIM_DA0 = 50,</div><div class='add'>+	MX6Q_PAD_EIM_DA1 = 51,</div><div class='add'>+	MX6Q_PAD_EIM_DA2 = 52,</div><div class='add'>+	MX6Q_PAD_EIM_DA3 = 53,</div><div class='add'>+	MX6Q_PAD_EIM_DA4 = 54,</div><div class='add'>+	MX6Q_PAD_EIM_DA5 = 55,</div><div class='add'>+	MX6Q_PAD_EIM_DA6 = 56,</div><div class='add'>+	MX6Q_PAD_EIM_DA7 = 57,</div><div class='add'>+	MX6Q_PAD_EIM_DA8 = 58,</div><div class='add'>+	MX6Q_PAD_EIM_DA9 = 59,</div><div class='add'>+	MX6Q_PAD_EIM_DA10 = 60,</div><div class='add'>+	MX6Q_PAD_EIM_DA11 = 61,</div><div class='add'>+	MX6Q_PAD_EIM_DA12 = 62,</div><div class='add'>+	MX6Q_PAD_EIM_DA13 = 63,</div><div class='add'>+	MX6Q_PAD_EIM_DA14 = 64,</div><div class='add'>+	MX6Q_PAD_EIM_DA15 = 65,</div><div class='add'>+	MX6Q_PAD_EIM_WAIT = 66,</div><div class='add'>+	MX6Q_PAD_EIM_BCLK = 67,</div><div class='add'>+	MX6Q_PAD_DI0_DISP_CLK = 68,</div><div class='add'>+	MX6Q_PAD_DI0_PIN15 = 69,</div><div class='add'>+	MX6Q_PAD_DI0_PIN2 = 70,</div><div class='add'>+	MX6Q_PAD_DI0_PIN3 = 71,</div><div class='add'>+	MX6Q_PAD_DI0_PIN4 = 72,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT0 = 73,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT1 = 74,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT2 = 75,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT3 = 76,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT4 = 77,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT5 = 78,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT6 = 79,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT7 = 80,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT8 = 81,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT9 = 82,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT10 = 83,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT11 = 84,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT12 = 85,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT13 = 86,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT14 = 87,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT15 = 88,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT16 = 89,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT17 = 90,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT18 = 91,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT19 = 92,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT20 = 93,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT21 = 94,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT22 = 95,</div><div class='add'>+	MX6Q_PAD_DISP0_DAT23 = 96,</div><div class='add'>+	MX6Q_PAD_ENET_MDIO = 97,</div><div class='add'>+	MX6Q_PAD_ENET_REF_CLK = 98,</div><div class='add'>+	MX6Q_PAD_ENET_RX_ER = 99,</div><div class='add'>+	MX6Q_PAD_ENET_CRS_DV = 100,</div><div class='add'>+	MX6Q_PAD_ENET_RXD1 = 101,</div><div class='add'>+	MX6Q_PAD_ENET_RXD0 = 102,</div><div class='add'>+	MX6Q_PAD_ENET_TX_EN = 103,</div><div class='add'>+	MX6Q_PAD_ENET_TXD1 = 104,</div><div class='add'>+	MX6Q_PAD_ENET_TXD0 = 105,</div><div class='add'>+	MX6Q_PAD_ENET_MDC = 106,</div><div class='add'>+	MX6Q_PAD_DRAM_D40 = 107,</div><div class='add'>+	MX6Q_PAD_DRAM_D41 = 108,</div><div class='add'>+	MX6Q_PAD_DRAM_D42 = 109,</div><div class='add'>+	MX6Q_PAD_DRAM_D43 = 110,</div><div class='add'>+	MX6Q_PAD_DRAM_D44 = 111,</div><div class='add'>+	MX6Q_PAD_DRAM_D45 = 112,</div><div class='add'>+	MX6Q_PAD_DRAM_D46 = 113,</div><div class='add'>+	MX6Q_PAD_DRAM_D47 = 114,</div><div class='add'>+	MX6Q_PAD_DRAM_SDQS5 = 115,</div><div class='add'>+	MX6Q_PAD_DRAM_DQM5 = 116,</div><div class='add'>+	MX6Q_PAD_DRAM_D32 = 117,</div><div class='add'>+	MX6Q_PAD_DRAM_D33 = 118,</div><div class='add'>+	MX6Q_PAD_DRAM_D34 = 119,</div><div class='add'>+	MX6Q_PAD_DRAM_D35 = 120,</div><div class='add'>+	MX6Q_PAD_DRAM_D36 = 121,</div><div class='add'>+	MX6Q_PAD_DRAM_D37 = 122,</div><div class='add'>+	MX6Q_PAD_DRAM_D38 = 123,</div><div class='add'>+	MX6Q_PAD_DRAM_D39 = 124,</div><div class='add'>+	MX6Q_PAD_DRAM_DQM4 = 125,</div><div class='add'>+	MX6Q_PAD_DRAM_SDQS4 = 126,</div><div class='add'>+	MX6Q_PAD_DRAM_D24 = 127,</div><div class='add'>+	MX6Q_PAD_DRAM_D25 = 128,</div><div class='add'>+	MX6Q_PAD_DRAM_D26 = 129,</div><div class='add'>+	MX6Q_PAD_DRAM_D27 = 130,</div><div class='add'>+	MX6Q_PAD_DRAM_D28 = 131,</div><div class='add'>+	MX6Q_PAD_DRAM_D29 = 132,</div><div class='add'>+	MX6Q_PAD_DRAM_SDQS3 = 133,</div><div class='add'>+	MX6Q_PAD_DRAM_D30 = 134,</div><div class='add'>+	MX6Q_PAD_DRAM_D31 = 135,</div><div class='add'>+	MX6Q_PAD_DRAM_DQM3 = 136,</div><div class='add'>+	MX6Q_PAD_DRAM_D16 = 137,</div><div class='add'>+	MX6Q_PAD_DRAM_D17 = 138,</div><div class='add'>+	MX6Q_PAD_DRAM_D18 = 139,</div><div class='add'>+	MX6Q_PAD_DRAM_D19 = 140,</div><div class='add'>+	MX6Q_PAD_DRAM_D20 = 141,</div><div class='add'>+	MX6Q_PAD_DRAM_D21 = 142,</div><div class='add'>+	MX6Q_PAD_DRAM_D22 = 143,</div><div class='add'>+	MX6Q_PAD_DRAM_SDQS2 = 144,</div><div class='add'>+	MX6Q_PAD_DRAM_D23 = 145,</div><div class='add'>+	MX6Q_PAD_DRAM_DQM2 = 146,</div><div class='add'>+	MX6Q_PAD_DRAM_A0 = 147,</div><div class='add'>+	MX6Q_PAD_DRAM_A1 = 148,</div><div class='add'>+	MX6Q_PAD_DRAM_A2 = 149,</div><div class='add'>+	MX6Q_PAD_DRAM_A3 = 150,</div><div class='add'>+	MX6Q_PAD_DRAM_A4 = 151,</div><div class='add'>+	MX6Q_PAD_DRAM_A5 = 152,</div><div class='add'>+	MX6Q_PAD_DRAM_A6 = 153,</div><div class='add'>+	MX6Q_PAD_DRAM_A7 = 154,</div><div class='add'>+	MX6Q_PAD_DRAM_A8 = 155,</div><div class='add'>+	MX6Q_PAD_DRAM_A9 = 156,</div><div class='add'>+	MX6Q_PAD_DRAM_A10 = 157,</div><div class='add'>+	MX6Q_PAD_DRAM_A11 = 158,</div><div class='add'>+	MX6Q_PAD_DRAM_A12 = 159,</div><div class='add'>+	MX6Q_PAD_DRAM_A13 = 160,</div><div class='add'>+	MX6Q_PAD_DRAM_A14 = 161,</div><div class='add'>+	MX6Q_PAD_DRAM_A15 = 162,</div><div class='add'>+	MX6Q_PAD_DRAM_CAS = 163,</div><div class='add'>+	MX6Q_PAD_DRAM_CS0 = 164,</div><div class='add'>+	MX6Q_PAD_DRAM_CS1 = 165,</div><div class='add'>+	MX6Q_PAD_DRAM_RAS = 166,</div><div class='add'>+	MX6Q_PAD_DRAM_RESET = 167,</div><div class='add'>+	MX6Q_PAD_DRAM_SDBA0 = 168,</div><div class='add'>+	MX6Q_PAD_DRAM_SDBA1 = 169,</div><div class='add'>+	MX6Q_PAD_DRAM_SDCLK_0 = 170,</div><div class='add'>+	MX6Q_PAD_DRAM_SDBA2 = 171,</div><div class='add'>+	MX6Q_PAD_DRAM_SDCKE0 = 172,</div><div class='add'>+	MX6Q_PAD_DRAM_SDCLK_1 = 173,</div><div class='add'>+	MX6Q_PAD_DRAM_SDCKE1 = 174,</div><div class='add'>+	MX6Q_PAD_DRAM_SDODT0 = 175,</div><div class='add'>+	MX6Q_PAD_DRAM_SDODT1 = 176,</div><div class='add'>+	MX6Q_PAD_DRAM_SDWE = 177,</div><div class='add'>+	MX6Q_PAD_DRAM_D0 = 178,</div><div class='add'>+	MX6Q_PAD_DRAM_D1 = 179,</div><div class='add'>+	MX6Q_PAD_DRAM_D2 = 180,</div><div class='add'>+	MX6Q_PAD_DRAM_D3 = 181,</div><div class='add'>+	MX6Q_PAD_DRAM_D4 = 182,</div><div class='add'>+	MX6Q_PAD_DRAM_D5 = 183,</div><div class='add'>+	MX6Q_PAD_DRAM_SDQS0 = 184,</div><div class='add'>+	MX6Q_PAD_DRAM_D6 = 185,</div><div class='add'>+	MX6Q_PAD_DRAM_D7 = 186,</div><div class='add'>+	MX6Q_PAD_DRAM_DQM0 = 187,</div><div class='add'>+	MX6Q_PAD_DRAM_D8 = 188,</div><div class='add'>+	MX6Q_PAD_DRAM_D9 = 189,</div><div class='add'>+	MX6Q_PAD_DRAM_D10 = 190,</div><div class='add'>+	MX6Q_PAD_DRAM_D11 = 191,</div><div class='add'>+	MX6Q_PAD_DRAM_D12 = 192,</div><div class='add'>+	MX6Q_PAD_DRAM_D13 = 193,</div><div class='add'>+	MX6Q_PAD_DRAM_D14 = 194,</div><div class='add'>+	MX6Q_PAD_DRAM_SDQS1 = 195,</div><div class='add'>+	MX6Q_PAD_DRAM_D15 = 196,</div><div class='add'>+	MX6Q_PAD_DRAM_DQM1 = 197,</div><div class='add'>+	MX6Q_PAD_DRAM_D48 = 198,</div><div class='add'>+	MX6Q_PAD_DRAM_D49 = 199,</div><div class='add'>+	MX6Q_PAD_DRAM_D50 = 200,</div><div class='add'>+	MX6Q_PAD_DRAM_D51 = 201,</div><div class='add'>+	MX6Q_PAD_DRAM_D52 = 202,</div><div class='add'>+	MX6Q_PAD_DRAM_D53 = 203,</div><div class='add'>+	MX6Q_PAD_DRAM_D54 = 204,</div><div class='add'>+	MX6Q_PAD_DRAM_D55 = 205,</div><div class='add'>+	MX6Q_PAD_DRAM_SDQS6 = 206,</div><div class='add'>+	MX6Q_PAD_DRAM_DQM6 = 207,</div><div class='add'>+	MX6Q_PAD_DRAM_D56 = 208,</div><div class='add'>+	MX6Q_PAD_DRAM_SDQS7 = 209,</div><div class='add'>+	MX6Q_PAD_DRAM_D57 = 210,</div><div class='add'>+	MX6Q_PAD_DRAM_D58 = 211,</div><div class='add'>+	MX6Q_PAD_DRAM_D59 = 212,</div><div class='add'>+	MX6Q_PAD_DRAM_D60 = 213,</div><div class='add'>+	MX6Q_PAD_DRAM_DQM7 = 214,</div><div class='add'>+	MX6Q_PAD_DRAM_D61 = 215,</div><div class='add'>+	MX6Q_PAD_DRAM_D62 = 216,</div><div class='add'>+	MX6Q_PAD_DRAM_D63 = 217,</div><div class='add'>+	MX6Q_PAD_KEY_COL0 = 218,</div><div class='add'>+	MX6Q_PAD_KEY_ROW0 = 219,</div><div class='add'>+	MX6Q_PAD_KEY_COL1 = 220,</div><div class='add'>+	MX6Q_PAD_KEY_ROW1 = 221,</div><div class='add'>+	MX6Q_PAD_KEY_COL2 = 222,</div><div class='add'>+	MX6Q_PAD_KEY_ROW2 = 223,</div><div class='add'>+	MX6Q_PAD_KEY_COL3 = 224,</div><div class='add'>+	MX6Q_PAD_KEY_ROW3 = 225,</div><div class='add'>+	MX6Q_PAD_KEY_COL4 = 226,</div><div class='add'>+	MX6Q_PAD_KEY_ROW4 = 227,</div><div class='add'>+	MX6Q_PAD_GPIO_0 = 228,</div><div class='add'>+	MX6Q_PAD_GPIO_1 = 229,</div><div class='add'>+	MX6Q_PAD_GPIO_9 = 230,</div><div class='add'>+	MX6Q_PAD_GPIO_3 = 231,</div><div class='add'>+	MX6Q_PAD_GPIO_6 = 232,</div><div class='add'>+	MX6Q_PAD_GPIO_2 = 233,</div><div class='add'>+	MX6Q_PAD_GPIO_4 = 234,</div><div class='add'>+	MX6Q_PAD_GPIO_5 = 235,</div><div class='add'>+	MX6Q_PAD_GPIO_7 = 236,</div><div class='add'>+	MX6Q_PAD_GPIO_8 = 237,</div><div class='add'>+	MX6Q_PAD_GPIO_16 = 238,</div><div class='add'>+	MX6Q_PAD_GPIO_17 = 239,</div><div class='add'>+	MX6Q_PAD_GPIO_18 = 240,</div><div class='add'>+	MX6Q_PAD_GPIO_19 = 241,</div><div class='add'>+	MX6Q_PAD_CSI0_PIXCLK = 242,</div><div class='add'>+	MX6Q_PAD_CSI0_MCLK = 243,</div><div class='add'>+	MX6Q_PAD_CSI0_DATA_EN = 244,</div><div class='add'>+	MX6Q_PAD_CSI0_VSYNC = 245,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT4 = 246,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT5 = 247,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT6 = 248,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT7 = 249,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT8 = 250,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT9 = 251,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT10 = 252,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT11 = 253,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT12 = 254,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT13 = 255,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT14 = 256,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT15 = 257,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT16 = 258,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT17 = 259,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT18 = 260,</div><div class='add'>+	MX6Q_PAD_CSI0_DAT19 = 261,</div><div class='add'>+	MX6Q_PAD_JTAG_TMS = 262,</div><div class='add'>+	MX6Q_PAD_JTAG_MOD = 263,</div><div class='add'>+	MX6Q_PAD_JTAG_TRSTB = 264,</div><div class='add'>+	MX6Q_PAD_JTAG_TDI = 265,</div><div class='add'>+	MX6Q_PAD_JTAG_TCK = 266,</div><div class='add'>+	MX6Q_PAD_JTAG_TDO = 267,</div><div class='add'>+	MX6Q_PAD_LVDS1_TX3_P = 268,</div><div class='add'>+	MX6Q_PAD_LVDS1_TX2_P = 269,</div><div class='add'>+	MX6Q_PAD_LVDS1_CLK_P = 270,</div><div class='add'>+	MX6Q_PAD_LVDS1_TX1_P = 271,</div><div class='add'>+	MX6Q_PAD_LVDS1_TX0_P = 272,</div><div class='add'>+	MX6Q_PAD_LVDS0_TX3_P = 273,</div><div class='add'>+	MX6Q_PAD_LVDS0_CLK_P = 274,</div><div class='add'>+	MX6Q_PAD_LVDS0_TX2_P = 275,</div><div class='add'>+	MX6Q_PAD_LVDS0_TX1_P = 276,</div><div class='add'>+	MX6Q_PAD_LVDS0_TX0_P = 277,</div><div class='add'>+	MX6Q_PAD_TAMPER = 278,</div><div class='add'>+	MX6Q_PAD_PMIC_ON_REQ = 279,</div><div class='add'>+	MX6Q_PAD_PMIC_STBY_REQ = 280,</div><div class='add'>+	MX6Q_PAD_POR_B = 281,</div><div class='add'>+	MX6Q_PAD_BOOT_MODE1 = 282,</div><div class='add'>+	MX6Q_PAD_RESET_IN_B = 283,</div><div class='add'>+	MX6Q_PAD_BOOT_MODE0 = 284,</div><div class='add'>+	MX6Q_PAD_TEST_MODE = 285,</div><div class='add'>+	MX6Q_PAD_SD3_DAT7 = 286,</div><div class='add'>+	MX6Q_PAD_SD3_DAT6 = 287,</div><div class='add'>+	MX6Q_PAD_SD3_DAT5 = 288,</div><div class='add'>+	MX6Q_PAD_SD3_DAT4 = 289,</div><div class='add'>+	MX6Q_PAD_SD3_CMD = 290,</div><div class='add'>+	MX6Q_PAD_SD3_CLK = 291,</div><div class='add'>+	MX6Q_PAD_SD3_DAT0 = 292,</div><div class='add'>+	MX6Q_PAD_SD3_DAT1 = 293,</div><div class='add'>+	MX6Q_PAD_SD3_DAT2 = 294,</div><div class='add'>+	MX6Q_PAD_SD3_DAT3 = 295,</div><div class='add'>+	MX6Q_PAD_SD3_RST = 296,</div><div class='add'>+	MX6Q_PAD_NANDF_CLE = 297,</div><div class='add'>+	MX6Q_PAD_NANDF_ALE = 298,</div><div class='add'>+	MX6Q_PAD_NANDF_WP_B = 299,</div><div class='add'>+	MX6Q_PAD_NANDF_RB0 = 300,</div><div class='add'>+	MX6Q_PAD_NANDF_CS0 = 301,</div><div class='add'>+	MX6Q_PAD_NANDF_CS1 = 302,</div><div class='add'>+	MX6Q_PAD_NANDF_CS2 = 303,</div><div class='add'>+	MX6Q_PAD_NANDF_CS3 = 304,</div><div class='add'>+	MX6Q_PAD_SD4_CMD = 305,</div><div class='add'>+	MX6Q_PAD_SD4_CLK = 306,</div><div class='add'>+	MX6Q_PAD_NANDF_D0 = 307,</div><div class='add'>+	MX6Q_PAD_NANDF_D1 = 308,</div><div class='add'>+	MX6Q_PAD_NANDF_D2 = 309,</div><div class='add'>+	MX6Q_PAD_NANDF_D3 = 310,</div><div class='add'>+	MX6Q_PAD_NANDF_D4 = 311,</div><div class='add'>+	MX6Q_PAD_NANDF_D5 = 312,</div><div class='add'>+	MX6Q_PAD_NANDF_D6 = 313,</div><div class='add'>+	MX6Q_PAD_NANDF_D7 = 314,</div><div class='add'>+	MX6Q_PAD_SD4_DAT0 = 315,</div><div class='add'>+	MX6Q_PAD_SD4_DAT1 = 316,</div><div class='add'>+	MX6Q_PAD_SD4_DAT2 = 317,</div><div class='add'>+	MX6Q_PAD_SD4_DAT3 = 318,</div><div class='add'>+	MX6Q_PAD_SD4_DAT4 = 319,</div><div class='add'>+	MX6Q_PAD_SD4_DAT5 = 320,</div><div class='add'>+	MX6Q_PAD_SD4_DAT6 = 321,</div><div class='add'>+	MX6Q_PAD_SD4_DAT7 = 322,</div><div class='add'>+	MX6Q_PAD_SD1_DAT1 = 323,</div><div class='add'>+	MX6Q_PAD_SD1_DAT0 = 324,</div><div class='add'>+	MX6Q_PAD_SD1_DAT3 = 325,</div><div class='add'>+	MX6Q_PAD_SD1_CMD = 326,</div><div class='add'>+	MX6Q_PAD_SD1_DAT2 = 327,</div><div class='add'>+	MX6Q_PAD_SD1_CLK = 328,</div><div class='add'>+	MX6Q_PAD_SD2_CLK = 329,</div><div class='add'>+	MX6Q_PAD_SD2_CMD = 330,</div><div class='add'>+	MX6Q_PAD_SD2_DAT3 = 331,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* imx6q register maps */</div><div class='add'>+static struct imx_pin_reg imx6q_pin_regs[] = {</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT1, 0x0360, 0x004C, 0, 0x0000, 0), /* MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT1, 0x0360, 0x004C, 1, 0x0834, 0), /* MX6Q_PAD_SD2_DAT1__ECSPI5_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT1, 0x0360, 0x004C, 2, 0x0000, 0), /* MX6Q_PAD_SD2_DAT1__WEIM_WEIM_CS_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT1, 0x0360, 0x004C, 3, 0x07C8, 0), /* MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT1, 0x0360, 0x004C, 4, 0x08F0, 0), /* MX6Q_PAD_SD2_DAT1__KPP_COL_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT1, 0x0360, 0x004C, 5, 0x0000, 0), /* MX6Q_PAD_SD2_DAT1__GPIO_1_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT1, 0x0360, 0x004C, 6, 0x0000, 0), /* MX6Q_PAD_SD2_DAT1__CCM_WAIT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT1, 0x0360, 0x004C, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT1__ANATOP_TESTO_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT2, 0x0364, 0x0050, 0, 0x0000, 0), /* MX6Q_PAD_SD2_DAT2__USDHC2_DAT2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT2, 0x0364, 0x0050, 1, 0x0838, 0), /* MX6Q_PAD_SD2_DAT2__ECSPI5_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT2, 0x0364, 0x0050, 2, 0x0000, 0), /* MX6Q_PAD_SD2_DAT2__WEIM_WEIM_CS_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT2, 0x0364, 0x0050, 3, 0x07B8, 0), /* MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT2, 0x0364, 0x0050, 4, 0x08F8, 0), /* MX6Q_PAD_SD2_DAT2__KPP_ROW_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT2, 0x0364, 0x0050, 5, 0x0000, 0), /* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT2, 0x0364, 0x0050, 6, 0x0000, 0), /* MX6Q_PAD_SD2_DAT2__CCM_STOP */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT2, 0x0364, 0x0050, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT2__ANATOP_TESTO_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT0, 0x0368, 0x0054, 0, 0x0000, 0), /* MX6Q_PAD_SD2_DAT0__USDHC2_DAT0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT0, 0x0368, 0x0054, 1, 0x082C, 0), /* MX6Q_PAD_SD2_DAT0__ECSPI5_MISO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT0, 0x0368, 0x0054, 3, 0x07B4, 0), /* MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT0, 0x0368, 0x0054, 4, 0x08FC, 0), /* MX6Q_PAD_SD2_DAT0__KPP_ROW_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT0, 0x0368, 0x0054, 5, 0x0000, 0), /* MX6Q_PAD_SD2_DAT0__GPIO_1_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT0, 0x0368, 0x0054, 6, 0x0000, 0), /* MX6Q_PAD_SD2_DAT0__DCIC2_DCIC_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT0, 0x0368, 0x0054, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT0__TESTO_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TXC, 0x036C, 0x0058, 0, 0x0000, 0), /* MX6Q_PAD_RGMII_TXC__USBOH3_H2_DATA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TXC, 0x036C, 0x0058, 1, 0x0000, 0), /* MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TXC, 0x036C, 0x0058, 2, 0x0918, 0), /* MX6Q_PAD_RGMII_TXC__SPDIF_SPDIF_EXTCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TXC, 0x036C, 0x0058, 5, 0x0000, 0), /* MX6Q_PAD_RGMII_TXC__GPIO_6_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TXC, 0x036C, 0x0058, 6, 0x0000, 0), /* MX6Q_PAD_RGMII_TXC__MIPI_CORE_DPHY_IN_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TXC, 0x036C, 0x0058, 7, 0x0000, 0), /* MX6Q_PAD_RGMII_TXC__ANATOP_24M_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD0, 0x0370, 0x005C, 0, 0x0000, 0), /* MX6Q_PAD_RGMII_TD0__MIPI_HSI_CRL_TX_RDY */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD0, 0x0370, 0x005C, 1, 0x0000, 0), /* MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD0, 0x0370, 0x005C, 5, 0x0000, 0), /* MX6Q_PAD_RGMII_TD0__GPIO_6_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD0, 0x0370, 0x005C, 6, 0x0000, 0), /* MX6Q_PAD_RGMII_TD0__MIPI_CORE_DPHY_IN_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD1, 0x0374, 0x0060, 0, 0x0000, 0), /* MX6Q_PAD_RGMII_TD1__MIPI_HSI_CRL_RX_FLG */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD1, 0x0374, 0x0060, 1, 0x0000, 0), /* MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD1, 0x0374, 0x0060, 5, 0x0000, 0), /* MX6Q_PAD_RGMII_TD1__GPIO_6_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD1, 0x0374, 0x0060, 6, 0x0000, 0), /* MX6Q_PAD_RGMII_TD1__MIPI_CORE_DPHY_IN_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD1, 0x0374, 0x0060, 7, 0x0000, 0), /* MX6Q_PAD_RGMII_TD1__CCM_PLL3_BYP */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD2, 0x0378, 0x0064, 0, 0x0000, 0), /* MX6Q_PAD_RGMII_TD2__MIPI_HSI_CRL_RX_DTA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD2, 0x0378, 0x0064, 1, 0x0000, 0), /* MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD2, 0x0378, 0x0064, 5, 0x0000, 0), /* MX6Q_PAD_RGMII_TD2__GPIO_6_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD2, 0x0378, 0x0064, 6, 0x0000, 0), /* MX6Q_PAD_RGMII_TD2__MIPI_CORE_DPHY_IN_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD2, 0x0378, 0x0064, 7, 0x0000, 0), /* MX6Q_PAD_RGMII_TD2__CCM_PLL2_BYP */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD3, 0x037C, 0x0068, 0, 0x0000, 0), /* MX6Q_PAD_RGMII_TD3__MIPI_HSI_CRL_RX_WAK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD3, 0x037C, 0x0068, 1, 0x0000, 0), /* MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD3, 0x037C, 0x0068, 5, 0x0000, 0), /* MX6Q_PAD_RGMII_TD3__GPIO_6_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TD3, 0x037C, 0x0068, 6, 0x0000, 0), /* MX6Q_PAD_RGMII_TD3__MIPI_CORE_DPHY_IN_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RX_CTL, 0x0380, 0x006C, 0, 0x0000, 0), /* MX6Q_PAD_RGMII_RX_CTL__USBOH3_H3_DATA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RX_CTL, 0x0380, 0x006C, 1, 0x0858, 0), /* MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RX_CTL, 0x0380, 0x006C, 5, 0x0000, 0), /* MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RX_CTL, 0x0380, 0x006C, 6, 0x0000, 0), /* MX6Q_PAD_RGMII_RX_CTL__MIPI_DPHY_IN_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD0, 0x0384, 0x0070, 0, 0x0000, 0), /* MX6Q_PAD_RGMII_RD0__MIPI_HSI_CRL_RX_RDY */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD0, 0x0384, 0x0070, 1, 0x0848, 0), /* MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD0, 0x0384, 0x0070, 5, 0x0000, 0), /* MX6Q_PAD_RGMII_RD0__GPIO_6_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD0, 0x0384, 0x0070, 6, 0x0000, 0), /* MX6Q_PAD_RGMII_RD0__MIPI_CORE_DPHY_IN_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TX_CTL, 0x0388, 0x0074, 0, 0x0000, 0), /* MX6Q_PAD_RGMII_TX_CTL__USBOH3_H2_STROBE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TX_CTL, 0x0388, 0x0074, 1, 0x0000, 0), /* MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TX_CTL, 0x0388, 0x0074, 5, 0x0000, 0), /* MX6Q_PAD_RGMII_TX_CTL__GPIO_6_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TX_CTL, 0x0388, 0x0074, 6, 0x0000, 0), /* MX6Q_PAD_RGMII_TX_CTL__CORE_DPHY_IN_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_TX_CTL, 0x0388, 0x0074, 7, 0x083C, 0), /* MX6Q_PAD_RGMII_TX_CTL__ANATOP_REF_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD1, 0x038C, 0x0078, 0, 0x0000, 0), /* MX6Q_PAD_RGMII_RD1__MIPI_HSI_CTRL_TX_FL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD1, 0x038C, 0x0078, 1, 0x084C, 0), /* MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD1, 0x038C, 0x0078, 5, 0x0000, 0), /* MX6Q_PAD_RGMII_RD1__GPIO_6_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD1, 0x038C, 0x0078, 6, 0x0000, 0), /* MX6Q_PAD_RGMII_RD1__CORE_DPHY_TEST_IN_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD1, 0x038C, 0x0078, 7, 0x0000, 0), /* MX6Q_PAD_RGMII_RD1__SJC_FAIL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD2, 0x0390, 0x007C, 0, 0x0000, 0), /* MX6Q_PAD_RGMII_RD2__MIPI_HSI_CRL_TX_DTA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD2, 0x0390, 0x007C, 1, 0x0850, 0), /* MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD2, 0x0390, 0x007C, 5, 0x0000, 0), /* MX6Q_PAD_RGMII_RD2__GPIO_6_28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD2, 0x0390, 0x007C, 6, 0x0000, 0), /* MX6Q_PAD_RGMII_RD2__MIPI_CORE_DPHY_IN_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD3, 0x0394, 0x0080, 0, 0x0000, 0), /* MX6Q_PAD_RGMII_RD3__MIPI_HSI_CRL_TX_WAK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD3, 0x0394, 0x0080, 1, 0x0854, 0), /* MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD3, 0x0394, 0x0080, 5, 0x0000, 0), /* MX6Q_PAD_RGMII_RD3__GPIO_6_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RD3, 0x0394, 0x0080, 6, 0x0000, 0), /* MX6Q_PAD_RGMII_RD3__MIPI_CORE_DPHY_IN10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RXC, 0x0398, 0x0084, 0, 0x0000, 0), /* MX6Q_PAD_RGMII_RXC__USBOH3_H3_STROBE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RXC, 0x0398, 0x0084, 1, 0x0844, 0), /* MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RXC, 0x0398, 0x0084, 5, 0x0000, 0), /* MX6Q_PAD_RGMII_RXC__GPIO_6_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RGMII_RXC, 0x0398, 0x0084, 6, 0x0000, 0), /* MX6Q_PAD_RGMII_RXC__MIPI_CORE_DPHY_IN11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A25, 0x039C, 0x0088, 0, 0x0000, 0), /* MX6Q_PAD_EIM_A25__WEIM_WEIM_A_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A25, 0x039C, 0x0088, 1, 0x0000, 0), /* MX6Q_PAD_EIM_A25__ECSPI4_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A25, 0x039C, 0x0088, 2, 0x0000, 0), /* MX6Q_PAD_EIM_A25__ECSPI2_RDY */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A25, 0x039C, 0x0088, 3, 0x0000, 0), /* MX6Q_PAD_EIM_A25__IPU1_DI1_PIN12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A25, 0x039C, 0x0088, 4, 0x0000, 0), /* MX6Q_PAD_EIM_A25__IPU1_DI0_D1_CS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A25, 0x039C, 0x0088, 5, 0x0000, 0), /* MX6Q_PAD_EIM_A25__GPIO_5_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A25, 0x039C, 0x0088, 6, 0x088C, 0), /* MX6Q_PAD_EIM_A25__HDMI_TX_CEC_LINE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A25, 0x039C, 0x0088, 7, 0x0000, 0), /* MX6Q_PAD_EIM_A25__PL301_PER1_HBURST_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB2, 0x03A0, 0x008C, 0, 0x0000, 0), /* MX6Q_PAD_EIM_EB2__WEIM_WEIM_EB_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB2, 0x03A0, 0x008C, 1, 0x0800, 0), /* MX6Q_PAD_EIM_EB2__ECSPI1_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB2, 0x03A0, 0x008C, 2, 0x07EC, 0), /* MX6Q_PAD_EIM_EB2__CCM_DI1_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB2, 0x03A0, 0x008C, 3, 0x08D4, 0), /* MX6Q_PAD_EIM_EB2__IPU2_CSI1_D_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB2, 0x03A0, 0x008C, 4, 0x0890, 0), /* MX6Q_PAD_EIM_EB2__HDMI_TX_DDC_SCL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB2, 0x03A0, 0x008C, 5, 0x0000, 0), /* MX6Q_PAD_EIM_EB2__GPIO_2_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB2, 0x03A0, 0x008C, 6, 0x08A0, 0), /* MX6Q_PAD_EIM_EB2__I2C2_SCL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB2, 0x03A0, 0x008C, 7, 0x0000, 0), /* MX6Q_PAD_EIM_EB2__SRC_BT_CFG_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D16, 0x03A4, 0x0090, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D16__WEIM_WEIM_D_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D16, 0x03A4, 0x0090, 1, 0x07F4, 0), /* MX6Q_PAD_EIM_D16__ECSPI1_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D16, 0x03A4, 0x0090, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D16__IPU1_DI0_PIN5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D16, 0x03A4, 0x0090, 3, 0x08D0, 0), /* MX6Q_PAD_EIM_D16__IPU2_CSI1_D_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D16, 0x03A4, 0x0090, 4, 0x0894, 0), /* MX6Q_PAD_EIM_D16__HDMI_TX_DDC_SDA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D16, 0x03A4, 0x0090, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D16__GPIO_3_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D16, 0x03A4, 0x0090, 6, 0x08A4, 0), /* MX6Q_PAD_EIM_D16__I2C2_SDA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D17, 0x03A8, 0x0094, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D17__WEIM_WEIM_D_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D17, 0x03A8, 0x0094, 1, 0x07F8, 0), /* MX6Q_PAD_EIM_D17__ECSPI1_MISO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D17, 0x03A8, 0x0094, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D17__IPU1_DI0_PIN6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D17, 0x03A8, 0x0094, 3, 0x08E0, 0), /* MX6Q_PAD_EIM_D17__IPU2_CSI1_PIXCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D17, 0x03A8, 0x0094, 4, 0x0000, 0), /* MX6Q_PAD_EIM_D17__DCIC1_DCIC_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D17, 0x03A8, 0x0094, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D17__GPIO_3_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D17, 0x03A8, 0x0094, 6, 0x08A8, 0), /* MX6Q_PAD_EIM_D17__I2C3_SCL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D17, 0x03A8, 0x0094, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D17__PL301_PER1_HBURST_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D18, 0x03AC, 0x0098, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D18__WEIM_WEIM_D_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D18, 0x03AC, 0x0098, 1, 0x07FC, 0), /* MX6Q_PAD_EIM_D18__ECSPI1_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D18, 0x03AC, 0x0098, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D18__IPU1_DI0_PIN7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D18, 0x03AC, 0x0098, 3, 0x08CC, 0), /* MX6Q_PAD_EIM_D18__IPU2_CSI1_D_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D18, 0x03AC, 0x0098, 4, 0x0000, 0), /* MX6Q_PAD_EIM_D18__IPU1_DI1_D0_CS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D18, 0x03AC, 0x0098, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D18__GPIO_3_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D18, 0x03AC, 0x0098, 6, 0x08AC, 0), /* MX6Q_PAD_EIM_D18__I2C3_SDA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D18, 0x03AC, 0x0098, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D18__PL301_PER1_HBURST_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D19, 0x03B0, 0x009C, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D19__WEIM_WEIM_D_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D19, 0x03B0, 0x009C, 1, 0x0804, 0), /* MX6Q_PAD_EIM_D19__ECSPI1_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D19, 0x03B0, 0x009C, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D19__IPU1_DI0_PIN8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D19, 0x03B0, 0x009C, 3, 0x08C8, 0), /* MX6Q_PAD_EIM_D19__IPU2_CSI1_D_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D19, 0x03B0, 0x009C, 4, 0x091C, 0), /* MX6Q_PAD_EIM_D19__UART1_CTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D19, 0x03B0, 0x009C, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D19__GPIO_3_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D19, 0x03B0, 0x009C, 6, 0x0000, 0), /* MX6Q_PAD_EIM_D19__EPIT1_EPITO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D19, 0x03B0, 0x009C, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D19__PL301_PER1_HRESP */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D20, 0x03B4, 0x00A0, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D20__WEIM_WEIM_D_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D20, 0x03B4, 0x00A0, 1, 0x0824, 0), /* MX6Q_PAD_EIM_D20__ECSPI4_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D20, 0x03B4, 0x00A0, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D20__IPU1_DI0_PIN16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D20, 0x03B4, 0x00A0, 3, 0x08C4, 0), /* MX6Q_PAD_EIM_D20__IPU2_CSI1_D_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D20, 0x03B4, 0x00A0, 4, 0x091C, 1), /* MX6Q_PAD_EIM_D20__UART1_RTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D20, 0x03B4, 0x00A0, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D20__GPIO_3_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D20, 0x03B4, 0x00A0, 6, 0x0000, 0), /* MX6Q_PAD_EIM_D20__EPIT2_EPITO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D21, 0x03B8, 0x00A4, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D21__WEIM_WEIM_D_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D21, 0x03B8, 0x00A4, 1, 0x0000, 0), /* MX6Q_PAD_EIM_D21__ECSPI4_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D21, 0x03B8, 0x00A4, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D21__IPU1_DI0_PIN17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D21, 0x03B8, 0x00A4, 3, 0x08B4, 0), /* MX6Q_PAD_EIM_D21__IPU2_CSI1_D_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D21, 0x03B8, 0x00A4, 4, 0x0944, 0), /* MX6Q_PAD_EIM_D21__USBOH3_USBOTG_OC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D21, 0x03B8, 0x00A4, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D21__GPIO_3_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D21, 0x03B8, 0x00A4, 6, 0x0898, 0), /* MX6Q_PAD_EIM_D21__I2C1_SCL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D21, 0x03B8, 0x00A4, 7, 0x0914, 0), /* MX6Q_PAD_EIM_D21__SPDIF_IN1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D22, 0x03BC, 0x00A8, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D22__WEIM_WEIM_D_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D22, 0x03BC, 0x00A8, 1, 0x0000, 0), /* MX6Q_PAD_EIM_D22__ECSPI4_MISO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D22, 0x03BC, 0x00A8, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D22__IPU1_DI0_PIN1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D22, 0x03BC, 0x00A8, 3, 0x08B0, 0), /* MX6Q_PAD_EIM_D22__IPU2_CSI1_D_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D22, 0x03BC, 0x00A8, 4, 0x0000, 0), /* MX6Q_PAD_EIM_D22__USBOH3_USBOTG_PWR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D22, 0x03BC, 0x00A8, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D22__GPIO_3_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D22, 0x03BC, 0x00A8, 6, 0x0000, 0), /* MX6Q_PAD_EIM_D22__SPDIF_OUT1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D22, 0x03BC, 0x00A8, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D22__PL301_PER1_HWRITE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D23, 0x03C0, 0x00AC, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D23__WEIM_WEIM_D_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D23, 0x03C0, 0x00AC, 1, 0x0000, 0), /* MX6Q_PAD_EIM_D23__IPU1_DI0_D0_CS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D23, 0x03C0, 0x00AC, 2, 0x092C, 0), /* MX6Q_PAD_EIM_D23__UART3_CTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D23, 0x03C0, 0x00AC, 3, 0x0000, 0), /* MX6Q_PAD_EIM_D23__UART1_DCD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D23, 0x03C0, 0x00AC, 4, 0x08D8, 0), /* MX6Q_PAD_EIM_D23__IPU2_CSI1_DATA_EN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D23, 0x03C0, 0x00AC, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D23__GPIO_3_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D23, 0x03C0, 0x00AC, 6, 0x0000, 0), /* MX6Q_PAD_EIM_D23__IPU1_DI1_PIN2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D23, 0x03C0, 0x00AC, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D23__IPU1_DI1_PIN14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB3, 0x03C4, 0x00B0, 0, 0x0000, 0), /* MX6Q_PAD_EIM_EB3__WEIM_WEIM_EB_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB3, 0x03C4, 0x00B0, 1, 0x0000, 0), /* MX6Q_PAD_EIM_EB3__ECSPI4_RDY */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB3, 0x03C4, 0x00B0, 2, 0x092C, 1), /* MX6Q_PAD_EIM_EB3__UART3_RTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB3, 0x03C4, 0x00B0, 3, 0x0000, 0), /* MX6Q_PAD_EIM_EB3__UART1_RI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB3, 0x03C4, 0x00B0, 4, 0x08DC, 0), /* MX6Q_PAD_EIM_EB3__IPU2_CSI1_HSYNC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB3, 0x03C4, 0x00B0, 5, 0x0000, 0), /* MX6Q_PAD_EIM_EB3__GPIO_2_31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB3, 0x03C4, 0x00B0, 6, 0x0000, 0), /* MX6Q_PAD_EIM_EB3__IPU1_DI1_PIN3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB3, 0x03C4, 0x00B0, 7, 0x0000, 0), /* MX6Q_PAD_EIM_EB3__SRC_BT_CFG_31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D24, 0x03C8, 0x00B4, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D24__WEIM_WEIM_D_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D24, 0x03C8, 0x00B4, 1, 0x0000, 0), /* MX6Q_PAD_EIM_D24__ECSPI4_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D24, 0x03C8, 0x00B4, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D24__UART3_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D24, 0x03C8, 0x00B4, 3, 0x0808, 0), /* MX6Q_PAD_EIM_D24__ECSPI1_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D24, 0x03C8, 0x00B4, 4, 0x0000, 0), /* MX6Q_PAD_EIM_D24__ECSPI2_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D24, 0x03C8, 0x00B4, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D24__GPIO_3_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D24, 0x03C8, 0x00B4, 6, 0x07D8, 0), /* MX6Q_PAD_EIM_D24__AUDMUX_AUD5_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D24, 0x03C8, 0x00B4, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D24__UART1_DTR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D25, 0x03CC, 0x00B8, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D25__WEIM_WEIM_D_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D25, 0x03CC, 0x00B8, 1, 0x0000, 0), /* MX6Q_PAD_EIM_D25__ECSPI4_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D25, 0x03CC, 0x00B8, 2, 0x0930, 1), /* MX6Q_PAD_EIM_D25__UART3_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D25, 0x03CC, 0x00B8, 3, 0x080C, 0), /* MX6Q_PAD_EIM_D25__ECSPI1_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D25, 0x03CC, 0x00B8, 4, 0x0000, 0), /* MX6Q_PAD_EIM_D25__ECSPI2_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D25, 0x03CC, 0x00B8, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D25__GPIO_3_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D25, 0x03CC, 0x00B8, 6, 0x07D4, 0), /* MX6Q_PAD_EIM_D25__AUDMUX_AUD5_RXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D25, 0x03CC, 0x00B8, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D25__UART1_DSR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D26, 0x03D0, 0x00BC, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D26__WEIM_WEIM_D_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D26, 0x03D0, 0x00BC, 1, 0x0000, 0), /* MX6Q_PAD_EIM_D26__IPU1_DI1_PIN11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D26, 0x03D0, 0x00BC, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D26__IPU1_CSI0_D_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D26, 0x03D0, 0x00BC, 3, 0x08C0, 0), /* MX6Q_PAD_EIM_D26__IPU2_CSI1_D_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D26, 0x03D0, 0x00BC, 4, 0x0000, 0), /* MX6Q_PAD_EIM_D26__UART2_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D26, 0x03D0, 0x00BC, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D26__GPIO_3_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D26, 0x03D0, 0x00BC, 6, 0x0000, 0), /* MX6Q_PAD_EIM_D26__IPU1_SISG_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D26, 0x03D0, 0x00BC, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D26__IPU1_DISP1_DAT_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D27, 0x03D4, 0x00C0, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D27__WEIM_WEIM_D_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D27, 0x03D4, 0x00C0, 1, 0x0000, 0), /* MX6Q_PAD_EIM_D27__IPU1_DI1_PIN13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D27, 0x03D4, 0x00C0, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D27__IPU1_CSI0_D_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D27, 0x03D4, 0x00C0, 3, 0x08BC, 0), /* MX6Q_PAD_EIM_D27__IPU2_CSI1_D_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D27, 0x03D4, 0x00C0, 4, 0x0928, 1), /* MX6Q_PAD_EIM_D27__UART2_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D27, 0x03D4, 0x00C0, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D27__GPIO_3_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D27, 0x03D4, 0x00C0, 6, 0x0000, 0), /* MX6Q_PAD_EIM_D27__IPU1_SISG_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D27, 0x03D4, 0x00C0, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D27__IPU1_DISP1_DAT_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D28, 0x03D8, 0x00C4, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D28__WEIM_WEIM_D_28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D28, 0x03D8, 0x00C4, 1, 0x089C, 0), /* MX6Q_PAD_EIM_D28__I2C1_SDA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D28, 0x03D8, 0x00C4, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D28__ECSPI4_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D28, 0x03D8, 0x00C4, 3, 0x08B8, 0), /* MX6Q_PAD_EIM_D28__IPU2_CSI1_D_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D28, 0x03D8, 0x00C4, 4, 0x0924, 0), /* MX6Q_PAD_EIM_D28__UART2_CTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D28, 0x03D8, 0x00C4, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D28__GPIO_3_28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D28, 0x03D8, 0x00C4, 6, 0x0000, 0), /* MX6Q_PAD_EIM_D28__IPU1_EXT_TRIG */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D28, 0x03D8, 0x00C4, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D28__IPU1_DI0_PIN13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D29, 0x03DC, 0x00C8, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D29__WEIM_WEIM_D_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D29, 0x03DC, 0x00C8, 1, 0x0000, 0), /* MX6Q_PAD_EIM_D29__IPU1_DI1_PIN15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D29, 0x03DC, 0x00C8, 2, 0x0824, 1), /* MX6Q_PAD_EIM_D29__ECSPI4_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D29, 0x03DC, 0x00C8, 4, 0x0924, 1), /* MX6Q_PAD_EIM_D29__UART2_RTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D29, 0x03DC, 0x00C8, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D29__GPIO_3_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D29, 0x03DC, 0x00C8, 6, 0x08E4, 0), /* MX6Q_PAD_EIM_D29__IPU2_CSI1_VSYNC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D29, 0x03DC, 0x00C8, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D29__IPU1_DI0_PIN14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D30, 0x03E0, 0x00CC, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D30__WEIM_WEIM_D_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D30, 0x03E0, 0x00CC, 1, 0x0000, 0), /* MX6Q_PAD_EIM_D30__IPU1_DISP1_DAT_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D30, 0x03E0, 0x00CC, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D30__IPU1_DI0_PIN11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D30, 0x03E0, 0x00CC, 3, 0x0000, 0), /* MX6Q_PAD_EIM_D30__IPU1_CSI0_D_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D30, 0x03E0, 0x00CC, 4, 0x092C, 2), /* MX6Q_PAD_EIM_D30__UART3_CTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D30, 0x03E0, 0x00CC, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D30__GPIO_3_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D30, 0x03E0, 0x00CC, 6, 0x0948, 0), /* MX6Q_PAD_EIM_D30__USBOH3_USBH1_OC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D30, 0x03E0, 0x00CC, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D30__PL301_PER1_HPROT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D31, 0x03E4, 0x00D0, 0, 0x0000, 0), /* MX6Q_PAD_EIM_D31__WEIM_WEIM_D_31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D31, 0x03E4, 0x00D0, 1, 0x0000, 0), /* MX6Q_PAD_EIM_D31__IPU1_DISP1_DAT_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D31, 0x03E4, 0x00D0, 2, 0x0000, 0), /* MX6Q_PAD_EIM_D31__IPU1_DI0_PIN12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D31, 0x03E4, 0x00D0, 3, 0x0000, 0), /* MX6Q_PAD_EIM_D31__IPU1_CSI0_D_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D31, 0x03E4, 0x00D0, 4, 0x092C, 3), /* MX6Q_PAD_EIM_D31__UART3_RTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D31, 0x03E4, 0x00D0, 5, 0x0000, 0), /* MX6Q_PAD_EIM_D31__GPIO_3_31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D31, 0x03E4, 0x00D0, 6, 0x0000, 0), /* MX6Q_PAD_EIM_D31__USBOH3_USBH1_PWR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_D31, 0x03E4, 0x00D0, 7, 0x0000, 0), /* MX6Q_PAD_EIM_D31__PL301_PER1_HPROT_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A24, 0x03E8, 0x00D4, 0, 0x0000, 0), /* MX6Q_PAD_EIM_A24__WEIM_WEIM_A_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A24, 0x03E8, 0x00D4, 1, 0x0000, 0), /* MX6Q_PAD_EIM_A24__IPU1_DISP1_DAT_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A24, 0x03E8, 0x00D4, 2, 0x08D4, 1), /* MX6Q_PAD_EIM_A24__IPU2_CSI1_D_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A24, 0x03E8, 0x00D4, 3, 0x0000, 0), /* MX6Q_PAD_EIM_A24__IPU2_SISG_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A24, 0x03E8, 0x00D4, 4, 0x0000, 0), /* MX6Q_PAD_EIM_A24__IPU1_SISG_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A24, 0x03E8, 0x00D4, 5, 0x0000, 0), /* MX6Q_PAD_EIM_A24__GPIO_5_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A24, 0x03E8, 0x00D4, 6, 0x0000, 0), /* MX6Q_PAD_EIM_A24__PL301_PER1_HPROT_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A24, 0x03E8, 0x00D4, 7, 0x0000, 0), /* MX6Q_PAD_EIM_A24__SRC_BT_CFG_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A23, 0x03EC, 0x00D8, 0, 0x0000, 0), /* MX6Q_PAD_EIM_A23__WEIM_WEIM_A_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A23, 0x03EC, 0x00D8, 1, 0x0000, 0), /* MX6Q_PAD_EIM_A23__IPU1_DISP1_DAT_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A23, 0x03EC, 0x00D8, 2, 0x08D0, 1), /* MX6Q_PAD_EIM_A23__IPU2_CSI1_D_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A23, 0x03EC, 0x00D8, 3, 0x0000, 0), /* MX6Q_PAD_EIM_A23__IPU2_SISG_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A23, 0x03EC, 0x00D8, 4, 0x0000, 0), /* MX6Q_PAD_EIM_A23__IPU1_SISG_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A23, 0x03EC, 0x00D8, 5, 0x0000, 0), /* MX6Q_PAD_EIM_A23__GPIO_6_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A23, 0x03EC, 0x00D8, 6, 0x0000, 0), /* MX6Q_PAD_EIM_A23__PL301_PER1_HPROT_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A23, 0x03EC, 0x00D8, 7, 0x0000, 0), /* MX6Q_PAD_EIM_A23__SRC_BT_CFG_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A22, 0x03F0, 0x00DC, 0, 0x0000, 0), /* MX6Q_PAD_EIM_A22__WEIM_WEIM_A_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A22, 0x03F0, 0x00DC, 1, 0x0000, 0), /* MX6Q_PAD_EIM_A22__IPU1_DISP1_DAT_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A22, 0x03F0, 0x00DC, 2, 0x08CC, 1), /* MX6Q_PAD_EIM_A22__IPU2_CSI1_D_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A22, 0x03F0, 0x00DC, 5, 0x0000, 0), /* MX6Q_PAD_EIM_A22__GPIO_2_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A22, 0x03F0, 0x00DC, 6, 0x0000, 0), /* MX6Q_PAD_EIM_A22__TPSMP_HDATA_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A22, 0x03F0, 0x00DC, 7, 0x0000, 0), /* MX6Q_PAD_EIM_A22__SRC_BT_CFG_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A21, 0x03F4, 0x00E0, 0, 0x0000, 0), /* MX6Q_PAD_EIM_A21__WEIM_WEIM_A_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A21, 0x03F4, 0x00E0, 1, 0x0000, 0), /* MX6Q_PAD_EIM_A21__IPU1_DISP1_DAT_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A21, 0x03F4, 0x00E0, 2, 0x08C8, 1), /* MX6Q_PAD_EIM_A21__IPU2_CSI1_D_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A21, 0x03F4, 0x00E0, 3, 0x0000, 0), /* MX6Q_PAD_EIM_A21__RESERVED_RESERVED */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A21, 0x03F4, 0x00E0, 4, 0x0000, 0), /* MX6Q_PAD_EIM_A21__MIPI_CORE_DPHY_OUT_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A21, 0x03F4, 0x00E0, 5, 0x0000, 0), /* MX6Q_PAD_EIM_A21__GPIO_2_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A21, 0x03F4, 0x00E0, 6, 0x0000, 0), /* MX6Q_PAD_EIM_A21__TPSMP_HDATA_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A21, 0x03F4, 0x00E0, 7, 0x0000, 0), /* MX6Q_PAD_EIM_A21__SRC_BT_CFG_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A20, 0x03F8, 0x00E4, 0, 0x0000, 0), /* MX6Q_PAD_EIM_A20__WEIM_WEIM_A_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A20, 0x03F8, 0x00E4, 1, 0x0000, 0), /* MX6Q_PAD_EIM_A20__IPU1_DISP1_DAT_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A20, 0x03F8, 0x00E4, 2, 0x08C4, 1), /* MX6Q_PAD_EIM_A20__IPU2_CSI1_D_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A20, 0x03F8, 0x00E4, 3, 0x0000, 0), /* MX6Q_PAD_EIM_A20__RESERVED_RESERVED */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A20, 0x03F8, 0x00E4, 4, 0x0000, 0), /* MX6Q_PAD_EIM_A20__MIPI_CORE_DPHY_OUT_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A20, 0x03F8, 0x00E4, 5, 0x0000, 0), /* MX6Q_PAD_EIM_A20__GPIO_2_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A20, 0x03F8, 0x00E4, 6, 0x0000, 0), /* MX6Q_PAD_EIM_A20__TPSMP_HDATA_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A20, 0x03F8, 0x00E4, 7, 0x0000, 0), /* MX6Q_PAD_EIM_A20__SRC_BT_CFG_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A19, 0x03FC, 0x00E8, 0, 0x0000, 0), /* MX6Q_PAD_EIM_A19__WEIM_WEIM_A_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A19, 0x03FC, 0x00E8, 1, 0x0000, 0), /* MX6Q_PAD_EIM_A19__IPU1_DISP1_DAT_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A19, 0x03FC, 0x00E8, 2, 0x08C0, 1), /* MX6Q_PAD_EIM_A19__IPU2_CSI1_D_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A19, 0x03FC, 0x00E8, 3, 0x0000, 0), /* MX6Q_PAD_EIM_A19__RESERVED_RESERVED */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A19, 0x03FC, 0x00E8, 4, 0x0000, 0), /* MX6Q_PAD_EIM_A19__MIPI_CORE_DPHY_OUT_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A19, 0x03FC, 0x00E8, 5, 0x0000, 0), /* MX6Q_PAD_EIM_A19__GPIO_2_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A19, 0x03FC, 0x00E8, 6, 0x0000, 0), /* MX6Q_PAD_EIM_A19__TPSMP_HDATA_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A19, 0x03FC, 0x00E8, 7, 0x0000, 0), /* MX6Q_PAD_EIM_A19__SRC_BT_CFG_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A18, 0x0400, 0x00EC, 0, 0x0000, 0), /* MX6Q_PAD_EIM_A18__WEIM_WEIM_A_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A18, 0x0400, 0x00EC, 1, 0x0000, 0), /* MX6Q_PAD_EIM_A18__IPU1_DISP1_DAT_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A18, 0x0400, 0x00EC, 2, 0x08BC, 1), /* MX6Q_PAD_EIM_A18__IPU2_CSI1_D_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A18, 0x0400, 0x00EC, 3, 0x0000, 0), /* MX6Q_PAD_EIM_A18__RESERVED_RESERVED */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A18, 0x0400, 0x00EC, 4, 0x0000, 0), /* MX6Q_PAD_EIM_A18__MIPI_CORE_DPHY_OUT_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A18, 0x0400, 0x00EC, 5, 0x0000, 0), /* MX6Q_PAD_EIM_A18__GPIO_2_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A18, 0x0400, 0x00EC, 6, 0x0000, 0), /* MX6Q_PAD_EIM_A18__TPSMP_HDATA_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A18, 0x0400, 0x00EC, 7, 0x0000, 0), /* MX6Q_PAD_EIM_A18__SRC_BT_CFG_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A17, 0x0404, 0x00F0, 0, 0x0000, 0), /* MX6Q_PAD_EIM_A17__WEIM_WEIM_A_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A17, 0x0404, 0x00F0, 1, 0x0000, 0), /* MX6Q_PAD_EIM_A17__IPU1_DISP1_DAT_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A17, 0x0404, 0x00F0, 2, 0x08B8, 1), /* MX6Q_PAD_EIM_A17__IPU2_CSI1_D_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A17, 0x0404, 0x00F0, 3, 0x0000, 0), /* MX6Q_PAD_EIM_A17__RESERVED_RESERVED */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A17, 0x0404, 0x00F0, 4, 0x0000, 0), /* MX6Q_PAD_EIM_A17__MIPI_CORE_DPHY_OUT_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A17, 0x0404, 0x00F0, 5, 0x0000, 0), /* MX6Q_PAD_EIM_A17__GPIO_2_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A17, 0x0404, 0x00F0, 6, 0x0000, 0), /* MX6Q_PAD_EIM_A17__TPSMP_HDATA_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A17, 0x0404, 0x00F0, 7, 0x0000, 0), /* MX6Q_PAD_EIM_A17__SRC_BT_CFG_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A16, 0x0408, 0x00F4, 0, 0x0000, 0), /* MX6Q_PAD_EIM_A16__WEIM_WEIM_A_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A16, 0x0408, 0x00F4, 1, 0x0000, 0), /* MX6Q_PAD_EIM_A16__IPU1_DI1_DISP_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A16, 0x0408, 0x00F4, 2, 0x08E0, 1), /* MX6Q_PAD_EIM_A16__IPU2_CSI1_PIXCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A16, 0x0408, 0x00F4, 4, 0x0000, 0), /* MX6Q_PAD_EIM_A16__MIPI_CORE_DPHY_OUT_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A16, 0x0408, 0x00F4, 5, 0x0000, 0), /* MX6Q_PAD_EIM_A16__GPIO_2_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A16, 0x0408, 0x00F4, 6, 0x0000, 0), /* MX6Q_PAD_EIM_A16__TPSMP_HDATA_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_A16, 0x0408, 0x00F4, 7, 0x0000, 0), /* MX6Q_PAD_EIM_A16__SRC_BT_CFG_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_CS0, 0x040C, 0x00F8, 0, 0x0000, 0), /* MX6Q_PAD_EIM_CS0__WEIM_WEIM_CS_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_CS0, 0x040C, 0x00F8, 1, 0x0000, 0), /* MX6Q_PAD_EIM_CS0__IPU1_DI1_PIN5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_CS0, 0x040C, 0x00F8, 2, 0x0810, 0), /* MX6Q_PAD_EIM_CS0__ECSPI2_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_CS0, 0x040C, 0x00F8, 4, 0x0000, 0), /* MX6Q_PAD_EIM_CS0__MIPI_CORE_DPHY_OUT_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_CS0, 0x040C, 0x00F8, 5, 0x0000, 0), /* MX6Q_PAD_EIM_CS0__GPIO_2_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_CS0, 0x040C, 0x00F8, 6, 0x0000, 0), /* MX6Q_PAD_EIM_CS0__TPSMP_HDATA_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_CS1, 0x0410, 0x00FC, 0, 0x0000, 0), /* MX6Q_PAD_EIM_CS1__WEIM_WEIM_CS_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_CS1, 0x0410, 0x00FC, 1, 0x0000, 0), /* MX6Q_PAD_EIM_CS1__IPU1_DI1_PIN6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_CS1, 0x0410, 0x00FC, 2, 0x0818, 0), /* MX6Q_PAD_EIM_CS1__ECSPI2_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_CS1, 0x0410, 0x00FC, 4, 0x0000, 0), /* MX6Q_PAD_EIM_CS1__MIPI_CORE_DPHY_OUT_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_CS1, 0x0410, 0x00FC, 5, 0x0000, 0), /* MX6Q_PAD_EIM_CS1__GPIO_2_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_CS1, 0x0410, 0x00FC, 6, 0x0000, 0), /* MX6Q_PAD_EIM_CS1__TPSMP_HDATA_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_OE, 0x0414, 0x0100, 0, 0x0000, 0), /* MX6Q_PAD_EIM_OE__WEIM_WEIM_OE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_OE, 0x0414, 0x0100, 1, 0x0000, 0), /* MX6Q_PAD_EIM_OE__IPU1_DI1_PIN7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_OE, 0x0414, 0x0100, 2, 0x0814, 0), /* MX6Q_PAD_EIM_OE__ECSPI2_MISO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_OE, 0x0414, 0x0100, 4, 0x0000, 0), /* MX6Q_PAD_EIM_OE__MIPI_CORE_DPHY_OUT_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_OE, 0x0414, 0x0100, 5, 0x0000, 0), /* MX6Q_PAD_EIM_OE__GPIO_2_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_OE, 0x0414, 0x0100, 6, 0x0000, 0), /* MX6Q_PAD_EIM_OE__TPSMP_HDATA_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_RW, 0x0418, 0x0104, 0, 0x0000, 0), /* MX6Q_PAD_EIM_RW__WEIM_WEIM_RW */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_RW, 0x0418, 0x0104, 1, 0x0000, 0), /* MX6Q_PAD_EIM_RW__IPU1_DI1_PIN8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_RW, 0x0418, 0x0104, 2, 0x081C, 0), /* MX6Q_PAD_EIM_RW__ECSPI2_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_RW, 0x0418, 0x0104, 4, 0x0000, 0), /* MX6Q_PAD_EIM_RW__MIPI_CORE_DPHY_OUT_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_RW, 0x0418, 0x0104, 5, 0x0000, 0), /* MX6Q_PAD_EIM_RW__GPIO_2_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_RW, 0x0418, 0x0104, 6, 0x0000, 0), /* MX6Q_PAD_EIM_RW__TPSMP_HDATA_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_RW, 0x0418, 0x0104, 7, 0x0000, 0), /* MX6Q_PAD_EIM_RW__SRC_BT_CFG_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_LBA, 0x041C, 0x0108, 0, 0x0000, 0), /* MX6Q_PAD_EIM_LBA__WEIM_WEIM_LBA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_LBA, 0x041C, 0x0108, 1, 0x0000, 0), /* MX6Q_PAD_EIM_LBA__IPU1_DI1_PIN17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_LBA, 0x041C, 0x0108, 2, 0x0820, 0), /* MX6Q_PAD_EIM_LBA__ECSPI2_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_LBA, 0x041C, 0x0108, 5, 0x0000, 0), /* MX6Q_PAD_EIM_LBA__GPIO_2_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_LBA, 0x041C, 0x0108, 6, 0x0000, 0), /* MX6Q_PAD_EIM_LBA__TPSMP_HDATA_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_LBA, 0x041C, 0x0108, 7, 0x0000, 0), /* MX6Q_PAD_EIM_LBA__SRC_BT_CFG_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB0, 0x0420, 0x010C, 0, 0x0000, 0), /* MX6Q_PAD_EIM_EB0__WEIM_WEIM_EB_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB0, 0x0420, 0x010C, 1, 0x0000, 0), /* MX6Q_PAD_EIM_EB0__IPU1_DISP1_DAT_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB0, 0x0420, 0x010C, 2, 0x08B4, 1), /* MX6Q_PAD_EIM_EB0__IPU2_CSI1_D_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB0, 0x0420, 0x010C, 3, 0x0000, 0), /* MX6Q_PAD_EIM_EB0__MIPI_CORE_DPHY_OUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB0, 0x0420, 0x010C, 4, 0x07F0, 0), /* MX6Q_PAD_EIM_EB0__CCM_PMIC_RDY */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB0, 0x0420, 0x010C, 5, 0x0000, 0), /* MX6Q_PAD_EIM_EB0__GPIO_2_28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB0, 0x0420, 0x010C, 6, 0x0000, 0), /* MX6Q_PAD_EIM_EB0__TPSMP_HDATA_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB0, 0x0420, 0x010C, 7, 0x0000, 0), /* MX6Q_PAD_EIM_EB0__SRC_BT_CFG_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB1, 0x0424, 0x0110, 0, 0x0000, 0), /* MX6Q_PAD_EIM_EB1__WEIM_WEIM_EB_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB1, 0x0424, 0x0110, 1, 0x0000, 0), /* MX6Q_PAD_EIM_EB1__IPU1_DISP1_DAT_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB1, 0x0424, 0x0110, 2, 0x08B0, 1), /* MX6Q_PAD_EIM_EB1__IPU2_CSI1_D_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB1, 0x0424, 0x0110, 3, 0x0000, 0), /* MX6Q_PAD_EIM_EB1__MIPI_CORE_DPHY__OUT_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB1, 0x0424, 0x0110, 5, 0x0000, 0), /* MX6Q_PAD_EIM_EB1__GPIO_2_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB1, 0x0424, 0x0110, 6, 0x0000, 0), /* MX6Q_PAD_EIM_EB1__TPSMP_HDATA_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_EB1, 0x0424, 0x0110, 7, 0x0000, 0), /* MX6Q_PAD_EIM_EB1__SRC_BT_CFG_28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA0, 0x0428, 0x0114, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA0__WEIM_WEIM_DA_A_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA0, 0x0428, 0x0114, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA0__IPU1_DISP1_DAT_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA0, 0x0428, 0x0114, 2, 0x0000, 0), /* MX6Q_PAD_EIM_DA0__IPU2_CSI1_D_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA0, 0x0428, 0x0114, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA0__MIPI_CORE_DPHY__OUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA0, 0x0428, 0x0114, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA0__GPIO_3_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA0, 0x0428, 0x0114, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA0__TPSMP_HDATA_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA0, 0x0428, 0x0114, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA0__SRC_BT_CFG_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA1, 0x042C, 0x0118, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA1__WEIM_WEIM_DA_A_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA1, 0x042C, 0x0118, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA1__IPU1_DISP1_DAT_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA1, 0x042C, 0x0118, 2, 0x0000, 0), /* MX6Q_PAD_EIM_DA1__IPU2_CSI1_D_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA1, 0x042C, 0x0118, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA1__MIPI_CORE_DPHY_OUT_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA1, 0x042C, 0x0118, 4, 0x0000, 0), /* MX6Q_PAD_EIM_DA1__USBPHY1_TX_LS_MODE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA1, 0x042C, 0x0118, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA1__GPIO_3_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA1, 0x042C, 0x0118, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA1__TPSMP_HDATA_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA1, 0x042C, 0x0118, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA1__SRC_BT_CFG_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA2, 0x0430, 0x011C, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA2__WEIM_WEIM_DA_A_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA2, 0x0430, 0x011C, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA2__IPU1_DISP1_DAT_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA2, 0x0430, 0x011C, 2, 0x0000, 0), /* MX6Q_PAD_EIM_DA2__IPU2_CSI1_D_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA2, 0x0430, 0x011C, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA2__MIPI_CORE_DPHY_OUT_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA2, 0x0430, 0x011C, 4, 0x0000, 0), /* MX6Q_PAD_EIM_DA2__USBPHY1_TX_HS_MODE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA2, 0x0430, 0x011C, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA2__GPIO_3_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA2, 0x0430, 0x011C, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA2__TPSMP_HDATA_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA2, 0x0430, 0x011C, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA2__SRC_BT_CFG_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA3, 0x0434, 0x0120, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA3__WEIM_WEIM_DA_A_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA3, 0x0434, 0x0120, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA3__IPU1_DISP1_DAT_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA3, 0x0434, 0x0120, 2, 0x0000, 0), /* MX6Q_PAD_EIM_DA3__IPU2_CSI1_D_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA3, 0x0434, 0x0120, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA3__MIPI_CORE_DPHY_OUT_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA3, 0x0434, 0x0120, 4, 0x0000, 0), /* MX6Q_PAD_EIM_DA3__USBPHY1_TX_HIZ */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA3, 0x0434, 0x0120, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA3__GPIO_3_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA3, 0x0434, 0x0120, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA3__TPSMP_HDATA_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA3, 0x0434, 0x0120, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA3__SRC_BT_CFG_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA4, 0x0438, 0x0124, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA4__WEIM_WEIM_DA_A_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA4, 0x0438, 0x0124, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA4__IPU1_DISP1_DAT_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA4, 0x0438, 0x0124, 2, 0x0000, 0), /* MX6Q_PAD_EIM_DA4__IPU2_CSI1_D_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA4, 0x0438, 0x0124, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA4__MIPI_CORE_DPHY_OUT_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA4, 0x0438, 0x0124, 4, 0x0000, 0), /* MX6Q_PAD_EIM_DA4__ANATOP_USBPHY1_TX_EN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA4, 0x0438, 0x0124, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA4__GPIO_3_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA4, 0x0438, 0x0124, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA4__TPSMP_HDATA_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA4, 0x0438, 0x0124, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA4__SRC_BT_CFG_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA5, 0x043C, 0x0128, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA5__WEIM_WEIM_DA_A_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA5, 0x043C, 0x0128, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA5__IPU1_DISP1_DAT_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA5, 0x043C, 0x0128, 2, 0x0000, 0), /* MX6Q_PAD_EIM_DA5__IPU2_CSI1_D_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA5, 0x043C, 0x0128, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA5__MIPI_CORE_DPHY_OUT_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA5, 0x043C, 0x0128, 4, 0x0000, 0), /* MX6Q_PAD_EIM_DA5__ANATOP_USBPHY1_TX_DP */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA5, 0x043C, 0x0128, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA5__GPIO_3_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA5, 0x043C, 0x0128, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA5__TPSMP_HDATA_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA5, 0x043C, 0x0128, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA5__SRC_BT_CFG_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA6, 0x0440, 0x012C, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA6__WEIM_WEIM_DA_A_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA6, 0x0440, 0x012C, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA6__IPU1_DISP1_DAT_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA6, 0x0440, 0x012C, 2, 0x0000, 0), /* MX6Q_PAD_EIM_DA6__IPU2_CSI1_D_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA6, 0x0440, 0x012C, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA6__MIPI_CORE_DPHY_OUT_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA6, 0x0440, 0x012C, 4, 0x0000, 0), /* MX6Q_PAD_EIM_DA6__ANATOP_USBPHY1_TX_DN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA6, 0x0440, 0x012C, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA6__GPIO_3_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA6, 0x0440, 0x012C, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA6__TPSMP_HDATA_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA6, 0x0440, 0x012C, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA6__SRC_BT_CFG_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA7, 0x0444, 0x0130, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA7__WEIM_WEIM_DA_A_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA7, 0x0444, 0x0130, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA7__IPU1_DISP1_DAT_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA7, 0x0444, 0x0130, 2, 0x0000, 0), /* MX6Q_PAD_EIM_DA7__IPU2_CSI1_D_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA7, 0x0444, 0x0130, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA7__MIPI_CORE_DPHY_OUT_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA7, 0x0444, 0x0130, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA7__GPIO_3_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA7, 0x0444, 0x0130, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA7__TPSMP_HDATA_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA7, 0x0444, 0x0130, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA7__SRC_BT_CFG_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA8, 0x0448, 0x0134, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA8__WEIM_WEIM_DA_A_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA8, 0x0448, 0x0134, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA8__IPU1_DISP1_DAT_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA8, 0x0448, 0x0134, 2, 0x0000, 0), /* MX6Q_PAD_EIM_DA8__IPU2_CSI1_D_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA8, 0x0448, 0x0134, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA8__MIPI_CORE_DPHY_OUT_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA8, 0x0448, 0x0134, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA8__GPIO_3_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA8, 0x0448, 0x0134, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA8__TPSMP_HDATA_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA8, 0x0448, 0x0134, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA8__SRC_BT_CFG_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA9, 0x044C, 0x0138, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA9__WEIM_WEIM_DA_A_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA9, 0x044C, 0x0138, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA9__IPU1_DISP1_DAT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA9, 0x044C, 0x0138, 2, 0x0000, 0), /* MX6Q_PAD_EIM_DA9__IPU2_CSI1_D_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA9, 0x044C, 0x0138, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA9__MIPI_CORE_DPHY_OUT_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA9, 0x044C, 0x0138, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA9__GPIO_3_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA9, 0x044C, 0x0138, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA9__TPSMP_HDATA_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA9, 0x044C, 0x0138, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA9__SRC_BT_CFG_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA10, 0x0450, 0x013C, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA10__WEIM_WEIM_DA_A_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA10, 0x0450, 0x013C, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA10__IPU1_DI1_PIN15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA10, 0x0450, 0x013C, 2, 0x08D8, 1), /* MX6Q_PAD_EIM_DA10__IPU2_CSI1_DATA_EN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA10, 0x0450, 0x013C, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA10__MIPI_CORE_DPHY_OUT12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA10, 0x0450, 0x013C, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA10__GPIO_3_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA10, 0x0450, 0x013C, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA10__TPSMP_HDATA_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA10, 0x0450, 0x013C, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA10__SRC_BT_CFG_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA11, 0x0454, 0x0140, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA11__WEIM_WEIM_DA_A_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA11, 0x0454, 0x0140, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA11__IPU1_DI1_PIN2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA11, 0x0454, 0x0140, 2, 0x08DC, 1), /* MX6Q_PAD_EIM_DA11__IPU2_CSI1_HSYNC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA11, 0x0454, 0x0140, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA11__MIPI_CORE_DPHY_OUT13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA11, 0x0454, 0x0140, 4, 0x0000, 0), /* MX6Q_PAD_EIM_DA11__SDMA_DBG_EVT_CHN_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA11, 0x0454, 0x0140, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA11__GPIO_3_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA11, 0x0454, 0x0140, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA11__TPSMP_HDATA_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA11, 0x0454, 0x0140, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA11__SRC_BT_CFG_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA12, 0x0458, 0x0144, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA12__WEIM_WEIM_DA_A_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA12, 0x0458, 0x0144, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA12__IPU1_DI1_PIN3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA12, 0x0458, 0x0144, 2, 0x08E4, 1), /* MX6Q_PAD_EIM_DA12__IPU2_CSI1_VSYNC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA12, 0x0458, 0x0144, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA12__MIPI_CORE_DPHY_OUT14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA12, 0x0458, 0x0144, 4, 0x0000, 0), /* MX6Q_PAD_EIM_DA12__SDMA_DEBUG_EVT_CHN_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA12, 0x0458, 0x0144, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA12__GPIO_3_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA12, 0x0458, 0x0144, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA12__TPSMP_HDATA_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA12, 0x0458, 0x0144, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA12__SRC_BT_CFG_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA13, 0x045C, 0x0148, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA13__WEIM_WEIM_DA_A_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA13, 0x045C, 0x0148, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA13__IPU1_DI1_D0_CS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA13, 0x045C, 0x0148, 2, 0x07EC, 1), /* MX6Q_PAD_EIM_DA13__CCM_DI1_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA13, 0x045C, 0x0148, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA13__MIPI_CORE_DPHY_OUT15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA13, 0x045C, 0x0148, 4, 0x0000, 0), /* MX6Q_PAD_EIM_DA13__SDMA_DEBUG_EVT_CHN_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA13, 0x045C, 0x0148, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA13__GPIO_3_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA13, 0x045C, 0x0148, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA13__TPSMP_HDATA_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA13, 0x045C, 0x0148, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA13__SRC_BT_CFG_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA14, 0x0460, 0x014C, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA14__WEIM_WEIM_DA_A_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA14, 0x0460, 0x014C, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA14__IPU1_DI1_D1_CS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA14, 0x0460, 0x014C, 2, 0x0000, 0), /* MX6Q_PAD_EIM_DA14__CCM_DI0_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA14, 0x0460, 0x014C, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA14__MIPI_CORE_DPHY_OUT16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA14, 0x0460, 0x014C, 4, 0x0000, 0), /* MX6Q_PAD_EIM_DA14__SDMA_DEBUG_EVT_CHN_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA14, 0x0460, 0x014C, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA14__GPIO_3_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA14, 0x0460, 0x014C, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA14__TPSMP_HDATA_28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA14, 0x0460, 0x014C, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA14__SRC_BT_CFG_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA15, 0x0464, 0x0150, 0, 0x0000, 0), /* MX6Q_PAD_EIM_DA15__WEIM_WEIM_DA_A_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA15, 0x0464, 0x0150, 1, 0x0000, 0), /* MX6Q_PAD_EIM_DA15__IPU1_DI1_PIN1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA15, 0x0464, 0x0150, 2, 0x0000, 0), /* MX6Q_PAD_EIM_DA15__IPU1_DI1_PIN4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA15, 0x0464, 0x0150, 3, 0x0000, 0), /* MX6Q_PAD_EIM_DA15__MIPI_CORE_DPHY_OUT17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA15, 0x0464, 0x0150, 5, 0x0000, 0), /* MX6Q_PAD_EIM_DA15__GPIO_3_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA15, 0x0464, 0x0150, 6, 0x0000, 0), /* MX6Q_PAD_EIM_DA15__TPSMP_HDATA_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_DA15, 0x0464, 0x0150, 7, 0x0000, 0), /* MX6Q_PAD_EIM_DA15__SRC_BT_CFG_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_WAIT, 0x0468, 0x0154, 0, 0x0000, 0), /* MX6Q_PAD_EIM_WAIT__WEIM_WEIM_WAIT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_WAIT, 0x0468, 0x0154, 1, 0x0000, 0), /* MX6Q_PAD_EIM_WAIT__WEIM_WEIM_DTACK_B */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_WAIT, 0x0468, 0x0154, 5, 0x0000, 0), /* MX6Q_PAD_EIM_WAIT__GPIO_5_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_WAIT, 0x0468, 0x0154, 6, 0x0000, 0), /* MX6Q_PAD_EIM_WAIT__TPSMP_HDATA_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_WAIT, 0x0468, 0x0154, 7, 0x0000, 0), /* MX6Q_PAD_EIM_WAIT__SRC_BT_CFG_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_BCLK, 0x046C, 0x0158, 0, 0x0000, 0), /* MX6Q_PAD_EIM_BCLK__WEIM_WEIM_BCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_BCLK, 0x046C, 0x0158, 1, 0x0000, 0), /* MX6Q_PAD_EIM_BCLK__IPU1_DI1_PIN16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_BCLK, 0x046C, 0x0158, 5, 0x0000, 0), /* MX6Q_PAD_EIM_BCLK__GPIO_6_31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_EIM_BCLK, 0x046C, 0x0158, 6, 0x0000, 0), /* MX6Q_PAD_EIM_BCLK__TPSMP_HDATA_31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_DISP_CLK, 0x0470, 0x015C, 0, 0x0000, 0), /* MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DSP_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_DISP_CLK, 0x0470, 0x015C, 1, 0x0000, 0), /* MX6Q_PAD_DI0_DISP_CLK__IPU2_DI0_DSP_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_DISP_CLK, 0x0470, 0x015C, 3, 0x0000, 0), /* MX6Q_PAD_DI0_DISP_CLK__MIPI_CR_DPY_OT28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_DISP_CLK, 0x0470, 0x015C, 4, 0x0000, 0), /* MX6Q_PAD_DI0_DISP_CLK__SDMA_DBG_CR_STA0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_DISP_CLK, 0x0470, 0x015C, 5, 0x0000, 0), /* MX6Q_PAD_DI0_DISP_CLK__GPIO_4_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_DISP_CLK, 0x0470, 0x015C, 6, 0x0000, 0), /* MX6Q_PAD_DI0_DISP_CLK__MMDC_DEBUG_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN15, 0x0474, 0x0160, 0, 0x0000, 0), /* MX6Q_PAD_DI0_PIN15__IPU1_DI0_PIN15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN15, 0x0474, 0x0160, 1, 0x0000, 0), /* MX6Q_PAD_DI0_PIN15__IPU2_DI0_PIN15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN15, 0x0474, 0x0160, 2, 0x0000, 0), /* MX6Q_PAD_DI0_PIN15__AUDMUX_AUD6_TXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN15, 0x0474, 0x0160, 3, 0x0000, 0), /* MX6Q_PAD_DI0_PIN15__MIPI_CR_DPHY_OUT_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN15, 0x0474, 0x0160, 4, 0x0000, 0), /* MX6Q_PAD_DI0_PIN15__SDMA_DBG_CORE_STA_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN15, 0x0474, 0x0160, 5, 0x0000, 0), /* MX6Q_PAD_DI0_PIN15__GPIO_4_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN15, 0x0474, 0x0160, 6, 0x0000, 0), /* MX6Q_PAD_DI0_PIN15__MMDC_MMDC_DEBUG_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN2, 0x0478, 0x0164, 0, 0x0000, 0), /* MX6Q_PAD_DI0_PIN2__IPU1_DI0_PIN2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN2, 0x0478, 0x0164, 1, 0x0000, 0), /* MX6Q_PAD_DI0_PIN2__IPU2_DI0_PIN2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN2, 0x0478, 0x0164, 2, 0x0000, 0), /* MX6Q_PAD_DI0_PIN2__AUDMUX_AUD6_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN2, 0x0478, 0x0164, 3, 0x0000, 0), /* MX6Q_PAD_DI0_PIN2__MIPI_CR_DPHY_OUT_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN2, 0x0478, 0x0164, 4, 0x0000, 0), /* MX6Q_PAD_DI0_PIN2__SDMA_DBG_CORE_STA_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN2, 0x0478, 0x0164, 5, 0x0000, 0), /* MX6Q_PAD_DI0_PIN2__GPIO_4_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN2, 0x0478, 0x0164, 6, 0x0000, 0), /* MX6Q_PAD_DI0_PIN2__MMDC_DEBUG_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN2, 0x0478, 0x0164, 7, 0x0000, 0), /* MX6Q_PAD_DI0_PIN2__PL301_PER1_HADDR_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN3, 0x047C, 0x0168, 0, 0x0000, 0), /* MX6Q_PAD_DI0_PIN3__IPU1_DI0_PIN3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN3, 0x047C, 0x0168, 1, 0x0000, 0), /* MX6Q_PAD_DI0_PIN3__IPU2_DI0_PIN3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN3, 0x047C, 0x0168, 2, 0x0000, 0), /* MX6Q_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN3, 0x047C, 0x0168, 3, 0x0000, 0), /* MX6Q_PAD_DI0_PIN3__MIPI_CORE_DPHY_OUT31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN3, 0x047C, 0x0168, 4, 0x0000, 0), /* MX6Q_PAD_DI0_PIN3__SDMA_DBG_CORE_STA_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN3, 0x047C, 0x0168, 5, 0x0000, 0), /* MX6Q_PAD_DI0_PIN3__GPIO_4_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN3, 0x047C, 0x0168, 6, 0x0000, 0), /* MX6Q_PAD_DI0_PIN3__MMDC_MMDC_DEBUG_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN3, 0x047C, 0x0168, 7, 0x0000, 0), /* MX6Q_PAD_DI0_PIN3__PL301_PER1_HADDR_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN4, 0x0480, 0x016C, 0, 0x0000, 0), /* MX6Q_PAD_DI0_PIN4__IPU1_DI0_PIN4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN4, 0x0480, 0x016C, 1, 0x0000, 0), /* MX6Q_PAD_DI0_PIN4__IPU2_DI0_PIN4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN4, 0x0480, 0x016C, 2, 0x0000, 0), /* MX6Q_PAD_DI0_PIN4__AUDMUX_AUD6_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN4, 0x0480, 0x016C, 3, 0x094C, 0), /* MX6Q_PAD_DI0_PIN4__USDHC1_WP */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN4, 0x0480, 0x016C, 4, 0x0000, 0), /* MX6Q_PAD_DI0_PIN4__SDMA_DEBUG_YIELD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN4, 0x0480, 0x016C, 5, 0x0000, 0), /* MX6Q_PAD_DI0_PIN4__GPIO_4_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN4, 0x0480, 0x016C, 6, 0x0000, 0), /* MX6Q_PAD_DI0_PIN4__MMDC_MMDC_DEBUG_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DI0_PIN4, 0x0480, 0x016C, 7, 0x0000, 0), /* MX6Q_PAD_DI0_PIN4__PL301_PER1_HADDR_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT0, 0x0484, 0x0170, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT0__IPU1_DISP0_DAT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT0, 0x0484, 0x0170, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT0__IPU2_DISP0_DAT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT0, 0x0484, 0x0170, 2, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT0__ECSPI3_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT0, 0x0484, 0x0170, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT0__USDHC1_USDHC_DBG_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT0, 0x0484, 0x0170, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT0__SDMA_DBG_CORE_RUN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT0, 0x0484, 0x0170, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT0__GPIO_4_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT0, 0x0484, 0x0170, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT0__MMDC_MMDC_DEBUG_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT1, 0x0488, 0x0174, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT1__IPU1_DISP0_DAT_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT1, 0x0488, 0x0174, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT1__IPU2_DISP0_DAT_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT1, 0x0488, 0x0174, 2, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT1__ECSPI3_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT1, 0x0488, 0x0174, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT1__USDHC1_USDHC_DBG_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT1, 0x0488, 0x0174, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT1__SDMA_DBG_EVT_CHNSL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT1, 0x0488, 0x0174, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT1__GPIO_4_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT1, 0x0488, 0x0174, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT1__MMDC_DEBUG_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT1, 0x0488, 0x0174, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT1__PL301_PER1_HADR_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT2, 0x048C, 0x0178, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT2__IPU1_DISP0_DAT_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT2, 0x048C, 0x0178, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT2__IPU2_DISP0_DAT_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT2, 0x048C, 0x0178, 2, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT2__ECSPI3_MISO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT2, 0x048C, 0x0178, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT2__USDHC1_USDHC_DBG_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT2, 0x048C, 0x0178, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT2__SDMA_DEBUG_MODE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT2, 0x048C, 0x0178, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT2__GPIO_4_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT2, 0x048C, 0x0178, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT2__MMDC_DEBUG_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT2, 0x048C, 0x0178, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT2__PL301_PER1_HADR_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT3, 0x0490, 0x017C, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT3__IPU1_DISP0_DAT_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT3, 0x0490, 0x017C, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT3__IPU2_DISP0_DAT_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT3, 0x0490, 0x017C, 2, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT3__ECSPI3_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT3, 0x0490, 0x017C, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT3__USDHC1_USDHC_DBG_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT3, 0x0490, 0x017C, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT3__SDMA_DBG_BUS_ERROR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT3, 0x0490, 0x017C, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT3__GPIO_4_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT3, 0x0490, 0x017C, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT3__MMDC_MMDC_DBG_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT3, 0x0490, 0x017C, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT3__PL301_PER1_HADR_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT4, 0x0494, 0x0180, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT4__IPU1_DISP0_DAT_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT4, 0x0494, 0x0180, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT4__IPU2_DISP0_DAT_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT4, 0x0494, 0x0180, 2, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT4__ECSPI3_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT4, 0x0494, 0x0180, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT4__USDHC1_USDHC_DBG_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT4, 0x0494, 0x0180, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT4__SDMA_DEBUG_BUS_RWB */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT4, 0x0494, 0x0180, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT4__GPIO_4_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT4, 0x0494, 0x0180, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT4__MMDC_MMDC_DEBUG_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT4, 0x0494, 0x0180, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT4__PL301_PER1_HADR_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT5, 0x0498, 0x0184, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT5__IPU1_DISP0_DAT_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT5, 0x0498, 0x0184, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT5__IPU2_DISP0_DAT_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT5, 0x0498, 0x0184, 2, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT5__ECSPI3_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT5, 0x0498, 0x0184, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT5__AUDMUX_AUD6_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT5, 0x0498, 0x0184, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT5__SDMA_DBG_MCH_DMBUS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT5, 0x0498, 0x0184, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT5__GPIO_4_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT5, 0x0498, 0x0184, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT5__MMDC_DEBUG_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT5, 0x0498, 0x0184, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT5__PL301_PER1_HADR_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT6, 0x049C, 0x0188, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT6__IPU1_DISP0_DAT_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT6, 0x049C, 0x0188, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT6__IPU2_DISP0_DAT_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT6, 0x049C, 0x0188, 2, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT6__ECSPI3_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT6, 0x049C, 0x0188, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT6__AUDMUX_AUD6_RXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT6, 0x049C, 0x0188, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT6__SDMA_DBG_RTBUF_WRT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT6, 0x049C, 0x0188, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT6__GPIO_4_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT6, 0x049C, 0x0188, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT6__MMDC_DEBUG_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT6, 0x049C, 0x0188, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT6__PL301_PER1_HADR_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT7, 0x04A0, 0x018C, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT7__IPU1_DISP0_DAT_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT7, 0x04A0, 0x018C, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT7__IPU2_DISP0_DAT_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT7, 0x04A0, 0x018C, 2, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT7__ECSPI3_RDY */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT7, 0x04A0, 0x018C, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT7__USDHC1_USDHC_DBG_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT7, 0x04A0, 0x018C, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT7__SDMA_DBG_EVT_CHN_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT7, 0x04A0, 0x018C, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT7__GPIO_4_28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT7, 0x04A0, 0x018C, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT7__MMDC_DEBUG_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT7, 0x04A0, 0x018C, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT7__PL301_PER1_HADR_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT8, 0x04A4, 0x0190, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT8__IPU1_DISP0_DAT_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT8, 0x04A4, 0x0190, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT8__IPU2_DISP0_DAT_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT8, 0x04A4, 0x0190, 2, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT8__PWM1_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT8, 0x04A4, 0x0190, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT8__WDOG1_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT8, 0x04A4, 0x0190, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT8__SDMA_DBG_EVT_CHN_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT8, 0x04A4, 0x0190, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT8__GPIO_4_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT8, 0x04A4, 0x0190, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT8__MMDC_DEBUG_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT8, 0x04A4, 0x0190, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT8__PL301_PER1_HADR_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT9, 0x04A8, 0x0194, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT9__IPU1_DISP0_DAT_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT9, 0x04A8, 0x0194, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT9__IPU2_DISP0_DAT_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT9, 0x04A8, 0x0194, 2, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT9__PWM2_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT9, 0x04A8, 0x0194, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT9__WDOG2_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT9, 0x04A8, 0x0194, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT9__SDMA_DBG_EVT_CHN_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT9, 0x04A8, 0x0194, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT9__GPIO_4_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT9, 0x04A8, 0x0194, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT9__MMDC_DEBUG_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT9, 0x04A8, 0x0194, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT9__PL301_PER1_HADR_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT10, 0x04AC, 0x0198, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT10__IPU1_DISP0_DAT_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT10, 0x04AC, 0x0198, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT10__IPU2_DISP0_DAT_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT10, 0x04AC, 0x0198, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT10__USDHC1_DBG_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT10, 0x04AC, 0x0198, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT10__SDMA_DBG_EVT_CHN3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT10, 0x04AC, 0x0198, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT10__GPIO_4_31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT10, 0x04AC, 0x0198, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT10__MMDC_DEBUG_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT10, 0x04AC, 0x0198, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT10__PL301_PER1_HADR21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT11, 0x04B0, 0x019C, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT11__IPU1_DISP0_DAT_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT11, 0x04B0, 0x019C, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT11__IPU2_DISP0_DAT_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT11, 0x04B0, 0x019C, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT11__USDHC1_USDHC_DBG7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT11, 0x04B0, 0x019C, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT11__SDMA_DBG_EVT_CHN4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT11, 0x04B0, 0x019C, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT11__GPIO_5_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT11, 0x04B0, 0x019C, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT11__MMDC_DEBUG_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT11, 0x04B0, 0x019C, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT11__PL301_PER1_HADR22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT12, 0x04B4, 0x01A0, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT12__IPU1_DISP0_DAT_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT12, 0x04B4, 0x01A0, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT12__IPU2_DISP0_DAT_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT12, 0x04B4, 0x01A0, 3, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT12__RESERVED_RESERVED */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT12, 0x04B4, 0x01A0, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT12__SDMA_DBG_EVT_CHN5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT12, 0x04B4, 0x01A0, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT12__GPIO_5_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT12, 0x04B4, 0x01A0, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT12__MMDC_DEBUG_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT12, 0x04B4, 0x01A0, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT12__PL301_PER1_HADR23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT13, 0x04B8, 0x01A4, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT13__IPU1_DISP0_DAT_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT13, 0x04B8, 0x01A4, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT13__IPU2_DISP0_DAT_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT13, 0x04B8, 0x01A4, 3, 0x07D8, 1), /* MX6Q_PAD_DISP0_DAT13__AUDMUX_AUD5_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT13, 0x04B8, 0x01A4, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT13__SDMA_DBG_EVT_CHN0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT13, 0x04B8, 0x01A4, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT13__GPIO_5_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT13, 0x04B8, 0x01A4, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT13__MMDC_DEBUG_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT13, 0x04B8, 0x01A4, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT13__PL301_PER1_HADR24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT14, 0x04BC, 0x01A8, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT14__IPU1_DISP0_DAT_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT14, 0x04BC, 0x01A8, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT14__IPU2_DISP0_DAT_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT14, 0x04BC, 0x01A8, 3, 0x07D4, 1), /* MX6Q_PAD_DISP0_DAT14__AUDMUX_AUD5_RXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT14, 0x04BC, 0x01A8, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT14__SDMA_DBG_EVT_CHN1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT14, 0x04BC, 0x01A8, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT14__GPIO_5_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT14, 0x04BC, 0x01A8, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT14__MMDC_DEBUG_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT15, 0x04C0, 0x01AC, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT15__IPU1_DISP0_DAT_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT15, 0x04C0, 0x01AC, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT15__IPU2_DISP0_DAT_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT15, 0x04C0, 0x01AC, 2, 0x0804, 1), /* MX6Q_PAD_DISP0_DAT15__ECSPI1_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT15, 0x04C0, 0x01AC, 3, 0x0820, 1), /* MX6Q_PAD_DISP0_DAT15__ECSPI2_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT15, 0x04C0, 0x01AC, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT15__SDMA_DBG_EVT_CHN2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT15, 0x04C0, 0x01AC, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT15__GPIO_5_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT15, 0x04C0, 0x01AC, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT15__MMDC_DEBUG_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT15, 0x04C0, 0x01AC, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT15__PL301_PER1_HADR25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT16, 0x04C4, 0x01B0, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT16__IPU1_DISP0_DAT_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT16, 0x04C4, 0x01B0, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT16__IPU2_DISP0_DAT_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT16, 0x04C4, 0x01B0, 2, 0x0818, 1), /* MX6Q_PAD_DISP0_DAT16__ECSPI2_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT16, 0x04C4, 0x01B0, 3, 0x07DC, 0), /* MX6Q_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT16, 0x04C4, 0x01B0, 4, 0x090C, 0), /* MX6Q_PAD_DISP0_DAT16__SDMA_EXT_EVENT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT16, 0x04C4, 0x01B0, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT16__GPIO_5_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT16, 0x04C4, 0x01B0, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT16__MMDC_DEBUG_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT16, 0x04C4, 0x01B0, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT16__PL301_PER1_HADR26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT17, 0x04C8, 0x01B4, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT17__IPU1_DISP0_DAT_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT17, 0x04C8, 0x01B4, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT17__IPU2_DISP0_DAT_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT17, 0x04C8, 0x01B4, 2, 0x0814, 1), /* MX6Q_PAD_DISP0_DAT17__ECSPI2_MISO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT17, 0x04C8, 0x01B4, 3, 0x07D0, 0), /* MX6Q_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT17, 0x04C8, 0x01B4, 4, 0x0910, 0), /* MX6Q_PAD_DISP0_DAT17__SDMA_EXT_EVENT_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT17, 0x04C8, 0x01B4, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT17__GPIO_5_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT17, 0x04C8, 0x01B4, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT17__MMDC_DEBUG_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT17, 0x04C8, 0x01B4, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT17__PL301_PER1_HADR27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT18, 0x04CC, 0x01B8, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT18__IPU1_DISP0_DAT_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT18, 0x04CC, 0x01B8, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT18__IPU2_DISP0_DAT_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT18, 0x04CC, 0x01B8, 2, 0x081C, 1), /* MX6Q_PAD_DISP0_DAT18__ECSPI2_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT18, 0x04CC, 0x01B8, 3, 0x07E0, 0), /* MX6Q_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT18, 0x04CC, 0x01B8, 4, 0x07C0, 0), /* MX6Q_PAD_DISP0_DAT18__AUDMUX_AUD4_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT18, 0x04CC, 0x01B8, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT18__GPIO_5_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT18, 0x04CC, 0x01B8, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT18__MMDC_DEBUG_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT18, 0x04CC, 0x01B8, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT18__WEIM_WEIM_CS_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT19, 0x04D0, 0x01BC, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT19__IPU1_DISP0_DAT_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT19, 0x04D0, 0x01BC, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT19__IPU2_DISP0_DAT_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT19, 0x04D0, 0x01BC, 2, 0x0810, 1), /* MX6Q_PAD_DISP0_DAT19__ECSPI2_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT19, 0x04D0, 0x01BC, 3, 0x07CC, 0), /* MX6Q_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT19, 0x04D0, 0x01BC, 4, 0x07BC, 0), /* MX6Q_PAD_DISP0_DAT19__AUDMUX_AUD4_RXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT19, 0x04D0, 0x01BC, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT19__GPIO_5_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT19, 0x04D0, 0x01BC, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT19__MMDC_DEBUG_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT19, 0x04D0, 0x01BC, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT19__WEIM_WEIM_CS_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT20, 0x04D4, 0x01C0, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT20__IPU1_DISP0_DAT_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT20, 0x04D4, 0x01C0, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT20__IPU2_DISP0_DAT_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT20, 0x04D4, 0x01C0, 2, 0x07F4, 1), /* MX6Q_PAD_DISP0_DAT20__ECSPI1_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT20, 0x04D4, 0x01C0, 3, 0x07C4, 0), /* MX6Q_PAD_DISP0_DAT20__AUDMUX_AUD4_TXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT20, 0x04D4, 0x01C0, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT20__SDMA_DBG_EVT_CHN7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT20, 0x04D4, 0x01C0, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT20__GPIO_5_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT20, 0x04D4, 0x01C0, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT20__MMDC_DEBUG_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT20, 0x04D4, 0x01C0, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT20__PL301_PER1_HADR28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT21, 0x04D8, 0x01C4, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT21__IPU1_DISP0_DAT_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT21, 0x04D8, 0x01C4, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT21__IPU2_DISP0_DAT_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT21, 0x04D8, 0x01C4, 2, 0x07FC, 1), /* MX6Q_PAD_DISP0_DAT21__ECSPI1_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT21, 0x04D8, 0x01C4, 3, 0x07B8, 1), /* MX6Q_PAD_DISP0_DAT21__AUDMUX_AUD4_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT21, 0x04D8, 0x01C4, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT21__SDMA_DBG_BUS_DEV0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT21, 0x04D8, 0x01C4, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT21__GPIO_5_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT21, 0x04D8, 0x01C4, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT21__MMDC_DEBUG_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT21, 0x04D8, 0x01C4, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT21__PL301_PER1_HADR29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT22, 0x04DC, 0x01C8, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT22__IPU1_DISP0_DAT_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT22, 0x04DC, 0x01C8, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT22__IPU2_DISP0_DAT_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT22, 0x04DC, 0x01C8, 2, 0x07F8, 1), /* MX6Q_PAD_DISP0_DAT22__ECSPI1_MISO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT22, 0x04DC, 0x01C8, 3, 0x07C8, 1), /* MX6Q_PAD_DISP0_DAT22__AUDMUX_AUD4_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT22, 0x04DC, 0x01C8, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT22__SDMA_DBG_BUS_DEV1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT22, 0x04DC, 0x01C8, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT22__GPIO_5_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT22, 0x04DC, 0x01C8, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT22__MMDC_DEBUG_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT22, 0x04DC, 0x01C8, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT22__PL301_PER1_HADR30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT23, 0x04E0, 0x01CC, 0, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT23__IPU1_DISP0_DAT_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT23, 0x04E0, 0x01CC, 1, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT23__IPU2_DISP0_DAT_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT23, 0x04E0, 0x01CC, 2, 0x0800, 1), /* MX6Q_PAD_DISP0_DAT23__ECSPI1_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT23, 0x04E0, 0x01CC, 3, 0x07B4, 1), /* MX6Q_PAD_DISP0_DAT23__AUDMUX_AUD4_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT23, 0x04E0, 0x01CC, 4, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT23__SDMA_DBG_BUS_DEV2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT23, 0x04E0, 0x01CC, 5, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT23__GPIO_5_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT23, 0x04E0, 0x01CC, 6, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT23__MMDC_DEBUG_28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DISP0_DAT23, 0x04E0, 0x01CC, 7, 0x0000, 0), /* MX6Q_PAD_DISP0_DAT23__PL301_PER1_HADR31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDIO, 0x04E4, 0x01D0, 0, 0x0000, 0), /* MX6Q_PAD_ENET_MDIO__RESERVED_RESERVED */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDIO, 0x04E4, 0x01D0, 1, 0x0840, 0), /* MX6Q_PAD_ENET_MDIO__ENET_MDIO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDIO, 0x04E4, 0x01D0, 2, 0x086C, 0), /* MX6Q_PAD_ENET_MDIO__ESAI1_SCKR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDIO, 0x04E4, 0x01D0, 3, 0x0000, 0), /* MX6Q_PAD_ENET_MDIO__SDMA_DEBUG_BUS_DEV3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDIO, 0x04E4, 0x01D0, 4, 0x0000, 0), /* MX6Q_PAD_ENET_MDIO__ENET_1588_EVT1_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDIO, 0x04E4, 0x01D0, 5, 0x0000, 0), /* MX6Q_PAD_ENET_MDIO__GPIO_1_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDIO, 0x04E4, 0x01D0, 6, 0x0000, 0), /* MX6Q_PAD_ENET_MDIO__SPDIF_PLOCK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_REF_CLK, 0x04E8, 0x01D4, 0, 0x0000, 0), /* MX6Q_PAD_ENET_REF_CLK__RESERVED_RSRVED */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_REF_CLK, 0x04E8, 0x01D4, 1, 0x0000, 0), /* MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_REF_CLK, 0x04E8, 0x01D4, 2, 0x085C, 0), /* MX6Q_PAD_ENET_REF_CLK__ESAI1_FSR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_REF_CLK, 0x04E8, 0x01D4, 3, 0x0000, 0), /* MX6Q_PAD_ENET_REF_CLK__SDMA_DBGBUS_DEV4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_REF_CLK, 0x04E8, 0x01D4, 5, 0x0000, 0), /* MX6Q_PAD_ENET_REF_CLK__GPIO_1_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_REF_CLK, 0x04E8, 0x01D4, 6, 0x0000, 0), /* MX6Q_PAD_ENET_REF_CLK__SPDIF_SRCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_REF_CLK, 0x04E8, 0x01D4, 7, 0x0000, 0), /* MX6Q_PAD_ENET_REF_CLK__USBPHY1_RX_SQH */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 1, 0x0000, 0), /* MX6Q_PAD_ENET_RX_ER__ENET_RX_ER */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 2, 0x0864, 0), /* MX6Q_PAD_ENET_RX_ER__ESAI1_HCKR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 3, 0x0914, 1), /* MX6Q_PAD_ENET_RX_ER__SPDIF_IN1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 4, 0x0000, 0), /* MX6Q_PAD_ENET_RX_ER__ENET_1588_EVT2_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 5, 0x0000, 0), /* MX6Q_PAD_ENET_RX_ER__GPIO_1_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 6, 0x0000, 0), /* MX6Q_PAD_ENET_RX_ER__PHY_TDI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 7, 0x0000, 0), /* MX6Q_PAD_ENET_RX_ER__USBPHY1_RX_HS_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_CRS_DV, 0x04F0, 0x01DC, 0, 0x0000, 0), /* MX6Q_PAD_ENET_CRS_DV__RESERVED_RSRVED */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_CRS_DV, 0x04F0, 0x01DC, 1, 0x0858, 1), /* MX6Q_PAD_ENET_CRS_DV__ENET_RX_EN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_CRS_DV, 0x04F0, 0x01DC, 2, 0x0870, 0), /* MX6Q_PAD_ENET_CRS_DV__ESAI1_SCKT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_CRS_DV, 0x04F0, 0x01DC, 3, 0x0918, 1), /* MX6Q_PAD_ENET_CRS_DV__SPDIF_EXTCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_CRS_DV, 0x04F0, 0x01DC, 5, 0x0000, 0), /* MX6Q_PAD_ENET_CRS_DV__GPIO_1_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_CRS_DV, 0x04F0, 0x01DC, 6, 0x0000, 0), /* MX6Q_PAD_ENET_CRS_DV__PHY_TDO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_CRS_DV, 0x04F0, 0x01DC, 7, 0x0000, 0), /* MX6Q_PAD_ENET_CRS_DV__USBPHY1_RX_FS_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD1, 0x04F4, 0x01E0, 0, 0x0908, 0), /* MX6Q_PAD_ENET_RXD1__MLB_MLBSIG */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD1, 0x04F4, 0x01E0, 1, 0x084C, 1), /* MX6Q_PAD_ENET_RXD1__ENET_RDATA_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD1, 0x04F4, 0x01E0, 2, 0x0860, 0), /* MX6Q_PAD_ENET_RXD1__ESAI1_FST */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD1, 0x04F4, 0x01E0, 4, 0x0000, 0), /* MX6Q_PAD_ENET_RXD1__ENET_1588_EVT3_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD1, 0x04F4, 0x01E0, 5, 0x0000, 0), /* MX6Q_PAD_ENET_RXD1__GPIO_1_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD1, 0x04F4, 0x01E0, 6, 0x0000, 0), /* MX6Q_PAD_ENET_RXD1__PHY_TCK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD1, 0x04F4, 0x01E0, 7, 0x0000, 0), /* MX6Q_PAD_ENET_RXD1__USBPHY1_RX_DISCON */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD0, 0x04F8, 0x01E4, 0, 0x0000, 0), /* MX6Q_PAD_ENET_RXD0__OSC32K_32K_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD0, 0x04F8, 0x01E4, 1, 0x0848, 1), /* MX6Q_PAD_ENET_RXD0__ENET_RDATA_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD0, 0x04F8, 0x01E4, 2, 0x0868, 0), /* MX6Q_PAD_ENET_RXD0__ESAI1_HCKT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD0, 0x04F8, 0x01E4, 3, 0x0000, 0), /* MX6Q_PAD_ENET_RXD0__SPDIF_OUT1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD0, 0x04F8, 0x01E4, 5, 0x0000, 0), /* MX6Q_PAD_ENET_RXD0__GPIO_1_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD0, 0x04F8, 0x01E4, 6, 0x0000, 0), /* MX6Q_PAD_ENET_RXD0__PHY_TMS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_RXD0, 0x04F8, 0x01E4, 7, 0x0000, 0), /* MX6Q_PAD_ENET_RXD0__USBPHY1_PLL_CK20DIV */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TX_EN, 0x04FC, 0x01E8, 0, 0x0000, 0), /* MX6Q_PAD_ENET_TX_EN__RESERVED_RSRVED */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TX_EN, 0x04FC, 0x01E8, 1, 0x0000, 0), /* MX6Q_PAD_ENET_TX_EN__ENET_TX_EN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TX_EN, 0x04FC, 0x01E8, 2, 0x0880, 0), /* MX6Q_PAD_ENET_TX_EN__ESAI1_TX3_RX2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TX_EN, 0x04FC, 0x01E8, 5, 0x0000, 0), /* MX6Q_PAD_ENET_TX_EN__GPIO_1_28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TX_EN, 0x04FC, 0x01E8, 6, 0x0000, 0), /* MX6Q_PAD_ENET_TX_EN__SATA_PHY_TDI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TX_EN, 0x04FC, 0x01E8, 7, 0x0000, 0), /* MX6Q_PAD_ENET_TX_EN__USBPHY2_RX_SQH */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD1, 0x0500, 0x01EC, 0, 0x0900, 0), /* MX6Q_PAD_ENET_TXD1__MLB_MLBCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD1, 0x0500, 0x01EC, 1, 0x0000, 0), /* MX6Q_PAD_ENET_TXD1__ENET_TDATA_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD1, 0x0500, 0x01EC, 2, 0x087C, 0), /* MX6Q_PAD_ENET_TXD1__ESAI1_TX2_RX3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD1, 0x0500, 0x01EC, 4, 0x0000, 0), /* MX6Q_PAD_ENET_TXD1__ENET_1588_EVENT0_IN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD1, 0x0500, 0x01EC, 5, 0x0000, 0), /* MX6Q_PAD_ENET_TXD1__GPIO_1_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD1, 0x0500, 0x01EC, 6, 0x0000, 0), /* MX6Q_PAD_ENET_TXD1__SATA_PHY_TDO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD1, 0x0500, 0x01EC, 7, 0x0000, 0), /* MX6Q_PAD_ENET_TXD1__USBPHY2_RX_HS_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD0, 0x0504, 0x01F0, 0, 0x0000, 0), /* MX6Q_PAD_ENET_TXD0__RESERVED_RSRVED */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD0, 0x0504, 0x01F0, 1, 0x0000, 0), /* MX6Q_PAD_ENET_TXD0__ENET_TDATA_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD0, 0x0504, 0x01F0, 2, 0x0884, 0), /* MX6Q_PAD_ENET_TXD0__ESAI1_TX4_RX1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD0, 0x0504, 0x01F0, 5, 0x0000, 0), /* MX6Q_PAD_ENET_TXD0__GPIO_1_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD0, 0x0504, 0x01F0, 6, 0x0000, 0), /* MX6Q_PAD_ENET_TXD0__SATA_PHY_TCK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_TXD0, 0x0504, 0x01F0, 7, 0x0000, 0), /* MX6Q_PAD_ENET_TXD0__USBPHY2_RX_FS_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDC, 0x0508, 0x01F4, 0, 0x0904, 0), /* MX6Q_PAD_ENET_MDC__MLB_MLBDAT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDC, 0x0508, 0x01F4, 1, 0x0000, 0), /* MX6Q_PAD_ENET_MDC__ENET_MDC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDC, 0x0508, 0x01F4, 2, 0x0888, 0), /* MX6Q_PAD_ENET_MDC__ESAI1_TX5_RX0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDC, 0x0508, 0x01F4, 4, 0x0000, 0), /* MX6Q_PAD_ENET_MDC__ENET_1588_EVENT1_IN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDC, 0x0508, 0x01F4, 5, 0x0000, 0), /* MX6Q_PAD_ENET_MDC__GPIO_1_31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDC, 0x0508, 0x01F4, 6, 0x0000, 0), /* MX6Q_PAD_ENET_MDC__SATA_PHY_TMS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_ENET_MDC, 0x0508, 0x01F4, 7, 0x0000, 0), /* MX6Q_PAD_ENET_MDC__USBPHY2_RX_DISCON */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D40, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D40__MMDC_DRAM_D_40 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D41, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D41__MMDC_DRAM_D_41 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D42, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D42__MMDC_DRAM_D_42 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D43, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D43__MMDC_DRAM_D_43 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D44, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D44__MMDC_DRAM_D_44 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D45, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D45__MMDC_DRAM_D_45 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D46, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D46__MMDC_DRAM_D_46 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D47, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D47__MMDC_DRAM_D_47 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDQS5, 0x050C, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDQS5__MMDC_DRAM_SDQS_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_DQM5, 0x0510, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_DQM5__MMDC_DRAM_DQM_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D32, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D32__MMDC_DRAM_D_32 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D33, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D33__MMDC_DRAM_D_33 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D34, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D34__MMDC_DRAM_D_34 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D35, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D35__MMDC_DRAM_D_35 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D36, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D36__MMDC_DRAM_D_36 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D37, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D37__MMDC_DRAM_D_37 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D38, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D38__MMDC_DRAM_D_38 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D39, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D39__MMDC_DRAM_D_39 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_DQM4, 0x0514, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_DQM4__MMDC_DRAM_DQM_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDQS4, 0x0518, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDQS4__MMDC_DRAM_SDQS_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D24, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D24__MMDC_DRAM_D_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D25, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D25__MMDC_DRAM_D_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D26, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D26__MMDC_DRAM_D_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D27, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D27__MMDC_DRAM_D_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D28, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D28__MMDC_DRAM_D_28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D29, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D29__MMDC_DRAM_D_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDQS3, 0x051C, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDQS3__MMDC_DRAM_SDQS_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D30, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D30__MMDC_DRAM_D_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D31, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D31__MMDC_DRAM_D_31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_DQM3, 0x0520, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_DQM3__MMDC_DRAM_DQM_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D16, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D16__MMDC_DRAM_D_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D17, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D17__MMDC_DRAM_D_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D18, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D18__MMDC_DRAM_D_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D19, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D19__MMDC_DRAM_D_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D20, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D20__MMDC_DRAM_D_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D21, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D21__MMDC_DRAM_D_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D22, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D22__MMDC_DRAM_D_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDQS2, 0x0524, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDQS2__MMDC_DRAM_SDQS_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D23, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D23__MMDC_DRAM_D_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_DQM2, 0x0528, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_DQM2__MMDC_DRAM_DQM_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A0, 0x052C, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A0__MMDC_DRAM_A_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A1, 0x0530, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A1__MMDC_DRAM_A_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A2, 0x0534, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A2__MMDC_DRAM_A_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A3, 0x0538, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A3__MMDC_DRAM_A_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A4, 0x053C, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A4__MMDC_DRAM_A_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A5, 0x0540, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A5__MMDC_DRAM_A_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A6, 0x0544, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A6__MMDC_DRAM_A_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A7, 0x0548, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A7__MMDC_DRAM_A_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A8, 0x054C, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A8__MMDC_DRAM_A_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A9, 0x0550, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A9__MMDC_DRAM_A_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A10, 0x0554, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A10__MMDC_DRAM_A_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A11, 0x0558, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A11__MMDC_DRAM_A_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A12, 0x055C, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A12__MMDC_DRAM_A_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A13, 0x0560, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A13__MMDC_DRAM_A_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A14, 0x0564, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A14__MMDC_DRAM_A_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_A15, 0x0568, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_A15__MMDC_DRAM_A_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_CAS, 0x056C, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_CAS__MMDC_DRAM_CAS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_CS0, 0x0570, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_CS0__MMDC_DRAM_CS_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_CS1, 0x0574, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_CS1__MMDC_DRAM_CS_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_RAS, 0x0578, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_RAS__MMDC_DRAM_RAS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_RESET, 0x057C, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_RESET__MMDC_DRAM_RESET */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDBA0, 0x0580, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDBA0__MMDC_DRAM_SDBA_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDBA1, 0x0584, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDBA1__MMDC_DRAM_SDBA_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDCLK_0, 0x0588, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDCLK_0__MMDC_DRAM_SDCLK0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDBA2, 0x058C, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDBA2__MMDC_DRAM_SDBA_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDCKE0, 0x0590, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDCKE0__MMDC_DRAM_SDCKE_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDCLK_1, 0x0594, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDCLK_1__MMDC_DRAM_SDCLK1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDCKE1, 0x0598, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDCKE1__MMDC_DRAM_SDCKE_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDODT0, 0x059C, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDODT0__MMDC_DRAM_ODT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDODT1, 0x05A0, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDODT1__MMDC_DRAM_ODT_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDWE, 0x05A4, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDWE__MMDC_DRAM_SDWE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D0, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D0__MMDC_DRAM_D_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D1, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D1__MMDC_DRAM_D_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D2, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D2__MMDC_DRAM_D_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D3, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D3__MMDC_DRAM_D_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D4, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D4__MMDC_DRAM_D_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D5, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D5__MMDC_DRAM_D_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDQS0, 0x05A8, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDQS0__MMDC_DRAM_SDQS_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D6, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D6__MMDC_DRAM_D_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D7, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D7__MMDC_DRAM_D_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_DQM0, 0x05AC, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_DQM0__MMDC_DRAM_DQM_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D8, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D8__MMDC_DRAM_D_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D9, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D9__MMDC_DRAM_D_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D10, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D10__MMDC_DRAM_D_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D11, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D11__MMDC_DRAM_D_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D12, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D12__MMDC_DRAM_D_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D13, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D13__MMDC_DRAM_D_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D14, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D14__MMDC_DRAM_D_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDQS1, 0x05B0, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDQS1__MMDC_DRAM_SDQS_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D15, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D15__MMDC_DRAM_D_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_DQM1, 0x05B4, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_DQM1__MMDC_DRAM_DQM_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D48, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D48__MMDC_DRAM_D_48 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D49, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D49__MMDC_DRAM_D_49 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D50, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D50__MMDC_DRAM_D_50 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D51, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D51__MMDC_DRAM_D_51 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D52, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D52__MMDC_DRAM_D_52 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D53, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D53__MMDC_DRAM_D_53 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D54, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D54__MMDC_DRAM_D_54 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D55, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D55__MMDC_DRAM_D_55 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDQS6, 0x05B8, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDQS6__MMDC_DRAM_SDQS_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_DQM6, 0x05BC, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_DQM6__MMDC_DRAM_DQM_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D56, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D56__MMDC_DRAM_D_56 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_SDQS7, 0x05C0, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_SDQS7__MMDC_DRAM_SDQS_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D57, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D57__MMDC_DRAM_D_57 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D58, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D58__MMDC_DRAM_D_58 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D59, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D59__MMDC_DRAM_D_59 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D60, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D60__MMDC_DRAM_D_60 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_DQM7, 0x05C4, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_DQM7__MMDC_DRAM_DQM_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D61, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D61__MMDC_DRAM_D_61 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D62, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D62__MMDC_DRAM_D_62 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_DRAM_D63, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_DRAM_D63__MMDC_DRAM_D_63 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL0, 0x05C8, 0x01F8, 0, 0x07F4, 2), /* MX6Q_PAD_KEY_COL0__ECSPI1_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL0, 0x05C8, 0x01F8, 1, 0x0854, 1), /* MX6Q_PAD_KEY_COL0__ENET_RDATA_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL0, 0x05C8, 0x01F8, 2, 0x07DC, 1), /* MX6Q_PAD_KEY_COL0__AUDMUX_AUD5_TXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL0, 0x05C8, 0x01F8, 3, 0x0000, 0), /* MX6Q_PAD_KEY_COL0__KPP_COL_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL0, 0x05C8, 0x01F8, 4, 0x0000, 0), /* MX6Q_PAD_KEY_COL0__UART4_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL0, 0x05C8, 0x01F8, 5, 0x0000, 0), /* MX6Q_PAD_KEY_COL0__GPIO_4_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL0, 0x05C8, 0x01F8, 6, 0x0000, 0), /* MX6Q_PAD_KEY_COL0__DCIC1_DCIC_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL0, 0x05C8, 0x01F8, 7, 0x0000, 0), /* MX6Q_PAD_KEY_COL0__SRC_ANY_PU_RST */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW0, 0x05CC, 0x01FC, 0, 0x07FC, 2), /* MX6Q_PAD_KEY_ROW0__ECSPI1_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW0, 0x05CC, 0x01FC, 1, 0x0000, 0), /* MX6Q_PAD_KEY_ROW0__ENET_TDATA_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW0, 0x05CC, 0x01FC, 2, 0x07D0, 1), /* MX6Q_PAD_KEY_ROW0__AUDMUX_AUD5_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW0, 0x05CC, 0x01FC, 3, 0x0000, 0), /* MX6Q_PAD_KEY_ROW0__KPP_ROW_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW0, 0x05CC, 0x01FC, 4, 0x0938, 1), /* MX6Q_PAD_KEY_ROW0__UART4_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW0, 0x05CC, 0x01FC, 5, 0x0000, 0), /* MX6Q_PAD_KEY_ROW0__GPIO_4_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW0, 0x05CC, 0x01FC, 6, 0x0000, 0), /* MX6Q_PAD_KEY_ROW0__DCIC2_DCIC_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW0, 0x05CC, 0x01FC, 7, 0x0000, 0), /* MX6Q_PAD_KEY_ROW0__PL301_PER1_HADR_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL1, 0x05D0, 0x0200, 0, 0x07F8, 2), /* MX6Q_PAD_KEY_COL1__ECSPI1_MISO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL1, 0x05D0, 0x0200, 1, 0x0840, 1), /* MX6Q_PAD_KEY_COL1__ENET_MDIO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL1, 0x05D0, 0x0200, 2, 0x07E0, 1), /* MX6Q_PAD_KEY_COL1__AUDMUX_AUD5_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL1, 0x05D0, 0x0200, 3, 0x0000, 0), /* MX6Q_PAD_KEY_COL1__KPP_COL_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL1, 0x05D0, 0x0200, 4, 0x0000, 0), /* MX6Q_PAD_KEY_COL1__UART5_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL1, 0x05D0, 0x0200, 5, 0x0000, 0), /* MX6Q_PAD_KEY_COL1__GPIO_4_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL1, 0x05D0, 0x0200, 6, 0x0000, 0), /* MX6Q_PAD_KEY_COL1__USDHC1_VSELECT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL1, 0x05D0, 0x0200, 7, 0x0000, 0), /* MX6Q_PAD_KEY_COL1__PL301MX_PER1_HADR_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW1, 0x05D4, 0x0204, 0, 0x0800, 2), /* MX6Q_PAD_KEY_ROW1__ECSPI1_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW1, 0x05D4, 0x0204, 1, 0x0000, 0), /* MX6Q_PAD_KEY_ROW1__ENET_COL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW1, 0x05D4, 0x0204, 2, 0x07CC, 1), /* MX6Q_PAD_KEY_ROW1__AUDMUX_AUD5_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW1, 0x05D4, 0x0204, 3, 0x0000, 0), /* MX6Q_PAD_KEY_ROW1__KPP_ROW_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW1, 0x05D4, 0x0204, 4, 0x0940, 1), /* MX6Q_PAD_KEY_ROW1__UART5_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW1, 0x05D4, 0x0204, 5, 0x0000, 0), /* MX6Q_PAD_KEY_ROW1__GPIO_4_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW1, 0x05D4, 0x0204, 6, 0x0000, 0), /* MX6Q_PAD_KEY_ROW1__USDHC2_VSELECT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW1, 0x05D4, 0x0204, 7, 0x0000, 0), /* MX6Q_PAD_KEY_ROW1__PL301_PER1_HADDR_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL2, 0x05D8, 0x0208, 0, 0x0804, 2), /* MX6Q_PAD_KEY_COL2__ECSPI1_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL2, 0x05D8, 0x0208, 1, 0x0850, 1), /* MX6Q_PAD_KEY_COL2__ENET_RDATA_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL2, 0x05D8, 0x0208, 2, 0x0000, 0), /* MX6Q_PAD_KEY_COL2__CAN1_TXCAN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL2, 0x05D8, 0x0208, 3, 0x0000, 0), /* MX6Q_PAD_KEY_COL2__KPP_COL_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL2, 0x05D8, 0x0208, 4, 0x0000, 0), /* MX6Q_PAD_KEY_COL2__ENET_MDC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL2, 0x05D8, 0x0208, 5, 0x0000, 0), /* MX6Q_PAD_KEY_COL2__GPIO_4_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL2, 0x05D8, 0x0208, 6, 0x0000, 0), /* MX6Q_PAD_KEY_COL2__USBOH3_H1_PWRCTL_WKP */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL2, 0x05D8, 0x0208, 7, 0x0000, 0), /* MX6Q_PAD_KEY_COL2__PL301_PER1_HADDR_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW2, 0x05DC, 0x020C, 0, 0x0808, 1), /* MX6Q_PAD_KEY_ROW2__ECSPI1_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW2, 0x05DC, 0x020C, 1, 0x0000, 0), /* MX6Q_PAD_KEY_ROW2__ENET_TDATA_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW2, 0x05DC, 0x020C, 2, 0x07E4, 0), /* MX6Q_PAD_KEY_ROW2__CAN1_RXCAN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW2, 0x05DC, 0x020C, 3, 0x0000, 0), /* MX6Q_PAD_KEY_ROW2__KPP_ROW_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW2, 0x05DC, 0x020C, 4, 0x0000, 0), /* MX6Q_PAD_KEY_ROW2__USDHC2_VSELECT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW2, 0x05DC, 0x020C, 5, 0x0000, 0), /* MX6Q_PAD_KEY_ROW2__GPIO_4_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW2, 0x05DC, 0x020C, 6, 0x088C, 1), /* MX6Q_PAD_KEY_ROW2__HDMI_TX_CEC_LINE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW2, 0x05DC, 0x020C, 7, 0x0000, 0), /* MX6Q_PAD_KEY_ROW2__PL301_PER1_HADR_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL3, 0x05E0, 0x0210, 0, 0x080C, 1), /* MX6Q_PAD_KEY_COL3__ECSPI1_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL3, 0x05E0, 0x0210, 1, 0x0000, 0), /* MX6Q_PAD_KEY_COL3__ENET_CRS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL3, 0x05E0, 0x0210, 2, 0x0890, 1), /* MX6Q_PAD_KEY_COL3__HDMI_TX_DDC_SCL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL3, 0x05E0, 0x0210, 3, 0x0000, 0), /* MX6Q_PAD_KEY_COL3__KPP_COL_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL3, 0x05E0, 0x0210, 4, 0x08A0, 1), /* MX6Q_PAD_KEY_COL3__I2C2_SCL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL3, 0x05E0, 0x0210, 5, 0x0000, 0), /* MX6Q_PAD_KEY_COL3__GPIO_4_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL3, 0x05E0, 0x0210, 6, 0x0914, 2), /* MX6Q_PAD_KEY_COL3__SPDIF_IN1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL3, 0x05E0, 0x0210, 7, 0x0000, 0), /* MX6Q_PAD_KEY_COL3__PL301_PER1_HADR_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW3, 0x05E4, 0x0214, 0, 0x0000, 0), /* MX6Q_PAD_KEY_ROW3__OSC32K_32K_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW3, 0x05E4, 0x0214, 1, 0x07B0, 0), /* MX6Q_PAD_KEY_ROW3__ASRC_ASRC_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW3, 0x05E4, 0x0214, 2, 0x0894, 1), /* MX6Q_PAD_KEY_ROW3__HDMI_TX_DDC_SDA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW3, 0x05E4, 0x0214, 3, 0x0000, 0), /* MX6Q_PAD_KEY_ROW3__KPP_ROW_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW3, 0x05E4, 0x0214, 4, 0x08A4, 1), /* MX6Q_PAD_KEY_ROW3__I2C2_SDA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW3, 0x05E4, 0x0214, 5, 0x0000, 0), /* MX6Q_PAD_KEY_ROW3__GPIO_4_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW3, 0x05E4, 0x0214, 6, 0x0000, 0), /* MX6Q_PAD_KEY_ROW3__USDHC1_VSELECT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW3, 0x05E4, 0x0214, 7, 0x0000, 0), /* MX6Q_PAD_KEY_ROW3__PL301_PER1_HADR_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL4, 0x05E8, 0x0218, 0, 0x0000, 0), /* MX6Q_PAD_KEY_COL4__CAN2_TXCAN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL4, 0x05E8, 0x0218, 1, 0x0000, 0), /* MX6Q_PAD_KEY_COL4__IPU1_SISG_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL4, 0x05E8, 0x0218, 2, 0x0944, 1), /* MX6Q_PAD_KEY_COL4__USBOH3_USBOTG_OC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL4, 0x05E8, 0x0218, 3, 0x0000, 0), /* MX6Q_PAD_KEY_COL4__KPP_COL_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL4, 0x05E8, 0x0218, 4, 0x093C, 0), /* MX6Q_PAD_KEY_COL4__UART5_RTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL4, 0x05E8, 0x0218, 5, 0x0000, 0), /* MX6Q_PAD_KEY_COL4__GPIO_4_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL4, 0x05E8, 0x0218, 6, 0x0000, 0), /* MX6Q_PAD_KEY_COL4__MMDC_DEBUG_49 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_COL4, 0x05E8, 0x0218, 7, 0x0000, 0), /* MX6Q_PAD_KEY_COL4__PL301_PER1_HADDR_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW4, 0x05EC, 0x021C, 0, 0x07E8, 0), /* MX6Q_PAD_KEY_ROW4__CAN2_RXCAN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW4, 0x05EC, 0x021C, 1, 0x0000, 0), /* MX6Q_PAD_KEY_ROW4__IPU1_SISG_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW4, 0x05EC, 0x021C, 2, 0x0000, 0), /* MX6Q_PAD_KEY_ROW4__USBOH3_USBOTG_PWR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW4, 0x05EC, 0x021C, 3, 0x0000, 0), /* MX6Q_PAD_KEY_ROW4__KPP_ROW_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW4, 0x05EC, 0x021C, 4, 0x093C, 1), /* MX6Q_PAD_KEY_ROW4__UART5_CTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW4, 0x05EC, 0x021C, 5, 0x0000, 0), /* MX6Q_PAD_KEY_ROW4__GPIO_4_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW4, 0x05EC, 0x021C, 6, 0x0000, 0), /* MX6Q_PAD_KEY_ROW4__MMDC_DEBUG_50 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_KEY_ROW4, 0x05EC, 0x021C, 7, 0x0000, 0), /* MX6Q_PAD_KEY_ROW4__PL301_PER1_HADR_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_0, 0x05F0, 0x0220, 0, 0x0000, 0), /* MX6Q_PAD_GPIO_0__CCM_CLKO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_0, 0x05F0, 0x0220, 2, 0x08E8, 0), /* MX6Q_PAD_GPIO_0__KPP_COL_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_0, 0x05F0, 0x0220, 3, 0x07B0, 1), /* MX6Q_PAD_GPIO_0__ASRC_ASRC_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_0, 0x05F0, 0x0220, 4, 0x0000, 0), /* MX6Q_PAD_GPIO_0__EPIT1_EPITO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_0, 0x05F0, 0x0220, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_0__GPIO_1_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_0, 0x05F0, 0x0220, 6, 0x0000, 0), /* MX6Q_PAD_GPIO_0__USBOH3_USBH1_PWR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_0, 0x05F0, 0x0220, 7, 0x0000, 0), /* MX6Q_PAD_GPIO_0__SNVS_HP_WRAP_SNVS_VIO5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 0, 0x086C, 1), /* MX6Q_PAD_GPIO_1__ESAI1_SCKR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 1, 0x0000, 0), /* MX6Q_PAD_GPIO_1__WDOG2_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 2, 0x08F4, 0), /* MX6Q_PAD_GPIO_1__KPP_ROW_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 4, 0x0000, 0), /* MX6Q_PAD_GPIO_1__PWM2_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_1__GPIO_1_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 6, 0x0000, 0), /* MX6Q_PAD_GPIO_1__USDHC1_CD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 7, 0x0000, 0), /* MX6Q_PAD_GPIO_1__SRC_TESTER_ACK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_9, 0x05F8, 0x0228, 0, 0x085C, 1), /* MX6Q_PAD_GPIO_9__ESAI1_FSR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_9, 0x05F8, 0x0228, 1, 0x0000, 0), /* MX6Q_PAD_GPIO_9__WDOG1_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_9, 0x05F8, 0x0228, 2, 0x08EC, 0), /* MX6Q_PAD_GPIO_9__KPP_COL_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_9, 0x05F8, 0x0228, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_9__CCM_REF_EN_B */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_9, 0x05F8, 0x0228, 4, 0x0000, 0), /* MX6Q_PAD_GPIO_9__PWM1_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_9, 0x05F8, 0x0228, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_9__GPIO_1_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_9, 0x05F8, 0x0228, 6, 0x094C, 1), /* MX6Q_PAD_GPIO_9__USDHC1_WP */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_9, 0x05F8, 0x0228, 7, 0x0000, 0), /* MX6Q_PAD_GPIO_9__SRC_EARLY_RST */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_3, 0x05FC, 0x022C, 0, 0x0864, 1), /* MX6Q_PAD_GPIO_3__ESAI1_HCKR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_3, 0x05FC, 0x022C, 1, 0x0000, 0), /* MX6Q_PAD_GPIO_3__OBSERVE_MUX_INT_OUT0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_3, 0x05FC, 0x022C, 2, 0x08A8, 1), /* MX6Q_PAD_GPIO_3__I2C3_SCL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_3, 0x05FC, 0x022C, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_3__ANATOP_24M_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_3, 0x05FC, 0x022C, 4, 0x0000, 0), /* MX6Q_PAD_GPIO_3__CCM_CLKO2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_3, 0x05FC, 0x022C, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_3__GPIO_1_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_3, 0x05FC, 0x022C, 6, 0x0948, 1), /* MX6Q_PAD_GPIO_3__USBOH3_USBH1_OC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_3, 0x05FC, 0x022C, 7, 0x0900, 1), /* MX6Q_PAD_GPIO_3__MLB_MLBCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_6, 0x0600, 0x0230, 0, 0x0870, 1), /* MX6Q_PAD_GPIO_6__ESAI1_SCKT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_6, 0x0600, 0x0230, 1, 0x0000, 0), /* MX6Q_PAD_GPIO_6__OBSERVE_MUX_INT_OUT1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_6, 0x0600, 0x0230, 2, 0x08AC, 1), /* MX6Q_PAD_GPIO_6__I2C3_SDA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_6, 0x0600, 0x0230, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_6__CCM_CCM_OUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_6, 0x0600, 0x0230, 4, 0x0000, 0), /* MX6Q_PAD_GPIO_6__CSU_CSU_INT_DEB */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_6, 0x0600, 0x0230, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_6__GPIO_1_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_6, 0x0600, 0x0230, 6, 0x0000, 0), /* MX6Q_PAD_GPIO_6__USDHC2_LCTL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_6, 0x0600, 0x0230, 7, 0x0908, 1), /* MX6Q_PAD_GPIO_6__MLB_MLBSIG */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_2, 0x0604, 0x0234, 0, 0x0860, 1), /* MX6Q_PAD_GPIO_2__ESAI1_FST */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_2, 0x0604, 0x0234, 1, 0x0000, 0), /* MX6Q_PAD_GPIO_2__OBSERVE_MUX_INT_OUT2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_2, 0x0604, 0x0234, 2, 0x08F8, 1), /* MX6Q_PAD_GPIO_2__KPP_ROW_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_2, 0x0604, 0x0234, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_2__CCM_CCM_OUT_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_2, 0x0604, 0x0234, 4, 0x0000, 0), /* MX6Q_PAD_GPIO_2__CSU_CSU_ALARM_AUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_2, 0x0604, 0x0234, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_2__GPIO_1_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_2, 0x0604, 0x0234, 6, 0x0000, 0), /* MX6Q_PAD_GPIO_2__USDHC2_WP */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_2, 0x0604, 0x0234, 7, 0x0904, 1), /* MX6Q_PAD_GPIO_2__MLB_MLBDAT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_4, 0x0608, 0x0238, 0, 0x0868, 1), /* MX6Q_PAD_GPIO_4__ESAI1_HCKT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_4, 0x0608, 0x0238, 1, 0x0000, 0), /* MX6Q_PAD_GPIO_4__OBSERVE_MUX_INT_OUT3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_4, 0x0608, 0x0238, 2, 0x08F0, 1), /* MX6Q_PAD_GPIO_4__KPP_COL_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_4, 0x0608, 0x0238, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_4__CCM_CCM_OUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_4, 0x0608, 0x0238, 4, 0x0000, 0), /* MX6Q_PAD_GPIO_4__CSU_CSU_ALARM_AUT_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_4, 0x0608, 0x0238, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_4__GPIO_1_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_4, 0x0608, 0x0238, 6, 0x0000, 0), /* MX6Q_PAD_GPIO_4__USDHC2_CD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_4, 0x0608, 0x0238, 7, 0x0000, 0), /* MX6Q_PAD_GPIO_4__OCOTP_CRL_WRAR_FUSE_LA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_5, 0x060C, 0x023C, 0, 0x087C, 1), /* MX6Q_PAD_GPIO_5__ESAI1_TX2_RX3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_5, 0x060C, 0x023C, 1, 0x0000, 0), /* MX6Q_PAD_GPIO_5__OBSERVE_MUX_INT_OUT4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_5, 0x060C, 0x023C, 2, 0x08FC, 1), /* MX6Q_PAD_GPIO_5__KPP_ROW_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_5, 0x060C, 0x023C, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_5__CCM_CLKO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_5, 0x060C, 0x023C, 4, 0x0000, 0), /* MX6Q_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_5, 0x060C, 0x023C, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_5__GPIO_1_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_5, 0x060C, 0x023C, 6, 0x08A8, 2), /* MX6Q_PAD_GPIO_5__I2C3_SCL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_5, 0x060C, 0x023C, 7, 0x0000, 0), /* MX6Q_PAD_GPIO_5__CHEETAH_EVENTI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_7, 0x0610, 0x0240, 0, 0x0884, 1), /* MX6Q_PAD_GPIO_7__ESAI1_TX4_RX1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_7, 0x0610, 0x0240, 1, 0x0000, 0), /* MX6Q_PAD_GPIO_7__ECSPI5_RDY */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_7, 0x0610, 0x0240, 2, 0x0000, 0), /* MX6Q_PAD_GPIO_7__EPIT1_EPITO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_7, 0x0610, 0x0240, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_7__CAN1_TXCAN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_7, 0x0610, 0x0240, 4, 0x0000, 0), /* MX6Q_PAD_GPIO_7__UART2_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_7, 0x0610, 0x0240, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_7__GPIO_1_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_7, 0x0610, 0x0240, 6, 0x0000, 0), /* MX6Q_PAD_GPIO_7__SPDIF_PLOCK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_7, 0x0610, 0x0240, 7, 0x0000, 0), /* MX6Q_PAD_GPIO_7__USBOH3_OTGUSB_HST_MODE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_8, 0x0614, 0x0244, 0, 0x0888, 1), /* MX6Q_PAD_GPIO_8__ESAI1_TX5_RX0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_8, 0x0614, 0x0244, 1, 0x0000, 0), /* MX6Q_PAD_GPIO_8__ANATOP_ANATOP_32K_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_8, 0x0614, 0x0244, 2, 0x0000, 0), /* MX6Q_PAD_GPIO_8__EPIT2_EPITO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_8, 0x0614, 0x0244, 3, 0x07E4, 1), /* MX6Q_PAD_GPIO_8__CAN1_RXCAN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_8, 0x0614, 0x0244, 4, 0x0928, 3), /* MX6Q_PAD_GPIO_8__UART2_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_8, 0x0614, 0x0244, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_8__GPIO_1_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_8, 0x0614, 0x0244, 6, 0x0000, 0), /* MX6Q_PAD_GPIO_8__SPDIF_SRCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_8, 0x0614, 0x0244, 7, 0x0000, 0), /* MX6Q_PAD_GPIO_8__USBOH3_OTG_PWRCTL_WAK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_16, 0x0618, 0x0248, 0, 0x0880, 1), /* MX6Q_PAD_GPIO_16__ESAI1_TX3_RX2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_16, 0x0618, 0x0248, 1, 0x0000, 0), /* MX6Q_PAD_GPIO_16__ENET_1588_EVENT2_IN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_16, 0x0618, 0x0248, 2, 0x083C, 1), /* MX6Q_PAD_GPIO_16__ENET_ETHERNET_REF_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_16, 0x0618, 0x0248, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_16__USDHC1_LCTL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_16, 0x0618, 0x0248, 4, 0x0914, 3), /* MX6Q_PAD_GPIO_16__SPDIF_IN1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_16, 0x0618, 0x0248, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_16__GPIO_7_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_16, 0x0618, 0x0248, 6, 0x08AC, 2), /* MX6Q_PAD_GPIO_16__I2C3_SDA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_16, 0x0618, 0x0248, 7, 0x0000, 0), /* MX6Q_PAD_GPIO_16__SJC_DE_B */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_17, 0x061C, 0x024C, 0, 0x0874, 0), /* MX6Q_PAD_GPIO_17__ESAI1_TX0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_17, 0x061C, 0x024C, 1, 0x0000, 0), /* MX6Q_PAD_GPIO_17__ENET_1588_EVENT3_IN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_17, 0x061C, 0x024C, 2, 0x07F0, 1), /* MX6Q_PAD_GPIO_17__CCM_PMIC_RDY */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_17, 0x061C, 0x024C, 3, 0x090C, 1), /* MX6Q_PAD_GPIO_17__SDMA_SDMA_EXT_EVENT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_17, 0x061C, 0x024C, 4, 0x0000, 0), /* MX6Q_PAD_GPIO_17__SPDIF_OUT1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_17, 0x061C, 0x024C, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_17__GPIO_7_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_17, 0x061C, 0x024C, 7, 0x0000, 0), /* MX6Q_PAD_GPIO_17__SJC_JTAG_ACT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_18, 0x0620, 0x0250, 0, 0x0878, 0), /* MX6Q_PAD_GPIO_18__ESAI1_TX1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_18, 0x0620, 0x0250, 1, 0x0844, 1), /* MX6Q_PAD_GPIO_18__ENET_RX_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_18, 0x0620, 0x0250, 2, 0x0000, 0), /* MX6Q_PAD_GPIO_18__USDHC3_VSELECT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_18, 0x0620, 0x0250, 3, 0x0910, 1), /* MX6Q_PAD_GPIO_18__SDMA_SDMA_EXT_EVENT_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_18, 0x0620, 0x0250, 4, 0x07B0, 2), /* MX6Q_PAD_GPIO_18__ASRC_ASRC_EXT_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_18, 0x0620, 0x0250, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_18__GPIO_7_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_18, 0x0620, 0x0250, 6, 0x0000, 0), /* MX6Q_PAD_GPIO_18__SNVS_HP_WRA_SNVS_VIO5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_18, 0x0620, 0x0250, 7, 0x0000, 0), /* MX6Q_PAD_GPIO_18__SRC_SYSTEM_RST */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_19, 0x0624, 0x0254, 0, 0x08E8, 1), /* MX6Q_PAD_GPIO_19__KPP_COL_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_19, 0x0624, 0x0254, 1, 0x0000, 0), /* MX6Q_PAD_GPIO_19__ENET_1588_EVENT0_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_19, 0x0624, 0x0254, 2, 0x0000, 0), /* MX6Q_PAD_GPIO_19__SPDIF_OUT1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_19, 0x0624, 0x0254, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_19__CCM_CLKO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_19, 0x0624, 0x0254, 4, 0x0000, 0), /* MX6Q_PAD_GPIO_19__ECSPI1_RDY */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_19, 0x0624, 0x0254, 5, 0x0000, 0), /* MX6Q_PAD_GPIO_19__GPIO_4_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_19, 0x0624, 0x0254, 6, 0x0000, 0), /* MX6Q_PAD_GPIO_19__ENET_TX_ER */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_GPIO_19, 0x0624, 0x0254, 7, 0x0000, 0), /* MX6Q_PAD_GPIO_19__SRC_INT_BOOT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_PIXCLK, 0x0628, 0x0258, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_PIXCLK, 0x0628, 0x0258, 2, 0x0000, 0), /* MX6Q_PAD_CSI0_PIXCLK__PCIE_CTRL_MUX_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_PIXCLK, 0x0628, 0x0258, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_PIXCLK__SDMA_DEBUG_PC_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_PIXCLK, 0x0628, 0x0258, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_PIXCLK__GPIO_5_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_PIXCLK, 0x0628, 0x0258, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_PIXCLK___MMDC_DEBUG_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_PIXCLK, 0x0628, 0x0258, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_PIXCLK__CHEETAH_EVENTO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_MCLK, 0x062C, 0x025C, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_MCLK, 0x062C, 0x025C, 2, 0x0000, 0), /* MX6Q_PAD_CSI0_MCLK__PCIE_CTRL_MUX_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_MCLK, 0x062C, 0x025C, 3, 0x0000, 0), /* MX6Q_PAD_CSI0_MCLK__CCM_CLKO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_MCLK, 0x062C, 0x025C, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_MCLK__SDMA_DEBUG_PC_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_MCLK, 0x062C, 0x025C, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_MCLK__GPIO_5_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_MCLK, 0x062C, 0x025C, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_MCLK__MMDC_MMDC_DEBUG_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_MCLK, 0x062C, 0x025C, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_MCLK__CHEETAH_TRCTL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DATA_EN, 0x0630, 0x0260, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DATA_EN__IPU1_CSI0_DA_EN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DATA_EN, 0x0630, 0x0260, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DATA_EN__WEIM_WEIM_D_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DATA_EN, 0x0630, 0x0260, 2, 0x0000, 0), /* MX6Q_PAD_CSI0_DATA_EN__PCIE_CTRL_MUX_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DATA_EN, 0x0630, 0x0260, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DATA_EN__SDMA_DEBUG_PC_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DATA_EN, 0x0630, 0x0260, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DATA_EN__GPIO_5_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DATA_EN, 0x0630, 0x0260, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DATA_EN__MMDC_DEBUG_31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DATA_EN, 0x0630, 0x0260, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DATA_EN__CHEETAH_TRCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_VSYNC, 0x0634, 0x0264, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_VSYNC, 0x0634, 0x0264, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_VSYNC__WEIM_WEIM_D_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_VSYNC, 0x0634, 0x0264, 2, 0x0000, 0), /* MX6Q_PAD_CSI0_VSYNC__PCIE_CTRL_MUX_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_VSYNC, 0x0634, 0x0264, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_VSYNC__SDMA_DEBUG_PC_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_VSYNC, 0x0634, 0x0264, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_VSYNC__GPIO_5_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_VSYNC, 0x0634, 0x0264, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_VSYNC__MMDC_DEBUG_32 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_VSYNC, 0x0634, 0x0264, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_VSYNC__CHEETAH_TRACE_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT4, 0x0638, 0x0268, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT4__IPU1_CSI0_D_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT4, 0x0638, 0x0268, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT4__WEIM_WEIM_D_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT4, 0x0638, 0x0268, 2, 0x07F4, 3), /* MX6Q_PAD_CSI0_DAT4__ECSPI1_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT4, 0x0638, 0x0268, 3, 0x08E8, 2), /* MX6Q_PAD_CSI0_DAT4__KPP_COL_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT4, 0x0638, 0x0268, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT4, 0x0638, 0x0268, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT4__GPIO_5_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT4, 0x0638, 0x0268, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT4__MMDC_DEBUG_43 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT4, 0x0638, 0x0268, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT4__CHEETAH_TRACE_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT5, 0x063C, 0x026C, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT5__IPU1_CSI0_D_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT5, 0x063C, 0x026C, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT5__WEIM_WEIM_D_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT5, 0x063C, 0x026C, 2, 0x07FC, 3), /* MX6Q_PAD_CSI0_DAT5__ECSPI1_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT5, 0x063C, 0x026C, 3, 0x08F4, 1), /* MX6Q_PAD_CSI0_DAT5__KPP_ROW_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT5, 0x063C, 0x026C, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT5, 0x063C, 0x026C, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT5__GPIO_5_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT5, 0x063C, 0x026C, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT5__MMDC_MMDC_DEBUG_44 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT5, 0x063C, 0x026C, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT5__CHEETAH_TRACE_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT6, 0x0640, 0x0270, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT6__IPU1_CSI0_D_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT6, 0x0640, 0x0270, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT6__WEIM_WEIM_D_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT6, 0x0640, 0x0270, 2, 0x07F8, 3), /* MX6Q_PAD_CSI0_DAT6__ECSPI1_MISO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT6, 0x0640, 0x0270, 3, 0x08EC, 1), /* MX6Q_PAD_CSI0_DAT6__KPP_COL_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT6, 0x0640, 0x0270, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT6, 0x0640, 0x0270, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT6__GPIO_5_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT6, 0x0640, 0x0270, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT6__MMDC_MMDC_DEBUG_45 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT6, 0x0640, 0x0270, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT6__CHEETAH_TRACE_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT7, 0x0644, 0x0274, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT7__IPU1_CSI0_D_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT7, 0x0644, 0x0274, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT7__WEIM_WEIM_D_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT7, 0x0644, 0x0274, 2, 0x0800, 3), /* MX6Q_PAD_CSI0_DAT7__ECSPI1_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT7, 0x0644, 0x0274, 3, 0x08F8, 2), /* MX6Q_PAD_CSI0_DAT7__KPP_ROW_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT7, 0x0644, 0x0274, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT7, 0x0644, 0x0274, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT7__GPIO_5_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT7, 0x0644, 0x0274, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT7__MMDC_MMDC_DEBUG_46 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT7, 0x0644, 0x0274, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT7__CHEETAH_TRACE_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT8, 0x0648, 0x0278, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT8__IPU1_CSI0_D_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT8, 0x0648, 0x0278, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT8__WEIM_WEIM_D_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT8, 0x0648, 0x0278, 2, 0x0810, 2), /* MX6Q_PAD_CSI0_DAT8__ECSPI2_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT8, 0x0648, 0x0278, 3, 0x08F0, 2), /* MX6Q_PAD_CSI0_DAT8__KPP_COL_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT8, 0x0648, 0x0278, 4, 0x089C, 1), /* MX6Q_PAD_CSI0_DAT8__I2C1_SDA */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT8, 0x0648, 0x0278, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT8__GPIO_5_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT8, 0x0648, 0x0278, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT8__MMDC_MMDC_DEBUG_47 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT8, 0x0648, 0x0278, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT8__CHEETAH_TRACE_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT9, 0x064C, 0x027C, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT9__IPU1_CSI0_D_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT9, 0x064C, 0x027C, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT9__WEIM_WEIM_D_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT9, 0x064C, 0x027C, 2, 0x0818, 2), /* MX6Q_PAD_CSI0_DAT9__ECSPI2_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT9, 0x064C, 0x027C, 3, 0x08FC, 2), /* MX6Q_PAD_CSI0_DAT9__KPP_ROW_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT9, 0x064C, 0x027C, 4, 0x0898, 1), /* MX6Q_PAD_CSI0_DAT9__I2C1_SCL */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT9, 0x064C, 0x027C, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT9__GPIO_5_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT9, 0x064C, 0x027C, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT9__MMDC_MMDC_DEBUG_48 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT9, 0x064C, 0x027C, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT9__CHEETAH_TRACE_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT10, 0x0650, 0x0280, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT10__IPU1_CSI0_D_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT10, 0x0650, 0x0280, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT10__AUDMUX_AUD3_RXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT10, 0x0650, 0x0280, 2, 0x0814, 2), /* MX6Q_PAD_CSI0_DAT10__ECSPI2_MISO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT10, 0x0650, 0x0280, 3, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT10__UART1_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT10, 0x0650, 0x0280, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT10__SDMA_DEBUG_PC_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT10, 0x0650, 0x0280, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT10__GPIO_5_28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT10, 0x0650, 0x0280, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT10__MMDC_MMDC_DEBUG_33 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT10, 0x0650, 0x0280, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT10__CHEETAH_TRACE_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT11, 0x0654, 0x0284, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT11__IPU1_CSI0_D_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT11, 0x0654, 0x0284, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT11__AUDMUX_AUD3_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT11, 0x0654, 0x0284, 2, 0x081C, 2), /* MX6Q_PAD_CSI0_DAT11__ECSPI2_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT11, 0x0654, 0x0284, 3, 0x0920, 1), /* MX6Q_PAD_CSI0_DAT11__UART1_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT11, 0x0654, 0x0284, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT11__SDMA_DEBUG_PC_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT11, 0x0654, 0x0284, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT11__GPIO_5_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT11, 0x0654, 0x0284, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT11__MMDC_MMDC_DEBUG_34 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT11, 0x0654, 0x0284, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT11__CHEETAH_TRACE_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT12, 0x0658, 0x0288, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT12__IPU1_CSI0_D_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT12, 0x0658, 0x0288, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT12__WEIM_WEIM_D_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT12, 0x0658, 0x0288, 2, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT12__PCIE_CTRL_MUX_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT12, 0x0658, 0x0288, 3, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT12__UART4_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT12, 0x0658, 0x0288, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT12__SDMA_DEBUG_PC_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT12, 0x0658, 0x0288, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT12__GPIO_5_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT12, 0x0658, 0x0288, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT12__MMDC_MMDC_DEBUG_35 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT12, 0x0658, 0x0288, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT12__CHEETAH_TRACE_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT13, 0x065C, 0x028C, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT13__IPU1_CSI0_D_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT13, 0x065C, 0x028C, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT13__WEIM_WEIM_D_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT13, 0x065C, 0x028C, 2, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT13__PCIE_CTRL_MUX_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT13, 0x065C, 0x028C, 3, 0x0938, 3), /* MX6Q_PAD_CSI0_DAT13__UART4_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT13, 0x065C, 0x028C, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT13__SDMA_DEBUG_PC_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT13, 0x065C, 0x028C, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT13__GPIO_5_31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT13, 0x065C, 0x028C, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT13__MMDC_MMDC_DEBUG_36 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT13, 0x065C, 0x028C, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT13__CHEETAH_TRACE_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT14, 0x0660, 0x0290, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT14__IPU1_CSI0_D_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT14, 0x0660, 0x0290, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT14__WEIM_WEIM_D_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT14, 0x0660, 0x0290, 2, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT14__PCIE_CTRL_MUX_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT14, 0x0660, 0x0290, 3, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT14__UART5_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT14, 0x0660, 0x0290, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT14__SDMA_DEBUG_PC_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT14, 0x0660, 0x0290, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT14__GPIO_6_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT14, 0x0660, 0x0290, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT14__MMDC_MMDC_DEBUG_37 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT14, 0x0660, 0x0290, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT14__CHEETAH_TRACE_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT15, 0x0664, 0x0294, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT15__IPU1_CSI0_D_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT15, 0x0664, 0x0294, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT15__WEIM_WEIM_D_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT15, 0x0664, 0x0294, 2, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT15__PCIE_CTRL_MUX_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT15, 0x0664, 0x0294, 3, 0x0940, 3), /* MX6Q_PAD_CSI0_DAT15__UART5_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT15, 0x0664, 0x0294, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT15__SDMA_DEBUG_PC_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT15, 0x0664, 0x0294, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT15__GPIO_6_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT15, 0x0664, 0x0294, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT15__MMDC_MMDC_DEBUG_38 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT15, 0x0664, 0x0294, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT15__CHEETAH_TRACE_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT16, 0x0668, 0x0298, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT16__IPU1_CSI0_D_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT16, 0x0668, 0x0298, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT16__WEIM_WEIM_D_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT16, 0x0668, 0x0298, 2, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT16__PCIE_CTRL_MUX_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT16, 0x0668, 0x0298, 3, 0x0934, 0), /* MX6Q_PAD_CSI0_DAT16__UART4_RTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT16, 0x0668, 0x0298, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT16__SDMA_DEBUG_PC_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT16, 0x0668, 0x0298, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT16__GPIO_6_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT16, 0x0668, 0x0298, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT16__MMDC_MMDC_DEBUG_39 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT16, 0x0668, 0x0298, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT16__CHEETAH_TRACE_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT17, 0x066C, 0x029C, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT17__IPU1_CSI0_D_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT17, 0x066C, 0x029C, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT17__WEIM_WEIM_D_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT17, 0x066C, 0x029C, 2, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT17__PCIE_CTRL_MUX_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT17, 0x066C, 0x029C, 3, 0x0934, 1), /* MX6Q_PAD_CSI0_DAT17__UART4_CTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT17, 0x066C, 0x029C, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT17__SDMA_DEBUG_PC_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT17, 0x066C, 0x029C, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT17__GPIO_6_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT17, 0x066C, 0x029C, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT17__MMDC_MMDC_DEBUG_40 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT17, 0x066C, 0x029C, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT17__CHEETAH_TRACE_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT18, 0x0670, 0x02A0, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT18__IPU1_CSI0_D_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT18, 0x0670, 0x02A0, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT18__WEIM_WEIM_D_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT18, 0x0670, 0x02A0, 2, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT18__PCIE_CTRL_MUX_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT18, 0x0670, 0x02A0, 3, 0x093C, 2), /* MX6Q_PAD_CSI0_DAT18__UART5_RTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT18, 0x0670, 0x02A0, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT18__SDMA_DEBUG_PC_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT18, 0x0670, 0x02A0, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT18__GPIO_6_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT18, 0x0670, 0x02A0, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT18__MMDC_MMDC_DEBUG_41 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT18, 0x0670, 0x02A0, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT18__CHEETAH_TRACE_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT19, 0x0674, 0x02A4, 0, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT19__IPU1_CSI0_D_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT19, 0x0674, 0x02A4, 1, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT19__WEIM_WEIM_D_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT19, 0x0674, 0x02A4, 2, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT19__PCIE_CTRL_MUX_23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT19, 0x0674, 0x02A4, 3, 0x093C, 3), /* MX6Q_PAD_CSI0_DAT19__UART5_CTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT19, 0x0674, 0x02A4, 4, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT19__SDMA_DEBUG_PC_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT19, 0x0674, 0x02A4, 5, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT19__GPIO_6_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT19, 0x0674, 0x02A4, 6, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT19__MMDC_MMDC_DEBUG_42 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_CSI0_DAT19, 0x0674, 0x02A4, 7, 0x0000, 0), /* MX6Q_PAD_CSI0_DAT19__ANATOP_TESTO_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_JTAG_TMS, 0x0678, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_JTAG_TMS__SJC_TMS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_JTAG_MOD, 0x067C, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_JTAG_MOD__SJC_MOD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_JTAG_TRSTB, 0x0680, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_JTAG_TRSTB__SJC_TRSTB */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_JTAG_TDI, 0x0684, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_JTAG_TDI__SJC_TDI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_JTAG_TCK, 0x0688, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_JTAG_TCK__SJC_TCK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_JTAG_TDO, 0x068C, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_JTAG_TDO__SJC_TDO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_LVDS1_TX3_P, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_LVDS1_TX2_P, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_LVDS1_CLK_P, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_LVDS1_TX1_P, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_LVDS1_TX0_P, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_LVDS0_TX3_P, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_LVDS0_CLK_P, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_LVDS0_TX2_P, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_LVDS0_TX1_P, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_LVDS0_TX0_P, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_TAMPER, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_TAMPER__SNVS_LP_WRAP_SNVS_TD1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_PMIC_ON_REQ, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_PMIC_ON_REQ__SNVS_LPWRAP_WKALM */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_PMIC_STBY_REQ, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_PMIC_STBY_REQ__CCM_PMIC_STBYRQ */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_POR_B, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_POR_B__SRC_POR_B */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_BOOT_MODE1, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_BOOT_MODE1__SRC_BOOT_MODE_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_RESET_IN_B, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_RESET_IN_B__SRC_RESET_B */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_BOOT_MODE0, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_BOOT_MODE0__SRC_BOOT_MODE_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_TEST_MODE, NO_PAD, NO_MUX, 0, 0x0000, 0), /* MX6Q_PAD_TEST_MODE__TCU_TEST_MODE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT7, 0x0690, 0x02A8, 0, 0x0000, 0), /* MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT7, 0x0690, 0x02A8, 1, 0x0000, 0), /* MX6Q_PAD_SD3_DAT7__UART1_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT7, 0x0690, 0x02A8, 2, 0x0000, 0), /* MX6Q_PAD_SD3_DAT7__PCIE_CTRL_MUX_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT7, 0x0690, 0x02A8, 3, 0x0000, 0), /* MX6Q_PAD_SD3_DAT7__USBOH3_UH3_DFD_OUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT7, 0x0690, 0x02A8, 4, 0x0000, 0), /* MX6Q_PAD_SD3_DAT7__USBOH3_UH2_DFD_OUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT7, 0x0690, 0x02A8, 5, 0x0000, 0), /* MX6Q_PAD_SD3_DAT7__GPIO_6_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT7, 0x0690, 0x02A8, 6, 0x0000, 0), /* MX6Q_PAD_SD3_DAT7__MIPI_CORE_DPHY_IN_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT7, 0x0690, 0x02A8, 7, 0x0000, 0), /* MX6Q_PAD_SD3_DAT7__USBPHY2_CLK20DIV */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT6, 0x0694, 0x02AC, 0, 0x0000, 0), /* MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT6, 0x0694, 0x02AC, 1, 0x0920, 3), /* MX6Q_PAD_SD3_DAT6__UART1_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT6, 0x0694, 0x02AC, 2, 0x0000, 0), /* MX6Q_PAD_SD3_DAT6__PCIE_CTRL_MUX_25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT6, 0x0694, 0x02AC, 3, 0x0000, 0), /* MX6Q_PAD_SD3_DAT6__USBOH3_UH3_DFD_OUT_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT6, 0x0694, 0x02AC, 4, 0x0000, 0), /* MX6Q_PAD_SD3_DAT6__USBOH3_UH2_DFD_OUT_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT6, 0x0694, 0x02AC, 5, 0x0000, 0), /* MX6Q_PAD_SD3_DAT6__GPIO_6_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT6, 0x0694, 0x02AC, 6, 0x0000, 0), /* MX6Q_PAD_SD3_DAT6__MIPI_CORE_DPHY_IN_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT6, 0x0694, 0x02AC, 7, 0x0000, 0), /* MX6Q_PAD_SD3_DAT6__ANATOP_TESTO_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT5, 0x0698, 0x02B0, 0, 0x0000, 0), /* MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT5, 0x0698, 0x02B0, 1, 0x0000, 0), /* MX6Q_PAD_SD3_DAT5__UART2_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT5, 0x0698, 0x02B0, 2, 0x0000, 0), /* MX6Q_PAD_SD3_DAT5__PCIE_CTRL_MUX_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT5, 0x0698, 0x02B0, 3, 0x0000, 0), /* MX6Q_PAD_SD3_DAT5__USBOH3_UH3_DFD_OUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT5, 0x0698, 0x02B0, 4, 0x0000, 0), /* MX6Q_PAD_SD3_DAT5__USBOH3_UH2_DFD_OUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT5, 0x0698, 0x02B0, 5, 0x0000, 0), /* MX6Q_PAD_SD3_DAT5__GPIO_7_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT5, 0x0698, 0x02B0, 6, 0x0000, 0), /* MX6Q_PAD_SD3_DAT5__MIPI_CORE_DPHY_IN_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT5, 0x0698, 0x02B0, 7, 0x0000, 0), /* MX6Q_PAD_SD3_DAT5__ANATOP_TESTO_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT4, 0x069C, 0x02B4, 0, 0x0000, 0), /* MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT4, 0x069C, 0x02B4, 1, 0x0928, 5), /* MX6Q_PAD_SD3_DAT4__UART2_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT4, 0x069C, 0x02B4, 2, 0x0000, 0), /* MX6Q_PAD_SD3_DAT4__PCIE_CTRL_MUX_27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT4, 0x069C, 0x02B4, 3, 0x0000, 0), /* MX6Q_PAD_SD3_DAT4__USBOH3_UH3_DFD_OUT_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT4, 0x069C, 0x02B4, 4, 0x0000, 0), /* MX6Q_PAD_SD3_DAT4__USBOH3_UH2_DFD_OUT_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT4, 0x069C, 0x02B4, 5, 0x0000, 0), /* MX6Q_PAD_SD3_DAT4__GPIO_7_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT4, 0x069C, 0x02B4, 6, 0x0000, 0), /* MX6Q_PAD_SD3_DAT4__MIPI_CORE_DPHY_IN_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT4, 0x069C, 0x02B4, 7, 0x0000, 0), /* MX6Q_PAD_SD3_DAT4__ANATOP_TESTO_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CMD, 0x06A0, 0x02B8, 0, 0x0000, 0), /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CMD, 0x06A0, 0x02B8, 1, 0x0924, 2), /* MX6Q_PAD_SD3_CMD__UART2_CTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CMD, 0x06A0, 0x02B8, 2, 0x0000, 0), /* MX6Q_PAD_SD3_CMD__CAN1_TXCAN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CMD, 0x06A0, 0x02B8, 3, 0x0000, 0), /* MX6Q_PAD_SD3_CMD__USBOH3_UH3_DFD_OUT_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CMD, 0x06A0, 0x02B8, 4, 0x0000, 0), /* MX6Q_PAD_SD3_CMD__USBOH3_UH2_DFD_OUT_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CMD, 0x06A0, 0x02B8, 5, 0x0000, 0), /* MX6Q_PAD_SD3_CMD__GPIO_7_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CMD, 0x06A0, 0x02B8, 6, 0x0000, 0), /* MX6Q_PAD_SD3_CMD__MIPI_CORE_DPHY_IN_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CMD, 0x06A0, 0x02B8, 7, 0x0000, 0), /* MX6Q_PAD_SD3_CMD__ANATOP_TESTO_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CLK, 0x06A4, 0x02BC, 0, 0x0000, 0), /* MX6Q_PAD_SD3_CLK__USDHC3_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CLK, 0x06A4, 0x02BC, 1, 0x0924, 3), /* MX6Q_PAD_SD3_CLK__UART2_RTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CLK, 0x06A4, 0x02BC, 2, 0x07E4, 2), /* MX6Q_PAD_SD3_CLK__CAN1_RXCAN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CLK, 0x06A4, 0x02BC, 3, 0x0000, 0), /* MX6Q_PAD_SD3_CLK__USBOH3_UH3_DFD_OUT_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CLK, 0x06A4, 0x02BC, 4, 0x0000, 0), /* MX6Q_PAD_SD3_CLK__USBOH3_UH2_DFD_OUT_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CLK, 0x06A4, 0x02BC, 5, 0x0000, 0), /* MX6Q_PAD_SD3_CLK__GPIO_7_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CLK, 0x06A4, 0x02BC, 6, 0x0000, 0), /* MX6Q_PAD_SD3_CLK__MIPI_CORE_DPHY_IN_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_CLK, 0x06A4, 0x02BC, 7, 0x0000, 0), /* MX6Q_PAD_SD3_CLK__ANATOP_TESTO_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT0, 0x06A8, 0x02C0, 0, 0x0000, 0), /* MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT0, 0x06A8, 0x02C0, 1, 0x091C, 2), /* MX6Q_PAD_SD3_DAT0__UART1_CTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT0, 0x06A8, 0x02C0, 2, 0x0000, 0), /* MX6Q_PAD_SD3_DAT0__CAN2_TXCAN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT0, 0x06A8, 0x02C0, 3, 0x0000, 0), /* MX6Q_PAD_SD3_DAT0__USBOH3_UH3_DFD_OUT_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT0, 0x06A8, 0x02C0, 4, 0x0000, 0), /* MX6Q_PAD_SD3_DAT0__USBOH3_UH2_DFD_OUT_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT0, 0x06A8, 0x02C0, 5, 0x0000, 0), /* MX6Q_PAD_SD3_DAT0__GPIO_7_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT0, 0x06A8, 0x02C0, 6, 0x0000, 0), /* MX6Q_PAD_SD3_DAT0__MIPI_CORE_DPHY_IN_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT0, 0x06A8, 0x02C0, 7, 0x0000, 0), /* MX6Q_PAD_SD3_DAT0__ANATOP_TESTO_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT1, 0x06AC, 0x02C4, 0, 0x0000, 0), /* MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT1, 0x06AC, 0x02C4, 1, 0x091C, 3), /* MX6Q_PAD_SD3_DAT1__UART1_RTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT1, 0x06AC, 0x02C4, 2, 0x07E8, 1), /* MX6Q_PAD_SD3_DAT1__CAN2_RXCAN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT1, 0x06AC, 0x02C4, 3, 0x0000, 0), /* MX6Q_PAD_SD3_DAT1__USBOH3_UH3_DFD_OUT_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT1, 0x06AC, 0x02C4, 4, 0x0000, 0), /* MX6Q_PAD_SD3_DAT1__USBOH3_UH2_DFD_OUT_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT1, 0x06AC, 0x02C4, 5, 0x0000, 0), /* MX6Q_PAD_SD3_DAT1__GPIO_7_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT1, 0x06AC, 0x02C4, 6, 0x0000, 0), /* MX6Q_PAD_SD3_DAT1__MIPI_CORE_DPHY_IN_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT1, 0x06AC, 0x02C4, 7, 0x0000, 0), /* MX6Q_PAD_SD3_DAT1__ANATOP_TESTI_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT2, 0x06B0, 0x02C8, 0, 0x0000, 0), /* MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT2, 0x06B0, 0x02C8, 2, 0x0000, 0), /* MX6Q_PAD_SD3_DAT2__PCIE_CTRL_MUX_28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT2, 0x06B0, 0x02C8, 3, 0x0000, 0), /* MX6Q_PAD_SD3_DAT2__USBOH3_UH3_DFD_OUT_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT2, 0x06B0, 0x02C8, 4, 0x0000, 0), /* MX6Q_PAD_SD3_DAT2__USBOH3_UH2_DFD_OUT_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT2, 0x06B0, 0x02C8, 5, 0x0000, 0), /* MX6Q_PAD_SD3_DAT2__GPIO_7_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT2, 0x06B0, 0x02C8, 6, 0x0000, 0), /* MX6Q_PAD_SD3_DAT2__MIPI_CORE_DPHY_IN_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT2, 0x06B0, 0x02C8, 7, 0x0000, 0), /* MX6Q_PAD_SD3_DAT2__ANATOP_TESTI_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT3, 0x06B4, 0x02CC, 0, 0x0000, 0), /* MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT3, 0x06B4, 0x02CC, 1, 0x092C, 4), /* MX6Q_PAD_SD3_DAT3__UART3_CTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT3, 0x06B4, 0x02CC, 2, 0x0000, 0), /* MX6Q_PAD_SD3_DAT3__PCIE_CTRL_MUX_29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT3, 0x06B4, 0x02CC, 3, 0x0000, 0), /* MX6Q_PAD_SD3_DAT3__USBOH3_UH3_DFD_OUT_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT3, 0x06B4, 0x02CC, 4, 0x0000, 0), /* MX6Q_PAD_SD3_DAT3__USBOH3_UH2_DFD_OUT_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT3, 0x06B4, 0x02CC, 5, 0x0000, 0), /* MX6Q_PAD_SD3_DAT3__GPIO_7_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT3, 0x06B4, 0x02CC, 6, 0x0000, 0), /* MX6Q_PAD_SD3_DAT3__MIPI_CORE_DPHY_IN_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_DAT3, 0x06B4, 0x02CC, 7, 0x0000, 0), /* MX6Q_PAD_SD3_DAT3__ANATOP_TESTI_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_RST, 0x06B8, 0x02D0, 0, 0x0000, 0), /* MX6Q_PAD_SD3_RST__USDHC3_RST */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_RST, 0x06B8, 0x02D0, 1, 0x092C, 5), /* MX6Q_PAD_SD3_RST__UART3_RTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_RST, 0x06B8, 0x02D0, 2, 0x0000, 0), /* MX6Q_PAD_SD3_RST__PCIE_CTRL_MUX_30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_RST, 0x06B8, 0x02D0, 3, 0x0000, 0), /* MX6Q_PAD_SD3_RST__USBOH3_UH3_DFD_OUT_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_RST, 0x06B8, 0x02D0, 4, 0x0000, 0), /* MX6Q_PAD_SD3_RST__USBOH3_UH2_DFD_OUT_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_RST, 0x06B8, 0x02D0, 5, 0x0000, 0), /* MX6Q_PAD_SD3_RST__GPIO_7_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_RST, 0x06B8, 0x02D0, 6, 0x0000, 0), /* MX6Q_PAD_SD3_RST__MIPI_CORE_DPHY_IN_22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD3_RST, 0x06B8, 0x02D0, 7, 0x0000, 0), /* MX6Q_PAD_SD3_RST__ANATOP_ANATOP_TESTI_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CLE, 0x06BC, 0x02D4, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_CLE__RAWNAND_CLE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CLE, 0x06BC, 0x02D4, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_CLE__IPU2_SISG_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CLE, 0x06BC, 0x02D4, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_CLE__PCIE_CTRL_MUX_31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CLE, 0x06BC, 0x02D4, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_CLE__USBOH3_UH3_DFD_OT11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CLE, 0x06BC, 0x02D4, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_CLE__USBOH3_UH2_DFD_OT11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CLE, 0x06BC, 0x02D4, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_CLE__GPIO_6_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CLE, 0x06BC, 0x02D4, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_CLE__MIPI_CORE_DPHY_IN23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CLE, 0x06BC, 0x02D4, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_CLE__TPSMP_HTRANS_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_ALE, 0x06C0, 0x02D8, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_ALE__RAWNAND_ALE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_ALE, 0x06C0, 0x02D8, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_ALE__USDHC4_RST */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_ALE, 0x06C0, 0x02D8, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_ALE__PCIE_CTRL_MUX_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_ALE, 0x06C0, 0x02D8, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_ALE__USBOH3_UH3_DFD_OT12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_ALE, 0x06C0, 0x02D8, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_ALE__USBOH3_UH2_DFD_OT12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_ALE, 0x06C0, 0x02D8, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_ALE__GPIO_6_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_ALE, 0x06C0, 0x02D8, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_ALE__MIPI_CR_DPHY_IN_24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_ALE, 0x06C0, 0x02D8, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_ALE__TPSMP_HTRANS_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_WP_B, 0x06C4, 0x02DC, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_WP_B__RAWNAND_RESETN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_WP_B, 0x06C4, 0x02DC, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_WP_B__IPU2_SISG_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_WP_B, 0x06C4, 0x02DC, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_WP_B__PCIE_CTRL__MUX_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_WP_B, 0x06C4, 0x02DC, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_WP_B__USBOH3_UH3_DFDOT13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_WP_B, 0x06C4, 0x02DC, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_WP_B__USBOH3_UH2_DFDOT13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_WP_B, 0x06C4, 0x02DC, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_WP_B__GPIO_6_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_WP_B, 0x06C4, 0x02DC, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_WP_B__MIPI_CR_DPHY_OUT32 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_WP_B, 0x06C4, 0x02DC, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_WP_B__PL301_PER1_HSIZE_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_RB0, 0x06C8, 0x02E0, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_RB0__RAWNAND_READY0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_RB0, 0x06C8, 0x02E0, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_RB0__IPU2_DI0_PIN1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_RB0, 0x06C8, 0x02E0, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_RB0__PCIE_CTRL_MUX_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_RB0, 0x06C8, 0x02E0, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_RB0__USBOH3_UH3_DFD_OT14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_RB0, 0x06C8, 0x02E0, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_RB0__USBOH3_UH2_DFD_OT14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_RB0, 0x06C8, 0x02E0, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_RB0__GPIO_6_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_RB0, 0x06C8, 0x02E0, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_RB0__MIPI_CR_DPHY_OUT_33 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_RB0, 0x06C8, 0x02E0, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_RB0__PL301_PER1_HSIZE_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS0, 0x06CC, 0x02E4, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_CS0__RAWNAND_CE0N */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS0, 0x06CC, 0x02E4, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_CS0__USBOH3_UH3_DFD_OT15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS0, 0x06CC, 0x02E4, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_CS0__USBOH3_UH2_DFD_OT15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS0, 0x06CC, 0x02E4, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_CS0__GPIO_6_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS0, 0x06CC, 0x02E4, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_CS0__PL301_PER1_HSIZE_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS1, 0x06D0, 0x02E8, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_CS1__RAWNAND_CE1N */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS1, 0x06D0, 0x02E8, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_CS1__USDHC4_VSELECT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS1, 0x06D0, 0x02E8, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_CS1__USDHC3_VSELECT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS1, 0x06D0, 0x02E8, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_CS1__PCIE_CTRL_MUX_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS1, 0x06D0, 0x02E8, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_CS1__GPIO_6_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS1, 0x06D0, 0x02E8, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_CS1__PL301_PER1_HRDYOUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS2, 0x06D4, 0x02EC, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_CS2__RAWNAND_CE2N */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS2, 0x06D4, 0x02EC, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_CS2__IPU1_SISG_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS2, 0x06D4, 0x02EC, 2, 0x0874, 1), /* MX6Q_PAD_NANDF_CS2__ESAI1_TX0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS2, 0x06D4, 0x02EC, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_CS2__WEIM_WEIM_CRE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS2, 0x06D4, 0x02EC, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_CS2__CCM_CLKO2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS2, 0x06D4, 0x02EC, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS2, 0x06D4, 0x02EC, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_CS2__IPU2_SISG_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS3, 0x06D8, 0x02F0, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_CS3__RAWNAND_CE3N */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS3, 0x06D8, 0x02F0, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_CS3__IPU1_SISG_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS3, 0x06D8, 0x02F0, 2, 0x0878, 1), /* MX6Q_PAD_NANDF_CS3__ESAI1_TX1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS3, 0x06D8, 0x02F0, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_CS3__WEIM_WEIM_A_26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS3, 0x06D8, 0x02F0, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_CS3__PCIE_CTRL_MUX_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS3, 0x06D8, 0x02F0, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_CS3__GPIO_6_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS3, 0x06D8, 0x02F0, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_CS3__IPU2_SISG_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_CS3, 0x06D8, 0x02F0, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_CS3__TPSMP_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_CMD, 0x06DC, 0x02F4, 0, 0x0000, 0), /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_CMD, 0x06DC, 0x02F4, 1, 0x0000, 0), /* MX6Q_PAD_SD4_CMD__RAWNAND_RDN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_CMD, 0x06DC, 0x02F4, 2, 0x0000, 0), /* MX6Q_PAD_SD4_CMD__UART3_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_CMD, 0x06DC, 0x02F4, 4, 0x0000, 0), /* MX6Q_PAD_SD4_CMD__PCIE_CTRL_MUX_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_CMD, 0x06DC, 0x02F4, 5, 0x0000, 0), /* MX6Q_PAD_SD4_CMD__GPIO_7_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_CMD, 0x06DC, 0x02F4, 7, 0x0000, 0), /* MX6Q_PAD_SD4_CMD__TPSMP_HDATA_DIR */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_CLK, 0x06E0, 0x02F8, 0, 0x0000, 0), /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_CLK, 0x06E0, 0x02F8, 1, 0x0000, 0), /* MX6Q_PAD_SD4_CLK__RAWNAND_WRN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_CLK, 0x06E0, 0x02F8, 2, 0x0930, 3), /* MX6Q_PAD_SD4_CLK__UART3_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_CLK, 0x06E0, 0x02F8, 4, 0x0000, 0), /* MX6Q_PAD_SD4_CLK__PCIE_CTRL_MUX_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_CLK, 0x06E0, 0x02F8, 5, 0x0000, 0), /* MX6Q_PAD_SD4_CLK__GPIO_7_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D0, 0x06E4, 0x02FC, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_D0__RAWNAND_D0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D0, 0x06E4, 0x02FC, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_D0__USDHC1_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D0, 0x06E4, 0x02FC, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_D0__GPU3D_GPU_DBG_OUT_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D0, 0x06E4, 0x02FC, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_D0__USBOH3_UH2_DFD_OUT16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D0, 0x06E4, 0x02FC, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_D0__USBOH3_UH3_DFD_OUT16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D0, 0x06E4, 0x02FC, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D0, 0x06E4, 0x02FC, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_D0__IPU1_IPU_DIAG_BUS_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D0, 0x06E4, 0x02FC, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_D0__IPU2_IPU_DIAG_BUS_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D1, 0x06E8, 0x0300, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_D1__RAWNAND_D1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D1, 0x06E8, 0x0300, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_D1__USDHC1_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D1, 0x06E8, 0x0300, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_D1__GPU3D_GPU_DEBUG_OUT1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D1, 0x06E8, 0x0300, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_D1__USBOH3_UH2_DFD_OUT17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D1, 0x06E8, 0x0300, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_D1__USBOH3_UH3_DFD_OUT17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D1, 0x06E8, 0x0300, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D1, 0x06E8, 0x0300, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_D1__IPU1_IPU_DIAG_BUS_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D1, 0x06E8, 0x0300, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_D1__IPU2_IPU_DIAG_BUS_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D2, 0x06EC, 0x0304, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_D2__RAWNAND_D2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D2, 0x06EC, 0x0304, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_D2__USDHC1_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D2, 0x06EC, 0x0304, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_D2__GPU3D_GPU_DBG_OUT_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D2, 0x06EC, 0x0304, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_D2__USBOH3_UH2_DFD_OUT18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D2, 0x06EC, 0x0304, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_D2__USBOH3_UH3_DFD_OUT18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D2, 0x06EC, 0x0304, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D2, 0x06EC, 0x0304, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_D2__IPU1_IPU_DIAG_BUS_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D2, 0x06EC, 0x0304, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_D2__IPU2_IPU_DIAG_BUS_2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D3, 0x06F0, 0x0308, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_D3__RAWNAND_D3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D3, 0x06F0, 0x0308, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_D3__USDHC1_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D3, 0x06F0, 0x0308, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_D3__GPU3D_GPU_DBG_OUT_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D3, 0x06F0, 0x0308, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_D3__USBOH3_UH2_DFD_OUT19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D3, 0x06F0, 0x0308, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_D3__USBOH3_UH3_DFD_OUT19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D3, 0x06F0, 0x0308, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_D3__GPIO_2_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D3, 0x06F0, 0x0308, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_D3__IPU1_IPU_DIAG_BUS_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D3, 0x06F0, 0x0308, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_D3__IPU2_IPU_DIAG_BUS_3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D4, 0x06F4, 0x030C, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_D4__RAWNAND_D4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D4, 0x06F4, 0x030C, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_D4__USDHC2_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D4, 0x06F4, 0x030C, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_D4__GPU3D_GPU_DBG_OUT_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D4, 0x06F4, 0x030C, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_D4__USBOH3_UH2_DFD_OUT20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D4, 0x06F4, 0x030C, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_D4__USBOH3_UH3_DFD_OUT20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D4, 0x06F4, 0x030C, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_D4__GPIO_2_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D4, 0x06F4, 0x030C, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_D4__IPU1_IPU_DIAG_BUS_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D4, 0x06F4, 0x030C, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_D4__IPU2_IPU_DIAG_BUS_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D5, 0x06F8, 0x0310, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_D5__RAWNAND_D5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D5, 0x06F8, 0x0310, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_D5__USDHC2_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D5, 0x06F8, 0x0310, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_D5__GPU3D_GPU_DBG_OUT_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D5, 0x06F8, 0x0310, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_D5__USBOH3_UH2_DFD_OUT21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D5, 0x06F8, 0x0310, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_D5__USBOH3_UH3_DFD_OUT21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D5, 0x06F8, 0x0310, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_D5__GPIO_2_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D5, 0x06F8, 0x0310, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_D5__IPU1_IPU_DIAG_BUS_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D5, 0x06F8, 0x0310, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_D5__IPU2_IPU_DIAG_BUS_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D6, 0x06FC, 0x0314, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_D6__RAWNAND_D6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D6, 0x06FC, 0x0314, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_D6__USDHC2_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D6, 0x06FC, 0x0314, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_D6__GPU3D_GPU_DBG_OUT_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D6, 0x06FC, 0x0314, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_D6__USBOH3_UH2_DFD_OUT22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D6, 0x06FC, 0x0314, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_D6__USBOH3_UH3_DFD_OUT22 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D6, 0x06FC, 0x0314, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_D6__GPIO_2_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D6, 0x06FC, 0x0314, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_D6__IPU1_IPU_DIAG_BUS_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D6, 0x06FC, 0x0314, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_D6__IPU2_IPU_DIAG_BUS_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D7, 0x0700, 0x0318, 0, 0x0000, 0), /* MX6Q_PAD_NANDF_D7__RAWNAND_D7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D7, 0x0700, 0x0318, 1, 0x0000, 0), /* MX6Q_PAD_NANDF_D7__USDHC2_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D7, 0x0700, 0x0318, 2, 0x0000, 0), /* MX6Q_PAD_NANDF_D7__GPU3D_GPU_DBG_OUT_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D7, 0x0700, 0x0318, 3, 0x0000, 0), /* MX6Q_PAD_NANDF_D7__USBOH3_UH2_DFD_OUT23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D7, 0x0700, 0x0318, 4, 0x0000, 0), /* MX6Q_PAD_NANDF_D7__USBOH3_UH3_DFD_OUT23 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D7, 0x0700, 0x0318, 5, 0x0000, 0), /* MX6Q_PAD_NANDF_D7__GPIO_2_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D7, 0x0700, 0x0318, 6, 0x0000, 0), /* MX6Q_PAD_NANDF_D7__IPU1_IPU_DIAG_BUS_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_NANDF_D7, 0x0700, 0x0318, 7, 0x0000, 0), /* MX6Q_PAD_NANDF_D7__IPU2_IPU_DIAG_BUS_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT0, 0x0704, 0x031C, 0, 0x0000, 0), /* MX6Q_PAD_SD4_DAT0__RAWNAND_D8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT0, 0x0704, 0x031C, 1, 0x0000, 0), /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT0, 0x0704, 0x031C, 2, 0x0000, 0), /* MX6Q_PAD_SD4_DAT0__RAWNAND_DQS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT0, 0x0704, 0x031C, 3, 0x0000, 0), /* MX6Q_PAD_SD4_DAT0__USBOH3_UH2_DFD_OUT24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT0, 0x0704, 0x031C, 4, 0x0000, 0), /* MX6Q_PAD_SD4_DAT0__USBOH3_UH3_DFD_OUT24 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT0, 0x0704, 0x031C, 5, 0x0000, 0), /* MX6Q_PAD_SD4_DAT0__GPIO_2_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT0, 0x0704, 0x031C, 6, 0x0000, 0), /* MX6Q_PAD_SD4_DAT0__IPU1_IPU_DIAG_BUS_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT0, 0x0704, 0x031C, 7, 0x0000, 0), /* MX6Q_PAD_SD4_DAT0__IPU2_IPU_DIAG_BUS_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT1, 0x0708, 0x0320, 0, 0x0000, 0), /* MX6Q_PAD_SD4_DAT1__RAWNAND_D9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT1, 0x0708, 0x0320, 1, 0x0000, 0), /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT1, 0x0708, 0x0320, 2, 0x0000, 0), /* MX6Q_PAD_SD4_DAT1__PWM3_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT1, 0x0708, 0x0320, 3, 0x0000, 0), /* MX6Q_PAD_SD4_DAT1__USBOH3_UH2_DFD_OUT25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT1, 0x0708, 0x0320, 4, 0x0000, 0), /* MX6Q_PAD_SD4_DAT1__USBOH3_UH3_DFD_OUT25 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT1, 0x0708, 0x0320, 5, 0x0000, 0), /* MX6Q_PAD_SD4_DAT1__GPIO_2_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT1, 0x0708, 0x0320, 6, 0x0000, 0), /* MX6Q_PAD_SD4_DAT1__IPU1_IPU_DIAG_BUS_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT1, 0x0708, 0x0320, 7, 0x0000, 0), /* MX6Q_PAD_SD4_DAT1__IPU2_IPU_DIAG_BUS_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT2, 0x070C, 0x0324, 0, 0x0000, 0), /* MX6Q_PAD_SD4_DAT2__RAWNAND_D10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT2, 0x070C, 0x0324, 1, 0x0000, 0), /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT2, 0x070C, 0x0324, 2, 0x0000, 0), /* MX6Q_PAD_SD4_DAT2__PWM4_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT2, 0x070C, 0x0324, 3, 0x0000, 0), /* MX6Q_PAD_SD4_DAT2__USBOH3_UH2_DFD_OUT26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT2, 0x070C, 0x0324, 4, 0x0000, 0), /* MX6Q_PAD_SD4_DAT2__USBOH3_UH3_DFD_OUT26 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT2, 0x070C, 0x0324, 5, 0x0000, 0), /* MX6Q_PAD_SD4_DAT2__GPIO_2_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT2, 0x070C, 0x0324, 6, 0x0000, 0), /* MX6Q_PAD_SD4_DAT2__IPU1_IPU_DIAG_BUS_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT2, 0x070C, 0x0324, 7, 0x0000, 0), /* MX6Q_PAD_SD4_DAT2__IPU2_IPU_DIAG_BUS_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT3, 0x0710, 0x0328, 0, 0x0000, 0), /* MX6Q_PAD_SD4_DAT3__RAWNAND_D11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT3, 0x0710, 0x0328, 1, 0x0000, 0), /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT3, 0x0710, 0x0328, 3, 0x0000, 0), /* MX6Q_PAD_SD4_DAT3__USBOH3_UH2_DFD_OUT27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT3, 0x0710, 0x0328, 4, 0x0000, 0), /* MX6Q_PAD_SD4_DAT3__USBOH3_UH3_DFD_OUT27 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT3, 0x0710, 0x0328, 5, 0x0000, 0), /* MX6Q_PAD_SD4_DAT3__GPIO_2_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT3, 0x0710, 0x0328, 6, 0x0000, 0), /* MX6Q_PAD_SD4_DAT3__IPU1_IPU_DIAG_BUS_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT3, 0x0710, 0x0328, 7, 0x0000, 0), /* MX6Q_PAD_SD4_DAT3__IPU2_IPU_DIAG_BUS_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT4, 0x0714, 0x032C, 0, 0x0000, 0), /* MX6Q_PAD_SD4_DAT4__RAWNAND_D12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT4, 0x0714, 0x032C, 1, 0x0000, 0), /* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT4, 0x0714, 0x032C, 2, 0x0928, 6), /* MX6Q_PAD_SD4_DAT4__UART2_RXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT4, 0x0714, 0x032C, 3, 0x0000, 0), /* MX6Q_PAD_SD4_DAT4__USBOH3_UH2_DFD_OUT28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT4, 0x0714, 0x032C, 4, 0x0000, 0), /* MX6Q_PAD_SD4_DAT4__USBOH3_UH3_DFD_OUT28 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT4, 0x0714, 0x032C, 5, 0x0000, 0), /* MX6Q_PAD_SD4_DAT4__GPIO_2_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT4, 0x0714, 0x032C, 6, 0x0000, 0), /* MX6Q_PAD_SD4_DAT4__IPU1_IPU_DIAG_BUS_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT4, 0x0714, 0x032C, 7, 0x0000, 0), /* MX6Q_PAD_SD4_DAT4__IPU2_IPU_DIAG_BUS_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT5, 0x0718, 0x0330, 0, 0x0000, 0), /* MX6Q_PAD_SD4_DAT5__RAWNAND_D13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT5, 0x0718, 0x0330, 1, 0x0000, 0), /* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT5, 0x0718, 0x0330, 2, 0x0924, 4), /* MX6Q_PAD_SD4_DAT5__UART2_RTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT5, 0x0718, 0x0330, 3, 0x0000, 0), /* MX6Q_PAD_SD4_DAT5__USBOH3_UH2_DFD_OUT29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT5, 0x0718, 0x0330, 4, 0x0000, 0), /* MX6Q_PAD_SD4_DAT5__USBOH3_UH3_DFD_OUT29 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT5, 0x0718, 0x0330, 5, 0x0000, 0), /* MX6Q_PAD_SD4_DAT5__GPIO_2_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT5, 0x0718, 0x0330, 6, 0x0000, 0), /* MX6Q_PAD_SD4_DAT5__IPU1_IPU_DIAG_BUS_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT5, 0x0718, 0x0330, 7, 0x0000, 0), /* MX6Q_PAD_SD4_DAT5__IPU2_IPU_DIAG_BUS_13 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT6, 0x071C, 0x0334, 0, 0x0000, 0), /* MX6Q_PAD_SD4_DAT6__RAWNAND_D14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT6, 0x071C, 0x0334, 1, 0x0000, 0), /* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT6, 0x071C, 0x0334, 2, 0x0924, 5), /* MX6Q_PAD_SD4_DAT6__UART2_CTS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT6, 0x071C, 0x0334, 3, 0x0000, 0), /* MX6Q_PAD_SD4_DAT6__USBOH3_UH2_DFD_OUT30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT6, 0x071C, 0x0334, 4, 0x0000, 0), /* MX6Q_PAD_SD4_DAT6__USBOH3_UH3_DFD_OUT30 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT6, 0x071C, 0x0334, 5, 0x0000, 0), /* MX6Q_PAD_SD4_DAT6__GPIO_2_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT6, 0x071C, 0x0334, 6, 0x0000, 0), /* MX6Q_PAD_SD4_DAT6__IPU1_IPU_DIAG_BUS_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT6, 0x071C, 0x0334, 7, 0x0000, 0), /* MX6Q_PAD_SD4_DAT6__IPU2_IPU_DIAG_BUS_14 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT7, 0x0720, 0x0338, 0, 0x0000, 0), /* MX6Q_PAD_SD4_DAT7__RAWNAND_D15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT7, 0x0720, 0x0338, 1, 0x0000, 0), /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT7, 0x0720, 0x0338, 2, 0x0000, 0), /* MX6Q_PAD_SD4_DAT7__UART2_TXD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT7, 0x0720, 0x0338, 3, 0x0000, 0), /* MX6Q_PAD_SD4_DAT7__USBOH3_UH2_DFD_OUT31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT7, 0x0720, 0x0338, 4, 0x0000, 0), /* MX6Q_PAD_SD4_DAT7__USBOH3_UH3_DFD_OUT31 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT7, 0x0720, 0x0338, 5, 0x0000, 0), /* MX6Q_PAD_SD4_DAT7__GPIO_2_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT7, 0x0720, 0x0338, 6, 0x0000, 0), /* MX6Q_PAD_SD4_DAT7__IPU1_IPU_DIAG_BUS_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD4_DAT7, 0x0720, 0x0338, 7, 0x0000, 0), /* MX6Q_PAD_SD4_DAT7__IPU2_IPU_DIAG_BUS_15 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT1, 0x0724, 0x033C, 0, 0x0000, 0), /* MX6Q_PAD_SD1_DAT1__USDHC1_DAT1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT1, 0x0724, 0x033C, 1, 0x0834, 1), /* MX6Q_PAD_SD1_DAT1__ECSPI5_SS0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT1, 0x0724, 0x033C, 2, 0x0000, 0), /* MX6Q_PAD_SD1_DAT1__PWM3_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT1, 0x0724, 0x033C, 3, 0x0000, 0), /* MX6Q_PAD_SD1_DAT1__GPT_CAPIN2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT1, 0x0724, 0x033C, 4, 0x0000, 0), /* MX6Q_PAD_SD1_DAT1__PCIE_CTRL_MUX_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT1, 0x0724, 0x033C, 5, 0x0000, 0), /* MX6Q_PAD_SD1_DAT1__GPIO_1_17 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT1, 0x0724, 0x033C, 6, 0x0000, 0), /* MX6Q_PAD_SD1_DAT1__HDMI_TX_OPHYDTB_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT1, 0x0724, 0x033C, 7, 0x0000, 0), /* MX6Q_PAD_SD1_DAT1__ANATOP_TESTO_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT0, 0x0728, 0x0340, 0, 0x0000, 0), /* MX6Q_PAD_SD1_DAT0__USDHC1_DAT0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT0, 0x0728, 0x0340, 1, 0x082C, 1), /* MX6Q_PAD_SD1_DAT0__ECSPI5_MISO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT0, 0x0728, 0x0340, 2, 0x0000, 0), /* MX6Q_PAD_SD1_DAT0__CAAM_WRAP_RNG_OSCOBS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT0, 0x0728, 0x0340, 3, 0x0000, 0), /* MX6Q_PAD_SD1_DAT0__GPT_CAPIN1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT0, 0x0728, 0x0340, 4, 0x0000, 0), /* MX6Q_PAD_SD1_DAT0__PCIE_CTRL_MUX_8 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT0, 0x0728, 0x0340, 5, 0x0000, 0), /* MX6Q_PAD_SD1_DAT0__GPIO_1_16 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT0, 0x0728, 0x0340, 6, 0x0000, 0), /* MX6Q_PAD_SD1_DAT0__HDMI_TX_OPHYDTB_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT0, 0x0728, 0x0340, 7, 0x0000, 0), /* MX6Q_PAD_SD1_DAT0__ANATOP_TESTO_7 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT3, 0x072C, 0x0344, 0, 0x0000, 0), /* MX6Q_PAD_SD1_DAT3__USDHC1_DAT3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT3, 0x072C, 0x0344, 1, 0x0000, 0), /* MX6Q_PAD_SD1_DAT3__ECSPI5_SS2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT3, 0x072C, 0x0344, 2, 0x0000, 0), /* MX6Q_PAD_SD1_DAT3__GPT_CMPOUT3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT3, 0x072C, 0x0344, 3, 0x0000, 0), /* MX6Q_PAD_SD1_DAT3__PWM1_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT3, 0x072C, 0x0344, 4, 0x0000, 0), /* MX6Q_PAD_SD1_DAT3__WDOG2_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT3, 0x072C, 0x0344, 5, 0x0000, 0), /* MX6Q_PAD_SD1_DAT3__GPIO_1_21 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT3, 0x072C, 0x0344, 6, 0x0000, 0), /* MX6Q_PAD_SD1_DAT3__WDOG2_WDOG_RST_B_DEB */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT3, 0x072C, 0x0344, 7, 0x0000, 0), /* MX6Q_PAD_SD1_DAT3__ANATOP_TESTO_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CMD, 0x0730, 0x0348, 0, 0x0000, 0), /* MX6Q_PAD_SD1_CMD__USDHC1_CMD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CMD, 0x0730, 0x0348, 1, 0x0830, 0), /* MX6Q_PAD_SD1_CMD__ECSPI5_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CMD, 0x0730, 0x0348, 2, 0x0000, 0), /* MX6Q_PAD_SD1_CMD__PWM4_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CMD, 0x0730, 0x0348, 3, 0x0000, 0), /* MX6Q_PAD_SD1_CMD__GPT_CMPOUT1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CMD, 0x0730, 0x0348, 5, 0x0000, 0), /* MX6Q_PAD_SD1_CMD__GPIO_1_18 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CMD, 0x0730, 0x0348, 7, 0x0000, 0), /* MX6Q_PAD_SD1_CMD__ANATOP_TESTO_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT2, 0x0734, 0x034C, 0, 0x0000, 0), /* MX6Q_PAD_SD1_DAT2__USDHC1_DAT2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT2, 0x0734, 0x034C, 1, 0x0838, 1), /* MX6Q_PAD_SD1_DAT2__ECSPI5_SS1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT2, 0x0734, 0x034C, 2, 0x0000, 0), /* MX6Q_PAD_SD1_DAT2__GPT_CMPOUT2 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT2, 0x0734, 0x034C, 3, 0x0000, 0), /* MX6Q_PAD_SD1_DAT2__PWM2_PWMO */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT2, 0x0734, 0x034C, 4, 0x0000, 0), /* MX6Q_PAD_SD1_DAT2__WDOG1_WDOG_B */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT2, 0x0734, 0x034C, 5, 0x0000, 0), /* MX6Q_PAD_SD1_DAT2__GPIO_1_19 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT2, 0x0734, 0x034C, 6, 0x0000, 0), /* MX6Q_PAD_SD1_DAT2__WDOG1_WDOG_RST_B_DEB */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_DAT2, 0x0734, 0x034C, 7, 0x0000, 0), /* MX6Q_PAD_SD1_DAT2__ANATOP_TESTO_4 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CLK, 0x0738, 0x0350, 0, 0x0000, 0), /* MX6Q_PAD_SD1_CLK__USDHC1_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CLK, 0x0738, 0x0350, 1, 0x0828, 0), /* MX6Q_PAD_SD1_CLK__ECSPI5_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CLK, 0x0738, 0x0350, 2, 0x0000, 0), /* MX6Q_PAD_SD1_CLK__OSC32K_32K_OUT */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CLK, 0x0738, 0x0350, 3, 0x0000, 0), /* MX6Q_PAD_SD1_CLK__GPT_CLKIN */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CLK, 0x0738, 0x0350, 5, 0x0000, 0), /* MX6Q_PAD_SD1_CLK__GPIO_1_20 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CLK, 0x0738, 0x0350, 6, 0x0000, 0), /* MX6Q_PAD_SD1_CLK__PHY_DTB_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD1_CLK, 0x0738, 0x0350, 7, 0x0000, 0), /* MX6Q_PAD_SD1_CLK__SATA_PHY_DTB_0 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CLK, 0x073C, 0x0354, 0, 0x0000, 0), /* MX6Q_PAD_SD2_CLK__USDHC2_CLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CLK, 0x073C, 0x0354, 1, 0x0828, 1), /* MX6Q_PAD_SD2_CLK__ECSPI5_SCLK */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CLK, 0x073C, 0x0354, 2, 0x08E8, 3), /* MX6Q_PAD_SD2_CLK__KPP_COL_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CLK, 0x073C, 0x0354, 3, 0x07C0, 1), /* MX6Q_PAD_SD2_CLK__AUDMUX_AUD4_RXFS */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CLK, 0x073C, 0x0354, 4, 0x0000, 0), /* MX6Q_PAD_SD2_CLK__PCIE_CTRL_MUX_9 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CLK, 0x073C, 0x0354, 5, 0x0000, 0), /* MX6Q_PAD_SD2_CLK__GPIO_1_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CLK, 0x073C, 0x0354, 6, 0x0000, 0), /* MX6Q_PAD_SD2_CLK__PHY_DTB_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CLK, 0x073C, 0x0354, 7, 0x0000, 0), /* MX6Q_PAD_SD2_CLK__SATA_PHY_DTB_1 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CMD, 0x0740, 0x0358, 0, 0x0000, 0), /* MX6Q_PAD_SD2_CMD__USDHC2_CMD */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CMD, 0x0740, 0x0358, 1, 0x0830, 1), /* MX6Q_PAD_SD2_CMD__ECSPI5_MOSI */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CMD, 0x0740, 0x0358, 2, 0x08F4, 2), /* MX6Q_PAD_SD2_CMD__KPP_ROW_5 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CMD, 0x0740, 0x0358, 3, 0x07BC, 1), /* MX6Q_PAD_SD2_CMD__AUDMUX_AUD4_RXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CMD, 0x0740, 0x0358, 4, 0x0000, 0), /* MX6Q_PAD_SD2_CMD__PCIE_CTRL_MUX_10 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_CMD, 0x0740, 0x0358, 5, 0x0000, 0), /* MX6Q_PAD_SD2_CMD__GPIO_1_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 0, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__USDHC2_DAT3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 1, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__ECSPI5_SS3 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 2, 0x08EC, 2), /* MX6Q_PAD_SD2_DAT3__KPP_COL_6 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 3, 0x07C4, 1), /* MX6Q_PAD_SD2_DAT3__AUDMUX_AUD4_TXC */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 4, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__PCIE_CTRL_MUX_11 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 5, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__GPIO_1_12 */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 6, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__SJC_DONE */</div><div class='add'>+	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad names for the pinmux subsystem */</div><div class='add'>+static const struct pinctrl_pin_desc imx6q_pinctrl_pads[] = {</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TXC),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RX_CTL),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TX_CTL),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RXC),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A25),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D20),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D21),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D22),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D23),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D24),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D25),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D26),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D27),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D28),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D29),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D30),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D31),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A24),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A23),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A22),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A21),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A20),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_CS0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_CS1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_OE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_RW),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_LBA),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_WAIT),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_BCLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_DISP_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT20),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT21),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT22),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT23),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_MDIO),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_REF_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_RX_ER),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_CRS_DV),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_RXD1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_RXD0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_TX_EN),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_TXD1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_TXD0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_MDC),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D40),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D41),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D42),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D43),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D44),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D45),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D46),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D47),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDQS5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_DQM5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D32),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D33),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D34),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D35),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D36),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D37),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D38),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D39),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_DQM4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDQS4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D24),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D25),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D26),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D27),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D28),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D29),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDQS3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D30),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D31),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_DQM3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D20),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D21),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D22),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDQS2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D23),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_DQM2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_A15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_CAS),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_CS0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_CS1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_RAS),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_RESET),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDBA0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDBA1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDCLK_0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDBA2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDCKE0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDCLK_1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDCKE1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDODT0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDODT1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDWE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDQS0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_DQM0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDQS1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_DQM1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D48),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D49),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D50),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D51),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D52),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D53),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D54),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D55),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDQS6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_DQM6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D56),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_SDQS7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D57),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D58),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D59),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D60),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_DQM7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D61),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D62),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_DRAM_D63),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_PIXCLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_MCLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DATA_EN),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_VSYNC),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT8),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT9),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT10),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT11),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT12),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT13),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT14),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT15),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT16),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT17),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT18),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT19),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_JTAG_TMS),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_JTAG_MOD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_JTAG_TRSTB),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_JTAG_TDI),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_JTAG_TCK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_JTAG_TDO),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_LVDS1_TX3_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_LVDS1_TX2_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_LVDS1_CLK_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_LVDS1_TX1_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_LVDS1_TX0_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_LVDS0_TX3_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_LVDS0_CLK_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_LVDS0_TX2_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_LVDS0_TX1_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_LVDS0_TX0_P),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_TAMPER),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_PMIC_ON_REQ),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_PMIC_STBY_REQ),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_POR_B),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_BOOT_MODE1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_RESET_IN_B),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_BOOT_MODE0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_TEST_MODE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_CMD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_RST),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CLE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_ALE),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_WP_B),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_RB0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_CMD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT4),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT5),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT6),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT7),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT1),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT0),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT3),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_CMD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT2),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_CLK),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_CMD),</div><div class='add'>+	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT3),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct imx_pinctrl_soc_info imx6q_pinctrl_info = {</div><div class='add'>+	.pins = imx6q_pinctrl_pads,</div><div class='add'>+	.npins = ARRAY_SIZE(imx6q_pinctrl_pads),</div><div class='add'>+	.pin_regs = imx6q_pin_regs,</div><div class='add'>+	.npin_regs = ARRAY_SIZE(imx6q_pin_regs),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct of_device_id imx6q_pinctrl_of_match[] __devinitdata = {</div><div class='add'>+	{ .compatible = "fsl,imx6q-iomuxc", },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit imx6q_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return imx_pinctrl_probe(pdev, &amp;imx6q_pinctrl_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver imx6q_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "imx6q-pinctrl",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = of_match_ptr(imx6q_pinctrl_of_match),</div><div class='add'>+	},</div><div class='add'>+	.probe = imx6q_pinctrl_probe,</div><div class='add'>+	.remove = __devexit_p(imx_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init imx6q_pinctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;imx6q_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(imx6q_pinctrl_init);</div><div class='add'>+</div><div class='add'>+static void __exit imx6q_pinctrl_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;imx6q_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(imx6q_pinctrl_exit);</div><div class='add'>+MODULE_AUTHOR("Dong Aisheng &lt;dong.aisheng@linaro.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Freescale IMX6Q pinctrl driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-mxs.c b/drivers/pinctrl/pinctrl-mxs.c<br/>new file mode 100644<br/>index 000000000000..556e45a213eb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-mxs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-mxs.c</a></div><div class='hunk'>@@ -0,0 +1,528 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinconf.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinmux.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include "core.h"</div><div class='add'>+#include "pinctrl-mxs.h"</div><div class='add'>+</div><div class='add'>+#define SUFFIX_LEN	4</div><div class='add'>+</div><div class='add'>+struct mxs_pinctrl_data {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct pinctrl_dev *pctl;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	struct mxs_pinctrl_soc_data *soc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mxs_get_groups_count(struct pinctrl_dev *pctldev)</div><div class='add'>+{</div><div class='add'>+	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	return d-&gt;soc-&gt;ngroups;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *mxs_get_group_name(struct pinctrl_dev *pctldev,</div><div class='add'>+				      unsigned group)</div><div class='add'>+{</div><div class='add'>+	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	return d-&gt;soc-&gt;groups[group].name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mxs_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,</div><div class='add'>+			      const unsigned **pins, unsigned *num_pins)</div><div class='add'>+{</div><div class='add'>+	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	*pins = d-&gt;soc-&gt;groups[group].pins;</div><div class='add'>+	*num_pins = d-&gt;soc-&gt;groups[group].npins;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mxs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,</div><div class='add'>+			     unsigned offset)</div><div class='add'>+{</div><div class='add'>+	seq_printf(s, " %s", dev_name(pctldev-&gt;dev));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mxs_dt_node_to_map(struct pinctrl_dev *pctldev,</div><div class='add'>+			      struct device_node *np,</div><div class='add'>+			      struct pinctrl_map **map, unsigned *num_maps)</div><div class='add'>+{</div><div class='add'>+	struct pinctrl_map *new_map;</div><div class='add'>+	char *group = NULL;</div><div class='add'>+	unsigned new_num = 1;</div><div class='add'>+	unsigned long config = 0;</div><div class='add'>+	unsigned long *pconfig;</div><div class='add'>+	int length = strlen(np-&gt;name) + SUFFIX_LEN;</div><div class='add'>+	bool purecfg = false;</div><div class='add'>+	u32 val, reg;</div><div class='add'>+	int ret, i = 0;</div><div class='add'>+</div><div class='add'>+	/* Check for pin config node which has no 'reg' property */</div><div class='add'>+	if (of_property_read_u32(np, "reg", &amp;reg))</div><div class='add'>+		purecfg = true;</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(np, "fsl,drive-strength", &amp;val);</div><div class='add'>+	if (!ret)</div><div class='add'>+		config = val | MA_PRESENT;</div><div class='add'>+	ret = of_property_read_u32(np, "fsl,voltage", &amp;val);</div><div class='add'>+	if (!ret)</div><div class='add'>+		config |= val &lt;&lt; VOL_SHIFT | VOL_PRESENT;</div><div class='add'>+	ret = of_property_read_u32(np, "fsl,pull-up", &amp;val);</div><div class='add'>+	if (!ret)</div><div class='add'>+		config |= val &lt;&lt; PULL_SHIFT | PULL_PRESENT;</div><div class='add'>+</div><div class='add'>+	/* Check for group node which has both mux and config settings */</div><div class='add'>+	if (!purecfg &amp;&amp; config)</div><div class='add'>+		new_num = 2;</div><div class='add'>+</div><div class='add'>+	new_map = kzalloc(sizeof(*new_map) * new_num, GFP_KERNEL);</div><div class='add'>+	if (!new_map)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (!purecfg) {</div><div class='add'>+		new_map[i].type = PIN_MAP_TYPE_MUX_GROUP;</div><div class='add'>+		new_map[i].data.mux.function = np-&gt;name;</div><div class='add'>+</div><div class='add'>+		/* Compose group name */</div><div class='add'>+		group = kzalloc(length, GFP_KERNEL);</div><div class='add'>+		if (!group)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		snprintf(group, length, "%s.%d", np-&gt;name, reg);</div><div class='add'>+		new_map[i].data.mux.group = group;</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (config) {</div><div class='add'>+		pconfig = kmemdup(&amp;config, sizeof(config), GFP_KERNEL);</div><div class='add'>+		if (!pconfig) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto free;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		new_map[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;</div><div class='add'>+		new_map[i].data.configs.group_or_pin = purecfg ? np-&gt;name :</div><div class='add'>+								 group;</div><div class='add'>+		new_map[i].data.configs.configs = pconfig;</div><div class='add'>+		new_map[i].data.configs.num_configs = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*map = new_map;</div><div class='add'>+	*num_maps = new_num;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free:</div><div class='add'>+	kfree(new_map);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mxs_dt_free_map(struct pinctrl_dev *pctldev,</div><div class='add'>+			    struct pinctrl_map *map, unsigned num_maps)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_maps; i++) {</div><div class='add'>+		if (map[i].type == PIN_MAP_TYPE_MUX_GROUP)</div><div class='add'>+			kfree(map[i].data.mux.group);</div><div class='add'>+		if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)</div><div class='add'>+			kfree(map[i].data.configs.configs);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pinctrl_ops mxs_pinctrl_ops = {</div><div class='add'>+	.get_groups_count = mxs_get_groups_count,</div><div class='add'>+	.get_group_name = mxs_get_group_name,</div><div class='add'>+	.get_group_pins = mxs_get_group_pins,</div><div class='add'>+	.pin_dbg_show = mxs_pin_dbg_show,</div><div class='add'>+	.dt_node_to_map = mxs_dt_node_to_map,</div><div class='add'>+	.dt_free_map = mxs_dt_free_map,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mxs_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)</div><div class='add'>+{</div><div class='add'>+	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	return d-&gt;soc-&gt;nfunctions;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *mxs_pinctrl_get_func_name(struct pinctrl_dev *pctldev,</div><div class='add'>+					     unsigned function)</div><div class='add'>+{</div><div class='add'>+	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	return d-&gt;soc-&gt;functions[function].name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mxs_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,</div><div class='add'>+				       unsigned group,</div><div class='add'>+				       const char * const **groups,</div><div class='add'>+				       unsigned * const num_groups)</div><div class='add'>+{</div><div class='add'>+	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	*groups = d-&gt;soc-&gt;functions[group].groups;</div><div class='add'>+	*num_groups = d-&gt;soc-&gt;functions[group].ngroups;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mxs_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='add'>+			      unsigned group)</div><div class='add'>+{</div><div class='add'>+	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	struct mxs_group *g = &amp;d-&gt;soc-&gt;groups[group];</div><div class='add'>+	void __iomem *reg;</div><div class='add'>+	u8 bank, shift;</div><div class='add'>+	u16 pin;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; g-&gt;npins; i++) {</div><div class='add'>+		bank = PINID_TO_BANK(g-&gt;pins[i]);</div><div class='add'>+		pin = PINID_TO_PIN(g-&gt;pins[i]);</div><div class='add'>+		reg = d-&gt;base + d-&gt;soc-&gt;regs-&gt;muxsel;</div><div class='add'>+		reg += bank * 0x20 + pin / 16 * 0x10;</div><div class='add'>+		shift = pin % 16 * 2;</div><div class='add'>+</div><div class='add'>+		writel(0x3 &lt;&lt; shift, reg + CLR);</div><div class='add'>+		writel(g-&gt;muxsel[i] &lt;&lt; shift, reg + SET);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pinmux_ops mxs_pinmux_ops = {</div><div class='add'>+	.get_functions_count = mxs_pinctrl_get_funcs_count,</div><div class='add'>+	.get_function_name = mxs_pinctrl_get_func_name,</div><div class='add'>+	.get_function_groups = mxs_pinctrl_get_func_groups,</div><div class='add'>+	.enable = mxs_pinctrl_enable,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mxs_pinconf_get(struct pinctrl_dev *pctldev,</div><div class='add'>+			   unsigned pin, unsigned long *config)</div><div class='add'>+{</div><div class='add'>+	return -ENOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mxs_pinconf_set(struct pinctrl_dev *pctldev,</div><div class='add'>+			   unsigned pin, unsigned long config)</div><div class='add'>+{</div><div class='add'>+	return -ENOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mxs_pinconf_group_get(struct pinctrl_dev *pctldev,</div><div class='add'>+				 unsigned group, unsigned long *config)</div><div class='add'>+{</div><div class='add'>+	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	*config = d-&gt;soc-&gt;groups[group].config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mxs_pinconf_group_set(struct pinctrl_dev *pctldev,</div><div class='add'>+				 unsigned group, unsigned long config)</div><div class='add'>+{</div><div class='add'>+	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	struct mxs_group *g = &amp;d-&gt;soc-&gt;groups[group];</div><div class='add'>+	void __iomem *reg;</div><div class='add'>+	u8 ma, vol, pull, bank, shift;</div><div class='add'>+	u16 pin;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ma = CONFIG_TO_MA(config);</div><div class='add'>+	vol = CONFIG_TO_VOL(config);</div><div class='add'>+	pull = CONFIG_TO_PULL(config);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; g-&gt;npins; i++) {</div><div class='add'>+		bank = PINID_TO_BANK(g-&gt;pins[i]);</div><div class='add'>+		pin = PINID_TO_PIN(g-&gt;pins[i]);</div><div class='add'>+</div><div class='add'>+		/* drive */</div><div class='add'>+		reg = d-&gt;base + d-&gt;soc-&gt;regs-&gt;drive;</div><div class='add'>+		reg += bank * 0x40 + pin / 8 * 0x10;</div><div class='add'>+</div><div class='add'>+		/* mA */</div><div class='add'>+		if (config &amp; MA_PRESENT) {</div><div class='add'>+			shift = pin % 8 * 4;</div><div class='add'>+			writel(0x3 &lt;&lt; shift, reg + CLR);</div><div class='add'>+			writel(ma &lt;&lt; shift, reg + SET);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* vol */</div><div class='add'>+		if (config &amp; VOL_PRESENT) {</div><div class='add'>+			shift = pin % 8 * 4 + 2;</div><div class='add'>+			if (vol)</div><div class='add'>+				writel(1 &lt;&lt; shift, reg + SET);</div><div class='add'>+			else</div><div class='add'>+				writel(1 &lt;&lt; shift, reg + CLR);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* pull */</div><div class='add'>+		if (config &amp; PULL_PRESENT) {</div><div class='add'>+			reg = d-&gt;base + d-&gt;soc-&gt;regs-&gt;pull;</div><div class='add'>+			reg += bank * 0x10;</div><div class='add'>+			shift = pin;</div><div class='add'>+			if (pull)</div><div class='add'>+				writel(1 &lt;&lt; shift, reg + SET);</div><div class='add'>+			else</div><div class='add'>+				writel(1 &lt;&lt; shift, reg + CLR);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* cache the config value for mxs_pinconf_group_get() */</div><div class='add'>+	g-&gt;config = config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mxs_pinconf_dbg_show(struct pinctrl_dev *pctldev,</div><div class='add'>+				 struct seq_file *s, unsigned pin)</div><div class='add'>+{</div><div class='add'>+	/* Not support */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mxs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,</div><div class='add'>+				       struct seq_file *s, unsigned group)</div><div class='add'>+{</div><div class='add'>+	unsigned long config;</div><div class='add'>+</div><div class='add'>+	if (!mxs_pinconf_group_get(pctldev, group, &amp;config))</div><div class='add'>+		seq_printf(s, "0x%lx", config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct pinconf_ops mxs_pinconf_ops = {</div><div class='add'>+	.pin_config_get = mxs_pinconf_get,</div><div class='add'>+	.pin_config_set = mxs_pinconf_set,</div><div class='add'>+	.pin_config_group_get = mxs_pinconf_group_get,</div><div class='add'>+	.pin_config_group_set = mxs_pinconf_group_set,</div><div class='add'>+	.pin_config_dbg_show = mxs_pinconf_dbg_show,</div><div class='add'>+	.pin_config_group_dbg_show = mxs_pinconf_group_dbg_show,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinctrl_desc mxs_pinctrl_desc = {</div><div class='add'>+	.pctlops = &amp;mxs_pinctrl_ops,</div><div class='add'>+	.pmxops = &amp;mxs_pinmux_ops,</div><div class='add'>+	.confops = &amp;mxs_pinconf_ops,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit mxs_pinctrl_parse_group(struct platform_device *pdev,</div><div class='add'>+					     struct device_node *np, int idx,</div><div class='add'>+					     const char **out_name)</div><div class='add'>+{</div><div class='add'>+	struct mxs_pinctrl_data *d = platform_get_drvdata(pdev);</div><div class='add'>+	struct mxs_group *g = &amp;d-&gt;soc-&gt;groups[idx];</div><div class='add'>+	struct property *prop;</div><div class='add'>+	const char *propname = "fsl,pinmux-ids";</div><div class='add'>+	char *group;</div><div class='add'>+	int length = strlen(np-&gt;name) + SUFFIX_LEN;</div><div class='add'>+	int i;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	group = devm_kzalloc(&amp;pdev-&gt;dev, length, GFP_KERNEL);</div><div class='add'>+	if (!group)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	if (of_property_read_u32(np, "reg", &amp;val))</div><div class='add'>+		snprintf(group, length, "%s", np-&gt;name);</div><div class='add'>+	else</div><div class='add'>+		snprintf(group, length, "%s.%d", np-&gt;name, val);</div><div class='add'>+	g-&gt;name = group;</div><div class='add'>+</div><div class='add'>+	prop = of_find_property(np, propname, &amp;length);</div><div class='add'>+	if (!prop)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	g-&gt;npins = length / sizeof(u32);</div><div class='add'>+</div><div class='add'>+	g-&gt;pins = devm_kzalloc(&amp;pdev-&gt;dev, g-&gt;npins * sizeof(*g-&gt;pins),</div><div class='add'>+			       GFP_KERNEL);</div><div class='add'>+	if (!g-&gt;pins)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	g-&gt;muxsel = devm_kzalloc(&amp;pdev-&gt;dev, g-&gt;npins * sizeof(*g-&gt;muxsel),</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+	if (!g-&gt;muxsel)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	of_property_read_u32_array(np, propname, g-&gt;pins, g-&gt;npins);</div><div class='add'>+	for (i = 0; i &lt; g-&gt;npins; i++) {</div><div class='add'>+		g-&gt;muxsel[i] = MUXID_TO_MUXSEL(g-&gt;pins[i]);</div><div class='add'>+		g-&gt;pins[i] = MUXID_TO_PINID(g-&gt;pins[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (out_name)</div><div class='add'>+		*out_name = g-&gt;name;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit mxs_pinctrl_probe_dt(struct platform_device *pdev,</div><div class='add'>+					  struct mxs_pinctrl_data *d)</div><div class='add'>+{</div><div class='add'>+	struct mxs_pinctrl_soc_data *soc = d-&gt;soc;</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct device_node *child;</div><div class='add'>+	struct mxs_function *f;</div><div class='add'>+	const char *gpio_compat = "fsl,mxs-gpio";</div><div class='add'>+	const char *fn, *fnull = "";</div><div class='add'>+	int i = 0, idxf = 0, idxg = 0;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	child = of_get_next_child(np, NULL);</div><div class='add'>+	if (!child) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "no group is defined\n");</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Count total functions and groups */</div><div class='add'>+	fn = fnull;</div><div class='add'>+	for_each_child_of_node(np, child) {</div><div class='add'>+		if (of_device_is_compatible(child, gpio_compat))</div><div class='add'>+			continue;</div><div class='add'>+		soc-&gt;ngroups++;</div><div class='add'>+		/* Skip pure pinconf node */</div><div class='add'>+		if (of_property_read_u32(child, "reg", &amp;val))</div><div class='add'>+			continue;</div><div class='add'>+		if (strcmp(fn, child-&gt;name)) {</div><div class='add'>+			fn = child-&gt;name;</div><div class='add'>+			soc-&gt;nfunctions++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	soc-&gt;functions = devm_kzalloc(&amp;pdev-&gt;dev, soc-&gt;nfunctions *</div><div class='add'>+				      sizeof(*soc-&gt;functions), GFP_KERNEL);</div><div class='add'>+	if (!soc-&gt;functions)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	soc-&gt;groups = devm_kzalloc(&amp;pdev-&gt;dev, soc-&gt;ngroups *</div><div class='add'>+				   sizeof(*soc-&gt;groups), GFP_KERNEL);</div><div class='add'>+	if (!soc-&gt;groups)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Count groups for each function */</div><div class='add'>+	fn = fnull;</div><div class='add'>+	f = &amp;soc-&gt;functions[idxf];</div><div class='add'>+	for_each_child_of_node(np, child) {</div><div class='add'>+		if (of_device_is_compatible(child, gpio_compat))</div><div class='add'>+			continue;</div><div class='add'>+		if (of_property_read_u32(child, "reg", &amp;val))</div><div class='add'>+			continue;</div><div class='add'>+		if (strcmp(fn, child-&gt;name)) {</div><div class='add'>+			f = &amp;soc-&gt;functions[idxf++];</div><div class='add'>+			f-&gt;name = fn = child-&gt;name;</div><div class='add'>+		}</div><div class='add'>+		f-&gt;ngroups++;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Get groups for each function */</div><div class='add'>+	idxf = 0;</div><div class='add'>+	fn = fnull;</div><div class='add'>+	for_each_child_of_node(np, child) {</div><div class='add'>+		if (of_device_is_compatible(child, gpio_compat))</div><div class='add'>+			continue;</div><div class='add'>+		if (of_property_read_u32(child, "reg", &amp;val)) {</div><div class='add'>+			ret = mxs_pinctrl_parse_group(pdev, child,</div><div class='add'>+						      idxg++, NULL);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (strcmp(fn, child-&gt;name)) {</div><div class='add'>+			f = &amp;soc-&gt;functions[idxf++];</div><div class='add'>+			f-&gt;groups = devm_kzalloc(&amp;pdev-&gt;dev, f-&gt;ngroups *</div><div class='add'>+						 sizeof(*f-&gt;groups),</div><div class='add'>+						 GFP_KERNEL);</div><div class='add'>+			if (!f-&gt;groups)</div><div class='add'>+				return -ENOMEM;</div><div class='add'>+			fn = child-&gt;name;</div><div class='add'>+			i = 0;</div><div class='add'>+		}</div><div class='add'>+		ret = mxs_pinctrl_parse_group(pdev, child, idxg++,</div><div class='add'>+					      &amp;f-&gt;groups[i++]);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __devinit mxs_pinctrl_probe(struct platform_device *pdev,</div><div class='add'>+				struct mxs_pinctrl_soc_data *soc)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct mxs_pinctrl_data *d;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	d = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*d), GFP_KERNEL);</div><div class='add'>+	if (!d)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	d-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	d-&gt;soc = soc;</div><div class='add'>+</div><div class='add'>+	d-&gt;base = of_iomap(np, 0);</div><div class='add'>+	if (!d-&gt;base)</div><div class='add'>+		return -EADDRNOTAVAIL;</div><div class='add'>+</div><div class='add'>+	mxs_pinctrl_desc.pins = d-&gt;soc-&gt;pins;</div><div class='add'>+	mxs_pinctrl_desc.npins = d-&gt;soc-&gt;npins;</div><div class='add'>+	mxs_pinctrl_desc.name = dev_name(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, d);</div><div class='add'>+</div><div class='add'>+	ret = mxs_pinctrl_probe_dt(pdev, d);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "dt probe failed: %d\n", ret);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	d-&gt;pctl = pinctrl_register(&amp;mxs_pinctrl_desc, &amp;pdev-&gt;dev, d);</div><div class='add'>+	if (!d-&gt;pctl) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Couldn't register MXS pinctrl driver\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	iounmap(d-&gt;base);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mxs_pinctrl_probe);</div><div class='add'>+</div><div class='add'>+int __devexit mxs_pinctrl_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct mxs_pinctrl_data *d = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	pinctrl_unregister(d-&gt;pctl);</div><div class='add'>+	iounmap(d-&gt;base);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mxs_pinctrl_remove);</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-mxs.h b/drivers/pinctrl/pinctrl-mxs.h<br/>new file mode 100644<br/>index 000000000000..fdd88d0bae22<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-mxs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-mxs.h</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2012 Freescale Semiconductor, Inc.</div><div class='add'>+ *</div><div class='add'>+ * The code contained herein is licensed under the GNU General Public</div><div class='add'>+ * License. You may obtain a copy of the GNU General Public License</div><div class='add'>+ * Version 2 or later at the following locations:</div><div class='add'>+ *</div><div class='add'>+ * http://www.opensource.org/licenses/gpl-license.html</div><div class='add'>+ * http://www.gnu.org/copyleft/gpl.html</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __PINCTRL_MXS_H</div><div class='add'>+#define __PINCTRL_MXS_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+#define SET	0x4</div><div class='add'>+#define CLR	0x8</div><div class='add'>+#define TOG	0xc</div><div class='add'>+</div><div class='add'>+#define MXS_PINCTRL_PIN(pin)	PINCTRL_PIN(pin, #pin)</div><div class='add'>+#define PINID(bank, pin)	((bank) * 32 + (pin))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * pinmux-id bit field definitions</div><div class='add'>+ *</div><div class='add'>+ * bank:	15..12	(4)</div><div class='add'>+ * pin:		11..4	(8)</div><div class='add'>+ * muxsel:	3..0	(4)</div><div class='add'>+ */</div><div class='add'>+#define MUXID_TO_PINID(m)	PINID((m) &gt;&gt; 12 &amp; 0xf, (m) &gt;&gt; 4 &amp; 0xff)</div><div class='add'>+#define MUXID_TO_MUXSEL(m)	((m) &amp; 0xf)</div><div class='add'>+</div><div class='add'>+#define PINID_TO_BANK(p)	((p) &gt;&gt; 5)</div><div class='add'>+#define PINID_TO_PIN(p)		((p) % 32)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * pin config bit field definitions</div><div class='add'>+ *</div><div class='add'>+ * pull-up:	6..5	(2)</div><div class='add'>+ * voltage:	4..3	(2)</div><div class='add'>+ * mA:		2..0	(3)</div><div class='add'>+ *</div><div class='add'>+ * MSB of each field is presence bit for the config.</div><div class='add'>+ */</div><div class='add'>+#define PULL_PRESENT		(1 &lt;&lt; 6)</div><div class='add'>+#define PULL_SHIFT		5</div><div class='add'>+#define VOL_PRESENT		(1 &lt;&lt; 4)</div><div class='add'>+#define VOL_SHIFT		3</div><div class='add'>+#define MA_PRESENT		(1 &lt;&lt; 2)</div><div class='add'>+#define MA_SHIFT		0</div><div class='add'>+#define CONFIG_TO_PULL(c)	((c) &gt;&gt; PULL_SHIFT &amp; 0x1)</div><div class='add'>+#define CONFIG_TO_VOL(c)	((c) &gt;&gt; VOL_SHIFT &amp; 0x1)</div><div class='add'>+#define CONFIG_TO_MA(c)		((c) &gt;&gt; MA_SHIFT &amp; 0x3)</div><div class='add'>+</div><div class='add'>+struct mxs_function {</div><div class='add'>+	const char *name;</div><div class='add'>+	const char **groups;</div><div class='add'>+	unsigned ngroups;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mxs_group {</div><div class='add'>+	const char *name;</div><div class='add'>+	unsigned int *pins;</div><div class='add'>+	unsigned npins;</div><div class='add'>+	u8 *muxsel;</div><div class='add'>+	u8 config;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mxs_regs {</div><div class='add'>+	u16 muxsel;</div><div class='add'>+	u16 drive;</div><div class='add'>+	u16 pull;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mxs_pinctrl_soc_data {</div><div class='add'>+	const struct mxs_regs *regs;</div><div class='add'>+	const struct pinctrl_pin_desc *pins;</div><div class='add'>+	unsigned npins;</div><div class='add'>+	struct mxs_function *functions;</div><div class='add'>+	unsigned nfunctions;</div><div class='add'>+	struct mxs_group *groups;</div><div class='add'>+	unsigned ngroups;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mxs_pinctrl_probe(struct platform_device *pdev,</div><div class='add'>+		      struct mxs_pinctrl_soc_data *soc);</div><div class='add'>+int mxs_pinctrl_remove(struct platform_device *pdev);</div><div class='add'>+</div><div class='add'>+#endif /* __PINCTRL_MXS_H */</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-nomadik-db8500.c b/drivers/pinctrl/pinctrl-nomadik-db8500.c<br/>new file mode 100644<br/>index 000000000000..8b2022276f71<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-nomadik-db8500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-nomadik-db8500.c</a></div><div class='hunk'>@@ -0,0 +1,857 @@</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+#include "pinctrl-nomadik.h"</div><div class='add'>+</div><div class='add'>+/* All the pins that can be used for GPIO and some other functions */</div><div class='add'>+#define _GPIO(offset)		(offset)</div><div class='add'>+</div><div class='add'>+#define DB8500_PIN_AJ5		_GPIO(0)</div><div class='add'>+#define DB8500_PIN_AJ3		_GPIO(1)</div><div class='add'>+#define DB8500_PIN_AH4		_GPIO(2)</div><div class='add'>+#define DB8500_PIN_AH3		_GPIO(3)</div><div class='add'>+#define DB8500_PIN_AH6		_GPIO(4)</div><div class='add'>+#define DB8500_PIN_AG6		_GPIO(5)</div><div class='add'>+#define DB8500_PIN_AF6		_GPIO(6)</div><div class='add'>+#define DB8500_PIN_AG5		_GPIO(7)</div><div class='add'>+#define DB8500_PIN_AD5		_GPIO(8)</div><div class='add'>+#define DB8500_PIN_AE4		_GPIO(9)</div><div class='add'>+#define DB8500_PIN_AF5		_GPIO(10)</div><div class='add'>+#define DB8500_PIN_AG4		_GPIO(11)</div><div class='add'>+#define DB8500_PIN_AC4		_GPIO(12)</div><div class='add'>+#define DB8500_PIN_AF3		_GPIO(13)</div><div class='add'>+#define DB8500_PIN_AE3		_GPIO(14)</div><div class='add'>+#define DB8500_PIN_AC3		_GPIO(15)</div><div class='add'>+#define DB8500_PIN_AD3		_GPIO(16)</div><div class='add'>+#define DB8500_PIN_AD4		_GPIO(17)</div><div class='add'>+#define DB8500_PIN_AC2		_GPIO(18)</div><div class='add'>+#define DB8500_PIN_AC1		_GPIO(19)</div><div class='add'>+#define DB8500_PIN_AB4		_GPIO(20)</div><div class='add'>+#define DB8500_PIN_AB3		_GPIO(21)</div><div class='add'>+#define DB8500_PIN_AA3		_GPIO(22)</div><div class='add'>+#define DB8500_PIN_AA4		_GPIO(23)</div><div class='add'>+#define DB8500_PIN_AB2		_GPIO(24)</div><div class='add'>+#define DB8500_PIN_Y4		_GPIO(25)</div><div class='add'>+#define DB8500_PIN_Y2		_GPIO(26)</div><div class='add'>+#define DB8500_PIN_AA2		_GPIO(27)</div><div class='add'>+#define DB8500_PIN_AA1		_GPIO(28)</div><div class='add'>+#define DB8500_PIN_W2		_GPIO(29)</div><div class='add'>+#define DB8500_PIN_W3		_GPIO(30)</div><div class='add'>+#define DB8500_PIN_V3		_GPIO(31)</div><div class='add'>+#define DB8500_PIN_V2		_GPIO(32)</div><div class='add'>+#define DB8500_PIN_AF2		_GPIO(33)</div><div class='add'>+#define DB8500_PIN_AE1		_GPIO(34)</div><div class='add'>+#define DB8500_PIN_AE2		_GPIO(35)</div><div class='add'>+#define DB8500_PIN_AG2		_GPIO(36)</div><div class='add'>+/* Hole */</div><div class='add'>+#define DB8500_PIN_F3		_GPIO(64)</div><div class='add'>+#define DB8500_PIN_F1		_GPIO(65)</div><div class='add'>+#define DB8500_PIN_G3		_GPIO(66)</div><div class='add'>+#define DB8500_PIN_G2		_GPIO(67)</div><div class='add'>+#define DB8500_PIN_E1		_GPIO(68)</div><div class='add'>+#define DB8500_PIN_E2		_GPIO(69)</div><div class='add'>+#define DB8500_PIN_G5		_GPIO(70)</div><div class='add'>+#define DB8500_PIN_G4		_GPIO(71)</div><div class='add'>+#define DB8500_PIN_H4		_GPIO(72)</div><div class='add'>+#define DB8500_PIN_H3		_GPIO(73)</div><div class='add'>+#define DB8500_PIN_J3		_GPIO(74)</div><div class='add'>+#define DB8500_PIN_H2		_GPIO(75)</div><div class='add'>+#define DB8500_PIN_J2		_GPIO(76)</div><div class='add'>+#define DB8500_PIN_H1		_GPIO(77)</div><div class='add'>+#define DB8500_PIN_F4		_GPIO(78)</div><div class='add'>+#define DB8500_PIN_E3		_GPIO(79)</div><div class='add'>+#define DB8500_PIN_E4		_GPIO(80)</div><div class='add'>+#define DB8500_PIN_D2		_GPIO(81)</div><div class='add'>+#define DB8500_PIN_C1		_GPIO(82)</div><div class='add'>+#define DB8500_PIN_D3		_GPIO(83)</div><div class='add'>+#define DB8500_PIN_C2		_GPIO(84)</div><div class='add'>+#define DB8500_PIN_D5		_GPIO(85)</div><div class='add'>+#define DB8500_PIN_C6		_GPIO(86)</div><div class='add'>+#define DB8500_PIN_B3		_GPIO(87)</div><div class='add'>+#define DB8500_PIN_C4		_GPIO(88)</div><div class='add'>+#define DB8500_PIN_E6		_GPIO(89)</div><div class='add'>+#define DB8500_PIN_A3		_GPIO(90)</div><div class='add'>+#define DB8500_PIN_B6		_GPIO(91)</div><div class='add'>+#define DB8500_PIN_D6		_GPIO(92)</div><div class='add'>+#define DB8500_PIN_B7		_GPIO(93)</div><div class='add'>+#define DB8500_PIN_D7		_GPIO(94)</div><div class='add'>+#define DB8500_PIN_E8		_GPIO(95)</div><div class='add'>+#define DB8500_PIN_D8		_GPIO(96)</div><div class='add'>+#define DB8500_PIN_D9		_GPIO(97)</div><div class='add'>+/* Hole */</div><div class='add'>+#define DB8500_PIN_A5		_GPIO(128)</div><div class='add'>+#define DB8500_PIN_B4		_GPIO(129)</div><div class='add'>+#define DB8500_PIN_C8		_GPIO(130)</div><div class='add'>+#define DB8500_PIN_A12		_GPIO(131)</div><div class='add'>+#define DB8500_PIN_C10		_GPIO(132)</div><div class='add'>+#define DB8500_PIN_B10		_GPIO(133)</div><div class='add'>+#define DB8500_PIN_B9		_GPIO(134)</div><div class='add'>+#define DB8500_PIN_A9		_GPIO(135)</div><div class='add'>+#define DB8500_PIN_C7		_GPIO(136)</div><div class='add'>+#define DB8500_PIN_A7		_GPIO(137)</div><div class='add'>+#define DB8500_PIN_C5		_GPIO(138)</div><div class='add'>+#define DB8500_PIN_C9		_GPIO(139)</div><div class='add'>+#define DB8500_PIN_B11		_GPIO(140)</div><div class='add'>+#define DB8500_PIN_C12		_GPIO(141)</div><div class='add'>+#define DB8500_PIN_C11		_GPIO(142)</div><div class='add'>+#define DB8500_PIN_D12		_GPIO(143)</div><div class='add'>+#define DB8500_PIN_B13		_GPIO(144)</div><div class='add'>+#define DB8500_PIN_C13		_GPIO(145)</div><div class='add'>+#define DB8500_PIN_D13		_GPIO(146)</div><div class='add'>+#define DB8500_PIN_C15		_GPIO(147)</div><div class='add'>+#define DB8500_PIN_B16		_GPIO(148)</div><div class='add'>+#define DB8500_PIN_B14		_GPIO(149)</div><div class='add'>+#define DB8500_PIN_C14		_GPIO(150)</div><div class='add'>+#define DB8500_PIN_D17		_GPIO(151)</div><div class='add'>+#define DB8500_PIN_D16		_GPIO(152)</div><div class='add'>+#define DB8500_PIN_B17		_GPIO(153)</div><div class='add'>+#define DB8500_PIN_C16		_GPIO(154)</div><div class='add'>+#define DB8500_PIN_C19		_GPIO(155)</div><div class='add'>+#define DB8500_PIN_C17		_GPIO(156)</div><div class='add'>+#define DB8500_PIN_A18		_GPIO(157)</div><div class='add'>+#define DB8500_PIN_C18		_GPIO(158)</div><div class='add'>+#define DB8500_PIN_B19		_GPIO(159)</div><div class='add'>+#define DB8500_PIN_B20		_GPIO(160)</div><div class='add'>+#define DB8500_PIN_D21		_GPIO(161)</div><div class='add'>+#define DB8500_PIN_D20		_GPIO(162)</div><div class='add'>+#define DB8500_PIN_C20		_GPIO(163)</div><div class='add'>+#define DB8500_PIN_B21		_GPIO(164)</div><div class='add'>+#define DB8500_PIN_C21		_GPIO(165)</div><div class='add'>+#define DB8500_PIN_A22		_GPIO(166)</div><div class='add'>+#define DB8500_PIN_B24		_GPIO(167)</div><div class='add'>+#define DB8500_PIN_C22		_GPIO(168)</div><div class='add'>+#define DB8500_PIN_D22		_GPIO(169)</div><div class='add'>+#define DB8500_PIN_C23		_GPIO(170)</div><div class='add'>+#define DB8500_PIN_D23		_GPIO(171)</div><div class='add'>+/* Hole */</div><div class='add'>+#define DB8500_PIN_AJ27		_GPIO(192)</div><div class='add'>+#define DB8500_PIN_AH27		_GPIO(193)</div><div class='add'>+#define DB8500_PIN_AF27		_GPIO(194)</div><div class='add'>+#define DB8500_PIN_AG28		_GPIO(195)</div><div class='add'>+#define DB8500_PIN_AG26		_GPIO(196)</div><div class='add'>+#define DB8500_PIN_AH24		_GPIO(197)</div><div class='add'>+#define DB8500_PIN_AG25		_GPIO(198)</div><div class='add'>+#define DB8500_PIN_AH23		_GPIO(199)</div><div class='add'>+#define DB8500_PIN_AH26		_GPIO(200)</div><div class='add'>+#define DB8500_PIN_AF24		_GPIO(201)</div><div class='add'>+#define DB8500_PIN_AF25		_GPIO(202)</div><div class='add'>+#define DB8500_PIN_AE23		_GPIO(203)</div><div class='add'>+#define DB8500_PIN_AF23		_GPIO(204)</div><div class='add'>+#define DB8500_PIN_AG23		_GPIO(205)</div><div class='add'>+#define DB8500_PIN_AG24		_GPIO(206)</div><div class='add'>+#define DB8500_PIN_AJ23		_GPIO(207)</div><div class='add'>+#define DB8500_PIN_AH16		_GPIO(208)</div><div class='add'>+#define DB8500_PIN_AG15		_GPIO(209)</div><div class='add'>+#define DB8500_PIN_AJ15		_GPIO(210)</div><div class='add'>+#define DB8500_PIN_AG14		_GPIO(211)</div><div class='add'>+#define DB8500_PIN_AF13		_GPIO(212)</div><div class='add'>+#define DB8500_PIN_AG13		_GPIO(213)</div><div class='add'>+#define DB8500_PIN_AH15		_GPIO(214)</div><div class='add'>+#define DB8500_PIN_AH13		_GPIO(215)</div><div class='add'>+#define DB8500_PIN_AG12		_GPIO(216)</div><div class='add'>+#define DB8500_PIN_AH12		_GPIO(217)</div><div class='add'>+#define DB8500_PIN_AH11		_GPIO(218)</div><div class='add'>+#define DB8500_PIN_AG10		_GPIO(219)</div><div class='add'>+#define DB8500_PIN_AH10		_GPIO(220)</div><div class='add'>+#define DB8500_PIN_AJ11		_GPIO(221)</div><div class='add'>+#define DB8500_PIN_AJ9		_GPIO(222)</div><div class='add'>+#define DB8500_PIN_AH9		_GPIO(223)</div><div class='add'>+#define DB8500_PIN_AG9		_GPIO(224)</div><div class='add'>+#define DB8500_PIN_AG8		_GPIO(225)</div><div class='add'>+#define DB8500_PIN_AF8		_GPIO(226)</div><div class='add'>+#define DB8500_PIN_AH7		_GPIO(227)</div><div class='add'>+#define DB8500_PIN_AJ6		_GPIO(228)</div><div class='add'>+#define DB8500_PIN_AG7		_GPIO(229)</div><div class='add'>+#define DB8500_PIN_AF7		_GPIO(230)</div><div class='add'>+/* Hole */</div><div class='add'>+#define DB8500_PIN_AF28		_GPIO(256)</div><div class='add'>+#define DB8500_PIN_AE29		_GPIO(257)</div><div class='add'>+#define DB8500_PIN_AD29		_GPIO(258)</div><div class='add'>+#define DB8500_PIN_AC29		_GPIO(259)</div><div class='add'>+#define DB8500_PIN_AD28		_GPIO(260)</div><div class='add'>+#define DB8500_PIN_AD26		_GPIO(261)</div><div class='add'>+#define DB8500_PIN_AE26		_GPIO(262)</div><div class='add'>+#define DB8500_PIN_AG29		_GPIO(263)</div><div class='add'>+#define DB8500_PIN_AE27		_GPIO(264)</div><div class='add'>+#define DB8500_PIN_AD27		_GPIO(265)</div><div class='add'>+#define DB8500_PIN_AC28		_GPIO(266)</div><div class='add'>+#define DB8500_PIN_AC27		_GPIO(267)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The names of the pins are denoted by GPIO number and ball name, even</div><div class='add'>+ * though they can be used for other things than GPIO, this is the first</div><div class='add'>+ * column in the table of the data sheet and often used on schematics and</div><div class='add'>+ * such.</div><div class='add'>+ */</div><div class='add'>+static const struct pinctrl_pin_desc nmk_db8500_pins[] = {</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AJ5, "GPIO0_AJ5"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AJ3, "GPIO1_AJ3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH4, "GPIO2_AH4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH3, "GPIO3_AH3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH6, "GPIO4_AH6"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG6, "GPIO5_AG6"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AF6, "GPIO6_AF6"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG5, "GPIO7_AG5"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AD5, "GPIO8_AD5"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AE4, "GPIO9_AE4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AF5, "GPIO10_AF5"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG4, "GPIO11_AG4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AC4, "GPIO12_AC4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AF3, "GPIO13_AF3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AE3, "GPIO14_AE3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AC3, "GPIO15_AC3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AD3, "GPIO16_AD3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AD4, "GPIO17_AD4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AC2, "GPIO18_AC2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AC1, "GPIO19_AC1"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AB4, "GPIO20_AB4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AB3, "GPIO21_AB3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AA3, "GPIO22_AA3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AA4, "GPIO23_AA4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AB2, "GPIO24_AB2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_Y4, "GPIO25_Y4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_Y2, "GPIO26_Y2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AA2, "GPIO27_AA2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AA1, "GPIO28_AA1"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_W2, "GPIO29_W2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_W3, "GPIO30_W3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_V3, "GPIO31_V3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_V2, "GPIO32_V2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AF2, "GPIO33_AF2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AE1, "GPIO34_AE1"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AE2, "GPIO35_AE2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG2, "GPIO36_AG2"),</div><div class='add'>+	/* Hole */</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_F3, "GPIO64_F3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_F1, "GPIO65_F1"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_G3, "GPIO66_G3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_G2, "GPIO67_G2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_E1, "GPIO68_E1"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_E2, "GPIO69_E2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_G5, "GPIO70_G5"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_G4, "GPIO71_G4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_H4, "GPIO72_H4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_H3, "GPIO73_H3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_J3, "GPIO74_J3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_H2, "GPIO75_H2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_J2, "GPIO76_J2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_H1, "GPIO77_H1"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_F4, "GPIO78_F4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_E3, "GPIO79_E3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_E4, "GPIO80_E4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D2, "GPIO81_D2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C1, "GPIO82_C1"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D3, "GPIO83_D3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C2, "GPIO84_C2"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D5, "GPIO85_D5"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C6, "GPIO86_C6"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B3, "GPIO87_B3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C4, "GPIO88_C4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_E6, "GPIO89_E6"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_A3, "GPIO90_A3"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B6, "GPIO91_B6"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D6, "GPIO92_D6"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B7, "GPIO93_B7"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D7, "GPIO94_D7"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_E8, "GPIO95_E8"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D8, "GPIO96_D8"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D9, "GPIO97_D9"),</div><div class='add'>+	/* Hole */</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_A5, "GPIO128_A5"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B4, "GPIO129_B4"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C8, "GPIO130_C8"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_A12, "GPIO131_A12"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C10, "GPIO132_C10"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B10, "GPIO133_B10"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B9, "GPIO134_B9"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_A9, "GPIO135_A9"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C7, "GPIO136_C7"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_A7, "GPIO137_A7"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C5, "GPIO138_C5"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C9, "GPIO139_C9"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B11, "GPIO140_B11"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C12, "GPIO141_C12"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C11, "GPIO142_C11"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D12, "GPIO143_D12"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B13, "GPIO144_B13"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C13, "GPIO145_C13"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D13, "GPIO146_D13"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C15, "GPIO147_C15"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B16, "GPIO148_B16"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B14, "GPIO149_B14"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C14, "GPIO150_C14"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D17, "GPIO151_D17"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D16, "GPIO152_D16"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B17, "GPIO153_B17"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C16, "GPIO154_C16"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C19, "GPIO155_C19"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C17, "GPIO156_C17"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_A18, "GPIO157_A18"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C18, "GPIO158_C18"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B19, "GPIO159_B19"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B20, "GPIO160_B20"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D21, "GPIO161_D21"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D20, "GPIO162_D20"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C20, "GPIO163_C20"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B21, "GPIO164_B21"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C21, "GPIO165_C21"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_A22, "GPIO166_A22"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_B24, "GPIO167_B24"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C22, "GPIO168_C22"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D22, "GPIO169_D22"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_C23, "GPIO170_C23"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_D23, "GPIO171_D23"),</div><div class='add'>+	/* Hole */</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AJ27, "GPIO192_AJ27"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH27, "GPIO193_AH27"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AF27, "GPIO194_AF27"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG28, "GPIO195_AG28"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG26, "GPIO196_AG26"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH24, "GPIO197_AH24"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG25, "GPIO198_AG25"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH23, "GPIO199_AH23"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH26, "GPIO200_AH26"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AF24, "GPIO201_AF24"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AF25, "GPIO202_AF25"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AE23, "GPIO203_AE23"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AF23, "GPIO204_AF23"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG23, "GPIO205_AG23"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG24, "GPIO206_AG24"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AJ23, "GPIO207_AJ23"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH16, "GPIO208_AH16"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG15, "GPIO209_AG15"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AJ15, "GPIO210_AJ15"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG14, "GPIO211_AG14"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AF13, "GPIO212_AF13"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG13, "GPIO213_AG13"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH15, "GPIO214_AH15"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH13, "GPIO215_AH13"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG12, "GPIO216_AG12"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH12, "GPIO217_AH12"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH11, "GPIO218_AH11"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG10, "GPIO219_AG10"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH10, "GPIO220_AH10"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AJ11, "GPIO221_AJ11"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AJ9, "GPIO222_AJ9"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH9, "GPIO223_AH9"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG9, "GPIO224_AG9"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG8, "GPIO225_AG8"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AF8, "GPIO226_AF8"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AH7, "GPIO227_AH7"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AJ6, "GPIO228_AJ6"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG7, "GPIO229_AG7"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AF7, "GPIO230_AF7"),</div><div class='add'>+	/* Hole */</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AF28, "GPIO256_AF28"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AE29, "GPIO257_AE29"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AD29, "GPIO258_AD29"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AC29, "GPIO259_AC29"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AD28, "GPIO260_AD28"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AD26, "GPIO261_AD26"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AE26, "GPIO262_AE26"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AG29, "GPIO263_AG29"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AE27, "GPIO264_AE27"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AD27, "GPIO265_AD27"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AC28, "GPIO266_AC28"),</div><div class='add'>+	PINCTRL_PIN(DB8500_PIN_AC27, "GPIO267_AC27"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define DB8500_GPIO_RANGE(a, b, c) { .name = "DB8500", .id = a, .base = b, \</div><div class='add'>+			.pin_base = b, .npins = c }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This matches the 32-pin gpio chips registered by the GPIO portion. This</div><div class='add'>+ * cannot be const since we assign the struct gpio_chip * pointer at runtime.</div><div class='add'>+ */</div><div class='add'>+static struct pinctrl_gpio_range nmk_db8500_ranges[] = {</div><div class='add'>+	DB8500_GPIO_RANGE(0, 0, 32),</div><div class='add'>+	DB8500_GPIO_RANGE(1, 32, 5),</div><div class='add'>+	DB8500_GPIO_RANGE(2, 64, 32),</div><div class='add'>+	DB8500_GPIO_RANGE(3, 96, 2),</div><div class='add'>+	DB8500_GPIO_RANGE(4, 128, 32),</div><div class='add'>+	DB8500_GPIO_RANGE(5, 160, 12),</div><div class='add'>+	DB8500_GPIO_RANGE(6, 192, 32),</div><div class='add'>+	DB8500_GPIO_RANGE(7, 224, 7),</div><div class='add'>+	DB8500_GPIO_RANGE(8, 256, 12),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Read the pin group names like this:</div><div class='add'>+ * u0_a_1    = first groups of pins for uart0 on alt function a</div><div class='add'>+ * i2c2_b_2  = second group of pins for i2c2 on alt function b</div><div class='add'>+ *</div><div class='add'>+ * The groups are arranged as sets per altfunction column, so we can</div><div class='add'>+ * mux in one group at a time by selecting the same altfunction for them</div><div class='add'>+ * all. When functions require pins on different altfunctions, you need</div><div class='add'>+ * to combine several groups.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Altfunction A column */</div><div class='add'>+static const unsigned u0_a_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,</div><div class='add'>+					DB8500_PIN_AH4, DB8500_PIN_AH3 };</div><div class='add'>+static const unsigned u1rxtx_a_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };</div><div class='add'>+static const unsigned u1ctsrts_a_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };</div><div class='add'>+/* Image processor I2C line, this is driven by image processor firmware */</div><div class='add'>+static const unsigned ipi2c_a_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };</div><div class='add'>+static const unsigned ipi2c_a_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };</div><div class='add'>+/* MSP0 can only be on these pins, but TXD and RXD can be flipped */</div><div class='add'>+static const unsigned msp0txrx_a_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };</div><div class='add'>+static const unsigned msp0tfstck_a_1_pins[] = { DB8500_PIN_AF3, DB8500_PIN_AE3 };</div><div class='add'>+static const unsigned msp0rfsrck_a_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };</div><div class='add'>+/* Basic pins of the MMC/SD card 0 interface */</div><div class='add'>+static const unsigned mc0_a_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,</div><div class='add'>+	DB8500_PIN_AB4, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,</div><div class='add'>+	DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };</div><div class='add'>+/* Often only 4 bits are used, then these are not needed (only used for MMC) */</div><div class='add'>+static const unsigned mc0_dat47_a_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,</div><div class='add'>+	DB8500_PIN_V3, DB8500_PIN_V2};</div><div class='add'>+static const unsigned mc0dat31dir_a_1_pins[] = { DB8500_PIN_AB3 };</div><div class='add'>+/* MSP1 can only be on these pins, but TXD and RXD can be flipped */</div><div class='add'>+static const unsigned msp1txrx_a_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };</div><div class='add'>+static const unsigned msp1_a_1_pins[] = { DB8500_PIN_AE1, DB8500_PIN_AE2 };</div><div class='add'>+/* LCD interface */</div><div class='add'>+static const unsigned lcdb_a_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,</div><div class='add'>+					  DB8500_PIN_G3, DB8500_PIN_G2 };</div><div class='add'>+static const unsigned lcdvsi0_a_1_pins[] = { DB8500_PIN_E1 };</div><div class='add'>+static const unsigned lcdvsi1_a_1_pins[] = { DB8500_PIN_E2 };</div><div class='add'>+static const unsigned lcd_d0_d7_a_1_pins[] = {</div><div class='add'>+	DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,</div><div class='add'>+	DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1 };</div><div class='add'>+/* D8 thru D11 often used as TVOUT lines */</div><div class='add'>+static const unsigned lcd_d8_d11_a_1_pins[] = { DB8500_PIN_F4,</div><div class='add'>+	DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2 };</div><div class='add'>+static const unsigned lcd_d12_d23_a_1_pins[] = {</div><div class='add'>+	DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5,</div><div class='add'>+	DB8500_PIN_C6, DB8500_PIN_B3, DB8500_PIN_C4, DB8500_PIN_E6,</div><div class='add'>+	DB8500_PIN_A3, DB8500_PIN_B6, DB8500_PIN_D6, DB8500_PIN_B7 };</div><div class='add'>+static const unsigned kp_a_1_pins[] = { DB8500_PIN_D7, DB8500_PIN_E8,</div><div class='add'>+	DB8500_PIN_D8, DB8500_PIN_D9 };</div><div class='add'>+static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16 };</div><div class='add'>+static const unsigned kp_a_2_pins[] = {</div><div class='add'>+	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,</div><div class='add'>+	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,</div><div class='add'>+	DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,</div><div class='add'>+	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };</div><div class='add'>+/* MC2 has 8 data lines and no direction control, so only for (e)MMC */</div><div class='add'>+static const unsigned mc2_a_1_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,</div><div class='add'>+	DB8500_PIN_C8, DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10,</div><div class='add'>+	DB8500_PIN_B9, DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7,</div><div class='add'>+	DB8500_PIN_C5 };</div><div class='add'>+static const unsigned ssp1_a_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,</div><div class='add'>+					  DB8500_PIN_C12, DB8500_PIN_C11 };</div><div class='add'>+static const unsigned ssp0_a_1_pins[] = { DB8500_PIN_D12, DB8500_PIN_B13,</div><div class='add'>+					  DB8500_PIN_C13, DB8500_PIN_D13 };</div><div class='add'>+static const unsigned i2c0_a_1_pins[] = { DB8500_PIN_C15, DB8500_PIN_B16 };</div><div class='add'>+/*</div><div class='add'>+ * Image processor GPIO pins are named "ipgpio" and have their own</div><div class='add'>+ * numberspace</div><div class='add'>+ */</div><div class='add'>+static const unsigned ipgpio0_a_1_pins[] = { DB8500_PIN_B14 };</div><div class='add'>+static const unsigned ipgpio1_a_1_pins[] = { DB8500_PIN_C14 };</div><div class='add'>+/* Three modem pins named RF_PURn, MODEM_STATE and MODEM_PWREN */</div><div class='add'>+static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22, DB8500_PIN_C23,</div><div class='add'>+					   DB8500_PIN_D23 };</div><div class='add'>+/*</div><div class='add'>+ * This MSP cannot switch RX and TX, SCK in a separate group since this</div><div class='add'>+ * seems to be optional.</div><div class='add'>+ */</div><div class='add'>+static const unsigned msp2sck_a_1_pins[] = { DB8500_PIN_AJ27 };</div><div class='add'>+static const unsigned msp2_a_1_pins[] = { DB8500_PIN_AH27, DB8500_PIN_AF27,</div><div class='add'>+					  DB8500_PIN_AG28, DB8500_PIN_AG26 };</div><div class='add'>+static const unsigned mc4_a_1_pins[] = { DB8500_PIN_AH24, DB8500_PIN_AG25,</div><div class='add'>+	DB8500_PIN_AH23, DB8500_PIN_AH26, DB8500_PIN_AF24, DB8500_PIN_AF25,</div><div class='add'>+	DB8500_PIN_AE23, DB8500_PIN_AF23, DB8500_PIN_AG23, DB8500_PIN_AG24,</div><div class='add'>+	DB8500_PIN_AJ23 };</div><div class='add'>+/* MC1 has only 4 data pins, designed for SD or SDIO exclusively */</div><div class='add'>+static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15,</div><div class='add'>+	DB8500_PIN_AJ15, DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13,</div><div class='add'>+	DB8500_PIN_AH15 };</div><div class='add'>+static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,</div><div class='add'>+	DB8500_PIN_AH12, DB8500_PIN_AH11 };</div><div class='add'>+static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10 };</div><div class='add'>+static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ11, DB8500_PIN_AJ9,</div><div class='add'>+	DB8500_PIN_AH9, DB8500_PIN_AG9, DB8500_PIN_AG8, DB8500_PIN_AF8 };</div><div class='add'>+static const unsigned clkout_a_1_pins[] = { DB8500_PIN_AH7, DB8500_PIN_AJ6 };</div><div class='add'>+static const unsigned clkout_a_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };</div><div class='add'>+static const unsigned usb_a_1_pins[] = { DB8500_PIN_AF28, DB8500_PIN_AE29,</div><div class='add'>+	DB8500_PIN_AD29, DB8500_PIN_AC29, DB8500_PIN_AD28, DB8500_PIN_AD26,</div><div class='add'>+	DB8500_PIN_AE26, DB8500_PIN_AG29, DB8500_PIN_AE27, DB8500_PIN_AD27,</div><div class='add'>+	DB8500_PIN_AC28, DB8500_PIN_AC27 };</div><div class='add'>+</div><div class='add'>+/* Altfunction B column */</div><div class='add'>+static const unsigned trig_b_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3 };</div><div class='add'>+static const unsigned i2c4_b_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };</div><div class='add'>+static const unsigned i2c1_b_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };</div><div class='add'>+static const unsigned i2c2_b_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };</div><div class='add'>+static const unsigned i2c2_b_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };</div><div class='add'>+static const unsigned msp0txrx_b_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };</div><div class='add'>+static const unsigned i2c1_b_2_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };</div><div class='add'>+/* Just RX and TX for UART2 */</div><div class='add'>+static const unsigned u2rxtx_b_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1 };</div><div class='add'>+static const unsigned uartmodtx_b_1_pins[] = { DB8500_PIN_AB4 };</div><div class='add'>+static const unsigned msp0sck_b_1_pins[] = { DB8500_PIN_AB3 };</div><div class='add'>+static const unsigned uartmodrx_b_1_pins[] = { DB8500_PIN_AA3 };</div><div class='add'>+static const unsigned stmmod_b_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,</div><div class='add'>+	DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };</div><div class='add'>+static const unsigned uartmodrx_b_2_pins[] = { DB8500_PIN_AB2 };</div><div class='add'>+static const unsigned spi3_b_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,</div><div class='add'>+					  DB8500_PIN_V3, DB8500_PIN_V2 };</div><div class='add'>+static const unsigned msp1txrx_b_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };</div><div class='add'>+static const unsigned kp_b_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,</div><div class='add'>+	DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_E1, DB8500_PIN_E2,</div><div class='add'>+	DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,</div><div class='add'>+	DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1,</div><div class='add'>+	DB8500_PIN_F4, DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2,</div><div class='add'>+	DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 };</div><div class='add'>+static const unsigned sm_b_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,</div><div class='add'>+	DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,</div><div class='add'>+	DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,</div><div class='add'>+	DB8500_PIN_D9, DB8500_PIN_A5, DB8500_PIN_B4, DB8500_PIN_C8,</div><div class='add'>+	DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9,</div><div class='add'>+	DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5,</div><div class='add'>+	DB8500_PIN_C9, DB8500_PIN_B14 };</div><div class='add'>+/* This chip select pin can be "ps0" in alt B so have it separately */</div><div class='add'>+static const unsigned smcs0_b_1_pins[] = { DB8500_PIN_E8 };</div><div class='add'>+static const unsigned ipgpio7_b_1_pins[] = { DB8500_PIN_B11 };</div><div class='add'>+static const unsigned ipgpio2_b_1_pins[] = { DB8500_PIN_C12 };</div><div class='add'>+static const unsigned ipgpio3_b_1_pins[] = { DB8500_PIN_C11 };</div><div class='add'>+static const unsigned lcdaclk_b_1_pins[] = { DB8500_PIN_C14 };</div><div class='add'>+static const unsigned lcda_b_1_pins[] = { DB8500_PIN_D22,</div><div class='add'>+	DB8500_PIN_C23, DB8500_PIN_D23 };</div><div class='add'>+static const unsigned lcd_b_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,</div><div class='add'>+	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,</div><div class='add'>+	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,</div><div class='add'>+	DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,</div><div class='add'>+	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };</div><div class='add'>+static const unsigned ddrtrig_b_1_pins[] = { DB8500_PIN_AJ27 };</div><div class='add'>+static const unsigned pwl_b_1_pins[] = { DB8500_PIN_AF25 };</div><div class='add'>+static const unsigned spi1_b_1_pins[] = { DB8500_PIN_AG15, DB8500_PIN_AF13,</div><div class='add'>+					  DB8500_PIN_AG13, DB8500_PIN_AH15 };</div><div class='add'>+static const unsigned mc3_b_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,</div><div class='add'>+	DB8500_PIN_AH12, DB8500_PIN_AH11, DB8500_PIN_AG10, DB8500_PIN_AH10,</div><div class='add'>+	DB8500_PIN_AJ11, DB8500_PIN_AJ9, DB8500_PIN_AH9, DB8500_PIN_AG9,</div><div class='add'>+	DB8500_PIN_AG8 };</div><div class='add'>+static const unsigned pwl_b_2_pins[] = { DB8500_PIN_AF8 };</div><div class='add'>+static const unsigned pwl_b_3_pins[] = { DB8500_PIN_AG7 };</div><div class='add'>+static const unsigned pwl_b_4_pins[] = { DB8500_PIN_AF7 };</div><div class='add'>+</div><div class='add'>+/* Altfunction C column */</div><div class='add'>+static const unsigned ipjtag_c_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,</div><div class='add'>+	DB8500_PIN_AH4, DB8500_PIN_AH3, DB8500_PIN_AH6 };</div><div class='add'>+static const unsigned ipgpio6_c_1_pins[] = { DB8500_PIN_AG6 };</div><div class='add'>+static const unsigned ipgpio0_c_1_pins[] = { DB8500_PIN_AF6 };</div><div class='add'>+static const unsigned ipgpio1_c_1_pins[] = { DB8500_PIN_AG5 };</div><div class='add'>+static const unsigned ipgpio3_c_1_pins[] = { DB8500_PIN_AF5 };</div><div class='add'>+static const unsigned ipgpio2_c_1_pins[] = { DB8500_PIN_AG4 };</div><div class='add'>+static const unsigned slim0_c_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };</div><div class='add'>+/* Optional 4-bit Memory Stick interface */</div><div class='add'>+static const unsigned ms_c_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,</div><div class='add'>+	DB8500_PIN_AB3, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,</div><div class='add'>+	DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };</div><div class='add'>+static const unsigned iptrigout_c_1_pins[] = { DB8500_PIN_AB4 };</div><div class='add'>+static const unsigned u2rxtx_c_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3 };</div><div class='add'>+static const unsigned u2ctsrts_c_1_pins[] = { DB8500_PIN_V3, DB8500_PIN_V2 };</div><div class='add'>+static const unsigned u0_c_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AE1,</div><div class='add'>+					DB8500_PIN_AE2, DB8500_PIN_AG2 };</div><div class='add'>+static const unsigned ipgpio4_c_1_pins[] = { DB8500_PIN_F3 };</div><div class='add'>+static const unsigned ipgpio5_c_1_pins[] = { DB8500_PIN_F1 };</div><div class='add'>+static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 };</div><div class='add'>+static const unsigned ipgpio7_c_1_pins[] = { DB8500_PIN_G2 };</div><div class='add'>+static const unsigned smcleale_c_1_pins[] = { DB8500_PIN_E1, DB8500_PIN_E2 };</div><div class='add'>+static const unsigned stmape_c_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,</div><div class='add'>+	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };</div><div class='add'>+static const unsigned u2rxtx_c_2_pins[] = { DB8500_PIN_H2, DB8500_PIN_J2 };</div><div class='add'>+static const unsigned ipgpio2_c_2_pins[] = { DB8500_PIN_F4 };</div><div class='add'>+static const unsigned ipgpio3_c_2_pins[] = { DB8500_PIN_E3 };</div><div class='add'>+static const unsigned ipgpio4_c_2_pins[] = { DB8500_PIN_E4 };</div><div class='add'>+static const unsigned ipgpio5_c_2_pins[] = { DB8500_PIN_D2 };</div><div class='add'>+static const unsigned mc5_c_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,</div><div class='add'>+	DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,</div><div class='add'>+	DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,</div><div class='add'>+	DB8500_PIN_D9 };</div><div class='add'>+static const unsigned mc2rstn_c_1_pins[] = { DB8500_PIN_C8 };</div><div class='add'>+static const unsigned kp_c_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,</div><div class='add'>+	DB8500_PIN_C12, DB8500_PIN_C11, DB8500_PIN_D17, DB8500_PIN_D16,</div><div class='add'>+	DB8500_PIN_C23, DB8500_PIN_D23 };</div><div class='add'>+static const unsigned smps1_c_1_pins[] = { DB8500_PIN_B14 };</div><div class='add'>+static const unsigned u2rxtx_c_3_pins[] = { DB8500_PIN_B17, DB8500_PIN_C16 };</div><div class='add'>+static const unsigned stmape_c_2_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,</div><div class='add'>+	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };</div><div class='add'>+static const unsigned uartmodrx_c_1_pins[] = { DB8500_PIN_D21 };</div><div class='add'>+static const unsigned uartmodtx_c_1_pins[] = { DB8500_PIN_D20 };</div><div class='add'>+static const unsigned stmmod_c_1_pins[] = { DB8500_PIN_C20, DB8500_PIN_B21,</div><div class='add'>+	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24 };</div><div class='add'>+static const unsigned usbsim_c_1_pins[] = { DB8500_PIN_D22 };</div><div class='add'>+static const unsigned mc4rstn_c_1_pins[] = { DB8500_PIN_AF25 };</div><div class='add'>+static const unsigned clkout_c_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12 };</div><div class='add'>+static const unsigned i2c3_c_1_pins[] = { DB8500_PIN_AG12, DB8500_PIN_AH11 };</div><div class='add'>+static const unsigned spi0_c_1_pins[] = { DB8500_PIN_AH10, DB8500_PIN_AH9,</div><div class='add'>+					  DB8500_PIN_AG9, DB8500_PIN_AG8 };</div><div class='add'>+static const unsigned usbsim_c_2_pins[] = { DB8500_PIN_AF8 };</div><div class='add'>+static const unsigned i2c3_c_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };</div><div class='add'>+</div><div class='add'>+/* Other C1 column */</div><div class='add'>+static const unsigned kp_oc1_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,</div><div class='add'>+	DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,</div><div class='add'>+	DB8500_PIN_D6, DB8500_PIN_B7 };</div><div class='add'>+static const unsigned spi2_oc1_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,</div><div class='add'>+	DB8500_PIN_AH12, DB8500_PIN_AH11 };</div><div class='add'>+</div><div class='add'>+#define DB8500_PIN_GROUP(a,b) { .name = #a, .pins = a##_pins,		\</div><div class='add'>+			.npins = ARRAY_SIZE(a##_pins), .altsetting = b }</div><div class='add'>+</div><div class='add'>+static const struct nmk_pingroup nmk_db8500_groups[] = {</div><div class='add'>+	/* Altfunction A column */</div><div class='add'>+	DB8500_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(u1rxtx_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(u1ctsrts_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(ipi2c_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(ipi2c_a_2, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(msp0txrx_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(msp0tfstck_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(msp0rfsrck_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(mc0_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(msp1txrx_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(msp1_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(lcdb_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(lcdvsi0_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(lcdvsi1_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(lcd_d0_d7_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(lcd_d8_d11_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(lcd_d12_d23_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(kp_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(mc2_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(ssp1_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(ssp0_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio0_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio1_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(msp2sck_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(msp2_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(mc4_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(clkout_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(clkout_a_2, NMK_GPIO_ALT_A),</div><div class='add'>+	DB8500_PIN_GROUP(usb_a_1, NMK_GPIO_ALT_A),</div><div class='add'>+	/* Altfunction B column */</div><div class='add'>+	DB8500_PIN_GROUP(trig_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(i2c4_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(i2c1_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(i2c2_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(i2c2_b_2, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(msp0txrx_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(i2c1_b_2, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(u2rxtx_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(uartmodtx_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(msp0sck_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(uartmodrx_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(stmmod_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(uartmodrx_b_2, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(spi3_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(msp1txrx_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(kp_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(sm_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(smcs0_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio7_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio2_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio3_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(lcdaclk_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(lcda_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(lcd_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(ddrtrig_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(pwl_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(spi1_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(mc3_b_1, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(pwl_b_2, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(pwl_b_3, NMK_GPIO_ALT_B),</div><div class='add'>+	DB8500_PIN_GROUP(pwl_b_4, NMK_GPIO_ALT_B),</div><div class='add'>+	/* Altfunction C column */</div><div class='add'>+	DB8500_PIN_GROUP(ipjtag_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio0_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio1_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio3_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio2_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(slim0_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ms_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(iptrigout_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(u2rxtx_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(u2ctsrts_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(u0_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio4_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio5_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio7_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(smcleale_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(stmape_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(u2rxtx_c_2, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio2_c_2, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio3_c_2, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio4_c_2, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(ipgpio5_c_2, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(mc5_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(mc2rstn_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(kp_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(smps1_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(u2rxtx_c_3, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(stmape_c_2, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(uartmodrx_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(uartmodtx_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(stmmod_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(usbsim_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(mc4rstn_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(clkout_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(i2c3_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(spi0_c_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(usbsim_c_2, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(i2c3_c_2, NMK_GPIO_ALT_C),</div><div class='add'>+	/* Other alt C1 column, these are still configured as alt C */</div><div class='add'>+	DB8500_PIN_GROUP(kp_oc1_1, NMK_GPIO_ALT_C),</div><div class='add'>+	DB8500_PIN_GROUP(spi2_oc1_1, NMK_GPIO_ALT_C),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* We use this macro to define the groups applicable to a function */</div><div class='add'>+#define DB8500_FUNC_GROUPS(a, b...)	   \</div><div class='add'>+static const char * const a##_groups[] = { b };</div><div class='add'>+</div><div class='add'>+DB8500_FUNC_GROUPS(u0, "u0_a_1", "u0_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(u1, "u1rxtx_a_1", "u1ctsrts_a_1");</div><div class='add'>+/*</div><div class='add'>+ * UART2 can be muxed out with just RX/TX in four places, CTS+RTS is however</div><div class='add'>+ * only available on two pins in alternative function C</div><div class='add'>+ */</div><div class='add'>+DB8500_FUNC_GROUPS(u2, "u2rxtx_b_1", "u2rxtx_c_1", "u2ctsrts_c_1",</div><div class='add'>+		   "u2rxtx_c_2", "u2rxtx_c_3");</div><div class='add'>+DB8500_FUNC_GROUPS(ipi2c, "ipi2c_a_1", "ipi2c_a_2");</div><div class='add'>+/*</div><div class='add'>+ * MSP0 can only be on a certain set of pins, but the TX/RX pins can be</div><div class='add'>+ * switched around by selecting the altfunction A or B. The SCK pin is</div><div class='add'>+ * only available on the altfunction B.</div><div class='add'>+ */</div><div class='add'>+DB8500_FUNC_GROUPS(msp0, "msp0txrx_a_1", "msp0tfstck_a_1", "msp0rfstck_a_1",</div><div class='add'>+		   "msp0txrx_b_1", "msp0sck_b_1");</div><div class='add'>+DB8500_FUNC_GROUPS(mc0, "mc0_a_1");</div><div class='add'>+/* MSP0 can swap RX/TX like MSP0 but has no SCK pin available */</div><div class='add'>+DB8500_FUNC_GROUPS(msp1, "msp1txrx_a_1", "msp1_a_1", "msp1txrx_b_1");</div><div class='add'>+DB8500_FUNC_GROUPS(lcdb, "lcdb_a_1");</div><div class='add'>+DB8500_FUNC_GROUPS(lcd, "lcdvsi0_a_1", "lcdvsi1_a_1", "lcd_d0_d7_a_1",</div><div class='add'>+	"lcd_d8_d11_a_1", "lcd_d12_d23_a_1", "lcd_b_1");</div><div class='add'>+DB8500_FUNC_GROUPS(kp, "kp_a_1", "kp_b_1", "kp_c_1", "kp_oc1_1");</div><div class='add'>+DB8500_FUNC_GROUPS(mc2, "mc2_a_1", "mc2rstn_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(ssp1, "ssp1_a_1");</div><div class='add'>+DB8500_FUNC_GROUPS(ssp0, "ssp0_a_1");</div><div class='add'>+DB8500_FUNC_GROUPS(i2c0, "i2c0_a_1");</div><div class='add'>+/* The image processor has 8 GPIO pins that can be muxed out */</div><div class='add'>+DB8500_FUNC_GROUPS(ipgpio, "ipgpio0_a_1", "ipgpio1_a_1", "ipgpio7_b_1",</div><div class='add'>+	"ipgpio2_b_1", "ipgpio3_b_1", "ipgpio6_c_1", "ipgpio0_c_1",</div><div class='add'>+	"ipgpio1_c_1", "ipgpio3_c_1", "ipgpio2_c_1", "ipgpio4_c_1",</div><div class='add'>+	"ipgpio5_c_1", "ipgpio6_c_2", "ipgpio7_c_1", "ipgpio2_c_2",</div><div class='add'>+	"ipgpio3_c_2", "ipgpio4_c_2", "ipgpio5_c_2");</div><div class='add'>+/* MSP2 can not invert the RX/TX pins but has the optional SCK pin */</div><div class='add'>+DB8500_FUNC_GROUPS(msp2, "msp2sck_a_1", "msp2_a_1");</div><div class='add'>+DB8500_FUNC_GROUPS(mc4, "mc4_a_1", "mc4rstn_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1dir_a_1");</div><div class='add'>+DB8500_FUNC_GROUPS(hsi, "hsir1_a_1", "hsit1_a_1");</div><div class='add'>+DB8500_FUNC_GROUPS(clkout, "clkout_a_1", "clkout_a_2", "clkout_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(usb, "usb_a_1");</div><div class='add'>+DB8500_FUNC_GROUPS(trig, "trig_b_1");</div><div class='add'>+DB8500_FUNC_GROUPS(i2c4, "i2c4_b_1");</div><div class='add'>+DB8500_FUNC_GROUPS(i2c1, "i2c1_b_1", "i2c1_b_2");</div><div class='add'>+DB8500_FUNC_GROUPS(i2c2, "i2c2_b_1", "i2c2_b_2");</div><div class='add'>+/*</div><div class='add'>+ * The modem UART can output its RX and TX pins in some different places,</div><div class='add'>+ * so select one of each.</div><div class='add'>+ */</div><div class='add'>+DB8500_FUNC_GROUPS(uartmod, "uartmodtx_b_1", "uartmodrx_b_1", "uartmodrx_b_2",</div><div class='add'>+		   "uartmodrx_c_1", "uartmod_tx_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(stmmod, "stmmod_b_1", "stmmod_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(spi3, "spi3_b_1");</div><div class='add'>+/* Select between CS0 on alt B or PS1 on alt C */</div><div class='add'>+DB8500_FUNC_GROUPS(sm, "sm_b_1", "smcs0_b_1", "smcleale_c_1", "smps1_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(lcda, "lcdaclk_b_1", "lcda_b_1");</div><div class='add'>+DB8500_FUNC_GROUPS(ddrtrig, "ddrtrig_b_1");</div><div class='add'>+DB8500_FUNC_GROUPS(pwl, "pwl_b_1", "pwl_b_2", "pwl_b_3", "pwl_b_4");</div><div class='add'>+DB8500_FUNC_GROUPS(spi1, "spi1_b_1");</div><div class='add'>+DB8500_FUNC_GROUPS(mc3, "mc3_b_1");</div><div class='add'>+DB8500_FUNC_GROUPS(ipjtag, "ipjtag_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(slim0, "slim0_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(ms, "ms_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(iptrigout, "iptrigout_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(stmape, "stmape_c_1", "stmape_c_2");</div><div class='add'>+DB8500_FUNC_GROUPS(mc5, "mc5_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(usbsim, "usbsim_c_1", "usbsim_c_2");</div><div class='add'>+DB8500_FUNC_GROUPS(i2c3, "i2c3_c_1", "i2c3_c_2");</div><div class='add'>+DB8500_FUNC_GROUPS(spi0, "spi0_c_1");</div><div class='add'>+DB8500_FUNC_GROUPS(spi2, "spi2_oc1_1");</div><div class='add'>+</div><div class='add'>+#define FUNCTION(fname)					\</div><div class='add'>+	{						\</div><div class='add'>+		.name = #fname,				\</div><div class='add'>+		.groups = fname##_groups,		\</div><div class='add'>+		.ngroups = ARRAY_SIZE(fname##_groups),	\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+static const struct nmk_function nmk_db8500_functions[] = {</div><div class='add'>+	FUNCTION(u0),</div><div class='add'>+	FUNCTION(u1),</div><div class='add'>+	FUNCTION(u2),</div><div class='add'>+	FUNCTION(ipi2c),</div><div class='add'>+	FUNCTION(msp0),</div><div class='add'>+	FUNCTION(mc0),</div><div class='add'>+	FUNCTION(msp1),</div><div class='add'>+	FUNCTION(lcdb),</div><div class='add'>+	FUNCTION(lcd),</div><div class='add'>+	FUNCTION(kp),</div><div class='add'>+	FUNCTION(mc2),</div><div class='add'>+	FUNCTION(ssp1),</div><div class='add'>+	FUNCTION(ssp0),</div><div class='add'>+	FUNCTION(i2c0),</div><div class='add'>+	FUNCTION(ipgpio),</div><div class='add'>+	FUNCTION(msp2),</div><div class='add'>+	FUNCTION(mc4),</div><div class='add'>+	FUNCTION(mc1),</div><div class='add'>+	FUNCTION(hsi),</div><div class='add'>+	FUNCTION(clkout),</div><div class='add'>+	FUNCTION(usb),</div><div class='add'>+	FUNCTION(trig),</div><div class='add'>+	FUNCTION(i2c4),</div><div class='add'>+	FUNCTION(i2c1),</div><div class='add'>+	FUNCTION(i2c2),</div><div class='add'>+	FUNCTION(uartmod),</div><div class='add'>+	FUNCTION(stmmod),</div><div class='add'>+	FUNCTION(spi3),</div><div class='add'>+	FUNCTION(sm),</div><div class='add'>+	FUNCTION(lcda),</div><div class='add'>+	FUNCTION(ddrtrig),</div><div class='add'>+	FUNCTION(pwl),</div><div class='add'>+	FUNCTION(spi1),</div><div class='add'>+	FUNCTION(mc3),</div><div class='add'>+	FUNCTION(ipjtag),</div><div class='add'>+	FUNCTION(slim0),</div><div class='add'>+	FUNCTION(ms),</div><div class='add'>+	FUNCTION(iptrigout),</div><div class='add'>+	FUNCTION(stmape),</div><div class='add'>+	FUNCTION(mc5),</div><div class='add'>+	FUNCTION(usbsim),</div><div class='add'>+	FUNCTION(i2c3),</div><div class='add'>+	FUNCTION(spi0),</div><div class='add'>+	FUNCTION(spi2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct nmk_pinctrl_soc_data nmk_db8500_soc = {</div><div class='add'>+	.gpio_ranges = nmk_db8500_ranges,</div><div class='add'>+	.gpio_num_ranges = ARRAY_SIZE(nmk_db8500_ranges),</div><div class='add'>+	.pins = nmk_db8500_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(nmk_db8500_pins),</div><div class='add'>+	.functions = nmk_db8500_functions,</div><div class='add'>+	.nfunctions = ARRAY_SIZE(nmk_db8500_functions),</div><div class='add'>+	.groups = nmk_db8500_groups,</div><div class='add'>+	.ngroups = ARRAY_SIZE(nmk_db8500_groups),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __devinit</div><div class='add'>+nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)</div><div class='add'>+{</div><div class='add'>+	*soc = &amp;nmk_db8500_soc;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/pinctrl/pinctrl-nomadik.c<br/>index 839624f9fe6a..b26395d16347 100644<br/>--- a/<a href='/drm-misc/tree/drivers/gpio/gpio-nomadik.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/gpio/gpio-nomadik.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-nomadik.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-nomadik.c</a></div><div class='hunk'>@@ -22,14 +22,21 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinmux.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinconf.h&gt;</div><div class='add'>+/* Since we request GPIOs from ourself */</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mach/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;plat/pincfg.h&gt;</div><div class='ctx'> #include &lt;plat/gpio-nomadik.h&gt;</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-#include &lt;asm/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "pinctrl-nomadik.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The GPIO module in the Nomadik family of Systems-on-Chip is an</div><div class='hunk'>@@ -43,6 +50,7 @@</div><div class='ctx'> </div><div class='ctx'> struct nmk_gpio_chip {</div><div class='ctx'> 	struct gpio_chip chip;</div><div class='add'>+	struct irq_domain *domain;</div><div class='ctx'> 	void __iomem *addr;</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	unsigned int bank;</div><div class='hunk'>@@ -58,8 +66,16 @@ struct nmk_gpio_chip {</div><div class='ctx'> 	u32 real_wake;</div><div class='ctx'> 	u32 rwimsc;</div><div class='ctx'> 	u32 fwimsc;</div><div class='del'>-	u32 slpm;</div><div class='add'>+	u32 rimsc;</div><div class='add'>+	u32 fimsc;</div><div class='ctx'> 	u32 pull_up;</div><div class='add'>+	u32 lowemi;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nmk_pinctrl {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct pinctrl_dev *pctl;</div><div class='add'>+	const struct nmk_pinctrl_soc_data *soc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct nmk_gpio_chip *</div><div class='hunk'>@@ -124,6 +140,24 @@ static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __nmk_gpio_set_lowemi(struct nmk_gpio_chip *nmk_chip,</div><div class='add'>+				  unsigned offset, bool lowemi)</div><div class='add'>+{</div><div class='add'>+	u32 bit = BIT(offset);</div><div class='add'>+	bool enabled = nmk_chip-&gt;lowemi &amp; bit;</div><div class='add'>+</div><div class='add'>+	if (lowemi == enabled)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (lowemi)</div><div class='add'>+		nmk_chip-&gt;lowemi |= bit;</div><div class='add'>+	else</div><div class='add'>+		nmk_chip-&gt;lowemi &amp;= ~bit;</div><div class='add'>+</div><div class='add'>+	writel_relaxed(nmk_chip-&gt;lowemi,</div><div class='add'>+		       nmk_chip-&gt;addr + NMK_GPIO_LOWEMI);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,</div><div class='ctx'> 				  unsigned offset)</div><div class='ctx'> {</div><div class='hunk'>@@ -150,8 +184,8 @@ static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip,</div><div class='ctx'> 				     unsigned offset, int gpio_mode,</div><div class='ctx'> 				     bool glitch)</div><div class='ctx'> {</div><div class='del'>-	u32 rwimsc = readl(nmk_chip-&gt;addr + NMK_GPIO_RWIMSC);</div><div class='del'>-	u32 fwimsc = readl(nmk_chip-&gt;addr + NMK_GPIO_FWIMSC);</div><div class='add'>+	u32 rwimsc = nmk_chip-&gt;rwimsc;</div><div class='add'>+	u32 fwimsc = nmk_chip-&gt;fwimsc;</div><div class='ctx'> </div><div class='ctx'> 	if (glitch &amp;&amp; nmk_chip-&gt;set_ioforce) {</div><div class='ctx'> 		u32 bit = BIT(offset);</div><div class='hunk'>@@ -173,6 +207,36 @@ static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	u32 falling = nmk_chip-&gt;fimsc &amp; BIT(offset);</div><div class='add'>+	u32 rising = nmk_chip-&gt;rimsc &amp; BIT(offset);</div><div class='add'>+	int gpio = nmk_chip-&gt;chip.base + offset;</div><div class='add'>+	int irq = NOMADIK_GPIO_TO_IRQ(gpio);</div><div class='add'>+	struct irq_data *d = irq_get_irq_data(irq);</div><div class='add'>+</div><div class='add'>+	if (!rising &amp;&amp; !falling)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!d || !irqd_irq_disabled(d))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (rising) {</div><div class='add'>+		nmk_chip-&gt;rimsc &amp;= ~BIT(offset);</div><div class='add'>+		writel_relaxed(nmk_chip-&gt;rimsc,</div><div class='add'>+			       nmk_chip-&gt;addr + NMK_GPIO_RIMSC);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (falling) {</div><div class='add'>+		nmk_chip-&gt;fimsc &amp;= ~BIT(offset);</div><div class='add'>+		writel_relaxed(nmk_chip-&gt;fimsc,</div><div class='add'>+			       nmk_chip-&gt;addr + NMK_GPIO_FIMSC);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(nmk_chip-&gt;chip.dev, "%d: clearing interrupt mask\n", gpio);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,</div><div class='ctx'> 			     pin_cfg_t cfg, bool sleep, unsigned int *slpmregs)</div><div class='ctx'> {</div><div class='hunk'>@@ -238,6 +302,17 @@ static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,</div><div class='ctx'> 		__nmk_gpio_set_pull(nmk_chip, offset, pull);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	__nmk_gpio_set_lowemi(nmk_chip, offset, PIN_LOWEMI(cfg));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the pin is switching to altfunc, and there was an interrupt</div><div class='add'>+	 * installed on it which has been lazy disabled, actually mask the</div><div class='add'>+	 * interrupt to prevent spurious interrupts that would occur while the</div><div class='add'>+	 * pin is under control of the peripheral.  Only SKE does this.</div><div class='add'>+	 */</div><div class='add'>+	if (af != NMK_GPIO_ALT_GPIO)</div><div class='add'>+		nmk_gpio_disable_lazy_irq(nmk_chip, offset);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we've backed up the SLPM registers (glitch workaround), modify</div><div class='ctx'> 	 * the backups since they will be restored.</div><div class='hunk'>@@ -334,7 +409,7 @@ static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)</div><div class='ctx'> 		struct nmk_gpio_chip *nmk_chip;</div><div class='ctx'> 		int pin = PIN_NUM(cfgs[i]);</div><div class='ctx'> </div><div class='del'>-		nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(pin));</div><div class='add'>+		nmk_chip = nmk_gpio_chips[pin / NMK_GPIO_PER_CHIP];</div><div class='ctx'> 		if (!nmk_chip) {</div><div class='ctx'> 			ret = -EINVAL;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -342,7 +417,7 @@ static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)</div><div class='ctx'> </div><div class='ctx'> 		clk_enable(nmk_chip-&gt;clk);</div><div class='ctx'> 		spin_lock(&amp;nmk_chip-&gt;lock);</div><div class='del'>-		__nmk_config_pin(nmk_chip, pin - nmk_chip-&gt;chip.base,</div><div class='add'>+		__nmk_config_pin(nmk_chip, pin % NMK_GPIO_PER_CHIP,</div><div class='ctx'> 				 cfgs[i], sleep, glitch ? slpm : NULL);</div><div class='ctx'> 		spin_unlock(&amp;nmk_chip-&gt;lock);</div><div class='ctx'> 		clk_disable(nmk_chip-&gt;clk);</div><div class='hunk'>@@ -426,7 +501,7 @@ int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)</div><div class='ctx'> 	struct nmk_gpio_chip *nmk_chip;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));</div><div class='add'>+	nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];</div><div class='ctx'> 	if (!nmk_chip)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -434,7 +509,7 @@ int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)</div><div class='ctx'> 	spin_lock_irqsave(&amp;nmk_gpio_slpm_lock, flags);</div><div class='ctx'> 	spin_lock(&amp;nmk_chip-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	__nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip-&gt;chip.base, mode);</div><div class='add'>+	__nmk_gpio_set_slpm(nmk_chip, gpio % NMK_GPIO_PER_CHIP, mode);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;nmk_chip-&gt;lock);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;nmk_gpio_slpm_lock, flags);</div><div class='hunk'>@@ -461,13 +536,13 @@ int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)</div><div class='ctx'> 	struct nmk_gpio_chip *nmk_chip;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));</div><div class='add'>+	nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];</div><div class='ctx'> 	if (!nmk_chip)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	clk_enable(nmk_chip-&gt;clk);</div><div class='ctx'> 	spin_lock_irqsave(&amp;nmk_chip-&gt;lock, flags);</div><div class='del'>-	__nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip-&gt;chip.base, pull);</div><div class='add'>+	__nmk_gpio_set_pull(nmk_chip, gpio % NMK_GPIO_PER_CHIP, pull);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;nmk_chip-&gt;lock, flags);</div><div class='ctx'> 	clk_disable(nmk_chip-&gt;clk);</div><div class='ctx'> </div><div class='hunk'>@@ -489,13 +564,13 @@ int nmk_gpio_set_mode(int gpio, int gpio_mode)</div><div class='ctx'> 	struct nmk_gpio_chip *nmk_chip;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));</div><div class='add'>+	nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];</div><div class='ctx'> 	if (!nmk_chip)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	clk_enable(nmk_chip-&gt;clk);</div><div class='ctx'> 	spin_lock_irqsave(&amp;nmk_chip-&gt;lock, flags);</div><div class='del'>-	__nmk_gpio_set_mode(nmk_chip, gpio - nmk_chip-&gt;chip.base, gpio_mode);</div><div class='add'>+	__nmk_gpio_set_mode(nmk_chip, gpio % NMK_GPIO_PER_CHIP, gpio_mode);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;nmk_chip-&gt;lock, flags);</div><div class='ctx'> 	clk_disable(nmk_chip-&gt;clk);</div><div class='ctx'> </div><div class='hunk'>@@ -508,11 +583,11 @@ int nmk_gpio_get_mode(int gpio)</div><div class='ctx'> 	struct nmk_gpio_chip *nmk_chip;</div><div class='ctx'> 	u32 afunc, bfunc, bit;</div><div class='ctx'> </div><div class='del'>-	nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));</div><div class='add'>+	nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];</div><div class='ctx'> 	if (!nmk_chip)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	bit = 1 &lt;&lt; (gpio - nmk_chip-&gt;chip.base);</div><div class='add'>+	bit = 1 &lt;&lt; (gpio % NMK_GPIO_PER_CHIP);</div><div class='ctx'> </div><div class='ctx'> 	clk_enable(nmk_chip-&gt;clk);</div><div class='ctx'> </div><div class='hunk'>@@ -529,21 +604,19 @@ EXPORT_SYMBOL(nmk_gpio_get_mode);</div><div class='ctx'> /* IRQ functions */</div><div class='ctx'> static inline int nmk_gpio_get_bitmask(int gpio)</div><div class='ctx'> {</div><div class='del'>-	return 1 &lt;&lt; (gpio % 32);</div><div class='add'>+	return 1 &lt;&lt; (gpio % NMK_GPIO_PER_CHIP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void nmk_gpio_irq_ack(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	int gpio;</div><div class='ctx'> 	struct nmk_gpio_chip *nmk_chip;</div><div class='ctx'> </div><div class='del'>-	gpio = NOMADIK_IRQ_TO_GPIO(d-&gt;irq);</div><div class='ctx'> 	nmk_chip = irq_data_get_irq_chip_data(d);</div><div class='ctx'> 	if (!nmk_chip)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	clk_enable(nmk_chip-&gt;clk);</div><div class='del'>-	writel(nmk_gpio_get_bitmask(gpio), nmk_chip-&gt;addr + NMK_GPIO_IC);</div><div class='add'>+	writel(nmk_gpio_get_bitmask(d-&gt;hwirq), nmk_chip-&gt;addr + NMK_GPIO_IC);</div><div class='ctx'> 	clk_disable(nmk_chip-&gt;clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -556,37 +629,52 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,</div><div class='ctx'> 				  int gpio, enum nmk_gpio_irq_type which,</div><div class='ctx'> 				  bool enable)</div><div class='ctx'> {</div><div class='del'>-	u32 rimsc = which == WAKE ? NMK_GPIO_RWIMSC : NMK_GPIO_RIMSC;</div><div class='del'>-	u32 fimsc = which == WAKE ? NMK_GPIO_FWIMSC : NMK_GPIO_FIMSC;</div><div class='ctx'> 	u32 bitmask = nmk_gpio_get_bitmask(gpio);</div><div class='del'>-	u32 reg;</div><div class='add'>+	u32 *rimscval;</div><div class='add'>+	u32 *fimscval;</div><div class='add'>+	u32 rimscreg;</div><div class='add'>+	u32 fimscreg;</div><div class='add'>+</div><div class='add'>+	if (which == NORMAL) {</div><div class='add'>+		rimscreg = NMK_GPIO_RIMSC;</div><div class='add'>+		fimscreg = NMK_GPIO_FIMSC;</div><div class='add'>+		rimscval = &amp;nmk_chip-&gt;rimsc;</div><div class='add'>+		fimscval = &amp;nmk_chip-&gt;fimsc;</div><div class='add'>+	} else  {</div><div class='add'>+		rimscreg = NMK_GPIO_RWIMSC;</div><div class='add'>+		fimscreg = NMK_GPIO_FWIMSC;</div><div class='add'>+		rimscval = &amp;nmk_chip-&gt;rwimsc;</div><div class='add'>+		fimscval = &amp;nmk_chip-&gt;fwimsc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* we must individually set/clear the two edges */</div><div class='ctx'> 	if (nmk_chip-&gt;edge_rising &amp; bitmask) {</div><div class='del'>-		reg = readl(nmk_chip-&gt;addr + rimsc);</div><div class='ctx'> 		if (enable)</div><div class='del'>-			reg |= bitmask;</div><div class='add'>+			*rimscval |= bitmask;</div><div class='ctx'> 		else</div><div class='del'>-			reg &amp;= ~bitmask;</div><div class='del'>-		writel(reg, nmk_chip-&gt;addr + rimsc);</div><div class='add'>+			*rimscval &amp;= ~bitmask;</div><div class='add'>+		writel(*rimscval, nmk_chip-&gt;addr + rimscreg);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (nmk_chip-&gt;edge_falling &amp; bitmask) {</div><div class='del'>-		reg = readl(nmk_chip-&gt;addr + fimsc);</div><div class='ctx'> 		if (enable)</div><div class='del'>-			reg |= bitmask;</div><div class='add'>+			*fimscval |= bitmask;</div><div class='ctx'> 		else</div><div class='del'>-			reg &amp;= ~bitmask;</div><div class='del'>-		writel(reg, nmk_chip-&gt;addr + fimsc);</div><div class='add'>+			*fimscval &amp;= ~bitmask;</div><div class='add'>+		writel(*fimscval, nmk_chip-&gt;addr + fimscreg);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,</div><div class='ctx'> 				int gpio, bool on)</div><div class='ctx'> {</div><div class='del'>-	if (nmk_chip-&gt;sleepmode) {</div><div class='del'>-		__nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip-&gt;chip.base,</div><div class='del'>-				    on ? NMK_GPIO_SLPM_WAKEUP_ENABLE</div><div class='del'>-				    : NMK_GPIO_SLPM_WAKEUP_DISABLE);</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure WAKEUP_ENABLE is on.  No need to disable it if wakeup is</div><div class='add'>+	 * disabled, since setting SLPM to 1 increases power consumption, and</div><div class='add'>+	 * wakeup is anyhow controlled by the RIMSC and FIMSC registers.</div><div class='add'>+	 */</div><div class='add'>+	if (nmk_chip-&gt;sleepmode &amp;&amp; on) {</div><div class='add'>+		__nmk_gpio_set_slpm(nmk_chip, gpio % nmk_chip-&gt;chip.base,</div><div class='add'>+				    NMK_GPIO_SLPM_WAKEUP_ENABLE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	__nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);</div><div class='hunk'>@@ -594,14 +682,12 @@ static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,</div><div class='ctx'> </div><div class='ctx'> static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)</div><div class='ctx'> {</div><div class='del'>-	int gpio;</div><div class='ctx'> 	struct nmk_gpio_chip *nmk_chip;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 bitmask;</div><div class='ctx'> </div><div class='del'>-	gpio = NOMADIK_IRQ_TO_GPIO(d-&gt;irq);</div><div class='ctx'> 	nmk_chip = irq_data_get_irq_chip_data(d);</div><div class='del'>-	bitmask = nmk_gpio_get_bitmask(gpio);</div><div class='add'>+	bitmask = nmk_gpio_get_bitmask(d-&gt;hwirq);</div><div class='ctx'> 	if (!nmk_chip)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -609,10 +695,10 @@ static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)</div><div class='ctx'> 	spin_lock_irqsave(&amp;nmk_gpio_slpm_lock, flags);</div><div class='ctx'> 	spin_lock(&amp;nmk_chip-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	__nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, enable);</div><div class='add'>+	__nmk_gpio_irq_modify(nmk_chip, d-&gt;hwirq, NORMAL, enable);</div><div class='ctx'> </div><div class='ctx'> 	if (!(nmk_chip-&gt;real_wake &amp; bitmask))</div><div class='del'>-		__nmk_gpio_set_wake(nmk_chip, gpio, enable);</div><div class='add'>+		__nmk_gpio_set_wake(nmk_chip, d-&gt;hwirq, enable);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;nmk_chip-&gt;lock);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;nmk_gpio_slpm_lock, flags);</div><div class='hunk'>@@ -636,20 +722,18 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)</div><div class='ctx'> 	struct nmk_gpio_chip *nmk_chip;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 bitmask;</div><div class='del'>-	int gpio;</div><div class='ctx'> </div><div class='del'>-	gpio = NOMADIK_IRQ_TO_GPIO(d-&gt;irq);</div><div class='ctx'> 	nmk_chip = irq_data_get_irq_chip_data(d);</div><div class='ctx'> 	if (!nmk_chip)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	bitmask = nmk_gpio_get_bitmask(gpio);</div><div class='add'>+	bitmask = nmk_gpio_get_bitmask(d-&gt;hwirq);</div><div class='ctx'> </div><div class='ctx'> 	clk_enable(nmk_chip-&gt;clk);</div><div class='ctx'> 	spin_lock_irqsave(&amp;nmk_gpio_slpm_lock, flags);</div><div class='ctx'> 	spin_lock(&amp;nmk_chip-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (irqd_irq_disabled(d))</div><div class='del'>-		__nmk_gpio_set_wake(nmk_chip, gpio, on);</div><div class='add'>+		__nmk_gpio_set_wake(nmk_chip, d-&gt;hwirq, on);</div><div class='ctx'> </div><div class='ctx'> 	if (on)</div><div class='ctx'> 		nmk_chip-&gt;real_wake |= bitmask;</div><div class='hunk'>@@ -667,17 +751,14 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> {</div><div class='ctx'> 	bool enabled = !irqd_irq_disabled(d);</div><div class='ctx'> 	bool wake = irqd_is_wakeup_set(d);</div><div class='del'>-	int gpio;</div><div class='ctx'> 	struct nmk_gpio_chip *nmk_chip;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 bitmask;</div><div class='ctx'> </div><div class='del'>-	gpio = NOMADIK_IRQ_TO_GPIO(d-&gt;irq);</div><div class='ctx'> 	nmk_chip = irq_data_get_irq_chip_data(d);</div><div class='del'>-	bitmask = nmk_gpio_get_bitmask(gpio);</div><div class='add'>+	bitmask = nmk_gpio_get_bitmask(d-&gt;hwirq);</div><div class='ctx'> 	if (!nmk_chip)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	if (type &amp; IRQ_TYPE_LEVEL_HIGH)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (type &amp; IRQ_TYPE_LEVEL_LOW)</div><div class='hunk'>@@ -687,10 +768,10 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> 	spin_lock_irqsave(&amp;nmk_chip-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (enabled)</div><div class='del'>-		__nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false);</div><div class='add'>+		__nmk_gpio_irq_modify(nmk_chip, d-&gt;hwirq, NORMAL, false);</div><div class='ctx'> </div><div class='ctx'> 	if (enabled || wake)</div><div class='del'>-		__nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false);</div><div class='add'>+		__nmk_gpio_irq_modify(nmk_chip, d-&gt;hwirq, WAKE, false);</div><div class='ctx'> </div><div class='ctx'> 	nmk_chip-&gt;edge_rising &amp;= ~bitmask;</div><div class='ctx'> 	if (type &amp; IRQ_TYPE_EDGE_RISING)</div><div class='hunk'>@@ -701,10 +782,10 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> 		nmk_chip-&gt;edge_falling |= bitmask;</div><div class='ctx'> </div><div class='ctx'> 	if (enabled)</div><div class='del'>-		__nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true);</div><div class='add'>+		__nmk_gpio_irq_modify(nmk_chip, d-&gt;hwirq, NORMAL, true);</div><div class='ctx'> </div><div class='ctx'> 	if (enabled || wake)</div><div class='del'>-		__nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true);</div><div class='add'>+		__nmk_gpio_irq_modify(nmk_chip, d-&gt;hwirq, WAKE, true);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;nmk_chip-&gt;lock, flags);</div><div class='ctx'> 	clk_disable(nmk_chip-&gt;clk);</div><div class='hunk'>@@ -750,7 +831,7 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,</div><div class='ctx'> 	chained_irq_enter(host_chip, desc);</div><div class='ctx'> </div><div class='ctx'> 	nmk_chip = irq_get_handler_data(irq);</div><div class='del'>-	first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip-&gt;chip.base);</div><div class='add'>+	first_irq = nmk_chip-&gt;domain-&gt;revmap_data.legacy.first_irq;</div><div class='ctx'> 	while (status) {</div><div class='ctx'> 		int bit = __ffs(status);</div><div class='ctx'> </div><div class='hunk'>@@ -784,18 +865,6 @@ static void nmk_gpio_secondary_irq_handler(unsigned int irq,</div><div class='ctx'> </div><div class='ctx'> static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)</div><div class='ctx'> {</div><div class='del'>-	unsigned int first_irq;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip-&gt;chip.base);</div><div class='del'>-	for (i = first_irq; i &lt; first_irq + nmk_chip-&gt;chip.ngpio; i++) {</div><div class='del'>-		irq_set_chip_and_handler(i, &amp;nmk_gpio_irq_chip,</div><div class='del'>-					 handle_edge_irq);</div><div class='del'>-		set_irq_flags(i, IRQF_VALID);</div><div class='del'>-		irq_set_chip_data(i, nmk_chip);</div><div class='del'>-		irq_set_irq_type(i, IRQ_TYPE_EDGE_FALLING);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	irq_set_chained_handler(nmk_chip-&gt;parent_irq, nmk_gpio_irq_handler);</div><div class='ctx'> 	irq_set_handler_data(nmk_chip-&gt;parent_irq, nmk_chip);</div><div class='ctx'> </div><div class='hunk'>@@ -809,6 +878,25 @@ static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* I/O Functions */</div><div class='add'>+</div><div class='add'>+static int nmk_gpio_request(struct gpio_chip *chip, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Map back to global GPIO space and request muxing, the direction</div><div class='add'>+	 * parameter does not matter for this controller.</div><div class='add'>+	 */</div><div class='add'>+	int gpio = chip-&gt;base + offset;</div><div class='add'>+</div><div class='add'>+	return pinctrl_request_gpio(gpio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nmk_gpio_free(struct gpio_chip *chip, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	int gpio = chip-&gt;base + offset;</div><div class='add'>+</div><div class='add'>+	pinctrl_free_gpio(gpio);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct nmk_gpio_chip *nmk_chip =</div><div class='hunk'>@@ -872,21 +960,23 @@ static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> 	struct nmk_gpio_chip *nmk_chip =</div><div class='ctx'> 		container_of(chip, struct nmk_gpio_chip, chip);</div><div class='ctx'> </div><div class='del'>-	return NOMADIK_GPIO_TO_IRQ(nmk_chip-&gt;chip.base) + offset;</div><div class='add'>+	return irq_find_mapping(nmk_chip-&gt;domain, offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> </div><div class='del'>-static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)</div><div class='add'>+static void nmk_gpio_dbg_show_one(struct seq_file *s, struct gpio_chip *chip,</div><div class='add'>+				  unsigned offset, unsigned gpio)</div><div class='ctx'> {</div><div class='del'>-	int mode;</div><div class='del'>-	unsigned		i;</div><div class='del'>-	unsigned		gpio = chip-&gt;base;</div><div class='del'>-	int			is_out;</div><div class='add'>+	const char *label = gpiochip_is_requested(chip, offset);</div><div class='ctx'> 	struct nmk_gpio_chip *nmk_chip =</div><div class='ctx'> 		container_of(chip, struct nmk_gpio_chip, chip);</div><div class='add'>+	int mode;</div><div class='add'>+	bool is_out;</div><div class='add'>+	bool pull;</div><div class='add'>+	u32 bit = 1 &lt;&lt; offset;</div><div class='ctx'> 	const char *modes[] = {</div><div class='ctx'> 		[NMK_GPIO_ALT_GPIO]	= "gpio",</div><div class='ctx'> 		[NMK_GPIO_ALT_A]	= "altA",</div><div class='hunk'>@@ -895,61 +985,70 @@ static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	clk_enable(nmk_chip-&gt;clk);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; chip-&gt;ngpio; i++, gpio++) {</div><div class='del'>-		const char *label = gpiochip_is_requested(chip, i);</div><div class='del'>-		bool pull;</div><div class='del'>-		u32 bit = 1 &lt;&lt; i;</div><div class='del'>-</div><div class='del'>-		is_out = readl(nmk_chip-&gt;addr + NMK_GPIO_DIR) &amp; bit;</div><div class='del'>-		pull = !(readl(nmk_chip-&gt;addr + NMK_GPIO_PDIS) &amp; bit);</div><div class='del'>-		mode = nmk_gpio_get_mode(gpio);</div><div class='del'>-		seq_printf(s, " gpio-%-3d (%-20.20s) %s %s %s %s",</div><div class='del'>-			gpio, label ?: "(none)",</div><div class='del'>-			is_out ? "out" : "in ",</div><div class='del'>-			chip-&gt;get</div><div class='del'>-				? (chip-&gt;get(chip, i) ? "hi" : "lo")</div><div class='del'>-				: "?  ",</div><div class='del'>-			(mode &lt; 0) ? "unknown" : modes[mode],</div><div class='del'>-			pull ? "pull" : "none");</div><div class='del'>-</div><div class='del'>-		if (label &amp;&amp; !is_out) {</div><div class='del'>-			int		irq = gpio_to_irq(gpio);</div><div class='del'>-			struct irq_desc	*desc = irq_to_desc(irq);</div><div class='del'>-</div><div class='del'>-			/* This races with request_irq(), set_irq_type(),</div><div class='del'>-			 * and set_irq_wake() ... but those are "rare".</div><div class='del'>-			 */</div><div class='del'>-			if (irq &gt;= 0 &amp;&amp; desc-&gt;action) {</div><div class='del'>-				char *trigger;</div><div class='del'>-				u32 bitmask = nmk_gpio_get_bitmask(gpio);</div><div class='del'>-</div><div class='del'>-				if (nmk_chip-&gt;edge_rising &amp; bitmask)</div><div class='del'>-					trigger = "edge-rising";</div><div class='del'>-				else if (nmk_chip-&gt;edge_falling &amp; bitmask)</div><div class='del'>-					trigger = "edge-falling";</div><div class='del'>-				else</div><div class='del'>-					trigger = "edge-undefined";</div><div class='del'>-</div><div class='del'>-				seq_printf(s, " irq-%d %s%s",</div><div class='del'>-					irq, trigger,</div><div class='del'>-					irqd_is_wakeup_set(&amp;desc-&gt;irq_data)</div><div class='del'>-						? " wakeup" : "");</div><div class='del'>-			}</div><div class='add'>+	is_out = !!(readl(nmk_chip-&gt;addr + NMK_GPIO_DIR) &amp; bit);</div><div class='add'>+	pull = !(readl(nmk_chip-&gt;addr + NMK_GPIO_PDIS) &amp; bit);</div><div class='add'>+	mode = nmk_gpio_get_mode(gpio);</div><div class='add'>+</div><div class='add'>+	seq_printf(s, " gpio-%-3d (%-20.20s) %s %s %s %s",</div><div class='add'>+		   gpio, label ?: "(none)",</div><div class='add'>+		   is_out ? "out" : "in ",</div><div class='add'>+		   chip-&gt;get</div><div class='add'>+		   ? (chip-&gt;get(chip, offset) ? "hi" : "lo")</div><div class='add'>+		   : "?  ",</div><div class='add'>+		   (mode &lt; 0) ? "unknown" : modes[mode],</div><div class='add'>+		   pull ? "pull" : "none");</div><div class='add'>+</div><div class='add'>+	if (label &amp;&amp; !is_out) {</div><div class='add'>+		int		irq = gpio_to_irq(gpio);</div><div class='add'>+		struct irq_desc	*desc = irq_to_desc(irq);</div><div class='add'>+</div><div class='add'>+		/* This races with request_irq(), set_irq_type(),</div><div class='add'>+		 * and set_irq_wake() ... but those are "rare".</div><div class='add'>+		 */</div><div class='add'>+		if (irq &gt;= 0 &amp;&amp; desc-&gt;action) {</div><div class='add'>+			char *trigger;</div><div class='add'>+			u32 bitmask = nmk_gpio_get_bitmask(gpio);</div><div class='add'>+</div><div class='add'>+			if (nmk_chip-&gt;edge_rising &amp; bitmask)</div><div class='add'>+				trigger = "edge-rising";</div><div class='add'>+			else if (nmk_chip-&gt;edge_falling &amp; bitmask)</div><div class='add'>+				trigger = "edge-falling";</div><div class='add'>+			else</div><div class='add'>+				trigger = "edge-undefined";</div><div class='add'>+</div><div class='add'>+			seq_printf(s, " irq-%d %s%s",</div><div class='add'>+				   irq, trigger,</div><div class='add'>+				   irqd_is_wakeup_set(&amp;desc-&gt;irq_data)</div><div class='add'>+				   ? " wakeup" : "");</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='add'>+	clk_disable(nmk_chip-&gt;clk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)</div><div class='add'>+{</div><div class='add'>+	unsigned		i;</div><div class='add'>+	unsigned		gpio = chip-&gt;base;</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; chip-&gt;ngpio; i++, gpio++) {</div><div class='add'>+		nmk_gpio_dbg_show_one(s, chip, i, gpio);</div><div class='ctx'> 		seq_printf(s, "\n");</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	clk_disable(nmk_chip-&gt;clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='add'>+static inline void nmk_gpio_dbg_show_one(struct seq_file *s,</div><div class='add'>+					 struct gpio_chip *chip,</div><div class='add'>+					 unsigned offset, unsigned gpio)</div><div class='add'>+{</div><div class='add'>+}</div><div class='ctx'> #define nmk_gpio_dbg_show	NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* This structure is replicated for each GPIO block allocated at probe time */</div><div class='ctx'> static struct gpio_chip nmk_gpio_template = {</div><div class='add'>+	.request		= nmk_gpio_request,</div><div class='add'>+	.free			= nmk_gpio_free,</div><div class='ctx'> 	.direction_input	= nmk_gpio_make_input,</div><div class='ctx'> 	.get			= nmk_gpio_get_input,</div><div class='ctx'> 	.direction_output	= nmk_gpio_make_output,</div><div class='hunk'>@@ -1008,21 +1107,11 @@ void nmk_gpio_wakeups_suspend(void)</div><div class='ctx'> </div><div class='ctx'> 		clk_enable(chip-&gt;clk);</div><div class='ctx'> </div><div class='del'>-		chip-&gt;rwimsc = readl(chip-&gt;addr + NMK_GPIO_RWIMSC);</div><div class='del'>-		chip-&gt;fwimsc = readl(chip-&gt;addr + NMK_GPIO_FWIMSC);</div><div class='del'>-</div><div class='ctx'> 		writel(chip-&gt;rwimsc &amp; chip-&gt;real_wake,</div><div class='ctx'> 		       chip-&gt;addr + NMK_GPIO_RWIMSC);</div><div class='ctx'> 		writel(chip-&gt;fwimsc &amp; chip-&gt;real_wake,</div><div class='ctx'> 		       chip-&gt;addr + NMK_GPIO_FWIMSC);</div><div class='ctx'> </div><div class='del'>-		if (chip-&gt;sleepmode) {</div><div class='del'>-			chip-&gt;slpm = readl(chip-&gt;addr + NMK_GPIO_SLPC);</div><div class='del'>-</div><div class='del'>-			/* 0 -&gt; wakeup enable */</div><div class='del'>-			writel(~chip-&gt;real_wake, chip-&gt;addr + NMK_GPIO_SLPC);</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		clk_disable(chip-&gt;clk);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1042,9 +1131,6 @@ void nmk_gpio_wakeups_resume(void)</div><div class='ctx'> 		writel(chip-&gt;rwimsc, chip-&gt;addr + NMK_GPIO_RWIMSC);</div><div class='ctx'> 		writel(chip-&gt;fwimsc, chip-&gt;addr + NMK_GPIO_FWIMSC);</div><div class='ctx'> </div><div class='del'>-		if (chip-&gt;sleepmode)</div><div class='del'>-			writel(chip-&gt;slpm, chip-&gt;addr + NMK_GPIO_SLPC);</div><div class='del'>-</div><div class='ctx'> 		clk_disable(chip-&gt;clk);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1068,19 +1154,62 @@ void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int nmk_gpio_irq_map(struct irq_domain *d, unsigned int irq,</div><div class='add'>+			  irq_hw_number_t hwirq)</div><div class='add'>+{</div><div class='add'>+	struct nmk_gpio_chip *nmk_chip = d-&gt;host_data;</div><div class='add'>+</div><div class='add'>+	if (!nmk_chip)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;nmk_gpio_irq_chip, handle_edge_irq);</div><div class='add'>+	set_irq_flags(irq, IRQF_VALID);</div><div class='add'>+	irq_set_chip_data(irq, nmk_chip);</div><div class='add'>+	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct irq_domain_ops nmk_gpio_irq_simple_ops = {</div><div class='add'>+	.map = nmk_gpio_irq_map,</div><div class='add'>+	.xlate = irq_domain_xlate_twocell,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int __devinit nmk_gpio_probe(struct platform_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct nmk_gpio_platform_data *pdata = dev-&gt;dev.platform_data;</div><div class='add'>+	struct device_node *np = dev-&gt;dev.of_node;</div><div class='ctx'> 	struct nmk_gpio_chip *nmk_chip;</div><div class='ctx'> 	struct gpio_chip *chip;</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	int secondary_irq;</div><div class='add'>+	void __iomem *base;</div><div class='ctx'> 	int irq;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!pdata)</div><div class='add'>+	if (!pdata &amp;&amp; !np) {</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "No platform data or device tree found\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (np) {</div><div class='add'>+		pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);</div><div class='add'>+		if (!pdata)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		if (of_get_property(np, "supports-sleepmode", NULL))</div><div class='add'>+			pdata-&gt;supports_sleepmode = true;</div><div class='add'>+</div><div class='add'>+		if (of_property_read_u32(np, "gpio-bank", &amp;dev-&gt;id)) {</div><div class='add'>+			dev_err(&amp;dev-&gt;dev, "gpio-bank property not found\n");</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pdata-&gt;first_gpio = dev-&gt;id * NMK_GPIO_PER_CHIP;</div><div class='add'>+		pdata-&gt;num_gpio   = NMK_GPIO_PER_CHIP;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	res = platform_get_resource(dev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	if (!res) {</div><div class='hunk'>@@ -1106,10 +1235,16 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	base = ioremap(res-&gt;start, resource_size(res));</div><div class='add'>+	if (!base) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	clk = clk_get(&amp;dev-&gt;dev, NULL);</div><div class='ctx'> 	if (IS_ERR(clk)) {</div><div class='ctx'> 		ret = PTR_ERR(clk);</div><div class='del'>-		goto out_release;</div><div class='add'>+		goto out_unmap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);</div><div class='hunk'>@@ -1117,13 +1252,14 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto out_clk;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The virt address in nmk_chip-&gt;addr is in the nomadik register space,</div><div class='ctx'> 	 * so we can simply convert the resource address, without remapping</div><div class='ctx'> 	 */</div><div class='ctx'> 	nmk_chip-&gt;bank = dev-&gt;id;</div><div class='ctx'> 	nmk_chip-&gt;clk = clk;</div><div class='del'>-	nmk_chip-&gt;addr = io_p2v(res-&gt;start);</div><div class='add'>+	nmk_chip-&gt;addr = base;</div><div class='ctx'> 	nmk_chip-&gt;chip = nmk_gpio_template;</div><div class='ctx'> 	nmk_chip-&gt;parent_irq = irq;</div><div class='ctx'> 	nmk_chip-&gt;secondary_parent_irq = secondary_irq;</div><div class='hunk'>@@ -1139,6 +1275,14 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)</div><div class='ctx'> 	chip-&gt;dev = &amp;dev-&gt;dev;</div><div class='ctx'> 	chip-&gt;owner = THIS_MODULE;</div><div class='ctx'> </div><div class='add'>+	clk_enable(nmk_chip-&gt;clk);</div><div class='add'>+	nmk_chip-&gt;lowemi = readl_relaxed(nmk_chip-&gt;addr + NMK_GPIO_LOWEMI);</div><div class='add'>+	clk_disable(nmk_chip-&gt;clk);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF_GPIO</div><div class='add'>+	chip-&gt;of_node = np;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	ret = gpiochip_add(&amp;nmk_chip-&gt;chip);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_free;</div><div class='hunk'>@@ -1146,12 +1290,22 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)</div><div class='ctx'> 	BUG_ON(nmk_chip-&gt;bank &gt;= ARRAY_SIZE(nmk_gpio_chips));</div><div class='ctx'> </div><div class='ctx'> 	nmk_gpio_chips[nmk_chip-&gt;bank] = nmk_chip;</div><div class='add'>+</div><div class='ctx'> 	platform_set_drvdata(dev, nmk_chip);</div><div class='ctx'> </div><div class='add'>+	nmk_chip-&gt;domain = irq_domain_add_legacy(np, NMK_GPIO_PER_CHIP,</div><div class='add'>+						NOMADIK_GPIO_TO_IRQ(pdata-&gt;first_gpio),</div><div class='add'>+						0, &amp;nmk_gpio_irq_simple_ops, nmk_chip);</div><div class='add'>+	if (!nmk_chip-&gt;domain) {</div><div class='add'>+		pr_err("%s: Failed to create irqdomain\n", np-&gt;full_name);</div><div class='add'>+		ret = -ENOSYS;</div><div class='add'>+		goto out_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	nmk_gpio_init_irq(nmk_chip);</div><div class='ctx'> </div><div class='del'>-	dev_info(&amp;dev-&gt;dev, "at address %p\n",</div><div class='del'>-		 nmk_chip-&gt;addr);</div><div class='add'>+	dev_info(&amp;dev-&gt;dev, "at address %p\n", nmk_chip-&gt;addr);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_free:</div><div class='hunk'>@@ -1159,25 +1313,482 @@ out_free:</div><div class='ctx'> out_clk:</div><div class='ctx'> 	clk_disable(clk);</div><div class='ctx'> 	clk_put(clk);</div><div class='add'>+out_unmap:</div><div class='add'>+	iounmap(base);</div><div class='ctx'> out_release:</div><div class='ctx'> 	release_mem_region(res-&gt;start, resource_size(res));</div><div class='ctx'> out:</div><div class='ctx'> 	dev_err(&amp;dev-&gt;dev, "Failure %i for GPIO %i-%i\n", ret,</div><div class='ctx'> 		  pdata-&gt;first_gpio, pdata-&gt;first_gpio+31);</div><div class='add'>+	if (np)</div><div class='add'>+		kfree(pdata);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev)</div><div class='add'>+{</div><div class='add'>+	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	return npct-&gt;soc-&gt;ngroups;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *nmk_get_group_name(struct pinctrl_dev *pctldev,</div><div class='add'>+				       unsigned selector)</div><div class='add'>+{</div><div class='add'>+	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	return npct-&gt;soc-&gt;groups[selector].name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='add'>+			      const unsigned **pins,</div><div class='add'>+			      unsigned *num_pins)</div><div class='add'>+{</div><div class='add'>+	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	*pins = npct-&gt;soc-&gt;groups[selector].pins;</div><div class='add'>+	*num_pins = npct-&gt;soc-&gt;groups[selector].npins;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pinctrl_gpio_range *</div><div class='add'>+nmk_match_gpio_range(struct pinctrl_dev *pctldev, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; npct-&gt;soc-&gt;gpio_num_ranges; i++) {</div><div class='add'>+		struct pinctrl_gpio_range *range;</div><div class='add'>+</div><div class='add'>+		range = &amp;npct-&gt;soc-&gt;gpio_ranges[i];</div><div class='add'>+		if (offset &gt;= range-&gt;pin_base &amp;&amp;</div><div class='add'>+		    offset &lt;= (range-&gt;pin_base + range-&gt;npins - 1))</div><div class='add'>+			return range;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,</div><div class='add'>+		   unsigned offset)</div><div class='add'>+{</div><div class='add'>+	struct pinctrl_gpio_range *range;</div><div class='add'>+	struct gpio_chip *chip;</div><div class='add'>+</div><div class='add'>+	range = nmk_match_gpio_range(pctldev, offset);</div><div class='add'>+	if (!range || !range-&gt;gc) {</div><div class='add'>+		seq_printf(s, "invalid pin offset");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	chip = range-&gt;gc;</div><div class='add'>+	nmk_gpio_dbg_show_one(s, chip, offset - chip-&gt;base, offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pinctrl_ops nmk_pinctrl_ops = {</div><div class='add'>+	.get_groups_count = nmk_get_groups_cnt,</div><div class='add'>+	.get_group_name = nmk_get_group_name,</div><div class='add'>+	.get_group_pins = nmk_get_group_pins,</div><div class='add'>+	.pin_dbg_show = nmk_pin_dbg_show,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int nmk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)</div><div class='add'>+{</div><div class='add'>+	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	return npct-&gt;soc-&gt;nfunctions;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *nmk_pmx_get_func_name(struct pinctrl_dev *pctldev,</div><div class='add'>+					 unsigned function)</div><div class='add'>+{</div><div class='add'>+	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	return npct-&gt;soc-&gt;functions[function].name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nmk_pmx_get_func_groups(struct pinctrl_dev *pctldev,</div><div class='add'>+				   unsigned function,</div><div class='add'>+				   const char * const **groups,</div><div class='add'>+				   unsigned * const num_groups)</div><div class='add'>+{</div><div class='add'>+	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	*groups = npct-&gt;soc-&gt;functions[function].groups;</div><div class='add'>+	*num_groups = npct-&gt;soc-&gt;functions[function].ngroups;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nmk_pmx_enable(struct pinctrl_dev *pctldev, unsigned function,</div><div class='add'>+			  unsigned group)</div><div class='add'>+{</div><div class='add'>+	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct nmk_pingroup *g;</div><div class='add'>+	static unsigned int slpm[NUM_BANKS];</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool glitch;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	g = &amp;npct-&gt;soc-&gt;groups[group];</div><div class='add'>+</div><div class='add'>+	if (g-&gt;altsetting &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev_dbg(npct-&gt;dev, "enable group %s, %u pins\n", g-&gt;name, g-&gt;npins);</div><div class='add'>+</div><div class='add'>+	/* Handle this special glitch on altfunction C */</div><div class='add'>+	glitch = (g-&gt;altsetting == NMK_GPIO_ALT_C);</div><div class='add'>+</div><div class='add'>+	if (glitch) {</div><div class='add'>+		spin_lock_irqsave(&amp;nmk_gpio_slpm_lock, flags);</div><div class='add'>+</div><div class='add'>+		/* Initially don't put any pins to sleep when switching */</div><div class='add'>+		memset(slpm, 0xff, sizeof(slpm));</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Then mask the pins that need to be sleeping now when we're</div><div class='add'>+		 * switching to the ALT C function.</div><div class='add'>+		 */</div><div class='add'>+		for (i = 0; i &lt; g-&gt;npins; i++)</div><div class='add'>+			slpm[g-&gt;pins[i] / NMK_GPIO_PER_CHIP] &amp;= ~BIT(g-&gt;pins[i]);</div><div class='add'>+		nmk_gpio_glitch_slpm_init(slpm);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; g-&gt;npins; i++) {</div><div class='add'>+		struct pinctrl_gpio_range *range;</div><div class='add'>+		struct nmk_gpio_chip *nmk_chip;</div><div class='add'>+		struct gpio_chip *chip;</div><div class='add'>+		unsigned bit;</div><div class='add'>+</div><div class='add'>+		range = nmk_match_gpio_range(pctldev, g-&gt;pins[i]);</div><div class='add'>+		if (!range) {</div><div class='add'>+			dev_err(npct-&gt;dev,</div><div class='add'>+				"invalid pin offset %d in group %s at index %d\n",</div><div class='add'>+				g-&gt;pins[i], g-&gt;name, i);</div><div class='add'>+			goto out_glitch;</div><div class='add'>+		}</div><div class='add'>+		if (!range-&gt;gc) {</div><div class='add'>+			dev_err(npct-&gt;dev, "GPIO chip missing in range for pin offset %d in group %s at index %d\n",</div><div class='add'>+				g-&gt;pins[i], g-&gt;name, i);</div><div class='add'>+			goto out_glitch;</div><div class='add'>+		}</div><div class='add'>+		chip = range-&gt;gc;</div><div class='add'>+		nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);</div><div class='add'>+		dev_dbg(npct-&gt;dev, "setting pin %d to altsetting %d\n", g-&gt;pins[i], g-&gt;altsetting);</div><div class='add'>+</div><div class='add'>+		clk_enable(nmk_chip-&gt;clk);</div><div class='add'>+		bit = g-&gt;pins[i] % NMK_GPIO_PER_CHIP;</div><div class='add'>+		/*</div><div class='add'>+		 * If the pin is switching to altfunc, and there was an</div><div class='add'>+		 * interrupt installed on it which has been lazy disabled,</div><div class='add'>+		 * actually mask the interrupt to prevent spurious interrupts</div><div class='add'>+		 * that would occur while the pin is under control of the</div><div class='add'>+		 * peripheral. Only SKE does this.</div><div class='add'>+		 */</div><div class='add'>+		nmk_gpio_disable_lazy_irq(nmk_chip, bit);</div><div class='add'>+</div><div class='add'>+		__nmk_gpio_set_mode_safe(nmk_chip, bit, g-&gt;altsetting, glitch);</div><div class='add'>+		clk_disable(nmk_chip-&gt;clk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* When all pins are successfully reconfigured we get here */</div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='add'>+out_glitch:</div><div class='add'>+	if (glitch) {</div><div class='add'>+		nmk_gpio_glitch_slpm_restore(slpm);</div><div class='add'>+		spin_unlock_irqrestore(&amp;nmk_gpio_slpm_lock, flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nmk_pmx_disable(struct pinctrl_dev *pctldev,</div><div class='add'>+			    unsigned function, unsigned group)</div><div class='add'>+{</div><div class='add'>+	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct nmk_pingroup *g;</div><div class='add'>+</div><div class='add'>+	g = &amp;npct-&gt;soc-&gt;groups[group];</div><div class='add'>+</div><div class='add'>+	if (g-&gt;altsetting &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Poke out the mux, set the pin to some default state? */</div><div class='add'>+	dev_dbg(npct-&gt;dev, "disable group %s, %u pins\n", g-&gt;name, g-&gt;npins);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int nmk_gpio_request_enable(struct pinctrl_dev *pctldev,</div><div class='add'>+			    struct pinctrl_gpio_range *range,</div><div class='add'>+			    unsigned offset)</div><div class='add'>+{</div><div class='add'>+	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	struct nmk_gpio_chip *nmk_chip;</div><div class='add'>+	struct gpio_chip *chip;</div><div class='add'>+	unsigned bit;</div><div class='add'>+</div><div class='add'>+	if (!range) {</div><div class='add'>+		dev_err(npct-&gt;dev, "invalid range\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (!range-&gt;gc) {</div><div class='add'>+		dev_err(npct-&gt;dev, "missing GPIO chip in range\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	chip = range-&gt;gc;</div><div class='add'>+	nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);</div><div class='add'>+</div><div class='add'>+	dev_dbg(npct-&gt;dev, "enable pin %u as GPIO\n", offset);</div><div class='add'>+</div><div class='add'>+	clk_enable(nmk_chip-&gt;clk);</div><div class='add'>+	bit = offset % NMK_GPIO_PER_CHIP;</div><div class='add'>+	/* There is no glitch when converting any pin to GPIO */</div><div class='add'>+	__nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO);</div><div class='add'>+	clk_disable(nmk_chip-&gt;clk);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void nmk_gpio_disable_free(struct pinctrl_dev *pctldev,</div><div class='add'>+			   struct pinctrl_gpio_range *range,</div><div class='add'>+			   unsigned offset)</div><div class='add'>+{</div><div class='add'>+	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	dev_dbg(npct-&gt;dev, "disable pin %u as GPIO\n", offset);</div><div class='add'>+	/* Set the pin to some default state, GPIO is usually default */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pinmux_ops nmk_pinmux_ops = {</div><div class='add'>+	.get_functions_count = nmk_pmx_get_funcs_cnt,</div><div class='add'>+	.get_function_name = nmk_pmx_get_func_name,</div><div class='add'>+	.get_function_groups = nmk_pmx_get_func_groups,</div><div class='add'>+	.enable = nmk_pmx_enable,</div><div class='add'>+	.disable = nmk_pmx_disable,</div><div class='add'>+	.gpio_request_enable = nmk_gpio_request_enable,</div><div class='add'>+	.gpio_disable_free = nmk_gpio_disable_free,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int nmk_pin_config_get(struct pinctrl_dev *pctldev,</div><div class='add'>+		       unsigned pin,</div><div class='add'>+		       unsigned long *config)</div><div class='add'>+{</div><div class='add'>+	/* Not implemented */</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int nmk_pin_config_set(struct pinctrl_dev *pctldev,</div><div class='add'>+		       unsigned pin,</div><div class='add'>+		       unsigned long config)</div><div class='add'>+{</div><div class='add'>+	static const char *pullnames[] = {</div><div class='add'>+		[NMK_GPIO_PULL_NONE]	= "none",</div><div class='add'>+		[NMK_GPIO_PULL_UP]	= "up",</div><div class='add'>+		[NMK_GPIO_PULL_DOWN]	= "down",</div><div class='add'>+		[3] /* illegal */	= "??"</div><div class='add'>+	};</div><div class='add'>+	static const char *slpmnames[] = {</div><div class='add'>+		[NMK_GPIO_SLPM_INPUT]		= "input/wakeup",</div><div class='add'>+		[NMK_GPIO_SLPM_NOCHANGE]	= "no-change/no-wakeup",</div><div class='add'>+	};</div><div class='add'>+	struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	struct nmk_gpio_chip *nmk_chip;</div><div class='add'>+	struct pinctrl_gpio_range *range;</div><div class='add'>+	struct gpio_chip *chip;</div><div class='add'>+	unsigned bit;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The pin config contains pin number and altfunction fields, here</div><div class='add'>+	 * we just ignore that part. It's being handled by the framework and</div><div class='add'>+	 * pinmux callback respectively.</div><div class='add'>+	 */</div><div class='add'>+	pin_cfg_t cfg = (pin_cfg_t) config;</div><div class='add'>+	int pull = PIN_PULL(cfg);</div><div class='add'>+	int slpm = PIN_SLPM(cfg);</div><div class='add'>+	int output = PIN_DIR(cfg);</div><div class='add'>+	int val = PIN_VAL(cfg);</div><div class='add'>+	bool lowemi = PIN_LOWEMI(cfg);</div><div class='add'>+	bool gpiomode = PIN_GPIOMODE(cfg);</div><div class='add'>+	bool sleep = PIN_SLEEPMODE(cfg);</div><div class='add'>+</div><div class='add'>+	range = nmk_match_gpio_range(pctldev, pin);</div><div class='add'>+	if (!range) {</div><div class='add'>+		dev_err(npct-&gt;dev, "invalid pin offset %d\n", pin);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (!range-&gt;gc) {</div><div class='add'>+		dev_err(npct-&gt;dev, "GPIO chip missing in range for pin %d\n",</div><div class='add'>+			pin);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	chip = range-&gt;gc;</div><div class='add'>+	nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);</div><div class='add'>+</div><div class='add'>+	if (sleep) {</div><div class='add'>+		int slpm_pull = PIN_SLPM_PULL(cfg);</div><div class='add'>+		int slpm_output = PIN_SLPM_DIR(cfg);</div><div class='add'>+		int slpm_val = PIN_SLPM_VAL(cfg);</div><div class='add'>+</div><div class='add'>+		/* All pins go into GPIO mode at sleep */</div><div class='add'>+		gpiomode = true;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The SLPM_* values are normal values + 1 to allow zero to</div><div class='add'>+		 * mean "same as normal".</div><div class='add'>+		 */</div><div class='add'>+		if (slpm_pull)</div><div class='add'>+			pull = slpm_pull - 1;</div><div class='add'>+		if (slpm_output)</div><div class='add'>+			output = slpm_output - 1;</div><div class='add'>+		if (slpm_val)</div><div class='add'>+			val = slpm_val - 1;</div><div class='add'>+</div><div class='add'>+		dev_dbg(nmk_chip-&gt;chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",</div><div class='add'>+			pin,</div><div class='add'>+			slpm_pull ? pullnames[pull] : "same",</div><div class='add'>+			slpm_output ? (output ? "output" : "input") : "same",</div><div class='add'>+			slpm_val ? (val ? "high" : "low") : "same");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(nmk_chip-&gt;chip.dev, "pin %d [%#lx]: pull %s, slpm %s (%s%s), lowemi %s\n",</div><div class='add'>+		pin, cfg, pullnames[pull], slpmnames[slpm],</div><div class='add'>+		output ? "output " : "input",</div><div class='add'>+		output ? (val ? "high" : "low") : "",</div><div class='add'>+		lowemi ? "on" : "off" );</div><div class='add'>+</div><div class='add'>+	clk_enable(nmk_chip-&gt;clk);</div><div class='add'>+	bit = pin % NMK_GPIO_PER_CHIP;</div><div class='add'>+	if (gpiomode)</div><div class='add'>+		/* No glitch when going to GPIO mode */</div><div class='add'>+		__nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO);</div><div class='add'>+	if (output)</div><div class='add'>+		__nmk_gpio_make_output(nmk_chip, bit, val);</div><div class='add'>+	else {</div><div class='add'>+		__nmk_gpio_make_input(nmk_chip, bit);</div><div class='add'>+		__nmk_gpio_set_pull(nmk_chip, bit, pull);</div><div class='add'>+	}</div><div class='add'>+	/* TODO: isn't this only applicable on output pins? */</div><div class='add'>+	__nmk_gpio_set_lowemi(nmk_chip, bit, lowemi);</div><div class='add'>+</div><div class='add'>+	__nmk_gpio_set_slpm(nmk_chip, bit, slpm);</div><div class='add'>+	clk_disable(nmk_chip-&gt;clk);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pinconf_ops nmk_pinconf_ops = {</div><div class='add'>+	.pin_config_get = nmk_pin_config_get,</div><div class='add'>+	.pin_config_set = nmk_pin_config_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinctrl_desc nmk_pinctrl_desc = {</div><div class='add'>+	.name = "pinctrl-nomadik",</div><div class='add'>+	.pctlops = &amp;nmk_pinctrl_ops,</div><div class='add'>+	.pmxops = &amp;nmk_pinmux_ops,</div><div class='add'>+	.confops = &amp;nmk_pinconf_ops,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id nmk_pinctrl_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "stericsson,nmk_pinctrl",</div><div class='add'>+		.data = (void *)PINCTRL_NMK_DB8500,</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit nmk_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	const struct platform_device_id *platid = platform_get_device_id(pdev);</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct nmk_pinctrl *npct;</div><div class='add'>+	unsigned int version = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	npct = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*npct), GFP_KERNEL);</div><div class='add'>+	if (!npct)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (platid)</div><div class='add'>+		version = platid-&gt;driver_data;</div><div class='add'>+	else if (np)</div><div class='add'>+		version = (unsigned int)</div><div class='add'>+			of_match_device(nmk_pinctrl_match, &amp;pdev-&gt;dev)-&gt;data;</div><div class='add'>+</div><div class='add'>+	/* Poke in other ASIC variants here */</div><div class='add'>+	if (version == PINCTRL_NMK_DB8500)</div><div class='add'>+		nmk_pinctrl_db8500_init(&amp;npct-&gt;soc);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We need all the GPIO drivers to probe FIRST, or we will not be able</div><div class='add'>+	 * to obtain references to the struct gpio_chip * for them, and we</div><div class='add'>+	 * need this to proceed.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; npct-&gt;soc-&gt;gpio_num_ranges; i++) {</div><div class='add'>+		if (!nmk_gpio_chips[i]) {</div><div class='add'>+			dev_warn(&amp;pdev-&gt;dev, "GPIO chip %d not registered yet\n", i);</div><div class='add'>+			devm_kfree(&amp;pdev-&gt;dev, npct);</div><div class='add'>+			return -EPROBE_DEFER;</div><div class='add'>+		}</div><div class='add'>+		npct-&gt;soc-&gt;gpio_ranges[i].gc = &amp;nmk_gpio_chips[i]-&gt;chip;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nmk_pinctrl_desc.pins = npct-&gt;soc-&gt;pins;</div><div class='add'>+	nmk_pinctrl_desc.npins = npct-&gt;soc-&gt;npins;</div><div class='add'>+	npct-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	npct-&gt;pctl = pinctrl_register(&amp;nmk_pinctrl_desc, &amp;pdev-&gt;dev, npct);</div><div class='add'>+	if (!npct-&gt;pctl) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "could not register Nomadik pinctrl driver\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We will handle a range of GPIO pins */</div><div class='add'>+	for (i = 0; i &lt; npct-&gt;soc-&gt;gpio_num_ranges; i++)</div><div class='add'>+		pinctrl_add_gpio_range(npct-&gt;pctl, &amp;npct-&gt;soc-&gt;gpio_ranges[i]);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, npct);</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev, "initialized Nomadik pin control driver\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id nmk_gpio_match[] = {</div><div class='add'>+	{ .compatible = "st,nomadik-gpio", },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct platform_driver nmk_gpio_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 		.name = "gpio",</div><div class='add'>+		.of_match_table = nmk_gpio_match,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = nmk_gpio_probe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct platform_device_id nmk_pinctrl_id[] = {</div><div class='add'>+	{ "pinctrl-stn8815", PINCTRL_NMK_STN8815 },</div><div class='add'>+	{ "pinctrl-db8500", PINCTRL_NMK_DB8500 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_driver nmk_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.name = "pinctrl-nomadik",</div><div class='add'>+		.of_match_table = nmk_pinctrl_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = nmk_pinctrl_probe,</div><div class='add'>+	.id_table = nmk_pinctrl_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int __init nmk_gpio_init(void)</div><div class='ctx'> {</div><div class='del'>-	return platform_driver_register(&amp;nmk_gpio_driver);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = platform_driver_register(&amp;nmk_gpio_driver);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	return platform_driver_register(&amp;nmk_pinctrl_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> core_initcall(nmk_gpio_init);</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-nomadik.h b/drivers/pinctrl/pinctrl-nomadik.h<br/>new file mode 100644<br/>index 000000000000..bc91aed7185d<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-nomadik.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-nomadik.h</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+#ifndef PINCTRL_PINCTRL_NOMADIK_H</div><div class='add'>+#define PINCTRL_PINCTRL_NOMADIK_H</div><div class='add'>+</div><div class='add'>+#include &lt;plat/gpio-nomadik.h&gt;</div><div class='add'>+</div><div class='add'>+/* Package definitions */</div><div class='add'>+#define PINCTRL_NMK_STN8815	0</div><div class='add'>+#define PINCTRL_NMK_DB8500	1</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct nmk_function - Nomadik pinctrl mux function</div><div class='add'>+ * @name: The name of the function, exported to pinctrl core.</div><div class='add'>+ * @groups: An array of pin groups that may select this function.</div><div class='add'>+ * @ngroups: The number of entries in @groups.</div><div class='add'>+ */</div><div class='add'>+struct nmk_function {</div><div class='add'>+	const char *name;</div><div class='add'>+	const char * const *groups;</div><div class='add'>+	unsigned ngroups;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct nmk_pingroup - describes a Nomadik pin group</div><div class='add'>+ * @name: the name of this specific pin group</div><div class='add'>+ * @pins: an array of discrete physical pins used in this group, taken</div><div class='add'>+ *	from the driver-local pin enumeration space</div><div class='add'>+ * @num_pins: the number of pins in this group array, i.e. the number of</div><div class='add'>+ *	elements in .pins so we can iterate over that array</div><div class='add'>+ * @altsetting: the altsetting to apply to all pins in this group to</div><div class='add'>+ *	configure them to be used by a function</div><div class='add'>+ */</div><div class='add'>+struct nmk_pingroup {</div><div class='add'>+	const char *name;</div><div class='add'>+	const unsigned int *pins;</div><div class='add'>+	const unsigned npins;</div><div class='add'>+	int altsetting;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct nmk_pinctrl_soc_data - Nomadik pin controller per-SoC configuration</div><div class='add'>+ * @gpio_ranges: An array of GPIO ranges for this SoC</div><div class='add'>+ * @gpio_num_ranges: The number of GPIO ranges for this SoC</div><div class='add'>+ * @pins:	An array describing all pins the pin controller affects.</div><div class='add'>+ *		All pins which are also GPIOs must be listed first within the</div><div class='add'>+ *		array, and be numbered identically to the GPIO controller's</div><div class='add'>+ *		numbering.</div><div class='add'>+ * @npins:	The number of entries in @pins.</div><div class='add'>+ * @functions:	The functions supported on this SoC.</div><div class='add'>+ * @nfunction:	The number of entries in @functions.</div><div class='add'>+ * @groups:	An array describing all pin groups the pin SoC supports.</div><div class='add'>+ * @ngroups:	The number of entries in @groups.</div><div class='add'>+ */</div><div class='add'>+struct nmk_pinctrl_soc_data {</div><div class='add'>+	struct pinctrl_gpio_range *gpio_ranges;</div><div class='add'>+	unsigned gpio_num_ranges;</div><div class='add'>+	const struct pinctrl_pin_desc *pins;</div><div class='add'>+	unsigned npins;</div><div class='add'>+	const struct nmk_function *functions;</div><div class='add'>+	unsigned nfunctions;</div><div class='add'>+	const struct nmk_pingroup *groups;</div><div class='add'>+	unsigned ngroups;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PINCTRL_DB8500</div><div class='add'>+</div><div class='add'>+void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* PINCTRL_PINCTRL_NOMADIK_H */</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-pxa3xx.c b/drivers/pinctrl/pinctrl-pxa3xx.c<br/>index 079dce0e93e9..f14cd6ba4c0b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-pxa3xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/pinctrl-pxa3xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-pxa3xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-pxa3xx.c</a></div><div class='hunk'>@@ -25,20 +25,18 @@ static struct pinctrl_gpio_range pxa3xx_pinctrl_gpio_range = {</div><div class='ctx'> 	.pin_base	= 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int pxa3xx_list_groups(struct pinctrl_dev *pctrldev, unsigned selector)</div><div class='add'>+static int pxa3xx_get_groups_count(struct pinctrl_dev *pctrldev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);</div><div class='del'>-	if (selector &gt;= info-&gt;num_grps)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+</div><div class='add'>+	return info-&gt;num_grps;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *pxa3xx_get_group_name(struct pinctrl_dev *pctrldev,</div><div class='ctx'> 					 unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);</div><div class='del'>-	if (selector &gt;= info-&gt;num_grps)</div><div class='del'>-		return NULL;</div><div class='add'>+</div><div class='ctx'> 	return info-&gt;grps[selector].name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -48,25 +46,23 @@ static int pxa3xx_get_group_pins(struct pinctrl_dev *pctrldev,</div><div class='ctx'> 				 unsigned *num_pins)</div><div class='ctx'> {</div><div class='ctx'> 	struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);</div><div class='del'>-	if (selector &gt;= info-&gt;num_grps)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	*pins = info-&gt;grps[selector].pins;</div><div class='ctx'> 	*num_pins = info-&gt;grps[selector].npins;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pinctrl_ops pxa3xx_pctrl_ops = {</div><div class='del'>-	.list_groups	= pxa3xx_list_groups,</div><div class='add'>+	.get_groups_count = pxa3xx_get_groups_count,</div><div class='ctx'> 	.get_group_name	= pxa3xx_get_group_name,</div><div class='ctx'> 	.get_group_pins	= pxa3xx_get_group_pins,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int pxa3xx_pmx_list_func(struct pinctrl_dev *pctrldev, unsigned func)</div><div class='add'>+static int pxa3xx_pmx_get_funcs_count(struct pinctrl_dev *pctrldev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);</div><div class='del'>-	if (func &gt;= info-&gt;num_funcs)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+</div><div class='add'>+	return info-&gt;num_funcs;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *pxa3xx_pmx_get_func_name(struct pinctrl_dev *pctrldev,</div><div class='hunk'>@@ -142,11 +138,6 @@ static int pxa3xx_pmx_enable(struct pinctrl_dev *pctrldev, unsigned func,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pxa3xx_pmx_disable(struct pinctrl_dev *pctrldev, unsigned func,</div><div class='del'>-			       unsigned group)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int pxa3xx_pmx_request_gpio(struct pinctrl_dev *pctrldev,</div><div class='ctx'> 				   struct pinctrl_gpio_range *range,</div><div class='ctx'> 				   unsigned pin)</div><div class='hunk'>@@ -170,11 +161,10 @@ static int pxa3xx_pmx_request_gpio(struct pinctrl_dev *pctrldev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pinmux_ops pxa3xx_pmx_ops = {</div><div class='del'>-	.list_functions		= pxa3xx_pmx_list_func,</div><div class='add'>+	.get_functions_count	= pxa3xx_pmx_get_funcs_count,</div><div class='ctx'> 	.get_function_name	= pxa3xx_pmx_get_func_name,</div><div class='ctx'> 	.get_function_groups	= pxa3xx_pmx_get_groups,</div><div class='ctx'> 	.enable			= pxa3xx_pmx_enable,</div><div class='del'>-	.disable		= pxa3xx_pmx_disable,</div><div class='ctx'> 	.gpio_request_enable	= pxa3xx_pmx_request_gpio,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-sirf.c b/drivers/pinctrl/pinctrl-sirf.c<br/>index 6b3534cc051a..ba15b1a29e52 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-sirf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/pinctrl-sirf.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-sirf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-sirf.c</a></div><div class='hunk'>@@ -853,18 +853,14 @@ static const struct sirfsoc_pin_group sirfsoc_pin_groups[] = {</div><div class='ctx'> 	SIRFSOC_PIN_GROUP("gpsgrp", gps_pins),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int sirfsoc_list_groups(struct pinctrl_dev *pctldev, unsigned selector)</div><div class='add'>+static int sirfsoc_get_groups_count(struct pinctrl_dev *pctldev)</div><div class='ctx'> {</div><div class='del'>-	if (selector &gt;= ARRAY_SIZE(sirfsoc_pin_groups))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+	return ARRAY_SIZE(sirfsoc_pin_groups);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *sirfsoc_get_group_name(struct pinctrl_dev *pctldev,</div><div class='ctx'> 				       unsigned selector)</div><div class='ctx'> {</div><div class='del'>-	if (selector &gt;= ARRAY_SIZE(sirfsoc_pin_groups))</div><div class='del'>-		return NULL;</div><div class='ctx'> 	return sirfsoc_pin_groups[selector].name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -872,8 +868,6 @@ static int sirfsoc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector</div><div class='ctx'> 			       const unsigned **pins,</div><div class='ctx'> 			       unsigned *num_pins)</div><div class='ctx'> {</div><div class='del'>-	if (selector &gt;= ARRAY_SIZE(sirfsoc_pin_groups))</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> 	*pins = sirfsoc_pin_groups[selector].pins;</div><div class='ctx'> 	*num_pins = sirfsoc_pin_groups[selector].num_pins;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -886,7 +880,7 @@ static void sirfsoc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pinctrl_ops sirfsoc_pctrl_ops = {</div><div class='del'>-	.list_groups = sirfsoc_list_groups,</div><div class='add'>+	.get_groups_count = sirfsoc_get_groups_count,</div><div class='ctx'> 	.get_group_name = sirfsoc_get_group_name,</div><div class='ctx'> 	.get_group_pins = sirfsoc_get_group_pins,</div><div class='ctx'> 	.pin_dbg_show = sirfsoc_pin_dbg_show,</div><div class='hunk'>@@ -1033,11 +1027,9 @@ static void sirfsoc_pinmux_disable(struct pinctrl_dev *pmxdev, unsigned selector</div><div class='ctx'> 	sirfsoc_pinmux_endisable(spmx, selector, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sirfsoc_pinmux_list_funcs(struct pinctrl_dev *pmxdev, unsigned selector)</div><div class='add'>+static int sirfsoc_pinmux_get_funcs_count(struct pinctrl_dev *pmxdev)</div><div class='ctx'> {</div><div class='del'>-	if (selector &gt;= ARRAY_SIZE(sirfsoc_pmx_functions))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+	return ARRAY_SIZE(sirfsoc_pmx_functions);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *sirfsoc_pinmux_get_func_name(struct pinctrl_dev *pctldev,</div><div class='hunk'>@@ -1074,9 +1066,9 @@ static int sirfsoc_pinmux_request_gpio(struct pinctrl_dev *pmxdev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pinmux_ops sirfsoc_pinmux_ops = {</div><div class='del'>-	.list_functions = sirfsoc_pinmux_list_funcs,</div><div class='ctx'> 	.enable = sirfsoc_pinmux_enable,</div><div class='ctx'> 	.disable = sirfsoc_pinmux_disable,</div><div class='add'>+	.get_functions_count = sirfsoc_pinmux_get_funcs_count,</div><div class='ctx'> 	.get_function_name = sirfsoc_pinmux_get_func_name,</div><div class='ctx'> 	.get_function_groups = sirfsoc_pinmux_get_groups,</div><div class='ctx'> 	.gpio_request_enable = sirfsoc_pinmux_request_gpio,</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c<br/>index 9b329688120c..b6934867d8d3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-tegra.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/pinctrl-tegra.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-tegra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-tegra.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Driver for the NVIDIA Tegra pinmux</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2011, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ * Copyright (c) 2011-2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * Derived from code:</div><div class='ctx'>  * Copyright (C) 2010 Google, Inc.</div><div class='hunk'>@@ -22,17 +22,19 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> #include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='ctx'> #include &lt;linux/pinctrl/pinmux.h&gt;</div><div class='ctx'> #include &lt;linux/pinctrl/pinconf.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mach/pinconf-tegra.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "core.h"</div><div class='ctx'> #include "pinctrl-tegra.h"</div><div class='ctx'> </div><div class='del'>-#define DRIVER_NAME "tegra-pinmux-disabled"</div><div class='del'>-</div><div class='ctx'> struct tegra_pmx {</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct pinctrl_dev *pctl;</div><div class='hunk'>@@ -53,15 +55,11 @@ static inline void pmx_writel(struct tegra_pmx *pmx, u32 val, u32 bank, u32 reg)</div><div class='ctx'> 	writel(val, pmx-&gt;regs[bank] + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tegra_pinctrl_list_groups(struct pinctrl_dev *pctldev,</div><div class='del'>-				     unsigned group)</div><div class='add'>+static int tegra_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='ctx'> </div><div class='del'>-	if (group &gt;= pmx-&gt;soc-&gt;ngroups)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return pmx-&gt;soc-&gt;ngroups;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *tegra_pinctrl_get_group_name(struct pinctrl_dev *pctldev,</div><div class='hunk'>@@ -69,9 +67,6 @@ static const char *tegra_pinctrl_get_group_name(struct pinctrl_dev *pctldev,</div><div class='ctx'> {</div><div class='ctx'> 	struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='ctx'> </div><div class='del'>-	if (group &gt;= pmx-&gt;soc-&gt;ngroups)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='ctx'> 	return pmx-&gt;soc-&gt;groups[group].name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -82,38 +77,259 @@ static int tegra_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,</div><div class='ctx'> {</div><div class='ctx'> 	struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='ctx'> </div><div class='del'>-	if (group &gt;= pmx-&gt;soc-&gt;ngroups)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	*pins = pmx-&gt;soc-&gt;groups[group].pins;</div><div class='ctx'> 	*num_pins = pmx-&gt;soc-&gt;groups[group].npins;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='ctx'> static void tegra_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,</div><div class='ctx'> 				       struct seq_file *s,</div><div class='ctx'> 				       unsigned offset)</div><div class='ctx'> {</div><div class='del'>-	seq_printf(s, " " DRIVER_NAME);</div><div class='add'>+	seq_printf(s, " %s", dev_name(pctldev-&gt;dev));</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int reserve_map(struct device *dev, struct pinctrl_map **map,</div><div class='add'>+		       unsigned *reserved_maps, unsigned *num_maps,</div><div class='add'>+		       unsigned reserve)</div><div class='add'>+{</div><div class='add'>+	unsigned old_num = *reserved_maps;</div><div class='add'>+	unsigned new_num = *num_maps + reserve;</div><div class='add'>+	struct pinctrl_map *new_map;</div><div class='add'>+</div><div class='add'>+	if (old_num &gt;= new_num)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);</div><div class='add'>+	if (!new_map) {</div><div class='add'>+		dev_err(dev, "krealloc(map) failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));</div><div class='add'>+</div><div class='add'>+	*map = new_map;</div><div class='add'>+	*reserved_maps = new_num;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps,</div><div class='add'>+		       unsigned *num_maps, const char *group,</div><div class='add'>+		       const char *function)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON(*num_maps == *reserved_maps))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	(*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;</div><div class='add'>+	(*map)[*num_maps].data.mux.group = group;</div><div class='add'>+	(*map)[*num_maps].data.mux.function = function;</div><div class='add'>+	(*num_maps)++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int add_map_configs(struct device *dev, struct pinctrl_map **map,</div><div class='add'>+			   unsigned *reserved_maps, unsigned *num_maps,</div><div class='add'>+			   const char *group, unsigned long *configs,</div><div class='add'>+			   unsigned num_configs)</div><div class='add'>+{</div><div class='add'>+	unsigned long *dup_configs;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(*num_maps == *reserved_maps))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),</div><div class='add'>+			      GFP_KERNEL);</div><div class='add'>+	if (!dup_configs) {</div><div class='add'>+		dev_err(dev, "kmemdup(configs) failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	(*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP;</div><div class='add'>+	(*map)[*num_maps].data.configs.group_or_pin = group;</div><div class='add'>+	(*map)[*num_maps].data.configs.configs = dup_configs;</div><div class='add'>+	(*map)[*num_maps].data.configs.num_configs = num_configs;</div><div class='add'>+	(*num_maps)++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int add_config(struct device *dev, unsigned long **configs,</div><div class='add'>+		      unsigned *num_configs, unsigned long config)</div><div class='add'>+{</div><div class='add'>+	unsigned old_num = *num_configs;</div><div class='add'>+	unsigned new_num = old_num + 1;</div><div class='add'>+	unsigned long *new_configs;</div><div class='add'>+</div><div class='add'>+	new_configs = krealloc(*configs, sizeof(*new_configs) * new_num,</div><div class='add'>+			       GFP_KERNEL);</div><div class='add'>+	if (!new_configs) {</div><div class='add'>+		dev_err(dev, "krealloc(configs) failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	new_configs[old_num] = config;</div><div class='add'>+</div><div class='add'>+	*configs = new_configs;</div><div class='add'>+	*num_configs = new_num;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tegra_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,</div><div class='add'>+			       struct pinctrl_map *map, unsigned num_maps)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_maps; i++)</div><div class='add'>+		if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)</div><div class='add'>+			kfree(map[i].data.configs.configs);</div><div class='add'>+</div><div class='add'>+	kfree(map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct cfg_param {</div><div class='add'>+	const char *property;</div><div class='add'>+	enum tegra_pinconf_param param;</div><div class='add'>+} cfg_params[] = {</div><div class='add'>+	{"nvidia,pull",			TEGRA_PINCONF_PARAM_PULL},</div><div class='add'>+	{"nvidia,tristate",		TEGRA_PINCONF_PARAM_TRISTATE},</div><div class='add'>+	{"nvidia,enable-input",		TEGRA_PINCONF_PARAM_ENABLE_INPUT},</div><div class='add'>+	{"nvidia,open-drain",		TEGRA_PINCONF_PARAM_OPEN_DRAIN},</div><div class='add'>+	{"nvidia,lock",			TEGRA_PINCONF_PARAM_LOCK},</div><div class='add'>+	{"nvidia,io-reset",		TEGRA_PINCONF_PARAM_IORESET},</div><div class='add'>+	{"nvidia,high-speed-mode",	TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE},</div><div class='add'>+	{"nvidia,schmitt",		TEGRA_PINCONF_PARAM_SCHMITT},</div><div class='add'>+	{"nvidia,low-power-mode",	TEGRA_PINCONF_PARAM_LOW_POWER_MODE},</div><div class='add'>+	{"nvidia,pull-down-strength",	TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH},</div><div class='add'>+	{"nvidia,pull-up-strength",	TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH},</div><div class='add'>+	{"nvidia,slew-rate-falling",	TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING},</div><div class='add'>+	{"nvidia,slew-rate-rising",	TEGRA_PINCONF_PARAM_SLEW_RATE_RISING},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int tegra_pinctrl_dt_subnode_to_map(struct device *dev,</div><div class='add'>+				    struct device_node *np,</div><div class='add'>+				    struct pinctrl_map **map,</div><div class='add'>+				    unsigned *reserved_maps,</div><div class='add'>+				    unsigned *num_maps)</div><div class='add'>+{</div><div class='add'>+	int ret, i;</div><div class='add'>+	const char *function;</div><div class='add'>+	u32 val;</div><div class='add'>+	unsigned long config;</div><div class='add'>+	unsigned long *configs = NULL;</div><div class='add'>+	unsigned num_configs = 0;</div><div class='add'>+	unsigned reserve;</div><div class='add'>+	struct property *prop;</div><div class='add'>+	const char *group;</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_string(np, "nvidia,function", &amp;function);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		/* EINVAL=missing, which is fine since it's optional */</div><div class='add'>+		if (ret != -EINVAL)</div><div class='add'>+			dev_err(dev,</div><div class='add'>+				"could not parse property nvidia,function\n");</div><div class='add'>+		function = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(cfg_params); i++) {</div><div class='add'>+		ret = of_property_read_u32(np, cfg_params[i].property, &amp;val);</div><div class='add'>+		if (!ret) {</div><div class='add'>+			config = TEGRA_PINCONF_PACK(cfg_params[i].param, val);</div><div class='add'>+			ret = add_config(dev, &amp;configs, &amp;num_configs, config);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				goto exit;</div><div class='add'>+		/* EINVAL=missing, which is fine since it's optional */</div><div class='add'>+		} else if (ret != -EINVAL) {</div><div class='add'>+			dev_err(dev, "could not parse property %s\n",</div><div class='add'>+				cfg_params[i].property);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reserve = 0;</div><div class='add'>+	if (function != NULL)</div><div class='add'>+		reserve++;</div><div class='add'>+	if (num_configs)</div><div class='add'>+		reserve++;</div><div class='add'>+	ret = of_property_count_strings(np, "nvidia,pins");</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "could not parse property nvidia,pins\n");</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+	reserve *= ret;</div><div class='add'>+</div><div class='add'>+	ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	of_property_for_each_string(np, "nvidia,pins", prop, group) {</div><div class='add'>+		if (function) {</div><div class='add'>+			ret = add_map_mux(map, reserved_maps, num_maps,</div><div class='add'>+					  group, function);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (num_configs) {</div><div class='add'>+			ret = add_map_configs(dev, map, reserved_maps,</div><div class='add'>+					      num_maps, group, configs,</div><div class='add'>+					      num_configs);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				goto exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	kfree(configs);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tegra_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,</div><div class='add'>+				 struct device_node *np_config,</div><div class='add'>+				 struct pinctrl_map **map, unsigned *num_maps)</div><div class='add'>+{</div><div class='add'>+	unsigned reserved_maps;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	reserved_maps = 0;</div><div class='add'>+	*map = NULL;</div><div class='add'>+	*num_maps = 0;</div><div class='add'>+</div><div class='add'>+	for_each_child_of_node(np_config, np) {</div><div class='add'>+		ret = tegra_pinctrl_dt_subnode_to_map(pctldev-&gt;dev, np, map,</div><div class='add'>+						      &amp;reserved_maps, num_maps);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			tegra_pinctrl_dt_free_map(pctldev, *map, *num_maps);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pinctrl_ops tegra_pinctrl_ops = {</div><div class='del'>-	.list_groups = tegra_pinctrl_list_groups,</div><div class='add'>+	.get_groups_count = tegra_pinctrl_get_groups_count,</div><div class='ctx'> 	.get_group_name = tegra_pinctrl_get_group_name,</div><div class='ctx'> 	.get_group_pins = tegra_pinctrl_get_group_pins,</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='ctx'> 	.pin_dbg_show = tegra_pinctrl_pin_dbg_show,</div><div class='add'>+#endif</div><div class='add'>+	.dt_node_to_map = tegra_pinctrl_dt_node_to_map,</div><div class='add'>+	.dt_free_map = tegra_pinctrl_dt_free_map,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int tegra_pinctrl_list_funcs(struct pinctrl_dev *pctldev,</div><div class='del'>-				    unsigned function)</div><div class='add'>+static int tegra_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='ctx'> </div><div class='del'>-	if (function &gt;= pmx-&gt;soc-&gt;nfunctions)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return pmx-&gt;soc-&gt;nfunctions;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *tegra_pinctrl_get_func_name(struct pinctrl_dev *pctldev,</div><div class='hunk'>@@ -121,9 +337,6 @@ static const char *tegra_pinctrl_get_func_name(struct pinctrl_dev *pctldev,</div><div class='ctx'> {</div><div class='ctx'> 	struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='ctx'> </div><div class='del'>-	if (function &gt;= pmx-&gt;soc-&gt;nfunctions)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='ctx'> 	return pmx-&gt;soc-&gt;functions[function].name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -134,9 +347,6 @@ static int tegra_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,</div><div class='ctx'> {</div><div class='ctx'> 	struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='ctx'> </div><div class='del'>-	if (function &gt;= pmx-&gt;soc-&gt;nfunctions)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	*groups = pmx-&gt;soc-&gt;functions[function].groups;</div><div class='ctx'> 	*num_groups = pmx-&gt;soc-&gt;functions[function].ngroups;</div><div class='ctx'> </div><div class='hunk'>@@ -151,18 +361,16 @@ static int tegra_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned function,</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='del'>-	if (group &gt;= pmx-&gt;soc-&gt;ngroups)</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> 	g = &amp;pmx-&gt;soc-&gt;groups[group];</div><div class='ctx'> </div><div class='del'>-	if (g-&gt;mux_reg &lt; 0)</div><div class='add'>+	if (WARN_ON(g-&gt;mux_reg &lt; 0))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(g-&gt;funcs); i++) {</div><div class='ctx'> 		if (g-&gt;funcs[i] == function)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='del'>-	if (i == ARRAY_SIZE(g-&gt;funcs))</div><div class='add'>+	if (WARN_ON(i == ARRAY_SIZE(g-&gt;funcs)))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	val = pmx_readl(pmx, g-&gt;mux_bank, g-&gt;mux_reg);</div><div class='hunk'>@@ -180,11 +388,9 @@ static void tegra_pinctrl_disable(struct pinctrl_dev *pctldev,</div><div class='ctx'> 	const struct tegra_pingroup *g;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='del'>-	if (group &gt;= pmx-&gt;soc-&gt;ngroups)</div><div class='del'>-		return;</div><div class='ctx'> 	g = &amp;pmx-&gt;soc-&gt;groups[group];</div><div class='ctx'> </div><div class='del'>-	if (g-&gt;mux_reg &lt; 0)</div><div class='add'>+	if (WARN_ON(g-&gt;mux_reg &lt; 0))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	val = pmx_readl(pmx, g-&gt;mux_bank, g-&gt;mux_reg);</div><div class='hunk'>@@ -194,7 +400,7 @@ static void tegra_pinctrl_disable(struct pinctrl_dev *pctldev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pinmux_ops tegra_pinmux_ops = {</div><div class='del'>-	.list_functions = tegra_pinctrl_list_funcs,</div><div class='add'>+	.get_functions_count = tegra_pinctrl_get_funcs_count,</div><div class='ctx'> 	.get_function_name = tegra_pinctrl_get_func_name,</div><div class='ctx'> 	.get_function_groups = tegra_pinctrl_get_func_groups,</div><div class='ctx'> 	.enable = tegra_pinctrl_enable,</div><div class='hunk'>@@ -204,6 +410,7 @@ static struct pinmux_ops tegra_pinmux_ops = {</div><div class='ctx'> static int tegra_pinconf_reg(struct tegra_pmx *pmx,</div><div class='ctx'> 			     const struct tegra_pingroup *g,</div><div class='ctx'> 			     enum tegra_pinconf_param param,</div><div class='add'>+			     bool report_err,</div><div class='ctx'> 			     s8 *bank, s16 *reg, s8 *bit, s8 *width)</div><div class='ctx'> {</div><div class='ctx'> 	switch (param) {</div><div class='hunk'>@@ -291,9 +498,10 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (*reg &lt; 0) {</div><div class='del'>-		dev_err(pmx-&gt;dev,</div><div class='del'>-			"Config param %04x not supported on group %s\n",</div><div class='del'>-			param, g-&gt;name);</div><div class='add'>+		if (report_err)</div><div class='add'>+			dev_err(pmx-&gt;dev,</div><div class='add'>+				"Config param %04x not supported on group %s\n",</div><div class='add'>+				param, g-&gt;name);</div><div class='ctx'> 		return -ENOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -303,12 +511,14 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,</div><div class='ctx'> static int tegra_pinconf_get(struct pinctrl_dev *pctldev,</div><div class='ctx'> 			     unsigned pin, unsigned long *config)</div><div class='ctx'> {</div><div class='add'>+	dev_err(pctldev-&gt;dev, "pin_config_get op not supported\n");</div><div class='ctx'> 	return -ENOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tegra_pinconf_set(struct pinctrl_dev *pctldev,</div><div class='ctx'> 			     unsigned pin, unsigned long config)</div><div class='ctx'> {</div><div class='add'>+	dev_err(pctldev-&gt;dev, "pin_config_set op not supported\n");</div><div class='ctx'> 	return -ENOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -324,11 +534,10 @@ static int tegra_pinconf_group_get(struct pinctrl_dev *pctldev,</div><div class='ctx'> 	s16 reg;</div><div class='ctx'> 	u32 val, mask;</div><div class='ctx'> </div><div class='del'>-	if (group &gt;= pmx-&gt;soc-&gt;ngroups)</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> 	g = &amp;pmx-&gt;soc-&gt;groups[group];</div><div class='ctx'> </div><div class='del'>-	ret = tegra_pinconf_reg(pmx, g, param, &amp;bank, &amp;reg, &amp;bit, &amp;width);</div><div class='add'>+	ret = tegra_pinconf_reg(pmx, g, param, true, &amp;bank, &amp;reg, &amp;bit,</div><div class='add'>+				&amp;width);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -353,11 +562,10 @@ static int tegra_pinconf_group_set(struct pinctrl_dev *pctldev,</div><div class='ctx'> 	s16 reg;</div><div class='ctx'> 	u32 val, mask;</div><div class='ctx'> </div><div class='del'>-	if (group &gt;= pmx-&gt;soc-&gt;ngroups)</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> 	g = &amp;pmx-&gt;soc-&gt;groups[group];</div><div class='ctx'> </div><div class='del'>-	ret = tegra_pinconf_reg(pmx, g, param, &amp;bank, &amp;reg, &amp;bit, &amp;width);</div><div class='add'>+	ret = tegra_pinconf_reg(pmx, g, param, true, &amp;bank, &amp;reg, &amp;bit,</div><div class='add'>+				&amp;width);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -365,8 +573,10 @@ static int tegra_pinconf_group_set(struct pinctrl_dev *pctldev,</div><div class='ctx'> </div><div class='ctx'> 	/* LOCK can't be cleared */</div><div class='ctx'> 	if (param == TEGRA_PINCONF_PARAM_LOCK) {</div><div class='del'>-		if ((val &amp; BIT(bit)) &amp;&amp; !arg)</div><div class='add'>+		if ((val &amp; BIT(bit)) &amp;&amp; !arg) {</div><div class='add'>+			dev_err(pctldev-&gt;dev, "LOCK bit cannot be cleared\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Special-case Boolean values; allow any non-zero as true */</div><div class='hunk'>@@ -375,8 +585,12 @@ static int tegra_pinconf_group_set(struct pinctrl_dev *pctldev,</div><div class='ctx'> </div><div class='ctx'> 	/* Range-check user-supplied value */</div><div class='ctx'> 	mask = (1 &lt;&lt; width) - 1;</div><div class='del'>-	if (arg &amp; ~mask)</div><div class='add'>+	if (arg &amp; ~mask) {</div><div class='add'>+		dev_err(pctldev-&gt;dev,</div><div class='add'>+			"config %lx: %x too big for %d bit register\n",</div><div class='add'>+			config, arg, width);</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Update register */</div><div class='ctx'> 	val &amp;= ~(mask &lt;&lt; bit);</div><div class='hunk'>@@ -386,23 +600,78 @@ static int tegra_pinconf_group_set(struct pinctrl_dev *pctldev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='ctx'> static void tegra_pinconf_dbg_show(struct pinctrl_dev *pctldev,</div><div class='ctx'> 				   struct seq_file *s, unsigned offset)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const char *strip_prefix(const char *s)</div><div class='add'>+{</div><div class='add'>+	const char *comma = strchr(s, ',');</div><div class='add'>+	if (!comma)</div><div class='add'>+		return s;</div><div class='add'>+</div><div class='add'>+	return comma + 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void tegra_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,</div><div class='del'>-					 struct seq_file *s, unsigned selector)</div><div class='add'>+					 struct seq_file *s, unsigned group)</div><div class='ctx'> {</div><div class='add'>+	struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct tegra_pingroup *g;</div><div class='add'>+	int i, ret;</div><div class='add'>+	s8 bank, bit, width;</div><div class='add'>+	s16 reg;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	g = &amp;pmx-&gt;soc-&gt;groups[group];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(cfg_params); i++) {</div><div class='add'>+		ret = tegra_pinconf_reg(pmx, g, cfg_params[i].param, false,</div><div class='add'>+					&amp;bank, &amp;reg, &amp;bit, &amp;width);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		val = pmx_readl(pmx, bank, reg);</div><div class='add'>+		val &gt;&gt;= bit;</div><div class='add'>+		val &amp;= (1 &lt;&lt; width) - 1;</div><div class='add'>+</div><div class='add'>+		seq_printf(s, "\n\t%s=%u",</div><div class='add'>+			   strip_prefix(cfg_params[i].property), val);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void tegra_pinconf_config_dbg_show(struct pinctrl_dev *pctldev,</div><div class='add'>+					  struct seq_file *s,</div><div class='add'>+					  unsigned long config)</div><div class='add'>+{</div><div class='add'>+	enum tegra_pinconf_param param = TEGRA_PINCONF_UNPACK_PARAM(config);</div><div class='add'>+	u16 arg = TEGRA_PINCONF_UNPACK_ARG(config);</div><div class='add'>+	const char *pname = "unknown";</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(cfg_params); i++) {</div><div class='add'>+		if (cfg_params[i].param == param) {</div><div class='add'>+			pname = cfg_params[i].property;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_printf(s, "%s=%d", strip_prefix(pname), arg);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> struct pinconf_ops tegra_pinconf_ops = {</div><div class='ctx'> 	.pin_config_get = tegra_pinconf_get,</div><div class='ctx'> 	.pin_config_set = tegra_pinconf_set,</div><div class='ctx'> 	.pin_config_group_get = tegra_pinconf_group_get,</div><div class='ctx'> 	.pin_config_group_set = tegra_pinconf_group_set,</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='ctx'> 	.pin_config_dbg_show = tegra_pinconf_dbg_show,</div><div class='ctx'> 	.pin_config_group_dbg_show = tegra_pinconf_group_dbg_show,</div><div class='add'>+	.pin_config_config_dbg_show = tegra_pinconf_config_dbg_show,</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct pinctrl_gpio_range tegra_pinctrl_gpio_range = {</div><div class='hunk'>@@ -412,60 +681,29 @@ static struct pinctrl_gpio_range tegra_pinctrl_gpio_range = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct pinctrl_desc tegra_pinctrl_desc = {</div><div class='del'>-	.name = DRIVER_NAME,</div><div class='ctx'> 	.pctlops = &amp;tegra_pinctrl_ops,</div><div class='ctx'> 	.pmxops = &amp;tegra_pinmux_ops,</div><div class='ctx'> 	.confops = &amp;tegra_pinconf_ops,</div><div class='ctx'> 	.owner = THIS_MODULE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct of_device_id tegra_pinctrl_of_match[] __devinitdata = {</div><div class='del'>-#ifdef CONFIG_PINCTRL_TEGRA20</div><div class='del'>-	{</div><div class='del'>-		.compatible = "nvidia,tegra20-pinmux-disabled",</div><div class='del'>-		.data = tegra20_pinctrl_init,</div><div class='del'>-	},</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_PINCTRL_TEGRA30</div><div class='del'>-	{</div><div class='del'>-		.compatible = "nvidia,tegra30-pinmux-disabled",</div><div class='del'>-		.data = tegra30_pinctrl_init,</div><div class='del'>-	},</div><div class='del'>-#endif</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __devinit tegra_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+int __devinit tegra_pinctrl_probe(struct platform_device *pdev,</div><div class='add'>+			const struct tegra_pinctrl_soc_data *soc_data)</div><div class='ctx'> {</div><div class='del'>-	const struct of_device_id *match;</div><div class='del'>-	tegra_pinctrl_soc_initf initf = NULL;</div><div class='ctx'> 	struct tegra_pmx *pmx;</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	match = of_match_device(tegra_pinctrl_of_match, &amp;pdev-&gt;dev);</div><div class='del'>-	if (match)</div><div class='del'>-		initf = (tegra_pinctrl_soc_initf)match-&gt;data;</div><div class='del'>-#ifdef CONFIG_PINCTRL_TEGRA20</div><div class='del'>-	if (!initf)</div><div class='del'>-		initf = tegra20_pinctrl_init;</div><div class='del'>-#endif</div><div class='del'>-	if (!initf) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-			"Could not determine SoC-specific init func\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	pmx = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*pmx), GFP_KERNEL);</div><div class='ctx'> 	if (!pmx) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Can't alloc tegra_pmx\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	pmx-&gt;dev = &amp;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	(*initf)(&amp;pmx-&gt;soc);</div><div class='add'>+	pmx-&gt;soc = soc_data;</div><div class='ctx'> </div><div class='ctx'> 	tegra_pinctrl_gpio_range.npins = pmx-&gt;soc-&gt;ngpios;</div><div class='add'>+	tegra_pinctrl_desc.name = dev_name(&amp;pdev-&gt;dev);</div><div class='ctx'> 	tegra_pinctrl_desc.pins = pmx-&gt;soc-&gt;pins;</div><div class='ctx'> 	tegra_pinctrl_desc.npins = pmx-&gt;soc-&gt;npins;</div><div class='ctx'> </div><div class='hunk'>@@ -520,8 +758,9 @@ static int __devinit tegra_pinctrl_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(tegra_pinctrl_probe);</div><div class='ctx'> </div><div class='del'>-static int __devexit tegra_pinctrl_remove(struct platform_device *pdev)</div><div class='add'>+int __devexit tegra_pinctrl_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tegra_pmx *pmx = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -530,30 +769,4 @@ static int __devexit tegra_pinctrl_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static struct platform_driver tegra_pinctrl_driver = {</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = DRIVER_NAME,</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='del'>-		.of_match_table = tegra_pinctrl_of_match,</div><div class='del'>-	},</div><div class='del'>-	.probe = tegra_pinctrl_probe,</div><div class='del'>-	.remove = __devexit_p(tegra_pinctrl_remove),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init tegra_pinctrl_init(void)</div><div class='del'>-{</div><div class='del'>-	return platform_driver_register(&amp;tegra_pinctrl_driver);</div><div class='del'>-}</div><div class='del'>-arch_initcall(tegra_pinctrl_init);</div><div class='del'>-</div><div class='del'>-static void __exit tegra_pinctrl_exit(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;tegra_pinctrl_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(tegra_pinctrl_exit);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Stephen Warren &lt;swarren@nvidia.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("NVIDIA Tegra pinctrl driver");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_DEVICE_TABLE(of, tegra_pinctrl_of_match);</div><div class='add'>+EXPORT_SYMBOL_GPL(tegra_pinctrl_remove);</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-tegra.h b/drivers/pinctrl/pinctrl-tegra.h<br/>index 782c795326ef..705c007a38cc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-tegra.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/pinctrl-tegra.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-tegra.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-tegra.h</a></div><div class='hunk'>@@ -139,25 +139,8 @@ struct tegra_pinctrl_soc_data {</div><div class='ctx'> 	unsigned ngroups;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * tegra_pinctrl_soc_initf() - Retrieve pin controller details for a SoC.</div><div class='del'>- * @soc_data:	This pointer must be updated to point at a struct containing</div><div class='del'>- *		details of the SoC.</div><div class='del'>- */</div><div class='del'>-typedef void (*tegra_pinctrl_soc_initf)(</div><div class='del'>-			const struct tegra_pinctrl_soc_data **soc_data);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * tegra20_pinctrl_init() - Retrieve pin controller details for Tegra20</div><div class='del'>- * @soc_data:	This pointer will be updated to point at a struct containing</div><div class='del'>- *		details of Tegra20's pin controller.</div><div class='del'>- */</div><div class='del'>-void tegra20_pinctrl_init(const struct tegra_pinctrl_soc_data **soc_data);</div><div class='del'>-/**</div><div class='del'>- * tegra30_pinctrl_init() - Retrieve pin controller details for Tegra20</div><div class='del'>- * @soc_data:	This pointer will be updated to point at a struct containing</div><div class='del'>- *		details of Tegra30's pin controller.</div><div class='del'>- */</div><div class='del'>-void tegra30_pinctrl_init(const struct tegra_pinctrl_soc_data **soc_data);</div><div class='add'>+int tegra_pinctrl_probe(struct platform_device *pdev,</div><div class='add'>+			const struct tegra_pinctrl_soc_data *soc_data);</div><div class='add'>+int tegra_pinctrl_remove(struct platform_device *pdev);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-tegra20.c b/drivers/pinctrl/pinctrl-tegra20.c<br/>index f69ff96aa292..a74f9a568536 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-tegra20.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/pinctrl-tegra20.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-tegra20.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-tegra20.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Pinctrl data for the NVIDIA Tegra20 pinmux</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2011, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ * Copyright (c) 2011-2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * Derived from code:</div><div class='ctx'>  * Copyright (C) 2010 Google, Inc.</div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'>  * more details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='ctx'> #include &lt;linux/pinctrl/pinmux.h&gt;</div><div class='hunk'>@@ -2854,7 +2856,39 @@ static const struct tegra_pinctrl_soc_data tegra20_pinctrl = {</div><div class='ctx'> 	.ngroups = ARRAY_SIZE(tegra20_groups),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void __devinit tegra20_pinctrl_init(const struct tegra_pinctrl_soc_data **soc)</div><div class='add'>+static int __devinit tegra20_pinctrl_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	*soc = &amp;tegra20_pinctrl;</div><div class='add'>+	return tegra_pinctrl_probe(pdev, &amp;tegra20_pinctrl);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static struct of_device_id tegra20_pinctrl_of_match[] __devinitdata = {</div><div class='add'>+	{ .compatible = "nvidia,tegra20-pinmux", },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_driver tegra20_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "tegra20-pinctrl",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = tegra20_pinctrl_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = tegra20_pinctrl_probe,</div><div class='add'>+	.remove = __devexit_p(tegra_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init tegra20_pinctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;tegra20_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(tegra20_pinctrl_init);</div><div class='add'>+</div><div class='add'>+static void __exit tegra20_pinctrl_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;tegra20_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(tegra20_pinctrl_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Stephen Warren &lt;swarren@nvidia.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("NVIDIA Tegra20 pinctrl driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_DEVICE_TABLE(of, tegra20_pinctrl_of_match);</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-tegra30.c b/drivers/pinctrl/pinctrl-tegra30.c<br/>index 4d7571d4a431..0386fdf0da16 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-tegra30.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/pinctrl-tegra30.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-tegra30.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-tegra30.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Pinctrl data for the NVIDIA Tegra30 pinmux</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2011, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ * Copyright (c) 2011-2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify it</div><div class='ctx'>  * under the terms and conditions of the GNU General Public License,</div><div class='hunk'>@@ -13,6 +13,8 @@</div><div class='ctx'>  * more details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='ctx'> #include &lt;linux/pinctrl/pinmux.h&gt;</div><div class='hunk'>@@ -3720,7 +3722,39 @@ static const struct tegra_pinctrl_soc_data tegra30_pinctrl = {</div><div class='ctx'> 	.ngroups = ARRAY_SIZE(tegra30_groups),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void __devinit tegra30_pinctrl_init(const struct tegra_pinctrl_soc_data **soc)</div><div class='add'>+static int __devinit tegra30_pinctrl_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	*soc = &amp;tegra30_pinctrl;</div><div class='add'>+	return tegra_pinctrl_probe(pdev, &amp;tegra30_pinctrl);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static struct of_device_id tegra30_pinctrl_of_match[] __devinitdata = {</div><div class='add'>+	{ .compatible = "nvidia,tegra30-pinmux", },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_driver tegra30_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "tegra30-pinctrl",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = tegra30_pinctrl_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = tegra30_pinctrl_probe,</div><div class='add'>+	.remove = __devexit_p(tegra_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init tegra30_pinctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;tegra30_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(tegra30_pinctrl_init);</div><div class='add'>+</div><div class='add'>+static void __exit tegra30_pinctrl_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;tegra30_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(tegra30_pinctrl_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Stephen Warren &lt;swarren@nvidia.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("NVIDIA Tegra30 pinctrl driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_DEVICE_TABLE(of, tegra30_pinctrl_of_match);</div><div class='head'>diff --git a/drivers/pinctrl/pinctrl-u300.c b/drivers/pinctrl/pinctrl-u300.c<br/>index 26eb8ccd72d5..05d029911be6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-u300.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/pinctrl-u300.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinctrl-u300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinctrl-u300.c</a></div><div class='hunk'>@@ -836,18 +836,14 @@ static const struct u300_pin_group u300_pin_groups[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int u300_list_groups(struct pinctrl_dev *pctldev, unsigned selector)</div><div class='add'>+static int u300_get_groups_count(struct pinctrl_dev *pctldev)</div><div class='ctx'> {</div><div class='del'>-	if (selector &gt;= ARRAY_SIZE(u300_pin_groups))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+	return ARRAY_SIZE(u300_pin_groups);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *u300_get_group_name(struct pinctrl_dev *pctldev,</div><div class='ctx'> 				       unsigned selector)</div><div class='ctx'> {</div><div class='del'>-	if (selector &gt;= ARRAY_SIZE(u300_pin_groups))</div><div class='del'>-		return NULL;</div><div class='ctx'> 	return u300_pin_groups[selector].name;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -855,8 +851,6 @@ static int u300_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='ctx'> 			       const unsigned **pins,</div><div class='ctx'> 			       unsigned *num_pins)</div><div class='ctx'> {</div><div class='del'>-	if (selector &gt;= ARRAY_SIZE(u300_pin_groups))</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> 	*pins = u300_pin_groups[selector].pins;</div><div class='ctx'> 	*num_pins = u300_pin_groups[selector].num_pins;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -869,7 +863,7 @@ static void u300_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pinctrl_ops u300_pctrl_ops = {</div><div class='del'>-	.list_groups = u300_list_groups,</div><div class='add'>+	.get_groups_count = u300_get_groups_count,</div><div class='ctx'> 	.get_group_name = u300_get_group_name,</div><div class='ctx'> 	.get_group_pins = u300_get_group_pins,</div><div class='ctx'> 	.pin_dbg_show = u300_pin_dbg_show,</div><div class='hunk'>@@ -991,11 +985,9 @@ static void u300_pmx_disable(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='ctx'> 	u300_pmx_endisable(upmx, selector, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int u300_pmx_list_funcs(struct pinctrl_dev *pctldev, unsigned selector)</div><div class='add'>+static int u300_pmx_get_funcs_count(struct pinctrl_dev *pctldev)</div><div class='ctx'> {</div><div class='del'>-	if (selector &gt;= ARRAY_SIZE(u300_pmx_functions))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='add'>+	return ARRAY_SIZE(u300_pmx_functions);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *u300_pmx_get_func_name(struct pinctrl_dev *pctldev,</div><div class='hunk'>@@ -1014,7 +1006,7 @@ static int u300_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pinmux_ops u300_pmx_ops = {</div><div class='del'>-	.list_functions = u300_pmx_list_funcs,</div><div class='add'>+	.get_functions_count = u300_pmx_get_funcs_count,</div><div class='ctx'> 	.get_function_name = u300_pmx_get_func_name,</div><div class='ctx'> 	.get_function_groups = u300_pmx_get_groups,</div><div class='ctx'> 	.enable = u300_pmx_enable,</div><div class='head'>diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c<br/>index 4e62783a573a..3d5ac73bd5a7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/pinmux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/pinmux.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinmux.c</a></div><div class='hunk'>@@ -33,22 +33,25 @@</div><div class='ctx'> int pinmux_check_ops(struct pinctrl_dev *pctldev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct pinmux_ops *ops = pctldev-&gt;desc-&gt;pmxops;</div><div class='add'>+	unsigned nfuncs;</div><div class='ctx'> 	unsigned selector = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Check that we implement required operations */</div><div class='del'>-	if (!ops-&gt;list_functions ||</div><div class='add'>+	if (!ops ||</div><div class='add'>+	    !ops-&gt;get_functions_count ||</div><div class='ctx'> 	    !ops-&gt;get_function_name ||</div><div class='ctx'> 	    !ops-&gt;get_function_groups ||</div><div class='del'>-	    !ops-&gt;enable ||</div><div class='del'>-	    !ops-&gt;disable)</div><div class='add'>+	    !ops-&gt;enable) {</div><div class='add'>+		dev_err(pctldev-&gt;dev, "pinmux ops lacks necessary functions\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-</div><div class='add'>+	}</div><div class='ctx'> 	/* Check that all functions registered have names */</div><div class='del'>-	while (ops-&gt;list_functions(pctldev, selector) &gt;= 0) {</div><div class='add'>+	nfuncs = ops-&gt;get_functions_count(pctldev);</div><div class='add'>+	while (selector &lt; nfuncs) {</div><div class='ctx'> 		const char *fname = ops-&gt;get_function_name(pctldev,</div><div class='ctx'> 							   selector);</div><div class='ctx'> 		if (!fname) {</div><div class='del'>-			pr_err("pinmux ops has no name for function%u\n",</div><div class='add'>+			dev_err(pctldev-&gt;dev, "pinmux ops has no name for function%u\n",</div><div class='ctx'> 				selector);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -85,20 +88,23 @@ static int pin_request(struct pinctrl_dev *pctldev,</div><div class='ctx'> 	const struct pinmux_ops *ops = pctldev-&gt;desc-&gt;pmxops;</div><div class='ctx'> 	int status = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	dev_dbg(pctldev-&gt;dev, "request pin %d for %s\n", pin, owner);</div><div class='del'>-</div><div class='ctx'> 	desc = pin_desc_get(pctldev, pin);</div><div class='ctx'> 	if (desc == NULL) {</div><div class='ctx'> 		dev_err(pctldev-&gt;dev,</div><div class='del'>-			"pin is not registered so it cannot be requested\n");</div><div class='add'>+			"pin %d is not registered so it cannot be requested\n",</div><div class='add'>+			pin);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	dev_dbg(pctldev-&gt;dev, "request pin %d (%s) for %s\n",</div><div class='add'>+		pin, desc-&gt;name, owner);</div><div class='add'>+</div><div class='ctx'> 	if (gpio_range) {</div><div class='ctx'> 		/* There's no need to support multiple GPIO requests */</div><div class='ctx'> 		if (desc-&gt;gpio_owner) {</div><div class='ctx'> 			dev_err(pctldev-&gt;dev,</div><div class='del'>-				"pin already requested\n");</div><div class='add'>+				"pin %s already requested by %s; cannot claim for %s\n",</div><div class='add'>+				desc-&gt;name, desc-&gt;gpio_owner, owner);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -106,7 +112,8 @@ static int pin_request(struct pinctrl_dev *pctldev,</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (desc-&gt;mux_usecount &amp;&amp; strcmp(desc-&gt;mux_owner, owner)) {</div><div class='ctx'> 			dev_err(pctldev-&gt;dev,</div><div class='del'>-				"pin already requested\n");</div><div class='add'>+				"pin %s already requested by %s; cannot claim for %s\n",</div><div class='add'>+				desc-&gt;name, desc-&gt;mux_owner, owner);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -139,8 +146,7 @@ static int pin_request(struct pinctrl_dev *pctldev,</div><div class='ctx'> 		status = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (status) {</div><div class='del'>-		dev_err(pctldev-&gt;dev, "-&gt;request on device %s failed for pin %d\n",</div><div class='del'>-		       pctldev-&gt;desc-&gt;name, pin);</div><div class='add'>+		dev_err(pctldev-&gt;dev, "request() failed for pin %d\n", pin);</div><div class='ctx'> 		module_put(pctldev-&gt;owner);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -157,7 +163,7 @@ out_free_pin:</div><div class='ctx'> out:</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		dev_err(pctldev-&gt;dev, "pin-%d (%s) status %d\n",</div><div class='del'>-		       pin, owner, status);</div><div class='add'>+			pin, owner, status);</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='hunk'>@@ -287,10 +293,11 @@ static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev,</div><div class='ctx'> 					const char *function)</div><div class='ctx'> {</div><div class='ctx'> 	const struct pinmux_ops *ops = pctldev-&gt;desc-&gt;pmxops;</div><div class='add'>+	unsigned nfuncs = ops-&gt;get_functions_count(pctldev);</div><div class='ctx'> 	unsigned selector = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* See if this pctldev has this function */</div><div class='del'>-	while (ops-&gt;list_functions(pctldev, selector) &gt;= 0) {</div><div class='add'>+	while (selector &lt; nfuncs) {</div><div class='ctx'> 		const char *fname = ops-&gt;get_function_name(pctldev,</div><div class='ctx'> 							   selector);</div><div class='ctx'> </div><div class='hunk'>@@ -319,18 +326,32 @@ int pinmux_map_to_setting(struct pinctrl_map const *map,</div><div class='ctx'> 	const unsigned *pins;</div><div class='ctx'> 	unsigned num_pins;</div><div class='ctx'> </div><div class='del'>-	setting-&gt;data.mux.func =</div><div class='del'>-		pinmux_func_name_to_selector(pctldev, map-&gt;data.mux.function);</div><div class='del'>-	if (setting-&gt;data.mux.func &lt; 0)</div><div class='del'>-		return setting-&gt;data.mux.func;</div><div class='add'>+	if (!pmxops) {</div><div class='add'>+		dev_err(pctldev-&gt;dev, "does not support mux function\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = pinmux_func_name_to_selector(pctldev, map-&gt;data.mux.function);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(pctldev-&gt;dev, "invalid function %s in map table\n",</div><div class='add'>+			map-&gt;data.mux.function);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	setting-&gt;data.mux.func = ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = pmxops-&gt;get_function_groups(pctldev, setting-&gt;data.mux.func,</div><div class='ctx'> 					  &amp;groups, &amp;num_groups);</div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(pctldev-&gt;dev, "can't query groups for function %s\n",</div><div class='add'>+			map-&gt;data.mux.function);</div><div class='ctx'> 		return ret;</div><div class='del'>-	if (!num_groups)</div><div class='add'>+	}</div><div class='add'>+	if (!num_groups) {</div><div class='add'>+		dev_err(pctldev-&gt;dev,</div><div class='add'>+			"function %s can't be selected on any group\n",</div><div class='add'>+			map-&gt;data.mux.function);</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-</div><div class='add'>+	}</div><div class='ctx'> 	if (map-&gt;data.mux.group) {</div><div class='ctx'> 		bool found = false;</div><div class='ctx'> 		group = map-&gt;data.mux.group;</div><div class='hunk'>@@ -340,15 +361,23 @@ int pinmux_map_to_setting(struct pinctrl_map const *map,</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		if (!found)</div><div class='add'>+		if (!found) {</div><div class='add'>+			dev_err(pctldev-&gt;dev,</div><div class='add'>+				"invalid group \"%s\" for function \"%s\"\n",</div><div class='add'>+				group, map-&gt;data.mux.function);</div><div class='ctx'> 			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		group = groups[0];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	setting-&gt;data.mux.group = pinctrl_get_group_selector(pctldev, group);</div><div class='del'>-	if (setting-&gt;data.mux.group &lt; 0)</div><div class='del'>-		return setting-&gt;data.mux.group;</div><div class='add'>+	ret = pinctrl_get_group_selector(pctldev, group);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(pctldev-&gt;dev, "invalid group %s in map table\n",</div><div class='add'>+			map-&gt;data.mux.group);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	setting-&gt;data.mux.group = ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = pctlops-&gt;get_group_pins(pctldev, setting-&gt;data.mux.group, &amp;pins,</div><div class='ctx'> 				      &amp;num_pins);</div><div class='hunk'>@@ -364,7 +393,7 @@ int pinmux_map_to_setting(struct pinctrl_map const *map,</div><div class='ctx'> 		ret = pin_request(pctldev, pins[i], map-&gt;dev_name, NULL);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(pctldev-&gt;dev,</div><div class='del'>-				"could not get request pin %d on device %s\n",</div><div class='add'>+				"could not request pin %d on device %s\n",</div><div class='ctx'> 				pins[i], pinctrl_dev_get_name(pctldev));</div><div class='ctx'> 			/* On error release all taken pins */</div><div class='ctx'> 			i--; /* this pin just failed */</div><div class='hunk'>@@ -467,7 +496,8 @@ void pinmux_disable_setting(struct pinctrl_setting const *setting)</div><div class='ctx'> 		desc-&gt;mux_setting = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ops-&gt;disable(pctldev, setting-&gt;data.mux.func, setting-&gt;data.mux.group);</div><div class='add'>+	if (ops-&gt;disable)</div><div class='add'>+		ops-&gt;disable(pctldev, setting-&gt;data.mux.func, setting-&gt;data.mux.group);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='hunk'>@@ -477,11 +507,15 @@ static int pinmux_functions_show(struct seq_file *s, void *what)</div><div class='ctx'> {</div><div class='ctx'> 	struct pinctrl_dev *pctldev = s-&gt;private;</div><div class='ctx'> 	const struct pinmux_ops *pmxops = pctldev-&gt;desc-&gt;pmxops;</div><div class='add'>+	unsigned nfuncs;</div><div class='ctx'> 	unsigned func_selector = 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;pinctrl_mutex);</div><div class='add'>+	if (!pmxops)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	while (pmxops-&gt;list_functions(pctldev, func_selector) &gt;= 0) {</div><div class='add'>+	mutex_lock(&amp;pinctrl_mutex);</div><div class='add'>+	nfuncs = pmxops-&gt;get_functions_count(pctldev);</div><div class='add'>+	while (func_selector &lt; nfuncs) {</div><div class='ctx'> 		const char *func = pmxops-&gt;get_function_name(pctldev,</div><div class='ctx'> 							  func_selector);</div><div class='ctx'> 		const char * const *groups;</div><div class='hunk'>@@ -515,6 +549,9 @@ static int pinmux_pins_show(struct seq_file *s, void *what)</div><div class='ctx'> 	const struct pinmux_ops *pmxops = pctldev-&gt;desc-&gt;pmxops;</div><div class='ctx'> 	unsigned i, pin;</div><div class='ctx'> </div><div class='add'>+	if (!pmxops)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	seq_puts(s, "Pinmux settings per pin\n");</div><div class='ctx'> 	seq_puts(s, "Format: pin (name): mux_owner gpio_owner hog?\n");</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/pinctrl/pinmux.h b/drivers/pinctrl/pinmux.h<br/>index 6fc47003e95d..d1a98b1c9fce 100644<br/>--- a/<a href='/drm-misc/tree/drivers/pinctrl/pinmux.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/pinctrl/pinmux.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/pinmux.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/pinmux.h</a></div><div class='hunk'>@@ -31,12 +31,6 @@ void pinmux_free_setting(struct pinctrl_setting const *setting);</div><div class='ctx'> int pinmux_enable_setting(struct pinctrl_setting const *setting);</div><div class='ctx'> void pinmux_disable_setting(struct pinctrl_setting const *setting);</div><div class='ctx'> </div><div class='del'>-void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map);</div><div class='del'>-void pinmux_show_setting(struct seq_file *s,</div><div class='del'>-			 struct pinctrl_setting const *setting);</div><div class='del'>-void pinmux_init_device_debugfs(struct dentry *devroot,</div><div class='del'>-				struct pinctrl_dev *pctldev);</div><div class='del'>-</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='ctx'> static inline int pinmux_check_ops(struct pinctrl_dev *pctldev)</div><div class='hunk'>@@ -89,6 +83,18 @@ static inline void pinmux_disable_setting(</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_PINMUX) &amp;&amp; defined(CONFIG_DEBUG_FS)</div><div class='add'>+</div><div class='add'>+void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map);</div><div class='add'>+void pinmux_show_setting(struct seq_file *s,</div><div class='add'>+			 struct pinctrl_setting const *setting);</div><div class='add'>+void pinmux_init_device_debugfs(struct dentry *devroot,</div><div class='add'>+				struct pinctrl_dev *pctldev);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='ctx'> static inline void pinmux_show_map(struct seq_file *s,</div><div class='ctx'> 				   struct pinctrl_map const *map)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/pinctrl/spear/Kconfig b/drivers/pinctrl/spear/Kconfig<br/>new file mode 100644<br/>index 000000000000..91558791e766<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/spear/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+#</div><div class='add'>+# ST Microelectronics SPEAr PINCTRL drivers</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+if PLAT_SPEAR</div><div class='add'>+</div><div class='add'>+config PINCTRL_SPEAR</div><div class='add'>+	bool</div><div class='add'>+	depends on OF</div><div class='add'>+	select PINMUX</div><div class='add'>+	help</div><div class='add'>+	  This enables pin control drivers for SPEAr Platform</div><div class='add'>+</div><div class='add'>+config PINCTRL_SPEAR3XX</div><div class='add'>+	bool</div><div class='add'>+	depends on ARCH_SPEAR3XX</div><div class='add'>+	select PINCTRL_SPEAR</div><div class='add'>+</div><div class='add'>+config PINCTRL_SPEAR300</div><div class='add'>+	bool "ST Microelectronics SPEAr300 SoC pin controller driver"</div><div class='add'>+	depends on MACH_SPEAR300</div><div class='add'>+	select PINCTRL_SPEAR3XX</div><div class='add'>+</div><div class='add'>+config PINCTRL_SPEAR310</div><div class='add'>+	bool "ST Microelectronics SPEAr310 SoC pin controller driver"</div><div class='add'>+	depends on MACH_SPEAR310</div><div class='add'>+	select PINCTRL_SPEAR3XX</div><div class='add'>+</div><div class='add'>+config PINCTRL_SPEAR320</div><div class='add'>+	bool "ST Microelectronics SPEAr320 SoC pin controller driver"</div><div class='add'>+	depends on MACH_SPEAR320</div><div class='add'>+	select PINCTRL_SPEAR3XX</div><div class='add'>+</div><div class='add'>+config PINCTRL_SPEAR1310</div><div class='add'>+	bool "ST Microelectronics SPEAr1310 SoC pin controller driver"</div><div class='add'>+	depends on MACH_SPEAR1310</div><div class='add'>+	select PINCTRL_SPEAR</div><div class='add'>+</div><div class='add'>+config PINCTRL_SPEAR1340</div><div class='add'>+	bool "ST Microelectronics SPEAr1340 SoC pin controller driver"</div><div class='add'>+	depends on MACH_SPEAR1340</div><div class='add'>+	select PINCTRL_SPEAR</div><div class='add'>+</div><div class='add'>+endif</div><div class='head'>diff --git a/drivers/pinctrl/spear/Makefile b/drivers/pinctrl/spear/Makefile<br/>new file mode 100644<br/>index 000000000000..b28a7ba22443<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/spear/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/Makefile</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+# SPEAr pinmux support</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_PINCTRL_SPEAR)	+= pinctrl-spear.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_SPEAR3XX)	+= pinctrl-spear3xx.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_SPEAR300)	+= pinctrl-spear300.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_SPEAR310)	+= pinctrl-spear310.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_SPEAR320)	+= pinctrl-spear320.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_SPEAR1310)	+= pinctrl-spear1310.o</div><div class='add'>+obj-$(CONFIG_PINCTRL_SPEAR1340)	+= pinctrl-spear1340.o</div><div class='head'>diff --git a/drivers/pinctrl/spear/pinctrl-spear.c b/drivers/pinctrl/spear/pinctrl-spear.c<br/>new file mode 100644<br/>index 000000000000..5ae50aadf885<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/spear/pinctrl-spear.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear.c</a></div><div class='hunk'>@@ -0,0 +1,354 @@</div><div class='add'>+/*</div><div class='add'>+ * Driver for the ST Microelectronics SPEAr pinmux</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Inspired from:</div><div class='add'>+ * - U300 Pinctl drivers</div><div class='add'>+ * - Tegra Pinctl drivers</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/machine.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/pinmux.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+#include "pinctrl-spear.h"</div><div class='add'>+</div><div class='add'>+#define DRIVER_NAME "spear-pinmux"</div><div class='add'>+</div><div class='add'>+static inline u32 pmx_readl(struct spear_pmx *pmx, u32 reg)</div><div class='add'>+{</div><div class='add'>+	return readl_relaxed(pmx-&gt;vbase + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void pmx_writel(struct spear_pmx *pmx, u32 val, u32 reg)</div><div class='add'>+{</div><div class='add'>+	writel_relaxed(val, pmx-&gt;vbase + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_mode(struct spear_pmx *pmx, int mode)</div><div class='add'>+{</div><div class='add'>+	struct spear_pmx_mode *pmx_mode = NULL;</div><div class='add'>+	int i;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (!pmx-&gt;machdata-&gt;pmx_modes || !pmx-&gt;machdata-&gt;npmx_modes)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pmx-&gt;machdata-&gt;npmx_modes; i++) {</div><div class='add'>+		if (pmx-&gt;machdata-&gt;pmx_modes[i]-&gt;mode == (1 &lt;&lt; mode)) {</div><div class='add'>+			pmx_mode = pmx-&gt;machdata-&gt;pmx_modes[i];</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pmx_mode)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = pmx_readl(pmx, pmx_mode-&gt;reg);</div><div class='add'>+	val &amp;= ~pmx_mode-&gt;mask;</div><div class='add'>+	val |= pmx_mode-&gt;val;</div><div class='add'>+	pmx_writel(pmx, val, pmx_mode-&gt;reg);</div><div class='add'>+</div><div class='add'>+	pmx-&gt;machdata-&gt;mode = pmx_mode-&gt;mode;</div><div class='add'>+	dev_info(pmx-&gt;dev, "Configured Mode: %s with id: %x\n\n",</div><div class='add'>+			pmx_mode-&gt;name ? pmx_mode-&gt;name : "no_name",</div><div class='add'>+			pmx_mode-&gt;reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __devinit pmx_init_addr(struct spear_pinctrl_machdata *machdata, u16 reg)</div><div class='add'>+{</div><div class='add'>+	struct spear_pingroup *pgroup;</div><div class='add'>+	struct spear_modemux *modemux;</div><div class='add'>+	int i, j, group;</div><div class='add'>+</div><div class='add'>+	for (group = 0; group &lt; machdata-&gt;ngroups; group++) {</div><div class='add'>+		pgroup = machdata-&gt;groups[group];</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; pgroup-&gt;nmodemuxs; i++) {</div><div class='add'>+			modemux = &amp;pgroup-&gt;modemuxs[i];</div><div class='add'>+</div><div class='add'>+			for (j = 0; j &lt; modemux-&gt;nmuxregs; j++)</div><div class='add'>+				if (modemux-&gt;muxregs[j].reg == 0xFFFF)</div><div class='add'>+					modemux-&gt;muxregs[j].reg = reg;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int spear_pinctrl_get_groups_cnt(struct pinctrl_dev *pctldev)</div><div class='add'>+{</div><div class='add'>+	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	return pmx-&gt;machdata-&gt;ngroups;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *spear_pinctrl_get_group_name(struct pinctrl_dev *pctldev,</div><div class='add'>+		unsigned group)</div><div class='add'>+{</div><div class='add'>+	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	return pmx-&gt;machdata-&gt;groups[group]-&gt;name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int spear_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,</div><div class='add'>+		unsigned group, const unsigned **pins, unsigned *num_pins)</div><div class='add'>+{</div><div class='add'>+	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	*pins = pmx-&gt;machdata-&gt;groups[group]-&gt;pins;</div><div class='add'>+	*num_pins = pmx-&gt;machdata-&gt;groups[group]-&gt;npins;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void spear_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,</div><div class='add'>+		struct seq_file *s, unsigned offset)</div><div class='add'>+{</div><div class='add'>+	seq_printf(s, " " DRIVER_NAME);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int spear_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,</div><div class='add'>+				 struct device_node *np_config,</div><div class='add'>+				 struct pinctrl_map **map, unsigned *num_maps)</div><div class='add'>+{</div><div class='add'>+	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct property *prop;</div><div class='add'>+	const char *function, *group;</div><div class='add'>+	int ret, index = 0, count = 0;</div><div class='add'>+</div><div class='add'>+	/* calculate number of maps required */</div><div class='add'>+	for_each_child_of_node(np_config, np) {</div><div class='add'>+		ret = of_property_read_string(np, "st,function", &amp;function);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = of_property_count_strings(np, "st,pins");</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		count += ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!count) {</div><div class='add'>+		dev_err(pmx-&gt;dev, "No child nodes passed via DT\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*map = kzalloc(sizeof(**map) * count, GFP_KERNEL);</div><div class='add'>+	if (!*map)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for_each_child_of_node(np_config, np) {</div><div class='add'>+		of_property_read_string(np, "st,function", &amp;function);</div><div class='add'>+		of_property_for_each_string(np, "st,pins", prop, group) {</div><div class='add'>+			(*map)[index].type = PIN_MAP_TYPE_MUX_GROUP;</div><div class='add'>+			(*map)[index].data.mux.group = group;</div><div class='add'>+			(*map)[index].data.mux.function = function;</div><div class='add'>+			index++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*num_maps = count;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void spear_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,</div><div class='add'>+		struct pinctrl_map *map, unsigned num_maps)</div><div class='add'>+{</div><div class='add'>+	kfree(map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pinctrl_ops spear_pinctrl_ops = {</div><div class='add'>+	.get_groups_count = spear_pinctrl_get_groups_cnt,</div><div class='add'>+	.get_group_name = spear_pinctrl_get_group_name,</div><div class='add'>+	.get_group_pins = spear_pinctrl_get_group_pins,</div><div class='add'>+	.pin_dbg_show = spear_pinctrl_pin_dbg_show,</div><div class='add'>+	.dt_node_to_map = spear_pinctrl_dt_node_to_map,</div><div class='add'>+	.dt_free_map = spear_pinctrl_dt_free_map,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int spear_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)</div><div class='add'>+{</div><div class='add'>+	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	return pmx-&gt;machdata-&gt;nfunctions;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *spear_pinctrl_get_func_name(struct pinctrl_dev *pctldev,</div><div class='add'>+		unsigned function)</div><div class='add'>+{</div><div class='add'>+	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	return pmx-&gt;machdata-&gt;functions[function]-&gt;name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int spear_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,</div><div class='add'>+		unsigned function, const char *const **groups,</div><div class='add'>+		unsigned * const ngroups)</div><div class='add'>+{</div><div class='add'>+	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+</div><div class='add'>+	*groups = pmx-&gt;machdata-&gt;functions[function]-&gt;groups;</div><div class='add'>+	*ngroups = pmx-&gt;machdata-&gt;functions[function]-&gt;ngroups;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int spear_pinctrl_endisable(struct pinctrl_dev *pctldev,</div><div class='add'>+		unsigned function, unsigned group, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);</div><div class='add'>+	const struct spear_pingroup *pgroup;</div><div class='add'>+	const struct spear_modemux *modemux;</div><div class='add'>+	struct spear_muxreg *muxreg;</div><div class='add'>+	u32 val, temp;</div><div class='add'>+	int i, j;</div><div class='add'>+	bool found = false;</div><div class='add'>+</div><div class='add'>+	pgroup = pmx-&gt;machdata-&gt;groups[group];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pgroup-&gt;nmodemuxs; i++) {</div><div class='add'>+		modemux = &amp;pgroup-&gt;modemuxs[i];</div><div class='add'>+</div><div class='add'>+		/* SoC have any modes */</div><div class='add'>+		if (pmx-&gt;machdata-&gt;modes_supported) {</div><div class='add'>+			if (!(pmx-&gt;machdata-&gt;mode &amp; modemux-&gt;modes))</div><div class='add'>+				continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		found = true;</div><div class='add'>+		for (j = 0; j &lt; modemux-&gt;nmuxregs; j++) {</div><div class='add'>+			muxreg = &amp;modemux-&gt;muxregs[j];</div><div class='add'>+</div><div class='add'>+			val = pmx_readl(pmx, muxreg-&gt;reg);</div><div class='add'>+			val &amp;= ~muxreg-&gt;mask;</div><div class='add'>+</div><div class='add'>+			if (enable)</div><div class='add'>+				temp = muxreg-&gt;val;</div><div class='add'>+			else</div><div class='add'>+				temp = ~muxreg-&gt;val;</div><div class='add'>+</div><div class='add'>+			val |= temp;</div><div class='add'>+			pmx_writel(pmx, val, muxreg-&gt;reg);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!found) {</div><div class='add'>+		dev_err(pmx-&gt;dev, "pinmux group: %s not supported\n",</div><div class='add'>+				pgroup-&gt;name);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int spear_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned function,</div><div class='add'>+		unsigned group)</div><div class='add'>+{</div><div class='add'>+	return spear_pinctrl_endisable(pctldev, function, group, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void spear_pinctrl_disable(struct pinctrl_dev *pctldev,</div><div class='add'>+		unsigned function, unsigned group)</div><div class='add'>+{</div><div class='add'>+	spear_pinctrl_endisable(pctldev, function, group, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pinmux_ops spear_pinmux_ops = {</div><div class='add'>+	.get_functions_count = spear_pinctrl_get_funcs_count,</div><div class='add'>+	.get_function_name = spear_pinctrl_get_func_name,</div><div class='add'>+	.get_function_groups = spear_pinctrl_get_func_groups,</div><div class='add'>+	.enable = spear_pinctrl_enable,</div><div class='add'>+	.disable = spear_pinctrl_disable,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pinctrl_desc spear_pinctrl_desc = {</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='add'>+	.pctlops = &amp;spear_pinctrl_ops,</div><div class='add'>+	.pmxops = &amp;spear_pinmux_ops,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __devinit spear_pinctrl_probe(struct platform_device *pdev,</div><div class='add'>+		struct spear_pinctrl_machdata *machdata)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	struct spear_pmx *pmx;</div><div class='add'>+</div><div class='add'>+	if (!machdata)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	pmx = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*pmx), GFP_KERNEL);</div><div class='add'>+	if (!pmx) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Can't alloc spear_pmx\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pmx-&gt;vbase = devm_ioremap(&amp;pdev-&gt;dev, res-&gt;start, resource_size(res));</div><div class='add'>+	if (!pmx-&gt;vbase) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Couldn't ioremap at index 0\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pmx-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	pmx-&gt;machdata = machdata;</div><div class='add'>+</div><div class='add'>+	/* configure mode, if supported by SoC */</div><div class='add'>+	if (machdata-&gt;modes_supported) {</div><div class='add'>+		int mode = 0;</div><div class='add'>+</div><div class='add'>+		if (of_property_read_u32(np, "st,pinmux-mode", &amp;mode)) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "OF: pinmux mode not passed\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (set_mode(pmx, mode)) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "OF: Couldn't configure mode: %x\n",</div><div class='add'>+					mode);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, pmx);</div><div class='add'>+</div><div class='add'>+	spear_pinctrl_desc.pins = machdata-&gt;pins;</div><div class='add'>+	spear_pinctrl_desc.npins = machdata-&gt;npins;</div><div class='add'>+</div><div class='add'>+	pmx-&gt;pctl = pinctrl_register(&amp;spear_pinctrl_desc, &amp;pdev-&gt;dev, pmx);</div><div class='add'>+	if (IS_ERR(pmx-&gt;pctl)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Couldn't register pinctrl driver\n");</div><div class='add'>+		return PTR_ERR(pmx-&gt;pctl);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __devexit spear_pinctrl_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct spear_pmx *pmx = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	pinctrl_unregister(pmx-&gt;pctl);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/pinctrl/spear/pinctrl-spear.h b/drivers/pinctrl/spear/pinctrl-spear.h<br/>new file mode 100644<br/>index 000000000000..9155783bb47f<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/spear/pinctrl-spear.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear.h</a></div><div class='hunk'>@@ -0,0 +1,393 @@</div><div class='add'>+/*</div><div class='add'>+ * Driver header file for the ST Microelectronics SPEAr pinmux</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __PINMUX_SPEAR_H__</div><div class='add'>+#define __PINMUX_SPEAR_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+struct platform_device;</div><div class='add'>+struct device;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct spear_pmx_mode - SPEAr pmx mode</div><div class='add'>+ * @name: name of pmx mode</div><div class='add'>+ * @mode: mode id</div><div class='add'>+ * @reg: register for configuring this mode</div><div class='add'>+ * @mask: mask of this mode in reg</div><div class='add'>+ * @val: val to be configured at reg after doing (val &amp; mask)</div><div class='add'>+ */</div><div class='add'>+struct spear_pmx_mode {</div><div class='add'>+	const char *const name;</div><div class='add'>+	u16 mode;</div><div class='add'>+	u16 reg;</div><div class='add'>+	u16 mask;</div><div class='add'>+	u32 val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct spear_muxreg - SPEAr mux reg configuration</div><div class='add'>+ * @reg: register offset</div><div class='add'>+ * @mask: mask bits</div><div class='add'>+ * @val: val to be written on mask bits</div><div class='add'>+ */</div><div class='add'>+struct spear_muxreg {</div><div class='add'>+	u16 reg;</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct spear_modemux - SPEAr mode mux configuration</div><div class='add'>+ * @modes: mode ids supported by this group of muxregs</div><div class='add'>+ * @nmuxregs: number of muxreg configurations to be done for modes</div><div class='add'>+ * @muxregs: array of muxreg configurations to be done for modes</div><div class='add'>+ */</div><div class='add'>+struct spear_modemux {</div><div class='add'>+	u16 modes;</div><div class='add'>+	u8 nmuxregs;</div><div class='add'>+	struct spear_muxreg *muxregs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct spear_pingroup - SPEAr pin group configurations</div><div class='add'>+ * @name: name of pin group</div><div class='add'>+ * @pins: array containing pin numbers</div><div class='add'>+ * @npins: size of pins array</div><div class='add'>+ * @modemuxs: array of modemux configurations for this pin group</div><div class='add'>+ * @nmodemuxs: size of array modemuxs</div><div class='add'>+ *</div><div class='add'>+ * A representation of a group of pins in the SPEAr pin controller. Each group</div><div class='add'>+ * allows some parameter or parameters to be configured.</div><div class='add'>+ */</div><div class='add'>+struct spear_pingroup {</div><div class='add'>+	const char *name;</div><div class='add'>+	const unsigned *pins;</div><div class='add'>+	unsigned npins;</div><div class='add'>+	struct spear_modemux *modemuxs;</div><div class='add'>+	unsigned nmodemuxs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct spear_function - SPEAr pinctrl mux function</div><div class='add'>+ * @name: The name of the function, exported to pinctrl core.</div><div class='add'>+ * @groups: An array of pin groups that may select this function.</div><div class='add'>+ * @ngroups: The number of entries in @groups.</div><div class='add'>+ */</div><div class='add'>+struct spear_function {</div><div class='add'>+	const char *name;</div><div class='add'>+	const char *const *groups;</div><div class='add'>+	unsigned ngroups;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct spear_pinctrl_machdata - SPEAr pin controller machine driver</div><div class='add'>+ *	configuration</div><div class='add'>+ * @pins: An array describing all pins the pin controller affects.</div><div class='add'>+ *	All pins which are also GPIOs must be listed first within the *array,</div><div class='add'>+ *	and be numbered identically to the GPIO controller's *numbering.</div><div class='add'>+ * @npins: The numbmer of entries in @pins.</div><div class='add'>+ * @functions: An array describing all mux functions the SoC supports.</div><div class='add'>+ * @nfunctions: The numbmer of entries in @functions.</div><div class='add'>+ * @groups: An array describing all pin groups the pin SoC supports.</div><div class='add'>+ * @ngroups: The numbmer of entries in @groups.</div><div class='add'>+ *</div><div class='add'>+ * @modes_supported: Does SoC support modes</div><div class='add'>+ * @mode: mode configured from probe</div><div class='add'>+ * @pmx_modes: array of modes supported by SoC</div><div class='add'>+ * @npmx_modes: number of entries in pmx_modes.</div><div class='add'>+ */</div><div class='add'>+struct spear_pinctrl_machdata {</div><div class='add'>+	const struct pinctrl_pin_desc *pins;</div><div class='add'>+	unsigned npins;</div><div class='add'>+	struct spear_function **functions;</div><div class='add'>+	unsigned nfunctions;</div><div class='add'>+	struct spear_pingroup **groups;</div><div class='add'>+	unsigned ngroups;</div><div class='add'>+</div><div class='add'>+	bool modes_supported;</div><div class='add'>+	u16 mode;</div><div class='add'>+	struct spear_pmx_mode **pmx_modes;</div><div class='add'>+	unsigned npmx_modes;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct spear_pmx - SPEAr pinctrl mux</div><div class='add'>+ * @dev: pointer to struct dev of platform_device registered</div><div class='add'>+ * @pctl: pointer to struct pinctrl_dev</div><div class='add'>+ * @machdata: pointer to SoC or machine specific structure</div><div class='add'>+ * @vbase: virtual base address of pinmux controller</div><div class='add'>+ */</div><div class='add'>+struct spear_pmx {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct pinctrl_dev *pctl;</div><div class='add'>+	struct spear_pinctrl_machdata *machdata;</div><div class='add'>+	void __iomem *vbase;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* exported routines */</div><div class='add'>+void __devinit pmx_init_addr(struct spear_pinctrl_machdata *machdata, u16 reg);</div><div class='add'>+int __devinit spear_pinctrl_probe(struct platform_device *pdev,</div><div class='add'>+		struct spear_pinctrl_machdata *machdata);</div><div class='add'>+int __devexit spear_pinctrl_remove(struct platform_device *pdev);</div><div class='add'>+</div><div class='add'>+#define SPEAR_PIN_0_TO_101		\</div><div class='add'>+	PINCTRL_PIN(0, "PLGPIO0"),	\</div><div class='add'>+	PINCTRL_PIN(1, "PLGPIO1"),	\</div><div class='add'>+	PINCTRL_PIN(2, "PLGPIO2"),	\</div><div class='add'>+	PINCTRL_PIN(3, "PLGPIO3"),	\</div><div class='add'>+	PINCTRL_PIN(4, "PLGPIO4"),	\</div><div class='add'>+	PINCTRL_PIN(5, "PLGPIO5"),	\</div><div class='add'>+	PINCTRL_PIN(6, "PLGPIO6"),	\</div><div class='add'>+	PINCTRL_PIN(7, "PLGPIO7"),	\</div><div class='add'>+	PINCTRL_PIN(8, "PLGPIO8"),	\</div><div class='add'>+	PINCTRL_PIN(9, "PLGPIO9"),	\</div><div class='add'>+	PINCTRL_PIN(10, "PLGPIO10"),	\</div><div class='add'>+	PINCTRL_PIN(11, "PLGPIO11"),	\</div><div class='add'>+	PINCTRL_PIN(12, "PLGPIO12"),	\</div><div class='add'>+	PINCTRL_PIN(13, "PLGPIO13"),	\</div><div class='add'>+	PINCTRL_PIN(14, "PLGPIO14"),	\</div><div class='add'>+	PINCTRL_PIN(15, "PLGPIO15"),	\</div><div class='add'>+	PINCTRL_PIN(16, "PLGPIO16"),	\</div><div class='add'>+	PINCTRL_PIN(17, "PLGPIO17"),	\</div><div class='add'>+	PINCTRL_PIN(18, "PLGPIO18"),	\</div><div class='add'>+	PINCTRL_PIN(19, "PLGPIO19"),	\</div><div class='add'>+	PINCTRL_PIN(20, "PLGPIO20"),	\</div><div class='add'>+	PINCTRL_PIN(21, "PLGPIO21"),	\</div><div class='add'>+	PINCTRL_PIN(22, "PLGPIO22"),	\</div><div class='add'>+	PINCTRL_PIN(23, "PLGPIO23"),	\</div><div class='add'>+	PINCTRL_PIN(24, "PLGPIO24"),	\</div><div class='add'>+	PINCTRL_PIN(25, "PLGPIO25"),	\</div><div class='add'>+	PINCTRL_PIN(26, "PLGPIO26"),	\</div><div class='add'>+	PINCTRL_PIN(27, "PLGPIO27"),	\</div><div class='add'>+	PINCTRL_PIN(28, "PLGPIO28"),	\</div><div class='add'>+	PINCTRL_PIN(29, "PLGPIO29"),	\</div><div class='add'>+	PINCTRL_PIN(30, "PLGPIO30"),	\</div><div class='add'>+	PINCTRL_PIN(31, "PLGPIO31"),	\</div><div class='add'>+	PINCTRL_PIN(32, "PLGPIO32"),	\</div><div class='add'>+	PINCTRL_PIN(33, "PLGPIO33"),	\</div><div class='add'>+	PINCTRL_PIN(34, "PLGPIO34"),	\</div><div class='add'>+	PINCTRL_PIN(35, "PLGPIO35"),	\</div><div class='add'>+	PINCTRL_PIN(36, "PLGPIO36"),	\</div><div class='add'>+	PINCTRL_PIN(37, "PLGPIO37"),	\</div><div class='add'>+	PINCTRL_PIN(38, "PLGPIO38"),	\</div><div class='add'>+	PINCTRL_PIN(39, "PLGPIO39"),	\</div><div class='add'>+	PINCTRL_PIN(40, "PLGPIO40"),	\</div><div class='add'>+	PINCTRL_PIN(41, "PLGPIO41"),	\</div><div class='add'>+	PINCTRL_PIN(42, "PLGPIO42"),	\</div><div class='add'>+	PINCTRL_PIN(43, "PLGPIO43"),	\</div><div class='add'>+	PINCTRL_PIN(44, "PLGPIO44"),	\</div><div class='add'>+	PINCTRL_PIN(45, "PLGPIO45"),	\</div><div class='add'>+	PINCTRL_PIN(46, "PLGPIO46"),	\</div><div class='add'>+	PINCTRL_PIN(47, "PLGPIO47"),	\</div><div class='add'>+	PINCTRL_PIN(48, "PLGPIO48"),	\</div><div class='add'>+	PINCTRL_PIN(49, "PLGPIO49"),	\</div><div class='add'>+	PINCTRL_PIN(50, "PLGPIO50"),	\</div><div class='add'>+	PINCTRL_PIN(51, "PLGPIO51"),	\</div><div class='add'>+	PINCTRL_PIN(52, "PLGPIO52"),	\</div><div class='add'>+	PINCTRL_PIN(53, "PLGPIO53"),	\</div><div class='add'>+	PINCTRL_PIN(54, "PLGPIO54"),	\</div><div class='add'>+	PINCTRL_PIN(55, "PLGPIO55"),	\</div><div class='add'>+	PINCTRL_PIN(56, "PLGPIO56"),	\</div><div class='add'>+	PINCTRL_PIN(57, "PLGPIO57"),	\</div><div class='add'>+	PINCTRL_PIN(58, "PLGPIO58"),	\</div><div class='add'>+	PINCTRL_PIN(59, "PLGPIO59"),	\</div><div class='add'>+	PINCTRL_PIN(60, "PLGPIO60"),	\</div><div class='add'>+	PINCTRL_PIN(61, "PLGPIO61"),	\</div><div class='add'>+	PINCTRL_PIN(62, "PLGPIO62"),	\</div><div class='add'>+	PINCTRL_PIN(63, "PLGPIO63"),	\</div><div class='add'>+	PINCTRL_PIN(64, "PLGPIO64"),	\</div><div class='add'>+	PINCTRL_PIN(65, "PLGPIO65"),	\</div><div class='add'>+	PINCTRL_PIN(66, "PLGPIO66"),	\</div><div class='add'>+	PINCTRL_PIN(67, "PLGPIO67"),	\</div><div class='add'>+	PINCTRL_PIN(68, "PLGPIO68"),	\</div><div class='add'>+	PINCTRL_PIN(69, "PLGPIO69"),	\</div><div class='add'>+	PINCTRL_PIN(70, "PLGPIO70"),	\</div><div class='add'>+	PINCTRL_PIN(71, "PLGPIO71"),	\</div><div class='add'>+	PINCTRL_PIN(72, "PLGPIO72"),	\</div><div class='add'>+	PINCTRL_PIN(73, "PLGPIO73"),	\</div><div class='add'>+	PINCTRL_PIN(74, "PLGPIO74"),	\</div><div class='add'>+	PINCTRL_PIN(75, "PLGPIO75"),	\</div><div class='add'>+	PINCTRL_PIN(76, "PLGPIO76"),	\</div><div class='add'>+	PINCTRL_PIN(77, "PLGPIO77"),	\</div><div class='add'>+	PINCTRL_PIN(78, "PLGPIO78"),	\</div><div class='add'>+	PINCTRL_PIN(79, "PLGPIO79"),	\</div><div class='add'>+	PINCTRL_PIN(80, "PLGPIO80"),	\</div><div class='add'>+	PINCTRL_PIN(81, "PLGPIO81"),	\</div><div class='add'>+	PINCTRL_PIN(82, "PLGPIO82"),	\</div><div class='add'>+	PINCTRL_PIN(83, "PLGPIO83"),	\</div><div class='add'>+	PINCTRL_PIN(84, "PLGPIO84"),	\</div><div class='add'>+	PINCTRL_PIN(85, "PLGPIO85"),	\</div><div class='add'>+	PINCTRL_PIN(86, "PLGPIO86"),	\</div><div class='add'>+	PINCTRL_PIN(87, "PLGPIO87"),	\</div><div class='add'>+	PINCTRL_PIN(88, "PLGPIO88"),	\</div><div class='add'>+	PINCTRL_PIN(89, "PLGPIO89"),	\</div><div class='add'>+	PINCTRL_PIN(90, "PLGPIO90"),	\</div><div class='add'>+	PINCTRL_PIN(91, "PLGPIO91"),	\</div><div class='add'>+	PINCTRL_PIN(92, "PLGPIO92"),	\</div><div class='add'>+	PINCTRL_PIN(93, "PLGPIO93"),	\</div><div class='add'>+	PINCTRL_PIN(94, "PLGPIO94"),	\</div><div class='add'>+	PINCTRL_PIN(95, "PLGPIO95"),	\</div><div class='add'>+	PINCTRL_PIN(96, "PLGPIO96"),	\</div><div class='add'>+	PINCTRL_PIN(97, "PLGPIO97"),	\</div><div class='add'>+	PINCTRL_PIN(98, "PLGPIO98"),	\</div><div class='add'>+	PINCTRL_PIN(99, "PLGPIO99"),	\</div><div class='add'>+	PINCTRL_PIN(100, "PLGPIO100"),	\</div><div class='add'>+	PINCTRL_PIN(101, "PLGPIO101")</div><div class='add'>+</div><div class='add'>+#define SPEAR_PIN_102_TO_245		\</div><div class='add'>+	PINCTRL_PIN(102, "PLGPIO102"),	\</div><div class='add'>+	PINCTRL_PIN(103, "PLGPIO103"),	\</div><div class='add'>+	PINCTRL_PIN(104, "PLGPIO104"),	\</div><div class='add'>+	PINCTRL_PIN(105, "PLGPIO105"),	\</div><div class='add'>+	PINCTRL_PIN(106, "PLGPIO106"),	\</div><div class='add'>+	PINCTRL_PIN(107, "PLGPIO107"),	\</div><div class='add'>+	PINCTRL_PIN(108, "PLGPIO108"),	\</div><div class='add'>+	PINCTRL_PIN(109, "PLGPIO109"),	\</div><div class='add'>+	PINCTRL_PIN(110, "PLGPIO110"),	\</div><div class='add'>+	PINCTRL_PIN(111, "PLGPIO111"),	\</div><div class='add'>+	PINCTRL_PIN(112, "PLGPIO112"),	\</div><div class='add'>+	PINCTRL_PIN(113, "PLGPIO113"),	\</div><div class='add'>+	PINCTRL_PIN(114, "PLGPIO114"),	\</div><div class='add'>+	PINCTRL_PIN(115, "PLGPIO115"),	\</div><div class='add'>+	PINCTRL_PIN(116, "PLGPIO116"),	\</div><div class='add'>+	PINCTRL_PIN(117, "PLGPIO117"),	\</div><div class='add'>+	PINCTRL_PIN(118, "PLGPIO118"),	\</div><div class='add'>+	PINCTRL_PIN(119, "PLGPIO119"),	\</div><div class='add'>+	PINCTRL_PIN(120, "PLGPIO120"),	\</div><div class='add'>+	PINCTRL_PIN(121, "PLGPIO121"),	\</div><div class='add'>+	PINCTRL_PIN(122, "PLGPIO122"),	\</div><div class='add'>+	PINCTRL_PIN(123, "PLGPIO123"),	\</div><div class='add'>+	PINCTRL_PIN(124, "PLGPIO124"),	\</div><div class='add'>+	PINCTRL_PIN(125, "PLGPIO125"),	\</div><div class='add'>+	PINCTRL_PIN(126, "PLGPIO126"),	\</div><div class='add'>+	PINCTRL_PIN(127, "PLGPIO127"),	\</div><div class='add'>+	PINCTRL_PIN(128, "PLGPIO128"),	\</div><div class='add'>+	PINCTRL_PIN(129, "PLGPIO129"),	\</div><div class='add'>+	PINCTRL_PIN(130, "PLGPIO130"),	\</div><div class='add'>+	PINCTRL_PIN(131, "PLGPIO131"),	\</div><div class='add'>+	PINCTRL_PIN(132, "PLGPIO132"),	\</div><div class='add'>+	PINCTRL_PIN(133, "PLGPIO133"),	\</div><div class='add'>+	PINCTRL_PIN(134, "PLGPIO134"),	\</div><div class='add'>+	PINCTRL_PIN(135, "PLGPIO135"),	\</div><div class='add'>+	PINCTRL_PIN(136, "PLGPIO136"),	\</div><div class='add'>+	PINCTRL_PIN(137, "PLGPIO137"),	\</div><div class='add'>+	PINCTRL_PIN(138, "PLGPIO138"),	\</div><div class='add'>+	PINCTRL_PIN(139, "PLGPIO139"),	\</div><div class='add'>+	PINCTRL_PIN(140, "PLGPIO140"),	\</div><div class='add'>+	PINCTRL_PIN(141, "PLGPIO141"),	\</div><div class='add'>+	PINCTRL_PIN(142, "PLGPIO142"),	\</div><div class='add'>+	PINCTRL_PIN(143, "PLGPIO143"),	\</div><div class='add'>+	PINCTRL_PIN(144, "PLGPIO144"),	\</div><div class='add'>+	PINCTRL_PIN(145, "PLGPIO145"),	\</div><div class='add'>+	PINCTRL_PIN(146, "PLGPIO146"),	\</div><div class='add'>+	PINCTRL_PIN(147, "PLGPIO147"),	\</div><div class='add'>+	PINCTRL_PIN(148, "PLGPIO148"),	\</div><div class='add'>+	PINCTRL_PIN(149, "PLGPIO149"),	\</div><div class='add'>+	PINCTRL_PIN(150, "PLGPIO150"),	\</div><div class='add'>+	PINCTRL_PIN(151, "PLGPIO151"),	\</div><div class='add'>+	PINCTRL_PIN(152, "PLGPIO152"),	\</div><div class='add'>+	PINCTRL_PIN(153, "PLGPIO153"),	\</div><div class='add'>+	PINCTRL_PIN(154, "PLGPIO154"),	\</div><div class='add'>+	PINCTRL_PIN(155, "PLGPIO155"),	\</div><div class='add'>+	PINCTRL_PIN(156, "PLGPIO156"),	\</div><div class='add'>+	PINCTRL_PIN(157, "PLGPIO157"),	\</div><div class='add'>+	PINCTRL_PIN(158, "PLGPIO158"),	\</div><div class='add'>+	PINCTRL_PIN(159, "PLGPIO159"),	\</div><div class='add'>+	PINCTRL_PIN(160, "PLGPIO160"),	\</div><div class='add'>+	PINCTRL_PIN(161, "PLGPIO161"),	\</div><div class='add'>+	PINCTRL_PIN(162, "PLGPIO162"),	\</div><div class='add'>+	PINCTRL_PIN(163, "PLGPIO163"),	\</div><div class='add'>+	PINCTRL_PIN(164, "PLGPIO164"),	\</div><div class='add'>+	PINCTRL_PIN(165, "PLGPIO165"),	\</div><div class='add'>+	PINCTRL_PIN(166, "PLGPIO166"),	\</div><div class='add'>+	PINCTRL_PIN(167, "PLGPIO167"),	\</div><div class='add'>+	PINCTRL_PIN(168, "PLGPIO168"),	\</div><div class='add'>+	PINCTRL_PIN(169, "PLGPIO169"),	\</div><div class='add'>+	PINCTRL_PIN(170, "PLGPIO170"),	\</div><div class='add'>+	PINCTRL_PIN(171, "PLGPIO171"),	\</div><div class='add'>+	PINCTRL_PIN(172, "PLGPIO172"),	\</div><div class='add'>+	PINCTRL_PIN(173, "PLGPIO173"),	\</div><div class='add'>+	PINCTRL_PIN(174, "PLGPIO174"),	\</div><div class='add'>+	PINCTRL_PIN(175, "PLGPIO175"),	\</div><div class='add'>+	PINCTRL_PIN(176, "PLGPIO176"),	\</div><div class='add'>+	PINCTRL_PIN(177, "PLGPIO177"),	\</div><div class='add'>+	PINCTRL_PIN(178, "PLGPIO178"),	\</div><div class='add'>+	PINCTRL_PIN(179, "PLGPIO179"),	\</div><div class='add'>+	PINCTRL_PIN(180, "PLGPIO180"),	\</div><div class='add'>+	PINCTRL_PIN(181, "PLGPIO181"),	\</div><div class='add'>+	PINCTRL_PIN(182, "PLGPIO182"),	\</div><div class='add'>+	PINCTRL_PIN(183, "PLGPIO183"),	\</div><div class='add'>+	PINCTRL_PIN(184, "PLGPIO184"),	\</div><div class='add'>+	PINCTRL_PIN(185, "PLGPIO185"),	\</div><div class='add'>+	PINCTRL_PIN(186, "PLGPIO186"),	\</div><div class='add'>+	PINCTRL_PIN(187, "PLGPIO187"),	\</div><div class='add'>+	PINCTRL_PIN(188, "PLGPIO188"),	\</div><div class='add'>+	PINCTRL_PIN(189, "PLGPIO189"),	\</div><div class='add'>+	PINCTRL_PIN(190, "PLGPIO190"),	\</div><div class='add'>+	PINCTRL_PIN(191, "PLGPIO191"),	\</div><div class='add'>+	PINCTRL_PIN(192, "PLGPIO192"),	\</div><div class='add'>+	PINCTRL_PIN(193, "PLGPIO193"),	\</div><div class='add'>+	PINCTRL_PIN(194, "PLGPIO194"),	\</div><div class='add'>+	PINCTRL_PIN(195, "PLGPIO195"),	\</div><div class='add'>+	PINCTRL_PIN(196, "PLGPIO196"),	\</div><div class='add'>+	PINCTRL_PIN(197, "PLGPIO197"),	\</div><div class='add'>+	PINCTRL_PIN(198, "PLGPIO198"),	\</div><div class='add'>+	PINCTRL_PIN(199, "PLGPIO199"),	\</div><div class='add'>+	PINCTRL_PIN(200, "PLGPIO200"),	\</div><div class='add'>+	PINCTRL_PIN(201, "PLGPIO201"),	\</div><div class='add'>+	PINCTRL_PIN(202, "PLGPIO202"),	\</div><div class='add'>+	PINCTRL_PIN(203, "PLGPIO203"),	\</div><div class='add'>+	PINCTRL_PIN(204, "PLGPIO204"),	\</div><div class='add'>+	PINCTRL_PIN(205, "PLGPIO205"),	\</div><div class='add'>+	PINCTRL_PIN(206, "PLGPIO206"),	\</div><div class='add'>+	PINCTRL_PIN(207, "PLGPIO207"),	\</div><div class='add'>+	PINCTRL_PIN(208, "PLGPIO208"),	\</div><div class='add'>+	PINCTRL_PIN(209, "PLGPIO209"),	\</div><div class='add'>+	PINCTRL_PIN(210, "PLGPIO210"),	\</div><div class='add'>+	PINCTRL_PIN(211, "PLGPIO211"),	\</div><div class='add'>+	PINCTRL_PIN(212, "PLGPIO212"),	\</div><div class='add'>+	PINCTRL_PIN(213, "PLGPIO213"),	\</div><div class='add'>+	PINCTRL_PIN(214, "PLGPIO214"),	\</div><div class='add'>+	PINCTRL_PIN(215, "PLGPIO215"),	\</div><div class='add'>+	PINCTRL_PIN(216, "PLGPIO216"),	\</div><div class='add'>+	PINCTRL_PIN(217, "PLGPIO217"),	\</div><div class='add'>+	PINCTRL_PIN(218, "PLGPIO218"),	\</div><div class='add'>+	PINCTRL_PIN(219, "PLGPIO219"),	\</div><div class='add'>+	PINCTRL_PIN(220, "PLGPIO220"),	\</div><div class='add'>+	PINCTRL_PIN(221, "PLGPIO221"),	\</div><div class='add'>+	PINCTRL_PIN(222, "PLGPIO222"),	\</div><div class='add'>+	PINCTRL_PIN(223, "PLGPIO223"),	\</div><div class='add'>+	PINCTRL_PIN(224, "PLGPIO224"),	\</div><div class='add'>+	PINCTRL_PIN(225, "PLGPIO225"),	\</div><div class='add'>+	PINCTRL_PIN(226, "PLGPIO226"),	\</div><div class='add'>+	PINCTRL_PIN(227, "PLGPIO227"),	\</div><div class='add'>+	PINCTRL_PIN(228, "PLGPIO228"),	\</div><div class='add'>+	PINCTRL_PIN(229, "PLGPIO229"),	\</div><div class='add'>+	PINCTRL_PIN(230, "PLGPIO230"),	\</div><div class='add'>+	PINCTRL_PIN(231, "PLGPIO231"),	\</div><div class='add'>+	PINCTRL_PIN(232, "PLGPIO232"),	\</div><div class='add'>+	PINCTRL_PIN(233, "PLGPIO233"),	\</div><div class='add'>+	PINCTRL_PIN(234, "PLGPIO234"),	\</div><div class='add'>+	PINCTRL_PIN(235, "PLGPIO235"),	\</div><div class='add'>+	PINCTRL_PIN(236, "PLGPIO236"),	\</div><div class='add'>+	PINCTRL_PIN(237, "PLGPIO237"),	\</div><div class='add'>+	PINCTRL_PIN(238, "PLGPIO238"),	\</div><div class='add'>+	PINCTRL_PIN(239, "PLGPIO239"),	\</div><div class='add'>+	PINCTRL_PIN(240, "PLGPIO240"),	\</div><div class='add'>+	PINCTRL_PIN(241, "PLGPIO241"),	\</div><div class='add'>+	PINCTRL_PIN(242, "PLGPIO242"),	\</div><div class='add'>+	PINCTRL_PIN(243, "PLGPIO243"),	\</div><div class='add'>+	PINCTRL_PIN(244, "PLGPIO244"),	\</div><div class='add'>+	PINCTRL_PIN(245, "PLGPIO245")</div><div class='add'>+</div><div class='add'>+#endif /* __PINMUX_SPEAR_H__ */</div><div class='head'>diff --git a/drivers/pinctrl/spear/pinctrl-spear1310.c b/drivers/pinctrl/spear/pinctrl-spear1310.c<br/>new file mode 100644<br/>index 000000000000..fff168be7f00<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/spear/pinctrl-spear1310.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear1310.c</a></div><div class='hunk'>@@ -0,0 +1,2198 @@</div><div class='add'>+/*</div><div class='add'>+ * Driver for the ST Microelectronics SPEAr1310 pinmux</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include "pinctrl-spear.h"</div><div class='add'>+</div><div class='add'>+#define DRIVER_NAME "spear1310-pinmux"</div><div class='add'>+</div><div class='add'>+/* pins */</div><div class='add'>+static const struct pinctrl_pin_desc spear1310_pins[] = {</div><div class='add'>+	SPEAR_PIN_0_TO_101,</div><div class='add'>+	SPEAR_PIN_102_TO_245,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* registers */</div><div class='add'>+#define PERIP_CFG					0x32C</div><div class='add'>+	#define MCIF_SEL_SHIFT				3</div><div class='add'>+	#define MCIF_SEL_SD				(0x1 &lt;&lt; MCIF_SEL_SHIFT)</div><div class='add'>+	#define MCIF_SEL_CF				(0x2 &lt;&lt; MCIF_SEL_SHIFT)</div><div class='add'>+	#define MCIF_SEL_XD				(0x3 &lt;&lt; MCIF_SEL_SHIFT)</div><div class='add'>+	#define MCIF_SEL_MASK				(0x3 &lt;&lt; MCIF_SEL_SHIFT)</div><div class='add'>+</div><div class='add'>+#define PCIE_SATA_CFG					0x3A4</div><div class='add'>+	#define PCIE_SATA2_SEL_PCIE			(0 &lt;&lt; 31)</div><div class='add'>+	#define PCIE_SATA1_SEL_PCIE			(0 &lt;&lt; 30)</div><div class='add'>+	#define PCIE_SATA0_SEL_PCIE			(0 &lt;&lt; 29)</div><div class='add'>+	#define PCIE_SATA2_SEL_SATA			(1 &lt;&lt; 31)</div><div class='add'>+	#define PCIE_SATA1_SEL_SATA			(1 &lt;&lt; 30)</div><div class='add'>+	#define PCIE_SATA0_SEL_SATA			(1 &lt;&lt; 29)</div><div class='add'>+	#define SATA2_CFG_TX_CLK_EN			(1 &lt;&lt; 27)</div><div class='add'>+	#define SATA2_CFG_RX_CLK_EN			(1 &lt;&lt; 26)</div><div class='add'>+	#define SATA2_CFG_POWERUP_RESET			(1 &lt;&lt; 25)</div><div class='add'>+	#define SATA2_CFG_PM_CLK_EN			(1 &lt;&lt; 24)</div><div class='add'>+	#define SATA1_CFG_TX_CLK_EN			(1 &lt;&lt; 23)</div><div class='add'>+	#define SATA1_CFG_RX_CLK_EN			(1 &lt;&lt; 22)</div><div class='add'>+	#define SATA1_CFG_POWERUP_RESET			(1 &lt;&lt; 21)</div><div class='add'>+	#define SATA1_CFG_PM_CLK_EN			(1 &lt;&lt; 20)</div><div class='add'>+	#define SATA0_CFG_TX_CLK_EN			(1 &lt;&lt; 19)</div><div class='add'>+	#define SATA0_CFG_RX_CLK_EN			(1 &lt;&lt; 18)</div><div class='add'>+	#define SATA0_CFG_POWERUP_RESET			(1 &lt;&lt; 17)</div><div class='add'>+	#define SATA0_CFG_PM_CLK_EN			(1 &lt;&lt; 16)</div><div class='add'>+	#define PCIE2_CFG_DEVICE_PRESENT		(1 &lt;&lt; 11)</div><div class='add'>+	#define PCIE2_CFG_POWERUP_RESET			(1 &lt;&lt; 10)</div><div class='add'>+	#define PCIE2_CFG_CORE_CLK_EN			(1 &lt;&lt; 9)</div><div class='add'>+	#define PCIE2_CFG_AUX_CLK_EN			(1 &lt;&lt; 8)</div><div class='add'>+	#define PCIE1_CFG_DEVICE_PRESENT		(1 &lt;&lt; 7)</div><div class='add'>+	#define PCIE1_CFG_POWERUP_RESET			(1 &lt;&lt; 6)</div><div class='add'>+	#define PCIE1_CFG_CORE_CLK_EN			(1 &lt;&lt; 5)</div><div class='add'>+	#define PCIE1_CFG_AUX_CLK_EN			(1 &lt;&lt; 4)</div><div class='add'>+	#define PCIE0_CFG_DEVICE_PRESENT		(1 &lt;&lt; 3)</div><div class='add'>+	#define PCIE0_CFG_POWERUP_RESET			(1 &lt;&lt; 2)</div><div class='add'>+	#define PCIE0_CFG_CORE_CLK_EN			(1 &lt;&lt; 1)</div><div class='add'>+	#define PCIE0_CFG_AUX_CLK_EN			(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+#define PAD_FUNCTION_EN_0				0x650</div><div class='add'>+	#define PMX_UART0_MASK				(1 &lt;&lt; 1)</div><div class='add'>+	#define PMX_I2C0_MASK				(1 &lt;&lt; 2)</div><div class='add'>+	#define PMX_I2S0_MASK				(1 &lt;&lt; 3)</div><div class='add'>+	#define PMX_SSP0_MASK				(1 &lt;&lt; 4)</div><div class='add'>+	#define PMX_CLCD1_MASK				(1 &lt;&lt; 5)</div><div class='add'>+	#define PMX_EGPIO00_MASK			(1 &lt;&lt; 6)</div><div class='add'>+	#define PMX_EGPIO01_MASK			(1 &lt;&lt; 7)</div><div class='add'>+	#define PMX_EGPIO02_MASK			(1 &lt;&lt; 8)</div><div class='add'>+	#define PMX_EGPIO03_MASK			(1 &lt;&lt; 9)</div><div class='add'>+	#define PMX_EGPIO04_MASK			(1 &lt;&lt; 10)</div><div class='add'>+	#define PMX_EGPIO05_MASK			(1 &lt;&lt; 11)</div><div class='add'>+	#define PMX_EGPIO06_MASK			(1 &lt;&lt; 12)</div><div class='add'>+	#define PMX_EGPIO07_MASK			(1 &lt;&lt; 13)</div><div class='add'>+	#define PMX_EGPIO08_MASK			(1 &lt;&lt; 14)</div><div class='add'>+	#define PMX_EGPIO09_MASK			(1 &lt;&lt; 15)</div><div class='add'>+	#define PMX_SMI_MASK				(1 &lt;&lt; 16)</div><div class='add'>+	#define PMX_NAND8_MASK				(1 &lt;&lt; 17)</div><div class='add'>+	#define PMX_GMIICLK_MASK			(1 &lt;&lt; 18)</div><div class='add'>+	#define PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK	(1 &lt;&lt; 19)</div><div class='add'>+	#define PMX_RXCLK_RDV_TXEN_D03_MASK		(1 &lt;&lt; 20)</div><div class='add'>+	#define PMX_GMIID47_MASK			(1 &lt;&lt; 21)</div><div class='add'>+	#define PMX_MDC_MDIO_MASK			(1 &lt;&lt; 22)</div><div class='add'>+	#define PMX_MCI_DATA8_15_MASK			(1 &lt;&lt; 23)</div><div class='add'>+	#define PMX_NFAD23_MASK				(1 &lt;&lt; 24)</div><div class='add'>+	#define PMX_NFAD24_MASK				(1 &lt;&lt; 25)</div><div class='add'>+	#define PMX_NFAD25_MASK				(1 &lt;&lt; 26)</div><div class='add'>+	#define PMX_NFCE3_MASK				(1 &lt;&lt; 27)</div><div class='add'>+	#define PMX_NFWPRT3_MASK			(1 &lt;&lt; 28)</div><div class='add'>+	#define PMX_NFRSTPWDWN0_MASK			(1 &lt;&lt; 29)</div><div class='add'>+	#define PMX_NFRSTPWDWN1_MASK			(1 &lt;&lt; 30)</div><div class='add'>+	#define PMX_NFRSTPWDWN2_MASK			(1 &lt;&lt; 31)</div><div class='add'>+</div><div class='add'>+#define PAD_FUNCTION_EN_1				0x654</div><div class='add'>+	#define PMX_NFRSTPWDWN3_MASK			(1 &lt;&lt; 0)</div><div class='add'>+	#define PMX_SMINCS2_MASK			(1 &lt;&lt; 1)</div><div class='add'>+	#define PMX_SMINCS3_MASK			(1 &lt;&lt; 2)</div><div class='add'>+	#define PMX_CLCD2_MASK				(1 &lt;&lt; 3)</div><div class='add'>+	#define PMX_KBD_ROWCOL68_MASK			(1 &lt;&lt; 4)</div><div class='add'>+	#define PMX_EGPIO10_MASK			(1 &lt;&lt; 5)</div><div class='add'>+	#define PMX_EGPIO11_MASK			(1 &lt;&lt; 6)</div><div class='add'>+	#define PMX_EGPIO12_MASK			(1 &lt;&lt; 7)</div><div class='add'>+	#define PMX_EGPIO13_MASK			(1 &lt;&lt; 8)</div><div class='add'>+	#define PMX_EGPIO14_MASK			(1 &lt;&lt; 9)</div><div class='add'>+	#define PMX_EGPIO15_MASK			(1 &lt;&lt; 10)</div><div class='add'>+	#define PMX_UART0_MODEM_MASK			(1 &lt;&lt; 11)</div><div class='add'>+	#define PMX_GPT0_TMR0_MASK			(1 &lt;&lt; 12)</div><div class='add'>+	#define PMX_GPT0_TMR1_MASK			(1 &lt;&lt; 13)</div><div class='add'>+	#define PMX_GPT1_TMR0_MASK			(1 &lt;&lt; 14)</div><div class='add'>+	#define PMX_GPT1_TMR1_MASK			(1 &lt;&lt; 15)</div><div class='add'>+	#define PMX_I2S1_MASK				(1 &lt;&lt; 16)</div><div class='add'>+	#define PMX_KBD_ROWCOL25_MASK			(1 &lt;&lt; 17)</div><div class='add'>+	#define PMX_NFIO8_15_MASK			(1 &lt;&lt; 18)</div><div class='add'>+	#define PMX_KBD_COL1_MASK			(1 &lt;&lt; 19)</div><div class='add'>+	#define PMX_NFCE1_MASK				(1 &lt;&lt; 20)</div><div class='add'>+	#define PMX_KBD_COL0_MASK			(1 &lt;&lt; 21)</div><div class='add'>+	#define PMX_NFCE2_MASK				(1 &lt;&lt; 22)</div><div class='add'>+	#define PMX_KBD_ROW1_MASK			(1 &lt;&lt; 23)</div><div class='add'>+	#define PMX_NFWPRT1_MASK			(1 &lt;&lt; 24)</div><div class='add'>+	#define PMX_KBD_ROW0_MASK			(1 &lt;&lt; 25)</div><div class='add'>+	#define PMX_NFWPRT2_MASK			(1 &lt;&lt; 26)</div><div class='add'>+	#define PMX_MCIDATA0_MASK			(1 &lt;&lt; 27)</div><div class='add'>+	#define PMX_MCIDATA1_MASK			(1 &lt;&lt; 28)</div><div class='add'>+	#define PMX_MCIDATA2_MASK			(1 &lt;&lt; 29)</div><div class='add'>+	#define PMX_MCIDATA3_MASK			(1 &lt;&lt; 30)</div><div class='add'>+	#define PMX_MCIDATA4_MASK			(1 &lt;&lt; 31)</div><div class='add'>+</div><div class='add'>+#define PAD_FUNCTION_EN_2				0x658</div><div class='add'>+	#define PMX_MCIDATA5_MASK			(1 &lt;&lt; 0)</div><div class='add'>+	#define PMX_MCIDATA6_MASK			(1 &lt;&lt; 1)</div><div class='add'>+	#define PMX_MCIDATA7_MASK			(1 &lt;&lt; 2)</div><div class='add'>+	#define PMX_MCIDATA1SD_MASK			(1 &lt;&lt; 3)</div><div class='add'>+	#define PMX_MCIDATA2SD_MASK			(1 &lt;&lt; 4)</div><div class='add'>+	#define PMX_MCIDATA3SD_MASK			(1 &lt;&lt; 5)</div><div class='add'>+	#define PMX_MCIADDR0ALE_MASK			(1 &lt;&lt; 6)</div><div class='add'>+	#define PMX_MCIADDR1CLECLK_MASK			(1 &lt;&lt; 7)</div><div class='add'>+	#define PMX_MCIADDR2_MASK			(1 &lt;&lt; 8)</div><div class='add'>+	#define PMX_MCICECF_MASK			(1 &lt;&lt; 9)</div><div class='add'>+	#define PMX_MCICEXD_MASK			(1 &lt;&lt; 10)</div><div class='add'>+	#define PMX_MCICESDMMC_MASK			(1 &lt;&lt; 11)</div><div class='add'>+	#define PMX_MCICDCF1_MASK			(1 &lt;&lt; 12)</div><div class='add'>+	#define PMX_MCICDCF2_MASK			(1 &lt;&lt; 13)</div><div class='add'>+	#define PMX_MCICDXD_MASK			(1 &lt;&lt; 14)</div><div class='add'>+	#define PMX_MCICDSDMMC_MASK			(1 &lt;&lt; 15)</div><div class='add'>+	#define PMX_MCIDATADIR_MASK			(1 &lt;&lt; 16)</div><div class='add'>+	#define PMX_MCIDMARQWP_MASK			(1 &lt;&lt; 17)</div><div class='add'>+	#define PMX_MCIIORDRE_MASK			(1 &lt;&lt; 18)</div><div class='add'>+	#define PMX_MCIIOWRWE_MASK			(1 &lt;&lt; 19)</div><div class='add'>+	#define PMX_MCIRESETCF_MASK			(1 &lt;&lt; 20)</div><div class='add'>+	#define PMX_MCICS0CE_MASK			(1 &lt;&lt; 21)</div><div class='add'>+	#define PMX_MCICFINTR_MASK			(1 &lt;&lt; 22)</div><div class='add'>+	#define PMX_MCIIORDY_MASK			(1 &lt;&lt; 23)</div><div class='add'>+	#define PMX_MCICS1_MASK				(1 &lt;&lt; 24)</div><div class='add'>+	#define PMX_MCIDMAACK_MASK			(1 &lt;&lt; 25)</div><div class='add'>+	#define PMX_MCISDCMD_MASK			(1 &lt;&lt; 26)</div><div class='add'>+	#define PMX_MCILEDS_MASK			(1 &lt;&lt; 27)</div><div class='add'>+	#define PMX_TOUCH_XY_MASK			(1 &lt;&lt; 28)</div><div class='add'>+	#define PMX_SSP0_CS0_MASK			(1 &lt;&lt; 29)</div><div class='add'>+	#define PMX_SSP0_CS1_2_MASK			(1 &lt;&lt; 30)</div><div class='add'>+</div><div class='add'>+/* combined macros */</div><div class='add'>+#define PMX_GMII_MASK		(PMX_GMIICLK_MASK |			\</div><div class='add'>+				PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK |	\</div><div class='add'>+				PMX_RXCLK_RDV_TXEN_D03_MASK |		\</div><div class='add'>+				PMX_GMIID47_MASK | PMX_MDC_MDIO_MASK)</div><div class='add'>+</div><div class='add'>+#define PMX_EGPIO_0_GRP_MASK	(PMX_EGPIO00_MASK | PMX_EGPIO01_MASK |	\</div><div class='add'>+				PMX_EGPIO02_MASK |			\</div><div class='add'>+				PMX_EGPIO03_MASK | PMX_EGPIO04_MASK |	\</div><div class='add'>+				PMX_EGPIO05_MASK | PMX_EGPIO06_MASK |	\</div><div class='add'>+				PMX_EGPIO07_MASK | PMX_EGPIO08_MASK |	\</div><div class='add'>+				PMX_EGPIO09_MASK)</div><div class='add'>+#define PMX_EGPIO_1_GRP_MASK	(PMX_EGPIO10_MASK | PMX_EGPIO11_MASK |	\</div><div class='add'>+				PMX_EGPIO12_MASK | PMX_EGPIO13_MASK |	\</div><div class='add'>+				PMX_EGPIO14_MASK | PMX_EGPIO15_MASK)</div><div class='add'>+</div><div class='add'>+#define PMX_KEYBOARD_6X6_MASK	(PMX_KBD_ROW0_MASK | PMX_KBD_ROW1_MASK | \</div><div class='add'>+				PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL0_MASK | \</div><div class='add'>+				PMX_KBD_COL1_MASK)</div><div class='add'>+</div><div class='add'>+#define PMX_NAND8BIT_0_MASK	(PMX_NAND8_MASK | PMX_NFAD23_MASK |	\</div><div class='add'>+				PMX_NFAD24_MASK | PMX_NFAD25_MASK |	\</div><div class='add'>+				PMX_NFWPRT3_MASK | PMX_NFRSTPWDWN0_MASK | \</div><div class='add'>+				PMX_NFRSTPWDWN1_MASK | PMX_NFRSTPWDWN2_MASK | \</div><div class='add'>+				PMX_NFCE3_MASK)</div><div class='add'>+#define PMX_NAND8BIT_1_MASK	PMX_NFRSTPWDWN3_MASK</div><div class='add'>+</div><div class='add'>+#define PMX_NAND16BIT_1_MASK	(PMX_KBD_ROWCOL25_MASK | PMX_NFIO8_15_MASK)</div><div class='add'>+#define PMX_NAND_4CHIPS_MASK	(PMX_NFCE1_MASK | PMX_NFCE2_MASK |	\</div><div class='add'>+				PMX_NFWPRT1_MASK | PMX_NFWPRT2_MASK |	\</div><div class='add'>+				PMX_KBD_ROW0_MASK | PMX_KBD_ROW1_MASK |	\</div><div class='add'>+				PMX_KBD_COL0_MASK | PMX_KBD_COL1_MASK)</div><div class='add'>+</div><div class='add'>+#define PMX_MCIFALL_1_MASK	0xF8000000</div><div class='add'>+#define PMX_MCIFALL_2_MASK	0x0FFFFFFF</div><div class='add'>+</div><div class='add'>+#define PMX_PCI_REG1_MASK	(PMX_SMINCS2_MASK | PMX_SMINCS3_MASK |	\</div><div class='add'>+				PMX_CLCD2_MASK | PMX_KBD_ROWCOL68_MASK | \</div><div class='add'>+				PMX_EGPIO_1_GRP_MASK | PMX_GPT0_TMR0_MASK | \</div><div class='add'>+				PMX_GPT0_TMR1_MASK | PMX_GPT1_TMR0_MASK | \</div><div class='add'>+				PMX_GPT1_TMR1_MASK | PMX_I2S1_MASK |	\</div><div class='add'>+				PMX_NFCE2_MASK)</div><div class='add'>+#define PMX_PCI_REG2_MASK	(PMX_TOUCH_XY_MASK | PMX_SSP0_CS0_MASK | \</div><div class='add'>+				PMX_SSP0_CS1_2_MASK)</div><div class='add'>+</div><div class='add'>+#define PMX_SMII_0_1_2_MASK	(PMX_CLCD2_MASK | PMX_KBD_ROWCOL68_MASK)</div><div class='add'>+#define PMX_RGMII_REG0_MASK	(PMX_MCI_DATA8_15_MASK |		\</div><div class='add'>+				PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK |	\</div><div class='add'>+				PMX_GMIID47_MASK)</div><div class='add'>+#define PMX_RGMII_REG1_MASK	(PMX_KBD_ROWCOL68_MASK | PMX_EGPIO_1_GRP_MASK |\</div><div class='add'>+				PMX_KBD_ROW1_MASK | PMX_NFWPRT1_MASK |	\</div><div class='add'>+				PMX_KBD_ROW0_MASK | PMX_NFWPRT2_MASK)</div><div class='add'>+#define PMX_RGMII_REG2_MASK	(PMX_TOUCH_XY_MASK | PMX_SSP0_CS0_MASK | \</div><div class='add'>+				PMX_SSP0_CS1_2_MASK)</div><div class='add'>+</div><div class='add'>+#define PCIE_CFG_VAL(x)		(PCIE_SATA##x##_SEL_PCIE |	\</div><div class='add'>+				PCIE##x##_CFG_AUX_CLK_EN |	\</div><div class='add'>+				PCIE##x##_CFG_CORE_CLK_EN |	\</div><div class='add'>+				PCIE##x##_CFG_POWERUP_RESET |	\</div><div class='add'>+				PCIE##x##_CFG_DEVICE_PRESENT)</div><div class='add'>+#define SATA_CFG_VAL(x)		(PCIE_SATA##x##_SEL_SATA |	\</div><div class='add'>+				SATA##x##_CFG_PM_CLK_EN |	\</div><div class='add'>+				SATA##x##_CFG_POWERUP_RESET |	\</div><div class='add'>+				SATA##x##_CFG_RX_CLK_EN |	\</div><div class='add'>+				SATA##x##_CFG_TX_CLK_EN)</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2c0 device */</div><div class='add'>+static const unsigned i2c0_pins[] = { 102, 103 };</div><div class='add'>+static struct spear_muxreg i2c0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_I2C0_MASK,</div><div class='add'>+		.val = PMX_I2C0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2c0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c0_pingroup = {</div><div class='add'>+	.name = "i2c0_grp",</div><div class='add'>+	.pins = i2c0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c0_pins),</div><div class='add'>+	.modemuxs = i2c0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2c0_grps[] = { "i2c0_grp" };</div><div class='add'>+static struct spear_function i2c0_function = {</div><div class='add'>+	.name = "i2c0",</div><div class='add'>+	.groups = i2c0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2c0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for ssp0 device */</div><div class='add'>+static const unsigned ssp0_pins[] = { 109, 110, 111, 112 };</div><div class='add'>+static struct spear_muxreg ssp0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_SSP0_MASK,</div><div class='add'>+		.val = PMX_SSP0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = ssp0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup ssp0_pingroup = {</div><div class='add'>+	.name = "ssp0_grp",</div><div class='add'>+	.pins = ssp0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(ssp0_pins),</div><div class='add'>+	.modemuxs = ssp0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(ssp0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for ssp0_cs0 device */</div><div class='add'>+static const unsigned ssp0_cs0_pins[] = { 96 };</div><div class='add'>+static struct spear_muxreg ssp0_cs0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PMX_SSP0_CS0_MASK,</div><div class='add'>+		.val = PMX_SSP0_CS0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp0_cs0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = ssp0_cs0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp0_cs0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup ssp0_cs0_pingroup = {</div><div class='add'>+	.name = "ssp0_cs0_grp",</div><div class='add'>+	.pins = ssp0_cs0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(ssp0_cs0_pins),</div><div class='add'>+	.modemuxs = ssp0_cs0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(ssp0_cs0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ssp0_cs1_2 device */</div><div class='add'>+static const unsigned ssp0_cs1_2_pins[] = { 94, 95 };</div><div class='add'>+static struct spear_muxreg ssp0_cs1_2_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PMX_SSP0_CS1_2_MASK,</div><div class='add'>+		.val = PMX_SSP0_CS1_2_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp0_cs1_2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = ssp0_cs1_2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp0_cs1_2_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup ssp0_cs1_2_pingroup = {</div><div class='add'>+	.name = "ssp0_cs1_2_grp",</div><div class='add'>+	.pins = ssp0_cs1_2_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(ssp0_cs1_2_pins),</div><div class='add'>+	.modemuxs = ssp0_cs1_2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(ssp0_cs1_2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const ssp0_grps[] = { "ssp0_grp", "ssp0_cs0_grp",</div><div class='add'>+	"ssp0_cs1_2_grp" };</div><div class='add'>+static struct spear_function ssp0_function = {</div><div class='add'>+	.name = "ssp0",</div><div class='add'>+	.groups = ssp0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(ssp0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2s0 device */</div><div class='add'>+static const unsigned i2s0_pins[] = { 104, 105, 106, 107, 108 };</div><div class='add'>+static struct spear_muxreg i2s0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_I2S0_MASK,</div><div class='add'>+		.val = PMX_I2S0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2s0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2s0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2s0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2s0_pingroup = {</div><div class='add'>+	.name = "i2s0_grp",</div><div class='add'>+	.pins = i2s0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2s0_pins),</div><div class='add'>+	.modemuxs = i2s0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2s0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2s0_grps[] = { "i2s0_grp" };</div><div class='add'>+static struct spear_function i2s0_function = {</div><div class='add'>+	.name = "i2s0",</div><div class='add'>+	.groups = i2s0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2s0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2s1 device */</div><div class='add'>+static const unsigned i2s1_pins[] = { 0, 1, 2, 3 };</div><div class='add'>+static struct spear_muxreg i2s1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_I2S1_MASK,</div><div class='add'>+		.val = PMX_I2S1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2s1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2s1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2s1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2s1_pingroup = {</div><div class='add'>+	.name = "i2s1_grp",</div><div class='add'>+	.pins = i2s1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2s1_pins),</div><div class='add'>+	.modemuxs = i2s1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2s1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2s1_grps[] = { "i2s1_grp" };</div><div class='add'>+static struct spear_function i2s1_function = {</div><div class='add'>+	.name = "i2s1",</div><div class='add'>+	.groups = i2s1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2s1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for clcd device */</div><div class='add'>+static const unsigned clcd_pins[] = { 113, 114, 115, 116, 117, 118, 119, 120,</div><div class='add'>+	121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134,</div><div class='add'>+	135, 136, 137, 138, 139, 140, 141, 142 };</div><div class='add'>+static struct spear_muxreg clcd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_CLCD1_MASK,</div><div class='add'>+		.val = PMX_CLCD1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux clcd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = clcd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(clcd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup clcd_pingroup = {</div><div class='add'>+	.name = "clcd_grp",</div><div class='add'>+	.pins = clcd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(clcd_pins),</div><div class='add'>+	.modemuxs = clcd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(clcd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned clcd_high_res_pins[] = { 30, 31, 32, 33, 34, 35, 36, 37,</div><div class='add'>+	38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53 };</div><div class='add'>+static struct spear_muxreg clcd_high_res_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_CLCD2_MASK,</div><div class='add'>+		.val = PMX_CLCD2_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux clcd_high_res_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = clcd_high_res_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(clcd_high_res_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup clcd_high_res_pingroup = {</div><div class='add'>+	.name = "clcd_high_res_grp",</div><div class='add'>+	.pins = clcd_high_res_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(clcd_high_res_pins),</div><div class='add'>+	.modemuxs = clcd_high_res_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(clcd_high_res_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res" };</div><div class='add'>+static struct spear_function clcd_function = {</div><div class='add'>+	.name = "clcd",</div><div class='add'>+	.groups = clcd_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(clcd_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned arm_gpio_pins[] = { 18, 19, 20, 21, 22, 23, 143, 144, 145,</div><div class='add'>+	146, 147, 148, 149, 150, 151, 152 };</div><div class='add'>+static struct spear_muxreg arm_gpio_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_EGPIO_0_GRP_MASK,</div><div class='add'>+		.val = PMX_EGPIO_0_GRP_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_EGPIO_1_GRP_MASK,</div><div class='add'>+		.val = PMX_EGPIO_1_GRP_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux arm_gpio_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = arm_gpio_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(arm_gpio_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup arm_gpio_pingroup = {</div><div class='add'>+	.name = "arm_gpio_grp",</div><div class='add'>+	.pins = arm_gpio_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(arm_gpio_pins),</div><div class='add'>+	.modemuxs = arm_gpio_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(arm_gpio_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const arm_gpio_grps[] = { "arm_gpio_grp" };</div><div class='add'>+static struct spear_function arm_gpio_function = {</div><div class='add'>+	.name = "arm_gpio",</div><div class='add'>+	.groups = arm_gpio_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(arm_gpio_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for smi 2 chips device */</div><div class='add'>+static const unsigned smi_2_chips_pins[] = { 153, 154, 155, 156, 157 };</div><div class='add'>+static struct spear_muxreg smi_2_chips_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_SMI_MASK,</div><div class='add'>+		.val = PMX_SMI_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux smi_2_chips_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = smi_2_chips_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(smi_2_chips_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup smi_2_chips_pingroup = {</div><div class='add'>+	.name = "smi_2_chips_grp",</div><div class='add'>+	.pins = smi_2_chips_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(smi_2_chips_pins),</div><div class='add'>+	.modemuxs = smi_2_chips_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(smi_2_chips_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned smi_4_chips_pins[] = { 54, 55 };</div><div class='add'>+static struct spear_muxreg smi_4_chips_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_SMI_MASK,</div><div class='add'>+		.val = PMX_SMI_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK,</div><div class='add'>+		.val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux smi_4_chips_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = smi_4_chips_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(smi_4_chips_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup smi_4_chips_pingroup = {</div><div class='add'>+	.name = "smi_4_chips_grp",</div><div class='add'>+	.pins = smi_4_chips_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(smi_4_chips_pins),</div><div class='add'>+	.modemuxs = smi_4_chips_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(smi_4_chips_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const smi_grps[] = { "smi_2_chips_grp", "smi_4_chips_grp" };</div><div class='add'>+static struct spear_function smi_function = {</div><div class='add'>+	.name = "smi",</div><div class='add'>+	.groups = smi_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(smi_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for gmii device */</div><div class='add'>+static const unsigned gmii_pins[] = { 173, 174, 175, 176, 177, 178, 179, 180,</div><div class='add'>+	181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194,</div><div class='add'>+	195, 196, 197, 198, 199, 200 };</div><div class='add'>+static struct spear_muxreg gmii_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_GMII_MASK,</div><div class='add'>+		.val = PMX_GMII_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gmii_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = gmii_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gmii_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup gmii_pingroup = {</div><div class='add'>+	.name = "gmii_grp",</div><div class='add'>+	.pins = gmii_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gmii_pins),</div><div class='add'>+	.modemuxs = gmii_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gmii_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const gmii_grps[] = { "gmii_grp" };</div><div class='add'>+static struct spear_function gmii_function = {</div><div class='add'>+	.name = "gmii",</div><div class='add'>+	.groups = gmii_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(gmii_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for rgmii device */</div><div class='add'>+static const unsigned rgmii_pins[] = { 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,</div><div class='add'>+	28, 29, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 175,</div><div class='add'>+	180, 181, 182, 183, 185, 188, 193, 194, 195, 196, 197, 198, 211, 212 };</div><div class='add'>+static struct spear_muxreg rgmii_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_RGMII_REG0_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_RGMII_REG1_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PMX_RGMII_REG2_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux rgmii_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = rgmii_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(rgmii_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup rgmii_pingroup = {</div><div class='add'>+	.name = "rgmii_grp",</div><div class='add'>+	.pins = rgmii_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(rgmii_pins),</div><div class='add'>+	.modemuxs = rgmii_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(rgmii_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const rgmii_grps[] = { "rgmii_grp" };</div><div class='add'>+static struct spear_function rgmii_function = {</div><div class='add'>+	.name = "rgmii",</div><div class='add'>+	.groups = rgmii_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(rgmii_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for smii_0_1_2 device */</div><div class='add'>+static const unsigned smii_0_1_2_pins[] = { 24, 25, 26, 27, 28, 29, 30, 31, 32,</div><div class='add'>+	33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50,</div><div class='add'>+	51, 52, 53, 54, 55 };</div><div class='add'>+static struct spear_muxreg smii_0_1_2_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_SMII_0_1_2_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux smii_0_1_2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = smii_0_1_2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(smii_0_1_2_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup smii_0_1_2_pingroup = {</div><div class='add'>+	.name = "smii_0_1_2_grp",</div><div class='add'>+	.pins = smii_0_1_2_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(smii_0_1_2_pins),</div><div class='add'>+	.modemuxs = smii_0_1_2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(smii_0_1_2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const smii_0_1_2_grps[] = { "smii_0_1_2_grp" };</div><div class='add'>+static struct spear_function smii_0_1_2_function = {</div><div class='add'>+	.name = "smii_0_1_2",</div><div class='add'>+	.groups = smii_0_1_2_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(smii_0_1_2_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for ras_mii_txclk device */</div><div class='add'>+static const unsigned ras_mii_txclk_pins[] = { 98, 99 };</div><div class='add'>+static struct spear_muxreg ras_mii_txclk_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_NFCE2_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ras_mii_txclk_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = ras_mii_txclk_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ras_mii_txclk_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup ras_mii_txclk_pingroup = {</div><div class='add'>+	.name = "ras_mii_txclk_grp",</div><div class='add'>+	.pins = ras_mii_txclk_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(ras_mii_txclk_pins),</div><div class='add'>+	.modemuxs = ras_mii_txclk_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(ras_mii_txclk_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const ras_mii_txclk_grps[] = { "ras_mii_txclk_grp" };</div><div class='add'>+static struct spear_function ras_mii_txclk_function = {</div><div class='add'>+	.name = "ras_mii_txclk",</div><div class='add'>+	.groups = ras_mii_txclk_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(ras_mii_txclk_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for nand 8bit device (cs0 only) */</div><div class='add'>+static const unsigned nand_8bit_pins[] = { 56, 57, 58, 59, 60, 61, 62, 63, 64,</div><div class='add'>+	65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82,</div><div class='add'>+	83, 84, 85, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 168, 169,</div><div class='add'>+	170, 171, 172, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211,</div><div class='add'>+	212 };</div><div class='add'>+static struct spear_muxreg nand_8bit_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_NAND8BIT_0_MASK,</div><div class='add'>+		.val = PMX_NAND8BIT_0_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_NAND8BIT_1_MASK,</div><div class='add'>+		.val = PMX_NAND8BIT_1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux nand_8bit_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = nand_8bit_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(nand_8bit_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup nand_8bit_pingroup = {</div><div class='add'>+	.name = "nand_8bit_grp",</div><div class='add'>+	.pins = nand_8bit_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(nand_8bit_pins),</div><div class='add'>+	.modemuxs = nand_8bit_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(nand_8bit_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for nand 16bit device */</div><div class='add'>+static const unsigned nand_16bit_pins[] = { 201, 202, 203, 204, 207, 208, 209,</div><div class='add'>+	210 };</div><div class='add'>+static struct spear_muxreg nand_16bit_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_NAND16BIT_1_MASK,</div><div class='add'>+		.val = PMX_NAND16BIT_1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux nand_16bit_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = nand_16bit_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(nand_16bit_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup nand_16bit_pingroup = {</div><div class='add'>+	.name = "nand_16bit_grp",</div><div class='add'>+	.pins = nand_16bit_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(nand_16bit_pins),</div><div class='add'>+	.modemuxs = nand_16bit_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(nand_16bit_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for nand 4 chips */</div><div class='add'>+static const unsigned nand_4_chips_pins[] = { 205, 206, 211, 212 };</div><div class='add'>+static struct spear_muxreg nand_4_chips_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_NAND_4CHIPS_MASK,</div><div class='add'>+		.val = PMX_NAND_4CHIPS_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux nand_4_chips_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = nand_4_chips_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(nand_4_chips_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup nand_4_chips_pingroup = {</div><div class='add'>+	.name = "nand_4_chips_grp",</div><div class='add'>+	.pins = nand_4_chips_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(nand_4_chips_pins),</div><div class='add'>+	.modemuxs = nand_4_chips_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(nand_4_chips_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const nand_grps[] = { "nand_8bit_grp", "nand_16bit_grp",</div><div class='add'>+	"nand_4_chips_grp" };</div><div class='add'>+static struct spear_function nand_function = {</div><div class='add'>+	.name = "nand",</div><div class='add'>+	.groups = nand_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(nand_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for keyboard_6x6 device */</div><div class='add'>+static const unsigned keyboard_6x6_pins[] = { 201, 202, 203, 204, 205, 206, 207,</div><div class='add'>+	208, 209, 210, 211, 212 };</div><div class='add'>+static struct spear_muxreg keyboard_6x6_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_KEYBOARD_6X6_MASK | PMX_NFIO8_15_MASK |</div><div class='add'>+			PMX_NFCE1_MASK | PMX_NFCE2_MASK | PMX_NFWPRT1_MASK |</div><div class='add'>+			PMX_NFWPRT2_MASK,</div><div class='add'>+		.val = PMX_KEYBOARD_6X6_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux keyboard_6x6_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = keyboard_6x6_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(keyboard_6x6_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup keyboard_6x6_pingroup = {</div><div class='add'>+	.name = "keyboard_6x6_grp",</div><div class='add'>+	.pins = keyboard_6x6_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(keyboard_6x6_pins),</div><div class='add'>+	.modemuxs = keyboard_6x6_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(keyboard_6x6_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for keyboard_rowcol6_8 device */</div><div class='add'>+static const unsigned keyboard_rowcol6_8_pins[] = { 24, 25, 26, 27, 28, 29 };</div><div class='add'>+static struct spear_muxreg keyboard_rowcol6_8_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_KBD_ROWCOL68_MASK,</div><div class='add'>+		.val = PMX_KBD_ROWCOL68_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux keyboard_rowcol6_8_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = keyboard_rowcol6_8_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(keyboard_rowcol6_8_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup keyboard_rowcol6_8_pingroup = {</div><div class='add'>+	.name = "keyboard_rowcol6_8_grp",</div><div class='add'>+	.pins = keyboard_rowcol6_8_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(keyboard_rowcol6_8_pins),</div><div class='add'>+	.modemuxs = keyboard_rowcol6_8_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(keyboard_rowcol6_8_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const keyboard_grps[] = { "keyboard_6x6_grp",</div><div class='add'>+	"keyboard_rowcol6_8_grp" };</div><div class='add'>+static struct spear_function keyboard_function = {</div><div class='add'>+	.name = "keyboard",</div><div class='add'>+	.groups = keyboard_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(keyboard_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for uart0 device */</div><div class='add'>+static const unsigned uart0_pins[] = { 100, 101 };</div><div class='add'>+static struct spear_muxreg uart0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_UART0_MASK,</div><div class='add'>+		.val = PMX_UART0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart0_pingroup = {</div><div class='add'>+	.name = "uart0_grp",</div><div class='add'>+	.pins = uart0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart0_pins),</div><div class='add'>+	.modemuxs = uart0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for uart0_modem device */</div><div class='add'>+static const unsigned uart0_modem_pins[] = { 12, 13, 14, 15, 16, 17 };</div><div class='add'>+static struct spear_muxreg uart0_modem_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = PMX_UART0_MODEM_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart0_modem_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart0_modem_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart0_modem_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart0_modem_pingroup = {</div><div class='add'>+	.name = "uart0_modem_grp",</div><div class='add'>+	.pins = uart0_modem_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart0_modem_pins),</div><div class='add'>+	.modemuxs = uart0_modem_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart0_modem_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart0_grps[] = { "uart0_grp", "uart0_modem_grp" };</div><div class='add'>+static struct spear_function uart0_function = {</div><div class='add'>+	.name = "uart0",</div><div class='add'>+	.groups = uart0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for gpt0_tmr0 device */</div><div class='add'>+static const unsigned gpt0_tmr0_pins[] = { 10, 11 };</div><div class='add'>+static struct spear_muxreg gpt0_tmr0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_GPT0_TMR0_MASK,</div><div class='add'>+		.val = PMX_GPT0_TMR0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpt0_tmr0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = gpt0_tmr0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpt0_tmr0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup gpt0_tmr0_pingroup = {</div><div class='add'>+	.name = "gpt0_tmr0_grp",</div><div class='add'>+	.pins = gpt0_tmr0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpt0_tmr0_pins),</div><div class='add'>+	.modemuxs = gpt0_tmr0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpt0_tmr0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for gpt0_tmr1 device */</div><div class='add'>+static const unsigned gpt0_tmr1_pins[] = { 8, 9 };</div><div class='add'>+static struct spear_muxreg gpt0_tmr1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_GPT0_TMR1_MASK,</div><div class='add'>+		.val = PMX_GPT0_TMR1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpt0_tmr1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = gpt0_tmr1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpt0_tmr1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup gpt0_tmr1_pingroup = {</div><div class='add'>+	.name = "gpt0_tmr1_grp",</div><div class='add'>+	.pins = gpt0_tmr1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpt0_tmr1_pins),</div><div class='add'>+	.modemuxs = gpt0_tmr1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpt0_tmr1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const gpt0_grps[] = { "gpt0_tmr0_grp", "gpt0_tmr1_grp" };</div><div class='add'>+static struct spear_function gpt0_function = {</div><div class='add'>+	.name = "gpt0",</div><div class='add'>+	.groups = gpt0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(gpt0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for gpt1_tmr0 device */</div><div class='add'>+static const unsigned gpt1_tmr0_pins[] = { 6, 7 };</div><div class='add'>+static struct spear_muxreg gpt1_tmr0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_GPT1_TMR0_MASK,</div><div class='add'>+		.val = PMX_GPT1_TMR0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpt1_tmr0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = gpt1_tmr0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpt1_tmr0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup gpt1_tmr0_pingroup = {</div><div class='add'>+	.name = "gpt1_tmr0_grp",</div><div class='add'>+	.pins = gpt1_tmr0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpt1_tmr0_pins),</div><div class='add'>+	.modemuxs = gpt1_tmr0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpt1_tmr0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for gpt1_tmr1 device */</div><div class='add'>+static const unsigned gpt1_tmr1_pins[] = { 4, 5 };</div><div class='add'>+static struct spear_muxreg gpt1_tmr1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_GPT1_TMR1_MASK,</div><div class='add'>+		.val = PMX_GPT1_TMR1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpt1_tmr1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = gpt1_tmr1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpt1_tmr1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup gpt1_tmr1_pingroup = {</div><div class='add'>+	.name = "gpt1_tmr1_grp",</div><div class='add'>+	.pins = gpt1_tmr1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpt1_tmr1_pins),</div><div class='add'>+	.modemuxs = gpt1_tmr1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpt1_tmr1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const gpt1_grps[] = { "gpt1_tmr1_grp", "gpt1_tmr0_grp" };</div><div class='add'>+static struct spear_function gpt1_function = {</div><div class='add'>+	.name = "gpt1",</div><div class='add'>+	.groups = gpt1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(gpt1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for mcif device */</div><div class='add'>+static const unsigned mcif_pins[] = { 86, 87, 88, 89, 90, 91, 92, 93, 213, 214,</div><div class='add'>+	215, 216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228,</div><div class='add'>+	229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242,</div><div class='add'>+	243, 244, 245 };</div><div class='add'>+#define MCIF_MUXREG						\</div><div class='add'>+	{							\</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,			\</div><div class='add'>+		.mask = PMX_MCI_DATA8_15_MASK,			\</div><div class='add'>+		.val = PMX_MCI_DATA8_15_MASK,			\</div><div class='add'>+	}, {							\</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,			\</div><div class='add'>+		.mask = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK |	\</div><div class='add'>+			PMX_NFWPRT2_MASK,			\</div><div class='add'>+		.val = PMX_MCIFALL_1_MASK,			\</div><div class='add'>+	}, {							\</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,			\</div><div class='add'>+		.mask = PMX_MCIFALL_2_MASK,			\</div><div class='add'>+		.val = PMX_MCIFALL_2_MASK,			\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+/* sdhci device */</div><div class='add'>+static struct spear_muxreg sdhci_muxreg[] = {</div><div class='add'>+	MCIF_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = PERIP_CFG,</div><div class='add'>+		.mask = MCIF_SEL_MASK,</div><div class='add'>+		.val = MCIF_SEL_SD,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux sdhci_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = sdhci_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sdhci_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup sdhci_pingroup = {</div><div class='add'>+	.name = "sdhci_grp",</div><div class='add'>+	.pins = mcif_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(mcif_pins),</div><div class='add'>+	.modemuxs = sdhci_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(sdhci_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const sdhci_grps[] = { "sdhci_grp" };</div><div class='add'>+static struct spear_function sdhci_function = {</div><div class='add'>+	.name = "sdhci",</div><div class='add'>+	.groups = sdhci_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(sdhci_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* cf device */</div><div class='add'>+static struct spear_muxreg cf_muxreg[] = {</div><div class='add'>+	MCIF_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = PERIP_CFG,</div><div class='add'>+		.mask = MCIF_SEL_MASK,</div><div class='add'>+		.val = MCIF_SEL_CF,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux cf_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = cf_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(cf_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup cf_pingroup = {</div><div class='add'>+	.name = "cf_grp",</div><div class='add'>+	.pins = mcif_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(mcif_pins),</div><div class='add'>+	.modemuxs = cf_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(cf_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const cf_grps[] = { "cf_grp" };</div><div class='add'>+static struct spear_function cf_function = {</div><div class='add'>+	.name = "cf",</div><div class='add'>+	.groups = cf_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(cf_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* xd device */</div><div class='add'>+static struct spear_muxreg xd_muxreg[] = {</div><div class='add'>+	MCIF_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = PERIP_CFG,</div><div class='add'>+		.mask = MCIF_SEL_MASK,</div><div class='add'>+		.val = MCIF_SEL_XD,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux xd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = xd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(xd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup xd_pingroup = {</div><div class='add'>+	.name = "xd_grp",</div><div class='add'>+	.pins = mcif_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(mcif_pins),</div><div class='add'>+	.modemuxs = xd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(xd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const xd_grps[] = { "xd_grp" };</div><div class='add'>+static struct spear_function xd_function = {</div><div class='add'>+	.name = "xd",</div><div class='add'>+	.groups = xd_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(xd_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for touch_xy device */</div><div class='add'>+static const unsigned touch_xy_pins[] = { 97 };</div><div class='add'>+static struct spear_muxreg touch_xy_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PMX_TOUCH_XY_MASK,</div><div class='add'>+		.val = PMX_TOUCH_XY_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux touch_xy_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = touch_xy_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(touch_xy_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup touch_xy_pingroup = {</div><div class='add'>+	.name = "touch_xy_grp",</div><div class='add'>+	.pins = touch_xy_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(touch_xy_pins),</div><div class='add'>+	.modemuxs = touch_xy_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(touch_xy_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const touch_xy_grps[] = { "touch_xy_grp" };</div><div class='add'>+static struct spear_function touch_xy_function = {</div><div class='add'>+	.name = "touchscreen",</div><div class='add'>+	.groups = touch_xy_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(touch_xy_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for uart1 device */</div><div class='add'>+/* Muxed with I2C */</div><div class='add'>+static const unsigned uart1_dis_i2c_pins[] = { 102, 103 };</div><div class='add'>+static struct spear_muxreg uart1_dis_i2c_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_I2C0_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart1_dis_i2c_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart1_dis_i2c_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart1_dis_i2c_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart_1_dis_i2c_pingroup = {</div><div class='add'>+	.name = "uart1_disable_i2c_grp",</div><div class='add'>+	.pins = uart1_dis_i2c_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart1_dis_i2c_pins),</div><div class='add'>+	.modemuxs = uart1_dis_i2c_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart1_dis_i2c_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Muxed with SD/MMC */</div><div class='add'>+static const unsigned uart1_dis_sd_pins[] = { 214, 215 };</div><div class='add'>+static struct spear_muxreg uart1_dis_sd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_MCIDATA1_MASK |</div><div class='add'>+			PMX_MCIDATA2_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart1_dis_sd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart1_dis_sd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart1_dis_sd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart_1_dis_sd_pingroup = {</div><div class='add'>+	.name = "uart1_disable_sd_grp",</div><div class='add'>+	.pins = uart1_dis_sd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart1_dis_sd_pins),</div><div class='add'>+	.modemuxs = uart1_dis_sd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart1_dis_sd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart1_grps[] = { "uart1_disable_i2c_grp",</div><div class='add'>+	"uart1_disable_sd_grp" };</div><div class='add'>+static struct spear_function uart1_function = {</div><div class='add'>+	.name = "uart1",</div><div class='add'>+	.groups = uart1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for uart2_3 device */</div><div class='add'>+static const unsigned uart2_3_pins[] = { 104, 105, 106, 107 };</div><div class='add'>+static struct spear_muxreg uart2_3_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_I2S0_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart2_3_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart2_3_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart2_3_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart_2_3_pingroup = {</div><div class='add'>+	.name = "uart2_3_grp",</div><div class='add'>+	.pins = uart2_3_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart2_3_pins),</div><div class='add'>+	.modemuxs = uart2_3_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart2_3_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart2_3_grps[] = { "uart2_3_grp" };</div><div class='add'>+static struct spear_function uart2_3_function = {</div><div class='add'>+	.name = "uart2_3",</div><div class='add'>+	.groups = uart2_3_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart2_3_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for uart4 device */</div><div class='add'>+static const unsigned uart4_pins[] = { 108, 113 };</div><div class='add'>+static struct spear_muxreg uart4_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_I2S0_MASK | PMX_CLCD1_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart4_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart4_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart4_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart_4_pingroup = {</div><div class='add'>+	.name = "uart4_grp",</div><div class='add'>+	.pins = uart4_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart4_pins),</div><div class='add'>+	.modemuxs = uart4_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart4_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart4_grps[] = { "uart4_grp" };</div><div class='add'>+static struct spear_function uart4_function = {</div><div class='add'>+	.name = "uart4",</div><div class='add'>+	.groups = uart4_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart4_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for uart5 device */</div><div class='add'>+static const unsigned uart5_pins[] = { 114, 115 };</div><div class='add'>+static struct spear_muxreg uart5_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_CLCD1_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart5_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart5_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart5_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart_5_pingroup = {</div><div class='add'>+	.name = "uart5_grp",</div><div class='add'>+	.pins = uart5_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart5_pins),</div><div class='add'>+	.modemuxs = uart5_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart5_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart5_grps[] = { "uart5_grp" };</div><div class='add'>+static struct spear_function uart5_function = {</div><div class='add'>+	.name = "uart5",</div><div class='add'>+	.groups = uart5_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart5_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for rs485_0_1_tdm_0_1 device */</div><div class='add'>+static const unsigned rs485_0_1_tdm_0_1_pins[] = { 116, 117, 118, 119, 120, 121,</div><div class='add'>+	122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135,</div><div class='add'>+	136, 137 };</div><div class='add'>+static struct spear_muxreg rs485_0_1_tdm_0_1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_CLCD1_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux rs485_0_1_tdm_0_1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = rs485_0_1_tdm_0_1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(rs485_0_1_tdm_0_1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup rs485_0_1_tdm_0_1_pingroup = {</div><div class='add'>+	.name = "rs485_0_1_tdm_0_1_grp",</div><div class='add'>+	.pins = rs485_0_1_tdm_0_1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(rs485_0_1_tdm_0_1_pins),</div><div class='add'>+	.modemuxs = rs485_0_1_tdm_0_1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(rs485_0_1_tdm_0_1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const rs485_0_1_tdm_0_1_grps[] = { "rs485_0_1_tdm_0_1_grp" };</div><div class='add'>+static struct spear_function rs485_0_1_tdm_0_1_function = {</div><div class='add'>+	.name = "rs485_0_1_tdm_0_1",</div><div class='add'>+	.groups = rs485_0_1_tdm_0_1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(rs485_0_1_tdm_0_1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2c_1_2 device */</div><div class='add'>+static const unsigned i2c_1_2_pins[] = { 138, 139, 140, 141 };</div><div class='add'>+static struct spear_muxreg i2c_1_2_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_CLCD1_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c_1_2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2c_1_2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c_1_2_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c_1_2_pingroup = {</div><div class='add'>+	.name = "i2c_1_2_grp",</div><div class='add'>+	.pins = i2c_1_2_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c_1_2_pins),</div><div class='add'>+	.modemuxs = i2c_1_2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c_1_2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2c_1_2_grps[] = { "i2c_1_2_grp" };</div><div class='add'>+static struct spear_function i2c_1_2_function = {</div><div class='add'>+	.name = "i2c_1_2",</div><div class='add'>+	.groups = i2c_1_2_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2c_1_2_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2c3_dis_smi_clcd device */</div><div class='add'>+/* Muxed with SMI &amp; CLCD */</div><div class='add'>+static const unsigned i2c3_dis_smi_clcd_pins[] = { 142, 153 };</div><div class='add'>+static struct spear_muxreg i2c3_dis_smi_clcd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_CLCD1_MASK | PMX_SMI_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c3_dis_smi_clcd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2c3_dis_smi_clcd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c3_dis_smi_clcd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c3_dis_smi_clcd_pingroup = {</div><div class='add'>+	.name = "i2c3_dis_smi_clcd_grp",</div><div class='add'>+	.pins = i2c3_dis_smi_clcd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c3_dis_smi_clcd_pins),</div><div class='add'>+	.modemuxs = i2c3_dis_smi_clcd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c3_dis_smi_clcd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2c3_dis_sd_i2s0 device */</div><div class='add'>+/* Muxed with SD/MMC &amp; I2S1 */</div><div class='add'>+static const unsigned i2c3_dis_sd_i2s0_pins[] = { 0, 216 };</div><div class='add'>+static struct spear_muxreg i2c3_dis_sd_i2s0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c3_dis_sd_i2s0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2c3_dis_sd_i2s0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c3_dis_sd_i2s0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c3_dis_sd_i2s0_pingroup = {</div><div class='add'>+	.name = "i2c3_dis_sd_i2s0_grp",</div><div class='add'>+	.pins = i2c3_dis_sd_i2s0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c3_dis_sd_i2s0_pins),</div><div class='add'>+	.modemuxs = i2c3_dis_sd_i2s0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c3_dis_sd_i2s0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2c3_grps[] = { "i2c3_dis_smi_clcd_grp",</div><div class='add'>+	"i2c3_dis_sd_i2s0_grp" };</div><div class='add'>+static struct spear_function i2c3_unction = {</div><div class='add'>+	.name = "i2c3_i2s1",</div><div class='add'>+	.groups = i2c3_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2c3_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2c_4_5_dis_smi device */</div><div class='add'>+/* Muxed with SMI */</div><div class='add'>+static const unsigned i2c_4_5_dis_smi_pins[] = { 154, 155, 156, 157 };</div><div class='add'>+static struct spear_muxreg i2c_4_5_dis_smi_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_SMI_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c_4_5_dis_smi_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2c_4_5_dis_smi_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c_4_5_dis_smi_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c_4_5_dis_smi_pingroup = {</div><div class='add'>+	.name = "i2c_4_5_dis_smi_grp",</div><div class='add'>+	.pins = i2c_4_5_dis_smi_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c_4_5_dis_smi_pins),</div><div class='add'>+	.modemuxs = i2c_4_5_dis_smi_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c_4_5_dis_smi_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2c4_dis_sd device */</div><div class='add'>+/* Muxed with SD/MMC */</div><div class='add'>+static const unsigned i2c4_dis_sd_pins[] = { 217, 218 };</div><div class='add'>+static struct spear_muxreg i2c4_dis_sd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_MCIDATA4_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PMX_MCIDATA5_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c4_dis_sd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2c4_dis_sd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c4_dis_sd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c4_dis_sd_pingroup = {</div><div class='add'>+	.name = "i2c4_dis_sd_grp",</div><div class='add'>+	.pins = i2c4_dis_sd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c4_dis_sd_pins),</div><div class='add'>+	.modemuxs = i2c4_dis_sd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c4_dis_sd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2c5_dis_sd device */</div><div class='add'>+/* Muxed with SD/MMC */</div><div class='add'>+static const unsigned i2c5_dis_sd_pins[] = { 219, 220 };</div><div class='add'>+static struct spear_muxreg i2c5_dis_sd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PMX_MCIDATA6_MASK |</div><div class='add'>+			PMX_MCIDATA7_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c5_dis_sd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2c5_dis_sd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c5_dis_sd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c5_dis_sd_pingroup = {</div><div class='add'>+	.name = "i2c5_dis_sd_grp",</div><div class='add'>+	.pins = i2c5_dis_sd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c5_dis_sd_pins),</div><div class='add'>+	.modemuxs = i2c5_dis_sd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c5_dis_sd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2c_4_5_grps[] = { "i2c5_dis_sd_grp",</div><div class='add'>+	"i2c4_dis_sd_grp", "i2c_4_5_dis_smi_grp" };</div><div class='add'>+static struct spear_function i2c_4_5_function = {</div><div class='add'>+	.name = "i2c_4_5",</div><div class='add'>+	.groups = i2c_4_5_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2c_4_5_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2c_6_7_dis_kbd device */</div><div class='add'>+/* Muxed with KBD */</div><div class='add'>+static const unsigned i2c_6_7_dis_kbd_pins[] = { 207, 208, 209, 210 };</div><div class='add'>+static struct spear_muxreg i2c_6_7_dis_kbd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_KBD_ROWCOL25_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c_6_7_dis_kbd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2c_6_7_dis_kbd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c_6_7_dis_kbd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c_6_7_dis_kbd_pingroup = {</div><div class='add'>+	.name = "i2c_6_7_dis_kbd_grp",</div><div class='add'>+	.pins = i2c_6_7_dis_kbd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c_6_7_dis_kbd_pins),</div><div class='add'>+	.modemuxs = i2c_6_7_dis_kbd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c_6_7_dis_kbd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2c6_dis_sd device */</div><div class='add'>+/* Muxed with SD/MMC */</div><div class='add'>+static const unsigned i2c6_dis_sd_pins[] = { 236, 237 };</div><div class='add'>+static struct spear_muxreg i2c6_dis_sd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PMX_MCIIORDRE_MASK |</div><div class='add'>+			PMX_MCIIOWRWE_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c6_dis_sd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2c6_dis_sd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c6_dis_sd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c6_dis_sd_pingroup = {</div><div class='add'>+	.name = "i2c6_dis_sd_grp",</div><div class='add'>+	.pins = i2c6_dis_sd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c6_dis_sd_pins),</div><div class='add'>+	.modemuxs = i2c6_dis_sd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c6_dis_sd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2c7_dis_sd device */</div><div class='add'>+static const unsigned i2c7_dis_sd_pins[] = { 238, 239 };</div><div class='add'>+static struct spear_muxreg i2c7_dis_sd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PMX_MCIRESETCF_MASK |</div><div class='add'>+			PMX_MCICS0CE_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c7_dis_sd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2c7_dis_sd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c7_dis_sd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c7_dis_sd_pingroup = {</div><div class='add'>+	.name = "i2c7_dis_sd_grp",</div><div class='add'>+	.pins = i2c7_dis_sd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c7_dis_sd_pins),</div><div class='add'>+	.modemuxs = i2c7_dis_sd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c7_dis_sd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2c_6_7_grps[] = { "i2c6_dis_sd_grp",</div><div class='add'>+	"i2c7_dis_sd_grp", "i2c_6_7_dis_kbd_grp" };</div><div class='add'>+static struct spear_function i2c_6_7_function = {</div><div class='add'>+	.name = "i2c_6_7",</div><div class='add'>+	.groups = i2c_6_7_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2c_6_7_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for can0_dis_nor device */</div><div class='add'>+/* Muxed with NOR */</div><div class='add'>+static const unsigned can0_dis_nor_pins[] = { 56, 57 };</div><div class='add'>+static struct spear_muxreg can0_dis_nor_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,</div><div class='add'>+		.mask = PMX_NFRSTPWDWN2_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_NFRSTPWDWN3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux can0_dis_nor_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = can0_dis_nor_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(can0_dis_nor_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup can0_dis_nor_pingroup = {</div><div class='add'>+	.name = "can0_dis_nor_grp",</div><div class='add'>+	.pins = can0_dis_nor_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(can0_dis_nor_pins),</div><div class='add'>+	.modemuxs = can0_dis_nor_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(can0_dis_nor_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for can0_dis_sd device */</div><div class='add'>+/* Muxed with SD/MMC */</div><div class='add'>+static const unsigned can0_dis_sd_pins[] = { 240, 241 };</div><div class='add'>+static struct spear_muxreg can0_dis_sd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux can0_dis_sd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = can0_dis_sd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(can0_dis_sd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup can0_dis_sd_pingroup = {</div><div class='add'>+	.name = "can0_dis_sd_grp",</div><div class='add'>+	.pins = can0_dis_sd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(can0_dis_sd_pins),</div><div class='add'>+	.modemuxs = can0_dis_sd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(can0_dis_sd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const can0_grps[] = { "can0_dis_nor_grp", "can0_dis_sd_grp"</div><div class='add'>+};</div><div class='add'>+static struct spear_function can0_function = {</div><div class='add'>+	.name = "can0",</div><div class='add'>+	.groups = can0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(can0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for can1_dis_sd device */</div><div class='add'>+/* Muxed with SD/MMC */</div><div class='add'>+static const unsigned can1_dis_sd_pins[] = { 242, 243 };</div><div class='add'>+static struct spear_muxreg can1_dis_sd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux can1_dis_sd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = can1_dis_sd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(can1_dis_sd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup can1_dis_sd_pingroup = {</div><div class='add'>+	.name = "can1_dis_sd_grp",</div><div class='add'>+	.pins = can1_dis_sd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(can1_dis_sd_pins),</div><div class='add'>+	.modemuxs = can1_dis_sd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(can1_dis_sd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for can1_dis_kbd device */</div><div class='add'>+/* Muxed with KBD */</div><div class='add'>+static const unsigned can1_dis_kbd_pins[] = { 201, 202 };</div><div class='add'>+static struct spear_muxreg can1_dis_kbd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_KBD_ROWCOL25_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux can1_dis_kbd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = can1_dis_kbd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(can1_dis_kbd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup can1_dis_kbd_pingroup = {</div><div class='add'>+	.name = "can1_dis_kbd_grp",</div><div class='add'>+	.pins = can1_dis_kbd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(can1_dis_kbd_pins),</div><div class='add'>+	.modemuxs = can1_dis_kbd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(can1_dis_kbd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const can1_grps[] = { "can1_dis_sd_grp", "can1_dis_kbd_grp"</div><div class='add'>+};</div><div class='add'>+static struct spear_function can1_function = {</div><div class='add'>+	.name = "can1",</div><div class='add'>+	.groups = can1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(can1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for pci device */</div><div class='add'>+static const unsigned pci_sata_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18,</div><div class='add'>+	19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36,</div><div class='add'>+	37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54,</div><div class='add'>+	55, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 };</div><div class='add'>+#define PCI_SATA_MUXREG				\</div><div class='add'>+	{					\</div><div class='add'>+		.reg = PAD_FUNCTION_EN_0,	\</div><div class='add'>+		.mask = PMX_MCI_DATA8_15_MASK,	\</div><div class='add'>+		.val = 0,			\</div><div class='add'>+	}, {					\</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,	\</div><div class='add'>+		.mask = PMX_PCI_REG1_MASK,	\</div><div class='add'>+		.val = 0,			\</div><div class='add'>+	}, {					\</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,	\</div><div class='add'>+		.mask = PMX_PCI_REG2_MASK,	\</div><div class='add'>+		.val = 0,			\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for pcie0 device */</div><div class='add'>+static struct spear_muxreg pcie0_muxreg[] = {</div><div class='add'>+	PCI_SATA_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = PCIE_SATA_CFG,</div><div class='add'>+		.mask = PCIE_CFG_VAL(0),</div><div class='add'>+		.val = PCIE_CFG_VAL(0),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pcie0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = pcie0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pcie0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup pcie0_pingroup = {</div><div class='add'>+	.name = "pcie0_grp",</div><div class='add'>+	.pins = pci_sata_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(pci_sata_pins),</div><div class='add'>+	.modemuxs = pcie0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(pcie0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for pcie1 device */</div><div class='add'>+static struct spear_muxreg pcie1_muxreg[] = {</div><div class='add'>+	PCI_SATA_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = PCIE_SATA_CFG,</div><div class='add'>+		.mask = PCIE_CFG_VAL(1),</div><div class='add'>+		.val = PCIE_CFG_VAL(1),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pcie1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = pcie1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pcie1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup pcie1_pingroup = {</div><div class='add'>+	.name = "pcie1_grp",</div><div class='add'>+	.pins = pci_sata_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(pci_sata_pins),</div><div class='add'>+	.modemuxs = pcie1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(pcie1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for pcie2 device */</div><div class='add'>+static struct spear_muxreg pcie2_muxreg[] = {</div><div class='add'>+	PCI_SATA_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = PCIE_SATA_CFG,</div><div class='add'>+		.mask = PCIE_CFG_VAL(2),</div><div class='add'>+		.val = PCIE_CFG_VAL(2),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pcie2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = pcie2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pcie2_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup pcie2_pingroup = {</div><div class='add'>+	.name = "pcie2_grp",</div><div class='add'>+	.pins = pci_sata_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(pci_sata_pins),</div><div class='add'>+	.modemuxs = pcie2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(pcie2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const pci_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp" };</div><div class='add'>+static struct spear_function pci_function = {</div><div class='add'>+	.name = "pci",</div><div class='add'>+	.groups = pci_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(pci_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for sata0 device */</div><div class='add'>+static struct spear_muxreg sata0_muxreg[] = {</div><div class='add'>+	PCI_SATA_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = PCIE_SATA_CFG,</div><div class='add'>+		.mask = SATA_CFG_VAL(0),</div><div class='add'>+		.val = SATA_CFG_VAL(0),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux sata0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = sata0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sata0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup sata0_pingroup = {</div><div class='add'>+	.name = "sata0_grp",</div><div class='add'>+	.pins = pci_sata_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(pci_sata_pins),</div><div class='add'>+	.modemuxs = sata0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(sata0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for sata1 device */</div><div class='add'>+static struct spear_muxreg sata1_muxreg[] = {</div><div class='add'>+	PCI_SATA_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = PCIE_SATA_CFG,</div><div class='add'>+		.mask = SATA_CFG_VAL(1),</div><div class='add'>+		.val = SATA_CFG_VAL(1),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux sata1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = sata1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sata1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup sata1_pingroup = {</div><div class='add'>+	.name = "sata1_grp",</div><div class='add'>+	.pins = pci_sata_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(pci_sata_pins),</div><div class='add'>+	.modemuxs = sata1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(sata1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for sata2 device */</div><div class='add'>+static struct spear_muxreg sata2_muxreg[] = {</div><div class='add'>+	PCI_SATA_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = PCIE_SATA_CFG,</div><div class='add'>+		.mask = SATA_CFG_VAL(2),</div><div class='add'>+		.val = SATA_CFG_VAL(2),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux sata2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = sata2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sata2_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup sata2_pingroup = {</div><div class='add'>+	.name = "sata2_grp",</div><div class='add'>+	.pins = pci_sata_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(pci_sata_pins),</div><div class='add'>+	.modemuxs = sata2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(sata2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const sata_grps[] = { "sata0_grp", "sata1_grp", "sata2_grp"</div><div class='add'>+};</div><div class='add'>+static struct spear_function sata_function = {</div><div class='add'>+	.name = "sata",</div><div class='add'>+	.groups = sata_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(sata_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for ssp1_dis_kbd device */</div><div class='add'>+static const unsigned ssp1_dis_kbd_pins[] = { 203, 204, 205, 206 };</div><div class='add'>+static struct spear_muxreg ssp1_dis_kbd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK |</div><div class='add'>+			PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK |</div><div class='add'>+			PMX_NFCE2_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp1_dis_kbd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = ssp1_dis_kbd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp1_dis_kbd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup ssp1_dis_kbd_pingroup = {</div><div class='add'>+	.name = "ssp1_dis_kbd_grp",</div><div class='add'>+	.pins = ssp1_dis_kbd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(ssp1_dis_kbd_pins),</div><div class='add'>+	.modemuxs = ssp1_dis_kbd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(ssp1_dis_kbd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for ssp1_dis_sd device */</div><div class='add'>+static const unsigned ssp1_dis_sd_pins[] = { 224, 226, 227, 228 };</div><div class='add'>+static struct spear_muxreg ssp1_dis_sd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK |</div><div class='add'>+			PMX_MCICECF_MASK | PMX_MCICEXD_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp1_dis_sd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = ssp1_dis_sd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp1_dis_sd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup ssp1_dis_sd_pingroup = {</div><div class='add'>+	.name = "ssp1_dis_sd_grp",</div><div class='add'>+	.pins = ssp1_dis_sd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(ssp1_dis_sd_pins),</div><div class='add'>+	.modemuxs = ssp1_dis_sd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(ssp1_dis_sd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const ssp1_grps[] = { "ssp1_dis_kbd_grp",</div><div class='add'>+	"ssp1_dis_sd_grp" };</div><div class='add'>+static struct spear_function ssp1_function = {</div><div class='add'>+	.name = "ssp1",</div><div class='add'>+	.groups = ssp1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(ssp1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for gpt64 device */</div><div class='add'>+static const unsigned gpt64_pins[] = { 230, 231, 232, 245 };</div><div class='add'>+static struct spear_muxreg gpt64_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK</div><div class='add'>+			| PMX_MCILEDS_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpt64_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = gpt64_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpt64_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup gpt64_pingroup = {</div><div class='add'>+	.name = "gpt64_grp",</div><div class='add'>+	.pins = gpt64_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpt64_pins),</div><div class='add'>+	.modemuxs = gpt64_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpt64_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const gpt64_grps[] = { "gpt64_grp" };</div><div class='add'>+static struct spear_function gpt64_function = {</div><div class='add'>+	.name = "gpt64",</div><div class='add'>+	.groups = gpt64_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(gpt64_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pingroups */</div><div class='add'>+static struct spear_pingroup *spear1310_pingroups[] = {</div><div class='add'>+	&amp;i2c0_pingroup,</div><div class='add'>+	&amp;ssp0_pingroup,</div><div class='add'>+	&amp;i2s0_pingroup,</div><div class='add'>+	&amp;i2s1_pingroup,</div><div class='add'>+	&amp;clcd_pingroup,</div><div class='add'>+	&amp;clcd_high_res_pingroup,</div><div class='add'>+	&amp;arm_gpio_pingroup,</div><div class='add'>+	&amp;smi_2_chips_pingroup,</div><div class='add'>+	&amp;smi_4_chips_pingroup,</div><div class='add'>+	&amp;gmii_pingroup,</div><div class='add'>+	&amp;rgmii_pingroup,</div><div class='add'>+	&amp;smii_0_1_2_pingroup,</div><div class='add'>+	&amp;ras_mii_txclk_pingroup,</div><div class='add'>+	&amp;nand_8bit_pingroup,</div><div class='add'>+	&amp;nand_16bit_pingroup,</div><div class='add'>+	&amp;nand_4_chips_pingroup,</div><div class='add'>+	&amp;keyboard_6x6_pingroup,</div><div class='add'>+	&amp;keyboard_rowcol6_8_pingroup,</div><div class='add'>+	&amp;uart0_pingroup,</div><div class='add'>+	&amp;uart0_modem_pingroup,</div><div class='add'>+	&amp;gpt0_tmr0_pingroup,</div><div class='add'>+	&amp;gpt0_tmr1_pingroup,</div><div class='add'>+	&amp;gpt1_tmr0_pingroup,</div><div class='add'>+	&amp;gpt1_tmr1_pingroup,</div><div class='add'>+	&amp;sdhci_pingroup,</div><div class='add'>+	&amp;cf_pingroup,</div><div class='add'>+	&amp;xd_pingroup,</div><div class='add'>+	&amp;touch_xy_pingroup,</div><div class='add'>+	&amp;ssp0_cs0_pingroup,</div><div class='add'>+	&amp;ssp0_cs1_2_pingroup,</div><div class='add'>+	&amp;uart_1_dis_i2c_pingroup,</div><div class='add'>+	&amp;uart_1_dis_sd_pingroup,</div><div class='add'>+	&amp;uart_2_3_pingroup,</div><div class='add'>+	&amp;uart_4_pingroup,</div><div class='add'>+	&amp;uart_5_pingroup,</div><div class='add'>+	&amp;rs485_0_1_tdm_0_1_pingroup,</div><div class='add'>+	&amp;i2c_1_2_pingroup,</div><div class='add'>+	&amp;i2c3_dis_smi_clcd_pingroup,</div><div class='add'>+	&amp;i2c3_dis_sd_i2s0_pingroup,</div><div class='add'>+	&amp;i2c_4_5_dis_smi_pingroup,</div><div class='add'>+	&amp;i2c4_dis_sd_pingroup,</div><div class='add'>+	&amp;i2c5_dis_sd_pingroup,</div><div class='add'>+	&amp;i2c_6_7_dis_kbd_pingroup,</div><div class='add'>+	&amp;i2c6_dis_sd_pingroup,</div><div class='add'>+	&amp;i2c7_dis_sd_pingroup,</div><div class='add'>+	&amp;can0_dis_nor_pingroup,</div><div class='add'>+	&amp;can0_dis_sd_pingroup,</div><div class='add'>+	&amp;can1_dis_sd_pingroup,</div><div class='add'>+	&amp;can1_dis_kbd_pingroup,</div><div class='add'>+	&amp;pcie0_pingroup,</div><div class='add'>+	&amp;pcie1_pingroup,</div><div class='add'>+	&amp;pcie2_pingroup,</div><div class='add'>+	&amp;sata0_pingroup,</div><div class='add'>+	&amp;sata1_pingroup,</div><div class='add'>+	&amp;sata2_pingroup,</div><div class='add'>+	&amp;ssp1_dis_kbd_pingroup,</div><div class='add'>+	&amp;ssp1_dis_sd_pingroup,</div><div class='add'>+	&amp;gpt64_pingroup,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* functions */</div><div class='add'>+static struct spear_function *spear1310_functions[] = {</div><div class='add'>+	&amp;i2c0_function,</div><div class='add'>+	&amp;ssp0_function,</div><div class='add'>+	&amp;i2s0_function,</div><div class='add'>+	&amp;i2s1_function,</div><div class='add'>+	&amp;clcd_function,</div><div class='add'>+	&amp;arm_gpio_function,</div><div class='add'>+	&amp;smi_function,</div><div class='add'>+	&amp;gmii_function,</div><div class='add'>+	&amp;rgmii_function,</div><div class='add'>+	&amp;smii_0_1_2_function,</div><div class='add'>+	&amp;ras_mii_txclk_function,</div><div class='add'>+	&amp;nand_function,</div><div class='add'>+	&amp;keyboard_function,</div><div class='add'>+	&amp;uart0_function,</div><div class='add'>+	&amp;gpt0_function,</div><div class='add'>+	&amp;gpt1_function,</div><div class='add'>+	&amp;sdhci_function,</div><div class='add'>+	&amp;cf_function,</div><div class='add'>+	&amp;xd_function,</div><div class='add'>+	&amp;touch_xy_function,</div><div class='add'>+	&amp;uart1_function,</div><div class='add'>+	&amp;uart2_3_function,</div><div class='add'>+	&amp;uart4_function,</div><div class='add'>+	&amp;uart5_function,</div><div class='add'>+	&amp;rs485_0_1_tdm_0_1_function,</div><div class='add'>+	&amp;i2c_1_2_function,</div><div class='add'>+	&amp;i2c3_unction,</div><div class='add'>+	&amp;i2c_4_5_function,</div><div class='add'>+	&amp;i2c_6_7_function,</div><div class='add'>+	&amp;can0_function,</div><div class='add'>+	&amp;can1_function,</div><div class='add'>+	&amp;pci_function,</div><div class='add'>+	&amp;sata_function,</div><div class='add'>+	&amp;ssp1_function,</div><div class='add'>+	&amp;gpt64_function,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pinctrl_machdata spear1310_machdata = {</div><div class='add'>+	.pins = spear1310_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(spear1310_pins),</div><div class='add'>+	.groups = spear1310_pingroups,</div><div class='add'>+	.ngroups = ARRAY_SIZE(spear1310_pingroups),</div><div class='add'>+	.functions = spear1310_functions,</div><div class='add'>+	.nfunctions = ARRAY_SIZE(spear1310_functions),</div><div class='add'>+	.modes_supported = false,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct of_device_id spear1310_pinctrl_of_match[] __devinitdata = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "st,spear1310-pinmux",</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit spear1310_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return spear_pinctrl_probe(pdev, &amp;spear1310_machdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit spear1310_pinctrl_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return spear_pinctrl_remove(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver spear1310_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DRIVER_NAME,</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = spear1310_pinctrl_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = spear1310_pinctrl_probe,</div><div class='add'>+	.remove = __devexit_p(spear1310_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init spear1310_pinctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;spear1310_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(spear1310_pinctrl_init);</div><div class='add'>+</div><div class='add'>+static void __exit spear1310_pinctrl_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;spear1310_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(spear1310_pinctrl_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Viresh Kumar &lt;viresh.kumar@st.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("ST Microelectronics SPEAr1310 pinctrl driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_DEVICE_TABLE(of, spear1310_pinctrl_of_match);</div><div class='head'>diff --git a/drivers/pinctrl/spear/pinctrl-spear1340.c b/drivers/pinctrl/spear/pinctrl-spear1340.c<br/>new file mode 100644<br/>index 000000000000..a8ab2a6f51bf<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/spear/pinctrl-spear1340.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear1340.c</a></div><div class='hunk'>@@ -0,0 +1,1989 @@</div><div class='add'>+/*</div><div class='add'>+ * Driver for the ST Microelectronics SPEAr1340 pinmux</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include "pinctrl-spear.h"</div><div class='add'>+</div><div class='add'>+#define DRIVER_NAME "spear1340-pinmux"</div><div class='add'>+</div><div class='add'>+/* pins */</div><div class='add'>+static const struct pinctrl_pin_desc spear1340_pins[] = {</div><div class='add'>+	SPEAR_PIN_0_TO_101,</div><div class='add'>+	SPEAR_PIN_102_TO_245,</div><div class='add'>+	PINCTRL_PIN(246, "PLGPIO246"),</div><div class='add'>+	PINCTRL_PIN(247, "PLGPIO247"),</div><div class='add'>+	PINCTRL_PIN(248, "PLGPIO248"),</div><div class='add'>+	PINCTRL_PIN(249, "PLGPIO249"),</div><div class='add'>+	PINCTRL_PIN(250, "PLGPIO250"),</div><div class='add'>+	PINCTRL_PIN(251, "PLGPIO251"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* In SPEAr1340 there are two levels of pad muxing */</div><div class='add'>+/* - pads as gpio OR peripherals */</div><div class='add'>+#define PAD_FUNCTION_EN_1			0x668</div><div class='add'>+#define PAD_FUNCTION_EN_2			0x66C</div><div class='add'>+#define PAD_FUNCTION_EN_3			0x670</div><div class='add'>+#define PAD_FUNCTION_EN_4			0x674</div><div class='add'>+#define PAD_FUNCTION_EN_5			0x690</div><div class='add'>+#define PAD_FUNCTION_EN_6			0x694</div><div class='add'>+#define PAD_FUNCTION_EN_7			0x698</div><div class='add'>+#define PAD_FUNCTION_EN_8			0x69C</div><div class='add'>+</div><div class='add'>+/* - If peripherals, then primary OR alternate peripheral */</div><div class='add'>+#define PAD_SHARED_IP_EN_1			0x6A0</div><div class='add'>+#define PAD_SHARED_IP_EN_2			0x6A4</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Macro's for first level of pmx - pads as gpio OR peripherals. There are 8</div><div class='add'>+ * registers with 32 bits each for handling gpio pads, register 8 has only 26</div><div class='add'>+ * relevant bits.</div><div class='add'>+ */</div><div class='add'>+/* macro's for making pads as gpio's */</div><div class='add'>+#define PADS_AS_GPIO_REG0_MASK			0xFFFFFFFE</div><div class='add'>+#define PADS_AS_GPIO_REGS_MASK			0xFFFFFFFF</div><div class='add'>+#define PADS_AS_GPIO_REG7_MASK			0x07FFFFFF</div><div class='add'>+</div><div class='add'>+/* macro's for making pads as peripherals */</div><div class='add'>+#define FSMC_16_BIT_AND_KBD_ROW_COL_REG0_MASK	0x00000FFE</div><div class='add'>+#define UART0_ENH_AND_GPT_REG0_MASK		0x0003F000</div><div class='add'>+#define PWM1_AND_KBD_COL5_REG0_MASK		0x00040000</div><div class='add'>+#define I2C1_REG0_MASK				0x01080000</div><div class='add'>+#define SPDIF_IN_REG0_MASK			0x00100000</div><div class='add'>+#define PWM2_AND_GPT0_TMR0_CPT_REG0_MASK	0x00400000</div><div class='add'>+#define PWM3_AND_GPT0_TMR1_CLK_REG0_MASK	0x00800000</div><div class='add'>+#define PWM0_AND_SSP0_CS1_REG0_MASK		0x02000000</div><div class='add'>+#define VIP_AND_CAM3_REG0_MASK			0xFC200000</div><div class='add'>+#define VIP_AND_CAM3_REG1_MASK			0x0000000F</div><div class='add'>+#define VIP_REG1_MASK				0x00001EF0</div><div class='add'>+#define VIP_AND_CAM2_REG1_MASK			0x007FE100</div><div class='add'>+#define VIP_AND_CAM1_REG1_MASK			0xFF800000</div><div class='add'>+#define VIP_AND_CAM1_REG2_MASK			0x00000003</div><div class='add'>+#define VIP_AND_CAM0_REG2_MASK			0x00001FFC</div><div class='add'>+#define SMI_REG2_MASK				0x0021E000</div><div class='add'>+#define SSP0_REG2_MASK				0x001E0000</div><div class='add'>+#define TS_AND_SSP0_CS2_REG2_MASK		0x00400000</div><div class='add'>+#define UART0_REG2_MASK				0x01800000</div><div class='add'>+#define UART1_REG2_MASK				0x06000000</div><div class='add'>+#define I2S_IN_REG2_MASK			0xF8000000</div><div class='add'>+#define DEVS_GRP_AND_MIPHY_DBG_REG3_MASK	0x000001FE</div><div class='add'>+#define I2S_OUT_REG3_MASK			0x000001EF</div><div class='add'>+#define I2S_IN_REG3_MASK			0x00000010</div><div class='add'>+#define GMAC_REG3_MASK				0xFFFFFE00</div><div class='add'>+#define GMAC_REG4_MASK				0x0000001F</div><div class='add'>+#define DEVS_GRP_AND_MIPHY_DBG_REG4_MASK	0x7FFFFF20</div><div class='add'>+#define SSP0_CS3_REG4_MASK			0x00000020</div><div class='add'>+#define I2C0_REG4_MASK				0x000000C0</div><div class='add'>+#define CEC0_REG4_MASK				0x00000100</div><div class='add'>+#define CEC1_REG4_MASK				0x00000200</div><div class='add'>+#define SPDIF_OUT_REG4_MASK			0x00000400</div><div class='add'>+#define CLCD_REG4_MASK				0x7FFFF800</div><div class='add'>+#define CLCD_AND_ARM_TRACE_REG4_MASK		0x80000000</div><div class='add'>+#define CLCD_AND_ARM_TRACE_REG5_MASK		0xFFFFFFFF</div><div class='add'>+#define CLCD_AND_ARM_TRACE_REG6_MASK		0x00000001</div><div class='add'>+#define FSMC_PNOR_AND_MCIF_REG6_MASK		0x073FFFFE</div><div class='add'>+#define MCIF_REG6_MASK				0xF8C00000</div><div class='add'>+#define MCIF_REG7_MASK				0x000043FF</div><div class='add'>+#define FSMC_8BIT_REG7_MASK			0x07FFBC00</div><div class='add'>+</div><div class='add'>+/* other registers */</div><div class='add'>+#define PERIP_CFG				0x42C</div><div class='add'>+	/* PERIP_CFG register masks */</div><div class='add'>+	#define SSP_CS_CTL_HW			0</div><div class='add'>+	#define SSP_CS_CTL_SW			1</div><div class='add'>+	#define SSP_CS_CTL_MASK			1</div><div class='add'>+	#define SSP_CS_CTL_SHIFT		21</div><div class='add'>+	#define SSP_CS_VAL_MASK			1</div><div class='add'>+	#define SSP_CS_VAL_SHIFT		20</div><div class='add'>+	#define SSP_CS_SEL_CS0			0</div><div class='add'>+	#define SSP_CS_SEL_CS1			1</div><div class='add'>+	#define SSP_CS_SEL_CS2			2</div><div class='add'>+	#define SSP_CS_SEL_MASK			3</div><div class='add'>+	#define SSP_CS_SEL_SHIFT		18</div><div class='add'>+</div><div class='add'>+	#define I2S_CHNL_2_0			(0)</div><div class='add'>+	#define I2S_CHNL_3_1			(1)</div><div class='add'>+	#define I2S_CHNL_5_1			(2)</div><div class='add'>+	#define I2S_CHNL_7_1			(3)</div><div class='add'>+	#define I2S_CHNL_PLAY_SHIFT		(4)</div><div class='add'>+	#define I2S_CHNL_PLAY_MASK		(3 &lt;&lt; 4)</div><div class='add'>+	#define I2S_CHNL_REC_SHIFT		(6)</div><div class='add'>+	#define I2S_CHNL_REC_MASK		(3 &lt;&lt; 6)</div><div class='add'>+</div><div class='add'>+	#define SPDIF_OUT_ENB_MASK		(1 &lt;&lt; 2)</div><div class='add'>+	#define SPDIF_OUT_ENB_SHIFT		2</div><div class='add'>+</div><div class='add'>+	#define MCIF_SEL_SD			1</div><div class='add'>+	#define MCIF_SEL_CF			2</div><div class='add'>+	#define MCIF_SEL_XD			3</div><div class='add'>+	#define MCIF_SEL_MASK			3</div><div class='add'>+	#define MCIF_SEL_SHIFT			0</div><div class='add'>+</div><div class='add'>+#define GMAC_CLK_CFG				0x248</div><div class='add'>+	#define GMAC_PHY_IF_GMII_VAL		(0 &lt;&lt; 3)</div><div class='add'>+	#define GMAC_PHY_IF_RGMII_VAL		(1 &lt;&lt; 3)</div><div class='add'>+	#define GMAC_PHY_IF_SGMII_VAL		(2 &lt;&lt; 3)</div><div class='add'>+	#define GMAC_PHY_IF_RMII_VAL		(4 &lt;&lt; 3)</div><div class='add'>+	#define GMAC_PHY_IF_SEL_MASK		(7 &lt;&lt; 3)</div><div class='add'>+	#define GMAC_PHY_INPUT_ENB_VAL		0</div><div class='add'>+	#define GMAC_PHY_SYNT_ENB_VAL		1</div><div class='add'>+	#define GMAC_PHY_CLK_MASK		1</div><div class='add'>+	#define GMAC_PHY_CLK_SHIFT		2</div><div class='add'>+	#define GMAC_PHY_125M_PAD_VAL		0</div><div class='add'>+	#define GMAC_PHY_PLL2_VAL		1</div><div class='add'>+	#define GMAC_PHY_OSC3_VAL		2</div><div class='add'>+	#define GMAC_PHY_INPUT_CLK_MASK		3</div><div class='add'>+	#define GMAC_PHY_INPUT_CLK_SHIFT	0</div><div class='add'>+</div><div class='add'>+#define PCIE_SATA_CFG				0x424</div><div class='add'>+	/* PCIE CFG MASks */</div><div class='add'>+	#define PCIE_CFG_DEVICE_PRESENT		(1 &lt;&lt; 11)</div><div class='add'>+	#define PCIE_CFG_POWERUP_RESET		(1 &lt;&lt; 10)</div><div class='add'>+	#define PCIE_CFG_CORE_CLK_EN		(1 &lt;&lt; 9)</div><div class='add'>+	#define PCIE_CFG_AUX_CLK_EN		(1 &lt;&lt; 8)</div><div class='add'>+	#define SATA_CFG_TX_CLK_EN		(1 &lt;&lt; 4)</div><div class='add'>+	#define SATA_CFG_RX_CLK_EN		(1 &lt;&lt; 3)</div><div class='add'>+	#define SATA_CFG_POWERUP_RESET		(1 &lt;&lt; 2)</div><div class='add'>+	#define SATA_CFG_PM_CLK_EN		(1 &lt;&lt; 1)</div><div class='add'>+	#define PCIE_SATA_SEL_PCIE		(0)</div><div class='add'>+	#define PCIE_SATA_SEL_SATA		(1)</div><div class='add'>+	#define SATA_PCIE_CFG_MASK		0xF1F</div><div class='add'>+	#define PCIE_CFG_VAL	(PCIE_SATA_SEL_PCIE | PCIE_CFG_AUX_CLK_EN | \</div><div class='add'>+				PCIE_CFG_CORE_CLK_EN | PCIE_CFG_POWERUP_RESET |\</div><div class='add'>+				PCIE_CFG_DEVICE_PRESENT)</div><div class='add'>+	#define SATA_CFG_VAL	(PCIE_SATA_SEL_SATA | SATA_CFG_PM_CLK_EN | \</div><div class='add'>+				SATA_CFG_POWERUP_RESET | SATA_CFG_RX_CLK_EN | \</div><div class='add'>+				SATA_CFG_TX_CLK_EN)</div><div class='add'>+</div><div class='add'>+/* Macro's for second level of pmx - pads as primary OR alternate peripheral */</div><div class='add'>+/* Write 0 to enable FSMC_16_BIT */</div><div class='add'>+#define KBD_ROW_COL_MASK			(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable UART0_ENH */</div><div class='add'>+#define GPT_MASK				(1 &lt;&lt; 1) /* Only clk &amp; cpt */</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable PWM1 */</div><div class='add'>+#define KBD_COL5_MASK				(1 &lt;&lt; 2)</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable PWM2 */</div><div class='add'>+#define GPT0_TMR0_CPT_MASK			(1 &lt;&lt; 3) /* Only clk &amp; cpt */</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable PWM3 */</div><div class='add'>+#define GPT0_TMR1_CLK_MASK			(1 &lt;&lt; 4) /* Only clk &amp; cpt */</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable PWM0 */</div><div class='add'>+#define SSP0_CS1_MASK				(1 &lt;&lt; 5)</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable VIP */</div><div class='add'>+#define CAM3_MASK				(1 &lt;&lt; 6)</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable VIP */</div><div class='add'>+#define CAM2_MASK				(1 &lt;&lt; 7)</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable VIP */</div><div class='add'>+#define CAM1_MASK				(1 &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable VIP */</div><div class='add'>+#define CAM0_MASK				(1 &lt;&lt; 9)</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable TS */</div><div class='add'>+#define SSP0_CS2_MASK				(1 &lt;&lt; 10)</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable FSMC PNOR */</div><div class='add'>+#define MCIF_MASK				(1 &lt;&lt; 11)</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable CLCD */</div><div class='add'>+#define ARM_TRACE_MASK				(1 &lt;&lt; 12)</div><div class='add'>+</div><div class='add'>+/* Write 0 to enable I2S, SSP0_CS2, CEC0, 1, SPDIF out, CLCD */</div><div class='add'>+#define MIPHY_DBG_MASK				(1 &lt;&lt; 13)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Pad multiplexing for making all pads as gpio's. This is done to override the</div><div class='add'>+ * values passed from bootloader and start from scratch.</div><div class='add'>+ */</div><div class='add'>+static const unsigned pads_as_gpio_pins[] = { 251 };</div><div class='add'>+static struct spear_muxreg pads_as_gpio_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PADS_AS_GPIO_REG0_MASK,</div><div class='add'>+		.val = 0x0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = PADS_AS_GPIO_REGS_MASK,</div><div class='add'>+		.val = 0x0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_3,</div><div class='add'>+		.mask = PADS_AS_GPIO_REGS_MASK,</div><div class='add'>+		.val = 0x0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_4,</div><div class='add'>+		.mask = PADS_AS_GPIO_REGS_MASK,</div><div class='add'>+		.val = 0x0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_5,</div><div class='add'>+		.mask = PADS_AS_GPIO_REGS_MASK,</div><div class='add'>+		.val = 0x0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_6,</div><div class='add'>+		.mask = PADS_AS_GPIO_REGS_MASK,</div><div class='add'>+		.val = 0x0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_7,</div><div class='add'>+		.mask = PADS_AS_GPIO_REGS_MASK,</div><div class='add'>+		.val = 0x0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_8,</div><div class='add'>+		.mask = PADS_AS_GPIO_REG7_MASK,</div><div class='add'>+		.val = 0x0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pads_as_gpio_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = pads_as_gpio_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pads_as_gpio_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup pads_as_gpio_pingroup = {</div><div class='add'>+	.name = "pads_as_gpio_grp",</div><div class='add'>+	.pins = pads_as_gpio_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(pads_as_gpio_pins),</div><div class='add'>+	.modemuxs = pads_as_gpio_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(pads_as_gpio_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const pads_as_gpio_grps[] = { "pads_as_gpio_grp" };</div><div class='add'>+static struct spear_function pads_as_gpio_function = {</div><div class='add'>+	.name = "pads_as_gpio",</div><div class='add'>+	.groups = pads_as_gpio_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(pads_as_gpio_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for fsmc_8bit device */</div><div class='add'>+static const unsigned fsmc_8bit_pins[] = { 233, 234, 235, 236, 238, 239, 240,</div><div class='add'>+	241, 242, 243, 244, 245, 246, 247, 248, 249 };</div><div class='add'>+static struct spear_muxreg fsmc_8bit_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_8,</div><div class='add'>+		.mask = FSMC_8BIT_REG7_MASK,</div><div class='add'>+		.val = FSMC_8BIT_REG7_MASK,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux fsmc_8bit_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = fsmc_8bit_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(fsmc_8bit_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup fsmc_8bit_pingroup = {</div><div class='add'>+	.name = "fsmc_8bit_grp",</div><div class='add'>+	.pins = fsmc_8bit_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(fsmc_8bit_pins),</div><div class='add'>+	.modemuxs = fsmc_8bit_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(fsmc_8bit_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for fsmc_16bit device */</div><div class='add'>+static const unsigned fsmc_16bit_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 };</div><div class='add'>+static struct spear_muxreg fsmc_16bit_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = KBD_ROW_COL_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = FSMC_16_BIT_AND_KBD_ROW_COL_REG0_MASK,</div><div class='add'>+		.val = FSMC_16_BIT_AND_KBD_ROW_COL_REG0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux fsmc_16bit_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = fsmc_16bit_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(fsmc_16bit_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup fsmc_16bit_pingroup = {</div><div class='add'>+	.name = "fsmc_16bit_grp",</div><div class='add'>+	.pins = fsmc_16bit_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(fsmc_16bit_pins),</div><div class='add'>+	.modemuxs = fsmc_16bit_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(fsmc_16bit_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for fsmc_pnor device */</div><div class='add'>+static const unsigned fsmc_pnor_pins[] = { 192, 193, 194, 195, 196, 197, 198,</div><div class='add'>+	199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212,</div><div class='add'>+	215, 216, 217 };</div><div class='add'>+static struct spear_muxreg fsmc_pnor_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = MCIF_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_7,</div><div class='add'>+		.mask = FSMC_PNOR_AND_MCIF_REG6_MASK,</div><div class='add'>+		.val = FSMC_PNOR_AND_MCIF_REG6_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux fsmc_pnor_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = fsmc_pnor_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(fsmc_pnor_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup fsmc_pnor_pingroup = {</div><div class='add'>+	.name = "fsmc_pnor_grp",</div><div class='add'>+	.pins = fsmc_pnor_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(fsmc_pnor_pins),</div><div class='add'>+	.modemuxs = fsmc_pnor_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(fsmc_pnor_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const fsmc_grps[] = { "fsmc_8bit_grp", "fsmc_16bit_grp",</div><div class='add'>+	"fsmc_pnor_grp" };</div><div class='add'>+static struct spear_function fsmc_function = {</div><div class='add'>+	.name = "fsmc",</div><div class='add'>+	.groups = fsmc_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(fsmc_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for keyboard rows-cols device */</div><div class='add'>+static const unsigned keyboard_row_col_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,</div><div class='add'>+	10 };</div><div class='add'>+static struct spear_muxreg keyboard_row_col_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = KBD_ROW_COL_MASK,</div><div class='add'>+		.val = KBD_ROW_COL_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = FSMC_16_BIT_AND_KBD_ROW_COL_REG0_MASK,</div><div class='add'>+		.val = FSMC_16_BIT_AND_KBD_ROW_COL_REG0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux keyboard_row_col_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = keyboard_row_col_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(keyboard_row_col_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup keyboard_row_col_pingroup = {</div><div class='add'>+	.name = "keyboard_row_col_grp",</div><div class='add'>+	.pins = keyboard_row_col_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(keyboard_row_col_pins),</div><div class='add'>+	.modemuxs = keyboard_row_col_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(keyboard_row_col_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for keyboard col5 device */</div><div class='add'>+static const unsigned keyboard_col5_pins[] = { 17 };</div><div class='add'>+static struct spear_muxreg keyboard_col5_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = KBD_COL5_MASK,</div><div class='add'>+		.val = KBD_COL5_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PWM1_AND_KBD_COL5_REG0_MASK,</div><div class='add'>+		.val = PWM1_AND_KBD_COL5_REG0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux keyboard_col5_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = keyboard_col5_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(keyboard_col5_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup keyboard_col5_pingroup = {</div><div class='add'>+	.name = "keyboard_col5_grp",</div><div class='add'>+	.pins = keyboard_col5_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(keyboard_col5_pins),</div><div class='add'>+	.modemuxs = keyboard_col5_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(keyboard_col5_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const keyboard_grps[] = { "keyboard_row_col_grp",</div><div class='add'>+	"keyboard_col5_grp" };</div><div class='add'>+static struct spear_function keyboard_function = {</div><div class='add'>+	.name = "keyboard",</div><div class='add'>+	.groups = keyboard_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(keyboard_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for spdif_in device */</div><div class='add'>+static const unsigned spdif_in_pins[] = { 19 };</div><div class='add'>+static struct spear_muxreg spdif_in_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = SPDIF_IN_REG0_MASK,</div><div class='add'>+		.val = SPDIF_IN_REG0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux spdif_in_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = spdif_in_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(spdif_in_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup spdif_in_pingroup = {</div><div class='add'>+	.name = "spdif_in_grp",</div><div class='add'>+	.pins = spdif_in_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(spdif_in_pins),</div><div class='add'>+	.modemuxs = spdif_in_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(spdif_in_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const spdif_in_grps[] = { "spdif_in_grp" };</div><div class='add'>+static struct spear_function spdif_in_function = {</div><div class='add'>+	.name = "spdif_in",</div><div class='add'>+	.groups = spdif_in_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(spdif_in_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for spdif_out device */</div><div class='add'>+static const unsigned spdif_out_pins[] = { 137 };</div><div class='add'>+static struct spear_muxreg spdif_out_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_5,</div><div class='add'>+		.mask = SPDIF_OUT_REG4_MASK,</div><div class='add'>+		.val = SPDIF_OUT_REG4_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PERIP_CFG,</div><div class='add'>+		.mask = SPDIF_OUT_ENB_MASK,</div><div class='add'>+		.val = SPDIF_OUT_ENB_MASK,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux spdif_out_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = spdif_out_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(spdif_out_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup spdif_out_pingroup = {</div><div class='add'>+	.name = "spdif_out_grp",</div><div class='add'>+	.pins = spdif_out_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(spdif_out_pins),</div><div class='add'>+	.modemuxs = spdif_out_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(spdif_out_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const spdif_out_grps[] = { "spdif_out_grp" };</div><div class='add'>+static struct spear_function spdif_out_function = {</div><div class='add'>+	.name = "spdif_out",</div><div class='add'>+	.groups = spdif_out_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(spdif_out_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for gpt_0_1 device */</div><div class='add'>+static const unsigned gpt_0_1_pins[] = { 11, 12, 13, 14, 15, 16, 21, 22 };</div><div class='add'>+static struct spear_muxreg gpt_0_1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = GPT_MASK | GPT0_TMR0_CPT_MASK | GPT0_TMR1_CLK_MASK,</div><div class='add'>+		.val = GPT_MASK | GPT0_TMR0_CPT_MASK | GPT0_TMR1_CLK_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = UART0_ENH_AND_GPT_REG0_MASK |</div><div class='add'>+			PWM2_AND_GPT0_TMR0_CPT_REG0_MASK |</div><div class='add'>+			PWM3_AND_GPT0_TMR1_CLK_REG0_MASK,</div><div class='add'>+		.val = UART0_ENH_AND_GPT_REG0_MASK |</div><div class='add'>+			PWM2_AND_GPT0_TMR0_CPT_REG0_MASK |</div><div class='add'>+			PWM3_AND_GPT0_TMR1_CLK_REG0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpt_0_1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = gpt_0_1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpt_0_1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup gpt_0_1_pingroup = {</div><div class='add'>+	.name = "gpt_0_1_grp",</div><div class='add'>+	.pins = gpt_0_1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpt_0_1_pins),</div><div class='add'>+	.modemuxs = gpt_0_1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpt_0_1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const gpt_0_1_grps[] = { "gpt_0_1_grp" };</div><div class='add'>+static struct spear_function gpt_0_1_function = {</div><div class='add'>+	.name = "gpt_0_1",</div><div class='add'>+	.groups = gpt_0_1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(gpt_0_1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for pwm0 device */</div><div class='add'>+static const unsigned pwm0_pins[] = { 24 };</div><div class='add'>+static struct spear_muxreg pwm0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = SSP0_CS1_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PWM0_AND_SSP0_CS1_REG0_MASK,</div><div class='add'>+		.val = PWM0_AND_SSP0_CS1_REG0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = pwm0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup pwm0_pingroup = {</div><div class='add'>+	.name = "pwm0_grp",</div><div class='add'>+	.pins = pwm0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(pwm0_pins),</div><div class='add'>+	.modemuxs = pwm0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(pwm0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for pwm1 device */</div><div class='add'>+static const unsigned pwm1_pins[] = { 17 };</div><div class='add'>+static struct spear_muxreg pwm1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = KBD_COL5_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PWM1_AND_KBD_COL5_REG0_MASK,</div><div class='add'>+		.val = PWM1_AND_KBD_COL5_REG0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = pwm1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup pwm1_pingroup = {</div><div class='add'>+	.name = "pwm1_grp",</div><div class='add'>+	.pins = pwm1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(pwm1_pins),</div><div class='add'>+	.modemuxs = pwm1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(pwm1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for pwm2 device */</div><div class='add'>+static const unsigned pwm2_pins[] = { 21 };</div><div class='add'>+static struct spear_muxreg pwm2_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = GPT0_TMR0_CPT_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PWM2_AND_GPT0_TMR0_CPT_REG0_MASK,</div><div class='add'>+		.val = PWM2_AND_GPT0_TMR0_CPT_REG0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = pwm2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm2_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup pwm2_pingroup = {</div><div class='add'>+	.name = "pwm2_grp",</div><div class='add'>+	.pins = pwm2_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(pwm2_pins),</div><div class='add'>+	.modemuxs = pwm2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(pwm2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for pwm3 device */</div><div class='add'>+static const unsigned pwm3_pins[] = { 22 };</div><div class='add'>+static struct spear_muxreg pwm3_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = GPT0_TMR1_CLK_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PWM3_AND_GPT0_TMR1_CLK_REG0_MASK,</div><div class='add'>+		.val = PWM3_AND_GPT0_TMR1_CLK_REG0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm3_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = pwm3_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm3_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup pwm3_pingroup = {</div><div class='add'>+	.name = "pwm3_grp",</div><div class='add'>+	.pins = pwm3_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(pwm3_pins),</div><div class='add'>+	.modemuxs = pwm3_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(pwm3_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const pwm_grps[] = { "pwm0_grp", "pwm1_grp", "pwm2_grp",</div><div class='add'>+	"pwm3_grp" };</div><div class='add'>+static struct spear_function pwm_function = {</div><div class='add'>+	.name = "pwm",</div><div class='add'>+	.groups = pwm_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(pwm_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for vip_mux device */</div><div class='add'>+static const unsigned vip_mux_pins[] = { 35, 36, 37, 38, 40, 41, 42, 43 };</div><div class='add'>+static struct spear_muxreg vip_mux_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = VIP_REG1_MASK,</div><div class='add'>+		.val = VIP_REG1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux vip_mux_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = vip_mux_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(vip_mux_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup vip_mux_pingroup = {</div><div class='add'>+	.name = "vip_mux_grp",</div><div class='add'>+	.pins = vip_mux_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(vip_mux_pins),</div><div class='add'>+	.modemuxs = vip_mux_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(vip_mux_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for vip_mux_cam0 (disables cam0) device */</div><div class='add'>+static const unsigned vip_mux_cam0_pins[] = { 65, 66, 67, 68, 69, 70, 71, 72,</div><div class='add'>+	73, 74, 75 };</div><div class='add'>+static struct spear_muxreg vip_mux_cam0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = CAM0_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_3,</div><div class='add'>+		.mask = VIP_AND_CAM0_REG2_MASK,</div><div class='add'>+		.val = VIP_AND_CAM0_REG2_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux vip_mux_cam0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = vip_mux_cam0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(vip_mux_cam0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup vip_mux_cam0_pingroup = {</div><div class='add'>+	.name = "vip_mux_cam0_grp",</div><div class='add'>+	.pins = vip_mux_cam0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(vip_mux_cam0_pins),</div><div class='add'>+	.modemuxs = vip_mux_cam0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(vip_mux_cam0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for vip_mux_cam1 (disables cam1) device */</div><div class='add'>+static const unsigned vip_mux_cam1_pins[] = { 54, 55, 56, 57, 58, 59, 60, 61,</div><div class='add'>+	62, 63, 64 };</div><div class='add'>+static struct spear_muxreg vip_mux_cam1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = CAM1_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = VIP_AND_CAM1_REG1_MASK,</div><div class='add'>+		.val = VIP_AND_CAM1_REG1_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_3,</div><div class='add'>+		.mask = VIP_AND_CAM1_REG2_MASK,</div><div class='add'>+		.val = VIP_AND_CAM1_REG2_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux vip_mux_cam1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = vip_mux_cam1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(vip_mux_cam1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup vip_mux_cam1_pingroup = {</div><div class='add'>+	.name = "vip_mux_cam1_grp",</div><div class='add'>+	.pins = vip_mux_cam1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(vip_mux_cam1_pins),</div><div class='add'>+	.modemuxs = vip_mux_cam1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(vip_mux_cam1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for vip_mux_cam2 (disables cam2) device */</div><div class='add'>+static const unsigned vip_mux_cam2_pins[] = { 39, 44, 45, 46, 47, 48, 49, 50,</div><div class='add'>+	51, 52, 53 };</div><div class='add'>+static struct spear_muxreg vip_mux_cam2_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = CAM2_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = VIP_AND_CAM2_REG1_MASK,</div><div class='add'>+		.val = VIP_AND_CAM2_REG1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux vip_mux_cam2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = vip_mux_cam2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(vip_mux_cam2_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup vip_mux_cam2_pingroup = {</div><div class='add'>+	.name = "vip_mux_cam2_grp",</div><div class='add'>+	.pins = vip_mux_cam2_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(vip_mux_cam2_pins),</div><div class='add'>+	.modemuxs = vip_mux_cam2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(vip_mux_cam2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for vip_mux_cam3 (disables cam3) device */</div><div class='add'>+static const unsigned vip_mux_cam3_pins[] = { 20, 25, 26, 27, 28, 29, 30, 31,</div><div class='add'>+	32, 33, 34 };</div><div class='add'>+static struct spear_muxreg vip_mux_cam3_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = CAM3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = VIP_AND_CAM3_REG0_MASK,</div><div class='add'>+		.val = VIP_AND_CAM3_REG0_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = VIP_AND_CAM3_REG1_MASK,</div><div class='add'>+		.val = VIP_AND_CAM3_REG1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux vip_mux_cam3_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = vip_mux_cam3_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(vip_mux_cam3_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup vip_mux_cam3_pingroup = {</div><div class='add'>+	.name = "vip_mux_cam3_grp",</div><div class='add'>+	.pins = vip_mux_cam3_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(vip_mux_cam3_pins),</div><div class='add'>+	.modemuxs = vip_mux_cam3_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(vip_mux_cam3_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const vip_grps[] = { "vip_mux_grp", "vip_mux_cam0_grp" ,</div><div class='add'>+	"vip_mux_cam1_grp" , "vip_mux_cam2_grp", "vip_mux_cam3_grp" };</div><div class='add'>+static struct spear_function vip_function = {</div><div class='add'>+	.name = "vip",</div><div class='add'>+	.groups = vip_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(vip_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for cam0 device */</div><div class='add'>+static const unsigned cam0_pins[] = { 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75</div><div class='add'>+};</div><div class='add'>+static struct spear_muxreg cam0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = CAM0_MASK,</div><div class='add'>+		.val = CAM0_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_3,</div><div class='add'>+		.mask = VIP_AND_CAM0_REG2_MASK,</div><div class='add'>+		.val = VIP_AND_CAM0_REG2_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux cam0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = cam0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(cam0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup cam0_pingroup = {</div><div class='add'>+	.name = "cam0_grp",</div><div class='add'>+	.pins = cam0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(cam0_pins),</div><div class='add'>+	.modemuxs = cam0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(cam0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const cam0_grps[] = { "cam0_grp" };</div><div class='add'>+static struct spear_function cam0_function = {</div><div class='add'>+	.name = "cam0",</div><div class='add'>+	.groups = cam0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(cam0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for cam1 device */</div><div class='add'>+static const unsigned cam1_pins[] = { 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64</div><div class='add'>+};</div><div class='add'>+static struct spear_muxreg cam1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = CAM1_MASK,</div><div class='add'>+		.val = CAM1_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = VIP_AND_CAM1_REG1_MASK,</div><div class='add'>+		.val = VIP_AND_CAM1_REG1_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_3,</div><div class='add'>+		.mask = VIP_AND_CAM1_REG2_MASK,</div><div class='add'>+		.val = VIP_AND_CAM1_REG2_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux cam1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = cam1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(cam1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup cam1_pingroup = {</div><div class='add'>+	.name = "cam1_grp",</div><div class='add'>+	.pins = cam1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(cam1_pins),</div><div class='add'>+	.modemuxs = cam1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(cam1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const cam1_grps[] = { "cam1_grp" };</div><div class='add'>+static struct spear_function cam1_function = {</div><div class='add'>+	.name = "cam1",</div><div class='add'>+	.groups = cam1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(cam1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for cam2 device */</div><div class='add'>+static const unsigned cam2_pins[] = { 39, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53</div><div class='add'>+};</div><div class='add'>+static struct spear_muxreg cam2_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = CAM2_MASK,</div><div class='add'>+		.val = CAM2_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = VIP_AND_CAM2_REG1_MASK,</div><div class='add'>+		.val = VIP_AND_CAM2_REG1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux cam2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = cam2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(cam2_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup cam2_pingroup = {</div><div class='add'>+	.name = "cam2_grp",</div><div class='add'>+	.pins = cam2_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(cam2_pins),</div><div class='add'>+	.modemuxs = cam2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(cam2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const cam2_grps[] = { "cam2_grp" };</div><div class='add'>+static struct spear_function cam2_function = {</div><div class='add'>+	.name = "cam2",</div><div class='add'>+	.groups = cam2_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(cam2_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for cam3 device */</div><div class='add'>+static const unsigned cam3_pins[] = { 20, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34</div><div class='add'>+};</div><div class='add'>+static struct spear_muxreg cam3_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = CAM3_MASK,</div><div class='add'>+		.val = CAM3_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = VIP_AND_CAM3_REG0_MASK,</div><div class='add'>+		.val = VIP_AND_CAM3_REG0_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_2,</div><div class='add'>+		.mask = VIP_AND_CAM3_REG1_MASK,</div><div class='add'>+		.val = VIP_AND_CAM3_REG1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux cam3_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = cam3_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(cam3_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup cam3_pingroup = {</div><div class='add'>+	.name = "cam3_grp",</div><div class='add'>+	.pins = cam3_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(cam3_pins),</div><div class='add'>+	.modemuxs = cam3_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(cam3_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const cam3_grps[] = { "cam3_grp" };</div><div class='add'>+static struct spear_function cam3_function = {</div><div class='add'>+	.name = "cam3",</div><div class='add'>+	.groups = cam3_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(cam3_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for smi device */</div><div class='add'>+static const unsigned smi_pins[] = { 76, 77, 78, 79, 84 };</div><div class='add'>+static struct spear_muxreg smi_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_3,</div><div class='add'>+		.mask = SMI_REG2_MASK,</div><div class='add'>+		.val = SMI_REG2_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux smi_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = smi_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(smi_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup smi_pingroup = {</div><div class='add'>+	.name = "smi_grp",</div><div class='add'>+	.pins = smi_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(smi_pins),</div><div class='add'>+	.modemuxs = smi_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(smi_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const smi_grps[] = { "smi_grp" };</div><div class='add'>+static struct spear_function smi_function = {</div><div class='add'>+	.name = "smi",</div><div class='add'>+	.groups = smi_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(smi_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for ssp0 device */</div><div class='add'>+static const unsigned ssp0_pins[] = { 80, 81, 82, 83 };</div><div class='add'>+static struct spear_muxreg ssp0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_3,</div><div class='add'>+		.mask = SSP0_REG2_MASK,</div><div class='add'>+		.val = SSP0_REG2_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = ssp0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup ssp0_pingroup = {</div><div class='add'>+	.name = "ssp0_grp",</div><div class='add'>+	.pins = ssp0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(ssp0_pins),</div><div class='add'>+	.modemuxs = ssp0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(ssp0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for ssp0_cs1 device */</div><div class='add'>+static const unsigned ssp0_cs1_pins[] = { 24 };</div><div class='add'>+static struct spear_muxreg ssp0_cs1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = SSP0_CS1_MASK,</div><div class='add'>+		.val = SSP0_CS1_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = PWM0_AND_SSP0_CS1_REG0_MASK,</div><div class='add'>+		.val = PWM0_AND_SSP0_CS1_REG0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp0_cs1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = ssp0_cs1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp0_cs1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup ssp0_cs1_pingroup = {</div><div class='add'>+	.name = "ssp0_cs1_grp",</div><div class='add'>+	.pins = ssp0_cs1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(ssp0_cs1_pins),</div><div class='add'>+	.modemuxs = ssp0_cs1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(ssp0_cs1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for ssp0_cs2 device */</div><div class='add'>+static const unsigned ssp0_cs2_pins[] = { 85 };</div><div class='add'>+static struct spear_muxreg ssp0_cs2_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = SSP0_CS2_MASK,</div><div class='add'>+		.val = SSP0_CS2_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_3,</div><div class='add'>+		.mask = TS_AND_SSP0_CS2_REG2_MASK,</div><div class='add'>+		.val = TS_AND_SSP0_CS2_REG2_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp0_cs2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = ssp0_cs2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp0_cs2_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup ssp0_cs2_pingroup = {</div><div class='add'>+	.name = "ssp0_cs2_grp",</div><div class='add'>+	.pins = ssp0_cs2_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(ssp0_cs2_pins),</div><div class='add'>+	.modemuxs = ssp0_cs2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(ssp0_cs2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for ssp0_cs3 device */</div><div class='add'>+static const unsigned ssp0_cs3_pins[] = { 132 };</div><div class='add'>+static struct spear_muxreg ssp0_cs3_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_5,</div><div class='add'>+		.mask = SSP0_CS3_REG4_MASK,</div><div class='add'>+		.val = SSP0_CS3_REG4_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp0_cs3_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = ssp0_cs3_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp0_cs3_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup ssp0_cs3_pingroup = {</div><div class='add'>+	.name = "ssp0_cs3_grp",</div><div class='add'>+	.pins = ssp0_cs3_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(ssp0_cs3_pins),</div><div class='add'>+	.modemuxs = ssp0_cs3_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(ssp0_cs3_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const ssp0_grps[] = { "ssp0_grp", "ssp0_cs1_grp",</div><div class='add'>+	"ssp0_cs2_grp", "ssp0_cs3_grp" };</div><div class='add'>+static struct spear_function ssp0_function = {</div><div class='add'>+	.name = "ssp0",</div><div class='add'>+	.groups = ssp0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(ssp0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for uart0 device */</div><div class='add'>+static const unsigned uart0_pins[] = { 86, 87 };</div><div class='add'>+static struct spear_muxreg uart0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_3,</div><div class='add'>+		.mask = UART0_REG2_MASK,</div><div class='add'>+		.val = UART0_REG2_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart0_pingroup = {</div><div class='add'>+	.name = "uart0_grp",</div><div class='add'>+	.pins = uart0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart0_pins),</div><div class='add'>+	.modemuxs = uart0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for uart0_enh device */</div><div class='add'>+static const unsigned uart0_enh_pins[] = { 11, 12, 13, 14, 15, 16 };</div><div class='add'>+static struct spear_muxreg uart0_enh_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = GPT_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = UART0_ENH_AND_GPT_REG0_MASK,</div><div class='add'>+		.val = UART0_ENH_AND_GPT_REG0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart0_enh_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart0_enh_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart0_enh_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart0_enh_pingroup = {</div><div class='add'>+	.name = "uart0_enh_grp",</div><div class='add'>+	.pins = uart0_enh_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart0_enh_pins),</div><div class='add'>+	.modemuxs = uart0_enh_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart0_enh_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart0_grps[] = { "uart0_grp", "uart0_enh_grp" };</div><div class='add'>+static struct spear_function uart0_function = {</div><div class='add'>+	.name = "uart0",</div><div class='add'>+	.groups = uart0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for uart1 device */</div><div class='add'>+static const unsigned uart1_pins[] = { 88, 89 };</div><div class='add'>+static struct spear_muxreg uart1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_3,</div><div class='add'>+		.mask = UART1_REG2_MASK,</div><div class='add'>+		.val = UART1_REG2_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart1_pingroup = {</div><div class='add'>+	.name = "uart1_grp",</div><div class='add'>+	.pins = uart1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart1_pins),</div><div class='add'>+	.modemuxs = uart1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart1_grps[] = { "uart1_grp" };</div><div class='add'>+static struct spear_function uart1_function = {</div><div class='add'>+	.name = "uart1",</div><div class='add'>+	.groups = uart1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for i2s_in device */</div><div class='add'>+static const unsigned i2s_in_pins[] = { 90, 91, 92, 93, 94, 99 };</div><div class='add'>+static struct spear_muxreg i2s_in_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_3,</div><div class='add'>+		.mask = I2S_IN_REG2_MASK,</div><div class='add'>+		.val = I2S_IN_REG2_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_4,</div><div class='add'>+		.mask = I2S_IN_REG3_MASK,</div><div class='add'>+		.val = I2S_IN_REG3_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2s_in_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2s_in_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2s_in_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2s_in_pingroup = {</div><div class='add'>+	.name = "i2s_in_grp",</div><div class='add'>+	.pins = i2s_in_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2s_in_pins),</div><div class='add'>+	.modemuxs = i2s_in_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2s_in_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for i2s_out device */</div><div class='add'>+static const unsigned i2s_out_pins[] = { 95, 96, 97, 98, 100, 101, 102, 103 };</div><div class='add'>+static struct spear_muxreg i2s_out_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_4,</div><div class='add'>+		.mask = I2S_OUT_REG3_MASK,</div><div class='add'>+		.val = I2S_OUT_REG3_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2s_out_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2s_out_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2s_out_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2s_out_pingroup = {</div><div class='add'>+	.name = "i2s_out_grp",</div><div class='add'>+	.pins = i2s_out_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2s_out_pins),</div><div class='add'>+	.modemuxs = i2s_out_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2s_out_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2s_grps[] = { "i2s_in_grp", "i2s_out_grp" };</div><div class='add'>+static struct spear_function i2s_function = {</div><div class='add'>+	.name = "i2s",</div><div class='add'>+	.groups = i2s_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2s_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for gmac device */</div><div class='add'>+static const unsigned gmac_pins[] = { 104, 105, 106, 107, 108, 109, 110, 111,</div><div class='add'>+	112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125,</div><div class='add'>+	126, 127, 128, 129, 130, 131 };</div><div class='add'>+#define GMAC_MUXREG				\</div><div class='add'>+	{					\</div><div class='add'>+		.reg = PAD_FUNCTION_EN_4,	\</div><div class='add'>+		.mask = GMAC_REG3_MASK,		\</div><div class='add'>+		.val = GMAC_REG3_MASK,		\</div><div class='add'>+	}, {					\</div><div class='add'>+		.reg = PAD_FUNCTION_EN_5,	\</div><div class='add'>+		.mask = GMAC_REG4_MASK,		\</div><div class='add'>+		.val = GMAC_REG4_MASK,		\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for gmii device */</div><div class='add'>+static struct spear_muxreg gmii_muxreg[] = {</div><div class='add'>+	GMAC_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = GMAC_CLK_CFG,</div><div class='add'>+		.mask = GMAC_PHY_IF_SEL_MASK,</div><div class='add'>+		.val = GMAC_PHY_IF_GMII_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gmii_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = gmii_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gmii_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup gmii_pingroup = {</div><div class='add'>+	.name = "gmii_grp",</div><div class='add'>+	.pins = gmac_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gmac_pins),</div><div class='add'>+	.modemuxs = gmii_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gmii_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for rgmii device */</div><div class='add'>+static struct spear_muxreg rgmii_muxreg[] = {</div><div class='add'>+	GMAC_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = GMAC_CLK_CFG,</div><div class='add'>+		.mask = GMAC_PHY_IF_SEL_MASK,</div><div class='add'>+		.val = GMAC_PHY_IF_RGMII_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux rgmii_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = rgmii_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(rgmii_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup rgmii_pingroup = {</div><div class='add'>+	.name = "rgmii_grp",</div><div class='add'>+	.pins = gmac_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gmac_pins),</div><div class='add'>+	.modemuxs = rgmii_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(rgmii_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for rmii device */</div><div class='add'>+static struct spear_muxreg rmii_muxreg[] = {</div><div class='add'>+	GMAC_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = GMAC_CLK_CFG,</div><div class='add'>+		.mask = GMAC_PHY_IF_SEL_MASK,</div><div class='add'>+		.val = GMAC_PHY_IF_RMII_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux rmii_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = rmii_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(rmii_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup rmii_pingroup = {</div><div class='add'>+	.name = "rmii_grp",</div><div class='add'>+	.pins = gmac_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gmac_pins),</div><div class='add'>+	.modemuxs = rmii_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(rmii_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for sgmii device */</div><div class='add'>+static struct spear_muxreg sgmii_muxreg[] = {</div><div class='add'>+	GMAC_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = GMAC_CLK_CFG,</div><div class='add'>+		.mask = GMAC_PHY_IF_SEL_MASK,</div><div class='add'>+		.val = GMAC_PHY_IF_SGMII_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux sgmii_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = sgmii_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sgmii_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup sgmii_pingroup = {</div><div class='add'>+	.name = "sgmii_grp",</div><div class='add'>+	.pins = gmac_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gmac_pins),</div><div class='add'>+	.modemuxs = sgmii_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(sgmii_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const gmac_grps[] = { "gmii_grp", "rgmii_grp", "rmii_grp",</div><div class='add'>+	"sgmii_grp" };</div><div class='add'>+static struct spear_function gmac_function = {</div><div class='add'>+	.name = "gmac",</div><div class='add'>+	.groups = gmac_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(gmac_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for i2c0 device */</div><div class='add'>+static const unsigned i2c0_pins[] = { 133, 134 };</div><div class='add'>+static struct spear_muxreg i2c0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_5,</div><div class='add'>+		.mask = I2C0_REG4_MASK,</div><div class='add'>+		.val = I2C0_REG4_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2c0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c0_pingroup = {</div><div class='add'>+	.name = "i2c0_grp",</div><div class='add'>+	.pins = i2c0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c0_pins),</div><div class='add'>+	.modemuxs = i2c0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2c0_grps[] = { "i2c0_grp" };</div><div class='add'>+static struct spear_function i2c0_function = {</div><div class='add'>+	.name = "i2c0",</div><div class='add'>+	.groups = i2c0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2c0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for i2c1 device */</div><div class='add'>+static const unsigned i2c1_pins[] = { 18, 23 };</div><div class='add'>+static struct spear_muxreg i2c1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_1,</div><div class='add'>+		.mask = I2C1_REG0_MASK,</div><div class='add'>+		.val = I2C1_REG0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = i2c1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c1_pingroup = {</div><div class='add'>+	.name = "i2c1_grp",</div><div class='add'>+	.pins = i2c1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c1_pins),</div><div class='add'>+	.modemuxs = i2c1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2c1_grps[] = { "i2c1_grp" };</div><div class='add'>+static struct spear_function i2c1_function = {</div><div class='add'>+	.name = "i2c1",</div><div class='add'>+	.groups = i2c1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2c1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for cec0 device */</div><div class='add'>+static const unsigned cec0_pins[] = { 135 };</div><div class='add'>+static struct spear_muxreg cec0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_5,</div><div class='add'>+		.mask = CEC0_REG4_MASK,</div><div class='add'>+		.val = CEC0_REG4_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux cec0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = cec0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(cec0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup cec0_pingroup = {</div><div class='add'>+	.name = "cec0_grp",</div><div class='add'>+	.pins = cec0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(cec0_pins),</div><div class='add'>+	.modemuxs = cec0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(cec0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const cec0_grps[] = { "cec0_grp" };</div><div class='add'>+static struct spear_function cec0_function = {</div><div class='add'>+	.name = "cec0",</div><div class='add'>+	.groups = cec0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(cec0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for cec1 device */</div><div class='add'>+static const unsigned cec1_pins[] = { 136 };</div><div class='add'>+static struct spear_muxreg cec1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_FUNCTION_EN_5,</div><div class='add'>+		.mask = CEC1_REG4_MASK,</div><div class='add'>+		.val = CEC1_REG4_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux cec1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = cec1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(cec1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup cec1_pingroup = {</div><div class='add'>+	.name = "cec1_grp",</div><div class='add'>+	.pins = cec1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(cec1_pins),</div><div class='add'>+	.modemuxs = cec1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(cec1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const cec1_grps[] = { "cec1_grp" };</div><div class='add'>+static struct spear_function cec1_function = {</div><div class='add'>+	.name = "cec1",</div><div class='add'>+	.groups = cec1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(cec1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for mcif devices */</div><div class='add'>+static const unsigned mcif_pins[] = { 193, 194, 195, 196, 197, 198, 199, 200,</div><div class='add'>+	201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212, 213, 214,</div><div class='add'>+	215, 216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228,</div><div class='add'>+	229, 230, 231, 232, 237 };</div><div class='add'>+#define MCIF_MUXREG							\</div><div class='add'>+	{								\</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,				\</div><div class='add'>+		.mask = MCIF_MASK,					\</div><div class='add'>+		.val = MCIF_MASK,					\</div><div class='add'>+	}, {								\</div><div class='add'>+		.reg = PAD_FUNCTION_EN_7,				\</div><div class='add'>+		.mask = FSMC_PNOR_AND_MCIF_REG6_MASK | MCIF_REG6_MASK,	\</div><div class='add'>+		.val = FSMC_PNOR_AND_MCIF_REG6_MASK | MCIF_REG6_MASK,	\</div><div class='add'>+	}, {								\</div><div class='add'>+		.reg = PAD_FUNCTION_EN_8,				\</div><div class='add'>+		.mask = MCIF_REG7_MASK,					\</div><div class='add'>+		.val = MCIF_REG7_MASK,					\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for sdhci device */</div><div class='add'>+static struct spear_muxreg sdhci_muxreg[] = {</div><div class='add'>+	MCIF_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = PERIP_CFG,</div><div class='add'>+		.mask = MCIF_SEL_MASK,</div><div class='add'>+		.val = MCIF_SEL_SD,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux sdhci_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = sdhci_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sdhci_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup sdhci_pingroup = {</div><div class='add'>+	.name = "sdhci_grp",</div><div class='add'>+	.pins = mcif_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(mcif_pins),</div><div class='add'>+	.modemuxs = sdhci_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(sdhci_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const sdhci_grps[] = { "sdhci_grp" };</div><div class='add'>+static struct spear_function sdhci_function = {</div><div class='add'>+	.name = "sdhci",</div><div class='add'>+	.groups = sdhci_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(sdhci_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for cf device */</div><div class='add'>+static struct spear_muxreg cf_muxreg[] = {</div><div class='add'>+	MCIF_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = PERIP_CFG,</div><div class='add'>+		.mask = MCIF_SEL_MASK,</div><div class='add'>+		.val = MCIF_SEL_CF,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux cf_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = cf_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(cf_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup cf_pingroup = {</div><div class='add'>+	.name = "cf_grp",</div><div class='add'>+	.pins = mcif_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(mcif_pins),</div><div class='add'>+	.modemuxs = cf_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(cf_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const cf_grps[] = { "cf_grp" };</div><div class='add'>+static struct spear_function cf_function = {</div><div class='add'>+	.name = "cf",</div><div class='add'>+	.groups = cf_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(cf_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for xd device */</div><div class='add'>+static struct spear_muxreg xd_muxreg[] = {</div><div class='add'>+	MCIF_MUXREG,</div><div class='add'>+	{</div><div class='add'>+		.reg = PERIP_CFG,</div><div class='add'>+		.mask = MCIF_SEL_MASK,</div><div class='add'>+		.val = MCIF_SEL_XD,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux xd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = xd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(xd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup xd_pingroup = {</div><div class='add'>+	.name = "xd_grp",</div><div class='add'>+	.pins = mcif_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(mcif_pins),</div><div class='add'>+	.modemuxs = xd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(xd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const xd_grps[] = { "xd_grp" };</div><div class='add'>+static struct spear_function xd_function = {</div><div class='add'>+	.name = "xd",</div><div class='add'>+	.groups = xd_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(xd_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for clcd device */</div><div class='add'>+static const unsigned clcd_pins[] = { 138, 139, 140, 141, 142, 143, 144, 145,</div><div class='add'>+	146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,</div><div class='add'>+	160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173,</div><div class='add'>+	174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187,</div><div class='add'>+	188, 189, 190, 191 };</div><div class='add'>+static struct spear_muxreg clcd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = ARM_TRACE_MASK | MIPHY_DBG_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_5,</div><div class='add'>+		.mask = CLCD_REG4_MASK | CLCD_AND_ARM_TRACE_REG4_MASK,</div><div class='add'>+		.val = CLCD_REG4_MASK | CLCD_AND_ARM_TRACE_REG4_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_6,</div><div class='add'>+		.mask = CLCD_AND_ARM_TRACE_REG5_MASK,</div><div class='add'>+		.val = CLCD_AND_ARM_TRACE_REG5_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_7,</div><div class='add'>+		.mask = CLCD_AND_ARM_TRACE_REG6_MASK,</div><div class='add'>+		.val = CLCD_AND_ARM_TRACE_REG6_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux clcd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = clcd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(clcd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup clcd_pingroup = {</div><div class='add'>+	.name = "clcd_grp",</div><div class='add'>+	.pins = clcd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(clcd_pins),</div><div class='add'>+	.modemuxs = clcd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(clcd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const clcd_grps[] = { "clcd_grp" };</div><div class='add'>+static struct spear_function clcd_function = {</div><div class='add'>+	.name = "clcd",</div><div class='add'>+	.groups = clcd_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(clcd_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for arm_trace device */</div><div class='add'>+static const unsigned arm_trace_pins[] = { 158, 159, 160, 161, 162, 163, 164,</div><div class='add'>+	165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178,</div><div class='add'>+	179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192,</div><div class='add'>+	193, 194, 195, 196, 197, 198, 199, 200 };</div><div class='add'>+static struct spear_muxreg arm_trace_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = ARM_TRACE_MASK,</div><div class='add'>+		.val = ARM_TRACE_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_5,</div><div class='add'>+		.mask = CLCD_AND_ARM_TRACE_REG4_MASK,</div><div class='add'>+		.val = CLCD_AND_ARM_TRACE_REG4_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_6,</div><div class='add'>+		.mask = CLCD_AND_ARM_TRACE_REG5_MASK,</div><div class='add'>+		.val = CLCD_AND_ARM_TRACE_REG5_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_7,</div><div class='add'>+		.mask = CLCD_AND_ARM_TRACE_REG6_MASK,</div><div class='add'>+		.val = CLCD_AND_ARM_TRACE_REG6_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux arm_trace_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = arm_trace_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(arm_trace_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup arm_trace_pingroup = {</div><div class='add'>+	.name = "arm_trace_grp",</div><div class='add'>+	.pins = arm_trace_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(arm_trace_pins),</div><div class='add'>+	.modemuxs = arm_trace_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(arm_trace_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const arm_trace_grps[] = { "arm_trace_grp" };</div><div class='add'>+static struct spear_function arm_trace_function = {</div><div class='add'>+	.name = "arm_trace",</div><div class='add'>+	.groups = arm_trace_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(arm_trace_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for miphy_dbg device */</div><div class='add'>+static const unsigned miphy_dbg_pins[] = { 96, 97, 98, 99, 100, 101, 102, 103,</div><div class='add'>+	132, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147,</div><div class='add'>+	148, 149, 150, 151, 152, 153, 154, 155, 156, 157 };</div><div class='add'>+static struct spear_muxreg miphy_dbg_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PAD_SHARED_IP_EN_1,</div><div class='add'>+		.mask = MIPHY_DBG_MASK,</div><div class='add'>+		.val = MIPHY_DBG_MASK,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PAD_FUNCTION_EN_5,</div><div class='add'>+		.mask = DEVS_GRP_AND_MIPHY_DBG_REG4_MASK,</div><div class='add'>+		.val = DEVS_GRP_AND_MIPHY_DBG_REG4_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux miphy_dbg_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = miphy_dbg_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(miphy_dbg_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup miphy_dbg_pingroup = {</div><div class='add'>+	.name = "miphy_dbg_grp",</div><div class='add'>+	.pins = miphy_dbg_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(miphy_dbg_pins),</div><div class='add'>+	.modemuxs = miphy_dbg_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(miphy_dbg_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const miphy_dbg_grps[] = { "miphy_dbg_grp" };</div><div class='add'>+static struct spear_function miphy_dbg_function = {</div><div class='add'>+	.name = "miphy_dbg",</div><div class='add'>+	.groups = miphy_dbg_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(miphy_dbg_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for pcie device */</div><div class='add'>+static const unsigned pcie_pins[] = { 250 };</div><div class='add'>+static struct spear_muxreg pcie_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PCIE_SATA_CFG,</div><div class='add'>+		.mask = SATA_PCIE_CFG_MASK,</div><div class='add'>+		.val = PCIE_CFG_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pcie_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = pcie_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pcie_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup pcie_pingroup = {</div><div class='add'>+	.name = "pcie_grp",</div><div class='add'>+	.pins = pcie_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(pcie_pins),</div><div class='add'>+	.modemuxs = pcie_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(pcie_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const pcie_grps[] = { "pcie_grp" };</div><div class='add'>+static struct spear_function pcie_function = {</div><div class='add'>+	.name = "pcie",</div><div class='add'>+	.groups = pcie_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(pcie_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pad multiplexing for sata device */</div><div class='add'>+static const unsigned sata_pins[] = { 250 };</div><div class='add'>+static struct spear_muxreg sata_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PCIE_SATA_CFG,</div><div class='add'>+		.mask = SATA_PCIE_CFG_MASK,</div><div class='add'>+		.val = SATA_CFG_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux sata_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = sata_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sata_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup sata_pingroup = {</div><div class='add'>+	.name = "sata_grp",</div><div class='add'>+	.pins = sata_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(sata_pins),</div><div class='add'>+	.modemuxs = sata_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(sata_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const sata_grps[] = { "sata_grp" };</div><div class='add'>+static struct spear_function sata_function = {</div><div class='add'>+	.name = "sata",</div><div class='add'>+	.groups = sata_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(sata_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pingroups */</div><div class='add'>+static struct spear_pingroup *spear1340_pingroups[] = {</div><div class='add'>+	&amp;pads_as_gpio_pingroup,</div><div class='add'>+	&amp;fsmc_8bit_pingroup,</div><div class='add'>+	&amp;fsmc_16bit_pingroup,</div><div class='add'>+	&amp;fsmc_pnor_pingroup,</div><div class='add'>+	&amp;keyboard_row_col_pingroup,</div><div class='add'>+	&amp;keyboard_col5_pingroup,</div><div class='add'>+	&amp;spdif_in_pingroup,</div><div class='add'>+	&amp;spdif_out_pingroup,</div><div class='add'>+	&amp;gpt_0_1_pingroup,</div><div class='add'>+	&amp;pwm0_pingroup,</div><div class='add'>+	&amp;pwm1_pingroup,</div><div class='add'>+	&amp;pwm2_pingroup,</div><div class='add'>+	&amp;pwm3_pingroup,</div><div class='add'>+	&amp;vip_mux_pingroup,</div><div class='add'>+	&amp;vip_mux_cam0_pingroup,</div><div class='add'>+	&amp;vip_mux_cam1_pingroup,</div><div class='add'>+	&amp;vip_mux_cam2_pingroup,</div><div class='add'>+	&amp;vip_mux_cam3_pingroup,</div><div class='add'>+	&amp;cam0_pingroup,</div><div class='add'>+	&amp;cam1_pingroup,</div><div class='add'>+	&amp;cam2_pingroup,</div><div class='add'>+	&amp;cam3_pingroup,</div><div class='add'>+	&amp;smi_pingroup,</div><div class='add'>+	&amp;ssp0_pingroup,</div><div class='add'>+	&amp;ssp0_cs1_pingroup,</div><div class='add'>+	&amp;ssp0_cs2_pingroup,</div><div class='add'>+	&amp;ssp0_cs3_pingroup,</div><div class='add'>+	&amp;uart0_pingroup,</div><div class='add'>+	&amp;uart0_enh_pingroup,</div><div class='add'>+	&amp;uart1_pingroup,</div><div class='add'>+	&amp;i2s_in_pingroup,</div><div class='add'>+	&amp;i2s_out_pingroup,</div><div class='add'>+	&amp;gmii_pingroup,</div><div class='add'>+	&amp;rgmii_pingroup,</div><div class='add'>+	&amp;rmii_pingroup,</div><div class='add'>+	&amp;sgmii_pingroup,</div><div class='add'>+	&amp;i2c0_pingroup,</div><div class='add'>+	&amp;i2c1_pingroup,</div><div class='add'>+	&amp;cec0_pingroup,</div><div class='add'>+	&amp;cec1_pingroup,</div><div class='add'>+	&amp;sdhci_pingroup,</div><div class='add'>+	&amp;cf_pingroup,</div><div class='add'>+	&amp;xd_pingroup,</div><div class='add'>+	&amp;clcd_pingroup,</div><div class='add'>+	&amp;arm_trace_pingroup,</div><div class='add'>+	&amp;miphy_dbg_pingroup,</div><div class='add'>+	&amp;pcie_pingroup,</div><div class='add'>+	&amp;sata_pingroup,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* functions */</div><div class='add'>+static struct spear_function *spear1340_functions[] = {</div><div class='add'>+	&amp;pads_as_gpio_function,</div><div class='add'>+	&amp;fsmc_function,</div><div class='add'>+	&amp;keyboard_function,</div><div class='add'>+	&amp;spdif_in_function,</div><div class='add'>+	&amp;spdif_out_function,</div><div class='add'>+	&amp;gpt_0_1_function,</div><div class='add'>+	&amp;pwm_function,</div><div class='add'>+	&amp;vip_function,</div><div class='add'>+	&amp;cam0_function,</div><div class='add'>+	&amp;cam1_function,</div><div class='add'>+	&amp;cam2_function,</div><div class='add'>+	&amp;cam3_function,</div><div class='add'>+	&amp;smi_function,</div><div class='add'>+	&amp;ssp0_function,</div><div class='add'>+	&amp;uart0_function,</div><div class='add'>+	&amp;uart1_function,</div><div class='add'>+	&amp;i2s_function,</div><div class='add'>+	&amp;gmac_function,</div><div class='add'>+	&amp;i2c0_function,</div><div class='add'>+	&amp;i2c1_function,</div><div class='add'>+	&amp;cec0_function,</div><div class='add'>+	&amp;cec1_function,</div><div class='add'>+	&amp;sdhci_function,</div><div class='add'>+	&amp;cf_function,</div><div class='add'>+	&amp;xd_function,</div><div class='add'>+	&amp;clcd_function,</div><div class='add'>+	&amp;arm_trace_function,</div><div class='add'>+	&amp;miphy_dbg_function,</div><div class='add'>+	&amp;pcie_function,</div><div class='add'>+	&amp;sata_function,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pinctrl_machdata spear1340_machdata = {</div><div class='add'>+	.pins = spear1340_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(spear1340_pins),</div><div class='add'>+	.groups = spear1340_pingroups,</div><div class='add'>+	.ngroups = ARRAY_SIZE(spear1340_pingroups),</div><div class='add'>+	.functions = spear1340_functions,</div><div class='add'>+	.nfunctions = ARRAY_SIZE(spear1340_functions),</div><div class='add'>+	.modes_supported = false,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct of_device_id spear1340_pinctrl_of_match[] __devinitdata = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "st,spear1340-pinmux",</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit spear1340_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return spear_pinctrl_probe(pdev, &amp;spear1340_machdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit spear1340_pinctrl_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return spear_pinctrl_remove(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver spear1340_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DRIVER_NAME,</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = spear1340_pinctrl_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = spear1340_pinctrl_probe,</div><div class='add'>+	.remove = __devexit_p(spear1340_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init spear1340_pinctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;spear1340_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(spear1340_pinctrl_init);</div><div class='add'>+</div><div class='add'>+static void __exit spear1340_pinctrl_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;spear1340_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(spear1340_pinctrl_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Viresh Kumar &lt;viresh.kumar@st.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("ST Microelectronics SPEAr1340 pinctrl driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_DEVICE_TABLE(of, spear1340_pinctrl_of_match);</div><div class='head'>diff --git a/drivers/pinctrl/spear/pinctrl-spear300.c b/drivers/pinctrl/spear/pinctrl-spear300.c<br/>new file mode 100644<br/>index 000000000000..9c82a35e4e78<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/spear/pinctrl-spear300.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear300.c</a></div><div class='hunk'>@@ -0,0 +1,708 @@</div><div class='add'>+/*</div><div class='add'>+ * Driver for the ST Microelectronics SPEAr300 pinmux</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include "pinctrl-spear3xx.h"</div><div class='add'>+</div><div class='add'>+#define DRIVER_NAME "spear300-pinmux"</div><div class='add'>+</div><div class='add'>+/* addresses */</div><div class='add'>+#define PMX_CONFIG_REG			0x00</div><div class='add'>+#define MODE_CONFIG_REG			0x04</div><div class='add'>+</div><div class='add'>+/* modes */</div><div class='add'>+#define NAND_MODE			(1 &lt;&lt; 0)</div><div class='add'>+#define NOR_MODE			(1 &lt;&lt; 1)</div><div class='add'>+#define PHOTO_FRAME_MODE		(1 &lt;&lt; 2)</div><div class='add'>+#define LEND_IP_PHONE_MODE		(1 &lt;&lt; 3)</div><div class='add'>+#define HEND_IP_PHONE_MODE		(1 &lt;&lt; 4)</div><div class='add'>+#define LEND_WIFI_PHONE_MODE		(1 &lt;&lt; 5)</div><div class='add'>+#define HEND_WIFI_PHONE_MODE		(1 &lt;&lt; 6)</div><div class='add'>+#define ATA_PABX_WI2S_MODE		(1 &lt;&lt; 7)</div><div class='add'>+#define ATA_PABX_I2S_MODE		(1 &lt;&lt; 8)</div><div class='add'>+#define CAML_LCDW_MODE			(1 &lt;&lt; 9)</div><div class='add'>+#define CAMU_LCD_MODE			(1 &lt;&lt; 10)</div><div class='add'>+#define CAMU_WLCD_MODE			(1 &lt;&lt; 11)</div><div class='add'>+#define CAML_LCD_MODE			(1 &lt;&lt; 12)</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_nand = {</div><div class='add'>+	.name = "nand",</div><div class='add'>+	.mode = NAND_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0x00,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_nor = {</div><div class='add'>+	.name = "nor",</div><div class='add'>+	.mode = NOR_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0x01,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_photo_frame = {</div><div class='add'>+	.name = "photo frame mode",</div><div class='add'>+	.mode = PHOTO_FRAME_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0x02,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_lend_ip_phone = {</div><div class='add'>+	.name = "lend ip phone mode",</div><div class='add'>+	.mode = LEND_IP_PHONE_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0x03,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_hend_ip_phone = {</div><div class='add'>+	.name = "hend ip phone mode",</div><div class='add'>+	.mode = HEND_IP_PHONE_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0x04,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_lend_wifi_phone = {</div><div class='add'>+	.name = "lend wifi phone mode",</div><div class='add'>+	.mode = LEND_WIFI_PHONE_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0x05,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_hend_wifi_phone = {</div><div class='add'>+	.name = "hend wifi phone mode",</div><div class='add'>+	.mode = HEND_WIFI_PHONE_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0x06,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_ata_pabx_wi2s = {</div><div class='add'>+	.name = "ata pabx wi2s mode",</div><div class='add'>+	.mode = ATA_PABX_WI2S_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0x07,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_ata_pabx_i2s = {</div><div class='add'>+	.name = "ata pabx i2s mode",</div><div class='add'>+	.mode = ATA_PABX_I2S_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0x08,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_caml_lcdw = {</div><div class='add'>+	.name = "caml lcdw mode",</div><div class='add'>+	.mode = CAML_LCDW_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0x0C,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_camu_lcd = {</div><div class='add'>+	.name = "camu lcd mode",</div><div class='add'>+	.mode = CAMU_LCD_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0x0D,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_camu_wlcd = {</div><div class='add'>+	.name = "camu wlcd mode",</div><div class='add'>+	.mode = CAMU_WLCD_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0xE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_caml_lcd = {</div><div class='add'>+	.name = "caml lcd mode",</div><div class='add'>+	.mode = CAML_LCD_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x0000000F,</div><div class='add'>+	.val = 0x0F,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode *spear300_pmx_modes[] = {</div><div class='add'>+	&amp;pmx_mode_nand,</div><div class='add'>+	&amp;pmx_mode_nor,</div><div class='add'>+	&amp;pmx_mode_photo_frame,</div><div class='add'>+	&amp;pmx_mode_lend_ip_phone,</div><div class='add'>+	&amp;pmx_mode_hend_ip_phone,</div><div class='add'>+	&amp;pmx_mode_lend_wifi_phone,</div><div class='add'>+	&amp;pmx_mode_hend_wifi_phone,</div><div class='add'>+	&amp;pmx_mode_ata_pabx_wi2s,</div><div class='add'>+	&amp;pmx_mode_ata_pabx_i2s,</div><div class='add'>+	&amp;pmx_mode_caml_lcdw,</div><div class='add'>+	&amp;pmx_mode_camu_lcd,</div><div class='add'>+	&amp;pmx_mode_camu_wlcd,</div><div class='add'>+	&amp;pmx_mode_caml_lcd,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* fsmc_2chips_pins */</div><div class='add'>+static const unsigned fsmc_2chips_pins[] = { 1, 97 };</div><div class='add'>+static struct spear_muxreg fsmc_2chips_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_FIRDA_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux fsmc_2chips_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |</div><div class='add'>+			ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,</div><div class='add'>+		.muxregs = fsmc_2chips_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(fsmc_2chips_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup fsmc_2chips_pingroup = {</div><div class='add'>+	.name = "fsmc_2chips_grp",</div><div class='add'>+	.pins = fsmc_2chips_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(fsmc_2chips_pins),</div><div class='add'>+	.modemuxs = fsmc_2chips_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(fsmc_2chips_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* fsmc_4chips_pins */</div><div class='add'>+static const unsigned fsmc_4chips_pins[] = { 1, 2, 3, 97 };</div><div class='add'>+static struct spear_muxreg fsmc_4chips_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_FIRDA_MASK | PMX_UART0_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux fsmc_4chips_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |</div><div class='add'>+			ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,</div><div class='add'>+		.muxregs = fsmc_4chips_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(fsmc_4chips_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup fsmc_4chips_pingroup = {</div><div class='add'>+	.name = "fsmc_4chips_grp",</div><div class='add'>+	.pins = fsmc_4chips_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(fsmc_4chips_pins),</div><div class='add'>+	.modemuxs = fsmc_4chips_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(fsmc_4chips_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const fsmc_grps[] = { "fsmc_2chips_grp", "fsmc_4chips_grp"</div><div class='add'>+};</div><div class='add'>+static struct spear_function fsmc_function = {</div><div class='add'>+	.name = "fsmc",</div><div class='add'>+	.groups = fsmc_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(fsmc_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* clcd_lcdmode_pins */</div><div class='add'>+static const unsigned clcd_lcdmode_pins[] = { 49, 50 };</div><div class='add'>+static struct spear_muxreg clcd_lcdmode_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux clcd_lcdmode_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE |</div><div class='add'>+			CAMU_LCD_MODE | CAML_LCD_MODE,</div><div class='add'>+		.muxregs = clcd_lcdmode_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(clcd_lcdmode_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup clcd_lcdmode_pingroup = {</div><div class='add'>+	.name = "clcd_lcdmode_grp",</div><div class='add'>+	.pins = clcd_lcdmode_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(clcd_lcdmode_pins),</div><div class='add'>+	.modemuxs = clcd_lcdmode_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(clcd_lcdmode_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* clcd_pfmode_pins */</div><div class='add'>+static const unsigned clcd_pfmode_pins[] = { 47, 48, 49, 50 };</div><div class='add'>+static struct spear_muxreg clcd_pfmode_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_2_3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux clcd_pfmode_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = PHOTO_FRAME_MODE,</div><div class='add'>+		.muxregs = clcd_pfmode_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(clcd_pfmode_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup clcd_pfmode_pingroup = {</div><div class='add'>+	.name = "clcd_pfmode_grp",</div><div class='add'>+	.pins = clcd_pfmode_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(clcd_pfmode_pins),</div><div class='add'>+	.modemuxs = clcd_pfmode_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(clcd_pfmode_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const clcd_grps[] = { "clcd_lcdmode_grp", "clcd_pfmode_grp"</div><div class='add'>+};</div><div class='add'>+static struct spear_function clcd_function = {</div><div class='add'>+	.name = "clcd",</div><div class='add'>+	.groups = clcd_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(clcd_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* tdm_pins */</div><div class='add'>+static const unsigned tdm_pins[] = { 34, 35, 36, 37, 38 };</div><div class='add'>+static struct spear_muxreg tdm_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux tdm_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |</div><div class='add'>+			HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE</div><div class='add'>+			| HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE</div><div class='add'>+			| ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE</div><div class='add'>+			| CAMU_WLCD_MODE | CAML_LCD_MODE,</div><div class='add'>+		.muxregs = tdm_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(tdm_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup tdm_pingroup = {</div><div class='add'>+	.name = "tdm_grp",</div><div class='add'>+	.pins = tdm_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(tdm_pins),</div><div class='add'>+	.modemuxs = tdm_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(tdm_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const tdm_grps[] = { "tdm_grp" };</div><div class='add'>+static struct spear_function tdm_function = {</div><div class='add'>+	.name = "tdm",</div><div class='add'>+	.groups = tdm_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(tdm_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* i2c_clk_pins */</div><div class='add'>+static const unsigned i2c_clk_pins[] = { 45, 46, 47, 48 };</div><div class='add'>+static struct spear_muxreg i2c_clk_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c_clk_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |</div><div class='add'>+			LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |</div><div class='add'>+			ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE | CAML_LCDW_MODE</div><div class='add'>+			| CAML_LCD_MODE,</div><div class='add'>+		.muxregs = i2c_clk_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c_clk_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c_clk_pingroup = {</div><div class='add'>+	.name = "i2c_clk_grp_grp",</div><div class='add'>+	.pins = i2c_clk_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c_clk_pins),</div><div class='add'>+	.modemuxs = i2c_clk_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c_clk_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2c_grps[] = { "i2c_clk_grp" };</div><div class='add'>+static struct spear_function i2c_function = {</div><div class='add'>+	.name = "i2c1",</div><div class='add'>+	.groups = i2c_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2c_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* caml_pins */</div><div class='add'>+static const unsigned caml_pins[] = { 12, 13, 14, 15, 16, 17, 18, 19, 20, 21 };</div><div class='add'>+static struct spear_muxreg caml_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux caml_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = CAML_LCDW_MODE | CAML_LCD_MODE,</div><div class='add'>+		.muxregs = caml_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(caml_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup caml_pingroup = {</div><div class='add'>+	.name = "caml_grp",</div><div class='add'>+	.pins = caml_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(caml_pins),</div><div class='add'>+	.modemuxs = caml_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(caml_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* camu_pins */</div><div class='add'>+static const unsigned camu_pins[] = { 16, 17, 18, 19, 20, 21, 45, 46, 47, 48 };</div><div class='add'>+static struct spear_muxreg camu_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK | PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux camu_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = CAMU_LCD_MODE | CAMU_WLCD_MODE,</div><div class='add'>+		.muxregs = camu_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(camu_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup camu_pingroup = {</div><div class='add'>+	.name = "camu_grp",</div><div class='add'>+	.pins = camu_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(camu_pins),</div><div class='add'>+	.modemuxs = camu_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(camu_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const cam_grps[] = { "caml_grp", "camu_grp" };</div><div class='add'>+static struct spear_function cam_function = {</div><div class='add'>+	.name = "cam",</div><div class='add'>+	.groups = cam_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(cam_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* dac_pins */</div><div class='add'>+static const unsigned dac_pins[] = { 43, 44 };</div><div class='add'>+static struct spear_muxreg dac_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux dac_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE</div><div class='add'>+			| CAMU_WLCD_MODE | CAML_LCD_MODE,</div><div class='add'>+		.muxregs = dac_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(dac_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup dac_pingroup = {</div><div class='add'>+	.name = "dac_grp",</div><div class='add'>+	.pins = dac_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(dac_pins),</div><div class='add'>+	.modemuxs = dac_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(dac_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const dac_grps[] = { "dac_grp" };</div><div class='add'>+static struct spear_function dac_function = {</div><div class='add'>+	.name = "dac",</div><div class='add'>+	.groups = dac_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(dac_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* i2s_pins */</div><div class='add'>+static const unsigned i2s_pins[] = { 39, 40, 41, 42 };</div><div class='add'>+static struct spear_muxreg i2s_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2s_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE</div><div class='add'>+			| LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |</div><div class='add'>+			ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE</div><div class='add'>+			| CAMU_WLCD_MODE | CAML_LCD_MODE,</div><div class='add'>+		.muxregs = i2s_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2s_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2s_pingroup = {</div><div class='add'>+	.name = "i2s_grp",</div><div class='add'>+	.pins = i2s_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2s_pins),</div><div class='add'>+	.modemuxs = i2s_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2s_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2s_grps[] = { "i2s_grp" };</div><div class='add'>+static struct spear_function i2s_function = {</div><div class='add'>+	.name = "i2s",</div><div class='add'>+	.groups = i2s_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2s_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* sdhci_4bit_pins */</div><div class='add'>+static const unsigned sdhci_4bit_pins[] = { 28, 29, 30, 31, 32, 33 };</div><div class='add'>+static struct spear_muxreg sdhci_4bit_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |</div><div class='add'>+			PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |</div><div class='add'>+			PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux sdhci_4bit_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |</div><div class='add'>+			HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |</div><div class='add'>+			HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |</div><div class='add'>+			CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE,</div><div class='add'>+		.muxregs = sdhci_4bit_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sdhci_4bit_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup sdhci_4bit_pingroup = {</div><div class='add'>+	.name = "sdhci_4bit_grp",</div><div class='add'>+	.pins = sdhci_4bit_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(sdhci_4bit_pins),</div><div class='add'>+	.modemuxs = sdhci_4bit_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(sdhci_4bit_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* sdhci_8bit_pins */</div><div class='add'>+static const unsigned sdhci_8bit_pins[] = { 24, 25, 26, 27, 28, 29, 30, 31, 32,</div><div class='add'>+	33 };</div><div class='add'>+static struct spear_muxreg sdhci_8bit_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |</div><div class='add'>+			PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |</div><div class='add'>+			PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux sdhci_8bit_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |</div><div class='add'>+			HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |</div><div class='add'>+			HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |</div><div class='add'>+			CAMU_WLCD_MODE | CAML_LCD_MODE,</div><div class='add'>+		.muxregs = sdhci_8bit_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sdhci_8bit_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup sdhci_8bit_pingroup = {</div><div class='add'>+	.name = "sdhci_8bit_grp",</div><div class='add'>+	.pins = sdhci_8bit_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(sdhci_8bit_pins),</div><div class='add'>+	.modemuxs = sdhci_8bit_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(sdhci_8bit_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const sdhci_grps[] = { "sdhci_4bit_grp", "sdhci_8bit_grp" };</div><div class='add'>+static struct spear_function sdhci_function = {</div><div class='add'>+	.name = "sdhci",</div><div class='add'>+	.groups = sdhci_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(sdhci_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio1_0_to_3_pins */</div><div class='add'>+static const unsigned gpio1_0_to_3_pins[] = { 39, 40, 41, 42 };</div><div class='add'>+static struct spear_muxreg gpio1_0_to_3_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpio1_0_to_3_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = PHOTO_FRAME_MODE,</div><div class='add'>+		.muxregs = gpio1_0_to_3_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpio1_0_to_3_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup gpio1_0_to_3_pingroup = {</div><div class='add'>+	.name = "gpio1_0_to_3_grp",</div><div class='add'>+	.pins = gpio1_0_to_3_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpio1_0_to_3_pins),</div><div class='add'>+	.modemuxs = gpio1_0_to_3_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpio1_0_to_3_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio1_4_to_7_pins */</div><div class='add'>+static const unsigned gpio1_4_to_7_pins[] = { 43, 44, 45, 46 };</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg gpio1_4_to_7_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpio1_4_to_7_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = PHOTO_FRAME_MODE,</div><div class='add'>+		.muxregs = gpio1_4_to_7_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpio1_4_to_7_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup gpio1_4_to_7_pingroup = {</div><div class='add'>+	.name = "gpio1_4_to_7_grp",</div><div class='add'>+	.pins = gpio1_4_to_7_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpio1_4_to_7_pins),</div><div class='add'>+	.modemuxs = gpio1_4_to_7_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpio1_4_to_7_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const gpio1_grps[] = { "gpio1_0_to_3_grp", "gpio1_4_to_7_grp"</div><div class='add'>+};</div><div class='add'>+static struct spear_function gpio1_function = {</div><div class='add'>+	.name = "gpio1",</div><div class='add'>+	.groups = gpio1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(gpio1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pingroups */</div><div class='add'>+static struct spear_pingroup *spear300_pingroups[] = {</div><div class='add'>+	SPEAR3XX_COMMON_PINGROUPS,</div><div class='add'>+	&amp;fsmc_2chips_pingroup,</div><div class='add'>+	&amp;fsmc_4chips_pingroup,</div><div class='add'>+	&amp;clcd_lcdmode_pingroup,</div><div class='add'>+	&amp;clcd_pfmode_pingroup,</div><div class='add'>+	&amp;tdm_pingroup,</div><div class='add'>+	&amp;i2c_clk_pingroup,</div><div class='add'>+	&amp;caml_pingroup,</div><div class='add'>+	&amp;camu_pingroup,</div><div class='add'>+	&amp;dac_pingroup,</div><div class='add'>+	&amp;i2s_pingroup,</div><div class='add'>+	&amp;sdhci_4bit_pingroup,</div><div class='add'>+	&amp;sdhci_8bit_pingroup,</div><div class='add'>+	&amp;gpio1_0_to_3_pingroup,</div><div class='add'>+	&amp;gpio1_4_to_7_pingroup,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* functions */</div><div class='add'>+static struct spear_function *spear300_functions[] = {</div><div class='add'>+	SPEAR3XX_COMMON_FUNCTIONS,</div><div class='add'>+	&amp;fsmc_function,</div><div class='add'>+	&amp;clcd_function,</div><div class='add'>+	&amp;tdm_function,</div><div class='add'>+	&amp;i2c_function,</div><div class='add'>+	&amp;cam_function,</div><div class='add'>+	&amp;dac_function,</div><div class='add'>+	&amp;i2s_function,</div><div class='add'>+	&amp;sdhci_function,</div><div class='add'>+	&amp;gpio1_function,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct of_device_id spear300_pinctrl_of_match[] __devinitdata = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "st,spear300-pinmux",</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit spear300_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	spear3xx_machdata.groups = spear300_pingroups;</div><div class='add'>+	spear3xx_machdata.ngroups = ARRAY_SIZE(spear300_pingroups);</div><div class='add'>+	spear3xx_machdata.functions = spear300_functions;</div><div class='add'>+	spear3xx_machdata.nfunctions = ARRAY_SIZE(spear300_functions);</div><div class='add'>+</div><div class='add'>+	spear3xx_machdata.modes_supported = true;</div><div class='add'>+	spear3xx_machdata.pmx_modes = spear300_pmx_modes;</div><div class='add'>+	spear3xx_machdata.npmx_modes = ARRAY_SIZE(spear300_pmx_modes);</div><div class='add'>+</div><div class='add'>+	pmx_init_addr(&amp;spear3xx_machdata, PMX_CONFIG_REG);</div><div class='add'>+</div><div class='add'>+	ret = spear_pinctrl_probe(pdev, &amp;spear3xx_machdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit spear300_pinctrl_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return spear_pinctrl_remove(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver spear300_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DRIVER_NAME,</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = spear300_pinctrl_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = spear300_pinctrl_probe,</div><div class='add'>+	.remove = __devexit_p(spear300_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init spear300_pinctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;spear300_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(spear300_pinctrl_init);</div><div class='add'>+</div><div class='add'>+static void __exit spear300_pinctrl_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;spear300_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(spear300_pinctrl_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Viresh Kumar &lt;viresh.kumar@st.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("ST Microelectronics SPEAr300 pinctrl driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_DEVICE_TABLE(of, spear300_pinctrl_of_match);</div><div class='head'>diff --git a/drivers/pinctrl/spear/pinctrl-spear310.c b/drivers/pinctrl/spear/pinctrl-spear310.c<br/>new file mode 100644<br/>index 000000000000..1a9707605125<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/spear/pinctrl-spear310.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear310.c</a></div><div class='hunk'>@@ -0,0 +1,431 @@</div><div class='add'>+/*</div><div class='add'>+ * Driver for the ST Microelectronics SPEAr310 pinmux</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include "pinctrl-spear3xx.h"</div><div class='add'>+</div><div class='add'>+#define DRIVER_NAME "spear310-pinmux"</div><div class='add'>+</div><div class='add'>+/* addresses */</div><div class='add'>+#define PMX_CONFIG_REG			0x08</div><div class='add'>+</div><div class='add'>+/* emi_cs_0_to_5_pins */</div><div class='add'>+static const unsigned emi_cs_0_to_5_pins[] = { 45, 46, 47, 48, 49, 50 };</div><div class='add'>+static struct spear_muxreg emi_cs_0_to_5_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux emi_cs_0_to_5_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = emi_cs_0_to_5_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(emi_cs_0_to_5_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup emi_cs_0_to_5_pingroup = {</div><div class='add'>+	.name = "emi_cs_0_to_5_grp",</div><div class='add'>+	.pins = emi_cs_0_to_5_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(emi_cs_0_to_5_pins),</div><div class='add'>+	.modemuxs = emi_cs_0_to_5_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(emi_cs_0_to_5_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const emi_cs_0_to_5_grps[] = { "emi_cs_0_to_5_grp" };</div><div class='add'>+static struct spear_function emi_cs_0_to_5_function = {</div><div class='add'>+	.name = "emi",</div><div class='add'>+	.groups = emi_cs_0_to_5_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(emi_cs_0_to_5_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* uart1_pins */</div><div class='add'>+static const unsigned uart1_pins[] = { 0, 1 };</div><div class='add'>+static struct spear_muxreg uart1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_FIRDA_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart1_pingroup = {</div><div class='add'>+	.name = "uart1_grp",</div><div class='add'>+	.pins = uart1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart1_pins),</div><div class='add'>+	.modemuxs = uart1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart1_grps[] = { "uart1_grp" };</div><div class='add'>+static struct spear_function uart1_function = {</div><div class='add'>+	.name = "uart1",</div><div class='add'>+	.groups = uart1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* uart2_pins */</div><div class='add'>+static const unsigned uart2_pins[] = { 43, 44 };</div><div class='add'>+static struct spear_muxreg uart2_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart2_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart2_pingroup = {</div><div class='add'>+	.name = "uart2_grp",</div><div class='add'>+	.pins = uart2_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart2_pins),</div><div class='add'>+	.modemuxs = uart2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart2_grps[] = { "uart2_grp" };</div><div class='add'>+static struct spear_function uart2_function = {</div><div class='add'>+	.name = "uart2",</div><div class='add'>+	.groups = uart2_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart2_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* uart3_pins */</div><div class='add'>+static const unsigned uart3_pins[] = { 37, 38 };</div><div class='add'>+static struct spear_muxreg uart3_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart3_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart3_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart3_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart3_pingroup = {</div><div class='add'>+	.name = "uart3_grp",</div><div class='add'>+	.pins = uart3_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart3_pins),</div><div class='add'>+	.modemuxs = uart3_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart3_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart3_grps[] = { "uart3_grp" };</div><div class='add'>+static struct spear_function uart3_function = {</div><div class='add'>+	.name = "uart3",</div><div class='add'>+	.groups = uart3_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart3_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* uart4_pins */</div><div class='add'>+static const unsigned uart4_pins[] = { 39, 40 };</div><div class='add'>+static struct spear_muxreg uart4_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart4_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart4_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart4_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart4_pingroup = {</div><div class='add'>+	.name = "uart4_grp",</div><div class='add'>+	.pins = uart4_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart4_pins),</div><div class='add'>+	.modemuxs = uart4_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart4_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart4_grps[] = { "uart4_grp" };</div><div class='add'>+static struct spear_function uart4_function = {</div><div class='add'>+	.name = "uart4",</div><div class='add'>+	.groups = uart4_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart4_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* uart5_pins */</div><div class='add'>+static const unsigned uart5_pins[] = { 41, 42 };</div><div class='add'>+static struct spear_muxreg uart5_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart5_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = uart5_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart5_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart5_pingroup = {</div><div class='add'>+	.name = "uart5_grp",</div><div class='add'>+	.pins = uart5_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart5_pins),</div><div class='add'>+	.modemuxs = uart5_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart5_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart5_grps[] = { "uart5_grp" };</div><div class='add'>+static struct spear_function uart5_function = {</div><div class='add'>+	.name = "uart5",</div><div class='add'>+	.groups = uart5_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart5_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* fsmc_pins */</div><div class='add'>+static const unsigned fsmc_pins[] = { 34, 35, 36 };</div><div class='add'>+static struct spear_muxreg fsmc_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_SSP_CS_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux fsmc_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = fsmc_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(fsmc_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup fsmc_pingroup = {</div><div class='add'>+	.name = "fsmc_grp",</div><div class='add'>+	.pins = fsmc_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(fsmc_pins),</div><div class='add'>+	.modemuxs = fsmc_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(fsmc_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const fsmc_grps[] = { "fsmc_grp" };</div><div class='add'>+static struct spear_function fsmc_function = {</div><div class='add'>+	.name = "fsmc",</div><div class='add'>+	.groups = fsmc_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(fsmc_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* rs485_0_pins */</div><div class='add'>+static const unsigned rs485_0_pins[] = { 19, 20, 21, 22, 23 };</div><div class='add'>+static struct spear_muxreg rs485_0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux rs485_0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = rs485_0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(rs485_0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup rs485_0_pingroup = {</div><div class='add'>+	.name = "rs485_0_grp",</div><div class='add'>+	.pins = rs485_0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(rs485_0_pins),</div><div class='add'>+	.modemuxs = rs485_0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(rs485_0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const rs485_0_grps[] = { "rs485_0" };</div><div class='add'>+static struct spear_function rs485_0_function = {</div><div class='add'>+	.name = "rs485_0",</div><div class='add'>+	.groups = rs485_0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(rs485_0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* rs485_1_pins */</div><div class='add'>+static const unsigned rs485_1_pins[] = { 14, 15, 16, 17, 18 };</div><div class='add'>+static struct spear_muxreg rs485_1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux rs485_1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = rs485_1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(rs485_1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup rs485_1_pingroup = {</div><div class='add'>+	.name = "rs485_1_grp",</div><div class='add'>+	.pins = rs485_1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(rs485_1_pins),</div><div class='add'>+	.modemuxs = rs485_1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(rs485_1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const rs485_1_grps[] = { "rs485_1" };</div><div class='add'>+static struct spear_function rs485_1_function = {</div><div class='add'>+	.name = "rs485_1",</div><div class='add'>+	.groups = rs485_1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(rs485_1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* tdm_pins */</div><div class='add'>+static const unsigned tdm_pins[] = { 10, 11, 12, 13 };</div><div class='add'>+static struct spear_muxreg tdm_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux tdm_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.muxregs = tdm_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(tdm_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup tdm_pingroup = {</div><div class='add'>+	.name = "tdm_grp",</div><div class='add'>+	.pins = tdm_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(tdm_pins),</div><div class='add'>+	.modemuxs = tdm_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(tdm_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const tdm_grps[] = { "tdm_grp" };</div><div class='add'>+static struct spear_function tdm_function = {</div><div class='add'>+	.name = "tdm",</div><div class='add'>+	.groups = tdm_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(tdm_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pingroups */</div><div class='add'>+static struct spear_pingroup *spear310_pingroups[] = {</div><div class='add'>+	SPEAR3XX_COMMON_PINGROUPS,</div><div class='add'>+	&amp;emi_cs_0_to_5_pingroup,</div><div class='add'>+	&amp;uart1_pingroup,</div><div class='add'>+	&amp;uart2_pingroup,</div><div class='add'>+	&amp;uart3_pingroup,</div><div class='add'>+	&amp;uart4_pingroup,</div><div class='add'>+	&amp;uart5_pingroup,</div><div class='add'>+	&amp;fsmc_pingroup,</div><div class='add'>+	&amp;rs485_0_pingroup,</div><div class='add'>+	&amp;rs485_1_pingroup,</div><div class='add'>+	&amp;tdm_pingroup,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* functions */</div><div class='add'>+static struct spear_function *spear310_functions[] = {</div><div class='add'>+	SPEAR3XX_COMMON_FUNCTIONS,</div><div class='add'>+	&amp;emi_cs_0_to_5_function,</div><div class='add'>+	&amp;uart1_function,</div><div class='add'>+	&amp;uart2_function,</div><div class='add'>+	&amp;uart3_function,</div><div class='add'>+	&amp;uart4_function,</div><div class='add'>+	&amp;uart5_function,</div><div class='add'>+	&amp;fsmc_function,</div><div class='add'>+	&amp;rs485_0_function,</div><div class='add'>+	&amp;rs485_1_function,</div><div class='add'>+	&amp;tdm_function,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct of_device_id spear310_pinctrl_of_match[] __devinitdata = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "st,spear310-pinmux",</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit spear310_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	spear3xx_machdata.groups = spear310_pingroups;</div><div class='add'>+	spear3xx_machdata.ngroups = ARRAY_SIZE(spear310_pingroups);</div><div class='add'>+	spear3xx_machdata.functions = spear310_functions;</div><div class='add'>+	spear3xx_machdata.nfunctions = ARRAY_SIZE(spear310_functions);</div><div class='add'>+</div><div class='add'>+	pmx_init_addr(&amp;spear3xx_machdata, PMX_CONFIG_REG);</div><div class='add'>+</div><div class='add'>+	spear3xx_machdata.modes_supported = false;</div><div class='add'>+</div><div class='add'>+	ret = spear_pinctrl_probe(pdev, &amp;spear3xx_machdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit spear310_pinctrl_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return spear_pinctrl_remove(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver spear310_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DRIVER_NAME,</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = spear310_pinctrl_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = spear310_pinctrl_probe,</div><div class='add'>+	.remove = __devexit_p(spear310_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init spear310_pinctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;spear310_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(spear310_pinctrl_init);</div><div class='add'>+</div><div class='add'>+static void __exit spear310_pinctrl_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;spear310_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(spear310_pinctrl_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Viresh Kumar &lt;viresh.kumar@st.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("ST Microelectronics SPEAr310 pinctrl driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_DEVICE_TABLE(of, SPEAr310_pinctrl_of_match);</div><div class='head'>diff --git a/drivers/pinctrl/spear/pinctrl-spear320.c b/drivers/pinctrl/spear/pinctrl-spear320.c<br/>new file mode 100644<br/>index 000000000000..de726e6c283a<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/spear/pinctrl-spear320.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear320.c</a></div><div class='hunk'>@@ -0,0 +1,3468 @@</div><div class='add'>+/*</div><div class='add'>+ * Driver for the ST Microelectronics SPEAr320 pinmux</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include "pinctrl-spear3xx.h"</div><div class='add'>+</div><div class='add'>+#define DRIVER_NAME "spear320-pinmux"</div><div class='add'>+</div><div class='add'>+/* addresses */</div><div class='add'>+#define PMX_CONFIG_REG			0x0C</div><div class='add'>+#define MODE_CONFIG_REG			0x10</div><div class='add'>+#define MODE_EXT_CONFIG_REG		0x18</div><div class='add'>+</div><div class='add'>+/* modes */</div><div class='add'>+#define AUTO_NET_SMII_MODE	(1 &lt;&lt; 0)</div><div class='add'>+#define AUTO_NET_MII_MODE	(1 &lt;&lt; 1)</div><div class='add'>+#define AUTO_EXP_MODE		(1 &lt;&lt; 2)</div><div class='add'>+#define SMALL_PRINTERS_MODE	(1 &lt;&lt; 3)</div><div class='add'>+#define EXTENDED_MODE		(1 &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_auto_net_smii = {</div><div class='add'>+	.name = "Automation Networking SMII mode",</div><div class='add'>+	.mode = AUTO_NET_SMII_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x00000007,</div><div class='add'>+	.val = 0x0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_auto_net_mii = {</div><div class='add'>+	.name = "Automation Networking MII mode",</div><div class='add'>+	.mode = AUTO_NET_MII_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x00000007,</div><div class='add'>+	.val = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_auto_exp = {</div><div class='add'>+	.name = "Automation Expanded mode",</div><div class='add'>+	.mode = AUTO_EXP_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x00000007,</div><div class='add'>+	.val = 0x2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_small_printers = {</div><div class='add'>+	.name = "Small Printers mode",</div><div class='add'>+	.mode = SMALL_PRINTERS_MODE,</div><div class='add'>+	.reg = MODE_CONFIG_REG,</div><div class='add'>+	.mask = 0x00000007,</div><div class='add'>+	.val = 0x3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode pmx_mode_extended = {</div><div class='add'>+	.name = "extended mode",</div><div class='add'>+	.mode = EXTENDED_MODE,</div><div class='add'>+	.reg = MODE_EXT_CONFIG_REG,</div><div class='add'>+	.mask = 0x00000001,</div><div class='add'>+	.val = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pmx_mode *spear320_pmx_modes[] = {</div><div class='add'>+	&amp;pmx_mode_auto_net_smii,</div><div class='add'>+	&amp;pmx_mode_auto_net_mii,</div><div class='add'>+	&amp;pmx_mode_auto_exp,</div><div class='add'>+	&amp;pmx_mode_small_printers,</div><div class='add'>+	&amp;pmx_mode_extended,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Extended mode registers and their offsets */</div><div class='add'>+#define EXT_CTRL_REG				0x0018</div><div class='add'>+	#define MII_MDIO_MASK			(1 &lt;&lt; 4)</div><div class='add'>+	#define MII_MDIO_10_11_VAL		0</div><div class='add'>+	#define MII_MDIO_81_VAL			(1 &lt;&lt; 4)</div><div class='add'>+	#define EMI_FSMC_DYNAMIC_MUX_MASK	(1 &lt;&lt; 5)</div><div class='add'>+	#define MAC_MODE_MII			0</div><div class='add'>+	#define MAC_MODE_RMII			1</div><div class='add'>+	#define MAC_MODE_SMII			2</div><div class='add'>+	#define MAC_MODE_SS_SMII		3</div><div class='add'>+	#define MAC_MODE_MASK			0x3</div><div class='add'>+	#define MAC1_MODE_SHIFT			16</div><div class='add'>+	#define MAC2_MODE_SHIFT			18</div><div class='add'>+</div><div class='add'>+#define IP_SEL_PAD_0_9_REG			0x00A4</div><div class='add'>+	#define PMX_PL_0_1_MASK			(0x3F &lt;&lt; 0)</div><div class='add'>+	#define PMX_UART2_PL_0_1_VAL		0x0</div><div class='add'>+	#define PMX_I2C2_PL_0_1_VAL		(0x4 | (0x4 &lt;&lt; 3))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_2_3_MASK			(0x3F &lt;&lt; 6)</div><div class='add'>+	#define PMX_I2C2_PL_2_3_VAL		0x0</div><div class='add'>+	#define PMX_UART6_PL_2_3_VAL		((0x1 &lt;&lt; 6) | (0x1 &lt;&lt; 9))</div><div class='add'>+	#define PMX_UART1_ENH_PL_2_3_VAL	((0x4 &lt;&lt; 6) | (0x4 &lt;&lt; 9))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_4_5_MASK			(0x3F &lt;&lt; 12)</div><div class='add'>+	#define PMX_UART5_PL_4_5_VAL		((0x1 &lt;&lt; 12) | (0x1 &lt;&lt; 15))</div><div class='add'>+	#define PMX_UART1_ENH_PL_4_5_VAL	((0x4 &lt;&lt; 12) | (0x4 &lt;&lt; 15))</div><div class='add'>+	#define PMX_PL_5_MASK			(0x7 &lt;&lt; 15)</div><div class='add'>+	#define PMX_TOUCH_Y_PL_5_VAL		0x0</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_6_7_MASK			(0x3F &lt;&lt; 18)</div><div class='add'>+	#define PMX_PL_6_MASK			(0x7 &lt;&lt; 18)</div><div class='add'>+	#define PMX_PL_7_MASK			(0x7 &lt;&lt; 21)</div><div class='add'>+	#define PMX_UART4_PL_6_7_VAL		((0x1 &lt;&lt; 18) | (0x1 &lt;&lt; 21))</div><div class='add'>+	#define PMX_PWM_3_PL_6_VAL		(0x2 &lt;&lt; 18)</div><div class='add'>+	#define PMX_PWM_2_PL_7_VAL		(0x2 &lt;&lt; 21)</div><div class='add'>+	#define PMX_UART1_ENH_PL_6_7_VAL	((0x4 &lt;&lt; 18) | (0x4 &lt;&lt; 21))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_8_9_MASK			(0x3F &lt;&lt; 24)</div><div class='add'>+	#define PMX_UART3_PL_8_9_VAL		((0x1 &lt;&lt; 24) | (0x1 &lt;&lt; 27))</div><div class='add'>+	#define PMX_PWM_0_1_PL_8_9_VAL		((0x2 &lt;&lt; 24) | (0x2 &lt;&lt; 27))</div><div class='add'>+	#define PMX_I2C1_PL_8_9_VAL		((0x4 &lt;&lt; 24) | (0x4 &lt;&lt; 27))</div><div class='add'>+</div><div class='add'>+#define IP_SEL_PAD_10_19_REG			0x00A8</div><div class='add'>+	#define PMX_PL_10_11_MASK		(0x3F &lt;&lt; 0)</div><div class='add'>+	#define PMX_SMII_PL_10_11_VAL		0</div><div class='add'>+	#define PMX_RMII_PL_10_11_VAL		((0x4 &lt;&lt; 0) | (0x4 &lt;&lt; 3))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_12_MASK			(0x7 &lt;&lt; 6)</div><div class='add'>+	#define PMX_PWM3_PL_12_VAL		0</div><div class='add'>+	#define PMX_SDHCI_CD_PL_12_VAL		(0x4 &lt;&lt; 6)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_13_14_MASK		(0x3F &lt;&lt; 9)</div><div class='add'>+	#define PMX_PL_13_MASK			(0x7 &lt;&lt; 9)</div><div class='add'>+	#define PMX_PL_14_MASK			(0x7 &lt;&lt; 12)</div><div class='add'>+	#define PMX_SSP2_PL_13_14_15_16_VAL	0</div><div class='add'>+	#define PMX_UART4_PL_13_14_VAL		((0x1 &lt;&lt; 9) | (0x1 &lt;&lt; 12))</div><div class='add'>+	#define PMX_RMII_PL_13_14_VAL		((0x4 &lt;&lt; 9) | (0x4 &lt;&lt; 12))</div><div class='add'>+	#define PMX_PWM2_PL_13_VAL		(0x2 &lt;&lt; 9)</div><div class='add'>+	#define PMX_PWM1_PL_14_VAL		(0x2 &lt;&lt; 12)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_15_MASK			(0x7 &lt;&lt; 15)</div><div class='add'>+	#define PMX_PWM0_PL_15_VAL		(0x2 &lt;&lt; 15)</div><div class='add'>+	#define PMX_PL_15_16_MASK		(0x3F &lt;&lt; 15)</div><div class='add'>+	#define PMX_UART3_PL_15_16_VAL		((0x1 &lt;&lt; 15) | (0x1 &lt;&lt; 18))</div><div class='add'>+	#define PMX_RMII_PL_15_16_VAL		((0x4 &lt;&lt; 15) | (0x4 &lt;&lt; 18))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_17_18_MASK		(0x3F &lt;&lt; 21)</div><div class='add'>+	#define PMX_SSP1_PL_17_18_19_20_VAL	0</div><div class='add'>+	#define PMX_RMII_PL_17_18_VAL		((0x4 &lt;&lt; 21) | (0x4 &lt;&lt; 24))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_19_MASK			(0x7 &lt;&lt; 27)</div><div class='add'>+	#define PMX_I2C2_PL_19_VAL		(0x1 &lt;&lt; 27)</div><div class='add'>+	#define PMX_RMII_PL_19_VAL		(0x4 &lt;&lt; 27)</div><div class='add'>+</div><div class='add'>+#define IP_SEL_PAD_20_29_REG			0x00AC</div><div class='add'>+	#define PMX_PL_20_MASK			(0x7 &lt;&lt; 0)</div><div class='add'>+	#define PMX_I2C2_PL_20_VAL		(0x1 &lt;&lt; 0)</div><div class='add'>+	#define PMX_RMII_PL_20_VAL		(0x4 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_21_TO_27_MASK		(0x1FFFFF &lt;&lt; 3)</div><div class='add'>+	#define PMX_SMII_PL_21_TO_27_VAL	0</div><div class='add'>+	#define PMX_RMII_PL_21_TO_27_VAL	((0x4 &lt;&lt; 3) | (0x4 &lt;&lt; 6) | (0x4 &lt;&lt; 9) | (0x4 &lt;&lt; 12) | (0x4 &lt;&lt; 15) | (0x4 &lt;&lt; 18) | (0x4 &lt;&lt; 21))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_28_29_MASK		(0x3F &lt;&lt; 24)</div><div class='add'>+	#define PMX_PL_28_MASK			(0x7 &lt;&lt; 24)</div><div class='add'>+	#define PMX_PL_29_MASK			(0x7 &lt;&lt; 27)</div><div class='add'>+	#define PMX_UART1_PL_28_29_VAL		0</div><div class='add'>+	#define PMX_PWM_3_PL_28_VAL		(0x4 &lt;&lt; 24)</div><div class='add'>+	#define PMX_PWM_2_PL_29_VAL		(0x4 &lt;&lt; 27)</div><div class='add'>+</div><div class='add'>+#define IP_SEL_PAD_30_39_REG			0x00B0</div><div class='add'>+	#define PMX_PL_30_31_MASK		(0x3F &lt;&lt; 0)</div><div class='add'>+	#define PMX_CAN1_PL_30_31_VAL		(0)</div><div class='add'>+	#define PMX_PL_30_MASK			(0x7 &lt;&lt; 0)</div><div class='add'>+	#define PMX_PL_31_MASK			(0x7 &lt;&lt; 3)</div><div class='add'>+	#define PMX_PWM1_EXT_PL_30_VAL		(0x4 &lt;&lt; 0)</div><div class='add'>+	#define PMX_PWM0_EXT_PL_31_VAL		(0x4 &lt;&lt; 3)</div><div class='add'>+	#define PMX_UART1_ENH_PL_31_VAL		(0x3 &lt;&lt; 3)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_32_33_MASK		(0x3F &lt;&lt; 6)</div><div class='add'>+	#define PMX_CAN0_PL_32_33_VAL		0</div><div class='add'>+	#define PMX_UART1_ENH_PL_32_33_VAL	((0x3 &lt;&lt; 6) | (0x3 &lt;&lt; 9))</div><div class='add'>+	#define PMX_SSP2_PL_32_33_VAL		((0x4 &lt;&lt; 6) | (0x4 &lt;&lt; 9))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_34_MASK			(0x7 &lt;&lt; 12)</div><div class='add'>+	#define PMX_PWM2_PL_34_VAL		0</div><div class='add'>+	#define PMX_UART1_ENH_PL_34_VAL		(0x2 &lt;&lt; 12)</div><div class='add'>+	#define PMX_SSP2_PL_34_VAL		(0x4 &lt;&lt; 12)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_35_MASK			(0x7 &lt;&lt; 15)</div><div class='add'>+	#define PMX_I2S_REF_CLK_PL_35_VAL	0</div><div class='add'>+	#define PMX_UART1_ENH_PL_35_VAL		(0x2 &lt;&lt; 15)</div><div class='add'>+	#define PMX_SSP2_PL_35_VAL		(0x4 &lt;&lt; 15)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_36_MASK			(0x7 &lt;&lt; 18)</div><div class='add'>+	#define PMX_TOUCH_X_PL_36_VAL		0</div><div class='add'>+	#define PMX_UART1_ENH_PL_36_VAL		(0x2 &lt;&lt; 18)</div><div class='add'>+	#define PMX_SSP1_PL_36_VAL		(0x4 &lt;&lt; 18)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_37_38_MASK		(0x3F &lt;&lt; 21)</div><div class='add'>+	#define PMX_PWM0_1_PL_37_38_VAL		0</div><div class='add'>+	#define PMX_UART5_PL_37_38_VAL		((0x2 &lt;&lt; 21) | (0x2 &lt;&lt; 24))</div><div class='add'>+	#define PMX_SSP1_PL_37_38_VAL		((0x4 &lt;&lt; 21) | (0x4 &lt;&lt; 24))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_39_MASK			(0x7 &lt;&lt; 27)</div><div class='add'>+	#define PMX_I2S_PL_39_VAL		0</div><div class='add'>+	#define PMX_UART4_PL_39_VAL		(0x2 &lt;&lt; 27)</div><div class='add'>+	#define PMX_SSP1_PL_39_VAL		(0x4 &lt;&lt; 27)</div><div class='add'>+</div><div class='add'>+#define IP_SEL_PAD_40_49_REG			0x00B4</div><div class='add'>+	#define PMX_PL_40_MASK			(0x7 &lt;&lt; 0)</div><div class='add'>+	#define PMX_I2S_PL_40_VAL		0</div><div class='add'>+	#define PMX_UART4_PL_40_VAL		(0x2 &lt;&lt; 0)</div><div class='add'>+	#define PMX_PWM3_PL_40_VAL		(0x4 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_41_42_MASK		(0x3F &lt;&lt; 3)</div><div class='add'>+	#define PMX_PL_41_MASK			(0x7 &lt;&lt; 3)</div><div class='add'>+	#define PMX_PL_42_MASK			(0x7 &lt;&lt; 6)</div><div class='add'>+	#define PMX_I2S_PL_41_42_VAL		0</div><div class='add'>+	#define PMX_UART3_PL_41_42_VAL		((0x2 &lt;&lt; 3) | (0x2 &lt;&lt; 6))</div><div class='add'>+	#define PMX_PWM2_PL_41_VAL		(0x4 &lt;&lt; 3)</div><div class='add'>+	#define PMX_PWM1_PL_42_VAL		(0x4 &lt;&lt; 6)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_43_MASK			(0x7 &lt;&lt; 9)</div><div class='add'>+	#define PMX_SDHCI_PL_43_VAL		0</div><div class='add'>+	#define PMX_UART1_ENH_PL_43_VAL		(0x2 &lt;&lt; 9)</div><div class='add'>+	#define PMX_PWM0_PL_43_VAL		(0x4 &lt;&lt; 9)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_44_45_MASK		(0x3F &lt;&lt; 12)</div><div class='add'>+	#define PMX_SDHCI_PL_44_45_VAL	0</div><div class='add'>+	#define PMX_UART1_ENH_PL_44_45_VAL	((0x2 &lt;&lt; 12) | (0x2 &lt;&lt; 15))</div><div class='add'>+	#define PMX_SSP2_PL_44_45_VAL		((0x4 &lt;&lt; 12) | (0x4 &lt;&lt; 15))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_46_47_MASK		(0x3F &lt;&lt; 18)</div><div class='add'>+	#define PMX_SDHCI_PL_46_47_VAL	0</div><div class='add'>+	#define PMX_FSMC_EMI_PL_46_47_VAL	((0x2 &lt;&lt; 18) | (0x2 &lt;&lt; 21))</div><div class='add'>+	#define PMX_SSP2_PL_46_47_VAL		((0x4 &lt;&lt; 18) | (0x4 &lt;&lt; 21))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_48_49_MASK		(0x3F &lt;&lt; 24)</div><div class='add'>+	#define PMX_SDHCI_PL_48_49_VAL	0</div><div class='add'>+	#define PMX_FSMC_EMI_PL_48_49_VAL	((0x2 &lt;&lt; 24) | (0x2 &lt;&lt; 27))</div><div class='add'>+	#define PMX_SSP1_PL_48_49_VAL		((0x4 &lt;&lt; 24) | (0x4 &lt;&lt; 27))</div><div class='add'>+</div><div class='add'>+#define IP_SEL_PAD_50_59_REG			0x00B8</div><div class='add'>+	#define PMX_PL_50_51_MASK		(0x3F &lt;&lt; 0)</div><div class='add'>+	#define PMX_EMI_PL_50_51_VAL		((0x2 &lt;&lt; 0) | (0x2 &lt;&lt; 3))</div><div class='add'>+	#define PMX_SSP1_PL_50_51_VAL		((0x4 &lt;&lt; 0) | (0x4 &lt;&lt; 3))</div><div class='add'>+	#define PMX_PL_50_MASK			(0x7 &lt;&lt; 0)</div><div class='add'>+	#define PMX_PL_51_MASK			(0x7 &lt;&lt; 3)</div><div class='add'>+	#define PMX_SDHCI_PL_50_VAL		0</div><div class='add'>+	#define PMX_SDHCI_CD_PL_51_VAL		0</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_52_53_MASK		(0x3F &lt;&lt; 6)</div><div class='add'>+	#define PMX_FSMC_PL_52_53_VAL		0</div><div class='add'>+	#define PMX_EMI_PL_52_53_VAL		((0x2 &lt;&lt; 6) | (0x2 &lt;&lt; 9))</div><div class='add'>+	#define PMX_UART3_PL_52_53_VAL		((0x4 &lt;&lt; 6) | (0x4 &lt;&lt; 9))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_54_55_56_MASK		(0x1FF &lt;&lt; 12)</div><div class='add'>+	#define PMX_FSMC_EMI_PL_54_55_56_VAL	((0x2 &lt;&lt; 12) | (0x2 &lt;&lt; 15) | (0x2 &lt;&lt; 18))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_57_MASK			(0x7 &lt;&lt; 21)</div><div class='add'>+	#define PMX_FSMC_PL_57_VAL		0</div><div class='add'>+	#define PMX_PWM3_PL_57_VAL		(0x4 &lt;&lt; 21)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_58_59_MASK		(0x3F &lt;&lt; 24)</div><div class='add'>+	#define PMX_PL_58_MASK			(0x7 &lt;&lt; 24)</div><div class='add'>+	#define PMX_PL_59_MASK			(0x7 &lt;&lt; 27)</div><div class='add'>+	#define PMX_FSMC_EMI_PL_58_59_VAL	((0x2 &lt;&lt; 24) | (0x2 &lt;&lt; 27))</div><div class='add'>+	#define PMX_PWM2_PL_58_VAL		(0x4 &lt;&lt; 24)</div><div class='add'>+	#define PMX_PWM1_PL_59_VAL		(0x4 &lt;&lt; 27)</div><div class='add'>+</div><div class='add'>+#define IP_SEL_PAD_60_69_REG			0x00BC</div><div class='add'>+	#define PMX_PL_60_MASK			(0x7 &lt;&lt; 0)</div><div class='add'>+	#define PMX_FSMC_PL_60_VAL		0</div><div class='add'>+	#define PMX_PWM0_PL_60_VAL		(0x4 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_61_TO_64_MASK		(0xFFF &lt;&lt; 3)</div><div class='add'>+	#define PMX_FSMC_PL_61_TO_64_VAL	((0x2 &lt;&lt; 3) | (0x2 &lt;&lt; 6) | (0x2 &lt;&lt; 9) | (0x2 &lt;&lt; 12))</div><div class='add'>+	#define PMX_SSP2_PL_61_TO_64_VAL	((0x4 &lt;&lt; 3) | (0x4 &lt;&lt; 6) | (0x4 &lt;&lt; 9) | (0x4 &lt;&lt; 12))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_65_TO_68_MASK		(0xFFF &lt;&lt; 15)</div><div class='add'>+	#define PMX_FSMC_PL_65_TO_68_VAL	((0x2 &lt;&lt; 15) | (0x2 &lt;&lt; 18) | (0x2 &lt;&lt; 21) | (0x2 &lt;&lt; 24))</div><div class='add'>+	#define PMX_SSP1_PL_65_TO_68_VAL	((0x4 &lt;&lt; 15) | (0x4 &lt;&lt; 18) | (0x4 &lt;&lt; 21) | (0x4 &lt;&lt; 24))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_69_MASK			(0x7 &lt;&lt; 27)</div><div class='add'>+	#define PMX_CLCD_PL_69_VAL		(0)</div><div class='add'>+	#define PMX_EMI_PL_69_VAL		(0x2 &lt;&lt; 27)</div><div class='add'>+	#define PMX_SPP_PL_69_VAL		(0x3 &lt;&lt; 27)</div><div class='add'>+	#define PMX_UART5_PL_69_VAL		(0x4 &lt;&lt; 27)</div><div class='add'>+</div><div class='add'>+#define IP_SEL_PAD_70_79_REG			0x00C0</div><div class='add'>+	#define PMX_PL_70_MASK			(0x7 &lt;&lt; 0)</div><div class='add'>+	#define PMX_CLCD_PL_70_VAL		(0)</div><div class='add'>+	#define PMX_FSMC_EMI_PL_70_VAL		(0x2 &lt;&lt; 0)</div><div class='add'>+	#define PMX_SPP_PL_70_VAL		(0x3 &lt;&lt; 0)</div><div class='add'>+	#define PMX_UART5_PL_70_VAL		(0x4 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_71_72_MASK		(0x3F &lt;&lt; 3)</div><div class='add'>+	#define PMX_CLCD_PL_71_72_VAL		(0)</div><div class='add'>+	#define PMX_FSMC_EMI_PL_71_72_VAL	((0x2 &lt;&lt; 3) | (0x2 &lt;&lt; 6))</div><div class='add'>+	#define PMX_SPP_PL_71_72_VAL		((0x3 &lt;&lt; 3) | (0x3 &lt;&lt; 6))</div><div class='add'>+	#define PMX_UART4_PL_71_72_VAL		((0x4 &lt;&lt; 3) | (0x4 &lt;&lt; 6))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_73_MASK			(0x7 &lt;&lt; 9)</div><div class='add'>+	#define PMX_CLCD_PL_73_VAL		(0)</div><div class='add'>+	#define PMX_FSMC_EMI_PL_73_VAL		(0x2 &lt;&lt; 9)</div><div class='add'>+	#define PMX_SPP_PL_73_VAL		(0x3 &lt;&lt; 9)</div><div class='add'>+	#define PMX_UART3_PL_73_VAL		(0x4 &lt;&lt; 9)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_74_MASK			(0x7 &lt;&lt; 12)</div><div class='add'>+	#define PMX_CLCD_PL_74_VAL		(0)</div><div class='add'>+	#define PMX_EMI_PL_74_VAL		(0x2 &lt;&lt; 12)</div><div class='add'>+	#define PMX_SPP_PL_74_VAL		(0x3 &lt;&lt; 12)</div><div class='add'>+	#define PMX_UART3_PL_74_VAL		(0x4 &lt;&lt; 12)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_75_76_MASK		(0x3F &lt;&lt; 15)</div><div class='add'>+	#define PMX_CLCD_PL_75_76_VAL		(0)</div><div class='add'>+	#define PMX_EMI_PL_75_76_VAL		((0x2 &lt;&lt; 15) | (0x2 &lt;&lt; 18))</div><div class='add'>+	#define PMX_SPP_PL_75_76_VAL		((0x3 &lt;&lt; 15) | (0x3 &lt;&lt; 18))</div><div class='add'>+	#define PMX_I2C2_PL_75_76_VAL		((0x4 &lt;&lt; 15) | (0x4 &lt;&lt; 18))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_77_78_79_MASK		(0x1FF &lt;&lt; 21)</div><div class='add'>+	#define PMX_CLCD_PL_77_78_79_VAL	(0)</div><div class='add'>+	#define PMX_EMI_PL_77_78_79_VAL		((0x2 &lt;&lt; 21) | (0x2 &lt;&lt; 24) | (0x2 &lt;&lt; 27))</div><div class='add'>+	#define PMX_SPP_PL_77_78_79_VAL		((0x3 &lt;&lt; 21) | (0x3 &lt;&lt; 24) | (0x3 &lt;&lt; 27))</div><div class='add'>+	#define PMX_RS485_PL_77_78_79_VAL	((0x4 &lt;&lt; 21) | (0x4 &lt;&lt; 24) | (0x4 &lt;&lt; 27))</div><div class='add'>+</div><div class='add'>+#define IP_SEL_PAD_80_89_REG			0x00C4</div><div class='add'>+	#define PMX_PL_80_TO_85_MASK		(0x3FFFF &lt;&lt; 0)</div><div class='add'>+	#define PMX_CLCD_PL_80_TO_85_VAL	0</div><div class='add'>+	#define PMX_MII2_PL_80_TO_85_VAL	((0x1 &lt;&lt; 0) | (0x1 &lt;&lt; 3) | (0x1 &lt;&lt; 6) | (0x1 &lt;&lt; 9) | (0x1 &lt;&lt; 12) | (0x1 &lt;&lt; 15))</div><div class='add'>+	#define PMX_EMI_PL_80_TO_85_VAL		((0x2 &lt;&lt; 0) | (0x2 &lt;&lt; 3) | (0x2 &lt;&lt; 6) | (0x2 &lt;&lt; 9) | (0x2 &lt;&lt; 12) | (0x2 &lt;&lt; 15))</div><div class='add'>+	#define PMX_SPP_PL_80_TO_85_VAL		((0x3 &lt;&lt; 0) | (0x3 &lt;&lt; 3) | (0x3 &lt;&lt; 6) | (0x3 &lt;&lt; 9) | (0x3 &lt;&lt; 12) | (0x3 &lt;&lt; 15))</div><div class='add'>+	#define PMX_UART1_ENH_PL_80_TO_85_VAL	((0x4 &lt;&lt; 0) | (0x4 &lt;&lt; 3) | (0x4 &lt;&lt; 6) | (0x4 &lt;&lt; 9) | (0x4 &lt;&lt; 12) | (0x4 &lt;&lt; 15))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_86_87_MASK		(0x3F &lt;&lt; 18)</div><div class='add'>+	#define PMX_PL_86_MASK			(0x7 &lt;&lt; 18)</div><div class='add'>+	#define PMX_PL_87_MASK			(0x7 &lt;&lt; 21)</div><div class='add'>+	#define PMX_CLCD_PL_86_87_VAL		0</div><div class='add'>+	#define PMX_MII2_PL_86_87_VAL		((0x1 &lt;&lt; 18) | (0x1 &lt;&lt; 21))</div><div class='add'>+	#define PMX_EMI_PL_86_87_VAL		((0x2 &lt;&lt; 18) | (0x2 &lt;&lt; 21))</div><div class='add'>+	#define PMX_PWM3_PL_86_VAL		(0x4 &lt;&lt; 18)</div><div class='add'>+	#define PMX_PWM2_PL_87_VAL		(0x4 &lt;&lt; 21)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_88_89_MASK		(0x3F &lt;&lt; 24)</div><div class='add'>+	#define PMX_CLCD_PL_88_89_VAL		0</div><div class='add'>+	#define PMX_MII2_PL_88_89_VAL		((0x1 &lt;&lt; 24) | (0x1 &lt;&lt; 27))</div><div class='add'>+	#define PMX_EMI_PL_88_89_VAL		((0x2 &lt;&lt; 24) | (0x2 &lt;&lt; 27))</div><div class='add'>+	#define PMX_UART6_PL_88_89_VAL		((0x3 &lt;&lt; 24) | (0x3 &lt;&lt; 27))</div><div class='add'>+	#define PMX_PWM0_1_PL_88_89_VAL		((0x4 &lt;&lt; 24) | (0x4 &lt;&lt; 27))</div><div class='add'>+</div><div class='add'>+#define IP_SEL_PAD_90_99_REG			0x00C8</div><div class='add'>+	#define PMX_PL_90_91_MASK		(0x3F &lt;&lt; 0)</div><div class='add'>+	#define PMX_CLCD_PL_90_91_VAL		0</div><div class='add'>+	#define PMX_MII2_PL_90_91_VAL		((0x1 &lt;&lt; 0) | (0x1 &lt;&lt; 3))</div><div class='add'>+	#define PMX_EMI1_PL_90_91_VAL		((0x2 &lt;&lt; 0) | (0x2 &lt;&lt; 3))</div><div class='add'>+	#define PMX_UART5_PL_90_91_VAL		((0x3 &lt;&lt; 0) | (0x3 &lt;&lt; 3))</div><div class='add'>+	#define PMX_SSP2_PL_90_91_VAL		((0x4 &lt;&lt; 0) | (0x4 &lt;&lt; 3))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_92_93_MASK		(0x3F &lt;&lt; 6)</div><div class='add'>+	#define PMX_CLCD_PL_92_93_VAL		0</div><div class='add'>+	#define PMX_MII2_PL_92_93_VAL		((0x1 &lt;&lt; 6) | (0x1 &lt;&lt; 9))</div><div class='add'>+	#define PMX_EMI1_PL_92_93_VAL		((0x2 &lt;&lt; 6) | (0x2 &lt;&lt; 9))</div><div class='add'>+	#define PMX_UART4_PL_92_93_VAL		((0x3 &lt;&lt; 6) | (0x3 &lt;&lt; 9))</div><div class='add'>+	#define PMX_SSP2_PL_92_93_VAL		((0x4 &lt;&lt; 6) | (0x4 &lt;&lt; 9))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_94_95_MASK		(0x3F &lt;&lt; 12)</div><div class='add'>+	#define PMX_CLCD_PL_94_95_VAL		0</div><div class='add'>+	#define PMX_MII2_PL_94_95_VAL		((0x1 &lt;&lt; 12) | (0x1 &lt;&lt; 15))</div><div class='add'>+	#define PMX_EMI1_PL_94_95_VAL		((0x2 &lt;&lt; 12) | (0x2 &lt;&lt; 15))</div><div class='add'>+	#define PMX_UART3_PL_94_95_VAL		((0x3 &lt;&lt; 12) | (0x3 &lt;&lt; 15))</div><div class='add'>+	#define PMX_SSP1_PL_94_95_VAL		((0x4 &lt;&lt; 12) | (0x4 &lt;&lt; 15))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_96_97_MASK		(0x3F &lt;&lt; 18)</div><div class='add'>+	#define PMX_CLCD_PL_96_97_VAL		0</div><div class='add'>+	#define PMX_MII2_PL_96_97_VAL		((0x1 &lt;&lt; 18) | (0x1 &lt;&lt; 21))</div><div class='add'>+	#define PMX_EMI1_PL_96_97_VAL		((0x2 &lt;&lt; 18) | (0x2 &lt;&lt; 21))</div><div class='add'>+	#define PMX_I2C2_PL_96_97_VAL		((0x3 &lt;&lt; 18) | (0x3 &lt;&lt; 21))</div><div class='add'>+	#define PMX_SSP1_PL_96_97_VAL		((0x4 &lt;&lt; 18) | (0x4 &lt;&lt; 21))</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_98_MASK			(0x7 &lt;&lt; 24)</div><div class='add'>+	#define PMX_CLCD_PL_98_VAL		0</div><div class='add'>+	#define PMX_I2C1_PL_98_VAL		(0x2 &lt;&lt; 24)</div><div class='add'>+	#define PMX_UART3_PL_98_VAL		(0x4 &lt;&lt; 24)</div><div class='add'>+</div><div class='add'>+	#define PMX_PL_99_MASK			(0x7 &lt;&lt; 27)</div><div class='add'>+	#define PMX_SDHCI_PL_99_VAL		0</div><div class='add'>+	#define PMX_I2C1_PL_99_VAL		(0x2 &lt;&lt; 27)</div><div class='add'>+	#define PMX_UART3_PL_99_VAL		(0x4 &lt;&lt; 27)</div><div class='add'>+</div><div class='add'>+#define IP_SEL_MIX_PAD_REG			0x00CC</div><div class='add'>+	#define PMX_PL_100_101_MASK		(0x3F &lt;&lt; 0)</div><div class='add'>+	#define PMX_SDHCI_PL_100_101_VAL	0</div><div class='add'>+	#define PMX_UART4_PL_100_101_VAL	((0x4 &lt;&lt; 0) | (0x4 &lt;&lt; 3))</div><div class='add'>+</div><div class='add'>+	#define PMX_SSP1_PORT_SEL_MASK		(0x7 &lt;&lt; 8)</div><div class='add'>+	#define PMX_SSP1_PORT_94_TO_97_VAL	0</div><div class='add'>+	#define PMX_SSP1_PORT_65_TO_68_VAL	(0x1 &lt;&lt; 8)</div><div class='add'>+	#define PMX_SSP1_PORT_48_TO_51_VAL	(0x2 &lt;&lt; 8)</div><div class='add'>+	#define PMX_SSP1_PORT_36_TO_39_VAL	(0x3 &lt;&lt; 8)</div><div class='add'>+	#define PMX_SSP1_PORT_17_TO_20_VAL	(0x4 &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+	#define PMX_SSP2_PORT_SEL_MASK		(0x7 &lt;&lt; 11)</div><div class='add'>+	#define PMX_SSP2_PORT_90_TO_93_VAL	0</div><div class='add'>+	#define PMX_SSP2_PORT_61_TO_64_VAL	(0x1 &lt;&lt; 11)</div><div class='add'>+	#define PMX_SSP2_PORT_44_TO_47_VAL	(0x2 &lt;&lt; 11)</div><div class='add'>+	#define PMX_SSP2_PORT_32_TO_35_VAL	(0x3 &lt;&lt; 11)</div><div class='add'>+	#define PMX_SSP2_PORT_13_TO_16_VAL	(0x4 &lt;&lt; 11)</div><div class='add'>+</div><div class='add'>+	#define PMX_UART1_ENH_PORT_SEL_MASK		(0x3 &lt;&lt; 14)</div><div class='add'>+	#define PMX_UART1_ENH_PORT_81_TO_85_VAL		0</div><div class='add'>+	#define PMX_UART1_ENH_PORT_44_45_34_36_VAL	(0x1 &lt;&lt; 14)</div><div class='add'>+	#define PMX_UART1_ENH_PORT_32_TO_34_36_VAL	(0x2 &lt;&lt; 14)</div><div class='add'>+	#define PMX_UART1_ENH_PORT_3_TO_5_7_VAL		(0x3 &lt;&lt; 14)</div><div class='add'>+</div><div class='add'>+	#define PMX_UART3_PORT_SEL_MASK		(0x7 &lt;&lt; 16)</div><div class='add'>+	#define PMX_UART3_PORT_94_VAL		0</div><div class='add'>+	#define PMX_UART3_PORT_73_VAL		(0x1 &lt;&lt; 16)</div><div class='add'>+	#define PMX_UART3_PORT_52_VAL		(0x2 &lt;&lt; 16)</div><div class='add'>+	#define PMX_UART3_PORT_41_VAL		(0x3 &lt;&lt; 16)</div><div class='add'>+	#define PMX_UART3_PORT_15_VAL		(0x4 &lt;&lt; 16)</div><div class='add'>+	#define PMX_UART3_PORT_8_VAL		(0x5 &lt;&lt; 16)</div><div class='add'>+	#define PMX_UART3_PORT_99_VAL		(0x6 &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+	#define PMX_UART4_PORT_SEL_MASK		(0x7 &lt;&lt; 19)</div><div class='add'>+	#define PMX_UART4_PORT_92_VAL		0</div><div class='add'>+	#define PMX_UART4_PORT_71_VAL		(0x1 &lt;&lt; 19)</div><div class='add'>+	#define PMX_UART4_PORT_39_VAL		(0x2 &lt;&lt; 19)</div><div class='add'>+	#define PMX_UART4_PORT_13_VAL		(0x3 &lt;&lt; 19)</div><div class='add'>+	#define PMX_UART4_PORT_6_VAL		(0x4 &lt;&lt; 19)</div><div class='add'>+	#define PMX_UART4_PORT_101_VAL		(0x5 &lt;&lt; 19)</div><div class='add'>+</div><div class='add'>+	#define PMX_UART5_PORT_SEL_MASK		(0x3 &lt;&lt; 22)</div><div class='add'>+	#define PMX_UART5_PORT_90_VAL		0</div><div class='add'>+	#define PMX_UART5_PORT_69_VAL		(0x1 &lt;&lt; 22)</div><div class='add'>+	#define PMX_UART5_PORT_37_VAL		(0x2 &lt;&lt; 22)</div><div class='add'>+	#define PMX_UART5_PORT_4_VAL		(0x3 &lt;&lt; 22)</div><div class='add'>+</div><div class='add'>+	#define PMX_UART6_PORT_SEL_MASK		(0x1 &lt;&lt; 24)</div><div class='add'>+	#define PMX_UART6_PORT_88_VAL		0</div><div class='add'>+	#define PMX_UART6_PORT_2_VAL		(0x1 &lt;&lt; 24)</div><div class='add'>+</div><div class='add'>+	#define PMX_I2C1_PORT_SEL_MASK		(0x1 &lt;&lt; 25)</div><div class='add'>+	#define PMX_I2C1_PORT_8_9_VAL		0</div><div class='add'>+	#define PMX_I2C1_PORT_98_99_VAL		(0x1 &lt;&lt; 25)</div><div class='add'>+</div><div class='add'>+	#define PMX_I2C2_PORT_SEL_MASK		(0x3 &lt;&lt; 26)</div><div class='add'>+	#define PMX_I2C2_PORT_96_97_VAL		0</div><div class='add'>+	#define PMX_I2C2_PORT_75_76_VAL		(0x1 &lt;&lt; 26)</div><div class='add'>+	#define PMX_I2C2_PORT_19_20_VAL		(0x2 &lt;&lt; 26)</div><div class='add'>+	#define PMX_I2C2_PORT_2_3_VAL		(0x3 &lt;&lt; 26)</div><div class='add'>+	#define PMX_I2C2_PORT_0_1_VAL		(0x4 &lt;&lt; 26)</div><div class='add'>+</div><div class='add'>+	#define PMX_SDHCI_CD_PORT_SEL_MASK	(0x1 &lt;&lt; 29)</div><div class='add'>+	#define PMX_SDHCI_CD_PORT_12_VAL	0</div><div class='add'>+	#define PMX_SDHCI_CD_PORT_51_VAL	(0x1 &lt;&lt; 29)</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for CLCD device */</div><div class='add'>+static const unsigned clcd_pins[] = { 69, 70, 71, 72, 73, 74, 75, 76, 77, 78,</div><div class='add'>+	79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96,</div><div class='add'>+	97 };</div><div class='add'>+static struct spear_muxreg clcd_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_60_69_REG,</div><div class='add'>+		.mask = PMX_PL_69_MASK,</div><div class='add'>+		.val = PMX_CLCD_PL_69_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_70_79_REG,</div><div class='add'>+		.mask = PMX_PL_70_MASK | PMX_PL_71_72_MASK | PMX_PL_73_MASK |</div><div class='add'>+			PMX_PL_74_MASK | PMX_PL_75_76_MASK |</div><div class='add'>+			PMX_PL_77_78_79_MASK,</div><div class='add'>+		.val = PMX_CLCD_PL_70_VAL | PMX_CLCD_PL_71_72_VAL |</div><div class='add'>+			PMX_CLCD_PL_73_VAL | PMX_CLCD_PL_74_VAL |</div><div class='add'>+			PMX_CLCD_PL_75_76_VAL | PMX_CLCD_PL_77_78_79_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_80_89_REG,</div><div class='add'>+		.mask = PMX_PL_80_TO_85_MASK | PMX_PL_86_87_MASK |</div><div class='add'>+			PMX_PL_88_89_MASK,</div><div class='add'>+		.val = PMX_CLCD_PL_80_TO_85_VAL | PMX_CLCD_PL_86_87_VAL |</div><div class='add'>+			PMX_CLCD_PL_88_89_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_90_99_REG,</div><div class='add'>+		.mask = PMX_PL_90_91_MASK | PMX_PL_92_93_MASK |</div><div class='add'>+			PMX_PL_94_95_MASK | PMX_PL_96_97_MASK | PMX_PL_98_MASK,</div><div class='add'>+		.val = PMX_CLCD_PL_90_91_VAL | PMX_CLCD_PL_92_93_VAL |</div><div class='add'>+			PMX_CLCD_PL_94_95_VAL | PMX_CLCD_PL_96_97_VAL |</div><div class='add'>+			PMX_CLCD_PL_98_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux clcd_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = clcd_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(clcd_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup clcd_pingroup = {</div><div class='add'>+	.name = "clcd_grp",</div><div class='add'>+	.pins = clcd_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(clcd_pins),</div><div class='add'>+	.modemuxs = clcd_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(clcd_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const clcd_grps[] = { "clcd_grp" };</div><div class='add'>+static struct spear_function clcd_function = {</div><div class='add'>+	.name = "clcd",</div><div class='add'>+	.groups = clcd_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(clcd_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for EMI (Parallel NOR flash) device */</div><div class='add'>+static const unsigned emi_pins[] = { 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56,</div><div class='add'>+	57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,</div><div class='add'>+	75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92,</div><div class='add'>+	93, 94, 95, 96, 97 };</div><div class='add'>+static struct spear_muxreg emi_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg emi_ext_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_46_47_MASK | PMX_PL_48_49_MASK,</div><div class='add'>+		.val = PMX_FSMC_EMI_PL_46_47_VAL | PMX_FSMC_EMI_PL_48_49_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_50_59_REG,</div><div class='add'>+		.mask = PMX_PL_50_51_MASK | PMX_PL_52_53_MASK |</div><div class='add'>+			PMX_PL_54_55_56_MASK | PMX_PL_58_59_MASK,</div><div class='add'>+		.val = PMX_EMI_PL_50_51_VAL | PMX_EMI_PL_52_53_VAL |</div><div class='add'>+			PMX_FSMC_EMI_PL_54_55_56_VAL |</div><div class='add'>+			PMX_FSMC_EMI_PL_58_59_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_60_69_REG,</div><div class='add'>+		.mask = PMX_PL_69_MASK,</div><div class='add'>+		.val = PMX_EMI_PL_69_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_70_79_REG,</div><div class='add'>+		.mask = PMX_PL_70_MASK | PMX_PL_71_72_MASK | PMX_PL_73_MASK |</div><div class='add'>+			PMX_PL_74_MASK | PMX_PL_75_76_MASK |</div><div class='add'>+			PMX_PL_77_78_79_MASK,</div><div class='add'>+		.val = PMX_FSMC_EMI_PL_70_VAL | PMX_FSMC_EMI_PL_71_72_VAL |</div><div class='add'>+			PMX_FSMC_EMI_PL_73_VAL | PMX_EMI_PL_74_VAL |</div><div class='add'>+			PMX_EMI_PL_75_76_VAL | PMX_EMI_PL_77_78_79_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_80_89_REG,</div><div class='add'>+		.mask = PMX_PL_80_TO_85_MASK | PMX_PL_86_87_MASK |</div><div class='add'>+			PMX_PL_88_89_MASK,</div><div class='add'>+		.val = PMX_EMI_PL_80_TO_85_VAL | PMX_EMI_PL_86_87_VAL |</div><div class='add'>+			PMX_EMI_PL_88_89_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_90_99_REG,</div><div class='add'>+		.mask = PMX_PL_90_91_MASK | PMX_PL_92_93_MASK |</div><div class='add'>+			PMX_PL_94_95_MASK | PMX_PL_96_97_MASK,</div><div class='add'>+		.val = PMX_EMI1_PL_90_91_VAL | PMX_EMI1_PL_92_93_VAL |</div><div class='add'>+			PMX_EMI1_PL_94_95_VAL | PMX_EMI1_PL_96_97_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = EXT_CTRL_REG,</div><div class='add'>+		.mask = EMI_FSMC_DYNAMIC_MUX_MASK,</div><div class='add'>+		.val = EMI_FSMC_DYNAMIC_MUX_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux emi_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_EXP_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = emi_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(emi_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = emi_ext_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(emi_ext_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup emi_pingroup = {</div><div class='add'>+	.name = "emi_grp",</div><div class='add'>+	.pins = emi_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(emi_pins),</div><div class='add'>+	.modemuxs = emi_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(emi_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const emi_grps[] = { "emi_grp" };</div><div class='add'>+static struct spear_function emi_function = {</div><div class='add'>+	.name = "emi",</div><div class='add'>+	.groups = emi_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(emi_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for FSMC (NAND flash) device */</div><div class='add'>+static const unsigned fsmc_8bit_pins[] = { 52, 53, 54, 55, 56, 57, 58, 59, 60,</div><div class='add'>+	61, 62, 63, 64, 65, 66, 67, 68 };</div><div class='add'>+static struct spear_muxreg fsmc_8bit_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_50_59_REG,</div><div class='add'>+		.mask = PMX_PL_52_53_MASK | PMX_PL_54_55_56_MASK |</div><div class='add'>+			PMX_PL_57_MASK | PMX_PL_58_59_MASK,</div><div class='add'>+		.val = PMX_FSMC_PL_52_53_VAL | PMX_FSMC_EMI_PL_54_55_56_VAL |</div><div class='add'>+			PMX_FSMC_PL_57_VAL | PMX_FSMC_EMI_PL_58_59_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_60_69_REG,</div><div class='add'>+		.mask = PMX_PL_60_MASK | PMX_PL_61_TO_64_MASK |</div><div class='add'>+			PMX_PL_65_TO_68_MASK,</div><div class='add'>+		.val = PMX_FSMC_PL_60_VAL | PMX_FSMC_PL_61_TO_64_VAL |</div><div class='add'>+			PMX_FSMC_PL_65_TO_68_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = EXT_CTRL_REG,</div><div class='add'>+		.mask = EMI_FSMC_DYNAMIC_MUX_MASK,</div><div class='add'>+		.val = EMI_FSMC_DYNAMIC_MUX_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux fsmc_8bit_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = fsmc_8bit_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(fsmc_8bit_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup fsmc_8bit_pingroup = {</div><div class='add'>+	.name = "fsmc_8bit_grp",</div><div class='add'>+	.pins = fsmc_8bit_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(fsmc_8bit_pins),</div><div class='add'>+	.modemuxs = fsmc_8bit_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(fsmc_8bit_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned fsmc_16bit_pins[] = { 46, 47, 48, 49, 52, 53, 54, 55, 56,</div><div class='add'>+	57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 70, 71, 72, 73 };</div><div class='add'>+static struct spear_muxreg fsmc_16bit_autoexp_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg fsmc_16bit_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_46_47_MASK | PMX_PL_48_49_MASK,</div><div class='add'>+		.val = PMX_FSMC_EMI_PL_46_47_VAL | PMX_FSMC_EMI_PL_48_49_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_70_79_REG,</div><div class='add'>+		.mask = PMX_PL_70_MASK | PMX_PL_71_72_MASK | PMX_PL_73_MASK,</div><div class='add'>+		.val = PMX_FSMC_EMI_PL_70_VAL | PMX_FSMC_EMI_PL_71_72_VAL |</div><div class='add'>+			PMX_FSMC_EMI_PL_73_VAL,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux fsmc_16bit_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = fsmc_8bit_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(fsmc_8bit_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = AUTO_EXP_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = fsmc_16bit_autoexp_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(fsmc_16bit_autoexp_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = fsmc_16bit_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(fsmc_16bit_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup fsmc_16bit_pingroup = {</div><div class='add'>+	.name = "fsmc_16bit_grp",</div><div class='add'>+	.pins = fsmc_16bit_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(fsmc_16bit_pins),</div><div class='add'>+	.modemuxs = fsmc_16bit_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(fsmc_16bit_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const fsmc_grps[] = { "fsmc_8bit_grp", "fsmc_16bit_grp" };</div><div class='add'>+static struct spear_function fsmc_function = {</div><div class='add'>+	.name = "fsmc",</div><div class='add'>+	.groups = fsmc_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(fsmc_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for SPP device */</div><div class='add'>+static const unsigned spp_pins[] = { 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,</div><div class='add'>+	80, 81, 82, 83, 84, 85 };</div><div class='add'>+static struct spear_muxreg spp_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_60_69_REG,</div><div class='add'>+		.mask = PMX_PL_69_MASK,</div><div class='add'>+		.val = PMX_SPP_PL_69_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_70_79_REG,</div><div class='add'>+		.mask = PMX_PL_70_MASK | PMX_PL_71_72_MASK | PMX_PL_73_MASK |</div><div class='add'>+			PMX_PL_74_MASK | PMX_PL_75_76_MASK |</div><div class='add'>+			PMX_PL_77_78_79_MASK,</div><div class='add'>+		.val = PMX_SPP_PL_70_VAL | PMX_SPP_PL_71_72_VAL |</div><div class='add'>+			PMX_SPP_PL_73_VAL | PMX_SPP_PL_74_VAL |</div><div class='add'>+			PMX_SPP_PL_75_76_VAL | PMX_SPP_PL_77_78_79_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_80_89_REG,</div><div class='add'>+		.mask = PMX_PL_80_TO_85_MASK,</div><div class='add'>+		.val = PMX_SPP_PL_80_TO_85_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux spp_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = spp_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(spp_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup spp_pingroup = {</div><div class='add'>+	.name = "spp_grp",</div><div class='add'>+	.pins = spp_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(spp_pins),</div><div class='add'>+	.modemuxs = spp_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(spp_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const spp_grps[] = { "spp_grp" };</div><div class='add'>+static struct spear_function spp_function = {</div><div class='add'>+	.name = "spp",</div><div class='add'>+	.groups = spp_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(spp_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for SDHCI device */</div><div class='add'>+static const unsigned sdhci_led_pins[] = { 34 };</div><div class='add'>+static struct spear_muxreg sdhci_led_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_SSP_CS_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg sdhci_led_ext_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_34_MASK,</div><div class='add'>+		.val = PMX_PWM2_PL_34_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux sdhci_led_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = sdhci_led_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sdhci_led_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = sdhci_led_ext_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sdhci_led_ext_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup sdhci_led_pingroup = {</div><div class='add'>+	.name = "sdhci_led_grp",</div><div class='add'>+	.pins = sdhci_led_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(sdhci_led_pins),</div><div class='add'>+	.modemuxs = sdhci_led_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(sdhci_led_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned sdhci_cd_12_pins[] = { 12, 43, 44, 45, 46, 47, 48, 49,</div><div class='add'>+	50};</div><div class='add'>+static const unsigned sdhci_cd_51_pins[] = { 43, 44, 45, 46, 47, 48, 49, 50, 51</div><div class='add'>+};</div><div class='add'>+static struct spear_muxreg sdhci_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg sdhci_ext_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_43_MASK | PMX_PL_44_45_MASK | PMX_PL_46_47_MASK |</div><div class='add'>+			PMX_PL_48_49_MASK,</div><div class='add'>+		.val = PMX_SDHCI_PL_43_VAL | PMX_SDHCI_PL_44_45_VAL |</div><div class='add'>+			PMX_SDHCI_PL_46_47_VAL | PMX_SDHCI_PL_48_49_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_50_59_REG,</div><div class='add'>+		.mask = PMX_PL_50_MASK,</div><div class='add'>+		.val = PMX_SDHCI_PL_50_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_90_99_REG,</div><div class='add'>+		.mask = PMX_PL_99_MASK,</div><div class='add'>+		.val = PMX_SDHCI_PL_99_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_PL_100_101_MASK,</div><div class='add'>+		.val = PMX_SDHCI_PL_100_101_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg sdhci_cd_12_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_10_19_REG,</div><div class='add'>+		.mask = PMX_PL_12_MASK,</div><div class='add'>+		.val = PMX_SDHCI_CD_PL_12_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_SDHCI_CD_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_SDHCI_CD_PORT_12_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg sdhci_cd_51_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_50_59_REG,</div><div class='add'>+		.mask = PMX_PL_51_MASK,</div><div class='add'>+		.val = PMX_SDHCI_CD_PL_51_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_SDHCI_CD_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_SDHCI_CD_PORT_51_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define pmx_sdhci_common_modemux					\</div><div class='add'>+	{								\</div><div class='add'>+		.modes = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE |	\</div><div class='add'>+			SMALL_PRINTERS_MODE | EXTENDED_MODE,		\</div><div class='add'>+		.muxregs = sdhci_muxreg,				\</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sdhci_muxreg),			\</div><div class='add'>+	}, {								\</div><div class='add'>+		.modes = EXTENDED_MODE,					\</div><div class='add'>+		.muxregs = sdhci_ext_muxreg,				\</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(sdhci_ext_muxreg),		\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+static struct spear_modemux sdhci_modemux[][3] = {</div><div class='add'>+	{</div><div class='add'>+		/* select pin 12 for cd */</div><div class='add'>+		pmx_sdhci_common_modemux,</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = sdhci_cd_12_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(sdhci_cd_12_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* select pin 51 for cd */</div><div class='add'>+		pmx_sdhci_common_modemux,</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = sdhci_cd_51_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(sdhci_cd_51_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup sdhci_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "sdhci_cd_12_grp",</div><div class='add'>+		.pins = sdhci_cd_12_pins,</div><div class='add'>+		.npins = ARRAY_SIZE(sdhci_cd_12_pins),</div><div class='add'>+		.modemuxs = sdhci_modemux[0],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(sdhci_modemux[0]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "sdhci_cd_51_grp",</div><div class='add'>+		.pins = sdhci_cd_51_pins,</div><div class='add'>+		.npins = ARRAY_SIZE(sdhci_cd_51_pins),</div><div class='add'>+		.modemuxs = sdhci_modemux[1],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(sdhci_modemux[1]),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const sdhci_grps[] = { "sdhci_cd_12_grp", "sdhci_cd_51_grp",</div><div class='add'>+	"sdhci_led_grp" };</div><div class='add'>+</div><div class='add'>+static struct spear_function sdhci_function = {</div><div class='add'>+	.name = "sdhci",</div><div class='add'>+	.groups = sdhci_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(sdhci_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for I2S device */</div><div class='add'>+static const unsigned i2s_pins[] = { 35, 39, 40, 41, 42 };</div><div class='add'>+static struct spear_muxreg i2s_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_SSP_CS_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg i2s_ext_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_35_MASK | PMX_PL_39_MASK,</div><div class='add'>+		.val = PMX_I2S_REF_CLK_PL_35_VAL | PMX_I2S_PL_39_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_40_MASK | PMX_PL_41_42_MASK,</div><div class='add'>+		.val = PMX_I2S_PL_40_VAL | PMX_I2S_PL_41_42_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2s_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = i2s_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2s_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = i2s_ext_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2s_ext_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2s_pingroup = {</div><div class='add'>+	.name = "i2s_grp",</div><div class='add'>+	.pins = i2s_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2s_pins),</div><div class='add'>+	.modemuxs = i2s_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2s_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2s_grps[] = { "i2s_grp" };</div><div class='add'>+static struct spear_function i2s_function = {</div><div class='add'>+	.name = "i2s",</div><div class='add'>+	.groups = i2s_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2s_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for UART1 device */</div><div class='add'>+static const unsigned uart1_pins[] = { 28, 29 };</div><div class='add'>+static struct spear_muxreg uart1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart1_ext_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_20_29_REG,</div><div class='add'>+		.mask = PMX_PL_28_29_MASK,</div><div class='add'>+		.val = PMX_UART1_PL_28_29_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE</div><div class='add'>+			| SMALL_PRINTERS_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = uart1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart1_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = uart1_ext_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart1_ext_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart1_pingroup = {</div><div class='add'>+	.name = "uart1_grp",</div><div class='add'>+	.pins = uart1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart1_pins),</div><div class='add'>+	.modemuxs = uart1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart1_grps[] = { "uart1_grp" };</div><div class='add'>+static struct spear_function uart1_function = {</div><div class='add'>+	.name = "uart1",</div><div class='add'>+	.groups = uart1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for UART1 Modem device */</div><div class='add'>+static const unsigned uart1_modem_2_to_7_pins[] = { 2, 3, 4, 5, 6, 7 };</div><div class='add'>+static const unsigned uart1_modem_31_to_36_pins[] = { 31, 32, 33, 34, 35, 36 };</div><div class='add'>+static const unsigned uart1_modem_34_to_45_pins[] = { 34, 35, 36, 43, 44, 45 };</div><div class='add'>+static const unsigned uart1_modem_80_to_85_pins[] = { 80, 81, 82, 83, 84, 85 };</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart1_modem_ext_2_to_7_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MASK | PMX_I2C_MASK | PMX_SSP_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_2_3_MASK | PMX_PL_6_7_MASK,</div><div class='add'>+		.val = PMX_UART1_ENH_PL_2_3_VAL | PMX_UART1_ENH_PL_4_5_VAL |</div><div class='add'>+			PMX_UART1_ENH_PL_6_7_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART1_ENH_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART1_ENH_PORT_3_TO_5_7_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart1_modem_31_to_36_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_GPIO_PIN3_MASK | PMX_GPIO_PIN4_MASK |</div><div class='add'>+			PMX_GPIO_PIN5_MASK | PMX_SSP_CS_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart1_modem_ext_31_to_36_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_31_MASK | PMX_PL_32_33_MASK | PMX_PL_34_MASK |</div><div class='add'>+			PMX_PL_35_MASK | PMX_PL_36_MASK,</div><div class='add'>+		.val = PMX_UART1_ENH_PL_31_VAL | PMX_UART1_ENH_PL_32_33_VAL |</div><div class='add'>+			PMX_UART1_ENH_PL_34_VAL | PMX_UART1_ENH_PL_35_VAL |</div><div class='add'>+			PMX_UART1_ENH_PL_36_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART1_ENH_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART1_ENH_PORT_32_TO_34_36_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart1_modem_34_to_45_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK |</div><div class='add'>+			PMX_SSP_CS_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart1_modem_ext_34_to_45_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_34_MASK | PMX_PL_35_MASK | PMX_PL_36_MASK,</div><div class='add'>+		.val = PMX_UART1_ENH_PL_34_VAL | PMX_UART1_ENH_PL_35_VAL |</div><div class='add'>+			PMX_UART1_ENH_PL_36_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_43_MASK | PMX_PL_44_45_MASK,</div><div class='add'>+		.val = PMX_UART1_ENH_PL_43_VAL | PMX_UART1_ENH_PL_44_45_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART1_ENH_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART1_ENH_PORT_44_45_34_36_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart1_modem_ext_80_to_85_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_80_89_REG,</div><div class='add'>+		.mask = PMX_PL_80_TO_85_MASK,</div><div class='add'>+		.val = PMX_UART1_ENH_PL_80_TO_85_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_43_MASK | PMX_PL_44_45_MASK,</div><div class='add'>+		.val = PMX_UART1_ENH_PL_43_VAL | PMX_UART1_ENH_PL_44_45_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART1_ENH_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART1_ENH_PORT_81_TO_85_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart1_modem_2_to_7_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = uart1_modem_ext_2_to_7_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart1_modem_ext_2_to_7_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart1_modem_31_to_36_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = SMALL_PRINTERS_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = uart1_modem_31_to_36_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart1_modem_31_to_36_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = uart1_modem_ext_31_to_36_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart1_modem_ext_31_to_36_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart1_modem_34_to_45_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_EXP_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = uart1_modem_34_to_45_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart1_modem_34_to_45_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = uart1_modem_ext_34_to_45_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart1_modem_ext_34_to_45_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart1_modem_80_to_85_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = uart1_modem_ext_80_to_85_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart1_modem_ext_80_to_85_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart1_modem_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "uart1_modem_2_to_7_grp",</div><div class='add'>+		.pins = uart1_modem_2_to_7_pins,</div><div class='add'>+		.npins = ARRAY_SIZE(uart1_modem_2_to_7_pins),</div><div class='add'>+		.modemuxs = uart1_modem_2_to_7_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart1_modem_2_to_7_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart1_modem_31_to_36_grp",</div><div class='add'>+		.pins = uart1_modem_31_to_36_pins,</div><div class='add'>+		.npins = ARRAY_SIZE(uart1_modem_31_to_36_pins),</div><div class='add'>+		.modemuxs = uart1_modem_31_to_36_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart1_modem_31_to_36_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart1_modem_34_to_45_grp",</div><div class='add'>+		.pins = uart1_modem_34_to_45_pins,</div><div class='add'>+		.npins = ARRAY_SIZE(uart1_modem_34_to_45_pins),</div><div class='add'>+		.modemuxs = uart1_modem_34_to_45_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart1_modem_34_to_45_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart1_modem_80_to_85_grp",</div><div class='add'>+		.pins = uart1_modem_80_to_85_pins,</div><div class='add'>+		.npins = ARRAY_SIZE(uart1_modem_80_to_85_pins),</div><div class='add'>+		.modemuxs = uart1_modem_80_to_85_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart1_modem_80_to_85_modemux),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart1_modem_grps[] = { "uart1_modem_2_to_7_grp",</div><div class='add'>+	"uart1_modem_31_to_36_grp", "uart1_modem_34_to_45_grp",</div><div class='add'>+	"uart1_modem_80_to_85_grp" };</div><div class='add'>+static struct spear_function uart1_modem_function = {</div><div class='add'>+	.name = "uart1_modem",</div><div class='add'>+	.groups = uart1_modem_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart1_modem_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for UART2 device */</div><div class='add'>+static const unsigned uart2_pins[] = { 0, 1 };</div><div class='add'>+static struct spear_muxreg uart2_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_FIRDA_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart2_ext_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_0_1_MASK,</div><div class='add'>+		.val = PMX_UART2_PL_0_1_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE</div><div class='add'>+			| SMALL_PRINTERS_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = uart2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart2_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = uart2_ext_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart2_ext_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart2_pingroup = {</div><div class='add'>+	.name = "uart2_grp",</div><div class='add'>+	.pins = uart2_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart2_pins),</div><div class='add'>+	.modemuxs = uart2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart2_grps[] = { "uart2_grp" };</div><div class='add'>+static struct spear_function uart2_function = {</div><div class='add'>+	.name = "uart2",</div><div class='add'>+	.groups = uart2_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart2_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for uart3 device */</div><div class='add'>+static const unsigned uart3_pins[][2] = { { 8, 9 }, { 15, 16 }, { 41, 42 },</div><div class='add'>+	{ 52, 53 }, { 73, 74 }, { 94, 95 }, { 98, 99 } };</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart3_ext_8_9_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_SSP_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_8_9_MASK,</div><div class='add'>+		.val = PMX_UART3_PL_8_9_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART3_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART3_PORT_8_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart3_ext_15_16_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_10_19_REG,</div><div class='add'>+		.mask = PMX_PL_15_16_MASK,</div><div class='add'>+		.val = PMX_UART3_PL_15_16_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART3_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART3_PORT_15_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart3_ext_41_42_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_41_42_MASK,</div><div class='add'>+		.val = PMX_UART3_PL_41_42_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART3_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART3_PORT_41_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart3_ext_52_53_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_50_59_REG,</div><div class='add'>+		.mask = PMX_PL_52_53_MASK,</div><div class='add'>+		.val = PMX_UART3_PL_52_53_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART3_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART3_PORT_52_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart3_ext_73_74_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_70_79_REG,</div><div class='add'>+		.mask = PMX_PL_73_MASK | PMX_PL_74_MASK,</div><div class='add'>+		.val = PMX_UART3_PL_73_VAL | PMX_UART3_PL_74_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART3_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART3_PORT_73_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart3_ext_94_95_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_90_99_REG,</div><div class='add'>+		.mask = PMX_PL_94_95_MASK,</div><div class='add'>+		.val = PMX_UART3_PL_94_95_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART3_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART3_PORT_94_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart3_ext_98_99_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_90_99_REG,</div><div class='add'>+		.mask = PMX_PL_98_MASK | PMX_PL_99_MASK,</div><div class='add'>+		.val = PMX_UART3_PL_98_VAL | PMX_UART3_PL_99_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART3_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART3_PORT_99_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart3_modemux[][1] = {</div><div class='add'>+	{</div><div class='add'>+		/* Select signals on pins 8_9 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart3_ext_8_9_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart3_ext_8_9_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 15_16 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart3_ext_15_16_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart3_ext_15_16_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 41_42 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart3_ext_41_42_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart3_ext_41_42_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 52_53 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart3_ext_52_53_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart3_ext_52_53_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 73_74 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart3_ext_73_74_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart3_ext_73_74_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 94_95 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart3_ext_94_95_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart3_ext_94_95_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 98_99 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart3_ext_98_99_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart3_ext_98_99_muxreg),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart3_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "uart3_8_9_grp",</div><div class='add'>+		.pins = uart3_pins[0],</div><div class='add'>+		.npins = ARRAY_SIZE(uart3_pins[0]),</div><div class='add'>+		.modemuxs = uart3_modemux[0],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart3_modemux[0]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart3_15_16_grp",</div><div class='add'>+		.pins = uart3_pins[1],</div><div class='add'>+		.npins = ARRAY_SIZE(uart3_pins[1]),</div><div class='add'>+		.modemuxs = uart3_modemux[1],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart3_modemux[1]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart3_41_42_grp",</div><div class='add'>+		.pins = uart3_pins[2],</div><div class='add'>+		.npins = ARRAY_SIZE(uart3_pins[2]),</div><div class='add'>+		.modemuxs = uart3_modemux[2],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart3_modemux[2]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart3_52_53_grp",</div><div class='add'>+		.pins = uart3_pins[3],</div><div class='add'>+		.npins = ARRAY_SIZE(uart3_pins[3]),</div><div class='add'>+		.modemuxs = uart3_modemux[3],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart3_modemux[3]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart3_73_74_grp",</div><div class='add'>+		.pins = uart3_pins[4],</div><div class='add'>+		.npins = ARRAY_SIZE(uart3_pins[4]),</div><div class='add'>+		.modemuxs = uart3_modemux[4],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart3_modemux[4]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart3_94_95_grp",</div><div class='add'>+		.pins = uart3_pins[5],</div><div class='add'>+		.npins = ARRAY_SIZE(uart3_pins[5]),</div><div class='add'>+		.modemuxs = uart3_modemux[5],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart3_modemux[5]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart3_98_99_grp",</div><div class='add'>+		.pins = uart3_pins[6],</div><div class='add'>+		.npins = ARRAY_SIZE(uart3_pins[6]),</div><div class='add'>+		.modemuxs = uart3_modemux[6],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart3_modemux[6]),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart3_grps[] = { "uart3_8_9_grp", "uart3_15_16_grp",</div><div class='add'>+	"uart3_41_42_grp", "uart3_52_53_grp", "uart3_73_74_grp",</div><div class='add'>+	"uart3_94_95_grp", "uart3_98_99_grp" };</div><div class='add'>+</div><div class='add'>+static struct spear_function uart3_function = {</div><div class='add'>+	.name = "uart3",</div><div class='add'>+	.groups = uart3_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart3_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for uart4 device */</div><div class='add'>+static const unsigned uart4_pins[][2] = { { 6, 7 }, { 13, 14 }, { 39, 40 },</div><div class='add'>+	{ 71, 72 }, { 92, 93 }, { 100, 101 } };</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart4_ext_6_7_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_SSP_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_6_7_MASK,</div><div class='add'>+		.val = PMX_UART4_PL_6_7_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART4_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART4_PORT_6_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart4_ext_13_14_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_10_19_REG,</div><div class='add'>+		.mask = PMX_PL_13_14_MASK,</div><div class='add'>+		.val = PMX_UART4_PL_13_14_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART4_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART4_PORT_13_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart4_ext_39_40_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_39_MASK,</div><div class='add'>+		.val = PMX_UART4_PL_39_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_40_MASK,</div><div class='add'>+		.val = PMX_UART4_PL_40_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART4_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART4_PORT_39_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart4_ext_71_72_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_70_79_REG,</div><div class='add'>+		.mask = PMX_PL_71_72_MASK,</div><div class='add'>+		.val = PMX_UART4_PL_71_72_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART4_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART4_PORT_71_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart4_ext_92_93_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_90_99_REG,</div><div class='add'>+		.mask = PMX_PL_92_93_MASK,</div><div class='add'>+		.val = PMX_UART4_PL_92_93_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART4_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART4_PORT_92_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart4_ext_100_101_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_PL_100_101_MASK |</div><div class='add'>+			PMX_UART4_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART4_PL_100_101_VAL |</div><div class='add'>+			PMX_UART4_PORT_101_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart4_modemux[][1] = {</div><div class='add'>+	{</div><div class='add'>+		/* Select signals on pins 6_7 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart4_ext_6_7_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart4_ext_6_7_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 13_14 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart4_ext_13_14_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart4_ext_13_14_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 39_40 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart4_ext_39_40_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart4_ext_39_40_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 71_72 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart4_ext_71_72_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart4_ext_71_72_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 92_93 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart4_ext_92_93_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart4_ext_92_93_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 100_101_ */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart4_ext_100_101_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart4_ext_100_101_muxreg),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart4_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "uart4_6_7_grp",</div><div class='add'>+		.pins = uart4_pins[0],</div><div class='add'>+		.npins = ARRAY_SIZE(uart4_pins[0]),</div><div class='add'>+		.modemuxs = uart4_modemux[0],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart4_modemux[0]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart4_13_14_grp",</div><div class='add'>+		.pins = uart4_pins[1],</div><div class='add'>+		.npins = ARRAY_SIZE(uart4_pins[1]),</div><div class='add'>+		.modemuxs = uart4_modemux[1],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart4_modemux[1]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart4_39_40_grp",</div><div class='add'>+		.pins = uart4_pins[2],</div><div class='add'>+		.npins = ARRAY_SIZE(uart4_pins[2]),</div><div class='add'>+		.modemuxs = uart4_modemux[2],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart4_modemux[2]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart4_71_72_grp",</div><div class='add'>+		.pins = uart4_pins[3],</div><div class='add'>+		.npins = ARRAY_SIZE(uart4_pins[3]),</div><div class='add'>+		.modemuxs = uart4_modemux[3],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart4_modemux[3]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart4_92_93_grp",</div><div class='add'>+		.pins = uart4_pins[4],</div><div class='add'>+		.npins = ARRAY_SIZE(uart4_pins[4]),</div><div class='add'>+		.modemuxs = uart4_modemux[4],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart4_modemux[4]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart4_100_101_grp",</div><div class='add'>+		.pins = uart4_pins[5],</div><div class='add'>+		.npins = ARRAY_SIZE(uart4_pins[5]),</div><div class='add'>+		.modemuxs = uart4_modemux[5],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart4_modemux[5]),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart4_grps[] = { "uart4_6_7_grp", "uart4_13_14_grp",</div><div class='add'>+	"uart4_39_40_grp", "uart4_71_72_grp", "uart4_92_93_grp",</div><div class='add'>+	"uart4_100_101_grp" };</div><div class='add'>+</div><div class='add'>+static struct spear_function uart4_function = {</div><div class='add'>+	.name = "uart4",</div><div class='add'>+	.groups = uart4_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart4_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for uart5 device */</div><div class='add'>+static const unsigned uart5_pins[][2] = { { 4, 5 }, { 37, 38 }, { 69, 70 },</div><div class='add'>+	{ 90, 91 } };</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart5_ext_4_5_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_I2C_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_4_5_MASK,</div><div class='add'>+		.val = PMX_UART5_PL_4_5_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART5_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART5_PORT_4_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart5_ext_37_38_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_37_38_MASK,</div><div class='add'>+		.val = PMX_UART5_PL_37_38_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART5_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART5_PORT_37_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart5_ext_69_70_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_60_69_REG,</div><div class='add'>+		.mask = PMX_PL_69_MASK,</div><div class='add'>+		.val = PMX_UART5_PL_69_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_70_79_REG,</div><div class='add'>+		.mask = PMX_PL_70_MASK,</div><div class='add'>+		.val = PMX_UART5_PL_70_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART5_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART5_PORT_69_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart5_ext_90_91_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_90_99_REG,</div><div class='add'>+		.mask = PMX_PL_90_91_MASK,</div><div class='add'>+		.val = PMX_UART5_PL_90_91_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART5_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART5_PORT_90_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart5_modemux[][1] = {</div><div class='add'>+	{</div><div class='add'>+		/* Select signals on pins 4_5 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart5_ext_4_5_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart5_ext_4_5_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 37_38 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart5_ext_37_38_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart5_ext_37_38_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 69_70 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart5_ext_69_70_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart5_ext_69_70_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 90_91 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart5_ext_90_91_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart5_ext_90_91_muxreg),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart5_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "uart5_4_5_grp",</div><div class='add'>+		.pins = uart5_pins[0],</div><div class='add'>+		.npins = ARRAY_SIZE(uart5_pins[0]),</div><div class='add'>+		.modemuxs = uart5_modemux[0],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart5_modemux[0]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart5_37_38_grp",</div><div class='add'>+		.pins = uart5_pins[1],</div><div class='add'>+		.npins = ARRAY_SIZE(uart5_pins[1]),</div><div class='add'>+		.modemuxs = uart5_modemux[1],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart5_modemux[1]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart5_69_70_grp",</div><div class='add'>+		.pins = uart5_pins[2],</div><div class='add'>+		.npins = ARRAY_SIZE(uart5_pins[2]),</div><div class='add'>+		.modemuxs = uart5_modemux[2],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart5_modemux[2]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart5_90_91_grp",</div><div class='add'>+		.pins = uart5_pins[3],</div><div class='add'>+		.npins = ARRAY_SIZE(uart5_pins[3]),</div><div class='add'>+		.modemuxs = uart5_modemux[3],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart5_modemux[3]),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart5_grps[] = { "uart5_4_5_grp", "uart5_37_38_grp",</div><div class='add'>+	"uart5_69_70_grp", "uart5_90_91_grp" };</div><div class='add'>+static struct spear_function uart5_function = {</div><div class='add'>+	.name = "uart5",</div><div class='add'>+	.groups = uart5_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart5_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for uart6 device */</div><div class='add'>+static const unsigned uart6_pins[][2] = { { 2, 3 }, { 88, 89 } };</div><div class='add'>+static struct spear_muxreg uart6_ext_2_3_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_2_3_MASK,</div><div class='add'>+		.val = PMX_UART6_PL_2_3_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART6_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART6_PORT_2_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg uart6_ext_88_89_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_80_89_REG,</div><div class='add'>+		.mask = PMX_PL_88_89_MASK,</div><div class='add'>+		.val = PMX_UART6_PL_88_89_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_UART6_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_UART6_PORT_88_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart6_modemux[][1] = {</div><div class='add'>+	{</div><div class='add'>+		/* Select signals on pins 2_3 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart6_ext_2_3_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart6_ext_2_3_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 88_89 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = uart6_ext_88_89_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(uart6_ext_88_89_muxreg),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup uart6_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "uart6_2_3_grp",</div><div class='add'>+		.pins = uart6_pins[0],</div><div class='add'>+		.npins = ARRAY_SIZE(uart6_pins[0]),</div><div class='add'>+		.modemuxs = uart6_modemux[0],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart6_modemux[0]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "uart6_88_89_grp",</div><div class='add'>+		.pins = uart6_pins[1],</div><div class='add'>+		.npins = ARRAY_SIZE(uart6_pins[1]),</div><div class='add'>+		.modemuxs = uart6_modemux[1],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(uart6_modemux[1]),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart6_grps[] = { "uart6_2_3_grp", "uart6_88_89_grp" };</div><div class='add'>+static struct spear_function uart6_function = {</div><div class='add'>+	.name = "uart6",</div><div class='add'>+	.groups = uart6_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart6_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* UART - RS485 pmx */</div><div class='add'>+static const unsigned rs485_pins[] = { 77, 78, 79 };</div><div class='add'>+static struct spear_muxreg rs485_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_70_79_REG,</div><div class='add'>+		.mask = PMX_PL_77_78_79_MASK,</div><div class='add'>+		.val = PMX_RS485_PL_77_78_79_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux rs485_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = rs485_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(rs485_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup rs485_pingroup = {</div><div class='add'>+	.name = "rs485_grp",</div><div class='add'>+	.pins = rs485_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(rs485_pins),</div><div class='add'>+	.modemuxs = rs485_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(rs485_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const rs485_grps[] = { "rs485_grp" };</div><div class='add'>+static struct spear_function rs485_function = {</div><div class='add'>+	.name = "rs485",</div><div class='add'>+	.groups = rs485_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(rs485_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for Touchscreen device */</div><div class='add'>+static const unsigned touchscreen_pins[] = { 5, 36 };</div><div class='add'>+static struct spear_muxreg touchscreen_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_I2C_MASK | PMX_SSP_CS_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg touchscreen_ext_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_5_MASK,</div><div class='add'>+		.val = PMX_TOUCH_Y_PL_5_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_36_MASK,</div><div class='add'>+		.val = PMX_TOUCH_X_PL_36_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux touchscreen_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_NET_SMII_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = touchscreen_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(touchscreen_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = touchscreen_ext_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(touchscreen_ext_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup touchscreen_pingroup = {</div><div class='add'>+	.name = "touchscreen_grp",</div><div class='add'>+	.pins = touchscreen_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(touchscreen_pins),</div><div class='add'>+	.modemuxs = touchscreen_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(touchscreen_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const touchscreen_grps[] = { "touchscreen_grp" };</div><div class='add'>+static struct spear_function touchscreen_function = {</div><div class='add'>+	.name = "touchscreen",</div><div class='add'>+	.groups = touchscreen_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(touchscreen_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for CAN device */</div><div class='add'>+static const unsigned can0_pins[] = { 32, 33 };</div><div class='add'>+static struct spear_muxreg can0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg can0_ext_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_32_33_MASK,</div><div class='add'>+		.val = PMX_CAN0_PL_32_33_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux can0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE</div><div class='add'>+			| EXTENDED_MODE,</div><div class='add'>+		.muxregs = can0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(can0_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = can0_ext_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(can0_ext_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup can0_pingroup = {</div><div class='add'>+	.name = "can0_grp",</div><div class='add'>+	.pins = can0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(can0_pins),</div><div class='add'>+	.modemuxs = can0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(can0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const can0_grps[] = { "can0_grp" };</div><div class='add'>+static struct spear_function can0_function = {</div><div class='add'>+	.name = "can0",</div><div class='add'>+	.groups = can0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(can0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned can1_pins[] = { 30, 31 };</div><div class='add'>+static struct spear_muxreg can1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg can1_ext_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_30_31_MASK,</div><div class='add'>+		.val = PMX_CAN1_PL_30_31_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux can1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE</div><div class='add'>+			| EXTENDED_MODE,</div><div class='add'>+		.muxregs = can1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(can1_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = can1_ext_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(can1_ext_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup can1_pingroup = {</div><div class='add'>+	.name = "can1_grp",</div><div class='add'>+	.pins = can1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(can1_pins),</div><div class='add'>+	.modemuxs = can1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(can1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const can1_grps[] = { "can1_grp" };</div><div class='add'>+static struct spear_function can1_function = {</div><div class='add'>+	.name = "can1",</div><div class='add'>+	.groups = can1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(can1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for PWM0_1 device */</div><div class='add'>+static const unsigned pwm0_1_pins[][2] = { { 37, 38 }, { 14, 15 }, { 8, 9 },</div><div class='add'>+	{ 30, 31 }, { 42, 43 }, { 59, 60 }, { 88, 89 } };</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm0_1_pin_8_9_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_SSP_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_8_9_MASK,</div><div class='add'>+		.val = PMX_PWM_0_1_PL_8_9_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm0_1_autoexpsmallpri_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm0_1_pin_14_15_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_10_19_REG,</div><div class='add'>+		.mask = PMX_PL_14_MASK | PMX_PL_15_MASK,</div><div class='add'>+		.val = PMX_PWM1_PL_14_VAL | PMX_PWM0_PL_15_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm0_1_pin_30_31_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_30_MASK | PMX_PL_31_MASK,</div><div class='add'>+		.val = PMX_PWM1_EXT_PL_30_VAL | PMX_PWM0_EXT_PL_31_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm0_1_net_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm0_1_pin_37_38_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_37_38_MASK,</div><div class='add'>+		.val = PMX_PWM0_1_PL_37_38_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm0_1_pin_42_43_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_0_1_MASK ,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_42_MASK | PMX_PL_43_MASK,</div><div class='add'>+		.val = PMX_PWM1_PL_42_VAL |</div><div class='add'>+			PMX_PWM0_PL_43_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm0_1_pin_59_60_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_50_59_REG,</div><div class='add'>+		.mask = PMX_PL_59_MASK,</div><div class='add'>+		.val = PMX_PWM1_PL_59_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_60_69_REG,</div><div class='add'>+		.mask = PMX_PL_60_MASK,</div><div class='add'>+		.val = PMX_PWM0_PL_60_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm0_1_pin_88_89_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_80_89_REG,</div><div class='add'>+		.mask = PMX_PL_88_89_MASK,</div><div class='add'>+		.val = PMX_PWM0_1_PL_88_89_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm0_1_pin_8_9_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm0_1_pin_8_9_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm0_1_pin_8_9_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm0_1_pin_14_15_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm0_1_autoexpsmallpri_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm0_1_autoexpsmallpri_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm0_1_pin_14_15_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm0_1_pin_14_15_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm0_1_pin_30_31_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm0_1_pin_30_31_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm0_1_pin_30_31_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm0_1_pin_37_38_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm0_1_net_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm0_1_net_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm0_1_pin_37_38_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm0_1_pin_37_38_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm0_1_pin_42_43_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm0_1_pin_42_43_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm0_1_pin_42_43_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm0_1_pin_59_60_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm0_1_pin_59_60_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm0_1_pin_59_60_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm0_1_pin_88_89_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm0_1_pin_88_89_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm0_1_pin_88_89_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup pwm0_1_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "pwm0_1_pin_8_9_grp",</div><div class='add'>+		.pins = pwm0_1_pins[0],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm0_1_pins[0]),</div><div class='add'>+		.modemuxs = pwm0_1_pin_8_9_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm0_1_pin_8_9_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm0_1_pin_14_15_grp",</div><div class='add'>+		.pins = pwm0_1_pins[1],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm0_1_pins[1]),</div><div class='add'>+		.modemuxs = pwm0_1_pin_14_15_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm0_1_pin_14_15_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm0_1_pin_30_31_grp",</div><div class='add'>+		.pins = pwm0_1_pins[2],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm0_1_pins[2]),</div><div class='add'>+		.modemuxs = pwm0_1_pin_30_31_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm0_1_pin_30_31_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm0_1_pin_37_38_grp",</div><div class='add'>+		.pins = pwm0_1_pins[3],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm0_1_pins[3]),</div><div class='add'>+		.modemuxs = pwm0_1_pin_37_38_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm0_1_pin_37_38_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm0_1_pin_42_43_grp",</div><div class='add'>+		.pins = pwm0_1_pins[4],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm0_1_pins[4]),</div><div class='add'>+		.modemuxs = pwm0_1_pin_42_43_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm0_1_pin_42_43_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm0_1_pin_59_60_grp",</div><div class='add'>+		.pins = pwm0_1_pins[5],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm0_1_pins[5]),</div><div class='add'>+		.modemuxs = pwm0_1_pin_59_60_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm0_1_pin_59_60_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm0_1_pin_88_89_grp",</div><div class='add'>+		.pins = pwm0_1_pins[6],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm0_1_pins[6]),</div><div class='add'>+		.modemuxs = pwm0_1_pin_88_89_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm0_1_pin_88_89_modemux),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const pwm0_1_grps[] = { "pwm0_1_pin_8_9_grp",</div><div class='add'>+	"pwm0_1_pin_14_15_grp", "pwm0_1_pin_30_31_grp", "pwm0_1_pin_37_38_grp",</div><div class='add'>+	"pwm0_1_pin_42_43_grp", "pwm0_1_pin_59_60_grp", "pwm0_1_pin_88_89_grp"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_function pwm0_1_function = {</div><div class='add'>+	.name = "pwm0_1",</div><div class='add'>+	.groups = pwm0_1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(pwm0_1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for PWM2 device */</div><div class='add'>+static const unsigned pwm2_pins[][1] = { { 7 }, { 13 }, { 29 }, { 34 }, { 41 },</div><div class='add'>+	{ 58 }, { 87 } };</div><div class='add'>+static struct spear_muxreg pwm2_net_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_SSP_CS_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm2_pin_7_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_7_MASK,</div><div class='add'>+		.val = PMX_PWM_2_PL_7_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm2_autoexpsmallpri_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm2_pin_13_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_10_19_REG,</div><div class='add'>+		.mask = PMX_PL_13_MASK,</div><div class='add'>+		.val = PMX_PWM2_PL_13_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm2_pin_29_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_GPIO_PIN1_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_20_29_REG,</div><div class='add'>+		.mask = PMX_PL_29_MASK,</div><div class='add'>+		.val = PMX_PWM_2_PL_29_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm2_pin_34_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_SSP_CS_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_34_MASK,</div><div class='add'>+		.val = PMX_PWM2_PL_34_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm2_pin_41_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_41_MASK,</div><div class='add'>+		.val = PMX_PWM2_PL_41_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm2_pin_58_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_50_59_REG,</div><div class='add'>+		.mask = PMX_PL_58_MASK,</div><div class='add'>+		.val = PMX_PWM2_PL_58_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm2_pin_87_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_80_89_REG,</div><div class='add'>+		.mask = PMX_PL_87_MASK,</div><div class='add'>+		.val = PMX_PWM2_PL_87_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm2_pin_7_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm2_net_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm2_net_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm2_pin_7_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm2_pin_7_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+static struct spear_modemux pwm2_pin_13_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm2_autoexpsmallpri_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm2_autoexpsmallpri_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm2_pin_13_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm2_pin_13_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+static struct spear_modemux pwm2_pin_29_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm2_pin_29_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm2_pin_29_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+static struct spear_modemux pwm2_pin_34_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm2_pin_34_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm2_pin_34_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm2_pin_41_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm2_pin_41_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm2_pin_41_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm2_pin_58_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm2_pin_58_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm2_pin_58_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm2_pin_87_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm2_pin_87_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm2_pin_87_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup pwm2_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "pwm2_pin_7_grp",</div><div class='add'>+		.pins = pwm2_pins[0],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm2_pins[0]),</div><div class='add'>+		.modemuxs = pwm2_pin_7_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm2_pin_7_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm2_pin_13_grp",</div><div class='add'>+		.pins = pwm2_pins[1],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm2_pins[1]),</div><div class='add'>+		.modemuxs = pwm2_pin_13_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm2_pin_13_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm2_pin_29_grp",</div><div class='add'>+		.pins = pwm2_pins[2],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm2_pins[2]),</div><div class='add'>+		.modemuxs = pwm2_pin_29_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm2_pin_29_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm2_pin_34_grp",</div><div class='add'>+		.pins = pwm2_pins[3],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm2_pins[3]),</div><div class='add'>+		.modemuxs = pwm2_pin_34_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm2_pin_34_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm2_pin_41_grp",</div><div class='add'>+		.pins = pwm2_pins[4],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm2_pins[4]),</div><div class='add'>+		.modemuxs = pwm2_pin_41_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm2_pin_41_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm2_pin_58_grp",</div><div class='add'>+		.pins = pwm2_pins[5],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm2_pins[5]),</div><div class='add'>+		.modemuxs = pwm2_pin_58_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm2_pin_58_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm2_pin_87_grp",</div><div class='add'>+		.pins = pwm2_pins[6],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm2_pins[6]),</div><div class='add'>+		.modemuxs = pwm2_pin_87_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm2_pin_87_modemux),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const pwm2_grps[] = { "pwm2_pin_7_grp", "pwm2_pin_13_grp",</div><div class='add'>+	"pwm2_pin_29_grp", "pwm2_pin_34_grp", "pwm2_pin_41_grp",</div><div class='add'>+	"pwm2_pin_58_grp", "pwm2_pin_87_grp" };</div><div class='add'>+static struct spear_function pwm2_function = {</div><div class='add'>+	.name = "pwm2",</div><div class='add'>+	.groups = pwm2_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(pwm2_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for PWM3 device */</div><div class='add'>+static const unsigned pwm3_pins[][1] = { { 6 }, { 12 }, { 28 }, { 40 }, { 57 },</div><div class='add'>+	{ 86 } };</div><div class='add'>+static struct spear_muxreg pwm3_pin_6_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_SSP_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_6_MASK,</div><div class='add'>+		.val = PMX_PWM_3_PL_6_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm3_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm3_pin_12_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_10_19_REG,</div><div class='add'>+		.mask = PMX_PL_12_MASK,</div><div class='add'>+		.val = PMX_PWM3_PL_12_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm3_pin_28_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_GPIO_PIN0_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_20_29_REG,</div><div class='add'>+		.mask = PMX_PL_28_MASK,</div><div class='add'>+		.val = PMX_PWM_3_PL_28_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm3_pin_40_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_40_MASK,</div><div class='add'>+		.val = PMX_PWM3_PL_40_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm3_pin_57_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_50_59_REG,</div><div class='add'>+		.mask = PMX_PL_57_MASK,</div><div class='add'>+		.val = PMX_PWM3_PL_57_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg pwm3_pin_86_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_80_89_REG,</div><div class='add'>+		.mask = PMX_PL_86_MASK,</div><div class='add'>+		.val = PMX_PWM3_PL_86_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm3_pin_6_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm3_pin_6_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm3_pin_6_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm3_pin_12_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_EXP_MODE | SMALL_PRINTERS_MODE |</div><div class='add'>+			AUTO_NET_SMII_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm3_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm3_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm3_pin_12_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm3_pin_12_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm3_pin_28_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm3_pin_28_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm3_pin_28_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm3_pin_40_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm3_pin_40_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm3_pin_40_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm3_pin_57_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm3_pin_57_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm3_pin_57_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux pwm3_pin_86_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = pwm3_pin_86_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(pwm3_pin_86_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup pwm3_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "pwm3_pin_6_grp",</div><div class='add'>+		.pins = pwm3_pins[0],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm3_pins[0]),</div><div class='add'>+		.modemuxs = pwm3_pin_6_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm3_pin_6_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm3_pin_12_grp",</div><div class='add'>+		.pins = pwm3_pins[1],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm3_pins[1]),</div><div class='add'>+		.modemuxs = pwm3_pin_12_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm3_pin_12_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm3_pin_28_grp",</div><div class='add'>+		.pins = pwm3_pins[2],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm3_pins[2]),</div><div class='add'>+		.modemuxs = pwm3_pin_28_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm3_pin_28_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm3_pin_40_grp",</div><div class='add'>+		.pins = pwm3_pins[3],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm3_pins[3]),</div><div class='add'>+		.modemuxs = pwm3_pin_40_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm3_pin_40_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm3_pin_57_grp",</div><div class='add'>+		.pins = pwm3_pins[4],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm3_pins[4]),</div><div class='add'>+		.modemuxs = pwm3_pin_57_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm3_pin_57_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "pwm3_pin_86_grp",</div><div class='add'>+		.pins = pwm3_pins[5],</div><div class='add'>+		.npins = ARRAY_SIZE(pwm3_pins[5]),</div><div class='add'>+		.modemuxs = pwm3_pin_86_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(pwm3_pin_86_modemux),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const pwm3_grps[] = { "pwm3_pin_6_grp", "pwm3_pin_12_grp",</div><div class='add'>+	"pwm3_pin_28_grp", "pwm3_pin_40_grp", "pwm3_pin_57_grp",</div><div class='add'>+	"pwm3_pin_86_grp" };</div><div class='add'>+static struct spear_function pwm3_function = {</div><div class='add'>+	.name = "pwm3",</div><div class='add'>+	.groups = pwm3_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(pwm3_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for SSP1 device */</div><div class='add'>+static const unsigned ssp1_pins[][2] = { { 17, 20 }, { 36, 39 }, { 48, 51 },</div><div class='add'>+	{ 65, 68 }, { 94, 97 } };</div><div class='add'>+static struct spear_muxreg ssp1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg ssp1_ext_17_20_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_10_19_REG,</div><div class='add'>+		.mask = PMX_PL_17_18_MASK | PMX_PL_19_MASK,</div><div class='add'>+		.val = PMX_SSP1_PL_17_18_19_20_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_20_29_REG,</div><div class='add'>+		.mask = PMX_PL_20_MASK,</div><div class='add'>+		.val = PMX_SSP1_PL_17_18_19_20_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_SSP1_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_SSP1_PORT_17_TO_20_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg ssp1_ext_36_39_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_36_MASK | PMX_PL_37_38_MASK | PMX_PL_39_MASK,</div><div class='add'>+		.val = PMX_SSP1_PL_36_VAL | PMX_SSP1_PL_37_38_VAL |</div><div class='add'>+			PMX_SSP1_PL_39_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_SSP1_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_SSP1_PORT_36_TO_39_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg ssp1_ext_48_51_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_48_49_MASK,</div><div class='add'>+		.val = PMX_SSP1_PL_48_49_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_50_59_REG,</div><div class='add'>+		.mask = PMX_PL_50_51_MASK,</div><div class='add'>+		.val = PMX_SSP1_PL_50_51_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_SSP1_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_SSP1_PORT_48_TO_51_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg ssp1_ext_65_68_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_60_69_REG,</div><div class='add'>+		.mask = PMX_PL_65_TO_68_MASK,</div><div class='add'>+		.val = PMX_SSP1_PL_65_TO_68_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_SSP1_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_SSP1_PORT_65_TO_68_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg ssp1_ext_94_97_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_90_99_REG,</div><div class='add'>+		.mask = PMX_PL_94_95_MASK | PMX_PL_96_97_MASK,</div><div class='add'>+		.val = PMX_SSP1_PL_94_95_VAL | PMX_SSP1_PL_96_97_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_SSP1_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_SSP1_PORT_94_TO_97_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp1_17_20_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE |</div><div class='add'>+			EXTENDED_MODE,</div><div class='add'>+		.muxregs = ssp1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp1_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = ssp1_ext_17_20_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp1_ext_17_20_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp1_36_39_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = ssp1_ext_36_39_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp1_ext_36_39_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp1_48_51_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = ssp1_ext_48_51_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp1_ext_48_51_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+static struct spear_modemux ssp1_65_68_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = ssp1_ext_65_68_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp1_ext_65_68_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp1_94_97_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = ssp1_ext_94_97_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp1_ext_94_97_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup ssp1_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "ssp1_17_20_grp",</div><div class='add'>+		.pins = ssp1_pins[0],</div><div class='add'>+		.npins = ARRAY_SIZE(ssp1_pins[0]),</div><div class='add'>+		.modemuxs = ssp1_17_20_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(ssp1_17_20_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "ssp1_36_39_grp",</div><div class='add'>+		.pins = ssp1_pins[1],</div><div class='add'>+		.npins = ARRAY_SIZE(ssp1_pins[1]),</div><div class='add'>+		.modemuxs = ssp1_36_39_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(ssp1_36_39_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "ssp1_48_51_grp",</div><div class='add'>+		.pins = ssp1_pins[2],</div><div class='add'>+		.npins = ARRAY_SIZE(ssp1_pins[2]),</div><div class='add'>+		.modemuxs = ssp1_48_51_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(ssp1_48_51_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "ssp1_65_68_grp",</div><div class='add'>+		.pins = ssp1_pins[3],</div><div class='add'>+		.npins = ARRAY_SIZE(ssp1_pins[3]),</div><div class='add'>+		.modemuxs = ssp1_65_68_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(ssp1_65_68_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "ssp1_94_97_grp",</div><div class='add'>+		.pins = ssp1_pins[4],</div><div class='add'>+		.npins = ARRAY_SIZE(ssp1_pins[4]),</div><div class='add'>+		.modemuxs = ssp1_94_97_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(ssp1_94_97_modemux),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const ssp1_grps[] = { "ssp1_17_20_grp", "ssp1_36_39_grp",</div><div class='add'>+	"ssp1_48_51_grp", "ssp1_65_68_grp", "ssp1_94_97_grp"</div><div class='add'>+};</div><div class='add'>+static struct spear_function ssp1_function = {</div><div class='add'>+	.name = "ssp1",</div><div class='add'>+	.groups = ssp1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(ssp1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for SSP2 device */</div><div class='add'>+static const unsigned ssp2_pins[][2] = { { 13, 16 }, { 32, 35 }, { 44, 47 },</div><div class='add'>+	{ 61, 64 }, { 90, 93 } };</div><div class='add'>+static struct spear_muxreg ssp2_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg ssp2_ext_13_16_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_10_19_REG,</div><div class='add'>+		.mask = PMX_PL_13_14_MASK | PMX_PL_15_16_MASK,</div><div class='add'>+		.val = PMX_SSP2_PL_13_14_15_16_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_SSP2_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_SSP2_PORT_13_TO_16_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg ssp2_ext_32_35_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_SSP_CS_MASK | PMX_GPIO_PIN4_MASK |</div><div class='add'>+			PMX_GPIO_PIN5_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_30_39_REG,</div><div class='add'>+		.mask = PMX_PL_32_33_MASK | PMX_PL_34_MASK | PMX_PL_35_MASK,</div><div class='add'>+		.val = PMX_SSP2_PL_32_33_VAL | PMX_SSP2_PL_34_VAL |</div><div class='add'>+			PMX_SSP2_PL_35_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_SSP2_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_SSP2_PORT_32_TO_35_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg ssp2_ext_44_47_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_40_49_REG,</div><div class='add'>+		.mask = PMX_PL_44_45_MASK | PMX_PL_46_47_MASK,</div><div class='add'>+		.val = PMX_SSP2_PL_44_45_VAL | PMX_SSP2_PL_46_47_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_SSP2_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_SSP2_PORT_44_TO_47_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg ssp2_ext_61_64_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_60_69_REG,</div><div class='add'>+		.mask = PMX_PL_61_TO_64_MASK,</div><div class='add'>+		.val = PMX_SSP2_PL_61_TO_64_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_SSP2_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_SSP2_PORT_61_TO_64_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg ssp2_ext_90_93_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_90_99_REG,</div><div class='add'>+		.mask = PMX_PL_90_91_MASK | PMX_PL_92_93_MASK,</div><div class='add'>+		.val = PMX_SSP2_PL_90_91_VAL | PMX_SSP2_PL_92_93_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_SSP2_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_SSP2_PORT_90_TO_93_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp2_13_16_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = AUTO_NET_SMII_MODE | EXTENDED_MODE,</div><div class='add'>+		.muxregs = ssp2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp2_muxreg),</div><div class='add'>+	}, {</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = ssp2_ext_13_16_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp2_ext_13_16_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp2_32_35_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = ssp2_ext_32_35_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp2_ext_32_35_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp2_44_47_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = ssp2_ext_44_47_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp2_ext_44_47_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp2_61_64_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = ssp2_ext_61_64_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp2_ext_61_64_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp2_90_93_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = ssp2_ext_90_93_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp2_ext_90_93_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup ssp2_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "ssp2_13_16_grp",</div><div class='add'>+		.pins = ssp2_pins[0],</div><div class='add'>+		.npins = ARRAY_SIZE(ssp2_pins[0]),</div><div class='add'>+		.modemuxs = ssp2_13_16_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(ssp2_13_16_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "ssp2_32_35_grp",</div><div class='add'>+		.pins = ssp2_pins[1],</div><div class='add'>+		.npins = ARRAY_SIZE(ssp2_pins[1]),</div><div class='add'>+		.modemuxs = ssp2_32_35_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(ssp2_32_35_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "ssp2_44_47_grp",</div><div class='add'>+		.pins = ssp2_pins[2],</div><div class='add'>+		.npins = ARRAY_SIZE(ssp2_pins[2]),</div><div class='add'>+		.modemuxs = ssp2_44_47_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(ssp2_44_47_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "ssp2_61_64_grp",</div><div class='add'>+		.pins = ssp2_pins[3],</div><div class='add'>+		.npins = ARRAY_SIZE(ssp2_pins[3]),</div><div class='add'>+		.modemuxs = ssp2_61_64_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(ssp2_61_64_modemux),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "ssp2_90_93_grp",</div><div class='add'>+		.pins = ssp2_pins[4],</div><div class='add'>+		.npins = ARRAY_SIZE(ssp2_pins[4]),</div><div class='add'>+		.modemuxs = ssp2_90_93_modemux,</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(ssp2_90_93_modemux),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const ssp2_grps[] = { "ssp2_13_16_grp", "ssp2_32_35_grp",</div><div class='add'>+	"ssp2_44_47_grp", "ssp2_61_64_grp", "ssp2_90_93_grp" };</div><div class='add'>+static struct spear_function ssp2_function = {</div><div class='add'>+	.name = "ssp2",</div><div class='add'>+	.groups = ssp2_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(ssp2_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for cadence mii2 as mii device */</div><div class='add'>+static const unsigned mii2_pins[] = { 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,</div><div class='add'>+	90, 91, 92, 93, 94, 95, 96, 97 };</div><div class='add'>+static struct spear_muxreg mii2_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_80_89_REG,</div><div class='add'>+		.mask = PMX_PL_80_TO_85_MASK | PMX_PL_86_87_MASK |</div><div class='add'>+			PMX_PL_88_89_MASK,</div><div class='add'>+		.val = PMX_MII2_PL_80_TO_85_VAL | PMX_MII2_PL_86_87_VAL |</div><div class='add'>+			PMX_MII2_PL_88_89_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_90_99_REG,</div><div class='add'>+		.mask = PMX_PL_90_91_MASK | PMX_PL_92_93_MASK |</div><div class='add'>+			PMX_PL_94_95_MASK | PMX_PL_96_97_MASK,</div><div class='add'>+		.val = PMX_MII2_PL_90_91_VAL | PMX_MII2_PL_92_93_VAL |</div><div class='add'>+			PMX_MII2_PL_94_95_VAL | PMX_MII2_PL_96_97_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = EXT_CTRL_REG,</div><div class='add'>+		.mask = (MAC_MODE_MASK &lt;&lt; MAC2_MODE_SHIFT) |</div><div class='add'>+			(MAC_MODE_MASK &lt;&lt; MAC1_MODE_SHIFT) |</div><div class='add'>+			MII_MDIO_MASK,</div><div class='add'>+		.val = (MAC_MODE_MII &lt;&lt; MAC2_MODE_SHIFT) |</div><div class='add'>+			(MAC_MODE_MII &lt;&lt; MAC1_MODE_SHIFT) |</div><div class='add'>+			MII_MDIO_81_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux mii2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = EXTENDED_MODE,</div><div class='add'>+		.muxregs = mii2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(mii2_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup mii2_pingroup = {</div><div class='add'>+	.name = "mii2_grp",</div><div class='add'>+	.pins = mii2_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(mii2_pins),</div><div class='add'>+	.modemuxs = mii2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(mii2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const mii2_grps[] = { "mii2_grp" };</div><div class='add'>+static struct spear_function mii2_function = {</div><div class='add'>+	.name = "mii2",</div><div class='add'>+	.groups = mii2_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(mii2_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for cadence mii 1_2 as smii or rmii device */</div><div class='add'>+static const unsigned smii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20,</div><div class='add'>+	21, 22, 23, 24, 25, 26, 27 };</div><div class='add'>+static const unsigned rmii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 };</div><div class='add'>+static struct spear_muxreg mii0_1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg smii0_1_ext_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_10_19_REG,</div><div class='add'>+		.mask = PMX_PL_10_11_MASK,</div><div class='add'>+		.val = PMX_SMII_PL_10_11_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_20_29_REG,</div><div class='add'>+		.mask = PMX_PL_21_TO_27_MASK,</div><div class='add'>+		.val = PMX_SMII_PL_21_TO_27_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = EXT_CTRL_REG,</div><div class='add'>+		.mask = (MAC_MODE_MASK &lt;&lt; MAC2_MODE_SHIFT) |</div><div class='add'>+			(MAC_MODE_MASK &lt;&lt; MAC1_MODE_SHIFT) |</div><div class='add'>+			MII_MDIO_MASK,</div><div class='add'>+		.val = (MAC_MODE_SMII &lt;&lt; MAC2_MODE_SHIFT)</div><div class='add'>+			| (MAC_MODE_SMII &lt;&lt; MAC1_MODE_SHIFT)</div><div class='add'>+			| MII_MDIO_10_11_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg rmii0_1_ext_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_10_19_REG,</div><div class='add'>+		.mask = PMX_PL_10_11_MASK | PMX_PL_13_14_MASK |</div><div class='add'>+			PMX_PL_15_16_MASK | PMX_PL_17_18_MASK | PMX_PL_19_MASK,</div><div class='add'>+		.val = PMX_RMII_PL_10_11_VAL | PMX_RMII_PL_13_14_VAL |</div><div class='add'>+			PMX_RMII_PL_15_16_VAL | PMX_RMII_PL_17_18_VAL |</div><div class='add'>+			PMX_RMII_PL_19_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_20_29_REG,</div><div class='add'>+		.mask = PMX_PL_20_MASK | PMX_PL_21_TO_27_MASK,</div><div class='add'>+		.val = PMX_RMII_PL_20_VAL | PMX_RMII_PL_21_TO_27_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = EXT_CTRL_REG,</div><div class='add'>+		.mask = (MAC_MODE_MASK &lt;&lt; MAC2_MODE_SHIFT) |</div><div class='add'>+			(MAC_MODE_MASK &lt;&lt; MAC1_MODE_SHIFT) |</div><div class='add'>+			MII_MDIO_MASK,</div><div class='add'>+		.val = (MAC_MODE_RMII &lt;&lt; MAC2_MODE_SHIFT)</div><div class='add'>+			| (MAC_MODE_RMII &lt;&lt; MAC1_MODE_SHIFT)</div><div class='add'>+			| MII_MDIO_10_11_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux mii0_1_modemux[][2] = {</div><div class='add'>+	{</div><div class='add'>+		/* configure as smii */</div><div class='add'>+		{</div><div class='add'>+			.modes = AUTO_NET_SMII_MODE | AUTO_EXP_MODE |</div><div class='add'>+				SMALL_PRINTERS_MODE | EXTENDED_MODE,</div><div class='add'>+			.muxregs = mii0_1_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(mii0_1_muxreg),</div><div class='add'>+		}, {</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = smii0_1_ext_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(smii0_1_ext_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* configure as rmii */</div><div class='add'>+		{</div><div class='add'>+			.modes = AUTO_NET_SMII_MODE | AUTO_EXP_MODE |</div><div class='add'>+				SMALL_PRINTERS_MODE | EXTENDED_MODE,</div><div class='add'>+			.muxregs = mii0_1_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(mii0_1_muxreg),</div><div class='add'>+		}, {</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = rmii0_1_ext_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(rmii0_1_ext_muxreg),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup mii0_1_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "smii0_1_grp",</div><div class='add'>+		.pins = smii0_1_pins,</div><div class='add'>+		.npins = ARRAY_SIZE(smii0_1_pins),</div><div class='add'>+		.modemuxs = mii0_1_modemux[0],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(mii0_1_modemux[0]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "rmii0_1_grp",</div><div class='add'>+		.pins = rmii0_1_pins,</div><div class='add'>+		.npins = ARRAY_SIZE(rmii0_1_pins),</div><div class='add'>+		.modemuxs = mii0_1_modemux[1],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(mii0_1_modemux[1]),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const mii0_1_grps[] = { "smii0_1_grp", "rmii0_1_grp" };</div><div class='add'>+static struct spear_function mii0_1_function = {</div><div class='add'>+	.name = "mii0_1",</div><div class='add'>+	.groups = mii0_1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(mii0_1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2c1 device */</div><div class='add'>+static const unsigned i2c1_pins[][2] = { { 8, 9 }, { 98, 99 } };</div><div class='add'>+static struct spear_muxreg i2c1_ext_8_9_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_SSP_CS_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_8_9_MASK,</div><div class='add'>+		.val = PMX_I2C1_PL_8_9_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_I2C1_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_I2C1_PORT_8_9_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg i2c1_ext_98_99_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_90_99_REG,</div><div class='add'>+		.mask = PMX_PL_98_MASK | PMX_PL_99_MASK,</div><div class='add'>+		.val = PMX_I2C1_PL_98_VAL | PMX_I2C1_PL_99_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_I2C1_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_I2C1_PORT_98_99_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c1_modemux[][1] = {</div><div class='add'>+	{</div><div class='add'>+		/* Select signals on pins 8-9 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = i2c1_ext_8_9_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(i2c1_ext_8_9_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 98-99 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = i2c1_ext_98_99_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(i2c1_ext_98_99_muxreg),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c1_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "i2c1_8_9_grp",</div><div class='add'>+		.pins = i2c1_pins[0],</div><div class='add'>+		.npins = ARRAY_SIZE(i2c1_pins[0]),</div><div class='add'>+		.modemuxs = i2c1_modemux[0],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(i2c1_modemux[0]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "i2c1_98_99_grp",</div><div class='add'>+		.pins = i2c1_pins[1],</div><div class='add'>+		.npins = ARRAY_SIZE(i2c1_pins[1]),</div><div class='add'>+		.modemuxs = i2c1_modemux[1],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(i2c1_modemux[1]),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2c1_grps[] = { "i2c1_8_9_grp", "i2c1_98_99_grp" };</div><div class='add'>+static struct spear_function i2c1_function = {</div><div class='add'>+	.name = "i2c1",</div><div class='add'>+	.groups = i2c1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2c1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pad multiplexing for i2c2 device */</div><div class='add'>+static const unsigned i2c2_pins[][2] = { { 0, 1 }, { 2, 3 }, { 19, 20 },</div><div class='add'>+	{ 75, 76 }, { 96, 97 } };</div><div class='add'>+static struct spear_muxreg i2c2_ext_0_1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_FIRDA_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_0_1_MASK,</div><div class='add'>+		.val = PMX_I2C2_PL_0_1_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_I2C2_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_I2C2_PORT_0_1_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg i2c2_ext_2_3_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_UART0_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_0_9_REG,</div><div class='add'>+		.mask = PMX_PL_2_3_MASK,</div><div class='add'>+		.val = PMX_I2C2_PL_2_3_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_I2C2_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_I2C2_PORT_2_3_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg i2c2_ext_19_20_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = PMX_CONFIG_REG,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = 0,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_10_19_REG,</div><div class='add'>+		.mask = PMX_PL_19_MASK,</div><div class='add'>+		.val = PMX_I2C2_PL_19_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_PAD_20_29_REG,</div><div class='add'>+		.mask = PMX_PL_20_MASK,</div><div class='add'>+		.val = PMX_I2C2_PL_20_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_I2C2_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_I2C2_PORT_19_20_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg i2c2_ext_75_76_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_70_79_REG,</div><div class='add'>+		.mask = PMX_PL_75_76_MASK,</div><div class='add'>+		.val = PMX_I2C2_PL_75_76_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_I2C2_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_I2C2_PORT_75_76_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_muxreg i2c2_ext_96_97_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = IP_SEL_PAD_90_99_REG,</div><div class='add'>+		.mask = PMX_PL_96_97_MASK,</div><div class='add'>+		.val = PMX_I2C2_PL_96_97_VAL,</div><div class='add'>+	}, {</div><div class='add'>+		.reg = IP_SEL_MIX_PAD_REG,</div><div class='add'>+		.mask = PMX_I2C2_PORT_SEL_MASK,</div><div class='add'>+		.val = PMX_I2C2_PORT_96_97_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c2_modemux[][1] = {</div><div class='add'>+	{</div><div class='add'>+		/* Select signals on pins 0_1 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = i2c2_ext_0_1_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(i2c2_ext_0_1_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 2_3 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = i2c2_ext_2_3_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(i2c2_ext_2_3_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 19_20 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = i2c2_ext_19_20_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(i2c2_ext_19_20_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 75_76 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = i2c2_ext_75_76_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(i2c2_ext_75_76_muxreg),</div><div class='add'>+		},</div><div class='add'>+	}, {</div><div class='add'>+		/* Select signals on pins 96_97 */</div><div class='add'>+		{</div><div class='add'>+			.modes = EXTENDED_MODE,</div><div class='add'>+			.muxregs = i2c2_ext_96_97_muxreg,</div><div class='add'>+			.nmuxregs = ARRAY_SIZE(i2c2_ext_96_97_muxreg),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_pingroup i2c2_pingroup[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "i2c2_0_1_grp",</div><div class='add'>+		.pins = i2c2_pins[0],</div><div class='add'>+		.npins = ARRAY_SIZE(i2c2_pins[0]),</div><div class='add'>+		.modemuxs = i2c2_modemux[0],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(i2c2_modemux[0]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "i2c2_2_3_grp",</div><div class='add'>+		.pins = i2c2_pins[1],</div><div class='add'>+		.npins = ARRAY_SIZE(i2c2_pins[1]),</div><div class='add'>+		.modemuxs = i2c2_modemux[1],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(i2c2_modemux[1]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "i2c2_19_20_grp",</div><div class='add'>+		.pins = i2c2_pins[2],</div><div class='add'>+		.npins = ARRAY_SIZE(i2c2_pins[2]),</div><div class='add'>+		.modemuxs = i2c2_modemux[2],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(i2c2_modemux[2]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "i2c2_75_76_grp",</div><div class='add'>+		.pins = i2c2_pins[3],</div><div class='add'>+		.npins = ARRAY_SIZE(i2c2_pins[3]),</div><div class='add'>+		.modemuxs = i2c2_modemux[3],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(i2c2_modemux[3]),</div><div class='add'>+	}, {</div><div class='add'>+		.name = "i2c2_96_97_grp",</div><div class='add'>+		.pins = i2c2_pins[4],</div><div class='add'>+		.npins = ARRAY_SIZE(i2c2_pins[4]),</div><div class='add'>+		.modemuxs = i2c2_modemux[4],</div><div class='add'>+		.nmodemuxs = ARRAY_SIZE(i2c2_modemux[4]),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2c2_grps[] = { "i2c2_0_1_grp", "i2c2_2_3_grp",</div><div class='add'>+	"i2c2_19_20_grp", "i2c2_75_76_grp", "i2c2_96_97_grp" };</div><div class='add'>+static struct spear_function i2c2_function = {</div><div class='add'>+	.name = "i2c2",</div><div class='add'>+	.groups = i2c2_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2c2_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* pingroups */</div><div class='add'>+static struct spear_pingroup *spear320_pingroups[] = {</div><div class='add'>+	SPEAR3XX_COMMON_PINGROUPS,</div><div class='add'>+	&amp;clcd_pingroup,</div><div class='add'>+	&amp;emi_pingroup,</div><div class='add'>+	&amp;fsmc_8bit_pingroup,</div><div class='add'>+	&amp;fsmc_16bit_pingroup,</div><div class='add'>+	&amp;spp_pingroup,</div><div class='add'>+	&amp;sdhci_led_pingroup,</div><div class='add'>+	&amp;sdhci_pingroup[0],</div><div class='add'>+	&amp;sdhci_pingroup[1],</div><div class='add'>+	&amp;i2s_pingroup,</div><div class='add'>+	&amp;uart1_pingroup,</div><div class='add'>+	&amp;uart1_modem_pingroup[0],</div><div class='add'>+	&amp;uart1_modem_pingroup[1],</div><div class='add'>+	&amp;uart1_modem_pingroup[2],</div><div class='add'>+	&amp;uart1_modem_pingroup[3],</div><div class='add'>+	&amp;uart2_pingroup,</div><div class='add'>+	&amp;uart3_pingroup[0],</div><div class='add'>+	&amp;uart3_pingroup[1],</div><div class='add'>+	&amp;uart3_pingroup[2],</div><div class='add'>+	&amp;uart3_pingroup[3],</div><div class='add'>+	&amp;uart3_pingroup[4],</div><div class='add'>+	&amp;uart3_pingroup[5],</div><div class='add'>+	&amp;uart3_pingroup[6],</div><div class='add'>+	&amp;uart4_pingroup[0],</div><div class='add'>+	&amp;uart4_pingroup[1],</div><div class='add'>+	&amp;uart4_pingroup[2],</div><div class='add'>+	&amp;uart4_pingroup[3],</div><div class='add'>+	&amp;uart4_pingroup[4],</div><div class='add'>+	&amp;uart4_pingroup[5],</div><div class='add'>+	&amp;uart5_pingroup[0],</div><div class='add'>+	&amp;uart5_pingroup[1],</div><div class='add'>+	&amp;uart5_pingroup[2],</div><div class='add'>+	&amp;uart5_pingroup[3],</div><div class='add'>+	&amp;uart6_pingroup[0],</div><div class='add'>+	&amp;uart6_pingroup[1],</div><div class='add'>+	&amp;rs485_pingroup,</div><div class='add'>+	&amp;touchscreen_pingroup,</div><div class='add'>+	&amp;can0_pingroup,</div><div class='add'>+	&amp;can1_pingroup,</div><div class='add'>+	&amp;pwm0_1_pingroup[0],</div><div class='add'>+	&amp;pwm0_1_pingroup[1],</div><div class='add'>+	&amp;pwm0_1_pingroup[2],</div><div class='add'>+	&amp;pwm0_1_pingroup[3],</div><div class='add'>+	&amp;pwm0_1_pingroup[4],</div><div class='add'>+	&amp;pwm0_1_pingroup[5],</div><div class='add'>+	&amp;pwm0_1_pingroup[6],</div><div class='add'>+	&amp;pwm2_pingroup[0],</div><div class='add'>+	&amp;pwm2_pingroup[1],</div><div class='add'>+	&amp;pwm2_pingroup[2],</div><div class='add'>+	&amp;pwm2_pingroup[3],</div><div class='add'>+	&amp;pwm2_pingroup[4],</div><div class='add'>+	&amp;pwm2_pingroup[5],</div><div class='add'>+	&amp;pwm2_pingroup[6],</div><div class='add'>+	&amp;pwm3_pingroup[0],</div><div class='add'>+	&amp;pwm3_pingroup[1],</div><div class='add'>+	&amp;pwm3_pingroup[2],</div><div class='add'>+	&amp;pwm3_pingroup[3],</div><div class='add'>+	&amp;pwm3_pingroup[4],</div><div class='add'>+	&amp;pwm3_pingroup[5],</div><div class='add'>+	&amp;ssp1_pingroup[0],</div><div class='add'>+	&amp;ssp1_pingroup[1],</div><div class='add'>+	&amp;ssp1_pingroup[2],</div><div class='add'>+	&amp;ssp1_pingroup[3],</div><div class='add'>+	&amp;ssp1_pingroup[4],</div><div class='add'>+	&amp;ssp2_pingroup[0],</div><div class='add'>+	&amp;ssp2_pingroup[1],</div><div class='add'>+	&amp;ssp2_pingroup[2],</div><div class='add'>+	&amp;ssp2_pingroup[3],</div><div class='add'>+	&amp;ssp2_pingroup[4],</div><div class='add'>+	&amp;mii2_pingroup,</div><div class='add'>+	&amp;mii0_1_pingroup[0],</div><div class='add'>+	&amp;mii0_1_pingroup[1],</div><div class='add'>+	&amp;i2c1_pingroup[0],</div><div class='add'>+	&amp;i2c1_pingroup[1],</div><div class='add'>+	&amp;i2c2_pingroup[0],</div><div class='add'>+	&amp;i2c2_pingroup[1],</div><div class='add'>+	&amp;i2c2_pingroup[2],</div><div class='add'>+	&amp;i2c2_pingroup[3],</div><div class='add'>+	&amp;i2c2_pingroup[4],</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* functions */</div><div class='add'>+static struct spear_function *spear320_functions[] = {</div><div class='add'>+	SPEAR3XX_COMMON_FUNCTIONS,</div><div class='add'>+	&amp;clcd_function,</div><div class='add'>+	&amp;emi_function,</div><div class='add'>+	&amp;fsmc_function,</div><div class='add'>+	&amp;spp_function,</div><div class='add'>+	&amp;sdhci_function,</div><div class='add'>+	&amp;i2s_function,</div><div class='add'>+	&amp;uart1_function,</div><div class='add'>+	&amp;uart1_modem_function,</div><div class='add'>+	&amp;uart2_function,</div><div class='add'>+	&amp;uart3_function,</div><div class='add'>+	&amp;uart4_function,</div><div class='add'>+	&amp;uart5_function,</div><div class='add'>+	&amp;uart6_function,</div><div class='add'>+	&amp;rs485_function,</div><div class='add'>+	&amp;touchscreen_function,</div><div class='add'>+	&amp;can0_function,</div><div class='add'>+	&amp;can1_function,</div><div class='add'>+	&amp;pwm0_1_function,</div><div class='add'>+	&amp;pwm2_function,</div><div class='add'>+	&amp;pwm3_function,</div><div class='add'>+	&amp;ssp1_function,</div><div class='add'>+	&amp;ssp2_function,</div><div class='add'>+	&amp;mii2_function,</div><div class='add'>+	&amp;mii0_1_function,</div><div class='add'>+	&amp;i2c1_function,</div><div class='add'>+	&amp;i2c2_function,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct of_device_id spear320_pinctrl_of_match[] __devinitdata = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "st,spear320-pinmux",</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit spear320_pinctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	spear3xx_machdata.groups = spear320_pingroups;</div><div class='add'>+	spear3xx_machdata.ngroups = ARRAY_SIZE(spear320_pingroups);</div><div class='add'>+	spear3xx_machdata.functions = spear320_functions;</div><div class='add'>+	spear3xx_machdata.nfunctions = ARRAY_SIZE(spear320_functions);</div><div class='add'>+</div><div class='add'>+	spear3xx_machdata.modes_supported = true;</div><div class='add'>+	spear3xx_machdata.pmx_modes = spear320_pmx_modes;</div><div class='add'>+	spear3xx_machdata.npmx_modes = ARRAY_SIZE(spear320_pmx_modes);</div><div class='add'>+</div><div class='add'>+	pmx_init_addr(&amp;spear3xx_machdata, PMX_CONFIG_REG);</div><div class='add'>+</div><div class='add'>+	ret = spear_pinctrl_probe(pdev, &amp;spear3xx_machdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit spear320_pinctrl_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return spear_pinctrl_remove(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver spear320_pinctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DRIVER_NAME,</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = spear320_pinctrl_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = spear320_pinctrl_probe,</div><div class='add'>+	.remove = __devexit_p(spear320_pinctrl_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init spear320_pinctrl_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;spear320_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(spear320_pinctrl_init);</div><div class='add'>+</div><div class='add'>+static void __exit spear320_pinctrl_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;spear320_pinctrl_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(spear320_pinctrl_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Viresh Kumar &lt;viresh.kumar@st.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("ST Microelectronics SPEAr320 pinctrl driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_DEVICE_TABLE(of, spear320_pinctrl_of_match);</div><div class='head'>diff --git a/drivers/pinctrl/spear/pinctrl-spear3xx.c b/drivers/pinctrl/spear/pinctrl-spear3xx.c<br/>new file mode 100644<br/>index 000000000000..91c883bc46a6<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/spear/pinctrl-spear3xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear3xx.c</a></div><div class='hunk'>@@ -0,0 +1,487 @@</div><div class='add'>+/*</div><div class='add'>+ * Driver for the ST Microelectronics SPEAr3xx pinmux</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+</div><div class='add'>+#include "pinctrl-spear3xx.h"</div><div class='add'>+</div><div class='add'>+/* pins */</div><div class='add'>+static const struct pinctrl_pin_desc spear3xx_pins[] = {</div><div class='add'>+	SPEAR_PIN_0_TO_101,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* firda_pins */</div><div class='add'>+static const unsigned firda_pins[] = { 0, 1 };</div><div class='add'>+static struct spear_muxreg firda_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_FIRDA_MASK,</div><div class='add'>+		.val = PMX_FIRDA_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux firda_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = firda_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(firda_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_firda_pingroup = {</div><div class='add'>+	.name = "firda_grp",</div><div class='add'>+	.pins = firda_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(firda_pins),</div><div class='add'>+	.modemuxs = firda_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(firda_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const firda_grps[] = { "firda_grp" };</div><div class='add'>+struct spear_function spear3xx_firda_function = {</div><div class='add'>+	.name = "firda",</div><div class='add'>+	.groups = firda_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(firda_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* i2c_pins */</div><div class='add'>+static const unsigned i2c_pins[] = { 4, 5 };</div><div class='add'>+static struct spear_muxreg i2c_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_I2C_MASK,</div><div class='add'>+		.val = PMX_I2C_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux i2c_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = i2c_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(i2c_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_i2c_pingroup = {</div><div class='add'>+	.name = "i2c0_grp",</div><div class='add'>+	.pins = i2c_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(i2c_pins),</div><div class='add'>+	.modemuxs = i2c_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(i2c_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const i2c_grps[] = { "i2c0_grp" };</div><div class='add'>+struct spear_function spear3xx_i2c_function = {</div><div class='add'>+	.name = "i2c0",</div><div class='add'>+	.groups = i2c_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(i2c_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ssp_cs_pins */</div><div class='add'>+static const unsigned ssp_cs_pins[] = { 34, 35, 36 };</div><div class='add'>+static struct spear_muxreg ssp_cs_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_SSP_CS_MASK,</div><div class='add'>+		.val = PMX_SSP_CS_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp_cs_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = ssp_cs_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp_cs_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_ssp_cs_pingroup = {</div><div class='add'>+	.name = "ssp_cs_grp",</div><div class='add'>+	.pins = ssp_cs_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(ssp_cs_pins),</div><div class='add'>+	.modemuxs = ssp_cs_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(ssp_cs_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const ssp_cs_grps[] = { "ssp_cs_grp" };</div><div class='add'>+struct spear_function spear3xx_ssp_cs_function = {</div><div class='add'>+	.name = "ssp_cs",</div><div class='add'>+	.groups = ssp_cs_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(ssp_cs_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ssp_pins */</div><div class='add'>+static const unsigned ssp_pins[] = { 6, 7, 8, 9 };</div><div class='add'>+static struct spear_muxreg ssp_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_SSP_MASK,</div><div class='add'>+		.val = PMX_SSP_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux ssp_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = ssp_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(ssp_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_ssp_pingroup = {</div><div class='add'>+	.name = "ssp0_grp",</div><div class='add'>+	.pins = ssp_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(ssp_pins),</div><div class='add'>+	.modemuxs = ssp_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(ssp_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const ssp_grps[] = { "ssp0_grp" };</div><div class='add'>+struct spear_function spear3xx_ssp_function = {</div><div class='add'>+	.name = "ssp0",</div><div class='add'>+	.groups = ssp_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(ssp_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mii_pins */</div><div class='add'>+static const unsigned mii_pins[] = { 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,</div><div class='add'>+	21, 22, 23, 24, 25, 26, 27 };</div><div class='add'>+static struct spear_muxreg mii_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_MII_MASK,</div><div class='add'>+		.val = PMX_MII_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux mii_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = mii_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(mii_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_mii_pingroup = {</div><div class='add'>+	.name = "mii0_grp",</div><div class='add'>+	.pins = mii_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(mii_pins),</div><div class='add'>+	.modemuxs = mii_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(mii_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const mii_grps[] = { "mii0_grp" };</div><div class='add'>+struct spear_function spear3xx_mii_function = {</div><div class='add'>+	.name = "mii0",</div><div class='add'>+	.groups = mii_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(mii_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio0_pin0_pins */</div><div class='add'>+static const unsigned gpio0_pin0_pins[] = { 28 };</div><div class='add'>+static struct spear_muxreg gpio0_pin0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_GPIO_PIN0_MASK,</div><div class='add'>+		.val = PMX_GPIO_PIN0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpio0_pin0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = gpio0_pin0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpio0_pin0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_gpio0_pin0_pingroup = {</div><div class='add'>+	.name = "gpio0_pin0_grp",</div><div class='add'>+	.pins = gpio0_pin0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpio0_pin0_pins),</div><div class='add'>+	.modemuxs = gpio0_pin0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpio0_pin0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio0_pin1_pins */</div><div class='add'>+static const unsigned gpio0_pin1_pins[] = { 29 };</div><div class='add'>+static struct spear_muxreg gpio0_pin1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_GPIO_PIN1_MASK,</div><div class='add'>+		.val = PMX_GPIO_PIN1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpio0_pin1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = gpio0_pin1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpio0_pin1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_gpio0_pin1_pingroup = {</div><div class='add'>+	.name = "gpio0_pin1_grp",</div><div class='add'>+	.pins = gpio0_pin1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpio0_pin1_pins),</div><div class='add'>+	.modemuxs = gpio0_pin1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpio0_pin1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio0_pin2_pins */</div><div class='add'>+static const unsigned gpio0_pin2_pins[] = { 30 };</div><div class='add'>+static struct spear_muxreg gpio0_pin2_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_GPIO_PIN2_MASK,</div><div class='add'>+		.val = PMX_GPIO_PIN2_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpio0_pin2_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = gpio0_pin2_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpio0_pin2_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_gpio0_pin2_pingroup = {</div><div class='add'>+	.name = "gpio0_pin2_grp",</div><div class='add'>+	.pins = gpio0_pin2_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpio0_pin2_pins),</div><div class='add'>+	.modemuxs = gpio0_pin2_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpio0_pin2_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio0_pin3_pins */</div><div class='add'>+static const unsigned gpio0_pin3_pins[] = { 31 };</div><div class='add'>+static struct spear_muxreg gpio0_pin3_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_GPIO_PIN3_MASK,</div><div class='add'>+		.val = PMX_GPIO_PIN3_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpio0_pin3_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = gpio0_pin3_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpio0_pin3_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_gpio0_pin3_pingroup = {</div><div class='add'>+	.name = "gpio0_pin3_grp",</div><div class='add'>+	.pins = gpio0_pin3_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpio0_pin3_pins),</div><div class='add'>+	.modemuxs = gpio0_pin3_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpio0_pin3_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio0_pin4_pins */</div><div class='add'>+static const unsigned gpio0_pin4_pins[] = { 32 };</div><div class='add'>+static struct spear_muxreg gpio0_pin4_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_GPIO_PIN4_MASK,</div><div class='add'>+		.val = PMX_GPIO_PIN4_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpio0_pin4_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = gpio0_pin4_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpio0_pin4_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_gpio0_pin4_pingroup = {</div><div class='add'>+	.name = "gpio0_pin4_grp",</div><div class='add'>+	.pins = gpio0_pin4_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpio0_pin4_pins),</div><div class='add'>+	.modemuxs = gpio0_pin4_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpio0_pin4_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* gpio0_pin5_pins */</div><div class='add'>+static const unsigned gpio0_pin5_pins[] = { 33 };</div><div class='add'>+static struct spear_muxreg gpio0_pin5_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_GPIO_PIN5_MASK,</div><div class='add'>+		.val = PMX_GPIO_PIN5_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux gpio0_pin5_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = gpio0_pin5_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(gpio0_pin5_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_gpio0_pin5_pingroup = {</div><div class='add'>+	.name = "gpio0_pin5_grp",</div><div class='add'>+	.pins = gpio0_pin5_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(gpio0_pin5_pins),</div><div class='add'>+	.modemuxs = gpio0_pin5_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(gpio0_pin5_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const gpio0_grps[] = { "gpio0_pin0_grp", "gpio0_pin1_grp",</div><div class='add'>+	"gpio0_pin2_grp", "gpio0_pin3_grp", "gpio0_pin4_grp", "gpio0_pin5_grp",</div><div class='add'>+};</div><div class='add'>+struct spear_function spear3xx_gpio0_function = {</div><div class='add'>+	.name = "gpio0",</div><div class='add'>+	.groups = gpio0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(gpio0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* uart0_ext_pins */</div><div class='add'>+static const unsigned uart0_ext_pins[] = { 37, 38, 39, 40, 41, 42 };</div><div class='add'>+static struct spear_muxreg uart0_ext_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_UART0_MODEM_MASK,</div><div class='add'>+		.val = PMX_UART0_MODEM_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart0_ext_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = uart0_ext_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart0_ext_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_uart0_ext_pingroup = {</div><div class='add'>+	.name = "uart0_ext_grp",</div><div class='add'>+	.pins = uart0_ext_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart0_ext_pins),</div><div class='add'>+	.modemuxs = uart0_ext_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart0_ext_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart0_ext_grps[] = { "uart0_ext_grp" };</div><div class='add'>+struct spear_function spear3xx_uart0_ext_function = {</div><div class='add'>+	.name = "uart0_ext",</div><div class='add'>+	.groups = uart0_ext_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart0_ext_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* uart0_pins */</div><div class='add'>+static const unsigned uart0_pins[] = { 2, 3 };</div><div class='add'>+static struct spear_muxreg uart0_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_UART0_MASK,</div><div class='add'>+		.val = PMX_UART0_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux uart0_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = uart0_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(uart0_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_uart0_pingroup = {</div><div class='add'>+	.name = "uart0_grp",</div><div class='add'>+	.pins = uart0_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(uart0_pins),</div><div class='add'>+	.modemuxs = uart0_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(uart0_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const uart0_grps[] = { "uart0_grp" };</div><div class='add'>+struct spear_function spear3xx_uart0_function = {</div><div class='add'>+	.name = "uart0",</div><div class='add'>+	.groups = uart0_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(uart0_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer_0_1_pins */</div><div class='add'>+static const unsigned timer_0_1_pins[] = { 43, 44, 47, 48 };</div><div class='add'>+static struct spear_muxreg timer_0_1_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_TIMER_0_1_MASK,</div><div class='add'>+		.val = PMX_TIMER_0_1_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux timer_0_1_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = timer_0_1_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(timer_0_1_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_timer_0_1_pingroup = {</div><div class='add'>+	.name = "timer_0_1_grp",</div><div class='add'>+	.pins = timer_0_1_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(timer_0_1_pins),</div><div class='add'>+	.modemuxs = timer_0_1_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(timer_0_1_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const timer_0_1_grps[] = { "timer_0_1_grp" };</div><div class='add'>+struct spear_function spear3xx_timer_0_1_function = {</div><div class='add'>+	.name = "timer_0_1",</div><div class='add'>+	.groups = timer_0_1_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(timer_0_1_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* timer_2_3_pins */</div><div class='add'>+static const unsigned timer_2_3_pins[] = { 45, 46, 49, 50 };</div><div class='add'>+static struct spear_muxreg timer_2_3_muxreg[] = {</div><div class='add'>+	{</div><div class='add'>+		.reg = -1,</div><div class='add'>+		.mask = PMX_TIMER_2_3_MASK,</div><div class='add'>+		.val = PMX_TIMER_2_3_MASK,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spear_modemux timer_2_3_modemux[] = {</div><div class='add'>+	{</div><div class='add'>+		.modes = ~0,</div><div class='add'>+		.muxregs = timer_2_3_muxreg,</div><div class='add'>+		.nmuxregs = ARRAY_SIZE(timer_2_3_muxreg),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pingroup spear3xx_timer_2_3_pingroup = {</div><div class='add'>+	.name = "timer_2_3_grp",</div><div class='add'>+	.pins = timer_2_3_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(timer_2_3_pins),</div><div class='add'>+	.modemuxs = timer_2_3_modemux,</div><div class='add'>+	.nmodemuxs = ARRAY_SIZE(timer_2_3_modemux),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const timer_2_3_grps[] = { "timer_2_3_grp" };</div><div class='add'>+struct spear_function spear3xx_timer_2_3_function = {</div><div class='add'>+	.name = "timer_2_3",</div><div class='add'>+	.groups = timer_2_3_grps,</div><div class='add'>+	.ngroups = ARRAY_SIZE(timer_2_3_grps),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spear_pinctrl_machdata spear3xx_machdata = {</div><div class='add'>+	.pins = spear3xx_pins,</div><div class='add'>+	.npins = ARRAY_SIZE(spear3xx_pins),</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/pinctrl/spear/pinctrl-spear3xx.h b/drivers/pinctrl/spear/pinctrl-spear3xx.h<br/>new file mode 100644<br/>index 000000000000..5d5fdd8df7b8<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/pinctrl/spear/pinctrl-spear3xx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/pinctrl/spear/pinctrl-spear3xx.h</a></div><div class='hunk'>@@ -0,0 +1,92 @@</div><div class='add'>+/*</div><div class='add'>+ * Header file for the ST Microelectronics SPEAr3xx pinmux</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012 ST Microelectronics</div><div class='add'>+ * Viresh Kumar &lt;viresh.kumar@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __PINMUX_SPEAR3XX_H__</div><div class='add'>+#define __PINMUX_SPEAR3XX_H__</div><div class='add'>+</div><div class='add'>+#include "pinctrl-spear.h"</div><div class='add'>+</div><div class='add'>+/* pad mux declarations */</div><div class='add'>+#define PMX_FIRDA_MASK		(1 &lt;&lt; 14)</div><div class='add'>+#define PMX_I2C_MASK		(1 &lt;&lt; 13)</div><div class='add'>+#define PMX_SSP_CS_MASK		(1 &lt;&lt; 12)</div><div class='add'>+#define PMX_SSP_MASK		(1 &lt;&lt; 11)</div><div class='add'>+#define PMX_MII_MASK		(1 &lt;&lt; 10)</div><div class='add'>+#define PMX_GPIO_PIN0_MASK	(1 &lt;&lt; 9)</div><div class='add'>+#define PMX_GPIO_PIN1_MASK	(1 &lt;&lt; 8)</div><div class='add'>+#define PMX_GPIO_PIN2_MASK	(1 &lt;&lt; 7)</div><div class='add'>+#define PMX_GPIO_PIN3_MASK	(1 &lt;&lt; 6)</div><div class='add'>+#define PMX_GPIO_PIN4_MASK	(1 &lt;&lt; 5)</div><div class='add'>+#define PMX_GPIO_PIN5_MASK	(1 &lt;&lt; 4)</div><div class='add'>+#define PMX_UART0_MODEM_MASK	(1 &lt;&lt; 3)</div><div class='add'>+#define PMX_UART0_MASK		(1 &lt;&lt; 2)</div><div class='add'>+#define PMX_TIMER_2_3_MASK	(1 &lt;&lt; 1)</div><div class='add'>+#define PMX_TIMER_0_1_MASK	(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+extern struct spear_pingroup spear3xx_firda_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_gpio0_pin0_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_gpio0_pin1_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_gpio0_pin2_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_gpio0_pin3_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_gpio0_pin4_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_gpio0_pin5_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_i2c_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_mii_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_ssp_cs_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_ssp_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_timer_0_1_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_timer_2_3_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_uart0_ext_pingroup;</div><div class='add'>+extern struct spear_pingroup spear3xx_uart0_pingroup;</div><div class='add'>+</div><div class='add'>+#define SPEAR3XX_COMMON_PINGROUPS		\</div><div class='add'>+	&amp;spear3xx_firda_pingroup,		\</div><div class='add'>+	&amp;spear3xx_gpio0_pin0_pingroup,		\</div><div class='add'>+	&amp;spear3xx_gpio0_pin1_pingroup,		\</div><div class='add'>+	&amp;spear3xx_gpio0_pin2_pingroup,		\</div><div class='add'>+	&amp;spear3xx_gpio0_pin3_pingroup,		\</div><div class='add'>+	&amp;spear3xx_gpio0_pin4_pingroup,		\</div><div class='add'>+	&amp;spear3xx_gpio0_pin5_pingroup,		\</div><div class='add'>+	&amp;spear3xx_i2c_pingroup,			\</div><div class='add'>+	&amp;spear3xx_mii_pingroup,			\</div><div class='add'>+	&amp;spear3xx_ssp_cs_pingroup,		\</div><div class='add'>+	&amp;spear3xx_ssp_pingroup,			\</div><div class='add'>+	&amp;spear3xx_timer_0_1_pingroup,		\</div><div class='add'>+	&amp;spear3xx_timer_2_3_pingroup,		\</div><div class='add'>+	&amp;spear3xx_uart0_ext_pingroup,		\</div><div class='add'>+	&amp;spear3xx_uart0_pingroup</div><div class='add'>+</div><div class='add'>+extern struct spear_function spear3xx_firda_function;</div><div class='add'>+extern struct spear_function spear3xx_gpio0_function;</div><div class='add'>+extern struct spear_function spear3xx_i2c_function;</div><div class='add'>+extern struct spear_function spear3xx_mii_function;</div><div class='add'>+extern struct spear_function spear3xx_ssp_cs_function;</div><div class='add'>+extern struct spear_function spear3xx_ssp_function;</div><div class='add'>+extern struct spear_function spear3xx_timer_0_1_function;</div><div class='add'>+extern struct spear_function spear3xx_timer_2_3_function;</div><div class='add'>+extern struct spear_function spear3xx_uart0_ext_function;</div><div class='add'>+extern struct spear_function spear3xx_uart0_function;</div><div class='add'>+</div><div class='add'>+#define SPEAR3XX_COMMON_FUNCTIONS		\</div><div class='add'>+	&amp;spear3xx_firda_function,		\</div><div class='add'>+	&amp;spear3xx_gpio0_function,		\</div><div class='add'>+	&amp;spear3xx_i2c_function,			\</div><div class='add'>+	&amp;spear3xx_mii_function,			\</div><div class='add'>+	&amp;spear3xx_ssp_cs_function,		\</div><div class='add'>+	&amp;spear3xx_ssp_function,			\</div><div class='add'>+	&amp;spear3xx_timer_0_1_function,		\</div><div class='add'>+	&amp;spear3xx_timer_2_3_function,		\</div><div class='add'>+	&amp;spear3xx_uart0_ext_function,		\</div><div class='add'>+	&amp;spear3xx_uart0_function</div><div class='add'>+</div><div class='add'>+extern struct spear_pinctrl_machdata spear3xx_machdata;</div><div class='add'>+</div><div class='add'>+#endif /* __PINMUX_SPEAR3XX_H__ */</div><div class='head'>diff --git a/drivers/platform/x86/acer-wmi.c b/drivers/platform/x86/acer-wmi.c<br/>index c1a3fd8e1243..ce875dc365e5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/acer-wmi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/acer-wmi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/acer-wmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/acer-wmi.c</a></div><div class='hunk'>@@ -523,6 +523,30 @@ static const struct dmi_system_id video_vendor_dmi_table[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 4750"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.callback = video_set_backlight_video_vendor,</div><div class='add'>+		.ident = "Acer Extensa 5235",</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "Acer"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Extensa 5235"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = video_set_backlight_video_vendor,</div><div class='add'>+		.ident = "Acer TravelMate 5760",</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "Acer"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 5760"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = video_set_backlight_video_vendor,</div><div class='add'>+		.ident = "Acer Aspire 5750",</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "Acer"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 5750"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/platform/x86/acerhdf.c b/drivers/platform/x86/acerhdf.c<br/>index 639db4d0aa76..2fd9d36acd15 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/acerhdf.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/acerhdf.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/acerhdf.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/acerhdf.c</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * (C) 2009 - Peter Feuerer     peter (a) piie.net</div><div class='ctx'>  *                              http://piie.net</div><div class='del'>- *     2009 Borislav Petkov &lt;petkovbb@gmail.com&gt;</div><div class='add'>+ *     2009 Borislav Petkov	bp (a) alien8.de</div><div class='ctx'>  *</div><div class='ctx'>  * Inspired by and many thanks to:</div><div class='ctx'>  *  o acerfand   - Rachel Greenham</div><div class='head'>diff --git a/drivers/platform/x86/apple-gmux.c b/drivers/platform/x86/apple-gmux.c<br/>index 8a582bdfdc76..694a15a56230 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/apple-gmux.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/apple-gmux.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/apple-gmux.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/apple-gmux.c</a></div><div class='hunk'>@@ -87,6 +87,9 @@ static int gmux_update_status(struct backlight_device *bd)</div><div class='ctx'> 	struct apple_gmux_data *gmux_data = bl_get_data(bd);</div><div class='ctx'> 	u32 brightness = bd-&gt;props.brightness;</div><div class='ctx'> </div><div class='add'>+	if (bd-&gt;props.state &amp; BL_CORE_SUSPENDED)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Older gmux versions require writing out lower bytes first then</div><div class='ctx'> 	 * setting the upper byte to 0 to flush the values. Newer versions</div><div class='hunk'>@@ -102,6 +105,7 @@ static int gmux_update_status(struct backlight_device *bd)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct backlight_ops gmux_bl_ops = {</div><div class='add'>+	.options = BL_CORE_SUSPENDRESUME,</div><div class='ctx'> 	.get_brightness = gmux_get_brightness,</div><div class='ctx'> 	.update_status = gmux_update_status,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/platform/x86/dell-laptop.c b/drivers/platform/x86/dell-laptop.c<br/>index e6c08ee8d46c..5f78aac9b163 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/dell-laptop.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/dell-laptop.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/dell-laptop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/dell-laptop.c</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/dmi.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/rfkill.h&gt;</div><div class='ctx'> #include &lt;linux/power_supply.h&gt;</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='hunk'>@@ -90,11 +89,8 @@ static struct platform_driver platform_driver = {</div><div class='ctx'> </div><div class='ctx'> static struct platform_device *platform_device;</div><div class='ctx'> static struct backlight_device *dell_backlight_device;</div><div class='del'>-static struct rfkill *wifi_rfkill;</div><div class='del'>-static struct rfkill *bluetooth_rfkill;</div><div class='del'>-static struct rfkill *wwan_rfkill;</div><div class='ctx'> </div><div class='del'>-static const struct dmi_system_id __initdata dell_device_table[] = {</div><div class='add'>+static const struct dmi_system_id dell_device_table[] __initconst = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.ident = "Dell laptop",</div><div class='ctx'> 		.matches = {</div><div class='hunk'>@@ -119,96 +115,94 @@ static const struct dmi_system_id __initdata dell_device_table[] = {</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(dmi, dell_device_table);</div><div class='ctx'> </div><div class='del'>-static struct dmi_system_id __devinitdata dell_blacklist[] = {</div><div class='del'>-	/* Supported by compal-laptop */</div><div class='del'>-	{</div><div class='del'>-		.ident = "Dell Mini 9",</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 910"),</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='add'>+static struct dmi_system_id __devinitdata dell_quirks[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.ident = "Dell Mini 10",</div><div class='add'>+		.callback = dmi_matched,</div><div class='add'>+		.ident = "Dell Vostro V130",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1010"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro V130"),</div><div class='ctx'> 		},</div><div class='add'>+		.driver_data = &amp;quirk_dell_vostro_v130,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.ident = "Dell Mini 10v",</div><div class='add'>+		.callback = dmi_matched,</div><div class='add'>+		.ident = "Dell Vostro V131",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1011"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro V131"),</div><div class='ctx'> 		},</div><div class='add'>+		.driver_data = &amp;quirk_dell_vostro_v130,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.ident = "Dell Mini 1012",</div><div class='add'>+		.callback = dmi_matched,</div><div class='add'>+		.ident = "Dell Vostro 3350",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1012"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 3350"),</div><div class='ctx'> 		},</div><div class='add'>+		.driver_data = &amp;quirk_dell_vostro_v130,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.ident = "Dell Inspiron 11z",</div><div class='add'>+		.callback = dmi_matched,</div><div class='add'>+		.ident = "Dell Vostro 3555",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1110"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 3555"),</div><div class='ctx'> 		},</div><div class='add'>+		.driver_data = &amp;quirk_dell_vostro_v130,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.ident = "Dell Mini 12",</div><div class='add'>+		.callback = dmi_matched,</div><div class='add'>+		.ident = "Dell Inspiron N311z",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1210"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron N311z"),</div><div class='ctx'> 		},</div><div class='add'>+		.driver_data = &amp;quirk_dell_vostro_v130,</div><div class='ctx'> 	},</div><div class='del'>-	{}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct dmi_system_id __devinitdata dell_quirks[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.callback = dmi_matched,</div><div class='del'>-		.ident = "Dell Vostro V130",</div><div class='add'>+		.ident = "Dell Inspiron M5110",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro V130"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron M5110"),</div><div class='ctx'> 		},</div><div class='ctx'> 		.driver_data = &amp;quirk_dell_vostro_v130,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.callback = dmi_matched,</div><div class='del'>-		.ident = "Dell Vostro V131",</div><div class='add'>+		.ident = "Dell Vostro 3360",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro V131"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 3360"),</div><div class='ctx'> 		},</div><div class='ctx'> 		.driver_data = &amp;quirk_dell_vostro_v130,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.callback = dmi_matched,</div><div class='del'>-		.ident = "Dell Vostro 3555",</div><div class='add'>+		.ident = "Dell Vostro 3460",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 3555"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 3460"),</div><div class='ctx'> 		},</div><div class='ctx'> 		.driver_data = &amp;quirk_dell_vostro_v130,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.callback = dmi_matched,</div><div class='del'>-		.ident = "Dell Inspiron N311z",</div><div class='add'>+		.ident = "Dell Vostro 3560",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron N311z"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 3560"),</div><div class='ctx'> 		},</div><div class='ctx'> 		.driver_data = &amp;quirk_dell_vostro_v130,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.callback = dmi_matched,</div><div class='del'>-		.ident = "Dell Inspiron M5110",</div><div class='add'>+		.ident = "Dell Vostro 3450",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron M5110"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Dell System Vostro 3450"),</div><div class='ctx'> 		},</div><div class='ctx'> 		.driver_data = &amp;quirk_dell_vostro_v130,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -305,94 +299,6 @@ dell_send_request(struct calling_interface_buffer *buffer, int class,</div><div class='ctx'> 	return buffer;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Derived from information in DellWirelessCtl.cpp:</div><div class='del'>-   Class 17, select 11 is radio control. It returns an array of 32-bit values.</div><div class='del'>-</div><div class='del'>-   Input byte 0 = 0: Wireless information</div><div class='del'>-</div><div class='del'>-   result[0]: return code</div><div class='del'>-   result[1]:</div><div class='del'>-     Bit 0:      Hardware switch supported</div><div class='del'>-     Bit 1:      Wifi locator supported</div><div class='del'>-     Bit 2:      Wifi is supported</div><div class='del'>-     Bit 3:      Bluetooth is supported</div><div class='del'>-     Bit 4:      WWAN is supported</div><div class='del'>-     Bit 5:      Wireless keyboard supported</div><div class='del'>-     Bits 6-7:   Reserved</div><div class='del'>-     Bit 8:      Wifi is installed</div><div class='del'>-     Bit 9:      Bluetooth is installed</div><div class='del'>-     Bit 10:     WWAN is installed</div><div class='del'>-     Bits 11-15: Reserved</div><div class='del'>-     Bit 16:     Hardware switch is on</div><div class='del'>-     Bit 17:     Wifi is blocked</div><div class='del'>-     Bit 18:     Bluetooth is blocked</div><div class='del'>-     Bit 19:     WWAN is blocked</div><div class='del'>-     Bits 20-31: Reserved</div><div class='del'>-   result[2]: NVRAM size in bytes</div><div class='del'>-   result[3]: NVRAM format version number</div><div class='del'>-</div><div class='del'>-   Input byte 0 = 2: Wireless switch configuration</div><div class='del'>-   result[0]: return code</div><div class='del'>-   result[1]:</div><div class='del'>-     Bit 0:      Wifi controlled by switch</div><div class='del'>-     Bit 1:      Bluetooth controlled by switch</div><div class='del'>-     Bit 2:      WWAN controlled by switch</div><div class='del'>-     Bits 3-6:   Reserved</div><div class='del'>-     Bit 7:      Wireless switch config locked</div><div class='del'>-     Bit 8:      Wifi locator enabled</div><div class='del'>-     Bits 9-14:  Reserved</div><div class='del'>-     Bit 15:     Wifi locator setting locked</div><div class='del'>-     Bits 16-31: Reserved</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-static int dell_rfkill_set(void *data, bool blocked)</div><div class='del'>-{</div><div class='del'>-	int disable = blocked ? 1 : 0;</div><div class='del'>-	unsigned long radio = (unsigned long)data;</div><div class='del'>-	int hwswitch_bit = (unsigned long)data - 1;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	get_buffer();</div><div class='del'>-	dell_send_request(buffer, 17, 11);</div><div class='del'>-</div><div class='del'>-	/* If the hardware switch controls this radio, and the hardware</div><div class='del'>-	   switch is disabled, don't allow changing the software state */</div><div class='del'>-	if ((hwswitch_state &amp; BIT(hwswitch_bit)) &amp;&amp;</div><div class='del'>-	    !(buffer-&gt;output[1] &amp; BIT(16))) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	buffer-&gt;input[0] = (1 | (radio&lt;&lt;8) | (disable &lt;&lt; 16));</div><div class='del'>-	dell_send_request(buffer, 17, 11);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	release_buffer();</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dell_rfkill_query(struct rfkill *rfkill, void *data)</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-	int bit = (unsigned long)data + 16;</div><div class='del'>-	int hwswitch_bit = (unsigned long)data - 1;</div><div class='del'>-</div><div class='del'>-	get_buffer();</div><div class='del'>-	dell_send_request(buffer, 17, 11);</div><div class='del'>-	status = buffer-&gt;output[1];</div><div class='del'>-	release_buffer();</div><div class='del'>-</div><div class='del'>-	rfkill_set_sw_state(rfkill, !!(status &amp; BIT(bit)));</div><div class='del'>-</div><div class='del'>-	if (hwswitch_state &amp; (BIT(hwswitch_bit)))</div><div class='del'>-		rfkill_set_hw_state(rfkill, !(status &amp; BIT(16)));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct rfkill_ops dell_rfkill_ops = {</div><div class='del'>-	.set_block = dell_rfkill_set,</div><div class='del'>-	.query = dell_rfkill_query,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct dentry *dell_laptop_dir;</div><div class='ctx'> </div><div class='ctx'> static int dell_debugfs_show(struct seq_file *s, void *data)</div><div class='hunk'>@@ -462,108 +368,6 @@ static const struct file_operations dell_debugfs_fops = {</div><div class='ctx'> 	.release = single_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void dell_update_rfkill(struct work_struct *ignored)</div><div class='del'>-{</div><div class='del'>-	if (wifi_rfkill)</div><div class='del'>-		dell_rfkill_query(wifi_rfkill, (void *)1);</div><div class='del'>-	if (bluetooth_rfkill)</div><div class='del'>-		dell_rfkill_query(bluetooth_rfkill, (void *)2);</div><div class='del'>-	if (wwan_rfkill)</div><div class='del'>-		dell_rfkill_query(wwan_rfkill, (void *)3);</div><div class='del'>-}</div><div class='del'>-static DECLARE_DELAYED_WORK(dell_rfkill_work, dell_update_rfkill);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __init dell_setup_rfkill(void)</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (dmi_check_system(dell_blacklist)) {</div><div class='del'>-		pr_info("Blacklisted hardware detected - not enabling rfkill\n");</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	get_buffer();</div><div class='del'>-	dell_send_request(buffer, 17, 11);</div><div class='del'>-	status = buffer-&gt;output[1];</div><div class='del'>-	buffer-&gt;input[0] = 0x2;</div><div class='del'>-	dell_send_request(buffer, 17, 11);</div><div class='del'>-	hwswitch_state = buffer-&gt;output[1];</div><div class='del'>-	release_buffer();</div><div class='del'>-</div><div class='del'>-	if ((status &amp; (1&lt;&lt;2|1&lt;&lt;8)) == (1&lt;&lt;2|1&lt;&lt;8)) {</div><div class='del'>-		wifi_rfkill = rfkill_alloc("dell-wifi", &amp;platform_device-&gt;dev,</div><div class='del'>-					   RFKILL_TYPE_WLAN,</div><div class='del'>-					   &amp;dell_rfkill_ops, (void *) 1);</div><div class='del'>-		if (!wifi_rfkill) {</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto err_wifi;</div><div class='del'>-		}</div><div class='del'>-		ret = rfkill_register(wifi_rfkill);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_wifi;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((status &amp; (1&lt;&lt;3|1&lt;&lt;9)) == (1&lt;&lt;3|1&lt;&lt;9)) {</div><div class='del'>-		bluetooth_rfkill = rfkill_alloc("dell-bluetooth",</div><div class='del'>-						&amp;platform_device-&gt;dev,</div><div class='del'>-						RFKILL_TYPE_BLUETOOTH,</div><div class='del'>-						&amp;dell_rfkill_ops, (void *) 2);</div><div class='del'>-		if (!bluetooth_rfkill) {</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto err_bluetooth;</div><div class='del'>-		}</div><div class='del'>-		ret = rfkill_register(bluetooth_rfkill);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_bluetooth;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((status &amp; (1&lt;&lt;4|1&lt;&lt;10)) == (1&lt;&lt;4|1&lt;&lt;10)) {</div><div class='del'>-		wwan_rfkill = rfkill_alloc("dell-wwan",</div><div class='del'>-					   &amp;platform_device-&gt;dev,</div><div class='del'>-					   RFKILL_TYPE_WWAN,</div><div class='del'>-					   &amp;dell_rfkill_ops, (void *) 3);</div><div class='del'>-		if (!wwan_rfkill) {</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto err_wwan;</div><div class='del'>-		}</div><div class='del'>-		ret = rfkill_register(wwan_rfkill);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_wwan;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-err_wwan:</div><div class='del'>-	rfkill_destroy(wwan_rfkill);</div><div class='del'>-	if (bluetooth_rfkill)</div><div class='del'>-		rfkill_unregister(bluetooth_rfkill);</div><div class='del'>-err_bluetooth:</div><div class='del'>-	rfkill_destroy(bluetooth_rfkill);</div><div class='del'>-	if (wifi_rfkill)</div><div class='del'>-		rfkill_unregister(wifi_rfkill);</div><div class='del'>-err_wifi:</div><div class='del'>-	rfkill_destroy(wifi_rfkill);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dell_cleanup_rfkill(void)</div><div class='del'>-{</div><div class='del'>-	if (wifi_rfkill) {</div><div class='del'>-		rfkill_unregister(wifi_rfkill);</div><div class='del'>-		rfkill_destroy(wifi_rfkill);</div><div class='del'>-	}</div><div class='del'>-	if (bluetooth_rfkill) {</div><div class='del'>-		rfkill_unregister(bluetooth_rfkill);</div><div class='del'>-		rfkill_destroy(bluetooth_rfkill);</div><div class='del'>-	}</div><div class='del'>-	if (wwan_rfkill) {</div><div class='del'>-		rfkill_unregister(wwan_rfkill);</div><div class='del'>-		rfkill_destroy(wwan_rfkill);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int dell_send_intensity(struct backlight_device *bd)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -655,30 +459,6 @@ static void touchpad_led_exit(void)</div><div class='ctx'> 	led_classdev_unregister(&amp;touchpad_led);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool dell_laptop_i8042_filter(unsigned char data, unsigned char str,</div><div class='del'>-			      struct serio *port)</div><div class='del'>-{</div><div class='del'>-	static bool extended;</div><div class='del'>-</div><div class='del'>-	if (str &amp; 0x20)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (unlikely(data == 0xe0)) {</div><div class='del'>-		extended = true;</div><div class='del'>-		return false;</div><div class='del'>-	} else if (unlikely(extended)) {</div><div class='del'>-		switch (data) {</div><div class='del'>-		case 0x8:</div><div class='del'>-			schedule_delayed_work(&amp;dell_rfkill_work,</div><div class='del'>-					      round_jiffies_relative(HZ));</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		extended = false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __init dell_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int max_intensity = 0;</div><div class='hunk'>@@ -720,26 +500,10 @@ static int __init dell_init(void)</div><div class='ctx'> 		goto fail_buffer;</div><div class='ctx'> 	buffer = page_address(bufferpage);</div><div class='ctx'> </div><div class='del'>-	ret = dell_setup_rfkill();</div><div class='del'>-</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_warn("Unable to setup rfkill\n");</div><div class='del'>-		goto fail_rfkill;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = i8042_install_filter(dell_laptop_i8042_filter);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_warn("Unable to install key filter\n");</div><div class='del'>-		goto fail_filter;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (quirks &amp;&amp; quirks-&gt;touchpad_led)</div><div class='ctx'> 		touchpad_led_init(&amp;platform_device-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	dell_laptop_dir = debugfs_create_dir("dell_laptop", NULL);</div><div class='del'>-	if (dell_laptop_dir != NULL)</div><div class='del'>-		debugfs_create_file("rfkill", 0444, dell_laptop_dir, NULL,</div><div class='del'>-				    &amp;dell_debugfs_fops);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ACPI</div><div class='ctx'> 	/* In the event of an ACPI backlight being available, don't</div><div class='hunk'>@@ -782,11 +546,6 @@ static int __init dell_init(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> fail_backlight:</div><div class='del'>-	i8042_remove_filter(dell_laptop_i8042_filter);</div><div class='del'>-	cancel_delayed_work_sync(&amp;dell_rfkill_work);</div><div class='del'>-fail_filter:</div><div class='del'>-	dell_cleanup_rfkill();</div><div class='del'>-fail_rfkill:</div><div class='ctx'> 	free_page((unsigned long)bufferpage);</div><div class='ctx'> fail_buffer:</div><div class='ctx'> 	platform_device_del(platform_device);</div><div class='hunk'>@@ -804,10 +563,7 @@ static void __exit dell_exit(void)</div><div class='ctx'> 	debugfs_remove_recursive(dell_laptop_dir);</div><div class='ctx'> 	if (quirks &amp;&amp; quirks-&gt;touchpad_led)</div><div class='ctx'> 		touchpad_led_exit();</div><div class='del'>-	i8042_remove_filter(dell_laptop_i8042_filter);</div><div class='del'>-	cancel_delayed_work_sync(&amp;dell_rfkill_work);</div><div class='ctx'> 	backlight_device_unregister(dell_backlight_device);</div><div class='del'>-	dell_cleanup_rfkill();</div><div class='ctx'> 	if (platform_device) {</div><div class='ctx'> 		platform_device_unregister(platform_device);</div><div class='ctx'> 		platform_driver_unregister(&amp;platform_driver);</div><div class='head'>diff --git a/drivers/platform/x86/fujitsu-laptop.c b/drivers/platform/x86/fujitsu-laptop.c<br/>index 6b26666b37f2..c4c1a5444b38 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/fujitsu-laptop.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/fujitsu-laptop.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/fujitsu-laptop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/fujitsu-laptop.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*-*-linux-c-*-*/</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>-  Copyright (C) 2007,2008 Jonathan Woithe &lt;jwoithe@physics.adelaide.edu.au&gt;</div><div class='add'>+  Copyright (C) 2007,2008 Jonathan Woithe &lt;jwoithe@just42.net&gt;</div><div class='ctx'>   Copyright (C) 2008 Peter Gruber &lt;nokos@gmx.net&gt;</div><div class='ctx'>   Copyright (C) 2008 Tony Vroon &lt;tony@linx.net&gt;</div><div class='ctx'>   Based on earlier work:</div><div class='head'>diff --git a/drivers/platform/x86/fujitsu-tablet.c b/drivers/platform/x86/fujitsu-tablet.c<br/>index 580d80a73c3a..da267eae8ba8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/fujitsu-tablet.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/fujitsu-tablet.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/fujitsu-tablet.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/fujitsu-tablet.c</a></div><div class='hunk'>@@ -16,6 +16,8 @@</div><div class='ctx'>  * 59 Temple Place Suite 330, Boston, MA 02111-1307, USA.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -34,7 +36,8 @@</div><div class='ctx'> #define ACPI_FUJITSU_CLASS "fujitsu"</div><div class='ctx'> </div><div class='ctx'> #define INVERT_TABLET_MODE_BIT      0x01</div><div class='del'>-#define FORCE_TABLET_MODE_IF_UNDOCK 0x02</div><div class='add'>+#define INVERT_DOCK_STATE_BIT       0x02</div><div class='add'>+#define FORCE_TABLET_MODE_IF_UNDOCK 0x04</div><div class='ctx'> </div><div class='ctx'> #define KEYMAP_LEN 16</div><div class='ctx'> </div><div class='hunk'>@@ -161,6 +164,8 @@ static void fujitsu_send_state(void)</div><div class='ctx'> 	state = fujitsu_read_register(0xdd);</div><div class='ctx'> </div><div class='ctx'> 	dock = state &amp; 0x02;</div><div class='add'>+	if (fujitsu.config.quirks &amp; INVERT_DOCK_STATE_BIT)</div><div class='add'>+		dock = !dock;</div><div class='ctx'> </div><div class='ctx'> 	if ((fujitsu.config.quirks &amp; FORCE_TABLET_MODE_IF_UNDOCK) &amp;&amp; (!dock)) {</div><div class='ctx'> 		tablet_mode = 1;</div><div class='hunk'>@@ -221,9 +226,6 @@ static int __devinit input_fujitsu_setup(struct device *parent,</div><div class='ctx'> 	input_set_capability(idev, EV_SW, SW_DOCK);</div><div class='ctx'> 	input_set_capability(idev, EV_SW, SW_TABLET_MODE);</div><div class='ctx'> </div><div class='del'>-	input_set_capability(idev, EV_SW, SW_DOCK);</div><div class='del'>-	input_set_capability(idev, EV_SW, SW_TABLET_MODE);</div><div class='del'>-</div><div class='ctx'> 	error = input_register_device(idev);</div><div class='ctx'> 	if (error) {</div><div class='ctx'> 		input_free_device(idev);</div><div class='hunk'>@@ -275,25 +277,31 @@ static irqreturn_t fujitsu_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __devinit fujitsu_dmi_default(const struct dmi_system_id *dmi)</div><div class='add'>+static void __devinit fujitsu_dmi_common(const struct dmi_system_id *dmi)</div><div class='ctx'> {</div><div class='del'>-	printk(KERN_INFO MODULENAME ": %s\n", dmi-&gt;ident);</div><div class='add'>+	pr_info("%s\n", dmi-&gt;ident);</div><div class='ctx'> 	memcpy(fujitsu.config.keymap, dmi-&gt;driver_data,</div><div class='ctx'> 			sizeof(fujitsu.config.keymap));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit fujitsu_dmi_lifebook(const struct dmi_system_id *dmi)</div><div class='add'>+{</div><div class='add'>+	fujitsu_dmi_common(dmi);</div><div class='add'>+	fujitsu.config.quirks |= INVERT_TABLET_MODE_BIT;</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devinit fujitsu_dmi_stylistic(const struct dmi_system_id *dmi)</div><div class='ctx'> {</div><div class='del'>-	fujitsu_dmi_default(dmi);</div><div class='add'>+	fujitsu_dmi_common(dmi);</div><div class='ctx'> 	fujitsu.config.quirks |= FORCE_TABLET_MODE_IF_UNDOCK;</div><div class='del'>-	fujitsu.config.quirks |= INVERT_TABLET_MODE_BIT;</div><div class='add'>+	fujitsu.config.quirks |= INVERT_DOCK_STATE_BIT;</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct dmi_system_id dmi_ids[] __initconst = {</div><div class='ctx'> 	{</div><div class='del'>-		.callback = fujitsu_dmi_default,</div><div class='add'>+		.callback = fujitsu_dmi_lifebook,</div><div class='ctx'> 		.ident = "Fujitsu Siemens P/T Series",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),</div><div class='hunk'>@@ -302,7 +310,7 @@ static struct dmi_system_id dmi_ids[] __initconst = {</div><div class='ctx'> 		.driver_data = keymap_Lifebook_Tseries</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.callback = fujitsu_dmi_default,</div><div class='add'>+		.callback = fujitsu_dmi_lifebook,</div><div class='ctx'> 		.ident = "Fujitsu Lifebook T Series",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),</div><div class='hunk'>@@ -320,7 +328,7 @@ static struct dmi_system_id dmi_ids[] __initconst = {</div><div class='ctx'> 		.driver_data = keymap_Stylistic_Tseries</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.callback = fujitsu_dmi_default,</div><div class='add'>+		.callback = fujitsu_dmi_lifebook,</div><div class='ctx'> 		.ident = "Fujitsu LifeBook U810",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),</div><div class='hunk'>@@ -347,7 +355,7 @@ static struct dmi_system_id dmi_ids[] __initconst = {</div><div class='ctx'> 		.driver_data = keymap_Stylistic_ST5xxx</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.callback = fujitsu_dmi_default,</div><div class='add'>+		.callback = fujitsu_dmi_lifebook,</div><div class='ctx'> 		.ident = "Unknown (using defaults)",</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_SYS_VENDOR, ""),</div><div class='hunk'>@@ -473,6 +481,6 @@ module_exit(fujitsu_module_exit);</div><div class='ctx'> MODULE_AUTHOR("Robert Gerlach &lt;khnz@gmx.de&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Fujitsu tablet pc extras driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_VERSION("2.4");</div><div class='add'>+MODULE_VERSION("2.5");</div><div class='ctx'> </div><div class='ctx'> MODULE_DEVICE_TABLE(acpi, fujitsu_ids);</div><div class='head'>diff --git a/drivers/platform/x86/hdaps.c b/drivers/platform/x86/hdaps.c<br/>index 7387f97a2941..24a3ae065f1b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/hdaps.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/hdaps.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/hdaps.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/hdaps.c</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'>  * hdaps.c - driver for IBM's Hard Drive Active Protection System</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2005 Robert Love &lt;rml@novell.com&gt;</div><div class='del'>- * Copyright (C) 2005 Jesper Juhl &lt;jesper.juhl@gmail.com&gt;</div><div class='add'>+ * Copyright (C) 2005 Jesper Juhl &lt;jj@chaosbits.net&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * The HardDisk Active Protection System (hdaps) is present in IBM ThinkPads</div><div class='ctx'>  * starting with the R40, T41, and X40.  It provides a basic two-axis</div><div class='head'>diff --git a/drivers/platform/x86/hp-wmi.c b/drivers/platform/x86/hp-wmi.c<br/>index e2faa3cbb792..387183a2d6dd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/hp-wmi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/hp-wmi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/hp-wmi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/hp-wmi.c</a></div><div class='hunk'>@@ -634,6 +634,8 @@ static int __devinit hp_wmi_rfkill_setup(struct platform_device *device)</div><div class='ctx'> 					   RFKILL_TYPE_WLAN,</div><div class='ctx'> 					   &amp;hp_wmi_rfkill_ops,</div><div class='ctx'> 					   (void *) HPWMI_WIFI);</div><div class='add'>+		if (!wifi_rfkill)</div><div class='add'>+			return -ENOMEM;</div><div class='ctx'> 		rfkill_init_sw_state(wifi_rfkill,</div><div class='ctx'> 				     hp_wmi_get_sw_state(HPWMI_WIFI));</div><div class='ctx'> 		rfkill_set_hw_state(wifi_rfkill,</div><div class='hunk'>@@ -648,6 +650,10 @@ static int __devinit hp_wmi_rfkill_setup(struct platform_device *device)</div><div class='ctx'> 						RFKILL_TYPE_BLUETOOTH,</div><div class='ctx'> 						&amp;hp_wmi_rfkill_ops,</div><div class='ctx'> 						(void *) HPWMI_BLUETOOTH);</div><div class='add'>+		if (!bluetooth_rfkill) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto register_wifi_error;</div><div class='add'>+		}</div><div class='ctx'> 		rfkill_init_sw_state(bluetooth_rfkill,</div><div class='ctx'> 				     hp_wmi_get_sw_state(HPWMI_BLUETOOTH));</div><div class='ctx'> 		rfkill_set_hw_state(bluetooth_rfkill,</div><div class='hunk'>@@ -662,6 +668,10 @@ static int __devinit hp_wmi_rfkill_setup(struct platform_device *device)</div><div class='ctx'> 					   RFKILL_TYPE_WWAN,</div><div class='ctx'> 					   &amp;hp_wmi_rfkill_ops,</div><div class='ctx'> 					   (void *) HPWMI_WWAN);</div><div class='add'>+		if (!wwan_rfkill) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto register_bluetooth_error;</div><div class='add'>+		}</div><div class='ctx'> 		rfkill_init_sw_state(wwan_rfkill,</div><div class='ctx'> 				     hp_wmi_get_sw_state(HPWMI_WWAN));</div><div class='ctx'> 		rfkill_set_hw_state(wwan_rfkill,</div><div class='head'>diff --git a/drivers/platform/x86/ideapad-laptop.c b/drivers/platform/x86/ideapad-laptop.c<br/>index ac902f7a9baa..4f20f8dd3d7c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/ideapad-laptop.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/ideapad-laptop.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/ideapad-laptop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/ideapad-laptop.c</a></div><div class='hunk'>@@ -194,7 +194,6 @@ static int write_ec_cmd(acpi_handle handle, int cmd, unsigned long data)</div><div class='ctx'> /*</div><div class='ctx'>  * debugfs</div><div class='ctx'>  */</div><div class='del'>-#define DEBUGFS_EVENT_LEN (4096)</div><div class='ctx'> static int debugfs_status_show(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long value;</div><div class='hunk'>@@ -315,7 +314,7 @@ static int __devinit ideapad_debugfs_init(struct ideapad_private *priv)</div><div class='ctx'> 	node = debugfs_create_file("status", S_IRUGO, priv-&gt;debug, NULL,</div><div class='ctx'> 				   &amp;debugfs_status_fops);</div><div class='ctx'> 	if (!node) {</div><div class='del'>-		pr_err("failed to create event in debugfs");</div><div class='add'>+		pr_err("failed to create status in debugfs");</div><div class='ctx'> 		goto errout;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -785,6 +784,10 @@ static void ideapad_acpi_notify(struct acpi_device *adevice, u32 event)</div><div class='ctx'> 			case 9:</div><div class='ctx'> 				ideapad_sync_rfk_state(priv);</div><div class='ctx'> 				break;</div><div class='add'>+			case 13:</div><div class='add'>+			case 6:</div><div class='add'>+				ideapad_input_report(priv, vpc_bit);</div><div class='add'>+				break;</div><div class='ctx'> 			case 4:</div><div class='ctx'> 				ideapad_backlight_notify_brightness(priv);</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -795,7 +798,7 @@ static void ideapad_acpi_notify(struct acpi_device *adevice, u32 event)</div><div class='ctx'> 				ideapad_backlight_notify_power(priv);</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='del'>-				ideapad_input_report(priv, vpc_bit);</div><div class='add'>+				pr_info("Unknown event: %lu\n", vpc_bit);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/platform/x86/intel_mid_powerbtn.c b/drivers/platform/x86/intel_mid_powerbtn.c<br/>index 0a3594c7e912..bcbad8452a6f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/intel_mid_powerbtn.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/intel_mid_powerbtn.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/intel_mid_powerbtn.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/intel_mid_powerbtn.c</a></div><div class='hunk'>@@ -78,7 +78,7 @@ static int __devinit mfld_pb_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	input_set_capability(input, EV_KEY, KEY_POWER);</div><div class='ctx'> </div><div class='del'>-	error = request_threaded_irq(irq, NULL, mfld_pb_isr, 0,</div><div class='add'>+	error = request_threaded_irq(irq, NULL, mfld_pb_isr, IRQF_NO_SUSPEND,</div><div class='ctx'> 			DRIVER_NAME, input);</div><div class='ctx'> 	if (error) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unable to request irq %d for mfld power"</div><div class='head'>diff --git a/drivers/platform/x86/sony-laptop.c b/drivers/platform/x86/sony-laptop.c<br/>index 8a51795aa02a..210d4ae547c2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/sony-laptop.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/sony-laptop.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/sony-laptop.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/sony-laptop.c</a></div><div class='hunk'>@@ -141,6 +141,27 @@ MODULE_PARM_DESC(kbd_backlight_timeout,</div><div class='ctx'> 		 "(default: 0)");</div><div class='ctx'> </div><div class='ctx'> static void sony_nc_kbd_backlight_resume(void);</div><div class='add'>+static int sony_nc_kbd_backlight_setup(struct platform_device *pd,</div><div class='add'>+		unsigned int handle);</div><div class='add'>+static void sony_nc_kbd_backlight_cleanup(struct platform_device *pd);</div><div class='add'>+</div><div class='add'>+static int sony_nc_battery_care_setup(struct platform_device *pd,</div><div class='add'>+		unsigned int handle);</div><div class='add'>+static void sony_nc_battery_care_cleanup(struct platform_device *pd);</div><div class='add'>+</div><div class='add'>+static int sony_nc_thermal_setup(struct platform_device *pd);</div><div class='add'>+static void sony_nc_thermal_cleanup(struct platform_device *pd);</div><div class='add'>+static void sony_nc_thermal_resume(void);</div><div class='add'>+</div><div class='add'>+static int sony_nc_lid_resume_setup(struct platform_device *pd);</div><div class='add'>+static void sony_nc_lid_resume_cleanup(struct platform_device *pd);</div><div class='add'>+</div><div class='add'>+static int sony_nc_highspeed_charging_setup(struct platform_device *pd);</div><div class='add'>+static void sony_nc_highspeed_charging_cleanup(struct platform_device *pd);</div><div class='add'>+</div><div class='add'>+static int sony_nc_touchpad_setup(struct platform_device *pd,</div><div class='add'>+				  unsigned int handle);</div><div class='add'>+static void sony_nc_touchpad_cleanup(struct platform_device *pd);</div><div class='ctx'> </div><div class='ctx'> enum sony_nc_rfkill {</div><div class='ctx'> 	SONY_WIFI,</div><div class='hunk'>@@ -153,6 +174,9 @@ enum sony_nc_rfkill {</div><div class='ctx'> static int sony_rfkill_handle;</div><div class='ctx'> static struct rfkill *sony_rfkill_devices[N_SONY_RFKILL];</div><div class='ctx'> static int sony_rfkill_address[N_SONY_RFKILL] = {0x300, 0x500, 0x700, 0x900};</div><div class='add'>+static int sony_nc_rfkill_setup(struct acpi_device *device,</div><div class='add'>+		unsigned int handle);</div><div class='add'>+static void sony_nc_rfkill_cleanup(void);</div><div class='ctx'> static void sony_nc_rfkill_update(void);</div><div class='ctx'> </div><div class='ctx'> /*********** Input Devices ***********/</div><div class='hunk'>@@ -691,59 +715,97 @@ static struct acpi_device *sony_nc_acpi_device = NULL;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * acpi_evaluate_object wrappers</div><div class='add'>+ * all useful calls into SNC methods take one or zero parameters and return</div><div class='add'>+ * integers or arrays.</div><div class='ctx'>  */</div><div class='del'>-static int acpi_callgetfunc(acpi_handle handle, char *name, int *result)</div><div class='add'>+static union acpi_object *__call_snc_method(acpi_handle handle, char *method,</div><div class='add'>+		u64 *value)</div><div class='ctx'> {</div><div class='del'>-	struct acpi_buffer output;</div><div class='del'>-	union acpi_object out_obj;</div><div class='add'>+	union acpi_object *result = NULL;</div><div class='add'>+	struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };</div><div class='ctx'> 	acpi_status status;</div><div class='ctx'> </div><div class='del'>-	output.length = sizeof(out_obj);</div><div class='del'>-	output.pointer = &amp;out_obj;</div><div class='add'>+	if (value) {</div><div class='add'>+		struct acpi_object_list params;</div><div class='add'>+		union acpi_object in;</div><div class='add'>+		in.type = ACPI_TYPE_INTEGER;</div><div class='add'>+		in.integer.value = *value;</div><div class='add'>+		params.count = 1;</div><div class='add'>+		params.pointer = &amp;in;</div><div class='add'>+		status = acpi_evaluate_object(handle, method, &amp;params, &amp;output);</div><div class='add'>+		dprintk("__call_snc_method: [%s:0x%.8x%.8x]\n", method,</div><div class='add'>+				(unsigned int)(*value &gt;&gt; 32),</div><div class='add'>+				(unsigned int)*value &amp; 0xffffffff);</div><div class='add'>+	} else {</div><div class='add'>+		status = acpi_evaluate_object(handle, method, NULL, &amp;output);</div><div class='add'>+		dprintk("__call_snc_method: [%s]\n", method);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	status = acpi_evaluate_object(handle, name, NULL, &amp;output);</div><div class='del'>-	if ((status == AE_OK) &amp;&amp; (out_obj.type == ACPI_TYPE_INTEGER)) {</div><div class='del'>-		*result = out_obj.integer.value;</div><div class='del'>-		return 0;</div><div class='add'>+	if (ACPI_FAILURE(status)) {</div><div class='add'>+		pr_err("Failed to evaluate [%s]\n", method);</div><div class='add'>+		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pr_warn("acpi_callreadfunc failed\n");</div><div class='add'>+	result = (union acpi_object *) output.pointer;</div><div class='add'>+	if (!result)</div><div class='add'>+		dprintk("No return object [%s]\n", method);</div><div class='ctx'> </div><div class='del'>-	return -1;</div><div class='add'>+	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int acpi_callsetfunc(acpi_handle handle, char *name, int value,</div><div class='del'>-			    int *result)</div><div class='add'>+static int sony_nc_int_call(acpi_handle handle, char *name, int *value,</div><div class='add'>+		int *result)</div><div class='ctx'> {</div><div class='del'>-	struct acpi_object_list params;</div><div class='del'>-	union acpi_object in_obj;</div><div class='del'>-	struct acpi_buffer output;</div><div class='del'>-	union acpi_object out_obj;</div><div class='del'>-	acpi_status status;</div><div class='del'>-</div><div class='del'>-	params.count = 1;</div><div class='del'>-	params.pointer = &amp;in_obj;</div><div class='del'>-	in_obj.type = ACPI_TYPE_INTEGER;</div><div class='del'>-	in_obj.integer.value = value;</div><div class='add'>+	union acpi_object *object = NULL;</div><div class='add'>+	if (value) {</div><div class='add'>+		u64 v = *value;</div><div class='add'>+		object = __call_snc_method(handle, name, &amp;v);</div><div class='add'>+	} else</div><div class='add'>+		object = __call_snc_method(handle, name, NULL);</div><div class='ctx'> </div><div class='del'>-	output.length = sizeof(out_obj);</div><div class='del'>-	output.pointer = &amp;out_obj;</div><div class='add'>+	if (!object)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	status = acpi_evaluate_object(handle, name, &amp;params, &amp;output);</div><div class='del'>-	if (status == AE_OK) {</div><div class='del'>-		if (result != NULL) {</div><div class='del'>-			if (out_obj.type != ACPI_TYPE_INTEGER) {</div><div class='del'>-				pr_warn("acpi_evaluate_object bad return type\n");</div><div class='del'>-				return -1;</div><div class='del'>-			}</div><div class='del'>-			*result = out_obj.integer.value;</div><div class='del'>-		}</div><div class='del'>-		return 0;</div><div class='add'>+	if (object-&gt;type != ACPI_TYPE_INTEGER) {</div><div class='add'>+		pr_warn("Invalid acpi_object: expected 0x%x got 0x%x\n",</div><div class='add'>+				ACPI_TYPE_INTEGER, object-&gt;type);</div><div class='add'>+		kfree(object);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pr_warn("acpi_evaluate_object failed\n");</div><div class='add'>+	if (result)</div><div class='add'>+		*result = object-&gt;integer.value;</div><div class='add'>+</div><div class='add'>+	kfree(object);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MIN(a, b)	(a &gt; b ? b : a)</div><div class='add'>+static int sony_nc_buffer_call(acpi_handle handle, char *name, u64 *value,</div><div class='add'>+		void *buffer, size_t buflen)</div><div class='add'>+{</div><div class='add'>+	size_t len = len;</div><div class='add'>+	union acpi_object *object = __call_snc_method(handle, name, value);</div><div class='add'>+</div><div class='add'>+	if (!object)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (object-&gt;type == ACPI_TYPE_BUFFER)</div><div class='add'>+		len = MIN(buflen, object-&gt;buffer.length);</div><div class='add'>+</div><div class='add'>+	else if (object-&gt;type == ACPI_TYPE_INTEGER)</div><div class='add'>+		len = MIN(buflen, sizeof(object-&gt;integer.value));</div><div class='add'>+</div><div class='add'>+	else {</div><div class='add'>+		pr_warn("Invalid acpi_object: expected 0x%x got 0x%x\n",</div><div class='add'>+				ACPI_TYPE_BUFFER, object-&gt;type);</div><div class='add'>+		kfree(object);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return -1;</div><div class='add'>+	memcpy(buffer, object-&gt;buffer.pointer, len);</div><div class='add'>+	kfree(object);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct sony_nc_handles {</div><div class='hunk'>@@ -770,16 +832,17 @@ static ssize_t sony_nc_handles_show(struct device *dev,</div><div class='ctx'> </div><div class='ctx'> static int sony_nc_handles_setup(struct platform_device *pd)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	int result;</div><div class='add'>+	int i, r, result, arg;</div><div class='ctx'> </div><div class='ctx'> 	handles = kzalloc(sizeof(*handles), GFP_KERNEL);</div><div class='ctx'> 	if (!handles)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(handles-&gt;cap); i++) {</div><div class='del'>-		if (!acpi_callsetfunc(sony_nc_acpi_handle,</div><div class='del'>-					"SN00", i + 0x20, &amp;result)) {</div><div class='add'>+		arg = i + 0x20;</div><div class='add'>+		r = sony_nc_int_call(sony_nc_acpi_handle, "SN00", &amp;arg,</div><div class='add'>+					&amp;result);</div><div class='add'>+		if (!r) {</div><div class='ctx'> 			dprintk("caching handle 0x%.4x (offset: 0x%.2x)\n",</div><div class='ctx'> 					result, i);</div><div class='ctx'> 			handles-&gt;cap[i] = result;</div><div class='hunk'>@@ -819,8 +882,8 @@ static int sony_find_snc_handle(int handle)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* not initialized yet, return early */</div><div class='del'>-	if (!handles)</div><div class='del'>-		return -1;</div><div class='add'>+	if (!handles || !handle)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 0x10; i++) {</div><div class='ctx'> 		if (handles-&gt;cap[i] == handle) {</div><div class='hunk'>@@ -830,21 +893,20 @@ static int sony_find_snc_handle(int handle)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	dprintk("handle 0x%.4x not found\n", handle);</div><div class='del'>-	return -1;</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sony_call_snc_handle(int handle, int argument, int *result)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int arg, ret = 0;</div><div class='ctx'> 	int offset = sony_find_snc_handle(handle);</div><div class='ctx'> </div><div class='ctx'> 	if (offset &lt; 0)</div><div class='del'>-		return -1;</div><div class='add'>+		return offset;</div><div class='ctx'> </div><div class='del'>-	ret = acpi_callsetfunc(sony_nc_acpi_handle, "SN07", offset | argument,</div><div class='del'>-			result);</div><div class='del'>-	dprintk("called SN07 with 0x%.4x (result: 0x%.4x)\n", offset | argument,</div><div class='del'>-			*result);</div><div class='add'>+	arg = offset | argument;</div><div class='add'>+	ret = sony_nc_int_call(sony_nc_acpi_handle, "SN07", &amp;arg, result);</div><div class='add'>+	dprintk("called SN07 with 0x%.4x (result: 0x%.4x)\n", arg, *result);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -889,14 +951,16 @@ static int boolean_validate(const int direction, const int value)</div><div class='ctx'> static ssize_t sony_nc_sysfs_show(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 			      char *buffer)</div><div class='ctx'> {</div><div class='del'>-	int value;</div><div class='add'>+	int value, ret = 0;</div><div class='ctx'> 	struct sony_nc_value *item =</div><div class='ctx'> 	    container_of(attr, struct sony_nc_value, devattr);</div><div class='ctx'> </div><div class='ctx'> 	if (!*item-&gt;acpiget)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	if (acpi_callgetfunc(sony_nc_acpi_handle, *item-&gt;acpiget, &amp;value) &lt; 0)</div><div class='add'>+	ret = sony_nc_int_call(sony_nc_acpi_handle, *item-&gt;acpiget, NULL,</div><div class='add'>+				&amp;value);</div><div class='add'>+	if (ret &lt; 0)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	if (item-&gt;validate)</div><div class='hunk'>@@ -909,7 +973,8 @@ static ssize_t sony_nc_sysfs_store(struct device *dev,</div><div class='ctx'> 			       struct device_attribute *attr,</div><div class='ctx'> 			       const char *buffer, size_t count)</div><div class='ctx'> {</div><div class='del'>-	int value;</div><div class='add'>+	unsigned long value = 0;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> 	struct sony_nc_value *item =</div><div class='ctx'> 	    container_of(attr, struct sony_nc_value, devattr);</div><div class='ctx'> </div><div class='hunk'>@@ -919,7 +984,8 @@ static ssize_t sony_nc_sysfs_store(struct device *dev,</div><div class='ctx'> 	if (count &gt; 31)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	value = simple_strtoul(buffer, NULL, 10);</div><div class='add'>+	if (kstrtoul(buffer, 10, &amp;value))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (item-&gt;validate)</div><div class='ctx'> 		value = item-&gt;validate(SNC_VALIDATE_IN, value);</div><div class='hunk'>@@ -927,8 +993,11 @@ static ssize_t sony_nc_sysfs_store(struct device *dev,</div><div class='ctx'> 	if (value &lt; 0)</div><div class='ctx'> 		return value;</div><div class='ctx'> </div><div class='del'>-	if (acpi_callsetfunc(sony_nc_acpi_handle, *item-&gt;acpiset, value, NULL) &lt; 0)</div><div class='add'>+	ret = sony_nc_int_call(sony_nc_acpi_handle, *item-&gt;acpiset,</div><div class='add'>+			(int *)&amp;value, NULL);</div><div class='add'>+	if (ret &lt; 0)</div><div class='ctx'> 		return -EIO;</div><div class='add'>+</div><div class='ctx'> 	item-&gt;value = value;</div><div class='ctx'> 	item-&gt;valid = 1;</div><div class='ctx'> 	return count;</div><div class='hunk'>@@ -948,15 +1017,15 @@ struct sony_backlight_props sony_bl_props;</div><div class='ctx'> </div><div class='ctx'> static int sony_backlight_update_status(struct backlight_device *bd)</div><div class='ctx'> {</div><div class='del'>-	return acpi_callsetfunc(sony_nc_acpi_handle, "SBRT",</div><div class='del'>-				bd-&gt;props.brightness + 1, NULL);</div><div class='add'>+	int arg = bd-&gt;props.brightness + 1;</div><div class='add'>+	return sony_nc_int_call(sony_nc_acpi_handle, "SBRT", &amp;arg, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sony_backlight_get_brightness(struct backlight_device *bd)</div><div class='ctx'> {</div><div class='ctx'> 	int value;</div><div class='ctx'> </div><div class='del'>-	if (acpi_callgetfunc(sony_nc_acpi_handle, "GBRT", &amp;value))</div><div class='add'>+	if (sony_nc_int_call(sony_nc_acpi_handle, "GBRT", NULL, &amp;value))</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	/* brightness levels are 1-based, while backlight ones are 0-based */</div><div class='ctx'> 	return value - 1;</div><div class='hunk'>@@ -1024,10 +1093,14 @@ static struct sony_nc_event sony_100_events[] = {</div><div class='ctx'> 	{ 0x06, SONYPI_EVENT_FNKEY_RELEASED },</div><div class='ctx'> 	{ 0x87, SONYPI_EVENT_FNKEY_F7 },</div><div class='ctx'> 	{ 0x07, SONYPI_EVENT_FNKEY_RELEASED },</div><div class='add'>+	{ 0x88, SONYPI_EVENT_FNKEY_F8 },</div><div class='add'>+	{ 0x08, SONYPI_EVENT_FNKEY_RELEASED },</div><div class='ctx'> 	{ 0x89, SONYPI_EVENT_FNKEY_F9 },</div><div class='ctx'> 	{ 0x09, SONYPI_EVENT_FNKEY_RELEASED },</div><div class='ctx'> 	{ 0x8A, SONYPI_EVENT_FNKEY_F10 },</div><div class='ctx'> 	{ 0x0A, SONYPI_EVENT_FNKEY_RELEASED },</div><div class='add'>+	{ 0x8B, SONYPI_EVENT_FNKEY_F11 },</div><div class='add'>+	{ 0x0B, SONYPI_EVENT_FNKEY_RELEASED },</div><div class='ctx'> 	{ 0x8C, SONYPI_EVENT_FNKEY_F12 },</div><div class='ctx'> 	{ 0x0C, SONYPI_EVENT_FNKEY_RELEASED },</div><div class='ctx'> 	{ 0x9d, SONYPI_EVENT_ZOOM_PRESSED },</div><div class='hunk'>@@ -1063,63 +1136,116 @@ static struct sony_nc_event sony_127_events[] = {</div><div class='ctx'> 	{ 0, 0 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int sony_nc_hotkeys_decode(u32 event, unsigned int handle)</div><div class='add'>+{</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+	unsigned int result = 0;</div><div class='add'>+	struct sony_nc_event *key_event;</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(handle, 0x200, &amp;result)) {</div><div class='add'>+		dprintk("Unable to decode event 0x%.2x 0x%.2x\n", handle,</div><div class='add'>+				event);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	result &amp;= 0xFF;</div><div class='add'>+</div><div class='add'>+	if (handle == 0x0100)</div><div class='add'>+		key_event = sony_100_events;</div><div class='add'>+	else</div><div class='add'>+		key_event = sony_127_events;</div><div class='add'>+</div><div class='add'>+	for (; key_event-&gt;data; key_event++) {</div><div class='add'>+		if (key_event-&gt;data == result) {</div><div class='add'>+			ret = key_event-&gt;event;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!key_event-&gt;data)</div><div class='add'>+		pr_info("Unknown hotkey 0x%.2x/0x%.2x (handle 0x%.2x)\n",</div><div class='add'>+				event, result, handle);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * ACPI callbacks</div><div class='ctx'>  */</div><div class='ctx'> static void sony_nc_notify(struct acpi_device *device, u32 event)</div><div class='ctx'> {</div><div class='del'>-	u32 ev = event;</div><div class='add'>+	u32 real_ev = event;</div><div class='add'>+	u8 ev_type = 0;</div><div class='add'>+	dprintk("sony_nc_notify, event: 0x%.2x\n", event);</div><div class='add'>+</div><div class='add'>+	if (event &gt;= 0x90) {</div><div class='add'>+		unsigned int result = 0;</div><div class='add'>+		unsigned int arg = 0;</div><div class='add'>+		unsigned int handle = 0;</div><div class='add'>+		unsigned int offset = event - 0x90;</div><div class='add'>+</div><div class='add'>+		if (offset &gt;= ARRAY_SIZE(handles-&gt;cap)) {</div><div class='add'>+			pr_err("Event 0x%x outside of capabilities list\n",</div><div class='add'>+					event);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		handle = handles-&gt;cap[offset];</div><div class='add'>+</div><div class='add'>+		/* list of handles known for generating events */</div><div class='add'>+		switch (handle) {</div><div class='add'>+		/* hotkey event */</div><div class='add'>+		case 0x0100:</div><div class='add'>+		case 0x0127:</div><div class='add'>+			ev_type = 1;</div><div class='add'>+			real_ev = sony_nc_hotkeys_decode(event, handle);</div><div class='add'>+</div><div class='add'>+			if (real_ev &gt; 0)</div><div class='add'>+				sony_laptop_report_input_event(real_ev);</div><div class='add'>+			else</div><div class='add'>+				/* restore the original event for reporting */</div><div class='add'>+				real_ev = event;</div><div class='ctx'> </div><div class='del'>-	if (ev &gt;= 0x90) {</div><div class='del'>-		/* New-style event */</div><div class='del'>-		int result;</div><div class='del'>-		int key_handle = 0;</div><div class='del'>-		ev -= 0x90;</div><div class='del'>-</div><div class='del'>-		if (sony_find_snc_handle(0x100) == ev)</div><div class='del'>-			key_handle = 0x100;</div><div class='del'>-		if (sony_find_snc_handle(0x127) == ev)</div><div class='del'>-			key_handle = 0x127;</div><div class='del'>-</div><div class='del'>-		if (key_handle) {</div><div class='del'>-			struct sony_nc_event *key_event;</div><div class='del'>-</div><div class='del'>-			if (sony_call_snc_handle(key_handle, 0x200, &amp;result)) {</div><div class='del'>-				dprintk("sony_nc_notify, unable to decode"</div><div class='del'>-					" event 0x%.2x 0x%.2x\n", key_handle,</div><div class='del'>-					ev);</div><div class='del'>-				/* restore the original event */</div><div class='del'>-				ev = event;</div><div class='del'>-			} else {</div><div class='del'>-				ev = result &amp; 0xFF;</div><div class='del'>-</div><div class='del'>-				if (key_handle == 0x100)</div><div class='del'>-					key_event = sony_100_events;</div><div class='del'>-				else</div><div class='del'>-					key_event = sony_127_events;</div><div class='del'>-</div><div class='del'>-				for (; key_event-&gt;data; key_event++) {</div><div class='del'>-					if (key_event-&gt;data == ev) {</div><div class='del'>-						ev = key_event-&gt;event;</div><div class='del'>-						break;</div><div class='del'>-					}</div><div class='del'>-				}</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-				if (!key_event-&gt;data)</div><div class='del'>-					pr_info("Unknown event: 0x%x 0x%x\n",</div><div class='del'>-						key_handle, ev);</div><div class='del'>-				else</div><div class='del'>-					sony_laptop_report_input_event(ev);</div><div class='del'>-			}</div><div class='del'>-		} else if (sony_find_snc_handle(sony_rfkill_handle) == ev) {</div><div class='del'>-			sony_nc_rfkill_update();</div><div class='del'>-			return;</div><div class='add'>+		/* wlan switch */</div><div class='add'>+		case 0x0124:</div><div class='add'>+		case 0x0135:</div><div class='add'>+			/* events on this handle are reported when the</div><div class='add'>+			 * switch changes position or for battery</div><div class='add'>+			 * events. We'll notify both of them but only</div><div class='add'>+			 * update the rfkill device status when the</div><div class='add'>+			 * switch is moved.</div><div class='add'>+			 */</div><div class='add'>+			ev_type = 2;</div><div class='add'>+			sony_call_snc_handle(handle, 0x0100, &amp;result);</div><div class='add'>+			real_ev = result &amp; 0x03;</div><div class='add'>+</div><div class='add'>+			/* hw switch event */</div><div class='add'>+			if (real_ev == 1)</div><div class='add'>+				sony_nc_rfkill_update();</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			dprintk("Unknown event 0x%x for handle 0x%x\n",</div><div class='add'>+					event, handle);</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='del'>-	} else</div><div class='del'>-		sony_laptop_report_input_event(ev);</div><div class='ctx'> </div><div class='del'>-	dprintk("sony_nc_notify, event: 0x%.2x\n", ev);</div><div class='del'>-	acpi_bus_generate_proc_event(sony_nc_acpi_device, 1, ev);</div><div class='add'>+		/* clear the event (and the event reason when present) */</div><div class='add'>+		arg = 1 &lt;&lt; offset;</div><div class='add'>+		sony_nc_int_call(sony_nc_acpi_handle, "SN05", &amp;arg, &amp;result);</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		/* old style event */</div><div class='add'>+		ev_type = 1;</div><div class='add'>+		sony_laptop_report_input_event(real_ev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	acpi_bus_generate_proc_event(sony_nc_acpi_device, ev_type, real_ev);</div><div class='add'>+</div><div class='add'>+	acpi_bus_generate_netlink_event(sony_nc_acpi_device-&gt;pnp.device_class,</div><div class='add'>+			dev_name(&amp;sony_nc_acpi_device-&gt;dev), ev_type, real_ev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static acpi_status sony_walk_callback(acpi_handle handle, u32 level,</div><div class='hunk'>@@ -1140,20 +1266,190 @@ static acpi_status sony_walk_callback(acpi_handle handle, u32 level,</div><div class='ctx'> /*</div><div class='ctx'>  * ACPI device</div><div class='ctx'>  */</div><div class='del'>-static int sony_nc_function_setup(struct acpi_device *device)</div><div class='add'>+static void sony_nc_function_setup(struct acpi_device *device,</div><div class='add'>+		struct platform_device *pf_device)</div><div class='ctx'> {</div><div class='del'>-	int result;</div><div class='add'>+	unsigned int i, result, bitmask, arg;</div><div class='add'>+</div><div class='add'>+	if (!handles)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* setup found handles here */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(handles-&gt;cap); i++) {</div><div class='add'>+		unsigned int handle = handles-&gt;cap[i];</div><div class='add'>+</div><div class='add'>+		if (!handle)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dprintk("setting up handle 0x%.4x\n", handle);</div><div class='add'>+</div><div class='add'>+		switch (handle) {</div><div class='add'>+		case 0x0100:</div><div class='add'>+		case 0x0101:</div><div class='add'>+		case 0x0127:</div><div class='add'>+			/* setup hotkeys */</div><div class='add'>+			sony_call_snc_handle(handle, 0, &amp;result);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0102:</div><div class='add'>+			/* setup hotkeys */</div><div class='add'>+			sony_call_snc_handle(handle, 0x100, &amp;result);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0105:</div><div class='add'>+		case 0x0148:</div><div class='add'>+			/* touchpad enable/disable */</div><div class='add'>+			result = sony_nc_touchpad_setup(pf_device, handle);</div><div class='add'>+			if (result)</div><div class='add'>+				pr_err("couldn't set up touchpad control function (%d)\n",</div><div class='add'>+						result);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0115:</div><div class='add'>+		case 0x0136:</div><div class='add'>+		case 0x013f:</div><div class='add'>+			result = sony_nc_battery_care_setup(pf_device, handle);</div><div class='add'>+			if (result)</div><div class='add'>+				pr_err("couldn't set up battery care function (%d)\n",</div><div class='add'>+						result);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0119:</div><div class='add'>+			result = sony_nc_lid_resume_setup(pf_device);</div><div class='add'>+			if (result)</div><div class='add'>+				pr_err("couldn't set up lid resume function (%d)\n",</div><div class='add'>+						result);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0122:</div><div class='add'>+			result = sony_nc_thermal_setup(pf_device);</div><div class='add'>+			if (result)</div><div class='add'>+				pr_err("couldn't set up thermal profile function (%d)\n",</div><div class='add'>+						result);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0131:</div><div class='add'>+			result = sony_nc_highspeed_charging_setup(pf_device);</div><div class='add'>+			if (result)</div><div class='add'>+				pr_err("couldn't set up high speed charging function (%d)\n",</div><div class='add'>+				       result);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0124:</div><div class='add'>+		case 0x0135:</div><div class='add'>+			result = sony_nc_rfkill_setup(device, handle);</div><div class='add'>+			if (result)</div><div class='add'>+				pr_err("couldn't set up rfkill support (%d)\n",</div><div class='add'>+						result);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0137:</div><div class='add'>+		case 0x0143:</div><div class='add'>+			result = sony_nc_kbd_backlight_setup(pf_device, handle);</div><div class='add'>+			if (result)</div><div class='add'>+				pr_err("couldn't set up keyboard backlight function (%d)\n",</div><div class='add'>+						result);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable all events */</div><div class='del'>-	acpi_callsetfunc(sony_nc_acpi_handle, "SN02", 0xffff, &amp;result);</div><div class='add'>+	arg = 0x10;</div><div class='add'>+	if (!sony_nc_int_call(sony_nc_acpi_handle, "SN00", &amp;arg, &amp;bitmask))</div><div class='add'>+		sony_nc_int_call(sony_nc_acpi_handle, "SN02", &amp;bitmask,</div><div class='add'>+				&amp;result);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sony_nc_function_cleanup(struct platform_device *pd)</div><div class='add'>+{</div><div class='add'>+	unsigned int i, result, bitmask, handle;</div><div class='ctx'> </div><div class='del'>-	/* Setup hotkeys */</div><div class='del'>-	sony_call_snc_handle(0x0100, 0, &amp;result);</div><div class='del'>-	sony_call_snc_handle(0x0101, 0, &amp;result);</div><div class='del'>-	sony_call_snc_handle(0x0102, 0x100, &amp;result);</div><div class='del'>-	sony_call_snc_handle(0x0127, 0, &amp;result);</div><div class='add'>+	/* get enabled events and disable them */</div><div class='add'>+	sony_nc_int_call(sony_nc_acpi_handle, "SN01", NULL, &amp;bitmask);</div><div class='add'>+	sony_nc_int_call(sony_nc_acpi_handle, "SN03", &amp;bitmask, &amp;result);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* cleanup handles here */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(handles-&gt;cap); i++) {</div><div class='add'>+</div><div class='add'>+		handle = handles-&gt;cap[i];</div><div class='add'>+</div><div class='add'>+		if (!handle)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		switch (handle) {</div><div class='add'>+		case 0x0105:</div><div class='add'>+		case 0x0148:</div><div class='add'>+			sony_nc_touchpad_cleanup(pd);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0115:</div><div class='add'>+		case 0x0136:</div><div class='add'>+		case 0x013f:</div><div class='add'>+			sony_nc_battery_care_cleanup(pd);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0119:</div><div class='add'>+			sony_nc_lid_resume_cleanup(pd);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0122:</div><div class='add'>+			sony_nc_thermal_cleanup(pd);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0131:</div><div class='add'>+			sony_nc_highspeed_charging_cleanup(pd);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0124:</div><div class='add'>+		case 0x0135:</div><div class='add'>+			sony_nc_rfkill_cleanup();</div><div class='add'>+			break;</div><div class='add'>+		case 0x0137:</div><div class='add'>+		case 0x0143:</div><div class='add'>+			sony_nc_kbd_backlight_cleanup(pd);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* finally cleanup the handles list */</div><div class='add'>+	sony_nc_handles_cleanup(pd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sony_nc_function_resume(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int i, result, bitmask, arg;</div><div class='add'>+</div><div class='add'>+	dprintk("Resuming SNC device\n");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(handles-&gt;cap); i++) {</div><div class='add'>+		unsigned int handle = handles-&gt;cap[i];</div><div class='add'>+</div><div class='add'>+		if (!handle)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		switch (handle) {</div><div class='add'>+		case 0x0100:</div><div class='add'>+		case 0x0101:</div><div class='add'>+		case 0x0127:</div><div class='add'>+			/* re-enable hotkeys */</div><div class='add'>+			sony_call_snc_handle(handle, 0, &amp;result);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0102:</div><div class='add'>+			/* re-enable hotkeys */</div><div class='add'>+			sony_call_snc_handle(handle, 0x100, &amp;result);</div><div class='add'>+			break;</div><div class='add'>+		case 0x0122:</div><div class='add'>+			sony_nc_thermal_resume();</div><div class='add'>+			break;</div><div class='add'>+		case 0x0124:</div><div class='add'>+		case 0x0135:</div><div class='add'>+			sony_nc_rfkill_update();</div><div class='add'>+			break;</div><div class='add'>+		case 0x0137:</div><div class='add'>+		case 0x0143:</div><div class='add'>+			sony_nc_kbd_backlight_resume();</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable all events */</div><div class='add'>+	arg = 0x10;</div><div class='add'>+	if (!sony_nc_int_call(sony_nc_acpi_handle, "SN00", &amp;arg, &amp;bitmask))</div><div class='add'>+		sony_nc_int_call(sony_nc_acpi_handle, "SN02", &amp;bitmask,</div><div class='add'>+				&amp;result);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sony_nc_resume(struct acpi_device *device)</div><div class='hunk'>@@ -1166,8 +1462,8 @@ static int sony_nc_resume(struct acpi_device *device)</div><div class='ctx'> </div><div class='ctx'> 		if (!item-&gt;valid)</div><div class='ctx'> 			continue;</div><div class='del'>-		ret = acpi_callsetfunc(sony_nc_acpi_handle, *item-&gt;acpiset,</div><div class='del'>-				       item-&gt;value, NULL);</div><div class='add'>+		ret = sony_nc_int_call(sony_nc_acpi_handle, *item-&gt;acpiset,</div><div class='add'>+				       &amp;item-&gt;value, NULL);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			pr_err("%s: %d\n", __func__, ret);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1176,21 +1472,14 @@ static int sony_nc_resume(struct acpi_device *device)</div><div class='ctx'> </div><div class='ctx'> 	if (ACPI_SUCCESS(acpi_get_handle(sony_nc_acpi_handle, "ECON",</div><div class='ctx'> 					 &amp;handle))) {</div><div class='del'>-		if (acpi_callsetfunc(sony_nc_acpi_handle, "ECON", 1, NULL))</div><div class='add'>+		int arg = 1;</div><div class='add'>+		if (sony_nc_int_call(sony_nc_acpi_handle, "ECON", &amp;arg, NULL))</div><div class='ctx'> 			dprintk("ECON Method failed\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ACPI_SUCCESS(acpi_get_handle(sony_nc_acpi_handle, "SN00",</div><div class='del'>-					 &amp;handle))) {</div><div class='del'>-		dprintk("Doing SNC setup\n");</div><div class='del'>-		sony_nc_function_setup(device);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* re-read rfkill state */</div><div class='del'>-	sony_nc_rfkill_update();</div><div class='del'>-</div><div class='del'>-	/* restore kbd backlight states */</div><div class='del'>-	sony_nc_kbd_backlight_resume();</div><div class='add'>+					 &amp;handle)))</div><div class='add'>+		sony_nc_function_resume();</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1213,7 +1502,7 @@ static int sony_nc_rfkill_set(void *data, bool blocked)</div><div class='ctx'> 	int argument = sony_rfkill_address[(long) data] + 0x100;</div><div class='ctx'> </div><div class='ctx'> 	if (!blocked)</div><div class='del'>-		argument |= 0xff0000;</div><div class='add'>+		argument |= 0x030000;</div><div class='ctx'> </div><div class='ctx'> 	return sony_call_snc_handle(sony_rfkill_handle, argument, &amp;result);</div><div class='ctx'> }</div><div class='hunk'>@@ -1230,7 +1519,7 @@ static int sony_nc_setup_rfkill(struct acpi_device *device,</div><div class='ctx'> 	enum rfkill_type type;</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	int result;</div><div class='del'>-	bool hwblock;</div><div class='add'>+	bool hwblock, swblock;</div><div class='ctx'> </div><div class='ctx'> 	switch (nc_type) {</div><div class='ctx'> 	case SONY_WIFI:</div><div class='hunk'>@@ -1258,8 +1547,21 @@ static int sony_nc_setup_rfkill(struct acpi_device *device,</div><div class='ctx'> 	if (!rfk)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	sony_call_snc_handle(sony_rfkill_handle, 0x200, &amp;result);</div><div class='add'>+	if (sony_call_snc_handle(sony_rfkill_handle, 0x200, &amp;result) &lt; 0) {</div><div class='add'>+		rfkill_destroy(rfk);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='ctx'> 	hwblock = !(result &amp; 0x1);</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(sony_rfkill_handle,</div><div class='add'>+				sony_rfkill_address[nc_type],</div><div class='add'>+				&amp;result) &lt; 0) {</div><div class='add'>+		rfkill_destroy(rfk);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	swblock = !(result &amp; 0x2);</div><div class='add'>+</div><div class='add'>+	rfkill_init_sw_state(rfk, swblock);</div><div class='ctx'> 	rfkill_set_hw_state(rfk, hwblock);</div><div class='ctx'> </div><div class='ctx'> 	err = rfkill_register(rfk);</div><div class='hunk'>@@ -1295,101 +1597,79 @@ static void sony_nc_rfkill_update(void)</div><div class='ctx'> </div><div class='ctx'> 		sony_call_snc_handle(sony_rfkill_handle, argument, &amp;result);</div><div class='ctx'> 		rfkill_set_states(sony_rfkill_devices[i],</div><div class='del'>-				  !(result &amp; 0xf), false);</div><div class='add'>+				  !(result &amp; 0x2), false);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sony_nc_rfkill_setup(struct acpi_device *device)</div><div class='add'>+static int sony_nc_rfkill_setup(struct acpi_device *device,</div><div class='add'>+		unsigned int handle)</div><div class='ctx'> {</div><div class='del'>-	int offset;</div><div class='del'>-	u8 dev_code, i;</div><div class='del'>-	acpi_status status;</div><div class='del'>-	struct acpi_object_list params;</div><div class='del'>-	union acpi_object in_obj;</div><div class='del'>-	union acpi_object *device_enum;</div><div class='del'>-	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };</div><div class='del'>-</div><div class='del'>-	offset = sony_find_snc_handle(0x124);</div><div class='del'>-	if (offset == -1) {</div><div class='del'>-		offset = sony_find_snc_handle(0x135);</div><div class='del'>-		if (offset == -1)</div><div class='del'>-			return;</div><div class='del'>-		else</div><div class='del'>-			sony_rfkill_handle = 0x135;</div><div class='del'>-	} else</div><div class='del'>-		sony_rfkill_handle = 0x124;</div><div class='del'>-	dprintk("Found rkfill handle: 0x%.4x\n", sony_rfkill_handle);</div><div class='del'>-</div><div class='del'>-	/* need to read the whole buffer returned by the acpi call to SN06</div><div class='del'>-	 * here otherwise we may miss some features</div><div class='del'>-	 */</div><div class='del'>-	params.count = 1;</div><div class='del'>-	params.pointer = &amp;in_obj;</div><div class='del'>-	in_obj.type = ACPI_TYPE_INTEGER;</div><div class='del'>-	in_obj.integer.value = offset;</div><div class='del'>-	status = acpi_evaluate_object(sony_nc_acpi_handle, "SN06", &amp;params,</div><div class='del'>-			&amp;buffer);</div><div class='del'>-	if (ACPI_FAILURE(status)) {</div><div class='del'>-		dprintk("Radio device enumeration failed\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	device_enum = (union acpi_object *) buffer.pointer;</div><div class='del'>-	if (!device_enum) {</div><div class='del'>-		pr_err("No SN06 return object\n");</div><div class='del'>-		goto out_no_enum;</div><div class='del'>-	}</div><div class='del'>-	if (device_enum-&gt;type != ACPI_TYPE_BUFFER) {</div><div class='del'>-		pr_err("Invalid SN06 return object 0x%.2x\n",</div><div class='del'>-		       device_enum-&gt;type);</div><div class='del'>-		goto out_no_enum;</div><div class='del'>-	}</div><div class='add'>+	u64 offset;</div><div class='add'>+	int i;</div><div class='add'>+	unsigned char buffer[32] = { 0 };</div><div class='ctx'> </div><div class='del'>-	/* the buffer is filled with magic numbers describing the devices</div><div class='del'>-	 * available, 0xff terminates the enumeration</div><div class='add'>+	offset = sony_find_snc_handle(handle);</div><div class='add'>+	sony_rfkill_handle = handle;</div><div class='add'>+</div><div class='add'>+	i = sony_nc_buffer_call(sony_nc_acpi_handle, "SN06", &amp;offset, buffer,</div><div class='add'>+			32);</div><div class='add'>+	if (i &lt; 0)</div><div class='add'>+		return i;</div><div class='add'>+</div><div class='add'>+	/* The buffer is filled with magic numbers describing the devices</div><div class='add'>+	 * available, 0xff terminates the enumeration.</div><div class='add'>+	 * Known codes:</div><div class='add'>+	 *	0x00 WLAN</div><div class='add'>+	 *	0x10 BLUETOOTH</div><div class='add'>+	 *	0x20 WWAN GPRS-EDGE</div><div class='add'>+	 *	0x21 WWAN HSDPA</div><div class='add'>+	 *	0x22 WWAN EV-DO</div><div class='add'>+	 *	0x23 WWAN GPS</div><div class='add'>+	 *	0x25 Gobi WWAN no GPS</div><div class='add'>+	 *	0x26 Gobi WWAN + GPS</div><div class='add'>+	 *	0x28 Gobi WWAN no GPS</div><div class='add'>+	 *	0x29 Gobi WWAN + GPS</div><div class='add'>+	 *	0x30 WIMAX</div><div class='add'>+	 *	0x50 Gobi WWAN no GPS</div><div class='add'>+	 *	0x51 Gobi WWAN + GPS</div><div class='add'>+	 *	0x70 no SIM card slot</div><div class='add'>+	 *	0x71 SIM card slot</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; device_enum-&gt;buffer.length; i++) {</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(buffer); i++) {</div><div class='ctx'> </div><div class='del'>-		dev_code = *(device_enum-&gt;buffer.pointer + i);</div><div class='del'>-		if (dev_code == 0xff)</div><div class='add'>+		if (buffer[i] == 0xff)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		dprintk("Radio devices, looking at 0x%.2x\n", dev_code);</div><div class='add'>+		dprintk("Radio devices, found 0x%.2x\n", buffer[i]);</div><div class='ctx'> </div><div class='del'>-		if (dev_code == 0 &amp;&amp; !sony_rfkill_devices[SONY_WIFI])</div><div class='add'>+		if (buffer[i] == 0 &amp;&amp; !sony_rfkill_devices[SONY_WIFI])</div><div class='ctx'> 			sony_nc_setup_rfkill(device, SONY_WIFI);</div><div class='ctx'> </div><div class='del'>-		if (dev_code == 0x10 &amp;&amp; !sony_rfkill_devices[SONY_BLUETOOTH])</div><div class='add'>+		if (buffer[i] == 0x10 &amp;&amp; !sony_rfkill_devices[SONY_BLUETOOTH])</div><div class='ctx'> 			sony_nc_setup_rfkill(device, SONY_BLUETOOTH);</div><div class='ctx'> </div><div class='del'>-		if ((0xf0 &amp; dev_code) == 0x20 &amp;&amp;</div><div class='add'>+		if (((0xf0 &amp; buffer[i]) == 0x20 ||</div><div class='add'>+					(0xf0 &amp; buffer[i]) == 0x50) &amp;&amp;</div><div class='ctx'> 				!sony_rfkill_devices[SONY_WWAN])</div><div class='ctx'> 			sony_nc_setup_rfkill(device, SONY_WWAN);</div><div class='ctx'> </div><div class='del'>-		if (dev_code == 0x30 &amp;&amp; !sony_rfkill_devices[SONY_WIMAX])</div><div class='add'>+		if (buffer[i] == 0x30 &amp;&amp; !sony_rfkill_devices[SONY_WIMAX])</div><div class='ctx'> 			sony_nc_setup_rfkill(device, SONY_WIMAX);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-out_no_enum:</div><div class='del'>-	kfree(buffer.pointer);</div><div class='del'>-	return;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Keyboard backlight feature */</div><div class='del'>-#define KBDBL_HANDLER	0x137</div><div class='del'>-#define KBDBL_PRESENT	0xB00</div><div class='del'>-#define	SET_MODE	0xC00</div><div class='del'>-#define SET_STATE	0xD00</div><div class='del'>-#define SET_TIMEOUT	0xE00</div><div class='del'>-</div><div class='ctx'> struct kbd_backlight {</div><div class='del'>-	int mode;</div><div class='del'>-	int timeout;</div><div class='add'>+	unsigned int handle;</div><div class='add'>+	unsigned int base;</div><div class='add'>+	unsigned int mode;</div><div class='add'>+	unsigned int timeout;</div><div class='ctx'> 	struct device_attribute mode_attr;</div><div class='ctx'> 	struct device_attribute timeout_attr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct kbd_backlight *kbdbl_handle;</div><div class='add'>+static struct kbd_backlight *kbdbl_ctl;</div><div class='ctx'> </div><div class='ctx'> static ssize_t __sony_nc_kbd_backlight_mode_set(u8 value)</div><div class='ctx'> {</div><div class='hunk'>@@ -1398,15 +1678,15 @@ static ssize_t __sony_nc_kbd_backlight_mode_set(u8 value)</div><div class='ctx'> 	if (value &gt; 1)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (sony_call_snc_handle(KBDBL_HANDLER,</div><div class='del'>-				(value &lt;&lt; 0x10) | SET_MODE, &amp;result))</div><div class='add'>+	if (sony_call_snc_handle(kbdbl_ctl-&gt;handle,</div><div class='add'>+				(value &lt;&lt; 0x10) | (kbdbl_ctl-&gt;base), &amp;result))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	/* Try to turn the light on/off immediately */</div><div class='del'>-	sony_call_snc_handle(KBDBL_HANDLER, (value &lt;&lt; 0x10) | SET_STATE,</div><div class='del'>-			&amp;result);</div><div class='add'>+	sony_call_snc_handle(kbdbl_ctl-&gt;handle,</div><div class='add'>+			(value &lt;&lt; 0x10) | (kbdbl_ctl-&gt;base + 0x100), &amp;result);</div><div class='ctx'> </div><div class='del'>-	kbdbl_handle-&gt;mode = value;</div><div class='add'>+	kbdbl_ctl-&gt;mode = value;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1421,7 +1701,7 @@ static ssize_t sony_nc_kbd_backlight_mode_store(struct device *dev,</div><div class='ctx'> 	if (count &gt; 31)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (strict_strtoul(buffer, 10, &amp;value))</div><div class='add'>+	if (kstrtoul(buffer, 10, &amp;value))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ret = __sony_nc_kbd_backlight_mode_set(value);</div><div class='hunk'>@@ -1435,7 +1715,7 @@ static ssize_t sony_nc_kbd_backlight_mode_show(struct device *dev,</div><div class='ctx'> 		struct device_attribute *attr, char *buffer)</div><div class='ctx'> {</div><div class='ctx'> 	ssize_t count = 0;</div><div class='del'>-	count = snprintf(buffer, PAGE_SIZE, "%d\n", kbdbl_handle-&gt;mode);</div><div class='add'>+	count = snprintf(buffer, PAGE_SIZE, "%d\n", kbdbl_ctl-&gt;mode);</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1446,11 +1726,11 @@ static int __sony_nc_kbd_backlight_timeout_set(u8 value)</div><div class='ctx'> 	if (value &gt; 3)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (sony_call_snc_handle(KBDBL_HANDLER,</div><div class='del'>-				(value &lt;&lt; 0x10) | SET_TIMEOUT, &amp;result))</div><div class='add'>+	if (sony_call_snc_handle(kbdbl_ctl-&gt;handle, (value &lt;&lt; 0x10) |</div><div class='add'>+				(kbdbl_ctl-&gt;base + 0x200), &amp;result))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	kbdbl_handle-&gt;timeout = value;</div><div class='add'>+	kbdbl_ctl-&gt;timeout = value;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1465,7 +1745,7 @@ static ssize_t sony_nc_kbd_backlight_timeout_store(struct device *dev,</div><div class='ctx'> 	if (count &gt; 31)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (strict_strtoul(buffer, 10, &amp;value))</div><div class='add'>+	if (kstrtoul(buffer, 10, &amp;value))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ret = __sony_nc_kbd_backlight_timeout_set(value);</div><div class='hunk'>@@ -1479,39 +1759,58 @@ static ssize_t sony_nc_kbd_backlight_timeout_show(struct device *dev,</div><div class='ctx'> 		struct device_attribute *attr, char *buffer)</div><div class='ctx'> {</div><div class='ctx'> 	ssize_t count = 0;</div><div class='del'>-	count = snprintf(buffer, PAGE_SIZE, "%d\n", kbdbl_handle-&gt;timeout);</div><div class='add'>+	count = snprintf(buffer, PAGE_SIZE, "%d\n", kbdbl_ctl-&gt;timeout);</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sony_nc_kbd_backlight_setup(struct platform_device *pd)</div><div class='add'>+static int sony_nc_kbd_backlight_setup(struct platform_device *pd,</div><div class='add'>+		unsigned int handle)</div><div class='ctx'> {</div><div class='ctx'> 	int result;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (sony_call_snc_handle(KBDBL_HANDLER, KBDBL_PRESENT, &amp;result))</div><div class='del'>-		return 0;</div><div class='del'>-	if (!(result &amp; 0x02))</div><div class='add'>+	/* verify the kbd backlight presence, these handles are not used for</div><div class='add'>+	 * keyboard backlight only</div><div class='add'>+	 */</div><div class='add'>+	ret = sony_call_snc_handle(handle, handle == 0x0137 ? 0x0B00 : 0x0100,</div><div class='add'>+			&amp;result);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if ((handle == 0x0137 &amp;&amp; !(result &amp; 0x02)) ||</div><div class='add'>+			!(result &amp; 0x01)) {</div><div class='add'>+		dprintk("no backlight keyboard found\n");</div><div class='ctx'> 		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	kbdbl_handle = kzalloc(sizeof(*kbdbl_handle), GFP_KERNEL);</div><div class='del'>-	if (!kbdbl_handle)</div><div class='add'>+	kbdbl_ctl = kzalloc(sizeof(*kbdbl_ctl), GFP_KERNEL);</div><div class='add'>+	if (!kbdbl_ctl)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	sysfs_attr_init(&amp;kbdbl_handle-&gt;mode_attr.attr);</div><div class='del'>-	kbdbl_handle-&gt;mode_attr.attr.name = "kbd_backlight";</div><div class='del'>-	kbdbl_handle-&gt;mode_attr.attr.mode = S_IRUGO | S_IWUSR;</div><div class='del'>-	kbdbl_handle-&gt;mode_attr.show = sony_nc_kbd_backlight_mode_show;</div><div class='del'>-	kbdbl_handle-&gt;mode_attr.store = sony_nc_kbd_backlight_mode_store;</div><div class='add'>+	kbdbl_ctl-&gt;handle = handle;</div><div class='add'>+	if (handle == 0x0137)</div><div class='add'>+		kbdbl_ctl-&gt;base = 0x0C00;</div><div class='add'>+	else</div><div class='add'>+		kbdbl_ctl-&gt;base = 0x4000;</div><div class='add'>+</div><div class='add'>+	sysfs_attr_init(&amp;kbdbl_ctl-&gt;mode_attr.attr);</div><div class='add'>+	kbdbl_ctl-&gt;mode_attr.attr.name = "kbd_backlight";</div><div class='add'>+	kbdbl_ctl-&gt;mode_attr.attr.mode = S_IRUGO | S_IWUSR;</div><div class='add'>+	kbdbl_ctl-&gt;mode_attr.show = sony_nc_kbd_backlight_mode_show;</div><div class='add'>+	kbdbl_ctl-&gt;mode_attr.store = sony_nc_kbd_backlight_mode_store;</div><div class='ctx'> </div><div class='del'>-	sysfs_attr_init(&amp;kbdbl_handle-&gt;timeout_attr.attr);</div><div class='del'>-	kbdbl_handle-&gt;timeout_attr.attr.name = "kbd_backlight_timeout";</div><div class='del'>-	kbdbl_handle-&gt;timeout_attr.attr.mode = S_IRUGO | S_IWUSR;</div><div class='del'>-	kbdbl_handle-&gt;timeout_attr.show = sony_nc_kbd_backlight_timeout_show;</div><div class='del'>-	kbdbl_handle-&gt;timeout_attr.store = sony_nc_kbd_backlight_timeout_store;</div><div class='add'>+	sysfs_attr_init(&amp;kbdbl_ctl-&gt;timeout_attr.attr);</div><div class='add'>+	kbdbl_ctl-&gt;timeout_attr.attr.name = "kbd_backlight_timeout";</div><div class='add'>+	kbdbl_ctl-&gt;timeout_attr.attr.mode = S_IRUGO | S_IWUSR;</div><div class='add'>+	kbdbl_ctl-&gt;timeout_attr.show = sony_nc_kbd_backlight_timeout_show;</div><div class='add'>+	kbdbl_ctl-&gt;timeout_attr.store = sony_nc_kbd_backlight_timeout_store;</div><div class='ctx'> </div><div class='del'>-	if (device_create_file(&amp;pd-&gt;dev, &amp;kbdbl_handle-&gt;mode_attr))</div><div class='add'>+	ret = device_create_file(&amp;pd-&gt;dev, &amp;kbdbl_ctl-&gt;mode_attr);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto outkzalloc;</div><div class='ctx'> </div><div class='del'>-	if (device_create_file(&amp;pd-&gt;dev, &amp;kbdbl_handle-&gt;timeout_attr))</div><div class='add'>+	ret = device_create_file(&amp;pd-&gt;dev, &amp;kbdbl_ctl-&gt;timeout_attr);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto outmode;</div><div class='ctx'> </div><div class='ctx'> 	__sony_nc_kbd_backlight_mode_set(kbd_backlight);</div><div class='hunk'>@@ -1520,57 +1819,661 @@ static int sony_nc_kbd_backlight_setup(struct platform_device *pd)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> outmode:</div><div class='del'>-	device_remove_file(&amp;pd-&gt;dev, &amp;kbdbl_handle-&gt;mode_attr);</div><div class='add'>+	device_remove_file(&amp;pd-&gt;dev, &amp;kbdbl_ctl-&gt;mode_attr);</div><div class='ctx'> outkzalloc:</div><div class='del'>-	kfree(kbdbl_handle);</div><div class='del'>-	kbdbl_handle = NULL;</div><div class='del'>-	return -1;</div><div class='add'>+	kfree(kbdbl_ctl);</div><div class='add'>+	kbdbl_ctl = NULL;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sony_nc_kbd_backlight_cleanup(struct platform_device *pd)</div><div class='add'>+static void sony_nc_kbd_backlight_cleanup(struct platform_device *pd)</div><div class='ctx'> {</div><div class='del'>-	if (kbdbl_handle) {</div><div class='add'>+	if (kbdbl_ctl) {</div><div class='ctx'> 		int result;</div><div class='ctx'> </div><div class='del'>-		device_remove_file(&amp;pd-&gt;dev, &amp;kbdbl_handle-&gt;mode_attr);</div><div class='del'>-		device_remove_file(&amp;pd-&gt;dev, &amp;kbdbl_handle-&gt;timeout_attr);</div><div class='add'>+		device_remove_file(&amp;pd-&gt;dev, &amp;kbdbl_ctl-&gt;mode_attr);</div><div class='add'>+		device_remove_file(&amp;pd-&gt;dev, &amp;kbdbl_ctl-&gt;timeout_attr);</div><div class='ctx'> </div><div class='ctx'> 		/* restore the default hw behaviour */</div><div class='del'>-		sony_call_snc_handle(KBDBL_HANDLER, 0x1000 | SET_MODE, &amp;result);</div><div class='del'>-		sony_call_snc_handle(KBDBL_HANDLER, SET_TIMEOUT, &amp;result);</div><div class='add'>+		sony_call_snc_handle(kbdbl_ctl-&gt;handle,</div><div class='add'>+				kbdbl_ctl-&gt;base | 0x10000, &amp;result);</div><div class='add'>+		sony_call_snc_handle(kbdbl_ctl-&gt;handle,</div><div class='add'>+				kbdbl_ctl-&gt;base + 0x200, &amp;result);</div><div class='ctx'> </div><div class='del'>-		kfree(kbdbl_handle);</div><div class='add'>+		kfree(kbdbl_ctl);</div><div class='add'>+		kbdbl_ctl = NULL;</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sony_nc_kbd_backlight_resume(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ignore = 0;</div><div class='ctx'> </div><div class='del'>-	if (!kbdbl_handle)</div><div class='add'>+	if (!kbdbl_ctl)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (kbdbl_handle-&gt;mode == 0)</div><div class='del'>-		sony_call_snc_handle(KBDBL_HANDLER, SET_MODE, &amp;ignore);</div><div class='del'>-</div><div class='del'>-	if (kbdbl_handle-&gt;timeout != 0)</div><div class='del'>-		sony_call_snc_handle(KBDBL_HANDLER,</div><div class='del'>-				(kbdbl_handle-&gt;timeout &lt;&lt; 0x10) | SET_TIMEOUT,</div><div class='add'>+	if (kbdbl_ctl-&gt;mode == 0)</div><div class='add'>+		sony_call_snc_handle(kbdbl_ctl-&gt;handle, kbdbl_ctl-&gt;base,</div><div class='ctx'> 				&amp;ignore);</div><div class='add'>+</div><div class='add'>+	if (kbdbl_ctl-&gt;timeout != 0)</div><div class='add'>+		sony_call_snc_handle(kbdbl_ctl-&gt;handle,</div><div class='add'>+				(kbdbl_ctl-&gt;base + 0x200) |</div><div class='add'>+				(kbdbl_ctl-&gt;timeout &lt;&lt; 0x10), &amp;ignore);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct battery_care_control {</div><div class='add'>+	struct device_attribute attrs[2];</div><div class='add'>+	unsigned int handle;</div><div class='add'>+};</div><div class='add'>+static struct battery_care_control *bcare_ctl;</div><div class='add'>+</div><div class='add'>+static ssize_t sony_nc_battery_care_limit_store(struct device *dev,</div><div class='add'>+		struct device_attribute *attr,</div><div class='add'>+		const char *buffer, size_t count)</div><div class='add'>+{</div><div class='add'>+	unsigned int result, cmd;</div><div class='add'>+	unsigned long value;</div><div class='add'>+</div><div class='add'>+	if (count &gt; 31)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (kstrtoul(buffer, 10, &amp;value))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*  limit values (2 bits):</div><div class='add'>+	 *  00 - none</div><div class='add'>+	 *  01 - 80%</div><div class='add'>+	 *  10 - 50%</div><div class='add'>+	 *  11 - 100%</div><div class='add'>+	 *</div><div class='add'>+	 *  bit 0: 0 disable BCL, 1 enable BCL</div><div class='add'>+	 *  bit 1: 1 tell to store the battery limit (see bits 6,7) too</div><div class='add'>+	 *  bits 2,3: reserved</div><div class='add'>+	 *  bits 4,5: store the limit into the EC</div><div class='add'>+	 *  bits 6,7: store the limit into the battery</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * handle 0x0115 should allow storing on battery too;</div><div class='add'>+	 * handle 0x0136 same as 0x0115 + health status;</div><div class='add'>+	 * handle 0x013f, same as 0x0136 but no storing on the battery</div><div class='add'>+	 *</div><div class='add'>+	 * Store only inside the EC for now, regardless the handle number</div><div class='add'>+	 */</div><div class='add'>+	if (value == 0)</div><div class='add'>+		/* disable limits */</div><div class='add'>+		cmd = 0x0;</div><div class='add'>+</div><div class='add'>+	else if (value &lt;= 50)</div><div class='add'>+		cmd = 0x21;</div><div class='add'>+</div><div class='add'>+	else if (value &lt;= 80)</div><div class='add'>+		cmd = 0x11;</div><div class='add'>+</div><div class='add'>+	else if (value &lt;= 100)</div><div class='add'>+		cmd = 0x31;</div><div class='add'>+</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(bcare_ctl-&gt;handle, (cmd &lt;&lt; 0x10) | 0x0100,</div><div class='add'>+				&amp;result))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sony_nc_battery_care_limit_show(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, char *buffer)</div><div class='add'>+{</div><div class='add'>+	unsigned int result, status;</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(bcare_ctl-&gt;handle, 0x0000, &amp;result))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	status = (result &amp; 0x01) ? ((result &amp; 0x30) &gt;&gt; 0x04) : 0;</div><div class='add'>+	switch (status) {</div><div class='add'>+	case 1:</div><div class='add'>+		status = 80;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		status = 50;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		status = 100;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		status = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return snprintf(buffer, PAGE_SIZE, "%d\n", status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sony_nc_battery_care_health_show(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, char *buffer)</div><div class='add'>+{</div><div class='add'>+	ssize_t count = 0;</div><div class='add'>+	unsigned int health;</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(bcare_ctl-&gt;handle, 0x0200, &amp;health))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	count = snprintf(buffer, PAGE_SIZE, "%d\n", health &amp; 0xff);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sony_nc_battery_care_setup(struct platform_device *pd,</div><div class='add'>+		unsigned int handle)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	bcare_ctl = kzalloc(sizeof(struct battery_care_control), GFP_KERNEL);</div><div class='add'>+	if (!bcare_ctl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bcare_ctl-&gt;handle = handle;</div><div class='add'>+</div><div class='add'>+	sysfs_attr_init(&amp;bcare_ctl-&gt;attrs[0].attr);</div><div class='add'>+	bcare_ctl-&gt;attrs[0].attr.name = "battery_care_limiter";</div><div class='add'>+	bcare_ctl-&gt;attrs[0].attr.mode = S_IRUGO | S_IWUSR;</div><div class='add'>+	bcare_ctl-&gt;attrs[0].show = sony_nc_battery_care_limit_show;</div><div class='add'>+	bcare_ctl-&gt;attrs[0].store = sony_nc_battery_care_limit_store;</div><div class='add'>+</div><div class='add'>+	ret = device_create_file(&amp;pd-&gt;dev, &amp;bcare_ctl-&gt;attrs[0]);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto outkzalloc;</div><div class='add'>+</div><div class='add'>+	/* 0x0115 is for models with no health reporting capability */</div><div class='add'>+	if (handle == 0x0115)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	sysfs_attr_init(&amp;bcare_ctl-&gt;attrs[1].attr);</div><div class='add'>+	bcare_ctl-&gt;attrs[1].attr.name = "battery_care_health";</div><div class='add'>+	bcare_ctl-&gt;attrs[1].attr.mode = S_IRUGO;</div><div class='add'>+	bcare_ctl-&gt;attrs[1].show = sony_nc_battery_care_health_show;</div><div class='add'>+</div><div class='add'>+	ret = device_create_file(&amp;pd-&gt;dev, &amp;bcare_ctl-&gt;attrs[1]);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto outlimiter;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+outlimiter:</div><div class='add'>+	device_remove_file(&amp;pd-&gt;dev, &amp;bcare_ctl-&gt;attrs[0]);</div><div class='add'>+</div><div class='add'>+outkzalloc:</div><div class='add'>+	kfree(bcare_ctl);</div><div class='add'>+	bcare_ctl = NULL;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sony_nc_battery_care_cleanup(struct platform_device *pd)</div><div class='add'>+{</div><div class='add'>+	if (bcare_ctl) {</div><div class='add'>+		device_remove_file(&amp;pd-&gt;dev, &amp;bcare_ctl-&gt;attrs[0]);</div><div class='add'>+		if (bcare_ctl-&gt;handle != 0x0115)</div><div class='add'>+			device_remove_file(&amp;pd-&gt;dev, &amp;bcare_ctl-&gt;attrs[1]);</div><div class='add'>+</div><div class='add'>+		kfree(bcare_ctl);</div><div class='add'>+		bcare_ctl = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct snc_thermal_ctrl {</div><div class='add'>+	unsigned int mode;</div><div class='add'>+	unsigned int profiles;</div><div class='add'>+	struct device_attribute mode_attr;</div><div class='add'>+	struct device_attribute profiles_attr;</div><div class='add'>+};</div><div class='add'>+static struct snc_thermal_ctrl *th_handle;</div><div class='add'>+</div><div class='add'>+#define THM_PROFILE_MAX 3</div><div class='add'>+static const char * const snc_thermal_profiles[] = {</div><div class='add'>+	"balanced",</div><div class='add'>+	"silent",</div><div class='add'>+	"performance"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int sony_nc_thermal_mode_set(unsigned short mode)</div><div class='add'>+{</div><div class='add'>+	unsigned int result;</div><div class='add'>+</div><div class='add'>+	/* the thermal profile seems to be a two bit bitmask:</div><div class='add'>+	 * lsb -&gt; silent</div><div class='add'>+	 * msb -&gt; performance</div><div class='add'>+	 * no bit set is the normal operation and is always valid</div><div class='add'>+	 * Some vaio models only have "balanced" and "performance"</div><div class='add'>+	 */</div><div class='add'>+	if ((mode &amp;&amp; !(th_handle-&gt;profiles &amp; mode)) || mode &gt;= THM_PROFILE_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(0x0122, mode &lt;&lt; 0x10 | 0x0200, &amp;result))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	th_handle-&gt;mode = mode;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sony_nc_thermal_mode_get(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int result;</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(0x0122, 0x0100, &amp;result))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return result &amp; 0xff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sony_nc_thermal_profiles_show(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, char *buffer)</div><div class='add'>+{</div><div class='add'>+	short cnt;</div><div class='add'>+	size_t idx = 0;</div><div class='add'>+</div><div class='add'>+	for (cnt = 0; cnt &lt; THM_PROFILE_MAX; cnt++) {</div><div class='add'>+		if (!cnt || (th_handle-&gt;profiles &amp; cnt))</div><div class='add'>+			idx += snprintf(buffer + idx, PAGE_SIZE - idx, "%s ",</div><div class='add'>+					snc_thermal_profiles[cnt]);</div><div class='add'>+	}</div><div class='add'>+	idx += snprintf(buffer + idx, PAGE_SIZE - idx, "\n");</div><div class='add'>+</div><div class='add'>+	return idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sony_nc_thermal_mode_store(struct device *dev,</div><div class='add'>+		struct device_attribute *attr,</div><div class='add'>+		const char *buffer, size_t count)</div><div class='add'>+{</div><div class='add'>+	unsigned short cmd;</div><div class='add'>+	size_t len = count;</div><div class='add'>+</div><div class='add'>+	if (count == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* skip the newline if present */</div><div class='add'>+	if (buffer[len - 1] == '\n')</div><div class='add'>+		len--;</div><div class='add'>+</div><div class='add'>+	for (cmd = 0; cmd &lt; THM_PROFILE_MAX; cmd++)</div><div class='add'>+		if (strncmp(buffer, snc_thermal_profiles[cmd], len) == 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+	if (sony_nc_thermal_mode_set(cmd))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sony_nc_thermal_mode_show(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, char *buffer)</div><div class='add'>+{</div><div class='add'>+	ssize_t count = 0;</div><div class='add'>+	unsigned int mode = sony_nc_thermal_mode_get();</div><div class='add'>+</div><div class='add'>+	if (mode &lt; 0)</div><div class='add'>+		return mode;</div><div class='add'>+</div><div class='add'>+	count = snprintf(buffer, PAGE_SIZE, "%s\n", snc_thermal_profiles[mode]);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sony_nc_thermal_setup(struct platform_device *pd)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	th_handle = kzalloc(sizeof(struct snc_thermal_ctrl), GFP_KERNEL);</div><div class='add'>+	if (!th_handle)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = sony_call_snc_handle(0x0122, 0x0000, &amp;th_handle-&gt;profiles);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_warn("couldn't to read the thermal profiles\n");</div><div class='add'>+		goto outkzalloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = sony_nc_thermal_mode_get();</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pr_warn("couldn't to read the current thermal profile");</div><div class='add'>+		goto outkzalloc;</div><div class='add'>+	}</div><div class='add'>+	th_handle-&gt;mode = ret;</div><div class='add'>+</div><div class='add'>+	sysfs_attr_init(&amp;th_handle-&gt;profiles_attr.attr);</div><div class='add'>+	th_handle-&gt;profiles_attr.attr.name = "thermal_profiles";</div><div class='add'>+	th_handle-&gt;profiles_attr.attr.mode = S_IRUGO;</div><div class='add'>+	th_handle-&gt;profiles_attr.show = sony_nc_thermal_profiles_show;</div><div class='add'>+</div><div class='add'>+	sysfs_attr_init(&amp;th_handle-&gt;mode_attr.attr);</div><div class='add'>+	th_handle-&gt;mode_attr.attr.name = "thermal_control";</div><div class='add'>+	th_handle-&gt;mode_attr.attr.mode = S_IRUGO | S_IWUSR;</div><div class='add'>+	th_handle-&gt;mode_attr.show = sony_nc_thermal_mode_show;</div><div class='add'>+	th_handle-&gt;mode_attr.store = sony_nc_thermal_mode_store;</div><div class='add'>+</div><div class='add'>+	ret = device_create_file(&amp;pd-&gt;dev, &amp;th_handle-&gt;profiles_attr);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto outkzalloc;</div><div class='add'>+</div><div class='add'>+	ret = device_create_file(&amp;pd-&gt;dev, &amp;th_handle-&gt;mode_attr);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto outprofiles;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+outprofiles:</div><div class='add'>+	device_remove_file(&amp;pd-&gt;dev, &amp;th_handle-&gt;profiles_attr);</div><div class='add'>+outkzalloc:</div><div class='add'>+	kfree(th_handle);</div><div class='add'>+	th_handle = NULL;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sony_nc_thermal_cleanup(struct platform_device *pd)</div><div class='add'>+{</div><div class='add'>+	if (th_handle) {</div><div class='add'>+		device_remove_file(&amp;pd-&gt;dev, &amp;th_handle-&gt;profiles_attr);</div><div class='add'>+		device_remove_file(&amp;pd-&gt;dev, &amp;th_handle-&gt;mode_attr);</div><div class='add'>+		kfree(th_handle);</div><div class='add'>+		th_handle = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sony_nc_thermal_resume(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int status = sony_nc_thermal_mode_get();</div><div class='add'>+</div><div class='add'>+	if (status != th_handle-&gt;mode)</div><div class='add'>+		sony_nc_thermal_mode_set(th_handle-&gt;mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* resume on LID open */</div><div class='add'>+struct snc_lid_resume_control {</div><div class='add'>+	struct device_attribute attrs[3];</div><div class='add'>+	unsigned int status;</div><div class='add'>+};</div><div class='add'>+static struct snc_lid_resume_control *lid_ctl;</div><div class='add'>+</div><div class='add'>+static ssize_t sony_nc_lid_resume_store(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					const char *buffer, size_t count)</div><div class='add'>+{</div><div class='add'>+	unsigned int result, pos;</div><div class='add'>+	unsigned long value;</div><div class='add'>+	if (count &gt; 31)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (kstrtoul(buffer, 10, &amp;value) || value &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* the value we have to write to SNC is a bitmask:</div><div class='add'>+	 * +--------------+</div><div class='add'>+	 * | S3 | S4 | S5 |</div><div class='add'>+	 * +--------------+</div><div class='add'>+	 *   2    1    0</div><div class='add'>+	 */</div><div class='add'>+	if (strcmp(attr-&gt;attr.name, "lid_resume_S3") == 0)</div><div class='add'>+		pos = 2;</div><div class='add'>+	else if (strcmp(attr-&gt;attr.name, "lid_resume_S4") == 0)</div><div class='add'>+		pos = 1;</div><div class='add'>+	else if (strcmp(attr-&gt;attr.name, "lid_resume_S5") == 0)</div><div class='add'>+		pos = 0;</div><div class='add'>+	else</div><div class='add'>+               return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		value = lid_ctl-&gt;status | (1 &lt;&lt; pos);</div><div class='add'>+	else</div><div class='add'>+		value = lid_ctl-&gt;status &amp; ~(1 &lt;&lt; pos);</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(0x0119, value &lt;&lt; 0x10 | 0x0100, &amp;result))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	lid_ctl-&gt;status = value;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sony_nc_lid_resume_show(struct device *dev,</div><div class='add'>+				       struct device_attribute *attr, char *buffer)</div><div class='add'>+{</div><div class='add'>+	unsigned int pos;</div><div class='add'>+</div><div class='add'>+	if (strcmp(attr-&gt;attr.name, "lid_resume_S3") == 0)</div><div class='add'>+		pos = 2;</div><div class='add'>+	else if (strcmp(attr-&gt;attr.name, "lid_resume_S4") == 0)</div><div class='add'>+		pos = 1;</div><div class='add'>+	else if (strcmp(attr-&gt;attr.name, "lid_resume_S5") == 0)</div><div class='add'>+		pos = 0;</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	       </div><div class='add'>+	return snprintf(buffer, PAGE_SIZE, "%d\n",</div><div class='add'>+			(lid_ctl-&gt;status &gt;&gt; pos) &amp; 0x01);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sony_nc_lid_resume_setup(struct platform_device *pd)</div><div class='add'>+{</div><div class='add'>+	unsigned int result;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(0x0119, 0x0000, &amp;result))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	lid_ctl = kzalloc(sizeof(struct snc_lid_resume_control), GFP_KERNEL);</div><div class='add'>+	if (!lid_ctl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	lid_ctl-&gt;status = result &amp; 0x7;</div><div class='add'>+</div><div class='add'>+	sysfs_attr_init(&amp;lid_ctl-&gt;attrs[0].attr);</div><div class='add'>+	lid_ctl-&gt;attrs[0].attr.name = "lid_resume_S3";</div><div class='add'>+	lid_ctl-&gt;attrs[0].attr.mode = S_IRUGO | S_IWUSR;</div><div class='add'>+	lid_ctl-&gt;attrs[0].show = sony_nc_lid_resume_show;</div><div class='add'>+	lid_ctl-&gt;attrs[0].store = sony_nc_lid_resume_store;</div><div class='add'>+</div><div class='add'>+	sysfs_attr_init(&amp;lid_ctl-&gt;attrs[1].attr);</div><div class='add'>+	lid_ctl-&gt;attrs[1].attr.name = "lid_resume_S4";</div><div class='add'>+	lid_ctl-&gt;attrs[1].attr.mode = S_IRUGO | S_IWUSR;</div><div class='add'>+	lid_ctl-&gt;attrs[1].show = sony_nc_lid_resume_show;</div><div class='add'>+	lid_ctl-&gt;attrs[1].store = sony_nc_lid_resume_store;</div><div class='add'>+</div><div class='add'>+	sysfs_attr_init(&amp;lid_ctl-&gt;attrs[2].attr);</div><div class='add'>+	lid_ctl-&gt;attrs[2].attr.name = "lid_resume_S5";</div><div class='add'>+	lid_ctl-&gt;attrs[2].attr.mode = S_IRUGO | S_IWUSR;</div><div class='add'>+	lid_ctl-&gt;attrs[2].show = sony_nc_lid_resume_show;</div><div class='add'>+	lid_ctl-&gt;attrs[2].store = sony_nc_lid_resume_store;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		result = device_create_file(&amp;pd-&gt;dev, &amp;lid_ctl-&gt;attrs[i]);</div><div class='add'>+		if (result)</div><div class='add'>+			goto liderror;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+liderror:</div><div class='add'>+	for (; i &gt; 0; i--)</div><div class='add'>+		device_remove_file(&amp;pd-&gt;dev, &amp;lid_ctl-&gt;attrs[i]);</div><div class='add'>+</div><div class='add'>+	kfree(lid_ctl);</div><div class='add'>+	lid_ctl = NULL;</div><div class='add'>+</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sony_nc_lid_resume_cleanup(struct platform_device *pd)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (lid_ctl) {</div><div class='add'>+		for (i = 0; i &lt; 3; i++)</div><div class='add'>+			device_remove_file(&amp;pd-&gt;dev, &amp;lid_ctl-&gt;attrs[i]);</div><div class='add'>+</div><div class='add'>+		kfree(lid_ctl);</div><div class='add'>+		lid_ctl = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* High speed charging function */</div><div class='add'>+static struct device_attribute *hsc_handle;</div><div class='add'>+</div><div class='add'>+static ssize_t sony_nc_highspeed_charging_store(struct device *dev,</div><div class='add'>+		struct device_attribute *attr,</div><div class='add'>+		const char *buffer, size_t count)</div><div class='add'>+{</div><div class='add'>+	unsigned int result;</div><div class='add'>+	unsigned long value;</div><div class='add'>+</div><div class='add'>+	if (count &gt; 31)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (kstrtoul(buffer, 10, &amp;value) || value &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(0x0131, value &lt;&lt; 0x10 | 0x0200, &amp;result))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sony_nc_highspeed_charging_show(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, char *buffer)</div><div class='add'>+{</div><div class='add'>+	unsigned int result;</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(0x0131, 0x0100, &amp;result))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return snprintf(buffer, PAGE_SIZE, "%d\n", result &amp; 0x01);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sony_nc_highspeed_charging_setup(struct platform_device *pd)</div><div class='add'>+{</div><div class='add'>+	unsigned int result;</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(0x0131, 0x0000, &amp;result) || !(result &amp; 0x01)) {</div><div class='add'>+		/* some models advertise the handle but have no implementation</div><div class='add'>+		 * for it</div><div class='add'>+		 */</div><div class='add'>+		pr_info("No High Speed Charging capability found\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hsc_handle = kzalloc(sizeof(struct device_attribute), GFP_KERNEL);</div><div class='add'>+	if (!hsc_handle)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	sysfs_attr_init(&amp;hsc_handle-&gt;attr);</div><div class='add'>+	hsc_handle-&gt;attr.name = "battery_highspeed_charging";</div><div class='add'>+	hsc_handle-&gt;attr.mode = S_IRUGO | S_IWUSR;</div><div class='add'>+	hsc_handle-&gt;show = sony_nc_highspeed_charging_show;</div><div class='add'>+	hsc_handle-&gt;store = sony_nc_highspeed_charging_store;</div><div class='add'>+</div><div class='add'>+	result = device_create_file(&amp;pd-&gt;dev, hsc_handle);</div><div class='add'>+	if (result) {</div><div class='add'>+		kfree(hsc_handle);</div><div class='add'>+		hsc_handle = NULL;</div><div class='add'>+		return result;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sony_nc_highspeed_charging_cleanup(struct platform_device *pd)</div><div class='add'>+{</div><div class='add'>+	if (hsc_handle) {</div><div class='add'>+		device_remove_file(&amp;pd-&gt;dev, hsc_handle);</div><div class='add'>+		kfree(hsc_handle);</div><div class='add'>+		hsc_handle = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Touchpad enable/disable */</div><div class='add'>+struct touchpad_control {</div><div class='add'>+	struct device_attribute attr;</div><div class='add'>+	int handle;</div><div class='add'>+};</div><div class='add'>+static struct touchpad_control *tp_ctl;</div><div class='add'>+</div><div class='add'>+static ssize_t sony_nc_touchpad_store(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, const char *buffer, size_t count)</div><div class='add'>+{</div><div class='add'>+	unsigned int result;</div><div class='add'>+	unsigned long value;</div><div class='add'>+</div><div class='add'>+	if (count &gt; 31)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (kstrtoul(buffer, 10, &amp;value) || value &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* sysfs: 0 disabled, 1 enabled</div><div class='add'>+	 * EC: 0 enabled, 1 disabled</div><div class='add'>+	 */</div><div class='add'>+	if (sony_call_snc_handle(tp_ctl-&gt;handle,</div><div class='add'>+				(!value &lt;&lt; 0x10) | 0x100, &amp;result))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sony_nc_touchpad_show(struct device *dev,</div><div class='add'>+		struct device_attribute *attr, char *buffer)</div><div class='add'>+{</div><div class='add'>+	unsigned int result;</div><div class='add'>+</div><div class='add'>+	if (sony_call_snc_handle(tp_ctl-&gt;handle, 0x000, &amp;result))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return snprintf(buffer, PAGE_SIZE, "%d\n", !(result &amp; 0x01));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sony_nc_touchpad_setup(struct platform_device *pd,</div><div class='add'>+		unsigned int handle)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	tp_ctl = kzalloc(sizeof(struct touchpad_control), GFP_KERNEL);</div><div class='add'>+	if (!tp_ctl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	tp_ctl-&gt;handle = handle;</div><div class='add'>+</div><div class='add'>+	sysfs_attr_init(&amp;tp_ctl-&gt;attr.attr);</div><div class='add'>+	tp_ctl-&gt;attr.attr.name = "touchpad";</div><div class='add'>+	tp_ctl-&gt;attr.attr.mode = S_IRUGO | S_IWUSR;</div><div class='add'>+	tp_ctl-&gt;attr.show = sony_nc_touchpad_show;</div><div class='add'>+	tp_ctl-&gt;attr.store = sony_nc_touchpad_store;</div><div class='add'>+</div><div class='add'>+	ret = device_create_file(&amp;pd-&gt;dev, &amp;tp_ctl-&gt;attr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(tp_ctl);</div><div class='add'>+		tp_ctl = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sony_nc_touchpad_cleanup(struct platform_device *pd)</div><div class='add'>+{</div><div class='add'>+	if (tp_ctl) {</div><div class='add'>+		device_remove_file(&amp;pd-&gt;dev, &amp;tp_ctl-&gt;attr);</div><div class='add'>+		kfree(tp_ctl);</div><div class='add'>+		tp_ctl = NULL;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sony_nc_backlight_ng_read_limits(int handle,</div><div class='ctx'> 		struct sony_backlight_props *props)</div><div class='ctx'> {</div><div class='del'>-	int offset;</div><div class='del'>-	acpi_status status;</div><div class='del'>-	u8 brlvl, i;</div><div class='add'>+	u64 offset;</div><div class='add'>+	int i;</div><div class='ctx'> 	u8 min = 0xff, max = 0x00;</div><div class='del'>-	struct acpi_object_list params;</div><div class='del'>-	union acpi_object in_obj;</div><div class='del'>-	union acpi_object *lvl_enum;</div><div class='del'>-	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };</div><div class='add'>+	unsigned char buffer[32] = { 0 };</div><div class='ctx'> </div><div class='ctx'> 	props-&gt;handle = handle;</div><div class='ctx'> 	props-&gt;offset = 0;</div><div class='hunk'>@@ -1583,50 +2486,31 @@ static void sony_nc_backlight_ng_read_limits(int handle,</div><div class='ctx'> 	/* try to read the boundaries from ACPI tables, if we fail the above</div><div class='ctx'> 	 * defaults should be reasonable</div><div class='ctx'> 	 */</div><div class='del'>-	params.count = 1;</div><div class='del'>-	params.pointer = &amp;in_obj;</div><div class='del'>-	in_obj.type = ACPI_TYPE_INTEGER;</div><div class='del'>-	in_obj.integer.value = offset;</div><div class='del'>-	status = acpi_evaluate_object(sony_nc_acpi_handle, "SN06", &amp;params,</div><div class='del'>-			&amp;buffer);</div><div class='del'>-	if (ACPI_FAILURE(status))</div><div class='add'>+	i = sony_nc_buffer_call(sony_nc_acpi_handle, "SN06", &amp;offset, buffer,</div><div class='add'>+			32);</div><div class='add'>+	if (i &lt; 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	lvl_enum = (union acpi_object *) buffer.pointer;</div><div class='del'>-	if (!lvl_enum) {</div><div class='del'>-		pr_err("No SN06 return object.");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	if (lvl_enum-&gt;type != ACPI_TYPE_BUFFER) {</div><div class='del'>-		pr_err("Invalid SN06 return object 0x%.2x\n",</div><div class='del'>-		       lvl_enum-&gt;type);</div><div class='del'>-		goto out_invalid;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* the buffer lists brightness levels available, brightness levels are</div><div class='del'>-	 * from 0 to 8 in the array, other values are used by ALS control.</div><div class='add'>+	 * from position 0 to 8 in the array, other values are used by ALS</div><div class='add'>+	 * control.</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; 9 &amp;&amp; i &lt; lvl_enum-&gt;buffer.length; i++) {</div><div class='add'>+	for (i = 0; i &lt; 9 &amp;&amp; i &lt; ARRAY_SIZE(buffer); i++) {</div><div class='ctx'> </div><div class='del'>-		brlvl = *(lvl_enum-&gt;buffer.pointer + i);</div><div class='del'>-		dprintk("Brightness level: %d\n", brlvl);</div><div class='add'>+		dprintk("Brightness level: %d\n", buffer[i]);</div><div class='ctx'> </div><div class='del'>-		if (!brlvl)</div><div class='add'>+		if (!buffer[i])</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		if (brlvl &gt; max)</div><div class='del'>-			max = brlvl;</div><div class='del'>-		if (brlvl &lt; min)</div><div class='del'>-			min = brlvl;</div><div class='add'>+		if (buffer[i] &gt; max)</div><div class='add'>+			max = buffer[i];</div><div class='add'>+		if (buffer[i] &lt; min)</div><div class='add'>+			min = buffer[i];</div><div class='ctx'> 	}</div><div class='ctx'> 	props-&gt;offset = min;</div><div class='ctx'> 	props-&gt;maxlvl = max;</div><div class='ctx'> 	dprintk("Brightness levels: min=%d max=%d\n", props-&gt;offset,</div><div class='ctx'> 			props-&gt;maxlvl);</div><div class='del'>-</div><div class='del'>-out_invalid:</div><div class='del'>-	kfree(buffer.pointer);</div><div class='del'>-	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sony_nc_backlight_setup(void)</div><div class='hunk'>@@ -1715,28 +2599,25 @@ static int sony_nc_add(struct acpi_device *device)</div><div class='ctx'> </div><div class='ctx'> 	if (ACPI_SUCCESS(acpi_get_handle(sony_nc_acpi_handle, "ECON",</div><div class='ctx'> 					 &amp;handle))) {</div><div class='del'>-		if (acpi_callsetfunc(sony_nc_acpi_handle, "ECON", 1, NULL))</div><div class='add'>+		int arg = 1;</div><div class='add'>+		if (sony_nc_int_call(sony_nc_acpi_handle, "ECON", &amp;arg, NULL))</div><div class='ctx'> 			dprintk("ECON Method failed\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ACPI_SUCCESS(acpi_get_handle(sony_nc_acpi_handle, "SN00",</div><div class='ctx'> 					 &amp;handle))) {</div><div class='ctx'> 		dprintk("Doing SNC setup\n");</div><div class='add'>+		/* retrieve the available handles */</div><div class='ctx'> 		result = sony_nc_handles_setup(sony_pf_device);</div><div class='del'>-		if (result)</div><div class='del'>-			goto outpresent;</div><div class='del'>-		result = sony_nc_kbd_backlight_setup(sony_pf_device);</div><div class='del'>-		if (result)</div><div class='del'>-			goto outsnc;</div><div class='del'>-		sony_nc_function_setup(device);</div><div class='del'>-		sony_nc_rfkill_setup(device);</div><div class='add'>+		if (!result)</div><div class='add'>+			sony_nc_function_setup(device, sony_pf_device);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* setup input devices and helper fifo */</div><div class='ctx'> 	result = sony_laptop_setup_input(device);</div><div class='ctx'> 	if (result) {</div><div class='ctx'> 		pr_err("Unable to create input devices\n");</div><div class='del'>-		goto outkbdbacklight;</div><div class='add'>+		goto outsnc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (acpi_video_backlight_support()) {</div><div class='hunk'>@@ -1794,10 +2675,8 @@ static int sony_nc_add(struct acpi_device *device)</div><div class='ctx'> </div><div class='ctx'> 	sony_laptop_remove_input();</div><div class='ctx'> </div><div class='del'>-      outkbdbacklight:</div><div class='del'>-	sony_nc_kbd_backlight_cleanup(sony_pf_device);</div><div class='del'>-</div><div class='ctx'>       outsnc:</div><div class='add'>+	sony_nc_function_cleanup(sony_pf_device);</div><div class='ctx'> 	sony_nc_handles_cleanup(sony_pf_device);</div><div class='ctx'> </div><div class='ctx'>       outpresent:</div><div class='hunk'>@@ -1820,11 +2699,10 @@ static int sony_nc_remove(struct acpi_device *device, int type)</div><div class='ctx'> 		device_remove_file(&amp;sony_pf_device-&gt;dev, &amp;item-&gt;devattr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sony_nc_kbd_backlight_cleanup(sony_pf_device);</div><div class='add'>+	sony_nc_function_cleanup(sony_pf_device);</div><div class='ctx'> 	sony_nc_handles_cleanup(sony_pf_device);</div><div class='ctx'> 	sony_pf_remove();</div><div class='ctx'> 	sony_laptop_remove_input();</div><div class='del'>-	sony_nc_rfkill_cleanup();</div><div class='ctx'> 	dprintk(SONY_NC_DRIVER_NAME " removed.\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2437,7 +3315,9 @@ static ssize_t sony_pic_wwanpower_store(struct device *dev,</div><div class='ctx'> 	if (count &gt; 31)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	value = simple_strtoul(buffer, NULL, 10);</div><div class='add'>+	if (kstrtoul(buffer, 10, &amp;value))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;spic_dev.lock);</div><div class='ctx'> 	__sony_pic_set_wwanpower(value);</div><div class='ctx'> 	mutex_unlock(&amp;spic_dev.lock);</div><div class='hunk'>@@ -2474,7 +3354,9 @@ static ssize_t sony_pic_bluetoothpower_store(struct device *dev,</div><div class='ctx'> 	if (count &gt; 31)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	value = simple_strtoul(buffer, NULL, 10);</div><div class='add'>+	if (kstrtoul(buffer, 10, &amp;value))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;spic_dev.lock);</div><div class='ctx'> 	__sony_pic_set_bluetoothpower(value);</div><div class='ctx'> 	mutex_unlock(&amp;spic_dev.lock);</div><div class='hunk'>@@ -2513,7 +3395,9 @@ static ssize_t sony_pic_fanspeed_store(struct device *dev,</div><div class='ctx'> 	if (count &gt; 31)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	value = simple_strtoul(buffer, NULL, 10);</div><div class='add'>+	if (kstrtoul(buffer, 10, &amp;value))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	if (sony_pic_set_fanspeed(value))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='hunk'>@@ -2671,7 +3555,8 @@ static long sonypi_misc_ioctl(struct file *fp, unsigned int cmd,</div><div class='ctx'> 			ret = -EIO;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		if (acpi_callgetfunc(sony_nc_acpi_handle, "GBRT", &amp;value)) {</div><div class='add'>+		if (sony_nc_int_call(sony_nc_acpi_handle, "GBRT", NULL,</div><div class='add'>+					&amp;value)) {</div><div class='ctx'> 			ret = -EIO;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2688,8 +3573,9 @@ static long sonypi_misc_ioctl(struct file *fp, unsigned int cmd,</div><div class='ctx'> 			ret = -EFAULT;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		if (acpi_callsetfunc(sony_nc_acpi_handle, "SBRT",</div><div class='del'>-				(val8 &gt;&gt; 5) + 1, NULL)) {</div><div class='add'>+		value = (val8 &gt;&gt; 5) + 1;</div><div class='add'>+		if (sony_nc_int_call(sony_nc_acpi_handle, "SBRT", &amp;value,</div><div class='add'>+					NULL)) {</div><div class='ctx'> 			ret = -EIO;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c<br/>index d68c0002f4a2..8b5610d88418 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/thinkpad_acpi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/thinkpad_acpi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/thinkpad_acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/thinkpad_acpi.c</a></div><div class='hunk'>@@ -3402,7 +3402,7 @@ static int __init hotkey_init(struct ibm_init_struct *iibm)</div><div class='ctx'> 	/* Do not issue duplicate brightness change events to</div><div class='ctx'> 	 * userspace. tpacpi_detect_brightness_capabilities() must have</div><div class='ctx'> 	 * been called before this point  */</div><div class='del'>-	if (tp_features.bright_acpimode &amp;&amp; acpi_video_backlight_support()) {</div><div class='add'>+	if (acpi_video_backlight_support()) {</div><div class='ctx'> 		pr_info("This ThinkPad has standard ACPI backlight "</div><div class='ctx'> 			"brightness control, supported by the ACPI "</div><div class='ctx'> 			"video driver\n");</div><div class='head'>diff --git a/drivers/platform/x86/toshiba_acpi.c b/drivers/platform/x86/toshiba_acpi.c<br/>index ee79ce64d9df..dab10f6edcd4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/toshiba_acpi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/toshiba_acpi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/toshiba_acpi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/toshiba_acpi.c</a></div><div class='hunk'>@@ -95,6 +95,7 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> /* registers */</div><div class='ctx'> #define HCI_FAN				0x0004</div><div class='add'>+#define HCI_TR_BACKLIGHT		0x0005</div><div class='ctx'> #define HCI_SYSTEM_EVENT		0x0016</div><div class='ctx'> #define HCI_VIDEO_OUT			0x001c</div><div class='ctx'> #define HCI_HOTKEY_EVENT		0x001e</div><div class='hunk'>@@ -134,6 +135,7 @@ struct toshiba_acpi_dev {</div><div class='ctx'> 	unsigned int system_event_supported:1;</div><div class='ctx'> 	unsigned int ntfy_supported:1;</div><div class='ctx'> 	unsigned int info_supported:1;</div><div class='add'>+	unsigned int tr_backlight_supported:1;</div><div class='ctx'> </div><div class='ctx'> 	struct mutex mutex;</div><div class='ctx'> };</div><div class='hunk'>@@ -478,34 +480,70 @@ static const struct rfkill_ops toshiba_rfk_ops = {</div><div class='ctx'> 	.poll = bt_rfkill_poll,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int get_tr_backlight_status(struct toshiba_acpi_dev *dev, bool *enabled)</div><div class='add'>+{</div><div class='add'>+	u32 hci_result;</div><div class='add'>+	u32 status;</div><div class='add'>+</div><div class='add'>+	hci_read1(dev, HCI_TR_BACKLIGHT, &amp;status, &amp;hci_result);</div><div class='add'>+	*enabled = !status;</div><div class='add'>+	return hci_result == HCI_SUCCESS ? 0 : -EIO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_tr_backlight_status(struct toshiba_acpi_dev *dev, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 hci_result;</div><div class='add'>+	u32 value = !enable;</div><div class='add'>+</div><div class='add'>+	hci_write1(dev, HCI_TR_BACKLIGHT, value, &amp;hci_result);</div><div class='add'>+	return hci_result == HCI_SUCCESS ? 0 : -EIO;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct proc_dir_entry *toshiba_proc_dir /*= 0*/ ;</div><div class='ctx'> </div><div class='del'>-static int get_lcd(struct backlight_device *bd)</div><div class='add'>+static int __get_lcd_brightness(struct toshiba_acpi_dev *dev)</div><div class='ctx'> {</div><div class='del'>-	struct toshiba_acpi_dev *dev = bl_get_data(bd);</div><div class='ctx'> 	u32 hci_result;</div><div class='ctx'> 	u32 value;</div><div class='add'>+	int brightness = 0;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;tr_backlight_supported) {</div><div class='add'>+		bool enabled;</div><div class='add'>+		int ret = get_tr_backlight_status(dev, &amp;enabled);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		if (enabled)</div><div class='add'>+			return 0;</div><div class='add'>+		brightness++;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	hci_read1(dev, HCI_LCD_BRIGHTNESS, &amp;value, &amp;hci_result);</div><div class='ctx'> 	if (hci_result == HCI_SUCCESS)</div><div class='del'>-		return (value &gt;&gt; HCI_LCD_BRIGHTNESS_SHIFT);</div><div class='add'>+		return brightness + (value &gt;&gt; HCI_LCD_BRIGHTNESS_SHIFT);</div><div class='ctx'> </div><div class='ctx'> 	return -EIO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int get_lcd_brightness(struct backlight_device *bd)</div><div class='add'>+{</div><div class='add'>+	struct toshiba_acpi_dev *dev = bl_get_data(bd);</div><div class='add'>+	return __get_lcd_brightness(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int lcd_proc_show(struct seq_file *m, void *v)</div><div class='ctx'> {</div><div class='ctx'> 	struct toshiba_acpi_dev *dev = m-&gt;private;</div><div class='ctx'> 	int value;</div><div class='add'>+	int levels;</div><div class='ctx'> </div><div class='ctx'> 	if (!dev-&gt;backlight_dev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	value = get_lcd(dev-&gt;backlight_dev);</div><div class='add'>+	levels = dev-&gt;backlight_dev-&gt;props.max_brightness + 1;</div><div class='add'>+	value = get_lcd_brightness(dev-&gt;backlight_dev);</div><div class='ctx'> 	if (value &gt;= 0) {</div><div class='ctx'> 		seq_printf(m, "brightness:              %d\n", value);</div><div class='del'>-		seq_printf(m, "brightness_levels:       %d\n",</div><div class='del'>-			     HCI_LCD_BRIGHTNESS_LEVELS);</div><div class='add'>+		seq_printf(m, "brightness_levels:       %d\n", levels);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -518,10 +556,19 @@ static int lcd_proc_open(struct inode *inode, struct file *file)</div><div class='ctx'> 	return single_open(file, lcd_proc_show, PDE(inode)-&gt;data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int set_lcd(struct toshiba_acpi_dev *dev, int value)</div><div class='add'>+static int set_lcd_brightness(struct toshiba_acpi_dev *dev, int value)</div><div class='ctx'> {</div><div class='ctx'> 	u32 hci_result;</div><div class='ctx'> </div><div class='add'>+	if (dev-&gt;tr_backlight_supported) {</div><div class='add'>+		bool enable = !value;</div><div class='add'>+		int ret = set_tr_backlight_status(dev, enable);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		if (value)</div><div class='add'>+			value--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	value = value &lt;&lt; HCI_LCD_BRIGHTNESS_SHIFT;</div><div class='ctx'> 	hci_write1(dev, HCI_LCD_BRIGHTNESS, value, &amp;hci_result);</div><div class='ctx'> 	return hci_result == HCI_SUCCESS ? 0 : -EIO;</div><div class='hunk'>@@ -530,7 +577,7 @@ static int set_lcd(struct toshiba_acpi_dev *dev, int value)</div><div class='ctx'> static int set_lcd_status(struct backlight_device *bd)</div><div class='ctx'> {</div><div class='ctx'> 	struct toshiba_acpi_dev *dev = bl_get_data(bd);</div><div class='del'>-	return set_lcd(dev, bd-&gt;props.brightness);</div><div class='add'>+	return set_lcd_brightness(dev, bd-&gt;props.brightness);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t lcd_proc_write(struct file *file, const char __user *buf,</div><div class='hunk'>@@ -541,6 +588,7 @@ static ssize_t lcd_proc_write(struct file *file, const char __user *buf,</div><div class='ctx'> 	size_t len;</div><div class='ctx'> 	int value;</div><div class='ctx'> 	int ret;</div><div class='add'>+	int levels = dev-&gt;backlight_dev-&gt;props.max_brightness + 1;</div><div class='ctx'> </div><div class='ctx'> 	len = min(count, sizeof(cmd) - 1);</div><div class='ctx'> 	if (copy_from_user(cmd, buf, len))</div><div class='hunk'>@@ -548,8 +596,8 @@ static ssize_t lcd_proc_write(struct file *file, const char __user *buf,</div><div class='ctx'> 	cmd[len] = '\0';</div><div class='ctx'> </div><div class='ctx'> 	if (sscanf(cmd, " brightness : %i", &amp;value) == 1 &amp;&amp;</div><div class='del'>-	    value &gt;= 0 &amp;&amp; value &lt; HCI_LCD_BRIGHTNESS_LEVELS) {</div><div class='del'>-		ret = set_lcd(dev, value);</div><div class='add'>+	    value &gt;= 0 &amp;&amp; value &lt; levels) {</div><div class='add'>+		ret = set_lcd_brightness(dev, value);</div><div class='ctx'> 		if (ret == 0)</div><div class='ctx'> 			ret = count;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -860,8 +908,9 @@ static void remove_toshiba_proc_entries(struct toshiba_acpi_dev *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct backlight_ops toshiba_backlight_data = {</div><div class='del'>-        .get_brightness = get_lcd,</div><div class='del'>-        .update_status  = set_lcd_status,</div><div class='add'>+	.options = BL_CORE_SUSPENDRESUME,</div><div class='add'>+	.get_brightness = get_lcd_brightness,</div><div class='add'>+	.update_status  = set_lcd_status,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static bool toshiba_acpi_i8042_filter(unsigned char data, unsigned char str,</div><div class='hunk'>@@ -1020,6 +1069,56 @@ static int __devinit toshiba_acpi_setup_keyboard(struct toshiba_acpi_dev *dev)</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int __devinit toshiba_acpi_setup_backlight(struct toshiba_acpi_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct backlight_properties props;</div><div class='add'>+	int brightness;</div><div class='add'>+	int ret;</div><div class='add'>+	bool enabled;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Some machines don't support the backlight methods at all, and</div><div class='add'>+	 * others support it read-only. Either of these is pretty useless,</div><div class='add'>+	 * so only register the backlight device if the backlight method</div><div class='add'>+	 * supports both reads and writes.</div><div class='add'>+	 */</div><div class='add'>+	brightness = __get_lcd_brightness(dev);</div><div class='add'>+	if (brightness &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+	ret = set_lcd_brightness(dev, brightness);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_debug("Backlight method is read-only, disabling backlight support\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Determine whether or not BIOS supports transflective backlight */</div><div class='add'>+	ret = get_tr_backlight_status(dev, &amp;enabled);</div><div class='add'>+	dev-&gt;tr_backlight_supported = !ret;</div><div class='add'>+</div><div class='add'>+	memset(&amp;props, 0, sizeof(props));</div><div class='add'>+	props.type = BACKLIGHT_PLATFORM;</div><div class='add'>+	props.max_brightness = HCI_LCD_BRIGHTNESS_LEVELS - 1;</div><div class='add'>+</div><div class='add'>+	/* adding an extra level and having 0 change to transflective mode */</div><div class='add'>+	if (dev-&gt;tr_backlight_supported)</div><div class='add'>+		props.max_brightness++;</div><div class='add'>+</div><div class='add'>+	dev-&gt;backlight_dev = backlight_device_register("toshiba",</div><div class='add'>+						       &amp;dev-&gt;acpi_dev-&gt;dev,</div><div class='add'>+						       dev,</div><div class='add'>+						       &amp;toshiba_backlight_data,</div><div class='add'>+						       &amp;props);</div><div class='add'>+	if (IS_ERR(dev-&gt;backlight_dev)) {</div><div class='add'>+		ret = PTR_ERR(dev-&gt;backlight_dev);</div><div class='add'>+		pr_err("Could not register toshiba backlight device\n");</div><div class='add'>+		dev-&gt;backlight_dev = NULL;</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;backlight_dev-&gt;props.brightness = brightness;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int toshiba_acpi_remove(struct acpi_device *acpi_dev, int type)</div><div class='ctx'> {</div><div class='ctx'> 	struct toshiba_acpi_dev *dev = acpi_driver_data(acpi_dev);</div><div class='hunk'>@@ -1078,7 +1177,6 @@ static int __devinit toshiba_acpi_add(struct acpi_device *acpi_dev)</div><div class='ctx'> 	u32 dummy;</div><div class='ctx'> 	bool bt_present;</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	struct backlight_properties props;</div><div class='ctx'> </div><div class='ctx'> 	if (toshiba_acpi)</div><div class='ctx'> 		return -EBUSY;</div><div class='hunk'>@@ -1104,21 +1202,9 @@ static int __devinit toshiba_acpi_add(struct acpi_device *acpi_dev)</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;dev-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	props.type = BACKLIGHT_PLATFORM;</div><div class='del'>-	props.max_brightness = HCI_LCD_BRIGHTNESS_LEVELS - 1;</div><div class='del'>-	dev-&gt;backlight_dev = backlight_device_register("toshiba",</div><div class='del'>-						       &amp;acpi_dev-&gt;dev,</div><div class='del'>-						       dev,</div><div class='del'>-						       &amp;toshiba_backlight_data,</div><div class='del'>-						       &amp;props);</div><div class='del'>-	if (IS_ERR(dev-&gt;backlight_dev)) {</div><div class='del'>-		ret = PTR_ERR(dev-&gt;backlight_dev);</div><div class='del'>-</div><div class='del'>-		pr_err("Could not register toshiba backlight device\n");</div><div class='del'>-		dev-&gt;backlight_dev = NULL;</div><div class='add'>+	ret = toshiba_acpi_setup_backlight(dev);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto error;</div><div class='del'>-	}</div><div class='del'>-	dev-&gt;backlight_dev-&gt;props.brightness = get_lcd(dev-&gt;backlight_dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Register rfkill switch for Bluetooth */</div><div class='ctx'> 	if (hci_get_bt_present(dev, &amp;bt_present) == HCI_SUCCESS &amp;&amp; bt_present) {</div><div class='head'>diff --git a/drivers/platform/x86/xo1-rfkill.c b/drivers/platform/x86/xo1-rfkill.c<br/>index 41781ed8301c..b57ad8641480 100644<br/>--- a/<a href='/drm-misc/tree/drivers/platform/x86/xo1-rfkill.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/platform/x86/xo1-rfkill.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/platform/x86/xo1-rfkill.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/platform/x86/xo1-rfkill.c</a></div><div class='hunk'>@@ -15,15 +15,26 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/olpc.h&gt;</div><div class='ctx'> </div><div class='add'>+static bool card_blocked;</div><div class='add'>+</div><div class='ctx'> static int rfkill_set_block(void *data, bool blocked)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char cmd;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if (blocked == card_blocked)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (blocked)</div><div class='ctx'> 		cmd = EC_WLAN_ENTER_RESET;</div><div class='ctx'> 	else</div><div class='ctx'> 		cmd = EC_WLAN_LEAVE_RESET;</div><div class='ctx'> </div><div class='del'>-	return olpc_ec_cmd(cmd, NULL, 0, NULL, 0);</div><div class='add'>+	r = olpc_ec_cmd(cmd, NULL, 0, NULL, 0);</div><div class='add'>+	if (r == 0)</div><div class='add'>+		card_blocked = blocked;</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rfkill_ops rfkill_ops = {</div><div class='head'>diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig<br/>index 99dc29f2f2f2..e3a3b4956f08 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/Kconfig</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> menuconfig POWER_SUPPLY</div><div class='del'>-	tristate "Power supply class support"</div><div class='add'>+	bool "Power supply class support"</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here to enable power supply class support. This allows</div><div class='ctx'> 	  power supply (batteries, AC, USB) monitoring by userspace</div><div class='hunk'>@@ -77,7 +77,7 @@ config BATTERY_DS2780</div><div class='ctx'> 	  Say Y here to enable support for batteries with ds2780 chip.</div><div class='ctx'> </div><div class='ctx'> config BATTERY_DS2781</div><div class='del'>-	tristate "2781 battery driver"</div><div class='add'>+	tristate "DS2781 battery driver"</div><div class='ctx'> 	depends on HAS_IOMEM</div><div class='ctx'> 	select W1</div><div class='ctx'> 	select W1_SLAVE_DS2781</div><div class='hunk'>@@ -181,14 +181,15 @@ config BATTERY_MAX17040</div><div class='ctx'> 	  to operate with a single lithium cell</div><div class='ctx'> </div><div class='ctx'> config BATTERY_MAX17042</div><div class='del'>-	tristate "Maxim MAX17042/8997/8966 Fuel Gauge"</div><div class='add'>+	tristate "Maxim MAX17042/17047/17050/8997/8966 Fuel Gauge"</div><div class='ctx'> 	depends on I2C</div><div class='ctx'> 	help</div><div class='ctx'> 	  MAX17042 is fuel-gauge systems for lithium-ion (Li+) batteries</div><div class='ctx'> 	  in handheld and portable equipment. The MAX17042 is configured</div><div class='ctx'> 	  to operate with a single lithium cell. MAX8997 and MAX8966 are</div><div class='ctx'> 	  multi-function devices that include fuel gauages that are compatible</div><div class='del'>-	  with MAX17042.</div><div class='add'>+	  with MAX17042. This driver also supports max17047/50 chips which are</div><div class='add'>+	  improved version of max17042.</div><div class='ctx'> </div><div class='ctx'> config BATTERY_Z2</div><div class='ctx'> 	tristate "Z2 battery driver"</div><div class='hunk'>@@ -291,6 +292,7 @@ config CHARGER_MAX8998</div><div class='ctx'> config CHARGER_SMB347</div><div class='ctx'> 	tristate "Summit Microelectronics SMB347 Battery Charger"</div><div class='ctx'> 	depends on I2C</div><div class='add'>+	select REGMAP_I2C</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y to include support for Summit Microelectronics SMB347</div><div class='ctx'> 	  Battery Charger.</div><div class='head'>diff --git a/drivers/power/ab8500_btemp.c b/drivers/power/ab8500_btemp.c<br/>index d8bb99394ac0..bba3ccac72fe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/ab8500_btemp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/ab8500_btemp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/ab8500_btemp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/ab8500_btemp.c</a></div><div class='hunk'>@@ -964,10 +964,15 @@ static int __devinit ab8500_btemp_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	int irq, i, ret = 0;</div><div class='ctx'> 	u8 val;</div><div class='del'>-	struct abx500_bm_plat_data *plat_data;</div><div class='add'>+	struct abx500_bm_plat_data *plat_data = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct ab8500_btemp *di;</div><div class='add'>+</div><div class='add'>+	if (!plat_data) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "No platform data\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	struct ab8500_btemp *di =</div><div class='del'>-		kzalloc(sizeof(struct ab8500_btemp), GFP_KERNEL);</div><div class='add'>+	di = kzalloc(sizeof(*di), GFP_KERNEL);</div><div class='ctx'> 	if (!di)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -977,7 +982,6 @@ static int __devinit ab8500_btemp_probe(struct platform_device *pdev)</div><div class='ctx'> 	di-&gt;gpadc = ab8500_gpadc_get("ab8500-gpadc.0");</div><div class='ctx'> </div><div class='ctx'> 	/* get btemp specific platform data */</div><div class='del'>-	plat_data = pdev-&gt;dev.platform_data;</div><div class='ctx'> 	di-&gt;pdata = plat_data-&gt;btemp;</div><div class='ctx'> 	if (!di-&gt;pdata) {</div><div class='ctx'> 		dev_err(di-&gt;dev, "no btemp platform data supplied\n");</div><div class='head'>diff --git a/drivers/power/ab8500_charger.c b/drivers/power/ab8500_charger.c<br/>index e2b4accbec88..d2303d0b7c75 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/ab8500_charger.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/ab8500_charger.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/ab8500_charger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/ab8500_charger.c</a></div><div class='hunk'>@@ -2534,10 +2534,15 @@ static int __devexit ab8500_charger_remove(struct platform_device *pdev)</div><div class='ctx'> static int __devinit ab8500_charger_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	int irq, i, charger_status, ret = 0;</div><div class='del'>-	struct abx500_bm_plat_data *plat_data;</div><div class='add'>+	struct abx500_bm_plat_data *plat_data = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct ab8500_charger *di;</div><div class='ctx'> </div><div class='del'>-	struct ab8500_charger *di =</div><div class='del'>-		kzalloc(sizeof(struct ab8500_charger), GFP_KERNEL);</div><div class='add'>+	if (!plat_data) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "No platform data\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	di = kzalloc(sizeof(*di), GFP_KERNEL);</div><div class='ctx'> 	if (!di)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -2550,9 +2555,7 @@ static int __devinit ab8500_charger_probe(struct platform_device *pdev)</div><div class='ctx'> 	spin_lock_init(&amp;di-&gt;usb_state.usb_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* get charger specific platform data */</div><div class='del'>-	plat_data = pdev-&gt;dev.platform_data;</div><div class='ctx'> 	di-&gt;pdata = plat_data-&gt;charger;</div><div class='del'>-</div><div class='ctx'> 	if (!di-&gt;pdata) {</div><div class='ctx'> 		dev_err(di-&gt;dev, "no charger platform data supplied\n");</div><div class='ctx'> 		ret = -EINVAL;</div><div class='head'>diff --git a/drivers/power/ab8500_fg.c b/drivers/power/ab8500_fg.c<br/>index c22f2f05657e..bf022255994c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/ab8500_fg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/ab8500_fg.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/ab8500_fg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/ab8500_fg.c</a></div><div class='hunk'>@@ -2446,10 +2446,15 @@ static int __devinit ab8500_fg_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	int i, irq;</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	struct abx500_bm_plat_data *plat_data;</div><div class='add'>+	struct abx500_bm_plat_data *plat_data = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct ab8500_fg *di;</div><div class='add'>+</div><div class='add'>+	if (!plat_data) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "No platform data\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	struct ab8500_fg *di =</div><div class='del'>-		kzalloc(sizeof(struct ab8500_fg), GFP_KERNEL);</div><div class='add'>+	di = kzalloc(sizeof(*di), GFP_KERNEL);</div><div class='ctx'> 	if (!di)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -2461,7 +2466,6 @@ static int __devinit ab8500_fg_probe(struct platform_device *pdev)</div><div class='ctx'> 	di-&gt;gpadc = ab8500_gpadc_get("ab8500-gpadc.0");</div><div class='ctx'> </div><div class='ctx'> 	/* get fg specific platform data */</div><div class='del'>-	plat_data = pdev-&gt;dev.platform_data;</div><div class='ctx'> 	di-&gt;pdata = plat_data-&gt;fg;</div><div class='ctx'> 	if (!di-&gt;pdata) {</div><div class='ctx'> 		dev_err(di-&gt;dev, "no fg platform data supplied\n");</div><div class='head'>diff --git a/drivers/power/bq27x00_battery.c b/drivers/power/bq27x00_battery.c<br/>index 222ccd872ac5..f5d6d379f2fb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/bq27x00_battery.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/bq27x00_battery.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/bq27x00_battery.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/bq27x00_battery.c</a></div><div class='hunk'>@@ -451,7 +451,7 @@ static int bq27x00_battery_capacity_level(struct bq27x00_device_info *di,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Return the battery Voltage in milivolts</div><div class='add'>+ * Return the battery Voltage in millivolts</div><div class='ctx'>  * Or &lt; 0 if something fails.</div><div class='ctx'>  */</div><div class='ctx'> static int bq27x00_battery_voltage(struct bq27x00_device_info *di,</div><div class='head'>diff --git a/drivers/power/charger-manager.c b/drivers/power/charger-manager.c<br/>index 9eca9f1ff0ea..86935ec18954 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/charger-manager.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/charger-manager.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/charger-manager.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/charger-manager.c</a></div><div class='hunk'>@@ -23,6 +23,16 @@</div><div class='ctx'> #include &lt;linux/power/charger-manager.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> </div><div class='add'>+static const char * const default_event_names[] = {</div><div class='add'>+	[CM_EVENT_UNKNOWN] = "Unknown",</div><div class='add'>+	[CM_EVENT_BATT_FULL] = "Battery Full",</div><div class='add'>+	[CM_EVENT_BATT_IN] = "Battery Inserted",</div><div class='add'>+	[CM_EVENT_BATT_OUT] = "Battery Pulled Out",</div><div class='add'>+	[CM_EVENT_EXT_PWR_IN_OUT] = "External Power Attach/Detach",</div><div class='add'>+	[CM_EVENT_CHG_START_STOP] = "Charging Start/Stop",</div><div class='add'>+	[CM_EVENT_OTHERS] = "Other battery events"</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Regard CM_JIFFIES_SMALL jiffies is small enough to ignore for</div><div class='ctx'>  * delayed works so that we can run delayed works with CM_JIFFIES_SMALL</div><div class='hunk'>@@ -57,6 +67,12 @@ static bool cm_suspended;</div><div class='ctx'> static bool cm_rtc_set;</div><div class='ctx'> static unsigned long cm_suspend_duration_ms;</div><div class='ctx'> </div><div class='add'>+/* About normal (not suspended) monitoring */</div><div class='add'>+static unsigned long polling_jiffy = ULONG_MAX; /* ULONG_MAX: no polling */</div><div class='add'>+static unsigned long next_polling; /* Next appointed polling time */</div><div class='add'>+static struct workqueue_struct *cm_wq; /* init at driver add */</div><div class='add'>+static struct delayed_work cm_monitor_work; /* init at driver add */</div><div class='add'>+</div><div class='ctx'> /* Global charger-manager description */</div><div class='ctx'> static struct charger_global_desc *g_desc; /* init with setup_charger_manager */</div><div class='ctx'> </div><div class='hunk'>@@ -71,6 +87,11 @@ static bool is_batt_present(struct charger_manager *cm)</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	switch (cm-&gt;desc-&gt;battery_present) {</div><div class='add'>+	case CM_BATTERY_PRESENT:</div><div class='add'>+		present = true;</div><div class='add'>+		break;</div><div class='add'>+	case CM_NO_BATTERY:</div><div class='add'>+		break;</div><div class='ctx'> 	case CM_FUEL_GAUGE:</div><div class='ctx'> 		ret = cm-&gt;fuel_gauge-&gt;get_property(cm-&gt;fuel_gauge,</div><div class='ctx'> 				POWER_SUPPLY_PROP_PRESENT, &amp;val);</div><div class='hunk'>@@ -279,6 +300,26 @@ static int try_charger_enable(struct charger_manager *cm, bool enable)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * try_charger_restart - Restart charging.</div><div class='add'>+ * @cm: the Charger Manager representing the battery.</div><div class='add'>+ *</div><div class='add'>+ * Restart charging by turning off and on the charger.</div><div class='add'>+ */</div><div class='add'>+static int try_charger_restart(struct charger_manager *cm)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (cm-&gt;emergency_stop)</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	err = try_charger_enable(cm, false);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return try_charger_enable(cm, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * uevent_notify - Let users know something has changed.</div><div class='ctx'>  * @cm: the Charger Manager representing the battery.</div><div class='ctx'>  * @event: the event string.</div><div class='hunk'>@@ -334,6 +375,46 @@ static void uevent_notify(struct charger_manager *cm, const char *event)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * fullbatt_vchk - Check voltage drop some times after "FULL" event.</div><div class='add'>+ * @work: the work_struct appointing the function</div><div class='add'>+ *</div><div class='add'>+ * If a user has designated "fullbatt_vchkdrop_ms/uV" values with</div><div class='add'>+ * charger_desc, Charger Manager checks voltage drop after the battery</div><div class='add'>+ * "FULL" event. It checks whether the voltage has dropped more than</div><div class='add'>+ * fullbatt_vchkdrop_uV by calling this function after fullbatt_vchkrop_ms.</div><div class='add'>+ */</div><div class='add'>+static void fullbatt_vchk(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct delayed_work *dwork = to_delayed_work(work);</div><div class='add'>+	struct charger_manager *cm = container_of(dwork,</div><div class='add'>+			struct charger_manager, fullbatt_vchk_work);</div><div class='add'>+	struct charger_desc *desc = cm-&gt;desc;</div><div class='add'>+	int batt_uV, err, diff;</div><div class='add'>+</div><div class='add'>+	/* remove the appointment for fullbatt_vchk */</div><div class='add'>+	cm-&gt;fullbatt_vchk_jiffies_at = 0;</div><div class='add'>+</div><div class='add'>+	if (!desc-&gt;fullbatt_vchkdrop_uV || !desc-&gt;fullbatt_vchkdrop_ms)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	err = get_batt_uV(cm, &amp;batt_uV);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(cm-&gt;dev, "%s: get_batt_uV error(%d).\n", __func__, err);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	diff = cm-&gt;fullbatt_vchk_uV;</div><div class='add'>+	diff -= batt_uV;</div><div class='add'>+</div><div class='add'>+	dev_dbg(cm-&gt;dev, "VBATT dropped %duV after full-batt.\n", diff);</div><div class='add'>+</div><div class='add'>+	if (diff &gt; desc-&gt;fullbatt_vchkdrop_uV) {</div><div class='add'>+		try_charger_restart(cm);</div><div class='add'>+		uevent_notify(cm, "Recharge");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * _cm_monitor - Monitor the temperature and return true for exceptions.</div><div class='ctx'>  * @cm: the Charger Manager representing the battery.</div><div class='ctx'>  *</div><div class='hunk'>@@ -392,6 +473,131 @@ static bool cm_monitor(void)</div><div class='ctx'> 	return stop;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * _setup_polling - Setup the next instance of polling.</div><div class='add'>+ * @work: work_struct of the function _setup_polling.</div><div class='add'>+ */</div><div class='add'>+static void _setup_polling(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	unsigned long min = ULONG_MAX;</div><div class='add'>+	struct charger_manager *cm;</div><div class='add'>+	bool keep_polling = false;</div><div class='add'>+	unsigned long _next_polling;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;cm_list_mtx);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(cm, &amp;cm_list, entry) {</div><div class='add'>+		if (is_polling_required(cm) &amp;&amp; cm-&gt;desc-&gt;polling_interval_ms) {</div><div class='add'>+			keep_polling = true;</div><div class='add'>+</div><div class='add'>+			if (min &gt; cm-&gt;desc-&gt;polling_interval_ms)</div><div class='add'>+				min = cm-&gt;desc-&gt;polling_interval_ms;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	polling_jiffy = msecs_to_jiffies(min);</div><div class='add'>+	if (polling_jiffy &lt;= CM_JIFFIES_SMALL)</div><div class='add'>+		polling_jiffy = CM_JIFFIES_SMALL + 1;</div><div class='add'>+</div><div class='add'>+	if (!keep_polling)</div><div class='add'>+		polling_jiffy = ULONG_MAX;</div><div class='add'>+	if (polling_jiffy == ULONG_MAX)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	WARN(cm_wq == NULL, "charger-manager: workqueue not initialized"</div><div class='add'>+			    ". try it later. %s\n", __func__);</div><div class='add'>+</div><div class='add'>+	_next_polling = jiffies + polling_jiffy;</div><div class='add'>+</div><div class='add'>+	if (!delayed_work_pending(&amp;cm_monitor_work) ||</div><div class='add'>+	    (delayed_work_pending(&amp;cm_monitor_work) &amp;&amp;</div><div class='add'>+	     time_after(next_polling, _next_polling))) {</div><div class='add'>+		cancel_delayed_work_sync(&amp;cm_monitor_work);</div><div class='add'>+		next_polling = jiffies + polling_jiffy;</div><div class='add'>+		queue_delayed_work(cm_wq, &amp;cm_monitor_work, polling_jiffy);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;cm_list_mtx);</div><div class='add'>+}</div><div class='add'>+static DECLARE_WORK(setup_polling, _setup_polling);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cm_monitor_poller - The Monitor / Poller.</div><div class='add'>+ * @work: work_struct of the function cm_monitor_poller</div><div class='add'>+ *</div><div class='add'>+ * During non-suspended state, cm_monitor_poller is used to poll and monitor</div><div class='add'>+ * the batteries.</div><div class='add'>+ */</div><div class='add'>+static void cm_monitor_poller(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	cm_monitor();</div><div class='add'>+	schedule_work(&amp;setup_polling);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fullbatt_handler - Event handler for CM_EVENT_BATT_FULL</div><div class='add'>+ * @cm: the Charger Manager representing the battery.</div><div class='add'>+ */</div><div class='add'>+static void fullbatt_handler(struct charger_manager *cm)</div><div class='add'>+{</div><div class='add'>+	struct charger_desc *desc = cm-&gt;desc;</div><div class='add'>+</div><div class='add'>+	if (!desc-&gt;fullbatt_vchkdrop_uV || !desc-&gt;fullbatt_vchkdrop_ms)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (cm_suspended)</div><div class='add'>+		device_set_wakeup_capable(cm-&gt;dev, true);</div><div class='add'>+</div><div class='add'>+	if (delayed_work_pending(&amp;cm-&gt;fullbatt_vchk_work))</div><div class='add'>+		cancel_delayed_work(&amp;cm-&gt;fullbatt_vchk_work);</div><div class='add'>+	queue_delayed_work(cm_wq, &amp;cm-&gt;fullbatt_vchk_work,</div><div class='add'>+			   msecs_to_jiffies(desc-&gt;fullbatt_vchkdrop_ms));</div><div class='add'>+	cm-&gt;fullbatt_vchk_jiffies_at = jiffies + msecs_to_jiffies(</div><div class='add'>+				       desc-&gt;fullbatt_vchkdrop_ms);</div><div class='add'>+</div><div class='add'>+	if (cm-&gt;fullbatt_vchk_jiffies_at == 0)</div><div class='add'>+		cm-&gt;fullbatt_vchk_jiffies_at = 1;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	dev_info(cm-&gt;dev, "EVENT_HANDLE: Battery Fully Charged.\n");</div><div class='add'>+	uevent_notify(cm, default_event_names[CM_EVENT_BATT_FULL]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * battout_handler - Event handler for CM_EVENT_BATT_OUT</div><div class='add'>+ * @cm: the Charger Manager representing the battery.</div><div class='add'>+ */</div><div class='add'>+static void battout_handler(struct charger_manager *cm)</div><div class='add'>+{</div><div class='add'>+	if (cm_suspended)</div><div class='add'>+		device_set_wakeup_capable(cm-&gt;dev, true);</div><div class='add'>+</div><div class='add'>+	if (!is_batt_present(cm)) {</div><div class='add'>+		dev_emerg(cm-&gt;dev, "Battery Pulled Out!\n");</div><div class='add'>+		uevent_notify(cm, default_event_names[CM_EVENT_BATT_OUT]);</div><div class='add'>+	} else {</div><div class='add'>+		uevent_notify(cm, "Battery Reinserted?");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * misc_event_handler - Handler for other evnets</div><div class='add'>+ * @cm: the Charger Manager representing the battery.</div><div class='add'>+ * @type: the Charger Manager representing the battery.</div><div class='add'>+ */</div><div class='add'>+static void misc_event_handler(struct charger_manager *cm,</div><div class='add'>+			enum cm_event_types type)</div><div class='add'>+{</div><div class='add'>+	if (cm_suspended)</div><div class='add'>+		device_set_wakeup_capable(cm-&gt;dev, true);</div><div class='add'>+</div><div class='add'>+	if (!delayed_work_pending(&amp;cm_monitor_work) &amp;&amp;</div><div class='add'>+	    is_polling_required(cm) &amp;&amp; cm-&gt;desc-&gt;polling_interval_ms)</div><div class='add'>+		schedule_work(&amp;setup_polling);</div><div class='add'>+	uevent_notify(cm, default_event_names[type]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int charger_get_property(struct power_supply *psy,</div><div class='ctx'> 		enum power_supply_property psp,</div><div class='ctx'> 		union power_supply_propval *val)</div><div class='hunk'>@@ -613,6 +819,21 @@ static bool cm_setup_timer(void)</div><div class='ctx'> 	mutex_lock(&amp;cm_list_mtx);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(cm, &amp;cm_list, entry) {</div><div class='add'>+		unsigned int fbchk_ms = 0;</div><div class='add'>+</div><div class='add'>+		/* fullbatt_vchk is required. setup timer for that */</div><div class='add'>+		if (cm-&gt;fullbatt_vchk_jiffies_at) {</div><div class='add'>+			fbchk_ms = jiffies_to_msecs(cm-&gt;fullbatt_vchk_jiffies_at</div><div class='add'>+						    - jiffies);</div><div class='add'>+			if (time_is_before_eq_jiffies(</div><div class='add'>+				cm-&gt;fullbatt_vchk_jiffies_at) ||</div><div class='add'>+				msecs_to_jiffies(fbchk_ms) &lt; CM_JIFFIES_SMALL) {</div><div class='add'>+				fullbatt_vchk(&amp;cm-&gt;fullbatt_vchk_work.work);</div><div class='add'>+				fbchk_ms = 0;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		CM_MIN_VALID(wakeup_ms, fbchk_ms);</div><div class='add'>+</div><div class='ctx'> 		/* Skip if polling is not required for this CM */</div><div class='ctx'> 		if (!is_polling_required(cm) &amp;&amp; !cm-&gt;emergency_stop)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -672,6 +893,23 @@ static bool cm_setup_timer(void)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void _cm_fbchk_in_suspend(struct charger_manager *cm)</div><div class='add'>+{</div><div class='add'>+	unsigned long jiffy_now = jiffies;</div><div class='add'>+</div><div class='add'>+	if (!cm-&gt;fullbatt_vchk_jiffies_at)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (g_desc &amp;&amp; g_desc-&gt;assume_timer_stops_in_suspend)</div><div class='add'>+		jiffy_now += msecs_to_jiffies(cm_suspend_duration_ms);</div><div class='add'>+</div><div class='add'>+	/* Execute now if it's going to be executed not too long after */</div><div class='add'>+	jiffy_now += CM_JIFFIES_SMALL;</div><div class='add'>+</div><div class='add'>+	if (time_after_eq(jiffy_now, cm-&gt;fullbatt_vchk_jiffies_at))</div><div class='add'>+		fullbatt_vchk(&amp;cm-&gt;fullbatt_vchk_work.work);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * cm_suspend_again - Determine whether suspend again or not</div><div class='ctx'>  *</div><div class='hunk'>@@ -693,6 +931,8 @@ bool cm_suspend_again(void)</div><div class='ctx'> 	ret = true;</div><div class='ctx'> 	mutex_lock(&amp;cm_list_mtx);</div><div class='ctx'> 	list_for_each_entry(cm, &amp;cm_list, entry) {</div><div class='add'>+		_cm_fbchk_in_suspend(cm);</div><div class='add'>+</div><div class='ctx'> 		if (cm-&gt;status_save_ext_pwr_inserted != is_ext_pwr_online(cm) ||</div><div class='ctx'> 		    cm-&gt;status_save_batt != is_batt_present(cm)) {</div><div class='ctx'> 			ret = false;</div><div class='hunk'>@@ -796,6 +1036,21 @@ static int charger_manager_probe(struct platform_device *pdev)</div><div class='ctx'> 	memcpy(cm-&gt;desc, desc, sizeof(struct charger_desc));</div><div class='ctx'> 	cm-&gt;last_temp_mC = INT_MIN; /* denotes "unmeasured, yet" */</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * The following two do not need to be errors.</div><div class='add'>+	 * Users may intentionally ignore those two features.</div><div class='add'>+	 */</div><div class='add'>+	if (desc-&gt;fullbatt_uV == 0) {</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Ignoring full-battery voltage threshold"</div><div class='add'>+					" as it is not supplied.");</div><div class='add'>+	}</div><div class='add'>+	if (!desc-&gt;fullbatt_vchkdrop_ms || !desc-&gt;fullbatt_vchkdrop_uV) {</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Disabling full-battery voltage drop "</div><div class='add'>+				"checking mechanism as it is not supplied.");</div><div class='add'>+		desc-&gt;fullbatt_vchkdrop_ms = 0;</div><div class='add'>+		desc-&gt;fullbatt_vchkdrop_uV = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!desc-&gt;charger_regulators || desc-&gt;num_charger_regulators &lt; 1) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "charger_regulators undefined.\n");</div><div class='hunk'>@@ -903,6 +1158,8 @@ static int charger_manager_probe(struct platform_device *pdev)</div><div class='ctx'> 		cm-&gt;charger_psy.num_properties++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	INIT_DELAYED_WORK(&amp;cm-&gt;fullbatt_vchk_work, fullbatt_vchk);</div><div class='add'>+</div><div class='ctx'> 	ret = power_supply_register(NULL, &amp;cm-&gt;charger_psy);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Cannot register charger-manager with"</div><div class='hunk'>@@ -928,6 +1185,15 @@ static int charger_manager_probe(struct platform_device *pdev)</div><div class='ctx'> 	list_add(&amp;cm-&gt;entry, &amp;cm_list);</div><div class='ctx'> 	mutex_unlock(&amp;cm_list_mtx);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Charger-manager is capable of waking up the systme from sleep</div><div class='add'>+	 * when event is happend through cm_notify_event()</div><div class='add'>+	 */</div><div class='add'>+	device_init_wakeup(&amp;pdev-&gt;dev, true);</div><div class='add'>+	device_set_wakeup_capable(&amp;pdev-&gt;dev, false);</div><div class='add'>+</div><div class='add'>+	schedule_work(&amp;setup_polling);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_chg_enable:</div><div class='hunk'>@@ -958,9 +1224,17 @@ static int __devexit charger_manager_remove(struct platform_device *pdev)</div><div class='ctx'> 	list_del(&amp;cm-&gt;entry);</div><div class='ctx'> 	mutex_unlock(&amp;cm_list_mtx);</div><div class='ctx'> </div><div class='add'>+	if (work_pending(&amp;setup_polling))</div><div class='add'>+		cancel_work_sync(&amp;setup_polling);</div><div class='add'>+	if (delayed_work_pending(&amp;cm_monitor_work))</div><div class='add'>+		cancel_delayed_work_sync(&amp;cm_monitor_work);</div><div class='add'>+</div><div class='ctx'> 	regulator_bulk_free(desc-&gt;num_charger_regulators,</div><div class='ctx'> 			    desc-&gt;charger_regulators);</div><div class='ctx'> 	power_supply_unregister(&amp;cm-&gt;charger_psy);</div><div class='add'>+</div><div class='add'>+	try_charger_enable(cm, false);</div><div class='add'>+</div><div class='ctx'> 	kfree(cm-&gt;charger_psy.properties);</div><div class='ctx'> 	kfree(cm-&gt;charger_stat);</div><div class='ctx'> 	kfree(cm-&gt;desc);</div><div class='hunk'>@@ -975,6 +1249,18 @@ static const struct platform_device_id charger_manager_id[] = {</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(platform, charger_manager_id);</div><div class='ctx'> </div><div class='add'>+static int cm_suspend_noirq(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (device_may_wakeup(dev)) {</div><div class='add'>+		device_set_wakeup_capable(dev, false);</div><div class='add'>+		ret = -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int cm_suspend_prepare(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct charger_manager *cm = dev_get_drvdata(dev);</div><div class='hunk'>@@ -1000,6 +1286,8 @@ static int cm_suspend_prepare(struct device *dev)</div><div class='ctx'> 		cm_suspended = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (delayed_work_pending(&amp;cm-&gt;fullbatt_vchk_work))</div><div class='add'>+		cancel_delayed_work(&amp;cm-&gt;fullbatt_vchk_work);</div><div class='ctx'> 	cm-&gt;status_save_ext_pwr_inserted = is_ext_pwr_online(cm);</div><div class='ctx'> 	cm-&gt;status_save_batt = is_batt_present(cm);</div><div class='ctx'> </div><div class='hunk'>@@ -1027,11 +1315,40 @@ static void cm_suspend_complete(struct device *dev)</div><div class='ctx'> 		cm_rtc_set = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Re-enqueue delayed work (fullbatt_vchk_work) */</div><div class='add'>+	if (cm-&gt;fullbatt_vchk_jiffies_at) {</div><div class='add'>+		unsigned long delay = 0;</div><div class='add'>+		unsigned long now = jiffies + CM_JIFFIES_SMALL;</div><div class='add'>+</div><div class='add'>+		if (time_after_eq(now, cm-&gt;fullbatt_vchk_jiffies_at)) {</div><div class='add'>+			delay = (unsigned long)((long)now</div><div class='add'>+				- (long)(cm-&gt;fullbatt_vchk_jiffies_at));</div><div class='add'>+			delay = jiffies_to_msecs(delay);</div><div class='add'>+		} else {</div><div class='add'>+			delay = 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Account for cm_suspend_duration_ms if</div><div class='add'>+		 * assume_timer_stops_in_suspend is active</div><div class='add'>+		 */</div><div class='add'>+		if (g_desc &amp;&amp; g_desc-&gt;assume_timer_stops_in_suspend) {</div><div class='add'>+			if (delay &gt; cm_suspend_duration_ms)</div><div class='add'>+				delay -= cm_suspend_duration_ms;</div><div class='add'>+			else</div><div class='add'>+				delay = 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		queue_delayed_work(cm_wq, &amp;cm-&gt;fullbatt_vchk_work,</div><div class='add'>+				   msecs_to_jiffies(delay));</div><div class='add'>+	}</div><div class='add'>+	device_set_wakeup_capable(cm-&gt;dev, false);</div><div class='ctx'> 	uevent_notify(cm, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct dev_pm_ops charger_manager_pm = {</div><div class='ctx'> 	.prepare	= cm_suspend_prepare,</div><div class='add'>+	.suspend_noirq	= cm_suspend_noirq,</div><div class='ctx'> 	.complete	= cm_suspend_complete,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1048,16 +1365,91 @@ static struct platform_driver charger_manager_driver = {</div><div class='ctx'> </div><div class='ctx'> static int __init charger_manager_init(void)</div><div class='ctx'> {</div><div class='add'>+	cm_wq = create_freezable_workqueue("charger_manager");</div><div class='add'>+	INIT_DELAYED_WORK(&amp;cm_monitor_work, cm_monitor_poller);</div><div class='add'>+</div><div class='ctx'> 	return platform_driver_register(&amp;charger_manager_driver);</div><div class='ctx'> }</div><div class='ctx'> late_initcall(charger_manager_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit charger_manager_cleanup(void)</div><div class='ctx'> {</div><div class='add'>+	destroy_workqueue(cm_wq);</div><div class='add'>+	cm_wq = NULL;</div><div class='add'>+</div><div class='ctx'> 	platform_driver_unregister(&amp;charger_manager_driver);</div><div class='ctx'> }</div><div class='ctx'> module_exit(charger_manager_cleanup);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * find_power_supply - find the associated power_supply of charger</div><div class='add'>+ * @cm: the Charger Manager representing the battery</div><div class='add'>+ * @psy: pointer to instance of charger's power_supply</div><div class='add'>+ */</div><div class='add'>+static bool find_power_supply(struct charger_manager *cm,</div><div class='add'>+			struct power_supply *psy)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	bool found = false;</div><div class='add'>+</div><div class='add'>+	for (i = 0; cm-&gt;charger_stat[i]; i++) {</div><div class='add'>+		if (psy == cm-&gt;charger_stat[i]) {</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return found;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cm_notify_event - charger driver notify Charger Manager of charger event</div><div class='add'>+ * @psy: pointer to instance of charger's power_supply</div><div class='add'>+ * @type: type of charger event</div><div class='add'>+ * @msg: optional message passed to uevent_notify fuction</div><div class='add'>+ */</div><div class='add'>+void cm_notify_event(struct power_supply *psy, enum cm_event_types type,</div><div class='add'>+		     char *msg)</div><div class='add'>+{</div><div class='add'>+	struct charger_manager *cm;</div><div class='add'>+	bool found_power_supply = false;</div><div class='add'>+</div><div class='add'>+	if (psy == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;cm_list_mtx);</div><div class='add'>+	list_for_each_entry(cm, &amp;cm_list, entry) {</div><div class='add'>+		found_power_supply = find_power_supply(cm, psy);</div><div class='add'>+		if (found_power_supply)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;cm_list_mtx);</div><div class='add'>+</div><div class='add'>+	if (!found_power_supply)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case CM_EVENT_BATT_FULL:</div><div class='add'>+		fullbatt_handler(cm);</div><div class='add'>+		break;</div><div class='add'>+	case CM_EVENT_BATT_OUT:</div><div class='add'>+		battout_handler(cm);</div><div class='add'>+		break;</div><div class='add'>+	case CM_EVENT_BATT_IN:</div><div class='add'>+	case CM_EVENT_EXT_PWR_IN_OUT ... CM_EVENT_CHG_START_STOP:</div><div class='add'>+		misc_event_handler(cm, type);</div><div class='add'>+		break;</div><div class='add'>+	case CM_EVENT_UNKNOWN:</div><div class='add'>+	case CM_EVENT_OTHERS:</div><div class='add'>+		uevent_notify(cm, msg ? msg : default_event_names[type]);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(cm-&gt;dev, "%s type not specified.\n", __func__);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(cm_notify_event);</div><div class='add'>+</div><div class='ctx'> MODULE_AUTHOR("MyungJoo Ham &lt;myungjoo.ham@samsung.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Charger Manager");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/power/ds2781_battery.c b/drivers/power/ds2781_battery.c<br/>index ca0d653d0a7a..975684a40f15 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/ds2781_battery.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/ds2781_battery.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/ds2781_battery.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/ds2781_battery.c</a></div><div class='hunk'>@@ -643,9 +643,7 @@ static ssize_t ds2781_read_param_eeprom_bin(struct file *filp,</div><div class='ctx'> 	struct power_supply *psy = to_power_supply(dev);</div><div class='ctx'> 	struct ds2781_device_info *dev_info = to_ds2781_device_info(psy);</div><div class='ctx'> </div><div class='del'>-	count = min_t(loff_t, count,</div><div class='del'>-		DS2781_EEPROM_BLOCK1_END -</div><div class='del'>-		DS2781_EEPROM_BLOCK1_START + 1 - off);</div><div class='add'>+	count = min_t(loff_t, count, DS2781_PARAM_EEPROM_SIZE - off);</div><div class='ctx'> </div><div class='ctx'> 	return ds2781_read_block(dev_info, buf,</div><div class='ctx'> 				DS2781_EEPROM_BLOCK1_START + off, count);</div><div class='hunk'>@@ -661,9 +659,7 @@ static ssize_t ds2781_write_param_eeprom_bin(struct file *filp,</div><div class='ctx'> 	struct ds2781_device_info *dev_info = to_ds2781_device_info(psy);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	count = min_t(loff_t, count,</div><div class='del'>-		DS2781_EEPROM_BLOCK1_END -</div><div class='del'>-		DS2781_EEPROM_BLOCK1_START + 1 - off);</div><div class='add'>+	count = min_t(loff_t, count, DS2781_PARAM_EEPROM_SIZE - off);</div><div class='ctx'> </div><div class='ctx'> 	ret = ds2781_write(dev_info, buf,</div><div class='ctx'> 				DS2781_EEPROM_BLOCK1_START + off, count);</div><div class='hunk'>@@ -682,7 +678,7 @@ static struct bin_attribute ds2781_param_eeprom_bin_attr = {</div><div class='ctx'> 		.name = "param_eeprom",</div><div class='ctx'> 		.mode = S_IRUGO | S_IWUSR,</div><div class='ctx'> 	},</div><div class='del'>-	.size = DS2781_EEPROM_BLOCK1_END - DS2781_EEPROM_BLOCK1_START + 1,</div><div class='add'>+	.size = DS2781_PARAM_EEPROM_SIZE,</div><div class='ctx'> 	.read = ds2781_read_param_eeprom_bin,</div><div class='ctx'> 	.write = ds2781_write_param_eeprom_bin,</div><div class='ctx'> };</div><div class='hunk'>@@ -696,9 +692,7 @@ static ssize_t ds2781_read_user_eeprom_bin(struct file *filp,</div><div class='ctx'> 	struct power_supply *psy = to_power_supply(dev);</div><div class='ctx'> 	struct ds2781_device_info *dev_info = to_ds2781_device_info(psy);</div><div class='ctx'> </div><div class='del'>-	count = min_t(loff_t, count,</div><div class='del'>-		DS2781_EEPROM_BLOCK0_END -</div><div class='del'>-		DS2781_EEPROM_BLOCK0_START + 1 - off);</div><div class='add'>+	count = min_t(loff_t, count, DS2781_USER_EEPROM_SIZE - off);</div><div class='ctx'> </div><div class='ctx'> 	return ds2781_read_block(dev_info, buf,</div><div class='ctx'> 				DS2781_EEPROM_BLOCK0_START + off, count);</div><div class='hunk'>@@ -715,9 +709,7 @@ static ssize_t ds2781_write_user_eeprom_bin(struct file *filp,</div><div class='ctx'> 	struct ds2781_device_info *dev_info = to_ds2781_device_info(psy);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	count = min_t(loff_t, count,</div><div class='del'>-		DS2781_EEPROM_BLOCK0_END -</div><div class='del'>-		DS2781_EEPROM_BLOCK0_START + 1 - off);</div><div class='add'>+	count = min_t(loff_t, count, DS2781_USER_EEPROM_SIZE - off);</div><div class='ctx'> </div><div class='ctx'> 	ret = ds2781_write(dev_info, buf,</div><div class='ctx'> 				DS2781_EEPROM_BLOCK0_START + off, count);</div><div class='hunk'>@@ -736,7 +728,7 @@ static struct bin_attribute ds2781_user_eeprom_bin_attr = {</div><div class='ctx'> 		.name = "user_eeprom",</div><div class='ctx'> 		.mode = S_IRUGO | S_IWUSR,</div><div class='ctx'> 	},</div><div class='del'>-	.size = DS2781_EEPROM_BLOCK0_END - DS2781_EEPROM_BLOCK0_START + 1,</div><div class='add'>+	.size = DS2781_USER_EEPROM_SIZE,</div><div class='ctx'> 	.read = ds2781_read_user_eeprom_bin,</div><div class='ctx'> 	.write = ds2781_write_user_eeprom_bin,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/power/isp1704_charger.c b/drivers/power/isp1704_charger.c<br/>index 39eb50f35f09..e5ccd2979773 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/isp1704_charger.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/isp1704_charger.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/isp1704_charger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/isp1704_charger.c</a></div><div class='hunk'>@@ -474,13 +474,13 @@ static int __devinit isp1704_charger_probe(struct platform_device *pdev)</div><div class='ctx'> fail2:</div><div class='ctx'> 	power_supply_unregister(&amp;isp-&gt;psy);</div><div class='ctx'> fail1:</div><div class='add'>+	isp1704_charger_set_power(isp, 0);</div><div class='ctx'> 	usb_put_transceiver(isp-&gt;phy);</div><div class='ctx'> fail0:</div><div class='ctx'> 	kfree(isp);</div><div class='ctx'> </div><div class='ctx'> 	dev_err(&amp;pdev-&gt;dev, "failed to register isp1704 with error %d\n", ret);</div><div class='ctx'> </div><div class='del'>-	isp1704_charger_set_power(isp, 0);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/power/max17042_battery.c b/drivers/power/max17042_battery.c<br/>index 04620c2cb388..140788b309f8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/max17042_battery.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/max17042_battery.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/max17042_battery.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/max17042_battery.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/pm.h&gt;</div><div class='ctx'> #include &lt;linux/mod_devicetable.h&gt;</div><div class='ctx'> #include &lt;linux/power_supply.h&gt;</div><div class='ctx'> #include &lt;linux/power/max17042_battery.h&gt;</div><div class='hunk'>@@ -61,9 +62,13 @@</div><div class='ctx'> #define dP_ACC_100	0x1900</div><div class='ctx'> #define dP_ACC_200	0x3200</div><div class='ctx'> </div><div class='add'>+#define MAX17042_IC_VERSION	0x0092</div><div class='add'>+#define MAX17047_IC_VERSION	0x00AC	/* same for max17050 */</div><div class='add'>+</div><div class='ctx'> struct max17042_chip {</div><div class='ctx'> 	struct i2c_client *client;</div><div class='ctx'> 	struct power_supply battery;</div><div class='add'>+	enum max170xx_chip_type chip_type;</div><div class='ctx'> 	struct max17042_platform_data *pdata;</div><div class='ctx'> 	struct work_struct work;</div><div class='ctx'> 	int    init_complete;</div><div class='hunk'>@@ -105,6 +110,7 @@ static enum power_supply_property max17042_battery_props[] = {</div><div class='ctx'> 	POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,</div><div class='ctx'> 	POWER_SUPPLY_PROP_VOLTAGE_NOW,</div><div class='ctx'> 	POWER_SUPPLY_PROP_VOLTAGE_AVG,</div><div class='add'>+	POWER_SUPPLY_PROP_VOLTAGE_OCV,</div><div class='ctx'> 	POWER_SUPPLY_PROP_CAPACITY,</div><div class='ctx'> 	POWER_SUPPLY_PROP_CHARGE_FULL,</div><div class='ctx'> 	POWER_SUPPLY_PROP_TEMP,</div><div class='hunk'>@@ -150,7 +156,10 @@ static int max17042_get_property(struct power_supply *psy,</div><div class='ctx'> 		val-&gt;intval *= 20000; /* Units of LSB = 20mV */</div><div class='ctx'> 		break;</div><div class='ctx'> 	case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:</div><div class='del'>-		ret = max17042_read_reg(chip-&gt;client, MAX17042_V_empty);</div><div class='add'>+		if (chip-&gt;chip_type == MAX17042)</div><div class='add'>+			ret = max17042_read_reg(chip-&gt;client, MAX17042_V_empty);</div><div class='add'>+		else</div><div class='add'>+			ret = max17042_read_reg(chip-&gt;client, MAX17047_V_empty);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -171,6 +180,13 @@ static int max17042_get_property(struct power_supply *psy,</div><div class='ctx'> </div><div class='ctx'> 		val-&gt;intval = ret * 625 / 8;</div><div class='ctx'> 		break;</div><div class='add'>+	case POWER_SUPPLY_PROP_VOLTAGE_OCV:</div><div class='add'>+		ret = max17042_read_reg(chip-&gt;client, MAX17042_OCVInternal);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		val-&gt;intval = ret * 625 / 8;</div><div class='add'>+		break;</div><div class='ctx'> 	case POWER_SUPPLY_PROP_CAPACITY:</div><div class='ctx'> 		ret = max17042_read_reg(chip-&gt;client, MAX17042_RepSOC);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='hunk'>@@ -325,11 +341,10 @@ static inline int max17042_model_data_compare(struct max17042_chip *chip,</div><div class='ctx'> static int max17042_init_model(struct max17042_chip *chip)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	int table_size =</div><div class='del'>-		sizeof(chip-&gt;pdata-&gt;config_data-&gt;cell_char_tbl)/sizeof(u16);</div><div class='add'>+	int table_size = ARRAY_SIZE(chip-&gt;pdata-&gt;config_data-&gt;cell_char_tbl);</div><div class='ctx'> 	u16 *temp_data;</div><div class='ctx'> </div><div class='del'>-	temp_data = kzalloc(table_size, GFP_KERNEL);</div><div class='add'>+	temp_data = kcalloc(table_size, sizeof(*temp_data), GFP_KERNEL);</div><div class='ctx'> 	if (!temp_data)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -354,12 +369,11 @@ static int max17042_init_model(struct max17042_chip *chip)</div><div class='ctx'> static int max17042_verify_model_lock(struct max17042_chip *chip)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	int table_size =</div><div class='del'>-		sizeof(chip-&gt;pdata-&gt;config_data-&gt;cell_char_tbl);</div><div class='add'>+	int table_size = ARRAY_SIZE(chip-&gt;pdata-&gt;config_data-&gt;cell_char_tbl);</div><div class='ctx'> 	u16 *temp_data;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	temp_data = kzalloc(table_size, GFP_KERNEL);</div><div class='add'>+	temp_data = kcalloc(table_size, sizeof(*temp_data), GFP_KERNEL);</div><div class='ctx'> 	if (!temp_data)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -382,6 +396,9 @@ static void max17042_write_config_regs(struct max17042_chip *chip)</div><div class='ctx'> 	max17042_write_reg(chip-&gt;client, MAX17042_FilterCFG,</div><div class='ctx'> 			config-&gt;filter_cfg);</div><div class='ctx'> 	max17042_write_reg(chip-&gt;client, MAX17042_RelaxCFG, config-&gt;relax_cfg);</div><div class='add'>+	if (chip-&gt;chip_type == MAX17047)</div><div class='add'>+		max17042_write_reg(chip-&gt;client, MAX17047_FullSOCThr,</div><div class='add'>+						config-&gt;full_soc_thresh);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void  max17042_write_custom_regs(struct max17042_chip *chip)</div><div class='hunk'>@@ -392,12 +409,23 @@ static void  max17042_write_custom_regs(struct max17042_chip *chip)</div><div class='ctx'> 				config-&gt;rcomp0);</div><div class='ctx'> 	max17042_write_verify_reg(chip-&gt;client, MAX17042_TempCo,</div><div class='ctx'> 				config-&gt;tcompc0);</div><div class='del'>-	max17042_write_reg(chip-&gt;client, MAX17042_EmptyTempCo,</div><div class='del'>-			config-&gt;empty_tempco);</div><div class='del'>-	max17042_write_verify_reg(chip-&gt;client, MAX17042_K_empty0,</div><div class='del'>-				config-&gt;kempty0);</div><div class='ctx'> 	max17042_write_verify_reg(chip-&gt;client, MAX17042_ICHGTerm,</div><div class='ctx'> 				config-&gt;ichgt_term);</div><div class='add'>+	if (chip-&gt;chip_type == MAX17042) {</div><div class='add'>+		max17042_write_reg(chip-&gt;client, MAX17042_EmptyTempCo,</div><div class='add'>+					config-&gt;empty_tempco);</div><div class='add'>+		max17042_write_verify_reg(chip-&gt;client, MAX17042_K_empty0,</div><div class='add'>+					config-&gt;kempty0);</div><div class='add'>+	} else {</div><div class='add'>+		max17042_write_verify_reg(chip-&gt;client, MAX17047_QRTbl00,</div><div class='add'>+						config-&gt;qrtbl00);</div><div class='add'>+		max17042_write_verify_reg(chip-&gt;client, MAX17047_QRTbl10,</div><div class='add'>+						config-&gt;qrtbl10);</div><div class='add'>+		max17042_write_verify_reg(chip-&gt;client, MAX17047_QRTbl20,</div><div class='add'>+						config-&gt;qrtbl20);</div><div class='add'>+		max17042_write_verify_reg(chip-&gt;client, MAX17047_QRTbl30,</div><div class='add'>+						config-&gt;qrtbl30);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void max17042_update_capacity_regs(struct max17042_chip *chip)</div><div class='hunk'>@@ -453,6 +481,8 @@ static void max17042_load_new_capacity_params(struct max17042_chip *chip)</div><div class='ctx'> 			config-&gt;design_cap);</div><div class='ctx'> 	max17042_write_verify_reg(chip-&gt;client, MAX17042_FullCAPNom,</div><div class='ctx'> 			config-&gt;fullcapnom);</div><div class='add'>+	/* Update SOC register with new SOC */</div><div class='add'>+	max17042_write_reg(chip-&gt;client, MAX17042_RepSOC, vfSoc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -489,20 +519,28 @@ static inline void max17042_override_por_values(struct max17042_chip *chip)</div><div class='ctx'> </div><div class='ctx'> 	max17042_override_por(client, MAX17042_FullCAP, config-&gt;fullcap);</div><div class='ctx'> 	max17042_override_por(client, MAX17042_FullCAPNom, config-&gt;fullcapnom);</div><div class='del'>-	max17042_override_por(client, MAX17042_SOC_empty, config-&gt;socempty);</div><div class='add'>+	if (chip-&gt;chip_type == MAX17042)</div><div class='add'>+		max17042_override_por(client, MAX17042_SOC_empty,</div><div class='add'>+						config-&gt;socempty);</div><div class='ctx'> 	max17042_override_por(client, MAX17042_LAvg_empty, config-&gt;lavg_empty);</div><div class='ctx'> 	max17042_override_por(client, MAX17042_dQacc, config-&gt;dqacc);</div><div class='ctx'> 	max17042_override_por(client, MAX17042_dPacc, config-&gt;dpacc);</div><div class='ctx'> </div><div class='del'>-	max17042_override_por(client, MAX17042_V_empty, config-&gt;vempty);</div><div class='add'>+	if (chip-&gt;chip_type == MAX17042)</div><div class='add'>+		max17042_override_por(client, MAX17042_V_empty, config-&gt;vempty);</div><div class='add'>+	else</div><div class='add'>+		max17042_override_por(client, MAX17047_V_empty, config-&gt;vempty);</div><div class='ctx'> 	max17042_override_por(client, MAX17042_TempNom, config-&gt;temp_nom);</div><div class='ctx'> 	max17042_override_por(client, MAX17042_TempLim, config-&gt;temp_lim);</div><div class='ctx'> 	max17042_override_por(client, MAX17042_FCTC, config-&gt;fctc);</div><div class='ctx'> 	max17042_override_por(client, MAX17042_RCOMP0, config-&gt;rcomp0);</div><div class='ctx'> 	max17042_override_por(client, MAX17042_TempCo, config-&gt;tcompc0);</div><div class='del'>-	max17042_override_por(client, MAX17042_EmptyTempCo,</div><div class='del'>-			config-&gt;empty_tempco);</div><div class='del'>-	max17042_override_por(client, MAX17042_K_empty0, config-&gt;kempty0);</div><div class='add'>+	if (chip-&gt;chip_type) {</div><div class='add'>+		max17042_override_por(client, MAX17042_EmptyTempCo,</div><div class='add'>+					config-&gt;empty_tempco);</div><div class='add'>+		max17042_override_por(client, MAX17042_K_empty0,</div><div class='add'>+					config-&gt;kempty0);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int max17042_init_chip(struct max17042_chip *chip)</div><div class='hunk'>@@ -659,7 +697,19 @@ static int __devinit max17042_probe(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> 	i2c_set_clientdata(client, chip);</div><div class='ctx'> </div><div class='del'>-	chip-&gt;battery.name		= "max17042_battery";</div><div class='add'>+	ret = max17042_read_reg(chip-&gt;client, MAX17042_DevName);</div><div class='add'>+	if (ret == MAX17042_IC_VERSION) {</div><div class='add'>+		dev_dbg(&amp;client-&gt;dev, "chip type max17042 detected\n");</div><div class='add'>+		chip-&gt;chip_type = MAX17042;</div><div class='add'>+	} else if (ret == MAX17047_IC_VERSION) {</div><div class='add'>+		dev_dbg(&amp;client-&gt;dev, "chip type max17047/50 detected\n");</div><div class='add'>+		chip-&gt;chip_type = MAX17047;</div><div class='add'>+	} else {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "device version mismatch: %x\n", ret);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip-&gt;battery.name		= "max170xx_battery";</div><div class='ctx'> 	chip-&gt;battery.type		= POWER_SUPPLY_TYPE_BATTERY;</div><div class='ctx'> 	chip-&gt;battery.get_property	= max17042_get_property;</div><div class='ctx'> 	chip-&gt;battery.properties	= max17042_battery_props;</div><div class='hunk'>@@ -683,6 +733,12 @@ static int __devinit max17042_probe(struct i2c_client *client,</div><div class='ctx'> 		max17042_write_reg(client, MAX17042_LearnCFG, 0x0007);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = power_supply_register(&amp;client-&gt;dev, &amp;chip-&gt;battery);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "failed: power supply register\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (client-&gt;irq) {</div><div class='ctx'> 		ret = request_threaded_irq(client-&gt;irq, NULL,</div><div class='ctx'> 						max17042_thread_handler,</div><div class='hunk'>@@ -693,13 +749,14 @@ static int __devinit max17042_probe(struct i2c_client *client,</div><div class='ctx'> 			reg |= CONFIG_ALRT_BIT_ENBL;</div><div class='ctx'> 			max17042_write_reg(client, MAX17042_CONFIG, reg);</div><div class='ctx'> 			max17042_set_soc_threshold(chip, 1);</div><div class='del'>-		} else</div><div class='add'>+		} else {</div><div class='add'>+			client-&gt;irq = 0;</div><div class='ctx'> 			dev_err(&amp;client-&gt;dev, "%s(): cannot get IRQ\n",</div><div class='ctx'> 				__func__);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	reg = max17042_read_reg(chip-&gt;client, MAX17042_STATUS);</div><div class='del'>-</div><div class='ctx'> 	if (reg &amp; STATUS_POR_BIT) {</div><div class='ctx'> 		INIT_WORK(&amp;chip-&gt;work, max17042_init_worker);</div><div class='ctx'> 		schedule_work(&amp;chip-&gt;work);</div><div class='hunk'>@@ -707,23 +764,65 @@ static int __devinit max17042_probe(struct i2c_client *client,</div><div class='ctx'> 		chip-&gt;init_complete = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = power_supply_register(&amp;client-&gt;dev, &amp;chip-&gt;battery);</div><div class='del'>-	if (ret)</div><div class='del'>-		dev_err(&amp;client-&gt;dev, "failed: power supply register\n");</div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit max17042_remove(struct i2c_client *client)</div><div class='ctx'> {</div><div class='ctx'> 	struct max17042_chip *chip = i2c_get_clientdata(client);</div><div class='ctx'> </div><div class='add'>+	if (client-&gt;irq)</div><div class='add'>+		free_irq(client-&gt;irq, chip);</div><div class='ctx'> 	power_supply_unregister(&amp;chip-&gt;battery);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+static int max17042_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct max17042_chip *chip = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * disable the irq and enable irq_wake</div><div class='add'>+	 * capability to the interrupt line.</div><div class='add'>+	 */</div><div class='add'>+	if (chip-&gt;client-&gt;irq) {</div><div class='add'>+		disable_irq(chip-&gt;client-&gt;irq);</div><div class='add'>+		enable_irq_wake(chip-&gt;client-&gt;irq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max17042_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct max17042_chip *chip = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;client-&gt;irq) {</div><div class='add'>+		disable_irq_wake(chip-&gt;client-&gt;irq);</div><div class='add'>+		enable_irq(chip-&gt;client-&gt;irq);</div><div class='add'>+		/* re-program the SOC thresholds to 1% change */</div><div class='add'>+		max17042_set_soc_threshold(chip, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops max17042_pm_ops = {</div><div class='add'>+	.suspend	= max17042_suspend,</div><div class='add'>+	.resume		= max17042_resume,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MAX17042_PM_OPS (&amp;max17042_pm_ops)</div><div class='add'>+#else</div><div class='add'>+#define MAX17042_PM_OPS NULL</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_OF</div><div class='ctx'> static const struct of_device_id max17042_dt_match[] = {</div><div class='ctx'> 	{ .compatible = "maxim,max17042" },</div><div class='add'>+	{ .compatible = "maxim,max17047" },</div><div class='add'>+	{ .compatible = "maxim,max17050" },</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, max17042_dt_match);</div><div class='hunk'>@@ -731,6 +830,8 @@ MODULE_DEVICE_TABLE(of, max17042_dt_match);</div><div class='ctx'> </div><div class='ctx'> static const struct i2c_device_id max17042_id[] = {</div><div class='ctx'> 	{ "max17042", 0 },</div><div class='add'>+	{ "max17047", 1 },</div><div class='add'>+	{ "max17050", 2 },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(i2c, max17042_id);</div><div class='hunk'>@@ -739,6 +840,7 @@ static struct i2c_driver max17042_i2c_driver = {</div><div class='ctx'> 	.driver	= {</div><div class='ctx'> 		.name	= "max17042",</div><div class='ctx'> 		.of_match_table = of_match_ptr(max17042_dt_match),</div><div class='add'>+		.pm	= MAX17042_PM_OPS,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe		= max17042_probe,</div><div class='ctx'> 	.remove		= __devexit_p(max17042_remove),</div><div class='head'>diff --git a/drivers/power/power_supply_sysfs.c b/drivers/power/power_supply_sysfs.c<br/>index 4368e7d61316..4150747f9186 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/power_supply_sysfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/power_supply_sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/power_supply_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/power_supply_sysfs.c</a></div><div class='hunk'>@@ -146,6 +146,7 @@ static struct device_attribute power_supply_attrs[] = {</div><div class='ctx'> 	POWER_SUPPLY_ATTR(voltage_min_design),</div><div class='ctx'> 	POWER_SUPPLY_ATTR(voltage_now),</div><div class='ctx'> 	POWER_SUPPLY_ATTR(voltage_avg),</div><div class='add'>+	POWER_SUPPLY_ATTR(voltage_ocv),</div><div class='ctx'> 	POWER_SUPPLY_ATTR(current_max),</div><div class='ctx'> 	POWER_SUPPLY_ATTR(current_now),</div><div class='ctx'> 	POWER_SUPPLY_ATTR(current_avg),</div><div class='head'>diff --git a/drivers/power/sbs-battery.c b/drivers/power/sbs-battery.c<br/>index 06b659d91790..a5b6849d4123 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/sbs-battery.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/sbs-battery.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/sbs-battery.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/sbs-battery.c</a></div><div class='hunk'>@@ -89,7 +89,7 @@ static const struct chip_data {</div><div class='ctx'> 	[REG_CURRENT] =</div><div class='ctx'> 		SBS_DATA(POWER_SUPPLY_PROP_CURRENT_NOW, 0x0A, -32768, 32767),</div><div class='ctx'> 	[REG_CAPACITY] =</div><div class='del'>-		SBS_DATA(POWER_SUPPLY_PROP_CAPACITY, 0x0E, 0, 100),</div><div class='add'>+		SBS_DATA(POWER_SUPPLY_PROP_CAPACITY, 0x0D, 0, 100),</div><div class='ctx'> 	[REG_REMAINING_CAPACITY] =</div><div class='ctx'> 		SBS_DATA(POWER_SUPPLY_PROP_ENERGY_NOW, 0x0F, 0, 65535),</div><div class='ctx'> 	[REG_REMAINING_CAPACITY_CHARGE] =</div><div class='head'>diff --git a/drivers/power/smb347-charger.c b/drivers/power/smb347-charger.c<br/>index ce1694d1a365..f8eedd8a676f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/smb347-charger.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/smb347-charger.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/smb347-charger.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/smb347-charger.c</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'>  * published by the Free Software Foundation.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/power_supply.h&gt;</div><div class='ctx'> #include &lt;linux/power/smb347-charger.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Configuration registers. These are mirrored to volatile RAM and can be</div><div class='hunk'>@@ -39,6 +39,7 @@</div><div class='ctx'> #define CFG_CURRENT_LIMIT_DC_SHIFT		4</div><div class='ctx'> #define CFG_CURRENT_LIMIT_USB_MASK		0x0f</div><div class='ctx'> #define CFG_FLOAT_VOLTAGE			0x03</div><div class='add'>+#define CFG_FLOAT_VOLTAGE_FLOAT_MASK		0x3f</div><div class='ctx'> #define CFG_FLOAT_VOLTAGE_THRESHOLD_MASK	0xc0</div><div class='ctx'> #define CFG_FLOAT_VOLTAGE_THRESHOLD_SHIFT	6</div><div class='ctx'> #define CFG_STAT				0x05</div><div class='hunk'>@@ -113,29 +114,31 @@</div><div class='ctx'> #define STAT_C_CHARGER_ERROR			BIT(6)</div><div class='ctx'> #define STAT_E					0x3f</div><div class='ctx'> </div><div class='add'>+#define SMB347_MAX_REGISTER			0x3f</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct smb347_charger - smb347 charger instance</div><div class='ctx'>  * @lock: protects concurrent access to online variables</div><div class='del'>- * @client: pointer to i2c client</div><div class='add'>+ * @dev: pointer to device</div><div class='add'>+ * @regmap: pointer to driver regmap</div><div class='ctx'>  * @mains: power_supply instance for AC/DC power</div><div class='ctx'>  * @usb: power_supply instance for USB power</div><div class='ctx'>  * @battery: power_supply instance for battery</div><div class='ctx'>  * @mains_online: is AC/DC input connected</div><div class='ctx'>  * @usb_online: is USB input connected</div><div class='ctx'>  * @charging_enabled: is charging enabled</div><div class='del'>- * @dentry: for debugfs</div><div class='ctx'>  * @pdata: pointer to platform data</div><div class='ctx'>  */</div><div class='ctx'> struct smb347_charger {</div><div class='ctx'> 	struct mutex		lock;</div><div class='del'>-	struct i2c_client	*client;</div><div class='add'>+	struct device		*dev;</div><div class='add'>+	struct regmap		*regmap;</div><div class='ctx'> 	struct power_supply	mains;</div><div class='ctx'> 	struct power_supply	usb;</div><div class='ctx'> 	struct power_supply	battery;</div><div class='ctx'> 	bool			mains_online;</div><div class='ctx'> 	bool			usb_online;</div><div class='ctx'> 	bool			charging_enabled;</div><div class='del'>-	struct dentry		*dentry;</div><div class='ctx'> 	const struct smb347_charger_platform_data *pdata;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -193,14 +196,6 @@ static const unsigned int ccc_tbl[] = {</div><div class='ctx'> 	1200000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Convert register value to current using lookup table */</div><div class='del'>-static int hw_to_current(const unsigned int *tbl, size_t size, unsigned int val)</div><div class='del'>-{</div><div class='del'>-	if (val &gt;= size)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return tbl[val];</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Convert current to register value using lookup table */</div><div class='ctx'> static int current_to_hw(const unsigned int *tbl, size_t size, unsigned int val)</div><div class='ctx'> {</div><div class='hunk'>@@ -212,43 +207,22 @@ static int current_to_hw(const unsigned int *tbl, size_t size, unsigned int val)</div><div class='ctx'> 	return i &gt; 0 ? i - 1 : -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int smb347_read(struct smb347_charger *smb, u8 reg)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = i2c_smbus_read_byte_data(smb-&gt;client, reg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		dev_warn(&amp;smb-&gt;client-&gt;dev, "failed to read reg 0x%x: %d\n",</div><div class='del'>-			 reg, ret);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smb347_write(struct smb347_charger *smb, u8 reg, u8 val)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = i2c_smbus_write_byte_data(smb-&gt;client, reg, val);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		dev_warn(&amp;smb-&gt;client-&gt;dev, "failed to write reg 0x%x: %d\n",</div><div class='del'>-			 reg, ret);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='del'>- * smb347_update_status - updates the charging status</div><div class='add'>+ * smb347_update_ps_status - refreshes the power source status</div><div class='ctx'>  * @smb: pointer to smb347 charger instance</div><div class='ctx'>  *</div><div class='del'>- * Function checks status of the charging and updates internal state</div><div class='del'>- * accordingly. Returns %0 if there is no change in status, %1 if the</div><div class='del'>- * status has changed and negative errno in case of failure.</div><div class='add'>+ * Function checks whether any power source is connected to the charger and</div><div class='add'>+ * updates internal state accordingly. If there is a change to previous state</div><div class='add'>+ * function returns %1, otherwise %0 and negative errno in case of errror.</div><div class='ctx'>  */</div><div class='del'>-static int smb347_update_status(struct smb347_charger *smb)</div><div class='add'>+static int smb347_update_ps_status(struct smb347_charger *smb)</div><div class='ctx'> {</div><div class='ctx'> 	bool usb = false;</div><div class='ctx'> 	bool dc = false;</div><div class='add'>+	unsigned int val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = smb347_read(smb, IRQSTAT_E);</div><div class='add'>+	ret = regmap_read(smb-&gt;regmap, IRQSTAT_E, &amp;val);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -257,9 +231,9 @@ static int smb347_update_status(struct smb347_charger *smb)</div><div class='ctx'> 	 * platform data _and_ whether corresponding undervoltage is set.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (smb-&gt;pdata-&gt;use_mains)</div><div class='del'>-		dc = !(ret &amp; IRQSTAT_E_DCIN_UV_STAT);</div><div class='add'>+		dc = !(val &amp; IRQSTAT_E_DCIN_UV_STAT);</div><div class='ctx'> 	if (smb-&gt;pdata-&gt;use_usb)</div><div class='del'>-		usb = !(ret &amp; IRQSTAT_E_USBIN_UV_STAT);</div><div class='add'>+		usb = !(val &amp; IRQSTAT_E_USBIN_UV_STAT);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;smb-&gt;lock);</div><div class='ctx'> 	ret = smb-&gt;mains_online != dc || smb-&gt;usb_online != usb;</div><div class='hunk'>@@ -271,15 +245,15 @@ static int smb347_update_status(struct smb347_charger *smb)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * smb347_is_online - returns whether input power source is connected</div><div class='add'>+ * smb347_is_ps_online - returns whether input power source is connected</div><div class='ctx'>  * @smb: pointer to smb347 charger instance</div><div class='ctx'>  *</div><div class='ctx'>  * Returns %true if input power source is connected. Note that this is</div><div class='ctx'>  * dependent on what platform has configured for usable power sources. For</div><div class='del'>- * example if USB is disabled, this will return %false even if the USB</div><div class='del'>- * cable is connected.</div><div class='add'>+ * example if USB is disabled, this will return %false even if the USB cable</div><div class='add'>+ * is connected.</div><div class='ctx'>  */</div><div class='del'>-static bool smb347_is_online(struct smb347_charger *smb)</div><div class='add'>+static bool smb347_is_ps_online(struct smb347_charger *smb)</div><div class='ctx'> {</div><div class='ctx'> 	bool ret;</div><div class='ctx'> </div><div class='hunk'>@@ -299,16 +273,17 @@ static bool smb347_is_online(struct smb347_charger *smb)</div><div class='ctx'>  */</div><div class='ctx'> static int smb347_charging_status(struct smb347_charger *smb)</div><div class='ctx'> {</div><div class='add'>+	unsigned int val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!smb347_is_online(smb))</div><div class='add'>+	if (!smb347_is_ps_online(smb))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = smb347_read(smb, STAT_C);</div><div class='add'>+	ret = regmap_read(smb-&gt;regmap, STAT_C, &amp;val);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return (ret &amp; STAT_C_CHG_MASK) &gt;&gt; STAT_C_CHG_SHIFT;</div><div class='add'>+	return (val &amp; STAT_C_CHG_MASK) &gt;&gt; STAT_C_CHG_SHIFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int smb347_charging_set(struct smb347_charger *smb, bool enable)</div><div class='hunk'>@@ -316,27 +291,17 @@ static int smb347_charging_set(struct smb347_charger *smb, bool enable)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (smb-&gt;pdata-&gt;enable_control != SMB347_CHG_ENABLE_SW) {</div><div class='del'>-		dev_dbg(&amp;smb-&gt;client-&gt;dev,</div><div class='del'>-			"charging enable/disable in SW disabled\n");</div><div class='add'>+		dev_dbg(smb-&gt;dev, "charging enable/disable in SW disabled\n");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;smb-&gt;lock);</div><div class='ctx'> 	if (smb-&gt;charging_enabled != enable) {</div><div class='del'>-		ret = smb347_read(smb, CMD_A);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		smb-&gt;charging_enabled = enable;</div><div class='del'>-</div><div class='del'>-		if (enable)</div><div class='del'>-			ret |= CMD_A_CHG_ENABLED;</div><div class='del'>-		else</div><div class='del'>-			ret &amp;= ~CMD_A_CHG_ENABLED;</div><div class='del'>-</div><div class='del'>-		ret = smb347_write(smb, CMD_A, ret);</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CMD_A, CMD_A_CHG_ENABLED,</div><div class='add'>+					 enable ? CMD_A_CHG_ENABLED : 0);</div><div class='add'>+		if (!ret)</div><div class='add'>+			smb-&gt;charging_enabled = enable;</div><div class='ctx'> 	}</div><div class='del'>-out:</div><div class='ctx'> 	mutex_unlock(&amp;smb-&gt;lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -351,7 +316,7 @@ static inline int smb347_charging_disable(struct smb347_charger *smb)</div><div class='ctx'> 	return smb347_charging_set(smb, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int smb347_update_online(struct smb347_charger *smb)</div><div class='add'>+static int smb347_start_stop_charging(struct smb347_charger *smb)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -360,16 +325,14 @@ static int smb347_update_online(struct smb347_charger *smb)</div><div class='ctx'> 	 * disable or enable the charging. We do it manually because it</div><div class='ctx'> 	 * depends on how the platform has configured the valid inputs.</div><div class='ctx'> 	 */</div><div class='del'>-	if (smb347_is_online(smb)) {</div><div class='add'>+	if (smb347_is_ps_online(smb)) {</div><div class='ctx'> 		ret = smb347_charging_enable(smb);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			dev_err(&amp;smb-&gt;client-&gt;dev,</div><div class='del'>-				"failed to enable charging\n");</div><div class='add'>+			dev_err(smb-&gt;dev, "failed to enable charging\n");</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ret = smb347_charging_disable(smb);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			dev_err(&amp;smb-&gt;client-&gt;dev,</div><div class='del'>-				"failed to disable charging\n");</div><div class='add'>+			dev_err(smb-&gt;dev, "failed to disable charging\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -377,112 +340,120 @@ static int smb347_update_online(struct smb347_charger *smb)</div><div class='ctx'> </div><div class='ctx'> static int smb347_set_charge_current(struct smb347_charger *smb)</div><div class='ctx'> {</div><div class='del'>-	int ret, val;</div><div class='del'>-</div><div class='del'>-	ret = smb347_read(smb, CFG_CHARGE_CURRENT);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (smb-&gt;pdata-&gt;max_charge_current) {</div><div class='del'>-		val = current_to_hw(fcc_tbl, ARRAY_SIZE(fcc_tbl),</div><div class='add'>+		ret = current_to_hw(fcc_tbl, ARRAY_SIZE(fcc_tbl),</div><div class='ctx'> 				    smb-&gt;pdata-&gt;max_charge_current);</div><div class='del'>-		if (val &lt; 0)</div><div class='del'>-			return val;</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-		ret &amp;= ~CFG_CHARGE_CURRENT_FCC_MASK;</div><div class='del'>-		ret |= val &lt;&lt; CFG_CHARGE_CURRENT_FCC_SHIFT;</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_CHARGE_CURRENT,</div><div class='add'>+					 CFG_CHARGE_CURRENT_FCC_MASK,</div><div class='add'>+					 ret &lt;&lt; CFG_CHARGE_CURRENT_FCC_SHIFT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (smb-&gt;pdata-&gt;pre_charge_current) {</div><div class='del'>-		val = current_to_hw(pcc_tbl, ARRAY_SIZE(pcc_tbl),</div><div class='add'>+		ret = current_to_hw(pcc_tbl, ARRAY_SIZE(pcc_tbl),</div><div class='ctx'> 				    smb-&gt;pdata-&gt;pre_charge_current);</div><div class='del'>-		if (val &lt; 0)</div><div class='del'>-			return val;</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-		ret &amp;= ~CFG_CHARGE_CURRENT_PCC_MASK;</div><div class='del'>-		ret |= val &lt;&lt; CFG_CHARGE_CURRENT_PCC_SHIFT;</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_CHARGE_CURRENT,</div><div class='add'>+					 CFG_CHARGE_CURRENT_PCC_MASK,</div><div class='add'>+					 ret &lt;&lt; CFG_CHARGE_CURRENT_PCC_SHIFT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (smb-&gt;pdata-&gt;termination_current) {</div><div class='del'>-		val = current_to_hw(tc_tbl, ARRAY_SIZE(tc_tbl),</div><div class='add'>+		ret = current_to_hw(tc_tbl, ARRAY_SIZE(tc_tbl),</div><div class='ctx'> 				    smb-&gt;pdata-&gt;termination_current);</div><div class='del'>-		if (val &lt; 0)</div><div class='del'>-			return val;</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-		ret &amp;= ~CFG_CHARGE_CURRENT_TC_MASK;</div><div class='del'>-		ret |= val;</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_CHARGE_CURRENT,</div><div class='add'>+					 CFG_CHARGE_CURRENT_TC_MASK, ret);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return smb347_write(smb, CFG_CHARGE_CURRENT, ret);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int smb347_set_current_limits(struct smb347_charger *smb)</div><div class='ctx'> {</div><div class='del'>-	int ret, val;</div><div class='del'>-</div><div class='del'>-	ret = smb347_read(smb, CFG_CURRENT_LIMIT);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (smb-&gt;pdata-&gt;mains_current_limit) {</div><div class='del'>-		val = current_to_hw(icl_tbl, ARRAY_SIZE(icl_tbl),</div><div class='add'>+		ret = current_to_hw(icl_tbl, ARRAY_SIZE(icl_tbl),</div><div class='ctx'> 				    smb-&gt;pdata-&gt;mains_current_limit);</div><div class='del'>-		if (val &lt; 0)</div><div class='del'>-			return val;</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-		ret &amp;= ~CFG_CURRENT_LIMIT_DC_MASK;</div><div class='del'>-		ret |= val &lt;&lt; CFG_CURRENT_LIMIT_DC_SHIFT;</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_CURRENT_LIMIT,</div><div class='add'>+					 CFG_CURRENT_LIMIT_DC_MASK,</div><div class='add'>+					 ret &lt;&lt; CFG_CURRENT_LIMIT_DC_SHIFT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (smb-&gt;pdata-&gt;usb_hc_current_limit) {</div><div class='del'>-		val = current_to_hw(icl_tbl, ARRAY_SIZE(icl_tbl),</div><div class='add'>+		ret = current_to_hw(icl_tbl, ARRAY_SIZE(icl_tbl),</div><div class='ctx'> 				    smb-&gt;pdata-&gt;usb_hc_current_limit);</div><div class='del'>-		if (val &lt; 0)</div><div class='del'>-			return val;</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-		ret &amp;= ~CFG_CURRENT_LIMIT_USB_MASK;</div><div class='del'>-		ret |= val;</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_CURRENT_LIMIT,</div><div class='add'>+					 CFG_CURRENT_LIMIT_USB_MASK, ret);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return smb347_write(smb, CFG_CURRENT_LIMIT, ret);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int smb347_set_voltage_limits(struct smb347_charger *smb)</div><div class='ctx'> {</div><div class='del'>-	int ret, val;</div><div class='del'>-</div><div class='del'>-	ret = smb347_read(smb, CFG_FLOAT_VOLTAGE);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (smb-&gt;pdata-&gt;pre_to_fast_voltage) {</div><div class='del'>-		val = smb-&gt;pdata-&gt;pre_to_fast_voltage;</div><div class='add'>+		ret = smb-&gt;pdata-&gt;pre_to_fast_voltage;</div><div class='ctx'> </div><div class='ctx'> 		/* uV */</div><div class='del'>-		val = clamp_val(val, 2400000, 3000000) - 2400000;</div><div class='del'>-		val /= 200000;</div><div class='add'>+		ret = clamp_val(ret, 2400000, 3000000) - 2400000;</div><div class='add'>+		ret /= 200000;</div><div class='ctx'> </div><div class='del'>-		ret &amp;= ~CFG_FLOAT_VOLTAGE_THRESHOLD_MASK;</div><div class='del'>-		ret |= val &lt;&lt; CFG_FLOAT_VOLTAGE_THRESHOLD_SHIFT;</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_FLOAT_VOLTAGE,</div><div class='add'>+				CFG_FLOAT_VOLTAGE_THRESHOLD_MASK,</div><div class='add'>+				ret &lt;&lt; CFG_FLOAT_VOLTAGE_THRESHOLD_SHIFT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (smb-&gt;pdata-&gt;max_charge_voltage) {</div><div class='del'>-		val = smb-&gt;pdata-&gt;max_charge_voltage;</div><div class='add'>+		ret = smb-&gt;pdata-&gt;max_charge_voltage;</div><div class='ctx'> </div><div class='ctx'> 		/* uV */</div><div class='del'>-		val = clamp_val(val, 3500000, 4500000) - 3500000;</div><div class='del'>-		val /= 20000;</div><div class='add'>+		ret = clamp_val(ret, 3500000, 4500000) - 3500000;</div><div class='add'>+		ret /= 20000;</div><div class='ctx'> </div><div class='del'>-		ret |= val;</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_FLOAT_VOLTAGE,</div><div class='add'>+					 CFG_FLOAT_VOLTAGE_FLOAT_MASK, ret);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return smb347_write(smb, CFG_FLOAT_VOLTAGE, ret);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int smb347_set_temp_limits(struct smb347_charger *smb)</div><div class='ctx'> {</div><div class='ctx'> 	bool enable_therm_monitor = false;</div><div class='del'>-	int ret, val;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int val;</div><div class='ctx'> </div><div class='ctx'> 	if (smb-&gt;pdata-&gt;chip_temp_threshold) {</div><div class='ctx'> 		val = smb-&gt;pdata-&gt;chip_temp_threshold;</div><div class='hunk'>@@ -491,22 +462,13 @@ static int smb347_set_temp_limits(struct smb347_charger *smb)</div><div class='ctx'> 		val = clamp_val(val, 100, 130) - 100;</div><div class='ctx'> 		val /= 10;</div><div class='ctx'> </div><div class='del'>-		ret = smb347_read(smb, CFG_OTG);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ret &amp;= ~CFG_OTG_TEMP_THRESHOLD_MASK;</div><div class='del'>-		ret |= val &lt;&lt; CFG_OTG_TEMP_THRESHOLD_SHIFT;</div><div class='del'>-</div><div class='del'>-		ret = smb347_write(smb, CFG_OTG, ret);</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_OTG,</div><div class='add'>+					 CFG_OTG_TEMP_THRESHOLD_MASK,</div><div class='add'>+					 val &lt;&lt; CFG_OTG_TEMP_THRESHOLD_SHIFT);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = smb347_read(smb, CFG_TEMP_LIMIT);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='ctx'> 	if (smb-&gt;pdata-&gt;soft_cold_temp_limit != SMB347_TEMP_USE_DEFAULT) {</div><div class='ctx'> 		val = smb-&gt;pdata-&gt;soft_cold_temp_limit;</div><div class='ctx'> </div><div class='hunk'>@@ -515,8 +477,11 @@ static int smb347_set_temp_limits(struct smb347_charger *smb)</div><div class='ctx'> 		/* this goes from higher to lower so invert the value */</div><div class='ctx'> 		val = ~val &amp; 0x3;</div><div class='ctx'> </div><div class='del'>-		ret &amp;= ~CFG_TEMP_LIMIT_SOFT_COLD_MASK;</div><div class='del'>-		ret |= val &lt;&lt; CFG_TEMP_LIMIT_SOFT_COLD_SHIFT;</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_TEMP_LIMIT,</div><div class='add'>+					 CFG_TEMP_LIMIT_SOFT_COLD_MASK,</div><div class='add'>+					 val &lt;&lt; CFG_TEMP_LIMIT_SOFT_COLD_SHIFT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		enable_therm_monitor = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -527,8 +492,11 @@ static int smb347_set_temp_limits(struct smb347_charger *smb)</div><div class='ctx'> 		val = clamp_val(val, 40, 55) - 40;</div><div class='ctx'> 		val /= 5;</div><div class='ctx'> </div><div class='del'>-		ret &amp;= ~CFG_TEMP_LIMIT_SOFT_HOT_MASK;</div><div class='del'>-		ret |= val &lt;&lt; CFG_TEMP_LIMIT_SOFT_HOT_SHIFT;</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_TEMP_LIMIT,</div><div class='add'>+					 CFG_TEMP_LIMIT_SOFT_HOT_MASK,</div><div class='add'>+					 val &lt;&lt; CFG_TEMP_LIMIT_SOFT_HOT_SHIFT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		enable_therm_monitor = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -541,8 +509,11 @@ static int smb347_set_temp_limits(struct smb347_charger *smb)</div><div class='ctx'> 		/* this goes from higher to lower so invert the value */</div><div class='ctx'> 		val = ~val &amp; 0x3;</div><div class='ctx'> </div><div class='del'>-		ret &amp;= ~CFG_TEMP_LIMIT_HARD_COLD_MASK;</div><div class='del'>-		ret |= val &lt;&lt; CFG_TEMP_LIMIT_HARD_COLD_SHIFT;</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_TEMP_LIMIT,</div><div class='add'>+					 CFG_TEMP_LIMIT_HARD_COLD_MASK,</div><div class='add'>+					 val &lt;&lt; CFG_TEMP_LIMIT_HARD_COLD_SHIFT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		enable_therm_monitor = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -553,16 +524,15 @@ static int smb347_set_temp_limits(struct smb347_charger *smb)</div><div class='ctx'> 		val = clamp_val(val, 50, 65) - 50;</div><div class='ctx'> 		val /= 5;</div><div class='ctx'> </div><div class='del'>-		ret &amp;= ~CFG_TEMP_LIMIT_HARD_HOT_MASK;</div><div class='del'>-		ret |= val &lt;&lt; CFG_TEMP_LIMIT_HARD_HOT_SHIFT;</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_TEMP_LIMIT,</div><div class='add'>+					 CFG_TEMP_LIMIT_HARD_HOT_MASK,</div><div class='add'>+					 val &lt;&lt; CFG_TEMP_LIMIT_HARD_HOT_SHIFT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		enable_therm_monitor = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = smb347_write(smb, CFG_TEMP_LIMIT, ret);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If any of the temperature limits are set, we also enable the</div><div class='ctx'> 	 * thermistor monitoring.</div><div class='hunk'>@@ -574,25 +544,15 @@ static int smb347_set_temp_limits(struct smb347_charger *smb)</div><div class='ctx'> 	 * depending on the configuration.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (enable_therm_monitor) {</div><div class='del'>-		ret = smb347_read(smb, CFG_THERM);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ret &amp;= ~CFG_THERM_MONITOR_DISABLED;</div><div class='del'>-</div><div class='del'>-		ret = smb347_write(smb, CFG_THERM, ret);</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_THERM,</div><div class='add'>+					 CFG_THERM_MONITOR_DISABLED, 0);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (smb-&gt;pdata-&gt;suspend_on_hard_temp_limit) {</div><div class='del'>-		ret = smb347_read(smb, CFG_SYSOK);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ret &amp;= ~CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED;</div><div class='del'>-</div><div class='del'>-		ret = smb347_write(smb, CFG_SYSOK, ret);</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_SYSOK,</div><div class='add'>+				 CFG_SYSOK_SUSPEND_HARD_LIMIT_DISABLED, 0);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -601,17 +561,15 @@ static int smb347_set_temp_limits(struct smb347_charger *smb)</div><div class='ctx'> 	    SMB347_SOFT_TEMP_COMPENSATE_DEFAULT) {</div><div class='ctx'> 		val = smb-&gt;pdata-&gt;soft_temp_limit_compensation &amp; 0x3;</div><div class='ctx'> </div><div class='del'>-		ret = smb347_read(smb, CFG_THERM);</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_THERM,</div><div class='add'>+				 CFG_THERM_SOFT_HOT_COMPENSATION_MASK,</div><div class='add'>+				 val &lt;&lt; CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		ret &amp;= ~CFG_THERM_SOFT_HOT_COMPENSATION_MASK;</div><div class='del'>-		ret |= val &lt;&lt; CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT;</div><div class='del'>-</div><div class='del'>-		ret &amp;= ~CFG_THERM_SOFT_COLD_COMPENSATION_MASK;</div><div class='del'>-		ret |= val &lt;&lt; CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT;</div><div class='del'>-</div><div class='del'>-		ret = smb347_write(smb, CFG_THERM, ret);</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_THERM,</div><div class='add'>+				 CFG_THERM_SOFT_COLD_COMPENSATION_MASK,</div><div class='add'>+				 val &lt;&lt; CFG_THERM_SOFT_COLD_COMPENSATION_SHIFT);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -622,14 +580,9 @@ static int smb347_set_temp_limits(struct smb347_charger *smb)</div><div class='ctx'> 		if (val &lt; 0)</div><div class='ctx'> 			return val;</div><div class='ctx'> </div><div class='del'>-		ret = smb347_read(smb, CFG_OTG);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ret &amp;= ~CFG_OTG_CC_COMPENSATION_MASK;</div><div class='del'>-		ret |= (val &amp; 0x3) &lt;&lt; CFG_OTG_CC_COMPENSATION_SHIFT;</div><div class='del'>-</div><div class='del'>-		ret = smb347_write(smb, CFG_OTG, ret);</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CFG_OTG,</div><div class='add'>+				CFG_OTG_CC_COMPENSATION_MASK,</div><div class='add'>+				(val &amp; 0x3) &lt;&lt; CFG_OTG_CC_COMPENSATION_SHIFT);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -648,22 +601,13 @@ static int smb347_set_temp_limits(struct smb347_charger *smb)</div><div class='ctx'>  */</div><div class='ctx'> static int smb347_set_writable(struct smb347_charger *smb, bool writable)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = smb347_read(smb, CMD_A);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (writable)</div><div class='del'>-		ret |= CMD_A_ALLOW_WRITE;</div><div class='del'>-	else</div><div class='del'>-		ret &amp;= ~CMD_A_ALLOW_WRITE;</div><div class='del'>-</div><div class='del'>-	return smb347_write(smb, CMD_A, ret);</div><div class='add'>+	return regmap_update_bits(smb-&gt;regmap, CMD_A, CMD_A_ALLOW_WRITE,</div><div class='add'>+				  writable ? CMD_A_ALLOW_WRITE : 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int smb347_hw_init(struct smb347_charger *smb)</div><div class='ctx'> {</div><div class='add'>+	unsigned int val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = smb347_set_writable(smb, true);</div><div class='hunk'>@@ -692,34 +636,19 @@ static int smb347_hw_init(struct smb347_charger *smb)</div><div class='ctx'> </div><div class='ctx'> 	/* If USB charging is disabled we put the USB in suspend mode */</div><div class='ctx'> 	if (!smb-&gt;pdata-&gt;use_usb) {</div><div class='del'>-		ret = smb347_read(smb, CMD_A);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto fail;</div><div class='del'>-</div><div class='del'>-		ret |= CMD_A_SUSPEND_ENABLED;</div><div class='del'>-</div><div class='del'>-		ret = smb347_write(smb, CMD_A, ret);</div><div class='add'>+		ret = regmap_update_bits(smb-&gt;regmap, CMD_A,</div><div class='add'>+					 CMD_A_SUSPEND_ENABLED,</div><div class='add'>+					 CMD_A_SUSPEND_ENABLED);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = smb347_read(smb, CFG_OTHER);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If configured by platform data, we enable hardware Auto-OTG</div><div class='ctx'> 	 * support for driving VBUS. Otherwise we disable it.</div><div class='ctx'> 	 */</div><div class='del'>-	ret &amp;= ~CFG_OTHER_RID_MASK;</div><div class='del'>-	if (smb-&gt;pdata-&gt;use_usb_otg)</div><div class='del'>-		ret |= CFG_OTHER_RID_ENABLED_AUTO_OTG;</div><div class='del'>-</div><div class='del'>-	ret = smb347_write(smb, CFG_OTHER, ret);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	ret = smb347_read(smb, CFG_PIN);</div><div class='add'>+	ret = regmap_update_bits(smb-&gt;regmap, CFG_OTHER, CFG_OTHER_RID_MASK,</div><div class='add'>+		smb-&gt;pdata-&gt;use_usb_otg ? CFG_OTHER_RID_ENABLED_AUTO_OTG : 0);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='hunk'>@@ -728,32 +657,33 @@ static int smb347_hw_init(struct smb347_charger *smb)</div><div class='ctx'> 	 * command register unless pin control is specified in the platform</div><div class='ctx'> 	 * data.</div><div class='ctx'> 	 */</div><div class='del'>-	ret &amp;= ~CFG_PIN_EN_CTRL_MASK;</div><div class='del'>-</div><div class='ctx'> 	switch (smb-&gt;pdata-&gt;enable_control) {</div><div class='del'>-	case SMB347_CHG_ENABLE_SW:</div><div class='del'>-		/* Do nothing, 0 means i2c control */</div><div class='del'>-		break;</div><div class='ctx'> 	case SMB347_CHG_ENABLE_PIN_ACTIVE_LOW:</div><div class='del'>-		ret |= CFG_PIN_EN_CTRL_ACTIVE_LOW;</div><div class='add'>+		val = CFG_PIN_EN_CTRL_ACTIVE_LOW;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SMB347_CHG_ENABLE_PIN_ACTIVE_HIGH:</div><div class='del'>-		ret |= CFG_PIN_EN_CTRL_ACTIVE_HIGH;</div><div class='add'>+		val = CFG_PIN_EN_CTRL_ACTIVE_HIGH;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		val = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Disable Automatic Power Source Detection (APSD) interrupt. */</div><div class='del'>-	ret &amp;= ~CFG_PIN_EN_APSD_IRQ;</div><div class='add'>+	ret = regmap_update_bits(smb-&gt;regmap, CFG_PIN, CFG_PIN_EN_CTRL_MASK,</div><div class='add'>+				 val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto fail;</div><div class='ctx'> </div><div class='del'>-	ret = smb347_write(smb, CFG_PIN, ret);</div><div class='add'>+	/* Disable Automatic Power Source Detection (APSD) interrupt. */</div><div class='add'>+	ret = regmap_update_bits(smb-&gt;regmap, CFG_PIN, CFG_PIN_EN_APSD_IRQ, 0);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='del'>-	ret = smb347_update_status(smb);</div><div class='add'>+	ret = smb347_update_ps_status(smb);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='del'>-	ret = smb347_update_online(smb);</div><div class='add'>+	ret = smb347_start_stop_charging(smb);</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='ctx'> 	smb347_set_writable(smb, false);</div><div class='hunk'>@@ -763,24 +693,25 @@ fail:</div><div class='ctx'> static irqreturn_t smb347_interrupt(int irq, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct smb347_charger *smb = data;</div><div class='del'>-	int stat_c, irqstat_e, irqstat_c;</div><div class='del'>-	irqreturn_t ret = IRQ_NONE;</div><div class='add'>+	unsigned int stat_c, irqstat_e, irqstat_c;</div><div class='add'>+	bool handled = false;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	stat_c = smb347_read(smb, STAT_C);</div><div class='del'>-	if (stat_c &lt; 0) {</div><div class='del'>-		dev_warn(&amp;smb-&gt;client-&gt;dev, "reading STAT_C failed\n");</div><div class='add'>+	ret = regmap_read(smb-&gt;regmap, STAT_C, &amp;stat_c);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_warn(smb-&gt;dev, "reading STAT_C failed\n");</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irqstat_c = smb347_read(smb, IRQSTAT_C);</div><div class='del'>-	if (irqstat_c &lt; 0) {</div><div class='del'>-		dev_warn(&amp;smb-&gt;client-&gt;dev, "reading IRQSTAT_C failed\n");</div><div class='add'>+	ret = regmap_read(smb-&gt;regmap, IRQSTAT_C, &amp;irqstat_c);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_warn(smb-&gt;dev, "reading IRQSTAT_C failed\n");</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irqstat_e = smb347_read(smb, IRQSTAT_E);</div><div class='del'>-	if (irqstat_e &lt; 0) {</div><div class='del'>-		dev_warn(&amp;smb-&gt;client-&gt;dev, "reading IRQSTAT_E failed\n");</div><div class='add'>+	ret = regmap_read(smb-&gt;regmap, IRQSTAT_E, &amp;irqstat_e);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_warn(smb-&gt;dev, "reading IRQSTAT_E failed\n");</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -789,13 +720,11 @@ static irqreturn_t smb347_interrupt(int irq, void *data)</div><div class='ctx'> 	 * disable charging.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (stat_c &amp; STAT_C_CHARGER_ERROR) {</div><div class='del'>-		dev_err(&amp;smb-&gt;client-&gt;dev,</div><div class='del'>-			"error in charger, disabling charging\n");</div><div class='add'>+		dev_err(smb-&gt;dev, "error in charger, disabling charging\n");</div><div class='ctx'> </div><div class='ctx'> 		smb347_charging_disable(smb);</div><div class='ctx'> 		power_supply_changed(&amp;smb-&gt;battery);</div><div class='del'>-</div><div class='del'>-		ret = IRQ_HANDLED;</div><div class='add'>+		handled = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -806,7 +735,7 @@ static irqreturn_t smb347_interrupt(int irq, void *data)</div><div class='ctx'> 	if (irqstat_c &amp; (IRQSTAT_C_TERMINATION_IRQ | IRQSTAT_C_TAPER_IRQ)) {</div><div class='ctx'> 		if (irqstat_c &amp; IRQSTAT_C_TERMINATION_STAT)</div><div class='ctx'> 			power_supply_changed(&amp;smb-&gt;battery);</div><div class='del'>-		ret = IRQ_HANDLED;</div><div class='add'>+		handled = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -814,15 +743,17 @@ static irqreturn_t smb347_interrupt(int irq, void *data)</div><div class='ctx'> 	 * was connected or disconnected.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (irqstat_e &amp; (IRQSTAT_E_USBIN_UV_IRQ | IRQSTAT_E_DCIN_UV_IRQ)) {</div><div class='del'>-		if (smb347_update_status(smb) &gt; 0) {</div><div class='del'>-			smb347_update_online(smb);</div><div class='del'>-			power_supply_changed(&amp;smb-&gt;mains);</div><div class='del'>-			power_supply_changed(&amp;smb-&gt;usb);</div><div class='add'>+		if (smb347_update_ps_status(smb) &gt; 0) {</div><div class='add'>+			smb347_start_stop_charging(smb);</div><div class='add'>+			if (smb-&gt;pdata-&gt;use_mains)</div><div class='add'>+				power_supply_changed(&amp;smb-&gt;mains);</div><div class='add'>+			if (smb-&gt;pdata-&gt;use_usb)</div><div class='add'>+				power_supply_changed(&amp;smb-&gt;usb);</div><div class='ctx'> 		}</div><div class='del'>-		ret = IRQ_HANDLED;</div><div class='add'>+		handled = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return handled ? IRQ_HANDLED : IRQ_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int smb347_irq_set(struct smb347_charger *smb, bool enable)</div><div class='hunk'>@@ -839,41 +770,18 @@ static int smb347_irq_set(struct smb347_charger *smb, bool enable)</div><div class='ctx'> 	 *	- termination current reached</div><div class='ctx'> 	 *	- charger error</div><div class='ctx'> 	 */</div><div class='del'>-	if (enable) {</div><div class='del'>-		ret = smb347_write(smb, CFG_FAULT_IRQ, CFG_FAULT_IRQ_DCIN_UV);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto fail;</div><div class='del'>-</div><div class='del'>-		ret = smb347_write(smb, CFG_STATUS_IRQ,</div><div class='del'>-				   CFG_STATUS_IRQ_TERMINATION_OR_TAPER);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto fail;</div><div class='del'>-</div><div class='del'>-		ret = smb347_read(smb, CFG_PIN);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto fail;</div><div class='del'>-</div><div class='del'>-		ret |= CFG_PIN_EN_CHARGER_ERROR;</div><div class='del'>-</div><div class='del'>-		ret = smb347_write(smb, CFG_PIN, ret);</div><div class='del'>-	} else {</div><div class='del'>-		ret = smb347_write(smb, CFG_FAULT_IRQ, 0);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto fail;</div><div class='del'>-</div><div class='del'>-		ret = smb347_write(smb, CFG_STATUS_IRQ, 0);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto fail;</div><div class='del'>-</div><div class='del'>-		ret = smb347_read(smb, CFG_PIN);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto fail;</div><div class='del'>-</div><div class='del'>-		ret &amp;= ~CFG_PIN_EN_CHARGER_ERROR;</div><div class='add'>+	ret = regmap_update_bits(smb-&gt;regmap, CFG_FAULT_IRQ, 0xff,</div><div class='add'>+				 enable ? CFG_FAULT_IRQ_DCIN_UV : 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto fail;</div><div class='ctx'> </div><div class='del'>-		ret = smb347_write(smb, CFG_PIN, ret);</div><div class='del'>-	}</div><div class='add'>+	ret = regmap_update_bits(smb-&gt;regmap, CFG_STATUS_IRQ, 0xff,</div><div class='add'>+			enable ? CFG_STATUS_IRQ_TERMINATION_OR_TAPER : 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto fail;</div><div class='ctx'> </div><div class='add'>+	ret = regmap_update_bits(smb-&gt;regmap, CFG_PIN, CFG_PIN_EN_CHARGER_ERROR,</div><div class='add'>+				 enable ? CFG_PIN_EN_CHARGER_ERROR : 0);</div><div class='ctx'> fail:</div><div class='ctx'> 	smb347_set_writable(smb, false);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -889,18 +797,18 @@ static inline int smb347_irq_disable(struct smb347_charger *smb)</div><div class='ctx'> 	return smb347_irq_set(smb, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int smb347_irq_init(struct smb347_charger *smb)</div><div class='add'>+static int smb347_irq_init(struct smb347_charger *smb,</div><div class='add'>+			   struct i2c_client *client)</div><div class='ctx'> {</div><div class='ctx'> 	const struct smb347_charger_platform_data *pdata = smb-&gt;pdata;</div><div class='ctx'> 	int ret, irq = gpio_to_irq(pdata-&gt;irq_gpio);</div><div class='ctx'> </div><div class='del'>-	ret = gpio_request_one(pdata-&gt;irq_gpio, GPIOF_IN, smb-&gt;client-&gt;name);</div><div class='add'>+	ret = gpio_request_one(pdata-&gt;irq_gpio, GPIOF_IN, client-&gt;name);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='ctx'> 	ret = request_threaded_irq(irq, NULL, smb347_interrupt,</div><div class='del'>-				   IRQF_TRIGGER_FALLING, smb-&gt;client-&gt;name,</div><div class='del'>-				   smb);</div><div class='add'>+				   IRQF_TRIGGER_FALLING, client-&gt;name, smb);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto fail_gpio;</div><div class='ctx'> </div><div class='hunk'>@@ -912,23 +820,14 @@ static int smb347_irq_init(struct smb347_charger *smb)</div><div class='ctx'> 	 * Configure the STAT output to be suitable for interrupts: disable</div><div class='ctx'> 	 * all other output (except interrupts) and make it active low.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = smb347_read(smb, CFG_STAT);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto fail_readonly;</div><div class='del'>-</div><div class='del'>-	ret &amp;= ~CFG_STAT_ACTIVE_HIGH;</div><div class='del'>-	ret |= CFG_STAT_DISABLED;</div><div class='del'>-</div><div class='del'>-	ret = smb347_write(smb, CFG_STAT, ret);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto fail_readonly;</div><div class='del'>-</div><div class='del'>-	ret = smb347_irq_enable(smb);</div><div class='add'>+	ret = regmap_update_bits(smb-&gt;regmap, CFG_STAT,</div><div class='add'>+				 CFG_STAT_ACTIVE_HIGH | CFG_STAT_DISABLED,</div><div class='add'>+				 CFG_STAT_DISABLED);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto fail_readonly;</div><div class='ctx'> </div><div class='ctx'> 	smb347_set_writable(smb, false);</div><div class='del'>-	smb-&gt;client-&gt;irq = irq;</div><div class='add'>+	client-&gt;irq = irq;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> fail_readonly:</div><div class='hunk'>@@ -938,7 +837,7 @@ fail_irq:</div><div class='ctx'> fail_gpio:</div><div class='ctx'> 	gpio_free(pdata-&gt;irq_gpio);</div><div class='ctx'> fail:</div><div class='del'>-	smb-&gt;client-&gt;irq = 0;</div><div class='add'>+	client-&gt;irq = 0;</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -987,13 +886,13 @@ static int smb347_battery_get_property(struct power_supply *psy,</div><div class='ctx'> 	const struct smb347_charger_platform_data *pdata = smb-&gt;pdata;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = smb347_update_status(smb);</div><div class='add'>+	ret = smb347_update_ps_status(smb);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	switch (prop) {</div><div class='ctx'> 	case POWER_SUPPLY_PROP_STATUS:</div><div class='del'>-		if (!smb347_is_online(smb)) {</div><div class='add'>+		if (!smb347_is_ps_online(smb)) {</div><div class='ctx'> 			val-&gt;intval = POWER_SUPPLY_STATUS_DISCHARGING;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1004,7 +903,7 @@ static int smb347_battery_get_property(struct power_supply *psy,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case POWER_SUPPLY_PROP_CHARGE_TYPE:</div><div class='del'>-		if (!smb347_is_online(smb))</div><div class='add'>+		if (!smb347_is_ps_online(smb))</div><div class='ctx'> 			return -ENODATA;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1036,44 +935,6 @@ static int smb347_battery_get_property(struct power_supply *psy,</div><div class='ctx'> 		val-&gt;intval = pdata-&gt;battery_info.voltage_max_design;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case POWER_SUPPLY_PROP_VOLTAGE_NOW:</div><div class='del'>-		if (!smb347_is_online(smb))</div><div class='del'>-			return -ENODATA;</div><div class='del'>-		ret = smb347_read(smb, STAT_A);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ret &amp;= STAT_A_FLOAT_VOLTAGE_MASK;</div><div class='del'>-		if (ret &gt; 0x3d)</div><div class='del'>-			ret = 0x3d;</div><div class='del'>-</div><div class='del'>-		val-&gt;intval = 3500000 + ret * 20000;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case POWER_SUPPLY_PROP_CURRENT_NOW:</div><div class='del'>-		if (!smb347_is_online(smb))</div><div class='del'>-			return -ENODATA;</div><div class='del'>-</div><div class='del'>-		ret = smb347_read(smb, STAT_B);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * The current value is composition of FCC and PCC values</div><div class='del'>-		 * and we can detect which table to use from bit 5.</div><div class='del'>-		 */</div><div class='del'>-		if (ret &amp; 0x20) {</div><div class='del'>-			val-&gt;intval = hw_to_current(fcc_tbl,</div><div class='del'>-						    ARRAY_SIZE(fcc_tbl),</div><div class='del'>-						    ret &amp; 7);</div><div class='del'>-		} else {</div><div class='del'>-			ret &gt;&gt;= 3;</div><div class='del'>-			val-&gt;intval = hw_to_current(pcc_tbl,</div><div class='del'>-						    ARRAY_SIZE(pcc_tbl),</div><div class='del'>-						    ret &amp; 7);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-</div><div class='ctx'> 	case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:</div><div class='ctx'> 		val-&gt;intval = pdata-&gt;battery_info.charge_full_design;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1095,64 +956,58 @@ static enum power_supply_property smb347_battery_properties[] = {</div><div class='ctx'> 	POWER_SUPPLY_PROP_TECHNOLOGY,</div><div class='ctx'> 	POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,</div><div class='ctx'> 	POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,</div><div class='del'>-	POWER_SUPPLY_PROP_VOLTAGE_NOW,</div><div class='del'>-	POWER_SUPPLY_PROP_CURRENT_NOW,</div><div class='ctx'> 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,</div><div class='ctx'> 	POWER_SUPPLY_PROP_MODEL_NAME,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int smb347_debugfs_show(struct seq_file *s, void *data)</div><div class='add'>+static bool smb347_volatile_reg(struct device *dev, unsigned int reg)</div><div class='ctx'> {</div><div class='del'>-	struct smb347_charger *smb = s-&gt;private;</div><div class='del'>-	int ret;</div><div class='del'>-	u8 reg;</div><div class='del'>-</div><div class='del'>-	seq_printf(s, "Control registers:\n");</div><div class='del'>-	seq_printf(s, "==================\n");</div><div class='del'>-	for (reg = CFG_CHARGE_CURRENT; reg &lt;= CFG_ADDRESS; reg++) {</div><div class='del'>-		ret = smb347_read(smb, reg);</div><div class='del'>-		seq_printf(s, "0x%02x:\t0x%02x\n", reg, ret);</div><div class='del'>-	}</div><div class='del'>-	seq_printf(s, "\n");</div><div class='del'>-</div><div class='del'>-	seq_printf(s, "Command registers:\n");</div><div class='del'>-	seq_printf(s, "==================\n");</div><div class='del'>-	ret = smb347_read(smb, CMD_A);</div><div class='del'>-	seq_printf(s, "0x%02x:\t0x%02x\n", CMD_A, ret);</div><div class='del'>-	ret = smb347_read(smb, CMD_B);</div><div class='del'>-	seq_printf(s, "0x%02x:\t0x%02x\n", CMD_B, ret);</div><div class='del'>-	ret = smb347_read(smb, CMD_C);</div><div class='del'>-	seq_printf(s, "0x%02x:\t0x%02x\n", CMD_C, ret);</div><div class='del'>-	seq_printf(s, "\n");</div><div class='del'>-</div><div class='del'>-	seq_printf(s, "Interrupt status registers:\n");</div><div class='del'>-	seq_printf(s, "===========================\n");</div><div class='del'>-	for (reg = IRQSTAT_A; reg &lt;= IRQSTAT_F; reg++) {</div><div class='del'>-		ret = smb347_read(smb, reg);</div><div class='del'>-		seq_printf(s, "0x%02x:\t0x%02x\n", reg, ret);</div><div class='del'>-	}</div><div class='del'>-	seq_printf(s, "\n");</div><div class='del'>-</div><div class='del'>-	seq_printf(s, "Status registers:\n");</div><div class='del'>-	seq_printf(s, "=================\n");</div><div class='del'>-	for (reg = STAT_A; reg &lt;= STAT_E; reg++) {</div><div class='del'>-		ret = smb347_read(smb, reg);</div><div class='del'>-		seq_printf(s, "0x%02x:\t0x%02x\n", reg, ret);</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case IRQSTAT_A:</div><div class='add'>+	case IRQSTAT_C:</div><div class='add'>+	case IRQSTAT_E:</div><div class='add'>+	case IRQSTAT_F:</div><div class='add'>+	case STAT_A:</div><div class='add'>+	case STAT_B:</div><div class='add'>+	case STAT_C:</div><div class='add'>+	case STAT_E:</div><div class='add'>+		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int smb347_debugfs_open(struct inode *inode, struct file *file)</div><div class='add'>+static bool smb347_readable_reg(struct device *dev, unsigned int reg)</div><div class='ctx'> {</div><div class='del'>-	return single_open(file, smb347_debugfs_show, inode-&gt;i_private);</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case CFG_CHARGE_CURRENT:</div><div class='add'>+	case CFG_CURRENT_LIMIT:</div><div class='add'>+	case CFG_FLOAT_VOLTAGE:</div><div class='add'>+	case CFG_STAT:</div><div class='add'>+	case CFG_PIN:</div><div class='add'>+	case CFG_THERM:</div><div class='add'>+	case CFG_SYSOK:</div><div class='add'>+	case CFG_OTHER:</div><div class='add'>+	case CFG_OTG:</div><div class='add'>+	case CFG_TEMP_LIMIT:</div><div class='add'>+	case CFG_FAULT_IRQ:</div><div class='add'>+	case CFG_STATUS_IRQ:</div><div class='add'>+	case CFG_ADDRESS:</div><div class='add'>+	case CMD_A:</div><div class='add'>+	case CMD_B:</div><div class='add'>+	case CMD_C:</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return smb347_volatile_reg(dev, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct file_operations smb347_debugfs_fops = {</div><div class='del'>-	.open		= smb347_debugfs_open,</div><div class='del'>-	.read		= seq_read,</div><div class='del'>-	.llseek		= seq_lseek,</div><div class='del'>-	.release	= single_release,</div><div class='add'>+static const struct regmap_config smb347_regmap = {</div><div class='add'>+	.reg_bits	= 8,</div><div class='add'>+	.val_bits	= 8,</div><div class='add'>+	.max_register	= SMB347_MAX_REGISTER,</div><div class='add'>+	.volatile_reg	= smb347_volatile_reg,</div><div class='add'>+	.readable_reg	= smb347_readable_reg,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int smb347_probe(struct i2c_client *client,</div><div class='hunk'>@@ -1178,28 +1033,45 @@ static int smb347_probe(struct i2c_client *client,</div><div class='ctx'> 	i2c_set_clientdata(client, smb);</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;smb-&gt;lock);</div><div class='del'>-	smb-&gt;client = client;</div><div class='add'>+	smb-&gt;dev = &amp;client-&gt;dev;</div><div class='ctx'> 	smb-&gt;pdata = pdata;</div><div class='ctx'> </div><div class='add'>+	smb-&gt;regmap = devm_regmap_init_i2c(client, &amp;smb347_regmap);</div><div class='add'>+	if (IS_ERR(smb-&gt;regmap))</div><div class='add'>+		return PTR_ERR(smb-&gt;regmap);</div><div class='add'>+</div><div class='ctx'> 	ret = smb347_hw_init(smb);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	smb-&gt;mains.name = "smb347-mains";</div><div class='del'>-	smb-&gt;mains.type = POWER_SUPPLY_TYPE_MAINS;</div><div class='del'>-	smb-&gt;mains.get_property = smb347_mains_get_property;</div><div class='del'>-	smb-&gt;mains.properties = smb347_mains_properties;</div><div class='del'>-	smb-&gt;mains.num_properties = ARRAY_SIZE(smb347_mains_properties);</div><div class='del'>-	smb-&gt;mains.supplied_to = battery;</div><div class='del'>-	smb-&gt;mains.num_supplicants = ARRAY_SIZE(battery);</div><div class='del'>-</div><div class='del'>-	smb-&gt;usb.name = "smb347-usb";</div><div class='del'>-	smb-&gt;usb.type = POWER_SUPPLY_TYPE_USB;</div><div class='del'>-	smb-&gt;usb.get_property = smb347_usb_get_property;</div><div class='del'>-	smb-&gt;usb.properties = smb347_usb_properties;</div><div class='del'>-	smb-&gt;usb.num_properties = ARRAY_SIZE(smb347_usb_properties);</div><div class='del'>-	smb-&gt;usb.supplied_to = battery;</div><div class='del'>-	smb-&gt;usb.num_supplicants = ARRAY_SIZE(battery);</div><div class='add'>+	if (smb-&gt;pdata-&gt;use_mains) {</div><div class='add'>+		smb-&gt;mains.name = "smb347-mains";</div><div class='add'>+		smb-&gt;mains.type = POWER_SUPPLY_TYPE_MAINS;</div><div class='add'>+		smb-&gt;mains.get_property = smb347_mains_get_property;</div><div class='add'>+		smb-&gt;mains.properties = smb347_mains_properties;</div><div class='add'>+		smb-&gt;mains.num_properties = ARRAY_SIZE(smb347_mains_properties);</div><div class='add'>+		smb-&gt;mains.supplied_to = battery;</div><div class='add'>+		smb-&gt;mains.num_supplicants = ARRAY_SIZE(battery);</div><div class='add'>+		ret = power_supply_register(dev, &amp;smb-&gt;mains);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (smb-&gt;pdata-&gt;use_usb) {</div><div class='add'>+		smb-&gt;usb.name = "smb347-usb";</div><div class='add'>+		smb-&gt;usb.type = POWER_SUPPLY_TYPE_USB;</div><div class='add'>+		smb-&gt;usb.get_property = smb347_usb_get_property;</div><div class='add'>+		smb-&gt;usb.properties = smb347_usb_properties;</div><div class='add'>+		smb-&gt;usb.num_properties = ARRAY_SIZE(smb347_usb_properties);</div><div class='add'>+		smb-&gt;usb.supplied_to = battery;</div><div class='add'>+		smb-&gt;usb.num_supplicants = ARRAY_SIZE(battery);</div><div class='add'>+		ret = power_supply_register(dev, &amp;smb-&gt;usb);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			if (smb-&gt;pdata-&gt;use_mains)</div><div class='add'>+				power_supply_unregister(&amp;smb-&gt;mains);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	smb-&gt;battery.name = "smb347-battery";</div><div class='ctx'> 	smb-&gt;battery.type = POWER_SUPPLY_TYPE_BATTERY;</div><div class='hunk'>@@ -1207,20 +1079,13 @@ static int smb347_probe(struct i2c_client *client,</div><div class='ctx'> 	smb-&gt;battery.properties = smb347_battery_properties;</div><div class='ctx'> 	smb-&gt;battery.num_properties = ARRAY_SIZE(smb347_battery_properties);</div><div class='ctx'> </div><div class='del'>-	ret = power_supply_register(dev, &amp;smb-&gt;mains);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = power_supply_register(dev, &amp;smb-&gt;usb);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		power_supply_unregister(&amp;smb-&gt;mains);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ret = power_supply_register(dev, &amp;smb-&gt;battery);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		power_supply_unregister(&amp;smb-&gt;usb);</div><div class='del'>-		power_supply_unregister(&amp;smb-&gt;mains);</div><div class='add'>+		if (smb-&gt;pdata-&gt;use_usb)</div><div class='add'>+			power_supply_unregister(&amp;smb-&gt;usb);</div><div class='add'>+		if (smb-&gt;pdata-&gt;use_mains)</div><div class='add'>+			power_supply_unregister(&amp;smb-&gt;mains);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1229,15 +1094,15 @@ static int smb347_probe(struct i2c_client *client,</div><div class='ctx'> 	 * interrupt support here.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (pdata-&gt;irq_gpio &gt;= 0) {</div><div class='del'>-		ret = smb347_irq_init(smb);</div><div class='add'>+		ret = smb347_irq_init(smb, client);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			dev_warn(dev, "failed to initialize IRQ: %d\n", ret);</div><div class='ctx'> 			dev_warn(dev, "disabling IRQ support\n");</div><div class='add'>+		} else {</div><div class='add'>+			smb347_irq_enable(smb);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	smb-&gt;dentry = debugfs_create_file("smb347-regs", S_IRUSR, NULL, smb,</div><div class='del'>-					  &amp;smb347_debugfs_fops);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1245,9 +1110,6 @@ static int smb347_remove(struct i2c_client *client)</div><div class='ctx'> {</div><div class='ctx'> 	struct smb347_charger *smb = i2c_get_clientdata(client);</div><div class='ctx'> </div><div class='del'>-	if (!IS_ERR_OR_NULL(smb-&gt;dentry))</div><div class='del'>-		debugfs_remove(smb-&gt;dentry);</div><div class='del'>-</div><div class='ctx'> 	if (client-&gt;irq) {</div><div class='ctx'> 		smb347_irq_disable(smb);</div><div class='ctx'> 		free_irq(client-&gt;irq, smb);</div><div class='hunk'>@@ -1255,8 +1117,10 @@ static int smb347_remove(struct i2c_client *client)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	power_supply_unregister(&amp;smb-&gt;battery);</div><div class='del'>-	power_supply_unregister(&amp;smb-&gt;usb);</div><div class='del'>-	power_supply_unregister(&amp;smb-&gt;mains);</div><div class='add'>+	if (smb-&gt;pdata-&gt;use_usb)</div><div class='add'>+		power_supply_unregister(&amp;smb-&gt;usb);</div><div class='add'>+	if (smb-&gt;pdata-&gt;use_mains)</div><div class='add'>+		power_supply_unregister(&amp;smb-&gt;mains);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1275,17 +1139,7 @@ static struct i2c_driver smb347_driver = {</div><div class='ctx'> 	.id_table     = smb347_id,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init smb347_init(void)</div><div class='del'>-{</div><div class='del'>-	return i2c_add_driver(&amp;smb347_driver);</div><div class='del'>-}</div><div class='del'>-module_init(smb347_init);</div><div class='del'>-</div><div class='del'>-static void __exit smb347_exit(void)</div><div class='del'>-{</div><div class='del'>-	i2c_del_driver(&amp;smb347_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(smb347_exit);</div><div class='add'>+module_i2c_driver(smb347_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Bruce E. Robertson &lt;bruce.e.robertson@intel.com&gt;");</div><div class='ctx'> MODULE_AUTHOR("Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;");</div><div class='head'>diff --git a/drivers/power/wm831x_power.c b/drivers/power/wm831x_power.c<br/>index 987332b71d8d..fc1ad9551182 100644<br/>--- a/<a href='/drm-misc/tree/drivers/power/wm831x_power.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/power/wm831x_power.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/power/wm831x_power.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/power/wm831x_power.c</a></div><div class='hunk'>@@ -565,7 +565,7 @@ static __devinit int wm831x_power_probe(struct platform_device *pdev)</div><div class='ctx'> 			    goto err_usb;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_irq_byname(pdev, "SYSLO");</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "SYSLO"));</div><div class='ctx'> 	ret = request_threaded_irq(irq, NULL, wm831x_syslo_irq,</div><div class='ctx'> 				   IRQF_TRIGGER_RISING, "System power low",</div><div class='ctx'> 				   power);</div><div class='hunk'>@@ -575,7 +575,7 @@ static __devinit int wm831x_power_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_battery;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_irq_byname(pdev, "PWR SRC");</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "PWR SRC"));</div><div class='ctx'> 	ret = request_threaded_irq(irq, NULL, wm831x_pwr_src_irq,</div><div class='ctx'> 				   IRQF_TRIGGER_RISING, "Power source",</div><div class='ctx'> 				   power);</div><div class='hunk'>@@ -586,7 +586,9 @@ static __devinit int wm831x_power_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(wm831x_bat_irqs); i++) {</div><div class='del'>-		irq = platform_get_irq_byname(pdev, wm831x_bat_irqs[i]);</div><div class='add'>+		irq = wm831x_irq(wm831x,</div><div class='add'>+				 platform_get_irq_byname(pdev,</div><div class='add'>+							 wm831x_bat_irqs[i]));</div><div class='ctx'> 		ret = request_threaded_irq(irq, NULL, wm831x_bat_irq,</div><div class='ctx'> 					   IRQF_TRIGGER_RISING,</div><div class='ctx'> 					   wm831x_bat_irqs[i],</div><div class='hunk'>@@ -606,10 +608,10 @@ err_bat_irq:</div><div class='ctx'> 		irq = platform_get_irq_byname(pdev, wm831x_bat_irqs[i]);</div><div class='ctx'> 		free_irq(irq, power);</div><div class='ctx'> 	}</div><div class='del'>-	irq = platform_get_irq_byname(pdev, "PWR SRC");</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "PWR SRC"));</div><div class='ctx'> 	free_irq(irq, power);</div><div class='ctx'> err_syslo:</div><div class='del'>-	irq = platform_get_irq_byname(pdev, "SYSLO");</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "SYSLO"));</div><div class='ctx'> 	free_irq(irq, power);</div><div class='ctx'> err_battery:</div><div class='ctx'> 	if (power-&gt;have_battery)</div><div class='hunk'>@@ -626,17 +628,20 @@ err_kmalloc:</div><div class='ctx'> static __devexit int wm831x_power_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x_power *wm831x_power = platform_get_drvdata(pdev);</div><div class='add'>+	struct wm831x *wm831x = wm831x_power-&gt;wm831x;</div><div class='ctx'> 	int irq, i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(wm831x_bat_irqs); i++) {</div><div class='del'>-		irq = platform_get_irq_byname(pdev, wm831x_bat_irqs[i]);</div><div class='add'>+		irq = wm831x_irq(wm831x, </div><div class='add'>+				 platform_get_irq_byname(pdev,</div><div class='add'>+							 wm831x_bat_irqs[i]));</div><div class='ctx'> 		free_irq(irq, wm831x_power);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_irq_byname(pdev, "PWR SRC");</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "PWR SRC"));</div><div class='ctx'> 	free_irq(irq, wm831x_power);</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_irq_byname(pdev, "SYSLO");</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "SYSLO"));</div><div class='ctx'> 	free_irq(irq, wm831x_power);</div><div class='ctx'> </div><div class='ctx'> 	if (wm831x_power-&gt;have_battery)</div><div class='head'>diff --git a/drivers/ps3/ps3av.c b/drivers/ps3/ps3av.c<br/>index a409fa050a1a..93d0a8b7718a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ps3/ps3av.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ps3/ps3av.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ps3/ps3av.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ps3/ps3av.c</a></div><div class='hunk'>@@ -338,7 +338,7 @@ int ps3av_do_pkt(u32 cid, u16 send_len, size_t usr_buf_size,</div><div class='ctx'> 	mutex_unlock(&amp;ps3av-&gt;mutex);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-      err:</div><div class='add'>+err:</div><div class='ctx'> 	mutex_unlock(&amp;ps3av-&gt;mutex);</div><div class='ctx'> 	printk(KERN_ERR "%s: failed cid:%x res:%d\n", __func__, cid, res);</div><div class='ctx'> 	return res;</div><div class='hunk'>@@ -477,7 +477,6 @@ int ps3av_set_audio_mode(u32 ch, u32 fs, u32 word_bits, u32 format, u32 source)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> EXPORT_SYMBOL_GPL(ps3av_set_audio_mode);</div><div class='ctx'> </div><div class='ctx'> static int ps3av_set_videomode(void)</div><div class='hunk'>@@ -501,7 +500,7 @@ static void ps3av_set_videomode_packet(u32 id)</div><div class='ctx'> </div><div class='ctx'> 	video_mode = &amp;video_mode_table[id &amp; PS3AV_MODE_MASK];</div><div class='ctx'> </div><div class='del'>-	avb_param.num_of_video_pkt = PS3AV_AVB_NUM_VIDEO;	/* num of head */</div><div class='add'>+	avb_param.num_of_video_pkt = PS3AV_AVB_NUM_VIDEO; /* num of head */</div><div class='ctx'> 	avb_param.num_of_audio_pkt = 0;</div><div class='ctx'> 	avb_param.num_of_av_video_pkt = ps3av-&gt;av_hw_conf.num_of_hdmi +</div><div class='ctx'> 					ps3av-&gt;av_hw_conf.num_of_avmulti;</div><div class='hunk'>@@ -521,7 +520,7 @@ static void ps3av_set_videomode_packet(u32 id)</div><div class='ctx'> #ifndef PS3AV_HDMI_YUV</div><div class='ctx'> 		if (ps3av-&gt;av_port[i] == PS3AV_CMD_AVPORT_HDMI_0 ||</div><div class='ctx'> 		    ps3av-&gt;av_port[i] == PS3AV_CMD_AVPORT_HDMI_1)</div><div class='del'>-			av_video_cs = RGB8;	/* use RGB for HDMI */</div><div class='add'>+			av_video_cs = RGB8; /* use RGB for HDMI */</div><div class='ctx'> #endif</div><div class='ctx'> 		len += ps3av_cmd_set_av_video_cs(&amp;avb_param.buf[len],</div><div class='ctx'> 						 ps3av-&gt;av_port[i],</div><div class='hunk'>@@ -590,8 +589,8 @@ static void ps3avd(struct work_struct *work)</div><div class='ctx'> #define SHIFT_VESA	8</div><div class='ctx'> </div><div class='ctx'> static const struct {</div><div class='del'>-	unsigned mask : 19;</div><div class='del'>-	unsigned id :  4;</div><div class='add'>+	unsigned mask:19;</div><div class='add'>+	unsigned id:4;</div><div class='ctx'> } ps3av_preferred_modes[] = {</div><div class='ctx'> 	{ PS3AV_RESBIT_WUXGA      &lt;&lt; SHIFT_VESA, PS3AV_MODE_WUXGA   },</div><div class='ctx'> 	{ PS3AV_RESBIT_1920x1080P &lt;&lt; SHIFT_60,   PS3AV_MODE_1080P60 },</div><div class='hunk'>@@ -667,7 +666,8 @@ static enum ps3av_mode_num ps3av_hdmi_get_id(struct ps3av_info_monitor *info)</div><div class='ctx'> 	return id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ps3av_monitor_info_dump(const struct ps3av_pkt_av_get_monitor_info *monitor_info)</div><div class='add'>+static void ps3av_monitor_info_dump(</div><div class='add'>+	const struct ps3av_pkt_av_get_monitor_info *monitor_info)</div><div class='ctx'> {</div><div class='ctx'> 	const struct ps3av_info_monitor *info = &amp;monitor_info-&gt;info;</div><div class='ctx'> 	const struct ps3av_info_audio *audio = info-&gt;audio;</div><div class='hunk'>@@ -717,8 +717,8 @@ static void ps3av_monitor_info_dump(const struct ps3av_pkt_av_get_monitor_info *</div><div class='ctx'> </div><div class='ctx'> 	/* audio block */</div><div class='ctx'> 	for (i = 0; i &lt; info-&gt;num_of_audio_block; i++) {</div><div class='del'>-		pr_debug("audio[%d] type: %02x max_ch: %02x fs: %02x sbit: "</div><div class='del'>-			 "%02x\n",</div><div class='add'>+		pr_debug(</div><div class='add'>+			"audio[%d] type: %02x max_ch: %02x fs: %02x sbit: %02x\n",</div><div class='ctx'> 			 i, audio-&gt;type, audio-&gt;max_num_of_ch, audio-&gt;fs,</div><div class='ctx'> 			 audio-&gt;sbit);</div><div class='ctx'> 		audio++;</div><div class='hunk'>@@ -870,21 +870,18 @@ int ps3av_set_video_mode(int id)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> EXPORT_SYMBOL_GPL(ps3av_set_video_mode);</div><div class='ctx'> </div><div class='ctx'> int ps3av_get_auto_mode(void)</div><div class='ctx'> {</div><div class='ctx'> 	return ps3av_auto_videomode(&amp;ps3av-&gt;av_hw_conf);</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> EXPORT_SYMBOL_GPL(ps3av_get_auto_mode);</div><div class='ctx'> </div><div class='ctx'> int ps3av_get_mode(void)</div><div class='ctx'> {</div><div class='ctx'> 	return ps3av ? ps3av-&gt;ps3av_mode : 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> EXPORT_SYMBOL_GPL(ps3av_get_mode);</div><div class='ctx'> </div><div class='ctx'> /* get resolution by video_mode */</div><div class='hunk'>@@ -902,7 +899,6 @@ int ps3av_video_mode2res(u32 id, u32 *xres, u32 *yres)</div><div class='ctx'> 	*yres = video_mode_table[id].y;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> EXPORT_SYMBOL_GPL(ps3av_video_mode2res);</div><div class='ctx'> </div><div class='ctx'> /* mute */</div><div class='hunk'>@@ -911,7 +907,6 @@ int ps3av_video_mute(int mute)</div><div class='ctx'> 	return ps3av_set_av_video_mute(mute ? PS3AV_CMD_MUTE_ON</div><div class='ctx'> 					    : PS3AV_CMD_MUTE_OFF);</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> EXPORT_SYMBOL_GPL(ps3av_video_mute);</div><div class='ctx'> </div><div class='ctx'> /* mute analog output only */</div><div class='hunk'>@@ -935,7 +930,6 @@ int ps3av_audio_mute(int mute)</div><div class='ctx'> 	return ps3av_set_audio_mute(mute ? PS3AV_CMD_MUTE_ON</div><div class='ctx'> 					 : PS3AV_CMD_MUTE_OFF);</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> EXPORT_SYMBOL_GPL(ps3av_audio_mute);</div><div class='ctx'> </div><div class='ctx'> static int __devinit ps3av_probe(struct ps3_system_bus_device *dev)</div><div class='head'>diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig<br/>index cd9bc3b129bc..ffdf712f9a67 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ptp/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ptp/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ptp/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ptp/Kconfig</a></div><div class='hunk'>@@ -70,7 +70,7 @@ config DP83640_PHY</div><div class='ctx'> 	  using the SO_TIMESTAMPING API.</div><div class='ctx'> </div><div class='ctx'> 	  In order for this to work, your MAC driver must also</div><div class='del'>-	  implement the skb_tx_timetamp() function.</div><div class='add'>+	  implement the skb_tx_timestamp() function.</div><div class='ctx'> </div><div class='ctx'> config PTP_1588_CLOCK_PCH</div><div class='ctx'> 	tristate "Intel PCH EG20T as PTP clock"</div><div class='hunk'>@@ -78,9 +78,13 @@ config PTP_1588_CLOCK_PCH</div><div class='ctx'> 	depends on PCH_GBE</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver adds support for using the PCH EG20T as a PTP</div><div class='del'>-	  clock. This clock is only useful if your PTP programs are</div><div class='del'>-	  getting hardware time stamps on the PTP Ethernet packets</div><div class='del'>-	  using the SO_TIMESTAMPING API.</div><div class='add'>+	  clock. The hardware supports time stamping of PTP packets</div><div class='add'>+	  when using the end-to-end delay (E2E) mechansim. The peer</div><div class='add'>+	  delay mechansim (P2P) is not supported.</div><div class='add'>+</div><div class='add'>+	  This clock is only useful if your PTP programs are getting</div><div class='add'>+	  hardware time stamps on the PTP Ethernet packets using the</div><div class='add'>+	  SO_TIMESTAMPING API.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module</div><div class='ctx'> 	  will be called ptp_pch.</div><div class='head'>diff --git a/drivers/ptp/ptp_clock.c b/drivers/ptp/ptp_clock.c<br/>index f519a131238d..1e528b539a07 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ptp/ptp_clock.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ptp/ptp_clock.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ptp/ptp_clock.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ptp/ptp_clock.c</a></div><div class='hunk'>@@ -304,6 +304,12 @@ void ptp_clock_event(struct ptp_clock *ptp, struct ptp_clock_event *event)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ptp_clock_event);</div><div class='ctx'> </div><div class='add'>+int ptp_clock_index(struct ptp_clock *ptp)</div><div class='add'>+{</div><div class='add'>+	return ptp-&gt;index;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ptp_clock_index);</div><div class='add'>+</div><div class='ctx'> /* module operations */</div><div class='ctx'> </div><div class='ctx'> static void __exit ptp_exit(void)</div><div class='head'>diff --git a/drivers/ptp/ptp_ixp46x.c b/drivers/ptp/ptp_ixp46x.c<br/>index 6f2782bb5f41..e03c40692b00 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ptp/ptp_ixp46x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ptp/ptp_ixp46x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ptp/ptp_ixp46x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ptp/ptp_ixp46x.c</a></div><div class='hunk'>@@ -284,6 +284,7 @@ static void __exit ptp_ixp_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	free_irq(MASTER_IRQ, &amp;ixp_clock);</div><div class='ctx'> 	free_irq(SLAVE_IRQ, &amp;ixp_clock);</div><div class='add'>+	ixp46x_phc_index = -1;</div><div class='ctx'> 	ptp_clock_unregister(ixp_clock.ptp_clock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -302,6 +303,8 @@ static int __init ptp_ixp_init(void)</div><div class='ctx'> 	if (IS_ERR(ixp_clock.ptp_clock))</div><div class='ctx'> 		return PTR_ERR(ixp_clock.ptp_clock);</div><div class='ctx'> </div><div class='add'>+	ixp46x_phc_index = ptp_clock_index(ixp_clock.ptp_clock);</div><div class='add'>+</div><div class='ctx'> 	__raw_writel(DEFAULT_ADDEND, &amp;ixp_clock.regs-&gt;addend);</div><div class='ctx'> 	__raw_writel(1, &amp;ixp_clock.regs-&gt;trgt_lo);</div><div class='ctx'> 	__raw_writel(0, &amp;ixp_clock.regs-&gt;trgt_hi);</div><div class='head'>diff --git a/drivers/ptp/ptp_pch.c b/drivers/ptp/ptp_pch.c<br/>index 375eb04c16ea..3a9c17eced10 100644<br/>--- a/<a href='/drm-misc/tree/drivers/ptp/ptp_pch.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/ptp/ptp_pch.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/ptp/ptp_pch.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/ptp/ptp_pch.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define STATION_ADDR_LEN	20</div><div class='ctx'> #define PCI_DEVICE_ID_PCH_1588	0x8819</div><div class='hunk'>@@ -261,6 +262,7 @@ u64 pch_rx_snap_read(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	ns = ((u64) hi) &lt;&lt; 32;</div><div class='ctx'> 	ns |= lo;</div><div class='add'>+	ns &lt;&lt;= TICKS_NS_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	return ns;</div><div class='ctx'> }</div><div class='hunk'>@@ -277,6 +279,7 @@ u64 pch_tx_snap_read(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	ns = ((u64) hi) &lt;&lt; 32;</div><div class='ctx'> 	ns |= lo;</div><div class='add'>+	ns &lt;&lt;= TICKS_NS_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	return ns;</div><div class='ctx'> }</div><div class='hunk'>@@ -306,7 +309,7 @@ static void pch_reset(struct pch_dev *chip)</div><div class='ctx'>  *				    traffic on the  ethernet interface</div><div class='ctx'>  * @addr:	dress which contain the column separated address to be used.</div><div class='ctx'>  */</div><div class='del'>-static int pch_set_station_address(u8 *addr, struct pci_dev *pdev)</div><div class='add'>+int pch_set_station_address(u8 *addr, struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	s32 i;</div><div class='ctx'> 	struct pch_dev *chip = pci_get_drvdata(pdev);</div><div class='hunk'>@@ -350,6 +353,7 @@ static int pch_set_station_address(u8 *addr, struct pci_dev *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(pch_set_station_address);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Interrupt service routine</div><div class='hunk'>@@ -649,8 +653,6 @@ pch_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	iowrite32(1, &amp;chip-&gt;regs-&gt;trgt_lo);</div><div class='ctx'> 	iowrite32(0, &amp;chip-&gt;regs-&gt;trgt_hi);</div><div class='ctx'> 	iowrite32(PCH_TSE_TTIPEND, &amp;chip-&gt;regs-&gt;event);</div><div class='del'>-	/* Version: IEEE1588 v1 and IEEE1588-2008,  Mode: All Evwnt, Locked  */</div><div class='del'>-	iowrite32(0x80020000, &amp;chip-&gt;regs-&gt;ch_control);</div><div class='ctx'> </div><div class='ctx'> 	pch_eth_enable_set(chip);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/rapidio/Kconfig b/drivers/rapidio/Kconfig<br/>index bc8719238793..6194d35ebb97 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rapidio/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rapidio/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rapidio/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rapidio/Kconfig</a></div><div class='hunk'>@@ -22,6 +22,20 @@ config RAPIDIO_ENABLE_RX_TX_PORTS</div><div class='ctx'> 	  ports for Input/Output direction to allow other traffic</div><div class='ctx'> 	  than Maintenance transfers.</div><div class='ctx'> </div><div class='add'>+config RAPIDIO_DMA_ENGINE</div><div class='add'>+	bool "DMA Engine support for RapidIO"</div><div class='add'>+	depends on RAPIDIO</div><div class='add'>+	select DMADEVICES</div><div class='add'>+	select DMA_ENGINE</div><div class='add'>+	help</div><div class='add'>+	  Say Y here if you want to use DMA Engine frameork for RapidIO data</div><div class='add'>+	  transfers to/from target RIO devices. RapidIO uses NREAD and</div><div class='add'>+	  NWRITE (NWRITE_R, SWRITE) requests to transfer data between local</div><div class='add'>+	  memory and memory on remote target device. You need a DMA controller</div><div class='add'>+	  capable to perform data transfers to/from RapidIO.</div><div class='add'>+</div><div class='add'>+	  If you are unsure about this, say Y here.</div><div class='add'>+</div><div class='ctx'> config RAPIDIO_DEBUG</div><div class='ctx'> 	bool "RapidIO subsystem debug messages"</div><div class='ctx'> 	depends on RAPIDIO</div><div class='head'>diff --git a/drivers/rapidio/devices/Makefile b/drivers/rapidio/devices/Makefile<br/>index 3b7b4e2dff7c..7b62860f34f8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rapidio/devices/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rapidio/devices/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rapidio/devices/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rapidio/devices/Makefile</a></div><div class='hunk'>@@ -3,3 +3,6 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_RAPIDIO_TSI721)	+= tsi721.o</div><div class='add'>+ifeq ($(CONFIG_RAPIDIO_DMA_ENGINE),y)</div><div class='add'>+obj-$(CONFIG_RAPIDIO_TSI721)	+= tsi721_dma.o</div><div class='add'>+endif</div><div class='head'>diff --git a/drivers/rapidio/devices/tsi721.c b/drivers/rapidio/devices/tsi721.c<br/>index 30d2072f480b..722246cf20ab 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rapidio/devices/tsi721.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rapidio/devices/tsi721.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rapidio/devices/tsi721.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rapidio/devices/tsi721.c</a></div><div class='hunk'>@@ -108,6 +108,7 @@ static int tsi721_maint_dma(struct tsi721_device *priv, u32 sys_size,</div><div class='ctx'> 			u16 destid, u8 hopcount, u32 offset, int len,</div><div class='ctx'> 			u32 *data, int do_wr)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *regs = priv-&gt;regs + TSI721_DMAC_BASE(priv-&gt;mdma.ch_id);</div><div class='ctx'> 	struct tsi721_dma_desc *bd_ptr;</div><div class='ctx'> 	u32 rd_count, swr_ptr, ch_stat;</div><div class='ctx'> 	int i, err = 0;</div><div class='hunk'>@@ -116,10 +117,9 @@ static int tsi721_maint_dma(struct tsi721_device *priv, u32 sys_size,</div><div class='ctx'> 	if (offset &gt; (RIO_MAINT_SPACE_SZ - len) || (len != sizeof(u32)))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	bd_ptr = priv-&gt;bdma[TSI721_DMACH_MAINT].bd_base;</div><div class='add'>+	bd_ptr = priv-&gt;mdma.bd_base;</div><div class='ctx'> </div><div class='del'>-	rd_count = ioread32(</div><div class='del'>-			priv-&gt;regs + TSI721_DMAC_DRDCNT(TSI721_DMACH_MAINT));</div><div class='add'>+	rd_count = ioread32(regs + TSI721_DMAC_DRDCNT);</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize DMA descriptor */</div><div class='ctx'> 	bd_ptr[0].type_id = cpu_to_le32((DTYPE2 &lt;&lt; 29) | (op &lt;&lt; 19) | destid);</div><div class='hunk'>@@ -134,19 +134,18 @@ static int tsi721_maint_dma(struct tsi721_device *priv, u32 sys_size,</div><div class='ctx'> 	mb();</div><div class='ctx'> </div><div class='ctx'> 	/* Start DMA operation */</div><div class='del'>-	iowrite32(rd_count + 2,</div><div class='del'>-		priv-&gt;regs + TSI721_DMAC_DWRCNT(TSI721_DMACH_MAINT));</div><div class='del'>-	ioread32(priv-&gt;regs + TSI721_DMAC_DWRCNT(TSI721_DMACH_MAINT));</div><div class='add'>+	iowrite32(rd_count + 2,	regs + TSI721_DMAC_DWRCNT);</div><div class='add'>+	ioread32(regs + TSI721_DMAC_DWRCNT);</div><div class='ctx'> 	i = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until DMA transfer is finished */</div><div class='del'>-	while ((ch_stat = ioread32(priv-&gt;regs +</div><div class='del'>-		TSI721_DMAC_STS(TSI721_DMACH_MAINT))) &amp; TSI721_DMAC_STS_RUN) {</div><div class='add'>+	while ((ch_stat = ioread32(regs + TSI721_DMAC_STS))</div><div class='add'>+							&amp; TSI721_DMAC_STS_RUN) {</div><div class='ctx'> 		udelay(1);</div><div class='ctx'> 		if (++i &gt;= 5000000) {</div><div class='ctx'> 			dev_dbg(&amp;priv-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"%s : DMA[%d] read timeout ch_status=%x\n",</div><div class='del'>-				__func__, TSI721_DMACH_MAINT, ch_stat);</div><div class='add'>+				__func__, priv-&gt;mdma.ch_id, ch_stat);</div><div class='ctx'> 			if (!do_wr)</div><div class='ctx'> 				*data = 0xffffffff;</div><div class='ctx'> 			err = -EIO;</div><div class='hunk'>@@ -162,13 +161,10 @@ static int tsi721_maint_dma(struct tsi721_device *priv, u32 sys_size,</div><div class='ctx'> 			__func__, ch_stat);</div><div class='ctx'> 		dev_dbg(&amp;priv-&gt;pdev-&gt;dev, "OP=%d : destid=%x hc=%x off=%x\n",</div><div class='ctx'> 			do_wr ? MAINT_WR : MAINT_RD, destid, hopcount, offset);</div><div class='del'>-		iowrite32(TSI721_DMAC_INT_ALL,</div><div class='del'>-			priv-&gt;regs + TSI721_DMAC_INT(TSI721_DMACH_MAINT));</div><div class='del'>-		iowrite32(TSI721_DMAC_CTL_INIT,</div><div class='del'>-			priv-&gt;regs + TSI721_DMAC_CTL(TSI721_DMACH_MAINT));</div><div class='add'>+		iowrite32(TSI721_DMAC_INT_ALL, regs + TSI721_DMAC_INT);</div><div class='add'>+		iowrite32(TSI721_DMAC_CTL_INIT, regs + TSI721_DMAC_CTL);</div><div class='ctx'> 		udelay(10);</div><div class='del'>-		iowrite32(0, priv-&gt;regs +</div><div class='del'>-				TSI721_DMAC_DWRCNT(TSI721_DMACH_MAINT));</div><div class='add'>+		iowrite32(0, regs + TSI721_DMAC_DWRCNT);</div><div class='ctx'> 		udelay(1);</div><div class='ctx'> 		if (!do_wr)</div><div class='ctx'> 			*data = 0xffffffff;</div><div class='hunk'>@@ -184,8 +180,8 @@ static int tsi721_maint_dma(struct tsi721_device *priv, u32 sys_size,</div><div class='ctx'> 	 * NOTE: Skipping check and clear FIFO entries because we are waiting</div><div class='ctx'> 	 * for transfer to be completed.</div><div class='ctx'> 	 */</div><div class='del'>-	swr_ptr = ioread32(priv-&gt;regs + TSI721_DMAC_DSWP(TSI721_DMACH_MAINT));</div><div class='del'>-	iowrite32(swr_ptr, priv-&gt;regs + TSI721_DMAC_DSRP(TSI721_DMACH_MAINT));</div><div class='add'>+	swr_ptr = ioread32(regs + TSI721_DMAC_DSWP);</div><div class='add'>+	iowrite32(swr_ptr, regs + TSI721_DMAC_DSRP);</div><div class='ctx'> err_out:</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -541,6 +537,22 @@ static irqreturn_t tsi721_irqhandler(int irq, void *ptr)</div><div class='ctx'> 			tsi721_pw_handler(mport);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_RAPIDIO_DMA_ENGINE</div><div class='add'>+	if (dev_int &amp; TSI721_DEV_INT_BDMA_CH) {</div><div class='add'>+		int ch;</div><div class='add'>+</div><div class='add'>+		if (dev_ch_int &amp; TSI721_INT_BDMA_CHAN_M) {</div><div class='add'>+			dev_dbg(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+				"IRQ from DMA channel 0x%08x\n", dev_ch_int);</div><div class='add'>+</div><div class='add'>+			for (ch = 0; ch &lt; TSI721_DMA_MAXCH; ch++) {</div><div class='add'>+				if (!(dev_ch_int &amp; TSI721_INT_BDMA_CHAN(ch)))</div><div class='add'>+					continue;</div><div class='add'>+				tsi721_bdma_handler(&amp;priv-&gt;bdma[ch]);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -553,18 +565,26 @@ static void tsi721_interrupts_init(struct tsi721_device *priv)</div><div class='ctx'> 		priv-&gt;regs + TSI721_SR_CHINT(IDB_QUEUE));</div><div class='ctx'> 	iowrite32(TSI721_SR_CHINT_IDBQRCV,</div><div class='ctx'> 		priv-&gt;regs + TSI721_SR_CHINTE(IDB_QUEUE));</div><div class='del'>-	iowrite32(TSI721_INT_SR2PC_CHAN(IDB_QUEUE),</div><div class='del'>-		priv-&gt;regs + TSI721_DEV_CHAN_INTE);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable SRIO MAC interrupts */</div><div class='ctx'> 	iowrite32(TSI721_RIO_EM_DEV_INT_EN_INT,</div><div class='ctx'> 		priv-&gt;regs + TSI721_RIO_EM_DEV_INT_EN);</div><div class='ctx'> </div><div class='add'>+	/* Enable interrupts from channels in use */</div><div class='add'>+#ifdef CONFIG_RAPIDIO_DMA_ENGINE</div><div class='add'>+	intr = TSI721_INT_SR2PC_CHAN(IDB_QUEUE) |</div><div class='add'>+		(TSI721_INT_BDMA_CHAN_M &amp;</div><div class='add'>+		 ~TSI721_INT_BDMA_CHAN(TSI721_DMACH_MAINT));</div><div class='add'>+#else</div><div class='add'>+	intr = TSI721_INT_SR2PC_CHAN(IDB_QUEUE);</div><div class='add'>+#endif</div><div class='add'>+	iowrite32(intr,	priv-&gt;regs + TSI721_DEV_CHAN_INTE);</div><div class='add'>+</div><div class='ctx'> 	if (priv-&gt;flags &amp; TSI721_USING_MSIX)</div><div class='ctx'> 		intr = TSI721_DEV_INT_SRIO;</div><div class='ctx'> 	else</div><div class='ctx'> 		intr = TSI721_DEV_INT_SR2PC_CH | TSI721_DEV_INT_SRIO |</div><div class='del'>-			TSI721_DEV_INT_SMSG_CH;</div><div class='add'>+			TSI721_DEV_INT_SMSG_CH | TSI721_DEV_INT_BDMA_CH;</div><div class='ctx'> </div><div class='ctx'> 	iowrite32(intr, priv-&gt;regs + TSI721_DEV_INTE);</div><div class='ctx'> 	ioread32(priv-&gt;regs + TSI721_DEV_INTE);</div><div class='hunk'>@@ -715,12 +735,29 @@ static int tsi721_enable_msix(struct tsi721_device *priv)</div><div class='ctx'> 					TSI721_MSIX_OMSG_INT(i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_RAPIDIO_DMA_ENGINE</div><div class='add'>+	/*</div><div class='add'>+	 * Initialize MSI-X entries for Block DMA Engine:</div><div class='add'>+	 * this driver supports XXX DMA channels</div><div class='add'>+	 * (one is reserved for SRIO maintenance transactions)</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; TSI721_DMA_CHNUM; i++) {</div><div class='add'>+		entries[TSI721_VECT_DMA0_DONE + i].entry =</div><div class='add'>+					TSI721_MSIX_DMACH_DONE(i);</div><div class='add'>+		entries[TSI721_VECT_DMA0_INT + i].entry =</div><div class='add'>+					TSI721_MSIX_DMACH_INT(i);</div><div class='add'>+	}</div><div class='add'>+#endif /* CONFIG_RAPIDIO_DMA_ENGINE */</div><div class='add'>+</div><div class='ctx'> 	err = pci_enable_msix(priv-&gt;pdev, entries, ARRAY_SIZE(entries));</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		if (err &gt; 0)</div><div class='ctx'> 			dev_info(&amp;priv-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Only %d MSI-X vectors available, "</div><div class='ctx'> 				 "not using MSI-X\n", err);</div><div class='add'>+		else</div><div class='add'>+			dev_err(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+				"Failed to enable MSI-X (err=%d)\n", err);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -760,6 +797,22 @@ static int tsi721_enable_msix(struct tsi721_device *priv)</div><div class='ctx'> 			 i, pci_name(priv-&gt;pdev));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_RAPIDIO_DMA_ENGINE</div><div class='add'>+	for (i = 0; i &lt; TSI721_DMA_CHNUM; i++) {</div><div class='add'>+		priv-&gt;msix[TSI721_VECT_DMA0_DONE + i].vector =</div><div class='add'>+				entries[TSI721_VECT_DMA0_DONE + i].vector;</div><div class='add'>+		snprintf(priv-&gt;msix[TSI721_VECT_DMA0_DONE + i].irq_name,</div><div class='add'>+			 IRQ_DEVICE_NAME_MAX, DRV_NAME "-dmad%d@pci:%s",</div><div class='add'>+			 i, pci_name(priv-&gt;pdev));</div><div class='add'>+</div><div class='add'>+		priv-&gt;msix[TSI721_VECT_DMA0_INT + i].vector =</div><div class='add'>+				entries[TSI721_VECT_DMA0_INT + i].vector;</div><div class='add'>+		snprintf(priv-&gt;msix[TSI721_VECT_DMA0_INT + i].irq_name,</div><div class='add'>+			 IRQ_DEVICE_NAME_MAX, DRV_NAME "-dmai%d@pci:%s",</div><div class='add'>+			 i, pci_name(priv-&gt;pdev));</div><div class='add'>+	}</div><div class='add'>+#endif /* CONFIG_RAPIDIO_DMA_ENGINE */</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_PCI_MSI */</div><div class='hunk'>@@ -888,20 +941,34 @@ static void tsi721_doorbell_free(struct tsi721_device *priv)</div><div class='ctx'> 	priv-&gt;idb_base = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tsi721_bdma_ch_init(struct tsi721_device *priv, int chnum)</div><div class='add'>+/**</div><div class='add'>+ * tsi721_bdma_maint_init - Initialize maintenance request BDMA channel.</div><div class='add'>+ * @priv: pointer to tsi721 private data</div><div class='add'>+ *</div><div class='add'>+ * Initialize BDMA channel allocated for RapidIO maintenance read/write</div><div class='add'>+ * request generation</div><div class='add'>+ * Returns %0 on success or %-ENOMEM on failure.</div><div class='add'>+ */</div><div class='add'>+static int tsi721_bdma_maint_init(struct tsi721_device *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct tsi721_dma_desc *bd_ptr;</div><div class='ctx'> 	u64		*sts_ptr;</div><div class='ctx'> 	dma_addr_t	bd_phys, sts_phys;</div><div class='ctx'> 	int		sts_size;</div><div class='del'>-	int		bd_num = priv-&gt;bdma[chnum].bd_num;</div><div class='add'>+	int		bd_num = 2;</div><div class='add'>+	void __iomem	*regs;</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;priv-&gt;pdev-&gt;dev, "Init Block DMA Engine, CH%d\n", chnum);</div><div class='add'>+	dev_dbg(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+		"Init Block DMA Engine for Maintenance requests, CH%d\n",</div><div class='add'>+		TSI721_DMACH_MAINT);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize DMA channel for maintenance requests</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='add'>+	priv-&gt;mdma.ch_id = TSI721_DMACH_MAINT;</div><div class='add'>+	regs = priv-&gt;regs + TSI721_DMAC_BASE(TSI721_DMACH_MAINT);</div><div class='add'>+</div><div class='ctx'> 	/* Allocate space for DMA descriptors */</div><div class='ctx'> 	bd_ptr = dma_zalloc_coherent(&amp;priv-&gt;pdev-&gt;dev,</div><div class='ctx'> 					bd_num * sizeof(struct tsi721_dma_desc),</div><div class='hunk'>@@ -909,8 +976,9 @@ static int tsi721_bdma_ch_init(struct tsi721_device *priv, int chnum)</div><div class='ctx'> 	if (!bd_ptr)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;bdma[chnum].bd_phys = bd_phys;</div><div class='del'>-	priv-&gt;bdma[chnum].bd_base = bd_ptr;</div><div class='add'>+	priv-&gt;mdma.bd_num = bd_num;</div><div class='add'>+	priv-&gt;mdma.bd_phys = bd_phys;</div><div class='add'>+	priv-&gt;mdma.bd_base = bd_ptr;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;priv-&gt;pdev-&gt;dev, "DMA descriptors @ %p (phys = %llx)\n",</div><div class='ctx'> 		bd_ptr, (unsigned long long)bd_phys);</div><div class='hunk'>@@ -927,13 +995,13 @@ static int tsi721_bdma_ch_init(struct tsi721_device *priv, int chnum)</div><div class='ctx'> 		dma_free_coherent(&amp;priv-&gt;pdev-&gt;dev,</div><div class='ctx'> 				  bd_num * sizeof(struct tsi721_dma_desc),</div><div class='ctx'> 				  bd_ptr, bd_phys);</div><div class='del'>-		priv-&gt;bdma[chnum].bd_base = NULL;</div><div class='add'>+		priv-&gt;mdma.bd_base = NULL;</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;bdma[chnum].sts_phys = sts_phys;</div><div class='del'>-	priv-&gt;bdma[chnum].sts_base = sts_ptr;</div><div class='del'>-	priv-&gt;bdma[chnum].sts_size = sts_size;</div><div class='add'>+	priv-&gt;mdma.sts_phys = sts_phys;</div><div class='add'>+	priv-&gt;mdma.sts_base = sts_ptr;</div><div class='add'>+	priv-&gt;mdma.sts_size = sts_size;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;priv-&gt;pdev-&gt;dev,</div><div class='ctx'> 		"desc status FIFO @ %p (phys = %llx) size=0x%x\n",</div><div class='hunk'>@@ -946,83 +1014,61 @@ static int tsi721_bdma_ch_init(struct tsi721_device *priv, int chnum)</div><div class='ctx'> 	bd_ptr[bd_num - 1].next_hi = cpu_to_le32((u64)bd_phys &gt;&gt; 32);</div><div class='ctx'> </div><div class='ctx'> 	/* Setup DMA descriptor pointers */</div><div class='del'>-	iowrite32(((u64)bd_phys &gt;&gt; 32),</div><div class='del'>-		priv-&gt;regs + TSI721_DMAC_DPTRH(chnum));</div><div class='add'>+	iowrite32(((u64)bd_phys &gt;&gt; 32),	regs + TSI721_DMAC_DPTRH);</div><div class='ctx'> 	iowrite32(((u64)bd_phys &amp; TSI721_DMAC_DPTRL_MASK),</div><div class='del'>-		priv-&gt;regs + TSI721_DMAC_DPTRL(chnum));</div><div class='add'>+		regs + TSI721_DMAC_DPTRL);</div><div class='ctx'> </div><div class='ctx'> 	/* Setup descriptor status FIFO */</div><div class='del'>-	iowrite32(((u64)sts_phys &gt;&gt; 32),</div><div class='del'>-		priv-&gt;regs + TSI721_DMAC_DSBH(chnum));</div><div class='add'>+	iowrite32(((u64)sts_phys &gt;&gt; 32), regs + TSI721_DMAC_DSBH);</div><div class='ctx'> 	iowrite32(((u64)sts_phys &amp; TSI721_DMAC_DSBL_MASK),</div><div class='del'>-		priv-&gt;regs + TSI721_DMAC_DSBL(chnum));</div><div class='add'>+		regs + TSI721_DMAC_DSBL);</div><div class='ctx'> 	iowrite32(TSI721_DMAC_DSSZ_SIZE(sts_size),</div><div class='del'>-		priv-&gt;regs + TSI721_DMAC_DSSZ(chnum));</div><div class='add'>+		regs + TSI721_DMAC_DSSZ);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear interrupt bits */</div><div class='del'>-	iowrite32(TSI721_DMAC_INT_ALL,</div><div class='del'>-		priv-&gt;regs + TSI721_DMAC_INT(chnum));</div><div class='add'>+	iowrite32(TSI721_DMAC_INT_ALL, regs + TSI721_DMAC_INT);</div><div class='ctx'> </div><div class='del'>-	ioread32(priv-&gt;regs + TSI721_DMAC_INT(chnum));</div><div class='add'>+	ioread32(regs + TSI721_DMAC_INT);</div><div class='ctx'> </div><div class='ctx'> 	/* Toggle DMA channel initialization */</div><div class='del'>-	iowrite32(TSI721_DMAC_CTL_INIT,	priv-&gt;regs + TSI721_DMAC_CTL(chnum));</div><div class='del'>-	ioread32(priv-&gt;regs + TSI721_DMAC_CTL(chnum));</div><div class='add'>+	iowrite32(TSI721_DMAC_CTL_INIT,	regs + TSI721_DMAC_CTL);</div><div class='add'>+	ioread32(regs + TSI721_DMAC_CTL);</div><div class='ctx'> 	udelay(10);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tsi721_bdma_ch_free(struct tsi721_device *priv, int chnum)</div><div class='add'>+static int tsi721_bdma_maint_free(struct tsi721_device *priv)</div><div class='ctx'> {</div><div class='ctx'> 	u32 ch_stat;</div><div class='add'>+	struct tsi721_bdma_maint *mdma = &amp;priv-&gt;mdma;</div><div class='add'>+	void __iomem *regs = priv-&gt;regs + TSI721_DMAC_BASE(mdma-&gt;ch_id);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;bdma[chnum].bd_base == NULL)</div><div class='add'>+	if (mdma-&gt;bd_base == NULL)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Check if DMA channel still running */</div><div class='del'>-	ch_stat = ioread32(priv-&gt;regs +	TSI721_DMAC_STS(chnum));</div><div class='add'>+	ch_stat = ioread32(regs + TSI721_DMAC_STS);</div><div class='ctx'> 	if (ch_stat &amp; TSI721_DMAC_STS_RUN)</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	/* Put DMA channel into init state */</div><div class='del'>-	iowrite32(TSI721_DMAC_CTL_INIT,</div><div class='del'>-		priv-&gt;regs + TSI721_DMAC_CTL(chnum));</div><div class='add'>+	iowrite32(TSI721_DMAC_CTL_INIT,	regs + TSI721_DMAC_CTL);</div><div class='ctx'> </div><div class='ctx'> 	/* Free space allocated for DMA descriptors */</div><div class='ctx'> 	dma_free_coherent(&amp;priv-&gt;pdev-&gt;dev,</div><div class='del'>-		priv-&gt;bdma[chnum].bd_num * sizeof(struct tsi721_dma_desc),</div><div class='del'>-		priv-&gt;bdma[chnum].bd_base, priv-&gt;bdma[chnum].bd_phys);</div><div class='del'>-	priv-&gt;bdma[chnum].bd_base = NULL;</div><div class='add'>+		mdma-&gt;bd_num * sizeof(struct tsi721_dma_desc),</div><div class='add'>+		mdma-&gt;bd_base, mdma-&gt;bd_phys);</div><div class='add'>+	mdma-&gt;bd_base = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* Free space allocated for status FIFO */</div><div class='ctx'> 	dma_free_coherent(&amp;priv-&gt;pdev-&gt;dev,</div><div class='del'>-		priv-&gt;bdma[chnum].sts_size * sizeof(struct tsi721_dma_sts),</div><div class='del'>-		priv-&gt;bdma[chnum].sts_base, priv-&gt;bdma[chnum].sts_phys);</div><div class='del'>-	priv-&gt;bdma[chnum].sts_base = NULL;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tsi721_bdma_init(struct tsi721_device *priv)</div><div class='del'>-{</div><div class='del'>-	/* Initialize BDMA channel allocated for RapidIO maintenance read/write</div><div class='del'>-	 * request generation</div><div class='del'>-	 */</div><div class='del'>-	priv-&gt;bdma[TSI721_DMACH_MAINT].bd_num = 2;</div><div class='del'>-	if (tsi721_bdma_ch_init(priv, TSI721_DMACH_MAINT)) {</div><div class='del'>-		dev_err(&amp;priv-&gt;pdev-&gt;dev, "Unable to initialize maintenance DMA"</div><div class='del'>-			" channel %d, aborting\n", TSI721_DMACH_MAINT);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+		mdma-&gt;sts_size * sizeof(struct tsi721_dma_sts),</div><div class='add'>+		mdma-&gt;sts_base, mdma-&gt;sts_phys);</div><div class='add'>+	mdma-&gt;sts_base = NULL;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void tsi721_bdma_free(struct tsi721_device *priv)</div><div class='del'>-{</div><div class='del'>-	tsi721_bdma_ch_free(priv, TSI721_DMACH_MAINT);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Enable Inbound Messaging Interrupts */</div><div class='ctx'> static void</div><div class='ctx'> tsi721_imsg_interrupt_enable(struct tsi721_device *priv, int ch,</div><div class='hunk'>@@ -2035,7 +2081,8 @@ static void tsi721_disable_ints(struct tsi721_device *priv)</div><div class='ctx'> </div><div class='ctx'> 	/* Disable all BDMA Channel interrupts */</div><div class='ctx'> 	for (ch = 0; ch &lt; TSI721_DMA_MAXCH; ch++)</div><div class='del'>-		iowrite32(0, priv-&gt;regs + TSI721_DMAC_INTE(ch));</div><div class='add'>+		iowrite32(0,</div><div class='add'>+			priv-&gt;regs + TSI721_DMAC_BASE(ch) + TSI721_DMAC_INTE);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable all general BDMA interrupts */</div><div class='ctx'> 	iowrite32(0, priv-&gt;regs + TSI721_BDMA_INTE);</div><div class='hunk'>@@ -2104,6 +2151,7 @@ static int __devinit tsi721_setup_mport(struct tsi721_device *priv)</div><div class='ctx'> 	mport-&gt;phy_type = RIO_PHY_SERIAL;</div><div class='ctx'> 	mport-&gt;priv = (void *)priv;</div><div class='ctx'> 	mport-&gt;phys_efptr = 0x100;</div><div class='add'>+	priv-&gt;mport = mport;</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;mport-&gt;dbells);</div><div class='ctx'> </div><div class='hunk'>@@ -2129,17 +2177,21 @@ static int __devinit tsi721_setup_mport(struct tsi721_device *priv)</div><div class='ctx'> 	if (!err) {</div><div class='ctx'> 		tsi721_interrupts_init(priv);</div><div class='ctx'> 		ops-&gt;pwenable = tsi721_pw_enable;</div><div class='del'>-	} else</div><div class='add'>+	} else {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unable to get assigned PCI IRQ "</div><div class='ctx'> 			"vector %02X err=0x%x\n", pdev-&gt;irq, err);</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_RAPIDIO_DMA_ENGINE</div><div class='add'>+	tsi721_register_dma(priv);</div><div class='add'>+#endif</div><div class='ctx'> 	/* Enable SRIO link */</div><div class='ctx'> 	iowrite32(ioread32(priv-&gt;regs + TSI721_DEVCTL) |</div><div class='ctx'> 		  TSI721_DEVCTL_SRBOOT_CMPL,</div><div class='ctx'> 		  priv-&gt;regs + TSI721_DEVCTL);</div><div class='ctx'> </div><div class='ctx'> 	rio_register_mport(mport);</div><div class='del'>-	priv-&gt;mport = mport;</div><div class='ctx'> </div><div class='ctx'> 	if (mport-&gt;host_deviceid &gt;= 0)</div><div class='ctx'> 		iowrite32(RIO_PORT_GEN_HOST | RIO_PORT_GEN_MASTER |</div><div class='hunk'>@@ -2149,6 +2201,11 @@ static int __devinit tsi721_setup_mport(struct tsi721_device *priv)</div><div class='ctx'> 		iowrite32(0, priv-&gt;regs + (0x100 + RIO_PORT_GEN_CTL_CSR));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	kfree(mport);</div><div class='add'>+	kfree(ops);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devinit tsi721_probe(struct pci_dev *pdev,</div><div class='hunk'>@@ -2294,7 +2351,7 @@ static int __devinit tsi721_probe(struct pci_dev *pdev,</div><div class='ctx'> 	tsi721_init_pc2sr_mapping(priv);</div><div class='ctx'> 	tsi721_init_sr2pc_mapping(priv);</div><div class='ctx'> </div><div class='del'>-	if (tsi721_bdma_init(priv)) {</div><div class='add'>+	if (tsi721_bdma_maint_init(priv)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "BDMA initialization failed, aborting\n");</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto err_unmap_bars;</div><div class='hunk'>@@ -2319,7 +2376,7 @@ static int __devinit tsi721_probe(struct pci_dev *pdev,</div><div class='ctx'> err_free_consistent:</div><div class='ctx'> 	tsi721_doorbell_free(priv);</div><div class='ctx'> err_free_bdma:</div><div class='del'>-	tsi721_bdma_free(priv);</div><div class='add'>+	tsi721_bdma_maint_free(priv);</div><div class='ctx'> err_unmap_bars:</div><div class='ctx'> 	if (priv-&gt;regs)</div><div class='ctx'> 		iounmap(priv-&gt;regs);</div><div class='head'>diff --git a/drivers/rapidio/devices/tsi721.h b/drivers/rapidio/devices/tsi721.h<br/>index 1c226b31af13..59de9d7be346 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rapidio/devices/tsi721.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rapidio/devices/tsi721.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rapidio/devices/tsi721.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rapidio/devices/tsi721.h</a></div><div class='hunk'>@@ -167,6 +167,8 @@</div><div class='ctx'> #define TSI721_DEV_INTE		0x29840</div><div class='ctx'> #define TSI721_DEV_INT		0x29844</div><div class='ctx'> #define TSI721_DEV_INTSET	0x29848</div><div class='add'>+#define TSI721_DEV_INT_BDMA_CH	0x00002000</div><div class='add'>+#define TSI721_DEV_INT_BDMA_NCH	0x00001000</div><div class='ctx'> #define TSI721_DEV_INT_SMSG_CH	0x00000800</div><div class='ctx'> #define TSI721_DEV_INT_SMSG_NCH	0x00000400</div><div class='ctx'> #define TSI721_DEV_INT_SR2PC_CH	0x00000200</div><div class='hunk'>@@ -181,6 +183,8 @@</div><div class='ctx'> #define TSI721_INT_IMSG_CHAN(x)	(1 &lt;&lt; (16 + (x)))</div><div class='ctx'> #define TSI721_INT_OMSG_CHAN_M	0x0000ff00</div><div class='ctx'> #define TSI721_INT_OMSG_CHAN(x)	(1 &lt;&lt; (8 + (x)))</div><div class='add'>+#define TSI721_INT_BDMA_CHAN_M	0x000000ff</div><div class='add'>+#define TSI721_INT_BDMA_CHAN(x)	(1 &lt;&lt; (x))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * PC2SR block registers</div><div class='hunk'>@@ -235,14 +239,16 @@</div><div class='ctx'>  *   x = 0..7</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define TSI721_DMAC_DWRCNT(x)	(0x51000 + (x) * 0x1000)</div><div class='del'>-#define TSI721_DMAC_DRDCNT(x)	(0x51004 + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_BASE(x)	(0x51000 + (x) * 0x1000)</div><div class='ctx'> </div><div class='del'>-#define TSI721_DMAC_CTL(x)	(0x51008 + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_DWRCNT	0x000</div><div class='add'>+#define TSI721_DMAC_DRDCNT	0x004</div><div class='add'>+</div><div class='add'>+#define TSI721_DMAC_CTL		0x008</div><div class='ctx'> #define TSI721_DMAC_CTL_SUSP	0x00000002</div><div class='ctx'> #define TSI721_DMAC_CTL_INIT	0x00000001</div><div class='ctx'> </div><div class='del'>-#define TSI721_DMAC_INT(x)	(0x5100c + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_INT		0x00c</div><div class='ctx'> #define TSI721_DMAC_INT_STFULL	0x00000010</div><div class='ctx'> #define TSI721_DMAC_INT_DONE	0x00000008</div><div class='ctx'> #define TSI721_DMAC_INT_SUSP	0x00000004</div><div class='hunk'>@@ -250,34 +256,33 @@</div><div class='ctx'> #define TSI721_DMAC_INT_IOFDONE	0x00000001</div><div class='ctx'> #define TSI721_DMAC_INT_ALL	0x0000001f</div><div class='ctx'> </div><div class='del'>-#define TSI721_DMAC_INTSET(x)	(0x51010 + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_INTSET	0x010</div><div class='ctx'> </div><div class='del'>-#define TSI721_DMAC_STS(x)	(0x51014 + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_STS		0x014</div><div class='ctx'> #define TSI721_DMAC_STS_ABORT	0x00400000</div><div class='ctx'> #define TSI721_DMAC_STS_RUN	0x00200000</div><div class='ctx'> #define TSI721_DMAC_STS_CS	0x001f0000</div><div class='ctx'> </div><div class='del'>-#define TSI721_DMAC_INTE(x)	(0x51018 + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_INTE	0x018</div><div class='ctx'> </div><div class='del'>-#define TSI721_DMAC_DPTRL(x)	(0x51024 + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_DPTRL	0x024</div><div class='ctx'> #define TSI721_DMAC_DPTRL_MASK	0xffffffe0</div><div class='ctx'> </div><div class='del'>-#define TSI721_DMAC_DPTRH(x)	(0x51028 + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_DPTRH	0x028</div><div class='ctx'> </div><div class='del'>-#define TSI721_DMAC_DSBL(x)	(0x5102c + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_DSBL	0x02c</div><div class='ctx'> #define TSI721_DMAC_DSBL_MASK	0xffffffc0</div><div class='ctx'> </div><div class='del'>-#define TSI721_DMAC_DSBH(x)	(0x51030 + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_DSBH	0x030</div><div class='ctx'> </div><div class='del'>-#define TSI721_DMAC_DSSZ(x)	(0x51034 + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_DSSZ	0x034</div><div class='ctx'> #define TSI721_DMAC_DSSZ_SIZE_M	0x0000000f</div><div class='ctx'> #define TSI721_DMAC_DSSZ_SIZE(size)	(__fls(size) - 4)</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-#define TSI721_DMAC_DSRP(x)	(0x51038 + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_DSRP	0x038</div><div class='ctx'> #define TSI721_DMAC_DSRP_MASK	0x0007ffff</div><div class='ctx'> </div><div class='del'>-#define TSI721_DMAC_DSWP(x)	(0x5103c + (x) * 0x1000)</div><div class='add'>+#define TSI721_DMAC_DSWP	0x03c</div><div class='ctx'> #define TSI721_DMAC_DSWP_MASK	0x0007ffff</div><div class='ctx'> </div><div class='ctx'> #define TSI721_BDMA_INTE	0x5f000</div><div class='hunk'>@@ -612,6 +617,8 @@ enum dma_rtype {</div><div class='ctx'> #define TSI721_DMACH_MAINT	0	/* DMA channel for maint requests */</div><div class='ctx'> #define TSI721_DMACH_MAINT_NBD	32	/* Number of BDs for maint requests */</div><div class='ctx'> </div><div class='add'>+#define TSI721_DMACH_DMA	1	/* DMA channel for data transfers */</div><div class='add'>+</div><div class='ctx'> #define MSG_DMA_ENTRY_INX_TO_SIZE(x)	((0x10 &lt;&lt; (x)) &amp; 0xFFFF0)</div><div class='ctx'> </div><div class='ctx'> enum tsi721_smsg_int_flag {</div><div class='hunk'>@@ -626,7 +633,48 @@ enum tsi721_smsg_int_flag {</div><div class='ctx'> </div><div class='ctx'> /* Structures */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_RAPIDIO_DMA_ENGINE</div><div class='add'>+</div><div class='add'>+struct tsi721_tx_desc {</div><div class='add'>+	struct dma_async_tx_descriptor	txd;</div><div class='add'>+	struct tsi721_dma_desc		*hw_desc;</div><div class='add'>+	u16				destid;</div><div class='add'>+	/* low 64-bits of 66-bit RIO address */</div><div class='add'>+	u64				rio_addr;</div><div class='add'>+	/* upper 2-bits of 66-bit RIO address */</div><div class='add'>+	u8				rio_addr_u;</div><div class='add'>+	bool				interrupt;</div><div class='add'>+	struct list_head		desc_node;</div><div class='add'>+	struct list_head		tx_list;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct tsi721_bdma_chan {</div><div class='add'>+	int		id;</div><div class='add'>+	void __iomem	*regs;</div><div class='add'>+	int		bd_num;		/* number of buffer descriptors */</div><div class='add'>+	void		*bd_base;	/* start of DMA descriptors */</div><div class='add'>+	dma_addr_t	bd_phys;</div><div class='add'>+	void		*sts_base;	/* start of DMA BD status FIFO */</div><div class='add'>+	dma_addr_t	sts_phys;</div><div class='add'>+	int		sts_size;</div><div class='add'>+	u32		sts_rdptr;</div><div class='add'>+	u32		wr_count;</div><div class='add'>+	u32		wr_count_next;</div><div class='add'>+</div><div class='add'>+	struct dma_chan		dchan;</div><div class='add'>+	struct tsi721_tx_desc	*tx_desc;</div><div class='add'>+	spinlock_t		lock;</div><div class='add'>+	struct list_head	active_list;</div><div class='add'>+	struct list_head	queue;</div><div class='add'>+	struct list_head	free_list;</div><div class='add'>+	dma_cookie_t		completed_cookie;</div><div class='add'>+	struct tasklet_struct	tasklet;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_RAPIDIO_DMA_ENGINE */</div><div class='add'>+</div><div class='add'>+struct tsi721_bdma_maint {</div><div class='add'>+	int		ch_id;		/* BDMA channel number */</div><div class='ctx'> 	int		bd_num;		/* number of buffer descriptors */</div><div class='ctx'> 	void		*bd_base;	/* start of DMA descriptors */</div><div class='ctx'> 	dma_addr_t	bd_phys;</div><div class='hunk'>@@ -721,6 +769,24 @@ enum tsi721_msix_vect {</div><div class='ctx'> 	TSI721_VECT_IMB1_INT,</div><div class='ctx'> 	TSI721_VECT_IMB2_INT,</div><div class='ctx'> 	TSI721_VECT_IMB3_INT,</div><div class='add'>+#ifdef CONFIG_RAPIDIO_DMA_ENGINE</div><div class='add'>+	TSI721_VECT_DMA0_DONE,</div><div class='add'>+	TSI721_VECT_DMA1_DONE,</div><div class='add'>+	TSI721_VECT_DMA2_DONE,</div><div class='add'>+	TSI721_VECT_DMA3_DONE,</div><div class='add'>+	TSI721_VECT_DMA4_DONE,</div><div class='add'>+	TSI721_VECT_DMA5_DONE,</div><div class='add'>+	TSI721_VECT_DMA6_DONE,</div><div class='add'>+	TSI721_VECT_DMA7_DONE,</div><div class='add'>+	TSI721_VECT_DMA0_INT,</div><div class='add'>+	TSI721_VECT_DMA1_INT,</div><div class='add'>+	TSI721_VECT_DMA2_INT,</div><div class='add'>+	TSI721_VECT_DMA3_INT,</div><div class='add'>+	TSI721_VECT_DMA4_INT,</div><div class='add'>+	TSI721_VECT_DMA5_INT,</div><div class='add'>+	TSI721_VECT_DMA6_INT,</div><div class='add'>+	TSI721_VECT_DMA7_INT,</div><div class='add'>+#endif /* CONFIG_RAPIDIO_DMA_ENGINE */</div><div class='ctx'> 	TSI721_VECT_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -754,7 +820,11 @@ struct tsi721_device {</div><div class='ctx'> 	u32		pw_discard_count;</div><div class='ctx'> </div><div class='ctx'> 	/* BDMA Engine */</div><div class='add'>+	struct tsi721_bdma_maint mdma; /* Maintenance rd/wr request channel */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_RAPIDIO_DMA_ENGINE</div><div class='ctx'> 	struct tsi721_bdma_chan bdma[TSI721_DMA_CHNUM];</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/* Inbound Messaging */</div><div class='ctx'> 	int		imsg_init[TSI721_IMSG_CHNUM];</div><div class='hunk'>@@ -765,4 +835,9 @@ struct tsi721_device {</div><div class='ctx'> 	struct tsi721_omsg_ring	omsg_ring[TSI721_OMSG_CHNUM];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_RAPIDIO_DMA_ENGINE</div><div class='add'>+extern void tsi721_bdma_handler(struct tsi721_bdma_chan *bdma_chan);</div><div class='add'>+extern int __devinit tsi721_register_dma(struct tsi721_device *priv);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/rapidio/devices/tsi721_dma.c b/drivers/rapidio/devices/tsi721_dma.c<br/>new file mode 100644<br/>index 000000000000..92e06a5c62ec<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/rapidio/devices/tsi721_dma.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rapidio/devices/tsi721_dma.c</a></div><div class='hunk'>@@ -0,0 +1,823 @@</div><div class='add'>+/*</div><div class='add'>+ * DMA Engine support for Tsi721 PCIExpress-to-SRIO bridge</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2011 Integrated Device Technology, Inc.</div><div class='add'>+ * Alexandre Bounine &lt;alexandre.bounine@idt.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License as published by the Free</div><div class='add'>+ * Software Foundation; either version 2 of the License, or (at your option)</div><div class='add'>+ * any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along with</div><div class='add'>+ * this program; if not, write to the Free Software Foundation, Inc., 59</div><div class='add'>+ * Temple Place - Suite 330, Boston, MA  02111-1307, USA.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/rio.h&gt;</div><div class='add'>+#include &lt;linux/rio_drv.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/kfifo.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+</div><div class='add'>+#include "tsi721.h"</div><div class='add'>+</div><div class='add'>+static inline struct tsi721_bdma_chan *to_tsi721_chan(struct dma_chan *chan)</div><div class='add'>+{</div><div class='add'>+	return container_of(chan, struct tsi721_bdma_chan, dchan);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct tsi721_device *to_tsi721(struct dma_device *ddev)</div><div class='add'>+{</div><div class='add'>+	return container_of(ddev, struct rio_mport, dma)-&gt;priv;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline</div><div class='add'>+struct tsi721_tx_desc *to_tsi721_desc(struct dma_async_tx_descriptor *txd)</div><div class='add'>+{</div><div class='add'>+	return container_of(txd, struct tsi721_tx_desc, txd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline</div><div class='add'>+struct tsi721_tx_desc *tsi721_dma_first_active(</div><div class='add'>+				struct tsi721_bdma_chan *bdma_chan)</div><div class='add'>+{</div><div class='add'>+	return list_first_entry(&amp;bdma_chan-&gt;active_list,</div><div class='add'>+				struct tsi721_tx_desc, desc_node);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tsi721_bdma_ch_init(struct tsi721_bdma_chan *bdma_chan)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_dma_desc *bd_ptr;</div><div class='add'>+	struct device *dev = bdma_chan-&gt;dchan.device-&gt;dev;</div><div class='add'>+	u64		*sts_ptr;</div><div class='add'>+	dma_addr_t	bd_phys;</div><div class='add'>+	dma_addr_t	sts_phys;</div><div class='add'>+	int		sts_size;</div><div class='add'>+	int		bd_num = bdma_chan-&gt;bd_num;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "Init Block DMA Engine, CH%d\n", bdma_chan-&gt;id);</div><div class='add'>+</div><div class='add'>+	/* Allocate space for DMA descriptors */</div><div class='add'>+	bd_ptr = dma_zalloc_coherent(dev,</div><div class='add'>+				bd_num * sizeof(struct tsi721_dma_desc),</div><div class='add'>+				&amp;bd_phys, GFP_KERNEL);</div><div class='add'>+	if (!bd_ptr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bdma_chan-&gt;bd_phys = bd_phys;</div><div class='add'>+	bdma_chan-&gt;bd_base = bd_ptr;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "DMA descriptors @ %p (phys = %llx)\n",</div><div class='add'>+		bd_ptr, (unsigned long long)bd_phys);</div><div class='add'>+</div><div class='add'>+	/* Allocate space for descriptor status FIFO */</div><div class='add'>+	sts_size = (bd_num &gt;= TSI721_DMA_MINSTSSZ) ?</div><div class='add'>+					bd_num : TSI721_DMA_MINSTSSZ;</div><div class='add'>+	sts_size = roundup_pow_of_two(sts_size);</div><div class='add'>+	sts_ptr = dma_zalloc_coherent(dev,</div><div class='add'>+				     sts_size * sizeof(struct tsi721_dma_sts),</div><div class='add'>+				     &amp;sts_phys, GFP_KERNEL);</div><div class='add'>+	if (!sts_ptr) {</div><div class='add'>+		/* Free space allocated for DMA descriptors */</div><div class='add'>+		dma_free_coherent(dev,</div><div class='add'>+				  bd_num * sizeof(struct tsi721_dma_desc),</div><div class='add'>+				  bd_ptr, bd_phys);</div><div class='add'>+		bdma_chan-&gt;bd_base = NULL;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bdma_chan-&gt;sts_phys = sts_phys;</div><div class='add'>+	bdma_chan-&gt;sts_base = sts_ptr;</div><div class='add'>+	bdma_chan-&gt;sts_size = sts_size;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev,</div><div class='add'>+		"desc status FIFO @ %p (phys = %llx) size=0x%x\n",</div><div class='add'>+		sts_ptr, (unsigned long long)sts_phys, sts_size);</div><div class='add'>+</div><div class='add'>+	/* Initialize DMA descriptors ring */</div><div class='add'>+	bd_ptr[bd_num - 1].type_id = cpu_to_le32(DTYPE3 &lt;&lt; 29);</div><div class='add'>+	bd_ptr[bd_num - 1].next_lo = cpu_to_le32((u64)bd_phys &amp;</div><div class='add'>+						 TSI721_DMAC_DPTRL_MASK);</div><div class='add'>+	bd_ptr[bd_num - 1].next_hi = cpu_to_le32((u64)bd_phys &gt;&gt; 32);</div><div class='add'>+</div><div class='add'>+	/* Setup DMA descriptor pointers */</div><div class='add'>+	iowrite32(((u64)bd_phys &gt;&gt; 32),</div><div class='add'>+		bdma_chan-&gt;regs + TSI721_DMAC_DPTRH);</div><div class='add'>+	iowrite32(((u64)bd_phys &amp; TSI721_DMAC_DPTRL_MASK),</div><div class='add'>+		bdma_chan-&gt;regs + TSI721_DMAC_DPTRL);</div><div class='add'>+</div><div class='add'>+	/* Setup descriptor status FIFO */</div><div class='add'>+	iowrite32(((u64)sts_phys &gt;&gt; 32),</div><div class='add'>+		bdma_chan-&gt;regs + TSI721_DMAC_DSBH);</div><div class='add'>+	iowrite32(((u64)sts_phys &amp; TSI721_DMAC_DSBL_MASK),</div><div class='add'>+		bdma_chan-&gt;regs + TSI721_DMAC_DSBL);</div><div class='add'>+	iowrite32(TSI721_DMAC_DSSZ_SIZE(sts_size),</div><div class='add'>+		bdma_chan-&gt;regs + TSI721_DMAC_DSSZ);</div><div class='add'>+</div><div class='add'>+	/* Clear interrupt bits */</div><div class='add'>+	iowrite32(TSI721_DMAC_INT_ALL,</div><div class='add'>+		bdma_chan-&gt;regs + TSI721_DMAC_INT);</div><div class='add'>+</div><div class='add'>+	ioread32(bdma_chan-&gt;regs + TSI721_DMAC_INT);</div><div class='add'>+</div><div class='add'>+	/* Toggle DMA channel initialization */</div><div class='add'>+	iowrite32(TSI721_DMAC_CTL_INIT,	bdma_chan-&gt;regs + TSI721_DMAC_CTL);</div><div class='add'>+	ioread32(bdma_chan-&gt;regs + TSI721_DMAC_CTL);</div><div class='add'>+	bdma_chan-&gt;wr_count = bdma_chan-&gt;wr_count_next = 0;</div><div class='add'>+	bdma_chan-&gt;sts_rdptr = 0;</div><div class='add'>+	udelay(10);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tsi721_bdma_ch_free(struct tsi721_bdma_chan *bdma_chan)</div><div class='add'>+{</div><div class='add'>+	u32 ch_stat;</div><div class='add'>+</div><div class='add'>+	if (bdma_chan-&gt;bd_base == NULL)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Check if DMA channel still running */</div><div class='add'>+	ch_stat = ioread32(bdma_chan-&gt;regs + TSI721_DMAC_STS);</div><div class='add'>+	if (ch_stat &amp; TSI721_DMAC_STS_RUN)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/* Put DMA channel into init state */</div><div class='add'>+	iowrite32(TSI721_DMAC_CTL_INIT,	bdma_chan-&gt;regs + TSI721_DMAC_CTL);</div><div class='add'>+</div><div class='add'>+	/* Free space allocated for DMA descriptors */</div><div class='add'>+	dma_free_coherent(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+		bdma_chan-&gt;bd_num * sizeof(struct tsi721_dma_desc),</div><div class='add'>+		bdma_chan-&gt;bd_base, bdma_chan-&gt;bd_phys);</div><div class='add'>+	bdma_chan-&gt;bd_base = NULL;</div><div class='add'>+</div><div class='add'>+	/* Free space allocated for status FIFO */</div><div class='add'>+	dma_free_coherent(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+		bdma_chan-&gt;sts_size * sizeof(struct tsi721_dma_sts),</div><div class='add'>+		bdma_chan-&gt;sts_base, bdma_chan-&gt;sts_phys);</div><div class='add'>+	bdma_chan-&gt;sts_base = NULL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+tsi721_bdma_interrupt_enable(struct tsi721_bdma_chan *bdma_chan, int enable)</div><div class='add'>+{</div><div class='add'>+	if (enable) {</div><div class='add'>+		/* Clear pending BDMA channel interrupts */</div><div class='add'>+		iowrite32(TSI721_DMAC_INT_ALL,</div><div class='add'>+			bdma_chan-&gt;regs + TSI721_DMAC_INT);</div><div class='add'>+		ioread32(bdma_chan-&gt;regs + TSI721_DMAC_INT);</div><div class='add'>+		/* Enable BDMA channel interrupts */</div><div class='add'>+		iowrite32(TSI721_DMAC_INT_ALL,</div><div class='add'>+			bdma_chan-&gt;regs + TSI721_DMAC_INTE);</div><div class='add'>+	} else {</div><div class='add'>+		/* Disable BDMA channel interrupts */</div><div class='add'>+		iowrite32(0, bdma_chan-&gt;regs + TSI721_DMAC_INTE);</div><div class='add'>+		/* Clear pending BDMA channel interrupts */</div><div class='add'>+		iowrite32(TSI721_DMAC_INT_ALL,</div><div class='add'>+			bdma_chan-&gt;regs + TSI721_DMAC_INT);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool tsi721_dma_is_idle(struct tsi721_bdma_chan *bdma_chan)</div><div class='add'>+{</div><div class='add'>+	u32 sts;</div><div class='add'>+</div><div class='add'>+	sts = ioread32(bdma_chan-&gt;regs + TSI721_DMAC_STS);</div><div class='add'>+	return ((sts &amp; TSI721_DMAC_STS_RUN) == 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tsi721_bdma_handler(struct tsi721_bdma_chan *bdma_chan)</div><div class='add'>+{</div><div class='add'>+	/* Disable BDMA channel interrupts */</div><div class='add'>+	iowrite32(0, bdma_chan-&gt;regs + TSI721_DMAC_INTE);</div><div class='add'>+</div><div class='add'>+	tasklet_schedule(&amp;bdma_chan-&gt;tasklet);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PCI_MSI</div><div class='add'>+/**</div><div class='add'>+ * tsi721_omsg_msix - MSI-X interrupt handler for BDMA channels</div><div class='add'>+ * @irq: Linux interrupt number</div><div class='add'>+ * @ptr: Pointer to interrupt-specific data (BDMA channel structure)</div><div class='add'>+ *</div><div class='add'>+ * Handles BDMA channel interrupts signaled using MSI-X.</div><div class='add'>+ */</div><div class='add'>+static irqreturn_t tsi721_bdma_msix(int irq, void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_bdma_chan *bdma_chan = ptr;</div><div class='add'>+</div><div class='add'>+	tsi721_bdma_handler(bdma_chan);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_PCI_MSI */</div><div class='add'>+</div><div class='add'>+/* Must be called with the spinlock held */</div><div class='add'>+static void tsi721_start_dma(struct tsi721_bdma_chan *bdma_chan)</div><div class='add'>+{</div><div class='add'>+	if (!tsi721_dma_is_idle(bdma_chan)) {</div><div class='add'>+		dev_err(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+			"BUG: Attempt to start non-idle channel\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bdma_chan-&gt;wr_count == bdma_chan-&gt;wr_count_next) {</div><div class='add'>+		dev_err(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+			"BUG: Attempt to start DMA with no BDs ready\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+		"tx_chan: %p, chan: %d, regs: %p\n",</div><div class='add'>+		bdma_chan, bdma_chan-&gt;dchan.chan_id, bdma_chan-&gt;regs);</div><div class='add'>+</div><div class='add'>+	iowrite32(bdma_chan-&gt;wr_count_next,</div><div class='add'>+		bdma_chan-&gt;regs + TSI721_DMAC_DWRCNT);</div><div class='add'>+	ioread32(bdma_chan-&gt;regs + TSI721_DMAC_DWRCNT);</div><div class='add'>+</div><div class='add'>+	bdma_chan-&gt;wr_count = bdma_chan-&gt;wr_count_next;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tsi721_desc_put(struct tsi721_bdma_chan *bdma_chan,</div><div class='add'>+			    struct tsi721_tx_desc *desc)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+		"Put desc: %p into free list\n", desc);</div><div class='add'>+</div><div class='add'>+	if (desc) {</div><div class='add'>+		spin_lock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+		list_splice_init(&amp;desc-&gt;tx_list, &amp;bdma_chan-&gt;free_list);</div><div class='add'>+		list_add(&amp;desc-&gt;desc_node, &amp;bdma_chan-&gt;free_list);</div><div class='add'>+		bdma_chan-&gt;wr_count_next = bdma_chan-&gt;wr_count;</div><div class='add'>+		spin_unlock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static</div><div class='add'>+struct tsi721_tx_desc *tsi721_desc_get(struct tsi721_bdma_chan *bdma_chan)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_tx_desc *tx_desc, *_tx_desc;</div><div class='add'>+	struct tsi721_tx_desc *ret = NULL;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+	list_for_each_entry_safe(tx_desc, _tx_desc,</div><div class='add'>+				 &amp;bdma_chan-&gt;free_list, desc_node) {</div><div class='add'>+		if (async_tx_test_ack(&amp;tx_desc-&gt;txd)) {</div><div class='add'>+			list_del(&amp;tx_desc-&gt;desc_node);</div><div class='add'>+			ret = tx_desc;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		dev_dbg(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+			"desc %p not ACKed\n", tx_desc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i = bdma_chan-&gt;wr_count_next % bdma_chan-&gt;bd_num;</div><div class='add'>+	if (i == bdma_chan-&gt;bd_num - 1) {</div><div class='add'>+		i = 0;</div><div class='add'>+		bdma_chan-&gt;wr_count_next++; /* skip link descriptor */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bdma_chan-&gt;wr_count_next++;</div><div class='add'>+	tx_desc-&gt;txd.phys = bdma_chan-&gt;bd_phys +</div><div class='add'>+				i * sizeof(struct tsi721_dma_desc);</div><div class='add'>+	tx_desc-&gt;hw_desc = &amp;((struct tsi721_dma_desc *)bdma_chan-&gt;bd_base)[i];</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+tsi721_fill_desc(struct tsi721_bdma_chan *bdma_chan,</div><div class='add'>+	struct tsi721_tx_desc *desc, struct scatterlist *sg,</div><div class='add'>+	enum dma_rtype rtype, u32 sys_size)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_dma_desc *bd_ptr = desc-&gt;hw_desc;</div><div class='add'>+	u64 rio_addr;</div><div class='add'>+</div><div class='add'>+	if (sg_dma_len(sg) &gt; TSI721_DMAD_BCOUNT1 + 1) {</div><div class='add'>+		dev_err(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+			"SG element is too large\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+		"desc: 0x%llx, addr: 0x%llx len: 0x%x\n",</div><div class='add'>+		(u64)desc-&gt;txd.phys, (unsigned long long)sg_dma_address(sg),</div><div class='add'>+		sg_dma_len(sg));</div><div class='add'>+</div><div class='add'>+	dev_dbg(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+		"bd_ptr = %p did=%d raddr=0x%llx\n",</div><div class='add'>+		bd_ptr, desc-&gt;destid, desc-&gt;rio_addr);</div><div class='add'>+</div><div class='add'>+	/* Initialize DMA descriptor */</div><div class='add'>+	bd_ptr-&gt;type_id = cpu_to_le32((DTYPE1 &lt;&lt; 29) |</div><div class='add'>+					(rtype &lt;&lt; 19) | desc-&gt;destid);</div><div class='add'>+	if (desc-&gt;interrupt)</div><div class='add'>+		bd_ptr-&gt;type_id |= cpu_to_le32(TSI721_DMAD_IOF);</div><div class='add'>+	bd_ptr-&gt;bcount = cpu_to_le32(((desc-&gt;rio_addr &amp; 0x3) &lt;&lt; 30) |</div><div class='add'>+					(sys_size &lt;&lt; 26) | sg_dma_len(sg));</div><div class='add'>+	rio_addr = (desc-&gt;rio_addr &gt;&gt; 2) |</div><div class='add'>+				((u64)(desc-&gt;rio_addr_u &amp; 0x3) &lt;&lt; 62);</div><div class='add'>+	bd_ptr-&gt;raddr_lo = cpu_to_le32(rio_addr &amp; 0xffffffff);</div><div class='add'>+	bd_ptr-&gt;raddr_hi = cpu_to_le32(rio_addr &gt;&gt; 32);</div><div class='add'>+	bd_ptr-&gt;t1.bufptr_lo = cpu_to_le32(</div><div class='add'>+					(u64)sg_dma_address(sg) &amp; 0xffffffff);</div><div class='add'>+	bd_ptr-&gt;t1.bufptr_hi = cpu_to_le32((u64)sg_dma_address(sg) &gt;&gt; 32);</div><div class='add'>+	bd_ptr-&gt;t1.s_dist = 0;</div><div class='add'>+	bd_ptr-&gt;t1.s_size = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tsi721_dma_chain_complete(struct tsi721_bdma_chan *bdma_chan,</div><div class='add'>+				      struct tsi721_tx_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct dma_async_tx_descriptor *txd = &amp;desc-&gt;txd;</div><div class='add'>+	dma_async_tx_callback callback = txd-&gt;callback;</div><div class='add'>+	void *param = txd-&gt;callback_param;</div><div class='add'>+</div><div class='add'>+	list_splice_init(&amp;desc-&gt;tx_list, &amp;bdma_chan-&gt;free_list);</div><div class='add'>+	list_move(&amp;desc-&gt;desc_node, &amp;bdma_chan-&gt;free_list);</div><div class='add'>+	bdma_chan-&gt;completed_cookie = txd-&gt;cookie;</div><div class='add'>+</div><div class='add'>+	if (callback)</div><div class='add'>+		callback(param);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tsi721_dma_complete_all(struct tsi721_bdma_chan *bdma_chan)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_tx_desc *desc, *_d;</div><div class='add'>+	LIST_HEAD(list);</div><div class='add'>+</div><div class='add'>+	BUG_ON(!tsi721_dma_is_idle(bdma_chan));</div><div class='add'>+</div><div class='add'>+	if (!list_empty(&amp;bdma_chan-&gt;queue))</div><div class='add'>+		tsi721_start_dma(bdma_chan);</div><div class='add'>+</div><div class='add'>+	list_splice_init(&amp;bdma_chan-&gt;active_list, &amp;list);</div><div class='add'>+	list_splice_init(&amp;bdma_chan-&gt;queue, &amp;bdma_chan-&gt;active_list);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(desc, _d, &amp;list, desc_node)</div><div class='add'>+		tsi721_dma_chain_complete(bdma_chan, desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tsi721_clr_stat(struct tsi721_bdma_chan *bdma_chan)</div><div class='add'>+{</div><div class='add'>+	u32 srd_ptr;</div><div class='add'>+	u64 *sts_ptr;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	/* Check and clear descriptor status FIFO entries */</div><div class='add'>+	srd_ptr = bdma_chan-&gt;sts_rdptr;</div><div class='add'>+	sts_ptr = bdma_chan-&gt;sts_base;</div><div class='add'>+	j = srd_ptr * 8;</div><div class='add'>+	while (sts_ptr[j]) {</div><div class='add'>+		for (i = 0; i &lt; 8 &amp;&amp; sts_ptr[j]; i++, j++)</div><div class='add'>+			sts_ptr[j] = 0;</div><div class='add'>+</div><div class='add'>+		++srd_ptr;</div><div class='add'>+		srd_ptr %= bdma_chan-&gt;sts_size;</div><div class='add'>+		j = srd_ptr * 8;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iowrite32(srd_ptr, bdma_chan-&gt;regs + TSI721_DMAC_DSRP);</div><div class='add'>+	bdma_chan-&gt;sts_rdptr = srd_ptr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tsi721_advance_work(struct tsi721_bdma_chan *bdma_chan)</div><div class='add'>+{</div><div class='add'>+	if (list_empty(&amp;bdma_chan-&gt;active_list) ||</div><div class='add'>+		list_is_singular(&amp;bdma_chan-&gt;active_list)) {</div><div class='add'>+		dev_dbg(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+			"%s: Active_list empty\n", __func__);</div><div class='add'>+		tsi721_dma_complete_all(bdma_chan);</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+			"%s: Active_list NOT empty\n", __func__);</div><div class='add'>+		tsi721_dma_chain_complete(bdma_chan,</div><div class='add'>+					tsi721_dma_first_active(bdma_chan));</div><div class='add'>+		tsi721_start_dma(bdma_chan);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tsi721_dma_tasklet(unsigned long data)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_bdma_chan *bdma_chan = (struct tsi721_bdma_chan *)data;</div><div class='add'>+	u32 dmac_int, dmac_sts;</div><div class='add'>+</div><div class='add'>+	dmac_int = ioread32(bdma_chan-&gt;regs + TSI721_DMAC_INT);</div><div class='add'>+	dev_dbg(bdma_chan-&gt;dchan.device-&gt;dev, "%s: DMAC%d_INT = 0x%x\n",</div><div class='add'>+		__func__, bdma_chan-&gt;id, dmac_int);</div><div class='add'>+	/* Clear channel interrupts */</div><div class='add'>+	iowrite32(dmac_int, bdma_chan-&gt;regs + TSI721_DMAC_INT);</div><div class='add'>+</div><div class='add'>+	if (dmac_int &amp; TSI721_DMAC_INT_ERR) {</div><div class='add'>+		dmac_sts = ioread32(bdma_chan-&gt;regs + TSI721_DMAC_STS);</div><div class='add'>+		dev_err(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+			"%s: DMA ERROR - DMAC%d_STS = 0x%x\n",</div><div class='add'>+			__func__, bdma_chan-&gt;id, dmac_sts);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dmac_int &amp; TSI721_DMAC_INT_STFULL) {</div><div class='add'>+		dev_err(bdma_chan-&gt;dchan.device-&gt;dev,</div><div class='add'>+			"%s: DMAC%d descriptor status FIFO is full\n",</div><div class='add'>+			__func__, bdma_chan-&gt;id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dmac_int &amp; (TSI721_DMAC_INT_DONE | TSI721_DMAC_INT_IOFDONE)) {</div><div class='add'>+		tsi721_clr_stat(bdma_chan);</div><div class='add'>+		spin_lock(&amp;bdma_chan-&gt;lock);</div><div class='add'>+		tsi721_advance_work(bdma_chan);</div><div class='add'>+		spin_unlock(&amp;bdma_chan-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Re-Enable BDMA channel interrupts */</div><div class='add'>+	iowrite32(TSI721_DMAC_INT_ALL, bdma_chan-&gt;regs + TSI721_DMAC_INTE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static dma_cookie_t tsi721_tx_submit(struct dma_async_tx_descriptor *txd)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_tx_desc *desc = to_tsi721_desc(txd);</div><div class='add'>+	struct tsi721_bdma_chan *bdma_chan = to_tsi721_chan(txd-&gt;chan);</div><div class='add'>+	dma_cookie_t cookie;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+</div><div class='add'>+	cookie = txd-&gt;chan-&gt;cookie;</div><div class='add'>+	if (++cookie &lt; 0)</div><div class='add'>+		cookie = 1;</div><div class='add'>+	txd-&gt;chan-&gt;cookie = cookie;</div><div class='add'>+	txd-&gt;cookie = cookie;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;bdma_chan-&gt;active_list)) {</div><div class='add'>+		list_add_tail(&amp;desc-&gt;desc_node, &amp;bdma_chan-&gt;active_list);</div><div class='add'>+		tsi721_start_dma(bdma_chan);</div><div class='add'>+	} else {</div><div class='add'>+		list_add_tail(&amp;desc-&gt;desc_node, &amp;bdma_chan-&gt;queue);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+	return cookie;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tsi721_alloc_chan_resources(struct dma_chan *dchan)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_bdma_chan *bdma_chan = to_tsi721_chan(dchan);</div><div class='add'>+#ifdef CONFIG_PCI_MSI</div><div class='add'>+	struct tsi721_device *priv = to_tsi721(dchan-&gt;device);</div><div class='add'>+#endif</div><div class='add'>+	struct tsi721_tx_desc *desc = NULL;</div><div class='add'>+	LIST_HEAD(tmp_list);</div><div class='add'>+	int i;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (bdma_chan-&gt;bd_base)</div><div class='add'>+		return bdma_chan-&gt;bd_num - 1;</div><div class='add'>+</div><div class='add'>+	/* Initialize BDMA channel */</div><div class='add'>+	if (tsi721_bdma_ch_init(bdma_chan)) {</div><div class='add'>+		dev_err(dchan-&gt;device-&gt;dev, "Unable to initialize data DMA"</div><div class='add'>+			" channel %d, aborting\n", bdma_chan-&gt;id);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Alocate matching number of logical descriptors */</div><div class='add'>+	desc = kcalloc((bdma_chan-&gt;bd_num - 1), sizeof(struct tsi721_tx_desc),</div><div class='add'>+			GFP_KERNEL);</div><div class='add'>+	if (!desc) {</div><div class='add'>+		dev_err(dchan-&gt;device-&gt;dev,</div><div class='add'>+			"Failed to allocate logical descriptors\n");</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bdma_chan-&gt;tx_desc = desc;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bdma_chan-&gt;bd_num - 1; i++) {</div><div class='add'>+		dma_async_tx_descriptor_init(&amp;desc[i].txd, dchan);</div><div class='add'>+		desc[i].txd.tx_submit = tsi721_tx_submit;</div><div class='add'>+		desc[i].txd.flags = DMA_CTRL_ACK;</div><div class='add'>+		INIT_LIST_HEAD(&amp;desc[i].tx_list);</div><div class='add'>+		list_add_tail(&amp;desc[i].desc_node, &amp;tmp_list);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+	list_splice(&amp;tmp_list, &amp;bdma_chan-&gt;free_list);</div><div class='add'>+	bdma_chan-&gt;completed_cookie = dchan-&gt;cookie = 1;</div><div class='add'>+	spin_unlock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PCI_MSI</div><div class='add'>+	if (priv-&gt;flags &amp; TSI721_USING_MSIX) {</div><div class='add'>+		/* Request interrupt service if we are in MSI-X mode */</div><div class='add'>+		rc = request_irq(</div><div class='add'>+			priv-&gt;msix[TSI721_VECT_DMA0_DONE +</div><div class='add'>+				   bdma_chan-&gt;id].vector,</div><div class='add'>+			tsi721_bdma_msix, 0,</div><div class='add'>+			priv-&gt;msix[TSI721_VECT_DMA0_DONE +</div><div class='add'>+				   bdma_chan-&gt;id].irq_name,</div><div class='add'>+			(void *)bdma_chan);</div><div class='add'>+</div><div class='add'>+		if (rc) {</div><div class='add'>+			dev_dbg(dchan-&gt;device-&gt;dev,</div><div class='add'>+				"Unable to allocate MSI-X interrupt for "</div><div class='add'>+				"BDMA%d-DONE\n", bdma_chan-&gt;id);</div><div class='add'>+			goto err_out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rc = request_irq(priv-&gt;msix[TSI721_VECT_DMA0_INT +</div><div class='add'>+					    bdma_chan-&gt;id].vector,</div><div class='add'>+				tsi721_bdma_msix, 0,</div><div class='add'>+				priv-&gt;msix[TSI721_VECT_DMA0_INT +</div><div class='add'>+					   bdma_chan-&gt;id].irq_name,</div><div class='add'>+				(void *)bdma_chan);</div><div class='add'>+</div><div class='add'>+		if (rc)	{</div><div class='add'>+			dev_dbg(dchan-&gt;device-&gt;dev,</div><div class='add'>+				"Unable to allocate MSI-X interrupt for "</div><div class='add'>+				"BDMA%d-INT\n", bdma_chan-&gt;id);</div><div class='add'>+			free_irq(</div><div class='add'>+				priv-&gt;msix[TSI721_VECT_DMA0_DONE +</div><div class='add'>+					   bdma_chan-&gt;id].vector,</div><div class='add'>+				(void *)bdma_chan);</div><div class='add'>+			rc = -EIO;</div><div class='add'>+			goto err_out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+#endif /* CONFIG_PCI_MSI */</div><div class='add'>+</div><div class='add'>+	tasklet_enable(&amp;bdma_chan-&gt;tasklet);</div><div class='add'>+	tsi721_bdma_interrupt_enable(bdma_chan, 1);</div><div class='add'>+</div><div class='add'>+	return bdma_chan-&gt;bd_num - 1;</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	kfree(desc);</div><div class='add'>+	tsi721_bdma_ch_free(bdma_chan);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tsi721_free_chan_resources(struct dma_chan *dchan)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_bdma_chan *bdma_chan = to_tsi721_chan(dchan);</div><div class='add'>+#ifdef CONFIG_PCI_MSI</div><div class='add'>+	struct tsi721_device *priv = to_tsi721(dchan-&gt;device);</div><div class='add'>+#endif</div><div class='add'>+	LIST_HEAD(list);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dchan-&gt;device-&gt;dev, "%s: Entry\n", __func__);</div><div class='add'>+</div><div class='add'>+	if (bdma_chan-&gt;bd_base == NULL)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	BUG_ON(!list_empty(&amp;bdma_chan-&gt;active_list));</div><div class='add'>+	BUG_ON(!list_empty(&amp;bdma_chan-&gt;queue));</div><div class='add'>+</div><div class='add'>+	tasklet_disable(&amp;bdma_chan-&gt;tasklet);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+	list_splice_init(&amp;bdma_chan-&gt;free_list, &amp;list);</div><div class='add'>+	spin_unlock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+</div><div class='add'>+	tsi721_bdma_interrupt_enable(bdma_chan, 0);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PCI_MSI</div><div class='add'>+	if (priv-&gt;flags &amp; TSI721_USING_MSIX) {</div><div class='add'>+		free_irq(priv-&gt;msix[TSI721_VECT_DMA0_DONE +</div><div class='add'>+				    bdma_chan-&gt;id].vector, (void *)bdma_chan);</div><div class='add'>+		free_irq(priv-&gt;msix[TSI721_VECT_DMA0_INT +</div><div class='add'>+				    bdma_chan-&gt;id].vector, (void *)bdma_chan);</div><div class='add'>+	}</div><div class='add'>+#endif /* CONFIG_PCI_MSI */</div><div class='add'>+</div><div class='add'>+	tsi721_bdma_ch_free(bdma_chan);</div><div class='add'>+	kfree(bdma_chan-&gt;tx_desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static</div><div class='add'>+enum dma_status tsi721_tx_status(struct dma_chan *dchan, dma_cookie_t cookie,</div><div class='add'>+				 struct dma_tx_state *txstate)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_bdma_chan *bdma_chan = to_tsi721_chan(dchan);</div><div class='add'>+	dma_cookie_t		last_used;</div><div class='add'>+	dma_cookie_t		last_completed;</div><div class='add'>+	int			ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+	last_completed = bdma_chan-&gt;completed_cookie;</div><div class='add'>+	last_used = dchan-&gt;cookie;</div><div class='add'>+	spin_unlock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+</div><div class='add'>+	ret = dma_async_is_complete(cookie, last_completed, last_used);</div><div class='add'>+</div><div class='add'>+	dma_set_tx_state(txstate, last_completed, last_used, 0);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dchan-&gt;device-&gt;dev,</div><div class='add'>+		"%s: exit, ret: %d, last_completed: %d, last_used: %d\n",</div><div class='add'>+		__func__, ret, last_completed, last_used);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tsi721_issue_pending(struct dma_chan *dchan)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_bdma_chan *bdma_chan = to_tsi721_chan(dchan);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dchan-&gt;device-&gt;dev, "%s: Entry\n", __func__);</div><div class='add'>+</div><div class='add'>+	if (tsi721_dma_is_idle(bdma_chan)) {</div><div class='add'>+		spin_lock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+		tsi721_advance_work(bdma_chan);</div><div class='add'>+		spin_unlock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+	} else</div><div class='add'>+		dev_dbg(dchan-&gt;device-&gt;dev,</div><div class='add'>+			"%s: DMA channel still busy\n", __func__);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static</div><div class='add'>+struct dma_async_tx_descriptor *tsi721_prep_rio_sg(struct dma_chan *dchan,</div><div class='add'>+			struct scatterlist *sgl, unsigned int sg_len,</div><div class='add'>+			enum dma_transfer_direction dir, unsigned long flags,</div><div class='add'>+			void *tinfo)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_bdma_chan *bdma_chan = to_tsi721_chan(dchan);</div><div class='add'>+	struct tsi721_tx_desc *desc = NULL;</div><div class='add'>+	struct tsi721_tx_desc *first = NULL;</div><div class='add'>+	struct scatterlist *sg;</div><div class='add'>+	struct rio_dma_ext *rext = tinfo;</div><div class='add'>+	u64 rio_addr = rext-&gt;rio_addr; /* limited to 64-bit rio_addr for now */</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u32 sys_size = dma_to_mport(dchan-&gt;device)-&gt;sys_size;</div><div class='add'>+	enum dma_rtype rtype;</div><div class='add'>+</div><div class='add'>+	if (!sgl || !sg_len) {</div><div class='add'>+		dev_err(dchan-&gt;device-&gt;dev, "%s: No SG list\n", __func__);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dir == DMA_DEV_TO_MEM)</div><div class='add'>+		rtype = NREAD;</div><div class='add'>+	else if (dir == DMA_MEM_TO_DEV) {</div><div class='add'>+		switch (rext-&gt;wr_type) {</div><div class='add'>+		case RDW_ALL_NWRITE:</div><div class='add'>+			rtype = ALL_NWRITE;</div><div class='add'>+			break;</div><div class='add'>+		case RDW_ALL_NWRITE_R:</div><div class='add'>+			rtype = ALL_NWRITE_R;</div><div class='add'>+			break;</div><div class='add'>+		case RDW_LAST_NWRITE_R:</div><div class='add'>+		default:</div><div class='add'>+			rtype = LAST_NWRITE_R;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		dev_err(dchan-&gt;device-&gt;dev,</div><div class='add'>+			"%s: Unsupported DMA direction option\n", __func__);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_sg(sgl, sg, sg_len, i) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		dev_dbg(dchan-&gt;device-&gt;dev, "%s: sg #%d\n", __func__, i);</div><div class='add'>+		desc = tsi721_desc_get(bdma_chan);</div><div class='add'>+		if (!desc) {</div><div class='add'>+			dev_err(dchan-&gt;device-&gt;dev,</div><div class='add'>+				"Not enough descriptors available\n");</div><div class='add'>+			goto err_desc_get;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (sg_is_last(sg))</div><div class='add'>+			desc-&gt;interrupt = (flags &amp; DMA_PREP_INTERRUPT) != 0;</div><div class='add'>+		else</div><div class='add'>+			desc-&gt;interrupt = false;</div><div class='add'>+</div><div class='add'>+		desc-&gt;destid = rext-&gt;destid;</div><div class='add'>+		desc-&gt;rio_addr = rio_addr;</div><div class='add'>+		desc-&gt;rio_addr_u = 0;</div><div class='add'>+</div><div class='add'>+		err = tsi721_fill_desc(bdma_chan, desc, sg, rtype, sys_size);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(dchan-&gt;device-&gt;dev,</div><div class='add'>+				"Failed to build desc: %d\n", err);</div><div class='add'>+			goto err_desc_get;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rio_addr += sg_dma_len(sg);</div><div class='add'>+</div><div class='add'>+		if (!first)</div><div class='add'>+			first = desc;</div><div class='add'>+		else</div><div class='add'>+			list_add_tail(&amp;desc-&gt;desc_node, &amp;first-&gt;tx_list);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	first-&gt;txd.cookie = -EBUSY;</div><div class='add'>+	desc-&gt;txd.flags = flags;</div><div class='add'>+</div><div class='add'>+	return &amp;first-&gt;txd;</div><div class='add'>+</div><div class='add'>+err_desc_get:</div><div class='add'>+	tsi721_desc_put(bdma_chan, first);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tsi721_device_control(struct dma_chan *dchan, enum dma_ctrl_cmd cmd,</div><div class='add'>+			     unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	struct tsi721_bdma_chan *bdma_chan = to_tsi721_chan(dchan);</div><div class='add'>+	struct tsi721_tx_desc *desc, *_d;</div><div class='add'>+	LIST_HEAD(list);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dchan-&gt;device-&gt;dev, "%s: Entry\n", __func__);</div><div class='add'>+</div><div class='add'>+	if (cmd != DMA_TERMINATE_ALL)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* make sure to stop the transfer */</div><div class='add'>+	iowrite32(TSI721_DMAC_CTL_SUSP, bdma_chan-&gt;regs + TSI721_DMAC_CTL);</div><div class='add'>+</div><div class='add'>+	list_splice_init(&amp;bdma_chan-&gt;active_list, &amp;list);</div><div class='add'>+	list_splice_init(&amp;bdma_chan-&gt;queue, &amp;list);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(desc, _d, &amp;list, desc_node)</div><div class='add'>+		tsi721_dma_chain_complete(bdma_chan, desc);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;bdma_chan-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __devinit tsi721_register_dma(struct tsi721_device *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int nr_channels = TSI721_DMA_MAXCH;</div><div class='add'>+	int err;</div><div class='add'>+	struct rio_mport *mport = priv-&gt;mport;</div><div class='add'>+</div><div class='add'>+	mport-&gt;dma.dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	mport-&gt;dma.chancnt = nr_channels;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;mport-&gt;dma.channels);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_channels; i++) {</div><div class='add'>+		struct tsi721_bdma_chan *bdma_chan = &amp;priv-&gt;bdma[i];</div><div class='add'>+</div><div class='add'>+		if (i == TSI721_DMACH_MAINT)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		bdma_chan-&gt;bd_num = 64;</div><div class='add'>+		bdma_chan-&gt;regs = priv-&gt;regs + TSI721_DMAC_BASE(i);</div><div class='add'>+</div><div class='add'>+		bdma_chan-&gt;dchan.device = &amp;mport-&gt;dma;</div><div class='add'>+		bdma_chan-&gt;dchan.cookie = 1;</div><div class='add'>+		bdma_chan-&gt;dchan.chan_id = i;</div><div class='add'>+		bdma_chan-&gt;id = i;</div><div class='add'>+</div><div class='add'>+		spin_lock_init(&amp;bdma_chan-&gt;lock);</div><div class='add'>+</div><div class='add'>+		INIT_LIST_HEAD(&amp;bdma_chan-&gt;active_list);</div><div class='add'>+		INIT_LIST_HEAD(&amp;bdma_chan-&gt;queue);</div><div class='add'>+		INIT_LIST_HEAD(&amp;bdma_chan-&gt;free_list);</div><div class='add'>+</div><div class='add'>+		tasklet_init(&amp;bdma_chan-&gt;tasklet, tsi721_dma_tasklet,</div><div class='add'>+			     (unsigned long)bdma_chan);</div><div class='add'>+		tasklet_disable(&amp;bdma_chan-&gt;tasklet);</div><div class='add'>+		list_add_tail(&amp;bdma_chan-&gt;dchan.device_node,</div><div class='add'>+			      &amp;mport-&gt;dma.channels);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dma_cap_zero(mport-&gt;dma.cap_mask);</div><div class='add'>+	dma_cap_set(DMA_PRIVATE, mport-&gt;dma.cap_mask);</div><div class='add'>+	dma_cap_set(DMA_SLAVE, mport-&gt;dma.cap_mask);</div><div class='add'>+</div><div class='add'>+	mport-&gt;dma.device_alloc_chan_resources = tsi721_alloc_chan_resources;</div><div class='add'>+	mport-&gt;dma.device_free_chan_resources = tsi721_free_chan_resources;</div><div class='add'>+	mport-&gt;dma.device_tx_status = tsi721_tx_status;</div><div class='add'>+	mport-&gt;dma.device_issue_pending = tsi721_issue_pending;</div><div class='add'>+	mport-&gt;dma.device_prep_slave_sg = tsi721_prep_rio_sg;</div><div class='add'>+	mport-&gt;dma.device_control = tsi721_device_control;</div><div class='add'>+</div><div class='add'>+	err = dma_async_device_register(&amp;mport-&gt;dma);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(&amp;priv-&gt;pdev-&gt;dev, "Failed to register DMA device\n");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/rapidio/rio.c b/drivers/rapidio/rio.c<br/>index 86c9a091a2ff..c40665a4fa33 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rapidio/rio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rapidio/rio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rapidio/rio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rapidio/rio.c</a></div><div class='hunk'>@@ -1121,6 +1121,87 @@ int rio_std_route_clr_table(struct rio_mport *mport, u16 destid, u8 hopcount,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_RAPIDIO_DMA_ENGINE</div><div class='add'>+</div><div class='add'>+static bool rio_chan_filter(struct dma_chan *chan, void *arg)</div><div class='add'>+{</div><div class='add'>+	struct rio_dev *rdev = arg;</div><div class='add'>+</div><div class='add'>+	/* Check that DMA device belongs to the right MPORT */</div><div class='add'>+	return (rdev-&gt;net-&gt;hport ==</div><div class='add'>+		container_of(chan-&gt;device, struct rio_mport, dma));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rio_request_dma - request RapidIO capable DMA channel that supports</div><div class='add'>+ *   specified target RapidIO device.</div><div class='add'>+ * @rdev: RIO device control structure</div><div class='add'>+ *</div><div class='add'>+ * Returns pointer to allocated DMA channel or NULL if failed.</div><div class='add'>+ */</div><div class='add'>+struct dma_chan *rio_request_dma(struct rio_dev *rdev)</div><div class='add'>+{</div><div class='add'>+	dma_cap_mask_t mask;</div><div class='add'>+	struct dma_chan *dchan;</div><div class='add'>+</div><div class='add'>+	dma_cap_zero(mask);</div><div class='add'>+	dma_cap_set(DMA_SLAVE, mask);</div><div class='add'>+	dchan = dma_request_channel(mask, rio_chan_filter, rdev);</div><div class='add'>+</div><div class='add'>+	return dchan;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(rio_request_dma);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rio_release_dma - release specified DMA channel</div><div class='add'>+ * @dchan: DMA channel to release</div><div class='add'>+ */</div><div class='add'>+void rio_release_dma(struct dma_chan *dchan)</div><div class='add'>+{</div><div class='add'>+	dma_release_channel(dchan);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(rio_release_dma);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rio_dma_prep_slave_sg - RapidIO specific wrapper</div><div class='add'>+ *   for device_prep_slave_sg callback defined by DMAENGINE.</div><div class='add'>+ * @rdev: RIO device control structure</div><div class='add'>+ * @dchan: DMA channel to configure</div><div class='add'>+ * @data: RIO specific data descriptor</div><div class='add'>+ * @direction: DMA data transfer direction (TO or FROM the device)</div><div class='add'>+ * @flags: dmaengine defined flags</div><div class='add'>+ *</div><div class='add'>+ * Initializes RapidIO capable DMA channel for the specified data transfer.</div><div class='add'>+ * Uses DMA channel private extension to pass information related to remote</div><div class='add'>+ * target RIO device.</div><div class='add'>+ * Returns pointer to DMA transaction descriptor or NULL if failed.</div><div class='add'>+ */</div><div class='add'>+struct dma_async_tx_descriptor *rio_dma_prep_slave_sg(struct rio_dev *rdev,</div><div class='add'>+	struct dma_chan *dchan, struct rio_dma_data *data,</div><div class='add'>+	enum dma_transfer_direction direction, unsigned long flags)</div><div class='add'>+{</div><div class='add'>+	struct dma_async_tx_descriptor *txd = NULL;</div><div class='add'>+	struct rio_dma_ext rio_ext;</div><div class='add'>+</div><div class='add'>+	if (dchan-&gt;device-&gt;device_prep_slave_sg == NULL) {</div><div class='add'>+		pr_err("%s: prep_rio_sg == NULL\n", __func__);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rio_ext.destid = rdev-&gt;destid;</div><div class='add'>+	rio_ext.rio_addr_u = data-&gt;rio_addr_u;</div><div class='add'>+	rio_ext.rio_addr = data-&gt;rio_addr;</div><div class='add'>+	rio_ext.wr_type = data-&gt;wr_type;</div><div class='add'>+</div><div class='add'>+	txd = dmaengine_prep_rio_sg(dchan, data-&gt;sg, data-&gt;sg_len,</div><div class='add'>+					direction, flags, &amp;rio_ext);</div><div class='add'>+</div><div class='add'>+	return txd;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(rio_dma_prep_slave_sg);</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_RAPIDIO_DMA_ENGINE */</div><div class='add'>+</div><div class='ctx'> static void rio_fixup_device(struct rio_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/regulator/88pm8607.c b/drivers/regulator/88pm8607.c<br/>index 28b81ae4cf7f..c3482b954cb7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/88pm8607.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/88pm8607.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/88pm8607.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/88pm8607.c</a></div><div class='hunk'>@@ -27,13 +27,8 @@ struct pm8607_regulator_info {</div><div class='ctx'> 	unsigned int	*vol_table;</div><div class='ctx'> 	unsigned int	*vol_suspend;</div><div class='ctx'> </div><div class='del'>-	int	vol_reg;</div><div class='del'>-	int	vol_shift;</div><div class='del'>-	int	vol_nbits;</div><div class='ctx'> 	int	update_reg;</div><div class='ctx'> 	int	update_bit;</div><div class='del'>-	int	enable_reg;</div><div class='del'>-	int	enable_bit;</div><div class='ctx'> 	int	slope_double;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -216,7 +211,7 @@ static int pm8607_list_voltage(struct regulator_dev *rdev, unsigned index)</div><div class='ctx'> 	struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (info-&gt;vol_table &amp;&amp; (index &lt; (1 &lt;&lt; info-&gt;vol_nbits))) {</div><div class='add'>+	if (info-&gt;vol_table &amp;&amp; (index &lt; rdev-&gt;desc-&gt;n_voltages)) {</div><div class='ctx'> 		ret = info-&gt;vol_table[index];</div><div class='ctx'> 		if (info-&gt;slope_double)</div><div class='ctx'> 			ret &lt;&lt;= 1;</div><div class='hunk'>@@ -224,51 +219,16 @@ static int pm8607_list_voltage(struct regulator_dev *rdev, unsigned index)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int choose_voltage(struct regulator_dev *rdev, int min_uV, int max_uV)</div><div class='add'>+static int pm8607_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	int i, ret = -ENOENT;</div><div class='del'>-</div><div class='del'>-	if (info-&gt;slope_double) {</div><div class='del'>-		min_uV = min_uV &gt;&gt; 1;</div><div class='del'>-		max_uV = max_uV &gt;&gt; 1;</div><div class='del'>-	}</div><div class='del'>-	if (info-&gt;vol_table) {</div><div class='del'>-		for (i = 0; i &lt; (1 &lt;&lt; info-&gt;vol_nbits); i++) {</div><div class='del'>-			if (!info-&gt;vol_table[i])</div><div class='del'>-				break;</div><div class='del'>-			if ((min_uV &lt;= info-&gt;vol_table[i])</div><div class='del'>-				&amp;&amp; (max_uV &gt;= info-&gt;vol_table[i])) {</div><div class='del'>-				ret = i;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		pr_err("invalid voltage range (%d %d) uV\n", min_uV, max_uV);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pm8607_set_voltage(struct regulator_dev *rdev,</div><div class='del'>-			      int min_uV, int max_uV, unsigned *selector)</div><div class='del'>-{</div><div class='del'>-	struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	uint8_t val, mask;</div><div class='add'>+	uint8_t val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (min_uV &gt; max_uV) {</div><div class='del'>-		pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	val = (uint8_t)(selector &lt;&lt; (ffs(rdev-&gt;desc-&gt;vsel_mask) - 1));</div><div class='ctx'> </div><div class='del'>-	ret = choose_voltage(rdev, min_uV, max_uV);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	*selector = ret;</div><div class='del'>-	val = (uint8_t)(ret &lt;&lt; info-&gt;vol_shift);</div><div class='del'>-	mask = ((1 &lt;&lt; info-&gt;vol_nbits) - 1)  &lt;&lt; info-&gt;vol_shift;</div><div class='del'>-</div><div class='del'>-	ret = pm860x_set_bits(info-&gt;i2c, info-&gt;vol_reg, mask, val);</div><div class='add'>+	ret = pm860x_set_bits(info-&gt;i2c, rdev-&gt;desc-&gt;vsel_reg,</div><div class='add'>+			      rdev-&gt;desc-&gt;vsel_mask, val);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	switch (info-&gt;desc.id) {</div><div class='hunk'>@@ -282,60 +242,16 @@ static int pm8607_set_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pm8607_get_voltage(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	uint8_t val, mask;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = pm860x_reg_read(info-&gt;i2c, info-&gt;vol_reg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	mask = ((1 &lt;&lt; info-&gt;vol_nbits) - 1)  &lt;&lt; info-&gt;vol_shift;</div><div class='del'>-	val = ((unsigned char)ret &amp; mask) &gt;&gt; info-&gt;vol_shift;</div><div class='del'>-</div><div class='del'>-	return pm8607_list_voltage(rdev, val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pm8607_enable(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-</div><div class='del'>-	return pm860x_set_bits(info-&gt;i2c, info-&gt;enable_reg,</div><div class='del'>-			       1 &lt;&lt; info-&gt;enable_bit,</div><div class='del'>-			       1 &lt;&lt; info-&gt;enable_bit);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pm8607_disable(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-</div><div class='del'>-	return pm860x_set_bits(info-&gt;i2c, info-&gt;enable_reg,</div><div class='del'>-			       1 &lt;&lt; info-&gt;enable_bit, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pm8607_is_enabled(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = pm860x_reg_read(info-&gt;i2c, info-&gt;enable_reg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return !!((unsigned char)ret &amp; (1 &lt;&lt; info-&gt;enable_bit));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct regulator_ops pm8607_regulator_ops = {</div><div class='del'>-	.set_voltage	= pm8607_set_voltage,</div><div class='del'>-	.get_voltage	= pm8607_get_voltage,</div><div class='del'>-	.enable		= pm8607_enable,</div><div class='del'>-	.disable	= pm8607_disable,</div><div class='del'>-	.is_enabled	= pm8607_is_enabled,</div><div class='add'>+	.list_voltage	= pm8607_list_voltage,</div><div class='add'>+	.set_voltage_sel = pm8607_set_voltage_sel,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define PM8607_DVC(vreg, nbits, ureg, ubit, ereg, ebit)			\</div><div class='add'>+#define PM8607_DVC(vreg, ureg, ubit, ereg, ebit)			\</div><div class='ctx'> {									\</div><div class='ctx'> 	.desc	= {							\</div><div class='ctx'> 		.name	= #vreg,					\</div><div class='hunk'>@@ -343,20 +259,20 @@ static struct regulator_ops pm8607_regulator_ops = {</div><div class='ctx'> 		.type	= REGULATOR_VOLTAGE,				\</div><div class='ctx'> 		.id	= PM8607_ID_##vreg,				\</div><div class='ctx'> 		.owner	= THIS_MODULE,					\</div><div class='add'>+		.n_voltages = ARRAY_SIZE(vreg##_table),			\</div><div class='add'>+		.vsel_reg = PM8607_##vreg,				\</div><div class='add'>+		.vsel_mask = ARRAY_SIZE(vreg##_table) - 1,		\</div><div class='add'>+		.enable_reg = PM8607_##ereg,				\</div><div class='add'>+		.enable_mask = 1 &lt;&lt; (ebit),				\</div><div class='ctx'> 	},								\</div><div class='del'>-	.vol_reg	= PM8607_##vreg,				\</div><div class='del'>-	.vol_shift	= (0),						\</div><div class='del'>-	.vol_nbits	= (nbits),					\</div><div class='ctx'> 	.update_reg	= PM8607_##ureg,				\</div><div class='ctx'> 	.update_bit	= (ubit),					\</div><div class='del'>-	.enable_reg	= PM8607_##ereg,				\</div><div class='del'>-	.enable_bit	= (ebit),					\</div><div class='ctx'> 	.slope_double	= (0),						\</div><div class='ctx'> 	.vol_table	= (unsigned int *)&amp;vreg##_table,		\</div><div class='ctx'> 	.vol_suspend	= (unsigned int *)&amp;vreg##_suspend_table,	\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define PM8607_LDO(_id, vreg, shift, nbits, ereg, ebit)			\</div><div class='add'>+#define PM8607_LDO(_id, vreg, shift, ereg, ebit)			\</div><div class='ctx'> {									\</div><div class='ctx'> 	.desc	= {							\</div><div class='ctx'> 		.name	= "LDO" #_id,					\</div><div class='hunk'>@@ -364,35 +280,35 @@ static struct regulator_ops pm8607_regulator_ops = {</div><div class='ctx'> 		.type	= REGULATOR_VOLTAGE,				\</div><div class='ctx'> 		.id	= PM8607_ID_LDO##_id,				\</div><div class='ctx'> 		.owner	= THIS_MODULE,					\</div><div class='add'>+		.n_voltages = ARRAY_SIZE(LDO##_id##_table),		\</div><div class='add'>+		.vsel_reg = PM8607_##vreg,				\</div><div class='add'>+		.vsel_mask = (ARRAY_SIZE(LDO##_id##_table) - 1) &lt;&lt; (shift), \</div><div class='add'>+		.enable_reg = PM8607_##ereg,				\</div><div class='add'>+		.enable_mask = 1 &lt;&lt; (ebit),				\</div><div class='ctx'> 	},								\</div><div class='del'>-	.vol_reg	= PM8607_##vreg,				\</div><div class='del'>-	.vol_shift	= (shift),					\</div><div class='del'>-	.vol_nbits	= (nbits),					\</div><div class='del'>-	.enable_reg	= PM8607_##ereg,				\</div><div class='del'>-	.enable_bit	= (ebit),					\</div><div class='ctx'> 	.slope_double	= (0),						\</div><div class='ctx'> 	.vol_table	= (unsigned int *)&amp;LDO##_id##_table,		\</div><div class='ctx'> 	.vol_suspend	= (unsigned int *)&amp;LDO##_id##_suspend_table,	\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pm8607_regulator_info pm8607_regulator_info[] = {</div><div class='del'>-	PM8607_DVC(BUCK1, 6, GO, 0, SUPPLIES_EN11, 0),</div><div class='del'>-	PM8607_DVC(BUCK2, 6, GO, 1, SUPPLIES_EN11, 1),</div><div class='del'>-	PM8607_DVC(BUCK3, 6, GO, 2, SUPPLIES_EN11, 2),</div><div class='del'>-</div><div class='del'>-	PM8607_LDO( 1,         LDO1, 0, 2, SUPPLIES_EN11, 3),</div><div class='del'>-	PM8607_LDO( 2,         LDO2, 0, 3, SUPPLIES_EN11, 4),</div><div class='del'>-	PM8607_LDO( 3,         LDO3, 0, 3, SUPPLIES_EN11, 5),</div><div class='del'>-	PM8607_LDO( 4,         LDO4, 0, 3, SUPPLIES_EN11, 6),</div><div class='del'>-	PM8607_LDO( 5,         LDO5, 0, 2, SUPPLIES_EN11, 7),</div><div class='del'>-	PM8607_LDO( 6,         LDO6, 0, 3, SUPPLIES_EN12, 0),</div><div class='del'>-	PM8607_LDO( 7,         LDO7, 0, 3, SUPPLIES_EN12, 1),</div><div class='del'>-	PM8607_LDO( 8,         LDO8, 0, 3, SUPPLIES_EN12, 2),</div><div class='del'>-	PM8607_LDO( 9,         LDO9, 0, 3, SUPPLIES_EN12, 3),</div><div class='del'>-	PM8607_LDO(10,        LDO10, 0, 4, SUPPLIES_EN12, 4),</div><div class='del'>-	PM8607_LDO(12,        LDO12, 0, 4, SUPPLIES_EN12, 5),</div><div class='del'>-	PM8607_LDO(13, VIBRATOR_SET, 1, 3,  VIBRATOR_SET, 0),</div><div class='del'>-	PM8607_LDO(14,        LDO14, 0, 3, SUPPLIES_EN12, 6),</div><div class='add'>+	PM8607_DVC(BUCK1, GO, 0, SUPPLIES_EN11, 0),</div><div class='add'>+	PM8607_DVC(BUCK2, GO, 1, SUPPLIES_EN11, 1),</div><div class='add'>+	PM8607_DVC(BUCK3, GO, 2, SUPPLIES_EN11, 2),</div><div class='add'>+</div><div class='add'>+	PM8607_LDO(1,         LDO1, 0, SUPPLIES_EN11, 3),</div><div class='add'>+	PM8607_LDO(2,         LDO2, 0, SUPPLIES_EN11, 4),</div><div class='add'>+	PM8607_LDO(3,         LDO3, 0, SUPPLIES_EN11, 5),</div><div class='add'>+	PM8607_LDO(4,         LDO4, 0, SUPPLIES_EN11, 6),</div><div class='add'>+	PM8607_LDO(5,         LDO5, 0, SUPPLIES_EN11, 7),</div><div class='add'>+	PM8607_LDO(6,         LDO6, 0, SUPPLIES_EN12, 0),</div><div class='add'>+	PM8607_LDO(7,         LDO7, 0, SUPPLIES_EN12, 1),</div><div class='add'>+	PM8607_LDO(8,         LDO8, 0, SUPPLIES_EN12, 2),</div><div class='add'>+	PM8607_LDO(9,         LDO9, 0, SUPPLIES_EN12, 3),</div><div class='add'>+	PM8607_LDO(10,        LDO10, 0, SUPPLIES_EN12, 4),</div><div class='add'>+	PM8607_LDO(12,        LDO12, 0, SUPPLIES_EN12, 5),</div><div class='add'>+	PM8607_LDO(13, VIBRATOR_SET, 1, VIBRATOR_SET, 0),</div><div class='add'>+	PM8607_LDO(14,        LDO14, 0, SUPPLIES_EN12, 6),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __devinit pm8607_regulator_probe(struct platform_device *pdev)</div><div class='hunk'>@@ -400,6 +316,7 @@ static int __devinit pm8607_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct pm860x_chip *chip = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct pm8607_regulator_info *info = NULL;</div><div class='ctx'> 	struct regulator_init_data *pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -425,9 +342,17 @@ static int __devinit pm8607_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	if ((i == PM8607_ID_BUCK3) &amp;&amp; info-&gt;chip-&gt;buck3_double)</div><div class='ctx'> 		info-&gt;slope_double = 1;</div><div class='ctx'> </div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = pdata;</div><div class='add'>+	config.driver_data = info;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;id == CHIP_PM8607)</div><div class='add'>+		config.regmap = chip-&gt;regmap;</div><div class='add'>+	else</div><div class='add'>+		config.regmap = chip-&gt;regmap_companion;</div><div class='add'>+</div><div class='ctx'> 	/* replace driver_data with info */</div><div class='del'>-	info-&gt;regulator = regulator_register(&amp;info-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-					     pdata, info, NULL);</div><div class='add'>+	info-&gt;regulator = regulator_register(&amp;info-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(info-&gt;regulator)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to register regulator %s\n",</div><div class='ctx'> 			info-&gt;desc.name);</div><div class='head'>diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig<br/>index 36db5a441eba..c86b8864e411 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/Kconfig</a></div><div class='hunk'>@@ -223,6 +223,16 @@ config REGULATOR_PCF50633</div><div class='ctx'> 	 Say Y here to support the voltage regulators and convertors</div><div class='ctx'> 	 on PCF50633</div><div class='ctx'> </div><div class='add'>+config REGULATOR_RC5T583</div><div class='add'>+	tristate "RICOH RC5T583 Power regulators"</div><div class='add'>+	depends on MFD_RC5T583</div><div class='add'>+	help</div><div class='add'>+	  Select this option to enable the power regulator of RICOH</div><div class='add'>+	  PMIC RC5T583.</div><div class='add'>+	  This driver supports the control of different power rails of device</div><div class='add'>+	  through regulator interface. The device supports multiple DCDC/LDO</div><div class='add'>+	  outputs which can be controlled by i2c communication.</div><div class='add'>+</div><div class='ctx'> config REGULATOR_S5M8767</div><div class='ctx'> 	tristate "Samsung S5M8767A voltage regulator"</div><div class='ctx'> 	depends on MFD_S5M_CORE</div><div class='hunk'>@@ -258,6 +268,18 @@ config REGULATOR_DB8500_PRCMU</div><div class='ctx'> 	  This driver supports the voltage domain regulators controlled by the</div><div class='ctx'> 	  DB8500 PRCMU</div><div class='ctx'> </div><div class='add'>+config REGULATOR_PALMAS</div><div class='add'>+	tristate "TI Palmas PMIC Regulators"</div><div class='add'>+	depends on MFD_PALMAS</div><div class='add'>+	help</div><div class='add'>+	  If you wish to control the regulators on the Palmas series of</div><div class='add'>+	  chips say Y here. This will enable support for all the software</div><div class='add'>+	  controllable SMPS/LDO regulators.</div><div class='add'>+</div><div class='add'>+	  The regulators available on Palmas series chips vary depending</div><div class='add'>+	  on the muxing. This is handled automatically in the driver by</div><div class='add'>+	  reading the mux info from OTP.</div><div class='add'>+</div><div class='ctx'> config REGULATOR_TPS6105X</div><div class='ctx'> 	tristate "TI TPS6105X Power regulators"</div><div class='ctx'> 	depends on TPS6105X</div><div class='hunk'>@@ -268,11 +290,11 @@ config REGULATOR_TPS6105X</div><div class='ctx'> 	  audio amplifiers.</div><div class='ctx'> </div><div class='ctx'> config REGULATOR_TPS62360</div><div class='del'>-	tristate "TI TPS62360 Power Regulator"</div><div class='add'>+	tristate "TI TPS6236x Power Regulator"</div><div class='ctx'> 	depends on I2C</div><div class='ctx'> 	select REGMAP_I2C</div><div class='ctx'> 	help</div><div class='del'>-	  This driver supports TPS62360 voltage regulator chip. This</div><div class='add'>+	  This driver supports TPS6236x voltage regulator chip. This</div><div class='ctx'> 	  regulator is meant for processor core supply. This chip is</div><div class='ctx'> 	  high-frequency synchronous step down dc-dc converter optimized</div><div class='ctx'> 	  for battery-powered portable applications.</div><div class='hunk'>@@ -294,6 +316,13 @@ config REGULATOR_TPS6507X</div><div class='ctx'> 	  three step-down converters and two general-purpose LDO voltage regulators.</div><div class='ctx'> 	  It supports TI's software based Class-2 SmartReflex implementation.</div><div class='ctx'> </div><div class='add'>+config REGULATOR_TPS65090</div><div class='add'>+	tristate "TI TPS65090 Power regulator"</div><div class='add'>+	depends on MFD_TPS65090</div><div class='add'>+	help</div><div class='add'>+	  This driver provides support for the voltage regulators on the</div><div class='add'>+	  TI TPS65090 PMIC.</div><div class='add'>+</div><div class='ctx'> config REGULATOR_TPS65217</div><div class='ctx'> 	tristate "TI TPS65217 Power regulators"</div><div class='ctx'> 	depends on MFD_TPS65217</div><div class='head'>diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile<br/>index 94b52745e957..977fd46909ab 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/Makefile</a></div><div class='hunk'>@@ -9,7 +9,6 @@ obj-$(CONFIG_REGULATOR_FIXED_VOLTAGE) += fixed.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_VIRTUAL_CONSUMER) += virtual.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_USERSPACE_CONSUMER) += userspace-consumer.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_REGULATOR_GPIO) += gpio-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_AAT2870) += aat2870-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o</div><div class='hunk'>@@ -20,6 +19,7 @@ obj-$(CONFIG_REGULATOR_DA903X)	+= da903x.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_DA9052)	+= da9052-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_DBX500_PRCMU) += dbx500-prcmu.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o</div><div class='add'>+obj-$(CONFIG_REGULATOR_GPIO) += gpio-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_ISL6271A) += isl6271a-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_LP3972) += lp3972.o</div><div class='hunk'>@@ -33,13 +33,16 @@ obj-$(CONFIG_REGULATOR_MAX8998) += max8998.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_MC13783) += mc13783-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_MC13892) += mc13892-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_MC13XXX_CORE) +=  mc13xxx-regulator-core.o</div><div class='add'>+obj-$(CONFIG_REGULATOR_PALMAS) += palmas-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_PCAP) += pcap-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o</div><div class='add'>+obj-$(CONFIG_REGULATOR_RC5T583)  += rc5t583-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_TPS6105X) += tps6105x-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_TPS62360) += tps62360-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o</div><div class='add'>+obj-$(CONFIG_REGULATOR_TPS65090) += tps65090-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_TPS65217) += tps65217-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_TPS6524X) += tps6524x-regulator.o</div><div class='ctx'> obj-$(CONFIG_REGULATOR_TPS6586X) += tps6586x-regulator.o</div><div class='head'>diff --git a/drivers/regulator/aat2870-regulator.c b/drivers/regulator/aat2870-regulator.c<br/>index 9ed5c5d84e12..06776ca945f2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/aat2870-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/aat2870-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/aat2870-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/aat2870-regulator.c</a></div><div class='hunk'>@@ -24,7 +24,6 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='hunk'>@@ -178,6 +177,7 @@ static struct aat2870_regulator *aat2870_get_regulator(int id)</div><div class='ctx'> static int aat2870_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct aat2870_regulator *ri;</div><div class='add'>+	struct regulator_config config = { 0 };</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> </div><div class='ctx'> 	ri = aat2870_get_regulator(pdev-&gt;id);</div><div class='hunk'>@@ -187,8 +187,11 @@ static int aat2870_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> 	ri-&gt;aat2870 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> </div><div class='del'>-	rdev = regulator_register(&amp;ri-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-				  pdev-&gt;dev.platform_data, ri, NULL);</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.driver_data = ri;</div><div class='add'>+	config.init_data = pdev-&gt;dev.platform_data;</div><div class='add'>+</div><div class='add'>+	rdev = regulator_register(&amp;ri-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(rdev)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Failed to register regulator %s\n",</div><div class='ctx'> 			ri-&gt;desc.name);</div><div class='hunk'>@@ -231,3 +234,4 @@ module_exit(aat2870_regulator_exit);</div><div class='ctx'> MODULE_DESCRIPTION("AnalogicTech AAT2870 Regulator");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Jin Park &lt;jinyoungp@nvidia.com&gt;");</div><div class='add'>+MODULE_ALIAS("platform:aat2870-regulator");</div><div class='head'>diff --git a/drivers/regulator/ab3100.c b/drivers/regulator/ab3100.c<br/>index 042271aace6a..03f4d9c604ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/ab3100.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/ab3100.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/ab3100.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/ab3100.c</a></div><div class='hunk'>@@ -13,7 +13,6 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/abx500.h&gt;</div><div class='hunk'>@@ -305,53 +304,12 @@ static int ab3100_get_voltage_regulator(struct regulator_dev *reg)</div><div class='ctx'> 	return abreg-&gt;typ_voltages[regval];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ab3100_get_best_voltage_index(struct regulator_dev *reg,</div><div class='del'>-				   int min_uV, int max_uV)</div><div class='del'>-{</div><div class='del'>-	struct ab3100_regulator *abreg = reg-&gt;reg_data;</div><div class='del'>-	int i;</div><div class='del'>-	int bestmatch;</div><div class='del'>-	int bestindex;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Locate the minimum voltage fitting the criteria on</div><div class='del'>-	 * this regulator. The switchable voltages are not</div><div class='del'>-	 * in strict falling order so we need to check them</div><div class='del'>-	 * all for the best match.</div><div class='del'>-	 */</div><div class='del'>-	bestmatch = INT_MAX;</div><div class='del'>-	bestindex = -1;</div><div class='del'>-	for (i = 0; i &lt; abreg-&gt;voltages_len; i++) {</div><div class='del'>-		if (abreg-&gt;typ_voltages[i] &lt;= max_uV &amp;&amp;</div><div class='del'>-		    abreg-&gt;typ_voltages[i] &gt;= min_uV &amp;&amp;</div><div class='del'>-		    abreg-&gt;typ_voltages[i] &lt; bestmatch) {</div><div class='del'>-			bestmatch = abreg-&gt;typ_voltages[i];</div><div class='del'>-			bestindex = i;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (bestindex &lt; 0) {</div><div class='del'>-		dev_warn(&amp;reg-&gt;dev, "requested %d&lt;=x&lt;=%d uV, out of range!\n",</div><div class='del'>-			 min_uV, max_uV);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	return bestindex;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab3100_set_voltage_regulator(struct regulator_dev *reg,</div><div class='del'>-					int min_uV, int max_uV,</div><div class='del'>-					unsigned *selector)</div><div class='add'>+static int ab3100_set_voltage_regulator_sel(struct regulator_dev *reg,</div><div class='add'>+					    unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct ab3100_regulator *abreg = reg-&gt;reg_data;</div><div class='ctx'> 	u8 regval;</div><div class='ctx'> 	int err;</div><div class='del'>-	int bestindex;</div><div class='del'>-</div><div class='del'>-	bestindex = ab3100_get_best_voltage_index(reg, min_uV, max_uV);</div><div class='del'>-	if (bestindex &lt; 0)</div><div class='del'>-		return bestindex;</div><div class='del'>-</div><div class='del'>-	*selector = bestindex;</div><div class='ctx'> </div><div class='ctx'> 	err = abx500_get_register_interruptible(abreg-&gt;dev, 0,</div><div class='ctx'> 						abreg-&gt;regreg, &amp;regval);</div><div class='hunk'>@@ -364,7 +322,7 @@ static int ab3100_set_voltage_regulator(struct regulator_dev *reg,</div><div class='ctx'> </div><div class='ctx'> 	/* The highest three bits control the variable regulators */</div><div class='ctx'> 	regval &amp;= ~0xE0;</div><div class='del'>-	regval |= (bestindex &lt;&lt; 5);</div><div class='add'>+	regval |= (selector &lt;&lt; 5);</div><div class='ctx'> </div><div class='ctx'> 	err = abx500_set_register_interruptible(abreg-&gt;dev, 0,</div><div class='ctx'> 						abreg-&gt;regreg, regval);</div><div class='hunk'>@@ -392,7 +350,7 @@ static int ab3100_set_suspend_voltage_regulator(struct regulator_dev *reg,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* LDO E and BUCK have special suspend voltages you can set */</div><div class='del'>-	bestindex = ab3100_get_best_voltage_index(reg, uV, uV);</div><div class='add'>+	bestindex = regulator_map_voltage_iterate(reg, uV, uV);</div><div class='ctx'> </div><div class='ctx'> 	err = abx500_get_register_interruptible(abreg-&gt;dev, 0,</div><div class='ctx'> 						targetreg, &amp;regval);</div><div class='hunk'>@@ -464,7 +422,7 @@ static struct regulator_ops regulator_ops_variable = {</div><div class='ctx'> 	.disable     = ab3100_disable_regulator,</div><div class='ctx'> 	.is_enabled  = ab3100_is_enabled_regulator,</div><div class='ctx'> 	.get_voltage = ab3100_get_voltage_regulator,</div><div class='del'>-	.set_voltage = ab3100_set_voltage_regulator,</div><div class='add'>+	.set_voltage_sel = ab3100_set_voltage_regulator_sel,</div><div class='ctx'> 	.list_voltage = ab3100_list_voltage_regulator,</div><div class='ctx'> 	.enable_time = ab3100_enable_time_regulator,</div><div class='ctx'> };</div><div class='hunk'>@@ -474,7 +432,7 @@ static struct regulator_ops regulator_ops_variable_sleepable = {</div><div class='ctx'> 	.disable     = ab3100_disable_regulator,</div><div class='ctx'> 	.is_enabled  = ab3100_is_enabled_regulator,</div><div class='ctx'> 	.get_voltage = ab3100_get_voltage_regulator,</div><div class='del'>-	.set_voltage = ab3100_set_voltage_regulator,</div><div class='add'>+	.set_voltage_sel = ab3100_set_voltage_regulator_sel,</div><div class='ctx'> 	.set_suspend_voltage = ab3100_set_suspend_voltage_regulator,</div><div class='ctx'> 	.list_voltage = ab3100_list_voltage_regulator,</div><div class='ctx'> 	.enable_time = ab3100_enable_time_regulator,</div><div class='hunk'>@@ -582,6 +540,7 @@ ab3100_regulator_desc[AB3100_NUM_REGULATORS] = {</div><div class='ctx'> static int __devinit ab3100_regulators_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ab3100_platform_data *plfdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	u8 data;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -627,15 +586,15 @@ static int __devinit ab3100_regulators_probe(struct platform_device *pdev)</div><div class='ctx'> 		reg-&gt;dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 		reg-&gt;plfdata = plfdata;</div><div class='ctx'> </div><div class='add'>+		config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+		config.driver_data = reg;</div><div class='add'>+		config.init_data = &amp;plfdata-&gt;reg_constraints[i];</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Register the regulator, pass around</div><div class='ctx'> 		 * the ab3100_regulator struct</div><div class='ctx'> 		 */</div><div class='del'>-		rdev = regulator_register(&amp;ab3100_regulator_desc[i],</div><div class='del'>-					  &amp;pdev-&gt;dev,</div><div class='del'>-					  &amp;plfdata-&gt;reg_constraints[i],</div><div class='del'>-					  reg, NULL);</div><div class='del'>-</div><div class='add'>+		rdev = regulator_register(&amp;ab3100_regulator_desc[i], &amp;config);</div><div class='ctx'> 		if (IS_ERR(rdev)) {</div><div class='ctx'> 			err = PTR_ERR(rdev);</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev,</div><div class='head'>diff --git a/drivers/regulator/ab8500.c b/drivers/regulator/ab8500.c<br/>index c7ee4c15d6f5..e1b8c54ace5a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/ab8500.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/ab8500.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/ab8500.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/ab8500.c</a></div><div class='hunk'>@@ -18,9 +18,12 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/abx500.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/abx500/ab8500.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/regulator/of_regulator.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/ab8500.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct ab8500_regulator_info - ab8500 regulator information</div><div class='hunk'>@@ -234,25 +237,8 @@ static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)</div><div class='ctx'> 		return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ab8500_get_best_voltage_index(struct regulator_dev *rdev,</div><div class='del'>-		int min_uV, int max_uV)</div><div class='del'>-{</div><div class='del'>-	struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* check the supported voltage */</div><div class='del'>-	for (i = 0; i &lt; info-&gt;voltages_len; i++) {</div><div class='del'>-		if ((info-&gt;voltages[i] &gt;= min_uV) &amp;&amp;</div><div class='del'>-		    (info-&gt;voltages[i] &lt;= max_uV))</div><div class='del'>-			return i;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ab8500_regulator_set_voltage(struct regulator_dev *rdev,</div><div class='del'>-					int min_uV, int max_uV,</div><div class='del'>-					unsigned *selector)</div><div class='add'>+static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+					    unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='hunk'>@@ -263,18 +249,8 @@ static int ab8500_regulator_set_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* get the appropriate voltages within the range */</div><div class='del'>-	ret = ab8500_get_best_voltage_index(rdev, min_uV, max_uV);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		dev_err(rdev_get_dev(rdev),</div><div class='del'>-				"couldn't get best voltage for regulator\n");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*selector = ret;</div><div class='del'>-</div><div class='ctx'> 	/* set the registers for the request */</div><div class='del'>-	regval = (u8)ret;</div><div class='add'>+	regval = (u8)selector;</div><div class='ctx'> 	ret = abx500_mask_and_set_register_interruptible(info-&gt;dev,</div><div class='ctx'> 			info-&gt;voltage_bank, info-&gt;voltage_reg,</div><div class='ctx'> 			info-&gt;voltage_mask, regval);</div><div class='hunk'>@@ -319,7 +295,7 @@ static struct regulator_ops ab8500_regulator_ops = {</div><div class='ctx'> 	.disable	= ab8500_regulator_disable,</div><div class='ctx'> 	.is_enabled	= ab8500_regulator_is_enabled,</div><div class='ctx'> 	.get_voltage_sel = ab8500_regulator_get_voltage_sel,</div><div class='del'>-	.set_voltage	= ab8500_regulator_set_voltage,</div><div class='add'>+	.set_voltage_sel = ab8500_regulator_set_voltage_sel,</div><div class='ctx'> 	.list_voltage	= ab8500_list_voltage,</div><div class='ctx'> 	.enable_time	= ab8500_regulator_enable_time,</div><div class='ctx'> 	.set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,</div><div class='hunk'>@@ -735,12 +711,139 @@ static struct ab8500_reg_init ab8500_reg_init[] = {</div><div class='ctx'> 	REG_INIT(AB8500_REGUCTRLDISCH2,		0x04, 0x44, 0x16),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static __devinit int</div><div class='add'>+ab8500_regulator_init_registers(struct platform_device *pdev, int id, int value)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (value &amp; ~ab8500_reg_init[id].mask) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"Configuration error: value outside mask.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = abx500_mask_and_set_register_interruptible(</div><div class='add'>+		&amp;pdev-&gt;dev,</div><div class='add'>+		ab8500_reg_init[id].bank,</div><div class='add'>+		ab8500_reg_init[id].addr,</div><div class='add'>+		ab8500_reg_init[id].mask,</div><div class='add'>+		value);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"Failed to initialize 0x%02x, 0x%02x.\n",</div><div class='add'>+			ab8500_reg_init[id].bank,</div><div class='add'>+			ab8500_reg_init[id].addr);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_vdbg(&amp;pdev-&gt;dev,</div><div class='add'>+		"init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",</div><div class='add'>+		ab8500_reg_init[id].bank,</div><div class='add'>+		ab8500_reg_init[id].addr,</div><div class='add'>+		ab8500_reg_init[id].mask,</div><div class='add'>+		value);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __devinit int ab8500_regulator_register(struct platform_device *pdev,</div><div class='add'>+					struct regulator_init_data *init_data,</div><div class='add'>+					int id,</div><div class='add'>+					struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	struct ab8500_regulator_info *info = NULL;</div><div class='add'>+	struct regulator_config config = { };</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* assign per-regulator data */</div><div class='add'>+	info = &amp;ab8500_regulator_info[id];</div><div class='add'>+	info-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = init_data;</div><div class='add'>+	config.driver_data = info;</div><div class='add'>+	config.of_node = np;</div><div class='add'>+</div><div class='add'>+	/* fix for hardware before ab8500v2.0 */</div><div class='add'>+	if (abx500_get_chip_id(info-&gt;dev) &lt; 0x20) {</div><div class='add'>+		if (info-&gt;desc.id == AB8500_LDO_AUX3) {</div><div class='add'>+			info-&gt;desc.n_voltages =</div><div class='add'>+				ARRAY_SIZE(ldo_vauxn_voltages);</div><div class='add'>+			info-&gt;voltages = ldo_vauxn_voltages;</div><div class='add'>+			info-&gt;voltages_len =</div><div class='add'>+				ARRAY_SIZE(ldo_vauxn_voltages);</div><div class='add'>+			info-&gt;voltage_mask = 0xf;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* register regulator with framework */</div><div class='add'>+	info-&gt;regulator = regulator_register(&amp;info-&gt;desc, &amp;config);</div><div class='add'>+	if (IS_ERR(info-&gt;regulator)) {</div><div class='add'>+		err = PTR_ERR(info-&gt;regulator);</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to register regulator %s\n",</div><div class='add'>+			info-&gt;desc.name);</div><div class='add'>+		/* when we fail, un-register all earlier regulators */</div><div class='add'>+		while (--id &gt;= 0) {</div><div class='add'>+			info = &amp;ab8500_regulator_info[id];</div><div class='add'>+			regulator_unregister(info-&gt;regulator);</div><div class='add'>+		}</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct of_regulator_match ab8500_regulator_matches[] = {</div><div class='add'>+	{ .name	= "LDO-AUX1",    .driver_data = (void *) AB8500_LDO_AUX1, },</div><div class='add'>+	{ .name	= "LDO-AUX2",    .driver_data = (void *) AB8500_LDO_AUX2, },</div><div class='add'>+	{ .name	= "LDO-AUX3",    .driver_data = (void *) AB8500_LDO_AUX3, },</div><div class='add'>+	{ .name	= "LDO-INTCORE", .driver_data = (void *) AB8500_LDO_INTCORE, },</div><div class='add'>+	{ .name	= "LDO-TVOUT",   .driver_data = (void *) AB8500_LDO_TVOUT, },</div><div class='add'>+	{ .name = "LDO-USB",     .driver_data = (void *) AB8500_LDO_USB, },</div><div class='add'>+	{ .name = "LDO-AUDIO",   .driver_data = (void *) AB8500_LDO_AUDIO, },</div><div class='add'>+	{ .name	= "LDO-ANAMIC1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },</div><div class='add'>+	{ .name	= "LDO-ANAMIC2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },</div><div class='add'>+	{ .name	= "LDO-DMIC",    .driver_data = (void *) AB8500_LDO_DMIC, },</div><div class='add'>+	{ .name	= "LDO-ANA",     .driver_data = (void *) AB8500_LDO_ANA, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __devinit int</div><div class='add'>+ab8500_regulator_of_probe(struct platform_device *pdev, struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ab8500_regulator_info); i++) {</div><div class='add'>+		err = ab8500_regulator_register(</div><div class='add'>+			pdev, ab8500_regulator_matches[i].init_data,</div><div class='add'>+			i, ab8500_regulator_matches[i].of_node);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static __devinit int ab8500_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ab8500 *ab8500 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct ab8500_platform_data *pdata;</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='ctx'> 	int i, err;</div><div class='ctx'> </div><div class='add'>+	if (np) {</div><div class='add'>+		err = of_regulator_match(&amp;pdev-&gt;dev, np,</div><div class='add'>+					ab8500_regulator_matches,</div><div class='add'>+					ARRAY_SIZE(ab8500_regulator_matches));</div><div class='add'>+		if (err &lt; 0) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+				"Error parsing regulator init data: %d\n", err);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = ab8500_regulator_of_probe(pdev, np);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!ab8500) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "null mfd parent\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -759,8 +862,7 @@ static __devinit int ab8500_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	/* initialize registers */</div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;num_regulator_reg_init; i++) {</div><div class='del'>-		int id;</div><div class='del'>-		u8 value;</div><div class='add'>+		int id, value;</div><div class='ctx'> </div><div class='ctx'> 		id = pdata-&gt;regulator_reg_init[i].id;</div><div class='ctx'> 		value = pdata-&gt;regulator_reg_init[i].value;</div><div class='hunk'>@@ -771,70 +873,17 @@ static __devinit int ab8500_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 				"Configuration error: id outside range.\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-		if (value &amp; ~ab8500_reg_init[id].mask) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-				"Configuration error: value outside mask.\n");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='del'>-		/* initialize register */</div><div class='del'>-		err = abx500_mask_and_set_register_interruptible(&amp;pdev-&gt;dev,</div><div class='del'>-			ab8500_reg_init[id].bank,</div><div class='del'>-			ab8500_reg_init[id].addr,</div><div class='del'>-			ab8500_reg_init[id].mask,</div><div class='del'>-			value);</div><div class='del'>-		if (err &lt; 0) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-				"Failed to initialize 0x%02x, 0x%02x.\n",</div><div class='del'>-				ab8500_reg_init[id].bank,</div><div class='del'>-				ab8500_reg_init[id].addr);</div><div class='add'>+		err = ab8500_regulator_init_registers(pdev, id, value);</div><div class='add'>+		if (err &lt; 0)</div><div class='ctx'> 			return err;</div><div class='del'>-		}</div><div class='del'>-		dev_vdbg(&amp;pdev-&gt;dev,</div><div class='del'>-			"  init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",</div><div class='del'>-			ab8500_reg_init[id].bank,</div><div class='del'>-			ab8500_reg_init[id].addr,</div><div class='del'>-			ab8500_reg_init[id].mask,</div><div class='del'>-			value);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* register all regulators */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(ab8500_regulator_info); i++) {</div><div class='del'>-		struct ab8500_regulator_info *info = NULL;</div><div class='del'>-</div><div class='del'>-		/* assign per-regulator data */</div><div class='del'>-		info = &amp;ab8500_regulator_info[i];</div><div class='del'>-		info-&gt;dev = &amp;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-		/* fix for hardware before ab8500v2.0 */</div><div class='del'>-		if (abx500_get_chip_id(info-&gt;dev) &lt; 0x20) {</div><div class='del'>-			if (info-&gt;desc.id == AB8500_LDO_AUX3) {</div><div class='del'>-				info-&gt;desc.n_voltages =</div><div class='del'>-					ARRAY_SIZE(ldo_vauxn_voltages);</div><div class='del'>-				info-&gt;voltages = ldo_vauxn_voltages;</div><div class='del'>-				info-&gt;voltages_len =</div><div class='del'>-					ARRAY_SIZE(ldo_vauxn_voltages);</div><div class='del'>-				info-&gt;voltage_mask = 0xf;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* register regulator with framework */</div><div class='del'>-		info-&gt;regulator = regulator_register(&amp;info-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-				&amp;pdata-&gt;regulator[i], info, NULL);</div><div class='del'>-		if (IS_ERR(info-&gt;regulator)) {</div><div class='del'>-			err = PTR_ERR(info-&gt;regulator);</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "failed to register regulator %s\n",</div><div class='del'>-					info-&gt;desc.name);</div><div class='del'>-			/* when we fail, un-register all earlier regulators */</div><div class='del'>-			while (--i &gt;= 0) {</div><div class='del'>-				info = &amp;ab8500_regulator_info[i];</div><div class='del'>-				regulator_unregister(info-&gt;regulator);</div><div class='del'>-			}</div><div class='add'>+		err = ab8500_regulator_register(pdev, &amp;pdata-&gt;regulator[i], i, NULL);</div><div class='add'>+		if (err &lt; 0)</div><div class='ctx'> 			return err;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		dev_vdbg(rdev_get_dev(info-&gt;regulator),</div><div class='del'>-			"%s-probed\n", info-&gt;desc.name);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -857,12 +906,18 @@ static __devexit int ab8500_regulator_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct of_device_id ab8500_regulator_match[] = {</div><div class='add'>+        { .compatible = "stericsson,ab8500-regulator", },</div><div class='add'>+        {}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct platform_driver ab8500_regulator_driver = {</div><div class='ctx'> 	.probe = ab8500_regulator_probe,</div><div class='ctx'> 	.remove = __devexit_p(ab8500_regulator_remove),</div><div class='ctx'> 	.driver         = {</div><div class='ctx'> 		.name   = "ab8500-regulator",</div><div class='ctx'> 		.owner  = THIS_MODULE,</div><div class='add'>+		.of_match_table = ab8500_regulator_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/ad5398.c b/drivers/regulator/ad5398.c<br/>index 26d23adfc66f..46d05f38baf8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/ad5398.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/ad5398.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/ad5398.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/ad5398.c</a></div><div class='hunk'>@@ -99,8 +99,8 @@ static int ad5398_set_current_limit(struct regulator_dev *rdev, int min_uA, int</div><div class='ctx'> 	if (ad5398_calc_current(chip, selector) &gt; max_uA)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;client-&gt;dev, "changing current %dmA\n",</div><div class='del'>-		ad5398_calc_current(chip, selector) / 1000);</div><div class='add'>+	dev_dbg(&amp;client-&gt;dev, "changing current %duA\n",</div><div class='add'>+		ad5398_calc_current(chip, selector));</div><div class='ctx'> </div><div class='ctx'> 	/* read chip enable bit */</div><div class='ctx'> 	ret = ad5398_read_reg(client, &amp;data);</div><div class='hunk'>@@ -184,7 +184,7 @@ static struct regulator_ops ad5398_ops = {</div><div class='ctx'> 	.is_enabled = ad5398_is_enabled,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc ad5398_reg = {</div><div class='add'>+static const struct regulator_desc ad5398_reg = {</div><div class='ctx'> 	.name = "isink",</div><div class='ctx'> 	.id = 0,</div><div class='ctx'> 	.ops = &amp;ad5398_ops,</div><div class='hunk'>@@ -212,6 +212,7 @@ static int __devinit ad5398_probe(struct i2c_client *client,</div><div class='ctx'> 				const struct i2c_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct regulator_init_data *init_data = client-&gt;dev.platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct ad5398_chip_info *chip;</div><div class='ctx'> 	const struct ad5398_current_data_format *df =</div><div class='ctx'> 			(struct ad5398_current_data_format *)id-&gt;driver_data;</div><div class='hunk'>@@ -220,10 +221,14 @@ static int __devinit ad5398_probe(struct i2c_client *client,</div><div class='ctx'> 	if (!init_data)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	chip = kzalloc(sizeof(*chip), GFP_KERNEL);</div><div class='add'>+	chip = devm_kzalloc(&amp;client-&gt;dev, sizeof(*chip), GFP_KERNEL);</div><div class='ctx'> 	if (!chip)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	config.dev = &amp;client-&gt;dev;</div><div class='add'>+	config.init_data = init_data;</div><div class='add'>+	config.driver_data = chip;</div><div class='add'>+</div><div class='ctx'> 	chip-&gt;client = client;</div><div class='ctx'> </div><div class='ctx'> 	chip-&gt;min_uA = df-&gt;min_uA;</div><div class='hunk'>@@ -232,8 +237,7 @@ static int __devinit ad5398_probe(struct i2c_client *client,</div><div class='ctx'> 	chip-&gt;current_offset = df-&gt;current_offset;</div><div class='ctx'> 	chip-&gt;current_mask = (chip-&gt;current_level - 1) &lt;&lt; chip-&gt;current_offset;</div><div class='ctx'> </div><div class='del'>-	chip-&gt;rdev = regulator_register(&amp;ad5398_reg, &amp;client-&gt;dev,</div><div class='del'>-					init_data, chip, NULL);</div><div class='add'>+	chip-&gt;rdev = regulator_register(&amp;ad5398_reg, &amp;config);</div><div class='ctx'> 	if (IS_ERR(chip-&gt;rdev)) {</div><div class='ctx'> 		ret = PTR_ERR(chip-&gt;rdev);</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "failed to register %s %s\n",</div><div class='hunk'>@@ -246,7 +250,6 @@ static int __devinit ad5398_probe(struct i2c_client *client,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	kfree(chip);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -255,8 +258,6 @@ static int __devexit ad5398_remove(struct i2c_client *client)</div><div class='ctx'> 	struct ad5398_chip_info *chip = i2c_get_clientdata(client);</div><div class='ctx'> </div><div class='ctx'> 	regulator_unregister(chip-&gt;rdev);</div><div class='del'>-	kfree(chip);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/anatop-regulator.c b/drivers/regulator/anatop-regulator.c<br/>index 81fd606e47bc..3660bace123c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/anatop-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/anatop-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/anatop-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/anatop-regulator.c</a></div><div class='hunk'>@@ -47,7 +47,7 @@ static int anatop_set_voltage(struct regulator_dev *reg, int min_uV,</div><div class='ctx'> 				  int max_uV, unsigned *selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);</div><div class='del'>-	u32 val, sel;</div><div class='add'>+	u32 val, sel, mask;</div><div class='ctx'> 	int uv;</div><div class='ctx'> </div><div class='ctx'> 	uv = min_uV;</div><div class='hunk'>@@ -71,11 +71,10 @@ static int anatop_set_voltage(struct regulator_dev *reg, int min_uV,</div><div class='ctx'> 	val = anatop_reg-&gt;min_bit_val + sel;</div><div class='ctx'> 	*selector = sel;</div><div class='ctx'> 	dev_dbg(&amp;reg-&gt;dev, "%s: calculated val %d\n", __func__, val);</div><div class='del'>-	anatop_set_bits(anatop_reg-&gt;mfd,</div><div class='del'>-			anatop_reg-&gt;control_reg,</div><div class='del'>-			anatop_reg-&gt;vol_bit_shift,</div><div class='del'>-			anatop_reg-&gt;vol_bit_width,</div><div class='del'>-			val);</div><div class='add'>+	mask = ((1 &lt;&lt; anatop_reg-&gt;vol_bit_width) - 1) &lt;&lt;</div><div class='add'>+		anatop_reg-&gt;vol_bit_shift;</div><div class='add'>+	val &lt;&lt;= anatop_reg-&gt;vol_bit_shift;</div><div class='add'>+	anatop_write_reg(anatop_reg-&gt;mfd, anatop_reg-&gt;control_reg, val, mask);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -88,10 +87,9 @@ static int anatop_get_voltage_sel(struct regulator_dev *reg)</div><div class='ctx'> 	if (!anatop_reg-&gt;control_reg)</div><div class='ctx'> 		return -ENOTSUPP;</div><div class='ctx'> </div><div class='del'>-	val = anatop_get_bits(anatop_reg-&gt;mfd,</div><div class='del'>-			      anatop_reg-&gt;control_reg,</div><div class='del'>-			      anatop_reg-&gt;vol_bit_shift,</div><div class='del'>-			      anatop_reg-&gt;vol_bit_width);</div><div class='add'>+	val = anatop_read_reg(anatop_reg-&gt;mfd, anatop_reg-&gt;control_reg);</div><div class='add'>+	val = (val &amp; ((1 &lt;&lt; anatop_reg-&gt;vol_bit_width) - 1)) &gt;&gt;</div><div class='add'>+		anatop_reg-&gt;vol_bit_shift;</div><div class='ctx'> </div><div class='ctx'> 	return val - anatop_reg-&gt;min_bit_val;</div><div class='ctx'> }</div><div class='hunk'>@@ -122,6 +120,7 @@ static int __devinit anatop_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct anatop_regulator *sreg;</div><div class='ctx'> 	struct regulator_init_data *initdata;</div><div class='ctx'> 	struct anatop *anatopmfd = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	initdata = of_get_regulator_init_data(dev, np);</div><div class='hunk'>@@ -178,9 +177,13 @@ static int __devinit anatop_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	rdesc-&gt;n_voltages = (sreg-&gt;max_voltage - sreg-&gt;min_voltage)</div><div class='ctx'> 		/ 25000 + 1;</div><div class='ctx'> </div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = initdata;</div><div class='add'>+	config.driver_data = sreg;</div><div class='add'>+	config.of_node = pdev-&gt;dev.of_node;</div><div class='add'>+</div><div class='ctx'> 	/* register regulator */</div><div class='del'>-	rdev = regulator_register(rdesc, dev,</div><div class='del'>-				  initdata, sreg, pdev-&gt;dev.of_node);</div><div class='add'>+	rdev = regulator_register(rdesc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(rdev)) {</div><div class='ctx'> 		dev_err(dev, "failed to register %s\n",</div><div class='ctx'> 			rdesc-&gt;name);</div><div class='head'>diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c<br/>index e70dd382a009..7584a74eec8a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/core.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/of_regulator.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='hunk'>@@ -74,6 +75,7 @@ struct regulator_map {</div><div class='ctx'> struct regulator {</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct list_head list;</div><div class='add'>+	unsigned int always_on:1;</div><div class='ctx'> 	int uA_load;</div><div class='ctx'> 	int min_uV;</div><div class='ctx'> 	int max_uV;</div><div class='hunk'>@@ -155,6 +157,17 @@ static struct device_node *of_get_regulator(struct device *dev, const char *supp</div><div class='ctx'> 	return regnode;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int _regulator_can_change_status(struct regulator_dev *rdev)</div><div class='add'>+{</div><div class='add'>+	if (!rdev-&gt;constraints)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (rdev-&gt;constraints-&gt;valid_ops_mask &amp; REGULATOR_CHANGE_STATUS)</div><div class='add'>+		return 1;</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Platform voltage constraint check */</div><div class='ctx'> static int regulator_check_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 				   int *min_uV, int *max_uV)</div><div class='hunk'>@@ -649,7 +662,7 @@ static void drms_uA_update(struct regulator_dev *rdev)</div><div class='ctx'> 	/* get input voltage */</div><div class='ctx'> 	input_uV = 0;</div><div class='ctx'> 	if (rdev-&gt;supply)</div><div class='del'>-		input_uV = _regulator_get_voltage(rdev);</div><div class='add'>+		input_uV = regulator_get_voltage(rdev-&gt;supply);</div><div class='ctx'> 	if (input_uV &lt;= 0)</div><div class='ctx'> 		input_uV = rdev-&gt;constraints-&gt;input_uV;</div><div class='ctx'> 	if (input_uV &lt;= 0)</div><div class='hunk'>@@ -673,17 +686,14 @@ static int suspend_set_state(struct regulator_dev *rdev,</div><div class='ctx'> 	struct regulator_state *rstate)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	bool can_set_state;</div><div class='del'>-</div><div class='del'>-	can_set_state = rdev-&gt;desc-&gt;ops-&gt;set_suspend_enable &amp;&amp;</div><div class='del'>-		rdev-&gt;desc-&gt;ops-&gt;set_suspend_disable;</div><div class='ctx'> </div><div class='ctx'> 	/* If we have no suspend mode configration don't set anything;</div><div class='del'>-	 * only warn if the driver actually makes the suspend mode</div><div class='del'>-	 * configurable.</div><div class='add'>+	 * only warn if the driver implements set_suspend_voltage or</div><div class='add'>+	 * set_suspend_mode callback.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!rstate-&gt;enabled &amp;&amp; !rstate-&gt;disabled) {</div><div class='del'>-		if (can_set_state)</div><div class='add'>+		if (rdev-&gt;desc-&gt;ops-&gt;set_suspend_voltage ||</div><div class='add'>+		    rdev-&gt;desc-&gt;ops-&gt;set_suspend_mode)</div><div class='ctx'> 			rdev_warn(rdev, "No configuration\n");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -693,15 +703,13 @@ static int suspend_set_state(struct regulator_dev *rdev,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!can_set_state) {</div><div class='del'>-		rdev_err(rdev, "no way to set suspend state\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rstate-&gt;enabled)</div><div class='add'>+	if (rstate-&gt;enabled &amp;&amp; rdev-&gt;desc-&gt;ops-&gt;set_suspend_enable)</div><div class='ctx'> 		ret = rdev-&gt;desc-&gt;ops-&gt;set_suspend_enable(rdev);</div><div class='del'>-	else</div><div class='add'>+	else if (rstate-&gt;disabled &amp;&amp; rdev-&gt;desc-&gt;ops-&gt;set_suspend_disable)</div><div class='ctx'> 		ret = rdev-&gt;desc-&gt;ops-&gt;set_suspend_disable(rdev);</div><div class='add'>+	else /* OK if set_suspend_enable or set_suspend_disable is NULL */</div><div class='add'>+		ret = 0;</div><div class='add'>+</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		rdev_err(rdev, "failed to enabled/disable\n");</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1146,6 +1154,15 @@ static struct regulator *create_regulator(struct regulator_dev *rdev,</div><div class='ctx'> 				   &amp;regulator-&gt;max_uV);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Check now if the regulator is an always on regulator - if</div><div class='add'>+	 * it is then we don't need to do nearly so much work for</div><div class='add'>+	 * enable/disable calls.</div><div class='add'>+	 */</div><div class='add'>+	if (!_regulator_can_change_status(rdev) &amp;&amp;</div><div class='add'>+	    _regulator_is_enabled(rdev))</div><div class='add'>+		regulator-&gt;always_on = true;</div><div class='add'>+</div><div class='ctx'> 	mutex_unlock(&amp;rdev-&gt;mutex);</div><div class='ctx'> 	return regulator;</div><div class='ctx'> link_name_err:</div><div class='hunk'>@@ -1169,26 +1186,52 @@ static int _regulator_get_enable_time(struct regulator_dev *rdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_dev *regulator_dev_lookup(struct device *dev,</div><div class='del'>-							 const char *supply)</div><div class='add'>+						  const char *supply,</div><div class='add'>+						  int *ret)</div><div class='ctx'> {</div><div class='ctx'> 	struct regulator_dev *r;</div><div class='ctx'> 	struct device_node *node;</div><div class='add'>+	struct regulator_map *map;</div><div class='add'>+	const char *devname = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* first do a dt based lookup */</div><div class='ctx'> 	if (dev &amp;&amp; dev-&gt;of_node) {</div><div class='ctx'> 		node = of_get_regulator(dev, supply);</div><div class='del'>-		if (node)</div><div class='add'>+		if (node) {</div><div class='ctx'> 			list_for_each_entry(r, &amp;regulator_list, list)</div><div class='ctx'> 				if (r-&gt;dev.parent &amp;&amp;</div><div class='ctx'> 					node == r-&gt;dev.of_node)</div><div class='ctx'> 					return r;</div><div class='add'>+		} else {</div><div class='add'>+			/*</div><div class='add'>+			 * If we couldn't even get the node then it's</div><div class='add'>+			 * not just that the device didn't register</div><div class='add'>+			 * yet, there's no node and we'll never</div><div class='add'>+			 * succeed.</div><div class='add'>+			 */</div><div class='add'>+			*ret = -ENODEV;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* if not found, try doing it non-dt way */</div><div class='add'>+	if (dev)</div><div class='add'>+		devname = dev_name(dev);</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry(r, &amp;regulator_list, list)</div><div class='ctx'> 		if (strcmp(rdev_get_name(r), supply) == 0)</div><div class='ctx'> 			return r;</div><div class='ctx'> </div><div class='add'>+	list_for_each_entry(map, &amp;regulator_map_list, list) {</div><div class='add'>+		/* If the mapping has a device set up it must match */</div><div class='add'>+		if (map-&gt;dev_name &amp;&amp;</div><div class='add'>+		    (!devname || strcmp(map-&gt;dev_name, devname)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (strcmp(map-&gt;supply, supply) == 0)</div><div class='add'>+			return map-&gt;regulator;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1197,7 +1240,6 @@ static struct regulator *_regulator_get(struct device *dev, const char *id,</div><div class='ctx'> 					int exclusive)</div><div class='ctx'> {</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='del'>-	struct regulator_map *map;</div><div class='ctx'> 	struct regulator *regulator = ERR_PTR(-EPROBE_DEFER);</div><div class='ctx'> 	const char *devname = NULL;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1212,22 +1254,10 @@ static struct regulator *_regulator_get(struct device *dev, const char *id,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;regulator_list_mutex);</div><div class='ctx'> </div><div class='del'>-	rdev = regulator_dev_lookup(dev, id);</div><div class='add'>+	rdev = regulator_dev_lookup(dev, id, &amp;ret);</div><div class='ctx'> 	if (rdev)</div><div class='ctx'> 		goto found;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(map, &amp;regulator_map_list, list) {</div><div class='del'>-		/* If the mapping has a device set up it must match */</div><div class='del'>-		if (map-&gt;dev_name &amp;&amp;</div><div class='del'>-		    (!devname || strcmp(map-&gt;dev_name, devname)))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (strcmp(map-&gt;supply, id) == 0) {</div><div class='del'>-			rdev = map-&gt;regulator;</div><div class='del'>-			goto found;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (board_wants_dummy_regulator) {</div><div class='ctx'> 		rdev = dummy_regulator_rdev;</div><div class='ctx'> 		goto found;</div><div class='hunk'>@@ -1431,20 +1461,12 @@ void devm_regulator_put(struct regulator *regulator)</div><div class='ctx'> </div><div class='ctx'> 	rc = devres_destroy(regulator-&gt;dev, devm_regulator_release,</div><div class='ctx'> 			    devm_regulator_match, regulator);</div><div class='del'>-	WARN_ON(rc);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(devm_regulator_put);</div><div class='del'>-</div><div class='del'>-static int _regulator_can_change_status(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	if (!rdev-&gt;constraints)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (rdev-&gt;constraints-&gt;valid_ops_mask &amp; REGULATOR_CHANGE_STATUS)</div><div class='del'>-		return 1;</div><div class='add'>+	if (rc == 0)</div><div class='add'>+		regulator_put(regulator);</div><div class='ctx'> 	else</div><div class='del'>-		return 0;</div><div class='add'>+		WARN_ON(rc);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(devm_regulator_put);</div><div class='ctx'> </div><div class='ctx'> /* locks held by regulator_enable() */</div><div class='ctx'> static int _regulator_enable(struct regulator_dev *rdev)</div><div class='hunk'>@@ -1525,6 +1547,9 @@ int regulator_enable(struct regulator *regulator)</div><div class='ctx'> 	struct regulator_dev *rdev = regulator-&gt;rdev;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='add'>+	if (regulator-&gt;always_on)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (rdev-&gt;supply) {</div><div class='ctx'> 		ret = regulator_enable(rdev-&gt;supply);</div><div class='ctx'> 		if (ret != 0)</div><div class='hunk'>@@ -1603,6 +1628,9 @@ int regulator_disable(struct regulator *regulator)</div><div class='ctx'> 	struct regulator_dev *rdev = regulator-&gt;rdev;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='add'>+	if (regulator-&gt;always_on)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;rdev-&gt;mutex);</div><div class='ctx'> 	ret = _regulator_disable(rdev);</div><div class='ctx'> 	mutex_unlock(&amp;rdev-&gt;mutex);</div><div class='hunk'>@@ -1711,6 +1739,9 @@ int regulator_disable_deferred(struct regulator *regulator, int ms)</div><div class='ctx'> 	struct regulator_dev *rdev = regulator-&gt;rdev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (regulator-&gt;always_on)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;rdev-&gt;mutex);</div><div class='ctx'> 	rdev-&gt;deferred_disables++;</div><div class='ctx'> 	mutex_unlock(&amp;rdev-&gt;mutex);</div><div class='hunk'>@@ -1724,6 +1755,61 @@ int regulator_disable_deferred(struct regulator *regulator, int ms)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(regulator_disable_deferred);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * regulator_is_enabled_regmap - standard is_enabled() for regmap users</div><div class='add'>+ *</div><div class='add'>+ * @rdev: regulator to operate on</div><div class='add'>+ *</div><div class='add'>+ * Regulators that use regmap for their register I/O can set the</div><div class='add'>+ * enable_reg and enable_mask fields in their descriptor and then use</div><div class='add'>+ * this as their is_enabled operation, saving some code.</div><div class='add'>+ */</div><div class='add'>+int regulator_is_enabled_regmap(struct regulator_dev *rdev)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(rdev-&gt;regmap, rdev-&gt;desc-&gt;enable_reg, &amp;val);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return (val &amp; rdev-&gt;desc-&gt;enable_mask) != 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(regulator_is_enabled_regmap);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * regulator_enable_regmap - standard enable() for regmap users</div><div class='add'>+ *</div><div class='add'>+ * @rdev: regulator to operate on</div><div class='add'>+ *</div><div class='add'>+ * Regulators that use regmap for their register I/O can set the</div><div class='add'>+ * enable_reg and enable_mask fields in their descriptor and then use</div><div class='add'>+ * this as their enable() operation, saving some code.</div><div class='add'>+ */</div><div class='add'>+int regulator_enable_regmap(struct regulator_dev *rdev)</div><div class='add'>+{</div><div class='add'>+	return regmap_update_bits(rdev-&gt;regmap, rdev-&gt;desc-&gt;enable_reg,</div><div class='add'>+				  rdev-&gt;desc-&gt;enable_mask,</div><div class='add'>+				  rdev-&gt;desc-&gt;enable_mask);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(regulator_enable_regmap);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * regulator_disable_regmap - standard disable() for regmap users</div><div class='add'>+ *</div><div class='add'>+ * @rdev: regulator to operate on</div><div class='add'>+ *</div><div class='add'>+ * Regulators that use regmap for their register I/O can set the</div><div class='add'>+ * enable_reg and enable_mask fields in their descriptor and then use</div><div class='add'>+ * this as their disable() operation, saving some code.</div><div class='add'>+ */</div><div class='add'>+int regulator_disable_regmap(struct regulator_dev *rdev)</div><div class='add'>+{</div><div class='add'>+	return regmap_update_bits(rdev-&gt;regmap, rdev-&gt;desc-&gt;enable_reg,</div><div class='add'>+				  rdev-&gt;desc-&gt;enable_mask, 0);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(regulator_disable_regmap);</div><div class='add'>+</div><div class='ctx'> static int _regulator_is_enabled(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	/* If we don't know then assume that the regulator is always on */</div><div class='hunk'>@@ -1749,6 +1835,9 @@ int regulator_is_enabled(struct regulator *regulator)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (regulator-&gt;always_on)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;regulator-&gt;rdev-&gt;mutex);</div><div class='ctx'> 	ret = _regulator_is_enabled(regulator-&gt;rdev);</div><div class='ctx'> 	mutex_unlock(&amp;regulator-&gt;rdev-&gt;mutex);</div><div class='hunk'>@@ -1774,6 +1863,26 @@ int regulator_count_voltages(struct regulator *regulator)</div><div class='ctx'> EXPORT_SYMBOL_GPL(regulator_count_voltages);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * regulator_list_voltage_linear - List voltages with simple calculation</div><div class='add'>+ *</div><div class='add'>+ * @rdev: Regulator device</div><div class='add'>+ * @selector: Selector to convert into a voltage</div><div class='add'>+ *</div><div class='add'>+ * Regulators with a simple linear mapping between voltages and</div><div class='add'>+ * selectors can set min_uV and uV_step in the regulator descriptor</div><div class='add'>+ * and then use this function as their list_voltage() operation,</div><div class='add'>+ */</div><div class='add'>+int regulator_list_voltage_linear(struct regulator_dev *rdev,</div><div class='add'>+				  unsigned int selector)</div><div class='add'>+{</div><div class='add'>+	if (selector &gt;= rdev-&gt;desc-&gt;n_voltages)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return rdev-&gt;desc-&gt;min_uV + (rdev-&gt;desc-&gt;uV_step * selector);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(regulator_list_voltage_linear);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * regulator_list_voltage - enumerate supported voltages</div><div class='ctx'>  * @regulator: regulator source</div><div class='ctx'>  * @selector: identify voltage to list</div><div class='hunk'>@@ -1837,75 +1946,183 @@ int regulator_is_supported_voltage(struct regulator *regulator,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(regulator_is_supported_voltage);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * regulator_get_voltage_sel_regmap - standard get_voltage_sel for regmap users</div><div class='add'>+ *</div><div class='add'>+ * @rdev: regulator to operate on</div><div class='add'>+ *</div><div class='add'>+ * Regulators that use regmap for their register I/O can set the</div><div class='add'>+ * vsel_reg and vsel_mask fields in their descriptor and then use this</div><div class='add'>+ * as their get_voltage_vsel operation, saving some code.</div><div class='add'>+ */</div><div class='add'>+int regulator_get_voltage_sel_regmap(struct regulator_dev *rdev)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(rdev-&gt;regmap, rdev-&gt;desc-&gt;vsel_reg, &amp;val);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val &amp;= rdev-&gt;desc-&gt;vsel_mask;</div><div class='add'>+	val &gt;&gt;= ffs(rdev-&gt;desc-&gt;vsel_mask) - 1;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(regulator_get_voltage_sel_regmap);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * regulator_set_voltage_sel_regmap - standard set_voltage_sel for regmap users</div><div class='add'>+ *</div><div class='add'>+ * @rdev: regulator to operate on</div><div class='add'>+ * @sel: Selector to set</div><div class='add'>+ *</div><div class='add'>+ * Regulators that use regmap for their register I/O can set the</div><div class='add'>+ * vsel_reg and vsel_mask fields in their descriptor and then use this</div><div class='add'>+ * as their set_voltage_vsel operation, saving some code.</div><div class='add'>+ */</div><div class='add'>+int regulator_set_voltage_sel_regmap(struct regulator_dev *rdev, unsigned sel)</div><div class='add'>+{</div><div class='add'>+	sel &lt;&lt;= ffs(rdev-&gt;desc-&gt;vsel_mask) - 1;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(rdev-&gt;regmap, rdev-&gt;desc-&gt;vsel_reg,</div><div class='add'>+				  rdev-&gt;desc-&gt;vsel_mask, sel);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(regulator_set_voltage_sel_regmap);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * regulator_map_voltage_iterate - map_voltage() based on list_voltage()</div><div class='add'>+ *</div><div class='add'>+ * @rdev: Regulator to operate on</div><div class='add'>+ * @min_uV: Lower bound for voltage</div><div class='add'>+ * @max_uV: Upper bound for voltage</div><div class='add'>+ *</div><div class='add'>+ * Drivers implementing set_voltage_sel() and list_voltage() can use</div><div class='add'>+ * this as their map_voltage() operation.  It will find a suitable</div><div class='add'>+ * voltage by calling list_voltage() until it gets something in bounds</div><div class='add'>+ * for the requested voltages.</div><div class='add'>+ */</div><div class='add'>+int regulator_map_voltage_iterate(struct regulator_dev *rdev,</div><div class='add'>+				  int min_uV, int max_uV)</div><div class='add'>+{</div><div class='add'>+	int best_val = INT_MAX;</div><div class='add'>+	int selector = 0;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	/* Find the smallest voltage that falls within the specified</div><div class='add'>+	 * range.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; rdev-&gt;desc-&gt;n_voltages; i++) {</div><div class='add'>+		ret = rdev-&gt;desc-&gt;ops-&gt;list_voltage(rdev, i);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (ret &lt; best_val &amp;&amp; ret &gt;= min_uV &amp;&amp; ret &lt;= max_uV) {</div><div class='add'>+			best_val = ret;</div><div class='add'>+			selector = i;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (best_val != INT_MAX)</div><div class='add'>+		return selector;</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(regulator_map_voltage_iterate);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * regulator_map_voltage_linear - map_voltage() for simple linear mappings</div><div class='add'>+ *</div><div class='add'>+ * @rdev: Regulator to operate on</div><div class='add'>+ * @min_uV: Lower bound for voltage</div><div class='add'>+ * @max_uV: Upper bound for voltage</div><div class='add'>+ *</div><div class='add'>+ * Drivers providing min_uV and uV_step in their regulator_desc can</div><div class='add'>+ * use this as their map_voltage() operation.</div><div class='add'>+ */</div><div class='add'>+int regulator_map_voltage_linear(struct regulator_dev *rdev,</div><div class='add'>+				 int min_uV, int max_uV)</div><div class='add'>+{</div><div class='add'>+	int ret, voltage;</div><div class='add'>+</div><div class='add'>+	if (!rdev-&gt;desc-&gt;uV_step) {</div><div class='add'>+		BUG_ON(!rdev-&gt;desc-&gt;uV_step);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = DIV_ROUND_UP(min_uV - rdev-&gt;desc-&gt;min_uV, rdev-&gt;desc-&gt;uV_step);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Map back into a voltage to verify we're still in bounds */</div><div class='add'>+	voltage = rdev-&gt;desc-&gt;ops-&gt;list_voltage(rdev, ret);</div><div class='add'>+	if (voltage &lt; min_uV || voltage &gt; max_uV)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(regulator_map_voltage_linear);</div><div class='add'>+</div><div class='ctx'> static int _regulator_do_set_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 				     int min_uV, int max_uV)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int delay = 0;</div><div class='add'>+	int best_val;</div><div class='ctx'> 	unsigned int selector;</div><div class='add'>+	int old_selector = -1;</div><div class='ctx'> </div><div class='ctx'> 	trace_regulator_set_voltage(rdev_get_name(rdev), min_uV, max_uV);</div><div class='ctx'> </div><div class='ctx'> 	min_uV += rdev-&gt;constraints-&gt;uV_offset;</div><div class='ctx'> 	max_uV += rdev-&gt;constraints-&gt;uV_offset;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If we can't obtain the old selector there is not enough</div><div class='add'>+	 * info to call set_voltage_time_sel().</div><div class='add'>+	 */</div><div class='add'>+	if (rdev-&gt;desc-&gt;ops-&gt;set_voltage_time_sel &amp;&amp;</div><div class='add'>+	    rdev-&gt;desc-&gt;ops-&gt;get_voltage_sel) {</div><div class='add'>+		old_selector = rdev-&gt;desc-&gt;ops-&gt;get_voltage_sel(rdev);</div><div class='add'>+		if (old_selector &lt; 0)</div><div class='add'>+			return old_selector;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (rdev-&gt;desc-&gt;ops-&gt;set_voltage) {</div><div class='ctx'> 		ret = rdev-&gt;desc-&gt;ops-&gt;set_voltage(rdev, min_uV, max_uV,</div><div class='ctx'> 						   &amp;selector);</div><div class='del'>-</div><div class='del'>-		if (rdev-&gt;desc-&gt;ops-&gt;list_voltage)</div><div class='del'>-			selector = rdev-&gt;desc-&gt;ops-&gt;list_voltage(rdev,</div><div class='del'>-								 selector);</div><div class='del'>-		else</div><div class='del'>-			selector = -1;</div><div class='ctx'> 	} else if (rdev-&gt;desc-&gt;ops-&gt;set_voltage_sel) {</div><div class='del'>-		int best_val = INT_MAX;</div><div class='del'>-		int i;</div><div class='del'>-</div><div class='del'>-		selector = 0;</div><div class='del'>-</div><div class='del'>-		/* Find the smallest voltage that falls within the specified</div><div class='del'>-		 * range.</div><div class='del'>-		 */</div><div class='del'>-		for (i = 0; i &lt; rdev-&gt;desc-&gt;n_voltages; i++) {</div><div class='del'>-			ret = rdev-&gt;desc-&gt;ops-&gt;list_voltage(rdev, i);</div><div class='del'>-			if (ret &lt; 0)</div><div class='del'>-				continue;</div><div class='add'>+		if (rdev-&gt;desc-&gt;ops-&gt;map_voltage)</div><div class='add'>+			ret = rdev-&gt;desc-&gt;ops-&gt;map_voltage(rdev, min_uV,</div><div class='add'>+							   max_uV);</div><div class='add'>+		else</div><div class='add'>+			ret = regulator_map_voltage_iterate(rdev, min_uV,</div><div class='add'>+							    max_uV);</div><div class='ctx'> </div><div class='del'>-			if (ret &lt; best_val &amp;&amp; ret &gt;= min_uV &amp;&amp; ret &lt;= max_uV) {</div><div class='del'>-				best_val = ret;</div><div class='del'>-				selector = i;</div><div class='del'>-			}</div><div class='add'>+		if (ret &gt;= 0) {</div><div class='add'>+			selector = ret;</div><div class='add'>+			ret = rdev-&gt;desc-&gt;ops-&gt;set_voltage_sel(rdev, ret);</div><div class='ctx'> 		}</div><div class='add'>+	} else {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * If we can't obtain the old selector there is not enough</div><div class='del'>-		 * info to call set_voltage_time_sel().</div><div class='del'>-		 */</div><div class='del'>-		if (rdev-&gt;desc-&gt;ops-&gt;set_voltage_time_sel &amp;&amp;</div><div class='del'>-		    rdev-&gt;desc-&gt;ops-&gt;get_voltage_sel) {</div><div class='del'>-			unsigned int old_selector = 0;</div><div class='add'>+	if (rdev-&gt;desc-&gt;ops-&gt;list_voltage)</div><div class='add'>+		best_val = rdev-&gt;desc-&gt;ops-&gt;list_voltage(rdev, selector);</div><div class='add'>+	else</div><div class='add'>+		best_val = -1;</div><div class='ctx'> </div><div class='del'>-			ret = rdev-&gt;desc-&gt;ops-&gt;get_voltage_sel(rdev);</div><div class='del'>-			if (ret &lt; 0)</div><div class='del'>-				return ret;</div><div class='del'>-			old_selector = ret;</div><div class='del'>-			ret = rdev-&gt;desc-&gt;ops-&gt;set_voltage_time_sel(rdev,</div><div class='del'>-						old_selector, selector);</div><div class='del'>-			if (ret &lt; 0)</div><div class='del'>-				rdev_warn(rdev, "set_voltage_time_sel() failed: %d\n", ret);</div><div class='del'>-			else</div><div class='del'>-				delay = ret;</div><div class='del'>-		}</div><div class='add'>+	/* Call set_voltage_time_sel if successfully obtained old_selector */</div><div class='add'>+	if (ret == 0 &amp;&amp; old_selector &gt;= 0 &amp;&amp;</div><div class='add'>+	    rdev-&gt;desc-&gt;ops-&gt;set_voltage_time_sel) {</div><div class='ctx'> </div><div class='del'>-		if (best_val != INT_MAX) {</div><div class='del'>-			ret = rdev-&gt;desc-&gt;ops-&gt;set_voltage_sel(rdev, selector);</div><div class='del'>-			selector = best_val;</div><div class='del'>-		} else {</div><div class='del'>-			ret = -EINVAL;</div><div class='add'>+		delay = rdev-&gt;desc-&gt;ops-&gt;set_voltage_time_sel(rdev,</div><div class='add'>+						old_selector, selector);</div><div class='add'>+		if (delay &lt; 0) {</div><div class='add'>+			rdev_warn(rdev, "set_voltage_time_sel() failed: %d\n",</div><div class='add'>+				  delay);</div><div class='add'>+			delay = 0;</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		ret = -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Insert any necessary delays */</div><div class='hunk'>@@ -1920,7 +2137,7 @@ static int _regulator_do_set_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 		_notifier_call_chain(rdev, REGULATOR_EVENT_VOLTAGE_CHANGE,</div><div class='ctx'> 				     NULL);</div><div class='ctx'> </div><div class='del'>-	trace_regulator_set_voltage_complete(rdev_get_name(rdev), selector);</div><div class='add'>+	trace_regulator_set_voltage_complete(rdev_get_name(rdev), best_val);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2324,6 +2541,9 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)</div><div class='ctx'> 	 */</div><div class='ctx'> 	ret = -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (!rdev-&gt;desc-&gt;ops-&gt;set_mode)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	/* get output voltage */</div><div class='ctx'> 	output_uV = _regulator_get_voltage(rdev);</div><div class='ctx'> 	if (output_uV &lt;= 0) {</div><div class='hunk'>@@ -2525,9 +2745,13 @@ int regulator_bulk_enable(int num_consumers,</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; num_consumers; i++)</div><div class='del'>-		async_schedule_domain(regulator_bulk_enable_async,</div><div class='del'>-				      &amp;consumers[i], &amp;async_domain);</div><div class='add'>+	for (i = 0; i &lt; num_consumers; i++) {</div><div class='add'>+		if (consumers[i].consumer-&gt;always_on)</div><div class='add'>+			consumers[i].ret = 0;</div><div class='add'>+		else</div><div class='add'>+			async_schedule_domain(regulator_bulk_enable_async,</div><div class='add'>+					      &amp;consumers[i], &amp;async_domain);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	async_synchronize_full_domain(&amp;async_domain);</div><div class='ctx'> </div><div class='hunk'>@@ -2566,7 +2790,7 @@ int regulator_bulk_disable(int num_consumers,</div><div class='ctx'> 			   struct regulator_bulk_data *consumers)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, r;</div><div class='ctx'> </div><div class='ctx'> 	for (i = num_consumers - 1; i &gt;= 0; --i) {</div><div class='ctx'> 		ret = regulator_disable(consumers[i].consumer);</div><div class='hunk'>@@ -2578,8 +2802,12 @@ int regulator_bulk_disable(int num_consumers,</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='ctx'> 	pr_err("Failed to disable %s: %d\n", consumers[i].supply, ret);</div><div class='del'>-	for (++i; i &lt; num_consumers; ++i)</div><div class='del'>-		regulator_enable(consumers[i].consumer);</div><div class='add'>+	for (++i; i &lt; num_consumers; ++i) {</div><div class='add'>+		r = regulator_enable(consumers[i].consumer);</div><div class='add'>+		if (r != 0)</div><div class='add'>+			pr_err("Failed to reename %s: %d\n",</div><div class='add'>+			       consumers[i].supply, r);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2756,10 +2984,6 @@ static int add_regulator_attributes(struct regulator_dev *rdev)</div><div class='ctx'> 			return status;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* suspend mode constraints need multiple supporting methods */</div><div class='del'>-	if (!(ops-&gt;set_suspend_enable &amp;&amp; ops-&gt;set_suspend_disable))</div><div class='del'>-		return status;</div><div class='del'>-</div><div class='ctx'> 	status = device_create_file(dev, &amp;dev_attr_suspend_standby_state);</div><div class='ctx'> 	if (status &lt; 0)</div><div class='ctx'> 		return status;</div><div class='hunk'>@@ -2820,28 +3044,29 @@ static void rdev_init_debugfs(struct regulator_dev *rdev)</div><div class='ctx'> /**</div><div class='ctx'>  * regulator_register - register regulator</div><div class='ctx'>  * @regulator_desc: regulator to register</div><div class='del'>- * @dev: struct device for the regulator</div><div class='del'>- * @init_data: platform provided init data, passed through by driver</div><div class='del'>- * @driver_data: private regulator data</div><div class='del'>- * @of_node: OpenFirmware node to parse for device tree bindings (may be</div><div class='del'>- *           NULL).</div><div class='add'>+ * @config: runtime configuration for regulator</div><div class='ctx'>  *</div><div class='ctx'>  * Called by regulator drivers to register a regulator.</div><div class='ctx'>  * Returns 0 on success.</div><div class='ctx'>  */</div><div class='del'>-struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc,</div><div class='del'>-	struct device *dev, const struct regulator_init_data *init_data,</div><div class='del'>-	void *driver_data, struct device_node *of_node)</div><div class='add'>+struct regulator_dev *</div><div class='add'>+regulator_register(const struct regulator_desc *regulator_desc,</div><div class='add'>+		   const struct regulator_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	const struct regulation_constraints *constraints = NULL;</div><div class='add'>+	const struct regulator_init_data *init_data;</div><div class='ctx'> 	static atomic_t regulator_no = ATOMIC_INIT(0);</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='add'>+	struct device *dev;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> 	const char *supply = NULL;</div><div class='ctx'> </div><div class='del'>-	if (regulator_desc == NULL)</div><div class='add'>+	if (regulator_desc == NULL || config == NULL)</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='add'>+	dev = config-&gt;dev;</div><div class='add'>+	WARN_ON(!dev);</div><div class='add'>+</div><div class='ctx'> 	if (regulator_desc-&gt;name == NULL || regulator_desc-&gt;ops == NULL)</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='hunk'>@@ -2865,6 +3090,8 @@ struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc,</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	init_data = config-&gt;init_data;</div><div class='add'>+</div><div class='ctx'> 	rdev = kzalloc(sizeof(struct regulator_dev), GFP_KERNEL);</div><div class='ctx'> 	if (rdev == NULL)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='hunk'>@@ -2872,9 +3099,10 @@ struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc,</div><div class='ctx'> 	mutex_lock(&amp;regulator_list_mutex);</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;rdev-&gt;mutex);</div><div class='del'>-	rdev-&gt;reg_data = driver_data;</div><div class='add'>+	rdev-&gt;reg_data = config-&gt;driver_data;</div><div class='ctx'> 	rdev-&gt;owner = regulator_desc-&gt;owner;</div><div class='ctx'> 	rdev-&gt;desc = regulator_desc;</div><div class='add'>+	rdev-&gt;regmap = config-&gt;regmap;</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;rdev-&gt;consumer_list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;rdev-&gt;list);</div><div class='ctx'> 	BLOCKING_INIT_NOTIFIER_HEAD(&amp;rdev-&gt;notifier);</div><div class='hunk'>@@ -2889,7 +3117,7 @@ struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc,</div><div class='ctx'> </div><div class='ctx'> 	/* register with sysfs */</div><div class='ctx'> 	rdev-&gt;dev.class = &amp;regulator_class;</div><div class='del'>-	rdev-&gt;dev.of_node = of_node;</div><div class='add'>+	rdev-&gt;dev.of_node = config-&gt;of_node;</div><div class='ctx'> 	rdev-&gt;dev.parent = dev;</div><div class='ctx'> 	dev_set_name(&amp;rdev-&gt;dev, "regulator.%d",</div><div class='ctx'> 		     atomic_inc_return(&amp;regulator_no) - 1);</div><div class='hunk'>@@ -2922,7 +3150,7 @@ struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc,</div><div class='ctx'> 	if (supply) {</div><div class='ctx'> 		struct regulator_dev *r;</div><div class='ctx'> </div><div class='del'>-		r = regulator_dev_lookup(dev, supply);</div><div class='add'>+		r = regulator_dev_lookup(dev, supply, &amp;ret);</div><div class='ctx'> </div><div class='ctx'> 		if (!r) {</div><div class='ctx'> 			dev_err(dev, "Failed to find supply %s\n", supply);</div><div class='hunk'>@@ -2935,8 +3163,7 @@ struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc,</div><div class='ctx'> 			goto scrub;</div><div class='ctx'> </div><div class='ctx'> 		/* Enable supply if rail is enabled */</div><div class='del'>-		if (rdev-&gt;desc-&gt;ops-&gt;is_enabled &amp;&amp;</div><div class='del'>-				rdev-&gt;desc-&gt;ops-&gt;is_enabled(rdev)) {</div><div class='add'>+		if (_regulator_is_enabled(rdev)) {</div><div class='ctx'> 			ret = regulator_enable(rdev-&gt;supply);</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='ctx'> 				goto scrub;</div><div class='hunk'>@@ -2968,6 +3195,8 @@ unset_supplies:</div><div class='ctx'> 	unset_regulator_supplies(rdev);</div><div class='ctx'> </div><div class='ctx'> scrub:</div><div class='add'>+	if (rdev-&gt;supply)</div><div class='add'>+		regulator_put(rdev-&gt;supply);</div><div class='ctx'> 	kfree(rdev-&gt;constraints);</div><div class='ctx'> 	device_unregister(&amp;rdev-&gt;dev);</div><div class='ctx'> 	/* device core frees rdev */</div><div class='hunk'>@@ -3066,7 +3295,7 @@ int regulator_suspend_finish(void)</div><div class='ctx'> 				goto unlock;</div><div class='ctx'> 			if (!ops-&gt;disable)</div><div class='ctx'> 				goto unlock;</div><div class='del'>-			if (ops-&gt;is_enabled &amp;&amp; !ops-&gt;is_enabled(rdev))</div><div class='add'>+			if (!_regulator_is_enabled(rdev))</div><div class='ctx'> 				goto unlock;</div><div class='ctx'> </div><div class='ctx'> 			error = ops-&gt;disable(rdev);</div><div class='head'>diff --git a/drivers/regulator/da903x.c b/drivers/regulator/da903x.c<br/>index 1851f0929ef0..1005f5f7e603 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/da903x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/da903x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/da903x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/da903x.c</a></div><div class='hunk'>@@ -76,9 +76,7 @@</div><div class='ctx'> struct da903x_regulator_info {</div><div class='ctx'> 	struct regulator_desc desc;</div><div class='ctx'> </div><div class='del'>-	int	min_uV;</div><div class='ctx'> 	int	max_uV;</div><div class='del'>-	int	step_uV;</div><div class='ctx'> 	int	vol_reg;</div><div class='ctx'> 	int	vol_shift;</div><div class='ctx'> 	int	vol_nbits;</div><div class='hunk'>@@ -88,10 +86,6 @@ struct da903x_regulator_info {</div><div class='ctx'> 	int	enable_bit;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int da9034_ldo12_data[] = { 1700, 1750, 1800, 1850, 1900, 1950,</div><div class='del'>-				   2000, 2050, 2700, 2750, 2800, 2850,</div><div class='del'>-				   2900, 2950, 3000, 3050 };</div><div class='del'>-</div><div class='ctx'> static inline struct device *to_da903x_dev(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	return rdev_get_dev(rdev)-&gt;parent-&gt;parent;</div><div class='hunk'>@@ -100,34 +94,26 @@ static inline struct device *to_da903x_dev(struct regulator_dev *rdev)</div><div class='ctx'> static inline int check_range(struct da903x_regulator_info *info,</div><div class='ctx'> 				int min_uV, int max_uV)</div><div class='ctx'> {</div><div class='del'>-	if (min_uV &lt; info-&gt;min_uV || min_uV &gt; info-&gt;max_uV)</div><div class='add'>+	if (min_uV &lt; info-&gt;desc.min_uV || min_uV &gt; info-&gt;max_uV)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* DA9030/DA9034 common operations */</div><div class='del'>-static int da903x_set_ldo_voltage(struct regulator_dev *rdev,</div><div class='del'>-				  int min_uV, int max_uV, unsigned *selector)</div><div class='add'>+static int da903x_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct da903x_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='ctx'> 	struct device *da9034_dev = to_da903x_dev(rdev);</div><div class='ctx'> 	uint8_t val, mask;</div><div class='ctx'> </div><div class='del'>-	if (check_range(info, min_uV, max_uV)) {</div><div class='del'>-		pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	val = DIV_ROUND_UP(min_uV - info-&gt;min_uV, info-&gt;step_uV);</div><div class='del'>-	*selector = val;</div><div class='del'>-	val &lt;&lt;= info-&gt;vol_shift;</div><div class='add'>+	val = selector &lt;&lt; info-&gt;vol_shift;</div><div class='ctx'> 	mask = ((1 &lt;&lt; info-&gt;vol_nbits) - 1)  &lt;&lt; info-&gt;vol_shift;</div><div class='ctx'> </div><div class='ctx'> 	return da903x_update(da9034_dev, info-&gt;vol_reg, val, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int da903x_get_voltage(struct regulator_dev *rdev)</div><div class='add'>+static int da903x_get_voltage_sel(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct da903x_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='ctx'> 	struct device *da9034_dev = to_da903x_dev(rdev);</div><div class='hunk'>@@ -141,7 +127,7 @@ static int da903x_get_voltage(struct regulator_dev *rdev)</div><div class='ctx'> 	mask = ((1 &lt;&lt; info-&gt;vol_nbits) - 1)  &lt;&lt; info-&gt;vol_shift;</div><div class='ctx'> 	val = (val &amp; mask) &gt;&gt; info-&gt;vol_shift;</div><div class='ctx'> </div><div class='del'>-	return info-&gt;min_uV + info-&gt;step_uV * val;</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int da903x_enable(struct regulator_dev *rdev)</div><div class='hunk'>@@ -176,35 +162,16 @@ static int da903x_is_enabled(struct regulator_dev *rdev)</div><div class='ctx'> 	return !!(reg_val &amp; (1 &lt;&lt; info-&gt;enable_bit));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int da903x_list_voltage(struct regulator_dev *rdev, unsigned selector)</div><div class='del'>-{</div><div class='del'>-	struct da903x_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = info-&gt;min_uV + info-&gt;step_uV * selector;</div><div class='del'>-	if (ret &gt; info-&gt;max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* DA9030 specific operations */</div><div class='del'>-static int da9030_set_ldo1_15_voltage(struct regulator_dev *rdev,</div><div class='del'>-				      int min_uV, int max_uV,</div><div class='del'>-				      unsigned *selector)</div><div class='add'>+static int da9030_set_ldo1_15_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+					  unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct da903x_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='ctx'> 	struct device *da903x_dev = to_da903x_dev(rdev);</div><div class='ctx'> 	uint8_t val, mask;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (check_range(info, min_uV, max_uV)) {</div><div class='del'>-		pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	val = DIV_ROUND_UP(min_uV - info-&gt;min_uV, info-&gt;step_uV);</div><div class='del'>-	*selector = val;</div><div class='del'>-	val &lt;&lt;= info-&gt;vol_shift;</div><div class='add'>+	val = selector &lt;&lt; info-&gt;vol_shift;</div><div class='ctx'> 	mask = ((1 &lt;&lt; info-&gt;vol_nbits) - 1)  &lt;&lt; info-&gt;vol_shift;</div><div class='ctx'> 	val |= DA9030_LDO_UNLOCK; /* have to set UNLOCK bits */</div><div class='ctx'> 	mask |= DA9030_LDO_UNLOCK_MASK;</div><div class='hunk'>@@ -217,73 +184,57 @@ static int da9030_set_ldo1_15_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	return da903x_update(da903x_dev, info-&gt;vol_reg, val, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int da9030_set_ldo14_voltage(struct regulator_dev *rdev,</div><div class='del'>-				    int min_uV, int max_uV,</div><div class='del'>-				    unsigned *selector)</div><div class='add'>+static int da9030_map_ldo14_voltage(struct regulator_dev *rdev,</div><div class='add'>+				    int min_uV, int max_uV)</div><div class='ctx'> {</div><div class='ctx'> 	struct da903x_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	struct device *da903x_dev = to_da903x_dev(rdev);</div><div class='del'>-	uint8_t val, mask;</div><div class='del'>-	int thresh;</div><div class='add'>+	int thresh, sel;</div><div class='ctx'> </div><div class='ctx'> 	if (check_range(info, min_uV, max_uV)) {</div><div class='ctx'> 		pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	thresh = (info-&gt;max_uV + info-&gt;min_uV) / 2;</div><div class='add'>+	thresh = (info-&gt;max_uV + info-&gt;desc.min_uV) / 2;</div><div class='ctx'> 	if (min_uV &lt; thresh) {</div><div class='del'>-		val = DIV_ROUND_UP(thresh - min_uV, info-&gt;step_uV);</div><div class='del'>-		val |= 0x4;</div><div class='add'>+		sel = DIV_ROUND_UP(thresh - min_uV, info-&gt;desc.uV_step);</div><div class='add'>+		sel |= 0x4;</div><div class='ctx'> 	} else {</div><div class='del'>-		val = DIV_ROUND_UP(min_uV - thresh, info-&gt;step_uV);</div><div class='add'>+		sel = DIV_ROUND_UP(min_uV - thresh, info-&gt;desc.uV_step);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*selector = val;</div><div class='del'>-	val &lt;&lt;= info-&gt;vol_shift;</div><div class='del'>-	mask = ((1 &lt;&lt; info-&gt;vol_nbits) - 1)  &lt;&lt; info-&gt;vol_shift;</div><div class='del'>-</div><div class='del'>-	return da903x_update(da903x_dev, info-&gt;vol_reg, val, mask);</div><div class='add'>+	return sel;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int da9030_get_ldo14_voltage(struct regulator_dev *rdev)</div><div class='add'>+static int da9030_list_ldo14_voltage(struct regulator_dev *rdev,</div><div class='add'>+				     unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct da903x_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	struct device *da903x_dev = to_da903x_dev(rdev);</div><div class='del'>-	uint8_t val, mask;</div><div class='del'>-	int ret;</div><div class='add'>+	int volt;</div><div class='ctx'> </div><div class='del'>-	ret = da903x_read(da903x_dev, info-&gt;vol_reg, &amp;val);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (selector &amp; 0x4)</div><div class='add'>+		volt = rdev-&gt;desc-&gt;min_uV +</div><div class='add'>+		       rdev-&gt;desc-&gt;uV_step * (3 - (selector &amp; ~0x4));</div><div class='add'>+	else</div><div class='add'>+		volt = (info-&gt;max_uV + rdev-&gt;desc-&gt;min_uV) / 2 +</div><div class='add'>+		       rdev-&gt;desc-&gt;uV_step * (selector &amp; ~0x4);</div><div class='ctx'> </div><div class='del'>-	mask = ((1 &lt;&lt; info-&gt;vol_nbits) - 1)  &lt;&lt; info-&gt;vol_shift;</div><div class='del'>-	val = (val &amp; mask) &gt;&gt; info-&gt;vol_shift;</div><div class='add'>+	if (volt &gt; info-&gt;max_uV)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (val &amp; 0x4)</div><div class='del'>-		return info-&gt;min_uV + info-&gt;step_uV * (3 - (val &amp; ~0x4));</div><div class='del'>-	else</div><div class='del'>-		return (info-&gt;max_uV + info-&gt;min_uV) / 2 +</div><div class='del'>-			info-&gt;step_uV * (val &amp; ~0x4);</div><div class='add'>+	return volt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* DA9034 specific operations */</div><div class='del'>-static int da9034_set_dvc_voltage(struct regulator_dev *rdev,</div><div class='del'>-				  int min_uV, int max_uV, unsigned *selector)</div><div class='add'>+static int da9034_set_dvc_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+				      unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct da903x_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='ctx'> 	struct device *da9034_dev = to_da903x_dev(rdev);</div><div class='ctx'> 	uint8_t val, mask;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (check_range(info, min_uV, max_uV)) {</div><div class='del'>-		pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	val = DIV_ROUND_UP(min_uV - info-&gt;min_uV, info-&gt;step_uV);</div><div class='del'>-	*selector = val;</div><div class='del'>-	val &lt;&lt;= info-&gt;vol_shift;</div><div class='add'>+	val = selector &lt;&lt; info-&gt;vol_shift;</div><div class='ctx'> 	mask = ((1 &lt;&lt; info-&gt;vol_nbits) - 1)  &lt;&lt; info-&gt;vol_shift;</div><div class='ctx'> </div><div class='ctx'> 	ret = da903x_update(da9034_dev, info-&gt;vol_reg, val, mask);</div><div class='hunk'>@@ -295,59 +246,45 @@ static int da9034_set_dvc_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int da9034_set_ldo12_voltage(struct regulator_dev *rdev,</div><div class='del'>-				    int min_uV, int max_uV, unsigned *selector)</div><div class='add'>+static int da9034_map_ldo12_voltage(struct regulator_dev *rdev,</div><div class='add'>+				    int min_uV, int max_uV)</div><div class='ctx'> {</div><div class='ctx'> 	struct da903x_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	struct device *da9034_dev = to_da903x_dev(rdev);</div><div class='del'>-	uint8_t val, mask;</div><div class='add'>+	int sel;</div><div class='ctx'> </div><div class='ctx'> 	if (check_range(info, min_uV, max_uV)) {</div><div class='ctx'> 		pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	val = DIV_ROUND_UP(min_uV - info-&gt;min_uV, info-&gt;step_uV);</div><div class='del'>-	val = (val &gt;= 20) ? val - 12 : ((val &gt; 7) ? 8 : val);</div><div class='del'>-	*selector = val;</div><div class='del'>-	val &lt;&lt;= info-&gt;vol_shift;</div><div class='del'>-	mask = ((1 &lt;&lt; info-&gt;vol_nbits) - 1)  &lt;&lt; info-&gt;vol_shift;</div><div class='add'>+	sel = DIV_ROUND_UP(min_uV - info-&gt;desc.min_uV, info-&gt;desc.uV_step);</div><div class='add'>+	sel = (sel &gt;= 20) ? sel - 12 : ((sel &gt; 7) ? 8 : sel);</div><div class='ctx'> </div><div class='del'>-	return da903x_update(da9034_dev, info-&gt;vol_reg, val, mask);</div><div class='add'>+	return sel;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int da9034_get_ldo12_voltage(struct regulator_dev *rdev)</div><div class='add'>+static int da9034_list_ldo12_voltage(struct regulator_dev *rdev,</div><div class='add'>+				     unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct da903x_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	struct device *da9034_dev = to_da903x_dev(rdev);</div><div class='del'>-	uint8_t val, mask;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = da903x_read(da9034_dev, info-&gt;vol_reg, &amp;val);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	mask = ((1 &lt;&lt; info-&gt;vol_nbits) - 1)  &lt;&lt; info-&gt;vol_shift;</div><div class='del'>-	val = (val &amp; mask) &gt;&gt; info-&gt;vol_shift;</div><div class='add'>+	int volt;</div><div class='ctx'> </div><div class='del'>-	if (val &gt;= 8)</div><div class='del'>-		return 2700000 + info-&gt;step_uV * (val - 8);</div><div class='del'>-</div><div class='del'>-	return info-&gt;min_uV + info-&gt;step_uV * val;</div><div class='del'>-}</div><div class='add'>+	if (selector &gt;= 8)</div><div class='add'>+		volt = 2700000 + rdev-&gt;desc-&gt;uV_step * (selector - 8);</div><div class='add'>+	else</div><div class='add'>+		volt = rdev-&gt;desc-&gt;min_uV + rdev-&gt;desc-&gt;uV_step * selector;</div><div class='ctx'> </div><div class='del'>-static int da9034_list_ldo12_voltage(struct regulator_dev *rdev,</div><div class='del'>-				     unsigned selector)</div><div class='del'>-{</div><div class='del'>-	if (selector &gt;= ARRAY_SIZE(da9034_ldo12_data))</div><div class='add'>+	if (volt &gt; info-&gt;max_uV)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	return da9034_ldo12_data[selector] * 1000;</div><div class='add'>+</div><div class='add'>+	return volt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops da903x_regulator_ldo_ops = {</div><div class='del'>-	.set_voltage	= da903x_set_ldo_voltage,</div><div class='del'>-	.get_voltage	= da903x_get_voltage,</div><div class='del'>-	.list_voltage	= da903x_list_voltage,</div><div class='add'>+	.set_voltage_sel = da903x_set_voltage_sel,</div><div class='add'>+	.get_voltage_sel = da903x_get_voltage_sel,</div><div class='add'>+	.list_voltage	= regulator_list_voltage_linear,</div><div class='add'>+	.map_voltage	= regulator_map_voltage_linear,</div><div class='ctx'> 	.enable		= da903x_enable,</div><div class='ctx'> 	.disable	= da903x_disable,</div><div class='ctx'> 	.is_enabled	= da903x_is_enabled,</div><div class='hunk'>@@ -355,9 +292,10 @@ static struct regulator_ops da903x_regulator_ldo_ops = {</div><div class='ctx'> </div><div class='ctx'> /* NOTE: this is dedicated for the insane DA9030 LDO14 */</div><div class='ctx'> static struct regulator_ops da9030_regulator_ldo14_ops = {</div><div class='del'>-	.set_voltage	= da9030_set_ldo14_voltage,</div><div class='del'>-	.get_voltage	= da9030_get_ldo14_voltage,</div><div class='del'>-	.list_voltage	= da903x_list_voltage,</div><div class='add'>+	.set_voltage_sel = da903x_set_voltage_sel,</div><div class='add'>+	.get_voltage_sel = da903x_get_voltage_sel,</div><div class='add'>+	.list_voltage	= da9030_list_ldo14_voltage,</div><div class='add'>+	.map_voltage	= da9030_map_ldo14_voltage,</div><div class='ctx'> 	.enable		= da903x_enable,</div><div class='ctx'> 	.disable	= da903x_disable,</div><div class='ctx'> 	.is_enabled	= da903x_is_enabled,</div><div class='hunk'>@@ -365,18 +303,20 @@ static struct regulator_ops da9030_regulator_ldo14_ops = {</div><div class='ctx'> </div><div class='ctx'> /* NOTE: this is dedicated for the DA9030 LDO1 and LDO15 that have locks  */</div><div class='ctx'> static struct regulator_ops da9030_regulator_ldo1_15_ops = {</div><div class='del'>-	.set_voltage	= da9030_set_ldo1_15_voltage,</div><div class='del'>-	.get_voltage	= da903x_get_voltage,</div><div class='del'>-	.list_voltage	= da903x_list_voltage,</div><div class='add'>+	.set_voltage_sel = da9030_set_ldo1_15_voltage_sel,</div><div class='add'>+	.get_voltage_sel = da903x_get_voltage_sel,</div><div class='add'>+	.list_voltage	= regulator_list_voltage_linear,</div><div class='add'>+	.map_voltage	= regulator_map_voltage_linear,</div><div class='ctx'> 	.enable		= da903x_enable,</div><div class='ctx'> 	.disable	= da903x_disable,</div><div class='ctx'> 	.is_enabled	= da903x_is_enabled,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops da9034_regulator_dvc_ops = {</div><div class='del'>-	.set_voltage	= da9034_set_dvc_voltage,</div><div class='del'>-	.get_voltage	= da903x_get_voltage,</div><div class='del'>-	.list_voltage	= da903x_list_voltage,</div><div class='add'>+	.set_voltage_sel = da9034_set_dvc_voltage_sel,</div><div class='add'>+	.get_voltage_sel = da903x_get_voltage_sel,</div><div class='add'>+	.list_voltage	= regulator_list_voltage_linear,</div><div class='add'>+	.map_voltage	= regulator_map_voltage_linear,</div><div class='ctx'> 	.enable		= da903x_enable,</div><div class='ctx'> 	.disable	= da903x_disable,</div><div class='ctx'> 	.is_enabled	= da903x_is_enabled,</div><div class='hunk'>@@ -384,9 +324,10 @@ static struct regulator_ops da9034_regulator_dvc_ops = {</div><div class='ctx'> </div><div class='ctx'> /* NOTE: this is dedicated for the insane LDO12 */</div><div class='ctx'> static struct regulator_ops da9034_regulator_ldo12_ops = {</div><div class='del'>-	.set_voltage	= da9034_set_ldo12_voltage,</div><div class='del'>-	.get_voltage	= da9034_get_ldo12_voltage,</div><div class='add'>+	.set_voltage_sel = da903x_set_voltage_sel,</div><div class='add'>+	.get_voltage_sel = da903x_get_voltage_sel,</div><div class='ctx'> 	.list_voltage	= da9034_list_ldo12_voltage,</div><div class='add'>+	.map_voltage	= da9034_map_ldo12_voltage,</div><div class='ctx'> 	.enable		= da903x_enable,</div><div class='ctx'> 	.disable	= da903x_disable,</div><div class='ctx'> 	.is_enabled	= da903x_is_enabled,</div><div class='hunk'>@@ -401,10 +342,10 @@ static struct regulator_ops da9034_regulator_ldo12_ops = {</div><div class='ctx'> 		.id	= _pmic##_ID_LDO##_id,				\</div><div class='ctx'> 		.n_voltages = (step) ? ((max - min) / step + 1) : 1,	\</div><div class='ctx'> 		.owner	= THIS_MODULE,					\</div><div class='add'>+		.min_uV	 = (min) * 1000,				\</div><div class='add'>+		.uV_step = (step) * 1000,				\</div><div class='ctx'> 	},								\</div><div class='del'>-	.min_uV		= (min) * 1000,					\</div><div class='ctx'> 	.max_uV		= (max) * 1000,					\</div><div class='del'>-	.step_uV	= (step) * 1000,				\</div><div class='ctx'> 	.vol_reg	= _pmic##_##vreg,				\</div><div class='ctx'> 	.vol_shift	= (shift),					\</div><div class='ctx'> 	.vol_nbits	= (nbits),					\</div><div class='hunk'>@@ -421,10 +362,10 @@ static struct regulator_ops da9034_regulator_ldo12_ops = {</div><div class='ctx'> 		.id	= _pmic##_ID_##_id,				\</div><div class='ctx'> 		.n_voltages = (step) ? ((max - min) / step + 1) : 1,	\</div><div class='ctx'> 		.owner	= THIS_MODULE,					\</div><div class='add'>+		.min_uV = (min) * 1000,					\</div><div class='add'>+		.uV_step = (step) * 1000,				\</div><div class='ctx'> 	},								\</div><div class='del'>-	.min_uV		= (min) * 1000,					\</div><div class='ctx'> 	.max_uV		= (max) * 1000,					\</div><div class='del'>-	.step_uV	= (step) * 1000,				\</div><div class='ctx'> 	.vol_reg	= _pmic##_##vreg,				\</div><div class='ctx'> 	.vol_shift	= (0),						\</div><div class='ctx'> 	.vol_nbits	= (nbits),					\</div><div class='hunk'>@@ -517,6 +458,7 @@ static int __devinit da903x_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct da903x_regulator_info *ri = NULL;</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> </div><div class='ctx'> 	ri = find_regulator_info(pdev-&gt;id);</div><div class='ctx'> 	if (ri == NULL) {</div><div class='hunk'>@@ -527,7 +469,7 @@ static int __devinit da903x_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* Workaround for the weird LDO12 voltage setting */</div><div class='ctx'> 	if (ri-&gt;desc.id == DA9034_ID_LDO12) {</div><div class='ctx'> 		ri-&gt;desc.ops = &amp;da9034_regulator_ldo12_ops;</div><div class='del'>-		ri-&gt;desc.n_voltages = ARRAY_SIZE(da9034_ldo12_data);</div><div class='add'>+		ri-&gt;desc.n_voltages = 16;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ri-&gt;desc.id == DA9030_ID_LDO14)</div><div class='hunk'>@@ -536,8 +478,11 @@ static int __devinit da903x_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ri-&gt;desc.id == DA9030_ID_LDO1 || ri-&gt;desc.id == DA9030_ID_LDO15)</div><div class='ctx'> 		ri-&gt;desc.ops = &amp;da9030_regulator_ldo1_15_ops;</div><div class='ctx'> </div><div class='del'>-	rdev = regulator_register(&amp;ri-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-				  pdev-&gt;dev.platform_data, ri, NULL);</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = pdev-&gt;dev.platform_data;</div><div class='add'>+	config.driver_data = ri;</div><div class='add'>+</div><div class='add'>+	rdev = regulator_register(&amp;ri-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(rdev)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to register regulator %s\n",</div><div class='ctx'> 				ri-&gt;desc.name);</div><div class='head'>diff --git a/drivers/regulator/da9052-regulator.c b/drivers/regulator/da9052-regulator.c<br/>index 09915e89705d..88976d8d44ed 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/da9052-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/da9052-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/da9052-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/da9052-regulator.c</a></div><div class='hunk'>@@ -19,6 +19,10 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/regulator/of_regulator.h&gt;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mfd/da9052/da9052.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/da9052/reg.h&gt;</div><div class='hunk'>@@ -37,6 +41,22 @@</div><div class='ctx'> #define DA9052_BUCK_ILIM_MASK_EVEN	0x0c</div><div class='ctx'> #define DA9052_BUCK_ILIM_MASK_ODD	0xc0</div><div class='ctx'> </div><div class='add'>+/* DA9052 REGULATOR IDs */</div><div class='add'>+#define DA9052_ID_BUCK1		0</div><div class='add'>+#define DA9052_ID_BUCK2		1</div><div class='add'>+#define DA9052_ID_BUCK3		2</div><div class='add'>+#define DA9052_ID_BUCK4		3</div><div class='add'>+#define DA9052_ID_LDO1		4</div><div class='add'>+#define DA9052_ID_LDO2		5</div><div class='add'>+#define DA9052_ID_LDO3		6</div><div class='add'>+#define DA9052_ID_LDO4		7</div><div class='add'>+#define DA9052_ID_LDO5		8</div><div class='add'>+#define DA9052_ID_LDO6		9</div><div class='add'>+#define DA9052_ID_LDO7		10</div><div class='add'>+#define DA9052_ID_LDO8		11</div><div class='add'>+#define DA9052_ID_LDO9		12</div><div class='add'>+#define DA9052_ID_LDO10		13</div><div class='add'>+</div><div class='ctx'> static const u32 da9052_current_limits[3][4] = {</div><div class='ctx'> 	{700000, 800000, 1000000, 1200000},	/* DA9052-BC BUCKs */</div><div class='ctx'> 	{1600000, 2000000, 2400000, 3000000},	/* DA9053-AA/Bx BUCK-CORE */</div><div class='hunk'>@@ -50,8 +70,6 @@ struct da9052_regulator_info {</div><div class='ctx'> 	int step_uV;</div><div class='ctx'> 	int min_uV;</div><div class='ctx'> 	int max_uV;</div><div class='del'>-	unsigned char volt_shift;</div><div class='del'>-	unsigned char en_bit;</div><div class='ctx'> 	unsigned char activate_bit;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -70,42 +88,6 @@ static int verify_range(struct da9052_regulator_info *info,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int da9052_regulator_enable(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);</div><div class='del'>-	struct da9052_regulator_info *info = regulator-&gt;info;</div><div class='del'>-	int offset = rdev_get_id(rdev);</div><div class='del'>-</div><div class='del'>-	return da9052_reg_update(regulator-&gt;da9052,</div><div class='del'>-				 DA9052_BUCKCORE_REG + offset,</div><div class='del'>-				 1 &lt;&lt; info-&gt;en_bit, 1 &lt;&lt; info-&gt;en_bit);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int da9052_regulator_disable(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);</div><div class='del'>-	struct da9052_regulator_info *info = regulator-&gt;info;</div><div class='del'>-	int offset = rdev_get_id(rdev);</div><div class='del'>-</div><div class='del'>-	return da9052_reg_update(regulator-&gt;da9052,</div><div class='del'>-				 DA9052_BUCKCORE_REG + offset,</div><div class='del'>-				 1 &lt;&lt; info-&gt;en_bit, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int da9052_regulator_is_enabled(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);</div><div class='del'>-	struct da9052_regulator_info *info = regulator-&gt;info;</div><div class='del'>-	int offset = rdev_get_id(rdev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = da9052_reg_read(regulator-&gt;da9052, DA9052_BUCKCORE_REG + offset);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return ret &amp; (1 &lt;&lt; info-&gt;en_bit);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int da9052_dcdc_get_current_limit(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);</div><div class='hunk'>@@ -173,36 +155,23 @@ static int da9052_dcdc_set_current_limit(struct regulator_dev *rdev, int min_uA,</div><div class='ctx'> 					 reg_val &lt;&lt; 6);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int da9052_list_buckperi_voltage(struct regulator_dev *rdev,</div><div class='del'>-					 unsigned int selector)</div><div class='del'>-{</div><div class='del'>-	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);</div><div class='del'>-	struct da9052_regulator_info *info = regulator-&gt;info;</div><div class='del'>-	int volt_uV;</div><div class='del'>-</div><div class='del'>-	if ((regulator-&gt;da9052-&gt;chip_id == DA9052) &amp;&amp;</div><div class='del'>-	    (selector &gt;= DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)) {</div><div class='del'>-		volt_uV = ((DA9052_BUCK_PERI_REG_MAP_UPTO_3uV * info-&gt;step_uV)</div><div class='del'>-			    + info-&gt;min_uV);</div><div class='del'>-		volt_uV += (selector - DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)</div><div class='del'>-			    * (DA9052_BUCK_PERI_3uV_STEP);</div><div class='del'>-	} else</div><div class='del'>-			volt_uV = (selector * info-&gt;step_uV) + info-&gt;min_uV;</div><div class='del'>-</div><div class='del'>-	if (volt_uV &gt; info-&gt;max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return volt_uV;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int da9052_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 				unsigned int selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);</div><div class='ctx'> 	struct da9052_regulator_info *info = regulator-&gt;info;</div><div class='add'>+	int id = rdev_get_id(rdev);</div><div class='ctx'> 	int volt_uV;</div><div class='ctx'> </div><div class='del'>-	volt_uV = info-&gt;min_uV + info-&gt;step_uV * selector;</div><div class='add'>+	if ((id == DA9052_ID_BUCK4) &amp;&amp; (regulator-&gt;da9052-&gt;chip_id == DA9052)</div><div class='add'>+		&amp;&amp; (selector &gt;= DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)) {</div><div class='add'>+		volt_uV = ((DA9052_BUCK_PERI_REG_MAP_UPTO_3uV * info-&gt;step_uV)</div><div class='add'>+			  + info-&gt;min_uV);</div><div class='add'>+		volt_uV += (selector - DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)</div><div class='add'>+				    * (DA9052_BUCK_PERI_3uV_STEP);</div><div class='add'>+	} else {</div><div class='add'>+		volt_uV = (selector * info-&gt;step_uV) + info-&gt;min_uV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (volt_uV &gt; info-&gt;max_uV)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -210,103 +179,13 @@ static int da9052_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	return volt_uV;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int da9052_regulator_set_voltage_int(struct regulator_dev *rdev,</div><div class='del'>-					     int min_uV, int max_uV,</div><div class='del'>-					     unsigned int *selector)</div><div class='del'>-{</div><div class='del'>-	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);</div><div class='del'>-	struct da9052_regulator_info *info = regulator-&gt;info;</div><div class='del'>-	int offset = rdev_get_id(rdev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = verify_range(info, min_uV, max_uV);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (min_uV &lt; info-&gt;min_uV)</div><div class='del'>-		min_uV = info-&gt;min_uV;</div><div class='del'>-</div><div class='del'>-	*selector = DIV_ROUND_UP(min_uV - info-&gt;min_uV, info-&gt;step_uV);</div><div class='del'>-</div><div class='del'>-	ret = da9052_list_voltage(rdev, *selector);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return da9052_reg_update(regulator-&gt;da9052,</div><div class='del'>-				 DA9052_BUCKCORE_REG + offset,</div><div class='del'>-				 (1 &lt;&lt; info-&gt;volt_shift) - 1, *selector);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int da9052_set_ldo_voltage(struct regulator_dev *rdev,</div><div class='del'>-				   int min_uV, int max_uV,</div><div class='del'>-				   unsigned int *selector)</div><div class='del'>-{</div><div class='del'>-	return da9052_regulator_set_voltage_int(rdev, min_uV, max_uV, selector);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int da9052_set_ldo5_6_voltage(struct regulator_dev *rdev,</div><div class='del'>-				      int min_uV, int max_uV,</div><div class='del'>-				      unsigned int *selector)</div><div class='del'>-{</div><div class='del'>-	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);</div><div class='del'>-	struct da9052_regulator_info *info = regulator-&gt;info;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = da9052_regulator_set_voltage_int(rdev, min_uV, max_uV, selector);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Some LDOs are DVC controlled which requires enabling of</div><div class='del'>-	 * the LDO activate bit to implment the changes on the</div><div class='del'>-	 * LDO output.</div><div class='del'>-	*/</div><div class='del'>-	return da9052_reg_update(regulator-&gt;da9052, DA9052_SUPPLY_REG,</div><div class='del'>-				 info-&gt;activate_bit, info-&gt;activate_bit);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int da9052_set_dcdc_voltage(struct regulator_dev *rdev,</div><div class='del'>-				    int min_uV, int max_uV,</div><div class='del'>-				    unsigned int *selector)</div><div class='del'>-{</div><div class='del'>-	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);</div><div class='del'>-	struct da9052_regulator_info *info = regulator-&gt;info;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = da9052_regulator_set_voltage_int(rdev, min_uV, max_uV, selector);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Some DCDCs are DVC controlled which requires enabling of</div><div class='del'>-	 * the DCDC activate bit to implment the changes on the</div><div class='del'>-	 * DCDC output.</div><div class='del'>-	*/</div><div class='del'>-	return da9052_reg_update(regulator-&gt;da9052, DA9052_SUPPLY_REG,</div><div class='del'>-				 info-&gt;activate_bit, info-&gt;activate_bit);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int da9052_get_regulator_voltage_sel(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);</div><div class='del'>-	struct da9052_regulator_info *info = regulator-&gt;info;</div><div class='del'>-	int offset = rdev_get_id(rdev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = da9052_reg_read(regulator-&gt;da9052, DA9052_BUCKCORE_REG + offset);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret &amp;= ((1 &lt;&lt; info-&gt;volt_shift) - 1);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int da9052_set_buckperi_voltage(struct regulator_dev *rdev, int min_uV,</div><div class='del'>-					int max_uV, unsigned int *selector)</div><div class='add'>+static int da9052_map_voltage(struct regulator_dev *rdev,</div><div class='add'>+			      int min_uV, int max_uV)</div><div class='ctx'> {</div><div class='ctx'> 	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);</div><div class='ctx'> 	struct da9052_regulator_info *info = regulator-&gt;info;</div><div class='del'>-	int offset = rdev_get_id(rdev);</div><div class='del'>-	int ret;</div><div class='add'>+	int id = rdev_get_id(rdev);</div><div class='add'>+	int ret, sel;</div><div class='ctx'> </div><div class='ctx'> 	ret = verify_range(info, min_uV, max_uV);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -315,192 +194,147 @@ static int da9052_set_buckperi_voltage(struct regulator_dev *rdev, int min_uV,</div><div class='ctx'> 	if (min_uV &lt; info-&gt;min_uV)</div><div class='ctx'> 		min_uV = info-&gt;min_uV;</div><div class='ctx'> </div><div class='del'>-	if ((regulator-&gt;da9052-&gt;chip_id == DA9052) &amp;&amp;</div><div class='del'>-	    (min_uV &gt;= DA9052_CONST_3uV))</div><div class='del'>-		*selector = DA9052_BUCK_PERI_REG_MAP_UPTO_3uV +</div><div class='del'>-			    DIV_ROUND_UP(min_uV - DA9052_CONST_3uV,</div><div class='del'>-					 DA9052_BUCK_PERI_3uV_STEP);</div><div class='del'>-	else</div><div class='del'>-		*selector = DIV_ROUND_UP(min_uV - info-&gt;min_uV, info-&gt;step_uV);</div><div class='add'>+	if ((id == DA9052_ID_BUCK4) &amp;&amp; (regulator-&gt;da9052-&gt;chip_id == DA9052)</div><div class='add'>+		&amp;&amp; (min_uV &gt;= DA9052_CONST_3uV)) {</div><div class='add'>+			sel = DA9052_BUCK_PERI_REG_MAP_UPTO_3uV +</div><div class='add'>+			      DIV_ROUND_UP(min_uV - DA9052_CONST_3uV,</div><div class='add'>+					   DA9052_BUCK_PERI_3uV_STEP);</div><div class='add'>+	} else {</div><div class='add'>+		sel = DIV_ROUND_UP(min_uV - info-&gt;min_uV, info-&gt;step_uV);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	ret = da9052_list_buckperi_voltage(rdev, *selector);</div><div class='add'>+	ret = da9052_list_voltage(rdev, sel);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return da9052_reg_update(regulator-&gt;da9052,</div><div class='del'>-				 DA9052_BUCKCORE_REG + offset,</div><div class='del'>-				 (1 &lt;&lt; info-&gt;volt_shift) - 1, *selector);</div><div class='add'>+	return sel;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int da9052_get_buckperi_voltage_sel(struct regulator_dev *rdev)</div><div class='add'>+static int da9052_regulator_set_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+					    unsigned int selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct da9052_regulator *regulator = rdev_get_drvdata(rdev);</div><div class='ctx'> 	struct da9052_regulator_info *info = regulator-&gt;info;</div><div class='del'>-	int offset = rdev_get_id(rdev);</div><div class='add'>+	int id = rdev_get_id(rdev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = da9052_reg_read(regulator-&gt;da9052, DA9052_BUCKCORE_REG + offset);</div><div class='add'>+	ret = da9052_reg_update(regulator-&gt;da9052, rdev-&gt;desc-&gt;vsel_reg,</div><div class='add'>+				rdev-&gt;desc-&gt;vsel_mask, selector);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret &amp;= ((1 &lt;&lt; info-&gt;volt_shift) - 1);</div><div class='add'>+	/* Some LDOs and DCDCs are DVC controlled which requires enabling of</div><div class='add'>+	 * the activate bit to implment the changes on the output.</div><div class='add'>+	 */</div><div class='add'>+	switch (id) {</div><div class='add'>+	case DA9052_ID_BUCK1:</div><div class='add'>+	case DA9052_ID_BUCK2:</div><div class='add'>+	case DA9052_ID_BUCK3:</div><div class='add'>+	case DA9052_ID_LDO2:</div><div class='add'>+	case DA9052_ID_LDO3:</div><div class='add'>+		ret = da9052_reg_update(regulator-&gt;da9052, DA9052_SUPPLY_REG,</div><div class='add'>+					info-&gt;activate_bit, info-&gt;activate_bit);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct regulator_ops da9052_buckperi_ops = {</div><div class='del'>-	.list_voltage = da9052_list_buckperi_voltage,</div><div class='del'>-	.get_voltage_sel = da9052_get_buckperi_voltage_sel,</div><div class='del'>-	.set_voltage = da9052_set_buckperi_voltage,</div><div class='del'>-</div><div class='del'>-	.get_current_limit = da9052_dcdc_get_current_limit,</div><div class='del'>-	.set_current_limit = da9052_dcdc_set_current_limit,</div><div class='del'>-</div><div class='del'>-	.is_enabled = da9052_regulator_is_enabled,</div><div class='del'>-	.enable = da9052_regulator_enable,</div><div class='del'>-	.disable = da9052_regulator_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct regulator_ops da9052_dcdc_ops = {</div><div class='del'>-	.set_voltage = da9052_set_dcdc_voltage,</div><div class='ctx'> 	.get_current_limit = da9052_dcdc_get_current_limit,</div><div class='ctx'> 	.set_current_limit = da9052_dcdc_set_current_limit,</div><div class='ctx'> </div><div class='ctx'> 	.list_voltage = da9052_list_voltage,</div><div class='del'>-	.get_voltage_sel = da9052_get_regulator_voltage_sel,</div><div class='del'>-	.is_enabled = da9052_regulator_is_enabled,</div><div class='del'>-	.enable = da9052_regulator_enable,</div><div class='del'>-	.disable = da9052_regulator_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_ops da9052_ldo5_6_ops = {</div><div class='del'>-	.set_voltage = da9052_set_ldo5_6_voltage,</div><div class='del'>-</div><div class='del'>-	.list_voltage = da9052_list_voltage,</div><div class='del'>-	.get_voltage_sel = da9052_get_regulator_voltage_sel,</div><div class='del'>-	.is_enabled = da9052_regulator_is_enabled,</div><div class='del'>-	.enable = da9052_regulator_enable,</div><div class='del'>-	.disable = da9052_regulator_disable,</div><div class='add'>+	.map_voltage = da9052_map_voltage,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='add'>+	.set_voltage_sel = da9052_regulator_set_voltage_sel,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops da9052_ldo_ops = {</div><div class='del'>-	.set_voltage = da9052_set_ldo_voltage,</div><div class='del'>-</div><div class='ctx'> 	.list_voltage = da9052_list_voltage,</div><div class='del'>-	.get_voltage_sel = da9052_get_regulator_voltage_sel,</div><div class='del'>-	.is_enabled = da9052_regulator_is_enabled,</div><div class='del'>-	.enable = da9052_regulator_enable,</div><div class='del'>-	.disable = da9052_regulator_disable,</div><div class='add'>+	.map_voltage = da9052_map_voltage,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='add'>+	.set_voltage_sel = da9052_regulator_set_voltage_sel,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define DA9052_LDO5_6(_id, step, min, max, sbits, ebits, abits) \</div><div class='del'>-{\</div><div class='del'>-	.reg_desc = {\</div><div class='del'>-		.name = "LDO" #_id,\</div><div class='del'>-		.ops = &amp;da9052_ldo5_6_ops,\</div><div class='del'>-		.type = REGULATOR_VOLTAGE,\</div><div class='del'>-		.id = _id,\</div><div class='del'>-		.n_voltages = (max - min) / step + 1, \</div><div class='del'>-		.owner = THIS_MODULE,\</div><div class='del'>-	},\</div><div class='del'>-	.min_uV = (min) * 1000,\</div><div class='del'>-	.max_uV = (max) * 1000,\</div><div class='del'>-	.step_uV = (step) * 1000,\</div><div class='del'>-	.volt_shift = (sbits),\</div><div class='del'>-	.en_bit = (ebits),\</div><div class='del'>-	.activate_bit = (abits),\</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define DA9052_LDO(_id, step, min, max, sbits, ebits, abits) \</div><div class='ctx'> {\</div><div class='ctx'> 	.reg_desc = {\</div><div class='del'>-		.name = "LDO" #_id,\</div><div class='add'>+		.name = #_id,\</div><div class='ctx'> 		.ops = &amp;da9052_ldo_ops,\</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,\</div><div class='del'>-		.id = _id,\</div><div class='add'>+		.id = DA9052_ID_##_id,\</div><div class='ctx'> 		.n_voltages = (max - min) / step + 1, \</div><div class='ctx'> 		.owner = THIS_MODULE,\</div><div class='add'>+		.vsel_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \</div><div class='add'>+		.vsel_mask = (1 &lt;&lt; (sbits)) - 1,\</div><div class='add'>+		.enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \</div><div class='add'>+		.enable_mask = 1 &lt;&lt; (ebits),\</div><div class='ctx'> 	},\</div><div class='ctx'> 	.min_uV = (min) * 1000,\</div><div class='ctx'> 	.max_uV = (max) * 1000,\</div><div class='ctx'> 	.step_uV = (step) * 1000,\</div><div class='del'>-	.volt_shift = (sbits),\</div><div class='del'>-	.en_bit = (ebits),\</div><div class='ctx'> 	.activate_bit = (abits),\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define DA9052_DCDC(_id, step, min, max, sbits, ebits, abits) \</div><div class='ctx'> {\</div><div class='ctx'> 	.reg_desc = {\</div><div class='del'>-		.name = "BUCK" #_id,\</div><div class='add'>+		.name = #_id,\</div><div class='ctx'> 		.ops = &amp;da9052_dcdc_ops,\</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,\</div><div class='del'>-		.id = _id,\</div><div class='add'>+		.id = DA9052_ID_##_id,\</div><div class='ctx'> 		.n_voltages = (max - min) / step + 1, \</div><div class='ctx'> 		.owner = THIS_MODULE,\</div><div class='add'>+		.vsel_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \</div><div class='add'>+		.vsel_mask = (1 &lt;&lt; (sbits)) - 1,\</div><div class='add'>+		.enable_reg = DA9052_BUCKCORE_REG + DA9052_ID_##_id, \</div><div class='add'>+		.enable_mask = 1 &lt;&lt; (ebits),\</div><div class='ctx'> 	},\</div><div class='ctx'> 	.min_uV = (min) * 1000,\</div><div class='ctx'> 	.max_uV = (max) * 1000,\</div><div class='ctx'> 	.step_uV = (step) * 1000,\</div><div class='del'>-	.volt_shift = (sbits),\</div><div class='del'>-	.en_bit = (ebits),\</div><div class='del'>-	.activate_bit = (abits),\</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define DA9052_BUCKPERI(_id, step, min, max, sbits, ebits, abits) \</div><div class='del'>-{\</div><div class='del'>-	.reg_desc = {\</div><div class='del'>-		.name = "BUCK" #_id,\</div><div class='del'>-		.ops = &amp;da9052_buckperi_ops,\</div><div class='del'>-		.type = REGULATOR_VOLTAGE,\</div><div class='del'>-		.id = _id,\</div><div class='del'>-		.n_voltages = (max - min) / step + 1, \</div><div class='del'>-		.owner = THIS_MODULE,\</div><div class='del'>-	},\</div><div class='del'>-	.min_uV = (min) * 1000,\</div><div class='del'>-	.max_uV = (max) * 1000,\</div><div class='del'>-	.step_uV = (step) * 1000,\</div><div class='del'>-	.volt_shift = (sbits),\</div><div class='del'>-	.en_bit = (ebits),\</div><div class='ctx'> 	.activate_bit = (abits),\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct da9052_regulator_info da9052_regulator_info[] = {</div><div class='del'>-	/* Buck1 - 4 */</div><div class='del'>-	DA9052_DCDC(0, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO),</div><div class='del'>-	DA9052_DCDC(1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO),</div><div class='del'>-	DA9052_DCDC(2, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO),</div><div class='del'>-	DA9052_BUCKPERI(3, 50, 1800, 3600, 5, 6, 0),</div><div class='del'>-	/* LD01 - LDO10 */</div><div class='del'>-	DA9052_LDO(4, 50, 600, 1800, 5, 6, 0),</div><div class='del'>-	DA9052_LDO5_6(5, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO),</div><div class='del'>-	DA9052_LDO5_6(6, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO),</div><div class='del'>-	DA9052_LDO(7, 25, 1725, 3300, 6, 6, 0),</div><div class='del'>-	DA9052_LDO(8, 50, 1200, 3600, 6, 6, 0),</div><div class='del'>-	DA9052_LDO(9, 50, 1200, 3600, 6, 6, 0),</div><div class='del'>-	DA9052_LDO(10, 50, 1200, 3600, 6, 6, 0),</div><div class='del'>-	DA9052_LDO(11, 50, 1200, 3600, 6, 6, 0),</div><div class='del'>-	DA9052_LDO(12, 50, 1250, 3650, 6, 6, 0),</div><div class='del'>-	DA9052_LDO(13, 50, 1200, 3600, 6, 6, 0),</div><div class='add'>+	DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO),</div><div class='add'>+	DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO),</div><div class='add'>+	DA9052_DCDC(BUCK3, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO),</div><div class='add'>+	DA9052_DCDC(BUCK4, 50, 1800, 3600, 5, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO),</div><div class='add'>+	DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO),</div><div class='add'>+	DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct da9052_regulator_info da9053_regulator_info[] = {</div><div class='del'>-	/* Buck1 - 4 */</div><div class='del'>-	DA9052_DCDC(0, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO),</div><div class='del'>-	DA9052_DCDC(1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO),</div><div class='del'>-	DA9052_DCDC(2, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO),</div><div class='del'>-	DA9052_BUCKPERI(3, 25, 925, 2500, 6, 6, 0),</div><div class='del'>-	/* LD01 - LDO10 */</div><div class='del'>-	DA9052_LDO(4, 50, 600, 1800, 5, 6, 0),</div><div class='del'>-	DA9052_LDO5_6(5, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO),</div><div class='del'>-	DA9052_LDO5_6(6, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO),</div><div class='del'>-	DA9052_LDO(7, 25, 1725, 3300, 6, 6, 0),</div><div class='del'>-	DA9052_LDO(8, 50, 1200, 3600, 6, 6, 0),</div><div class='del'>-	DA9052_LDO(9, 50, 1200, 3600, 6, 6, 0),</div><div class='del'>-	DA9052_LDO(10, 50, 1200, 3600, 6, 6, 0),</div><div class='del'>-	DA9052_LDO(11, 50, 1200, 3600, 6, 6, 0),</div><div class='del'>-	DA9052_LDO(12, 50, 1250, 3650, 6, 6, 0),</div><div class='del'>-	DA9052_LDO(13, 50, 1200, 3600, 6, 6, 0),</div><div class='add'>+	DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO),</div><div class='add'>+	DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO),</div><div class='add'>+	DA9052_DCDC(BUCK3, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO),</div><div class='add'>+	DA9052_DCDC(BUCK4, 25, 925, 2500, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO),</div><div class='add'>+	DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO),</div><div class='add'>+	DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0),</div><div class='add'>+	DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline struct da9052_regulator_info *find_regulator_info(u8 chip_id,</div><div class='hunk'>@@ -533,10 +367,10 @@ static inline struct da9052_regulator_info *find_regulator_info(u8 chip_id,</div><div class='ctx'> </div><div class='ctx'> static int __devinit da9052_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct da9052_regulator *regulator;</div><div class='ctx'> 	struct da9052 *da9052;</div><div class='ctx'> 	struct da9052_pdata *pdata;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	regulator = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct da9052_regulator),</div><div class='ctx'> 				 GFP_KERNEL);</div><div class='hunk'>@@ -551,26 +385,49 @@ static int __devinit da9052_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 					      pdev-&gt;id);</div><div class='ctx'> 	if (regulator-&gt;info == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "invalid regulator ID specified\n");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto err;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.driver_data = regulator;</div><div class='add'>+	config.regmap = da9052-&gt;regmap;</div><div class='add'>+	if (pdata &amp;&amp; pdata-&gt;regulators) {</div><div class='add'>+		config.init_data = pdata-&gt;regulators[pdev-&gt;id];</div><div class='add'>+	} else {</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+		struct device_node *nproot = da9052-&gt;dev-&gt;of_node;</div><div class='add'>+		struct device_node *np;</div><div class='add'>+</div><div class='add'>+		if (!nproot)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+</div><div class='add'>+		nproot = of_find_node_by_name(nproot, "regulators");</div><div class='add'>+		if (!nproot)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+</div><div class='add'>+		for (np = of_get_next_child(nproot, NULL); np;</div><div class='add'>+		     np = of_get_next_child(nproot, np)) {</div><div class='add'>+			if (!of_node_cmp(np-&gt;name,</div><div class='add'>+					 regulator-&gt;info-&gt;reg_desc.name)) {</div><div class='add'>+				config.init_data = of_get_regulator_init_data(</div><div class='add'>+					&amp;pdev-&gt;dev, np);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	regulator-&gt;rdev = regulator_register(&amp;regulator-&gt;info-&gt;reg_desc,</div><div class='del'>-					     &amp;pdev-&gt;dev,</div><div class='del'>-					     pdata-&gt;regulators[pdev-&gt;id],</div><div class='del'>-					     regulator, NULL);</div><div class='add'>+					     &amp;config);</div><div class='ctx'> 	if (IS_ERR(regulator-&gt;rdev)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to register regulator %s\n",</div><div class='ctx'> 			regulator-&gt;info-&gt;reg_desc.name);</div><div class='del'>-		ret = PTR_ERR(regulator-&gt;rdev);</div><div class='del'>-		goto err;</div><div class='add'>+		return PTR_ERR(regulator-&gt;rdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, regulator);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-err:</div><div class='del'>-	devm_kfree(&amp;pdev-&gt;dev, regulator);</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit da9052_regulator_remove(struct platform_device *pdev)</div><div class='hunk'>@@ -578,8 +435,6 @@ static int __devexit da9052_regulator_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct da9052_regulator *regulator = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	regulator_unregister(regulator-&gt;rdev);</div><div class='del'>-	devm_kfree(&amp;pdev-&gt;dev, regulator);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/db8500-prcmu.c b/drivers/regulator/db8500-prcmu.c<br/>index 4bd25e75efa0..968f97f3cb3d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/db8500-prcmu.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/db8500-prcmu.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/db8500-prcmu.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/db8500-prcmu.c</a></div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/db8500-prcmu.h&gt;</div><div class='add'>+#include &lt;linux/regulator/of_regulator.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include "dbx500-prcmu.h"</div><div class='ctx'> </div><div class='hunk'>@@ -410,45 +412,120 @@ dbx500_regulator_info[DB8500_NUM_REGULATORS] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static __devinit int db8500_regulator_register(struct platform_device *pdev,</div><div class='add'>+					struct regulator_init_data *init_data,</div><div class='add'>+					int id,</div><div class='add'>+					struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	struct dbx500_regulator_info *info;</div><div class='add'>+	struct regulator_config config = { };</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* assign per-regulator data */</div><div class='add'>+	info = &amp;dbx500_regulator_info[id];</div><div class='add'>+	info-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = init_data;</div><div class='add'>+	config.driver_data = info;</div><div class='add'>+	config.of_node = np;</div><div class='add'>+</div><div class='add'>+	/* register with the regulator framework */</div><div class='add'>+	info-&gt;rdev = regulator_register(&amp;info-&gt;desc, &amp;config);</div><div class='add'>+	if (IS_ERR(info-&gt;rdev)) {</div><div class='add'>+		err = PTR_ERR(info-&gt;rdev);</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to register %s: err %i\n",</div><div class='add'>+			info-&gt;desc.name, err);</div><div class='add'>+</div><div class='add'>+		/* if failing, unregister all earlier regulators */</div><div class='add'>+		while (--id &gt;= 0) {</div><div class='add'>+			info = &amp;dbx500_regulator_info[id];</div><div class='add'>+			regulator_unregister(info-&gt;rdev);</div><div class='add'>+		}</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(rdev_get_dev(info-&gt;rdev),</div><div class='add'>+		"regulator-%s-probed\n", info-&gt;desc.name);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct of_regulator_match db8500_regulator_matches[] = {</div><div class='add'>+	{ .name	= "db8500-vape",          .driver_data = (void *) DB8500_REGULATOR_VAPE, },</div><div class='add'>+	{ .name	= "db8500-varm",          .driver_data = (void *) DB8500_REGULATOR_VARM, },</div><div class='add'>+	{ .name	= "db8500-vmodem",        .driver_data = (void *) DB8500_REGULATOR_VMODEM, },</div><div class='add'>+	{ .name	= "db8500-vpll",          .driver_data = (void *) DB8500_REGULATOR_VPLL, },</div><div class='add'>+	{ .name	= "db8500-vsmps1",        .driver_data = (void *) DB8500_REGULATOR_VSMPS1, },</div><div class='add'>+	{ .name	= "db8500-vsmps2",        .driver_data = (void *) DB8500_REGULATOR_VSMPS2, },</div><div class='add'>+	{ .name	= "db8500-vsmps3",        .driver_data = (void *) DB8500_REGULATOR_VSMPS3, },</div><div class='add'>+	{ .name	= "db8500-vrf1",          .driver_data = (void *) DB8500_REGULATOR_VRF1, },</div><div class='add'>+	{ .name	= "db8500-sva-mmdsp",     .driver_data = (void *) DB8500_REGULATOR_SWITCH_SVAMMDSP, },</div><div class='add'>+	{ .name	= "db8500-sva-mmdsp-ret", .driver_data = (void *) DB8500_REGULATOR_SWITCH_SVAMMDSPRET, },</div><div class='add'>+	{ .name	= "db8500-sva-pipe",      .driver_data = (void *) DB8500_REGULATOR_SWITCH_SVAPIPE, },</div><div class='add'>+	{ .name	= "db8500-sia-mmdsp",     .driver_data = (void *) DB8500_REGULATOR_SWITCH_SIAMMDSP, },</div><div class='add'>+	{ .name	= "db8500-sia-mmdsp-ret", .driver_data = (void *) DB8500_REGULATOR_SWITCH_SIAMMDSPRET, },</div><div class='add'>+	{ .name	= "db8500-sia-pipe",      .driver_data = (void *) DB8500_REGULATOR_SWITCH_SIAPIPE, },</div><div class='add'>+	{ .name	= "db8500-sga",           .driver_data = (void *) DB8500_REGULATOR_SWITCH_SGA, },</div><div class='add'>+	{ .name	= "db8500-b2r2-mcde",     .driver_data = (void *) DB8500_REGULATOR_SWITCH_B2R2_MCDE, },</div><div class='add'>+	{ .name	= "db8500-esram12",       .driver_data = (void *) DB8500_REGULATOR_SWITCH_ESRAM12, },</div><div class='add'>+	{ .name	= "db8500-esram12-ret",   .driver_data = (void *) DB8500_REGULATOR_SWITCH_ESRAM12RET, },</div><div class='add'>+	{ .name	= "db8500-esram34",       .driver_data = (void *) DB8500_REGULATOR_SWITCH_ESRAM34, },</div><div class='add'>+	{ .name	= "db8500-esram34-ret",   .driver_data = (void *) DB8500_REGULATOR_SWITCH_ESRAM34RET, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __devinit int</div><div class='add'>+db8500_regulator_of_probe(struct platform_device *pdev,</div><div class='add'>+			struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(dbx500_regulator_info); i++) {</div><div class='add'>+		err = db8500_regulator_register(</div><div class='add'>+			pdev, db8500_regulator_matches[i].init_data,</div><div class='add'>+			i, db8500_regulator_matches[i].of_node);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __devinit db8500_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct regulator_init_data *db8500_init_data =</div><div class='ctx'> 					dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='ctx'> 	int i, err;</div><div class='ctx'> </div><div class='ctx'> 	/* register all regulators */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(dbx500_regulator_info); i++) {</div><div class='del'>-		struct dbx500_regulator_info *info;</div><div class='del'>-		struct regulator_init_data *init_data = &amp;db8500_init_data[i];</div><div class='del'>-</div><div class='del'>-		/* assign per-regulator data */</div><div class='del'>-		info = &amp;dbx500_regulator_info[i];</div><div class='del'>-		info-&gt;dev = &amp;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-		/* register with the regulator framework */</div><div class='del'>-		info-&gt;rdev = regulator_register(&amp;info-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-				init_data, info, NULL);</div><div class='del'>-		if (IS_ERR(info-&gt;rdev)) {</div><div class='del'>-			err = PTR_ERR(info-&gt;rdev);</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "failed to register %s: err %i\n",</div><div class='del'>-				info-&gt;desc.name, err);</div><div class='del'>-</div><div class='del'>-			/* if failing, unregister all earlier regulators */</div><div class='del'>-			while (--i &gt;= 0) {</div><div class='del'>-				info = &amp;dbx500_regulator_info[i];</div><div class='del'>-				regulator_unregister(info-&gt;rdev);</div><div class='del'>-			}</div><div class='add'>+	if (np) {</div><div class='add'>+		err = of_regulator_match(&amp;pdev-&gt;dev, np,</div><div class='add'>+					db8500_regulator_matches,</div><div class='add'>+					ARRAY_SIZE(db8500_regulator_matches));</div><div class='add'>+		if (err &lt; 0) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+				"Error parsing regulator init data: %d\n", err);</div><div class='ctx'> 			return err;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		dev_dbg(rdev_get_dev(info-&gt;rdev),</div><div class='del'>-			"regulator-%s-probed\n", info-&gt;desc.name);</div><div class='add'>+		err = db8500_regulator_of_probe(pdev, np);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(dbx500_regulator_info); i++) {</div><div class='add'>+			err = db8500_regulator_register(pdev,</div><div class='add'>+							&amp;db8500_init_data[i],</div><div class='add'>+							i, NULL);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	err = ux500_regulator_debug_init(pdev,</div><div class='ctx'> 					 dbx500_regulator_info,</div><div class='ctx'> 					 ARRAY_SIZE(dbx500_regulator_info));</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __exit db8500_regulator_remove(struct platform_device *pdev)</div><div class='hunk'>@@ -470,10 +547,16 @@ static int __exit db8500_regulator_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct of_device_id db8500_prcmu_regulator_match[] = {</div><div class='add'>+        { .compatible = "stericsson,db8500-prcmu-regulator", },</div><div class='add'>+        {}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct platform_driver db8500_regulator_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "db8500-prcmu-regulators",</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = db8500_prcmu_regulator_match,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = db8500_regulator_probe,</div><div class='ctx'> 	.remove = __exit_p(db8500_regulator_remove),</div><div class='head'>diff --git a/drivers/regulator/dummy.c b/drivers/regulator/dummy.c<br/>index 0ee00de4be72..86f655c7f7a1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/dummy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/dummy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/dummy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/dummy.c</a></div><div class='hunk'>@@ -39,10 +39,13 @@ static struct regulator_desc dummy_desc = {</div><div class='ctx'> </div><div class='ctx'> static int __devinit dummy_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	dummy_regulator_rdev = regulator_register(&amp;dummy_desc, NULL,</div><div class='del'>-						  &amp;dummy_initdata, NULL, NULL);</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = &amp;dummy_initdata;</div><div class='add'>+</div><div class='add'>+	dummy_regulator_rdev = regulator_register(&amp;dummy_desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(dummy_regulator_rdev)) {</div><div class='ctx'> 		ret = PTR_ERR(dummy_regulator_rdev);</div><div class='ctx'> 		pr_err("Failed to register regulator: %d\n", ret);</div><div class='head'>diff --git a/drivers/regulator/fixed.c b/drivers/regulator/fixed.c<br/>index 40f38030b394..f09fe7b20e82 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/fixed.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/fixed.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/fixed.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/fixed.c</a></div><div class='hunk'>@@ -25,7 +25,6 @@</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/fixed.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_gpio.h&gt;</div><div class='hunk'>@@ -91,6 +90,9 @@ of_get_fixed_voltage_config(struct device *dev)</div><div class='ctx'> 	if (of_find_property(np, "enable-active-high", NULL))</div><div class='ctx'> 		config-&gt;enable_high = true;</div><div class='ctx'> </div><div class='add'>+	if (of_find_property(np, "gpio-open-drain", NULL))</div><div class='add'>+		config-&gt;gpio_is_open_drain = true;</div><div class='add'>+</div><div class='ctx'> 	return config;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -105,10 +107,8 @@ static int fixed_voltage_enable(struct regulator_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fixed_voltage_data *data = rdev_get_drvdata(dev);</div><div class='ctx'> </div><div class='del'>-	if (gpio_is_valid(data-&gt;gpio)) {</div><div class='del'>-		gpio_set_value_cansleep(data-&gt;gpio, data-&gt;enable_high);</div><div class='del'>-		data-&gt;is_enabled = true;</div><div class='del'>-	}</div><div class='add'>+	gpio_set_value_cansleep(data-&gt;gpio, data-&gt;enable_high);</div><div class='add'>+	data-&gt;is_enabled = true;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -117,10 +117,8 @@ static int fixed_voltage_disable(struct regulator_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fixed_voltage_data *data = rdev_get_drvdata(dev);</div><div class='ctx'> </div><div class='del'>-	if (gpio_is_valid(data-&gt;gpio)) {</div><div class='del'>-		gpio_set_value_cansleep(data-&gt;gpio, !data-&gt;enable_high);</div><div class='del'>-		data-&gt;is_enabled = false;</div><div class='del'>-	}</div><div class='add'>+	gpio_set_value_cansleep(data-&gt;gpio, !data-&gt;enable_high);</div><div class='add'>+	data-&gt;is_enabled = false;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -153,7 +151,7 @@ static int fixed_voltage_list_voltage(struct regulator_dev *dev,</div><div class='ctx'> 	return data-&gt;microvolts;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct regulator_ops fixed_voltage_ops = {</div><div class='add'>+static struct regulator_ops fixed_voltage_gpio_ops = {</div><div class='ctx'> 	.is_enabled = fixed_voltage_is_enabled,</div><div class='ctx'> 	.enable = fixed_voltage_enable,</div><div class='ctx'> 	.disable = fixed_voltage_disable,</div><div class='hunk'>@@ -162,10 +160,16 @@ static struct regulator_ops fixed_voltage_ops = {</div><div class='ctx'> 	.list_voltage = fixed_voltage_list_voltage,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct regulator_ops fixed_voltage_ops = {</div><div class='add'>+	.get_voltage = fixed_voltage_get_voltage,</div><div class='add'>+	.list_voltage = fixed_voltage_list_voltage,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int __devinit reg_fixed_voltage_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fixed_voltage_config *config;</div><div class='ctx'> 	struct fixed_voltage_data *drvdata;</div><div class='add'>+	struct regulator_config cfg = { };</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (pdev-&gt;dev.of_node)</div><div class='hunk'>@@ -176,7 +180,8 @@ static int __devinit reg_fixed_voltage_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!config)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	drvdata = kzalloc(sizeof(struct fixed_voltage_data), GFP_KERNEL);</div><div class='add'>+	drvdata = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct fixed_voltage_data),</div><div class='add'>+			       GFP_KERNEL);</div><div class='ctx'> 	if (drvdata == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Failed to allocate device data\n");</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -191,7 +196,6 @@ static int __devinit reg_fixed_voltage_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> 	drvdata-&gt;desc.type = REGULATOR_VOLTAGE;</div><div class='ctx'> 	drvdata-&gt;desc.owner = THIS_MODULE;</div><div class='del'>-	drvdata-&gt;desc.ops = &amp;fixed_voltage_ops;</div><div class='ctx'> </div><div class='ctx'> 	if (config-&gt;microvolts)</div><div class='ctx'> 		drvdata-&gt;desc.n_voltages = 1;</div><div class='hunk'>@@ -201,6 +205,7 @@ static int __devinit reg_fixed_voltage_probe(struct platform_device *pdev)</div><div class='ctx'> 	drvdata-&gt;startup_delay = config-&gt;startup_delay;</div><div class='ctx'> </div><div class='ctx'> 	if (gpio_is_valid(config-&gt;gpio)) {</div><div class='add'>+		int gpio_flag;</div><div class='ctx'> 		drvdata-&gt;enable_high = config-&gt;enable_high;</div><div class='ctx'> </div><div class='ctx'> 		/* FIXME: Remove below print warning</div><div class='hunk'>@@ -218,39 +223,39 @@ static int __devinit reg_fixed_voltage_probe(struct platform_device *pdev)</div><div class='ctx'> 			dev_warn(&amp;pdev-&gt;dev,</div><div class='ctx'> 				"using GPIO 0 for regulator enable control\n");</div><div class='ctx'> </div><div class='del'>-		ret = gpio_request(config-&gt;gpio, config-&gt;supply_name);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-			   "Could not obtain regulator enable GPIO %d: %d\n",</div><div class='del'>-							config-&gt;gpio, ret);</div><div class='del'>-			goto err_name;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* set output direction without changing state</div><div class='add'>+		/*</div><div class='add'>+		 * set output direction without changing state</div><div class='ctx'> 		 * to prevent glitch</div><div class='ctx'> 		 */</div><div class='ctx'> 		drvdata-&gt;is_enabled = config-&gt;enabled_at_boot;</div><div class='ctx'> 		ret = drvdata-&gt;is_enabled ?</div><div class='ctx'> 				config-&gt;enable_high : !config-&gt;enable_high;</div><div class='add'>+		gpio_flag = ret ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;</div><div class='add'>+</div><div class='add'>+		if (config-&gt;gpio_is_open_drain)</div><div class='add'>+			gpio_flag |= GPIOF_OPEN_DRAIN;</div><div class='ctx'> </div><div class='del'>-		ret = gpio_direction_output(config-&gt;gpio, ret);</div><div class='add'>+		ret = gpio_request_one(config-&gt;gpio, gpio_flag,</div><div class='add'>+						config-&gt;supply_name);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-			   "Could not configure regulator enable GPIO %d direction: %d\n",</div><div class='add'>+			   "Could not obtain regulator enable GPIO %d: %d\n",</div><div class='ctx'> 							config-&gt;gpio, ret);</div><div class='del'>-			goto err_gpio;</div><div class='add'>+			goto err_name;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		drvdata-&gt;desc.ops = &amp;fixed_voltage_gpio_ops;</div><div class='add'>+</div><div class='ctx'> 	} else {</div><div class='del'>-		/* Regulator without GPIO control is considered</div><div class='del'>-		 * always enabled</div><div class='del'>-		 */</div><div class='del'>-		drvdata-&gt;is_enabled = true;</div><div class='add'>+		drvdata-&gt;desc.ops = &amp;fixed_voltage_ops;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	drvdata-&gt;dev = regulator_register(&amp;drvdata-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-					  config-&gt;init_data, drvdata,</div><div class='del'>-					  pdev-&gt;dev.of_node);</div><div class='add'>+	cfg.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	cfg.init_data = config-&gt;init_data;</div><div class='add'>+	cfg.driver_data = drvdata;</div><div class='add'>+	cfg.of_node = pdev-&gt;dev.of_node;</div><div class='add'>+</div><div class='add'>+	drvdata-&gt;dev = regulator_register(&amp;drvdata-&gt;desc, &amp;cfg);</div><div class='ctx'> 	if (IS_ERR(drvdata-&gt;dev)) {</div><div class='ctx'> 		ret = PTR_ERR(drvdata-&gt;dev);</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Failed to register regulator: %d\n", ret);</div><div class='hunk'>@@ -270,7 +275,6 @@ err_gpio:</div><div class='ctx'> err_name:</div><div class='ctx'> 	kfree(drvdata-&gt;desc.name);</div><div class='ctx'> err:</div><div class='del'>-	kfree(drvdata);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -282,7 +286,6 @@ static int __devexit reg_fixed_voltage_remove(struct platform_device *pdev)</div><div class='ctx'> 	if (gpio_is_valid(drvdata-&gt;gpio))</div><div class='ctx'> 		gpio_free(drvdata-&gt;gpio);</div><div class='ctx'> 	kfree(drvdata-&gt;desc.name);</div><div class='del'>-	kfree(drvdata);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/regulator/gpio-regulator.c b/drivers/regulator/gpio-regulator.c<br/>index 42e1cb1835e5..9997d7aaca84 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/gpio-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/gpio-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/gpio-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/gpio-regulator.c</a></div><div class='hunk'>@@ -30,7 +30,6 @@</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/gpio-regulator.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct gpio_regulator_data {</div><div class='hunk'>@@ -105,15 +104,15 @@ static int gpio_regulator_set_value(struct regulator_dev *dev,</div><div class='ctx'> 					int min, int max)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpio_regulator_data *data = rdev_get_drvdata(dev);</div><div class='del'>-	int ptr, target, state;</div><div class='add'>+	int ptr, target, state, best_val = INT_MAX;</div><div class='ctx'> </div><div class='del'>-	target = -1;</div><div class='ctx'> 	for (ptr = 0; ptr &lt; data-&gt;nr_states; ptr++)</div><div class='del'>-		if (data-&gt;states[ptr].value &gt;= min &amp;&amp;</div><div class='add'>+		if (data-&gt;states[ptr].value &lt; best_val &amp;&amp;</div><div class='add'>+		    data-&gt;states[ptr].value &gt;= min &amp;&amp;</div><div class='ctx'> 		    data-&gt;states[ptr].value &lt;= max)</div><div class='ctx'> 			target = data-&gt;states[ptr].gpios;</div><div class='ctx'> </div><div class='del'>-	if (target &lt; 0)</div><div class='add'>+	if (best_val == INT_MAX)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	for (ptr = 0; ptr &lt; data-&gt;nr_gpios; ptr++) {</div><div class='hunk'>@@ -172,9 +171,11 @@ static int __devinit gpio_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpio_regulator_config *config = pdev-&gt;dev.platform_data;</div><div class='ctx'> 	struct gpio_regulator_data *drvdata;</div><div class='add'>+	struct regulator_config cfg = { };</div><div class='ctx'> 	int ptr, ret, state;</div><div class='ctx'> </div><div class='del'>-	drvdata = kzalloc(sizeof(struct gpio_regulator_data), GFP_KERNEL);</div><div class='add'>+	drvdata = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct gpio_regulator_data),</div><div class='add'>+			       GFP_KERNEL);</div><div class='ctx'> 	if (drvdata == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Failed to allocate device data\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -283,8 +284,11 @@ static int __devinit gpio_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> 	drvdata-&gt;state = state;</div><div class='ctx'> </div><div class='del'>-	drvdata-&gt;dev = regulator_register(&amp;drvdata-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-					  config-&gt;init_data, drvdata, NULL);</div><div class='add'>+	cfg.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	cfg.init_data = config-&gt;init_data;</div><div class='add'>+	cfg.driver_data = &amp;drvdata;</div><div class='add'>+</div><div class='add'>+	drvdata-&gt;dev = regulator_register(&amp;drvdata-&gt;desc, &amp;cfg);</div><div class='ctx'> 	if (IS_ERR(drvdata-&gt;dev)) {</div><div class='ctx'> 		ret = PTR_ERR(drvdata-&gt;dev);</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Failed to register regulator: %d\n", ret);</div><div class='hunk'>@@ -307,7 +311,6 @@ err_memgpio:</div><div class='ctx'> err_name:</div><div class='ctx'> 	kfree(drvdata-&gt;desc.name);</div><div class='ctx'> err:</div><div class='del'>-	kfree(drvdata);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -326,7 +329,6 @@ static int __devexit gpio_regulator_remove(struct platform_device *pdev)</div><div class='ctx'> 		gpio_free(drvdata-&gt;enable_gpio);</div><div class='ctx'> </div><div class='ctx'> 	kfree(drvdata-&gt;desc.name);</div><div class='del'>-	kfree(drvdata);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/regulator/isl6271a-regulator.c b/drivers/regulator/isl6271a-regulator.c<br/>index 775f5fd208c3..56d273f25603 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/isl6271a-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/isl6271a-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/isl6271a-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/isl6271a-regulator.c</a></div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define	ISL6271A_VOLTAGE_MIN	850000</div><div class='hunk'>@@ -36,47 +35,30 @@ struct isl_pmic {</div><div class='ctx'> 	struct mutex		mtx;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int isl6271a_get_voltage(struct regulator_dev *dev)</div><div class='add'>+static int isl6271a_get_voltage_sel(struct regulator_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct isl_pmic *pmic = rdev_get_drvdata(dev);</div><div class='del'>-	int idx, data;</div><div class='add'>+	int idx;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pmic-&gt;mtx);</div><div class='ctx'> </div><div class='ctx'> 	idx = i2c_smbus_read_byte(pmic-&gt;client);</div><div class='del'>-	if (idx &lt; 0) {</div><div class='add'>+	if (idx &lt; 0)</div><div class='ctx'> 		dev_err(&amp;pmic-&gt;client-&gt;dev, "Error getting voltage\n");</div><div class='del'>-		data = idx;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Convert the data from chip to microvolts */</div><div class='del'>-	data = ISL6271A_VOLTAGE_MIN + (ISL6271A_VOLTAGE_STEP * (idx &amp; 0xf));</div><div class='ctx'> </div><div class='del'>-out:</div><div class='ctx'> 	mutex_unlock(&amp;pmic-&gt;mtx);</div><div class='del'>-	return data;</div><div class='add'>+	return idx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int isl6271a_set_voltage(struct regulator_dev *dev,</div><div class='del'>-				int minuV, int maxuV,</div><div class='del'>-				unsigned *selector)</div><div class='add'>+static int isl6271a_set_voltage_sel(struct regulator_dev *dev,</div><div class='add'>+				    unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct isl_pmic *pmic = rdev_get_drvdata(dev);</div><div class='del'>-	int err, data;</div><div class='del'>-</div><div class='del'>-	if (minuV &lt; ISL6271A_VOLTAGE_MIN || minuV &gt; ISL6271A_VOLTAGE_MAX)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (maxuV &lt; ISL6271A_VOLTAGE_MIN || maxuV &gt; ISL6271A_VOLTAGE_MAX)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	data = DIV_ROUND_UP(minuV - ISL6271A_VOLTAGE_MIN,</div><div class='del'>-			    ISL6271A_VOLTAGE_STEP);</div><div class='del'>-	*selector = data;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pmic-&gt;mtx);</div><div class='ctx'> </div><div class='del'>-	err = i2c_smbus_write_byte(pmic-&gt;client, data);</div><div class='add'>+	err = i2c_smbus_write_byte(pmic-&gt;client, selector);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		dev_err(&amp;pmic-&gt;client-&gt;dev, "Error setting voltage\n");</div><div class='ctx'> </div><div class='hunk'>@@ -84,15 +66,11 @@ static int isl6271a_set_voltage(struct regulator_dev *dev,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int isl6271a_list_voltage(struct regulator_dev *dev, unsigned selector)</div><div class='del'>-{</div><div class='del'>-	return ISL6271A_VOLTAGE_MIN + (ISL6271A_VOLTAGE_STEP * selector);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct regulator_ops isl_core_ops = {</div><div class='del'>-	.get_voltage	= isl6271a_get_voltage,</div><div class='del'>-	.set_voltage	= isl6271a_set_voltage,</div><div class='del'>-	.list_voltage	= isl6271a_list_voltage,</div><div class='add'>+	.get_voltage_sel = isl6271a_get_voltage_sel,</div><div class='add'>+	.set_voltage_sel = isl6271a_set_voltage_sel,</div><div class='add'>+	.list_voltage	= regulator_list_voltage_linear,</div><div class='add'>+	.map_voltage	= regulator_map_voltage_linear,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int isl6271a_get_fixed_voltage(struct regulator_dev *dev)</div><div class='hunk'>@@ -112,7 +90,7 @@ static struct regulator_ops isl_fixed_ops = {</div><div class='ctx'> 	.list_voltage	= isl6271a_list_fixed_voltage,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc isl_rd[] = {</div><div class='add'>+static const struct regulator_desc isl_rd[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name		= "Core Buck",</div><div class='ctx'> 		.id		= 0,</div><div class='hunk'>@@ -120,6 +98,8 @@ static struct regulator_desc isl_rd[] = {</div><div class='ctx'> 		.ops		= &amp;isl_core_ops,</div><div class='ctx'> 		.type		= REGULATOR_VOLTAGE,</div><div class='ctx'> 		.owner		= THIS_MODULE,</div><div class='add'>+		.min_uV		= ISL6271A_VOLTAGE_MIN,</div><div class='add'>+		.uV_step	= ISL6271A_VOLTAGE_STEP,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.name		= "LDO1",</div><div class='ctx'> 		.id		= 1,</div><div class='hunk'>@@ -140,6 +120,7 @@ static struct regulator_desc isl_rd[] = {</div><div class='ctx'> static int __devinit isl6271a_probe(struct i2c_client *i2c,</div><div class='ctx'> 				     const struct i2c_device_id *id)</div><div class='ctx'> {</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct regulator_init_data *init_data	= i2c-&gt;dev.platform_data;</div><div class='ctx'> 	struct isl_pmic *pmic;</div><div class='ctx'> 	int err, i;</div><div class='hunk'>@@ -147,12 +128,7 @@ static int __devinit isl6271a_probe(struct i2c_client *i2c,</div><div class='ctx'> 	if (!i2c_check_functionality(i2c-&gt;adapter, I2C_FUNC_SMBUS_BYTE_DATA))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	if (!init_data) {</div><div class='del'>-		dev_err(&amp;i2c-&gt;dev, "no platform data supplied\n");</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pmic = kzalloc(sizeof(struct isl_pmic), GFP_KERNEL);</div><div class='add'>+	pmic = devm_kzalloc(&amp;i2c-&gt;dev, sizeof(struct isl_pmic), GFP_KERNEL);</div><div class='ctx'> 	if (!pmic)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -161,8 +137,14 @@ static int __devinit isl6271a_probe(struct i2c_client *i2c,</div><div class='ctx'> 	mutex_init(&amp;pmic-&gt;mtx);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 3; i++) {</div><div class='del'>-		pmic-&gt;rdev[i] = regulator_register(&amp;isl_rd[i], &amp;i2c-&gt;dev,</div><div class='del'>-						init_data, pmic, NULL);</div><div class='add'>+		config.dev = &amp;i2c-&gt;dev;</div><div class='add'>+		if (i == 0)</div><div class='add'>+			config.init_data = init_data;</div><div class='add'>+		else</div><div class='add'>+			config.init_data = 0;</div><div class='add'>+		config.driver_data = pmic;</div><div class='add'>+</div><div class='add'>+		pmic-&gt;rdev[i] = regulator_register(&amp;isl_rd[i], &amp;config);</div><div class='ctx'> 		if (IS_ERR(pmic-&gt;rdev[i])) {</div><div class='ctx'> 			dev_err(&amp;i2c-&gt;dev, "failed to register %s\n", id-&gt;name);</div><div class='ctx'> 			err = PTR_ERR(pmic-&gt;rdev[i]);</div><div class='hunk'>@@ -177,8 +159,6 @@ static int __devinit isl6271a_probe(struct i2c_client *i2c,</div><div class='ctx'> error:</div><div class='ctx'> 	while (--i &gt;= 0)</div><div class='ctx'> 		regulator_unregister(pmic-&gt;rdev[i]);</div><div class='del'>-</div><div class='del'>-	kfree(pmic);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -189,9 +169,6 @@ static int __devexit isl6271a_remove(struct i2c_client *i2c)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 3; i++)</div><div class='ctx'> 		regulator_unregister(pmic-&gt;rdev[i]);</div><div class='del'>-</div><div class='del'>-	kfree(pmic);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/lp3971.c b/drivers/regulator/lp3971.c<br/>index 0cfabd318a59..981bea9cb9d7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/lp3971.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/lp3971.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/lp3971.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/lp3971.c</a></div><div class='hunk'>@@ -124,6 +124,10 @@ static const int *ldo_voltage_map[] = {</div><div class='ctx'> static int lp3971_ldo_list_voltage(struct regulator_dev *dev, unsigned index)</div><div class='ctx'> {</div><div class='ctx'> 	int ldo = rdev_get_id(dev) - LP3971_LDO1;</div><div class='add'>+</div><div class='add'>+	if (index &gt; LDO_VOL_MAX_IDX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	return 1000 * LDO_VOL_VALUE_MAP(ldo)[index];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -168,32 +172,15 @@ static int lp3971_ldo_get_voltage(struct regulator_dev *dev)</div><div class='ctx'> 	return 1000 * LDO_VOL_VALUE_MAP(ldo)[val];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lp3971_ldo_set_voltage(struct regulator_dev *dev,</div><div class='del'>-				  int min_uV, int max_uV,</div><div class='del'>-				  unsigned int *selector)</div><div class='add'>+static int lp3971_ldo_set_voltage_sel(struct regulator_dev *dev,</div><div class='add'>+				      unsigned int selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct lp3971 *lp3971 = rdev_get_drvdata(dev);</div><div class='ctx'> 	int ldo = rdev_get_id(dev) - LP3971_LDO1;</div><div class='del'>-	int min_vol = min_uV / 1000, max_vol = max_uV / 1000;</div><div class='del'>-	const int *vol_map = LDO_VOL_VALUE_MAP(ldo);</div><div class='del'>-	u16 val;</div><div class='del'>-</div><div class='del'>-	if (min_vol &lt; vol_map[LDO_VOL_MIN_IDX] ||</div><div class='del'>-	    min_vol &gt; vol_map[LDO_VOL_MAX_IDX])</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	for (val = LDO_VOL_MIN_IDX; val &lt;= LDO_VOL_MAX_IDX; val++)</div><div class='del'>-		if (vol_map[val] &gt;= min_vol)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-	if (val &gt; LDO_VOL_MAX_IDX || vol_map[val] &gt; max_vol)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	*selector = val;</div><div class='ctx'> </div><div class='ctx'> 	return lp3971_set_bits(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo),</div><div class='ctx'> 			LDO_VOL_CONTR_MASK &lt;&lt; LDO_VOL_CONTR_SHIFT(ldo),</div><div class='del'>-			val &lt;&lt; LDO_VOL_CONTR_SHIFT(ldo));</div><div class='add'>+			selector &lt;&lt; LDO_VOL_CONTR_SHIFT(ldo));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops lp3971_ldo_ops = {</div><div class='hunk'>@@ -202,11 +189,14 @@ static struct regulator_ops lp3971_ldo_ops = {</div><div class='ctx'> 	.enable = lp3971_ldo_enable,</div><div class='ctx'> 	.disable = lp3971_ldo_disable,</div><div class='ctx'> 	.get_voltage = lp3971_ldo_get_voltage,</div><div class='del'>-	.set_voltage = lp3971_ldo_set_voltage,</div><div class='add'>+	.set_voltage_sel = lp3971_ldo_set_voltage_sel,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int lp3971_dcdc_list_voltage(struct regulator_dev *dev, unsigned index)</div><div class='ctx'> {</div><div class='add'>+	if (index &lt; BUCK_TARGET_VOL_MIN_IDX || index &gt; BUCK_TARGET_VOL_MAX_IDX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	return 1000 * buck_voltage_map[index];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -259,33 +249,15 @@ static int lp3971_dcdc_get_voltage(struct regulator_dev *dev)</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lp3971_dcdc_set_voltage(struct regulator_dev *dev,</div><div class='del'>-				   int min_uV, int max_uV,</div><div class='del'>-				   unsigned int *selector)</div><div class='add'>+static int lp3971_dcdc_set_voltage_sel(struct regulator_dev *dev,</div><div class='add'>+				       unsigned int selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct lp3971 *lp3971 = rdev_get_drvdata(dev);</div><div class='ctx'> 	int buck = rdev_get_id(dev) - LP3971_DCDC1;</div><div class='del'>-	int min_vol = min_uV / 1000, max_vol = max_uV / 1000;</div><div class='del'>-	const int *vol_map = buck_voltage_map;</div><div class='del'>-	u16 val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (min_vol &lt; vol_map[BUCK_TARGET_VOL_MIN_IDX] ||</div><div class='del'>-	    min_vol &gt; vol_map[BUCK_TARGET_VOL_MAX_IDX])</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	for (val = BUCK_TARGET_VOL_MIN_IDX; val &lt;= BUCK_TARGET_VOL_MAX_IDX;</div><div class='del'>-	     val++)</div><div class='del'>-		if (vol_map[val] &gt;= min_vol)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-	if (val &gt; BUCK_TARGET_VOL_MAX_IDX || vol_map[val] &gt; max_vol)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	*selector = val;</div><div class='del'>-</div><div class='ctx'> 	ret = lp3971_set_bits(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck),</div><div class='del'>-	       BUCK_TARGET_VOL_MASK, val);</div><div class='add'>+	       BUCK_TARGET_VOL_MASK, selector);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -306,10 +278,10 @@ static struct regulator_ops lp3971_dcdc_ops = {</div><div class='ctx'> 	.enable = lp3971_dcdc_enable,</div><div class='ctx'> 	.disable = lp3971_dcdc_disable,</div><div class='ctx'> 	.get_voltage = lp3971_dcdc_get_voltage,</div><div class='del'>-	.set_voltage = lp3971_dcdc_set_voltage,</div><div class='add'>+	.set_voltage_sel = lp3971_dcdc_set_voltage_sel,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc regulators[] = {</div><div class='add'>+static const struct regulator_desc regulators[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "LDO1",</div><div class='ctx'> 		.id = LP3971_LDO1,</div><div class='hunk'>@@ -449,10 +421,15 @@ static int __devinit setup_regulators(struct lp3971 *lp3971,</div><div class='ctx'> </div><div class='ctx'> 	/* Instantiate the regulators */</div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;num_regulators; i++) {</div><div class='add'>+		struct regulator_config config = { };</div><div class='ctx'> 		struct lp3971_regulator_subdev *reg = &amp;pdata-&gt;regulators[i];</div><div class='del'>-		lp3971-&gt;rdev[i] = regulator_register(&amp;regulators[reg-&gt;id],</div><div class='del'>-				lp3971-&gt;dev, reg-&gt;initdata, lp3971, NULL);</div><div class='ctx'> </div><div class='add'>+		config.dev = lp3971-&gt;dev;</div><div class='add'>+		config.init_data = reg-&gt;initdata;</div><div class='add'>+		config.driver_data = lp3971;</div><div class='add'>+</div><div class='add'>+		lp3971-&gt;rdev[i] = regulator_register(&amp;regulators[reg-&gt;id],</div><div class='add'>+						     &amp;config);</div><div class='ctx'> 		if (IS_ERR(lp3971-&gt;rdev[i])) {</div><div class='ctx'> 			err = PTR_ERR(lp3971-&gt;rdev[i]);</div><div class='ctx'> 			dev_err(lp3971-&gt;dev, "regulator init failed: %d\n",</div><div class='hunk'>@@ -545,23 +522,7 @@ static struct i2c_driver lp3971_i2c_driver = {</div><div class='ctx'> 	.id_table = lp3971_i2c_id,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init lp3971_module_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = i2c_add_driver(&amp;lp3971_i2c_driver);</div><div class='del'>-	if (ret != 0)</div><div class='del'>-		pr_err("Failed to register I2C driver: %d\n", ret);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-module_init(lp3971_module_init);</div><div class='del'>-</div><div class='del'>-static void __exit lp3971_module_exit(void)</div><div class='del'>-{</div><div class='del'>-	i2c_del_driver(&amp;lp3971_i2c_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(lp3971_module_exit);</div><div class='add'>+module_i2c_driver(lp3971_i2c_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;");</div><div class='head'>diff --git a/drivers/regulator/lp3972.c b/drivers/regulator/lp3972.c<br/>index 49a15eefe5fe..de073df7d344 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/lp3972.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/lp3972.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/lp3972.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/lp3972.c</a></div><div class='hunk'>@@ -245,6 +245,11 @@ static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val)</div><div class='ctx'> static int lp3972_ldo_list_voltage(struct regulator_dev *dev, unsigned index)</div><div class='ctx'> {</div><div class='ctx'> 	int ldo = rdev_get_id(dev) - LP3972_LDO1;</div><div class='add'>+</div><div class='add'>+	if (index &lt; LP3972_LDO_VOL_MIN_IDX(ldo) ||</div><div class='add'>+	    index &gt; LP3972_LDO_VOL_MAX_IDX(ldo))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	return 1000 * LP3972_LDO_VOL_VALUE_MAP(ldo)[index];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -292,34 +297,16 @@ static int lp3972_ldo_get_voltage(struct regulator_dev *dev)</div><div class='ctx'> 	return 1000 * LP3972_LDO_VOL_VALUE_MAP(ldo)[val];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lp3972_ldo_set_voltage(struct regulator_dev *dev,</div><div class='del'>-				  int min_uV, int max_uV,</div><div class='del'>-				  unsigned int *selector)</div><div class='add'>+static int lp3972_ldo_set_voltage_sel(struct regulator_dev *dev,</div><div class='add'>+				      unsigned int selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct lp3972 *lp3972 = rdev_get_drvdata(dev);</div><div class='ctx'> 	int ldo = rdev_get_id(dev) - LP3972_LDO1;</div><div class='del'>-	int min_vol = min_uV / 1000, max_vol = max_uV / 1000;</div><div class='del'>-	const int *vol_map = LP3972_LDO_VOL_VALUE_MAP(ldo);</div><div class='del'>-	u16 val;</div><div class='ctx'> 	int shift, ret;</div><div class='ctx'> </div><div class='del'>-	if (min_vol &lt; vol_map[LP3972_LDO_VOL_MIN_IDX(ldo)] ||</div><div class='del'>-	    min_vol &gt; vol_map[LP3972_LDO_VOL_MAX_IDX(ldo)])</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	for (val = LP3972_LDO_VOL_MIN_IDX(ldo);</div><div class='del'>-		val &lt;= LP3972_LDO_VOL_MAX_IDX(ldo); val++)</div><div class='del'>-		if (vol_map[val] &gt;= min_vol)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-	if (val &gt; LP3972_LDO_VOL_MAX_IDX(ldo) || vol_map[val] &gt; max_vol)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	*selector = val;</div><div class='del'>-</div><div class='ctx'> 	shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);</div><div class='ctx'> 	ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo),</div><div class='del'>-		LP3972_LDO_VOL_MASK(ldo) &lt;&lt; shift, val &lt;&lt; shift);</div><div class='add'>+		LP3972_LDO_VOL_MASK(ldo) &lt;&lt; shift, selector &lt;&lt; shift);</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -355,12 +342,17 @@ static struct regulator_ops lp3972_ldo_ops = {</div><div class='ctx'> 	.enable = lp3972_ldo_enable,</div><div class='ctx'> 	.disable = lp3972_ldo_disable,</div><div class='ctx'> 	.get_voltage = lp3972_ldo_get_voltage,</div><div class='del'>-	.set_voltage = lp3972_ldo_set_voltage,</div><div class='add'>+	.set_voltage_sel = lp3972_ldo_set_voltage_sel,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int lp3972_dcdc_list_voltage(struct regulator_dev *dev, unsigned index)</div><div class='ctx'> {</div><div class='ctx'> 	int buck = rdev_get_id(dev) - LP3972_DCDC1;</div><div class='add'>+</div><div class='add'>+	if (index &lt; LP3972_BUCK_VOL_MIN_IDX(buck) ||</div><div class='add'>+	    index &gt; LP3972_BUCK_VOL_MAX_IDX(buck))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	return 1000 * buck_voltage_map[buck][index];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -419,34 +411,15 @@ static int lp3972_dcdc_get_voltage(struct regulator_dev *dev)</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lp3972_dcdc_set_voltage(struct regulator_dev *dev,</div><div class='del'>-				   int min_uV, int max_uV,</div><div class='del'>-				   unsigned int *selector)</div><div class='add'>+static int lp3972_dcdc_set_voltage_sel(struct regulator_dev *dev,</div><div class='add'>+				       unsigned int selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct lp3972 *lp3972 = rdev_get_drvdata(dev);</div><div class='ctx'> 	int buck = rdev_get_id(dev) - LP3972_DCDC1;</div><div class='del'>-	int min_vol = min_uV / 1000, max_vol = max_uV / 1000;</div><div class='del'>-	const int *vol_map = buck_voltage_map[buck];</div><div class='del'>-	u16 val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (min_vol &lt; vol_map[LP3972_BUCK_VOL_MIN_IDX(buck)] ||</div><div class='del'>-	    min_vol &gt; vol_map[LP3972_BUCK_VOL_MAX_IDX(buck)])</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	for (val = LP3972_BUCK_VOL_MIN_IDX(buck);</div><div class='del'>-		val &lt;= LP3972_BUCK_VOL_MAX_IDX(buck); val++)</div><div class='del'>-		if (vol_map[val] &gt;= min_vol)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-	if (val &gt; LP3972_BUCK_VOL_MAX_IDX(buck) ||</div><div class='del'>-	    vol_map[val] &gt; max_vol)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	*selector = val;</div><div class='del'>-</div><div class='ctx'> 	ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck),</div><div class='del'>-				LP3972_BUCK_VOL_MASK, val);</div><div class='add'>+				LP3972_BUCK_VOL_MASK, selector);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -468,10 +441,10 @@ static struct regulator_ops lp3972_dcdc_ops = {</div><div class='ctx'> 	.enable = lp3972_dcdc_enable,</div><div class='ctx'> 	.disable = lp3972_dcdc_disable,</div><div class='ctx'> 	.get_voltage = lp3972_dcdc_get_voltage,</div><div class='del'>-	.set_voltage = lp3972_dcdc_set_voltage,</div><div class='add'>+	.set_voltage_sel = lp3972_dcdc_set_voltage_sel,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc regulators[] = {</div><div class='add'>+static const struct regulator_desc regulators[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "LDO1",</div><div class='ctx'> 		.id = LP3972_LDO1,</div><div class='hunk'>@@ -554,9 +527,14 @@ static int __devinit setup_regulators(struct lp3972 *lp3972,</div><div class='ctx'> 	/* Instantiate the regulators */</div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;num_regulators; i++) {</div><div class='ctx'> 		struct lp3972_regulator_subdev *reg = &amp;pdata-&gt;regulators[i];</div><div class='del'>-		lp3972-&gt;rdev[i] = regulator_register(&amp;regulators[reg-&gt;id],</div><div class='del'>-				lp3972-&gt;dev, reg-&gt;initdata, lp3972, NULL);</div><div class='add'>+		struct regulator_config config = { };</div><div class='ctx'> </div><div class='add'>+		config.dev = lp3972-&gt;dev;</div><div class='add'>+		config.init_data = reg-&gt;initdata;</div><div class='add'>+		config.driver_data = lp3972;</div><div class='add'>+</div><div class='add'>+		lp3972-&gt;rdev[i] = regulator_register(&amp;regulators[reg-&gt;id],</div><div class='add'>+						     &amp;config);</div><div class='ctx'> 		if (IS_ERR(lp3972-&gt;rdev[i])) {</div><div class='ctx'> 			err = PTR_ERR(lp3972-&gt;rdev[i]);</div><div class='ctx'> 			dev_err(lp3972-&gt;dev, "regulator init failed: %d\n",</div><div class='head'>diff --git a/drivers/regulator/max1586.c b/drivers/regulator/max1586.c<br/>index 282d2ee0604e..b9444ee08da9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/max1586.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/max1586.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/max1586.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max1586.c</a></div><div class='hunk'>@@ -161,7 +161,7 @@ static struct regulator_ops max1586_v6_ops = {</div><div class='ctx'> 	.list_voltage = max1586_v6_list,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc max1586_reg[] = {</div><div class='add'>+static const struct regulator_desc max1586_reg[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "Output_V3",</div><div class='ctx'> 		.id = MAX1586_V3,</div><div class='hunk'>@@ -185,21 +185,21 @@ static int __devinit max1586_pmic_probe(struct i2c_client *client,</div><div class='ctx'> {</div><div class='ctx'> 	struct regulator_dev **rdev;</div><div class='ctx'> 	struct max1586_platform_data *pdata = client-&gt;dev.platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct max1586_data *max1586;</div><div class='ctx'> 	int i, id, ret = -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	max1586 = kzalloc(sizeof(struct max1586_data) +</div><div class='add'>+	max1586 = devm_kzalloc(&amp;client-&gt;dev, sizeof(struct max1586_data) +</div><div class='ctx'> 			sizeof(struct regulator_dev *) * (MAX1586_V6 + 1),</div><div class='ctx'> 			GFP_KERNEL);</div><div class='ctx'> 	if (!max1586)</div><div class='del'>-		goto out;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	max1586-&gt;client = client;</div><div class='ctx'> </div><div class='del'>-	if (!pdata-&gt;v3_gain) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out_unmap;</div><div class='del'>-	}</div><div class='add'>+	if (!pdata-&gt;v3_gain)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	max1586-&gt;min_uV = MAX1586_V3_MIN_UV / 1000 * pdata-&gt;v3_gain / 1000;</div><div class='ctx'> 	max1586-&gt;max_uV = MAX1586_V3_MAX_UV / 1000 * pdata-&gt;v3_gain / 1000;</div><div class='ctx'> </div><div class='hunk'>@@ -212,9 +212,12 @@ static int __devinit max1586_pmic_probe(struct i2c_client *client,</div><div class='ctx'> 			dev_err(&amp;client-&gt;dev, "invalid regulator id %d\n", id);</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='del'>-		rdev[i] = regulator_register(&amp;max1586_reg[id], &amp;client-&gt;dev,</div><div class='del'>-					     pdata-&gt;subdevs[i].platform_data,</div><div class='del'>-					     max1586, NULL);</div><div class='add'>+</div><div class='add'>+		config.dev = &amp;client-&gt;dev;</div><div class='add'>+		config.init_data = pdata-&gt;subdevs[i].platform_data;</div><div class='add'>+		config.driver_data = max1586;</div><div class='add'>+</div><div class='add'>+		rdev[i] = regulator_register(&amp;max1586_reg[id], &amp;config);</div><div class='ctx'> 		if (IS_ERR(rdev[i])) {</div><div class='ctx'> 			ret = PTR_ERR(rdev[i]);</div><div class='ctx'> 			dev_err(&amp;client-&gt;dev, "failed to register %s\n",</div><div class='hunk'>@@ -230,9 +233,6 @@ static int __devinit max1586_pmic_probe(struct i2c_client *client,</div><div class='ctx'> err:</div><div class='ctx'> 	while (--i &gt;= 0)</div><div class='ctx'> 		regulator_unregister(rdev[i]);</div><div class='del'>-out_unmap:</div><div class='del'>-	kfree(max1586);</div><div class='del'>-out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -244,8 +244,6 @@ static int __devexit max1586_pmic_remove(struct i2c_client *client)</div><div class='ctx'> 	for (i = 0; i &lt;= MAX1586_V6; i++)</div><div class='ctx'> 		if (max1586-&gt;rdev[i])</div><div class='ctx'> 			regulator_unregister(max1586-&gt;rdev[i]);</div><div class='del'>-	kfree(max1586);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/max8649.c b/drivers/regulator/max8649.c<br/>index 824c650436ed..1f4bb80457b3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/max8649.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/max8649.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/max8649.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max8649.c</a></div><div class='hunk'>@@ -53,7 +53,6 @@ struct max8649_regulator_info {</div><div class='ctx'> 	struct device		*dev;</div><div class='ctx'> 	struct regmap		*regmap;</div><div class='ctx'> </div><div class='del'>-	int		vol_reg;</div><div class='ctx'> 	unsigned	mode:2;	/* bit[1:0] = VID1, VID0 */</div><div class='ctx'> 	unsigned	extclk_freq:2;</div><div class='ctx'> 	unsigned	extclk:1;</div><div class='hunk'>@@ -61,53 +60,6 @@ struct max8649_regulator_info {</div><div class='ctx'> 	unsigned	ramp_down:1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* I2C operations */</div><div class='del'>-</div><div class='del'>-static inline int check_range(int min_uV, int max_uV)</div><div class='del'>-{</div><div class='del'>-	if ((min_uV &lt; MAX8649_DCDC_VMIN) || (max_uV &gt; MAX8649_DCDC_VMAX)</div><div class='del'>-		|| (min_uV &gt; max_uV))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int max8649_list_voltage(struct regulator_dev *rdev, unsigned index)</div><div class='del'>-{</div><div class='del'>-	return (MAX8649_DCDC_VMIN + index * MAX8649_DCDC_STEP);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int max8649_get_voltage(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct max8649_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	unsigned int val;</div><div class='del'>-	unsigned char data;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = regmap_read(info-&gt;regmap, info-&gt;vol_reg, &amp;val);</div><div class='del'>-	if (ret != 0)</div><div class='del'>-		return ret;</div><div class='del'>-	data = (unsigned char)val &amp; MAX8649_VOL_MASK;</div><div class='del'>-	return max8649_list_voltage(rdev, data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int max8649_set_voltage(struct regulator_dev *rdev,</div><div class='del'>-			       int min_uV, int max_uV, unsigned *selector)</div><div class='del'>-{</div><div class='del'>-	struct max8649_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	unsigned char data, mask;</div><div class='del'>-</div><div class='del'>-	if (check_range(min_uV, max_uV)) {</div><div class='del'>-		dev_err(info-&gt;dev, "invalid voltage range (%d, %d) uV\n",</div><div class='del'>-			min_uV, max_uV);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	data = DIV_ROUND_UP(min_uV - MAX8649_DCDC_VMIN, MAX8649_DCDC_STEP);</div><div class='del'>-	mask = MAX8649_VOL_MASK;</div><div class='del'>-	*selector = data &amp; mask;</div><div class='del'>-</div><div class='del'>-	return regmap_update_bits(info-&gt;regmap, info-&gt;vol_reg, mask, data);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* EN_PD means pulldown on EN input */</div><div class='ctx'> static int max8649_enable(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -145,11 +97,11 @@ static int max8649_enable_time(struct regulator_dev *rdev)</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='ctx'> 	/* get voltage */</div><div class='del'>-	ret = regmap_read(info-&gt;regmap, info-&gt;vol_reg, &amp;val);</div><div class='add'>+	ret = regmap_read(info-&gt;regmap, rdev-&gt;desc-&gt;vsel_reg, &amp;val);</div><div class='ctx'> 	if (ret != 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	val &amp;= MAX8649_VOL_MASK;</div><div class='del'>-	voltage = max8649_list_voltage(rdev, (unsigned char)val); /* uV */</div><div class='add'>+	voltage = regulator_list_voltage_linear(rdev, (unsigned char)val);</div><div class='ctx'> </div><div class='ctx'> 	/* get rate */</div><div class='ctx'> 	ret = regmap_read(info-&gt;regmap, MAX8649_RAMP, &amp;val);</div><div class='hunk'>@@ -167,11 +119,11 @@ static int max8649_set_mode(struct regulator_dev *rdev, unsigned int mode)</div><div class='ctx'> </div><div class='ctx'> 	switch (mode) {</div><div class='ctx'> 	case REGULATOR_MODE_FAST:</div><div class='del'>-		regmap_update_bits(info-&gt;regmap, info-&gt;vol_reg, MAX8649_FORCE_PWM,</div><div class='del'>-				   MAX8649_FORCE_PWM);</div><div class='add'>+		regmap_update_bits(info-&gt;regmap, rdev-&gt;desc-&gt;vsel_reg,</div><div class='add'>+				   MAX8649_FORCE_PWM, MAX8649_FORCE_PWM);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case REGULATOR_MODE_NORMAL:</div><div class='del'>-		regmap_update_bits(info-&gt;regmap, info-&gt;vol_reg,</div><div class='add'>+		regmap_update_bits(info-&gt;regmap, rdev-&gt;desc-&gt;vsel_reg,</div><div class='ctx'> 				   MAX8649_FORCE_PWM, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -186,7 +138,7 @@ static unsigned int max8649_get_mode(struct regulator_dev *rdev)</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = regmap_read(info-&gt;regmap, info-&gt;vol_reg, &amp;val);</div><div class='add'>+	ret = regmap_read(info-&gt;regmap, rdev-&gt;desc-&gt;vsel_reg, &amp;val);</div><div class='ctx'> 	if (ret != 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	if (val &amp; MAX8649_FORCE_PWM)</div><div class='hunk'>@@ -195,9 +147,10 @@ static unsigned int max8649_get_mode(struct regulator_dev *rdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops max8649_dcdc_ops = {</div><div class='del'>-	.set_voltage	= max8649_set_voltage,</div><div class='del'>-	.get_voltage	= max8649_get_voltage,</div><div class='del'>-	.list_voltage	= max8649_list_voltage,</div><div class='add'>+	.set_voltage_sel = regulator_set_voltage_sel_regmap,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='add'>+	.list_voltage	= regulator_list_voltage_linear,</div><div class='add'>+	.map_voltage	= regulator_map_voltage_linear,</div><div class='ctx'> 	.enable		= max8649_enable,</div><div class='ctx'> 	.disable	= max8649_disable,</div><div class='ctx'> 	.is_enabled	= max8649_is_enabled,</div><div class='hunk'>@@ -213,6 +166,9 @@ static struct regulator_desc dcdc_desc = {</div><div class='ctx'> 	.type		= REGULATOR_VOLTAGE,</div><div class='ctx'> 	.n_voltages	= 1 &lt;&lt; 6,</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='add'>+	.vsel_mask	= MAX8649_VOL_MASK,</div><div class='add'>+	.min_uV		= MAX8649_DCDC_VMIN,</div><div class='add'>+	.uV_step	= MAX8649_DCDC_STEP,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regmap_config max8649_regmap_config = {</div><div class='hunk'>@@ -225,21 +181,23 @@ static int __devinit max8649_regulator_probe(struct i2c_client *client,</div><div class='ctx'> {</div><div class='ctx'> 	struct max8649_platform_data *pdata = client-&gt;dev.platform_data;</div><div class='ctx'> 	struct max8649_regulator_info *info = NULL;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> 	unsigned char data;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	info = kzalloc(sizeof(struct max8649_regulator_info), GFP_KERNEL);</div><div class='add'>+	info = devm_kzalloc(&amp;client-&gt;dev, sizeof(struct max8649_regulator_info),</div><div class='add'>+			    GFP_KERNEL);</div><div class='ctx'> 	if (!info) {</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "No enough memory\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	info-&gt;regmap = regmap_init_i2c(client, &amp;max8649_regmap_config);</div><div class='add'>+	info-&gt;regmap = devm_regmap_init_i2c(client, &amp;max8649_regmap_config);</div><div class='ctx'> 	if (IS_ERR(info-&gt;regmap)) {</div><div class='ctx'> 		ret = PTR_ERR(info-&gt;regmap);</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "Failed to allocate register map: %d\n", ret);</div><div class='del'>-		goto fail;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;dev = &amp;client-&gt;dev;</div><div class='hunk'>@@ -248,16 +206,16 @@ static int __devinit max8649_regulator_probe(struct i2c_client *client,</div><div class='ctx'> 	info-&gt;mode = pdata-&gt;mode;</div><div class='ctx'> 	switch (info-&gt;mode) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		info-&gt;vol_reg = MAX8649_MODE0;</div><div class='add'>+		dcdc_desc.vsel_reg = MAX8649_MODE0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='del'>-		info-&gt;vol_reg = MAX8649_MODE1;</div><div class='add'>+		dcdc_desc.vsel_reg = MAX8649_MODE1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='del'>-		info-&gt;vol_reg = MAX8649_MODE2;</div><div class='add'>+		dcdc_desc.vsel_reg = MAX8649_MODE2;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='del'>-		info-&gt;vol_reg = MAX8649_MODE3;</div><div class='add'>+		dcdc_desc.vsel_reg = MAX8649_MODE3;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -267,7 +225,7 @@ static int __devinit max8649_regulator_probe(struct i2c_client *client,</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		dev_err(info-&gt;dev, "Failed to detect ID of MAX8649:%d\n",</div><div class='ctx'> 			ret);</div><div class='del'>-		goto out;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	dev_info(info-&gt;dev, "Detected MAX8649 (ID:%x)\n", val);</div><div class='ctx'> </div><div class='hunk'>@@ -277,7 +235,8 @@ static int __devinit max8649_regulator_probe(struct i2c_client *client,</div><div class='ctx'> 	/* enable/disable external clock synchronization */</div><div class='ctx'> 	info-&gt;extclk = pdata-&gt;extclk;</div><div class='ctx'> 	data = (info-&gt;extclk) ? MAX8649_SYNC_EXTCLK : 0;</div><div class='del'>-	regmap_update_bits(info-&gt;regmap, info-&gt;vol_reg, MAX8649_SYNC_EXTCLK, data);</div><div class='add'>+	regmap_update_bits(info-&gt;regmap, dcdc_desc.vsel_reg,</div><div class='add'>+			   MAX8649_SYNC_EXTCLK, data);</div><div class='ctx'> 	if (info-&gt;extclk) {</div><div class='ctx'> 		/* set external clock frequency */</div><div class='ctx'> 		info-&gt;extclk_freq = pdata-&gt;extclk_freq;</div><div class='hunk'>@@ -297,22 +256,18 @@ static int __devinit max8649_regulator_probe(struct i2c_client *client,</div><div class='ctx'> 				   MAX8649_RAMP_DOWN);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	info-&gt;regulator = regulator_register(&amp;dcdc_desc, &amp;client-&gt;dev,</div><div class='del'>-					     pdata-&gt;regulator, info, NULL);</div><div class='add'>+	config.dev = &amp;client-&gt;dev;</div><div class='add'>+	config.init_data = pdata-&gt;regulator;</div><div class='add'>+	config.driver_data = info;</div><div class='add'>+</div><div class='add'>+	info-&gt;regulator = regulator_register(&amp;dcdc_desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(info-&gt;regulator)) {</div><div class='ctx'> 		dev_err(info-&gt;dev, "failed to register regulator %s\n",</div><div class='ctx'> 			dcdc_desc.name);</div><div class='del'>-		ret = PTR_ERR(info-&gt;regulator);</div><div class='del'>-		goto out;</div><div class='add'>+		return PTR_ERR(info-&gt;regulator);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_info(info-&gt;dev, "Max8649 regulator device is detected.\n");</div><div class='ctx'> 	return 0;</div><div class='del'>-out:</div><div class='del'>-	regmap_exit(info-&gt;regmap);</div><div class='del'>-fail:</div><div class='del'>-	kfree(info);</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit max8649_regulator_remove(struct i2c_client *client)</div><div class='hunk'>@@ -322,8 +277,6 @@ static int __devexit max8649_regulator_remove(struct i2c_client *client)</div><div class='ctx'> 	if (info) {</div><div class='ctx'> 		if (info-&gt;regulator)</div><div class='ctx'> 			regulator_unregister(info-&gt;regulator);</div><div class='del'>-		regmap_exit(info-&gt;regmap);</div><div class='del'>-		kfree(info);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -360,4 +313,3 @@ module_exit(max8649_exit);</div><div class='ctx'> MODULE_DESCRIPTION("MAXIM 8649 voltage regulator driver");</div><div class='ctx'> MODULE_AUTHOR("Haojian Zhuang &lt;haojian.zhuang@marvell.com&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='head'>diff --git a/drivers/regulator/max8660.c b/drivers/regulator/max8660.c<br/>index 4c5b05311f47..8d531742f593 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/max8660.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/max8660.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/max8660.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max8660.c</a></div><div class='hunk'>@@ -126,42 +126,22 @@ static int max8660_dcdc_disable(struct regulator_dev *rdev)</div><div class='ctx'> 	return max8660_write(max8660, MAX8660_OVER1, mask, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max8660_dcdc_list(struct regulator_dev *rdev, unsigned selector)</div><div class='del'>-{</div><div class='del'>-	if (selector &gt; MAX8660_DCDC_MAX_SEL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return MAX8660_DCDC_MIN_UV + selector * MAX8660_DCDC_STEP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int max8660_dcdc_get(struct regulator_dev *rdev)</div><div class='add'>+static int max8660_dcdc_get_voltage_sel(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8660 *max8660 = rdev_get_drvdata(rdev);</div><div class='add'>+</div><div class='ctx'> 	u8 reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2;</div><div class='ctx'> 	u8 selector = max8660-&gt;shadow_regs[reg];</div><div class='del'>-	return MAX8660_DCDC_MIN_UV + selector * MAX8660_DCDC_STEP;</div><div class='add'>+	return selector;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max8660_dcdc_set(struct regulator_dev *rdev, int min_uV, int max_uV,</div><div class='del'>-			    unsigned int *s)</div><div class='add'>+static int max8660_dcdc_set_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+					unsigned int selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8660 *max8660 = rdev_get_drvdata(rdev);</div><div class='del'>-	u8 reg, selector, bits;</div><div class='add'>+	u8 reg, bits;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (min_uV &lt; MAX8660_DCDC_MIN_UV || min_uV &gt; MAX8660_DCDC_MAX_UV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (max_uV &lt; MAX8660_DCDC_MIN_UV || max_uV &gt; MAX8660_DCDC_MAX_UV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	selector = DIV_ROUND_UP(min_uV - MAX8660_DCDC_MIN_UV,</div><div class='del'>-				MAX8660_DCDC_STEP);</div><div class='del'>-</div><div class='del'>-	ret = max8660_dcdc_list(rdev, selector);</div><div class='del'>-	if (ret &lt; 0 || ret &gt; max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	*s = selector;</div><div class='del'>-</div><div class='ctx'> 	reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2;</div><div class='ctx'> 	ret = max8660_write(max8660, reg, 0, selector);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -174,9 +154,10 @@ static int max8660_dcdc_set(struct regulator_dev *rdev, int min_uV, int max_uV,</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops max8660_dcdc_ops = {</div><div class='ctx'> 	.is_enabled = max8660_dcdc_is_enabled,</div><div class='del'>-	.list_voltage = max8660_dcdc_list,</div><div class='del'>-	.set_voltage = max8660_dcdc_set,</div><div class='del'>-	.get_voltage = max8660_dcdc_get,</div><div class='add'>+	.list_voltage = regulator_list_voltage_linear,</div><div class='add'>+	.map_voltage = regulator_map_voltage_linear,</div><div class='add'>+	.set_voltage_sel = max8660_dcdc_set_voltage_sel,</div><div class='add'>+	.get_voltage_sel = max8660_dcdc_get_voltage_sel,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -184,42 +165,20 @@ static struct regulator_ops max8660_dcdc_ops = {</div><div class='ctx'>  * LDO5 functions</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static int max8660_ldo5_list(struct regulator_dev *rdev, unsigned selector)</div><div class='del'>-{</div><div class='del'>-	if (selector &gt; MAX8660_LDO5_MAX_SEL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return MAX8660_LDO5_MIN_UV + selector * MAX8660_LDO5_STEP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int max8660_ldo5_get(struct regulator_dev *rdev)</div><div class='add'>+static int max8660_ldo5_get_voltage_sel(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8660 *max8660 = rdev_get_drvdata(rdev);</div><div class='del'>-	u8 selector = max8660-&gt;shadow_regs[MAX8660_MDTV2];</div><div class='ctx'> </div><div class='del'>-	return MAX8660_LDO5_MIN_UV + selector * MAX8660_LDO5_STEP;</div><div class='add'>+	u8 selector = max8660-&gt;shadow_regs[MAX8660_MDTV2];</div><div class='add'>+	return selector;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max8660_ldo5_set(struct regulator_dev *rdev, int min_uV, int max_uV,</div><div class='del'>-			    unsigned int *s)</div><div class='add'>+static int max8660_ldo5_set_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+					unsigned int selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8660 *max8660 = rdev_get_drvdata(rdev);</div><div class='del'>-	u8 selector;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (min_uV &lt; MAX8660_LDO5_MIN_UV || min_uV &gt; MAX8660_LDO5_MAX_UV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (max_uV &lt; MAX8660_LDO5_MIN_UV || max_uV &gt; MAX8660_LDO5_MAX_UV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	selector = DIV_ROUND_UP(min_uV - MAX8660_LDO5_MIN_UV,</div><div class='del'>-				MAX8660_LDO5_STEP);</div><div class='del'>-</div><div class='del'>-	ret = max8660_ldo5_list(rdev, selector);</div><div class='del'>-	if (ret &lt; 0 || ret &gt; max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	*s = selector;</div><div class='del'>-</div><div class='ctx'> 	ret = max8660_write(max8660, MAX8660_MDTV2, 0, selector);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -229,9 +188,10 @@ static int max8660_ldo5_set(struct regulator_dev *rdev, int min_uV, int max_uV,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops max8660_ldo5_ops = {</div><div class='del'>-	.list_voltage = max8660_ldo5_list,</div><div class='del'>-	.set_voltage = max8660_ldo5_set,</div><div class='del'>-	.get_voltage = max8660_ldo5_get,</div><div class='add'>+	.list_voltage = regulator_list_voltage_linear,</div><div class='add'>+	.map_voltage = regulator_map_voltage_linear,</div><div class='add'>+	.set_voltage_sel = max8660_ldo5_set_voltage_sel,</div><div class='add'>+	.get_voltage_sel = max8660_ldo5_get_voltage_sel,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -261,59 +221,38 @@ static int max8660_ldo67_disable(struct regulator_dev *rdev)</div><div class='ctx'> 	return max8660_write(max8660, MAX8660_OVER2, mask, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max8660_ldo67_list(struct regulator_dev *rdev, unsigned selector)</div><div class='del'>-{</div><div class='del'>-	if (selector &gt; MAX8660_LDO67_MAX_SEL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return MAX8660_LDO67_MIN_UV + selector * MAX8660_LDO67_STEP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int max8660_ldo67_get(struct regulator_dev *rdev)</div><div class='add'>+static int max8660_ldo67_get_voltage_sel(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8660 *max8660 = rdev_get_drvdata(rdev);</div><div class='add'>+</div><div class='ctx'> 	u8 shift = (rdev_get_id(rdev) == MAX8660_V6) ? 0 : 4;</div><div class='ctx'> 	u8 selector = (max8660-&gt;shadow_regs[MAX8660_L12VCR] &gt;&gt; shift) &amp; 0xf;</div><div class='del'>-</div><div class='del'>-	return MAX8660_LDO67_MIN_UV + selector * MAX8660_LDO67_STEP;</div><div class='add'>+	return selector;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max8660_ldo67_set(struct regulator_dev *rdev, int min_uV,</div><div class='del'>-			     int max_uV, unsigned int *s)</div><div class='add'>+static int max8660_ldo67_set_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+					 unsigned int selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8660 *max8660 = rdev_get_drvdata(rdev);</div><div class='del'>-	u8 selector;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (min_uV &lt; MAX8660_LDO67_MIN_UV || min_uV &gt; MAX8660_LDO67_MAX_UV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (max_uV &lt; MAX8660_LDO67_MIN_UV || max_uV &gt; MAX8660_LDO67_MAX_UV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	selector = DIV_ROUND_UP(min_uV - MAX8660_LDO67_MIN_UV,</div><div class='del'>-				MAX8660_LDO67_STEP);</div><div class='del'>-</div><div class='del'>-	ret = max8660_ldo67_list(rdev, selector);</div><div class='del'>-	if (ret &lt; 0 || ret &gt; max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	*s = selector;</div><div class='ctx'> </div><div class='ctx'> 	if (rdev_get_id(rdev) == MAX8660_V6)</div><div class='ctx'> 		return max8660_write(max8660, MAX8660_L12VCR, 0xf0, selector);</div><div class='ctx'> 	else</div><div class='del'>-		return max8660_write(max8660, MAX8660_L12VCR, 0x0f, selector &lt;&lt; 4);</div><div class='add'>+		return max8660_write(max8660, MAX8660_L12VCR, 0x0f,</div><div class='add'>+				     selector &lt;&lt; 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops max8660_ldo67_ops = {</div><div class='ctx'> 	.is_enabled = max8660_ldo67_is_enabled,</div><div class='ctx'> 	.enable = max8660_ldo67_enable,</div><div class='ctx'> 	.disable = max8660_ldo67_disable,</div><div class='del'>-	.list_voltage = max8660_ldo67_list,</div><div class='del'>-	.get_voltage = max8660_ldo67_get,</div><div class='del'>-	.set_voltage = max8660_ldo67_set,</div><div class='add'>+	.list_voltage = regulator_list_voltage_linear,</div><div class='add'>+	.map_voltage = regulator_map_voltage_linear,</div><div class='add'>+	.get_voltage_sel = max8660_ldo67_get_voltage_sel,</div><div class='add'>+	.set_voltage_sel = max8660_ldo67_set_voltage_sel,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc max8660_reg[] = {</div><div class='add'>+static const struct regulator_desc max8660_reg[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "V3(DCDC)",</div><div class='ctx'> 		.id = MAX8660_V3,</div><div class='hunk'>@@ -321,6 +260,8 @@ static struct regulator_desc max8660_reg[] = {</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='ctx'> 		.n_voltages = MAX8660_DCDC_MAX_SEL + 1,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.min_uV = MAX8660_DCDC_MIN_UV,</div><div class='add'>+		.uV_step = MAX8660_DCDC_STEP,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "V4(DCDC)",</div><div class='hunk'>@@ -329,6 +270,8 @@ static struct regulator_desc max8660_reg[] = {</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='ctx'> 		.n_voltages = MAX8660_DCDC_MAX_SEL + 1,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.min_uV = MAX8660_DCDC_MIN_UV,</div><div class='add'>+		.uV_step = MAX8660_DCDC_STEP,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "V5(LDO)",</div><div class='hunk'>@@ -337,6 +280,8 @@ static struct regulator_desc max8660_reg[] = {</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='ctx'> 		.n_voltages = MAX8660_LDO5_MAX_SEL + 1,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.min_uV = MAX8660_LDO5_MIN_UV,</div><div class='add'>+		.uV_step = MAX8660_LDO5_STEP,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "V6(LDO)",</div><div class='hunk'>@@ -345,6 +290,8 @@ static struct regulator_desc max8660_reg[] = {</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='ctx'> 		.n_voltages = MAX8660_LDO67_MAX_SEL + 1,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.min_uV = MAX8660_LDO67_MIN_UV,</div><div class='add'>+		.uV_step = MAX8660_LDO67_STEP,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "V7(LDO)",</div><div class='hunk'>@@ -353,6 +300,8 @@ static struct regulator_desc max8660_reg[] = {</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='ctx'> 		.n_voltages = MAX8660_LDO67_MAX_SEL + 1,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.min_uV = MAX8660_LDO67_MIN_UV,</div><div class='add'>+		.uV_step = MAX8660_LDO67_STEP,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -361,21 +310,20 @@ static int __devinit max8660_probe(struct i2c_client *client,</div><div class='ctx'> {</div><div class='ctx'> 	struct regulator_dev **rdev;</div><div class='ctx'> 	struct max8660_platform_data *pdata = client-&gt;dev.platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct max8660 *max8660;</div><div class='ctx'> 	int boot_on, i, id, ret = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;num_subdevs &gt; MAX8660_V_END) {</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "Too many regulators found!\n");</div><div class='del'>-		goto out;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	max8660 = kzalloc(sizeof(struct max8660) +</div><div class='add'>+	max8660 = devm_kzalloc(&amp;client-&gt;dev, sizeof(struct max8660) +</div><div class='ctx'> 			sizeof(struct regulator_dev *) * MAX8660_V_END,</div><div class='ctx'> 			GFP_KERNEL);</div><div class='del'>-	if (!max8660) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	if (!max8660)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	max8660-&gt;client = client;</div><div class='ctx'> 	rdev = max8660-&gt;rdev;</div><div class='hunk'>@@ -404,7 +352,7 @@ static int __devinit max8660_probe(struct i2c_client *client,</div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;num_subdevs; i++) {</div><div class='ctx'> </div><div class='ctx'> 		if (!pdata-&gt;subdevs[i].platform_data)</div><div class='del'>-			goto err_free;</div><div class='add'>+			goto err_out;</div><div class='ctx'> </div><div class='ctx'> 		boot_on = pdata-&gt;subdevs[i].platform_data-&gt;constraints.boot_on;</div><div class='ctx'> </div><div class='hunk'>@@ -430,7 +378,7 @@ static int __devinit max8660_probe(struct i2c_client *client,</div><div class='ctx'> 		case MAX8660_V7:</div><div class='ctx'> 			if (!strcmp(i2c_id-&gt;name, "max8661")) {</div><div class='ctx'> 				dev_err(&amp;client-&gt;dev, "Regulator not on this chip!\n");</div><div class='del'>-				goto err_free;</div><div class='add'>+				goto err_out;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (boot_on)</div><div class='hunk'>@@ -440,7 +388,7 @@ static int __devinit max8660_probe(struct i2c_client *client,</div><div class='ctx'> 		default:</div><div class='ctx'> 			dev_err(&amp;client-&gt;dev, "invalid regulator %s\n",</div><div class='ctx'> 				 pdata-&gt;subdevs[i].name);</div><div class='del'>-			goto err_free;</div><div class='add'>+			goto err_out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -449,9 +397,11 @@ static int __devinit max8660_probe(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> 		id = pdata-&gt;subdevs[i].id;</div><div class='ctx'> </div><div class='del'>-		rdev[i] = regulator_register(&amp;max8660_reg[id], &amp;client-&gt;dev,</div><div class='del'>-					     pdata-&gt;subdevs[i].platform_data,</div><div class='del'>-					     max8660, NULL);</div><div class='add'>+		config.dev = &amp;client-&gt;dev;</div><div class='add'>+		config.init_data = pdata-&gt;subdevs[i].platform_data;</div><div class='add'>+		config.driver_data = max8660;</div><div class='add'>+</div><div class='add'>+		rdev[i] = regulator_register(&amp;max8660_reg[id], &amp;config);</div><div class='ctx'> 		if (IS_ERR(rdev[i])) {</div><div class='ctx'> 			ret = PTR_ERR(rdev[i]);</div><div class='ctx'> 			dev_err(&amp;client-&gt;dev, "failed to register %s\n",</div><div class='hunk'>@@ -461,15 +411,12 @@ static int __devinit max8660_probe(struct i2c_client *client,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	i2c_set_clientdata(client, max8660);</div><div class='del'>-	dev_info(&amp;client-&gt;dev, "Maxim 8660/8661 regulator driver loaded\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_unregister:</div><div class='ctx'> 	while (--i &gt;= 0)</div><div class='ctx'> 		regulator_unregister(rdev[i]);</div><div class='del'>-err_free:</div><div class='del'>-	kfree(max8660);</div><div class='del'>-out:</div><div class='add'>+err_out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -481,8 +428,6 @@ static int __devexit max8660_remove(struct i2c_client *client)</div><div class='ctx'> 	for (i = 0; i &lt; MAX8660_V_END; i++)</div><div class='ctx'> 		if (max8660-&gt;rdev[i])</div><div class='ctx'> 			regulator_unregister(max8660-&gt;rdev[i]);</div><div class='del'>-	kfree(max8660);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/max8925-regulator.c b/drivers/regulator/max8925-regulator.c<br/>index 2f242f43096e..43dc97ec3932 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/max8925-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/max8925-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/max8925-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max8925-regulator.c</a></div><div class='hunk'>@@ -38,50 +38,20 @@ struct max8925_regulator_info {</div><div class='ctx'> 	struct i2c_client	*i2c;</div><div class='ctx'> 	struct max8925_chip	*chip;</div><div class='ctx'> </div><div class='del'>-	int	min_uV;</div><div class='del'>-	int	max_uV;</div><div class='del'>-	int	step_uV;</div><div class='ctx'> 	int	vol_reg;</div><div class='del'>-	int	vol_shift;</div><div class='del'>-	int	vol_nbits;</div><div class='ctx'> 	int	enable_reg;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline int check_range(struct max8925_regulator_info *info,</div><div class='del'>-			      int min_uV, int max_uV)</div><div class='del'>-{</div><div class='del'>-	if (min_uV &lt; info-&gt;min_uV || min_uV &gt; info-&gt;max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int max8925_list_voltage(struct regulator_dev *rdev, unsigned index)</div><div class='del'>-{</div><div class='del'>-	struct max8925_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	return info-&gt;min_uV + index * info-&gt;step_uV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int max8925_set_voltage(struct regulator_dev *rdev,</div><div class='del'>-			       int min_uV, int max_uV, unsigned int *selector)</div><div class='add'>+static int max8925_set_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+				   unsigned int selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8925_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='del'>-	unsigned char data, mask;</div><div class='del'>-</div><div class='del'>-	if (check_range(info, min_uV, max_uV)) {</div><div class='del'>-		dev_err(info-&gt;chip-&gt;dev, "invalid voltage range (%d, %d) uV\n",</div><div class='del'>-			min_uV, max_uV);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	data = DIV_ROUND_UP(min_uV - info-&gt;min_uV, info-&gt;step_uV);</div><div class='del'>-	*selector = data;</div><div class='del'>-	data &lt;&lt;= info-&gt;vol_shift;</div><div class='del'>-	mask = ((1 &lt;&lt; info-&gt;vol_nbits) - 1) &lt;&lt; info-&gt;vol_shift;</div><div class='add'>+	unsigned char mask = rdev-&gt;desc-&gt;n_voltages - 1;</div><div class='ctx'> </div><div class='del'>-	return max8925_set_bits(info-&gt;i2c, info-&gt;vol_reg, mask, data);</div><div class='add'>+	return max8925_set_bits(info-&gt;i2c, info-&gt;vol_reg, mask, selector);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max8925_get_voltage(struct regulator_dev *rdev)</div><div class='add'>+static int max8925_get_voltage_sel(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8925_regulator_info *info = rdev_get_drvdata(rdev);</div><div class='ctx'> 	unsigned char data, mask;</div><div class='hunk'>@@ -90,10 +60,10 @@ static int max8925_get_voltage(struct regulator_dev *rdev)</div><div class='ctx'> 	ret = max8925_reg_read(info-&gt;i2c, info-&gt;vol_reg);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='del'>-	mask = ((1 &lt;&lt; info-&gt;vol_nbits) - 1) &lt;&lt; info-&gt;vol_shift;</div><div class='del'>-	data = (ret &amp; mask) &gt;&gt; info-&gt;vol_shift;</div><div class='add'>+	mask = rdev-&gt;desc-&gt;n_voltages - 1;</div><div class='add'>+	data = ret &amp; mask;</div><div class='ctx'> </div><div class='del'>-	return max8925_list_voltage(rdev, data);</div><div class='add'>+	return data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int max8925_enable(struct regulator_dev *rdev)</div><div class='hunk'>@@ -163,8 +133,10 @@ static int max8925_set_dvm_disable(struct regulator_dev *rdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops max8925_regulator_sdv_ops = {</div><div class='del'>-	.set_voltage		= max8925_set_voltage,</div><div class='del'>-	.get_voltage		= max8925_get_voltage,</div><div class='add'>+	.map_voltage		= regulator_map_voltage_linear,</div><div class='add'>+	.list_voltage		= regulator_list_voltage_linear,</div><div class='add'>+	.set_voltage_sel	= max8925_set_voltage_sel,</div><div class='add'>+	.get_voltage_sel	= max8925_get_voltage_sel,</div><div class='ctx'> 	.enable			= max8925_enable,</div><div class='ctx'> 	.disable		= max8925_disable,</div><div class='ctx'> 	.is_enabled		= max8925_is_enabled,</div><div class='hunk'>@@ -174,8 +146,10 @@ static struct regulator_ops max8925_regulator_sdv_ops = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops max8925_regulator_ldo_ops = {</div><div class='del'>-	.set_voltage		= max8925_set_voltage,</div><div class='del'>-	.get_voltage		= max8925_get_voltage,</div><div class='add'>+	.map_voltage		= regulator_map_voltage_linear,</div><div class='add'>+	.list_voltage		= regulator_list_voltage_linear,</div><div class='add'>+	.set_voltage_sel	= max8925_set_voltage_sel,</div><div class='add'>+	.get_voltage_sel	= max8925_get_voltage_sel,</div><div class='ctx'> 	.enable			= max8925_enable,</div><div class='ctx'> 	.disable		= max8925_disable,</div><div class='ctx'> 	.is_enabled		= max8925_is_enabled,</div><div class='hunk'>@@ -189,13 +163,11 @@ static struct regulator_ops max8925_regulator_ldo_ops = {</div><div class='ctx'> 		.type	= REGULATOR_VOLTAGE,			\</div><div class='ctx'> 		.id	= MAX8925_ID_SD##_id,			\</div><div class='ctx'> 		.owner	= THIS_MODULE,				\</div><div class='add'>+		.n_voltages = 64,				\</div><div class='add'>+		.min_uV = min * 1000,				\</div><div class='add'>+		.uV_step = step * 1000,				\</div><div class='ctx'> 	},							\</div><div class='del'>-	.min_uV		= min * 1000,				\</div><div class='del'>-	.max_uV		= max * 1000,				\</div><div class='del'>-	.step_uV	= step * 1000,				\</div><div class='ctx'> 	.vol_reg	= MAX8925_SDV##_id,			\</div><div class='del'>-	.vol_shift	= 0,					\</div><div class='del'>-	.vol_nbits	= 6,					\</div><div class='ctx'> 	.enable_reg	= MAX8925_SDCTL##_id,			\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -207,13 +179,11 @@ static struct regulator_ops max8925_regulator_ldo_ops = {</div><div class='ctx'> 		.type	= REGULATOR_VOLTAGE,			\</div><div class='ctx'> 		.id	= MAX8925_ID_LDO##_id,			\</div><div class='ctx'> 		.owner	= THIS_MODULE,				\</div><div class='add'>+		.n_voltages = 64,				\</div><div class='add'>+		.min_uV = min * 1000,				\</div><div class='add'>+		.uV_step = step * 1000,				\</div><div class='ctx'> 	},							\</div><div class='del'>-	.min_uV		= min * 1000,				\</div><div class='del'>-	.max_uV		= max * 1000,				\</div><div class='del'>-	.step_uV	= step * 1000,				\</div><div class='ctx'> 	.vol_reg	= MAX8925_LDOVOUT##_id,			\</div><div class='del'>-	.vol_shift	= 0,					\</div><div class='del'>-	.vol_nbits	= 6,					\</div><div class='ctx'> 	.enable_reg	= MAX8925_LDOCTL##_id,			\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -261,6 +231,7 @@ static int __devinit max8925_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8925_chip *chip = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct max8925_platform_data *pdata = chip-&gt;dev-&gt;platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct max8925_regulator_info *ri;</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> </div><div class='hunk'>@@ -272,8 +243,11 @@ static int __devinit max8925_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	ri-&gt;i2c = chip-&gt;i2c;</div><div class='ctx'> 	ri-&gt;chip = chip;</div><div class='ctx'> </div><div class='del'>-	rdev = regulator_register(&amp;ri-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-				  pdata-&gt;regulator[pdev-&gt;id], ri, NULL);</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = pdata-&gt;regulator[pdev-&gt;id];</div><div class='add'>+	config.driver_data = ri;</div><div class='add'>+</div><div class='add'>+	rdev = regulator_register(&amp;ri-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(rdev)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to register regulator %s\n",</div><div class='ctx'> 				ri-&gt;desc.name);</div><div class='hunk'>@@ -319,4 +293,3 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Haojian Zhuang &lt;haojian.zhuang@marvell.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Regulator Driver for Maxim 8925 PMIC");</div><div class='ctx'> MODULE_ALIAS("platform:max8925-regulator");</div><div class='del'>-</div><div class='head'>diff --git a/drivers/regulator/max8952.c b/drivers/regulator/max8952.c<br/>index 75d89400c123..910c9b26d499 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/max8952.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/max8952.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/max8952.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max8952.c</a></div><div class='hunk'>@@ -69,11 +69,6 @@ static int max8952_write_reg(struct max8952_data *max8952,</div><div class='ctx'> 	return i2c_smbus_write_byte_data(max8952-&gt;client, reg, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max8952_voltage(struct max8952_data *max8952, u8 mode)</div><div class='del'>-{</div><div class='del'>-	return (max8952-&gt;pdata-&gt;dvs_mode[mode] * 10 + 770) * 1000;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int max8952_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 		unsigned int selector)</div><div class='ctx'> {</div><div class='hunk'>@@ -82,7 +77,7 @@ static int max8952_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	if (rdev_get_id(rdev) != 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return max8952_voltage(max8952, selector);</div><div class='add'>+	return (max8952-&gt;pdata-&gt;dvs_mode[selector] * 10 + 770) * 1000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int max8952_is_enabled(struct regulator_dev *rdev)</div><div class='hunk'>@@ -117,7 +112,7 @@ static int max8952_disable(struct regulator_dev *rdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max8952_get_voltage(struct regulator_dev *rdev)</div><div class='add'>+static int max8952_get_voltage_sel(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8952_data *max8952 = rdev_get_drvdata(rdev);</div><div class='ctx'> 	u8 vid = 0;</div><div class='hunk'>@@ -127,14 +122,13 @@ static int max8952_get_voltage(struct regulator_dev *rdev)</div><div class='ctx'> 	if (max8952-&gt;vid1)</div><div class='ctx'> 		vid += 2;</div><div class='ctx'> </div><div class='del'>-	return max8952_voltage(max8952, vid);</div><div class='add'>+	return vid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max8952_set_voltage(struct regulator_dev *rdev,</div><div class='del'>-			       int min_uV, int max_uV, unsigned *selector)</div><div class='add'>+static int max8952_set_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+				   unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8952_data *max8952 = rdev_get_drvdata(rdev);</div><div class='del'>-	s8 vid = -1, i;</div><div class='ctx'> </div><div class='ctx'> 	if (!gpio_is_valid(max8952-&gt;pdata-&gt;gpio_vid0) ||</div><div class='ctx'> 			!gpio_is_valid(max8952-&gt;pdata-&gt;gpio_vid1)) {</div><div class='hunk'>@@ -142,23 +136,10 @@ static int max8952_set_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MAX8952_NUM_DVS_MODE; i++) {</div><div class='del'>-		int volt = max8952_voltage(max8952, i);</div><div class='del'>-</div><div class='del'>-		/* Set the voltage as low as possible within the range */</div><div class='del'>-		if (volt &lt;= max_uV &amp;&amp; volt &gt;= min_uV)</div><div class='del'>-			if (vid == -1 || max8952_voltage(max8952, vid) &gt; volt)</div><div class='del'>-				vid = i;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (vid &gt;= 0 &amp;&amp; vid &lt; MAX8952_NUM_DVS_MODE) {</div><div class='del'>-		max8952-&gt;vid0 = (vid % 2 == 1);</div><div class='del'>-		max8952-&gt;vid1 = (((vid &gt;&gt; 1) % 2) == 1);</div><div class='del'>-		*selector = vid;</div><div class='del'>-		gpio_set_value(max8952-&gt;pdata-&gt;gpio_vid0, max8952-&gt;vid0);</div><div class='del'>-		gpio_set_value(max8952-&gt;pdata-&gt;gpio_vid1, max8952-&gt;vid1);</div><div class='del'>-	} else</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	max8952-&gt;vid0 = selector &amp; 0x1;</div><div class='add'>+	max8952-&gt;vid1 = (selector &gt;&gt; 1) &amp; 0x1;</div><div class='add'>+	gpio_set_value(max8952-&gt;pdata-&gt;gpio_vid0, max8952-&gt;vid0);</div><div class='add'>+	gpio_set_value(max8952-&gt;pdata-&gt;gpio_vid1, max8952-&gt;vid1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -168,12 +149,12 @@ static struct regulator_ops max8952_ops = {</div><div class='ctx'> 	.is_enabled		= max8952_is_enabled,</div><div class='ctx'> 	.enable			= max8952_enable,</div><div class='ctx'> 	.disable		= max8952_disable,</div><div class='del'>-	.get_voltage		= max8952_get_voltage,</div><div class='del'>-	.set_voltage		= max8952_set_voltage,</div><div class='add'>+	.get_voltage_sel	= max8952_get_voltage_sel,</div><div class='add'>+	.set_voltage_sel	= max8952_set_voltage_sel,</div><div class='ctx'> 	.set_suspend_disable	= max8952_disable,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc regulator = {</div><div class='add'>+static const struct regulator_desc regulator = {</div><div class='ctx'> 	.name		= "MAX8952_VOUT",</div><div class='ctx'> 	.id		= 0,</div><div class='ctx'> 	.n_voltages	= MAX8952_NUM_DVS_MODE,</div><div class='hunk'>@@ -187,6 +168,7 @@ static int __devinit max8952_pmic_probe(struct i2c_client *client,</div><div class='ctx'> {</div><div class='ctx'> 	struct i2c_adapter *adapter = to_i2c_adapter(client-&gt;dev.parent);</div><div class='ctx'> 	struct max8952_platform_data *pdata = client-&gt;dev.platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct max8952_data *max8952;</div><div class='ctx'> </div><div class='ctx'> 	int ret = 0, err = 0;</div><div class='hunk'>@@ -199,7 +181,8 @@ static int __devinit max8952_pmic_probe(struct i2c_client *client,</div><div class='ctx'> 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	max8952 = kzalloc(sizeof(struct max8952_data), GFP_KERNEL);</div><div class='add'>+	max8952 = devm_kzalloc(&amp;client-&gt;dev, sizeof(struct max8952_data),</div><div class='add'>+			       GFP_KERNEL);</div><div class='ctx'> 	if (!max8952)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -207,18 +190,21 @@ static int __devinit max8952_pmic_probe(struct i2c_client *client,</div><div class='ctx'> 	max8952-&gt;dev = &amp;client-&gt;dev;</div><div class='ctx'> 	max8952-&gt;pdata = pdata;</div><div class='ctx'> </div><div class='del'>-	max8952-&gt;rdev = regulator_register(&amp;regulator, max8952-&gt;dev,</div><div class='del'>-			&amp;pdata-&gt;reg_data, max8952, NULL);</div><div class='add'>+	config.dev = max8952-&gt;dev;</div><div class='add'>+	config.init_data = &amp;pdata-&gt;reg_data;</div><div class='add'>+	config.driver_data = max8952;</div><div class='add'>+</div><div class='add'>+	max8952-&gt;rdev = regulator_register(&amp;regulator, &amp;config);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(max8952-&gt;rdev)) {</div><div class='ctx'> 		ret = PTR_ERR(max8952-&gt;rdev);</div><div class='ctx'> 		dev_err(max8952-&gt;dev, "regulator init failed (%d)\n", ret);</div><div class='del'>-		goto err_reg;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	max8952-&gt;en = !!(pdata-&gt;reg_data.constraints.boot_on);</div><div class='del'>-	max8952-&gt;vid0 = (pdata-&gt;default_mode % 2) == 1;</div><div class='del'>-	max8952-&gt;vid1 = ((pdata-&gt;default_mode &gt;&gt; 1) % 2) == 1;</div><div class='add'>+	max8952-&gt;vid0 = pdata-&gt;default_mode &amp; 0x1;</div><div class='add'>+	max8952-&gt;vid1 = (pdata-&gt;default_mode &gt;&gt; 1) &amp; 0x1;</div><div class='ctx'> </div><div class='ctx'> 	if (gpio_is_valid(pdata-&gt;gpio_en)) {</div><div class='ctx'> 		if (!gpio_request(pdata-&gt;gpio_en, "MAX8952 EN"))</div><div class='hunk'>@@ -241,13 +227,13 @@ static int __devinit max8952_pmic_probe(struct i2c_client *client,</div><div class='ctx'> 			gpio_is_valid(pdata-&gt;gpio_vid1)) {</div><div class='ctx'> 		if (!gpio_request(pdata-&gt;gpio_vid0, "MAX8952 VID0"))</div><div class='ctx'> 			gpio_direction_output(pdata-&gt;gpio_vid0,</div><div class='del'>-					(pdata-&gt;default_mode) % 2);</div><div class='add'>+					(pdata-&gt;default_mode) &amp; 0x1);</div><div class='ctx'> 		else</div><div class='ctx'> 			err = 1;</div><div class='ctx'> </div><div class='ctx'> 		if (!gpio_request(pdata-&gt;gpio_vid1, "MAX8952 VID1"))</div><div class='ctx'> 			gpio_direction_output(pdata-&gt;gpio_vid1,</div><div class='del'>-				(pdata-&gt;default_mode &gt;&gt; 1) % 2);</div><div class='add'>+				(pdata-&gt;default_mode &gt;&gt; 1) &amp; 0x1);</div><div class='ctx'> 		else {</div><div class='ctx'> 			if (!err)</div><div class='ctx'> 				gpio_free(pdata-&gt;gpio_vid0);</div><div class='hunk'>@@ -310,10 +296,6 @@ static int __devinit max8952_pmic_probe(struct i2c_client *client,</div><div class='ctx'> 	i2c_set_clientdata(client, max8952);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err_reg:</div><div class='del'>-	kfree(max8952);</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit max8952_pmic_remove(struct i2c_client *client)</div><div class='hunk'>@@ -327,8 +309,6 @@ static int __devexit max8952_pmic_remove(struct i2c_client *client)</div><div class='ctx'> 	gpio_free(pdata-&gt;gpio_vid0);</div><div class='ctx'> 	gpio_free(pdata-&gt;gpio_vid1);</div><div class='ctx'> 	gpio_free(pdata-&gt;gpio_en);</div><div class='del'>-</div><div class='del'>-	kfree(max8952);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/max8997.c b/drivers/regulator/max8997.c<br/>index 96579296f04d..704cd49ef375 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/max8997.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/max8997.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/max8997.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max8997.c</a></div><div class='hunk'>@@ -22,7 +22,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -68,29 +67,28 @@ struct voltage_map_desc {</div><div class='ctx'> 	int min;</div><div class='ctx'> 	int max;</div><div class='ctx'> 	int step;</div><div class='del'>-	unsigned int n_bits;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Voltage maps in mV */</div><div class='ctx'> static const struct voltage_map_desc ldo_voltage_map_desc = {</div><div class='del'>-	.min = 800,	.max = 3950,	.step = 50,	.n_bits = 6,</div><div class='add'>+	.min = 800,	.max = 3950,	.step = 50,</div><div class='ctx'> }; /* LDO1 ~ 18, 21 all */</div><div class='ctx'> </div><div class='ctx'> static const struct voltage_map_desc buck1245_voltage_map_desc = {</div><div class='del'>-	.min = 650,	.max = 2225,	.step = 25,	.n_bits = 6,</div><div class='add'>+	.min = 650,	.max = 2225,	.step = 25,</div><div class='ctx'> }; /* Buck1, 2, 4, 5 */</div><div class='ctx'> </div><div class='ctx'> static const struct voltage_map_desc buck37_voltage_map_desc = {</div><div class='del'>-	.min = 750,	.max = 3900,	.step = 50,	.n_bits = 6,</div><div class='add'>+	.min = 750,	.max = 3900,	.step = 50,</div><div class='ctx'> }; /* Buck3, 7 */</div><div class='ctx'> </div><div class='ctx'> /* current map in mA */</div><div class='ctx'> static const struct voltage_map_desc charger_current_map_desc = {</div><div class='del'>-	.min = 200,	.max = 950,	.step = 50,	.n_bits = 4,</div><div class='add'>+	.min = 200,	.max = 950,	.step = 50,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct voltage_map_desc topoff_current_map_desc = {</div><div class='del'>-	.min = 50,	.max = 200,	.step = 10,	.n_bits = 4,</div><div class='add'>+	.min = 50,	.max = 200,	.step = 10,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct voltage_map_desc *reg_voltage_map[] = {</div><div class='hunk'>@@ -279,9 +277,7 @@ static int max8997_reg_is_enabled(struct regulator_dev *rdev)</div><div class='ctx'> 	u8 val;</div><div class='ctx'> </div><div class='ctx'> 	ret = max8997_get_enable_register(rdev, &amp;reg, &amp;mask, &amp;pattern);</div><div class='del'>-	if (ret == -EINVAL)</div><div class='del'>-		return 1; /* "not controllable" */</div><div class='del'>-	else if (ret)</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = max8997_read_reg(i2c, reg, &amp;val);</div><div class='hunk'>@@ -320,6 +316,7 @@ static int max8997_reg_disable(struct regulator_dev *rdev)</div><div class='ctx'> static int max8997_get_voltage_register(struct regulator_dev *rdev,</div><div class='ctx'> 		int *_reg, int *_shift, int *_mask)</div><div class='ctx'> {</div><div class='add'>+	struct max8997_data *max8997 = rdev_get_drvdata(rdev);</div><div class='ctx'> 	int rid = rdev_get_id(rdev);</div><div class='ctx'> 	int reg, shift = 0, mask = 0x3f;</div><div class='ctx'> </div><div class='hunk'>@@ -329,9 +326,13 @@ static int max8997_get_voltage_register(struct regulator_dev *rdev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MAX8997_BUCK1:</div><div class='ctx'> 		reg = MAX8997_REG_BUCK1DVS1;</div><div class='add'>+		if (max8997-&gt;buck1_gpiodvs)</div><div class='add'>+			reg += max8997-&gt;buck125_gpioindex;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MAX8997_BUCK2:</div><div class='ctx'> 		reg = MAX8997_REG_BUCK2DVS1;</div><div class='add'>+		if (max8997-&gt;buck2_gpiodvs)</div><div class='add'>+			reg += max8997-&gt;buck125_gpioindex;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MAX8997_BUCK3:</div><div class='ctx'> 		reg = MAX8997_REG_BUCK3DVS;</div><div class='hunk'>@@ -341,6 +342,8 @@ static int max8997_get_voltage_register(struct regulator_dev *rdev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MAX8997_BUCK5:</div><div class='ctx'> 		reg = MAX8997_REG_BUCK5DVS1;</div><div class='add'>+		if (max8997-&gt;buck5_gpiodvs)</div><div class='add'>+			reg += max8997-&gt;buck125_gpioindex;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MAX8997_BUCK7:</div><div class='ctx'> 		reg = MAX8997_REG_BUCK7DVS;</div><div class='hunk'>@@ -376,23 +379,17 @@ static int max8997_get_voltage_register(struct regulator_dev *rdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max8997_get_voltage(struct regulator_dev *rdev)</div><div class='add'>+static int max8997_get_voltage_sel(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);</div><div class='ctx'> 	struct i2c_client *i2c = max8997-&gt;iodev-&gt;i2c;</div><div class='ctx'> 	int reg, shift, mask, ret;</div><div class='del'>-	int rid = rdev_get_id(rdev);</div><div class='ctx'> 	u8 val;</div><div class='ctx'> </div><div class='ctx'> 	ret = max8997_get_voltage_register(rdev, &amp;reg, &amp;shift, &amp;mask);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if ((rid == MAX8997_BUCK1 &amp;&amp; max8997-&gt;buck1_gpiodvs) ||</div><div class='del'>-			(rid == MAX8997_BUCK2 &amp;&amp; max8997-&gt;buck2_gpiodvs) ||</div><div class='del'>-			(rid == MAX8997_BUCK5 &amp;&amp; max8997-&gt;buck5_gpiodvs))</div><div class='del'>-		reg += max8997-&gt;buck125_gpioindex;</div><div class='del'>-</div><div class='ctx'> 	ret = max8997_read_reg(i2c, reg, &amp;val);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -400,22 +397,14 @@ static int max8997_get_voltage(struct regulator_dev *rdev)</div><div class='ctx'> 	val &gt;&gt;= shift;</div><div class='ctx'> 	val &amp;= mask;</div><div class='ctx'> </div><div class='del'>-	if (rdev-&gt;desc &amp;&amp; rdev-&gt;desc-&gt;ops &amp;&amp; rdev-&gt;desc-&gt;ops-&gt;list_voltage)</div><div class='del'>-		return rdev-&gt;desc-&gt;ops-&gt;list_voltage(rdev, val);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * max8997_list_voltage returns value for any rdev with voltage_map,</div><div class='del'>-	 * which works for "CHARGER" and "CHARGER TOPOFF" that do not have</div><div class='del'>-	 * list_voltage ops (they are current regulators).</div><div class='del'>-	 */</div><div class='del'>-	return max8997_list_voltage(rdev, val);</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int max8997_get_voltage_proper_val(</div><div class='ctx'> 		const struct voltage_map_desc *desc,</div><div class='ctx'> 		int min_vol, int max_vol)</div><div class='ctx'> {</div><div class='del'>-	int i = 0;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (desc == NULL)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -423,14 +412,12 @@ static inline int max8997_get_voltage_proper_val(</div><div class='ctx'> 	if (max_vol &lt; desc-&gt;min || min_vol &gt; desc-&gt;max)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	while (desc-&gt;min + desc-&gt;step * i &lt; min_vol &amp;&amp;</div><div class='del'>-			desc-&gt;min + desc-&gt;step * i &lt; desc-&gt;max)</div><div class='del'>-		i++;</div><div class='add'>+	if (min_vol &lt; desc-&gt;min)</div><div class='add'>+		min_vol = desc-&gt;min;</div><div class='ctx'> </div><div class='del'>-	if (desc-&gt;min + desc-&gt;step * i &gt; max_vol)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	i = DIV_ROUND_UP(min_vol - desc-&gt;min, desc-&gt;step);</div><div class='ctx'> </div><div class='del'>-	if (i &gt;= (1 &lt;&lt; desc-&gt;n_bits))</div><div class='add'>+	if (desc-&gt;min + desc-&gt;step * i &gt; max_vol)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	return i;</div><div class='hunk'>@@ -499,9 +486,7 @@ static int max8997_set_voltage_ldobuck(struct regulator_dev *rdev,</div><div class='ctx'> 	int min_vol = min_uV / 1000, max_vol = max_uV / 1000;</div><div class='ctx'> 	const struct voltage_map_desc *desc;</div><div class='ctx'> 	int rid = rdev_get_id(rdev);</div><div class='del'>-	int reg, shift = 0, mask, ret;</div><div class='del'>-	int i;</div><div class='del'>-	u8 org;</div><div class='add'>+	int i, reg, shift, mask, ret;</div><div class='ctx'> </div><div class='ctx'> 	switch (rid) {</div><div class='ctx'> 	case MAX8997_LDO1 ... MAX8997_LDO21:</div><div class='hunk'>@@ -530,21 +515,50 @@ static int max8997_set_voltage_ldobuck(struct regulator_dev *rdev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	max8997_read_reg(i2c, reg, &amp;org);</div><div class='del'>-	org = (org &amp; mask) &gt;&gt; shift;</div><div class='del'>-</div><div class='ctx'> 	ret = max8997_update_reg(i2c, reg, i &lt;&lt; shift, mask &lt;&lt; shift);</div><div class='ctx'> 	*selector = i;</div><div class='ctx'> </div><div class='del'>-	if (rid == MAX8997_BUCK1 || rid == MAX8997_BUCK2 ||</div><div class='del'>-			rid == MAX8997_BUCK4 || rid == MAX8997_BUCK5) {</div><div class='del'>-		/* If the voltage is increasing */</div><div class='del'>-		if (org &lt; i)</div><div class='del'>-			udelay(DIV_ROUND_UP(desc-&gt;step * (i - org),</div><div class='del'>-						max8997-&gt;ramp_delay));</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max8997_set_voltage_ldobuck_time_sel(struct regulator_dev *rdev,</div><div class='add'>+						unsigned int old_selector,</div><div class='add'>+						unsigned int new_selector)</div><div class='add'>+{</div><div class='add'>+	struct max8997_data *max8997 = rdev_get_drvdata(rdev);</div><div class='add'>+	int rid = rdev_get_id(rdev);</div><div class='add'>+	const struct voltage_map_desc *desc = reg_voltage_map[rid];</div><div class='add'>+</div><div class='add'>+	/* Delay is required only if the voltage is increasing */</div><div class='add'>+	if (old_selector &gt;= new_selector)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* No need to delay if gpio_dvs_mode */</div><div class='add'>+	switch (rid) {</div><div class='add'>+	case MAX8997_BUCK1:</div><div class='add'>+		if (max8997-&gt;buck1_gpiodvs)</div><div class='add'>+			return 0;</div><div class='add'>+		break;</div><div class='add'>+	case MAX8997_BUCK2:</div><div class='add'>+		if (max8997-&gt;buck2_gpiodvs)</div><div class='add'>+			return 0;</div><div class='add'>+		break;</div><div class='add'>+	case MAX8997_BUCK5:</div><div class='add'>+		if (max8997-&gt;buck5_gpiodvs)</div><div class='add'>+			return 0;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	switch (rid) {</div><div class='add'>+	case MAX8997_BUCK1:</div><div class='add'>+	case MAX8997_BUCK2:</div><div class='add'>+	case MAX8997_BUCK4:</div><div class='add'>+	case MAX8997_BUCK5:</div><div class='add'>+		return DIV_ROUND_UP(desc-&gt;step * (new_selector - old_selector),</div><div class='add'>+				    max8997-&gt;ramp_delay);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -684,7 +698,7 @@ static int max8997_set_voltage_buck(struct regulator_dev *rdev,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		new_val++;</div><div class='del'>-	} while (desc-&gt;min + desc-&gt;step + new_val &lt;= desc-&gt;max);</div><div class='add'>+	} while (desc-&gt;min + desc-&gt;step * new_val &lt;= desc-&gt;max);</div><div class='ctx'> </div><div class='ctx'> 	new_idx = tmp_idx;</div><div class='ctx'> 	new_val = tmp_val;</div><div class='hunk'>@@ -751,11 +765,6 @@ static int max8997_set_voltage_safeout(struct regulator_dev *rdev,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max8997_reg_enable_suspend(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int max8997_reg_disable_suspend(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8997_data *max8997 = rdev_get_drvdata(rdev);</div><div class='hunk'>@@ -788,9 +797,9 @@ static struct regulator_ops max8997_ldo_ops = {</div><div class='ctx'> 	.is_enabled		= max8997_reg_is_enabled,</div><div class='ctx'> 	.enable			= max8997_reg_enable,</div><div class='ctx'> 	.disable		= max8997_reg_disable,</div><div class='del'>-	.get_voltage		= max8997_get_voltage,</div><div class='add'>+	.get_voltage_sel	= max8997_get_voltage_sel,</div><div class='ctx'> 	.set_voltage		= max8997_set_voltage_ldobuck,</div><div class='del'>-	.set_suspend_enable	= max8997_reg_enable_suspend,</div><div class='add'>+	.set_voltage_time_sel	= max8997_set_voltage_ldobuck_time_sel,</div><div class='ctx'> 	.set_suspend_disable	= max8997_reg_disable_suspend,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -799,9 +808,9 @@ static struct regulator_ops max8997_buck_ops = {</div><div class='ctx'> 	.is_enabled		= max8997_reg_is_enabled,</div><div class='ctx'> 	.enable			= max8997_reg_enable,</div><div class='ctx'> 	.disable		= max8997_reg_disable,</div><div class='del'>-	.get_voltage		= max8997_get_voltage,</div><div class='add'>+	.get_voltage_sel	= max8997_get_voltage_sel,</div><div class='ctx'> 	.set_voltage		= max8997_set_voltage_buck,</div><div class='del'>-	.set_suspend_enable	= max8997_reg_enable_suspend,</div><div class='add'>+	.set_voltage_time_sel	= max8997_set_voltage_ldobuck_time_sel,</div><div class='ctx'> 	.set_suspend_disable	= max8997_reg_disable_suspend,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -810,7 +819,6 @@ static struct regulator_ops max8997_fixedvolt_ops = {</div><div class='ctx'> 	.is_enabled		= max8997_reg_is_enabled,</div><div class='ctx'> 	.enable			= max8997_reg_enable,</div><div class='ctx'> 	.disable		= max8997_reg_disable,</div><div class='del'>-	.set_suspend_enable	= max8997_reg_enable_suspend,</div><div class='ctx'> 	.set_suspend_disable	= max8997_reg_disable_suspend,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -819,144 +827,117 @@ static struct regulator_ops max8997_safeout_ops = {</div><div class='ctx'> 	.is_enabled		= max8997_reg_is_enabled,</div><div class='ctx'> 	.enable			= max8997_reg_enable,</div><div class='ctx'> 	.disable		= max8997_reg_disable,</div><div class='del'>-	.get_voltage		= max8997_get_voltage,</div><div class='add'>+	.get_voltage_sel	= max8997_get_voltage_sel,</div><div class='ctx'> 	.set_voltage		= max8997_set_voltage_safeout,</div><div class='del'>-	.set_suspend_enable	= max8997_reg_enable_suspend,</div><div class='ctx'> 	.set_suspend_disable	= max8997_reg_disable_suspend,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops max8997_fixedstate_ops = {</div><div class='ctx'> 	.list_voltage		= max8997_list_voltage_charger_cv,</div><div class='del'>-	.get_voltage		= max8997_get_voltage,</div><div class='add'>+	.get_voltage_sel	= max8997_get_voltage_sel,</div><div class='ctx'> 	.set_voltage		= max8997_set_voltage_charger_cv,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int max8997_set_voltage_ldobuck_wrap(struct regulator_dev *rdev,</div><div class='del'>-		int min_uV, int max_uV)</div><div class='add'>+static int max8997_set_current_limit(struct regulator_dev *rdev,</div><div class='add'>+				     int min_uA, int max_uA)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned dummy;</div><div class='add'>+	int rid = rdev_get_id(rdev);</div><div class='add'>+</div><div class='add'>+	if (rid != MAX8997_CHARGER &amp;&amp; rid != MAX8997_CHARGER_TOPOFF)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return max8997_set_voltage_ldobuck(rdev, min_uV, max_uV, &amp;dummy);</div><div class='add'>+	/* Reuse max8997_set_voltage_ldobuck to set current_limit. */</div><div class='add'>+	return max8997_set_voltage_ldobuck(rdev, min_uA, max_uA, &amp;dummy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int max8997_get_current_limit(struct regulator_dev *rdev)</div><div class='add'>+{</div><div class='add'>+	int sel, rid = rdev_get_id(rdev);</div><div class='add'>+</div><div class='add'>+	if (rid != MAX8997_CHARGER &amp;&amp; rid != MAX8997_CHARGER_TOPOFF)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	sel = max8997_get_voltage_sel(rdev);</div><div class='add'>+	if (sel &lt; 0)</div><div class='add'>+		return sel;</div><div class='add'>+</div><div class='add'>+	/* Reuse max8997_list_voltage to get current_limit. */</div><div class='add'>+	return max8997_list_voltage(rdev, sel);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops max8997_charger_ops = {</div><div class='ctx'> 	.is_enabled		= max8997_reg_is_enabled,</div><div class='ctx'> 	.enable			= max8997_reg_enable,</div><div class='ctx'> 	.disable		= max8997_reg_disable,</div><div class='del'>-	.get_current_limit	= max8997_get_voltage,</div><div class='del'>-	.set_current_limit	= max8997_set_voltage_ldobuck_wrap,</div><div class='add'>+	.get_current_limit	= max8997_get_current_limit,</div><div class='add'>+	.set_current_limit	= max8997_set_current_limit,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops max8997_charger_fixedstate_ops = {</div><div class='del'>-	.is_enabled		= max8997_reg_is_enabled,</div><div class='del'>-	.get_current_limit	= max8997_get_voltage,</div><div class='del'>-	.set_current_limit	= max8997_set_voltage_ldobuck_wrap,</div><div class='add'>+	.get_current_limit	= max8997_get_current_limit,</div><div class='add'>+	.set_current_limit	= max8997_set_current_limit,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define regulator_desc_ldo(num)		{	\</div><div class='del'>-	.name		= "LDO"#num,		\</div><div class='del'>-	.id		= MAX8997_LDO##num,	\</div><div class='del'>-	.ops		= &amp;max8997_ldo_ops,	\</div><div class='add'>+#define MAX8997_VOLTAGE_REGULATOR(_name, _ops) {\</div><div class='add'>+	.name		= #_name,		\</div><div class='add'>+	.id		= MAX8997_##_name,	\</div><div class='add'>+	.ops		= &amp;_ops,		\</div><div class='ctx'> 	.type		= REGULATOR_VOLTAGE,	\</div><div class='ctx'> 	.owner		= THIS_MODULE,		\</div><div class='ctx'> }</div><div class='del'>-#define regulator_desc_buck(num)		{	\</div><div class='del'>-	.name		= "BUCK"#num,		\</div><div class='del'>-	.id		= MAX8997_BUCK##num,	\</div><div class='del'>-	.ops		= &amp;max8997_buck_ops,	\</div><div class='del'>-	.type		= REGULATOR_VOLTAGE,	\</div><div class='add'>+</div><div class='add'>+#define MAX8997_CURRENT_REGULATOR(_name, _ops) {\</div><div class='add'>+	.name		= #_name,		\</div><div class='add'>+	.id		= MAX8997_##_name,	\</div><div class='add'>+	.ops		= &amp;_ops,		\</div><div class='add'>+	.type		= REGULATOR_CURRENT,	\</div><div class='ctx'> 	.owner		= THIS_MODULE,		\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_desc regulators[] = {</div><div class='del'>-	regulator_desc_ldo(1),</div><div class='del'>-	regulator_desc_ldo(2),</div><div class='del'>-	regulator_desc_ldo(3),</div><div class='del'>-	regulator_desc_ldo(4),</div><div class='del'>-	regulator_desc_ldo(5),</div><div class='del'>-	regulator_desc_ldo(6),</div><div class='del'>-	regulator_desc_ldo(7),</div><div class='del'>-	regulator_desc_ldo(8),</div><div class='del'>-	regulator_desc_ldo(9),</div><div class='del'>-	regulator_desc_ldo(10),</div><div class='del'>-	regulator_desc_ldo(11),</div><div class='del'>-	regulator_desc_ldo(12),</div><div class='del'>-	regulator_desc_ldo(13),</div><div class='del'>-	regulator_desc_ldo(14),</div><div class='del'>-	regulator_desc_ldo(15),</div><div class='del'>-	regulator_desc_ldo(16),</div><div class='del'>-	regulator_desc_ldo(17),</div><div class='del'>-	regulator_desc_ldo(18),</div><div class='del'>-	regulator_desc_ldo(21),</div><div class='del'>-	regulator_desc_buck(1),</div><div class='del'>-	regulator_desc_buck(2),</div><div class='del'>-	regulator_desc_buck(3),</div><div class='del'>-	regulator_desc_buck(4),</div><div class='del'>-	regulator_desc_buck(5),</div><div class='del'>-	{</div><div class='del'>-		.name	= "BUCK6",</div><div class='del'>-		.id	= MAX8997_BUCK6,</div><div class='del'>-		.ops	= &amp;max8997_fixedvolt_ops,</div><div class='del'>-		.type	= REGULATOR_VOLTAGE,</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-	regulator_desc_buck(7),</div><div class='del'>-	{</div><div class='del'>-		.name	= "EN32KHz_AP",</div><div class='del'>-		.id	= MAX8997_EN32KHZ_AP,</div><div class='del'>-		.ops	= &amp;max8997_fixedvolt_ops,</div><div class='del'>-		.type	= REGULATOR_VOLTAGE,</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='del'>-	}, {</div><div class='del'>-		.name	= "EN32KHz_CP",</div><div class='del'>-		.id	= MAX8997_EN32KHZ_CP,</div><div class='del'>-		.ops	= &amp;max8997_fixedvolt_ops,</div><div class='del'>-		.type	= REGULATOR_VOLTAGE,</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='del'>-	}, {</div><div class='del'>-		.name	= "ENVICHG",</div><div class='del'>-		.id	= MAX8997_ENVICHG,</div><div class='del'>-		.ops	= &amp;max8997_fixedvolt_ops,</div><div class='del'>-		.type	= REGULATOR_VOLTAGE,</div><div class='del'>-		.owner	= THIS_MODULE,</div><div class='del'>-	}, {</div><div class='del'>-		.name	= "ESAFEOUT1",</div><div class='del'>-		.id	= MAX8997_ESAFEOUT1,</div><div class='del'>-		.ops	= &amp;max8997_safeout_ops,</div><div class='del'>-		.type	= REGULATOR_VOLTAGE,</div><div class='del'>-		.owner	 = THIS_MODULE,</div><div class='del'>-	}, {</div><div class='del'>-		.name	= "ESAFEOUT2",</div><div class='del'>-		.id	= MAX8997_ESAFEOUT2,</div><div class='del'>-		.ops	= &amp;max8997_safeout_ops,</div><div class='del'>-		.type	= REGULATOR_VOLTAGE,</div><div class='del'>-		.owner	 = THIS_MODULE,</div><div class='del'>-	}, {</div><div class='del'>-		.name	= "CHARGER_CV",</div><div class='del'>-		.id	= MAX8997_CHARGER_CV,</div><div class='del'>-		.ops	= &amp;max8997_fixedstate_ops,</div><div class='del'>-		.type	= REGULATOR_VOLTAGE,</div><div class='del'>-		.owner	 = THIS_MODULE,</div><div class='del'>-	}, {</div><div class='del'>-		.name	= "CHARGER",</div><div class='del'>-		.id	= MAX8997_CHARGER,</div><div class='del'>-		.ops	= &amp;max8997_charger_ops,</div><div class='del'>-		.type	= REGULATOR_CURRENT,</div><div class='del'>-		.owner	 = THIS_MODULE,</div><div class='del'>-	}, {</div><div class='del'>-		.name	= "CHARGER_TOPOFF",</div><div class='del'>-		.id	= MAX8997_CHARGER_TOPOFF,</div><div class='del'>-		.ops	= &amp;max8997_charger_fixedstate_ops,</div><div class='del'>-		.type	= REGULATOR_CURRENT,</div><div class='del'>-		.owner	 = THIS_MODULE,</div><div class='del'>-	},</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO1, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO2, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO3, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO4, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO5, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO6, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO7, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO8, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO9, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO10, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO11, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO12, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO13, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO14, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO15, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO16, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO17, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO18, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(LDO21, max8997_ldo_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(BUCK1, max8997_buck_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(BUCK2, max8997_buck_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(BUCK3, max8997_buck_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(BUCK4, max8997_buck_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(BUCK5, max8997_buck_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(BUCK6, max8997_fixedvolt_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(BUCK7, max8997_buck_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(EN32KHZ_AP, max8997_fixedvolt_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(EN32KHZ_CP, max8997_fixedvolt_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(ENVICHG, max8997_fixedvolt_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(ESAFEOUT1, max8997_safeout_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(ESAFEOUT2, max8997_safeout_ops),</div><div class='add'>+	MAX8997_VOLTAGE_REGULATOR(CHARGER_CV, max8997_fixedstate_ops),</div><div class='add'>+	MAX8997_CURRENT_REGULATOR(CHARGER, max8997_charger_ops),</div><div class='add'>+	MAX8997_CURRENT_REGULATOR(CHARGER_TOPOFF,</div><div class='add'>+				  max8997_charger_fixedstate_ops),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __devinit int max8997_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8997_dev *iodev = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct max8997_platform_data *pdata = dev_get_platdata(iodev-&gt;dev);</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct regulator_dev **rdev;</div><div class='ctx'> 	struct max8997_data *max8997;</div><div class='ctx'> 	struct i2c_client *i2c;</div><div class='hunk'>@@ -968,16 +949,15 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	max8997 = kzalloc(sizeof(struct max8997_data), GFP_KERNEL);</div><div class='add'>+	max8997 = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct max8997_data),</div><div class='add'>+			       GFP_KERNEL);</div><div class='ctx'> 	if (!max8997)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	size = sizeof(struct regulator_dev *) * pdata-&gt;num_regulators;</div><div class='del'>-	max8997-&gt;rdev = kzalloc(size, GFP_KERNEL);</div><div class='del'>-	if (!max8997-&gt;rdev) {</div><div class='del'>-		kfree(max8997);</div><div class='add'>+	max8997-&gt;rdev = devm_kzalloc(&amp;pdev-&gt;dev, size, GFP_KERNEL);</div><div class='add'>+	if (!max8997-&gt;rdev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	rdev = max8997-&gt;rdev;</div><div class='ctx'> 	max8997-&gt;dev = &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -1001,7 +981,7 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 					pdata-&gt;buck1_voltage[i] / 1000 +</div><div class='ctx'> 					buck1245_voltage_map_desc.step);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto err_alloc;</div><div class='add'>+			goto err_out;</div><div class='ctx'> </div><div class='ctx'> 		max8997-&gt;buck2_vol[i] = ret =</div><div class='ctx'> 			max8997_get_voltage_proper_val(</div><div class='hunk'>@@ -1010,7 +990,7 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 					pdata-&gt;buck2_voltage[i] / 1000 +</div><div class='ctx'> 					buck1245_voltage_map_desc.step);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto err_alloc;</div><div class='add'>+			goto err_out;</div><div class='ctx'> </div><div class='ctx'> 		max8997-&gt;buck5_vol[i] = ret =</div><div class='ctx'> 			max8997_get_voltage_proper_val(</div><div class='hunk'>@@ -1019,7 +999,7 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 					pdata-&gt;buck5_voltage[i] / 1000 +</div><div class='ctx'> 					buck1245_voltage_map_desc.step);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto err_alloc;</div><div class='add'>+			goto err_out;</div><div class='ctx'> </div><div class='ctx'> 		if (max_buck1 &lt; max8997-&gt;buck1_vol[i])</div><div class='ctx'> 			max_buck1 = max8997-&gt;buck1_vol[i];</div><div class='hunk'>@@ -1052,7 +1032,7 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 				!gpio_is_valid(pdata-&gt;buck125_gpios[2])) {</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev, "GPIO NOT VALID\n");</div><div class='ctx'> 			ret = -EINVAL;</div><div class='del'>-			goto err_alloc;</div><div class='add'>+			goto err_out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ret = gpio_request(pdata-&gt;buck125_gpios[0],</div><div class='hunk'>@@ -1061,7 +1041,7 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 			dev_warn(&amp;pdev-&gt;dev, "Duplicated gpio request"</div><div class='ctx'> 					" on SET1\n");</div><div class='ctx'> 		else if (ret)</div><div class='del'>-			goto err_alloc;</div><div class='add'>+			goto err_out;</div><div class='ctx'> 		else</div><div class='ctx'> 			gpio1set = true;</div><div class='ctx'> </div><div class='hunk'>@@ -1073,7 +1053,7 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 		else if (ret) {</div><div class='ctx'> 			if (gpio1set)</div><div class='ctx'> 				gpio_free(pdata-&gt;buck125_gpios[0]);</div><div class='del'>-			goto err_alloc;</div><div class='add'>+			goto err_out;</div><div class='ctx'> 		} else</div><div class='ctx'> 			gpio2set = true;</div><div class='ctx'> </div><div class='hunk'>@@ -1087,7 +1067,7 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 				gpio_free(pdata-&gt;buck125_gpios[0]);</div><div class='ctx'> 			if (gpio2set)</div><div class='ctx'> 				gpio_free(pdata-&gt;buck125_gpios[1]);</div><div class='del'>-			goto err_alloc;</div><div class='add'>+			goto err_out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		gpio_direction_output(pdata-&gt;buck125_gpios[0],</div><div class='hunk'>@@ -1140,8 +1120,11 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 		else if (id == MAX8997_CHARGER_CV)</div><div class='ctx'> 			regulators[id].n_voltages = 16;</div><div class='ctx'> </div><div class='del'>-		rdev[i] = regulator_register(&amp;regulators[id], max8997-&gt;dev,</div><div class='del'>-				pdata-&gt;regulators[i].initdata, max8997, NULL);</div><div class='add'>+		config.dev = max8997-&gt;dev;</div><div class='add'>+		config.init_data = pdata-&gt;regulators[i].initdata;</div><div class='add'>+		config.driver_data = max8997;</div><div class='add'>+</div><div class='add'>+		rdev[i] = regulator_register(&amp;regulators[id], &amp;config);</div><div class='ctx'> 		if (IS_ERR(rdev[i])) {</div><div class='ctx'> 			ret = PTR_ERR(rdev[i]);</div><div class='ctx'> 			dev_err(max8997-&gt;dev, "regulator init failed for %d\n",</div><div class='hunk'>@@ -1153,13 +1136,9 @@ static __devinit int max8997_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> err:</div><div class='del'>-	for (i = 0; i &lt; max8997-&gt;num_regulators; i++)</div><div class='del'>-		if (rdev[i])</div><div class='del'>-			regulator_unregister(rdev[i]);</div><div class='del'>-err_alloc:</div><div class='del'>-	kfree(max8997-&gt;rdev);</div><div class='del'>-	kfree(max8997);</div><div class='del'>-</div><div class='add'>+	while (--i &gt;= 0)</div><div class='add'>+		regulator_unregister(rdev[i]);</div><div class='add'>+err_out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1170,12 +1149,7 @@ static int __devexit max8997_pmic_remove(struct platform_device *pdev)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; max8997-&gt;num_regulators; i++)</div><div class='del'>-		if (rdev[i])</div><div class='del'>-			regulator_unregister(rdev[i]);</div><div class='del'>-</div><div class='del'>-	kfree(max8997-&gt;rdev);</div><div class='del'>-	kfree(max8997);</div><div class='del'>-</div><div class='add'>+		regulator_unregister(rdev[i]);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/max8998.c b/drivers/regulator/max8998.c<br/>index 5890265eeacc..18bb58b9b96e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/max8998.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/max8998.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/max8998.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/max8998.c</a></div><div class='hunk'>@@ -28,7 +28,6 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/max8998.h&gt;</div><div class='hunk'>@@ -277,7 +276,7 @@ static int max8998_get_voltage_register(struct regulator_dev *rdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max8998_get_voltage(struct regulator_dev *rdev)</div><div class='add'>+static int max8998_get_voltage_sel(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8998_data *max8998 = rdev_get_drvdata(rdev);</div><div class='ctx'> 	struct i2c_client *i2c = max8998-&gt;iodev-&gt;i2c;</div><div class='hunk'>@@ -295,7 +294,7 @@ static int max8998_get_voltage(struct regulator_dev *rdev)</div><div class='ctx'> 	val &gt;&gt;= shift;</div><div class='ctx'> 	val &amp;= mask;</div><div class='ctx'> </div><div class='del'>-	return max8998_list_voltage(rdev, val);</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int max8998_set_voltage_ldo(struct regulator_dev *rdev,</div><div class='hunk'>@@ -306,8 +305,7 @@ static int max8998_set_voltage_ldo(struct regulator_dev *rdev,</div><div class='ctx'> 	int min_vol = min_uV / 1000, max_vol = max_uV / 1000;</div><div class='ctx'> 	const struct voltage_map_desc *desc;</div><div class='ctx'> 	int ldo = rdev_get_id(rdev);</div><div class='del'>-	int reg, shift = 0, mask, ret;</div><div class='del'>-	int i = 0;</div><div class='add'>+	int reg, shift = 0, mask, ret, i;</div><div class='ctx'> </div><div class='ctx'> 	if (ldo &gt;= ARRAY_SIZE(ldo_voltage_map))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -319,9 +317,10 @@ static int max8998_set_voltage_ldo(struct regulator_dev *rdev,</div><div class='ctx'> 	if (max_vol &lt; desc-&gt;min || min_vol &gt; desc-&gt;max)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	while (desc-&gt;min + desc-&gt;step*i &lt; min_vol &amp;&amp;</div><div class='del'>-	       desc-&gt;min + desc-&gt;step*i &lt; desc-&gt;max)</div><div class='del'>-		i++;</div><div class='add'>+	if (min_vol &lt; desc-&gt;min)</div><div class='add'>+		min_vol = desc-&gt;min;</div><div class='add'>+</div><div class='add'>+	i = DIV_ROUND_UP(min_vol - desc-&gt;min, desc-&gt;step);</div><div class='ctx'> </div><div class='ctx'> 	if (desc-&gt;min + desc-&gt;step*i &gt; max_vol)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -359,8 +358,7 @@ static int max8998_set_voltage_buck(struct regulator_dev *rdev,</div><div class='ctx'> 	const struct voltage_map_desc *desc;</div><div class='ctx'> 	int buck = rdev_get_id(rdev);</div><div class='ctx'> 	int reg, shift = 0, mask, ret;</div><div class='del'>-	int difference = 0, i = 0, j = 0, previous_vol = 0;</div><div class='del'>-	u8 val = 0;</div><div class='add'>+	int i, j, previous_sel;</div><div class='ctx'> 	static u8 buck1_last_val;</div><div class='ctx'> </div><div class='ctx'> 	if (buck &gt;= ARRAY_SIZE(ldo_voltage_map))</div><div class='hunk'>@@ -374,9 +372,10 @@ static int max8998_set_voltage_buck(struct regulator_dev *rdev,</div><div class='ctx'> 	if (max_vol &lt; desc-&gt;min || min_vol &gt; desc-&gt;max)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	while (desc-&gt;min + desc-&gt;step*i &lt; min_vol &amp;&amp;</div><div class='del'>-	       desc-&gt;min + desc-&gt;step*i &lt; desc-&gt;max)</div><div class='del'>-		i++;</div><div class='add'>+	if (min_vol &lt; desc-&gt;min)</div><div class='add'>+		min_vol = desc-&gt;min;</div><div class='add'>+</div><div class='add'>+	i = DIV_ROUND_UP(min_vol - desc-&gt;min, desc-&gt;step);</div><div class='ctx'> </div><div class='ctx'> 	if (desc-&gt;min + desc-&gt;step*i &gt; max_vol)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -387,13 +386,14 @@ static int max8998_set_voltage_buck(struct regulator_dev *rdev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	previous_vol = max8998_get_voltage(rdev);</div><div class='add'>+	previous_sel = max8998_get_voltage_sel(rdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Check if voltage needs to be changed */</div><div class='ctx'> 	/* if previous_voltage equal new voltage, return */</div><div class='del'>-	if (previous_vol == max8998_list_voltage(rdev, i)) {</div><div class='add'>+	if (previous_sel == i) {</div><div class='ctx'> 		dev_dbg(max8998-&gt;dev, "No voltage change, old:%d, new:%d\n",</div><div class='del'>-			previous_vol, max8998_list_voltage(rdev, i));</div><div class='add'>+			max8998_list_voltage(rdev, previous_sel),</div><div class='add'>+			max8998_list_voltage(rdev, i));</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -482,19 +482,40 @@ buck2_exit:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max8998_set_voltage_buck_time_sel(struct regulator_dev *rdev,</div><div class='add'>+					     unsigned int old_selector,</div><div class='add'>+					     unsigned int new_selector)</div><div class='add'>+{</div><div class='add'>+	struct max8998_data *max8998 = rdev_get_drvdata(rdev);</div><div class='add'>+	struct i2c_client *i2c = max8998-&gt;iodev-&gt;i2c;</div><div class='add'>+	const struct voltage_map_desc *desc;</div><div class='add'>+	int buck = rdev_get_id(rdev);</div><div class='add'>+	u8 val = 0;</div><div class='add'>+	int difference, ret;</div><div class='add'>+</div><div class='add'>+	if (buck &lt; MAX8998_BUCK1 || buck &gt; MAX8998_BUCK4)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	desc = ldo_voltage_map[buck];</div><div class='add'>+</div><div class='ctx'> 	/* Voltage stabilization */</div><div class='del'>-	max8998_read_reg(i2c, MAX8998_REG_ONOFF4, &amp;val);</div><div class='add'>+	ret = max8998_read_reg(i2c, MAX8998_REG_ONOFF4, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* lp3974 hasn't got ENRAMP bit - ramp is assumed as true */</div><div class='ctx'> 	/* MAX8998 has ENRAMP bit implemented, so test it*/</div><div class='ctx'> 	if (max8998-&gt;iodev-&gt;type == TYPE_MAX8998 &amp;&amp; !(val &amp; MAX8998_ENRAMP))</div><div class='del'>-		return ret;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	difference = desc-&gt;min + desc-&gt;step*i - previous_vol/1000;</div><div class='add'>+	difference = (new_selector - old_selector) * desc-&gt;step;</div><div class='ctx'> 	if (difference &gt; 0)</div><div class='del'>-		udelay(difference / ((val &amp; 0x0f) + 1));</div><div class='add'>+		return difference / ((val &amp; 0x0f) + 1);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops max8998_ldo_ops = {</div><div class='hunk'>@@ -502,7 +523,7 @@ static struct regulator_ops max8998_ldo_ops = {</div><div class='ctx'> 	.is_enabled		= max8998_ldo_is_enabled,</div><div class='ctx'> 	.enable			= max8998_ldo_enable,</div><div class='ctx'> 	.disable		= max8998_ldo_disable,</div><div class='del'>-	.get_voltage		= max8998_get_voltage,</div><div class='add'>+	.get_voltage_sel	= max8998_get_voltage_sel,</div><div class='ctx'> 	.set_voltage		= max8998_set_voltage_ldo,</div><div class='ctx'> 	.set_suspend_enable	= max8998_ldo_enable,</div><div class='ctx'> 	.set_suspend_disable	= max8998_ldo_disable,</div><div class='hunk'>@@ -513,8 +534,9 @@ static struct regulator_ops max8998_buck_ops = {</div><div class='ctx'> 	.is_enabled		= max8998_ldo_is_enabled,</div><div class='ctx'> 	.enable			= max8998_ldo_enable,</div><div class='ctx'> 	.disable		= max8998_ldo_disable,</div><div class='del'>-	.get_voltage		= max8998_get_voltage,</div><div class='add'>+	.get_voltage_sel	= max8998_get_voltage_sel,</div><div class='ctx'> 	.set_voltage		= max8998_set_voltage_buck,</div><div class='add'>+	.set_voltage_time_sel	= max8998_set_voltage_buck_time_sel,</div><div class='ctx'> 	.set_suspend_enable	= max8998_ldo_enable,</div><div class='ctx'> 	.set_suspend_disable	= max8998_ldo_disable,</div><div class='ctx'> };</div><div class='hunk'>@@ -685,6 +707,7 @@ static __devinit int max8998_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct max8998_dev *iodev = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct max8998_platform_data *pdata = dev_get_platdata(iodev-&gt;dev);</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct regulator_dev **rdev;</div><div class='ctx'> 	struct max8998_data *max8998;</div><div class='ctx'> 	struct i2c_client *i2c;</div><div class='hunk'>@@ -695,16 +718,15 @@ static __devinit int max8998_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	max8998 = kzalloc(sizeof(struct max8998_data), GFP_KERNEL);</div><div class='add'>+	max8998 = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct max8998_data),</div><div class='add'>+			       GFP_KERNEL);</div><div class='ctx'> 	if (!max8998)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	size = sizeof(struct regulator_dev *) * pdata-&gt;num_regulators;</div><div class='del'>-	max8998-&gt;rdev = kzalloc(size, GFP_KERNEL);</div><div class='del'>-	if (!max8998-&gt;rdev) {</div><div class='del'>-		kfree(max8998);</div><div class='add'>+	max8998-&gt;rdev = devm_kzalloc(&amp;pdev-&gt;dev, size, GFP_KERNEL);</div><div class='add'>+	if (!max8998-&gt;rdev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	rdev = max8998-&gt;rdev;</div><div class='ctx'> 	max8998-&gt;dev = &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -728,14 +750,14 @@ static __devinit int max8998_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 			printk(KERN_ERR "MAX8998 SET1 GPIO defined as 0 !\n");</div><div class='ctx'> 			WARN_ON(!pdata-&gt;buck1_set1);</div><div class='ctx'> 			ret = -EIO;</div><div class='del'>-			goto err_free_mem;</div><div class='add'>+			goto err_out;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Check if SET2 is not equal to 0 */</div><div class='ctx'> 		if (!pdata-&gt;buck1_set2) {</div><div class='ctx'> 			printk(KERN_ERR "MAX8998 SET2 GPIO defined as 0 !\n");</div><div class='ctx'> 			WARN_ON(!pdata-&gt;buck1_set2);</div><div class='ctx'> 			ret = -EIO;</div><div class='del'>-			goto err_free_mem;</div><div class='add'>+			goto err_out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		gpio_request(pdata-&gt;buck1_set1, "MAX8998 BUCK1_SET1");</div><div class='hunk'>@@ -755,7 +777,7 @@ static __devinit int max8998_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 		max8998-&gt;buck1_vol[0] = i;</div><div class='ctx'> 		ret = max8998_write_reg(i2c, MAX8998_REG_BUCK1_VOLTAGE1, i);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto err_free_mem;</div><div class='add'>+			goto err_out;</div><div class='ctx'> </div><div class='ctx'> 		/* Set predefined value for BUCK1 register 2 */</div><div class='ctx'> 		i = 0;</div><div class='hunk'>@@ -767,7 +789,7 @@ static __devinit int max8998_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 		max8998-&gt;buck1_vol[1] = i;</div><div class='ctx'> 		ret = max8998_write_reg(i2c, MAX8998_REG_BUCK1_VOLTAGE2, i);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto err_free_mem;</div><div class='add'>+			goto err_out;</div><div class='ctx'> </div><div class='ctx'> 		/* Set predefined value for BUCK1 register 3 */</div><div class='ctx'> 		i = 0;</div><div class='hunk'>@@ -779,7 +801,7 @@ static __devinit int max8998_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 		max8998-&gt;buck1_vol[2] = i;</div><div class='ctx'> 		ret = max8998_write_reg(i2c, MAX8998_REG_BUCK1_VOLTAGE3, i);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto err_free_mem;</div><div class='add'>+			goto err_out;</div><div class='ctx'> </div><div class='ctx'> 		/* Set predefined value for BUCK1 register 4 */</div><div class='ctx'> 		i = 0;</div><div class='hunk'>@@ -791,7 +813,7 @@ static __devinit int max8998_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 		max8998-&gt;buck1_vol[3] = i;</div><div class='ctx'> 		ret = max8998_write_reg(i2c, MAX8998_REG_BUCK1_VOLTAGE4, i);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto err_free_mem;</div><div class='add'>+			goto err_out;</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -801,7 +823,7 @@ static __devinit int max8998_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 			printk(KERN_ERR "MAX8998 SET3 GPIO defined as 0 !\n");</div><div class='ctx'> 			WARN_ON(!pdata-&gt;buck2_set3);</div><div class='ctx'> 			ret = -EIO;</div><div class='del'>-			goto err_free_mem;</div><div class='add'>+			goto err_out;</div><div class='ctx'> 		}</div><div class='ctx'> 		gpio_request(pdata-&gt;buck2_set3, "MAX8998 BUCK2_SET3");</div><div class='ctx'> 		gpio_direction_output(pdata-&gt;buck2_set3,</div><div class='hunk'>@@ -816,7 +838,7 @@ static __devinit int max8998_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 		max8998-&gt;buck2_vol[0] = i;</div><div class='ctx'> 		ret = max8998_write_reg(i2c, MAX8998_REG_BUCK2_VOLTAGE1, i);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto err_free_mem;</div><div class='add'>+			goto err_out;</div><div class='ctx'> </div><div class='ctx'> 		/* BUCK2 register 2 */</div><div class='ctx'> 		i = 0;</div><div class='hunk'>@@ -827,7 +849,7 @@ static __devinit int max8998_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 		max8998-&gt;buck2_vol[1] = i;</div><div class='ctx'> 		ret = max8998_write_reg(i2c, MAX8998_REG_BUCK2_VOLTAGE2, i);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto err_free_mem;</div><div class='add'>+			goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;num_regulators; i++) {</div><div class='hunk'>@@ -840,8 +862,12 @@ static __devinit int max8998_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 			int count = (desc-&gt;max - desc-&gt;min) / desc-&gt;step + 1;</div><div class='ctx'> 			regulators[index].n_voltages = count;</div><div class='ctx'> 		}</div><div class='del'>-		rdev[i] = regulator_register(&amp;regulators[index], max8998-&gt;dev,</div><div class='del'>-				pdata-&gt;regulators[i].initdata, max8998, NULL);</div><div class='add'>+</div><div class='add'>+		config.dev = max8998-&gt;dev;</div><div class='add'>+		config.init_data = pdata-&gt;regulators[i].initdata;</div><div class='add'>+		config.driver_data = max8998;</div><div class='add'>+</div><div class='add'>+		rdev[i] = regulator_register(&amp;regulators[index], &amp;config);</div><div class='ctx'> 		if (IS_ERR(rdev[i])) {</div><div class='ctx'> 			ret = PTR_ERR(rdev[i]);</div><div class='ctx'> 			dev_err(max8998-&gt;dev, "regulator init failed\n");</div><div class='hunk'>@@ -853,14 +879,9 @@ static __devinit int max8998_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> err:</div><div class='del'>-	for (i = 0; i &lt; max8998-&gt;num_regulators; i++)</div><div class='del'>-		if (rdev[i])</div><div class='del'>-			regulator_unregister(rdev[i]);</div><div class='del'>-</div><div class='del'>-err_free_mem:</div><div class='del'>-	kfree(max8998-&gt;rdev);</div><div class='del'>-	kfree(max8998);</div><div class='del'>-</div><div class='add'>+	while (--i &gt;= 0)</div><div class='add'>+		regulator_unregister(rdev[i]);</div><div class='add'>+err_out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -871,12 +892,7 @@ static int __devexit max8998_pmic_remove(struct platform_device *pdev)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; max8998-&gt;num_regulators; i++)</div><div class='del'>-		if (rdev[i])</div><div class='del'>-			regulator_unregister(rdev[i]);</div><div class='del'>-</div><div class='del'>-	kfree(max8998-&gt;rdev);</div><div class='del'>-	kfree(max8998);</div><div class='del'>-</div><div class='add'>+		regulator_unregister(rdev[i]);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/mc13783-regulator.c b/drivers/regulator/mc13783-regulator.c<br/>index 6c0face87ffe..7dcdfa283e93 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/mc13783-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/mc13783-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/mc13783-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/mc13783-regulator.c</a></div><div class='hunk'>@@ -340,6 +340,7 @@ static int __devinit mc13783_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct mc13xxx_regulator_platform_data *pdata =</div><div class='ctx'> 		dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='ctx'> 	struct mc13xxx_regulator_init_data *init_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "%s id %d\n", __func__, pdev-&gt;id);</div><div class='hunk'>@@ -357,11 +358,16 @@ static int __devinit mc13783_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	priv-&gt;mc13xxx = mc13783;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;num_regulators; i++) {</div><div class='add'>+		struct regulator_desc *desc;</div><div class='add'>+</div><div class='ctx'> 		init_data = &amp;pdata-&gt;regulators[i];</div><div class='del'>-		priv-&gt;regulators[i] = regulator_register(</div><div class='del'>-				&amp;mc13783_regulators[init_data-&gt;id].desc,</div><div class='del'>-				&amp;pdev-&gt;dev, init_data-&gt;init_data, priv, NULL);</div><div class='add'>+		desc = &amp;mc13783_regulators[init_data-&gt;id].desc;</div><div class='add'>+</div><div class='add'>+		config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+		config.init_data = init_data-&gt;init_data;</div><div class='add'>+		config.driver_data = priv;</div><div class='ctx'> </div><div class='add'>+		priv-&gt;regulators[i] = regulator_register(desc, &amp;config);</div><div class='ctx'> 		if (IS_ERR(priv-&gt;regulators[i])) {</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev, "failed to register regulator %s\n",</div><div class='ctx'> 				mc13783_regulators[i].desc.name);</div><div class='head'>diff --git a/drivers/regulator/mc13892-regulator.c b/drivers/regulator/mc13892-regulator.c<br/>index 845aa2263b8a..970a233dbe46 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/mc13892-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/mc13892-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/mc13892-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/mc13892-regulator.c</a></div><div class='hunk'>@@ -428,24 +428,15 @@ static int mc13892_sw_regulator_get_voltage(struct regulator_dev *rdev)</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mc13892_sw_regulator_set_voltage(struct regulator_dev *rdev,</div><div class='del'>-		int min_uV, int max_uV, unsigned *selector)</div><div class='add'>+static int mc13892_sw_regulator_set_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+						unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);</div><div class='ctx'> 	int hi, value, mask, id = rdev_get_id(rdev);</div><div class='ctx'> 	u32 valread;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	dev_dbg(rdev_get_dev(rdev), "%s id: %d min_uV: %d max_uV: %d\n",</div><div class='del'>-		__func__, id, min_uV, max_uV);</div><div class='del'>-</div><div class='del'>-	/* Find the best index */</div><div class='del'>-	value = mc13xxx_get_best_voltage_index(rdev, min_uV, max_uV);</div><div class='del'>-	dev_dbg(rdev_get_dev(rdev), "%s best value: %d\n", __func__, value);</div><div class='del'>-	if (value &lt; 0)</div><div class='del'>-		return value;</div><div class='del'>-</div><div class='del'>-	value = mc13892_regulators[id].voltages[value];</div><div class='add'>+	value = mc13892_regulators[id].voltages[selector];</div><div class='ctx'> </div><div class='ctx'> 	mc13xxx_lock(priv-&gt;mc13xxx);</div><div class='ctx'> 	ret = mc13xxx_reg_read(priv-&gt;mc13xxx,</div><div class='hunk'>@@ -480,7 +471,7 @@ err:</div><div class='ctx'> static struct regulator_ops mc13892_sw_regulator_ops = {</div><div class='ctx'> 	.is_enabled = mc13xxx_sw_regulator_is_enabled,</div><div class='ctx'> 	.list_voltage = mc13xxx_regulator_list_voltage,</div><div class='del'>-	.set_voltage = mc13892_sw_regulator_set_voltage,</div><div class='add'>+	.set_voltage_sel = mc13892_sw_regulator_set_voltage_sel,</div><div class='ctx'> 	.get_voltage = mc13892_sw_regulator_get_voltage,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -528,6 +519,7 @@ static int __devinit mc13892_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct mc13xxx_regulator_platform_data *pdata =</div><div class='ctx'> 		dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='ctx'> 	struct mc13xxx_regulator_init_data *mc13xxx_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> 	int num_regulators = 0;</div><div class='ctx'> 	u32 val;</div><div class='hunk'>@@ -597,9 +589,12 @@ static int __devinit mc13892_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 		desc = &amp;mc13892_regulators[id].desc;</div><div class='ctx'> </div><div class='del'>-		priv-&gt;regulators[i] = regulator_register(</div><div class='del'>-			desc, &amp;pdev-&gt;dev, init_data, priv, node);</div><div class='add'>+		config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+		config.init_data = init_data;</div><div class='add'>+		config.driver_data = priv;</div><div class='add'>+		config.of_node = node;</div><div class='ctx'> </div><div class='add'>+		priv-&gt;regulators[i] = regulator_register(desc, &amp;config);</div><div class='ctx'> 		if (IS_ERR(priv-&gt;regulators[i])) {</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev, "failed to register regulator %s\n",</div><div class='ctx'> 				mc13892_regulators[i].desc.name);</div><div class='head'>diff --git a/drivers/regulator/mc13xxx-regulator-core.c b/drivers/regulator/mc13xxx-regulator-core.c<br/>index 62dcd0a432bb..4fa9704739bc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/mc13xxx-regulator-core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/mc13xxx-regulator-core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/mc13xxx-regulator-core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/mc13xxx-regulator-core.c</a></div><div class='hunk'>@@ -94,62 +94,18 @@ int mc13xxx_regulator_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(mc13xxx_regulator_list_voltage);</div><div class='ctx'> </div><div class='del'>-int mc13xxx_get_best_voltage_index(struct regulator_dev *rdev,</div><div class='del'>-						int min_uV, int max_uV)</div><div class='add'>+static int mc13xxx_regulator_set_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+					     unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);</div><div class='ctx'> 	struct mc13xxx_regulator *mc13xxx_regulators = priv-&gt;mc13xxx_regulators;</div><div class='del'>-	int reg_id = rdev_get_id(rdev);</div><div class='del'>-	int i;</div><div class='del'>-	int bestmatch;</div><div class='del'>-	int bestindex;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Locate the minimum voltage fitting the criteria on</div><div class='del'>-	 * this regulator. The switchable voltages are not</div><div class='del'>-	 * in strict falling order so we need to check them</div><div class='del'>-	 * all for the best match.</div><div class='del'>-	 */</div><div class='del'>-	bestmatch = INT_MAX;</div><div class='del'>-	bestindex = -1;</div><div class='del'>-	for (i = 0; i &lt; mc13xxx_regulators[reg_id].desc.n_voltages; i++) {</div><div class='del'>-		if (mc13xxx_regulators[reg_id].voltages[i] &gt;= min_uV &amp;&amp;</div><div class='del'>-		    mc13xxx_regulators[reg_id].voltages[i] &lt; bestmatch) {</div><div class='del'>-			bestmatch = mc13xxx_regulators[reg_id].voltages[i];</div><div class='del'>-			bestindex = i;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (bestindex &lt; 0 || bestmatch &gt; max_uV) {</div><div class='del'>-		dev_warn(&amp;rdev-&gt;dev, "no possible value for %d&lt;=x&lt;=%d uV\n",</div><div class='del'>-				min_uV, max_uV);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	return bestindex;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(mc13xxx_get_best_voltage_index);</div><div class='del'>-</div><div class='del'>-static int mc13xxx_regulator_set_voltage(struct regulator_dev *rdev, int min_uV,</div><div class='del'>-		int max_uV, unsigned *selector)</div><div class='del'>-{</div><div class='del'>-	struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);</div><div class='del'>-	struct mc13xxx_regulator *mc13xxx_regulators = priv-&gt;mc13xxx_regulators;</div><div class='del'>-	int value, id = rdev_get_id(rdev);</div><div class='add'>+	int id = rdev_get_id(rdev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	dev_dbg(rdev_get_dev(rdev), "%s id: %d min_uV: %d max_uV: %d\n",</div><div class='del'>-		__func__, id, min_uV, max_uV);</div><div class='del'>-</div><div class='del'>-	/* Find the best index */</div><div class='del'>-	value = mc13xxx_get_best_voltage_index(rdev, min_uV, max_uV);</div><div class='del'>-	dev_dbg(rdev_get_dev(rdev), "%s best value: %d\n", __func__, value);</div><div class='del'>-	if (value &lt; 0)</div><div class='del'>-		return value;</div><div class='del'>-</div><div class='ctx'> 	mc13xxx_lock(priv-&gt;mc13xxx);</div><div class='ctx'> 	ret = mc13xxx_reg_rmw(priv-&gt;mc13xxx, mc13xxx_regulators[id].vsel_reg,</div><div class='ctx'> 			mc13xxx_regulators[id].vsel_mask,</div><div class='del'>-			value &lt;&lt; mc13xxx_regulators[id].vsel_shift);</div><div class='add'>+			selector &lt;&lt; mc13xxx_regulators[id].vsel_shift);</div><div class='ctx'> 	mc13xxx_unlock(priv-&gt;mc13xxx);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -187,7 +143,7 @@ struct regulator_ops mc13xxx_regulator_ops = {</div><div class='ctx'> 	.disable = mc13xxx_regulator_disable,</div><div class='ctx'> 	.is_enabled = mc13xxx_regulator_is_enabled,</div><div class='ctx'> 	.list_voltage = mc13xxx_regulator_list_voltage,</div><div class='del'>-	.set_voltage = mc13xxx_regulator_set_voltage,</div><div class='add'>+	.set_voltage_sel = mc13xxx_regulator_set_voltage_sel,</div><div class='ctx'> 	.get_voltage = mc13xxx_regulator_get_voltage,</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL_GPL(mc13xxx_regulator_ops);</div><div class='head'>diff --git a/drivers/regulator/mc13xxx.h b/drivers/regulator/mc13xxx.h<br/>index b3961c658b05..044aba4d28ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/mc13xxx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/mc13xxx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/mc13xxx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/mc13xxx.h</a></div><div class='hunk'>@@ -35,8 +35,6 @@ struct mc13xxx_regulator_priv {</div><div class='ctx'> </div><div class='ctx'> extern int mc13xxx_sw_regulator(struct regulator_dev *rdev);</div><div class='ctx'> extern int mc13xxx_sw_regulator_is_enabled(struct regulator_dev *rdev);</div><div class='del'>-extern int mc13xxx_get_best_voltage_index(struct regulator_dev *rdev,</div><div class='del'>-						int min_uV, int max_uV);</div><div class='ctx'> extern int mc13xxx_regulator_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 						unsigned selector);</div><div class='ctx'> extern int mc13xxx_fixed_regulator_set_voltage(struct regulator_dev *rdev,</div><div class='head'>diff --git a/drivers/regulator/of_regulator.c b/drivers/regulator/of_regulator.c<br/>index 679734d26a16..56593b75168a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/of_regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/of_regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/of_regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/of_regulator.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='add'>+#include &lt;linux/regulator/of_regulator.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void of_get_regulation_constraints(struct device_node *np,</div><div class='ctx'> 					struct regulator_init_data **init_data)</div><div class='hunk'>@@ -85,3 +86,49 @@ struct regulator_init_data *of_get_regulator_init_data(struct device *dev,</div><div class='ctx'> 	return init_data;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(of_get_regulator_init_data);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * of_regulator_match - extract regulator init data</div><div class='add'>+ * @dev: device requesting the data</div><div class='add'>+ * @node: parent device node of the regulators</div><div class='add'>+ * @matches: match table for the regulators</div><div class='add'>+ * @num_matches: number of entries in match table</div><div class='add'>+ *</div><div class='add'>+ * This function uses a match table specified by the regulator driver and</div><div class='add'>+ * looks up the corresponding init data in the device tree. Note that the</div><div class='add'>+ * match table is modified in place.</div><div class='add'>+ *</div><div class='add'>+ * Returns the number of matches found or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int of_regulator_match(struct device *dev, struct device_node *node,</div><div class='add'>+		       struct of_regulator_match *matches,</div><div class='add'>+		       unsigned int num_matches)</div><div class='add'>+{</div><div class='add'>+	unsigned int count = 0;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	if (!dev || !node)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_matches; i++) {</div><div class='add'>+		struct of_regulator_match *match = &amp;matches[i];</div><div class='add'>+		struct device_node *child;</div><div class='add'>+</div><div class='add'>+		child = of_find_node_by_name(node, match-&gt;name);</div><div class='add'>+		if (!child)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		match-&gt;init_data = of_get_regulator_init_data(dev, child);</div><div class='add'>+		if (!match-&gt;init_data) {</div><div class='add'>+			dev_err(dev, "failed to parse DT for regulator %s\n",</div><div class='add'>+				child-&gt;name);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		match-&gt;of_node = child;</div><div class='add'>+		count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(of_regulator_match);</div><div class='head'>diff --git a/drivers/regulator/palmas-regulator.c b/drivers/regulator/palmas-regulator.c<br/>new file mode 100644<br/>index 000000000000..c4435f608df7<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/palmas-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/palmas-regulator.c</a></div><div class='hunk'>@@ -0,0 +1,822 @@</div><div class='add'>+/*</div><div class='add'>+ * Driver for Regulator part of Palmas PMIC Chips</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2011-2012 Texas Instruments Inc.</div><div class='add'>+ *</div><div class='add'>+ * Author: Graeme Gregory &lt;gg@slimlogic.co.uk&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ *  under  the terms of the GNU General  Public License as published by the</div><div class='add'>+ *  Free Software Foundation;  either version 2 of the License, or (at your</div><div class='add'>+ *  option) any later version.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regulator/driver.h&gt;</div><div class='add'>+#include &lt;linux/regulator/machine.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/mfd/palmas.h&gt;</div><div class='add'>+</div><div class='add'>+struct regs_info {</div><div class='add'>+	char	*name;</div><div class='add'>+	u8	vsel_addr;</div><div class='add'>+	u8	ctrl_addr;</div><div class='add'>+	u8	tstep_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regs_info palmas_regs_info[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "SMPS12",</div><div class='add'>+		.vsel_addr	= PALMAS_SMPS12_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_SMPS12_CTRL,</div><div class='add'>+		.tstep_addr	= PALMAS_SMPS12_TSTEP,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "SMPS123",</div><div class='add'>+		.vsel_addr	= PALMAS_SMPS12_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_SMPS12_CTRL,</div><div class='add'>+		.tstep_addr	= PALMAS_SMPS12_TSTEP,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "SMPS3",</div><div class='add'>+		.vsel_addr	= PALMAS_SMPS3_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_SMPS3_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "SMPS45",</div><div class='add'>+		.vsel_addr	= PALMAS_SMPS45_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_SMPS45_CTRL,</div><div class='add'>+		.tstep_addr	= PALMAS_SMPS45_TSTEP,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "SMPS457",</div><div class='add'>+		.vsel_addr	= PALMAS_SMPS45_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_SMPS45_CTRL,</div><div class='add'>+		.tstep_addr	= PALMAS_SMPS45_TSTEP,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "SMPS6",</div><div class='add'>+		.vsel_addr	= PALMAS_SMPS6_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_SMPS6_CTRL,</div><div class='add'>+		.tstep_addr	= PALMAS_SMPS6_TSTEP,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "SMPS7",</div><div class='add'>+		.vsel_addr	= PALMAS_SMPS7_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_SMPS7_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "SMPS8",</div><div class='add'>+		.vsel_addr	= PALMAS_SMPS8_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_SMPS8_CTRL,</div><div class='add'>+		.tstep_addr	= PALMAS_SMPS8_TSTEP,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "SMPS9",</div><div class='add'>+		.vsel_addr	= PALMAS_SMPS9_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_SMPS9_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "SMPS10",</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "LDO1",</div><div class='add'>+		.vsel_addr	= PALMAS_LDO1_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_LDO1_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "LDO2",</div><div class='add'>+		.vsel_addr	= PALMAS_LDO2_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_LDO2_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "LDO3",</div><div class='add'>+		.vsel_addr	= PALMAS_LDO3_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_LDO3_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "LDO4",</div><div class='add'>+		.vsel_addr	= PALMAS_LDO4_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_LDO4_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "LDO5",</div><div class='add'>+		.vsel_addr	= PALMAS_LDO5_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_LDO5_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "LDO6",</div><div class='add'>+		.vsel_addr	= PALMAS_LDO6_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_LDO6_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "LDO7",</div><div class='add'>+		.vsel_addr	= PALMAS_LDO7_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_LDO7_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "LDO8",</div><div class='add'>+		.vsel_addr	= PALMAS_LDO8_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_LDO8_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "LDO9",</div><div class='add'>+		.vsel_addr	= PALMAS_LDO9_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_LDO9_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "LDOLN",</div><div class='add'>+		.vsel_addr	= PALMAS_LDOLN_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_LDOLN_CTRL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "LDOUSB",</div><div class='add'>+		.vsel_addr	= PALMAS_LDOUSB_VOLTAGE,</div><div class='add'>+		.ctrl_addr	= PALMAS_LDOUSB_CTRL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define SMPS_CTRL_MODE_OFF		0x00</div><div class='add'>+#define SMPS_CTRL_MODE_ON		0x01</div><div class='add'>+#define SMPS_CTRL_MODE_ECO		0x02</div><div class='add'>+#define SMPS_CTRL_MODE_PWM		0x03</div><div class='add'>+</div><div class='add'>+/* These values are derived from the data sheet. And are the number of steps</div><div class='add'>+ * where there is a voltage change, the ranges at beginning and end of register</div><div class='add'>+ * max/min values where there are no change are ommitted.</div><div class='add'>+ *</div><div class='add'>+ * So they are basically (maxV-minV)/stepV</div><div class='add'>+ */</div><div class='add'>+#define PALMAS_SMPS_NUM_VOLTAGES	116</div><div class='add'>+#define PALMAS_SMPS10_NUM_VOLTAGES	2</div><div class='add'>+#define PALMAS_LDO_NUM_VOLTAGES		50</div><div class='add'>+</div><div class='add'>+#define SMPS10_VSEL			(1&lt;&lt;3)</div><div class='add'>+#define SMPS10_BOOST_EN			(1&lt;&lt;2)</div><div class='add'>+#define SMPS10_BYPASS_EN		(1&lt;&lt;1)</div><div class='add'>+#define SMPS10_SWITCH_EN		(1&lt;&lt;0)</div><div class='add'>+</div><div class='add'>+#define REGULATOR_SLAVE			0</div><div class='add'>+</div><div class='add'>+static int palmas_smps_read(struct palmas *palmas, unsigned int reg,</div><div class='add'>+		unsigned int *dest)</div><div class='add'>+{</div><div class='add'>+	unsigned int addr;</div><div class='add'>+</div><div class='add'>+	addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);</div><div class='add'>+</div><div class='add'>+	return regmap_read(palmas-&gt;regmap[REGULATOR_SLAVE], addr, dest);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_smps_write(struct palmas *palmas, unsigned int reg,</div><div class='add'>+		unsigned int value)</div><div class='add'>+{</div><div class='add'>+	unsigned int addr;</div><div class='add'>+</div><div class='add'>+	addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);</div><div class='add'>+</div><div class='add'>+	return regmap_write(palmas-&gt;regmap[REGULATOR_SLAVE], addr, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,</div><div class='add'>+		unsigned int *dest)</div><div class='add'>+{</div><div class='add'>+	unsigned int addr;</div><div class='add'>+</div><div class='add'>+	addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);</div><div class='add'>+</div><div class='add'>+	return regmap_read(palmas-&gt;regmap[REGULATOR_SLAVE], addr, dest);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,</div><div class='add'>+		unsigned int value)</div><div class='add'>+{</div><div class='add'>+	unsigned int addr;</div><div class='add'>+</div><div class='add'>+	addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);</div><div class='add'>+</div><div class='add'>+	return regmap_write(palmas-&gt;regmap[REGULATOR_SLAVE], addr, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_is_enabled_smps(struct regulator_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct palmas_pmic *pmic = rdev_get_drvdata(dev);</div><div class='add'>+	int id = rdev_get_id(dev);</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	palmas_smps_read(pmic-&gt;palmas, palmas_regs_info[id].ctrl_addr, &amp;reg);</div><div class='add'>+</div><div class='add'>+	reg &amp;= PALMAS_SMPS12_CTRL_STATUS_MASK;</div><div class='add'>+	reg &gt;&gt;= PALMAS_SMPS12_CTRL_STATUS_SHIFT;</div><div class='add'>+</div><div class='add'>+	return !!(reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_enable_smps(struct regulator_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct palmas_pmic *pmic = rdev_get_drvdata(dev);</div><div class='add'>+	int id = rdev_get_id(dev);</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	palmas_smps_read(pmic-&gt;palmas, palmas_regs_info[id].ctrl_addr, &amp;reg);</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;</div><div class='add'>+	reg |= SMPS_CTRL_MODE_ON;</div><div class='add'>+</div><div class='add'>+	palmas_smps_write(pmic-&gt;palmas, palmas_regs_info[id].ctrl_addr, reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_disable_smps(struct regulator_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct palmas_pmic *pmic = rdev_get_drvdata(dev);</div><div class='add'>+	int id = rdev_get_id(dev);</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	palmas_smps_read(pmic-&gt;palmas, palmas_regs_info[id].ctrl_addr, &amp;reg);</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;</div><div class='add'>+</div><div class='add'>+	palmas_smps_write(pmic-&gt;palmas, palmas_regs_info[id].ctrl_addr, reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)</div><div class='add'>+{</div><div class='add'>+	struct palmas_pmic *pmic = rdev_get_drvdata(dev);</div><div class='add'>+	int id = rdev_get_id(dev);</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	palmas_smps_read(pmic-&gt;palmas, palmas_regs_info[id].ctrl_addr, &amp;reg);</div><div class='add'>+	reg &amp;= ~PALMAS_SMPS12_CTRL_STATUS_MASK;</div><div class='add'>+	reg &gt;&gt;= PALMAS_SMPS12_CTRL_STATUS_SHIFT;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case REGULATOR_MODE_NORMAL:</div><div class='add'>+		reg |= SMPS_CTRL_MODE_ON;</div><div class='add'>+		break;</div><div class='add'>+	case REGULATOR_MODE_IDLE:</div><div class='add'>+		reg |= SMPS_CTRL_MODE_ECO;</div><div class='add'>+		break;</div><div class='add'>+	case REGULATOR_MODE_FAST:</div><div class='add'>+		reg |= SMPS_CTRL_MODE_PWM;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	palmas_smps_write(pmic-&gt;palmas, palmas_regs_info[id].ctrl_addr, reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct palmas_pmic *pmic = rdev_get_drvdata(dev);</div><div class='add'>+	int id = rdev_get_id(dev);</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	palmas_smps_read(pmic-&gt;palmas, palmas_regs_info[id].ctrl_addr, &amp;reg);</div><div class='add'>+	reg &amp;= PALMAS_SMPS12_CTRL_STATUS_MASK;</div><div class='add'>+	reg &gt;&gt;= PALMAS_SMPS12_CTRL_STATUS_SHIFT;</div><div class='add'>+</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case SMPS_CTRL_MODE_ON:</div><div class='add'>+		return REGULATOR_MODE_NORMAL;</div><div class='add'>+	case SMPS_CTRL_MODE_ECO:</div><div class='add'>+		return REGULATOR_MODE_IDLE;</div><div class='add'>+	case SMPS_CTRL_MODE_PWM:</div><div class='add'>+		return REGULATOR_MODE_FAST;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_list_voltage_smps(struct regulator_dev *dev,</div><div class='add'>+					unsigned selector)</div><div class='add'>+{</div><div class='add'>+	struct palmas_pmic *pmic = rdev_get_drvdata(dev);</div><div class='add'>+	int id = rdev_get_id(dev);</div><div class='add'>+	int mult = 1;</div><div class='add'>+</div><div class='add'>+	if (!selector)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Read the multiplier set in VSEL register to return</div><div class='add'>+	 * the correct voltage.</div><div class='add'>+	 */</div><div class='add'>+	if (pmic-&gt;range[id])</div><div class='add'>+		mult = 2;</div><div class='add'>+</div><div class='add'>+	/* Voltage is (0.49V + (selector * 0.01V)) * RANGE</div><div class='add'>+	 * as defined in data sheet. RANGE is either x1 or x2</div><div class='add'>+	 */</div><div class='add'>+	return  (490000 + (selector * 10000)) * mult;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_get_voltage_smps_sel(struct regulator_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct palmas_pmic *pmic = rdev_get_drvdata(dev);</div><div class='add'>+	int id = rdev_get_id(dev);</div><div class='add'>+	int selector;</div><div class='add'>+	unsigned int reg;</div><div class='add'>+	unsigned int addr;</div><div class='add'>+</div><div class='add'>+	addr = palmas_regs_info[id].vsel_addr;</div><div class='add'>+</div><div class='add'>+	palmas_smps_read(pmic-&gt;palmas, addr, &amp;reg);</div><div class='add'>+</div><div class='add'>+	selector = reg &amp; PALMAS_SMPS12_VOLTAGE_VSEL_MASK;</div><div class='add'>+</div><div class='add'>+	/* Adjust selector to match list_voltage ranges */</div><div class='add'>+	if ((selector &gt; 0) &amp;&amp; (selector &lt; 6))</div><div class='add'>+		selector = 6;</div><div class='add'>+	if (!selector)</div><div class='add'>+		selector = 5;</div><div class='add'>+	if (selector &gt; 121)</div><div class='add'>+		selector = 121;</div><div class='add'>+	selector -= 5;</div><div class='add'>+</div><div class='add'>+	return selector;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_set_voltage_smps_sel(struct regulator_dev *dev,</div><div class='add'>+		unsigned selector)</div><div class='add'>+{</div><div class='add'>+	struct palmas_pmic *pmic = rdev_get_drvdata(dev);</div><div class='add'>+	int id = rdev_get_id(dev);</div><div class='add'>+	unsigned int reg = 0;</div><div class='add'>+	unsigned int addr;</div><div class='add'>+</div><div class='add'>+	addr = palmas_regs_info[id].vsel_addr;</div><div class='add'>+</div><div class='add'>+	/* Make sure we don't change the value of RANGE */</div><div class='add'>+	if (pmic-&gt;range[id])</div><div class='add'>+		reg |= PALMAS_SMPS12_VOLTAGE_RANGE;</div><div class='add'>+</div><div class='add'>+	/* Adjust the linux selector into range used in VSEL register */</div><div class='add'>+	if (selector)</div><div class='add'>+		reg |= selector + 5;</div><div class='add'>+</div><div class='add'>+	palmas_smps_write(pmic-&gt;palmas, addr, reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_map_voltage_smps(struct regulator_dev *rdev,</div><div class='add'>+		int min_uV, int max_uV)</div><div class='add'>+{</div><div class='add'>+	int ret, voltage;</div><div class='add'>+</div><div class='add'>+	ret = ((min_uV - 500000) / 10000) + 1;</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Map back into a voltage to verify we're still in bounds */</div><div class='add'>+	voltage = palmas_list_voltage_smps(rdev, ret);</div><div class='add'>+	if (voltage &lt; min_uV || voltage &gt; max_uV)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct regulator_ops palmas_ops_smps = {</div><div class='add'>+	.is_enabled		= palmas_is_enabled_smps,</div><div class='add'>+	.enable			= palmas_enable_smps,</div><div class='add'>+	.disable		= palmas_disable_smps,</div><div class='add'>+	.set_mode		= palmas_set_mode_smps,</div><div class='add'>+	.get_mode		= palmas_get_mode_smps,</div><div class='add'>+	.get_voltage_sel	= palmas_get_voltage_smps_sel,</div><div class='add'>+	.set_voltage_sel	= palmas_set_voltage_smps_sel,</div><div class='add'>+	.list_voltage		= palmas_list_voltage_smps,</div><div class='add'>+	.map_voltage		= palmas_map_voltage_smps,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int palmas_list_voltage_smps10(struct regulator_dev *dev,</div><div class='add'>+					unsigned selector)</div><div class='add'>+{</div><div class='add'>+	return 3750000 + (selector * 1250000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct regulator_ops palmas_ops_smps10 = {</div><div class='add'>+	.is_enabled		= regulator_is_enabled_regmap,</div><div class='add'>+	.enable			= regulator_enable_regmap,</div><div class='add'>+	.disable		= regulator_disable_regmap,</div><div class='add'>+	.get_voltage_sel	= regulator_get_voltage_sel_regmap,</div><div class='add'>+	.set_voltage_sel	= regulator_set_voltage_sel_regmap,</div><div class='add'>+	.list_voltage		= palmas_list_voltage_smps10,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int palmas_is_enabled_ldo(struct regulator_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct palmas_pmic *pmic = rdev_get_drvdata(dev);</div><div class='add'>+	int id = rdev_get_id(dev);</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	palmas_ldo_read(pmic-&gt;palmas, palmas_regs_info[id].ctrl_addr, &amp;reg);</div><div class='add'>+</div><div class='add'>+	reg &amp;= PALMAS_LDO1_CTRL_STATUS;</div><div class='add'>+</div><div class='add'>+	return !!(reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_list_voltage_ldo(struct regulator_dev *dev,</div><div class='add'>+					unsigned selector)</div><div class='add'>+{</div><div class='add'>+	if (!selector)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* voltage is 0.85V + (selector * 0.05v) */</div><div class='add'>+	return  850000 + (selector * 50000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_get_voltage_ldo_sel(struct regulator_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct palmas_pmic *pmic = rdev_get_drvdata(dev);</div><div class='add'>+	int id = rdev_get_id(dev);</div><div class='add'>+	int selector;</div><div class='add'>+	unsigned int reg;</div><div class='add'>+	unsigned int addr;</div><div class='add'>+</div><div class='add'>+	addr = palmas_regs_info[id].vsel_addr;</div><div class='add'>+</div><div class='add'>+	palmas_ldo_read(pmic-&gt;palmas, addr, &amp;reg);</div><div class='add'>+</div><div class='add'>+	selector = reg &amp; PALMAS_LDO1_VOLTAGE_VSEL_MASK;</div><div class='add'>+</div><div class='add'>+	/* Adjust selector to match list_voltage ranges */</div><div class='add'>+	if (selector &gt; 49)</div><div class='add'>+		selector = 49;</div><div class='add'>+</div><div class='add'>+	return selector;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_set_voltage_ldo_sel(struct regulator_dev *dev,</div><div class='add'>+		unsigned selector)</div><div class='add'>+{</div><div class='add'>+	struct palmas_pmic *pmic = rdev_get_drvdata(dev);</div><div class='add'>+	int id = rdev_get_id(dev);</div><div class='add'>+	unsigned int reg = 0;</div><div class='add'>+	unsigned int addr;</div><div class='add'>+</div><div class='add'>+	addr = palmas_regs_info[id].vsel_addr;</div><div class='add'>+</div><div class='add'>+	reg = selector;</div><div class='add'>+</div><div class='add'>+	palmas_ldo_write(pmic-&gt;palmas, addr, reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_map_voltage_ldo(struct regulator_dev *rdev,</div><div class='add'>+		int min_uV, int max_uV)</div><div class='add'>+{</div><div class='add'>+	int ret, voltage;</div><div class='add'>+</div><div class='add'>+	ret = ((min_uV - 900000) / 50000) + 1;</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Map back into a voltage to verify we're still in bounds */</div><div class='add'>+	voltage = palmas_list_voltage_ldo(rdev, ret);</div><div class='add'>+	if (voltage &lt; min_uV || voltage &gt; max_uV)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct regulator_ops palmas_ops_ldo = {</div><div class='add'>+	.is_enabled		= palmas_is_enabled_ldo,</div><div class='add'>+	.enable			= regulator_enable_regmap,</div><div class='add'>+	.disable		= regulator_disable_regmap,</div><div class='add'>+	.get_voltage_sel	= palmas_get_voltage_ldo_sel,</div><div class='add'>+	.set_voltage_sel	= palmas_set_voltage_ldo_sel,</div><div class='add'>+	.list_voltage		= palmas_list_voltage_ldo,</div><div class='add'>+	.map_voltage		= palmas_map_voltage_ldo,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * setup the hardware based sleep configuration of the SMPS/LDO regulators</div><div class='add'>+ * from the platform data. This is different to the software based control</div><div class='add'>+ * supported by the regulator framework as it is controlled by toggling</div><div class='add'>+ * pins on the PMIC such as PREQ, SYSEN, ...</div><div class='add'>+ */</div><div class='add'>+static int palmas_smps_init(struct palmas *palmas, int id,</div><div class='add'>+		struct palmas_reg_init *reg_init)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg;</div><div class='add'>+	unsigned int addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	addr = palmas_regs_info[id].ctrl_addr;</div><div class='add'>+</div><div class='add'>+	ret = palmas_smps_read(palmas, addr, &amp;reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (id != PALMAS_REG_SMPS10) {</div><div class='add'>+		if (reg_init-&gt;warm_reset)</div><div class='add'>+			reg |= PALMAS_SMPS12_CTRL_WR_S;</div><div class='add'>+</div><div class='add'>+		if (reg_init-&gt;roof_floor)</div><div class='add'>+			reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;</div><div class='add'>+</div><div class='add'>+		if (reg_init-&gt;mode_sleep) {</div><div class='add'>+			reg &amp;= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;</div><div class='add'>+			reg |= reg_init-&gt;mode_sleep &lt;&lt;</div><div class='add'>+					PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (reg_init-&gt;mode_sleep) {</div><div class='add'>+			reg &amp;= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;</div><div class='add'>+			reg |= reg_init-&gt;mode_sleep &lt;&lt;</div><div class='add'>+					PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+	ret = palmas_smps_write(palmas, addr, reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (palmas_regs_info[id].tstep_addr &amp;&amp; reg_init-&gt;tstep) {</div><div class='add'>+		addr = palmas_regs_info[id].tstep_addr;</div><div class='add'>+</div><div class='add'>+		reg = reg_init-&gt;tstep &amp; PALMAS_SMPS12_TSTEP_TSTEP_MASK;</div><div class='add'>+</div><div class='add'>+		ret = palmas_smps_write(palmas, addr, reg);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (palmas_regs_info[id].vsel_addr &amp;&amp; reg_init-&gt;vsel) {</div><div class='add'>+		addr = palmas_regs_info[id].vsel_addr;</div><div class='add'>+</div><div class='add'>+		reg = reg_init-&gt;vsel;</div><div class='add'>+</div><div class='add'>+		ret = palmas_smps_write(palmas, addr, reg);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int palmas_ldo_init(struct palmas *palmas, int id,</div><div class='add'>+		struct palmas_reg_init *reg_init)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg;</div><div class='add'>+	unsigned int addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	addr = palmas_regs_info[id].ctrl_addr;</div><div class='add'>+</div><div class='add'>+	ret = palmas_smps_read(palmas, addr, &amp;reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (reg_init-&gt;warm_reset)</div><div class='add'>+		reg |= PALMAS_LDO1_CTRL_WR_S;</div><div class='add'>+</div><div class='add'>+	if (reg_init-&gt;mode_sleep)</div><div class='add'>+		reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;</div><div class='add'>+</div><div class='add'>+	ret = palmas_smps_write(palmas, addr, reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __devinit int palmas_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct palmas *palmas = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct palmas_pmic_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct regulator_dev *rdev;</div><div class='add'>+	struct regulator_config config = { };</div><div class='add'>+	struct palmas_pmic *pmic;</div><div class='add'>+	struct palmas_reg_init *reg_init;</div><div class='add'>+	int id = 0, ret;</div><div class='add'>+	unsigned int addr, reg;</div><div class='add'>+</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (!pdata-&gt;reg_data)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	pmic = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*pmic), GFP_KERNEL);</div><div class='add'>+	if (!pmic)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pmic-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	pmic-&gt;palmas = palmas;</div><div class='add'>+	palmas-&gt;pmic = pmic;</div><div class='add'>+	platform_set_drvdata(pdev, pmic);</div><div class='add'>+</div><div class='add'>+	ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &amp;reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_unregister_regulator;</div><div class='add'>+</div><div class='add'>+	if (reg &amp; PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)</div><div class='add'>+		pmic-&gt;smps123 = 1;</div><div class='add'>+</div><div class='add'>+	if (reg &amp; PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)</div><div class='add'>+		pmic-&gt;smps457 = 1;</div><div class='add'>+</div><div class='add'>+	config.regmap = palmas-&gt;regmap[REGULATOR_SLAVE];</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.driver_data = pmic;</div><div class='add'>+</div><div class='add'>+	for (id = 0; id &lt; PALMAS_REG_LDO1; id++) {</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Miss out regulators which are not available due</div><div class='add'>+		 * to slaving configurations.</div><div class='add'>+		 */</div><div class='add'>+		switch (id) {</div><div class='add'>+		case PALMAS_REG_SMPS12:</div><div class='add'>+		case PALMAS_REG_SMPS3:</div><div class='add'>+			if (pmic-&gt;smps123)</div><div class='add'>+				continue;</div><div class='add'>+			break;</div><div class='add'>+		case PALMAS_REG_SMPS123:</div><div class='add'>+			if (!pmic-&gt;smps123)</div><div class='add'>+				continue;</div><div class='add'>+			break;</div><div class='add'>+		case PALMAS_REG_SMPS45:</div><div class='add'>+		case PALMAS_REG_SMPS7:</div><div class='add'>+			if (pmic-&gt;smps457)</div><div class='add'>+				continue;</div><div class='add'>+			break;</div><div class='add'>+		case PALMAS_REG_SMPS457:</div><div class='add'>+			if (!pmic-&gt;smps457)</div><div class='add'>+				continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Register the regulators */</div><div class='add'>+		pmic-&gt;desc[id].name = palmas_regs_info[id].name;</div><div class='add'>+		pmic-&gt;desc[id].id = id;</div><div class='add'>+</div><div class='add'>+		if (id != PALMAS_REG_SMPS10) {</div><div class='add'>+			pmic-&gt;desc[id].ops = &amp;palmas_ops_smps;</div><div class='add'>+			pmic-&gt;desc[id].n_voltages = PALMAS_SMPS_NUM_VOLTAGES;</div><div class='add'>+		} else {</div><div class='add'>+			pmic-&gt;desc[id].n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;</div><div class='add'>+			pmic-&gt;desc[id].ops = &amp;palmas_ops_smps10;</div><div class='add'>+			pmic-&gt;desc[id].vsel_reg = PALMAS_SMPS10_CTRL;</div><div class='add'>+			pmic-&gt;desc[id].vsel_mask = SMPS10_VSEL;</div><div class='add'>+			pmic-&gt;desc[id].enable_reg = PALMAS_SMPS10_STATUS;</div><div class='add'>+			pmic-&gt;desc[id].enable_mask = SMPS10_BOOST_EN;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pmic-&gt;desc[id].type = REGULATOR_VOLTAGE;</div><div class='add'>+		pmic-&gt;desc[id].owner = THIS_MODULE;</div><div class='add'>+</div><div class='add'>+		/* Initialise sleep/init values from platform data */</div><div class='add'>+		if (pdata &amp;&amp; pdata-&gt;reg_init) {</div><div class='add'>+			reg_init = pdata-&gt;reg_init[id];</div><div class='add'>+			if (reg_init) {</div><div class='add'>+				ret = palmas_smps_init(palmas, id, reg_init);</div><div class='add'>+				if (ret)</div><div class='add'>+					goto err_unregister_regulator;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * read and store the RANGE bit for later use</div><div class='add'>+		 * This must be done before regulator is probed otherwise</div><div class='add'>+		 * we error in probe with unsuportable ranges.</div><div class='add'>+		 */</div><div class='add'>+		if (id != PALMAS_REG_SMPS10) {</div><div class='add'>+			addr = palmas_regs_info[id].vsel_addr;</div><div class='add'>+</div><div class='add'>+			ret = palmas_smps_read(pmic-&gt;palmas, addr, &amp;reg);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto err_unregister_regulator;</div><div class='add'>+			if (reg &amp; PALMAS_SMPS12_VOLTAGE_RANGE)</div><div class='add'>+				pmic-&gt;range[id] = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pdata &amp;&amp; pdata-&gt;reg_data)</div><div class='add'>+			config.init_data = pdata-&gt;reg_data[id];</div><div class='add'>+		else</div><div class='add'>+			config.init_data = NULL;</div><div class='add'>+</div><div class='add'>+		rdev = regulator_register(&amp;pmic-&gt;desc[id], &amp;config);</div><div class='add'>+		if (IS_ERR(rdev)) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+				"failed to register %s regulator\n",</div><div class='add'>+				pdev-&gt;name);</div><div class='add'>+			ret = PTR_ERR(rdev);</div><div class='add'>+			goto err_unregister_regulator;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Save regulator for cleanup */</div><div class='add'>+		pmic-&gt;rdev[id] = rdev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Start this loop from the id left from previous loop */</div><div class='add'>+	for (; id &lt; PALMAS_NUM_REGS; id++) {</div><div class='add'>+</div><div class='add'>+		/* Miss out regulators which are not available due</div><div class='add'>+		 * to alternate functions.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* Register the regulators */</div><div class='add'>+		pmic-&gt;desc[id].name = palmas_regs_info[id].name;</div><div class='add'>+		pmic-&gt;desc[id].id = id;</div><div class='add'>+		pmic-&gt;desc[id].n_voltages = PALMAS_LDO_NUM_VOLTAGES;</div><div class='add'>+</div><div class='add'>+		pmic-&gt;desc[id].ops = &amp;palmas_ops_ldo;</div><div class='add'>+</div><div class='add'>+		pmic-&gt;desc[id].type = REGULATOR_VOLTAGE;</div><div class='add'>+		pmic-&gt;desc[id].owner = THIS_MODULE;</div><div class='add'>+		pmic-&gt;desc[id].enable_reg = palmas_regs_info[id].ctrl_addr;</div><div class='add'>+		pmic-&gt;desc[id].enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;</div><div class='add'>+</div><div class='add'>+		if (pdata &amp;&amp; pdata-&gt;reg_data)</div><div class='add'>+			config.init_data = pdata-&gt;reg_data[id];</div><div class='add'>+		else</div><div class='add'>+			config.init_data = NULL;</div><div class='add'>+</div><div class='add'>+		rdev = regulator_register(&amp;pmic-&gt;desc[id], &amp;config);</div><div class='add'>+		if (IS_ERR(rdev)) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+				"failed to register %s regulator\n",</div><div class='add'>+				pdev-&gt;name);</div><div class='add'>+			ret = PTR_ERR(rdev);</div><div class='add'>+			goto err_unregister_regulator;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Save regulator for cleanup */</div><div class='add'>+		pmic-&gt;rdev[id] = rdev;</div><div class='add'>+</div><div class='add'>+		/* Initialise sleep/init values from platform data */</div><div class='add'>+		if (pdata-&gt;reg_init) {</div><div class='add'>+			reg_init = pdata-&gt;reg_init[id];</div><div class='add'>+			if (reg_init) {</div><div class='add'>+				ret = palmas_ldo_init(palmas, id, reg_init);</div><div class='add'>+				if (ret)</div><div class='add'>+					goto err_unregister_regulator;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unregister_regulator:</div><div class='add'>+	while (--id &gt;= 0)</div><div class='add'>+		regulator_unregister(pmic-&gt;rdev[id]);</div><div class='add'>+	kfree(pmic-&gt;rdev);</div><div class='add'>+	kfree(pmic-&gt;desc);</div><div class='add'>+	kfree(pmic);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit palmas_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct palmas_pmic *pmic = platform_get_drvdata(pdev);</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	for (id = 0; id &lt; PALMAS_NUM_REGS; id++)</div><div class='add'>+		regulator_unregister(pmic-&gt;rdev[id]);</div><div class='add'>+</div><div class='add'>+	kfree(pmic-&gt;rdev);</div><div class='add'>+	kfree(pmic-&gt;desc);</div><div class='add'>+	kfree(pmic);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver palmas_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "palmas-pmic",</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe = palmas_probe,</div><div class='add'>+	.remove = __devexit_p(palmas_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init palmas_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;palmas_driver);</div><div class='add'>+}</div><div class='add'>+subsys_initcall(palmas_init);</div><div class='add'>+</div><div class='add'>+static void __exit palmas_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;palmas_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(palmas_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Graeme Gregory &lt;gg@slimlogic.co.uk&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Palmas voltage regulator driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_ALIAS("platform:palmas-pmic");</div><div class='head'>diff --git a/drivers/regulator/pcap-regulator.c b/drivers/regulator/pcap-regulator.c<br/>index a5aab1b08bcf..8211101121f0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/pcap-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/pcap-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/pcap-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/pcap-regulator.c</a></div><div class='hunk'>@@ -150,57 +150,33 @@ static struct pcap_regulator vreg_table[] = {</div><div class='ctx'> 	VREG_INFO(SW2S,  PCAP_REG_LOWPWR,  NA, 20, NA, NA), */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int pcap_regulator_set_voltage(struct regulator_dev *rdev,</div><div class='del'>-				      int min_uV, int max_uV,</div><div class='del'>-				      unsigned *selector)</div><div class='add'>+static int pcap_regulator_set_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+					  unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcap_regulator *vreg = &amp;vreg_table[rdev_get_id(rdev)];</div><div class='ctx'> 	void *pcap = rdev_get_drvdata(rdev);</div><div class='del'>-	int uV;</div><div class='del'>-	u8 i;</div><div class='ctx'> </div><div class='ctx'> 	/* the regulator doesn't support voltage switching */</div><div class='ctx'> 	if (vreg-&gt;n_voltages == 1)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; vreg-&gt;n_voltages; i++) {</div><div class='del'>-		/* For V1 the first is not the best match */</div><div class='del'>-		if (i == 0 &amp;&amp; rdev_get_id(rdev) == V1)</div><div class='del'>-			i = 1;</div><div class='del'>-		else if (i + 1 == vreg-&gt;n_voltages &amp;&amp; rdev_get_id(rdev) == V1)</div><div class='del'>-			i = 0;</div><div class='del'>-</div><div class='del'>-		uV = vreg-&gt;voltage_table[i] * 1000;</div><div class='del'>-		if (min_uV &lt;= uV &amp;&amp; uV &lt;= max_uV) {</div><div class='del'>-			*selector = i;</div><div class='del'>-			return ezx_pcap_set_bits(pcap, vreg-&gt;reg,</div><div class='del'>-					(vreg-&gt;n_voltages - 1) &lt;&lt; vreg-&gt;index,</div><div class='del'>-					i &lt;&lt; vreg-&gt;index);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (i == 0 &amp;&amp; rdev_get_id(rdev) == V1)</div><div class='del'>-			i = vreg-&gt;n_voltages - 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* the requested voltage range is not supported by this regulator */</div><div class='del'>-	return -EINVAL;</div><div class='add'>+	return ezx_pcap_set_bits(pcap, vreg-&gt;reg,</div><div class='add'>+				 (vreg-&gt;n_voltages - 1) &lt;&lt; vreg-&gt;index,</div><div class='add'>+				 selector &lt;&lt; vreg-&gt;index);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pcap_regulator_get_voltage(struct regulator_dev *rdev)</div><div class='add'>+static int pcap_regulator_get_voltage_sel(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcap_regulator *vreg = &amp;vreg_table[rdev_get_id(rdev)];</div><div class='ctx'> 	void *pcap = rdev_get_drvdata(rdev);</div><div class='ctx'> 	u32 tmp;</div><div class='del'>-	int mV;</div><div class='ctx'> </div><div class='ctx'> 	if (vreg-&gt;n_voltages == 1)</div><div class='del'>-		return vreg-&gt;voltage_table[0] * 1000;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ezx_pcap_read(pcap, vreg-&gt;reg, &amp;tmp);</div><div class='ctx'> 	tmp = ((tmp &gt;&gt; vreg-&gt;index) &amp; (vreg-&gt;n_voltages - 1));</div><div class='del'>-	mV = vreg-&gt;voltage_table[tmp];</div><div class='del'>-</div><div class='del'>-	return mV * 1000;</div><div class='add'>+	return tmp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pcap_regulator_enable(struct regulator_dev *rdev)</div><div class='hunk'>@@ -248,8 +224,8 @@ static int pcap_regulator_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops pcap_regulator_ops = {</div><div class='ctx'> 	.list_voltage	= pcap_regulator_list_voltage,</div><div class='del'>-	.set_voltage	= pcap_regulator_set_voltage,</div><div class='del'>-	.get_voltage	= pcap_regulator_get_voltage,</div><div class='add'>+	.set_voltage_sel = pcap_regulator_set_voltage_sel,</div><div class='add'>+	.get_voltage_sel = pcap_regulator_get_voltage_sel,</div><div class='ctx'> 	.enable		= pcap_regulator_enable,</div><div class='ctx'> 	.disable	= pcap_regulator_disable,</div><div class='ctx'> 	.is_enabled	= pcap_regulator_is_enabled,</div><div class='hunk'>@@ -265,7 +241,7 @@ static struct regulator_ops pcap_regulator_ops = {</div><div class='ctx'> 		.owner		= THIS_MODULE,			\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc pcap_regulators[] = {</div><div class='add'>+static const struct regulator_desc pcap_regulators[] = {</div><div class='ctx'> 	VREG(V1), VREG(V2), VREG(V3), VREG(V4), VREG(V5), VREG(V6), VREG(V7),</div><div class='ctx'> 	VREG(V8), VREG(V9), VREG(V10), VREG(VAUX1), VREG(VAUX2), VREG(VAUX3),</div><div class='ctx'> 	VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2),</div><div class='hunk'>@@ -275,9 +251,13 @@ static int __devinit pcap_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> 	void *pcap = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct regulator_config config = { };</div><div class='add'>+</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = pdev-&gt;dev.platform_data;</div><div class='add'>+	config.driver_data = pcap;</div><div class='ctx'> </div><div class='del'>-	rdev = regulator_register(&amp;pcap_regulators[pdev-&gt;id], &amp;pdev-&gt;dev,</div><div class='del'>-				pdev-&gt;dev.platform_data, pcap, NULL);</div><div class='add'>+	rdev = regulator_register(&amp;pcap_regulators[pdev-&gt;id], &amp;config);</div><div class='ctx'> 	if (IS_ERR(rdev))</div><div class='ctx'> 		return PTR_ERR(rdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/pcf50633-regulator.c b/drivers/regulator/pcf50633-regulator.c<br/>index 6db46c632f13..3c9d14c0017b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/pcf50633-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/pcf50633-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/pcf50633-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/pcf50633-regulator.c</a></div><div class='hunk'>@@ -24,35 +24,25 @@</div><div class='ctx'> #include &lt;linux/mfd/pcf50633/core.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/pcf50633/pmic.h&gt;</div><div class='ctx'> </div><div class='del'>-#define PCF50633_REGULATOR(_name, _id, _n) 		\</div><div class='del'>-	{					\</div><div class='del'>-		.name = _name, 			\</div><div class='del'>-		.id = _id,			\</div><div class='del'>-		.ops = &amp;pcf50633_regulator_ops,	\</div><div class='del'>-		.n_voltages = _n, \</div><div class='del'>-		.type = REGULATOR_VOLTAGE, 	\</div><div class='del'>-		.owner = THIS_MODULE, 		\</div><div class='add'>+#define PCF50633_REGULATOR(_name, _id, _n)			\</div><div class='add'>+	{							\</div><div class='add'>+		.name = _name,					\</div><div class='add'>+		.id = PCF50633_REGULATOR_##_id,			\</div><div class='add'>+		.ops = &amp;pcf50633_regulator_ops,			\</div><div class='add'>+		.n_voltages = _n,				\</div><div class='add'>+		.type = REGULATOR_VOLTAGE,			\</div><div class='add'>+		.owner = THIS_MODULE,				\</div><div class='add'>+		.vsel_reg = PCF50633_REG_##_id##OUT,		\</div><div class='add'>+		.vsel_mask = 0xff,				\</div><div class='add'>+		.enable_reg = PCF50633_REG_##_id##OUT + 1,	\</div><div class='add'>+		.enable_mask = PCF50633_REGULATOR_ON,		\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-static const u8 pcf50633_regulator_registers[PCF50633_NUM_REGULATORS] = {</div><div class='del'>-	[PCF50633_REGULATOR_AUTO]	= PCF50633_REG_AUTOOUT,</div><div class='del'>-	[PCF50633_REGULATOR_DOWN1]	= PCF50633_REG_DOWN1OUT,</div><div class='del'>-	[PCF50633_REGULATOR_DOWN2]	= PCF50633_REG_DOWN2OUT,</div><div class='del'>-	[PCF50633_REGULATOR_MEMLDO]	= PCF50633_REG_MEMLDOOUT,</div><div class='del'>-	[PCF50633_REGULATOR_LDO1]	= PCF50633_REG_LDO1OUT,</div><div class='del'>-	[PCF50633_REGULATOR_LDO2]	= PCF50633_REG_LDO2OUT,</div><div class='del'>-	[PCF50633_REGULATOR_LDO3]	= PCF50633_REG_LDO3OUT,</div><div class='del'>-	[PCF50633_REGULATOR_LDO4]	= PCF50633_REG_LDO4OUT,</div><div class='del'>-	[PCF50633_REGULATOR_LDO5]	= PCF50633_REG_LDO5OUT,</div><div class='del'>-	[PCF50633_REGULATOR_LDO6]	= PCF50633_REG_LDO6OUT,</div><div class='del'>-	[PCF50633_REGULATOR_HCLDO]	= PCF50633_REG_HCLDOOUT,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Bits from voltage value */</div><div class='ctx'> static u8 auto_voltage_bits(unsigned int millivolts)</div><div class='ctx'> {</div><div class='ctx'> 	if (millivolts &lt; 1800)</div><div class='del'>-		return 0;</div><div class='add'>+		return 0x2f;</div><div class='ctx'> 	if (millivolts &gt; 3800)</div><div class='ctx'> 		return 0xff;</div><div class='ctx'> </div><div class='hunk'>@@ -87,6 +77,9 @@ static u8 ldo_voltage_bits(unsigned int millivolts)</div><div class='ctx'> /* Obtain voltage value from bits */</div><div class='ctx'> static unsigned int auto_voltage_value(u8 bits)</div><div class='ctx'> {</div><div class='add'>+	/* AUTOOUT: 00000000 to 00101110 are reserved.</div><div class='add'>+	 * Return 0 for bits in reserved range, which means this selector code</div><div class='add'>+	 * can't be used on this system */</div><div class='ctx'> 	if (bits &lt; 0x2f)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -123,7 +116,7 @@ static int pcf50633_regulator_set_voltage(struct regulator_dev *rdev,</div><div class='ctx'> </div><div class='ctx'> 	millivolts = min_uV / 1000;</div><div class='ctx'> </div><div class='del'>-	regnr = pcf50633_regulator_registers[regulator_id];</div><div class='add'>+	regnr = rdev-&gt;desc-&gt;vsel_reg;</div><div class='ctx'> </div><div class='ctx'> 	switch (regulator_id) {</div><div class='ctx'> 	case PCF50633_REGULATOR_AUTO:</div><div class='hunk'>@@ -154,20 +147,22 @@ static int pcf50633_regulator_set_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	return pcf50633_reg_write(pcf, regnr, volt_bits);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pcf50633_regulator_voltage_value(enum pcf50633_regulator_id id,</div><div class='del'>-						u8 bits)</div><div class='add'>+static int pcf50633_regulator_list_voltage(struct regulator_dev *rdev,</div><div class='add'>+						unsigned int index)</div><div class='ctx'> {</div><div class='add'>+	int regulator_id = rdev_get_id(rdev);</div><div class='add'>+</div><div class='ctx'> 	int millivolts;</div><div class='ctx'> </div><div class='del'>-	switch (id) {</div><div class='add'>+	switch (regulator_id) {</div><div class='ctx'> 	case PCF50633_REGULATOR_AUTO:</div><div class='del'>-		millivolts = auto_voltage_value(bits);</div><div class='add'>+		millivolts = auto_voltage_value(index);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PCF50633_REGULATOR_DOWN1:</div><div class='del'>-		millivolts = down_voltage_value(bits);</div><div class='add'>+		millivolts = down_voltage_value(index);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PCF50633_REGULATOR_DOWN2:</div><div class='del'>-		millivolts = down_voltage_value(bits);</div><div class='add'>+		millivolts = down_voltage_value(index);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PCF50633_REGULATOR_LDO1:</div><div class='ctx'> 	case PCF50633_REGULATOR_LDO2:</div><div class='hunk'>@@ -177,7 +172,7 @@ static int pcf50633_regulator_voltage_value(enum pcf50633_regulator_id id,</div><div class='ctx'> 	case PCF50633_REGULATOR_LDO6:</div><div class='ctx'> 	case PCF50633_REGULATOR_HCLDO:</div><div class='ctx'> 	case PCF50633_REGULATOR_MEMLDO:</div><div class='del'>-		millivolts = ldo_voltage_value(bits);</div><div class='add'>+		millivolts = ldo_voltage_value(index);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -186,140 +181,44 @@ static int pcf50633_regulator_voltage_value(enum pcf50633_regulator_id id,</div><div class='ctx'> 	return millivolts * 1000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pcf50633_regulator_get_voltage(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct pcf50633 *pcf;</div><div class='del'>-	int regulator_id;</div><div class='del'>-	u8 volt_bits, regnr;</div><div class='del'>-</div><div class='del'>-	pcf = rdev_get_drvdata(rdev);</div><div class='del'>-</div><div class='del'>-	regulator_id = rdev_get_id(rdev);</div><div class='del'>-	if (regulator_id &gt;= PCF50633_NUM_REGULATORS)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	regnr = pcf50633_regulator_registers[regulator_id];</div><div class='del'>-</div><div class='del'>-	volt_bits = pcf50633_reg_read(pcf, regnr);</div><div class='del'>-</div><div class='del'>-	return pcf50633_regulator_voltage_value(regulator_id, volt_bits);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pcf50633_regulator_list_voltage(struct regulator_dev *rdev,</div><div class='del'>-						unsigned int index)</div><div class='del'>-{</div><div class='del'>-	struct pcf50633 *pcf;</div><div class='del'>-	int regulator_id;</div><div class='del'>-</div><div class='del'>-	pcf = rdev_get_drvdata(rdev);</div><div class='del'>-</div><div class='del'>-	regulator_id = rdev_get_id(rdev);</div><div class='del'>-</div><div class='del'>-	switch (regulator_id) {</div><div class='del'>-	case PCF50633_REGULATOR_AUTO:</div><div class='del'>-		index += 0x2f;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return pcf50633_regulator_voltage_value(regulator_id, index);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pcf50633_regulator_enable(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct pcf50633 *pcf = rdev_get_drvdata(rdev);</div><div class='del'>-	int regulator_id;</div><div class='del'>-	u8 regnr;</div><div class='del'>-</div><div class='del'>-	regulator_id = rdev_get_id(rdev);</div><div class='del'>-	if (regulator_id &gt;= PCF50633_NUM_REGULATORS)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* The *ENA register is always one after the *OUT register */</div><div class='del'>-	regnr = pcf50633_regulator_registers[regulator_id] + 1;</div><div class='del'>-</div><div class='del'>-	return pcf50633_reg_set_bit_mask(pcf, regnr, PCF50633_REGULATOR_ON,</div><div class='del'>-						       PCF50633_REGULATOR_ON);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pcf50633_regulator_disable(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct pcf50633 *pcf = rdev_get_drvdata(rdev);</div><div class='del'>-	int regulator_id;</div><div class='del'>-	u8 regnr;</div><div class='del'>-</div><div class='del'>-	regulator_id = rdev_get_id(rdev);</div><div class='del'>-	if (regulator_id &gt;= PCF50633_NUM_REGULATORS)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* the *ENA register is always one after the *OUT register */</div><div class='del'>-	regnr = pcf50633_regulator_registers[regulator_id] + 1;</div><div class='del'>-</div><div class='del'>-	return pcf50633_reg_set_bit_mask(pcf, regnr,</div><div class='del'>-					PCF50633_REGULATOR_ON, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pcf50633_regulator_is_enabled(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct pcf50633 *pcf = rdev_get_drvdata(rdev);</div><div class='del'>-	int regulator_id = rdev_get_id(rdev);</div><div class='del'>-	u8 regnr;</div><div class='del'>-</div><div class='del'>-	regulator_id = rdev_get_id(rdev);</div><div class='del'>-	if (regulator_id &gt;= PCF50633_NUM_REGULATORS)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* the *ENA register is always one after the *OUT register */</div><div class='del'>-	regnr = pcf50633_regulator_registers[regulator_id] + 1;</div><div class='del'>-</div><div class='del'>-	return pcf50633_reg_read(pcf, regnr) &amp; PCF50633_REGULATOR_ON;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct regulator_ops pcf50633_regulator_ops = {</div><div class='ctx'> 	.set_voltage = pcf50633_regulator_set_voltage,</div><div class='del'>-	.get_voltage = pcf50633_regulator_get_voltage,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='ctx'> 	.list_voltage = pcf50633_regulator_list_voltage,</div><div class='del'>-	.enable = pcf50633_regulator_enable,</div><div class='del'>-	.disable = pcf50633_regulator_disable,</div><div class='del'>-	.is_enabled = pcf50633_regulator_is_enabled,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc regulators[] = {</div><div class='del'>-	[PCF50633_REGULATOR_AUTO] =</div><div class='del'>-		PCF50633_REGULATOR("auto", PCF50633_REGULATOR_AUTO, 81),</div><div class='del'>-	[PCF50633_REGULATOR_DOWN1] =</div><div class='del'>-		PCF50633_REGULATOR("down1", PCF50633_REGULATOR_DOWN1, 96),</div><div class='del'>-	[PCF50633_REGULATOR_DOWN2] =</div><div class='del'>-		PCF50633_REGULATOR("down2", PCF50633_REGULATOR_DOWN2, 96),</div><div class='del'>-	[PCF50633_REGULATOR_LDO1] =</div><div class='del'>-		PCF50633_REGULATOR("ldo1", PCF50633_REGULATOR_LDO1, 28),</div><div class='del'>-	[PCF50633_REGULATOR_LDO2] =</div><div class='del'>-		PCF50633_REGULATOR("ldo2", PCF50633_REGULATOR_LDO2, 28),</div><div class='del'>-	[PCF50633_REGULATOR_LDO3] =</div><div class='del'>-		PCF50633_REGULATOR("ldo3", PCF50633_REGULATOR_LDO3, 28),</div><div class='del'>-	[PCF50633_REGULATOR_LDO4] =</div><div class='del'>-		PCF50633_REGULATOR("ldo4", PCF50633_REGULATOR_LDO4, 28),</div><div class='del'>-	[PCF50633_REGULATOR_LDO5] =</div><div class='del'>-		PCF50633_REGULATOR("ldo5", PCF50633_REGULATOR_LDO5, 28),</div><div class='del'>-	[PCF50633_REGULATOR_LDO6] =</div><div class='del'>-		PCF50633_REGULATOR("ldo6", PCF50633_REGULATOR_LDO6, 28),</div><div class='del'>-	[PCF50633_REGULATOR_HCLDO] =</div><div class='del'>-		PCF50633_REGULATOR("hcldo", PCF50633_REGULATOR_HCLDO, 28),</div><div class='del'>-	[PCF50633_REGULATOR_MEMLDO] =</div><div class='del'>-		PCF50633_REGULATOR("memldo", PCF50633_REGULATOR_MEMLDO, 28),</div><div class='add'>+static const struct regulator_desc regulators[] = {</div><div class='add'>+	[PCF50633_REGULATOR_AUTO] = PCF50633_REGULATOR("auto", AUTO, 128),</div><div class='add'>+	[PCF50633_REGULATOR_DOWN1] = PCF50633_REGULATOR("down1", DOWN1, 96),</div><div class='add'>+	[PCF50633_REGULATOR_DOWN2] = PCF50633_REGULATOR("down2", DOWN2, 96),</div><div class='add'>+	[PCF50633_REGULATOR_LDO1] = PCF50633_REGULATOR("ldo1", LDO1, 28),</div><div class='add'>+	[PCF50633_REGULATOR_LDO2] = PCF50633_REGULATOR("ldo2", LDO2, 28),</div><div class='add'>+	[PCF50633_REGULATOR_LDO3] = PCF50633_REGULATOR("ldo3", LDO3, 28),</div><div class='add'>+	[PCF50633_REGULATOR_LDO4] = PCF50633_REGULATOR("ldo4", LDO4, 28),</div><div class='add'>+	[PCF50633_REGULATOR_LDO5] = PCF50633_REGULATOR("ldo5", LDO5, 28),</div><div class='add'>+	[PCF50633_REGULATOR_LDO6] = PCF50633_REGULATOR("ldo6", LDO6, 28),</div><div class='add'>+	[PCF50633_REGULATOR_HCLDO] = PCF50633_REGULATOR("hcldo", HCLDO, 28),</div><div class='add'>+	[PCF50633_REGULATOR_MEMLDO] = PCF50633_REGULATOR("memldo", MEMLDO, 28),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __devinit pcf50633_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> 	struct pcf50633 *pcf;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> </div><div class='ctx'> 	/* Already set by core driver */</div><div class='ctx'> 	pcf = dev_to_pcf50633(pdev-&gt;dev.parent);</div><div class='ctx'> </div><div class='del'>-	rdev = regulator_register(&amp;regulators[pdev-&gt;id], &amp;pdev-&gt;dev,</div><div class='del'>-				  pdev-&gt;dev.platform_data, pcf, NULL);</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = pdev-&gt;dev.platform_data;</div><div class='add'>+	config.driver_data = pcf;</div><div class='add'>+	config.regmap = pcf-&gt;regmap;</div><div class='add'>+</div><div class='add'>+	rdev = regulator_register(&amp;regulators[pdev-&gt;id], &amp;config);</div><div class='ctx'> 	if (IS_ERR(rdev))</div><div class='ctx'> 		return PTR_ERR(rdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/rc5t583-regulator.c b/drivers/regulator/rc5t583-regulator.c<br/>new file mode 100644<br/>index 000000000000..1d34e64a1307<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/rc5t583-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/rc5t583-regulator.c</a></div><div class='hunk'>@@ -0,0 +1,255 @@</div><div class='add'>+/*</div><div class='add'>+ * Regulator driver for RICOH RC5T583 power management chip.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2011-2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+ * Author: Laxman dewangan &lt;ldewangan@nvidia.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * based on code</div><div class='add'>+ *      Copyright (C) 2011 RICOH COMPANY,LTD</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regulator/driver.h&gt;</div><div class='add'>+#include &lt;linux/regulator/machine.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/mfd/rc5t583.h&gt;</div><div class='add'>+</div><div class='add'>+struct rc5t583_regulator_info {</div><div class='add'>+	int			deepsleep_id;</div><div class='add'>+</div><div class='add'>+	/* Regulator register address.*/</div><div class='add'>+	uint8_t			reg_disc_reg;</div><div class='add'>+	uint8_t			disc_bit;</div><div class='add'>+	uint8_t			deepsleep_reg;</div><div class='add'>+</div><div class='add'>+	/* Regulator specific turn-on delay  and voltage settling time*/</div><div class='add'>+	int			enable_uv_per_us;</div><div class='add'>+	int			change_uv_per_us;</div><div class='add'>+</div><div class='add'>+	/* Used by regulator core */</div><div class='add'>+	struct regulator_desc	desc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rc5t583_regulator {</div><div class='add'>+	struct rc5t583_regulator_info *reg_info;</div><div class='add'>+</div><div class='add'>+	/* Devices */</div><div class='add'>+	struct device		*dev;</div><div class='add'>+	struct rc5t583		*mfd;</div><div class='add'>+	struct regulator_dev	*rdev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rc5t583_regulator_enable_time(struct regulator_dev *rdev)</div><div class='add'>+{</div><div class='add'>+	struct rc5t583_regulator *reg = rdev_get_drvdata(rdev);</div><div class='add'>+	int vsel = regulator_get_voltage_sel_regmap(rdev);</div><div class='add'>+	int curr_uV = regulator_list_voltage_linear(rdev, vsel);</div><div class='add'>+</div><div class='add'>+	return DIV_ROUND_UP(curr_uV, reg-&gt;reg_info-&gt;enable_uv_per_us);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rc5t583_set_voltage_time_sel(struct regulator_dev *rdev,</div><div class='add'>+		unsigned int old_selector, unsigned int new_selector)</div><div class='add'>+{</div><div class='add'>+	struct rc5t583_regulator *reg = rdev_get_drvdata(rdev);</div><div class='add'>+	int old_uV, new_uV;</div><div class='add'>+	old_uV = regulator_list_voltage_linear(rdev, old_selector);</div><div class='add'>+</div><div class='add'>+	if (old_uV &lt; 0)</div><div class='add'>+		return old_uV;</div><div class='add'>+</div><div class='add'>+	new_uV = regulator_list_voltage_linear(rdev, new_selector);</div><div class='add'>+	if (new_uV &lt; 0)</div><div class='add'>+		return new_uV;</div><div class='add'>+</div><div class='add'>+	return DIV_ROUND_UP(abs(old_uV - new_uV),</div><div class='add'>+				reg-&gt;reg_info-&gt;change_uv_per_us);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static struct regulator_ops rc5t583_ops = {</div><div class='add'>+	.is_enabled		= regulator_is_enabled_regmap,</div><div class='add'>+	.enable			= regulator_enable_regmap,</div><div class='add'>+	.disable		= regulator_disable_regmap,</div><div class='add'>+	.enable_time		= rc5t583_regulator_enable_time,</div><div class='add'>+	.get_voltage_sel	= regulator_get_voltage_sel_regmap,</div><div class='add'>+	.set_voltage_sel	= regulator_set_voltage_sel_regmap,</div><div class='add'>+	.list_voltage		= regulator_list_voltage_linear,</div><div class='add'>+	.map_voltage		= regulator_map_voltage_linear,</div><div class='add'>+	.set_voltage_time_sel	= rc5t583_set_voltage_time_sel,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define RC5T583_REG(_id, _en_reg, _en_bit, _disc_reg, _disc_bit, \</div><div class='add'>+		_vout_mask, _min_mv, _max_mv, _step_uV, _enable_mv) \</div><div class='add'>+{								\</div><div class='add'>+	.reg_disc_reg	= RC5T583_REG_##_disc_reg,		\</div><div class='add'>+	.disc_bit	= _disc_bit,				\</div><div class='add'>+	.deepsleep_reg	= RC5T583_REG_##_id##DAC_DS,		\</div><div class='add'>+	.enable_uv_per_us = _enable_mv * 1000,			\</div><div class='add'>+	.change_uv_per_us = 40 * 1000,				\</div><div class='add'>+	.deepsleep_id	= RC5T583_DS_##_id,			\</div><div class='add'>+	.desc = {						\</div><div class='add'>+		.name = "rc5t583-regulator-"#_id,		\</div><div class='add'>+		.id = RC5T583_REGULATOR_##_id,			\</div><div class='add'>+		.n_voltages = (_max_mv - _min_mv) * 1000 / _step_uV + 1, \</div><div class='add'>+		.ops = &amp;rc5t583_ops,				\</div><div class='add'>+		.type = REGULATOR_VOLTAGE,			\</div><div class='add'>+		.owner = THIS_MODULE,				\</div><div class='add'>+		.vsel_reg = RC5T583_REG_##_id##DAC,		\</div><div class='add'>+		.vsel_mask = _vout_mask,			\</div><div class='add'>+		.enable_reg = RC5T583_REG_##_en_reg,		\</div><div class='add'>+		.enable_mask = BIT(_en_bit),			\</div><div class='add'>+		.min_uV	= _min_mv * 1000,			\</div><div class='add'>+		.uV_step = _step_uV,				\</div><div class='add'>+	},							\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct rc5t583_regulator_info rc5t583_reg_info[RC5T583_REGULATOR_MAX] = {</div><div class='add'>+	RC5T583_REG(DC0, DC0CTL, 0, DC0CTL, 1, 0x7F, 700, 1500, 12500, 4),</div><div class='add'>+	RC5T583_REG(DC1, DC1CTL, 0, DC1CTL, 1, 0x7F, 700, 1500, 12500, 14),</div><div class='add'>+	RC5T583_REG(DC2, DC2CTL, 0, DC2CTL, 1, 0x7F, 900, 2400, 12500, 14),</div><div class='add'>+	RC5T583_REG(DC3, DC3CTL, 0, DC3CTL, 1, 0x7F, 900, 2400, 12500, 14),</div><div class='add'>+	RC5T583_REG(LDO0, LDOEN2, 0, LDODIS2, 0, 0x7F, 900, 3400, 25000, 160),</div><div class='add'>+	RC5T583_REG(LDO1, LDOEN2, 1, LDODIS2, 1, 0x7F, 900, 3400, 25000, 160),</div><div class='add'>+	RC5T583_REG(LDO2, LDOEN2, 2, LDODIS2, 2, 0x7F, 900, 3400, 25000, 160),</div><div class='add'>+	RC5T583_REG(LDO3, LDOEN2, 3, LDODIS2, 3, 0x7F, 900, 3400, 25000, 160),</div><div class='add'>+	RC5T583_REG(LDO4, LDOEN2, 4, LDODIS2, 4, 0x3F, 750, 1500, 12500, 133),</div><div class='add'>+	RC5T583_REG(LDO5, LDOEN2, 5, LDODIS2, 5, 0x7F, 900, 3400, 25000, 267),</div><div class='add'>+	RC5T583_REG(LDO6, LDOEN2, 6, LDODIS2, 6, 0x7F, 900, 3400, 25000, 133),</div><div class='add'>+	RC5T583_REG(LDO7, LDOEN2, 7, LDODIS2, 7, 0x7F, 900, 3400, 25000, 233),</div><div class='add'>+	RC5T583_REG(LDO8, LDOEN1, 0, LDODIS1, 0, 0x7F, 900, 3400, 25000, 233),</div><div class='add'>+	RC5T583_REG(LDO9, LDOEN1, 1, LDODIS1, 1, 0x7F, 900, 3400, 25000, 133),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit rc5t583_regulator_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct rc5t583 *rc5t583 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct rc5t583_platform_data *pdata = dev_get_platdata(rc5t583-&gt;dev);</div><div class='add'>+	struct regulator_init_data *reg_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='add'>+	struct rc5t583_regulator *reg = NULL;</div><div class='add'>+	struct rc5t583_regulator *regs;</div><div class='add'>+	struct regulator_dev *rdev;</div><div class='add'>+	struct rc5t583_regulator_info *ri;</div><div class='add'>+	int ret;</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	if (!pdata) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "No platform data, exiting...\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regs = devm_kzalloc(&amp;pdev-&gt;dev, RC5T583_REGULATOR_MAX *</div><div class='add'>+			sizeof(struct rc5t583_regulator), GFP_KERNEL);</div><div class='add'>+	if (!regs) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Memory allocation failed exiting..\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	for (id = 0; id &lt; RC5T583_REGULATOR_MAX; ++id) {</div><div class='add'>+		reg_data = pdata-&gt;reg_init_data[id];</div><div class='add'>+</div><div class='add'>+		/* No need to register if there is no regulator data */</div><div class='add'>+		if (!reg_data)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		reg = &amp;regs[id];</div><div class='add'>+		ri = &amp;rc5t583_reg_info[id];</div><div class='add'>+		reg-&gt;reg_info = ri;</div><div class='add'>+		reg-&gt;mfd = rc5t583;</div><div class='add'>+		reg-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+		if (ri-&gt;deepsleep_id == RC5T583_DS_NONE)</div><div class='add'>+			goto skip_ext_pwr_config;</div><div class='add'>+</div><div class='add'>+		ret = rc5t583_ext_power_req_config(rc5t583-&gt;dev,</div><div class='add'>+				ri-&gt;deepsleep_id,</div><div class='add'>+				pdata-&gt;regulator_ext_pwr_control[id],</div><div class='add'>+				pdata-&gt;regulator_deepsleep_slot[id]);</div><div class='add'>+		/*</div><div class='add'>+		 * Configuring external control is not a major issue,</div><div class='add'>+		 * just give warning.</div><div class='add'>+		 */</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			dev_warn(&amp;pdev-&gt;dev,</div><div class='add'>+				"Failed to configure ext control %d\n", id);</div><div class='add'>+</div><div class='add'>+skip_ext_pwr_config:</div><div class='add'>+		config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+		config.init_data = reg_data;</div><div class='add'>+		config.driver_data = reg;</div><div class='add'>+		config.regmap = rc5t583-&gt;regmap;</div><div class='add'>+</div><div class='add'>+		rdev = regulator_register(&amp;ri-&gt;desc, &amp;config);</div><div class='add'>+		if (IS_ERR(rdev)) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "Failed to register regulator %s\n",</div><div class='add'>+						ri-&gt;desc.name);</div><div class='add'>+			ret = PTR_ERR(rdev);</div><div class='add'>+			goto clean_exit;</div><div class='add'>+		}</div><div class='add'>+		reg-&gt;rdev = rdev;</div><div class='add'>+	}</div><div class='add'>+	platform_set_drvdata(pdev, regs);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+clean_exit:</div><div class='add'>+	while (--id &gt;= 0)</div><div class='add'>+		regulator_unregister(regs[id].rdev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit rc5t583_regulator_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct rc5t583_regulator *regs = platform_get_drvdata(pdev);</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	for (id = 0; id &lt; RC5T583_REGULATOR_MAX; ++id)</div><div class='add'>+		regulator_unregister(regs[id].rdev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver rc5t583_regulator_driver = {</div><div class='add'>+	.driver	= {</div><div class='add'>+		.name	= "rc5t583-regulator",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe		= rc5t583_regulator_probe,</div><div class='add'>+	.remove		= __devexit_p(rc5t583_regulator_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init rc5t583_regulator_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;rc5t583_regulator_driver);</div><div class='add'>+}</div><div class='add'>+subsys_initcall(rc5t583_regulator_init);</div><div class='add'>+</div><div class='add'>+static void __exit rc5t583_regulator_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;rc5t583_regulator_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(rc5t583_regulator_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Laxman Dewangan &lt;ldewangan@nvidia.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("RC5T583 regulator driver");</div><div class='add'>+MODULE_ALIAS("platform:rc5t583-regulator");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/regulator/s5m8767.c b/drivers/regulator/s5m8767.c<br/>index 4ca2db059004..290d6fc01029 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/s5m8767.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/s5m8767.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/s5m8767.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/s5m8767.c</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -28,6 +27,7 @@ struct s5m8767_info {</div><div class='ctx'> 	struct s5m87xx_dev *iodev;</div><div class='ctx'> 	int num_regulators;</div><div class='ctx'> 	struct regulator_dev **rdev;</div><div class='add'>+	struct s5m_opmode_data *opmode;</div><div class='ctx'> </div><div class='ctx'> 	int ramp_delay;</div><div class='ctx'> 	bool buck2_ramp;</div><div class='hunk'>@@ -141,9 +141,56 @@ static int s5m8767_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int s5m8767_get_register(struct regulator_dev *rdev, int *reg)</div><div class='add'>+static unsigned int s5m8767_opmode_reg[][4] = {</div><div class='add'>+	/* {OFF, ON, LOWPOWER, SUSPEND} */</div><div class='add'>+	/* LDO1 ... LDO28 */</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1}, /* LDO1 */</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x0, 0x0, 0x0},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1}, /* LDO5 */</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1}, /* LDO10 */</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1}, /* LDO15 */</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x0, 0x0, 0x0},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1}, /* LDO20 */</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x0, 0x0, 0x0},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1}, /* LDO25 */</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1}, /* LDO28 */</div><div class='add'>+</div><div class='add'>+	/* BUCK1 ... BUCK9 */</div><div class='add'>+	{0x0, 0x3, 0x1, 0x1}, /* BUCK1 */</div><div class='add'>+	{0x0, 0x3, 0x1, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x1, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x1, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x2, 0x1}, /* BUCK5 */</div><div class='add'>+	{0x0, 0x3, 0x1, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x1, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x1, 0x1},</div><div class='add'>+	{0x0, 0x3, 0x1, 0x1}, /* BUCK9 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int s5m8767_get_register(struct regulator_dev *rdev, int *reg,</div><div class='add'>+				int *enable_ctrl)</div><div class='ctx'> {</div><div class='ctx'> 	int reg_id = rdev_get_id(rdev);</div><div class='add'>+	unsigned int mode;</div><div class='add'>+	struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);</div><div class='ctx'> </div><div class='ctx'> 	switch (reg_id) {</div><div class='ctx'> 	case S5M8767_LDO1 ... S5M8767_LDO2:</div><div class='hunk'>@@ -168,6 +215,8 @@ static int s5m8767_get_register(struct regulator_dev *rdev, int *reg)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mode = s5m8767-&gt;opmode[reg_id].mode;</div><div class='add'>+	*enable_ctrl = s5m8767_opmode_reg[reg_id][mode] &lt;&lt; S5M8767_ENCTRL_SHIFT;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -175,10 +224,10 @@ static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);</div><div class='ctx'> 	int ret, reg;</div><div class='del'>-	int mask = 0xc0, pattern = 0xc0;</div><div class='add'>+	int mask = 0xc0, enable_ctrl;</div><div class='ctx'> 	u8 val;</div><div class='ctx'> </div><div class='del'>-	ret = s5m8767_get_register(rdev, &amp;reg);</div><div class='add'>+	ret = s5m8767_get_register(rdev, &amp;reg, &amp;enable_ctrl);</div><div class='ctx'> 	if (ret == -EINVAL)</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	else if (ret)</div><div class='hunk'>@@ -188,33 +237,33 @@ static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return (val &amp; mask) == pattern;</div><div class='add'>+	return (val &amp; mask) == enable_ctrl;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int s5m8767_reg_enable(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);</div><div class='ctx'> 	int ret, reg;</div><div class='del'>-	int mask = 0xc0, pattern = 0xc0;</div><div class='add'>+	int mask = 0xc0, enable_ctrl;</div><div class='ctx'> </div><div class='del'>-	ret = s5m8767_get_register(rdev, &amp;reg);</div><div class='add'>+	ret = s5m8767_get_register(rdev, &amp;reg, &amp;enable_ctrl);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return s5m_reg_update(s5m8767-&gt;iodev, reg, pattern, mask);</div><div class='add'>+	return s5m_reg_update(s5m8767-&gt;iodev, reg, enable_ctrl, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int s5m8767_reg_disable(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);</div><div class='ctx'> 	int ret, reg;</div><div class='del'>-	int  mask = 0xc0, pattern = 0xc0;</div><div class='add'>+	int  mask = 0xc0, enable_ctrl;</div><div class='ctx'> </div><div class='del'>-	ret = s5m8767_get_register(rdev, &amp;reg);</div><div class='add'>+	ret = s5m8767_get_register(rdev, &amp;reg, &amp;enable_ctrl);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return s5m_reg_update(s5m8767-&gt;iodev, reg, ~pattern, mask);</div><div class='add'>+	return s5m_reg_update(s5m8767-&gt;iodev, reg, ~mask, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int s5m8767_get_voltage_register(struct regulator_dev *rdev, int *_reg)</div><div class='hunk'>@@ -297,7 +346,10 @@ static int s5m8767_convert_voltage_to_sel(</div><div class='ctx'> 	if (max_vol &lt; desc-&gt;min || min_vol &gt; desc-&gt;max)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	selector = (min_vol - desc-&gt;min) / desc-&gt;step;</div><div class='add'>+	if (min_vol &lt; desc-&gt;min)</div><div class='add'>+		min_vol = desc-&gt;min;</div><div class='add'>+</div><div class='add'>+	selector = DIV_ROUND_UP(min_vol - desc-&gt;min, desc-&gt;step);</div><div class='ctx'> </div><div class='ctx'> 	if (desc-&gt;min + desc-&gt;step * selector &gt; max_vol)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -305,14 +357,33 @@ static int s5m8767_convert_voltage_to_sel(</div><div class='ctx'> 	return selector;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void s5m8767_set_high(struct s5m8767_info *s5m8767)</div><div class='add'>+{</div><div class='add'>+	int temp_index = s5m8767-&gt;buck_gpioindex;</div><div class='add'>+</div><div class='add'>+	gpio_set_value(s5m8767-&gt;buck_gpios[0], (temp_index &gt;&gt; 2) &amp; 0x1);</div><div class='add'>+	gpio_set_value(s5m8767-&gt;buck_gpios[1], (temp_index &gt;&gt; 1) &amp; 0x1);</div><div class='add'>+	gpio_set_value(s5m8767-&gt;buck_gpios[2], temp_index &amp; 0x1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void s5m8767_set_low(struct s5m8767_info *s5m8767)</div><div class='add'>+{</div><div class='add'>+	int temp_index = s5m8767-&gt;buck_gpioindex;</div><div class='add'>+</div><div class='add'>+	gpio_set_value(s5m8767-&gt;buck_gpios[2], temp_index &amp; 0x1);</div><div class='add'>+	gpio_set_value(s5m8767-&gt;buck_gpios[1], (temp_index &gt;&gt; 1) &amp; 0x1);</div><div class='add'>+	gpio_set_value(s5m8767-&gt;buck_gpios[0], (temp_index &gt;&gt; 2) &amp; 0x1);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int s5m8767_set_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 				int min_uV, int max_uV, unsigned *selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);</div><div class='ctx'> 	const struct s5m_voltage_desc *desc;</div><div class='ctx'> 	int reg_id = rdev_get_id(rdev);</div><div class='del'>-	int sel, reg, mask, ret;</div><div class='add'>+	int sel, reg, mask, ret = 0, old_index, index = 0;</div><div class='ctx'> 	u8 val;</div><div class='add'>+	u8 *buck234_vol = NULL;</div><div class='ctx'> </div><div class='ctx'> 	switch (reg_id) {</div><div class='ctx'> 	case S5M8767_LDO1 ... S5M8767_LDO28:</div><div class='hunk'>@@ -320,6 +391,12 @@ static int s5m8767_set_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case S5M8767_BUCK1 ... S5M8767_BUCK6:</div><div class='ctx'> 		mask = 0xff;</div><div class='add'>+		if (reg_id == S5M8767_BUCK2 &amp;&amp; s5m8767-&gt;buck2_gpiodvs)</div><div class='add'>+			buck234_vol = &amp;s5m8767-&gt;buck2_vol[0];</div><div class='add'>+		else if (reg_id == S5M8767_BUCK3 &amp;&amp; s5m8767-&gt;buck3_gpiodvs)</div><div class='add'>+			buck234_vol = &amp;s5m8767-&gt;buck3_vol[0];</div><div class='add'>+		else if (reg_id == S5M8767_BUCK4 &amp;&amp; s5m8767-&gt;buck4_gpiodvs)</div><div class='add'>+			buck234_vol = &amp;s5m8767-&gt;buck4_vol[0];</div><div class='ctx'> 		break;</div><div class='ctx'> 	case S5M8767_BUCK7 ... S5M8767_BUCK8:</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -336,102 +413,32 @@ static int s5m8767_set_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	if (sel &lt; 0)</div><div class='ctx'> 		return sel;</div><div class='ctx'> </div><div class='del'>-	ret = s5m8767_get_voltage_register(rdev, &amp;reg);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	s5m_reg_read(s5m8767-&gt;iodev, reg, &amp;val);</div><div class='del'>-	val &amp;= ~mask;</div><div class='del'>-	val |= sel;</div><div class='del'>-</div><div class='del'>-	ret = s5m_reg_write(s5m8767-&gt;iodev, reg, val);</div><div class='del'>-	*selector = sel;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void s5m8767_set_high(struct s5m8767_info *s5m8767)</div><div class='del'>-{</div><div class='del'>-	int temp_index = s5m8767-&gt;buck_gpioindex;</div><div class='del'>-</div><div class='del'>-	gpio_set_value(s5m8767-&gt;buck_gpios[0], (temp_index &gt;&gt; 2) &amp; 0x1);</div><div class='del'>-	gpio_set_value(s5m8767-&gt;buck_gpios[1], (temp_index &gt;&gt; 1) &amp; 0x1);</div><div class='del'>-	gpio_set_value(s5m8767-&gt;buck_gpios[2], temp_index &amp; 0x1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void s5m8767_set_low(struct s5m8767_info *s5m8767)</div><div class='del'>-{</div><div class='del'>-	int temp_index = s5m8767-&gt;buck_gpioindex;</div><div class='del'>-</div><div class='del'>-	gpio_set_value(s5m8767-&gt;buck_gpios[2], temp_index &amp; 0x1);</div><div class='del'>-	gpio_set_value(s5m8767-&gt;buck_gpios[1], (temp_index &gt;&gt; 1) &amp; 0x1);</div><div class='del'>-	gpio_set_value(s5m8767-&gt;buck_gpios[0], (temp_index &gt;&gt; 2) &amp; 0x1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int s5m8767_set_voltage_buck(struct regulator_dev *rdev,</div><div class='del'>-				    int min_uV, int max_uV, unsigned *selector)</div><div class='del'>-{</div><div class='del'>-	struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);</div><div class='del'>-	int reg_id = rdev_get_id(rdev);</div><div class='del'>-	const struct s5m_voltage_desc *desc;</div><div class='del'>-	int new_val, old_val, i = 0;</div><div class='del'>-</div><div class='del'>-	if (reg_id &lt; S5M8767_BUCK1 || reg_id &gt; S5M8767_BUCK6)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	switch (reg_id) {</div><div class='del'>-	case S5M8767_BUCK1:</div><div class='del'>-		return s5m8767_set_voltage(rdev, min_uV, max_uV, selector);</div><div class='del'>-	case S5M8767_BUCK2 ... S5M8767_BUCK4:</div><div class='del'>-		break;</div><div class='del'>-	case S5M8767_BUCK5 ... S5M8767_BUCK6:</div><div class='del'>-		return s5m8767_set_voltage(rdev, min_uV, max_uV, selector);</div><div class='del'>-	case S5M8767_BUCK9:</div><div class='del'>-		return s5m8767_set_voltage(rdev, min_uV, max_uV, selector);</div><div class='del'>-	}</div><div class='add'>+	/* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */</div><div class='add'>+	if (buck234_vol) {</div><div class='add'>+		while (*buck234_vol != sel) {</div><div class='add'>+			buck234_vol++;</div><div class='add'>+			index++;</div><div class='add'>+		}</div><div class='add'>+		old_index = s5m8767-&gt;buck_gpioindex;</div><div class='add'>+		s5m8767-&gt;buck_gpioindex = index;</div><div class='add'>+</div><div class='add'>+		if (index &gt; old_index)</div><div class='add'>+			s5m8767_set_high(s5m8767);</div><div class='add'>+		else</div><div class='add'>+			s5m8767_set_low(s5m8767);</div><div class='add'>+	} else {</div><div class='add'>+		ret = s5m8767_get_voltage_register(rdev, &amp;reg);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-	desc = reg_voltage_map[reg_id];</div><div class='del'>-	new_val = s5m8767_convert_voltage_to_sel(desc, min_uV, max_uV);</div><div class='del'>-	if (new_val &lt; 0)</div><div class='del'>-		return new_val;</div><div class='add'>+		s5m_reg_read(s5m8767-&gt;iodev, reg, &amp;val);</div><div class='add'>+		val = (val &amp; ~mask) | sel;</div><div class='ctx'> </div><div class='del'>-	switch (reg_id) {</div><div class='del'>-	case S5M8767_BUCK2:</div><div class='del'>-		if (s5m8767-&gt;buck2_gpiodvs) {</div><div class='del'>-			while (s5m8767-&gt;buck2_vol[i] != new_val)</div><div class='del'>-				i++;</div><div class='del'>-		} else</div><div class='del'>-			return s5m8767_set_voltage(rdev, min_uV,</div><div class='del'>-						   max_uV, selector);</div><div class='del'>-		break;</div><div class='del'>-	case S5M8767_BUCK3:</div><div class='del'>-		if (s5m8767-&gt;buck3_gpiodvs) {</div><div class='del'>-			while (s5m8767-&gt;buck3_vol[i] != new_val)</div><div class='del'>-				i++;</div><div class='del'>-		} else</div><div class='del'>-			return s5m8767_set_voltage(rdev, min_uV,</div><div class='del'>-						   max_uV, selector);</div><div class='del'>-		break;</div><div class='del'>-	case S5M8767_BUCK4:</div><div class='del'>-		if (s5m8767-&gt;buck3_gpiodvs) {</div><div class='del'>-			while (s5m8767-&gt;buck4_vol[i] != new_val)</div><div class='del'>-				i++;</div><div class='del'>-		} else</div><div class='del'>-			return s5m8767_set_voltage(rdev, min_uV,</div><div class='del'>-						   max_uV, selector);</div><div class='del'>-		break;</div><div class='add'>+		ret = s5m_reg_write(s5m8767-&gt;iodev, reg, val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	old_val = s5m8767-&gt;buck_gpioindex;</div><div class='del'>-	s5m8767-&gt;buck_gpioindex = i;</div><div class='del'>-</div><div class='del'>-	if (i &gt; old_val)</div><div class='del'>-		s5m8767_set_high(s5m8767);</div><div class='del'>-	else</div><div class='del'>-		s5m8767_set_low(s5m8767);</div><div class='del'>-</div><div class='del'>-	*selector = new_val;</div><div class='del'>-	return 0;</div><div class='add'>+	*selector = sel;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,</div><div class='hunk'>@@ -450,7 +457,7 @@ static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct regulator_ops s5m8767_ldo_ops = {</div><div class='add'>+static struct regulator_ops s5m8767_ops = {</div><div class='ctx'> 	.list_voltage		= s5m8767_list_voltage,</div><div class='ctx'> 	.is_enabled		= s5m8767_reg_is_enabled,</div><div class='ctx'> 	.enable			= s5m8767_reg_enable,</div><div class='hunk'>@@ -460,75 +467,59 @@ static struct regulator_ops s5m8767_ldo_ops = {</div><div class='ctx'> 	.set_voltage_time_sel	= s5m8767_set_voltage_time_sel,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_ops s5m8767_buck_ops = {</div><div class='del'>-	.list_voltage		= s5m8767_list_voltage,</div><div class='del'>-	.is_enabled		= s5m8767_reg_is_enabled,</div><div class='del'>-	.enable			= s5m8767_reg_enable,</div><div class='del'>-	.disable		= s5m8767_reg_disable,</div><div class='del'>-	.get_voltage_sel	= s5m8767_get_voltage_sel,</div><div class='del'>-	.set_voltage		= s5m8767_set_voltage_buck,</div><div class='del'>-	.set_voltage_time_sel	= s5m8767_set_voltage_time_sel,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define regulator_desc_ldo(num)		{	\</div><div class='del'>-	.name		= "LDO"#num,		\</div><div class='del'>-	.id		= S5M8767_LDO##num,	\</div><div class='del'>-	.ops		= &amp;s5m8767_ldo_ops,	\</div><div class='del'>-	.type		= REGULATOR_VOLTAGE,	\</div><div class='del'>-	.owner		= THIS_MODULE,		\</div><div class='del'>-}</div><div class='del'>-#define regulator_desc_buck(num)	{	\</div><div class='del'>-	.name		= "BUCK"#num,		\</div><div class='del'>-	.id		= S5M8767_BUCK##num,	\</div><div class='del'>-	.ops		= &amp;s5m8767_buck_ops,	\</div><div class='add'>+#define s5m8767_regulator_desc(_name) {		\</div><div class='add'>+	.name		= #_name,		\</div><div class='add'>+	.id		= S5M8767_##_name,	\</div><div class='add'>+	.ops		= &amp;s5m8767_ops,		\</div><div class='ctx'> 	.type		= REGULATOR_VOLTAGE,	\</div><div class='ctx'> 	.owner		= THIS_MODULE,		\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_desc regulators[] = {</div><div class='del'>-	regulator_desc_ldo(1),</div><div class='del'>-	regulator_desc_ldo(2),</div><div class='del'>-	regulator_desc_ldo(3),</div><div class='del'>-	regulator_desc_ldo(4),</div><div class='del'>-	regulator_desc_ldo(5),</div><div class='del'>-	regulator_desc_ldo(6),</div><div class='del'>-	regulator_desc_ldo(7),</div><div class='del'>-	regulator_desc_ldo(8),</div><div class='del'>-	regulator_desc_ldo(9),</div><div class='del'>-	regulator_desc_ldo(10),</div><div class='del'>-	regulator_desc_ldo(11),</div><div class='del'>-	regulator_desc_ldo(12),</div><div class='del'>-	regulator_desc_ldo(13),</div><div class='del'>-	regulator_desc_ldo(14),</div><div class='del'>-	regulator_desc_ldo(15),</div><div class='del'>-	regulator_desc_ldo(16),</div><div class='del'>-	regulator_desc_ldo(17),</div><div class='del'>-	regulator_desc_ldo(18),</div><div class='del'>-	regulator_desc_ldo(19),</div><div class='del'>-	regulator_desc_ldo(20),</div><div class='del'>-	regulator_desc_ldo(21),</div><div class='del'>-	regulator_desc_ldo(22),</div><div class='del'>-	regulator_desc_ldo(23),</div><div class='del'>-	regulator_desc_ldo(24),</div><div class='del'>-	regulator_desc_ldo(25),</div><div class='del'>-	regulator_desc_ldo(26),</div><div class='del'>-	regulator_desc_ldo(27),</div><div class='del'>-	regulator_desc_ldo(28),</div><div class='del'>-	regulator_desc_buck(1),</div><div class='del'>-	regulator_desc_buck(2),</div><div class='del'>-	regulator_desc_buck(3),</div><div class='del'>-	regulator_desc_buck(4),</div><div class='del'>-	regulator_desc_buck(5),</div><div class='del'>-	regulator_desc_buck(6),</div><div class='del'>-	regulator_desc_buck(7),</div><div class='del'>-	regulator_desc_buck(8),</div><div class='del'>-	regulator_desc_buck(9),</div><div class='add'>+	s5m8767_regulator_desc(LDO1),</div><div class='add'>+	s5m8767_regulator_desc(LDO2),</div><div class='add'>+	s5m8767_regulator_desc(LDO3),</div><div class='add'>+	s5m8767_regulator_desc(LDO4),</div><div class='add'>+	s5m8767_regulator_desc(LDO5),</div><div class='add'>+	s5m8767_regulator_desc(LDO6),</div><div class='add'>+	s5m8767_regulator_desc(LDO7),</div><div class='add'>+	s5m8767_regulator_desc(LDO8),</div><div class='add'>+	s5m8767_regulator_desc(LDO9),</div><div class='add'>+	s5m8767_regulator_desc(LDO10),</div><div class='add'>+	s5m8767_regulator_desc(LDO11),</div><div class='add'>+	s5m8767_regulator_desc(LDO12),</div><div class='add'>+	s5m8767_regulator_desc(LDO13),</div><div class='add'>+	s5m8767_regulator_desc(LDO14),</div><div class='add'>+	s5m8767_regulator_desc(LDO15),</div><div class='add'>+	s5m8767_regulator_desc(LDO16),</div><div class='add'>+	s5m8767_regulator_desc(LDO17),</div><div class='add'>+	s5m8767_regulator_desc(LDO18),</div><div class='add'>+	s5m8767_regulator_desc(LDO19),</div><div class='add'>+	s5m8767_regulator_desc(LDO20),</div><div class='add'>+	s5m8767_regulator_desc(LDO21),</div><div class='add'>+	s5m8767_regulator_desc(LDO22),</div><div class='add'>+	s5m8767_regulator_desc(LDO23),</div><div class='add'>+	s5m8767_regulator_desc(LDO24),</div><div class='add'>+	s5m8767_regulator_desc(LDO25),</div><div class='add'>+	s5m8767_regulator_desc(LDO26),</div><div class='add'>+	s5m8767_regulator_desc(LDO27),</div><div class='add'>+	s5m8767_regulator_desc(LDO28),</div><div class='add'>+	s5m8767_regulator_desc(BUCK1),</div><div class='add'>+	s5m8767_regulator_desc(BUCK2),</div><div class='add'>+	s5m8767_regulator_desc(BUCK3),</div><div class='add'>+	s5m8767_regulator_desc(BUCK4),</div><div class='add'>+	s5m8767_regulator_desc(BUCK5),</div><div class='add'>+	s5m8767_regulator_desc(BUCK6),</div><div class='add'>+	s5m8767_regulator_desc(BUCK7),</div><div class='add'>+	s5m8767_regulator_desc(BUCK8),</div><div class='add'>+	s5m8767_regulator_desc(BUCK9),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __devinit int s5m8767_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct s5m87xx_dev *iodev = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct s5m_platform_data *pdata = dev_get_platdata(iodev-&gt;dev);</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct regulator_dev **rdev;</div><div class='ctx'> 	struct s5m8767_info *s5m8767;</div><div class='ctx'> 	int i, ret, size;</div><div class='hunk'>@@ -586,6 +577,7 @@ static __devinit int s5m8767_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 	s5m8767-&gt;buck2_ramp = pdata-&gt;buck2_ramp_enable;</div><div class='ctx'> 	s5m8767-&gt;buck3_ramp = pdata-&gt;buck3_ramp_enable;</div><div class='ctx'> 	s5m8767-&gt;buck4_ramp = pdata-&gt;buck4_ramp_enable;</div><div class='add'>+	s5m8767-&gt;opmode = pdata-&gt;opmode;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 8; i++) {</div><div class='ctx'> 		if (s5m8767-&gt;buck2_gpiodvs) {</div><div class='hunk'>@@ -723,8 +715,11 @@ static __devinit int s5m8767_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 			regulators[id].n_voltages =</div><div class='ctx'> 				(desc-&gt;max - desc-&gt;min) / desc-&gt;step + 1;</div><div class='ctx'> </div><div class='del'>-		rdev[i] = regulator_register(&amp;regulators[id], s5m8767-&gt;dev,</div><div class='del'>-				pdata-&gt;regulators[i].initdata, s5m8767, NULL);</div><div class='add'>+		config.dev = s5m8767-&gt;dev;</div><div class='add'>+		config.init_data = pdata-&gt;regulators[i].initdata;</div><div class='add'>+		config.driver_data = s5m8767;</div><div class='add'>+</div><div class='add'>+		rdev[i] = regulator_register(&amp;regulators[id], &amp;config);</div><div class='ctx'> 		if (IS_ERR(rdev[i])) {</div><div class='ctx'> 			ret = PTR_ERR(rdev[i]);</div><div class='ctx'> 			dev_err(s5m8767-&gt;dev, "regulator init failed for %d\n",</div><div class='head'>diff --git a/drivers/regulator/tps6105x-regulator.c b/drivers/regulator/tps6105x-regulator.c<br/>index d9278da18a9e..d840d8440a91 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/tps6105x-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/tps6105x-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/tps6105x-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps6105x-regulator.c</a></div><div class='hunk'>@@ -123,7 +123,7 @@ static struct regulator_ops tps6105x_regulator_ops = {</div><div class='ctx'> 	.list_voltage	= tps6105x_regulator_list_voltage,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc tps6105x_regulator_desc = {</div><div class='add'>+static const struct regulator_desc tps6105x_regulator_desc = {</div><div class='ctx'> 	.name		= "tps6105x-boost",</div><div class='ctx'> 	.ops		= &amp;tps6105x_regulator_ops,</div><div class='ctx'> 	.type		= REGULATOR_VOLTAGE,</div><div class='hunk'>@@ -139,6 +139,7 @@ static int __devinit tps6105x_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps6105x *tps6105x = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='ctx'> 	struct tps6105x_platform_data *pdata = tps6105x-&gt;pdata;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* This instance is not set for regulator mode so bail out */</div><div class='hunk'>@@ -148,11 +149,13 @@ static int __devinit tps6105x_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	config.dev = &amp;tps6105x-&gt;client-&gt;dev;</div><div class='add'>+	config.init_data = pdata-&gt;regulator_data;</div><div class='add'>+	config.driver_data = tps6105x;</div><div class='add'>+</div><div class='ctx'> 	/* Register regulator with framework */</div><div class='ctx'> 	tps6105x-&gt;regulator = regulator_register(&amp;tps6105x_regulator_desc,</div><div class='del'>-					     &amp;tps6105x-&gt;client-&gt;dev,</div><div class='del'>-					     pdata-&gt;regulator_data, tps6105x,</div><div class='del'>-					     NULL);</div><div class='add'>+						 &amp;config);</div><div class='ctx'> 	if (IS_ERR(tps6105x-&gt;regulator)) {</div><div class='ctx'> 		ret = PTR_ERR(tps6105x-&gt;regulator);</div><div class='ctx'> 		dev_err(&amp;tps6105x-&gt;client-&gt;dev,</div><div class='head'>diff --git a/drivers/regulator/tps62360-regulator.c b/drivers/regulator/tps62360-regulator.c<br/>index e2ec73068ee2..e534269ed44a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/tps62360-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/tps62360-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/tps62360-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps62360-regulator.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * tps62360.c -- TI tps62360</div><div class='ctx'>  *</div><div class='del'>- * Driver for processor core supply tps62360 and tps62361B</div><div class='add'>+ * Driver for processor core supply tps62360, tps62361B, tps62362 and tps62363.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2012, NVIDIA Corporation.</div><div class='ctx'>  *</div><div class='hunk'>@@ -26,13 +26,16 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of_gpio.h&gt;</div><div class='add'>+#include &lt;linux/regulator/of_regulator.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/tps62360.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -46,20 +49,20 @@</div><div class='ctx'> #define REG_RAMPCTRL		6</div><div class='ctx'> #define REG_CHIPID		8</div><div class='ctx'> </div><div class='del'>-enum chips {TPS62360, TPS62361};</div><div class='add'>+#define FORCE_PWM_ENABLE	BIT(7)</div><div class='ctx'> </div><div class='del'>-#define TPS62360_BASE_VOLTAGE	770</div><div class='add'>+enum chips {TPS62360, TPS62361, TPS62362, TPS62363};</div><div class='add'>+</div><div class='add'>+#define TPS62360_BASE_VOLTAGE	770000</div><div class='ctx'> #define TPS62360_N_VOLTAGES	64</div><div class='ctx'> </div><div class='del'>-#define TPS62361_BASE_VOLTAGE	500</div><div class='add'>+#define TPS62361_BASE_VOLTAGE	500000</div><div class='ctx'> #define TPS62361_N_VOLTAGES	128</div><div class='ctx'> </div><div class='ctx'> /* tps 62360 chip information */</div><div class='ctx'> struct tps62360_chip {</div><div class='del'>-	const char *name;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct regulator_desc desc;</div><div class='del'>-	struct i2c_client *client;</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> 	struct regmap *regmap;</div><div class='ctx'> 	int chip_id;</div><div class='hunk'>@@ -68,12 +71,12 @@ struct tps62360_chip {</div><div class='ctx'> 	int voltage_base;</div><div class='ctx'> 	u8 voltage_reg_mask;</div><div class='ctx'> 	bool en_internal_pulldn;</div><div class='del'>-	bool en_force_pwm;</div><div class='ctx'> 	bool en_discharge;</div><div class='ctx'> 	bool valid_gpios;</div><div class='ctx'> 	int lru_index[4];</div><div class='ctx'> 	int curr_vset_vsel[4];</div><div class='ctx'> 	int curr_vset_id;</div><div class='add'>+	int change_uv_per_us;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -99,6 +102,7 @@ static bool find_voltage_set_register(struct tps62360_chip *tps,</div><div class='ctx'> 	bool found = false;</div><div class='ctx'> 	int new_vset_reg = tps-&gt;lru_index[3];</div><div class='ctx'> 	int found_index = 3;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; 4; ++i) {</div><div class='ctx'> 		if (tps-&gt;curr_vset_vsel[tps-&gt;lru_index[i]] == req_vsel) {</div><div class='ctx'> 			new_vset_reg = tps-&gt;lru_index[i];</div><div class='hunk'>@@ -117,7 +121,7 @@ update_lru_index:</div><div class='ctx'> 	return found;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps62360_dcdc_get_voltage(struct regulator_dev *dev)</div><div class='add'>+static int tps62360_dcdc_get_voltage_sel(struct regulator_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps62360_chip *tps = rdev_get_drvdata(dev);</div><div class='ctx'> 	int vsel;</div><div class='hunk'>@@ -126,196 +130,312 @@ static int tps62360_dcdc_get_voltage(struct regulator_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	ret = regmap_read(tps-&gt;regmap, REG_VSET0 + tps-&gt;curr_vset_id, &amp;data);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		dev_err(tps-&gt;dev, "%s: Error in reading register %d\n",</div><div class='del'>-			__func__, REG_VSET0 + tps-&gt;curr_vset_id);</div><div class='add'>+		dev_err(tps-&gt;dev, "%s(): register %d read failed with err %d\n",</div><div class='add'>+			__func__, REG_VSET0 + tps-&gt;curr_vset_id, ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	vsel = (int)data &amp; tps-&gt;voltage_reg_mask;</div><div class='del'>-	return (tps-&gt;voltage_base + vsel * 10) * 1000;</div><div class='add'>+	return vsel;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps62360_dcdc_set_voltage(struct regulator_dev *dev,</div><div class='del'>-	     int min_uV, int max_uV, unsigned *selector)</div><div class='add'>+static int tps62360_dcdc_set_voltage_sel(struct regulator_dev *dev,</div><div class='add'>+					 unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps62360_chip *tps = rdev_get_drvdata(dev);</div><div class='del'>-	int vsel;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	bool found = false;</div><div class='ctx'> 	int new_vset_id = tps-&gt;curr_vset_id;</div><div class='ctx'> </div><div class='del'>-	if (max_uV &lt; min_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (min_uV &gt;</div><div class='del'>-		((tps-&gt;voltage_base + (tps-&gt;desc.n_voltages - 1) * 10) * 1000))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (max_uV &lt; tps-&gt;voltage_base * 1000)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	vsel = DIV_ROUND_UP(min_uV - (tps-&gt;voltage_base * 1000), 10000);</div><div class='del'>-	if (selector)</div><div class='del'>-		*selector = (vsel &amp; tps-&gt;voltage_reg_mask);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If gpios are available to select the VSET register then least</div><div class='ctx'> 	 * recently used register for new configuration.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (tps-&gt;valid_gpios)</div><div class='del'>-		found = find_voltage_set_register(tps, vsel, &amp;new_vset_id);</div><div class='add'>+		found = find_voltage_set_register(tps, selector, &amp;new_vset_id);</div><div class='ctx'> </div><div class='ctx'> 	if (!found) {</div><div class='ctx'> 		ret = regmap_update_bits(tps-&gt;regmap, REG_VSET0 + new_vset_id,</div><div class='del'>-				tps-&gt;voltage_reg_mask, vsel);</div><div class='add'>+				tps-&gt;voltage_reg_mask, selector);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='del'>-			dev_err(tps-&gt;dev, "%s: Error in updating register %d\n",</div><div class='del'>-				 __func__, REG_VSET0 + new_vset_id);</div><div class='add'>+			dev_err(tps-&gt;dev,</div><div class='add'>+				"%s(): register %d update failed with err %d\n",</div><div class='add'>+				 __func__, REG_VSET0 + new_vset_id, ret);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 		tps-&gt;curr_vset_id = new_vset_id;</div><div class='del'>-		tps-&gt;curr_vset_vsel[new_vset_id] = vsel;</div><div class='add'>+		tps-&gt;curr_vset_vsel[new_vset_id] = selector;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Select proper VSET register vio gpios */</div><div class='ctx'> 	if (tps-&gt;valid_gpios) {</div><div class='del'>-		gpio_set_value_cansleep(tps-&gt;vsel0_gpio,</div><div class='del'>-					new_vset_id &amp; 0x1);</div><div class='add'>+		gpio_set_value_cansleep(tps-&gt;vsel0_gpio, new_vset_id &amp; 0x1);</div><div class='ctx'> 		gpio_set_value_cansleep(tps-&gt;vsel1_gpio,</div><div class='ctx'> 					(new_vset_id &gt;&gt; 1) &amp; 0x1);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps62360_dcdc_list_voltage(struct regulator_dev *dev,</div><div class='del'>-					unsigned selector)</div><div class='add'>+static int tps62360_set_voltage_time_sel(struct regulator_dev *rdev,</div><div class='add'>+		unsigned int old_selector, unsigned int new_selector)</div><div class='ctx'> {</div><div class='del'>-	struct tps62360_chip *tps = rdev_get_drvdata(dev);</div><div class='add'>+	struct tps62360_chip *tps = rdev_get_drvdata(rdev);</div><div class='add'>+	int old_uV, new_uV;</div><div class='ctx'> </div><div class='del'>-	if (selector &gt;= tps-&gt;desc.n_voltages)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	return (tps-&gt;voltage_base + selector * 10) * 1000;</div><div class='add'>+	old_uV = regulator_list_voltage_linear(rdev, old_selector);</div><div class='add'>+	if (old_uV &lt; 0)</div><div class='add'>+		return old_uV;</div><div class='add'>+</div><div class='add'>+	new_uV = regulator_list_voltage_linear(rdev, new_selector);</div><div class='add'>+	if (new_uV &lt; 0)</div><div class='add'>+		return new_uV;</div><div class='add'>+</div><div class='add'>+	return DIV_ROUND_UP(abs(old_uV - new_uV), tps-&gt;change_uv_per_us);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct regulator_ops tps62360_dcdc_ops = {</div><div class='del'>-	.get_voltage = tps62360_dcdc_get_voltage,</div><div class='del'>-	.set_voltage = tps62360_dcdc_set_voltage,</div><div class='del'>-	.list_voltage = tps62360_dcdc_list_voltage,</div><div class='del'>-};</div><div class='add'>+static int tps62360_set_mode(struct regulator_dev *rdev, unsigned int mode)</div><div class='add'>+{</div><div class='add'>+	struct tps62360_chip *tps = rdev_get_drvdata(rdev);</div><div class='add'>+	int i;</div><div class='add'>+	int val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Enable force PWM mode in FAST mode only. */</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case REGULATOR_MODE_FAST:</div><div class='add'>+		val = FORCE_PWM_ENABLE;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case REGULATOR_MODE_NORMAL:</div><div class='add'>+		val = 0;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-static int tps62360_init_force_pwm(struct tps62360_chip *tps,</div><div class='del'>-	struct tps62360_regulator_platform_data *pdata,</div><div class='del'>-	int vset_id)</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!tps-&gt;valid_gpios) {</div><div class='add'>+		ret = regmap_update_bits(tps-&gt;regmap,</div><div class='add'>+			REG_VSET0 + tps-&gt;curr_vset_id, FORCE_PWM_ENABLE, val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			dev_err(tps-&gt;dev,</div><div class='add'>+				"%s(): register %d update failed with err %d\n",</div><div class='add'>+				__func__, REG_VSET0 + tps-&gt;curr_vset_id, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If gpios are valid then all register set need to be control */</div><div class='add'>+	for (i = 0; i &lt; 4; ++i) {</div><div class='add'>+		ret = regmap_update_bits(tps-&gt;regmap,</div><div class='add'>+					REG_VSET0 + i, FORCE_PWM_ENABLE, val);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(tps-&gt;dev,</div><div class='add'>+				"%s(): register %d update failed with err %d\n",</div><div class='add'>+				__func__, REG_VSET0 + i, ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int tps62360_get_mode(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='add'>+	struct tps62360_chip *tps = rdev_get_drvdata(rdev);</div><div class='ctx'> 	unsigned int data;</div><div class='ctx'> 	int ret;</div><div class='del'>-	ret = regmap_read(tps-&gt;regmap, REG_VSET0 + vset_id, &amp;data);</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(tps-&gt;regmap, REG_VSET0 + tps-&gt;curr_vset_id, &amp;data);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		dev_err(tps-&gt;dev, "%s() fails in writing reg %d\n",</div><div class='del'>-			__func__, REG_VSET0 + vset_id);</div><div class='add'>+		dev_err(tps-&gt;dev, "%s(): register %d read failed with err %d\n",</div><div class='add'>+			__func__, REG_VSET0 + tps-&gt;curr_vset_id, ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='del'>-	tps-&gt;curr_vset_vsel[vset_id] = data &amp; tps-&gt;voltage_reg_mask;</div><div class='del'>-	if (pdata-&gt;en_force_pwm)</div><div class='del'>-		data |= BIT(7);</div><div class='del'>-	else</div><div class='del'>-		data &amp;= ~BIT(7);</div><div class='del'>-	ret = regmap_write(tps-&gt;regmap, REG_VSET0 + vset_id, data);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		dev_err(tps-&gt;dev, "%s() fails in writing reg %d\n",</div><div class='del'>-				__func__, REG_VSET0 + vset_id);</div><div class='del'>-	return ret;</div><div class='add'>+	return (data &amp; FORCE_PWM_ENABLE) ?</div><div class='add'>+				REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps62360_init_dcdc(struct tps62360_chip *tps,</div><div class='add'>+static struct regulator_ops tps62360_dcdc_ops = {</div><div class='add'>+	.get_voltage_sel	= tps62360_dcdc_get_voltage_sel,</div><div class='add'>+	.set_voltage_sel	= tps62360_dcdc_set_voltage_sel,</div><div class='add'>+	.list_voltage		= regulator_list_voltage_linear,</div><div class='add'>+	.map_voltage		= regulator_map_voltage_linear,</div><div class='add'>+	.set_voltage_time_sel	= tps62360_set_voltage_time_sel,</div><div class='add'>+	.set_mode		= tps62360_set_mode,</div><div class='add'>+	.get_mode		= tps62360_get_mode,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __devinit tps62360_init_dcdc(struct tps62360_chip *tps,</div><div class='ctx'> 		struct tps62360_regulator_platform_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	int i;</div><div class='add'>+	unsigned int ramp_ctrl;</div><div class='ctx'> </div><div class='del'>-	/* Initailize internal pull up/down control */</div><div class='add'>+	/* Initialize internal pull up/down control */</div><div class='ctx'> 	if (tps-&gt;en_internal_pulldn)</div><div class='ctx'> 		ret = regmap_write(tps-&gt;regmap, REG_CONTROL, 0xE0);</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = regmap_write(tps-&gt;regmap, REG_CONTROL, 0x0);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		dev_err(tps-&gt;dev, "%s() fails in writing reg %d\n",</div><div class='del'>-			__func__, REG_CONTROL);</div><div class='add'>+		dev_err(tps-&gt;dev,</div><div class='add'>+			"%s(): register %d write failed with err %d\n",</div><div class='add'>+			__func__, REG_CONTROL, ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Initailize force PWM mode */</div><div class='del'>-	if (tps-&gt;valid_gpios) {</div><div class='del'>-		for (i = 0; i &lt; 4; ++i) {</div><div class='del'>-			ret = tps62360_init_force_pwm(tps, pdata, i);</div><div class='del'>-			if (ret &lt; 0)</div><div class='del'>-				return ret;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		ret = tps62360_init_force_pwm(tps, pdata, tps-&gt;curr_vset_id);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Reset output discharge path to reduce power consumption */</div><div class='ctx'> 	ret = regmap_update_bits(tps-&gt;regmap, REG_RAMPCTRL, BIT(2), 0);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		dev_err(tps-&gt;dev, "%s() fails in updating reg %d\n",</div><div class='del'>-			__func__, REG_RAMPCTRL);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(tps-&gt;dev,</div><div class='add'>+			"%s(): register %d update failed with err %d\n",</div><div class='add'>+			__func__, REG_RAMPCTRL, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Get ramp value from ramp control register */</div><div class='add'>+	ret = regmap_read(tps-&gt;regmap, REG_RAMPCTRL, &amp;ramp_ctrl);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(tps-&gt;dev,</div><div class='add'>+			"%s(): register %d read failed with err %d\n",</div><div class='add'>+			__func__, REG_RAMPCTRL, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	ramp_ctrl = (ramp_ctrl &gt;&gt; 4) &amp; 0x7;</div><div class='add'>+</div><div class='add'>+	/* ramp mV/us = 32/(2^ramp_ctrl) */</div><div class='add'>+	tps-&gt;change_uv_per_us = DIV_ROUND_UP(32000, BIT(ramp_ctrl));</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct regmap_config tps62360_regmap_config = {</div><div class='del'>-	.reg_bits = 8,</div><div class='del'>-	.val_bits = 8,</div><div class='add'>+	.reg_bits		= 8,</div><div class='add'>+	.val_bits		= 8,</div><div class='add'>+	.max_register		= REG_CHIPID,</div><div class='add'>+	.cache_type		= REGCACHE_RBTREE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct tps62360_regulator_platform_data *</div><div class='add'>+	of_get_tps62360_platform_data(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct tps62360_regulator_platform_data *pdata;</div><div class='add'>+	struct device_node *np = dev-&gt;of_node;</div><div class='add'>+</div><div class='add'>+	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);</div><div class='add'>+	if (!pdata) {</div><div class='add'>+		dev_err(dev, "Memory alloc failed for platform data\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;reg_init_data = of_get_regulator_init_data(dev, dev-&gt;of_node);</div><div class='add'>+	if (!pdata-&gt;reg_init_data) {</div><div class='add'>+		dev_err(dev, "Not able to get OF regulator init data\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;vsel0_gpio = of_get_named_gpio(np, "vsel0-gpio", 0);</div><div class='add'>+	pdata-&gt;vsel1_gpio = of_get_named_gpio(np, "vsel1-gpio", 0);</div><div class='add'>+</div><div class='add'>+	if (of_find_property(np, "ti,vsel0-state-high", NULL))</div><div class='add'>+		pdata-&gt;vsel0_def_state = 1;</div><div class='add'>+</div><div class='add'>+	if (of_find_property(np, "ti,vsel1-state-high", NULL))</div><div class='add'>+		pdata-&gt;vsel1_def_state = 1;</div><div class='add'>+</div><div class='add'>+	if (of_find_property(np, "ti,enable-pull-down", NULL))</div><div class='add'>+		pdata-&gt;en_internal_pulldn = true;</div><div class='add'>+</div><div class='add'>+	if (of_find_property(np, "ti,enable-vout-discharge", NULL))</div><div class='add'>+		pdata-&gt;en_discharge = true;</div><div class='add'>+</div><div class='add'>+	return pdata;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_OF)</div><div class='add'>+static const struct of_device_id tps62360_of_match[] = {</div><div class='add'>+	 { .compatible = "ti,tps62360", .data = (void *)TPS62360},</div><div class='add'>+	 { .compatible = "ti,tps62361", .data = (void *)TPS62361},</div><div class='add'>+	 { .compatible = "ti,tps62362", .data = (void *)TPS62362},</div><div class='add'>+	 { .compatible = "ti,tps62363", .data = (void *)TPS62363},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, tps62360_of_match);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int __devinit tps62360_probe(struct i2c_client *client,</div><div class='ctx'> 				     const struct i2c_device_id *id)</div><div class='ctx'> {</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct tps62360_regulator_platform_data *pdata;</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> 	struct tps62360_chip *tps;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int i;</div><div class='add'>+	int chip_id;</div><div class='ctx'> </div><div class='ctx'> 	pdata = client-&gt;dev.platform_data;</div><div class='add'>+	chip_id = id-&gt;driver_data;</div><div class='add'>+</div><div class='add'>+	if (client-&gt;dev.of_node) {</div><div class='add'>+		const struct of_device_id *match;</div><div class='add'>+		match = of_match_device(of_match_ptr(tps62360_of_match),</div><div class='add'>+				&amp;client-&gt;dev);</div><div class='add'>+		if (!match) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev, "Error: No device match found\n");</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+		chip_id = (int)match-&gt;data;</div><div class='add'>+		if (!pdata)</div><div class='add'>+			pdata = of_get_tps62360_platform_data(&amp;client-&gt;dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!pdata) {</div><div class='del'>-		dev_err(&amp;client-&gt;dev, "%s() Err: Platform data not found\n",</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "%s(): Platform data not found\n",</div><div class='ctx'> 						__func__);</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tps = devm_kzalloc(&amp;client-&gt;dev, sizeof(*tps), GFP_KERNEL);</div><div class='ctx'> 	if (!tps) {</div><div class='del'>-		dev_err(&amp;client-&gt;dev, "%s() Err: Memory allocation fails\n",</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "%s(): Memory allocation failed\n",</div><div class='ctx'> 						__func__);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tps-&gt;en_force_pwm = pdata-&gt;en_force_pwm;</div><div class='ctx'> 	tps-&gt;en_discharge = pdata-&gt;en_discharge;</div><div class='ctx'> 	tps-&gt;en_internal_pulldn = pdata-&gt;en_internal_pulldn;</div><div class='ctx'> 	tps-&gt;vsel0_gpio = pdata-&gt;vsel0_gpio;</div><div class='ctx'> 	tps-&gt;vsel1_gpio = pdata-&gt;vsel1_gpio;</div><div class='del'>-	tps-&gt;client = client;</div><div class='ctx'> 	tps-&gt;dev = &amp;client-&gt;dev;</div><div class='del'>-	tps-&gt;name = id-&gt;name;</div><div class='del'>-	tps-&gt;voltage_base = (id-&gt;driver_data == TPS62360) ?</div><div class='del'>-				TPS62360_BASE_VOLTAGE : TPS62361_BASE_VOLTAGE;</div><div class='del'>-	tps-&gt;voltage_reg_mask = (id-&gt;driver_data == TPS62360) ? 0x3F : 0x7F;</div><div class='add'>+</div><div class='add'>+	switch (chip_id) {</div><div class='add'>+	case TPS62360:</div><div class='add'>+	case TPS62362:</div><div class='add'>+		tps-&gt;voltage_base = TPS62360_BASE_VOLTAGE;</div><div class='add'>+		tps-&gt;voltage_reg_mask = 0x3F;</div><div class='add'>+		tps-&gt;desc.n_voltages = TPS62360_N_VOLTAGES;</div><div class='add'>+		break;</div><div class='add'>+	case TPS62361:</div><div class='add'>+	case TPS62363:</div><div class='add'>+		tps-&gt;voltage_base = TPS62361_BASE_VOLTAGE;</div><div class='add'>+		tps-&gt;voltage_reg_mask = 0x7F;</div><div class='add'>+		tps-&gt;desc.n_voltages = TPS62361_N_VOLTAGES;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	tps-&gt;desc.name = id-&gt;name;</div><div class='ctx'> 	tps-&gt;desc.id = 0;</div><div class='del'>-	tps-&gt;desc.n_voltages = (id-&gt;driver_data == TPS62360) ?</div><div class='del'>-				TPS62360_N_VOLTAGES : TPS62361_N_VOLTAGES;</div><div class='ctx'> 	tps-&gt;desc.ops = &amp;tps62360_dcdc_ops;</div><div class='ctx'> 	tps-&gt;desc.type = REGULATOR_VOLTAGE;</div><div class='ctx'> 	tps-&gt;desc.owner = THIS_MODULE;</div><div class='del'>-	tps-&gt;regmap = regmap_init_i2c(client, &amp;tps62360_regmap_config);</div><div class='add'>+	tps-&gt;desc.min_uV = tps-&gt;voltage_base;</div><div class='add'>+	tps-&gt;desc.uV_step = 10000;</div><div class='add'>+</div><div class='add'>+	tps-&gt;regmap = devm_regmap_init_i2c(client, &amp;tps62360_regmap_config);</div><div class='ctx'> 	if (IS_ERR(tps-&gt;regmap)) {</div><div class='ctx'> 		ret = PTR_ERR(tps-&gt;regmap);</div><div class='del'>-		dev_err(&amp;client-&gt;dev, "%s() Err: Failed to allocate register"</div><div class='del'>-			"map: %d\n", __func__, ret);</div><div class='add'>+		dev_err(&amp;client-&gt;dev,</div><div class='add'>+			"%s(): regmap allocation failed with err %d\n",</div><div class='add'>+			__func__, ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	i2c_set_clientdata(client, tps);</div><div class='hunk'>@@ -326,35 +446,26 @@ static int __devinit tps62360_probe(struct i2c_client *client,</div><div class='ctx'> 	tps-&gt;valid_gpios = false;</div><div class='ctx'> </div><div class='ctx'> 	if (gpio_is_valid(tps-&gt;vsel0_gpio) &amp;&amp; gpio_is_valid(tps-&gt;vsel1_gpio)) {</div><div class='del'>-		ret = gpio_request(tps-&gt;vsel0_gpio, "tps62360-vsel0");</div><div class='add'>+		int gpio_flags;</div><div class='add'>+		gpio_flags = (pdata-&gt;vsel0_def_state) ?</div><div class='add'>+				GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;</div><div class='add'>+		ret = gpio_request_one(tps-&gt;vsel0_gpio,</div><div class='add'>+				gpio_flags, "tps62360-vsel0");</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(&amp;client-&gt;dev,</div><div class='del'>-				"Err: Could not obtain vsel0 GPIO %d: %d\n",</div><div class='del'>-						tps-&gt;vsel0_gpio, ret);</div><div class='del'>-			goto err_gpio0;</div><div class='del'>-		}</div><div class='del'>-		ret = gpio_direction_output(tps-&gt;vsel0_gpio,</div><div class='del'>-					pdata-&gt;vsel0_def_state);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(&amp;client-&gt;dev, "Err: Could not set direction of"</div><div class='del'>-				"vsel0 GPIO %d: %d\n", tps-&gt;vsel0_gpio, ret);</div><div class='del'>-			gpio_free(tps-&gt;vsel0_gpio);</div><div class='add'>+				"%s(): Could not obtain vsel0 GPIO %d: %d\n",</div><div class='add'>+				__func__, tps-&gt;vsel0_gpio, ret);</div><div class='ctx'> 			goto err_gpio0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ret = gpio_request(tps-&gt;vsel1_gpio, "tps62360-vsel1");</div><div class='add'>+		gpio_flags = (pdata-&gt;vsel1_def_state) ?</div><div class='add'>+				GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;</div><div class='add'>+		ret = gpio_request_one(tps-&gt;vsel1_gpio,</div><div class='add'>+				gpio_flags, "tps62360-vsel1");</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(&amp;client-&gt;dev,</div><div class='del'>-				"Err: Could not obtain vsel1 GPIO %d: %d\n",</div><div class='del'>-						tps-&gt;vsel1_gpio, ret);</div><div class='del'>-			goto err_gpio1;</div><div class='del'>-		}</div><div class='del'>-		ret = gpio_direction_output(tps-&gt;vsel1_gpio,</div><div class='del'>-					pdata-&gt;vsel1_def_state);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(&amp;client-&gt;dev, "Err: Could not set direction of"</div><div class='del'>-				"vsel1 GPIO %d: %d\n", tps-&gt;vsel1_gpio, ret);</div><div class='del'>-			gpio_free(tps-&gt;vsel1_gpio);</div><div class='add'>+				"%s(): Could not obtain vsel1 GPIO %d: %d\n",</div><div class='add'>+				__func__, tps-&gt;vsel1_gpio, ret);</div><div class='ctx'> 			goto err_gpio1;</div><div class='ctx'> 		}</div><div class='ctx'> 		tps-&gt;valid_gpios = true;</div><div class='hunk'>@@ -371,17 +482,22 @@ static int __devinit tps62360_probe(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> 	ret = tps62360_init_dcdc(tps, pdata);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		dev_err(tps-&gt;dev, "%s() Err: Init fails with = %d\n",</div><div class='add'>+		dev_err(tps-&gt;dev, "%s(): Init failed with err = %d\n",</div><div class='ctx'> 				__func__, ret);</div><div class='ctx'> 		goto err_init;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	config.dev = &amp;client-&gt;dev;</div><div class='add'>+	config.init_data = pdata-&gt;reg_init_data;</div><div class='add'>+	config.driver_data = tps;</div><div class='add'>+	config.of_node = client-&gt;dev.of_node;</div><div class='add'>+</div><div class='ctx'> 	/* Register the regulators */</div><div class='del'>-	rdev = regulator_register(&amp;tps-&gt;desc, &amp;client-&gt;dev,</div><div class='del'>-				&amp;pdata-&gt;reg_init_data, tps, NULL);</div><div class='add'>+	rdev = regulator_register(&amp;tps-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(rdev)) {</div><div class='del'>-		dev_err(tps-&gt;dev, "%s() Err: Failed to register %s\n",</div><div class='del'>-				__func__, id-&gt;name);</div><div class='add'>+		dev_err(tps-&gt;dev,</div><div class='add'>+			"%s(): regulator register failed with err %s\n",</div><div class='add'>+			__func__, id-&gt;name);</div><div class='ctx'> 		ret = PTR_ERR(rdev);</div><div class='ctx'> 		goto err_init;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -396,7 +512,6 @@ err_gpio1:</div><div class='ctx'> 	if (gpio_is_valid(tps-&gt;vsel0_gpio))</div><div class='ctx'> 		gpio_free(tps-&gt;vsel0_gpio);</div><div class='ctx'> err_gpio0:</div><div class='del'>-	regmap_exit(tps-&gt;regmap);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -417,7 +532,6 @@ static int __devexit tps62360_remove(struct i2c_client *client)</div><div class='ctx'> 		gpio_free(tps-&gt;vsel0_gpio);</div><div class='ctx'> </div><div class='ctx'> 	regulator_unregister(tps-&gt;rdev);</div><div class='del'>-	regmap_exit(tps-&gt;regmap);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -432,13 +546,16 @@ static void tps62360_shutdown(struct i2c_client *client)</div><div class='ctx'> 	/* Configure the output discharge path */</div><div class='ctx'> 	st = regmap_update_bits(tps-&gt;regmap, REG_RAMPCTRL, BIT(2), BIT(2));</div><div class='ctx'> 	if (st &lt; 0)</div><div class='del'>-		dev_err(tps-&gt;dev, "%s() fails in updating reg %d\n",</div><div class='del'>-			__func__, REG_RAMPCTRL);</div><div class='add'>+		dev_err(tps-&gt;dev,</div><div class='add'>+			"%s(): register %d update failed with err %d\n",</div><div class='add'>+			__func__, REG_RAMPCTRL, st);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct i2c_device_id tps62360_id[] = {</div><div class='ctx'> 	{.name = "tps62360", .driver_data = TPS62360},</div><div class='ctx'> 	{.name = "tps62361", .driver_data = TPS62361},</div><div class='add'>+	{.name = "tps62362", .driver_data = TPS62362},</div><div class='add'>+	{.name = "tps62363", .driver_data = TPS62363},</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -448,6 +565,7 @@ static struct i2c_driver tps62360_i2c_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "tps62360",</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='add'>+		.of_match_table = of_match_ptr(tps62360_of_match),</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = tps62360_probe,</div><div class='ctx'> 	.remove = __devexit_p(tps62360_remove),</div><div class='hunk'>@@ -468,5 +586,5 @@ static void __exit tps62360_cleanup(void)</div><div class='ctx'> module_exit(tps62360_cleanup);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Laxman Dewangan &lt;ldewangan@nvidia.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("TPS62360 voltage regulator driver");</div><div class='add'>+MODULE_DESCRIPTION("TPS6236x voltage regulator driver");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/regulator/tps65023-regulator.c b/drivers/regulator/tps65023-regulator.c<br/>index 43e4902d7af8..f841bd0db6aa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/tps65023-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/tps65023-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/tps65023-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps65023-regulator.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -72,7 +71,7 @@</div><div class='ctx'> </div><div class='ctx'> /* LDO_CTRL bitfields */</div><div class='ctx'> #define TPS65023_LDO_CTRL_LDOx_SHIFT(ldo_id)	((ldo_id)*4)</div><div class='del'>-#define TPS65023_LDO_CTRL_LDOx_MASK(ldo_id)	(0xF0 &gt;&gt; ((ldo_id)*4))</div><div class='add'>+#define TPS65023_LDO_CTRL_LDOx_MASK(ldo_id)	(0x0F &lt;&lt; ((ldo_id)*4))</div><div class='ctx'> </div><div class='ctx'> /* Number of step-down converters available */</div><div class='ctx'> #define TPS65023_NUM_DCDC		3</div><div class='hunk'>@@ -139,7 +138,6 @@ struct tps_info {</div><div class='ctx'> /* PMIC details */</div><div class='ctx'> struct tps_pmic {</div><div class='ctx'> 	struct regulator_desc desc[TPS65023_NUM_REGULATOR];</div><div class='del'>-	struct i2c_client *client;</div><div class='ctx'> 	struct regulator_dev *rdev[TPS65023_NUM_REGULATOR];</div><div class='ctx'> 	const struct tps_info *info[TPS65023_NUM_REGULATOR];</div><div class='ctx'> 	struct regmap *regmap;</div><div class='hunk'>@@ -152,96 +150,6 @@ struct tps_driver_data {</div><div class='ctx'> 	u8 core_regulator;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int tps65023_dcdc_is_enabled(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct tps_pmic *tps = rdev_get_drvdata(dev);</div><div class='del'>-	int data, dcdc = rdev_get_id(dev);</div><div class='del'>-	int ret;</div><div class='del'>-	u8 shift;</div><div class='del'>-</div><div class='del'>-	if (dcdc &lt; TPS65023_DCDC_1 || dcdc &gt; TPS65023_DCDC_3)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	shift = TPS65023_NUM_REGULATOR - dcdc;</div><div class='del'>-	ret = regmap_read(tps-&gt;regmap, TPS65023_REG_REG_CTRL, &amp;data);</div><div class='del'>-</div><div class='del'>-	if (ret != 0)</div><div class='del'>-		return ret;</div><div class='del'>-	else</div><div class='del'>-		return (data &amp; 1&lt;&lt;shift) ? 1 : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tps65023_ldo_is_enabled(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct tps_pmic *tps = rdev_get_drvdata(dev);</div><div class='del'>-	int data, ldo = rdev_get_id(dev);</div><div class='del'>-	int ret;</div><div class='del'>-	u8 shift;</div><div class='del'>-</div><div class='del'>-	if (ldo &lt; TPS65023_LDO_1 || ldo &gt; TPS65023_LDO_2)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	shift = (ldo == TPS65023_LDO_1 ? 1 : 2);</div><div class='del'>-	ret = regmap_read(tps-&gt;regmap, TPS65023_REG_REG_CTRL, &amp;data);</div><div class='del'>-</div><div class='del'>-	if (ret != 0)</div><div class='del'>-		return ret;</div><div class='del'>-	else</div><div class='del'>-		return (data &amp; 1&lt;&lt;shift) ? 1 : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tps65023_dcdc_enable(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct tps_pmic *tps = rdev_get_drvdata(dev);</div><div class='del'>-	int dcdc = rdev_get_id(dev);</div><div class='del'>-	u8 shift;</div><div class='del'>-</div><div class='del'>-	if (dcdc &lt; TPS65023_DCDC_1 || dcdc &gt; TPS65023_DCDC_3)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	shift = TPS65023_NUM_REGULATOR - dcdc;</div><div class='del'>-	return regmap_update_bits(tps-&gt;regmap, TPS65023_REG_REG_CTRL, 1 &lt;&lt; shift, 1 &lt;&lt; shift);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tps65023_dcdc_disable(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct tps_pmic *tps = rdev_get_drvdata(dev);</div><div class='del'>-	int dcdc = rdev_get_id(dev);</div><div class='del'>-	u8 shift;</div><div class='del'>-</div><div class='del'>-	if (dcdc &lt; TPS65023_DCDC_1 || dcdc &gt; TPS65023_DCDC_3)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	shift = TPS65023_NUM_REGULATOR - dcdc;</div><div class='del'>-	return regmap_update_bits(tps-&gt;regmap, TPS65023_REG_REG_CTRL, 1 &lt;&lt; shift, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tps65023_ldo_enable(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct tps_pmic *tps = rdev_get_drvdata(dev);</div><div class='del'>-	int ldo = rdev_get_id(dev);</div><div class='del'>-	u8 shift;</div><div class='del'>-</div><div class='del'>-	if (ldo &lt; TPS65023_LDO_1 || ldo &gt; TPS65023_LDO_2)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	shift = (ldo == TPS65023_LDO_1 ? 1 : 2);</div><div class='del'>-	return regmap_update_bits(tps-&gt;regmap, TPS65023_REG_REG_CTRL, 1 &lt;&lt; shift, 1 &lt;&lt; shift);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tps65023_ldo_disable(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct tps_pmic *tps = rdev_get_drvdata(dev);</div><div class='del'>-	int ldo = rdev_get_id(dev);</div><div class='del'>-	u8 shift;</div><div class='del'>-</div><div class='del'>-	if (ldo &lt; TPS65023_LDO_1 || ldo &gt; TPS65023_LDO_2)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	shift = (ldo == TPS65023_LDO_1 ? 1 : 2);</div><div class='del'>-	return regmap_update_bits(tps-&gt;regmap, TPS65023_REG_REG_CTRL, 1 &lt;&lt; shift, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int tps65023_dcdc_get_voltage(struct regulator_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps_pmic *tps = rdev_get_drvdata(dev);</div><div class='hunk'>@@ -261,50 +169,28 @@ static int tps65023_dcdc_get_voltage(struct regulator_dev *dev)</div><div class='ctx'> 		return tps-&gt;info[dcdc]-&gt;min_uV;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65023_dcdc_set_voltage(struct regulator_dev *dev,</div><div class='del'>-				     int min_uV, int max_uV,</div><div class='del'>-				     unsigned *selector)</div><div class='add'>+static int tps65023_dcdc_set_voltage_sel(struct regulator_dev *dev,</div><div class='add'>+					 unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps_pmic *tps = rdev_get_drvdata(dev);</div><div class='ctx'> 	int dcdc = rdev_get_id(dev);</div><div class='del'>-	int vsel;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (dcdc != tps-&gt;core_regulator)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	if (min_uV &lt; tps-&gt;info[dcdc]-&gt;min_uV</div><div class='del'>-			|| min_uV &gt; tps-&gt;info[dcdc]-&gt;max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (max_uV &lt; tps-&gt;info[dcdc]-&gt;min_uV</div><div class='del'>-			|| max_uV &gt; tps-&gt;info[dcdc]-&gt;max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	for (vsel = 0; vsel &lt; tps-&gt;info[dcdc]-&gt;table_len; vsel++) {</div><div class='del'>-		int mV = tps-&gt;info[dcdc]-&gt;table[vsel];</div><div class='del'>-		int uV = mV * 1000;</div><div class='del'>-</div><div class='del'>-		/* Break at the first in-range value */</div><div class='del'>-		if (min_uV &lt;= uV &amp;&amp; uV &lt;= max_uV)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	*selector = vsel;</div><div class='del'>-</div><div class='del'>-	if (vsel == tps-&gt;info[dcdc]-&gt;table_len)</div><div class='del'>-		goto failed;</div><div class='del'>-</div><div class='del'>-	ret = regmap_write(tps-&gt;regmap, TPS65023_REG_DEF_CORE, vsel);</div><div class='add'>+	ret = regmap_write(tps-&gt;regmap, TPS65023_REG_DEF_CORE, selector);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/* Tell the chip that we have changed the value in DEFCORE</div><div class='ctx'> 	 * and its time to update the core voltage</div><div class='ctx'> 	 */</div><div class='del'>-	regmap_update_bits(tps-&gt;regmap, TPS65023_REG_CON_CTRL2,</div><div class='del'>-			TPS65023_REG_CTRL2_GO, TPS65023_REG_CTRL2_GO);</div><div class='add'>+	ret = regmap_update_bits(tps-&gt;regmap, TPS65023_REG_CON_CTRL2,</div><div class='add'>+				 TPS65023_REG_CTRL2_GO, TPS65023_REG_CTRL2_GO);</div><div class='ctx'> </div><div class='add'>+out:</div><div class='ctx'> 	return ret;</div><div class='del'>-</div><div class='del'>-failed:</div><div class='del'>-	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tps65023_ldo_get_voltage(struct regulator_dev *dev)</div><div class='hunk'>@@ -325,42 +211,15 @@ static int tps65023_ldo_get_voltage(struct regulator_dev *dev)</div><div class='ctx'> 	return tps-&gt;info[ldo]-&gt;table[data] * 1000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65023_ldo_set_voltage(struct regulator_dev *dev,</div><div class='del'>-				    int min_uV, int max_uV, unsigned *selector)</div><div class='add'>+static int tps65023_ldo_set_voltage_sel(struct regulator_dev *dev,</div><div class='add'>+					unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps_pmic *tps = rdev_get_drvdata(dev);</div><div class='del'>-	int data, vsel, ldo = rdev_get_id(dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (ldo &lt; TPS65023_LDO_1 || ldo &gt; TPS65023_LDO_2)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	int ldo_index = rdev_get_id(dev) - TPS65023_LDO_1;</div><div class='ctx'> </div><div class='del'>-	if (min_uV &lt; tps-&gt;info[ldo]-&gt;min_uV || min_uV &gt; tps-&gt;info[ldo]-&gt;max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (max_uV &lt; tps-&gt;info[ldo]-&gt;min_uV || max_uV &gt; tps-&gt;info[ldo]-&gt;max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	for (vsel = 0; vsel &lt; tps-&gt;info[ldo]-&gt;table_len; vsel++) {</div><div class='del'>-		int mV = tps-&gt;info[ldo]-&gt;table[vsel];</div><div class='del'>-		int uV = mV * 1000;</div><div class='del'>-</div><div class='del'>-		/* Break at the first in-range value */</div><div class='del'>-		if (min_uV &lt;= uV &amp;&amp; uV &lt;= max_uV)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (vsel == tps-&gt;info[ldo]-&gt;table_len)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	*selector = vsel;</div><div class='del'>-</div><div class='del'>-	ret = regmap_read(tps-&gt;regmap, TPS65023_REG_LDO_CTRL, &amp;data);</div><div class='del'>-	if (ret != 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	data &amp;= TPS65023_LDO_CTRL_LDOx_MASK(ldo - TPS65023_LDO_1);</div><div class='del'>-	data |= (vsel &lt;&lt; (TPS65023_LDO_CTRL_LDOx_SHIFT(ldo - TPS65023_LDO_1)));</div><div class='del'>-	return regmap_write(tps-&gt;regmap, TPS65023_REG_LDO_CTRL, data);</div><div class='add'>+	return regmap_update_bits(tps-&gt;regmap, TPS65023_REG_LDO_CTRL,</div><div class='add'>+			TPS65023_LDO_CTRL_LDOx_MASK(ldo_index),</div><div class='add'>+			selector &lt;&lt; TPS65023_LDO_CTRL_LDOx_SHIFT(ldo_index));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tps65023_dcdc_list_voltage(struct regulator_dev *dev,</div><div class='hunk'>@@ -398,21 +257,21 @@ static int tps65023_ldo_list_voltage(struct regulator_dev *dev,</div><div class='ctx'> </div><div class='ctx'> /* Operations permitted on VDCDCx */</div><div class='ctx'> static struct regulator_ops tps65023_dcdc_ops = {</div><div class='del'>-	.is_enabled = tps65023_dcdc_is_enabled,</div><div class='del'>-	.enable = tps65023_dcdc_enable,</div><div class='del'>-	.disable = tps65023_dcdc_disable,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='ctx'> 	.get_voltage = tps65023_dcdc_get_voltage,</div><div class='del'>-	.set_voltage = tps65023_dcdc_set_voltage,</div><div class='add'>+	.set_voltage_sel = tps65023_dcdc_set_voltage_sel,</div><div class='ctx'> 	.list_voltage = tps65023_dcdc_list_voltage,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Operations permitted on LDOx */</div><div class='ctx'> static struct regulator_ops tps65023_ldo_ops = {</div><div class='del'>-	.is_enabled = tps65023_ldo_is_enabled,</div><div class='del'>-	.enable = tps65023_ldo_enable,</div><div class='del'>-	.disable = tps65023_ldo_disable,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='ctx'> 	.get_voltage = tps65023_ldo_get_voltage,</div><div class='del'>-	.set_voltage = tps65023_ldo_set_voltage,</div><div class='add'>+	.set_voltage_sel = tps65023_ldo_set_voltage_sel,</div><div class='ctx'> 	.list_voltage = tps65023_ldo_list_voltage,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -426,6 +285,7 @@ static int __devinit tps_65023_probe(struct i2c_client *client,</div><div class='ctx'> {</div><div class='ctx'> 	const struct tps_driver_data *drv_data = (void *)id-&gt;driver_data;</div><div class='ctx'> 	const struct tps_info *info = drv_data-&gt;info;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct regulator_init_data *init_data;</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> 	struct tps_pmic *tps;</div><div class='hunk'>@@ -443,20 +303,19 @@ static int __devinit tps_65023_probe(struct i2c_client *client,</div><div class='ctx'> 	if (!init_data)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	tps = kzalloc(sizeof(*tps), GFP_KERNEL);</div><div class='add'>+	tps = devm_kzalloc(&amp;client-&gt;dev, sizeof(*tps), GFP_KERNEL);</div><div class='ctx'> 	if (!tps)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	tps-&gt;regmap = regmap_init_i2c(client, &amp;tps65023_regmap_config);</div><div class='add'>+	tps-&gt;regmap = devm_regmap_init_i2c(client, &amp;tps65023_regmap_config);</div><div class='ctx'> 	if (IS_ERR(tps-&gt;regmap)) {</div><div class='ctx'> 		error = PTR_ERR(tps-&gt;regmap);</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "Failed to allocate register map: %d\n",</div><div class='ctx'> 			error);</div><div class='del'>-		goto fail_alloc;</div><div class='add'>+		return error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* common for all regulators */</div><div class='del'>-	tps-&gt;client = client;</div><div class='ctx'> 	tps-&gt;core_regulator = drv_data-&gt;core_regulator;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; TPS65023_NUM_REGULATOR; i++, info++, init_data++) {</div><div class='hunk'>@@ -471,9 +330,22 @@ static int __devinit tps_65023_probe(struct i2c_client *client,</div><div class='ctx'> 		tps-&gt;desc[i].type = REGULATOR_VOLTAGE;</div><div class='ctx'> 		tps-&gt;desc[i].owner = THIS_MODULE;</div><div class='ctx'> </div><div class='add'>+		tps-&gt;desc[i].enable_reg = TPS65023_REG_REG_CTRL;</div><div class='add'>+		if (i == TPS65023_LDO_1)</div><div class='add'>+			tps-&gt;desc[i].enable_mask = 1 &lt;&lt; 1;</div><div class='add'>+		else if (i == TPS65023_LDO_2)</div><div class='add'>+			tps-&gt;desc[i].enable_mask = 1 &lt;&lt; 2;</div><div class='add'>+		else /* DCDCx */</div><div class='add'>+			tps-&gt;desc[i].enable_mask =</div><div class='add'>+					1 &lt;&lt; (TPS65023_NUM_REGULATOR - i);</div><div class='add'>+</div><div class='add'>+		config.dev = &amp;client-&gt;dev;</div><div class='add'>+		config.init_data = init_data;</div><div class='add'>+		config.driver_data = tps;</div><div class='add'>+		config.regmap = tps-&gt;regmap;</div><div class='add'>+</div><div class='ctx'> 		/* Register the regulators */</div><div class='del'>-		rdev = regulator_register(&amp;tps-&gt;desc[i], &amp;client-&gt;dev,</div><div class='del'>-					  init_data, tps, NULL);</div><div class='add'>+		rdev = regulator_register(&amp;tps-&gt;desc[i], &amp;config);</div><div class='ctx'> 		if (IS_ERR(rdev)) {</div><div class='ctx'> 			dev_err(&amp;client-&gt;dev, "failed to register %s\n",</div><div class='ctx'> 				id-&gt;name);</div><div class='hunk'>@@ -496,19 +368,9 @@ static int __devinit tps_65023_probe(struct i2c_client *client,</div><div class='ctx'>  fail:</div><div class='ctx'> 	while (--i &gt;= 0)</div><div class='ctx'> 		regulator_unregister(tps-&gt;rdev[i]);</div><div class='del'>-</div><div class='del'>-	regmap_exit(tps-&gt;regmap);</div><div class='del'>- fail_alloc:</div><div class='del'>-	kfree(tps);</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * tps_65023_remove - TPS65023 driver i2c remove handler</div><div class='del'>- * @client: i2c driver client device structure</div><div class='del'>- *</div><div class='del'>- * Unregister TPS driver as an i2c client device driver</div><div class='del'>- */</div><div class='ctx'> static int __devexit tps_65023_remove(struct i2c_client *client)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps_pmic *tps = i2c_get_clientdata(client);</div><div class='hunk'>@@ -516,10 +378,6 @@ static int __devexit tps_65023_remove(struct i2c_client *client)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; TPS65023_NUM_REGULATOR; i++)</div><div class='ctx'> 		regulator_unregister(tps-&gt;rdev[i]);</div><div class='del'>-</div><div class='del'>-	regmap_exit(tps-&gt;regmap);</div><div class='del'>-	kfree(tps);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -638,13 +496,13 @@ static struct tps_driver_data tps65020_drv_data = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct tps_driver_data tps65021_drv_data = {</div><div class='del'>-		.info = tps65021_regs,</div><div class='del'>-		.core_regulator = TPS65023_DCDC_3,</div><div class='add'>+	.info = tps65021_regs,</div><div class='add'>+	.core_regulator = TPS65023_DCDC_3,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct tps_driver_data tps65023_drv_data = {</div><div class='del'>-		.info = tps65023_regs,</div><div class='del'>-		.core_regulator = TPS65023_DCDC_1,</div><div class='add'>+	.info = tps65023_regs,</div><div class='add'>+	.core_regulator = TPS65023_DCDC_1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct i2c_device_id tps_65023_id[] = {</div><div class='hunk'>@@ -669,22 +527,12 @@ static struct i2c_driver tps_65023_i2c_driver = {</div><div class='ctx'> 	.id_table = tps_65023_id,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * tps_65023_init</div><div class='del'>- *</div><div class='del'>- * Module init function</div><div class='del'>- */</div><div class='ctx'> static int __init tps_65023_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	return i2c_add_driver(&amp;tps_65023_i2c_driver);</div><div class='ctx'> }</div><div class='ctx'> subsys_initcall(tps_65023_init);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * tps_65023_cleanup</div><div class='del'>- *</div><div class='del'>- * Module exit function</div><div class='del'>- */</div><div class='ctx'> static void __exit tps_65023_cleanup(void)</div><div class='ctx'> {</div><div class='ctx'> 	i2c_del_driver(&amp;tps_65023_i2c_driver);</div><div class='head'>diff --git a/drivers/regulator/tps6507x-regulator.c b/drivers/regulator/tps6507x-regulator.c<br/>index 832833fe8aad..da38be1016aa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/tps6507x-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/tps6507x-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/tps6507x-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps6507x-regulator.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/tps6507x.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/tps6507x.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -283,7 +282,7 @@ static int tps6507x_pmic_disable(struct regulator_dev *dev)</div><div class='ctx'> 					1 &lt;&lt; shift);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps6507x_pmic_get_voltage(struct regulator_dev *dev)</div><div class='add'>+static int tps6507x_pmic_get_voltage_sel(struct regulator_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps6507x_pmic *tps = rdev_get_drvdata(dev);</div><div class='ctx'> 	int data, rid = rdev_get_id(dev);</div><div class='hunk'>@@ -325,7 +324,7 @@ static int tps6507x_pmic_get_voltage(struct regulator_dev *dev)</div><div class='ctx'> 		return data;</div><div class='ctx'> </div><div class='ctx'> 	data &amp;= mask;</div><div class='del'>-	return tps-&gt;info[rid]-&gt;table[data] * 1000;</div><div class='add'>+	return data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tps6507x_pmic_set_voltage_sel(struct regulator_dev *dev,</div><div class='hunk'>@@ -395,7 +394,7 @@ static struct regulator_ops tps6507x_pmic_ops = {</div><div class='ctx'> 	.is_enabled = tps6507x_pmic_is_enabled,</div><div class='ctx'> 	.enable = tps6507x_pmic_enable,</div><div class='ctx'> 	.disable = tps6507x_pmic_disable,</div><div class='del'>-	.get_voltage = tps6507x_pmic_get_voltage,</div><div class='add'>+	.get_voltage_sel = tps6507x_pmic_get_voltage_sel,</div><div class='ctx'> 	.set_voltage_sel = tps6507x_pmic_set_voltage_sel,</div><div class='ctx'> 	.list_voltage = tps6507x_pmic_list_voltage,</div><div class='ctx'> };</div><div class='hunk'>@@ -404,6 +403,7 @@ static __devinit int tps6507x_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps6507x_dev *tps6507x_dev = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct tps_info *info = &amp;tps6507x_pmic_regs[0];</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct regulator_init_data *init_data;</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> 	struct tps6507x_pmic *tps;</div><div class='hunk'>@@ -428,7 +428,7 @@ static __devinit int tps6507x_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!init_data)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	tps = kzalloc(sizeof(*tps), GFP_KERNEL);</div><div class='add'>+	tps = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*tps), GFP_KERNEL);</div><div class='ctx'> 	if (!tps)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -453,8 +453,11 @@ static __devinit int tps6507x_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> 		tps-&gt;desc[i].type = REGULATOR_VOLTAGE;</div><div class='ctx'> 		tps-&gt;desc[i].owner = THIS_MODULE;</div><div class='ctx'> </div><div class='del'>-		rdev = regulator_register(&amp;tps-&gt;desc[i],</div><div class='del'>-					tps6507x_dev-&gt;dev, init_data, tps, NULL);</div><div class='add'>+		config.dev = tps6507x_dev-&gt;dev;</div><div class='add'>+		config.init_data = init_data;</div><div class='add'>+		config.driver_data = tps;</div><div class='add'>+</div><div class='add'>+		rdev = regulator_register(&amp;tps-&gt;desc[i], &amp;config);</div><div class='ctx'> 		if (IS_ERR(rdev)) {</div><div class='ctx'> 			dev_err(tps6507x_dev-&gt;dev,</div><div class='ctx'> 				"failed to register %s regulator\n",</div><div class='hunk'>@@ -475,8 +478,6 @@ static __devinit int tps6507x_pmic_probe(struct platform_device *pdev)</div><div class='ctx'> fail:</div><div class='ctx'> 	while (--i &gt;= 0)</div><div class='ctx'> 		regulator_unregister(tps-&gt;rdev[i]);</div><div class='del'>-</div><div class='del'>-	kfree(tps);</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -488,9 +489,6 @@ static int __devexit tps6507x_pmic_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; TPS6507X_NUM_REGULATOR; i++)</div><div class='ctx'> 		regulator_unregister(tps-&gt;rdev[i]);</div><div class='del'>-</div><div class='del'>-	kfree(tps);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/tps65090-regulator.c b/drivers/regulator/tps65090-regulator.c<br/>new file mode 100644<br/>index 000000000000..001ad554ac62<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/tps65090-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps65090-regulator.c</a></div><div class='hunk'>@@ -0,0 +1,150 @@</div><div class='add'>+/*</div><div class='add'>+ * Regulator driver for tps65090 power management chip.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.</div><div class='add'>+</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+</div><div class='add'>+ * You should have received a copy of the GNU General Public License</div><div class='add'>+ * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regulator/driver.h&gt;</div><div class='add'>+#include &lt;linux/regulator/machine.h&gt;</div><div class='add'>+#include &lt;linux/mfd/tps65090.h&gt;</div><div class='add'>+#include &lt;linux/regulator/tps65090-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+struct tps65090_regulator {</div><div class='add'>+	int		id;</div><div class='add'>+	/* used by regulator core */</div><div class='add'>+	struct regulator_desc	desc;</div><div class='add'>+</div><div class='add'>+	/* Device */</div><div class='add'>+	struct device		*dev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct regulator_ops tps65090_ops = {</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define tps65090_REG(_id)				\</div><div class='add'>+{							\</div><div class='add'>+	.id		= TPS65090_ID_##_id,		\</div><div class='add'>+	.desc = {					\</div><div class='add'>+		.name = tps65090_rails(_id),		\</div><div class='add'>+		.id = TPS65090_ID_##_id,		\</div><div class='add'>+		.ops = &amp;tps65090_ops,			\</div><div class='add'>+		.type = REGULATOR_VOLTAGE,		\</div><div class='add'>+		.owner = THIS_MODULE,			\</div><div class='add'>+		.enable_reg = (TPS65090_ID_##_id) + 12,	\</div><div class='add'>+		.enable_mask = BIT(0),			\</div><div class='add'>+	},						\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct tps65090_regulator TPS65090_regulator[] = {</div><div class='add'>+	tps65090_REG(DCDC1),</div><div class='add'>+	tps65090_REG(DCDC2),</div><div class='add'>+	tps65090_REG(DCDC3),</div><div class='add'>+	tps65090_REG(FET1),</div><div class='add'>+	tps65090_REG(FET2),</div><div class='add'>+	tps65090_REG(FET3),</div><div class='add'>+	tps65090_REG(FET4),</div><div class='add'>+	tps65090_REG(FET5),</div><div class='add'>+	tps65090_REG(FET6),</div><div class='add'>+	tps65090_REG(FET7),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct tps65090_regulator *find_regulator_info(int id)</div><div class='add'>+{</div><div class='add'>+	struct tps65090_regulator *ri;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(TPS65090_regulator); i++) {</div><div class='add'>+		ri = &amp;TPS65090_regulator[i];</div><div class='add'>+		if (ri-&gt;desc.id == id)</div><div class='add'>+			return ri;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devinit tps65090_regulator_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct tps65090 *tps65090_mfd = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct tps65090_regulator *ri = NULL;</div><div class='add'>+	struct regulator_config config = { };</div><div class='add'>+	struct regulator_dev *rdev;</div><div class='add'>+	struct tps65090_regulator_platform_data *tps_pdata;</div><div class='add'>+	int id = pdev-&gt;id;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "Probing regulator %d\n", id);</div><div class='add'>+</div><div class='add'>+	ri = find_regulator_info(id);</div><div class='add'>+	if (ri == NULL) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "invalid regulator ID specified\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	tps_pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	ri-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = &amp;tps_pdata-&gt;regulator;</div><div class='add'>+	config.driver_data = ri;</div><div class='add'>+	config.regmap = tps65090_mfd-&gt;rmap;</div><div class='add'>+</div><div class='add'>+	rdev = regulator_register(&amp;ri-&gt;desc, &amp;config);</div><div class='add'>+	if (IS_ERR(rdev)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to register regulator %s\n",</div><div class='add'>+				ri-&gt;desc.name);</div><div class='add'>+		return PTR_ERR(rdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, rdev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __devexit tps65090_regulator_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct regulator_dev *rdev = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	regulator_unregister(rdev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver tps65090_regulator_driver = {</div><div class='add'>+	.driver	= {</div><div class='add'>+		.name	= "tps65090-regulator",</div><div class='add'>+		.owner	= THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	.probe		= tps65090_regulator_probe,</div><div class='add'>+	.remove		= __devexit_p(tps65090_regulator_remove),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init tps65090_regulator_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;tps65090_regulator_driver);</div><div class='add'>+}</div><div class='add'>+subsys_initcall(tps65090_regulator_init);</div><div class='add'>+</div><div class='add'>+static void __exit tps65090_regulator_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;tps65090_regulator_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(tps65090_regulator_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("tps65090 regulator driver");</div><div class='add'>+MODULE_AUTHOR("Venu Byravarasu &lt;vbyravarasu@nvidia.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/regulator/tps65217-regulator.c b/drivers/regulator/tps65217-regulator.c<br/>index e39521b42772..9d371d2cbcae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/tps65217-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/tps65217-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/tps65217-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps65217-regulator.c</a></div><div class='hunk'>@@ -213,65 +213,56 @@ static int tps65217_pmic_get_voltage_sel(struct regulator_dev *dev)</div><div class='ctx'> 	return selector;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65217_pmic_ldo1_set_voltage_sel(struct regulator_dev *dev,</div><div class='del'>-						unsigned selector)</div><div class='add'>+static int tps65217_pmic_set_voltage_sel(struct regulator_dev *dev,</div><div class='add'>+					 unsigned selector)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='ctx'> 	struct tps65217 *tps = rdev_get_drvdata(dev);</div><div class='del'>-	int ldo = rdev_get_id(dev);</div><div class='add'>+	unsigned int rid = rdev_get_id(dev);</div><div class='ctx'> </div><div class='del'>-	if (ldo != TPS65217_LDO_1)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	/* Set the voltage based on vsel value and write protect level is 2 */</div><div class='add'>+	ret = tps65217_set_bits(tps, tps-&gt;info[rid]-&gt;set_vout_reg,</div><div class='add'>+				tps-&gt;info[rid]-&gt;set_vout_mask,</div><div class='add'>+				selector, TPS65217_PROTECT_L2);</div><div class='ctx'> </div><div class='del'>-	if (selector &gt;= tps-&gt;info[ldo]-&gt;table_len)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	/* Set GO bit for DCDCx to initiate voltage transistion */</div><div class='add'>+	switch (rid) {</div><div class='add'>+	case TPS65217_DCDC_1 ... TPS65217_DCDC_3:</div><div class='add'>+		ret = tps65217_set_bits(tps, TPS65217_REG_DEFSLEW,</div><div class='add'>+				       TPS65217_DEFSLEW_GO, TPS65217_DEFSLEW_GO,</div><div class='add'>+				       TPS65217_PROTECT_L2);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* Set the voltage based on vsel value and write protect level is 2 */</div><div class='del'>-	return tps65217_set_bits(tps, tps-&gt;info[ldo]-&gt;set_vout_reg,</div><div class='del'>-					tps-&gt;info[ldo]-&gt;set_vout_mask,</div><div class='del'>-					selector, TPS65217_PROTECT_L2);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65217_pmic_set_voltage(struct regulator_dev *dev,</div><div class='del'>-				  int min_uV, int max_uV, unsigned *selector)</div><div class='add'>+static int tps65217_pmic_map_voltage(struct regulator_dev *dev,</div><div class='add'>+				     int min_uV, int max_uV)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+</div><div class='ctx'> 	struct tps65217 *tps = rdev_get_drvdata(dev);</div><div class='del'>-	unsigned int rid = rdev_get_id(dev);</div><div class='add'>+	unsigned int sel, rid = rdev_get_id(dev);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	/* LDO1 implements set_voltage_sel callback */</div><div class='add'>+	/* LDO1 uses regulator_map_voltage_iterate() */</div><div class='ctx'> 	if (rid == TPS65217_LDO_1)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (rid &lt; TPS65217_DCDC_1 || rid &gt; TPS65217_LDO_4)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (min_uV &lt; tps-&gt;info[rid]-&gt;min_uV</div><div class='del'>-		|| min_uV &gt; tps-&gt;info[rid]-&gt;max_uV)</div><div class='add'>+	if (min_uV &lt; tps-&gt;info[rid]-&gt;min_uV || min_uV &gt; tps-&gt;info[rid]-&gt;max_uV)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (max_uV &lt; tps-&gt;info[rid]-&gt;min_uV</div><div class='del'>-		|| max_uV &gt; tps-&gt;info[rid]-&gt;max_uV)</div><div class='add'>+	if (max_uV &lt; tps-&gt;info[rid]-&gt;min_uV || max_uV &gt; tps-&gt;info[rid]-&gt;max_uV)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ret = tps-&gt;info[rid]-&gt;uv_to_vsel(min_uV, selector);</div><div class='add'>+	ret = tps-&gt;info[rid]-&gt;uv_to_vsel(min_uV, &amp;sel);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	/* Set the voltage based on vsel value and write protect level is 2 */</div><div class='del'>-	ret = tps65217_set_bits(tps, tps-&gt;info[rid]-&gt;set_vout_reg,</div><div class='del'>-				tps-&gt;info[rid]-&gt;set_vout_mask,</div><div class='del'>-				*selector, TPS65217_PROTECT_L2);</div><div class='del'>-</div><div class='del'>-	/* Set GO bit for DCDCx to initiate voltage transistion */</div><div class='del'>-	switch (rid) {</div><div class='del'>-	case TPS65217_DCDC_1 ... TPS65217_DCDC_3:</div><div class='del'>-		ret = tps65217_set_bits(tps, TPS65217_REG_DEFSLEW,</div><div class='del'>-				       TPS65217_DEFSLEW_GO, TPS65217_DEFSLEW_GO,</div><div class='del'>-				       TPS65217_PROTECT_L2);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return sel;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tps65217_pmic_list_voltage(struct regulator_dev *dev,</div><div class='hunk'>@@ -298,8 +289,9 @@ static struct regulator_ops tps65217_pmic_ops = {</div><div class='ctx'> 	.enable			= tps65217_pmic_enable,</div><div class='ctx'> 	.disable		= tps65217_pmic_disable,</div><div class='ctx'> 	.get_voltage_sel	= tps65217_pmic_get_voltage_sel,</div><div class='del'>-	.set_voltage		= tps65217_pmic_set_voltage,</div><div class='add'>+	.set_voltage_sel	= tps65217_pmic_set_voltage_sel,</div><div class='ctx'> 	.list_voltage		= tps65217_pmic_list_voltage,</div><div class='add'>+	.map_voltage		= tps65217_pmic_map_voltage,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Operations permitted on LDO1 */</div><div class='hunk'>@@ -308,11 +300,11 @@ static struct regulator_ops tps65217_pmic_ldo1_ops = {</div><div class='ctx'> 	.enable			= tps65217_pmic_enable,</div><div class='ctx'> 	.disable		= tps65217_pmic_disable,</div><div class='ctx'> 	.get_voltage_sel	= tps65217_pmic_get_voltage_sel,</div><div class='del'>-	.set_voltage_sel	= tps65217_pmic_ldo1_set_voltage_sel,</div><div class='add'>+	.set_voltage_sel	= tps65217_pmic_set_voltage_sel,</div><div class='ctx'> 	.list_voltage		= tps65217_pmic_list_voltage,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc regulators[] = {</div><div class='add'>+static const struct regulator_desc regulators[] = {</div><div class='ctx'> 	TPS65217_REGULATOR("DCDC1", TPS65217_DCDC_1, tps65217_pmic_ops, 64),</div><div class='ctx'> 	TPS65217_REGULATOR("DCDC2", TPS65217_DCDC_2, tps65217_pmic_ops, 64),</div><div class='ctx'> 	TPS65217_REGULATOR("DCDC3", TPS65217_DCDC_3, tps65217_pmic_ops, 64),</div><div class='hunk'>@@ -327,13 +319,17 @@ static int __devinit tps65217_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> 	struct tps65217 *tps;</div><div class='ctx'> 	struct tps_info *info = &amp;tps65217_pmic_regs[pdev-&gt;id];</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> </div><div class='ctx'> 	/* Already set by core driver */</div><div class='ctx'> 	tps = dev_to_tps65217(pdev-&gt;dev.parent);</div><div class='ctx'> 	tps-&gt;info[pdev-&gt;id] = info;</div><div class='ctx'> </div><div class='del'>-	rdev = regulator_register(&amp;regulators[pdev-&gt;id], &amp;pdev-&gt;dev,</div><div class='del'>-				  pdev-&gt;dev.platform_data, tps, NULL);</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = pdev-&gt;dev.platform_data;</div><div class='add'>+	config.driver_data = tps;</div><div class='add'>+</div><div class='add'>+	rdev = regulator_register(&amp;regulators[pdev-&gt;id], &amp;config);</div><div class='ctx'> 	if (IS_ERR(rdev))</div><div class='ctx'> 		return PTR_ERR(rdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/tps6524x-regulator.c b/drivers/regulator/tps6524x-regulator.c<br/>index 4a421be6d4f2..b88b3df82381 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/tps6524x-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/tps6524x-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/tps6524x-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps6524x-regulator.c</a></div><div class='hunk'>@@ -458,12 +458,10 @@ static int list_voltage(struct regulator_dev *rdev, unsigned selector)</div><div class='ctx'> 		info-&gt;voltages[selector] : -EINVAL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,</div><div class='del'>-		       unsigned *selector)</div><div class='add'>+static int set_voltage_sel(struct regulator_dev *rdev, unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	const struct supply_info *info;</div><div class='ctx'> 	struct tps6524x *hw;</div><div class='del'>-	unsigned i;</div><div class='ctx'> </div><div class='ctx'> 	hw	= rdev_get_drvdata(rdev);</div><div class='ctx'> 	info	= &amp;supply_info[rdev_get_id(rdev)];</div><div class='hunk'>@@ -471,20 +469,10 @@ static int set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,</div><div class='ctx'> 	if (info-&gt;flags &amp; FIXED_VOLTAGE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; info-&gt;n_voltages; i++)</div><div class='del'>-		if (min_uV &lt;= info-&gt;voltages[i] &amp;&amp;</div><div class='del'>-		    max_uV &gt;= info-&gt;voltages[i])</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-	if (i &gt;= info-&gt;n_voltages)</div><div class='del'>-		i = info-&gt;n_voltages - 1;</div><div class='del'>-</div><div class='del'>-	*selector = i;</div><div class='del'>-</div><div class='del'>-	return write_field(hw, &amp;info-&gt;voltage, i);</div><div class='add'>+	return write_field(hw, &amp;info-&gt;voltage, selector);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int get_voltage(struct regulator_dev *rdev)</div><div class='add'>+static int get_voltage_sel(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct supply_info *info;</div><div class='ctx'> 	struct tps6524x *hw;</div><div class='hunk'>@@ -502,7 +490,7 @@ static int get_voltage(struct regulator_dev *rdev)</div><div class='ctx'> 	if (WARN_ON(ret &gt;= info-&gt;n_voltages))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	return info-&gt;voltages[ret];</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int set_current_limit(struct regulator_dev *rdev, int min_uA,</div><div class='hunk'>@@ -587,8 +575,8 @@ static struct regulator_ops regulator_ops = {</div><div class='ctx'> 	.is_enabled		= is_supply_enabled,</div><div class='ctx'> 	.enable			= enable_supply,</div><div class='ctx'> 	.disable		= disable_supply,</div><div class='del'>-	.get_voltage		= get_voltage,</div><div class='del'>-	.set_voltage		= set_voltage,</div><div class='add'>+	.get_voltage_sel	= get_voltage_sel,</div><div class='add'>+	.set_voltage_sel	= set_voltage_sel,</div><div class='ctx'> 	.list_voltage		= list_voltage,</div><div class='ctx'> 	.set_current_limit	= set_current_limit,</div><div class='ctx'> 	.get_current_limit	= get_current_limit,</div><div class='hunk'>@@ -607,7 +595,6 @@ static int pmic_remove(struct spi_device *spi)</div><div class='ctx'> 		hw-&gt;rdev[i] = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	spi_set_drvdata(spi, NULL);</div><div class='del'>-	kfree(hw);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -617,6 +604,7 @@ static int __devinit pmic_probe(struct spi_device *spi)</div><div class='ctx'> 	struct device *dev = &amp;spi-&gt;dev;</div><div class='ctx'> 	const struct supply_info *info = supply_info;</div><div class='ctx'> 	struct regulator_init_data *init_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int ret = 0, i;</div><div class='ctx'> </div><div class='ctx'> 	init_data = dev-&gt;platform_data;</div><div class='hunk'>@@ -625,7 +613,7 @@ static int __devinit pmic_probe(struct spi_device *spi)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hw = kzalloc(sizeof(struct tps6524x), GFP_KERNEL);</div><div class='add'>+	hw = devm_kzalloc(&amp;spi-&gt;dev, sizeof(struct tps6524x), GFP_KERNEL);</div><div class='ctx'> 	if (!hw) {</div><div class='ctx'> 		dev_err(dev, "cannot allocate regulator private data\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -648,8 +636,11 @@ static int __devinit pmic_probe(struct spi_device *spi)</div><div class='ctx'> 		if (info-&gt;flags &amp; FIXED_VOLTAGE)</div><div class='ctx'> 			hw-&gt;desc[i].n_voltages = 1;</div><div class='ctx'> </div><div class='del'>-		hw-&gt;rdev[i] = regulator_register(&amp;hw-&gt;desc[i], dev,</div><div class='del'>-						 init_data, hw, NULL);</div><div class='add'>+		config.dev = dev;</div><div class='add'>+		config.init_data = init_data;</div><div class='add'>+		config.driver_data = hw;</div><div class='add'>+</div><div class='add'>+		hw-&gt;rdev[i] = regulator_register(&amp;hw-&gt;desc[i], &amp;config);</div><div class='ctx'> 		if (IS_ERR(hw-&gt;rdev[i])) {</div><div class='ctx'> 			ret = PTR_ERR(hw-&gt;rdev[i]);</div><div class='ctx'> 			hw-&gt;rdev[i] = NULL;</div><div class='hunk'>@@ -673,17 +664,7 @@ static struct spi_driver pmic_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init pmic_driver_init(void)</div><div class='del'>-{</div><div class='del'>-	return spi_register_driver(&amp;pmic_driver);</div><div class='del'>-}</div><div class='del'>-module_init(pmic_driver_init);</div><div class='del'>-</div><div class='del'>-static void __exit pmic_driver_exit(void)</div><div class='del'>-{</div><div class='del'>-	spi_unregister_driver(&amp;pmic_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(pmic_driver_exit);</div><div class='add'>+module_spi_driver(pmic_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("TPS6524X PMIC Driver");</div><div class='ctx'> MODULE_AUTHOR("Cyril Chemparathy");</div><div class='head'>diff --git a/drivers/regulator/tps6586x-regulator.c b/drivers/regulator/tps6586x-regulator.c<br/>index cfc1f16f7771..c0a214575380 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/tps6586x-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/tps6586x-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/tps6586x-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps6586x-regulator.c</a></div><div class='hunk'>@@ -75,8 +75,7 @@ static inline struct device *to_tps6586x_dev(struct regulator_dev *rdev)</div><div class='ctx'> 	return rdev_get_dev(rdev)-&gt;parent-&gt;parent;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps6586x_ldo_list_voltage(struct regulator_dev *rdev,</div><div class='del'>-				     unsigned selector)</div><div class='add'>+static int tps6586x_list_voltage(struct regulator_dev *rdev, unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps6586x_regulator *info = rdev_get_drvdata(rdev);</div><div class='ctx'> 	int rid = rdev_get_id(rdev);</div><div class='hunk'>@@ -89,47 +88,34 @@ static int tps6586x_ldo_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int __tps6586x_ldo_set_voltage(struct device *parent,</div><div class='del'>-				      struct tps6586x_regulator *ri,</div><div class='del'>-				      int min_uV, int max_uV,</div><div class='del'>-				      unsigned *selector)</div><div class='add'>+static int tps6586x_set_voltage_sel(struct regulator_dev *rdev,</div><div class='add'>+				    unsigned selector)</div><div class='ctx'> {</div><div class='del'>-	int val, uV;</div><div class='add'>+	struct tps6586x_regulator *ri = rdev_get_drvdata(rdev);</div><div class='add'>+	struct device *parent = to_tps6586x_dev(rdev);</div><div class='add'>+	int ret, val, rid = rdev_get_id(rdev);</div><div class='ctx'> 	uint8_t mask;</div><div class='ctx'> </div><div class='del'>-	for (val = 0; val &lt; ri-&gt;desc.n_voltages; val++) {</div><div class='del'>-		uV = ri-&gt;voltages[val] * 1000;</div><div class='del'>-</div><div class='del'>-		/* LDO0 has minimal voltage 1.2 rather than 1.25 */</div><div class='del'>-		if (ri-&gt;desc.id == TPS6586X_ID_LDO_0 &amp;&amp; val == 0)</div><div class='del'>-			uV -= 50 * 1000;</div><div class='del'>-</div><div class='del'>-		/* use the first in-range value */</div><div class='del'>-		if (min_uV &lt;= uV &amp;&amp; uV &lt;= max_uV) {</div><div class='del'>-</div><div class='del'>-			*selector = val;</div><div class='add'>+	val = selector &lt;&lt; ri-&gt;volt_shift;</div><div class='add'>+	mask = ((1 &lt;&lt; ri-&gt;volt_nbits) - 1) &lt;&lt; ri-&gt;volt_shift;</div><div class='ctx'> </div><div class='del'>-			val &lt;&lt;= ri-&gt;volt_shift;</div><div class='del'>-			mask = ((1 &lt;&lt; ri-&gt;volt_nbits) - 1) &lt;&lt; ri-&gt;volt_shift;</div><div class='add'>+	ret = tps6586x_update(parent, ri-&gt;volt_reg, val, mask);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-			return tps6586x_update(parent, ri-&gt;volt_reg, val, mask);</div><div class='del'>-		}</div><div class='add'>+	/* Update go bit for DVM regulators */</div><div class='add'>+	switch (rid) {</div><div class='add'>+	case TPS6586X_ID_LDO_2:</div><div class='add'>+	case TPS6586X_ID_LDO_4:</div><div class='add'>+	case TPS6586X_ID_SM_0:</div><div class='add'>+	case TPS6586X_ID_SM_1:</div><div class='add'>+		ret = tps6586x_set_bits(parent, ri-&gt;go_reg, 1 &lt;&lt; ri-&gt;go_bit);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tps6586x_ldo_set_voltage(struct regulator_dev *rdev,</div><div class='del'>-				    int min_uV, int max_uV, unsigned *selector)</div><div class='del'>-{</div><div class='del'>-	struct tps6586x_regulator *ri = rdev_get_drvdata(rdev);</div><div class='del'>-	struct device *parent = to_tps6586x_dev(rdev);</div><div class='del'>-</div><div class='del'>-	return __tps6586x_ldo_set_voltage(parent, ri, min_uV, max_uV,</div><div class='del'>-					  selector);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps6586x_ldo_get_voltage(struct regulator_dev *rdev)</div><div class='add'>+static int tps6586x_get_voltage_sel(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps6586x_regulator *ri = rdev_get_drvdata(rdev);</div><div class='ctx'> 	struct device *parent = to_tps6586x_dev(rdev);</div><div class='hunk'>@@ -146,22 +132,7 @@ static int tps6586x_ldo_get_voltage(struct regulator_dev *rdev)</div><div class='ctx'> 	if (val &gt;= ri-&gt;desc.n_voltages)</div><div class='ctx'> 		BUG();</div><div class='ctx'> </div><div class='del'>-	return ri-&gt;voltages[val] * 1000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tps6586x_dvm_set_voltage(struct regulator_dev *rdev,</div><div class='del'>-				    int min_uV, int max_uV, unsigned *selector)</div><div class='del'>-{</div><div class='del'>-	struct tps6586x_regulator *ri = rdev_get_drvdata(rdev);</div><div class='del'>-	struct device *parent = to_tps6586x_dev(rdev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = __tps6586x_ldo_set_voltage(parent, ri, min_uV, max_uV,</div><div class='del'>-					 selector);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return tps6586x_set_bits(parent, ri-&gt;go_reg, 1 &lt;&lt; ri-&gt;go_bit);</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tps6586x_regulator_enable(struct regulator_dev *rdev)</div><div class='hunk'>@@ -196,20 +167,10 @@ static int tps6586x_regulator_is_enabled(struct regulator_dev *rdev)</div><div class='ctx'> 	return !!(reg_val &amp; (1 &lt;&lt; ri-&gt;enable_bit[0]));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct regulator_ops tps6586x_regulator_ldo_ops = {</div><div class='del'>-	.list_voltage = tps6586x_ldo_list_voltage,</div><div class='del'>-	.get_voltage = tps6586x_ldo_get_voltage,</div><div class='del'>-	.set_voltage = tps6586x_ldo_set_voltage,</div><div class='del'>-</div><div class='del'>-	.is_enabled = tps6586x_regulator_is_enabled,</div><div class='del'>-	.enable = tps6586x_regulator_enable,</div><div class='del'>-	.disable = tps6586x_regulator_disable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct regulator_ops tps6586x_regulator_dvm_ops = {</div><div class='del'>-	.list_voltage = tps6586x_ldo_list_voltage,</div><div class='del'>-	.get_voltage = tps6586x_ldo_get_voltage,</div><div class='del'>-	.set_voltage = tps6586x_dvm_set_voltage,</div><div class='add'>+static struct regulator_ops tps6586x_regulator_ops = {</div><div class='add'>+	.list_voltage = tps6586x_list_voltage,</div><div class='add'>+	.get_voltage_sel = tps6586x_get_voltage_sel,</div><div class='add'>+	.set_voltage_sel = tps6586x_set_voltage_sel,</div><div class='ctx'> </div><div class='ctx'> 	.is_enabled = tps6586x_regulator_is_enabled,</div><div class='ctx'> 	.enable = tps6586x_regulator_enable,</div><div class='hunk'>@@ -241,11 +202,11 @@ static int tps6586x_dvm_voltages[] = {</div><div class='ctx'> 	1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define TPS6586X_REGULATOR(_id, vdata, _ops, vreg, shift, nbits,	\</div><div class='add'>+#define TPS6586X_REGULATOR(_id, vdata, vreg, shift, nbits,		\</div><div class='ctx'> 			   ereg0, ebit0, ereg1, ebit1)			\</div><div class='ctx'> 	.desc	= {							\</div><div class='ctx'> 		.name	= "REG-" #_id,					\</div><div class='del'>-		.ops	= &amp;tps6586x_regulator_##_ops,			\</div><div class='add'>+		.ops	= &amp;tps6586x_regulator_ops,			\</div><div class='ctx'> 		.type	= REGULATOR_VOLTAGE,				\</div><div class='ctx'> 		.id	= TPS6586X_ID_##_id,				\</div><div class='ctx'> 		.n_voltages = ARRAY_SIZE(tps6586x_##vdata##_voltages),	\</div><div class='hunk'>@@ -267,14 +228,14 @@ static int tps6586x_dvm_voltages[] = {</div><div class='ctx'> #define TPS6586X_LDO(_id, vdata, vreg, shift, nbits,			\</div><div class='ctx'> 		     ereg0, ebit0, ereg1, ebit1)			\</div><div class='ctx'> {									\</div><div class='del'>-	TPS6586X_REGULATOR(_id, vdata, ldo_ops, vreg, shift, nbits,	\</div><div class='add'>+	TPS6586X_REGULATOR(_id, vdata, vreg, shift, nbits,		\</div><div class='ctx'> 			   ereg0, ebit0, ereg1, ebit1)			\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define TPS6586X_DVM(_id, vdata, vreg, shift, nbits,			\</div><div class='ctx'> 		     ereg0, ebit0, ereg1, ebit1, goreg, gobit)		\</div><div class='ctx'> {									\</div><div class='del'>-	TPS6586X_REGULATOR(_id, vdata, dvm_ops, vreg, shift, nbits,	\</div><div class='add'>+	TPS6586X_REGULATOR(_id, vdata, vreg, shift, nbits,		\</div><div class='ctx'> 			   ereg0, ebit0, ereg1, ebit1)			\</div><div class='ctx'> 	TPS6586X_REGULATOR_DVM_GOREG(goreg, gobit)			\</div><div class='ctx'> }</div><div class='hunk'>@@ -384,6 +345,7 @@ static inline struct tps6586x_regulator *find_regulator_info(int id)</div><div class='ctx'> static int __devinit tps6586x_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps6586x_regulator *ri = NULL;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> 	int id = pdev-&gt;id;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -400,8 +362,12 @@ static int __devinit tps6586x_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	rdev = regulator_register(&amp;ri-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-				  pdev-&gt;dev.platform_data, ri, NULL);</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.of_node = pdev-&gt;dev.of_node;</div><div class='add'>+	config.init_data = pdev-&gt;dev.platform_data;</div><div class='add'>+	config.driver_data = ri;</div><div class='add'>+</div><div class='add'>+	rdev = regulator_register(&amp;ri-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(rdev)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to register regulator %s\n",</div><div class='ctx'> 				ri-&gt;desc.name);</div><div class='head'>diff --git a/drivers/regulator/tps65910-regulator.c b/drivers/regulator/tps65910-regulator.c<br/>index 4a37c2b6367f..6bf864b4bdf6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/tps65910-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/tps65910-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/tps65910-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps65910-regulator.c</a></div><div class='hunk'>@@ -20,10 +20,10 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/tps65910.h&gt;</div><div class='add'>+#include &lt;linux/regulator/of_regulator.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define TPS65910_SUPPLY_STATE_ENABLED	0x1</div><div class='ctx'> #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 |	\</div><div class='hunk'>@@ -31,54 +31,54 @@</div><div class='ctx'> 			TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 |		\</div><div class='ctx'> 			TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)</div><div class='ctx'> </div><div class='del'>-/* supported VIO voltages in milivolts */</div><div class='add'>+/* supported VIO voltages in millivolts */</div><div class='ctx'> static const u16 VIO_VSEL_table[] = {</div><div class='ctx'> 	1500, 1800, 2500, 3300,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* VSEL tables for TPS65910 specific LDOs and dcdc's */</div><div class='ctx'> </div><div class='del'>-/* supported VDD3 voltages in milivolts */</div><div class='add'>+/* supported VDD3 voltages in millivolts */</div><div class='ctx'> static const u16 VDD3_VSEL_table[] = {</div><div class='ctx'> 	5000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* supported VDIG1 voltages in milivolts */</div><div class='add'>+/* supported VDIG1 voltages in millivolts */</div><div class='ctx'> static const u16 VDIG1_VSEL_table[] = {</div><div class='ctx'> 	1200, 1500, 1800, 2700,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* supported VDIG2 voltages in milivolts */</div><div class='add'>+/* supported VDIG2 voltages in millivolts */</div><div class='ctx'> static const u16 VDIG2_VSEL_table[] = {</div><div class='ctx'> 	1000, 1100, 1200, 1800,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* supported VPLL voltages in milivolts */</div><div class='add'>+/* supported VPLL voltages in millivolts */</div><div class='ctx'> static const u16 VPLL_VSEL_table[] = {</div><div class='ctx'> 	1000, 1100, 1800, 2500,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* supported VDAC voltages in milivolts */</div><div class='add'>+/* supported VDAC voltages in millivolts */</div><div class='ctx'> static const u16 VDAC_VSEL_table[] = {</div><div class='ctx'> 	1800, 2600, 2800, 2850,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* supported VAUX1 voltages in milivolts */</div><div class='add'>+/* supported VAUX1 voltages in millivolts */</div><div class='ctx'> static const u16 VAUX1_VSEL_table[] = {</div><div class='ctx'> 	1800, 2500, 2800, 2850,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* supported VAUX2 voltages in milivolts */</div><div class='add'>+/* supported VAUX2 voltages in millivolts */</div><div class='ctx'> static const u16 VAUX2_VSEL_table[] = {</div><div class='ctx'> 	1800, 2800, 2900, 3300,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* supported VAUX33 voltages in milivolts */</div><div class='add'>+/* supported VAUX33 voltages in millivolts */</div><div class='ctx'> static const u16 VAUX33_VSEL_table[] = {</div><div class='ctx'> 	1800, 2000, 2800, 3300,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* supported VMMC voltages in milivolts */</div><div class='add'>+/* supported VMMC voltages in millivolts */</div><div class='ctx'> static const u16 VMMC_VSEL_table[] = {</div><div class='ctx'> 	1800, 2800, 3000, 3300,</div><div class='ctx'> };</div><div class='hunk'>@@ -94,11 +94,11 @@ struct tps_info {</div><div class='ctx'> </div><div class='ctx'> static struct tps_info tps65910_regs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VRTC",</div><div class='add'>+		.name = "vrtc",</div><div class='ctx'> 		.enable_time_us = 2200,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VIO",</div><div class='add'>+		.name = "vio",</div><div class='ctx'> 		.min_uV = 1500000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = ARRAY_SIZE(VIO_VSEL_table),</div><div class='hunk'>@@ -106,19 +106,19 @@ static struct tps_info tps65910_regs[] = {</div><div class='ctx'> 		.enable_time_us = 350,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VDD1",</div><div class='add'>+		.name = "vdd1",</div><div class='ctx'> 		.min_uV = 600000,</div><div class='ctx'> 		.max_uV = 4500000,</div><div class='ctx'> 		.enable_time_us = 350,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VDD2",</div><div class='add'>+		.name = "vdd2",</div><div class='ctx'> 		.min_uV = 600000,</div><div class='ctx'> 		.max_uV = 4500000,</div><div class='ctx'> 		.enable_time_us = 350,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VDD3",</div><div class='add'>+		.name = "vdd3",</div><div class='ctx'> 		.min_uV = 5000000,</div><div class='ctx'> 		.max_uV = 5000000,</div><div class='ctx'> 		.n_voltages = ARRAY_SIZE(VDD3_VSEL_table),</div><div class='hunk'>@@ -126,7 +126,7 @@ static struct tps_info tps65910_regs[] = {</div><div class='ctx'> 		.enable_time_us = 200,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VDIG1",</div><div class='add'>+		.name = "vdig1",</div><div class='ctx'> 		.min_uV = 1200000,</div><div class='ctx'> 		.max_uV = 2700000,</div><div class='ctx'> 		.n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),</div><div class='hunk'>@@ -134,7 +134,7 @@ static struct tps_info tps65910_regs[] = {</div><div class='ctx'> 		.enable_time_us = 100,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VDIG2",</div><div class='add'>+		.name = "vdig2",</div><div class='ctx'> 		.min_uV = 1000000,</div><div class='ctx'> 		.max_uV = 1800000,</div><div class='ctx'> 		.n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),</div><div class='hunk'>@@ -142,7 +142,7 @@ static struct tps_info tps65910_regs[] = {</div><div class='ctx'> 		.enable_time_us = 100,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VPLL",</div><div class='add'>+		.name = "vpll",</div><div class='ctx'> 		.min_uV = 1000000,</div><div class='ctx'> 		.max_uV = 2500000,</div><div class='ctx'> 		.n_voltages = ARRAY_SIZE(VPLL_VSEL_table),</div><div class='hunk'>@@ -150,7 +150,7 @@ static struct tps_info tps65910_regs[] = {</div><div class='ctx'> 		.enable_time_us = 100,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VDAC",</div><div class='add'>+		.name = "vdac",</div><div class='ctx'> 		.min_uV = 1800000,</div><div class='ctx'> 		.max_uV = 2850000,</div><div class='ctx'> 		.n_voltages = ARRAY_SIZE(VDAC_VSEL_table),</div><div class='hunk'>@@ -158,7 +158,7 @@ static struct tps_info tps65910_regs[] = {</div><div class='ctx'> 		.enable_time_us = 100,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VAUX1",</div><div class='add'>+		.name = "vaux1",</div><div class='ctx'> 		.min_uV = 1800000,</div><div class='ctx'> 		.max_uV = 2850000,</div><div class='ctx'> 		.n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),</div><div class='hunk'>@@ -166,7 +166,7 @@ static struct tps_info tps65910_regs[] = {</div><div class='ctx'> 		.enable_time_us = 100,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VAUX2",</div><div class='add'>+		.name = "vaux2",</div><div class='ctx'> 		.min_uV = 1800000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),</div><div class='hunk'>@@ -174,7 +174,7 @@ static struct tps_info tps65910_regs[] = {</div><div class='ctx'> 		.enable_time_us = 100,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VAUX33",</div><div class='add'>+		.name = "vaux33",</div><div class='ctx'> 		.min_uV = 1800000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),</div><div class='hunk'>@@ -182,7 +182,7 @@ static struct tps_info tps65910_regs[] = {</div><div class='ctx'> 		.enable_time_us = 100,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VMMC",</div><div class='add'>+		.name = "vmmc",</div><div class='ctx'> 		.min_uV = 1800000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = ARRAY_SIZE(VMMC_VSEL_table),</div><div class='hunk'>@@ -193,11 +193,11 @@ static struct tps_info tps65910_regs[] = {</div><div class='ctx'> </div><div class='ctx'> static struct tps_info tps65911_regs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VRTC",</div><div class='add'>+		.name = "vrtc",</div><div class='ctx'> 		.enable_time_us = 2200,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VIO",</div><div class='add'>+		.name = "vio",</div><div class='ctx'> 		.min_uV = 1500000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = ARRAY_SIZE(VIO_VSEL_table),</div><div class='hunk'>@@ -205,77 +205,77 @@ static struct tps_info tps65911_regs[] = {</div><div class='ctx'> 		.enable_time_us = 350,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VDD1",</div><div class='add'>+		.name = "vdd1",</div><div class='ctx'> 		.min_uV = 600000,</div><div class='ctx'> 		.max_uV = 4500000,</div><div class='ctx'> 		.n_voltages = 73,</div><div class='ctx'> 		.enable_time_us = 350,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VDD2",</div><div class='add'>+		.name = "vdd2",</div><div class='ctx'> 		.min_uV = 600000,</div><div class='ctx'> 		.max_uV = 4500000,</div><div class='ctx'> 		.n_voltages = 73,</div><div class='ctx'> 		.enable_time_us = 350,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "VDDCTRL",</div><div class='add'>+		.name = "vddctrl",</div><div class='ctx'> 		.min_uV = 600000,</div><div class='ctx'> 		.max_uV = 1400000,</div><div class='ctx'> 		.n_voltages = 65,</div><div class='ctx'> 		.enable_time_us = 900,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "LDO1",</div><div class='add'>+		.name = "ldo1",</div><div class='ctx'> 		.min_uV = 1000000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = 47,</div><div class='ctx'> 		.enable_time_us = 420,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "LDO2",</div><div class='add'>+		.name = "ldo2",</div><div class='ctx'> 		.min_uV = 1000000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = 47,</div><div class='ctx'> 		.enable_time_us = 420,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "LDO3",</div><div class='add'>+		.name = "ldo3",</div><div class='ctx'> 		.min_uV = 1000000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = 24,</div><div class='ctx'> 		.enable_time_us = 230,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "LDO4",</div><div class='add'>+		.name = "ldo4",</div><div class='ctx'> 		.min_uV = 1000000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = 47,</div><div class='ctx'> 		.enable_time_us = 230,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "LDO5",</div><div class='add'>+		.name = "ldo5",</div><div class='ctx'> 		.min_uV = 1000000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = 24,</div><div class='ctx'> 		.enable_time_us = 230,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "LDO6",</div><div class='add'>+		.name = "ldo6",</div><div class='ctx'> 		.min_uV = 1000000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = 24,</div><div class='ctx'> 		.enable_time_us = 230,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "LDO7",</div><div class='add'>+		.name = "ldo7",</div><div class='ctx'> 		.min_uV = 1000000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = 24,</div><div class='ctx'> 		.enable_time_us = 230,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='del'>-		.name = "LDO8",</div><div class='add'>+		.name = "ldo8",</div><div class='ctx'> 		.min_uV = 1000000,</div><div class='ctx'> 		.max_uV = 3300000,</div><div class='ctx'> 		.n_voltages = 24,</div><div class='hunk'>@@ -331,21 +331,16 @@ struct tps65910_reg {</div><div class='ctx'> </div><div class='ctx'> static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)</div><div class='ctx'> {</div><div class='del'>-	u8 val;</div><div class='add'>+	unsigned int val;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = pmic-&gt;mfd-&gt;read(pmic-&gt;mfd, reg, 1, &amp;val);</div><div class='add'>+	err = tps65910_reg_read(pmic-&gt;mfd, reg, &amp;val);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)</div><div class='del'>-{</div><div class='del'>-	return pmic-&gt;mfd-&gt;write(pmic-&gt;mfd, reg, 1, &amp;val);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,</div><div class='ctx'> 					u8 set_mask, u8 clear_mask)</div><div class='ctx'> {</div><div class='hunk'>@@ -362,7 +357,7 @@ static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,</div><div class='ctx'> </div><div class='ctx'> 	data &amp;= ~clear_mask;</div><div class='ctx'> 	data |= set_mask;</div><div class='del'>-	err = tps65910_write(pmic, reg, data);</div><div class='add'>+	err = tps65910_reg_write(pmic-&gt;mfd, reg, data);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		dev_err(pmic-&gt;mfd-&gt;dev, "Write for reg 0x%x failed\n", reg);</div><div class='ctx'> </div><div class='hunk'>@@ -371,7 +366,7 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)</div><div class='add'>+static int tps65910_reg_read_locked(struct tps65910_reg *pmic, u8 reg)</div><div class='ctx'> {</div><div class='ctx'> 	int data;</div><div class='ctx'> </div><div class='hunk'>@@ -385,13 +380,13 @@ static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)</div><div class='ctx'> 	return data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val)</div><div class='add'>+static int tps65910_reg_write_locked(struct tps65910_reg *pmic, u8 reg, u8 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pmic-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	err = tps65910_write(pmic, reg, val);</div><div class='add'>+	err = tps65910_reg_write(pmic-&gt;mfd, reg, val);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		dev_err(pmic-&gt;mfd-&gt;dev, "Write for reg 0x%x failed\n", reg);</div><div class='ctx'> </div><div class='hunk'>@@ -467,48 +462,6 @@ static int tps65911_get_ctrl_register(int id)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65910_is_enabled(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct tps65910_reg *pmic = rdev_get_drvdata(dev);</div><div class='del'>-	int reg, value, id = rdev_get_id(dev);</div><div class='del'>-</div><div class='del'>-	reg = pmic-&gt;get_ctrl_reg(id);</div><div class='del'>-	if (reg &lt; 0)</div><div class='del'>-		return reg;</div><div class='del'>-</div><div class='del'>-	value = tps65910_reg_read(pmic, reg);</div><div class='del'>-	if (value &lt; 0)</div><div class='del'>-		return value;</div><div class='del'>-</div><div class='del'>-	return value &amp; TPS65910_SUPPLY_STATE_ENABLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tps65910_enable(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct tps65910_reg *pmic = rdev_get_drvdata(dev);</div><div class='del'>-	struct tps65910 *mfd = pmic-&gt;mfd;</div><div class='del'>-	int reg, id = rdev_get_id(dev);</div><div class='del'>-</div><div class='del'>-	reg = pmic-&gt;get_ctrl_reg(id);</div><div class='del'>-	if (reg &lt; 0)</div><div class='del'>-		return reg;</div><div class='del'>-</div><div class='del'>-	return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tps65910_disable(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct tps65910_reg *pmic = rdev_get_drvdata(dev);</div><div class='del'>-	struct tps65910 *mfd = pmic-&gt;mfd;</div><div class='del'>-	int reg, id = rdev_get_id(dev);</div><div class='del'>-</div><div class='del'>-	reg = pmic-&gt;get_ctrl_reg(id);</div><div class='del'>-	if (reg &lt; 0)</div><div class='del'>-		return reg;</div><div class='del'>-</div><div class='del'>-	return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int tps65910_enable_time(struct regulator_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65910_reg *pmic = rdev_get_drvdata(dev);</div><div class='hunk'>@@ -532,9 +485,9 @@ static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)</div><div class='ctx'> 							LDO_ST_MODE_BIT);</div><div class='ctx'> 	case REGULATOR_MODE_IDLE:</div><div class='ctx'> 		value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;</div><div class='del'>-		return tps65910_set_bits(mfd, reg, value);</div><div class='add'>+		return tps65910_reg_set_bits(mfd, reg, value);</div><div class='ctx'> 	case REGULATOR_MODE_STANDBY:</div><div class='del'>-		return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT);</div><div class='add'>+		return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return -EINVAL;</div><div class='hunk'>@@ -549,7 +502,7 @@ static unsigned int tps65910_get_mode(struct regulator_dev *dev)</div><div class='ctx'> 	if (reg &lt; 0)</div><div class='ctx'> 		return reg;</div><div class='ctx'> </div><div class='del'>-	value = tps65910_reg_read(pmic, reg);</div><div class='add'>+	value = tps65910_reg_read_locked(pmic, reg);</div><div class='ctx'> 	if (value &lt; 0)</div><div class='ctx'> 		return value;</div><div class='ctx'> </div><div class='hunk'>@@ -569,28 +522,28 @@ static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	switch (id) {</div><div class='ctx'> 	case TPS65910_REG_VDD1:</div><div class='del'>-		opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP);</div><div class='del'>-		mult = tps65910_reg_read(pmic, TPS65910_VDD1);</div><div class='add'>+		opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_OP);</div><div class='add'>+		mult = tps65910_reg_read_locked(pmic, TPS65910_VDD1);</div><div class='ctx'> 		mult = (mult &amp; VDD1_VGAIN_SEL_MASK) &gt;&gt; VDD1_VGAIN_SEL_SHIFT;</div><div class='del'>-		srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR);</div><div class='add'>+		srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_SR);</div><div class='ctx'> 		sr = opvsel &amp; VDD1_OP_CMD_MASK;</div><div class='ctx'> 		opvsel &amp;= VDD1_OP_SEL_MASK;</div><div class='ctx'> 		srvsel &amp;= VDD1_SR_SEL_MASK;</div><div class='ctx'> 		vselmax = 75;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TPS65910_REG_VDD2:</div><div class='del'>-		opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP);</div><div class='del'>-		mult = tps65910_reg_read(pmic, TPS65910_VDD2);</div><div class='add'>+		opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_OP);</div><div class='add'>+		mult = tps65910_reg_read_locked(pmic, TPS65910_VDD2);</div><div class='ctx'> 		mult = (mult &amp; VDD2_VGAIN_SEL_MASK) &gt;&gt; VDD2_VGAIN_SEL_SHIFT;</div><div class='del'>-		srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR);</div><div class='add'>+		srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_SR);</div><div class='ctx'> 		sr = opvsel &amp; VDD2_OP_CMD_MASK;</div><div class='ctx'> 		opvsel &amp;= VDD2_OP_SEL_MASK;</div><div class='ctx'> 		srvsel &amp;= VDD2_SR_SEL_MASK;</div><div class='ctx'> 		vselmax = 75;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TPS65911_REG_VDDCTRL:</div><div class='del'>-		opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP);</div><div class='del'>-		srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR);</div><div class='add'>+		opvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_OP);</div><div class='add'>+		srvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_SR);</div><div class='ctx'> 		sr = opvsel &amp; VDDCTRL_OP_CMD_MASK;</div><div class='ctx'> 		opvsel &amp;= VDDCTRL_OP_SEL_MASK;</div><div class='ctx'> 		srvsel &amp;= VDDCTRL_SR_SEL_MASK;</div><div class='hunk'>@@ -621,16 +574,16 @@ static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65910_get_voltage(struct regulator_dev *dev)</div><div class='add'>+static int tps65910_get_voltage_sel(struct regulator_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65910_reg *pmic = rdev_get_drvdata(dev);</div><div class='del'>-	int reg, value, id = rdev_get_id(dev), voltage = 0;</div><div class='add'>+	int reg, value, id = rdev_get_id(dev);</div><div class='ctx'> </div><div class='ctx'> 	reg = pmic-&gt;get_ctrl_reg(id);</div><div class='ctx'> 	if (reg &lt; 0)</div><div class='ctx'> 		return reg;</div><div class='ctx'> </div><div class='del'>-	value = tps65910_reg_read(pmic, reg);</div><div class='add'>+	value = tps65910_reg_read_locked(pmic, reg);</div><div class='ctx'> 	if (value &lt; 0)</div><div class='ctx'> 		return value;</div><div class='ctx'> </div><div class='hunk'>@@ -651,9 +604,7 @@ static int tps65910_get_voltage(struct regulator_dev *dev)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	voltage = pmic-&gt;info[id]-&gt;voltage_table[value] * 1000;</div><div class='del'>-</div><div class='del'>-	return voltage;</div><div class='add'>+	return value;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)</div><div class='hunk'>@@ -661,15 +612,15 @@ static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)</div><div class='ctx'> 	return 5 * 1000 * 1000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65911_get_voltage(struct regulator_dev *dev)</div><div class='add'>+static int tps65911_get_voltage_sel(struct regulator_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65910_reg *pmic = rdev_get_drvdata(dev);</div><div class='del'>-	int step_mv, id = rdev_get_id(dev);</div><div class='add'>+	int id = rdev_get_id(dev);</div><div class='ctx'> 	u8 value, reg;</div><div class='ctx'> </div><div class='ctx'> 	reg = pmic-&gt;get_ctrl_reg(id);</div><div class='ctx'> </div><div class='del'>-	value = tps65910_reg_read(pmic, reg);</div><div class='add'>+	value = tps65910_reg_read_locked(pmic, reg);</div><div class='ctx'> </div><div class='ctx'> 	switch (id) {</div><div class='ctx'> 	case TPS65911_REG_LDO1:</div><div class='hunk'>@@ -677,13 +628,6 @@ static int tps65911_get_voltage(struct regulator_dev *dev)</div><div class='ctx'> 	case TPS65911_REG_LDO4:</div><div class='ctx'> 		value &amp;= LDO1_SEL_MASK;</div><div class='ctx'> 		value &gt;&gt;= LDO_SEL_SHIFT;</div><div class='del'>-		/* The first 5 values of the selector correspond to 1V */</div><div class='del'>-		if (value &lt; 5)</div><div class='del'>-			value = 0;</div><div class='del'>-		else</div><div class='del'>-			value -= 4;</div><div class='del'>-</div><div class='del'>-		step_mv = 50;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TPS65911_REG_LDO3:</div><div class='ctx'> 	case TPS65911_REG_LDO5:</div><div class='hunk'>@@ -692,23 +636,16 @@ static int tps65911_get_voltage(struct regulator_dev *dev)</div><div class='ctx'> 	case TPS65911_REG_LDO8:</div><div class='ctx'> 		value &amp;= LDO3_SEL_MASK;</div><div class='ctx'> 		value &gt;&gt;= LDO_SEL_SHIFT;</div><div class='del'>-		/* The first 3 values of the selector correspond to 1V */</div><div class='del'>-		if (value &lt; 3)</div><div class='del'>-			value = 0;</div><div class='del'>-		else</div><div class='del'>-			value -= 2;</div><div class='del'>-</div><div class='del'>-		step_mv = 100;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TPS65910_REG_VIO:</div><div class='ctx'> 		value &amp;= LDO_SEL_MASK;</div><div class='ctx'> 		value &gt;&gt;= LDO_SEL_SHIFT;</div><div class='del'>-		return pmic-&gt;info[id]-&gt;voltage_table[value] * 1000;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return (LDO_MIN_VOLT + value * step_mv) * 1000;</div><div class='add'>+	return value;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,</div><div class='hunk'>@@ -728,7 +665,7 @@ static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,</div><div class='ctx'> 		tps65910_modify_bits(pmic, TPS65910_VDD1,</div><div class='ctx'> 				(dcdc_mult &lt;&lt; VDD1_VGAIN_SEL_SHIFT),</div><div class='ctx'> 						VDD1_VGAIN_SEL_MASK);</div><div class='del'>-		tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel);</div><div class='add'>+		tps65910_reg_write_locked(pmic, TPS65910_VDD1_OP, vsel);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TPS65910_REG_VDD2:</div><div class='ctx'> 		dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;</div><div class='hunk'>@@ -739,11 +676,11 @@ static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,</div><div class='ctx'> 		tps65910_modify_bits(pmic, TPS65910_VDD2,</div><div class='ctx'> 				(dcdc_mult &lt;&lt; VDD2_VGAIN_SEL_SHIFT),</div><div class='ctx'> 						VDD1_VGAIN_SEL_MASK);</div><div class='del'>-		tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);</div><div class='add'>+		tps65910_reg_write_locked(pmic, TPS65910_VDD2_OP, vsel);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TPS65911_REG_VDDCTRL:</div><div class='ctx'> 		vsel = selector + 3;</div><div class='del'>-		tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);</div><div class='add'>+		tps65910_reg_write_locked(pmic, TPS65911_VDDCTRL_OP, vsel);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -914,9 +851,9 @@ static int tps65910_set_voltage_dcdc_time_sel(struct regulator_dev *dev,</div><div class='ctx'> </div><div class='ctx'> /* Regulator ops (except VRTC) */</div><div class='ctx'> static struct regulator_ops tps65910_ops_dcdc = {</div><div class='del'>-	.is_enabled		= tps65910_is_enabled,</div><div class='del'>-	.enable			= tps65910_enable,</div><div class='del'>-	.disable		= tps65910_disable,</div><div class='add'>+	.is_enabled		= regulator_is_enabled_regmap,</div><div class='add'>+	.enable			= regulator_enable_regmap,</div><div class='add'>+	.disable		= regulator_disable_regmap,</div><div class='ctx'> 	.enable_time		= tps65910_enable_time,</div><div class='ctx'> 	.set_mode		= tps65910_set_mode,</div><div class='ctx'> 	.get_mode		= tps65910_get_mode,</div><div class='hunk'>@@ -927,9 +864,9 @@ static struct regulator_ops tps65910_ops_dcdc = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops tps65910_ops_vdd3 = {</div><div class='del'>-	.is_enabled		= tps65910_is_enabled,</div><div class='del'>-	.enable			= tps65910_enable,</div><div class='del'>-	.disable		= tps65910_disable,</div><div class='add'>+	.is_enabled		= regulator_is_enabled_regmap,</div><div class='add'>+	.enable			= regulator_enable_regmap,</div><div class='add'>+	.disable		= regulator_disable_regmap,</div><div class='ctx'> 	.enable_time		= tps65910_enable_time,</div><div class='ctx'> 	.set_mode		= tps65910_set_mode,</div><div class='ctx'> 	.get_mode		= tps65910_get_mode,</div><div class='hunk'>@@ -938,25 +875,25 @@ static struct regulator_ops tps65910_ops_vdd3 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops tps65910_ops = {</div><div class='del'>-	.is_enabled		= tps65910_is_enabled,</div><div class='del'>-	.enable			= tps65910_enable,</div><div class='del'>-	.disable		= tps65910_disable,</div><div class='add'>+	.is_enabled		= regulator_is_enabled_regmap,</div><div class='add'>+	.enable			= regulator_enable_regmap,</div><div class='add'>+	.disable		= regulator_disable_regmap,</div><div class='ctx'> 	.enable_time		= tps65910_enable_time,</div><div class='ctx'> 	.set_mode		= tps65910_set_mode,</div><div class='ctx'> 	.get_mode		= tps65910_get_mode,</div><div class='del'>-	.get_voltage		= tps65910_get_voltage,</div><div class='add'>+	.get_voltage_sel	= tps65910_get_voltage_sel,</div><div class='ctx'> 	.set_voltage_sel	= tps65910_set_voltage_sel,</div><div class='ctx'> 	.list_voltage		= tps65910_list_voltage,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops tps65911_ops = {</div><div class='del'>-	.is_enabled		= tps65910_is_enabled,</div><div class='del'>-	.enable			= tps65910_enable,</div><div class='del'>-	.disable		= tps65910_disable,</div><div class='add'>+	.is_enabled		= regulator_is_enabled_regmap,</div><div class='add'>+	.enable			= regulator_enable_regmap,</div><div class='add'>+	.disable		= regulator_disable_regmap,</div><div class='ctx'> 	.enable_time		= tps65910_enable_time,</div><div class='ctx'> 	.set_mode		= tps65910_set_mode,</div><div class='ctx'> 	.get_mode		= tps65910_get_mode,</div><div class='del'>-	.get_voltage		= tps65911_get_voltage,</div><div class='add'>+	.get_voltage_sel	= tps65911_get_voltage_sel,</div><div class='ctx'> 	.set_voltage_sel	= tps65911_set_voltage_sel,</div><div class='ctx'> 	.list_voltage		= tps65911_list_voltage,</div><div class='ctx'> };</div><div class='hunk'>@@ -994,10 +931,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,</div><div class='ctx'> </div><div class='ctx'> 	/* External EN1 control */</div><div class='ctx'> 	if (ext_sleep_config &amp; TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)</div><div class='del'>-		ret = tps65910_set_bits(mfd,</div><div class='add'>+		ret = tps65910_reg_set_bits(mfd,</div><div class='ctx'> 				TPS65910_EN1_LDO_ASS + regoffs, bit_pos);</div><div class='ctx'> 	else</div><div class='del'>-		ret = tps65910_clear_bits(mfd,</div><div class='add'>+		ret = tps65910_reg_clear_bits(mfd,</div><div class='ctx'> 				TPS65910_EN1_LDO_ASS + regoffs, bit_pos);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		dev_err(mfd-&gt;dev,</div><div class='hunk'>@@ -1007,10 +944,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,</div><div class='ctx'> </div><div class='ctx'> 	/* External EN2 control */</div><div class='ctx'> 	if (ext_sleep_config &amp; TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)</div><div class='del'>-		ret = tps65910_set_bits(mfd,</div><div class='add'>+		ret = tps65910_reg_set_bits(mfd,</div><div class='ctx'> 				TPS65910_EN2_LDO_ASS + regoffs, bit_pos);</div><div class='ctx'> 	else</div><div class='del'>-		ret = tps65910_clear_bits(mfd,</div><div class='add'>+		ret = tps65910_reg_clear_bits(mfd,</div><div class='ctx'> 				TPS65910_EN2_LDO_ASS + regoffs, bit_pos);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		dev_err(mfd-&gt;dev,</div><div class='hunk'>@@ -1022,10 +959,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,</div><div class='ctx'> 	if ((tps65910_chip_id(mfd) == TPS65910) &amp;&amp;</div><div class='ctx'> 			(id &gt;= TPS65910_REG_VDIG1)) {</div><div class='ctx'> 		if (ext_sleep_config &amp; TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)</div><div class='del'>-			ret = tps65910_set_bits(mfd,</div><div class='add'>+			ret = tps65910_reg_set_bits(mfd,</div><div class='ctx'> 				TPS65910_EN3_LDO_ASS + regoffs, bit_pos);</div><div class='ctx'> 		else</div><div class='del'>-			ret = tps65910_clear_bits(mfd,</div><div class='add'>+			ret = tps65910_reg_clear_bits(mfd,</div><div class='ctx'> 				TPS65910_EN3_LDO_ASS + regoffs, bit_pos);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			dev_err(mfd-&gt;dev,</div><div class='hunk'>@@ -1037,10 +974,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,</div><div class='ctx'> 	/* Return if no external control is selected */</div><div class='ctx'> 	if (!(ext_sleep_config &amp; EXT_SLEEP_CONTROL)) {</div><div class='ctx'> 		/* Clear all sleep controls */</div><div class='del'>-		ret = tps65910_clear_bits(mfd,</div><div class='add'>+		ret = tps65910_reg_clear_bits(mfd,</div><div class='ctx'> 			TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);</div><div class='ctx'> 		if (!ret)</div><div class='del'>-			ret = tps65910_clear_bits(mfd,</div><div class='add'>+			ret = tps65910_reg_clear_bits(mfd,</div><div class='ctx'> 				TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			dev_err(mfd-&gt;dev,</div><div class='hunk'>@@ -1059,32 +996,33 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,</div><div class='ctx'> 				(tps65910_chip_id(mfd) == TPS65911))) {</div><div class='ctx'> 		int op_reg_add = pmic-&gt;get_ctrl_reg(id) + 1;</div><div class='ctx'> 		int sr_reg_add = pmic-&gt;get_ctrl_reg(id) + 2;</div><div class='del'>-		int opvsel = tps65910_reg_read(pmic, op_reg_add);</div><div class='del'>-		int srvsel = tps65910_reg_read(pmic, sr_reg_add);</div><div class='add'>+		int opvsel = tps65910_reg_read_locked(pmic, op_reg_add);</div><div class='add'>+		int srvsel = tps65910_reg_read_locked(pmic, sr_reg_add);</div><div class='ctx'> 		if (opvsel &amp; VDD1_OP_CMD_MASK) {</div><div class='ctx'> 			u8 reg_val = srvsel &amp; VDD1_OP_SEL_MASK;</div><div class='del'>-			ret = tps65910_reg_write(pmic, op_reg_add, reg_val);</div><div class='add'>+			ret = tps65910_reg_write_locked(pmic, op_reg_add,</div><div class='add'>+							reg_val);</div><div class='ctx'> 			if (ret &lt; 0) {</div><div class='ctx'> 				dev_err(mfd-&gt;dev,</div><div class='ctx'> 					"Error in configuring op register\n");</div><div class='ctx'> 				return ret;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		ret = tps65910_reg_write(pmic, sr_reg_add, 0);</div><div class='add'>+		ret = tps65910_reg_write_locked(pmic, sr_reg_add, 0);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			dev_err(mfd-&gt;dev, "Error in settting sr register\n");</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = tps65910_clear_bits(mfd,</div><div class='add'>+	ret = tps65910_reg_clear_bits(mfd,</div><div class='ctx'> 			TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		if (ext_sleep_config &amp; TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)</div><div class='del'>-			ret = tps65910_set_bits(mfd,</div><div class='add'>+			ret = tps65910_reg_set_bits(mfd,</div><div class='ctx'> 				TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);</div><div class='ctx'> 		else</div><div class='del'>-			ret = tps65910_clear_bits(mfd,</div><div class='add'>+			ret = tps65910_reg_clear_bits(mfd,</div><div class='ctx'> 				TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -1094,30 +1032,148 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+</div><div class='add'>+static struct of_regulator_match tps65910_matches[] = {</div><div class='add'>+	{ .name = "vrtc",	.driver_data = (void *) &amp;tps65910_regs[0] },</div><div class='add'>+	{ .name = "vio",	.driver_data = (void *) &amp;tps65910_regs[1] },</div><div class='add'>+	{ .name = "vdd1",	.driver_data = (void *) &amp;tps65910_regs[2] },</div><div class='add'>+	{ .name = "vdd2",	.driver_data = (void *) &amp;tps65910_regs[3] },</div><div class='add'>+	{ .name = "vdd3",	.driver_data = (void *) &amp;tps65910_regs[4] },</div><div class='add'>+	{ .name = "vdig1",	.driver_data = (void *) &amp;tps65910_regs[5] },</div><div class='add'>+	{ .name = "vdig2",	.driver_data = (void *) &amp;tps65910_regs[6] },</div><div class='add'>+	{ .name = "vpll",	.driver_data = (void *) &amp;tps65910_regs[7] },</div><div class='add'>+	{ .name = "vdac",	.driver_data = (void *) &amp;tps65910_regs[8] },</div><div class='add'>+	{ .name = "vaux1",	.driver_data = (void *) &amp;tps65910_regs[9] },</div><div class='add'>+	{ .name = "vaux2",	.driver_data = (void *) &amp;tps65910_regs[10] },</div><div class='add'>+	{ .name = "vaux33",	.driver_data = (void *) &amp;tps65910_regs[11] },</div><div class='add'>+	{ .name = "vmmc",	.driver_data = (void *) &amp;tps65910_regs[12] },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct of_regulator_match tps65911_matches[] = {</div><div class='add'>+	{ .name = "vrtc",	.driver_data = (void *) &amp;tps65911_regs[0] },</div><div class='add'>+	{ .name = "vio",	.driver_data = (void *) &amp;tps65911_regs[1] },</div><div class='add'>+	{ .name = "vdd1",	.driver_data = (void *) &amp;tps65911_regs[2] },</div><div class='add'>+	{ .name = "vdd2",	.driver_data = (void *) &amp;tps65911_regs[3] },</div><div class='add'>+	{ .name = "vddctrl",	.driver_data = (void *) &amp;tps65911_regs[4] },</div><div class='add'>+	{ .name = "ldo1",	.driver_data = (void *) &amp;tps65911_regs[5] },</div><div class='add'>+	{ .name = "ldo2",	.driver_data = (void *) &amp;tps65911_regs[6] },</div><div class='add'>+	{ .name = "ldo3",	.driver_data = (void *) &amp;tps65911_regs[7] },</div><div class='add'>+	{ .name = "ldo4",	.driver_data = (void *) &amp;tps65911_regs[8] },</div><div class='add'>+	{ .name = "ldo5",	.driver_data = (void *) &amp;tps65911_regs[9] },</div><div class='add'>+	{ .name = "ldo6",	.driver_data = (void *) &amp;tps65911_regs[10] },</div><div class='add'>+	{ .name = "ldo7",	.driver_data = (void *) &amp;tps65911_regs[11] },</div><div class='add'>+	{ .name = "ldo8",	.driver_data = (void *) &amp;tps65911_regs[12] },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct tps65910_board *tps65910_parse_dt_reg_data(</div><div class='add'>+		struct platform_device *pdev,</div><div class='add'>+		struct of_regulator_match **tps65910_reg_matches)</div><div class='add'>+{</div><div class='add'>+	struct tps65910_board *pmic_plat_data;</div><div class='add'>+	struct tps65910 *tps65910 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.parent-&gt;of_node;</div><div class='add'>+	struct device_node *regulators;</div><div class='add'>+	struct of_regulator_match *matches;</div><div class='add'>+	unsigned int prop;</div><div class='add'>+	int idx = 0, ret, count;</div><div class='add'>+</div><div class='add'>+	pmic_plat_data = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*pmic_plat_data),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!pmic_plat_data) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failure to alloc pdata for regulators.\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regulators = of_find_node_by_name(np, "regulators");</div><div class='add'>+	if (!regulators) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "regulator node not found\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (tps65910_chip_id(tps65910)) {</div><div class='add'>+	case TPS65910:</div><div class='add'>+		count = ARRAY_SIZE(tps65910_matches);</div><div class='add'>+		matches = tps65910_matches;</div><div class='add'>+		break;</div><div class='add'>+	case TPS65911:</div><div class='add'>+		count = ARRAY_SIZE(tps65911_matches);</div><div class='add'>+		matches = tps65911_matches;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Invalid tps chip version\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = of_regulator_match(pdev-&gt;dev.parent, regulators, matches, count);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Error parsing regulator init data: %d\n",</div><div class='add'>+			ret);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*tps65910_reg_matches = matches;</div><div class='add'>+</div><div class='add'>+	for (idx = 0; idx &lt; count; idx++) {</div><div class='add'>+		if (!matches[idx].init_data || !matches[idx].of_node)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pmic_plat_data-&gt;tps65910_pmic_init_data[idx] =</div><div class='add'>+							matches[idx].init_data;</div><div class='add'>+</div><div class='add'>+		ret = of_property_read_u32(matches[idx].of_node,</div><div class='add'>+				"ti,regulator-ext-sleep-control", &amp;prop);</div><div class='add'>+		if (!ret)</div><div class='add'>+			pmic_plat_data-&gt;regulator_ext_sleep_control[idx] = prop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pmic_plat_data;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline struct tps65910_board *tps65910_parse_dt_reg_data(</div><div class='add'>+			struct platform_device *pdev,</div><div class='add'>+			struct of_regulator_match **tps65910_reg_matches)</div><div class='add'>+{</div><div class='add'>+	*tps65910_reg_matches = NULL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static __devinit int tps65910_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65910 *tps65910 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct tps_info *info;</div><div class='ctx'> 	struct regulator_init_data *reg_data;</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> 	struct tps65910_reg *pmic;</div><div class='ctx'> 	struct tps65910_board *pmic_plat_data;</div><div class='add'>+	struct of_regulator_match *tps65910_reg_matches = NULL;</div><div class='ctx'> 	int i, err;</div><div class='ctx'> </div><div class='ctx'> 	pmic_plat_data = dev_get_platdata(tps65910-&gt;dev);</div><div class='del'>-	if (!pmic_plat_data)</div><div class='add'>+	if (!pmic_plat_data &amp;&amp; tps65910-&gt;dev-&gt;of_node)</div><div class='add'>+		pmic_plat_data = tps65910_parse_dt_reg_data(pdev,</div><div class='add'>+						&amp;tps65910_reg_matches);</div><div class='add'>+</div><div class='add'>+	if (!pmic_plat_data) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Platform data not found\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	pmic = kzalloc(sizeof(*pmic), GFP_KERNEL);</div><div class='del'>-	if (!pmic)</div><div class='add'>+	pmic = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*pmic), GFP_KERNEL);</div><div class='add'>+	if (!pmic) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Memory allocation failed for pmic\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;pmic-&gt;mutex);</div><div class='ctx'> 	pmic-&gt;mfd = tps65910;</div><div class='ctx'> 	platform_set_drvdata(pdev, pmic);</div><div class='ctx'> </div><div class='ctx'> 	/* Give control of all register to control port */</div><div class='del'>-	tps65910_set_bits(pmic-&gt;mfd, TPS65910_DEVCTRL,</div><div class='add'>+	tps65910_reg_set_bits(pmic-&gt;mfd, TPS65910_DEVCTRL,</div><div class='ctx'> 				DEVCTRL_SR_CTL_I2C_SEL_MASK);</div><div class='ctx'> </div><div class='ctx'> 	switch(tps65910_chip_id(tps65910)) {</div><div class='hunk'>@@ -1134,30 +1190,29 @@ static __devinit int tps65910_probe(struct platform_device *pdev)</div><div class='ctx'> 		info = tps65911_regs;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		pr_err("Invalid tps chip version\n");</div><div class='del'>-		kfree(pmic);</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Invalid tps chip version\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pmic-&gt;desc = kcalloc(pmic-&gt;num_regulators,</div><div class='add'>+	pmic-&gt;desc = devm_kzalloc(&amp;pdev-&gt;dev, pmic-&gt;num_regulators *</div><div class='ctx'> 			sizeof(struct regulator_desc), GFP_KERNEL);</div><div class='ctx'> 	if (!pmic-&gt;desc) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_free_pmic;</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Memory alloc fails for desc\n");</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pmic-&gt;info = kcalloc(pmic-&gt;num_regulators,</div><div class='add'>+	pmic-&gt;info = devm_kzalloc(&amp;pdev-&gt;dev, pmic-&gt;num_regulators *</div><div class='ctx'> 			sizeof(struct tps_info *), GFP_KERNEL);</div><div class='ctx'> 	if (!pmic-&gt;info) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_free_desc;</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Memory alloc fails for info\n");</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pmic-&gt;rdev = kcalloc(pmic-&gt;num_regulators,</div><div class='add'>+	pmic-&gt;rdev = devm_kzalloc(&amp;pdev-&gt;dev, pmic-&gt;num_regulators *</div><div class='ctx'> 			sizeof(struct regulator_dev *), GFP_KERNEL);</div><div class='ctx'> 	if (!pmic-&gt;rdev) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_free_info;</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Memory alloc fails for rdev\n");</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; pmic-&gt;num_regulators &amp;&amp; i &lt; TPS65910_NUM_REGS;</div><div class='hunk'>@@ -1205,9 +1260,18 @@ static __devinit int tps65910_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 		pmic-&gt;desc[i].type = REGULATOR_VOLTAGE;</div><div class='ctx'> 		pmic-&gt;desc[i].owner = THIS_MODULE;</div><div class='add'>+		pmic-&gt;desc[i].enable_reg = pmic-&gt;get_ctrl_reg(i);</div><div class='add'>+		pmic-&gt;desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;</div><div class='add'>+</div><div class='add'>+		config.dev = tps65910-&gt;dev;</div><div class='add'>+		config.init_data = reg_data;</div><div class='add'>+		config.driver_data = pmic;</div><div class='add'>+		config.regmap = tps65910-&gt;regmap;</div><div class='add'>+</div><div class='add'>+		if (tps65910_reg_matches)</div><div class='add'>+			config.of_node = tps65910_reg_matches[i].of_node;</div><div class='ctx'> </div><div class='del'>-		rdev = regulator_register(&amp;pmic-&gt;desc[i],</div><div class='del'>-				tps65910-&gt;dev, reg_data, pmic, NULL);</div><div class='add'>+		rdev = regulator_register(&amp;pmic-&gt;desc[i], &amp;config);</div><div class='ctx'> 		if (IS_ERR(rdev)) {</div><div class='ctx'> 			dev_err(tps65910-&gt;dev,</div><div class='ctx'> 				"failed to register %s regulator\n",</div><div class='hunk'>@@ -1224,13 +1288,6 @@ static __devinit int tps65910_probe(struct platform_device *pdev)</div><div class='ctx'> err_unregister_regulator:</div><div class='ctx'> 	while (--i &gt;= 0)</div><div class='ctx'> 		regulator_unregister(pmic-&gt;rdev[i]);</div><div class='del'>-	kfree(pmic-&gt;rdev);</div><div class='del'>-err_free_info:</div><div class='del'>-	kfree(pmic-&gt;info);</div><div class='del'>-err_free_desc:</div><div class='del'>-	kfree(pmic-&gt;desc);</div><div class='del'>-err_free_pmic:</div><div class='del'>-	kfree(pmic);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1242,10 +1299,6 @@ static int __devexit tps65910_remove(struct platform_device *pdev)</div><div class='ctx'> 	for (i = 0; i &lt; pmic-&gt;num_regulators; i++)</div><div class='ctx'> 		regulator_unregister(pmic-&gt;rdev[i]);</div><div class='ctx'> </div><div class='del'>-	kfree(pmic-&gt;rdev);</div><div class='del'>-	kfree(pmic-&gt;info);</div><div class='del'>-	kfree(pmic-&gt;desc);</div><div class='del'>-	kfree(pmic);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/tps65912-regulator.c b/drivers/regulator/tps65912-regulator.c<br/>index b36799b1f530..18b2a1dcb4b5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/tps65912-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/tps65912-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/tps65912-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/tps65912-regulator.c</a></div><div class='hunk'>@@ -20,7 +20,6 @@</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/tps65912.h&gt;</div><div class='hunk'>@@ -372,12 +371,14 @@ static unsigned int tps65912_get_mode(struct regulator_dev *dev)</div><div class='ctx'> 	return mode;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65912_list_voltage_dcdc(struct regulator_dev *dev,</div><div class='del'>-					unsigned selector)</div><div class='add'>+static int tps65912_list_voltage(struct regulator_dev *dev, unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65912_reg *pmic = rdev_get_drvdata(dev);</div><div class='ctx'> 	int range, voltage = 0, id = rdev_get_id(dev);</div><div class='ctx'> </div><div class='add'>+	if (id &gt;= TPS65912_REG_LDO1 &amp;&amp; id &lt;= TPS65912_REG_LDO10)</div><div class='add'>+		return tps65912_vsel_to_uv_ldo(selector);</div><div class='add'>+</div><div class='ctx'> 	if (id &gt; TPS65912_REG_DCDC4)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -404,7 +405,7 @@ static int tps65912_list_voltage_dcdc(struct regulator_dev *dev,</div><div class='ctx'> 	return voltage;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65912_get_voltage_dcdc(struct regulator_dev *dev)</div><div class='add'>+static int tps65912_get_voltage_sel(struct regulator_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65912_reg *pmic = rdev_get_drvdata(dev);</div><div class='ctx'> 	struct tps65912 *mfd = pmic-&gt;mfd;</div><div class='hunk'>@@ -418,7 +419,7 @@ static int tps65912_get_voltage_dcdc(struct regulator_dev *dev)</div><div class='ctx'> 	vsel = tps65912_reg_read(mfd, reg);</div><div class='ctx'> 	vsel &amp;= 0x3F;</div><div class='ctx'> </div><div class='del'>-	return tps65912_list_voltage_dcdc(dev, vsel);</div><div class='add'>+	return vsel;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tps65912_set_voltage_sel(struct regulator_dev *dev,</div><div class='hunk'>@@ -436,32 +437,6 @@ static int tps65912_set_voltage_sel(struct regulator_dev *dev,</div><div class='ctx'> 	return tps65912_reg_write(mfd, reg, selector | value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps65912_get_voltage_ldo(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct tps65912_reg *pmic = rdev_get_drvdata(dev);</div><div class='del'>-	struct tps65912 *mfd = pmic-&gt;mfd;</div><div class='del'>-	int id = rdev_get_id(dev);</div><div class='del'>-	int vsel = 0;</div><div class='del'>-	u8 reg;</div><div class='del'>-</div><div class='del'>-	reg = tps65912_get_sel_register(pmic, id);</div><div class='del'>-	vsel = tps65912_reg_read(mfd, reg);</div><div class='del'>-	vsel &amp;= 0x3F;</div><div class='del'>-</div><div class='del'>-	return tps65912_vsel_to_uv_ldo(vsel);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tps65912_list_voltage_ldo(struct regulator_dev *dev,</div><div class='del'>-					unsigned selector)</div><div class='del'>-{</div><div class='del'>-	int ldo = rdev_get_id(dev);</div><div class='del'>-</div><div class='del'>-	if (ldo &lt; TPS65912_REG_LDO1 || ldo &gt; TPS65912_REG_LDO10)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return tps65912_vsel_to_uv_ldo(selector);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Operations permitted on DCDCx */</div><div class='ctx'> static struct regulator_ops tps65912_ops_dcdc = {</div><div class='ctx'> 	.is_enabled = tps65912_reg_is_enabled,</div><div class='hunk'>@@ -469,9 +444,9 @@ static struct regulator_ops tps65912_ops_dcdc = {</div><div class='ctx'> 	.disable = tps65912_reg_disable,</div><div class='ctx'> 	.set_mode = tps65912_set_mode,</div><div class='ctx'> 	.get_mode = tps65912_get_mode,</div><div class='del'>-	.get_voltage = tps65912_get_voltage_dcdc,</div><div class='add'>+	.get_voltage_sel = tps65912_get_voltage_sel,</div><div class='ctx'> 	.set_voltage_sel = tps65912_set_voltage_sel,</div><div class='del'>-	.list_voltage = tps65912_list_voltage_dcdc,</div><div class='add'>+	.list_voltage = tps65912_list_voltage,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Operations permitted on LDOx */</div><div class='hunk'>@@ -479,14 +454,15 @@ static struct regulator_ops tps65912_ops_ldo = {</div><div class='ctx'> 	.is_enabled = tps65912_reg_is_enabled,</div><div class='ctx'> 	.enable = tps65912_reg_enable,</div><div class='ctx'> 	.disable = tps65912_reg_disable,</div><div class='del'>-	.get_voltage = tps65912_get_voltage_ldo,</div><div class='add'>+	.get_voltage_sel = tps65912_get_voltage_sel,</div><div class='ctx'> 	.set_voltage_sel = tps65912_set_voltage_sel,</div><div class='del'>-	.list_voltage = tps65912_list_voltage_ldo,</div><div class='add'>+	.list_voltage = tps65912_list_voltage,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __devinit int tps65912_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps65912 *tps65912 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct tps_info *info;</div><div class='ctx'> 	struct regulator_init_data *reg_data;</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='hunk'>@@ -500,7 +476,7 @@ static __devinit int tps65912_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	reg_data = pmic_plat_data-&gt;tps65912_pmic_init_data;</div><div class='ctx'> </div><div class='del'>-	pmic = kzalloc(sizeof(*pmic), GFP_KERNEL);</div><div class='add'>+	pmic = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*pmic), GFP_KERNEL);</div><div class='ctx'> 	if (!pmic)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -524,8 +500,12 @@ static __devinit int tps65912_probe(struct platform_device *pdev)</div><div class='ctx'> 		pmic-&gt;desc[i].type = REGULATOR_VOLTAGE;</div><div class='ctx'> 		pmic-&gt;desc[i].owner = THIS_MODULE;</div><div class='ctx'> 		range = tps65912_get_range(pmic, i);</div><div class='del'>-		rdev = regulator_register(&amp;pmic-&gt;desc[i],</div><div class='del'>-					tps65912-&gt;dev, reg_data, pmic, NULL);</div><div class='add'>+</div><div class='add'>+		config.dev = tps65912-&gt;dev;</div><div class='add'>+		config.init_data = reg_data;</div><div class='add'>+		config.driver_data = pmic;</div><div class='add'>+</div><div class='add'>+		rdev = regulator_register(&amp;pmic-&gt;desc[i], &amp;config);</div><div class='ctx'> 		if (IS_ERR(rdev)) {</div><div class='ctx'> 			dev_err(tps65912-&gt;dev,</div><div class='ctx'> 				"failed to register %s regulator\n",</div><div class='hunk'>@@ -542,8 +522,6 @@ static __devinit int tps65912_probe(struct platform_device *pdev)</div><div class='ctx'> err:</div><div class='ctx'> 	while (--i &gt;= 0)</div><div class='ctx'> 		regulator_unregister(pmic-&gt;rdev[i]);</div><div class='del'>-</div><div class='del'>-	kfree(pmic);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -554,8 +532,6 @@ static int __devexit tps65912_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; TPS65912_NUM_REGULATOR; i++)</div><div class='ctx'> 		regulator_unregister(tps65912_reg-&gt;rdev[i]);</div><div class='del'>-</div><div class='del'>-	kfree(tps65912_reg);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c<br/>index 9cdfc389ca26..c7390711d954 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/twl-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/twl-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/twl-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/twl-regulator.c</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_device.h&gt;</div><div class='hunk'>@@ -175,15 +174,14 @@ static int twl6030reg_is_enabled(struct regulator_dev *rdev)</div><div class='ctx'> 	struct twlreg_info	*info = rdev_get_drvdata(rdev);</div><div class='ctx'> 	int			grp = 0, val;</div><div class='ctx'> </div><div class='del'>-	if (!(twl_class_is_6030() &amp;&amp; (info-&gt;features &amp; TWL6025_SUBCLASS)))</div><div class='del'>-		grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);</div><div class='del'>-	if (grp &lt; 0)</div><div class='del'>-		return grp;</div><div class='del'>-</div><div class='del'>-	if (!(twl_class_is_6030() &amp;&amp; (info-&gt;features &amp; TWL6025_SUBCLASS)))</div><div class='add'>+	if (!(twl_class_is_6030() &amp;&amp; (info-&gt;features &amp; TWL6025_SUBCLASS))) {</div><div class='add'>+		grp = twlreg_grp(rdev);</div><div class='add'>+		if (grp &lt; 0)</div><div class='add'>+			return grp;</div><div class='ctx'> 		grp &amp;= P1_GRP_6030;</div><div class='del'>-	else</div><div class='add'>+	} else {</div><div class='ctx'> 		grp = 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);</div><div class='ctx'> 	val = TWL6030_CFG_STATE_APP(val);</div><div class='hunk'>@@ -197,7 +195,7 @@ static int twl4030reg_enable(struct regulator_dev *rdev)</div><div class='ctx'> 	int			grp;</div><div class='ctx'> 	int			ret;</div><div class='ctx'> </div><div class='del'>-	grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);</div><div class='add'>+	grp = twlreg_grp(rdev);</div><div class='ctx'> 	if (grp &lt; 0)</div><div class='ctx'> 		return grp;</div><div class='ctx'> </div><div class='hunk'>@@ -205,8 +203,6 @@ static int twl4030reg_enable(struct regulator_dev *rdev)</div><div class='ctx'> </div><div class='ctx'> 	ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);</div><div class='ctx'> </div><div class='del'>-	udelay(info-&gt;delay);</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -217,17 +213,28 @@ static int twl6030reg_enable(struct regulator_dev *rdev)</div><div class='ctx'> 	int			ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!(twl_class_is_6030() &amp;&amp; (info-&gt;features &amp; TWL6025_SUBCLASS)))</div><div class='del'>-		grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);</div><div class='add'>+		grp = twlreg_grp(rdev);</div><div class='ctx'> 	if (grp &lt; 0)</div><div class='ctx'> 		return grp;</div><div class='ctx'> </div><div class='ctx'> 	ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,</div><div class='ctx'> 			grp &lt;&lt; TWL6030_CFG_STATE_GRP_SHIFT |</div><div class='ctx'> 			TWL6030_CFG_STATE_ON);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	udelay(info-&gt;delay);</div><div class='add'>+static int twl4030reg_enable_time(struct regulator_dev *rdev)</div><div class='add'>+{</div><div class='add'>+	struct twlreg_info	*info = rdev_get_drvdata(rdev);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return info-&gt;delay;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int twl6030reg_enable_time(struct regulator_dev *rdev)</div><div class='add'>+{</div><div class='add'>+	struct twlreg_info	*info = rdev_get_drvdata(rdev);</div><div class='add'>+</div><div class='add'>+	return info-&gt;delay;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int twl4030reg_disable(struct regulator_dev *rdev)</div><div class='hunk'>@@ -236,7 +243,7 @@ static int twl4030reg_disable(struct regulator_dev *rdev)</div><div class='ctx'> 	int			grp;</div><div class='ctx'> 	int			ret;</div><div class='ctx'> </div><div class='del'>-	grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);</div><div class='add'>+	grp = twlreg_grp(rdev);</div><div class='ctx'> 	if (grp &lt; 0)</div><div class='ctx'> 		return grp;</div><div class='ctx'> </div><div class='hunk'>@@ -348,7 +355,7 @@ static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)</div><div class='ctx'> 	int val;</div><div class='ctx'> </div><div class='ctx'> 	if (!(twl_class_is_6030() &amp;&amp; (info-&gt;features &amp; TWL6025_SUBCLASS)))</div><div class='del'>-		grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);</div><div class='add'>+		grp = twlreg_grp(rdev);</div><div class='ctx'> </div><div class='ctx'> 	if (grp &lt; 0)</div><div class='ctx'> 		return grp;</div><div class='hunk'>@@ -388,14 +395,12 @@ static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)</div><div class='ctx'>  * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.</div><div class='ctx'>  * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.</div><div class='ctx'>  */</div><div class='del'>-#ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED</div><div class='del'>-#define UNSUP_MASK	0x0000</div><div class='del'>-#else</div><div class='ctx'> #define UNSUP_MASK	0x8000</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #define UNSUP(x)	(UNSUP_MASK | (x))</div><div class='del'>-#define IS_UNSUP(x)	(UNSUP_MASK &amp; (x))</div><div class='add'>+#define IS_UNSUP(info, x)			\</div><div class='add'>+	((UNSUP_MASK &amp; (x)) &amp;&amp;			\</div><div class='add'>+	 !((info)-&gt;features &amp; TWL4030_ALLOW_UNSUPPORTED))</div><div class='ctx'> #define LDO_MV(x)	(~UNSUP_MASK &amp; (x))</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -469,35 +474,16 @@ static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)</div><div class='ctx'> 	struct twlreg_info	*info = rdev_get_drvdata(rdev);</div><div class='ctx'> 	int			mV = info-&gt;table[index];</div><div class='ctx'> </div><div class='del'>-	return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000);</div><div class='add'>+	return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-twl4030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,</div><div class='del'>-		       unsigned *selector)</div><div class='add'>+twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)</div><div class='ctx'> {</div><div class='ctx'> 	struct twlreg_info	*info = rdev_get_drvdata(rdev);</div><div class='del'>-	int			vsel;</div><div class='ctx'> </div><div class='del'>-	for (vsel = 0; vsel &lt; info-&gt;table_len; vsel++) {</div><div class='del'>-		int mV = info-&gt;table[vsel];</div><div class='del'>-		int uV;</div><div class='del'>-</div><div class='del'>-		if (IS_UNSUP(mV))</div><div class='del'>-			continue;</div><div class='del'>-		uV = LDO_MV(mV) * 1000;</div><div class='del'>-</div><div class='del'>-		/* REVISIT for VAUX2, first match may not be best/lowest */</div><div class='del'>-</div><div class='del'>-		/* use the first in-range value */</div><div class='del'>-		if (min_uV &lt;= uV &amp;&amp; uV &lt;= max_uV) {</div><div class='del'>-			*selector = vsel;</div><div class='del'>-			return twlreg_write(info, TWL_MODULE_PM_RECEIVER,</div><div class='del'>-							VREG_VOLTAGE, vsel);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EDOM;</div><div class='add'>+	return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,</div><div class='add'>+			    selector);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int twl4030ldo_get_voltage(struct regulator_dev *rdev)</div><div class='hunk'>@@ -516,12 +502,13 @@ static int twl4030ldo_get_voltage(struct regulator_dev *rdev)</div><div class='ctx'> static struct regulator_ops twl4030ldo_ops = {</div><div class='ctx'> 	.list_voltage	= twl4030ldo_list_voltage,</div><div class='ctx'> </div><div class='del'>-	.set_voltage	= twl4030ldo_set_voltage,</div><div class='add'>+	.set_voltage_sel = twl4030ldo_set_voltage_sel,</div><div class='ctx'> 	.get_voltage	= twl4030ldo_get_voltage,</div><div class='ctx'> </div><div class='ctx'> 	.enable		= twl4030reg_enable,</div><div class='ctx'> 	.disable	= twl4030reg_disable,</div><div class='ctx'> 	.is_enabled	= twl4030reg_is_enabled,</div><div class='add'>+	.enable_time	= twl4030reg_enable_time,</div><div class='ctx'> </div><div class='ctx'> 	.set_mode	= twl4030reg_set_mode,</div><div class='ctx'> </div><div class='hunk'>@@ -642,6 +629,7 @@ static struct regulator_ops twl6030ldo_ops = {</div><div class='ctx'> 	.enable		= twl6030reg_enable,</div><div class='ctx'> 	.disable	= twl6030reg_disable,</div><div class='ctx'> 	.is_enabled	= twl6030reg_is_enabled,</div><div class='add'>+	.enable_time	= twl6030reg_enable_time,</div><div class='ctx'> </div><div class='ctx'> 	.set_mode	= twl6030reg_set_mode,</div><div class='ctx'> </div><div class='hunk'>@@ -675,6 +663,7 @@ static struct regulator_ops twl4030fixed_ops = {</div><div class='ctx'> 	.enable		= twl4030reg_enable,</div><div class='ctx'> 	.disable	= twl4030reg_disable,</div><div class='ctx'> 	.is_enabled	= twl4030reg_is_enabled,</div><div class='add'>+	.enable_time	= twl4030reg_enable_time,</div><div class='ctx'> </div><div class='ctx'> 	.set_mode	= twl4030reg_set_mode,</div><div class='ctx'> </div><div class='hunk'>@@ -689,6 +678,7 @@ static struct regulator_ops twl6030fixed_ops = {</div><div class='ctx'> 	.enable		= twl6030reg_enable,</div><div class='ctx'> 	.disable	= twl6030reg_disable,</div><div class='ctx'> 	.is_enabled	= twl6030reg_is_enabled,</div><div class='add'>+	.enable_time	= twl6030reg_enable_time,</div><div class='ctx'> </div><div class='ctx'> 	.set_mode	= twl6030reg_set_mode,</div><div class='ctx'> </div><div class='hunk'>@@ -699,6 +689,7 @@ static struct regulator_ops twl6030_fixed_resource = {</div><div class='ctx'> 	.enable		= twl6030reg_enable,</div><div class='ctx'> 	.disable	= twl6030reg_disable,</div><div class='ctx'> 	.is_enabled	= twl6030reg_is_enabled,</div><div class='add'>+	.enable_time	= twl6030reg_enable_time,</div><div class='ctx'> 	.get_status	= twl6030reg_get_status,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -806,10 +797,7 @@ twl6030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,</div><div class='ctx'> 			vsel = 0;</div><div class='ctx'> 		else if ((min_uV &gt;= 600000) &amp;&amp; (min_uV &lt;= 1300000)) {</div><div class='ctx'> 			int calc_uV;</div><div class='del'>-			vsel = (min_uV - 600000) / 125;</div><div class='del'>-			if (vsel % 100)</div><div class='del'>-				vsel += 100;</div><div class='del'>-			vsel /= 100;</div><div class='add'>+			vsel = DIV_ROUND_UP(min_uV - 600000, 12500);</div><div class='ctx'> 			vsel++;</div><div class='ctx'> 			calc_uV = twl6030smps_list_voltage(rdev, vsel);</div><div class='ctx'> 			if (calc_uV &gt; max_uV)</div><div class='hunk'>@@ -836,10 +824,7 @@ twl6030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,</div><div class='ctx'> 			vsel = 0;</div><div class='ctx'> 		else if ((min_uV &gt;= 700000) &amp;&amp; (min_uV &lt;= 1420000)) {</div><div class='ctx'> 			int calc_uV;</div><div class='del'>-			vsel = (min_uV - 700000) / 125;</div><div class='del'>-			if (vsel % 100)</div><div class='del'>-				vsel += 100;</div><div class='del'>-			vsel /= 100;</div><div class='add'>+			vsel = DIV_ROUND_UP(min_uV - 700000, 12500);</div><div class='ctx'> 			vsel++;</div><div class='ctx'> 			calc_uV = twl6030smps_list_voltage(rdev, vsel);</div><div class='ctx'> 			if (calc_uV &gt; max_uV)</div><div class='hunk'>@@ -862,24 +847,18 @@ twl6030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SMPS_EXTENDED_EN:</div><div class='del'>-		if (min_uV == 0)</div><div class='add'>+		if (min_uV == 0) {</div><div class='ctx'> 			vsel = 0;</div><div class='del'>-		else if ((min_uV &gt;= 1852000) &amp;&amp; (max_uV &lt;= 4013600)) {</div><div class='del'>-			vsel = (min_uV - 1852000) / 386;</div><div class='del'>-			if (vsel % 100)</div><div class='del'>-				vsel += 100;</div><div class='del'>-			vsel /= 100;</div><div class='add'>+		} else if ((min_uV &gt;= 1852000) &amp;&amp; (max_uV &lt;= 4013600)) {</div><div class='add'>+			vsel = DIV_ROUND_UP(min_uV - 1852000, 38600);</div><div class='ctx'> 			vsel++;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SMPS_OFFSET_EN|SMPS_EXTENDED_EN:</div><div class='del'>-		if (min_uV == 0)</div><div class='add'>+		if (min_uV == 0) {</div><div class='ctx'> 			vsel = 0;</div><div class='del'>-		else if ((min_uV &gt;= 2161000) &amp;&amp; (max_uV &lt;= 4321000)) {</div><div class='del'>-			vsel = (min_uV - 2161000) / 386;</div><div class='del'>-			if (vsel % 100)</div><div class='del'>-				vsel += 100;</div><div class='del'>-			vsel /= 100;</div><div class='add'>+		} else if ((min_uV &gt;= 2161000) &amp;&amp; (max_uV &lt;= 4321000)) {</div><div class='add'>+			vsel = DIV_ROUND_UP(min_uV - 2161000, 38600);</div><div class='ctx'> 			vsel++;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -907,6 +886,7 @@ static struct regulator_ops twlsmps_ops = {</div><div class='ctx'> 	.enable			= twl6030reg_enable,</div><div class='ctx'> 	.disable		= twl6030reg_disable,</div><div class='ctx'> 	.is_enabled		= twl6030reg_is_enabled,</div><div class='add'>+	.enable_time		= twl6030reg_enable_time,</div><div class='ctx'> </div><div class='ctx'> 	.set_mode		= twl6030reg_set_mode,</div><div class='ctx'> </div><div class='hunk'>@@ -1194,6 +1174,7 @@ static int __devinit twlreg_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct regulator_dev		*rdev;</div><div class='ctx'> 	struct twl_regulator_driver_data	*drvdata;</div><div class='ctx'> 	const struct of_device_id	*match;</div><div class='add'>+	struct regulator_config		config = { };</div><div class='ctx'> </div><div class='ctx'> 	match = of_match_device(twl_of_match, &amp;pdev-&gt;dev);</div><div class='ctx'> 	if (match) {</div><div class='hunk'>@@ -1207,10 +1188,12 @@ static int __devinit twlreg_probe(struct platform_device *pdev)</div><div class='ctx'> 		initdata = pdev-&gt;dev.platform_data;</div><div class='ctx'> 		for (i = 0, info = NULL; i &lt; ARRAY_SIZE(twl_of_match); i++) {</div><div class='ctx'> 			info = twl_of_match[i].data;</div><div class='del'>-			if (!info || info-&gt;desc.id != id)</div><div class='del'>-				continue;</div><div class='del'>-			break;</div><div class='add'>+			if (info &amp;&amp; info-&gt;desc.id == id)</div><div class='add'>+				break;</div><div class='ctx'> 		}</div><div class='add'>+		if (i == ARRAY_SIZE(twl_of_match))</div><div class='add'>+			return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 		drvdata = initdata-&gt;driver_data;</div><div class='ctx'> 		if (!drvdata)</div><div class='ctx'> 			return -EINVAL;</div><div class='hunk'>@@ -1273,8 +1256,12 @@ static int __devinit twlreg_probe(struct platform_device *pdev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rdev = regulator_register(&amp;info-&gt;desc, &amp;pdev-&gt;dev, initdata, info,</div><div class='del'>-							pdev-&gt;dev.of_node);</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = initdata;</div><div class='add'>+	config.driver_data = info;</div><div class='add'>+	config.of_node = pdev-&gt;dev.of_node;</div><div class='add'>+</div><div class='add'>+	rdev = regulator_register(&amp;info-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(rdev)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "can't register %s, %ld\n",</div><div class='ctx'> 				info-&gt;desc.name, PTR_ERR(rdev));</div><div class='head'>diff --git a/drivers/regulator/userspace-consumer.c b/drivers/regulator/userspace-consumer.c<br/>index 518667ef9a0d..a7c8deb5f28f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/userspace-consumer.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/userspace-consumer.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/userspace-consumer.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/userspace-consumer.c</a></div><div class='hunk'>@@ -115,7 +115,9 @@ static int regulator_userspace_consumer_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!pdata)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	drvdata = kzalloc(sizeof(struct userspace_consumer_data), GFP_KERNEL);</div><div class='add'>+	drvdata = devm_kzalloc(&amp;pdev-&gt;dev,</div><div class='add'>+			       sizeof(struct userspace_consumer_data),</div><div class='add'>+			       GFP_KERNEL);</div><div class='ctx'> 	if (drvdata == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -125,16 +127,16 @@ static int regulator_userspace_consumer_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;drvdata-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	ret = regulator_bulk_get(&amp;pdev-&gt;dev, drvdata-&gt;num_supplies,</div><div class='del'>-				 drvdata-&gt;supplies);</div><div class='add'>+	ret = devm_regulator_bulk_get(&amp;pdev-&gt;dev, drvdata-&gt;num_supplies,</div><div class='add'>+				      drvdata-&gt;supplies);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Failed to get supplies: %d\n", ret);</div><div class='del'>-		goto err_alloc_supplies;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = sysfs_create_group(&amp;pdev-&gt;dev.kobj, &amp;attr_group);</div><div class='ctx'> 	if (ret != 0)</div><div class='del'>-		goto err_create_attrs;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;init_on) {</div><div class='ctx'> 		ret = regulator_bulk_enable(drvdata-&gt;num_supplies,</div><div class='hunk'>@@ -154,11 +156,6 @@ static int regulator_userspace_consumer_probe(struct platform_device *pdev)</div><div class='ctx'> err_enable:</div><div class='ctx'> 	sysfs_remove_group(&amp;pdev-&gt;dev.kobj, &amp;attr_group);</div><div class='ctx'> </div><div class='del'>-err_create_attrs:</div><div class='del'>-	regulator_bulk_free(drvdata-&gt;num_supplies, drvdata-&gt;supplies);</div><div class='del'>-</div><div class='del'>-err_alloc_supplies:</div><div class='del'>-	kfree(drvdata);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -171,9 +168,6 @@ static int regulator_userspace_consumer_remove(struct platform_device *pdev)</div><div class='ctx'> 	if (data-&gt;enabled)</div><div class='ctx'> 		regulator_bulk_disable(data-&gt;num_supplies, data-&gt;supplies);</div><div class='ctx'> </div><div class='del'>-	regulator_bulk_free(data-&gt;num_supplies, data-&gt;supplies);</div><div class='del'>-	kfree(data);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/virtual.c b/drivers/regulator/virtual.c<br/>index ee0b161c998f..c038e7422538 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/virtual.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/virtual.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/virtual.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/virtual.c</a></div><div class='hunk'>@@ -121,7 +121,7 @@ static ssize_t set_min_uV(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 	struct virtual_consumer_data *data = dev_get_drvdata(dev);</div><div class='ctx'> 	long val;</div><div class='ctx'> </div><div class='del'>-	if (strict_strtol(buf, 10, &amp;val) != 0)</div><div class='add'>+	if (kstrtol(buf, 10, &amp;val) != 0)</div><div class='ctx'> 		return count;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;data-&gt;lock);</div><div class='hunk'>@@ -147,7 +147,7 @@ static ssize_t set_max_uV(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 	struct virtual_consumer_data *data = dev_get_drvdata(dev);</div><div class='ctx'> 	long val;</div><div class='ctx'> </div><div class='del'>-	if (strict_strtol(buf, 10, &amp;val) != 0)</div><div class='add'>+	if (kstrtol(buf, 10, &amp;val) != 0)</div><div class='ctx'> 		return count;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;data-&gt;lock);</div><div class='hunk'>@@ -173,7 +173,7 @@ static ssize_t set_min_uA(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 	struct virtual_consumer_data *data = dev_get_drvdata(dev);</div><div class='ctx'> 	long val;</div><div class='ctx'> </div><div class='del'>-	if (strict_strtol(buf, 10, &amp;val) != 0)</div><div class='add'>+	if (kstrtol(buf, 10, &amp;val) != 0)</div><div class='ctx'> 		return count;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;data-&gt;lock);</div><div class='hunk'>@@ -199,7 +199,7 @@ static ssize_t set_max_uA(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 	struct virtual_consumer_data *data = dev_get_drvdata(dev);</div><div class='ctx'> 	long val;</div><div class='ctx'> </div><div class='del'>-	if (strict_strtol(buf, 10, &amp;val) != 0)</div><div class='add'>+	if (kstrtol(buf, 10, &amp;val) != 0)</div><div class='ctx'> 		return count;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;data-&gt;lock);</div><div class='hunk'>@@ -291,18 +291,19 @@ static int __devinit regulator_virtual_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct virtual_consumer_data *drvdata;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	drvdata = kzalloc(sizeof(struct virtual_consumer_data), GFP_KERNEL);</div><div class='add'>+	drvdata = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct virtual_consumer_data),</div><div class='add'>+			       GFP_KERNEL);</div><div class='ctx'> 	if (drvdata == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;drvdata-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	drvdata-&gt;regulator = regulator_get(&amp;pdev-&gt;dev, reg_id);</div><div class='add'>+	drvdata-&gt;regulator = devm_regulator_get(&amp;pdev-&gt;dev, reg_id);</div><div class='ctx'> 	if (IS_ERR(drvdata-&gt;regulator)) {</div><div class='ctx'> 		ret = PTR_ERR(drvdata-&gt;regulator);</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Failed to obtain supply '%s': %d\n",</div><div class='ctx'> 			reg_id, ret);</div><div class='del'>-		goto err;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = sysfs_create_group(&amp;pdev-&gt;dev.kobj,</div><div class='hunk'>@@ -310,7 +311,7 @@ static int __devinit regulator_virtual_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='ctx'> 			"Failed to create attribute group: %d\n", ret);</div><div class='del'>-		goto err_regulator;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	drvdata-&gt;mode = regulator_get_mode(drvdata-&gt;regulator);</div><div class='hunk'>@@ -318,12 +319,6 @@ static int __devinit regulator_virtual_probe(struct platform_device *pdev)</div><div class='ctx'> 	platform_set_drvdata(pdev, drvdata);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err_regulator:</div><div class='del'>-	regulator_put(drvdata-&gt;regulator);</div><div class='del'>-err:</div><div class='del'>-	kfree(drvdata);</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devexit regulator_virtual_remove(struct platform_device *pdev)</div><div class='hunk'>@@ -334,9 +329,6 @@ static int __devexit regulator_virtual_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	if (drvdata-&gt;enabled)</div><div class='ctx'> 		regulator_disable(drvdata-&gt;regulator);</div><div class='del'>-	regulator_put(drvdata-&gt;regulator);</div><div class='del'>-</div><div class='del'>-	kfree(drvdata);</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/wm831x-dcdc.c b/drivers/regulator/wm831x-dcdc.c<br/>index ff810e787eac..099da11e989f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/wm831x-dcdc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/wm831x-dcdc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/wm831x-dcdc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/wm831x-dcdc.c</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> #define WM831X_DCDC_MODE_IDLE    2</div><div class='ctx'> #define WM831X_DCDC_MODE_STANDBY 3</div><div class='ctx'> </div><div class='del'>-#define WM831X_DCDC_MAX_NAME 6</div><div class='add'>+#define WM831X_DCDC_MAX_NAME 9</div><div class='ctx'> </div><div class='ctx'> /* Register offsets in control block */</div><div class='ctx'> #define WM831X_DCDC_CONTROL_1     0</div><div class='hunk'>@@ -50,6 +50,7 @@</div><div class='ctx'> </div><div class='ctx'> struct wm831x_dcdc {</div><div class='ctx'> 	char name[WM831X_DCDC_MAX_NAME];</div><div class='add'>+	char supply_name[WM831X_DCDC_MAX_NAME];</div><div class='ctx'> 	struct regulator_desc desc;</div><div class='ctx'> 	int base;</div><div class='ctx'> 	struct wm831x *wm831x;</div><div class='hunk'>@@ -60,41 +61,6 @@ struct wm831x_dcdc {</div><div class='ctx'> 	int dvs_vsel;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);</div><div class='del'>-	struct wm831x *wm831x = dcdc-&gt;wm831x;</div><div class='del'>-	int mask = 1 &lt;&lt; rdev_get_id(rdev);</div><div class='del'>-	int reg;</div><div class='del'>-</div><div class='del'>-	reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE);</div><div class='del'>-	if (reg &lt; 0)</div><div class='del'>-		return reg;</div><div class='del'>-</div><div class='del'>-	if (reg &amp; mask)</div><div class='del'>-		return 1;</div><div class='del'>-	else</div><div class='del'>-		return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm831x_dcdc_enable(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);</div><div class='del'>-	struct wm831x *wm831x = dcdc-&gt;wm831x;</div><div class='del'>-	int mask = 1 &lt;&lt; rdev_get_id(rdev);</div><div class='del'>-</div><div class='del'>-	return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm831x_dcdc_disable(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);</div><div class='del'>-	struct wm831x *wm831x = dcdc-&gt;wm831x;</div><div class='del'>-	int mask = 1 &lt;&lt; rdev_get_id(rdev);</div><div class='del'>-</div><div class='del'>-	return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)</div><div class='ctx'> </div><div class='ctx'> {</div><div class='hunk'>@@ -414,9 +380,9 @@ static struct regulator_ops wm831x_buckv_ops = {</div><div class='ctx'> 	.set_current_limit = wm831x_buckv_set_current_limit,</div><div class='ctx'> 	.get_current_limit = wm831x_buckv_get_current_limit,</div><div class='ctx'> </div><div class='del'>-	.is_enabled = wm831x_dcdc_is_enabled,</div><div class='del'>-	.enable = wm831x_dcdc_enable,</div><div class='del'>-	.disable = wm831x_dcdc_disable,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='ctx'> 	.get_status = wm831x_dcdc_get_status,</div><div class='ctx'> 	.get_mode = wm831x_dcdc_get_mode,</div><div class='ctx'> 	.set_mode = wm831x_dcdc_set_mode,</div><div class='hunk'>@@ -437,23 +403,17 @@ static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,</div><div class='ctx'> 	if (!pdata || !pdata-&gt;dvs_gpio)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ret = gpio_request(pdata-&gt;dvs_gpio, "DCDC DVS");</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		dev_err(wm831x-&gt;dev, "Failed to get %s DVS GPIO: %d\n",</div><div class='del'>-			dcdc-&gt;name, ret);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* gpiolib won't let us read the GPIO status so pick the higher</div><div class='ctx'> 	 * of the two existing voltages so we take it as platform data.</div><div class='ctx'> 	 */</div><div class='ctx'> 	dcdc-&gt;dvs_gpio_state = pdata-&gt;dvs_init_state;</div><div class='ctx'> </div><div class='del'>-	ret = gpio_direction_output(pdata-&gt;dvs_gpio, dcdc-&gt;dvs_gpio_state);</div><div class='add'>+	ret = gpio_request_one(pdata-&gt;dvs_gpio,</div><div class='add'>+			       dcdc-&gt;dvs_gpio_state ? GPIOF_INIT_HIGH : 0,</div><div class='add'>+			       "DCDC DVS");</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		dev_err(wm831x-&gt;dev, "Failed to enable %s DVS GPIO: %d\n",</div><div class='add'>+		dev_err(wm831x-&gt;dev, "Failed to get %s DVS GPIO: %d\n",</div><div class='ctx'> 			dcdc-&gt;name, ret);</div><div class='del'>-		gpio_free(pdata-&gt;dvs_gpio);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -498,6 +458,7 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x *wm831x = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct wm831x_pdata *pdata = wm831x-&gt;dev-&gt;platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int id;</div><div class='ctx'> 	struct wm831x_dcdc *dcdc;</div><div class='ctx'> 	struct resource *res;</div><div class='hunk'>@@ -511,9 +472,6 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "Probing DCDC%d\n", id + 1);</div><div class='ctx'> </div><div class='del'>-	if (pdata == NULL || pdata-&gt;dcdc[id] == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	dcdc = devm_kzalloc(&amp;pdev-&gt;dev,  sizeof(struct wm831x_dcdc),</div><div class='ctx'> 			    GFP_KERNEL);</div><div class='ctx'> 	if (dcdc == NULL) {</div><div class='hunk'>@@ -533,11 +491,18 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	snprintf(dcdc-&gt;name, sizeof(dcdc-&gt;name), "DCDC%d", id + 1);</div><div class='ctx'> 	dcdc-&gt;desc.name = dcdc-&gt;name;</div><div class='add'>+</div><div class='add'>+	snprintf(dcdc-&gt;supply_name, sizeof(dcdc-&gt;supply_name),</div><div class='add'>+		 "DC%dVDD", id + 1);</div><div class='add'>+	dcdc-&gt;desc.supply_name = dcdc-&gt;supply_name;</div><div class='add'>+</div><div class='ctx'> 	dcdc-&gt;desc.id = id;</div><div class='ctx'> 	dcdc-&gt;desc.type = REGULATOR_VOLTAGE;</div><div class='ctx'> 	dcdc-&gt;desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;</div><div class='ctx'> 	dcdc-&gt;desc.ops = &amp;wm831x_buckv_ops;</div><div class='ctx'> 	dcdc-&gt;desc.owner = THIS_MODULE;</div><div class='add'>+	dcdc-&gt;desc.enable_reg = WM831X_DCDC_ENABLE;</div><div class='add'>+	dcdc-&gt;desc.enable_mask = 1 &lt;&lt; id;</div><div class='ctx'> </div><div class='ctx'> 	ret = wm831x_reg_read(wm831x, dcdc-&gt;base + WM831X_DCDC_ON_CONFIG);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='hunk'>@@ -553,11 +518,16 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> 	dcdc-&gt;dvs_vsel = ret &amp; WM831X_DC1_DVS_VSEL_MASK;</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;dcdc[id])</div><div class='add'>+	if (pdata &amp;&amp; pdata-&gt;dcdc[id])</div><div class='ctx'> 		wm831x_buckv_dvs_init(dcdc, pdata-&gt;dcdc[id]-&gt;driver_data);</div><div class='ctx'> </div><div class='del'>-	dcdc-&gt;regulator = regulator_register(&amp;dcdc-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-					     pdata-&gt;dcdc[id], dcdc, NULL);</div><div class='add'>+	config.dev = pdev-&gt;dev.parent;</div><div class='add'>+	if (pdata)</div><div class='add'>+		config.init_data = pdata-&gt;dcdc[id];</div><div class='add'>+	config.driver_data = dcdc;</div><div class='add'>+	config.regmap = wm831x-&gt;regmap;</div><div class='add'>+</div><div class='add'>+	dcdc-&gt;regulator = regulator_register(&amp;dcdc-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(dcdc-&gt;regulator)) {</div><div class='ctx'> 		ret = PTR_ERR(dcdc-&gt;regulator);</div><div class='ctx'> 		dev_err(wm831x-&gt;dev, "Failed to register DCDC%d: %d\n",</div><div class='hunk'>@@ -565,7 +535,7 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_irq_byname(pdev, "UV");</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));</div><div class='ctx'> 	ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,</div><div class='ctx'> 				   IRQF_TRIGGER_RISING, dcdc-&gt;name, dcdc);</div><div class='ctx'> 	if (ret != 0) {</div><div class='hunk'>@@ -574,7 +544,7 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_regulator;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_irq_byname(pdev, "HC");</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));</div><div class='ctx'> 	ret = request_threaded_irq(irq, NULL, wm831x_dcdc_oc_irq,</div><div class='ctx'> 				   IRQF_TRIGGER_RISING, dcdc-&gt;name, dcdc);</div><div class='ctx'> 	if (ret != 0) {</div><div class='hunk'>@@ -588,7 +558,8 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_uv:</div><div class='del'>-	free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);</div><div class='add'>+	free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")),</div><div class='add'>+		 dcdc);</div><div class='ctx'> err_regulator:</div><div class='ctx'> 	regulator_unregister(dcdc-&gt;regulator);</div><div class='ctx'> err:</div><div class='hunk'>@@ -600,11 +571,14 @@ err:</div><div class='ctx'> static __devexit int wm831x_buckv_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);</div><div class='add'>+	struct wm831x *wm831x = dcdc-&gt;wm831x;</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='del'>-	free_irq(platform_get_irq_byname(pdev, "HC"), dcdc);</div><div class='del'>-	free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);</div><div class='add'>+	free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC")),</div><div class='add'>+			    dcdc);</div><div class='add'>+	free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")),</div><div class='add'>+			    dcdc);</div><div class='ctx'> 	regulator_unregister(dcdc-&gt;regulator);</div><div class='ctx'> 	if (dcdc-&gt;dvs_gpio)</div><div class='ctx'> 		gpio_free(dcdc-&gt;dvs_gpio);</div><div class='hunk'>@@ -675,29 +649,15 @@ static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV, &amp;selector);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wm831x_buckp_get_voltage_sel(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);</div><div class='del'>-	struct wm831x *wm831x = dcdc-&gt;wm831x;</div><div class='del'>-	u16 reg = dcdc-&gt;base + WM831X_DCDC_ON_CONFIG;</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='del'>-	val = wm831x_reg_read(wm831x, reg);</div><div class='del'>-	if (val &lt; 0)</div><div class='del'>-		return val;</div><div class='del'>-</div><div class='del'>-	return val &amp; WM831X_DC3_ON_VSEL_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct regulator_ops wm831x_buckp_ops = {</div><div class='ctx'> 	.set_voltage = wm831x_buckp_set_voltage,</div><div class='del'>-	.get_voltage_sel = wm831x_buckp_get_voltage_sel,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='ctx'> 	.list_voltage = wm831x_buckp_list_voltage,</div><div class='ctx'> 	.set_suspend_voltage = wm831x_buckp_set_suspend_voltage,</div><div class='ctx'> </div><div class='del'>-	.is_enabled = wm831x_dcdc_is_enabled,</div><div class='del'>-	.enable = wm831x_dcdc_enable,</div><div class='del'>-	.disable = wm831x_dcdc_disable,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='ctx'> 	.get_status = wm831x_dcdc_get_status,</div><div class='ctx'> 	.get_mode = wm831x_dcdc_get_mode,</div><div class='ctx'> 	.set_mode = wm831x_dcdc_set_mode,</div><div class='hunk'>@@ -708,6 +668,7 @@ static __devinit int wm831x_buckp_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x *wm831x = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct wm831x_pdata *pdata = wm831x-&gt;dev-&gt;platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int id;</div><div class='ctx'> 	struct wm831x_dcdc *dcdc;</div><div class='ctx'> 	struct resource *res;</div><div class='hunk'>@@ -721,9 +682,6 @@ static __devinit int wm831x_buckp_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "Probing DCDC%d\n", id + 1);</div><div class='ctx'> </div><div class='del'>-	if (pdata == NULL || pdata-&gt;dcdc[id] == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	dcdc = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct wm831x_dcdc),</div><div class='ctx'> 			    GFP_KERNEL);</div><div class='ctx'> 	if (dcdc == NULL) {</div><div class='hunk'>@@ -743,14 +701,28 @@ static __devinit int wm831x_buckp_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	snprintf(dcdc-&gt;name, sizeof(dcdc-&gt;name), "DCDC%d", id + 1);</div><div class='ctx'> 	dcdc-&gt;desc.name = dcdc-&gt;name;</div><div class='add'>+</div><div class='add'>+	snprintf(dcdc-&gt;supply_name, sizeof(dcdc-&gt;supply_name),</div><div class='add'>+		 "DC%dVDD", id + 1);</div><div class='add'>+	dcdc-&gt;desc.supply_name = dcdc-&gt;supply_name;</div><div class='add'>+</div><div class='ctx'> 	dcdc-&gt;desc.id = id;</div><div class='ctx'> 	dcdc-&gt;desc.type = REGULATOR_VOLTAGE;</div><div class='ctx'> 	dcdc-&gt;desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;</div><div class='ctx'> 	dcdc-&gt;desc.ops = &amp;wm831x_buckp_ops;</div><div class='ctx'> 	dcdc-&gt;desc.owner = THIS_MODULE;</div><div class='del'>-</div><div class='del'>-	dcdc-&gt;regulator = regulator_register(&amp;dcdc-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-					     pdata-&gt;dcdc[id], dcdc, NULL);</div><div class='add'>+	dcdc-&gt;desc.vsel_reg = dcdc-&gt;base + WM831X_DCDC_ON_CONFIG;</div><div class='add'>+	dcdc-&gt;desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;</div><div class='add'>+	dcdc-&gt;desc.enable_reg = WM831X_DCDC_ENABLE;</div><div class='add'>+	dcdc-&gt;desc.enable_mask = 1 &lt;&lt; id;</div><div class='add'>+</div><div class='add'>+	config.dev = pdev-&gt;dev.parent;</div><div class='add'>+	if (pdata)</div><div class='add'>+		config.init_data = pdata-&gt;dcdc[id];</div><div class='add'>+	config.driver_data = dcdc;</div><div class='add'>+	config.regmap = wm831x-&gt;regmap;</div><div class='add'>+</div><div class='add'>+	dcdc-&gt;regulator = regulator_register(&amp;dcdc-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(dcdc-&gt;regulator)) {</div><div class='ctx'> 		ret = PTR_ERR(dcdc-&gt;regulator);</div><div class='ctx'> 		dev_err(wm831x-&gt;dev, "Failed to register DCDC%d: %d\n",</div><div class='hunk'>@@ -758,7 +730,7 @@ static __devinit int wm831x_buckp_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_irq_byname(pdev, "UV");</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));</div><div class='ctx'> 	ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,</div><div class='ctx'> 				   IRQF_TRIGGER_RISING,	dcdc-&gt;name, dcdc);</div><div class='ctx'> 	if (ret != 0) {</div><div class='hunk'>@@ -783,7 +755,8 @@ static __devexit int wm831x_buckp_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='del'>-	free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);</div><div class='add'>+	free_irq(wm831x_irq(dcdc-&gt;wm831x, platform_get_irq_byname(pdev, "UV")),</div><div class='add'>+			    dcdc);</div><div class='ctx'> 	regulator_unregister(dcdc-&gt;regulator);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -832,15 +805,16 @@ static int wm831x_boostp_get_status(struct regulator_dev *rdev)</div><div class='ctx'> static struct regulator_ops wm831x_boostp_ops = {</div><div class='ctx'> 	.get_status = wm831x_boostp_get_status,</div><div class='ctx'> </div><div class='del'>-	.is_enabled = wm831x_dcdc_is_enabled,</div><div class='del'>-	.enable = wm831x_dcdc_enable,</div><div class='del'>-	.disable = wm831x_dcdc_disable,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __devinit int wm831x_boostp_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x *wm831x = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct wm831x_pdata *pdata = wm831x-&gt;dev-&gt;platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int id = pdev-&gt;id % ARRAY_SIZE(pdata-&gt;dcdc);</div><div class='ctx'> 	struct wm831x_dcdc *dcdc;</div><div class='ctx'> 	struct resource *res;</div><div class='hunk'>@@ -851,7 +825,7 @@ static __devinit int wm831x_boostp_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (pdata == NULL || pdata-&gt;dcdc[id] == NULL)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);</div><div class='add'>+	dcdc = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);</div><div class='ctx'> 	if (dcdc == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unable to allocate private data\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -873,9 +847,16 @@ static __devinit int wm831x_boostp_probe(struct platform_device *pdev)</div><div class='ctx'> 	dcdc-&gt;desc.type = REGULATOR_VOLTAGE;</div><div class='ctx'> 	dcdc-&gt;desc.ops = &amp;wm831x_boostp_ops;</div><div class='ctx'> 	dcdc-&gt;desc.owner = THIS_MODULE;</div><div class='add'>+	dcdc-&gt;desc.enable_reg = WM831X_DCDC_ENABLE;</div><div class='add'>+	dcdc-&gt;desc.enable_mask = 1 &lt;&lt; id;</div><div class='ctx'> </div><div class='del'>-	dcdc-&gt;regulator = regulator_register(&amp;dcdc-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-					     pdata-&gt;dcdc[id], dcdc, NULL);</div><div class='add'>+	config.dev = pdev-&gt;dev.parent;</div><div class='add'>+	if (pdata)</div><div class='add'>+		config.init_data = pdata-&gt;dcdc[id];</div><div class='add'>+	config.driver_data = dcdc;</div><div class='add'>+	config.regmap = wm831x-&gt;regmap;</div><div class='add'>+</div><div class='add'>+	dcdc-&gt;regulator = regulator_register(&amp;dcdc-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(dcdc-&gt;regulator)) {</div><div class='ctx'> 		ret = PTR_ERR(dcdc-&gt;regulator);</div><div class='ctx'> 		dev_err(wm831x-&gt;dev, "Failed to register DCDC%d: %d\n",</div><div class='hunk'>@@ -883,7 +864,7 @@ static __devinit int wm831x_boostp_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_irq_byname(pdev, "UV");</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));</div><div class='ctx'> 	ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,</div><div class='ctx'> 				   IRQF_TRIGGER_RISING, dcdc-&gt;name,</div><div class='ctx'> 				   dcdc);</div><div class='hunk'>@@ -900,7 +881,6 @@ static __devinit int wm831x_boostp_probe(struct platform_device *pdev)</div><div class='ctx'> err_regulator:</div><div class='ctx'> 	regulator_unregister(dcdc-&gt;regulator);</div><div class='ctx'> err:</div><div class='del'>-	kfree(dcdc);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -910,9 +890,9 @@ static __devexit int wm831x_boostp_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='del'>-	free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);</div><div class='add'>+	free_irq(wm831x_irq(dcdc-&gt;wm831x, platform_get_irq_byname(pdev, "UV")),</div><div class='add'>+		 dcdc);</div><div class='ctx'> 	regulator_unregister(dcdc-&gt;regulator);</div><div class='del'>-	kfree(dcdc);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -936,9 +916,9 @@ static struct platform_driver wm831x_boostp_driver = {</div><div class='ctx'> #define WM831X_EPE_BASE 6</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops wm831x_epe_ops = {</div><div class='del'>-	.is_enabled = wm831x_dcdc_is_enabled,</div><div class='del'>-	.enable = wm831x_dcdc_enable,</div><div class='del'>-	.disable = wm831x_dcdc_disable,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='ctx'> 	.get_status = wm831x_dcdc_get_status,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -946,16 +926,14 @@ static __devinit int wm831x_epe_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x *wm831x = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct wm831x_pdata *pdata = wm831x-&gt;dev-&gt;platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int id = pdev-&gt;id % ARRAY_SIZE(pdata-&gt;epe);</div><div class='ctx'> 	struct wm831x_dcdc *dcdc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "Probing EPE%d\n", id + 1);</div><div class='ctx'> </div><div class='del'>-	if (pdata == NULL || pdata-&gt;epe[id] == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);</div><div class='add'>+	dcdc = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);</div><div class='ctx'> 	if (dcdc == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unable to allocate private data\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -972,9 +950,16 @@ static __devinit int wm831x_epe_probe(struct platform_device *pdev)</div><div class='ctx'> 	dcdc-&gt;desc.ops = &amp;wm831x_epe_ops;</div><div class='ctx'> 	dcdc-&gt;desc.type = REGULATOR_VOLTAGE;</div><div class='ctx'> 	dcdc-&gt;desc.owner = THIS_MODULE;</div><div class='add'>+	dcdc-&gt;desc.enable_reg = WM831X_DCDC_ENABLE;</div><div class='add'>+	dcdc-&gt;desc.enable_mask = 1 &lt;&lt; dcdc-&gt;desc.id;</div><div class='add'>+</div><div class='add'>+	config.dev = pdev-&gt;dev.parent;</div><div class='add'>+	if (pdata)</div><div class='add'>+		config.init_data = pdata-&gt;epe[id];</div><div class='add'>+	config.driver_data = dcdc;</div><div class='add'>+	config.regmap = wm831x-&gt;regmap;</div><div class='ctx'> </div><div class='del'>-	dcdc-&gt;regulator = regulator_register(&amp;dcdc-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-					     pdata-&gt;epe[id], dcdc, NULL);</div><div class='add'>+	dcdc-&gt;regulator = regulator_register(&amp;dcdc-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(dcdc-&gt;regulator)) {</div><div class='ctx'> 		ret = PTR_ERR(dcdc-&gt;regulator);</div><div class='ctx'> 		dev_err(wm831x-&gt;dev, "Failed to register EPE%d: %d\n",</div><div class='hunk'>@@ -987,7 +972,6 @@ static __devinit int wm831x_epe_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	kfree(dcdc);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -996,9 +980,7 @@ static __devexit int wm831x_epe_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='del'>-</div><div class='ctx'> 	regulator_unregister(dcdc-&gt;regulator);</div><div class='del'>-	kfree(dcdc);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/regulator/wm831x-isink.c b/drivers/regulator/wm831x-isink.c<br/>index b414e09c5620..0d207c297714 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/wm831x-isink.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/wm831x-isink.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/wm831x-isink.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/wm831x-isink.c</a></div><div class='hunk'>@@ -154,6 +154,7 @@ static __devinit int wm831x_isink_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct wm831x_pdata *pdata = wm831x-&gt;dev-&gt;platform_data;</div><div class='ctx'> 	struct wm831x_isink *isink;</div><div class='ctx'> 	int id = pdev-&gt;id % ARRAY_SIZE(pdata-&gt;isink);</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	int ret, irq;</div><div class='ctx'> </div><div class='hunk'>@@ -189,8 +190,11 @@ static __devinit int wm831x_isink_probe(struct platform_device *pdev)</div><div class='ctx'> 	isink-&gt;desc.type = REGULATOR_CURRENT;</div><div class='ctx'> 	isink-&gt;desc.owner = THIS_MODULE;</div><div class='ctx'> </div><div class='del'>-	isink-&gt;regulator = regulator_register(&amp;isink-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-					     pdata-&gt;isink[id], isink, NULL);</div><div class='add'>+	config.dev = pdev-&gt;dev.parent;</div><div class='add'>+	config.init_data = pdata-&gt;isink[id];</div><div class='add'>+	config.driver_data = isink;</div><div class='add'>+</div><div class='add'>+	isink-&gt;regulator = regulator_register(&amp;isink-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(isink-&gt;regulator)) {</div><div class='ctx'> 		ret = PTR_ERR(isink-&gt;regulator);</div><div class='ctx'> 		dev_err(wm831x-&gt;dev, "Failed to register ISINK%d: %d\n",</div><div class='hunk'>@@ -198,7 +202,7 @@ static __devinit int wm831x_isink_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq(pdev, 0));</div><div class='ctx'> 	ret = request_threaded_irq(irq, NULL, wm831x_isink_irq,</div><div class='ctx'> 				   IRQF_TRIGGER_RISING, isink-&gt;name, isink);</div><div class='ctx'> 	if (ret != 0) {</div><div class='hunk'>@@ -223,7 +227,7 @@ static __devexit int wm831x_isink_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='del'>-	free_irq(platform_get_irq(pdev, 0), isink);</div><div class='add'>+	free_irq(wm831x_irq(isink-&gt;wm831x, platform_get_irq(pdev, 0)), isink);</div><div class='ctx'> </div><div class='ctx'> 	regulator_unregister(isink-&gt;regulator);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/wm831x-ldo.c b/drivers/regulator/wm831x-ldo.c<br/>index 641e9f6499d1..a9a28d8ac185 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/wm831x-ldo.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/wm831x-ldo.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/wm831x-ldo.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/wm831x-ldo.c</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> #include &lt;linux/mfd/wm831x/regulator.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/wm831x/pdata.h&gt;</div><div class='ctx'> </div><div class='del'>-#define WM831X_LDO_MAX_NAME 6</div><div class='add'>+#define WM831X_LDO_MAX_NAME 9</div><div class='ctx'> </div><div class='ctx'> #define WM831X_LDO_CONTROL       0</div><div class='ctx'> #define WM831X_LDO_ON_CONTROL    1</div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> </div><div class='ctx'> struct wm831x_ldo {</div><div class='ctx'> 	char name[WM831X_LDO_MAX_NAME];</div><div class='add'>+	char supply_name[WM831X_LDO_MAX_NAME];</div><div class='ctx'> 	struct regulator_desc desc;</div><div class='ctx'> 	int base;</div><div class='ctx'> 	struct wm831x *wm831x;</div><div class='hunk'>@@ -46,41 +47,6 @@ struct wm831x_ldo {</div><div class='ctx'>  * Shared</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static int wm831x_ldo_is_enabled(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='del'>-	struct wm831x *wm831x = ldo-&gt;wm831x;</div><div class='del'>-	int mask = 1 &lt;&lt; rdev_get_id(rdev);</div><div class='del'>-	int reg;</div><div class='del'>-</div><div class='del'>-	reg = wm831x_reg_read(wm831x, WM831X_LDO_ENABLE);</div><div class='del'>-	if (reg &lt; 0)</div><div class='del'>-		return reg;</div><div class='del'>-</div><div class='del'>-	if (reg &amp; mask)</div><div class='del'>-		return 1;</div><div class='del'>-	else</div><div class='del'>-		return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm831x_ldo_enable(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='del'>-	struct wm831x *wm831x = ldo-&gt;wm831x;</div><div class='del'>-	int mask = 1 &lt;&lt; rdev_get_id(rdev);</div><div class='del'>-</div><div class='del'>-	return wm831x_set_bits(wm831x, WM831X_LDO_ENABLE, mask, mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm831x_ldo_disable(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='del'>-	struct wm831x *wm831x = ldo-&gt;wm831x;</div><div class='del'>-	int mask = 1 &lt;&lt; rdev_get_id(rdev);</div><div class='del'>-</div><div class='del'>-	return wm831x_set_bits(wm831x, WM831X_LDO_ENABLE, mask, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static irqreturn_t wm831x_ldo_uv_irq(int irq, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x_ldo *ldo = data;</div><div class='hunk'>@@ -105,7 +71,7 @@ static int wm831x_gp_ldo_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	/* 0.9-1.6V in 50mV steps */</div><div class='ctx'> 	if (selector &lt;= WM831X_GP_LDO_SELECTOR_LOW)</div><div class='ctx'> 		return 900000 + (selector * 50000);</div><div class='del'>-	/* 1.7-3.3V in 50mV steps */</div><div class='add'>+	/* 1.7-3.3V in 100mV steps */</div><div class='ctx'> 	if (selector &lt;= WM831X_GP_LDO_MAX_SELECTOR)</div><div class='ctx'> 		return 1600000 + ((selector - WM831X_GP_LDO_SELECTOR_LOW)</div><div class='ctx'> 				  * 100000);</div><div class='hunk'>@@ -160,22 +126,6 @@ static int wm831x_gp_ldo_set_suspend_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	return wm831x_gp_ldo_set_voltage_int(rdev, reg, uV, uV, &amp;selector);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wm831x_gp_ldo_get_voltage_sel(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='del'>-	struct wm831x *wm831x = ldo-&gt;wm831x;</div><div class='del'>-	int reg = ldo-&gt;base + WM831X_LDO_ON_CONTROL;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = wm831x_reg_read(wm831x, reg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret &amp;= WM831X_LDO1_ON_VSEL_MASK;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static unsigned int wm831x_gp_ldo_get_mode(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='hunk'>@@ -293,7 +243,7 @@ static unsigned int wm831x_gp_ldo_get_optimum_mode(struct regulator_dev *rdev,</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops wm831x_gp_ldo_ops = {</div><div class='ctx'> 	.list_voltage = wm831x_gp_ldo_list_voltage,</div><div class='del'>-	.get_voltage_sel = wm831x_gp_ldo_get_voltage_sel,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='ctx'> 	.set_voltage = wm831x_gp_ldo_set_voltage,</div><div class='ctx'> 	.set_suspend_voltage = wm831x_gp_ldo_set_suspend_voltage,</div><div class='ctx'> 	.get_mode = wm831x_gp_ldo_get_mode,</div><div class='hunk'>@@ -301,15 +251,16 @@ static struct regulator_ops wm831x_gp_ldo_ops = {</div><div class='ctx'> 	.get_status = wm831x_gp_ldo_get_status,</div><div class='ctx'> 	.get_optimum_mode = wm831x_gp_ldo_get_optimum_mode,</div><div class='ctx'> </div><div class='del'>-	.is_enabled = wm831x_ldo_is_enabled,</div><div class='del'>-	.enable = wm831x_ldo_enable,</div><div class='del'>-	.disable = wm831x_ldo_disable,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __devinit int wm831x_gp_ldo_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x *wm831x = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct wm831x_pdata *pdata = wm831x-&gt;dev-&gt;platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int id;</div><div class='ctx'> 	struct wm831x_ldo *ldo;</div><div class='ctx'> 	struct resource *res;</div><div class='hunk'>@@ -323,9 +274,6 @@ static __devinit int wm831x_gp_ldo_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "Probing LDO%d\n", id + 1);</div><div class='ctx'> </div><div class='del'>-	if (pdata == NULL || pdata-&gt;ldo[id] == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	ldo = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct wm831x_ldo), GFP_KERNEL);</div><div class='ctx'> 	if (ldo == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unable to allocate private data\n");</div><div class='hunk'>@@ -344,14 +292,28 @@ static __devinit int wm831x_gp_ldo_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	snprintf(ldo-&gt;name, sizeof(ldo-&gt;name), "LDO%d", id + 1);</div><div class='ctx'> 	ldo-&gt;desc.name = ldo-&gt;name;</div><div class='add'>+</div><div class='add'>+	snprintf(ldo-&gt;supply_name, sizeof(ldo-&gt;supply_name),</div><div class='add'>+		 "LDO%dVDD", id + 1);</div><div class='add'>+	ldo-&gt;desc.supply_name = ldo-&gt;supply_name;</div><div class='add'>+</div><div class='ctx'> 	ldo-&gt;desc.id = id;</div><div class='ctx'> 	ldo-&gt;desc.type = REGULATOR_VOLTAGE;</div><div class='ctx'> 	ldo-&gt;desc.n_voltages = WM831X_GP_LDO_MAX_SELECTOR + 1;</div><div class='ctx'> 	ldo-&gt;desc.ops = &amp;wm831x_gp_ldo_ops;</div><div class='ctx'> 	ldo-&gt;desc.owner = THIS_MODULE;</div><div class='del'>-</div><div class='del'>-	ldo-&gt;regulator = regulator_register(&amp;ldo-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-					     pdata-&gt;ldo[id], ldo, NULL);</div><div class='add'>+	ldo-&gt;desc.vsel_reg = ldo-&gt;base + WM831X_LDO_ON_CONTROL;</div><div class='add'>+	ldo-&gt;desc.vsel_mask = WM831X_LDO1_ON_VSEL_MASK;</div><div class='add'>+	ldo-&gt;desc.enable_reg = WM831X_LDO_ENABLE;</div><div class='add'>+	ldo-&gt;desc.enable_mask = 1 &lt;&lt; id;</div><div class='add'>+</div><div class='add'>+	config.dev = pdev-&gt;dev.parent;</div><div class='add'>+	if (pdata)</div><div class='add'>+		config.init_data = pdata-&gt;ldo[id];</div><div class='add'>+	config.driver_data = ldo;</div><div class='add'>+	config.regmap = wm831x-&gt;regmap;</div><div class='add'>+</div><div class='add'>+	ldo-&gt;regulator = regulator_register(&amp;ldo-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(ldo-&gt;regulator)) {</div><div class='ctx'> 		ret = PTR_ERR(ldo-&gt;regulator);</div><div class='ctx'> 		dev_err(wm831x-&gt;dev, "Failed to register LDO%d: %d\n",</div><div class='hunk'>@@ -359,7 +321,7 @@ static __devinit int wm831x_gp_ldo_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_irq_byname(pdev, "UV");</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));</div><div class='ctx'> 	ret = request_threaded_irq(irq, NULL, wm831x_ldo_uv_irq,</div><div class='ctx'> 				   IRQF_TRIGGER_RISING, ldo-&gt;name,</div><div class='ctx'> 				   ldo);</div><div class='hunk'>@@ -385,7 +347,8 @@ static __devexit int wm831x_gp_ldo_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='del'>-	free_irq(platform_get_irq_byname(pdev, "UV"), ldo);</div><div class='add'>+	free_irq(wm831x_irq(ldo-&gt;wm831x,</div><div class='add'>+			    platform_get_irq_byname(pdev, "UV")), ldo);</div><div class='ctx'> 	regulator_unregister(ldo-&gt;regulator);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -414,7 +377,7 @@ static int wm831x_aldo_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	/* 1-1.6V in 50mV steps */</div><div class='ctx'> 	if (selector &lt;= WM831X_ALDO_SELECTOR_LOW)</div><div class='ctx'> 		return 1000000 + (selector * 50000);</div><div class='del'>-	/* 1.7-3.5V in 50mV steps */</div><div class='add'>+	/* 1.7-3.5V in 100mV steps */</div><div class='ctx'> 	if (selector &lt;= WM831X_ALDO_MAX_SELECTOR)</div><div class='ctx'> 		return 1600000 + ((selector - WM831X_ALDO_SELECTOR_LOW)</div><div class='ctx'> 				  * 100000);</div><div class='hunk'>@@ -468,22 +431,6 @@ static int wm831x_aldo_set_suspend_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	return wm831x_aldo_set_voltage_int(rdev, reg, uV, uV, &amp;selector);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wm831x_aldo_get_voltage_sel(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='del'>-	struct wm831x *wm831x = ldo-&gt;wm831x;</div><div class='del'>-	int reg = ldo-&gt;base + WM831X_LDO_ON_CONTROL;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = wm831x_reg_read(wm831x, reg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret &amp;= WM831X_LDO7_ON_VSEL_MASK;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static unsigned int wm831x_aldo_get_mode(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='hunk'>@@ -559,22 +506,23 @@ static int wm831x_aldo_get_status(struct regulator_dev *rdev)</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops wm831x_aldo_ops = {</div><div class='ctx'> 	.list_voltage = wm831x_aldo_list_voltage,</div><div class='del'>-	.get_voltage_sel = wm831x_aldo_get_voltage_sel,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='ctx'> 	.set_voltage = wm831x_aldo_set_voltage,</div><div class='ctx'> 	.set_suspend_voltage = wm831x_aldo_set_suspend_voltage,</div><div class='ctx'> 	.get_mode = wm831x_aldo_get_mode,</div><div class='ctx'> 	.set_mode = wm831x_aldo_set_mode,</div><div class='ctx'> 	.get_status = wm831x_aldo_get_status,</div><div class='ctx'> </div><div class='del'>-	.is_enabled = wm831x_ldo_is_enabled,</div><div class='del'>-	.enable = wm831x_ldo_enable,</div><div class='del'>-	.disable = wm831x_ldo_disable,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __devinit int wm831x_aldo_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x *wm831x = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct wm831x_pdata *pdata = wm831x-&gt;dev-&gt;platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int id;</div><div class='ctx'> 	struct wm831x_ldo *ldo;</div><div class='ctx'> 	struct resource *res;</div><div class='hunk'>@@ -588,9 +536,6 @@ static __devinit int wm831x_aldo_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "Probing LDO%d\n", id + 1);</div><div class='ctx'> </div><div class='del'>-	if (pdata == NULL || pdata-&gt;ldo[id] == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	ldo = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct wm831x_ldo), GFP_KERNEL);</div><div class='ctx'> 	if (ldo == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unable to allocate private data\n");</div><div class='hunk'>@@ -609,14 +554,28 @@ static __devinit int wm831x_aldo_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	snprintf(ldo-&gt;name, sizeof(ldo-&gt;name), "LDO%d", id + 1);</div><div class='ctx'> 	ldo-&gt;desc.name = ldo-&gt;name;</div><div class='add'>+</div><div class='add'>+	snprintf(ldo-&gt;supply_name, sizeof(ldo-&gt;supply_name),</div><div class='add'>+		 "LDO%dVDD", id + 1);</div><div class='add'>+	ldo-&gt;desc.supply_name = ldo-&gt;supply_name;</div><div class='add'>+</div><div class='ctx'> 	ldo-&gt;desc.id = id;</div><div class='ctx'> 	ldo-&gt;desc.type = REGULATOR_VOLTAGE;</div><div class='ctx'> 	ldo-&gt;desc.n_voltages = WM831X_ALDO_MAX_SELECTOR + 1;</div><div class='ctx'> 	ldo-&gt;desc.ops = &amp;wm831x_aldo_ops;</div><div class='ctx'> 	ldo-&gt;desc.owner = THIS_MODULE;</div><div class='del'>-</div><div class='del'>-	ldo-&gt;regulator = regulator_register(&amp;ldo-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-					     pdata-&gt;ldo[id], ldo, NULL);</div><div class='add'>+	ldo-&gt;desc.vsel_reg = ldo-&gt;base + WM831X_LDO_ON_CONTROL;</div><div class='add'>+	ldo-&gt;desc.vsel_mask = WM831X_LDO7_ON_VSEL_MASK;</div><div class='add'>+	ldo-&gt;desc.enable_reg = WM831X_LDO_ENABLE;</div><div class='add'>+	ldo-&gt;desc.enable_mask = 1 &lt;&lt; id;</div><div class='add'>+</div><div class='add'>+	config.dev = pdev-&gt;dev.parent;</div><div class='add'>+	if (pdata)</div><div class='add'>+		config.init_data = pdata-&gt;ldo[id];</div><div class='add'>+	config.driver_data = ldo;</div><div class='add'>+	config.regmap = wm831x-&gt;regmap;</div><div class='add'>+</div><div class='add'>+	ldo-&gt;regulator = regulator_register(&amp;ldo-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(ldo-&gt;regulator)) {</div><div class='ctx'> 		ret = PTR_ERR(ldo-&gt;regulator);</div><div class='ctx'> 		dev_err(wm831x-&gt;dev, "Failed to register LDO%d: %d\n",</div><div class='hunk'>@@ -624,7 +583,7 @@ static __devinit int wm831x_aldo_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_irq_byname(pdev, "UV");</div><div class='add'>+	irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));</div><div class='ctx'> 	ret = request_threaded_irq(irq, NULL, wm831x_ldo_uv_irq,</div><div class='ctx'> 				   IRQF_TRIGGER_RISING, ldo-&gt;name, ldo);</div><div class='ctx'> 	if (ret != 0) {</div><div class='hunk'>@@ -647,7 +606,8 @@ static __devexit int wm831x_aldo_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x_ldo *ldo = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='del'>-	free_irq(platform_get_irq_byname(pdev, "UV"), ldo);</div><div class='add'>+	free_irq(wm831x_irq(ldo-&gt;wm831x, platform_get_irq_byname(pdev, "UV")),</div><div class='add'>+		 ldo);</div><div class='ctx'> 	regulator_unregister(ldo-&gt;regulator);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -668,15 +628,6 @@ static struct platform_driver wm831x_aldo_driver = {</div><div class='ctx'> </div><div class='ctx'> #define WM831X_ALIVE_LDO_MAX_SELECTOR 0xf</div><div class='ctx'> </div><div class='del'>-static int wm831x_alive_ldo_list_voltage(struct regulator_dev *rdev,</div><div class='del'>-				      unsigned int selector)</div><div class='del'>-{</div><div class='del'>-	/* 0.8-1.55V in 50mV steps */</div><div class='del'>-	if (selector &lt;= WM831X_ALIVE_LDO_MAX_SELECTOR)</div><div class='del'>-		return 800000 + (selector * 50000);</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int wm831x_alive_ldo_set_voltage_int(struct regulator_dev *rdev,</div><div class='ctx'> 					    int reg,</div><div class='ctx'> 					    int min_uV, int max_uV,</div><div class='hunk'>@@ -688,7 +639,7 @@ static int wm831x_alive_ldo_set_voltage_int(struct regulator_dev *rdev,</div><div class='ctx'> </div><div class='ctx'> 	vsel = (min_uV - 800000) / 50000;</div><div class='ctx'> </div><div class='del'>-	ret = wm831x_alive_ldo_list_voltage(rdev, vsel);</div><div class='add'>+	ret = regulator_list_voltage_linear(rdev, vsel);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	if (ret &lt; min_uV || ret &gt; max_uV)</div><div class='hunk'>@@ -720,22 +671,6 @@ static int wm831x_alive_ldo_set_suspend_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	return wm831x_alive_ldo_set_voltage_int(rdev, reg, uV, uV, &amp;selector);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wm831x_alive_ldo_get_voltage_sel(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='del'>-	struct wm831x *wm831x = ldo-&gt;wm831x;</div><div class='del'>-	int reg = ldo-&gt;base + WM831X_ALIVE_LDO_ON_CONTROL;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = wm831x_reg_read(wm831x, reg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret &amp;= WM831X_LDO11_ON_VSEL_MASK;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int wm831x_alive_ldo_get_status(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='hunk'>@@ -754,21 +689,22 @@ static int wm831x_alive_ldo_get_status(struct regulator_dev *rdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops wm831x_alive_ldo_ops = {</div><div class='del'>-	.list_voltage = wm831x_alive_ldo_list_voltage,</div><div class='del'>-	.get_voltage_sel = wm831x_alive_ldo_get_voltage_sel,</div><div class='add'>+	.list_voltage = regulator_list_voltage_linear,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='ctx'> 	.set_voltage = wm831x_alive_ldo_set_voltage,</div><div class='ctx'> 	.set_suspend_voltage = wm831x_alive_ldo_set_suspend_voltage,</div><div class='ctx'> 	.get_status = wm831x_alive_ldo_get_status,</div><div class='ctx'> </div><div class='del'>-	.is_enabled = wm831x_ldo_is_enabled,</div><div class='del'>-	.enable = wm831x_ldo_enable,</div><div class='del'>-	.disable = wm831x_ldo_disable,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __devinit int wm831x_alive_ldo_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x *wm831x = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct wm831x_pdata *pdata = wm831x-&gt;dev-&gt;platform_data;</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	int id;</div><div class='ctx'> 	struct wm831x_ldo *ldo;</div><div class='ctx'> 	struct resource *res;</div><div class='hunk'>@@ -783,9 +719,6 @@ static __devinit int wm831x_alive_ldo_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "Probing LDO%d\n", id + 1);</div><div class='ctx'> </div><div class='del'>-	if (pdata == NULL || pdata-&gt;ldo[id] == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	ldo = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct wm831x_ldo), GFP_KERNEL);</div><div class='ctx'> 	if (ldo == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unable to allocate private data\n");</div><div class='hunk'>@@ -804,14 +737,30 @@ static __devinit int wm831x_alive_ldo_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	snprintf(ldo-&gt;name, sizeof(ldo-&gt;name), "LDO%d", id + 1);</div><div class='ctx'> 	ldo-&gt;desc.name = ldo-&gt;name;</div><div class='add'>+</div><div class='add'>+	snprintf(ldo-&gt;supply_name, sizeof(ldo-&gt;supply_name),</div><div class='add'>+		 "LDO%dVDD", id + 1);</div><div class='add'>+	ldo-&gt;desc.supply_name = ldo-&gt;supply_name;</div><div class='add'>+</div><div class='ctx'> 	ldo-&gt;desc.id = id;</div><div class='ctx'> 	ldo-&gt;desc.type = REGULATOR_VOLTAGE;</div><div class='ctx'> 	ldo-&gt;desc.n_voltages = WM831X_ALIVE_LDO_MAX_SELECTOR + 1;</div><div class='ctx'> 	ldo-&gt;desc.ops = &amp;wm831x_alive_ldo_ops;</div><div class='ctx'> 	ldo-&gt;desc.owner = THIS_MODULE;</div><div class='del'>-</div><div class='del'>-	ldo-&gt;regulator = regulator_register(&amp;ldo-&gt;desc, &amp;pdev-&gt;dev,</div><div class='del'>-					     pdata-&gt;ldo[id], ldo, NULL);</div><div class='add'>+	ldo-&gt;desc.vsel_reg = ldo-&gt;base + WM831X_ALIVE_LDO_ON_CONTROL;</div><div class='add'>+	ldo-&gt;desc.vsel_mask = WM831X_LDO11_ON_VSEL_MASK;</div><div class='add'>+	ldo-&gt;desc.enable_reg = WM831X_LDO_ENABLE;</div><div class='add'>+	ldo-&gt;desc.enable_mask = 1 &lt;&lt; id;</div><div class='add'>+	ldo-&gt;desc.min_uV = 800000;</div><div class='add'>+	ldo-&gt;desc.uV_step = 50000;</div><div class='add'>+</div><div class='add'>+	config.dev = pdev-&gt;dev.parent;</div><div class='add'>+	if (pdata)</div><div class='add'>+		config.init_data = pdata-&gt;ldo[id];</div><div class='add'>+	config.driver_data = ldo;</div><div class='add'>+	config.regmap = wm831x-&gt;regmap;</div><div class='add'>+</div><div class='add'>+	ldo-&gt;regulator = regulator_register(&amp;ldo-&gt;desc, &amp;config);</div><div class='ctx'> 	if (IS_ERR(ldo-&gt;regulator)) {</div><div class='ctx'> 		ret = PTR_ERR(ldo-&gt;regulator);</div><div class='ctx'> 		dev_err(wm831x-&gt;dev, "Failed to register LDO%d: %d\n",</div><div class='head'>diff --git a/drivers/regulator/wm8350-regulator.c b/drivers/regulator/wm8350-regulator.c<br/>index 05ecfb872319..94e550dc70b6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/wm8350-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/wm8350-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/wm8350-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/wm8350-regulator.c</a></div><div class='hunk'>@@ -1269,7 +1269,7 @@ static struct regulator_ops wm8350_isink_ops = {</div><div class='ctx'> 	.enable_time = wm8350_isink_enable_time,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = {</div><div class='add'>+static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "DCDC1",</div><div class='ctx'> 		.id = WM8350_DCDC_1,</div><div class='hunk'>@@ -1398,6 +1398,7 @@ static irqreturn_t pmic_uv_handler(int irq, void *data)</div><div class='ctx'> static int wm8350_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm8350 *wm8350 = dev_get_drvdata(&amp;pdev-&gt;dev);</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u16 val;</div><div class='hunk'>@@ -1425,10 +1426,12 @@ static int wm8350_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = pdev-&gt;dev.platform_data;</div><div class='add'>+	config.driver_data = dev_get_drvdata(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='ctx'> 	/* register regulator */</div><div class='del'>-	rdev = regulator_register(&amp;wm8350_reg[pdev-&gt;id], &amp;pdev-&gt;dev,</div><div class='del'>-				  pdev-&gt;dev.platform_data,</div><div class='del'>-				  dev_get_drvdata(&amp;pdev-&gt;dev), NULL);</div><div class='add'>+	rdev = regulator_register(&amp;wm8350_reg[pdev-&gt;id], &amp;config);</div><div class='ctx'> 	if (IS_ERR(rdev)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to register %s\n",</div><div class='ctx'> 			wm8350_reg[pdev-&gt;id].name);</div><div class='head'>diff --git a/drivers/regulator/wm8400-regulator.c b/drivers/regulator/wm8400-regulator.c<br/>index 8477153780b6..69a2b7ce5e4a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/wm8400-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/wm8400-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/wm8400-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/wm8400-regulator.c</a></div><div class='hunk'>@@ -19,31 +19,6 @@</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/wm8400-private.h&gt;</div><div class='ctx'> </div><div class='del'>-static int wm8400_ldo_is_enabled(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct wm8400 *wm8400 = rdev_get_drvdata(dev);</div><div class='del'>-	u16 val;</div><div class='del'>-</div><div class='del'>-	val = wm8400_reg_read(wm8400, WM8400_LDO1_CONTROL + rdev_get_id(dev));</div><div class='del'>-	return (val &amp; WM8400_LDO1_ENA) != 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm8400_ldo_enable(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct wm8400 *wm8400 = rdev_get_drvdata(dev);</div><div class='del'>-</div><div class='del'>-	return wm8400_set_bits(wm8400, WM8400_LDO1_CONTROL + rdev_get_id(dev),</div><div class='del'>-			       WM8400_LDO1_ENA, WM8400_LDO1_ENA);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm8400_ldo_disable(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct wm8400 *wm8400 = rdev_get_drvdata(dev);</div><div class='del'>-</div><div class='del'>-	return wm8400_set_bits(wm8400, WM8400_LDO1_CONTROL + rdev_get_id(dev),</div><div class='del'>-			       WM8400_LDO1_ENA, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int wm8400_ldo_list_voltage(struct regulator_dev *dev,</div><div class='ctx'> 				   unsigned selector)</div><div class='ctx'> {</div><div class='hunk'>@@ -56,21 +31,9 @@ static int wm8400_ldo_list_voltage(struct regulator_dev *dev,</div><div class='ctx'> 		return 1600000 + ((selector - 14) * 100000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wm8400_ldo_get_voltage_sel(struct regulator_dev *dev)</div><div class='add'>+static int wm8400_ldo_map_voltage(struct regulator_dev *dev,</div><div class='add'>+				  int min_uV, int max_uV)</div><div class='ctx'> {</div><div class='del'>-	struct wm8400 *wm8400 = rdev_get_drvdata(dev);</div><div class='del'>-	u16 val;</div><div class='del'>-</div><div class='del'>-	val = wm8400_reg_read(wm8400, WM8400_LDO1_CONTROL + rdev_get_id(dev));</div><div class='del'>-	val &amp;= WM8400_LDO1_VSEL_MASK;</div><div class='del'>-</div><div class='del'>-	return val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm8400_ldo_set_voltage(struct regulator_dev *dev,</div><div class='del'>-				  int min_uV, int max_uV, unsigned *selector)</div><div class='del'>-{</div><div class='del'>-	struct wm8400 *wm8400 = rdev_get_drvdata(dev);</div><div class='ctx'> 	u16 val;</div><div class='ctx'> </div><div class='ctx'> 	if (min_uV &lt; 900000 || min_uV &gt; 3300000)</div><div class='hunk'>@@ -94,92 +57,19 @@ static int wm8400_ldo_set_voltage(struct regulator_dev *dev,</div><div class='ctx'> 		val += 0xf;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*selector = val;</div><div class='del'>-</div><div class='del'>-	return wm8400_set_bits(wm8400, WM8400_LDO1_CONTROL + rdev_get_id(dev),</div><div class='del'>-			       WM8400_LDO1_VSEL_MASK, val);</div><div class='add'>+	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops wm8400_ldo_ops = {</div><div class='del'>-	.is_enabled = wm8400_ldo_is_enabled,</div><div class='del'>-	.enable = wm8400_ldo_enable,</div><div class='del'>-	.disable = wm8400_ldo_disable,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='ctx'> 	.list_voltage = wm8400_ldo_list_voltage,</div><div class='del'>-	.get_voltage_sel = wm8400_ldo_get_voltage_sel,</div><div class='del'>-	.set_voltage = wm8400_ldo_set_voltage,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='add'>+	.set_voltage_sel = regulator_set_voltage_sel_regmap,</div><div class='add'>+	.map_voltage = wm8400_ldo_map_voltage,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int wm8400_dcdc_is_enabled(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct wm8400 *wm8400 = rdev_get_drvdata(dev);</div><div class='del'>-	int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2;</div><div class='del'>-	u16 val;</div><div class='del'>-</div><div class='del'>-	val = wm8400_reg_read(wm8400, WM8400_DCDC1_CONTROL_1 + offset);</div><div class='del'>-	return (val &amp; WM8400_DC1_ENA) != 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm8400_dcdc_enable(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct wm8400 *wm8400 = rdev_get_drvdata(dev);</div><div class='del'>-	int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2;</div><div class='del'>-</div><div class='del'>-	return wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_1 + offset,</div><div class='del'>-			       WM8400_DC1_ENA, WM8400_DC1_ENA);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm8400_dcdc_disable(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct wm8400 *wm8400 = rdev_get_drvdata(dev);</div><div class='del'>-	int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2;</div><div class='del'>-</div><div class='del'>-	return wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_1 + offset,</div><div class='del'>-			       WM8400_DC1_ENA, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm8400_dcdc_list_voltage(struct regulator_dev *dev,</div><div class='del'>-				    unsigned selector)</div><div class='del'>-{</div><div class='del'>-	if (selector &gt; WM8400_DC1_VSEL_MASK)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return 850000 + (selector * 25000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm8400_dcdc_get_voltage_sel(struct regulator_dev *dev)</div><div class='del'>-{</div><div class='del'>-	struct wm8400 *wm8400 = rdev_get_drvdata(dev);</div><div class='del'>-	u16 val;</div><div class='del'>-	int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2;</div><div class='del'>-</div><div class='del'>-	val = wm8400_reg_read(wm8400, WM8400_DCDC1_CONTROL_1 + offset);</div><div class='del'>-	val &amp;= WM8400_DC1_VSEL_MASK;</div><div class='del'>-</div><div class='del'>-	return val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm8400_dcdc_set_voltage(struct regulator_dev *dev,</div><div class='del'>-				   int min_uV, int max_uV, unsigned *selector)</div><div class='del'>-{</div><div class='del'>-	struct wm8400 *wm8400 = rdev_get_drvdata(dev);</div><div class='del'>-	u16 val;</div><div class='del'>-	int offset = (rdev_get_id(dev) - WM8400_DCDC1) * 2;</div><div class='del'>-</div><div class='del'>-	if (min_uV &lt; 850000)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	val = DIV_ROUND_UP(min_uV - 850000, 25000);</div><div class='del'>-</div><div class='del'>-	if (850000 + (25000 * val) &gt; max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	BUG_ON(850000 + (25000 * val) &lt; min_uV);</div><div class='del'>-</div><div class='del'>-	*selector = val;</div><div class='del'>-</div><div class='del'>-	return wm8400_set_bits(wm8400, WM8400_DCDC1_CONTROL_1 + offset,</div><div class='del'>-			       WM8400_DC1_VSEL_MASK, val);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static unsigned int wm8400_dcdc_get_mode(struct regulator_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm8400 *wm8400 = rdev_get_drvdata(dev);</div><div class='hunk'>@@ -258,12 +148,12 @@ static unsigned int wm8400_dcdc_get_optimum_mode(struct regulator_dev *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regulator_ops wm8400_dcdc_ops = {</div><div class='del'>-	.is_enabled = wm8400_dcdc_is_enabled,</div><div class='del'>-	.enable = wm8400_dcdc_enable,</div><div class='del'>-	.disable = wm8400_dcdc_disable,</div><div class='del'>-	.list_voltage = wm8400_dcdc_list_voltage,</div><div class='del'>-	.get_voltage_sel = wm8400_dcdc_get_voltage_sel,</div><div class='del'>-	.set_voltage = wm8400_dcdc_set_voltage,</div><div class='add'>+	.is_enabled = regulator_is_enabled_regmap,</div><div class='add'>+	.enable = regulator_enable_regmap,</div><div class='add'>+	.disable = regulator_disable_regmap,</div><div class='add'>+	.list_voltage = regulator_list_voltage_linear,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='add'>+	.set_voltage_sel = regulator_set_voltage_sel_regmap,</div><div class='ctx'> 	.get_mode = wm8400_dcdc_get_mode,</div><div class='ctx'> 	.set_mode = wm8400_dcdc_set_mode,</div><div class='ctx'> 	.get_optimum_mode = wm8400_dcdc_get_optimum_mode,</div><div class='hunk'>@@ -274,7 +164,11 @@ static struct regulator_desc regulators[] = {</div><div class='ctx'> 		.name = "LDO1",</div><div class='ctx'> 		.id = WM8400_LDO1,</div><div class='ctx'> 		.ops = &amp;wm8400_ldo_ops,</div><div class='add'>+		.enable_reg = WM8400_LDO1_CONTROL,</div><div class='add'>+		.enable_mask = WM8400_LDO1_ENA,</div><div class='ctx'> 		.n_voltages = WM8400_LDO1_VSEL_MASK + 1,</div><div class='add'>+		.vsel_reg = WM8400_LDO1_CONTROL,</div><div class='add'>+		.vsel_mask = WM8400_LDO1_VSEL_MASK,</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -282,15 +176,23 @@ static struct regulator_desc regulators[] = {</div><div class='ctx'> 		.name = "LDO2",</div><div class='ctx'> 		.id = WM8400_LDO2,</div><div class='ctx'> 		.ops = &amp;wm8400_ldo_ops,</div><div class='add'>+		.enable_reg = WM8400_LDO2_CONTROL,</div><div class='add'>+		.enable_mask = WM8400_LDO2_ENA,</div><div class='ctx'> 		.n_voltages = WM8400_LDO2_VSEL_MASK + 1,</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='add'>+		.vsel_reg = WM8400_LDO2_CONTROL,</div><div class='add'>+		.vsel_mask = WM8400_LDO2_VSEL_MASK,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "LDO3",</div><div class='ctx'> 		.id = WM8400_LDO3,</div><div class='ctx'> 		.ops = &amp;wm8400_ldo_ops,</div><div class='add'>+		.enable_reg = WM8400_LDO3_CONTROL,</div><div class='add'>+		.enable_mask = WM8400_LDO3_ENA,</div><div class='ctx'> 		.n_voltages = WM8400_LDO3_VSEL_MASK + 1,</div><div class='add'>+		.vsel_reg = WM8400_LDO3_CONTROL,</div><div class='add'>+		.vsel_mask = WM8400_LDO3_VSEL_MASK,</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -298,7 +200,11 @@ static struct regulator_desc regulators[] = {</div><div class='ctx'> 		.name = "LDO4",</div><div class='ctx'> 		.id = WM8400_LDO4,</div><div class='ctx'> 		.ops = &amp;wm8400_ldo_ops,</div><div class='add'>+		.enable_reg = WM8400_LDO4_CONTROL,</div><div class='add'>+		.enable_mask = WM8400_LDO4_ENA,</div><div class='ctx'> 		.n_voltages = WM8400_LDO4_VSEL_MASK + 1,</div><div class='add'>+		.vsel_reg = WM8400_LDO4_CONTROL,</div><div class='add'>+		.vsel_mask = WM8400_LDO4_VSEL_MASK,</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -306,7 +212,13 @@ static struct regulator_desc regulators[] = {</div><div class='ctx'> 		.name = "DCDC1",</div><div class='ctx'> 		.id = WM8400_DCDC1,</div><div class='ctx'> 		.ops = &amp;wm8400_dcdc_ops,</div><div class='add'>+		.enable_reg = WM8400_DCDC1_CONTROL_1,</div><div class='add'>+		.enable_mask = WM8400_DC1_ENA_MASK,</div><div class='ctx'> 		.n_voltages = WM8400_DC1_VSEL_MASK + 1,</div><div class='add'>+		.vsel_reg = WM8400_DCDC1_CONTROL_1,</div><div class='add'>+		.vsel_mask = WM8400_DC1_VSEL_MASK,</div><div class='add'>+		.min_uV = 850000,</div><div class='add'>+		.uV_step = 25000,</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -314,7 +226,13 @@ static struct regulator_desc regulators[] = {</div><div class='ctx'> 		.name = "DCDC2",</div><div class='ctx'> 		.id = WM8400_DCDC2,</div><div class='ctx'> 		.ops = &amp;wm8400_dcdc_ops,</div><div class='add'>+		.enable_reg = WM8400_DCDC2_CONTROL_1,</div><div class='add'>+		.enable_mask = WM8400_DC1_ENA_MASK,</div><div class='ctx'> 		.n_voltages = WM8400_DC2_VSEL_MASK + 1,</div><div class='add'>+		.vsel_reg = WM8400_DCDC2_CONTROL_1,</div><div class='add'>+		.vsel_mask = WM8400_DC2_VSEL_MASK,</div><div class='add'>+		.min_uV = 850000,</div><div class='add'>+		.uV_step = 25000,</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -323,11 +241,15 @@ static struct regulator_desc regulators[] = {</div><div class='ctx'> static int __devinit wm8400_regulator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm8400 *wm8400 = container_of(pdev, struct wm8400, regulators[pdev-&gt;id]);</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct regulator_dev *rdev;</div><div class='ctx'> </div><div class='del'>-	rdev = regulator_register(&amp;regulators[pdev-&gt;id], &amp;pdev-&gt;dev,</div><div class='del'>-				  pdev-&gt;dev.platform_data, wm8400, NULL);</div><div class='add'>+	config.dev = &amp;pdev-&gt;dev;</div><div class='add'>+	config.init_data = pdev-&gt;dev.platform_data;</div><div class='add'>+	config.driver_data = wm8400;</div><div class='add'>+	config.regmap = wm8400-&gt;regmap;</div><div class='ctx'> </div><div class='add'>+	rdev = regulator_register(&amp;regulators[pdev-&gt;id], &amp;config);</div><div class='ctx'> 	if (IS_ERR(rdev))</div><div class='ctx'> 		return PTR_ERR(rdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/regulator/wm8994-regulator.c b/drivers/regulator/wm8994-regulator.c<br/>index 75ed402d9f43..9a994316e63c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/regulator/wm8994-regulator.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/regulator/wm8994-regulator.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/regulator/wm8994-regulator.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/regulator/wm8994-regulator.c</a></div><div class='hunk'>@@ -86,36 +86,6 @@ static int wm8994_ldo1_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	return (selector * 100000) + 2400000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wm8994_ldo1_get_voltage_sel(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct wm8994_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='del'>-	val = wm8994_reg_read(ldo-&gt;wm8994, WM8994_LDO_1);</div><div class='del'>-	if (val &lt; 0)</div><div class='del'>-		return val;</div><div class='del'>-</div><div class='del'>-	return (val &amp; WM8994_LDO1_VSEL_MASK) &gt;&gt; WM8994_LDO1_VSEL_SHIFT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm8994_ldo1_set_voltage(struct regulator_dev *rdev,</div><div class='del'>-				   int min_uV, int max_uV, unsigned *s)</div><div class='del'>-{</div><div class='del'>-	struct wm8994_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='del'>-	int selector, v;</div><div class='del'>-</div><div class='del'>-	selector = (min_uV - 2400000) / 100000;</div><div class='del'>-	v = wm8994_ldo1_list_voltage(rdev, selector);</div><div class='del'>-	if (v &lt; 0 || v &gt; max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	*s = selector;</div><div class='del'>-	selector &lt;&lt;= WM8994_LDO1_VSEL_SHIFT;</div><div class='del'>-</div><div class='del'>-	return wm8994_set_bits(ldo-&gt;wm8994, WM8994_LDO_1,</div><div class='del'>-			       WM8994_LDO1_VSEL_MASK, selector);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct regulator_ops wm8994_ldo1_ops = {</div><div class='ctx'> 	.enable = wm8994_ldo_enable,</div><div class='ctx'> 	.disable = wm8994_ldo_disable,</div><div class='hunk'>@@ -123,8 +93,8 @@ static struct regulator_ops wm8994_ldo1_ops = {</div><div class='ctx'> 	.enable_time = wm8994_ldo_enable_time,</div><div class='ctx'> </div><div class='ctx'> 	.list_voltage = wm8994_ldo1_list_voltage,</div><div class='del'>-	.get_voltage_sel = wm8994_ldo1_get_voltage_sel,</div><div class='del'>-	.set_voltage = wm8994_ldo1_set_voltage,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='add'>+	.set_voltage_sel = regulator_set_voltage_sel_regmap,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int wm8994_ldo2_list_voltage(struct regulator_dev *rdev,</div><div class='hunk'>@@ -153,51 +123,6 @@ static int wm8994_ldo2_list_voltage(struct regulator_dev *rdev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wm8994_ldo2_get_voltage_sel(struct regulator_dev *rdev)</div><div class='del'>-{</div><div class='del'>-	struct wm8994_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='del'>-	val = wm8994_reg_read(ldo-&gt;wm8994, WM8994_LDO_2);</div><div class='del'>-	if (val &lt; 0)</div><div class='del'>-		return val;</div><div class='del'>-</div><div class='del'>-	return (val &amp; WM8994_LDO2_VSEL_MASK) &gt;&gt; WM8994_LDO2_VSEL_SHIFT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int wm8994_ldo2_set_voltage(struct regulator_dev *rdev,</div><div class='del'>-				   int min_uV, int max_uV, unsigned *s)</div><div class='del'>-{</div><div class='del'>-	struct wm8994_ldo *ldo = rdev_get_drvdata(rdev);</div><div class='del'>-	int selector, v;</div><div class='del'>-</div><div class='del'>-	switch (ldo-&gt;wm8994-&gt;type) {</div><div class='del'>-	case WM8994:</div><div class='del'>-		selector = (min_uV - 900000) / 100000;</div><div class='del'>-		break;</div><div class='del'>-	case WM8958:</div><div class='del'>-		selector = (min_uV - 1000000) / 100000;</div><div class='del'>-		break;</div><div class='del'>-	case WM1811:</div><div class='del'>-		selector = (min_uV - 950000) / 100000;</div><div class='del'>-		if (selector == 0)</div><div class='del'>-			selector = 1;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	v = wm8994_ldo2_list_voltage(rdev, selector);</div><div class='del'>-	if (v &lt; 0 || v &gt; max_uV)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	*s = selector;</div><div class='del'>-	selector &lt;&lt;= WM8994_LDO2_VSEL_SHIFT;</div><div class='del'>-</div><div class='del'>-	return wm8994_set_bits(ldo-&gt;wm8994, WM8994_LDO_2,</div><div class='del'>-			       WM8994_LDO2_VSEL_MASK, selector);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct regulator_ops wm8994_ldo2_ops = {</div><div class='ctx'> 	.enable = wm8994_ldo_enable,</div><div class='ctx'> 	.disable = wm8994_ldo_disable,</div><div class='hunk'>@@ -205,16 +130,18 @@ static struct regulator_ops wm8994_ldo2_ops = {</div><div class='ctx'> 	.enable_time = wm8994_ldo_enable_time,</div><div class='ctx'> </div><div class='ctx'> 	.list_voltage = wm8994_ldo2_list_voltage,</div><div class='del'>-	.get_voltage_sel = wm8994_ldo2_get_voltage_sel,</div><div class='del'>-	.set_voltage = wm8994_ldo2_set_voltage,</div><div class='add'>+	.get_voltage_sel = regulator_get_voltage_sel_regmap,</div><div class='add'>+	.set_voltage_sel = regulator_set_voltage_sel_regmap,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct regulator_desc wm8994_ldo_desc[] = {</div><div class='add'>+static const struct regulator_desc wm8994_ldo_desc[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "LDO1",</div><div class='ctx'> 		.id = 1,</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='ctx'> 		.n_voltages = WM8994_LDO1_MAX_SELECTOR + 1,</div><div class='add'>+		.vsel_reg = WM8994_LDO_1,</div><div class='add'>+		.vsel_mask = WM8994_LDO1_VSEL_MASK,</div><div class='ctx'> 		.ops = &amp;wm8994_ldo1_ops,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -223,6 +150,8 @@ static struct regulator_desc wm8994_ldo_desc[] = {</div><div class='ctx'> 		.id = 2,</div><div class='ctx'> 		.type = REGULATOR_VOLTAGE,</div><div class='ctx'> 		.n_voltages = WM8994_LDO2_MAX_SELECTOR + 1,</div><div class='add'>+		.vsel_reg = WM8994_LDO_2,</div><div class='add'>+		.vsel_mask = WM8994_LDO2_VSEL_MASK,</div><div class='ctx'> 		.ops = &amp;wm8994_ldo2_ops,</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -233,14 +162,12 @@ static __devinit int wm8994_ldo_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct wm8994 *wm8994 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct wm8994_pdata *pdata = wm8994-&gt;dev-&gt;platform_data;</div><div class='ctx'> 	int id = pdev-&gt;id % ARRAY_SIZE(pdata-&gt;ldo);</div><div class='add'>+	struct regulator_config config = { };</div><div class='ctx'> 	struct wm8994_ldo *ldo;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "Probing LDO%d\n", id + 1);</div><div class='ctx'> </div><div class='del'>-	if (!pdata)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='ctx'> 	ldo = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct wm8994_ldo), GFP_KERNEL);</div><div class='ctx'> 	if (ldo == NULL) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unable to allocate private data\n");</div><div class='hunk'>@@ -252,24 +179,22 @@ static __devinit int wm8994_ldo_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (pdata-&gt;ldo[id].enable &amp;&amp; gpio_is_valid(pdata-&gt;ldo[id].enable)) {</div><div class='ctx'> 		ldo-&gt;enable = pdata-&gt;ldo[id].enable;</div><div class='ctx'> </div><div class='del'>-		ret = gpio_request(ldo-&gt;enable, "WM8994 LDO enable");</div><div class='add'>+		ret = gpio_request_one(ldo-&gt;enable, 0, "WM8994 LDO enable");</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev, "Failed to get enable GPIO: %d\n",</div><div class='ctx'> 				ret);</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		ret = gpio_direction_output(ldo-&gt;enable, ldo-&gt;is_enabled);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "Failed to set GPIO up: %d\n",</div><div class='del'>-				ret);</div><div class='del'>-			goto err_gpio;</div><div class='del'>-		}</div><div class='ctx'> 	} else</div><div class='ctx'> 		ldo-&gt;is_enabled = true;</div><div class='ctx'> </div><div class='del'>-	ldo-&gt;regulator = regulator_register(&amp;wm8994_ldo_desc[id], &amp;pdev-&gt;dev,</div><div class='del'>-					     pdata-&gt;ldo[id].init_data, ldo, NULL);</div><div class='add'>+	config.dev = wm8994-&gt;dev;</div><div class='add'>+	config.driver_data = ldo;</div><div class='add'>+	config.regmap = wm8994-&gt;regmap;</div><div class='add'>+	if (pdata)</div><div class='add'>+		config.init_data = pdata-&gt;ldo[id].init_data;</div><div class='add'>+</div><div class='add'>+	ldo-&gt;regulator = regulator_register(&amp;wm8994_ldo_desc[id], &amp;config);</div><div class='ctx'> 	if (IS_ERR(ldo-&gt;regulator)) {</div><div class='ctx'> 		ret = PTR_ERR(ldo-&gt;regulator);</div><div class='ctx'> 		dev_err(wm8994-&gt;dev, "Failed to register LDO%d: %d\n",</div><div class='head'>diff --git a/drivers/remoteproc/remoteproc_core.c b/drivers/remoteproc/remoteproc_core.c<br/>index ee15c68fb519..8ea7bccc7100 100644<br/>--- a/<a href='/drm-misc/tree/drivers/remoteproc/remoteproc_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/remoteproc/remoteproc_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/remoteproc/remoteproc_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/remoteproc/remoteproc_core.c</a></div><div class='hunk'>@@ -78,7 +78,7 @@ typedef int (*rproc_handle_resource_t)(struct rproc *rproc, void *, int avail);</div><div class='ctx'>  * the recovery of the remote processor.</div><div class='ctx'>  */</div><div class='ctx'> static int rproc_iommu_fault(struct iommu_domain *domain, struct device *dev,</div><div class='del'>-		unsigned long iova, int flags)</div><div class='add'>+		unsigned long iova, int flags, void *token)</div><div class='ctx'> {</div><div class='ctx'> 	dev_err(dev, "iommu fault: da 0x%lx flags 0x%x\n", iova, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -117,7 +117,7 @@ static int rproc_enable_iommu(struct rproc *rproc)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	iommu_set_fault_handler(domain, rproc_iommu_fault);</div><div class='add'>+	iommu_set_fault_handler(domain, rproc_iommu_fault, rproc);</div><div class='ctx'> </div><div class='ctx'> 	ret = iommu_attach_device(domain, dev);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -354,7 +354,7 @@ static void __rproc_free_vrings(struct rproc_vdev *rvdev, int i)</div><div class='ctx'> {</div><div class='ctx'> 	struct rproc *rproc = rvdev-&gt;rproc;</div><div class='ctx'> </div><div class='del'>-	for (i--; i &gt; 0; i--) {</div><div class='add'>+	for (i--; i &gt;= 0; i--) {</div><div class='ctx'> 		struct rproc_vring *rvring = &amp;rvdev-&gt;vring[i];</div><div class='ctx'> 		int size = PAGE_ALIGN(vring_size(rvring-&gt;len, rvring-&gt;align));</div><div class='ctx'> </div><div class='hunk'>@@ -1105,8 +1105,7 @@ static void rproc_fw_config_virtio(const struct firmware *fw, void *context)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (fw)</div><div class='del'>-		release_firmware(fw);</div><div class='add'>+	release_firmware(fw);</div><div class='ctx'> 	/* allow rproc_unregister() contexts, if any, to proceed */</div><div class='ctx'> 	complete_all(&amp;rproc-&gt;firmware_loading_complete);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig<br/>index 8c8377d50c4c..08cbdb900a18 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/Kconfig</a></div><div class='hunk'>@@ -620,27 +620,6 @@ config RTC_DRV_MSM6242</div><div class='ctx'> 	  This driver can also be built as a module. If so, the module</div><div class='ctx'> 	  will be called rtc-msm6242.</div><div class='ctx'> </div><div class='del'>-config RTC_DRV_IMXDI</div><div class='del'>-	tristate "Freescale IMX DryIce Real Time Clock"</div><div class='del'>-	depends on ARCH_MX25</div><div class='del'>-	depends on RTC_CLASS</div><div class='del'>-	help</div><div class='del'>-	   Support for Freescale IMX DryIce RTC</div><div class='del'>-</div><div class='del'>-	   This driver can also be built as a module, if so, the module</div><div class='del'>-	   will be called "rtc-imxdi".</div><div class='del'>-</div><div class='del'>-config RTC_MXC</div><div class='del'>-	tristate "Freescale MXC Real Time Clock"</div><div class='del'>-	depends on ARCH_MXC</div><div class='del'>-	depends on RTC_CLASS</div><div class='del'>-	help</div><div class='del'>-	   If you say yes here you get support for the Freescale MXC</div><div class='del'>-	   RTC module.</div><div class='del'>-</div><div class='del'>-	   This driver can also be built as a module, if so, the module</div><div class='del'>-	   will be called "rtc-mxc".</div><div class='del'>-</div><div class='ctx'> config RTC_DRV_BQ4802</div><div class='ctx'> 	tristate "TI BQ4802"</div><div class='ctx'> 	help</div><div class='hunk'>@@ -738,6 +717,16 @@ config RTC_DRV_DAVINCI</div><div class='ctx'> 	  This driver can also be built as a module. If so, the module</div><div class='ctx'> 	  will be called rtc-davinci.</div><div class='ctx'> </div><div class='add'>+config RTC_DRV_IMXDI</div><div class='add'>+	tristate "Freescale IMX DryIce Real Time Clock"</div><div class='add'>+	depends on SOC_IMX25</div><div class='add'>+	depends on RTC_CLASS</div><div class='add'>+	help</div><div class='add'>+	   Support for Freescale IMX DryIce RTC</div><div class='add'>+</div><div class='add'>+	   This driver can also be built as a module, if so, the module</div><div class='add'>+	   will be called "rtc-imxdi".</div><div class='add'>+</div><div class='ctx'> config RTC_DRV_OMAP</div><div class='ctx'> 	tristate "TI OMAP1"</div><div class='ctx'> 	depends on ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_DAVINCI_DA8XX</div><div class='hunk'>@@ -838,7 +827,7 @@ config RTC_DRV_AT32AP700X</div><div class='ctx'> </div><div class='ctx'> config RTC_DRV_AT91RM9200</div><div class='ctx'> 	tristate "AT91RM9200 or some AT91SAM9 RTC"</div><div class='del'>-	depends on ARCH_AT91RM9200 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45</div><div class='add'>+	depends on ARCH_AT91</div><div class='ctx'> 	help</div><div class='ctx'> 	  Driver for the internal RTC (Realtime Clock) module found on</div><div class='ctx'> 	  Atmel AT91RM9200's and some  AT91SAM9 chips. On AT91SAM9 chips</div><div class='hunk'>@@ -1087,4 +1076,15 @@ config RTC_DRV_LOONGSON1</div><div class='ctx'> 	  This driver can also be built as a module. If so, the module</div><div class='ctx'> 	  will be called rtc-ls1x.</div><div class='ctx'> </div><div class='add'>+config RTC_DRV_MXC</div><div class='add'>+	tristate "Freescale MXC Real Time Clock"</div><div class='add'>+	depends on ARCH_MXC</div><div class='add'>+	depends on RTC_CLASS</div><div class='add'>+	help</div><div class='add'>+	   If you say yes here you get support for the Freescale MXC</div><div class='add'>+	   RTC module.</div><div class='add'>+</div><div class='add'>+	   This driver can also be built as a module, if so, the module</div><div class='add'>+	   will be called "rtc-mxc".</div><div class='add'>+</div><div class='ctx'> endif # RTC_CLASS</div><div class='head'>diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile<br/>index 727ae7786e6c..2973921c30d8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/Makefile</a></div><div class='hunk'>@@ -61,7 +61,7 @@ obj-$(CONFIG_RTC_DRV_M41T94)	+= rtc-m41t94.o</div><div class='ctx'> obj-$(CONFIG_RTC_DRV_M48T35)	+= rtc-m48t35.o</div><div class='ctx'> obj-$(CONFIG_RTC_DRV_M48T59)	+= rtc-m48t59.o</div><div class='ctx'> obj-$(CONFIG_RTC_DRV_M48T86)	+= rtc-m48t86.o</div><div class='del'>-obj-$(CONFIG_RTC_MXC)		+= rtc-mxc.o</div><div class='add'>+obj-$(CONFIG_RTC_DRV_MXC)	+= rtc-mxc.o</div><div class='ctx'> obj-$(CONFIG_RTC_DRV_MAX6900)	+= rtc-max6900.o</div><div class='ctx'> obj-$(CONFIG_RTC_DRV_MAX8925)	+= rtc-max8925.o</div><div class='ctx'> obj-$(CONFIG_RTC_DRV_MAX8998)	+= rtc-max8998.o</div><div class='head'>diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c<br/>index 7d5f56edb8ef..4267789ca995 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-cmos.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-cmos.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-cmos.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-cmos.c</a></div><div class='hunk'>@@ -910,14 +910,17 @@ static inline int cmos_poweroff(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> static u32 rtc_handler(void *context)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = context;</div><div class='add'>+</div><div class='add'>+	pm_wakeup_event(dev, 0);</div><div class='ctx'> 	acpi_clear_event(ACPI_EVENT_RTC);</div><div class='ctx'> 	acpi_disable_event(ACPI_EVENT_RTC, 0);</div><div class='ctx'> 	return ACPI_INTERRUPT_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void rtc_wake_setup(void)</div><div class='add'>+static inline void rtc_wake_setup(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, NULL);</div><div class='add'>+	acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * After the RTC handler is installed, the Fixed_RTC event should</div><div class='ctx'> 	 * be disabled. Only when the RTC alarm is set will it be enabled.</div><div class='hunk'>@@ -950,7 +953,7 @@ cmos_wake_setup(struct device *dev)</div><div class='ctx'> 	if (acpi_disabled)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rtc_wake_setup();</div><div class='add'>+	rtc_wake_setup(dev);</div><div class='ctx'> 	acpi_rtc_info.wake_on = rtc_wake_on;</div><div class='ctx'> 	acpi_rtc_info.wake_off = rtc_wake_off;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c<br/>index c293d0cdb104..836710ce750e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-ds1307.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-ds1307.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-ds1307.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-ds1307.c</a></div><div class='hunk'>@@ -17,8 +17,7 @@</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/rtc.h&gt;</div><div class='ctx'> #include &lt;linux/bcd.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='add'>+#include &lt;linux/rtc/ds1307.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * We can't determine type by probing, but if we expect pre-Linux code</div><div class='hunk'>@@ -92,7 +91,8 @@ enum ds_type {</div><div class='ctx'> #	define DS1337_BIT_A2I		0x02</div><div class='ctx'> #	define DS1337_BIT_A1I		0x01</div><div class='ctx'> #define DS1339_REG_ALARM1_SECS	0x07</div><div class='del'>-#define DS1339_REG_TRICKLE	0x10</div><div class='add'>+</div><div class='add'>+#define DS13XX_TRICKLE_CHARGER_MAGIC	0xa0</div><div class='ctx'> </div><div class='ctx'> #define RX8025_REG_CTRL1	0x0e</div><div class='ctx'> #	define RX8025_BIT_2412		0x20</div><div class='hunk'>@@ -124,6 +124,7 @@ struct chip_desc {</div><div class='ctx'> 	unsigned		alarm:1;</div><div class='ctx'> 	u16			nvram_offset;</div><div class='ctx'> 	u16			nvram_size;</div><div class='add'>+	u16			trickle_charger_reg;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct chip_desc chips[last_ds_type] = {</div><div class='hunk'>@@ -140,6 +141,13 @@ static const struct chip_desc chips[last_ds_type] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	[ds_1339] = {</div><div class='ctx'> 		.alarm		= 1,</div><div class='add'>+		.trickle_charger_reg = 0x10,</div><div class='add'>+	},</div><div class='add'>+	[ds_1340] = {</div><div class='add'>+		.trickle_charger_reg = 0x08,</div><div class='add'>+	},</div><div class='add'>+	[ds_1388] = {</div><div class='add'>+		.trickle_charger_reg = 0x0a,</div><div class='ctx'> 	},</div><div class='ctx'> 	[ds_3231] = {</div><div class='ctx'> 		.alarm		= 1,</div><div class='hunk'>@@ -619,6 +627,7 @@ static int __devinit ds1307_probe(struct i2c_client *client,</div><div class='ctx'> 	struct i2c_adapter	*adapter = to_i2c_adapter(client-&gt;dev.parent);</div><div class='ctx'> 	int			want_irq = false;</div><div class='ctx'> 	unsigned char		*buf;</div><div class='add'>+	struct ds1307_platform_data *pdata = client-&gt;dev.platform_data;</div><div class='ctx'> 	static const int	bbsqi_bitpos[] = {</div><div class='ctx'> 		[ds_1337] = 0,</div><div class='ctx'> 		[ds_1339] = DS1339_BIT_BBSQI,</div><div class='hunk'>@@ -637,7 +646,10 @@ static int __devinit ds1307_probe(struct i2c_client *client,</div><div class='ctx'> </div><div class='ctx'> 	ds1307-&gt;client	= client;</div><div class='ctx'> 	ds1307-&gt;type	= id-&gt;driver_data;</div><div class='del'>-	ds1307-&gt;offset	= 0;</div><div class='add'>+</div><div class='add'>+	if (pdata &amp;&amp; pdata-&gt;trickle_charger_setup &amp;&amp; chip-&gt;trickle_charger_reg)</div><div class='add'>+		i2c_smbus_write_byte_data(client, chip-&gt;trickle_charger_reg,</div><div class='add'>+			DS13XX_TRICKLE_CHARGER_MAGIC | pdata-&gt;trickle_charger_setup);</div><div class='ctx'> </div><div class='ctx'> 	buf = ds1307-&gt;regs;</div><div class='ctx'> 	if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {</div><div class='head'>diff --git a/drivers/rtc/rtc-ep93xx.c b/drivers/rtc/rtc-ep93xx.c<br/>index 14a42a1edc66..9602278ff988 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-ep93xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-ep93xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-ep93xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-ep93xx.c</a></div><div class='hunk'>@@ -127,7 +127,7 @@ static const struct attribute_group ep93xx_rtc_sysfs_files = {</div><div class='ctx'> 	.attrs	= ep93xx_rtc_attrs,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init ep93xx_rtc_probe(struct platform_device *pdev)</div><div class='add'>+static int __devinit ep93xx_rtc_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ep93xx_rtc *ep93xx_rtc;</div><div class='ctx'> 	struct resource *res;</div><div class='hunk'>@@ -174,7 +174,7 @@ exit:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __exit ep93xx_rtc_remove(struct platform_device *pdev)</div><div class='add'>+static int __devexit ep93xx_rtc_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ep93xx_rtc *ep93xx_rtc = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -186,31 +186,19 @@ static int __exit ep93xx_rtc_remove(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* work with hotplug and coldplug */</div><div class='del'>-MODULE_ALIAS("platform:ep93xx-rtc");</div><div class='del'>-</div><div class='ctx'> static struct platform_driver ep93xx_rtc_driver = {</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "ep93xx-rtc",</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 	},</div><div class='del'>-	.remove		= __exit_p(ep93xx_rtc_remove),</div><div class='add'>+	.probe		= ep93xx_rtc_probe,</div><div class='add'>+	.remove		= __devexit_p(ep93xx_rtc_remove),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init ep93xx_rtc_init(void)</div><div class='del'>-{</div><div class='del'>-        return platform_driver_probe(&amp;ep93xx_rtc_driver, ep93xx_rtc_probe);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ep93xx_rtc_exit(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;ep93xx_rtc_driver);</div><div class='del'>-}</div><div class='add'>+module_platform_driver(ep93xx_rtc_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Alessandro Zummo &lt;a.zummo@towertech.it&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("EP93XX RTC driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_VERSION(DRV_VERSION);</div><div class='del'>-</div><div class='del'>-module_init(ep93xx_rtc_init);</div><div class='del'>-module_exit(ep93xx_rtc_exit);</div><div class='add'>+MODULE_ALIAS("platform:ep93xx-rtc");</div><div class='head'>diff --git a/drivers/rtc/rtc-imxdi.c b/drivers/rtc/rtc-imxdi.c<br/>index d93a9608b1f0..891cd6c61d0a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-imxdi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-imxdi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-imxdi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-imxdi.c</a></div><div class='hunk'>@@ -405,7 +405,7 @@ static int dryice_rtc_probe(struct platform_device *pdev)</div><div class='ctx'> 	imxdi-&gt;clk = clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='ctx'> 	if (IS_ERR(imxdi-&gt;clk))</div><div class='ctx'> 		return PTR_ERR(imxdi-&gt;clk);</div><div class='del'>-	clk_enable(imxdi-&gt;clk);</div><div class='add'>+	clk_prepare_enable(imxdi-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize dryice hardware</div><div class='hunk'>@@ -470,7 +470,7 @@ static int dryice_rtc_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	clk_disable(imxdi-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(imxdi-&gt;clk);</div><div class='ctx'> 	clk_put(imxdi-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='hunk'>@@ -487,7 +487,7 @@ static int __devexit dryice_rtc_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	rtc_device_unregister(imxdi-&gt;rtc);</div><div class='ctx'> </div><div class='del'>-	clk_disable(imxdi-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(imxdi-&gt;clk);</div><div class='ctx'> 	clk_put(imxdi-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/rtc/rtc-lpc32xx.c b/drivers/rtc/rtc-lpc32xx.c<br/>index 63c72189c64b..d5218553741f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-lpc32xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-lpc32xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-lpc32xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-lpc32xx.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/rtc.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Clock and Power control register offsets</div><div class='hunk'>@@ -386,13 +387,22 @@ static const struct dev_pm_ops lpc32xx_rtc_pm_ops = {</div><div class='ctx'> #define LPC32XX_RTC_PM_OPS NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static const struct of_device_id lpc32xx_rtc_match[] = {</div><div class='add'>+	{ .compatible = "nxp,lpc3220-rtc" },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, lpc32xx_rtc_match);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct platform_driver lpc32xx_rtc_driver = {</div><div class='ctx'> 	.probe		= lpc32xx_rtc_probe,</div><div class='ctx'> 	.remove		= __devexit_p(lpc32xx_rtc_remove),</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	= RTC_NAME,</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='del'>-		.pm	= LPC32XX_RTC_PM_OPS</div><div class='add'>+		.pm	= LPC32XX_RTC_PM_OPS,</div><div class='add'>+		.of_match_table = of_match_ptr(lpc32xx_rtc_match),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/rtc/rtc-m41t93.c b/drivers/rtc/rtc-m41t93.c<br/>index 10f1c29436ec..efab3d48cb15 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-m41t93.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-m41t93.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-m41t93.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-m41t93.c</a></div><div class='hunk'>@@ -48,6 +48,7 @@ static inline int m41t93_set_reg(struct spi_device *spi, u8 addr, u8 data)</div><div class='ctx'> static int m41t93_set_time(struct device *dev, struct rtc_time *tm)</div><div class='ctx'> {</div><div class='ctx'> 	struct spi_device *spi = to_spi_device(dev);</div><div class='add'>+	int tmp;</div><div class='ctx'> 	u8 buf[9] = {0x80};        /* write cmd + 8 data bytes */</div><div class='ctx'> 	u8 * const data = &amp;buf[1]; /* ptr to first data byte */</div><div class='ctx'> </div><div class='hunk'>@@ -62,6 +63,30 @@ static int m41t93_set_time(struct device *dev, struct rtc_time *tm)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	tmp = spi_w8r8(spi, M41T93_REG_FLAGS);</div><div class='add'>+	if (tmp &lt; 0)</div><div class='add'>+		return tmp;</div><div class='add'>+</div><div class='add'>+	if (tmp &amp; M41T93_FLAG_OF) {</div><div class='add'>+		dev_warn(&amp;spi-&gt;dev, "OF bit is set, resetting.\n");</div><div class='add'>+		m41t93_set_reg(spi, M41T93_REG_FLAGS, tmp &amp; ~M41T93_FLAG_OF);</div><div class='add'>+</div><div class='add'>+		tmp = spi_w8r8(spi, M41T93_REG_FLAGS);</div><div class='add'>+		if (tmp &lt; 0) {</div><div class='add'>+			return tmp;</div><div class='add'>+		} else if (tmp &amp; M41T93_FLAG_OF) {</div><div class='add'>+			/* OF cannot be immediately reset: oscillator has to be</div><div class='add'>+			 * restarted. */</div><div class='add'>+			u8 reset_osc = buf[M41T93_REG_ST_SEC] | M41T93_FLAG_ST;</div><div class='add'>+</div><div class='add'>+			dev_warn(&amp;spi-&gt;dev,</div><div class='add'>+				 "OF bit is still set, kickstarting clock.\n");</div><div class='add'>+			m41t93_set_reg(spi, M41T93_REG_ST_SEC, reset_osc);</div><div class='add'>+			reset_osc &amp;= ~M41T93_FLAG_ST;</div><div class='add'>+			m41t93_set_reg(spi, M41T93_REG_ST_SEC, reset_osc);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	data[M41T93_REG_SSEC]		= 0;</div><div class='ctx'> 	data[M41T93_REG_ST_SEC]		= bin2bcd(tm-&gt;tm_sec);</div><div class='ctx'> 	data[M41T93_REG_MIN]		= bin2bcd(tm-&gt;tm_min);</div><div class='hunk'>@@ -89,10 +114,7 @@ static int m41t93_get_time(struct device *dev, struct rtc_time *tm)</div><div class='ctx'> 	   1. halt bit (HT) is set: the clock is running but update of readout</div><div class='ctx'> 	      registers has been disabled due to power failure. This is normal</div><div class='ctx'> 	      case after poweron. Time is valid after resetting HT bit.</div><div class='del'>-	   2. oscillator fail bit (OF) is set. Oscillator has be stopped and</div><div class='del'>-	      time is invalid:</div><div class='del'>-	      a) OF can be immeditely reset.</div><div class='del'>-	      b) OF cannot be immediately reset: oscillator has to be restarted.</div><div class='add'>+	   2. oscillator fail bit (OF) is set: time is invalid.</div><div class='ctx'> 	*/</div><div class='ctx'> 	tmp = spi_w8r8(spi, M41T93_REG_ALM_HOUR_HT);</div><div class='ctx'> 	if (tmp &lt; 0)</div><div class='hunk'>@@ -110,21 +132,7 @@ static int m41t93_get_time(struct device *dev, struct rtc_time *tm)</div><div class='ctx'> </div><div class='ctx'> 	if (tmp &amp; M41T93_FLAG_OF) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='del'>-		dev_warn(&amp;spi-&gt;dev, "OF bit is set, resetting.\n");</div><div class='del'>-		m41t93_set_reg(spi, M41T93_REG_FLAGS, tmp &amp; ~M41T93_FLAG_OF);</div><div class='del'>-</div><div class='del'>-		tmp = spi_w8r8(spi, M41T93_REG_FLAGS);</div><div class='del'>-		if (tmp &lt; 0)</div><div class='del'>-			return tmp;</div><div class='del'>-		else if (tmp &amp; M41T93_FLAG_OF) {</div><div class='del'>-			u8 reset_osc = buf[M41T93_REG_ST_SEC] | M41T93_FLAG_ST;</div><div class='del'>-</div><div class='del'>-			dev_warn(&amp;spi-&gt;dev,</div><div class='del'>-				 "OF bit is still set, kickstarting clock.\n");</div><div class='del'>-			m41t93_set_reg(spi, M41T93_REG_ST_SEC, reset_osc);</div><div class='del'>-			reset_osc &amp;= ~M41T93_FLAG_ST;</div><div class='del'>-			m41t93_set_reg(spi, M41T93_REG_ST_SEC, reset_osc);</div><div class='del'>-		}</div><div class='add'>+		dev_warn(&amp;spi-&gt;dev, "OF bit is set, write time to restart.\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (tmp &amp; M41T93_FLAG_BL)</div><div class='head'>diff --git a/drivers/rtc/rtc-mpc5121.c b/drivers/rtc/rtc-mpc5121.c<br/>index 42f5f829b3ee..029e421baaed 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-mpc5121.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-mpc5121.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-mpc5121.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-mpc5121.c</a></div><div class='hunk'>@@ -360,12 +360,11 @@ static int __devinit mpc5121_rtc_probe(struct platform_device *op)</div><div class='ctx'> 						&amp;mpc5200_rtc_ops, THIS_MODULE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rtc-&gt;rtc-&gt;uie_unsupported = 1;</div><div class='del'>-</div><div class='ctx'> 	if (IS_ERR(rtc-&gt;rtc)) {</div><div class='ctx'> 		err = PTR_ERR(rtc-&gt;rtc);</div><div class='ctx'> 		goto out_free_irq;</div><div class='ctx'> 	}</div><div class='add'>+	rtc-&gt;rtc-&gt;uie_unsupported = 1;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/rtc/rtc-pcf8563.c b/drivers/rtc/rtc-pcf8563.c<br/>index bc0677de1996..97a3284bb7c6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-pcf8563.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-pcf8563.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-pcf8563.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-pcf8563.c</a></div><div class='hunk'>@@ -64,6 +64,7 @@ struct pcf8563 {</div><div class='ctx'> 	 * 1970...2069.</div><div class='ctx'> 	 */</div><div class='ctx'> 	int c_polarity;	/* 0: MO_C=1 means 19xx, otherwise MO_C=1 means 20xx */</div><div class='add'>+	int voltage_low; /* incicates if a low_voltage was detected */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -86,9 +87,11 @@ static int pcf8563_get_datetime(struct i2c_client *client, struct rtc_time *tm)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (buf[PCF8563_REG_SC] &amp; PCF8563_SC_LV)</div><div class='add'>+	if (buf[PCF8563_REG_SC] &amp; PCF8563_SC_LV) {</div><div class='add'>+		pcf8563-&gt;voltage_low = 1;</div><div class='ctx'> 		dev_info(&amp;client-&gt;dev,</div><div class='ctx'> 			"low voltage detected, date/time is not reliable.\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;client-&gt;dev,</div><div class='ctx'> 		"%s: raw data is st1=%02x, st2=%02x, sec=%02x, min=%02x, hr=%02x, "</div><div class='hunk'>@@ -173,6 +176,44 @@ static int pcf8563_set_datetime(struct i2c_client *client, struct rtc_time *tm)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_RTC_INTF_DEV</div><div class='add'>+static int pcf8563_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	struct pcf8563 *pcf8563 = i2c_get_clientdata(to_i2c_client(dev));</div><div class='add'>+	struct rtc_time tm;</div><div class='add'>+</div><div class='add'>+	switch (cmd) {</div><div class='add'>+	case RTC_VL_READ:</div><div class='add'>+		if (pcf8563-&gt;voltage_low)</div><div class='add'>+			dev_info(dev, "low voltage detected, date/time is not reliable.\n");</div><div class='add'>+</div><div class='add'>+		if (copy_to_user((void __user *)arg, &amp;pcf8563-&gt;voltage_low,</div><div class='add'>+					sizeof(int)))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		return 0;</div><div class='add'>+	case RTC_VL_CLR:</div><div class='add'>+		/*</div><div class='add'>+		 * Clear the VL bit in the seconds register in case</div><div class='add'>+		 * the time has not been set already (which would</div><div class='add'>+		 * have cleared it). This does not really matter</div><div class='add'>+		 * because of the cached voltage_low value but do it</div><div class='add'>+		 * anyway for consistency.</div><div class='add'>+		 */</div><div class='add'>+		if (pcf8563_get_datetime(to_i2c_client(dev), &amp;tm))</div><div class='add'>+			pcf8563_set_datetime(to_i2c_client(dev), &amp;tm);</div><div class='add'>+</div><div class='add'>+		/* Clear the cached value. */</div><div class='add'>+		pcf8563-&gt;voltage_low = 0;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return -ENOIOCTLCMD;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+#define pcf8563_rtc_ioctl NULL</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int pcf8563_rtc_read_time(struct device *dev, struct rtc_time *tm)</div><div class='ctx'> {</div><div class='ctx'> 	return pcf8563_get_datetime(to_i2c_client(dev), tm);</div><div class='hunk'>@@ -184,6 +225,7 @@ static int pcf8563_rtc_set_time(struct device *dev, struct rtc_time *tm)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rtc_class_ops pcf8563_rtc_ops = {</div><div class='add'>+	.ioctl		= pcf8563_rtc_ioctl,</div><div class='ctx'> 	.read_time	= pcf8563_rtc_read_time,</div><div class='ctx'> 	.set_time	= pcf8563_rtc_set_time,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c<br/>index 684ef4bbfce4..cc0533994f6e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-pl031.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-pl031.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-pl031.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-pl031.c</a></div><div class='hunk'>@@ -220,17 +220,9 @@ static irqreturn_t pl031_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	unsigned long events = 0;</div><div class='ctx'> </div><div class='ctx'> 	rtcmis = readl(ldata-&gt;base + RTC_MIS);</div><div class='del'>-	if (rtcmis) {</div><div class='del'>-		writel(rtcmis, ldata-&gt;base + RTC_ICR);</div><div class='del'>-</div><div class='del'>-		if (rtcmis &amp; RTC_BIT_AI)</div><div class='del'>-			events |= (RTC_AF | RTC_IRQF);</div><div class='del'>-</div><div class='del'>-		/* Timer interrupt is only available in ST variants */</div><div class='del'>-		if ((rtcmis &amp; RTC_BIT_PI) &amp;&amp;</div><div class='del'>-			(ldata-&gt;hw_designer == AMBA_VENDOR_ST))</div><div class='del'>-			events |= (RTC_PF | RTC_IRQF);</div><div class='del'>-</div><div class='add'>+	if (rtcmis &amp; RTC_BIT_AI) {</div><div class='add'>+		writel(RTC_BIT_AI, ldata-&gt;base + RTC_ICR);</div><div class='add'>+		events |= (RTC_AF | RTC_IRQF);</div><div class='ctx'> 		rtc_update_irq(ldata-&gt;rtc, 1, events);</div><div class='ctx'> </div><div class='ctx'> 		return IRQ_HANDLED;</div><div class='hunk'>@@ -312,6 +304,7 @@ static int pl031_probe(struct amba_device *adev, const struct amba_id *id)</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct pl031_local *ldata;</div><div class='ctx'> 	struct rtc_class_ops *ops = id-&gt;data;</div><div class='add'>+	unsigned long time;</div><div class='ctx'> </div><div class='ctx'> 	ret = amba_request_regions(adev, NULL);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -343,6 +336,23 @@ static int pl031_probe(struct amba_device *adev, const struct amba_id *id)</div><div class='ctx'> 		writel(readl(ldata-&gt;base + RTC_CR) | RTC_CR_CWEN,</div><div class='ctx'> 		       ldata-&gt;base + RTC_CR);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * On ST PL031 variants, the RTC reset value does not provide correct</div><div class='add'>+	 * weekday for 2000-01-01. Correct the erroneous sunday to saturday.</div><div class='add'>+	 */</div><div class='add'>+	if (ldata-&gt;hw_designer == AMBA_VENDOR_ST) {</div><div class='add'>+		if (readl(ldata-&gt;base + RTC_YDR) == 0x2000) {</div><div class='add'>+			time = readl(ldata-&gt;base + RTC_DR);</div><div class='add'>+			if ((time &amp;</div><div class='add'>+			     (RTC_MON_MASK | RTC_MDAY_MASK | RTC_WDAY_MASK))</div><div class='add'>+			    == 0x02120000) {</div><div class='add'>+				time = time | (0x7 &lt;&lt; RTC_WDAY_SHIFT);</div><div class='add'>+				writel(0x2000, ldata-&gt;base + RTC_YLR);</div><div class='add'>+				writel(time, ldata-&gt;base + RTC_LR);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ldata-&gt;rtc = rtc_device_register("pl031", &amp;adev-&gt;dev, ops,</div><div class='ctx'> 					THIS_MODULE);</div><div class='ctx'> 	if (IS_ERR(ldata-&gt;rtc)) {</div><div class='head'>diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c<br/>index 3f3a29752369..7e6af0b22f17 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-s3c.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-s3c.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-s3c.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-s3c.c</a></div><div class='hunk'>@@ -670,6 +670,7 @@ static int s3c_rtc_resume(struct platform_device *pdev)</div><div class='ctx'> #define s3c_rtc_resume  NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='ctx'> static struct s3c_rtc_drv_data s3c_rtc_drv_data_array[] = {</div><div class='ctx'> 	[TYPE_S3C2410] = { TYPE_S3C2410 },</div><div class='ctx'> 	[TYPE_S3C2416] = { TYPE_S3C2416 },</div><div class='hunk'>@@ -677,7 +678,6 @@ static struct s3c_rtc_drv_data s3c_rtc_drv_data_array[] = {</div><div class='ctx'> 	[TYPE_S3C64XX] = { TYPE_S3C64XX },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_OF</div><div class='ctx'> static const struct of_device_id s3c_rtc_dt_match[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.compatible = "samsung,s3c2410-rtc",</div><div class='head'>diff --git a/drivers/rtc/rtc-spear.c b/drivers/rtc/rtc-spear.c<br/>index e38da0dc4187..1f76320e545b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-spear.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-spear.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-spear.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-spear.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/rtc.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -519,6 +520,14 @@ static void spear_rtc_shutdown(struct platform_device *pdev)</div><div class='ctx'> 	clk_disable(config-&gt;clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static const struct of_device_id spear_rtc_id_table[] = {</div><div class='add'>+	{ .compatible = "st,spear600-rtc" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, spear_rtc_id_table);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static struct platform_driver spear_rtc_driver = {</div><div class='ctx'> 	.probe = spear_rtc_probe,</div><div class='ctx'> 	.remove = __devexit_p(spear_rtc_remove),</div><div class='hunk'>@@ -527,6 +536,7 @@ static struct platform_driver spear_rtc_driver = {</div><div class='ctx'> 	.shutdown = spear_rtc_shutdown,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = "rtc-spear",</div><div class='add'>+		.of_match_table = of_match_ptr(spear_rtc_id_table),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/rtc/rtc-tegra.c b/drivers/rtc/rtc-tegra.c<br/>index 75259fe38602..c006025cecc8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-tegra.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-tegra.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-tegra.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-tegra.c</a></div><div class='hunk'>@@ -309,7 +309,8 @@ static int __devinit tegra_rtc_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	info = kzalloc(sizeof(struct tegra_rtc_info), GFP_KERNEL);</div><div class='add'>+	info = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct tegra_rtc_info),</div><div class='add'>+		GFP_KERNEL);</div><div class='ctx'> 	if (!info)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -317,29 +318,18 @@ static int __devinit tegra_rtc_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!res) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='ctx'> 			"Unable to allocate resources for device.\n");</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto err_free_info;</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!request_mem_region(res-&gt;start, resource_size(res), pdev-&gt;name)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-			"Unable to request mem region for device.\n");</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto err_free_info;</div><div class='add'>+	info-&gt;rtc_base = devm_request_and_ioremap(&amp;pdev-&gt;dev, res);</div><div class='add'>+	if (!info-&gt;rtc_base) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Unable to request mem region and grab IOs for device.\n");</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;tegra_rtc_irq = platform_get_irq(pdev, 0);</div><div class='del'>-	if (info-&gt;tegra_rtc_irq &lt;= 0) {</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto err_release_mem_region;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	info-&gt;rtc_base = ioremap_nocache(res-&gt;start, resource_size(res));</div><div class='del'>-	if (!info-&gt;rtc_base) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Unable to grab IOs for device.\n");</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto err_release_mem_region;</div><div class='del'>-	}</div><div class='add'>+	if (info-&gt;tegra_rtc_irq &lt;= 0)</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	/* set context info. */</div><div class='ctx'> 	info-&gt;pdev = pdev;</div><div class='hunk'>@@ -362,11 +352,12 @@ static int __devinit tegra_rtc_probe(struct platform_device *pdev)</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='ctx'> 			"Unable to register device (err=%d).\n",</div><div class='ctx'> 			ret);</div><div class='del'>-		goto err_iounmap;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(info-&gt;tegra_rtc_irq, tegra_rtc_irq_handler,</div><div class='del'>-		IRQF_TRIGGER_HIGH, "rtc alarm", &amp;pdev-&gt;dev);</div><div class='add'>+	ret = devm_request_irq(&amp;pdev-&gt;dev, info-&gt;tegra_rtc_irq,</div><div class='add'>+			tegra_rtc_irq_handler, IRQF_TRIGGER_HIGH,</div><div class='add'>+			"rtc alarm", &amp;pdev-&gt;dev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='ctx'> 			"Unable to request interrupt for device (err=%d).\n",</div><div class='hunk'>@@ -380,12 +371,6 @@ static int __devinit tegra_rtc_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> err_dev_unreg:</div><div class='ctx'> 	rtc_device_unregister(info-&gt;rtc_dev);</div><div class='del'>-err_iounmap:</div><div class='del'>-	iounmap(info-&gt;rtc_base);</div><div class='del'>-err_release_mem_region:</div><div class='del'>-	release_mem_region(res-&gt;start, resource_size(res));</div><div class='del'>-err_free_info:</div><div class='del'>-	kfree(info);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -393,17 +378,8 @@ err_free_info:</div><div class='ctx'> static int __devexit tegra_rtc_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tegra_rtc_info *info = platform_get_drvdata(pdev);</div><div class='del'>-	struct resource *res;</div><div class='del'>-</div><div class='del'>-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	if (!res)</div><div class='del'>-		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	free_irq(info-&gt;tegra_rtc_irq, &amp;pdev-&gt;dev);</div><div class='ctx'> 	rtc_device_unregister(info-&gt;rtc_dev);</div><div class='del'>-	iounmap(info-&gt;rtc_base);</div><div class='del'>-	release_mem_region(res-&gt;start, resource_size(res));</div><div class='del'>-	kfree(info);</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/rtc/rtc-wm831x.c b/drivers/rtc/rtc-wm831x.c<br/>index 3b6e6a67e765..59c6245e0421 100644<br/>--- a/<a href='/drm-misc/tree/drivers/rtc/rtc-wm831x.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/rtc/rtc-wm831x.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/rtc/rtc-wm831x.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/rtc/rtc-wm831x.c</a></div><div class='hunk'>@@ -396,7 +396,7 @@ static int wm831x_rtc_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wm831x *wm831x = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='ctx'> 	struct wm831x_rtc *wm831x_rtc;</div><div class='del'>-	int alm_irq = platform_get_irq_byname(pdev, "ALM");</div><div class='add'>+	int alm_irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "ALM"));</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	wm831x_rtc = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*wm831x_rtc), GFP_KERNEL);</div><div class='head'>diff --git a/drivers/s390/block/dasd_int.h b/drivers/s390/block/dasd_int.h<br/>index 33a6743ddc55..c05da00583f0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/block/dasd_int.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/block/dasd_int.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/block/dasd_int.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/block/dasd_int.h</a></div><div class='hunk'>@@ -10,8 +10,6 @@</div><div class='ctx'> #ifndef DASD_INT_H</div><div class='ctx'> #define DASD_INT_H</div><div class='ctx'> </div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='ctx'> /* we keep old device allocation scheme; IOW, minors are still in 0..255 */</div><div class='ctx'> #define DASD_PER_MAJOR (1U &lt;&lt; (MINORBITS - DASD_PARTN_BITS))</div><div class='ctx'> #define DASD_PARTN_MASK ((1 &lt;&lt; DASD_PARTN_BITS) - 1)</div><div class='hunk'>@@ -791,6 +789,4 @@ static inline int dasd_eer_enabled(struct dasd_device *device)</div><div class='ctx'> #define dasd_eer_enabled(d)	(0)</div><div class='ctx'> #endif	/* CONFIG_DASD_ERR */</div><div class='ctx'> </div><div class='del'>-#endif				/* __KERNEL__ */</div><div class='del'>-</div><div class='ctx'> #endif				/* DASD_H */</div><div class='head'>diff --git a/drivers/s390/char/con3215.c b/drivers/s390/char/con3215.c<br/>index 4f9f1dcc1551..6c0116d48c74 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/con3215.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/con3215.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/con3215.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/con3215.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/reboot.h&gt;</div><div class='add'>+#include &lt;linux/serial.h&gt; /* ASYNC_* flags */</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;asm/ccwdev.h&gt;</div><div class='ctx'> #include &lt;asm/cio.h&gt;</div><div class='hunk'>@@ -44,14 +45,11 @@</div><div class='ctx'> #define RAW3215_TIMEOUT	    HZ/10     /* time for delayed output */</div><div class='ctx'> </div><div class='ctx'> #define RAW3215_FIXED	    1	      /* 3215 console device is not be freed */</div><div class='del'>-#define RAW3215_ACTIVE	    2	      /* set if the device is in use */</div><div class='ctx'> #define RAW3215_WORKING	    4	      /* set if a request is being worked on */</div><div class='ctx'> #define RAW3215_THROTTLED   8	      /* set if reading is disabled */</div><div class='ctx'> #define RAW3215_STOPPED	    16	      /* set if writing is disabled */</div><div class='del'>-#define RAW3215_CLOSING	    32	      /* set while in close process */</div><div class='ctx'> #define RAW3215_TIMER_RUNS  64	      /* set if the output delay timer is on */</div><div class='ctx'> #define RAW3215_FLUSHING    128	      /* set to flush buffer (no delay) */</div><div class='del'>-#define RAW3215_FROZEN	    256	      /* set if 3215 is frozen for suspend */</div><div class='ctx'> </div><div class='ctx'> #define TAB_STOP_SIZE	    8	      /* tab stop size */</div><div class='ctx'> </div><div class='hunk'>@@ -76,6 +74,7 @@ struct raw3215_req {</div><div class='ctx'> } __attribute__ ((aligned(8)));</div><div class='ctx'> </div><div class='ctx'> struct raw3215_info {</div><div class='add'>+	struct tty_port port;</div><div class='ctx'> 	struct ccw_device *cdev;      /* device for tty driver */</div><div class='ctx'> 	spinlock_t *lock;	      /* pointer to irq lock */</div><div class='ctx'> 	int flags;		      /* state flags */</div><div class='hunk'>@@ -84,7 +83,6 @@ struct raw3215_info {</div><div class='ctx'> 	int head;		      /* first free byte in output buffer */</div><div class='ctx'> 	int count;		      /* number of bytes in output buffer */</div><div class='ctx'> 	int written;		      /* number of bytes in write requests */</div><div class='del'>-	struct tty_struct *tty;	      /* pointer to tty structure if present */</div><div class='ctx'> 	struct raw3215_req *queued_read; /* pointer to queued read requests */</div><div class='ctx'> 	struct raw3215_req *queued_write;/* pointer to queued write requests */</div><div class='ctx'> 	struct tasklet_struct tlet;   /* tasklet to invoke tty_wakeup */</div><div class='hunk'>@@ -293,7 +291,7 @@ static void raw3215_timeout(unsigned long __data)</div><div class='ctx'> 	if (raw-&gt;flags &amp; RAW3215_TIMER_RUNS) {</div><div class='ctx'> 		del_timer(&amp;raw-&gt;timer);</div><div class='ctx'> 		raw-&gt;flags &amp;= ~RAW3215_TIMER_RUNS;</div><div class='del'>-		if (!(raw-&gt;flags &amp; RAW3215_FROZEN)) {</div><div class='add'>+		if (!(raw-&gt;port.flags &amp; ASYNC_SUSPENDED)) {</div><div class='ctx'> 			raw3215_mk_write_req(raw);</div><div class='ctx'> 			raw3215_start_io(raw);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -309,7 +307,8 @@ static void raw3215_timeout(unsigned long __data)</div><div class='ctx'>  */</div><div class='ctx'> static inline void raw3215_try_io(struct raw3215_info *raw)</div><div class='ctx'> {</div><div class='del'>-	if (!(raw-&gt;flags &amp; RAW3215_ACTIVE) || (raw-&gt;flags &amp; RAW3215_FROZEN))</div><div class='add'>+	if (!(raw-&gt;port.flags &amp; ASYNC_INITIALIZED) ||</div><div class='add'>+			(raw-&gt;port.flags &amp; ASYNC_SUSPENDED))</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (raw-&gt;queued_read != NULL)</div><div class='ctx'> 		raw3215_start_io(raw);</div><div class='hunk'>@@ -324,10 +323,7 @@ static inline void raw3215_try_io(struct raw3215_info *raw)</div><div class='ctx'> 			}</div><div class='ctx'> 		} else if (!(raw-&gt;flags &amp; RAW3215_TIMER_RUNS)) {</div><div class='ctx'> 			/* delay small writes */</div><div class='del'>-			init_timer(&amp;raw-&gt;timer);</div><div class='ctx'> 			raw-&gt;timer.expires = RAW3215_TIMEOUT + jiffies;</div><div class='del'>-			raw-&gt;timer.data = (unsigned long) raw;</div><div class='del'>-			raw-&gt;timer.function = raw3215_timeout;</div><div class='ctx'> 			add_timer(&amp;raw-&gt;timer);</div><div class='ctx'> 			raw-&gt;flags |= RAW3215_TIMER_RUNS;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -340,17 +336,21 @@ static inline void raw3215_try_io(struct raw3215_info *raw)</div><div class='ctx'> static void raw3215_wakeup(unsigned long data)</div><div class='ctx'> {</div><div class='ctx'> 	struct raw3215_info *raw = (struct raw3215_info *) data;</div><div class='del'>-	tty_wakeup(raw-&gt;tty);</div><div class='add'>+	struct tty_struct *tty;</div><div class='add'>+</div><div class='add'>+	tty = tty_port_tty_get(&amp;raw-&gt;port);</div><div class='add'>+	tty_wakeup(tty);</div><div class='add'>+	tty_kref_put(tty);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Try to start the next IO and wake up processes waiting on the tty.</div><div class='ctx'>  */</div><div class='del'>-static void raw3215_next_io(struct raw3215_info *raw)</div><div class='add'>+static void raw3215_next_io(struct raw3215_info *raw, struct tty_struct *tty)</div><div class='ctx'> {</div><div class='ctx'> 	raw3215_mk_write_req(raw);</div><div class='ctx'> 	raw3215_try_io(raw);</div><div class='del'>-	if (raw-&gt;tty &amp;&amp; RAW3215_BUFFER_SIZE - raw-&gt;count &gt;= RAW3215_MIN_SPACE)</div><div class='add'>+	if (tty &amp;&amp; RAW3215_BUFFER_SIZE - raw-&gt;count &gt;= RAW3215_MIN_SPACE)</div><div class='ctx'> 		tasklet_schedule(&amp;raw-&gt;tlet);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -368,10 +368,11 @@ static void raw3215_irq(struct ccw_device *cdev, unsigned long intparm,</div><div class='ctx'> </div><div class='ctx'> 	raw = dev_get_drvdata(&amp;cdev-&gt;dev);</div><div class='ctx'> 	req = (struct raw3215_req *) intparm;</div><div class='add'>+	tty = tty_port_tty_get(&amp;raw-&gt;port);</div><div class='ctx'> 	cstat = irb-&gt;scsw.cmd.cstat;</div><div class='ctx'> 	dstat = irb-&gt;scsw.cmd.dstat;</div><div class='ctx'> 	if (cstat != 0)</div><div class='del'>-		raw3215_next_io(raw);</div><div class='add'>+		raw3215_next_io(raw, tty);</div><div class='ctx'> 	if (dstat &amp; 0x01) { /* we got a unit exception */</div><div class='ctx'> 		dstat &amp;= ~0x01;	 /* we can ignore it */</div><div class='ctx'> 	}</div><div class='hunk'>@@ -381,13 +382,13 @@ static void raw3215_irq(struct ccw_device *cdev, unsigned long intparm,</div><div class='ctx'> 			break;</div><div class='ctx'> 		/* Attention interrupt, someone hit the enter key */</div><div class='ctx'> 		raw3215_mk_read_req(raw);</div><div class='del'>-		raw3215_next_io(raw);</div><div class='add'>+		raw3215_next_io(raw, tty);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x08:</div><div class='ctx'> 	case 0x0C:</div><div class='ctx'> 		/* Channel end interrupt. */</div><div class='ctx'> 		if ((raw = req-&gt;info) == NULL)</div><div class='del'>-			return;		     /* That shouldn't happen ... */</div><div class='add'>+			goto put_tty;	     /* That shouldn't happen ... */</div><div class='ctx'> 		if (req-&gt;type == RAW3215_READ) {</div><div class='ctx'> 			/* store residual count, then wait for device end */</div><div class='ctx'> 			req-&gt;residual = irb-&gt;scsw.cmd.count;</div><div class='hunk'>@@ -397,11 +398,10 @@ static void raw3215_irq(struct ccw_device *cdev, unsigned long intparm,</div><div class='ctx'> 	case 0x04:</div><div class='ctx'> 		/* Device end interrupt. */</div><div class='ctx'> 		if ((raw = req-&gt;info) == NULL)</div><div class='del'>-			return;		     /* That shouldn't happen ... */</div><div class='del'>-		if (req-&gt;type == RAW3215_READ &amp;&amp; raw-&gt;tty != NULL) {</div><div class='add'>+			goto put_tty;	     /* That shouldn't happen ... */</div><div class='add'>+		if (req-&gt;type == RAW3215_READ &amp;&amp; tty != NULL) {</div><div class='ctx'> 			unsigned int cchar;</div><div class='ctx'> </div><div class='del'>-			tty = raw-&gt;tty;</div><div class='ctx'> 			count = 160 - req-&gt;residual;</div><div class='ctx'> 			EBCASC(raw-&gt;inbuf, count);</div><div class='ctx'> 			cchar = ctrlchar_handle(raw-&gt;inbuf, count, tty);</div><div class='hunk'>@@ -411,7 +411,7 @@ static void raw3215_irq(struct ccw_device *cdev, unsigned long intparm,</div><div class='ctx'> </div><div class='ctx'> 			case CTRLCHAR_CTRL:</div><div class='ctx'> 				tty_insert_flip_char(tty, cchar, TTY_NORMAL);</div><div class='del'>-				tty_flip_buffer_push(raw-&gt;tty);</div><div class='add'>+				tty_flip_buffer_push(tty);</div><div class='ctx'> 				break;</div><div class='ctx'> </div><div class='ctx'> 			case CTRLCHAR_NONE:</div><div class='hunk'>@@ -424,7 +424,7 @@ static void raw3215_irq(struct ccw_device *cdev, unsigned long intparm,</div><div class='ctx'> 				} else</div><div class='ctx'> 					count -= 2;</div><div class='ctx'> 				tty_insert_flip_string(tty, raw-&gt;inbuf, count);</div><div class='del'>-				tty_flip_buffer_push(raw-&gt;tty);</div><div class='add'>+				tty_flip_buffer_push(tty);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else if (req-&gt;type == RAW3215_WRITE) {</div><div class='hunk'>@@ -439,7 +439,7 @@ static void raw3215_irq(struct ccw_device *cdev, unsigned long intparm,</div><div class='ctx'> 		    raw-&gt;queued_read == NULL) {</div><div class='ctx'> 			wake_up_interruptible(&amp;raw-&gt;empty_wait);</div><div class='ctx'> 		}</div><div class='del'>-		raw3215_next_io(raw);</div><div class='add'>+		raw3215_next_io(raw, tty);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* Strange interrupt, I'll do my best to clean up */</div><div class='hunk'>@@ -451,9 +451,10 @@ static void raw3215_irq(struct ccw_device *cdev, unsigned long intparm,</div><div class='ctx'> 			raw-&gt;flags &amp;= ~RAW3215_WORKING;</div><div class='ctx'> 			raw3215_free_req(req);</div><div class='ctx'> 		}</div><div class='del'>-		raw3215_next_io(raw);</div><div class='add'>+		raw3215_next_io(raw, tty);</div><div class='ctx'> 	}</div><div class='del'>-	return;</div><div class='add'>+put_tty:</div><div class='add'>+	tty_kref_put(tty);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -487,7 +488,7 @@ static void raw3215_make_room(struct raw3215_info *raw, unsigned int length)</div><div class='ctx'> 		/* While console is frozen for suspend we have no other</div><div class='ctx'> 		 * choice but to drop message from the buffer to make</div><div class='ctx'> 		 * room for even more messages. */</div><div class='del'>-		if (raw-&gt;flags &amp; RAW3215_FROZEN) {</div><div class='add'>+		if (raw-&gt;port.flags &amp; ASYNC_SUSPENDED) {</div><div class='ctx'> 			raw3215_drop_line(raw);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -609,10 +610,10 @@ static int raw3215_startup(struct raw3215_info *raw)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (raw-&gt;flags &amp; RAW3215_ACTIVE)</div><div class='add'>+	if (raw-&gt;port.flags &amp; ASYNC_INITIALIZED)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	raw-&gt;line_pos = 0;</div><div class='del'>-	raw-&gt;flags |= RAW3215_ACTIVE;</div><div class='add'>+	raw-&gt;port.flags |= ASYNC_INITIALIZED;</div><div class='ctx'> 	spin_lock_irqsave(get_ccwdev_lock(raw-&gt;cdev), flags);</div><div class='ctx'> 	raw3215_try_io(raw);</div><div class='ctx'> 	spin_unlock_irqrestore(get_ccwdev_lock(raw-&gt;cdev), flags);</div><div class='hunk'>@@ -628,14 +629,15 @@ static void raw3215_shutdown(struct raw3215_info *raw)</div><div class='ctx'> 	DECLARE_WAITQUEUE(wait, current);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (!(raw-&gt;flags &amp; RAW3215_ACTIVE) || (raw-&gt;flags &amp; RAW3215_FIXED))</div><div class='add'>+	if (!(raw-&gt;port.flags &amp; ASYNC_INITIALIZED) ||</div><div class='add'>+			(raw-&gt;flags &amp; RAW3215_FIXED))</div><div class='ctx'> 		return;</div><div class='ctx'> 	/* Wait for outstanding requests, then free irq */</div><div class='ctx'> 	spin_lock_irqsave(get_ccwdev_lock(raw-&gt;cdev), flags);</div><div class='ctx'> 	if ((raw-&gt;flags &amp; RAW3215_WORKING) ||</div><div class='ctx'> 	    raw-&gt;queued_write != NULL ||</div><div class='ctx'> 	    raw-&gt;queued_read != NULL) {</div><div class='del'>-		raw-&gt;flags |= RAW3215_CLOSING;</div><div class='add'>+		raw-&gt;port.flags |= ASYNC_CLOSING;</div><div class='ctx'> 		add_wait_queue(&amp;raw-&gt;empty_wait, &amp;wait);</div><div class='ctx'> 		set_current_state(TASK_INTERRUPTIBLE);</div><div class='ctx'> 		spin_unlock_irqrestore(get_ccwdev_lock(raw-&gt;cdev), flags);</div><div class='hunk'>@@ -643,11 +645,41 @@ static void raw3215_shutdown(struct raw3215_info *raw)</div><div class='ctx'> 		spin_lock_irqsave(get_ccwdev_lock(raw-&gt;cdev), flags);</div><div class='ctx'> 		remove_wait_queue(&amp;raw-&gt;empty_wait, &amp;wait);</div><div class='ctx'> 		set_current_state(TASK_RUNNING);</div><div class='del'>-		raw-&gt;flags &amp;= ~(RAW3215_ACTIVE | RAW3215_CLOSING);</div><div class='add'>+		raw-&gt;port.flags &amp;= ~(ASYNC_INITIALIZED | ASYNC_CLOSING);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(get_ccwdev_lock(raw-&gt;cdev), flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct raw3215_info *raw3215_alloc_info(void)</div><div class='add'>+{</div><div class='add'>+	struct raw3215_info *info;</div><div class='add'>+</div><div class='add'>+	info = kzalloc(sizeof(struct raw3215_info), GFP_KERNEL | GFP_DMA);</div><div class='add'>+	if (!info)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	info-&gt;buffer = kzalloc(RAW3215_BUFFER_SIZE, GFP_KERNEL | GFP_DMA);</div><div class='add'>+	info-&gt;inbuf = kzalloc(RAW3215_INBUF_SIZE, GFP_KERNEL | GFP_DMA);</div><div class='add'>+	if (!info-&gt;buffer || !info-&gt;inbuf) {</div><div class='add'>+		kfree(info);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	setup_timer(&amp;info-&gt;timer, raw3215_timeout, (unsigned long)info);</div><div class='add'>+	init_waitqueue_head(&amp;info-&gt;empty_wait);</div><div class='add'>+	tasklet_init(&amp;info-&gt;tlet, raw3215_wakeup, (unsigned long)info);</div><div class='add'>+	tty_port_init(&amp;info-&gt;port);</div><div class='add'>+</div><div class='add'>+	return info;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void raw3215_free_info(struct raw3215_info *raw)</div><div class='add'>+{</div><div class='add'>+	kfree(raw-&gt;inbuf);</div><div class='add'>+	kfree(raw-&gt;buffer);</div><div class='add'>+	kfree(raw);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int raw3215_probe (struct ccw_device *cdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct raw3215_info *raw;</div><div class='hunk'>@@ -656,11 +688,15 @@ static int raw3215_probe (struct ccw_device *cdev)</div><div class='ctx'> 	/* Console is special. */</div><div class='ctx'> 	if (raw3215[0] &amp;&amp; (raw3215[0] == dev_get_drvdata(&amp;cdev-&gt;dev)))</div><div class='ctx'> 		return 0;</div><div class='del'>-	raw = kmalloc(sizeof(struct raw3215_info) +</div><div class='del'>-		      RAW3215_INBUF_SIZE, GFP_KERNEL|GFP_DMA);</div><div class='add'>+</div><div class='add'>+	raw = raw3215_alloc_info();</div><div class='ctx'> 	if (raw == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	raw-&gt;cdev = cdev;</div><div class='add'>+	dev_set_drvdata(&amp;cdev-&gt;dev, raw);</div><div class='add'>+	cdev-&gt;handler = raw3215_irq;</div><div class='add'>+</div><div class='ctx'> 	spin_lock(&amp;raw3215_device_lock);</div><div class='ctx'> 	for (line = 0; line &lt; NR_3215; line++) {</div><div class='ctx'> 		if (!raw3215[line]) {</div><div class='hunk'>@@ -670,28 +706,10 @@ static int raw3215_probe (struct ccw_device *cdev)</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock(&amp;raw3215_device_lock);</div><div class='ctx'> 	if (line == NR_3215) {</div><div class='del'>-		kfree(raw);</div><div class='add'>+		raw3215_free_info(raw);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	raw-&gt;cdev = cdev;</div><div class='del'>-	raw-&gt;inbuf = (char *) raw + sizeof(struct raw3215_info);</div><div class='del'>-	memset(raw, 0, sizeof(struct raw3215_info));</div><div class='del'>-	raw-&gt;buffer = kmalloc(RAW3215_BUFFER_SIZE,</div><div class='del'>-				       GFP_KERNEL|GFP_DMA);</div><div class='del'>-	if (raw-&gt;buffer == NULL) {</div><div class='del'>-		spin_lock(&amp;raw3215_device_lock);</div><div class='del'>-		raw3215[line] = NULL;</div><div class='del'>-		spin_unlock(&amp;raw3215_device_lock);</div><div class='del'>-		kfree(raw);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	init_waitqueue_head(&amp;raw-&gt;empty_wait);</div><div class='del'>-	tasklet_init(&amp;raw-&gt;tlet, raw3215_wakeup, (unsigned long) raw);</div><div class='del'>-</div><div class='del'>-	dev_set_drvdata(&amp;cdev-&gt;dev, raw);</div><div class='del'>-	cdev-&gt;handler = raw3215_irq;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -703,8 +721,7 @@ static void raw3215_remove (struct ccw_device *cdev)</div><div class='ctx'> 	raw = dev_get_drvdata(&amp;cdev-&gt;dev);</div><div class='ctx'> 	if (raw) {</div><div class='ctx'> 		dev_set_drvdata(&amp;cdev-&gt;dev, NULL);</div><div class='del'>-		kfree(raw-&gt;buffer);</div><div class='del'>-		kfree(raw);</div><div class='add'>+		raw3215_free_info(raw);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -741,7 +758,7 @@ static int raw3215_pm_stop(struct ccw_device *cdev)</div><div class='ctx'> 	raw = dev_get_drvdata(&amp;cdev-&gt;dev);</div><div class='ctx'> 	spin_lock_irqsave(get_ccwdev_lock(raw-&gt;cdev), flags);</div><div class='ctx'> 	raw3215_make_room(raw, RAW3215_BUFFER_SIZE);</div><div class='del'>-	raw-&gt;flags |= RAW3215_FROZEN;</div><div class='add'>+	raw-&gt;port.flags |= ASYNC_SUSPENDED;</div><div class='ctx'> 	spin_unlock_irqrestore(get_ccwdev_lock(raw-&gt;cdev), flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -754,7 +771,7 @@ static int raw3215_pm_start(struct ccw_device *cdev)</div><div class='ctx'> 	/* Allow I/O again and flush output buffer. */</div><div class='ctx'> 	raw = dev_get_drvdata(&amp;cdev-&gt;dev);</div><div class='ctx'> 	spin_lock_irqsave(get_ccwdev_lock(raw-&gt;cdev), flags);</div><div class='del'>-	raw-&gt;flags &amp;= ~RAW3215_FROZEN;</div><div class='add'>+	raw-&gt;port.flags &amp;= ~ASYNC_SUSPENDED;</div><div class='ctx'> 	raw-&gt;flags |= RAW3215_FLUSHING;</div><div class='ctx'> 	raw3215_try_io(raw);</div><div class='ctx'> 	raw-&gt;flags &amp;= ~RAW3215_FLUSHING;</div><div class='hunk'>@@ -827,7 +844,7 @@ static void con3215_flush(void)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	raw = raw3215[0];  /* console 3215 is the first one */</div><div class='del'>-	if (raw-&gt;flags &amp; RAW3215_FROZEN)</div><div class='add'>+	if (raw-&gt;port.flags &amp; ASYNC_SUSPENDED)</div><div class='ctx'> 		/* The console is still frozen for suspend. */</div><div class='ctx'> 		if (ccw_device_force_console())</div><div class='ctx'> 			/* Forcing didn't work, no panic message .. */</div><div class='hunk'>@@ -897,23 +914,16 @@ static int __init con3215_init(void)</div><div class='ctx'> 	if (IS_ERR(cdev))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	raw3215[0] = raw = (struct raw3215_info *)</div><div class='del'>-		kzalloc(sizeof(struct raw3215_info), GFP_KERNEL | GFP_DMA);</div><div class='del'>-	raw-&gt;buffer = kzalloc(RAW3215_BUFFER_SIZE, GFP_KERNEL | GFP_DMA);</div><div class='del'>-	raw-&gt;inbuf = kzalloc(RAW3215_INBUF_SIZE, GFP_KERNEL | GFP_DMA);</div><div class='add'>+	raw3215[0] = raw = raw3215_alloc_info();</div><div class='ctx'> 	raw-&gt;cdev = cdev;</div><div class='ctx'> 	dev_set_drvdata(&amp;cdev-&gt;dev, raw);</div><div class='ctx'> 	cdev-&gt;handler = raw3215_irq;</div><div class='ctx'> </div><div class='ctx'> 	raw-&gt;flags |= RAW3215_FIXED;</div><div class='del'>-	init_waitqueue_head(&amp;raw-&gt;empty_wait);</div><div class='del'>-	tasklet_init(&amp;raw-&gt;tlet, raw3215_wakeup, (unsigned long) raw);</div><div class='ctx'> </div><div class='ctx'> 	/* Request the console irq */</div><div class='ctx'> 	if (raw3215_startup(raw) != 0) {</div><div class='del'>-		kfree(raw-&gt;inbuf);</div><div class='del'>-		kfree(raw-&gt;buffer);</div><div class='del'>-		kfree(raw);</div><div class='add'>+		raw3215_free_info(raw);</div><div class='ctx'> 		raw3215[0] = NULL;</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -940,7 +950,7 @@ static int tty3215_open(struct tty_struct *tty, struct file * filp)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	tty-&gt;driver_data = raw;</div><div class='del'>-	raw-&gt;tty = tty;</div><div class='add'>+	tty_port_tty_set(&amp;raw-&gt;port, tty);</div><div class='ctx'> </div><div class='ctx'> 	tty-&gt;low_latency = 0;  /* don't use bottom half for pushing chars */</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -971,7 +981,7 @@ static void tty3215_close(struct tty_struct *tty, struct file * filp)</div><div class='ctx'> 	raw3215_shutdown(raw);</div><div class='ctx'> 	tasklet_kill(&amp;raw-&gt;tlet);</div><div class='ctx'> 	tty-&gt;closing = 0;</div><div class='del'>-	raw-&gt;tty = NULL;</div><div class='add'>+	tty_port_tty_set(&amp;raw-&gt;port, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/s390/char/keyboard.c b/drivers/s390/char/keyboard.c<br/>index 806588192483..7ef9cfdc17d8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/keyboard.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/keyboard.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/keyboard.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/keyboard.c</a></div><div class='hunk'>@@ -199,7 +199,7 @@ handle_diacr(struct kbd_data *kbd, unsigned int ch)</div><div class='ctx'> 	if (ch == ' ' || ch == d)</div><div class='ctx'> 		return d;</div><div class='ctx'> </div><div class='del'>-	kbd_put_queue(kbd-&gt;tty, d);</div><div class='add'>+	kbd_put_queue(kbd-&gt;port, d);</div><div class='ctx'> 	return ch;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -221,7 +221,7 @@ k_self(struct kbd_data *kbd, unsigned char value)</div><div class='ctx'> {</div><div class='ctx'> 	if (kbd-&gt;diacr)</div><div class='ctx'> 		value = handle_diacr(kbd, value);</div><div class='del'>-	kbd_put_queue(kbd-&gt;tty, value);</div><div class='add'>+	kbd_put_queue(kbd-&gt;port, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -239,7 +239,7 @@ static void</div><div class='ctx'> k_fn(struct kbd_data *kbd, unsigned char value)</div><div class='ctx'> {</div><div class='ctx'> 	if (kbd-&gt;func_table[value])</div><div class='del'>-		kbd_puts_queue(kbd-&gt;tty, kbd-&gt;func_table[value]);</div><div class='add'>+		kbd_puts_queue(kbd-&gt;port, kbd-&gt;func_table[value]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -257,20 +257,20 @@ k_spec(struct kbd_data *kbd, unsigned char value)</div><div class='ctx'>  * but we need only 16 bits here</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='del'>-to_utf8(struct tty_struct *tty, ushort c) </div><div class='add'>+to_utf8(struct tty_port *port, ushort c)</div><div class='ctx'> {</div><div class='ctx'> 	if (c &lt; 0x80)</div><div class='ctx'> 		/*  0******* */</div><div class='del'>-		kbd_put_queue(tty, c);</div><div class='add'>+		kbd_put_queue(port, c);</div><div class='ctx'> 	else if (c &lt; 0x800) {</div><div class='ctx'> 		/* 110***** 10****** */</div><div class='del'>-		kbd_put_queue(tty, 0xc0 | (c &gt;&gt; 6));</div><div class='del'>-		kbd_put_queue(tty, 0x80 | (c &amp; 0x3f));</div><div class='add'>+		kbd_put_queue(port, 0xc0 | (c &gt;&gt; 6));</div><div class='add'>+		kbd_put_queue(port, 0x80 | (c &amp; 0x3f));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* 1110**** 10****** 10****** */</div><div class='del'>-		kbd_put_queue(tty, 0xe0 | (c &gt;&gt; 12));</div><div class='del'>-		kbd_put_queue(tty, 0x80 | ((c &gt;&gt; 6) &amp; 0x3f));</div><div class='del'>-		kbd_put_queue(tty, 0x80 | (c &amp; 0x3f));</div><div class='add'>+		kbd_put_queue(port, 0xe0 | (c &gt;&gt; 12));</div><div class='add'>+		kbd_put_queue(port, 0x80 | ((c &gt;&gt; 6) &amp; 0x3f));</div><div class='add'>+		kbd_put_queue(port, 0x80 | (c &amp; 0x3f));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -283,7 +283,7 @@ kbd_keycode(struct kbd_data *kbd, unsigned int keycode)</div><div class='ctx'> 	unsigned short keysym;</div><div class='ctx'> 	unsigned char type, value;</div><div class='ctx'> </div><div class='del'>-	if (!kbd || !kbd-&gt;tty)</div><div class='add'>+	if (!kbd)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (keycode &gt;= 384)</div><div class='hunk'>@@ -323,7 +323,7 @@ kbd_keycode(struct kbd_data *kbd, unsigned int keycode)</div><div class='ctx'> #endif</div><div class='ctx'> 		(*k_handler[type])(kbd, value);</div><div class='ctx'> 	} else</div><div class='del'>-		to_utf8(kbd-&gt;tty, keysym);</div><div class='add'>+		to_utf8(kbd-&gt;port, keysym);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -457,6 +457,7 @@ do_kdgkb_ioctl(struct kbd_data *kbd, struct kbsentry __user *u_kbs,</div><div class='ctx'> </div><div class='ctx'> int kbd_ioctl(struct kbd_data *kbd, unsigned int cmd, unsigned long arg)</div><div class='ctx'> {</div><div class='add'>+	struct tty_struct *tty;</div><div class='ctx'> 	void __user *argp;</div><div class='ctx'> 	unsigned int ct;</div><div class='ctx'> 	int perm;</div><div class='hunk'>@@ -467,7 +468,10 @@ int kbd_ioctl(struct kbd_data *kbd, unsigned int cmd, unsigned long arg)</div><div class='ctx'> 	 * To have permissions to do most of the vt ioctls, we either have</div><div class='ctx'> 	 * to be the owner of the tty, or have CAP_SYS_TTY_CONFIG.</div><div class='ctx'> 	 */</div><div class='del'>-	perm = current-&gt;signal-&gt;tty == kbd-&gt;tty || capable(CAP_SYS_TTY_CONFIG);</div><div class='add'>+	tty = tty_port_tty_get(kbd-&gt;port);</div><div class='add'>+	/* FIXME this test is pretty racy */</div><div class='add'>+	perm = current-&gt;signal-&gt;tty == tty || capable(CAP_SYS_TTY_CONFIG);</div><div class='add'>+	tty_kref_put(tty);</div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case KDGKBTYPE:</div><div class='ctx'> 		return put_user(KB_101, (char __user *)argp);</div><div class='head'>diff --git a/drivers/s390/char/keyboard.h b/drivers/s390/char/keyboard.h<br/>index 7e736aaeae6e..f682f4e49680 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/keyboard.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/keyboard.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/keyboard.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/keyboard.h</a></div><div class='hunk'>@@ -21,7 +21,7 @@ typedef void (fn_handler_fn)(struct kbd_data *);</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> struct kbd_data {</div><div class='del'>-	struct tty_struct *tty;</div><div class='add'>+	struct tty_port *port;</div><div class='ctx'> 	unsigned short **key_maps;</div><div class='ctx'> 	char **func_table;</div><div class='ctx'> 	fn_handler_fn **fn_handler;</div><div class='hunk'>@@ -42,16 +42,24 @@ int kbd_ioctl(struct kbd_data *, unsigned int, unsigned long);</div><div class='ctx'>  * Helper Functions.</div><div class='ctx'>  */</div><div class='ctx'> static inline void</div><div class='del'>-kbd_put_queue(struct tty_struct *tty, int ch)</div><div class='add'>+kbd_put_queue(struct tty_port *port, int ch)</div><div class='ctx'> {</div><div class='add'>+	struct tty_struct *tty = tty_port_tty_get(port);</div><div class='add'>+	if (!tty)</div><div class='add'>+		return;</div><div class='ctx'> 	tty_insert_flip_char(tty, ch, 0);</div><div class='ctx'> 	tty_schedule_flip(tty);</div><div class='add'>+	tty_kref_put(tty);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-kbd_puts_queue(struct tty_struct *tty, char *cp)</div><div class='add'>+kbd_puts_queue(struct tty_port *port, char *cp)</div><div class='ctx'> {</div><div class='add'>+	struct tty_struct *tty = tty_port_tty_get(port);</div><div class='add'>+	if (!tty)</div><div class='add'>+		return;</div><div class='ctx'> 	while (*cp)</div><div class='ctx'> 		tty_insert_flip_char(tty, *cp++, 0);</div><div class='ctx'> 	tty_schedule_flip(tty);</div><div class='add'>+	tty_kref_put(tty);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/s390/char/sclp_cmd.c b/drivers/s390/char/sclp_cmd.c<br/>index 231a1d85127b..766cb7b19b40 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/sclp_cmd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/sclp_cmd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/sclp_cmd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/sclp_cmd.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/mmzone.h&gt;</div><div class='ctx'> #include &lt;linux/memory.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;asm/chpid.h&gt;</div><div class='ctx'> #include &lt;asm/sclp.h&gt;</div><div class='hunk'>@@ -38,7 +39,8 @@ struct read_info_sccb {</div><div class='ctx'> 	u64	facilities;		/* 48-55 */</div><div class='ctx'> 	u8	_reserved2[84 - 56];	/* 56-83 */</div><div class='ctx'> 	u8	fac84;			/* 84 */</div><div class='del'>-	u8	_reserved3[91 - 85];	/* 85-90 */</div><div class='add'>+	u8	fac85;			/* 85 */</div><div class='add'>+	u8	_reserved3[91 - 86];	/* 86-90 */</div><div class='ctx'> 	u8	flags;			/* 91 */</div><div class='ctx'> 	u8	_reserved4[100 - 92];	/* 92-99 */</div><div class='ctx'> 	u32	rnsize2;		/* 100-103 */</div><div class='hunk'>@@ -51,6 +53,7 @@ static int __initdata early_read_info_sccb_valid;</div><div class='ctx'> </div><div class='ctx'> u64 sclp_facilities;</div><div class='ctx'> static u8 sclp_fac84;</div><div class='add'>+static u8 sclp_fac85;</div><div class='ctx'> static unsigned long long rzm;</div><div class='ctx'> static unsigned long long rnmax;</div><div class='ctx'> </div><div class='hunk'>@@ -112,6 +115,7 @@ void __init sclp_facilities_detect(void)</div><div class='ctx'> 	sccb = &amp;early_read_info_sccb;</div><div class='ctx'> 	sclp_facilities = sccb-&gt;facilities;</div><div class='ctx'> 	sclp_fac84 = sccb-&gt;fac84;</div><div class='add'>+	sclp_fac85 = sccb-&gt;fac85;</div><div class='ctx'> 	rnmax = sccb-&gt;rnmax ? sccb-&gt;rnmax : sccb-&gt;rnmax2;</div><div class='ctx'> 	rzm = sccb-&gt;rnsize ? sccb-&gt;rnsize : sccb-&gt;rnsize2;</div><div class='ctx'> 	rzm &lt;&lt;= 20;</div><div class='hunk'>@@ -127,6 +131,12 @@ unsigned long long sclp_get_rzm(void)</div><div class='ctx'> 	return rzm;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+u8 sclp_get_fac85(void)</div><div class='add'>+{</div><div class='add'>+	return sclp_fac85;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sclp_get_fac85);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This function will be called after sclp_facilities_detect(), which gets</div><div class='ctx'>  * called from early.c code. Therefore the sccb should have valid contents.</div><div class='hunk'>@@ -352,7 +362,17 @@ out:</div><div class='ctx'> </div><div class='ctx'> static int sclp_assign_storage(u16 rn)</div><div class='ctx'> {</div><div class='del'>-	return do_assign_storage(0x000d0001, rn);</div><div class='add'>+	unsigned long long start, address;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = do_assign_storage(0x000d0001, rn);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+	start = address = rn2addr(rn);</div><div class='add'>+	for (; address &lt; start + rzm; address += PAGE_SIZE)</div><div class='add'>+		page_set_storage_key(address, PAGE_DEFAULT_KEY, 0);</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sclp_unassign_storage(u16 rn)</div><div class='head'>diff --git a/drivers/s390/char/sclp_sdias.c b/drivers/s390/char/sclp_sdias.c<br/>index 69e6c50d4cfb..50f7115990ff 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/sclp_sdias.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/sclp_sdias.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/sclp_sdias.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/sclp_sdias.c</a></div><div class='hunk'>@@ -211,7 +211,7 @@ int sclp_sdias_copy(void *dest, int start_blk, int nr_blks)</div><div class='ctx'> 	sccb.evbuf.event_qual = EQ_STORE_DATA;</div><div class='ctx'> 	sccb.evbuf.data_id = DI_FCP_DUMP;</div><div class='ctx'> 	sccb.evbuf.event_id = 4712;</div><div class='del'>-#ifdef __s390x__</div><div class='add'>+#ifdef CONFIG_64BIT</div><div class='ctx'> 	sccb.evbuf.asa_size = ASA_SIZE_64;</div><div class='ctx'> #else</div><div class='ctx'> 	sccb.evbuf.asa_size = ASA_SIZE_32;</div><div class='head'>diff --git a/drivers/s390/char/sclp_tty.c b/drivers/s390/char/sclp_tty.c<br/>index 40a9d69c898e..e66a75b3822c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/sclp_tty.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/sclp_tty.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/sclp_tty.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/sclp_tty.c</a></div><div class='hunk'>@@ -48,7 +48,7 @@ static struct sclp_buffer *sclp_ttybuf;</div><div class='ctx'> /* Timer for delayed output of console messages. */</div><div class='ctx'> static struct timer_list sclp_tty_timer;</div><div class='ctx'> </div><div class='del'>-static struct tty_struct *sclp_tty;</div><div class='add'>+static struct tty_port sclp_port;</div><div class='ctx'> static unsigned char sclp_tty_chars[SCLP_TTY_BUF_SIZE];</div><div class='ctx'> static unsigned short int sclp_tty_chars_count;</div><div class='ctx'> </div><div class='hunk'>@@ -64,7 +64,7 @@ static int sclp_tty_columns = 80;</div><div class='ctx'> static int</div><div class='ctx'> sclp_tty_open(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> {</div><div class='del'>-	sclp_tty = tty;</div><div class='add'>+	tty_port_tty_set(&amp;sclp_port, tty);</div><div class='ctx'> 	tty-&gt;driver_data = NULL;</div><div class='ctx'> 	tty-&gt;low_latency = 0;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -76,7 +76,7 @@ sclp_tty_close(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> {</div><div class='ctx'> 	if (tty-&gt;count &gt; 1)</div><div class='ctx'> 		return;</div><div class='del'>-	sclp_tty = NULL;</div><div class='add'>+	tty_port_tty_set(&amp;sclp_port, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -108,6 +108,7 @@ sclp_tty_write_room (struct tty_struct *tty)</div><div class='ctx'> static void</div><div class='ctx'> sclp_ttybuf_callback(struct sclp_buffer *buffer, int rc)</div><div class='ctx'> {</div><div class='add'>+	struct tty_struct *tty;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	void *page;</div><div class='ctx'> </div><div class='hunk'>@@ -126,8 +127,10 @@ sclp_ttybuf_callback(struct sclp_buffer *buffer, int rc)</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;sclp_tty_lock, flags);</div><div class='ctx'> 	} while (buffer &amp;&amp; sclp_emit_buffer(buffer, sclp_ttybuf_callback));</div><div class='ctx'> 	/* check if the tty needs a wake up call */</div><div class='del'>-	if (sclp_tty != NULL) {</div><div class='del'>-		tty_wakeup(sclp_tty);</div><div class='add'>+	tty = tty_port_tty_get(&amp;sclp_port);</div><div class='add'>+	if (tty != NULL) {</div><div class='add'>+		tty_wakeup(tty);</div><div class='add'>+		tty_kref_put(tty);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -326,21 +329,22 @@ sclp_tty_flush_buffer(struct tty_struct *tty)</div><div class='ctx'> static void</div><div class='ctx'> sclp_tty_input(unsigned char* buf, unsigned int count)</div><div class='ctx'> {</div><div class='add'>+	struct tty_struct *tty = tty_port_tty_get(&amp;sclp_port);</div><div class='ctx'> 	unsigned int cchar;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If this tty driver is currently closed</div><div class='ctx'> 	 * then throw the received input away.</div><div class='ctx'> 	 */</div><div class='del'>-	if (sclp_tty == NULL)</div><div class='add'>+	if (tty == NULL)</div><div class='ctx'> 		return;</div><div class='del'>-	cchar = ctrlchar_handle(buf, count, sclp_tty);</div><div class='add'>+	cchar = ctrlchar_handle(buf, count, tty);</div><div class='ctx'> 	switch (cchar &amp; CTRLCHAR_MASK) {</div><div class='ctx'> 	case CTRLCHAR_SYSRQ:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CTRLCHAR_CTRL:</div><div class='del'>-		tty_insert_flip_char(sclp_tty, cchar, TTY_NORMAL);</div><div class='del'>-		tty_flip_buffer_push(sclp_tty);</div><div class='add'>+		tty_insert_flip_char(tty, cchar, TTY_NORMAL);</div><div class='add'>+		tty_flip_buffer_push(tty);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CTRLCHAR_NONE:</div><div class='ctx'> 		/* send (normal) input to line discipline */</div><div class='hunk'>@@ -348,13 +352,14 @@ sclp_tty_input(unsigned char* buf, unsigned int count)</div><div class='ctx'> 		    (strncmp((const char *) buf + count - 2, "^n", 2) &amp;&amp;</div><div class='ctx'> 		     strncmp((const char *) buf + count - 2, "\252n", 2))) {</div><div class='ctx'> 			/* add the auto \n */</div><div class='del'>-			tty_insert_flip_string(sclp_tty, buf, count);</div><div class='del'>-			tty_insert_flip_char(sclp_tty, '\n', TTY_NORMAL);</div><div class='add'>+			tty_insert_flip_string(tty, buf, count);</div><div class='add'>+			tty_insert_flip_char(tty, '\n', TTY_NORMAL);</div><div class='ctx'> 		} else</div><div class='del'>-			tty_insert_flip_string(sclp_tty, buf, count - 2);</div><div class='del'>-		tty_flip_buffer_push(sclp_tty);</div><div class='add'>+			tty_insert_flip_string(tty, buf, count - 2);</div><div class='add'>+		tty_flip_buffer_push(tty);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	tty_kref_put(tty);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -543,7 +548,7 @@ sclp_tty_init(void)</div><div class='ctx'> 		sclp_tty_tolower = 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	sclp_tty_chars_count = 0;</div><div class='del'>-	sclp_tty = NULL;</div><div class='add'>+	tty_port_init(&amp;sclp_port);</div><div class='ctx'> </div><div class='ctx'> 	rc = sclp_register(&amp;sclp_input_event);</div><div class='ctx'> 	if (rc) {</div><div class='head'>diff --git a/drivers/s390/char/sclp_vt220.c b/drivers/s390/char/sclp_vt220.c<br/>index b635472ae660..edfc0fd73dc6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/sclp_vt220.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/sclp_vt220.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/sclp_vt220.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/sclp_vt220.c</a></div><div class='hunk'>@@ -34,7 +34,6 @@</div><div class='ctx'> #define SCLP_VT220_DEVICE_NAME		"ttysclp"</div><div class='ctx'> #define SCLP_VT220_CONSOLE_NAME		"ttyS"</div><div class='ctx'> #define SCLP_VT220_CONSOLE_INDEX	1	/* console=ttyS1 */</div><div class='del'>-#define SCLP_VT220_BUF_SIZE		80</div><div class='ctx'> </div><div class='ctx'> /* Representation of a single write request */</div><div class='ctx'> struct sclp_vt220_request {</div><div class='hunk'>@@ -56,8 +55,7 @@ struct sclp_vt220_sccb {</div><div class='ctx'> /* Structures and data needed to register tty driver */</div><div class='ctx'> static struct tty_driver *sclp_vt220_driver;</div><div class='ctx'> </div><div class='del'>-/* The tty_struct that the kernel associated with us */</div><div class='del'>-static struct tty_struct *sclp_vt220_tty;</div><div class='add'>+static struct tty_port sclp_vt220_port;</div><div class='ctx'> </div><div class='ctx'> /* Lock to protect internal data from concurrent access */</div><div class='ctx'> static spinlock_t sclp_vt220_lock;</div><div class='hunk'>@@ -116,6 +114,7 @@ static struct sclp_register sclp_vt220_register = {</div><div class='ctx'> static void</div><div class='ctx'> sclp_vt220_process_queue(struct sclp_vt220_request *request)</div><div class='ctx'> {</div><div class='add'>+	struct tty_struct *tty;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	void *page;</div><div class='ctx'> </div><div class='hunk'>@@ -141,8 +140,10 @@ sclp_vt220_process_queue(struct sclp_vt220_request *request)</div><div class='ctx'> 	if (request == NULL &amp;&amp; sclp_vt220_flush_later)</div><div class='ctx'> 		sclp_vt220_emit_current();</div><div class='ctx'> 	/* Check if the tty needs a wake up call */</div><div class='del'>-	if (sclp_vt220_tty != NULL) {</div><div class='del'>-		tty_wakeup(sclp_vt220_tty);</div><div class='add'>+	tty = tty_port_tty_get(&amp;sclp_vt220_port);</div><div class='add'>+	if (tty) {</div><div class='add'>+		tty_wakeup(tty);</div><div class='add'>+		tty_kref_put(tty);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -460,11 +461,12 @@ sclp_vt220_write(struct tty_struct *tty, const unsigned char *buf, int count)</div><div class='ctx'> static void</div><div class='ctx'> sclp_vt220_receiver_fn(struct evbuf_header *evbuf)</div><div class='ctx'> {</div><div class='add'>+	struct tty_struct *tty = tty_port_tty_get(&amp;sclp_vt220_port);</div><div class='ctx'> 	char *buffer;</div><div class='ctx'> 	unsigned int count;</div><div class='ctx'> </div><div class='ctx'> 	/* Ignore input if device is not open */</div><div class='del'>-	if (sclp_vt220_tty == NULL)</div><div class='add'>+	if (tty == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	buffer = (char *) ((addr_t) evbuf + sizeof(struct evbuf_header));</div><div class='hunk'>@@ -478,10 +480,11 @@ sclp_vt220_receiver_fn(struct evbuf_header *evbuf)</div><div class='ctx'> 		/* Send input to line discipline */</div><div class='ctx'> 		buffer++;</div><div class='ctx'> 		count--;</div><div class='del'>-		tty_insert_flip_string(sclp_vt220_tty, buffer, count);</div><div class='del'>-		tty_flip_buffer_push(sclp_vt220_tty);</div><div class='add'>+		tty_insert_flip_string(tty, buffer, count);</div><div class='add'>+		tty_flip_buffer_push(tty);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	tty_kref_put(tty);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -491,10 +494,7 @@ static int</div><div class='ctx'> sclp_vt220_open(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> {</div><div class='ctx'> 	if (tty-&gt;count == 1) {</div><div class='del'>-		sclp_vt220_tty = tty;</div><div class='del'>-		tty-&gt;driver_data = kmalloc(SCLP_VT220_BUF_SIZE, GFP_KERNEL);</div><div class='del'>-		if (tty-&gt;driver_data == NULL)</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+		tty_port_tty_set(&amp;sclp_vt220_port, tty);</div><div class='ctx'> 		tty-&gt;low_latency = 0;</div><div class='ctx'> 		if (!tty-&gt;winsize.ws_row &amp;&amp; !tty-&gt;winsize.ws_col) {</div><div class='ctx'> 			tty-&gt;winsize.ws_row = 24;</div><div class='hunk'>@@ -510,11 +510,8 @@ sclp_vt220_open(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> static void</div><div class='ctx'> sclp_vt220_close(struct tty_struct *tty, struct file *filp)</div><div class='ctx'> {</div><div class='del'>-	if (tty-&gt;count == 1) {</div><div class='del'>-		sclp_vt220_tty = NULL;</div><div class='del'>-		kfree(tty-&gt;driver_data);</div><div class='del'>-		tty-&gt;driver_data = NULL;</div><div class='del'>-	}</div><div class='add'>+	if (tty-&gt;count == 1)</div><div class='add'>+		tty_port_tty_set(&amp;sclp_vt220_port, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -635,9 +632,9 @@ static int __init __sclp_vt220_init(int num_pages)</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;sclp_vt220_empty);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;sclp_vt220_outqueue);</div><div class='ctx'> 	init_timer(&amp;sclp_vt220_timer);</div><div class='add'>+	tty_port_init(&amp;sclp_vt220_port);</div><div class='ctx'> 	sclp_vt220_current_request = NULL;</div><div class='ctx'> 	sclp_vt220_buffered_chars = 0;</div><div class='del'>-	sclp_vt220_tty = NULL;</div><div class='ctx'> 	sclp_vt220_flush_later = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate pages for output buffering */</div><div class='head'>diff --git a/drivers/s390/char/tape.h b/drivers/s390/char/tape.h<br/>index 267b54e8ff5a..bc6c7cfd36b6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/tape.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/tape.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/tape.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/tape.h</a></div><div class='hunk'>@@ -154,12 +154,6 @@ struct tape_discipline {</div><div class='ctx'> 	struct tape_request *(*read_block)(struct tape_device *, size_t);</div><div class='ctx'> 	struct tape_request *(*write_block)(struct tape_device *, size_t);</div><div class='ctx'> 	void (*process_eov)(struct tape_device*);</div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-	/* Block device stuff. */</div><div class='del'>-	struct tape_request *(*bread)(struct tape_device *, struct request *);</div><div class='del'>-	void (*check_locate)(struct tape_device *, struct tape_request *);</div><div class='del'>-	void (*free_bread)(struct tape_request *);</div><div class='del'>-#endif</div><div class='ctx'> 	/* ioctl function for additional ioctls. */</div><div class='ctx'> 	int (*ioctl_fn)(struct tape_device *, unsigned int, unsigned long);</div><div class='ctx'> 	/* Array of tape commands with TAPE_NR_MTOPS entries */</div><div class='hunk'>@@ -182,26 +176,6 @@ struct tape_char_data {</div><div class='ctx'> 	int block_size;			/*   of size block_size. */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-/* Block Frontend Data */</div><div class='del'>-struct tape_blk_data</div><div class='del'>-{</div><div class='del'>-	struct tape_device *	device;</div><div class='del'>-	/* Block device request queue. */</div><div class='del'>-	struct request_queue *	request_queue;</div><div class='del'>-	spinlock_t		request_queue_lock;</div><div class='del'>-</div><div class='del'>-	/* Task to move entries from block request to CCS request queue. */</div><div class='del'>-	struct work_struct	requeue_task;</div><div class='del'>-	atomic_t		requeue_scheduled;</div><div class='del'>-</div><div class='del'>-	/* Current position on the tape. */</div><div class='del'>-	long			block_position;</div><div class='del'>-	int			medium_changed;</div><div class='del'>-	struct gendisk *	disk;</div><div class='del'>-};</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* Tape Info */</div><div class='ctx'> struct tape_device {</div><div class='ctx'> 	/* entry in tape_device_list */</div><div class='hunk'>@@ -248,10 +222,6 @@ struct tape_device {</div><div class='ctx'> </div><div class='ctx'> 	/* Character device frontend data */</div><div class='ctx'> 	struct tape_char_data		char_data;</div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-	/* Block dev frontend data */</div><div class='del'>-	struct tape_blk_data		blk_data;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	/* Function to start or stop the next request later. */</div><div class='ctx'> 	struct delayed_work		tape_dnr;</div><div class='hunk'>@@ -313,19 +283,6 @@ extern void tapechar_exit(void);</div><div class='ctx'> extern int  tapechar_setup_device(struct tape_device *);</div><div class='ctx'> extern void tapechar_cleanup_device(struct tape_device *);</div><div class='ctx'> </div><div class='del'>-/* Externals from tape_block.c */</div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-extern int tapeblock_init (void);</div><div class='del'>-extern void tapeblock_exit(void);</div><div class='del'>-extern int tapeblock_setup_device(struct tape_device *);</div><div class='del'>-extern void tapeblock_cleanup_device(struct tape_device *);</div><div class='del'>-#else</div><div class='del'>-static inline int tapeblock_init (void) {return 0;}</div><div class='del'>-static inline void tapeblock_exit (void) {;}</div><div class='del'>-static inline int tapeblock_setup_device(struct tape_device *t) {return 0;}</div><div class='del'>-static inline void tapeblock_cleanup_device (struct tape_device *t) {;}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* tape initialisation functions */</div><div class='ctx'> #ifdef CONFIG_PROC_FS</div><div class='ctx'> extern void tape_proc_init (void);</div><div class='head'>diff --git a/drivers/s390/char/tape_34xx.c b/drivers/s390/char/tape_34xx.c<br/>index 934ef33eb9a4..b28de80b7ca4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/tape_34xx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/tape_34xx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/tape_34xx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/tape_34xx.c</a></div><div class='hunk'>@@ -323,20 +323,6 @@ tape_34xx_unit_check(struct tape_device *device, struct tape_request *request,</div><div class='ctx'> 	inhibit_cu_recovery = (*device-&gt;modeset_byte &amp; 0x80) ? 1 : 0;</div><div class='ctx'> 	sense = irb-&gt;ecw;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-	if (request-&gt;op == TO_BLOCK) {</div><div class='del'>-		/*</div><div class='del'>-		 * Recovery for block device requests. Set the block_position</div><div class='del'>-		 * to something invalid and retry.</div><div class='del'>-		 */</div><div class='del'>-		device-&gt;blk_data.block_position = -1;</div><div class='del'>-		if (request-&gt;retries-- &lt;= 0)</div><div class='del'>-			return tape_34xx_erp_failed(request, -EIO);</div><div class='del'>-		else</div><div class='del'>-			return tape_34xx_erp_retry(request);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	if (</div><div class='ctx'> 		sense[0] &amp; SENSE_COMMAND_REJECT &amp;&amp;</div><div class='ctx'> 		sense[1] &amp; SENSE_WRITE_PROTECT</div><div class='hunk'>@@ -1129,123 +1115,6 @@ tape_34xx_mtseek(struct tape_device *device, int mt_count)</div><div class='ctx'> 	return tape_do_io_free(device, request);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-/*</div><div class='del'>- * Tape block read for 34xx.</div><div class='del'>- */</div><div class='del'>-static struct tape_request *</div><div class='del'>-tape_34xx_bread(struct tape_device *device, struct request *req)</div><div class='del'>-{</div><div class='del'>-	struct tape_request *request;</div><div class='del'>-	struct ccw1 *ccw;</div><div class='del'>-	int count = 0;</div><div class='del'>-	unsigned off;</div><div class='del'>-	char *dst;</div><div class='del'>-	struct bio_vec *bv;</div><div class='del'>-	struct req_iterator iter;</div><div class='del'>-	struct tape_34xx_block_id *	start_block;</div><div class='del'>-</div><div class='del'>-	DBF_EVENT(6, "xBREDid:");</div><div class='del'>-</div><div class='del'>-	/* Count the number of blocks for the request. */</div><div class='del'>-	rq_for_each_segment(bv, req, iter)</div><div class='del'>-		count += bv-&gt;bv_len &gt;&gt; (TAPEBLOCK_HSEC_S2B + 9);</div><div class='del'>-</div><div class='del'>-	/* Allocate the ccw request. */</div><div class='del'>-	request = tape_alloc_request(3+count+1, 8);</div><div class='del'>-	if (IS_ERR(request))</div><div class='del'>-		return request;</div><div class='del'>-</div><div class='del'>-	/* Setup ccws. */</div><div class='del'>-	request-&gt;op = TO_BLOCK;</div><div class='del'>-	start_block = (struct tape_34xx_block_id *) request-&gt;cpdata;</div><div class='del'>-	start_block-&gt;block = blk_rq_pos(req) &gt;&gt; TAPEBLOCK_HSEC_S2B;</div><div class='del'>-	DBF_EVENT(6, "start_block = %i\n", start_block-&gt;block);</div><div class='del'>-</div><div class='del'>-	ccw = request-&gt;cpaddr;</div><div class='del'>-	ccw = tape_ccw_cc(ccw, MODE_SET_DB, 1, device-&gt;modeset_byte);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We always setup a nop after the mode set ccw. This slot is</div><div class='del'>-	 * used in tape_std_check_locate to insert a locate ccw if the</div><div class='del'>-	 * current tape position doesn't match the start block to be read.</div><div class='del'>-	 * The second nop will be filled with a read block id which is in</div><div class='del'>-	 * turn used by tape_34xx_free_bread to populate the segment bid</div><div class='del'>-	 * table.</div><div class='del'>-	 */</div><div class='del'>-	ccw = tape_ccw_cc(ccw, NOP, 0, NULL);</div><div class='del'>-	ccw = tape_ccw_cc(ccw, NOP, 0, NULL);</div><div class='del'>-</div><div class='del'>-	rq_for_each_segment(bv, req, iter) {</div><div class='del'>-		dst = kmap(bv-&gt;bv_page) + bv-&gt;bv_offset;</div><div class='del'>-		for (off = 0; off &lt; bv-&gt;bv_len; off += TAPEBLOCK_HSEC_SIZE) {</div><div class='del'>-			ccw-&gt;flags = CCW_FLAG_CC;</div><div class='del'>-			ccw-&gt;cmd_code = READ_FORWARD;</div><div class='del'>-			ccw-&gt;count = TAPEBLOCK_HSEC_SIZE;</div><div class='del'>-			set_normalized_cda(ccw, (void*) __pa(dst));</div><div class='del'>-			ccw++;</div><div class='del'>-			dst += TAPEBLOCK_HSEC_SIZE;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ccw = tape_ccw_end(ccw, NOP, 0, NULL);</div><div class='del'>-	DBF_EVENT(6, "xBREDccwg\n");</div><div class='del'>-	return request;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-tape_34xx_free_bread (struct tape_request *request)</div><div class='del'>-{</div><div class='del'>-	struct ccw1* ccw;</div><div class='del'>-</div><div class='del'>-	ccw = request-&gt;cpaddr;</div><div class='del'>-	if ((ccw + 2)-&gt;cmd_code == READ_BLOCK_ID) {</div><div class='del'>-		struct {</div><div class='del'>-			struct tape_34xx_block_id	cbid;</div><div class='del'>-			struct tape_34xx_block_id	dbid;</div><div class='del'>-		} __attribute__ ((packed)) *rbi_data;</div><div class='del'>-</div><div class='del'>-		rbi_data = request-&gt;cpdata;</div><div class='del'>-</div><div class='del'>-		if (request-&gt;device)</div><div class='del'>-			tape_34xx_add_sbid(request-&gt;device, rbi_data-&gt;cbid);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Last ccw is a nop and doesn't need clear_normalized_cda */</div><div class='del'>-	for (; ccw-&gt;flags &amp; CCW_FLAG_CC; ccw++)</div><div class='del'>-		if (ccw-&gt;cmd_code == READ_FORWARD)</div><div class='del'>-			clear_normalized_cda(ccw);</div><div class='del'>-	tape_free_request(request);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * check_locate is called just before the tape request is passed to</div><div class='del'>- * the common io layer for execution. It has to check the current</div><div class='del'>- * tape position and insert a locate ccw if it doesn't match the</div><div class='del'>- * start block for the request.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-tape_34xx_check_locate(struct tape_device *device, struct tape_request *request)</div><div class='del'>-{</div><div class='del'>-	struct tape_34xx_block_id *	start_block;</div><div class='del'>-</div><div class='del'>-	start_block = (struct tape_34xx_block_id *) request-&gt;cpdata;</div><div class='del'>-	if (start_block-&gt;block == device-&gt;blk_data.block_position)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	DBF_LH(4, "Block seek(%06d+%06d)\n", start_block-&gt;block, device-&gt;bof);</div><div class='del'>-	start_block-&gt;wrap    = 0;</div><div class='del'>-	start_block-&gt;segment = 1;</div><div class='del'>-	start_block-&gt;format  = (*device-&gt;modeset_byte &amp; 0x08) ?</div><div class='del'>-				TAPE34XX_FMT_3480_XF :</div><div class='del'>-				TAPE34XX_FMT_3480;</div><div class='del'>-	start_block-&gt;block   = start_block-&gt;block + device-&gt;bof;</div><div class='del'>-	tape_34xx_merge_sbid(device, start_block);</div><div class='del'>-	tape_ccw_cc(request-&gt;cpaddr + 1, LOCATE, 4, request-&gt;cpdata);</div><div class='del'>-	tape_ccw_cc(request-&gt;cpaddr + 2, READ_BLOCK_ID, 8, request-&gt;cpdata);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * List of 3480/3490 magnetic tape commands.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1295,11 +1164,6 @@ static struct tape_discipline tape_discipline_34xx = {</div><div class='ctx'> 	.irq = tape_34xx_irq,</div><div class='ctx'> 	.read_block = tape_std_read_block,</div><div class='ctx'> 	.write_block = tape_std_write_block,</div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-	.bread = tape_34xx_bread,</div><div class='del'>-	.free_bread = tape_34xx_free_bread,</div><div class='del'>-	.check_locate = tape_34xx_check_locate,</div><div class='del'>-#endif</div><div class='ctx'> 	.ioctl_fn = tape_34xx_ioctl,</div><div class='ctx'> 	.mtop_array = tape_34xx_mtop</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/s390/char/tape_3590.c b/drivers/s390/char/tape_3590.c<br/>index 49c6aab7ad78..a5c6614b0db2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/tape_3590.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/tape_3590.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/tape_3590.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/tape_3590.c</a></div><div class='hunk'>@@ -670,92 +670,6 @@ tape_3590_schedule_work(struct tape_device *device, enum tape_op op)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-/*</div><div class='del'>- * Tape Block READ</div><div class='del'>- */</div><div class='del'>-static struct tape_request *</div><div class='del'>-tape_3590_bread(struct tape_device *device, struct request *req)</div><div class='del'>-{</div><div class='del'>-	struct tape_request *request;</div><div class='del'>-	struct ccw1 *ccw;</div><div class='del'>-	int count = 0, start_block;</div><div class='del'>-	unsigned off;</div><div class='del'>-	char *dst;</div><div class='del'>-	struct bio_vec *bv;</div><div class='del'>-	struct req_iterator iter;</div><div class='del'>-</div><div class='del'>-	DBF_EVENT(6, "xBREDid:");</div><div class='del'>-	start_block = blk_rq_pos(req) &gt;&gt; TAPEBLOCK_HSEC_S2B;</div><div class='del'>-	DBF_EVENT(6, "start_block = %i\n", start_block);</div><div class='del'>-</div><div class='del'>-	rq_for_each_segment(bv, req, iter)</div><div class='del'>-		count += bv-&gt;bv_len &gt;&gt; (TAPEBLOCK_HSEC_S2B + 9);</div><div class='del'>-</div><div class='del'>-	request = tape_alloc_request(2 + count + 1, 4);</div><div class='del'>-	if (IS_ERR(request))</div><div class='del'>-		return request;</div><div class='del'>-	request-&gt;op = TO_BLOCK;</div><div class='del'>-	*(__u32 *) request-&gt;cpdata = start_block;</div><div class='del'>-	ccw = request-&gt;cpaddr;</div><div class='del'>-	ccw = tape_ccw_cc(ccw, MODE_SET_DB, 1, device-&gt;modeset_byte);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We always setup a nop after the mode set ccw. This slot is</div><div class='del'>-	 * used in tape_std_check_locate to insert a locate ccw if the</div><div class='del'>-	 * current tape position doesn't match the start block to be read.</div><div class='del'>-	 */</div><div class='del'>-	ccw = tape_ccw_cc(ccw, NOP, 0, NULL);</div><div class='del'>-</div><div class='del'>-	rq_for_each_segment(bv, req, iter) {</div><div class='del'>-		dst = page_address(bv-&gt;bv_page) + bv-&gt;bv_offset;</div><div class='del'>-		for (off = 0; off &lt; bv-&gt;bv_len; off += TAPEBLOCK_HSEC_SIZE) {</div><div class='del'>-			ccw-&gt;flags = CCW_FLAG_CC;</div><div class='del'>-			ccw-&gt;cmd_code = READ_FORWARD;</div><div class='del'>-			ccw-&gt;count = TAPEBLOCK_HSEC_SIZE;</div><div class='del'>-			set_normalized_cda(ccw, (void *) __pa(dst));</div><div class='del'>-			ccw++;</div><div class='del'>-			dst += TAPEBLOCK_HSEC_SIZE;</div><div class='del'>-		}</div><div class='del'>-		BUG_ON(off &gt; bv-&gt;bv_len);</div><div class='del'>-	}</div><div class='del'>-	ccw = tape_ccw_end(ccw, NOP, 0, NULL);</div><div class='del'>-	DBF_EVENT(6, "xBREDccwg\n");</div><div class='del'>-	return request;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-tape_3590_free_bread(struct tape_request *request)</div><div class='del'>-{</div><div class='del'>-	struct ccw1 *ccw;</div><div class='del'>-</div><div class='del'>-	/* Last ccw is a nop and doesn't need clear_normalized_cda */</div><div class='del'>-	for (ccw = request-&gt;cpaddr; ccw-&gt;flags &amp; CCW_FLAG_CC; ccw++)</div><div class='del'>-		if (ccw-&gt;cmd_code == READ_FORWARD)</div><div class='del'>-			clear_normalized_cda(ccw);</div><div class='del'>-	tape_free_request(request);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * check_locate is called just before the tape request is passed to</div><div class='del'>- * the common io layer for execution. It has to check the current</div><div class='del'>- * tape position and insert a locate ccw if it doesn't match the</div><div class='del'>- * start block for the request.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-tape_3590_check_locate(struct tape_device *device, struct tape_request *request)</div><div class='del'>-{</div><div class='del'>-	__u32 *start_block;</div><div class='del'>-</div><div class='del'>-	start_block = (__u32 *) request-&gt;cpdata;</div><div class='del'>-	if (*start_block != device-&gt;blk_data.block_position) {</div><div class='del'>-		/* Add the start offset of the file to get the real block. */</div><div class='del'>-		*start_block += device-&gt;bof;</div><div class='del'>-		tape_ccw_cc(request-&gt;cpaddr + 1, LOCATE, 4, request-&gt;cpdata);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static void tape_3590_med_state_set(struct tape_device *device,</div><div class='ctx'> 				    struct tape_3590_med_sense *sense)</div><div class='ctx'> {</div><div class='hunk'>@@ -1423,20 +1337,6 @@ tape_3590_unit_check(struct tape_device *device, struct tape_request *request,</div><div class='ctx'> {</div><div class='ctx'> 	struct tape_3590_sense *sense;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-	if (request-&gt;op == TO_BLOCK) {</div><div class='del'>-		/*</div><div class='del'>-		 * Recovery for block device requests. Set the block_position</div><div class='del'>-		 * to something invalid and retry.</div><div class='del'>-		 */</div><div class='del'>-		device-&gt;blk_data.block_position = -1;</div><div class='del'>-		if (request-&gt;retries-- &lt;= 0)</div><div class='del'>-			return tape_3590_erp_failed(device, request, irb, -EIO);</div><div class='del'>-		else</div><div class='del'>-			return tape_3590_erp_retry(device, request, irb);</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	sense = (struct tape_3590_sense *) irb-&gt;ecw;</div><div class='ctx'> </div><div class='ctx'> 	DBF_EVENT(6, "Unit Check: RQC = %x\n", sense-&gt;rc_rqc);</div><div class='hunk'>@@ -1729,11 +1629,6 @@ static struct tape_discipline tape_discipline_3590 = {</div><div class='ctx'> 	.irq = tape_3590_irq,</div><div class='ctx'> 	.read_block = tape_std_read_block,</div><div class='ctx'> 	.write_block = tape_std_write_block,</div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-	.bread = tape_3590_bread,</div><div class='del'>-	.free_bread = tape_3590_free_bread,</div><div class='del'>-	.check_locate = tape_3590_check_locate,</div><div class='del'>-#endif</div><div class='ctx'> 	.ioctl_fn = tape_3590_ioctl,</div><div class='ctx'> 	.mtop_array = tape_3590_mtop</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/s390/char/tape_char.c b/drivers/s390/char/tape_char.c<br/>index 87cd0ab242de..46886a7578c6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/tape_char.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/tape_char.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/tape_char.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/tape_char.c</a></div><div class='hunk'>@@ -161,11 +161,6 @@ tapechar_read(struct file *filp, char __user *data, size_t count, loff_t *ppos)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-	/* Changes position. */</div><div class='del'>-	device-&gt;blk_data.medium_changed = 1;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	DBF_EVENT(6, "TCHAR:nbytes: %lx\n", block_size);</div><div class='ctx'> 	/* Let the discipline build the ccw chain. */</div><div class='ctx'> 	request = device-&gt;discipline-&gt;read_block(device, block_size);</div><div class='hunk'>@@ -218,11 +213,6 @@ tapechar_write(struct file *filp, const char __user *data, size_t count, loff_t</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-	/* Changes position. */</div><div class='del'>-	device-&gt;blk_data.medium_changed = 1;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	DBF_EVENT(6,"TCHAR:nbytes: %lx\n", block_size);</div><div class='ctx'> 	DBF_EVENT(6, "TCHAR:nblocks: %x\n", nblocks);</div><div class='ctx'> 	/* Let the discipline build the ccw chain. */</div><div class='hunk'>@@ -379,9 +369,6 @@ __tapechar_ioctl(struct tape_device *device,</div><div class='ctx'> 			case MTBSFM:</div><div class='ctx'> 			case MTFSFM:</div><div class='ctx'> 			case MTSEEK:</div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-				device-&gt;blk_data.medium_changed = 1;</div><div class='del'>-#endif</div><div class='ctx'> 				if (device-&gt;required_tapemarks)</div><div class='ctx'> 					tape_std_terminate_write(device);</div><div class='ctx'> 			default:</div><div class='head'>diff --git a/drivers/s390/char/tape_core.c b/drivers/s390/char/tape_core.c<br/>index b3a3e8e8656e..585618663ba4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/tape_core.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/tape_core.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/tape_core.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/tape_core.c</a></div><div class='hunk'>@@ -401,9 +401,6 @@ tape_generic_online(struct tape_device *device,</div><div class='ctx'> 	rc = tapechar_setup_device(device);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto out_minor;</div><div class='del'>-	rc = tapeblock_setup_device(device);</div><div class='del'>-	if (rc)</div><div class='del'>-		goto out_char;</div><div class='ctx'> </div><div class='ctx'> 	tape_state_set(device, TS_UNUSED);</div><div class='ctx'> </div><div class='hunk'>@@ -411,8 +408,6 @@ tape_generic_online(struct tape_device *device,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-out_char:</div><div class='del'>-	tapechar_cleanup_device(device);</div><div class='ctx'> out_minor:</div><div class='ctx'> 	tape_remove_minor(device);</div><div class='ctx'> out_discipline:</div><div class='hunk'>@@ -426,7 +421,6 @@ out:</div><div class='ctx'> static void</div><div class='ctx'> tape_cleanup_device(struct tape_device *device)</div><div class='ctx'> {</div><div class='del'>-	tapeblock_cleanup_device(device);</div><div class='ctx'> 	tapechar_cleanup_device(device);</div><div class='ctx'> 	device-&gt;discipline-&gt;cleanup_device(device);</div><div class='ctx'> 	module_put(device-&gt;discipline-&gt;owner);</div><div class='hunk'>@@ -785,10 +779,6 @@ __tape_start_io(struct tape_device *device, struct tape_request *request)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_S390_TAPE_BLOCK</div><div class='del'>-	if (request-&gt;op == TO_BLOCK)</div><div class='del'>-		device-&gt;discipline-&gt;check_locate(device, request);</div><div class='del'>-#endif</div><div class='ctx'> 	rc = ccw_device_start(</div><div class='ctx'> 		device-&gt;cdev,</div><div class='ctx'> 		request-&gt;cpaddr,</div><div class='hunk'>@@ -1253,7 +1243,7 @@ __tape_do_irq (struct ccw_device *cdev, unsigned long intparm, struct irb *irb)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Tape device open function used by tape_char &amp; tape_block frontends.</div><div class='add'>+ * Tape device open function used by tape_char frontend.</div><div class='ctx'>  */</div><div class='ctx'> int</div><div class='ctx'> tape_open(struct tape_device *device)</div><div class='hunk'>@@ -1283,7 +1273,7 @@ tape_open(struct tape_device *device)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Tape device release function used by tape_char &amp; tape_block frontends.</div><div class='add'>+ * Tape device release function used by tape_char frontend.</div><div class='ctx'>  */</div><div class='ctx'> int</div><div class='ctx'> tape_release(struct tape_device *device)</div><div class='hunk'>@@ -1344,7 +1334,6 @@ tape_init (void)</div><div class='ctx'> 	DBF_EVENT(3, "tape init\n");</div><div class='ctx'> 	tape_proc_init();</div><div class='ctx'> 	tapechar_init ();</div><div class='del'>-	tapeblock_init ();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1358,7 +1347,6 @@ tape_exit(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Get rid of the frontends */</div><div class='ctx'> 	tapechar_exit();</div><div class='del'>-	tapeblock_exit();</div><div class='ctx'> 	tape_proc_cleanup();</div><div class='ctx'> 	debug_unregister (TAPE_DBF_AREA);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/s390/char/tty3270.c b/drivers/s390/char/tty3270.c<br/>index b43445a55cb6..10ec690197cb 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/char/tty3270.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/char/tty3270.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/char/tty3270.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/char/tty3270.c</a></div><div class='hunk'>@@ -61,7 +61,7 @@ struct tty3270_line {</div><div class='ctx'>  */</div><div class='ctx'> struct tty3270 {</div><div class='ctx'> 	struct raw3270_view view;</div><div class='del'>-	struct tty_struct *tty;		/* Pointer to tty structure */</div><div class='add'>+	struct tty_port port;</div><div class='ctx'> 	void **freemem_pages;		/* Array of pages used for freemem. */</div><div class='ctx'> 	struct list_head freemem;	/* List of free memory for strings. */</div><div class='ctx'> </div><div class='hunk'>@@ -324,9 +324,8 @@ tty3270_blank_line(struct tty3270 *tp)</div><div class='ctx'> static void</div><div class='ctx'> tty3270_write_callback(struct raw3270_request *rq, void *data)</div><div class='ctx'> {</div><div class='del'>-	struct tty3270 *tp;</div><div class='add'>+	struct tty3270 *tp = container_of(rq-&gt;view, struct tty3270, view);</div><div class='ctx'> </div><div class='del'>-	tp = (struct tty3270 *) rq-&gt;view;</div><div class='ctx'> 	if (rq-&gt;rc != 0) {</div><div class='ctx'> 		/* Write wasn't successful. Refresh all. */</div><div class='ctx'> 		tp-&gt;update_flags = TTY_UPDATE_ALL;</div><div class='hunk'>@@ -450,10 +449,9 @@ tty3270_rcl_add(struct tty3270 *tp, char *input, int len)</div><div class='ctx'> static void</div><div class='ctx'> tty3270_rcl_backward(struct kbd_data *kbd)</div><div class='ctx'> {</div><div class='del'>-	struct tty3270 *tp;</div><div class='add'>+	struct tty3270 *tp = container_of(kbd-&gt;port, struct tty3270, port);</div><div class='ctx'> 	struct string *s;</div><div class='ctx'> </div><div class='del'>-	tp = kbd-&gt;tty-&gt;driver_data;</div><div class='ctx'> 	spin_lock_bh(&amp;tp-&gt;view.lock);</div><div class='ctx'> 	if (tp-&gt;inattr == TF_INPUT) {</div><div class='ctx'> 		if (tp-&gt;rcl_walk &amp;&amp; tp-&gt;rcl_walk-&gt;prev != &amp;tp-&gt;rcl_lines)</div><div class='hunk'>@@ -478,9 +476,8 @@ tty3270_rcl_backward(struct kbd_data *kbd)</div><div class='ctx'> static void</div><div class='ctx'> tty3270_exit_tty(struct kbd_data *kbd)</div><div class='ctx'> {</div><div class='del'>-	struct tty3270 *tp;</div><div class='add'>+	struct tty3270 *tp = container_of(kbd-&gt;port, struct tty3270, port);</div><div class='ctx'> </div><div class='del'>-	tp = kbd-&gt;tty-&gt;driver_data;</div><div class='ctx'> 	raw3270_deactivate_view(&amp;tp-&gt;view);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -490,10 +487,9 @@ tty3270_exit_tty(struct kbd_data *kbd)</div><div class='ctx'> static void</div><div class='ctx'> tty3270_scroll_forward(struct kbd_data *kbd)</div><div class='ctx'> {</div><div class='del'>-	struct tty3270 *tp;</div><div class='add'>+	struct tty3270 *tp = container_of(kbd-&gt;port, struct tty3270, port);</div><div class='ctx'> 	int nr_up;</div><div class='ctx'> </div><div class='del'>-	tp = kbd-&gt;tty-&gt;driver_data;</div><div class='ctx'> 	spin_lock_bh(&amp;tp-&gt;view.lock);</div><div class='ctx'> 	nr_up = tp-&gt;nr_up - tp-&gt;view.rows + 2;</div><div class='ctx'> 	if (nr_up &lt; 0)</div><div class='hunk'>@@ -513,10 +509,9 @@ tty3270_scroll_forward(struct kbd_data *kbd)</div><div class='ctx'> static void</div><div class='ctx'> tty3270_scroll_backward(struct kbd_data *kbd)</div><div class='ctx'> {</div><div class='del'>-	struct tty3270 *tp;</div><div class='add'>+	struct tty3270 *tp = container_of(kbd-&gt;port, struct tty3270, port);</div><div class='ctx'> 	int nr_up;</div><div class='ctx'> </div><div class='del'>-	tp = kbd-&gt;tty-&gt;driver_data;</div><div class='ctx'> 	spin_lock_bh(&amp;tp-&gt;view.lock);</div><div class='ctx'> 	nr_up = tp-&gt;nr_up + tp-&gt;view.rows - 2;</div><div class='ctx'> 	if (nr_up + tp-&gt;view.rows - 2 &gt; tp-&gt;nr_lines)</div><div class='hunk'>@@ -537,11 +532,10 @@ static void</div><div class='ctx'> tty3270_read_tasklet(struct raw3270_request *rrq)</div><div class='ctx'> {</div><div class='ctx'> 	static char kreset_data = TW_KR;</div><div class='del'>-	struct tty3270 *tp;</div><div class='add'>+	struct tty3270 *tp = container_of(rrq-&gt;view, struct tty3270, view);</div><div class='ctx'> 	char *input;</div><div class='ctx'> 	int len;</div><div class='ctx'> </div><div class='del'>-	tp = (struct tty3270 *) rrq-&gt;view;</div><div class='ctx'> 	spin_lock_bh(&amp;tp-&gt;view.lock);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Two AID keys are special: For 0x7d (enter) the input line</div><div class='hunk'>@@ -577,13 +571,10 @@ tty3270_read_tasklet(struct raw3270_request *rrq)</div><div class='ctx'> 	raw3270_request_add_data(tp-&gt;kreset, &amp;kreset_data, 1);</div><div class='ctx'> 	raw3270_start(&amp;tp-&gt;view, tp-&gt;kreset);</div><div class='ctx'> </div><div class='del'>-	/* Emit input string. */</div><div class='del'>-	if (tp-&gt;tty) {</div><div class='del'>-		while (len-- &gt; 0)</div><div class='del'>-			kbd_keycode(tp-&gt;kbd, *input++);</div><div class='del'>-		/* Emit keycode for AID byte. */</div><div class='del'>-		kbd_keycode(tp-&gt;kbd, 256 + tp-&gt;input-&gt;string[0]);</div><div class='del'>-	}</div><div class='add'>+	while (len-- &gt; 0)</div><div class='add'>+		kbd_keycode(tp-&gt;kbd, *input++);</div><div class='add'>+	/* Emit keycode for AID byte. */</div><div class='add'>+	kbd_keycode(tp-&gt;kbd, 256 + tp-&gt;input-&gt;string[0]);</div><div class='ctx'> </div><div class='ctx'> 	raw3270_request_reset(rrq);</div><div class='ctx'> 	xchg(&amp;tp-&gt;read, rrq);</div><div class='hunk'>@@ -596,9 +587,10 @@ tty3270_read_tasklet(struct raw3270_request *rrq)</div><div class='ctx'> static void</div><div class='ctx'> tty3270_read_callback(struct raw3270_request *rq, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct tty3270 *tp = container_of(rq-&gt;view, struct tty3270, view);</div><div class='ctx'> 	raw3270_get_view(rq-&gt;view);</div><div class='ctx'> 	/* Schedule tasklet to pass input to tty. */</div><div class='del'>-	tasklet_schedule(&amp;((struct tty3270 *) rq-&gt;view)-&gt;readlet);</div><div class='add'>+	tasklet_schedule(&amp;tp-&gt;readlet);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -635,9 +627,8 @@ tty3270_issue_read(struct tty3270 *tp, int lock)</div><div class='ctx'> static int</div><div class='ctx'> tty3270_activate(struct raw3270_view *view)</div><div class='ctx'> {</div><div class='del'>-	struct tty3270 *tp;</div><div class='add'>+	struct tty3270 *tp = container_of(view, struct tty3270, view);</div><div class='ctx'> </div><div class='del'>-	tp = (struct tty3270 *) view;</div><div class='ctx'> 	tp-&gt;update_flags = TTY_UPDATE_ALL;</div><div class='ctx'> 	tty3270_set_timer(tp, 1);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -646,9 +637,8 @@ tty3270_activate(struct raw3270_view *view)</div><div class='ctx'> static void</div><div class='ctx'> tty3270_deactivate(struct raw3270_view *view)</div><div class='ctx'> {</div><div class='del'>-	struct tty3270 *tp;</div><div class='add'>+	struct tty3270 *tp = container_of(view, struct tty3270, view);</div><div class='ctx'> </div><div class='del'>-	tp = (struct tty3270 *) view;</div><div class='ctx'> 	del_timer(&amp;tp-&gt;timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -690,6 +680,17 @@ tty3270_alloc_view(void)</div><div class='ctx'> 	if (!tp-&gt;freemem_pages)</div><div class='ctx'> 		goto out_tp;</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;tp-&gt;freemem);</div><div class='add'>+	INIT_LIST_HEAD(&amp;tp-&gt;lines);</div><div class='add'>+	INIT_LIST_HEAD(&amp;tp-&gt;update);</div><div class='add'>+	INIT_LIST_HEAD(&amp;tp-&gt;rcl_lines);</div><div class='add'>+	tp-&gt;rcl_max = 20;</div><div class='add'>+	tty_port_init(&amp;tp-&gt;port);</div><div class='add'>+	setup_timer(&amp;tp-&gt;timer, (void (*)(unsigned long)) tty3270_update,</div><div class='add'>+		    (unsigned long) tp);</div><div class='add'>+	tasklet_init(&amp;tp-&gt;readlet,</div><div class='add'>+		     (void (*)(unsigned long)) tty3270_read_tasklet,</div><div class='add'>+		     (unsigned long) tp-&gt;read);</div><div class='add'>+</div><div class='ctx'> 	for (pages = 0; pages &lt; TTY3270_STRING_PAGES; pages++) {</div><div class='ctx'> 		tp-&gt;freemem_pages[pages] = (void *)</div><div class='ctx'> 			__get_free_pages(GFP_KERNEL|GFP_DMA, 0);</div><div class='hunk'>@@ -794,16 +795,15 @@ tty3270_free_screen(struct tty3270 *tp)</div><div class='ctx'> static void</div><div class='ctx'> tty3270_release(struct raw3270_view *view)</div><div class='ctx'> {</div><div class='del'>-	struct tty3270 *tp;</div><div class='del'>-	struct tty_struct *tty;</div><div class='add'>+	struct tty3270 *tp = container_of(view, struct tty3270, view);</div><div class='add'>+	struct tty_struct *tty = tty_port_tty_get(&amp;tp-&gt;port);</div><div class='ctx'> </div><div class='del'>-	tp = (struct tty3270 *) view;</div><div class='del'>-	tty = tp-&gt;tty;</div><div class='ctx'> 	if (tty) {</div><div class='ctx'> 		tty-&gt;driver_data = NULL;</div><div class='del'>-		tp-&gt;tty = tp-&gt;kbd-&gt;tty = NULL;</div><div class='add'>+		tty_port_tty_set(&amp;tp-&gt;port, NULL);</div><div class='ctx'> 		tty_hangup(tty);</div><div class='ctx'> 		raw3270_put_view(&amp;tp-&gt;view);</div><div class='add'>+		tty_kref_put(tty);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -813,8 +813,9 @@ tty3270_release(struct raw3270_view *view)</div><div class='ctx'> static void</div><div class='ctx'> tty3270_free(struct raw3270_view *view)</div><div class='ctx'> {</div><div class='del'>-	tty3270_free_screen((struct tty3270 *) view);</div><div class='del'>-	tty3270_free_view((struct tty3270 *) view);</div><div class='add'>+	struct tty3270 *tp = container_of(view, struct tty3270, view);</div><div class='add'>+	tty3270_free_screen(tp);</div><div class='add'>+	tty3270_free_view(tp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -823,14 +824,13 @@ tty3270_free(struct raw3270_view *view)</div><div class='ctx'> static void</div><div class='ctx'> tty3270_del_views(void)</div><div class='ctx'> {</div><div class='del'>-	struct tty3270 *tp;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; tty3270_max_index; i++) {</div><div class='del'>-		tp = (struct tty3270 *)</div><div class='add'>+		struct raw3270_view *view =</div><div class='ctx'> 			raw3270_find_view(&amp;tty3270_fn, i + RAW3270_FIRSTMINOR);</div><div class='del'>-		if (!IS_ERR(tp))</div><div class='del'>-			raw3270_del_view(&amp;tp-&gt;view);</div><div class='add'>+		if (!IS_ERR(view))</div><div class='add'>+			raw3270_del_view(view);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -848,22 +848,23 @@ static struct raw3270_fn tty3270_fn = {</div><div class='ctx'> static int</div><div class='ctx'> tty3270_open(struct tty_struct *tty, struct file * filp)</div><div class='ctx'> {</div><div class='add'>+	struct raw3270_view *view;</div><div class='ctx'> 	struct tty3270 *tp;</div><div class='ctx'> 	int i, rc;</div><div class='ctx'> </div><div class='ctx'> 	if (tty-&gt;count &gt; 1)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	/* Check if the tty3270 is already there. */</div><div class='del'>-	tp = (struct tty3270 *)</div><div class='del'>-		raw3270_find_view(&amp;tty3270_fn,</div><div class='add'>+	view = raw3270_find_view(&amp;tty3270_fn,</div><div class='ctx'> 				  tty-&gt;index + RAW3270_FIRSTMINOR);</div><div class='del'>-	if (!IS_ERR(tp)) {</div><div class='add'>+	if (!IS_ERR(view)) {</div><div class='add'>+		tp = container_of(view, struct tty3270, view);</div><div class='ctx'> 		tty-&gt;driver_data = tp;</div><div class='ctx'> 		tty-&gt;winsize.ws_row = tp-&gt;view.rows - 2;</div><div class='ctx'> 		tty-&gt;winsize.ws_col = tp-&gt;view.cols;</div><div class='ctx'> 		tty-&gt;low_latency = 0;</div><div class='del'>-		tp-&gt;tty = tty;</div><div class='del'>-		tp-&gt;kbd-&gt;tty = tty;</div><div class='add'>+		/* why to reassign? */</div><div class='add'>+		tty_port_tty_set(&amp;tp-&gt;port, tty);</div><div class='ctx'> 		tp-&gt;inattr = TF_INPUT;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -871,7 +872,7 @@ tty3270_open(struct tty_struct *tty, struct file * filp)</div><div class='ctx'> 		tty3270_max_index = tty-&gt;index + 1;</div><div class='ctx'> </div><div class='ctx'> 	/* Quick exit if there is no device for tty-&gt;index. */</div><div class='del'>-	if (PTR_ERR(tp) == -ENODEV)</div><div class='add'>+	if (PTR_ERR(view) == -ENODEV)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate tty3270 structure on first open. */</div><div class='hunk'>@@ -879,16 +880,6 @@ tty3270_open(struct tty_struct *tty, struct file * filp)</div><div class='ctx'> 	if (IS_ERR(tp))</div><div class='ctx'> 		return PTR_ERR(tp);</div><div class='ctx'> </div><div class='del'>-	INIT_LIST_HEAD(&amp;tp-&gt;lines);</div><div class='del'>-	INIT_LIST_HEAD(&amp;tp-&gt;update);</div><div class='del'>-	INIT_LIST_HEAD(&amp;tp-&gt;rcl_lines);</div><div class='del'>-	tp-&gt;rcl_max = 20;</div><div class='del'>-	setup_timer(&amp;tp-&gt;timer, (void (*)(unsigned long)) tty3270_update,</div><div class='del'>-		    (unsigned long) tp);</div><div class='del'>-	tasklet_init(&amp;tp-&gt;readlet, </div><div class='del'>-		     (void (*)(unsigned long)) tty3270_read_tasklet,</div><div class='del'>-		     (unsigned long) tp-&gt;read);</div><div class='del'>-</div><div class='ctx'> 	rc = raw3270_add_view(&amp;tp-&gt;view, &amp;tty3270_fn,</div><div class='ctx'> 			      tty-&gt;index + RAW3270_FIRSTMINOR);</div><div class='ctx'> 	if (rc) {</div><div class='hunk'>@@ -903,7 +894,7 @@ tty3270_open(struct tty_struct *tty, struct file * filp)</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tp-&gt;tty = tty;</div><div class='add'>+	tty_port_tty_set(&amp;tp-&gt;port, tty);</div><div class='ctx'> 	tty-&gt;low_latency = 0;</div><div class='ctx'> 	tty-&gt;driver_data = tp;</div><div class='ctx'> 	tty-&gt;winsize.ws_row = tp-&gt;view.rows - 2;</div><div class='hunk'>@@ -917,7 +908,7 @@ tty3270_open(struct tty_struct *tty, struct file * filp)</div><div class='ctx'> 	for (i = 0; i &lt; tp-&gt;view.rows - 2; i++)</div><div class='ctx'> 		tty3270_blank_line(tp);</div><div class='ctx'> </div><div class='del'>-	tp-&gt;kbd-&gt;tty = tty;</div><div class='add'>+	tp-&gt;kbd-&gt;port = &amp;tp-&gt;port;</div><div class='ctx'> 	tp-&gt;kbd-&gt;fn_handler[KVAL(K_INCRCONSOLE)] = tty3270_exit_tty;</div><div class='ctx'> 	tp-&gt;kbd-&gt;fn_handler[KVAL(K_SCROLLBACK)] = tty3270_scroll_backward;</div><div class='ctx'> 	tp-&gt;kbd-&gt;fn_handler[KVAL(K_SCROLLFORW)] = tty3270_scroll_forward;</div><div class='hunk'>@@ -935,14 +926,13 @@ tty3270_open(struct tty_struct *tty, struct file * filp)</div><div class='ctx'> static void</div><div class='ctx'> tty3270_close(struct tty_struct *tty, struct file * filp)</div><div class='ctx'> {</div><div class='del'>-	struct tty3270 *tp;</div><div class='add'>+	struct tty3270 *tp = tty-&gt;driver_data;</div><div class='ctx'> </div><div class='ctx'> 	if (tty-&gt;count &gt; 1)</div><div class='ctx'> 		return;</div><div class='del'>-	tp = (struct tty3270 *) tty-&gt;driver_data;</div><div class='ctx'> 	if (tp) {</div><div class='ctx'> 		tty-&gt;driver_data = NULL;</div><div class='del'>-		tp-&gt;tty = tp-&gt;kbd-&gt;tty = NULL;</div><div class='add'>+		tty_port_tty_set(&amp;tp-&gt;port, NULL);</div><div class='ctx'> 		raw3270_put_view(&amp;tp-&gt;view);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1391,7 +1381,7 @@ tty3270_escape_sequence(struct tty3270 *tp, char ch)</div><div class='ctx'> 			tty3270_lf(tp);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 'Z':		/* Respond ID. */</div><div class='del'>-			kbd_puts_queue(tp-&gt;tty, "\033[?6c");</div><div class='add'>+			kbd_puts_queue(&amp;tp-&gt;port, "\033[?6c");</div><div class='ctx'> 			break;</div><div class='ctx'> 		case '7':		/* Save cursor position. */</div><div class='ctx'> 			tp-&gt;saved_cx = tp-&gt;cx;</div><div class='hunk'>@@ -1437,11 +1427,11 @@ tty3270_escape_sequence(struct tty3270 *tp, char ch)</div><div class='ctx'> 	tp-&gt;esc_state = ESnormal;</div><div class='ctx'> 	if (ch == 'n' &amp;&amp; !tp-&gt;esc_ques) {</div><div class='ctx'> 		if (tp-&gt;esc_par[0] == 5)		/* Status report. */</div><div class='del'>-			kbd_puts_queue(tp-&gt;tty, "\033[0n");</div><div class='add'>+			kbd_puts_queue(&amp;tp-&gt;port, "\033[0n");</div><div class='ctx'> 		else if (tp-&gt;esc_par[0] == 6) {	/* Cursor report. */</div><div class='ctx'> 			char buf[40];</div><div class='ctx'> 			sprintf(buf, "\033[%d;%dR", tp-&gt;cy + 1, tp-&gt;cx + 1);</div><div class='del'>-			kbd_puts_queue(tp-&gt;tty, buf);</div><div class='add'>+			kbd_puts_queue(&amp;tp-&gt;port, buf);</div><div class='ctx'> 		}</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1513,12 +1503,13 @@ tty3270_escape_sequence(struct tty3270 *tp, char ch)</div><div class='ctx'>  * String write routine for 3270 ttys</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='del'>-tty3270_do_write(struct tty3270 *tp, const unsigned char *buf, int count)</div><div class='add'>+tty3270_do_write(struct tty3270 *tp, struct tty_struct *tty,</div><div class='add'>+		const unsigned char *buf, int count)</div><div class='ctx'> {</div><div class='ctx'> 	int i_msg, i;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;tp-&gt;view.lock);</div><div class='del'>-	for (i_msg = 0; !tp-&gt;tty-&gt;stopped &amp;&amp; i_msg &lt; count; i_msg++) {</div><div class='add'>+	for (i_msg = 0; !tty-&gt;stopped &amp;&amp; i_msg &lt; count; i_msg++) {</div><div class='ctx'> 		if (tp-&gt;esc_state != 0) {</div><div class='ctx'> 			/* Continue escape sequence. */</div><div class='ctx'> 			tty3270_escape_sequence(tp, buf[i_msg]);</div><div class='hunk'>@@ -1595,10 +1586,10 @@ tty3270_write(struct tty_struct * tty,</div><div class='ctx'> 	if (!tp)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	if (tp-&gt;char_count &gt; 0) {</div><div class='del'>-		tty3270_do_write(tp, tp-&gt;char_buf, tp-&gt;char_count);</div><div class='add'>+		tty3270_do_write(tp, tty, tp-&gt;char_buf, tp-&gt;char_count);</div><div class='ctx'> 		tp-&gt;char_count = 0;</div><div class='ctx'> 	}</div><div class='del'>-	tty3270_do_write(tp, buf, count);</div><div class='add'>+	tty3270_do_write(tp, tty, buf, count);</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1629,7 +1620,7 @@ tty3270_flush_chars(struct tty_struct *tty)</div><div class='ctx'> 	if (!tp)</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (tp-&gt;char_count &gt; 0) {</div><div class='del'>-		tty3270_do_write(tp, tp-&gt;char_buf, tp-&gt;char_count);</div><div class='add'>+		tty3270_do_write(tp, tty, tp-&gt;char_buf, tp-&gt;char_count);</div><div class='ctx'> 		tp-&gt;char_count = 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/s390/cio/ccwgroup.c b/drivers/s390/cio/ccwgroup.c<br/>index 5f1dc6fb5708..731470e68493 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/cio/ccwgroup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/cio/ccwgroup.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/cio/ccwgroup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/cio/ccwgroup.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  *  bus driver for ccwgroup</div><div class='ctx'>  *</div><div class='del'>- *  Copyright IBM Corp. 2002, 2009</div><div class='add'>+ *  Copyright IBM Corp. 2002, 2012</div><div class='ctx'>  *</div><div class='ctx'>  *  Author(s): Arnd Bergmann (arndb@de.ibm.com)</div><div class='ctx'>  *	       Cornelia Huck (cornelia.huck@de.ibm.com)</div><div class='hunk'>@@ -15,10 +15,13 @@</div><div class='ctx'> #include &lt;linux/ctype.h&gt;</div><div class='ctx'> #include &lt;linux/dcache.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/cio.h&gt;</div><div class='ctx'> #include &lt;asm/ccwdev.h&gt;</div><div class='ctx'> #include &lt;asm/ccwgroup.h&gt;</div><div class='ctx'> </div><div class='del'>-#define CCW_BUS_ID_SIZE		20</div><div class='add'>+#include "device.h"</div><div class='add'>+</div><div class='add'>+#define CCW_BUS_ID_SIZE		10</div><div class='ctx'> </div><div class='ctx'> /* In Linux 2.4, we had a channel device layer called "chandev"</div><div class='ctx'>  * that did all sorts of obscure stuff for networking devices.</div><div class='hunk'>@@ -27,19 +30,6 @@</div><div class='ctx'>  * to devices that use multiple subchannels.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/* a device matches a driver if all its slave devices match the same</div><div class='del'>- * entry of the driver */</div><div class='del'>-static int ccwgroup_bus_match(struct device *dev, struct device_driver * drv)</div><div class='del'>-{</div><div class='del'>-	struct ccwgroup_device *gdev = to_ccwgroupdev(dev);</div><div class='del'>-	struct ccwgroup_driver *gdrv = to_ccwgroupdrv(drv);</div><div class='del'>-</div><div class='del'>-	if (gdev-&gt;creator_id == gdrv-&gt;driver_id)</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct bus_type ccwgroup_bus_type;</div><div class='ctx'> </div><div class='ctx'> static void __ccwgroup_remove_symlinks(struct ccwgroup_device *gdev)</div><div class='hunk'>@@ -254,9 +244,10 @@ static int __ccwgroup_create_symlinks(struct ccwgroup_device *gdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __get_next_bus_id(const char **buf, char *bus_id)</div><div class='add'>+static int __get_next_id(const char **buf, struct ccw_dev_id *id)</div><div class='ctx'> {</div><div class='del'>-	int rc, len;</div><div class='add'>+	unsigned int cssid, ssid, devno;</div><div class='add'>+	int ret = 0, len;</div><div class='ctx'> 	char *start, *end;</div><div class='ctx'> </div><div class='ctx'> 	start = (char *)*buf;</div><div class='hunk'>@@ -271,49 +262,40 @@ static int __get_next_bus_id(const char **buf, char *bus_id)</div><div class='ctx'> 		len = end - start + 1;</div><div class='ctx'> 		end++;</div><div class='ctx'> 	}</div><div class='del'>-	if (len &lt; CCW_BUS_ID_SIZE) {</div><div class='del'>-		strlcpy(bus_id, start, len);</div><div class='del'>-		rc = 0;</div><div class='add'>+	if (len &lt;= CCW_BUS_ID_SIZE) {</div><div class='add'>+		if (sscanf(start, "%2x.%1x.%04x", &amp;cssid, &amp;ssid, &amp;devno) != 3)</div><div class='add'>+			ret = -EINVAL;</div><div class='ctx'> 	} else</div><div class='del'>-		rc = -EINVAL;</div><div class='del'>-	*buf = end;</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __is_valid_bus_id(char bus_id[CCW_BUS_ID_SIZE])</div><div class='del'>-{</div><div class='del'>-	int cssid, ssid, devno;</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* Must be of form %x.%x.%04x */</div><div class='del'>-	if (sscanf(bus_id, "%x.%1x.%04x", &amp;cssid, &amp;ssid, &amp;devno) != 3)</div><div class='del'>-		return 0;</div><div class='del'>-	return 1;</div><div class='add'>+	if (!ret) {</div><div class='add'>+		id-&gt;ssid = ssid;</div><div class='add'>+		id-&gt;devno = devno;</div><div class='add'>+	}</div><div class='add'>+	*buf = end;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ccwgroup_create_from_string() - create and register a ccw group device</div><div class='del'>- * @root: parent device for the new device</div><div class='del'>- * @creator_id: identifier of creating driver</div><div class='del'>- * @cdrv: ccw driver of slave devices</div><div class='add'>+ * ccwgroup_create_dev() - create and register a ccw group device</div><div class='add'>+ * @parent: parent device for the new device</div><div class='add'>+ * @gdrv: driver for the new group device</div><div class='ctx'>  * @num_devices: number of slave devices</div><div class='ctx'>  * @buf: buffer containing comma separated bus ids of slave devices</div><div class='ctx'>  *</div><div class='del'>- * Create and register a new ccw group device as a child of @root. Slave</div><div class='del'>- * devices are obtained from the list of bus ids given in @buf and must all</div><div class='del'>- * belong to @cdrv.</div><div class='add'>+ * Create and register a new ccw group device as a child of @parent. Slave</div><div class='add'>+ * devices are obtained from the list of bus ids given in @buf.</div><div class='ctx'>  * Returns:</div><div class='ctx'>  *  %0 on success and an error code on failure.</div><div class='ctx'>  * Context:</div><div class='ctx'>  *  non-atomic</div><div class='ctx'>  */</div><div class='del'>-int ccwgroup_create_from_string(struct device *root, unsigned int creator_id,</div><div class='del'>-				struct ccw_driver *cdrv, int num_devices,</div><div class='del'>-				const char *buf)</div><div class='add'>+int ccwgroup_create_dev(struct device *parent, struct ccwgroup_driver *gdrv,</div><div class='add'>+			int num_devices, const char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct ccwgroup_device *gdev;</div><div class='add'>+	struct ccw_dev_id dev_id;</div><div class='ctx'> 	int rc, i;</div><div class='del'>-	char tmp_bus_id[CCW_BUS_ID_SIZE];</div><div class='del'>-	const char *curr_buf;</div><div class='ctx'> </div><div class='ctx'> 	gdev = kzalloc(sizeof(*gdev) + num_devices * sizeof(gdev-&gt;cdev[0]),</div><div class='ctx'> 		       GFP_KERNEL);</div><div class='hunk'>@@ -323,29 +305,24 @@ int ccwgroup_create_from_string(struct device *root, unsigned int creator_id,</div><div class='ctx'> 	atomic_set(&amp;gdev-&gt;onoff, 0);</div><div class='ctx'> 	mutex_init(&amp;gdev-&gt;reg_mutex);</div><div class='ctx'> 	mutex_lock(&amp;gdev-&gt;reg_mutex);</div><div class='del'>-	gdev-&gt;creator_id = creator_id;</div><div class='ctx'> 	gdev-&gt;count = num_devices;</div><div class='ctx'> 	gdev-&gt;dev.bus = &amp;ccwgroup_bus_type;</div><div class='del'>-	gdev-&gt;dev.parent = root;</div><div class='add'>+	gdev-&gt;dev.parent = parent;</div><div class='ctx'> 	gdev-&gt;dev.release = ccwgroup_release;</div><div class='ctx'> 	device_initialize(&amp;gdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	curr_buf = buf;</div><div class='del'>-	for (i = 0; i &lt; num_devices &amp;&amp; curr_buf; i++) {</div><div class='del'>-		rc = __get_next_bus_id(&amp;curr_buf, tmp_bus_id);</div><div class='add'>+	for (i = 0; i &lt; num_devices &amp;&amp; buf; i++) {</div><div class='add'>+		rc = __get_next_id(&amp;buf, &amp;dev_id);</div><div class='ctx'> 		if (rc != 0)</div><div class='ctx'> 			goto error;</div><div class='del'>-		if (!__is_valid_bus_id(tmp_bus_id)) {</div><div class='del'>-			rc = -EINVAL;</div><div class='del'>-			goto error;</div><div class='del'>-		}</div><div class='del'>-		gdev-&gt;cdev[i] = get_ccwdev_by_busid(cdrv, tmp_bus_id);</div><div class='add'>+		gdev-&gt;cdev[i] = get_ccwdev_by_dev_id(&amp;dev_id);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * All devices have to be of the same type in</div><div class='ctx'> 		 * order to be grouped.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!gdev-&gt;cdev[i]</div><div class='del'>-		    || gdev-&gt;cdev[i]-&gt;id.driver_info !=</div><div class='add'>+		if (!gdev-&gt;cdev[i] || !gdev-&gt;cdev[i]-&gt;drv ||</div><div class='add'>+		    gdev-&gt;cdev[i]-&gt;drv != gdev-&gt;cdev[0]-&gt;drv ||</div><div class='add'>+		    gdev-&gt;cdev[i]-&gt;id.driver_info !=</div><div class='ctx'> 		    gdev-&gt;cdev[0]-&gt;id.driver_info) {</div><div class='ctx'> 			rc = -EINVAL;</div><div class='ctx'> 			goto error;</div><div class='hunk'>@@ -361,18 +338,25 @@ int ccwgroup_create_from_string(struct device *root, unsigned int creator_id,</div><div class='ctx'> 		spin_unlock_irq(gdev-&gt;cdev[i]-&gt;ccwlock);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Check for sufficient number of bus ids. */</div><div class='del'>-	if (i &lt; num_devices &amp;&amp; !curr_buf) {</div><div class='add'>+	if (i &lt; num_devices) {</div><div class='ctx'> 		rc = -EINVAL;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Check for trailing stuff. */</div><div class='del'>-	if (i == num_devices &amp;&amp; strlen(curr_buf) &gt; 0) {</div><div class='add'>+	if (i == num_devices &amp;&amp; strlen(buf) &gt; 0) {</div><div class='ctx'> 		rc = -EINVAL;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_set_name(&amp;gdev-&gt;dev, "%s", dev_name(&amp;gdev-&gt;cdev[0]-&gt;dev));</div><div class='ctx'> 	gdev-&gt;dev.groups = ccwgroup_attr_groups;</div><div class='add'>+</div><div class='add'>+	if (gdrv) {</div><div class='add'>+		gdev-&gt;dev.driver = &amp;gdrv-&gt;driver;</div><div class='add'>+		rc = gdrv-&gt;setup ? gdrv-&gt;setup(gdev) : 0;</div><div class='add'>+		if (rc)</div><div class='add'>+			goto error;</div><div class='add'>+	}</div><div class='ctx'> 	rc = device_add(&amp;gdev-&gt;dev);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto error;</div><div class='hunk'>@@ -397,7 +381,7 @@ error:</div><div class='ctx'> 	put_device(&amp;gdev-&gt;dev);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(ccwgroup_create_from_string);</div><div class='add'>+EXPORT_SYMBOL(ccwgroup_create_dev);</div><div class='ctx'> </div><div class='ctx'> static int ccwgroup_notifier(struct notifier_block *nb, unsigned long action,</div><div class='ctx'> 			     void *data)</div><div class='hunk'>@@ -440,14 +424,6 @@ module_exit(cleanup_ccwgroup);</div><div class='ctx'> </div><div class='ctx'> /************************** driver stuff ******************************/</div><div class='ctx'> </div><div class='del'>-static int ccwgroup_probe(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct ccwgroup_device *gdev = to_ccwgroupdev(dev);</div><div class='del'>-	struct ccwgroup_driver *gdrv = to_ccwgroupdrv(dev-&gt;driver);</div><div class='del'>-</div><div class='del'>-	return gdrv-&gt;probe ? gdrv-&gt;probe(gdev) : -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ccwgroup_remove(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ccwgroup_device *gdev = to_ccwgroupdev(dev);</div><div class='hunk'>@@ -542,8 +518,6 @@ static const struct dev_pm_ops ccwgroup_pm_ops = {</div><div class='ctx'> </div><div class='ctx'> static struct bus_type ccwgroup_bus_type = {</div><div class='ctx'> 	.name   = "ccwgroup",</div><div class='del'>-	.match  = ccwgroup_bus_match,</div><div class='del'>-	.probe  = ccwgroup_probe,</div><div class='ctx'> 	.remove = ccwgroup_remove,</div><div class='ctx'> 	.shutdown = ccwgroup_shutdown,</div><div class='ctx'> 	.pm = &amp;ccwgroup_pm_ops,</div><div class='head'>diff --git a/drivers/s390/cio/cio.c b/drivers/s390/cio/cio.c<br/>index a49c46c91983..a6ddaed8793d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/cio/cio.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/cio/cio.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/cio/cio.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/cio/cio.c</a></div><div class='hunk'>@@ -656,51 +656,34 @@ static struct io_subchannel_private console_priv;</div><div class='ctx'> static int console_subchannel_in_use;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Use cio_tpi to get a pending interrupt and call the interrupt handler.</div><div class='del'>- * Return non-zero if an interrupt was processed, zero otherwise.</div><div class='add'>+ * Use cio_tsch to update the subchannel status and call the interrupt handler</div><div class='add'>+ * if status had been pending. Called with the console_subchannel lock.</div><div class='ctx'>  */</div><div class='del'>-static int cio_tpi(void)</div><div class='add'>+static void cio_tsch(struct subchannel *sch)</div><div class='ctx'> {</div><div class='del'>-	struct tpi_info *tpi_info;</div><div class='del'>-	struct subchannel *sch;</div><div class='ctx'> 	struct irb *irb;</div><div class='ctx'> 	int irq_context;</div><div class='ctx'> </div><div class='del'>-	tpi_info = (struct tpi_info *)&amp;S390_lowcore.subchannel_id;</div><div class='del'>-	if (tpi(NULL) != 1)</div><div class='del'>-		return 0;</div><div class='del'>-	kstat_cpu(smp_processor_id()).irqs[IO_INTERRUPT]++;</div><div class='del'>-	if (tpi_info-&gt;adapter_IO) {</div><div class='del'>-		do_adapter_IO(tpi_info-&gt;isc);</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='ctx'> 	irb = (struct irb *)&amp;S390_lowcore.irb;</div><div class='ctx'> 	/* Store interrupt response block to lowcore. */</div><div class='del'>-	if (tsch(tpi_info-&gt;schid, irb) != 0) {</div><div class='add'>+	if (tsch(sch-&gt;schid, irb) != 0)</div><div class='ctx'> 		/* Not status pending or not operational. */</div><div class='del'>-		kstat_cpu(smp_processor_id()).irqs[IOINT_CIO]++;</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	sch = (struct subchannel *)(unsigned long)tpi_info-&gt;intparm;</div><div class='del'>-	if (!sch) {</div><div class='del'>-		kstat_cpu(smp_processor_id()).irqs[IOINT_CIO]++;</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='add'>+		return;</div><div class='add'>+	memcpy(&amp;sch-&gt;schib.scsw, &amp;irb-&gt;scsw, sizeof(union scsw));</div><div class='add'>+	/* Call interrupt handler with updated status. */</div><div class='ctx'> 	irq_context = in_interrupt();</div><div class='del'>-	if (!irq_context)</div><div class='add'>+	if (!irq_context) {</div><div class='ctx'> 		local_bh_disable();</div><div class='del'>-	irq_enter();</div><div class='del'>-	spin_lock(sch-&gt;lock);</div><div class='del'>-	memcpy(&amp;sch-&gt;schib.scsw, &amp;irb-&gt;scsw, sizeof(union scsw));</div><div class='add'>+		irq_enter();</div><div class='add'>+	}</div><div class='ctx'> 	if (sch-&gt;driver &amp;&amp; sch-&gt;driver-&gt;irq)</div><div class='ctx'> 		sch-&gt;driver-&gt;irq(sch);</div><div class='ctx'> 	else</div><div class='ctx'> 		kstat_cpu(smp_processor_id()).irqs[IOINT_CIO]++;</div><div class='del'>-	spin_unlock(sch-&gt;lock);</div><div class='del'>-	irq_exit();</div><div class='del'>-	if (!irq_context)</div><div class='add'>+	if (!irq_context) {</div><div class='add'>+		irq_exit();</div><div class='ctx'> 		_local_bh_enable();</div><div class='del'>-	return 1;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void *cio_get_console_priv(void)</div><div class='hunk'>@@ -712,34 +695,16 @@ void *cio_get_console_priv(void)</div><div class='ctx'>  * busy wait for the next interrupt on the console</div><div class='ctx'>  */</div><div class='ctx'> void wait_cons_dev(void)</div><div class='del'>-	__releases(console_subchannel.lock)</div><div class='del'>-	__acquires(console_subchannel.lock)</div><div class='ctx'> {</div><div class='del'>-	unsigned long cr6      __attribute__ ((aligned (8)));</div><div class='del'>-	unsigned long save_cr6 __attribute__ ((aligned (8)));</div><div class='del'>-</div><div class='del'>-	/* </div><div class='del'>-	 * before entering the spinlock we may already have</div><div class='del'>-	 * processed the interrupt on a different CPU...</div><div class='del'>-	 */</div><div class='ctx'> 	if (!console_subchannel_in_use)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* disable all but the console isc */</div><div class='del'>-	__ctl_store (save_cr6, 6, 6);</div><div class='del'>-	cr6 = 1UL &lt;&lt; (31 - CONSOLE_ISC);</div><div class='del'>-	__ctl_load (cr6, 6, 6);</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		spin_unlock(console_subchannel.lock);</div><div class='del'>-		if (!cio_tpi())</div><div class='del'>-			cpu_relax();</div><div class='del'>-		spin_lock(console_subchannel.lock);</div><div class='del'>-	} while (console_subchannel.schib.scsw.cmd.actl != 0);</div><div class='del'>-	/*</div><div class='del'>-	 * restore previous isc value</div><div class='del'>-	 */</div><div class='del'>-	__ctl_load (save_cr6, 6, 6);</div><div class='add'>+	while (1) {</div><div class='add'>+		cio_tsch(&amp;console_subchannel);</div><div class='add'>+		if (console_subchannel.schib.scsw.cmd.actl == 0)</div><div class='add'>+			break;</div><div class='add'>+		udelay_simple(100);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='head'>diff --git a/drivers/s390/cio/device.c b/drivers/s390/cio/device.c<br/>index 02d015259461..f8f952d52045 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/cio/device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/cio/device.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/cio/device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/cio/device.c</a></div><div class='hunk'>@@ -695,7 +695,17 @@ static int match_dev_id(struct device *dev, void *data)</div><div class='ctx'> 	return ccw_dev_id_is_equal(&amp;cdev-&gt;private-&gt;dev_id, dev_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct ccw_device *get_ccwdev_by_dev_id(struct ccw_dev_id *dev_id)</div><div class='add'>+/**</div><div class='add'>+ * get_ccwdev_by_dev_id() - obtain device from a ccw device id</div><div class='add'>+ * @dev_id: id of the device to be searched</div><div class='add'>+ *</div><div class='add'>+ * This function searches all devices attached to the ccw bus for a device</div><div class='add'>+ * matching @dev_id.</div><div class='add'>+ * Returns:</div><div class='add'>+ *  If a device is found its reference count is increased and returned;</div><div class='add'>+ *  else %NULL is returned.</div><div class='add'>+ */</div><div class='add'>+struct ccw_device *get_ccwdev_by_dev_id(struct ccw_dev_id *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> </div><div class='hunk'>@@ -703,6 +713,7 @@ static struct ccw_device *get_ccwdev_by_dev_id(struct ccw_dev_id *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	return dev ? to_ccwdev(dev) : NULL;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(get_ccwdev_by_dev_id);</div><div class='ctx'> </div><div class='ctx'> static void ccw_device_do_unbind_bind(struct ccw_device *cdev)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/s390/cio/device.h b/drivers/s390/cio/device.h<br/>index 179824b3082f..6bace6942396 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/cio/device.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/cio/device.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/cio/device.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/cio/device.h</a></div><div class='hunk'>@@ -101,6 +101,7 @@ int ccw_device_test_sense_data(struct ccw_device *);</div><div class='ctx'> void ccw_device_schedule_sch_unregister(struct ccw_device *);</div><div class='ctx'> int ccw_purge_blacklisted(void);</div><div class='ctx'> void ccw_device_sched_todo(struct ccw_device *cdev, enum cdev_todo todo);</div><div class='add'>+struct ccw_device *get_ccwdev_by_dev_id(struct ccw_dev_id *dev_id);</div><div class='ctx'> </div><div class='ctx'> /* Function prototypes for device status and basic sense stuff. */</div><div class='ctx'> void ccw_device_accumulate_irb(struct ccw_device *, struct irb *);</div><div class='head'>diff --git a/drivers/s390/cio/qdio_main.c b/drivers/s390/cio/qdio_main.c<br/>index 35c685c374e9..7493efafa0d5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/cio/qdio_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/cio/qdio_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/cio/qdio_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/cio/qdio_main.c</a></div><div class='hunk'>@@ -63,7 +63,7 @@ static inline int do_siga_input(unsigned long schid, unsigned int mask,</div><div class='ctx'> 		"	ipm	%0\n"</div><div class='ctx'> 		"	srl	%0,28\n"</div><div class='ctx'> 		: "=d" (cc)</div><div class='del'>-		: "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");</div><div class='add'>+		: "d" (__fc), "d" (__schid), "d" (__mask) : "cc");</div><div class='ctx'> 	return cc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -74,7 +74,7 @@ static inline int do_siga_input(unsigned long schid, unsigned int mask,</div><div class='ctx'>  * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer</div><div class='ctx'>  * @fc: function code to perform</div><div class='ctx'>  *</div><div class='del'>- * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.</div><div class='add'>+ * Returns condition code.</div><div class='ctx'>  * Note: For IQDC unicast queues only the highest priority queue is processed.</div><div class='ctx'>  */</div><div class='ctx'> static inline int do_siga_output(unsigned long schid, unsigned long mask,</div><div class='hunk'>@@ -85,18 +85,16 @@ static inline int do_siga_output(unsigned long schid, unsigned long mask,</div><div class='ctx'> 	register unsigned long __schid asm("1") = schid;</div><div class='ctx'> 	register unsigned long __mask asm("2") = mask;</div><div class='ctx'> 	register unsigned long __aob asm("3") = aob;</div><div class='del'>-	int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;</div><div class='add'>+	int cc;</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"	siga	0\n"</div><div class='del'>-		"0:	ipm	%0\n"</div><div class='add'>+		"	ipm	%0\n"</div><div class='ctx'> 		"	srl	%0,28\n"</div><div class='del'>-		"1:\n"</div><div class='del'>-		EX_TABLE(0b, 1b)</div><div class='del'>-		: "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask),</div><div class='del'>-		  "+d" (__aob)</div><div class='del'>-		: : "cc", "memory");</div><div class='del'>-	*bb = ((unsigned int) __fc) &gt;&gt; 31;</div><div class='add'>+		: "=d" (cc), "+d" (__fc), "+d" (__aob)</div><div class='add'>+		: "d" (__schid), "d" (__mask)</div><div class='add'>+		: "cc");</div><div class='add'>+	*bb = __fc &gt;&gt; 31;</div><div class='ctx'> 	return cc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -167,7 +165,7 @@ again:</div><div class='ctx'> </div><div class='ctx'> 	DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));</div><div class='ctx'> 	DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);</div><div class='del'>-	q-&gt;handler(q-&gt;irq_ptr-&gt;cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,</div><div class='add'>+	q-&gt;handler(q-&gt;irq_ptr-&gt;cdev, QDIO_ERROR_GET_BUF_STATE,</div><div class='ctx'> 		   q-&gt;nr, q-&gt;first_to_kick, count, q-&gt;irq_ptr-&gt;int_parm);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -215,7 +213,7 @@ again:</div><div class='ctx'> </div><div class='ctx'> 	DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));</div><div class='ctx'> 	DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);</div><div class='del'>-	q-&gt;handler(q-&gt;irq_ptr-&gt;cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,</div><div class='add'>+	q-&gt;handler(q-&gt;irq_ptr-&gt;cdev, QDIO_ERROR_SET_BUF_STATE,</div><div class='ctx'> 		   q-&gt;nr, q-&gt;first_to_kick, count, q-&gt;irq_ptr-&gt;int_parm);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -313,7 +311,7 @@ static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,</div><div class='ctx'> 	cc = do_siga_sync(schid, output, input, fc);</div><div class='ctx'> 	if (unlikely(cc))</div><div class='ctx'> 		DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);</div><div class='del'>-	return cc;</div><div class='add'>+	return (cc) ? -EIO : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int qdio_siga_sync_q(struct qdio_q *q)</div><div class='hunk'>@@ -384,7 +382,7 @@ static inline int qdio_siga_input(struct qdio_q *q)</div><div class='ctx'> 	cc = do_siga_input(schid, q-&gt;mask, fc);</div><div class='ctx'> 	if (unlikely(cc))</div><div class='ctx'> 		DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);</div><div class='del'>-	return cc;</div><div class='add'>+	return (cc) ? -EIO : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)</div><div class='hunk'>@@ -443,7 +441,7 @@ static void process_buffer_error(struct qdio_q *q, int count)</div><div class='ctx'> 	unsigned char state = (q-&gt;is_input_q) ? SLSB_P_INPUT_NOT_INIT :</div><div class='ctx'> 					SLSB_P_OUTPUT_NOT_INIT;</div><div class='ctx'> </div><div class='del'>-	q-&gt;qdio_error |= QDIO_ERROR_SLSB_STATE;</div><div class='add'>+	q-&gt;qdio_error = QDIO_ERROR_SLSB_STATE;</div><div class='ctx'> </div><div class='ctx'> 	/* special handling for no target buffer empty */</div><div class='ctx'> 	if ((!q-&gt;is_input_q &amp;&amp;</div><div class='hunk'>@@ -519,7 +517,7 @@ static int get_inbound_buffer_frontier(struct qdio_q *q)</div><div class='ctx'> 	int count, stop;</div><div class='ctx'> 	unsigned char state = 0;</div><div class='ctx'> </div><div class='del'>-	q-&gt;timestamp = get_clock_fast();</div><div class='add'>+	q-&gt;timestamp = get_clock();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved</div><div class='hunk'>@@ -575,7 +573,7 @@ static int qdio_inbound_q_moved(struct qdio_q *q)</div><div class='ctx'> </div><div class='ctx'> 	bufnr = get_inbound_buffer_frontier(q);</div><div class='ctx'> </div><div class='del'>-	if ((bufnr != q-&gt;last_move) || q-&gt;qdio_error) {</div><div class='add'>+	if (bufnr != q-&gt;last_move) {</div><div class='ctx'> 		q-&gt;last_move = bufnr;</div><div class='ctx'> 		if (!is_thinint_irq(q-&gt;irq_ptr) &amp;&amp; MACHINE_IS_LPAR)</div><div class='ctx'> 			q-&gt;u.in.timestamp = get_clock();</div><div class='hunk'>@@ -790,7 +788,7 @@ static int get_outbound_buffer_frontier(struct qdio_q *q)</div><div class='ctx'> 	int count, stop;</div><div class='ctx'> 	unsigned char state = 0;</div><div class='ctx'> </div><div class='del'>-	q-&gt;timestamp = get_clock_fast();</div><div class='add'>+	q-&gt;timestamp = get_clock();</div><div class='ctx'> </div><div class='ctx'> 	if (need_siga_sync(q))</div><div class='ctx'> 		if (((queue_type(q) != QDIO_IQDIO_QFMT) &amp;&amp;</div><div class='hunk'>@@ -863,7 +861,7 @@ static inline int qdio_outbound_q_moved(struct qdio_q *q)</div><div class='ctx'> </div><div class='ctx'> 	bufnr = get_outbound_buffer_frontier(q);</div><div class='ctx'> </div><div class='del'>-	if ((bufnr != q-&gt;last_move) || q-&gt;qdio_error) {</div><div class='add'>+	if (bufnr != q-&gt;last_move) {</div><div class='ctx'> 		q-&gt;last_move = bufnr;</div><div class='ctx'> 		DBF_DEV_EVENT(DBF_INFO, q-&gt;irq_ptr, "out moved:%1d", q-&gt;nr);</div><div class='ctx'> 		return 1;</div><div class='hunk'>@@ -894,13 +892,16 @@ retry:</div><div class='ctx'> 				goto retry;</div><div class='ctx'> 			}</div><div class='ctx'> 			DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q-&gt;nr);</div><div class='del'>-			cc |= QDIO_ERROR_SIGA_BUSY;</div><div class='del'>-		} else</div><div class='add'>+			cc = -EBUSY;</div><div class='add'>+		} else {</div><div class='ctx'> 			DBF_DEV_EVENT(DBF_INFO, q-&gt;irq_ptr, "siga-w cc2:%1d", q-&gt;nr);</div><div class='add'>+			cc = -ENOBUFS;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);</div><div class='add'>+		cc = -EIO;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (retries) {</div><div class='hunk'>@@ -1090,7 +1091,7 @@ static void qdio_handle_activate_check(struct ccw_device *cdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	count = sub_buf(q-&gt;first_to_check, q-&gt;first_to_kick);</div><div class='del'>-	q-&gt;handler(q-&gt;irq_ptr-&gt;cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,</div><div class='add'>+	q-&gt;handler(q-&gt;irq_ptr-&gt;cdev, QDIO_ERROR_ACTIVATE,</div><div class='ctx'> 		   q-&gt;nr, q-&gt;first_to_kick, count, irq_ptr-&gt;int_parm);</div><div class='ctx'> no_handler:</div><div class='ctx'> 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);</div><div class='hunk'>@@ -1691,7 +1692,7 @@ int do_QDIO(struct ccw_device *cdev, unsigned int callflags,</div><div class='ctx'> 		      "do%02x b:%02x c:%02x", callflags, bufnr, count);</div><div class='ctx'> </div><div class='ctx'> 	if (irq_ptr-&gt;state != QDIO_IRQ_STATE_ACTIVE)</div><div class='del'>-		return -EBUSY;</div><div class='add'>+		return -EIO;</div><div class='ctx'> 	if (!count)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	if (callflags &amp; QDIO_FLAG_SYNC_INPUT)</div><div class='head'>diff --git a/drivers/s390/crypto/ap_bus.c b/drivers/s390/crypto/ap_bus.c<br/>index 7e9a72eb2fe0..b987d4619586 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/crypto/ap_bus.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/crypto/ap_bus.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/crypto/ap_bus.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/crypto/ap_bus.c</a></div><div class='hunk'>@@ -215,7 +215,7 @@ ap_queue_interruption_control(ap_qid_t qid, void *ind)</div><div class='ctx'> 	register struct ap_queue_status reg1_out asm ("1");</div><div class='ctx'> 	register void *reg2 asm ("2") = ind;</div><div class='ctx'> 	asm volatile(</div><div class='del'>-		".long 0xb2af0000"		/* PQAP(RAPQ) */</div><div class='add'>+		".long 0xb2af0000"		/* PQAP(AQIC) */</div><div class='ctx'> 		: "+d" (reg0), "+d" (reg1_in), "=d" (reg1_out), "+d" (reg2)</div><div class='ctx'> 		:</div><div class='ctx'> 		: "cc" );</div><div class='hunk'>@@ -232,7 +232,7 @@ __ap_query_functions(ap_qid_t qid, unsigned int *functions)</div><div class='ctx'> 	register unsigned long reg2 asm ("2");</div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='del'>-		".long 0xb2af0000\n"</div><div class='add'>+		".long 0xb2af0000\n"		/* PQAP(TAPQ) */</div><div class='ctx'> 		"0:\n"</div><div class='ctx'> 		EX_TABLE(0b, 0b)</div><div class='ctx'> 		: "+d" (reg0), "+d" (reg1), "=d" (reg2)</div><div class='hunk'>@@ -391,7 +391,7 @@ __ap_send(ap_qid_t qid, unsigned long long psmid, void *msg, size_t length,</div><div class='ctx'> 		reg0 |= 0x400000UL;</div><div class='ctx'> </div><div class='ctx'> 	asm volatile (</div><div class='del'>-		"0: .long 0xb2ad0042\n"		/* DQAP */</div><div class='add'>+		"0: .long 0xb2ad0042\n"		/* NQAP */</div><div class='ctx'> 		"   brc   2,0b"</div><div class='ctx'> 		: "+d" (reg0), "=d" (reg1), "+d" (reg2), "+d" (reg3)</div><div class='ctx'> 		: "d" (reg4), "d" (reg5), "m" (*(msgblock *) msg)</div><div class='hunk'>@@ -450,7 +450,7 @@ __ap_recv(ap_qid_t qid, unsigned long long *psmid, void *msg, size_t length)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	asm volatile(</div><div class='del'>-		"0: .long 0xb2ae0064\n"</div><div class='add'>+		"0: .long 0xb2ae0064\n"		/* DQAP */</div><div class='ctx'> 		"   brc   6,0b\n"</div><div class='ctx'> 		: "+d" (reg0), "=d" (reg1), "+d" (reg2),</div><div class='ctx'> 		"+d" (reg4), "+d" (reg5), "+d" (reg6), "+d" (reg7),</div><div class='hunk'>@@ -836,12 +836,12 @@ static void __ap_flush_queue(struct ap_device *ap_dev)</div><div class='ctx'> 	list_for_each_entry_safe(ap_msg, next, &amp;ap_dev-&gt;pendingq, list) {</div><div class='ctx'> 		list_del_init(&amp;ap_msg-&gt;list);</div><div class='ctx'> 		ap_dev-&gt;pendingq_count--;</div><div class='del'>-		ap_dev-&gt;drv-&gt;receive(ap_dev, ap_msg, ERR_PTR(-ENODEV));</div><div class='add'>+		ap_msg-&gt;receive(ap_dev, ap_msg, ERR_PTR(-ENODEV));</div><div class='ctx'> 	}</div><div class='ctx'> 	list_for_each_entry_safe(ap_msg, next, &amp;ap_dev-&gt;requestq, list) {</div><div class='ctx'> 		list_del_init(&amp;ap_msg-&gt;list);</div><div class='ctx'> 		ap_dev-&gt;requestq_count--;</div><div class='del'>-		ap_dev-&gt;drv-&gt;receive(ap_dev, ap_msg, ERR_PTR(-ENODEV));</div><div class='add'>+		ap_msg-&gt;receive(ap_dev, ap_msg, ERR_PTR(-ENODEV));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1329,7 +1329,7 @@ static int ap_poll_read(struct ap_device *ap_dev, unsigned long *flags)</div><div class='ctx'> 				continue;</div><div class='ctx'> 			list_del_init(&amp;ap_msg-&gt;list);</div><div class='ctx'> 			ap_dev-&gt;pendingq_count--;</div><div class='del'>-			ap_dev-&gt;drv-&gt;receive(ap_dev, ap_msg, ap_dev-&gt;reply);</div><div class='add'>+			ap_msg-&gt;receive(ap_dev, ap_msg, ap_dev-&gt;reply);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (ap_dev-&gt;queue_count &gt; 0)</div><div class='hunk'>@@ -1450,10 +1450,10 @@ static int __ap_queue_message(struct ap_device *ap_dev, struct ap_message *ap_ms</div><div class='ctx'> 			return -EBUSY;</div><div class='ctx'> 		case AP_RESPONSE_REQ_FAC_NOT_INST:</div><div class='ctx'> 		case AP_RESPONSE_MESSAGE_TOO_BIG:</div><div class='del'>-			ap_dev-&gt;drv-&gt;receive(ap_dev, ap_msg, ERR_PTR(-EINVAL));</div><div class='add'>+			ap_msg-&gt;receive(ap_dev, ap_msg, ERR_PTR(-EINVAL));</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		default:	/* Device is gone. */</div><div class='del'>-			ap_dev-&gt;drv-&gt;receive(ap_dev, ap_msg, ERR_PTR(-ENODEV));</div><div class='add'>+			ap_msg-&gt;receive(ap_dev, ap_msg, ERR_PTR(-ENODEV));</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1471,6 +1471,10 @@ void ap_queue_message(struct ap_device *ap_dev, struct ap_message *ap_msg)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='add'>+	/* For asynchronous message handling a valid receive-callback</div><div class='add'>+	 * is required. */</div><div class='add'>+	BUG_ON(!ap_msg-&gt;receive);</div><div class='add'>+</div><div class='ctx'> 	spin_lock_bh(&amp;ap_dev-&gt;lock);</div><div class='ctx'> 	if (!ap_dev-&gt;unregistered) {</div><div class='ctx'> 		/* Make room on the queue by polling for finished requests. */</div><div class='hunk'>@@ -1482,7 +1486,7 @@ void ap_queue_message(struct ap_device *ap_dev, struct ap_message *ap_msg)</div><div class='ctx'> 		if (rc == -ENODEV)</div><div class='ctx'> 			ap_dev-&gt;unregistered = 1;</div><div class='ctx'> 	} else {</div><div class='del'>-		ap_dev-&gt;drv-&gt;receive(ap_dev, ap_msg, ERR_PTR(-ENODEV));</div><div class='add'>+		ap_msg-&gt;receive(ap_dev, ap_msg, ERR_PTR(-ENODEV));</div><div class='ctx'> 		rc = -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_bh(&amp;ap_dev-&gt;lock);</div><div class='head'>diff --git a/drivers/s390/crypto/ap_bus.h b/drivers/s390/crypto/ap_bus.h<br/>index d960a6309eec..726fc65809d8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/crypto/ap_bus.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/crypto/ap_bus.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/crypto/ap_bus.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/crypto/ap_bus.h</a></div><div class='hunk'>@@ -136,9 +136,6 @@ struct ap_driver {</div><div class='ctx'> </div><div class='ctx'> 	int (*probe)(struct ap_device *);</div><div class='ctx'> 	void (*remove)(struct ap_device *);</div><div class='del'>-	/* receive is called from tasklet context */</div><div class='del'>-	void (*receive)(struct ap_device *, struct ap_message *,</div><div class='del'>-			struct ap_message *);</div><div class='ctx'> 	int request_timeout;		/* request timeout in jiffies */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -183,6 +180,9 @@ struct ap_message {</div><div class='ctx'> </div><div class='ctx'> 	void *private;			/* ap driver private pointer. */</div><div class='ctx'> 	unsigned int special:1;		/* Used for special commands. */</div><div class='add'>+	/* receive is called from tasklet context */</div><div class='add'>+	void (*receive)(struct ap_device *, struct ap_message *,</div><div class='add'>+			struct ap_message *);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define AP_DEVICE(dt)					\</div><div class='hunk'>@@ -199,6 +199,7 @@ static inline void ap_init_message(struct ap_message *ap_msg)</div><div class='ctx'> 	ap_msg-&gt;psmid = 0;</div><div class='ctx'> 	ap_msg-&gt;length = 0;</div><div class='ctx'> 	ap_msg-&gt;special = 0;</div><div class='add'>+	ap_msg-&gt;receive = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/s390/crypto/zcrypt_cex2a.c b/drivers/s390/crypto/zcrypt_cex2a.c<br/>index 084286728166..46812440425a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/crypto/zcrypt_cex2a.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/crypto/zcrypt_cex2a.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/crypto/zcrypt_cex2a.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/crypto/zcrypt_cex2a.c</a></div><div class='hunk'>@@ -77,7 +77,6 @@ static void zcrypt_cex2a_receive(struct ap_device *, struct ap_message *,</div><div class='ctx'> static struct ap_driver zcrypt_cex2a_driver = {</div><div class='ctx'> 	.probe = zcrypt_cex2a_probe,</div><div class='ctx'> 	.remove = zcrypt_cex2a_remove,</div><div class='del'>-	.receive = zcrypt_cex2a_receive,</div><div class='ctx'> 	.ids = zcrypt_cex2a_ids,</div><div class='ctx'> 	.request_timeout = CEX2A_CLEANUP_TIME,</div><div class='ctx'> };</div><div class='hunk'>@@ -349,6 +348,7 @@ static long zcrypt_cex2a_modexpo(struct zcrypt_device *zdev,</div><div class='ctx'> 		ap_msg.message = kmalloc(CEX3A_MAX_MESSAGE_SIZE, GFP_KERNEL);</div><div class='ctx'> 	if (!ap_msg.message)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	ap_msg.receive = zcrypt_cex2a_receive;</div><div class='ctx'> 	ap_msg.psmid = (((unsigned long long) current-&gt;pid) &lt;&lt; 32) +</div><div class='ctx'> 				atomic_inc_return(&amp;zcrypt_step);</div><div class='ctx'> 	ap_msg.private = &amp;work;</div><div class='hunk'>@@ -390,6 +390,7 @@ static long zcrypt_cex2a_modexpo_crt(struct zcrypt_device *zdev,</div><div class='ctx'> 		ap_msg.message = kmalloc(CEX3A_MAX_MESSAGE_SIZE, GFP_KERNEL);</div><div class='ctx'> 	if (!ap_msg.message)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	ap_msg.receive = zcrypt_cex2a_receive;</div><div class='ctx'> 	ap_msg.psmid = (((unsigned long long) current-&gt;pid) &lt;&lt; 32) +</div><div class='ctx'> 				atomic_inc_return(&amp;zcrypt_step);</div><div class='ctx'> 	ap_msg.private = &amp;work;</div><div class='head'>diff --git a/drivers/s390/crypto/zcrypt_pcica.c b/drivers/s390/crypto/zcrypt_pcica.c<br/>index 0effca925451..ad7951c21b79 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/crypto/zcrypt_pcica.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/crypto/zcrypt_pcica.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/crypto/zcrypt_pcica.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/crypto/zcrypt_pcica.c</a></div><div class='hunk'>@@ -67,7 +67,6 @@ static void zcrypt_pcica_receive(struct ap_device *, struct ap_message *,</div><div class='ctx'> static struct ap_driver zcrypt_pcica_driver = {</div><div class='ctx'> 	.probe = zcrypt_pcica_probe,</div><div class='ctx'> 	.remove = zcrypt_pcica_remove,</div><div class='del'>-	.receive = zcrypt_pcica_receive,</div><div class='ctx'> 	.ids = zcrypt_pcica_ids,</div><div class='ctx'> 	.request_timeout = PCICA_CLEANUP_TIME,</div><div class='ctx'> };</div><div class='hunk'>@@ -284,6 +283,7 @@ static long zcrypt_pcica_modexpo(struct zcrypt_device *zdev,</div><div class='ctx'> 	ap_msg.message = kmalloc(PCICA_MAX_MESSAGE_SIZE, GFP_KERNEL);</div><div class='ctx'> 	if (!ap_msg.message)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	ap_msg.receive = zcrypt_pcica_receive;</div><div class='ctx'> 	ap_msg.psmid = (((unsigned long long) current-&gt;pid) &lt;&lt; 32) +</div><div class='ctx'> 				atomic_inc_return(&amp;zcrypt_step);</div><div class='ctx'> 	ap_msg.private = &amp;work;</div><div class='hunk'>@@ -322,6 +322,7 @@ static long zcrypt_pcica_modexpo_crt(struct zcrypt_device *zdev,</div><div class='ctx'> 	ap_msg.message = kmalloc(PCICA_MAX_MESSAGE_SIZE, GFP_KERNEL);</div><div class='ctx'> 	if (!ap_msg.message)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	ap_msg.receive = zcrypt_pcica_receive;</div><div class='ctx'> 	ap_msg.psmid = (((unsigned long long) current-&gt;pid) &lt;&lt; 32) +</div><div class='ctx'> 				atomic_inc_return(&amp;zcrypt_step);</div><div class='ctx'> 	ap_msg.private = &amp;work;</div><div class='head'>diff --git a/drivers/s390/crypto/zcrypt_pcicc.c b/drivers/s390/crypto/zcrypt_pcicc.c<br/>index f9523c0cc8d2..e5dd335fda53 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/crypto/zcrypt_pcicc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/crypto/zcrypt_pcicc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/crypto/zcrypt_pcicc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/crypto/zcrypt_pcicc.c</a></div><div class='hunk'>@@ -79,7 +79,6 @@ static void zcrypt_pcicc_receive(struct ap_device *, struct ap_message *,</div><div class='ctx'> static struct ap_driver zcrypt_pcicc_driver = {</div><div class='ctx'> 	.probe = zcrypt_pcicc_probe,</div><div class='ctx'> 	.remove = zcrypt_pcicc_remove,</div><div class='del'>-	.receive = zcrypt_pcicc_receive,</div><div class='ctx'> 	.ids = zcrypt_pcicc_ids,</div><div class='ctx'> 	.request_timeout = PCICC_CLEANUP_TIME,</div><div class='ctx'> };</div><div class='hunk'>@@ -488,6 +487,7 @@ static long zcrypt_pcicc_modexpo(struct zcrypt_device *zdev,</div><div class='ctx'> 	ap_msg.message = (void *) get_zeroed_page(GFP_KERNEL);</div><div class='ctx'> 	if (!ap_msg.message)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	ap_msg.receive = zcrypt_pcicc_receive;</div><div class='ctx'> 	ap_msg.length = PAGE_SIZE;</div><div class='ctx'> 	ap_msg.psmid = (((unsigned long long) current-&gt;pid) &lt;&lt; 32) +</div><div class='ctx'> 				atomic_inc_return(&amp;zcrypt_step);</div><div class='hunk'>@@ -527,6 +527,7 @@ static long zcrypt_pcicc_modexpo_crt(struct zcrypt_device *zdev,</div><div class='ctx'> 	ap_msg.message = (void *) get_zeroed_page(GFP_KERNEL);</div><div class='ctx'> 	if (!ap_msg.message)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	ap_msg.receive = zcrypt_pcicc_receive;</div><div class='ctx'> 	ap_msg.length = PAGE_SIZE;</div><div class='ctx'> 	ap_msg.psmid = (((unsigned long long) current-&gt;pid) &lt;&lt; 32) +</div><div class='ctx'> 				atomic_inc_return(&amp;zcrypt_step);</div><div class='head'>diff --git a/drivers/s390/crypto/zcrypt_pcixcc.c b/drivers/s390/crypto/zcrypt_pcixcc.c<br/>index cf1cbd4747f4..f7cc43401816 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/crypto/zcrypt_pcixcc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/crypto/zcrypt_pcixcc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/crypto/zcrypt_pcixcc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/crypto/zcrypt_pcixcc.c</a></div><div class='hunk'>@@ -89,7 +89,6 @@ static void zcrypt_pcixcc_receive(struct ap_device *, struct ap_message *,</div><div class='ctx'> static struct ap_driver zcrypt_pcixcc_driver = {</div><div class='ctx'> 	.probe = zcrypt_pcixcc_probe,</div><div class='ctx'> 	.remove = zcrypt_pcixcc_remove,</div><div class='del'>-	.receive = zcrypt_pcixcc_receive,</div><div class='ctx'> 	.ids = zcrypt_pcixcc_ids,</div><div class='ctx'> 	.request_timeout = PCIXCC_CLEANUP_TIME,</div><div class='ctx'> };</div><div class='hunk'>@@ -698,6 +697,7 @@ static long zcrypt_pcixcc_modexpo(struct zcrypt_device *zdev,</div><div class='ctx'> 	ap_msg.message = (void *) get_zeroed_page(GFP_KERNEL);</div><div class='ctx'> 	if (!ap_msg.message)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	ap_msg.receive = zcrypt_pcixcc_receive;</div><div class='ctx'> 	ap_msg.psmid = (((unsigned long long) current-&gt;pid) &lt;&lt; 32) +</div><div class='ctx'> 				atomic_inc_return(&amp;zcrypt_step);</div><div class='ctx'> 	ap_msg.private = &amp;resp_type;</div><div class='hunk'>@@ -738,6 +738,7 @@ static long zcrypt_pcixcc_modexpo_crt(struct zcrypt_device *zdev,</div><div class='ctx'> 	ap_msg.message = (void *) get_zeroed_page(GFP_KERNEL);</div><div class='ctx'> 	if (!ap_msg.message)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	ap_msg.receive = zcrypt_pcixcc_receive;</div><div class='ctx'> 	ap_msg.psmid = (((unsigned long long) current-&gt;pid) &lt;&lt; 32) +</div><div class='ctx'> 				atomic_inc_return(&amp;zcrypt_step);</div><div class='ctx'> 	ap_msg.private = &amp;resp_type;</div><div class='hunk'>@@ -778,6 +779,7 @@ static long zcrypt_pcixcc_send_cprb(struct zcrypt_device *zdev,</div><div class='ctx'> 	ap_msg.message = kmalloc(PCIXCC_MAX_XCRB_MESSAGE_SIZE, GFP_KERNEL);</div><div class='ctx'> 	if (!ap_msg.message)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	ap_msg.receive = zcrypt_pcixcc_receive;</div><div class='ctx'> 	ap_msg.psmid = (((unsigned long long) current-&gt;pid) &lt;&lt; 32) +</div><div class='ctx'> 				atomic_inc_return(&amp;zcrypt_step);</div><div class='ctx'> 	ap_msg.private = &amp;resp_type;</div><div class='hunk'>@@ -818,6 +820,7 @@ static long zcrypt_pcixcc_rng(struct zcrypt_device *zdev,</div><div class='ctx'> 	ap_msg.message = kmalloc(PCIXCC_MAX_XCRB_MESSAGE_SIZE, GFP_KERNEL);</div><div class='ctx'> 	if (!ap_msg.message)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	ap_msg.receive = zcrypt_pcixcc_receive;</div><div class='ctx'> 	ap_msg.psmid = (((unsigned long long) current-&gt;pid) &lt;&lt; 32) +</div><div class='ctx'> 				atomic_inc_return(&amp;zcrypt_step);</div><div class='ctx'> 	ap_msg.private = &amp;resp_type;</div><div class='head'>diff --git a/drivers/s390/net/Kconfig b/drivers/s390/net/Kconfig<br/>index 9b66d2d1809b..dfda748c4000 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/Kconfig</a></div><div class='hunk'>@@ -4,11 +4,10 @@ menu "S/390 network device drivers"</div><div class='ctx'> config LCS</div><div class='ctx'> 	def_tristate m</div><div class='ctx'> 	prompt "Lan Channel Station Interface"</div><div class='del'>-	depends on CCW &amp;&amp; NETDEVICES &amp;&amp; (ETHERNET || TR || FDDI)</div><div class='add'>+	depends on CCW &amp;&amp; NETDEVICES &amp;&amp; (ETHERNET || FDDI)</div><div class='ctx'> 	help</div><div class='ctx'> 	   Select this option if you want to use LCS networking on IBM System z.</div><div class='del'>-	   This device driver supports Token Ring (IEEE 802.5),</div><div class='del'>-	   FDDI (IEEE 802.7) and Ethernet.</div><div class='add'>+	   This device driver supports FDDI (IEEE 802.7) and Ethernet.</div><div class='ctx'> 	   To compile as a module, choose M. The module name is lcs.</div><div class='ctx'> 	   If you do not know what it is, it's safe to choose Y.</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/s390/net/claw.c b/drivers/s390/net/claw.c<br/>index b41fae37d3af..6b1ff90d2f00 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/claw.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/claw.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/claw.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/claw.c</a></div><div class='hunk'>@@ -136,7 +136,6 @@ static inline void</div><div class='ctx'> claw_set_busy(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'>  ((struct claw_privbk *)dev-&gt;ml_priv)-&gt;tbusy = 1;</div><div class='del'>- eieio();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='hunk'>@@ -144,13 +143,11 @@ claw_clear_busy(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	clear_bit(0, &amp;(((struct claw_privbk *) dev-&gt;ml_priv)-&gt;tbusy));</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='del'>-	eieio();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='ctx'> claw_check_busy(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	eieio();</div><div class='ctx'> 	return ((struct claw_privbk *) dev-&gt;ml_priv)-&gt;tbusy;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -233,8 +230,6 @@ static ssize_t claw_rbuff_show(struct device *dev,</div><div class='ctx'> static ssize_t claw_rbuff_write(struct device *dev,</div><div class='ctx'> 	struct device_attribute *attr,</div><div class='ctx'> 	const char *buf, size_t count);</div><div class='del'>-static int claw_add_files(struct device *dev);</div><div class='del'>-static void claw_remove_files(struct device *dev);</div><div class='ctx'> </div><div class='ctx'> /*   Functions for System Validate  */</div><div class='ctx'> static int claw_process_control( struct net_device *dev, struct ccwbk * p_ccw);</div><div class='hunk'>@@ -267,12 +262,10 @@ static struct ccwgroup_driver claw_group_driver = {</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 		.name	= "claw",</div><div class='ctx'> 	},</div><div class='del'>-        .max_slaves  = 2,</div><div class='del'>-        .driver_id   = 0xC3D3C1E6,</div><div class='del'>-        .probe       = claw_probe,</div><div class='del'>-        .remove      = claw_remove_device,</div><div class='del'>-        .set_online  = claw_new_device,</div><div class='del'>-        .set_offline = claw_shutdown_device,</div><div class='add'>+	.setup	     = claw_probe,</div><div class='add'>+	.remove      = claw_remove_device,</div><div class='add'>+	.set_online  = claw_new_device,</div><div class='add'>+	.set_offline = claw_shutdown_device,</div><div class='ctx'> 	.prepare     = claw_pm_prepare,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -293,30 +286,24 @@ static struct ccw_driver claw_ccw_driver = {</div><div class='ctx'> 	.int_class = IOINT_CLW,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static ssize_t</div><div class='del'>-claw_driver_group_store(struct device_driver *ddrv, const char *buf,</div><div class='del'>-			size_t count)</div><div class='add'>+static ssize_t claw_driver_group_store(struct device_driver *ddrv,</div><div class='add'>+				       const char *buf,	size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='del'>-	err = ccwgroup_create_from_string(claw_root_dev,</div><div class='del'>-					  claw_group_driver.driver_id,</div><div class='del'>-					  &amp;claw_ccw_driver, 2, buf);</div><div class='add'>+	err = ccwgroup_create_dev(claw_root_dev, &amp;claw_group_driver, 2, buf);</div><div class='ctx'> 	return err ? err : count;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> static DRIVER_ATTR(group, 0200, NULL, claw_driver_group_store);</div><div class='ctx'> </div><div class='del'>-static struct attribute *claw_group_attrs[] = {</div><div class='add'>+static struct attribute *claw_drv_attrs[] = {</div><div class='ctx'> 	&amp;driver_attr_group.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-static struct attribute_group claw_group_attr_group = {</div><div class='del'>-	.attrs = claw_group_attrs,</div><div class='add'>+static struct attribute_group claw_drv_attr_group = {</div><div class='add'>+	.attrs = claw_drv_attrs,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-static const struct attribute_group *claw_group_attr_groups[] = {</div><div class='del'>-	&amp;claw_group_attr_group,</div><div class='add'>+static const struct attribute_group *claw_drv_attr_groups[] = {</div><div class='add'>+	&amp;claw_drv_attr_group,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -324,60 +311,6 @@ static const struct attribute_group *claw_group_attr_groups[] = {</div><div class='ctx'> *       Key functions</div><div class='ctx'> */</div><div class='ctx'> </div><div class='del'>-/*----------------------------------------------------------------*</div><div class='del'>- *   claw_probe                                                   *</div><div class='del'>- *      this function is called for each CLAW device.             *</div><div class='del'>- *----------------------------------------------------------------*/</div><div class='del'>-static int</div><div class='del'>-claw_probe(struct ccwgroup_device *cgdev)</div><div class='del'>-{</div><div class='del'>-	int  		rc;</div><div class='del'>-	struct claw_privbk *privptr=NULL;</div><div class='del'>-</div><div class='del'>-	CLAW_DBF_TEXT(2, setup, "probe");</div><div class='del'>-	if (!get_device(&amp;cgdev-&gt;dev))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	privptr = kzalloc(sizeof(struct claw_privbk), GFP_KERNEL);</div><div class='del'>-	dev_set_drvdata(&amp;cgdev-&gt;dev, privptr);</div><div class='del'>-	if (privptr == NULL) {</div><div class='del'>-		probe_error(cgdev);</div><div class='del'>-		put_device(&amp;cgdev-&gt;dev);</div><div class='del'>-		CLAW_DBF_TEXT_(2, setup, "probex%d", -ENOMEM);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	privptr-&gt;p_mtc_envelope= kzalloc( MAX_ENVELOPE_SIZE, GFP_KERNEL);</div><div class='del'>-	privptr-&gt;p_env = kzalloc(sizeof(struct claw_env), GFP_KERNEL);</div><div class='del'>-        if ((privptr-&gt;p_mtc_envelope==NULL) || (privptr-&gt;p_env==NULL)) {</div><div class='del'>-                probe_error(cgdev);</div><div class='del'>-		put_device(&amp;cgdev-&gt;dev);</div><div class='del'>-		CLAW_DBF_TEXT_(2, setup, "probex%d", -ENOMEM);</div><div class='del'>-                return -ENOMEM;</div><div class='del'>-        }</div><div class='del'>-	memcpy(privptr-&gt;p_env-&gt;adapter_name,WS_NAME_NOT_DEF,8);</div><div class='del'>-	memcpy(privptr-&gt;p_env-&gt;host_name,WS_NAME_NOT_DEF,8);</div><div class='del'>-	memcpy(privptr-&gt;p_env-&gt;api_type,WS_NAME_NOT_DEF,8);</div><div class='del'>-	privptr-&gt;p_env-&gt;packing = 0;</div><div class='del'>-	privptr-&gt;p_env-&gt;write_buffers = 5;</div><div class='del'>-	privptr-&gt;p_env-&gt;read_buffers = 5;</div><div class='del'>-	privptr-&gt;p_env-&gt;read_size = CLAW_FRAME_SIZE;</div><div class='del'>-	privptr-&gt;p_env-&gt;write_size = CLAW_FRAME_SIZE;</div><div class='del'>-	rc = claw_add_files(&amp;cgdev-&gt;dev);</div><div class='del'>-	if (rc) {</div><div class='del'>-		probe_error(cgdev);</div><div class='del'>-		put_device(&amp;cgdev-&gt;dev);</div><div class='del'>-		dev_err(&amp;cgdev-&gt;dev, "Creating the /proc files for a new"</div><div class='del'>-		" CLAW device failed\n");</div><div class='del'>-		CLAW_DBF_TEXT_(2, setup, "probex%d", rc);</div><div class='del'>-		return rc;</div><div class='del'>-	}</div><div class='del'>-	privptr-&gt;p_env-&gt;p_priv = privptr;</div><div class='del'>-        cgdev-&gt;cdev[0]-&gt;handler = claw_irq_handler;</div><div class='del'>-	cgdev-&gt;cdev[1]-&gt;handler = claw_irq_handler;</div><div class='del'>-	CLAW_DBF_TEXT(2, setup, "prbext 0");</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}  /*  end of claw_probe       */</div><div class='del'>-</div><div class='ctx'> /*-------------------------------------------------------------------*</div><div class='ctx'>  *   claw_tx                                                         *</div><div class='ctx'>  *-------------------------------------------------------------------*/</div><div class='hunk'>@@ -3093,7 +3026,6 @@ claw_remove_device(struct ccwgroup_device *cgdev)</div><div class='ctx'> 	dev_info(&amp;cgdev-&gt;dev, " will be removed.\n");</div><div class='ctx'> 	if (cgdev-&gt;state == CCWGROUP_ONLINE)</div><div class='ctx'> 		claw_shutdown_device(cgdev);</div><div class='del'>-	claw_remove_files(&amp;cgdev-&gt;dev);</div><div class='ctx'> 	kfree(priv-&gt;p_mtc_envelope);</div><div class='ctx'> 	priv-&gt;p_mtc_envelope=NULL;</div><div class='ctx'> 	kfree(priv-&gt;p_env);</div><div class='hunk'>@@ -3321,7 +3253,6 @@ claw_rbuff_write(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 	CLAW_DBF_TEXT_(2, setup, "RB=%d", p_env-&gt;read_buffers);</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> static DEVICE_ATTR(read_buffer, 0644, claw_rbuff_show, claw_rbuff_write);</div><div class='ctx'> </div><div class='ctx'> static struct attribute *claw_attr[] = {</div><div class='hunk'>@@ -3332,40 +3263,73 @@ static struct attribute *claw_attr[] = {</div><div class='ctx'> 	&amp;dev_attr_host_name.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='del'>-</div><div class='ctx'> static struct attribute_group claw_attr_group = {</div><div class='ctx'> 	.attrs = claw_attr,</div><div class='ctx'> };</div><div class='add'>+static const struct attribute_group *claw_attr_groups[] = {</div><div class='add'>+	&amp;claw_attr_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+static const struct device_type claw_devtype = {</div><div class='add'>+	.name = "claw",</div><div class='add'>+	.groups = claw_attr_groups,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-claw_add_files(struct device *dev)</div><div class='add'>+/*----------------------------------------------------------------*</div><div class='add'>+ *   claw_probe 						  *</div><div class='add'>+ *	this function is called for each CLAW device.		  *</div><div class='add'>+ *----------------------------------------------------------------*/</div><div class='add'>+static int claw_probe(struct ccwgroup_device *cgdev)</div><div class='ctx'> {</div><div class='del'>-	CLAW_DBF_TEXT(2, setup, "add_file");</div><div class='del'>-	return sysfs_create_group(&amp;dev-&gt;kobj, &amp;claw_attr_group);</div><div class='del'>-}</div><div class='add'>+	struct claw_privbk *privptr = NULL;</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-claw_remove_files(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	CLAW_DBF_TEXT(2, setup, "rem_file");</div><div class='del'>-	sysfs_remove_group(&amp;dev-&gt;kobj, &amp;claw_attr_group);</div><div class='del'>-}</div><div class='add'>+	CLAW_DBF_TEXT(2, setup, "probe");</div><div class='add'>+	if (!get_device(&amp;cgdev-&gt;dev))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	privptr = kzalloc(sizeof(struct claw_privbk), GFP_KERNEL);</div><div class='add'>+	dev_set_drvdata(&amp;cgdev-&gt;dev, privptr);</div><div class='add'>+	if (privptr == NULL) {</div><div class='add'>+		probe_error(cgdev);</div><div class='add'>+		put_device(&amp;cgdev-&gt;dev);</div><div class='add'>+		CLAW_DBF_TEXT_(2, setup, "probex%d", -ENOMEM);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	privptr-&gt;p_mtc_envelope = kzalloc(MAX_ENVELOPE_SIZE, GFP_KERNEL);</div><div class='add'>+	privptr-&gt;p_env = kzalloc(sizeof(struct claw_env), GFP_KERNEL);</div><div class='add'>+	if ((privptr-&gt;p_mtc_envelope == NULL) || (privptr-&gt;p_env == NULL)) {</div><div class='add'>+		probe_error(cgdev);</div><div class='add'>+		put_device(&amp;cgdev-&gt;dev);</div><div class='add'>+		CLAW_DBF_TEXT_(2, setup, "probex%d", -ENOMEM);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	memcpy(privptr-&gt;p_env-&gt;adapter_name, WS_NAME_NOT_DEF, 8);</div><div class='add'>+	memcpy(privptr-&gt;p_env-&gt;host_name, WS_NAME_NOT_DEF, 8);</div><div class='add'>+	memcpy(privptr-&gt;p_env-&gt;api_type, WS_NAME_NOT_DEF, 8);</div><div class='add'>+	privptr-&gt;p_env-&gt;packing = 0;</div><div class='add'>+	privptr-&gt;p_env-&gt;write_buffers = 5;</div><div class='add'>+	privptr-&gt;p_env-&gt;read_buffers = 5;</div><div class='add'>+	privptr-&gt;p_env-&gt;read_size = CLAW_FRAME_SIZE;</div><div class='add'>+	privptr-&gt;p_env-&gt;write_size = CLAW_FRAME_SIZE;</div><div class='add'>+	privptr-&gt;p_env-&gt;p_priv = privptr;</div><div class='add'>+	cgdev-&gt;cdev[0]-&gt;handler = claw_irq_handler;</div><div class='add'>+	cgdev-&gt;cdev[1]-&gt;handler = claw_irq_handler;</div><div class='add'>+	cgdev-&gt;dev.type = &amp;claw_devtype;</div><div class='add'>+	CLAW_DBF_TEXT(2, setup, "prbext 0");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}  /*  end of claw_probe       */</div><div class='ctx'> </div><div class='ctx'> /*--------------------------------------------------------------------*</div><div class='ctx'> *    claw_init  and cleanup                                           *</div><div class='ctx'> *---------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='del'>-static void __exit</div><div class='del'>-claw_cleanup(void)</div><div class='add'>+static void __exit claw_cleanup(void)</div><div class='ctx'> {</div><div class='del'>-	driver_remove_file(&amp;claw_group_driver.driver,</div><div class='del'>-			   &amp;driver_attr_group);</div><div class='ctx'> 	ccwgroup_driver_unregister(&amp;claw_group_driver);</div><div class='ctx'> 	ccw_driver_unregister(&amp;claw_ccw_driver);</div><div class='ctx'> 	root_device_unregister(claw_root_dev);</div><div class='ctx'> 	claw_unregister_debug_facility();</div><div class='ctx'> 	pr_info("Driver unloaded\n");</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3374,8 +3338,7 @@ claw_cleanup(void)</div><div class='ctx'>  *</div><div class='ctx'>  * @return 0 on success, !0 on error.</div><div class='ctx'>  */</div><div class='del'>-static int __init</div><div class='del'>-claw_init(void)</div><div class='add'>+static int __init claw_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -3394,7 +3357,7 @@ claw_init(void)</div><div class='ctx'> 	ret = ccw_driver_register(&amp;claw_ccw_driver);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto ccw_err;</div><div class='del'>-	claw_group_driver.driver.groups = claw_group_attr_groups;</div><div class='add'>+	claw_group_driver.driver.groups = claw_drv_attr_groups;</div><div class='ctx'> 	ret = ccwgroup_driver_register(&amp;claw_group_driver);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto ccwgroup_err;</div><div class='head'>diff --git a/drivers/s390/net/ctcm_main.c b/drivers/s390/net/ctcm_main.c<br/>index 11f3b071f305..3cd25544a27a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/ctcm_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/ctcm_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/ctcm_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/ctcm_main.c</a></div><div class='hunk'>@@ -1296,6 +1296,11 @@ static void ctcm_irq_handler(struct ccw_device *cdev,</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct device_type ctcm_devtype = {</div><div class='add'>+	.name = "ctcm",</div><div class='add'>+	.groups = ctcm_attr_groups,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * Add ctcm specific attributes.</div><div class='ctx'>  * Add ctcm private data.</div><div class='hunk'>@@ -1307,7 +1312,6 @@ static void ctcm_irq_handler(struct ccw_device *cdev,</div><div class='ctx'> static int ctcm_probe_device(struct ccwgroup_device *cgdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ctcm_priv *priv;</div><div class='del'>-	int rc;</div><div class='ctx'> </div><div class='ctx'> 	CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO,</div><div class='ctx'> 			"%s %p",</div><div class='hunk'>@@ -1324,17 +1328,11 @@ static int ctcm_probe_device(struct ccwgroup_device *cgdev)</div><div class='ctx'> 		put_device(&amp;cgdev-&gt;dev);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	rc = ctcm_add_files(&amp;cgdev-&gt;dev);</div><div class='del'>-	if (rc) {</div><div class='del'>-		kfree(priv);</div><div class='del'>-		put_device(&amp;cgdev-&gt;dev);</div><div class='del'>-		return rc;</div><div class='del'>-	}</div><div class='ctx'> 	priv-&gt;buffer_size = CTCM_BUFSIZE_DEFAULT;</div><div class='ctx'> 	cgdev-&gt;cdev[0]-&gt;handler = ctcm_irq_handler;</div><div class='ctx'> 	cgdev-&gt;cdev[1]-&gt;handler = ctcm_irq_handler;</div><div class='ctx'> 	dev_set_drvdata(&amp;cgdev-&gt;dev, priv);</div><div class='add'>+	cgdev-&gt;dev.type = &amp;ctcm_devtype;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1611,11 +1609,6 @@ static int ctcm_new_device(struct ccwgroup_device *cgdev)</div><div class='ctx'> 		goto out_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ctcm_add_attributes(&amp;cgdev-&gt;dev)) {</div><div class='del'>-		result = -ENODEV;</div><div class='del'>-		goto out_unregister;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	strlcpy(priv-&gt;fsm-&gt;name, dev-&gt;name, sizeof(priv-&gt;fsm-&gt;name));</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;dev-&gt;dev,</div><div class='hunk'>@@ -1629,8 +1622,6 @@ static int ctcm_new_device(struct ccwgroup_device *cgdev)</div><div class='ctx'> 			priv-&gt;channel[CTCM_WRITE]-&gt;id, priv-&gt;protocol);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-out_unregister:</div><div class='del'>-	unregister_netdev(dev);</div><div class='ctx'> out_dev:</div><div class='ctx'> 	ctcm_free_netdevice(dev);</div><div class='ctx'> out_ccw2:</div><div class='hunk'>@@ -1669,7 +1660,6 @@ static int ctcm_shutdown_device(struct ccwgroup_device *cgdev)</div><div class='ctx'> 		/* Close the device */</div><div class='ctx'> 		ctcm_close(dev);</div><div class='ctx'> 		dev-&gt;flags &amp;= ~IFF_RUNNING;</div><div class='del'>-		ctcm_remove_attributes(&amp;cgdev-&gt;dev);</div><div class='ctx'> 		channel_free(priv-&gt;channel[CTCM_READ]);</div><div class='ctx'> 	} else</div><div class='ctx'> 		dev = NULL;</div><div class='hunk'>@@ -1711,7 +1701,6 @@ static void ctcm_remove_device(struct ccwgroup_device *cgdev)</div><div class='ctx'> </div><div class='ctx'> 	if (cgdev-&gt;state == CCWGROUP_ONLINE)</div><div class='ctx'> 		ctcm_shutdown_device(cgdev);</div><div class='del'>-	ctcm_remove_files(&amp;cgdev-&gt;dev);</div><div class='ctx'> 	dev_set_drvdata(&amp;cgdev-&gt;dev, NULL);</div><div class='ctx'> 	kfree(priv);</div><div class='ctx'> 	put_device(&amp;cgdev-&gt;dev);</div><div class='hunk'>@@ -1778,9 +1767,7 @@ static struct ccwgroup_driver ctcm_group_driver = {</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 		.name	= CTC_DRIVER_NAME,</div><div class='ctx'> 	},</div><div class='del'>-	.max_slaves  = 2,</div><div class='del'>-	.driver_id   = 0xC3E3C3D4,	/* CTCM */</div><div class='del'>-	.probe       = ctcm_probe_device,</div><div class='add'>+	.setup	     = ctcm_probe_device,</div><div class='ctx'> 	.remove      = ctcm_remove_device,</div><div class='ctx'> 	.set_online  = ctcm_new_device,</div><div class='ctx'> 	.set_offline = ctcm_shutdown_device,</div><div class='hunk'>@@ -1789,31 +1776,25 @@ static struct ccwgroup_driver ctcm_group_driver = {</div><div class='ctx'> 	.restore     = ctcm_pm_resume,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static ssize_t</div><div class='del'>-ctcm_driver_group_store(struct device_driver *ddrv, const char *buf,</div><div class='del'>-			size_t count)</div><div class='add'>+static ssize_t ctcm_driver_group_store(struct device_driver *ddrv,</div><div class='add'>+				       const char *buf,	size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = ccwgroup_create_from_string(ctcm_root_dev,</div><div class='del'>-					  ctcm_group_driver.driver_id,</div><div class='del'>-					  &amp;ctcm_ccw_driver, 2, buf);</div><div class='add'>+	err = ccwgroup_create_dev(ctcm_root_dev, &amp;ctcm_group_driver, 2, buf);</div><div class='ctx'> 	return err ? err : count;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> static DRIVER_ATTR(group, 0200, NULL, ctcm_driver_group_store);</div><div class='ctx'> </div><div class='del'>-static struct attribute *ctcm_group_attrs[] = {</div><div class='add'>+static struct attribute *ctcm_drv_attrs[] = {</div><div class='ctx'> 	&amp;driver_attr_group.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-static struct attribute_group ctcm_group_attr_group = {</div><div class='del'>-	.attrs = ctcm_group_attrs,</div><div class='add'>+static struct attribute_group ctcm_drv_attr_group = {</div><div class='add'>+	.attrs = ctcm_drv_attrs,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-static const struct attribute_group *ctcm_group_attr_groups[] = {</div><div class='del'>-	&amp;ctcm_group_attr_group,</div><div class='add'>+static const struct attribute_group *ctcm_drv_attr_groups[] = {</div><div class='add'>+	&amp;ctcm_drv_attr_group,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1829,7 +1810,6 @@ static const struct attribute_group *ctcm_group_attr_groups[] = {</div><div class='ctx'>  */</div><div class='ctx'> static void __exit ctcm_exit(void)</div><div class='ctx'> {</div><div class='del'>-	driver_remove_file(&amp;ctcm_group_driver.driver, &amp;driver_attr_group);</div><div class='ctx'> 	ccwgroup_driver_unregister(&amp;ctcm_group_driver);</div><div class='ctx'> 	ccw_driver_unregister(&amp;ctcm_ccw_driver);</div><div class='ctx'> 	root_device_unregister(ctcm_root_dev);</div><div class='hunk'>@@ -1867,7 +1847,7 @@ static int __init ctcm_init(void)</div><div class='ctx'> 	ret = ccw_driver_register(&amp;ctcm_ccw_driver);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto ccw_err;</div><div class='del'>-	ctcm_group_driver.driver.groups = ctcm_group_attr_groups;</div><div class='add'>+	ctcm_group_driver.driver.groups = ctcm_drv_attr_groups;</div><div class='ctx'> 	ret = ccwgroup_driver_register(&amp;ctcm_group_driver);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto ccwgroup_err;</div><div class='head'>diff --git a/drivers/s390/net/ctcm_main.h b/drivers/s390/net/ctcm_main.h<br/>index 24d5215eb0c4..b9056a55d995 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/ctcm_main.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/ctcm_main.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/ctcm_main.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/ctcm_main.h</a></div><div class='hunk'>@@ -225,13 +225,7 @@ struct ctcm_priv {</div><div class='ctx'> int ctcm_open(struct net_device *dev);</div><div class='ctx'> int ctcm_close(struct net_device *dev);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * prototypes for non-static sysfs functions</div><div class='del'>- */</div><div class='del'>-int ctcm_add_attributes(struct device *dev);</div><div class='del'>-void ctcm_remove_attributes(struct device *dev);</div><div class='del'>-int ctcm_add_files(struct device *dev);</div><div class='del'>-void ctcm_remove_files(struct device *dev);</div><div class='add'>+extern const struct attribute_group *ctcm_attr_groups[];</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Compatibility macros for busy handling</div><div class='head'>diff --git a/drivers/s390/net/ctcm_sysfs.c b/drivers/s390/net/ctcm_sysfs.c<br/>index 650aec1839e9..0c27ae726475 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/ctcm_sysfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/ctcm_sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/ctcm_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/ctcm_sysfs.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #define KMSG_COMPONENT "ctcm"</div><div class='ctx'> #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/sysfs.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include "ctcm_main.h"</div><div class='hunk'>@@ -108,10 +109,12 @@ static void ctcm_print_statistics(struct ctcm_priv *priv)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t stats_show(struct device *dev,</div><div class='del'>-				struct device_attribute *attr, char *buf)</div><div class='add'>+			  struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='add'>+	struct ccwgroup_device *gdev = to_ccwgroupdev(dev);</div><div class='ctx'> 	struct ctcm_priv *priv = dev_get_drvdata(dev);</div><div class='del'>-	if (!priv)</div><div class='add'>+</div><div class='add'>+	if (!priv || gdev-&gt;state != CCWGROUP_ONLINE)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	ctcm_print_statistics(priv);</div><div class='ctx'> 	return sprintf(buf, "0\n");</div><div class='hunk'>@@ -190,34 +193,14 @@ static struct attribute *ctcm_attr[] = {</div><div class='ctx'> 	&amp;dev_attr_protocol.attr,</div><div class='ctx'> 	&amp;dev_attr_type.attr,</div><div class='ctx'> 	&amp;dev_attr_buffer.attr,</div><div class='add'>+	&amp;dev_attr_stats.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct attribute_group ctcm_attr_group = {</div><div class='ctx'> 	.attrs = ctcm_attr,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-int ctcm_add_attributes(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	rc = device_create_file(dev, &amp;dev_attr_stats);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ctcm_remove_attributes(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	device_remove_file(dev, &amp;dev_attr_stats);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int ctcm_add_files(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	return sysfs_create_group(&amp;dev-&gt;kobj, &amp;ctcm_attr_group);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ctcm_remove_files(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	sysfs_remove_group(&amp;dev-&gt;kobj, &amp;ctcm_attr_group);</div><div class='del'>-}</div><div class='del'>-</div><div class='add'>+const struct attribute_group *ctcm_attr_groups[] = {</div><div class='add'>+	&amp;ctcm_attr_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/s390/net/lcs.c b/drivers/s390/net/lcs.c<br/>index 687efe4d589a..a3adf4b1c60d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/lcs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/lcs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/lcs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/lcs.c</a></div><div class='hunk'>@@ -30,7 +30,6 @@</div><div class='ctx'> #include &lt;linux/if.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='ctx'> #include &lt;linux/fddidevice.h&gt;</div><div class='ctx'> #include &lt;linux/inetdevice.h&gt;</div><div class='ctx'> #include &lt;linux/in.h&gt;</div><div class='hunk'>@@ -50,8 +49,7 @@</div><div class='ctx'> #include "lcs.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#if !defined(CONFIG_ETHERNET) &amp;&amp; \</div><div class='del'>-    !defined(CONFIG_TR) &amp;&amp; !defined(CONFIG_FDDI)</div><div class='add'>+#if !defined(CONFIG_ETHERNET) &amp;&amp; !defined(CONFIG_FDDI)</div><div class='ctx'> #error Cannot compile lcs.c without some net devices switched on.</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1166,10 +1164,7 @@ static void</div><div class='ctx'> lcs_get_mac_for_ipm(__be32 ipm, char *mac, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	LCS_DBF_TEXT(4,trace, "getmac");</div><div class='del'>-	if (dev-&gt;type == ARPHRD_IEEE802_TR)</div><div class='del'>-		ip_tr_mc_map(ipm, mac);</div><div class='del'>-	else</div><div class='del'>-		ip_eth_mc_map(ipm, mac);</div><div class='add'>+	ip_eth_mc_map(ipm, mac);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1641,12 +1636,6 @@ lcs_startlan_auto(struct lcs_card *card)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_TR</div><div class='del'>-	card-&gt;lan_type = LCS_FRAME_TYPE_TR;</div><div class='del'>-	rc = lcs_send_startlan(card, LCS_INITIATOR_TCPIP);</div><div class='del'>-	if (rc == 0)</div><div class='del'>-		return 0;</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_FDDI</div><div class='ctx'> 	card-&gt;lan_type = LCS_FRAME_TYPE_FDDI;</div><div class='ctx'> 	rc = lcs_send_startlan(card, LCS_INITIATOR_TCPIP);</div><div class='hunk'>@@ -2051,10 +2040,17 @@ static struct attribute * lcs_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_recover.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='del'>-</div><div class='ctx'> static struct attribute_group lcs_attr_group = {</div><div class='ctx'> 	.attrs = lcs_attrs,</div><div class='ctx'> };</div><div class='add'>+static const struct attribute_group *lcs_attr_groups[] = {</div><div class='add'>+	&amp;lcs_attr_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+static const struct device_type lcs_devtype = {</div><div class='add'>+	.name = "lcs",</div><div class='add'>+	.groups = lcs_attr_groups,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * lcs_probe_device is called on establishing a new ccwgroup_device.</div><div class='hunk'>@@ -2063,7 +2059,6 @@ static int</div><div class='ctx'> lcs_probe_device(struct ccwgroup_device *ccwgdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct lcs_card *card;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!get_device(&amp;ccwgdev-&gt;dev))</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -2075,12 +2070,6 @@ lcs_probe_device(struct ccwgroup_device *ccwgdev)</div><div class='ctx'> 		put_device(&amp;ccwgdev-&gt;dev);</div><div class='ctx'>                 return -ENOMEM;</div><div class='ctx'>         }</div><div class='del'>-	ret = sysfs_create_group(&amp;ccwgdev-&gt;dev.kobj, &amp;lcs_attr_group);</div><div class='del'>-	if (ret) {</div><div class='del'>-		lcs_free_card(card);</div><div class='del'>-		put_device(&amp;ccwgdev-&gt;dev);</div><div class='del'>-		return ret;</div><div class='del'>-        }</div><div class='ctx'> 	dev_set_drvdata(&amp;ccwgdev-&gt;dev, card);</div><div class='ctx'> 	ccwgdev-&gt;cdev[0]-&gt;handler = lcs_irq;</div><div class='ctx'> 	ccwgdev-&gt;cdev[1]-&gt;handler = lcs_irq;</div><div class='hunk'>@@ -2089,7 +2078,9 @@ lcs_probe_device(struct ccwgroup_device *ccwgdev)</div><div class='ctx'> 	card-&gt;thread_start_mask = 0;</div><div class='ctx'> 	card-&gt;thread_allowed_mask = 0;</div><div class='ctx'> 	card-&gt;thread_running_mask = 0;</div><div class='del'>-        return 0;</div><div class='add'>+	ccwgdev-&gt;dev.type = &amp;lcs_devtype;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -2172,12 +2163,6 @@ lcs_new_device(struct ccwgroup_device *ccwgdev)</div><div class='ctx'> 		dev = alloc_etherdev(0);</div><div class='ctx'> 		break;</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_TR</div><div class='del'>-	case LCS_FRAME_TYPE_TR:</div><div class='del'>-		card-&gt;lan_type_trans = tr_type_trans;</div><div class='del'>-		dev = alloc_trdev(0);</div><div class='del'>-		break;</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_FDDI</div><div class='ctx'> 	case LCS_FRAME_TYPE_FDDI:</div><div class='ctx'> 		card-&gt;lan_type_trans = fddi_type_trans;</div><div class='hunk'>@@ -2323,9 +2308,9 @@ lcs_remove_device(struct ccwgroup_device *ccwgdev)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (card-&gt;dev)</div><div class='ctx'> 		unregister_netdev(card-&gt;dev);</div><div class='del'>-	sysfs_remove_group(&amp;ccwgdev-&gt;dev.kobj, &amp;lcs_attr_group);</div><div class='ctx'> 	lcs_cleanup_card(card);</div><div class='ctx'> 	lcs_free_card(card);</div><div class='add'>+	dev_set_drvdata(&amp;ccwgdev-&gt;dev, NULL);</div><div class='ctx'> 	put_device(&amp;ccwgdev-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2410,9 +2395,7 @@ static struct ccwgroup_driver lcs_group_driver = {</div><div class='ctx'> 		.owner	= THIS_MODULE,</div><div class='ctx'> 		.name	= "lcs",</div><div class='ctx'> 	},</div><div class='del'>-	.max_slaves  = 2,</div><div class='del'>-	.driver_id   = 0xD3C3E2,</div><div class='del'>-	.probe       = lcs_probe_device,</div><div class='add'>+	.setup	     = lcs_probe_device,</div><div class='ctx'> 	.remove      = lcs_remove_device,</div><div class='ctx'> 	.set_online  = lcs_new_device,</div><div class='ctx'> 	.set_offline = lcs_shutdown_device,</div><div class='hunk'>@@ -2423,30 +2406,24 @@ static struct ccwgroup_driver lcs_group_driver = {</div><div class='ctx'> 	.restore     = lcs_restore,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static ssize_t</div><div class='del'>-lcs_driver_group_store(struct device_driver *ddrv, const char *buf,</div><div class='del'>-		       size_t count)</div><div class='add'>+static ssize_t lcs_driver_group_store(struct device_driver *ddrv,</div><div class='add'>+				      const char *buf, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='del'>-	err = ccwgroup_create_from_string(lcs_root_dev,</div><div class='del'>-					  lcs_group_driver.driver_id,</div><div class='del'>-					  &amp;lcs_ccw_driver, 2, buf);</div><div class='add'>+	err = ccwgroup_create_dev(lcs_root_dev, &amp;lcs_group_driver, 2, buf);</div><div class='ctx'> 	return err ? err : count;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> static DRIVER_ATTR(group, 0200, NULL, lcs_driver_group_store);</div><div class='ctx'> </div><div class='del'>-static struct attribute *lcs_group_attrs[] = {</div><div class='add'>+static struct attribute *lcs_drv_attrs[] = {</div><div class='ctx'> 	&amp;driver_attr_group.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-static struct attribute_group lcs_group_attr_group = {</div><div class='del'>-	.attrs = lcs_group_attrs,</div><div class='add'>+static struct attribute_group lcs_drv_attr_group = {</div><div class='add'>+	.attrs = lcs_drv_attrs,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-static const struct attribute_group *lcs_group_attr_groups[] = {</div><div class='del'>-	&amp;lcs_group_attr_group,</div><div class='add'>+static const struct attribute_group *lcs_drv_attr_groups[] = {</div><div class='add'>+	&amp;lcs_drv_attr_group,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -2470,7 +2447,7 @@ __init lcs_init_module(void)</div><div class='ctx'> 	rc = ccw_driver_register(&amp;lcs_ccw_driver);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto ccw_err;</div><div class='del'>-	lcs_group_driver.driver.groups = lcs_group_attr_groups;</div><div class='add'>+	lcs_group_driver.driver.groups = lcs_drv_attr_groups;</div><div class='ctx'> 	rc = ccwgroup_driver_register(&amp;lcs_group_driver);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto ccwgroup_err;</div><div class='hunk'>@@ -2496,8 +2473,6 @@ __exit lcs_cleanup_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	pr_info("Terminating lcs module.\n");</div><div class='ctx'> 	LCS_DBF_TEXT(0, trace, "cleanup");</div><div class='del'>-	driver_remove_file(&amp;lcs_group_driver.driver,</div><div class='del'>-			   &amp;driver_attr_group);</div><div class='ctx'> 	ccwgroup_driver_unregister(&amp;lcs_group_driver);</div><div class='ctx'> 	ccw_driver_unregister(&amp;lcs_ccw_driver);</div><div class='ctx'> 	root_device_unregister(lcs_root_dev);</div><div class='head'>diff --git a/drivers/s390/net/qeth_core.h b/drivers/s390/net/qeth_core.h<br/>index ec7921b5138e..06e8f31ff3dc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/qeth_core.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/qeth_core.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/qeth_core.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_core.h</a></div><div class='hunk'>@@ -13,8 +13,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/if.h&gt;</div><div class='ctx'> #include &lt;linux/if_arp.h&gt;</div><div class='del'>-#include &lt;linux/if_tr.h&gt;</div><div class='del'>-#include &lt;linux/trdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/ctype.h&gt;</div><div class='hunk'>@@ -676,8 +674,6 @@ struct qeth_card_options {</div><div class='ctx'> 	struct qeth_ipa_info adp; /*Adapter parameters*/</div><div class='ctx'> 	struct qeth_routing_info route6;</div><div class='ctx'> 	struct qeth_ipa_info ipa6;</div><div class='del'>-	int broadcast_mode;</div><div class='del'>-	int macaddr_mode;</div><div class='ctx'> 	int fake_broadcast;</div><div class='ctx'> 	int add_hhlen;</div><div class='ctx'> 	int layer2;</div><div class='hunk'>@@ -711,7 +707,16 @@ struct qeth_discipline {</div><div class='ctx'> 	qdio_handler_t *input_handler;</div><div class='ctx'> 	qdio_handler_t *output_handler;</div><div class='ctx'> 	int (*recover)(void *ptr);</div><div class='del'>-	struct ccwgroup_driver *ccwgdriver;</div><div class='add'>+	int (*setup) (struct ccwgroup_device *);</div><div class='add'>+	void (*remove) (struct ccwgroup_device *);</div><div class='add'>+	int (*set_online) (struct ccwgroup_device *);</div><div class='add'>+	int (*set_offline) (struct ccwgroup_device *);</div><div class='add'>+	void (*shutdown)(struct ccwgroup_device *);</div><div class='add'>+	int (*prepare) (struct ccwgroup_device *);</div><div class='add'>+	void (*complete) (struct ccwgroup_device *);</div><div class='add'>+	int (*freeze)(struct ccwgroup_device *);</div><div class='add'>+	int (*thaw) (struct ccwgroup_device *);</div><div class='add'>+	int (*restore)(struct ccwgroup_device *);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct qeth_vlan_vid {</div><div class='hunk'>@@ -775,7 +780,7 @@ struct qeth_card {</div><div class='ctx'> 	struct qeth_perf_stats perf_stats;</div><div class='ctx'> 	int read_or_write_problem;</div><div class='ctx'> 	struct qeth_osn_info osn_info;</div><div class='del'>-	struct qeth_discipline discipline;</div><div class='add'>+	struct qeth_discipline *discipline;</div><div class='ctx'> 	atomic_t force_alloc_skb;</div><div class='ctx'> 	struct service_level qeth_service_level;</div><div class='ctx'> 	struct qdio_ssqd_desc ssqd;</div><div class='hunk'>@@ -841,16 +846,15 @@ static inline int qeth_is_diagass_supported(struct qeth_card *card,</div><div class='ctx'> 	return card-&gt;info.diagass_support &amp; (__u32)cmd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern struct ccwgroup_driver qeth_l2_ccwgroup_driver;</div><div class='del'>-extern struct ccwgroup_driver qeth_l3_ccwgroup_driver;</div><div class='add'>+extern struct qeth_discipline qeth_l2_discipline;</div><div class='add'>+extern struct qeth_discipline qeth_l3_discipline;</div><div class='add'>+extern const struct attribute_group *qeth_generic_attr_groups[];</div><div class='add'>+extern const struct attribute_group *qeth_osn_attr_groups[];</div><div class='add'>+</div><div class='ctx'> const char *qeth_get_cardname_short(struct qeth_card *);</div><div class='ctx'> int qeth_realloc_buffer_pool(struct qeth_card *, int);</div><div class='ctx'> int qeth_core_load_discipline(struct qeth_card *, enum qeth_discipline_id);</div><div class='ctx'> void qeth_core_free_discipline(struct qeth_card *);</div><div class='del'>-int qeth_core_create_device_attributes(struct device *);</div><div class='del'>-void qeth_core_remove_device_attributes(struct device *);</div><div class='del'>-int qeth_core_create_osn_attributes(struct device *);</div><div class='del'>-void qeth_core_remove_osn_attributes(struct device *);</div><div class='ctx'> void qeth_buffer_reclaim_work(struct work_struct *);</div><div class='ctx'> </div><div class='ctx'> /* exports for qeth discipline device drivers */</div><div class='head'>diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c<br/>index 120955c66410..e118e1e1e1c1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/qeth_core_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/qeth_core_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/qeth_core_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_core_main.c</a></div><div class='hunk'>@@ -1329,8 +1329,6 @@ static void qeth_set_intial_options(struct qeth_card *card)</div><div class='ctx'> {</div><div class='ctx'> 	card-&gt;options.route4.type = NO_ROUTER;</div><div class='ctx'> 	card-&gt;options.route6.type = NO_ROUTER;</div><div class='del'>-	card-&gt;options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;</div><div class='del'>-	card-&gt;options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;</div><div class='ctx'> 	card-&gt;options.fake_broadcast = 0;</div><div class='ctx'> 	card-&gt;options.add_hhlen = DEFAULT_ADD_HHLEN;</div><div class='ctx'> 	card-&gt;options.performance_stats = 0;</div><div class='hunk'>@@ -1365,7 +1363,7 @@ static void qeth_start_kernel_thread(struct work_struct *work)</div><div class='ctx'> 	    card-&gt;write.state != CH_STATE_UP)</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {</div><div class='del'>-		ts = kthread_run(card-&gt;discipline.recover, (void *)card,</div><div class='add'>+		ts = kthread_run(card-&gt;discipline-&gt;recover, (void *)card,</div><div class='ctx'> 				"qeth_recover");</div><div class='ctx'> 		if (IS_ERR(ts)) {</div><div class='ctx'> 			qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);</div><div class='hunk'>@@ -1672,7 +1670,8 @@ static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)</div><div class='ctx'> {</div><div class='ctx'> 	QETH_DBF_TEXT(SETUP, 2, "cfgblkt");</div><div class='ctx'> </div><div class='del'>-	if (prcd[74] == 0xF0 &amp;&amp; prcd[75] == 0xF0 &amp;&amp; prcd[76] == 0xF5) {</div><div class='add'>+	if (prcd[74] == 0xF0 &amp;&amp; prcd[75] == 0xF0 &amp;&amp;</div><div class='add'>+	    (prcd[76] == 0xF5 || prcd[76] == 0xF6)) {</div><div class='ctx'> 		card-&gt;info.blkt.time_total = 250;</div><div class='ctx'> 		card-&gt;info.blkt.inter_packet = 5;</div><div class='ctx'> 		card-&gt;info.blkt.inter_packet_jumbo = 15;</div><div class='hunk'>@@ -3338,7 +3337,7 @@ static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		queue-&gt;card-&gt;stats.tx_errors += count;</div><div class='ctx'> 		/* ignore temporary SIGA errors without busy condition */</div><div class='del'>-		if (rc == QDIO_ERROR_SIGA_TARGET)</div><div class='add'>+		if (rc == -ENOBUFS)</div><div class='ctx'> 			return;</div><div class='ctx'> 		QETH_CARD_TEXT(queue-&gt;card, 2, "flushbuf");</div><div class='ctx'> 		QETH_CARD_TEXT_(queue-&gt;card, 2, " q%d", queue-&gt;queue_no);</div><div class='hunk'>@@ -3532,7 +3531,7 @@ void qeth_qdio_output_handler(struct ccw_device *ccwdev,</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	QETH_CARD_TEXT(card, 6, "qdouhdl");</div><div class='del'>-	if (qdio_error &amp; QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {</div><div class='add'>+	if (qdio_error &amp; QDIO_ERROR_FATAL) {</div><div class='ctx'> 		QETH_CARD_TEXT(card, 2, "achkcond");</div><div class='ctx'> 		netif_stop_queue(card-&gt;dev);</div><div class='ctx'> 		qeth_schedule_recovery(card);</div><div class='hunk'>@@ -4540,7 +4539,8 @@ static void qeth_determine_capabilities(struct qeth_card *card)</div><div class='ctx'> 		goto out_offline;</div><div class='ctx'> 	}</div><div class='ctx'> 	qeth_configure_unitaddr(card, prcd);</div><div class='del'>-	qeth_configure_blkt_default(card, prcd);</div><div class='add'>+	if (ddev_offline)</div><div class='add'>+		qeth_configure_blkt_default(card, prcd);</div><div class='ctx'> 	kfree(prcd);</div><div class='ctx'> </div><div class='ctx'> 	rc = qdio_get_ssqd_desc(ddev, &amp;card-&gt;ssqd);</div><div class='hunk'>@@ -4627,7 +4627,7 @@ static int qeth_qdio_establish(struct qeth_card *card)</div><div class='ctx'> 		goto out_free_in_sbals;</div><div class='ctx'> 	}</div><div class='ctx'> 	for (i = 0; i &lt; card-&gt;qdio.no_in_queues; ++i)</div><div class='del'>-		queue_start_poll[i] = card-&gt;discipline.start_poll;</div><div class='add'>+		queue_start_poll[i] = card-&gt;discipline-&gt;start_poll;</div><div class='ctx'> </div><div class='ctx'> 	qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);</div><div class='ctx'> </div><div class='hunk'>@@ -4651,8 +4651,8 @@ static int qeth_qdio_establish(struct qeth_card *card)</div><div class='ctx'> 	init_data.qib_param_field        = qib_param_field;</div><div class='ctx'> 	init_data.no_input_qs            = card-&gt;qdio.no_in_queues;</div><div class='ctx'> 	init_data.no_output_qs           = card-&gt;qdio.no_out_queues;</div><div class='del'>-	init_data.input_handler          = card-&gt;discipline.input_handler;</div><div class='del'>-	init_data.output_handler         = card-&gt;discipline.output_handler;</div><div class='add'>+	init_data.input_handler 	 = card-&gt;discipline-&gt;input_handler;</div><div class='add'>+	init_data.output_handler	 = card-&gt;discipline-&gt;output_handler;</div><div class='ctx'> 	init_data.queue_start_poll_array = queue_start_poll;</div><div class='ctx'> 	init_data.int_parm               = (unsigned long) card;</div><div class='ctx'> 	init_data.input_sbal_addr_array  = (void **) in_sbal_ptrs;</div><div class='hunk'>@@ -4737,13 +4737,6 @@ static struct ccw_driver qeth_ccw_driver = {</div><div class='ctx'> 	.remove = ccwgroup_remove_ccwdev,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int qeth_core_driver_group(const char *buf, struct device *root_dev,</div><div class='del'>-				unsigned long driver_id)</div><div class='del'>-{</div><div class='del'>-	return ccwgroup_create_from_string(root_dev, driver_id,</div><div class='del'>-					   &amp;qeth_ccw_driver, 3, buf);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int qeth_core_hardsetup_card(struct qeth_card *card)</div><div class='ctx'> {</div><div class='ctx'> 	int retries = 0;</div><div class='hunk'>@@ -4909,11 +4902,7 @@ struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case QETH_HEADER_TYPE_LAYER3:</div><div class='ctx'> 		skb_len = (*hdr)-&gt;hdr.l3.length;</div><div class='del'>-		if ((card-&gt;info.link_type == QETH_LINK_TYPE_LANE_TR) ||</div><div class='del'>-		    (card-&gt;info.link_type == QETH_LINK_TYPE_HSTR))</div><div class='del'>-			headroom = TR_HLEN;</div><div class='del'>-		else</div><div class='del'>-			headroom = ETH_HLEN;</div><div class='add'>+		headroom = ETH_HLEN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case QETH_HEADER_TYPE_OSN:</div><div class='ctx'> 		skb_len = (*hdr)-&gt;hdr.osn.pdu_length;</div><div class='hunk'>@@ -5044,17 +5033,15 @@ int qeth_core_load_discipline(struct qeth_card *card,</div><div class='ctx'> 	mutex_lock(&amp;qeth_mod_mutex);</div><div class='ctx'> 	switch (discipline) {</div><div class='ctx'> 	case QETH_DISCIPLINE_LAYER3:</div><div class='del'>-		card-&gt;discipline.ccwgdriver = try_then_request_module(</div><div class='del'>-			symbol_get(qeth_l3_ccwgroup_driver),</div><div class='del'>-			"qeth_l3");</div><div class='add'>+		card-&gt;discipline = try_then_request_module(</div><div class='add'>+			symbol_get(qeth_l3_discipline), "qeth_l3");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case QETH_DISCIPLINE_LAYER2:</div><div class='del'>-		card-&gt;discipline.ccwgdriver = try_then_request_module(</div><div class='del'>-			symbol_get(qeth_l2_ccwgroup_driver),</div><div class='del'>-			"qeth_l2");</div><div class='add'>+		card-&gt;discipline = try_then_request_module(</div><div class='add'>+			symbol_get(qeth_l2_discipline), "qeth_l2");</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	if (!card-&gt;discipline.ccwgdriver) {</div><div class='add'>+	if (!card-&gt;discipline) {</div><div class='ctx'> 		dev_err(&amp;card-&gt;gdev-&gt;dev, "There is no kernel module to "</div><div class='ctx'> 			"support discipline %d\n", discipline);</div><div class='ctx'> 		rc = -EINVAL;</div><div class='hunk'>@@ -5066,12 +5053,21 @@ int qeth_core_load_discipline(struct qeth_card *card,</div><div class='ctx'> void qeth_core_free_discipline(struct qeth_card *card)</div><div class='ctx'> {</div><div class='ctx'> 	if (card-&gt;options.layer2)</div><div class='del'>-		symbol_put(qeth_l2_ccwgroup_driver);</div><div class='add'>+		symbol_put(qeth_l2_discipline);</div><div class='ctx'> 	else</div><div class='del'>-		symbol_put(qeth_l3_ccwgroup_driver);</div><div class='del'>-	card-&gt;discipline.ccwgdriver = NULL;</div><div class='add'>+		symbol_put(qeth_l3_discipline);</div><div class='add'>+	card-&gt;discipline = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct device_type qeth_generic_devtype = {</div><div class='add'>+	.name = "qeth_generic",</div><div class='add'>+	.groups = qeth_generic_attr_groups,</div><div class='add'>+};</div><div class='add'>+static const struct device_type qeth_osn_devtype = {</div><div class='add'>+	.name = "qeth_osn",</div><div class='add'>+	.groups = qeth_osn_attr_groups,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int qeth_core_probe_device(struct ccwgroup_device *gdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct qeth_card *card;</div><div class='hunk'>@@ -5126,18 +5122,17 @@ static int qeth_core_probe_device(struct ccwgroup_device *gdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (card-&gt;info.type == QETH_CARD_TYPE_OSN)</div><div class='del'>-		rc = qeth_core_create_osn_attributes(dev);</div><div class='add'>+		gdev-&gt;dev.type = &amp;qeth_osn_devtype;</div><div class='ctx'> 	else</div><div class='del'>-		rc = qeth_core_create_device_attributes(dev);</div><div class='del'>-	if (rc)</div><div class='del'>-		goto err_dbf;</div><div class='add'>+		gdev-&gt;dev.type = &amp;qeth_generic_devtype;</div><div class='add'>+</div><div class='ctx'> 	switch (card-&gt;info.type) {</div><div class='ctx'> 	case QETH_CARD_TYPE_OSN:</div><div class='ctx'> 	case QETH_CARD_TYPE_OSM:</div><div class='ctx'> 		rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);</div><div class='ctx'> 		if (rc)</div><div class='del'>-			goto err_attr;</div><div class='del'>-		rc = card-&gt;discipline.ccwgdriver-&gt;probe(card-&gt;gdev);</div><div class='add'>+			goto err_dbf;</div><div class='add'>+		rc = card-&gt;discipline-&gt;setup(card-&gt;gdev);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			goto err_disc;</div><div class='ctx'> 	case QETH_CARD_TYPE_OSD:</div><div class='hunk'>@@ -5155,11 +5150,6 @@ static int qeth_core_probe_device(struct ccwgroup_device *gdev)</div><div class='ctx'> </div><div class='ctx'> err_disc:</div><div class='ctx'> 	qeth_core_free_discipline(card);</div><div class='del'>-err_attr:</div><div class='del'>-	if (card-&gt;info.type == QETH_CARD_TYPE_OSN)</div><div class='del'>-		qeth_core_remove_osn_attributes(dev);</div><div class='del'>-	else</div><div class='del'>-		qeth_core_remove_device_attributes(dev);</div><div class='ctx'> err_dbf:</div><div class='ctx'> 	debug_unregister(card-&gt;debug);</div><div class='ctx'> err_card:</div><div class='hunk'>@@ -5176,14 +5166,8 @@ static void qeth_core_remove_device(struct ccwgroup_device *gdev)</div><div class='ctx'> </div><div class='ctx'> 	QETH_DBF_TEXT(SETUP, 2, "removedv");</div><div class='ctx'> </div><div class='del'>-	if (card-&gt;info.type == QETH_CARD_TYPE_OSN) {</div><div class='del'>-		qeth_core_remove_osn_attributes(&amp;gdev-&gt;dev);</div><div class='del'>-	} else {</div><div class='del'>-		qeth_core_remove_device_attributes(&amp;gdev-&gt;dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (card-&gt;discipline.ccwgdriver) {</div><div class='del'>-		card-&gt;discipline.ccwgdriver-&gt;remove(gdev);</div><div class='add'>+	if (card-&gt;discipline) {</div><div class='add'>+		card-&gt;discipline-&gt;remove(gdev);</div><div class='ctx'> 		qeth_core_free_discipline(card);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5203,7 +5187,7 @@ static int qeth_core_set_online(struct ccwgroup_device *gdev)</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> 	int def_discipline;</div><div class='ctx'> </div><div class='del'>-	if (!card-&gt;discipline.ccwgdriver) {</div><div class='add'>+	if (!card-&gt;discipline) {</div><div class='ctx'> 		if (card-&gt;info.type == QETH_CARD_TYPE_IQD)</div><div class='ctx'> 			def_discipline = QETH_DISCIPLINE_LAYER3;</div><div class='ctx'> 		else</div><div class='hunk'>@@ -5211,11 +5195,11 @@ static int qeth_core_set_online(struct ccwgroup_device *gdev)</div><div class='ctx'> 		rc = qeth_core_load_discipline(card, def_discipline);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			goto err;</div><div class='del'>-		rc = card-&gt;discipline.ccwgdriver-&gt;probe(card-&gt;gdev);</div><div class='add'>+		rc = card-&gt;discipline-&gt;setup(card-&gt;gdev);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 	}</div><div class='del'>-	rc = card-&gt;discipline.ccwgdriver-&gt;set_online(gdev);</div><div class='add'>+	rc = card-&gt;discipline-&gt;set_online(gdev);</div><div class='ctx'> err:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='hunk'>@@ -5223,58 +5207,52 @@ err:</div><div class='ctx'> static int qeth_core_set_offline(struct ccwgroup_device *gdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct qeth_card *card = dev_get_drvdata(&amp;gdev-&gt;dev);</div><div class='del'>-	return card-&gt;discipline.ccwgdriver-&gt;set_offline(gdev);</div><div class='add'>+	return card-&gt;discipline-&gt;set_offline(gdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void qeth_core_shutdown(struct ccwgroup_device *gdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct qeth_card *card = dev_get_drvdata(&amp;gdev-&gt;dev);</div><div class='del'>-	if (card-&gt;discipline.ccwgdriver &amp;&amp;</div><div class='del'>-	    card-&gt;discipline.ccwgdriver-&gt;shutdown)</div><div class='del'>-		card-&gt;discipline.ccwgdriver-&gt;shutdown(gdev);</div><div class='add'>+	if (card-&gt;discipline &amp;&amp; card-&gt;discipline-&gt;shutdown)</div><div class='add'>+		card-&gt;discipline-&gt;shutdown(gdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qeth_core_prepare(struct ccwgroup_device *gdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct qeth_card *card = dev_get_drvdata(&amp;gdev-&gt;dev);</div><div class='del'>-	if (card-&gt;discipline.ccwgdriver &amp;&amp;</div><div class='del'>-	    card-&gt;discipline.ccwgdriver-&gt;prepare)</div><div class='del'>-		return card-&gt;discipline.ccwgdriver-&gt;prepare(gdev);</div><div class='add'>+	if (card-&gt;discipline &amp;&amp; card-&gt;discipline-&gt;prepare)</div><div class='add'>+		return card-&gt;discipline-&gt;prepare(gdev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void qeth_core_complete(struct ccwgroup_device *gdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct qeth_card *card = dev_get_drvdata(&amp;gdev-&gt;dev);</div><div class='del'>-	if (card-&gt;discipline.ccwgdriver &amp;&amp;</div><div class='del'>-	    card-&gt;discipline.ccwgdriver-&gt;complete)</div><div class='del'>-		card-&gt;discipline.ccwgdriver-&gt;complete(gdev);</div><div class='add'>+	if (card-&gt;discipline &amp;&amp; card-&gt;discipline-&gt;complete)</div><div class='add'>+		card-&gt;discipline-&gt;complete(gdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qeth_core_freeze(struct ccwgroup_device *gdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct qeth_card *card = dev_get_drvdata(&amp;gdev-&gt;dev);</div><div class='del'>-	if (card-&gt;discipline.ccwgdriver &amp;&amp;</div><div class='del'>-	    card-&gt;discipline.ccwgdriver-&gt;freeze)</div><div class='del'>-		return card-&gt;discipline.ccwgdriver-&gt;freeze(gdev);</div><div class='add'>+	if (card-&gt;discipline &amp;&amp; card-&gt;discipline-&gt;freeze)</div><div class='add'>+		return card-&gt;discipline-&gt;freeze(gdev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qeth_core_thaw(struct ccwgroup_device *gdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct qeth_card *card = dev_get_drvdata(&amp;gdev-&gt;dev);</div><div class='del'>-	if (card-&gt;discipline.ccwgdriver &amp;&amp;</div><div class='del'>-	    card-&gt;discipline.ccwgdriver-&gt;thaw)</div><div class='del'>-		return card-&gt;discipline.ccwgdriver-&gt;thaw(gdev);</div><div class='add'>+	if (card-&gt;discipline &amp;&amp; card-&gt;discipline-&gt;thaw)</div><div class='add'>+		return card-&gt;discipline-&gt;thaw(gdev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qeth_core_restore(struct ccwgroup_device *gdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct qeth_card *card = dev_get_drvdata(&amp;gdev-&gt;dev);</div><div class='del'>-	if (card-&gt;discipline.ccwgdriver &amp;&amp;</div><div class='del'>-	    card-&gt;discipline.ccwgdriver-&gt;restore)</div><div class='del'>-		return card-&gt;discipline.ccwgdriver-&gt;restore(gdev);</div><div class='add'>+	if (card-&gt;discipline &amp;&amp; card-&gt;discipline-&gt;restore)</div><div class='add'>+		return card-&gt;discipline-&gt;restore(gdev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5283,8 +5261,7 @@ static struct ccwgroup_driver qeth_core_ccwgroup_driver = {</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 		.name = "qeth",</div><div class='ctx'> 	},</div><div class='del'>-	.driver_id = 0xD8C5E3C8,</div><div class='del'>-	.probe = qeth_core_probe_device,</div><div class='add'>+	.setup = qeth_core_probe_device,</div><div class='ctx'> 	.remove = qeth_core_remove_device,</div><div class='ctx'> 	.set_online = qeth_core_set_online,</div><div class='ctx'> 	.set_offline = qeth_core_set_offline,</div><div class='hunk'>@@ -5296,21 +5273,30 @@ static struct ccwgroup_driver qeth_core_ccwgroup_driver = {</div><div class='ctx'> 	.restore = qeth_core_restore,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static ssize_t</div><div class='del'>-qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,</div><div class='del'>-			   size_t count)</div><div class='add'>+static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,</div><div class='add'>+					    const char *buf, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='del'>-	err = qeth_core_driver_group(buf, qeth_core_root_dev,</div><div class='del'>-					qeth_core_ccwgroup_driver.driver_id);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-	else</div><div class='del'>-		return count;</div><div class='del'>-}</div><div class='ctx'> </div><div class='add'>+	err = ccwgroup_create_dev(qeth_core_root_dev,</div><div class='add'>+				  &amp;qeth_core_ccwgroup_driver, 3, buf);</div><div class='add'>+</div><div class='add'>+	return err ? err : count;</div><div class='add'>+}</div><div class='ctx'> static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);</div><div class='ctx'> </div><div class='add'>+static struct attribute *qeth_drv_attrs[] = {</div><div class='add'>+	&amp;driver_attr_group.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+static struct attribute_group qeth_drv_attr_group = {</div><div class='add'>+	.attrs = qeth_drv_attrs,</div><div class='add'>+};</div><div class='add'>+static const struct attribute_group *qeth_drv_attr_groups[] = {</div><div class='add'>+	&amp;qeth_drv_attr_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct {</div><div class='ctx'> 	const char str[ETH_GSTRING_LEN];</div><div class='ctx'> } qeth_ethtool_stats_keys[] = {</div><div class='hunk'>@@ -5548,49 +5534,41 @@ static int __init qeth_core_init(void)</div><div class='ctx'> 	rc = qeth_register_dbf_views();</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto out_err;</div><div class='del'>-	rc = ccw_driver_register(&amp;qeth_ccw_driver);</div><div class='del'>-	if (rc)</div><div class='del'>-		goto ccw_err;</div><div class='del'>-	rc = ccwgroup_driver_register(&amp;qeth_core_ccwgroup_driver);</div><div class='del'>-	if (rc)</div><div class='del'>-		goto ccwgroup_err;</div><div class='del'>-	rc = driver_create_file(&amp;qeth_core_ccwgroup_driver.driver,</div><div class='del'>-				&amp;driver_attr_group);</div><div class='del'>-	if (rc)</div><div class='del'>-		goto driver_err;</div><div class='ctx'> 	qeth_core_root_dev = root_device_register("qeth");</div><div class='ctx'> 	rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto register_err;</div><div class='del'>-</div><div class='ctx'> 	qeth_core_header_cache = kmem_cache_create("qeth_hdr",</div><div class='ctx'> 			sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);</div><div class='ctx'> 	if (!qeth_core_header_cache) {</div><div class='ctx'> 		rc = -ENOMEM;</div><div class='ctx'> 		goto slab_err;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",</div><div class='ctx'> 			sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);</div><div class='ctx'> 	if (!qeth_qdio_outbuf_cache) {</div><div class='ctx'> 		rc = -ENOMEM;</div><div class='ctx'> 		goto cqslab_err;</div><div class='ctx'> 	}</div><div class='add'>+	rc = ccw_driver_register(&amp;qeth_ccw_driver);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto ccw_err;</div><div class='add'>+	qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;</div><div class='add'>+	rc = ccwgroup_driver_register(&amp;qeth_core_ccwgroup_driver);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto ccwgroup_err;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+ccwgroup_err:</div><div class='add'>+	ccw_driver_unregister(&amp;qeth_ccw_driver);</div><div class='add'>+ccw_err:</div><div class='add'>+	kmem_cache_destroy(qeth_qdio_outbuf_cache);</div><div class='ctx'> cqslab_err:</div><div class='ctx'> 	kmem_cache_destroy(qeth_core_header_cache);</div><div class='ctx'> slab_err:</div><div class='ctx'> 	root_device_unregister(qeth_core_root_dev);</div><div class='ctx'> register_err:</div><div class='del'>-	driver_remove_file(&amp;qeth_core_ccwgroup_driver.driver,</div><div class='del'>-			   &amp;driver_attr_group);</div><div class='del'>-driver_err:</div><div class='del'>-	ccwgroup_driver_unregister(&amp;qeth_core_ccwgroup_driver);</div><div class='del'>-ccwgroup_err:</div><div class='del'>-	ccw_driver_unregister(&amp;qeth_ccw_driver);</div><div class='del'>-ccw_err:</div><div class='del'>-	QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);</div><div class='ctx'> 	qeth_unregister_dbf_views();</div><div class='ctx'> out_err:</div><div class='ctx'> 	pr_err("Initializing the qeth device driver failed\n");</div><div class='hunk'>@@ -5599,13 +5577,11 @@ out_err:</div><div class='ctx'> </div><div class='ctx'> static void __exit qeth_core_exit(void)</div><div class='ctx'> {</div><div class='del'>-	root_device_unregister(qeth_core_root_dev);</div><div class='del'>-	driver_remove_file(&amp;qeth_core_ccwgroup_driver.driver,</div><div class='del'>-			   &amp;driver_attr_group);</div><div class='ctx'> 	ccwgroup_driver_unregister(&amp;qeth_core_ccwgroup_driver);</div><div class='ctx'> 	ccw_driver_unregister(&amp;qeth_ccw_driver);</div><div class='ctx'> 	kmem_cache_destroy(qeth_qdio_outbuf_cache);</div><div class='ctx'> 	kmem_cache_destroy(qeth_core_header_cache);</div><div class='add'>+	root_device_unregister(qeth_core_root_dev);</div><div class='ctx'> 	qeth_unregister_dbf_views();</div><div class='ctx'> 	pr_info("core functions removed\n");</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/s390/net/qeth_core_mpc.h b/drivers/s390/net/qeth_core_mpc.h<br/>index ff41e42004ac..a11b30c38423 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/qeth_core_mpc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/qeth_core_mpc.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/qeth_core_mpc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_core_mpc.h</a></div><div class='hunk'>@@ -70,16 +70,6 @@ enum qeth_link_types {</div><div class='ctx'> 	QETH_LINK_TYPE_ATM_NATIVE   = 0x90,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum qeth_tr_macaddr_modes {</div><div class='del'>-	QETH_TR_MACADDR_NONCANONICAL = 0,</div><div class='del'>-	QETH_TR_MACADDR_CANONICAL    = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum qeth_tr_broadcast_modes {</div><div class='del'>-	QETH_TR_BROADCAST_ALLRINGS = 0,</div><div class='del'>-	QETH_TR_BROADCAST_LOCAL    = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Routing stuff</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/s390/net/qeth_core_sys.c b/drivers/s390/net/qeth_core_sys.c<br/>index 0a8e86c1b0ea..f163af575c48 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/qeth_core_sys.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/qeth_core_sys.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/qeth_core_sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_core_sys.c</a></div><div class='hunk'>@@ -434,8 +434,8 @@ static ssize_t qeth_dev_layer2_store(struct device *dev,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	else {</div><div class='ctx'> 		card-&gt;info.mac_bits  = 0;</div><div class='del'>-		if (card-&gt;discipline.ccwgdriver) {</div><div class='del'>-			card-&gt;discipline.ccwgdriver-&gt;remove(card-&gt;gdev);</div><div class='add'>+		if (card-&gt;discipline) {</div><div class='add'>+			card-&gt;discipline-&gt;remove(card-&gt;gdev);</div><div class='ctx'> 			qeth_core_free_discipline(card);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -444,7 +444,7 @@ static ssize_t qeth_dev_layer2_store(struct device *dev,</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	rc = card-&gt;discipline.ccwgdriver-&gt;probe(card-&gt;gdev);</div><div class='add'>+	rc = card-&gt;discipline-&gt;setup(card-&gt;gdev);</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;card-&gt;discipline_mutex);</div><div class='ctx'> 	return rc ? rc : count;</div><div class='hunk'>@@ -693,7 +693,6 @@ static struct attribute *qeth_blkt_device_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_inter_jumbo.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='del'>-</div><div class='ctx'> static struct attribute_group qeth_device_blkt_group = {</div><div class='ctx'> 	.name = "blkt",</div><div class='ctx'> 	.attrs = qeth_blkt_device_attrs,</div><div class='hunk'>@@ -716,11 +715,16 @@ static struct attribute *qeth_device_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_hw_trap.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='del'>-</div><div class='ctx'> static struct attribute_group qeth_device_attr_group = {</div><div class='ctx'> 	.attrs = qeth_device_attrs,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+const struct attribute_group *qeth_generic_attr_groups[] = {</div><div class='add'>+	&amp;qeth_device_attr_group,</div><div class='add'>+	&amp;qeth_device_blkt_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct attribute *qeth_osn_device_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_state.attr,</div><div class='ctx'> 	&amp;dev_attr_chpid.attr,</div><div class='hunk'>@@ -730,37 +734,10 @@ static struct attribute *qeth_osn_device_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_recover.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='del'>-</div><div class='ctx'> static struct attribute_group qeth_osn_device_attr_group = {</div><div class='ctx'> 	.attrs = qeth_osn_device_attrs,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-int qeth_core_create_device_attributes(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	ret = sysfs_create_group(&amp;dev-&gt;kobj, &amp;qeth_device_attr_group);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-	ret = sysfs_create_group(&amp;dev-&gt;kobj, &amp;qeth_device_blkt_group);</div><div class='del'>-	if (ret)</div><div class='del'>-		sysfs_remove_group(&amp;dev-&gt;kobj, &amp;qeth_device_attr_group);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void qeth_core_remove_device_attributes(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	sysfs_remove_group(&amp;dev-&gt;kobj, &amp;qeth_device_attr_group);</div><div class='del'>-	sysfs_remove_group(&amp;dev-&gt;kobj, &amp;qeth_device_blkt_group);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int qeth_core_create_osn_attributes(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	return sysfs_create_group(&amp;dev-&gt;kobj, &amp;qeth_osn_device_attr_group);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void qeth_core_remove_osn_attributes(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	sysfs_remove_group(&amp;dev-&gt;kobj, &amp;qeth_osn_device_attr_group);</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='add'>+const struct attribute_group *qeth_osn_attr_groups[] = {</div><div class='add'>+	&amp;qeth_osn_device_attr_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/s390/net/qeth_l2_main.c b/drivers/s390/net/qeth_l2_main.c<br/>index 0e7c29d1d7ef..426986518e96 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/qeth_l2_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/qeth_l2_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/qeth_l2_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_l2_main.c</a></div><div class='hunk'>@@ -882,12 +882,6 @@ static int qeth_l2_probe_device(struct ccwgroup_device *gdev)</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;card-&gt;mc_list);</div><div class='ctx'> 	card-&gt;options.layer2 = 1;</div><div class='ctx'> 	card-&gt;info.hwtrap = 0;</div><div class='del'>-	card-&gt;discipline.start_poll = qeth_qdio_start_poll;</div><div class='del'>-	card-&gt;discipline.input_handler = (qdio_handler_t *)</div><div class='del'>-		qeth_qdio_input_handler;</div><div class='del'>-	card-&gt;discipline.output_handler = (qdio_handler_t *)</div><div class='del'>-		qeth_qdio_output_handler;</div><div class='del'>-	card-&gt;discipline.recover = qeth_l2_recover;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1227,8 +1221,12 @@ out:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct ccwgroup_driver qeth_l2_ccwgroup_driver = {</div><div class='del'>-	.probe = qeth_l2_probe_device,</div><div class='add'>+struct qeth_discipline qeth_l2_discipline = {</div><div class='add'>+	.start_poll = qeth_qdio_start_poll,</div><div class='add'>+	.input_handler = (qdio_handler_t *) qeth_qdio_input_handler,</div><div class='add'>+	.output_handler = (qdio_handler_t *) qeth_qdio_output_handler,</div><div class='add'>+	.recover = qeth_l2_recover,</div><div class='add'>+	.setup = qeth_l2_probe_device,</div><div class='ctx'> 	.remove = qeth_l2_remove_device,</div><div class='ctx'> 	.set_online = qeth_l2_set_online,</div><div class='ctx'> 	.set_offline = qeth_l2_set_offline,</div><div class='hunk'>@@ -1237,7 +1235,7 @@ struct ccwgroup_driver qeth_l2_ccwgroup_driver = {</div><div class='ctx'> 	.thaw = qeth_l2_pm_resume,</div><div class='ctx'> 	.restore = qeth_l2_pm_resume,</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL_GPL(qeth_l2_ccwgroup_driver);</div><div class='add'>+EXPORT_SYMBOL_GPL(qeth_l2_discipline);</div><div class='ctx'> </div><div class='ctx'> static int qeth_osn_send_control_data(struct qeth_card *card, int len,</div><div class='ctx'> 			   struct qeth_cmd_buffer *iob)</div><div class='head'>diff --git a/drivers/s390/net/qeth_l3_main.c b/drivers/s390/net/qeth_l3_main.c<br/>index f85921607686..7be5e9775691 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/qeth_l3_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/qeth_l3_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/qeth_l3_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_l3_main.c</a></div><div class='hunk'>@@ -976,57 +976,6 @@ static inline u8 qeth_l3_get_qeth_hdr_flags6(int cast_type)</div><div class='ctx'> 	return ct | QETH_CAST_UNICAST;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int qeth_l3_send_setadp_mode(struct qeth_card *card, __u32 command,</div><div class='del'>-					__u32 mode)</div><div class='del'>-{</div><div class='del'>-	int rc;</div><div class='del'>-	struct qeth_cmd_buffer *iob;</div><div class='del'>-	struct qeth_ipa_cmd *cmd;</div><div class='del'>-</div><div class='del'>-	QETH_CARD_TEXT(card, 4, "adpmode");</div><div class='del'>-</div><div class='del'>-	iob = qeth_get_adapter_cmd(card, command,</div><div class='del'>-				   sizeof(struct qeth_ipacmd_setadpparms));</div><div class='del'>-	cmd = (struct qeth_ipa_cmd *)(iob-&gt;data+IPA_PDU_HEADER_SIZE);</div><div class='del'>-	cmd-&gt;data.setadapterparms.data.mode = mode;</div><div class='del'>-	rc = qeth_send_ipa_cmd(card, iob, qeth_default_setadapterparms_cb,</div><div class='del'>-			       NULL);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int qeth_l3_setadapter_hstr(struct qeth_card *card)</div><div class='del'>-{</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	QETH_CARD_TEXT(card, 4, "adphstr");</div><div class='del'>-</div><div class='del'>-	if (qeth_adp_supported(card, IPA_SETADP_SET_BROADCAST_MODE)) {</div><div class='del'>-		rc = qeth_l3_send_setadp_mode(card,</div><div class='del'>-					IPA_SETADP_SET_BROADCAST_MODE,</div><div class='del'>-					card-&gt;options.broadcast_mode);</div><div class='del'>-		if (rc)</div><div class='del'>-			QETH_DBF_MESSAGE(2, "couldn't set broadcast mode on "</div><div class='del'>-				   "device %s: x%x\n",</div><div class='del'>-				   CARD_BUS_ID(card), rc);</div><div class='del'>-		rc = qeth_l3_send_setadp_mode(card,</div><div class='del'>-					IPA_SETADP_ALTER_MAC_ADDRESS,</div><div class='del'>-					card-&gt;options.macaddr_mode);</div><div class='del'>-		if (rc)</div><div class='del'>-			QETH_DBF_MESSAGE(2, "couldn't set macaddr mode on "</div><div class='del'>-				   "device %s: x%x\n", CARD_BUS_ID(card), rc);</div><div class='del'>-		return rc;</div><div class='del'>-	}</div><div class='del'>-	if (card-&gt;options.broadcast_mode == QETH_TR_BROADCAST_LOCAL)</div><div class='del'>-		QETH_DBF_MESSAGE(2, "set adapter parameters not available "</div><div class='del'>-			   "to set broadcast mode, using ALLRINGS "</div><div class='del'>-			   "on device %s:\n", CARD_BUS_ID(card));</div><div class='del'>-	if (card-&gt;options.macaddr_mode == QETH_TR_MACADDR_CANONICAL)</div><div class='del'>-		QETH_DBF_MESSAGE(2, "set adapter parameters not available "</div><div class='del'>-			   "to set macaddr mode, using NONCANONICAL "</div><div class='del'>-			   "on device %s:\n", CARD_BUS_ID(card));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int qeth_l3_setadapter_parms(struct qeth_card *card)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -1052,10 +1001,6 @@ static int qeth_l3_setadapter_parms(struct qeth_card *card)</div><div class='ctx'> 				" address failed\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((card-&gt;info.link_type == QETH_LINK_TYPE_HSTR) ||</div><div class='del'>-	    (card-&gt;info.link_type == QETH_LINK_TYPE_LANE_TR))</div><div class='del'>-		rc = qeth_l3_setadapter_hstr(card);</div><div class='del'>-</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1671,10 +1616,7 @@ qeth_diags_trace(struct qeth_card *card, enum qeth_diags_trace_cmds diags_cmd)</div><div class='ctx'> static void qeth_l3_get_mac_for_ipm(__u32 ipm, char *mac,</div><div class='ctx'> 				struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	if (dev-&gt;type == ARPHRD_IEEE802_TR)</div><div class='del'>-		ip_tr_mc_map(ipm, mac);</div><div class='del'>-	else</div><div class='del'>-		ip_eth_mc_map(ipm, mac);</div><div class='add'>+	ip_eth_mc_map(ipm, mac);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void qeth_l3_add_mc(struct qeth_card *card, struct in_device *in4_dev)</div><div class='hunk'>@@ -1922,8 +1864,6 @@ static inline int qeth_l3_rebuild_skb(struct qeth_card *card,</div><div class='ctx'> #endif</div><div class='ctx'> 			case __constant_htons(ETH_P_IP):</div><div class='ctx'> 				ip_hdr = (struct iphdr *)skb-&gt;data;</div><div class='del'>-				(card-&gt;dev-&gt;type == ARPHRD_IEEE802_TR) ?</div><div class='del'>-				ip_tr_mc_map(ip_hdr-&gt;daddr, tg_addr):</div><div class='ctx'> 				ip_eth_mc_map(ip_hdr-&gt;daddr, tg_addr);</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='hunk'>@@ -1959,12 +1899,7 @@ static inline int qeth_l3_rebuild_skb(struct qeth_card *card,</div><div class='ctx'> 				tg_addr, "FAKELL", card-&gt;dev-&gt;addr_len);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TR</div><div class='del'>-	if (card-&gt;dev-&gt;type == ARPHRD_IEEE802_TR)</div><div class='del'>-		skb-&gt;protocol = tr_type_trans(skb, card-&gt;dev);</div><div class='del'>-	else</div><div class='del'>-#endif</div><div class='del'>-		skb-&gt;protocol = eth_type_trans(skb, card-&gt;dev);</div><div class='add'>+	skb-&gt;protocol = eth_type_trans(skb, card-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	if (hdr-&gt;hdr.l3.ext_flags &amp;</div><div class='ctx'> 	    (QETH_HDR_EXT_VLAN_FRAME | QETH_HDR_EXT_INCLUDE_VLAN_TAG)) {</div><div class='hunk'>@@ -2138,7 +2073,7 @@ static int qeth_l3_verify_vlan_dev(struct net_device *dev,</div><div class='ctx'> 		struct net_device *netdev;</div><div class='ctx'> </div><div class='ctx'> 		rcu_read_lock();</div><div class='del'>-		netdev = __vlan_find_dev_deep(dev, vid);</div><div class='add'>+		netdev = __vlan_find_dev_deep(card-&gt;dev, vid);</div><div class='ctx'> 		rcu_read_unlock();</div><div class='ctx'> 		if (netdev == dev) {</div><div class='ctx'> 			rc = QETH_VLAN_CARD;</div><div class='hunk'>@@ -2883,13 +2818,7 @@ static void qeth_l3_fill_header(struct qeth_card *card, struct qeth_hdr *hdr,</div><div class='ctx'> 			hdr-&gt;hdr.l3.flags &amp;= ~QETH_HDR_PASSTHRU;</div><div class='ctx'> 		memcpy(hdr-&gt;hdr.l3.dest_addr, pkey, 16);</div><div class='ctx'> 	} else {</div><div class='del'>-		/* passthrough */</div><div class='del'>-		if ((skb-&gt;dev-&gt;type == ARPHRD_IEEE802_TR) &amp;&amp;</div><div class='del'>-			!memcmp(skb-&gt;data + sizeof(struct qeth_hdr) +</div><div class='del'>-			sizeof(__u16), skb-&gt;dev-&gt;broadcast, 6)) {</div><div class='del'>-			hdr-&gt;hdr.l3.flags = QETH_CAST_BROADCAST |</div><div class='del'>-						QETH_HDR_PASSTHRU;</div><div class='del'>-		} else if (!memcmp(skb-&gt;data + sizeof(struct qeth_hdr),</div><div class='add'>+		if (!memcmp(skb-&gt;data + sizeof(struct qeth_hdr),</div><div class='ctx'> 			    skb-&gt;dev-&gt;broadcast, 6)) {</div><div class='ctx'> 			/* broadcast? */</div><div class='ctx'> 			hdr-&gt;hdr.l3.flags = QETH_CAST_BROADCAST |</div><div class='hunk'>@@ -3031,10 +2960,7 @@ static int qeth_l3_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 			skb_pull(new_skb, ETH_HLEN);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (ipv == 4) {</div><div class='del'>-			if (card-&gt;dev-&gt;type == ARPHRD_IEEE802_TR)</div><div class='del'>-				skb_pull(new_skb, TR_HLEN);</div><div class='del'>-			else</div><div class='del'>-				skb_pull(new_skb, ETH_HLEN);</div><div class='add'>+			skb_pull(new_skb, ETH_HLEN);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (ipv != 4 &amp;&amp; vlan_tx_tag_present(new_skb)) {</div><div class='hunk'>@@ -3318,12 +3244,8 @@ static int qeth_l3_setup_netdev(struct qeth_card *card)</div><div class='ctx'> 	    card-&gt;info.type == QETH_CARD_TYPE_OSX) {</div><div class='ctx'> 		if ((card-&gt;info.link_type == QETH_LINK_TYPE_LANE_TR) ||</div><div class='ctx'> 		    (card-&gt;info.link_type == QETH_LINK_TYPE_HSTR)) {</div><div class='del'>-#ifdef CONFIG_TR</div><div class='del'>-			card-&gt;dev = alloc_trdev(0);</div><div class='del'>-#endif</div><div class='del'>-			if (!card-&gt;dev)</div><div class='del'>-				return -ENODEV;</div><div class='del'>-			card-&gt;dev-&gt;netdev_ops = &amp;qeth_l3_netdev_ops;</div><div class='add'>+			pr_info("qeth_l3: ignoring TR device\n");</div><div class='add'>+			return -ENODEV;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			card-&gt;dev = alloc_etherdev(0);</div><div class='ctx'> 			if (!card-&gt;dev)</div><div class='hunk'>@@ -3376,12 +3298,6 @@ static int qeth_l3_probe_device(struct ccwgroup_device *gdev)</div><div class='ctx'> 	qeth_l3_create_device_attributes(&amp;gdev-&gt;dev);</div><div class='ctx'> 	card-&gt;options.layer2 = 0;</div><div class='ctx'> 	card-&gt;info.hwtrap = 0;</div><div class='del'>-	card-&gt;discipline.start_poll = qeth_qdio_start_poll;</div><div class='del'>-	card-&gt;discipline.input_handler = (qdio_handler_t *)</div><div class='del'>-		qeth_qdio_input_handler;</div><div class='del'>-	card-&gt;discipline.output_handler = (qdio_handler_t *)</div><div class='del'>-		qeth_qdio_output_handler;</div><div class='del'>-	card-&gt;discipline.recover = qeth_l3_recover;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3656,8 +3572,12 @@ out:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct ccwgroup_driver qeth_l3_ccwgroup_driver = {</div><div class='del'>-	.probe = qeth_l3_probe_device,</div><div class='add'>+struct qeth_discipline qeth_l3_discipline = {</div><div class='add'>+	.start_poll = qeth_qdio_start_poll,</div><div class='add'>+	.input_handler = (qdio_handler_t *) qeth_qdio_input_handler,</div><div class='add'>+	.output_handler = (qdio_handler_t *) qeth_qdio_output_handler,</div><div class='add'>+	.recover = qeth_l3_recover,</div><div class='add'>+	.setup = qeth_l3_probe_device,</div><div class='ctx'> 	.remove = qeth_l3_remove_device,</div><div class='ctx'> 	.set_online = qeth_l3_set_online,</div><div class='ctx'> 	.set_offline = qeth_l3_set_offline,</div><div class='hunk'>@@ -3666,7 +3586,7 @@ struct ccwgroup_driver qeth_l3_ccwgroup_driver = {</div><div class='ctx'> 	.thaw = qeth_l3_pm_resume,</div><div class='ctx'> 	.restore = qeth_l3_pm_resume,</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL_GPL(qeth_l3_ccwgroup_driver);</div><div class='add'>+EXPORT_SYMBOL_GPL(qeth_l3_discipline);</div><div class='ctx'> </div><div class='ctx'> static int qeth_l3_ip_event(struct notifier_block *this,</div><div class='ctx'> 			    unsigned long event, void *ptr)</div><div class='hunk'>@@ -3680,9 +3600,9 @@ static int qeth_l3_ip_event(struct notifier_block *this,</div><div class='ctx'> 		return NOTIFY_DONE;</div><div class='ctx'> </div><div class='ctx'> 	card = qeth_l3_get_card_from_dev(dev);</div><div class='del'>-	QETH_CARD_TEXT(card, 3, "ipevent");</div><div class='ctx'> 	if (!card)</div><div class='ctx'> 		return NOTIFY_DONE;</div><div class='add'>+	QETH_CARD_TEXT(card, 3, "ipevent");</div><div class='ctx'> </div><div class='ctx'> 	addr = qeth_l3_get_addr_buffer(QETH_PROT_IPV4);</div><div class='ctx'> 	if (addr != NULL) {</div><div class='head'>diff --git a/drivers/s390/net/qeth_l3_sys.c b/drivers/s390/net/qeth_l3_sys.c<br/>index d979bb26522f..4cafedf950ad 100644<br/>--- a/<a href='/drm-misc/tree/drivers/s390/net/qeth_l3_sys.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/s390/net/qeth_l3_sys.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/s390/net/qeth_l3_sys.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/s390/net/qeth_l3_sys.c</a></div><div class='hunk'>@@ -175,116 +175,6 @@ out:</div><div class='ctx'> static DEVICE_ATTR(fake_broadcast, 0644, qeth_l3_dev_fake_broadcast_show,</div><div class='ctx'> 		   qeth_l3_dev_fake_broadcast_store);</div><div class='ctx'> </div><div class='del'>-static ssize_t qeth_l3_dev_broadcast_mode_show(struct device *dev,</div><div class='del'>-				struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	struct qeth_card *card = dev_get_drvdata(dev);</div><div class='del'>-</div><div class='del'>-	if (!card)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!((card-&gt;info.link_type == QETH_LINK_TYPE_HSTR) ||</div><div class='del'>-	      (card-&gt;info.link_type == QETH_LINK_TYPE_LANE_TR)))</div><div class='del'>-		return sprintf(buf, "n/a\n");</div><div class='del'>-</div><div class='del'>-	return sprintf(buf, "%s\n", (card-&gt;options.broadcast_mode ==</div><div class='del'>-				     QETH_TR_BROADCAST_ALLRINGS)?</div><div class='del'>-		       "all rings":"local");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t qeth_l3_dev_broadcast_mode_store(struct device *dev,</div><div class='del'>-		struct device_attribute *attr, const char *buf, size_t count)</div><div class='del'>-{</div><div class='del'>-	struct qeth_card *card = dev_get_drvdata(dev);</div><div class='del'>-	char *tmp;</div><div class='del'>-	int rc = 0;</div><div class='del'>-</div><div class='del'>-	if (!card)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;card-&gt;conf_mutex);</div><div class='del'>-	if ((card-&gt;state != CARD_STATE_DOWN) &amp;&amp;</div><div class='del'>-	    (card-&gt;state != CARD_STATE_RECOVER)) {</div><div class='del'>-		rc = -EPERM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!((card-&gt;info.link_type == QETH_LINK_TYPE_HSTR) ||</div><div class='del'>-	      (card-&gt;info.link_type == QETH_LINK_TYPE_LANE_TR))) {</div><div class='del'>-		rc = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tmp = strsep((char **) &amp;buf, "\n");</div><div class='del'>-</div><div class='del'>-	if (!strcmp(tmp, "local"))</div><div class='del'>-		card-&gt;options.broadcast_mode = QETH_TR_BROADCAST_LOCAL;</div><div class='del'>-	else if (!strcmp(tmp, "all_rings"))</div><div class='del'>-		card-&gt;options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;</div><div class='del'>-	else</div><div class='del'>-		rc = -EINVAL;</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;card-&gt;conf_mutex);</div><div class='del'>-	return rc ? rc : count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DEVICE_ATTR(broadcast_mode, 0644, qeth_l3_dev_broadcast_mode_show,</div><div class='del'>-		   qeth_l3_dev_broadcast_mode_store);</div><div class='del'>-</div><div class='del'>-static ssize_t qeth_l3_dev_canonical_macaddr_show(struct device *dev,</div><div class='del'>-				struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	struct qeth_card *card = dev_get_drvdata(dev);</div><div class='del'>-</div><div class='del'>-	if (!card)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!((card-&gt;info.link_type == QETH_LINK_TYPE_HSTR) ||</div><div class='del'>-	      (card-&gt;info.link_type == QETH_LINK_TYPE_LANE_TR)))</div><div class='del'>-		return sprintf(buf, "n/a\n");</div><div class='del'>-</div><div class='del'>-	return sprintf(buf, "%i\n", (card-&gt;options.macaddr_mode ==</div><div class='del'>-				     QETH_TR_MACADDR_CANONICAL)? 1:0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t qeth_l3_dev_canonical_macaddr_store(struct device *dev,</div><div class='del'>-		struct device_attribute *attr, const char *buf, size_t count)</div><div class='del'>-{</div><div class='del'>-	struct qeth_card *card = dev_get_drvdata(dev);</div><div class='del'>-	char *tmp;</div><div class='del'>-	int i, rc = 0;</div><div class='del'>-</div><div class='del'>-	if (!card)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;card-&gt;conf_mutex);</div><div class='del'>-	if ((card-&gt;state != CARD_STATE_DOWN) &amp;&amp;</div><div class='del'>-	    (card-&gt;state != CARD_STATE_RECOVER)) {</div><div class='del'>-		rc = -EPERM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!((card-&gt;info.link_type == QETH_LINK_TYPE_HSTR) ||</div><div class='del'>-	      (card-&gt;info.link_type == QETH_LINK_TYPE_LANE_TR))) {</div><div class='del'>-		rc = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	i = simple_strtoul(buf, &amp;tmp, 16);</div><div class='del'>-	if ((i == 0) || (i == 1))</div><div class='del'>-		card-&gt;options.macaddr_mode = i?</div><div class='del'>-			QETH_TR_MACADDR_CANONICAL :</div><div class='del'>-			QETH_TR_MACADDR_NONCANONICAL;</div><div class='del'>-	else</div><div class='del'>-		rc = -EINVAL;</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;card-&gt;conf_mutex);</div><div class='del'>-	return rc ? rc : count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DEVICE_ATTR(canonical_macaddr, 0644, qeth_l3_dev_canonical_macaddr_show,</div><div class='del'>-		   qeth_l3_dev_canonical_macaddr_store);</div><div class='del'>-</div><div class='ctx'> static ssize_t qeth_l3_dev_sniffer_show(struct device *dev,</div><div class='ctx'> 		struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='hunk'>@@ -458,8 +348,6 @@ static struct attribute *qeth_l3_device_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_route4.attr,</div><div class='ctx'> 	&amp;dev_attr_route6.attr,</div><div class='ctx'> 	&amp;dev_attr_fake_broadcast.attr,</div><div class='del'>-	&amp;dev_attr_broadcast_mode.attr,</div><div class='del'>-	&amp;dev_attr_canonical_macaddr.attr,</div><div class='ctx'> 	&amp;dev_attr_sniffer.attr,</div><div class='ctx'> 	&amp;dev_attr_hsuid.attr,</div><div class='ctx'> 	NULL,</div><div class='head'>diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig<br/>index 29684c8142b0..e9559782d3ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/Kconfig</a></div><div class='hunk'>@@ -408,6 +408,7 @@ config BLK_DEV_3W_XXXX_RAID</div><div class='ctx'> config SCSI_HPSA</div><div class='ctx'> 	tristate "HP Smart Array SCSI driver"</div><div class='ctx'> 	depends on PCI &amp;&amp; SCSI</div><div class='add'>+	select CHECK_SIGNATURE</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports HP Smart Array Controllers (circa 2009).</div><div class='ctx'> 	  It is a SCSI alternative to the cciss driver, which is a block</div><div class='hunk'>@@ -807,19 +808,6 @@ config SCSI_FUTURE_DOMAIN</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='ctx'> 	  module will be called fdomain.</div><div class='ctx'> </div><div class='del'>-config SCSI_FD_MCS</div><div class='del'>-	tristate "Future Domain MCS-600/700 SCSI support"</div><div class='del'>-	depends on MCA_LEGACY &amp;&amp; SCSI</div><div class='del'>-	---help---</div><div class='del'>-	  This is support for Future Domain MCS 600/700 MCA SCSI adapters.</div><div class='del'>-	  Some PS/2 computers are equipped with IBM Fast SCSI Adapter/A which</div><div class='del'>-	  is identical to the MCS 700 and hence also supported by this driver.</div><div class='del'>-	  This driver also supports the Reply SB16/SCSI card (the SCSI part).</div><div class='del'>-	  It supports multiple adapters in the same system.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the</div><div class='del'>-	  module will be called fd_mcs.</div><div class='del'>-</div><div class='ctx'> config SCSI_GDTH</div><div class='ctx'> 	tristate "Intel/ICP (former GDT SCSI Disk Array) RAID Controller support"</div><div class='ctx'> 	depends on (ISA || EISA || PCI) &amp;&amp; SCSI &amp;&amp; ISA_DMA_API</div><div class='hunk'>@@ -889,76 +877,6 @@ config SCSI_GENERIC_NCR53C400</div><div class='ctx'> 	  not detect your card.  See the file</div><div class='ctx'> 	  &lt;file:Documentation/scsi/g_NCR5380.txt&gt; for details.</div><div class='ctx'> </div><div class='del'>-config SCSI_IBMMCA</div><div class='del'>-	tristate "IBMMCA SCSI support"</div><div class='del'>-	depends on MCA &amp;&amp; SCSI</div><div class='del'>-	---help---</div><div class='del'>-	  This is support for the IBM SCSI adapter found in many of the PS/2</div><div class='del'>-	  series computers.  These machines have an MCA bus, so you need to</div><div class='del'>-	  answer Y to "MCA support" as well and read</div><div class='del'>-	  &lt;file:Documentation/mca.txt&gt;.</div><div class='del'>-</div><div class='del'>-	  If the adapter isn't found during boot (a common problem for models</div><div class='del'>-	  56, 57, 76, and 77) you'll need to use the 'ibmmcascsi=&lt;pun&gt;' kernel</div><div class='del'>-	  option, where &lt;pun&gt; is the id of the SCSI subsystem (usually 7, but</div><div class='del'>-	  if that doesn't work check your reference diskette).  Owners of</div><div class='del'>-	  model 95 with a LED-matrix-display can in addition activate some</div><div class='del'>-	  activity info like under OS/2, but more informative, by setting</div><div class='del'>-	  'ibmmcascsi=display' as an additional kernel parameter.  Try "man</div><div class='del'>-	  bootparam" or see the documentation of your boot loader about how to</div><div class='del'>-	  pass options to the kernel.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the</div><div class='del'>-	  module will be called ibmmca.</div><div class='del'>-</div><div class='del'>-config IBMMCA_SCSI_ORDER_STANDARD</div><div class='del'>-	bool "Standard SCSI-order"</div><div class='del'>-	depends on SCSI_IBMMCA</div><div class='del'>-	---help---</div><div class='del'>-	  In the PC-world and in most modern SCSI-BIOS-setups, SCSI-hard disks</div><div class='del'>-	  are assigned to the drive letters, starting with the lowest SCSI-id</div><div class='del'>-	  (physical number -- pun) to be drive C:, as seen from DOS and</div><div class='del'>-	  similar operating systems. When looking into papers describing the</div><div class='del'>-	  ANSI-SCSI-standard, this assignment of drives appears to be wrong.</div><div class='del'>-	  The SCSI-standard follows a hardware-hierarchy which says that id 7</div><div class='del'>-	  has the highest priority and id 0 the lowest. Therefore, the host</div><div class='del'>-	  adapters are still today everywhere placed as SCSI-id 7 by default.</div><div class='del'>-	  In the SCSI-standard, the drive letters express the priority of the</div><div class='del'>-	  disk. C: should be the hard disk, or a partition on it, with the</div><div class='del'>-	  highest priority. This must therefore be the disk with the highest</div><div class='del'>-	  SCSI-id (e.g. 6) and not the one with the lowest! IBM-BIOS kept the</div><div class='del'>-	  original definition of the SCSI-standard as also industrial- and</div><div class='del'>-	  process-control-machines, like VME-CPUs running under realtime-OSes</div><div class='del'>-	  (e.g. LynxOS, OS9) do.</div><div class='del'>-</div><div class='del'>-	  If you like to run Linux on your MCA-machine with the same</div><div class='del'>-	  assignment of hard disks as seen from e.g. DOS or OS/2 on your</div><div class='del'>-	  machine, which is in addition conformant to the SCSI-standard, you</div><div class='del'>-	  must say Y here. This is also necessary for MCA-Linux users who want</div><div class='del'>-	  to keep downward compatibility to older releases of the</div><div class='del'>-	  IBM-MCA-SCSI-driver (older than driver-release 2.00 and older than</div><div class='del'>-	  June 1997).</div><div class='del'>-</div><div class='del'>-	  If you like to have the lowest SCSI-id assigned as drive C:, as</div><div class='del'>-	  modern SCSI-BIOSes do, which does not conform to the standard, but</div><div class='del'>-	  is widespread and common in the PC-world of today, you must say N</div><div class='del'>-	  here. If unsure, say Y.</div><div class='del'>-</div><div class='del'>-config IBMMCA_SCSI_DEV_RESET</div><div class='del'>-	bool "Reset SCSI-devices at boottime"</div><div class='del'>-	depends on SCSI_IBMMCA</div><div class='del'>-	---help---</div><div class='del'>-	  By default, SCSI-devices are reset when the machine is powered on.</div><div class='del'>-	  However, some devices exist, like special-control-devices,</div><div class='del'>-	  SCSI-CNC-machines, SCSI-printer or scanners of older type, that do</div><div class='del'>-	  not reset when switched on. If you say Y here, each device connected</div><div class='del'>-	  to your SCSI-bus will be issued a reset-command after it has been</div><div class='del'>-	  probed, while the kernel is booting. This may cause problems with</div><div class='del'>-	  more modern devices, like hard disks, which do not appreciate these</div><div class='del'>-	  reset commands, and can cause your system to hang. So say Y only if</div><div class='del'>-	  you know that one of your older devices needs it; N is the safe</div><div class='del'>-	  answer.</div><div class='del'>-</div><div class='ctx'> config SCSI_IPS</div><div class='ctx'> 	tristate "IBM ServeRAID support"</div><div class='ctx'> 	depends on PCI &amp;&amp; SCSI</div><div class='head'>diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile<br/>index 8deedeaf5608..1a3368b08615 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/Makefile</a></div><div class='hunk'>@@ -75,7 +75,6 @@ obj-$(CONFIG_SCSI_AIC94XX)	+= aic94xx/</div><div class='ctx'> obj-$(CONFIG_SCSI_PM8001)	+= pm8001/</div><div class='ctx'> obj-$(CONFIG_SCSI_ISCI)		+= isci/</div><div class='ctx'> obj-$(CONFIG_SCSI_IPS)		+= ips.o</div><div class='del'>-obj-$(CONFIG_SCSI_FD_MCS)	+= fd_mcs.o</div><div class='ctx'> obj-$(CONFIG_SCSI_FUTURE_DOMAIN)+= fdomain.o</div><div class='ctx'> obj-$(CONFIG_SCSI_IN2000)	+= in2000.o</div><div class='ctx'> obj-$(CONFIG_SCSI_GENERIC_NCR5380) += g_NCR5380.o</div><div class='hunk'>@@ -100,7 +99,6 @@ obj-$(CONFIG_SCSI_SYM53C8XX_2)	+= sym53c8xx_2/</div><div class='ctx'> obj-$(CONFIG_SCSI_ZALON)	+= zalon7xx.o</div><div class='ctx'> obj-$(CONFIG_SCSI_EATA_PIO)	+= eata_pio.o</div><div class='ctx'> obj-$(CONFIG_SCSI_7000FASST)	+= wd7000.o</div><div class='del'>-obj-$(CONFIG_SCSI_IBMMCA)	+= ibmmca.o</div><div class='ctx'> obj-$(CONFIG_SCSI_EATA)		+= eata.o</div><div class='ctx'> obj-$(CONFIG_SCSI_DC395x)	+= dc395x.o</div><div class='ctx'> obj-$(CONFIG_SCSI_DC390T)	+= tmscsim.o</div><div class='head'>diff --git a/drivers/scsi/aacraid/src.c b/drivers/scsi/aacraid/src.c<br/>index 2bee51506a91..762820636304 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/aacraid/src.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/aacraid/src.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/aacraid/src.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/aacraid/src.c</a></div><div class='hunk'>@@ -424,6 +424,8 @@ static int aac_src_deliver_message(struct fib *fib)</div><div class='ctx'> static int aac_src_ioremap(struct aac_dev *dev, u32 size)</div><div class='ctx'> {</div><div class='ctx'> 	if (!size) {</div><div class='add'>+		iounmap(dev-&gt;regs.src.bar1);</div><div class='add'>+		dev-&gt;regs.src.bar1 = NULL;</div><div class='ctx'> 		iounmap(dev-&gt;regs.src.bar0);</div><div class='ctx'> 		dev-&gt;base = dev-&gt;regs.src.bar0 = NULL;</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/drivers/scsi/aha1542.c b/drivers/scsi/aha1542.c<br/>index ede91f378000..f79c8f9e33a4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/aha1542.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/aha1542.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/aha1542.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/aha1542.c</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'>  *        Added module command-line options</div><div class='ctx'>  *        19-Jul-99</div><div class='ctx'>  *  Modified by Adam Fritzler</div><div class='del'>- *        Added proper detection of the AHA-1640 (MCA version of AHA-1540)</div><div class='add'>+ *        Added proper detection of the AHA-1640 (MCA, now deleted)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -37,8 +37,6 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/isapnp.h&gt;</div><div class='ctx'> #include &lt;linux/blkdev.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-#include &lt;linux/mca-legacy.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='hunk'>@@ -71,7 +69,7 @@</div><div class='ctx'> #define MAXBOARDS 4		/* Increase this and the sizes of the</div><div class='ctx'> 				   arrays below, if you need more.. */</div><div class='ctx'> </div><div class='del'>-/* Boards 3,4 slots are reserved for ISAPnP/MCA scans */</div><div class='add'>+/* Boards 3,4 slots are reserved for ISAPnP scans */</div><div class='ctx'> </div><div class='ctx'> static unsigned int bases[MAXBOARDS] __initdata = {0x330, 0x334, 0, 0};</div><div class='ctx'> </div><div class='hunk'>@@ -1009,66 +1007,6 @@ static int __init aha1542_detect(struct scsi_host_template * tpnt)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 *	Find MicroChannel cards (AHA1640)</div><div class='del'>-	 */</div><div class='del'>-#ifdef CONFIG_MCA_LEGACY</div><div class='del'>-	if(MCA_bus) {</div><div class='del'>-		int slot = 0;</div><div class='del'>-		int pos = 0;</div><div class='del'>-</div><div class='del'>-		for (indx = 0; (slot != MCA_NOTFOUND) &amp;&amp; (indx &lt; ARRAY_SIZE(bases)); indx++) {</div><div class='del'>-</div><div class='del'>-			if (bases[indx])</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			/* Detect only AHA-1640 cards -- MCA ID 0F1F */</div><div class='del'>-			slot = mca_find_unused_adapter(0x0f1f, slot);</div><div class='del'>-			if (slot == MCA_NOTFOUND)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			/* Found one */</div><div class='del'>-			pos = mca_read_stored_pos(slot, 3);</div><div class='del'>-</div><div class='del'>-			/* Decode address */</div><div class='del'>-			if (pos &amp; 0x80) {</div><div class='del'>-				if (pos &amp; 0x02) {</div><div class='del'>-					if (pos &amp; 0x01)</div><div class='del'>-						bases[indx] = 0x334;</div><div class='del'>-					else</div><div class='del'>-						bases[indx] = 0x234;</div><div class='del'>-				} else {</div><div class='del'>-					if (pos &amp; 0x01)</div><div class='del'>-						bases[indx] = 0x134;</div><div class='del'>-				}</div><div class='del'>-			} else {</div><div class='del'>-				if (pos &amp; 0x02) {</div><div class='del'>-					if (pos &amp; 0x01)</div><div class='del'>-						bases[indx] = 0x330;</div><div class='del'>-					else</div><div class='del'>-						bases[indx] = 0x230;</div><div class='del'>-				} else {</div><div class='del'>-					if (pos &amp; 0x01)</div><div class='del'>-						bases[indx] = 0x130;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* No need to decode IRQ and Arb level -- those are</div><div class='del'>-			 * read off the card later.</div><div class='del'>-			 */</div><div class='del'>-			printk(KERN_INFO "Found an AHA-1640 in MCA slot %d, I/O 0x%04x\n", slot, bases[indx]);</div><div class='del'>-</div><div class='del'>-			mca_set_adapter_name(slot, "Adapter AHA-1640");</div><div class='del'>-			mca_set_adapter_procfn(slot, NULL, NULL);</div><div class='del'>-			mca_mark_as_used(slot);</div><div class='del'>-</div><div class='del'>-			/* Go on */</div><div class='del'>-			slot++;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 *	Hunt for ISA Plug'n'Pray Adaptecs (AHA1535)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/aic94xx/aic94xx_seq.c b/drivers/scsi/aic94xx/aic94xx_seq.c<br/>index 390168f62a13..5fdca93892ad 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/aic94xx/aic94xx_seq.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/aic94xx/aic94xx_seq.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/aic94xx/aic94xx_seq.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/aic94xx/aic94xx_seq.c</a></div><div class='hunk'>@@ -1228,8 +1228,7 @@ static int asd_seq_start_lseq(struct asd_ha_struct *asd_ha, int lseq)</div><div class='ctx'> </div><div class='ctx'> int asd_release_firmware(void)</div><div class='ctx'> {</div><div class='del'>-	if (sequencer_fw)</div><div class='del'>-		release_firmware(sequencer_fw);</div><div class='add'>+	release_firmware(sequencer_fw);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/atari_scsi.c b/drivers/scsi/atari_scsi.c<br/>index 04a154f87e3e..df740cbbaef4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/atari_scsi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/atari_scsi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/atari_scsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/atari_scsi.c</a></div><div class='hunk'>@@ -572,7 +572,7 @@ static void falcon_get_lock(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-int __init atari_scsi_detect(struct scsi_host_template *host)</div><div class='add'>+static int __init atari_scsi_detect(struct scsi_host_template *host)</div><div class='ctx'> {</div><div class='ctx'> 	static int called = 0;</div><div class='ctx'> 	struct Scsi_Host *instance;</div><div class='hunk'>@@ -724,7 +724,7 @@ int __init atari_scsi_detect(struct scsi_host_template *host)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int atari_scsi_release(struct Scsi_Host *sh)</div><div class='add'>+static int atari_scsi_release(struct Scsi_Host *sh)</div><div class='ctx'> {</div><div class='ctx'> 	if (IS_A_TT())</div><div class='ctx'> 		free_irq(IRQ_TT_MFP_SCSI, sh);</div><div class='hunk'>@@ -734,17 +734,21 @@ int atari_scsi_release(struct Scsi_Host *sh)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init atari_scsi_setup(char *str, int *ints)</div><div class='add'>+#ifndef MODULE</div><div class='add'>+static int __init atari_scsi_setup(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	/* Format of atascsi parameter is:</div><div class='ctx'> 	 *   atascsi=&lt;can_queue&gt;,&lt;cmd_per_lun&gt;,&lt;sg_tablesize&gt;,&lt;hostid&gt;,&lt;use_tags&gt;</div><div class='ctx'> 	 * Defaults depend on TT or Falcon, hostid determined at run time.</div><div class='ctx'> 	 * Negative values mean don't change.</div><div class='ctx'> 	 */</div><div class='add'>+	int ints[6];</div><div class='add'>+</div><div class='add'>+	get_options(str, ARRAY_SIZE(ints), ints);</div><div class='ctx'> </div><div class='ctx'> 	if (ints[0] &lt; 1) {</div><div class='ctx'> 		printk("atari_scsi_setup: no arguments!\n");</div><div class='del'>-		return;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ints[0] &gt;= 1) {</div><div class='hunk'>@@ -777,9 +781,14 @@ void __init atari_scsi_setup(char *str, int *ints)</div><div class='ctx'> 			setup_use_tagged_queuing = !!ints[5];</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int atari_scsi_bus_reset(Scsi_Cmnd *cmd)</div><div class='add'>+__setup("atascsi=", atari_scsi_setup);</div><div class='add'>+#endif /* !MODULE */</div><div class='add'>+</div><div class='add'>+static int atari_scsi_bus_reset(Scsi_Cmnd *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	int rv;</div><div class='ctx'> 	struct NCR5380_hostdata *hostdata =</div><div class='hunk'>@@ -852,7 +861,7 @@ static void __init atari_scsi_reset_boot(void)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-const char *atari_scsi_info(struct Scsi_Host *host)</div><div class='add'>+static const char *atari_scsi_info(struct Scsi_Host *host)</div><div class='ctx'> {</div><div class='ctx'> 	/* atari_scsi_detect() is verbose enough... */</div><div class='ctx'> 	static const char string[] = "Atari native SCSI";</div><div class='hunk'>@@ -862,8 +871,9 @@ const char *atari_scsi_info(struct Scsi_Host *host)</div><div class='ctx'> </div><div class='ctx'> #if defined(REAL_DMA)</div><div class='ctx'> </div><div class='del'>-unsigned long atari_scsi_dma_setup(struct Scsi_Host *instance, void *data,</div><div class='del'>-				   unsigned long count, int dir)</div><div class='add'>+static unsigned long atari_scsi_dma_setup(struct Scsi_Host *instance,</div><div class='add'>+					  void *data, unsigned long count,</div><div class='add'>+					  int dir)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long addr = virt_to_phys(data);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/atari_scsi.h b/drivers/scsi/atari_scsi.h<br/>index efadb8d567c2..bd52df78b209 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/atari_scsi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/atari_scsi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/atari_scsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/atari_scsi.h</a></div><div class='hunk'>@@ -18,11 +18,6 @@</div><div class='ctx'> /* (I_HAVE_OVERRUNS stuff removed) */</div><div class='ctx'> </div><div class='ctx'> #ifndef ASM</div><div class='del'>-int atari_scsi_detect (struct scsi_host_template *);</div><div class='del'>-const char *atari_scsi_info (struct Scsi_Host *);</div><div class='del'>-int atari_scsi_reset (Scsi_Cmnd *, unsigned int);</div><div class='del'>-int atari_scsi_release (struct Scsi_Host *);</div><div class='del'>-</div><div class='ctx'> /* The values for CMD_PER_LUN and CAN_QUEUE are somehow arbitrary. Higher</div><div class='ctx'>  * values should work, too; try it! (but cmd_per_lun costs memory!) */</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/be2iscsi/be.h b/drivers/scsi/be2iscsi/be.h<br/>index 1d7b976c850f..a50b6a9030e8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/be2iscsi/be.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be.h</a></div><div class='hunk'>@@ -132,10 +132,6 @@ struct be_ctrl_info {</div><div class='ctx'> 		((u32)((((size_t)(_address) &amp; (PAGE_SIZE_4K - 1)) +	\</div><div class='ctx'> 			(size) + (PAGE_SIZE_4K - 1)) &gt;&gt; PAGE_SHIFT_4K))</div><div class='ctx'> </div><div class='del'>-/* Byte offset into the page corresponding to given address */</div><div class='del'>-#define OFFSET_IN_PAGE(addr)						\</div><div class='del'>-		((size_t)(addr) &amp; (PAGE_SIZE_4K-1))</div><div class='del'>-</div><div class='ctx'> /* Returns bit offset within a DWORD of a bitfield */</div><div class='ctx'> #define AMAP_BIT_OFFSET(_struct, field)					\</div><div class='ctx'> 		(((size_t)&amp;(((_struct *)0)-&gt;field))%32)</div><div class='head'>diff --git a/drivers/scsi/be2iscsi/be_cmds.c b/drivers/scsi/be2iscsi/be_cmds.c<br/>index cdb15364bc69..d2e9e933f7a3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_cmds.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/be2iscsi/be_cmds.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_cmds.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_cmds.c</a></div><div class='hunk'>@@ -15,6 +15,8 @@</div><div class='ctx'>  * Costa Mesa, CA 92626</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;scsi/iscsi_proto.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "be.h"</div><div class='ctx'> #include "be_mgmt.h"</div><div class='ctx'> #include "be_main.h"</div><div class='head'>diff --git a/drivers/scsi/be2iscsi/be_cmds.h b/drivers/scsi/be2iscsi/be_cmds.h<br/>index 8b40a5b4366c..b0b36c6a145f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_cmds.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/be2iscsi/be_cmds.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_cmds.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_cmds.h</a></div><div class='hunk'>@@ -23,7 +23,7 @@</div><div class='ctx'>  * firmware in the BE. These requests are communicated to the processor</div><div class='ctx'>  * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one</div><div class='ctx'>  * WRB inside a MAILBOX.</div><div class='del'>- * The commands are serviced by the ARM processor in the BladeEngine's MPU.</div><div class='add'>+ * The commands are serviced by the ARM processor in the OneConnect's MPU.</div><div class='ctx'>  */</div><div class='ctx'> struct be_sge {</div><div class='ctx'> 	u32 pa_lo;</div><div class='hunk'>@@ -163,7 +163,8 @@ struct be_mcc_mailbox {</div><div class='ctx'> #define OPCODE_COMMON_ISCSI_CFG_REMOVE_SGL_PAGES        3</div><div class='ctx'> #define OPCODE_COMMON_ISCSI_NTWK_GET_NIC_CONFIG		7</div><div class='ctx'> #define OPCODE_COMMON_ISCSI_NTWK_SET_VLAN		14</div><div class='del'>-#define OPCODE_COMMON_ISCSI_NTWK_CONFIGURE_STATELESS_IP_ADDR	17</div><div class='add'>+#define OPCODE_COMMON_ISCSI_NTWK_CONFIG_STATELESS_IP_ADDR	17</div><div class='add'>+#define OPCODE_COMMON_ISCSI_NTWK_REL_STATELESS_IP_ADDR	18</div><div class='ctx'> #define OPCODE_COMMON_ISCSI_NTWK_MODIFY_IP_ADDR		21</div><div class='ctx'> #define OPCODE_COMMON_ISCSI_NTWK_GET_DEFAULT_GATEWAY	22</div><div class='ctx'> #define OPCODE_COMMON_ISCSI_NTWK_MODIFY_DEFAULT_GATEWAY 23</div><div class='hunk'>@@ -274,15 +275,15 @@ struct mgmt_conn_login_options {</div><div class='ctx'> 	struct	mgmt_auth_method_format auth_data;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-struct ip_address_format {</div><div class='add'>+struct ip_addr_format {</div><div class='ctx'> 	u16 size_of_structure;</div><div class='ctx'> 	u8 reserved;</div><div class='ctx'> 	u8 ip_type;</div><div class='del'>-	u8 ip_address[16];</div><div class='add'>+	u8 addr[16];</div><div class='ctx'> 	u32 rsvd0;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-struct	mgmt_conn_info {</div><div class='add'>+struct mgmt_conn_info {</div><div class='ctx'> 	u32	connection_handle;</div><div class='ctx'> 	u32	connection_status;</div><div class='ctx'> 	u16	src_port;</div><div class='hunk'>@@ -290,9 +291,9 @@ struct	mgmt_conn_info {</div><div class='ctx'> 	u16	dest_port_redirected;</div><div class='ctx'> 	u16	cid;</div><div class='ctx'> 	u32	estimated_throughput;</div><div class='del'>-	struct	ip_address_format	src_ipaddr;</div><div class='del'>-	struct	ip_address_format	dest_ipaddr;</div><div class='del'>-	struct	ip_address_format	dest_ipaddr_redirected;</div><div class='add'>+	struct	ip_addr_format	src_ipaddr;</div><div class='add'>+	struct	ip_addr_format	dest_ipaddr;</div><div class='add'>+	struct	ip_addr_format	dest_ipaddr_redirected;</div><div class='ctx'> 	struct	mgmt_conn_login_options	negotiated_login_options;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='hunk'>@@ -322,43 +323,115 @@ struct mgmt_session_info {</div><div class='ctx'> 	struct	mgmt_conn_info	conn_list[1];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-struct  be_cmd_req_get_session {</div><div class='add'>+struct be_cmd_get_session_req {</div><div class='ctx'> 	struct be_cmd_req_hdr hdr;</div><div class='ctx'> 	u32 session_handle;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-struct  be_cmd_resp_get_session {</div><div class='add'>+struct be_cmd_get_session_resp {</div><div class='ctx'> 	struct be_cmd_resp_hdr hdr;</div><div class='ctx'> 	struct mgmt_session_info session_info;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct mac_addr {</div><div class='del'>-	u16 size_of_struct;</div><div class='add'>+	u16 size_of_structure;</div><div class='ctx'> 	u8 addr[ETH_ALEN];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-struct be_cmd_req_get_boot_target {</div><div class='add'>+struct be_cmd_get_boot_target_req {</div><div class='ctx'> 	struct be_cmd_req_hdr hdr;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-struct be_cmd_resp_get_boot_target {</div><div class='add'>+struct be_cmd_get_boot_target_resp {</div><div class='ctx'> 	struct be_cmd_resp_hdr hdr;</div><div class='ctx'> 	u32  boot_session_count;</div><div class='ctx'> 	int  boot_session_handle;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct be_cmd_req_mac_query {</div><div class='add'>+struct be_cmd_mac_query_req {</div><div class='ctx'> 	struct be_cmd_req_hdr hdr;</div><div class='ctx'> 	u8 type;</div><div class='ctx'> 	u8 permanent;</div><div class='ctx'> 	u16 if_id;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-struct be_cmd_resp_mac_query {</div><div class='add'>+struct be_cmd_get_mac_resp {</div><div class='ctx'> 	struct be_cmd_resp_hdr hdr;</div><div class='ctx'> 	struct mac_addr mac;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct be_ip_addr_subnet_format {</div><div class='add'>+	u16 size_of_structure;</div><div class='add'>+	u8 ip_type;</div><div class='add'>+	u8 ipv6_prefix_length;</div><div class='add'>+	u8 addr[16];</div><div class='add'>+	u8 subnet_mask[16];</div><div class='add'>+	u32 rsvd0;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct be_cmd_get_if_info_req {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	u32 interface_hndl;</div><div class='add'>+	u32 ip_type;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct be_cmd_get_if_info_resp {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	u32 interface_hndl;</div><div class='add'>+	u32 vlan_priority;</div><div class='add'>+	u32 ip_addr_count;</div><div class='add'>+	u32 dhcp_state;</div><div class='add'>+	struct be_ip_addr_subnet_format ip_addr;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct be_ip_addr_record {</div><div class='add'>+	u32 action;</div><div class='add'>+	u32 interface_hndl;</div><div class='add'>+	struct be_ip_addr_subnet_format ip_addr;</div><div class='add'>+	u32 status;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct be_ip_addr_record_params {</div><div class='add'>+	u32 record_entry_count;</div><div class='add'>+	struct be_ip_addr_record ip_record;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct be_cmd_set_ip_addr_req {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	struct be_ip_addr_record_params ip_params;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+struct be_cmd_set_dhcp_req {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	u32 interface_hndl;</div><div class='add'>+	u32 ip_type;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u32 retry_count;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct be_cmd_rel_dhcp_req {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	u32 interface_hndl;</div><div class='add'>+	u32 ip_type;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct be_cmd_set_def_gateway_req {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	u32 action;</div><div class='add'>+	struct ip_addr_format ip_addr;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct be_cmd_get_def_gateway_req {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	u32 ip_type;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct be_cmd_get_def_gateway_resp {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	struct ip_addr_format ip_addr;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> /******************** Create CQ ***************************/</div><div class='ctx'> /**</div><div class='ctx'>  * Pseudo amap definition in which each bit of the actual structure is defined</div><div class='hunk'>@@ -489,7 +562,7 @@ struct be_cmd_req_modify_eq_delay {</div><div class='ctx'> </div><div class='ctx'> #define ETH_ALEN	6</div><div class='ctx'> </div><div class='del'>-struct be_cmd_req_get_mac_addr {</div><div class='add'>+struct be_cmd_get_nic_conf_req {</div><div class='ctx'> 	struct be_cmd_req_hdr hdr;</div><div class='ctx'> 	u32 nic_port_count;</div><div class='ctx'> 	u32 speed;</div><div class='hunk'>@@ -501,7 +574,7 @@ struct be_cmd_req_get_mac_addr {</div><div class='ctx'> 	u32 rsvd[23];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct be_cmd_resp_get_mac_addr {</div><div class='add'>+struct be_cmd_get_nic_conf_resp {</div><div class='ctx'> 	struct be_cmd_resp_hdr hdr;</div><div class='ctx'> 	u32 nic_port_count;</div><div class='ctx'> 	u32 speed;</div><div class='hunk'>@@ -513,6 +586,39 @@ struct be_cmd_resp_get_mac_addr {</div><div class='ctx'> 	u32 rsvd[23];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define BEISCSI_ALIAS_LEN 32</div><div class='add'>+</div><div class='add'>+struct be_cmd_hba_name {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	u16 flags;</div><div class='add'>+	u16 rsvd0;</div><div class='add'>+	u8 initiator_name[ISCSI_NAME_LEN];</div><div class='add'>+	u8 initiator_alias[BEISCSI_ALIAS_LEN];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct be_cmd_ntwk_link_status_req {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	u32 rsvd0;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/*** Port Speed Values ***/</div><div class='add'>+#define BE2ISCSI_LINK_SPEED_ZERO	0x00</div><div class='add'>+#define BE2ISCSI_LINK_SPEED_10MBPS	0x01</div><div class='add'>+#define BE2ISCSI_LINK_SPEED_100MBPS	0x02</div><div class='add'>+#define BE2ISCSI_LINK_SPEED_1GBPS	0x03</div><div class='add'>+#define BE2ISCSI_LINK_SPEED_10GBPS	0x04</div><div class='add'>+struct be_cmd_ntwk_link_status_resp {</div><div class='add'>+	struct be_cmd_resp_hdr hdr;</div><div class='add'>+	u8 phys_port;</div><div class='add'>+	u8 mac_duplex;</div><div class='add'>+	u8 mac_speed;</div><div class='add'>+	u8 mac_fault;</div><div class='add'>+	u8 mgmt_mac_duplex;</div><div class='add'>+	u8 mgmt_mac_speed;</div><div class='add'>+	u16 qos_link_speed;</div><div class='add'>+	u32 logical_link_speed;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> int beiscsi_cmd_eq_create(struct be_ctrl_info *ctrl,</div><div class='ctx'> 			  struct be_queue_info *eq, int eq_delay);</div><div class='ctx'> </div><div class='hunk'>@@ -530,11 +636,8 @@ int beiscsi_cmd_mccq_create(struct beiscsi_hba *phba,</div><div class='ctx'> int be_poll_mcc(struct be_ctrl_info *ctrl);</div><div class='ctx'> int mgmt_check_supported_fw(struct be_ctrl_info *ctrl,</div><div class='ctx'> 				      struct beiscsi_hba *phba);</div><div class='del'>-unsigned int be_cmd_get_mac_addr(struct beiscsi_hba *phba);</div><div class='del'>-unsigned int beiscsi_get_boot_target(struct beiscsi_hba *phba);</div><div class='del'>-unsigned int beiscsi_get_session_info(struct beiscsi_hba *phba,</div><div class='del'>-				  u32 boot_session_handle,</div><div class='del'>-				  struct be_dma_mem *nonemb_cmd);</div><div class='add'>+unsigned int be_cmd_get_initname(struct beiscsi_hba *phba);</div><div class='add'>+unsigned int be_cmd_get_port_speed(struct beiscsi_hba *phba);</div><div class='ctx'> </div><div class='ctx'> void free_mcc_tag(struct be_ctrl_info *ctrl, unsigned int tag);</div><div class='ctx'> /*ISCSI Functuions */</div><div class='hunk'>@@ -715,7 +818,7 @@ struct be_eq_delay_params_in {</div><div class='ctx'> </div><div class='ctx'> struct tcp_connect_and_offload_in {</div><div class='ctx'> 	struct be_cmd_req_hdr hdr;</div><div class='del'>-	struct ip_address_format ip_address;</div><div class='add'>+	struct ip_addr_format ip_address;</div><div class='ctx'> 	u16 tcp_port;</div><div class='ctx'> 	u16 cid;</div><div class='ctx'> 	u16 cq_id;</div><div class='hunk'>@@ -792,13 +895,14 @@ struct be_fw_cfg {</div><div class='ctx'> 	u32 function_caps;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-struct be_all_if_id {</div><div class='add'>+struct be_cmd_get_all_if_id_req {</div><div class='ctx'> 	struct be_cmd_req_hdr hdr;</div><div class='ctx'> 	u32 if_count;</div><div class='ctx'> 	u32 if_hndl_list[1];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> #define ISCSI_OPCODE_SCSI_DATA_OUT		5</div><div class='add'>+#define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5</div><div class='ctx'> #define OPCODE_COMMON_MODIFY_EQ_DELAY		41</div><div class='ctx'> #define OPCODE_COMMON_ISCSI_CLEANUP		59</div><div class='ctx'> #define	OPCODE_COMMON_TCP_UPLOAD		56</div><div class='hunk'>@@ -810,6 +914,8 @@ struct be_all_if_id {</div><div class='ctx'> #define OPCODE_ISCSI_INI_DRIVER_OFFLOAD_SESSION 41</div><div class='ctx'> #define OPCODE_ISCSI_INI_DRIVER_INVALIDATE_CONNECTION 42</div><div class='ctx'> #define OPCODE_ISCSI_INI_BOOT_GET_BOOT_TARGET	52</div><div class='add'>+#define OPCODE_COMMON_WRITE_FLASH		96</div><div class='add'>+#define OPCODE_COMMON_READ_FLASH		97</div><div class='ctx'> </div><div class='ctx'> /* --- CMD_ISCSI_INVALIDATE_CONNECTION_TYPE --- */</div><div class='ctx'> #define CMD_ISCSI_COMMAND_INVALIDATE		1</div><div class='head'>diff --git a/drivers/scsi/be2iscsi/be_iscsi.c b/drivers/scsi/be2iscsi/be_iscsi.c<br/>index 33c8f09c7ac1..43f35034585d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_iscsi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/be2iscsi/be_iscsi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_iscsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_iscsi.c</a></div><div class='hunk'>@@ -23,6 +23,8 @@</div><div class='ctx'> #include &lt;scsi/scsi_cmnd.h&gt;</div><div class='ctx'> #include &lt;scsi/scsi_device.h&gt;</div><div class='ctx'> #include &lt;scsi/scsi_host.h&gt;</div><div class='add'>+#include &lt;scsi/scsi_netlink.h&gt;</div><div class='add'>+#include &lt;net/netlink.h&gt;</div><div class='ctx'> #include &lt;scsi/scsi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "be_iscsi.h"</div><div class='hunk'>@@ -207,6 +209,301 @@ int beiscsi_conn_bind(struct iscsi_cls_session *cls_session,</div><div class='ctx'> 	return beiscsi_bindconn_cid(phba, beiscsi_conn, beiscsi_ep-&gt;ep_cid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int beiscsi_create_ipv4_iface(struct beiscsi_hba *phba)</div><div class='add'>+{</div><div class='add'>+	if (phba-&gt;ipv4_iface)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	phba-&gt;ipv4_iface = iscsi_create_iface(phba-&gt;shost,</div><div class='add'>+					      &amp;beiscsi_iscsi_transport,</div><div class='add'>+					      ISCSI_IFACE_TYPE_IPV4,</div><div class='add'>+					      0, 0);</div><div class='add'>+	if (!phba-&gt;ipv4_iface) {</div><div class='add'>+		shost_printk(KERN_ERR, phba-&gt;shost, "Could not "</div><div class='add'>+			     "create default IPv4 address.\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int beiscsi_create_ipv6_iface(struct beiscsi_hba *phba)</div><div class='add'>+{</div><div class='add'>+	if (phba-&gt;ipv6_iface)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	phba-&gt;ipv6_iface = iscsi_create_iface(phba-&gt;shost,</div><div class='add'>+					      &amp;beiscsi_iscsi_transport,</div><div class='add'>+					      ISCSI_IFACE_TYPE_IPV6,</div><div class='add'>+					      0, 0);</div><div class='add'>+	if (!phba-&gt;ipv6_iface) {</div><div class='add'>+		shost_printk(KERN_ERR, phba-&gt;shost, "Could not "</div><div class='add'>+			     "create default IPv6 address.\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void beiscsi_create_def_ifaces(struct beiscsi_hba *phba)</div><div class='add'>+{</div><div class='add'>+	struct be_cmd_get_if_info_resp if_info;</div><div class='add'>+</div><div class='add'>+	if (!mgmt_get_if_info(phba, BE2_IPV4, &amp;if_info))</div><div class='add'>+		beiscsi_create_ipv4_iface(phba);</div><div class='add'>+</div><div class='add'>+	if (!mgmt_get_if_info(phba, BE2_IPV6, &amp;if_info))</div><div class='add'>+		beiscsi_create_ipv6_iface(phba);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void beiscsi_destroy_def_ifaces(struct beiscsi_hba *phba)</div><div class='add'>+{</div><div class='add'>+	if (phba-&gt;ipv6_iface)</div><div class='add'>+		iscsi_destroy_iface(phba-&gt;ipv6_iface);</div><div class='add'>+	if (phba-&gt;ipv4_iface)</div><div class='add'>+		iscsi_destroy_iface(phba-&gt;ipv4_iface);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+beiscsi_set_static_ip(struct Scsi_Host *shost,</div><div class='add'>+		struct iscsi_iface_param_info *iface_param,</div><div class='add'>+		void *data, uint32_t dt_len)</div><div class='add'>+{</div><div class='add'>+	struct beiscsi_hba *phba = iscsi_host_priv(shost);</div><div class='add'>+	struct iscsi_iface_param_info *iface_ip = NULL;</div><div class='add'>+	struct iscsi_iface_param_info *iface_subnet = NULL;</div><div class='add'>+	struct nlattr *nla;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	switch (iface_param-&gt;param) {</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_BOOTPROTO:</div><div class='add'>+		nla = nla_find(data, dt_len, ISCSI_NET_PARAM_IPV4_ADDR);</div><div class='add'>+		if (nla)</div><div class='add'>+			iface_ip = nla_data(nla);</div><div class='add'>+</div><div class='add'>+		nla = nla_find(data, dt_len, ISCSI_NET_PARAM_IPV4_SUBNET);</div><div class='add'>+		if (nla)</div><div class='add'>+			iface_subnet = nla_data(nla);</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_ADDR:</div><div class='add'>+		iface_ip = iface_param;</div><div class='add'>+		nla = nla_find(data, dt_len, ISCSI_NET_PARAM_IPV4_SUBNET);</div><div class='add'>+		if (nla)</div><div class='add'>+			iface_subnet = nla_data(nla);</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_SUBNET:</div><div class='add'>+		iface_subnet = iface_param;</div><div class='add'>+		nla = nla_find(data, dt_len, ISCSI_NET_PARAM_IPV4_ADDR);</div><div class='add'>+		if (nla)</div><div class='add'>+			iface_ip = nla_data(nla);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		shost_printk(KERN_ERR, shost, "Unsupported param %d\n",</div><div class='add'>+			     iface_param-&gt;param);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!iface_ip || !iface_subnet) {</div><div class='add'>+		shost_printk(KERN_ERR, shost, "IP and Subnet Mask required\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mgmt_set_ip(phba, iface_ip, iface_subnet,</div><div class='add'>+			ISCSI_BOOTPROTO_STATIC);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+beiscsi_set_ipv4(struct Scsi_Host *shost,</div><div class='add'>+		struct iscsi_iface_param_info *iface_param,</div><div class='add'>+		void *data, uint32_t dt_len)</div><div class='add'>+{</div><div class='add'>+	struct beiscsi_hba *phba = iscsi_host_priv(shost);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Check the param */</div><div class='add'>+	switch (iface_param-&gt;param) {</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_GW:</div><div class='add'>+		ret = mgmt_set_gateway(phba, iface_param);</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_BOOTPROTO:</div><div class='add'>+		if (iface_param-&gt;value[0] == ISCSI_BOOTPROTO_DHCP)</div><div class='add'>+			ret = mgmt_set_ip(phba, iface_param,</div><div class='add'>+					NULL, ISCSI_BOOTPROTO_DHCP);</div><div class='add'>+		else if (iface_param-&gt;value[0] == ISCSI_BOOTPROTO_STATIC)</div><div class='add'>+			ret = beiscsi_set_static_ip(shost, iface_param,</div><div class='add'>+						    data, dt_len);</div><div class='add'>+		else</div><div class='add'>+			shost_printk(KERN_ERR, shost, "Invalid BOOTPROTO: %d\n",</div><div class='add'>+					iface_param-&gt;value[0]);</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_NET_PARAM_IFACE_ENABLE:</div><div class='add'>+		if (iface_param-&gt;value[0] == ISCSI_IFACE_ENABLE)</div><div class='add'>+			ret = beiscsi_create_ipv4_iface(phba);</div><div class='add'>+		else</div><div class='add'>+			iscsi_destroy_iface(phba-&gt;ipv4_iface);</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_SUBNET:</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_ADDR:</div><div class='add'>+		ret = beiscsi_set_static_ip(shost, iface_param,</div><div class='add'>+					    data, dt_len);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		shost_printk(KERN_ERR, shost, "Param %d not supported\n",</div><div class='add'>+			     iface_param-&gt;param);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+beiscsi_set_ipv6(struct Scsi_Host *shost,</div><div class='add'>+		struct iscsi_iface_param_info *iface_param,</div><div class='add'>+		void *data, uint32_t dt_len)</div><div class='add'>+{</div><div class='add'>+	struct beiscsi_hba *phba = iscsi_host_priv(shost);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (iface_param-&gt;param) {</div><div class='add'>+	case ISCSI_NET_PARAM_IFACE_ENABLE:</div><div class='add'>+		if (iface_param-&gt;value[0] == ISCSI_IFACE_ENABLE)</div><div class='add'>+			ret = beiscsi_create_ipv6_iface(phba);</div><div class='add'>+		else {</div><div class='add'>+			iscsi_destroy_iface(phba-&gt;ipv6_iface);</div><div class='add'>+			ret = 0;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_NET_PARAM_IPV6_ADDR:</div><div class='add'>+		ret = mgmt_set_ip(phba, iface_param, NULL,</div><div class='add'>+				  ISCSI_BOOTPROTO_STATIC);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		shost_printk(KERN_ERR, shost, "Param %d not supported\n",</div><div class='add'>+			     iface_param-&gt;param);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int be2iscsi_iface_set_param(struct Scsi_Host *shost,</div><div class='add'>+		void *data, uint32_t dt_len)</div><div class='add'>+{</div><div class='add'>+	struct iscsi_iface_param_info *iface_param = NULL;</div><div class='add'>+	struct nlattr *attrib;</div><div class='add'>+	uint32_t rm_len = dt_len;</div><div class='add'>+	int ret = 0 ;</div><div class='add'>+</div><div class='add'>+	nla_for_each_attr(attrib, data, dt_len, rm_len) {</div><div class='add'>+		iface_param = nla_data(attrib);</div><div class='add'>+</div><div class='add'>+		if (iface_param-&gt;param_type != ISCSI_NET_PARAM)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * BE2ISCSI only supports 1 interface</div><div class='add'>+		 */</div><div class='add'>+		if (iface_param-&gt;iface_num) {</div><div class='add'>+			shost_printk(KERN_ERR, shost, "Invalid iface_num %d."</div><div class='add'>+				     "Only iface_num 0 is supported.\n",</div><div class='add'>+				     iface_param-&gt;iface_num);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (iface_param-&gt;iface_type) {</div><div class='add'>+		case ISCSI_IFACE_TYPE_IPV4:</div><div class='add'>+			ret = beiscsi_set_ipv4(shost, iface_param,</div><div class='add'>+					       data, dt_len);</div><div class='add'>+			break;</div><div class='add'>+		case ISCSI_IFACE_TYPE_IPV6:</div><div class='add'>+			ret = beiscsi_set_ipv6(shost, iface_param,</div><div class='add'>+					       data, dt_len);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			shost_printk(KERN_ERR, shost,</div><div class='add'>+				     "Invalid iface type :%d passed\n",</div><div class='add'>+				     iface_param-&gt;iface_type);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int be2iscsi_get_if_param(struct beiscsi_hba *phba,</div><div class='add'>+		struct iscsi_iface *iface, int param,</div><div class='add'>+		char *buf)</div><div class='add'>+{</div><div class='add'>+	struct be_cmd_get_if_info_resp if_info;</div><div class='add'>+	int len, ip_type = BE2_IPV4;</div><div class='add'>+</div><div class='add'>+	memset(&amp;if_info, 0, sizeof(if_info));</div><div class='add'>+</div><div class='add'>+	if (iface-&gt;iface_type == ISCSI_IFACE_TYPE_IPV6)</div><div class='add'>+		ip_type = BE2_IPV6;</div><div class='add'>+</div><div class='add'>+	len = mgmt_get_if_info(phba, ip_type, &amp;if_info);</div><div class='add'>+	if (len)</div><div class='add'>+		return len;</div><div class='add'>+</div><div class='add'>+	switch (param) {</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_ADDR:</div><div class='add'>+		len = sprintf(buf, "%pI4\n", &amp;if_info.ip_addr.addr);</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_NET_PARAM_IPV6_ADDR:</div><div class='add'>+		len = sprintf(buf, "%pI6\n", &amp;if_info.ip_addr.addr);</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_BOOTPROTO:</div><div class='add'>+		if (!if_info.dhcp_state)</div><div class='add'>+			len = sprintf(buf, "static");</div><div class='add'>+		else</div><div class='add'>+			len = sprintf(buf, "dhcp");</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_SUBNET:</div><div class='add'>+		len = sprintf(buf, "%pI4\n", &amp;if_info.ip_addr.subnet_mask);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int be2iscsi_iface_get_param(struct iscsi_iface *iface,</div><div class='add'>+		enum iscsi_param_type param_type,</div><div class='add'>+		int param, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct Scsi_Host *shost = iscsi_iface_to_shost(iface);</div><div class='add'>+	struct beiscsi_hba *phba = iscsi_host_priv(shost);</div><div class='add'>+	struct be_cmd_get_def_gateway_resp gateway;</div><div class='add'>+	int len = -ENOSYS;</div><div class='add'>+</div><div class='add'>+	switch (param) {</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_ADDR:</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_SUBNET:</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_BOOTPROTO:</div><div class='add'>+	case ISCSI_NET_PARAM_IPV6_ADDR:</div><div class='add'>+		len = be2iscsi_get_if_param(phba, iface, param, buf);</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_NET_PARAM_IFACE_ENABLE:</div><div class='add'>+		len = sprintf(buf, "enabled");</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_NET_PARAM_IPV4_GW:</div><div class='add'>+		memset(&amp;gateway, 0, sizeof(gateway));</div><div class='add'>+		len = mgmt_get_gateway(phba, BE2_IPV4, &amp;gateway);</div><div class='add'>+		if (!len)</div><div class='add'>+			len = sprintf(buf, "%pI4\n", &amp;gateway.ip_addr.addr);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		len = -ENOSYS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * beiscsi_ep_get_param - get the iscsi parameter</div><div class='ctx'>  * @ep: pointer to iscsi ep</div><div class='hunk'>@@ -221,7 +518,7 @@ int beiscsi_ep_get_param(struct iscsi_endpoint *ep,</div><div class='ctx'> 	struct beiscsi_endpoint *beiscsi_ep = ep-&gt;dd_data;</div><div class='ctx'> 	int len = 0;</div><div class='ctx'> </div><div class='del'>-	SE_DEBUG(DBG_LVL_8, "In beiscsi_conn_get_param, param= %d\n", param);</div><div class='add'>+	SE_DEBUG(DBG_LVL_8, "In beiscsi_ep_get_param, param= %d\n", param);</div><div class='ctx'> </div><div class='ctx'> 	switch (param) {</div><div class='ctx'> 	case ISCSI_PARAM_CONN_PORT:</div><div class='hunk'>@@ -279,6 +576,121 @@ int beiscsi_set_param(struct iscsi_cls_conn *cls_conn,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * beiscsi_get_initname - Read Initiator Name from flash</div><div class='add'>+ * @buf: buffer bointer</div><div class='add'>+ * @phba: The device priv structure instance</div><div class='add'>+ *</div><div class='add'>+ * returns number of bytes</div><div class='add'>+ */</div><div class='add'>+static int beiscsi_get_initname(char *buf, struct beiscsi_hba *phba)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+	unsigned int tag, wrb_num;</div><div class='add'>+	unsigned short status, extd_status;</div><div class='add'>+	struct be_mcc_wrb *wrb;</div><div class='add'>+	struct be_cmd_hba_name *resp;</div><div class='add'>+	struct be_queue_info *mccq = &amp;phba-&gt;ctrl.mcc_obj.q;</div><div class='add'>+</div><div class='add'>+	tag = be_cmd_get_initname(phba);</div><div class='add'>+	if (!tag) {</div><div class='add'>+		SE_DEBUG(DBG_LVL_1, "Getting Initiator Name Failed\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	} else</div><div class='add'>+		wait_event_interruptible(phba-&gt;ctrl.mcc_wait[tag],</div><div class='add'>+				phba-&gt;ctrl.mcc_numtag[tag]);</div><div class='add'>+</div><div class='add'>+	wrb_num = (phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x00FF0000) &gt;&gt; 16;</div><div class='add'>+	extd_status = (phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x0000FF00) &gt;&gt; 8;</div><div class='add'>+	status = phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x000000FF;</div><div class='add'>+</div><div class='add'>+	if (status || extd_status) {</div><div class='add'>+		SE_DEBUG(DBG_LVL_1, "MailBox Command Failed with "</div><div class='add'>+				"status = %d extd_status = %d\n",</div><div class='add'>+				status, extd_status);</div><div class='add'>+		free_mcc_tag(&amp;phba-&gt;ctrl, tag);</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+	wrb = queue_get_wrb(mccq, wrb_num);</div><div class='add'>+	free_mcc_tag(&amp;phba-&gt;ctrl, tag);</div><div class='add'>+	resp = embedded_payload(wrb);</div><div class='add'>+	rc = sprintf(buf, "%s\n", resp-&gt;initiator_name);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * beiscsi_get_port_state - Get the Port State</div><div class='add'>+ * @shost : pointer to scsi_host structure</div><div class='add'>+ *</div><div class='add'>+ * returns number of bytes</div><div class='add'>+ */</div><div class='add'>+static void beiscsi_get_port_state(struct Scsi_Host *shost)</div><div class='add'>+{</div><div class='add'>+	struct beiscsi_hba *phba = iscsi_host_priv(shost);</div><div class='add'>+	struct iscsi_cls_host *ihost = shost-&gt;shost_data;</div><div class='add'>+</div><div class='add'>+	ihost-&gt;port_state = (phba-&gt;state == BE_ADAPTER_UP) ?</div><div class='add'>+		ISCSI_PORT_STATE_UP : ISCSI_PORT_STATE_DOWN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * beiscsi_get_port_speed  - Get the Port Speed from Adapter</div><div class='add'>+ * @shost : pointer to scsi_host structure</div><div class='add'>+ *</div><div class='add'>+ * returns Success/Failure</div><div class='add'>+ */</div><div class='add'>+static int beiscsi_get_port_speed(struct Scsi_Host *shost)</div><div class='add'>+{</div><div class='add'>+	unsigned int tag, wrb_num;</div><div class='add'>+	unsigned short status, extd_status;</div><div class='add'>+	struct be_mcc_wrb *wrb;</div><div class='add'>+	struct be_cmd_ntwk_link_status_resp *resp;</div><div class='add'>+	struct beiscsi_hba *phba = iscsi_host_priv(shost);</div><div class='add'>+	struct iscsi_cls_host *ihost = shost-&gt;shost_data;</div><div class='add'>+	struct be_queue_info *mccq = &amp;phba-&gt;ctrl.mcc_obj.q;</div><div class='add'>+</div><div class='add'>+	tag = be_cmd_get_port_speed(phba);</div><div class='add'>+	if (!tag) {</div><div class='add'>+		SE_DEBUG(DBG_LVL_1, "Getting Port Speed Failed\n");</div><div class='add'>+		 return -EBUSY;</div><div class='add'>+	 } else</div><div class='add'>+		wait_event_interruptible(phba-&gt;ctrl.mcc_wait[tag],</div><div class='add'>+				phba-&gt;ctrl.mcc_numtag[tag]);</div><div class='add'>+</div><div class='add'>+	wrb_num = (phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x00FF0000) &gt;&gt; 16;</div><div class='add'>+	extd_status = (phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x0000FF00) &gt;&gt; 8;</div><div class='add'>+	status = phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x000000FF;</div><div class='add'>+</div><div class='add'>+	if (status || extd_status) {</div><div class='add'>+		SE_DEBUG(DBG_LVL_1, "MailBox Command Failed with "</div><div class='add'>+				"status = %d extd_status = %d\n",</div><div class='add'>+				status, extd_status);</div><div class='add'>+		free_mcc_tag(&amp;phba-&gt;ctrl, tag);</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+	wrb = queue_get_wrb(mccq, wrb_num);</div><div class='add'>+	free_mcc_tag(&amp;phba-&gt;ctrl, tag);</div><div class='add'>+	resp = embedded_payload(wrb);</div><div class='add'>+</div><div class='add'>+	switch (resp-&gt;mac_speed) {</div><div class='add'>+	case BE2ISCSI_LINK_SPEED_10MBPS:</div><div class='add'>+		ihost-&gt;port_speed = ISCSI_PORT_SPEED_10MBPS;</div><div class='add'>+		break;</div><div class='add'>+	case BE2ISCSI_LINK_SPEED_100MBPS:</div><div class='add'>+		ihost-&gt;port_speed = BE2ISCSI_LINK_SPEED_100MBPS;</div><div class='add'>+		break;</div><div class='add'>+	case BE2ISCSI_LINK_SPEED_1GBPS:</div><div class='add'>+		ihost-&gt;port_speed = ISCSI_PORT_SPEED_1GBPS;</div><div class='add'>+		break;</div><div class='add'>+	case BE2ISCSI_LINK_SPEED_10GBPS:</div><div class='add'>+		ihost-&gt;port_speed = ISCSI_PORT_SPEED_10GBPS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ihost-&gt;port_speed = ISCSI_PORT_SPEED_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * beiscsi_get_host_param - get the iscsi parameter</div><div class='ctx'>  * @shost: pointer to scsi_host structure</div><div class='ctx'>  * @param: parameter type identifier</div><div class='hunk'>@@ -301,6 +713,27 @@ int beiscsi_get_host_param(struct Scsi_Host *shost,</div><div class='ctx'> 			return status;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case ISCSI_HOST_PARAM_INITIATOR_NAME:</div><div class='add'>+		status = beiscsi_get_initname(buf, phba);</div><div class='add'>+		if (status &lt; 0) {</div><div class='add'>+			SE_DEBUG(DBG_LVL_1,</div><div class='add'>+					"Retreiving Initiator Name Failed\n");</div><div class='add'>+			return status;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_HOST_PARAM_PORT_STATE:</div><div class='add'>+		beiscsi_get_port_state(shost);</div><div class='add'>+		status = sprintf(buf, "%s\n", iscsi_get_port_state_name(shost));</div><div class='add'>+		break;</div><div class='add'>+	case ISCSI_HOST_PARAM_PORT_SPEED:</div><div class='add'>+		status = beiscsi_get_port_speed(shost);</div><div class='add'>+		if (status) {</div><div class='add'>+			SE_DEBUG(DBG_LVL_1,</div><div class='add'>+					"Retreiving Port Speed Failed\n");</div><div class='add'>+			return status;</div><div class='add'>+		}</div><div class='add'>+		status = sprintf(buf, "%s\n", iscsi_get_port_speed_name(shost));</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return iscsi_host_get_param(shost, param, buf);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -309,46 +742,21 @@ int beiscsi_get_host_param(struct Scsi_Host *shost,</div><div class='ctx'> </div><div class='ctx'> int beiscsi_get_macaddr(char *buf, struct beiscsi_hba *phba)</div><div class='ctx'> {</div><div class='del'>-	struct be_cmd_resp_get_mac_addr *resp;</div><div class='del'>-	struct be_mcc_wrb *wrb;</div><div class='del'>-	unsigned int tag, wrb_num;</div><div class='del'>-	unsigned short status, extd_status;</div><div class='del'>-	struct be_queue_info *mccq = &amp;phba-&gt;ctrl.mcc_obj.q;</div><div class='add'>+	struct be_cmd_get_nic_conf_resp resp;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	if (phba-&gt;read_mac_address)</div><div class='del'>-		return sysfs_format_mac(buf, phba-&gt;mac_address,</div><div class='del'>-					ETH_ALEN);</div><div class='add'>+	if (strlen(phba-&gt;mac_address))</div><div class='add'>+		return strlcpy(buf, phba-&gt;mac_address, PAGE_SIZE);</div><div class='ctx'> </div><div class='del'>-	tag = be_cmd_get_mac_addr(phba);</div><div class='del'>-	if (!tag) {</div><div class='del'>-		SE_DEBUG(DBG_LVL_1, "be_cmd_get_mac_addr Failed\n");</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	} else</div><div class='del'>-		wait_event_interruptible(phba-&gt;ctrl.mcc_wait[tag],</div><div class='del'>-					 phba-&gt;ctrl.mcc_numtag[tag]);</div><div class='add'>+	memset(&amp;resp, 0, sizeof(resp));</div><div class='add'>+	rc = mgmt_get_nic_conf(phba, &amp;resp);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='ctx'> </div><div class='del'>-	wrb_num = (phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x00FF0000) &gt;&gt; 16;</div><div class='del'>-	extd_status = (phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x0000FF00) &gt;&gt; 8;</div><div class='del'>-	status = phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x000000FF;</div><div class='del'>-	if (status || extd_status) {</div><div class='del'>-		SE_DEBUG(DBG_LVL_1, "Failed to get be_cmd_get_mac_addr"</div><div class='del'>-				    " status = %d extd_status = %d\n",</div><div class='del'>-				    status, extd_status);</div><div class='del'>-		free_mcc_tag(&amp;phba-&gt;ctrl, tag);</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	}</div><div class='del'>-	wrb = queue_get_wrb(mccq, wrb_num);</div><div class='del'>-	free_mcc_tag(&amp;phba-&gt;ctrl, tag);</div><div class='del'>-	resp = embedded_payload(wrb);</div><div class='del'>-	memcpy(phba-&gt;mac_address, resp-&gt;mac_address, ETH_ALEN);</div><div class='del'>-	rc = sysfs_format_mac(buf, phba-&gt;mac_address,</div><div class='del'>-			       ETH_ALEN);</div><div class='del'>-	phba-&gt;read_mac_address = 1;</div><div class='del'>-	return rc;</div><div class='add'>+	memcpy(phba-&gt;mac_address, resp.mac_address, ETH_ALEN);</div><div class='add'>+	return sysfs_format_mac(buf, phba-&gt;mac_address, ETH_ALEN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * beiscsi_conn_get_stats - get the iscsi stats</div><div class='ctx'>  * @cls_conn: pointer to iscsi cls conn</div><div class='hunk'>@@ -736,11 +1144,24 @@ void beiscsi_ep_disconnect(struct iscsi_endpoint *ep)</div><div class='ctx'> umode_t be2iscsi_attr_is_visible(int param_type, int param)</div><div class='ctx'> {</div><div class='ctx'> 	switch (param_type) {</div><div class='add'>+	case ISCSI_NET_PARAM:</div><div class='add'>+		switch (param) {</div><div class='add'>+		case ISCSI_NET_PARAM_IFACE_ENABLE:</div><div class='add'>+		case ISCSI_NET_PARAM_IPV4_ADDR:</div><div class='add'>+		case ISCSI_NET_PARAM_IPV4_SUBNET:</div><div class='add'>+		case ISCSI_NET_PARAM_IPV4_BOOTPROTO:</div><div class='add'>+		case ISCSI_NET_PARAM_IPV4_GW:</div><div class='add'>+		case ISCSI_NET_PARAM_IPV6_ADDR:</div><div class='add'>+			return S_IRUGO;</div><div class='add'>+		default:</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='ctx'> 	case ISCSI_HOST_PARAM:</div><div class='ctx'> 		switch (param) {</div><div class='ctx'> 		case ISCSI_HOST_PARAM_HWADDRESS:</div><div class='del'>-		case ISCSI_HOST_PARAM_IPADDRESS:</div><div class='ctx'> 		case ISCSI_HOST_PARAM_INITIATOR_NAME:</div><div class='add'>+		case ISCSI_HOST_PARAM_PORT_STATE:</div><div class='add'>+		case ISCSI_HOST_PARAM_PORT_SPEED:</div><div class='ctx'> 			return S_IRUGO;</div><div class='ctx'> 		default:</div><div class='ctx'> 			return 0;</div><div class='head'>diff --git a/drivers/scsi/be2iscsi/be_iscsi.h b/drivers/scsi/be2iscsi/be_iscsi.h<br/>index 5c45be134501..8b826fc06bcc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_iscsi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/be2iscsi/be_iscsi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_iscsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_iscsi.h</a></div><div class='hunk'>@@ -25,6 +25,21 @@</div><div class='ctx'> </div><div class='ctx'> #define BE2_IPV4  0x1</div><div class='ctx'> #define BE2_IPV6  0x10</div><div class='add'>+#define BE2_DHCP_V4 0x05</div><div class='add'>+</div><div class='add'>+#define NON_BLOCKING 0x0</div><div class='add'>+#define BLOCKING 0x1</div><div class='add'>+</div><div class='add'>+void beiscsi_create_def_ifaces(struct beiscsi_hba *phba);</div><div class='add'>+</div><div class='add'>+void beiscsi_destroy_def_ifaces(struct beiscsi_hba *phba);</div><div class='add'>+</div><div class='add'>+int be2iscsi_iface_get_param(struct iscsi_iface *iface,</div><div class='add'>+			     enum iscsi_param_type param_type,</div><div class='add'>+			     int param, char *buf);</div><div class='add'>+</div><div class='add'>+int be2iscsi_iface_set_param(struct Scsi_Host *shost,</div><div class='add'>+			     void *data, uint32_t count);</div><div class='ctx'> </div><div class='ctx'> umode_t be2iscsi_attr_is_visible(int param_type, int param);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/be2iscsi/be_main.c b/drivers/scsi/be2iscsi/be_main.c<br/>index 375756fa95cf..0b1d99c99fd2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_main.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/be2iscsi/be_main.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_main.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_main.c</a></div><div class='hunk'>@@ -28,8 +28,11 @@</div><div class='ctx'> #include &lt;linux/semaphore.h&gt;</div><div class='ctx'> #include &lt;linux/iscsi_boot_sysfs.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/bsg-lib.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;scsi/libiscsi.h&gt;</div><div class='add'>+#include &lt;scsi/scsi_bsg_iscsi.h&gt;</div><div class='add'>+#include &lt;scsi/scsi_netlink.h&gt;</div><div class='ctx'> #include &lt;scsi/scsi_transport_iscsi.h&gt;</div><div class='ctx'> #include &lt;scsi/scsi_transport.h&gt;</div><div class='ctx'> #include &lt;scsi/scsi_cmnd.h&gt;</div><div class='hunk'>@@ -48,7 +51,8 @@ static unsigned int num_hba = 0;</div><div class='ctx'> </div><div class='ctx'> MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);</div><div class='ctx'> MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);</div><div class='del'>-MODULE_AUTHOR("ServerEngines Corporation");</div><div class='add'>+MODULE_VERSION(BUILD_STR);</div><div class='add'>+MODULE_AUTHOR("Emulex Corporation");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> module_param(be_iopoll_budget, int, 0);</div><div class='ctx'> module_param(enable_msix, int, 0);</div><div class='hunk'>@@ -147,15 +151,15 @@ static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)</div><div class='ctx'> 	struct invalidate_command_table *inv_tbl;</div><div class='ctx'> 	struct be_dma_mem nonemb_cmd;</div><div class='ctx'> 	unsigned int cid, tag, i, num_invalidate;</div><div class='del'>-	int rc = FAILED;</div><div class='ctx'> </div><div class='ctx'> 	/* invalidate iocbs */</div><div class='ctx'> 	cls_session = starget_to_session(scsi_target(sc-&gt;device));</div><div class='ctx'> 	session = cls_session-&gt;dd_data;</div><div class='ctx'> 	spin_lock_bh(&amp;session-&gt;lock);</div><div class='del'>-	if (!session-&gt;leadconn || session-&gt;state != ISCSI_STATE_LOGGED_IN)</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='add'>+	if (!session-&gt;leadconn || session-&gt;state != ISCSI_STATE_LOGGED_IN) {</div><div class='add'>+		spin_unlock_bh(&amp;session-&gt;lock);</div><div class='add'>+		return FAILED;</div><div class='add'>+	}</div><div class='ctx'> 	conn = session-&gt;leadconn;</div><div class='ctx'> 	beiscsi_conn = conn-&gt;dd_data;</div><div class='ctx'> 	phba = beiscsi_conn-&gt;phba;</div><div class='hunk'>@@ -208,9 +212,6 @@ static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)</div><div class='ctx'> 	pci_free_consistent(phba-&gt;ctrl.pdev, nonemb_cmd.size,</div><div class='ctx'> 			    nonemb_cmd.va, nonemb_cmd.dma);</div><div class='ctx'> 	return iscsi_eh_device_reset(sc);</div><div class='del'>-unlock:</div><div class='del'>-	spin_unlock_bh(&amp;session-&gt;lock);</div><div class='del'>-	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)</div><div class='hunk'>@@ -230,10 +231,10 @@ static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)</div><div class='ctx'> 	case ISCSI_BOOT_TGT_IP_ADDR:</div><div class='ctx'> 		if (boot_conn-&gt;dest_ipaddr.ip_type == 0x1)</div><div class='ctx'> 			rc = sprintf(buf, "%pI4\n",</div><div class='del'>-				(char *)&amp;boot_conn-&gt;dest_ipaddr.ip_address);</div><div class='add'>+				(char *)&amp;boot_conn-&gt;dest_ipaddr.addr);</div><div class='ctx'> 		else</div><div class='ctx'> 			rc = sprintf(str, "%pI6\n",</div><div class='del'>-				(char *)&amp;boot_conn-&gt;dest_ipaddr.ip_address);</div><div class='add'>+				(char *)&amp;boot_conn-&gt;dest_ipaddr.addr);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ISCSI_BOOT_TGT_PORT:</div><div class='ctx'> 		rc = sprintf(str, "%d\n", boot_conn-&gt;dest_port);</div><div class='hunk'>@@ -311,12 +312,8 @@ static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)</div><div class='ctx'> 		rc = sprintf(str, "0\n");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ISCSI_BOOT_ETH_MAC:</div><div class='del'>-		rc  = beiscsi_get_macaddr(buf, phba);</div><div class='del'>-		if (rc &lt; 0) {</div><div class='del'>-			SE_DEBUG(DBG_LVL_1, "beiscsi_get_macaddr Failed\n");</div><div class='del'>-			return rc;</div><div class='del'>-		}</div><div class='del'>-	break;</div><div class='add'>+		rc  = beiscsi_get_macaddr(str, phba);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		rc = -ENOSYS;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -394,7 +391,7 @@ MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);</div><div class='ctx'> </div><div class='ctx'> static struct scsi_host_template beiscsi_sht = {</div><div class='ctx'> 	.module = THIS_MODULE,</div><div class='del'>-	.name = "ServerEngines 10Gbe open-iscsi Initiator Driver",</div><div class='add'>+	.name = "Emulex 10Gbe open-iscsi Initiator Driver",</div><div class='ctx'> 	.proc_name = DRV_NAME,</div><div class='ctx'> 	.queuecommand = iscsi_queuecommand,</div><div class='ctx'> 	.change_queue_depth = iscsi_change_queue_depth,</div><div class='hunk'>@@ -409,6 +406,8 @@ static struct scsi_host_template beiscsi_sht = {</div><div class='ctx'> 	.max_sectors = BEISCSI_MAX_SECTORS,</div><div class='ctx'> 	.cmd_per_lun = BEISCSI_CMD_PER_LUN,</div><div class='ctx'> 	.use_clustering = ENABLE_CLUSTERING,</div><div class='add'>+	.vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct scsi_transport_template *beiscsi_scsi_transport;</div><div class='hunk'>@@ -435,6 +434,7 @@ static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)</div><div class='ctx'> 	phba-&gt;shost = shost;</div><div class='ctx'> 	phba-&gt;pcidev = pci_dev_get(pcidev);</div><div class='ctx'> 	pci_set_drvdata(pcidev, phba);</div><div class='add'>+	phba-&gt;interface_handle = 0xFFFFFFFF;</div><div class='ctx'> </div><div class='ctx'> 	if (iscsi_host_add(shost, &amp;phba-&gt;pcidev-&gt;dev))</div><div class='ctx'> 		goto free_devices;</div><div class='hunk'>@@ -544,8 +544,7 @@ static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)</div><div class='ctx'> 						  &amp;mbox_mem_alloc-&gt;dma);</div><div class='ctx'> 	if (!mbox_mem_alloc-&gt;va) {</div><div class='ctx'> 		beiscsi_unmap_pci_function(phba);</div><div class='del'>-		status = -ENOMEM;</div><div class='del'>-		return status;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mbox_mem_align-&gt;size = sizeof(struct be_mcc_mailbox);</div><div class='hunk'>@@ -1252,9 +1251,9 @@ hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,</div><div class='ctx'> 	task = pwrb_handle-&gt;pio_handle;</div><div class='ctx'> </div><div class='ctx'> 	io_task = task-&gt;dd_data;</div><div class='del'>-	spin_lock(&amp;phba-&gt;mgmt_sgl_lock);</div><div class='add'>+	spin_lock_bh(&amp;phba-&gt;mgmt_sgl_lock);</div><div class='ctx'> 	free_mgmt_sgl_handle(phba, io_task-&gt;psgl_handle);</div><div class='del'>-	spin_unlock(&amp;phba-&gt;mgmt_sgl_lock);</div><div class='add'>+	spin_unlock_bh(&amp;phba-&gt;mgmt_sgl_lock);</div><div class='ctx'> 	spin_lock_bh(&amp;session-&gt;lock);</div><div class='ctx'> 	free_wrb_handle(phba, pwrb_context, pwrb_handle);</div><div class='ctx'> 	spin_unlock_bh(&amp;session-&gt;lock);</div><div class='hunk'>@@ -1370,8 +1369,6 @@ hwi_get_async_handle(struct beiscsi_hba *phba,</div><div class='ctx'> 	struct be_bus_address phys_addr;</div><div class='ctx'> 	struct list_head *pbusy_list;</div><div class='ctx'> 	struct async_pdu_handle *pasync_handle = NULL;</div><div class='del'>-	int buffer_len = 0;</div><div class='del'>-	unsigned char buffer_index = -1;</div><div class='ctx'> 	unsigned char is_header = 0;</div><div class='ctx'> </div><div class='ctx'> 	phys_addr.u.a32.address_lo =</div><div class='hunk'>@@ -1392,22 +1389,11 @@ hwi_get_async_handle(struct beiscsi_hba *phba,</div><div class='ctx'> 		pbusy_list = hwi_get_async_busy_list(pasync_ctx, 1,</div><div class='ctx'> 			(pdpdu_cqe-&gt;dw[offsetof(struct amap_i_t_dpdu_cqe,</div><div class='ctx'> 			index) / 32] &amp; PDUCQE_INDEX_MASK));</div><div class='del'>-</div><div class='del'>-		buffer_len = (unsigned int)(phys_addr.u.a64.address -</div><div class='del'>-				pasync_ctx-&gt;async_header.pa_base.u.a64.address);</div><div class='del'>-</div><div class='del'>-		buffer_index = buffer_len /</div><div class='del'>-				pasync_ctx-&gt;async_header.buffer_size;</div><div class='del'>-</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UNSOL_DATA_NOTIFY:</div><div class='ctx'> 		pbusy_list = hwi_get_async_busy_list(pasync_ctx, 0, (pdpdu_cqe-&gt;</div><div class='ctx'> 					dw[offsetof(struct amap_i_t_dpdu_cqe,</div><div class='ctx'> 					index) / 32] &amp; PDUCQE_INDEX_MASK));</div><div class='del'>-		buffer_len = (unsigned long)(phys_addr.u.a64.address -</div><div class='del'>-					pasync_ctx-&gt;async_data.pa_base.u.</div><div class='del'>-					a64.address);</div><div class='del'>-		buffer_index = buffer_len / pasync_ctx-&gt;async_data.buffer_size;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pbusy_list = NULL;</div><div class='hunk'>@@ -1418,11 +1404,9 @@ hwi_get_async_handle(struct beiscsi_hba *phba,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	WARN_ON(!(buffer_index &lt;= pasync_ctx-&gt;async_data.num_entries));</div><div class='ctx'> 	WARN_ON(list_empty(pbusy_list));</div><div class='ctx'> 	list_for_each_entry(pasync_handle, pbusy_list, link) {</div><div class='del'>-		WARN_ON(pasync_handle-&gt;consumed);</div><div class='del'>-		if (pasync_handle-&gt;index == buffer_index)</div><div class='add'>+		if (pasync_handle-&gt;pa.u.a64.address == phys_addr.u.a64.address)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1449,15 +1433,13 @@ hwi_update_async_writables(struct hwi_async_pdu_context *pasync_ctx,</div><div class='ctx'> 	unsigned int num_entries, writables = 0;</div><div class='ctx'> 	unsigned int *pep_read_ptr, *pwritables;</div><div class='ctx'> </div><div class='del'>-</div><div class='add'>+	num_entries = pasync_ctx-&gt;num_entries;</div><div class='ctx'> 	if (is_header) {</div><div class='ctx'> 		pep_read_ptr = &amp;pasync_ctx-&gt;async_header.ep_read_ptr;</div><div class='ctx'> 		pwritables = &amp;pasync_ctx-&gt;async_header.writables;</div><div class='del'>-		num_entries = pasync_ctx-&gt;async_header.num_entries;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pep_read_ptr = &amp;pasync_ctx-&gt;async_data.ep_read_ptr;</div><div class='ctx'> 		pwritables = &amp;pasync_ctx-&gt;async_data.writables;</div><div class='del'>-		num_entries = pasync_ctx-&gt;async_data.num_entries;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	while ((*pep_read_ptr) != cq_index) {</div><div class='hunk'>@@ -1491,14 +1473,13 @@ hwi_update_async_writables(struct hwi_async_pdu_context *pasync_ctx,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int hwi_free_async_msg(struct beiscsi_hba *phba,</div><div class='add'>+static void hwi_free_async_msg(struct beiscsi_hba *phba,</div><div class='ctx'> 				       unsigned int cri)</div><div class='ctx'> {</div><div class='ctx'> 	struct hwi_controller *phwi_ctrlr;</div><div class='ctx'> 	struct hwi_async_pdu_context *pasync_ctx;</div><div class='ctx'> 	struct async_pdu_handle *pasync_handle, *tmp_handle;</div><div class='ctx'> 	struct list_head *plist;</div><div class='del'>-	unsigned int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	phwi_ctrlr = phba-&gt;phwi_ctrlr;</div><div class='ctx'> 	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);</div><div class='hunk'>@@ -1508,23 +1489,20 @@ static unsigned int hwi_free_async_msg(struct beiscsi_hba *phba,</div><div class='ctx'> 	list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {</div><div class='ctx'> 		list_del(&amp;pasync_handle-&gt;link);</div><div class='ctx'> </div><div class='del'>-		if (i == 0) {</div><div class='add'>+		if (pasync_handle-&gt;is_header) {</div><div class='ctx'> 			list_add_tail(&amp;pasync_handle-&gt;link,</div><div class='ctx'> 				      &amp;pasync_ctx-&gt;async_header.free_list);</div><div class='ctx'> 			pasync_ctx-&gt;async_header.free_entries++;</div><div class='del'>-			i++;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			list_add_tail(&amp;pasync_handle-&gt;link,</div><div class='ctx'> 				      &amp;pasync_ctx-&gt;async_data.free_list);</div><div class='ctx'> 			pasync_ctx-&gt;async_data.free_entries++;</div><div class='del'>-			i++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;pasync_ctx-&gt;async_entry[cri].wait_queue.list);</div><div class='ctx'> 	pasync_ctx-&gt;async_entry[cri].wait_queue.hdr_received = 0;</div><div class='ctx'> 	pasync_ctx-&gt;async_entry[cri].wait_queue.bytes_received = 0;</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct phys_addr *</div><div class='hunk'>@@ -1557,16 +1535,15 @@ static void hwi_post_async_buffers(struct beiscsi_hba *phba,</div><div class='ctx'> </div><div class='ctx'> 	phwi_ctrlr = phba-&gt;phwi_ctrlr;</div><div class='ctx'> 	pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);</div><div class='add'>+	num_entries = pasync_ctx-&gt;num_entries;</div><div class='ctx'> </div><div class='ctx'> 	if (is_header) {</div><div class='del'>-		num_entries = pasync_ctx-&gt;async_header.num_entries;</div><div class='ctx'> 		writables = min(pasync_ctx-&gt;async_header.writables,</div><div class='ctx'> 				pasync_ctx-&gt;async_header.free_entries);</div><div class='ctx'> 		pfree_link = pasync_ctx-&gt;async_header.free_list.next;</div><div class='ctx'> 		host_write_num = pasync_ctx-&gt;async_header.host_write_ptr;</div><div class='ctx'> 		ring_id = phwi_ctrlr-&gt;default_pdu_hdr.id;</div><div class='ctx'> 	} else {</div><div class='del'>-		num_entries = pasync_ctx-&gt;async_data.num_entries;</div><div class='ctx'> 		writables = min(pasync_ctx-&gt;async_data.writables,</div><div class='ctx'> 				pasync_ctx-&gt;async_data.free_entries);</div><div class='ctx'> 		pfree_link = pasync_ctx-&gt;async_data.free_list.next;</div><div class='hunk'>@@ -1673,7 +1650,7 @@ hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,</div><div class='ctx'> 			}</div><div class='ctx'> 			memcpy(pfirst_buffer + offset,</div><div class='ctx'> 			       pasync_handle-&gt;pbuffer, buf_len);</div><div class='del'>-			offset = buf_len;</div><div class='add'>+			offset += buf_len;</div><div class='ctx'> 		}</div><div class='ctx'> 		index++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1682,10 +1659,9 @@ hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,</div><div class='ctx'> 					   (beiscsi_conn-&gt;beiscsi_conn_cid -</div><div class='ctx'> 					    phba-&gt;fw_config.iscsi_cid_start),</div><div class='ctx'> 					    phdr, hdr_len, pfirst_buffer,</div><div class='del'>-					    buf_len);</div><div class='add'>+					    offset);</div><div class='ctx'> </div><div class='del'>-	if (status == 0)</div><div class='del'>-		hwi_free_async_msg(phba, cri);</div><div class='add'>+	hwi_free_async_msg(phba, cri);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2229,7 +2205,7 @@ static int beiscsi_alloc_mem(struct beiscsi_hba *phba)</div><div class='ctx'> 	struct mem_array *mem_arr, *mem_arr_orig;</div><div class='ctx'> 	unsigned int i, j, alloc_size, curr_alloc_size;</div><div class='ctx'> </div><div class='del'>-	phba-&gt;phwi_ctrlr = kmalloc(phba-&gt;params.hwi_ws_sz, GFP_KERNEL);</div><div class='add'>+	phba-&gt;phwi_ctrlr = kzalloc(phba-&gt;params.hwi_ws_sz, GFP_KERNEL);</div><div class='ctx'> 	if (!phba-&gt;phwi_ctrlr)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -2349,27 +2325,21 @@ static void iscsi_init_global_templates(struct beiscsi_hba *phba)</div><div class='ctx'> 	AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void beiscsi_init_wrb_handle(struct beiscsi_hba *phba)</div><div class='add'>+static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;</div><div class='del'>-	struct wrb_handle *pwrb_handle;</div><div class='add'>+	struct wrb_handle *pwrb_handle = NULL;</div><div class='ctx'> 	struct hwi_controller *phwi_ctrlr;</div><div class='ctx'> 	struct hwi_wrb_context *pwrb_context;</div><div class='del'>-	struct iscsi_wrb *pwrb;</div><div class='del'>-	unsigned int num_cxn_wrbh;</div><div class='del'>-	unsigned int num_cxn_wrb, j, idx, index;</div><div class='add'>+	struct iscsi_wrb *pwrb = NULL;</div><div class='add'>+	unsigned int num_cxn_wrbh = 0;</div><div class='add'>+	unsigned int num_cxn_wrb = 0, j, idx = 0, index;</div><div class='ctx'> </div><div class='ctx'> 	mem_descr_wrbh = phba-&gt;init_mem;</div><div class='ctx'> 	mem_descr_wrbh += HWI_MEM_WRBH;</div><div class='ctx'> </div><div class='ctx'> 	mem_descr_wrb = phba-&gt;init_mem;</div><div class='ctx'> 	mem_descr_wrb += HWI_MEM_WRB;</div><div class='del'>-</div><div class='del'>-	idx = 0;</div><div class='del'>-	pwrb_handle = mem_descr_wrbh-&gt;mem_array[idx].virtual_address;</div><div class='del'>-	num_cxn_wrbh = ((mem_descr_wrbh-&gt;mem_array[idx].size) /</div><div class='del'>-			((sizeof(struct wrb_handle)) *</div><div class='del'>-			 phba-&gt;params.wrbs_per_cxn));</div><div class='ctx'> 	phwi_ctrlr = phba-&gt;phwi_ctrlr;</div><div class='ctx'> </div><div class='ctx'> 	for (index = 0; index &lt; phba-&gt;params.cxns_per_ctrl * 2; index += 2) {</div><div class='hunk'>@@ -2377,12 +2347,32 @@ static void beiscsi_init_wrb_handle(struct beiscsi_hba *phba)</div><div class='ctx'> 		pwrb_context-&gt;pwrb_handle_base =</div><div class='ctx'> 				kzalloc(sizeof(struct wrb_handle *) *</div><div class='ctx'> 					phba-&gt;params.wrbs_per_cxn, GFP_KERNEL);</div><div class='add'>+		if (!pwrb_context-&gt;pwrb_handle_base) {</div><div class='add'>+			shost_printk(KERN_ERR, phba-&gt;shost,</div><div class='add'>+					"Mem Alloc Failed. Failing to load\n");</div><div class='add'>+			goto init_wrb_hndl_failed;</div><div class='add'>+		}</div><div class='ctx'> 		pwrb_context-&gt;pwrb_handle_basestd =</div><div class='ctx'> 				kzalloc(sizeof(struct wrb_handle *) *</div><div class='ctx'> 					phba-&gt;params.wrbs_per_cxn, GFP_KERNEL);</div><div class='add'>+		if (!pwrb_context-&gt;pwrb_handle_basestd) {</div><div class='add'>+			shost_printk(KERN_ERR, phba-&gt;shost,</div><div class='add'>+					"Mem Alloc Failed. Failing to load\n");</div><div class='add'>+			goto init_wrb_hndl_failed;</div><div class='add'>+		}</div><div class='add'>+		if (!num_cxn_wrbh) {</div><div class='add'>+			pwrb_handle =</div><div class='add'>+				mem_descr_wrbh-&gt;mem_array[idx].virtual_address;</div><div class='add'>+			num_cxn_wrbh = ((mem_descr_wrbh-&gt;mem_array[idx].size) /</div><div class='add'>+					((sizeof(struct wrb_handle)) *</div><div class='add'>+					 phba-&gt;params.wrbs_per_cxn));</div><div class='add'>+			idx++;</div><div class='add'>+		}</div><div class='add'>+		pwrb_context-&gt;alloc_index = 0;</div><div class='add'>+		pwrb_context-&gt;wrb_handles_available = 0;</div><div class='add'>+		pwrb_context-&gt;free_index = 0;</div><div class='add'>+</div><div class='ctx'> 		if (num_cxn_wrbh) {</div><div class='del'>-			pwrb_context-&gt;alloc_index = 0;</div><div class='del'>-			pwrb_context-&gt;wrb_handles_available = 0;</div><div class='ctx'> 			for (j = 0; j &lt; phba-&gt;params.wrbs_per_cxn; j++) {</div><div class='ctx'> 				pwrb_context-&gt;pwrb_handle_base[j] = pwrb_handle;</div><div class='ctx'> 				pwrb_context-&gt;pwrb_handle_basestd[j] =</div><div class='hunk'>@@ -2391,49 +2381,21 @@ static void beiscsi_init_wrb_handle(struct beiscsi_hba *phba)</div><div class='ctx'> 				pwrb_handle-&gt;wrb_index = j;</div><div class='ctx'> 				pwrb_handle++;</div><div class='ctx'> 			}</div><div class='del'>-			pwrb_context-&gt;free_index = 0;</div><div class='del'>-			num_cxn_wrbh--;</div><div class='del'>-		} else {</div><div class='del'>-			idx++;</div><div class='del'>-			pwrb_handle =</div><div class='del'>-			    mem_descr_wrbh-&gt;mem_array[idx].virtual_address;</div><div class='del'>-			num_cxn_wrbh =</div><div class='del'>-			    ((mem_descr_wrbh-&gt;mem_array[idx].size) /</div><div class='del'>-			     ((sizeof(struct wrb_handle)) *</div><div class='del'>-			      phba-&gt;params.wrbs_per_cxn));</div><div class='del'>-			pwrb_context-&gt;alloc_index = 0;</div><div class='del'>-			for (j = 0; j &lt; phba-&gt;params.wrbs_per_cxn; j++) {</div><div class='del'>-				pwrb_context-&gt;pwrb_handle_base[j] = pwrb_handle;</div><div class='del'>-				pwrb_context-&gt;pwrb_handle_basestd[j] =</div><div class='del'>-				    pwrb_handle;</div><div class='del'>-				pwrb_context-&gt;wrb_handles_available++;</div><div class='del'>-				pwrb_handle-&gt;wrb_index = j;</div><div class='del'>-				pwrb_handle++;</div><div class='del'>-			}</div><div class='del'>-			pwrb_context-&gt;free_index = 0;</div><div class='ctx'> 			num_cxn_wrbh--;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	idx = 0;</div><div class='del'>-	pwrb = mem_descr_wrb-&gt;mem_array[idx].virtual_address;</div><div class='del'>-	num_cxn_wrb = (mem_descr_wrb-&gt;mem_array[idx].size) /</div><div class='del'>-		      ((sizeof(struct iscsi_wrb) *</div><div class='del'>-			phba-&gt;params.wrbs_per_cxn));</div><div class='ctx'> 	for (index = 0; index &lt; phba-&gt;params.cxns_per_ctrl * 2; index += 2) {</div><div class='ctx'> 		pwrb_context = &amp;phwi_ctrlr-&gt;wrb_context[index];</div><div class='del'>-		if (num_cxn_wrb) {</div><div class='del'>-			for (j = 0; j &lt; phba-&gt;params.wrbs_per_cxn; j++) {</div><div class='del'>-				pwrb_handle = pwrb_context-&gt;pwrb_handle_base[j];</div><div class='del'>-				pwrb_handle-&gt;pwrb = pwrb;</div><div class='del'>-				pwrb++;</div><div class='del'>-			}</div><div class='del'>-			num_cxn_wrb--;</div><div class='del'>-		} else {</div><div class='del'>-			idx++;</div><div class='add'>+		if (!num_cxn_wrb) {</div><div class='ctx'> 			pwrb = mem_descr_wrb-&gt;mem_array[idx].virtual_address;</div><div class='ctx'> 			num_cxn_wrb = (mem_descr_wrb-&gt;mem_array[idx].size) /</div><div class='del'>-				      ((sizeof(struct iscsi_wrb) *</div><div class='del'>-					phba-&gt;params.wrbs_per_cxn));</div><div class='add'>+				((sizeof(struct iscsi_wrb) *</div><div class='add'>+				  phba-&gt;params.wrbs_per_cxn));</div><div class='add'>+			idx++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (num_cxn_wrb) {</div><div class='ctx'> 			for (j = 0; j &lt; phba-&gt;params.wrbs_per_cxn; j++) {</div><div class='ctx'> 				pwrb_handle = pwrb_context-&gt;pwrb_handle_base[j];</div><div class='ctx'> 				pwrb_handle-&gt;pwrb = pwrb;</div><div class='hunk'>@@ -2442,6 +2404,14 @@ static void beiscsi_init_wrb_handle(struct beiscsi_hba *phba)</div><div class='ctx'> 			num_cxn_wrb--;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='add'>+init_wrb_hndl_failed:</div><div class='add'>+	for (j = index; j &gt; 0; j--) {</div><div class='add'>+		pwrb_context = &amp;phwi_ctrlr-&gt;wrb_context[j];</div><div class='add'>+		kfree(pwrb_context-&gt;pwrb_handle_base);</div><div class='add'>+		kfree(pwrb_context-&gt;pwrb_handle_basestd);</div><div class='add'>+	}</div><div class='add'>+	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)</div><div class='hunk'>@@ -2450,7 +2420,7 @@ static void hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)</div><div class='ctx'> 	struct hba_parameters *p = &amp;phba-&gt;params;</div><div class='ctx'> 	struct hwi_async_pdu_context *pasync_ctx;</div><div class='ctx'> 	struct async_pdu_handle *pasync_header_h, *pasync_data_h;</div><div class='del'>-	unsigned int index;</div><div class='add'>+	unsigned int index, idx, num_per_mem, num_async_data;</div><div class='ctx'> 	struct be_mem_descriptor *mem_descr;</div><div class='ctx'> </div><div class='ctx'> 	mem_descr = (struct be_mem_descriptor *)phba-&gt;init_mem;</div><div class='hunk'>@@ -2462,10 +2432,8 @@ static void hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)</div><div class='ctx'> 	pasync_ctx = phwi_ctrlr-&gt;phwi_ctxt-&gt;pasync_ctx;</div><div class='ctx'> 	memset(pasync_ctx, 0, sizeof(*pasync_ctx));</div><div class='ctx'> </div><div class='del'>-	pasync_ctx-&gt;async_header.num_entries = p-&gt;asyncpdus_per_ctrl;</div><div class='del'>-	pasync_ctx-&gt;async_header.buffer_size = p-&gt;defpdu_hdr_sz;</div><div class='del'>-	pasync_ctx-&gt;async_data.buffer_size = p-&gt;defpdu_data_sz;</div><div class='del'>-	pasync_ctx-&gt;async_data.num_entries = p-&gt;asyncpdus_per_ctrl;</div><div class='add'>+	pasync_ctx-&gt;num_entries = p-&gt;asyncpdus_per_ctrl;</div><div class='add'>+	pasync_ctx-&gt;buffer_size = p-&gt;defpdu_hdr_sz;</div><div class='ctx'> </div><div class='ctx'> 	mem_descr = (struct be_mem_descriptor *)phba-&gt;init_mem;</div><div class='ctx'> 	mem_descr += HWI_MEM_ASYNC_HEADER_BUF;</div><div class='hunk'>@@ -2510,19 +2478,6 @@ static void hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)</div><div class='ctx'> 	pasync_ctx-&gt;async_header.writables = 0;</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;pasync_ctx-&gt;async_header.free_list);</div><div class='ctx'> </div><div class='del'>-	mem_descr = (struct be_mem_descriptor *)phba-&gt;init_mem;</div><div class='del'>-	mem_descr += HWI_MEM_ASYNC_DATA_BUF;</div><div class='del'>-	if (mem_descr-&gt;mem_array[0].virtual_address) {</div><div class='del'>-		SE_DEBUG(DBG_LVL_8,</div><div class='del'>-			 "hwi_init_async_pdu_ctx HWI_MEM_ASYNC_DATA_BUF"</div><div class='del'>-			 "va=%p\n", mem_descr-&gt;mem_array[0].virtual_address);</div><div class='del'>-	} else</div><div class='del'>-		shost_printk(KERN_WARNING, phba-&gt;shost,</div><div class='del'>-			    "No Virtual address\n");</div><div class='del'>-	pasync_ctx-&gt;async_data.va_base =</div><div class='del'>-			mem_descr-&gt;mem_array[0].virtual_address;</div><div class='del'>-	pasync_ctx-&gt;async_data.pa_base.u.a64.address =</div><div class='del'>-			mem_descr-&gt;mem_array[0].bus_address.u.a64.address;</div><div class='ctx'> </div><div class='ctx'> 	mem_descr = (struct be_mem_descriptor *)phba-&gt;init_mem;</div><div class='ctx'> 	mem_descr += HWI_MEM_ASYNC_DATA_RING;</div><div class='hunk'>@@ -2553,6 +2508,25 @@ static void hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)</div><div class='ctx'> 	pasync_data_h =</div><div class='ctx'> 		(struct async_pdu_handle *)pasync_ctx-&gt;async_data.handle_base;</div><div class='ctx'> </div><div class='add'>+	mem_descr = (struct be_mem_descriptor *)phba-&gt;init_mem;</div><div class='add'>+	mem_descr += HWI_MEM_ASYNC_DATA_BUF;</div><div class='add'>+	if (mem_descr-&gt;mem_array[0].virtual_address) {</div><div class='add'>+		SE_DEBUG(DBG_LVL_8,</div><div class='add'>+			 "hwi_init_async_pdu_ctx HWI_MEM_ASYNC_DATA_BUF"</div><div class='add'>+			 "va=%p\n", mem_descr-&gt;mem_array[0].virtual_address);</div><div class='add'>+	} else</div><div class='add'>+		shost_printk(KERN_WARNING, phba-&gt;shost,</div><div class='add'>+			    "No Virtual address\n");</div><div class='add'>+	idx = 0;</div><div class='add'>+	pasync_ctx-&gt;async_data.va_base =</div><div class='add'>+			mem_descr-&gt;mem_array[idx].virtual_address;</div><div class='add'>+	pasync_ctx-&gt;async_data.pa_base.u.a64.address =</div><div class='add'>+			mem_descr-&gt;mem_array[idx].bus_address.u.a64.address;</div><div class='add'>+</div><div class='add'>+	num_async_data = ((mem_descr-&gt;mem_array[idx].size) /</div><div class='add'>+				phba-&gt;params.defpdu_data_sz);</div><div class='add'>+	num_per_mem = 0;</div><div class='add'>+</div><div class='ctx'> 	for (index = 0; index &lt; p-&gt;asyncpdus_per_ctrl; index++) {</div><div class='ctx'> 		pasync_header_h-&gt;cri = -1;</div><div class='ctx'> 		pasync_header_h-&gt;index = (char)index;</div><div class='hunk'>@@ -2578,14 +2552,29 @@ static void hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)</div><div class='ctx'> 		pasync_data_h-&gt;cri = -1;</div><div class='ctx'> 		pasync_data_h-&gt;index = (char)index;</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;pasync_data_h-&gt;link);</div><div class='add'>+</div><div class='add'>+		if (!num_async_data) {</div><div class='add'>+			num_per_mem = 0;</div><div class='add'>+			idx++;</div><div class='add'>+			pasync_ctx-&gt;async_data.va_base =</div><div class='add'>+				mem_descr-&gt;mem_array[idx].virtual_address;</div><div class='add'>+			pasync_ctx-&gt;async_data.pa_base.u.a64.address =</div><div class='add'>+				mem_descr-&gt;mem_array[idx].</div><div class='add'>+				bus_address.u.a64.address;</div><div class='add'>+</div><div class='add'>+			num_async_data = ((mem_descr-&gt;mem_array[idx].size) /</div><div class='add'>+					phba-&gt;params.defpdu_data_sz);</div><div class='add'>+		}</div><div class='ctx'> 		pasync_data_h-&gt;pbuffer =</div><div class='ctx'> 			(void *)((unsigned long)</div><div class='ctx'> 			(pasync_ctx-&gt;async_data.va_base) +</div><div class='del'>-			(p-&gt;defpdu_data_sz * index));</div><div class='add'>+			(p-&gt;defpdu_data_sz * num_per_mem));</div><div class='ctx'> </div><div class='ctx'> 		pasync_data_h-&gt;pa.u.a64.address =</div><div class='ctx'> 		    pasync_ctx-&gt;async_data.pa_base.u.a64.address +</div><div class='del'>-		    (p-&gt;defpdu_data_sz * index);</div><div class='add'>+		    (p-&gt;defpdu_data_sz * num_per_mem);</div><div class='add'>+		num_per_mem++;</div><div class='add'>+		num_async_data--;</div><div class='ctx'> </div><div class='ctx'> 		list_add_tail(&amp;pasync_data_h-&gt;link,</div><div class='ctx'> 			      &amp;pasync_ctx-&gt;async_data.free_list);</div><div class='hunk'>@@ -2913,9 +2902,11 @@ beiscsi_post_pages(struct beiscsi_hba *phba)</div><div class='ctx'> static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_dma_mem *mem = &amp;q-&gt;dma_mem;</div><div class='del'>-	if (mem-&gt;va)</div><div class='add'>+	if (mem-&gt;va) {</div><div class='ctx'> 		pci_free_consistent(phba-&gt;pcidev, mem-&gt;size,</div><div class='ctx'> 			mem-&gt;va, mem-&gt;dma);</div><div class='add'>+		mem-&gt;va = NULL;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,</div><div class='hunk'>@@ -3215,7 +3206,7 @@ static int hwi_init_port(struct beiscsi_hba *phba)</div><div class='ctx'> error:</div><div class='ctx'> 	shost_printk(KERN_ERR, phba-&gt;shost, "hwi_init_port failed");</div><div class='ctx'> 	hwi_cleanup(phba);</div><div class='del'>-	return -ENOMEM;</div><div class='add'>+	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hwi_init_controller(struct beiscsi_hba *phba)</div><div class='hunk'>@@ -3236,7 +3227,9 @@ static int hwi_init_controller(struct beiscsi_hba *phba)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	iscsi_init_global_templates(phba);</div><div class='del'>-	beiscsi_init_wrb_handle(phba);</div><div class='add'>+	if (beiscsi_init_wrb_handle(phba))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	hwi_init_async_pdu_ctx(phba);</div><div class='ctx'> 	if (hwi_init_port(phba) != 0) {</div><div class='ctx'> 		shost_printk(KERN_ERR, phba-&gt;shost,</div><div class='hunk'>@@ -3288,7 +3281,7 @@ static int beiscsi_init_controller(struct beiscsi_hba *phba)</div><div class='ctx'> </div><div class='ctx'> free_init:</div><div class='ctx'> 	beiscsi_free_mem(phba);</div><div class='del'>-	return -ENOMEM;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)</div><div class='hunk'>@@ -3475,8 +3468,8 @@ static void hwi_disable_intr(struct beiscsi_hba *phba)</div><div class='ctx'> </div><div class='ctx'> static int beiscsi_get_boot_info(struct beiscsi_hba *phba)</div><div class='ctx'> {</div><div class='del'>-	struct be_cmd_resp_get_boot_target *boot_resp;</div><div class='del'>-	struct be_cmd_resp_get_session *session_resp;</div><div class='add'>+	struct be_cmd_get_boot_target_resp *boot_resp;</div><div class='add'>+	struct be_cmd_get_session_resp *session_resp;</div><div class='ctx'> 	struct be_mcc_wrb *wrb;</div><div class='ctx'> 	struct be_dma_mem nonemb_cmd;</div><div class='ctx'> 	unsigned int tag, wrb_num;</div><div class='hunk'>@@ -3484,9 +3477,9 @@ static int beiscsi_get_boot_info(struct beiscsi_hba *phba)</div><div class='ctx'> 	struct be_queue_info *mccq = &amp;phba-&gt;ctrl.mcc_obj.q;</div><div class='ctx'> 	int ret = -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	tag = beiscsi_get_boot_target(phba);</div><div class='add'>+	tag = mgmt_get_boot_target(phba);</div><div class='ctx'> 	if (!tag) {</div><div class='del'>-		SE_DEBUG(DBG_LVL_1, "be_cmd_get_mac_addr Failed\n");</div><div class='add'>+		SE_DEBUG(DBG_LVL_1, "beiscsi_get_boot_info Failed\n");</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> 	} else</div><div class='ctx'> 		wait_event_interruptible(phba-&gt;ctrl.mcc_wait[tag],</div><div class='hunk'>@@ -3496,7 +3489,7 @@ static int beiscsi_get_boot_info(struct beiscsi_hba *phba)</div><div class='ctx'> 	extd_status = (phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x0000FF00) &gt;&gt; 8;</div><div class='ctx'> 	status = phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x000000FF;</div><div class='ctx'> 	if (status || extd_status) {</div><div class='del'>-		SE_DEBUG(DBG_LVL_1, "be_cmd_get_mac_addr Failed"</div><div class='add'>+		SE_DEBUG(DBG_LVL_1, "beiscsi_get_boot_info Failed"</div><div class='ctx'> 				    " status = %d extd_status = %d\n",</div><div class='ctx'> 				    status, extd_status);</div><div class='ctx'> 		free_mcc_tag(&amp;phba-&gt;ctrl, tag);</div><div class='hunk'>@@ -3522,8 +3515,8 @@ static int beiscsi_get_boot_info(struct beiscsi_hba *phba)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memset(nonemb_cmd.va, 0, sizeof(*session_resp));</div><div class='del'>-	tag = beiscsi_get_session_info(phba,</div><div class='del'>-		boot_resp-&gt;boot_session_handle, &amp;nonemb_cmd);</div><div class='add'>+	tag = mgmt_get_session_info(phba, boot_resp-&gt;boot_session_handle,</div><div class='add'>+				    &amp;nonemb_cmd);</div><div class='ctx'> 	if (!tag) {</div><div class='ctx'> 		SE_DEBUG(DBG_LVL_1, "beiscsi_get_session_info"</div><div class='ctx'> 			" Failed\n");</div><div class='hunk'>@@ -3696,6 +3689,57 @@ static void beiscsi_clean_port(struct beiscsi_hba *phba)</div><div class='ctx'> 	kfree(phba-&gt;ep_array);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void beiscsi_cleanup_task(struct iscsi_task *task)</div><div class='add'>+{</div><div class='add'>+	struct beiscsi_io_task *io_task = task-&gt;dd_data;</div><div class='add'>+	struct iscsi_conn *conn = task-&gt;conn;</div><div class='add'>+	struct beiscsi_conn *beiscsi_conn = conn-&gt;dd_data;</div><div class='add'>+	struct beiscsi_hba *phba = beiscsi_conn-&gt;phba;</div><div class='add'>+	struct beiscsi_session *beiscsi_sess = beiscsi_conn-&gt;beiscsi_sess;</div><div class='add'>+	struct hwi_wrb_context *pwrb_context;</div><div class='add'>+	struct hwi_controller *phwi_ctrlr;</div><div class='add'>+</div><div class='add'>+	phwi_ctrlr = phba-&gt;phwi_ctrlr;</div><div class='add'>+	pwrb_context = &amp;phwi_ctrlr-&gt;wrb_context[beiscsi_conn-&gt;beiscsi_conn_cid</div><div class='add'>+			- phba-&gt;fw_config.iscsi_cid_start];</div><div class='add'>+</div><div class='add'>+	if (io_task-&gt;cmd_bhs) {</div><div class='add'>+		pci_pool_free(beiscsi_sess-&gt;bhs_pool, io_task-&gt;cmd_bhs,</div><div class='add'>+			      io_task-&gt;bhs_pa.u.a64.address);</div><div class='add'>+		io_task-&gt;cmd_bhs = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (task-&gt;sc) {</div><div class='add'>+		if (io_task-&gt;pwrb_handle) {</div><div class='add'>+			free_wrb_handle(phba, pwrb_context,</div><div class='add'>+					io_task-&gt;pwrb_handle);</div><div class='add'>+			io_task-&gt;pwrb_handle = NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (io_task-&gt;psgl_handle) {</div><div class='add'>+			spin_lock(&amp;phba-&gt;io_sgl_lock);</div><div class='add'>+			free_io_sgl_handle(phba, io_task-&gt;psgl_handle);</div><div class='add'>+			spin_unlock(&amp;phba-&gt;io_sgl_lock);</div><div class='add'>+			io_task-&gt;psgl_handle = NULL;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (!beiscsi_conn-&gt;login_in_progress) {</div><div class='add'>+			if (io_task-&gt;pwrb_handle) {</div><div class='add'>+				free_wrb_handle(phba, pwrb_context,</div><div class='add'>+						io_task-&gt;pwrb_handle);</div><div class='add'>+				io_task-&gt;pwrb_handle = NULL;</div><div class='add'>+			}</div><div class='add'>+			if (io_task-&gt;psgl_handle) {</div><div class='add'>+				spin_lock(&amp;phba-&gt;mgmt_sgl_lock);</div><div class='add'>+				free_mgmt_sgl_handle(phba,</div><div class='add'>+						     io_task-&gt;psgl_handle);</div><div class='add'>+				spin_unlock(&amp;phba-&gt;mgmt_sgl_lock);</div><div class='add'>+				io_task-&gt;psgl_handle = NULL;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void</div><div class='ctx'> beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,</div><div class='ctx'> 			   struct beiscsi_offload_params *params)</div><div class='hunk'>@@ -3704,12 +3748,19 @@ beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,</div><div class='ctx'> 	struct iscsi_target_context_update_wrb *pwrb = NULL;</div><div class='ctx'> 	struct be_mem_descriptor *mem_descr;</div><div class='ctx'> 	struct beiscsi_hba *phba = beiscsi_conn-&gt;phba;</div><div class='add'>+	struct iscsi_task *task = beiscsi_conn-&gt;task;</div><div class='add'>+	struct iscsi_session *session = task-&gt;conn-&gt;session;</div><div class='ctx'> 	u32 doorbell = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We can always use 0 here because it is reserved by libiscsi for</div><div class='ctx'> 	 * login/startup related tasks.</div><div class='ctx'> 	 */</div><div class='add'>+	beiscsi_conn-&gt;login_in_progress = 0;</div><div class='add'>+	spin_lock_bh(&amp;session-&gt;lock);</div><div class='add'>+	beiscsi_cleanup_task(task);</div><div class='add'>+	spin_unlock_bh(&amp;session-&gt;lock);</div><div class='add'>+</div><div class='ctx'> 	pwrb_handle = alloc_wrb_handle(phba, (beiscsi_conn-&gt;beiscsi_conn_cid -</div><div class='ctx'> 				       phba-&gt;fw_config.iscsi_cid_start));</div><div class='ctx'> 	pwrb = (struct iscsi_target_context_update_wrb *)pwrb_handle-&gt;pwrb;</div><div class='hunk'>@@ -3823,7 +3874,7 @@ static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)</div><div class='ctx'> 	task-&gt;hdr = (struct iscsi_hdr *)&amp;io_task-&gt;cmd_bhs-&gt;iscsi_hdr;</div><div class='ctx'> 	task-&gt;hdr_max = sizeof(struct be_cmd_bhs);</div><div class='ctx'> 	io_task-&gt;psgl_handle = NULL;</div><div class='del'>-	io_task-&gt;psgl_handle = NULL;</div><div class='add'>+	io_task-&gt;pwrb_handle = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (task-&gt;sc) {</div><div class='ctx'> 		spin_lock(&amp;phba-&gt;io_sgl_lock);</div><div class='hunk'>@@ -3865,6 +3916,7 @@ static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)</div><div class='ctx'> 				io_task-&gt;pwrb_handle =</div><div class='ctx'> 						beiscsi_conn-&gt;plogin_wrb_handle;</div><div class='ctx'> 			}</div><div class='add'>+			beiscsi_conn-&gt;task = task;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			spin_lock(&amp;phba-&gt;mgmt_sgl_lock);</div><div class='ctx'> 			io_task-&gt;psgl_handle = alloc_mgmt_sgl_handle(phba);</div><div class='hunk'>@@ -3907,53 +3959,11 @@ free_hndls:</div><div class='ctx'> 	io_task-&gt;pwrb_handle = NULL;</div><div class='ctx'> 	pci_pool_free(beiscsi_sess-&gt;bhs_pool, io_task-&gt;cmd_bhs,</div><div class='ctx'> 		      io_task-&gt;bhs_pa.u.a64.address);</div><div class='add'>+	io_task-&gt;cmd_bhs = NULL;</div><div class='ctx'> 	SE_DEBUG(DBG_LVL_1, "Alloc of SGL_ICD Failed\n");</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void beiscsi_cleanup_task(struct iscsi_task *task)</div><div class='del'>-{</div><div class='del'>-	struct beiscsi_io_task *io_task = task-&gt;dd_data;</div><div class='del'>-	struct iscsi_conn *conn = task-&gt;conn;</div><div class='del'>-	struct beiscsi_conn *beiscsi_conn = conn-&gt;dd_data;</div><div class='del'>-	struct beiscsi_hba *phba = beiscsi_conn-&gt;phba;</div><div class='del'>-	struct beiscsi_session *beiscsi_sess = beiscsi_conn-&gt;beiscsi_sess;</div><div class='del'>-	struct hwi_wrb_context *pwrb_context;</div><div class='del'>-	struct hwi_controller *phwi_ctrlr;</div><div class='del'>-</div><div class='del'>-	phwi_ctrlr = phba-&gt;phwi_ctrlr;</div><div class='del'>-	pwrb_context = &amp;phwi_ctrlr-&gt;wrb_context[beiscsi_conn-&gt;beiscsi_conn_cid</div><div class='del'>-			- phba-&gt;fw_config.iscsi_cid_start];</div><div class='del'>-	if (io_task-&gt;pwrb_handle) {</div><div class='del'>-		free_wrb_handle(phba, pwrb_context, io_task-&gt;pwrb_handle);</div><div class='del'>-		io_task-&gt;pwrb_handle = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (io_task-&gt;cmd_bhs) {</div><div class='del'>-		pci_pool_free(beiscsi_sess-&gt;bhs_pool, io_task-&gt;cmd_bhs,</div><div class='del'>-			      io_task-&gt;bhs_pa.u.a64.address);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (task-&gt;sc) {</div><div class='del'>-		if (io_task-&gt;psgl_handle) {</div><div class='del'>-			spin_lock(&amp;phba-&gt;io_sgl_lock);</div><div class='del'>-			free_io_sgl_handle(phba, io_task-&gt;psgl_handle);</div><div class='del'>-			spin_unlock(&amp;phba-&gt;io_sgl_lock);</div><div class='del'>-			io_task-&gt;psgl_handle = NULL;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		if (task-&gt;hdr &amp;&amp;</div><div class='del'>-		   ((task-&gt;hdr-&gt;opcode &amp; ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN))</div><div class='del'>-			return;</div><div class='del'>-		if (io_task-&gt;psgl_handle) {</div><div class='del'>-			spin_lock(&amp;phba-&gt;mgmt_sgl_lock);</div><div class='del'>-			free_mgmt_sgl_handle(phba, io_task-&gt;psgl_handle);</div><div class='del'>-			spin_unlock(&amp;phba-&gt;mgmt_sgl_lock);</div><div class='del'>-			io_task-&gt;psgl_handle = NULL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,</div><div class='ctx'> 			  unsigned int num_sg, unsigned int xferlen,</div><div class='ctx'> 			  unsigned int writedir)</div><div class='hunk'>@@ -3993,7 +4003,8 @@ static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,</div><div class='ctx'> 	       &amp;io_task-&gt;cmd_bhs-&gt;iscsi_hdr.lun, sizeof(struct scsi_lun));</div><div class='ctx'> </div><div class='ctx'> 	AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,</div><div class='del'>-		      cpu_to_be16(*(unsigned short *)&amp;io_task-&gt;cmd_bhs-&gt;iscsi_hdr.lun));</div><div class='add'>+		      cpu_to_be16(*(unsigned short *)</div><div class='add'>+				  &amp;io_task-&gt;cmd_bhs-&gt;iscsi_hdr.lun));</div><div class='ctx'> 	AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);</div><div class='ctx'> 	AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,</div><div class='ctx'> 		      io_task-&gt;pwrb_handle-&gt;wrb_index);</div><div class='hunk'>@@ -4126,6 +4137,76 @@ static int beiscsi_task_xmit(struct iscsi_task *task)</div><div class='ctx'> 	return beiscsi_iotask(task, sg, num_sg, xferlen, writedir);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * beiscsi_bsg_request - handle bsg request from ISCSI transport</div><div class='add'>+ * @job: job to handle</div><div class='add'>+ */</div><div class='add'>+static int beiscsi_bsg_request(struct bsg_job *job)</div><div class='add'>+{</div><div class='add'>+	struct Scsi_Host *shost;</div><div class='add'>+	struct beiscsi_hba *phba;</div><div class='add'>+	struct iscsi_bsg_request *bsg_req = job-&gt;request;</div><div class='add'>+	int rc = -EINVAL;</div><div class='add'>+	unsigned int tag;</div><div class='add'>+	struct be_dma_mem nonemb_cmd;</div><div class='add'>+	struct be_cmd_resp_hdr *resp;</div><div class='add'>+	struct iscsi_bsg_reply *bsg_reply = job-&gt;reply;</div><div class='add'>+	unsigned short status, extd_status;</div><div class='add'>+</div><div class='add'>+	shost = iscsi_job_to_shost(job);</div><div class='add'>+	phba = iscsi_host_priv(shost);</div><div class='add'>+</div><div class='add'>+	switch (bsg_req-&gt;msgcode) {</div><div class='add'>+	case ISCSI_BSG_HST_VENDOR:</div><div class='add'>+		nonemb_cmd.va = pci_alloc_consistent(phba-&gt;ctrl.pdev,</div><div class='add'>+					job-&gt;request_payload.payload_len,</div><div class='add'>+					&amp;nonemb_cmd.dma);</div><div class='add'>+		if (nonemb_cmd.va == NULL) {</div><div class='add'>+			SE_DEBUG(DBG_LVL_1, "Failed to allocate memory for "</div><div class='add'>+				 "beiscsi_bsg_request\n");</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+		tag = mgmt_vendor_specific_fw_cmd(&amp;phba-&gt;ctrl, phba, job,</div><div class='add'>+						  &amp;nonemb_cmd);</div><div class='add'>+		if (!tag) {</div><div class='add'>+			SE_DEBUG(DBG_LVL_1, "be_cmd_get_mac_addr Failed\n");</div><div class='add'>+			pci_free_consistent(phba-&gt;ctrl.pdev, nonemb_cmd.size,</div><div class='add'>+					    nonemb_cmd.va, nonemb_cmd.dma);</div><div class='add'>+			return -EAGAIN;</div><div class='add'>+		} else</div><div class='add'>+			wait_event_interruptible(phba-&gt;ctrl.mcc_wait[tag],</div><div class='add'>+						 phba-&gt;ctrl.mcc_numtag[tag]);</div><div class='add'>+		extd_status = (phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x0000FF00) &gt;&gt; 8;</div><div class='add'>+		status = phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x000000FF;</div><div class='add'>+		free_mcc_tag(&amp;phba-&gt;ctrl, tag);</div><div class='add'>+		resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;</div><div class='add'>+		sg_copy_from_buffer(job-&gt;reply_payload.sg_list,</div><div class='add'>+				    job-&gt;reply_payload.sg_cnt,</div><div class='add'>+				    nonemb_cmd.va, (resp-&gt;response_length</div><div class='add'>+				    + sizeof(*resp)));</div><div class='add'>+		bsg_reply-&gt;reply_payload_rcv_len = resp-&gt;response_length;</div><div class='add'>+		bsg_reply-&gt;result = status;</div><div class='add'>+		bsg_job_done(job, bsg_reply-&gt;result,</div><div class='add'>+			     bsg_reply-&gt;reply_payload_rcv_len);</div><div class='add'>+		pci_free_consistent(phba-&gt;ctrl.pdev, nonemb_cmd.size,</div><div class='add'>+				    nonemb_cmd.va, nonemb_cmd.dma);</div><div class='add'>+		if (status || extd_status) {</div><div class='add'>+			SE_DEBUG(DBG_LVL_1, "be_cmd_get_mac_addr Failed"</div><div class='add'>+				 " status = %d extd_status = %d\n",</div><div class='add'>+				 status, extd_status);</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		SE_DEBUG(DBG_LVL_1, "Unsupported bsg command: 0x%x\n",</div><div class='add'>+			 bsg_req-&gt;msgcode);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void beiscsi_quiesce(struct beiscsi_hba *phba)</div><div class='ctx'> {</div><div class='ctx'> 	struct hwi_controller *phwi_ctrlr;</div><div class='hunk'>@@ -4183,6 +4264,7 @@ static void beiscsi_remove(struct pci_dev *pcidev)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	beiscsi_destroy_def_ifaces(phba);</div><div class='ctx'> 	beiscsi_quiesce(phba);</div><div class='ctx'> 	iscsi_boot_destroy_kset(phba-&gt;boot_kset);</div><div class='ctx'> 	iscsi_host_remove(phba-&gt;shost);</div><div class='hunk'>@@ -4267,8 +4349,11 @@ static int __devinit beiscsi_dev_probe(struct pci_dev *pcidev,</div><div class='ctx'> 	phba-&gt;num_cpus = num_cpus;</div><div class='ctx'> 	SE_DEBUG(DBG_LVL_8, "num_cpus = %d\n", phba-&gt;num_cpus);</div><div class='ctx'> </div><div class='del'>-	if (enable_msix)</div><div class='add'>+	if (enable_msix) {</div><div class='ctx'> 		beiscsi_msix_enable(phba);</div><div class='add'>+		if (!phba-&gt;msix_enabled)</div><div class='add'>+			phba-&gt;num_cpus = 1;</div><div class='add'>+	}</div><div class='ctx'> 	ret = be_ctrl_init(phba, pcidev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		shost_printk(KERN_ERR, phba-&gt;shost, "beiscsi_dev_probe-"</div><div class='hunk'>@@ -4366,8 +4451,9 @@ static int __devinit beiscsi_dev_probe(struct pci_dev *pcidev,</div><div class='ctx'> 		 * iscsi boot.</div><div class='ctx'> 		 */</div><div class='ctx'> 		shost_printk(KERN_ERR, phba-&gt;shost, "Could not set up "</div><div class='del'>-			     "iSCSI boot info.");</div><div class='add'>+			     "iSCSI boot info.\n");</div><div class='ctx'> </div><div class='add'>+	beiscsi_create_def_ifaces(phba);</div><div class='ctx'> 	SE_DEBUG(DBG_LVL_8, "\n\n\n SUCCESS - DRIVER LOADED\n\n\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -4418,6 +4504,8 @@ struct iscsi_transport beiscsi_iscsi_transport = {</div><div class='ctx'> 	.bind_conn = beiscsi_conn_bind,</div><div class='ctx'> 	.destroy_conn = iscsi_conn_teardown,</div><div class='ctx'> 	.attr_is_visible = be2iscsi_attr_is_visible,</div><div class='add'>+	.set_iface_param = be2iscsi_iface_set_param,</div><div class='add'>+	.get_iface_param = be2iscsi_iface_get_param,</div><div class='ctx'> 	.set_param = beiscsi_set_param,</div><div class='ctx'> 	.get_conn_param = iscsi_conn_get_param,</div><div class='ctx'> 	.get_session_param = iscsi_session_get_param,</div><div class='hunk'>@@ -4435,6 +4523,7 @@ struct iscsi_transport beiscsi_iscsi_transport = {</div><div class='ctx'> 	.ep_poll = beiscsi_ep_poll,</div><div class='ctx'> 	.ep_disconnect = beiscsi_ep_disconnect,</div><div class='ctx'> 	.session_recovery_timedout = iscsi_session_recovery_timedout,</div><div class='add'>+	.bsg_request = beiscsi_bsg_request,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct pci_driver beiscsi_pci_driver = {</div><div class='head'>diff --git a/drivers/scsi/be2iscsi/be_main.h b/drivers/scsi/be2iscsi/be_main.h<br/>index b4a06d5e5f9e..40fea6ec879c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_main.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/be2iscsi/be_main.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_main.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_main.h</a></div><div class='hunk'>@@ -34,9 +34,9 @@</div><div class='ctx'> </div><div class='ctx'> #include "be.h"</div><div class='ctx'> #define DRV_NAME		"be2iscsi"</div><div class='del'>-#define BUILD_STR		"4.1.239.0"</div><div class='del'>-#define BE_NAME			"ServerEngines BladeEngine2" \</div><div class='del'>-				"Linux iSCSI Driver version" BUILD_STR</div><div class='add'>+#define BUILD_STR		"4.2.162.0"</div><div class='add'>+#define BE_NAME			"Emulex OneConnect" \</div><div class='add'>+				"Open-iSCSI Driver version" BUILD_STR</div><div class='ctx'> #define DRV_DESC		BE_NAME " " "Driver"</div><div class='ctx'> </div><div class='ctx'> #define BE_VENDOR_ID		0x19A2</div><div class='hunk'>@@ -316,6 +316,8 @@ struct beiscsi_hba {</div><div class='ctx'> 	struct iscsi_endpoint **ep_array;</div><div class='ctx'> 	struct iscsi_boot_kset *boot_kset;</div><div class='ctx'> 	struct Scsi_Host *shost;</div><div class='add'>+	struct iscsi_iface *ipv4_iface;</div><div class='add'>+	struct iscsi_iface *ipv6_iface;</div><div class='ctx'> 	struct {</div><div class='ctx'> 		/**</div><div class='ctx'> 		 * group together since they are used most frequently</div><div class='hunk'>@@ -345,7 +347,7 @@ struct beiscsi_hba {</div><div class='ctx'> 	struct work_struct work_cqs;	/* The work being queued */</div><div class='ctx'> 	struct be_ctrl_info ctrl;</div><div class='ctx'> 	unsigned int generation;</div><div class='del'>-	unsigned int read_mac_address;</div><div class='add'>+	unsigned int interface_handle;</div><div class='ctx'> 	struct mgmt_session_info boot_sess;</div><div class='ctx'> 	struct invalidate_command_table inv_tbl[128];</div><div class='ctx'> </div><div class='hunk'>@@ -525,8 +527,6 @@ struct hwi_async_pdu_context {</div><div class='ctx'> </div><div class='ctx'> 		unsigned int free_entries;</div><div class='ctx'> 		unsigned int busy_entries;</div><div class='del'>-		unsigned int buffer_size;</div><div class='del'>-		unsigned int num_entries;</div><div class='ctx'> </div><div class='ctx'> 		struct list_head free_list;</div><div class='ctx'> 	} async_header;</div><div class='hunk'>@@ -543,11 +543,12 @@ struct hwi_async_pdu_context {</div><div class='ctx'> </div><div class='ctx'> 		unsigned int free_entries;</div><div class='ctx'> 		unsigned int busy_entries;</div><div class='del'>-		unsigned int buffer_size;</div><div class='ctx'> 		struct list_head free_list;</div><div class='del'>-		unsigned int num_entries;</div><div class='ctx'> 	} async_data;</div><div class='ctx'> </div><div class='add'>+	unsigned int buffer_size;</div><div class='add'>+	unsigned int num_entries;</div><div class='add'>+</div><div class='ctx'> 	/**</div><div class='ctx'> 	 * This is a varying size list! Do not add anything</div><div class='ctx'> 	 * after this entry!!</div><div class='head'>diff --git a/drivers/scsi/be2iscsi/be_mgmt.c b/drivers/scsi/be2iscsi/be_mgmt.c<br/>index 44762cfa3e12..2a096795b9aa 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_mgmt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/be2iscsi/be_mgmt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_mgmt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_mgmt.c</a></div><div class='hunk'>@@ -17,15 +17,17 @@</div><div class='ctx'>  * Costa Mesa, CA 92626</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bsg-lib.h&gt;</div><div class='add'>+#include &lt;scsi/scsi_transport_iscsi.h&gt;</div><div class='add'>+#include &lt;scsi/scsi_bsg_iscsi.h&gt;</div><div class='ctx'> #include "be_mgmt.h"</div><div class='ctx'> #include "be_iscsi.h"</div><div class='del'>-#include &lt;scsi/scsi_transport_iscsi.h&gt;</div><div class='ctx'> </div><div class='del'>-unsigned int beiscsi_get_boot_target(struct beiscsi_hba *phba)</div><div class='add'>+unsigned int mgmt_get_boot_target(struct beiscsi_hba *phba)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_ctrl_info *ctrl = &amp;phba-&gt;ctrl;</div><div class='ctx'> 	struct be_mcc_wrb *wrb;</div><div class='del'>-	struct be_cmd_req_get_mac_addr *req;</div><div class='add'>+	struct be_cmd_get_boot_target_req *req;</div><div class='ctx'> 	unsigned int tag = 0;</div><div class='ctx'> </div><div class='ctx'> 	SE_DEBUG(DBG_LVL_8, "In bescsi_get_boot_target\n");</div><div class='hunk'>@@ -42,22 +44,22 @@ unsigned int beiscsi_get_boot_target(struct beiscsi_hba *phba)</div><div class='ctx'> 	be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);</div><div class='ctx'> 	be_cmd_hdr_prepare(&amp;req-&gt;hdr, CMD_SUBSYSTEM_ISCSI_INI,</div><div class='ctx'> 			   OPCODE_ISCSI_INI_BOOT_GET_BOOT_TARGET,</div><div class='del'>-			   sizeof(*req));</div><div class='add'>+			   sizeof(struct be_cmd_get_boot_target_resp));</div><div class='ctx'> </div><div class='ctx'> 	be_mcc_notify(phba);</div><div class='ctx'> 	spin_unlock(&amp;ctrl-&gt;mbox_lock);</div><div class='ctx'> 	return tag;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned int beiscsi_get_session_info(struct beiscsi_hba *phba,</div><div class='del'>-				  u32 boot_session_handle,</div><div class='del'>-				  struct be_dma_mem *nonemb_cmd)</div><div class='add'>+unsigned int mgmt_get_session_info(struct beiscsi_hba *phba,</div><div class='add'>+				   u32 boot_session_handle,</div><div class='add'>+				   struct be_dma_mem *nonemb_cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_ctrl_info *ctrl = &amp;phba-&gt;ctrl;</div><div class='ctx'> 	struct be_mcc_wrb *wrb;</div><div class='ctx'> 	unsigned int tag = 0;</div><div class='del'>-	struct  be_cmd_req_get_session *req;</div><div class='del'>-	struct be_cmd_resp_get_session *resp;</div><div class='add'>+	struct  be_cmd_get_session_req *req;</div><div class='add'>+	struct be_cmd_get_session_resp *resp;</div><div class='ctx'> 	struct be_sge *sge;</div><div class='ctx'> </div><div class='ctx'> 	SE_DEBUG(DBG_LVL_8, "In beiscsi_get_session_info\n");</div><div class='hunk'>@@ -187,6 +189,72 @@ int mgmt_check_supported_fw(struct be_ctrl_info *ctrl,</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+unsigned int mgmt_vendor_specific_fw_cmd(struct be_ctrl_info *ctrl,</div><div class='add'>+					 struct beiscsi_hba *phba,</div><div class='add'>+					 struct bsg_job *job,</div><div class='add'>+					 struct be_dma_mem *nonemb_cmd)</div><div class='add'>+{</div><div class='add'>+	struct be_cmd_resp_hdr *resp;</div><div class='add'>+	struct be_mcc_wrb *wrb = wrb_from_mccq(phba);</div><div class='add'>+	struct be_sge *mcc_sge = nonembedded_sgl(wrb);</div><div class='add'>+	unsigned int tag = 0;</div><div class='add'>+	struct iscsi_bsg_request *bsg_req = job-&gt;request;</div><div class='add'>+	struct be_bsg_vendor_cmd *req = nonemb_cmd-&gt;va;</div><div class='add'>+	unsigned short region, sector_size, sector, offset;</div><div class='add'>+</div><div class='add'>+	nonemb_cmd-&gt;size = job-&gt;request_payload.payload_len;</div><div class='add'>+	memset(nonemb_cmd-&gt;va, 0, nonemb_cmd-&gt;size);</div><div class='add'>+	resp = nonemb_cmd-&gt;va;</div><div class='add'>+	region =  bsg_req-&gt;rqst_data.h_vendor.vendor_cmd[1];</div><div class='add'>+	sector_size =  bsg_req-&gt;rqst_data.h_vendor.vendor_cmd[2];</div><div class='add'>+	sector =  bsg_req-&gt;rqst_data.h_vendor.vendor_cmd[3];</div><div class='add'>+	offset =  bsg_req-&gt;rqst_data.h_vendor.vendor_cmd[4];</div><div class='add'>+	req-&gt;region = region;</div><div class='add'>+	req-&gt;sector = sector;</div><div class='add'>+	req-&gt;offset = offset;</div><div class='add'>+	spin_lock(&amp;ctrl-&gt;mbox_lock);</div><div class='add'>+	memset(wrb, 0, sizeof(*wrb));</div><div class='add'>+</div><div class='add'>+	switch (bsg_req-&gt;rqst_data.h_vendor.vendor_cmd[0]) {</div><div class='add'>+	case BEISCSI_WRITE_FLASH:</div><div class='add'>+		offset = sector * sector_size + offset;</div><div class='add'>+		be_cmd_hdr_prepare(&amp;req-&gt;hdr, CMD_SUBSYSTEM_ISCSI,</div><div class='add'>+				   OPCODE_COMMON_WRITE_FLASH, sizeof(*req));</div><div class='add'>+		sg_copy_to_buffer(job-&gt;request_payload.sg_list,</div><div class='add'>+				  job-&gt;request_payload.sg_cnt,</div><div class='add'>+				  nonemb_cmd-&gt;va + offset, job-&gt;request_len);</div><div class='add'>+		break;</div><div class='add'>+	case BEISCSI_READ_FLASH:</div><div class='add'>+		be_cmd_hdr_prepare(&amp;req-&gt;hdr, CMD_SUBSYSTEM_ISCSI,</div><div class='add'>+			   OPCODE_COMMON_READ_FLASH, sizeof(*req));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		shost_printk(KERN_WARNING, phba-&gt;shost,</div><div class='add'>+			     "Unsupported cmd = 0x%x\n\n", bsg_req-&gt;rqst_data.</div><div class='add'>+			     h_vendor.vendor_cmd[0]);</div><div class='add'>+		spin_unlock(&amp;ctrl-&gt;mbox_lock);</div><div class='add'>+		return -ENOSYS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tag = alloc_mcc_tag(phba);</div><div class='add'>+	if (!tag) {</div><div class='add'>+		spin_unlock(&amp;ctrl-&gt;mbox_lock);</div><div class='add'>+		return tag;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	be_wrb_hdr_prepare(wrb, nonemb_cmd-&gt;size, false,</div><div class='add'>+			   job-&gt;request_payload.sg_cnt);</div><div class='add'>+	mcc_sge-&gt;pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd-&gt;dma));</div><div class='add'>+	mcc_sge-&gt;pa_lo = cpu_to_le32(nonemb_cmd-&gt;dma &amp; 0xFFFFFFFF);</div><div class='add'>+	mcc_sge-&gt;len = cpu_to_le32(nonemb_cmd-&gt;size);</div><div class='add'>+	wrb-&gt;tag0 |= tag;</div><div class='add'>+</div><div class='add'>+	be_mcc_notify(phba);</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;ctrl-&gt;mbox_lock);</div><div class='add'>+	return tag;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mgmt_epfw_cleanup(struct beiscsi_hba *phba, unsigned short chute)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_ctrl_info *ctrl = &amp;phba-&gt;ctrl;</div><div class='hunk'>@@ -328,7 +396,6 @@ int mgmt_open_connection(struct beiscsi_hba *phba,</div><div class='ctx'> 			 struct sockaddr *dst_addr,</div><div class='ctx'> 			 struct beiscsi_endpoint *beiscsi_ep,</div><div class='ctx'> 			 struct be_dma_mem *nonemb_cmd)</div><div class='del'>-</div><div class='ctx'> {</div><div class='ctx'> 	struct hwi_controller *phwi_ctrlr;</div><div class='ctx'> 	struct hwi_context_memory *phwi_context;</div><div class='hunk'>@@ -374,17 +441,17 @@ int mgmt_open_connection(struct beiscsi_hba *phba,</div><div class='ctx'> 	if (dst_addr-&gt;sa_family == PF_INET) {</div><div class='ctx'> 		__be32 s_addr = daddr_in-&gt;sin_addr.s_addr;</div><div class='ctx'> 		req-&gt;ip_address.ip_type = BE2_IPV4;</div><div class='del'>-		req-&gt;ip_address.ip_address[0] = s_addr &amp; 0x000000ff;</div><div class='del'>-		req-&gt;ip_address.ip_address[1] = (s_addr &amp; 0x0000ff00) &gt;&gt; 8;</div><div class='del'>-		req-&gt;ip_address.ip_address[2] = (s_addr &amp; 0x00ff0000) &gt;&gt; 16;</div><div class='del'>-		req-&gt;ip_address.ip_address[3] = (s_addr &amp; 0xff000000) &gt;&gt; 24;</div><div class='add'>+		req-&gt;ip_address.addr[0] = s_addr &amp; 0x000000ff;</div><div class='add'>+		req-&gt;ip_address.addr[1] = (s_addr &amp; 0x0000ff00) &gt;&gt; 8;</div><div class='add'>+		req-&gt;ip_address.addr[2] = (s_addr &amp; 0x00ff0000) &gt;&gt; 16;</div><div class='add'>+		req-&gt;ip_address.addr[3] = (s_addr &amp; 0xff000000) &gt;&gt; 24;</div><div class='ctx'> 		req-&gt;tcp_port = ntohs(daddr_in-&gt;sin_port);</div><div class='ctx'> 		beiscsi_ep-&gt;dst_addr = daddr_in-&gt;sin_addr.s_addr;</div><div class='ctx'> 		beiscsi_ep-&gt;dst_tcpport = ntohs(daddr_in-&gt;sin_port);</div><div class='ctx'> 		beiscsi_ep-&gt;ip_type = BE2_IPV4;</div><div class='ctx'> 	} else if (dst_addr-&gt;sa_family == PF_INET6) {</div><div class='ctx'> 		req-&gt;ip_address.ip_type = BE2_IPV6;</div><div class='del'>-		memcpy(&amp;req-&gt;ip_address.ip_address,</div><div class='add'>+		memcpy(&amp;req-&gt;ip_address.addr,</div><div class='ctx'> 		       &amp;daddr_in6-&gt;sin6_addr.in6_u.u6_addr8, 16);</div><div class='ctx'> 		req-&gt;tcp_port = ntohs(daddr_in6-&gt;sin6_port);</div><div class='ctx'> 		beiscsi_ep-&gt;dst_tcpport = ntohs(daddr_in6-&gt;sin6_port);</div><div class='hunk'>@@ -419,14 +486,398 @@ int mgmt_open_connection(struct beiscsi_hba *phba,</div><div class='ctx'> 	return tag;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned int be_cmd_get_mac_addr(struct beiscsi_hba *phba)</div><div class='add'>+unsigned int mgmt_get_all_if_id(struct beiscsi_hba *phba)</div><div class='ctx'> {</div><div class='ctx'> 	struct be_ctrl_info *ctrl = &amp;phba-&gt;ctrl;</div><div class='del'>-	struct be_mcc_wrb *wrb;</div><div class='del'>-	struct be_cmd_req_get_mac_addr *req;</div><div class='add'>+	struct be_mcc_wrb *wrb = wrb_from_mbox(&amp;ctrl-&gt;mbox_mem);</div><div class='add'>+	struct be_cmd_get_all_if_id_req *req = embedded_payload(wrb);</div><div class='add'>+	struct be_cmd_get_all_if_id_req *pbe_allid = req;</div><div class='add'>+	int status = 0;</div><div class='add'>+</div><div class='add'>+	memset(wrb, 0, sizeof(*wrb));</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;ctrl-&gt;mbox_lock);</div><div class='add'>+</div><div class='add'>+	be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);</div><div class='add'>+	be_cmd_hdr_prepare(&amp;req-&gt;hdr, CMD_SUBSYSTEM_ISCSI,</div><div class='add'>+			   OPCODE_COMMON_ISCSI_NTWK_GET_ALL_IF_ID,</div><div class='add'>+			   sizeof(*req));</div><div class='add'>+	status = be_mbox_notify(ctrl);</div><div class='add'>+	if (!status)</div><div class='add'>+		phba-&gt;interface_handle = pbe_allid-&gt;if_hndl_list[0];</div><div class='add'>+	else {</div><div class='add'>+		shost_printk(KERN_WARNING, phba-&gt;shost,</div><div class='add'>+			     "Failed in mgmt_get_all_if_id\n");</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;ctrl-&gt;mbox_lock);</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mgmt_exec_nonemb_cmd(struct beiscsi_hba *phba,</div><div class='add'>+				struct be_dma_mem *nonemb_cmd, void *resp_buf,</div><div class='add'>+				int resp_buf_len)</div><div class='add'>+{</div><div class='add'>+	struct be_ctrl_info *ctrl = &amp;phba-&gt;ctrl;</div><div class='add'>+	struct be_mcc_wrb *wrb = wrb_from_mccq(phba);</div><div class='add'>+	unsigned short status, extd_status;</div><div class='add'>+	struct be_sge *sge;</div><div class='add'>+	unsigned int tag;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;ctrl-&gt;mbox_lock);</div><div class='add'>+	tag = alloc_mcc_tag(phba);</div><div class='add'>+	if (!tag) {</div><div class='add'>+		spin_unlock(&amp;ctrl-&gt;mbox_lock);</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto free_cmd;</div><div class='add'>+	}</div><div class='add'>+	memset(wrb, 0, sizeof(*wrb));</div><div class='add'>+	wrb-&gt;tag0 |= tag;</div><div class='add'>+	sge = nonembedded_sgl(wrb);</div><div class='add'>+</div><div class='add'>+	be_wrb_hdr_prepare(wrb, nonemb_cmd-&gt;size, false, 1);</div><div class='add'>+	sge-&gt;pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd-&gt;dma));</div><div class='add'>+	sge-&gt;pa_lo = cpu_to_le32(nonemb_cmd-&gt;dma &amp; 0xFFFFFFFF);</div><div class='add'>+	sge-&gt;len = cpu_to_le32(nonemb_cmd-&gt;size);</div><div class='add'>+</div><div class='add'>+	be_mcc_notify(phba);</div><div class='add'>+	spin_unlock(&amp;ctrl-&gt;mbox_lock);</div><div class='add'>+</div><div class='add'>+	wait_event_interruptible(phba-&gt;ctrl.mcc_wait[tag],</div><div class='add'>+				 phba-&gt;ctrl.mcc_numtag[tag]);</div><div class='add'>+</div><div class='add'>+	extd_status = (phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x0000FF00) &gt;&gt; 8;</div><div class='add'>+	status = phba-&gt;ctrl.mcc_numtag[tag] &amp; 0x000000FF;</div><div class='add'>+	if (status || extd_status) {</div><div class='add'>+		SE_DEBUG(DBG_LVL_1,</div><div class='add'>+			 "mgmt_exec_nonemb_cmd Failed status = %d"</div><div class='add'>+			 "extd_status = %d\n", status, extd_status);</div><div class='add'>+		rc = -EIO;</div><div class='add'>+		goto free_tag;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (resp_buf)</div><div class='add'>+		memcpy(resp_buf, nonemb_cmd-&gt;va, resp_buf_len);</div><div class='add'>+</div><div class='add'>+free_tag:</div><div class='add'>+	free_mcc_tag(&amp;phba-&gt;ctrl, tag);</div><div class='add'>+free_cmd:</div><div class='add'>+	pci_free_consistent(ctrl-&gt;pdev, nonemb_cmd-&gt;size,</div><div class='add'>+			    nonemb_cmd-&gt;va, nonemb_cmd-&gt;dma);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mgmt_alloc_cmd_data(struct beiscsi_hba *phba, struct be_dma_mem *cmd,</div><div class='add'>+			       int iscsi_cmd, int size)</div><div class='add'>+{</div><div class='add'>+	cmd-&gt;va = pci_alloc_consistent(phba-&gt;ctrl.pdev, size, &amp;cmd-&gt;dma);</div><div class='add'>+	if (!cmd-&gt;va) {</div><div class='add'>+		SE_DEBUG(DBG_LVL_1, "Failed to allocate memory for if info\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	memset(cmd-&gt;va, 0, size);</div><div class='add'>+	cmd-&gt;size = size;</div><div class='add'>+	be_cmd_hdr_prepare(cmd-&gt;va, CMD_SUBSYSTEM_ISCSI, iscsi_cmd, size);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mgmt_static_ip_modify(struct beiscsi_hba *phba,</div><div class='add'>+		      struct be_cmd_get_if_info_resp *if_info,</div><div class='add'>+		      struct iscsi_iface_param_info *ip_param,</div><div class='add'>+		      struct iscsi_iface_param_info *subnet_param,</div><div class='add'>+		      uint32_t ip_action)</div><div class='add'>+{</div><div class='add'>+	struct be_cmd_set_ip_addr_req *req;</div><div class='add'>+	struct be_dma_mem nonemb_cmd;</div><div class='add'>+	uint32_t ip_type;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = mgmt_alloc_cmd_data(phba, &amp;nonemb_cmd,</div><div class='add'>+				 OPCODE_COMMON_ISCSI_NTWK_MODIFY_IP_ADDR,</div><div class='add'>+				 sizeof(*req));</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	ip_type = (ip_param-&gt;param == ISCSI_NET_PARAM_IPV6_ADDR) ?</div><div class='add'>+		BE2_IPV6 : BE2_IPV4 ;</div><div class='add'>+</div><div class='add'>+	req = nonemb_cmd.va;</div><div class='add'>+	req-&gt;ip_params.record_entry_count = 1;</div><div class='add'>+	req-&gt;ip_params.ip_record.action = ip_action;</div><div class='add'>+	req-&gt;ip_params.ip_record.interface_hndl =</div><div class='add'>+		phba-&gt;interface_handle;</div><div class='add'>+	req-&gt;ip_params.ip_record.ip_addr.size_of_structure =</div><div class='add'>+		sizeof(struct be_ip_addr_subnet_format);</div><div class='add'>+	req-&gt;ip_params.ip_record.ip_addr.ip_type = ip_type;</div><div class='add'>+</div><div class='add'>+	if (ip_action == IP_ACTION_ADD) {</div><div class='add'>+		memcpy(req-&gt;ip_params.ip_record.ip_addr.addr, ip_param-&gt;value,</div><div class='add'>+		       ip_param-&gt;len);</div><div class='add'>+</div><div class='add'>+		if (subnet_param)</div><div class='add'>+			memcpy(req-&gt;ip_params.ip_record.ip_addr.subnet_mask,</div><div class='add'>+			       subnet_param-&gt;value, subnet_param-&gt;len);</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(req-&gt;ip_params.ip_record.ip_addr.addr,</div><div class='add'>+		       if_info-&gt;ip_addr.addr, ip_param-&gt;len);</div><div class='add'>+</div><div class='add'>+		memcpy(req-&gt;ip_params.ip_record.ip_addr.subnet_mask,</div><div class='add'>+		       if_info-&gt;ip_addr.subnet_mask, ip_param-&gt;len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = mgmt_exec_nonemb_cmd(phba, &amp;nonemb_cmd, NULL, 0);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		shost_printk(KERN_WARNING, phba-&gt;shost,</div><div class='add'>+			     "Failed to Modify existing IP Address\n");</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mgmt_modify_gateway(struct beiscsi_hba *phba, uint8_t *gt_addr,</div><div class='add'>+			       uint32_t gtway_action, uint32_t param_len)</div><div class='add'>+{</div><div class='add'>+	struct be_cmd_set_def_gateway_req *req;</div><div class='add'>+	struct be_dma_mem nonemb_cmd;</div><div class='add'>+	int rt_val;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	rt_val = mgmt_alloc_cmd_data(phba, &amp;nonemb_cmd,</div><div class='add'>+				OPCODE_COMMON_ISCSI_NTWK_MODIFY_DEFAULT_GATEWAY,</div><div class='add'>+				sizeof(*req));</div><div class='add'>+	if (rt_val)</div><div class='add'>+		return rt_val;</div><div class='add'>+</div><div class='add'>+	req = nonemb_cmd.va;</div><div class='add'>+	req-&gt;action = gtway_action;</div><div class='add'>+	req-&gt;ip_addr.ip_type = BE2_IPV4;</div><div class='add'>+</div><div class='add'>+	memcpy(req-&gt;ip_addr.addr, gt_addr, param_len);</div><div class='add'>+</div><div class='add'>+	return mgmt_exec_nonemb_cmd(phba, &amp;nonemb_cmd, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgmt_set_ip(struct beiscsi_hba *phba,</div><div class='add'>+		struct iscsi_iface_param_info *ip_param,</div><div class='add'>+		struct iscsi_iface_param_info *subnet_param,</div><div class='add'>+		uint32_t boot_proto)</div><div class='add'>+{</div><div class='add'>+	struct be_cmd_get_def_gateway_resp gtway_addr_set;</div><div class='add'>+	struct be_cmd_get_if_info_resp if_info;</div><div class='add'>+	struct be_cmd_set_dhcp_req *dhcpreq;</div><div class='add'>+	struct be_cmd_rel_dhcp_req *reldhcp;</div><div class='add'>+	struct be_dma_mem nonemb_cmd;</div><div class='add'>+	uint8_t *gtway_addr;</div><div class='add'>+	uint32_t ip_type;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (mgmt_get_all_if_id(phba))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	memset(&amp;if_info, 0, sizeof(if_info));</div><div class='add'>+	ip_type = (ip_param-&gt;param == ISCSI_NET_PARAM_IPV6_ADDR) ?</div><div class='add'>+		BE2_IPV6 : BE2_IPV4 ;</div><div class='add'>+</div><div class='add'>+	rc = mgmt_get_if_info(phba, ip_type, &amp;if_info);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (boot_proto == ISCSI_BOOTPROTO_DHCP) {</div><div class='add'>+		if (if_info.dhcp_state) {</div><div class='add'>+			shost_printk(KERN_WARNING, phba-&gt;shost,</div><div class='add'>+				     "DHCP Already Enabled\n");</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		/* The ip_param-&gt;len is 1 in DHCP case. Setting</div><div class='add'>+		   proper IP len as this it is used while</div><div class='add'>+		   freeing the Static IP.</div><div class='add'>+		 */</div><div class='add'>+		ip_param-&gt;len = (ip_param-&gt;param == ISCSI_NET_PARAM_IPV6_ADDR) ?</div><div class='add'>+				IP_V6_LEN : IP_V4_LEN;</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		if (if_info.dhcp_state) {</div><div class='add'>+</div><div class='add'>+			memset(&amp;if_info, 0, sizeof(if_info));</div><div class='add'>+			rc = mgmt_alloc_cmd_data(phba, &amp;nonemb_cmd,</div><div class='add'>+				OPCODE_COMMON_ISCSI_NTWK_REL_STATELESS_IP_ADDR,</div><div class='add'>+				sizeof(*reldhcp));</div><div class='add'>+</div><div class='add'>+			if (rc)</div><div class='add'>+				return rc;</div><div class='add'>+</div><div class='add'>+			reldhcp = nonemb_cmd.va;</div><div class='add'>+			reldhcp-&gt;interface_hndl = phba-&gt;interface_handle;</div><div class='add'>+			reldhcp-&gt;ip_type = ip_type;</div><div class='add'>+</div><div class='add'>+			rc = mgmt_exec_nonemb_cmd(phba, &amp;nonemb_cmd, NULL, 0);</div><div class='add'>+			if (rc &lt; 0) {</div><div class='add'>+				shost_printk(KERN_WARNING, phba-&gt;shost,</div><div class='add'>+					     "Failed to Delete existing dhcp\n");</div><div class='add'>+				return rc;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Delete the Static IP Set */</div><div class='add'>+	if (if_info.ip_addr.addr[0]) {</div><div class='add'>+		rc = mgmt_static_ip_modify(phba, &amp;if_info, ip_param, NULL,</div><div class='add'>+					   IP_ACTION_DEL);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Delete the Gateway settings if mode change is to DHCP */</div><div class='add'>+	if (boot_proto == ISCSI_BOOTPROTO_DHCP) {</div><div class='add'>+		memset(&amp;gtway_addr_set, 0, sizeof(gtway_addr_set));</div><div class='add'>+		rc = mgmt_get_gateway(phba, BE2_IPV4, &amp;gtway_addr_set);</div><div class='add'>+		if (rc) {</div><div class='add'>+			shost_printk(KERN_WARNING, phba-&gt;shost,</div><div class='add'>+				     "Failed to Get Gateway Addr\n");</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (gtway_addr_set.ip_addr.addr[0]) {</div><div class='add'>+			gtway_addr = (uint8_t *)&amp;gtway_addr_set.ip_addr.addr;</div><div class='add'>+			rc = mgmt_modify_gateway(phba, gtway_addr,</div><div class='add'>+						 IP_ACTION_DEL, IP_V4_LEN);</div><div class='add'>+</div><div class='add'>+			if (rc) {</div><div class='add'>+				shost_printk(KERN_WARNING, phba-&gt;shost,</div><div class='add'>+					     "Failed to clear Gateway Addr Set\n");</div><div class='add'>+				return rc;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set Adapter to DHCP/Static Mode */</div><div class='add'>+	if (boot_proto == ISCSI_BOOTPROTO_DHCP) {</div><div class='add'>+		rc = mgmt_alloc_cmd_data(phba, &amp;nonemb_cmd,</div><div class='add'>+			OPCODE_COMMON_ISCSI_NTWK_CONFIG_STATELESS_IP_ADDR,</div><div class='add'>+			sizeof(*dhcpreq));</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		dhcpreq = nonemb_cmd.va;</div><div class='add'>+		dhcpreq-&gt;flags = BLOCKING;</div><div class='add'>+		dhcpreq-&gt;retry_count = 1;</div><div class='add'>+		dhcpreq-&gt;interface_hndl = phba-&gt;interface_handle;</div><div class='add'>+		dhcpreq-&gt;ip_type = BE2_DHCP_V4;</div><div class='add'>+</div><div class='add'>+		return mgmt_exec_nonemb_cmd(phba, &amp;nonemb_cmd, NULL, 0);</div><div class='add'>+	} else {</div><div class='add'>+		return mgmt_static_ip_modify(phba, &amp;if_info, ip_param,</div><div class='add'>+					     subnet_param, IP_ACTION_ADD);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgmt_set_gateway(struct beiscsi_hba *phba,</div><div class='add'>+		     struct iscsi_iface_param_info *gateway_param)</div><div class='add'>+{</div><div class='add'>+	struct be_cmd_get_def_gateway_resp gtway_addr_set;</div><div class='add'>+	uint8_t *gtway_addr;</div><div class='add'>+	int rt_val;</div><div class='add'>+</div><div class='add'>+	memset(&amp;gtway_addr_set, 0, sizeof(gtway_addr_set));</div><div class='add'>+	rt_val = mgmt_get_gateway(phba, BE2_IPV4, &amp;gtway_addr_set);</div><div class='add'>+	if (rt_val) {</div><div class='add'>+		shost_printk(KERN_WARNING, phba-&gt;shost,</div><div class='add'>+			     "Failed to Get Gateway Addr\n");</div><div class='add'>+		return rt_val;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (gtway_addr_set.ip_addr.addr[0]) {</div><div class='add'>+		gtway_addr = (uint8_t *)&amp;gtway_addr_set.ip_addr.addr;</div><div class='add'>+		rt_val = mgmt_modify_gateway(phba, gtway_addr, IP_ACTION_DEL,</div><div class='add'>+					     gateway_param-&gt;len);</div><div class='add'>+		if (rt_val) {</div><div class='add'>+			shost_printk(KERN_WARNING, phba-&gt;shost,</div><div class='add'>+				     "Failed to clear Gateway Addr Set\n");</div><div class='add'>+			return rt_val;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gtway_addr = (uint8_t *)&amp;gateway_param-&gt;value;</div><div class='add'>+	rt_val = mgmt_modify_gateway(phba, gtway_addr, IP_ACTION_ADD,</div><div class='add'>+				     gateway_param-&gt;len);</div><div class='add'>+</div><div class='add'>+	if (rt_val)</div><div class='add'>+		shost_printk(KERN_WARNING, phba-&gt;shost,</div><div class='add'>+			     "Failed to Set Gateway Addr\n");</div><div class='add'>+</div><div class='add'>+	return rt_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgmt_get_gateway(struct beiscsi_hba *phba, int ip_type,</div><div class='add'>+		     struct be_cmd_get_def_gateway_resp *gateway)</div><div class='add'>+{</div><div class='add'>+	struct be_cmd_get_def_gateway_req *req;</div><div class='add'>+	struct be_dma_mem nonemb_cmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = mgmt_alloc_cmd_data(phba, &amp;nonemb_cmd,</div><div class='add'>+				 OPCODE_COMMON_ISCSI_NTWK_GET_DEFAULT_GATEWAY,</div><div class='add'>+				 sizeof(*gateway));</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req = nonemb_cmd.va;</div><div class='add'>+	req-&gt;ip_type = ip_type;</div><div class='add'>+</div><div class='add'>+	return mgmt_exec_nonemb_cmd(phba, &amp;nonemb_cmd, gateway,</div><div class='add'>+				    sizeof(*gateway));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgmt_get_if_info(struct beiscsi_hba *phba, int ip_type,</div><div class='add'>+		     struct be_cmd_get_if_info_resp *if_info)</div><div class='add'>+{</div><div class='add'>+	struct be_cmd_get_if_info_req *req;</div><div class='add'>+	struct be_dma_mem nonemb_cmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (mgmt_get_all_if_id(phba))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	rc = mgmt_alloc_cmd_data(phba, &amp;nonemb_cmd,</div><div class='add'>+				 OPCODE_COMMON_ISCSI_NTWK_GET_IF_INFO,</div><div class='add'>+				 sizeof(*if_info));</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req = nonemb_cmd.va;</div><div class='add'>+	req-&gt;interface_hndl = phba-&gt;interface_handle;</div><div class='add'>+	req-&gt;ip_type = ip_type;</div><div class='add'>+</div><div class='add'>+	return mgmt_exec_nonemb_cmd(phba, &amp;nonemb_cmd, if_info,</div><div class='add'>+				    sizeof(*if_info));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mgmt_get_nic_conf(struct beiscsi_hba *phba,</div><div class='add'>+		      struct be_cmd_get_nic_conf_resp *nic)</div><div class='add'>+{</div><div class='add'>+	struct be_dma_mem nonemb_cmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = mgmt_alloc_cmd_data(phba, &amp;nonemb_cmd,</div><div class='add'>+				 OPCODE_COMMON_ISCSI_NTWK_GET_NIC_CONFIG,</div><div class='add'>+				 sizeof(*nic));</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return mgmt_exec_nonemb_cmd(phba, &amp;nonemb_cmd, nic, sizeof(*nic));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+unsigned int be_cmd_get_initname(struct beiscsi_hba *phba)</div><div class='add'>+{</div><div class='ctx'> 	unsigned int tag = 0;</div><div class='add'>+	struct be_mcc_wrb *wrb;</div><div class='add'>+	struct be_cmd_hba_name *req;</div><div class='add'>+	struct be_ctrl_info *ctrl = &amp;phba-&gt;ctrl;</div><div class='ctx'> </div><div class='del'>-	SE_DEBUG(DBG_LVL_8, "In be_cmd_get_mac_addr\n");</div><div class='ctx'> 	spin_lock(&amp;ctrl-&gt;mbox_lock);</div><div class='ctx'> 	tag = alloc_mcc_tag(phba);</div><div class='ctx'> 	if (!tag) {</div><div class='hunk'>@@ -438,12 +889,38 @@ unsigned int be_cmd_get_mac_addr(struct beiscsi_hba *phba)</div><div class='ctx'> 	req = embedded_payload(wrb);</div><div class='ctx'> 	wrb-&gt;tag0 |= tag;</div><div class='ctx'> 	be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);</div><div class='del'>-	be_cmd_hdr_prepare(&amp;req-&gt;hdr, CMD_SUBSYSTEM_ISCSI,</div><div class='del'>-			   OPCODE_COMMON_ISCSI_NTWK_GET_NIC_CONFIG,</div><div class='del'>-			   sizeof(*req));</div><div class='add'>+	be_cmd_hdr_prepare(&amp;req-&gt;hdr, CMD_SUBSYSTEM_ISCSI_INI,</div><div class='add'>+			OPCODE_ISCSI_INI_CFG_GET_HBA_NAME,</div><div class='add'>+			sizeof(*req));</div><div class='ctx'> </div><div class='ctx'> 	be_mcc_notify(phba);</div><div class='ctx'> 	spin_unlock(&amp;ctrl-&gt;mbox_lock);</div><div class='ctx'> 	return tag;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+unsigned int be_cmd_get_port_speed(struct beiscsi_hba *phba)</div><div class='add'>+{</div><div class='add'>+	unsigned int tag = 0;</div><div class='add'>+	struct be_mcc_wrb *wrb;</div><div class='add'>+	struct be_cmd_ntwk_link_status_req *req;</div><div class='add'>+	struct be_ctrl_info *ctrl = &amp;phba-&gt;ctrl;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;ctrl-&gt;mbox_lock);</div><div class='add'>+	tag = alloc_mcc_tag(phba);</div><div class='add'>+	if (!tag) {</div><div class='add'>+		spin_unlock(&amp;ctrl-&gt;mbox_lock);</div><div class='add'>+		return tag;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wrb = wrb_from_mccq(phba);</div><div class='add'>+	req = embedded_payload(wrb);</div><div class='add'>+	wrb-&gt;tag0 |= tag;</div><div class='add'>+	be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);</div><div class='add'>+	be_cmd_hdr_prepare(&amp;req-&gt;hdr, CMD_SUBSYSTEM_COMMON,</div><div class='add'>+			OPCODE_COMMON_NTWK_LINK_STATUS_QUERY,</div><div class='add'>+			sizeof(*req));</div><div class='add'>+</div><div class='add'>+	be_mcc_notify(phba);</div><div class='add'>+	spin_unlock(&amp;ctrl-&gt;mbox_lock);</div><div class='add'>+	return tag;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/scsi/be2iscsi/be_mgmt.h b/drivers/scsi/be2iscsi/be_mgmt.h<br/>index 08428824ace2..5c2e37693ca8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_mgmt.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/be2iscsi/be_mgmt.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/be2iscsi/be_mgmt.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/be2iscsi/be_mgmt.h</a></div><div class='hunk'>@@ -20,11 +20,16 @@</div><div class='ctx'> #ifndef _BEISCSI_MGMT_</div><div class='ctx'> #define _BEISCSI_MGMT_</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;scsi/scsi_bsg_iscsi.h&gt;</div><div class='ctx'> #include "be_iscsi.h"</div><div class='ctx'> #include "be_main.h"</div><div class='ctx'> </div><div class='add'>+#define IP_ACTION_ADD	0x01</div><div class='add'>+#define IP_ACTION_DEL	0x02</div><div class='add'>+</div><div class='add'>+#define IP_V6_LEN	16</div><div class='add'>+#define IP_V4_LEN	4</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * Pseudo amap definition in which each bit of the actual structure is defined</div><div class='ctx'>  * as a byte: used to calculate offset/shift/mask of each field</div><div class='hunk'>@@ -98,6 +103,10 @@ unsigned int mgmt_invalidate_icds(struct beiscsi_hba *phba,</div><div class='ctx'> 				struct invalidate_command_table *inv_tbl,</div><div class='ctx'> 				unsigned int num_invalidate, unsigned int cid,</div><div class='ctx'> 				struct be_dma_mem *nonemb_cmd);</div><div class='add'>+unsigned int mgmt_vendor_specific_fw_cmd(struct be_ctrl_info *ctrl,</div><div class='add'>+					 struct beiscsi_hba *phba,</div><div class='add'>+					 struct bsg_job *job,</div><div class='add'>+					 struct be_dma_mem *nonemb_cmd);</div><div class='ctx'> </div><div class='ctx'> struct iscsi_invalidate_connection_params_in {</div><div class='ctx'> 	struct be_cmd_req_hdr hdr;</div><div class='hunk'>@@ -204,6 +213,13 @@ struct be_mgmt_controller_attributes_resp {</div><div class='ctx'> 	struct mgmt_controller_attributes params;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+struct be_bsg_vendor_cmd {</div><div class='add'>+	struct be_cmd_req_hdr hdr;</div><div class='add'>+	unsigned short region;</div><div class='add'>+	unsigned short offset;</div><div class='add'>+	unsigned short sector;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> /* configuration management */</div><div class='ctx'> </div><div class='ctx'> #define GET_MGMT_CONTROLLER_WS(phba)    (phba-&gt;pmgmt_ws)</div><div class='hunk'>@@ -219,12 +235,15 @@ struct be_mgmt_controller_attributes_resp {</div><div class='ctx'> 				/* the CMD_RESPONSE_HEADER  */</div><div class='ctx'> </div><div class='ctx'> #define ISCSI_GET_PDU_TEMPLATE_ADDRESS(pc, pa) {\</div><div class='del'>-    pa-&gt;lo = phba-&gt;init_mem[ISCSI_MEM_GLOBAL_HEADER].mem_array[0].\</div><div class='add'>+	pa-&gt;lo = phba-&gt;init_mem[ISCSI_MEM_GLOBAL_HEADER].mem_array[0].\</div><div class='ctx'> 					bus_address.u.a32.address_lo;  \</div><div class='del'>-    pa-&gt;hi = phba-&gt;init_mem[ISCSI_MEM_GLOBAL_HEADER].mem_array[0].\</div><div class='add'>+	pa-&gt;hi = phba-&gt;init_mem[ISCSI_MEM_GLOBAL_HEADER].mem_array[0].\</div><div class='ctx'> 					bus_address.u.a32.address_hi;  \</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define BEISCSI_WRITE_FLASH 0</div><div class='add'>+#define BEISCSI_READ_FLASH 1</div><div class='add'>+</div><div class='ctx'> struct beiscsi_endpoint {</div><div class='ctx'> 	struct beiscsi_hba *phba;</div><div class='ctx'> 	struct beiscsi_sess *sess;</div><div class='hunk'>@@ -248,4 +267,27 @@ unsigned int mgmt_invalidate_connection(struct beiscsi_hba *phba,</div><div class='ctx'> 					 unsigned short issue_reset,</div><div class='ctx'> 					 unsigned short savecfg_flag);</div><div class='ctx'> </div><div class='add'>+int mgmt_set_ip(struct beiscsi_hba *phba,</div><div class='add'>+		struct iscsi_iface_param_info *ip_param,</div><div class='add'>+		struct iscsi_iface_param_info *subnet_param,</div><div class='add'>+		uint32_t boot_proto);</div><div class='add'>+</div><div class='add'>+unsigned int mgmt_get_boot_target(struct beiscsi_hba *phba);</div><div class='add'>+</div><div class='add'>+unsigned int mgmt_get_session_info(struct beiscsi_hba *phba,</div><div class='add'>+				   u32 boot_session_handle,</div><div class='add'>+				   struct be_dma_mem *nonemb_cmd);</div><div class='add'>+</div><div class='add'>+int mgmt_get_nic_conf(struct beiscsi_hba *phba,</div><div class='add'>+		      struct be_cmd_get_nic_conf_resp *mac);</div><div class='add'>+</div><div class='add'>+int mgmt_get_if_info(struct beiscsi_hba *phba, int ip_type,</div><div class='add'>+		     struct be_cmd_get_if_info_resp *if_info);</div><div class='add'>+</div><div class='add'>+int mgmt_get_gateway(struct beiscsi_hba *phba, int ip_type,</div><div class='add'>+		     struct be_cmd_get_def_gateway_resp *gateway);</div><div class='add'>+</div><div class='add'>+int mgmt_set_gateway(struct beiscsi_hba *phba,</div><div class='add'>+		     struct iscsi_iface_param_info *gateway_param);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/scsi/bfa/bfa_fcs.h b/drivers/scsi/bfa/bfa_fcs.h<br/>index e75e07d25915..51c9e1345719 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bfa/bfa_fcs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bfa/bfa_fcs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bfa/bfa_fcs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bfa/bfa_fcs.h</a></div><div class='hunk'>@@ -799,9 +799,6 @@ struct bfad_port_s *bfa_fcb_lport_new(struct bfad_s *bfad,</div><div class='ctx'> 				      enum bfa_lport_role roles,</div><div class='ctx'> 				      struct bfad_vf_s *vf_drv,</div><div class='ctx'> 				      struct bfad_vport_s *vp_drv);</div><div class='del'>-void bfa_fcb_lport_delete(struct bfad_s *bfad, enum bfa_lport_role roles,</div><div class='del'>-			  struct bfad_vf_s *vf_drv,</div><div class='del'>-			  struct bfad_vport_s *vp_drv);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * vport callbacks</div><div class='head'>diff --git a/drivers/scsi/bfa/bfa_fcs_lport.c b/drivers/scsi/bfa/bfa_fcs_lport.c<br/>index 5d2a1307e5ce..937000db62a8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bfa/bfa_fcs_lport.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bfa/bfa_fcs_lport.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bfa/bfa_fcs_lport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bfa/bfa_fcs_lport.c</a></div><div class='hunk'>@@ -616,7 +616,7 @@ bfa_fcs_lport_online_actions(struct bfa_fcs_lport_s *port)</div><div class='ctx'> 	__port_action[port-&gt;fabric-&gt;fab_type].online(port);</div><div class='ctx'> </div><div class='ctx'> 	wwn2str(lpwwn_buf, bfa_fcs_lport_get_pwwn(port));</div><div class='del'>-	BFA_LOG(KERN_INFO, bfad, bfa_log_level,</div><div class='add'>+	BFA_LOG(KERN_WARNING, bfad, bfa_log_level,</div><div class='ctx'> 		"Logical port online: WWN = %s Role = %s\n",</div><div class='ctx'> 		lpwwn_buf, "Initiator");</div><div class='ctx'> 	bfa_fcs_lport_aen_post(port, BFA_LPORT_AEN_ONLINE);</div><div class='hunk'>@@ -639,12 +639,12 @@ bfa_fcs_lport_offline_actions(struct bfa_fcs_lport_s *port)</div><div class='ctx'> 	wwn2str(lpwwn_buf, bfa_fcs_lport_get_pwwn(port));</div><div class='ctx'> 	if (bfa_sm_cmp_state(port-&gt;fabric,</div><div class='ctx'> 			bfa_fcs_fabric_sm_online) == BFA_TRUE) {</div><div class='del'>-		BFA_LOG(KERN_ERR, bfad, bfa_log_level,</div><div class='add'>+		BFA_LOG(KERN_WARNING, bfad, bfa_log_level,</div><div class='ctx'> 		"Logical port lost fabric connectivity: WWN = %s Role = %s\n",</div><div class='ctx'> 		lpwwn_buf, "Initiator");</div><div class='ctx'> 		bfa_fcs_lport_aen_post(port, BFA_LPORT_AEN_DISCONNECT);</div><div class='ctx'> 	} else {</div><div class='del'>-		BFA_LOG(KERN_INFO, bfad, bfa_log_level,</div><div class='add'>+		BFA_LOG(KERN_WARNING, bfad, bfa_log_level,</div><div class='ctx'> 		"Logical port taken offline: WWN = %s Role = %s\n",</div><div class='ctx'> 		lpwwn_buf, "Initiator");</div><div class='ctx'> 		bfa_fcs_lport_aen_post(port, BFA_LPORT_AEN_OFFLINE);</div><div class='hunk'>@@ -709,14 +709,10 @@ bfa_fcs_lport_deleted(struct bfa_fcs_lport_s *port)</div><div class='ctx'> 	bfa_fcs_lport_aen_post(port, BFA_LPORT_AEN_DELETE);</div><div class='ctx'> </div><div class='ctx'> 	/* Base port will be deleted by the OS driver */</div><div class='del'>-	if (port-&gt;vport) {</div><div class='del'>-		bfa_fcb_lport_delete(port-&gt;fcs-&gt;bfad, port-&gt;port_cfg.roles,</div><div class='del'>-				port-&gt;fabric-&gt;vf_drv,</div><div class='del'>-				port-&gt;vport ? port-&gt;vport-&gt;vport_drv : NULL);</div><div class='add'>+	if (port-&gt;vport)</div><div class='ctx'> 		bfa_fcs_vport_delete_comp(port-&gt;vport);</div><div class='del'>-	} else {</div><div class='add'>+	else</div><div class='ctx'> 		bfa_wc_down(&amp;port-&gt;fabric-&gt;wc);</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -5714,17 +5710,23 @@ bfa_fcs_vport_free(struct bfa_fcs_vport_s *vport)</div><div class='ctx'> 			(struct bfad_vport_s *)vport-&gt;vport_drv;</div><div class='ctx'> </div><div class='ctx'> 	bfa_fcs_fabric_delvport(__vport_fabric(vport), vport);</div><div class='add'>+	bfa_lps_delete(vport-&gt;lps);</div><div class='ctx'> </div><div class='del'>-	if (vport_drv-&gt;comp_del)</div><div class='add'>+	if (vport_drv-&gt;comp_del) {</div><div class='ctx'> 		complete(vport_drv-&gt;comp_del);</div><div class='del'>-	else</div><div class='del'>-		kfree(vport_drv);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	bfa_lps_delete(vport-&gt;lps);</div><div class='add'>+	/*</div><div class='add'>+	 * We queue the vport delete work to the IM work_q from here.</div><div class='add'>+	 * The memory for the bfad_vport_s is freed from the FC function</div><div class='add'>+	 * template vport_delete entry point.</div><div class='add'>+	 */</div><div class='add'>+	if (vport_drv)</div><div class='add'>+		bfad_im_port_delete(vport_drv-&gt;drv_port.bfad,</div><div class='add'>+				&amp;vport_drv-&gt;drv_port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  *  fcs_vport_public FCS virtual port public interfaces</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/scsi/bfa/bfad.c b/drivers/scsi/bfa/bfad.c<br/>index 404fd10ddb21..2e4b0be14a20 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bfa/bfad.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bfa/bfad.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bfa/bfad.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bfa/bfad.c</a></div><div class='hunk'>@@ -456,23 +456,6 @@ bfa_fcb_lport_new(struct bfad_s *bfad, struct bfa_fcs_lport_s *port,</div><div class='ctx'> 	return port_drv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void</div><div class='del'>-bfa_fcb_lport_delete(struct bfad_s *bfad, enum bfa_lport_role roles,</div><div class='del'>-		    struct bfad_vf_s *vf_drv, struct bfad_vport_s *vp_drv)</div><div class='del'>-{</div><div class='del'>-	struct bfad_port_s    *port_drv;</div><div class='del'>-</div><div class='del'>-	/* this will be only called from rmmod context */</div><div class='del'>-	if (vp_drv &amp;&amp; !vp_drv-&gt;comp_del) {</div><div class='del'>-		port_drv = (vp_drv) ? (&amp;(vp_drv)-&gt;drv_port) :</div><div class='del'>-				((vf_drv) ? (&amp;(vf_drv)-&gt;base_port) :</div><div class='del'>-				(&amp;(bfad)-&gt;pport));</div><div class='del'>-		bfa_trc(bfad, roles);</div><div class='del'>-		if (roles &amp; BFA_LPORT_ROLE_FCP_IM)</div><div class='del'>-			bfad_im_port_delete(bfad, port_drv);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * FCS RPORT alloc callback, after successful PLOGI by FCS</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/scsi/bfa/bfad_attr.c b/drivers/scsi/bfa/bfad_attr.c<br/>index 7b1ecd2b3ffe..b83927440171 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bfa/bfad_attr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bfa/bfad_attr.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bfa/bfad_attr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bfa/bfad_attr.c</a></div><div class='hunk'>@@ -426,6 +426,23 @@ bfad_im_vport_create(struct fc_vport *fc_vport, bool disable)</div><div class='ctx'> 		vshost = vport-&gt;drv_port.im_port-&gt;shost;</div><div class='ctx'> 		fc_host_node_name(vshost) = wwn_to_u64((u8 *)&amp;port_cfg.nwwn);</div><div class='ctx'> 		fc_host_port_name(vshost) = wwn_to_u64((u8 *)&amp;port_cfg.pwwn);</div><div class='add'>+		fc_host_supported_classes(vshost) = FC_COS_CLASS3;</div><div class='add'>+</div><div class='add'>+		memset(fc_host_supported_fc4s(vshost), 0,</div><div class='add'>+			sizeof(fc_host_supported_fc4s(vshost)));</div><div class='add'>+</div><div class='add'>+		/* For FCP type 0x08 */</div><div class='add'>+		if (supported_fc4s &amp; BFA_LPORT_ROLE_FCP_IM)</div><div class='add'>+			fc_host_supported_fc4s(vshost)[2] = 1;</div><div class='add'>+</div><div class='add'>+		/* For fibre channel services type 0x20 */</div><div class='add'>+		fc_host_supported_fc4s(vshost)[7] = 1;</div><div class='add'>+</div><div class='add'>+		fc_host_supported_speeds(vshost) =</div><div class='add'>+				bfad_im_supported_speeds(&amp;bfad-&gt;bfa);</div><div class='add'>+		fc_host_maxframe_size(vshost) =</div><div class='add'>+				bfa_fcport_get_maxfrsize(&amp;bfad-&gt;bfa);</div><div class='add'>+</div><div class='ctx'> 		fc_vport-&gt;dd_data = vport;</div><div class='ctx'> 		vport-&gt;drv_port.im_port-&gt;fc_vport = fc_vport;</div><div class='ctx'> 	} else if (rc == BFA_STATUS_INVALID_WWN)</div><div class='hunk'>@@ -497,6 +514,7 @@ bfad_im_vport_delete(struct fc_vport *fc_vport)</div><div class='ctx'> 	if (im_port-&gt;flags &amp; BFAD_PORT_DELETE) {</div><div class='ctx'> 		bfad_scsi_host_free(bfad, im_port);</div><div class='ctx'> 		list_del(&amp;vport-&gt;list_entry);</div><div class='add'>+		kfree(vport);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -758,25 +776,10 @@ bfad_im_model_desc_show(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 	else if (!strcmp(model, "Brocade-804"))</div><div class='ctx'> 		snprintf(model_descr, BFA_ADAPTER_MODEL_DESCR_LEN,</div><div class='ctx'> 			"Brocade 8Gbps FC HBA for HP Bladesystem C-class");</div><div class='del'>-	else if (!strcmp(model, "Brocade-902") ||</div><div class='del'>-		 !strcmp(model, "Brocade-1741"))</div><div class='add'>+	else if (!strcmp(model, "Brocade-1741"))</div><div class='ctx'> 		snprintf(model_descr, BFA_ADAPTER_MODEL_DESCR_LEN,</div><div class='ctx'> 			"Brocade 10Gbps CNA for Dell M-Series Blade Servers");</div><div class='del'>-	else if (strstr(model, "Brocade-1560")) {</div><div class='del'>-		if (nports == 1)</div><div class='del'>-			snprintf(model_descr, BFA_ADAPTER_MODEL_DESCR_LEN,</div><div class='del'>-				"Brocade 16Gbps PCIe single port FC HBA");</div><div class='del'>-		else</div><div class='del'>-			snprintf(model_descr, BFA_ADAPTER_MODEL_DESCR_LEN,</div><div class='del'>-				"Brocade 16Gbps PCIe dual port FC HBA");</div><div class='del'>-	} else if (strstr(model, "Brocade-1710")) {</div><div class='del'>-		if (nports == 1)</div><div class='del'>-			snprintf(model_descr, BFA_ADAPTER_MODEL_DESCR_LEN,</div><div class='del'>-				"Brocade 10Gbps single port CNA");</div><div class='del'>-		else</div><div class='del'>-			snprintf(model_descr, BFA_ADAPTER_MODEL_DESCR_LEN,</div><div class='del'>-				"Brocade 10Gbps dual port CNA");</div><div class='del'>-	} else if (strstr(model, "Brocade-1860")) {</div><div class='add'>+	else if (strstr(model, "Brocade-1860")) {</div><div class='ctx'> 		if (nports == 1 &amp;&amp; bfa_ioc_is_cna(&amp;bfad-&gt;bfa.ioc))</div><div class='ctx'> 			snprintf(model_descr, BFA_ADAPTER_MODEL_DESCR_LEN,</div><div class='ctx'> 				"Brocade 10Gbps single port CNA");</div><div class='head'>diff --git a/drivers/scsi/bfa/bfad_im.c b/drivers/scsi/bfa/bfad_im.c<br/>index 3153923f5b60..1ac09afe35ee 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bfa/bfad_im.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bfa/bfad_im.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bfa/bfad_im.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bfa/bfad_im.c</a></div><div class='hunk'>@@ -987,7 +987,7 @@ done:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32</div><div class='add'>+u32</div><div class='ctx'> bfad_im_supported_speeds(struct bfa_s *bfa)</div><div class='ctx'> {</div><div class='ctx'> 	struct bfa_ioc_attr_s *ioc_attr;</div><div class='head'>diff --git a/drivers/scsi/bfa/bfad_im.h b/drivers/scsi/bfa/bfad_im.h<br/>index 0814367ef101..f6c1023e502a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bfa/bfad_im.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bfa/bfad_im.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bfa/bfad_im.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bfa/bfad_im.h</a></div><div class='hunk'>@@ -37,6 +37,7 @@ int  bfad_im_scsi_host_alloc(struct bfad_s *bfad,</div><div class='ctx'> 		struct bfad_im_port_s *im_port, struct device *dev);</div><div class='ctx'> void bfad_im_scsi_host_free(struct bfad_s *bfad,</div><div class='ctx'> 				struct bfad_im_port_s *im_port);</div><div class='add'>+u32 bfad_im_supported_speeds(struct bfa_s *bfa);</div><div class='ctx'> </div><div class='ctx'> #define MAX_FCP_TARGET 1024</div><div class='ctx'> #define MAX_FCP_LUN 16384</div><div class='head'>diff --git a/drivers/scsi/bnx2fc/bnx2fc.h b/drivers/scsi/bnx2fc/bnx2fc.h<br/>index a4953ef9e53a..0578fa0dc14b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2fc/bnx2fc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2fc/bnx2fc.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2fc/bnx2fc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2fc/bnx2fc.h</a></div><div class='hunk'>@@ -62,7 +62,7 @@</div><div class='ctx'> #include "bnx2fc_constants.h"</div><div class='ctx'> </div><div class='ctx'> #define BNX2FC_NAME		"bnx2fc"</div><div class='del'>-#define BNX2FC_VERSION		"1.0.10"</div><div class='add'>+#define BNX2FC_VERSION		"1.0.11"</div><div class='ctx'> </div><div class='ctx'> #define PFX			"bnx2fc: "</div><div class='ctx'> </div><div class='hunk'>@@ -228,13 +228,16 @@ struct bnx2fc_interface {</div><div class='ctx'> 	struct packet_type fip_packet_type;</div><div class='ctx'> 	struct workqueue_struct *timer_work_queue;</div><div class='ctx'> 	struct kref kref;</div><div class='del'>-	struct fcoe_ctlr ctlr;</div><div class='ctx'> 	u8 vlan_enabled;</div><div class='ctx'> 	int vlan_id;</div><div class='ctx'> 	bool enabled;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define bnx2fc_from_ctlr(fip) container_of(fip, struct bnx2fc_interface, ctlr)</div><div class='add'>+#define bnx2fc_from_ctlr(x)			\</div><div class='add'>+	((struct bnx2fc_interface *)((x) + 1))</div><div class='add'>+</div><div class='add'>+#define bnx2fc_to_ctlr(x)					\</div><div class='add'>+	((struct fcoe_ctlr *)(((struct fcoe_ctlr *)(x)) - 1))</div><div class='ctx'> </div><div class='ctx'> struct bnx2fc_lport {</div><div class='ctx'> 	struct list_head list;</div><div class='head'>diff --git a/drivers/scsi/bnx2fc/bnx2fc_els.c b/drivers/scsi/bnx2fc/bnx2fc_els.c<br/>index ce0ce3e32f33..bdbbb13b8534 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2fc/bnx2fc_els.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2fc/bnx2fc_els.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2fc/bnx2fc_els.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2fc/bnx2fc_els.c</a></div><div class='hunk'>@@ -854,7 +854,6 @@ static void bnx2fc_flogi_resp(struct fc_seq *seq, struct fc_frame *fp,</div><div class='ctx'> 	struct fc_exch *exch = fc_seq_exch(seq);</div><div class='ctx'> 	struct fc_lport *lport = exch-&gt;lp;</div><div class='ctx'> 	u8 *mac;</div><div class='del'>-	struct fc_frame_header *fh;</div><div class='ctx'> 	u8 op;</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(fp))</div><div class='hunk'>@@ -862,13 +861,6 @@ static void bnx2fc_flogi_resp(struct fc_seq *seq, struct fc_frame *fp,</div><div class='ctx'> </div><div class='ctx'> 	mac = fr_cb(fp)-&gt;granted_mac;</div><div class='ctx'> 	if (is_zero_ether_addr(mac)) {</div><div class='del'>-		fh = fc_frame_header_get(fp);</div><div class='del'>-		if (fh-&gt;fh_type != FC_TYPE_ELS) {</div><div class='del'>-			printk(KERN_ERR PFX "bnx2fc_flogi_resp:"</div><div class='del'>-				"fh_type != FC_TYPE_ELS\n");</div><div class='del'>-			fc_frame_free(fp);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='ctx'> 		op = fc_frame_payload_op(fp);</div><div class='ctx'> 		if (lport-&gt;vport) {</div><div class='ctx'> 			if (op == ELS_LS_RJT) {</div><div class='hunk'>@@ -878,12 +870,10 @@ static void bnx2fc_flogi_resp(struct fc_seq *seq, struct fc_frame *fp,</div><div class='ctx'> 				return;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		if (fcoe_ctlr_recv_flogi(fip, lport, fp)) {</div><div class='del'>-			fc_frame_free(fp);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='add'>+		fcoe_ctlr_recv_flogi(fip, lport, fp);</div><div class='ctx'> 	}</div><div class='del'>-	fip-&gt;update_mac(lport, mac);</div><div class='add'>+	if (!is_zero_ether_addr(mac))</div><div class='add'>+		fip-&gt;update_mac(lport, mac);</div><div class='ctx'> done:</div><div class='ctx'> 	fc_lport_flogi_resp(seq, fp, lport);</div><div class='ctx'> }</div><div class='hunk'>@@ -910,7 +900,7 @@ struct fc_seq *bnx2fc_elsct_send(struct fc_lport *lport, u32 did,</div><div class='ctx'> {</div><div class='ctx'> 	struct fcoe_port *port = lport_priv(lport);</div><div class='ctx'> 	struct bnx2fc_interface *interface = port-&gt;priv;</div><div class='del'>-	struct fcoe_ctlr *fip = &amp;interface-&gt;ctlr;</div><div class='add'>+	struct fcoe_ctlr *fip = bnx2fc_to_ctlr(interface);</div><div class='ctx'> 	struct fc_frame_header *fh = fc_frame_header_get(fp);</div><div class='ctx'> </div><div class='ctx'> 	switch (op) {</div><div class='head'>diff --git a/drivers/scsi/bnx2fc/bnx2fc_fcoe.c b/drivers/scsi/bnx2fc/bnx2fc_fcoe.c<br/>index c1c6a92a0b98..f52f668fd247 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2fc/bnx2fc_fcoe.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2fc/bnx2fc_fcoe.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2fc/bnx2fc_fcoe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2fc/bnx2fc_fcoe.c</a></div><div class='hunk'>@@ -22,7 +22,7 @@ DEFINE_PER_CPU(struct bnx2fc_percpu_s, bnx2fc_percpu);</div><div class='ctx'> </div><div class='ctx'> #define DRV_MODULE_NAME		"bnx2fc"</div><div class='ctx'> #define DRV_MODULE_VERSION	BNX2FC_VERSION</div><div class='del'>-#define DRV_MODULE_RELDATE	"Jan 22, 2011"</div><div class='add'>+#define DRV_MODULE_RELDATE	"Apr 24, 2012"</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static char version[] __devinitdata =</div><div class='hunk'>@@ -54,6 +54,7 @@ static struct cnic_ulp_ops bnx2fc_cnic_cb;</div><div class='ctx'> static struct libfc_function_template bnx2fc_libfc_fcn_templ;</div><div class='ctx'> static struct scsi_host_template bnx2fc_shost_template;</div><div class='ctx'> static struct fc_function_template bnx2fc_transport_function;</div><div class='add'>+static struct fcoe_sysfs_function_template bnx2fc_fcoe_sysfs_templ;</div><div class='ctx'> static struct fc_function_template bnx2fc_vport_xport_function;</div><div class='ctx'> static int bnx2fc_create(struct net_device *netdev, enum fip_state fip_mode);</div><div class='ctx'> static void __bnx2fc_destroy(struct bnx2fc_interface *interface);</div><div class='hunk'>@@ -88,6 +89,7 @@ static void bnx2fc_port_shutdown(struct fc_lport *lport);</div><div class='ctx'> static void bnx2fc_stop(struct bnx2fc_interface *interface);</div><div class='ctx'> static int __init bnx2fc_mod_init(void);</div><div class='ctx'> static void __exit bnx2fc_mod_exit(void);</div><div class='add'>+static void bnx2fc_ctlr_get_lesb(struct fcoe_ctlr_device *ctlr_dev);</div><div class='ctx'> </div><div class='ctx'> unsigned int bnx2fc_debug_level;</div><div class='ctx'> module_param_named(debug_logging, bnx2fc_debug_level, int, S_IRUGO|S_IWUSR);</div><div class='hunk'>@@ -118,6 +120,41 @@ static void bnx2fc_get_lesb(struct fc_lport *lport,</div><div class='ctx'> 	__fcoe_get_lesb(lport, fc_lesb, netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnx2fc_ctlr_get_lesb(struct fcoe_ctlr_device *ctlr_dev)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr *fip = fcoe_ctlr_device_priv(ctlr_dev);</div><div class='add'>+	struct net_device *netdev = bnx2fc_netdev(fip-&gt;lp);</div><div class='add'>+	struct fcoe_fc_els_lesb *fcoe_lesb;</div><div class='add'>+	struct fc_els_lesb fc_lesb;</div><div class='add'>+</div><div class='add'>+	__fcoe_get_lesb(fip-&gt;lp, &amp;fc_lesb, netdev);</div><div class='add'>+	fcoe_lesb = (struct fcoe_fc_els_lesb *)(&amp;fc_lesb);</div><div class='add'>+</div><div class='add'>+	ctlr_dev-&gt;lesb.lesb_link_fail =</div><div class='add'>+		ntohl(fcoe_lesb-&gt;lesb_link_fail);</div><div class='add'>+	ctlr_dev-&gt;lesb.lesb_vlink_fail =</div><div class='add'>+		ntohl(fcoe_lesb-&gt;lesb_vlink_fail);</div><div class='add'>+	ctlr_dev-&gt;lesb.lesb_miss_fka =</div><div class='add'>+		ntohl(fcoe_lesb-&gt;lesb_miss_fka);</div><div class='add'>+	ctlr_dev-&gt;lesb.lesb_symb_err =</div><div class='add'>+		ntohl(fcoe_lesb-&gt;lesb_symb_err);</div><div class='add'>+	ctlr_dev-&gt;lesb.lesb_err_block =</div><div class='add'>+		ntohl(fcoe_lesb-&gt;lesb_err_block);</div><div class='add'>+	ctlr_dev-&gt;lesb.lesb_fcs_error =</div><div class='add'>+		ntohl(fcoe_lesb-&gt;lesb_fcs_error);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(bnx2fc_ctlr_get_lesb);</div><div class='add'>+</div><div class='add'>+static void bnx2fc_fcf_get_vlan_id(struct fcoe_fcf_device *fcf_dev)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr_device *ctlr_dev =</div><div class='add'>+		fcoe_fcf_dev_to_ctlr_dev(fcf_dev);</div><div class='add'>+	struct fcoe_ctlr *ctlr = fcoe_ctlr_device_priv(ctlr_dev);</div><div class='add'>+	struct bnx2fc_interface *fcoe = fcoe_ctlr_priv(ctlr);</div><div class='add'>+</div><div class='add'>+	fcf_dev-&gt;vlan_id = fcoe-&gt;vlan_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bnx2fc_clean_rx_queue(struct fc_lport *lp)</div><div class='ctx'> {</div><div class='ctx'> 	struct fcoe_percpu_s *bg;</div><div class='hunk'>@@ -244,6 +281,7 @@ static int bnx2fc_xmit(struct fc_lport *lport, struct fc_frame *fp)</div><div class='ctx'> 	struct sk_buff		*skb;</div><div class='ctx'> 	struct fc_frame_header	*fh;</div><div class='ctx'> 	struct bnx2fc_interface	*interface;</div><div class='add'>+	struct fcoe_ctlr        *ctlr;</div><div class='ctx'> 	struct bnx2fc_hba *hba;</div><div class='ctx'> 	struct fcoe_port	*port;</div><div class='ctx'> 	struct fcoe_hdr		*hp;</div><div class='hunk'>@@ -256,6 +294,7 @@ static int bnx2fc_xmit(struct fc_lport *lport, struct fc_frame *fp)</div><div class='ctx'> </div><div class='ctx'> 	port = (struct fcoe_port *)lport_priv(lport);</div><div class='ctx'> 	interface = port-&gt;priv;</div><div class='add'>+	ctlr = bnx2fc_to_ctlr(interface);</div><div class='ctx'> 	hba = interface-&gt;hba;</div><div class='ctx'> </div><div class='ctx'> 	fh = fc_frame_header_get(fp);</div><div class='hunk'>@@ -268,12 +307,12 @@ static int bnx2fc_xmit(struct fc_lport *lport, struct fc_frame *fp)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(fh-&gt;fh_r_ctl == FC_RCTL_ELS_REQ)) {</div><div class='del'>-		if (!interface-&gt;ctlr.sel_fcf) {</div><div class='add'>+		if (!ctlr-&gt;sel_fcf) {</div><div class='ctx'> 			BNX2FC_HBA_DBG(lport, "FCF not selected yet!\n");</div><div class='ctx'> 			kfree_skb(skb);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-		if (fcoe_ctlr_els_send(&amp;interface-&gt;ctlr, lport, skb))</div><div class='add'>+		if (fcoe_ctlr_els_send(ctlr, lport, skb))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -346,14 +385,14 @@ static int bnx2fc_xmit(struct fc_lport *lport, struct fc_frame *fp)</div><div class='ctx'> 	/* fill up mac and fcoe headers */</div><div class='ctx'> 	eh = eth_hdr(skb);</div><div class='ctx'> 	eh-&gt;h_proto = htons(ETH_P_FCOE);</div><div class='del'>-	if (interface-&gt;ctlr.map_dest)</div><div class='add'>+	if (ctlr-&gt;map_dest)</div><div class='ctx'> 		fc_fcoe_set_mac(eh-&gt;h_dest, fh-&gt;fh_d_id);</div><div class='ctx'> 	else</div><div class='ctx'> 		/* insert GW address */</div><div class='del'>-		memcpy(eh-&gt;h_dest, interface-&gt;ctlr.dest_addr, ETH_ALEN);</div><div class='add'>+		memcpy(eh-&gt;h_dest, ctlr-&gt;dest_addr, ETH_ALEN);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(interface-&gt;ctlr.flogi_oxid != FC_XID_UNKNOWN))</div><div class='del'>-		memcpy(eh-&gt;h_source, interface-&gt;ctlr.ctl_src_addr, ETH_ALEN);</div><div class='add'>+	if (unlikely(ctlr-&gt;flogi_oxid != FC_XID_UNKNOWN))</div><div class='add'>+		memcpy(eh-&gt;h_source, ctlr-&gt;ctl_src_addr, ETH_ALEN);</div><div class='ctx'> 	else</div><div class='ctx'> 		memcpy(eh-&gt;h_source, port-&gt;data_src_addr, ETH_ALEN);</div><div class='ctx'> </div><div class='hunk'>@@ -403,6 +442,7 @@ static int bnx2fc_rcv(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct fc_lport *lport;</div><div class='ctx'> 	struct bnx2fc_interface *interface;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fc_frame_header *fh;</div><div class='ctx'> 	struct fcoe_rcv_info *fr;</div><div class='ctx'> 	struct fcoe_percpu_s *bg;</div><div class='hunk'>@@ -410,7 +450,8 @@ static int bnx2fc_rcv(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	interface = container_of(ptype, struct bnx2fc_interface,</div><div class='ctx'> 				 fcoe_packet_type);</div><div class='del'>-	lport = interface-&gt;ctlr.lp;</div><div class='add'>+	ctlr = bnx2fc_to_ctlr(interface);</div><div class='add'>+	lport = ctlr-&gt;lp;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(lport == NULL)) {</div><div class='ctx'> 		printk(KERN_ERR PFX "bnx2fc_rcv: lport is NULL\n");</div><div class='hunk'>@@ -758,11 +799,13 @@ static int bnx2fc_net_config(struct fc_lport *lport, struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2fc_hba *hba;</div><div class='ctx'> 	struct bnx2fc_interface *interface;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_port *port;</div><div class='ctx'> 	u64 wwnn, wwpn;</div><div class='ctx'> </div><div class='ctx'> 	port = lport_priv(lport);</div><div class='ctx'> 	interface = port-&gt;priv;</div><div class='add'>+	ctlr = bnx2fc_to_ctlr(interface);</div><div class='ctx'> 	hba = interface-&gt;hba;</div><div class='ctx'> </div><div class='ctx'> 	/* require support for get_pauseparam ethtool op. */</div><div class='hunk'>@@ -781,13 +824,13 @@ static int bnx2fc_net_config(struct fc_lport *lport, struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	if (!lport-&gt;vport) {</div><div class='ctx'> 		if (fcoe_get_wwn(netdev, &amp;wwnn, NETDEV_FCOE_WWNN))</div><div class='del'>-			wwnn = fcoe_wwn_from_mac(interface-&gt;ctlr.ctl_src_addr,</div><div class='add'>+			wwnn = fcoe_wwn_from_mac(ctlr-&gt;ctl_src_addr,</div><div class='ctx'> 						 1, 0);</div><div class='ctx'> 		BNX2FC_HBA_DBG(lport, "WWNN = 0x%llx\n", wwnn);</div><div class='ctx'> 		fc_set_wwnn(lport, wwnn);</div><div class='ctx'> </div><div class='ctx'> 		if (fcoe_get_wwn(netdev, &amp;wwpn, NETDEV_FCOE_WWPN))</div><div class='del'>-			wwpn = fcoe_wwn_from_mac(interface-&gt;ctlr.ctl_src_addr,</div><div class='add'>+			wwpn = fcoe_wwn_from_mac(ctlr-&gt;ctl_src_addr,</div><div class='ctx'> 						 2, 0);</div><div class='ctx'> </div><div class='ctx'> 		BNX2FC_HBA_DBG(lport, "WWPN = 0x%llx\n", wwpn);</div><div class='hunk'>@@ -824,6 +867,7 @@ static void bnx2fc_indicate_netevent(void *context, unsigned long event,</div><div class='ctx'> 	struct fc_lport *lport;</div><div class='ctx'> 	struct fc_lport *vport;</div><div class='ctx'> 	struct bnx2fc_interface *interface, *tmp;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	int wait_for_upload = 0;</div><div class='ctx'> 	u32 link_possible = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -874,7 +918,8 @@ static void bnx2fc_indicate_netevent(void *context, unsigned long event,</div><div class='ctx'> 		if (interface-&gt;hba != hba)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		lport = interface-&gt;ctlr.lp;</div><div class='add'>+		ctlr = bnx2fc_to_ctlr(interface);</div><div class='add'>+		lport = ctlr-&gt;lp;</div><div class='ctx'> 		BNX2FC_HBA_DBG(lport, "netevent handler - event=%s %ld\n",</div><div class='ctx'> 				interface-&gt;netdev-&gt;name, event);</div><div class='ctx'> </div><div class='hunk'>@@ -889,8 +934,8 @@ static void bnx2fc_indicate_netevent(void *context, unsigned long event,</div><div class='ctx'> 			 * on a stale vlan</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (interface-&gt;enabled)</div><div class='del'>-				fcoe_ctlr_link_up(&amp;interface-&gt;ctlr);</div><div class='del'>-		} else if (fcoe_ctlr_link_down(&amp;interface-&gt;ctlr)) {</div><div class='add'>+				fcoe_ctlr_link_up(ctlr);</div><div class='add'>+		} else if (fcoe_ctlr_link_down(ctlr)) {</div><div class='ctx'> 			mutex_lock(&amp;lport-&gt;lp_mutex);</div><div class='ctx'> 			list_for_each_entry(vport, &amp;lport-&gt;vports, list)</div><div class='ctx'> 				fc_host_port_type(vport-&gt;host) =</div><div class='hunk'>@@ -995,9 +1040,11 @@ static int bnx2fc_fip_recv(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 			   struct net_device *orig_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2fc_interface *interface;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	interface = container_of(ptype, struct bnx2fc_interface,</div><div class='ctx'> 				 fip_packet_type);</div><div class='del'>-	fcoe_ctlr_recv(&amp;interface-&gt;ctlr, skb);</div><div class='add'>+	ctlr = bnx2fc_to_ctlr(interface);</div><div class='add'>+	fcoe_ctlr_recv(ctlr, skb);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1155,6 +1202,7 @@ static int bnx2fc_interface_setup(struct bnx2fc_interface *interface)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = interface-&gt;netdev;</div><div class='ctx'> 	struct net_device *physdev = interface-&gt;hba-&gt;phys_dev;</div><div class='add'>+	struct fcoe_ctlr *ctlr = bnx2fc_to_ctlr(interface);</div><div class='ctx'> 	struct netdev_hw_addr *ha;</div><div class='ctx'> 	int sel_san_mac = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1169,7 +1217,7 @@ static int bnx2fc_interface_setup(struct bnx2fc_interface *interface)</div><div class='ctx'> </div><div class='ctx'> 		if ((ha-&gt;type == NETDEV_HW_ADDR_T_SAN) &amp;&amp;</div><div class='ctx'> 		    (is_valid_ether_addr(ha-&gt;addr))) {</div><div class='del'>-			memcpy(interface-&gt;ctlr.ctl_src_addr, ha-&gt;addr,</div><div class='add'>+			memcpy(ctlr-&gt;ctl_src_addr, ha-&gt;addr,</div><div class='ctx'> 			       ETH_ALEN);</div><div class='ctx'> 			sel_san_mac = 1;</div><div class='ctx'> 			BNX2FC_MISC_DBG("Found SAN MAC\n");</div><div class='hunk'>@@ -1224,19 +1272,23 @@ static void bnx2fc_release_transport(void)</div><div class='ctx'> </div><div class='ctx'> static void bnx2fc_interface_release(struct kref *kref)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr_device *ctlr_dev;</div><div class='ctx'> 	struct bnx2fc_interface *interface;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> </div><div class='ctx'> 	interface = container_of(kref, struct bnx2fc_interface, kref);</div><div class='ctx'> 	BNX2FC_MISC_DBG("Interface is being released\n");</div><div class='ctx'> </div><div class='add'>+	ctlr = bnx2fc_to_ctlr(interface);</div><div class='add'>+	ctlr_dev = fcoe_ctlr_to_ctlr_dev(ctlr);</div><div class='ctx'> 	netdev = interface-&gt;netdev;</div><div class='ctx'> </div><div class='ctx'> 	/* tear-down FIP controller */</div><div class='ctx'> 	if (test_and_clear_bit(BNX2FC_CTLR_INIT_DONE, &amp;interface-&gt;if_flags))</div><div class='del'>-		fcoe_ctlr_destroy(&amp;interface-&gt;ctlr);</div><div class='add'>+		fcoe_ctlr_destroy(ctlr);</div><div class='ctx'> </div><div class='del'>-	kfree(interface);</div><div class='add'>+	fcoe_ctlr_device_delete(ctlr_dev);</div><div class='ctx'> </div><div class='ctx'> 	dev_put(netdev);</div><div class='ctx'> 	module_put(THIS_MODULE);</div><div class='hunk'>@@ -1329,33 +1381,40 @@ struct bnx2fc_interface *bnx2fc_interface_create(struct bnx2fc_hba *hba,</div><div class='ctx'> 				      struct net_device *netdev,</div><div class='ctx'> 				      enum fip_state fip_mode)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr_device *ctlr_dev;</div><div class='ctx'> 	struct bnx2fc_interface *interface;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='add'>+	int size;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='del'>-	interface = kzalloc(sizeof(*interface), GFP_KERNEL);</div><div class='del'>-	if (!interface) {</div><div class='add'>+	size = (sizeof(*interface) + sizeof(struct fcoe_ctlr));</div><div class='add'>+	ctlr_dev = fcoe_ctlr_device_add(&amp;netdev-&gt;dev, &amp;bnx2fc_fcoe_sysfs_templ,</div><div class='add'>+					 size);</div><div class='add'>+	if (!ctlr_dev) {</div><div class='ctx'> 		printk(KERN_ERR PFX "Unable to allocate interface structure\n");</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='add'>+	ctlr = fcoe_ctlr_device_priv(ctlr_dev);</div><div class='add'>+	interface = fcoe_ctlr_priv(ctlr);</div><div class='ctx'> 	dev_hold(netdev);</div><div class='ctx'> 	kref_init(&amp;interface-&gt;kref);</div><div class='ctx'> 	interface-&gt;hba = hba;</div><div class='ctx'> 	interface-&gt;netdev = netdev;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize FIP */</div><div class='del'>-	fcoe_ctlr_init(&amp;interface-&gt;ctlr, fip_mode);</div><div class='del'>-	interface-&gt;ctlr.send = bnx2fc_fip_send;</div><div class='del'>-	interface-&gt;ctlr.update_mac = bnx2fc_update_src_mac;</div><div class='del'>-	interface-&gt;ctlr.get_src_addr = bnx2fc_get_src_mac;</div><div class='add'>+	fcoe_ctlr_init(ctlr, fip_mode);</div><div class='add'>+	ctlr-&gt;send = bnx2fc_fip_send;</div><div class='add'>+	ctlr-&gt;update_mac = bnx2fc_update_src_mac;</div><div class='add'>+	ctlr-&gt;get_src_addr = bnx2fc_get_src_mac;</div><div class='ctx'> 	set_bit(BNX2FC_CTLR_INIT_DONE, &amp;interface-&gt;if_flags);</div><div class='ctx'> </div><div class='ctx'> 	rc = bnx2fc_interface_setup(interface);</div><div class='ctx'> 	if (!rc)</div><div class='ctx'> 		return interface;</div><div class='ctx'> </div><div class='del'>-	fcoe_ctlr_destroy(&amp;interface-&gt;ctlr);</div><div class='add'>+	fcoe_ctlr_destroy(ctlr);</div><div class='ctx'> 	dev_put(netdev);</div><div class='del'>-	kfree(interface);</div><div class='add'>+	fcoe_ctlr_device_delete(ctlr_dev);</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1373,6 +1432,7 @@ struct bnx2fc_interface *bnx2fc_interface_create(struct bnx2fc_hba *hba,</div><div class='ctx'> static struct fc_lport *bnx2fc_if_create(struct bnx2fc_interface *interface,</div><div class='ctx'> 				  struct device *parent, int npiv)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr        *ctlr = bnx2fc_to_ctlr(interface);</div><div class='ctx'> 	struct fc_lport		*lport, *n_port;</div><div class='ctx'> 	struct fcoe_port	*port;</div><div class='ctx'> 	struct Scsi_Host	*shost;</div><div class='hunk'>@@ -1383,7 +1443,7 @@ static struct fc_lport *bnx2fc_if_create(struct bnx2fc_interface *interface,</div><div class='ctx'> </div><div class='ctx'> 	blport = kzalloc(sizeof(struct bnx2fc_lport), GFP_KERNEL);</div><div class='ctx'> 	if (!blport) {</div><div class='del'>-		BNX2FC_HBA_DBG(interface-&gt;ctlr.lp, "Unable to alloc blport\n");</div><div class='add'>+		BNX2FC_HBA_DBG(ctlr-&gt;lp, "Unable to alloc blport\n");</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1479,7 +1539,8 @@ static void bnx2fc_net_cleanup(struct bnx2fc_interface *interface)</div><div class='ctx'> </div><div class='ctx'> static void bnx2fc_interface_cleanup(struct bnx2fc_interface *interface)</div><div class='ctx'> {</div><div class='del'>-	struct fc_lport *lport = interface-&gt;ctlr.lp;</div><div class='add'>+	struct fcoe_ctlr *ctlr = bnx2fc_to_ctlr(interface);</div><div class='add'>+	struct fc_lport *lport = ctlr-&gt;lp;</div><div class='ctx'> 	struct fcoe_port *port = lport_priv(lport);</div><div class='ctx'> 	struct bnx2fc_hba *hba = interface-&gt;hba;</div><div class='ctx'> </div><div class='hunk'>@@ -1519,7 +1580,8 @@ static void bnx2fc_if_destroy(struct fc_lport *lport)</div><div class='ctx'> </div><div class='ctx'> static void __bnx2fc_destroy(struct bnx2fc_interface *interface)</div><div class='ctx'> {</div><div class='del'>-	struct fc_lport *lport = interface-&gt;ctlr.lp;</div><div class='add'>+	struct fcoe_ctlr *ctlr = bnx2fc_to_ctlr(interface);</div><div class='add'>+	struct fc_lport *lport = ctlr-&gt;lp;</div><div class='ctx'> 	struct fcoe_port *port = lport_priv(lport);</div><div class='ctx'> </div><div class='ctx'> 	bnx2fc_interface_cleanup(interface);</div><div class='hunk'>@@ -1543,13 +1605,15 @@ static int bnx2fc_destroy(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2fc_interface *interface = NULL;</div><div class='ctx'> 	struct workqueue_struct *timer_work_queue;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	mutex_lock(&amp;bnx2fc_dev_lock);</div><div class='ctx'> </div><div class='ctx'> 	interface = bnx2fc_interface_lookup(netdev);</div><div class='del'>-	if (!interface || !interface-&gt;ctlr.lp) {</div><div class='add'>+	ctlr = bnx2fc_to_ctlr(interface);</div><div class='add'>+	if (!interface || !ctlr-&gt;lp) {</div><div class='ctx'> 		rc = -ENODEV;</div><div class='ctx'> 		printk(KERN_ERR PFX "bnx2fc_destroy: interface or lport not found\n");</div><div class='ctx'> 		goto netdev_err;</div><div class='hunk'>@@ -1646,6 +1710,7 @@ static void bnx2fc_ulp_start(void *handle)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2fc_hba *hba = handle;</div><div class='ctx'> 	struct bnx2fc_interface *interface;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fc_lport *lport;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;bnx2fc_dev_lock);</div><div class='hunk'>@@ -1657,7 +1722,8 @@ static void bnx2fc_ulp_start(void *handle)</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(interface, &amp;if_list, list) {</div><div class='ctx'> 		if (interface-&gt;hba == hba) {</div><div class='del'>-			lport = interface-&gt;ctlr.lp;</div><div class='add'>+			ctlr = bnx2fc_to_ctlr(interface);</div><div class='add'>+			lport = ctlr-&gt;lp;</div><div class='ctx'> 			/* Kick off Fabric discovery*/</div><div class='ctx'> 			printk(KERN_ERR PFX "ulp_init: start discovery\n");</div><div class='ctx'> 			lport-&gt;tt.frame_send = bnx2fc_xmit;</div><div class='hunk'>@@ -1677,13 +1743,14 @@ static void bnx2fc_port_shutdown(struct fc_lport *lport)</div><div class='ctx'> </div><div class='ctx'> static void bnx2fc_stop(struct bnx2fc_interface *interface)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr *ctlr = bnx2fc_to_ctlr(interface);</div><div class='ctx'> 	struct fc_lport *lport;</div><div class='ctx'> 	struct fc_lport *vport;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(BNX2FC_FLAG_FW_INIT_DONE, &amp;interface-&gt;hba-&gt;flags))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	lport = interface-&gt;ctlr.lp;</div><div class='add'>+	lport = ctlr-&gt;lp;</div><div class='ctx'> 	bnx2fc_port_shutdown(lport);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;lport-&gt;lp_mutex);</div><div class='hunk'>@@ -1692,7 +1759,7 @@ static void bnx2fc_stop(struct bnx2fc_interface *interface)</div><div class='ctx'> 					FC_PORTTYPE_UNKNOWN;</div><div class='ctx'> 	mutex_unlock(&amp;lport-&gt;lp_mutex);</div><div class='ctx'> 	fc_host_port_type(lport-&gt;host) = FC_PORTTYPE_UNKNOWN;</div><div class='del'>-	fcoe_ctlr_link_down(&amp;interface-&gt;ctlr);</div><div class='add'>+	fcoe_ctlr_link_down(ctlr);</div><div class='ctx'> 	fcoe_clean_pending_queue(lport);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1804,6 +1871,7 @@ exit:</div><div class='ctx'> </div><div class='ctx'> static void bnx2fc_start_disc(struct bnx2fc_interface *interface)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr *ctlr = bnx2fc_to_ctlr(interface);</div><div class='ctx'> 	struct fc_lport *lport;</div><div class='ctx'> 	int wait_cnt = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1814,18 +1882,18 @@ static void bnx2fc_start_disc(struct bnx2fc_interface *interface)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lport = interface-&gt;ctlr.lp;</div><div class='add'>+	lport = ctlr-&gt;lp;</div><div class='ctx'> 	BNX2FC_HBA_DBG(lport, "calling fc_fabric_login\n");</div><div class='ctx'> </div><div class='ctx'> 	if (!bnx2fc_link_ok(lport) &amp;&amp; interface-&gt;enabled) {</div><div class='ctx'> 		BNX2FC_HBA_DBG(lport, "ctlr_link_up\n");</div><div class='del'>-		fcoe_ctlr_link_up(&amp;interface-&gt;ctlr);</div><div class='add'>+		fcoe_ctlr_link_up(ctlr);</div><div class='ctx'> 		fc_host_port_type(lport-&gt;host) = FC_PORTTYPE_NPORT;</div><div class='ctx'> 		set_bit(ADAPTER_STATE_READY, &amp;interface-&gt;hba-&gt;adapter_state);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* wait for the FCF to be selected before issuing FLOGI */</div><div class='del'>-	while (!interface-&gt;ctlr.sel_fcf) {</div><div class='add'>+	while (!ctlr-&gt;sel_fcf) {</div><div class='ctx'> 		msleep(250);</div><div class='ctx'> 		/* give up after 3 secs */</div><div class='ctx'> 		if (++wait_cnt &gt; 12)</div><div class='hunk'>@@ -1889,19 +1957,21 @@ static void bnx2fc_ulp_init(struct cnic_dev *dev)</div><div class='ctx'> static int bnx2fc_disable(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2fc_interface *interface;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	mutex_lock(&amp;bnx2fc_dev_lock);</div><div class='ctx'> </div><div class='ctx'> 	interface = bnx2fc_interface_lookup(netdev);</div><div class='del'>-	if (!interface || !interface-&gt;ctlr.lp) {</div><div class='add'>+	ctlr = bnx2fc_to_ctlr(interface);</div><div class='add'>+	if (!interface || !ctlr-&gt;lp) {</div><div class='ctx'> 		rc = -ENODEV;</div><div class='ctx'> 		printk(KERN_ERR PFX "bnx2fc_disable: interface or lport not found\n");</div><div class='ctx'> 	} else {</div><div class='ctx'> 		interface-&gt;enabled = false;</div><div class='del'>-		fcoe_ctlr_link_down(&amp;interface-&gt;ctlr);</div><div class='del'>-		fcoe_clean_pending_queue(interface-&gt;ctlr.lp);</div><div class='add'>+		fcoe_ctlr_link_down(ctlr);</div><div class='add'>+		fcoe_clean_pending_queue(ctlr-&gt;lp);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;bnx2fc_dev_lock);</div><div class='hunk'>@@ -1913,17 +1983,19 @@ static int bnx2fc_disable(struct net_device *netdev)</div><div class='ctx'> static int bnx2fc_enable(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2fc_interface *interface;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	mutex_lock(&amp;bnx2fc_dev_lock);</div><div class='ctx'> </div><div class='ctx'> 	interface = bnx2fc_interface_lookup(netdev);</div><div class='del'>-	if (!interface || !interface-&gt;ctlr.lp) {</div><div class='add'>+	ctlr = bnx2fc_to_ctlr(interface);</div><div class='add'>+	if (!interface || !ctlr-&gt;lp) {</div><div class='ctx'> 		rc = -ENODEV;</div><div class='ctx'> 		printk(KERN_ERR PFX "bnx2fc_enable: interface or lport not found\n");</div><div class='del'>-	} else if (!bnx2fc_link_ok(interface-&gt;ctlr.lp)) {</div><div class='del'>-		fcoe_ctlr_link_up(&amp;interface-&gt;ctlr);</div><div class='add'>+	} else if (!bnx2fc_link_ok(ctlr-&gt;lp)) {</div><div class='add'>+		fcoe_ctlr_link_up(ctlr);</div><div class='ctx'> 		interface-&gt;enabled = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1944,6 +2016,7 @@ static int bnx2fc_enable(struct net_device *netdev)</div><div class='ctx'>  */</div><div class='ctx'> static int bnx2fc_create(struct net_device *netdev, enum fip_state fip_mode)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct bnx2fc_interface *interface;</div><div class='ctx'> 	struct bnx2fc_hba *hba;</div><div class='ctx'> 	struct net_device *phys_dev;</div><div class='hunk'>@@ -2010,6 +2083,7 @@ static int bnx2fc_create(struct net_device *netdev, enum fip_state fip_mode)</div><div class='ctx'> 		goto ifput_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ctlr = bnx2fc_to_ctlr(interface);</div><div class='ctx'> 	interface-&gt;vlan_id = vlan_id;</div><div class='ctx'> 	interface-&gt;vlan_enabled = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -2035,10 +2109,10 @@ static int bnx2fc_create(struct net_device *netdev, enum fip_state fip_mode)</div><div class='ctx'> 	lport-&gt;boot_time = jiffies;</div><div class='ctx'> </div><div class='ctx'> 	/* Make this master N_port */</div><div class='del'>-	interface-&gt;ctlr.lp = lport;</div><div class='add'>+	ctlr-&gt;lp = lport;</div><div class='ctx'> </div><div class='ctx'> 	if (!bnx2fc_link_ok(lport)) {</div><div class='del'>-		fcoe_ctlr_link_up(&amp;interface-&gt;ctlr);</div><div class='add'>+		fcoe_ctlr_link_up(ctlr);</div><div class='ctx'> 		fc_host_port_type(lport-&gt;host) = FC_PORTTYPE_NPORT;</div><div class='ctx'> 		set_bit(ADAPTER_STATE_READY, &amp;interface-&gt;hba-&gt;adapter_state);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2439,6 +2513,19 @@ static void __exit bnx2fc_mod_exit(void)</div><div class='ctx'> module_init(bnx2fc_mod_init);</div><div class='ctx'> module_exit(bnx2fc_mod_exit);</div><div class='ctx'> </div><div class='add'>+static struct fcoe_sysfs_function_template bnx2fc_fcoe_sysfs_templ = {</div><div class='add'>+	.get_fcoe_ctlr_mode = fcoe_ctlr_get_fip_mode,</div><div class='add'>+	.get_fcoe_ctlr_link_fail = bnx2fc_ctlr_get_lesb,</div><div class='add'>+	.get_fcoe_ctlr_vlink_fail = bnx2fc_ctlr_get_lesb,</div><div class='add'>+	.get_fcoe_ctlr_miss_fka = bnx2fc_ctlr_get_lesb,</div><div class='add'>+	.get_fcoe_ctlr_symb_err = bnx2fc_ctlr_get_lesb,</div><div class='add'>+	.get_fcoe_ctlr_err_block = bnx2fc_ctlr_get_lesb,</div><div class='add'>+	.get_fcoe_ctlr_fcs_error = bnx2fc_ctlr_get_lesb,</div><div class='add'>+</div><div class='add'>+	.get_fcoe_fcf_selected = fcoe_fcf_get_selected,</div><div class='add'>+	.get_fcoe_fcf_vlan_id = bnx2fc_fcf_get_vlan_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct fc_function_template bnx2fc_transport_function = {</div><div class='ctx'> 	.show_host_node_name = 1,</div><div class='ctx'> 	.show_host_port_name = 1,</div><div class='head'>diff --git a/drivers/scsi/bnx2fc/bnx2fc_hwi.c b/drivers/scsi/bnx2fc/bnx2fc_hwi.c<br/>index afd570962b8c..2ca6bfe4ce5e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2fc/bnx2fc_hwi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2fc/bnx2fc_hwi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2fc/bnx2fc_hwi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2fc/bnx2fc_hwi.c</a></div><div class='hunk'>@@ -167,6 +167,7 @@ int bnx2fc_send_session_ofld_req(struct fcoe_port *port,</div><div class='ctx'> {</div><div class='ctx'> 	struct fc_lport *lport = port-&gt;lport;</div><div class='ctx'> 	struct bnx2fc_interface *interface = port-&gt;priv;</div><div class='add'>+	struct fcoe_ctlr *ctlr = bnx2fc_to_ctlr(interface);</div><div class='ctx'> 	struct bnx2fc_hba *hba = interface-&gt;hba;</div><div class='ctx'> 	struct kwqe *kwqe_arr[4];</div><div class='ctx'> 	struct fcoe_kwqe_conn_offload1 ofld_req1;</div><div class='hunk'>@@ -314,13 +315,13 @@ int bnx2fc_send_session_ofld_req(struct fcoe_port *port,</div><div class='ctx'> 	ofld_req4.src_mac_addr_mid[1] =  port-&gt;data_src_addr[2];</div><div class='ctx'> 	ofld_req4.src_mac_addr_hi[0] =  port-&gt;data_src_addr[1];</div><div class='ctx'> 	ofld_req4.src_mac_addr_hi[1] =  port-&gt;data_src_addr[0];</div><div class='del'>-	ofld_req4.dst_mac_addr_lo[0] =  interface-&gt;ctlr.dest_addr[5];</div><div class='add'>+	ofld_req4.dst_mac_addr_lo[0] =  ctlr-&gt;dest_addr[5];</div><div class='ctx'> 							/* fcf mac */</div><div class='del'>-	ofld_req4.dst_mac_addr_lo[1] =  interface-&gt;ctlr.dest_addr[4];</div><div class='del'>-	ofld_req4.dst_mac_addr_mid[0] =  interface-&gt;ctlr.dest_addr[3];</div><div class='del'>-	ofld_req4.dst_mac_addr_mid[1] =  interface-&gt;ctlr.dest_addr[2];</div><div class='del'>-	ofld_req4.dst_mac_addr_hi[0] =  interface-&gt;ctlr.dest_addr[1];</div><div class='del'>-	ofld_req4.dst_mac_addr_hi[1] =  interface-&gt;ctlr.dest_addr[0];</div><div class='add'>+	ofld_req4.dst_mac_addr_lo[1] = ctlr-&gt;dest_addr[4];</div><div class='add'>+	ofld_req4.dst_mac_addr_mid[0] = ctlr-&gt;dest_addr[3];</div><div class='add'>+	ofld_req4.dst_mac_addr_mid[1] = ctlr-&gt;dest_addr[2];</div><div class='add'>+	ofld_req4.dst_mac_addr_hi[0] = ctlr-&gt;dest_addr[1];</div><div class='add'>+	ofld_req4.dst_mac_addr_hi[1] = ctlr-&gt;dest_addr[0];</div><div class='ctx'> </div><div class='ctx'> 	ofld_req4.lcq_addr_lo = (u32) tgt-&gt;lcq_dma;</div><div class='ctx'> 	ofld_req4.lcq_addr_hi = (u32)((u64) tgt-&gt;lcq_dma &gt;&gt; 32);</div><div class='hunk'>@@ -351,6 +352,7 @@ static int bnx2fc_send_session_enable_req(struct fcoe_port *port,</div><div class='ctx'> {</div><div class='ctx'> 	struct kwqe *kwqe_arr[2];</div><div class='ctx'> 	struct bnx2fc_interface *interface = port-&gt;priv;</div><div class='add'>+	struct fcoe_ctlr *ctlr = bnx2fc_to_ctlr(interface);</div><div class='ctx'> 	struct bnx2fc_hba *hba = interface-&gt;hba;</div><div class='ctx'> 	struct fcoe_kwqe_conn_enable_disable enbl_req;</div><div class='ctx'> 	struct fc_lport *lport = port-&gt;lport;</div><div class='hunk'>@@ -374,12 +376,12 @@ static int bnx2fc_send_session_enable_req(struct fcoe_port *port,</div><div class='ctx'> 	enbl_req.src_mac_addr_hi[1] =  port-&gt;data_src_addr[0];</div><div class='ctx'> 	memcpy(tgt-&gt;src_addr, port-&gt;data_src_addr, ETH_ALEN);</div><div class='ctx'> </div><div class='del'>-	enbl_req.dst_mac_addr_lo[0] =  interface-&gt;ctlr.dest_addr[5];</div><div class='del'>-	enbl_req.dst_mac_addr_lo[1] =  interface-&gt;ctlr.dest_addr[4];</div><div class='del'>-	enbl_req.dst_mac_addr_mid[0] =  interface-&gt;ctlr.dest_addr[3];</div><div class='del'>-	enbl_req.dst_mac_addr_mid[1] =  interface-&gt;ctlr.dest_addr[2];</div><div class='del'>-	enbl_req.dst_mac_addr_hi[0] =  interface-&gt;ctlr.dest_addr[1];</div><div class='del'>-	enbl_req.dst_mac_addr_hi[1] =  interface-&gt;ctlr.dest_addr[0];</div><div class='add'>+	enbl_req.dst_mac_addr_lo[0] =  ctlr-&gt;dest_addr[5];</div><div class='add'>+	enbl_req.dst_mac_addr_lo[1] =  ctlr-&gt;dest_addr[4];</div><div class='add'>+	enbl_req.dst_mac_addr_mid[0] = ctlr-&gt;dest_addr[3];</div><div class='add'>+	enbl_req.dst_mac_addr_mid[1] = ctlr-&gt;dest_addr[2];</div><div class='add'>+	enbl_req.dst_mac_addr_hi[0] = ctlr-&gt;dest_addr[1];</div><div class='add'>+	enbl_req.dst_mac_addr_hi[1] = ctlr-&gt;dest_addr[0];</div><div class='ctx'> </div><div class='ctx'> 	port_id = fc_host_port_id(lport-&gt;host);</div><div class='ctx'> 	if (port_id != tgt-&gt;sid) {</div><div class='hunk'>@@ -419,6 +421,7 @@ int bnx2fc_send_session_disable_req(struct fcoe_port *port,</div><div class='ctx'> 				    struct bnx2fc_rport *tgt)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2fc_interface *interface = port-&gt;priv;</div><div class='add'>+	struct fcoe_ctlr *ctlr = bnx2fc_to_ctlr(interface);</div><div class='ctx'> 	struct bnx2fc_hba *hba = interface-&gt;hba;</div><div class='ctx'> 	struct fcoe_kwqe_conn_enable_disable disable_req;</div><div class='ctx'> 	struct kwqe *kwqe_arr[2];</div><div class='hunk'>@@ -440,12 +443,12 @@ int bnx2fc_send_session_disable_req(struct fcoe_port *port,</div><div class='ctx'> 	disable_req.src_mac_addr_hi[0] =  tgt-&gt;src_addr[1];</div><div class='ctx'> 	disable_req.src_mac_addr_hi[1] =  tgt-&gt;src_addr[0];</div><div class='ctx'> </div><div class='del'>-	disable_req.dst_mac_addr_lo[0] =  interface-&gt;ctlr.dest_addr[5];</div><div class='del'>-	disable_req.dst_mac_addr_lo[1] =  interface-&gt;ctlr.dest_addr[4];</div><div class='del'>-	disable_req.dst_mac_addr_mid[0] =  interface-&gt;ctlr.dest_addr[3];</div><div class='del'>-	disable_req.dst_mac_addr_mid[1] =  interface-&gt;ctlr.dest_addr[2];</div><div class='del'>-	disable_req.dst_mac_addr_hi[0] =  interface-&gt;ctlr.dest_addr[1];</div><div class='del'>-	disable_req.dst_mac_addr_hi[1] =  interface-&gt;ctlr.dest_addr[0];</div><div class='add'>+	disable_req.dst_mac_addr_lo[0] =  ctlr-&gt;dest_addr[5];</div><div class='add'>+	disable_req.dst_mac_addr_lo[1] =  ctlr-&gt;dest_addr[4];</div><div class='add'>+	disable_req.dst_mac_addr_mid[0] = ctlr-&gt;dest_addr[3];</div><div class='add'>+	disable_req.dst_mac_addr_mid[1] = ctlr-&gt;dest_addr[2];</div><div class='add'>+	disable_req.dst_mac_addr_hi[0] = ctlr-&gt;dest_addr[1];</div><div class='add'>+	disable_req.dst_mac_addr_hi[1] = ctlr-&gt;dest_addr[0];</div><div class='ctx'> </div><div class='ctx'> 	port_id = tgt-&gt;sid;</div><div class='ctx'> 	disable_req.s_id[0] = (port_id &amp; 0x000000FF);</div><div class='head'>diff --git a/drivers/scsi/bnx2fc/bnx2fc_io.c b/drivers/scsi/bnx2fc/bnx2fc_io.c<br/>index e897ce975bb8..4f7453b9e41e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2fc/bnx2fc_io.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2fc/bnx2fc_io.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2fc/bnx2fc_io.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2fc/bnx2fc_io.c</a></div><div class='hunk'>@@ -810,8 +810,22 @@ retry_tmf:</div><div class='ctx'> 	spin_lock_bh(&amp;tgt-&gt;tgt_lock);</div><div class='ctx'> </div><div class='ctx'> 	io_req-&gt;wait_for_comp = 0;</div><div class='del'>-	if (!(test_bit(BNX2FC_FLAG_TM_COMPL, &amp;io_req-&gt;req_flags)))</div><div class='add'>+	if (!(test_bit(BNX2FC_FLAG_TM_COMPL, &amp;io_req-&gt;req_flags))) {</div><div class='ctx'> 		set_bit(BNX2FC_FLAG_TM_TIMEOUT, &amp;io_req-&gt;req_flags);</div><div class='add'>+		if (io_req-&gt;on_tmf_queue) {</div><div class='add'>+			list_del_init(&amp;io_req-&gt;link);</div><div class='add'>+			io_req-&gt;on_tmf_queue = 0;</div><div class='add'>+		}</div><div class='add'>+		io_req-&gt;wait_for_comp = 1;</div><div class='add'>+		bnx2fc_initiate_cleanup(io_req);</div><div class='add'>+		spin_unlock_bh(&amp;tgt-&gt;tgt_lock);</div><div class='add'>+		rc = wait_for_completion_timeout(&amp;io_req-&gt;tm_done,</div><div class='add'>+						 BNX2FC_FW_TIMEOUT);</div><div class='add'>+		spin_lock_bh(&amp;tgt-&gt;tgt_lock);</div><div class='add'>+		io_req-&gt;wait_for_comp = 0;</div><div class='add'>+		if (!rc)</div><div class='add'>+			kref_put(&amp;io_req-&gt;refcount, bnx2fc_cmd_release);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_bh(&amp;tgt-&gt;tgt_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1089,6 +1103,48 @@ int bnx2fc_eh_device_reset(struct scsi_cmnd *sc_cmd)</div><div class='ctx'> 	return bnx2fc_initiate_tmf(sc_cmd, FCP_TMF_LUN_RESET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int bnx2fc_expl_logo(struct fc_lport *lport, struct bnx2fc_cmd *io_req)</div><div class='add'>+{</div><div class='add'>+	struct bnx2fc_rport *tgt = io_req-&gt;tgt;</div><div class='add'>+	struct fc_rport_priv *rdata = tgt-&gt;rdata;</div><div class='add'>+	int logo_issued;</div><div class='add'>+	int rc = SUCCESS;</div><div class='add'>+	int wait_cnt = 0;</div><div class='add'>+</div><div class='add'>+	BNX2FC_IO_DBG(io_req, "Expl logo - tgt flags = 0x%lx\n",</div><div class='add'>+		      tgt-&gt;flags);</div><div class='add'>+	logo_issued = test_and_set_bit(BNX2FC_FLAG_EXPL_LOGO,</div><div class='add'>+				       &amp;tgt-&gt;flags);</div><div class='add'>+	io_req-&gt;wait_for_comp = 1;</div><div class='add'>+	bnx2fc_initiate_cleanup(io_req);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;tgt-&gt;tgt_lock);</div><div class='add'>+</div><div class='add'>+	wait_for_completion(&amp;io_req-&gt;tm_done);</div><div class='add'>+</div><div class='add'>+	io_req-&gt;wait_for_comp = 0;</div><div class='add'>+	/*</div><div class='add'>+	 * release the reference taken in eh_abort to allow the</div><div class='add'>+	 * target to re-login after flushing IOs</div><div class='add'>+	 */</div><div class='add'>+	 kref_put(&amp;io_req-&gt;refcount, bnx2fc_cmd_release);</div><div class='add'>+</div><div class='add'>+	if (!logo_issued) {</div><div class='add'>+		clear_bit(BNX2FC_FLAG_SESSION_READY, &amp;tgt-&gt;flags);</div><div class='add'>+		mutex_lock(&amp;lport-&gt;disc.disc_mutex);</div><div class='add'>+		lport-&gt;tt.rport_logoff(rdata);</div><div class='add'>+		mutex_unlock(&amp;lport-&gt;disc.disc_mutex);</div><div class='add'>+		do {</div><div class='add'>+			msleep(BNX2FC_RELOGIN_WAIT_TIME);</div><div class='add'>+			if (wait_cnt++ &gt; BNX2FC_RELOGIN_WAIT_CNT) {</div><div class='add'>+				rc = FAILED;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		} while (!test_bit(BNX2FC_FLAG_SESSION_READY, &amp;tgt-&gt;flags));</div><div class='add'>+	}</div><div class='add'>+	spin_lock_bh(&amp;tgt-&gt;tgt_lock);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='ctx'> /**</div><div class='ctx'>  * bnx2fc_eh_abort - eh_abort_handler api to abort an outstanding</div><div class='ctx'>  *			SCSI command</div><div class='hunk'>@@ -1103,10 +1159,7 @@ int bnx2fc_eh_abort(struct scsi_cmnd *sc_cmd)</div><div class='ctx'> 	struct fc_rport_libfc_priv *rp = rport-&gt;dd_data;</div><div class='ctx'> 	struct bnx2fc_cmd *io_req;</div><div class='ctx'> 	struct fc_lport *lport;</div><div class='del'>-	struct fc_rport_priv *rdata;</div><div class='ctx'> 	struct bnx2fc_rport *tgt;</div><div class='del'>-	int logo_issued;</div><div class='del'>-	int wait_cnt = 0;</div><div class='ctx'> 	int rc = FAILED;</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1183,58 +1236,31 @@ int bnx2fc_eh_abort(struct scsi_cmnd *sc_cmd)</div><div class='ctx'> 	list_add_tail(&amp;io_req-&gt;link, &amp;tgt-&gt;io_retire_queue);</div><div class='ctx'> </div><div class='ctx'> 	init_completion(&amp;io_req-&gt;tm_done);</div><div class='del'>-	io_req-&gt;wait_for_comp = 1;</div><div class='ctx'> </div><div class='del'>-	if (!test_and_set_bit(BNX2FC_FLAG_ISSUE_ABTS, &amp;io_req-&gt;req_flags)) {</div><div class='del'>-		/* Cancel the current timer running on this io_req */</div><div class='del'>-		if (cancel_delayed_work(&amp;io_req-&gt;timeout_work))</div><div class='del'>-			kref_put(&amp;io_req-&gt;refcount,</div><div class='del'>-				 bnx2fc_cmd_release); /* drop timer hold */</div><div class='del'>-		set_bit(BNX2FC_FLAG_EH_ABORT, &amp;io_req-&gt;req_flags);</div><div class='del'>-		rc = bnx2fc_initiate_abts(io_req);</div><div class='del'>-	} else {</div><div class='add'>+	if (test_and_set_bit(BNX2FC_FLAG_ISSUE_ABTS, &amp;io_req-&gt;req_flags)) {</div><div class='ctx'> 		printk(KERN_ERR PFX "eh_abort: io_req (xid = 0x%x) "</div><div class='ctx'> 				"already in abts processing\n", io_req-&gt;xid);</div><div class='ctx'> 		if (cancel_delayed_work(&amp;io_req-&gt;timeout_work))</div><div class='ctx'> 			kref_put(&amp;io_req-&gt;refcount,</div><div class='ctx'> 				 bnx2fc_cmd_release); /* drop timer hold */</div><div class='del'>-		bnx2fc_initiate_cleanup(io_req);</div><div class='add'>+		rc = bnx2fc_expl_logo(lport, io_req);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	/* Cancel the current timer running on this io_req */</div><div class='add'>+	if (cancel_delayed_work(&amp;io_req-&gt;timeout_work))</div><div class='add'>+		kref_put(&amp;io_req-&gt;refcount,</div><div class='add'>+			 bnx2fc_cmd_release); /* drop timer hold */</div><div class='add'>+	set_bit(BNX2FC_FLAG_EH_ABORT, &amp;io_req-&gt;req_flags);</div><div class='add'>+	io_req-&gt;wait_for_comp = 1;</div><div class='add'>+	rc = bnx2fc_initiate_abts(io_req);</div><div class='add'>+	if (rc == FAILED) {</div><div class='add'>+		bnx2fc_initiate_cleanup(io_req);</div><div class='ctx'> 		spin_unlock_bh(&amp;tgt-&gt;tgt_lock);</div><div class='del'>-</div><div class='ctx'> 		wait_for_completion(&amp;io_req-&gt;tm_done);</div><div class='del'>-</div><div class='ctx'> 		spin_lock_bh(&amp;tgt-&gt;tgt_lock);</div><div class='ctx'> 		io_req-&gt;wait_for_comp = 0;</div><div class='del'>-		rdata = io_req-&gt;tgt-&gt;rdata;</div><div class='del'>-		logo_issued = test_and_set_bit(BNX2FC_FLAG_EXPL_LOGO,</div><div class='del'>-					       &amp;tgt-&gt;flags);</div><div class='del'>-		kref_put(&amp;io_req-&gt;refcount, bnx2fc_cmd_release);</div><div class='del'>-		spin_unlock_bh(&amp;tgt-&gt;tgt_lock);</div><div class='del'>-</div><div class='del'>-		if (!logo_issued) {</div><div class='del'>-			BNX2FC_IO_DBG(io_req, "Expl logo - tgt flags = 0x%lx\n",</div><div class='del'>-				      tgt-&gt;flags);</div><div class='del'>-			mutex_lock(&amp;lport-&gt;disc.disc_mutex);</div><div class='del'>-			lport-&gt;tt.rport_logoff(rdata);</div><div class='del'>-			mutex_unlock(&amp;lport-&gt;disc.disc_mutex);</div><div class='del'>-			do {</div><div class='del'>-				msleep(BNX2FC_RELOGIN_WAIT_TIME);</div><div class='del'>-				/*</div><div class='del'>-				 * If session not recovered, let SCSI-ml</div><div class='del'>-				 * escalate error recovery.</div><div class='del'>-				 */</div><div class='del'>-				if (wait_cnt++ &gt; BNX2FC_RELOGIN_WAIT_CNT)</div><div class='del'>-					return FAILED;</div><div class='del'>-			} while (!test_bit(BNX2FC_FLAG_SESSION_READY,</div><div class='del'>-					   &amp;tgt-&gt;flags));</div><div class='del'>-		}</div><div class='del'>-		return SUCCESS;</div><div class='del'>-	}</div><div class='del'>-	if (rc == FAILED) {</div><div class='del'>-		kref_put(&amp;io_req-&gt;refcount, bnx2fc_cmd_release);</div><div class='del'>-		spin_unlock_bh(&amp;tgt-&gt;tgt_lock);</div><div class='del'>-		return rc;</div><div class='add'>+		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_bh(&amp;tgt-&gt;tgt_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1247,7 +1273,8 @@ int bnx2fc_eh_abort(struct scsi_cmnd *sc_cmd)</div><div class='ctx'> 		/* Let the scsi-ml try to recover this command */</div><div class='ctx'> 		printk(KERN_ERR PFX "abort failed, xid = 0x%x\n",</div><div class='ctx'> 		       io_req-&gt;xid);</div><div class='del'>-		rc = FAILED;</div><div class='add'>+		rc = bnx2fc_expl_logo(lport, io_req);</div><div class='add'>+		goto out;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * We come here even when there was a race condition</div><div class='hunk'>@@ -1259,9 +1286,10 @@ int bnx2fc_eh_abort(struct scsi_cmnd *sc_cmd)</div><div class='ctx'> 		bnx2fc_scsi_done(io_req, DID_ABORT);</div><div class='ctx'> 		kref_put(&amp;io_req-&gt;refcount, bnx2fc_cmd_release);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+done:</div><div class='ctx'> 	/* release the reference taken in eh_abort */</div><div class='ctx'> 	kref_put(&amp;io_req-&gt;refcount, bnx2fc_cmd_release);</div><div class='add'>+out:</div><div class='ctx'> 	spin_unlock_bh(&amp;tgt-&gt;tgt_lock);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/scsi/bnx2fc/bnx2fc_tgt.c b/drivers/scsi/bnx2fc/bnx2fc_tgt.c<br/>index c1800b531270..082a25c3117e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2fc/bnx2fc_tgt.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2fc/bnx2fc_tgt.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2fc/bnx2fc_tgt.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2fc/bnx2fc_tgt.c</a></div><div class='hunk'>@@ -185,6 +185,16 @@ void bnx2fc_flush_active_ios(struct bnx2fc_rport *tgt)</div><div class='ctx'> 		BUG_ON(rc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	list_for_each_safe(list, tmp, &amp;tgt-&gt;active_tm_queue) {</div><div class='add'>+		i++;</div><div class='add'>+		io_req = (struct bnx2fc_cmd *)list;</div><div class='add'>+		list_del_init(&amp;io_req-&gt;link);</div><div class='add'>+		io_req-&gt;on_tmf_queue = 0;</div><div class='add'>+		BNX2FC_IO_DBG(io_req, "tm_queue cleanup\n");</div><div class='add'>+		if (io_req-&gt;wait_for_comp)</div><div class='add'>+			complete(&amp;io_req-&gt;tm_done);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	list_for_each_safe(list, tmp, &amp;tgt-&gt;els_queue) {</div><div class='ctx'> 		i++;</div><div class='ctx'> 		io_req = (struct bnx2fc_cmd *)list;</div><div class='hunk'>@@ -213,8 +223,17 @@ void bnx2fc_flush_active_ios(struct bnx2fc_rport *tgt)</div><div class='ctx'> </div><div class='ctx'> 		BNX2FC_IO_DBG(io_req, "retire_queue flush\n");</div><div class='ctx'> </div><div class='del'>-		if (cancel_delayed_work(&amp;io_req-&gt;timeout_work))</div><div class='add'>+		if (cancel_delayed_work(&amp;io_req-&gt;timeout_work)) {</div><div class='add'>+			if (test_and_clear_bit(BNX2FC_FLAG_EH_ABORT,</div><div class='add'>+						&amp;io_req-&gt;req_flags)) {</div><div class='add'>+				/* Handle eh_abort timeout */</div><div class='add'>+				BNX2FC_IO_DBG(io_req, "eh_abort for IO "</div><div class='add'>+					      "in retire_q\n");</div><div class='add'>+				if (io_req-&gt;wait_for_comp)</div><div class='add'>+					complete(&amp;io_req-&gt;tm_done);</div><div class='add'>+			}</div><div class='ctx'> 			kref_put(&amp;io_req-&gt;refcount, bnx2fc_cmd_release);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		clear_bit(BNX2FC_FLAG_ISSUE_RRQ, &amp;io_req-&gt;req_flags);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/scsi/bnx2i/57xx_iscsi_constants.h b/drivers/scsi/bnx2i/57xx_iscsi_constants.h<br/>index 495a841645f9..25093a04123b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2i/57xx_iscsi_constants.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2i/57xx_iscsi_constants.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2i/57xx_iscsi_constants.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/57xx_iscsi_constants.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* 57xx_iscsi_constants.h: Broadcom NetXtreme II iSCSI HSI</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2006 - 2011 Broadcom Corporation</div><div class='add'>+ * Copyright (c) 2006 - 2012 Broadcom Corporation</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='head'>diff --git a/drivers/scsi/bnx2i/57xx_iscsi_hsi.h b/drivers/scsi/bnx2i/57xx_iscsi_hsi.h<br/>index 72118db89a20..dc0a08e69c82 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2i/57xx_iscsi_hsi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2i/57xx_iscsi_hsi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2i/57xx_iscsi_hsi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/57xx_iscsi_hsi.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* 57xx_iscsi_hsi.h: Broadcom NetXtreme II iSCSI HSI.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2006 - 2011 Broadcom Corporation</div><div class='add'>+ * Copyright (c) 2006 - 2012 Broadcom Corporation</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='head'>diff --git a/drivers/scsi/bnx2i/bnx2i.h b/drivers/scsi/bnx2i/bnx2i.h<br/>index 0bd70e80efe4..0c53c28dc3d3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2i/bnx2i.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2i/bnx2i.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2i/bnx2i.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/bnx2i.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* bnx2i.h: Broadcom NetXtreme II iSCSI driver.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2006 - 2011 Broadcom Corporation</div><div class='add'>+ * Copyright (c) 2006 - 2012 Broadcom Corporation</div><div class='ctx'>  * Copyright (c) 2007, 2008 Red Hat, Inc.  All rights reserved.</div><div class='ctx'>  * Copyright (c) 2007, 2008 Mike Christie</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/scsi/bnx2i/bnx2i_hwi.c b/drivers/scsi/bnx2i/bnx2i_hwi.c<br/>index f9d6f4129093..ece47e502282 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2i/bnx2i_hwi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2i/bnx2i_hwi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2i/bnx2i_hwi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/bnx2i_hwi.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* bnx2i_hwi.c: Broadcom NetXtreme II iSCSI driver.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2006 - 2011 Broadcom Corporation</div><div class='add'>+ * Copyright (c) 2006 - 2012 Broadcom Corporation</div><div class='ctx'>  * Copyright (c) 2007, 2008 Red Hat, Inc.  All rights reserved.</div><div class='ctx'>  * Copyright (c) 2007, 2008 Mike Christie</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/scsi/bnx2i/bnx2i_init.c b/drivers/scsi/bnx2i/bnx2i_init.c<br/>index 4927cca733d3..8b6816706ee5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2i/bnx2i_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2i/bnx2i_init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2i/bnx2i_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/bnx2i_init.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* bnx2i.c: Broadcom NetXtreme II iSCSI driver.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2006 - 2011 Broadcom Corporation</div><div class='add'>+ * Copyright (c) 2006 - 2012 Broadcom Corporation</div><div class='ctx'>  * Copyright (c) 2007, 2008 Red Hat, Inc.  All rights reserved.</div><div class='ctx'>  * Copyright (c) 2007, 2008 Mike Christie</div><div class='ctx'>  *</div><div class='hunk'>@@ -18,8 +18,8 @@ static struct list_head adapter_list = LIST_HEAD_INIT(adapter_list);</div><div class='ctx'> static u32 adapter_count;</div><div class='ctx'> </div><div class='ctx'> #define DRV_MODULE_NAME		"bnx2i"</div><div class='del'>-#define DRV_MODULE_VERSION	"2.7.0.3"</div><div class='del'>-#define DRV_MODULE_RELDATE	"Jun 15, 2011"</div><div class='add'>+#define DRV_MODULE_VERSION	"2.7.2.2"</div><div class='add'>+#define DRV_MODULE_RELDATE	"Apr 25, 2012"</div><div class='ctx'> </div><div class='ctx'> static char version[] __devinitdata =</div><div class='ctx'> 		"Broadcom NetXtreme II iSCSI Driver " DRV_MODULE_NAME \</div><div class='head'>diff --git a/drivers/scsi/bnx2i/bnx2i_iscsi.c b/drivers/scsi/bnx2i/bnx2i_iscsi.c<br/>index 1a44b45e7bef..f8d516b53161 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2i/bnx2i_iscsi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2i/bnx2i_iscsi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2i/bnx2i_iscsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/bnx2i_iscsi.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * bnx2i_iscsi.c: Broadcom NetXtreme II iSCSI driver.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2006 - 2011 Broadcom Corporation</div><div class='add'>+ * Copyright (c) 2006 - 2012 Broadcom Corporation</div><div class='ctx'>  * Copyright (c) 2007, 2008 Red Hat, Inc.  All rights reserved.</div><div class='ctx'>  * Copyright (c) 2007, 2008 Mike Christie</div><div class='ctx'>  *</div><div class='hunk'>@@ -2244,6 +2244,7 @@ static struct scsi_host_template bnx2i_host_template = {</div><div class='ctx'> 	.eh_device_reset_handler = iscsi_eh_device_reset,</div><div class='ctx'> 	.eh_target_reset_handler = iscsi_eh_recover_target,</div><div class='ctx'> 	.change_queue_depth	= iscsi_change_queue_depth,</div><div class='add'>+	.target_alloc		= iscsi_target_alloc,</div><div class='ctx'> 	.can_queue		= 2048,</div><div class='ctx'> 	.max_sectors		= 127,</div><div class='ctx'> 	.cmd_per_lun		= 128,</div><div class='head'>diff --git a/drivers/scsi/bnx2i/bnx2i_sysfs.c b/drivers/scsi/bnx2i/bnx2i_sysfs.c<br/>index 83a77f7244d2..c61cf7a43658 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/bnx2i/bnx2i_sysfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/bnx2i/bnx2i_sysfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/bnx2i/bnx2i_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/bnx2i/bnx2i_sysfs.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* bnx2i_sysfs.c: Broadcom NetXtreme II iSCSI driver.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2004 - 2011 Broadcom Corporation</div><div class='add'>+ * Copyright (c) 2004 - 2012 Broadcom Corporation</div><div class='ctx'>  *</div><div class='ctx'>  * This program is free software; you can redistribute it and/or modify</div><div class='ctx'>  * it under the terms of the GNU General Public License as published by</div><div class='head'>diff --git a/drivers/scsi/device_handler/scsi_dh_alua.c b/drivers/scsi/device_handler/scsi_dh_alua.c<br/>index 04c5cea47a22..fda9cdea0e60 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/device_handler/scsi_dh_alua.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/device_handler/scsi_dh_alua.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/device_handler/scsi_dh_alua.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/device_handler/scsi_dh_alua.c</a></div><div class='hunk'>@@ -55,11 +55,16 @@</div><div class='ctx'> #define ALUA_FAILOVER_TIMEOUT		(60 * HZ)</div><div class='ctx'> #define ALUA_FAILOVER_RETRIES		5</div><div class='ctx'> </div><div class='add'>+/* flags passed from user level */</div><div class='add'>+#define ALUA_OPTIMIZE_STPG		1</div><div class='add'>+</div><div class='ctx'> struct alua_dh_data {</div><div class='ctx'> 	int			group_id;</div><div class='ctx'> 	int			rel_port;</div><div class='ctx'> 	int			tpgs;</div><div class='ctx'> 	int			state;</div><div class='add'>+	int			pref;</div><div class='add'>+	unsigned		flags; /* used for optimizing STPG */</div><div class='ctx'> 	unsigned char		inq[ALUA_INQUIRY_SIZE];</div><div class='ctx'> 	unsigned char		*buff;</div><div class='ctx'> 	int			bufflen;</div><div class='hunk'>@@ -554,14 +559,16 @@ static int alua_rtpg(struct scsi_device *sdev, struct alua_dh_data *h)</div><div class='ctx'> 	for (k = 4, ucp = h-&gt;buff + 4; k &lt; len; k += off, ucp += off) {</div><div class='ctx'> 		if (h-&gt;group_id == (ucp[2] &lt;&lt; 8) + ucp[3]) {</div><div class='ctx'> 			h-&gt;state = ucp[0] &amp; 0x0f;</div><div class='add'>+			h-&gt;pref = ucp[0] &gt;&gt; 7;</div><div class='ctx'> 			valid_states = ucp[1];</div><div class='ctx'> 		}</div><div class='ctx'> 		off = 8 + (ucp[7] * 4);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	sdev_printk(KERN_INFO, sdev,</div><div class='del'>-		    "%s: port group %02x state %c supports %c%c%c%c%c%c%c\n",</div><div class='add'>+		    "%s: port group %02x state %c %s supports %c%c%c%c%c%c%c\n",</div><div class='ctx'> 		    ALUA_DH_NAME, h-&gt;group_id, print_alua_state(h-&gt;state),</div><div class='add'>+		    h-&gt;pref ? "preferred" : "non-preferred",</div><div class='ctx'> 		    valid_states&amp;TPGS_SUPPORT_TRANSITION?'T':'t',</div><div class='ctx'> 		    valid_states&amp;TPGS_SUPPORT_OFFLINE?'O':'o',</div><div class='ctx'> 		    valid_states&amp;TPGS_SUPPORT_LBA_DEPENDENT?'L':'l',</div><div class='hunk'>@@ -621,6 +628,37 @@ static int alua_initialize(struct scsi_device *sdev, struct alua_dh_data *h)</div><div class='ctx'> out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='add'>+/*</div><div class='add'>+ * alua_set_params - set/unset the optimize flag</div><div class='add'>+ * @sdev: device on the path to be activated</div><div class='add'>+ * params - parameters in the following format</div><div class='add'>+ *      "no_of_params\0param1\0param2\0param3\0...\0"</div><div class='add'>+ * For example, to set the flag pass the following parameters</div><div class='add'>+ * from multipath.conf</div><div class='add'>+ *     hardware_handler        "2 alua 1"</div><div class='add'>+ */</div><div class='add'>+static int alua_set_params(struct scsi_device *sdev, const char *params)</div><div class='add'>+{</div><div class='add'>+	struct alua_dh_data *h = get_alua_data(sdev);</div><div class='add'>+	unsigned int optimize = 0, argc;</div><div class='add'>+	const char *p = params;</div><div class='add'>+	int result = SCSI_DH_OK;</div><div class='add'>+</div><div class='add'>+	if ((sscanf(params, "%u", &amp;argc) != 1) || (argc != 1))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	while (*p++)</div><div class='add'>+		;</div><div class='add'>+	if ((sscanf(p, "%u", &amp;optimize) != 1) || (optimize &gt; 1))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (optimize)</div><div class='add'>+		h-&gt;flags |= ALUA_OPTIMIZE_STPG;</div><div class='add'>+	else</div><div class='add'>+		h-&gt;flags &amp;= ~ALUA_OPTIMIZE_STPG;</div><div class='add'>+</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * alua_activate - activate a path</div><div class='hunk'>@@ -637,14 +675,37 @@ static int alua_activate(struct scsi_device *sdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct alua_dh_data *h = get_alua_data(sdev);</div><div class='ctx'> 	int err = SCSI_DH_OK;</div><div class='add'>+	int stpg = 0;</div><div class='ctx'> </div><div class='ctx'> 	err = alua_rtpg(sdev, h);</div><div class='ctx'> 	if (err != SCSI_DH_OK)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	if (h-&gt;tpgs &amp; TPGS_MODE_EXPLICIT &amp;&amp;</div><div class='del'>-	    h-&gt;state != TPGS_STATE_OPTIMIZED &amp;&amp;</div><div class='del'>-	    h-&gt;state != TPGS_STATE_LBA_DEPENDENT) {</div><div class='add'>+	if (h-&gt;tpgs &amp; TPGS_MODE_EXPLICIT) {</div><div class='add'>+		switch (h-&gt;state) {</div><div class='add'>+		case TPGS_STATE_NONOPTIMIZED:</div><div class='add'>+			stpg = 1;</div><div class='add'>+			if ((h-&gt;flags &amp; ALUA_OPTIMIZE_STPG) &amp;&amp;</div><div class='add'>+			    (!h-&gt;pref) &amp;&amp;</div><div class='add'>+			    (h-&gt;tpgs &amp; TPGS_MODE_IMPLICIT))</div><div class='add'>+				stpg = 0;</div><div class='add'>+			break;</div><div class='add'>+		case TPGS_STATE_STANDBY:</div><div class='add'>+			stpg = 1;</div><div class='add'>+			break;</div><div class='add'>+		case TPGS_STATE_UNAVAILABLE:</div><div class='add'>+		case TPGS_STATE_OFFLINE:</div><div class='add'>+			err = SCSI_DH_IO;</div><div class='add'>+			break;</div><div class='add'>+		case TPGS_STATE_TRANSITIONING:</div><div class='add'>+			err = SCSI_DH_RETRY;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stpg) {</div><div class='ctx'> 		h-&gt;callback_fn = fn;</div><div class='ctx'> 		h-&gt;callback_data = data;</div><div class='ctx'> 		err = submit_stpg(h);</div><div class='hunk'>@@ -698,6 +759,7 @@ static struct scsi_device_handler alua_dh = {</div><div class='ctx'> 	.prep_fn = alua_prep_fn,</div><div class='ctx'> 	.check_sense = alua_check_sense,</div><div class='ctx'> 	.activate = alua_activate,</div><div class='add'>+	.set_params = alua_set_params,</div><div class='ctx'> 	.match = alua_match,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/esp_scsi.c b/drivers/scsi/esp_scsi.c<br/>index 394ed9e79fd4..34552bf1c023 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/esp_scsi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/esp_scsi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/esp_scsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/esp_scsi.c</a></div><div class='hunk'>@@ -1000,7 +1000,7 @@ static int esp_check_spur_intr(struct esp *esp)</div><div class='ctx'> </div><div class='ctx'> static void esp_schedule_reset(struct esp *esp)</div><div class='ctx'> {</div><div class='del'>-	esp_log_reset("ESP: esp_schedule_reset() from %p\n",</div><div class='add'>+	esp_log_reset("ESP: esp_schedule_reset() from %pf\n",</div><div class='ctx'> 		      __builtin_return_address(0));</div><div class='ctx'> 	esp-&gt;flags |= ESP_FLAG_RESETTING;</div><div class='ctx'> 	esp_event(esp, ESP_EVENT_RESET);</div><div class='head'>diff --git a/drivers/scsi/fcoe/Makefile b/drivers/scsi/fcoe/Makefile<br/>index f6d37d0271f7..aed0f5db3668 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/fcoe/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/fcoe/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/fcoe/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fcoe/Makefile</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='ctx'> obj-$(CONFIG_FCOE) += fcoe.o</div><div class='ctx'> obj-$(CONFIG_LIBFCOE) += libfcoe.o</div><div class='ctx'> </div><div class='del'>-libfcoe-objs := fcoe_ctlr.o fcoe_transport.o</div><div class='add'>+libfcoe-objs := fcoe_ctlr.o fcoe_transport.o fcoe_sysfs.o</div><div class='head'>diff --git a/drivers/scsi/fcoe/fcoe.c b/drivers/scsi/fcoe/fcoe.c<br/>index 335e85192807..fe30b1b65e1d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/fcoe/fcoe.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/fcoe/fcoe.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/fcoe/fcoe.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fcoe/fcoe.c</a></div><div class='hunk'>@@ -41,6 +41,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;scsi/fc/fc_encaps.h&gt;</div><div class='ctx'> #include &lt;scsi/fc/fc_fip.h&gt;</div><div class='add'>+#include &lt;scsi/fc/fc_fcoe.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;scsi/libfc.h&gt;</div><div class='ctx'> #include &lt;scsi/fc_frame.h&gt;</div><div class='hunk'>@@ -150,6 +151,21 @@ static int fcoe_vport_create(struct fc_vport *, bool disabled);</div><div class='ctx'> static int fcoe_vport_disable(struct fc_vport *, bool disable);</div><div class='ctx'> static void fcoe_set_vport_symbolic_name(struct fc_vport *);</div><div class='ctx'> static void fcoe_set_port_id(struct fc_lport *, u32, struct fc_frame *);</div><div class='add'>+static void fcoe_ctlr_get_lesb(struct fcoe_ctlr_device *);</div><div class='add'>+static void fcoe_fcf_get_vlan_id(struct fcoe_fcf_device *);</div><div class='add'>+</div><div class='add'>+static struct fcoe_sysfs_function_template fcoe_sysfs_templ = {</div><div class='add'>+	.get_fcoe_ctlr_mode = fcoe_ctlr_get_fip_mode,</div><div class='add'>+	.get_fcoe_ctlr_link_fail = fcoe_ctlr_get_lesb,</div><div class='add'>+	.get_fcoe_ctlr_vlink_fail = fcoe_ctlr_get_lesb,</div><div class='add'>+	.get_fcoe_ctlr_miss_fka = fcoe_ctlr_get_lesb,</div><div class='add'>+	.get_fcoe_ctlr_symb_err = fcoe_ctlr_get_lesb,</div><div class='add'>+	.get_fcoe_ctlr_err_block = fcoe_ctlr_get_lesb,</div><div class='add'>+	.get_fcoe_ctlr_fcs_error = fcoe_ctlr_get_lesb,</div><div class='add'>+</div><div class='add'>+	.get_fcoe_fcf_selected = fcoe_fcf_get_selected,</div><div class='add'>+	.get_fcoe_fcf_vlan_id = fcoe_fcf_get_vlan_id,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static struct libfc_function_template fcoe_libfc_fcn_templ = {</div><div class='ctx'> 	.frame_send = fcoe_xmit,</div><div class='hunk'>@@ -282,7 +298,7 @@ static struct scsi_host_template fcoe_shost_template = {</div><div class='ctx'> static int fcoe_interface_setup(struct fcoe_interface *fcoe,</div><div class='ctx'> 				struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct fcoe_ctlr *fip = &amp;fcoe-&gt;ctlr;</div><div class='add'>+	struct fcoe_ctlr *fip = fcoe_to_ctlr(fcoe);</div><div class='ctx'> 	struct netdev_hw_addr *ha;</div><div class='ctx'> 	struct net_device *real_dev;</div><div class='ctx'> 	u8 flogi_maddr[ETH_ALEN];</div><div class='hunk'>@@ -366,7 +382,10 @@ static int fcoe_interface_setup(struct fcoe_interface *fcoe,</div><div class='ctx'> static struct fcoe_interface *fcoe_interface_create(struct net_device *netdev,</div><div class='ctx'> 						    enum fip_state fip_mode)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr_device *ctlr_dev;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_interface *fcoe;</div><div class='add'>+	int size;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!try_module_get(THIS_MODULE)) {</div><div class='hunk'>@@ -376,27 +395,32 @@ static struct fcoe_interface *fcoe_interface_create(struct net_device *netdev,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fcoe = kzalloc(sizeof(*fcoe), GFP_KERNEL);</div><div class='del'>-	if (!fcoe) {</div><div class='del'>-		FCOE_NETDEV_DBG(netdev, "Could not allocate fcoe structure\n");</div><div class='add'>+	size = sizeof(struct fcoe_ctlr) + sizeof(struct fcoe_interface);</div><div class='add'>+	ctlr_dev = fcoe_ctlr_device_add(&amp;netdev-&gt;dev, &amp;fcoe_sysfs_templ,</div><div class='add'>+					size);</div><div class='add'>+	if (!ctlr_dev) {</div><div class='add'>+		FCOE_DBG("Failed to add fcoe_ctlr_device\n");</div><div class='ctx'> 		fcoe = ERR_PTR(-ENOMEM);</div><div class='ctx'> 		goto out_putmod;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ctlr = fcoe_ctlr_device_priv(ctlr_dev);</div><div class='add'>+	fcoe = fcoe_ctlr_priv(ctlr);</div><div class='add'>+</div><div class='ctx'> 	dev_hold(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize FIP.</div><div class='ctx'> 	 */</div><div class='del'>-	fcoe_ctlr_init(&amp;fcoe-&gt;ctlr, fip_mode);</div><div class='del'>-	fcoe-&gt;ctlr.send = fcoe_fip_send;</div><div class='del'>-	fcoe-&gt;ctlr.update_mac = fcoe_update_src_mac;</div><div class='del'>-	fcoe-&gt;ctlr.get_src_addr = fcoe_get_src_mac;</div><div class='add'>+	fcoe_ctlr_init(ctlr, fip_mode);</div><div class='add'>+	ctlr-&gt;send = fcoe_fip_send;</div><div class='add'>+	ctlr-&gt;update_mac = fcoe_update_src_mac;</div><div class='add'>+	ctlr-&gt;get_src_addr = fcoe_get_src_mac;</div><div class='ctx'> </div><div class='ctx'> 	err = fcoe_interface_setup(fcoe, netdev);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		fcoe_ctlr_destroy(&amp;fcoe-&gt;ctlr);</div><div class='del'>-		kfree(fcoe);</div><div class='add'>+		fcoe_ctlr_destroy(ctlr);</div><div class='add'>+		fcoe_ctlr_device_delete(ctlr_dev);</div><div class='ctx'> 		dev_put(netdev);</div><div class='ctx'> 		fcoe = ERR_PTR(err);</div><div class='ctx'> 		goto out_putmod;</div><div class='hunk'>@@ -411,20 +435,18 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * fcoe_interface_cleanup() - Clean up a FCoE interface</div><div class='add'>+ * fcoe_interface_remove() - remove FCoE interface from netdev</div><div class='ctx'>  * @fcoe: The FCoE interface to be cleaned up</div><div class='ctx'>  *</div><div class='ctx'>  * Caller must be holding the RTNL mutex</div><div class='ctx'>  */</div><div class='del'>-static void fcoe_interface_cleanup(struct fcoe_interface *fcoe)</div><div class='add'>+static void fcoe_interface_remove(struct fcoe_interface *fcoe)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = fcoe-&gt;netdev;</div><div class='del'>-	struct fcoe_ctlr *fip = &amp;fcoe-&gt;ctlr;</div><div class='add'>+	struct fcoe_ctlr *fip = fcoe_to_ctlr(fcoe);</div><div class='ctx'> 	u8 flogi_maddr[ETH_ALEN];</div><div class='ctx'> 	const struct net_device_ops *ops;</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Don't listen for Ethernet packets anymore.</div><div class='ctx'> 	 * synchronize_net() ensures that the packet handlers are not running</div><div class='hunk'>@@ -453,13 +475,30 @@ static void fcoe_interface_cleanup(struct fcoe_interface *fcoe)</div><div class='ctx'> 			FCOE_NETDEV_DBG(netdev, "Failed to disable FCoE"</div><div class='ctx'> 					" specific feature for LLD.\n");</div><div class='ctx'> 	}</div><div class='add'>+	fcoe-&gt;removed = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fcoe_interface_cleanup() - Clean up a FCoE interface</div><div class='add'>+ * @fcoe: The FCoE interface to be cleaned up</div><div class='add'>+ */</div><div class='add'>+static void fcoe_interface_cleanup(struct fcoe_interface *fcoe)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = fcoe-&gt;netdev;</div><div class='add'>+	struct fcoe_ctlr *fip = fcoe_to_ctlr(fcoe);</div><div class='add'>+	struct fcoe_ctlr_device *ctlr_dev = fcoe_ctlr_to_ctlr_dev(fip);</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='add'>+	if (!fcoe-&gt;removed)</div><div class='add'>+		fcoe_interface_remove(fcoe);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	/* Release the self-reference taken during fcoe_interface_create() */</div><div class='ctx'> 	/* tear-down the FCoE controller */</div><div class='ctx'> 	fcoe_ctlr_destroy(fip);</div><div class='del'>-	kfree(fcoe);</div><div class='add'>+	scsi_host_put(fip-&gt;lp-&gt;host);</div><div class='add'>+	fcoe_ctlr_device_delete(ctlr_dev);</div><div class='ctx'> 	dev_put(netdev);</div><div class='ctx'> 	module_put(THIS_MODULE);</div><div class='ctx'> }</div><div class='hunk'>@@ -479,9 +518,11 @@ static int fcoe_fip_recv(struct sk_buff *skb, struct net_device *netdev,</div><div class='ctx'> 			 struct net_device *orig_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fcoe_interface *fcoe;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> </div><div class='ctx'> 	fcoe = container_of(ptype, struct fcoe_interface, fip_packet_type);</div><div class='del'>-	fcoe_ctlr_recv(&amp;fcoe-&gt;ctlr, skb);</div><div class='add'>+	ctlr = fcoe_to_ctlr(fcoe);</div><div class='add'>+	fcoe_ctlr_recv(ctlr, skb);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -522,13 +563,11 @@ static void fcoe_update_src_mac(struct fc_lport *lport, u8 *addr)</div><div class='ctx'> 	struct fcoe_port *port = lport_priv(lport);</div><div class='ctx'> 	struct fcoe_interface *fcoe = port-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='ctx'> 	if (!is_zero_ether_addr(port-&gt;data_src_addr))</div><div class='ctx'> 		dev_uc_del(fcoe-&gt;netdev, port-&gt;data_src_addr);</div><div class='ctx'> 	if (!is_zero_ether_addr(addr))</div><div class='ctx'> 		dev_uc_add(fcoe-&gt;netdev, addr);</div><div class='ctx'> 	memcpy(port-&gt;data_src_addr, addr, ETH_ALEN);</div><div class='del'>-	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -633,11 +672,13 @@ static int fcoe_netdev_config(struct fc_lport *lport, struct net_device *netdev)</div><div class='ctx'> 	u32 mfs;</div><div class='ctx'> 	u64 wwnn, wwpn;</div><div class='ctx'> 	struct fcoe_interface *fcoe;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_port *port;</div><div class='ctx'> </div><div class='ctx'> 	/* Setup lport private data to point to fcoe softc */</div><div class='ctx'> 	port = lport_priv(lport);</div><div class='ctx'> 	fcoe = port-&gt;priv;</div><div class='add'>+	ctlr = fcoe_to_ctlr(fcoe);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Determine max frame size based on underlying device and optional</div><div class='hunk'>@@ -664,10 +705,10 @@ static int fcoe_netdev_config(struct fc_lport *lport, struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	if (!lport-&gt;vport) {</div><div class='ctx'> 		if (fcoe_get_wwn(netdev, &amp;wwnn, NETDEV_FCOE_WWNN))</div><div class='del'>-			wwnn = fcoe_wwn_from_mac(fcoe-&gt;ctlr.ctl_src_addr, 1, 0);</div><div class='add'>+			wwnn = fcoe_wwn_from_mac(ctlr-&gt;ctl_src_addr, 1, 0);</div><div class='ctx'> 		fc_set_wwnn(lport, wwnn);</div><div class='ctx'> 		if (fcoe_get_wwn(netdev, &amp;wwpn, NETDEV_FCOE_WWPN))</div><div class='del'>-			wwpn = fcoe_wwn_from_mac(fcoe-&gt;ctlr.ctl_src_addr,</div><div class='add'>+			wwpn = fcoe_wwn_from_mac(ctlr-&gt;ctl_src_addr,</div><div class='ctx'> 						 2, 0);</div><div class='ctx'> 		fc_set_wwpn(lport, wwpn);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -941,6 +982,10 @@ static void fcoe_if_destroy(struct fc_lport *lport)</div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	if (!is_zero_ether_addr(port-&gt;data_src_addr))</div><div class='ctx'> 		dev_uc_del(netdev, port-&gt;data_src_addr);</div><div class='add'>+	if (lport-&gt;vport)</div><div class='add'>+		synchronize_net();</div><div class='add'>+	else</div><div class='add'>+		fcoe_interface_remove(fcoe);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	/* Free queued packets for the per-CPU receive threads */</div><div class='hunk'>@@ -959,8 +1004,12 @@ static void fcoe_if_destroy(struct fc_lport *lport)</div><div class='ctx'> 	/* Free memory used by statistical counters */</div><div class='ctx'> 	fc_lport_free_stats(lport);</div><div class='ctx'> </div><div class='del'>-	/* Release the Scsi_Host */</div><div class='del'>-	scsi_host_put(lport-&gt;host);</div><div class='add'>+	/*</div><div class='add'>+	 * Release the Scsi_Host for vport but hold on to</div><div class='add'>+	 * master lport until it fcoe interface fully cleaned-up.</div><div class='add'>+	 */</div><div class='add'>+	if (lport-&gt;vport)</div><div class='add'>+		scsi_host_put(lport-&gt;host);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1036,6 +1085,7 @@ static int fcoe_ddp_done(struct fc_lport *lport, u16 xid)</div><div class='ctx'> static struct fc_lport *fcoe_if_create(struct fcoe_interface *fcoe,</div><div class='ctx'> 				       struct device *parent, int npiv)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr *ctlr = fcoe_to_ctlr(fcoe);</div><div class='ctx'> 	struct net_device *netdev = fcoe-&gt;netdev;</div><div class='ctx'> 	struct fc_lport *lport, *n_port;</div><div class='ctx'> 	struct fcoe_port *port;</div><div class='hunk'>@@ -1099,7 +1149,7 @@ static struct fc_lport *fcoe_if_create(struct fcoe_interface *fcoe,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize the library */</div><div class='del'>-	rc = fcoe_libfc_config(lport, &amp;fcoe-&gt;ctlr, &amp;fcoe_libfc_fcn_templ, 1);</div><div class='add'>+	rc = fcoe_libfc_config(lport, ctlr, &amp;fcoe_libfc_fcn_templ, 1);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		FCOE_NETDEV_DBG(netdev, "Could not configure libfc for the "</div><div class='ctx'> 				"interface\n");</div><div class='hunk'>@@ -1366,6 +1416,7 @@ static int fcoe_rcv(struct sk_buff *skb, struct net_device *netdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct fc_lport *lport;</div><div class='ctx'> 	struct fcoe_rcv_info *fr;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_interface *fcoe;</div><div class='ctx'> 	struct fc_frame_header *fh;</div><div class='ctx'> 	struct fcoe_percpu_s *fps;</div><div class='hunk'>@@ -1373,7 +1424,8 @@ static int fcoe_rcv(struct sk_buff *skb, struct net_device *netdev,</div><div class='ctx'> 	unsigned int cpu;</div><div class='ctx'> </div><div class='ctx'> 	fcoe = container_of(ptype, struct fcoe_interface, fcoe_packet_type);</div><div class='del'>-	lport = fcoe-&gt;ctlr.lp;</div><div class='add'>+	ctlr = fcoe_to_ctlr(fcoe);</div><div class='add'>+	lport = ctlr-&gt;lp;</div><div class='ctx'> 	if (unlikely(!lport)) {</div><div class='ctx'> 		FCOE_NETDEV_DBG(netdev, "Cannot find hba structure");</div><div class='ctx'> 		goto err2;</div><div class='hunk'>@@ -1389,8 +1441,8 @@ static int fcoe_rcv(struct sk_buff *skb, struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> 	eh = eth_hdr(skb);</div><div class='ctx'> </div><div class='del'>-	if (is_fip_mode(&amp;fcoe-&gt;ctlr) &amp;&amp;</div><div class='del'>-	    compare_ether_addr(eh-&gt;h_source, fcoe-&gt;ctlr.dest_addr)) {</div><div class='add'>+	if (is_fip_mode(ctlr) &amp;&amp;</div><div class='add'>+	    compare_ether_addr(eh-&gt;h_source, ctlr-&gt;dest_addr)) {</div><div class='ctx'> 		FCOE_NETDEV_DBG(netdev, "wrong source mac address:%pM\n",</div><div class='ctx'> 				eh-&gt;h_source);</div><div class='ctx'> 		goto err;</div><div class='hunk'>@@ -1524,6 +1576,7 @@ static int fcoe_xmit(struct fc_lport *lport, struct fc_frame *fp)</div><div class='ctx'> 	unsigned int elen;		/* eth header, may include vlan */</div><div class='ctx'> 	struct fcoe_port *port = lport_priv(lport);</div><div class='ctx'> 	struct fcoe_interface *fcoe = port-&gt;priv;</div><div class='add'>+	struct fcoe_ctlr *ctlr = fcoe_to_ctlr(fcoe);</div><div class='ctx'> 	u8 sof, eof;</div><div class='ctx'> 	struct fcoe_hdr *hp;</div><div class='ctx'> </div><div class='hunk'>@@ -1539,7 +1592,7 @@ static int fcoe_xmit(struct fc_lport *lport, struct fc_frame *fp)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(fh-&gt;fh_type == FC_TYPE_ELS) &amp;&amp;</div><div class='del'>-	    fcoe_ctlr_els_send(&amp;fcoe-&gt;ctlr, lport, skb))</div><div class='add'>+	    fcoe_ctlr_els_send(ctlr, lport, skb))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	sof = fr_sof(fp);</div><div class='hunk'>@@ -1603,12 +1656,12 @@ static int fcoe_xmit(struct fc_lport *lport, struct fc_frame *fp)</div><div class='ctx'> 	/* fill up mac and fcoe headers */</div><div class='ctx'> 	eh = eth_hdr(skb);</div><div class='ctx'> 	eh-&gt;h_proto = htons(ETH_P_FCOE);</div><div class='del'>-	memcpy(eh-&gt;h_dest, fcoe-&gt;ctlr.dest_addr, ETH_ALEN);</div><div class='del'>-	if (fcoe-&gt;ctlr.map_dest)</div><div class='add'>+	memcpy(eh-&gt;h_dest, ctlr-&gt;dest_addr, ETH_ALEN);</div><div class='add'>+	if (ctlr-&gt;map_dest)</div><div class='ctx'> 		memcpy(eh-&gt;h_dest + 3, fh-&gt;fh_d_id, 3);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(fcoe-&gt;ctlr.flogi_oxid != FC_XID_UNKNOWN))</div><div class='del'>-		memcpy(eh-&gt;h_source, fcoe-&gt;ctlr.ctl_src_addr, ETH_ALEN);</div><div class='add'>+	if (unlikely(ctlr-&gt;flogi_oxid != FC_XID_UNKNOWN))</div><div class='add'>+		memcpy(eh-&gt;h_source, ctlr-&gt;ctl_src_addr, ETH_ALEN);</div><div class='ctx'> 	else</div><div class='ctx'> 		memcpy(eh-&gt;h_source, port-&gt;data_src_addr, ETH_ALEN);</div><div class='ctx'> </div><div class='hunk'>@@ -1657,6 +1710,7 @@ static void fcoe_percpu_flush_done(struct sk_buff *skb)</div><div class='ctx'> static inline int fcoe_filter_frames(struct fc_lport *lport,</div><div class='ctx'> 				     struct fc_frame *fp)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_interface *fcoe;</div><div class='ctx'> 	struct fc_frame_header *fh;</div><div class='ctx'> 	struct sk_buff *skb = (struct sk_buff *)fp;</div><div class='hunk'>@@ -1678,7 +1732,8 @@ static inline int fcoe_filter_frames(struct fc_lport *lport,</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	fcoe = ((struct fcoe_port *)lport_priv(lport))-&gt;priv;</div><div class='del'>-	if (is_fip_mode(&amp;fcoe-&gt;ctlr) &amp;&amp; fc_frame_payload_op(fp) == ELS_LOGO &amp;&amp;</div><div class='add'>+	ctlr = fcoe_to_ctlr(fcoe);</div><div class='add'>+	if (is_fip_mode(ctlr) &amp;&amp; fc_frame_payload_op(fp) == ELS_LOGO &amp;&amp;</div><div class='ctx'> 	    ntoh24(fh-&gt;fh_s_id) == FC_FID_FLOGI) {</div><div class='ctx'> 		FCOE_DBG("fcoe: dropping FCoE lport LOGO in fip mode\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1857,6 +1912,7 @@ static int fcoe_dcb_app_notification(struct notifier_block *notifier,</div><div class='ctx'> 				     ulong event, void *ptr)</div><div class='ctx'> {</div><div class='ctx'> 	struct dcb_app_type *entry = ptr;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_interface *fcoe;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct fcoe_port *port;</div><div class='hunk'>@@ -1874,6 +1930,8 @@ static int fcoe_dcb_app_notification(struct notifier_block *notifier,</div><div class='ctx'> 	if (!fcoe)</div><div class='ctx'> 		return NOTIFY_OK;</div><div class='ctx'> </div><div class='add'>+	ctlr = fcoe_to_ctlr(fcoe);</div><div class='add'>+</div><div class='ctx'> 	if (entry-&gt;dcbx &amp; DCB_CAP_DCBX_VER_CEE)</div><div class='ctx'> 		prio = ffs(entry-&gt;app.priority) - 1;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1884,10 +1942,10 @@ static int fcoe_dcb_app_notification(struct notifier_block *notifier,</div><div class='ctx'> </div><div class='ctx'> 	if (entry-&gt;app.protocol == ETH_P_FIP ||</div><div class='ctx'> 	    entry-&gt;app.protocol == ETH_P_FCOE)</div><div class='del'>-		fcoe-&gt;ctlr.priority = prio;</div><div class='add'>+		ctlr-&gt;priority = prio;</div><div class='ctx'> </div><div class='ctx'> 	if (entry-&gt;app.protocol == ETH_P_FCOE) {</div><div class='del'>-		port = lport_priv(fcoe-&gt;ctlr.lp);</div><div class='add'>+		port = lport_priv(ctlr-&gt;lp);</div><div class='ctx'> 		port-&gt;priority = prio;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1909,6 +1967,7 @@ static int fcoe_device_notification(struct notifier_block *notifier,</div><div class='ctx'> {</div><div class='ctx'> 	struct fc_lport *lport = NULL;</div><div class='ctx'> 	struct net_device *netdev = ptr;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_interface *fcoe;</div><div class='ctx'> 	struct fcoe_port *port;</div><div class='ctx'> 	struct fcoe_dev_stats *stats;</div><div class='hunk'>@@ -1918,7 +1977,8 @@ static int fcoe_device_notification(struct notifier_block *notifier,</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(fcoe, &amp;fcoe_hostlist, list) {</div><div class='ctx'> 		if (fcoe-&gt;netdev == netdev) {</div><div class='del'>-			lport = fcoe-&gt;ctlr.lp;</div><div class='add'>+			ctlr = fcoe_to_ctlr(fcoe);</div><div class='add'>+			lport = ctlr-&gt;lp;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1947,7 +2007,7 @@ static int fcoe_device_notification(struct notifier_block *notifier,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NETDEV_UNREGISTER:</div><div class='ctx'> 		list_del(&amp;fcoe-&gt;list);</div><div class='del'>-		port = lport_priv(fcoe-&gt;ctlr.lp);</div><div class='add'>+		port = lport_priv(ctlr-&gt;lp);</div><div class='ctx'> 		queue_work(fcoe_wq, &amp;port-&gt;destroy_work);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1962,8 +2022,8 @@ static int fcoe_device_notification(struct notifier_block *notifier,</div><div class='ctx'> 	fcoe_link_speed_update(lport);</div><div class='ctx'> </div><div class='ctx'> 	if (link_possible &amp;&amp; !fcoe_link_ok(lport))</div><div class='del'>-		fcoe_ctlr_link_up(&amp;fcoe-&gt;ctlr);</div><div class='del'>-	else if (fcoe_ctlr_link_down(&amp;fcoe-&gt;ctlr)) {</div><div class='add'>+		fcoe_ctlr_link_up(ctlr);</div><div class='add'>+	else if (fcoe_ctlr_link_down(ctlr)) {</div><div class='ctx'> 		stats = per_cpu_ptr(lport-&gt;dev_stats, get_cpu());</div><div class='ctx'> 		stats-&gt;LinkFailureCount++;</div><div class='ctx'> 		put_cpu();</div><div class='hunk'>@@ -1983,6 +2043,7 @@ out:</div><div class='ctx'>  */</div><div class='ctx'> static int fcoe_disable(struct net_device *netdev)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_interface *fcoe;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1993,8 +2054,9 @@ static int fcoe_disable(struct net_device *netdev)</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	if (fcoe) {</div><div class='del'>-		fcoe_ctlr_link_down(&amp;fcoe-&gt;ctlr);</div><div class='del'>-		fcoe_clean_pending_queue(fcoe-&gt;ctlr.lp);</div><div class='add'>+		ctlr = fcoe_to_ctlr(fcoe);</div><div class='add'>+		fcoe_ctlr_link_down(ctlr);</div><div class='add'>+		fcoe_clean_pending_queue(ctlr-&gt;lp);</div><div class='ctx'> 	} else</div><div class='ctx'> 		rc = -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -2012,6 +2074,7 @@ static int fcoe_disable(struct net_device *netdev)</div><div class='ctx'>  */</div><div class='ctx'> static int fcoe_enable(struct net_device *netdev)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_interface *fcoe;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2020,11 +2083,17 @@ static int fcoe_enable(struct net_device *netdev)</div><div class='ctx'> 	fcoe = fcoe_hostlist_lookup_port(netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='del'>-	if (!fcoe)</div><div class='add'>+	if (!fcoe) {</div><div class='ctx'> 		rc = -ENODEV;</div><div class='del'>-	else if (!fcoe_link_ok(fcoe-&gt;ctlr.lp))</div><div class='del'>-		fcoe_ctlr_link_up(&amp;fcoe-&gt;ctlr);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctlr = fcoe_to_ctlr(fcoe);</div><div class='add'>+</div><div class='add'>+	if (!fcoe_link_ok(ctlr-&gt;lp))</div><div class='add'>+		fcoe_ctlr_link_up(ctlr);</div><div class='ctx'> </div><div class='add'>+out:</div><div class='ctx'> 	mutex_unlock(&amp;fcoe_config_mutex);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='hunk'>@@ -2039,6 +2108,7 @@ static int fcoe_enable(struct net_device *netdev)</div><div class='ctx'>  */</div><div class='ctx'> static int fcoe_destroy(struct net_device *netdev)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_interface *fcoe;</div><div class='ctx'> 	struct fc_lport *lport;</div><div class='ctx'> 	struct fcoe_port *port;</div><div class='hunk'>@@ -2051,7 +2121,8 @@ static int fcoe_destroy(struct net_device *netdev)</div><div class='ctx'> 		rc = -ENODEV;</div><div class='ctx'> 		goto out_nodev;</div><div class='ctx'> 	}</div><div class='del'>-	lport = fcoe-&gt;ctlr.lp;</div><div class='add'>+	ctlr = fcoe_to_ctlr(fcoe);</div><div class='add'>+	lport = ctlr-&gt;lp;</div><div class='ctx'> 	port = lport_priv(lport);</div><div class='ctx'> 	list_del(&amp;fcoe-&gt;list);</div><div class='ctx'> 	queue_work(fcoe_wq, &amp;port-&gt;destroy_work);</div><div class='hunk'>@@ -2106,7 +2177,8 @@ static void fcoe_dcb_create(struct fcoe_interface *fcoe)</div><div class='ctx'> 	int dcbx;</div><div class='ctx'> 	u8 fup, up;</div><div class='ctx'> 	struct net_device *netdev = fcoe-&gt;realdev;</div><div class='del'>-	struct fcoe_port *port = lport_priv(fcoe-&gt;ctlr.lp);</div><div class='add'>+	struct fcoe_ctlr *ctlr = fcoe_to_ctlr(fcoe);</div><div class='add'>+	struct fcoe_port *port = lport_priv(ctlr-&gt;lp);</div><div class='ctx'> 	struct dcb_app app = {</div><div class='ctx'> 				.priority = 0,</div><div class='ctx'> 				.protocol = ETH_P_FCOE</div><div class='hunk'>@@ -2129,7 +2201,7 @@ static void fcoe_dcb_create(struct fcoe_interface *fcoe)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		port-&gt;priority = ffs(up) ? ffs(up) - 1 : 0;</div><div class='del'>-		fcoe-&gt;ctlr.priority = ffs(fup) ? ffs(fup) - 1 : port-&gt;priority;</div><div class='add'>+		ctlr-&gt;priority = ffs(fup) ? ffs(fup) - 1 : port-&gt;priority;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='hunk'>@@ -2146,6 +2218,8 @@ static void fcoe_dcb_create(struct fcoe_interface *fcoe)</div><div class='ctx'> static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = 0;</div><div class='add'>+	struct fcoe_ctlr_device *ctlr_dev;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_interface *fcoe;</div><div class='ctx'> 	struct fc_lport *lport;</div><div class='ctx'> </div><div class='hunk'>@@ -2164,7 +2238,9 @@ static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode)</div><div class='ctx'> 		goto out_nodev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lport = fcoe_if_create(fcoe, &amp;netdev-&gt;dev, 0);</div><div class='add'>+	ctlr = fcoe_to_ctlr(fcoe);</div><div class='add'>+	ctlr_dev = fcoe_ctlr_to_ctlr_dev(ctlr);</div><div class='add'>+	lport = fcoe_if_create(fcoe, &amp;ctlr_dev-&gt;dev, 0);</div><div class='ctx'> 	if (IS_ERR(lport)) {</div><div class='ctx'> 		printk(KERN_ERR "fcoe: Failed to create interface (%s)\n",</div><div class='ctx'> 		       netdev-&gt;name);</div><div class='hunk'>@@ -2175,7 +2251,7 @@ static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Make this the "master" N_Port */</div><div class='del'>-	fcoe-&gt;ctlr.lp = lport;</div><div class='add'>+	ctlr-&gt;lp = lport;</div><div class='ctx'> </div><div class='ctx'> 	/* setup DCB priority attributes. */</div><div class='ctx'> 	fcoe_dcb_create(fcoe);</div><div class='hunk'>@@ -2188,7 +2264,7 @@ static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode)</div><div class='ctx'> 	fc_fabric_login(lport);</div><div class='ctx'> 	if (!fcoe_link_ok(lport)) {</div><div class='ctx'> 		rtnl_unlock();</div><div class='del'>-		fcoe_ctlr_link_up(&amp;fcoe-&gt;ctlr);</div><div class='add'>+		fcoe_ctlr_link_up(ctlr);</div><div class='ctx'> 		mutex_unlock(&amp;fcoe_config_mutex);</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2274,10 +2350,9 @@ static void fcoe_percpu_clean(struct fc_lport *lport)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		skb = dev_alloc_skb(0);</div><div class='del'>-		if (!skb) {</div><div class='del'>-			spin_unlock_bh(&amp;pp-&gt;fcoe_rx_list.lock);</div><div class='add'>+		if (!skb)</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='add'>+</div><div class='ctx'> 		skb-&gt;destructor = fcoe_percpu_flush_done;</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_bh(&amp;pp-&gt;fcoe_rx_list.lock);</div><div class='hunk'>@@ -2301,11 +2376,12 @@ static int fcoe_reset(struct Scsi_Host *shost)</div><div class='ctx'> 	struct fc_lport *lport = shost_priv(shost);</div><div class='ctx'> 	struct fcoe_port *port = lport_priv(lport);</div><div class='ctx'> 	struct fcoe_interface *fcoe = port-&gt;priv;</div><div class='add'>+	struct fcoe_ctlr *ctlr = fcoe_to_ctlr(fcoe);</div><div class='ctx'> </div><div class='del'>-	fcoe_ctlr_link_down(&amp;fcoe-&gt;ctlr);</div><div class='del'>-	fcoe_clean_pending_queue(fcoe-&gt;ctlr.lp);</div><div class='del'>-	if (!fcoe_link_ok(fcoe-&gt;ctlr.lp))</div><div class='del'>-		fcoe_ctlr_link_up(&amp;fcoe-&gt;ctlr);</div><div class='add'>+	fcoe_ctlr_link_down(ctlr);</div><div class='add'>+	fcoe_clean_pending_queue(ctlr-&gt;lp);</div><div class='add'>+	if (!fcoe_link_ok(ctlr-&gt;lp))</div><div class='add'>+		fcoe_ctlr_link_up(ctlr);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2340,10 +2416,12 @@ fcoe_hostlist_lookup_port(const struct net_device *netdev)</div><div class='ctx'>  */</div><div class='ctx'> static struct fc_lport *fcoe_hostlist_lookup(const struct net_device *netdev)</div><div class='ctx'> {</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_interface *fcoe;</div><div class='ctx'> </div><div class='ctx'> 	fcoe = fcoe_hostlist_lookup_port(netdev);</div><div class='del'>-	return (fcoe) ? fcoe-&gt;ctlr.lp : NULL;</div><div class='add'>+	ctlr = fcoe_to_ctlr(fcoe);</div><div class='add'>+	return (fcoe) ? ctlr-&gt;lp : NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2447,6 +2525,7 @@ module_init(fcoe_init);</div><div class='ctx'> static void __exit fcoe_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct fcoe_interface *fcoe, *tmp;</div><div class='add'>+	struct fcoe_ctlr *ctlr;</div><div class='ctx'> 	struct fcoe_port *port;</div><div class='ctx'> 	unsigned int cpu;</div><div class='ctx'> </div><div class='hunk'>@@ -2458,7 +2537,8 @@ static void __exit fcoe_exit(void)</div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	list_for_each_entry_safe(fcoe, tmp, &amp;fcoe_hostlist, list) {</div><div class='ctx'> 		list_del(&amp;fcoe-&gt;list);</div><div class='del'>-		port = lport_priv(fcoe-&gt;ctlr.lp);</div><div class='add'>+		ctlr = fcoe_to_ctlr(fcoe);</div><div class='add'>+		port = lport_priv(ctlr-&gt;lp);</div><div class='ctx'> 		queue_work(fcoe_wq, &amp;port-&gt;destroy_work);</div><div class='ctx'> 	}</div><div class='ctx'> 	rtnl_unlock();</div><div class='hunk'>@@ -2554,7 +2634,7 @@ static struct fc_seq *fcoe_elsct_send(struct fc_lport *lport, u32 did,</div><div class='ctx'> {</div><div class='ctx'> 	struct fcoe_port *port = lport_priv(lport);</div><div class='ctx'> 	struct fcoe_interface *fcoe = port-&gt;priv;</div><div class='del'>-	struct fcoe_ctlr *fip = &amp;fcoe-&gt;ctlr;</div><div class='add'>+	struct fcoe_ctlr *fip = fcoe_to_ctlr(fcoe);</div><div class='ctx'> 	struct fc_frame_header *fh = fc_frame_header_get(fp);</div><div class='ctx'> </div><div class='ctx'> 	switch (op) {</div><div class='hunk'>@@ -2711,6 +2791,40 @@ static void fcoe_get_lesb(struct fc_lport *lport,</div><div class='ctx'> 	__fcoe_get_lesb(lport, fc_lesb, netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void fcoe_ctlr_get_lesb(struct fcoe_ctlr_device *ctlr_dev)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr *fip = fcoe_ctlr_device_priv(ctlr_dev);</div><div class='add'>+	struct net_device *netdev = fcoe_netdev(fip-&gt;lp);</div><div class='add'>+	struct fcoe_fc_els_lesb *fcoe_lesb;</div><div class='add'>+	struct fc_els_lesb fc_lesb;</div><div class='add'>+</div><div class='add'>+	__fcoe_get_lesb(fip-&gt;lp, &amp;fc_lesb, netdev);</div><div class='add'>+	fcoe_lesb = (struct fcoe_fc_els_lesb *)(&amp;fc_lesb);</div><div class='add'>+</div><div class='add'>+	ctlr_dev-&gt;lesb.lesb_link_fail =</div><div class='add'>+		ntohl(fcoe_lesb-&gt;lesb_link_fail);</div><div class='add'>+	ctlr_dev-&gt;lesb.lesb_vlink_fail =</div><div class='add'>+		ntohl(fcoe_lesb-&gt;lesb_vlink_fail);</div><div class='add'>+	ctlr_dev-&gt;lesb.lesb_miss_fka =</div><div class='add'>+		ntohl(fcoe_lesb-&gt;lesb_miss_fka);</div><div class='add'>+	ctlr_dev-&gt;lesb.lesb_symb_err =</div><div class='add'>+		ntohl(fcoe_lesb-&gt;lesb_symb_err);</div><div class='add'>+	ctlr_dev-&gt;lesb.lesb_err_block =</div><div class='add'>+		ntohl(fcoe_lesb-&gt;lesb_err_block);</div><div class='add'>+	ctlr_dev-&gt;lesb.lesb_fcs_error =</div><div class='add'>+		ntohl(fcoe_lesb-&gt;lesb_fcs_error);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fcoe_fcf_get_vlan_id(struct fcoe_fcf_device *fcf_dev)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr_device *ctlr_dev =</div><div class='add'>+		fcoe_fcf_dev_to_ctlr_dev(fcf_dev);</div><div class='add'>+	struct fcoe_ctlr *ctlr = fcoe_ctlr_device_priv(ctlr_dev);</div><div class='add'>+	struct fcoe_interface *fcoe = fcoe_ctlr_priv(ctlr);</div><div class='add'>+</div><div class='add'>+	fcf_dev-&gt;vlan_id = vlan_dev_vlan_id(fcoe-&gt;netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * fcoe_set_port_id() - Callback from libfc when Port_ID is set.</div><div class='ctx'>  * @lport: the local port</div><div class='hunk'>@@ -2728,7 +2842,8 @@ static void fcoe_set_port_id(struct fc_lport *lport,</div><div class='ctx'> {</div><div class='ctx'> 	struct fcoe_port *port = lport_priv(lport);</div><div class='ctx'> 	struct fcoe_interface *fcoe = port-&gt;priv;</div><div class='add'>+	struct fcoe_ctlr *ctlr = fcoe_to_ctlr(fcoe);</div><div class='ctx'> </div><div class='ctx'> 	if (fp &amp;&amp; fc_frame_payload_op(fp) == ELS_FLOGI)</div><div class='del'>-		fcoe_ctlr_recv_flogi(&amp;fcoe-&gt;ctlr, lport, fp);</div><div class='add'>+		fcoe_ctlr_recv_flogi(ctlr, lport, fp);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/scsi/fcoe/fcoe.h b/drivers/scsi/fcoe/fcoe.h<br/>index 3c2733a12aa1..a624add4f8ec 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/fcoe/fcoe.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/fcoe/fcoe.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/fcoe/fcoe.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fcoe/fcoe.h</a></div><div class='hunk'>@@ -68,10 +68,10 @@ do {                                                            	\</div><div class='ctx'>  * @netdev:	      The associated net device</div><div class='ctx'>  * @fcoe_packet_type: FCoE packet type</div><div class='ctx'>  * @fip_packet_type:  FIP packet type</div><div class='del'>- * @ctlr:	      The FCoE controller (for FIP)</div><div class='ctx'>  * @oem:	      The offload exchange manager for all local port</div><div class='ctx'>  *		      instances associated with this port</div><div class='del'>- * This structure is 1:1 with a net devive.</div><div class='add'>+ * @removed:	      Indicates fcoe interface removed from net device</div><div class='add'>+ * This structure is 1:1 with a net device.</div><div class='ctx'>  */</div><div class='ctx'> struct fcoe_interface {</div><div class='ctx'> 	struct list_head   list;</div><div class='hunk'>@@ -79,11 +79,15 @@ struct fcoe_interface {</div><div class='ctx'> 	struct net_device  *realdev;</div><div class='ctx'> 	struct packet_type fcoe_packet_type;</div><div class='ctx'> 	struct packet_type fip_packet_type;</div><div class='del'>-	struct fcoe_ctlr   ctlr;</div><div class='ctx'> 	struct fc_exch_mgr *oem;</div><div class='add'>+	u8	removed;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define fcoe_from_ctlr(fip) container_of(fip, struct fcoe_interface, ctlr)</div><div class='add'>+#define fcoe_to_ctlr(x)						\</div><div class='add'>+	(struct fcoe_ctlr *)(((struct fcoe_ctlr *)(x)) - 1)</div><div class='add'>+</div><div class='add'>+#define fcoe_from_ctlr(x)			\</div><div class='add'>+	((struct fcoe_interface *)((x) + 1))</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * fcoe_netdev() - Return the net device associated with a local port</div><div class='head'>diff --git a/drivers/scsi/fcoe/fcoe_ctlr.c b/drivers/scsi/fcoe/fcoe_ctlr.c<br/>index 249a106888d9..d68d57241ee6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/fcoe/fcoe_ctlr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/fcoe/fcoe_ctlr.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/fcoe/fcoe_ctlr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fcoe/fcoe_ctlr.c</a></div><div class='hunk'>@@ -160,6 +160,76 @@ void fcoe_ctlr_init(struct fcoe_ctlr *fip, enum fip_state mode)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(fcoe_ctlr_init);</div><div class='ctx'> </div><div class='add'>+static int fcoe_sysfs_fcf_add(struct fcoe_fcf *new)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr *fip = new-&gt;fip;</div><div class='add'>+	struct fcoe_ctlr_device *ctlr_dev = fcoe_ctlr_to_ctlr_dev(fip);</div><div class='add'>+	struct fcoe_fcf_device temp, *fcf_dev;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	LIBFCOE_FIP_DBG(fip, "New FCF fab %16.16llx mac %pM\n",</div><div class='add'>+			new-&gt;fabric_name, new-&gt;fcf_mac);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ctlr_dev-&gt;lock);</div><div class='add'>+</div><div class='add'>+	temp.fabric_name = new-&gt;fabric_name;</div><div class='add'>+	temp.switch_name = new-&gt;switch_name;</div><div class='add'>+	temp.fc_map = new-&gt;fc_map;</div><div class='add'>+	temp.vfid = new-&gt;vfid;</div><div class='add'>+	memcpy(temp.mac, new-&gt;fcf_mac, ETH_ALEN);</div><div class='add'>+	temp.priority = new-&gt;pri;</div><div class='add'>+	temp.fka_period = new-&gt;fka_period;</div><div class='add'>+	temp.selected = 0; /* default to unselected */</div><div class='add'>+</div><div class='add'>+	fcf_dev = fcoe_fcf_device_add(ctlr_dev, &amp;temp);</div><div class='add'>+	if (unlikely(!fcf_dev)) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The fcoe_sysfs layer can return a CONNECTED fcf that</div><div class='add'>+	 * has a priv (fcf was never deleted) or a CONNECTED fcf</div><div class='add'>+	 * that doesn't have a priv (fcf was deleted). However,</div><div class='add'>+	 * libfcoe will always delete FCFs before trying to add</div><div class='add'>+	 * them. This is ensured because both recv_adv and</div><div class='add'>+	 * age_fcfs are protected by the the fcoe_ctlr's mutex.</div><div class='add'>+	 * This means that we should never get a FCF with a</div><div class='add'>+	 * non-NULL priv pointer.</div><div class='add'>+	 */</div><div class='add'>+	BUG_ON(fcf_dev-&gt;priv);</div><div class='add'>+</div><div class='add'>+	fcf_dev-&gt;priv = new;</div><div class='add'>+	new-&gt;fcf_dev = fcf_dev;</div><div class='add'>+</div><div class='add'>+	list_add(&amp;new-&gt;list, &amp;fip-&gt;fcfs);</div><div class='add'>+	fip-&gt;fcf_count++;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;ctlr_dev-&gt;lock);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fcoe_sysfs_fcf_del(struct fcoe_fcf *new)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr *fip = new-&gt;fip;</div><div class='add'>+	struct fcoe_ctlr_device *ctlr_dev = fcoe_ctlr_to_ctlr_dev(fip);</div><div class='add'>+	struct fcoe_fcf_device *fcf_dev;</div><div class='add'>+</div><div class='add'>+	list_del(&amp;new-&gt;list);</div><div class='add'>+	fip-&gt;fcf_count--;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ctlr_dev-&gt;lock);</div><div class='add'>+</div><div class='add'>+	fcf_dev = fcoe_fcf_to_fcf_dev(new);</div><div class='add'>+	WARN_ON(!fcf_dev);</div><div class='add'>+	new-&gt;fcf_dev = NULL;</div><div class='add'>+	fcoe_fcf_device_delete(fcf_dev);</div><div class='add'>+	kfree(new);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ctlr_dev-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * fcoe_ctlr_reset_fcfs() - Reset and free all FCFs for a controller</div><div class='ctx'>  * @fip: The FCoE controller whose FCFs are to be reset</div><div class='hunk'>@@ -173,10 +243,10 @@ static void fcoe_ctlr_reset_fcfs(struct fcoe_ctlr *fip)</div><div class='ctx'> </div><div class='ctx'> 	fip-&gt;sel_fcf = NULL;</div><div class='ctx'> 	list_for_each_entry_safe(fcf, next, &amp;fip-&gt;fcfs, list) {</div><div class='del'>-		list_del(&amp;fcf-&gt;list);</div><div class='del'>-		kfree(fcf);</div><div class='add'>+		fcoe_sysfs_fcf_del(fcf);</div><div class='ctx'> 	}</div><div class='del'>-	fip-&gt;fcf_count = 0;</div><div class='add'>+	WARN_ON(fip-&gt;fcf_count);</div><div class='add'>+</div><div class='ctx'> 	fip-&gt;sel_time = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -717,8 +787,11 @@ static unsigned long fcoe_ctlr_age_fcfs(struct fcoe_ctlr *fip)</div><div class='ctx'> 	unsigned long next_timer = jiffies + msecs_to_jiffies(FIP_VN_KA_PERIOD);</div><div class='ctx'> 	unsigned long deadline;</div><div class='ctx'> 	unsigned long sel_time = 0;</div><div class='add'>+	struct list_head del_list;</div><div class='ctx'> 	struct fcoe_dev_stats *stats;</div><div class='ctx'> </div><div class='add'>+	INIT_LIST_HEAD(&amp;del_list);</div><div class='add'>+</div><div class='ctx'> 	stats = per_cpu_ptr(fip-&gt;lp-&gt;dev_stats, get_cpu());</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry_safe(fcf, next, &amp;fip-&gt;fcfs, list) {</div><div class='hunk'>@@ -739,10 +812,13 @@ static unsigned long fcoe_ctlr_age_fcfs(struct fcoe_ctlr *fip)</div><div class='ctx'> 		if (time_after_eq(jiffies, deadline)) {</div><div class='ctx'> 			if (fip-&gt;sel_fcf == fcf)</div><div class='ctx'> 				fip-&gt;sel_fcf = NULL;</div><div class='add'>+			/*</div><div class='add'>+			 * Move to delete list so we can call</div><div class='add'>+			 * fcoe_sysfs_fcf_del (which can sleep)</div><div class='add'>+			 * after the put_cpu().</div><div class='add'>+			 */</div><div class='ctx'> 			list_del(&amp;fcf-&gt;list);</div><div class='del'>-			WARN_ON(!fip-&gt;fcf_count);</div><div class='del'>-			fip-&gt;fcf_count--;</div><div class='del'>-			kfree(fcf);</div><div class='add'>+			list_add(&amp;fcf-&gt;list, &amp;del_list);</div><div class='ctx'> 			stats-&gt;VLinkFailureCount++;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (time_after(next_timer, deadline))</div><div class='hunk'>@@ -753,6 +829,12 @@ static unsigned long fcoe_ctlr_age_fcfs(struct fcoe_ctlr *fip)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	put_cpu();</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(fcf, next, &amp;del_list, list) {</div><div class='add'>+		/* Removes fcf from current list */</div><div class='add'>+		fcoe_sysfs_fcf_del(fcf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (sel_time &amp;&amp; !fip-&gt;sel_fcf &amp;&amp; !fip-&gt;sel_time) {</div><div class='ctx'> 		sel_time += msecs_to_jiffies(FCOE_CTLR_START_DELAY);</div><div class='ctx'> 		fip-&gt;sel_time = sel_time;</div><div class='hunk'>@@ -903,23 +985,23 @@ static void fcoe_ctlr_recv_adv(struct fcoe_ctlr *fip, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct fcoe_fcf *fcf;</div><div class='ctx'> 	struct fcoe_fcf new;</div><div class='del'>-	struct fcoe_fcf *found;</div><div class='ctx'> 	unsigned long sol_tov = msecs_to_jiffies(FCOE_CTRL_SOL_TOV);</div><div class='ctx'> 	int first = 0;</div><div class='ctx'> 	int mtu_valid;</div><div class='add'>+	int found = 0;</div><div class='add'>+	int rc = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (fcoe_ctlr_parse_adv(fip, skb, &amp;new))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;fip-&gt;ctlr_mutex);</div><div class='ctx'> 	first = list_empty(&amp;fip-&gt;fcfs);</div><div class='del'>-	found = NULL;</div><div class='ctx'> 	list_for_each_entry(fcf, &amp;fip-&gt;fcfs, list) {</div><div class='ctx'> 		if (fcf-&gt;switch_name == new.switch_name &amp;&amp;</div><div class='ctx'> 		    fcf-&gt;fabric_name == new.fabric_name &amp;&amp;</div><div class='ctx'> 		    fcf-&gt;fc_map == new.fc_map &amp;&amp;</div><div class='ctx'> 		    compare_ether_addr(fcf-&gt;fcf_mac, new.fcf_mac) == 0) {</div><div class='del'>-			found = fcf;</div><div class='add'>+			found = 1;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -931,9 +1013,16 @@ static void fcoe_ctlr_recv_adv(struct fcoe_ctlr *fip, struct sk_buff *skb)</div><div class='ctx'> 		if (!fcf)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='del'>-		fip-&gt;fcf_count++;</div><div class='ctx'> 		memcpy(fcf, &amp;new, sizeof(new));</div><div class='del'>-		list_add(&amp;fcf-&gt;list, &amp;fip-&gt;fcfs);</div><div class='add'>+		fcf-&gt;fip = fip;</div><div class='add'>+		rc = fcoe_sysfs_fcf_add(fcf);</div><div class='add'>+		if (rc) {</div><div class='add'>+			printk(KERN_ERR "Failed to allocate sysfs instance "</div><div class='add'>+			       "for FCF, fab %16.16llx mac %pM\n",</div><div class='add'>+			       new.fabric_name, new.fcf_mac);</div><div class='add'>+			kfree(fcf);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Update the FCF's keep-alive descriptor flags.</div><div class='hunk'>@@ -954,6 +1043,7 @@ static void fcoe_ctlr_recv_adv(struct fcoe_ctlr *fip, struct sk_buff *skb)</div><div class='ctx'> 		fcf-&gt;fka_period = new.fka_period;</div><div class='ctx'> 		memcpy(fcf-&gt;fcf_mac, new.fcf_mac, ETH_ALEN);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	mtu_valid = fcoe_ctlr_mtu_valid(fcf);</div><div class='ctx'> 	fcf-&gt;time = jiffies;</div><div class='ctx'> 	if (!found)</div><div class='hunk'>@@ -996,6 +1086,7 @@ static void fcoe_ctlr_recv_adv(struct fcoe_ctlr *fip, struct sk_buff *skb)</div><div class='ctx'> 		    time_before(fip-&gt;sel_time, fip-&gt;timer.expires))</div><div class='ctx'> 			mod_timer(&amp;fip-&gt;timer, fip-&gt;sel_time);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;fip-&gt;ctlr_mutex);</div><div class='ctx'> }</div><div class='hunk'>@@ -1883,7 +1974,13 @@ static void fcoe_ctlr_vn_send(struct fcoe_ctlr *fip,</div><div class='ctx'> 	frame = (struct fip_frame *)skb-&gt;data;</div><div class='ctx'> 	memset(frame, 0, len);</div><div class='ctx'> 	memcpy(frame-&gt;eth.h_dest, dest, ETH_ALEN);</div><div class='del'>-	memcpy(frame-&gt;eth.h_source, fip-&gt;ctl_src_addr, ETH_ALEN);</div><div class='add'>+</div><div class='add'>+	if (sub == FIP_SC_VN_BEACON) {</div><div class='add'>+		hton24(frame-&gt;eth.h_source, FIP_VN_FC_MAP);</div><div class='add'>+		hton24(frame-&gt;eth.h_source + 3, fip-&gt;port_id);</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(frame-&gt;eth.h_source, fip-&gt;ctl_src_addr, ETH_ALEN);</div><div class='add'>+	}</div><div class='ctx'> 	frame-&gt;eth.h_proto = htons(ETH_P_FIP);</div><div class='ctx'> </div><div class='ctx'> 	frame-&gt;fip.fip_ver = FIP_VER_ENCAPS(FIP_VER);</div><div class='hunk'>@@ -2712,9 +2809,9 @@ unlock:</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * fcoe_libfc_config() - Sets up libfc related properties for local port</div><div class='del'>- * @lp: The local port to configure libfc for</div><div class='del'>- * @fip: The FCoE controller in use by the local port</div><div class='del'>- * @tt: The libfc function template</div><div class='add'>+ * @lport:    The local port to configure libfc for</div><div class='add'>+ * @fip:      The FCoE controller in use by the local port</div><div class='add'>+ * @tt:       The libfc function template</div><div class='ctx'>  * @init_fcp: If non-zero, the FCP portion of libfc should be initialized</div><div class='ctx'>  *</div><div class='ctx'>  * Returns : 0 for success</div><div class='hunk'>@@ -2747,3 +2844,43 @@ int fcoe_libfc_config(struct fc_lport *lport, struct fcoe_ctlr *fip,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(fcoe_libfc_config);</div><div class='add'>+</div><div class='add'>+void fcoe_fcf_get_selected(struct fcoe_fcf_device *fcf_dev)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr_device *ctlr_dev = fcoe_fcf_dev_to_ctlr_dev(fcf_dev);</div><div class='add'>+	struct fcoe_ctlr *fip = fcoe_ctlr_device_priv(ctlr_dev);</div><div class='add'>+	struct fcoe_fcf *fcf;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;fip-&gt;ctlr_mutex);</div><div class='add'>+	mutex_lock(&amp;ctlr_dev-&gt;lock);</div><div class='add'>+</div><div class='add'>+	fcf = fcoe_fcf_device_priv(fcf_dev);</div><div class='add'>+	if (fcf)</div><div class='add'>+		fcf_dev-&gt;selected = (fcf == fip-&gt;sel_fcf) ? 1 : 0;</div><div class='add'>+	else</div><div class='add'>+		fcf_dev-&gt;selected = 0;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ctlr_dev-&gt;lock);</div><div class='add'>+	mutex_unlock(&amp;fip-&gt;ctlr_mutex);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(fcoe_fcf_get_selected);</div><div class='add'>+</div><div class='add'>+void fcoe_ctlr_get_fip_mode(struct fcoe_ctlr_device *ctlr_dev)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr *ctlr = fcoe_ctlr_device_priv(ctlr_dev);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ctlr-&gt;ctlr_mutex);</div><div class='add'>+	switch (ctlr-&gt;mode) {</div><div class='add'>+	case FIP_MODE_FABRIC:</div><div class='add'>+		ctlr_dev-&gt;mode = FIP_CONN_TYPE_FABRIC;</div><div class='add'>+		break;</div><div class='add'>+	case FIP_MODE_VN2VN:</div><div class='add'>+		ctlr_dev-&gt;mode = FIP_CONN_TYPE_VN2VN;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ctlr_dev-&gt;mode = FIP_CONN_TYPE_UNKNOWN;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;ctlr-&gt;ctlr_mutex);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(fcoe_ctlr_get_fip_mode);</div><div class='head'>diff --git a/drivers/scsi/fcoe/fcoe_sysfs.c b/drivers/scsi/fcoe/fcoe_sysfs.c<br/>new file mode 100644<br/>index 000000000000..2bc163198d33<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/fcoe/fcoe_sysfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fcoe/fcoe_sysfs.c</a></div><div class='hunk'>@@ -0,0 +1,832 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright(c) 2011 - 2012 Intel Corporation. All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms and conditions of the GNU General Public License,</div><div class='add'>+ * version 2, as published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='add'>+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='add'>+ * more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along with</div><div class='add'>+ * this program; if not, write to the Free Software Foundation, Inc.,</div><div class='add'>+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='add'>+ *</div><div class='add'>+ * Maintained at www.Open-FCoE.org</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;scsi/fcoe_sysfs.h&gt;</div><div class='add'>+</div><div class='add'>+static atomic_t ctlr_num;</div><div class='add'>+static atomic_t fcf_num;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * fcoe_fcf_dev_loss_tmo: the default number of seconds that fcoe sysfs</div><div class='add'>+ * should insulate the loss of a fcf.</div><div class='add'>+ */</div><div class='add'>+static unsigned int fcoe_fcf_dev_loss_tmo = 1800;  /* seconds */</div><div class='add'>+</div><div class='add'>+module_param_named(fcf_dev_loss_tmo, fcoe_fcf_dev_loss_tmo,</div><div class='add'>+		   uint, S_IRUGO|S_IWUSR);</div><div class='add'>+MODULE_PARM_DESC(fcf_dev_loss_tmo,</div><div class='add'>+		 "Maximum number of seconds that libfcoe should"</div><div class='add'>+		 " insulate the loss of a fcf. Once this value is"</div><div class='add'>+		 " exceeded, the fcf is removed.");</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * These are used by the fcoe_*_show_function routines, they</div><div class='add'>+ * are intentionally placed in the .c file as they're not intended</div><div class='add'>+ * for use throughout the code.</div><div class='add'>+ */</div><div class='add'>+#define fcoe_ctlr_id(x)				\</div><div class='add'>+	((x)-&gt;id)</div><div class='add'>+#define fcoe_ctlr_work_q_name(x)		\</div><div class='add'>+	((x)-&gt;work_q_name)</div><div class='add'>+#define fcoe_ctlr_work_q(x)			\</div><div class='add'>+	((x)-&gt;work_q)</div><div class='add'>+#define fcoe_ctlr_devloss_work_q_name(x)	\</div><div class='add'>+	((x)-&gt;devloss_work_q_name)</div><div class='add'>+#define fcoe_ctlr_devloss_work_q(x)		\</div><div class='add'>+	((x)-&gt;devloss_work_q)</div><div class='add'>+#define fcoe_ctlr_mode(x)			\</div><div class='add'>+	((x)-&gt;mode)</div><div class='add'>+#define fcoe_ctlr_fcf_dev_loss_tmo(x)		\</div><div class='add'>+	((x)-&gt;fcf_dev_loss_tmo)</div><div class='add'>+#define fcoe_ctlr_link_fail(x)			\</div><div class='add'>+	((x)-&gt;lesb.lesb_link_fail)</div><div class='add'>+#define fcoe_ctlr_vlink_fail(x)			\</div><div class='add'>+	((x)-&gt;lesb.lesb_vlink_fail)</div><div class='add'>+#define fcoe_ctlr_miss_fka(x)			\</div><div class='add'>+	((x)-&gt;lesb.lesb_miss_fka)</div><div class='add'>+#define fcoe_ctlr_symb_err(x)			\</div><div class='add'>+	((x)-&gt;lesb.lesb_symb_err)</div><div class='add'>+#define fcoe_ctlr_err_block(x)			\</div><div class='add'>+	((x)-&gt;lesb.lesb_err_block)</div><div class='add'>+#define fcoe_ctlr_fcs_error(x)			\</div><div class='add'>+	((x)-&gt;lesb.lesb_fcs_error)</div><div class='add'>+#define fcoe_fcf_state(x)			\</div><div class='add'>+	((x)-&gt;state)</div><div class='add'>+#define fcoe_fcf_fabric_name(x)			\</div><div class='add'>+	((x)-&gt;fabric_name)</div><div class='add'>+#define fcoe_fcf_switch_name(x)			\</div><div class='add'>+	((x)-&gt;switch_name)</div><div class='add'>+#define fcoe_fcf_fc_map(x)			\</div><div class='add'>+	((x)-&gt;fc_map)</div><div class='add'>+#define fcoe_fcf_vfid(x)			\</div><div class='add'>+	((x)-&gt;vfid)</div><div class='add'>+#define fcoe_fcf_mac(x)				\</div><div class='add'>+	((x)-&gt;mac)</div><div class='add'>+#define fcoe_fcf_priority(x)			\</div><div class='add'>+	((x)-&gt;priority)</div><div class='add'>+#define fcoe_fcf_fka_period(x)			\</div><div class='add'>+	((x)-&gt;fka_period)</div><div class='add'>+#define fcoe_fcf_dev_loss_tmo(x)		\</div><div class='add'>+	((x)-&gt;dev_loss_tmo)</div><div class='add'>+#define fcoe_fcf_selected(x)			\</div><div class='add'>+	((x)-&gt;selected)</div><div class='add'>+#define fcoe_fcf_vlan_id(x)			\</div><div class='add'>+	((x)-&gt;vlan_id)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * dev_loss_tmo attribute</div><div class='add'>+ */</div><div class='add'>+static int fcoe_str_to_dev_loss(const char *buf, unsigned long *val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtoul(buf, 0, val);</div><div class='add'>+	if (ret || *val &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	/*</div><div class='add'>+	 * Check for overflow; dev_loss_tmo is u32</div><div class='add'>+	 */</div><div class='add'>+	if (*val &gt; UINT_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fcoe_fcf_set_dev_loss_tmo(struct fcoe_fcf_device *fcf,</div><div class='add'>+				     unsigned long val)</div><div class='add'>+{</div><div class='add'>+	if ((fcf-&gt;state == FCOE_FCF_STATE_UNKNOWN) ||</div><div class='add'>+	    (fcf-&gt;state == FCOE_FCF_STATE_DISCONNECTED) ||</div><div class='add'>+	    (fcf-&gt;state == FCOE_FCF_STATE_DELETED))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	/*</div><div class='add'>+	 * Check for overflow; dev_loss_tmo is u32</div><div class='add'>+	 */</div><div class='add'>+	if (val &gt; UINT_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	fcoe_fcf_dev_loss_tmo(fcf) = val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define FCOE_DEVICE_ATTR(_prefix, _name, _mode, _show, _store)	\</div><div class='add'>+struct device_attribute device_attr_fcoe_##_prefix##_##_name =	\</div><div class='add'>+	__ATTR(_name, _mode, _show, _store)</div><div class='add'>+</div><div class='add'>+#define fcoe_ctlr_show_function(field, format_string, sz, cast)	\</div><div class='add'>+static ssize_t show_fcoe_ctlr_device_##field(struct device *dev, \</div><div class='add'>+					    struct device_attribute *attr, \</div><div class='add'>+					    char *buf)			\</div><div class='add'>+{									\</div><div class='add'>+	struct fcoe_ctlr_device *ctlr = dev_to_ctlr(dev);		\</div><div class='add'>+	if (ctlr-&gt;f-&gt;get_fcoe_ctlr_##field)				\</div><div class='add'>+		ctlr-&gt;f-&gt;get_fcoe_ctlr_##field(ctlr);			\</div><div class='add'>+	return snprintf(buf, sz, format_string,				\</div><div class='add'>+			cast fcoe_ctlr_##field(ctlr));			\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define fcoe_fcf_show_function(field, format_string, sz, cast)	\</div><div class='add'>+static ssize_t show_fcoe_fcf_device_##field(struct device *dev,	\</div><div class='add'>+					   struct device_attribute *attr, \</div><div class='add'>+					   char *buf)			\</div><div class='add'>+{									\</div><div class='add'>+	struct fcoe_fcf_device *fcf = dev_to_fcf(dev);			\</div><div class='add'>+	struct fcoe_ctlr_device *ctlr = fcoe_fcf_dev_to_ctlr_dev(fcf);	\</div><div class='add'>+	if (ctlr-&gt;f-&gt;get_fcoe_fcf_##field)				\</div><div class='add'>+		ctlr-&gt;f-&gt;get_fcoe_fcf_##field(fcf);			\</div><div class='add'>+	return snprintf(buf, sz, format_string,				\</div><div class='add'>+			cast fcoe_fcf_##field(fcf));			\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define fcoe_ctlr_private_show_function(field, format_string, sz, cast)	\</div><div class='add'>+static ssize_t show_fcoe_ctlr_device_##field(struct device *dev, \</div><div class='add'>+					    struct device_attribute *attr, \</div><div class='add'>+					    char *buf)			\</div><div class='add'>+{									\</div><div class='add'>+	struct fcoe_ctlr_device *ctlr = dev_to_ctlr(dev);		\</div><div class='add'>+	return snprintf(buf, sz, format_string, cast fcoe_ctlr_##field(ctlr)); \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define fcoe_fcf_private_show_function(field, format_string, sz, cast)	\</div><div class='add'>+static ssize_t show_fcoe_fcf_device_##field(struct device *dev,	\</div><div class='add'>+					   struct device_attribute *attr, \</div><div class='add'>+					   char *buf)			\</div><div class='add'>+{								\</div><div class='add'>+	struct fcoe_fcf_device *fcf = dev_to_fcf(dev);			\</div><div class='add'>+	return snprintf(buf, sz, format_string, cast fcoe_fcf_##field(fcf)); \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define fcoe_ctlr_private_rd_attr(field, format_string, sz)		\</div><div class='add'>+	fcoe_ctlr_private_show_function(field, format_string, sz, )	\</div><div class='add'>+	static FCOE_DEVICE_ATTR(ctlr, field, S_IRUGO,			\</div><div class='add'>+				show_fcoe_ctlr_device_##field, NULL)</div><div class='add'>+</div><div class='add'>+#define fcoe_ctlr_rd_attr(field, format_string, sz)			\</div><div class='add'>+	fcoe_ctlr_show_function(field, format_string, sz, )		\</div><div class='add'>+	static FCOE_DEVICE_ATTR(ctlr, field, S_IRUGO,			\</div><div class='add'>+				show_fcoe_ctlr_device_##field, NULL)</div><div class='add'>+</div><div class='add'>+#define fcoe_fcf_rd_attr(field, format_string, sz)			\</div><div class='add'>+	fcoe_fcf_show_function(field, format_string, sz, )		\</div><div class='add'>+	static FCOE_DEVICE_ATTR(fcf, field, S_IRUGO,			\</div><div class='add'>+				show_fcoe_fcf_device_##field, NULL)</div><div class='add'>+</div><div class='add'>+#define fcoe_fcf_private_rd_attr(field, format_string, sz)		\</div><div class='add'>+	fcoe_fcf_private_show_function(field, format_string, sz, )	\</div><div class='add'>+	static FCOE_DEVICE_ATTR(fcf, field, S_IRUGO,			\</div><div class='add'>+				show_fcoe_fcf_device_##field, NULL)</div><div class='add'>+</div><div class='add'>+#define fcoe_ctlr_private_rd_attr_cast(field, format_string, sz, cast)	\</div><div class='add'>+	fcoe_ctlr_private_show_function(field, format_string, sz, (cast)) \</div><div class='add'>+	static FCOE_DEVICE_ATTR(ctlr, field, S_IRUGO,			\</div><div class='add'>+				show_fcoe_ctlr_device_##field, NULL)</div><div class='add'>+</div><div class='add'>+#define fcoe_fcf_private_rd_attr_cast(field, format_string, sz, cast)	\</div><div class='add'>+	fcoe_fcf_private_show_function(field, format_string, sz, (cast)) \</div><div class='add'>+	static FCOE_DEVICE_ATTR(fcf, field, S_IRUGO,			\</div><div class='add'>+				show_fcoe_fcf_device_##field, NULL)</div><div class='add'>+</div><div class='add'>+#define fcoe_enum_name_search(title, table_type, table)			\</div><div class='add'>+static const char *get_fcoe_##title##_name(enum table_type table_key)	\</div><div class='add'>+{									\</div><div class='add'>+	int i;								\</div><div class='add'>+	char *name = NULL;						\</div><div class='add'>+									\</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(table); i++) {			\</div><div class='add'>+		if (table[i].value == table_key) {			\</div><div class='add'>+			name = table[i].name;				\</div><div class='add'>+			break;						\</div><div class='add'>+		}							\</div><div class='add'>+	}								\</div><div class='add'>+	return name;							\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct {</div><div class='add'>+	enum fcf_state value;</div><div class='add'>+	char           *name;</div><div class='add'>+} fcf_state_names[] = {</div><div class='add'>+	{ FCOE_FCF_STATE_UNKNOWN,      "Unknown" },</div><div class='add'>+	{ FCOE_FCF_STATE_DISCONNECTED, "Disconnected" },</div><div class='add'>+	{ FCOE_FCF_STATE_CONNECTED,    "Connected" },</div><div class='add'>+};</div><div class='add'>+fcoe_enum_name_search(fcf_state, fcf_state, fcf_state_names)</div><div class='add'>+#define FCOE_FCF_STATE_MAX_NAMELEN 50</div><div class='add'>+</div><div class='add'>+static ssize_t show_fcf_state(struct device *dev,</div><div class='add'>+			      struct device_attribute *attr,</div><div class='add'>+			      char *buf)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_fcf_device *fcf = dev_to_fcf(dev);</div><div class='add'>+	const char *name;</div><div class='add'>+	name = get_fcoe_fcf_state_name(fcf-&gt;state);</div><div class='add'>+	if (!name)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return snprintf(buf, FCOE_FCF_STATE_MAX_NAMELEN, "%s\n", name);</div><div class='add'>+}</div><div class='add'>+static FCOE_DEVICE_ATTR(fcf, state, S_IRUGO, show_fcf_state, NULL);</div><div class='add'>+</div><div class='add'>+static struct {</div><div class='add'>+	enum fip_conn_type value;</div><div class='add'>+	char               *name;</div><div class='add'>+} fip_conn_type_names[] = {</div><div class='add'>+	{ FIP_CONN_TYPE_UNKNOWN, "Unknown" },</div><div class='add'>+	{ FIP_CONN_TYPE_FABRIC, "Fabric" },</div><div class='add'>+	{ FIP_CONN_TYPE_VN2VN, "VN2VN" },</div><div class='add'>+};</div><div class='add'>+fcoe_enum_name_search(ctlr_mode, fip_conn_type, fip_conn_type_names)</div><div class='add'>+#define FCOE_CTLR_MODE_MAX_NAMELEN 50</div><div class='add'>+</div><div class='add'>+static ssize_t show_ctlr_mode(struct device *dev,</div><div class='add'>+			      struct device_attribute *attr,</div><div class='add'>+			      char *buf)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr_device *ctlr = dev_to_ctlr(dev);</div><div class='add'>+	const char *name;</div><div class='add'>+</div><div class='add'>+	if (ctlr-&gt;f-&gt;get_fcoe_ctlr_mode)</div><div class='add'>+		ctlr-&gt;f-&gt;get_fcoe_ctlr_mode(ctlr);</div><div class='add'>+</div><div class='add'>+	name = get_fcoe_ctlr_mode_name(ctlr-&gt;mode);</div><div class='add'>+	if (!name)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return snprintf(buf, FCOE_CTLR_MODE_MAX_NAMELEN,</div><div class='add'>+			"%s\n", name);</div><div class='add'>+}</div><div class='add'>+static FCOE_DEVICE_ATTR(ctlr, mode, S_IRUGO,</div><div class='add'>+			show_ctlr_mode, NULL);</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+store_private_fcoe_ctlr_fcf_dev_loss_tmo(struct device *dev,</div><div class='add'>+					 struct device_attribute *attr,</div><div class='add'>+					 const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr_device *ctlr = dev_to_ctlr(dev);</div><div class='add'>+	struct fcoe_fcf_device *fcf;</div><div class='add'>+	unsigned long val;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = fcoe_str_to_dev_loss(buf, &amp;val);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	fcoe_ctlr_fcf_dev_loss_tmo(ctlr) = val;</div><div class='add'>+	mutex_lock(&amp;ctlr-&gt;lock);</div><div class='add'>+	list_for_each_entry(fcf, &amp;ctlr-&gt;fcfs, peers)</div><div class='add'>+		fcoe_fcf_set_dev_loss_tmo(fcf, val);</div><div class='add'>+	mutex_unlock(&amp;ctlr-&gt;lock);</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+fcoe_ctlr_private_show_function(fcf_dev_loss_tmo, "%d\n", 20, );</div><div class='add'>+static FCOE_DEVICE_ATTR(ctlr, fcf_dev_loss_tmo, S_IRUGO | S_IWUSR,</div><div class='add'>+			show_fcoe_ctlr_device_fcf_dev_loss_tmo,</div><div class='add'>+			store_private_fcoe_ctlr_fcf_dev_loss_tmo);</div><div class='add'>+</div><div class='add'>+/* Link Error Status Block (LESB) */</div><div class='add'>+fcoe_ctlr_rd_attr(link_fail, "%u\n", 20);</div><div class='add'>+fcoe_ctlr_rd_attr(vlink_fail, "%u\n", 20);</div><div class='add'>+fcoe_ctlr_rd_attr(miss_fka, "%u\n", 20);</div><div class='add'>+fcoe_ctlr_rd_attr(symb_err, "%u\n", 20);</div><div class='add'>+fcoe_ctlr_rd_attr(err_block, "%u\n", 20);</div><div class='add'>+fcoe_ctlr_rd_attr(fcs_error, "%u\n", 20);</div><div class='add'>+</div><div class='add'>+fcoe_fcf_private_rd_attr_cast(fabric_name, "0x%llx\n", 20, unsigned long long);</div><div class='add'>+fcoe_fcf_private_rd_attr_cast(switch_name, "0x%llx\n", 20, unsigned long long);</div><div class='add'>+fcoe_fcf_private_rd_attr(priority, "%u\n", 20);</div><div class='add'>+fcoe_fcf_private_rd_attr(fc_map, "0x%x\n", 20);</div><div class='add'>+fcoe_fcf_private_rd_attr(vfid, "%u\n", 20);</div><div class='add'>+fcoe_fcf_private_rd_attr(mac, "%pM\n", 20);</div><div class='add'>+fcoe_fcf_private_rd_attr(fka_period, "%u\n", 20);</div><div class='add'>+fcoe_fcf_rd_attr(selected, "%u\n", 20);</div><div class='add'>+fcoe_fcf_rd_attr(vlan_id, "%u\n", 20);</div><div class='add'>+</div><div class='add'>+fcoe_fcf_private_show_function(dev_loss_tmo, "%d\n", 20, )</div><div class='add'>+static ssize_t</div><div class='add'>+store_fcoe_fcf_dev_loss_tmo(struct device *dev, struct device_attribute *attr,</div><div class='add'>+			    const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_fcf_device *fcf = dev_to_fcf(dev);</div><div class='add'>+	unsigned long val;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = fcoe_str_to_dev_loss(buf, &amp;val);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = fcoe_fcf_set_dev_loss_tmo(fcf, val);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+static FCOE_DEVICE_ATTR(fcf, dev_loss_tmo, S_IRUGO | S_IWUSR,</div><div class='add'>+			show_fcoe_fcf_device_dev_loss_tmo,</div><div class='add'>+			store_fcoe_fcf_dev_loss_tmo);</div><div class='add'>+</div><div class='add'>+static struct attribute *fcoe_ctlr_lesb_attrs[] = {</div><div class='add'>+	&amp;device_attr_fcoe_ctlr_link_fail.attr,</div><div class='add'>+	&amp;device_attr_fcoe_ctlr_vlink_fail.attr,</div><div class='add'>+	&amp;device_attr_fcoe_ctlr_miss_fka.attr,</div><div class='add'>+	&amp;device_attr_fcoe_ctlr_symb_err.attr,</div><div class='add'>+	&amp;device_attr_fcoe_ctlr_err_block.attr,</div><div class='add'>+	&amp;device_attr_fcoe_ctlr_fcs_error.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute_group fcoe_ctlr_lesb_attr_group = {</div><div class='add'>+	.name = "lesb",</div><div class='add'>+	.attrs = fcoe_ctlr_lesb_attrs,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute *fcoe_ctlr_attrs[] = {</div><div class='add'>+	&amp;device_attr_fcoe_ctlr_fcf_dev_loss_tmo.attr,</div><div class='add'>+	&amp;device_attr_fcoe_ctlr_mode.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute_group fcoe_ctlr_attr_group = {</div><div class='add'>+	.attrs = fcoe_ctlr_attrs,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group *fcoe_ctlr_attr_groups[] = {</div><div class='add'>+	&amp;fcoe_ctlr_attr_group,</div><div class='add'>+	&amp;fcoe_ctlr_lesb_attr_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute *fcoe_fcf_attrs[] = {</div><div class='add'>+	&amp;device_attr_fcoe_fcf_fabric_name.attr,</div><div class='add'>+	&amp;device_attr_fcoe_fcf_switch_name.attr,</div><div class='add'>+	&amp;device_attr_fcoe_fcf_dev_loss_tmo.attr,</div><div class='add'>+	&amp;device_attr_fcoe_fcf_fc_map.attr,</div><div class='add'>+	&amp;device_attr_fcoe_fcf_vfid.attr,</div><div class='add'>+	&amp;device_attr_fcoe_fcf_mac.attr,</div><div class='add'>+	&amp;device_attr_fcoe_fcf_priority.attr,</div><div class='add'>+	&amp;device_attr_fcoe_fcf_fka_period.attr,</div><div class='add'>+	&amp;device_attr_fcoe_fcf_state.attr,</div><div class='add'>+	&amp;device_attr_fcoe_fcf_selected.attr,</div><div class='add'>+	&amp;device_attr_fcoe_fcf_vlan_id.attr,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute_group fcoe_fcf_attr_group = {</div><div class='add'>+	.attrs = fcoe_fcf_attrs,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group *fcoe_fcf_attr_groups[] = {</div><div class='add'>+	&amp;fcoe_fcf_attr_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bus_type fcoe_bus_type;</div><div class='add'>+</div><div class='add'>+static int fcoe_bus_match(struct device *dev,</div><div class='add'>+			  struct device_driver *drv)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;bus == &amp;fcoe_bus_type)</div><div class='add'>+		return 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fcoe_ctlr_device_release() - Release the FIP ctlr memory</div><div class='add'>+ * @dev: Pointer to the FIP ctlr's embedded device</div><div class='add'>+ *</div><div class='add'>+ * Called when the last FIP ctlr reference is released.</div><div class='add'>+ */</div><div class='add'>+static void fcoe_ctlr_device_release(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr_device *ctlr = dev_to_ctlr(dev);</div><div class='add'>+	kfree(ctlr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fcoe_fcf_device_release() - Release the FIP fcf memory</div><div class='add'>+ * @dev: Pointer to the fcf's embedded device</div><div class='add'>+ *</div><div class='add'>+ * Called when the last FIP fcf reference is released.</div><div class='add'>+ */</div><div class='add'>+static void fcoe_fcf_device_release(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_fcf_device *fcf = dev_to_fcf(dev);</div><div class='add'>+	kfree(fcf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct device_type fcoe_ctlr_device_type = {</div><div class='add'>+	.name = "fcoe_ctlr",</div><div class='add'>+	.groups = fcoe_ctlr_attr_groups,</div><div class='add'>+	.release = fcoe_ctlr_device_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct device_type fcoe_fcf_device_type = {</div><div class='add'>+	.name = "fcoe_fcf",</div><div class='add'>+	.groups = fcoe_fcf_attr_groups,</div><div class='add'>+	.release = fcoe_fcf_device_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bus_type fcoe_bus_type = {</div><div class='add'>+	.name = "fcoe",</div><div class='add'>+	.match = &amp;fcoe_bus_match,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fcoe_ctlr_device_flush_work() - Flush a FIP ctlr's workqueue</div><div class='add'>+ * @ctlr: Pointer to the FIP ctlr whose workqueue is to be flushed</div><div class='add'>+ */</div><div class='add'>+void fcoe_ctlr_device_flush_work(struct fcoe_ctlr_device *ctlr)</div><div class='add'>+{</div><div class='add'>+	if (!fcoe_ctlr_work_q(ctlr)) {</div><div class='add'>+		printk(KERN_ERR</div><div class='add'>+		       "ERROR: FIP Ctlr '%d' attempted to flush work, "</div><div class='add'>+		       "when no workqueue created.\n", ctlr-&gt;id);</div><div class='add'>+		dump_stack();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flush_workqueue(fcoe_ctlr_work_q(ctlr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fcoe_ctlr_device_queue_work() - Schedule work for a FIP ctlr's workqueue</div><div class='add'>+ * @ctlr: Pointer to the FIP ctlr who owns the devloss workqueue</div><div class='add'>+ * @work:   Work to queue for execution</div><div class='add'>+ *</div><div class='add'>+ * Return value:</div><div class='add'>+ *	1 on success / 0 already queued / &lt; 0 for error</div><div class='add'>+ */</div><div class='add'>+int fcoe_ctlr_device_queue_work(struct fcoe_ctlr_device *ctlr,</div><div class='add'>+			       struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(!fcoe_ctlr_work_q(ctlr))) {</div><div class='add'>+		printk(KERN_ERR</div><div class='add'>+		       "ERROR: FIP Ctlr '%d' attempted to queue work, "</div><div class='add'>+		       "when no workqueue created.\n", ctlr-&gt;id);</div><div class='add'>+		dump_stack();</div><div class='add'>+</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return queue_work(fcoe_ctlr_work_q(ctlr), work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fcoe_ctlr_device_flush_devloss() - Flush a FIP ctlr's devloss workqueue</div><div class='add'>+ * @ctlr: Pointer to FIP ctlr whose workqueue is to be flushed</div><div class='add'>+ */</div><div class='add'>+void fcoe_ctlr_device_flush_devloss(struct fcoe_ctlr_device *ctlr)</div><div class='add'>+{</div><div class='add'>+	if (!fcoe_ctlr_devloss_work_q(ctlr)) {</div><div class='add'>+		printk(KERN_ERR</div><div class='add'>+		       "ERROR: FIP Ctlr '%d' attempted to flush work, "</div><div class='add'>+		       "when no workqueue created.\n", ctlr-&gt;id);</div><div class='add'>+		dump_stack();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flush_workqueue(fcoe_ctlr_devloss_work_q(ctlr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fcoe_ctlr_device_queue_devloss_work() - Schedule work for a FIP ctlr's devloss workqueue</div><div class='add'>+ * @ctlr: Pointer to the FIP ctlr who owns the devloss workqueue</div><div class='add'>+ * @work:   Work to queue for execution</div><div class='add'>+ * @delay:  jiffies to delay the work queuing</div><div class='add'>+ *</div><div class='add'>+ * Return value:</div><div class='add'>+ *	1 on success / 0 already queued / &lt; 0 for error</div><div class='add'>+ */</div><div class='add'>+int fcoe_ctlr_device_queue_devloss_work(struct fcoe_ctlr_device *ctlr,</div><div class='add'>+				       struct delayed_work *work,</div><div class='add'>+				       unsigned long delay)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(!fcoe_ctlr_devloss_work_q(ctlr))) {</div><div class='add'>+		printk(KERN_ERR</div><div class='add'>+		       "ERROR: FIP Ctlr '%d' attempted to queue work, "</div><div class='add'>+		       "when no workqueue created.\n", ctlr-&gt;id);</div><div class='add'>+		dump_stack();</div><div class='add'>+</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return queue_delayed_work(fcoe_ctlr_devloss_work_q(ctlr), work, delay);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fcoe_fcf_device_match(struct fcoe_fcf_device *new,</div><div class='add'>+				 struct fcoe_fcf_device *old)</div><div class='add'>+{</div><div class='add'>+	if (new-&gt;switch_name == old-&gt;switch_name &amp;&amp;</div><div class='add'>+	    new-&gt;fabric_name == old-&gt;fabric_name &amp;&amp;</div><div class='add'>+	    new-&gt;fc_map == old-&gt;fc_map &amp;&amp;</div><div class='add'>+	    compare_ether_addr(new-&gt;mac, old-&gt;mac) == 0)</div><div class='add'>+		return 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fcoe_ctlr_device_add() - Add a FIP ctlr to sysfs</div><div class='add'>+ * @parent:    The parent device to which the fcoe_ctlr instance</div><div class='add'>+ *             should be attached</div><div class='add'>+ * @f:         The LLD's FCoE sysfs function template pointer</div><div class='add'>+ * @priv_size: Size to be allocated with the fcoe_ctlr_device for the LLD</div><div class='add'>+ *</div><div class='add'>+ * This routine allocates a FIP ctlr object with some additional memory</div><div class='add'>+ * for the LLD. The FIP ctlr is initialized, added to sysfs and then</div><div class='add'>+ * attributes are added to it.</div><div class='add'>+ */</div><div class='add'>+struct fcoe_ctlr_device *fcoe_ctlr_device_add(struct device *parent,</div><div class='add'>+				    struct fcoe_sysfs_function_template *f,</div><div class='add'>+				    int priv_size)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr_device *ctlr;</div><div class='add'>+	int error = 0;</div><div class='add'>+</div><div class='add'>+	ctlr = kzalloc(sizeof(struct fcoe_ctlr_device) + priv_size,</div><div class='add'>+		       GFP_KERNEL);</div><div class='add'>+	if (!ctlr)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ctlr-&gt;id = atomic_inc_return(&amp;ctlr_num) - 1;</div><div class='add'>+	ctlr-&gt;f = f;</div><div class='add'>+	INIT_LIST_HEAD(&amp;ctlr-&gt;fcfs);</div><div class='add'>+	mutex_init(&amp;ctlr-&gt;lock);</div><div class='add'>+	ctlr-&gt;dev.parent = parent;</div><div class='add'>+	ctlr-&gt;dev.bus = &amp;fcoe_bus_type;</div><div class='add'>+	ctlr-&gt;dev.type = &amp;fcoe_ctlr_device_type;</div><div class='add'>+</div><div class='add'>+	ctlr-&gt;fcf_dev_loss_tmo = fcoe_fcf_dev_loss_tmo;</div><div class='add'>+</div><div class='add'>+	snprintf(ctlr-&gt;work_q_name, sizeof(ctlr-&gt;work_q_name),</div><div class='add'>+		 "ctlr_wq_%d", ctlr-&gt;id);</div><div class='add'>+	ctlr-&gt;work_q = create_singlethread_workqueue(</div><div class='add'>+		ctlr-&gt;work_q_name);</div><div class='add'>+	if (!ctlr-&gt;work_q)</div><div class='add'>+		goto out_del;</div><div class='add'>+</div><div class='add'>+	snprintf(ctlr-&gt;devloss_work_q_name,</div><div class='add'>+		 sizeof(ctlr-&gt;devloss_work_q_name),</div><div class='add'>+		 "ctlr_dl_wq_%d", ctlr-&gt;id);</div><div class='add'>+	ctlr-&gt;devloss_work_q = create_singlethread_workqueue(</div><div class='add'>+		ctlr-&gt;devloss_work_q_name);</div><div class='add'>+	if (!ctlr-&gt;devloss_work_q)</div><div class='add'>+		goto out_del_q;</div><div class='add'>+</div><div class='add'>+	dev_set_name(&amp;ctlr-&gt;dev, "ctlr_%d", ctlr-&gt;id);</div><div class='add'>+	error = device_register(&amp;ctlr-&gt;dev);</div><div class='add'>+	if (error)</div><div class='add'>+		goto out_del_q2;</div><div class='add'>+</div><div class='add'>+	return ctlr;</div><div class='add'>+</div><div class='add'>+out_del_q2:</div><div class='add'>+	destroy_workqueue(ctlr-&gt;devloss_work_q);</div><div class='add'>+	ctlr-&gt;devloss_work_q = NULL;</div><div class='add'>+out_del_q:</div><div class='add'>+	destroy_workqueue(ctlr-&gt;work_q);</div><div class='add'>+	ctlr-&gt;work_q = NULL;</div><div class='add'>+out_del:</div><div class='add'>+	kfree(ctlr);</div><div class='add'>+out:</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(fcoe_ctlr_device_add);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fcoe_ctlr_device_delete() - Delete a FIP ctlr and its subtree from sysfs</div><div class='add'>+ * @ctlr: A pointer to the ctlr to be deleted</div><div class='add'>+ *</div><div class='add'>+ * Deletes a FIP ctlr and any fcfs attached</div><div class='add'>+ * to it. Deleting fcfs will cause their childen</div><div class='add'>+ * to be deleted as well.</div><div class='add'>+ *</div><div class='add'>+ * The ctlr is detached from sysfs and it's resources</div><div class='add'>+ * are freed (work q), but the memory is not freed</div><div class='add'>+ * until its last reference is released.</div><div class='add'>+ *</div><div class='add'>+ * This routine expects no locks to be held before</div><div class='add'>+ * calling.</div><div class='add'>+ *</div><div class='add'>+ * TODO: Currently there are no callbacks to clean up LLD data</div><div class='add'>+ * for a fcoe_fcf_device. LLDs must keep this in mind as they need</div><div class='add'>+ * to clean up each of their LLD data for all fcoe_fcf_device before</div><div class='add'>+ * calling fcoe_ctlr_device_delete.</div><div class='add'>+ */</div><div class='add'>+void fcoe_ctlr_device_delete(struct fcoe_ctlr_device *ctlr)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_fcf_device *fcf, *next;</div><div class='add'>+	/* Remove any attached fcfs */</div><div class='add'>+	mutex_lock(&amp;ctlr-&gt;lock);</div><div class='add'>+	list_for_each_entry_safe(fcf, next,</div><div class='add'>+				 &amp;ctlr-&gt;fcfs, peers) {</div><div class='add'>+		list_del(&amp;fcf-&gt;peers);</div><div class='add'>+		fcf-&gt;state = FCOE_FCF_STATE_DELETED;</div><div class='add'>+		fcoe_ctlr_device_queue_work(ctlr, &amp;fcf-&gt;delete_work);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;ctlr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	fcoe_ctlr_device_flush_work(ctlr);</div><div class='add'>+</div><div class='add'>+	destroy_workqueue(ctlr-&gt;devloss_work_q);</div><div class='add'>+	ctlr-&gt;devloss_work_q = NULL;</div><div class='add'>+	destroy_workqueue(ctlr-&gt;work_q);</div><div class='add'>+	ctlr-&gt;work_q = NULL;</div><div class='add'>+</div><div class='add'>+	device_unregister(&amp;ctlr-&gt;dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(fcoe_ctlr_device_delete);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fcoe_fcf_device_final_delete() - Final delete routine</div><div class='add'>+ * @work: The FIP fcf's embedded work struct</div><div class='add'>+ *</div><div class='add'>+ * It is expected that the fcf has been removed from</div><div class='add'>+ * the FIP ctlr's list before calling this routine.</div><div class='add'>+ */</div><div class='add'>+static void fcoe_fcf_device_final_delete(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_fcf_device *fcf =</div><div class='add'>+		container_of(work, struct fcoe_fcf_device, delete_work);</div><div class='add'>+	struct fcoe_ctlr_device *ctlr = fcoe_fcf_dev_to_ctlr_dev(fcf);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Cancel any outstanding timers. These should really exist</div><div class='add'>+	 * only when rmmod'ing the LLDD and we're asking for</div><div class='add'>+	 * immediate termination of the rports</div><div class='add'>+	 */</div><div class='add'>+	if (!cancel_delayed_work(&amp;fcf-&gt;dev_loss_work))</div><div class='add'>+		fcoe_ctlr_device_flush_devloss(ctlr);</div><div class='add'>+</div><div class='add'>+	device_unregister(&amp;fcf-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fip_timeout_deleted_fcf() - Delete a fcf when the devloss timer fires</div><div class='add'>+ * @work: The FIP fcf's embedded work struct</div><div class='add'>+ *</div><div class='add'>+ * Removes the fcf from the FIP ctlr's list of fcfs and</div><div class='add'>+ * queues the final deletion.</div><div class='add'>+ */</div><div class='add'>+static void fip_timeout_deleted_fcf(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_fcf_device *fcf =</div><div class='add'>+		container_of(work, struct fcoe_fcf_device, dev_loss_work.work);</div><div class='add'>+	struct fcoe_ctlr_device *ctlr = fcoe_fcf_dev_to_ctlr_dev(fcf);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ctlr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the fcf is deleted or reconnected before the timer</div><div class='add'>+	 * fires the devloss queue will be flushed, but the state will</div><div class='add'>+	 * either be CONNECTED or DELETED. If that is the case we</div><div class='add'>+	 * cancel deleting the fcf.</div><div class='add'>+	 */</div><div class='add'>+	if (fcf-&gt;state != FCOE_FCF_STATE_DISCONNECTED)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	dev_printk(KERN_ERR, &amp;fcf-&gt;dev,</div><div class='add'>+		   "FIP fcf connection time out: removing fcf\n");</div><div class='add'>+</div><div class='add'>+	list_del(&amp;fcf-&gt;peers);</div><div class='add'>+	fcf-&gt;state = FCOE_FCF_STATE_DELETED;</div><div class='add'>+	fcoe_ctlr_device_queue_work(ctlr, &amp;fcf-&gt;delete_work);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;ctlr-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fcoe_fcf_device_delete() - Delete a FIP fcf</div><div class='add'>+ * @fcf: Pointer to the fcf which is to be deleted</div><div class='add'>+ *</div><div class='add'>+ * Queues the FIP fcf on the devloss workqueue</div><div class='add'>+ *</div><div class='add'>+ * Expects the ctlr_attrs mutex to be held for fcf</div><div class='add'>+ * state change.</div><div class='add'>+ */</div><div class='add'>+void fcoe_fcf_device_delete(struct fcoe_fcf_device *fcf)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_ctlr_device *ctlr = fcoe_fcf_dev_to_ctlr_dev(fcf);</div><div class='add'>+	int timeout = fcf-&gt;dev_loss_tmo;</div><div class='add'>+</div><div class='add'>+	if (fcf-&gt;state != FCOE_FCF_STATE_CONNECTED)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fcf-&gt;state = FCOE_FCF_STATE_DISCONNECTED;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * FCF will only be re-connected by the LLD calling</div><div class='add'>+	 * fcoe_fcf_device_add, and it should be setting up</div><div class='add'>+	 * priv then.</div><div class='add'>+	 */</div><div class='add'>+	fcf-&gt;priv = NULL;</div><div class='add'>+</div><div class='add'>+	fcoe_ctlr_device_queue_devloss_work(ctlr, &amp;fcf-&gt;dev_loss_work,</div><div class='add'>+					   timeout * HZ);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(fcoe_fcf_device_delete);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fcoe_fcf_device_add() - Add a FCoE sysfs fcoe_fcf_device to the system</div><div class='add'>+ * @ctlr:    The fcoe_ctlr_device that will be the fcoe_fcf_device parent</div><div class='add'>+ * @new_fcf: A temporary FCF used for lookups on the current list of fcfs</div><div class='add'>+ *</div><div class='add'>+ * Expects to be called with the ctlr-&gt;lock held</div><div class='add'>+ */</div><div class='add'>+struct fcoe_fcf_device *fcoe_fcf_device_add(struct fcoe_ctlr_device *ctlr,</div><div class='add'>+					    struct fcoe_fcf_device *new_fcf)</div><div class='add'>+{</div><div class='add'>+	struct fcoe_fcf_device *fcf;</div><div class='add'>+	int error = 0;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(fcf, &amp;ctlr-&gt;fcfs, peers) {</div><div class='add'>+		if (fcoe_fcf_device_match(new_fcf, fcf)) {</div><div class='add'>+			if (fcf-&gt;state == FCOE_FCF_STATE_CONNECTED)</div><div class='add'>+				return fcf;</div><div class='add'>+</div><div class='add'>+			fcf-&gt;state = FCOE_FCF_STATE_CONNECTED;</div><div class='add'>+</div><div class='add'>+			if (!cancel_delayed_work(&amp;fcf-&gt;dev_loss_work))</div><div class='add'>+				fcoe_ctlr_device_flush_devloss(ctlr);</div><div class='add'>+</div><div class='add'>+			return fcf;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fcf = kzalloc(sizeof(struct fcoe_fcf_device), GFP_ATOMIC);</div><div class='add'>+	if (unlikely(!fcf))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;fcf-&gt;delete_work, fcoe_fcf_device_final_delete);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;fcf-&gt;dev_loss_work, fip_timeout_deleted_fcf);</div><div class='add'>+</div><div class='add'>+	fcf-&gt;dev.parent = &amp;ctlr-&gt;dev;</div><div class='add'>+	fcf-&gt;dev.bus = &amp;fcoe_bus_type;</div><div class='add'>+	fcf-&gt;dev.type = &amp;fcoe_fcf_device_type;</div><div class='add'>+	fcf-&gt;id = atomic_inc_return(&amp;fcf_num) - 1;</div><div class='add'>+	fcf-&gt;state = FCOE_FCF_STATE_UNKNOWN;</div><div class='add'>+</div><div class='add'>+	fcf-&gt;dev_loss_tmo = ctlr-&gt;fcf_dev_loss_tmo;</div><div class='add'>+</div><div class='add'>+	dev_set_name(&amp;fcf-&gt;dev, "fcf_%d", fcf-&gt;id);</div><div class='add'>+</div><div class='add'>+	fcf-&gt;fabric_name = new_fcf-&gt;fabric_name;</div><div class='add'>+	fcf-&gt;switch_name = new_fcf-&gt;switch_name;</div><div class='add'>+	fcf-&gt;fc_map = new_fcf-&gt;fc_map;</div><div class='add'>+	fcf-&gt;vfid = new_fcf-&gt;vfid;</div><div class='add'>+	memcpy(fcf-&gt;mac, new_fcf-&gt;mac, ETH_ALEN);</div><div class='add'>+	fcf-&gt;priority = new_fcf-&gt;priority;</div><div class='add'>+	fcf-&gt;fka_period = new_fcf-&gt;fka_period;</div><div class='add'>+	fcf-&gt;selected = new_fcf-&gt;selected;</div><div class='add'>+</div><div class='add'>+	error = device_register(&amp;fcf-&gt;dev);</div><div class='add'>+	if (error)</div><div class='add'>+		goto out_del;</div><div class='add'>+</div><div class='add'>+	fcf-&gt;state = FCOE_FCF_STATE_CONNECTED;</div><div class='add'>+	list_add_tail(&amp;fcf-&gt;peers, &amp;ctlr-&gt;fcfs);</div><div class='add'>+</div><div class='add'>+	return fcf;</div><div class='add'>+</div><div class='add'>+out_del:</div><div class='add'>+	kfree(fcf);</div><div class='add'>+out:</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(fcoe_fcf_device_add);</div><div class='add'>+</div><div class='add'>+int __init fcoe_sysfs_setup(void)</div><div class='add'>+{</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;ctlr_num, 0);</div><div class='add'>+	atomic_set(&amp;fcf_num, 0);</div><div class='add'>+</div><div class='add'>+	error = bus_register(&amp;fcoe_bus_type);</div><div class='add'>+	if (error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __exit fcoe_sysfs_teardown(void)</div><div class='add'>+{</div><div class='add'>+	bus_unregister(&amp;fcoe_bus_type);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/scsi/fcoe/fcoe_transport.c b/drivers/scsi/fcoe/fcoe_transport.c<br/>index 710e149d41b6..b46f43dced78 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/fcoe/fcoe_transport.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/fcoe/fcoe_transport.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/fcoe/fcoe_transport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/fcoe/fcoe_transport.c</a></div><div class='hunk'>@@ -815,9 +815,17 @@ out_nodev:</div><div class='ctx'>  */</div><div class='ctx'> static int __init libfcoe_init(void)</div><div class='ctx'> {</div><div class='del'>-	fcoe_transport_init();</div><div class='add'>+	int rc = 0;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	rc = fcoe_transport_init();</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = fcoe_sysfs_setup();</div><div class='add'>+	if (rc)</div><div class='add'>+		fcoe_transport_exit();</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> module_init(libfcoe_init);</div><div class='ctx'> </div><div class='hunk'>@@ -826,6 +834,7 @@ module_init(libfcoe_init);</div><div class='ctx'>  */</div><div class='ctx'> static void __exit libfcoe_exit(void)</div><div class='ctx'> {</div><div class='add'>+	fcoe_sysfs_teardown();</div><div class='ctx'> 	fcoe_transport_exit();</div><div class='ctx'> }</div><div class='ctx'> module_exit(libfcoe_exit);</div><div class='head'>diff --git a/drivers/scsi/fd_mcs.c b/drivers/scsi/fd_mcs.c<br/>deleted file mode 100644<br/>index 53bfcaa86f09..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/fd_mcs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/fd_mcs.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1354 +0,0 @@</div><div class='del'>-/* fd_mcs.c -- Future Domain MCS 600/700 (or IBM OEM) driver</div><div class='del'>- *</div><div class='del'>- * FutureDomain MCS-600/700 v0.2 03/11/1998 by ZP Gu (zpg@castle.net)</div><div class='del'>- *</div><div class='del'>- * This driver is cloned from fdomain.* to specifically support</div><div class='del'>- * the Future Domain MCS 600/700 MCA SCSI adapters. Some PS/2s</div><div class='del'>- * also equipped with IBM Fast SCSI Adapter/A which is an OEM</div><div class='del'>- * of MCS 700.</div><div class='del'>- *</div><div class='del'>- * This driver also supports Reply SB16/SCSI card (the SCSI part).</div><div class='del'>- *</div><div class='del'>- * What makes this driver different is that this driver is MCA only</div><div class='del'>- * and it supports multiple adapters in the same system, IRQ </div><div class='del'>- * sharing, some driver statistics, and maps highest SCSI id to sda.</div><div class='del'>- * All cards are auto-detected.</div><div class='del'>- *</div><div class='del'>- * Assumptions: TMC-1800/18C50/18C30, BIOS &gt;= 3.4</div><div class='del'>- *</div><div class='del'>- * LILO command-line options:</div><div class='del'>- *   fd_mcs=&lt;FIFO_COUNT&gt;[,&lt;FIFO_SIZE&gt;]</div><div class='del'>- *</div><div class='del'>- * ********************************************************</div><div class='del'>- * Please see Copyrights/Comments in fdomain.* for credits.</div><div class='del'>- * Following is from fdomain.c for acknowledgement:</div><div class='del'>- *</div><div class='del'>- * Created: Sun May  3 18:53:19 1992 by faith@cs.unc.edu</div><div class='del'>- * Revised: Wed Oct  2 11:10:55 1996 by r.faith@ieee.org</div><div class='del'>- * Author: Rickard E. Faith, faith@cs.unc.edu</div><div class='del'>- * Copyright 1992, 1993, 1994, 1995, 1996 Rickard E. Faith</div><div class='del'>- *</div><div class='del'>- * $Id: fdomain.c,v 5.45 1996/10/02 15:13:06 root Exp $</div><div class='del'>-</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the</div><div class='del'>- * Free Software Foundation; either version 2, or (at your option) any</div><div class='del'>- * later version.</div><div class='del'>-</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>-</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='del'>- * 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>-</div><div class='del'>- **************************************************************************</div><div class='del'>-</div><div class='del'>- NOTES ON USER DEFINABLE OPTIONS:</div><div class='del'>-</div><div class='del'>- DEBUG: This turns on the printing of various debug information.</div><div class='del'>-</div><div class='del'>- ENABLE_PARITY: This turns on SCSI parity checking.  With the current</div><div class='del'>- driver, all attached devices must support SCSI parity.  If none of your</div><div class='del'>- devices support parity, then you can probably get the driver to work by</div><div class='del'>- turning this option off.  I have no way of testing this, however, and it</div><div class='del'>- would appear that no one ever uses this option.</div><div class='del'>-</div><div class='del'>- FIFO_COUNT: The host adapter has an 8K cache (host adapters based on the</div><div class='del'>- 18C30 chip have a 2k cache).  When this many 512 byte blocks are filled by</div><div class='del'>- the SCSI device, an interrupt will be raised.  Therefore, this could be as</div><div class='del'>- low as 0, or as high as 16.  Note, however, that values which are too high</div><div class='del'>- or too low seem to prevent any interrupts from occurring, and thereby lock</div><div class='del'>- up the machine.  I have found that 2 is a good number, but throughput may</div><div class='del'>- be increased by changing this value to values which are close to 2.</div><div class='del'>- Please let me know if you try any different values.</div><div class='del'>- [*****Now a runtime option*****]</div><div class='del'>-</div><div class='del'>- RESELECTION: This is no longer an option, since I gave up trying to</div><div class='del'>- implement it in version 4.x of this driver.  It did not improve</div><div class='del'>- performance at all and made the driver unstable (because I never found one</div><div class='del'>- of the two race conditions which were introduced by the multiple</div><div class='del'>- outstanding command code).  The instability seems a very high price to pay</div><div class='del'>- just so that you don't have to wait for the tape to rewind.  If you want</div><div class='del'>- this feature implemented, send me patches.  I'll be happy to send a copy</div><div class='del'>- of my (broken) driver to anyone who would like to see a copy.</div><div class='del'>-</div><div class='del'>- **************************************************************************/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/blkdev.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/proc_fs.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;scsi/scsicam.h&gt;</div><div class='del'>-#include &lt;linux/mca-legacy.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include "scsi.h"</div><div class='del'>-#include &lt;scsi/scsi_host.h&gt;</div><div class='del'>-</div><div class='del'>-#define DRIVER_VERSION "v0.2 by ZP Gu&lt;zpg@castle.net&gt;"</div><div class='del'>-</div><div class='del'>-/* START OF USER DEFINABLE OPTIONS */</div><div class='del'>-</div><div class='del'>-#define DEBUG            0	/* Enable debugging output */</div><div class='del'>-#define ENABLE_PARITY    1	/* Enable SCSI Parity */</div><div class='del'>-</div><div class='del'>-/* END OF USER DEFINABLE OPTIONS */</div><div class='del'>-</div><div class='del'>-#if DEBUG</div><div class='del'>-#define EVERY_ACCESS     0	/* Write a line on every scsi access */</div><div class='del'>-#define ERRORS_ONLY      1	/* Only write a line if there is an error */</div><div class='del'>-#define DEBUG_MESSAGES   1	/* Debug MESSAGE IN phase */</div><div class='del'>-#define DEBUG_ABORT      1	/* Debug abort() routine */</div><div class='del'>-#define DEBUG_RESET      1	/* Debug reset() routine */</div><div class='del'>-#define DEBUG_RACE       1	/* Debug interrupt-driven race condition */</div><div class='del'>-#else</div><div class='del'>-#define EVERY_ACCESS     0	/* LEAVE THESE ALONE--CHANGE THE ONES ABOVE */</div><div class='del'>-#define ERRORS_ONLY      0</div><div class='del'>-#define DEBUG_MESSAGES   0</div><div class='del'>-#define DEBUG_ABORT      0</div><div class='del'>-#define DEBUG_RESET      0</div><div class='del'>-#define DEBUG_RACE       0</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* Errors are reported on the line, so we don't need to report them again */</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-#undef ERRORS_ONLY</div><div class='del'>-#define ERRORS_ONLY      0</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if ENABLE_PARITY</div><div class='del'>-#define PARITY_MASK      0x08</div><div class='del'>-#else</div><div class='del'>-#define PARITY_MASK      0x00</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-enum chip_type {</div><div class='del'>-	unknown = 0x00,</div><div class='del'>-	tmc1800 = 0x01,</div><div class='del'>-	tmc18c50 = 0x02,</div><div class='del'>-	tmc18c30 = 0x03,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	in_arbitration = 0x02,</div><div class='del'>-	in_selection = 0x04,</div><div class='del'>-	in_other = 0x08,</div><div class='del'>-	disconnect = 0x10,</div><div class='del'>-	aborted = 0x20,</div><div class='del'>-	sent_ident = 0x40,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum in_port_type {</div><div class='del'>-	Read_SCSI_Data = 0,</div><div class='del'>-	SCSI_Status = 1,</div><div class='del'>-	TMC_Status = 2,</div><div class='del'>-	FIFO_Status = 3,	/* tmc18c50/tmc18c30 only */</div><div class='del'>-	Interrupt_Cond = 4,	/* tmc18c50/tmc18c30 only */</div><div class='del'>-	LSB_ID_Code = 5,</div><div class='del'>-	MSB_ID_Code = 6,</div><div class='del'>-	Read_Loopback = 7,</div><div class='del'>-	SCSI_Data_NoACK = 8,</div><div class='del'>-	Interrupt_Status = 9,</div><div class='del'>-	Configuration1 = 10,</div><div class='del'>-	Configuration2 = 11,	/* tmc18c50/tmc18c30 only */</div><div class='del'>-	Read_FIFO = 12,</div><div class='del'>-	FIFO_Data_Count = 14</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum out_port_type {</div><div class='del'>-	Write_SCSI_Data = 0,</div><div class='del'>-	SCSI_Cntl = 1,</div><div class='del'>-	Interrupt_Cntl = 2,</div><div class='del'>-	SCSI_Mode_Cntl = 3,</div><div class='del'>-	TMC_Cntl = 4,</div><div class='del'>-	Memory_Cntl = 5,	/* tmc18c50/tmc18c30 only */</div><div class='del'>-	Write_Loopback = 7,</div><div class='del'>-	IO_Control = 11,	/* tmc18c30 only */</div><div class='del'>-	Write_FIFO = 12</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct fd_hostdata {</div><div class='del'>-	unsigned long _bios_base;</div><div class='del'>-	int _bios_major;</div><div class='del'>-	int _bios_minor;</div><div class='del'>-	volatile int _in_command;</div><div class='del'>-	Scsi_Cmnd *_current_SC;</div><div class='del'>-	enum chip_type _chip;</div><div class='del'>-	int _adapter_mask;</div><div class='del'>-	int _fifo_count;	/* Number of 512 byte blocks before INTR */</div><div class='del'>-</div><div class='del'>-	char _adapter_name[64];</div><div class='del'>-#if DEBUG_RACE</div><div class='del'>-	volatile int _in_interrupt_flag;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	int _SCSI_Mode_Cntl_port;</div><div class='del'>-	int _FIFO_Data_Count_port;</div><div class='del'>-	int _Interrupt_Cntl_port;</div><div class='del'>-	int _Interrupt_Status_port;</div><div class='del'>-	int _Interrupt_Cond_port;</div><div class='del'>-	int _Read_FIFO_port;</div><div class='del'>-	int _Read_SCSI_Data_port;</div><div class='del'>-	int _SCSI_Cntl_port;</div><div class='del'>-	int _SCSI_Data_NoACK_port;</div><div class='del'>-	int _SCSI_Status_port;</div><div class='del'>-	int _TMC_Cntl_port;</div><div class='del'>-	int _TMC_Status_port;</div><div class='del'>-	int _Write_FIFO_port;</div><div class='del'>-	int _Write_SCSI_Data_port;</div><div class='del'>-</div><div class='del'>-	int _FIFO_Size;		/* = 0x2000;  8k FIFO for</div><div class='del'>-				   pre-tmc18c30 chips */</div><div class='del'>-	/* simple stats */</div><div class='del'>-	int _Bytes_Read;</div><div class='del'>-	int _Bytes_Written;</div><div class='del'>-	int _INTR_Processed;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define FD_MAX_HOSTS 3		/* enough? */</div><div class='del'>-</div><div class='del'>-#define HOSTDATA(shpnt) ((struct fd_hostdata *) shpnt-&gt;hostdata)</div><div class='del'>-#define bios_base             (HOSTDATA(shpnt)-&gt;_bios_base)</div><div class='del'>-#define bios_major            (HOSTDATA(shpnt)-&gt;_bios_major)</div><div class='del'>-#define bios_minor            (HOSTDATA(shpnt)-&gt;_bios_minor)</div><div class='del'>-#define in_command            (HOSTDATA(shpnt)-&gt;_in_command)</div><div class='del'>-#define current_SC            (HOSTDATA(shpnt)-&gt;_current_SC)</div><div class='del'>-#define chip                  (HOSTDATA(shpnt)-&gt;_chip)</div><div class='del'>-#define adapter_mask          (HOSTDATA(shpnt)-&gt;_adapter_mask)</div><div class='del'>-#define FIFO_COUNT            (HOSTDATA(shpnt)-&gt;_fifo_count)</div><div class='del'>-#define adapter_name          (HOSTDATA(shpnt)-&gt;_adapter_name)</div><div class='del'>-#if DEBUG_RACE</div><div class='del'>-#define in_interrupt_flag     (HOSTDATA(shpnt)-&gt;_in_interrupt_flag)</div><div class='del'>-#endif</div><div class='del'>-#define SCSI_Mode_Cntl_port   (HOSTDATA(shpnt)-&gt;_SCSI_Mode_Cntl_port)</div><div class='del'>-#define FIFO_Data_Count_port  (HOSTDATA(shpnt)-&gt;_FIFO_Data_Count_port)</div><div class='del'>-#define Interrupt_Cntl_port   (HOSTDATA(shpnt)-&gt;_Interrupt_Cntl_port)</div><div class='del'>-#define Interrupt_Status_port (HOSTDATA(shpnt)-&gt;_Interrupt_Status_port)</div><div class='del'>-#define Interrupt_Cond_port   (HOSTDATA(shpnt)-&gt;_Interrupt_Cond_port)</div><div class='del'>-#define Read_FIFO_port        (HOSTDATA(shpnt)-&gt;_Read_FIFO_port)</div><div class='del'>-#define Read_SCSI_Data_port   (HOSTDATA(shpnt)-&gt;_Read_SCSI_Data_port)</div><div class='del'>-#define SCSI_Cntl_port        (HOSTDATA(shpnt)-&gt;_SCSI_Cntl_port)</div><div class='del'>-#define SCSI_Data_NoACK_port  (HOSTDATA(shpnt)-&gt;_SCSI_Data_NoACK_port)</div><div class='del'>-#define SCSI_Status_port      (HOSTDATA(shpnt)-&gt;_SCSI_Status_port)</div><div class='del'>-#define TMC_Cntl_port         (HOSTDATA(shpnt)-&gt;_TMC_Cntl_port)</div><div class='del'>-#define TMC_Status_port       (HOSTDATA(shpnt)-&gt;_TMC_Status_port)</div><div class='del'>-#define Write_FIFO_port       (HOSTDATA(shpnt)-&gt;_Write_FIFO_port)</div><div class='del'>-#define Write_SCSI_Data_port  (HOSTDATA(shpnt)-&gt;_Write_SCSI_Data_port)</div><div class='del'>-#define FIFO_Size             (HOSTDATA(shpnt)-&gt;_FIFO_Size)</div><div class='del'>-#define Bytes_Read            (HOSTDATA(shpnt)-&gt;_Bytes_Read)</div><div class='del'>-#define Bytes_Written         (HOSTDATA(shpnt)-&gt;_Bytes_Written)</div><div class='del'>-#define INTR_Processed        (HOSTDATA(shpnt)-&gt;_INTR_Processed)</div><div class='del'>-</div><div class='del'>-struct fd_mcs_adapters_struct {</div><div class='del'>-	char *name;</div><div class='del'>-	int id;</div><div class='del'>-	enum chip_type fd_chip;</div><div class='del'>-	int fifo_size;</div><div class='del'>-	int fifo_count;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define REPLY_ID 0x5137</div><div class='del'>-</div><div class='del'>-static struct fd_mcs_adapters_struct fd_mcs_adapters[] = {</div><div class='del'>-	{"Future Domain SCSI Adapter MCS-700(18C50)",</div><div class='del'>-	 0x60e9,</div><div class='del'>-	 tmc18c50,</div><div class='del'>-	 0x2000,</div><div class='del'>-	 4},</div><div class='del'>-	{"Future Domain SCSI Adapter MCS-600/700(TMC-1800)",</div><div class='del'>-	 0x6127,</div><div class='del'>-	 tmc1800,</div><div class='del'>-	 0x2000,</div><div class='del'>-	 4},</div><div class='del'>-	{"Reply Sound Blaster/SCSI Adapter",</div><div class='del'>-	 REPLY_ID,</div><div class='del'>-	 tmc18c30,</div><div class='del'>-	 0x800,</div><div class='del'>-	 2},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define FD_BRDS ARRAY_SIZE(fd_mcs_adapters)</div><div class='del'>-</div><div class='del'>-static irqreturn_t fd_mcs_intr(int irq, void *dev_id);</div><div class='del'>-</div><div class='del'>-static unsigned long addresses[] = { 0xc8000, 0xca000, 0xce000, 0xde000 };</div><div class='del'>-static unsigned short ports[] = { 0x140, 0x150, 0x160, 0x170 };</div><div class='del'>-static unsigned short interrupts[] = { 3, 5, 10, 11, 12, 14, 15, 0 };</div><div class='del'>-</div><div class='del'>-/* host information */</div><div class='del'>-static int found = 0;</div><div class='del'>-static struct Scsi_Host *hosts[FD_MAX_HOSTS + 1] = { NULL };</div><div class='del'>-</div><div class='del'>-static int user_fifo_count = 0;</div><div class='del'>-static int user_fifo_size = 0;</div><div class='del'>-</div><div class='del'>-#ifndef MODULE</div><div class='del'>-static int __init fd_mcs_setup(char *str)</div><div class='del'>-{</div><div class='del'>-	static int done_setup = 0;</div><div class='del'>-	int ints[3];</div><div class='del'>-</div><div class='del'>-	get_options(str, 3, ints);</div><div class='del'>-	if (done_setup++ || ints[0] &lt; 1 || ints[0] &gt; 2 || ints[1] &lt; 1 || ints[1] &gt; 16) {</div><div class='del'>-		printk("fd_mcs: usage: fd_mcs=FIFO_COUNT, FIFO_SIZE\n");</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	user_fifo_count = ints[0] &gt;= 1 ? ints[1] : 0;</div><div class='del'>-	user_fifo_size = ints[0] &gt;= 2 ? ints[2] : 0;</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__setup("fd_mcs=", fd_mcs_setup);</div><div class='del'>-#endif /* !MODULE */</div><div class='del'>-</div><div class='del'>-static void print_banner(struct Scsi_Host *shpnt)</div><div class='del'>-{</div><div class='del'>-	printk("scsi%d &lt;fd_mcs&gt;: ", shpnt-&gt;host_no);</div><div class='del'>-</div><div class='del'>-	if (bios_base) {</div><div class='del'>-		printk("BIOS at 0x%lX", bios_base);</div><div class='del'>-	} else {</div><div class='del'>-		printk("No BIOS");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk(", HostID %d, %s Chip, IRQ %d, IO 0x%lX\n", shpnt-&gt;this_id, chip == tmc18c50 ? "TMC-18C50" : (chip == tmc18c30 ? "TMC-18C30" : (chip == tmc1800 ? "TMC-1800" : "Unknown")), shpnt-&gt;irq, shpnt-&gt;io_port);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void do_pause(unsigned amount)</div><div class='del'>-{				/* Pause for amount*10 milliseconds */</div><div class='del'>-	do {</div><div class='del'>-		mdelay(10);</div><div class='del'>-	} while (--amount);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void fd_mcs_make_bus_idle(struct Scsi_Host *shpnt)</div><div class='del'>-{</div><div class='del'>-	outb(0, SCSI_Cntl_port);</div><div class='del'>-	outb(0, SCSI_Mode_Cntl_port);</div><div class='del'>-	if (chip == tmc18c50 || chip == tmc18c30)</div><div class='del'>-		outb(0x21 | PARITY_MASK, TMC_Cntl_port);	/* Clear forced intr. */</div><div class='del'>-	else</div><div class='del'>-		outb(0x01 | PARITY_MASK, TMC_Cntl_port);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fd_mcs_detect(struct scsi_host_template * tpnt)</div><div class='del'>-{</div><div class='del'>-	int loop;</div><div class='del'>-	struct Scsi_Host *shpnt;</div><div class='del'>-</div><div class='del'>-	/* get id, port, bios, irq */</div><div class='del'>-	int slot;</div><div class='del'>-	u_char pos2, pos3, pos4;</div><div class='del'>-	int id, port, irq;</div><div class='del'>-	unsigned long bios;</div><div class='del'>-</div><div class='del'>-	/* if not MCA machine, return */</div><div class='del'>-	if (!MCA_bus)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* changeable? */</div><div class='del'>-	id = 7;</div><div class='del'>-</div><div class='del'>-	for (loop = 0; loop &lt; FD_BRDS; loop++) {</div><div class='del'>-		slot = 0;</div><div class='del'>-		while (MCA_NOTFOUND != (slot = mca_find_adapter(fd_mcs_adapters[loop].id, slot))) {</div><div class='del'>-</div><div class='del'>-			/* if we get this far, an adapter has been detected and is</div><div class='del'>-			   enabled */</div><div class='del'>-</div><div class='del'>-			printk(KERN_INFO "scsi  &lt;fd_mcs&gt;: %s at slot %d\n", fd_mcs_adapters[loop].name, slot + 1);</div><div class='del'>-</div><div class='del'>-			pos2 = mca_read_stored_pos(slot, 2);</div><div class='del'>-			pos3 = mca_read_stored_pos(slot, 3);</div><div class='del'>-			pos4 = mca_read_stored_pos(slot, 4);</div><div class='del'>-</div><div class='del'>-			/* ready for next probe */</div><div class='del'>-			slot++;</div><div class='del'>-</div><div class='del'>-			if (fd_mcs_adapters[loop].id == REPLY_ID) {	/* reply card */</div><div class='del'>-				static int reply_irq[] = { 10, 11, 14, 15 };</div><div class='del'>-</div><div class='del'>-				bios = 0;	/* no bios */</div><div class='del'>-</div><div class='del'>-				if (pos2 &amp; 0x2)</div><div class='del'>-					port = ports[pos4 &amp; 0x3];</div><div class='del'>-				else</div><div class='del'>-					continue;</div><div class='del'>-</div><div class='del'>-				/* can't really disable it, same as irq=10 */</div><div class='del'>-				irq = reply_irq[((pos4 &gt;&gt; 2) &amp; 0x1) + 2 * ((pos4 &gt;&gt; 4) &amp; 0x1)];</div><div class='del'>-			} else {</div><div class='del'>-				bios = addresses[pos2 &gt;&gt; 6];</div><div class='del'>-				port = ports[(pos2 &gt;&gt; 4) &amp; 0x03];</div><div class='del'>-				irq = interrupts[(pos2 &gt;&gt; 1) &amp; 0x07];</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (irq) {</div><div class='del'>-				/* claim the slot */</div><div class='del'>-				mca_set_adapter_name(slot - 1, fd_mcs_adapters[loop].name);</div><div class='del'>-</div><div class='del'>-				/* check irq/region */</div><div class='del'>-				if (request_irq(irq, fd_mcs_intr, IRQF_SHARED, "fd_mcs", hosts)) {</div><div class='del'>-					printk(KERN_ERR "fd_mcs: interrupt is not available, skipping...\n");</div><div class='del'>-					continue;</div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-				/* request I/O region */</div><div class='del'>-				if (request_region(port, 0x10, "fd_mcs")) {</div><div class='del'>-					printk(KERN_ERR "fd_mcs: I/O region is already in use, skipping...\n");</div><div class='del'>-					continue;</div><div class='del'>-				}</div><div class='del'>-				/* register */</div><div class='del'>-				if (!(shpnt = scsi_register(tpnt, sizeof(struct fd_hostdata)))) {</div><div class='del'>-					printk(KERN_ERR "fd_mcs: scsi_register() failed\n");</div><div class='del'>-					release_region(port, 0x10);</div><div class='del'>-					free_irq(irq, hosts);</div><div class='del'>-					continue;</div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-				/* save name */</div><div class='del'>-				strcpy(adapter_name, fd_mcs_adapters[loop].name);</div><div class='del'>-</div><div class='del'>-				/* chip/fifo */</div><div class='del'>-				chip = fd_mcs_adapters[loop].fd_chip;</div><div class='del'>-				/* use boot time value if available */</div><div class='del'>-				FIFO_COUNT = user_fifo_count ? user_fifo_count : fd_mcs_adapters[loop].fifo_count;</div><div class='del'>-				FIFO_Size = user_fifo_size ? user_fifo_size : fd_mcs_adapters[loop].fifo_size;</div><div class='del'>-</div><div class='del'>-/* FIXME: Do we need to keep this bit of code inside NOT_USED around at all? */</div><div class='del'>-#ifdef NOT_USED</div><div class='del'>-				/* *************************************************** */</div><div class='del'>-				/* Try to toggle 32-bit mode.  This only</div><div class='del'>-				   works on an 18c30 chip.  (User reports</div><div class='del'>-				   say this works, so we should switch to</div><div class='del'>-				   it in the near future.) */</div><div class='del'>-				outb(0x80, port + IO_Control);</div><div class='del'>-				if ((inb(port + Configuration2) &amp; 0x80) == 0x80) {</div><div class='del'>-					outb(0x00, port + IO_Control);</div><div class='del'>-					if ((inb(port + Configuration2) &amp; 0x80) == 0x00) {</div><div class='del'>-						chip = tmc18c30;</div><div class='del'>-						FIFO_Size = 0x800;	/* 2k FIFO */</div><div class='del'>-</div><div class='del'>-						printk("FIRST: chip=%s, fifo_size=0x%x\n", (chip == tmc18c30) ? "tmc18c30" : "tmc18c50", FIFO_Size);</div><div class='del'>-					}</div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-				/* That should have worked, but appears to</div><div class='del'>-				   have problems.  Let's assume it is an</div><div class='del'>-				   18c30 if the RAM is disabled. */</div><div class='del'>-</div><div class='del'>-				if (inb(port + Configuration2) &amp; 0x02) {</div><div class='del'>-					chip = tmc18c30;</div><div class='del'>-					FIFO_Size = 0x800;	/* 2k FIFO */</div><div class='del'>-</div><div class='del'>-					printk("SECOND: chip=%s, fifo_size=0x%x\n", (chip == tmc18c30) ? "tmc18c30" : "tmc18c50", FIFO_Size);</div><div class='del'>-				}</div><div class='del'>-				/* *************************************************** */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-				/* IBM/ANSI scsi scan ordering */</div><div class='del'>-				/* Stick this back in when the scsi.c changes are there */</div><div class='del'>-				shpnt-&gt;reverse_ordering = 1;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-				/* saving info */</div><div class='del'>-				hosts[found++] = shpnt;</div><div class='del'>-</div><div class='del'>-				shpnt-&gt;this_id = id;</div><div class='del'>-				shpnt-&gt;irq = irq;</div><div class='del'>-				shpnt-&gt;io_port = port;</div><div class='del'>-				shpnt-&gt;n_io_port = 0x10;</div><div class='del'>-</div><div class='del'>-				/* save */</div><div class='del'>-				bios_base = bios;</div><div class='del'>-				adapter_mask = (1 &lt;&lt; id);</div><div class='del'>-</div><div class='del'>-				/* save more */</div><div class='del'>-				SCSI_Mode_Cntl_port = port + SCSI_Mode_Cntl;</div><div class='del'>-				FIFO_Data_Count_port = port + FIFO_Data_Count;</div><div class='del'>-				Interrupt_Cntl_port = port + Interrupt_Cntl;</div><div class='del'>-				Interrupt_Status_port = port + Interrupt_Status;</div><div class='del'>-				Interrupt_Cond_port = port + Interrupt_Cond;</div><div class='del'>-				Read_FIFO_port = port + Read_FIFO;</div><div class='del'>-				Read_SCSI_Data_port = port + Read_SCSI_Data;</div><div class='del'>-				SCSI_Cntl_port = port + SCSI_Cntl;</div><div class='del'>-				SCSI_Data_NoACK_port = port + SCSI_Data_NoACK;</div><div class='del'>-				SCSI_Status_port = port + SCSI_Status;</div><div class='del'>-				TMC_Cntl_port = port + TMC_Cntl;</div><div class='del'>-				TMC_Status_port = port + TMC_Status;</div><div class='del'>-				Write_FIFO_port = port + Write_FIFO;</div><div class='del'>-				Write_SCSI_Data_port = port + Write_SCSI_Data;</div><div class='del'>-</div><div class='del'>-				Bytes_Read = 0;</div><div class='del'>-				Bytes_Written = 0;</div><div class='del'>-				INTR_Processed = 0;</div><div class='del'>-</div><div class='del'>-				/* say something */</div><div class='del'>-				print_banner(shpnt);</div><div class='del'>-</div><div class='del'>-				/* reset */</div><div class='del'>-				outb(1, SCSI_Cntl_port);</div><div class='del'>-				do_pause(2);</div><div class='del'>-				outb(0, SCSI_Cntl_port);</div><div class='del'>-				do_pause(115);</div><div class='del'>-				outb(0, SCSI_Mode_Cntl_port);</div><div class='del'>-				outb(PARITY_MASK, TMC_Cntl_port);</div><div class='del'>-				/* done reset */</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (found == FD_MAX_HOSTS) {</div><div class='del'>-			printk("fd_mcs: detecting reached max=%d host adapters.\n", FD_MAX_HOSTS);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return found;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const char *fd_mcs_info(struct Scsi_Host *shpnt)</div><div class='del'>-{</div><div class='del'>-	return adapter_name;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int TOTAL_INTR = 0;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * inout : decides on the direction of the dataflow and the meaning of the </div><div class='del'>- *         variables</div><div class='del'>- * buffer: If inout==FALSE data is being written to it else read from it</div><div class='del'>- * *start: If inout==FALSE start of the valid data in the buffer</div><div class='del'>- * offset: If inout==FALSE offset from the beginning of the imaginary file </div><div class='del'>- *         from which we start writing into the buffer</div><div class='del'>- * length: If inout==FALSE max number of bytes to be written into the buffer </div><div class='del'>- *         else number of bytes in the buffer</div><div class='del'>- */</div><div class='del'>-static int fd_mcs_proc_info(struct Scsi_Host *shpnt, char *buffer, char **start, off_t offset, int length, int inout)</div><div class='del'>-{</div><div class='del'>-	int len = 0;</div><div class='del'>-</div><div class='del'>-	if (inout)</div><div class='del'>-		return (-ENOSYS);</div><div class='del'>-</div><div class='del'>-	*start = buffer + offset;</div><div class='del'>-</div><div class='del'>-	len += sprintf(buffer + len, "Future Domain MCS-600/700 Driver %s\n", DRIVER_VERSION);</div><div class='del'>-	len += sprintf(buffer + len, "HOST #%d: %s\n", shpnt-&gt;host_no, adapter_name);</div><div class='del'>-	len += sprintf(buffer + len, "FIFO Size=0x%x, FIFO Count=%d\n", FIFO_Size, FIFO_COUNT);</div><div class='del'>-	len += sprintf(buffer + len, "DriverCalls=%d, Interrupts=%d, BytesRead=%d, BytesWrite=%d\n\n", TOTAL_INTR, INTR_Processed, Bytes_Read, Bytes_Written);</div><div class='del'>-</div><div class='del'>-	if ((len -= offset) &lt;= 0)</div><div class='del'>-		return 0;</div><div class='del'>-	if (len &gt; length)</div><div class='del'>-		len = length;</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fd_mcs_select(struct Scsi_Host *shpnt, int target)</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-</div><div class='del'>-	outb(0x82, SCSI_Cntl_port);	/* Bus Enable + Select */</div><div class='del'>-	outb(adapter_mask | (1 &lt;&lt; target), SCSI_Data_NoACK_port);</div><div class='del'>-</div><div class='del'>-	/* Stop arbitration and enable parity */</div><div class='del'>-	outb(PARITY_MASK, TMC_Cntl_port);</div><div class='del'>-</div><div class='del'>-	timeout = 350;		/* 350mS -- because of timeouts</div><div class='del'>-				   (was 250mS) */</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		status = inb(SCSI_Status_port);	/* Read adapter status */</div><div class='del'>-		if (status &amp; 1) {	/* Busy asserted */</div><div class='del'>-			/* Enable SCSI Bus (on error, should make bus idle with 0) */</div><div class='del'>-			outb(0x80, SCSI_Cntl_port);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		udelay(1000);	/* wait one msec */</div><div class='del'>-	} while (--timeout);</div><div class='del'>-</div><div class='del'>-	/* Make bus idle */</div><div class='del'>-	fd_mcs_make_bus_idle(shpnt);</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-	if (!target)</div><div class='del'>-		printk("Selection failed\n");</div><div class='del'>-#endif</div><div class='del'>-#if ERRORS_ONLY</div><div class='del'>-	if (!target) {</div><div class='del'>-		static int flag = 0;</div><div class='del'>-</div><div class='del'>-		if (!flag)	/* Skip first failure for all chips. */</div><div class='del'>-			++flag;</div><div class='del'>-		else</div><div class='del'>-			printk("fd_mcs: Selection failed\n");</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void my_done(struct Scsi_Host *shpnt, int error)</div><div class='del'>-{</div><div class='del'>-	if (in_command) {</div><div class='del'>-		in_command = 0;</div><div class='del'>-		outb(0x00, Interrupt_Cntl_port);</div><div class='del'>-		fd_mcs_make_bus_idle(shpnt);</div><div class='del'>-		current_SC-&gt;result = error;</div><div class='del'>-		current_SC-&gt;scsi_done(current_SC);</div><div class='del'>-	} else {</div><div class='del'>-		panic("fd_mcs: my_done() called outside of command\n");</div><div class='del'>-	}</div><div class='del'>-#if DEBUG_RACE</div><div class='del'>-	in_interrupt_flag = 0;</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* only my_done needs to be protected  */</div><div class='del'>-static irqreturn_t fd_mcs_intr(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int status;</div><div class='del'>-	int done = 0;</div><div class='del'>-	unsigned data_count, tmp_count;</div><div class='del'>-</div><div class='del'>-	int i = 0;</div><div class='del'>-	struct Scsi_Host *shpnt;</div><div class='del'>-</div><div class='del'>-	TOTAL_INTR++;</div><div class='del'>-</div><div class='del'>-	/* search for one adapter-response on shared interrupt */</div><div class='del'>-	while ((shpnt = hosts[i++])) {</div><div class='del'>-		if ((inb(TMC_Status_port)) &amp; 1)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* return if some other device on this IRQ caused the interrupt */</div><div class='del'>-	if (!shpnt) {</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	INTR_Processed++;</div><div class='del'>-</div><div class='del'>-	outb(0x00, Interrupt_Cntl_port);</div><div class='del'>-</div><div class='del'>-	/* Abort calls my_done, so we do nothing here. */</div><div class='del'>-	if (current_SC-&gt;SCp.phase &amp; aborted) {</div><div class='del'>-#if DEBUG_ABORT</div><div class='del'>-		printk("Interrupt after abort, ignoring\n");</div><div class='del'>-#endif</div><div class='del'>-		/* return IRQ_HANDLED; */</div><div class='del'>-	}</div><div class='del'>-#if DEBUG_RACE</div><div class='del'>-	++in_interrupt_flag;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (current_SC-&gt;SCp.phase &amp; in_arbitration) {</div><div class='del'>-		status = inb(TMC_Status_port);	/* Read adapter status */</div><div class='del'>-		if (!(status &amp; 0x02)) {</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-			printk(" AFAIL ");</div><div class='del'>-#endif</div><div class='del'>-			spin_lock_irqsave(shpnt-&gt;host_lock, flags);</div><div class='del'>-			my_done(shpnt, DID_BUS_BUSY &lt;&lt; 16);</div><div class='del'>-			spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-			return IRQ_HANDLED;</div><div class='del'>-		}</div><div class='del'>-		current_SC-&gt;SCp.phase = in_selection;</div><div class='del'>-</div><div class='del'>-		outb(0x40 | FIFO_COUNT, Interrupt_Cntl_port);</div><div class='del'>-</div><div class='del'>-		outb(0x82, SCSI_Cntl_port);	/* Bus Enable + Select */</div><div class='del'>-		outb(adapter_mask | (1 &lt;&lt; scmd_id(current_SC)), SCSI_Data_NoACK_port);</div><div class='del'>-</div><div class='del'>-		/* Stop arbitration and enable parity */</div><div class='del'>-		outb(0x10 | PARITY_MASK, TMC_Cntl_port);</div><div class='del'>-#if DEBUG_RACE</div><div class='del'>-		in_interrupt_flag = 0;</div><div class='del'>-#endif</div><div class='del'>-		return IRQ_HANDLED;</div><div class='del'>-	} else if (current_SC-&gt;SCp.phase &amp; in_selection) {</div><div class='del'>-		status = inb(SCSI_Status_port);</div><div class='del'>-		if (!(status &amp; 0x01)) {</div><div class='del'>-			/* Try again, for slow devices */</div><div class='del'>-			if (fd_mcs_select(shpnt, scmd_id(current_SC))) {</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-				printk(" SFAIL ");</div><div class='del'>-#endif</div><div class='del'>-				spin_lock_irqsave(shpnt-&gt;host_lock, flags);</div><div class='del'>-				my_done(shpnt, DID_NO_CONNECT &lt;&lt; 16);</div><div class='del'>-				spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-				return IRQ_HANDLED;</div><div class='del'>-			} else {</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-				printk(" AltSel ");</div><div class='del'>-#endif</div><div class='del'>-				/* Stop arbitration and enable parity */</div><div class='del'>-				outb(0x10 | PARITY_MASK, TMC_Cntl_port);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		current_SC-&gt;SCp.phase = in_other;</div><div class='del'>-		outb(0x90 | FIFO_COUNT, Interrupt_Cntl_port);</div><div class='del'>-		outb(0x80, SCSI_Cntl_port);</div><div class='del'>-#if DEBUG_RACE</div><div class='del'>-		in_interrupt_flag = 0;</div><div class='del'>-#endif</div><div class='del'>-		return IRQ_HANDLED;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* current_SC-&gt;SCp.phase == in_other: this is the body of the routine */</div><div class='del'>-</div><div class='del'>-	status = inb(SCSI_Status_port);</div><div class='del'>-</div><div class='del'>-	if (status &amp; 0x10) {	/* REQ */</div><div class='del'>-</div><div class='del'>-		switch (status &amp; 0x0e) {</div><div class='del'>-</div><div class='del'>-		case 0x08:	/* COMMAND OUT */</div><div class='del'>-			outb(current_SC-&gt;cmnd[current_SC-&gt;SCp.sent_command++], Write_SCSI_Data_port);</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-			printk("CMD = %x,", current_SC-&gt;cmnd[current_SC-&gt;SCp.sent_command - 1]);</div><div class='del'>-#endif</div><div class='del'>-			break;</div><div class='del'>-		case 0x00:	/* DATA OUT -- tmc18c50/tmc18c30 only */</div><div class='del'>-			if (chip != tmc1800 &amp;&amp; !current_SC-&gt;SCp.have_data_in) {</div><div class='del'>-				current_SC-&gt;SCp.have_data_in = -1;</div><div class='del'>-				outb(0xd0 | PARITY_MASK, TMC_Cntl_port);</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 0x04:	/* DATA IN -- tmc18c50/tmc18c30 only */</div><div class='del'>-			if (chip != tmc1800 &amp;&amp; !current_SC-&gt;SCp.have_data_in) {</div><div class='del'>-				current_SC-&gt;SCp.have_data_in = 1;</div><div class='del'>-				outb(0x90 | PARITY_MASK, TMC_Cntl_port);</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 0x0c:	/* STATUS IN */</div><div class='del'>-			current_SC-&gt;SCp.Status = inb(Read_SCSI_Data_port);</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-			printk("Status = %x, ", current_SC-&gt;SCp.Status);</div><div class='del'>-#endif</div><div class='del'>-#if ERRORS_ONLY</div><div class='del'>-			if (current_SC-&gt;SCp.Status &amp;&amp; current_SC-&gt;SCp.Status != 2 &amp;&amp; current_SC-&gt;SCp.Status != 8) {</div><div class='del'>-				printk("ERROR fd_mcs: target = %d, command = %x, status = %x\n", current_SC-&gt;device-&gt;id, current_SC-&gt;cmnd[0], current_SC-&gt;SCp.Status);</div><div class='del'>-			}</div><div class='del'>-#endif</div><div class='del'>-			break;</div><div class='del'>-		case 0x0a:	/* MESSAGE OUT */</div><div class='del'>-			outb(MESSAGE_REJECT, Write_SCSI_Data_port);	/* Reject */</div><div class='del'>-			break;</div><div class='del'>-		case 0x0e:	/* MESSAGE IN */</div><div class='del'>-			current_SC-&gt;SCp.Message = inb(Read_SCSI_Data_port);</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-			printk("Message = %x, ", current_SC-&gt;SCp.Message);</div><div class='del'>-#endif</div><div class='del'>-			if (!current_SC-&gt;SCp.Message)</div><div class='del'>-				++done;</div><div class='del'>-#if DEBUG_MESSAGES || EVERY_ACCESS</div><div class='del'>-			if (current_SC-&gt;SCp.Message) {</div><div class='del'>-				printk("fd_mcs: message = %x\n", current_SC-&gt;SCp.Message);</div><div class='del'>-			}</div><div class='del'>-#endif</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (chip == tmc1800 &amp;&amp; !current_SC-&gt;SCp.have_data_in &amp;&amp; (current_SC-&gt;SCp.sent_command &gt;= current_SC-&gt;cmd_len)) {</div><div class='del'>-		/* We have to get the FIFO direction</div><div class='del'>-		   correct, so I've made a table based</div><div class='del'>-		   on the SCSI Standard of which commands</div><div class='del'>-		   appear to require a DATA OUT phase.</div><div class='del'>-		 */</div><div class='del'>-		/*</div><div class='del'>-		   p. 94: Command for all device types</div><div class='del'>-		   CHANGE DEFINITION            40 DATA OUT</div><div class='del'>-		   COMPARE                      39 DATA OUT</div><div class='del'>-		   COPY                         18 DATA OUT</div><div class='del'>-		   COPY AND VERIFY              3a DATA OUT</div><div class='del'>-		   INQUIRY                      12 </div><div class='del'>-		   LOG SELECT                   4c DATA OUT</div><div class='del'>-		   LOG SENSE                    4d</div><div class='del'>-		   MODE SELECT (6)              15 DATA OUT</div><div class='del'>-		   MODE SELECT (10)             55 DATA OUT</div><div class='del'>-		   MODE SENSE (6)               1a</div><div class='del'>-		   MODE SENSE (10)              5a</div><div class='del'>-		   READ BUFFER                  3c</div><div class='del'>-		   RECEIVE DIAGNOSTIC RESULTS   1c</div><div class='del'>-		   REQUEST SENSE                03</div><div class='del'>-		   SEND DIAGNOSTIC              1d DATA OUT</div><div class='del'>-		   TEST UNIT READY              00</div><div class='del'>-		   WRITE BUFFER                 3b DATA OUT</div><div class='del'>-</div><div class='del'>-		   p.178: Commands for direct-access devices (not listed on p. 94)</div><div class='del'>-		   FORMAT UNIT                  04 DATA OUT</div><div class='del'>-		   LOCK-UNLOCK CACHE            36</div><div class='del'>-		   PRE-FETCH                    34</div><div class='del'>-		   PREVENT-ALLOW MEDIUM REMOVAL 1e</div><div class='del'>-		   READ (6)/RECEIVE             08</div><div class='del'>-		   READ (10)                    3c</div><div class='del'>-		   READ CAPACITY                25</div><div class='del'>-		   READ DEFECT DATA (10)        37</div><div class='del'>-		   READ LONG                    3e</div><div class='del'>-		   REASSIGN BLOCKS              07 DATA OUT</div><div class='del'>-		   RELEASE                      17</div><div class='del'>-		   RESERVE                      16 DATA OUT</div><div class='del'>-		   REZERO UNIT/REWIND           01</div><div class='del'>-		   SEARCH DATA EQUAL (10)       31 DATA OUT</div><div class='del'>-		   SEARCH DATA HIGH (10)        30 DATA OUT</div><div class='del'>-		   SEARCH DATA LOW (10)         32 DATA OUT</div><div class='del'>-		   SEEK (6)                     0b</div><div class='del'>-		   SEEK (10)                    2b</div><div class='del'>-		   SET LIMITS (10)              33</div><div class='del'>-		   START STOP UNIT              1b</div><div class='del'>-		   SYNCHRONIZE CACHE            35</div><div class='del'>-		   VERIFY (10)                  2f</div><div class='del'>-		   WRITE (6)/PRINT/SEND         0a DATA OUT</div><div class='del'>-		   WRITE (10)/SEND              2a DATA OUT</div><div class='del'>-		   WRITE AND VERIFY (10)        2e DATA OUT</div><div class='del'>-		   WRITE LONG                   3f DATA OUT</div><div class='del'>-		   WRITE SAME                   41 DATA OUT ?</div><div class='del'>-</div><div class='del'>-		   p. 261: Commands for sequential-access devices (not previously listed)</div><div class='del'>-		   ERASE                        19</div><div class='del'>-		   LOAD UNLOAD                  1b</div><div class='del'>-		   LOCATE                       2b</div><div class='del'>-		   READ BLOCK LIMITS            05</div><div class='del'>-		   READ POSITION                34</div><div class='del'>-		   READ REVERSE                 0f</div><div class='del'>-		   RECOVER BUFFERED DATA        14</div><div class='del'>-		   SPACE                        11</div><div class='del'>-		   WRITE FILEMARKS              10 ?</div><div class='del'>-</div><div class='del'>-		   p. 298: Commands for printer devices (not previously listed)</div><div class='del'>-		   ****** NOT SUPPORTED BY THIS DRIVER, since 0b is SEEK (6) *****</div><div class='del'>-		   SLEW AND PRINT               0b DATA OUT  -- same as seek</div><div class='del'>-		   STOP PRINT                   1b</div><div class='del'>-		   SYNCHRONIZE BUFFER           10</div><div class='del'>-</div><div class='del'>-		   p. 315: Commands for processor devices (not previously listed)</div><div class='del'>-</div><div class='del'>-		   p. 321: Commands for write-once devices (not previously listed)</div><div class='del'>-		   MEDIUM SCAN                  38</div><div class='del'>-		   READ (12)                    a8</div><div class='del'>-		   SEARCH DATA EQUAL (12)       b1 DATA OUT</div><div class='del'>-		   SEARCH DATA HIGH (12)        b0 DATA OUT</div><div class='del'>-		   SEARCH DATA LOW (12)         b2 DATA OUT</div><div class='del'>-		   SET LIMITS (12)              b3</div><div class='del'>-		   VERIFY (12)                  af</div><div class='del'>-		   WRITE (12)                   aa DATA OUT</div><div class='del'>-		   WRITE AND VERIFY (12)        ae DATA OUT</div><div class='del'>-</div><div class='del'>-		   p. 332: Commands for CD-ROM devices (not previously listed)</div><div class='del'>-		   PAUSE/RESUME                 4b</div><div class='del'>-		   PLAY AUDIO (10)              45</div><div class='del'>-		   PLAY AUDIO (12)              a5</div><div class='del'>-		   PLAY AUDIO MSF               47</div><div class='del'>-		   PLAY TRACK RELATIVE (10)     49</div><div class='del'>-		   PLAY TRACK RELATIVE (12)     a9</div><div class='del'>-		   READ HEADER                  44</div><div class='del'>-		   READ SUB-CHANNEL             42</div><div class='del'>-		   READ TOC                     43</div><div class='del'>-</div><div class='del'>-		   p. 370: Commands for scanner devices (not previously listed)</div><div class='del'>-		   GET DATA BUFFER STATUS       34</div><div class='del'>-		   GET WINDOW                   25</div><div class='del'>-		   OBJECT POSITION              31</div><div class='del'>-		   SCAN                         1b</div><div class='del'>-		   SET WINDOW                   24 DATA OUT</div><div class='del'>-</div><div class='del'>-		   p. 391: Commands for optical memory devices (not listed)</div><div class='del'>-		   ERASE (10)                   2c</div><div class='del'>-		   ERASE (12)                   ac</div><div class='del'>-		   MEDIUM SCAN                  38 DATA OUT</div><div class='del'>-		   READ DEFECT DATA (12)        b7</div><div class='del'>-		   READ GENERATION              29</div><div class='del'>-		   READ UPDATED BLOCK           2d</div><div class='del'>-		   UPDATE BLOCK                 3d DATA OUT</div><div class='del'>-</div><div class='del'>-		   p. 419: Commands for medium changer devices (not listed)</div><div class='del'>-		   EXCHANGE MEDIUM              46</div><div class='del'>-		   INITIALIZE ELEMENT STATUS    07</div><div class='del'>-		   MOVE MEDIUM                  a5</div><div class='del'>-		   POSITION TO ELEMENT          2b</div><div class='del'>-		   READ ELEMENT STATUS          b8</div><div class='del'>-		   REQUEST VOL. ELEMENT ADDRESS b5</div><div class='del'>-		   SEND VOLUME TAG              b6 DATA OUT</div><div class='del'>-</div><div class='del'>-		   p. 454: Commands for communications devices (not listed previously)</div><div class='del'>-		   GET MESSAGE (6)              08</div><div class='del'>-		   GET MESSAGE (10)             28</div><div class='del'>-		   GET MESSAGE (12)             a8</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		switch (current_SC-&gt;cmnd[0]) {</div><div class='del'>-		case CHANGE_DEFINITION:</div><div class='del'>-		case COMPARE:</div><div class='del'>-		case COPY:</div><div class='del'>-		case COPY_VERIFY:</div><div class='del'>-		case LOG_SELECT:</div><div class='del'>-		case MODE_SELECT:</div><div class='del'>-		case MODE_SELECT_10:</div><div class='del'>-		case SEND_DIAGNOSTIC:</div><div class='del'>-		case WRITE_BUFFER:</div><div class='del'>-</div><div class='del'>-		case FORMAT_UNIT:</div><div class='del'>-		case REASSIGN_BLOCKS:</div><div class='del'>-		case RESERVE:</div><div class='del'>-		case SEARCH_EQUAL:</div><div class='del'>-		case SEARCH_HIGH:</div><div class='del'>-		case SEARCH_LOW:</div><div class='del'>-		case WRITE_6:</div><div class='del'>-		case WRITE_10:</div><div class='del'>-		case WRITE_VERIFY:</div><div class='del'>-		case 0x3f:</div><div class='del'>-		case 0x41:</div><div class='del'>-</div><div class='del'>-		case 0xb1:</div><div class='del'>-		case 0xb0:</div><div class='del'>-		case 0xb2:</div><div class='del'>-		case 0xaa:</div><div class='del'>-		case 0xae:</div><div class='del'>-</div><div class='del'>-		case 0x24:</div><div class='del'>-</div><div class='del'>-		case 0x38:</div><div class='del'>-		case 0x3d:</div><div class='del'>-</div><div class='del'>-		case 0xb6:</div><div class='del'>-</div><div class='del'>-		case 0xea:	/* alternate number for WRITE LONG */</div><div class='del'>-</div><div class='del'>-			current_SC-&gt;SCp.have_data_in = -1;</div><div class='del'>-			outb(0xd0 | PARITY_MASK, TMC_Cntl_port);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case 0x00:</div><div class='del'>-		default:</div><div class='del'>-</div><div class='del'>-			current_SC-&gt;SCp.have_data_in = 1;</div><div class='del'>-			outb(0x90 | PARITY_MASK, TMC_Cntl_port);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (current_SC-&gt;SCp.have_data_in == -1) {	/* DATA OUT */</div><div class='del'>-		while ((data_count = FIFO_Size - inw(FIFO_Data_Count_port)) &gt; 512) {</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-			printk("DC=%d, ", data_count);</div><div class='del'>-#endif</div><div class='del'>-			if (data_count &gt; current_SC-&gt;SCp.this_residual)</div><div class='del'>-				data_count = current_SC-&gt;SCp.this_residual;</div><div class='del'>-			if (data_count &gt; 0) {</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-				printk("%d OUT, ", data_count);</div><div class='del'>-#endif</div><div class='del'>-				if (data_count == 1) {</div><div class='del'>-					Bytes_Written++;</div><div class='del'>-</div><div class='del'>-					outb(*current_SC-&gt;SCp.ptr++, Write_FIFO_port);</div><div class='del'>-					--current_SC-&gt;SCp.this_residual;</div><div class='del'>-				} else {</div><div class='del'>-					data_count &gt;&gt;= 1;</div><div class='del'>-					tmp_count = data_count &lt;&lt; 1;</div><div class='del'>-					outsw(Write_FIFO_port, current_SC-&gt;SCp.ptr, data_count);</div><div class='del'>-					current_SC-&gt;SCp.ptr += tmp_count;</div><div class='del'>-					Bytes_Written += tmp_count;</div><div class='del'>-					current_SC-&gt;SCp.this_residual -= tmp_count;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-			if (!current_SC-&gt;SCp.this_residual) {</div><div class='del'>-				if (current_SC-&gt;SCp.buffers_residual) {</div><div class='del'>-					--current_SC-&gt;SCp.buffers_residual;</div><div class='del'>-					++current_SC-&gt;SCp.buffer;</div><div class='del'>-					current_SC-&gt;SCp.ptr = sg_virt(current_SC-&gt;SCp.buffer);</div><div class='del'>-					current_SC-&gt;SCp.this_residual = current_SC-&gt;SCp.buffer-&gt;length;</div><div class='del'>-				} else</div><div class='del'>-					break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	} else if (current_SC-&gt;SCp.have_data_in == 1) {	/* DATA IN */</div><div class='del'>-		while ((data_count = inw(FIFO_Data_Count_port)) &gt; 0) {</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-			printk("DC=%d, ", data_count);</div><div class='del'>-#endif</div><div class='del'>-			if (data_count &gt; current_SC-&gt;SCp.this_residual)</div><div class='del'>-				data_count = current_SC-&gt;SCp.this_residual;</div><div class='del'>-			if (data_count) {</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-				printk("%d IN, ", data_count);</div><div class='del'>-#endif</div><div class='del'>-				if (data_count == 1) {</div><div class='del'>-					Bytes_Read++;</div><div class='del'>-					*current_SC-&gt;SCp.ptr++ = inb(Read_FIFO_port);</div><div class='del'>-					--current_SC-&gt;SCp.this_residual;</div><div class='del'>-				} else {</div><div class='del'>-					data_count &gt;&gt;= 1;	/* Number of words */</div><div class='del'>-					tmp_count = data_count &lt;&lt; 1;</div><div class='del'>-					insw(Read_FIFO_port, current_SC-&gt;SCp.ptr, data_count);</div><div class='del'>-					current_SC-&gt;SCp.ptr += tmp_count;</div><div class='del'>-					Bytes_Read += tmp_count;</div><div class='del'>-					current_SC-&gt;SCp.this_residual -= tmp_count;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-			if (!current_SC-&gt;SCp.this_residual &amp;&amp; current_SC-&gt;SCp.buffers_residual) {</div><div class='del'>-				--current_SC-&gt;SCp.buffers_residual;</div><div class='del'>-				++current_SC-&gt;SCp.buffer;</div><div class='del'>-				current_SC-&gt;SCp.ptr = sg_virt(current_SC-&gt;SCp.buffer);</div><div class='del'>-				current_SC-&gt;SCp.this_residual = current_SC-&gt;SCp.buffer-&gt;length;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (done) {</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-		printk(" ** IN DONE %d ** ", current_SC-&gt;SCp.have_data_in);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-		printk("BEFORE MY_DONE. . .");</div><div class='del'>-#endif</div><div class='del'>-		spin_lock_irqsave(shpnt-&gt;host_lock, flags);</div><div class='del'>-		my_done(shpnt, (current_SC-&gt;SCp.Status &amp; 0xff)</div><div class='del'>-			| ((current_SC-&gt;SCp.Message &amp; 0xff) &lt;&lt; 8) | (DID_OK &lt;&lt; 16));</div><div class='del'>-		spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-		printk("RETURNING.\n");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-		if (current_SC-&gt;SCp.phase &amp; disconnect) {</div><div class='del'>-			outb(0xd0 | FIFO_COUNT, Interrupt_Cntl_port);</div><div class='del'>-			outb(0x00, SCSI_Cntl_port);</div><div class='del'>-		} else {</div><div class='del'>-			outb(0x90 | FIFO_COUNT, Interrupt_Cntl_port);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-#if DEBUG_RACE</div><div class='del'>-	in_interrupt_flag = 0;</div><div class='del'>-#endif</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fd_mcs_release(struct Scsi_Host *shpnt)</div><div class='del'>-{</div><div class='del'>-	int i, this_host, irq_usage;</div><div class='del'>-</div><div class='del'>-	release_region(shpnt-&gt;io_port, shpnt-&gt;n_io_port);</div><div class='del'>-</div><div class='del'>-	this_host = -1;</div><div class='del'>-	irq_usage = 0;</div><div class='del'>-	for (i = 0; i &lt; found; i++) {</div><div class='del'>-		if (shpnt == hosts[i])</div><div class='del'>-			this_host = i;</div><div class='del'>-		if (shpnt-&gt;irq == hosts[i]-&gt;irq)</div><div class='del'>-			irq_usage++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* only for the last one */</div><div class='del'>-	if (1 == irq_usage)</div><div class='del'>-		free_irq(shpnt-&gt;irq, hosts);</div><div class='del'>-</div><div class='del'>-	found--;</div><div class='del'>-</div><div class='del'>-	for (i = this_host; i &lt; found; i++)</div><div class='del'>-		hosts[i] = hosts[i + 1];</div><div class='del'>-</div><div class='del'>-	hosts[found] = NULL;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fd_mcs_queue_lck(Scsi_Cmnd * SCpnt, void (*done) (Scsi_Cmnd *))</div><div class='del'>-{</div><div class='del'>-	struct Scsi_Host *shpnt = SCpnt-&gt;device-&gt;host;</div><div class='del'>-</div><div class='del'>-	if (in_command) {</div><div class='del'>-		panic("fd_mcs: fd_mcs_queue() NOT REENTRANT!\n");</div><div class='del'>-	}</div><div class='del'>-#if EVERY_ACCESS</div><div class='del'>-	printk("queue: target = %d cmnd = 0x%02x pieces = %d size = %u\n",</div><div class='del'>-		SCpnt-&gt;target, *(unsigned char *) SCpnt-&gt;cmnd,</div><div class='del'>-		scsi_sg_count(SCpnt), scsi_bufflen(SCpnt));</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	fd_mcs_make_bus_idle(shpnt);</div><div class='del'>-</div><div class='del'>-	SCpnt-&gt;scsi_done = done;	/* Save this for the done function */</div><div class='del'>-	current_SC = SCpnt;</div><div class='del'>-</div><div class='del'>-	/* Initialize static data */</div><div class='del'>-</div><div class='del'>-	if (scsi_bufflen(current_SC)) {</div><div class='del'>-		current_SC-&gt;SCp.buffer = scsi_sglist(current_SC);</div><div class='del'>-		current_SC-&gt;SCp.ptr = sg_virt(current_SC-&gt;SCp.buffer);</div><div class='del'>-		current_SC-&gt;SCp.this_residual = current_SC-&gt;SCp.buffer-&gt;length;</div><div class='del'>-		current_SC-&gt;SCp.buffers_residual = scsi_sg_count(current_SC) - 1;</div><div class='del'>-	} else {</div><div class='del'>-		current_SC-&gt;SCp.ptr = NULL;</div><div class='del'>-		current_SC-&gt;SCp.this_residual = 0;</div><div class='del'>-		current_SC-&gt;SCp.buffer = NULL;</div><div class='del'>-		current_SC-&gt;SCp.buffers_residual = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	current_SC-&gt;SCp.Status = 0;</div><div class='del'>-	current_SC-&gt;SCp.Message = 0;</div><div class='del'>-	current_SC-&gt;SCp.have_data_in = 0;</div><div class='del'>-	current_SC-&gt;SCp.sent_command = 0;</div><div class='del'>-	current_SC-&gt;SCp.phase = in_arbitration;</div><div class='del'>-</div><div class='del'>-	/* Start arbitration */</div><div class='del'>-	outb(0x00, Interrupt_Cntl_port);</div><div class='del'>-	outb(0x00, SCSI_Cntl_port);	/* Disable data drivers */</div><div class='del'>-	outb(adapter_mask, SCSI_Data_NoACK_port);	/* Set our id bit */</div><div class='del'>-	in_command = 1;</div><div class='del'>-	outb(0x20, Interrupt_Cntl_port);</div><div class='del'>-	outb(0x14 | PARITY_MASK, TMC_Cntl_port);	/* Start arbitration */</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DEF_SCSI_QCMD(fd_mcs_queue)</div><div class='del'>-</div><div class='del'>-#if DEBUG_ABORT || DEBUG_RESET</div><div class='del'>-static void fd_mcs_print_info(Scsi_Cmnd * SCpnt)</div><div class='del'>-{</div><div class='del'>-	unsigned int imr;</div><div class='del'>-	unsigned int irr;</div><div class='del'>-	unsigned int isr;</div><div class='del'>-	struct Scsi_Host *shpnt = SCpnt-&gt;host;</div><div class='del'>-</div><div class='del'>-	if (!SCpnt || !SCpnt-&gt;host) {</div><div class='del'>-		printk("fd_mcs: cannot provide detailed information\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk("%s\n", fd_mcs_info(SCpnt-&gt;host));</div><div class='del'>-	print_banner(SCpnt-&gt;host);</div><div class='del'>-	switch (SCpnt-&gt;SCp.phase) {</div><div class='del'>-	case in_arbitration:</div><div class='del'>-		printk("arbitration ");</div><div class='del'>-		break;</div><div class='del'>-	case in_selection:</div><div class='del'>-		printk("selection ");</div><div class='del'>-		break;</div><div class='del'>-	case in_other:</div><div class='del'>-		printk("other ");</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		printk("unknown ");</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	printk("(%d), target = %d cmnd = 0x%02x pieces = %d size = %u\n",</div><div class='del'>-		SCpnt-&gt;SCp.phase, SCpnt-&gt;device-&gt;id, *(unsigned char *) SCpnt-&gt;cmnd,</div><div class='del'>-		scsi_sg_count(SCpnt), scsi_bufflen(SCpnt));</div><div class='del'>-	printk("sent_command = %d, have_data_in = %d, timeout = %d\n", SCpnt-&gt;SCp.sent_command, SCpnt-&gt;SCp.have_data_in, SCpnt-&gt;timeout);</div><div class='del'>-#if DEBUG_RACE</div><div class='del'>-	printk("in_interrupt_flag = %d\n", in_interrupt_flag);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	imr = (inb(0x0a1) &lt;&lt; 8) + inb(0x21);</div><div class='del'>-	outb(0x0a, 0xa0);</div><div class='del'>-	irr = inb(0xa0) &lt;&lt; 8;</div><div class='del'>-	outb(0x0a, 0x20);</div><div class='del'>-	irr += inb(0x20);</div><div class='del'>-	outb(0x0b, 0xa0);</div><div class='del'>-	isr = inb(0xa0) &lt;&lt; 8;</div><div class='del'>-	outb(0x0b, 0x20);</div><div class='del'>-	isr += inb(0x20);</div><div class='del'>-</div><div class='del'>-	/* Print out interesting information */</div><div class='del'>-	printk("IMR = 0x%04x", imr);</div><div class='del'>-	if (imr &amp; (1 &lt;&lt; shpnt-&gt;irq))</div><div class='del'>-		printk(" (masked)");</div><div class='del'>-	printk(", IRR = 0x%04x, ISR = 0x%04x\n", irr, isr);</div><div class='del'>-</div><div class='del'>-	printk("SCSI Status      = 0x%02x\n", inb(SCSI_Status_port));</div><div class='del'>-	printk("TMC Status       = 0x%02x", inb(TMC_Status_port));</div><div class='del'>-	if (inb(TMC_Status_port) &amp; 1)</div><div class='del'>-		printk(" (interrupt)");</div><div class='del'>-	printk("\n");</div><div class='del'>-	printk("Interrupt Status = 0x%02x", inb(Interrupt_Status_port));</div><div class='del'>-	if (inb(Interrupt_Status_port) &amp; 0x08)</div><div class='del'>-		printk(" (enabled)");</div><div class='del'>-	printk("\n");</div><div class='del'>-	if (chip == tmc18c50 || chip == tmc18c30) {</div><div class='del'>-		printk("FIFO Status      = 0x%02x\n", inb(shpnt-&gt;io_port + FIFO_Status));</div><div class='del'>-		printk("Int. Condition   = 0x%02x\n", inb(shpnt-&gt;io_port + Interrupt_Cond));</div><div class='del'>-	}</div><div class='del'>-	printk("Configuration 1  = 0x%02x\n", inb(shpnt-&gt;io_port + Configuration1));</div><div class='del'>-	if (chip == tmc18c50 || chip == tmc18c30)</div><div class='del'>-		printk("Configuration 2  = 0x%02x\n", inb(shpnt-&gt;io_port + Configuration2));</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int fd_mcs_abort(Scsi_Cmnd * SCpnt)</div><div class='del'>-{</div><div class='del'>-	struct Scsi_Host *shpnt = SCpnt-&gt;device-&gt;host;</div><div class='del'>-</div><div class='del'>-	unsigned long flags;</div><div class='del'>-#if EVERY_ACCESS || ERRORS_ONLY || DEBUG_ABORT</div><div class='del'>-	printk("fd_mcs: abort ");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(shpnt-&gt;host_lock, flags);</div><div class='del'>-	if (!in_command) {</div><div class='del'>-#if EVERY_ACCESS || ERRORS_ONLY</div><div class='del'>-		printk(" (not in command)\n");</div><div class='del'>-#endif</div><div class='del'>-		spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-		return FAILED;</div><div class='del'>-	} else</div><div class='del'>-		printk("\n");</div><div class='del'>-</div><div class='del'>-#if DEBUG_ABORT</div><div class='del'>-	fd_mcs_print_info(SCpnt);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	fd_mcs_make_bus_idle(shpnt);</div><div class='del'>-</div><div class='del'>-	current_SC-&gt;SCp.phase |= aborted;</div><div class='del'>-</div><div class='del'>-	current_SC-&gt;result = DID_ABORT &lt;&lt; 16;</div><div class='del'>-</div><div class='del'>-	/* Aborts are not done well. . . */</div><div class='del'>-	my_done(shpnt, DID_ABORT &lt;&lt; 16);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-	return SUCCESS;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fd_mcs_bus_reset(Scsi_Cmnd * SCpnt) {</div><div class='del'>-	struct Scsi_Host *shpnt = SCpnt-&gt;device-&gt;host;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-#if DEBUG_RESET</div><div class='del'>-	static int called_once = 0;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if ERRORS_ONLY</div><div class='del'>-	if (SCpnt)</div><div class='del'>-		printk("fd_mcs: SCSI Bus Reset\n");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if DEBUG_RESET</div><div class='del'>-	if (called_once)</div><div class='del'>-		fd_mcs_print_info(current_SC);</div><div class='del'>-	called_once = 1;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(shpnt-&gt;host_lock, flags);</div><div class='del'>-</div><div class='del'>-	outb(1, SCSI_Cntl_port);</div><div class='del'>-	do_pause(2);</div><div class='del'>-	outb(0, SCSI_Cntl_port);</div><div class='del'>-	do_pause(115);</div><div class='del'>-	outb(0, SCSI_Mode_Cntl_port);</div><div class='del'>-	outb(PARITY_MASK, TMC_Cntl_port);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* Unless this is the very first call (i.e., SCPnt == NULL), everything</div><div class='del'>-	   is probably hosed at this point.  We will, however, try to keep</div><div class='del'>-	   things going by informing the high-level code that we need help. */</div><div class='del'>-		return SUCCESS;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#include &lt;scsi/scsi_ioctl.h&gt;</div><div class='del'>-</div><div class='del'>-static int fd_mcs_biosparam(struct scsi_device * disk, struct block_device *bdev,</div><div class='del'>-			    sector_t capacity, int *info_array) </div><div class='del'>-{</div><div class='del'>-	unsigned char *p = scsi_bios_ptable(bdev);</div><div class='del'>-	int size = capacity;</div><div class='del'>-</div><div class='del'>-	/* BIOS &gt;= 3.4 for MCA cards */</div><div class='del'>-	/* This algorithm was provided by Future Domain (much thanks!). */</div><div class='del'>-</div><div class='del'>-	if (p &amp;&amp; p[65] == 0xaa &amp;&amp; p[64] == 0x55	/* Partition table valid */</div><div class='del'>-	    &amp;&amp; p[4]) {	/* Partition type */</div><div class='del'>-		/* The partition table layout is as follows:</div><div class='del'>-</div><div class='del'>-		   Start: 0x1b3h</div><div class='del'>-		   Offset: 0 = partition status</div><div class='del'>-		   1 = starting head</div><div class='del'>-		   2 = starting sector and cylinder (word, encoded)</div><div class='del'>-		   4 = partition type</div><div class='del'>-		   5 = ending head</div><div class='del'>-		   6 = ending sector and cylinder (word, encoded)</div><div class='del'>-		   8 = starting absolute sector (double word)</div><div class='del'>-		   c = number of sectors (double word)</div><div class='del'>-		   Signature: 0x1fe = 0x55aa</div><div class='del'>-</div><div class='del'>-		   So, this algorithm assumes:</div><div class='del'>-		   1) the first partition table is in use,</div><div class='del'>-		   2) the data in the first entry is correct, and</div><div class='del'>-		   3) partitions never divide cylinders</div><div class='del'>-</div><div class='del'>-		   Note that (1) may be FALSE for NetBSD (and other BSD flavors),</div><div class='del'>-		   as well as for Linux.  Note also, that Linux doesn't pay any</div><div class='del'>-		   attention to the fields that are used by this algorithm -- it</div><div class='del'>-		   only uses the absolute sector data.  Recent versions of Linux's</div><div class='del'>-		   fdisk(1) will fill this data in correctly, and forthcoming</div><div class='del'>-		   versions will check for consistency.</div><div class='del'>-</div><div class='del'>-		   Checking for a non-zero partition type is not part of the</div><div class='del'>-		   Future Domain algorithm, but it seemed to be a reasonable thing</div><div class='del'>-		   to do, especially in the Linux and BSD worlds. */</div><div class='del'>-</div><div class='del'>-		info_array[0] = p[5] + 1;	/* heads */</div><div class='del'>-		info_array[1] = p[6] &amp; 0x3f;	/* sectors */</div><div class='del'>-	} else {</div><div class='del'>-		/* Note that this new method guarantees that there will always be</div><div class='del'>-		   less than 1024 cylinders on a platter.  This is good for drives</div><div class='del'>-		   up to approximately 7.85GB (where 1GB = 1024 * 1024 kB). */</div><div class='del'>-		if ((unsigned int) size &gt;= 0x7e0000U) </div><div class='del'>-		{</div><div class='del'>-			info_array[0] = 0xff;	/* heads   = 255 */</div><div class='del'>-			info_array[1] = 0x3f;	/* sectors =  63 */</div><div class='del'>-		} else if ((unsigned int) size &gt;= 0x200000U) {</div><div class='del'>-			info_array[0] = 0x80;	/* heads   = 128 */</div><div class='del'>-			info_array[1] = 0x3f;	/* sectors =  63 */</div><div class='del'>-		} else {</div><div class='del'>-			info_array[0] = 0x40;	/* heads   =  64 */</div><div class='del'>-			info_array[1] = 0x20;	/* sectors =  32 */</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	/* For both methods, compute the cylinders */</div><div class='del'>-	info_array[2] = (unsigned int) size / (info_array[0] * info_array[1]);</div><div class='del'>-	kfree(p);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct scsi_host_template driver_template = {</div><div class='del'>-	.proc_name			= "fd_mcs",</div><div class='del'>-	.proc_info			= fd_mcs_proc_info,</div><div class='del'>-	.detect				= fd_mcs_detect,</div><div class='del'>-	.release			= fd_mcs_release,</div><div class='del'>-	.info				= fd_mcs_info,</div><div class='del'>-	.queuecommand   		= fd_mcs_queue, </div><div class='del'>-	.eh_abort_handler		= fd_mcs_abort,</div><div class='del'>-	.eh_bus_reset_handler		= fd_mcs_bus_reset,</div><div class='del'>-	.bios_param     		= fd_mcs_biosparam,</div><div class='del'>-	.can_queue      		= 1,</div><div class='del'>-	.this_id        		= 7,</div><div class='del'>-	.sg_tablesize   		= 64,</div><div class='del'>-	.cmd_per_lun    		= 1,</div><div class='del'>-	.use_clustering 		= DISABLE_CLUSTERING,</div><div class='del'>-};</div><div class='del'>-#include "scsi_module.c"</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/scsi/hosts.c b/drivers/scsi/hosts.c<br/>index 351dc0b86fab..a3a056a9db67 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/hosts.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/hosts.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/hosts.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/hosts.c</a></div><div class='hunk'>@@ -218,6 +218,9 @@ int scsi_add_host_with_dma(struct Scsi_Host *shost, struct device *dev,</div><div class='ctx'> </div><div class='ctx'> 	if (!shost-&gt;shost_gendev.parent)</div><div class='ctx'> 		shost-&gt;shost_gendev.parent = dev ? dev : &amp;platform_bus;</div><div class='add'>+	if (!dma_dev)</div><div class='add'>+		dma_dev = shost-&gt;shost_gendev.parent;</div><div class='add'>+</div><div class='ctx'> 	shost-&gt;dma_dev = dma_dev;</div><div class='ctx'> </div><div class='ctx'> 	error = device_add(&amp;shost-&gt;shost_gendev);</div><div class='head'>diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c<br/>index 500e20dd56ec..796482badf13 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/hpsa.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/hpsa.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/hpsa.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/hpsa.c</a></div><div class='hunk'>@@ -159,6 +159,7 @@ static int hpsa_change_queue_depth(struct scsi_device *sdev,</div><div class='ctx'> 	int qdepth, int reason);</div><div class='ctx'> </div><div class='ctx'> static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);</div><div class='add'>+static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);</div><div class='ctx'> static int hpsa_slave_alloc(struct scsi_device *sdev);</div><div class='ctx'> static void hpsa_slave_destroy(struct scsi_device *sdev);</div><div class='ctx'> </div><div class='hunk'>@@ -171,7 +172,7 @@ static void check_ioctl_unit_attention(struct ctlr_info *h,</div><div class='ctx'> static void calc_bucket_map(int *bucket, int num_buckets,</div><div class='ctx'> 	int nsgs, int *bucket_map);</div><div class='ctx'> static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);</div><div class='del'>-static inline u32 next_command(struct ctlr_info *h);</div><div class='add'>+static inline u32 next_command(struct ctlr_info *h, u8 q);</div><div class='ctx'> static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,</div><div class='ctx'> 	void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,</div><div class='ctx'> 	u64 *cfg_offset);</div><div class='hunk'>@@ -180,6 +181,7 @@ static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,</div><div class='ctx'> static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);</div><div class='ctx'> static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,</div><div class='ctx'> 	void __iomem *vaddr, int wait_for_ready);</div><div class='add'>+static inline void finish_cmd(struct CommandList *c);</div><div class='ctx'> #define BOARD_NOT_READY 0</div><div class='ctx'> #define BOARD_READY 1</div><div class='ctx'> </div><div class='hunk'>@@ -234,6 +236,16 @@ static int check_for_unit_attention(struct ctlr_info *h,</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int check_for_busy(struct ctlr_info *h, struct CommandList *c)</div><div class='add'>+{</div><div class='add'>+	if (c-&gt;err_info-&gt;CommandStatus != CMD_TARGET_STATUS ||</div><div class='add'>+		(c-&gt;err_info-&gt;ScsiStatus != SAM_STAT_BUSY &amp;&amp;</div><div class='add'>+		 c-&gt;err_info-&gt;ScsiStatus != SAM_STAT_TASK_SET_FULL))</div><div class='add'>+		return 0;</div><div class='add'>+	dev_warn(&amp;h-&gt;pdev-&gt;dev, HPSA "device busy");</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static ssize_t host_store_rescan(struct device *dev,</div><div class='ctx'> 				 struct device_attribute *attr,</div><div class='ctx'> 				 const char *buf, size_t count)</div><div class='hunk'>@@ -368,7 +380,7 @@ static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",</div><div class='del'>-	"UNKNOWN"</div><div class='add'>+	"1(ADM)", "UNKNOWN"</div><div class='ctx'> };</div><div class='ctx'> #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)</div><div class='ctx'> </div><div class='hunk'>@@ -497,6 +509,7 @@ static struct scsi_host_template hpsa_driver_template = {</div><div class='ctx'> 	.change_queue_depth	= hpsa_change_queue_depth,</div><div class='ctx'> 	.this_id		= -1,</div><div class='ctx'> 	.use_clustering		= ENABLE_CLUSTERING,</div><div class='add'>+	.eh_abort_handler	= hpsa_eh_abort_handler,</div><div class='ctx'> 	.eh_device_reset_handler = hpsa_eh_device_reset_handler,</div><div class='ctx'> 	.ioctl			= hpsa_ioctl,</div><div class='ctx'> 	.slave_alloc		= hpsa_slave_alloc,</div><div class='hunk'>@@ -516,24 +529,28 @@ static inline void addQ(struct list_head *list, struct CommandList *c)</div><div class='ctx'> 	list_add_tail(&amp;c-&gt;list, list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 next_command(struct ctlr_info *h)</div><div class='add'>+static inline u32 next_command(struct ctlr_info *h, u8 q)</div><div class='ctx'> {</div><div class='ctx'> 	u32 a;</div><div class='add'>+	struct reply_pool *rq = &amp;h-&gt;reply_queue[q];</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!(h-&gt;transMethod &amp; CFGTBL_Trans_Performant)))</div><div class='del'>-		return h-&gt;access.command_completed(h);</div><div class='add'>+		return h-&gt;access.command_completed(h, q);</div><div class='ctx'> </div><div class='del'>-	if ((*(h-&gt;reply_pool_head) &amp; 1) == (h-&gt;reply_pool_wraparound)) {</div><div class='del'>-		a = *(h-&gt;reply_pool_head); /* Next cmd in ring buffer */</div><div class='del'>-		(h-&gt;reply_pool_head)++;</div><div class='add'>+	if ((rq-&gt;head[rq-&gt;current_entry] &amp; 1) == rq-&gt;wraparound) {</div><div class='add'>+		a = rq-&gt;head[rq-&gt;current_entry];</div><div class='add'>+		rq-&gt;current_entry++;</div><div class='add'>+		spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 		h-&gt;commands_outstanding--;</div><div class='add'>+		spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		a = FIFO_EMPTY;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Check for wraparound */</div><div class='del'>-	if (h-&gt;reply_pool_head == (h-&gt;reply_pool + h-&gt;max_commands)) {</div><div class='del'>-		h-&gt;reply_pool_head = h-&gt;reply_pool;</div><div class='del'>-		h-&gt;reply_pool_wraparound ^= 1;</div><div class='add'>+	if (rq-&gt;current_entry == h-&gt;max_commands) {</div><div class='add'>+		rq-&gt;current_entry = 0;</div><div class='add'>+		rq-&gt;wraparound ^= 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	return a;</div><div class='ctx'> }</div><div class='hunk'>@@ -544,8 +561,41 @@ static inline u32 next_command(struct ctlr_info *h)</div><div class='ctx'>  */</div><div class='ctx'> static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)</div><div class='ctx'> {</div><div class='del'>-	if (likely(h-&gt;transMethod &amp; CFGTBL_Trans_Performant))</div><div class='add'>+	if (likely(h-&gt;transMethod &amp; CFGTBL_Trans_Performant)) {</div><div class='ctx'> 		c-&gt;busaddr |= 1 | (h-&gt;blockFetchTable[c-&gt;Header.SGList] &lt;&lt; 1);</div><div class='add'>+		if (likely(h-&gt;msix_vector))</div><div class='add'>+			c-&gt;Header.ReplyQueue =</div><div class='add'>+				smp_processor_id() % h-&gt;nreply_queues;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int is_firmware_flash_cmd(u8 *cdb)</div><div class='add'>+{</div><div class='add'>+	return cdb[0] == BMIC_WRITE &amp;&amp; cdb[6] == BMIC_FLASH_FIRMWARE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * During firmware flash, the heartbeat register may not update as frequently</div><div class='add'>+ * as it should.  So we dial down lockup detection during firmware flash. and</div><div class='add'>+ * dial it back up when firmware flash completes.</div><div class='add'>+ */</div><div class='add'>+#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)</div><div class='add'>+#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)</div><div class='add'>+static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,</div><div class='add'>+		struct CommandList *c)</div><div class='add'>+{</div><div class='add'>+	if (!is_firmware_flash_cmd(c-&gt;Request.CDB))</div><div class='add'>+		return;</div><div class='add'>+	atomic_inc(&amp;h-&gt;firmware_flash_in_progress);</div><div class='add'>+	h-&gt;heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,</div><div class='add'>+		struct CommandList *c)</div><div class='add'>+{</div><div class='add'>+	if (is_firmware_flash_cmd(c-&gt;Request.CDB) &amp;&amp;</div><div class='add'>+		atomic_dec_and_test(&amp;h-&gt;firmware_flash_in_progress))</div><div class='add'>+		h-&gt;heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void enqueue_cmd_and_start_io(struct ctlr_info *h,</div><div class='hunk'>@@ -554,11 +604,12 @@ static void enqueue_cmd_and_start_io(struct ctlr_info *h,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	set_performant_mode(h, c);</div><div class='add'>+	dial_down_lockup_detection_during_fw_flash(h, c);</div><div class='ctx'> 	spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	addQ(&amp;h-&gt;reqQ, c);</div><div class='ctx'> 	h-&gt;Qdepth++;</div><div class='del'>-	start_io(h);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='add'>+	start_io(h);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void removeQ(struct CommandList *c)</div><div class='hunk'>@@ -1193,7 +1244,7 @@ static void complete_scsi_command(struct CommandList *cp)</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			/* Must be some other type of check condition */</div><div class='del'>-			dev_warn(&amp;h-&gt;pdev-&gt;dev, "cp %p has check condition: "</div><div class='add'>+			dev_dbg(&amp;h-&gt;pdev-&gt;dev, "cp %p has check condition: "</div><div class='ctx'> 					"unknown type: "</div><div class='ctx'> 					"Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "</div><div class='ctx'> 					"Returning result: 0x%x, "</div><div class='hunk'>@@ -1370,16 +1421,24 @@ static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define MAX_DRIVER_CMD_RETRIES 25</div><div class='ctx'> static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,</div><div class='ctx'> 	struct CommandList *c, int data_direction)</div><div class='ctx'> {</div><div class='del'>-	int retry_count = 0;</div><div class='add'>+	int backoff_time = 10, retry_count = 0;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		memset(c-&gt;err_info, 0, sizeof(*c-&gt;err_info));</div><div class='ctx'> 		hpsa_scsi_do_simple_cmd_core(h, c);</div><div class='ctx'> 		retry_count++;</div><div class='del'>-	} while (check_for_unit_attention(h, c) &amp;&amp; retry_count &lt;= 3);</div><div class='add'>+		if (retry_count &gt; 3) {</div><div class='add'>+			msleep(backoff_time);</div><div class='add'>+			if (backoff_time &lt; 1000)</div><div class='add'>+				backoff_time *= 2;</div><div class='add'>+		}</div><div class='add'>+	} while ((check_for_unit_attention(h, c) ||</div><div class='add'>+			check_for_busy(h, c)) &amp;&amp;</div><div class='add'>+			retry_count &lt;= MAX_DRIVER_CMD_RETRIES);</div><div class='ctx'> 	hpsa_pci_unmap(h-&gt;pdev, c, 1, data_direction);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2065,9 +2124,8 @@ static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,</div><div class='ctx'> 		done(cmd);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	/* Need a lock as this is being allocated from the pool */</div><div class='del'>-	c = cmd_alloc(h);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='add'>+	c = cmd_alloc(h);</div><div class='ctx'> 	if (c == NULL) {			/* trouble... */</div><div class='ctx'> 		dev_err(&amp;h-&gt;pdev-&gt;dev, "cmd_alloc returned NULL!\n");</div><div class='ctx'> 		return SCSI_MLQUEUE_HOST_BUSY;</div><div class='hunk'>@@ -2334,6 +2392,261 @@ static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)</div><div class='ctx'> 	return FAILED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void swizzle_abort_tag(u8 *tag)</div><div class='add'>+{</div><div class='add'>+	u8 original_tag[8];</div><div class='add'>+</div><div class='add'>+	memcpy(original_tag, tag, 8);</div><div class='add'>+	tag[0] = original_tag[3];</div><div class='add'>+	tag[1] = original_tag[2];</div><div class='add'>+	tag[2] = original_tag[1];</div><div class='add'>+	tag[3] = original_tag[0];</div><div class='add'>+	tag[4] = original_tag[7];</div><div class='add'>+	tag[5] = original_tag[6];</div><div class='add'>+	tag[6] = original_tag[5];</div><div class='add'>+	tag[7] = original_tag[4];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,</div><div class='add'>+	struct CommandList *abort, int swizzle)</div><div class='add'>+{</div><div class='add'>+	int rc = IO_OK;</div><div class='add'>+	struct CommandList *c;</div><div class='add'>+	struct ErrorInfo *ei;</div><div class='add'>+</div><div class='add'>+	c = cmd_special_alloc(h);</div><div class='add'>+	if (c == NULL) {	/* trouble... */</div><div class='add'>+		dev_warn(&amp;h-&gt;pdev-&gt;dev, "cmd_special_alloc returned NULL!\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fill_cmd(c, HPSA_ABORT_MSG, h, abort, 0, 0, scsi3addr, TYPE_MSG);</div><div class='add'>+	if (swizzle)</div><div class='add'>+		swizzle_abort_tag(&amp;c-&gt;Request.CDB[4]);</div><div class='add'>+	hpsa_scsi_do_simple_cmd_core(h, c);</div><div class='add'>+	dev_dbg(&amp;h-&gt;pdev-&gt;dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",</div><div class='add'>+		__func__, abort-&gt;Header.Tag.upper, abort-&gt;Header.Tag.lower);</div><div class='add'>+	/* no unmap needed here because no data xfer. */</div><div class='add'>+</div><div class='add'>+	ei = c-&gt;err_info;</div><div class='add'>+	switch (ei-&gt;CommandStatus) {</div><div class='add'>+	case CMD_SUCCESS:</div><div class='add'>+		break;</div><div class='add'>+	case CMD_UNABORTABLE: /* Very common, don't make noise. */</div><div class='add'>+		rc = -1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_dbg(&amp;h-&gt;pdev-&gt;dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",</div><div class='add'>+			__func__, abort-&gt;Header.Tag.upper,</div><div class='add'>+			abort-&gt;Header.Tag.lower);</div><div class='add'>+		hpsa_scsi_interpret_error(c);</div><div class='add'>+		rc = -1;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	cmd_special_free(h, c);</div><div class='add'>+	dev_dbg(&amp;h-&gt;pdev-&gt;dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,</div><div class='add'>+		abort-&gt;Header.Tag.upper, abort-&gt;Header.Tag.lower);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * hpsa_find_cmd_in_queue</div><div class='add'>+ *</div><div class='add'>+ * Used to determine whether a command (find) is still present</div><div class='add'>+ * in queue_head.   Optionally excludes the last element of queue_head.</div><div class='add'>+ *</div><div class='add'>+ * This is used to avoid unnecessary aborts.  Commands in h-&gt;reqQ have</div><div class='add'>+ * not yet been submitted, and so can be aborted by the driver without</div><div class='add'>+ * sending an abort to the hardware.</div><div class='add'>+ *</div><div class='add'>+ * Returns pointer to command if found in queue, NULL otherwise.</div><div class='add'>+ */</div><div class='add'>+static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,</div><div class='add'>+			struct scsi_cmnd *find, struct list_head *queue_head)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct CommandList *c = NULL;	/* ptr into cmpQ */</div><div class='add'>+</div><div class='add'>+	if (!find)</div><div class='add'>+		return 0;</div><div class='add'>+	spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='add'>+	list_for_each_entry(c, queue_head, list) {</div><div class='add'>+		if (c-&gt;scsi_cmd == NULL) /* e.g.: passthru ioctl */</div><div class='add'>+			continue;</div><div class='add'>+		if (c-&gt;scsi_cmd == find) {</div><div class='add'>+			spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='add'>+			return c;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,</div><div class='add'>+					u8 *tag, struct list_head *queue_head)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct CommandList *c;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='add'>+	list_for_each_entry(c, queue_head, list) {</div><div class='add'>+		if (memcmp(&amp;c-&gt;Header.Tag, tag, 8) != 0)</div><div class='add'>+			continue;</div><div class='add'>+		spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='add'>+		return c;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Some Smart Arrays need the abort tag swizzled, and some don't.  It's hard to</div><div class='add'>+ * tell which kind we're dealing with, so we send the abort both ways.  There</div><div class='add'>+ * shouldn't be any collisions between swizzled and unswizzled tags due to the</div><div class='add'>+ * way we construct our tags but we check anyway in case the assumptions which</div><div class='add'>+ * make this true someday become false.</div><div class='add'>+ */</div><div class='add'>+static int hpsa_send_abort_both_ways(struct ctlr_info *h,</div><div class='add'>+	unsigned char *scsi3addr, struct CommandList *abort)</div><div class='add'>+{</div><div class='add'>+	u8 swizzled_tag[8];</div><div class='add'>+	struct CommandList *c;</div><div class='add'>+	int rc = 0, rc2 = 0;</div><div class='add'>+</div><div class='add'>+	/* we do not expect to find the swizzled tag in our queue, but</div><div class='add'>+	 * check anyway just to be sure the assumptions which make this</div><div class='add'>+	 * the case haven't become wrong.</div><div class='add'>+	 */</div><div class='add'>+	memcpy(swizzled_tag, &amp;abort-&gt;Request.CDB[4], 8);</div><div class='add'>+	swizzle_abort_tag(swizzled_tag);</div><div class='add'>+	c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &amp;h-&gt;cmpQ);</div><div class='add'>+	if (c != NULL) {</div><div class='add'>+		dev_warn(&amp;h-&gt;pdev-&gt;dev, "Unexpectedly found byte-swapped tag in completion queue.\n");</div><div class='add'>+		return hpsa_send_abort(h, scsi3addr, abort, 0);</div><div class='add'>+	}</div><div class='add'>+	rc = hpsa_send_abort(h, scsi3addr, abort, 0);</div><div class='add'>+</div><div class='add'>+	/* if the command is still in our queue, we can't conclude that it was</div><div class='add'>+	 * aborted (it might have just completed normally) but in any case</div><div class='add'>+	 * we don't need to try to abort it another way.</div><div class='add'>+	 */</div><div class='add'>+	c = hpsa_find_cmd_in_queue(h, abort-&gt;scsi_cmd, &amp;h-&gt;cmpQ);</div><div class='add'>+	if (c)</div><div class='add'>+		rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);</div><div class='add'>+	return rc &amp;&amp; rc2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Send an abort for the specified command.</div><div class='add'>+ *	If the device and controller support it,</div><div class='add'>+ *		send a task abort request.</div><div class='add'>+ */</div><div class='add'>+static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	int i, rc;</div><div class='add'>+	struct ctlr_info *h;</div><div class='add'>+	struct hpsa_scsi_dev_t *dev;</div><div class='add'>+	struct CommandList *abort; /* pointer to command to be aborted */</div><div class='add'>+	struct CommandList *found;</div><div class='add'>+	struct scsi_cmnd *as;	/* ptr to scsi cmd inside aborted command. */</div><div class='add'>+	char msg[256];		/* For debug messaging. */</div><div class='add'>+	int ml = 0;</div><div class='add'>+</div><div class='add'>+	/* Find the controller of the command to be aborted */</div><div class='add'>+	h = sdev_to_hba(sc-&gt;device);</div><div class='add'>+	if (WARN(h == NULL,</div><div class='add'>+			"ABORT REQUEST FAILED, Controller lookup failed.\n"))</div><div class='add'>+		return FAILED;</div><div class='add'>+</div><div class='add'>+	/* Check that controller supports some kind of task abort */</div><div class='add'>+	if (!(HPSATMF_PHYS_TASK_ABORT &amp; h-&gt;TMFSupportFlags) &amp;&amp;</div><div class='add'>+		!(HPSATMF_LOG_TASK_ABORT &amp; h-&gt;TMFSupportFlags))</div><div class='add'>+		return FAILED;</div><div class='add'>+</div><div class='add'>+	memset(msg, 0, sizeof(msg));</div><div class='add'>+	ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",</div><div class='add'>+		h-&gt;scsi_host-&gt;host_no, sc-&gt;device-&gt;channel,</div><div class='add'>+		sc-&gt;device-&gt;id, sc-&gt;device-&gt;lun);</div><div class='add'>+</div><div class='add'>+	/* Find the device of the command to be aborted */</div><div class='add'>+	dev = sc-&gt;device-&gt;hostdata;</div><div class='add'>+	if (!dev) {</div><div class='add'>+		dev_err(&amp;h-&gt;pdev-&gt;dev, "%s FAILED, Device lookup failed.\n",</div><div class='add'>+				msg);</div><div class='add'>+		return FAILED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Get SCSI command to be aborted */</div><div class='add'>+	abort = (struct CommandList *) sc-&gt;host_scribble;</div><div class='add'>+	if (abort == NULL) {</div><div class='add'>+		dev_err(&amp;h-&gt;pdev-&gt;dev, "%s FAILED, Command to abort is NULL.\n",</div><div class='add'>+				msg);</div><div class='add'>+		return FAILED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",</div><div class='add'>+		abort-&gt;Header.Tag.upper, abort-&gt;Header.Tag.lower);</div><div class='add'>+	as  = (struct scsi_cmnd *) abort-&gt;scsi_cmd;</div><div class='add'>+	if (as != NULL)</div><div class='add'>+		ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",</div><div class='add'>+			as-&gt;cmnd[0], as-&gt;serial_number);</div><div class='add'>+	dev_dbg(&amp;h-&gt;pdev-&gt;dev, "%s\n", msg);</div><div class='add'>+	dev_warn(&amp;h-&gt;pdev-&gt;dev, "Abort request on C%d:B%d:T%d:L%d\n",</div><div class='add'>+		h-&gt;scsi_host-&gt;host_no, dev-&gt;bus, dev-&gt;target, dev-&gt;lun);</div><div class='add'>+</div><div class='add'>+	/* Search reqQ to See if command is queued but not submitted,</div><div class='add'>+	 * if so, complete the command with aborted status and remove</div><div class='add'>+	 * it from the reqQ.</div><div class='add'>+	 */</div><div class='add'>+	found = hpsa_find_cmd_in_queue(h, sc, &amp;h-&gt;reqQ);</div><div class='add'>+	if (found) {</div><div class='add'>+		found-&gt;err_info-&gt;CommandStatus = CMD_ABORTED;</div><div class='add'>+		finish_cmd(found);</div><div class='add'>+		dev_info(&amp;h-&gt;pdev-&gt;dev, "%s Request SUCCEEDED (driver queue).\n",</div><div class='add'>+				msg);</div><div class='add'>+		return SUCCESS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* not in reqQ, if also not in cmpQ, must have already completed */</div><div class='add'>+	found = hpsa_find_cmd_in_queue(h, sc, &amp;h-&gt;cmpQ);</div><div class='add'>+	if (!found)  {</div><div class='add'>+		dev_dbg(&amp;h-&gt;pdev-&gt;dev, "%s Request FAILED (not known to driver).\n",</div><div class='add'>+				msg);</div><div class='add'>+		return SUCCESS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Command is in flight, or possibly already completed</div><div class='add'>+	 * by the firmware (but not to the scsi mid layer) but we can't</div><div class='add'>+	 * distinguish which.  Send the abort down.</div><div class='add'>+	 */</div><div class='add'>+	rc = hpsa_send_abort_both_ways(h, dev-&gt;scsi3addr, abort);</div><div class='add'>+	if (rc != 0) {</div><div class='add'>+		dev_dbg(&amp;h-&gt;pdev-&gt;dev, "%s Request FAILED.\n", msg);</div><div class='add'>+		dev_warn(&amp;h-&gt;pdev-&gt;dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",</div><div class='add'>+			h-&gt;scsi_host-&gt;host_no,</div><div class='add'>+			dev-&gt;bus, dev-&gt;target, dev-&gt;lun);</div><div class='add'>+		return FAILED;</div><div class='add'>+	}</div><div class='add'>+	dev_info(&amp;h-&gt;pdev-&gt;dev, "%s REQUEST SUCCEEDED.\n", msg);</div><div class='add'>+</div><div class='add'>+	/* If the abort(s) above completed and actually aborted the</div><div class='add'>+	 * command, then the command to be aborted should already be</div><div class='add'>+	 * completed.  If not, wait around a bit more to see if they</div><div class='add'>+	 * manage to complete normally.</div><div class='add'>+	 */</div><div class='add'>+#define ABORT_COMPLETE_WAIT_SECS 30</div><div class='add'>+	for (i = 0; i &lt; ABORT_COMPLETE_WAIT_SECS * 10; i++) {</div><div class='add'>+		found = hpsa_find_cmd_in_queue(h, sc, &amp;h-&gt;cmpQ);</div><div class='add'>+		if (!found)</div><div class='add'>+			return SUCCESS;</div><div class='add'>+		msleep(100);</div><div class='add'>+	}</div><div class='add'>+	dev_warn(&amp;h-&gt;pdev-&gt;dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",</div><div class='add'>+		msg, ABORT_COMPLETE_WAIT_SECS);</div><div class='add'>+	return FAILED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * For operations that cannot sleep, a command block is allocated at init,</div><div class='ctx'>  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track</div><div class='hunk'>@@ -2346,14 +2659,21 @@ static struct CommandList *cmd_alloc(struct ctlr_info *h)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	union u64bit temp64;</div><div class='ctx'> 	dma_addr_t cmd_dma_handle, err_dma_handle;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	do {</div><div class='ctx'> 		i = find_first_zero_bit(h-&gt;cmd_pool_bits, h-&gt;nr_cmds);</div><div class='del'>-		if (i == h-&gt;nr_cmds)</div><div class='add'>+		if (i == h-&gt;nr_cmds) {</div><div class='add'>+			spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='ctx'> 			return NULL;</div><div class='add'>+		}</div><div class='ctx'> 	} while (test_and_set_bit</div><div class='ctx'> 		 (i &amp; (BITS_PER_LONG - 1),</div><div class='ctx'> 		  h-&gt;cmd_pool_bits + (i / BITS_PER_LONG)) != 0);</div><div class='add'>+	h-&gt;nr_allocs++;</div><div class='add'>+	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='add'>+</div><div class='ctx'> 	c = h-&gt;cmd_pool + i;</div><div class='ctx'> 	memset(c, 0, sizeof(*c));</div><div class='ctx'> 	cmd_dma_handle = h-&gt;cmd_pool_dhandle</div><div class='hunk'>@@ -2362,7 +2682,6 @@ static struct CommandList *cmd_alloc(struct ctlr_info *h)</div><div class='ctx'> 	memset(c-&gt;err_info, 0, sizeof(*c-&gt;err_info));</div><div class='ctx'> 	err_dma_handle = h-&gt;errinfo_pool_dhandle</div><div class='ctx'> 	    + i * sizeof(*c-&gt;err_info);</div><div class='del'>-	h-&gt;nr_allocs++;</div><div class='ctx'> </div><div class='ctx'> 	c-&gt;cmdindex = i;</div><div class='ctx'> </div><div class='hunk'>@@ -2418,11 +2737,14 @@ static struct CommandList *cmd_special_alloc(struct ctlr_info *h)</div><div class='ctx'> static void cmd_free(struct ctlr_info *h, struct CommandList *c)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	i = c - h-&gt;cmd_pool;</div><div class='add'>+	spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	clear_bit(i &amp; (BITS_PER_LONG - 1),</div><div class='ctx'> 		  h-&gt;cmd_pool_bits + (i / BITS_PER_LONG));</div><div class='ctx'> 	h-&gt;nr_frees++;</div><div class='add'>+	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)</div><div class='hunk'>@@ -2866,6 +3188,7 @@ static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,</div><div class='ctx'> 	int cmd_type)</div><div class='ctx'> {</div><div class='ctx'> 	int pci_dir = XFER_NONE;</div><div class='add'>+	struct CommandList *a; /* for commands to be aborted */</div><div class='ctx'> </div><div class='ctx'> 	c-&gt;cmd_type = CMD_IOCTL_PEND;</div><div class='ctx'> 	c-&gt;Header.ReplyQueue = 0;</div><div class='hunk'>@@ -2949,8 +3272,35 @@ static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,</div><div class='ctx'> 			c-&gt;Request.CDB[5] = 0x00;</div><div class='ctx'> 			c-&gt;Request.CDB[6] = 0x00;</div><div class='ctx'> 			c-&gt;Request.CDB[7] = 0x00;</div><div class='add'>+			break;</div><div class='add'>+		case  HPSA_ABORT_MSG:</div><div class='add'>+			a = buff;       /* point to command to be aborted */</div><div class='add'>+			dev_dbg(&amp;h-&gt;pdev-&gt;dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",</div><div class='add'>+				a-&gt;Header.Tag.upper, a-&gt;Header.Tag.lower,</div><div class='add'>+				c-&gt;Header.Tag.upper, c-&gt;Header.Tag.lower);</div><div class='add'>+			c-&gt;Request.CDBLen = 16;</div><div class='add'>+			c-&gt;Request.Type.Type = TYPE_MSG;</div><div class='add'>+			c-&gt;Request.Type.Attribute = ATTR_SIMPLE;</div><div class='add'>+			c-&gt;Request.Type.Direction = XFER_WRITE;</div><div class='add'>+			c-&gt;Request.Timeout = 0; /* Don't time out */</div><div class='add'>+			c-&gt;Request.CDB[0] = HPSA_TASK_MANAGEMENT;</div><div class='add'>+			c-&gt;Request.CDB[1] = HPSA_TMF_ABORT_TASK;</div><div class='add'>+			c-&gt;Request.CDB[2] = 0x00; /* reserved */</div><div class='add'>+			c-&gt;Request.CDB[3] = 0x00; /* reserved */</div><div class='add'>+			/* Tag to abort goes in CDB[4]-CDB[11] */</div><div class='add'>+			c-&gt;Request.CDB[4] = a-&gt;Header.Tag.lower &amp; 0xFF;</div><div class='add'>+			c-&gt;Request.CDB[5] = (a-&gt;Header.Tag.lower &gt;&gt; 8) &amp; 0xFF;</div><div class='add'>+			c-&gt;Request.CDB[6] = (a-&gt;Header.Tag.lower &gt;&gt; 16) &amp; 0xFF;</div><div class='add'>+			c-&gt;Request.CDB[7] = (a-&gt;Header.Tag.lower &gt;&gt; 24) &amp; 0xFF;</div><div class='add'>+			c-&gt;Request.CDB[8] = a-&gt;Header.Tag.upper &amp; 0xFF;</div><div class='add'>+			c-&gt;Request.CDB[9] = (a-&gt;Header.Tag.upper &gt;&gt; 8) &amp; 0xFF;</div><div class='add'>+			c-&gt;Request.CDB[10] = (a-&gt;Header.Tag.upper &gt;&gt; 16) &amp; 0xFF;</div><div class='add'>+			c-&gt;Request.CDB[11] = (a-&gt;Header.Tag.upper &gt;&gt; 24) &amp; 0xFF;</div><div class='add'>+			c-&gt;Request.CDB[12] = 0x00; /* reserved */</div><div class='add'>+			c-&gt;Request.CDB[13] = 0x00; /* reserved */</div><div class='add'>+			c-&gt;Request.CDB[14] = 0x00; /* reserved */</div><div class='add'>+			c-&gt;Request.CDB[15] = 0x00; /* reserved */</div><div class='ctx'> 		break;</div><div class='del'>-</div><div class='ctx'> 		default:</div><div class='ctx'> 			dev_warn(&amp;h-&gt;pdev-&gt;dev, "unknown message type %d\n",</div><div class='ctx'> 				cmd);</div><div class='hunk'>@@ -2998,7 +3348,9 @@ static void __iomem *remap_pci_mem(ulong base, ulong size)</div><div class='ctx'> static void start_io(struct ctlr_info *h)</div><div class='ctx'> {</div><div class='ctx'> 	struct CommandList *c;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	while (!list_empty(&amp;h-&gt;reqQ)) {</div><div class='ctx'> 		c = list_entry(h-&gt;reqQ.next, struct CommandList, list);</div><div class='ctx'> 		/* can't do anything if fifo is full */</div><div class='hunk'>@@ -3011,17 +3363,28 @@ static void start_io(struct ctlr_info *h)</div><div class='ctx'> 		removeQ(c);</div><div class='ctx'> 		h-&gt;Qdepth--;</div><div class='ctx'> </div><div class='del'>-		/* Tell the controller execute command */</div><div class='del'>-		h-&gt;access.submit_command(h, c);</div><div class='del'>-</div><div class='ctx'> 		/* Put job onto the completed Q */</div><div class='ctx'> 		addQ(&amp;h-&gt;cmpQ, c);</div><div class='add'>+</div><div class='add'>+		/* Must increment commands_outstanding before unlocking</div><div class='add'>+		 * and submitting to avoid race checking for fifo full</div><div class='add'>+		 * condition.</div><div class='add'>+		 */</div><div class='add'>+		h-&gt;commands_outstanding++;</div><div class='add'>+		if (h-&gt;commands_outstanding &gt; h-&gt;max_outstanding)</div><div class='add'>+			h-&gt;max_outstanding = h-&gt;commands_outstanding;</div><div class='add'>+</div><div class='add'>+		/* Tell the controller execute command */</div><div class='add'>+		spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='add'>+		h-&gt;access.submit_command(h, c);</div><div class='add'>+		spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long get_next_completion(struct ctlr_info *h)</div><div class='add'>+static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)</div><div class='ctx'> {</div><div class='del'>-	return h-&gt;access.command_completed(h);</div><div class='add'>+	return h-&gt;access.command_completed(h, q);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool interrupt_pending(struct ctlr_info *h)</div><div class='hunk'>@@ -3045,9 +3408,14 @@ static inline int bad_tag(struct ctlr_info *h, u32 tag_index,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void finish_cmd(struct CommandList *c, u32 raw_tag)</div><div class='add'>+static inline void finish_cmd(struct CommandList *c)</div><div class='ctx'> {</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;c-&gt;h-&gt;lock, flags);</div><div class='ctx'> 	removeQ(c);</div><div class='add'>+	spin_unlock_irqrestore(&amp;c-&gt;h-&gt;lock, flags);</div><div class='add'>+	dial_up_lockup_detection_on_fw_flash_complete(c-&gt;h, c);</div><div class='ctx'> 	if (likely(c-&gt;cmd_type == CMD_SCSI))</div><div class='ctx'> 		complete_scsi_command(c);</div><div class='ctx'> 	else if (c-&gt;cmd_type == CMD_IOCTL_PEND)</div><div class='hunk'>@@ -3075,36 +3443,38 @@ static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* process completion of an indexed ("direct lookup") command */</div><div class='del'>-static inline u32 process_indexed_cmd(struct ctlr_info *h,</div><div class='add'>+static inline void process_indexed_cmd(struct ctlr_info *h,</div><div class='ctx'> 	u32 raw_tag)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tag_index;</div><div class='ctx'> 	struct CommandList *c;</div><div class='ctx'> </div><div class='ctx'> 	tag_index = hpsa_tag_to_index(raw_tag);</div><div class='del'>-	if (bad_tag(h, tag_index, raw_tag))</div><div class='del'>-		return next_command(h);</div><div class='del'>-	c = h-&gt;cmd_pool + tag_index;</div><div class='del'>-	finish_cmd(c, raw_tag);</div><div class='del'>-	return next_command(h);</div><div class='add'>+	if (!bad_tag(h, tag_index, raw_tag)) {</div><div class='add'>+		c = h-&gt;cmd_pool + tag_index;</div><div class='add'>+		finish_cmd(c);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* process completion of a non-indexed command */</div><div class='del'>-static inline u32 process_nonindexed_cmd(struct ctlr_info *h,</div><div class='add'>+static inline void process_nonindexed_cmd(struct ctlr_info *h,</div><div class='ctx'> 	u32 raw_tag)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tag;</div><div class='ctx'> 	struct CommandList *c = NULL;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	tag = hpsa_tag_discard_error_bits(h, raw_tag);</div><div class='add'>+	spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	list_for_each_entry(c, &amp;h-&gt;cmpQ, list) {</div><div class='ctx'> 		if ((c-&gt;busaddr &amp; 0xFFFFFFE0) == (tag &amp; 0xFFFFFFE0)) {</div><div class='del'>-			finish_cmd(c, raw_tag);</div><div class='del'>-			return next_command(h);</div><div class='add'>+			spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='add'>+			finish_cmd(c);</div><div class='add'>+			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	bad_tag(h, h-&gt;nr_cmds + 1, raw_tag);</div><div class='del'>-	return next_command(h);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Some controllers, like p400, will give us one interrupt</div><div class='hunk'>@@ -3126,10 +3496,20 @@ static int ignore_bogus_interrupt(struct ctlr_info *h)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)</div><div class='add'>+/*</div><div class='add'>+ * Convert &amp;h-&gt;q[x] (passed to interrupt handlers) back to h.</div><div class='add'>+ * Relies on (h-q[x] == x) being true for x such that</div><div class='add'>+ * 0 &lt;= x &lt; MAX_REPLY_QUEUES.</div><div class='add'>+ */</div><div class='add'>+static struct ctlr_info *queue_to_hba(u8 *queue)</div><div class='ctx'> {</div><div class='del'>-	struct ctlr_info *h = dev_id;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	return container_of((queue - *queue), struct ctlr_info, q[0]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)</div><div class='add'>+{</div><div class='add'>+	struct ctlr_info *h = queue_to_hba(queue);</div><div class='add'>+	u8 q = *(u8 *) queue;</div><div class='ctx'> 	u32 raw_tag;</div><div class='ctx'> </div><div class='ctx'> 	if (ignore_bogus_interrupt(h))</div><div class='hunk'>@@ -3137,74 +3517,68 @@ static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	if (interrupt_not_for_us(h))</div><div class='ctx'> 		return IRQ_NONE;</div><div class='del'>-	spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	h-&gt;last_intr_timestamp = get_jiffies_64();</div><div class='ctx'> 	while (interrupt_pending(h)) {</div><div class='del'>-		raw_tag = get_next_completion(h);</div><div class='add'>+		raw_tag = get_next_completion(h, q);</div><div class='ctx'> 		while (raw_tag != FIFO_EMPTY)</div><div class='del'>-			raw_tag = next_command(h);</div><div class='add'>+			raw_tag = next_command(h, q);</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)</div><div class='add'>+static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)</div><div class='ctx'> {</div><div class='del'>-	struct ctlr_info *h = dev_id;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct ctlr_info *h = queue_to_hba(queue);</div><div class='ctx'> 	u32 raw_tag;</div><div class='add'>+	u8 q = *(u8 *) queue;</div><div class='ctx'> </div><div class='ctx'> 	if (ignore_bogus_interrupt(h))</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	h-&gt;last_intr_timestamp = get_jiffies_64();</div><div class='del'>-	raw_tag = get_next_completion(h);</div><div class='add'>+	raw_tag = get_next_completion(h, q);</div><div class='ctx'> 	while (raw_tag != FIFO_EMPTY)</div><div class='del'>-		raw_tag = next_command(h);</div><div class='del'>-	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='add'>+		raw_tag = next_command(h, q);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)</div><div class='add'>+static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)</div><div class='ctx'> {</div><div class='del'>-	struct ctlr_info *h = dev_id;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct ctlr_info *h = queue_to_hba((u8 *) queue);</div><div class='ctx'> 	u32 raw_tag;</div><div class='add'>+	u8 q = *(u8 *) queue;</div><div class='ctx'> </div><div class='ctx'> 	if (interrupt_not_for_us(h))</div><div class='ctx'> 		return IRQ_NONE;</div><div class='del'>-	spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	h-&gt;last_intr_timestamp = get_jiffies_64();</div><div class='ctx'> 	while (interrupt_pending(h)) {</div><div class='del'>-		raw_tag = get_next_completion(h);</div><div class='add'>+		raw_tag = get_next_completion(h, q);</div><div class='ctx'> 		while (raw_tag != FIFO_EMPTY) {</div><div class='del'>-			if (hpsa_tag_contains_index(raw_tag))</div><div class='del'>-				raw_tag = process_indexed_cmd(h, raw_tag);</div><div class='add'>+			if (likely(hpsa_tag_contains_index(raw_tag)))</div><div class='add'>+				process_indexed_cmd(h, raw_tag);</div><div class='ctx'> 			else</div><div class='del'>-				raw_tag = process_nonindexed_cmd(h, raw_tag);</div><div class='add'>+				process_nonindexed_cmd(h, raw_tag);</div><div class='add'>+			raw_tag = next_command(h, q);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)</div><div class='add'>+static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)</div><div class='ctx'> {</div><div class='del'>-	struct ctlr_info *h = dev_id;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct ctlr_info *h = queue_to_hba(queue);</div><div class='ctx'> 	u32 raw_tag;</div><div class='add'>+	u8 q = *(u8 *) queue;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	h-&gt;last_intr_timestamp = get_jiffies_64();</div><div class='del'>-	raw_tag = get_next_completion(h);</div><div class='add'>+	raw_tag = get_next_completion(h, q);</div><div class='ctx'> 	while (raw_tag != FIFO_EMPTY) {</div><div class='del'>-		if (hpsa_tag_contains_index(raw_tag))</div><div class='del'>-			raw_tag = process_indexed_cmd(h, raw_tag);</div><div class='add'>+		if (likely(hpsa_tag_contains_index(raw_tag)))</div><div class='add'>+			process_indexed_cmd(h, raw_tag);</div><div class='ctx'> 		else</div><div class='del'>-			raw_tag = process_nonindexed_cmd(h, raw_tag);</div><div class='add'>+			process_nonindexed_cmd(h, raw_tag);</div><div class='add'>+		raw_tag = next_command(h, q);</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3638,10 +4012,13 @@ static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)</div><div class='ctx'> static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_PCI_MSI</div><div class='del'>-	int err;</div><div class='del'>-	struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},</div><div class='del'>-	{0, 2}, {0, 3}</div><div class='del'>-	};</div><div class='add'>+	int err, i;</div><div class='add'>+	struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX_REPLY_QUEUES; i++) {</div><div class='add'>+		hpsa_msix_entries[i].vector = 0;</div><div class='add'>+		hpsa_msix_entries[i].entry = i;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Some boards advertise MSI but don't really support it */</div><div class='ctx'> 	if ((h-&gt;board_id == 0x40700E11) || (h-&gt;board_id == 0x40800E11) ||</div><div class='hunk'>@@ -3649,12 +4026,11 @@ static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)</div><div class='ctx'> 		goto default_int_mode;</div><div class='ctx'> 	if (pci_find_capability(h-&gt;pdev, PCI_CAP_ID_MSIX)) {</div><div class='ctx'> 		dev_info(&amp;h-&gt;pdev-&gt;dev, "MSIX\n");</div><div class='del'>-		err = pci_enable_msix(h-&gt;pdev, hpsa_msix_entries, 4);</div><div class='add'>+		err = pci_enable_msix(h-&gt;pdev, hpsa_msix_entries,</div><div class='add'>+						MAX_REPLY_QUEUES);</div><div class='ctx'> 		if (!err) {</div><div class='del'>-			h-&gt;intr[0] = hpsa_msix_entries[0].vector;</div><div class='del'>-			h-&gt;intr[1] = hpsa_msix_entries[1].vector;</div><div class='del'>-			h-&gt;intr[2] = hpsa_msix_entries[2].vector;</div><div class='del'>-			h-&gt;intr[3] = hpsa_msix_entries[3].vector;</div><div class='add'>+			for (i = 0; i &lt; MAX_REPLY_QUEUES; i++)</div><div class='add'>+				h-&gt;intr[i] = hpsa_msix_entries[i].vector;</div><div class='ctx'> 			h-&gt;msix_vector = 1;</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3705,14 +4081,6 @@ static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)</div><div class='ctx'> 	return ARRAY_SIZE(products) - 1; /* generic unknown smart array */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool hpsa_board_disabled(struct pci_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	u16 command;</div><div class='del'>-</div><div class='del'>-	(void) pci_read_config_word(pdev, PCI_COMMAND, &amp;command);</div><div class='del'>-	return ((command &amp; PCI_COMMAND_MEMORY) == 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,</div><div class='ctx'> 	unsigned long *memory_bar)</div><div class='ctx'> {</div><div class='hunk'>@@ -3838,14 +4206,14 @@ static void __devinit hpsa_find_board_params(struct ctlr_info *h)</div><div class='ctx'> 		h-&gt;maxsgentries = 31; /* default to traditional values */</div><div class='ctx'> 		h-&gt;chainsize = 0;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* Find out what task management functions are supported and cache */</div><div class='add'>+	h-&gt;TMFSupportFlags = readl(&amp;(h-&gt;cfgtable-&gt;TMFSupportFlags));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)</div><div class='ctx'> {</div><div class='del'>-	if ((readb(&amp;h-&gt;cfgtable-&gt;Signature[0]) != 'C') ||</div><div class='del'>-	    (readb(&amp;h-&gt;cfgtable-&gt;Signature[1]) != 'I') ||</div><div class='del'>-	    (readb(&amp;h-&gt;cfgtable-&gt;Signature[2]) != 'S') ||</div><div class='del'>-	    (readb(&amp;h-&gt;cfgtable-&gt;Signature[3]) != 'S')) {</div><div class='add'>+	if (!check_signature(h-&gt;cfgtable-&gt;Signature, "CISS", 4)) {</div><div class='ctx'> 		dev_warn(&amp;h-&gt;pdev-&gt;dev, "not a valid CISS config table\n");</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3932,11 +4300,6 @@ static int __devinit hpsa_pci_init(struct ctlr_info *h)</div><div class='ctx'> 	h-&gt;product_name = products[prod_index].product_name;</div><div class='ctx'> 	h-&gt;access = *(products[prod_index].access);</div><div class='ctx'> </div><div class='del'>-	if (hpsa_board_disabled(h-&gt;pdev)) {</div><div class='del'>-		dev_warn(&amp;h-&gt;pdev-&gt;dev, "controller appears to be disabled\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	pci_disable_link_state(h-&gt;pdev, PCIE_LINK_STATE_L0S |</div><div class='ctx'> 			       PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);</div><div class='ctx'> </div><div class='hunk'>@@ -3946,6 +4309,9 @@ static int __devinit hpsa_pci_init(struct ctlr_info *h)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Enable bus mastering (pci_disable_device may disable this) */</div><div class='add'>+	pci_set_master(h-&gt;pdev);</div><div class='add'>+</div><div class='ctx'> 	err = pci_request_regions(h-&gt;pdev, HPSA);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;h-&gt;pdev-&gt;dev,</div><div class='hunk'>@@ -3987,10 +4353,7 @@ err_out_free_res:</div><div class='ctx'> 		iounmap(h-&gt;cfgtable);</div><div class='ctx'> 	if (h-&gt;vaddr)</div><div class='ctx'> 		iounmap(h-&gt;vaddr);</div><div class='del'>-	/*</div><div class='del'>-	 * Deliberately omit pci_disable_device(): it does something nasty to</div><div class='del'>-	 * Smart Array controllers that pci_enable_device does not undo</div><div class='del'>-	 */</div><div class='add'>+	pci_disable_device(h-&gt;pdev);</div><div class='ctx'> 	pci_release_regions(h-&gt;pdev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -4081,14 +4444,33 @@ static int hpsa_request_irq(struct ctlr_info *h,</div><div class='ctx'> 	irqreturn_t (*msixhandler)(int, void *),</div><div class='ctx'> 	irqreturn_t (*intxhandler)(int, void *))</div><div class='ctx'> {</div><div class='del'>-	int rc;</div><div class='add'>+	int rc, i;</div><div class='ctx'> </div><div class='del'>-	if (h-&gt;msix_vector || h-&gt;msi_vector)</div><div class='del'>-		rc = request_irq(h-&gt;intr[h-&gt;intr_mode], msixhandler,</div><div class='del'>-				0, h-&gt;devname, h);</div><div class='del'>-	else</div><div class='del'>-		rc = request_irq(h-&gt;intr[h-&gt;intr_mode], intxhandler,</div><div class='del'>-				IRQF_SHARED, h-&gt;devname, h);</div><div class='add'>+	/*</div><div class='add'>+	 * initialize h-&gt;q[x] = x so that interrupt handlers know which</div><div class='add'>+	 * queue to process.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; MAX_REPLY_QUEUES; i++)</div><div class='add'>+		h-&gt;q[i] = (u8) i;</div><div class='add'>+</div><div class='add'>+	if (h-&gt;intr_mode == PERF_MODE_INT &amp;&amp; h-&gt;msix_vector) {</div><div class='add'>+		/* If performant mode and MSI-X, use multiple reply queues */</div><div class='add'>+		for (i = 0; i &lt; MAX_REPLY_QUEUES; i++)</div><div class='add'>+			rc = request_irq(h-&gt;intr[i], msixhandler,</div><div class='add'>+					0, h-&gt;devname,</div><div class='add'>+					&amp;h-&gt;q[i]);</div><div class='add'>+	} else {</div><div class='add'>+		/* Use single reply pool */</div><div class='add'>+		if (h-&gt;msix_vector || h-&gt;msi_vector) {</div><div class='add'>+			rc = request_irq(h-&gt;intr[h-&gt;intr_mode],</div><div class='add'>+				msixhandler, 0, h-&gt;devname,</div><div class='add'>+				&amp;h-&gt;q[h-&gt;intr_mode]);</div><div class='add'>+		} else {</div><div class='add'>+			rc = request_irq(h-&gt;intr[h-&gt;intr_mode],</div><div class='add'>+				intxhandler, IRQF_SHARED, h-&gt;devname,</div><div class='add'>+				&amp;h-&gt;q[h-&gt;intr_mode]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		dev_err(&amp;h-&gt;pdev-&gt;dev, "unable to get irq %d for %s\n",</div><div class='ctx'> 		       h-&gt;intr[h-&gt;intr_mode], h-&gt;devname);</div><div class='hunk'>@@ -4121,15 +4503,38 @@ static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)</div><div class='add'>+static void free_irqs(struct ctlr_info *h)</div><div class='ctx'> {</div><div class='del'>-	free_irq(h-&gt;intr[h-&gt;intr_mode], h);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!h-&gt;msix_vector || h-&gt;intr_mode != PERF_MODE_INT) {</div><div class='add'>+		/* Single reply queue, only one irq to free */</div><div class='add'>+		i = h-&gt;intr_mode;</div><div class='add'>+		free_irq(h-&gt;intr[i], &amp;h-&gt;q[i]);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX_REPLY_QUEUES; i++)</div><div class='add'>+		free_irq(h-&gt;intr[i], &amp;h-&gt;q[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)</div><div class='add'>+{</div><div class='add'>+	free_irqs(h);</div><div class='ctx'> #ifdef CONFIG_PCI_MSI</div><div class='del'>-	if (h-&gt;msix_vector)</div><div class='del'>-		pci_disable_msix(h-&gt;pdev);</div><div class='del'>-	else if (h-&gt;msi_vector)</div><div class='del'>-		pci_disable_msi(h-&gt;pdev);</div><div class='add'>+	if (h-&gt;msix_vector) {</div><div class='add'>+		if (h-&gt;pdev-&gt;msix_enabled)</div><div class='add'>+			pci_disable_msix(h-&gt;pdev);</div><div class='add'>+	} else if (h-&gt;msi_vector) {</div><div class='add'>+		if (h-&gt;pdev-&gt;msi_enabled)</div><div class='add'>+			pci_disable_msi(h-&gt;pdev);</div><div class='add'>+	}</div><div class='ctx'> #endif /* CONFIG_PCI_MSI */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)</div><div class='add'>+{</div><div class='add'>+	hpsa_free_irqs_and_disable_msix(h);</div><div class='ctx'> 	hpsa_free_sg_chain_blocks(h);</div><div class='ctx'> 	hpsa_free_cmd_pool(h);</div><div class='ctx'> 	kfree(h-&gt;blockFetchTable);</div><div class='hunk'>@@ -4165,7 +4570,7 @@ static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)</div><div class='ctx'> 	while (!list_empty(list)) {</div><div class='ctx'> 		c = list_entry(list-&gt;next, struct CommandList, list);</div><div class='ctx'> 		c-&gt;err_info-&gt;CommandStatus = CMD_HARDWARE_ERR;</div><div class='del'>-		finish_cmd(c, c-&gt;Header.Tag.lower);</div><div class='add'>+		finish_cmd(c);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4188,9 +4593,6 @@ static void controller_lockup_detected(struct ctlr_info *h)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ)</div><div class='del'>-#define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2)</div><div class='del'>-</div><div class='ctx'> static void detect_controller_lockup(struct ctlr_info *h)</div><div class='ctx'> {</div><div class='ctx'> 	u64 now;</div><div class='hunk'>@@ -4201,7 +4603,7 @@ static void detect_controller_lockup(struct ctlr_info *h)</div><div class='ctx'> 	now = get_jiffies_64();</div><div class='ctx'> 	/* If we've received an interrupt recently, we're ok. */</div><div class='ctx'> 	if (time_after64(h-&gt;last_intr_timestamp +</div><div class='del'>-				(HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))</div><div class='add'>+				(h-&gt;heartbeat_sample_interval), now))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -4210,7 +4612,7 @@ static void detect_controller_lockup(struct ctlr_info *h)</div><div class='ctx'> 	 * otherwise don't care about signals in this thread.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (time_after64(h-&gt;last_heartbeat_timestamp +</div><div class='del'>-				(HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))</div><div class='add'>+				(h-&gt;heartbeat_sample_interval), now))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* If heartbeat has not changed since we last looked, we're not ok. */</div><div class='hunk'>@@ -4252,6 +4654,7 @@ static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	h-&gt;heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;</div><div class='ctx'> 	spin_lock_irqsave(&amp;lockup_detector_lock, flags);</div><div class='ctx'> 	list_add_tail(&amp;h-&gt;lockup_list, &amp;hpsa_ctlr_list);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lockup_detector_lock, flags);</div><div class='hunk'>@@ -4391,7 +4794,7 @@ reinit_after_soft_reset:</div><div class='ctx'> 		spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 		h-&gt;access.set_intr_mask(h, HPSA_INTR_OFF);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='del'>-		free_irq(h-&gt;intr[h-&gt;intr_mode], h);</div><div class='add'>+		free_irqs(h);</div><div class='ctx'> 		rc = hpsa_request_irq(h, hpsa_msix_discard_completions,</div><div class='ctx'> 					hpsa_intx_discard_completions);</div><div class='ctx'> 		if (rc) {</div><div class='hunk'>@@ -4441,7 +4844,7 @@ reinit_after_soft_reset:</div><div class='ctx'> clean4:</div><div class='ctx'> 	hpsa_free_sg_chain_blocks(h);</div><div class='ctx'> 	hpsa_free_cmd_pool(h);</div><div class='del'>-	free_irq(h-&gt;intr[h-&gt;intr_mode], h);</div><div class='add'>+	free_irqs(h);</div><div class='ctx'> clean2:</div><div class='ctx'> clean1:</div><div class='ctx'> 	kfree(h);</div><div class='hunk'>@@ -4484,13 +4887,7 @@ static void hpsa_shutdown(struct pci_dev *pdev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	hpsa_flush_cache(h);</div><div class='ctx'> 	h-&gt;access.set_intr_mask(h, HPSA_INTR_OFF);</div><div class='del'>-	free_irq(h-&gt;intr[h-&gt;intr_mode], h);</div><div class='del'>-#ifdef CONFIG_PCI_MSI</div><div class='del'>-	if (h-&gt;msix_vector)</div><div class='del'>-		pci_disable_msix(h-&gt;pdev);</div><div class='del'>-	else if (h-&gt;msi_vector)</div><div class='del'>-		pci_disable_msi(h-&gt;pdev);</div><div class='del'>-#endif				/* CONFIG_PCI_MSI */</div><div class='add'>+	hpsa_free_irqs_and_disable_msix(h);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __devexit hpsa_free_device_info(struct ctlr_info *h)</div><div class='hunk'>@@ -4529,10 +4926,7 @@ static void __devexit hpsa_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 	kfree(h-&gt;cmd_pool_bits);</div><div class='ctx'> 	kfree(h-&gt;blockFetchTable);</div><div class='ctx'> 	kfree(h-&gt;hba_inquiry_data);</div><div class='del'>-	/*</div><div class='del'>-	 * Deliberately omit pci_disable_device(): it does something nasty to</div><div class='del'>-	 * Smart Array controllers that pci_enable_device does not undo</div><div class='del'>-	 */</div><div class='add'>+	pci_disable_device(pdev);</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> 	kfree(h);</div><div class='hunk'>@@ -4627,11 +5021,8 @@ static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,</div><div class='ctx'> 	 * 10 = 6 s/g entry or 24k</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	h-&gt;reply_pool_wraparound = 1; /* spec: init to 1 */</div><div class='del'>-</div><div class='ctx'> 	/* Controller spec: zero out this buffer. */</div><div class='ctx'> 	memset(h-&gt;reply_pool, 0, h-&gt;reply_pool_size);</div><div class='del'>-	h-&gt;reply_pool_head = h-&gt;reply_pool;</div><div class='ctx'> </div><div class='ctx'> 	bft[7] = SG_ENTRIES_IN_CMD + 4;</div><div class='ctx'> 	calc_bucket_map(bft, ARRAY_SIZE(bft),</div><div class='hunk'>@@ -4641,12 +5032,19 @@ static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,</div><div class='ctx'> </div><div class='ctx'> 	/* size of controller ring buffer */</div><div class='ctx'> 	writel(h-&gt;max_commands, &amp;h-&gt;transtable-&gt;RepQSize);</div><div class='del'>-	writel(1, &amp;h-&gt;transtable-&gt;RepQCount);</div><div class='add'>+	writel(h-&gt;nreply_queues, &amp;h-&gt;transtable-&gt;RepQCount);</div><div class='ctx'> 	writel(0, &amp;h-&gt;transtable-&gt;RepQCtrAddrLow32);</div><div class='ctx'> 	writel(0, &amp;h-&gt;transtable-&gt;RepQCtrAddrHigh32);</div><div class='del'>-	writel(h-&gt;reply_pool_dhandle, &amp;h-&gt;transtable-&gt;RepQAddr0Low32);</div><div class='del'>-	writel(0, &amp;h-&gt;transtable-&gt;RepQAddr0High32);</div><div class='del'>-	writel(CFGTBL_Trans_Performant | use_short_tags,</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; h-&gt;nreply_queues; i++) {</div><div class='add'>+		writel(0, &amp;h-&gt;transtable-&gt;RepQAddr[i].upper);</div><div class='add'>+		writel(h-&gt;reply_pool_dhandle +</div><div class='add'>+			(h-&gt;max_commands * sizeof(u64) * i),</div><div class='add'>+			&amp;h-&gt;transtable-&gt;RepQAddr[i].lower);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel(CFGTBL_Trans_Performant | use_short_tags |</div><div class='add'>+		CFGTBL_Trans_enable_directed_msix,</div><div class='ctx'> 		&amp;(h-&gt;cfgtable-&gt;HostWrite.TransportRequest));</div><div class='ctx'> 	writel(CFGTBL_ChangeReq, h-&gt;vaddr + SA5_DOORBELL);</div><div class='ctx'> 	hpsa_wait_for_mode_change_ack(h);</div><div class='hunk'>@@ -4664,6 +5062,7 @@ static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,</div><div class='ctx'> static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)</div><div class='ctx'> {</div><div class='ctx'> 	u32 trans_support;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (hpsa_simple_mode)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -4672,12 +5071,20 @@ static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)</div><div class='ctx'> 	if (!(trans_support &amp; PERFORMANT_MODE))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	h-&gt;nreply_queues = h-&gt;msix_vector ? MAX_REPLY_QUEUES : 1;</div><div class='ctx'> 	hpsa_get_max_perf_mode_cmds(h);</div><div class='ctx'> 	/* Performant mode ring buffer and supporting data structures */</div><div class='del'>-	h-&gt;reply_pool_size = h-&gt;max_commands * sizeof(u64);</div><div class='add'>+	h-&gt;reply_pool_size = h-&gt;max_commands * sizeof(u64) * h-&gt;nreply_queues;</div><div class='ctx'> 	h-&gt;reply_pool = pci_alloc_consistent(h-&gt;pdev, h-&gt;reply_pool_size,</div><div class='ctx'> 				&amp;(h-&gt;reply_pool_dhandle));</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; h-&gt;nreply_queues; i++) {</div><div class='add'>+		h-&gt;reply_queue[i].head = &amp;h-&gt;reply_pool[h-&gt;max_commands * i];</div><div class='add'>+		h-&gt;reply_queue[i].size = h-&gt;max_commands;</div><div class='add'>+		h-&gt;reply_queue[i].wraparound = 1;  /* spec: init to 1 */</div><div class='add'>+		h-&gt;reply_queue[i].current_entry = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Need a block fetch table for performant mode */</div><div class='ctx'> 	h-&gt;blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *</div><div class='ctx'> 				sizeof(u32)), GFP_KERNEL);</div><div class='head'>diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h<br/>index 7b28d54fa878..981647989bfd 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/hpsa.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/hpsa.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/hpsa.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/hpsa.h</a></div><div class='hunk'>@@ -34,7 +34,7 @@ struct access_method {</div><div class='ctx'> 	void (*set_intr_mask)(struct ctlr_info *h, unsigned long val);</div><div class='ctx'> 	unsigned long (*fifo_full)(struct ctlr_info *h);</div><div class='ctx'> 	bool (*intr_pending)(struct ctlr_info *h);</div><div class='del'>-	unsigned long (*command_completed)(struct ctlr_info *h);</div><div class='add'>+	unsigned long (*command_completed)(struct ctlr_info *h, u8 q);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct hpsa_scsi_dev_t {</div><div class='hunk'>@@ -48,6 +48,13 @@ struct hpsa_scsi_dev_t {</div><div class='ctx'> 	unsigned char raid_level;	/* from inquiry page 0xC1 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct reply_pool {</div><div class='add'>+	u64 *head;</div><div class='add'>+	size_t size;</div><div class='add'>+	u8 wraparound;</div><div class='add'>+	u32 current_entry;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct ctlr_info {</div><div class='ctx'> 	int	ctlr;</div><div class='ctx'> 	char	devname[8];</div><div class='hunk'>@@ -68,7 +75,7 @@ struct ctlr_info {</div><div class='ctx'> #	define DOORBELL_INT	1</div><div class='ctx'> #	define SIMPLE_MODE_INT	2</div><div class='ctx'> #	define MEMQ_MODE_INT	3</div><div class='del'>-	unsigned int intr[4];</div><div class='add'>+	unsigned int intr[MAX_REPLY_QUEUES];</div><div class='ctx'> 	unsigned int msix_vector;</div><div class='ctx'> 	unsigned int msi_vector;</div><div class='ctx'> 	int intr_mode; /* either PERF_MODE_INT or SIMPLE_MODE_INT */</div><div class='hunk'>@@ -78,7 +85,6 @@ struct ctlr_info {</div><div class='ctx'> 	struct list_head reqQ;</div><div class='ctx'> 	struct list_head cmpQ;</div><div class='ctx'> 	unsigned int Qdepth;</div><div class='del'>-	unsigned int maxQsinceinit;</div><div class='ctx'> 	unsigned int maxSG;</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> 	int maxsgentries;</div><div class='hunk'>@@ -111,20 +117,45 @@ struct ctlr_info {</div><div class='ctx'> 	unsigned long transMethod;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Performant mode completion buffer</div><div class='add'>+	 * Performant mode completion buffers</div><div class='ctx'> 	 */</div><div class='ctx'> 	u64 *reply_pool;</div><div class='del'>-	dma_addr_t reply_pool_dhandle;</div><div class='del'>-	u64 *reply_pool_head;</div><div class='ctx'> 	size_t reply_pool_size;</div><div class='del'>-	unsigned char reply_pool_wraparound;</div><div class='add'>+	struct reply_pool reply_queue[MAX_REPLY_QUEUES];</div><div class='add'>+	u8 nreply_queues;</div><div class='add'>+	dma_addr_t reply_pool_dhandle;</div><div class='ctx'> 	u32 *blockFetchTable;</div><div class='ctx'> 	unsigned char *hba_inquiry_data;</div><div class='ctx'> 	u64 last_intr_timestamp;</div><div class='ctx'> 	u32 last_heartbeat;</div><div class='ctx'> 	u64 last_heartbeat_timestamp;</div><div class='add'>+	u32 heartbeat_sample_interval;</div><div class='add'>+	atomic_t firmware_flash_in_progress;</div><div class='ctx'> 	u32 lockup_detected;</div><div class='ctx'> 	struct list_head lockup_list;</div><div class='add'>+	/* Address of h-&gt;q[x] is passed to intr handler to know which queue */</div><div class='add'>+	u8 q[MAX_REPLY_QUEUES];</div><div class='add'>+	u32 TMFSupportFlags; /* cache what task mgmt funcs are supported. */</div><div class='add'>+#define HPSATMF_BITS_SUPPORTED  (1 &lt;&lt; 0)</div><div class='add'>+#define HPSATMF_PHYS_LUN_RESET  (1 &lt;&lt; 1)</div><div class='add'>+#define HPSATMF_PHYS_NEX_RESET  (1 &lt;&lt; 2)</div><div class='add'>+#define HPSATMF_PHYS_TASK_ABORT (1 &lt;&lt; 3)</div><div class='add'>+#define HPSATMF_PHYS_TSET_ABORT (1 &lt;&lt; 4)</div><div class='add'>+#define HPSATMF_PHYS_CLEAR_ACA  (1 &lt;&lt; 5)</div><div class='add'>+#define HPSATMF_PHYS_CLEAR_TSET (1 &lt;&lt; 6)</div><div class='add'>+#define HPSATMF_PHYS_QRY_TASK   (1 &lt;&lt; 7)</div><div class='add'>+#define HPSATMF_PHYS_QRY_TSET   (1 &lt;&lt; 8)</div><div class='add'>+#define HPSATMF_PHYS_QRY_ASYNC  (1 &lt;&lt; 9)</div><div class='add'>+#define HPSATMF_MASK_SUPPORTED  (1 &lt;&lt; 16)</div><div class='add'>+#define HPSATMF_LOG_LUN_RESET   (1 &lt;&lt; 17)</div><div class='add'>+#define HPSATMF_LOG_NEX_RESET   (1 &lt;&lt; 18)</div><div class='add'>+#define HPSATMF_LOG_TASK_ABORT  (1 &lt;&lt; 19)</div><div class='add'>+#define HPSATMF_LOG_TSET_ABORT  (1 &lt;&lt; 20)</div><div class='add'>+#define HPSATMF_LOG_CLEAR_ACA   (1 &lt;&lt; 21)</div><div class='add'>+#define HPSATMF_LOG_CLEAR_TSET  (1 &lt;&lt; 22)</div><div class='add'>+#define HPSATMF_LOG_QRY_TASK    (1 &lt;&lt; 23)</div><div class='add'>+#define HPSATMF_LOG_QRY_TSET    (1 &lt;&lt; 24)</div><div class='add'>+#define HPSATMF_LOG_QRY_ASYNC   (1 &lt;&lt; 25)</div><div class='ctx'> };</div><div class='ctx'> #define HPSA_ABORT_MSG 0</div><div class='ctx'> #define HPSA_DEVICE_RESET_MSG 1</div><div class='hunk'>@@ -216,9 +247,6 @@ static void SA5_submit_command(struct ctlr_info *h,</div><div class='ctx'> 		c-&gt;Header.Tag.lower);</div><div class='ctx'> 	writel(c-&gt;busaddr, h-&gt;vaddr + SA5_REQUEST_PORT_OFFSET);</div><div class='ctx'> 	(void) readl(h-&gt;vaddr + SA5_SCRATCHPAD_OFFSET);</div><div class='del'>-	h-&gt;commands_outstanding++;</div><div class='del'>-	if (h-&gt;commands_outstanding &gt; h-&gt;max_outstanding)</div><div class='del'>-		h-&gt;max_outstanding = h-&gt;commands_outstanding;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -254,16 +282,17 @@ static void SA5_performant_intr_mask(struct ctlr_info *h, unsigned long val)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned long SA5_performant_completed(struct ctlr_info *h)</div><div class='add'>+static unsigned long SA5_performant_completed(struct ctlr_info *h, u8 q)</div><div class='ctx'> {</div><div class='del'>-	unsigned long register_value = FIFO_EMPTY;</div><div class='add'>+	struct reply_pool *rq = &amp;h-&gt;reply_queue[q];</div><div class='add'>+	unsigned long flags, register_value = FIFO_EMPTY;</div><div class='ctx'> </div><div class='del'>-	/* flush the controller write of the reply queue by reading</div><div class='del'>-	 * outbound doorbell status register.</div><div class='del'>-	 */</div><div class='del'>-	register_value = readl(h-&gt;vaddr + SA5_OUTDB_STATUS);</div><div class='ctx'> 	/* msi auto clears the interrupt pending bit. */</div><div class='ctx'> 	if (!(h-&gt;msi_vector || h-&gt;msix_vector)) {</div><div class='add'>+		/* flush the controller write of the reply queue by reading</div><div class='add'>+		 * outbound doorbell status register.</div><div class='add'>+		 */</div><div class='add'>+		register_value = readl(h-&gt;vaddr + SA5_OUTDB_STATUS);</div><div class='ctx'> 		writel(SA5_OUTDB_CLEAR_PERF_BIT, h-&gt;vaddr + SA5_OUTDB_CLEAR);</div><div class='ctx'> 		/* Do a read in order to flush the write to the controller</div><div class='ctx'> 		 * (as per spec.)</div><div class='hunk'>@@ -271,19 +300,20 @@ static unsigned long SA5_performant_completed(struct ctlr_info *h)</div><div class='ctx'> 		register_value = readl(h-&gt;vaddr + SA5_OUTDB_STATUS);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((*(h-&gt;reply_pool_head) &amp; 1) == (h-&gt;reply_pool_wraparound)) {</div><div class='del'>-		register_value = *(h-&gt;reply_pool_head);</div><div class='del'>-		(h-&gt;reply_pool_head)++;</div><div class='add'>+	if ((rq-&gt;head[rq-&gt;current_entry] &amp; 1) == rq-&gt;wraparound) {</div><div class='add'>+		register_value = rq-&gt;head[rq-&gt;current_entry];</div><div class='add'>+		rq-&gt;current_entry++;</div><div class='add'>+		spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 		h-&gt;commands_outstanding--;</div><div class='add'>+		spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		register_value = FIFO_EMPTY;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Check for wraparound */</div><div class='del'>-	if (h-&gt;reply_pool_head == (h-&gt;reply_pool + h-&gt;max_commands)) {</div><div class='del'>-		h-&gt;reply_pool_head = h-&gt;reply_pool;</div><div class='del'>-		h-&gt;reply_pool_wraparound ^= 1;</div><div class='add'>+	if (rq-&gt;current_entry == h-&gt;max_commands) {</div><div class='add'>+		rq-&gt;current_entry = 0;</div><div class='add'>+		rq-&gt;wraparound ^= 1;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	return register_value;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -303,13 +333,18 @@ static unsigned long SA5_fifo_full(struct ctlr_info *h)</div><div class='ctx'>  *   returns value read from hardware.</div><div class='ctx'>  *     returns FIFO_EMPTY if there is nothing to read</div><div class='ctx'>  */</div><div class='del'>-static unsigned long SA5_completed(struct ctlr_info *h)</div><div class='add'>+static unsigned long SA5_completed(struct ctlr_info *h,</div><div class='add'>+	__attribute__((unused)) u8 q)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long register_value</div><div class='ctx'> 		= readl(h-&gt;vaddr + SA5_REPLY_PORT_OFFSET);</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (register_value != FIFO_EMPTY)</div><div class='add'>+	if (register_value != FIFO_EMPTY) {</div><div class='add'>+		spin_lock_irqsave(&amp;h-&gt;lock, flags);</div><div class='ctx'> 		h-&gt;commands_outstanding--;</div><div class='add'>+		spin_unlock_irqrestore(&amp;h-&gt;lock, flags);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> #ifdef HPSA_DEBUG</div><div class='ctx'> 	if (register_value != FIFO_EMPTY)</div><div class='head'>diff --git a/drivers/scsi/hpsa_cmd.h b/drivers/scsi/hpsa_cmd.h<br/>index 8049815d8c1e..a894f2eca7ac 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/hpsa_cmd.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/hpsa_cmd.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/hpsa_cmd.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/hpsa_cmd.h</a></div><div class='hunk'>@@ -82,6 +82,29 @@</div><div class='ctx'> #define TYPE_CMD				0x00</div><div class='ctx'> #define TYPE_MSG				0x01</div><div class='ctx'> </div><div class='add'>+/* Message Types  */</div><div class='add'>+#define HPSA_TASK_MANAGEMENT    0x00</div><div class='add'>+#define HPSA_RESET              0x01</div><div class='add'>+#define HPSA_SCAN               0x02</div><div class='add'>+#define HPSA_NOOP               0x03</div><div class='add'>+</div><div class='add'>+#define HPSA_CTLR_RESET_TYPE    0x00</div><div class='add'>+#define HPSA_BUS_RESET_TYPE     0x01</div><div class='add'>+#define HPSA_TARGET_RESET_TYPE  0x03</div><div class='add'>+#define HPSA_LUN_RESET_TYPE     0x04</div><div class='add'>+#define HPSA_NEXUS_RESET_TYPE   0x05</div><div class='add'>+</div><div class='add'>+/* Task Management Functions */</div><div class='add'>+#define HPSA_TMF_ABORT_TASK     0x00</div><div class='add'>+#define HPSA_TMF_ABORT_TASK_SET 0x01</div><div class='add'>+#define HPSA_TMF_CLEAR_ACA      0x02</div><div class='add'>+#define HPSA_TMF_CLEAR_TASK_SET 0x03</div><div class='add'>+#define HPSA_TMF_QUERY_TASK     0x04</div><div class='add'>+#define HPSA_TMF_QUERY_TASK_SET 0x05</div><div class='add'>+#define HPSA_TMF_QUERY_ASYNCEVENT 0x06</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /* config space register offsets */</div><div class='ctx'> #define CFG_VENDORID            0x00</div><div class='ctx'> #define CFG_DEVICEID            0x02</div><div class='hunk'>@@ -106,6 +129,7 @@</div><div class='ctx'> #define CFGTBL_Trans_Simple     0x00000002l</div><div class='ctx'> #define CFGTBL_Trans_Performant 0x00000004l</div><div class='ctx'> #define CFGTBL_Trans_use_short_tags 0x20000000l</div><div class='add'>+#define CFGTBL_Trans_enable_directed_msix (1 &lt;&lt; 30)</div><div class='ctx'> </div><div class='ctx'> #define CFGTBL_BusType_Ultra2   0x00000001l</div><div class='ctx'> #define CFGTBL_BusType_Ultra3   0x00000002l</div><div class='hunk'>@@ -162,6 +186,7 @@ struct SenseSubsystem_info {</div><div class='ctx'> #define BMIC_WRITE 0x27</div><div class='ctx'> #define BMIC_CACHE_FLUSH 0xc2</div><div class='ctx'> #define HPSA_CACHE_FLUSH 0x01	/* C2 was already being used by HPSA */</div><div class='add'>+#define BMIC_FLASH_FIRMWARE 0xF7</div><div class='ctx'> </div><div class='ctx'> /* Command List Structure */</div><div class='ctx'> union SCSI3Addr {</div><div class='hunk'>@@ -337,11 +362,17 @@ struct CfgTable {</div><div class='ctx'> 	u32		MaxPhysicalDevices;</div><div class='ctx'> 	u32		MaxPhysicalDrivesPerLogicalUnit;</div><div class='ctx'> 	u32		MaxPerformantModeCommands;</div><div class='del'>-	u8		reserved[0x78 - 0x58];</div><div class='add'>+	u32		MaxBlockFetch;</div><div class='add'>+	u32		PowerConservationSupport;</div><div class='add'>+	u32		PowerConservationEnable;</div><div class='add'>+	u32		TMFSupportFlags;</div><div class='add'>+	u8		TMFTagMask[8];</div><div class='add'>+	u8		reserved[0x78 - 0x70];</div><div class='ctx'> 	u32		misc_fw_support; /* offset 0x78 */</div><div class='ctx'> #define			MISC_FW_DOORBELL_RESET (0x02)</div><div class='ctx'> #define			MISC_FW_DOORBELL_RESET2 (0x010)</div><div class='ctx'> 	u8		driver_version[32];</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define NUM_BLOCKFETCH_ENTRIES 8</div><div class='hunk'>@@ -351,8 +382,8 @@ struct TransTable_struct {</div><div class='ctx'> 	u32            RepQCount;</div><div class='ctx'> 	u32            RepQCtrAddrLow32;</div><div class='ctx'> 	u32            RepQCtrAddrHigh32;</div><div class='del'>-	u32            RepQAddr0Low32;</div><div class='del'>-	u32            RepQAddr0High32;</div><div class='add'>+#define MAX_REPLY_QUEUES 8</div><div class='add'>+	struct vals32  RepQAddr[MAX_REPLY_QUEUES];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct hpsa_pci_info {</div><div class='head'>diff --git a/drivers/scsi/ibmmca.c b/drivers/scsi/ibmmca.c<br/>deleted file mode 100644<br/>index cd09132d5d7d..000000000000<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/ibmmca.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/ibmmca.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,2379 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- Low Level Linux Driver for the IBM Microchannel SCSI Subsystem for</div><div class='del'>- Linux Kernel &gt;= 2.4.0.</div><div class='del'>- Copyright (c) 1995 Strom Systems, Inc. under the terms of the GNU</div><div class='del'>- General Public License. Written by Martin Kolinek, December 1995.</div><div class='del'>- Further development by: Chris Beauregard, Klaus Kudielka, Michael Lang</div><div class='del'>- See the file Documentation/scsi/ibmmca.txt for a detailed description</div><div class='del'>- of this driver, the commandline arguments and the history of its</div><div class='del'>- development.</div><div class='del'>- See the WWW-page: http://www.uni-mainz.de/~langm000/linux.html for latest</div><div class='del'>- updates, info and ADF-files for adapters supported by this driver.</div><div class='del'>-</div><div class='del'>- Alan Cox &lt;alan@lxorguk.ukuu.org.uk&gt;</div><div class='del'>- Updated for Linux 2.5.45 to use the new error handler, cleaned up the</div><div class='del'>- lock macros and did a few unavoidable locking tweaks, plus one locking</div><div class='del'>- fix in the irq and completion path.</div><div class='del'>- </div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/ctype.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/blkdev.h&gt;</div><div class='del'>-#include &lt;linux/proc_fs.h&gt;</div><div class='del'>-#include &lt;linux/stat.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include "scsi.h"</div><div class='del'>-#include &lt;scsi/scsi_host.h&gt;</div><div class='del'>-</div><div class='del'>-/* Common forward declarations for all Linux-versions: */</div><div class='del'>-static int ibmmca_queuecommand (struct Scsi_Host *, struct scsi_cmnd *);</div><div class='del'>-static int ibmmca_abort (Scsi_Cmnd *);</div><div class='del'>-static int ibmmca_host_reset (Scsi_Cmnd *);</div><div class='del'>-static int ibmmca_biosparam (struct scsi_device *, struct block_device *, sector_t, int *);</div><div class='del'>-static int ibmmca_proc_info(struct Scsi_Host *shpnt, char *buffer, char **start, off_t offset, int length, int inout);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* current version of this driver-source: */</div><div class='del'>-#define IBMMCA_SCSI_DRIVER_VERSION "4.0b-ac"</div><div class='del'>-</div><div class='del'>-/* driver configuration */</div><div class='del'>-#define IM_MAX_HOSTS     8	/* maximum number of host adapters */</div><div class='del'>-#define IM_RESET_DELAY	60	/* seconds allowed for a reset */</div><div class='del'>-</div><div class='del'>-/* driver debugging - #undef all for normal operation */</div><div class='del'>-/* if defined: count interrupts and ignore this special one: */</div><div class='del'>-#undef	IM_DEBUG_TIMEOUT	//50</div><div class='del'>-#define TIMEOUT_PUN	0</div><div class='del'>-#define TIMEOUT_LUN	0</div><div class='del'>-/* verbose interrupt: */</div><div class='del'>-#undef IM_DEBUG_INT</div><div class='del'>-/* verbose queuecommand: */</div><div class='del'>-#undef IM_DEBUG_CMD</div><div class='del'>-/* verbose queucommand for specific SCSI-device type: */</div><div class='del'>-#undef IM_DEBUG_CMD_SPEC_DEV</div><div class='del'>-/* verbose device probing */</div><div class='del'>-#undef IM_DEBUG_PROBE</div><div class='del'>-</div><div class='del'>-/* device type that shall be displayed on syslog (only during debugging): */</div><div class='del'>-#define IM_DEBUG_CMD_DEVICE	TYPE_TAPE</div><div class='del'>-</div><div class='del'>-/* relative addresses of hardware registers on a subsystem */</div><div class='del'>-#define IM_CMD_REG(h)	((h)-&gt;io_port)	/*Command Interface, (4 bytes long) */</div><div class='del'>-#define IM_ATTN_REG(h)	((h)-&gt;io_port+4)	/*Attention (1 byte) */</div><div class='del'>-#define IM_CTR_REG(h)	((h)-&gt;io_port+5)	/*Basic Control (1 byte) */</div><div class='del'>-#define IM_INTR_REG(h)	((h)-&gt;io_port+6)	/*Interrupt Status (1 byte, r/o) */</div><div class='del'>-#define IM_STAT_REG(h)	((h)-&gt;io_port+7)	/*Basic Status (1 byte, read only) */</div><div class='del'>-</div><div class='del'>-/* basic I/O-port of first adapter */</div><div class='del'>-#define IM_IO_PORT	0x3540</div><div class='del'>-/* maximum number of hosts that can be found */</div><div class='del'>-#define IM_N_IO_PORT	8</div><div class='del'>-</div><div class='del'>-/*requests going into the upper nibble of the Attention register */</div><div class='del'>-/*note: the lower nibble specifies the device(0-14), or subsystem(15) */</div><div class='del'>-#define IM_IMM_CMD	0x10	/*immediate command */</div><div class='del'>-#define IM_SCB		0x30	/*Subsystem Control Block command */</div><div class='del'>-#define IM_LONG_SCB	0x40	/*long Subsystem Control Block command */</div><div class='del'>-#define IM_EOI		0xe0	/*end-of-interrupt request */</div><div class='del'>-</div><div class='del'>-/*values for bits 7,1,0 of Basic Control reg. (bits 6-2 reserved) */</div><div class='del'>-#define IM_HW_RESET	0x80	/*hardware reset */</div><div class='del'>-#define IM_ENABLE_DMA	0x02	/*enable subsystem's busmaster DMA */</div><div class='del'>-#define IM_ENABLE_INTR	0x01	/*enable interrupts to the system */</div><div class='del'>-</div><div class='del'>-/*to interpret the upper nibble of Interrupt Status register */</div><div class='del'>-/*note: the lower nibble specifies the device(0-14), or subsystem(15) */</div><div class='del'>-#define IM_SCB_CMD_COMPLETED			0x10</div><div class='del'>-#define IM_SCB_CMD_COMPLETED_WITH_RETRIES	0x50</div><div class='del'>-#define IM_LOOP_SCATTER_BUFFER_FULL		0x60</div><div class='del'>-#define IM_ADAPTER_HW_FAILURE			0x70</div><div class='del'>-#define IM_IMMEDIATE_CMD_COMPLETED		0xa0</div><div class='del'>-#define IM_CMD_COMPLETED_WITH_FAILURE		0xc0</div><div class='del'>-#define IM_CMD_ERROR				0xe0</div><div class='del'>-#define IM_SOFTWARE_SEQUENCING_ERROR		0xf0</div><div class='del'>-</div><div class='del'>-/*to interpret bits 3-0 of Basic Status register (bits 7-4 reserved) */</div><div class='del'>-#define IM_CMD_REG_FULL		0x08</div><div class='del'>-#define IM_CMD_REG_EMPTY	0x04</div><div class='del'>-#define IM_INTR_REQUEST		0x02</div><div class='del'>-#define IM_BUSY			0x01</div><div class='del'>-</div><div class='del'>-/*immediate commands (word written into low 2 bytes of command reg) */</div><div class='del'>-#define IM_RESET_IMM_CMD	0x0400</div><div class='del'>-#define IM_FEATURE_CTR_IMM_CMD	0x040c</div><div class='del'>-#define IM_DMA_PACING_IMM_CMD	0x040d</div><div class='del'>-#define IM_ASSIGN_IMM_CMD	0x040e</div><div class='del'>-#define IM_ABORT_IMM_CMD	0x040f</div><div class='del'>-#define IM_FORMAT_PREP_IMM_CMD	0x0417</div><div class='del'>-</div><div class='del'>-/*SCB (Subsystem Control Block) structure */</div><div class='del'>-struct im_scb {</div><div class='del'>-	unsigned short command;	/*command word (read, etc.) */</div><div class='del'>-	unsigned short enable;	/*enable word, modifies cmd */</div><div class='del'>-	union {</div><div class='del'>-		unsigned long log_blk_adr;	/*block address on SCSI device */</div><div class='del'>-		unsigned char scsi_cmd_length;	/*6,10,12, for other scsi cmd */</div><div class='del'>-	} u1;</div><div class='del'>-	unsigned long sys_buf_adr;	/*physical system memory adr */</div><div class='del'>-	unsigned long sys_buf_length;	/*size of sys mem buffer */</div><div class='del'>-	unsigned long tsb_adr;	/*Termination Status Block adr */</div><div class='del'>-	unsigned long scb_chain_adr;	/*optional SCB chain address */</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			unsigned short count;	/*block count, on SCSI device */</div><div class='del'>-			unsigned short length;	/*block length, on SCSI device */</div><div class='del'>-		} blk;</div><div class='del'>-		unsigned char scsi_command[12];	/*other scsi command */</div><div class='del'>-	} u2;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*structure scatter-gather element (for list of system memory areas) */</div><div class='del'>-struct im_sge {</div><div class='del'>-	void *address;</div><div class='del'>-	unsigned long byte_length;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*structure returned by a get_pos_info command: */</div><div class='del'>-struct im_pos_info {</div><div class='del'>-	unsigned short pos_id;	/* adapter id */</div><div class='del'>-	unsigned char pos_3a;	/* pos 3 (if pos 6 = 0) */</div><div class='del'>-	unsigned char pos_2;	/* pos 2 */</div><div class='del'>-	unsigned char int_level;	/* interrupt level IRQ 11 or 14 */</div><div class='del'>-	unsigned char pos_4a;	/* pos 4 (if pos 6 = 0) */</div><div class='del'>-	unsigned short connector_size;	/* MCA connector size: 16 or 32 Bit */</div><div class='del'>-	unsigned char num_luns;	/* number of supported luns per device */</div><div class='del'>-	unsigned char num_puns;	/* number of supported puns */</div><div class='del'>-	unsigned char pacing_factor;	/* pacing factor */</div><div class='del'>-	unsigned char num_ldns;	/* number of ldns available */</div><div class='del'>-	unsigned char eoi_off;	/* time EOI and interrupt inactive */</div><div class='del'>-	unsigned char max_busy;	/* time between reset and busy on */</div><div class='del'>-	unsigned short cache_stat;	/* ldn cachestat. Bit=1 = not cached */</div><div class='del'>-	unsigned short retry_stat;	/* retry status of ldns. Bit=1=disabled */</div><div class='del'>-	unsigned char pos_4b;	/* pos 4 (if pos 6 = 1) */</div><div class='del'>-	unsigned char pos_3b;	/* pos 3 (if pos 6 = 1) */</div><div class='del'>-	unsigned char pos_6;	/* pos 6 */</div><div class='del'>-	unsigned char pos_5;	/* pos 5 */</div><div class='del'>-	unsigned short max_overlap;	/* maximum overlapping requests */</div><div class='del'>-	unsigned short num_bus;	/* number of SCSI-busses */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*values for SCB command word */</div><div class='del'>-#define IM_NO_SYNCHRONOUS      0x0040	/*flag for any command */</div><div class='del'>-#define IM_NO_DISCONNECT       0x0080	/*flag for any command */</div><div class='del'>-#define IM_READ_DATA_CMD       0x1c01</div><div class='del'>-#define IM_WRITE_DATA_CMD      0x1c02</div><div class='del'>-#define IM_READ_VERIFY_CMD     0x1c03</div><div class='del'>-#define IM_WRITE_VERIFY_CMD    0x1c04</div><div class='del'>-#define IM_REQUEST_SENSE_CMD   0x1c08</div><div class='del'>-#define IM_READ_CAPACITY_CMD   0x1c09</div><div class='del'>-#define IM_DEVICE_INQUIRY_CMD  0x1c0b</div><div class='del'>-#define IM_READ_LOGICAL_CMD    0x1c2a</div><div class='del'>-#define IM_OTHER_SCSI_CMD_CMD  0x241f</div><div class='del'>-</div><div class='del'>-/* unused, but supported, SCB commands */</div><div class='del'>-#define IM_GET_COMMAND_COMPLETE_STATUS_CMD   0x1c07	/* command status */</div><div class='del'>-#define IM_GET_POS_INFO_CMD                  0x1c0a	/* returns neat stuff */</div><div class='del'>-#define IM_READ_PREFETCH_CMD                 0x1c31	/* caching controller only */</div><div class='del'>-#define IM_FOMAT_UNIT_CMD                    0x1c16	/* format unit */</div><div class='del'>-#define IM_REASSIGN_BLOCK_CMD                0x1c18	/* in case of error */</div><div class='del'>-</div><div class='del'>-/*values to set bits in the enable word of SCB */</div><div class='del'>-#define IM_READ_CONTROL              0x8000</div><div class='del'>-#define IM_REPORT_TSB_ONLY_ON_ERROR  0x4000</div><div class='del'>-#define IM_RETRY_ENABLE              0x2000</div><div class='del'>-#define IM_POINTER_TO_LIST           0x1000</div><div class='del'>-#define IM_SUPRESS_EXCEPTION_SHORT   0x0400</div><div class='del'>-#define IM_BYPASS_BUFFER             0x0200</div><div class='del'>-#define IM_CHAIN_ON_NO_ERROR         0x0001</div><div class='del'>-</div><div class='del'>-/*TSB (Termination Status Block) structure */</div><div class='del'>-struct im_tsb {</div><div class='del'>-	unsigned short end_status;</div><div class='del'>-	unsigned short reserved1;</div><div class='del'>-	unsigned long residual_byte_count;</div><div class='del'>-	unsigned long sg_list_element_adr;</div><div class='del'>-	unsigned short status_length;</div><div class='del'>-	unsigned char dev_status;</div><div class='del'>-	unsigned char cmd_status;</div><div class='del'>-	unsigned char dev_error;</div><div class='del'>-	unsigned char cmd_error;</div><div class='del'>-	unsigned short reserved2;</div><div class='del'>-	unsigned short reserved3;</div><div class='del'>-	unsigned short low_of_last_scb_adr;</div><div class='del'>-	unsigned short high_of_last_scb_adr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*subsystem uses interrupt request level 14 */</div><div class='del'>-#define IM_IRQ     14</div><div class='del'>-/*SCSI-2 F/W may evade to interrupt 11 */</div><div class='del'>-#define IM_IRQ_FW  11</div><div class='del'>-</div><div class='del'>-/* Model 95 has an additional alphanumeric display, which can be used</div><div class='del'>-   to display SCSI-activities. 8595 models do not have any disk led, which</div><div class='del'>-   makes this feature quite useful.</div><div class='del'>-   The regular PS/2 disk led is turned on/off by bits 6,7 of system</div><div class='del'>-   control port. */</div><div class='del'>-</div><div class='del'>-/* LED display-port (actually, last LED on display) */</div><div class='del'>-#define MOD95_LED_PORT	   0x108</div><div class='del'>-/* system-control-register of PS/2s with diskindicator */</div><div class='del'>-#define PS2_SYS_CTR        0x92</div><div class='del'>-/* activity displaying methods */</div><div class='del'>-#define LED_DISP           1</div><div class='del'>-#define LED_ADISP          2</div><div class='del'>-#define LED_ACTIVITY       4</div><div class='del'>-/* failed intr */</div><div class='del'>-#define CMD_FAIL           255</div><div class='del'>-</div><div class='del'>-/* The SCSI-ID(!) of the accessed SCSI-device is shown on PS/2-95 machines' LED</div><div class='del'>-   displays. ldn is no longer displayed here, because the ldn mapping is now </div><div class='del'>-   done dynamically and the ldn &lt;-&gt; pun,lun maps can be looked-up at boottime </div><div class='del'>-   or during uptime in /proc/scsi/ibmmca/&lt;host_no&gt; in case of trouble, </div><div class='del'>-   interest, debugging or just for having fun. The left number gives the</div><div class='del'>-   host-adapter number and the right shows the accessed SCSI-ID. */</div><div class='del'>-</div><div class='del'>-/* display_mode is set by the ibmmcascsi= command line arg */</div><div class='del'>-static int display_mode = 0;</div><div class='del'>-/* set default adapter timeout */</div><div class='del'>-static unsigned int adapter_timeout = 45;</div><div class='del'>-/* for probing on feature-command: */</div><div class='del'>-static unsigned int global_command_error_excuse = 0;</div><div class='del'>-/* global setting by command line for adapter_speed */</div><div class='del'>-static int global_adapter_speed = 0;	/* full speed by default */</div><div class='del'>-</div><div class='del'>-/* Panel / LED on, do it right for F/W addressin, too. adisplay will</div><div class='del'>- * just ignore ids&gt;7, as the panel has only 7 digits available */</div><div class='del'>-#define PS2_DISK_LED_ON(ad,id) { if (display_mode &amp; LED_DISP) { if (id&gt;9) \</div><div class='del'>-    outw((ad+48)|((id+55)&lt;&lt;8), MOD95_LED_PORT ); else \</div><div class='del'>-    outw((ad+48)|((id+48)&lt;&lt;8), MOD95_LED_PORT ); } else \</div><div class='del'>-    if (display_mode &amp; LED_ADISP) { if (id&lt;7) outb((char)(id+48),MOD95_LED_PORT+1+id); \</div><div class='del'>-    outb((char)(ad+48), MOD95_LED_PORT); } \</div><div class='del'>-    if ((display_mode &amp; LED_ACTIVITY)||(!display_mode)) \</div><div class='del'>-    outb(inb(PS2_SYS_CTR) | 0xc0, PS2_SYS_CTR); }</div><div class='del'>-</div><div class='del'>-/* Panel / LED off */</div><div class='del'>-/* bug fixed, Dec 15, 1997, where | was replaced by &amp; here */</div><div class='del'>-#define PS2_DISK_LED_OFF() { if (display_mode &amp; LED_DISP) \</div><div class='del'>-    outw(0x2020, MOD95_LED_PORT ); else if (display_mode &amp; LED_ADISP) { \</div><div class='del'>-    outl(0x20202020,MOD95_LED_PORT); outl(0x20202020,MOD95_LED_PORT+4); } \</div><div class='del'>-    if ((display_mode &amp; LED_ACTIVITY)||(!display_mode)) \</div><div class='del'>-    outb(inb(PS2_SYS_CTR) &amp; 0x3f, PS2_SYS_CTR); }</div><div class='del'>-</div><div class='del'>-/* types of different supported hardware that goes to hostdata special */</div><div class='del'>-#define IBM_SCSI2_FW     0</div><div class='del'>-#define IBM_7568_WCACHE  1</div><div class='del'>-#define IBM_EXP_UNIT     2</div><div class='del'>-#define IBM_SCSI_WCACHE  3</div><div class='del'>-#define IBM_SCSI         4</div><div class='del'>-#define IBM_INTEGSCSI	 5</div><div class='del'>-</div><div class='del'>-/* other special flags for hostdata structure */</div><div class='del'>-#define FORCED_DETECTION         100</div><div class='del'>-#define INTEGRATED_SCSI          101</div><div class='del'>-</div><div class='del'>-/* List of possible IBM-SCSI-adapters */</div><div class='del'>-static short ibmmca_id_table[] = {</div><div class='del'>-	0x8efc,</div><div class='del'>-	0x8efd,</div><div class='del'>-	0x8ef8,</div><div class='del'>-	0x8eff,</div><div class='del'>-	0x8efe,</div><div class='del'>-	/* No entry for integrated SCSI, that's part of the register */</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const char *ibmmca_description[] = {</div><div class='del'>-	"IBM SCSI-2 F/W Adapter",	/* special = 0 */</div><div class='del'>-	"IBM 7568 Industrial Computer SCSI Adapter w/Cache",	/* special = 1 */</div><div class='del'>-	"IBM Expansion Unit SCSI Controller",	/* special = 2 */</div><div class='del'>-	"IBM SCSI Adapter w/Cache",	/* special = 3 */</div><div class='del'>-	"IBM SCSI Adapter",	/* special = 4 */</div><div class='del'>-	"IBM Integrated SCSI Controller", /* special = 5 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Max number of logical devices (can be up from 0 to 14).  15 is the address</div><div class='del'>-of the adapter itself. */</div><div class='del'>-#define MAX_LOG_DEV  15</div><div class='del'>-</div><div class='del'>-/*local data for a logical device */</div><div class='del'>-struct logical_device {</div><div class='del'>-	struct im_scb scb;	/* SCSI-subsystem-control-block structure */</div><div class='del'>-	struct im_tsb tsb;	/* SCSI command complete status block structure */</div><div class='del'>-	struct im_sge sge[16];	/* scatter gather list structure */</div><div class='del'>-	unsigned char buf[256];	/* SCSI command return data buffer */</div><div class='del'>-	Scsi_Cmnd *cmd;		/* SCSI-command that is currently in progress */</div><div class='del'>-	int device_type;	/* type of the SCSI-device. See include/scsi/scsi.h</div><div class='del'>-				   for interpretation of the possible values */</div><div class='del'>-	int block_length;	/* blocksize of a particular logical SCSI-device */</div><div class='del'>-	int cache_flag;		/* 1 if this is uncached, 0 if cache is present for ldn */</div><div class='del'>-	int retry_flag;		/* 1 if adapter retry is disabled, 0 if enabled */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* statistics of the driver during operations (for proc_info) */</div><div class='del'>-struct Driver_Statistics {</div><div class='del'>-	/* SCSI statistics on the adapter */</div><div class='del'>-	int ldn_access[MAX_LOG_DEV + 1];	/* total accesses on a ldn */</div><div class='del'>-	int ldn_read_access[MAX_LOG_DEV + 1];	/* total read-access on a ldn */</div><div class='del'>-	int ldn_write_access[MAX_LOG_DEV + 1];	/* total write-access on a ldn */</div><div class='del'>-	int ldn_inquiry_access[MAX_LOG_DEV + 1];	/* total inquiries on a ldn */</div><div class='del'>-	int ldn_modeselect_access[MAX_LOG_DEV + 1];	/* total mode selects on ldn */</div><div class='del'>-	int scbs;		/* short SCBs queued */</div><div class='del'>-	int long_scbs;		/* long SCBs queued */</div><div class='del'>-	int total_accesses;	/* total accesses on all ldns */</div><div class='del'>-	int total_interrupts;	/* total interrupts (should be</div><div class='del'>-				   same as total_accesses) */</div><div class='del'>-	int total_errors;	/* command completed with error */</div><div class='del'>-	/* dynamical assignment statistics */</div><div class='del'>-	int total_scsi_devices;	/* number of physical pun,lun */</div><div class='del'>-	int dyn_flag;		/* flag showing dynamical mode */</div><div class='del'>-	int dynamical_assignments;	/* number of remappings of ldns */</div><div class='del'>-	int ldn_assignments[MAX_LOG_DEV + 1];	/* number of remappings of each</div><div class='del'>-						   ldn */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* data structure for each host adapter */</div><div class='del'>-struct ibmmca_hostdata {</div><div class='del'>-	/* array of logical devices: */</div><div class='del'>-	struct logical_device _ld[MAX_LOG_DEV + 1];</div><div class='del'>-	/* array to convert (pun, lun) into logical device number: */</div><div class='del'>-	unsigned char _get_ldn[16][8];</div><div class='del'>-	/*array that contains the information about the physical SCSI-devices</div><div class='del'>-	   attached to this host adapter: */</div><div class='del'>-	unsigned char _get_scsi[16][8];</div><div class='del'>-	/* used only when checking logical devices: */</div><div class='del'>-	int _local_checking_phase_flag;</div><div class='del'>-	/* report received interrupt: */</div><div class='del'>-	int _got_interrupt;</div><div class='del'>-	/* report termination-status of SCSI-command: */</div><div class='del'>-	int _stat_result;</div><div class='del'>-	/* reset status (used only when doing reset): */</div><div class='del'>-	int _reset_status;</div><div class='del'>-	/* code of the last SCSI command (needed for panic info): */</div><div class='del'>-	int _last_scsi_command[MAX_LOG_DEV + 1];</div><div class='del'>-	/* identifier of the last SCSI-command type */</div><div class='del'>-	int _last_scsi_type[MAX_LOG_DEV + 1];</div><div class='del'>-	/* last blockcount */</div><div class='del'>-	int _last_scsi_blockcount[MAX_LOG_DEV + 1];</div><div class='del'>-	/* last locgical block address */</div><div class='del'>-	unsigned long _last_scsi_logical_block[MAX_LOG_DEV + 1];</div><div class='del'>-	/* Counter that points on the next reassignable ldn for dynamical</div><div class='del'>-	   remapping. The default value is 7, that is the first reassignable</div><div class='del'>-	   number in the list at boottime: */</div><div class='del'>-	int _next_ldn;</div><div class='del'>-	/* Statistics-structure for this IBM-SCSI-host: */</div><div class='del'>-	struct Driver_Statistics _IBM_DS;</div><div class='del'>-	/* This hostadapters pos-registers pos2 until pos6 */</div><div class='del'>-	unsigned int _pos[8];</div><div class='del'>-	/* assign a special variable, that contains dedicated info about the</div><div class='del'>-	   adaptertype */</div><div class='del'>-	int _special;</div><div class='del'>-	/* connector size on the MCA bus */</div><div class='del'>-	int _connector_size;</div><div class='del'>-	/* synchronous SCSI transfer rate bitpattern */</div><div class='del'>-	int _adapter_speed;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* macros to access host data structure */</div><div class='del'>-#define subsystem_pun(h) ((h)-&gt;this_id)</div><div class='del'>-#define subsystem_maxid(h) ((h)-&gt;max_id)</div><div class='del'>-#define ld(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_ld)</div><div class='del'>-#define get_ldn(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_get_ldn)</div><div class='del'>-#define get_scsi(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_get_scsi)</div><div class='del'>-#define local_checking_phase_flag(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_local_checking_phase_flag)</div><div class='del'>-#define got_interrupt(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_got_interrupt)</div><div class='del'>-#define stat_result(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_stat_result)</div><div class='del'>-#define reset_status(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_reset_status)</div><div class='del'>-#define last_scsi_command(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_last_scsi_command)</div><div class='del'>-#define last_scsi_type(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_last_scsi_type)</div><div class='del'>-#define last_scsi_blockcount(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_last_scsi_blockcount)</div><div class='del'>-#define last_scsi_logical_block(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_last_scsi_logical_block)</div><div class='del'>-#define last_scsi_type(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_last_scsi_type)</div><div class='del'>-#define next_ldn(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_next_ldn)</div><div class='del'>-#define IBM_DS(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_IBM_DS)</div><div class='del'>-#define special(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_special)</div><div class='del'>-#define subsystem_connector_size(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_connector_size)</div><div class='del'>-#define adapter_speed(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_adapter_speed)</div><div class='del'>-#define pos2(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_pos[2])</div><div class='del'>-#define pos3(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_pos[3])</div><div class='del'>-#define pos4(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_pos[4])</div><div class='del'>-#define pos5(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_pos[5])</div><div class='del'>-#define pos6(h) (((struct ibmmca_hostdata *) (h)-&gt;hostdata)-&gt;_pos[6])</div><div class='del'>-</div><div class='del'>-/* Define a arbitrary number as subsystem-marker-type. This number is, as</div><div class='del'>-   described in the ANSI-SCSI-standard, not occupied by other device-types. */</div><div class='del'>-#define TYPE_IBM_SCSI_ADAPTER   0x2F</div><div class='del'>-</div><div class='del'>-/* Define 0xFF for no device type, because this type is not defined within</div><div class='del'>-   the ANSI-SCSI-standard, therefore, it can be used and should not cause any</div><div class='del'>-   harm. */</div><div class='del'>-#define TYPE_NO_DEVICE          0xFF</div><div class='del'>-</div><div class='del'>-/* define medium-changer. If this is not defined previously, e.g. Linux</div><div class='del'>-   2.0.x, define this type here. */</div><div class='del'>-#ifndef TYPE_MEDIUM_CHANGER</div><div class='del'>-#define TYPE_MEDIUM_CHANGER     0x08</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* define possible operations for the immediate_assign command */</div><div class='del'>-#define SET_LDN        0</div><div class='del'>-#define REMOVE_LDN     1</div><div class='del'>-</div><div class='del'>-/* ldn which is used to probe the SCSI devices */</div><div class='del'>-#define PROBE_LDN      0</div><div class='del'>-</div><div class='del'>-/* reset status flag contents */</div><div class='del'>-#define IM_RESET_NOT_IN_PROGRESS         0</div><div class='del'>-#define IM_RESET_IN_PROGRESS             1</div><div class='del'>-#define IM_RESET_FINISHED_OK             2</div><div class='del'>-#define IM_RESET_FINISHED_FAIL           3</div><div class='del'>-#define IM_RESET_NOT_IN_PROGRESS_NO_INT  4</div><div class='del'>-#define IM_RESET_FINISHED_OK_NO_INT      5</div><div class='del'>-</div><div class='del'>-/* define undefined SCSI-command */</div><div class='del'>-#define NO_SCSI                  0xffff</div><div class='del'>-</div><div class='del'>-/*-----------------------------------------------------------------------*/</div><div class='del'>-</div><div class='del'>-/* if this is nonzero, ibmmcascsi option has been passed to the kernel */</div><div class='del'>-static int io_port[IM_MAX_HOSTS] = { 0, 0, 0, 0, 0, 0, 0, 0 };</div><div class='del'>-static int scsi_id[IM_MAX_HOSTS] = { 7, 7, 7, 7, 7, 7, 7, 7 };</div><div class='del'>-</div><div class='del'>-/* fill module-parameters only, when this define is present.</div><div class='del'>-   (that is kernel version 2.1.x) */</div><div class='del'>-#if defined(MODULE)</div><div class='del'>-static char *boot_options = NULL;</div><div class='del'>-module_param(boot_options, charp, 0);</div><div class='del'>-module_param_array(io_port, int, NULL, 0);</div><div class='del'>-module_param_array(scsi_id, int, NULL, 0);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-#endif</div><div class='del'>-/*counter of concurrent disk read/writes, to turn on/off disk led */</div><div class='del'>-static int disk_rw_in_progress = 0;</div><div class='del'>-</div><div class='del'>-static unsigned int pos[8];	/* whole pos register-line for diagnosis */</div><div class='del'>-/* Taking into account the additions, made by ZP Gu.</div><div class='del'>- * This selects now the preset value from the configfile and</div><div class='del'>- * offers the 'normal' commandline option to be accepted */</div><div class='del'>-#ifdef CONFIG_IBMMCA_SCSI_ORDER_STANDARD</div><div class='del'>-static char ibm_ansi_order = 1;</div><div class='del'>-#else</div><div class='del'>-static char ibm_ansi_order = 0;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void issue_cmd(struct Scsi_Host *, unsigned long, unsigned char);</div><div class='del'>-static void internal_done(Scsi_Cmnd * cmd);</div><div class='del'>-static void check_devices(struct Scsi_Host *, int);</div><div class='del'>-static int immediate_assign(struct Scsi_Host *, unsigned int, unsigned int, unsigned int, unsigned int);</div><div class='del'>-static int immediate_feature(struct Scsi_Host *, unsigned int, unsigned int);</div><div class='del'>-#ifdef CONFIG_IBMMCA_SCSI_DEV_RESET</div><div class='del'>-static int immediate_reset(struct Scsi_Host *, unsigned int);</div><div class='del'>-#endif</div><div class='del'>-static int device_inquiry(struct Scsi_Host *, int);</div><div class='del'>-static int read_capacity(struct Scsi_Host *, int);</div><div class='del'>-static int get_pos_info(struct Scsi_Host *);</div><div class='del'>-static char *ti_p(int);</div><div class='del'>-static char *ti_l(int);</div><div class='del'>-static char *ibmrate(unsigned int, int);</div><div class='del'>-static int probe_display(int);</div><div class='del'>-static int probe_bus_mode(struct Scsi_Host *);</div><div class='del'>-static int device_exists(struct Scsi_Host *, int, int *, int *);</div><div class='del'>-static int option_setup(char *);</div><div class='del'>-/* local functions needed for proc_info */</div><div class='del'>-static int ldn_access_load(struct Scsi_Host *, int);</div><div class='del'>-static int ldn_access_total_read_write(struct Scsi_Host *);</div><div class='del'>-</div><div class='del'>-static irqreturn_t interrupt_handler(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	unsigned int intr_reg;</div><div class='del'>-	unsigned int cmd_result;</div><div class='del'>-	unsigned int ldn;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	Scsi_Cmnd *cmd;</div><div class='del'>-	int lastSCSI;</div><div class='del'>-	struct device *dev = dev_id;</div><div class='del'>-	struct Scsi_Host *shpnt = dev_get_drvdata(dev);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(shpnt-&gt;host_lock, flags);</div><div class='del'>-</div><div class='del'>-	if(!(inb(IM_STAT_REG(shpnt)) &amp; IM_INTR_REQUEST)) {</div><div class='del'>-		spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* the reset-function already did all the job, even ints got</div><div class='del'>-	   renabled on the subsystem, so just return */</div><div class='del'>-	if ((reset_status(shpnt) == IM_RESET_NOT_IN_PROGRESS_NO_INT) || (reset_status(shpnt) == IM_RESET_FINISHED_OK_NO_INT)) {</div><div class='del'>-		reset_status(shpnt) = IM_RESET_NOT_IN_PROGRESS;</div><div class='del'>-		spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-		return IRQ_HANDLED;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*must wait for attention reg not busy, then send EOI to subsystem */</div><div class='del'>-	while (1) {</div><div class='del'>-		if (!(inb(IM_STAT_REG(shpnt)) &amp; IM_BUSY))</div><div class='del'>-			break;</div><div class='del'>-		cpu_relax();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*get command result and logical device */</div><div class='del'>-	intr_reg = (unsigned char) (inb(IM_INTR_REG(shpnt)));</div><div class='del'>-	cmd_result = intr_reg &amp; 0xf0;</div><div class='del'>-	ldn = intr_reg &amp; 0x0f;</div><div class='del'>-	/* get the last_scsi_command here */</div><div class='del'>-	lastSCSI = last_scsi_command(shpnt)[ldn];</div><div class='del'>-	outb(IM_EOI | ldn, IM_ATTN_REG(shpnt));</div><div class='del'>-	</div><div class='del'>-	/*these should never happen (hw fails, or a local programming bug) */</div><div class='del'>-	if (!global_command_error_excuse) {</div><div class='del'>-		switch (cmd_result) {</div><div class='del'>-			/* Prevent from Ooopsing on error to show the real reason */</div><div class='del'>-		case IM_ADAPTER_HW_FAILURE:</div><div class='del'>-		case IM_SOFTWARE_SEQUENCING_ERROR:</div><div class='del'>-		case IM_CMD_ERROR:</div><div class='del'>-			printk(KERN_ERR "IBM MCA SCSI: Fatal Subsystem ERROR!\n");</div><div class='del'>-			printk(KERN_ERR "              Last cmd=0x%x, ena=%x, len=", lastSCSI, ld(shpnt)[ldn].scb.enable);</div><div class='del'>-			if (ld(shpnt)[ldn].cmd)</div><div class='del'>-				printk("%ld/%ld,", (long) (scsi_bufflen(ld(shpnt)[ldn].cmd)), (long) (ld(shpnt)[ldn].scb.sys_buf_length));</div><div class='del'>-			else</div><div class='del'>-				printk("none,");</div><div class='del'>-			if (ld(shpnt)[ldn].cmd)</div><div class='del'>-				printk("Blocksize=%d", ld(shpnt)[ldn].scb.u2.blk.length);</div><div class='del'>-			else</div><div class='del'>-				printk("Blocksize=none");</div><div class='del'>-			printk(", host=%p, ldn=0x%x\n", shpnt, ldn);</div><div class='del'>-			if (ld(shpnt)[ldn].cmd) {</div><div class='del'>-				printk(KERN_ERR "Blockcount=%d/%d\n", last_scsi_blockcount(shpnt)[ldn], ld(shpnt)[ldn].scb.u2.blk.count);</div><div class='del'>-				printk(KERN_ERR "Logical block=%lx/%lx\n", last_scsi_logical_block(shpnt)[ldn], ld(shpnt)[ldn].scb.u1.log_blk_adr);</div><div class='del'>-			}</div><div class='del'>-			printk(KERN_ERR "Reason given: %s\n", (cmd_result == IM_ADAPTER_HW_FAILURE) ? "HARDWARE FAILURE" : (cmd_result == IM_SOFTWARE_SEQUENCING_ERROR) ? "SOFTWARE SEQUENCING ERROR" : (cmd_result == IM_CMD_ERROR) ? "COMMAND ERROR" : "UNKNOWN");</div><div class='del'>-			/* if errors appear, enter this section to give detailed info */</div><div class='del'>-			printk(KERN_ERR "IBM MCA SCSI: Subsystem Error-Status follows:\n");</div><div class='del'>-			printk(KERN_ERR "              Command Type................: %x\n", last_scsi_type(shpnt)[ldn]);</div><div class='del'>-			printk(KERN_ERR "              Attention Register..........: %x\n", inb(IM_ATTN_REG(shpnt)));</div><div class='del'>-			printk(KERN_ERR "              Basic Control Register......: %x\n", inb(IM_CTR_REG(shpnt)));</div><div class='del'>-			printk(KERN_ERR "              Interrupt Status Register...: %x\n", intr_reg);</div><div class='del'>-			printk(KERN_ERR "              Basic Status Register.......: %x\n", inb(IM_STAT_REG(shpnt)));</div><div class='del'>-			if ((last_scsi_type(shpnt)[ldn] == IM_SCB) || (last_scsi_type(shpnt)[ldn] == IM_LONG_SCB)) {</div><div class='del'>-				printk(KERN_ERR "              SCB-Command.................: %x\n", ld(shpnt)[ldn].scb.command);</div><div class='del'>-				printk(KERN_ERR "              SCB-Enable..................: %x\n", ld(shpnt)[ldn].scb.enable);</div><div class='del'>-				printk(KERN_ERR "              SCB-logical block address...: %lx\n", ld(shpnt)[ldn].scb.u1.log_blk_adr);</div><div class='del'>-				printk(KERN_ERR "              SCB-system buffer address...: %lx\n", ld(shpnt)[ldn].scb.sys_buf_adr);</div><div class='del'>-				printk(KERN_ERR "              SCB-system buffer length....: %lx\n", ld(shpnt)[ldn].scb.sys_buf_length);</div><div class='del'>-				printk(KERN_ERR "              SCB-tsb address.............: %lx\n", ld(shpnt)[ldn].scb.tsb_adr);</div><div class='del'>-				printk(KERN_ERR "              SCB-Chain address...........: %lx\n", ld(shpnt)[ldn].scb.scb_chain_adr);</div><div class='del'>-				printk(KERN_ERR "              SCB-block count.............: %x\n", ld(shpnt)[ldn].scb.u2.blk.count);</div><div class='del'>-				printk(KERN_ERR "              SCB-block length............: %x\n", ld(shpnt)[ldn].scb.u2.blk.length);</div><div class='del'>-			}</div><div class='del'>-			printk(KERN_ERR "              Send this report to the maintainer.\n");</div><div class='del'>-			panic("IBM MCA SCSI: Fatal error message from the subsystem (0x%X,0x%X)!\n", lastSCSI, cmd_result);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		/* The command error handling is made silent, but we tell the</div><div class='del'>-		 * calling function, that there is a reported error from the</div><div class='del'>-		 * adapter. */</div><div class='del'>-		switch (cmd_result) {</div><div class='del'>-		case IM_ADAPTER_HW_FAILURE:</div><div class='del'>-		case IM_SOFTWARE_SEQUENCING_ERROR:</div><div class='del'>-		case IM_CMD_ERROR:</div><div class='del'>-			global_command_error_excuse = CMD_FAIL;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			global_command_error_excuse = 0;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	/* if no panic appeared, increase the interrupt-counter */</div><div class='del'>-	IBM_DS(shpnt).total_interrupts++;</div><div class='del'>-	/*only for local checking phase */</div><div class='del'>-	if (local_checking_phase_flag(shpnt)) {</div><div class='del'>-		stat_result(shpnt) = cmd_result;</div><div class='del'>-		got_interrupt(shpnt) = 1;</div><div class='del'>-		reset_status(shpnt) = IM_RESET_FINISHED_OK;</div><div class='del'>-		last_scsi_command(shpnt)[ldn] = NO_SCSI;</div><div class='del'>-		spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-		return IRQ_HANDLED;</div><div class='del'>-	}</div><div class='del'>-	/* handling of commands coming from upper level of scsi driver */</div><div class='del'>-	if (last_scsi_type(shpnt)[ldn] == IM_IMM_CMD) {</div><div class='del'>-		/* verify ldn, and may handle rare reset immediate command */</div><div class='del'>-		if ((reset_status(shpnt) == IM_RESET_IN_PROGRESS) &amp;&amp; (last_scsi_command(shpnt)[ldn] == IM_RESET_IMM_CMD)) {</div><div class='del'>-			if (cmd_result == IM_CMD_COMPLETED_WITH_FAILURE) {</div><div class='del'>-				disk_rw_in_progress = 0;</div><div class='del'>-				PS2_DISK_LED_OFF();</div><div class='del'>-				reset_status(shpnt) = IM_RESET_FINISHED_FAIL;</div><div class='del'>-			} else {</div><div class='del'>-				/*reset disk led counter, turn off disk led */</div><div class='del'>-				disk_rw_in_progress = 0;</div><div class='del'>-				PS2_DISK_LED_OFF();</div><div class='del'>-				reset_status(shpnt) = IM_RESET_FINISHED_OK;</div><div class='del'>-			}</div><div class='del'>-			stat_result(shpnt) = cmd_result;</div><div class='del'>-			last_scsi_command(shpnt)[ldn] = NO_SCSI;</div><div class='del'>-			last_scsi_type(shpnt)[ldn] = 0;</div><div class='del'>-			spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-			return IRQ_HANDLED;</div><div class='del'>-		} else if (last_scsi_command(shpnt)[ldn] == IM_ABORT_IMM_CMD) {</div><div class='del'>-			/* react on SCSI abort command */</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-			printk("IBM MCA SCSI: Interrupt from SCSI-abort.\n");</div><div class='del'>-#endif</div><div class='del'>-			disk_rw_in_progress = 0;</div><div class='del'>-			PS2_DISK_LED_OFF();</div><div class='del'>-			cmd = ld(shpnt)[ldn].cmd;</div><div class='del'>-			ld(shpnt)[ldn].cmd = NULL;</div><div class='del'>-			if (cmd_result == IM_CMD_COMPLETED_WITH_FAILURE)</div><div class='del'>-				cmd-&gt;result = DID_NO_CONNECT &lt;&lt; 16;</div><div class='del'>-			else</div><div class='del'>-				cmd-&gt;result = DID_ABORT &lt;&lt; 16;</div><div class='del'>-			stat_result(shpnt) = cmd_result;</div><div class='del'>-			last_scsi_command(shpnt)[ldn] = NO_SCSI;</div><div class='del'>-			last_scsi_type(shpnt)[ldn] = 0;</div><div class='del'>-			if (cmd-&gt;scsi_done)</div><div class='del'>-				(cmd-&gt;scsi_done) (cmd);	/* should be the internal_done */</div><div class='del'>-			spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-			return IRQ_HANDLED;</div><div class='del'>-		} else {</div><div class='del'>-			disk_rw_in_progress = 0;</div><div class='del'>-			PS2_DISK_LED_OFF();</div><div class='del'>-			reset_status(shpnt) = IM_RESET_FINISHED_OK;</div><div class='del'>-			stat_result(shpnt) = cmd_result;</div><div class='del'>-			last_scsi_command(shpnt)[ldn] = NO_SCSI;</div><div class='del'>-			spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-			return IRQ_HANDLED;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	last_scsi_command(shpnt)[ldn] = NO_SCSI;</div><div class='del'>-	last_scsi_type(shpnt)[ldn] = 0;</div><div class='del'>-	cmd = ld(shpnt)[ldn].cmd;</div><div class='del'>-	ld(shpnt)[ldn].cmd = NULL;</div><div class='del'>-#ifdef IM_DEBUG_TIMEOUT</div><div class='del'>-	if (cmd) {</div><div class='del'>-		if ((cmd-&gt;target == TIMEOUT_PUN) &amp;&amp; (cmd-&gt;device-&gt;lun == TIMEOUT_LUN)) {</div><div class='del'>-			spin_unlock_irqsave(shpnt-&gt;host_lock, flags);</div><div class='del'>-			printk("IBM MCA SCSI: Ignoring interrupt from pun=%x, lun=%x.\n", cmd-&gt;target, cmd-&gt;device-&gt;lun);</div><div class='del'>-			return IRQ_HANDLED;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	/*if no command structure, just return, else clear cmd */</div><div class='del'>-	if (!cmd)</div><div class='del'>-	{</div><div class='del'>-		spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-		return IRQ_HANDLED;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#ifdef IM_DEBUG_INT</div><div class='del'>-	printk("cmd=%02x ireg=%02x ds=%02x cs=%02x de=%02x ce=%02x\n", cmd-&gt;cmnd[0], intr_reg, ld(shpnt)[ldn].tsb.dev_status, ld(shpnt)[ldn].tsb.cmd_status, ld(shpnt)[ldn].tsb.dev_error, ld(shpnt)[ldn].tsb.cmd_error);</div><div class='del'>-#endif</div><div class='del'>-	/*if this is end of media read/write, may turn off PS/2 disk led */</div><div class='del'>-	if ((ld(shpnt)[ldn].device_type != TYPE_NO_LUN) &amp;&amp; (ld(shpnt)[ldn].device_type != TYPE_NO_DEVICE)) {</div><div class='del'>-		/* only access this, if there was a valid device addressed */</div><div class='del'>-		if (--disk_rw_in_progress == 0)</div><div class='del'>-			PS2_DISK_LED_OFF();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* IBM describes the status-mask to be 0x1e, but this is not conform</div><div class='del'>-	 * with SCSI-definition, I suppose, the reason for it is that IBM</div><div class='del'>-	 * adapters do not support CMD_TERMINATED, TASK_SET_FULL and</div><div class='del'>-	 * ACA_ACTIVE as returning statusbyte information. (ML) */</div><div class='del'>-	if (cmd_result == IM_CMD_COMPLETED_WITH_FAILURE) {</div><div class='del'>-		cmd-&gt;result = (unsigned char) (ld(shpnt)[ldn].tsb.dev_status &amp; 0x1e);</div><div class='del'>-		IBM_DS(shpnt).total_errors++;</div><div class='del'>-	} else</div><div class='del'>-		cmd-&gt;result = 0;</div><div class='del'>-	/* write device status into cmd-&gt;result, and call done function */</div><div class='del'>-	if (lastSCSI == NO_SCSI) {	/* unexpected interrupt :-( */</div><div class='del'>-		cmd-&gt;result |= DID_BAD_INTR &lt;&lt; 16;</div><div class='del'>-		printk("IBM MCA SCSI: WARNING - Interrupt from non-pending SCSI-command!\n");</div><div class='del'>-	} else			/* things went right :-) */</div><div class='del'>-		cmd-&gt;result |= DID_OK &lt;&lt; 16;</div><div class='del'>-	if (cmd-&gt;scsi_done)</div><div class='del'>-		(cmd-&gt;scsi_done) (cmd);</div><div class='del'>-	spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void issue_cmd(struct Scsi_Host *shpnt, unsigned long cmd_reg,</div><div class='del'>-		      unsigned char attn_reg)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	/* must wait for attention reg not busy */</div><div class='del'>-	while (1) {</div><div class='del'>-		spin_lock_irqsave(shpnt-&gt;host_lock, flags);</div><div class='del'>-		if (!(inb(IM_STAT_REG(shpnt)) &amp; IM_BUSY))</div><div class='del'>-			break;</div><div class='del'>-		spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-	}</div><div class='del'>-	/* write registers and enable system interrupts */</div><div class='del'>-	outl(cmd_reg, IM_CMD_REG(shpnt));</div><div class='del'>-	outb(attn_reg, IM_ATTN_REG(shpnt));</div><div class='del'>-	spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void internal_done(Scsi_Cmnd * cmd)</div><div class='del'>-{</div><div class='del'>-	cmd-&gt;SCp.Status++;</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* SCSI-SCB-command for device_inquiry */</div><div class='del'>-static int device_inquiry(struct Scsi_Host *shpnt, int ldn)</div><div class='del'>-{</div><div class='del'>-	int retr;</div><div class='del'>-	struct im_scb *scb;</div><div class='del'>-	struct im_tsb *tsb;</div><div class='del'>-	unsigned char *buf;</div><div class='del'>-</div><div class='del'>-	scb = &amp;(ld(shpnt)[ldn].scb);</div><div class='del'>-	tsb = &amp;(ld(shpnt)[ldn].tsb);</div><div class='del'>-	buf = (unsigned char *) (&amp;(ld(shpnt)[ldn].buf));</div><div class='del'>-	ld(shpnt)[ldn].tsb.dev_status = 0;	/* prepare statusblock */</div><div class='del'>-	for (retr = 0; retr &lt; 3; retr++) {</div><div class='del'>-		/* fill scb with inquiry command */</div><div class='del'>-		scb-&gt;command = IM_DEVICE_INQUIRY_CMD | IM_NO_DISCONNECT;</div><div class='del'>-		scb-&gt;enable = IM_REPORT_TSB_ONLY_ON_ERROR | IM_READ_CONTROL | IM_SUPRESS_EXCEPTION_SHORT | IM_RETRY_ENABLE | IM_BYPASS_BUFFER;</div><div class='del'>-		last_scsi_command(shpnt)[ldn] = IM_DEVICE_INQUIRY_CMD;</div><div class='del'>-		last_scsi_type(shpnt)[ldn] = IM_SCB;</div><div class='del'>-		scb-&gt;sys_buf_adr = isa_virt_to_bus(buf);</div><div class='del'>-		scb-&gt;sys_buf_length = 255;	/* maximum bufferlength gives max info */</div><div class='del'>-		scb-&gt;tsb_adr = isa_virt_to_bus(tsb);</div><div class='del'>-		/* issue scb to passed ldn, and busy wait for interrupt */</div><div class='del'>-		got_interrupt(shpnt) = 0;</div><div class='del'>-		issue_cmd(shpnt, isa_virt_to_bus(scb), IM_SCB | ldn);</div><div class='del'>-		while (!got_interrupt(shpnt))</div><div class='del'>-			barrier();</div><div class='del'>-</div><div class='del'>-		/*if command successful, break */</div><div class='del'>-		if ((stat_result(shpnt) == IM_SCB_CMD_COMPLETED) || (stat_result(shpnt) == IM_SCB_CMD_COMPLETED_WITH_RETRIES))</div><div class='del'>-			return 1;</div><div class='del'>-	}</div><div class='del'>-	/*if all three retries failed, return "no device at this ldn" */</div><div class='del'>-	if (retr &gt;= 3)</div><div class='del'>-		return 0;</div><div class='del'>-	else</div><div class='del'>-		return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int read_capacity(struct Scsi_Host *shpnt, int ldn)</div><div class='del'>-{</div><div class='del'>-	int retr;</div><div class='del'>-	struct im_scb *scb;</div><div class='del'>-	struct im_tsb *tsb;</div><div class='del'>-	unsigned char *buf;</div><div class='del'>-</div><div class='del'>-	scb = &amp;(ld(shpnt)[ldn].scb);</div><div class='del'>-	tsb = &amp;(ld(shpnt)[ldn].tsb);</div><div class='del'>-	buf = (unsigned char *) (&amp;(ld(shpnt)[ldn].buf));</div><div class='del'>-	ld(shpnt)[ldn].tsb.dev_status = 0;</div><div class='del'>-	for (retr = 0; retr &lt; 3; retr++) {</div><div class='del'>-		/*fill scb with read capacity command */</div><div class='del'>-		scb-&gt;command = IM_READ_CAPACITY_CMD;</div><div class='del'>-		scb-&gt;enable = IM_REPORT_TSB_ONLY_ON_ERROR | IM_READ_CONTROL | IM_RETRY_ENABLE | IM_BYPASS_BUFFER;</div><div class='del'>-		last_scsi_command(shpnt)[ldn] = IM_READ_CAPACITY_CMD;</div><div class='del'>-		last_scsi_type(shpnt)[ldn] = IM_SCB;</div><div class='del'>-		scb-&gt;sys_buf_adr = isa_virt_to_bus(buf);</div><div class='del'>-		scb-&gt;sys_buf_length = 8;</div><div class='del'>-		scb-&gt;tsb_adr = isa_virt_to_bus(tsb);</div><div class='del'>-		/*issue scb to passed ldn, and busy wait for interrupt */</div><div class='del'>-		got_interrupt(shpnt) = 0;</div><div class='del'>-		issue_cmd(shpnt, isa_virt_to_bus(scb), IM_SCB | ldn);</div><div class='del'>-		while (!got_interrupt(shpnt))</div><div class='del'>-			barrier();</div><div class='del'>-</div><div class='del'>-		/*if got capacity, get block length and return one device found */</div><div class='del'>-		if ((stat_result(shpnt) == IM_SCB_CMD_COMPLETED) || (stat_result(shpnt) == IM_SCB_CMD_COMPLETED_WITH_RETRIES))</div><div class='del'>-			return 1;</div><div class='del'>-	}</div><div class='del'>-	/*if all three retries failed, return "no device at this ldn" */</div><div class='del'>-	if (retr &gt;= 3)</div><div class='del'>-		return 0;</div><div class='del'>-	else</div><div class='del'>-		return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int get_pos_info(struct Scsi_Host *shpnt)</div><div class='del'>-{</div><div class='del'>-	int retr;</div><div class='del'>-	struct im_scb *scb;</div><div class='del'>-	struct im_tsb *tsb;</div><div class='del'>-	unsigned char *buf;</div><div class='del'>-</div><div class='del'>-	scb = &amp;(ld(shpnt)[MAX_LOG_DEV].scb);</div><div class='del'>-	tsb = &amp;(ld(shpnt)[MAX_LOG_DEV].tsb);</div><div class='del'>-	buf = (unsigned char *) (&amp;(ld(shpnt)[MAX_LOG_DEV].buf));</div><div class='del'>-	ld(shpnt)[MAX_LOG_DEV].tsb.dev_status = 0;</div><div class='del'>-	for (retr = 0; retr &lt; 3; retr++) {</div><div class='del'>-		/*fill scb with get_pos_info command */</div><div class='del'>-		scb-&gt;command = IM_GET_POS_INFO_CMD;</div><div class='del'>-		scb-&gt;enable = IM_READ_CONTROL | IM_REPORT_TSB_ONLY_ON_ERROR | IM_RETRY_ENABLE | IM_BYPASS_BUFFER;</div><div class='del'>-		last_scsi_command(shpnt)[MAX_LOG_DEV] = IM_GET_POS_INFO_CMD;</div><div class='del'>-		last_scsi_type(shpnt)[MAX_LOG_DEV] = IM_SCB;</div><div class='del'>-		scb-&gt;sys_buf_adr = isa_virt_to_bus(buf);</div><div class='del'>-		if (special(shpnt) == IBM_SCSI2_FW)</div><div class='del'>-			scb-&gt;sys_buf_length = 256;	/* get all info from F/W adapter */</div><div class='del'>-		else</div><div class='del'>-			scb-&gt;sys_buf_length = 18;	/* get exactly 18 bytes for other SCSI */</div><div class='del'>-		scb-&gt;tsb_adr = isa_virt_to_bus(tsb);</div><div class='del'>-		/*issue scb to ldn=15, and busy wait for interrupt */</div><div class='del'>-		got_interrupt(shpnt) = 0;</div><div class='del'>-		issue_cmd(shpnt, isa_virt_to_bus(scb), IM_SCB | MAX_LOG_DEV);</div><div class='del'>-		</div><div class='del'>-		/* FIXME: timeout */</div><div class='del'>-		while (!got_interrupt(shpnt))</div><div class='del'>-			barrier();</div><div class='del'>-</div><div class='del'>-		/*if got POS-stuff, get block length and return one device found */</div><div class='del'>-		if ((stat_result(shpnt) == IM_SCB_CMD_COMPLETED) || (stat_result(shpnt) == IM_SCB_CMD_COMPLETED_WITH_RETRIES))</div><div class='del'>-			return 1;</div><div class='del'>-	}</div><div class='del'>-	/* if all three retries failed, return "no device at this ldn" */</div><div class='del'>-	if (retr &gt;= 3)</div><div class='del'>-		return 0;</div><div class='del'>-	else</div><div class='del'>-		return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* SCSI-immediate-command for assign. This functions maps/unmaps specific</div><div class='del'>- ldn-numbers on SCSI (PUN,LUN). It is needed for presetting of the</div><div class='del'>- subsystem and for dynamical remapping od ldns. */</div><div class='del'>-static int immediate_assign(struct Scsi_Host *shpnt, unsigned int pun,</div><div class='del'>-			    unsigned int lun, unsigned int ldn,</div><div class='del'>-			    unsigned int operation)</div><div class='del'>-{</div><div class='del'>-	int retr;</div><div class='del'>-	unsigned long imm_cmd;</div><div class='del'>-</div><div class='del'>-	for (retr = 0; retr &lt; 3; retr++) {</div><div class='del'>-		/* select mutation level of the SCSI-adapter */</div><div class='del'>-		switch (special(shpnt)) {</div><div class='del'>-		case IBM_SCSI2_FW:</div><div class='del'>-			imm_cmd = (unsigned long) (IM_ASSIGN_IMM_CMD);</div><div class='del'>-			imm_cmd |= (unsigned long) ((lun &amp; 7) &lt;&lt; 24);</div><div class='del'>-			imm_cmd |= (unsigned long) ((operation &amp; 1) &lt;&lt; 23);</div><div class='del'>-			imm_cmd |= (unsigned long) ((pun &amp; 7) &lt;&lt; 20) | ((pun &amp; 8) &lt;&lt; 24);</div><div class='del'>-			imm_cmd |= (unsigned long) ((ldn &amp; 15) &lt;&lt; 16);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			imm_cmd = inl(IM_CMD_REG(shpnt));</div><div class='del'>-			imm_cmd &amp;= (unsigned long) (0xF8000000);	/* keep reserved bits */</div><div class='del'>-			imm_cmd |= (unsigned long) (IM_ASSIGN_IMM_CMD);</div><div class='del'>-			imm_cmd |= (unsigned long) ((lun &amp; 7) &lt;&lt; 24);</div><div class='del'>-			imm_cmd |= (unsigned long) ((operation &amp; 1) &lt;&lt; 23);</div><div class='del'>-			imm_cmd |= (unsigned long) ((pun &amp; 7) &lt;&lt; 20);</div><div class='del'>-			imm_cmd |= (unsigned long) ((ldn &amp; 15) &lt;&lt; 16);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		last_scsi_command(shpnt)[MAX_LOG_DEV] = IM_ASSIGN_IMM_CMD;</div><div class='del'>-		last_scsi_type(shpnt)[MAX_LOG_DEV] = IM_IMM_CMD;</div><div class='del'>-		got_interrupt(shpnt) = 0;</div><div class='del'>-		issue_cmd(shpnt, (unsigned long) (imm_cmd), IM_IMM_CMD | MAX_LOG_DEV);</div><div class='del'>-		while (!got_interrupt(shpnt))</div><div class='del'>-			barrier();</div><div class='del'>-</div><div class='del'>-		/*if command successful, break */</div><div class='del'>-		if (stat_result(shpnt) == IM_IMMEDIATE_CMD_COMPLETED)</div><div class='del'>-			return 1;</div><div class='del'>-	}</div><div class='del'>-	if (retr &gt;= 3)</div><div class='del'>-		return 0;</div><div class='del'>-	else</div><div class='del'>-		return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int immediate_feature(struct Scsi_Host *shpnt, unsigned int speed, unsigned int timeout)</div><div class='del'>-{</div><div class='del'>-	int retr;</div><div class='del'>-	unsigned long imm_cmd;</div><div class='del'>-</div><div class='del'>-	for (retr = 0; retr &lt; 3; retr++) {</div><div class='del'>-		/* select mutation level of the SCSI-adapter */</div><div class='del'>-		imm_cmd = IM_FEATURE_CTR_IMM_CMD;</div><div class='del'>-		imm_cmd |= (unsigned long) ((speed &amp; 0x7) &lt;&lt; 29);</div><div class='del'>-		imm_cmd |= (unsigned long) ((timeout &amp; 0x1fff) &lt;&lt; 16);</div><div class='del'>-		last_scsi_command(shpnt)[MAX_LOG_DEV] = IM_FEATURE_CTR_IMM_CMD;</div><div class='del'>-		last_scsi_type(shpnt)[MAX_LOG_DEV] = IM_IMM_CMD;</div><div class='del'>-		got_interrupt(shpnt) = 0;</div><div class='del'>-		/* we need to run into command errors in order to probe for the</div><div class='del'>-		 * right speed! */</div><div class='del'>-		global_command_error_excuse = 1;</div><div class='del'>-		issue_cmd(shpnt, (unsigned long) (imm_cmd), IM_IMM_CMD | MAX_LOG_DEV);</div><div class='del'>-		</div><div class='del'>-		/* FIXME: timeout */</div><div class='del'>-		while (!got_interrupt(shpnt))</div><div class='del'>-			barrier();</div><div class='del'>-		if (global_command_error_excuse == CMD_FAIL) {</div><div class='del'>-			global_command_error_excuse = 0;</div><div class='del'>-			return 2;</div><div class='del'>-		} else</div><div class='del'>-			global_command_error_excuse = 0;</div><div class='del'>-		/*if command successful, break */</div><div class='del'>-		if (stat_result(shpnt) == IM_IMMEDIATE_CMD_COMPLETED)</div><div class='del'>-			return 1;</div><div class='del'>-	}</div><div class='del'>-	if (retr &gt;= 3)</div><div class='del'>-		return 0;</div><div class='del'>-	else</div><div class='del'>-		return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_IBMMCA_SCSI_DEV_RESET</div><div class='del'>-static int immediate_reset(struct Scsi_Host *shpnt, unsigned int ldn)</div><div class='del'>-{</div><div class='del'>-	int retries;</div><div class='del'>-	int ticks;</div><div class='del'>-	unsigned long imm_command;</div><div class='del'>-</div><div class='del'>-	for (retries = 0; retries &lt; 3; retries++) {</div><div class='del'>-		imm_command = inl(IM_CMD_REG(shpnt));</div><div class='del'>-		imm_command &amp;= (unsigned long) (0xFFFF0000);	/* keep reserved bits */</div><div class='del'>-		imm_command |= (unsigned long) (IM_RESET_IMM_CMD);</div><div class='del'>-		last_scsi_command(shpnt)[ldn] = IM_RESET_IMM_CMD;</div><div class='del'>-		last_scsi_type(shpnt)[ldn] = IM_IMM_CMD;</div><div class='del'>-		got_interrupt(shpnt) = 0;</div><div class='del'>-		reset_status(shpnt) = IM_RESET_IN_PROGRESS;</div><div class='del'>-		issue_cmd(shpnt, (unsigned long) (imm_command), IM_IMM_CMD | ldn);</div><div class='del'>-		ticks = IM_RESET_DELAY * HZ;</div><div class='del'>-		while (reset_status(shpnt) == IM_RESET_IN_PROGRESS &amp;&amp; --ticks) {</div><div class='del'>-			udelay((1 + 999 / HZ) * 1000);</div><div class='del'>-			barrier();</div><div class='del'>-		}</div><div class='del'>-		/* if reset did not complete, just complain */</div><div class='del'>-		if (!ticks) {</div><div class='del'>-			printk(KERN_ERR "IBM MCA SCSI: reset did not complete within %d seconds.\n", IM_RESET_DELAY);</div><div class='del'>-			reset_status(shpnt) = IM_RESET_FINISHED_OK;</div><div class='del'>-			/* did not work, finish */</div><div class='del'>-			return 1;</div><div class='del'>-		}</div><div class='del'>-		/*if command successful, break */</div><div class='del'>-		if (stat_result(shpnt) == IM_IMMEDIATE_CMD_COMPLETED)</div><div class='del'>-			return 1;</div><div class='del'>-	}</div><div class='del'>-	if (retries &gt;= 3)</div><div class='del'>-		return 0;</div><div class='del'>-	else</div><div class='del'>-		return 1;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* type-interpreter for physical device numbers */</div><div class='del'>-static char *ti_p(int dev)</div><div class='del'>-{</div><div class='del'>-	switch (dev) {</div><div class='del'>-	case TYPE_IBM_SCSI_ADAPTER:</div><div class='del'>-		return ("A");</div><div class='del'>-	case TYPE_DISK:</div><div class='del'>-		return ("D");</div><div class='del'>-	case TYPE_TAPE:</div><div class='del'>-		return ("T");</div><div class='del'>-	case TYPE_PROCESSOR:</div><div class='del'>-		return ("P");</div><div class='del'>-	case TYPE_WORM:</div><div class='del'>-		return ("W");</div><div class='del'>-	case TYPE_ROM:</div><div class='del'>-		return ("R");</div><div class='del'>-	case TYPE_SCANNER:</div><div class='del'>-		return ("S");</div><div class='del'>-	case TYPE_MOD:</div><div class='del'>-		return ("M");</div><div class='del'>-	case TYPE_MEDIUM_CHANGER:</div><div class='del'>-		return ("C");</div><div class='del'>-	case TYPE_NO_LUN:</div><div class='del'>-		return ("+");	/* show NO_LUN */</div><div class='del'>-	}</div><div class='del'>-	return ("-");		/* TYPE_NO_DEVICE and others */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* interpreter for logical device numbers (ldn) */</div><div class='del'>-static char *ti_l(int val)</div><div class='del'>-{</div><div class='del'>-	const char hex[16] = "0123456789abcdef";</div><div class='del'>-	static char answer[2];</div><div class='del'>-</div><div class='del'>-	answer[1] = (char) (0x0);</div><div class='del'>-	if (val &lt;= MAX_LOG_DEV)</div><div class='del'>-		answer[0] = hex[val];</div><div class='del'>-	else</div><div class='del'>-		answer[0] = '-';</div><div class='del'>-	return (char *) &amp;answer;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* transfers bitpattern of the feature command to values in MHz */</div><div class='del'>-static char *ibmrate(unsigned int speed, int i)</div><div class='del'>-{</div><div class='del'>-	switch (speed) {</div><div class='del'>-	case 0:</div><div class='del'>-		return i ? "5.00" : "10.00";</div><div class='del'>-	case 1:</div><div class='del'>-		return i ? "4.00" : "8.00";</div><div class='del'>-	case 2:</div><div class='del'>-		return i ? "3.33" : "6.66";</div><div class='del'>-	case 3:</div><div class='del'>-		return i ? "2.86" : "5.00";</div><div class='del'>-	case 4:</div><div class='del'>-		return i ? "2.50" : "4.00";</div><div class='del'>-	case 5:</div><div class='del'>-		return i ? "2.22" : "3.10";</div><div class='del'>-	case 6:</div><div class='del'>-		return i ? "2.00" : "2.50";</div><div class='del'>-	case 7:</div><div class='del'>-		return i ? "1.82" : "2.00";</div><div class='del'>-	}</div><div class='del'>-	return "---";</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int probe_display(int what)</div><div class='del'>-{</div><div class='del'>-	static int rotator = 0;</div><div class='del'>-	const char rotor[] = "|/-\\";</div><div class='del'>-</div><div class='del'>-	if (!(display_mode &amp; LED_DISP))</div><div class='del'>-		return 0;</div><div class='del'>-	if (!what) {</div><div class='del'>-		outl(0x20202020, MOD95_LED_PORT);</div><div class='del'>-		outl(0x20202020, MOD95_LED_PORT + 4);</div><div class='del'>-	} else {</div><div class='del'>-		outb('S', MOD95_LED_PORT + 7);</div><div class='del'>-		outb('C', MOD95_LED_PORT + 6);</div><div class='del'>-		outb('S', MOD95_LED_PORT + 5);</div><div class='del'>-		outb('I', MOD95_LED_PORT + 4);</div><div class='del'>-		outb('i', MOD95_LED_PORT + 3);</div><div class='del'>-		outb('n', MOD95_LED_PORT + 2);</div><div class='del'>-		outb('i', MOD95_LED_PORT + 1);</div><div class='del'>-		outb((char) (rotor[rotator]), MOD95_LED_PORT);</div><div class='del'>-		rotator++;</div><div class='del'>-		if (rotator &gt; 3)</div><div class='del'>-			rotator = 0;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int probe_bus_mode(struct Scsi_Host *shpnt)</div><div class='del'>-{</div><div class='del'>-	struct im_pos_info *info;</div><div class='del'>-	int num_bus = 0;</div><div class='del'>-	int ldn;</div><div class='del'>-</div><div class='del'>-	info = (struct im_pos_info *) (&amp;(ld(shpnt)[MAX_LOG_DEV].buf));</div><div class='del'>-	if (get_pos_info(shpnt)) {</div><div class='del'>-		if (info-&gt;connector_size &amp; 0xf000)</div><div class='del'>-			subsystem_connector_size(shpnt) = 16;</div><div class='del'>-		else</div><div class='del'>-			subsystem_connector_size(shpnt) = 32;</div><div class='del'>-		num_bus |= (info-&gt;pos_4b &amp; 8) &gt;&gt; 3;</div><div class='del'>-		for (ldn = 0; ldn &lt;= MAX_LOG_DEV; ldn++) {</div><div class='del'>-			if ((special(shpnt) == IBM_SCSI_WCACHE) || (special(shpnt) == IBM_7568_WCACHE)) {</div><div class='del'>-				if (!((info-&gt;cache_stat &gt;&gt; ldn) &amp; 1))</div><div class='del'>-					ld(shpnt)[ldn].cache_flag = 0;</div><div class='del'>-			}</div><div class='del'>-			if (!((info-&gt;retry_stat &gt;&gt; ldn) &amp; 1))</div><div class='del'>-				ld(shpnt)[ldn].retry_flag = 0;</div><div class='del'>-		}</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-		printk("IBM MCA SCSI: SCSI-Cache bits: ");</div><div class='del'>-		for (ldn = 0; ldn &lt;= MAX_LOG_DEV; ldn++) {</div><div class='del'>-			printk("%d", ld(shpnt)[ldn].cache_flag);</div><div class='del'>-		}</div><div class='del'>-		printk("\nIBM MCA SCSI: SCSI-Retry bits: ");</div><div class='del'>-		for (ldn = 0; ldn &lt;= MAX_LOG_DEV; ldn++) {</div><div class='del'>-			printk("%d", ld(shpnt)[ldn].retry_flag);</div><div class='del'>-		}</div><div class='del'>-		printk("\n");</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='del'>-	return num_bus;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* probing scsi devices */</div><div class='del'>-static void check_devices(struct Scsi_Host *shpnt, int adaptertype)</div><div class='del'>-{</div><div class='del'>-	int id, lun, ldn, ticks;</div><div class='del'>-	int count_devices;	/* local counter for connected device */</div><div class='del'>-	int max_pun;</div><div class='del'>-	int num_bus;</div><div class='del'>-	int speedrun;		/* local adapter_speed check variable */</div><div class='del'>-</div><div class='del'>-	/* assign default values to certain variables */</div><div class='del'>-	ticks = 0;</div><div class='del'>-	count_devices = 0;</div><div class='del'>-	IBM_DS(shpnt).dyn_flag = 0;	/* normally no need for dynamical ldn management */</div><div class='del'>-	IBM_DS(shpnt).total_errors = 0;	/* set errorcounter to 0 */</div><div class='del'>-	next_ldn(shpnt) = 7;	/* next ldn to be assigned is 7, because 0-6 is 'hardwired' */</div><div class='del'>-</div><div class='del'>-	/* initialize the very important driver-informational arrays/structs */</div><div class='del'>-	memset(ld(shpnt), 0, sizeof(ld(shpnt)));</div><div class='del'>-	for (ldn = 0; ldn &lt;= MAX_LOG_DEV; ldn++) {</div><div class='del'>-		last_scsi_command(shpnt)[ldn] = NO_SCSI;	/* emptify last SCSI-command storage */</div><div class='del'>-		last_scsi_type(shpnt)[ldn] = 0;</div><div class='del'>-		ld(shpnt)[ldn].cache_flag = 1;</div><div class='del'>-		ld(shpnt)[ldn].retry_flag = 1;</div><div class='del'>-	}</div><div class='del'>-	memset(get_ldn(shpnt), TYPE_NO_DEVICE, sizeof(get_ldn(shpnt)));	/* this is essential ! */</div><div class='del'>-	memset(get_scsi(shpnt), TYPE_NO_DEVICE, sizeof(get_scsi(shpnt)));	/* this is essential ! */</div><div class='del'>-	for (lun = 0; lun &lt; 8; lun++) {</div><div class='del'>-		/* mark the adapter at its pun on all luns */</div><div class='del'>-		get_scsi(shpnt)[subsystem_pun(shpnt)][lun] = TYPE_IBM_SCSI_ADAPTER;</div><div class='del'>-		get_ldn(shpnt)[subsystem_pun(shpnt)][lun] = MAX_LOG_DEV;	/* make sure, the subsystem</div><div class='del'>-											   ldn is active for all</div><div class='del'>-											   luns. */</div><div class='del'>-	}</div><div class='del'>-	probe_display(0);	/* Supercool display usage during SCSI-probing. */</div><div class='del'>-	/* This makes sense, when booting without any */</div><div class='del'>-	/* monitor connected on model XX95. */</div><div class='del'>-</div><div class='del'>-	/* STEP 1: */</div><div class='del'>-	adapter_speed(shpnt) = global_adapter_speed;</div><div class='del'>-	speedrun = adapter_speed(shpnt);</div><div class='del'>-	while (immediate_feature(shpnt, speedrun, adapter_timeout) == 2) {</div><div class='del'>-		probe_display(1);</div><div class='del'>-		if (speedrun == 7)</div><div class='del'>-			panic("IBM MCA SCSI: Cannot set Synchronous-Transfer-Rate!\n");</div><div class='del'>-		speedrun++;</div><div class='del'>-		if (speedrun &gt; 7)</div><div class='del'>-			speedrun = 7;</div><div class='del'>-	}</div><div class='del'>-	adapter_speed(shpnt) = speedrun;</div><div class='del'>-	/* Get detailed information about the current adapter, necessary for</div><div class='del'>-	 * device operations: */</div><div class='del'>-	num_bus = probe_bus_mode(shpnt);</div><div class='del'>-</div><div class='del'>-	/* num_bus contains only valid data for the F/W adapter! */</div><div class='del'>-	if (adaptertype == IBM_SCSI2_FW) {	/* F/W SCSI adapter: */</div><div class='del'>-		/* F/W adapter PUN-space extension evaluation: */</div><div class='del'>-		if (num_bus) {</div><div class='del'>-			printk(KERN_INFO "IBM MCA SCSI: Separate bus mode (wide-addressing enabled)\n");</div><div class='del'>-			subsystem_maxid(shpnt) = 16;</div><div class='del'>-		} else {</div><div class='del'>-			printk(KERN_INFO "IBM MCA SCSI: Combined bus mode (wide-addressing disabled)\n");</div><div class='del'>-			subsystem_maxid(shpnt) = 8;</div><div class='del'>-		}</div><div class='del'>-		printk(KERN_INFO "IBM MCA SCSI: Sync.-Rate (F/W: 20, Int.: 10, Ext.: %s) MBytes/s\n", ibmrate(speedrun, adaptertype));</div><div class='del'>-	} else			/* all other IBM SCSI adapters: */</div><div class='del'>-		printk(KERN_INFO "IBM MCA SCSI: Synchronous-SCSI-Transfer-Rate: %s MBytes/s\n", ibmrate(speedrun, adaptertype));</div><div class='del'>-</div><div class='del'>-	/* assign correct PUN device space */</div><div class='del'>-	max_pun = subsystem_maxid(shpnt);</div><div class='del'>-</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-	printk("IBM MCA SCSI: Current SCSI-host index: %d\n", shpnt);</div><div class='del'>-	printk("IBM MCA SCSI: Removing default logical SCSI-device mapping.");</div><div class='del'>-#else</div><div class='del'>-	printk(KERN_INFO "IBM MCA SCSI: Dev. Order: %s, Mapping (takes &lt;2min): ", (ibm_ansi_order) ? "ANSI" : "New");</div><div class='del'>-#endif</div><div class='del'>-	for (ldn = 0; ldn &lt; MAX_LOG_DEV; ldn++) {</div><div class='del'>-		probe_display(1);</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-		printk(".");</div><div class='del'>-#endif</div><div class='del'>-		immediate_assign(shpnt, 0, 0, ldn, REMOVE_LDN);	/* remove ldn (wherever) */</div><div class='del'>-	}</div><div class='del'>-	lun = 0;		/* default lun is 0 */</div><div class='del'>-#ifndef IM_DEBUG_PROBE</div><div class='del'>-	printk("cleared,");</div><div class='del'>-#endif</div><div class='del'>-	/* STEP 2: */</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-	printk("\nIBM MCA SCSI: Scanning SCSI-devices.");</div><div class='del'>-#endif</div><div class='del'>-	for (id = 0; id &lt; max_pun; id++)</div><div class='del'>-#ifdef CONFIG_SCSI_MULTI_LUN</div><div class='del'>-		for (lun = 0; lun &lt; 8; lun++)</div><div class='del'>-#endif</div><div class='del'>-		{</div><div class='del'>-			probe_display(1);</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-			printk(".");</div><div class='del'>-#endif</div><div class='del'>-			if (id != subsystem_pun(shpnt)) {</div><div class='del'>-				/* if pun is not the adapter: */</div><div class='del'>-				/* set ldn=0 to pun,lun */</div><div class='del'>-				immediate_assign(shpnt, id, lun, PROBE_LDN, SET_LDN);</div><div class='del'>-				if (device_inquiry(shpnt, PROBE_LDN)) {	/* probe device */</div><div class='del'>-					get_scsi(shpnt)[id][lun] = (unsigned char) (ld(shpnt)[PROBE_LDN].buf[0]);</div><div class='del'>-					/* entry, even for NO_LUN */</div><div class='del'>-					if (ld(shpnt)[PROBE_LDN].buf[0] != TYPE_NO_LUN)</div><div class='del'>-						count_devices++;	/* a existing device is found */</div><div class='del'>-				}</div><div class='del'>-				/* remove ldn */</div><div class='del'>-				immediate_assign(shpnt, id, lun, PROBE_LDN, REMOVE_LDN);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-#ifndef IM_DEBUG_PROBE</div><div class='del'>-	printk("scanned,");</div><div class='del'>-#endif</div><div class='del'>-	/* STEP 3: */</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-	printk("\nIBM MCA SCSI: Mapping SCSI-devices.");</div><div class='del'>-#endif</div><div class='del'>-	ldn = 0;</div><div class='del'>-	lun = 0;</div><div class='del'>-#ifdef CONFIG_SCSI_MULTI_LUN</div><div class='del'>-	for (lun = 0; lun &lt; 8 &amp;&amp; ldn &lt; MAX_LOG_DEV; lun++)</div><div class='del'>-#endif</div><div class='del'>-		for (id = 0; id &lt; max_pun &amp;&amp; ldn &lt; MAX_LOG_DEV; id++) {</div><div class='del'>-			probe_display(1);</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-			printk(".");</div><div class='del'>-#endif</div><div class='del'>-			if (id != subsystem_pun(shpnt)) {</div><div class='del'>-				if (get_scsi(shpnt)[id][lun] != TYPE_NO_LUN &amp;&amp; get_scsi(shpnt)[id][lun] != TYPE_NO_DEVICE) {</div><div class='del'>-					/* Only map if accepted type. Always enter for</div><div class='del'>-					   lun == 0 to get no gaps into ldn-mapping for ldn&lt;7. */</div><div class='del'>-					immediate_assign(shpnt, id, lun, ldn, SET_LDN);</div><div class='del'>-					get_ldn(shpnt)[id][lun] = ldn;	/* map ldn */</div><div class='del'>-					if (device_exists(shpnt, ldn, &amp;ld(shpnt)[ldn].block_length, &amp;ld(shpnt)[ldn].device_type)) {</div><div class='del'>-#ifdef CONFIG_IBMMCA_SCSI_DEV_RESET</div><div class='del'>-						printk("resetting device at ldn=%x ... ", ldn);</div><div class='del'>-						immediate_reset(shpnt, ldn);</div><div class='del'>-#endif</div><div class='del'>-						ldn++;</div><div class='del'>-					} else {</div><div class='del'>-						/* device vanished, probably because we don't know how to</div><div class='del'>-						 * handle it or because it has problems */</div><div class='del'>-						if (lun &gt; 0) {</div><div class='del'>-							/* remove mapping */</div><div class='del'>-							get_ldn(shpnt)[id][lun] = TYPE_NO_DEVICE;</div><div class='del'>-							immediate_assign(shpnt, 0, 0, ldn, REMOVE_LDN);</div><div class='del'>-						} else</div><div class='del'>-							ldn++;</div><div class='del'>-					}</div><div class='del'>-				} else if (lun == 0) {</div><div class='del'>-					/* map lun == 0, even if no device exists */</div><div class='del'>-					immediate_assign(shpnt, id, lun, ldn, SET_LDN);</div><div class='del'>-					get_ldn(shpnt)[id][lun] = ldn;	/* map ldn */</div><div class='del'>-					ldn++;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	/* STEP 4: */</div><div class='del'>-</div><div class='del'>-	/* map remaining ldns to non-existing devices */</div><div class='del'>-	for (lun = 1; lun &lt; 8 &amp;&amp; ldn &lt; MAX_LOG_DEV; lun++)</div><div class='del'>-		for (id = 0; id &lt; max_pun &amp;&amp; ldn &lt; MAX_LOG_DEV; id++) {</div><div class='del'>-			if (get_scsi(shpnt)[id][lun] == TYPE_NO_LUN || get_scsi(shpnt)[id][lun] == TYPE_NO_DEVICE) {</div><div class='del'>-				probe_display(1);</div><div class='del'>-				/* Map remaining ldns only to NON-existing pun,lun</div><div class='del'>-				   combinations to make sure an inquiry will fail.</div><div class='del'>-				   For MULTI_LUN, it is needed to avoid adapter autonome</div><div class='del'>-				   SCSI-remapping. */</div><div class='del'>-				immediate_assign(shpnt, id, lun, ldn, SET_LDN);</div><div class='del'>-				get_ldn(shpnt)[id][lun] = ldn;</div><div class='del'>-				ldn++;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-#ifndef IM_DEBUG_PROBE</div><div class='del'>-	printk("mapped.");</div><div class='del'>-#endif</div><div class='del'>-	printk("\n");</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-	if (ibm_ansi_order)</div><div class='del'>-		printk("IBM MCA SCSI: Device order: IBM/ANSI (pun=7 is first).\n");</div><div class='del'>-	else</div><div class='del'>-		printk("IBM MCA SCSI: Device order: New Industry Standard (pun=0 is first).\n");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-	/* Show the physical and logical mapping during boot. */</div><div class='del'>-	printk("IBM MCA SCSI: Determined SCSI-device-mapping:\n");</div><div class='del'>-	printk("    Physical SCSI-Device Map               Logical SCSI-Device Map\n");</div><div class='del'>-	printk("ID\\LUN  0  1  2  3  4  5  6  7       ID\\LUN  0  1  2  3  4  5  6  7\n");</div><div class='del'>-	for (id = 0; id &lt; max_pun; id++) {</div><div class='del'>-		printk("%2d     ", id);</div><div class='del'>-		for (lun = 0; lun &lt; 8; lun++)</div><div class='del'>-			printk("%2s ", ti_p(get_scsi(shpnt)[id][lun]));</div><div class='del'>-		printk("      %2d     ", id);</div><div class='del'>-		for (lun = 0; lun &lt; 8; lun++)</div><div class='del'>-			printk("%2s ", ti_l(get_ldn(shpnt)[id][lun]));</div><div class='del'>-		printk("\n");</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* assign total number of found SCSI-devices to the statistics struct */</div><div class='del'>-	IBM_DS(shpnt).total_scsi_devices = count_devices;</div><div class='del'>-</div><div class='del'>-	/* decide for output in /proc-filesystem, if the configuration of</div><div class='del'>-	   SCSI-devices makes dynamical reassignment of devices necessary */</div><div class='del'>-	if (count_devices &gt;= MAX_LOG_DEV)</div><div class='del'>-		IBM_DS(shpnt).dyn_flag = 1;	/* dynamical assignment is necessary */</div><div class='del'>-	else</div><div class='del'>-		IBM_DS(shpnt).dyn_flag = 0;	/* dynamical assignment is not necessary */</div><div class='del'>-</div><div class='del'>-	/* If no SCSI-devices are assigned, return 1 in order to cause message. */</div><div class='del'>-	if (ldn == 0)</div><div class='del'>-		printk("IBM MCA SCSI: Warning: No SCSI-devices found/assigned!\n");</div><div class='del'>-</div><div class='del'>-	/* reset the counters for statistics on the current adapter */</div><div class='del'>-	IBM_DS(shpnt).scbs = 0;</div><div class='del'>-	IBM_DS(shpnt).long_scbs = 0;</div><div class='del'>-	IBM_DS(shpnt).total_accesses = 0;</div><div class='del'>-	IBM_DS(shpnt).total_interrupts = 0;</div><div class='del'>-	IBM_DS(shpnt).dynamical_assignments = 0;</div><div class='del'>-	memset(IBM_DS(shpnt).ldn_access, 0x0, sizeof(IBM_DS(shpnt).ldn_access));</div><div class='del'>-	memset(IBM_DS(shpnt).ldn_read_access, 0x0, sizeof(IBM_DS(shpnt).ldn_read_access));</div><div class='del'>-	memset(IBM_DS(shpnt).ldn_write_access, 0x0, sizeof(IBM_DS(shpnt).ldn_write_access));</div><div class='del'>-	memset(IBM_DS(shpnt).ldn_inquiry_access, 0x0, sizeof(IBM_DS(shpnt).ldn_inquiry_access));</div><div class='del'>-	memset(IBM_DS(shpnt).ldn_modeselect_access, 0x0, sizeof(IBM_DS(shpnt).ldn_modeselect_access));</div><div class='del'>-	memset(IBM_DS(shpnt).ldn_assignments, 0x0, sizeof(IBM_DS(shpnt).ldn_assignments));</div><div class='del'>-	probe_display(0);</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int device_exists(struct Scsi_Host *shpnt, int ldn, int *block_length, int *device_type)</div><div class='del'>-{</div><div class='del'>-	unsigned char *buf;</div><div class='del'>-	/* if no valid device found, return immediately with 0 */</div><div class='del'>-	if (!(device_inquiry(shpnt, ldn)))</div><div class='del'>-		return 0;</div><div class='del'>-	buf = (unsigned char *) (&amp;(ld(shpnt)[ldn].buf));</div><div class='del'>-	if (*buf == TYPE_ROM) {</div><div class='del'>-		*device_type = TYPE_ROM;</div><div class='del'>-		*block_length = 2048;	/* (standard blocksize for yellow-/red-book) */</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	if (*buf == TYPE_WORM) {</div><div class='del'>-		*device_type = TYPE_WORM;</div><div class='del'>-		*block_length = 2048;</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	if (*buf == TYPE_DISK) {</div><div class='del'>-		*device_type = TYPE_DISK;</div><div class='del'>-		if (read_capacity(shpnt, ldn)) {</div><div class='del'>-			*block_length = *(buf + 7) + (*(buf + 6) &lt;&lt; 8) + (*(buf + 5) &lt;&lt; 16) + (*(buf + 4) &lt;&lt; 24);</div><div class='del'>-			return 1;</div><div class='del'>-		} else</div><div class='del'>-			return 0;</div><div class='del'>-	}</div><div class='del'>-	if (*buf == TYPE_MOD) {</div><div class='del'>-		*device_type = TYPE_MOD;</div><div class='del'>-		if (read_capacity(shpnt, ldn)) {</div><div class='del'>-			*block_length = *(buf + 7) + (*(buf + 6) &lt;&lt; 8) + (*(buf + 5) &lt;&lt; 16) + (*(buf + 4) &lt;&lt; 24);</div><div class='del'>-			return 1;</div><div class='del'>-		} else</div><div class='del'>-			return 0;</div><div class='del'>-	}</div><div class='del'>-	if (*buf == TYPE_TAPE) {</div><div class='del'>-		*device_type = TYPE_TAPE;</div><div class='del'>-		*block_length = 0;	/* not in use (setting by mt and mtst in op.) */</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	if (*buf == TYPE_PROCESSOR) {</div><div class='del'>-		*device_type = TYPE_PROCESSOR;</div><div class='del'>-		*block_length = 0;	/* they set their stuff on drivers */</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	if (*buf == TYPE_SCANNER) {</div><div class='del'>-		*device_type = TYPE_SCANNER;</div><div class='del'>-		*block_length = 0;	/* they set their stuff on drivers */</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	if (*buf == TYPE_MEDIUM_CHANGER) {</div><div class='del'>-		*device_type = TYPE_MEDIUM_CHANGER;</div><div class='del'>-		*block_length = 0;	/* One never knows, what to expect on a medium</div><div class='del'>-					   changer device. */</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void internal_ibmmca_scsi_setup(char *str, int *ints)</div><div class='del'>-{</div><div class='del'>-	int i, j, io_base, id_base;</div><div class='del'>-	char *token;</div><div class='del'>-</div><div class='del'>-	io_base = 0;</div><div class='del'>-	id_base = 0;</div><div class='del'>-	if (str) {</div><div class='del'>-		j = 0;</div><div class='del'>-		while ((token = strsep(&amp;str, ",")) != NULL) {</div><div class='del'>-			if (!strcmp(token, "activity"))</div><div class='del'>-				display_mode |= LED_ACTIVITY;</div><div class='del'>-			if (!strcmp(token, "display"))</div><div class='del'>-				display_mode |= LED_DISP;</div><div class='del'>-			if (!strcmp(token, "adisplay"))</div><div class='del'>-				display_mode |= LED_ADISP;</div><div class='del'>-			if (!strcmp(token, "normal"))</div><div class='del'>-				ibm_ansi_order = 0;</div><div class='del'>-			if (!strcmp(token, "ansi"))</div><div class='del'>-				ibm_ansi_order = 1;</div><div class='del'>-			if (!strcmp(token, "fast"))</div><div class='del'>-				global_adapter_speed = 0;</div><div class='del'>-			if (!strcmp(token, "medium"))</div><div class='del'>-				global_adapter_speed = 4;</div><div class='del'>-			if (!strcmp(token, "slow"))</div><div class='del'>-				global_adapter_speed = 7;</div><div class='del'>-			if ((*token == '-') || (isdigit(*token))) {</div><div class='del'>-				if (!(j % 2) &amp;&amp; (io_base &lt; IM_MAX_HOSTS))</div><div class='del'>-					io_port[io_base++] = simple_strtoul(token, NULL, 0);</div><div class='del'>-				if ((j % 2) &amp;&amp; (id_base &lt; IM_MAX_HOSTS))</div><div class='del'>-					scsi_id[id_base++] = simple_strtoul(token, NULL, 0);</div><div class='del'>-				j++;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	} else if (ints) {</div><div class='del'>-		for (i = 0; i &lt; IM_MAX_HOSTS &amp;&amp; 2 * i + 2 &lt; ints[0]; i++) {</div><div class='del'>-			io_port[i] = ints[2 * i + 2];</div><div class='del'>-			scsi_id[i] = ints[2 * i + 2];</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#if 0</div><div class='del'>- FIXME NEED TO MOVE TO SYSFS</div><div class='del'>-</div><div class='del'>-static int ibmmca_getinfo(char *buf, int slot, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct Scsi_Host *shpnt;</div><div class='del'>-	int len, speciale, connectore, k;</div><div class='del'>-	unsigned int pos[8];</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct Scsi_Host *dev = dev_id;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(dev-&gt;host_lock, flags);</div><div class='del'>-</div><div class='del'>-	shpnt = dev;		/* assign host-structure to local pointer */</div><div class='del'>-	len = 0;		/* set filled text-buffer index to 0 */</div><div class='del'>-	/* get the _special contents of the hostdata structure */</div><div class='del'>-	speciale = ((struct ibmmca_hostdata *) shpnt-&gt;hostdata)-&gt;_special;</div><div class='del'>-	connectore = ((struct ibmmca_hostdata *) shpnt-&gt;hostdata)-&gt;_connector_size;</div><div class='del'>-	for (k = 2; k &lt; 4; k++)</div><div class='del'>-		pos[k] = ((struct ibmmca_hostdata *) shpnt-&gt;hostdata)-&gt;_pos[k];</div><div class='del'>-	if (speciale == FORCED_DETECTION) {	/* forced detection */</div><div class='del'>-		len += sprintf(buf + len,</div><div class='del'>-			       "Adapter category: forced detected\n" "***************************************\n" "***  Forced detected SCSI Adapter   ***\n" "***  No chip-information available  ***\n" "***************************************\n");</div><div class='del'>-	} else if (speciale == INTEGRATED_SCSI) {</div><div class='del'>-		/* if the integrated subsystem has been found automatically: */</div><div class='del'>-		len += sprintf(buf + len,</div><div class='del'>-			       "Adapter category: integrated\n" "Chip revision level: %d\n" "Chip status: %s\n" "8 kByte NVRAM status: %s\n", ((pos[2] &amp; 0xf0) &gt;&gt; 4), (pos[2] &amp; 1) ? "enabled" : "disabled", (pos[2] &amp; 2) ? "locked" : "accessible");</div><div class='del'>-	} else if ((speciale &gt;= 0) &amp;&amp; (speciale &lt; ARRAY_SIZE(subsys_list))) {</div><div class='del'>-		/* if the subsystem is a slot adapter */</div><div class='del'>-		len += sprintf(buf + len, "Adapter category: slot-card\n" "ROM Segment Address: ");</div><div class='del'>-		if ((pos[2] &amp; 0xf0) == 0xf0)</div><div class='del'>-			len += sprintf(buf + len, "off\n");</div><div class='del'>-		else</div><div class='del'>-			len += sprintf(buf + len, "0x%x\n", ((pos[2] &amp; 0xf0) &lt;&lt; 13) + 0xc0000);</div><div class='del'>-		len += sprintf(buf + len, "Chip status: %s\n", (pos[2] &amp; 1) ? "enabled" : "disabled");</div><div class='del'>-		len += sprintf(buf + len, "Adapter I/O Offset: 0x%x\n", ((pos[2] &amp; 0x0e) &lt;&lt; 2));</div><div class='del'>-	} else {</div><div class='del'>-		len += sprintf(buf + len, "Adapter category: unknown\n");</div><div class='del'>-	}</div><div class='del'>-	/* common subsystem information to write to the slotn file */</div><div class='del'>-	len += sprintf(buf + len, "Subsystem PUN: %d\n", shpnt-&gt;this_id);</div><div class='del'>-	len += sprintf(buf + len, "I/O base address range: 0x%x-0x%x\n", (unsigned int) (shpnt-&gt;io_port), (unsigned int) (shpnt-&gt;io_port + 7));</div><div class='del'>-	len += sprintf(buf + len, "MCA-slot size: %d bits", connectore);</div><div class='del'>-	/* Now make sure, the bufferlength is devidable by 4 to avoid</div><div class='del'>-	 * paging problems of the buffer. */</div><div class='del'>-	while (len % sizeof(int) != (sizeof(int) - 1))</div><div class='del'>-		len += sprintf(buf + len, " ");</div><div class='del'>-	len += sprintf(buf + len, "\n");</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static struct scsi_host_template ibmmca_driver_template = {</div><div class='del'>-          .proc_name      = "ibmmca",</div><div class='del'>-	  .proc_info	  = ibmmca_proc_info,</div><div class='del'>-          .name           = "IBM SCSI-Subsystem",</div><div class='del'>-          .queuecommand   = ibmmca_queuecommand,</div><div class='del'>-	  .eh_abort_handler = ibmmca_abort,</div><div class='del'>-	  .eh_host_reset_handler = ibmmca_host_reset,</div><div class='del'>-          .bios_param     = ibmmca_biosparam,</div><div class='del'>-          .can_queue      = 16,</div><div class='del'>-          .this_id        = 7,</div><div class='del'>-          .sg_tablesize   = 16,</div><div class='del'>-          .cmd_per_lun    = 1,</div><div class='del'>-          .use_clustering = ENABLE_CLUSTERING,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int ibmmca_probe(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct Scsi_Host *shpnt;</div><div class='del'>-	int port, id, i, j, k, irq, enabled, ret = -EINVAL;</div><div class='del'>-	struct mca_device *mca_dev = to_mca_device(dev);</div><div class='del'>-	const char *description = ibmmca_description[mca_dev-&gt;index];</div><div class='del'>-</div><div class='del'>-	/* First of all, print the version number of the driver. This is</div><div class='del'>-	 * important to allow better user bugreports in case of already</div><div class='del'>-	 * having problems with the MCA_bus probing. */</div><div class='del'>-	printk(KERN_INFO "IBM MCA SCSI: Version %s\n", IBMMCA_SCSI_DRIVER_VERSION);</div><div class='del'>-	/* The POS2-register of all PS/2 model SCSI-subsystems has the following</div><div class='del'>-	 * interpretation of bits:</div><div class='del'>-	 *                             Bit 7 - 4 : Chip Revision ID (Release)</div><div class='del'>-	 *                             Bit 3 - 2 : Reserved</div><div class='del'>-	 *                             Bit 1     : 8k NVRAM Disabled</div><div class='del'>-	 *                             Bit 0     : Chip Enable (EN-Signal)</div><div class='del'>-	 * The POS3-register is interpreted as follows:</div><div class='del'>-	 *                             Bit 7 - 5 : SCSI ID</div><div class='del'>-	 *                             Bit 4     : Reserved = 0</div><div class='del'>-	 *                             Bit 3 - 0 : Reserved = 0</div><div class='del'>-	 * (taken from "IBM, PS/2 Hardware Interface Technical Reference, Common</div><div class='del'>-	 * Interfaces (1991)").</div><div class='del'>-	 * In short words, this means, that IBM PS/2 machines only support</div><div class='del'>-	 * 1 single subsystem by default. The slot-adapters must have another</div><div class='del'>-	 * configuration on pos2. Here, one has to assume the following</div><div class='del'>-	 * things for POS2-register:</div><div class='del'>-	 *                             Bit 7 - 4 : Chip Revision ID (Release)</div><div class='del'>-	 *                             Bit 3 - 1 : port offset factor</div><div class='del'>-	 *                             Bit 0     : Chip Enable (EN-Signal)</div><div class='del'>-	 * As I found a patch here, setting the IO-registers to 0x3540 forced,</div><div class='del'>-	 * as there was a 0x05 in POS2 on a model 56, I assume, that the</div><div class='del'>-	 * port 0x3540 must be fix for integrated SCSI-controllers.</div><div class='del'>-	 * Ok, this discovery leads to the following implementation: (M.Lang) */</div><div class='del'>-</div><div class='del'>-	/* first look for the IBM SCSI integrated subsystem on the motherboard */</div><div class='del'>-	for (j = 0; j &lt; 8; j++)	/* read the pos-information */</div><div class='del'>-		pos[j] = mca_device_read_pos(mca_dev, j);</div><div class='del'>-	id = (pos[3] &amp; 0xe0) &gt;&gt; 5; /* this is correct and represents the PUN */</div><div class='del'>-	enabled = (pos[2] &amp;0x01);</div><div class='del'>-	if (!enabled) {</div><div class='del'>-		printk(KERN_WARNING "IBM MCA SCSI: WARNING - Your SCSI-subsystem is disabled!\n");</div><div class='del'>-		printk(KERN_WARNING "              SCSI-operations may not work.\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* pos2 = pos3 = 0xff if there is no integrated SCSI-subsystem present, but</div><div class='del'>-	 * if we ignore the settings of all surrounding pos registers, it is not</div><div class='del'>-	 * completely sufficient to only check pos2 and pos3. */</div><div class='del'>-	/* Therefore, now the following if statement is used to</div><div class='del'>-	 * make sure, we see a real integrated onboard SCSI-interface and no</div><div class='del'>-	 * internal system information, which gets mapped to some pos registers</div><div class='del'>-	 * on models 95xx. */</div><div class='del'>-	if (mca_dev-&gt;slot == MCA_INTEGSCSI &amp;&amp;</div><div class='del'>-	    ((!pos[0] &amp;&amp; !pos[1] &amp;&amp; pos[2] &gt; 0 &amp;&amp;</div><div class='del'>-	      pos[3] &gt; 0 &amp;&amp; !pos[4] &amp;&amp; !pos[5] &amp;&amp;</div><div class='del'>-	      !pos[6] &amp;&amp; !pos[7]) ||</div><div class='del'>-	     (pos[0] == 0xff &amp;&amp; pos[1] == 0xff &amp;&amp;</div><div class='del'>-	      pos[2] &lt; 0xff &amp;&amp; pos[3] &lt; 0xff &amp;&amp;</div><div class='del'>-	      pos[4] == 0xff &amp;&amp; pos[5] == 0xff &amp;&amp;</div><div class='del'>-	      pos[6] == 0xff &amp;&amp; pos[7] == 0xff))) {</div><div class='del'>-		irq = IM_IRQ;</div><div class='del'>-		port = IM_IO_PORT;</div><div class='del'>-	} else {</div><div class='del'>-		irq = IM_IRQ;</div><div class='del'>-		port = IM_IO_PORT + ((pos[2] &amp;0x0e) &lt;&lt; 2);</div><div class='del'>-		if ((mca_dev-&gt;index == IBM_SCSI2_FW) &amp;&amp; (pos[6] != 0)) {</div><div class='del'>-			printk(KERN_ERR "IBM MCA SCSI: ERROR - Wrong POS(6)-register setting!\n");</div><div class='del'>-			printk(KERN_ERR "              Impossible to determine adapter PUN!\n");</div><div class='del'>-			printk(KERN_ERR "              Guessing adapter PUN = 7.\n");</div><div class='del'>-			id = 7;</div><div class='del'>-		} else {</div><div class='del'>-			id = (pos[3] &amp; 0xe0) &gt;&gt; 5;	/* get subsystem PUN */</div><div class='del'>-			if (mca_dev-&gt;index == IBM_SCSI2_FW) {</div><div class='del'>-				id |= (pos[3] &amp; 0x10) &gt;&gt; 1;	/* get subsystem PUN high-bit</div><div class='del'>-								 * for F/W adapters */</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if ((mca_dev-&gt;index == IBM_SCSI2_FW) &amp;&amp;</div><div class='del'>-		    (pos[4] &amp; 0x01) &amp;&amp; (pos[6] == 0)) {</div><div class='del'>-			/* IRQ11 is used by SCSI-2 F/W Adapter/A */</div><div class='del'>-			printk(KERN_DEBUG "IBM MCA SCSI: SCSI-2 F/W adapter needs IRQ 11.\n");</div><div class='del'>-			irq = IM_IRQ_FW;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* give detailed information on the subsystem. This helps me</div><div class='del'>-	 * additionally during debugging and analyzing bug-reports. */</div><div class='del'>-	printk(KERN_INFO "IBM MCA SCSI: %s found, io=0x%x, scsi id=%d,\n",</div><div class='del'>-	       description, port, id);</div><div class='del'>-	if (mca_dev-&gt;slot == MCA_INTEGSCSI)</div><div class='del'>-		printk(KERN_INFO "              chip rev.=%d, 8K NVRAM=%s, subsystem=%s\n", ((pos[2] &amp; 0xf0) &gt;&gt; 4), (pos[2] &amp; 2) ? "locked" : "accessible", (pos[2] &amp; 1) ? "enabled." : "disabled.");</div><div class='del'>-	else {</div><div class='del'>-		if ((pos[2] &amp; 0xf0) == 0xf0)</div><div class='del'>-			printk(KERN_DEBUG "              ROM Addr.=off,");</div><div class='del'>-		else</div><div class='del'>-			printk(KERN_DEBUG "              ROM Addr.=0x%x,", ((pos[2] &amp; 0xf0) &lt;&lt; 13) + 0xc0000);</div><div class='del'>-</div><div class='del'>-		printk(KERN_DEBUG " port-offset=0x%x, subsystem=%s\n", ((pos[2] &amp; 0x0e) &lt;&lt; 2), (pos[2] &amp; 1) ? "enabled." : "disabled.");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* check I/O region */</div><div class='del'>-	if (!request_region(port, IM_N_IO_PORT, description)) {</div><div class='del'>-		printk(KERN_ERR "IBM MCA SCSI: Unable to get I/O region 0x%x-0x%x (%d ports).\n", port, port + IM_N_IO_PORT - 1, IM_N_IO_PORT);</div><div class='del'>-		goto out_fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* register host */</div><div class='del'>-	shpnt = scsi_host_alloc(&amp;ibmmca_driver_template,</div><div class='del'>-				sizeof(struct ibmmca_hostdata));</div><div class='del'>-	if (!shpnt) {</div><div class='del'>-		printk(KERN_ERR "IBM MCA SCSI: Unable to register host.\n");</div><div class='del'>-		goto out_release;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_set_drvdata(dev, shpnt);</div><div class='del'>-	if(request_irq(irq, interrupt_handler, IRQF_SHARED, description, dev)) {</div><div class='del'>-		printk(KERN_ERR "IBM MCA SCSI: failed to request interrupt %d\n", irq);</div><div class='del'>-		goto out_free_host;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* request I/O region */</div><div class='del'>-	special(shpnt) = mca_dev-&gt;index;	/* important assignment or else crash! */</div><div class='del'>-	subsystem_connector_size(shpnt) = 0;	/* preset slot-size */</div><div class='del'>-	shpnt-&gt;irq = irq;	/* assign necessary stuff for the adapter */</div><div class='del'>-	shpnt-&gt;io_port = port;</div><div class='del'>-	shpnt-&gt;n_io_port = IM_N_IO_PORT;</div><div class='del'>-	shpnt-&gt;this_id = id;</div><div class='del'>-	shpnt-&gt;max_id = 8;	/* 8 PUNs are default */</div><div class='del'>-	/* now, the SCSI-subsystem is connected to Linux */</div><div class='del'>-</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-	ctrl = (unsigned int) (inb(IM_CTR_REG(found)));	/* get control-register status */</div><div class='del'>-	printk("IBM MCA SCSI: Control Register contents: %x, status: %x\n", ctrl, inb(IM_STAT_REG(found)));</div><div class='del'>-	printk("IBM MCA SCSI: This adapters' POS-registers: ");</div><div class='del'>-	for (i = 0; i &lt; 8; i++)</div><div class='del'>-		printk("%x ", pos[i]);</div><div class='del'>-	printk("\n");</div><div class='del'>-#endif</div><div class='del'>-	reset_status(shpnt) = IM_RESET_NOT_IN_PROGRESS;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 16; i++)	/* reset the tables */</div><div class='del'>-		for (j = 0; j &lt; 8; j++)</div><div class='del'>-			get_ldn(shpnt)[i][j] = MAX_LOG_DEV;</div><div class='del'>-</div><div class='del'>-	/* check which logical devices exist */</div><div class='del'>-	/* after this line, local interrupting is possible: */</div><div class='del'>-	local_checking_phase_flag(shpnt) = 1;</div><div class='del'>-	check_devices(shpnt, mca_dev-&gt;index);	/* call by value, using the global variable hosts */</div><div class='del'>-	local_checking_phase_flag(shpnt) = 0;</div><div class='del'>-</div><div class='del'>-	/* an ibm mca subsystem has been detected */</div><div class='del'>-</div><div class='del'>-	for (k = 2; k &lt; 7; k++)</div><div class='del'>-		((struct ibmmca_hostdata *) shpnt-&gt;hostdata)-&gt;_pos[k] = pos[k];</div><div class='del'>-	((struct ibmmca_hostdata *) shpnt-&gt;hostdata)-&gt;_special = INTEGRATED_SCSI;</div><div class='del'>-	mca_device_set_name(mca_dev, description);</div><div class='del'>-	/* FIXME: NEED TO REPLUMB TO SYSFS</div><div class='del'>-	   mca_set_adapter_procfn(MCA_INTEGSCSI, (MCA_ProcFn) ibmmca_getinfo, shpnt);</div><div class='del'>-	*/</div><div class='del'>-	mca_device_set_claim(mca_dev, 1);</div><div class='del'>-	if (scsi_add_host(shpnt, dev)) {</div><div class='del'>-		dev_printk(KERN_ERR, dev, "IBM MCA SCSI: scsi_add_host failed\n");</div><div class='del'>-		goto out_free_host;</div><div class='del'>-	}</div><div class='del'>-	scsi_scan_host(shpnt);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>- out_free_host:</div><div class='del'>-	scsi_host_put(shpnt);</div><div class='del'>- out_release:</div><div class='del'>-	release_region(port, IM_N_IO_PORT);</div><div class='del'>- out_fail:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __devexit ibmmca_remove(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct Scsi_Host *shpnt = dev_get_drvdata(dev);</div><div class='del'>-	scsi_remove_host(shpnt);</div><div class='del'>-	release_region(shpnt-&gt;io_port, shpnt-&gt;n_io_port);</div><div class='del'>-	free_irq(shpnt-&gt;irq, dev);</div><div class='del'>-	scsi_host_put(shpnt);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* The following routine is the SCSI command queue for the midlevel driver */</div><div class='del'>-static int ibmmca_queuecommand_lck(Scsi_Cmnd * cmd, void (*done) (Scsi_Cmnd *))</div><div class='del'>-{</div><div class='del'>-	unsigned int ldn;</div><div class='del'>-	unsigned int scsi_cmd;</div><div class='del'>-	struct im_scb *scb;</div><div class='del'>-	struct Scsi_Host *shpnt;</div><div class='del'>-	int current_ldn;</div><div class='del'>-	int id, lun;</div><div class='del'>-	int target;</div><div class='del'>-	int max_pun;</div><div class='del'>-	int i;</div><div class='del'>-	struct scatterlist *sg;</div><div class='del'>-</div><div class='del'>-	shpnt = cmd-&gt;device-&gt;host;</div><div class='del'>-</div><div class='del'>-	max_pun = subsystem_maxid(shpnt);</div><div class='del'>-	if (ibm_ansi_order) {</div><div class='del'>-		target = max_pun - 1 - cmd-&gt;device-&gt;id;</div><div class='del'>-		if ((target &lt;= subsystem_pun(shpnt)) &amp;&amp; (cmd-&gt;device-&gt;id &lt;= subsystem_pun(shpnt)))</div><div class='del'>-			target--;</div><div class='del'>-		else if ((target &gt;= subsystem_pun(shpnt)) &amp;&amp; (cmd-&gt;device-&gt;id &gt;= subsystem_pun(shpnt)))</div><div class='del'>-			target++;</div><div class='del'>-	} else</div><div class='del'>-		target = cmd-&gt;device-&gt;id;</div><div class='del'>-</div><div class='del'>-	/* if (target,lun) is NO LUN or not existing at all, return error */</div><div class='del'>-	if ((get_scsi(shpnt)[target][cmd-&gt;device-&gt;lun] == TYPE_NO_LUN) || (get_scsi(shpnt)[target][cmd-&gt;device-&gt;lun] == TYPE_NO_DEVICE)) {</div><div class='del'>-		cmd-&gt;result = DID_NO_CONNECT &lt;&lt; 16;</div><div class='del'>-		if (done)</div><div class='del'>-			done(cmd);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*if (target,lun) unassigned, do further checks... */</div><div class='del'>-	ldn = get_ldn(shpnt)[target][cmd-&gt;device-&gt;lun];</div><div class='del'>-	if (ldn &gt;= MAX_LOG_DEV) {	/* on invalid ldn do special stuff */</div><div class='del'>-		if (ldn &gt; MAX_LOG_DEV) {	/* dynamical remapping if ldn unassigned */</div><div class='del'>-			current_ldn = next_ldn(shpnt);	/* stop-value for one circle */</div><div class='del'>-			while (ld(shpnt)[next_ldn(shpnt)].cmd) {	/* search for a occupied, but not in */</div><div class='del'>-				/* command-processing ldn. */</div><div class='del'>-				next_ldn(shpnt)++;</div><div class='del'>-				if (next_ldn(shpnt) &gt;= MAX_LOG_DEV)</div><div class='del'>-					next_ldn(shpnt) = 7;</div><div class='del'>-				if (current_ldn == next_ldn(shpnt)) {	/* One circle done ? */</div><div class='del'>-					/* no non-processing ldn found */</div><div class='del'>-					scmd_printk(KERN_WARNING, cmd,</div><div class='del'>-	"IBM MCA SCSI: Cannot assign SCSI-device dynamically!\n"</div><div class='del'>-	"              On ldn 7-14 SCSI-commands everywhere in progress.\n"</div><div class='del'>-	"              Reporting DID_NO_CONNECT for device.\n");</div><div class='del'>-					cmd-&gt;result = DID_NO_CONNECT &lt;&lt; 16;	/* return no connect */</div><div class='del'>-					if (done)</div><div class='del'>-						done(cmd);</div><div class='del'>-					return 0;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* unmap non-processing ldn */</div><div class='del'>-			for (id = 0; id &lt; max_pun; id++)</div><div class='del'>-				for (lun = 0; lun &lt; 8; lun++) {</div><div class='del'>-					if (get_ldn(shpnt)[id][lun] == next_ldn(shpnt)) {</div><div class='del'>-						get_ldn(shpnt)[id][lun] = TYPE_NO_DEVICE;</div><div class='del'>-						get_scsi(shpnt)[id][lun] = TYPE_NO_DEVICE;</div><div class='del'>-						/* unmap entry */</div><div class='del'>-					}</div><div class='del'>-				}</div><div class='del'>-			/* set reduced interrupt_handler-mode for checking */</div><div class='del'>-			local_checking_phase_flag(shpnt) = 1;</div><div class='del'>-			/* map found ldn to pun,lun */</div><div class='del'>-			get_ldn(shpnt)[target][cmd-&gt;device-&gt;lun] = next_ldn(shpnt);</div><div class='del'>-			/* change ldn to the right value, that is now next_ldn */</div><div class='del'>-			ldn = next_ldn(shpnt);</div><div class='del'>-			/* unassign all ldns (pun,lun,ldn does not matter for remove) */</div><div class='del'>-			immediate_assign(shpnt, 0, 0, 0, REMOVE_LDN);</div><div class='del'>-			/* set only LDN for remapped device */</div><div class='del'>-			immediate_assign(shpnt, target, cmd-&gt;device-&gt;lun, ldn, SET_LDN);</div><div class='del'>-			/* get device information for ld[ldn] */</div><div class='del'>-			if (device_exists(shpnt, ldn, &amp;ld(shpnt)[ldn].block_length, &amp;ld(shpnt)[ldn].device_type)) {</div><div class='del'>-				ld(shpnt)[ldn].cmd = NULL;	/* To prevent panic set 0, because</div><div class='del'>-								   devices that were not assigned,</div><div class='del'>-								   should have nothing in progress. */</div><div class='del'>-				get_scsi(shpnt)[target][cmd-&gt;device-&gt;lun] = ld(shpnt)[ldn].device_type;</div><div class='del'>-				/* increase assignment counters for statistics in /proc */</div><div class='del'>-				IBM_DS(shpnt).dynamical_assignments++;</div><div class='del'>-				IBM_DS(shpnt).ldn_assignments[ldn]++;</div><div class='del'>-			} else</div><div class='del'>-				/* panic here, because a device, found at boottime has</div><div class='del'>-				   vanished */</div><div class='del'>-				panic("IBM MCA SCSI: ldn=0x%x, SCSI-device on (%d,%d) vanished!\n", ldn, target, cmd-&gt;device-&gt;lun);</div><div class='del'>-			/* unassign again all ldns (pun,lun,ldn does not matter for remove) */</div><div class='del'>-			immediate_assign(shpnt, 0, 0, 0, REMOVE_LDN);</div><div class='del'>-			/* remap all ldns, as written in the pun/lun table */</div><div class='del'>-			lun = 0;</div><div class='del'>-#ifdef CONFIG_SCSI_MULTI_LUN</div><div class='del'>-			for (lun = 0; lun &lt; 8; lun++)</div><div class='del'>-#endif</div><div class='del'>-				for (id = 0; id &lt; max_pun; id++) {</div><div class='del'>-					if (get_ldn(shpnt)[id][lun] &lt;= MAX_LOG_DEV)</div><div class='del'>-						immediate_assign(shpnt, id, lun, get_ldn(shpnt)[id][lun], SET_LDN);</div><div class='del'>-				}</div><div class='del'>-			/* set back to normal interrupt_handling */</div><div class='del'>-			local_checking_phase_flag(shpnt) = 0;</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-			/* Information on syslog terminal */</div><div class='del'>-			printk("IBM MCA SCSI: ldn=0x%x dynamically reassigned to (%d,%d).\n", ldn, target, cmd-&gt;device-&gt;lun);</div><div class='del'>-#endif</div><div class='del'>-			/* increase next_ldn for next dynamical assignment */</div><div class='del'>-			next_ldn(shpnt)++;</div><div class='del'>-			if (next_ldn(shpnt) &gt;= MAX_LOG_DEV)</div><div class='del'>-				next_ldn(shpnt) = 7;</div><div class='del'>-		} else {	/* wall against Linux accesses to the subsystem adapter */</div><div class='del'>-			cmd-&gt;result = DID_BAD_TARGET &lt;&lt; 16;</div><div class='del'>-			if (done)</div><div class='del'>-				done(cmd);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*verify there is no command already in progress for this log dev */</div><div class='del'>-	if (ld(shpnt)[ldn].cmd)</div><div class='del'>-		panic("IBM MCA SCSI: cmd already in progress for this ldn.\n");</div><div class='del'>-</div><div class='del'>-	/*save done in cmd, and save cmd for the interrupt handler */</div><div class='del'>-	cmd-&gt;scsi_done = done;</div><div class='del'>-	ld(shpnt)[ldn].cmd = cmd;</div><div class='del'>-</div><div class='del'>-	/*fill scb information independent of the scsi command */</div><div class='del'>-	scb = &amp;(ld(shpnt)[ldn].scb);</div><div class='del'>-	ld(shpnt)[ldn].tsb.dev_status = 0;</div><div class='del'>-	scb-&gt;enable = IM_REPORT_TSB_ONLY_ON_ERROR | IM_RETRY_ENABLE;</div><div class='del'>-	scb-&gt;tsb_adr = isa_virt_to_bus(&amp;(ld(shpnt)[ldn].tsb));</div><div class='del'>-	scsi_cmd = cmd-&gt;cmnd[0];</div><div class='del'>-</div><div class='del'>-	if (scsi_sg_count(cmd)) {</div><div class='del'>-		BUG_ON(scsi_sg_count(cmd) &gt; 16);</div><div class='del'>-</div><div class='del'>-		scsi_for_each_sg(cmd, sg, scsi_sg_count(cmd), i) {</div><div class='del'>-			ld(shpnt)[ldn].sge[i].address = (void *) (isa_page_to_bus(sg_page(sg)) + sg-&gt;offset);</div><div class='del'>-			ld(shpnt)[ldn].sge[i].byte_length = sg-&gt;length;</div><div class='del'>-		}</div><div class='del'>-		scb-&gt;enable |= IM_POINTER_TO_LIST;</div><div class='del'>-		scb-&gt;sys_buf_adr = isa_virt_to_bus(&amp;(ld(shpnt)[ldn].sge[0]));</div><div class='del'>-		scb-&gt;sys_buf_length = scsi_sg_count(cmd) * sizeof(struct im_sge);</div><div class='del'>-	} else {</div><div class='del'>- 		scb-&gt;sys_buf_adr = isa_virt_to_bus(scsi_sglist(cmd));</div><div class='del'>-		/* recent Linux midlevel SCSI places 1024 byte for inquiry</div><div class='del'>-		 * command. Far too much for old PS/2 hardware. */</div><div class='del'>-		switch (scsi_cmd) {</div><div class='del'>-			/* avoid command errors by setting bufferlengths to</div><div class='del'>-			 * ANSI-standard. Beware of forcing it to 255,</div><div class='del'>-			 * this could SEGV the kernel!!! */</div><div class='del'>-		case INQUIRY:</div><div class='del'>-		case REQUEST_SENSE:</div><div class='del'>-		case MODE_SENSE:</div><div class='del'>-		case MODE_SELECT:</div><div class='del'>-			if (scsi_bufflen(cmd) &gt; 255)</div><div class='del'>-				scb-&gt;sys_buf_length = 255;</div><div class='del'>-			else</div><div class='del'>-				scb-&gt;sys_buf_length = scsi_bufflen(cmd);</div><div class='del'>-			break;</div><div class='del'>-		case TEST_UNIT_READY:</div><div class='del'>-			scb-&gt;sys_buf_length = 0;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			scb-&gt;sys_buf_length = scsi_bufflen(cmd);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	/*fill scb information dependent on scsi command */</div><div class='del'>-</div><div class='del'>-#ifdef IM_DEBUG_CMD</div><div class='del'>-	printk("issue scsi cmd=%02x to ldn=%d\n", scsi_cmd, ldn);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* for specific device-type debugging: */</div><div class='del'>-#ifdef IM_DEBUG_CMD_SPEC_DEV</div><div class='del'>-	if (ld(shpnt)[ldn].device_type == IM_DEBUG_CMD_DEVICE)</div><div class='del'>-		printk("(SCSI-device-type=0x%x) issue scsi cmd=%02x to ldn=%d\n", ld(shpnt)[ldn].device_type, scsi_cmd, ldn);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* for possible panics store current command */</div><div class='del'>-	last_scsi_command(shpnt)[ldn] = scsi_cmd;</div><div class='del'>-	last_scsi_type(shpnt)[ldn] = IM_SCB;</div><div class='del'>-	/* update statistical info */</div><div class='del'>-	IBM_DS(shpnt).total_accesses++;</div><div class='del'>-	IBM_DS(shpnt).ldn_access[ldn]++;</div><div class='del'>-</div><div class='del'>-	switch (scsi_cmd) {</div><div class='del'>-	case READ_6:</div><div class='del'>-	case WRITE_6:</div><div class='del'>-	case READ_10:</div><div class='del'>-	case WRITE_10:</div><div class='del'>-	case READ_12:</div><div class='del'>-	case WRITE_12:</div><div class='del'>-		/* Distinguish between disk and other devices. Only disks (that are the</div><div class='del'>-		   most frequently accessed devices) should be supported by the</div><div class='del'>-		   IBM-SCSI-Subsystem commands. */</div><div class='del'>-		switch (ld(shpnt)[ldn].device_type) {</div><div class='del'>-		case TYPE_DISK:	/* for harddisks enter here ... */</div><div class='del'>-		case TYPE_MOD:	/* ... try it also for MO-drives (send flames as */</div><div class='del'>-			/*     you like, if this won't work.) */</div><div class='del'>-			if (scsi_cmd == READ_6 || scsi_cmd == READ_10 || scsi_cmd == READ_12) {</div><div class='del'>-				/* read command preparations */</div><div class='del'>-				scb-&gt;enable |= IM_READ_CONTROL;</div><div class='del'>-				IBM_DS(shpnt).ldn_read_access[ldn]++;	/* increase READ-access on ldn stat. */</div><div class='del'>-				scb-&gt;command = IM_READ_DATA_CMD | IM_NO_DISCONNECT;</div><div class='del'>-			} else {	/* write command preparations */</div><div class='del'>-				IBM_DS(shpnt).ldn_write_access[ldn]++;	/* increase write-count on ldn stat. */</div><div class='del'>-				scb-&gt;command = IM_WRITE_DATA_CMD | IM_NO_DISCONNECT;</div><div class='del'>-			}</div><div class='del'>-			if (scsi_cmd == READ_6 || scsi_cmd == WRITE_6) {</div><div class='del'>-				scb-&gt;u1.log_blk_adr = (((unsigned) cmd-&gt;cmnd[3]) &lt;&lt; 0) | (((unsigned) cmd-&gt;cmnd[2]) &lt;&lt; 8) | ((((unsigned) cmd-&gt;cmnd[1]) &amp; 0x1f) &lt;&lt; 16);</div><div class='del'>-				scb-&gt;u2.blk.count = (unsigned) cmd-&gt;cmnd[4];</div><div class='del'>-			} else {</div><div class='del'>-				scb-&gt;u1.log_blk_adr = (((unsigned) cmd-&gt;cmnd[5]) &lt;&lt; 0) | (((unsigned) cmd-&gt;cmnd[4]) &lt;&lt; 8) | (((unsigned) cmd-&gt;cmnd[3]) &lt;&lt; 16) | (((unsigned) cmd-&gt;cmnd[2]) &lt;&lt; 24);</div><div class='del'>-				scb-&gt;u2.blk.count = (((unsigned) cmd-&gt;cmnd[8]) &lt;&lt; 0) | (((unsigned) cmd-&gt;cmnd[7]) &lt;&lt; 8);</div><div class='del'>-			}</div><div class='del'>-			last_scsi_logical_block(shpnt)[ldn] = scb-&gt;u1.log_blk_adr;</div><div class='del'>-			last_scsi_blockcount(shpnt)[ldn] = scb-&gt;u2.blk.count;</div><div class='del'>-			scb-&gt;u2.blk.length = ld(shpnt)[ldn].block_length;</div><div class='del'>-			break;</div><div class='del'>-			/* for other devices, enter here. Other types are not known by</div><div class='del'>-			   Linux! TYPE_NO_LUN is forbidden as valid device. */</div><div class='del'>-		case TYPE_ROM:</div><div class='del'>-		case TYPE_TAPE:</div><div class='del'>-		case TYPE_PROCESSOR:</div><div class='del'>-		case TYPE_WORM:</div><div class='del'>-		case TYPE_SCANNER:</div><div class='del'>-		case TYPE_MEDIUM_CHANGER:</div><div class='del'>-			/* If there is a sequential-device, IBM recommends to use</div><div class='del'>-			   IM_OTHER_SCSI_CMD_CMD instead of subsystem READ/WRITE.</div><div class='del'>-			   This includes CD-ROM devices, too, due to the partial sequential</div><div class='del'>-			   read capabilities. */</div><div class='del'>-			scb-&gt;command = IM_OTHER_SCSI_CMD_CMD;</div><div class='del'>-			if (scsi_cmd == READ_6 || scsi_cmd == READ_10 || scsi_cmd == READ_12)</div><div class='del'>-				/* enable READ */</div><div class='del'>-				scb-&gt;enable |= IM_READ_CONTROL;</div><div class='del'>-			scb-&gt;enable |= IM_BYPASS_BUFFER;</div><div class='del'>-			scb-&gt;u1.scsi_cmd_length = cmd-&gt;cmd_len;</div><div class='del'>-			memcpy(scb-&gt;u2.scsi_command, cmd-&gt;cmnd, cmd-&gt;cmd_len);</div><div class='del'>-			last_scsi_type(shpnt)[ldn] = IM_LONG_SCB;</div><div class='del'>-			/* Read/write on this non-disk devices is also displayworthy,</div><div class='del'>-			   so flash-up the LED/display. */</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case INQUIRY:</div><div class='del'>-		IBM_DS(shpnt).ldn_inquiry_access[ldn]++;</div><div class='del'>-		scb-&gt;command = IM_DEVICE_INQUIRY_CMD;</div><div class='del'>-		scb-&gt;enable |= IM_READ_CONTROL | IM_SUPRESS_EXCEPTION_SHORT | IM_BYPASS_BUFFER;</div><div class='del'>-		scb-&gt;u1.log_blk_adr = 0;</div><div class='del'>-		break;</div><div class='del'>-	case TEST_UNIT_READY:</div><div class='del'>-		scb-&gt;command = IM_OTHER_SCSI_CMD_CMD;</div><div class='del'>-		scb-&gt;enable |= IM_READ_CONTROL | IM_SUPRESS_EXCEPTION_SHORT | IM_BYPASS_BUFFER;</div><div class='del'>-		scb-&gt;u1.log_blk_adr = 0;</div><div class='del'>-		scb-&gt;u1.scsi_cmd_length = 6;</div><div class='del'>-		memcpy(scb-&gt;u2.scsi_command, cmd-&gt;cmnd, 6);</div><div class='del'>-		last_scsi_type(shpnt)[ldn] = IM_LONG_SCB;</div><div class='del'>-		break;</div><div class='del'>-	case READ_CAPACITY:</div><div class='del'>-		/* the length of system memory buffer must be exactly 8 bytes */</div><div class='del'>-		scb-&gt;command = IM_READ_CAPACITY_CMD;</div><div class='del'>-		scb-&gt;enable |= IM_READ_CONTROL | IM_BYPASS_BUFFER;</div><div class='del'>-		if (scb-&gt;sys_buf_length &gt; 8)</div><div class='del'>-			scb-&gt;sys_buf_length = 8;</div><div class='del'>-		break;</div><div class='del'>-		/* Commands that need read-only-mode (system &lt;- device): */</div><div class='del'>-	case REQUEST_SENSE:</div><div class='del'>-		scb-&gt;command = IM_REQUEST_SENSE_CMD;</div><div class='del'>-		scb-&gt;enable |= IM_READ_CONTROL | IM_SUPRESS_EXCEPTION_SHORT | IM_BYPASS_BUFFER;</div><div class='del'>-		break;</div><div class='del'>-		/* Commands that need write-only-mode (system -&gt; device): */</div><div class='del'>-	case MODE_SELECT:</div><div class='del'>-	case MODE_SELECT_10:</div><div class='del'>-		IBM_DS(shpnt).ldn_modeselect_access[ldn]++;</div><div class='del'>-		scb-&gt;command = IM_OTHER_SCSI_CMD_CMD;</div><div class='del'>-		scb-&gt;enable |= IM_SUPRESS_EXCEPTION_SHORT | IM_BYPASS_BUFFER;	/*Select needs WRITE-enabled */</div><div class='del'>-		scb-&gt;u1.scsi_cmd_length = cmd-&gt;cmd_len;</div><div class='del'>-		memcpy(scb-&gt;u2.scsi_command, cmd-&gt;cmnd, cmd-&gt;cmd_len);</div><div class='del'>-		last_scsi_type(shpnt)[ldn] = IM_LONG_SCB;</div><div class='del'>-		break;</div><div class='del'>-		/* For other commands, read-only is useful. Most other commands are</div><div class='del'>-		   running without an input-data-block. */</div><div class='del'>-	default:</div><div class='del'>-		scb-&gt;command = IM_OTHER_SCSI_CMD_CMD;</div><div class='del'>-		scb-&gt;enable |= IM_READ_CONTROL | IM_SUPRESS_EXCEPTION_SHORT | IM_BYPASS_BUFFER;</div><div class='del'>-		scb-&gt;u1.scsi_cmd_length = cmd-&gt;cmd_len;</div><div class='del'>-		memcpy(scb-&gt;u2.scsi_command, cmd-&gt;cmnd, cmd-&gt;cmd_len);</div><div class='del'>-		last_scsi_type(shpnt)[ldn] = IM_LONG_SCB;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	/*issue scb command, and return */</div><div class='del'>-	if (++disk_rw_in_progress == 1)</div><div class='del'>-		PS2_DISK_LED_ON(shpnt-&gt;host_no, target);</div><div class='del'>-</div><div class='del'>-	if (last_scsi_type(shpnt)[ldn] == IM_LONG_SCB) {</div><div class='del'>-		issue_cmd(shpnt, isa_virt_to_bus(scb), IM_LONG_SCB | ldn);</div><div class='del'>-		IBM_DS(shpnt).long_scbs++;</div><div class='del'>-	} else {</div><div class='del'>-		issue_cmd(shpnt, isa_virt_to_bus(scb), IM_SCB | ldn);</div><div class='del'>-		IBM_DS(shpnt).scbs++;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DEF_SCSI_QCMD(ibmmca_queuecommand)</div><div class='del'>-</div><div class='del'>-static int __ibmmca_abort(Scsi_Cmnd * cmd)</div><div class='del'>-{</div><div class='del'>-	/* Abort does not work, as the adapter never generates an interrupt on</div><div class='del'>-	 * whatever situation is simulated, even when really pending commands</div><div class='del'>-	 * are running on the adapters' hardware ! */</div><div class='del'>-</div><div class='del'>-	struct Scsi_Host *shpnt;</div><div class='del'>-	unsigned int ldn;</div><div class='del'>-	void (*saved_done) (Scsi_Cmnd *);</div><div class='del'>-	int target;</div><div class='del'>-	int max_pun;</div><div class='del'>-	unsigned long imm_command;</div><div class='del'>-</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-	printk("IBM MCA SCSI: Abort subroutine called...\n");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	shpnt = cmd-&gt;device-&gt;host;</div><div class='del'>-</div><div class='del'>-	max_pun = subsystem_maxid(shpnt);</div><div class='del'>-	if (ibm_ansi_order) {</div><div class='del'>-		target = max_pun - 1 - cmd-&gt;device-&gt;id;</div><div class='del'>-		if ((target &lt;= subsystem_pun(shpnt)) &amp;&amp; (cmd-&gt;device-&gt;id &lt;= subsystem_pun(shpnt)))</div><div class='del'>-			target--;</div><div class='del'>-		else if ((target &gt;= subsystem_pun(shpnt)) &amp;&amp; (cmd-&gt;device-&gt;id &gt;= subsystem_pun(shpnt)))</div><div class='del'>-			target++;</div><div class='del'>-	} else</div><div class='del'>-		target = cmd-&gt;device-&gt;id;</div><div class='del'>-</div><div class='del'>-	/* get logical device number, and disable system interrupts */</div><div class='del'>-	printk(KERN_WARNING "IBM MCA SCSI: Sending abort to device pun=%d, lun=%d.\n", target, cmd-&gt;device-&gt;lun);</div><div class='del'>-	ldn = get_ldn(shpnt)[target][cmd-&gt;device-&gt;lun];</div><div class='del'>-</div><div class='del'>-	/*if cmd for this ldn has already finished, no need to abort */</div><div class='del'>-	if (!ld(shpnt)[ldn].cmd) {</div><div class='del'>-		    return SUCCESS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Clear ld.cmd, save done function, install internal done,</div><div class='del'>-	 * send abort immediate command (this enables sys. interrupts),</div><div class='del'>-	 * and wait until the interrupt arrives.</div><div class='del'>-	 */</div><div class='del'>-	saved_done = cmd-&gt;scsi_done;</div><div class='del'>-	cmd-&gt;scsi_done = internal_done;</div><div class='del'>-	cmd-&gt;SCp.Status = 0;</div><div class='del'>-	last_scsi_command(shpnt)[ldn] = IM_ABORT_IMM_CMD;</div><div class='del'>-	last_scsi_type(shpnt)[ldn] = IM_IMM_CMD;</div><div class='del'>-	imm_command = inl(IM_CMD_REG(shpnt));</div><div class='del'>-	imm_command &amp;= (unsigned long) (0xffff0000);	/* mask reserved stuff */</div><div class='del'>-	imm_command |= (unsigned long) (IM_ABORT_IMM_CMD);</div><div class='del'>-	/* must wait for attention reg not busy */</div><div class='del'>-	/* FIXME - timeout, politeness */</div><div class='del'>-	while (1) {</div><div class='del'>-		if (!(inb(IM_STAT_REG(shpnt)) &amp; IM_BUSY))</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	/* write registers and enable system interrupts */</div><div class='del'>-	outl(imm_command, IM_CMD_REG(shpnt));</div><div class='del'>-	outb(IM_IMM_CMD | ldn, IM_ATTN_REG(shpnt));</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-	printk("IBM MCA SCSI: Abort queued to adapter...\n");</div><div class='del'>-#endif</div><div class='del'>-	spin_unlock_irq(shpnt-&gt;host_lock);</div><div class='del'>-	while (!cmd-&gt;SCp.Status)</div><div class='del'>-		yield();</div><div class='del'>-	spin_lock_irq(shpnt-&gt;host_lock);</div><div class='del'>-	cmd-&gt;scsi_done = saved_done;</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-	printk("IBM MCA SCSI: Abort returned with adapter response...\n");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/*if abort went well, call saved done, then return success or error */</div><div class='del'>-	if (cmd-&gt;result == (DID_ABORT &lt;&lt; 16)) </div><div class='del'>-	{</div><div class='del'>-		cmd-&gt;result |= DID_ABORT &lt;&lt; 16;</div><div class='del'>-		if (cmd-&gt;scsi_done)</div><div class='del'>-			(cmd-&gt;scsi_done) (cmd);</div><div class='del'>-		ld(shpnt)[ldn].cmd = NULL;</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-		printk("IBM MCA SCSI: Abort finished with success.\n");</div><div class='del'>-#endif</div><div class='del'>-		return SUCCESS;</div><div class='del'>-	} else {</div><div class='del'>-		cmd-&gt;result |= DID_NO_CONNECT &lt;&lt; 16;</div><div class='del'>-		if (cmd-&gt;scsi_done)</div><div class='del'>-			(cmd-&gt;scsi_done) (cmd);</div><div class='del'>-		ld(shpnt)[ldn].cmd = NULL;</div><div class='del'>-#ifdef IM_DEBUG_PROBE</div><div class='del'>-		printk("IBM MCA SCSI: Abort failed.\n");</div><div class='del'>-#endif</div><div class='del'>-		return FAILED;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ibmmca_abort(Scsi_Cmnd * cmd)</div><div class='del'>-{</div><div class='del'>-	struct Scsi_Host *shpnt = cmd-&gt;device-&gt;host;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(shpnt-&gt;host_lock);</div><div class='del'>-	rc = __ibmmca_abort(cmd);</div><div class='del'>-	spin_unlock_irq(shpnt-&gt;host_lock);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __ibmmca_host_reset(Scsi_Cmnd * cmd)</div><div class='del'>-{</div><div class='del'>-	struct Scsi_Host *shpnt;</div><div class='del'>-	Scsi_Cmnd *cmd_aid;</div><div class='del'>-	int ticks, i;</div><div class='del'>-	unsigned long imm_command;</div><div class='del'>-</div><div class='del'>-	BUG_ON(cmd == NULL);</div><div class='del'>-</div><div class='del'>-	ticks = IM_RESET_DELAY * HZ;</div><div class='del'>-	shpnt = cmd-&gt;device-&gt;host;</div><div class='del'>-</div><div class='del'>-	if (local_checking_phase_flag(shpnt)) {</div><div class='del'>-		printk(KERN_WARNING "IBM MCA SCSI: unable to reset while checking devices.\n");</div><div class='del'>-		return FAILED;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* issue reset immediate command to subsystem, and wait for interrupt */</div><div class='del'>-	printk("IBM MCA SCSI: resetting all devices.\n");</div><div class='del'>-	reset_status(shpnt) = IM_RESET_IN_PROGRESS;</div><div class='del'>-	last_scsi_command(shpnt)[0xf] = IM_RESET_IMM_CMD;</div><div class='del'>-	last_scsi_type(shpnt)[0xf] = IM_IMM_CMD;</div><div class='del'>-	imm_command = inl(IM_CMD_REG(shpnt));</div><div class='del'>-	imm_command &amp;= (unsigned long) (0xffff0000);	/* mask reserved stuff */</div><div class='del'>-	imm_command |= (unsigned long) (IM_RESET_IMM_CMD);</div><div class='del'>-	/* must wait for attention reg not busy */</div><div class='del'>-	while (1) {</div><div class='del'>-		if (!(inb(IM_STAT_REG(shpnt)) &amp; IM_BUSY))</div><div class='del'>-			break;</div><div class='del'>-		spin_unlock_irq(shpnt-&gt;host_lock);</div><div class='del'>-		yield();</div><div class='del'>-		spin_lock_irq(shpnt-&gt;host_lock);</div><div class='del'>-	}</div><div class='del'>-	/*write registers and enable system interrupts */</div><div class='del'>-	outl(imm_command, IM_CMD_REG(shpnt));</div><div class='del'>-	outb(IM_IMM_CMD | 0xf, IM_ATTN_REG(shpnt));</div><div class='del'>-	/* wait for interrupt finished or intr_stat register to be set, as the</div><div class='del'>-	 * interrupt will not be executed, while we are in here! */</div><div class='del'>-	 </div><div class='del'>-	/* FIXME: This is really really icky we so want a sleeping version of this ! */</div><div class='del'>-	while (reset_status(shpnt) == IM_RESET_IN_PROGRESS &amp;&amp; --ticks &amp;&amp; ((inb(IM_INTR_REG(shpnt)) &amp; 0x8f) != 0x8f)) {</div><div class='del'>-		udelay((1 + 999 / HZ) * 1000);</div><div class='del'>-		barrier();</div><div class='del'>-	}</div><div class='del'>-	/* if reset did not complete, just return an error */</div><div class='del'>-	if (!ticks) {</div><div class='del'>-		printk(KERN_ERR "IBM MCA SCSI: reset did not complete within %d seconds.\n", IM_RESET_DELAY);</div><div class='del'>-		reset_status(shpnt) = IM_RESET_FINISHED_FAIL;</div><div class='del'>-		return FAILED;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((inb(IM_INTR_REG(shpnt)) &amp; 0x8f) == 0x8f) {</div><div class='del'>-		/* analysis done by this routine and not by the intr-routine */</div><div class='del'>-		if (inb(IM_INTR_REG(shpnt)) == 0xaf)</div><div class='del'>-			reset_status(shpnt) = IM_RESET_FINISHED_OK_NO_INT;</div><div class='del'>-		else if (inb(IM_INTR_REG(shpnt)) == 0xcf)</div><div class='del'>-			reset_status(shpnt) = IM_RESET_FINISHED_FAIL;</div><div class='del'>-		else		/* failed, 4get it */</div><div class='del'>-			reset_status(shpnt) = IM_RESET_NOT_IN_PROGRESS_NO_INT;</div><div class='del'>-		outb(IM_EOI | 0xf, IM_ATTN_REG(shpnt));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* if reset failed, just return an error */</div><div class='del'>-	if (reset_status(shpnt) == IM_RESET_FINISHED_FAIL) {</div><div class='del'>-		printk(KERN_ERR "IBM MCA SCSI: reset failed.\n");</div><div class='del'>-		return FAILED;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* so reset finished ok - call outstanding done's, and return success */</div><div class='del'>-	printk(KERN_INFO "IBM MCA SCSI: Reset successfully completed.\n");</div><div class='del'>-	for (i = 0; i &lt; MAX_LOG_DEV; i++) {</div><div class='del'>-		cmd_aid = ld(shpnt)[i].cmd;</div><div class='del'>-		if (cmd_aid &amp;&amp; cmd_aid-&gt;scsi_done) {</div><div class='del'>-			ld(shpnt)[i].cmd = NULL;</div><div class='del'>-			cmd_aid-&gt;result = DID_RESET &lt;&lt; 16;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return SUCCESS;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ibmmca_host_reset(Scsi_Cmnd * cmd)</div><div class='del'>-{</div><div class='del'>-	struct Scsi_Host *shpnt = cmd-&gt;device-&gt;host;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(shpnt-&gt;host_lock);</div><div class='del'>-	rc = __ibmmca_host_reset(cmd);</div><div class='del'>-	spin_unlock_irq(shpnt-&gt;host_lock);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ibmmca_biosparam(struct scsi_device *sdev, struct block_device *bdev, sector_t capacity, int *info)</div><div class='del'>-{</div><div class='del'>-	int size = capacity;</div><div class='del'>-	info[0] = 64;</div><div class='del'>-	info[1] = 32;</div><div class='del'>-	info[2] = size / (info[0] * info[1]);</div><div class='del'>-	if (info[2] &gt;= 1024) {</div><div class='del'>-		info[0] = 128;</div><div class='del'>-		info[1] = 63;</div><div class='del'>-		info[2] = size / (info[0] * info[1]);</div><div class='del'>-		if (info[2] &gt;= 1024) {</div><div class='del'>-			info[0] = 255;</div><div class='del'>-			info[1] = 63;</div><div class='del'>-			info[2] = size / (info[0] * info[1]);</div><div class='del'>-			if (info[2] &gt;= 1024)</div><div class='del'>-				info[2] = 1023;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* calculate percentage of total accesses on a ldn */</div><div class='del'>-static int ldn_access_load(struct Scsi_Host *shpnt, int ldn)</div><div class='del'>-{</div><div class='del'>-	if (IBM_DS(shpnt).total_accesses == 0)</div><div class='del'>-		return (0);</div><div class='del'>-	if (IBM_DS(shpnt).ldn_access[ldn] == 0)</div><div class='del'>-		return (0);</div><div class='del'>-	return (IBM_DS(shpnt).ldn_access[ldn] * 100) / IBM_DS(shpnt).total_accesses;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* calculate total amount of r/w-accesses */</div><div class='del'>-static int ldn_access_total_read_write(struct Scsi_Host *shpnt)</div><div class='del'>-{</div><div class='del'>-	int a;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	a = 0;</div><div class='del'>-	for (i = 0; i &lt;= MAX_LOG_DEV; i++)</div><div class='del'>-		a += IBM_DS(shpnt).ldn_read_access[i] + IBM_DS(shpnt).ldn_write_access[i];</div><div class='del'>-	return (a);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ldn_access_total_inquiry(struct Scsi_Host *shpnt)</div><div class='del'>-{</div><div class='del'>-	int a;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	a = 0;</div><div class='del'>-	for (i = 0; i &lt;= MAX_LOG_DEV; i++)</div><div class='del'>-		a += IBM_DS(shpnt).ldn_inquiry_access[i];</div><div class='del'>-	return (a);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ldn_access_total_modeselect(struct Scsi_Host *shpnt)</div><div class='del'>-{</div><div class='del'>-	int a;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	a = 0;</div><div class='del'>-	for (i = 0; i &lt;= MAX_LOG_DEV; i++)</div><div class='del'>-		a += IBM_DS(shpnt).ldn_modeselect_access[i];</div><div class='del'>-	return (a);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* routine to display info in the proc-fs-structure (a deluxe feature) */</div><div class='del'>-static int ibmmca_proc_info(struct Scsi_Host *shpnt, char *buffer, char **start, off_t offset, int length, int inout)</div><div class='del'>-{</div><div class='del'>-	int len = 0;</div><div class='del'>-	int i, id, lun;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int max_pun;</div><div class='del'>-</div><div class='del'>-	</div><div class='del'>-	spin_lock_irqsave(shpnt-&gt;host_lock, flags);	/* Check it */</div><div class='del'>-</div><div class='del'>-	max_pun = subsystem_maxid(shpnt);</div><div class='del'>-</div><div class='del'>-	len += sprintf(buffer + len, "\n             IBM-SCSI-Subsystem-Linux-Driver, Version %s\n\n\n", IBMMCA_SCSI_DRIVER_VERSION);</div><div class='del'>-	len += sprintf(buffer + len, " SCSI Access-Statistics:\n");</div><div class='del'>-	len += sprintf(buffer + len, "               Device Scanning Order....: %s\n", (ibm_ansi_order) ? "IBM/ANSI" : "New Industry Standard");</div><div class='del'>-#ifdef CONFIG_SCSI_MULTI_LUN</div><div class='del'>-	len += sprintf(buffer + len, "               Multiple LUN probing.....: Yes\n");</div><div class='del'>-#else</div><div class='del'>-	len += sprintf(buffer + len, "               Multiple LUN probing.....: No\n");</div><div class='del'>-#endif</div><div class='del'>-	len += sprintf(buffer + len, "               This Hostnumber..........: %d\n", shpnt-&gt;host_no);</div><div class='del'>-	len += sprintf(buffer + len, "               Base I/O-Port............: 0x%x\n", (unsigned int) (IM_CMD_REG(shpnt)));</div><div class='del'>-	len += sprintf(buffer + len, "               (Shared) IRQ.............: %d\n", IM_IRQ);</div><div class='del'>-	len += sprintf(buffer + len, "               Total Interrupts.........: %d\n", IBM_DS(shpnt).total_interrupts);</div><div class='del'>-	len += sprintf(buffer + len, "               Total SCSI Accesses......: %d\n", IBM_DS(shpnt).total_accesses);</div><div class='del'>-	len += sprintf(buffer + len, "               Total short SCBs.........: %d\n", IBM_DS(shpnt).scbs);</div><div class='del'>-	len += sprintf(buffer + len, "               Total long SCBs..........: %d\n", IBM_DS(shpnt).long_scbs);</div><div class='del'>-	len += sprintf(buffer + len, "                 Total SCSI READ/WRITE..: %d\n", ldn_access_total_read_write(shpnt));</div><div class='del'>-	len += sprintf(buffer + len, "                 Total SCSI Inquiries...: %d\n", ldn_access_total_inquiry(shpnt));</div><div class='del'>-	len += sprintf(buffer + len, "                 Total SCSI Modeselects.: %d\n", ldn_access_total_modeselect(shpnt));</div><div class='del'>-	len += sprintf(buffer + len, "                 Total SCSI other cmds..: %d\n", IBM_DS(shpnt).total_accesses - ldn_access_total_read_write(shpnt)</div><div class='del'>-		       - ldn_access_total_modeselect(shpnt)</div><div class='del'>-		       - ldn_access_total_inquiry(shpnt));</div><div class='del'>-	len += sprintf(buffer + len, "               Total SCSI command fails.: %d\n\n", IBM_DS(shpnt).total_errors);</div><div class='del'>-	len += sprintf(buffer + len, " Logical-Device-Number (LDN) Access-Statistics:\n");</div><div class='del'>-	len += sprintf(buffer + len, "         LDN | Accesses [%%] |   READ    |   WRITE   | ASSIGNMENTS\n");</div><div class='del'>-	len += sprintf(buffer + len, "        -----|--------------|-----------|-----------|--------------\n");</div><div class='del'>-	for (i = 0; i &lt;= MAX_LOG_DEV; i++)</div><div class='del'>-		len += sprintf(buffer + len, "         %2X  |    %3d       |  %8d |  %8d | %8d\n", i, ldn_access_load(shpnt, i), IBM_DS(shpnt).ldn_read_access[i], IBM_DS(shpnt).ldn_write_access[i], IBM_DS(shpnt).ldn_assignments[i]);</div><div class='del'>-	len += sprintf(buffer + len, "        -----------------------------------------------------------\n\n");</div><div class='del'>-	len += sprintf(buffer + len, " Dynamical-LDN-Assignment-Statistics:\n");</div><div class='del'>-	len += sprintf(buffer + len, "               Number of physical SCSI-devices..: %d (+ Adapter)\n", IBM_DS(shpnt).total_scsi_devices);</div><div class='del'>-	len += sprintf(buffer + len, "               Dynamical Assignment necessary...: %s\n", IBM_DS(shpnt).dyn_flag ? "Yes" : "No ");</div><div class='del'>-	len += sprintf(buffer + len, "               Next LDN to be assigned..........: 0x%x\n", next_ldn(shpnt));</div><div class='del'>-	len += sprintf(buffer + len, "               Dynamical assignments done yet...: %d\n", IBM_DS(shpnt).dynamical_assignments);</div><div class='del'>-	len += sprintf(buffer + len, "\n Current SCSI-Device-Mapping:\n");</div><div class='del'>-	len += sprintf(buffer + len, "        Physical SCSI-Device Map               Logical SCSI-Device Map\n");</div><div class='del'>-	len += sprintf(buffer + len, "    ID\\LUN  0  1  2  3  4  5  6  7       ID\\LUN  0  1  2  3  4  5  6  7\n");</div><div class='del'>-	for (id = 0; id &lt; max_pun; id++) {</div><div class='del'>-		len += sprintf(buffer + len, "    %2d     ", id);</div><div class='del'>-		for (lun = 0; lun &lt; 8; lun++)</div><div class='del'>-			len += sprintf(buffer + len, "%2s ", ti_p(get_scsi(shpnt)[id][lun]));</div><div class='del'>-		len += sprintf(buffer + len, "      %2d     ", id);</div><div class='del'>-		for (lun = 0; lun &lt; 8; lun++)</div><div class='del'>-			len += sprintf(buffer + len, "%2s ", ti_l(get_ldn(shpnt)[id][lun]));</div><div class='del'>-		len += sprintf(buffer + len, "\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	len += sprintf(buffer + len, "(A = IBM-Subsystem, D = Harddisk, T = Tapedrive, P = Processor, W = WORM,\n");</div><div class='del'>-	len += sprintf(buffer + len, " R = CD-ROM, S = Scanner, M = MO-Drive, C = Medium-Changer, + = unprovided LUN,\n");</div><div class='del'>-	len += sprintf(buffer + len, " - = nothing found, nothing assigned or unprobed LUN)\n\n");</div><div class='del'>-</div><div class='del'>-	*start = buffer + offset;</div><div class='del'>-	len -= offset;</div><div class='del'>-	if (len &gt; length)</div><div class='del'>-		len = length;</div><div class='del'>-	spin_unlock_irqrestore(shpnt-&gt;host_lock, flags);</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int option_setup(char *str)</div><div class='del'>-{</div><div class='del'>-	int ints[IM_MAX_HOSTS];</div><div class='del'>-	char *cur = str;</div><div class='del'>-	int i = 1;</div><div class='del'>-</div><div class='del'>-	while (cur &amp;&amp; isdigit(*cur) &amp;&amp; i &lt; IM_MAX_HOSTS) {</div><div class='del'>-		ints[i++] = simple_strtoul(cur, NULL, 0);</div><div class='del'>-		if ((cur = strchr(cur, ',')) != NULL)</div><div class='del'>-			cur++;</div><div class='del'>-	}</div><div class='del'>-	ints[0] = i - 1;</div><div class='del'>-	internal_ibmmca_scsi_setup(cur, ints);</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__setup("ibmmcascsi=", option_setup);</div><div class='del'>-</div><div class='del'>-static struct mca_driver ibmmca_driver = {</div><div class='del'>-	.id_table = ibmmca_id_table,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name	= "ibmmca",</div><div class='del'>-		.bus	= &amp;mca_bus_type,</div><div class='del'>-		.probe	= ibmmca_probe,</div><div class='del'>-		.remove	= __devexit_p(ibmmca_remove),</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init ibmmca_init(void)</div><div class='del'>-{</div><div class='del'>-#ifdef MODULE</div><div class='del'>-	/* If the driver is run as module, read from conf.modules or cmd-line */</div><div class='del'>-	if (boot_options)</div><div class='del'>-		option_setup(boot_options);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	return mca_register_driver_integrated(&amp;ibmmca_driver, MCA_INTEGSCSI);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ibmmca_exit(void)</div><div class='del'>-{</div><div class='del'>-	mca_unregister_driver(&amp;ibmmca_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(ibmmca_init);</div><div class='del'>-module_exit(ibmmca_exit);</div><div class='head'>diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c<br/>index e002cd466e9a..467dc38246f9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/ipr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/ipr.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/ipr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/ipr.c</a></div><div class='hunk'>@@ -4549,8 +4549,12 @@ static int ipr_ata_slave_alloc(struct scsi_device *sdev)</div><div class='ctx'> 	ENTER;</div><div class='ctx'> 	if (sdev-&gt;sdev_target)</div><div class='ctx'> 		sata_port = sdev-&gt;sdev_target-&gt;hostdata;</div><div class='del'>-	if (sata_port)</div><div class='add'>+	if (sata_port) {</div><div class='ctx'> 		rc = ata_sas_port_init(sata_port-&gt;ap);</div><div class='add'>+		if (rc == 0)</div><div class='add'>+			rc = ata_sas_sync_probe(sata_port-&gt;ap);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		ipr_slave_destroy(sdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/isci/host.c b/drivers/scsi/isci/host.c<br/>index d4bf9c12ecd4..45385f531649 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/host.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/host.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/host.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/host.c</a></div><div class='hunk'>@@ -192,22 +192,27 @@ static bool sci_controller_completion_queue_has_entries(struct isci_host *ihost)</div><div class='ctx'> </div><div class='ctx'> static bool sci_controller_isr(struct isci_host *ihost)</div><div class='ctx'> {</div><div class='del'>-	if (sci_controller_completion_queue_has_entries(ihost)) {</div><div class='add'>+	if (sci_controller_completion_queue_has_entries(ihost))</div><div class='ctx'> 		return true;</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * we have a spurious interrupt it could be that we have already</div><div class='del'>-		 * emptied the completion queue from a previous interrupt */</div><div class='del'>-		writel(SMU_ISR_COMPLETION, &amp;ihost-&gt;smu_registers-&gt;interrupt_status);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * There is a race in the hardware that could cause us not to be notified</div><div class='del'>-		 * of an interrupt completion if we do not take this step.  We will mask</div><div class='del'>-		 * then unmask the interrupts so if there is another interrupt pending</div><div class='del'>-		 * the clearing of the interrupt source we get the next interrupt message. */</div><div class='add'>+	/* we have a spurious interrupt it could be that we have already</div><div class='add'>+	 * emptied the completion queue from a previous interrupt</div><div class='add'>+	 * FIXME: really!?</div><div class='add'>+	 */</div><div class='add'>+	writel(SMU_ISR_COMPLETION, &amp;ihost-&gt;smu_registers-&gt;interrupt_status);</div><div class='add'>+</div><div class='add'>+	/* There is a race in the hardware that could cause us not to be</div><div class='add'>+	 * notified of an interrupt completion if we do not take this</div><div class='add'>+	 * step.  We will mask then unmask the interrupts so if there is</div><div class='add'>+	 * another interrupt pending the clearing of the interrupt</div><div class='add'>+	 * source we get the next interrupt message.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock(&amp;ihost-&gt;scic_lock);</div><div class='add'>+	if (test_bit(IHOST_IRQ_ENABLED, &amp;ihost-&gt;flags)) {</div><div class='ctx'> 		writel(0xFF000000, &amp;ihost-&gt;smu_registers-&gt;interrupt_mask);</div><div class='ctx'> 		writel(0, &amp;ihost-&gt;smu_registers-&gt;interrupt_mask);</div><div class='ctx'> 	}</div><div class='add'>+	spin_unlock(&amp;ihost-&gt;scic_lock);</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='hunk'>@@ -642,7 +647,6 @@ static void isci_host_start_complete(struct isci_host *ihost, enum sci_status co</div><div class='ctx'> 	if (completion_status != SCI_SUCCESS)</div><div class='ctx'> 		dev_info(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"controller start timed out, continuing...\n");</div><div class='del'>-	isci_host_change_state(ihost, isci_ready);</div><div class='ctx'> 	clear_bit(IHOST_START_PENDING, &amp;ihost-&gt;flags);</div><div class='ctx'> 	wake_up(&amp;ihost-&gt;eventq);</div><div class='ctx'> }</div><div class='hunk'>@@ -657,12 +661,7 @@ int isci_host_scan_finished(struct Scsi_Host *shost, unsigned long time)</div><div class='ctx'> </div><div class='ctx'> 	sas_drain_work(ha);</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-		"%s: ihost-&gt;status = %d, time = %ld\n",</div><div class='del'>-		 __func__, isci_host_get_state(ihost), time);</div><div class='del'>-</div><div class='ctx'> 	return 1;</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -704,14 +703,15 @@ static u32 sci_controller_get_suggested_start_timeout(struct isci_host *ihost)</div><div class='ctx'> </div><div class='ctx'> static void sci_controller_enable_interrupts(struct isci_host *ihost)</div><div class='ctx'> {</div><div class='del'>-	BUG_ON(ihost-&gt;smu_registers == NULL);</div><div class='add'>+	set_bit(IHOST_IRQ_ENABLED, &amp;ihost-&gt;flags);</div><div class='ctx'> 	writel(0, &amp;ihost-&gt;smu_registers-&gt;interrupt_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void sci_controller_disable_interrupts(struct isci_host *ihost)</div><div class='ctx'> {</div><div class='del'>-	BUG_ON(ihost-&gt;smu_registers == NULL);</div><div class='add'>+	clear_bit(IHOST_IRQ_ENABLED, &amp;ihost-&gt;flags);</div><div class='ctx'> 	writel(0xffffffff, &amp;ihost-&gt;smu_registers-&gt;interrupt_mask);</div><div class='add'>+	readl(&amp;ihost-&gt;smu_registers-&gt;interrupt_mask); /* flush */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sci_controller_enable_port_task_scheduler(struct isci_host *ihost)</div><div class='hunk'>@@ -822,7 +822,7 @@ static void sci_controller_initialize_unsolicited_frame_queue(struct isci_host *</div><div class='ctx'> 	       &amp;ihost-&gt;scu_registers-&gt;sdma.unsolicited_frame_put_pointer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sci_controller_transition_to_ready(struct isci_host *ihost, enum sci_status status)</div><div class='add'>+void sci_controller_transition_to_ready(struct isci_host *ihost, enum sci_status status)</div><div class='ctx'> {</div><div class='ctx'> 	if (ihost-&gt;sm.current_state_id == SCIC_STARTING) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -849,6 +849,7 @@ static bool is_phy_starting(struct isci_phy *iphy)</div><div class='ctx'> 	case SCI_PHY_SUB_AWAIT_SATA_POWER:</div><div class='ctx'> 	case SCI_PHY_SUB_AWAIT_SATA_PHY_EN:</div><div class='ctx'> 	case SCI_PHY_SUB_AWAIT_SATA_SPEED_EN:</div><div class='add'>+	case SCI_PHY_SUB_AWAIT_OSSP_EN:</div><div class='ctx'> 	case SCI_PHY_SUB_AWAIT_SIG_FIS_UF:</div><div class='ctx'> 	case SCI_PHY_SUB_FINAL:</div><div class='ctx'> 		return true;</div><div class='hunk'>@@ -857,6 +858,39 @@ static bool is_phy_starting(struct isci_phy *iphy)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool is_controller_start_complete(struct isci_host *ihost)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SCI_MAX_PHYS; i++) {</div><div class='add'>+		struct isci_phy *iphy = &amp;ihost-&gt;phys[i];</div><div class='add'>+		u32 state = iphy-&gt;sm.current_state_id;</div><div class='add'>+</div><div class='add'>+		/* in apc mode we need to check every phy, in</div><div class='add'>+		 * mpc mode we only need to check phys that have</div><div class='add'>+		 * been configured into a port</div><div class='add'>+		 */</div><div class='add'>+		if (is_port_config_apc(ihost))</div><div class='add'>+			/* pass */;</div><div class='add'>+		else if (!phy_get_non_dummy_port(iphy))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* The controller start operation is complete iff:</div><div class='add'>+		 * - all links have been given an opportunity to start</div><div class='add'>+		 * - have no indication of a connected device</div><div class='add'>+		 * - have an indication of a connected device and it has</div><div class='add'>+		 *   finished the link training process.</div><div class='add'>+		 */</div><div class='add'>+		if ((iphy-&gt;is_in_link_training == false &amp;&amp; state == SCI_PHY_INITIAL) ||</div><div class='add'>+		    (iphy-&gt;is_in_link_training == false &amp;&amp; state == SCI_PHY_STOPPED) ||</div><div class='add'>+		    (iphy-&gt;is_in_link_training == true &amp;&amp; is_phy_starting(iphy)) ||</div><div class='add'>+		    (ihost-&gt;port_agent.phy_ready_mask != ihost-&gt;port_agent.phy_configured_mask))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * sci_controller_start_next_phy - start phy</div><div class='ctx'>  * @scic: controller</div><div class='hunk'>@@ -877,36 +911,7 @@ static enum sci_status sci_controller_start_next_phy(struct isci_host *ihost)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='ctx'> 	if (ihost-&gt;next_phy_to_start &gt;= SCI_MAX_PHYS) {</div><div class='del'>-		bool is_controller_start_complete = true;</div><div class='del'>-		u32 state;</div><div class='del'>-		u8 index;</div><div class='del'>-</div><div class='del'>-		for (index = 0; index &lt; SCI_MAX_PHYS; index++) {</div><div class='del'>-			iphy = &amp;ihost-&gt;phys[index];</div><div class='del'>-			state = iphy-&gt;sm.current_state_id;</div><div class='del'>-</div><div class='del'>-			if (!phy_get_non_dummy_port(iphy))</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			/* The controller start operation is complete iff:</div><div class='del'>-			 * - all links have been given an opportunity to start</div><div class='del'>-			 * - have no indication of a connected device</div><div class='del'>-			 * - have an indication of a connected device and it has</div><div class='del'>-			 *   finished the link training process.</div><div class='del'>-			 */</div><div class='del'>-			if ((iphy-&gt;is_in_link_training == false &amp;&amp; state == SCI_PHY_INITIAL) ||</div><div class='del'>-			    (iphy-&gt;is_in_link_training == false &amp;&amp; state == SCI_PHY_STOPPED) ||</div><div class='del'>-			    (iphy-&gt;is_in_link_training == true &amp;&amp; is_phy_starting(iphy)) ||</div><div class='del'>-			    (ihost-&gt;port_agent.phy_ready_mask != ihost-&gt;port_agent.phy_configured_mask)) {</div><div class='del'>-				is_controller_start_complete = false;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * The controller has successfully finished the start process.</div><div class='del'>-		 * Inform the SCI Core user and transition to the READY state. */</div><div class='del'>-		if (is_controller_start_complete == true) {</div><div class='add'>+		if (is_controller_start_complete(ihost)) {</div><div class='ctx'> 			sci_controller_transition_to_ready(ihost, SCI_SUCCESS);</div><div class='ctx'> 			sci_del_timer(&amp;ihost-&gt;phy_timer);</div><div class='ctx'> 			ihost-&gt;phy_startup_timer_pending = false;</div><div class='hunk'>@@ -987,9 +992,8 @@ static enum sci_status sci_controller_start(struct isci_host *ihost,</div><div class='ctx'> 	u16 index;</div><div class='ctx'> </div><div class='ctx'> 	if (ihost-&gt;sm.current_state_id != SCIC_INITIALIZED) {</div><div class='del'>-		dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			 "SCIC Controller start operation requested in "</div><div class='del'>-			 "invalid state\n");</div><div class='add'>+		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "%s invalid state: %d\n",</div><div class='add'>+			 __func__, ihost-&gt;sm.current_state_id);</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1053,9 +1057,8 @@ void isci_host_scan_start(struct Scsi_Host *shost)</div><div class='ctx'> 	spin_unlock_irq(&amp;ihost-&gt;scic_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void isci_host_stop_complete(struct isci_host *ihost, enum sci_status completion_status)</div><div class='add'>+static void isci_host_stop_complete(struct isci_host *ihost)</div><div class='ctx'> {</div><div class='del'>-	isci_host_change_state(ihost, isci_stopped);</div><div class='ctx'> 	sci_controller_disable_interrupts(ihost);</div><div class='ctx'> 	clear_bit(IHOST_STOP_PENDING, &amp;ihost-&gt;flags);</div><div class='ctx'> 	wake_up(&amp;ihost-&gt;eventq);</div><div class='hunk'>@@ -1074,6 +1077,32 @@ static void sci_controller_completion_handler(struct isci_host *ihost)</div><div class='ctx'> 	writel(0, &amp;ihost-&gt;smu_registers-&gt;interrupt_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ireq_done(struct isci_host *ihost, struct isci_request *ireq, struct sas_task *task)</div><div class='add'>+{</div><div class='add'>+	task-&gt;lldd_task = NULL;</div><div class='add'>+	if (!test_bit(IREQ_ABORT_PATH_ACTIVE, &amp;ireq-&gt;flags) &amp;&amp;</div><div class='add'>+	    !(task-&gt;task_state_flags &amp; SAS_TASK_STATE_ABORTED)) {</div><div class='add'>+		if (test_bit(IREQ_COMPLETE_IN_TARGET, &amp;ireq-&gt;flags)) {</div><div class='add'>+			/* Normal notification (task_done) */</div><div class='add'>+			dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+				"%s: Normal - ireq/task = %p/%p\n",</div><div class='add'>+				__func__, ireq, task);</div><div class='add'>+</div><div class='add'>+			task-&gt;task_done(task);</div><div class='add'>+		} else {</div><div class='add'>+			dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+				"%s: Error - ireq/task = %p/%p\n",</div><div class='add'>+				__func__, ireq, task);</div><div class='add'>+</div><div class='add'>+			sas_task_abort(task);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (test_and_clear_bit(IREQ_ABORT_PATH_ACTIVE, &amp;ireq-&gt;flags))</div><div class='add'>+		wake_up_all(&amp;ihost-&gt;eventq);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(IREQ_NO_AUTO_FREE_TAG, &amp;ireq-&gt;flags))</div><div class='add'>+		isci_free_tag(ihost, ireq-&gt;io_tag);</div><div class='add'>+}</div><div class='ctx'> /**</div><div class='ctx'>  * isci_host_completion_routine() - This function is the delayed service</div><div class='ctx'>  *    routine that calls the sci core library's completion handler. It's</div><div class='hunk'>@@ -1082,107 +1111,15 @@ static void sci_controller_completion_handler(struct isci_host *ihost)</div><div class='ctx'>  * @data: This parameter specifies the ISCI host object</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-static void isci_host_completion_routine(unsigned long data)</div><div class='add'>+void isci_host_completion_routine(unsigned long data)</div><div class='ctx'> {</div><div class='ctx'> 	struct isci_host *ihost = (struct isci_host *)data;</div><div class='del'>-	struct list_head    completed_request_list;</div><div class='del'>-	struct list_head    errored_request_list;</div><div class='del'>-	struct list_head    *current_position;</div><div class='del'>-	struct list_head    *next_position;</div><div class='del'>-	struct isci_request *request;</div><div class='del'>-	struct isci_request *next_request;</div><div class='del'>-	struct sas_task     *task;</div><div class='ctx'> 	u16 active;</div><div class='ctx'> </div><div class='del'>-	INIT_LIST_HEAD(&amp;completed_request_list);</div><div class='del'>-	INIT_LIST_HEAD(&amp;errored_request_list);</div><div class='del'>-</div><div class='ctx'> 	spin_lock_irq(&amp;ihost-&gt;scic_lock);</div><div class='del'>-</div><div class='ctx'> 	sci_controller_completion_handler(ihost);</div><div class='del'>-</div><div class='del'>-	/* Take the lists of completed I/Os from the host. */</div><div class='del'>-</div><div class='del'>-	list_splice_init(&amp;ihost-&gt;requests_to_complete,</div><div class='del'>-			 &amp;completed_request_list);</div><div class='del'>-</div><div class='del'>-	/* Take the list of errored I/Os from the host. */</div><div class='del'>-	list_splice_init(&amp;ihost-&gt;requests_to_errorback,</div><div class='del'>-			 &amp;errored_request_list);</div><div class='del'>-</div><div class='ctx'> 	spin_unlock_irq(&amp;ihost-&gt;scic_lock);</div><div class='ctx'> </div><div class='del'>-	/* Process any completions in the lists. */</div><div class='del'>-	list_for_each_safe(current_position, next_position,</div><div class='del'>-			   &amp;completed_request_list) {</div><div class='del'>-</div><div class='del'>-		request = list_entry(current_position, struct isci_request,</div><div class='del'>-				     completed_node);</div><div class='del'>-		task = isci_request_access_task(request);</div><div class='del'>-</div><div class='del'>-		/* Normal notification (task_done) */</div><div class='del'>-		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			"%s: Normal - request/task = %p/%p\n",</div><div class='del'>-			__func__,</div><div class='del'>-			request,</div><div class='del'>-			task);</div><div class='del'>-</div><div class='del'>-		/* Return the task to libsas */</div><div class='del'>-		if (task != NULL) {</div><div class='del'>-</div><div class='del'>-			task-&gt;lldd_task = NULL;</div><div class='del'>-			if (!(task-&gt;task_state_flags &amp; SAS_TASK_STATE_ABORTED)) {</div><div class='del'>-</div><div class='del'>-				/* If the task is already in the abort path,</div><div class='del'>-				* the task_done callback cannot be called.</div><div class='del'>-				*/</div><div class='del'>-				task-&gt;task_done(task);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		spin_lock_irq(&amp;ihost-&gt;scic_lock);</div><div class='del'>-		isci_free_tag(ihost, request-&gt;io_tag);</div><div class='del'>-		spin_unlock_irq(&amp;ihost-&gt;scic_lock);</div><div class='del'>-	}</div><div class='del'>-	list_for_each_entry_safe(request, next_request, &amp;errored_request_list,</div><div class='del'>-				 completed_node) {</div><div class='del'>-</div><div class='del'>-		task = isci_request_access_task(request);</div><div class='del'>-</div><div class='del'>-		/* Use sas_task_abort */</div><div class='del'>-		dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			 "%s: Error - request/task = %p/%p\n",</div><div class='del'>-			 __func__,</div><div class='del'>-			 request,</div><div class='del'>-			 task);</div><div class='del'>-</div><div class='del'>-		if (task != NULL) {</div><div class='del'>-</div><div class='del'>-			/* Put the task into the abort path if it's not there</div><div class='del'>-			 * already.</div><div class='del'>-			 */</div><div class='del'>-			if (!(task-&gt;task_state_flags &amp; SAS_TASK_STATE_ABORTED))</div><div class='del'>-				sas_task_abort(task);</div><div class='del'>-</div><div class='del'>-		} else {</div><div class='del'>-			/* This is a case where the request has completed with a</div><div class='del'>-			 * status such that it needed further target servicing,</div><div class='del'>-			 * but the sas_task reference has already been removed</div><div class='del'>-			 * from the request.  Since it was errored, it was not</div><div class='del'>-			 * being aborted, so there is nothing to do except free</div><div class='del'>-			 * it.</div><div class='del'>-			 */</div><div class='del'>-</div><div class='del'>-			spin_lock_irq(&amp;ihost-&gt;scic_lock);</div><div class='del'>-			/* Remove the request from the remote device's list</div><div class='del'>-			* of pending requests.</div><div class='del'>-			*/</div><div class='del'>-			list_del_init(&amp;request-&gt;dev_node);</div><div class='del'>-			isci_free_tag(ihost, request-&gt;io_tag);</div><div class='del'>-			spin_unlock_irq(&amp;ihost-&gt;scic_lock);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* the coalesence timeout doubles at each encoding step, so</div><div class='ctx'> 	 * update it based on the ilog2 value of the outstanding requests</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1213,9 +1150,8 @@ static void isci_host_completion_routine(unsigned long data)</div><div class='ctx'> static enum sci_status sci_controller_stop(struct isci_host *ihost, u32 timeout)</div><div class='ctx'> {</div><div class='ctx'> 	if (ihost-&gt;sm.current_state_id != SCIC_READY) {</div><div class='del'>-		dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			 "SCIC Controller stop operation requested in "</div><div class='del'>-			 "invalid state\n");</div><div class='add'>+		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "%s invalid state: %d\n",</div><div class='add'>+			 __func__, ihost-&gt;sm.current_state_id);</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1241,7 +1177,7 @@ static enum sci_status sci_controller_reset(struct isci_host *ihost)</div><div class='ctx'> 	switch (ihost-&gt;sm.current_state_id) {</div><div class='ctx'> 	case SCIC_RESET:</div><div class='ctx'> 	case SCIC_READY:</div><div class='del'>-	case SCIC_STOPPED:</div><div class='add'>+	case SCIC_STOPPING:</div><div class='ctx'> 	case SCIC_FAILED:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The reset operation is not a graceful cleanup, just</div><div class='hunk'>@@ -1250,13 +1186,50 @@ static enum sci_status sci_controller_reset(struct isci_host *ihost)</div><div class='ctx'> 		sci_change_state(&amp;ihost-&gt;sm, SCIC_RESETTING);</div><div class='ctx'> 		return SCI_SUCCESS;</div><div class='ctx'> 	default:</div><div class='del'>-		dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			 "SCIC Controller reset operation requested in "</div><div class='del'>-			 "invalid state\n");</div><div class='add'>+		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "%s invalid state: %d\n",</div><div class='add'>+			 __func__, ihost-&gt;sm.current_state_id);</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static enum sci_status sci_controller_stop_phys(struct isci_host *ihost)</div><div class='add'>+{</div><div class='add'>+	u32 index;</div><div class='add'>+	enum sci_status status;</div><div class='add'>+	enum sci_status phy_status;</div><div class='add'>+</div><div class='add'>+	status = SCI_SUCCESS;</div><div class='add'>+</div><div class='add'>+	for (index = 0; index &lt; SCI_MAX_PHYS; index++) {</div><div class='add'>+		phy_status = sci_phy_stop(&amp;ihost-&gt;phys[index]);</div><div class='add'>+</div><div class='add'>+		if (phy_status != SCI_SUCCESS &amp;&amp;</div><div class='add'>+		    phy_status != SCI_FAILURE_INVALID_STATE) {</div><div class='add'>+			status = SCI_FAILURE;</div><div class='add'>+</div><div class='add'>+			dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+				 "%s: Controller stop operation failed to stop "</div><div class='add'>+				 "phy %d because of status %d.\n",</div><div class='add'>+				 __func__,</div><div class='add'>+				 ihost-&gt;phys[index].phy_index, phy_status);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * isci_host_deinit - shutdown frame reception and dma</div><div class='add'>+ * @ihost: host to take down</div><div class='add'>+ *</div><div class='add'>+ * This is called in either the driver shutdown or the suspend path.  In</div><div class='add'>+ * the shutdown case libsas went through port teardown and normal device</div><div class='add'>+ * removal (i.e. physical links stayed up to service scsi_device removal</div><div class='add'>+ * commands).  In the suspend case we disable the hardware without</div><div class='add'>+ * notifying libsas of the link down events since we want libsas to</div><div class='add'>+ * remember the domain across the suspend/resume cycle</div><div class='add'>+ */</div><div class='ctx'> void isci_host_deinit(struct isci_host *ihost)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1265,17 +1238,6 @@ void isci_host_deinit(struct isci_host *ihost)</div><div class='ctx'> 	for (i = 0; i &lt; isci_gpio_count(ihost); i++)</div><div class='ctx'> 		writel(SGPIO_HW_CONTROL, &amp;ihost-&gt;scu_registers-&gt;peg0.sgpio.output_data_select[i]);</div><div class='ctx'> </div><div class='del'>-	isci_host_change_state(ihost, isci_stopping);</div><div class='del'>-	for (i = 0; i &lt; SCI_MAX_PORTS; i++) {</div><div class='del'>-		struct isci_port *iport = &amp;ihost-&gt;ports[i];</div><div class='del'>-		struct isci_remote_device *idev, *d;</div><div class='del'>-</div><div class='del'>-		list_for_each_entry_safe(idev, d, &amp;iport-&gt;remote_dev_list, node) {</div><div class='del'>-			if (test_bit(IDEV_ALLOCATED, &amp;idev-&gt;flags))</div><div class='del'>-				isci_remote_device_stop(ihost, idev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	set_bit(IHOST_STOP_PENDING, &amp;ihost-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;ihost-&gt;scic_lock);</div><div class='hunk'>@@ -1284,12 +1246,21 @@ void isci_host_deinit(struct isci_host *ihost)</div><div class='ctx'> </div><div class='ctx'> 	wait_for_stop(ihost);</div><div class='ctx'> </div><div class='add'>+	/* phy stop is after controller stop to allow port and device to</div><div class='add'>+	 * go idle before shutting down the phys, but the expectation is</div><div class='add'>+	 * that i/o has been shut off well before we reach this</div><div class='add'>+	 * function.</div><div class='add'>+	 */</div><div class='add'>+	sci_controller_stop_phys(ihost);</div><div class='add'>+</div><div class='ctx'> 	/* disable sgpio: where the above wait should give time for the</div><div class='ctx'> 	 * enclosure to sample the gpios going inactive</div><div class='ctx'> 	 */</div><div class='ctx'> 	writel(0, &amp;ihost-&gt;scu_registers-&gt;peg0.sgpio.interface_control);</div><div class='ctx'> </div><div class='add'>+	spin_lock_irq(&amp;ihost-&gt;scic_lock);</div><div class='ctx'> 	sci_controller_reset(ihost);</div><div class='add'>+	spin_unlock_irq(&amp;ihost-&gt;scic_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Cancel any/all outstanding port timers */</div><div class='ctx'> 	for (i = 0; i &lt; ihost-&gt;logical_port_entries; i++) {</div><div class='hunk'>@@ -1328,29 +1299,6 @@ static void __iomem *smu_base(struct isci_host *isci_host)</div><div class='ctx'> 	return pcim_iomap_table(pdev)[SCI_SMU_BAR * 2] + SCI_SMU_BAR_SIZE * id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void isci_user_parameters_get(struct sci_user_parameters *u)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; SCI_MAX_PHYS; i++) {</div><div class='del'>-		struct sci_phy_user_params *u_phy = &amp;u-&gt;phys[i];</div><div class='del'>-</div><div class='del'>-		u_phy-&gt;max_speed_generation = phy_gen;</div><div class='del'>-</div><div class='del'>-		/* we are not exporting these for now */</div><div class='del'>-		u_phy-&gt;align_insertion_frequency = 0x7f;</div><div class='del'>-		u_phy-&gt;in_connection_align_insertion_frequency = 0xff;</div><div class='del'>-		u_phy-&gt;notify_enable_spin_up_insertion_frequency = 0x33;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	u-&gt;stp_inactivity_timeout = stp_inactive_to;</div><div class='del'>-	u-&gt;ssp_inactivity_timeout = ssp_inactive_to;</div><div class='del'>-	u-&gt;stp_max_occupancy_timeout = stp_max_occ_to;</div><div class='del'>-	u-&gt;ssp_max_occupancy_timeout = ssp_max_occ_to;</div><div class='del'>-	u-&gt;no_outbound_task_timeout = no_outbound_task_to;</div><div class='del'>-	u-&gt;max_concurr_spinup = max_concurr_spinup;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void sci_controller_initial_state_enter(struct sci_base_state_machine *sm)</div><div class='ctx'> {</div><div class='ctx'> 	struct isci_host *ihost = container_of(sm, typeof(*ihost), sm);</div><div class='hunk'>@@ -1510,32 +1458,6 @@ static void sci_controller_ready_state_exit(struct sci_base_state_machine *sm)</div><div class='ctx'> 	sci_controller_set_interrupt_coalescence(ihost, 0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum sci_status sci_controller_stop_phys(struct isci_host *ihost)</div><div class='del'>-{</div><div class='del'>-	u32 index;</div><div class='del'>-	enum sci_status status;</div><div class='del'>-	enum sci_status phy_status;</div><div class='del'>-</div><div class='del'>-	status = SCI_SUCCESS;</div><div class='del'>-</div><div class='del'>-	for (index = 0; index &lt; SCI_MAX_PHYS; index++) {</div><div class='del'>-		phy_status = sci_phy_stop(&amp;ihost-&gt;phys[index]);</div><div class='del'>-</div><div class='del'>-		if (phy_status != SCI_SUCCESS &amp;&amp;</div><div class='del'>-		    phy_status != SCI_FAILURE_INVALID_STATE) {</div><div class='del'>-			status = SCI_FAILURE;</div><div class='del'>-</div><div class='del'>-			dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-				 "%s: Controller stop operation failed to stop "</div><div class='del'>-				 "phy %d because of status %d.\n",</div><div class='del'>-				 __func__,</div><div class='del'>-				 ihost-&gt;phys[index].phy_index, phy_status);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static enum sci_status sci_controller_stop_ports(struct isci_host *ihost)</div><div class='ctx'> {</div><div class='ctx'> 	u32 index;</div><div class='hunk'>@@ -1595,10 +1517,11 @@ static void sci_controller_stopping_state_enter(struct sci_base_state_machine *s</div><div class='ctx'> {</div><div class='ctx'> 	struct isci_host *ihost = container_of(sm, typeof(*ihost), sm);</div><div class='ctx'> </div><div class='del'>-	/* Stop all of the components for this controller */</div><div class='del'>-	sci_controller_stop_phys(ihost);</div><div class='del'>-	sci_controller_stop_ports(ihost);</div><div class='ctx'> 	sci_controller_stop_devices(ihost);</div><div class='add'>+	sci_controller_stop_ports(ihost);</div><div class='add'>+</div><div class='add'>+	if (!sci_controller_has_remote_devices_stopping(ihost))</div><div class='add'>+		isci_host_stop_complete(ihost);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sci_controller_stopping_state_exit(struct sci_base_state_machine *sm)</div><div class='hunk'>@@ -1624,6 +1547,9 @@ static void sci_controller_reset_hardware(struct isci_host *ihost)</div><div class='ctx'> </div><div class='ctx'> 	/* The write to the UFQGP clears the UFQPR */</div><div class='ctx'> 	writel(0, &amp;ihost-&gt;scu_registers-&gt;sdma.unsolicited_frame_get_pointer);</div><div class='add'>+</div><div class='add'>+	/* clear all interrupts */</div><div class='add'>+	writel(~SMU_INTERRUPT_STATUS_RESERVED_MASK, &amp;ihost-&gt;smu_registers-&gt;interrupt_status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sci_controller_resetting_state_enter(struct sci_base_state_machine *sm)</div><div class='hunk'>@@ -1655,59 +1581,9 @@ static const struct sci_base_state sci_controller_state_table[] = {</div><div class='ctx'> 		.enter_state = sci_controller_stopping_state_enter,</div><div class='ctx'> 		.exit_state = sci_controller_stopping_state_exit,</div><div class='ctx'> 	},</div><div class='del'>-	[SCIC_STOPPED] = {},</div><div class='ctx'> 	[SCIC_FAILED] = {}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void sci_controller_set_default_config_parameters(struct isci_host *ihost)</div><div class='del'>-{</div><div class='del'>-	/* these defaults are overridden by the platform / firmware */</div><div class='del'>-	u16 index;</div><div class='del'>-</div><div class='del'>-	/* Default to APC mode. */</div><div class='del'>-	ihost-&gt;oem_parameters.controller.mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;</div><div class='del'>-</div><div class='del'>-	/* Default to APC mode. */</div><div class='del'>-	ihost-&gt;oem_parameters.controller.max_concurr_spin_up = 1;</div><div class='del'>-</div><div class='del'>-	/* Default to no SSC operation. */</div><div class='del'>-	ihost-&gt;oem_parameters.controller.do_enable_ssc = false;</div><div class='del'>-</div><div class='del'>-	/* Default to short cables on all phys. */</div><div class='del'>-	ihost-&gt;oem_parameters.controller.cable_selection_mask = 0;</div><div class='del'>-</div><div class='del'>-	/* Initialize all of the port parameter information to narrow ports. */</div><div class='del'>-	for (index = 0; index &lt; SCI_MAX_PORTS; index++) {</div><div class='del'>-		ihost-&gt;oem_parameters.ports[index].phy_mask = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Initialize all of the phy parameter information. */</div><div class='del'>-	for (index = 0; index &lt; SCI_MAX_PHYS; index++) {</div><div class='del'>-		/* Default to 3G (i.e. Gen 2). */</div><div class='del'>-		ihost-&gt;user_parameters.phys[index].max_speed_generation =</div><div class='del'>-			SCIC_SDS_PARM_GEN2_SPEED;</div><div class='del'>-</div><div class='del'>-		/* the frequencies cannot be 0 */</div><div class='del'>-		ihost-&gt;user_parameters.phys[index].align_insertion_frequency = 0x7f;</div><div class='del'>-		ihost-&gt;user_parameters.phys[index].in_connection_align_insertion_frequency = 0xff;</div><div class='del'>-		ihost-&gt;user_parameters.phys[index].notify_enable_spin_up_insertion_frequency = 0x33;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Previous Vitesse based expanders had a arbitration issue that</div><div class='del'>-		 * is worked around by having the upper 32-bits of SAS address</div><div class='del'>-		 * with a value greater then the Vitesse company identifier.</div><div class='del'>-		 * Hence, usage of 0x5FCFFFFF. */</div><div class='del'>-		ihost-&gt;oem_parameters.phys[index].sas_address.low = 0x1 + ihost-&gt;id;</div><div class='del'>-		ihost-&gt;oem_parameters.phys[index].sas_address.high = 0x5FCFFFFF;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ihost-&gt;user_parameters.stp_inactivity_timeout = 5;</div><div class='del'>-	ihost-&gt;user_parameters.ssp_inactivity_timeout = 5;</div><div class='del'>-	ihost-&gt;user_parameters.stp_max_occupancy_timeout = 5;</div><div class='del'>-	ihost-&gt;user_parameters.ssp_max_occupancy_timeout = 20;</div><div class='del'>-	ihost-&gt;user_parameters.no_outbound_task_timeout = 2;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void controller_timeout(unsigned long data)</div><div class='ctx'> {</div><div class='ctx'> 	struct sci_timer *tmr = (struct sci_timer *)data;</div><div class='hunk'>@@ -1724,7 +1600,7 @@ static void controller_timeout(unsigned long data)</div><div class='ctx'> 		sci_controller_transition_to_ready(ihost, SCI_FAILURE_TIMEOUT);</div><div class='ctx'> 	else if (sm-&gt;current_state_id == SCIC_STOPPING) {</div><div class='ctx'> 		sci_change_state(sm, SCIC_FAILED);</div><div class='del'>-		isci_host_stop_complete(ihost, SCI_FAILURE_TIMEOUT);</div><div class='add'>+		isci_host_stop_complete(ihost);</div><div class='ctx'> 	} else	/* / @todo Now what do we want to do in this case? */</div><div class='ctx'> 		dev_err(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"%s: Controller timer fired when controller was not "</div><div class='hunk'>@@ -1764,9 +1640,6 @@ static enum sci_status sci_controller_construct(struct isci_host *ihost,</div><div class='ctx'> </div><div class='ctx'> 	sci_init_timer(&amp;ihost-&gt;timer, controller_timeout);</div><div class='ctx'> </div><div class='del'>-	/* Initialize the User and OEM parameters to default values. */</div><div class='del'>-	sci_controller_set_default_config_parameters(ihost);</div><div class='del'>-</div><div class='ctx'> 	return sci_controller_reset(ihost);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1846,27 +1719,6 @@ int sci_oem_parameters_validate(struct sci_oem_params *oem, u8 version)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum sci_status sci_oem_parameters_set(struct isci_host *ihost)</div><div class='del'>-{</div><div class='del'>-	u32 state = ihost-&gt;sm.current_state_id;</div><div class='del'>-	struct isci_pci_info *pci_info = to_pci_info(ihost-&gt;pdev);</div><div class='del'>-</div><div class='del'>-	if (state == SCIC_RESET ||</div><div class='del'>-	    state == SCIC_INITIALIZING ||</div><div class='del'>-	    state == SCIC_INITIALIZED) {</div><div class='del'>-		u8 oem_version = pci_info-&gt;orom ? pci_info-&gt;orom-&gt;hdr.version :</div><div class='del'>-			ISCI_ROM_VER_1_0;</div><div class='del'>-</div><div class='del'>-		if (sci_oem_parameters_validate(&amp;ihost-&gt;oem_parameters,</div><div class='del'>-						oem_version))</div><div class='del'>-			return SCI_FAILURE_INVALID_PARAMETER_VALUE;</div><div class='del'>-</div><div class='del'>-		return SCI_SUCCESS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return SCI_FAILURE_INVALID_STATE;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static u8 max_spin_up(struct isci_host *ihost)</div><div class='ctx'> {</div><div class='ctx'> 	if (ihost-&gt;user_parameters.max_concurr_spinup)</div><div class='hunk'>@@ -1914,7 +1766,7 @@ static void power_control_timeout(unsigned long data)</div><div class='ctx'> 		ihost-&gt;power_control.phys_granted_power++;</div><div class='ctx'> 		sci_phy_consume_power_handler(iphy);</div><div class='ctx'> </div><div class='del'>-		if (iphy-&gt;protocol == SCIC_SDS_PHY_PROTOCOL_SAS) {</div><div class='add'>+		if (iphy-&gt;protocol == SAS_PROTOCOL_SSP) {</div><div class='ctx'> 			u8 j;</div><div class='ctx'> </div><div class='ctx'> 			for (j = 0; j &lt; SCI_MAX_PHYS; j++) {</div><div class='hunk'>@@ -1988,7 +1840,7 @@ void sci_controller_power_control_queue_insert(struct isci_host *ihost,</div><div class='ctx'> 				       sizeof(current_phy-&gt;frame_rcvd.iaf.sas_addr));</div><div class='ctx'> </div><div class='ctx'> 			if (current_phy-&gt;sm.current_state_id == SCI_PHY_READY &amp;&amp;</div><div class='del'>-			    current_phy-&gt;protocol == SCIC_SDS_PHY_PROTOCOL_SAS &amp;&amp;</div><div class='add'>+			    current_phy-&gt;protocol == SAS_PROTOCOL_SSP &amp;&amp;</div><div class='ctx'> 			    other == 0) {</div><div class='ctx'> 				sci_phy_consume_power_handler(iphy);</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -2279,9 +2131,8 @@ static enum sci_status sci_controller_initialize(struct isci_host *ihost)</div><div class='ctx'> 	unsigned long i, state, val;</div><div class='ctx'> </div><div class='ctx'> 	if (ihost-&gt;sm.current_state_id != SCIC_RESET) {</div><div class='del'>-		dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			 "SCIC Controller initialize operation requested "</div><div class='del'>-			 "in invalid state\n");</div><div class='add'>+		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "%s invalid state: %d\n",</div><div class='add'>+			 __func__, ihost-&gt;sm.current_state_id);</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2384,96 +2235,76 @@ static enum sci_status sci_controller_initialize(struct isci_host *ihost)</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum sci_status sci_user_parameters_set(struct isci_host *ihost,</div><div class='del'>-					       struct sci_user_parameters *sci_parms)</div><div class='del'>-{</div><div class='del'>-	u32 state = ihost-&gt;sm.current_state_id;</div><div class='del'>-</div><div class='del'>-	if (state == SCIC_RESET ||</div><div class='del'>-	    state == SCIC_INITIALIZING ||</div><div class='del'>-	    state == SCIC_INITIALIZED) {</div><div class='del'>-		u16 index;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Validate the user parameters.  If they are not legal, then</div><div class='del'>-		 * return a failure.</div><div class='del'>-		 */</div><div class='del'>-		for (index = 0; index &lt; SCI_MAX_PHYS; index++) {</div><div class='del'>-			struct sci_phy_user_params *user_phy;</div><div class='del'>-</div><div class='del'>-			user_phy = &amp;sci_parms-&gt;phys[index];</div><div class='del'>-</div><div class='del'>-			if (!((user_phy-&gt;max_speed_generation &lt;=</div><div class='del'>-						SCIC_SDS_PARM_MAX_SPEED) &amp;&amp;</div><div class='del'>-			      (user_phy-&gt;max_speed_generation &gt;</div><div class='del'>-						SCIC_SDS_PARM_NO_SPEED)))</div><div class='del'>-				return SCI_FAILURE_INVALID_PARAMETER_VALUE;</div><div class='del'>-</div><div class='del'>-			if (user_phy-&gt;in_connection_align_insertion_frequency &lt;</div><div class='del'>-					3)</div><div class='del'>-				return SCI_FAILURE_INVALID_PARAMETER_VALUE;</div><div class='del'>-</div><div class='del'>-			if ((user_phy-&gt;in_connection_align_insertion_frequency &lt;</div><div class='del'>-						3) ||</div><div class='del'>-			    (user_phy-&gt;align_insertion_frequency == 0) ||</div><div class='del'>-			    (user_phy-&gt;</div><div class='del'>-				notify_enable_spin_up_insertion_frequency ==</div><div class='del'>-						0))</div><div class='del'>-				return SCI_FAILURE_INVALID_PARAMETER_VALUE;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if ((sci_parms-&gt;stp_inactivity_timeout == 0) ||</div><div class='del'>-		    (sci_parms-&gt;ssp_inactivity_timeout == 0) ||</div><div class='del'>-		    (sci_parms-&gt;stp_max_occupancy_timeout == 0) ||</div><div class='del'>-		    (sci_parms-&gt;ssp_max_occupancy_timeout == 0) ||</div><div class='del'>-		    (sci_parms-&gt;no_outbound_task_timeout == 0))</div><div class='del'>-			return SCI_FAILURE_INVALID_PARAMETER_VALUE;</div><div class='del'>-</div><div class='del'>-		memcpy(&amp;ihost-&gt;user_parameters, sci_parms, sizeof(*sci_parms));</div><div class='del'>-</div><div class='del'>-		return SCI_SUCCESS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return SCI_FAILURE_INVALID_STATE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sci_controller_mem_init(struct isci_host *ihost)</div><div class='add'>+static int sci_controller_dma_alloc(struct isci_host *ihost)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;ihost-&gt;pdev-&gt;dev;</div><div class='del'>-	dma_addr_t dma;</div><div class='ctx'> 	size_t size;</div><div class='del'>-	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* detect re-initialization */</div><div class='add'>+	if (ihost-&gt;completion_queue)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	size = SCU_MAX_COMPLETION_QUEUE_ENTRIES * sizeof(u32);</div><div class='del'>-	ihost-&gt;completion_queue = dmam_alloc_coherent(dev, size, &amp;dma, GFP_KERNEL);</div><div class='add'>+	ihost-&gt;completion_queue = dmam_alloc_coherent(dev, size, &amp;ihost-&gt;cq_dma,</div><div class='add'>+						      GFP_KERNEL);</div><div class='ctx'> 	if (!ihost-&gt;completion_queue)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	writel(lower_32_bits(dma), &amp;ihost-&gt;smu_registers-&gt;completion_queue_lower);</div><div class='del'>-	writel(upper_32_bits(dma), &amp;ihost-&gt;smu_registers-&gt;completion_queue_upper);</div><div class='del'>-</div><div class='ctx'> 	size = ihost-&gt;remote_node_entries * sizeof(union scu_remote_node_context);</div><div class='del'>-	ihost-&gt;remote_node_context_table = dmam_alloc_coherent(dev, size, &amp;dma,</div><div class='add'>+	ihost-&gt;remote_node_context_table = dmam_alloc_coherent(dev, size, &amp;ihost-&gt;rnc_dma,</div><div class='ctx'> 							       GFP_KERNEL);</div><div class='add'>+</div><div class='ctx'> 	if (!ihost-&gt;remote_node_context_table)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	writel(lower_32_bits(dma), &amp;ihost-&gt;smu_registers-&gt;remote_node_context_lower);</div><div class='del'>-	writel(upper_32_bits(dma), &amp;ihost-&gt;smu_registers-&gt;remote_node_context_upper);</div><div class='del'>-</div><div class='ctx'> 	size = ihost-&gt;task_context_entries * sizeof(struct scu_task_context),</div><div class='del'>-	ihost-&gt;task_context_table = dmam_alloc_coherent(dev, size, &amp;dma, GFP_KERNEL);</div><div class='add'>+	ihost-&gt;task_context_table = dmam_alloc_coherent(dev, size, &amp;ihost-&gt;tc_dma,</div><div class='add'>+							GFP_KERNEL);</div><div class='ctx'> 	if (!ihost-&gt;task_context_table)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ihost-&gt;task_context_dma = dma;</div><div class='del'>-	writel(lower_32_bits(dma), &amp;ihost-&gt;smu_registers-&gt;host_task_table_lower);</div><div class='del'>-	writel(upper_32_bits(dma), &amp;ihost-&gt;smu_registers-&gt;host_task_table_upper);</div><div class='add'>+	size = SCI_UFI_TOTAL_SIZE;</div><div class='add'>+	ihost-&gt;ufi_buf = dmam_alloc_coherent(dev, size, &amp;ihost-&gt;ufi_dma, GFP_KERNEL);</div><div class='add'>+	if (!ihost-&gt;ufi_buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SCI_MAX_IO_REQUESTS; i++) {</div><div class='add'>+		struct isci_request *ireq;</div><div class='add'>+		dma_addr_t dma;</div><div class='add'>+</div><div class='add'>+		ireq = dmam_alloc_coherent(dev, sizeof(*ireq), &amp;dma, GFP_KERNEL);</div><div class='add'>+		if (!ireq)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		ireq-&gt;tc = &amp;ihost-&gt;task_context_table[i];</div><div class='add'>+		ireq-&gt;owning_controller = ihost;</div><div class='add'>+		ireq-&gt;request_daddr = dma;</div><div class='add'>+		ireq-&gt;isci_host = ihost;</div><div class='add'>+		ihost-&gt;reqs[i] = ireq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sci_controller_mem_init(struct isci_host *ihost)</div><div class='add'>+{</div><div class='add'>+	int err = sci_controller_dma_alloc(ihost);</div><div class='ctx'> </div><div class='del'>-	err = sci_unsolicited_frame_control_construct(ihost);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	writel(lower_32_bits(ihost-&gt;cq_dma), &amp;ihost-&gt;smu_registers-&gt;completion_queue_lower);</div><div class='add'>+	writel(upper_32_bits(ihost-&gt;cq_dma), &amp;ihost-&gt;smu_registers-&gt;completion_queue_upper);</div><div class='add'>+</div><div class='add'>+	writel(lower_32_bits(ihost-&gt;rnc_dma), &amp;ihost-&gt;smu_registers-&gt;remote_node_context_lower);</div><div class='add'>+	writel(upper_32_bits(ihost-&gt;rnc_dma), &amp;ihost-&gt;smu_registers-&gt;remote_node_context_upper);</div><div class='add'>+</div><div class='add'>+	writel(lower_32_bits(ihost-&gt;tc_dma), &amp;ihost-&gt;smu_registers-&gt;host_task_table_lower);</div><div class='add'>+	writel(upper_32_bits(ihost-&gt;tc_dma), &amp;ihost-&gt;smu_registers-&gt;host_task_table_upper);</div><div class='add'>+</div><div class='add'>+	sci_unsolicited_frame_control_construct(ihost);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Inform the silicon as to the location of the UF headers and</div><div class='ctx'> 	 * address table.</div><div class='hunk'>@@ -2491,22 +2322,22 @@ static int sci_controller_mem_init(struct isci_host *ihost)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * isci_host_init - (re-)initialize hardware and internal (private) state</div><div class='add'>+ * @ihost: host to init</div><div class='add'>+ *</div><div class='add'>+ * Any public facing objects (like asd_sas_port, and asd_sas_phys), or</div><div class='add'>+ * one-time initialization objects like locks and waitqueues, are</div><div class='add'>+ * not touched (they are initialized in isci_host_alloc)</div><div class='add'>+ */</div><div class='ctx'> int isci_host_init(struct isci_host *ihost)</div><div class='ctx'> {</div><div class='del'>-	int err = 0, i;</div><div class='add'>+	int i, err;</div><div class='ctx'> 	enum sci_status status;</div><div class='del'>-	struct sci_user_parameters sci_user_params;</div><div class='del'>-	struct isci_pci_info *pci_info = to_pci_info(ihost-&gt;pdev);</div><div class='del'>-</div><div class='del'>-	spin_lock_init(&amp;ihost-&gt;state_lock);</div><div class='del'>-	spin_lock_init(&amp;ihost-&gt;scic_lock);</div><div class='del'>-	init_waitqueue_head(&amp;ihost-&gt;eventq);</div><div class='del'>-</div><div class='del'>-	isci_host_change_state(ihost, isci_starting);</div><div class='del'>-</div><div class='del'>-	status = sci_controller_construct(ihost, scu_base(ihost),</div><div class='del'>-					  smu_base(ihost));</div><div class='ctx'> </div><div class='add'>+	spin_lock_irq(&amp;ihost-&gt;scic_lock);</div><div class='add'>+	status = sci_controller_construct(ihost, scu_base(ihost), smu_base(ihost));</div><div class='add'>+	spin_unlock_irq(&amp;ihost-&gt;scic_lock);</div><div class='ctx'> 	if (status != SCI_SUCCESS) {</div><div class='ctx'> 		dev_err(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"%s: sci_controller_construct failed - status = %x\n",</div><div class='hunk'>@@ -2515,48 +2346,6 @@ int isci_host_init(struct isci_host *ihost)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ihost-&gt;sas_ha.dev = &amp;ihost-&gt;pdev-&gt;dev;</div><div class='del'>-	ihost-&gt;sas_ha.lldd_ha = ihost;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * grab initial values stored in the controller object for OEM and USER</div><div class='del'>-	 * parameters</div><div class='del'>-	 */</div><div class='del'>-	isci_user_parameters_get(&amp;sci_user_params);</div><div class='del'>-	status = sci_user_parameters_set(ihost, &amp;sci_user_params);</div><div class='del'>-	if (status != SCI_SUCCESS) {</div><div class='del'>-		dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			 "%s: sci_user_parameters_set failed\n",</div><div class='del'>-			 __func__);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* grab any OEM parameters specified in orom */</div><div class='del'>-	if (pci_info-&gt;orom) {</div><div class='del'>-		status = isci_parse_oem_parameters(&amp;ihost-&gt;oem_parameters,</div><div class='del'>-						   pci_info-&gt;orom,</div><div class='del'>-						   ihost-&gt;id);</div><div class='del'>-		if (status != SCI_SUCCESS) {</div><div class='del'>-			dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-				 "parsing firmware oem parameters failed\n");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	status = sci_oem_parameters_set(ihost);</div><div class='del'>-	if (status != SCI_SUCCESS) {</div><div class='del'>-		dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-				"%s: sci_oem_parameters_set failed\n",</div><div class='del'>-				__func__);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tasklet_init(&amp;ihost-&gt;completion_tasklet,</div><div class='del'>-		     isci_host_completion_routine, (unsigned long)ihost);</div><div class='del'>-</div><div class='del'>-	INIT_LIST_HEAD(&amp;ihost-&gt;requests_to_complete);</div><div class='del'>-	INIT_LIST_HEAD(&amp;ihost-&gt;requests_to_errorback);</div><div class='del'>-</div><div class='ctx'> 	spin_lock_irq(&amp;ihost-&gt;scic_lock);</div><div class='ctx'> 	status = sci_controller_initialize(ihost);</div><div class='ctx'> 	spin_unlock_irq(&amp;ihost-&gt;scic_lock);</div><div class='hunk'>@@ -2572,43 +2361,12 @@ int isci_host_init(struct isci_host *ihost)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; SCI_MAX_PORTS; i++)</div><div class='del'>-		isci_port_init(&amp;ihost-&gt;ports[i], ihost, i);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; SCI_MAX_PHYS; i++)</div><div class='del'>-		isci_phy_init(&amp;ihost-&gt;phys[i], ihost, i);</div><div class='del'>-</div><div class='ctx'> 	/* enable sgpio */</div><div class='ctx'> 	writel(1, &amp;ihost-&gt;scu_registers-&gt;peg0.sgpio.interface_control);</div><div class='ctx'> 	for (i = 0; i &lt; isci_gpio_count(ihost); i++)</div><div class='ctx'> 		writel(SGPIO_HW_CONTROL, &amp;ihost-&gt;scu_registers-&gt;peg0.sgpio.output_data_select[i]);</div><div class='ctx'> 	writel(0, &amp;ihost-&gt;scu_registers-&gt;peg0.sgpio.vendor_specific_code);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; SCI_MAX_REMOTE_DEVICES; i++) {</div><div class='del'>-		struct isci_remote_device *idev = &amp;ihost-&gt;devices[i];</div><div class='del'>-</div><div class='del'>-		INIT_LIST_HEAD(&amp;idev-&gt;reqs_in_process);</div><div class='del'>-		INIT_LIST_HEAD(&amp;idev-&gt;node);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; SCI_MAX_IO_REQUESTS; i++) {</div><div class='del'>-		struct isci_request *ireq;</div><div class='del'>-		dma_addr_t dma;</div><div class='del'>-</div><div class='del'>-		ireq = dmam_alloc_coherent(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-					   sizeof(struct isci_request), &amp;dma,</div><div class='del'>-					   GFP_KERNEL);</div><div class='del'>-		if (!ireq)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-</div><div class='del'>-		ireq-&gt;tc = &amp;ihost-&gt;task_context_table[i];</div><div class='del'>-		ireq-&gt;owning_controller = ihost;</div><div class='del'>-		spin_lock_init(&amp;ireq-&gt;state_lock);</div><div class='del'>-		ireq-&gt;request_daddr = dma;</div><div class='del'>-		ireq-&gt;isci_host = ihost;</div><div class='del'>-		ihost-&gt;reqs[i] = ireq;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2654,7 +2412,7 @@ void sci_controller_link_down(struct isci_host *ihost, struct isci_port *iport,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool sci_controller_has_remote_devices_stopping(struct isci_host *ihost)</div><div class='add'>+bool sci_controller_has_remote_devices_stopping(struct isci_host *ihost)</div><div class='ctx'> {</div><div class='ctx'> 	u32 index;</div><div class='ctx'> </div><div class='hunk'>@@ -2680,7 +2438,7 @@ void sci_controller_remote_device_stopped(struct isci_host *ihost,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!sci_controller_has_remote_devices_stopping(ihost))</div><div class='del'>-		sci_change_state(&amp;ihost-&gt;sm, SCIC_STOPPED);</div><div class='add'>+		isci_host_stop_complete(ihost);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void sci_controller_post_request(struct isci_host *ihost, u32 request)</div><div class='hunk'>@@ -2842,7 +2600,8 @@ enum sci_status sci_controller_start_io(struct isci_host *ihost,</div><div class='ctx'> 	enum sci_status status;</div><div class='ctx'> </div><div class='ctx'> 	if (ihost-&gt;sm.current_state_id != SCIC_READY) {</div><div class='del'>-		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "invalid state to start I/O");</div><div class='add'>+		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "%s invalid state: %d\n",</div><div class='add'>+			 __func__, ihost-&gt;sm.current_state_id);</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2866,22 +2625,26 @@ enum sci_status sci_controller_terminate_request(struct isci_host *ihost,</div><div class='ctx'> 	enum sci_status status;</div><div class='ctx'> </div><div class='ctx'> 	if (ihost-&gt;sm.current_state_id != SCIC_READY) {</div><div class='del'>-		dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			 "invalid state to terminate request\n");</div><div class='add'>+		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "%s invalid state: %d\n",</div><div class='add'>+			 __func__, ihost-&gt;sm.current_state_id);</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	status = sci_io_request_terminate(ireq);</div><div class='del'>-	if (status != SCI_SUCCESS)</div><div class='del'>-		return status;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Utilize the original post context command and or in the POST_TC_ABORT</div><div class='del'>-	 * request sub-type.</div><div class='del'>-	 */</div><div class='del'>-	sci_controller_post_request(ihost,</div><div class='del'>-				    ireq-&gt;post_context | SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT);</div><div class='del'>-	return SCI_SUCCESS;</div><div class='add'>+	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev, "%s: status=%d; ireq=%p; flags=%lx\n",</div><div class='add'>+		__func__, status, ireq, ireq-&gt;flags);</div><div class='add'>+</div><div class='add'>+	if ((status == SCI_SUCCESS) &amp;&amp;</div><div class='add'>+	    !test_bit(IREQ_PENDING_ABORT, &amp;ireq-&gt;flags) &amp;&amp;</div><div class='add'>+	    !test_and_set_bit(IREQ_TC_ABORT_POSTED, &amp;ireq-&gt;flags)) {</div><div class='add'>+		/* Utilize the original post context command and or in the</div><div class='add'>+		 * POST_TC_ABORT request sub-type.</div><div class='add'>+		 */</div><div class='add'>+		sci_controller_post_request(</div><div class='add'>+			ihost, ireq-&gt;post_context |</div><div class='add'>+				SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT);</div><div class='add'>+	}</div><div class='add'>+	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2915,7 +2678,8 @@ enum sci_status sci_controller_complete_io(struct isci_host *ihost,</div><div class='ctx'> 		clear_bit(IREQ_ACTIVE, &amp;ireq-&gt;flags);</div><div class='ctx'> 		return SCI_SUCCESS;</div><div class='ctx'> 	default:</div><div class='del'>-		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "invalid state to complete I/O");</div><div class='add'>+		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "%s invalid state: %d\n",</div><div class='add'>+			 __func__, ihost-&gt;sm.current_state_id);</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2926,7 +2690,8 @@ enum sci_status sci_controller_continue_io(struct isci_request *ireq)</div><div class='ctx'> 	struct isci_host *ihost = ireq-&gt;owning_controller;</div><div class='ctx'> </div><div class='ctx'> 	if (ihost-&gt;sm.current_state_id != SCIC_READY) {</div><div class='del'>-		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "invalid state to continue I/O");</div><div class='add'>+		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "%s invalid state: %d\n",</div><div class='add'>+			 __func__, ihost-&gt;sm.current_state_id);</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/isci/host.h b/drivers/scsi/isci/host.h<br/>index adbad69d1069..9ab58e0540e7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/host.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/host.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/host.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/host.h</a></div><div class='hunk'>@@ -55,6 +55,7 @@</div><div class='ctx'> #ifndef _SCI_HOST_H_</div><div class='ctx'> #define _SCI_HOST_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;scsi/sas_ata.h&gt;</div><div class='ctx'> #include "remote_device.h"</div><div class='ctx'> #include "phy.h"</div><div class='ctx'> #include "isci.h"</div><div class='hunk'>@@ -108,6 +109,8 @@ struct sci_port_configuration_agent;</div><div class='ctx'> typedef void (*port_config_fn)(struct isci_host *,</div><div class='ctx'> 			       struct sci_port_configuration_agent *,</div><div class='ctx'> 			       struct isci_port *, struct isci_phy *);</div><div class='add'>+bool is_port_config_apc(struct isci_host *ihost);</div><div class='add'>+bool is_controller_start_complete(struct isci_host *ihost);</div><div class='ctx'> </div><div class='ctx'> struct sci_port_configuration_agent {</div><div class='ctx'> 	u16 phy_configured_mask;</div><div class='hunk'>@@ -157,13 +160,17 @@ struct isci_host {</div><div class='ctx'> 	struct sci_power_control power_control;</div><div class='ctx'> 	u8 io_request_sequence[SCI_MAX_IO_REQUESTS];</div><div class='ctx'> 	struct scu_task_context *task_context_table;</div><div class='del'>-	dma_addr_t task_context_dma;</div><div class='add'>+	dma_addr_t tc_dma;</div><div class='ctx'> 	union scu_remote_node_context *remote_node_context_table;</div><div class='add'>+	dma_addr_t rnc_dma;</div><div class='ctx'> 	u32 *completion_queue;</div><div class='add'>+	dma_addr_t cq_dma;</div><div class='ctx'> 	u32 completion_queue_get;</div><div class='ctx'> 	u32 logical_port_entries;</div><div class='ctx'> 	u32 remote_node_entries;</div><div class='ctx'> 	u32 task_context_entries;</div><div class='add'>+	void *ufi_buf;</div><div class='add'>+	dma_addr_t ufi_dma;</div><div class='ctx'> 	struct sci_unsolicited_frame_control uf_control;</div><div class='ctx'> </div><div class='ctx'> 	/* phy startup */</div><div class='hunk'>@@ -190,17 +197,13 @@ struct isci_host {</div><div class='ctx'> 	struct asd_sas_port sas_ports[SCI_MAX_PORTS];</div><div class='ctx'> 	struct sas_ha_struct sas_ha;</div><div class='ctx'> </div><div class='del'>-	spinlock_t state_lock;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='del'>-	enum isci_status status;</div><div class='ctx'> 	#define IHOST_START_PENDING 0</div><div class='ctx'> 	#define IHOST_STOP_PENDING 1</div><div class='add'>+	#define IHOST_IRQ_ENABLED 2</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	wait_queue_head_t eventq;</div><div class='del'>-	struct Scsi_Host *shost;</div><div class='ctx'> 	struct tasklet_struct completion_tasklet;</div><div class='del'>-	struct list_head requests_to_complete;</div><div class='del'>-	struct list_head requests_to_errorback;</div><div class='ctx'> 	spinlock_t scic_lock;</div><div class='ctx'> 	struct isci_request *reqs[SCI_MAX_IO_REQUESTS];</div><div class='ctx'> 	struct isci_remote_device devices[SCI_MAX_REMOTE_DEVICES];</div><div class='hunk'>@@ -274,13 +277,6 @@ enum sci_controller_states {</div><div class='ctx'> 	SCIC_STOPPING,</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='del'>-	 * This state indicates that the controller has successfully been stopped.</div><div class='del'>-	 * In this state no new IO operations are permitted.</div><div class='del'>-	 * This state is entered from the STOPPING state.</div><div class='del'>-	 */</div><div class='del'>-	SCIC_STOPPED,</div><div class='del'>-</div><div class='del'>-	/**</div><div class='ctx'> 	 * This state indicates that the controller could not successfully be</div><div class='ctx'> 	 * initialized.  In this state no new IO operations are permitted.</div><div class='ctx'> 	 * This state is entered from the INITIALIZING state.</div><div class='hunk'>@@ -309,32 +305,16 @@ static inline struct isci_pci_info *to_pci_info(struct pci_dev *pdev)</div><div class='ctx'> 	return pci_get_drvdata(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline struct Scsi_Host *to_shost(struct isci_host *ihost)</div><div class='add'>+{</div><div class='add'>+	return ihost-&gt;sas_ha.core.shost;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define for_each_isci_host(id, ihost, pdev) \</div><div class='ctx'> 	for (id = 0, ihost = to_pci_info(pdev)-&gt;hosts[id]; \</div><div class='ctx'> 	     id &lt; ARRAY_SIZE(to_pci_info(pdev)-&gt;hosts) &amp;&amp; ihost; \</div><div class='ctx'> 	     ihost = to_pci_info(pdev)-&gt;hosts[++id])</div><div class='ctx'> </div><div class='del'>-static inline enum isci_status isci_host_get_state(struct isci_host *isci_host)</div><div class='del'>-{</div><div class='del'>-	return isci_host-&gt;status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void isci_host_change_state(struct isci_host *isci_host,</div><div class='del'>-					  enum isci_status status)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;isci_host-&gt;pdev-&gt;dev,</div><div class='del'>-		"%s: isci_host = %p, state = 0x%x",</div><div class='del'>-		__func__,</div><div class='del'>-		isci_host,</div><div class='del'>-		status);</div><div class='del'>-	spin_lock_irqsave(&amp;isci_host-&gt;state_lock, flags);</div><div class='del'>-	isci_host-&gt;status = status;</div><div class='del'>-	spin_unlock_irqrestore(&amp;isci_host-&gt;state_lock, flags);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void wait_for_start(struct isci_host *ihost)</div><div class='ctx'> {</div><div class='ctx'> 	wait_event(ihost-&gt;eventq, !test_bit(IHOST_START_PENDING, &amp;ihost-&gt;flags));</div><div class='hunk'>@@ -360,6 +340,11 @@ static inline struct isci_host *dev_to_ihost(struct domain_device *dev)</div><div class='ctx'> 	return dev-&gt;port-&gt;ha-&gt;lldd_ha;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline struct isci_host *idev_to_ihost(struct isci_remote_device *idev)</div><div class='add'>+{</div><div class='add'>+	return dev_to_ihost(idev-&gt;domain_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* we always use protocol engine group zero */</div><div class='ctx'> #define ISCI_PEG 0</div><div class='ctx'> </div><div class='hunk'>@@ -378,8 +363,7 @@ static inline int sci_remote_device_node_count(struct isci_remote_device *idev)</div><div class='ctx'> {</div><div class='ctx'> 	struct domain_device *dev = idev-&gt;domain_dev;</div><div class='ctx'> </div><div class='del'>-	if ((dev-&gt;dev_type == SATA_DEV || (dev-&gt;tproto &amp; SAS_PROTOCOL_STP)) &amp;&amp;</div><div class='del'>-	    !idev-&gt;is_direct_attached)</div><div class='add'>+	if (dev_is_sata(dev) &amp;&amp; dev-&gt;parent)</div><div class='ctx'> 		return SCU_STP_REMOTE_NODE_COUNT;</div><div class='ctx'> 	return SCU_SSP_REMOTE_NODE_COUNT;</div><div class='ctx'> }</div><div class='hunk'>@@ -475,36 +459,17 @@ void sci_controller_free_remote_node_context(</div><div class='ctx'> 	struct isci_remote_device *idev,</div><div class='ctx'> 	u16 node_id);</div><div class='ctx'> </div><div class='del'>-struct isci_request *sci_request_by_tag(struct isci_host *ihost,</div><div class='del'>-					     u16 io_tag);</div><div class='del'>-</div><div class='del'>-void sci_controller_power_control_queue_insert(</div><div class='del'>-	struct isci_host *ihost,</div><div class='del'>-	struct isci_phy *iphy);</div><div class='del'>-</div><div class='del'>-void sci_controller_power_control_queue_remove(</div><div class='del'>-	struct isci_host *ihost,</div><div class='del'>-	struct isci_phy *iphy);</div><div class='del'>-</div><div class='del'>-void sci_controller_link_up(</div><div class='del'>-	struct isci_host *ihost,</div><div class='del'>-	struct isci_port *iport,</div><div class='del'>-	struct isci_phy *iphy);</div><div class='del'>-</div><div class='del'>-void sci_controller_link_down(</div><div class='del'>-	struct isci_host *ihost,</div><div class='del'>-	struct isci_port *iport,</div><div class='del'>-	struct isci_phy *iphy);</div><div class='del'>-</div><div class='del'>-void sci_controller_remote_device_stopped(</div><div class='del'>-	struct isci_host *ihost,</div><div class='del'>-	struct isci_remote_device *idev);</div><div class='del'>-</div><div class='del'>-void sci_controller_copy_task_context(</div><div class='del'>-	struct isci_host *ihost,</div><div class='del'>-	struct isci_request *ireq);</div><div class='del'>-</div><div class='del'>-void sci_controller_register_setup(struct isci_host *ihost);</div><div class='add'>+struct isci_request *sci_request_by_tag(struct isci_host *ihost, u16 io_tag);</div><div class='add'>+void sci_controller_power_control_queue_insert(struct isci_host *ihost,</div><div class='add'>+					       struct isci_phy *iphy);</div><div class='add'>+void sci_controller_power_control_queue_remove(struct isci_host *ihost,</div><div class='add'>+					       struct isci_phy *iphy);</div><div class='add'>+void sci_controller_link_up(struct isci_host *ihost, struct isci_port *iport,</div><div class='add'>+			    struct isci_phy *iphy);</div><div class='add'>+void sci_controller_link_down(struct isci_host *ihost, struct isci_port *iport,</div><div class='add'>+			      struct isci_phy *iphy);</div><div class='add'>+void sci_controller_remote_device_stopped(struct isci_host *ihost,</div><div class='add'>+					  struct isci_remote_device *idev);</div><div class='ctx'> </div><div class='ctx'> enum sci_status sci_controller_continue_io(struct isci_request *ireq);</div><div class='ctx'> int isci_host_scan_finished(struct Scsi_Host *, unsigned long);</div><div class='hunk'>@@ -512,29 +477,14 @@ void isci_host_scan_start(struct Scsi_Host *);</div><div class='ctx'> u16 isci_alloc_tag(struct isci_host *ihost);</div><div class='ctx'> enum sci_status isci_free_tag(struct isci_host *ihost, u16 io_tag);</div><div class='ctx'> void isci_tci_free(struct isci_host *ihost, u16 tci);</div><div class='add'>+void ireq_done(struct isci_host *ihost, struct isci_request *ireq, struct sas_task *task);</div><div class='ctx'> </div><div class='ctx'> int isci_host_init(struct isci_host *);</div><div class='del'>-</div><div class='del'>-void isci_host_init_controller_names(</div><div class='del'>-	struct isci_host *isci_host,</div><div class='del'>-	unsigned int controller_idx);</div><div class='del'>-</div><div class='del'>-void isci_host_deinit(</div><div class='del'>-	struct isci_host *);</div><div class='del'>-</div><div class='del'>-void isci_host_port_link_up(</div><div class='del'>-	struct isci_host *,</div><div class='del'>-	struct isci_port *,</div><div class='del'>-	struct isci_phy *);</div><div class='del'>-int isci_host_dev_found(struct domain_device *);</div><div class='del'>-</div><div class='del'>-void isci_host_remote_device_start_complete(</div><div class='del'>-	struct isci_host *,</div><div class='del'>-	struct isci_remote_device *,</div><div class='del'>-	enum sci_status);</div><div class='del'>-</div><div class='del'>-void sci_controller_disable_interrupts(</div><div class='del'>-	struct isci_host *ihost);</div><div class='add'>+void isci_host_completion_routine(unsigned long data);</div><div class='add'>+void isci_host_deinit(struct isci_host *);</div><div class='add'>+void sci_controller_disable_interrupts(struct isci_host *ihost);</div><div class='add'>+bool sci_controller_has_remote_devices_stopping(struct isci_host *ihost);</div><div class='add'>+void sci_controller_transition_to_ready(struct isci_host *ihost, enum sci_status status);</div><div class='ctx'> </div><div class='ctx'> enum sci_status sci_controller_start_io(</div><div class='ctx'> 	struct isci_host *ihost,</div><div class='head'>diff --git a/drivers/scsi/isci/init.c b/drivers/scsi/isci/init.c<br/>index 5137db5a5d85..47e28b555029 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/init.c</a></div><div class='hunk'>@@ -271,13 +271,12 @@ static void isci_unregister(struct isci_host *isci_host)</div><div class='ctx'> 	if (!isci_host)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	shost = isci_host-&gt;shost;</div><div class='del'>-</div><div class='ctx'> 	sas_unregister_ha(&amp;isci_host-&gt;sas_ha);</div><div class='ctx'> </div><div class='del'>-	sas_remove_host(isci_host-&gt;shost);</div><div class='del'>-	scsi_remove_host(isci_host-&gt;shost);</div><div class='del'>-	scsi_host_put(isci_host-&gt;shost);</div><div class='add'>+	shost = to_shost(isci_host);</div><div class='add'>+	sas_remove_host(shost);</div><div class='add'>+	scsi_remove_host(shost);</div><div class='add'>+	scsi_host_put(shost);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __devinit isci_pci_init(struct pci_dev *pdev)</div><div class='hunk'>@@ -397,38 +396,199 @@ static int isci_setup_interrupts(struct pci_dev *pdev)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void isci_user_parameters_get(struct sci_user_parameters *u)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SCI_MAX_PHYS; i++) {</div><div class='add'>+		struct sci_phy_user_params *u_phy = &amp;u-&gt;phys[i];</div><div class='add'>+</div><div class='add'>+		u_phy-&gt;max_speed_generation = phy_gen;</div><div class='add'>+</div><div class='add'>+		/* we are not exporting these for now */</div><div class='add'>+		u_phy-&gt;align_insertion_frequency = 0x7f;</div><div class='add'>+		u_phy-&gt;in_connection_align_insertion_frequency = 0xff;</div><div class='add'>+		u_phy-&gt;notify_enable_spin_up_insertion_frequency = 0x33;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	u-&gt;stp_inactivity_timeout = stp_inactive_to;</div><div class='add'>+	u-&gt;ssp_inactivity_timeout = ssp_inactive_to;</div><div class='add'>+	u-&gt;stp_max_occupancy_timeout = stp_max_occ_to;</div><div class='add'>+	u-&gt;ssp_max_occupancy_timeout = ssp_max_occ_to;</div><div class='add'>+	u-&gt;no_outbound_task_timeout = no_outbound_task_to;</div><div class='add'>+	u-&gt;max_concurr_spinup = max_concurr_spinup;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum sci_status sci_user_parameters_set(struct isci_host *ihost,</div><div class='add'>+					       struct sci_user_parameters *sci_parms)</div><div class='add'>+{</div><div class='add'>+	u16 index;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Validate the user parameters.  If they are not legal, then</div><div class='add'>+	 * return a failure.</div><div class='add'>+	 */</div><div class='add'>+	for (index = 0; index &lt; SCI_MAX_PHYS; index++) {</div><div class='add'>+		struct sci_phy_user_params *u;</div><div class='add'>+</div><div class='add'>+		u = &amp;sci_parms-&gt;phys[index];</div><div class='add'>+</div><div class='add'>+		if (!((u-&gt;max_speed_generation &lt;= SCIC_SDS_PARM_MAX_SPEED) &amp;&amp;</div><div class='add'>+		      (u-&gt;max_speed_generation &gt; SCIC_SDS_PARM_NO_SPEED)))</div><div class='add'>+			return SCI_FAILURE_INVALID_PARAMETER_VALUE;</div><div class='add'>+</div><div class='add'>+		if (u-&gt;in_connection_align_insertion_frequency &lt; 3)</div><div class='add'>+			return SCI_FAILURE_INVALID_PARAMETER_VALUE;</div><div class='add'>+</div><div class='add'>+		if ((u-&gt;in_connection_align_insertion_frequency &lt; 3) ||</div><div class='add'>+		    (u-&gt;align_insertion_frequency == 0) ||</div><div class='add'>+		    (u-&gt;notify_enable_spin_up_insertion_frequency == 0))</div><div class='add'>+			return SCI_FAILURE_INVALID_PARAMETER_VALUE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((sci_parms-&gt;stp_inactivity_timeout == 0) ||</div><div class='add'>+	    (sci_parms-&gt;ssp_inactivity_timeout == 0) ||</div><div class='add'>+	    (sci_parms-&gt;stp_max_occupancy_timeout == 0) ||</div><div class='add'>+	    (sci_parms-&gt;ssp_max_occupancy_timeout == 0) ||</div><div class='add'>+	    (sci_parms-&gt;no_outbound_task_timeout == 0))</div><div class='add'>+		return SCI_FAILURE_INVALID_PARAMETER_VALUE;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;ihost-&gt;user_parameters, sci_parms, sizeof(*sci_parms));</div><div class='add'>+</div><div class='add'>+	return SCI_SUCCESS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sci_oem_defaults(struct isci_host *ihost)</div><div class='add'>+{</div><div class='add'>+	/* these defaults are overridden by the platform / firmware */</div><div class='add'>+	struct sci_user_parameters *user = &amp;ihost-&gt;user_parameters;</div><div class='add'>+	struct sci_oem_params *oem = &amp;ihost-&gt;oem_parameters;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Default to APC mode. */</div><div class='add'>+	oem-&gt;controller.mode_type = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;</div><div class='add'>+</div><div class='add'>+	/* Default to APC mode. */</div><div class='add'>+	oem-&gt;controller.max_concurr_spin_up = 1;</div><div class='add'>+</div><div class='add'>+	/* Default to no SSC operation. */</div><div class='add'>+	oem-&gt;controller.do_enable_ssc = false;</div><div class='add'>+</div><div class='add'>+	/* Default to short cables on all phys. */</div><div class='add'>+	oem-&gt;controller.cable_selection_mask = 0;</div><div class='add'>+</div><div class='add'>+	/* Initialize all of the port parameter information to narrow ports. */</div><div class='add'>+	for (i = 0; i &lt; SCI_MAX_PORTS; i++)</div><div class='add'>+		oem-&gt;ports[i].phy_mask = 0;</div><div class='add'>+</div><div class='add'>+	/* Initialize all of the phy parameter information. */</div><div class='add'>+	for (i = 0; i &lt; SCI_MAX_PHYS; i++) {</div><div class='add'>+		/* Default to 3G (i.e. Gen 2). */</div><div class='add'>+		user-&gt;phys[i].max_speed_generation = SCIC_SDS_PARM_GEN2_SPEED;</div><div class='add'>+</div><div class='add'>+		/* the frequencies cannot be 0 */</div><div class='add'>+		user-&gt;phys[i].align_insertion_frequency = 0x7f;</div><div class='add'>+		user-&gt;phys[i].in_connection_align_insertion_frequency = 0xff;</div><div class='add'>+		user-&gt;phys[i].notify_enable_spin_up_insertion_frequency = 0x33;</div><div class='add'>+</div><div class='add'>+		/* Previous Vitesse based expanders had a arbitration issue that</div><div class='add'>+		 * is worked around by having the upper 32-bits of SAS address</div><div class='add'>+		 * with a value greater then the Vitesse company identifier.</div><div class='add'>+		 * Hence, usage of 0x5FCFFFFF.</div><div class='add'>+		 */</div><div class='add'>+		oem-&gt;phys[i].sas_address.low = 0x1 + ihost-&gt;id;</div><div class='add'>+		oem-&gt;phys[i].sas_address.high = 0x5FCFFFFF;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	user-&gt;stp_inactivity_timeout = 5;</div><div class='add'>+	user-&gt;ssp_inactivity_timeout = 5;</div><div class='add'>+	user-&gt;stp_max_occupancy_timeout = 5;</div><div class='add'>+	user-&gt;ssp_max_occupancy_timeout = 20;</div><div class='add'>+	user-&gt;no_outbound_task_timeout = 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct isci_host *isci_host_alloc(struct pci_dev *pdev, int id)</div><div class='ctx'> {</div><div class='del'>-	struct isci_host *isci_host;</div><div class='add'>+	struct isci_orom *orom = to_pci_info(pdev)-&gt;orom;</div><div class='add'>+	struct sci_user_parameters sci_user_params;</div><div class='add'>+	u8 oem_version = ISCI_ROM_VER_1_0;</div><div class='add'>+	struct isci_host *ihost;</div><div class='ctx'> 	struct Scsi_Host *shost;</div><div class='del'>-	int err;</div><div class='add'>+	int err, i;</div><div class='ctx'> </div><div class='del'>-	isci_host = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*isci_host), GFP_KERNEL);</div><div class='del'>-	if (!isci_host)</div><div class='add'>+	ihost = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*ihost), GFP_KERNEL);</div><div class='add'>+	if (!ihost)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	isci_host-&gt;pdev = pdev;</div><div class='del'>-	isci_host-&gt;id = id;</div><div class='add'>+	ihost-&gt;pdev = pdev;</div><div class='add'>+	ihost-&gt;id = id;</div><div class='add'>+	spin_lock_init(&amp;ihost-&gt;scic_lock);</div><div class='add'>+	init_waitqueue_head(&amp;ihost-&gt;eventq);</div><div class='add'>+	ihost-&gt;sas_ha.dev = &amp;ihost-&gt;pdev-&gt;dev;</div><div class='add'>+	ihost-&gt;sas_ha.lldd_ha = ihost;</div><div class='add'>+	tasklet_init(&amp;ihost-&gt;completion_tasklet,</div><div class='add'>+		     isci_host_completion_routine, (unsigned long)ihost);</div><div class='add'>+</div><div class='add'>+	/* validate module parameters */</div><div class='add'>+	/* TODO: kill struct sci_user_parameters and reference directly */</div><div class='add'>+	sci_oem_defaults(ihost);</div><div class='add'>+	isci_user_parameters_get(&amp;sci_user_params);</div><div class='add'>+	if (sci_user_parameters_set(ihost, &amp;sci_user_params)) {</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev,</div><div class='add'>+			 "%s: sci_user_parameters_set failed\n", __func__);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* sanity check platform (or 'firmware') oem parameters */</div><div class='add'>+	if (orom) {</div><div class='add'>+		if (id &lt; 0 || id &gt;= SCI_MAX_CONTROLLERS || id &gt; orom-&gt;hdr.num_elements) {</div><div class='add'>+			dev_warn(&amp;pdev-&gt;dev, "parsing firmware oem parameters failed\n");</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+		ihost-&gt;oem_parameters = orom-&gt;ctrl[id];</div><div class='add'>+		oem_version = orom-&gt;hdr.version;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* validate oem parameters (platform, firmware, or built-in defaults) */</div><div class='add'>+	if (sci_oem_parameters_validate(&amp;ihost-&gt;oem_parameters, oem_version)) {</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, "oem parameter validation failed\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SCI_MAX_PORTS; i++) {</div><div class='add'>+		struct isci_port *iport = &amp;ihost-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+		INIT_LIST_HEAD(&amp;iport-&gt;remote_dev_list);</div><div class='add'>+		iport-&gt;isci_host = ihost;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SCI_MAX_PHYS; i++)</div><div class='add'>+		isci_phy_init(&amp;ihost-&gt;phys[i], ihost, i);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SCI_MAX_REMOTE_DEVICES; i++) {</div><div class='add'>+		struct isci_remote_device *idev = &amp;ihost-&gt;devices[i];</div><div class='add'>+</div><div class='add'>+		INIT_LIST_HEAD(&amp;idev-&gt;node);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	shost = scsi_host_alloc(&amp;isci_sht, sizeof(void *));</div><div class='ctx'> 	if (!shost)</div><div class='ctx'> 		return NULL;</div><div class='del'>-	isci_host-&gt;shost = shost;</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "%sSCU controller %d: phy 3-0 cables: "</div><div class='ctx'> 		 "{%s, %s, %s, %s}\n",</div><div class='del'>-		 (is_cable_select_overridden() ? "* " : ""), isci_host-&gt;id,</div><div class='del'>-		 lookup_cable_names(decode_cable_selection(isci_host, 3)),</div><div class='del'>-		 lookup_cable_names(decode_cable_selection(isci_host, 2)),</div><div class='del'>-		 lookup_cable_names(decode_cable_selection(isci_host, 1)),</div><div class='del'>-		 lookup_cable_names(decode_cable_selection(isci_host, 0)));</div><div class='add'>+		 (is_cable_select_overridden() ? "* " : ""), ihost-&gt;id,</div><div class='add'>+		 lookup_cable_names(decode_cable_selection(ihost, 3)),</div><div class='add'>+		 lookup_cable_names(decode_cable_selection(ihost, 2)),</div><div class='add'>+		 lookup_cable_names(decode_cable_selection(ihost, 1)),</div><div class='add'>+		 lookup_cable_names(decode_cable_selection(ihost, 0)));</div><div class='ctx'> </div><div class='del'>-	err = isci_host_init(isci_host);</div><div class='add'>+	err = isci_host_init(ihost);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_shost;</div><div class='ctx'> </div><div class='del'>-	SHOST_TO_SAS_HA(shost) = &amp;isci_host-&gt;sas_ha;</div><div class='del'>-	isci_host-&gt;sas_ha.core.shost = shost;</div><div class='add'>+	SHOST_TO_SAS_HA(shost) = &amp;ihost-&gt;sas_ha;</div><div class='add'>+	ihost-&gt;sas_ha.core.shost = shost;</div><div class='ctx'> 	shost-&gt;transportt = isci_transport_template;</div><div class='ctx'> </div><div class='ctx'> 	shost-&gt;max_id = ~0;</div><div class='hunk'>@@ -439,11 +599,11 @@ static struct isci_host *isci_host_alloc(struct pci_dev *pdev, int id)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_shost;</div><div class='ctx'> </div><div class='del'>-	err = isci_register_sas_ha(isci_host);</div><div class='add'>+	err = isci_register_sas_ha(ihost);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_shost_remove;</div><div class='ctx'> </div><div class='del'>-	return isci_host;</div><div class='add'>+	return ihost;</div><div class='ctx'> </div><div class='ctx'>  err_shost_remove:</div><div class='ctx'> 	scsi_remove_host(shost);</div><div class='hunk'>@@ -476,7 +636,7 @@ static int __devinit isci_pci_probe(struct pci_dev *pdev, const struct pci_devic</div><div class='ctx'> 	if (!orom)</div><div class='ctx'> 		orom = isci_request_oprom(pdev);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; orom &amp;&amp; i &lt; ARRAY_SIZE(orom-&gt;ctrl); i++) {</div><div class='add'>+	for (i = 0; orom &amp;&amp; i &lt; num_controllers(pdev); i++) {</div><div class='ctx'> 		if (sci_oem_parameters_validate(&amp;orom-&gt;ctrl[i],</div><div class='ctx'> 						orom-&gt;hdr.version)) {</div><div class='ctx'> 			dev_warn(&amp;pdev-&gt;dev,</div><div class='hunk'>@@ -525,11 +685,11 @@ static int __devinit isci_pci_probe(struct pci_dev *pdev, const struct pci_devic</div><div class='ctx'> 		pci_info-&gt;hosts[i] = h;</div><div class='ctx'> </div><div class='ctx'> 		/* turn on DIF support */</div><div class='del'>-		scsi_host_set_prot(h-&gt;shost,</div><div class='add'>+		scsi_host_set_prot(to_shost(h),</div><div class='ctx'> 				   SHOST_DIF_TYPE1_PROTECTION |</div><div class='ctx'> 				   SHOST_DIF_TYPE2_PROTECTION |</div><div class='ctx'> 				   SHOST_DIF_TYPE3_PROTECTION);</div><div class='del'>-		scsi_host_set_guard(h-&gt;shost, SHOST_DIX_GUARD_CRC);</div><div class='add'>+		scsi_host_set_guard(to_shost(h), SHOST_DIX_GUARD_CRC);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = isci_setup_interrupts(pdev);</div><div class='hunk'>@@ -537,7 +697,7 @@ static int __devinit isci_pci_probe(struct pci_dev *pdev, const struct pci_devic</div><div class='ctx'> 		goto err_host_alloc;</div><div class='ctx'> </div><div class='ctx'> 	for_each_isci_host(i, isci_host, pdev)</div><div class='del'>-		scsi_scan_host(isci_host-&gt;shost);</div><div class='add'>+		scsi_scan_host(to_shost(isci_host));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/isci/phy.c b/drivers/scsi/isci/phy.c<br/>index fab3586840b5..18f43d4c30ba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/phy.c</a></div><div class='hunk'>@@ -580,7 +580,7 @@ static void sci_phy_start_sas_link_training(struct isci_phy *iphy)</div><div class='ctx'> </div><div class='ctx'> 	sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_SUB_AWAIT_SAS_SPEED_EN);</div><div class='ctx'> </div><div class='del'>-	iphy-&gt;protocol = SCIC_SDS_PHY_PROTOCOL_SAS;</div><div class='add'>+	iphy-&gt;protocol = SAS_PROTOCOL_SSP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sci_phy_start_sata_link_training(struct isci_phy *iphy)</div><div class='hunk'>@@ -591,7 +591,7 @@ static void sci_phy_start_sata_link_training(struct isci_phy *iphy)</div><div class='ctx'> 	 */</div><div class='ctx'> 	sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_SUB_AWAIT_SATA_POWER);</div><div class='ctx'> </div><div class='del'>-	iphy-&gt;protocol = SCIC_SDS_PHY_PROTOCOL_SATA;</div><div class='add'>+	iphy-&gt;protocol = SAS_PROTOCOL_SATA;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -668,6 +668,19 @@ static const char *phy_event_name(u32 event_code)</div><div class='ctx'> 		phy_to_host(iphy)-&gt;id, iphy-&gt;phy_index, \</div><div class='ctx'> 		phy_state_name(state), phy_event_name(code), code)</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+void scu_link_layer_set_txcomsas_timeout(struct isci_phy *iphy, u32 timeout)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Extend timeout */</div><div class='add'>+	val = readl(&amp;iphy-&gt;link_layer_registers-&gt;transmit_comsas_signal);</div><div class='add'>+	val &amp;= ~SCU_SAS_LLTXCOMSAS_GEN_VAL(NEGTIME, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_MASK);</div><div class='add'>+	val |= SCU_SAS_LLTXCOMSAS_GEN_VAL(NEGTIME, timeout);</div><div class='add'>+</div><div class='add'>+	writel(val, &amp;iphy-&gt;link_layer_registers-&gt;transmit_comsas_signal);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)</div><div class='ctx'> {</div><div class='ctx'> 	enum sci_phy_states state = iphy-&gt;sm.current_state_id;</div><div class='hunk'>@@ -683,6 +696,13 @@ enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)</div><div class='ctx'> 			sci_phy_start_sata_link_training(iphy);</div><div class='ctx'> 			iphy-&gt;is_in_link_training = true;</div><div class='ctx'> 			break;</div><div class='add'>+		case SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT:</div><div class='add'>+		       /* Extend timeout value */</div><div class='add'>+		       scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_EXTENDED);</div><div class='add'>+</div><div class='add'>+		       /* Start the oob/sn state machine over again */</div><div class='add'>+		       sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_STARTING);</div><div class='add'>+		       break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			phy_event_dbg(iphy, state, event_code);</div><div class='ctx'> 			return SCI_FAILURE;</div><div class='hunk'>@@ -717,9 +737,19 @@ enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)</div><div class='ctx'> 			sci_phy_start_sata_link_training(iphy);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case SCU_EVENT_LINK_FAILURE:</div><div class='add'>+			/* Change the timeout value to default */</div><div class='add'>+			scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT);</div><div class='add'>+</div><div class='ctx'> 			/* Link failure change state back to the starting state */</div><div class='ctx'> 			sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_STARTING);</div><div class='ctx'> 			break;</div><div class='add'>+		case SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT:</div><div class='add'>+		       /* Extend the timeout value */</div><div class='add'>+		       scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_EXTENDED);</div><div class='add'>+</div><div class='add'>+		       /* Start the oob/sn state machine over again */</div><div class='add'>+		       sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_STARTING);</div><div class='add'>+		       break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			phy_event_warn(iphy, state, event_code);</div><div class='ctx'> 			return SCI_FAILURE;</div><div class='hunk'>@@ -740,7 +770,14 @@ enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)</div><div class='ctx'> 			sci_phy_start_sata_link_training(iphy);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT:</div><div class='add'>+			/* Extend the timeout value */</div><div class='add'>+			scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_EXTENDED);</div><div class='add'>+</div><div class='add'>+			/* Start the oob/sn state machine over again */</div><div class='add'>+			sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_STARTING);</div><div class='add'>+			break;</div><div class='ctx'> 		case SCU_EVENT_LINK_FAILURE:</div><div class='add'>+			scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT);</div><div class='ctx'> 		case SCU_EVENT_HARD_RESET_RECEIVED:</div><div class='ctx'> 			/* Start the oob/sn state machine over again */</div><div class='ctx'> 			sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_STARTING);</div><div class='hunk'>@@ -753,6 +790,9 @@ enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)</div><div class='ctx'> 	case SCI_PHY_SUB_AWAIT_SAS_POWER:</div><div class='ctx'> 		switch (scu_get_event_code(event_code)) {</div><div class='ctx'> 		case SCU_EVENT_LINK_FAILURE:</div><div class='add'>+			/* Change the timeout value to default */</div><div class='add'>+			scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT);</div><div class='add'>+</div><div class='ctx'> 			/* Link failure change state back to the starting state */</div><div class='ctx'> 			sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_STARTING);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -764,6 +804,9 @@ enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)</div><div class='ctx'> 	case SCI_PHY_SUB_AWAIT_SATA_POWER:</div><div class='ctx'> 		switch (scu_get_event_code(event_code)) {</div><div class='ctx'> 		case SCU_EVENT_LINK_FAILURE:</div><div class='add'>+			/* Change the timeout value to default */</div><div class='add'>+			scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT);</div><div class='add'>+</div><div class='ctx'> 			/* Link failure change state back to the starting state */</div><div class='ctx'> 			sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_STARTING);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -788,6 +831,9 @@ enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)</div><div class='ctx'> 	case SCI_PHY_SUB_AWAIT_SATA_PHY_EN:</div><div class='ctx'> 		switch (scu_get_event_code(event_code)) {</div><div class='ctx'> 		case SCU_EVENT_LINK_FAILURE:</div><div class='add'>+			/* Change the timeout value to default */</div><div class='add'>+			scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT);</div><div class='add'>+</div><div class='ctx'> 			/* Link failure change state back to the starting state */</div><div class='ctx'> 			sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_STARTING);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -797,7 +843,7 @@ enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)</div><div class='ctx'> 			 */</div><div class='ctx'> 			break;</div><div class='ctx'> 		case SCU_EVENT_SATA_PHY_DETECTED:</div><div class='del'>-			iphy-&gt;protocol = SCIC_SDS_PHY_PROTOCOL_SATA;</div><div class='add'>+			iphy-&gt;protocol = SAS_PROTOCOL_SATA;</div><div class='ctx'> </div><div class='ctx'> 			/* We have received the SATA PHY notification change state */</div><div class='ctx'> 			sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_SUB_AWAIT_SATA_SPEED_EN);</div><div class='hunk'>@@ -836,6 +882,9 @@ enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)</div><div class='ctx'> 						       SCI_PHY_SUB_AWAIT_SIG_FIS_UF);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case SCU_EVENT_LINK_FAILURE:</div><div class='add'>+			/* Change the timeout value to default */</div><div class='add'>+			scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT);</div><div class='add'>+</div><div class='ctx'> 			/* Link failure change state back to the starting state */</div><div class='ctx'> 			sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_STARTING);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -859,6 +908,9 @@ enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case SCU_EVENT_LINK_FAILURE:</div><div class='add'>+			/* Change the timeout value to default */</div><div class='add'>+			scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT);</div><div class='add'>+</div><div class='ctx'> 			/* Link failure change state back to the starting state */</div><div class='ctx'> 			sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_STARTING);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -871,16 +923,26 @@ enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code)</div><div class='ctx'> 	case SCI_PHY_READY:</div><div class='ctx'> 		switch (scu_get_event_code(event_code)) {</div><div class='ctx'> 		case SCU_EVENT_LINK_FAILURE:</div><div class='add'>+			/* Set default timeout */</div><div class='add'>+			scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT);</div><div class='add'>+</div><div class='ctx'> 			/* Link failure change state back to the starting state */</div><div class='ctx'> 			sci_change_state(&amp;iphy-&gt;sm, SCI_PHY_STARTING);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case SCU_EVENT_BROADCAST_CHANGE:</div><div class='add'>+		case SCU_EVENT_BROADCAST_SES:</div><div class='add'>+		case SCU_EVENT_BROADCAST_RESERVED0:</div><div class='add'>+		case SCU_EVENT_BROADCAST_RESERVED1:</div><div class='add'>+		case SCU_EVENT_BROADCAST_EXPANDER:</div><div class='add'>+		case SCU_EVENT_BROADCAST_AEN:</div><div class='ctx'> 			/* Broadcast change received. Notify the port. */</div><div class='ctx'> 			if (phy_get_non_dummy_port(iphy) != NULL)</div><div class='ctx'> 				sci_port_broadcast_change_received(iphy-&gt;owning_port, iphy);</div><div class='ctx'> 			else</div><div class='ctx'> 				iphy-&gt;bcn_received_while_port_unassigned = true;</div><div class='ctx'> 			break;</div><div class='add'>+		case SCU_EVENT_BROADCAST_RESERVED3:</div><div class='add'>+		case SCU_EVENT_BROADCAST_RESERVED4:</div><div class='ctx'> 		default:</div><div class='ctx'> 			phy_event_warn(iphy, state, event_code);</div><div class='ctx'> 			return SCI_FAILURE_INVALID_STATE;</div><div class='hunk'>@@ -1215,7 +1277,7 @@ static void sci_phy_starting_state_enter(struct sci_base_state_machine *sm)</div><div class='ctx'> 	scu_link_layer_start_oob(iphy);</div><div class='ctx'> </div><div class='ctx'> 	/* We don't know what kind of phy we are going to be just yet */</div><div class='del'>-	iphy-&gt;protocol = SCIC_SDS_PHY_PROTOCOL_UNKNOWN;</div><div class='add'>+	iphy-&gt;protocol = SAS_PROTOCOL_NONE;</div><div class='ctx'> 	iphy-&gt;bcn_received_while_port_unassigned = false;</div><div class='ctx'> </div><div class='ctx'> 	if (iphy-&gt;sm.previous_state_id == SCI_PHY_READY)</div><div class='hunk'>@@ -1250,7 +1312,7 @@ static void sci_phy_resetting_state_enter(struct sci_base_state_machine *sm)</div><div class='ctx'> 	 */</div><div class='ctx'> 	sci_port_deactivate_phy(iphy-&gt;owning_port, iphy, false);</div><div class='ctx'> </div><div class='del'>-	if (iphy-&gt;protocol == SCIC_SDS_PHY_PROTOCOL_SAS) {</div><div class='add'>+	if (iphy-&gt;protocol == SAS_PROTOCOL_SSP) {</div><div class='ctx'> 		scu_link_layer_tx_hard_reset(iphy);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* The SCU does not need to have a discrete reset state so</div><div class='hunk'>@@ -1316,7 +1378,7 @@ void sci_phy_construct(struct isci_phy *iphy,</div><div class='ctx'> 	iphy-&gt;owning_port = iport;</div><div class='ctx'> 	iphy-&gt;phy_index = phy_index;</div><div class='ctx'> 	iphy-&gt;bcn_received_while_port_unassigned = false;</div><div class='del'>-	iphy-&gt;protocol = SCIC_SDS_PHY_PROTOCOL_UNKNOWN;</div><div class='add'>+	iphy-&gt;protocol = SAS_PROTOCOL_NONE;</div><div class='ctx'> 	iphy-&gt;link_layer_registers = NULL;</div><div class='ctx'> 	iphy-&gt;max_negotiated_speed = SAS_LINK_RATE_UNKNOWN;</div><div class='ctx'> </div><div class='hunk'>@@ -1380,12 +1442,14 @@ int isci_phy_control(struct asd_sas_phy *sas_phy,</div><div class='ctx'> 	switch (func) {</div><div class='ctx'> 	case PHY_FUNC_DISABLE:</div><div class='ctx'> 		spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+		scu_link_layer_start_oob(iphy);</div><div class='ctx'> 		sci_phy_stop(iphy);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case PHY_FUNC_LINK_RESET:</div><div class='ctx'> 		spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+		scu_link_layer_start_oob(iphy);</div><div class='ctx'> 		sci_phy_stop(iphy);</div><div class='ctx'> 		sci_phy_start(iphy);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='head'>diff --git a/drivers/scsi/isci/phy.h b/drivers/scsi/isci/phy.h<br/>index 0e45833ba06d..45fecfa36a98 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/phy.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/phy.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/phy.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/phy.h</a></div><div class='hunk'>@@ -76,13 +76,6 @@</div><div class='ctx'>  */</div><div class='ctx'> #define SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT  250</div><div class='ctx'> </div><div class='del'>-enum sci_phy_protocol {</div><div class='del'>-	SCIC_SDS_PHY_PROTOCOL_UNKNOWN,</div><div class='del'>-	SCIC_SDS_PHY_PROTOCOL_SAS,</div><div class='del'>-	SCIC_SDS_PHY_PROTOCOL_SATA,</div><div class='del'>-	SCIC_SDS_MAX_PHY_PROTOCOLS</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * isci_phy - hba local phy infrastructure</div><div class='ctx'>  * @sm:</div><div class='hunk'>@@ -95,7 +88,7 @@ struct isci_phy {</div><div class='ctx'> 	struct sci_base_state_machine sm;</div><div class='ctx'> 	struct isci_port *owning_port;</div><div class='ctx'> 	enum sas_linkrate max_negotiated_speed;</div><div class='del'>-	enum sci_phy_protocol protocol;</div><div class='add'>+	enum sas_protocol protocol;</div><div class='ctx'> 	u8 phy_index;</div><div class='ctx'> 	bool bcn_received_while_port_unassigned;</div><div class='ctx'> 	bool is_in_link_training;</div><div class='head'>diff --git a/drivers/scsi/isci/port.c b/drivers/scsi/isci/port.c<br/>index 5fada73b71ff..2fb85bf75449 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/port.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/port.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/port.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/port.c</a></div><div class='hunk'>@@ -184,7 +184,7 @@ static void isci_port_link_up(struct isci_host *isci_host,</div><div class='ctx'> </div><div class='ctx'> 	sci_port_get_properties(iport, &amp;properties);</div><div class='ctx'> </div><div class='del'>-	if (iphy-&gt;protocol == SCIC_SDS_PHY_PROTOCOL_SATA) {</div><div class='add'>+	if (iphy-&gt;protocol == SAS_PROTOCOL_SATA) {</div><div class='ctx'> 		u64 attached_sas_address;</div><div class='ctx'> </div><div class='ctx'> 		iphy-&gt;sas_phy.oob_mode = SATA_OOB_MODE;</div><div class='hunk'>@@ -204,7 +204,7 @@ static void isci_port_link_up(struct isci_host *isci_host,</div><div class='ctx'> </div><div class='ctx'> 		memcpy(&amp;iphy-&gt;sas_phy.attached_sas_addr,</div><div class='ctx'> 		       &amp;attached_sas_address, sizeof(attached_sas_address));</div><div class='del'>-	} else if (iphy-&gt;protocol == SCIC_SDS_PHY_PROTOCOL_SAS) {</div><div class='add'>+	} else if (iphy-&gt;protocol == SAS_PROTOCOL_SSP) {</div><div class='ctx'> 		iphy-&gt;sas_phy.oob_mode = SAS_OOB_MODE;</div><div class='ctx'> 		iphy-&gt;sas_phy.frame_rcvd_size = sizeof(struct sas_identify_frame);</div><div class='ctx'> </div><div class='hunk'>@@ -251,10 +251,10 @@ static void isci_port_link_down(struct isci_host *isci_host,</div><div class='ctx'> 		if (isci_phy-&gt;sas_phy.port &amp;&amp;</div><div class='ctx'> 		    isci_phy-&gt;sas_phy.port-&gt;num_phys == 1) {</div><div class='ctx'> 			/* change the state for all devices on this port.  The</div><div class='del'>-			 * next task sent to this device will be returned as</div><div class='del'>-			 * SAS_TASK_UNDELIVERED, and the scsi mid layer will</div><div class='del'>-			 * remove the target</div><div class='del'>-			 */</div><div class='add'>+			* next task sent to this device will be returned as</div><div class='add'>+			* SAS_TASK_UNDELIVERED, and the scsi mid layer will</div><div class='add'>+			* remove the target</div><div class='add'>+			*/</div><div class='ctx'> 			list_for_each_entry(isci_device,</div><div class='ctx'> 					    &amp;isci_port-&gt;remote_dev_list,</div><div class='ctx'> 					    node) {</div><div class='hunk'>@@ -517,7 +517,7 @@ void sci_port_get_attached_sas_address(struct isci_port *iport, struct sci_sas_a</div><div class='ctx'> 	 */</div><div class='ctx'> 	iphy = sci_port_get_a_connected_phy(iport);</div><div class='ctx'> 	if (iphy) {</div><div class='del'>-		if (iphy-&gt;protocol != SCIC_SDS_PHY_PROTOCOL_SATA) {</div><div class='add'>+		if (iphy-&gt;protocol != SAS_PROTOCOL_SATA) {</div><div class='ctx'> 			sci_phy_get_attached_sas_address(iphy, sas);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			sci_phy_get_sas_address(iphy, sas);</div><div class='hunk'>@@ -624,7 +624,7 @@ static void sci_port_activate_phy(struct isci_port *iport,</div><div class='ctx'> {</div><div class='ctx'> 	struct isci_host *ihost = iport-&gt;owning_controller;</div><div class='ctx'> </div><div class='del'>-	if (iphy-&gt;protocol != SCIC_SDS_PHY_PROTOCOL_SATA &amp;&amp; (flags &amp; PF_RESUME))</div><div class='add'>+	if (iphy-&gt;protocol != SAS_PROTOCOL_SATA &amp;&amp; (flags &amp; PF_RESUME))</div><div class='ctx'> 		sci_phy_resume(iphy);</div><div class='ctx'> </div><div class='ctx'> 	iport-&gt;active_phy_mask |= 1 &lt;&lt; iphy-&gt;phy_index;</div><div class='hunk'>@@ -751,12 +751,10 @@ static bool sci_port_is_wide(struct isci_port *iport)</div><div class='ctx'>  * wide ports and direct attached phys.  Since there are no wide ported SATA</div><div class='ctx'>  * devices this could become an invalid port configuration.</div><div class='ctx'>  */</div><div class='del'>-bool sci_port_link_detected(</div><div class='del'>-	struct isci_port *iport,</div><div class='del'>-	struct isci_phy *iphy)</div><div class='add'>+bool sci_port_link_detected(struct isci_port *iport, struct isci_phy *iphy)</div><div class='ctx'> {</div><div class='ctx'> 	if ((iport-&gt;logical_port_index != SCIC_SDS_DUMMY_PORT) &amp;&amp;</div><div class='del'>-	    (iphy-&gt;protocol == SCIC_SDS_PHY_PROTOCOL_SATA)) {</div><div class='add'>+	    (iphy-&gt;protocol == SAS_PROTOCOL_SATA)) {</div><div class='ctx'> 		if (sci_port_is_wide(iport)) {</div><div class='ctx'> 			sci_port_invalid_link_up(iport, iphy);</div><div class='ctx'> 			return false;</div><div class='hunk'>@@ -1201,6 +1199,8 @@ enum sci_status sci_port_add_phy(struct isci_port *iport,</div><div class='ctx'> 	enum sci_status status;</div><div class='ctx'> 	enum sci_port_states state;</div><div class='ctx'> </div><div class='add'>+	sci_port_bcn_enable(iport);</div><div class='add'>+</div><div class='ctx'> 	state = iport-&gt;sm.current_state_id;</div><div class='ctx'> 	switch (state) {</div><div class='ctx'> 	case SCI_PORT_STOPPED: {</div><div class='hunk'>@@ -1548,6 +1548,29 @@ static void sci_port_failed_state_enter(struct sci_base_state_machine *sm)</div><div class='ctx'> 	isci_port_hard_reset_complete(iport, SCI_FAILURE_TIMEOUT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void sci_port_set_hang_detection_timeout(struct isci_port *iport, u32 timeout)</div><div class='add'>+{</div><div class='add'>+	int phy_index;</div><div class='add'>+	u32 phy_mask = iport-&gt;active_phy_mask;</div><div class='add'>+</div><div class='add'>+	if (timeout)</div><div class='add'>+		++iport-&gt;hang_detect_users;</div><div class='add'>+	else if (iport-&gt;hang_detect_users &gt; 1)</div><div class='add'>+		--iport-&gt;hang_detect_users;</div><div class='add'>+	else</div><div class='add'>+		iport-&gt;hang_detect_users = 0;</div><div class='add'>+</div><div class='add'>+	if (timeout || (iport-&gt;hang_detect_users == 0)) {</div><div class='add'>+		for (phy_index = 0; phy_index &lt; SCI_MAX_PHYS; phy_index++) {</div><div class='add'>+			if ((phy_mask &gt;&gt; phy_index) &amp; 1) {</div><div class='add'>+				writel(timeout,</div><div class='add'>+				       &amp;iport-&gt;phy_table[phy_index]</div><div class='add'>+					  -&gt;link_layer_registers</div><div class='add'>+					  -&gt;link_layer_hang_detection_timeout);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> /* --------------------------------------------------------------------------- */</div><div class='ctx'> </div><div class='ctx'> static const struct sci_base_state sci_port_state_table[] = {</div><div class='hunk'>@@ -1596,6 +1619,7 @@ void sci_port_construct(struct isci_port *iport, u8 index,</div><div class='ctx'> </div><div class='ctx'> 	iport-&gt;started_request_count = 0;</div><div class='ctx'> 	iport-&gt;assigned_device_count = 0;</div><div class='add'>+	iport-&gt;hang_detect_users = 0;</div><div class='ctx'> </div><div class='ctx'> 	iport-&gt;reserved_rni = SCU_DUMMY_INDEX;</div><div class='ctx'> 	iport-&gt;reserved_tag = SCI_CONTROLLER_INVALID_IO_TAG;</div><div class='hunk'>@@ -1608,13 +1632,6 @@ void sci_port_construct(struct isci_port *iport, u8 index,</div><div class='ctx'> 		iport-&gt;phy_table[index] = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void isci_port_init(struct isci_port *iport, struct isci_host *ihost, int index)</div><div class='del'>-{</div><div class='del'>-	INIT_LIST_HEAD(&amp;iport-&gt;remote_dev_list);</div><div class='del'>-	INIT_LIST_HEAD(&amp;iport-&gt;domain_dev_list);</div><div class='del'>-	iport-&gt;isci_host = ihost;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void sci_port_broadcast_change_received(struct isci_port *iport, struct isci_phy *iphy)</div><div class='ctx'> {</div><div class='ctx'> 	struct isci_host *ihost = iport-&gt;owning_controller;</div><div class='hunk'>@@ -1671,17 +1688,6 @@ int isci_port_perform_hard_reset(struct isci_host *ihost, struct isci_port *ipor</div><div class='ctx'> 			__func__, iport, status);</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	/* If the hard reset for the port has failed, consider this</div><div class='del'>-	 * the same as link failures on all phys in the port.</div><div class='del'>-	 */</div><div class='del'>-	if (ret != TMF_RESP_FUNC_COMPLETE) {</div><div class='del'>-</div><div class='del'>-		dev_err(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			"%s: iport = %p; hard reset failed "</div><div class='del'>-			"(0x%x) - driving explicit link fail for all phys\n",</div><div class='del'>-			__func__, iport, iport-&gt;hard_reset_status);</div><div class='del'>-	}</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1740,7 +1746,7 @@ void isci_port_formed(struct asd_sas_phy *phy)</div><div class='ctx'> 	struct isci_host *ihost = phy-&gt;ha-&gt;lldd_ha;</div><div class='ctx'> 	struct isci_phy *iphy = to_iphy(phy);</div><div class='ctx'> 	struct asd_sas_port *port = phy-&gt;port;</div><div class='del'>-	struct isci_port *iport;</div><div class='add'>+	struct isci_port *iport = NULL;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/isci/port.h b/drivers/scsi/isci/port.h<br/>index 6b56240c2051..861e8f72811b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/port.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/port.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/port.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/port.h</a></div><div class='hunk'>@@ -97,7 +97,6 @@ enum isci_status {</div><div class='ctx'> struct isci_port {</div><div class='ctx'> 	struct isci_host *isci_host;</div><div class='ctx'> 	struct list_head remote_dev_list;</div><div class='del'>-	struct list_head domain_dev_list;</div><div class='ctx'> 	#define IPORT_RESET_PENDING 0</div><div class='ctx'> 	unsigned long state;</div><div class='ctx'> 	enum sci_status hard_reset_status;</div><div class='hunk'>@@ -112,6 +111,7 @@ struct isci_port {</div><div class='ctx'> 	u16 reserved_tag;</div><div class='ctx'> 	u32 started_request_count;</div><div class='ctx'> 	u32 assigned_device_count;</div><div class='add'>+	u32 hang_detect_users;</div><div class='ctx'> 	u32 not_ready_reason;</div><div class='ctx'> 	struct isci_phy *phy_table[SCI_MAX_PHYS];</div><div class='ctx'> 	struct isci_host *owning_controller;</div><div class='hunk'>@@ -270,14 +270,13 @@ void sci_port_get_attached_sas_address(</div><div class='ctx'> 	struct isci_port *iport,</div><div class='ctx'> 	struct sci_sas_address *sas_address);</div><div class='ctx'> </div><div class='add'>+void sci_port_set_hang_detection_timeout(</div><div class='add'>+	struct isci_port *isci_port,</div><div class='add'>+	u32 timeout);</div><div class='add'>+</div><div class='ctx'> void isci_port_formed(struct asd_sas_phy *);</div><div class='ctx'> void isci_port_deformed(struct asd_sas_phy *);</div><div class='ctx'> </div><div class='del'>-void isci_port_init(</div><div class='del'>-	struct isci_port *port,</div><div class='del'>-	struct isci_host *host,</div><div class='del'>-	int index);</div><div class='del'>-</div><div class='ctx'> int isci_port_perform_hard_reset(struct isci_host *ihost, struct isci_port *iport,</div><div class='ctx'> 				 struct isci_phy *iphy);</div><div class='ctx'> int isci_ata_check_ready(struct domain_device *dev);</div><div class='head'>diff --git a/drivers/scsi/isci/port_config.c b/drivers/scsi/isci/port_config.c<br/>index 6d1e9544cbe5..cd962da4a57a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/port_config.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/port_config.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/port_config.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/port_config.c</a></div><div class='hunk'>@@ -57,7 +57,7 @@</div><div class='ctx'> </div><div class='ctx'> #define SCIC_SDS_MPC_RECONFIGURATION_TIMEOUT    (10)</div><div class='ctx'> #define SCIC_SDS_APC_RECONFIGURATION_TIMEOUT    (10)</div><div class='del'>-#define SCIC_SDS_APC_WAIT_LINK_UP_NOTIFICATION  (250)</div><div class='add'>+#define SCIC_SDS_APC_WAIT_LINK_UP_NOTIFICATION  (1000)</div><div class='ctx'> </div><div class='ctx'> enum SCIC_SDS_APC_ACTIVITY {</div><div class='ctx'> 	SCIC_SDS_APC_SKIP_PHY,</div><div class='hunk'>@@ -472,13 +472,9 @@ sci_apc_agent_validate_phy_configuration(struct isci_host *ihost,</div><div class='ctx'>  * down event or a link up event where we can not yet tell to which a phy</div><div class='ctx'>  * belongs.</div><div class='ctx'>  */</div><div class='del'>-static void sci_apc_agent_start_timer(</div><div class='del'>-	struct sci_port_configuration_agent *port_agent,</div><div class='del'>-	u32 timeout)</div><div class='add'>+static void sci_apc_agent_start_timer(struct sci_port_configuration_agent *port_agent,</div><div class='add'>+				      u32 timeout)</div><div class='ctx'> {</div><div class='del'>-	if (port_agent-&gt;timer_pending)</div><div class='del'>-		sci_del_timer(&amp;port_agent-&gt;timer);</div><div class='del'>-</div><div class='ctx'> 	port_agent-&gt;timer_pending = true;</div><div class='ctx'> 	sci_mod_timer(&amp;port_agent-&gt;timer, timeout);</div><div class='ctx'> }</div><div class='hunk'>@@ -697,6 +693,9 @@ static void apc_agent_timeout(unsigned long data)</div><div class='ctx'> 						   &amp;ihost-&gt;phys[index], false);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (is_controller_start_complete(ihost))</div><div class='add'>+		sci_controller_transition_to_ready(ihost, SCI_SUCCESS);</div><div class='add'>+</div><div class='ctx'> done:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> }</div><div class='hunk'>@@ -732,6 +731,11 @@ void sci_port_configuration_agent_construct(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool is_port_config_apc(struct isci_host *ihost)</div><div class='add'>+{</div><div class='add'>+	return ihost-&gt;port_agent.link_up_handler == sci_apc_agent_link_up;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> enum sci_status sci_port_configuration_agent_initialize(</div><div class='ctx'> 	struct isci_host *ihost,</div><div class='ctx'> 	struct sci_port_configuration_agent *port_agent)</div><div class='head'>diff --git a/drivers/scsi/isci/probe_roms.c b/drivers/scsi/isci/probe_roms.c<br/>index 9b8117b9d756..4d95654c3fd4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/probe_roms.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/probe_roms.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/probe_roms.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/probe_roms.c</a></div><div class='hunk'>@@ -112,18 +112,6 @@ struct isci_orom *isci_request_oprom(struct pci_dev *pdev)</div><div class='ctx'> 	return rom;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum sci_status isci_parse_oem_parameters(struct sci_oem_params *oem,</div><div class='del'>-					  struct isci_orom *orom, int scu_index)</div><div class='del'>-{</div><div class='del'>-	/* check for valid inputs */</div><div class='del'>-	if (scu_index &lt; 0 || scu_index &gt;= SCI_MAX_CONTROLLERS ||</div><div class='del'>-	    scu_index &gt; orom-&gt;hdr.num_elements || !oem)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	*oem = orom-&gt;ctrl[scu_index];</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct isci_orom *isci_request_firmware(struct pci_dev *pdev, const struct firmware *fw)</div><div class='ctx'> {</div><div class='ctx'> 	struct isci_orom *orom = NULL, *data;</div><div class='head'>diff --git a/drivers/scsi/isci/probe_roms.h b/drivers/scsi/isci/probe_roms.h<br/>index bb0e9d4d97c9..e08b578241f8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/probe_roms.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/probe_roms.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/probe_roms.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/probe_roms.h</a></div><div class='hunk'>@@ -156,8 +156,6 @@ int sci_oem_parameters_validate(struct sci_oem_params *oem, u8 version);</div><div class='ctx'> </div><div class='ctx'> struct isci_orom;</div><div class='ctx'> struct isci_orom *isci_request_oprom(struct pci_dev *pdev);</div><div class='del'>-enum sci_status isci_parse_oem_parameters(struct sci_oem_params *oem,</div><div class='del'>-					  struct isci_orom *orom, int scu_index);</div><div class='ctx'> struct isci_orom *isci_request_firmware(struct pci_dev *pdev, const struct firmware *fw);</div><div class='ctx'> struct isci_orom *isci_get_efi_var(struct pci_dev *pdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/isci/registers.h b/drivers/scsi/isci/registers.h<br/>index 7eb0ccd45fe6..97f3ceb8d724 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/registers.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/registers.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/registers.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/registers.h</a></div><div class='hunk'>@@ -1239,6 +1239,14 @@ struct scu_transport_layer_registers {</div><div class='ctx'> #define SCU_SAS_LLCTL_GEN_BIT(name) \</div><div class='ctx'> 	SCU_GEN_BIT(SCU_SAS_LINK_LAYER_CONTROL_ ## name)</div><div class='ctx'> </div><div class='add'>+#define SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT                     (0xF0)</div><div class='add'>+#define SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_EXTENDED                    (0x1FF)</div><div class='add'>+#define SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_SHIFT                       (0)</div><div class='add'>+#define SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_MASK                        (0x3FF)</div><div class='add'>+</div><div class='add'>+#define SCU_SAS_LLTXCOMSAS_GEN_VAL(name, value) \</div><div class='add'>+	SCU_GEN_VALUE(SCU_SAS_LINK_LAYER_TXCOMSAS_ ## name, value)</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /* #define SCU_FRXHECR_DCNT_OFFSET      0x00B0 */</div><div class='ctx'> #define SCU_PSZGCR_OFFSET           0x00E4</div><div class='head'>diff --git a/drivers/scsi/isci/remote_device.c b/drivers/scsi/isci/remote_device.c<br/>index 8f501b0a81d6..c3aa6c5457b9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/remote_device.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/remote_device.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/remote_device.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/remote_device.c</a></div><div class='hunk'>@@ -72,46 +72,11 @@ const char *dev_state_name(enum sci_remote_device_states state)</div><div class='ctx'> }</div><div class='ctx'> #undef C</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * isci_remote_device_not_ready() - This function is called by the ihost when</div><div class='del'>- *    the remote device is not ready. We mark the isci device as ready (not</div><div class='del'>- *    "ready_for_io") and signal the waiting proccess.</div><div class='del'>- * @isci_host: This parameter specifies the isci host object.</div><div class='del'>- * @isci_device: This parameter specifies the remote device</div><div class='del'>- *</div><div class='del'>- * sci_lock is held on entrance to this function.</div><div class='del'>- */</div><div class='del'>-static void isci_remote_device_not_ready(struct isci_host *ihost,</div><div class='del'>-				  struct isci_remote_device *idev, u32 reason)</div><div class='add'>+enum sci_status sci_remote_device_suspend(struct isci_remote_device *idev,</div><div class='add'>+					  enum sci_remote_node_suspension_reasons reason)</div><div class='ctx'> {</div><div class='del'>-	struct isci_request *ireq;</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-		"%s: isci_device = %p\n", __func__, idev);</div><div class='del'>-</div><div class='del'>-	switch (reason) {</div><div class='del'>-	case SCIC_REMOTE_DEVICE_NOT_READY_STOP_REQUESTED:</div><div class='del'>-		set_bit(IDEV_GONE, &amp;idev-&gt;flags);</div><div class='del'>-		break;</div><div class='del'>-	case SCIC_REMOTE_DEVICE_NOT_READY_SATA_SDB_ERROR_FIS_RECEIVED:</div><div class='del'>-		set_bit(IDEV_IO_NCQERROR, &amp;idev-&gt;flags);</div><div class='del'>-</div><div class='del'>-		/* Kill all outstanding requests for the device. */</div><div class='del'>-		list_for_each_entry(ireq, &amp;idev-&gt;reqs_in_process, dev_node) {</div><div class='del'>-</div><div class='del'>-			dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-				"%s: isci_device = %p request = %p\n",</div><div class='del'>-				__func__, idev, ireq);</div><div class='del'>-</div><div class='del'>-			sci_controller_terminate_request(ihost,</div><div class='del'>-							  idev,</div><div class='del'>-							  ireq);</div><div class='del'>-		}</div><div class='del'>-		/* Fall through into the default case... */</div><div class='del'>-	default:</div><div class='del'>-		clear_bit(IDEV_IO_READY, &amp;idev-&gt;flags);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	return sci_remote_node_context_suspend(&amp;idev-&gt;rnc, reason,</div><div class='add'>+					       SCI_SOFTWARE_SUSPEND_EXPECTED_EVENT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -133,18 +98,29 @@ static void isci_remote_device_ready(struct isci_host *ihost, struct isci_remote</div><div class='ctx'> 		wake_up(&amp;ihost-&gt;eventq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* called once the remote node context is ready to be freed.</div><div class='del'>- * The remote device can now report that its stop operation is complete. none</div><div class='del'>- */</div><div class='del'>-static void rnc_destruct_done(void *_dev)</div><div class='add'>+static enum sci_status sci_remote_device_terminate_req(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev,</div><div class='add'>+	int check_abort,</div><div class='add'>+	struct isci_request *ireq)</div><div class='ctx'> {</div><div class='del'>-	struct isci_remote_device *idev = _dev;</div><div class='add'>+	if (!test_bit(IREQ_ACTIVE, &amp;ireq-&gt;flags) ||</div><div class='add'>+	    (ireq-&gt;target_device != idev) ||</div><div class='add'>+	    (check_abort &amp;&amp; !test_bit(IREQ_PENDING_ABORT, &amp;ireq-&gt;flags)))</div><div class='add'>+		return SCI_SUCCESS;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(idev-&gt;started_request_count != 0);</div><div class='del'>-	sci_change_state(&amp;idev-&gt;sm, SCI_DEV_STOPPED);</div><div class='add'>+	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+		"%s: idev=%p; flags=%lx; req=%p; req target=%p\n",</div><div class='add'>+		__func__, idev, idev-&gt;flags, ireq, ireq-&gt;target_device);</div><div class='add'>+</div><div class='add'>+	set_bit(IREQ_ABORT_PATH_ACTIVE, &amp;ireq-&gt;flags);</div><div class='add'>+</div><div class='add'>+	return sci_controller_terminate_request(ihost, idev, ireq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum sci_status sci_remote_device_terminate_requests(struct isci_remote_device *idev)</div><div class='add'>+static enum sci_status sci_remote_device_terminate_reqs_checkabort(</div><div class='add'>+	struct isci_remote_device *idev,</div><div class='add'>+	int chk)</div><div class='ctx'> {</div><div class='ctx'> 	struct isci_host *ihost = idev-&gt;owning_port-&gt;owning_controller;</div><div class='ctx'> 	enum sci_status status  = SCI_SUCCESS;</div><div class='hunk'>@@ -154,18 +130,210 @@ static enum sci_status sci_remote_device_terminate_requests(struct isci_remote_d</div><div class='ctx'> 		struct isci_request *ireq = ihost-&gt;reqs[i];</div><div class='ctx'> 		enum sci_status s;</div><div class='ctx'> </div><div class='del'>-		if (!test_bit(IREQ_ACTIVE, &amp;ireq-&gt;flags) ||</div><div class='del'>-		    ireq-&gt;target_device != idev)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		s = sci_controller_terminate_request(ihost, idev, ireq);</div><div class='add'>+		s = sci_remote_device_terminate_req(ihost, idev, chk, ireq);</div><div class='ctx'> 		if (s != SCI_SUCCESS)</div><div class='ctx'> 			status = s;</div><div class='ctx'> 	}</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool isci_compare_suspendcount(</div><div class='add'>+	struct isci_remote_device *idev,</div><div class='add'>+	u32 localcount)</div><div class='add'>+{</div><div class='add'>+	smp_rmb();</div><div class='add'>+</div><div class='add'>+	/* Check for a change in the suspend count, or the RNC</div><div class='add'>+	 * being destroyed.</div><div class='add'>+	 */</div><div class='add'>+	return (localcount != idev-&gt;rnc.suspend_count)</div><div class='add'>+	    || sci_remote_node_context_is_being_destroyed(&amp;idev-&gt;rnc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool isci_check_reqterm(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev,</div><div class='add'>+	struct isci_request *ireq,</div><div class='add'>+	u32 localcount)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool res;</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+	res = isci_compare_suspendcount(idev, localcount)</div><div class='add'>+		&amp;&amp; !test_bit(IREQ_ABORT_PATH_ACTIVE, &amp;ireq-&gt;flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool isci_check_devempty(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev,</div><div class='add'>+	u32 localcount)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool res;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+	res = isci_compare_suspendcount(idev, localcount)</div><div class='add'>+		&amp;&amp; idev-&gt;started_request_count == 0;</div><div class='add'>+	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum sci_status isci_remote_device_terminate_requests(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev,</div><div class='add'>+	struct isci_request *ireq)</div><div class='add'>+{</div><div class='add'>+	enum sci_status status = SCI_SUCCESS;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 rnc_suspend_count;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (isci_get_device(idev) == NULL) {</div><div class='add'>+		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev, "%s: failed isci_get_device(idev=%p)\n",</div><div class='add'>+			__func__, idev);</div><div class='add'>+		spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+		status = SCI_FAILURE;</div><div class='add'>+	} else {</div><div class='add'>+		/* If already suspended, don't wait for another suspension. */</div><div class='add'>+		smp_rmb();</div><div class='add'>+		rnc_suspend_count</div><div class='add'>+			= sci_remote_node_context_is_suspended(&amp;idev-&gt;rnc)</div><div class='add'>+				? 0 : idev-&gt;rnc.suspend_count;</div><div class='add'>+</div><div class='add'>+		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+			"%s: idev=%p, ireq=%p; started_request_count=%d, "</div><div class='add'>+				"rnc_suspend_count=%d, rnc.suspend_count=%d"</div><div class='add'>+				"about to wait\n",</div><div class='add'>+			__func__, idev, ireq, idev-&gt;started_request_count,</div><div class='add'>+			rnc_suspend_count, idev-&gt;rnc.suspend_count);</div><div class='add'>+</div><div class='add'>+		#define MAX_SUSPEND_MSECS 10000</div><div class='add'>+		if (ireq) {</div><div class='add'>+			/* Terminate a specific TC. */</div><div class='add'>+			set_bit(IREQ_NO_AUTO_FREE_TAG, &amp;ireq-&gt;flags);</div><div class='add'>+			sci_remote_device_terminate_req(ihost, idev, 0, ireq);</div><div class='add'>+			spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+			if (!wait_event_timeout(ihost-&gt;eventq,</div><div class='add'>+						isci_check_reqterm(ihost, idev, ireq,</div><div class='add'>+								   rnc_suspend_count),</div><div class='add'>+						msecs_to_jiffies(MAX_SUSPEND_MSECS))) {</div><div class='add'>+</div><div class='add'>+				dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "%s host%d timeout single\n",</div><div class='add'>+					 __func__, ihost-&gt;id);</div><div class='add'>+				dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+					 "%s: ******* Timeout waiting for "</div><div class='add'>+					 "suspend; idev=%p, current state %s; "</div><div class='add'>+					 "started_request_count=%d, flags=%lx\n\t"</div><div class='add'>+					 "rnc_suspend_count=%d, rnc.suspend_count=%d "</div><div class='add'>+					 "RNC: current state %s, current "</div><div class='add'>+					 "suspend_type %x dest state %d;\n"</div><div class='add'>+					 "ireq=%p, ireq-&gt;flags = %lx\n",</div><div class='add'>+					 __func__, idev,</div><div class='add'>+					 dev_state_name(idev-&gt;sm.current_state_id),</div><div class='add'>+					 idev-&gt;started_request_count, idev-&gt;flags,</div><div class='add'>+					 rnc_suspend_count, idev-&gt;rnc.suspend_count,</div><div class='add'>+					 rnc_state_name(idev-&gt;rnc.sm.current_state_id),</div><div class='add'>+					 idev-&gt;rnc.suspend_type,</div><div class='add'>+					 idev-&gt;rnc.destination_state,</div><div class='add'>+					 ireq, ireq-&gt;flags);</div><div class='add'>+			}</div><div class='add'>+			spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+			clear_bit(IREQ_NO_AUTO_FREE_TAG, &amp;ireq-&gt;flags);</div><div class='add'>+			if (!test_bit(IREQ_ABORT_PATH_ACTIVE, &amp;ireq-&gt;flags))</div><div class='add'>+				isci_free_tag(ihost, ireq-&gt;io_tag);</div><div class='add'>+			spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+		} else {</div><div class='add'>+			/* Terminate all TCs. */</div><div class='add'>+			sci_remote_device_terminate_requests(idev);</div><div class='add'>+			spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+			if (!wait_event_timeout(ihost-&gt;eventq,</div><div class='add'>+						isci_check_devempty(ihost, idev,</div><div class='add'>+								    rnc_suspend_count),</div><div class='add'>+						msecs_to_jiffies(MAX_SUSPEND_MSECS))) {</div><div class='add'>+</div><div class='add'>+				dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "%s host%d timeout all\n",</div><div class='add'>+					 __func__, ihost-&gt;id);</div><div class='add'>+				dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+					"%s: ******* Timeout waiting for "</div><div class='add'>+					"suspend; idev=%p, current state %s; "</div><div class='add'>+					"started_request_count=%d, flags=%lx\n\t"</div><div class='add'>+					"rnc_suspend_count=%d, "</div><div class='add'>+					"RNC: current state %s, "</div><div class='add'>+					"rnc.suspend_count=%d, current "</div><div class='add'>+					"suspend_type %x dest state %d\n",</div><div class='add'>+					__func__, idev,</div><div class='add'>+					dev_state_name(idev-&gt;sm.current_state_id),</div><div class='add'>+					idev-&gt;started_request_count, idev-&gt;flags,</div><div class='add'>+					rnc_suspend_count,</div><div class='add'>+					rnc_state_name(idev-&gt;rnc.sm.current_state_id),</div><div class='add'>+					idev-&gt;rnc.suspend_count,</div><div class='add'>+					idev-&gt;rnc.suspend_type,</div><div class='add'>+					idev-&gt;rnc.destination_state);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev, "%s: idev=%p, wait done\n",</div><div class='add'>+			__func__, idev);</div><div class='add'>+		isci_put_device(idev);</div><div class='add'>+	}</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+* isci_remote_device_not_ready() - This function is called by the ihost when</div><div class='add'>+*    the remote device is not ready. We mark the isci device as ready (not</div><div class='add'>+*    "ready_for_io") and signal the waiting proccess.</div><div class='add'>+* @isci_host: This parameter specifies the isci host object.</div><div class='add'>+* @isci_device: This parameter specifies the remote device</div><div class='add'>+*</div><div class='add'>+* sci_lock is held on entrance to this function.</div><div class='add'>+*/</div><div class='add'>+static void isci_remote_device_not_ready(struct isci_host *ihost,</div><div class='add'>+					 struct isci_remote_device *idev,</div><div class='add'>+					 u32 reason)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+		"%s: isci_device = %p; reason = %d\n", __func__, idev, reason);</div><div class='add'>+</div><div class='add'>+	switch (reason) {</div><div class='add'>+	case SCIC_REMOTE_DEVICE_NOT_READY_SATA_SDB_ERROR_FIS_RECEIVED:</div><div class='add'>+		set_bit(IDEV_IO_NCQERROR, &amp;idev-&gt;flags);</div><div class='add'>+</div><div class='add'>+		/* Suspend the remote device so the I/O can be terminated. */</div><div class='add'>+		sci_remote_device_suspend(idev, SCI_SW_SUSPEND_NORMAL);</div><div class='add'>+</div><div class='add'>+		/* Kill all outstanding requests for the device. */</div><div class='add'>+		sci_remote_device_terminate_requests(idev);</div><div class='add'>+</div><div class='add'>+		/* Fall through into the default case... */</div><div class='add'>+	default:</div><div class='add'>+		clear_bit(IDEV_IO_READY, &amp;idev-&gt;flags);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* called once the remote node context is ready to be freed.</div><div class='add'>+ * The remote device can now report that its stop operation is complete. none</div><div class='add'>+ */</div><div class='add'>+static void rnc_destruct_done(void *_dev)</div><div class='add'>+{</div><div class='add'>+	struct isci_remote_device *idev = _dev;</div><div class='add'>+</div><div class='add'>+	BUG_ON(idev-&gt;started_request_count != 0);</div><div class='add'>+	sci_change_state(&amp;idev-&gt;sm, SCI_DEV_STOPPED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum sci_status sci_remote_device_terminate_requests(</div><div class='add'>+	struct isci_remote_device *idev)</div><div class='add'>+{</div><div class='add'>+	return sci_remote_device_terminate_reqs_checkabort(idev, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> enum sci_status sci_remote_device_stop(struct isci_remote_device *idev,</div><div class='ctx'> 					u32 timeout)</div><div class='ctx'> {</div><div class='hunk'>@@ -201,13 +369,16 @@ enum sci_status sci_remote_device_stop(struct isci_remote_device *idev,</div><div class='ctx'> 	case SCI_SMP_DEV_IDLE:</div><div class='ctx'> 	case SCI_SMP_DEV_CMD:</div><div class='ctx'> 		sci_change_state(sm, SCI_DEV_STOPPING);</div><div class='del'>-		if (idev-&gt;started_request_count == 0) {</div><div class='add'>+		if (idev-&gt;started_request_count == 0)</div><div class='ctx'> 			sci_remote_node_context_destruct(&amp;idev-&gt;rnc,</div><div class='del'>-							      rnc_destruct_done, idev);</div><div class='del'>-			return SCI_SUCCESS;</div><div class='del'>-		} else</div><div class='del'>-			return sci_remote_device_terminate_requests(idev);</div><div class='del'>-		break;</div><div class='add'>+							 rnc_destruct_done,</div><div class='add'>+							 idev);</div><div class='add'>+		else {</div><div class='add'>+			sci_remote_device_suspend(</div><div class='add'>+				idev, SCI_SW_SUSPEND_LINKHANG_DETECT);</div><div class='add'>+			sci_remote_device_terminate_requests(idev);</div><div class='add'>+		}</div><div class='add'>+		return SCI_SUCCESS;</div><div class='ctx'> 	case SCI_DEV_STOPPING:</div><div class='ctx'> 		/* All requests should have been terminated, but if there is an</div><div class='ctx'> 		 * attempt to stop a device already in the stopping state, then</div><div class='hunk'>@@ -265,22 +436,6 @@ enum sci_status sci_remote_device_reset_complete(struct isci_remote_device *idev</div><div class='ctx'> 	return SCI_SUCCESS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum sci_status sci_remote_device_suspend(struct isci_remote_device *idev,</div><div class='del'>-					       u32 suspend_type)</div><div class='del'>-{</div><div class='del'>-	struct sci_base_state_machine *sm = &amp;idev-&gt;sm;</div><div class='del'>-	enum sci_remote_device_states state = sm-&gt;current_state_id;</div><div class='del'>-</div><div class='del'>-	if (state != SCI_STP_DEV_CMD) {</div><div class='del'>-		dev_warn(scirdev_to_dev(idev), "%s: in wrong state: %s\n",</div><div class='del'>-			 __func__, dev_state_name(state));</div><div class='del'>-		return SCI_FAILURE_INVALID_STATE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return sci_remote_node_context_suspend(&amp;idev-&gt;rnc,</div><div class='del'>-						    suspend_type, NULL, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> enum sci_status sci_remote_device_frame_handler(struct isci_remote_device *idev,</div><div class='ctx'> 						     u32 frame_index)</div><div class='ctx'> {</div><div class='hunk'>@@ -412,9 +567,9 @@ static void atapi_remote_device_resume_done(void *_dev)</div><div class='ctx'> enum sci_status sci_remote_device_event_handler(struct isci_remote_device *idev,</div><div class='ctx'> 						     u32 event_code)</div><div class='ctx'> {</div><div class='add'>+	enum sci_status status;</div><div class='ctx'> 	struct sci_base_state_machine *sm = &amp;idev-&gt;sm;</div><div class='ctx'> 	enum sci_remote_device_states state = sm-&gt;current_state_id;</div><div class='del'>-	enum sci_status status;</div><div class='ctx'> </div><div class='ctx'> 	switch (scu_get_event_type(event_code)) {</div><div class='ctx'> 	case SCU_EVENT_TYPE_RNC_OPS_MISC:</div><div class='hunk'>@@ -427,9 +582,7 @@ enum sci_status sci_remote_device_event_handler(struct isci_remote_device *idev,</div><div class='ctx'> 			status = SCI_SUCCESS;</div><div class='ctx'> </div><div class='ctx'> 			/* Suspend the associated RNC */</div><div class='del'>-			sci_remote_node_context_suspend(&amp;idev-&gt;rnc,</div><div class='del'>-							      SCI_SOFTWARE_SUSPENSION,</div><div class='del'>-							      NULL, NULL);</div><div class='add'>+			sci_remote_device_suspend(idev, SCI_SW_SUSPEND_NORMAL);</div><div class='ctx'> </div><div class='ctx'> 			dev_dbg(scirdev_to_dev(idev),</div><div class='ctx'> 				"%s: device: %p event code: %x: %s\n",</div><div class='hunk'>@@ -455,6 +608,10 @@ enum sci_status sci_remote_device_event_handler(struct isci_remote_device *idev,</div><div class='ctx'> 	if (status != SCI_SUCCESS)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='add'>+	/* Decode device-specific states that may require an RNC resume during</div><div class='add'>+	 * normal operation.  When the abort path is active, these resumes are</div><div class='add'>+	 * managed when the abort path exits.</div><div class='add'>+	 */</div><div class='ctx'> 	if (state == SCI_STP_DEV_ATAPI_ERROR) {</div><div class='ctx'> 		/* For ATAPI error state resume the RNC right away. */</div><div class='ctx'> 		if (scu_get_event_type(event_code) == SCU_EVENT_TYPE_RNC_SUSPEND_TX ||</div><div class='hunk'>@@ -743,10 +900,6 @@ enum sci_status sci_remote_device_start_task(struct isci_host *ihost,</div><div class='ctx'> 		if (status != SCI_SUCCESS)</div><div class='ctx'> 			return status;</div><div class='ctx'> </div><div class='del'>-		status = sci_remote_node_context_start_task(&amp;idev-&gt;rnc, ireq);</div><div class='del'>-		if (status != SCI_SUCCESS)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='ctx'> 		status = sci_request_start(ireq);</div><div class='ctx'> 		if (status != SCI_SUCCESS)</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -765,11 +918,11 @@ enum sci_status sci_remote_device_start_task(struct isci_host *ihost,</div><div class='ctx'> 		 * the correct action when the remote node context is suspended</div><div class='ctx'> 		 * and later resumed.</div><div class='ctx'> 		 */</div><div class='del'>-		sci_remote_node_context_suspend(&amp;idev-&gt;rnc,</div><div class='del'>-				SCI_SOFTWARE_SUSPENSION, NULL, NULL);</div><div class='del'>-		sci_remote_node_context_resume(&amp;idev-&gt;rnc,</div><div class='del'>-				sci_remote_device_continue_request,</div><div class='del'>-						    idev);</div><div class='add'>+		sci_remote_device_suspend(idev,</div><div class='add'>+					  SCI_SW_SUSPEND_LINKHANG_DETECT);</div><div class='add'>+</div><div class='add'>+		status = sci_remote_node_context_start_task(&amp;idev-&gt;rnc, ireq,</div><div class='add'>+				sci_remote_device_continue_request, idev);</div><div class='ctx'> </div><div class='ctx'> 	out:</div><div class='ctx'> 		sci_remote_device_start_request(idev, ireq, status);</div><div class='hunk'>@@ -783,7 +936,9 @@ enum sci_status sci_remote_device_start_task(struct isci_host *ihost,</div><div class='ctx'> 		if (status != SCI_SUCCESS)</div><div class='ctx'> 			return status;</div><div class='ctx'> </div><div class='del'>-		status = sci_remote_node_context_start_task(&amp;idev-&gt;rnc, ireq);</div><div class='add'>+		/* Resume the RNC as needed: */</div><div class='add'>+		status = sci_remote_node_context_start_task(&amp;idev-&gt;rnc, ireq,</div><div class='add'>+							    NULL, NULL);</div><div class='ctx'> 		if (status != SCI_SUCCESS)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -892,7 +1047,7 @@ static void isci_remote_device_deconstruct(struct isci_host *ihost, struct isci_</div><div class='ctx'> 	 * here should go through isci_remote_device_nuke_requests.</div><div class='ctx'> 	 * If we hit this condition, we will need a way to complete</div><div class='ctx'> 	 * io requests in process */</div><div class='del'>-	BUG_ON(!list_empty(&amp;idev-&gt;reqs_in_process));</div><div class='add'>+	BUG_ON(idev-&gt;started_request_count &gt; 0);</div><div class='ctx'> </div><div class='ctx'> 	sci_remote_device_destruct(idev);</div><div class='ctx'> 	list_del_init(&amp;idev-&gt;node);</div><div class='hunk'>@@ -954,14 +1109,21 @@ static void sci_remote_device_ready_state_exit(struct sci_base_state_machine *sm</div><div class='ctx'> static void sci_remote_device_resetting_state_enter(struct sci_base_state_machine *sm)</div><div class='ctx'> {</div><div class='ctx'> 	struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);</div><div class='add'>+	struct isci_host *ihost = idev-&gt;owning_port-&gt;owning_controller;</div><div class='ctx'> </div><div class='del'>-	sci_remote_node_context_suspend(</div><div class='del'>-		&amp;idev-&gt;rnc, SCI_SOFTWARE_SUSPENSION, NULL, NULL);</div><div class='add'>+	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+		"%s: isci_device = %p\n", __func__, idev);</div><div class='add'>+</div><div class='add'>+	sci_remote_device_suspend(idev, SCI_SW_SUSPEND_LINKHANG_DETECT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sci_remote_device_resetting_state_exit(struct sci_base_state_machine *sm)</div><div class='ctx'> {</div><div class='ctx'> 	struct isci_remote_device *idev = container_of(sm, typeof(*idev), sm);</div><div class='add'>+	struct isci_host *ihost = idev-&gt;owning_port-&gt;owning_controller;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+		"%s: isci_device = %p\n", __func__, idev);</div><div class='ctx'> </div><div class='ctx'> 	sci_remote_node_context_resume(&amp;idev-&gt;rnc, NULL, NULL);</div><div class='ctx'> }</div><div class='hunk'>@@ -1113,33 +1275,20 @@ static enum sci_status sci_remote_device_da_construct(struct isci_port *iport,</div><div class='ctx'> {</div><div class='ctx'> 	enum sci_status status;</div><div class='ctx'> 	struct sci_port_properties properties;</div><div class='del'>-	struct domain_device *dev = idev-&gt;domain_dev;</div><div class='ctx'> </div><div class='ctx'> 	sci_remote_device_construct(iport, idev);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * This information is request to determine how many remote node context</div><div class='del'>-	 * entries will be needed to store the remote node.</div><div class='del'>-	 */</div><div class='del'>-	idev-&gt;is_direct_attached = true;</div><div class='del'>-</div><div class='ctx'> 	sci_port_get_properties(iport, &amp;properties);</div><div class='ctx'> 	/* Get accurate port width from port's phy mask for a DA device. */</div><div class='ctx'> 	idev-&gt;device_port_width = hweight32(properties.phy_mask);</div><div class='ctx'> </div><div class='ctx'> 	status = sci_controller_allocate_remote_node_context(iport-&gt;owning_controller,</div><div class='del'>-								  idev,</div><div class='del'>-								  &amp;idev-&gt;rnc.remote_node_index);</div><div class='add'>+							     idev,</div><div class='add'>+							     &amp;idev-&gt;rnc.remote_node_index);</div><div class='ctx'> </div><div class='ctx'> 	if (status != SCI_SUCCESS)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;dev_type == SAS_END_DEV || dev-&gt;dev_type == SATA_DEV ||</div><div class='del'>-	    (dev-&gt;tproto &amp; SAS_PROTOCOL_STP) || dev_is_expander(dev))</div><div class='del'>-		/* pass */;</div><div class='del'>-	else</div><div class='del'>-		return SCI_FAILURE_UNSUPPORTED_PROTOCOL;</div><div class='del'>-</div><div class='ctx'> 	idev-&gt;connection_rate = sci_port_get_max_allowed_speed(iport);</div><div class='ctx'> </div><div class='ctx'> 	return SCI_SUCCESS;</div><div class='hunk'>@@ -1171,19 +1320,13 @@ static enum sci_status sci_remote_device_ea_construct(struct isci_port *iport,</div><div class='ctx'> 	if (status != SCI_SUCCESS)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;dev_type == SAS_END_DEV || dev-&gt;dev_type == SATA_DEV ||</div><div class='del'>-	    (dev-&gt;tproto &amp; SAS_PROTOCOL_STP) || dev_is_expander(dev))</div><div class='del'>-		/* pass */;</div><div class='del'>-	else</div><div class='del'>-		return SCI_FAILURE_UNSUPPORTED_PROTOCOL;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * For SAS-2 the physical link rate is actually a logical link</div><div class='add'>+	/* For SAS-2 the physical link rate is actually a logical link</div><div class='ctx'> 	 * rate that incorporates multiplexing.  The SCU doesn't</div><div class='ctx'> 	 * incorporate multiplexing and for the purposes of the</div><div class='ctx'> 	 * connection the logical link rate is that same as the</div><div class='ctx'> 	 * physical.  Furthermore, the SAS-2 and SAS-1.1 fields overlay</div><div class='del'>-	 * one another, so this code works for both situations. */</div><div class='add'>+	 * one another, so this code works for both situations.</div><div class='add'>+	 */</div><div class='ctx'> 	idev-&gt;connection_rate = min_t(u16, sci_port_get_max_allowed_speed(iport),</div><div class='ctx'> 					 dev-&gt;linkrate);</div><div class='ctx'> </div><div class='hunk'>@@ -1193,6 +1336,105 @@ static enum sci_status sci_remote_device_ea_construct(struct isci_port *iport,</div><div class='ctx'> 	return SCI_SUCCESS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+enum sci_status sci_remote_device_resume(</div><div class='add'>+	struct isci_remote_device *idev,</div><div class='add'>+	scics_sds_remote_node_context_callback cb_fn,</div><div class='add'>+	void *cb_p)</div><div class='add'>+{</div><div class='add'>+	enum sci_status status;</div><div class='add'>+</div><div class='add'>+	status = sci_remote_node_context_resume(&amp;idev-&gt;rnc, cb_fn, cb_p);</div><div class='add'>+	if (status != SCI_SUCCESS)</div><div class='add'>+		dev_dbg(scirdev_to_dev(idev), "%s: failed to resume: %d\n",</div><div class='add'>+			__func__, status);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void isci_remote_device_resume_from_abort_complete(void *cbparam)</div><div class='add'>+{</div><div class='add'>+	struct isci_remote_device *idev = cbparam;</div><div class='add'>+	struct isci_host *ihost = idev-&gt;owning_port-&gt;owning_controller;</div><div class='add'>+	scics_sds_remote_node_context_callback abort_resume_cb =</div><div class='add'>+		idev-&gt;abort_resume_cb;</div><div class='add'>+</div><div class='add'>+	dev_dbg(scirdev_to_dev(idev), "%s: passing-along resume: %p\n",</div><div class='add'>+		__func__, abort_resume_cb);</div><div class='add'>+</div><div class='add'>+	if (abort_resume_cb != NULL) {</div><div class='add'>+		idev-&gt;abort_resume_cb = NULL;</div><div class='add'>+		abort_resume_cb(idev-&gt;abort_resume_cbparam);</div><div class='add'>+	}</div><div class='add'>+	clear_bit(IDEV_ABORT_PATH_RESUME_PENDING, &amp;idev-&gt;flags);</div><div class='add'>+	wake_up(&amp;ihost-&gt;eventq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool isci_remote_device_test_resume_done(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool done;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+	done = !test_bit(IDEV_ABORT_PATH_RESUME_PENDING, &amp;idev-&gt;flags)</div><div class='add'>+		|| test_bit(IDEV_STOP_PENDING, &amp;idev-&gt;flags)</div><div class='add'>+		|| sci_remote_node_context_is_being_destroyed(&amp;idev-&gt;rnc);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+</div><div class='add'>+	return done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void isci_remote_device_wait_for_resume_from_abort(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev, "%s: starting resume wait: %p\n",</div><div class='add'>+		 __func__, idev);</div><div class='add'>+</div><div class='add'>+	#define MAX_RESUME_MSECS 10000</div><div class='add'>+	if (!wait_event_timeout(ihost-&gt;eventq,</div><div class='add'>+				isci_remote_device_test_resume_done(ihost, idev),</div><div class='add'>+				msecs_to_jiffies(MAX_RESUME_MSECS))) {</div><div class='add'>+</div><div class='add'>+		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "%s: #### Timeout waiting for "</div><div class='add'>+			 "resume: %p\n", __func__, idev);</div><div class='add'>+	}</div><div class='add'>+	clear_bit(IDEV_ABORT_PATH_RESUME_PENDING, &amp;idev-&gt;flags);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev, "%s: resume wait done: %p\n",</div><div class='add'>+		 __func__, idev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum sci_status isci_remote_device_resume_from_abort(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	enum sci_status status = SCI_SUCCESS;</div><div class='add'>+	int destroyed;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+	/* Preserve any current resume callbacks, for instance from other</div><div class='add'>+	 * resumptions.</div><div class='add'>+	 */</div><div class='add'>+	idev-&gt;abort_resume_cb = idev-&gt;rnc.user_callback;</div><div class='add'>+	idev-&gt;abort_resume_cbparam = idev-&gt;rnc.user_cookie;</div><div class='add'>+	set_bit(IDEV_ABORT_PATH_RESUME_PENDING, &amp;idev-&gt;flags);</div><div class='add'>+	clear_bit(IDEV_ABORT_PATH_ACTIVE, &amp;idev-&gt;flags);</div><div class='add'>+	destroyed = sci_remote_node_context_is_being_destroyed(&amp;idev-&gt;rnc);</div><div class='add'>+	if (!destroyed)</div><div class='add'>+		status = sci_remote_device_resume(</div><div class='add'>+			idev, isci_remote_device_resume_from_abort_complete,</div><div class='add'>+			idev);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+	if (!destroyed &amp;&amp; (status == SCI_SUCCESS))</div><div class='add'>+		isci_remote_device_wait_for_resume_from_abort(ihost, idev);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(IDEV_ABORT_PATH_RESUME_PENDING, &amp;idev-&gt;flags);</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * sci_remote_device_start() - This method will start the supplied remote</div><div class='ctx'>  *    device.  This method enables normal IO requests to flow through to the</div><div class='hunk'>@@ -1207,7 +1449,7 @@ static enum sci_status sci_remote_device_ea_construct(struct isci_port *iport,</div><div class='ctx'>  * the device when there have been no phys added to it.</div><div class='ctx'>  */</div><div class='ctx'> static enum sci_status sci_remote_device_start(struct isci_remote_device *idev,</div><div class='del'>-						u32 timeout)</div><div class='add'>+					       u32 timeout)</div><div class='ctx'> {</div><div class='ctx'> 	struct sci_base_state_machine *sm = &amp;idev-&gt;sm;</div><div class='ctx'> 	enum sci_remote_device_states state = sm-&gt;current_state_id;</div><div class='hunk'>@@ -1219,9 +1461,8 @@ static enum sci_status sci_remote_device_start(struct isci_remote_device *idev,</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	status = sci_remote_node_context_resume(&amp;idev-&gt;rnc,</div><div class='del'>-						     remote_device_resume_done,</div><div class='del'>-						     idev);</div><div class='add'>+	status = sci_remote_device_resume(idev, remote_device_resume_done,</div><div class='add'>+					  idev);</div><div class='ctx'> 	if (status != SCI_SUCCESS)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='hunk'>@@ -1259,20 +1500,6 @@ static enum sci_status isci_remote_device_construct(struct isci_port *iport,</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void isci_remote_device_nuke_requests(struct isci_host *ihost, struct isci_remote_device *idev)</div><div class='del'>-{</div><div class='del'>-	DECLARE_COMPLETION_ONSTACK(aborted_task_completion);</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-		"%s: idev = %p\n", __func__, idev);</div><div class='del'>-</div><div class='del'>-	/* Cleanup all requests pending for this device. */</div><div class='del'>-	isci_terminate_pending_requests(ihost, idev);</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-		"%s: idev = %p, done\n", __func__, idev);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * This function builds the isci_remote_device when a libsas dev_found message</div><div class='ctx'>  *    is received.</div><div class='hunk'>@@ -1297,10 +1524,6 @@ isci_remote_device_alloc(struct isci_host *ihost, struct isci_port *iport)</div><div class='ctx'> 		dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "%s: failed\n", __func__);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (WARN_ONCE(!list_empty(&amp;idev-&gt;reqs_in_process), "found requests in process\n"))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='ctx'> 	if (WARN_ONCE(!list_empty(&amp;idev-&gt;node), "found non-idle remote device\n"))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -1342,14 +1565,8 @@ enum sci_status isci_remote_device_stop(struct isci_host *ihost, struct isci_rem</div><div class='ctx'> 	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> 	idev-&gt;domain_dev-&gt;lldd_dev = NULL; /* disable new lookups */</div><div class='ctx'> 	set_bit(IDEV_GONE, &amp;idev-&gt;flags);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* Kill all outstanding requests. */</div><div class='del'>-	isci_remote_device_nuke_requests(ihost, idev);</div><div class='ctx'> </div><div class='ctx'> 	set_bit(IDEV_STOP_PENDING, &amp;idev-&gt;flags);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> 	status = sci_remote_device_stop(idev, 50);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -1359,6 +1576,9 @@ enum sci_status isci_remote_device_stop(struct isci_host *ihost, struct isci_rem</div><div class='ctx'> 	else</div><div class='ctx'> 		wait_for_device_stop(ihost, idev);</div><div class='ctx'> </div><div class='add'>+	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+		"%s: isci_device = %p, waiting done.\n", __func__, idev);</div><div class='add'>+</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1434,3 +1654,73 @@ int isci_remote_device_found(struct domain_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	return status == SCI_SUCCESS ? 0 : -ENODEV;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+enum sci_status isci_remote_device_suspend_terminate(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev,</div><div class='add'>+	struct isci_request *ireq)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	enum sci_status status;</div><div class='add'>+</div><div class='add'>+	/* Put the device into suspension. */</div><div class='add'>+	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+	set_bit(IDEV_ABORT_PATH_ACTIVE, &amp;idev-&gt;flags);</div><div class='add'>+	sci_remote_device_suspend(idev, SCI_SW_SUSPEND_LINKHANG_DETECT);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* Terminate and wait for the completions. */</div><div class='add'>+	status = isci_remote_device_terminate_requests(ihost, idev, ireq);</div><div class='add'>+	if (status != SCI_SUCCESS)</div><div class='add'>+		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+			"%s: isci_remote_device_terminate_requests(%p) "</div><div class='add'>+				"returned %d!\n",</div><div class='add'>+			__func__, idev, status);</div><div class='add'>+</div><div class='add'>+	/* NOTE: RNC resumption is left to the caller! */</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int isci_remote_device_is_safe_to_abort(</div><div class='add'>+	struct isci_remote_device *idev)</div><div class='add'>+{</div><div class='add'>+	return sci_remote_node_context_is_safe_to_abort(&amp;idev-&gt;rnc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum sci_status sci_remote_device_abort_requests_pending_abort(</div><div class='add'>+	struct isci_remote_device *idev)</div><div class='add'>+{</div><div class='add'>+	return sci_remote_device_terminate_reqs_checkabort(idev, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum sci_status isci_remote_device_reset_complete(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	enum sci_status status;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+	status = sci_remote_device_reset_complete(idev);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void isci_dev_set_hang_detection_timeout(</div><div class='add'>+	struct isci_remote_device *idev,</div><div class='add'>+	u32 timeout)</div><div class='add'>+{</div><div class='add'>+	if (dev_is_sata(idev-&gt;domain_dev)) {</div><div class='add'>+		if (timeout) {</div><div class='add'>+			if (test_and_set_bit(IDEV_RNC_LLHANG_ENABLED,</div><div class='add'>+					     &amp;idev-&gt;flags))</div><div class='add'>+				return;  /* Already enabled. */</div><div class='add'>+		} else if (!test_and_clear_bit(IDEV_RNC_LLHANG_ENABLED,</div><div class='add'>+					       &amp;idev-&gt;flags))</div><div class='add'>+			return;  /* Not enabled. */</div><div class='add'>+</div><div class='add'>+		sci_port_set_hang_detection_timeout(idev-&gt;owning_port,</div><div class='add'>+						    timeout);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/scsi/isci/remote_device.h b/drivers/scsi/isci/remote_device.h<br/>index 58637ee08f55..7674caae1d88 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/remote_device.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/remote_device.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/remote_device.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/remote_device.h</a></div><div class='hunk'>@@ -85,27 +85,38 @@ struct isci_remote_device {</div><div class='ctx'> 	#define IDEV_GONE 3</div><div class='ctx'> 	#define IDEV_IO_READY 4</div><div class='ctx'> 	#define IDEV_IO_NCQERROR 5</div><div class='add'>+	#define IDEV_RNC_LLHANG_ENABLED 6</div><div class='add'>+	#define IDEV_ABORT_PATH_ACTIVE 7</div><div class='add'>+	#define IDEV_ABORT_PATH_RESUME_PENDING 8</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct kref kref;</div><div class='ctx'> 	struct isci_port *isci_port;</div><div class='ctx'> 	struct domain_device *domain_dev;</div><div class='ctx'> 	struct list_head node;</div><div class='del'>-	struct list_head reqs_in_process;</div><div class='ctx'> 	struct sci_base_state_machine sm;</div><div class='ctx'> 	u32 device_port_width;</div><div class='ctx'> 	enum sas_linkrate connection_rate;</div><div class='del'>-	bool is_direct_attached;</div><div class='ctx'> 	struct isci_port *owning_port;</div><div class='ctx'> 	struct sci_remote_node_context rnc;</div><div class='ctx'> 	/* XXX unify with device reference counting and delete */</div><div class='ctx'> 	u32 started_request_count;</div><div class='ctx'> 	struct isci_request *working_request;</div><div class='ctx'> 	u32 not_ready_reason;</div><div class='add'>+	scics_sds_remote_node_context_callback abort_resume_cb;</div><div class='add'>+	void *abort_resume_cbparam;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define ISCI_REMOTE_DEVICE_START_TIMEOUT 5000</div><div class='ctx'> </div><div class='ctx'> /* device reference routines must be called under sci_lock */</div><div class='add'>+static inline struct isci_remote_device *isci_get_device(</div><div class='add'>+	struct isci_remote_device *idev)</div><div class='add'>+{</div><div class='add'>+	if (idev)</div><div class='add'>+		kref_get(&amp;idev-&gt;kref);</div><div class='add'>+	return idev;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline struct isci_remote_device *isci_lookup_device(struct domain_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct isci_remote_device *idev = dev-&gt;lldd_dev;</div><div class='hunk'>@@ -302,6 +313,8 @@ static inline void sci_remote_device_decrement_request_count(struct isci_remote_</div><div class='ctx'> 		idev-&gt;started_request_count--;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void isci_dev_set_hang_detection_timeout(struct isci_remote_device *idev, u32 timeout);</div><div class='add'>+</div><div class='ctx'> enum sci_status sci_remote_device_frame_handler(</div><div class='ctx'> 	struct isci_remote_device *idev,</div><div class='ctx'> 	u32 frame_index);</div><div class='hunk'>@@ -325,12 +338,50 @@ enum sci_status sci_remote_device_complete_io(</div><div class='ctx'> 	struct isci_remote_device *idev,</div><div class='ctx'> 	struct isci_request *ireq);</div><div class='ctx'> </div><div class='del'>-enum sci_status sci_remote_device_suspend(</div><div class='del'>-	struct isci_remote_device *idev,</div><div class='del'>-	u32 suspend_type);</div><div class='del'>-</div><div class='ctx'> void sci_remote_device_post_request(</div><div class='ctx'> 	struct isci_remote_device *idev,</div><div class='ctx'> 	u32 request);</div><div class='ctx'> </div><div class='add'>+enum sci_status sci_remote_device_terminate_requests(</div><div class='add'>+	struct isci_remote_device *idev);</div><div class='add'>+</div><div class='add'>+int isci_remote_device_is_safe_to_abort(</div><div class='add'>+	struct isci_remote_device *idev);</div><div class='add'>+</div><div class='add'>+enum sci_status</div><div class='add'>+sci_remote_device_abort_requests_pending_abort(</div><div class='add'>+	struct isci_remote_device *idev);</div><div class='add'>+</div><div class='add'>+enum sci_status isci_remote_device_suspend(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev);</div><div class='add'>+</div><div class='add'>+enum sci_status sci_remote_device_resume(</div><div class='add'>+	struct isci_remote_device *idev,</div><div class='add'>+	scics_sds_remote_node_context_callback cb_fn,</div><div class='add'>+	void *cb_p);</div><div class='add'>+</div><div class='add'>+enum sci_status isci_remote_device_resume_from_abort(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev);</div><div class='add'>+</div><div class='add'>+enum sci_status isci_remote_device_reset(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev);</div><div class='add'>+</div><div class='add'>+enum sci_status isci_remote_device_reset_complete(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev);</div><div class='add'>+</div><div class='add'>+enum sci_status isci_remote_device_suspend_terminate(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev,</div><div class='add'>+	struct isci_request *ireq);</div><div class='add'>+</div><div class='add'>+enum sci_status isci_remote_device_terminate_requests(</div><div class='add'>+	struct isci_host *ihost,</div><div class='add'>+	struct isci_remote_device *idev,</div><div class='add'>+	struct isci_request *ireq);</div><div class='add'>+enum sci_status sci_remote_device_suspend(struct isci_remote_device *idev,</div><div class='add'>+					  enum sci_remote_node_suspension_reasons reason);</div><div class='ctx'> #endif /* !defined(_ISCI_REMOTE_DEVICE_H_) */</div><div class='head'>diff --git a/drivers/scsi/isci/remote_node_context.c b/drivers/scsi/isci/remote_node_context.c<br/>index 3a9463481f38..1910100638a2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/remote_node_context.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/remote_node_context.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/remote_node_context.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/remote_node_context.c</a></div><div class='hunk'>@@ -52,7 +52,7 @@</div><div class='ctx'>  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE</div><div class='ctx'>  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='ctx'>  */</div><div class='del'>-</div><div class='add'>+#include &lt;scsi/sas_ata.h&gt;</div><div class='ctx'> #include "host.h"</div><div class='ctx'> #include "isci.h"</div><div class='ctx'> #include "remote_device.h"</div><div class='hunk'>@@ -90,6 +90,15 @@ bool sci_remote_node_context_is_ready(</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool sci_remote_node_context_is_suspended(struct sci_remote_node_context *sci_rnc)</div><div class='add'>+{</div><div class='add'>+	u32 current_state = sci_rnc-&gt;sm.current_state_id;</div><div class='add'>+</div><div class='add'>+	if (current_state == SCI_RNC_TX_RX_SUSPENDED)</div><div class='add'>+		return true;</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static union scu_remote_node_context *sci_rnc_by_id(struct isci_host *ihost, u16 id)</div><div class='ctx'> {</div><div class='ctx'> 	if (id &lt; ihost-&gt;remote_node_entries &amp;&amp;</div><div class='hunk'>@@ -131,7 +140,7 @@ static void sci_remote_node_context_construct_buffer(struct sci_remote_node_cont</div><div class='ctx'> </div><div class='ctx'> 	rnc-&gt;ssp.arbitration_wait_time = 0;</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;dev_type == SATA_DEV || (dev-&gt;tproto &amp; SAS_PROTOCOL_STP)) {</div><div class='add'>+	if (dev_is_sata(dev)) {</div><div class='ctx'> 		rnc-&gt;ssp.connection_occupancy_timeout =</div><div class='ctx'> 			ihost-&gt;user_parameters.stp_max_occupancy_timeout;</div><div class='ctx'> 		rnc-&gt;ssp.connection_inactivity_timeout =</div><div class='hunk'>@@ -151,7 +160,6 @@ static void sci_remote_node_context_construct_buffer(struct sci_remote_node_cont</div><div class='ctx'> 	rnc-&gt;ssp.oaf_source_zone_group = 0;</div><div class='ctx'> 	rnc-&gt;ssp.oaf_more_compatibility_features = 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  *</div><div class='ctx'>  * @sci_rnc:</div><div class='hunk'>@@ -165,23 +173,30 @@ static void sci_remote_node_context_construct_buffer(struct sci_remote_node_cont</div><div class='ctx'> static void sci_remote_node_context_setup_to_resume(</div><div class='ctx'> 	struct sci_remote_node_context *sci_rnc,</div><div class='ctx'> 	scics_sds_remote_node_context_callback callback,</div><div class='del'>-	void *callback_parameter)</div><div class='add'>+	void *callback_parameter,</div><div class='add'>+	enum sci_remote_node_context_destination_state dest_param)</div><div class='ctx'> {</div><div class='del'>-	if (sci_rnc-&gt;destination_state != SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_FINAL) {</div><div class='del'>-		sci_rnc-&gt;destination_state = SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_READY;</div><div class='del'>-		sci_rnc-&gt;user_callback     = callback;</div><div class='del'>-		sci_rnc-&gt;user_cookie       = callback_parameter;</div><div class='add'>+	if (sci_rnc-&gt;destination_state != RNC_DEST_FINAL) {</div><div class='add'>+		sci_rnc-&gt;destination_state = dest_param;</div><div class='add'>+		if (callback != NULL) {</div><div class='add'>+			sci_rnc-&gt;user_callback = callback;</div><div class='add'>+			sci_rnc-&gt;user_cookie   = callback_parameter;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sci_remote_node_context_setup_to_destory(</div><div class='add'>+static void sci_remote_node_context_setup_to_destroy(</div><div class='ctx'> 	struct sci_remote_node_context *sci_rnc,</div><div class='ctx'> 	scics_sds_remote_node_context_callback callback,</div><div class='ctx'> 	void *callback_parameter)</div><div class='ctx'> {</div><div class='del'>-	sci_rnc-&gt;destination_state = SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_FINAL;</div><div class='add'>+	struct isci_host *ihost = idev_to_ihost(rnc_to_dev(sci_rnc));</div><div class='add'>+</div><div class='add'>+	sci_rnc-&gt;destination_state = RNC_DEST_FINAL;</div><div class='ctx'> 	sci_rnc-&gt;user_callback     = callback;</div><div class='ctx'> 	sci_rnc-&gt;user_cookie       = callback_parameter;</div><div class='add'>+</div><div class='add'>+	wake_up(&amp;ihost-&gt;eventq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -203,9 +218,19 @@ static void sci_remote_node_context_notify_user(</div><div class='ctx'> </div><div class='ctx'> static void sci_remote_node_context_continue_state_transitions(struct sci_remote_node_context *rnc)</div><div class='ctx'> {</div><div class='del'>-	if (rnc-&gt;destination_state == SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_READY)</div><div class='add'>+	switch (rnc-&gt;destination_state) {</div><div class='add'>+	case RNC_DEST_READY:</div><div class='add'>+	case RNC_DEST_SUSPENDED_RESUME:</div><div class='add'>+		rnc-&gt;destination_state = RNC_DEST_READY;</div><div class='add'>+		/* Fall through... */</div><div class='add'>+	case RNC_DEST_FINAL:</div><div class='ctx'> 		sci_remote_node_context_resume(rnc, rnc-&gt;user_callback,</div><div class='del'>-						    rnc-&gt;user_cookie);</div><div class='add'>+					       rnc-&gt;user_cookie);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		rnc-&gt;destination_state = RNC_DEST_UNSPECIFIED;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sci_remote_node_context_validate_context_buffer(struct sci_remote_node_context *sci_rnc)</div><div class='hunk'>@@ -219,13 +244,12 @@ static void sci_remote_node_context_validate_context_buffer(struct sci_remote_no</div><div class='ctx'> </div><div class='ctx'> 	rnc_buffer-&gt;ssp.is_valid = true;</div><div class='ctx'> </div><div class='del'>-	if (!idev-&gt;is_direct_attached &amp;&amp;</div><div class='del'>-	    (dev-&gt;dev_type == SATA_DEV || (dev-&gt;tproto &amp; SAS_PROTOCOL_STP))) {</div><div class='add'>+	if (dev_is_sata(dev) &amp;&amp; dev-&gt;parent) {</div><div class='ctx'> 		sci_remote_device_post_request(idev, SCU_CONTEXT_COMMAND_POST_RNC_96);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		sci_remote_device_post_request(idev, SCU_CONTEXT_COMMAND_POST_RNC_32);</div><div class='ctx'> </div><div class='del'>-		if (idev-&gt;is_direct_attached)</div><div class='add'>+		if (!dev-&gt;parent)</div><div class='ctx'> 			sci_port_setup_transports(idev-&gt;owning_port,</div><div class='ctx'> 						  sci_rnc-&gt;remote_node_index);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -248,13 +272,18 @@ static void sci_remote_node_context_invalidate_context_buffer(struct sci_remote_</div><div class='ctx'> static void sci_remote_node_context_initial_state_enter(struct sci_base_state_machine *sm)</div><div class='ctx'> {</div><div class='ctx'> 	struct sci_remote_node_context *rnc = container_of(sm, typeof(*rnc), sm);</div><div class='add'>+	struct isci_remote_device *idev = rnc_to_dev(rnc);</div><div class='add'>+	struct isci_host *ihost = idev-&gt;owning_port-&gt;owning_controller;</div><div class='ctx'> </div><div class='ctx'> 	/* Check to see if we have gotten back to the initial state because</div><div class='ctx'> 	 * someone requested to destroy the remote node context object.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (sm-&gt;previous_state_id == SCI_RNC_INVALIDATING) {</div><div class='del'>-		rnc-&gt;destination_state = SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_UNSPECIFIED;</div><div class='add'>+		rnc-&gt;destination_state = RNC_DEST_UNSPECIFIED;</div><div class='ctx'> 		sci_remote_node_context_notify_user(rnc);</div><div class='add'>+</div><div class='add'>+		smp_wmb();</div><div class='add'>+		wake_up(&amp;ihost-&gt;eventq);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -269,6 +298,8 @@ static void sci_remote_node_context_invalidating_state_enter(struct sci_base_sta</div><div class='ctx'> {</div><div class='ctx'> 	struct sci_remote_node_context *rnc = container_of(sm, typeof(*rnc), sm);</div><div class='ctx'> </div><div class='add'>+	/* Terminate all outstanding requests. */</div><div class='add'>+	sci_remote_device_terminate_requests(rnc_to_dev(rnc));</div><div class='ctx'> 	sci_remote_node_context_invalidate_context_buffer(rnc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -287,10 +318,8 @@ static void sci_remote_node_context_resuming_state_enter(struct sci_base_state_m</div><div class='ctx'> 	 * resume because of a target reset we also need to update</div><div class='ctx'> 	 * the STPTLDARNI register with the RNi of the device</div><div class='ctx'> 	 */</div><div class='del'>-	if ((dev-&gt;dev_type == SATA_DEV || (dev-&gt;tproto &amp; SAS_PROTOCOL_STP)) &amp;&amp;</div><div class='del'>-	    idev-&gt;is_direct_attached)</div><div class='del'>-		sci_port_setup_transports(idev-&gt;owning_port,</div><div class='del'>-					       rnc-&gt;remote_node_index);</div><div class='add'>+	if (dev_is_sata(dev) &amp;&amp; !dev-&gt;parent)</div><div class='add'>+		sci_port_setup_transports(idev-&gt;owning_port, rnc-&gt;remote_node_index);</div><div class='ctx'> </div><div class='ctx'> 	sci_remote_device_post_request(idev, SCU_CONTEXT_COMMAND_POST_RNC_RESUME);</div><div class='ctx'> }</div><div class='hunk'>@@ -298,10 +327,22 @@ static void sci_remote_node_context_resuming_state_enter(struct sci_base_state_m</div><div class='ctx'> static void sci_remote_node_context_ready_state_enter(struct sci_base_state_machine *sm)</div><div class='ctx'> {</div><div class='ctx'> 	struct sci_remote_node_context *rnc = container_of(sm, typeof(*rnc), sm);</div><div class='add'>+	enum sci_remote_node_context_destination_state dest_select;</div><div class='add'>+	int tell_user = 1;</div><div class='add'>+</div><div class='add'>+	dest_select = rnc-&gt;destination_state;</div><div class='add'>+	rnc-&gt;destination_state = RNC_DEST_UNSPECIFIED;</div><div class='ctx'> </div><div class='del'>-	rnc-&gt;destination_state = SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_UNSPECIFIED;</div><div class='add'>+	if ((dest_select == RNC_DEST_SUSPENDED) ||</div><div class='add'>+	    (dest_select == RNC_DEST_SUSPENDED_RESUME)) {</div><div class='add'>+		sci_remote_node_context_suspend(</div><div class='add'>+			rnc, rnc-&gt;suspend_reason,</div><div class='add'>+			SCI_SOFTWARE_SUSPEND_EXPECTED_EVENT);</div><div class='ctx'> </div><div class='del'>-	if (rnc-&gt;user_callback)</div><div class='add'>+		if (dest_select == RNC_DEST_SUSPENDED_RESUME)</div><div class='add'>+			tell_user = 0;  /* Wait until ready again. */</div><div class='add'>+	}</div><div class='add'>+	if (tell_user)</div><div class='ctx'> 		sci_remote_node_context_notify_user(rnc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -315,10 +356,34 @@ static void sci_remote_node_context_tx_suspended_state_enter(struct sci_base_sta</div><div class='ctx'> static void sci_remote_node_context_tx_rx_suspended_state_enter(struct sci_base_state_machine *sm)</div><div class='ctx'> {</div><div class='ctx'> 	struct sci_remote_node_context *rnc = container_of(sm, typeof(*rnc), sm);</div><div class='add'>+	struct isci_remote_device *idev = rnc_to_dev(rnc);</div><div class='add'>+	struct isci_host *ihost = idev-&gt;owning_port-&gt;owning_controller;</div><div class='add'>+	u32 new_count = rnc-&gt;suspend_count + 1;</div><div class='add'>+</div><div class='add'>+	if (new_count == 0)</div><div class='add'>+		rnc-&gt;suspend_count = 1;</div><div class='add'>+	else</div><div class='add'>+		rnc-&gt;suspend_count = new_count;</div><div class='add'>+	smp_wmb();</div><div class='ctx'> </div><div class='add'>+	/* Terminate outstanding requests pending abort. */</div><div class='add'>+	sci_remote_device_abort_requests_pending_abort(idev);</div><div class='add'>+</div><div class='add'>+	wake_up(&amp;ihost-&gt;eventq);</div><div class='ctx'> 	sci_remote_node_context_continue_state_transitions(rnc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void sci_remote_node_context_await_suspend_state_exit(</div><div class='add'>+	struct sci_base_state_machine *sm)</div><div class='add'>+{</div><div class='add'>+	struct sci_remote_node_context *rnc</div><div class='add'>+		= container_of(sm, typeof(*rnc), sm);</div><div class='add'>+	struct isci_remote_device *idev = rnc_to_dev(rnc);</div><div class='add'>+</div><div class='add'>+	if (dev_is_sata(idev-&gt;domain_dev))</div><div class='add'>+		isci_dev_set_hang_detection_timeout(idev, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct sci_base_state sci_remote_node_context_state_table[] = {</div><div class='ctx'> 	[SCI_RNC_INITIAL] = {</div><div class='ctx'> 		.enter_state = sci_remote_node_context_initial_state_enter,</div><div class='hunk'>@@ -341,7 +406,9 @@ static const struct sci_base_state sci_remote_node_context_state_table[] = {</div><div class='ctx'> 	[SCI_RNC_TX_RX_SUSPENDED] = {</div><div class='ctx'> 		.enter_state = sci_remote_node_context_tx_rx_suspended_state_enter,</div><div class='ctx'> 	},</div><div class='del'>-	[SCI_RNC_AWAIT_SUSPENSION] = { },</div><div class='add'>+	[SCI_RNC_AWAIT_SUSPENSION] = {</div><div class='add'>+		.exit_state = sci_remote_node_context_await_suspend_state_exit,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void sci_remote_node_context_construct(struct sci_remote_node_context *rnc,</div><div class='hunk'>@@ -350,7 +417,7 @@ void sci_remote_node_context_construct(struct sci_remote_node_context *rnc,</div><div class='ctx'> 	memset(rnc, 0, sizeof(struct sci_remote_node_context));</div><div class='ctx'> </div><div class='ctx'> 	rnc-&gt;remote_node_index = remote_node_index;</div><div class='del'>-	rnc-&gt;destination_state = SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_UNSPECIFIED;</div><div class='add'>+	rnc-&gt;destination_state = RNC_DEST_UNSPECIFIED;</div><div class='ctx'> </div><div class='ctx'> 	sci_init_sm(&amp;rnc-&gt;sm, sci_remote_node_context_state_table, SCI_RNC_INITIAL);</div><div class='ctx'> }</div><div class='hunk'>@@ -359,6 +426,7 @@ enum sci_status sci_remote_node_context_event_handler(struct sci_remote_node_con</div><div class='ctx'> 							   u32 event_code)</div><div class='ctx'> {</div><div class='ctx'> 	enum scis_sds_remote_node_context_states state;</div><div class='add'>+	u32 next_state;</div><div class='ctx'> </div><div class='ctx'> 	state = sci_rnc-&gt;sm.current_state_id;</div><div class='ctx'> 	switch (state) {</div><div class='hunk'>@@ -373,18 +441,18 @@ enum sci_status sci_remote_node_context_event_handler(struct sci_remote_node_con</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SCI_RNC_INVALIDATING:</div><div class='ctx'> 		if (scu_get_event_code(event_code) == SCU_EVENT_POST_RNC_INVALIDATE_COMPLETE) {</div><div class='del'>-			if (sci_rnc-&gt;destination_state == SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_FINAL)</div><div class='del'>-				state = SCI_RNC_INITIAL;</div><div class='add'>+			if (sci_rnc-&gt;destination_state == RNC_DEST_FINAL)</div><div class='add'>+				next_state = SCI_RNC_INITIAL;</div><div class='ctx'> 			else</div><div class='del'>-				state = SCI_RNC_POSTING;</div><div class='del'>-			sci_change_state(&amp;sci_rnc-&gt;sm, state);</div><div class='add'>+				next_state = SCI_RNC_POSTING;</div><div class='add'>+			sci_change_state(&amp;sci_rnc-&gt;sm, next_state);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			switch (scu_get_event_type(event_code)) {</div><div class='ctx'> 			case SCU_EVENT_TYPE_RNC_SUSPEND_TX:</div><div class='ctx'> 			case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:</div><div class='ctx'> 				/* We really dont care if the hardware is going to suspend</div><div class='ctx'> 				 * the device since it's being invalidated anyway */</div><div class='del'>-				dev_dbg(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='add'>+				dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='ctx'> 					"%s: SCIC Remote Node Context 0x%p was "</div><div class='ctx'> 					"suspeneded by hardware while being "</div><div class='ctx'> 					"invalidated.\n", __func__, sci_rnc);</div><div class='hunk'>@@ -403,7 +471,7 @@ enum sci_status sci_remote_node_context_event_handler(struct sci_remote_node_con</div><div class='ctx'> 			case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:</div><div class='ctx'> 				/* We really dont care if the hardware is going to suspend</div><div class='ctx'> 				 * the device since it's being resumed anyway */</div><div class='del'>-				dev_dbg(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='add'>+				dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='ctx'> 					"%s: SCIC Remote Node Context 0x%p was "</div><div class='ctx'> 					"suspeneded by hardware while being resumed.\n",</div><div class='ctx'> 					__func__, sci_rnc);</div><div class='hunk'>@@ -417,11 +485,11 @@ enum sci_status sci_remote_node_context_event_handler(struct sci_remote_node_con</div><div class='ctx'> 		switch (scu_get_event_type(event_code)) {</div><div class='ctx'> 		case SCU_EVENT_TL_RNC_SUSPEND_TX:</div><div class='ctx'> 			sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_TX_SUSPENDED);</div><div class='del'>-			sci_rnc-&gt;suspension_code = scu_get_event_specifier(event_code);</div><div class='add'>+			sci_rnc-&gt;suspend_type = scu_get_event_type(event_code);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case SCU_EVENT_TL_RNC_SUSPEND_TX_RX:</div><div class='ctx'> 			sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_TX_RX_SUSPENDED);</div><div class='del'>-			sci_rnc-&gt;suspension_code = scu_get_event_specifier(event_code);</div><div class='add'>+			sci_rnc-&gt;suspend_type = scu_get_event_type(event_code);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -430,27 +498,29 @@ enum sci_status sci_remote_node_context_event_handler(struct sci_remote_node_con</div><div class='ctx'> 	case SCI_RNC_AWAIT_SUSPENSION:</div><div class='ctx'> 		switch (scu_get_event_type(event_code)) {</div><div class='ctx'> 		case SCU_EVENT_TL_RNC_SUSPEND_TX:</div><div class='del'>-			sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_TX_SUSPENDED);</div><div class='del'>-			sci_rnc-&gt;suspension_code = scu_get_event_specifier(event_code);</div><div class='add'>+			next_state = SCI_RNC_TX_SUSPENDED;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case SCU_EVENT_TL_RNC_SUSPEND_TX_RX:</div><div class='del'>-			sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_TX_RX_SUSPENDED);</div><div class='del'>-			sci_rnc-&gt;suspension_code = scu_get_event_specifier(event_code);</div><div class='add'>+			next_state = SCI_RNC_TX_RX_SUSPENDED;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='add'>+		if (sci_rnc-&gt;suspend_type == scu_get_event_type(event_code))</div><div class='add'>+			sci_change_state(&amp;sci_rnc-&gt;sm, next_state);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='del'>-			 "%s: invalid state %d\n", __func__, state);</div><div class='add'>+			 "%s: invalid state: %s\n", __func__,</div><div class='add'>+			 rnc_state_name(state));</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='ctx'> 	return SCI_SUCCESS;</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='ctx'> 	dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='del'>-		 "%s: code: %#x state: %d\n", __func__, event_code, state);</div><div class='add'>+		 "%s: code: %#x state: %s\n", __func__, event_code,</div><div class='add'>+		 rnc_state_name(state));</div><div class='ctx'> 	return SCI_FAILURE;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -464,20 +534,23 @@ enum sci_status sci_remote_node_context_destruct(struct sci_remote_node_context</div><div class='ctx'> 	state = sci_rnc-&gt;sm.current_state_id;</div><div class='ctx'> 	switch (state) {</div><div class='ctx'> 	case SCI_RNC_INVALIDATING:</div><div class='del'>-		sci_remote_node_context_setup_to_destory(sci_rnc, cb_fn, cb_p);</div><div class='add'>+		sci_remote_node_context_setup_to_destroy(sci_rnc, cb_fn, cb_p);</div><div class='ctx'> 		return SCI_SUCCESS;</div><div class='ctx'> 	case SCI_RNC_POSTING:</div><div class='ctx'> 	case SCI_RNC_RESUMING:</div><div class='ctx'> 	case SCI_RNC_READY:</div><div class='ctx'> 	case SCI_RNC_TX_SUSPENDED:</div><div class='ctx'> 	case SCI_RNC_TX_RX_SUSPENDED:</div><div class='del'>-	case SCI_RNC_AWAIT_SUSPENSION:</div><div class='del'>-		sci_remote_node_context_setup_to_destory(sci_rnc, cb_fn, cb_p);</div><div class='add'>+		sci_remote_node_context_setup_to_destroy(sci_rnc, cb_fn, cb_p);</div><div class='ctx'> 		sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_INVALIDATING);</div><div class='ctx'> 		return SCI_SUCCESS;</div><div class='add'>+	case SCI_RNC_AWAIT_SUSPENSION:</div><div class='add'>+		sci_remote_node_context_setup_to_destroy(sci_rnc, cb_fn, cb_p);</div><div class='add'>+		return SCI_SUCCESS;</div><div class='ctx'> 	case SCI_RNC_INITIAL:</div><div class='ctx'> 		dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='del'>-			 "%s: invalid state %d\n", __func__, state);</div><div class='add'>+			 "%s: invalid state: %s\n", __func__,</div><div class='add'>+			 rnc_state_name(state));</div><div class='ctx'> 		/* We have decided that the destruct request on the remote node context</div><div class='ctx'> 		 * can not fail since it is either in the initial/destroyed state or is</div><div class='ctx'> 		 * can be destroyed.</div><div class='hunk'>@@ -485,35 +558,101 @@ enum sci_status sci_remote_node_context_destruct(struct sci_remote_node_context</div><div class='ctx'> 		return SCI_SUCCESS;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='del'>-			 "%s: invalid state %d\n", __func__, state);</div><div class='add'>+			 "%s: invalid state %s\n", __func__,</div><div class='add'>+			 rnc_state_name(state));</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum sci_status sci_remote_node_context_suspend(struct sci_remote_node_context *sci_rnc,</div><div class='del'>-						     u32 suspend_type,</div><div class='del'>-						     scics_sds_remote_node_context_callback cb_fn,</div><div class='del'>-						     void *cb_p)</div><div class='add'>+enum sci_status sci_remote_node_context_suspend(</div><div class='add'>+			struct sci_remote_node_context *sci_rnc,</div><div class='add'>+			enum sci_remote_node_suspension_reasons suspend_reason,</div><div class='add'>+			u32 suspend_type)</div><div class='ctx'> {</div><div class='del'>-	enum scis_sds_remote_node_context_states state;</div><div class='add'>+	enum scis_sds_remote_node_context_states state</div><div class='add'>+		= sci_rnc-&gt;sm.current_state_id;</div><div class='add'>+	struct isci_remote_device *idev = rnc_to_dev(sci_rnc);</div><div class='add'>+	enum sci_status status = SCI_FAILURE_INVALID_STATE;</div><div class='add'>+	enum sci_remote_node_context_destination_state dest_param =</div><div class='add'>+		RNC_DEST_UNSPECIFIED;</div><div class='add'>+</div><div class='add'>+	dev_dbg(scirdev_to_dev(idev),</div><div class='add'>+		"%s: current state %s, current suspend_type %x dest state %d,"</div><div class='add'>+			" arg suspend_reason %d, arg suspend_type %x",</div><div class='add'>+		__func__, rnc_state_name(state), sci_rnc-&gt;suspend_type,</div><div class='add'>+		sci_rnc-&gt;destination_state, suspend_reason,</div><div class='add'>+		suspend_type);</div><div class='add'>+</div><div class='add'>+	/* Disable automatic state continuations if explicitly suspending. */</div><div class='add'>+	if ((suspend_reason == SCI_HW_SUSPEND) ||</div><div class='add'>+	    (sci_rnc-&gt;destination_state == RNC_DEST_FINAL))</div><div class='add'>+		dest_param = sci_rnc-&gt;destination_state;</div><div class='ctx'> </div><div class='del'>-	state = sci_rnc-&gt;sm.current_state_id;</div><div class='del'>-	if (state != SCI_RNC_READY) {</div><div class='add'>+	switch (state) {</div><div class='add'>+	case SCI_RNC_READY:</div><div class='add'>+		break;</div><div class='add'>+	case SCI_RNC_INVALIDATING:</div><div class='add'>+		if (sci_rnc-&gt;destination_state == RNC_DEST_FINAL) {</div><div class='add'>+			dev_warn(scirdev_to_dev(idev),</div><div class='add'>+				 "%s: already destroying %p\n",</div><div class='add'>+				 __func__, sci_rnc);</div><div class='add'>+			return SCI_FAILURE_INVALID_STATE;</div><div class='add'>+		}</div><div class='add'>+		/* Fall through and handle like SCI_RNC_POSTING */</div><div class='add'>+	case SCI_RNC_RESUMING:</div><div class='add'>+		/* Fall through and handle like SCI_RNC_POSTING */</div><div class='add'>+	case SCI_RNC_POSTING:</div><div class='add'>+		/* Set the destination state to AWAIT - this signals the</div><div class='add'>+		 * entry into the SCI_RNC_READY state that a suspension</div><div class='add'>+		 * needs to be done immediately.</div><div class='add'>+		 */</div><div class='add'>+		if (sci_rnc-&gt;destination_state != RNC_DEST_FINAL)</div><div class='add'>+			sci_rnc-&gt;destination_state = RNC_DEST_SUSPENDED;</div><div class='add'>+		sci_rnc-&gt;suspend_type = suspend_type;</div><div class='add'>+		sci_rnc-&gt;suspend_reason = suspend_reason;</div><div class='add'>+		return SCI_SUCCESS;</div><div class='add'>+</div><div class='add'>+	case SCI_RNC_TX_SUSPENDED:</div><div class='add'>+		if (suspend_type == SCU_EVENT_TL_RNC_SUSPEND_TX)</div><div class='add'>+			status = SCI_SUCCESS;</div><div class='add'>+		break;</div><div class='add'>+	case SCI_RNC_TX_RX_SUSPENDED:</div><div class='add'>+		if (suspend_type == SCU_EVENT_TL_RNC_SUSPEND_TX_RX)</div><div class='add'>+			status = SCI_SUCCESS;</div><div class='add'>+		break;</div><div class='add'>+	case SCI_RNC_AWAIT_SUSPENSION:</div><div class='add'>+		if ((sci_rnc-&gt;suspend_type == SCU_EVENT_TL_RNC_SUSPEND_TX_RX)</div><div class='add'>+		    || (suspend_type == sci_rnc-&gt;suspend_type))</div><div class='add'>+			return SCI_SUCCESS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='ctx'> 		dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='del'>-			 "%s: invalid state %d\n", __func__, state);</div><div class='add'>+			 "%s: invalid state %s\n", __func__,</div><div class='add'>+			 rnc_state_name(state));</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='add'>+	sci_rnc-&gt;destination_state = dest_param;</div><div class='add'>+	sci_rnc-&gt;suspend_type = suspend_type;</div><div class='add'>+	sci_rnc-&gt;suspend_reason = suspend_reason;</div><div class='add'>+</div><div class='add'>+	if (status == SCI_SUCCESS) { /* Already in the destination state? */</div><div class='add'>+		struct isci_host *ihost = idev-&gt;owning_port-&gt;owning_controller;</div><div class='add'>+</div><div class='add'>+		wake_up_all(&amp;ihost-&gt;eventq); /* Let observers look. */</div><div class='add'>+		return SCI_SUCCESS;</div><div class='add'>+	}</div><div class='add'>+	if ((suspend_reason == SCI_SW_SUSPEND_NORMAL) ||</div><div class='add'>+	    (suspend_reason == SCI_SW_SUSPEND_LINKHANG_DETECT)) {</div><div class='ctx'> </div><div class='del'>-	sci_rnc-&gt;user_callback   = cb_fn;</div><div class='del'>-	sci_rnc-&gt;user_cookie     = cb_p;</div><div class='del'>-	sci_rnc-&gt;suspension_code = suspend_type;</div><div class='add'>+		if (suspend_reason == SCI_SW_SUSPEND_LINKHANG_DETECT)</div><div class='add'>+			isci_dev_set_hang_detection_timeout(idev, 0x00000001);</div><div class='ctx'> </div><div class='del'>-	if (suspend_type == SCI_SOFTWARE_SUSPENSION) {</div><div class='del'>-		sci_remote_device_post_request(rnc_to_dev(sci_rnc),</div><div class='del'>-						    SCU_CONTEXT_COMMAND_POST_RNC_SUSPEND_TX);</div><div class='add'>+		sci_remote_device_post_request(</div><div class='add'>+			idev, SCI_SOFTWARE_SUSPEND_CMD);</div><div class='ctx'> 	}</div><div class='add'>+	if (state != SCI_RNC_AWAIT_SUSPENSION)</div><div class='add'>+		sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_AWAIT_SUSPENSION);</div><div class='ctx'> </div><div class='del'>-	sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_AWAIT_SUSPENSION);</div><div class='ctx'> 	return SCI_SUCCESS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -522,56 +661,86 @@ enum sci_status sci_remote_node_context_resume(struct sci_remote_node_context *s</div><div class='ctx'> 						    void *cb_p)</div><div class='ctx'> {</div><div class='ctx'> 	enum scis_sds_remote_node_context_states state;</div><div class='add'>+	struct isci_remote_device *idev = rnc_to_dev(sci_rnc);</div><div class='ctx'> </div><div class='ctx'> 	state = sci_rnc-&gt;sm.current_state_id;</div><div class='add'>+	dev_dbg(scirdev_to_dev(idev),</div><div class='add'>+		"%s: state %s, cb_fn = %p, cb_p = %p; dest_state = %d; "</div><div class='add'>+			"dev resume path %s\n",</div><div class='add'>+		__func__, rnc_state_name(state), cb_fn, cb_p,</div><div class='add'>+		sci_rnc-&gt;destination_state,</div><div class='add'>+		test_bit(IDEV_ABORT_PATH_ACTIVE, &amp;idev-&gt;flags)</div><div class='add'>+			? "&lt;abort active&gt;" : "&lt;normal&gt;");</div><div class='add'>+</div><div class='ctx'> 	switch (state) {</div><div class='ctx'> 	case SCI_RNC_INITIAL:</div><div class='ctx'> 		if (sci_rnc-&gt;remote_node_index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX)</div><div class='ctx'> 			return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> </div><div class='del'>-		sci_remote_node_context_setup_to_resume(sci_rnc, cb_fn, cb_p);</div><div class='del'>-		sci_remote_node_context_construct_buffer(sci_rnc);</div><div class='del'>-		sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_POSTING);</div><div class='add'>+		sci_remote_node_context_setup_to_resume(sci_rnc, cb_fn,	cb_p,</div><div class='add'>+							RNC_DEST_READY);</div><div class='add'>+		if (!test_bit(IDEV_ABORT_PATH_ACTIVE, &amp;idev-&gt;flags)) {</div><div class='add'>+			sci_remote_node_context_construct_buffer(sci_rnc);</div><div class='add'>+			sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_POSTING);</div><div class='add'>+		}</div><div class='ctx'> 		return SCI_SUCCESS;</div><div class='add'>+</div><div class='ctx'> 	case SCI_RNC_POSTING:</div><div class='ctx'> 	case SCI_RNC_INVALIDATING:</div><div class='ctx'> 	case SCI_RNC_RESUMING:</div><div class='del'>-		if (sci_rnc-&gt;destination_state != SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_READY)</div><div class='del'>-			return SCI_FAILURE_INVALID_STATE;</div><div class='del'>-</div><div class='del'>-		sci_rnc-&gt;user_callback = cb_fn;</div><div class='del'>-		sci_rnc-&gt;user_cookie   = cb_p;</div><div class='add'>+		/* We are still waiting to post when a resume was</div><div class='add'>+		 * requested.</div><div class='add'>+		 */</div><div class='add'>+		switch (sci_rnc-&gt;destination_state) {</div><div class='add'>+		case RNC_DEST_SUSPENDED:</div><div class='add'>+		case RNC_DEST_SUSPENDED_RESUME:</div><div class='add'>+			/* Previously waiting to suspend after posting.</div><div class='add'>+			 * Now continue onto resumption.</div><div class='add'>+			 */</div><div class='add'>+			sci_remote_node_context_setup_to_resume(</div><div class='add'>+				sci_rnc, cb_fn, cb_p,</div><div class='add'>+				RNC_DEST_SUSPENDED_RESUME);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			sci_remote_node_context_setup_to_resume(</div><div class='add'>+				sci_rnc, cb_fn, cb_p,</div><div class='add'>+				RNC_DEST_READY);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 		return SCI_SUCCESS;</div><div class='del'>-	case SCI_RNC_TX_SUSPENDED: {</div><div class='del'>-		struct isci_remote_device *idev = rnc_to_dev(sci_rnc);</div><div class='del'>-		struct domain_device *dev = idev-&gt;domain_dev;</div><div class='del'>-</div><div class='del'>-		sci_remote_node_context_setup_to_resume(sci_rnc, cb_fn, cb_p);</div><div class='del'>-</div><div class='del'>-		/* TODO: consider adding a resume action of NONE, INVALIDATE, WRITE_TLCR */</div><div class='del'>-		if (dev-&gt;dev_type == SAS_END_DEV || dev_is_expander(dev))</div><div class='del'>-			sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_RESUMING);</div><div class='del'>-		else if (dev-&gt;dev_type == SATA_DEV || (dev-&gt;tproto &amp; SAS_PROTOCOL_STP)) {</div><div class='del'>-			if (idev-&gt;is_direct_attached) {</div><div class='del'>-				/* @todo Fix this since I am being silly in writing to the STPTLDARNI register. */</div><div class='del'>-				sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_RESUMING);</div><div class='del'>-			} else {</div><div class='del'>-				sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_INVALIDATING);</div><div class='add'>+</div><div class='add'>+	case SCI_RNC_TX_SUSPENDED:</div><div class='add'>+	case SCI_RNC_TX_RX_SUSPENDED:</div><div class='add'>+		{</div><div class='add'>+			struct domain_device *dev = idev-&gt;domain_dev;</div><div class='add'>+			/* If this is an expander attached SATA device we must</div><div class='add'>+			 * invalidate and repost the RNC since this is the only</div><div class='add'>+			 * way to clear the TCi to NCQ tag mapping table for</div><div class='add'>+			 * the RNi. All other device types we can just resume.</div><div class='add'>+			 */</div><div class='add'>+			sci_remote_node_context_setup_to_resume(</div><div class='add'>+				sci_rnc, cb_fn, cb_p, RNC_DEST_READY);</div><div class='add'>+</div><div class='add'>+			if (!test_bit(IDEV_ABORT_PATH_ACTIVE, &amp;idev-&gt;flags)) {</div><div class='add'>+				if ((dev_is_sata(dev) &amp;&amp; dev-&gt;parent) ||</div><div class='add'>+				    (sci_rnc-&gt;destination_state == RNC_DEST_FINAL))</div><div class='add'>+					sci_change_state(&amp;sci_rnc-&gt;sm,</div><div class='add'>+							 SCI_RNC_INVALIDATING);</div><div class='add'>+				else</div><div class='add'>+					sci_change_state(&amp;sci_rnc-&gt;sm,</div><div class='add'>+							 SCI_RNC_RESUMING);</div><div class='ctx'> 			}</div><div class='del'>-		} else</div><div class='del'>-			return SCI_FAILURE;</div><div class='add'>+		}</div><div class='ctx'> 		return SCI_SUCCESS;</div><div class='del'>-	}</div><div class='del'>-	case SCI_RNC_TX_RX_SUSPENDED:</div><div class='del'>-		sci_remote_node_context_setup_to_resume(sci_rnc, cb_fn, cb_p);</div><div class='del'>-		sci_change_state(&amp;sci_rnc-&gt;sm, SCI_RNC_RESUMING);</div><div class='del'>-		return SCI_FAILURE_INVALID_STATE;</div><div class='add'>+</div><div class='ctx'> 	case SCI_RNC_AWAIT_SUSPENSION:</div><div class='del'>-		sci_remote_node_context_setup_to_resume(sci_rnc, cb_fn, cb_p);</div><div class='add'>+		sci_remote_node_context_setup_to_resume(</div><div class='add'>+			sci_rnc, cb_fn, cb_p, RNC_DEST_SUSPENDED_RESUME);</div><div class='ctx'> 		return SCI_SUCCESS;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='del'>-			 "%s: invalid state %d\n", __func__, state);</div><div class='add'>+			 "%s: invalid state %s\n", __func__,</div><div class='add'>+			 rnc_state_name(state));</div><div class='ctx'> 		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -590,35 +759,51 @@ enum sci_status sci_remote_node_context_start_io(struct sci_remote_node_context</div><div class='ctx'> 	case SCI_RNC_TX_RX_SUSPENDED:</div><div class='ctx'> 	case SCI_RNC_AWAIT_SUSPENSION:</div><div class='ctx'> 		dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='del'>-			 "%s: invalid state %d\n", __func__, state);</div><div class='add'>+			 "%s: invalid state %s\n", __func__,</div><div class='add'>+			 rnc_state_name(state));</div><div class='ctx'> 		return SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED;</div><div class='ctx'> 	default:</div><div class='del'>-		break;</div><div class='add'>+		dev_dbg(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='add'>+			"%s: invalid state %s\n", __func__,</div><div class='add'>+			rnc_state_name(state));</div><div class='add'>+		return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> 	}</div><div class='del'>-	dev_dbg(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='del'>-		"%s: requested to start IO while still resuming, %d\n",</div><div class='del'>-		__func__, state);</div><div class='del'>-	return SCI_FAILURE_INVALID_STATE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum sci_status sci_remote_node_context_start_task(struct sci_remote_node_context *sci_rnc,</div><div class='del'>-							struct isci_request *ireq)</div><div class='add'>+enum sci_status sci_remote_node_context_start_task(</div><div class='add'>+	struct sci_remote_node_context *sci_rnc,</div><div class='add'>+	struct isci_request *ireq,</div><div class='add'>+	scics_sds_remote_node_context_callback cb_fn,</div><div class='add'>+	void *cb_p)</div><div class='add'>+{</div><div class='add'>+	enum sci_status status = sci_remote_node_context_resume(sci_rnc,</div><div class='add'>+								cb_fn, cb_p);</div><div class='add'>+	if (status != SCI_SUCCESS)</div><div class='add'>+		dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='add'>+			"%s: resume failed: %d\n", __func__, status);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sci_remote_node_context_is_safe_to_abort(</div><div class='add'>+	struct sci_remote_node_context *sci_rnc)</div><div class='ctx'> {</div><div class='ctx'> 	enum scis_sds_remote_node_context_states state;</div><div class='ctx'> </div><div class='ctx'> 	state = sci_rnc-&gt;sm.current_state_id;</div><div class='ctx'> 	switch (state) {</div><div class='add'>+	case SCI_RNC_INVALIDATING:</div><div class='add'>+	case SCI_RNC_TX_RX_SUSPENDED:</div><div class='add'>+		return 1;</div><div class='add'>+	case SCI_RNC_POSTING:</div><div class='ctx'> 	case SCI_RNC_RESUMING:</div><div class='ctx'> 	case SCI_RNC_READY:</div><div class='del'>-	case SCI_RNC_AWAIT_SUSPENSION:</div><div class='del'>-		return SCI_SUCCESS;</div><div class='ctx'> 	case SCI_RNC_TX_SUSPENDED:</div><div class='del'>-	case SCI_RNC_TX_RX_SUSPENDED:</div><div class='del'>-		sci_remote_node_context_resume(sci_rnc, NULL, NULL);</div><div class='del'>-		return SCI_SUCCESS;</div><div class='add'>+	case SCI_RNC_AWAIT_SUSPENSION:</div><div class='add'>+	case SCI_RNC_INITIAL:</div><div class='add'>+		return 0;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_warn(scirdev_to_dev(rnc_to_dev(sci_rnc)),</div><div class='ctx'> 			 "%s: invalid state %d\n", __func__, state);</div><div class='del'>-		return SCI_FAILURE_INVALID_STATE;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/scsi/isci/remote_node_context.h b/drivers/scsi/isci/remote_node_context.h<br/>index a241e0f4c865..a703b9ce0c2c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/remote_node_context.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/remote_node_context.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/remote_node_context.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/remote_node_context.h</a></div><div class='hunk'>@@ -75,8 +75,13 @@</div><div class='ctx'>  */</div><div class='ctx'> #define SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX    0x0FFF</div><div class='ctx'> </div><div class='del'>-#define SCU_HARDWARE_SUSPENSION  (0)</div><div class='del'>-#define SCI_SOFTWARE_SUSPENSION  (1)</div><div class='add'>+enum sci_remote_node_suspension_reasons {</div><div class='add'>+	SCI_HW_SUSPEND,</div><div class='add'>+	SCI_SW_SUSPEND_NORMAL,</div><div class='add'>+	SCI_SW_SUSPEND_LINKHANG_DETECT</div><div class='add'>+};</div><div class='add'>+#define SCI_SOFTWARE_SUSPEND_CMD SCU_CONTEXT_COMMAND_POST_RNC_SUSPEND_TX_RX</div><div class='add'>+#define SCI_SOFTWARE_SUSPEND_EXPECTED_EVENT SCU_EVENT_TL_RNC_SUSPEND_TX_RX</div><div class='ctx'> </div><div class='ctx'> struct isci_request;</div><div class='ctx'> struct isci_remote_device;</div><div class='hunk'>@@ -137,9 +142,13 @@ const char *rnc_state_name(enum scis_sds_remote_node_context_states state);</div><div class='ctx'>  * node context.</div><div class='ctx'>  */</div><div class='ctx'> enum sci_remote_node_context_destination_state {</div><div class='del'>-	SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_UNSPECIFIED,</div><div class='del'>-	SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_READY,</div><div class='del'>-	SCIC_SDS_REMOTE_NODE_DESTINATION_STATE_FINAL</div><div class='add'>+	RNC_DEST_UNSPECIFIED,</div><div class='add'>+	RNC_DEST_READY,</div><div class='add'>+	RNC_DEST_FINAL,</div><div class='add'>+	RNC_DEST_SUSPENDED,       /* Set when suspend during post/invalidate */</div><div class='add'>+	RNC_DEST_SUSPENDED_RESUME /* Set when a resume was done during posting</div><div class='add'>+				   * or invalidating and already suspending.</div><div class='add'>+				   */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -156,10 +165,12 @@ struct sci_remote_node_context {</div><div class='ctx'> 	u16 remote_node_index;</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='del'>-	 * This field is the recored suspension code or the reason for the remote node</div><div class='add'>+	 * This field is the recored suspension type of the remote node</div><div class='ctx'> 	 * context suspension.</div><div class='ctx'> 	 */</div><div class='del'>-	u32 suspension_code;</div><div class='add'>+	u32 suspend_type;</div><div class='add'>+	enum sci_remote_node_suspension_reasons suspend_reason;</div><div class='add'>+	u32 suspend_count;</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='ctx'> 	 * This field is true if the remote node context is resuming from its current</div><div class='hunk'>@@ -193,6 +204,8 @@ void sci_remote_node_context_construct(struct sci_remote_node_context *rnc,</div><div class='ctx'> bool sci_remote_node_context_is_ready(</div><div class='ctx'> 	struct sci_remote_node_context *sci_rnc);</div><div class='ctx'> </div><div class='add'>+bool sci_remote_node_context_is_suspended(struct sci_remote_node_context *sci_rnc);</div><div class='add'>+</div><div class='ctx'> enum sci_status sci_remote_node_context_event_handler(struct sci_remote_node_context *sci_rnc,</div><div class='ctx'> 							   u32 event_code);</div><div class='ctx'> enum sci_status sci_remote_node_context_destruct(struct sci_remote_node_context *sci_rnc,</div><div class='hunk'>@@ -200,14 +213,24 @@ enum sci_status sci_remote_node_context_destruct(struct sci_remote_node_context</div><div class='ctx'> 						      void *callback_parameter);</div><div class='ctx'> enum sci_status sci_remote_node_context_suspend(struct sci_remote_node_context *sci_rnc,</div><div class='ctx'> 						     u32 suspend_type,</div><div class='del'>-						     scics_sds_remote_node_context_callback cb_fn,</div><div class='del'>-						     void *cb_p);</div><div class='add'>+						     u32 suspension_code);</div><div class='ctx'> enum sci_status sci_remote_node_context_resume(struct sci_remote_node_context *sci_rnc,</div><div class='ctx'> 						    scics_sds_remote_node_context_callback cb_fn,</div><div class='ctx'> 						    void *cb_p);</div><div class='ctx'> enum sci_status sci_remote_node_context_start_task(struct sci_remote_node_context *sci_rnc,</div><div class='del'>-							struct isci_request *ireq);</div><div class='add'>+						   struct isci_request *ireq,</div><div class='add'>+						   scics_sds_remote_node_context_callback cb_fn,</div><div class='add'>+						   void *cb_p);</div><div class='ctx'> enum sci_status sci_remote_node_context_start_io(struct sci_remote_node_context *sci_rnc,</div><div class='ctx'> 						      struct isci_request *ireq);</div><div class='add'>+int sci_remote_node_context_is_safe_to_abort(</div><div class='add'>+	struct sci_remote_node_context *sci_rnc);</div><div class='ctx'> </div><div class='add'>+static inline bool sci_remote_node_context_is_being_destroyed(</div><div class='add'>+	struct sci_remote_node_context *sci_rnc)</div><div class='add'>+{</div><div class='add'>+	return (sci_rnc-&gt;destination_state == RNC_DEST_FINAL)</div><div class='add'>+		|| ((sci_rnc-&gt;sm.current_state_id == SCI_RNC_INITIAL)</div><div class='add'>+		    &amp;&amp; (sci_rnc-&gt;destination_state == RNC_DEST_UNSPECIFIED));</div><div class='add'>+}</div><div class='ctx'> #endif  /* _SCIC_SDS_REMOTE_NODE_CONTEXT_H_ */</div><div class='head'>diff --git a/drivers/scsi/isci/request.c b/drivers/scsi/isci/request.c<br/>index 2def1e3960f6..7a0431c73493 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/request.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/request.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/request.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/request.c</a></div><div class='hunk'>@@ -92,11 +92,11 @@ static dma_addr_t to_sgl_element_pair_dma(struct isci_host *ihost,</div><div class='ctx'> 	if (idx == 0) {</div><div class='ctx'> 		offset = (void *) &amp;ireq-&gt;tc-&gt;sgl_pair_ab -</div><div class='ctx'> 			 (void *) &amp;ihost-&gt;task_context_table[0];</div><div class='del'>-		return ihost-&gt;task_context_dma + offset;</div><div class='add'>+		return ihost-&gt;tc_dma + offset;</div><div class='ctx'> 	} else if (idx == 1) {</div><div class='ctx'> 		offset = (void *) &amp;ireq-&gt;tc-&gt;sgl_pair_cd -</div><div class='ctx'> 			 (void *) &amp;ihost-&gt;task_context_table[0];</div><div class='del'>-		return ihost-&gt;task_context_dma + offset;</div><div class='add'>+		return ihost-&gt;tc_dma + offset;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return sci_io_request_get_dma_addr(ireq, &amp;ireq-&gt;sg_table[idx - 2]);</div><div class='hunk'>@@ -730,7 +730,7 @@ static enum sci_status sci_io_request_construct_basic_ssp(struct isci_request *i</div><div class='ctx'> {</div><div class='ctx'> 	struct sas_task *task = isci_request_access_task(ireq);</div><div class='ctx'> </div><div class='del'>-	ireq-&gt;protocol = SCIC_SSP_PROTOCOL;</div><div class='add'>+	ireq-&gt;protocol = SAS_PROTOCOL_SSP;</div><div class='ctx'> </div><div class='ctx'> 	scu_ssp_io_request_construct_task_context(ireq,</div><div class='ctx'> 						  task-&gt;data_dir,</div><div class='hunk'>@@ -763,7 +763,7 @@ static enum sci_status sci_io_request_construct_basic_sata(struct isci_request *</div><div class='ctx'> 	bool copy = false;</div><div class='ctx'> 	struct sas_task *task = isci_request_access_task(ireq);</div><div class='ctx'> </div><div class='del'>-	ireq-&gt;protocol = SCIC_STP_PROTOCOL;</div><div class='add'>+	ireq-&gt;protocol = SAS_PROTOCOL_STP;</div><div class='ctx'> </div><div class='ctx'> 	copy = (task-&gt;data_dir == DMA_NONE) ? false : true;</div><div class='ctx'> </div><div class='hunk'>@@ -863,6 +863,8 @@ sci_io_request_terminate(struct isci_request *ireq)</div><div class='ctx'> </div><div class='ctx'> 	switch (state) {</div><div class='ctx'> 	case SCI_REQ_CONSTRUCTED:</div><div class='add'>+		/* Set to make sure no HW terminate posting is done: */</div><div class='add'>+		set_bit(IREQ_TC_ABORT_POSTED, &amp;ireq-&gt;flags);</div><div class='ctx'> 		ireq-&gt;scu_status = SCU_TASK_DONE_TASK_ABORT;</div><div class='ctx'> 		ireq-&gt;sci_status = SCI_FAILURE_IO_TERMINATED;</div><div class='ctx'> 		sci_change_state(&amp;ireq-&gt;sm, SCI_REQ_COMPLETED);</div><div class='hunk'>@@ -883,8 +885,7 @@ sci_io_request_terminate(struct isci_request *ireq)</div><div class='ctx'> 	case SCI_REQ_ATAPI_WAIT_PIO_SETUP:</div><div class='ctx'> 	case SCI_REQ_ATAPI_WAIT_D2H:</div><div class='ctx'> 	case SCI_REQ_ATAPI_WAIT_TC_COMP:</div><div class='del'>-		sci_change_state(&amp;ireq-&gt;sm, SCI_REQ_ABORTING);</div><div class='del'>-		return SCI_SUCCESS;</div><div class='add'>+		/* Fall through and change state to ABORTING... */</div><div class='ctx'> 	case SCI_REQ_TASK_WAIT_TC_RESP:</div><div class='ctx'> 		/* The task frame was already confirmed to have been</div><div class='ctx'> 		 * sent by the SCU HW.  Since the state machine is</div><div class='hunk'>@@ -893,20 +894,21 @@ sci_io_request_terminate(struct isci_request *ireq)</div><div class='ctx'> 		 * and don't wait for the task response.</div><div class='ctx'> 		 */</div><div class='ctx'> 		sci_change_state(&amp;ireq-&gt;sm, SCI_REQ_ABORTING);</div><div class='del'>-		sci_change_state(&amp;ireq-&gt;sm, SCI_REQ_COMPLETED);</div><div class='del'>-		return SCI_SUCCESS;</div><div class='add'>+		/* Fall through and handle like ABORTING... */</div><div class='ctx'> 	case SCI_REQ_ABORTING:</div><div class='del'>-		/* If a request has a termination requested twice, return</div><div class='del'>-		 * a failure indication, since HW confirmation of the first</div><div class='del'>-		 * abort is still outstanding.</div><div class='add'>+		if (!isci_remote_device_is_safe_to_abort(ireq-&gt;target_device))</div><div class='add'>+			set_bit(IREQ_PENDING_ABORT, &amp;ireq-&gt;flags);</div><div class='add'>+		else</div><div class='add'>+			clear_bit(IREQ_PENDING_ABORT, &amp;ireq-&gt;flags);</div><div class='add'>+		/* If the request is only waiting on the remote device</div><div class='add'>+		 * suspension, return SUCCESS so the caller will wait too.</div><div class='ctx'> 		 */</div><div class='add'>+		return SCI_SUCCESS;</div><div class='ctx'> 	case SCI_REQ_COMPLETED:</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_warn(&amp;ireq-&gt;owning_controller-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "%s: SCIC IO Request requested to abort while in wrong "</div><div class='del'>-			 "state %d\n",</div><div class='del'>-			 __func__,</div><div class='del'>-			 ireq-&gt;sm.current_state_id);</div><div class='add'>+			 "state %d\n", __func__, ireq-&gt;sm.current_state_id);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1070,7 +1072,7 @@ request_started_state_tc_event(struct isci_request *ireq,</div><div class='ctx'> 	case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_SDBFIS):</div><div class='ctx'> 	case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_REG_ERR):</div><div class='ctx'> 	case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SDB_ERR):</div><div class='del'>-		if (ireq-&gt;protocol == SCIC_STP_PROTOCOL) {</div><div class='add'>+		if (ireq-&gt;protocol == SAS_PROTOCOL_STP) {</div><div class='ctx'> 			ireq-&gt;scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) &gt;&gt;</div><div class='ctx'> 					   SCU_COMPLETION_TL_STATUS_SHIFT;</div><div class='ctx'> 			ireq-&gt;sci_status = SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED;</div><div class='hunk'>@@ -2117,7 +2119,7 @@ static enum sci_status stp_request_udma_await_tc_event(struct isci_request *ireq</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (ireq-&gt;stp.rsp.fis_type == FIS_REGD2H) {</div><div class='ctx'> 			sci_remote_device_suspend(ireq-&gt;target_device,</div><div class='del'>-				SCU_EVENT_SPECIFIC(SCU_NORMALIZE_COMPLETION_STATUS(completion_code)));</div><div class='add'>+						  SCI_SW_SUSPEND_NORMAL);</div><div class='ctx'> </div><div class='ctx'> 			ireq-&gt;scu_status = SCU_TASK_DONE_CHECK_RESPONSE;</div><div class='ctx'> 			ireq-&gt;sci_status = SCI_FAILURE_IO_RESPONSE_VALID;</div><div class='hunk'>@@ -2138,13 +2140,6 @@ static enum sci_status stp_request_udma_await_tc_event(struct isci_request *ireq</div><div class='ctx'> 	/* TODO We can retry the command for SCU_TASK_DONE_CMD_LL_R_ERR</div><div class='ctx'> 	 * - this comes only for B0</div><div class='ctx'> 	 */</div><div class='del'>-	case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_INV_FIS_LEN):</div><div class='del'>-	case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_MAX_PLD_ERR):</div><div class='del'>-	case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_R_ERR):</div><div class='del'>-	case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CMD_LL_R_ERR):</div><div class='del'>-		sci_remote_device_suspend(ireq-&gt;target_device,</div><div class='del'>-			SCU_EVENT_SPECIFIC(SCU_NORMALIZE_COMPLETION_STATUS(completion_code)));</div><div class='del'>-		/* Fall through to the default case */</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* All other completion status cause the IO to be complete. */</div><div class='ctx'> 		ireq-&gt;scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code);</div><div class='hunk'>@@ -2262,15 +2257,151 @@ static enum sci_status atapi_data_tc_completion_handler(struct isci_request *ire</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int sci_request_smp_completion_status_is_tx_suspend(</div><div class='add'>+	unsigned int completion_status)</div><div class='add'>+{</div><div class='add'>+	switch (completion_status) {</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_WRONG_DESTINATION:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_BAD_DESTINATION:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_ZONE_VIOLATION:</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sci_request_smp_completion_status_is_tx_rx_suspend(</div><div class='add'>+	unsigned int completion_status)</div><div class='add'>+{</div><div class='add'>+	return 0; /* There are no Tx/Rx SMP suspend conditions. */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sci_request_ssp_completion_status_is_tx_suspend(</div><div class='add'>+	unsigned int completion_status)</div><div class='add'>+{</div><div class='add'>+	switch (completion_status) {</div><div class='add'>+	case SCU_TASK_DONE_TX_RAW_CMD_ERR:</div><div class='add'>+	case SCU_TASK_DONE_LF_ERR:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_WRONG_DESTINATION:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_BAD_DESTINATION:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_ZONE_VIOLATION:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED:</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sci_request_ssp_completion_status_is_tx_rx_suspend(</div><div class='add'>+	unsigned int completion_status)</div><div class='add'>+{</div><div class='add'>+	return 0; /* There are no Tx/Rx SSP suspend conditions. */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sci_request_stpsata_completion_status_is_tx_suspend(</div><div class='add'>+	unsigned int completion_status)</div><div class='add'>+{</div><div class='add'>+	switch (completion_status) {</div><div class='add'>+	case SCU_TASK_DONE_TX_RAW_CMD_ERR:</div><div class='add'>+	case SCU_TASK_DONE_LL_R_ERR:</div><div class='add'>+	case SCU_TASK_DONE_LL_PERR:</div><div class='add'>+	case SCU_TASK_DONE_REG_ERR:</div><div class='add'>+	case SCU_TASK_DONE_SDB_ERR:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_WRONG_DESTINATION:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_BAD_DESTINATION:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_ZONE_VIOLATION:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED:</div><div class='add'>+	case SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED:</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int sci_request_stpsata_completion_status_is_tx_rx_suspend(</div><div class='add'>+	unsigned int completion_status)</div><div class='add'>+{</div><div class='add'>+	switch (completion_status) {</div><div class='add'>+	case SCU_TASK_DONE_LF_ERR:</div><div class='add'>+	case SCU_TASK_DONE_LL_SY_TERM:</div><div class='add'>+	case SCU_TASK_DONE_LL_LF_TERM:</div><div class='add'>+	case SCU_TASK_DONE_BREAK_RCVD:</div><div class='add'>+	case SCU_TASK_DONE_INV_FIS_LEN:</div><div class='add'>+	case SCU_TASK_DONE_UNEXP_FIS:</div><div class='add'>+	case SCU_TASK_DONE_UNEXP_SDBFIS:</div><div class='add'>+	case SCU_TASK_DONE_MAX_PLD_ERR:</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sci_request_handle_suspending_completions(</div><div class='add'>+	struct isci_request *ireq,</div><div class='add'>+	u32 completion_code)</div><div class='add'>+{</div><div class='add'>+	int is_tx = 0;</div><div class='add'>+	int is_tx_rx = 0;</div><div class='add'>+</div><div class='add'>+	switch (ireq-&gt;protocol) {</div><div class='add'>+	case SAS_PROTOCOL_SMP:</div><div class='add'>+		is_tx = sci_request_smp_completion_status_is_tx_suspend(</div><div class='add'>+			completion_code);</div><div class='add'>+		is_tx_rx = sci_request_smp_completion_status_is_tx_rx_suspend(</div><div class='add'>+			completion_code);</div><div class='add'>+		break;</div><div class='add'>+	case SAS_PROTOCOL_SSP:</div><div class='add'>+		is_tx = sci_request_ssp_completion_status_is_tx_suspend(</div><div class='add'>+			completion_code);</div><div class='add'>+		is_tx_rx = sci_request_ssp_completion_status_is_tx_rx_suspend(</div><div class='add'>+			completion_code);</div><div class='add'>+		break;</div><div class='add'>+	case SAS_PROTOCOL_STP:</div><div class='add'>+		is_tx = sci_request_stpsata_completion_status_is_tx_suspend(</div><div class='add'>+			completion_code);</div><div class='add'>+		is_tx_rx =</div><div class='add'>+			sci_request_stpsata_completion_status_is_tx_rx_suspend(</div><div class='add'>+				completion_code);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;ireq-&gt;isci_host-&gt;pdev-&gt;dev,</div><div class='add'>+			 "%s: request %p has no valid protocol\n",</div><div class='add'>+			 __func__, ireq);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (is_tx || is_tx_rx) {</div><div class='add'>+		BUG_ON(is_tx &amp;&amp; is_tx_rx);</div><div class='add'>+</div><div class='add'>+		sci_remote_node_context_suspend(</div><div class='add'>+			&amp;ireq-&gt;target_device-&gt;rnc,</div><div class='add'>+			SCI_HW_SUSPEND,</div><div class='add'>+			(is_tx_rx) ? SCU_EVENT_TL_RNC_SUSPEND_TX_RX</div><div class='add'>+				   : SCU_EVENT_TL_RNC_SUSPEND_TX);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> enum sci_status</div><div class='ctx'> sci_io_request_tc_completion(struct isci_request *ireq,</div><div class='del'>-				  u32 completion_code)</div><div class='add'>+			     u32 completion_code)</div><div class='ctx'> {</div><div class='ctx'> 	enum sci_base_request_states state;</div><div class='ctx'> 	struct isci_host *ihost = ireq-&gt;owning_controller;</div><div class='ctx'> </div><div class='ctx'> 	state = ireq-&gt;sm.current_state_id;</div><div class='ctx'> </div><div class='add'>+	/* Decode those completions that signal upcoming suspension events. */</div><div class='add'>+	sci_request_handle_suspending_completions(</div><div class='add'>+		ireq, SCU_GET_COMPLETION_TL_STATUS(completion_code));</div><div class='add'>+</div><div class='ctx'> 	switch (state) {</div><div class='ctx'> 	case SCI_REQ_STARTED:</div><div class='ctx'> 		return request_started_state_tc_event(ireq, completion_code);</div><div class='hunk'>@@ -2362,9 +2493,6 @@ static void isci_request_process_response_iu(</div><div class='ctx'>  * @request: This parameter is the completed isci_request object.</div><div class='ctx'>  * @response_ptr: This parameter specifies the service response for the I/O.</div><div class='ctx'>  * @status_ptr: This parameter specifies the exec status for the I/O.</div><div class='del'>- * @complete_to_host_ptr: This parameter specifies the action to be taken by</div><div class='del'>- *    the LLDD with respect to completing this request or forcing an abort</div><div class='del'>- *    condition on the I/O.</div><div class='ctx'>  * @open_rej_reason: This parameter specifies the encoded reason for the</div><div class='ctx'>  *    abandon-class reject.</div><div class='ctx'>  *</div><div class='hunk'>@@ -2375,14 +2503,12 @@ static void isci_request_set_open_reject_status(</div><div class='ctx'> 	struct sas_task *task,</div><div class='ctx'> 	enum service_response *response_ptr,</div><div class='ctx'> 	enum exec_status *status_ptr,</div><div class='del'>-	enum isci_completion_selection *complete_to_host_ptr,</div><div class='ctx'> 	enum sas_open_rej_reason open_rej_reason)</div><div class='ctx'> {</div><div class='ctx'> 	/* Task in the target is done. */</div><div class='ctx'> 	set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='ctx'> 	*response_ptr                     = SAS_TASK_UNDELIVERED;</div><div class='ctx'> 	*status_ptr                       = SAS_OPEN_REJECT;</div><div class='del'>-	*complete_to_host_ptr             = isci_perform_normal_io_completion;</div><div class='ctx'> 	task-&gt;task_status.open_rej_reason = open_rej_reason;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2392,9 +2518,6 @@ static void isci_request_set_open_reject_status(</div><div class='ctx'>  * @request: This parameter is the completed isci_request object.</div><div class='ctx'>  * @response_ptr: This parameter specifies the service response for the I/O.</div><div class='ctx'>  * @status_ptr: This parameter specifies the exec status for the I/O.</div><div class='del'>- * @complete_to_host_ptr: This parameter specifies the action to be taken by</div><div class='del'>- *    the LLDD with respect to completing this request or forcing an abort</div><div class='del'>- *    condition on the I/O.</div><div class='ctx'>  *</div><div class='ctx'>  * none.</div><div class='ctx'>  */</div><div class='hunk'>@@ -2403,8 +2526,7 @@ static void isci_request_handle_controller_specific_errors(</div><div class='ctx'> 	struct isci_request *request,</div><div class='ctx'> 	struct sas_task *task,</div><div class='ctx'> 	enum service_response *response_ptr,</div><div class='del'>-	enum exec_status *status_ptr,</div><div class='del'>-	enum isci_completion_selection *complete_to_host_ptr)</div><div class='add'>+	enum exec_status *status_ptr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cstatus;</div><div class='ctx'> </div><div class='hunk'>@@ -2445,9 +2567,6 @@ static void isci_request_handle_controller_specific_errors(</div><div class='ctx'> 				*status_ptr = SAS_ABORTED_TASK;</div><div class='ctx'> </div><div class='ctx'> 			set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-</div><div class='del'>-			*complete_to_host_ptr =</div><div class='del'>-				isci_perform_normal_io_completion;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Task in the target is not done. */</div><div class='ctx'> 			*response_ptr = SAS_TASK_UNDELIVERED;</div><div class='hunk'>@@ -2458,9 +2577,6 @@ static void isci_request_handle_controller_specific_errors(</div><div class='ctx'> 				*status_ptr = SAM_STAT_TASK_ABORTED;</div><div class='ctx'> </div><div class='ctx'> 			clear_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-</div><div class='del'>-			*complete_to_host_ptr =</div><div class='del'>-				isci_perform_error_io_completion;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2489,8 +2605,6 @@ static void isci_request_handle_controller_specific_errors(</div><div class='ctx'> 			*status_ptr = SAS_ABORTED_TASK;</div><div class='ctx'> </div><div class='ctx'> 		set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-</div><div class='del'>-		*complete_to_host_ptr = isci_perform_normal_io_completion;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -2501,7 +2615,7 @@ static void isci_request_handle_controller_specific_errors(</div><div class='ctx'> </div><div class='ctx'> 		isci_request_set_open_reject_status(</div><div class='ctx'> 			request, task, response_ptr, status_ptr,</div><div class='del'>-			complete_to_host_ptr, SAS_OREJ_WRONG_DEST);</div><div class='add'>+			SAS_OREJ_WRONG_DEST);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SCU_TASK_OPEN_REJECT_ZONE_VIOLATION:</div><div class='hunk'>@@ -2511,56 +2625,56 @@ static void isci_request_handle_controller_specific_errors(</div><div class='ctx'> 		 */</div><div class='ctx'> 		isci_request_set_open_reject_status(</div><div class='ctx'> 			request, task, response_ptr, status_ptr,</div><div class='del'>-			complete_to_host_ptr, SAS_OREJ_RESV_AB0);</div><div class='add'>+			SAS_OREJ_RESV_AB0);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1:</div><div class='ctx'> </div><div class='ctx'> 		isci_request_set_open_reject_status(</div><div class='ctx'> 			request, task, response_ptr, status_ptr,</div><div class='del'>-			complete_to_host_ptr, SAS_OREJ_RESV_AB1);</div><div class='add'>+			SAS_OREJ_RESV_AB1);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2:</div><div class='ctx'> </div><div class='ctx'> 		isci_request_set_open_reject_status(</div><div class='ctx'> 			request, task, response_ptr, status_ptr,</div><div class='del'>-			complete_to_host_ptr, SAS_OREJ_RESV_AB2);</div><div class='add'>+			SAS_OREJ_RESV_AB2);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3:</div><div class='ctx'> </div><div class='ctx'> 		isci_request_set_open_reject_status(</div><div class='ctx'> 			request, task, response_ptr, status_ptr,</div><div class='del'>-			complete_to_host_ptr, SAS_OREJ_RESV_AB3);</div><div class='add'>+			SAS_OREJ_RESV_AB3);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SCU_TASK_OPEN_REJECT_BAD_DESTINATION:</div><div class='ctx'> </div><div class='ctx'> 		isci_request_set_open_reject_status(</div><div class='ctx'> 			request, task, response_ptr, status_ptr,</div><div class='del'>-			complete_to_host_ptr, SAS_OREJ_BAD_DEST);</div><div class='add'>+			SAS_OREJ_BAD_DEST);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY:</div><div class='ctx'> </div><div class='ctx'> 		isci_request_set_open_reject_status(</div><div class='ctx'> 			request, task, response_ptr, status_ptr,</div><div class='del'>-			complete_to_host_ptr, SAS_OREJ_STP_NORES);</div><div class='add'>+			SAS_OREJ_STP_NORES);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED:</div><div class='ctx'> </div><div class='ctx'> 		isci_request_set_open_reject_status(</div><div class='ctx'> 			request, task, response_ptr, status_ptr,</div><div class='del'>-			complete_to_host_ptr, SAS_OREJ_EPROTO);</div><div class='add'>+			SAS_OREJ_EPROTO);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED:</div><div class='ctx'> </div><div class='ctx'> 		isci_request_set_open_reject_status(</div><div class='ctx'> 			request, task, response_ptr, status_ptr,</div><div class='del'>-			complete_to_host_ptr, SAS_OREJ_CONN_RATE);</div><div class='add'>+			SAS_OREJ_CONN_RATE);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SCU_TASK_DONE_LL_R_ERR:</div><div class='hunk'>@@ -2592,95 +2706,12 @@ static void isci_request_handle_controller_specific_errors(</div><div class='ctx'> 		*response_ptr = SAS_TASK_UNDELIVERED;</div><div class='ctx'> 		*status_ptr = SAM_STAT_TASK_ABORTED;</div><div class='ctx'> </div><div class='del'>-		if (task-&gt;task_proto == SAS_PROTOCOL_SMP) {</div><div class='add'>+		if (task-&gt;task_proto == SAS_PROTOCOL_SMP)</div><div class='ctx'> 			set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-</div><div class='del'>-			*complete_to_host_ptr = isci_perform_normal_io_completion;</div><div class='del'>-		} else {</div><div class='add'>+		else</div><div class='ctx'> 			clear_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-</div><div class='del'>-			*complete_to_host_ptr = isci_perform_error_io_completion;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * isci_task_save_for_upper_layer_completion() - This function saves the</div><div class='del'>- *    request for later completion to the upper layer driver.</div><div class='del'>- * @host: This parameter is a pointer to the host on which the the request</div><div class='del'>- *    should be queued (either as an error or success).</div><div class='del'>- * @request: This parameter is the completed request.</div><div class='del'>- * @response: This parameter is the response code for the completed task.</div><div class='del'>- * @status: This parameter is the status code for the completed task.</div><div class='del'>- *</div><div class='del'>- * none.</div><div class='del'>- */</div><div class='del'>-static void isci_task_save_for_upper_layer_completion(</div><div class='del'>-	struct isci_host *host,</div><div class='del'>-	struct isci_request *request,</div><div class='del'>-	enum service_response response,</div><div class='del'>-	enum exec_status status,</div><div class='del'>-	enum isci_completion_selection task_notification_selection)</div><div class='del'>-{</div><div class='del'>-	struct sas_task *task = isci_request_access_task(request);</div><div class='del'>-</div><div class='del'>-	task_notification_selection</div><div class='del'>-		= isci_task_set_completion_status(task, response, status,</div><div class='del'>-						  task_notification_selection);</div><div class='del'>-</div><div class='del'>-	/* Tasks aborted specifically by a call to the lldd_abort_task</div><div class='del'>-	 * function should not be completed to the host in the regular path.</div><div class='del'>-	 */</div><div class='del'>-	switch (task_notification_selection) {</div><div class='del'>-</div><div class='del'>-	case isci_perform_normal_io_completion:</div><div class='del'>-		/* Normal notification (task_done) */</div><div class='del'>-</div><div class='del'>-		/* Add to the completed list. */</div><div class='del'>-		list_add(&amp;request-&gt;completed_node,</div><div class='del'>-			 &amp;host-&gt;requests_to_complete);</div><div class='del'>-</div><div class='del'>-		/* Take the request off the device's pending request list. */</div><div class='del'>-		list_del_init(&amp;request-&gt;dev_node);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case isci_perform_aborted_io_completion:</div><div class='del'>-		/* No notification to libsas because this request is</div><div class='del'>-		 * already in the abort path.</div><div class='del'>-		 */</div><div class='del'>-		/* Wake up whatever process was waiting for this</div><div class='del'>-		 * request to complete.</div><div class='del'>-		 */</div><div class='del'>-		WARN_ON(request-&gt;io_request_completion == NULL);</div><div class='del'>-</div><div class='del'>-		if (request-&gt;io_request_completion != NULL) {</div><div class='del'>-</div><div class='del'>-			/* Signal whoever is waiting that this</div><div class='del'>-			* request is complete.</div><div class='del'>-			*/</div><div class='del'>-			complete(request-&gt;io_request_completion);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case isci_perform_error_io_completion:</div><div class='del'>-		/* Use sas_task_abort */</div><div class='del'>-		/* Add to the aborted list. */</div><div class='del'>-		list_add(&amp;request-&gt;completed_node,</div><div class='del'>-			 &amp;host-&gt;requests_to_errorback);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		/* Add to the error to libsas list. */</div><div class='del'>-		list_add(&amp;request-&gt;completed_node,</div><div class='del'>-			 &amp;host-&gt;requests_to_errorback);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	dev_dbg(&amp;host-&gt;pdev-&gt;dev,</div><div class='del'>-		"%s: %d - task = %p, response=%d (%d), status=%d (%d)\n",</div><div class='del'>-		__func__, task_notification_selection, task,</div><div class='del'>-		(task) ? task-&gt;task_status.resp : 0, response,</div><div class='del'>-		(task) ? task-&gt;task_status.stat : 0, status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void isci_process_stp_response(struct sas_task *task, struct dev_to_host_fis *fis)</div><div class='hunk'>@@ -2715,295 +2746,164 @@ static void isci_request_io_request_complete(struct isci_host *ihost,</div><div class='ctx'> 	struct isci_remote_device *idev = request-&gt;target_device;</div><div class='ctx'> 	enum service_response response = SAS_TASK_UNDELIVERED;</div><div class='ctx'> 	enum exec_status status = SAS_ABORTED_TASK;</div><div class='del'>-	enum isci_request_status request_status;</div><div class='del'>-	enum isci_completion_selection complete_to_host</div><div class='del'>-		= isci_perform_normal_io_completion;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-		"%s: request = %p, task = %p,\n"</div><div class='add'>+		"%s: request = %p, task = %p, "</div><div class='ctx'> 		"task-&gt;data_dir = %d completion_status = 0x%x\n",</div><div class='del'>-		__func__,</div><div class='del'>-		request,</div><div class='del'>-		task,</div><div class='del'>-		task-&gt;data_dir,</div><div class='del'>-		completion_status);</div><div class='add'>+		__func__, request, task, task-&gt;data_dir, completion_status);</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;request-&gt;state_lock);</div><div class='del'>-	request_status = request-&gt;status;</div><div class='add'>+	/* The request is done from an SCU HW perspective. */</div><div class='ctx'> </div><div class='del'>-	/* Decode the request status.  Note that if the request has been</div><div class='del'>-	 * aborted by a task management function, we don't care</div><div class='del'>-	 * what the status is.</div><div class='del'>-	 */</div><div class='del'>-	switch (request_status) {</div><div class='del'>-</div><div class='del'>-	case aborted:</div><div class='del'>-		/* "aborted" indicates that the request was aborted by a task</div><div class='del'>-		 * management function, since once a task management request is</div><div class='del'>-		 * perfomed by the device, the request only completes because</div><div class='del'>-		 * of the subsequent driver terminate.</div><div class='del'>-		 *</div><div class='del'>-		 * Aborted also means an external thread is explicitly managing</div><div class='del'>-		 * this request, so that we do not complete it up the stack.</div><div class='del'>-		 *</div><div class='del'>-		 * The target is still there (since the TMF was successful).</div><div class='del'>-		 */</div><div class='del'>-		set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-		response = SAS_TASK_COMPLETE;</div><div class='add'>+	/* This is an active request being completed from the core. */</div><div class='add'>+	switch (completion_status) {</div><div class='ctx'> </div><div class='del'>-		/* See if the device has been/is being stopped. Note</div><div class='del'>-		 * that we ignore the quiesce state, since we are</div><div class='del'>-		 * concerned about the actual device state.</div><div class='del'>-		 */</div><div class='del'>-		if (!idev)</div><div class='del'>-			status = SAS_DEVICE_UNKNOWN;</div><div class='del'>-		else</div><div class='del'>-			status = SAS_ABORTED_TASK;</div><div class='add'>+	case SCI_IO_FAILURE_RESPONSE_VALID:</div><div class='add'>+		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+			"%s: SCI_IO_FAILURE_RESPONSE_VALID (%p/%p)\n",</div><div class='add'>+			__func__, request, task);</div><div class='add'>+</div><div class='add'>+		if (sas_protocol_ata(task-&gt;task_proto)) {</div><div class='add'>+			isci_process_stp_response(task, &amp;request-&gt;stp.rsp);</div><div class='add'>+		} else if (SAS_PROTOCOL_SSP == task-&gt;task_proto) {</div><div class='add'>+</div><div class='add'>+			/* crack the iu response buffer. */</div><div class='add'>+			resp_iu = &amp;request-&gt;ssp.rsp;</div><div class='add'>+			isci_request_process_response_iu(task, resp_iu,</div><div class='add'>+							 &amp;ihost-&gt;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+		} else if (SAS_PROTOCOL_SMP == task-&gt;task_proto) {</div><div class='add'>+</div><div class='add'>+			dev_err(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+				"%s: SCI_IO_FAILURE_RESPONSE_VALID: "</div><div class='add'>+					"SAS_PROTOCOL_SMP protocol\n",</div><div class='add'>+				__func__);</div><div class='ctx'> </div><div class='del'>-		complete_to_host = isci_perform_aborted_io_completion;</div><div class='del'>-		/* This was an aborted request. */</div><div class='add'>+		} else</div><div class='add'>+			dev_err(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+				"%s: unknown protocol\n", __func__);</div><div class='ctx'> </div><div class='del'>-		spin_unlock(&amp;request-&gt;state_lock);</div><div class='add'>+		/* use the task status set in the task struct by the</div><div class='add'>+		* isci_request_process_response_iu call.</div><div class='add'>+		*/</div><div class='add'>+		set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='add'>+		response = task-&gt;task_status.resp;</div><div class='add'>+		status = task-&gt;task_status.stat;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case aborting:</div><div class='del'>-		/* aborting means that the task management function tried and</div><div class='del'>-		 * failed to abort the request. We need to note the request</div><div class='del'>-		 * as SAS_TASK_UNDELIVERED, so that the scsi mid layer marks the</div><div class='del'>-		 * target as down.</div><div class='del'>-		 *</div><div class='del'>-		 * Aborting also means an external thread is explicitly managing</div><div class='del'>-		 * this request, so that we do not complete it up the stack.</div><div class='del'>-		 */</div><div class='add'>+	case SCI_IO_SUCCESS:</div><div class='add'>+	case SCI_IO_SUCCESS_IO_DONE_EARLY:</div><div class='add'>+</div><div class='add'>+		response = SAS_TASK_COMPLETE;</div><div class='add'>+		status   = SAM_STAT_GOOD;</div><div class='ctx'> 		set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-		response = SAS_TASK_UNDELIVERED;</div><div class='ctx'> </div><div class='del'>-		if (!idev)</div><div class='del'>-			/* The device has been /is being stopped. Note that</div><div class='del'>-			 * we ignore the quiesce state, since we are</div><div class='del'>-			 * concerned about the actual device state.</div><div class='del'>-			 */</div><div class='del'>-			status = SAS_DEVICE_UNKNOWN;</div><div class='del'>-		else</div><div class='del'>-			status = SAS_PHY_DOWN;</div><div class='add'>+		if (completion_status == SCI_IO_SUCCESS_IO_DONE_EARLY) {</div><div class='ctx'> </div><div class='del'>-		complete_to_host = isci_perform_aborted_io_completion;</div><div class='add'>+			/* This was an SSP / STP / SATA transfer.</div><div class='add'>+			* There is a possibility that less data than</div><div class='add'>+			* the maximum was transferred.</div><div class='add'>+			*/</div><div class='add'>+			u32 transferred_length = sci_req_tx_bytes(request);</div><div class='ctx'> </div><div class='del'>-		/* This was an aborted request. */</div><div class='add'>+			task-&gt;task_status.residual</div><div class='add'>+				= task-&gt;total_xfer_len - transferred_length;</div><div class='add'>+</div><div class='add'>+			/* If there were residual bytes, call this an</div><div class='add'>+			* underrun.</div><div class='add'>+			*/</div><div class='add'>+			if (task-&gt;task_status.residual != 0)</div><div class='add'>+				status = SAS_DATA_UNDERRUN;</div><div class='ctx'> </div><div class='del'>-		spin_unlock(&amp;request-&gt;state_lock);</div><div class='add'>+			dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+				"%s: SCI_IO_SUCCESS_IO_DONE_EARLY %d\n",</div><div class='add'>+				__func__, status);</div><div class='add'>+</div><div class='add'>+		} else</div><div class='add'>+			dev_dbg(&amp;ihost-&gt;pdev-&gt;dev, "%s: SCI_IO_SUCCESS\n",</div><div class='add'>+				__func__);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case terminating:</div><div class='add'>+	case SCI_IO_FAILURE_TERMINATED:</div><div class='ctx'> </div><div class='del'>-		/* This was an terminated request.  This happens when</div><div class='del'>-		 * the I/O is being terminated because of an action on</div><div class='del'>-		 * the device (reset, tear down, etc.), and the I/O needs</div><div class='del'>-		 * to be completed up the stack.</div><div class='del'>-		 */</div><div class='add'>+		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+			"%s: SCI_IO_FAILURE_TERMINATED (%p/%p)\n",</div><div class='add'>+			__func__, request, task);</div><div class='add'>+</div><div class='add'>+		/* The request was terminated explicitly. */</div><div class='ctx'> 		set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='ctx'> 		response = SAS_TASK_UNDELIVERED;</div><div class='ctx'> </div><div class='ctx'> 		/* See if the device has been/is being stopped. Note</div><div class='del'>-		 * that we ignore the quiesce state, since we are</div><div class='del'>-		 * concerned about the actual device state.</div><div class='del'>-		 */</div><div class='add'>+		* that we ignore the quiesce state, since we are</div><div class='add'>+		* concerned about the actual device state.</div><div class='add'>+		*/</div><div class='ctx'> 		if (!idev)</div><div class='ctx'> 			status = SAS_DEVICE_UNKNOWN;</div><div class='ctx'> 		else</div><div class='ctx'> 			status = SAS_ABORTED_TASK;</div><div class='del'>-</div><div class='del'>-		complete_to_host = isci_perform_aborted_io_completion;</div><div class='del'>-</div><div class='del'>-		/* This was a terminated request. */</div><div class='del'>-</div><div class='del'>-		spin_unlock(&amp;request-&gt;state_lock);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case dead:</div><div class='del'>-		/* This was a terminated request that timed-out during the</div><div class='del'>-		 * termination process.  There is no task to complete to</div><div class='del'>-		 * libsas.</div><div class='del'>-		 */</div><div class='del'>-		complete_to_host = isci_perform_normal_io_completion;</div><div class='del'>-		spin_unlock(&amp;request-&gt;state_lock);</div><div class='del'>-		break;</div><div class='add'>+	case SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR:</div><div class='ctx'> </div><div class='del'>-	default:</div><div class='del'>-</div><div class='del'>-		/* The request is done from an SCU HW perspective. */</div><div class='del'>-		request-&gt;status = completed;</div><div class='del'>-</div><div class='del'>-		spin_unlock(&amp;request-&gt;state_lock);</div><div class='del'>-</div><div class='del'>-		/* This is an active request being completed from the core. */</div><div class='del'>-		switch (completion_status) {</div><div class='del'>-</div><div class='del'>-		case SCI_IO_FAILURE_RESPONSE_VALID:</div><div class='del'>-			dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-				"%s: SCI_IO_FAILURE_RESPONSE_VALID (%p/%p)\n",</div><div class='del'>-				__func__,</div><div class='del'>-				request,</div><div class='del'>-				task);</div><div class='del'>-</div><div class='del'>-			if (sas_protocol_ata(task-&gt;task_proto)) {</div><div class='del'>-				isci_process_stp_response(task, &amp;request-&gt;stp.rsp);</div><div class='del'>-			} else if (SAS_PROTOCOL_SSP == task-&gt;task_proto) {</div><div class='del'>-</div><div class='del'>-				/* crack the iu response buffer. */</div><div class='del'>-				resp_iu = &amp;request-&gt;ssp.rsp;</div><div class='del'>-				isci_request_process_response_iu(task, resp_iu,</div><div class='del'>-								 &amp;ihost-&gt;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-			} else if (SAS_PROTOCOL_SMP == task-&gt;task_proto) {</div><div class='del'>-</div><div class='del'>-				dev_err(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-					"%s: SCI_IO_FAILURE_RESPONSE_VALID: "</div><div class='del'>-					"SAS_PROTOCOL_SMP protocol\n",</div><div class='del'>-					__func__);</div><div class='del'>-</div><div class='del'>-			} else</div><div class='del'>-				dev_err(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-					"%s: unknown protocol\n", __func__);</div><div class='del'>-</div><div class='del'>-			/* use the task status set in the task struct by the</div><div class='del'>-			 * isci_request_process_response_iu call.</div><div class='del'>-			 */</div><div class='del'>-			set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-			response = task-&gt;task_status.resp;</div><div class='del'>-			status = task-&gt;task_status.stat;</div><div class='del'>-			break;</div><div class='add'>+		isci_request_handle_controller_specific_errors(idev, request,</div><div class='add'>+							       task, &amp;response,</div><div class='add'>+							       &amp;status);</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-		case SCI_IO_SUCCESS:</div><div class='del'>-		case SCI_IO_SUCCESS_IO_DONE_EARLY:</div><div class='add'>+	case SCI_IO_FAILURE_REMOTE_DEVICE_RESET_REQUIRED:</div><div class='add'>+		/* This is a special case, in that the I/O completion</div><div class='add'>+		* is telling us that the device needs a reset.</div><div class='add'>+		* In order for the device reset condition to be</div><div class='add'>+		* noticed, the I/O has to be handled in the error</div><div class='add'>+		* handler.  Set the reset flag and cause the</div><div class='add'>+		* SCSI error thread to be scheduled.</div><div class='add'>+		*/</div><div class='add'>+		spin_lock_irqsave(&amp;task-&gt;task_state_lock, task_flags);</div><div class='add'>+		task-&gt;task_state_flags |= SAS_TASK_NEED_DEV_RESET;</div><div class='add'>+		spin_unlock_irqrestore(&amp;task-&gt;task_state_lock, task_flags);</div><div class='ctx'> </div><div class='del'>-			response = SAS_TASK_COMPLETE;</div><div class='del'>-			status   = SAM_STAT_GOOD;</div><div class='del'>-			set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='add'>+		/* Fail the I/O. */</div><div class='add'>+		response = SAS_TASK_UNDELIVERED;</div><div class='add'>+		status = SAM_STAT_TASK_ABORTED;</div><div class='ctx'> </div><div class='del'>-			if (completion_status == SCI_IO_SUCCESS_IO_DONE_EARLY) {</div><div class='add'>+		clear_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-				/* This was an SSP / STP / SATA transfer.</div><div class='del'>-				 * There is a possibility that less data than</div><div class='del'>-				 * the maximum was transferred.</div><div class='del'>-				 */</div><div class='del'>-				u32 transferred_length = sci_req_tx_bytes(request);</div><div class='add'>+	case SCI_FAILURE_RETRY_REQUIRED:</div><div class='ctx'> </div><div class='del'>-				task-&gt;task_status.residual</div><div class='del'>-					= task-&gt;total_xfer_len - transferred_length;</div><div class='add'>+		/* Fail the I/O so it can be retried. */</div><div class='add'>+		response = SAS_TASK_UNDELIVERED;</div><div class='add'>+		if (!idev)</div><div class='add'>+			status = SAS_DEVICE_UNKNOWN;</div><div class='add'>+		else</div><div class='add'>+			status = SAS_ABORTED_TASK;</div><div class='ctx'> </div><div class='del'>-				/* If there were residual bytes, call this an</div><div class='del'>-				 * underrun.</div><div class='del'>-				 */</div><div class='del'>-				if (task-&gt;task_status.residual != 0)</div><div class='del'>-					status = SAS_DATA_UNDERRUN;</div><div class='add'>+		set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-				dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-					"%s: SCI_IO_SUCCESS_IO_DONE_EARLY %d\n",</div><div class='del'>-					__func__,</div><div class='del'>-					status);</div><div class='ctx'> </div><div class='del'>-			} else</div><div class='del'>-				dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-					"%s: SCI_IO_SUCCESS\n",</div><div class='del'>-					__func__);</div><div class='add'>+	default:</div><div class='add'>+		/* Catch any otherwise unhandled error codes here. */</div><div class='add'>+		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+			"%s: invalid completion code: 0x%x - "</div><div class='add'>+				"isci_request = %p\n",</div><div class='add'>+			__func__, completion_status, request);</div><div class='ctx'> </div><div class='del'>-			break;</div><div class='add'>+		response = SAS_TASK_UNDELIVERED;</div><div class='ctx'> </div><div class='del'>-		case SCI_IO_FAILURE_TERMINATED:</div><div class='del'>-			dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-				"%s: SCI_IO_FAILURE_TERMINATED (%p/%p)\n",</div><div class='del'>-				__func__,</div><div class='del'>-				request,</div><div class='del'>-				task);</div><div class='add'>+		/* See if the device has been/is being stopped. Note</div><div class='add'>+		* that we ignore the quiesce state, since we are</div><div class='add'>+		* concerned about the actual device state.</div><div class='add'>+		*/</div><div class='add'>+		if (!idev)</div><div class='add'>+			status = SAS_DEVICE_UNKNOWN;</div><div class='add'>+		else</div><div class='add'>+			status = SAS_ABORTED_TASK;</div><div class='ctx'> </div><div class='del'>-			/* The request was terminated explicitly.  No handling</div><div class='del'>-			 * is needed in the SCSI error handler path.</div><div class='del'>-			 */</div><div class='add'>+		if (SAS_PROTOCOL_SMP == task-&gt;task_proto)</div><div class='ctx'> 			set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-			response = SAS_TASK_UNDELIVERED;</div><div class='del'>-</div><div class='del'>-			/* See if the device has been/is being stopped. Note</div><div class='del'>-			 * that we ignore the quiesce state, since we are</div><div class='del'>-			 * concerned about the actual device state.</div><div class='del'>-			 */</div><div class='del'>-			if (!idev)</div><div class='del'>-				status = SAS_DEVICE_UNKNOWN;</div><div class='del'>-			else</div><div class='del'>-				status = SAS_ABORTED_TASK;</div><div class='del'>-</div><div class='del'>-			complete_to_host = isci_perform_normal_io_completion;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR:</div><div class='del'>-</div><div class='del'>-			isci_request_handle_controller_specific_errors(</div><div class='del'>-				idev, request, task, &amp;response, &amp;status,</div><div class='del'>-				&amp;complete_to_host);</div><div class='del'>-</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case SCI_IO_FAILURE_REMOTE_DEVICE_RESET_REQUIRED:</div><div class='del'>-			/* This is a special case, in that the I/O completion</div><div class='del'>-			 * is telling us that the device needs a reset.</div><div class='del'>-			 * In order for the device reset condition to be</div><div class='del'>-			 * noticed, the I/O has to be handled in the error</div><div class='del'>-			 * handler.  Set the reset flag and cause the</div><div class='del'>-			 * SCSI error thread to be scheduled.</div><div class='del'>-			 */</div><div class='del'>-			spin_lock_irqsave(&amp;task-&gt;task_state_lock, task_flags);</div><div class='del'>-			task-&gt;task_state_flags |= SAS_TASK_NEED_DEV_RESET;</div><div class='del'>-			spin_unlock_irqrestore(&amp;task-&gt;task_state_lock, task_flags);</div><div class='del'>-</div><div class='del'>-			/* Fail the I/O. */</div><div class='del'>-			response = SAS_TASK_UNDELIVERED;</div><div class='del'>-			status = SAM_STAT_TASK_ABORTED;</div><div class='del'>-</div><div class='del'>-			complete_to_host = isci_perform_error_io_completion;</div><div class='add'>+		else</div><div class='ctx'> 			clear_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case SCI_FAILURE_RETRY_REQUIRED:</div><div class='del'>-</div><div class='del'>-			/* Fail the I/O so it can be retried. */</div><div class='del'>-			response = SAS_TASK_UNDELIVERED;</div><div class='del'>-			if (!idev)</div><div class='del'>-				status = SAS_DEVICE_UNKNOWN;</div><div class='del'>-			else</div><div class='del'>-				status = SAS_ABORTED_TASK;</div><div class='del'>-</div><div class='del'>-			complete_to_host = isci_perform_normal_io_completion;</div><div class='del'>-			set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		default:</div><div class='del'>-			/* Catch any otherwise unhandled error codes here. */</div><div class='del'>-			dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-				 "%s: invalid completion code: 0x%x - "</div><div class='del'>-				 "isci_request = %p\n",</div><div class='del'>-				 __func__, completion_status, request);</div><div class='del'>-</div><div class='del'>-			response = SAS_TASK_UNDELIVERED;</div><div class='del'>-</div><div class='del'>-			/* See if the device has been/is being stopped. Note</div><div class='del'>-			 * that we ignore the quiesce state, since we are</div><div class='del'>-			 * concerned about the actual device state.</div><div class='del'>-			 */</div><div class='del'>-			if (!idev)</div><div class='del'>-				status = SAS_DEVICE_UNKNOWN;</div><div class='del'>-			else</div><div class='del'>-				status = SAS_ABORTED_TASK;</div><div class='del'>-</div><div class='del'>-			if (SAS_PROTOCOL_SMP == task-&gt;task_proto) {</div><div class='del'>-				set_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-				complete_to_host = isci_perform_normal_io_completion;</div><div class='del'>-			} else {</div><div class='del'>-				clear_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags);</div><div class='del'>-				complete_to_host = isci_perform_error_io_completion;</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3038,10 +2938,18 @@ static void isci_request_io_request_complete(struct isci_host *ihost,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Put the completed request on the correct list */</div><div class='del'>-	isci_task_save_for_upper_layer_completion(ihost, request, response,</div><div class='del'>-						  status, complete_to_host</div><div class='del'>-						  );</div><div class='add'>+	spin_lock_irqsave(&amp;task-&gt;task_state_lock, task_flags);</div><div class='add'>+</div><div class='add'>+	task-&gt;task_status.resp = response;</div><div class='add'>+	task-&gt;task_status.stat = status;</div><div class='add'>+</div><div class='add'>+	if (test_bit(IREQ_COMPLETE_IN_TARGET, &amp;request-&gt;flags)) {</div><div class='add'>+		/* Normal notification (task_done) */</div><div class='add'>+		task-&gt;task_state_flags |= SAS_TASK_STATE_DONE;</div><div class='add'>+		task-&gt;task_state_flags &amp;= ~(SAS_TASK_AT_INITIATOR |</div><div class='add'>+					    SAS_TASK_STATE_PENDING);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;task-&gt;task_state_lock, task_flags);</div><div class='ctx'> </div><div class='ctx'> 	/* complete the io request to the core. */</div><div class='ctx'> 	sci_controller_complete_io(ihost, request-&gt;target_device, request);</div><div class='hunk'>@@ -3051,6 +2959,8 @@ static void isci_request_io_request_complete(struct isci_host *ihost,</div><div class='ctx'> 	 * task to recognize the already completed case.</div><div class='ctx'> 	 */</div><div class='ctx'> 	set_bit(IREQ_TERMINATED, &amp;request-&gt;flags);</div><div class='add'>+</div><div class='add'>+	ireq_done(ihost, request, task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sci_request_started_state_enter(struct sci_base_state_machine *sm)</div><div class='hunk'>@@ -3169,7 +3079,7 @@ sci_general_request_construct(struct isci_host *ihost,</div><div class='ctx'> 	sci_init_sm(&amp;ireq-&gt;sm, sci_request_state_table, SCI_REQ_INIT);</div><div class='ctx'> </div><div class='ctx'> 	ireq-&gt;target_device = idev;</div><div class='del'>-	ireq-&gt;protocol = SCIC_NO_PROTOCOL;</div><div class='add'>+	ireq-&gt;protocol = SAS_PROTOCOL_NONE;</div><div class='ctx'> 	ireq-&gt;saved_rx_frame_index = SCU_INVALID_FRAME_INDEX;</div><div class='ctx'> </div><div class='ctx'> 	ireq-&gt;sci_status   = SCI_SUCCESS;</div><div class='hunk'>@@ -3193,7 +3103,7 @@ sci_io_request_construct(struct isci_host *ihost,</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;dev_type == SAS_END_DEV)</div><div class='ctx'> 		/* pass */;</div><div class='del'>-	else if (dev-&gt;dev_type == SATA_DEV || (dev-&gt;tproto &amp; SAS_PROTOCOL_STP))</div><div class='add'>+	else if (dev_is_sata(dev))</div><div class='ctx'> 		memset(&amp;ireq-&gt;stp.cmd, 0, sizeof(ireq-&gt;stp.cmd));</div><div class='ctx'> 	else if (dev_is_expander(dev))</div><div class='ctx'> 		/* pass */;</div><div class='hunk'>@@ -3215,10 +3125,15 @@ enum sci_status sci_task_request_construct(struct isci_host *ihost,</div><div class='ctx'> 	/* Build the common part of the request */</div><div class='ctx'> 	sci_general_request_construct(ihost, idev, ireq);</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;dev_type == SAS_END_DEV ||</div><div class='del'>-	    dev-&gt;dev_type == SATA_DEV || (dev-&gt;tproto &amp; SAS_PROTOCOL_STP)) {</div><div class='add'>+	if (dev-&gt;dev_type == SAS_END_DEV || dev_is_sata(dev)) {</div><div class='ctx'> 		set_bit(IREQ_TMF, &amp;ireq-&gt;flags);</div><div class='ctx'> 		memset(ireq-&gt;tc, 0, sizeof(struct scu_task_context));</div><div class='add'>+</div><div class='add'>+		/* Set the protocol indicator. */</div><div class='add'>+		if (dev_is_sata(dev))</div><div class='add'>+			ireq-&gt;protocol = SAS_PROTOCOL_STP;</div><div class='add'>+		else</div><div class='add'>+			ireq-&gt;protocol = SAS_PROTOCOL_SSP;</div><div class='ctx'> 	} else</div><div class='ctx'> 		status = SCI_FAILURE_UNSUPPORTED_PROTOCOL;</div><div class='ctx'> </div><div class='hunk'>@@ -3311,7 +3226,7 @@ sci_io_request_construct_smp(struct device *dev,</div><div class='ctx'> 	if (!dma_map_sg(dev, sg, 1, DMA_TO_DEVICE))</div><div class='ctx'> 		return SCI_FAILURE;</div><div class='ctx'> </div><div class='del'>-	ireq-&gt;protocol = SCIC_SMP_PROTOCOL;</div><div class='add'>+	ireq-&gt;protocol = SAS_PROTOCOL_SMP;</div><div class='ctx'> </div><div class='ctx'> 	/* byte swap the smp request. */</div><div class='ctx'> </div><div class='hunk'>@@ -3496,9 +3411,6 @@ static struct isci_request *isci_request_from_tag(struct isci_host *ihost, u16 t</div><div class='ctx'> 	ireq-&gt;io_request_completion = NULL;</div><div class='ctx'> 	ireq-&gt;flags = 0;</div><div class='ctx'> 	ireq-&gt;num_sg_entries = 0;</div><div class='del'>-	INIT_LIST_HEAD(&amp;ireq-&gt;completed_node);</div><div class='del'>-	INIT_LIST_HEAD(&amp;ireq-&gt;dev_node);</div><div class='del'>-	isci_request_change_state(ireq, allocated);</div><div class='ctx'> </div><div class='ctx'> 	return ireq;</div><div class='ctx'> }</div><div class='hunk'>@@ -3582,26 +3494,15 @@ int isci_request_execute(struct isci_host *ihost, struct isci_remote_device *ide</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> 		return status;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	/* Either I/O started OK, or the core has signaled that</div><div class='ctx'> 	 * the device needs a target reset.</div><div class='del'>-	 *</div><div class='del'>-	 * In either case, hold onto the I/O for later.</div><div class='del'>-	 *</div><div class='del'>-	 * Update it's status and add it to the list in the</div><div class='del'>-	 * remote device object.</div><div class='ctx'> 	 */</div><div class='del'>-	list_add(&amp;ireq-&gt;dev_node, &amp;idev-&gt;reqs_in_process);</div><div class='del'>-</div><div class='del'>-	if (status == SCI_SUCCESS) {</div><div class='del'>-		isci_request_change_state(ireq, started);</div><div class='del'>-	} else {</div><div class='add'>+	if (status != SCI_SUCCESS) {</div><div class='ctx'> 		/* The request did not really start in the</div><div class='ctx'> 		 * hardware, so clear the request handle</div><div class='ctx'> 		 * here so no terminations will be done.</div><div class='ctx'> 		 */</div><div class='ctx'> 		set_bit(IREQ_TERMINATED, &amp;ireq-&gt;flags);</div><div class='del'>-		isci_request_change_state(ireq, completed);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/isci/request.h b/drivers/scsi/isci/request.h<br/>index 057f2378452d..aff95317fcf4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/request.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/request.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/request.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/request.h</a></div><div class='hunk'>@@ -61,30 +61,6 @@</div><div class='ctx'> #include "scu_task_context.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * struct isci_request_status - This enum defines the possible states of an I/O</div><div class='del'>- *    request.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-enum isci_request_status {</div><div class='del'>-	unallocated = 0x00,</div><div class='del'>-	allocated   = 0x01,</div><div class='del'>-	started     = 0x02,</div><div class='del'>-	completed   = 0x03,</div><div class='del'>-	aborting    = 0x04,</div><div class='del'>-	aborted     = 0x05,</div><div class='del'>-	terminating = 0x06,</div><div class='del'>-	dead        = 0x07</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum sci_request_protocol {</div><div class='del'>-	SCIC_NO_PROTOCOL,</div><div class='del'>-	SCIC_SMP_PROTOCOL,</div><div class='del'>-	SCIC_SSP_PROTOCOL,</div><div class='del'>-	SCIC_STP_PROTOCOL</div><div class='del'>-}; /* XXX remove me, use sas_task.{dev|task_proto} instead */;</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * isci_stp_request - extra request infrastructure to handle pio/atapi protocol</div><div class='ctx'>  * @pio_len - number of bytes requested at PIO setup</div><div class='ctx'>  * @status - pio setup ending status value to tell us if we need</div><div class='hunk'>@@ -104,11 +80,14 @@ struct isci_stp_request {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct isci_request {</div><div class='del'>-	enum isci_request_status status;</div><div class='ctx'> 	#define IREQ_COMPLETE_IN_TARGET 0</div><div class='ctx'> 	#define IREQ_TERMINATED 1</div><div class='ctx'> 	#define IREQ_TMF 2</div><div class='ctx'> 	#define IREQ_ACTIVE 3</div><div class='add'>+	#define IREQ_PENDING_ABORT 4 /* Set == device was not suspended yet */</div><div class='add'>+	#define IREQ_TC_ABORT_POSTED 5</div><div class='add'>+	#define IREQ_ABORT_PATH_ACTIVE 6</div><div class='add'>+	#define IREQ_NO_AUTO_FREE_TAG 7 /* Set when being explicitly managed */</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	/* XXX kill ttype and ttype_ptr, allocate full sas_task */</div><div class='ctx'> 	union ttype_ptr_union {</div><div class='hunk'>@@ -116,11 +95,6 @@ struct isci_request {</div><div class='ctx'> 		struct isci_tmf *tmf_task_ptr;  /* When ttype==tmf_task */</div><div class='ctx'> 	} ttype_ptr;</div><div class='ctx'> 	struct isci_host *isci_host;</div><div class='del'>-	/* For use in the requests_to_{complete|abort} lists: */</div><div class='del'>-	struct list_head completed_node;</div><div class='del'>-	/* For use in the reqs_in_process list: */</div><div class='del'>-	struct list_head dev_node;</div><div class='del'>-	spinlock_t state_lock;</div><div class='ctx'> 	dma_addr_t request_daddr;</div><div class='ctx'> 	dma_addr_t zero_scatter_daddr;</div><div class='ctx'> 	unsigned int num_sg_entries;</div><div class='hunk'>@@ -140,7 +114,7 @@ struct isci_request {</div><div class='ctx'> 	struct isci_host *owning_controller;</div><div class='ctx'> 	struct isci_remote_device *target_device;</div><div class='ctx'> 	u16 io_tag;</div><div class='del'>-	enum sci_request_protocol protocol;</div><div class='add'>+	enum sas_protocol protocol;</div><div class='ctx'> 	u32 scu_status; /* hardware result */</div><div class='ctx'> 	u32 sci_status; /* upper layer disposition */</div><div class='ctx'> 	u32 post_context;</div><div class='hunk'>@@ -309,92 +283,6 @@ sci_io_request_get_dma_addr(struct isci_request *ireq, void *virt_addr)</div><div class='ctx'> 	return ireq-&gt;request_daddr + (requested_addr - base_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * isci_request_change_state() - This function sets the status of the request</div><div class='del'>- *    object.</div><div class='del'>- * @request: This parameter points to the isci_request object</div><div class='del'>- * @status: This Parameter is the new status of the object</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static inline enum isci_request_status</div><div class='del'>-isci_request_change_state(struct isci_request *isci_request,</div><div class='del'>-			  enum isci_request_status status)</div><div class='del'>-{</div><div class='del'>-	enum isci_request_status old_state;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;isci_request-&gt;isci_host-&gt;pdev-&gt;dev,</div><div class='del'>-		"%s: isci_request = %p, state = 0x%x\n",</div><div class='del'>-		__func__,</div><div class='del'>-		isci_request,</div><div class='del'>-		status);</div><div class='del'>-</div><div class='del'>-	BUG_ON(isci_request == NULL);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;isci_request-&gt;state_lock, flags);</div><div class='del'>-	old_state = isci_request-&gt;status;</div><div class='del'>-	isci_request-&gt;status = status;</div><div class='del'>-	spin_unlock_irqrestore(&amp;isci_request-&gt;state_lock, flags);</div><div class='del'>-</div><div class='del'>-	return old_state;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * isci_request_change_started_to_newstate() - This function sets the status of</div><div class='del'>- *    the request object.</div><div class='del'>- * @request: This parameter points to the isci_request object</div><div class='del'>- * @status: This Parameter is the new status of the object</div><div class='del'>- *</div><div class='del'>- * state previous to any change.</div><div class='del'>- */</div><div class='del'>-static inline enum isci_request_status</div><div class='del'>-isci_request_change_started_to_newstate(struct isci_request *isci_request,</div><div class='del'>-					struct completion *completion_ptr,</div><div class='del'>-					enum isci_request_status newstate)</div><div class='del'>-{</div><div class='del'>-	enum isci_request_status old_state;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;isci_request-&gt;state_lock, flags);</div><div class='del'>-</div><div class='del'>-	old_state = isci_request-&gt;status;</div><div class='del'>-</div><div class='del'>-	if (old_state == started || old_state == aborting) {</div><div class='del'>-		BUG_ON(isci_request-&gt;io_request_completion != NULL);</div><div class='del'>-</div><div class='del'>-		isci_request-&gt;io_request_completion = completion_ptr;</div><div class='del'>-		isci_request-&gt;status = newstate;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;isci_request-&gt;state_lock, flags);</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;isci_request-&gt;isci_host-&gt;pdev-&gt;dev,</div><div class='del'>-		"%s: isci_request = %p, old_state = 0x%x\n",</div><div class='del'>-		__func__,</div><div class='del'>-		isci_request,</div><div class='del'>-		old_state);</div><div class='del'>-</div><div class='del'>-	return old_state;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * isci_request_change_started_to_aborted() - This function sets the status of</div><div class='del'>- *    the request object.</div><div class='del'>- * @request: This parameter points to the isci_request object</div><div class='del'>- * @completion_ptr: This parameter is saved as the kernel completion structure</div><div class='del'>- *    signalled when the old request completes.</div><div class='del'>- *</div><div class='del'>- * state previous to any change.</div><div class='del'>- */</div><div class='del'>-static inline enum isci_request_status</div><div class='del'>-isci_request_change_started_to_aborted(struct isci_request *isci_request,</div><div class='del'>-				       struct completion *completion_ptr)</div><div class='del'>-{</div><div class='del'>-	return isci_request_change_started_to_newstate(isci_request,</div><div class='del'>-						       completion_ptr,</div><div class='del'>-						       aborted);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define isci_request_access_task(req) ((req)-&gt;ttype_ptr.io_task_ptr)</div><div class='ctx'> </div><div class='ctx'> #define isci_request_access_tmf(req) ((req)-&gt;ttype_ptr.tmf_task_ptr)</div><div class='hunk'>@@ -404,8 +292,6 @@ struct isci_request *isci_tmf_request_from_tag(struct isci_host *ihost,</div><div class='ctx'> 					       u16 tag);</div><div class='ctx'> int isci_request_execute(struct isci_host *ihost, struct isci_remote_device *idev,</div><div class='ctx'> 			 struct sas_task *task, u16 tag);</div><div class='del'>-void isci_terminate_pending_requests(struct isci_host *ihost,</div><div class='del'>-				     struct isci_remote_device *idev);</div><div class='ctx'> enum sci_status</div><div class='ctx'> sci_task_request_construct(struct isci_host *ihost,</div><div class='ctx'> 			    struct isci_remote_device *idev,</div><div class='hunk'>@@ -421,5 +307,4 @@ static inline int isci_task_is_ncq_recovery(struct sas_task *task)</div><div class='ctx'> 		task-&gt;ata_task.fis.lbal == ATA_LOG_SATA_NCQ);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> #endif /* !defined(_ISCI_REQUEST_H_) */</div><div class='head'>diff --git a/drivers/scsi/isci/scu_completion_codes.h b/drivers/scsi/isci/scu_completion_codes.h<br/>index c8b329c695f9..071cb74a211c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/scu_completion_codes.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/scu_completion_codes.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/scu_completion_codes.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/scu_completion_codes.h</a></div><div class='hunk'>@@ -224,6 +224,7 @@</div><div class='ctx'>  * 32-bit value like we want, each immediate value must be cast to a u32.</div><div class='ctx'>  */</div><div class='ctx'> #define SCU_TASK_DONE_GOOD                                  ((u32)0x00)</div><div class='add'>+#define SCU_TASK_DONE_TX_RAW_CMD_ERR                        ((u32)0x08)</div><div class='ctx'> #define SCU_TASK_DONE_CRC_ERR                               ((u32)0x14)</div><div class='ctx'> #define SCU_TASK_DONE_CHECK_RESPONSE                        ((u32)0x14)</div><div class='ctx'> #define SCU_TASK_DONE_GEN_RESPONSE                          ((u32)0x15)</div><div class='hunk'>@@ -237,6 +238,7 @@</div><div class='ctx'> #define SCU_TASK_DONE_LL_LF_TERM                            ((u32)0x1A)</div><div class='ctx'> #define SCU_TASK_DONE_DATA_LEN_ERR                          ((u32)0x1A)</div><div class='ctx'> #define SCU_TASK_DONE_LL_CL_TERM                            ((u32)0x1B)</div><div class='add'>+#define SCU_TASK_DONE_BREAK_RCVD                            ((u32)0x1B)</div><div class='ctx'> #define SCU_TASK_DONE_LL_ABORT_ERR                          ((u32)0x1B)</div><div class='ctx'> #define SCU_TASK_DONE_SEQ_INV_TYPE                          ((u32)0x1C)</div><div class='ctx'> #define SCU_TASK_DONE_UNEXP_XR                              ((u32)0x1C)</div><div class='head'>diff --git a/drivers/scsi/isci/task.c b/drivers/scsi/isci/task.c<br/>index 374254ede9d4..6bc74eb012c9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/task.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/task.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/task.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/task.c</a></div><div class='hunk'>@@ -78,54 +78,25 @@ static void isci_task_refuse(struct isci_host *ihost, struct sas_task *task,</div><div class='ctx'> 			     enum exec_status status)</div><div class='ctx'> </div><div class='ctx'> {</div><div class='del'>-	enum isci_completion_selection disposition;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	disposition = isci_perform_normal_io_completion;</div><div class='del'>-	disposition = isci_task_set_completion_status(task, response, status,</div><div class='del'>-						      disposition);</div><div class='add'>+	/* Normal notification (task_done) */</div><div class='add'>+	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev, "%s: task = %p, response=%d, status=%d\n",</div><div class='add'>+		__func__, task, response, status);</div><div class='ctx'> </div><div class='del'>-	/* Tasks aborted specifically by a call to the lldd_abort_task</div><div class='del'>-	 * function should not be completed to the host in the regular path.</div><div class='del'>-	 */</div><div class='del'>-	switch (disposition) {</div><div class='del'>-	case isci_perform_normal_io_completion:</div><div class='del'>-		/* Normal notification (task_done) */</div><div class='del'>-		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			"%s: Normal - task = %p, response=%d, "</div><div class='del'>-			"status=%d\n",</div><div class='del'>-			__func__, task, response, status);</div><div class='del'>-</div><div class='del'>-		task-&gt;lldd_task = NULL;</div><div class='del'>-		task-&gt;task_done(task);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case isci_perform_aborted_io_completion:</div><div class='del'>-		/*</div><div class='del'>-		 * No notification because this request is already in the</div><div class='del'>-		 * abort path.</div><div class='del'>-		 */</div><div class='del'>-		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			"%s: Aborted - task = %p, response=%d, "</div><div class='del'>-			"status=%d\n",</div><div class='del'>-			__func__, task, response, status);</div><div class='del'>-		break;</div><div class='add'>+	spin_lock_irqsave(&amp;task-&gt;task_state_lock, flags);</div><div class='ctx'> </div><div class='del'>-	case isci_perform_error_io_completion:</div><div class='del'>-		/* Use sas_task_abort */</div><div class='del'>-		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			"%s: Error - task = %p, response=%d, "</div><div class='del'>-			"status=%d\n",</div><div class='del'>-			__func__, task, response, status);</div><div class='del'>-		sas_task_abort(task);</div><div class='del'>-		break;</div><div class='add'>+	task-&gt;task_status.resp = response;</div><div class='add'>+	task-&gt;task_status.stat = status;</div><div class='ctx'> </div><div class='del'>-	default:</div><div class='del'>-		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			"%s: isci task notification default case!",</div><div class='del'>-			__func__);</div><div class='del'>-		sas_task_abort(task);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	/* Normal notification (task_done) */</div><div class='add'>+	task-&gt;task_state_flags |= SAS_TASK_STATE_DONE;</div><div class='add'>+	task-&gt;task_state_flags &amp;= ~(SAS_TASK_AT_INITIATOR |</div><div class='add'>+				    SAS_TASK_STATE_PENDING);</div><div class='add'>+	task-&gt;lldd_task = NULL;</div><div class='add'>+	spin_unlock_irqrestore(&amp;task-&gt;task_state_lock, flags);</div><div class='add'>+</div><div class='add'>+	task-&gt;task_done(task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define for_each_sas_task(num, task) \</div><div class='hunk'>@@ -289,60 +260,6 @@ static struct isci_request *isci_task_request_build(struct isci_host *ihost,</div><div class='ctx'> 	return ireq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>-* isci_request_mark_zombie() - This function must be called with scic_lock held.</div><div class='del'>-*/</div><div class='del'>-static void isci_request_mark_zombie(struct isci_host *ihost, struct isci_request *ireq)</div><div class='del'>-{</div><div class='del'>-	struct completion *tmf_completion = NULL;</div><div class='del'>-	struct completion *req_completion;</div><div class='del'>-</div><div class='del'>-	/* Set the request state to "dead". */</div><div class='del'>-	ireq-&gt;status = dead;</div><div class='del'>-</div><div class='del'>-	req_completion = ireq-&gt;io_request_completion;</div><div class='del'>-	ireq-&gt;io_request_completion = NULL;</div><div class='del'>-</div><div class='del'>-	if (test_bit(IREQ_TMF, &amp;ireq-&gt;flags)) {</div><div class='del'>-		/* Break links with the TMF request. */</div><div class='del'>-		struct isci_tmf *tmf = isci_request_access_tmf(ireq);</div><div class='del'>-</div><div class='del'>-		/* In the case where a task request is dying,</div><div class='del'>-		 * the thread waiting on the complete will sit and</div><div class='del'>-		 * timeout unless we wake it now.  Since the TMF</div><div class='del'>-		 * has a default error status, complete it here</div><div class='del'>-		 * to wake the waiting thread.</div><div class='del'>-		 */</div><div class='del'>-		if (tmf) {</div><div class='del'>-			tmf_completion = tmf-&gt;complete;</div><div class='del'>-			tmf-&gt;complete = NULL;</div><div class='del'>-		}</div><div class='del'>-		ireq-&gt;ttype_ptr.tmf_task_ptr = NULL;</div><div class='del'>-		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev, "%s: tmf_code %d, managed tag %#x\n",</div><div class='del'>-			__func__, tmf-&gt;tmf_code, tmf-&gt;io_tag);</div><div class='del'>-	} else {</div><div class='del'>-		/* Break links with the sas_task - the callback is done</div><div class='del'>-		 * elsewhere.</div><div class='del'>-		 */</div><div class='del'>-		struct sas_task *task = isci_request_access_task(ireq);</div><div class='del'>-</div><div class='del'>-		if (task)</div><div class='del'>-			task-&gt;lldd_task = NULL;</div><div class='del'>-</div><div class='del'>-		ireq-&gt;ttype_ptr.io_task_ptr = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_warn(&amp;ihost-&gt;pdev-&gt;dev, "task context unrecoverable (tag: %#x)\n",</div><div class='del'>-		 ireq-&gt;io_tag);</div><div class='del'>-</div><div class='del'>-	/* Don't force waiting threads to timeout. */</div><div class='del'>-	if (req_completion)</div><div class='del'>-		complete(req_completion);</div><div class='del'>-</div><div class='del'>-	if (tmf_completion != NULL)</div><div class='del'>-		complete(tmf_completion);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int isci_task_execute_tmf(struct isci_host *ihost,</div><div class='ctx'> 				 struct isci_remote_device *idev,</div><div class='ctx'> 				 struct isci_tmf *tmf, unsigned long timeout_ms)</div><div class='hunk'>@@ -400,17 +317,11 @@ static int isci_task_execute_tmf(struct isci_host *ihost,</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> 		goto err_tci;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (tmf-&gt;cb_state_func != NULL)</div><div class='del'>-		tmf-&gt;cb_state_func(isci_tmf_started, tmf, tmf-&gt;cb_data);</div><div class='del'>-</div><div class='del'>-	isci_request_change_state(ireq, started);</div><div class='del'>-</div><div class='del'>-	/* add the request to the remote device request list. */</div><div class='del'>-	list_add(&amp;ireq-&gt;dev_node, &amp;idev-&gt;reqs_in_process);</div><div class='del'>-</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> </div><div class='add'>+	/* The RNC must be unsuspended before the TMF can get a response. */</div><div class='add'>+	isci_remote_device_resume_from_abort(ihost, idev);</div><div class='add'>+</div><div class='ctx'> 	/* Wait for the TMF to complete, or a timeout. */</div><div class='ctx'> 	timeleft = wait_for_completion_timeout(&amp;completion,</div><div class='ctx'> 					       msecs_to_jiffies(timeout_ms));</div><div class='hunk'>@@ -419,32 +330,7 @@ static int isci_task_execute_tmf(struct isci_host *ihost,</div><div class='ctx'> 		/* The TMF did not complete - this could be because</div><div class='ctx'> 		 * of an unplug.  Terminate the TMF request now.</div><div class='ctx'> 		 */</div><div class='del'>-		spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-</div><div class='del'>-		if (tmf-&gt;cb_state_func != NULL)</div><div class='del'>-			tmf-&gt;cb_state_func(isci_tmf_timed_out, tmf,</div><div class='del'>-					   tmf-&gt;cb_data);</div><div class='del'>-</div><div class='del'>-		sci_controller_terminate_request(ihost, idev, ireq);</div><div class='del'>-</div><div class='del'>-		spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-</div><div class='del'>-		timeleft = wait_for_completion_timeout(</div><div class='del'>-			&amp;completion,</div><div class='del'>-			msecs_to_jiffies(ISCI_TERMINATION_TIMEOUT_MSEC));</div><div class='del'>-</div><div class='del'>-		if (!timeleft) {</div><div class='del'>-			/* Strange condition - the termination of the TMF</div><div class='del'>-			 * request timed-out.</div><div class='del'>-			 */</div><div class='del'>-			spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-</div><div class='del'>-			/* If the TMF status has not changed, kill it. */</div><div class='del'>-			if (tmf-&gt;status == SCI_FAILURE_TIMEOUT)</div><div class='del'>-				isci_request_mark_zombie(ihost, ireq);</div><div class='del'>-</div><div class='del'>-			spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-		}</div><div class='add'>+		isci_remote_device_suspend_terminate(ihost, idev, ireq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	isci_print_tmf(ihost, tmf);</div><div class='hunk'>@@ -476,315 +362,21 @@ static int isci_task_execute_tmf(struct isci_host *ihost,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void isci_task_build_tmf(struct isci_tmf *tmf,</div><div class='del'>-				enum isci_tmf_function_codes code,</div><div class='del'>-				void (*tmf_sent_cb)(enum isci_tmf_cb_state,</div><div class='del'>-						    struct isci_tmf *,</div><div class='del'>-						    void *),</div><div class='del'>-				void *cb_data)</div><div class='add'>+				enum isci_tmf_function_codes code)</div><div class='ctx'> {</div><div class='ctx'> 	memset(tmf, 0, sizeof(*tmf));</div><div class='del'>-</div><div class='del'>-	tmf-&gt;tmf_code      = code;</div><div class='del'>-	tmf-&gt;cb_state_func = tmf_sent_cb;</div><div class='del'>-	tmf-&gt;cb_data       = cb_data;</div><div class='add'>+	tmf-&gt;tmf_code = code;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void isci_task_build_abort_task_tmf(struct isci_tmf *tmf,</div><div class='ctx'> 					   enum isci_tmf_function_codes code,</div><div class='del'>-					   void (*tmf_sent_cb)(enum isci_tmf_cb_state,</div><div class='del'>-							       struct isci_tmf *,</div><div class='del'>-							       void *),</div><div class='ctx'> 					   struct isci_request *old_request)</div><div class='ctx'> {</div><div class='del'>-	isci_task_build_tmf(tmf, code, tmf_sent_cb, old_request);</div><div class='add'>+	isci_task_build_tmf(tmf, code);</div><div class='ctx'> 	tmf-&gt;io_tag = old_request-&gt;io_tag;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * isci_task_validate_request_to_abort() - This function checks the given I/O</div><div class='del'>- *    against the "started" state.  If the request is still "started", it's</div><div class='del'>- *    state is changed to aborted. NOTE: isci_host-&gt;scic_lock MUST BE HELD</div><div class='del'>- *    BEFORE CALLING THIS FUNCTION.</div><div class='del'>- * @isci_request: This parameter specifies the request object to control.</div><div class='del'>- * @isci_host: This parameter specifies the ISCI host object</div><div class='del'>- * @isci_device: This is the device to which the request is pending.</div><div class='del'>- * @aborted_io_completion: This is a completion structure that will be added to</div><div class='del'>- *    the request in case it is changed to aborting; this completion is</div><div class='del'>- *    triggered when the request is fully completed.</div><div class='del'>- *</div><div class='del'>- * Either "started" on successful change of the task status to "aborted", or</div><div class='del'>- * "unallocated" if the task cannot be controlled.</div><div class='del'>- */</div><div class='del'>-static enum isci_request_status isci_task_validate_request_to_abort(</div><div class='del'>-	struct isci_request *isci_request,</div><div class='del'>-	struct isci_host *isci_host,</div><div class='del'>-	struct isci_remote_device *isci_device,</div><div class='del'>-	struct completion *aborted_io_completion)</div><div class='del'>-{</div><div class='del'>-	enum isci_request_status old_state = unallocated;</div><div class='del'>-</div><div class='del'>-	/* Only abort the task if it's in the</div><div class='del'>-	 *  device's request_in_process list</div><div class='del'>-	 */</div><div class='del'>-	if (isci_request &amp;&amp; !list_empty(&amp;isci_request-&gt;dev_node)) {</div><div class='del'>-		old_state = isci_request_change_started_to_aborted(</div><div class='del'>-			isci_request, aborted_io_completion);</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return old_state;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int isci_request_is_dealloc_managed(enum isci_request_status stat)</div><div class='del'>-{</div><div class='del'>-	switch (stat) {</div><div class='del'>-	case aborted:</div><div class='del'>-	case aborting:</div><div class='del'>-	case terminating:</div><div class='del'>-	case completed:</div><div class='del'>-	case dead:</div><div class='del'>-		return true;</div><div class='del'>-	default:</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * isci_terminate_request_core() - This function will terminate the given</div><div class='del'>- *    request, and wait for it to complete.  This function must only be called</div><div class='del'>- *    from a thread that can wait.  Note that the request is terminated and</div><div class='del'>- *    completed (back to the host, if started there).</div><div class='del'>- * @ihost: This SCU.</div><div class='del'>- * @idev: The target.</div><div class='del'>- * @isci_request: The I/O request to be terminated.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static void isci_terminate_request_core(struct isci_host *ihost,</div><div class='del'>-					struct isci_remote_device *idev,</div><div class='del'>-					struct isci_request *isci_request)</div><div class='del'>-{</div><div class='del'>-	enum sci_status status      = SCI_SUCCESS;</div><div class='del'>-	bool was_terminated         = false;</div><div class='del'>-	bool needs_cleanup_handling = false;</div><div class='del'>-	unsigned long     flags;</div><div class='del'>-	unsigned long     termination_completed = 1;</div><div class='del'>-	struct completion *io_request_completion;</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-		"%s: device = %p; request = %p\n",</div><div class='del'>-		__func__, idev, isci_request);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-</div><div class='del'>-	io_request_completion = isci_request-&gt;io_request_completion;</div><div class='del'>-</div><div class='del'>-	/* Note that we are not going to control</div><div class='del'>-	 * the target to abort the request.</div><div class='del'>-	 */</div><div class='del'>-	set_bit(IREQ_COMPLETE_IN_TARGET, &amp;isci_request-&gt;flags);</div><div class='del'>-</div><div class='del'>-	/* Make sure the request wasn't just sitting around signalling</div><div class='del'>-	 * device condition (if the request handle is NULL, then the</div><div class='del'>-	 * request completed but needed additional handling here).</div><div class='del'>-	 */</div><div class='del'>-	if (!test_bit(IREQ_TERMINATED, &amp;isci_request-&gt;flags)) {</div><div class='del'>-		was_terminated = true;</div><div class='del'>-		needs_cleanup_handling = true;</div><div class='del'>-		status = sci_controller_terminate_request(ihost,</div><div class='del'>-							   idev,</div><div class='del'>-							   isci_request);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The only time the request to terminate will</div><div class='del'>-	 * fail is when the io request is completed and</div><div class='del'>-	 * being aborted.</div><div class='del'>-	 */</div><div class='del'>-	if (status != SCI_SUCCESS) {</div><div class='del'>-		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			"%s: sci_controller_terminate_request"</div><div class='del'>-			" returned = 0x%x\n",</div><div class='del'>-			__func__, status);</div><div class='del'>-</div><div class='del'>-		isci_request-&gt;io_request_completion = NULL;</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-		if (was_terminated) {</div><div class='del'>-			dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-				"%s: before completion wait (%p/%p)\n",</div><div class='del'>-				__func__, isci_request, io_request_completion);</div><div class='del'>-</div><div class='del'>-			/* Wait here for the request to complete. */</div><div class='del'>-			termination_completed</div><div class='del'>-				= wait_for_completion_timeout(</div><div class='del'>-				   io_request_completion,</div><div class='del'>-				   msecs_to_jiffies(ISCI_TERMINATION_TIMEOUT_MSEC));</div><div class='del'>-</div><div class='del'>-			if (!termination_completed) {</div><div class='del'>-</div><div class='del'>-				/* The request to terminate has timed out.  */</div><div class='del'>-				spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-</div><div class='del'>-				/* Check for state changes. */</div><div class='del'>-				if (!test_bit(IREQ_TERMINATED,</div><div class='del'>-					      &amp;isci_request-&gt;flags)) {</div><div class='del'>-</div><div class='del'>-					/* The best we can do is to have the</div><div class='del'>-					 * request die a silent death if it</div><div class='del'>-					 * ever really completes.</div><div class='del'>-					 */</div><div class='del'>-					isci_request_mark_zombie(ihost,</div><div class='del'>-								 isci_request);</div><div class='del'>-					needs_cleanup_handling = true;</div><div class='del'>-				} else</div><div class='del'>-					termination_completed = 1;</div><div class='del'>-</div><div class='del'>-				spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock,</div><div class='del'>-						       flags);</div><div class='del'>-</div><div class='del'>-				if (!termination_completed) {</div><div class='del'>-</div><div class='del'>-					dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-						"%s: *** Timeout waiting for "</div><div class='del'>-						"termination(%p/%p)\n",</div><div class='del'>-						__func__, io_request_completion,</div><div class='del'>-						isci_request);</div><div class='del'>-</div><div class='del'>-					/* The request can no longer be referenced</div><div class='del'>-					 * safely since it may go away if the</div><div class='del'>-					 * termination every really does complete.</div><div class='del'>-					 */</div><div class='del'>-					isci_request = NULL;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-			if (termination_completed)</div><div class='del'>-				dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-					"%s: after completion wait (%p/%p)\n",</div><div class='del'>-					__func__, isci_request, io_request_completion);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (termination_completed) {</div><div class='del'>-</div><div class='del'>-			isci_request-&gt;io_request_completion = NULL;</div><div class='del'>-</div><div class='del'>-			/* Peek at the status of the request.  This will tell</div><div class='del'>-			 * us if there was special handling on the request such that it</div><div class='del'>-			 * needs to be detached and freed here.</div><div class='del'>-			 */</div><div class='del'>-			spin_lock_irqsave(&amp;isci_request-&gt;state_lock, flags);</div><div class='del'>-</div><div class='del'>-			needs_cleanup_handling</div><div class='del'>-				= isci_request_is_dealloc_managed(</div><div class='del'>-					isci_request-&gt;status);</div><div class='del'>-</div><div class='del'>-			spin_unlock_irqrestore(&amp;isci_request-&gt;state_lock, flags);</div><div class='del'>-</div><div class='del'>-		}</div><div class='del'>-		if (needs_cleanup_handling) {</div><div class='del'>-</div><div class='del'>-			dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-				"%s: cleanup isci_device=%p, request=%p\n",</div><div class='del'>-				__func__, idev, isci_request);</div><div class='del'>-</div><div class='del'>-			if (isci_request != NULL) {</div><div class='del'>-				spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-				isci_free_tag(ihost, isci_request-&gt;io_tag);</div><div class='del'>-				isci_request_change_state(isci_request, unallocated);</div><div class='del'>-				list_del_init(&amp;isci_request-&gt;dev_node);</div><div class='del'>-				spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * isci_terminate_pending_requests() - This function will change the all of the</div><div class='del'>- *    requests on the given device's state to "aborting", will terminate the</div><div class='del'>- *    requests, and wait for them to complete.  This function must only be</div><div class='del'>- *    called from a thread that can wait.  Note that the requests are all</div><div class='del'>- *    terminated and completed (back to the host, if started there).</div><div class='del'>- * @isci_host: This parameter specifies SCU.</div><div class='del'>- * @idev: This parameter specifies the target.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-void isci_terminate_pending_requests(struct isci_host *ihost,</div><div class='del'>-				     struct isci_remote_device *idev)</div><div class='del'>-{</div><div class='del'>-	struct completion request_completion;</div><div class='del'>-	enum isci_request_status old_state;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	LIST_HEAD(list);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-	list_splice_init(&amp;idev-&gt;reqs_in_process, &amp;list);</div><div class='del'>-</div><div class='del'>-	/* assumes that isci_terminate_request_core deletes from the list */</div><div class='del'>-	while (!list_empty(&amp;list)) {</div><div class='del'>-		struct isci_request *ireq = list_entry(list.next, typeof(*ireq), dev_node);</div><div class='del'>-</div><div class='del'>-		/* Change state to "terminating" if it is currently</div><div class='del'>-		 * "started".</div><div class='del'>-		 */</div><div class='del'>-		old_state = isci_request_change_started_to_newstate(ireq,</div><div class='del'>-								    &amp;request_completion,</div><div class='del'>-								    terminating);</div><div class='del'>-		switch (old_state) {</div><div class='del'>-		case started:</div><div class='del'>-		case completed:</div><div class='del'>-		case aborting:</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			/* termination in progress, or otherwise dispositioned.</div><div class='del'>-			 * We know the request was on 'list' so should be safe</div><div class='del'>-			 * to move it back to reqs_in_process</div><div class='del'>-			 */</div><div class='del'>-			list_move(&amp;ireq-&gt;dev_node, &amp;idev-&gt;reqs_in_process);</div><div class='del'>-			ireq = NULL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (!ireq)</div><div class='del'>-			continue;</div><div class='del'>-		spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-</div><div class='del'>-		init_completion(&amp;request_completion);</div><div class='del'>-</div><div class='del'>-		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			 "%s: idev=%p request=%p; task=%p old_state=%d\n",</div><div class='del'>-			 __func__, idev, ireq,</div><div class='del'>-			(!test_bit(IREQ_TMF, &amp;ireq-&gt;flags)</div><div class='del'>-				? isci_request_access_task(ireq)</div><div class='del'>-				: NULL),</div><div class='del'>-			old_state);</div><div class='del'>-</div><div class='del'>-		/* If the old_state is started:</div><div class='del'>-		 * This request was not already being aborted. If it had been,</div><div class='del'>-		 * then the aborting I/O (ie. the TMF request) would not be in</div><div class='del'>-		 * the aborting state, and thus would be terminated here.  Note</div><div class='del'>-		 * that since the TMF completion's call to the kernel function</div><div class='del'>-		 * "complete()" does not happen until the pending I/O request</div><div class='del'>-		 * terminate fully completes, we do not have to implement a</div><div class='del'>-		 * special wait here for already aborting requests - the</div><div class='del'>-		 * termination of the TMF request will force the request</div><div class='del'>-		 * to finish it's already started terminate.</div><div class='del'>-		 *</div><div class='del'>-		 * If old_state == completed:</div><div class='del'>-		 * This request completed from the SCU hardware perspective</div><div class='del'>-		 * and now just needs cleaning up in terms of freeing the</div><div class='del'>-		 * request and potentially calling up to libsas.</div><div class='del'>-		 *</div><div class='del'>-		 * If old_state == aborting:</div><div class='del'>-		 * This request has already gone through a TMF timeout, but may</div><div class='del'>-		 * not have been terminated; needs cleaning up at least.</div><div class='del'>-		 */</div><div class='del'>-		isci_terminate_request_core(ihost, idev, ireq);</div><div class='del'>-		spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * isci_task_send_lu_reset_sas() - This function is called by of the SAS Domain</div><div class='ctx'>  *    Template functions.</div><div class='ctx'>  * @lun: This parameter specifies the lun to be reset.</div><div class='hunk'>@@ -807,7 +399,7 @@ static int isci_task_send_lu_reset_sas(</div><div class='ctx'> 	 * value is "TMF_RESP_FUNC_COMPLETE", or the request timed-out (or</div><div class='ctx'> 	 * was otherwise unable to be executed ("TMF_RESP_FUNC_FAILED").</div><div class='ctx'> 	 */</div><div class='del'>-	isci_task_build_tmf(&amp;tmf, isci_tmf_ssp_lun_reset, NULL, NULL);</div><div class='add'>+	isci_task_build_tmf(&amp;tmf, isci_tmf_ssp_lun_reset);</div><div class='ctx'> </div><div class='ctx'> 	#define ISCI_LU_RESET_TIMEOUT_MS 2000 /* 2 second timeout. */</div><div class='ctx'> 	ret = isci_task_execute_tmf(isci_host, isci_device, &amp;tmf, ISCI_LU_RESET_TIMEOUT_MS);</div><div class='hunk'>@@ -826,42 +418,44 @@ static int isci_task_send_lu_reset_sas(</div><div class='ctx'> </div><div class='ctx'> int isci_task_lu_reset(struct domain_device *dev, u8 *lun)</div><div class='ctx'> {</div><div class='del'>-	struct isci_host *isci_host = dev_to_ihost(dev);</div><div class='del'>-	struct isci_remote_device *isci_device;</div><div class='add'>+	struct isci_host *ihost = dev_to_ihost(dev);</div><div class='add'>+	struct isci_remote_device *idev;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret = TMF_RESP_FUNC_COMPLETE;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;isci_host-&gt;scic_lock, flags);</div><div class='del'>-	isci_device = isci_lookup_device(dev);</div><div class='del'>-	spin_unlock_irqrestore(&amp;isci_host-&gt;scic_lock, flags);</div><div class='add'>+	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+	idev = isci_get_device(dev-&gt;lldd_dev);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;isci_host-&gt;pdev-&gt;dev,</div><div class='add'>+	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='ctx'> 		"%s: domain_device=%p, isci_host=%p; isci_device=%p\n",</div><div class='del'>-		 __func__, dev, isci_host, isci_device);</div><div class='add'>+		__func__, dev, ihost, idev);</div><div class='ctx'> </div><div class='del'>-	if (!isci_device) {</div><div class='del'>-		/* If the device is gone, stop the escalations. */</div><div class='del'>-		dev_dbg(&amp;isci_host-&gt;pdev-&gt;dev, "%s: No dev\n", __func__);</div><div class='add'>+	if (!idev) {</div><div class='add'>+		/* If the device is gone, escalate to I_T_Nexus_Reset. */</div><div class='add'>+		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev, "%s: No dev\n", __func__);</div><div class='ctx'> </div><div class='del'>-		ret = TMF_RESP_FUNC_COMPLETE;</div><div class='add'>+		ret = TMF_RESP_FUNC_FAILED;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Send the task management part of the reset. */</div><div class='del'>-	if (dev_is_sata(dev)) {</div><div class='del'>-		sas_ata_schedule_reset(dev);</div><div class='del'>-		ret = TMF_RESP_FUNC_COMPLETE;</div><div class='del'>-	} else</div><div class='del'>-		ret = isci_task_send_lu_reset_sas(isci_host, isci_device, lun);</div><div class='del'>-</div><div class='del'>-	/* If the LUN reset worked, all the I/O can now be terminated. */</div><div class='del'>-	if (ret == TMF_RESP_FUNC_COMPLETE)</div><div class='del'>-		/* Terminate all I/O now. */</div><div class='del'>-		isci_terminate_pending_requests(isci_host,</div><div class='del'>-						isci_device);</div><div class='del'>-</div><div class='add'>+	/* Suspend the RNC, kill all TCs */</div><div class='add'>+	if (isci_remote_device_suspend_terminate(ihost, idev, NULL)</div><div class='add'>+	    != SCI_SUCCESS) {</div><div class='add'>+		/* The suspend/terminate only fails if isci_get_device fails */</div><div class='add'>+		ret = TMF_RESP_FUNC_FAILED;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	/* All pending I/Os have been terminated and cleaned up. */</div><div class='add'>+	if (!test_bit(IDEV_GONE, &amp;idev-&gt;flags)) {</div><div class='add'>+		if (dev_is_sata(dev))</div><div class='add'>+			sas_ata_schedule_reset(dev);</div><div class='add'>+		else</div><div class='add'>+			/* Send the task management part of the reset. */</div><div class='add'>+			ret = isci_task_send_lu_reset_sas(ihost, idev, lun);</div><div class='add'>+	}</div><div class='ctx'>  out:</div><div class='del'>-	isci_put_device(isci_device);</div><div class='add'>+	isci_put_device(idev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -882,63 +476,6 @@ int isci_task_clear_nexus_ha(struct sas_ha_struct *ha)</div><div class='ctx'> /* Task Management Functions. Must be called from process context.	 */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * isci_abort_task_process_cb() - This is a helper function for the abort task</div><div class='del'>- *    TMF command.  It manages the request state with respect to the successful</div><div class='del'>- *    transmission / completion of the abort task request.</div><div class='del'>- * @cb_state: This parameter specifies when this function was called - after</div><div class='del'>- *    the TMF request has been started and after it has timed-out.</div><div class='del'>- * @tmf: This parameter specifies the TMF in progress.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static void isci_abort_task_process_cb(</div><div class='del'>-	enum isci_tmf_cb_state cb_state,</div><div class='del'>-	struct isci_tmf *tmf,</div><div class='del'>-	void *cb_data)</div><div class='del'>-{</div><div class='del'>-	struct isci_request *old_request;</div><div class='del'>-</div><div class='del'>-	old_request = (struct isci_request *)cb_data;</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;old_request-&gt;isci_host-&gt;pdev-&gt;dev,</div><div class='del'>-		"%s: tmf=%p, old_request=%p\n",</div><div class='del'>-		__func__, tmf, old_request);</div><div class='del'>-</div><div class='del'>-	switch (cb_state) {</div><div class='del'>-</div><div class='del'>-	case isci_tmf_started:</div><div class='del'>-		/* The TMF has been started.  Nothing to do here, since the</div><div class='del'>-		 * request state was already set to "aborted" by the abort</div><div class='del'>-		 * task function.</div><div class='del'>-		 */</div><div class='del'>-		if ((old_request-&gt;status != aborted)</div><div class='del'>-			&amp;&amp; (old_request-&gt;status != completed))</div><div class='del'>-			dev_dbg(&amp;old_request-&gt;isci_host-&gt;pdev-&gt;dev,</div><div class='del'>-				"%s: Bad request status (%d): tmf=%p, old_request=%p\n",</div><div class='del'>-				__func__, old_request-&gt;status, tmf, old_request);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case isci_tmf_timed_out:</div><div class='del'>-</div><div class='del'>-		/* Set the task's state to "aborting", since the abort task</div><div class='del'>-		 * function thread set it to "aborted" (above) in anticipation</div><div class='del'>-		 * of the task management request working correctly.  Since the</div><div class='del'>-		 * timeout has now fired, the TMF request failed.  We set the</div><div class='del'>-		 * state such that the request completion will indicate the</div><div class='del'>-		 * device is no longer present.</div><div class='del'>-		 */</div><div class='del'>-		isci_request_change_state(old_request, aborting);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		dev_dbg(&amp;old_request-&gt;isci_host-&gt;pdev-&gt;dev,</div><div class='del'>-			"%s: Bad cb_state (%d): tmf=%p, old_request=%p\n",</div><div class='del'>-			__func__, cb_state, tmf, old_request);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * isci_task_abort_task() - This function is one of the SAS Domain Template</div><div class='ctx'>  *    functions. This function is called by libsas to abort a specified task.</div><div class='ctx'>  * @task: This parameter specifies the SAS task to abort.</div><div class='hunk'>@@ -947,22 +484,20 @@ static void isci_abort_task_process_cb(</div><div class='ctx'>  */</div><div class='ctx'> int isci_task_abort_task(struct sas_task *task)</div><div class='ctx'> {</div><div class='del'>-	struct isci_host *isci_host = dev_to_ihost(task-&gt;dev);</div><div class='add'>+	struct isci_host *ihost = dev_to_ihost(task-&gt;dev);</div><div class='ctx'> 	DECLARE_COMPLETION_ONSTACK(aborted_io_completion);</div><div class='ctx'> 	struct isci_request       *old_request = NULL;</div><div class='del'>-	enum isci_request_status  old_state;</div><div class='del'>-	struct isci_remote_device *isci_device = NULL;</div><div class='add'>+	struct isci_remote_device *idev = NULL;</div><div class='ctx'> 	struct isci_tmf           tmf;</div><div class='ctx'> 	int                       ret = TMF_RESP_FUNC_FAILED;</div><div class='ctx'> 	unsigned long             flags;</div><div class='del'>-	int                       perform_termination = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Get the isci_request reference from the task.  Note that</div><div class='ctx'> 	 * this check does not depend on the pending request list</div><div class='ctx'> 	 * in the device, because tasks driving resets may land here</div><div class='ctx'> 	 * after completion in the core.</div><div class='ctx'> 	 */</div><div class='del'>-	spin_lock_irqsave(&amp;isci_host-&gt;scic_lock, flags);</div><div class='add'>+	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> 	spin_lock(&amp;task-&gt;task_state_lock);</div><div class='ctx'> </div><div class='ctx'> 	old_request = task-&gt;lldd_task;</div><div class='hunk'>@@ -971,20 +506,29 @@ int isci_task_abort_task(struct sas_task *task)</div><div class='ctx'> 	if (!(task-&gt;task_state_flags &amp; SAS_TASK_STATE_DONE) &amp;&amp;</div><div class='ctx'> 	    (task-&gt;task_state_flags &amp; SAS_TASK_AT_INITIATOR) &amp;&amp;</div><div class='ctx'> 	    old_request)</div><div class='del'>-		isci_device = isci_lookup_device(task-&gt;dev);</div><div class='add'>+		idev = isci_get_device(task-&gt;dev-&gt;lldd_dev);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;task-&gt;task_state_lock);</div><div class='del'>-	spin_unlock_irqrestore(&amp;isci_host-&gt;scic_lock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;isci_host-&gt;pdev-&gt;dev,</div><div class='del'>-		"%s: dev = %p, task = %p, old_request == %p\n",</div><div class='del'>-		__func__, isci_device, task, old_request);</div><div class='add'>+	dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+		 "%s: dev = %p (%s%s), task = %p, old_request == %p\n",</div><div class='add'>+		 __func__, idev,</div><div class='add'>+		 (dev_is_sata(task-&gt;dev) ? "STP/SATA"</div><div class='add'>+					 : ((dev_is_expander(task-&gt;dev))</div><div class='add'>+						? "SMP"</div><div class='add'>+						: "SSP")),</div><div class='add'>+		 ((idev) ? ((test_bit(IDEV_GONE, &amp;idev-&gt;flags))</div><div class='add'>+			   ? " IDEV_GONE"</div><div class='add'>+			   : "")</div><div class='add'>+			 : " &lt;NULL&gt;"),</div><div class='add'>+		 task, old_request);</div><div class='ctx'> </div><div class='ctx'> 	/* Device reset conditions signalled in task_state_flags are the</div><div class='ctx'> 	 * responsbility of libsas to observe at the start of the error</div><div class='ctx'> 	 * handler thread.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!isci_device || !old_request) {</div><div class='add'>+	if (!idev || !old_request) {</div><div class='ctx'> 		/* The request has already completed and there</div><div class='ctx'> 		* is nothing to do here other than to set the task</div><div class='ctx'> 		* done bit, and indicate that the task abort function</div><div class='hunk'>@@ -998,108 +542,72 @@ int isci_task_abort_task(struct sas_task *task)</div><div class='ctx'> </div><div class='ctx'> 		ret = TMF_RESP_FUNC_COMPLETE;</div><div class='ctx'> </div><div class='del'>-		dev_dbg(&amp;isci_host-&gt;pdev-&gt;dev,</div><div class='del'>-			"%s: abort task not needed for %p\n",</div><div class='del'>-			__func__, task);</div><div class='add'>+		dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+			 "%s: abort task not needed for %p\n",</div><div class='add'>+			 __func__, task);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;isci_host-&gt;scic_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* Check the request status and change to "aborted" if currently</div><div class='del'>-	 * "starting"; if true then set the I/O kernel completion</div><div class='del'>-	 * struct that will be triggered when the request completes.</div><div class='del'>-	 */</div><div class='del'>-	old_state = isci_task_validate_request_to_abort(</div><div class='del'>-				old_request, isci_host, isci_device,</div><div class='del'>-				&amp;aborted_io_completion);</div><div class='del'>-	if ((old_state != started) &amp;&amp;</div><div class='del'>-	    (old_state != completed) &amp;&amp;</div><div class='del'>-	    (old_state != aborting)) {</div><div class='del'>-</div><div class='del'>-		spin_unlock_irqrestore(&amp;isci_host-&gt;scic_lock, flags);</div><div class='del'>-</div><div class='del'>-		/* The request was already being handled by someone else (because</div><div class='del'>-		* they got to set the state away from started).</div><div class='del'>-		*/</div><div class='del'>-		dev_dbg(&amp;isci_host-&gt;pdev-&gt;dev,</div><div class='del'>-			"%s:  device = %p; old_request %p already being aborted\n",</div><div class='del'>-			__func__,</div><div class='del'>-			isci_device, old_request);</div><div class='del'>-		ret = TMF_RESP_FUNC_COMPLETE;</div><div class='add'>+	/* Suspend the RNC, kill the TC */</div><div class='add'>+	if (isci_remote_device_suspend_terminate(ihost, idev, old_request)</div><div class='add'>+	    != SCI_SUCCESS) {</div><div class='add'>+		dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+			 "%s: isci_remote_device_reset_terminate(dev=%p, "</div><div class='add'>+				 "req=%p, task=%p) failed\n",</div><div class='add'>+			 __func__, idev, old_request, task);</div><div class='add'>+		ret = TMF_RESP_FUNC_FAILED;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='add'>+	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='add'>+</div><div class='ctx'> 	if (task-&gt;task_proto == SAS_PROTOCOL_SMP ||</div><div class='ctx'> 	    sas_protocol_ata(task-&gt;task_proto) ||</div><div class='del'>-	    test_bit(IREQ_COMPLETE_IN_TARGET, &amp;old_request-&gt;flags)) {</div><div class='add'>+	    test_bit(IREQ_COMPLETE_IN_TARGET, &amp;old_request-&gt;flags) ||</div><div class='add'>+	    test_bit(IDEV_GONE, &amp;idev-&gt;flags)) {</div><div class='ctx'> </div><div class='del'>-		spin_unlock_irqrestore(&amp;isci_host-&gt;scic_lock, flags);</div><div class='add'>+		spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> </div><div class='del'>-		dev_dbg(&amp;isci_host-&gt;pdev-&gt;dev,</div><div class='del'>-			"%s: %s request"</div><div class='del'>-			" or complete_in_target (%d), thus no TMF\n",</div><div class='del'>-			__func__,</div><div class='del'>-			((task-&gt;task_proto == SAS_PROTOCOL_SMP)</div><div class='del'>-				? "SMP"</div><div class='del'>-				: (sas_protocol_ata(task-&gt;task_proto)</div><div class='del'>-					? "SATA/STP"</div><div class='del'>-					: "&lt;other&gt;")</div><div class='del'>-			 ),</div><div class='del'>-			test_bit(IREQ_COMPLETE_IN_TARGET, &amp;old_request-&gt;flags));</div><div class='del'>-</div><div class='del'>-		if (test_bit(IREQ_COMPLETE_IN_TARGET, &amp;old_request-&gt;flags)) {</div><div class='del'>-			spin_lock_irqsave(&amp;task-&gt;task_state_lock, flags);</div><div class='del'>-			task-&gt;task_state_flags |= SAS_TASK_STATE_DONE;</div><div class='del'>-			task-&gt;task_state_flags &amp;= ~(SAS_TASK_AT_INITIATOR |</div><div class='del'>-						    SAS_TASK_STATE_PENDING);</div><div class='del'>-			spin_unlock_irqrestore(&amp;task-&gt;task_state_lock, flags);</div><div class='del'>-			ret = TMF_RESP_FUNC_COMPLETE;</div><div class='del'>-		} else {</div><div class='del'>-			spin_lock_irqsave(&amp;task-&gt;task_state_lock, flags);</div><div class='del'>-			task-&gt;task_state_flags &amp;= ~(SAS_TASK_AT_INITIATOR |</div><div class='del'>-						    SAS_TASK_STATE_PENDING);</div><div class='del'>-			spin_unlock_irqrestore(&amp;task-&gt;task_state_lock, flags);</div><div class='del'>-		}</div><div class='add'>+		/* No task to send, so explicitly resume the device here */</div><div class='add'>+		isci_remote_device_resume_from_abort(ihost, idev);</div><div class='ctx'> </div><div class='del'>-		/* STP and SMP devices are not sent a TMF, but the</div><div class='del'>-		 * outstanding I/O request is terminated below.  This is</div><div class='del'>-		 * because SATA/STP and SMP discovery path timeouts directly</div><div class='del'>-		 * call the abort task interface for cleanup.</div><div class='del'>-		 */</div><div class='del'>-		perform_termination = 1;</div><div class='add'>+		dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+			 "%s: %s request"</div><div class='add'>+				 " or complete_in_target (%d), "</div><div class='add'>+				 "or IDEV_GONE (%d), thus no TMF\n",</div><div class='add'>+			 __func__,</div><div class='add'>+			 ((task-&gt;task_proto == SAS_PROTOCOL_SMP)</div><div class='add'>+			  ? "SMP"</div><div class='add'>+			  : (sas_protocol_ata(task-&gt;task_proto)</div><div class='add'>+				? "SATA/STP"</div><div class='add'>+				: "&lt;other&gt;")</div><div class='add'>+			  ),</div><div class='add'>+			 test_bit(IREQ_COMPLETE_IN_TARGET,</div><div class='add'>+				  &amp;old_request-&gt;flags),</div><div class='add'>+			 test_bit(IDEV_GONE, &amp;idev-&gt;flags));</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;task-&gt;task_state_lock, flags);</div><div class='add'>+		task-&gt;task_state_flags &amp;= ~(SAS_TASK_AT_INITIATOR |</div><div class='add'>+					    SAS_TASK_STATE_PENDING);</div><div class='add'>+		task-&gt;task_state_flags |= SAS_TASK_STATE_DONE;</div><div class='add'>+		spin_unlock_irqrestore(&amp;task-&gt;task_state_lock, flags);</div><div class='ctx'> </div><div class='add'>+		ret = TMF_RESP_FUNC_COMPLETE;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Fill in the tmf stucture */</div><div class='ctx'> 		isci_task_build_abort_task_tmf(&amp;tmf, isci_tmf_ssp_task_abort,</div><div class='del'>-					       isci_abort_task_process_cb,</div><div class='ctx'> 					       old_request);</div><div class='ctx'> </div><div class='del'>-		spin_unlock_irqrestore(&amp;isci_host-&gt;scic_lock, flags);</div><div class='add'>+		spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> </div><div class='add'>+		/* Send the task management request. */</div><div class='ctx'> 		#define ISCI_ABORT_TASK_TIMEOUT_MS 500 /* 1/2 second timeout */</div><div class='del'>-		ret = isci_task_execute_tmf(isci_host, isci_device, &amp;tmf,</div><div class='add'>+		ret = isci_task_execute_tmf(ihost, idev, &amp;tmf,</div><div class='ctx'> 					    ISCI_ABORT_TASK_TIMEOUT_MS);</div><div class='del'>-</div><div class='del'>-		if (ret == TMF_RESP_FUNC_COMPLETE)</div><div class='del'>-			perform_termination = 1;</div><div class='del'>-		else</div><div class='del'>-			dev_dbg(&amp;isci_host-&gt;pdev-&gt;dev,</div><div class='del'>-				"%s: isci_task_send_tmf failed\n", __func__);</div><div class='ctx'> 	}</div><div class='del'>-	if (perform_termination) {</div><div class='del'>-		set_bit(IREQ_COMPLETE_IN_TARGET, &amp;old_request-&gt;flags);</div><div class='del'>-</div><div class='del'>-		/* Clean up the request on our side, and wait for the aborted</div><div class='del'>-		 * I/O to complete.</div><div class='del'>-		 */</div><div class='del'>-		isci_terminate_request_core(isci_host, isci_device,</div><div class='del'>-					    old_request);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Make sure we do not leave a reference to aborted_io_completion */</div><div class='del'>-	old_request-&gt;io_request_completion = NULL;</div><div class='del'>- out:</div><div class='del'>-	isci_put_device(isci_device);</div><div class='add'>+out:</div><div class='add'>+	dev_warn(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='add'>+		 "%s: Done; dev = %p, task = %p , old_request == %p\n",</div><div class='add'>+		 __func__, idev, task, old_request);</div><div class='add'>+	isci_put_device(idev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1195,14 +703,11 @@ isci_task_request_complete(struct isci_host *ihost,</div><div class='ctx'> {</div><div class='ctx'> 	struct isci_tmf *tmf = isci_request_access_tmf(ireq);</div><div class='ctx'> 	struct completion *tmf_complete = NULL;</div><div class='del'>-	struct completion *request_complete = ireq-&gt;io_request_completion;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='ctx'> 		"%s: request = %p, status=%d\n",</div><div class='ctx'> 		__func__, ireq, completion_status);</div><div class='ctx'> </div><div class='del'>-	isci_request_change_state(ireq, completed);</div><div class='del'>-</div><div class='ctx'> 	set_bit(IREQ_COMPLETE_IN_TARGET, &amp;ireq-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	if (tmf) {</div><div class='hunk'>@@ -1226,20 +731,11 @@ isci_task_request_complete(struct isci_host *ihost,</div><div class='ctx'> 	 */</div><div class='ctx'> 	set_bit(IREQ_TERMINATED, &amp;ireq-&gt;flags);</div><div class='ctx'> </div><div class='del'>-	/* As soon as something is in the terminate path, deallocation is</div><div class='del'>-	 * managed there.  Note that the final non-managed state of a task</div><div class='del'>-	 * request is "completed".</div><div class='del'>-	 */</div><div class='del'>-	if ((ireq-&gt;status == completed) ||</div><div class='del'>-	    !isci_request_is_dealloc_managed(ireq-&gt;status)) {</div><div class='del'>-		isci_request_change_state(ireq, unallocated);</div><div class='del'>-		isci_free_tag(ihost, ireq-&gt;io_tag);</div><div class='del'>-		list_del_init(&amp;ireq-&gt;dev_node);</div><div class='del'>-	}</div><div class='add'>+	if (test_and_clear_bit(IREQ_ABORT_PATH_ACTIVE, &amp;ireq-&gt;flags))</div><div class='add'>+		wake_up_all(&amp;ihost-&gt;eventq);</div><div class='ctx'> </div><div class='del'>-	/* "request_complete" is set if the task was being terminated. */</div><div class='del'>-	if (request_complete)</div><div class='del'>-		complete(request_complete);</div><div class='add'>+	if (!test_bit(IREQ_NO_AUTO_FREE_TAG, &amp;ireq-&gt;flags))</div><div class='add'>+		isci_free_tag(ihost, ireq-&gt;io_tag);</div><div class='ctx'> </div><div class='ctx'> 	/* The task management part completes last. */</div><div class='ctx'> 	if (tmf_complete)</div><div class='hunk'>@@ -1250,48 +746,38 @@ static int isci_reset_device(struct isci_host *ihost,</div><div class='ctx'> 			     struct domain_device *dev,</div><div class='ctx'> 			     struct isci_remote_device *idev)</div><div class='ctx'> {</div><div class='del'>-	int rc;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	enum sci_status status;</div><div class='add'>+	int rc = TMF_RESP_FUNC_COMPLETE, reset_stat = -1;</div><div class='ctx'> 	struct sas_phy *phy = sas_get_local_phy(dev);</div><div class='ctx'> 	struct isci_port *iport = dev-&gt;port-&gt;lldd_port;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev, "%s: idev %p\n", __func__, idev);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-	status = sci_remote_device_reset(idev);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-</div><div class='del'>-	if (status != SCI_SUCCESS) {</div><div class='del'>-		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			 "%s: sci_remote_device_reset(%p) returned %d!\n",</div><div class='del'>-			 __func__, idev, status);</div><div class='add'>+	/* Suspend the RNC, terminate all outstanding TCs. */</div><div class='add'>+	if (isci_remote_device_suspend_terminate(ihost, idev, NULL)</div><div class='add'>+	    != SCI_SUCCESS) {</div><div class='ctx'> 		rc = TMF_RESP_FUNC_FAILED;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (scsi_is_sas_phy_local(phy)) {</div><div class='del'>-		struct isci_phy *iphy = &amp;ihost-&gt;phys[phy-&gt;number];</div><div class='del'>-</div><div class='del'>-		rc = isci_port_perform_hard_reset(ihost, iport, iphy);</div><div class='del'>-	} else</div><div class='del'>-		rc = sas_phy_reset(phy, !dev_is_sata(dev));</div><div class='del'>-</div><div class='del'>-	/* Terminate in-progress I/O now. */</div><div class='del'>-	isci_remote_device_nuke_requests(ihost, idev);</div><div class='del'>-</div><div class='del'>-	/* Since all pending TCs have been cleaned, resume the RNC. */</div><div class='del'>-	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-	status = sci_remote_device_reset_complete(idev);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-</div><div class='del'>-	if (status != SCI_SUCCESS) {</div><div class='del'>-		dev_dbg(&amp;ihost-&gt;pdev-&gt;dev,</div><div class='del'>-			 "%s: sci_remote_device_reset_complete(%p) "</div><div class='del'>-			 "returned %d!\n", __func__, idev, status);</div><div class='add'>+	/* Note that since the termination for outstanding requests succeeded,</div><div class='add'>+	 * this function will return success.  This is because the resets will</div><div class='add'>+	 * only fail if the device has been removed (ie. hotplug), and the</div><div class='add'>+	 * primary duty of this function is to cleanup tasks, so that is the</div><div class='add'>+	 * relevant status.</div><div class='add'>+	 */</div><div class='add'>+	if (!test_bit(IDEV_GONE, &amp;idev-&gt;flags)) {</div><div class='add'>+		if (scsi_is_sas_phy_local(phy)) {</div><div class='add'>+			struct isci_phy *iphy = &amp;ihost-&gt;phys[phy-&gt;number];</div><div class='add'>+</div><div class='add'>+			reset_stat = isci_port_perform_hard_reset(ihost, iport,</div><div class='add'>+								  iphy);</div><div class='add'>+		} else</div><div class='add'>+			reset_stat = sas_phy_reset(phy, !dev_is_sata(dev));</div><div class='ctx'> 	}</div><div class='add'>+	/* Explicitly resume the RNC here, since there was no task sent. */</div><div class='add'>+	isci_remote_device_resume_from_abort(ihost, idev);</div><div class='ctx'> </div><div class='del'>-	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev, "%s: idev %p complete.\n", __func__, idev);</div><div class='add'>+	dev_dbg(&amp;ihost-&gt;pdev-&gt;dev, "%s: idev %p complete, reset_stat=%d.\n",</div><div class='add'>+		__func__, idev, reset_stat);</div><div class='ctx'>  out:</div><div class='ctx'> 	sas_put_local_phy(phy);</div><div class='ctx'> 	return rc;</div><div class='hunk'>@@ -1305,7 +791,7 @@ int isci_task_I_T_nexus_reset(struct domain_device *dev)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ihost-&gt;scic_lock, flags);</div><div class='del'>-	idev = isci_lookup_device(dev);</div><div class='add'>+	idev = isci_get_device(dev-&gt;lldd_dev);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ihost-&gt;scic_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (!idev) {</div><div class='head'>diff --git a/drivers/scsi/isci/task.h b/drivers/scsi/isci/task.h<br/>index 7b6d0e32fd9b..9c06cbad1d26 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/task.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/task.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/task.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/task.h</a></div><div class='hunk'>@@ -63,19 +63,6 @@</div><div class='ctx'> struct isci_request;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * enum isci_tmf_cb_state - This enum defines the possible states in which the</div><div class='del'>- *    TMF callback function is invoked during the TMF execution process.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-enum isci_tmf_cb_state {</div><div class='del'>-</div><div class='del'>-	isci_tmf_init_state = 0,</div><div class='del'>-	isci_tmf_started,</div><div class='del'>-	isci_tmf_timed_out</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * enum isci_tmf_function_codes - This enum defines the possible preparations</div><div class='ctx'>  *    of task management requests.</div><div class='ctx'>  *</div><div class='hunk'>@@ -87,6 +74,7 @@ enum isci_tmf_function_codes {</div><div class='ctx'> 	isci_tmf_ssp_task_abort = TMF_ABORT_TASK,</div><div class='ctx'> 	isci_tmf_ssp_lun_reset  = TMF_LU_RESET,</div><div class='ctx'> };</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct isci_tmf - This class represents the task management object which</div><div class='ctx'>  *    acts as an interface to libsas for processing task management requests</div><div class='hunk'>@@ -106,15 +94,6 @@ struct isci_tmf {</div><div class='ctx'> 	u16 io_tag;</div><div class='ctx'> 	enum isci_tmf_function_codes tmf_code;</div><div class='ctx'> 	int status;</div><div class='del'>-</div><div class='del'>-	/* The optional callback function allows the user process to</div><div class='del'>-	 * track the TMF transmit / timeout conditions.</div><div class='del'>-	 */</div><div class='del'>-	void (*cb_state_func)(</div><div class='del'>-		enum isci_tmf_cb_state,</div><div class='del'>-		struct isci_tmf *, void *);</div><div class='del'>-	void *cb_data;</div><div class='del'>-</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline void isci_print_tmf(struct isci_host *ihost, struct isci_tmf *tmf)</div><div class='hunk'>@@ -208,113 +187,4 @@ int isci_queuecommand(</div><div class='ctx'> 	struct scsi_cmnd *scsi_cmd,</div><div class='ctx'> 	void (*donefunc)(struct scsi_cmnd *));</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * enum isci_completion_selection - This enum defines the possible actions to</div><div class='del'>- *    take with respect to a given request's notification back to libsas.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-enum isci_completion_selection {</div><div class='del'>-</div><div class='del'>-	isci_perform_normal_io_completion,      /* Normal notify (task_done) */</div><div class='del'>-	isci_perform_aborted_io_completion,     /* No notification.   */</div><div class='del'>-	isci_perform_error_io_completion        /* Use sas_task_abort */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * isci_task_set_completion_status() - This function sets the completion status</div><div class='del'>- *    for the request.</div><div class='del'>- * @task: This parameter is the completed request.</div><div class='del'>- * @response: This parameter is the response code for the completed task.</div><div class='del'>- * @status: This parameter is the status code for the completed task.</div><div class='del'>- *</div><div class='del'>-* @return The new notification mode for the request.</div><div class='del'>-*/</div><div class='del'>-static inline enum isci_completion_selection</div><div class='del'>-isci_task_set_completion_status(</div><div class='del'>-	struct sas_task *task,</div><div class='del'>-	enum service_response response,</div><div class='del'>-	enum exec_status status,</div><div class='del'>-	enum isci_completion_selection task_notification_selection)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;task-&gt;task_state_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* If a device reset is being indicated, make sure the I/O</div><div class='del'>-	* is in the error path.</div><div class='del'>-	*/</div><div class='del'>-	if (task-&gt;task_state_flags &amp; SAS_TASK_NEED_DEV_RESET) {</div><div class='del'>-		/* Fail the I/O to make sure it goes into the error path. */</div><div class='del'>-		response = SAS_TASK_UNDELIVERED;</div><div class='del'>-		status = SAM_STAT_TASK_ABORTED;</div><div class='del'>-</div><div class='del'>-		task_notification_selection = isci_perform_error_io_completion;</div><div class='del'>-	}</div><div class='del'>-	task-&gt;task_status.resp = response;</div><div class='del'>-	task-&gt;task_status.stat = status;</div><div class='del'>-</div><div class='del'>-	switch (task-&gt;task_proto) {</div><div class='del'>-</div><div class='del'>-	case SAS_PROTOCOL_SATA:</div><div class='del'>-	case SAS_PROTOCOL_STP:</div><div class='del'>-	case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:</div><div class='del'>-</div><div class='del'>-		if (task_notification_selection</div><div class='del'>-		    == isci_perform_error_io_completion) {</div><div class='del'>-			/* SATA/STP I/O has it's own means of scheduling device</div><div class='del'>-			* error handling on the normal path.</div><div class='del'>-			*/</div><div class='del'>-			task_notification_selection</div><div class='del'>-				= isci_perform_normal_io_completion;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (task_notification_selection) {</div><div class='del'>-</div><div class='del'>-	case isci_perform_error_io_completion:</div><div class='del'>-</div><div class='del'>-		if (task-&gt;task_proto == SAS_PROTOCOL_SMP) {</div><div class='del'>-			/* There is no error escalation in the SMP case.</div><div class='del'>-			 * Convert to a normal completion to avoid the</div><div class='del'>-			 * timeout in the discovery path and to let the</div><div class='del'>-			 * next action take place quickly.</div><div class='del'>-			 */</div><div class='del'>-			task_notification_selection</div><div class='del'>-				= isci_perform_normal_io_completion;</div><div class='del'>-</div><div class='del'>-			/* Fall through to the normal case... */</div><div class='del'>-		} else {</div><div class='del'>-			/* Use sas_task_abort */</div><div class='del'>-			/* Leave SAS_TASK_STATE_DONE clear</div><div class='del'>-			 * Leave SAS_TASK_AT_INITIATOR set.</div><div class='del'>-			 */</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	case isci_perform_aborted_io_completion:</div><div class='del'>-		/* This path can occur with task-managed requests as well as</div><div class='del'>-		 * requests terminated because of LUN or device resets.</div><div class='del'>-		 */</div><div class='del'>-		/* Fall through to the normal case... */</div><div class='del'>-	case isci_perform_normal_io_completion:</div><div class='del'>-		/* Normal notification (task_done) */</div><div class='del'>-		task-&gt;task_state_flags |= SAS_TASK_STATE_DONE;</div><div class='del'>-		task-&gt;task_state_flags &amp;= ~(SAS_TASK_AT_INITIATOR |</div><div class='del'>-					    SAS_TASK_STATE_PENDING);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		WARN_ONCE(1, "unknown task_notification_selection: %d\n",</div><div class='del'>-			 task_notification_selection);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;task-&gt;task_state_lock, flags);</div><div class='del'>-</div><div class='del'>-	return task_notification_selection;</div><div class='del'>-</div><div class='del'>-}</div><div class='ctx'> #endif /* !defined(_SCI_TASK_H_) */</div><div class='head'>diff --git a/drivers/scsi/isci/unsolicited_frame_control.c b/drivers/scsi/isci/unsolicited_frame_control.c<br/>index 16f88ab939c8..04a6d0d59a22 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/unsolicited_frame_control.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/unsolicited_frame_control.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/unsolicited_frame_control.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/unsolicited_frame_control.c</a></div><div class='hunk'>@@ -57,31 +57,19 @@</div><div class='ctx'> #include "unsolicited_frame_control.h"</div><div class='ctx'> #include "registers.h"</div><div class='ctx'> </div><div class='del'>-int sci_unsolicited_frame_control_construct(struct isci_host *ihost)</div><div class='add'>+void sci_unsolicited_frame_control_construct(struct isci_host *ihost)</div><div class='ctx'> {</div><div class='ctx'> 	struct sci_unsolicited_frame_control *uf_control = &amp;ihost-&gt;uf_control;</div><div class='ctx'> 	struct sci_unsolicited_frame *uf;</div><div class='del'>-	u32 buf_len, header_len, i;</div><div class='del'>-	dma_addr_t dma;</div><div class='del'>-	size_t size;</div><div class='del'>-	void *virt;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Prepare all of the memory sizes for the UF headers, UF address</div><div class='del'>-	 * table, and UF buffers themselves.</div><div class='del'>-	 */</div><div class='del'>-	buf_len = SCU_MAX_UNSOLICITED_FRAMES * SCU_UNSOLICITED_FRAME_BUFFER_SIZE;</div><div class='del'>-	header_len = SCU_MAX_UNSOLICITED_FRAMES * sizeof(struct scu_unsolicited_frame_header);</div><div class='del'>-	size = buf_len + header_len + SCU_MAX_UNSOLICITED_FRAMES * sizeof(uf_control-&gt;address_table.array[0]);</div><div class='add'>+	dma_addr_t dma = ihost-&gt;ufi_dma;</div><div class='add'>+	void *virt = ihost-&gt;ufi_buf;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The Unsolicited Frame buffers are set at the start of the UF</div><div class='ctx'> 	 * memory descriptor entry. The headers and address table will be</div><div class='ctx'> 	 * placed after the buffers.</div><div class='ctx'> 	 */</div><div class='del'>-	virt = dmam_alloc_coherent(&amp;ihost-&gt;pdev-&gt;dev, size, &amp;dma, GFP_KERNEL);</div><div class='del'>-	if (!virt)</div><div class='del'>-		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Program the location of the UF header table into the SCU.</div><div class='hunk'>@@ -93,8 +81,8 @@ int sci_unsolicited_frame_control_construct(struct isci_host *ihost)</div><div class='ctx'> 	 *   headers, since we program the UF address table pointers to</div><div class='ctx'> 	 *   NULL.</div><div class='ctx'> 	 */</div><div class='del'>-	uf_control-&gt;headers.physical_address = dma + buf_len;</div><div class='del'>-	uf_control-&gt;headers.array = virt + buf_len;</div><div class='add'>+	uf_control-&gt;headers.physical_address = dma + SCI_UFI_BUF_SIZE;</div><div class='add'>+	uf_control-&gt;headers.array = virt + SCI_UFI_BUF_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Program the location of the UF address table into the SCU.</div><div class='hunk'>@@ -103,8 +91,8 @@ int sci_unsolicited_frame_control_construct(struct isci_host *ihost)</div><div class='ctx'> 	 *   byte boundary already due to above programming headers being on a</div><div class='ctx'> 	 *   64-bit boundary and headers are on a 64-bytes in size.</div><div class='ctx'> 	 */</div><div class='del'>-	uf_control-&gt;address_table.physical_address = dma + buf_len + header_len;</div><div class='del'>-	uf_control-&gt;address_table.array = virt + buf_len + header_len;</div><div class='add'>+	uf_control-&gt;address_table.physical_address = dma + SCI_UFI_BUF_SIZE + SCI_UFI_HDR_SIZE;</div><div class='add'>+	uf_control-&gt;address_table.array = virt + SCI_UFI_BUF_SIZE + SCI_UFI_HDR_SIZE;</div><div class='ctx'> 	uf_control-&gt;get = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -135,8 +123,6 @@ int sci_unsolicited_frame_control_construct(struct isci_host *ihost)</div><div class='ctx'> 		virt += SCU_UNSOLICITED_FRAME_BUFFER_SIZE;</div><div class='ctx'> 		dma += SCU_UNSOLICITED_FRAME_BUFFER_SIZE;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> enum sci_status sci_unsolicited_frame_control_get_header(struct sci_unsolicited_frame_control *uf_control,</div><div class='head'>diff --git a/drivers/scsi/isci/unsolicited_frame_control.h b/drivers/scsi/isci/unsolicited_frame_control.h<br/>index 75d896686f5a..1bc551ec611f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/isci/unsolicited_frame_control.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/isci/unsolicited_frame_control.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/isci/unsolicited_frame_control.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/isci/unsolicited_frame_control.h</a></div><div class='hunk'>@@ -257,9 +257,13 @@ struct sci_unsolicited_frame_control {</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define SCI_UFI_BUF_SIZE (SCU_MAX_UNSOLICITED_FRAMES * SCU_UNSOLICITED_FRAME_BUFFER_SIZE)</div><div class='add'>+#define SCI_UFI_HDR_SIZE (SCU_MAX_UNSOLICITED_FRAMES * sizeof(struct scu_unsolicited_frame_header))</div><div class='add'>+#define SCI_UFI_TOTAL_SIZE (SCI_UFI_BUF_SIZE + SCI_UFI_HDR_SIZE + SCU_MAX_UNSOLICITED_FRAMES * sizeof(u64))</div><div class='add'>+</div><div class='ctx'> struct isci_host;</div><div class='ctx'> </div><div class='del'>-int sci_unsolicited_frame_control_construct(struct isci_host *ihost);</div><div class='add'>+void sci_unsolicited_frame_control_construct(struct isci_host *ihost);</div><div class='ctx'> </div><div class='ctx'> enum sci_status sci_unsolicited_frame_control_get_header(</div><div class='ctx'> 	struct sci_unsolicited_frame_control *uf_control,</div><div class='head'>diff --git a/drivers/scsi/iscsi_tcp.c b/drivers/scsi/iscsi_tcp.c<br/>index 453a740fa68e..922086105b4b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/iscsi_tcp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/iscsi_tcp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/iscsi_tcp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/iscsi_tcp.c</a></div><div class='hunk'>@@ -662,7 +662,7 @@ iscsi_sw_tcp_conn_bind(struct iscsi_cls_session *cls_session,</div><div class='ctx'> </div><div class='ctx'> 	/* setup Socket parameters */</div><div class='ctx'> 	sk = sock-&gt;sk;</div><div class='del'>-	sk-&gt;sk_reuse = 1;</div><div class='add'>+	sk-&gt;sk_reuse = SK_CAN_REUSE;</div><div class='ctx'> 	sk-&gt;sk_sndtimeo = 15 * HZ; /* FIXME: make it configurable */</div><div class='ctx'> 	sk-&gt;sk_allocation = GFP_ATOMIC;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/libfc/fc_lport.c b/drivers/scsi/libfc/fc_lport.c<br/>index ef9560dff295..c1402fb499ab 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/libfc/fc_lport.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/libfc/fc_lport.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/libfc/fc_lport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libfc/fc_lport.c</a></div><div class='hunk'>@@ -648,6 +648,7 @@ int fc_lport_destroy(struct fc_lport *lport)</div><div class='ctx'> 	lport-&gt;tt.fcp_abort_io(lport);</div><div class='ctx'> 	lport-&gt;tt.disc_stop_final(lport);</div><div class='ctx'> 	lport-&gt;tt.exch_mgr_reset(lport, 0, 0);</div><div class='add'>+	cancel_delayed_work_sync(&amp;lport-&gt;retry_work);</div><div class='ctx'> 	fc_fc4_del_lport(lport);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1564,7 +1565,6 @@ static void fc_lport_timeout(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	switch (lport-&gt;state) {</div><div class='ctx'> 	case LPORT_ST_DISABLED:</div><div class='del'>-		WARN_ON(1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LPORT_ST_READY:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1742,17 +1742,19 @@ void fc_lport_flogi_resp(struct fc_seq *sp, struct fc_frame *fp,</div><div class='ctx'> </div><div class='ctx'> 	mfs = ntohs(flp-&gt;fl_csp.sp_bb_data) &amp;</div><div class='ctx'> 		FC_SP_BB_DATA_MASK;</div><div class='del'>-	if (mfs &gt;= FC_SP_MIN_MAX_PAYLOAD &amp;&amp;</div><div class='del'>-	    mfs &lt;= lport-&gt;mfs) {</div><div class='del'>-		lport-&gt;mfs = mfs;</div><div class='del'>-		fc_host_maxframe_size(lport-&gt;host) = mfs;</div><div class='del'>-	} else {</div><div class='add'>+</div><div class='add'>+	if (mfs &lt; FC_SP_MIN_MAX_PAYLOAD || mfs &gt; FC_SP_MAX_MAX_PAYLOAD) {</div><div class='ctx'> 		FC_LPORT_DBG(lport, "FLOGI bad mfs:%hu response, "</div><div class='ctx'> 			     "lport-&gt;mfs:%hu\n", mfs, lport-&gt;mfs);</div><div class='ctx'> 		fc_lport_error(lport, fp);</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (mfs &lt;= lport-&gt;mfs) {</div><div class='add'>+		lport-&gt;mfs = mfs;</div><div class='add'>+		fc_host_maxframe_size(lport-&gt;host) = mfs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	csp_flags = ntohs(flp-&gt;fl_csp.sp_features);</div><div class='ctx'> 	r_a_tov = ntohl(flp-&gt;fl_csp.sp_r_a_tov);</div><div class='ctx'> 	e_d_tov = ntohl(flp-&gt;fl_csp.sp_e_d_tov);</div><div class='head'>diff --git a/drivers/scsi/libsas/sas_ata.c b/drivers/scsi/libsas/sas_ata.c<br/>index bc0cecc6ad62..441d88ad99a7 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_ata.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/libsas/sas_ata.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_ata.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_ata.c</a></div><div class='hunk'>@@ -546,11 +546,12 @@ static struct ata_port_info sata_port_info = {</div><div class='ctx'> 	.port_ops = &amp;sas_sata_ops</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int sas_ata_init_host_and_port(struct domain_device *found_dev)</div><div class='add'>+int sas_ata_init(struct domain_device *found_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sas_ha_struct *ha = found_dev-&gt;port-&gt;ha;</div><div class='ctx'> 	struct Scsi_Host *shost = ha-&gt;core.shost;</div><div class='ctx'> 	struct ata_port *ap;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	ata_host_init(&amp;found_dev-&gt;sata_dev.ata_host,</div><div class='ctx'> 		      ha-&gt;dev,</div><div class='hunk'>@@ -567,8 +568,11 @@ int sas_ata_init_host_and_port(struct domain_device *found_dev)</div><div class='ctx'> 	ap-&gt;private_data = found_dev;</div><div class='ctx'> 	ap-&gt;cbl = ATA_CBL_SATA;</div><div class='ctx'> 	ap-&gt;scsi_host = shost;</div><div class='del'>-	/* publish initialized ata port */</div><div class='del'>-	smp_wmb();</div><div class='add'>+	rc = ata_sas_port_init(ap);</div><div class='add'>+	if (rc) {</div><div class='add'>+		ata_sas_port_destroy(ap);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='ctx'> 	found_dev-&gt;sata_dev.ap = ap;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -648,18 +652,13 @@ static void sas_get_ata_command_set(struct domain_device *dev)</div><div class='ctx'> void sas_probe_sata(struct asd_sas_port *port)</div><div class='ctx'> {</div><div class='ctx'> 	struct domain_device *dev, *n;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;port-&gt;ha-&gt;disco_mutex);</div><div class='del'>-	list_for_each_entry_safe(dev, n, &amp;port-&gt;disco_list, disco_list_node) {</div><div class='add'>+	list_for_each_entry(dev, &amp;port-&gt;disco_list, disco_list_node) {</div><div class='ctx'> 		if (!dev_is_sata(dev))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		err = sas_ata_init_host_and_port(dev);</div><div class='del'>-		if (err)</div><div class='del'>-			sas_fail_probe(dev, __func__, err);</div><div class='del'>-		else</div><div class='del'>-			ata_sas_async_port_init(dev-&gt;sata_dev.ap);</div><div class='add'>+		ata_sas_async_probe(dev-&gt;sata_dev.ap);</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;port-&gt;ha-&gt;disco_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -718,18 +717,6 @@ static void async_sas_ata_eh(void *data, async_cookie_t cookie)</div><div class='ctx'> 	sas_put_device(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool sas_ata_dev_eh_valid(struct domain_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct ata_port *ap;</div><div class='del'>-</div><div class='del'>-	if (!dev_is_sata(dev))</div><div class='del'>-		return false;</div><div class='del'>-	ap = dev-&gt;sata_dev.ap;</div><div class='del'>-	/* consume fully initialized ata ports */</div><div class='del'>-	smp_rmb();</div><div class='del'>-	return !!ap;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void sas_ata_strategy_handler(struct Scsi_Host *shost)</div><div class='ctx'> {</div><div class='ctx'> 	struct sas_ha_struct *sas_ha = SHOST_TO_SAS_HA(shost);</div><div class='hunk'>@@ -753,7 +740,7 @@ void sas_ata_strategy_handler(struct Scsi_Host *shost)</div><div class='ctx'> </div><div class='ctx'> 		spin_lock(&amp;port-&gt;dev_list_lock);</div><div class='ctx'> 		list_for_each_entry(dev, &amp;port-&gt;dev_list, dev_list_node) {</div><div class='del'>-			if (!sas_ata_dev_eh_valid(dev))</div><div class='add'>+			if (!dev_is_sata(dev))</div><div class='ctx'> 				continue;</div><div class='ctx'> 			async_schedule_domain(async_sas_ata_eh, dev, &amp;async);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/scsi/libsas/sas_discover.c b/drivers/scsi/libsas/sas_discover.c<br/>index 364679675602..629a0865b130 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_discover.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/libsas/sas_discover.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_discover.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_discover.c</a></div><div class='hunk'>@@ -72,6 +72,7 @@ static int sas_get_port_device(struct asd_sas_port *port)</div><div class='ctx'> 	struct asd_sas_phy *phy;</div><div class='ctx'> 	struct sas_rphy *rphy;</div><div class='ctx'> 	struct domain_device *dev;</div><div class='add'>+	int rc = -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	dev = sas_alloc_device();</div><div class='ctx'> 	if (!dev)</div><div class='hunk'>@@ -110,9 +111,16 @@ static int sas_get_port_device(struct asd_sas_port *port)</div><div class='ctx'> </div><div class='ctx'> 	sas_init_dev(dev);</div><div class='ctx'> </div><div class='add'>+	dev-&gt;port = port;</div><div class='ctx'> 	switch (dev-&gt;dev_type) {</div><div class='del'>-	case SAS_END_DEV:</div><div class='ctx'> 	case SATA_DEV:</div><div class='add'>+		rc = sas_ata_init(dev);</div><div class='add'>+		if (rc) {</div><div class='add'>+			rphy = NULL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		/* fall through */</div><div class='add'>+	case SAS_END_DEV:</div><div class='ctx'> 		rphy = sas_end_device_alloc(port-&gt;port);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case EDGE_DEV:</div><div class='hunk'>@@ -131,19 +139,14 @@ static int sas_get_port_device(struct asd_sas_port *port)</div><div class='ctx'> </div><div class='ctx'> 	if (!rphy) {</div><div class='ctx'> 		sas_put_device(dev);</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		return rc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(&amp;port-&gt;phy_list_lock);</div><div class='del'>-	list_for_each_entry(phy, &amp;port-&gt;phy_list, port_phy_el)</div><div class='del'>-		sas_phy_set_target(phy, dev);</div><div class='del'>-	spin_unlock_irq(&amp;port-&gt;phy_list_lock);</div><div class='ctx'> 	rphy-&gt;identify.phy_identifier = phy-&gt;phy-&gt;identify.phy_identifier;</div><div class='ctx'> 	memcpy(dev-&gt;sas_addr, port-&gt;attached_sas_addr, SAS_ADDR_SIZE);</div><div class='ctx'> 	sas_fill_in_rphy(dev, rphy);</div><div class='ctx'> 	sas_hash_addr(dev-&gt;hashed_sas_addr, dev-&gt;sas_addr);</div><div class='ctx'> 	port-&gt;port_dev = dev;</div><div class='del'>-	dev-&gt;port = port;</div><div class='ctx'> 	dev-&gt;linkrate = port-&gt;linkrate;</div><div class='ctx'> 	dev-&gt;min_linkrate = port-&gt;linkrate;</div><div class='ctx'> 	dev-&gt;max_linkrate = port-&gt;linkrate;</div><div class='hunk'>@@ -155,6 +158,7 @@ static int sas_get_port_device(struct asd_sas_port *port)</div><div class='ctx'> 	sas_device_set_phy(dev, port-&gt;port);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;rphy = rphy;</div><div class='add'>+	get_device(&amp;dev-&gt;rphy-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	if (dev_is_sata(dev) || dev-&gt;dev_type == SAS_END_DEV)</div><div class='ctx'> 		list_add_tail(&amp;dev-&gt;disco_list_node, &amp;port-&gt;disco_list);</div><div class='hunk'>@@ -164,6 +168,11 @@ static int sas_get_port_device(struct asd_sas_port *port)</div><div class='ctx'> 		spin_unlock_irq(&amp;port-&gt;dev_list_lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	spin_lock_irq(&amp;port-&gt;phy_list_lock);</div><div class='add'>+	list_for_each_entry(phy, &amp;port-&gt;phy_list, port_phy_el)</div><div class='add'>+		sas_phy_set_target(phy, dev);</div><div class='add'>+	spin_unlock_irq(&amp;port-&gt;phy_list_lock);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -205,8 +214,7 @@ void sas_notify_lldd_dev_gone(struct domain_device *dev)</div><div class='ctx'> static void sas_probe_devices(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct domain_device *dev, *n;</div><div class='del'>-	struct sas_discovery_event *ev =</div><div class='del'>-		container_of(work, struct sas_discovery_event, work);</div><div class='add'>+	struct sas_discovery_event *ev = to_sas_discovery_event(work);</div><div class='ctx'> 	struct asd_sas_port *port = ev-&gt;port;</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(DISCE_PROBE, &amp;port-&gt;disc.pending);</div><div class='hunk'>@@ -255,6 +263,9 @@ void sas_free_device(struct kref *kref)</div><div class='ctx'> {</div><div class='ctx'> 	struct domain_device *dev = container_of(kref, typeof(*dev), kref);</div><div class='ctx'> </div><div class='add'>+	put_device(&amp;dev-&gt;rphy-&gt;dev);</div><div class='add'>+	dev-&gt;rphy = NULL;</div><div class='add'>+</div><div class='ctx'> 	if (dev-&gt;parent)</div><div class='ctx'> 		sas_put_device(dev-&gt;parent);</div><div class='ctx'> </div><div class='hunk'>@@ -291,8 +302,7 @@ static void sas_unregister_common_dev(struct asd_sas_port *port, struct domain_d</div><div class='ctx'> static void sas_destruct_devices(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct domain_device *dev, *n;</div><div class='del'>-	struct sas_discovery_event *ev =</div><div class='del'>-		container_of(work, struct sas_discovery_event, work);</div><div class='add'>+	struct sas_discovery_event *ev = to_sas_discovery_event(work);</div><div class='ctx'> 	struct asd_sas_port *port = ev-&gt;port;</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(DISCE_DESTRUCT, &amp;port-&gt;disc.pending);</div><div class='hunk'>@@ -302,7 +312,6 @@ static void sas_destruct_devices(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 		sas_remove_children(&amp;dev-&gt;rphy-&gt;dev);</div><div class='ctx'> 		sas_rphy_delete(dev-&gt;rphy);</div><div class='del'>-		dev-&gt;rphy = NULL;</div><div class='ctx'> 		sas_unregister_common_dev(port, dev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -314,11 +323,11 @@ void sas_unregister_dev(struct asd_sas_port *port, struct domain_device *dev)</div><div class='ctx'> 		/* this rphy never saw sas_rphy_add */</div><div class='ctx'> 		list_del_init(&amp;dev-&gt;disco_list_node);</div><div class='ctx'> 		sas_rphy_free(dev-&gt;rphy);</div><div class='del'>-		dev-&gt;rphy = NULL;</div><div class='ctx'> 		sas_unregister_common_dev(port, dev);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;rphy &amp;&amp; !test_and_set_bit(SAS_DEV_DESTROY, &amp;dev-&gt;state)) {</div><div class='add'>+	if (!test_and_set_bit(SAS_DEV_DESTROY, &amp;dev-&gt;state)) {</div><div class='ctx'> 		sas_rphy_unlink(dev-&gt;rphy);</div><div class='ctx'> 		list_move_tail(&amp;dev-&gt;disco_list_node, &amp;port-&gt;destroy_list);</div><div class='ctx'> 		sas_discover_event(dev-&gt;port, DISCE_DESTRUCT);</div><div class='hunk'>@@ -377,8 +386,7 @@ static void sas_discover_domain(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct domain_device *dev;</div><div class='ctx'> 	int error = 0;</div><div class='del'>-	struct sas_discovery_event *ev =</div><div class='del'>-		container_of(work, struct sas_discovery_event, work);</div><div class='add'>+	struct sas_discovery_event *ev = to_sas_discovery_event(work);</div><div class='ctx'> 	struct asd_sas_port *port = ev-&gt;port;</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(DISCE_DISCOVER_DOMAIN, &amp;port-&gt;disc.pending);</div><div class='hunk'>@@ -419,8 +427,6 @@ static void sas_discover_domain(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	if (error) {</div><div class='ctx'> 		sas_rphy_free(dev-&gt;rphy);</div><div class='del'>-		dev-&gt;rphy = NULL;</div><div class='del'>-</div><div class='ctx'> 		list_del_init(&amp;dev-&gt;disco_list_node);</div><div class='ctx'> 		spin_lock_irq(&amp;port-&gt;dev_list_lock);</div><div class='ctx'> 		list_del_init(&amp;dev-&gt;dev_list_node);</div><div class='hunk'>@@ -437,8 +443,7 @@ static void sas_discover_domain(struct work_struct *work)</div><div class='ctx'> static void sas_revalidate_domain(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	int res = 0;</div><div class='del'>-	struct sas_discovery_event *ev =</div><div class='del'>-		container_of(work, struct sas_discovery_event, work);</div><div class='add'>+	struct sas_discovery_event *ev = to_sas_discovery_event(work);</div><div class='ctx'> 	struct asd_sas_port *port = ev-&gt;port;</div><div class='ctx'> 	struct sas_ha_struct *ha = port-&gt;ha;</div><div class='ctx'> </div><div class='hunk'>@@ -466,21 +471,25 @@ static void sas_revalidate_domain(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> /* ---------- Events ---------- */</div><div class='ctx'> </div><div class='del'>-static void sas_chain_work(struct sas_ha_struct *ha, struct work_struct *work)</div><div class='add'>+static void sas_chain_work(struct sas_ha_struct *ha, struct sas_work *sw)</div><div class='ctx'> {</div><div class='del'>-	/* chained work is not subject to SA_HA_DRAINING or SAS_HA_REGISTERED */</div><div class='del'>-	scsi_queue_work(ha-&gt;core.shost, work);</div><div class='add'>+	/* chained work is not subject to SA_HA_DRAINING or</div><div class='add'>+	 * SAS_HA_REGISTERED, because it is either submitted in the</div><div class='add'>+	 * workqueue, or known to be submitted from a context that is</div><div class='add'>+	 * not racing against draining</div><div class='add'>+	 */</div><div class='add'>+	scsi_queue_work(ha-&gt;core.shost, &amp;sw-&gt;work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sas_chain_event(int event, unsigned long *pending,</div><div class='del'>-			    struct work_struct *work,</div><div class='add'>+			    struct sas_work *sw,</div><div class='ctx'> 			    struct sas_ha_struct *ha)</div><div class='ctx'> {</div><div class='ctx'> 	if (!test_and_set_bit(event, pending)) {</div><div class='ctx'> 		unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_irqsave(&amp;ha-&gt;state_lock, flags);</div><div class='del'>-		sas_chain_work(ha, work);</div><div class='add'>+		sas_chain_work(ha, sw);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;ha-&gt;state_lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -519,7 +528,7 @@ void sas_init_disc(struct sas_discovery *disc, struct asd_sas_port *port)</div><div class='ctx'> </div><div class='ctx'> 	disc-&gt;pending = 0;</div><div class='ctx'> 	for (i = 0; i &lt; DISC_NUM_EVENTS; i++) {</div><div class='del'>-		INIT_WORK(&amp;disc-&gt;disc_work[i].work, sas_event_fns[i]);</div><div class='add'>+		INIT_SAS_WORK(&amp;disc-&gt;disc_work[i].work, sas_event_fns[i]);</div><div class='ctx'> 		disc-&gt;disc_work[i].port = port;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/scsi/libsas/sas_event.c b/drivers/scsi/libsas/sas_event.c<br/>index 16639bbae629..4e4292d210c1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_event.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/libsas/sas_event.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_event.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_event.c</a></div><div class='hunk'>@@ -27,19 +27,21 @@</div><div class='ctx'> #include "sas_internal.h"</div><div class='ctx'> #include "sas_dump.h"</div><div class='ctx'> </div><div class='del'>-void sas_queue_work(struct sas_ha_struct *ha, struct work_struct *work)</div><div class='add'>+void sas_queue_work(struct sas_ha_struct *ha, struct sas_work *sw)</div><div class='ctx'> {</div><div class='ctx'> 	if (!test_bit(SAS_HA_REGISTERED, &amp;ha-&gt;state))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (test_bit(SAS_HA_DRAINING, &amp;ha-&gt;state))</div><div class='del'>-		list_add(&amp;work-&gt;entry, &amp;ha-&gt;defer_q);</div><div class='del'>-	else</div><div class='del'>-		scsi_queue_work(ha-&gt;core.shost, work);</div><div class='add'>+	if (test_bit(SAS_HA_DRAINING, &amp;ha-&gt;state)) {</div><div class='add'>+		/* add it to the defer list, if not already pending */</div><div class='add'>+		if (list_empty(&amp;sw-&gt;drain_node))</div><div class='add'>+			list_add(&amp;sw-&gt;drain_node, &amp;ha-&gt;defer_q);</div><div class='add'>+	} else</div><div class='add'>+		scsi_queue_work(ha-&gt;core.shost, &amp;sw-&gt;work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sas_queue_event(int event, unsigned long *pending,</div><div class='del'>-			    struct work_struct *work,</div><div class='add'>+			    struct sas_work *work,</div><div class='ctx'> 			    struct sas_ha_struct *ha)</div><div class='ctx'> {</div><div class='ctx'> 	if (!test_and_set_bit(event, pending)) {</div><div class='hunk'>@@ -55,7 +57,7 @@ static void sas_queue_event(int event, unsigned long *pending,</div><div class='ctx'> void __sas_drain_work(struct sas_ha_struct *ha)</div><div class='ctx'> {</div><div class='ctx'> 	struct workqueue_struct *wq = ha-&gt;core.shost-&gt;work_q;</div><div class='del'>-	struct work_struct *w, *_w;</div><div class='add'>+	struct sas_work *sw, *_sw;</div><div class='ctx'> </div><div class='ctx'> 	set_bit(SAS_HA_DRAINING, &amp;ha-&gt;state);</div><div class='ctx'> 	/* flush submitters */</div><div class='hunk'>@@ -66,9 +68,9 @@ void __sas_drain_work(struct sas_ha_struct *ha)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;ha-&gt;state_lock);</div><div class='ctx'> 	clear_bit(SAS_HA_DRAINING, &amp;ha-&gt;state);</div><div class='del'>-	list_for_each_entry_safe(w, _w, &amp;ha-&gt;defer_q, entry) {</div><div class='del'>-		list_del_init(&amp;w-&gt;entry);</div><div class='del'>-		sas_queue_work(ha, w);</div><div class='add'>+	list_for_each_entry_safe(sw, _sw, &amp;ha-&gt;defer_q, drain_node) {</div><div class='add'>+		list_del_init(&amp;sw-&gt;drain_node);</div><div class='add'>+		sas_queue_work(ha, sw);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irq(&amp;ha-&gt;state_lock);</div><div class='ctx'> }</div><div class='hunk'>@@ -151,7 +153,7 @@ int sas_init_events(struct sas_ha_struct *sas_ha)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; HA_NUM_EVENTS; i++) {</div><div class='del'>-		INIT_WORK(&amp;sas_ha-&gt;ha_events[i].work, sas_ha_event_fns[i]);</div><div class='add'>+		INIT_SAS_WORK(&amp;sas_ha-&gt;ha_events[i].work, sas_ha_event_fns[i]);</div><div class='ctx'> 		sas_ha-&gt;ha_events[i].ha = sas_ha;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/libsas/sas_expander.c b/drivers/scsi/libsas/sas_expander.c<br/>index 05acd9e35fc4..caa0525d2523 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_expander.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/libsas/sas_expander.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_expander.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_expander.c</a></div><div class='hunk'>@@ -202,6 +202,7 @@ static void sas_set_ex_phy(struct domain_device *dev, int phy_id, void *rsp)</div><div class='ctx'> 	u8 sas_addr[SAS_ADDR_SIZE];</div><div class='ctx'> 	struct smp_resp *resp = rsp;</div><div class='ctx'> 	struct discover_resp *dr = &amp;resp-&gt;disc;</div><div class='add'>+	struct sas_ha_struct *ha = dev-&gt;port-&gt;ha;</div><div class='ctx'> 	struct expander_device *ex = &amp;dev-&gt;ex_dev;</div><div class='ctx'> 	struct ex_phy *phy = &amp;ex-&gt;ex_phy[phy_id];</div><div class='ctx'> 	struct sas_rphy *rphy = dev-&gt;rphy;</div><div class='hunk'>@@ -209,6 +210,8 @@ static void sas_set_ex_phy(struct domain_device *dev, int phy_id, void *rsp)</div><div class='ctx'> 	char *type;</div><div class='ctx'> </div><div class='ctx'> 	if (new_phy) {</div><div class='add'>+		if (WARN_ON_ONCE(test_bit(SAS_HA_ATA_EH_ACTIVE, &amp;ha-&gt;state)))</div><div class='add'>+			return;</div><div class='ctx'> 		phy-&gt;phy = sas_phy_alloc(&amp;rphy-&gt;dev, phy_id);</div><div class='ctx'> </div><div class='ctx'> 		/* FIXME: error_handling */</div><div class='hunk'>@@ -233,6 +236,8 @@ static void sas_set_ex_phy(struct domain_device *dev, int phy_id, void *rsp)</div><div class='ctx'> 	memcpy(sas_addr, phy-&gt;attached_sas_addr, SAS_ADDR_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	phy-&gt;attached_dev_type = to_dev_type(dr);</div><div class='add'>+	if (test_bit(SAS_HA_ATA_EH_ACTIVE, &amp;ha-&gt;state))</div><div class='add'>+		goto out;</div><div class='ctx'> 	phy-&gt;phy_id = phy_id;</div><div class='ctx'> 	phy-&gt;linkrate = dr-&gt;linkrate;</div><div class='ctx'> 	phy-&gt;attached_sata_host = dr-&gt;attached_sata_host;</div><div class='hunk'>@@ -240,7 +245,14 @@ static void sas_set_ex_phy(struct domain_device *dev, int phy_id, void *rsp)</div><div class='ctx'> 	phy-&gt;attached_sata_ps   = dr-&gt;attached_sata_ps;</div><div class='ctx'> 	phy-&gt;attached_iproto = dr-&gt;iproto &lt;&lt; 1;</div><div class='ctx'> 	phy-&gt;attached_tproto = dr-&gt;tproto &lt;&lt; 1;</div><div class='del'>-	memcpy(phy-&gt;attached_sas_addr, dr-&gt;attached_sas_addr, SAS_ADDR_SIZE);</div><div class='add'>+	/* help some expanders that fail to zero sas_address in the 'no</div><div class='add'>+	 * device' case</div><div class='add'>+	 */</div><div class='add'>+	if (phy-&gt;attached_dev_type == NO_DEVICE ||</div><div class='add'>+	    phy-&gt;linkrate &lt; SAS_LINK_RATE_1_5_GBPS)</div><div class='add'>+		memset(phy-&gt;attached_sas_addr, 0, SAS_ADDR_SIZE);</div><div class='add'>+	else</div><div class='add'>+		memcpy(phy-&gt;attached_sas_addr, dr-&gt;attached_sas_addr, SAS_ADDR_SIZE);</div><div class='ctx'> 	phy-&gt;attached_phy_id = dr-&gt;attached_phy_id;</div><div class='ctx'> 	phy-&gt;phy_change_count = dr-&gt;change_count;</div><div class='ctx'> 	phy-&gt;routing_attr = dr-&gt;routing_attr;</div><div class='hunk'>@@ -266,6 +278,7 @@ static void sas_set_ex_phy(struct domain_device *dev, int phy_id, void *rsp)</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+ out:</div><div class='ctx'> 	switch (phy-&gt;attached_dev_type) {</div><div class='ctx'> 	case SATA_PENDING:</div><div class='ctx'> 		type = "stp pending";</div><div class='hunk'>@@ -304,7 +317,15 @@ static void sas_set_ex_phy(struct domain_device *dev, int phy_id, void *rsp)</div><div class='ctx'> 	else</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	SAS_DPRINTK("ex %016llx phy%02d:%c:%X attached: %016llx (%s)\n",</div><div class='add'>+	/* if the attached device type changed and ata_eh is active,</div><div class='add'>+	 * make sure we run revalidation when eh completes (see:</div><div class='add'>+	 * sas_enable_revalidation)</div><div class='add'>+	 */</div><div class='add'>+	if (test_bit(SAS_HA_ATA_EH_ACTIVE, &amp;ha-&gt;state))</div><div class='add'>+		set_bit(DISCE_REVALIDATE_DOMAIN, &amp;dev-&gt;port-&gt;disc.pending);</div><div class='add'>+</div><div class='add'>+	SAS_DPRINTK("%sex %016llx phy%02d:%c:%X attached: %016llx (%s)\n",</div><div class='add'>+		    test_bit(SAS_HA_ATA_EH_ACTIVE, &amp;ha-&gt;state) ? "ata: " : "",</div><div class='ctx'> 		    SAS_ADDR(dev-&gt;sas_addr), phy-&gt;phy_id,</div><div class='ctx'> 		    sas_route_char(dev, phy), phy-&gt;linkrate,</div><div class='ctx'> 		    SAS_ADDR(phy-&gt;attached_sas_addr), type);</div><div class='hunk'>@@ -776,13 +797,16 @@ static struct domain_device *sas_ex_discover_end_dev(</div><div class='ctx'> 		if (res)</div><div class='ctx'> 			goto out_free;</div><div class='ctx'> </div><div class='add'>+		sas_init_dev(child);</div><div class='add'>+		res = sas_ata_init(child);</div><div class='add'>+		if (res)</div><div class='add'>+			goto out_free;</div><div class='ctx'> 		rphy = sas_end_device_alloc(phy-&gt;port);</div><div class='del'>-		if (unlikely(!rphy))</div><div class='add'>+		if (!rphy)</div><div class='ctx'> 			goto out_free;</div><div class='ctx'> </div><div class='del'>-		sas_init_dev(child);</div><div class='del'>-</div><div class='ctx'> 		child-&gt;rphy = rphy;</div><div class='add'>+		get_device(&amp;rphy-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 		list_add_tail(&amp;child-&gt;disco_list_node, &amp;parent-&gt;port-&gt;disco_list);</div><div class='ctx'> </div><div class='hunk'>@@ -806,6 +830,7 @@ static struct domain_device *sas_ex_discover_end_dev(</div><div class='ctx'> 		sas_init_dev(child);</div><div class='ctx'> </div><div class='ctx'> 		child-&gt;rphy = rphy;</div><div class='add'>+		get_device(&amp;rphy-&gt;dev);</div><div class='ctx'> 		sas_fill_in_rphy(child, rphy);</div><div class='ctx'> </div><div class='ctx'> 		list_add_tail(&amp;child-&gt;disco_list_node, &amp;parent-&gt;port-&gt;disco_list);</div><div class='hunk'>@@ -830,8 +855,6 @@ static struct domain_device *sas_ex_discover_end_dev(</div><div class='ctx'> </div><div class='ctx'>  out_list_del:</div><div class='ctx'> 	sas_rphy_free(child-&gt;rphy);</div><div class='del'>-	child-&gt;rphy = NULL;</div><div class='del'>-</div><div class='ctx'> 	list_del(&amp;child-&gt;disco_list_node);</div><div class='ctx'> 	spin_lock_irq(&amp;parent-&gt;port-&gt;dev_list_lock);</div><div class='ctx'> 	list_del(&amp;child-&gt;dev_list_node);</div><div class='hunk'>@@ -911,6 +934,7 @@ static struct domain_device *sas_ex_discover_expander(</div><div class='ctx'> 	}</div><div class='ctx'> 	port = parent-&gt;port;</div><div class='ctx'> 	child-&gt;rphy = rphy;</div><div class='add'>+	get_device(&amp;rphy-&gt;dev);</div><div class='ctx'> 	edev = rphy_to_expander_device(rphy);</div><div class='ctx'> 	child-&gt;dev_type = phy-&gt;attached_dev_type;</div><div class='ctx'> 	kref_get(&amp;parent-&gt;kref);</div><div class='hunk'>@@ -934,6 +958,7 @@ static struct domain_device *sas_ex_discover_expander(</div><div class='ctx'> </div><div class='ctx'> 	res = sas_discover_expander(child);</div><div class='ctx'> 	if (res) {</div><div class='add'>+		sas_rphy_delete(rphy);</div><div class='ctx'> 		spin_lock_irq(&amp;parent-&gt;port-&gt;dev_list_lock);</div><div class='ctx'> 		list_del(&amp;child-&gt;dev_list_node);</div><div class='ctx'> 		spin_unlock_irq(&amp;parent-&gt;port-&gt;dev_list_lock);</div><div class='hunk'>@@ -1718,9 +1743,17 @@ static int sas_find_bcast_phy(struct domain_device *dev, int *phy_id,</div><div class='ctx'> 		int phy_change_count = 0;</div><div class='ctx'> </div><div class='ctx'> 		res = sas_get_phy_change_count(dev, i, &amp;phy_change_count);</div><div class='del'>-		if (res)</div><div class='del'>-			goto out;</div><div class='del'>-		else if (phy_change_count != ex-&gt;ex_phy[i].phy_change_count) {</div><div class='add'>+		switch (res) {</div><div class='add'>+		case SMP_RESP_PHY_VACANT:</div><div class='add'>+		case SMP_RESP_NO_PHY:</div><div class='add'>+			continue;</div><div class='add'>+		case SMP_RESP_FUNC_ACC:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return res;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (phy_change_count != ex-&gt;ex_phy[i].phy_change_count) {</div><div class='ctx'> 			if (update)</div><div class='ctx'> 				ex-&gt;ex_phy[i].phy_change_count =</div><div class='ctx'> 					phy_change_count;</div><div class='hunk'>@@ -1728,8 +1761,7 @@ static int sas_find_bcast_phy(struct domain_device *dev, int *phy_id,</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-out:</div><div class='del'>-	return res;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sas_get_ex_change_count(struct domain_device *dev, int *ecc)</div><div class='head'>diff --git a/drivers/scsi/libsas/sas_init.c b/drivers/scsi/libsas/sas_init.c<br/>index 120bff64be30..10cb5ae30977 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/libsas/sas_init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_init.c</a></div><div class='hunk'>@@ -94,8 +94,7 @@ void sas_hash_addr(u8 *hashed, const u8 *sas_addr)</div><div class='ctx'> </div><div class='ctx'> void sas_hae_reset(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct sas_ha_event *ev =</div><div class='del'>-		container_of(work, struct sas_ha_event, work);</div><div class='add'>+	struct sas_ha_event *ev = to_sas_ha_event(work);</div><div class='ctx'> 	struct sas_ha_struct *ha = ev-&gt;ha;</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(HAE_RESET, &amp;ha-&gt;pending);</div><div class='hunk'>@@ -369,14 +368,14 @@ static void sas_phy_release(struct sas_phy *phy)</div><div class='ctx'> </div><div class='ctx'> static void phy_reset_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct sas_phy_data *d = container_of(work, typeof(*d), reset_work);</div><div class='add'>+	struct sas_phy_data *d = container_of(work, typeof(*d), reset_work.work);</div><div class='ctx'> </div><div class='ctx'> 	d-&gt;reset_result = transport_sas_phy_reset(d-&gt;phy, d-&gt;hard_reset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void phy_enable_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct sas_phy_data *d = container_of(work, typeof(*d), enable_work);</div><div class='add'>+	struct sas_phy_data *d = container_of(work, typeof(*d), enable_work.work);</div><div class='ctx'> </div><div class='ctx'> 	d-&gt;enable_result = sas_phy_enable(d-&gt;phy, d-&gt;enable);</div><div class='ctx'> }</div><div class='hunk'>@@ -389,8 +388,8 @@ static int sas_phy_setup(struct sas_phy *phy)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;d-&gt;event_lock);</div><div class='del'>-	INIT_WORK(&amp;d-&gt;reset_work, phy_reset_work);</div><div class='del'>-	INIT_WORK(&amp;d-&gt;enable_work, phy_enable_work);</div><div class='add'>+	INIT_SAS_WORK(&amp;d-&gt;reset_work, phy_reset_work);</div><div class='add'>+	INIT_SAS_WORK(&amp;d-&gt;enable_work, phy_enable_work);</div><div class='ctx'> 	d-&gt;phy = phy;</div><div class='ctx'> 	phy-&gt;hostdata = d;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/libsas/sas_internal.h b/drivers/scsi/libsas/sas_internal.h<br/>index f05c63879949..507e4cf12e56 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_internal.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/libsas/sas_internal.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_internal.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_internal.h</a></div><div class='hunk'>@@ -45,10 +45,10 @@ struct sas_phy_data {</div><div class='ctx'> 	struct mutex event_lock;</div><div class='ctx'> 	int hard_reset;</div><div class='ctx'> 	int reset_result;</div><div class='del'>-	struct work_struct reset_work;</div><div class='add'>+	struct sas_work reset_work;</div><div class='ctx'> 	int enable;</div><div class='ctx'> 	int enable_result;</div><div class='del'>-	struct work_struct enable_work;</div><div class='add'>+	struct sas_work enable_work;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void sas_scsi_recover_host(struct Scsi_Host *shost);</div><div class='hunk'>@@ -80,7 +80,7 @@ void sas_porte_broadcast_rcvd(struct work_struct *work);</div><div class='ctx'> void sas_porte_link_reset_err(struct work_struct *work);</div><div class='ctx'> void sas_porte_timer_event(struct work_struct *work);</div><div class='ctx'> void sas_porte_hard_reset(struct work_struct *work);</div><div class='del'>-void sas_queue_work(struct sas_ha_struct *ha, struct work_struct *work);</div><div class='add'>+void sas_queue_work(struct sas_ha_struct *ha, struct sas_work *sw);</div><div class='ctx'> </div><div class='ctx'> int sas_notify_lldd_dev_found(struct domain_device *);</div><div class='ctx'> void sas_notify_lldd_dev_gone(struct domain_device *);</div><div class='head'>diff --git a/drivers/scsi/libsas/sas_phy.c b/drivers/scsi/libsas/sas_phy.c<br/>index dcfd4a9105c5..521422e857ab 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_phy.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/libsas/sas_phy.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_phy.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_phy.c</a></div><div class='hunk'>@@ -32,8 +32,7 @@</div><div class='ctx'> </div><div class='ctx'> static void sas_phye_loss_of_signal(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct asd_sas_event *ev =</div><div class='del'>-		container_of(work, struct asd_sas_event, work);</div><div class='add'>+	struct asd_sas_event *ev = to_asd_sas_event(work);</div><div class='ctx'> 	struct asd_sas_phy *phy = ev-&gt;phy;</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(PHYE_LOSS_OF_SIGNAL, &amp;phy-&gt;phy_events_pending);</div><div class='hunk'>@@ -43,8 +42,7 @@ static void sas_phye_loss_of_signal(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static void sas_phye_oob_done(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct asd_sas_event *ev =</div><div class='del'>-		container_of(work, struct asd_sas_event, work);</div><div class='add'>+	struct asd_sas_event *ev = to_asd_sas_event(work);</div><div class='ctx'> 	struct asd_sas_phy *phy = ev-&gt;phy;</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(PHYE_OOB_DONE, &amp;phy-&gt;phy_events_pending);</div><div class='hunk'>@@ -53,8 +51,7 @@ static void sas_phye_oob_done(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static void sas_phye_oob_error(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct asd_sas_event *ev =</div><div class='del'>-		container_of(work, struct asd_sas_event, work);</div><div class='add'>+	struct asd_sas_event *ev = to_asd_sas_event(work);</div><div class='ctx'> 	struct asd_sas_phy *phy = ev-&gt;phy;</div><div class='ctx'> 	struct sas_ha_struct *sas_ha = phy-&gt;ha;</div><div class='ctx'> 	struct asd_sas_port *port = phy-&gt;port;</div><div class='hunk'>@@ -85,8 +82,7 @@ static void sas_phye_oob_error(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static void sas_phye_spinup_hold(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct asd_sas_event *ev =</div><div class='del'>-		container_of(work, struct asd_sas_event, work);</div><div class='add'>+	struct asd_sas_event *ev = to_asd_sas_event(work);</div><div class='ctx'> 	struct asd_sas_phy *phy = ev-&gt;phy;</div><div class='ctx'> 	struct sas_ha_struct *sas_ha = phy-&gt;ha;</div><div class='ctx'> 	struct sas_internal *i =</div><div class='hunk'>@@ -127,14 +123,12 @@ int sas_register_phys(struct sas_ha_struct *sas_ha)</div><div class='ctx'> 		phy-&gt;error = 0;</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;phy-&gt;port_phy_el);</div><div class='ctx'> 		for (k = 0; k &lt; PORT_NUM_EVENTS; k++) {</div><div class='del'>-			INIT_WORK(&amp;phy-&gt;port_events[k].work,</div><div class='del'>-				  sas_port_event_fns[k]);</div><div class='add'>+			INIT_SAS_WORK(&amp;phy-&gt;port_events[k].work, sas_port_event_fns[k]);</div><div class='ctx'> 			phy-&gt;port_events[k].phy = phy;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		for (k = 0; k &lt; PHY_NUM_EVENTS; k++) {</div><div class='del'>-			INIT_WORK(&amp;phy-&gt;phy_events[k].work,</div><div class='del'>-				  sas_phy_event_fns[k]);</div><div class='add'>+			INIT_SAS_WORK(&amp;phy-&gt;phy_events[k].work, sas_phy_event_fns[k]);</div><div class='ctx'> 			phy-&gt;phy_events[k].phy = phy;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -144,8 +138,7 @@ int sas_register_phys(struct sas_ha_struct *sas_ha)</div><div class='ctx'> 		spin_lock_init(&amp;phy-&gt;sas_prim_lock);</div><div class='ctx'> 		phy-&gt;frame_rcvd_size = 0;</div><div class='ctx'> </div><div class='del'>-		phy-&gt;phy = sas_phy_alloc(&amp;sas_ha-&gt;core.shost-&gt;shost_gendev,</div><div class='del'>-					 i);</div><div class='add'>+		phy-&gt;phy = sas_phy_alloc(&amp;sas_ha-&gt;core.shost-&gt;shost_gendev, i);</div><div class='ctx'> 		if (!phy-&gt;phy)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/libsas/sas_port.c b/drivers/scsi/libsas/sas_port.c<br/>index eb19c016d500..e884a8c58a0c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_port.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/libsas/sas_port.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/libsas/sas_port.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/libsas/sas_port.c</a></div><div class='hunk'>@@ -123,7 +123,7 @@ static void sas_form_port(struct asd_sas_phy *phy)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;sas_ha-&gt;phy_port_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (!port-&gt;port) {</div><div class='del'>-		port-&gt;port = sas_port_alloc(phy-&gt;phy-&gt;dev.parent, phy-&gt;id);</div><div class='add'>+		port-&gt;port = sas_port_alloc(phy-&gt;phy-&gt;dev.parent, port-&gt;id);</div><div class='ctx'> 		BUG_ON(!port-&gt;port);</div><div class='ctx'> 		sas_port_add(port-&gt;port);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -208,8 +208,7 @@ void sas_deform_port(struct asd_sas_phy *phy, int gone)</div><div class='ctx'> </div><div class='ctx'> void sas_porte_bytes_dmaed(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct asd_sas_event *ev =</div><div class='del'>-		container_of(work, struct asd_sas_event, work);</div><div class='add'>+	struct asd_sas_event *ev = to_asd_sas_event(work);</div><div class='ctx'> 	struct asd_sas_phy *phy = ev-&gt;phy;</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(PORTE_BYTES_DMAED, &amp;phy-&gt;port_events_pending);</div><div class='hunk'>@@ -219,8 +218,7 @@ void sas_porte_bytes_dmaed(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> void sas_porte_broadcast_rcvd(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct asd_sas_event *ev =</div><div class='del'>-		container_of(work, struct asd_sas_event, work);</div><div class='add'>+	struct asd_sas_event *ev = to_asd_sas_event(work);</div><div class='ctx'> 	struct asd_sas_phy *phy = ev-&gt;phy;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 prim;</div><div class='hunk'>@@ -237,8 +235,7 @@ void sas_porte_broadcast_rcvd(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> void sas_porte_link_reset_err(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct asd_sas_event *ev =</div><div class='del'>-		container_of(work, struct asd_sas_event, work);</div><div class='add'>+	struct asd_sas_event *ev = to_asd_sas_event(work);</div><div class='ctx'> 	struct asd_sas_phy *phy = ev-&gt;phy;</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(PORTE_LINK_RESET_ERR, &amp;phy-&gt;port_events_pending);</div><div class='hunk'>@@ -248,8 +245,7 @@ void sas_porte_link_reset_err(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> void sas_porte_timer_event(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct asd_sas_event *ev =</div><div class='del'>-		container_of(work, struct asd_sas_event, work);</div><div class='add'>+	struct asd_sas_event *ev = to_asd_sas_event(work);</div><div class='ctx'> 	struct asd_sas_phy *phy = ev-&gt;phy;</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(PORTE_TIMER_EVENT, &amp;phy-&gt;port_events_pending);</div><div class='hunk'>@@ -259,8 +255,7 @@ void sas_porte_timer_event(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> void sas_porte_hard_reset(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct asd_sas_event *ev =</div><div class='del'>-		container_of(work, struct asd_sas_event, work);</div><div class='add'>+	struct asd_sas_event *ev = to_asd_sas_event(work);</div><div class='ctx'> 	struct asd_sas_phy *phy = ev-&gt;phy;</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(PORTE_HARD_RESET, &amp;phy-&gt;port_events_pending);</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc.h b/drivers/scsi/lpfc/lpfc.h<br/>index 3a1ffdd6d831..e5da6da20f8a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc.h</a></div><div class='hunk'>@@ -93,6 +93,9 @@ struct lpfc_sli2_slim;</div><div class='ctx'> /* lpfc wait event data ready flag */</div><div class='ctx'> #define LPFC_DATA_READY		(1&lt;&lt;0)</div><div class='ctx'> </div><div class='add'>+/* queue dump line buffer size */</div><div class='add'>+#define LPFC_LBUF_SZ		128</div><div class='add'>+</div><div class='ctx'> enum lpfc_polling_flags {</div><div class='ctx'> 	ENABLE_FCP_RING_POLLING = 0x1,</div><div class='ctx'> 	DISABLE_FCP_RING_INT    = 0x2</div><div class='hunk'>@@ -620,6 +623,7 @@ struct lpfc_hba {</div><div class='ctx'> #define HBA_AER_ENABLED		0x1000 /* AER enabled with HBA */</div><div class='ctx'> #define HBA_DEVLOSS_TMO         0x2000 /* HBA in devloss timeout */</div><div class='ctx'> #define HBA_RRQ_ACTIVE		0x4000 /* process the rrq active list */</div><div class='add'>+#define HBA_FCP_IOQ_FLUSH	0x8000 /* FCP I/O queues being flushed */</div><div class='ctx'> 	uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/</div><div class='ctx'> 	struct lpfc_dmabuf slim2p;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_bsg.c b/drivers/scsi/lpfc/lpfc_bsg.c<br/>index 141e4b40bb55..253d9a857346 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_bsg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_bsg.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_bsg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_bsg.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*******************************************************************</div><div class='ctx'>  * This file is part of the Emulex Linux Device Driver for         *</div><div class='ctx'>  * Fibre Channel Host Bus Adapters.                                *</div><div class='del'>- * Copyright (C) 2009-2011 Emulex.  All rights reserved.           *</div><div class='add'>+ * Copyright (C) 2009-2012 Emulex.  All rights reserved.           *</div><div class='ctx'>  * EMULEX and SLI are trademarks of Emulex.                        *</div><div class='ctx'>  * www.emulex.com                                                  *</div><div class='ctx'>  *                                                                 *</div><div class='hunk'>@@ -599,6 +599,7 @@ lpfc_bsg_rport_els(struct fc_bsg_job *job)</div><div class='ctx'> </div><div class='ctx'> 	cmdiocbq-&gt;iocb_cmpl = lpfc_bsg_rport_els_cmp;</div><div class='ctx'> 	cmdiocbq-&gt;context1 = dd_data;</div><div class='add'>+	cmdiocbq-&gt;context_un.ndlp = ndlp;</div><div class='ctx'> 	cmdiocbq-&gt;context2 = rspiocbq;</div><div class='ctx'> 	dd_data-&gt;type = TYPE_IOCB;</div><div class='ctx'> 	dd_data-&gt;context_un.iocb.cmdiocbq = cmdiocbq;</div><div class='hunk'>@@ -3978,6 +3979,7 @@ lpfc_bsg_handle_sli_cfg_mbox(struct lpfc_hba *phba, struct fc_bsg_job *job,</div><div class='ctx'> 		} else if (subsys == SLI_CONFIG_SUBSYS_COMN) {</div><div class='ctx'> 			switch (opcode) {</div><div class='ctx'> 			case COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES:</div><div class='add'>+			case COMN_OPCODE_GET_CNTL_ATTRIBUTES:</div><div class='ctx'> 				lpfc_printf_log(phba, KERN_INFO, LOG_LIBDFC,</div><div class='ctx'> 						"3106 Handled SLI_CONFIG "</div><div class='ctx'> 						"subsys_comn, opcode:x%x\n",</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_bsg.h b/drivers/scsi/lpfc/lpfc_bsg.h<br/>index edfe61fc52b1..67f7d0a160d1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_bsg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_bsg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_bsg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_bsg.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*******************************************************************</div><div class='ctx'>  * This file is part of the Emulex Linux Device Driver for         *</div><div class='ctx'>  * Fibre Channel Host Bus Adapters.                                *</div><div class='del'>- * Copyright (C) 2010 Emulex.  All rights reserved.                *</div><div class='add'>+ * Copyright (C) 2010-2012 Emulex.  All rights reserved.                *</div><div class='ctx'>  * EMULEX and SLI are trademarks of Emulex.                        *</div><div class='ctx'>  * www.emulex.com                                                  *</div><div class='ctx'>  *                                                                 *</div><div class='hunk'>@@ -249,6 +249,7 @@ struct lpfc_sli_config_emb1_subsys {</div><div class='ctx'> #define COMN_OPCODE_READ_OBJECT_LIST	0xAD</div><div class='ctx'> #define COMN_OPCODE_DELETE_OBJECT	0xAE</div><div class='ctx'> #define COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES	0x79</div><div class='add'>+#define COMN_OPCODE_GET_CNTL_ATTRIBUTES	0x20</div><div class='ctx'> 	uint32_t timeout;</div><div class='ctx'> 	uint32_t request_length;</div><div class='ctx'> 	uint32_t word9;</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_crtn.h b/drivers/scsi/lpfc/lpfc_crtn.h<br/>index 330dd7192a7f..9b2a16f3bc79 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_crtn.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_crtn.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_crtn.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_crtn.h</a></div><div class='hunk'>@@ -254,6 +254,7 @@ int</div><div class='ctx'> lpfc_sli_handle_fast_ring_event(struct lpfc_hba *,</div><div class='ctx'> 			struct lpfc_sli_ring *, uint32_t);</div><div class='ctx'> </div><div class='add'>+struct lpfc_iocbq *__lpfc_sli_get_iocbq(struct lpfc_hba *);</div><div class='ctx'> struct lpfc_iocbq * lpfc_sli_get_iocbq(struct lpfc_hba *);</div><div class='ctx'> void lpfc_sli_release_iocbq(struct lpfc_hba *, struct lpfc_iocbq *);</div><div class='ctx'> uint16_t lpfc_sli_next_iotag(struct lpfc_hba *, struct lpfc_iocbq *);</div><div class='hunk'>@@ -460,6 +461,7 @@ int lpfc_hba_init_link_fc_topology(struct lpfc_hba *, uint32_t, uint32_t);</div><div class='ctx'> int lpfc_issue_reg_vfi(struct lpfc_vport *);</div><div class='ctx'> int lpfc_issue_unreg_vfi(struct lpfc_vport *);</div><div class='ctx'> int lpfc_selective_reset(struct lpfc_hba *);</div><div class='del'>-int lpfc_sli4_read_config(struct lpfc_hba *phba);</div><div class='del'>-int lpfc_scsi_buf_update(struct lpfc_hba *phba);</div><div class='del'>-void lpfc_sli4_node_prep(struct lpfc_hba *phba);</div><div class='add'>+int lpfc_sli4_read_config(struct lpfc_hba *);</div><div class='add'>+void lpfc_sli4_node_prep(struct lpfc_hba *);</div><div class='add'>+int lpfc_sli4_xri_sgl_update(struct lpfc_hba *);</div><div class='add'>+void lpfc_free_sgl_list(struct lpfc_hba *, struct list_head *);</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_debugfs.c b/drivers/scsi/lpfc/lpfc_debugfs.c<br/>index af04b0d6688d..3217d63ed282 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_debugfs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_debugfs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_debugfs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_debugfs.c</a></div><div class='hunk'>@@ -4466,3 +4466,49 @@ lpfc_debugfs_terminate(struct lpfc_vport *vport)</div><div class='ctx'> #endif</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Driver debug utility routines outside of debugfs. The debug utility</div><div class='add'>+ * routines implemented here is intended to be used in the instrumented</div><div class='add'>+ * debug driver for debugging host or port issues.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_all_queues - dump all the queues with a hba</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps entries of all the queues asociated with the @phba.</div><div class='add'>+ **/</div><div class='add'>+void</div><div class='add'>+lpfc_debug_dump_all_queues(struct lpfc_hba *phba)</div><div class='add'>+{</div><div class='add'>+	int fcp_wqidx;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Dump Work Queues (WQs)</div><div class='add'>+	 */</div><div class='add'>+	lpfc_debug_dump_mbx_wq(phba);</div><div class='add'>+	lpfc_debug_dump_els_wq(phba);</div><div class='add'>+</div><div class='add'>+	for (fcp_wqidx = 0; fcp_wqidx &lt; phba-&gt;cfg_fcp_wq_count; fcp_wqidx++)</div><div class='add'>+		lpfc_debug_dump_fcp_wq(phba, fcp_wqidx);</div><div class='add'>+</div><div class='add'>+	lpfc_debug_dump_hdr_rq(phba);</div><div class='add'>+	lpfc_debug_dump_dat_rq(phba);</div><div class='add'>+	/*</div><div class='add'>+	 * Dump Complete Queues (CQs)</div><div class='add'>+	 */</div><div class='add'>+	lpfc_debug_dump_mbx_cq(phba);</div><div class='add'>+	lpfc_debug_dump_els_cq(phba);</div><div class='add'>+</div><div class='add'>+	for (fcp_wqidx = 0; fcp_wqidx &lt; phba-&gt;cfg_fcp_wq_count; fcp_wqidx++)</div><div class='add'>+		lpfc_debug_dump_fcp_cq(phba, fcp_wqidx);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Dump Event Queues (EQs)</div><div class='add'>+	 */</div><div class='add'>+	lpfc_debug_dump_sp_eq(phba);</div><div class='add'>+</div><div class='add'>+	for (fcp_wqidx = 0; fcp_wqidx &lt; phba-&gt;cfg_fcp_wq_count; fcp_wqidx++)</div><div class='add'>+		lpfc_debug_dump_fcp_eq(phba, fcp_wqidx);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_debugfs.h b/drivers/scsi/lpfc/lpfc_debugfs.h<br/>index f83bd944edd8..616c400dae14 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_debugfs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_debugfs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_debugfs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_debugfs.h</a></div><div class='hunk'>@@ -267,3 +267,421 @@ struct lpfc_idiag {</div><div class='ctx'> #define LPFC_DISC_TRC_DISCOVERY		0xef    /* common mask for general</div><div class='ctx'> 						 * discovery */</div><div class='ctx'> #endif /* H_LPFC_DEBUG_FS */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Driver debug utility routines outside of debugfs. The debug utility</div><div class='add'>+ * routines implemented here is intended to be used in the instrumented</div><div class='add'>+ * debug driver for debugging host or port issues.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_qe - dump an specific entry from a queue</div><div class='add'>+ * @q: Pointer to the queue descriptor.</div><div class='add'>+ * @idx: Index to the entry on the queue.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps an entry indexed by @idx from a queue specified by the</div><div class='add'>+ * queue descriptor @q.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_qe(struct lpfc_queue *q, uint32_t idx)</div><div class='add'>+{</div><div class='add'>+	char line_buf[LPFC_LBUF_SZ];</div><div class='add'>+	int i, esize, qe_word_cnt, len;</div><div class='add'>+	uint32_t *pword;</div><div class='add'>+</div><div class='add'>+	/* sanity checks */</div><div class='add'>+	if (!q)</div><div class='add'>+		return;</div><div class='add'>+	if (idx &gt;= q-&gt;entry_count)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	esize = q-&gt;entry_size;</div><div class='add'>+	qe_word_cnt = esize / sizeof(uint32_t);</div><div class='add'>+	pword = q-&gt;qe[idx].address;</div><div class='add'>+</div><div class='add'>+	len = 0;</div><div class='add'>+	len += snprintf(line_buf+len, LPFC_LBUF_SZ-len, "QE[%04d]: ", idx);</div><div class='add'>+	if (qe_word_cnt &gt; 8)</div><div class='add'>+		printk(KERN_ERR "%s\n", line_buf);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; qe_word_cnt; i++) {</div><div class='add'>+		if (!(i % 8)) {</div><div class='add'>+			if (i != 0)</div><div class='add'>+				printk(KERN_ERR "%s\n", line_buf);</div><div class='add'>+			if (qe_word_cnt &gt; 8) {</div><div class='add'>+				len = 0;</div><div class='add'>+				memset(line_buf, 0, LPFC_LBUF_SZ);</div><div class='add'>+				len += snprintf(line_buf+len, LPFC_LBUF_SZ-len,</div><div class='add'>+						"%03d: ", i);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		len += snprintf(line_buf+len, LPFC_LBUF_SZ-len, "%08x ",</div><div class='add'>+				((uint32_t)*pword) &amp; 0xffffffff);</div><div class='add'>+		pword++;</div><div class='add'>+	}</div><div class='add'>+	if (qe_word_cnt &lt;= 8 || (i - 1) % 8)</div><div class='add'>+		printk(KERN_ERR "%s\n", line_buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_q - dump all entries from an specific queue</div><div class='add'>+ * @q: Pointer to the queue descriptor.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from a queue specified by the queue</div><div class='add'>+ * descriptor @q.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_q(struct lpfc_queue *q)</div><div class='add'>+{</div><div class='add'>+	int idx, entry_count;</div><div class='add'>+</div><div class='add'>+	/* sanity check */</div><div class='add'>+	if (!q)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_printk(KERN_ERR, &amp;(((q-&gt;phba))-&gt;pcidev)-&gt;dev,</div><div class='add'>+		"%d: [qid:%d, type:%d, subtype:%d, "</div><div class='add'>+		"qe_size:%d, qe_count:%d, "</div><div class='add'>+		"host_index:%d, port_index:%d]\n",</div><div class='add'>+		(q-&gt;phba)-&gt;brd_no,</div><div class='add'>+		q-&gt;queue_id, q-&gt;type, q-&gt;subtype,</div><div class='add'>+		q-&gt;entry_size, q-&gt;entry_count,</div><div class='add'>+		q-&gt;host_index, q-&gt;hba_index);</div><div class='add'>+	entry_count = q-&gt;entry_count;</div><div class='add'>+	for (idx = 0; idx &lt; entry_count; idx++)</div><div class='add'>+		lpfc_debug_dump_qe(q, idx);</div><div class='add'>+	printk(KERN_ERR "\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_fcp_wq - dump all entries from a fcp work queue</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ * @fcp_wqidx: Index to a FCP work queue.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from a FCP work queue specified by the</div><div class='add'>+ * @fcp_wqidx.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_fcp_wq(struct lpfc_hba *phba, int fcp_wqidx)</div><div class='add'>+{</div><div class='add'>+	/* sanity check */</div><div class='add'>+	if (fcp_wqidx &gt;= phba-&gt;cfg_fcp_wq_count)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	printk(KERN_ERR "FCP WQ: WQ[Idx:%d|Qid:%d]\n",</div><div class='add'>+		fcp_wqidx, phba-&gt;sli4_hba.fcp_wq[fcp_wqidx]-&gt;queue_id);</div><div class='add'>+	lpfc_debug_dump_q(phba-&gt;sli4_hba.fcp_wq[fcp_wqidx]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_fcp_cq - dump all entries from a fcp work queue's cmpl queue</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ * @fcp_wqidx: Index to a FCP work queue.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from a FCP complete queue which is</div><div class='add'>+ * associated to the FCP work queue specified by the @fcp_wqidx.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_fcp_cq(struct lpfc_hba *phba, int fcp_wqidx)</div><div class='add'>+{</div><div class='add'>+	int fcp_cqidx, fcp_cqid;</div><div class='add'>+</div><div class='add'>+	/* sanity check */</div><div class='add'>+	if (fcp_wqidx &gt;= phba-&gt;cfg_fcp_wq_count)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fcp_cqid = phba-&gt;sli4_hba.fcp_wq[fcp_wqidx]-&gt;assoc_qid;</div><div class='add'>+	for (fcp_cqidx = 0; fcp_cqidx &lt; phba-&gt;cfg_fcp_eq_count; fcp_cqidx++)</div><div class='add'>+		if (phba-&gt;sli4_hba.fcp_cq[fcp_cqidx]-&gt;queue_id == fcp_cqid)</div><div class='add'>+			break;</div><div class='add'>+	if (fcp_cqidx &gt;= phba-&gt;cfg_fcp_eq_count)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	printk(KERN_ERR "FCP CQ: WQ[Idx:%d|Qid%d]-&gt;CQ[Idx%d|Qid%d]:\n",</div><div class='add'>+		fcp_wqidx, phba-&gt;sli4_hba.fcp_wq[fcp_wqidx]-&gt;queue_id,</div><div class='add'>+		fcp_cqidx, fcp_cqid);</div><div class='add'>+	lpfc_debug_dump_q(phba-&gt;sli4_hba.fcp_cq[fcp_cqidx]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_fcp_eq - dump all entries from a fcp work queue's evt queue</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ * @fcp_wqidx: Index to a FCP work queue.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from a FCP event queue which is</div><div class='add'>+ * associated to the FCP work queue specified by the @fcp_wqidx.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_fcp_eq(struct lpfc_hba *phba, int fcp_wqidx)</div><div class='add'>+{</div><div class='add'>+	struct lpfc_queue *qdesc;</div><div class='add'>+	int fcp_eqidx, fcp_eqid;</div><div class='add'>+	int fcp_cqidx, fcp_cqid;</div><div class='add'>+</div><div class='add'>+	/* sanity check */</div><div class='add'>+	if (fcp_wqidx &gt;= phba-&gt;cfg_fcp_wq_count)</div><div class='add'>+		return;</div><div class='add'>+	fcp_cqid = phba-&gt;sli4_hba.fcp_wq[fcp_wqidx]-&gt;assoc_qid;</div><div class='add'>+	for (fcp_cqidx = 0; fcp_cqidx &lt; phba-&gt;cfg_fcp_eq_count; fcp_cqidx++)</div><div class='add'>+		if (phba-&gt;sli4_hba.fcp_cq[fcp_cqidx]-&gt;queue_id == fcp_cqid)</div><div class='add'>+			break;</div><div class='add'>+	if (fcp_cqidx &gt;= phba-&gt;cfg_fcp_eq_count)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (phba-&gt;cfg_fcp_eq_count == 0) {</div><div class='add'>+		fcp_eqidx = -1;</div><div class='add'>+		fcp_eqid = phba-&gt;sli4_hba.sp_eq-&gt;queue_id;</div><div class='add'>+		qdesc = phba-&gt;sli4_hba.sp_eq;</div><div class='add'>+	} else {</div><div class='add'>+		fcp_eqidx = fcp_cqidx;</div><div class='add'>+		fcp_eqid = phba-&gt;sli4_hba.fp_eq[fcp_eqidx]-&gt;queue_id;</div><div class='add'>+		qdesc = phba-&gt;sli4_hba.fp_eq[fcp_eqidx];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	printk(KERN_ERR "FCP EQ: WQ[Idx:%d|Qid:%d]-&gt;CQ[Idx:%d|Qid:%d]-&gt;"</div><div class='add'>+		"EQ[Idx:%d|Qid:%d]\n",</div><div class='add'>+		fcp_wqidx, phba-&gt;sli4_hba.fcp_wq[fcp_wqidx]-&gt;queue_id,</div><div class='add'>+		fcp_cqidx, fcp_cqid, fcp_eqidx, fcp_eqid);</div><div class='add'>+	lpfc_debug_dump_q(qdesc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_els_wq - dump all entries from the els work queue</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from the ELS work queue.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_els_wq(struct lpfc_hba *phba)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_ERR "ELS WQ: WQ[Qid:%d]:\n",</div><div class='add'>+		phba-&gt;sli4_hba.els_wq-&gt;queue_id);</div><div class='add'>+	lpfc_debug_dump_q(phba-&gt;sli4_hba.els_wq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_mbx_wq - dump all entries from the mbox work queue</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from the MBOX work queue.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_mbx_wq(struct lpfc_hba *phba)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_ERR "MBX WQ: WQ[Qid:%d]\n",</div><div class='add'>+		phba-&gt;sli4_hba.mbx_wq-&gt;queue_id);</div><div class='add'>+	lpfc_debug_dump_q(phba-&gt;sli4_hba.mbx_wq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_dat_rq - dump all entries from the receive data queue</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from the receive data queue.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_dat_rq(struct lpfc_hba *phba)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_ERR "DAT RQ: RQ[Qid:%d]\n",</div><div class='add'>+		phba-&gt;sli4_hba.dat_rq-&gt;queue_id);</div><div class='add'>+	lpfc_debug_dump_q(phba-&gt;sli4_hba.dat_rq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_hdr_rq - dump all entries from the receive header queue</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from the receive header queue.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_hdr_rq(struct lpfc_hba *phba)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_ERR "HDR RQ: RQ[Qid:%d]\n",</div><div class='add'>+		phba-&gt;sli4_hba.hdr_rq-&gt;queue_id);</div><div class='add'>+	lpfc_debug_dump_q(phba-&gt;sli4_hba.hdr_rq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_els_cq - dump all entries from the els complete queue</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from the els complete queue.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_els_cq(struct lpfc_hba *phba)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_ERR "ELS CQ: WQ[Qid:%d]-&gt;CQ[Qid:%d]\n",</div><div class='add'>+		phba-&gt;sli4_hba.els_wq-&gt;queue_id,</div><div class='add'>+		phba-&gt;sli4_hba.els_cq-&gt;queue_id);</div><div class='add'>+	lpfc_debug_dump_q(phba-&gt;sli4_hba.els_cq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_mbx_cq - dump all entries from the mbox complete queue</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from the mbox complete queue.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_mbx_cq(struct lpfc_hba *phba)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_ERR "MBX CQ: WQ[Qid:%d]-&gt;CQ[Qid:%d]\n",</div><div class='add'>+		phba-&gt;sli4_hba.mbx_wq-&gt;queue_id,</div><div class='add'>+		phba-&gt;sli4_hba.mbx_cq-&gt;queue_id);</div><div class='add'>+	lpfc_debug_dump_q(phba-&gt;sli4_hba.mbx_cq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_sp_eq - dump all entries from slow-path event queue</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from the slow-path event queue.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_sp_eq(struct lpfc_hba *phba)</div><div class='add'>+{</div><div class='add'>+	printk(KERN_ERR "SP EQ: WQ[Qid:%d/Qid:%d]-&gt;CQ[Qid:%d/Qid:%d]-&gt;"</div><div class='add'>+		"EQ[Qid:%d]:\n",</div><div class='add'>+		phba-&gt;sli4_hba.mbx_wq-&gt;queue_id,</div><div class='add'>+		phba-&gt;sli4_hba.els_wq-&gt;queue_id,</div><div class='add'>+		phba-&gt;sli4_hba.mbx_cq-&gt;queue_id,</div><div class='add'>+		phba-&gt;sli4_hba.els_cq-&gt;queue_id,</div><div class='add'>+		phba-&gt;sli4_hba.sp_eq-&gt;queue_id);</div><div class='add'>+	lpfc_debug_dump_q(phba-&gt;sli4_hba.sp_eq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_wq_by_id - dump all entries from a work queue by queue id</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ * @qid: Work queue identifier.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from a work queue identified by the queue</div><div class='add'>+ * identifier.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_wq_by_id(struct lpfc_hba *phba, int qid)</div><div class='add'>+{</div><div class='add'>+	int wq_idx;</div><div class='add'>+</div><div class='add'>+	for (wq_idx = 0; wq_idx &lt; phba-&gt;cfg_fcp_wq_count; wq_idx++)</div><div class='add'>+		if (phba-&gt;sli4_hba.fcp_wq[wq_idx]-&gt;queue_id == qid)</div><div class='add'>+			break;</div><div class='add'>+	if (wq_idx &lt; phba-&gt;cfg_fcp_wq_count) {</div><div class='add'>+		printk(KERN_ERR "FCP WQ[Idx:%d|Qid:%d]\n", wq_idx, qid);</div><div class='add'>+		lpfc_debug_dump_q(phba-&gt;sli4_hba.fcp_wq[wq_idx]);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phba-&gt;sli4_hba.els_wq-&gt;queue_id == qid) {</div><div class='add'>+		printk(KERN_ERR "ELS WQ[Qid:%d]\n", qid);</div><div class='add'>+		lpfc_debug_dump_q(phba-&gt;sli4_hba.els_wq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_mq_by_id - dump all entries from a mbox queue by queue id</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ * @qid: Mbox work queue identifier.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from a mbox work queue identified by the</div><div class='add'>+ * queue identifier.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_mq_by_id(struct lpfc_hba *phba, int qid)</div><div class='add'>+{</div><div class='add'>+	if (phba-&gt;sli4_hba.mbx_wq-&gt;queue_id == qid) {</div><div class='add'>+		printk(KERN_ERR "MBX WQ[Qid:%d]\n", qid);</div><div class='add'>+		lpfc_debug_dump_q(phba-&gt;sli4_hba.mbx_wq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_rq_by_id - dump all entries from a receive queue by queue id</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ * @qid: Receive queue identifier.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from a receive queue identified by the</div><div class='add'>+ * queue identifier.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_rq_by_id(struct lpfc_hba *phba, int qid)</div><div class='add'>+{</div><div class='add'>+	if (phba-&gt;sli4_hba.hdr_rq-&gt;queue_id == qid) {</div><div class='add'>+		printk(KERN_ERR "HDR RQ[Qid:%d]\n", qid);</div><div class='add'>+		lpfc_debug_dump_q(phba-&gt;sli4_hba.hdr_rq);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (phba-&gt;sli4_hba.dat_rq-&gt;queue_id == qid) {</div><div class='add'>+		printk(KERN_ERR "DAT RQ[Qid:%d]\n", qid);</div><div class='add'>+		lpfc_debug_dump_q(phba-&gt;sli4_hba.dat_rq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_cq_by_id - dump all entries from a cmpl queue by queue id</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ * @qid: Complete queue identifier.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from a complete queue identified by the</div><div class='add'>+ * queue identifier.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_cq_by_id(struct lpfc_hba *phba, int qid)</div><div class='add'>+{</div><div class='add'>+	int cq_idx = 0;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		if (phba-&gt;sli4_hba.fcp_cq[cq_idx]-&gt;queue_id == qid)</div><div class='add'>+			break;</div><div class='add'>+	} while (++cq_idx &lt; phba-&gt;cfg_fcp_eq_count);</div><div class='add'>+</div><div class='add'>+	if (cq_idx &lt; phba-&gt;cfg_fcp_eq_count) {</div><div class='add'>+		printk(KERN_ERR "FCP CQ[Idx:%d|Qid:%d]\n", cq_idx, qid);</div><div class='add'>+		lpfc_debug_dump_q(phba-&gt;sli4_hba.fcp_cq[cq_idx]);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phba-&gt;sli4_hba.els_cq-&gt;queue_id == qid) {</div><div class='add'>+		printk(KERN_ERR "ELS CQ[Qid:%d]\n", qid);</div><div class='add'>+		lpfc_debug_dump_q(phba-&gt;sli4_hba.els_cq);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phba-&gt;sli4_hba.mbx_cq-&gt;queue_id == qid) {</div><div class='add'>+		printk(KERN_ERR "MBX CQ[Qid:%d]\n", qid);</div><div class='add'>+		lpfc_debug_dump_q(phba-&gt;sli4_hba.mbx_cq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_debug_dump_eq_by_id - dump all entries from an event queue by queue id</div><div class='add'>+ * @phba: Pointer to HBA context object.</div><div class='add'>+ * @qid: Complete queue identifier.</div><div class='add'>+ *</div><div class='add'>+ * This function dumps all entries from an event queue identified by the</div><div class='add'>+ * queue identifier.</div><div class='add'>+ **/</div><div class='add'>+static inline void</div><div class='add'>+lpfc_debug_dump_eq_by_id(struct lpfc_hba *phba, int qid)</div><div class='add'>+{</div><div class='add'>+	int eq_idx;</div><div class='add'>+</div><div class='add'>+	for (eq_idx = 0; eq_idx &lt; phba-&gt;cfg_fcp_eq_count; eq_idx++) {</div><div class='add'>+		if (phba-&gt;sli4_hba.fp_eq[eq_idx]-&gt;queue_id == qid)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (eq_idx &lt; phba-&gt;cfg_fcp_eq_count) {</div><div class='add'>+		printk(KERN_ERR "FCP EQ[Idx:%d|Qid:%d]\n", eq_idx, qid);</div><div class='add'>+		lpfc_debug_dump_q(phba-&gt;sli4_hba.fp_eq[eq_idx]);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phba-&gt;sli4_hba.sp_eq-&gt;queue_id == qid) {</div><div class='add'>+		printk(KERN_ERR "SP EQ[|Qid:%d]\n", qid);</div><div class='add'>+		lpfc_debug_dump_q(phba-&gt;sli4_hba.sp_eq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void lpfc_debug_dump_all_queues(struct lpfc_hba *);</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_els.c b/drivers/scsi/lpfc/lpfc_els.c<br/>index 3407b39e0a3f..d54ae1999797 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_els.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_els.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_els.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_els.c</a></div><div class='hunk'>@@ -230,27 +230,43 @@ lpfc_prep_els_iocb(struct lpfc_vport *vport, uint8_t expectRsp,</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;pbuflist-&gt;list);</div><div class='ctx'> </div><div class='del'>-	icmd-&gt;un.elsreq64.bdl.addrHigh = putPaddrHigh(pbuflist-&gt;phys);</div><div class='del'>-	icmd-&gt;un.elsreq64.bdl.addrLow = putPaddrLow(pbuflist-&gt;phys);</div><div class='del'>-	icmd-&gt;un.elsreq64.bdl.bdeFlags = BUFF_TYPE_BLP_64;</div><div class='del'>-	icmd-&gt;un.elsreq64.remoteID = did;	/* DID */</div><div class='ctx'> 	if (expectRsp) {</div><div class='add'>+		icmd-&gt;un.elsreq64.bdl.addrHigh = putPaddrHigh(pbuflist-&gt;phys);</div><div class='add'>+		icmd-&gt;un.elsreq64.bdl.addrLow = putPaddrLow(pbuflist-&gt;phys);</div><div class='add'>+		icmd-&gt;un.elsreq64.bdl.bdeFlags = BUFF_TYPE_BLP_64;</div><div class='ctx'> 		icmd-&gt;un.elsreq64.bdl.bdeSize = (2 * sizeof(struct ulp_bde64));</div><div class='add'>+</div><div class='add'>+		icmd-&gt;un.elsreq64.remoteID = did;		/* DID */</div><div class='ctx'> 		icmd-&gt;ulpCommand = CMD_ELS_REQUEST64_CR;</div><div class='ctx'> 		icmd-&gt;ulpTimeout = phba-&gt;fc_ratov * 2;</div><div class='ctx'> 	} else {</div><div class='del'>-		icmd-&gt;un.elsreq64.bdl.bdeSize = sizeof(struct ulp_bde64);</div><div class='add'>+		icmd-&gt;un.xseq64.bdl.addrHigh = putPaddrHigh(pbuflist-&gt;phys);</div><div class='add'>+		icmd-&gt;un.xseq64.bdl.addrLow = putPaddrLow(pbuflist-&gt;phys);</div><div class='add'>+		icmd-&gt;un.xseq64.bdl.bdeFlags = BUFF_TYPE_BLP_64;</div><div class='add'>+		icmd-&gt;un.xseq64.bdl.bdeSize = sizeof(struct ulp_bde64);</div><div class='add'>+		icmd-&gt;un.xseq64.xmit_els_remoteID = did;	/* DID */</div><div class='ctx'> 		icmd-&gt;ulpCommand = CMD_XMIT_ELS_RSP64_CX;</div><div class='ctx'> 	}</div><div class='ctx'> 	icmd-&gt;ulpBdeCount = 1;</div><div class='ctx'> 	icmd-&gt;ulpLe = 1;</div><div class='ctx'> 	icmd-&gt;ulpClass = CLASS3;</div><div class='ctx'> </div><div class='del'>-	if (phba-&gt;sli3_options &amp; LPFC_SLI3_NPIV_ENABLED) {</div><div class='del'>-		icmd-&gt;un.elsreq64.myID = vport-&gt;fc_myDID;</div><div class='add'>+	/*</div><div class='add'>+	 * If we have NPIV enabled, we want to send ELS traffic by VPI.</div><div class='add'>+	 * For SLI4, since the driver controls VPIs we also want to include</div><div class='add'>+	 * all ELS pt2pt protocol traffic as well.</div><div class='add'>+	 */</div><div class='add'>+	if ((phba-&gt;sli3_options &amp; LPFC_SLI3_NPIV_ENABLED) ||</div><div class='add'>+		((phba-&gt;sli_rev == LPFC_SLI_REV4) &amp;&amp;</div><div class='add'>+		    (vport-&gt;fc_flag &amp; FC_PT2PT))) {</div><div class='add'>+</div><div class='add'>+		if (expectRsp) {</div><div class='add'>+			icmd-&gt;un.elsreq64.myID = vport-&gt;fc_myDID;</div><div class='add'>+</div><div class='add'>+			/* For ELS_REQUEST64_CR, use the VPI by default */</div><div class='add'>+			icmd-&gt;ulpContext = phba-&gt;vpi_ids[vport-&gt;vpi];</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		/* For ELS_REQUEST64_CR, use the VPI by default */</div><div class='del'>-		icmd-&gt;ulpContext = phba-&gt;vpi_ids[vport-&gt;vpi];</div><div class='ctx'> 		icmd-&gt;ulpCt_h = 0;</div><div class='ctx'> 		/* The CT field must be 0=INVALID_RPI for the ECHO cmd */</div><div class='ctx'> 		if (elscmd == ELS_CMD_ECHO)</div><div class='hunk'>@@ -438,9 +454,10 @@ lpfc_issue_reg_vfi(struct lpfc_vport *vport)</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='ctx'> 	sp = &amp;phba-&gt;fc_fabparam;</div><div class='del'>-	/* move forward in case of SLI4 FC port loopback test */</div><div class='add'>+	/* move forward in case of SLI4 FC port loopback test and pt2pt mode */</div><div class='ctx'> 	if ((phba-&gt;sli_rev == LPFC_SLI_REV4) &amp;&amp;</div><div class='del'>-	    !(phba-&gt;link_flag &amp; LS_LOOPBACK_MODE)) {</div><div class='add'>+	    !(phba-&gt;link_flag &amp; LS_LOOPBACK_MODE) &amp;&amp;</div><div class='add'>+	    !(vport-&gt;fc_flag &amp; FC_PT2PT)) {</div><div class='ctx'> 		ndlp = lpfc_findnode_did(vport, Fabric_DID);</div><div class='ctx'> 		if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) {</div><div class='ctx'> 			rc = -ENODEV;</div><div class='hunk'>@@ -707,14 +724,17 @@ lpfc_cmpl_els_flogi_fabric(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,</div><div class='ctx'> 			lpfc_sli4_unreg_all_rpis(vport);</div><div class='ctx'> 			lpfc_mbx_unreg_vpi(vport);</div><div class='ctx'> 			spin_lock_irq(shost-&gt;host_lock);</div><div class='del'>-			vport-&gt;fc_flag |= FC_VPORT_NEEDS_REG_VPI;</div><div class='del'>-			/*</div><div class='del'>-			* If VPI is unreged, driver need to do INIT_VPI</div><div class='del'>-			* before re-registering</div><div class='del'>-			*/</div><div class='ctx'> 			vport-&gt;fc_flag |= FC_VPORT_NEEDS_INIT_VPI;</div><div class='ctx'> 			spin_unlock_irq(shost-&gt;host_lock);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * For SLI3 and SLI4, the VPI needs to be reregistered in</div><div class='add'>+		 * response to this fabric parameter change event.</div><div class='add'>+		 */</div><div class='add'>+		spin_lock_irq(shost-&gt;host_lock);</div><div class='add'>+		vport-&gt;fc_flag |= FC_VPORT_NEEDS_REG_VPI;</div><div class='add'>+		spin_unlock_irq(shost-&gt;host_lock);</div><div class='ctx'> 	} else if ((phba-&gt;sli_rev == LPFC_SLI_REV4) &amp;&amp;</div><div class='ctx'> 		!(vport-&gt;fc_flag &amp; FC_VPORT_NEEDS_REG_VPI)) {</div><div class='ctx'> 			/*</div><div class='hunk'>@@ -817,6 +837,17 @@ lpfc_cmpl_els_flogi_nport(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,</div><div class='ctx'> 			mempool_free(mbox, phba-&gt;mbox_mem_pool);</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * For SLI4, the VFI/VPI are registered AFTER the</div><div class='add'>+		 * Nport with the higher WWPN sends the PLOGI with</div><div class='add'>+		 * an assigned NPortId.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* not equal */</div><div class='add'>+		if ((phba-&gt;sli_rev == LPFC_SLI_REV4) &amp;&amp; rc)</div><div class='add'>+			lpfc_issue_reg_vfi(vport);</div><div class='add'>+</div><div class='ctx'> 		/* Decrement ndlp reference count indicating that ndlp can be</div><div class='ctx'> 		 * safely released when other references to it are done.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -2972,7 +3003,7 @@ lpfc_els_retry(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,</div><div class='ctx'> 			 * ABTS we cannot generate and RRQ.</div><div class='ctx'> 			 */</div><div class='ctx'> 			lpfc_set_rrq_active(phba, ndlp,</div><div class='del'>-					 cmdiocb-&gt;sli4_xritag, 0, 0);</div><div class='add'>+					 cmdiocb-&gt;sli4_lxritag, 0, 0);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IOSTAT_LOCAL_REJECT:</div><div class='hunk'>@@ -3803,10 +3834,11 @@ lpfc_els_rsp_acc(struct lpfc_vport *vport, uint32_t flag,</div><div class='ctx'> 	/* Xmit ELS ACC response tag &lt;ulpIoTag&gt; */</div><div class='ctx'> 	lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,</div><div class='ctx'> 			 "0128 Xmit ELS ACC response tag x%x, XRI: x%x, "</div><div class='del'>-			 "DID: x%x, nlp_flag: x%x nlp_state: x%x RPI: x%x\n",</div><div class='add'>+			 "DID: x%x, nlp_flag: x%x nlp_state: x%x RPI: x%x "</div><div class='add'>+			 "fc_flag x%x\n",</div><div class='ctx'> 			 elsiocb-&gt;iotag, elsiocb-&gt;iocb.ulpContext,</div><div class='ctx'> 			 ndlp-&gt;nlp_DID, ndlp-&gt;nlp_flag, ndlp-&gt;nlp_state,</div><div class='del'>-			 ndlp-&gt;nlp_rpi);</div><div class='add'>+			 ndlp-&gt;nlp_rpi, vport-&gt;fc_flag);</div><div class='ctx'> 	if (ndlp-&gt;nlp_flag &amp; NLP_LOGO_ACC) {</div><div class='ctx'> 		spin_lock_irq(shost-&gt;host_lock);</div><div class='ctx'> 		ndlp-&gt;nlp_flag &amp;= ~NLP_LOGO_ACC;</div><div class='hunk'>@@ -4936,8 +4968,6 @@ lpfc_els_rcv_flogi(struct lpfc_vport *vport, struct lpfc_iocbq *cmdiocb,</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	did = Fabric_DID;</div><div class='del'>-</div><div class='ctx'> 	if ((lpfc_check_sparm(vport, ndlp, sp, CLASS3, 1))) {</div><div class='ctx'> 		/* For a FLOGI we accept, then if our portname is greater</div><div class='ctx'> 		 * then the remote portname we initiate Nport login.</div><div class='hunk'>@@ -4976,26 +5006,82 @@ lpfc_els_rcv_flogi(struct lpfc_vport *vport, struct lpfc_iocbq *cmdiocb,</div><div class='ctx'> 			spin_lock_irq(shost-&gt;host_lock);</div><div class='ctx'> 			vport-&gt;fc_flag |= FC_PT2PT_PLOGI;</div><div class='ctx'> 			spin_unlock_irq(shost-&gt;host_lock);</div><div class='add'>+</div><div class='add'>+			/* If we have the high WWPN we can assign our own</div><div class='add'>+			 * myDID; otherwise, we have to WAIT for a PLOGI</div><div class='add'>+			 * from the remote NPort to find out what it</div><div class='add'>+			 * will be.</div><div class='add'>+			 */</div><div class='add'>+			vport-&gt;fc_myDID = PT2PT_LocalID;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The vport state should go to LPFC_FLOGI only</div><div class='add'>+		 * AFTER we issue a FLOGI, not receive one.</div><div class='add'>+		 */</div><div class='ctx'> 		spin_lock_irq(shost-&gt;host_lock);</div><div class='ctx'> 		vport-&gt;fc_flag |= FC_PT2PT;</div><div class='ctx'> 		vport-&gt;fc_flag &amp;= ~(FC_FABRIC | FC_PUBLIC_LOOP);</div><div class='ctx'> 		spin_unlock_irq(shost-&gt;host_lock);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We temporarily set fc_myDID to make it look like we are</div><div class='add'>+		 * a Fabric. This is done just so we end up with the right</div><div class='add'>+		 * did / sid on the FLOGI ACC rsp.</div><div class='add'>+		 */</div><div class='add'>+		did = vport-&gt;fc_myDID;</div><div class='add'>+		vport-&gt;fc_myDID = Fabric_DID;</div><div class='add'>+</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Reject this request because invalid parameters */</div><div class='ctx'> 		stat.un.b.lsRjtRsvd0 = 0;</div><div class='ctx'> 		stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;</div><div class='ctx'> 		stat.un.b.lsRjtRsnCodeExp = LSEXP_SPARM_OPTIONS;</div><div class='ctx'> 		stat.un.b.vendorUnique = 0;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We temporarily set fc_myDID to make it look like we are</div><div class='add'>+		 * a Fabric. This is done just so we end up with the right</div><div class='add'>+		 * did / sid on the FLOGI LS_RJT rsp.</div><div class='add'>+		 */</div><div class='add'>+		did = vport-&gt;fc_myDID;</div><div class='add'>+		vport-&gt;fc_myDID = Fabric_DID;</div><div class='add'>+</div><div class='ctx'> 		lpfc_els_rsp_reject(vport, stat.un.lsRjtError, cmdiocb, ndlp,</div><div class='ctx'> 			NULL);</div><div class='add'>+</div><div class='add'>+		/* Now lets put fc_myDID back to what its supposed to be */</div><div class='add'>+		vport-&gt;fc_myDID = did;</div><div class='add'>+</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Send back ACC */</div><div class='ctx'> 	lpfc_els_rsp_acc(vport, ELS_CMD_PLOGI, cmdiocb, ndlp, NULL);</div><div class='ctx'> </div><div class='add'>+	/* Now lets put fc_myDID back to what its supposed to be */</div><div class='add'>+	vport-&gt;fc_myDID = did;</div><div class='add'>+</div><div class='add'>+	if (!(vport-&gt;fc_flag &amp; FC_PT2PT_PLOGI)) {</div><div class='add'>+</div><div class='add'>+		mbox = mempool_alloc(phba-&gt;mbox_mem_pool, GFP_KERNEL);</div><div class='add'>+		if (!mbox)</div><div class='add'>+			goto fail;</div><div class='add'>+</div><div class='add'>+		lpfc_config_link(phba, mbox);</div><div class='add'>+</div><div class='add'>+		mbox-&gt;mbox_cmpl = lpfc_sli_def_mbox_cmpl;</div><div class='add'>+		mbox-&gt;vport = vport;</div><div class='add'>+		rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);</div><div class='add'>+		if (rc == MBX_NOT_FINISHED) {</div><div class='add'>+			mempool_free(mbox, phba-&gt;mbox_mem_pool);</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='add'>+fail:</div><div class='add'>+	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -5176,7 +5262,6 @@ lpfc_els_rsp_rls_acc(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cmdsize = sizeof(struct RLS_RSP) + sizeof(uint32_t);</div><div class='del'>-	mempool_free(pmb, phba-&gt;mbox_mem_pool);</div><div class='ctx'> 	elsiocb = lpfc_prep_els_iocb(phba-&gt;pport, 0, cmdsize,</div><div class='ctx'> 				     lpfc_max_els_tries, ndlp,</div><div class='ctx'> 				     ndlp-&gt;nlp_DID, ELS_CMD_ACC);</div><div class='hunk'>@@ -5184,8 +5269,10 @@ lpfc_els_rsp_rls_acc(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)</div><div class='ctx'> 	/* Decrement the ndlp reference count from previous mbox command */</div><div class='ctx'> 	lpfc_nlp_put(ndlp);</div><div class='ctx'> </div><div class='del'>-	if (!elsiocb)</div><div class='add'>+	if (!elsiocb) {</div><div class='add'>+		mempool_free(pmb, phba-&gt;mbox_mem_pool);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	icmd = &amp;elsiocb-&gt;iocb;</div><div class='ctx'> 	icmd-&gt;ulpContext = rxid;</div><div class='hunk'>@@ -5202,7 +5289,7 @@ lpfc_els_rsp_rls_acc(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)</div><div class='ctx'> 	rls_rsp-&gt;primSeqErrCnt = cpu_to_be32(mb-&gt;un.varRdLnk.primSeqErrCnt);</div><div class='ctx'> 	rls_rsp-&gt;invalidXmitWord = cpu_to_be32(mb-&gt;un.varRdLnk.invalidXmitWord);</div><div class='ctx'> 	rls_rsp-&gt;crcCnt = cpu_to_be32(mb-&gt;un.varRdLnk.crcCnt);</div><div class='del'>-</div><div class='add'>+	mempool_free(pmb, phba-&gt;mbox_mem_pool);</div><div class='ctx'> 	/* Xmit ELS RLS ACC response tag &lt;ulpIoTag&gt; */</div><div class='ctx'> 	lpfc_printf_vlog(ndlp-&gt;vport, KERN_INFO, LOG_ELS,</div><div class='ctx'> 			 "2874 Xmit ELS RLS ACC response tag x%x xri x%x, "</div><div class='hunk'>@@ -5586,7 +5673,7 @@ lpfc_issue_els_rrq(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,</div><div class='ctx'> 	pcmd += sizeof(uint32_t);</div><div class='ctx'> 	els_rrq = (struct RRQ *) pcmd;</div><div class='ctx'> </div><div class='del'>-	bf_set(rrq_oxid, els_rrq, rrq-&gt;xritag);</div><div class='add'>+	bf_set(rrq_oxid, els_rrq, phba-&gt;sli4_hba.xri_ids[rrq-&gt;xritag]);</div><div class='ctx'> 	bf_set(rrq_rxid, els_rrq, rrq-&gt;rxid);</div><div class='ctx'> 	bf_set(rrq_did, els_rrq, vport-&gt;fc_myDID);</div><div class='ctx'> 	els_rrq-&gt;rrq = cpu_to_be32(els_rrq-&gt;rrq);</div><div class='hunk'>@@ -7873,7 +7960,9 @@ lpfc_sli4_els_xri_aborted(struct lpfc_hba *phba,</div><div class='ctx'> 			sglq_entry-&gt;state = SGL_FREED;</div><div class='ctx'> 			spin_unlock(&amp;phba-&gt;sli4_hba.abts_sgl_list_lock);</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;phba-&gt;hbalock, iflag);</div><div class='del'>-			lpfc_set_rrq_active(phba, ndlp, xri, rxid, 1);</div><div class='add'>+			lpfc_set_rrq_active(phba, ndlp,</div><div class='add'>+				sglq_entry-&gt;sli4_lxritag,</div><div class='add'>+				rxid, 1);</div><div class='ctx'> </div><div class='ctx'> 			/* Check if TXQ queue needs to be serviced */</div><div class='ctx'> 			if (pring-&gt;txq_cnt)</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_hbadisc.c b/drivers/scsi/lpfc/lpfc_hbadisc.c<br/>index b507536dc5b5..5bb269e224f6 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_hbadisc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_hbadisc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_hbadisc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_hbadisc.c</a></div><div class='hunk'>@@ -713,6 +713,7 @@ lpfc_do_work(void *p)</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	set_user_nice(current, -20);</div><div class='add'>+	current-&gt;flags |= PF_NOFREEZE;</div><div class='ctx'> 	phba-&gt;data_flags = 0;</div><div class='ctx'> </div><div class='ctx'> 	while (!kthread_should_stop()) {</div><div class='hunk'>@@ -1094,7 +1095,7 @@ lpfc_mbx_cmpl_local_config_link(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)</div><div class='ctx'> 	/* Start discovery by sending a FLOGI. port_state is identically</div><div class='ctx'> 	 * LPFC_FLOGI while waiting for FLOGI cmpl</div><div class='ctx'> 	 */</div><div class='del'>-	if (vport-&gt;port_state != LPFC_FLOGI)</div><div class='add'>+	if (vport-&gt;port_state != LPFC_FLOGI || vport-&gt;fc_flag &amp; FC_PT2PT_PLOGI)</div><div class='ctx'> 		lpfc_initial_flogi(vport);</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='hunk'>@@ -2881,9 +2882,14 @@ lpfc_mbx_cmpl_reg_vfi(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vport-&gt;port_state == LPFC_FABRIC_CFG_LINK) {</div><div class='del'>-		/* For private loop just start discovery and we are done. */</div><div class='del'>-		if ((phba-&gt;fc_topology == LPFC_TOPOLOGY_LOOP) &amp;&amp;</div><div class='del'>-		    !(vport-&gt;fc_flag &amp; FC_PUBLIC_LOOP)) {</div><div class='add'>+		/*</div><div class='add'>+		 * For private loop or for NPort pt2pt,</div><div class='add'>+		 * just start discovery and we are done.</div><div class='add'>+		 */</div><div class='add'>+		if ((vport-&gt;fc_flag &amp; FC_PT2PT) ||</div><div class='add'>+		    ((phba-&gt;fc_topology == LPFC_TOPOLOGY_LOOP) &amp;&amp;</div><div class='add'>+		    !(vport-&gt;fc_flag &amp; FC_PUBLIC_LOOP))) {</div><div class='add'>+</div><div class='ctx'> 			/* Use loop map to make discovery list */</div><div class='ctx'> 			lpfc_disc_list_loopmap(vport);</div><div class='ctx'> 			/* Start discovery */</div><div class='hunk'>@@ -5490,9 +5496,9 @@ lpfc_nlp_release(struct kref *kref)</div><div class='ctx'> 		ndlp-&gt;nlp_DID, ndlp-&gt;nlp_flag, ndlp-&gt;nlp_type);</div><div class='ctx'> </div><div class='ctx'> 	lpfc_printf_vlog(ndlp-&gt;vport, KERN_INFO, LOG_NODE,</div><div class='del'>-			"0279 lpfc_nlp_release: ndlp:x%p "</div><div class='add'>+			"0279 lpfc_nlp_release: ndlp:x%p did %x "</div><div class='ctx'> 			"usgmap:x%x refcnt:%d\n",</div><div class='del'>-			(void *)ndlp, ndlp-&gt;nlp_usg_map,</div><div class='add'>+			(void *)ndlp, ndlp-&gt;nlp_DID, ndlp-&gt;nlp_usg_map,</div><div class='ctx'> 			atomic_read(&amp;ndlp-&gt;kref.refcount));</div><div class='ctx'> </div><div class='ctx'> 	/* remove ndlp from action. */</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_hw.h b/drivers/scsi/lpfc/lpfc_hw.h<br/>index 5f280b5ae3db..41bb1d2fb625 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_hw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_hw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_hw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_hw.h</a></div><div class='hunk'>@@ -3374,6 +3374,9 @@ typedef struct {</div><div class='ctx'> 	WORD5 w5;		/* Header control/status word */</div><div class='ctx'> } XMT_SEQ_FIELDS64;</div><div class='ctx'> </div><div class='add'>+/* This word is remote ports D_ID for XMIT_ELS_RSP64 */</div><div class='add'>+#define xmit_els_remoteID xrsqRo</div><div class='add'>+</div><div class='ctx'> /* IOCB Command template for 64 bit RCV_SEQUENCE64 */</div><div class='ctx'> typedef struct {</div><div class='ctx'> 	struct ulp_bde64 rcvBde;</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_hw4.h b/drivers/scsi/lpfc/lpfc_hw4.h<br/>index 91f09761bd32..f1946dfda5b4 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_hw4.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_hw4.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_hw4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_hw4.h</a></div><div class='hunk'>@@ -228,19 +228,15 @@ struct lpfc_sli4_flags {</div><div class='ctx'> #define lpfc_idx_rsrc_rdy_MASK		0x00000001</div><div class='ctx'> #define lpfc_idx_rsrc_rdy_WORD		word0</div><div class='ctx'> #define LPFC_IDX_RSRC_RDY		1</div><div class='del'>-#define lpfc_xri_rsrc_rdy_SHIFT		1</div><div class='del'>-#define lpfc_xri_rsrc_rdy_MASK		0x00000001</div><div class='del'>-#define lpfc_xri_rsrc_rdy_WORD		word0</div><div class='del'>-#define LPFC_XRI_RSRC_RDY		1</div><div class='del'>-#define lpfc_rpi_rsrc_rdy_SHIFT		2</div><div class='add'>+#define lpfc_rpi_rsrc_rdy_SHIFT		1</div><div class='ctx'> #define lpfc_rpi_rsrc_rdy_MASK		0x00000001</div><div class='ctx'> #define lpfc_rpi_rsrc_rdy_WORD		word0</div><div class='ctx'> #define LPFC_RPI_RSRC_RDY		1</div><div class='del'>-#define lpfc_vpi_rsrc_rdy_SHIFT		3</div><div class='add'>+#define lpfc_vpi_rsrc_rdy_SHIFT		2</div><div class='ctx'> #define lpfc_vpi_rsrc_rdy_MASK		0x00000001</div><div class='ctx'> #define lpfc_vpi_rsrc_rdy_WORD		word0</div><div class='ctx'> #define LPFC_VPI_RSRC_RDY		1</div><div class='del'>-#define lpfc_vfi_rsrc_rdy_SHIFT		4</div><div class='add'>+#define lpfc_vfi_rsrc_rdy_SHIFT		3</div><div class='ctx'> #define lpfc_vfi_rsrc_rdy_MASK		0x00000001</div><div class='ctx'> #define lpfc_vfi_rsrc_rdy_WORD		word0</div><div class='ctx'> #define LPFC_VFI_RSRC_RDY		1</div><div class='hunk'>@@ -3299,7 +3295,13 @@ struct els_request64_wqe {</div><div class='ctx'> struct xmit_els_rsp64_wqe {</div><div class='ctx'> 	struct ulp_bde64 bde;</div><div class='ctx'> 	uint32_t response_payload_len;</div><div class='del'>-	uint32_t rsvd4;</div><div class='add'>+	uint32_t word4;</div><div class='add'>+#define els_rsp64_sid_SHIFT         0</div><div class='add'>+#define els_rsp64_sid_MASK          0x00FFFFFF</div><div class='add'>+#define els_rsp64_sid_WORD          word4</div><div class='add'>+#define els_rsp64_sp_SHIFT          24</div><div class='add'>+#define els_rsp64_sp_MASK           0x00000001</div><div class='add'>+#define els_rsp64_sp_WORD           word4</div><div class='ctx'> 	struct wqe_did wqe_dest;</div><div class='ctx'> 	struct wqe_common wqe_com; /* words 6-11 */</div><div class='ctx'> 	uint32_t word12;</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c<br/>index 9598fdcb08ab..411ed48d79da 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_init.c</a></div><div class='hunk'>@@ -64,8 +64,8 @@ static int lpfc_sli4_queue_verify(struct lpfc_hba *);</div><div class='ctx'> static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);</div><div class='ctx'> static int lpfc_setup_endian_order(struct lpfc_hba *);</div><div class='ctx'> static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);</div><div class='del'>-static void lpfc_free_sgl_list(struct lpfc_hba *);</div><div class='del'>-static int lpfc_init_sgl_list(struct lpfc_hba *);</div><div class='add'>+static void lpfc_free_els_sgl_list(struct lpfc_hba *);</div><div class='add'>+static void lpfc_init_sgl_list(struct lpfc_hba *);</div><div class='ctx'> static int lpfc_init_active_sgl_array(struct lpfc_hba *);</div><div class='ctx'> static void lpfc_free_active_sgl(struct lpfc_hba *);</div><div class='ctx'> static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);</div><div class='hunk'>@@ -2767,47 +2767,14 @@ lpfc_offline(struct lpfc_hba *phba)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * lpfc_scsi_buf_update - Update the scsi_buffers that are already allocated.</div><div class='del'>- * @phba: pointer to lpfc hba data structure.</div><div class='del'>- *</div><div class='del'>- * This routine goes through all the scsi buffers in the system and updates the</div><div class='del'>- * Physical XRIs assigned to the SCSI buffer because these may change after any</div><div class='del'>- * firmware reset</div><div class='del'>- *</div><div class='del'>- * Return codes</div><div class='del'>- *   0 - successful (for now, it always returns 0)</div><div class='del'>- **/</div><div class='del'>-int</div><div class='del'>-lpfc_scsi_buf_update(struct lpfc_hba *phba)</div><div class='del'>-{</div><div class='del'>-	struct lpfc_scsi_buf *sb, *sb_next;</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;phba-&gt;hbalock);</div><div class='del'>-	spin_lock(&amp;phba-&gt;scsi_buf_list_lock);</div><div class='del'>-	list_for_each_entry_safe(sb, sb_next, &amp;phba-&gt;lpfc_scsi_buf_list, list) {</div><div class='del'>-		sb-&gt;cur_iocbq.sli4_xritag =</div><div class='del'>-			phba-&gt;sli4_hba.xri_ids[sb-&gt;cur_iocbq.sli4_lxritag];</div><div class='del'>-		set_bit(sb-&gt;cur_iocbq.sli4_lxritag, phba-&gt;sli4_hba.xri_bmask);</div><div class='del'>-		phba-&gt;sli4_hba.max_cfg_param.xri_used++;</div><div class='del'>-		phba-&gt;sli4_hba.xri_count++;</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;phba-&gt;scsi_buf_list_lock);</div><div class='del'>-	spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists</div><div class='ctx'>  * @phba: pointer to lpfc hba data structure.</div><div class='ctx'>  *</div><div class='ctx'>  * This routine is to free all the SCSI buffers and IOCBs from the driver</div><div class='ctx'>  * list back to kernel. It is called from lpfc_pci_remove_one to free</div><div class='ctx'>  * the internal resources before the device is removed from the system.</div><div class='del'>- *</div><div class='del'>- * Return codes</div><div class='del'>- *   0 - successful (for now, it always returns 0)</div><div class='ctx'>  **/</div><div class='del'>-static int</div><div class='add'>+static void</div><div class='ctx'> lpfc_scsi_free(struct lpfc_hba *phba)</div><div class='ctx'> {</div><div class='ctx'> 	struct lpfc_scsi_buf *sb, *sb_next;</div><div class='hunk'>@@ -2833,7 +2800,178 @@ lpfc_scsi_free(struct lpfc_hba *phba)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_sli4_xri_sgl_update - update xri-sgl sizing and mapping</div><div class='add'>+ * @phba: pointer to lpfc hba data structure.</div><div class='add'>+ *</div><div class='add'>+ * This routine first calculates the sizes of the current els and allocated</div><div class='add'>+ * scsi sgl lists, and then goes through all sgls to updates the physical</div><div class='add'>+ * XRIs assigned due to port function reset. During port initialization, the</div><div class='add'>+ * current els and allocated scsi sgl lists are 0s.</div><div class='add'>+ *</div><div class='add'>+ * Return codes</div><div class='add'>+ *   0 - successful (for now, it always returns 0)</div><div class='add'>+ **/</div><div class='add'>+int</div><div class='add'>+lpfc_sli4_xri_sgl_update(struct lpfc_hba *phba)</div><div class='add'>+{</div><div class='add'>+	struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;</div><div class='add'>+	struct lpfc_scsi_buf *psb = NULL, *psb_next = NULL;</div><div class='add'>+	uint16_t i, lxri, xri_cnt, els_xri_cnt, scsi_xri_cnt;</div><div class='add'>+	LIST_HEAD(els_sgl_list);</div><div class='add'>+	LIST_HEAD(scsi_sgl_list);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * update on pci function's els xri-sgl list</div><div class='add'>+	 */</div><div class='add'>+	els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);</div><div class='add'>+	if (els_xri_cnt &gt; phba-&gt;sli4_hba.els_xri_cnt) {</div><div class='add'>+		/* els xri-sgl expanded */</div><div class='add'>+		xri_cnt = els_xri_cnt - phba-&gt;sli4_hba.els_xri_cnt;</div><div class='add'>+		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,</div><div class='add'>+				"3157 ELS xri-sgl count increased from "</div><div class='add'>+				"%d to %d\n", phba-&gt;sli4_hba.els_xri_cnt,</div><div class='add'>+				els_xri_cnt);</div><div class='add'>+		/* allocate the additional els sgls */</div><div class='add'>+		for (i = 0; i &lt; xri_cnt; i++) {</div><div class='add'>+			sglq_entry = kzalloc(sizeof(struct lpfc_sglq),</div><div class='add'>+					     GFP_KERNEL);</div><div class='add'>+			if (sglq_entry == NULL) {</div><div class='add'>+				lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='add'>+						"2562 Failure to allocate an "</div><div class='add'>+						"ELS sgl entry:%d\n", i);</div><div class='add'>+				rc = -ENOMEM;</div><div class='add'>+				goto out_free_mem;</div><div class='add'>+			}</div><div class='add'>+			sglq_entry-&gt;buff_type = GEN_BUFF_TYPE;</div><div class='add'>+			sglq_entry-&gt;virt = lpfc_mbuf_alloc(phba, 0,</div><div class='add'>+							   &amp;sglq_entry-&gt;phys);</div><div class='add'>+			if (sglq_entry-&gt;virt == NULL) {</div><div class='add'>+				kfree(sglq_entry);</div><div class='add'>+				lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='add'>+						"2563 Failure to allocate an "</div><div class='add'>+						"ELS mbuf:%d\n", i);</div><div class='add'>+				rc = -ENOMEM;</div><div class='add'>+				goto out_free_mem;</div><div class='add'>+			}</div><div class='add'>+			sglq_entry-&gt;sgl = sglq_entry-&gt;virt;</div><div class='add'>+			memset(sglq_entry-&gt;sgl, 0, LPFC_BPL_SIZE);</div><div class='add'>+			sglq_entry-&gt;state = SGL_FREED;</div><div class='add'>+			list_add_tail(&amp;sglq_entry-&gt;list, &amp;els_sgl_list);</div><div class='add'>+		}</div><div class='add'>+		spin_lock(&amp;phba-&gt;hbalock);</div><div class='add'>+		list_splice_init(&amp;els_sgl_list, &amp;phba-&gt;sli4_hba.lpfc_sgl_list);</div><div class='add'>+		spin_unlock(&amp;phba-&gt;hbalock);</div><div class='add'>+	} else if (els_xri_cnt &lt; phba-&gt;sli4_hba.els_xri_cnt) {</div><div class='add'>+		/* els xri-sgl shrinked */</div><div class='add'>+		xri_cnt = phba-&gt;sli4_hba.els_xri_cnt - els_xri_cnt;</div><div class='add'>+		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,</div><div class='add'>+				"3158 ELS xri-sgl count decreased from "</div><div class='add'>+				"%d to %d\n", phba-&gt;sli4_hba.els_xri_cnt,</div><div class='add'>+				els_xri_cnt);</div><div class='add'>+		spin_lock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+		list_splice_init(&amp;phba-&gt;sli4_hba.lpfc_sgl_list, &amp;els_sgl_list);</div><div class='add'>+		spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+		/* release extra els sgls from list */</div><div class='add'>+		for (i = 0; i &lt; xri_cnt; i++) {</div><div class='add'>+			list_remove_head(&amp;els_sgl_list,</div><div class='add'>+					 sglq_entry, struct lpfc_sglq, list);</div><div class='add'>+			if (sglq_entry) {</div><div class='add'>+				lpfc_mbuf_free(phba, sglq_entry-&gt;virt,</div><div class='add'>+					       sglq_entry-&gt;phys);</div><div class='add'>+				kfree(sglq_entry);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		spin_lock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+		list_splice_init(&amp;els_sgl_list, &amp;phba-&gt;sli4_hba.lpfc_sgl_list);</div><div class='add'>+		spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+	} else</div><div class='add'>+		lpfc_printf_log(phba, KERN_INFO, LOG_SLI,</div><div class='add'>+				"3163 ELS xri-sgl count unchanged: %d\n",</div><div class='add'>+				els_xri_cnt);</div><div class='add'>+	phba-&gt;sli4_hba.els_xri_cnt = els_xri_cnt;</div><div class='add'>+</div><div class='add'>+	/* update xris to els sgls on the list */</div><div class='add'>+	sglq_entry = NULL;</div><div class='add'>+	sglq_entry_next = NULL;</div><div class='add'>+	list_for_each_entry_safe(sglq_entry, sglq_entry_next,</div><div class='add'>+				 &amp;phba-&gt;sli4_hba.lpfc_sgl_list, list) {</div><div class='add'>+		lxri = lpfc_sli4_next_xritag(phba);</div><div class='add'>+		if (lxri == NO_XRI) {</div><div class='add'>+			lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='add'>+					"2400 Failed to allocate xri for "</div><div class='add'>+					"ELS sgl\n");</div><div class='add'>+			rc = -ENOMEM;</div><div class='add'>+			goto out_free_mem;</div><div class='add'>+		}</div><div class='add'>+		sglq_entry-&gt;sli4_lxritag = lxri;</div><div class='add'>+		sglq_entry-&gt;sli4_xritag = phba-&gt;sli4_hba.xri_ids[lxri];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * update on pci function's allocated scsi xri-sgl list</div><div class='add'>+	 */</div><div class='add'>+	phba-&gt;total_scsi_bufs = 0;</div><div class='add'>+</div><div class='add'>+	/* maximum number of xris available for scsi buffers */</div><div class='add'>+	phba-&gt;sli4_hba.scsi_xri_max = phba-&gt;sli4_hba.max_cfg_param.max_xri -</div><div class='add'>+				      els_xri_cnt;</div><div class='add'>+</div><div class='add'>+	lpfc_printf_log(phba, KERN_INFO, LOG_SLI,</div><div class='add'>+			"2401 Current allocated SCSI xri-sgl count:%d, "</div><div class='add'>+			"maximum  SCSI xri count:%d\n",</div><div class='add'>+			phba-&gt;sli4_hba.scsi_xri_cnt,</div><div class='add'>+			phba-&gt;sli4_hba.scsi_xri_max);</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;phba-&gt;scsi_buf_list_lock);</div><div class='add'>+	list_splice_init(&amp;phba-&gt;lpfc_scsi_buf_list, &amp;scsi_sgl_list);</div><div class='add'>+	spin_unlock_irq(&amp;phba-&gt;scsi_buf_list_lock);</div><div class='add'>+</div><div class='add'>+	if (phba-&gt;sli4_hba.scsi_xri_cnt &gt; phba-&gt;sli4_hba.scsi_xri_max) {</div><div class='add'>+		/* max scsi xri shrinked below the allocated scsi buffers */</div><div class='add'>+		scsi_xri_cnt = phba-&gt;sli4_hba.scsi_xri_cnt -</div><div class='add'>+					phba-&gt;sli4_hba.scsi_xri_max;</div><div class='add'>+		/* release the extra allocated scsi buffers */</div><div class='add'>+		for (i = 0; i &lt; scsi_xri_cnt; i++) {</div><div class='add'>+			list_remove_head(&amp;scsi_sgl_list, psb,</div><div class='add'>+					 struct lpfc_scsi_buf, list);</div><div class='add'>+			pci_pool_free(phba-&gt;lpfc_scsi_dma_buf_pool, psb-&gt;data,</div><div class='add'>+				      psb-&gt;dma_handle);</div><div class='add'>+			kfree(psb);</div><div class='add'>+		}</div><div class='add'>+		spin_lock_irq(&amp;phba-&gt;scsi_buf_list_lock);</div><div class='add'>+		phba-&gt;sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;</div><div class='add'>+		spin_unlock_irq(&amp;phba-&gt;scsi_buf_list_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* update xris associated to remaining allocated scsi buffers */</div><div class='add'>+	psb = NULL;</div><div class='add'>+	psb_next = NULL;</div><div class='add'>+	list_for_each_entry_safe(psb, psb_next, &amp;scsi_sgl_list, list) {</div><div class='add'>+		lxri = lpfc_sli4_next_xritag(phba);</div><div class='add'>+		if (lxri == NO_XRI) {</div><div class='add'>+			lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='add'>+					"2560 Failed to allocate xri for "</div><div class='add'>+					"scsi buffer\n");</div><div class='add'>+			rc = -ENOMEM;</div><div class='add'>+			goto out_free_mem;</div><div class='add'>+		}</div><div class='add'>+		psb-&gt;cur_iocbq.sli4_lxritag = lxri;</div><div class='add'>+		psb-&gt;cur_iocbq.sli4_xritag = phba-&gt;sli4_hba.xri_ids[lxri];</div><div class='add'>+	}</div><div class='add'>+	spin_lock(&amp;phba-&gt;scsi_buf_list_lock);</div><div class='add'>+	list_splice_init(&amp;scsi_sgl_list, &amp;phba-&gt;lpfc_scsi_buf_list);</div><div class='add'>+	spin_unlock(&amp;phba-&gt;scsi_buf_list_lock);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+out_free_mem:</div><div class='add'>+	lpfc_free_els_sgl_list(phba);</div><div class='add'>+	lpfc_scsi_free(phba);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4636,18 +4774,15 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto out_free_bsmbx;</div><div class='ctx'> </div><div class='del'>-	/* Initialize and populate the iocb list per host */</div><div class='del'>-	rc = lpfc_init_sgl_list(phba);</div><div class='del'>-	if (rc) {</div><div class='del'>-		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,</div><div class='del'>-				"1400 Failed to initialize sgl list.\n");</div><div class='del'>-		goto out_destroy_cq_event_pool;</div><div class='del'>-	}</div><div class='add'>+	/* Initialize sgl lists per host */</div><div class='add'>+	lpfc_init_sgl_list(phba);</div><div class='add'>+</div><div class='add'>+	/* Allocate and initialize active sgl array */</div><div class='ctx'> 	rc = lpfc_init_active_sgl_array(phba);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		lpfc_printf_log(phba, KERN_ERR, LOG_INIT,</div><div class='ctx'> 				"1430 Failed to initialize sgl list.\n");</div><div class='del'>-		goto out_free_sgl_list;</div><div class='add'>+		goto out_destroy_cq_event_pool;</div><div class='ctx'> 	}</div><div class='ctx'> 	rc = lpfc_sli4_init_rpi_hdrs(phba);</div><div class='ctx'> 	if (rc) {</div><div class='hunk'>@@ -4722,8 +4857,6 @@ out_remove_rpi_hdrs:</div><div class='ctx'> 	lpfc_sli4_remove_rpi_hdrs(phba);</div><div class='ctx'> out_free_active_sgl:</div><div class='ctx'> 	lpfc_free_active_sgl(phba);</div><div class='del'>-out_free_sgl_list:</div><div class='del'>-	lpfc_free_sgl_list(phba);</div><div class='ctx'> out_destroy_cq_event_pool:</div><div class='ctx'> 	lpfc_sli4_cq_event_pool_destroy(phba);</div><div class='ctx'> out_free_bsmbx:</div><div class='hunk'>@@ -4760,10 +4893,7 @@ lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)</div><div class='ctx'> </div><div class='ctx'> 	/* Free the ELS sgl list */</div><div class='ctx'> 	lpfc_free_active_sgl(phba);</div><div class='del'>-	lpfc_free_sgl_list(phba);</div><div class='del'>-</div><div class='del'>-	/* Free the SCSI sgl management array */</div><div class='del'>-	kfree(phba-&gt;sli4_hba.lpfc_scsi_psb_array);</div><div class='add'>+	lpfc_free_els_sgl_list(phba);</div><div class='ctx'> </div><div class='ctx'> 	/* Free the completion queue EQ event pool */</div><div class='ctx'> 	lpfc_sli4_cq_event_release_all(phba);</div><div class='hunk'>@@ -4990,29 +5120,42 @@ out_free_iocbq:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * lpfc_free_sgl_list - Free sgl list.</div><div class='add'>+ * lpfc_free_sgl_list - Free a given sgl list.</div><div class='ctx'>  * @phba: pointer to lpfc hba data structure.</div><div class='add'>+ * @sglq_list: pointer to the head of sgl list.</div><div class='ctx'>  *</div><div class='del'>- * This routine is invoked to free the driver's sgl list and memory.</div><div class='add'>+ * This routine is invoked to free a give sgl list and memory.</div><div class='ctx'>  **/</div><div class='del'>-static void</div><div class='del'>-lpfc_free_sgl_list(struct lpfc_hba *phba)</div><div class='add'>+void</div><div class='add'>+lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)</div><div class='ctx'> {</div><div class='ctx'> 	struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {</div><div class='add'>+		list_del(&amp;sglq_entry-&gt;list);</div><div class='add'>+		lpfc_mbuf_free(phba, sglq_entry-&gt;virt, sglq_entry-&gt;phys);</div><div class='add'>+		kfree(sglq_entry);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_free_els_sgl_list - Free els sgl list.</div><div class='add'>+ * @phba: pointer to lpfc hba data structure.</div><div class='add'>+ *</div><div class='add'>+ * This routine is invoked to free the driver's els sgl list and memory.</div><div class='add'>+ **/</div><div class='add'>+static void</div><div class='add'>+lpfc_free_els_sgl_list(struct lpfc_hba *phba)</div><div class='add'>+{</div><div class='ctx'> 	LIST_HEAD(sglq_list);</div><div class='ctx'> </div><div class='add'>+	/* Retrieve all els sgls from driver list */</div><div class='ctx'> 	spin_lock_irq(&amp;phba-&gt;hbalock);</div><div class='ctx'> 	list_splice_init(&amp;phba-&gt;sli4_hba.lpfc_sgl_list, &amp;sglq_list);</div><div class='ctx'> 	spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry_safe(sglq_entry, sglq_next,</div><div class='del'>-				 &amp;sglq_list, list) {</div><div class='del'>-		list_del(&amp;sglq_entry-&gt;list);</div><div class='del'>-		lpfc_mbuf_free(phba, sglq_entry-&gt;virt, sglq_entry-&gt;phys);</div><div class='del'>-		kfree(sglq_entry);</div><div class='del'>-		phba-&gt;sli4_hba.total_sglq_bufs--;</div><div class='del'>-	}</div><div class='del'>-	kfree(phba-&gt;sli4_hba.lpfc_els_sgl_array);</div><div class='add'>+	/* Now free the sgl list */</div><div class='add'>+	lpfc_free_sgl_list(phba, &amp;sglq_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -5057,99 +5200,19 @@ lpfc_free_active_sgl(struct lpfc_hba *phba)</div><div class='ctx'>  * This routine is invoked to allocate and initizlize the driver's sgl</div><div class='ctx'>  * list and set up the sgl xritag tag array accordingly.</div><div class='ctx'>  *</div><div class='del'>- * Return codes</div><div class='del'>- *	0 - successful</div><div class='del'>- *	other values - error</div><div class='ctx'>  **/</div><div class='del'>-static int</div><div class='add'>+static void</div><div class='ctx'> lpfc_init_sgl_list(struct lpfc_hba *phba)</div><div class='ctx'> {</div><div class='del'>-	struct lpfc_sglq *sglq_entry = NULL;</div><div class='del'>-	int i;</div><div class='del'>-	int els_xri_cnt;</div><div class='del'>-</div><div class='del'>-	els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);</div><div class='del'>-	lpfc_printf_log(phba, KERN_INFO, LOG_SLI,</div><div class='del'>-				"2400 ELS XRI count %d.\n",</div><div class='del'>-				els_xri_cnt);</div><div class='ctx'> 	/* Initialize and populate the sglq list per host/VF. */</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;phba-&gt;sli4_hba.lpfc_sgl_list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;phba-&gt;sli4_hba.lpfc_abts_els_sgl_list);</div><div class='ctx'> </div><div class='del'>-	/* Sanity check on XRI management */</div><div class='del'>-	if (phba-&gt;sli4_hba.max_cfg_param.max_xri &lt;= els_xri_cnt) {</div><div class='del'>-		lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='del'>-				"2562 No room left for SCSI XRI allocation: "</div><div class='del'>-				"max_xri=%d, els_xri=%d\n",</div><div class='del'>-				phba-&gt;sli4_hba.max_cfg_param.max_xri,</div><div class='del'>-				els_xri_cnt);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Allocate memory for the ELS XRI management array */</div><div class='del'>-	phba-&gt;sli4_hba.lpfc_els_sgl_array =</div><div class='del'>-			kzalloc((sizeof(struct lpfc_sglq *) * els_xri_cnt),</div><div class='del'>-			GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-	if (!phba-&gt;sli4_hba.lpfc_els_sgl_array) {</div><div class='del'>-		lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='del'>-				"2401 Failed to allocate memory for ELS "</div><div class='del'>-				"XRI management array of size %d.\n",</div><div class='del'>-				els_xri_cnt);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='add'>+	/* els xri-sgl book keeping */</div><div class='add'>+	phba-&gt;sli4_hba.els_xri_cnt = 0;</div><div class='ctx'> </div><div class='del'>-	/* Keep the SCSI XRI into the XRI management array */</div><div class='del'>-	phba-&gt;sli4_hba.scsi_xri_max =</div><div class='del'>-			phba-&gt;sli4_hba.max_cfg_param.max_xri - els_xri_cnt;</div><div class='add'>+	/* scsi xri-buffer book keeping */</div><div class='ctx'> 	phba-&gt;sli4_hba.scsi_xri_cnt = 0;</div><div class='del'>-	phba-&gt;sli4_hba.lpfc_scsi_psb_array =</div><div class='del'>-			kzalloc((sizeof(struct lpfc_scsi_buf *) *</div><div class='del'>-			phba-&gt;sli4_hba.scsi_xri_max), GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-	if (!phba-&gt;sli4_hba.lpfc_scsi_psb_array) {</div><div class='del'>-		lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='del'>-				"2563 Failed to allocate memory for SCSI "</div><div class='del'>-				"XRI management array of size %d.\n",</div><div class='del'>-				phba-&gt;sli4_hba.scsi_xri_max);</div><div class='del'>-		kfree(phba-&gt;sli4_hba.lpfc_els_sgl_array);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; els_xri_cnt; i++) {</div><div class='del'>-		sglq_entry = kzalloc(sizeof(struct lpfc_sglq), GFP_KERNEL);</div><div class='del'>-		if (sglq_entry == NULL) {</div><div class='del'>-			printk(KERN_ERR "%s: only allocated %d sgls of "</div><div class='del'>-				"expected %d count. Unloading driver.\n",</div><div class='del'>-				__func__, i, els_xri_cnt);</div><div class='del'>-			goto out_free_mem;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		sglq_entry-&gt;buff_type = GEN_BUFF_TYPE;</div><div class='del'>-		sglq_entry-&gt;virt = lpfc_mbuf_alloc(phba, 0, &amp;sglq_entry-&gt;phys);</div><div class='del'>-		if (sglq_entry-&gt;virt == NULL) {</div><div class='del'>-			kfree(sglq_entry);</div><div class='del'>-			printk(KERN_ERR "%s: failed to allocate mbuf.\n"</div><div class='del'>-				"Unloading driver.\n", __func__);</div><div class='del'>-			goto out_free_mem;</div><div class='del'>-		}</div><div class='del'>-		sglq_entry-&gt;sgl = sglq_entry-&gt;virt;</div><div class='del'>-		memset(sglq_entry-&gt;sgl, 0, LPFC_BPL_SIZE);</div><div class='del'>-</div><div class='del'>-		/* The list order is used by later block SGL registraton */</div><div class='del'>-		spin_lock_irq(&amp;phba-&gt;hbalock);</div><div class='del'>-		sglq_entry-&gt;state = SGL_FREED;</div><div class='del'>-		list_add_tail(&amp;sglq_entry-&gt;list, &amp;phba-&gt;sli4_hba.lpfc_sgl_list);</div><div class='del'>-		phba-&gt;sli4_hba.lpfc_els_sgl_array[i] = sglq_entry;</div><div class='del'>-		phba-&gt;sli4_hba.total_sglq_bufs++;</div><div class='del'>-		spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_free_mem:</div><div class='del'>-	kfree(phba-&gt;sli4_hba.lpfc_scsi_psb_array);</div><div class='del'>-	lpfc_free_sgl_list(phba);</div><div class='del'>-	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -7320,9 +7383,11 @@ lpfc_pci_function_reset(struct lpfc_hba *phba)</div><div class='ctx'> 					phba-&gt;sli4_hba.u.if_type2.ERR2regaddr);</div><div class='ctx'> 				lpfc_printf_log(phba, KERN_ERR, LOG_INIT,</div><div class='ctx'> 					"2890 Port error detected during port "</div><div class='del'>-					"reset(%d): port status reg 0x%x, "</div><div class='add'>+					"reset(%d): wait_tmo:%d ms, "</div><div class='add'>+					"port status reg 0x%x, "</div><div class='ctx'> 					"error 1=0x%x, error 2=0x%x\n",</div><div class='del'>-					num_resets, reg_data.word0,</div><div class='add'>+					num_resets, rdy_chk*10,</div><div class='add'>+					reg_data.word0,</div><div class='ctx'> 					phba-&gt;work_status[0],</div><div class='ctx'> 					phba-&gt;work_status[1]);</div><div class='ctx'> 				rc = -ENODEV;</div><div class='hunk'>@@ -8694,8 +8759,11 @@ lpfc_pci_remove_one_s3(struct pci_dev *pdev)</div><div class='ctx'> 	/* Release all the vports against this physical port */</div><div class='ctx'> 	vports = lpfc_create_vport_work_array(phba);</div><div class='ctx'> 	if (vports != NULL)</div><div class='del'>-		for (i = 1; i &lt;= phba-&gt;max_vports &amp;&amp; vports[i] != NULL; i++)</div><div class='add'>+		for (i = 0; i &lt;= phba-&gt;max_vports &amp;&amp; vports[i] != NULL; i++) {</div><div class='add'>+			if (vports[i]-&gt;port_type == LPFC_PHYSICAL_PORT)</div><div class='add'>+				continue;</div><div class='ctx'> 			fc_vport_terminate(vports[i]-&gt;fc_vport);</div><div class='add'>+		}</div><div class='ctx'> 	lpfc_destroy_vport_work_array(phba, vports);</div><div class='ctx'> </div><div class='ctx'> 	/* Remove FC host and then SCSI host with the physical port */</div><div class='hunk'>@@ -9115,8 +9183,12 @@ lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)</div><div class='ctx'> 			return 50;</div><div class='ctx'> 		else if (max_xri &lt;= 1024)</div><div class='ctx'> 			return 100;</div><div class='del'>-		else</div><div class='add'>+		else if (max_xri &lt;= 1536)</div><div class='ctx'> 			return 150;</div><div class='add'>+		else if (max_xri &lt;= 2048)</div><div class='add'>+			return 200;</div><div class='add'>+		else</div><div class='add'>+			return 250;</div><div class='ctx'> 	} else</div><div class='ctx'> 		return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -9455,8 +9527,11 @@ lpfc_pci_remove_one_s4(struct pci_dev *pdev)</div><div class='ctx'> 	/* Release all the vports against this physical port */</div><div class='ctx'> 	vports = lpfc_create_vport_work_array(phba);</div><div class='ctx'> 	if (vports != NULL)</div><div class='del'>-		for (i = 1; i &lt;= phba-&gt;max_vports &amp;&amp; vports[i] != NULL; i++)</div><div class='add'>+		for (i = 0; i &lt;= phba-&gt;max_vports &amp;&amp; vports[i] != NULL; i++) {</div><div class='add'>+			if (vports[i]-&gt;port_type == LPFC_PHYSICAL_PORT)</div><div class='add'>+				continue;</div><div class='ctx'> 			fc_vport_terminate(vports[i]-&gt;fc_vport);</div><div class='add'>+		}</div><div class='ctx'> 	lpfc_destroy_vport_work_array(phba, vports);</div><div class='ctx'> </div><div class='ctx'> 	/* Remove FC host and then SCSI host with the physical port */</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_nportdisc.c b/drivers/scsi/lpfc/lpfc_nportdisc.c<br/>index 15ca2a9a0cdd..9133a97f045f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_nportdisc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_nportdisc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_nportdisc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_nportdisc.c</a></div><div class='hunk'>@@ -367,8 +367,10 @@ lpfc_rcv_plogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Check for Nport to NPort pt2pt protocol */</div><div class='ctx'> 	if ((vport-&gt;fc_flag &amp; FC_PT2PT) &amp;&amp;</div><div class='ctx'> 	    !(vport-&gt;fc_flag &amp; FC_PT2PT_PLOGI)) {</div><div class='add'>+</div><div class='ctx'> 		/* rcv'ed PLOGI decides what our NPortId will be */</div><div class='ctx'> 		vport-&gt;fc_myDID = icmd-&gt;un.rcvels.parmRo;</div><div class='ctx'> 		mbox = mempool_alloc(phba-&gt;mbox_mem_pool, GFP_KERNEL);</div><div class='hunk'>@@ -382,6 +384,13 @@ lpfc_rcv_plogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,</div><div class='ctx'> 			mempool_free(mbox, phba-&gt;mbox_mem_pool);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='add'>+		/*</div><div class='add'>+		 * For SLI4, the VFI/VPI are registered AFTER the</div><div class='add'>+		 * Nport with the higher WWPN sends us a PLOGI with</div><div class='add'>+		 * our assigned NPortId.</div><div class='add'>+		 */</div><div class='add'>+		if (phba-&gt;sli_rev == LPFC_SLI_REV4)</div><div class='add'>+			lpfc_issue_reg_vfi(vport);</div><div class='ctx'> </div><div class='ctx'> 		lpfc_can_disctmo(vport);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_scsi.c b/drivers/scsi/lpfc/lpfc_scsi.c<br/>index 88f3a83dbd2e..66e09069f281 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_scsi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_scsi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_scsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_scsi.c</a></div><div class='hunk'>@@ -399,6 +399,14 @@ lpfc_ramp_down_queue_handler(struct lpfc_hba *phba)</div><div class='ctx'> 	num_rsrc_err = atomic_read(&amp;phba-&gt;num_rsrc_err);</div><div class='ctx'> 	num_cmd_success = atomic_read(&amp;phba-&gt;num_cmd_success);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * The error and success command counters are global per</div><div class='add'>+	 * driver instance.  If another handler has already</div><div class='add'>+	 * operated on this error event, just exit.</div><div class='add'>+	 */</div><div class='add'>+	if (num_rsrc_err == 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	vports = lpfc_create_vport_work_array(phba);</div><div class='ctx'> 	if (vports != NULL)</div><div class='ctx'> 		for (i = 0; i &lt;= phba-&gt;max_vports &amp;&amp; vports[i] != NULL; i++) {</div><div class='hunk'>@@ -688,7 +696,8 @@ lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *phba,</div><div class='ctx'> 			rrq_empty = list_empty(&amp;phba-&gt;active_rrq_list);</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;phba-&gt;hbalock, iflag);</div><div class='ctx'> 			if (ndlp) {</div><div class='del'>-				lpfc_set_rrq_active(phba, ndlp, xri, rxid, 1);</div><div class='add'>+				lpfc_set_rrq_active(phba, ndlp,</div><div class='add'>+					psb-&gt;cur_iocbq.sli4_lxritag, rxid, 1);</div><div class='ctx'> 				lpfc_sli4_abts_err_handler(phba, ndlp, axri);</div><div class='ctx'> 			}</div><div class='ctx'> 			lpfc_release_scsi_buf_s4(phba, psb);</div><div class='hunk'>@@ -718,72 +727,162 @@ lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *phba,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * lpfc_sli4_repost_scsi_sgl_list - Repsot the Scsi buffers sgl pages as block</div><div class='add'>+ * lpfc_sli4_post_scsi_sgl_list - Psot blocks of scsi buffer sgls from a list</div><div class='ctx'>  * @phba: pointer to lpfc hba data structure.</div><div class='add'>+ * @post_sblist: pointer to the scsi buffer list.</div><div class='ctx'>  *</div><div class='del'>- * This routine walks the list of scsi buffers that have been allocated and</div><div class='del'>- * repost them to the HBA by using SGL block post. This is needed after a</div><div class='del'>- * pci_function_reset/warm_start or start. The lpfc_hba_down_post_s4 routine</div><div class='del'>- * is responsible for moving all scsi buffers on the lpfc_abts_scsi_sgl_list</div><div class='del'>- * to the lpfc_scsi_buf_list. If the repost fails, reject all scsi buffers.</div><div class='add'>+ * This routine walks a list of scsi buffers that was passed in. It attempts</div><div class='add'>+ * to construct blocks of scsi buffer sgls which contains contiguous xris and</div><div class='add'>+ * uses the non-embedded SGL block post mailbox commands to post to the port.</div><div class='add'>+ * For single SCSI buffer sgl with non-contiguous xri, if any, it shall use</div><div class='add'>+ * embedded SGL post mailbox command for posting. The @post_sblist passed in</div><div class='add'>+ * must be local list, thus no lock is needed when manipulate the list.</div><div class='ctx'>  *</div><div class='del'>- * Returns: 0 = success, non-zero failure.</div><div class='add'>+ * Returns: 0 = failure, non-zero number of successfully posted buffers.</div><div class='ctx'>  **/</div><div class='ctx'> int</div><div class='del'>-lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *phba)</div><div class='add'>+lpfc_sli4_post_scsi_sgl_list(struct lpfc_hba *phba,</div><div class='add'>+			     struct list_head *post_sblist, int sb_count)</div><div class='ctx'> {</div><div class='del'>-	struct lpfc_scsi_buf *psb;</div><div class='del'>-	int index, status, bcnt = 0, rcnt = 0, rc = 0;</div><div class='del'>-	LIST_HEAD(sblist);</div><div class='del'>-</div><div class='del'>-	for (index = 0; index &lt; phba-&gt;sli4_hba.scsi_xri_cnt; index++) {</div><div class='del'>-		psb = phba-&gt;sli4_hba.lpfc_scsi_psb_array[index];</div><div class='del'>-		if (psb) {</div><div class='del'>-			/* Remove from SCSI buffer list */</div><div class='del'>-			list_del(&amp;psb-&gt;list);</div><div class='del'>-			/* Add it to a local SCSI buffer list */</div><div class='del'>-			list_add_tail(&amp;psb-&gt;list, &amp;sblist);</div><div class='del'>-			if (++rcnt == LPFC_NEMBED_MBOX_SGL_CNT) {</div><div class='del'>-				bcnt = rcnt;</div><div class='del'>-				rcnt = 0;</div><div class='add'>+	struct lpfc_scsi_buf *psb, *psb_next;</div><div class='add'>+	int status;</div><div class='add'>+	int post_cnt = 0, block_cnt = 0, num_posting = 0, num_posted = 0;</div><div class='add'>+	dma_addr_t pdma_phys_bpl1;</div><div class='add'>+	int last_xritag = NO_XRI;</div><div class='add'>+	LIST_HEAD(prep_sblist);</div><div class='add'>+	LIST_HEAD(blck_sblist);</div><div class='add'>+	LIST_HEAD(scsi_sblist);</div><div class='add'>+</div><div class='add'>+	/* sanity check */</div><div class='add'>+	if (sb_count &lt;= 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(psb, psb_next, post_sblist, list) {</div><div class='add'>+		list_del_init(&amp;psb-&gt;list);</div><div class='add'>+		block_cnt++;</div><div class='add'>+		if ((last_xritag != NO_XRI) &amp;&amp;</div><div class='add'>+		    (psb-&gt;cur_iocbq.sli4_xritag != last_xritag + 1)) {</div><div class='add'>+			/* a hole in xri block, form a sgl posting block */</div><div class='add'>+			list_splice_init(&amp;prep_sblist, &amp;blck_sblist);</div><div class='add'>+			post_cnt = block_cnt - 1;</div><div class='add'>+			/* prepare list for next posting block */</div><div class='add'>+			list_add_tail(&amp;psb-&gt;list, &amp;prep_sblist);</div><div class='add'>+			block_cnt = 1;</div><div class='add'>+		} else {</div><div class='add'>+			/* prepare list for next posting block */</div><div class='add'>+			list_add_tail(&amp;psb-&gt;list, &amp;prep_sblist);</div><div class='add'>+			/* enough sgls for non-embed sgl mbox command */</div><div class='add'>+			if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {</div><div class='add'>+				list_splice_init(&amp;prep_sblist, &amp;blck_sblist);</div><div class='add'>+				post_cnt = block_cnt;</div><div class='add'>+				block_cnt = 0;</div><div class='ctx'> 			}</div><div class='del'>-		} else</div><div class='del'>-			/* A hole present in the XRI array, need to skip */</div><div class='del'>-			bcnt = rcnt;</div><div class='add'>+		}</div><div class='add'>+		num_posting++;</div><div class='add'>+		last_xritag = psb-&gt;cur_iocbq.sli4_xritag;</div><div class='ctx'> </div><div class='del'>-		if (index == phba-&gt;sli4_hba.scsi_xri_cnt - 1)</div><div class='del'>-			/* End of XRI array for SCSI buffer, complete */</div><div class='del'>-			bcnt = rcnt;</div><div class='add'>+		/* end of repost sgl list condition for SCSI buffers */</div><div class='add'>+		if (num_posting == sb_count) {</div><div class='add'>+			if (post_cnt == 0) {</div><div class='add'>+				/* last sgl posting block */</div><div class='add'>+				list_splice_init(&amp;prep_sblist, &amp;blck_sblist);</div><div class='add'>+				post_cnt = block_cnt;</div><div class='add'>+			} else if (block_cnt == 1) {</div><div class='add'>+				/* last single sgl with non-contiguous xri */</div><div class='add'>+				if (phba-&gt;cfg_sg_dma_buf_size &gt; SGL_PAGE_SIZE)</div><div class='add'>+					pdma_phys_bpl1 = psb-&gt;dma_phys_bpl +</div><div class='add'>+								SGL_PAGE_SIZE;</div><div class='add'>+				else</div><div class='add'>+					pdma_phys_bpl1 = 0;</div><div class='add'>+				status = lpfc_sli4_post_sgl(phba,</div><div class='add'>+						psb-&gt;dma_phys_bpl,</div><div class='add'>+						pdma_phys_bpl1,</div><div class='add'>+						psb-&gt;cur_iocbq.sli4_xritag);</div><div class='add'>+				if (status) {</div><div class='add'>+					/* failure, put on abort scsi list */</div><div class='add'>+					psb-&gt;exch_busy = 1;</div><div class='add'>+				} else {</div><div class='add'>+					/* success, put on SCSI buffer list */</div><div class='add'>+					psb-&gt;exch_busy = 0;</div><div class='add'>+					psb-&gt;status = IOSTAT_SUCCESS;</div><div class='add'>+					num_posted++;</div><div class='add'>+				}</div><div class='add'>+				/* success, put on SCSI buffer sgl list */</div><div class='add'>+				list_add_tail(&amp;psb-&gt;list, &amp;scsi_sblist);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		/* Continue until collect up to a nembed page worth of sgls */</div><div class='del'>-		if (bcnt == 0)</div><div class='add'>+		/* continue until a nembed page worth of sgls */</div><div class='add'>+		if (post_cnt == 0)</div><div class='ctx'> 			continue;</div><div class='del'>-		/* Now, post the SCSI buffer list sgls as a block */</div><div class='del'>-		if (!phba-&gt;sli4_hba.extents_in_use)</div><div class='del'>-			status = lpfc_sli4_post_scsi_sgl_block(phba,</div><div class='del'>-							&amp;sblist,</div><div class='del'>-							bcnt);</div><div class='del'>-		else</div><div class='del'>-			status = lpfc_sli4_post_scsi_sgl_blk_ext(phba,</div><div class='del'>-							&amp;sblist,</div><div class='del'>-							bcnt);</div><div class='del'>-		/* Reset SCSI buffer count for next round of posting */</div><div class='del'>-		bcnt = 0;</div><div class='del'>-		while (!list_empty(&amp;sblist)) {</div><div class='del'>-			list_remove_head(&amp;sblist, psb, struct lpfc_scsi_buf,</div><div class='del'>-					 list);</div><div class='add'>+</div><div class='add'>+		/* post block of SCSI buffer list sgls */</div><div class='add'>+		status = lpfc_sli4_post_scsi_sgl_block(phba, &amp;blck_sblist,</div><div class='add'>+						       post_cnt);</div><div class='add'>+</div><div class='add'>+		/* don't reset xirtag due to hole in xri block */</div><div class='add'>+		if (block_cnt == 0)</div><div class='add'>+			last_xritag = NO_XRI;</div><div class='add'>+</div><div class='add'>+		/* reset SCSI buffer post count for next round of posting */</div><div class='add'>+		post_cnt = 0;</div><div class='add'>+</div><div class='add'>+		/* put posted SCSI buffer-sgl posted on SCSI buffer sgl list */</div><div class='add'>+		while (!list_empty(&amp;blck_sblist)) {</div><div class='add'>+			list_remove_head(&amp;blck_sblist, psb,</div><div class='add'>+					 struct lpfc_scsi_buf, list);</div><div class='ctx'> 			if (status) {</div><div class='del'>-				/* Put this back on the abort scsi list */</div><div class='add'>+				/* failure, put on abort scsi list */</div><div class='ctx'> 				psb-&gt;exch_busy = 1;</div><div class='del'>-				rc++;</div><div class='ctx'> 			} else {</div><div class='add'>+				/* success, put on SCSI buffer list */</div><div class='ctx'> 				psb-&gt;exch_busy = 0;</div><div class='ctx'> 				psb-&gt;status = IOSTAT_SUCCESS;</div><div class='add'>+				num_posted++;</div><div class='ctx'> 			}</div><div class='del'>-			/* Put it back into the SCSI buffer list */</div><div class='del'>-			lpfc_release_scsi_buf_s4(phba, psb);</div><div class='add'>+			list_add_tail(&amp;psb-&gt;list, &amp;scsi_sblist);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	/* Push SCSI buffers with sgl posted to the availble list */</div><div class='add'>+	while (!list_empty(&amp;scsi_sblist)) {</div><div class='add'>+		list_remove_head(&amp;scsi_sblist, psb,</div><div class='add'>+				 struct lpfc_scsi_buf, list);</div><div class='add'>+		lpfc_release_scsi_buf_s4(phba, psb);</div><div class='add'>+	}</div><div class='add'>+	return num_posted;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lpfc_sli4_repost_scsi_sgl_list - Repsot all the allocated scsi buffer sgls</div><div class='add'>+ * @phba: pointer to lpfc hba data structure.</div><div class='add'>+ *</div><div class='add'>+ * This routine walks the list of scsi buffers that have been allocated and</div><div class='add'>+ * repost them to the port by using SGL block post. This is needed after a</div><div class='add'>+ * pci_function_reset/warm_start or start. The lpfc_hba_down_post_s4 routine</div><div class='add'>+ * is responsible for moving all scsi buffers on the lpfc_abts_scsi_sgl_list</div><div class='add'>+ * to the lpfc_scsi_buf_list. If the repost fails, reject all scsi buffers.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 = success, non-zero failure.</div><div class='add'>+ **/</div><div class='add'>+int</div><div class='add'>+lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *phba)</div><div class='add'>+{</div><div class='add'>+	LIST_HEAD(post_sblist);</div><div class='add'>+	int num_posted, rc = 0;</div><div class='add'>+</div><div class='add'>+	/* get all SCSI buffers need to repost to a local list */</div><div class='add'>+	spin_lock(&amp;phba-&gt;scsi_buf_list_lock);</div><div class='add'>+	list_splice_init(&amp;phba-&gt;lpfc_scsi_buf_list, &amp;post_sblist);</div><div class='add'>+	spin_unlock(&amp;phba-&gt;scsi_buf_list_lock);</div><div class='add'>+</div><div class='add'>+	/* post the list of scsi buffer sgls to port if available */</div><div class='add'>+	if (!list_empty(&amp;post_sblist)) {</div><div class='add'>+		num_posted = lpfc_sli4_post_scsi_sgl_list(phba, &amp;post_sblist,</div><div class='add'>+						phba-&gt;sli4_hba.scsi_xri_cnt);</div><div class='add'>+		/* failed to post any scsi buffer, return error */</div><div class='add'>+		if (num_posted == 0)</div><div class='add'>+			rc = -EIO;</div><div class='add'>+	}</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -792,12 +891,13 @@ lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *phba)</div><div class='ctx'>  * @vport: The virtual port for which this call being executed.</div><div class='ctx'>  * @num_to_allocate: The requested number of buffers to allocate.</div><div class='ctx'>  *</div><div class='del'>- * This routine allocates a scsi buffer for device with SLI-4 interface spec,</div><div class='add'>+ * This routine allocates scsi buffers for device with SLI-4 interface spec,</div><div class='ctx'>  * the scsi buffer contains all the necessary information needed to initiate</div><div class='del'>- * a SCSI I/O.</div><div class='add'>+ * a SCSI I/O. After allocating up to @num_to_allocate SCSI buffers and put</div><div class='add'>+ * them on a list, it post them to the port by using SGL block post.</div><div class='ctx'>  *</div><div class='ctx'>  * Return codes:</div><div class='del'>- *   int - number of scsi buffers that were allocated.</div><div class='add'>+ *   int - number of scsi buffers that were allocated and posted.</div><div class='ctx'>  *   0 = failure, less than num_to_alloc is a partial failure.</div><div class='ctx'>  **/</div><div class='ctx'> static int</div><div class='hunk'>@@ -810,22 +910,21 @@ lpfc_new_scsi_buf_s4(struct lpfc_vport *vport, int num_to_alloc)</div><div class='ctx'> 	dma_addr_t pdma_phys_fcp_cmd;</div><div class='ctx'> 	dma_addr_t pdma_phys_fcp_rsp;</div><div class='ctx'> 	dma_addr_t pdma_phys_bpl, pdma_phys_bpl1;</div><div class='del'>-	uint16_t iotag, last_xritag = NO_XRI, lxri = 0;</div><div class='del'>-	int status = 0, index;</div><div class='del'>-	int bcnt;</div><div class='del'>-	int non_sequential_xri = 0;</div><div class='del'>-	LIST_HEAD(sblist);</div><div class='add'>+	uint16_t iotag, lxri = 0;</div><div class='add'>+	int bcnt, num_posted;</div><div class='add'>+	LIST_HEAD(prep_sblist);</div><div class='add'>+	LIST_HEAD(post_sblist);</div><div class='add'>+	LIST_HEAD(scsi_sblist);</div><div class='ctx'> </div><div class='ctx'> 	for (bcnt = 0; bcnt &lt; num_to_alloc; bcnt++) {</div><div class='ctx'> 		psb = kzalloc(sizeof(struct lpfc_scsi_buf), GFP_KERNEL);</div><div class='ctx'> 		if (!psb)</div><div class='ctx'> 			break;</div><div class='del'>-</div><div class='ctx'> 		/*</div><div class='del'>-		 * Get memory from the pci pool to map the virt space to pci bus</div><div class='del'>-		 * space for an I/O.  The DMA buffer includes space for the</div><div class='del'>-		 * struct fcp_cmnd, struct fcp_rsp and the number of bde's</div><div class='del'>-		 * necessary to support the sg_tablesize.</div><div class='add'>+		 * Get memory from the pci pool to map the virt space to</div><div class='add'>+		 * pci bus space for an I/O. The DMA buffer includes space</div><div class='add'>+		 * for the struct fcp_cmnd, struct fcp_rsp and the number</div><div class='add'>+		 * of bde's necessary to support the sg_tablesize.</div><div class='ctx'> 		 */</div><div class='ctx'> 		psb-&gt;data = pci_pool_alloc(phba-&gt;lpfc_scsi_dma_buf_pool,</div><div class='ctx'> 						GFP_KERNEL, &amp;psb-&gt;dma_handle);</div><div class='hunk'>@@ -833,8 +932,6 @@ lpfc_new_scsi_buf_s4(struct lpfc_vport *vport, int num_to_alloc)</div><div class='ctx'> 			kfree(psb);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		/* Initialize virtual ptrs to dma_buf region. */</div><div class='ctx'> 		memset(psb-&gt;data, 0, phba-&gt;cfg_sg_dma_buf_size);</div><div class='ctx'> </div><div class='ctx'> 		/* Allocate iotag for psb-&gt;cur_iocbq. */</div><div class='hunk'>@@ -855,16 +952,7 @@ lpfc_new_scsi_buf_s4(struct lpfc_vport *vport, int num_to_alloc)</div><div class='ctx'> 		}</div><div class='ctx'> 		psb-&gt;cur_iocbq.sli4_lxritag = lxri;</div><div class='ctx'> 		psb-&gt;cur_iocbq.sli4_xritag = phba-&gt;sli4_hba.xri_ids[lxri];</div><div class='del'>-		if (last_xritag != NO_XRI</div><div class='del'>-			&amp;&amp; psb-&gt;cur_iocbq.sli4_xritag != (last_xritag+1)) {</div><div class='del'>-			non_sequential_xri = 1;</div><div class='del'>-		} else</div><div class='del'>-			list_add_tail(&amp;psb-&gt;list, &amp;sblist);</div><div class='del'>-		last_xritag = psb-&gt;cur_iocbq.sli4_xritag;</div><div class='del'>-</div><div class='del'>-		index = phba-&gt;sli4_hba.scsi_xri_cnt++;</div><div class='ctx'> 		psb-&gt;cur_iocbq.iocb_flag |= LPFC_IO_FCP;</div><div class='del'>-</div><div class='ctx'> 		psb-&gt;fcp_bpl = psb-&gt;data;</div><div class='ctx'> 		psb-&gt;fcp_cmnd = (psb-&gt;data + phba-&gt;cfg_sg_dma_buf_size)</div><div class='ctx'> 			- (sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp));</div><div class='hunk'>@@ -880,9 +968,9 @@ lpfc_new_scsi_buf_s4(struct lpfc_vport *vport, int num_to_alloc)</div><div class='ctx'> 		pdma_phys_fcp_rsp = pdma_phys_fcp_cmd + sizeof(struct fcp_cmnd);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * The first two bdes are the FCP_CMD and FCP_RSP.  The balance</div><div class='del'>-		 * are sg list bdes.  Initialize the first two and leave the</div><div class='del'>-		 * rest for queuecommand.</div><div class='add'>+		 * The first two bdes are the FCP_CMD and FCP_RSP.</div><div class='add'>+		 * The balance are sg list bdes. Initialize the</div><div class='add'>+		 * first two and leave the rest for queuecommand.</div><div class='ctx'> 		 */</div><div class='ctx'> 		sgl-&gt;addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_cmd));</div><div class='ctx'> 		sgl-&gt;addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_cmd));</div><div class='hunk'>@@ -917,62 +1005,31 @@ lpfc_new_scsi_buf_s4(struct lpfc_vport *vport, int num_to_alloc)</div><div class='ctx'> 		iocb-&gt;ulpBdeCount = 1;</div><div class='ctx'> 		iocb-&gt;ulpLe = 1;</div><div class='ctx'> 		iocb-&gt;ulpClass = CLASS3;</div><div class='del'>-		psb-&gt;cur_iocbq.context1  = psb;</div><div class='add'>+		psb-&gt;cur_iocbq.context1 = psb;</div><div class='ctx'> 		if (phba-&gt;cfg_sg_dma_buf_size &gt; SGL_PAGE_SIZE)</div><div class='ctx'> 			pdma_phys_bpl1 = pdma_phys_bpl + SGL_PAGE_SIZE;</div><div class='ctx'> 		else</div><div class='ctx'> 			pdma_phys_bpl1 = 0;</div><div class='ctx'> 		psb-&gt;dma_phys_bpl = pdma_phys_bpl;</div><div class='del'>-		phba-&gt;sli4_hba.lpfc_scsi_psb_array[index] = psb;</div><div class='del'>-		if (non_sequential_xri) {</div><div class='del'>-			status = lpfc_sli4_post_sgl(phba, pdma_phys_bpl,</div><div class='del'>-						pdma_phys_bpl1,</div><div class='del'>-						psb-&gt;cur_iocbq.sli4_xritag);</div><div class='del'>-			if (status) {</div><div class='del'>-				/* Put this back on the abort scsi list */</div><div class='del'>-				psb-&gt;exch_busy = 1;</div><div class='del'>-			} else {</div><div class='del'>-				psb-&gt;exch_busy = 0;</div><div class='del'>-				psb-&gt;status = IOSTAT_SUCCESS;</div><div class='del'>-			}</div><div class='del'>-			/* Put it back into the SCSI buffer list */</div><div class='del'>-			lpfc_release_scsi_buf_s4(phba, psb);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (bcnt) {</div><div class='del'>-		if (!phba-&gt;sli4_hba.extents_in_use)</div><div class='del'>-			status = lpfc_sli4_post_scsi_sgl_block(phba,</div><div class='del'>-								&amp;sblist,</div><div class='del'>-								bcnt);</div><div class='del'>-		else</div><div class='del'>-			status = lpfc_sli4_post_scsi_sgl_blk_ext(phba,</div><div class='del'>-								&amp;sblist,</div><div class='del'>-								bcnt);</div><div class='del'>-</div><div class='del'>-		if (status) {</div><div class='del'>-			lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,</div><div class='del'>-					"3021 SCSI SGL post error %d\n",</div><div class='del'>-					status);</div><div class='del'>-			bcnt = 0;</div><div class='del'>-		}</div><div class='del'>-		/* Reset SCSI buffer count for next round of posting */</div><div class='del'>-		while (!list_empty(&amp;sblist)) {</div><div class='del'>-			list_remove_head(&amp;sblist, psb, struct lpfc_scsi_buf,</div><div class='del'>-				 list);</div><div class='del'>-			if (status) {</div><div class='del'>-				/* Put this back on the abort scsi list */</div><div class='del'>-				psb-&gt;exch_busy = 1;</div><div class='del'>-			} else {</div><div class='del'>-				psb-&gt;exch_busy = 0;</div><div class='del'>-				psb-&gt;status = IOSTAT_SUCCESS;</div><div class='del'>-			}</div><div class='del'>-			/* Put it back into the SCSI buffer list */</div><div class='del'>-			lpfc_release_scsi_buf_s4(phba, psb);</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+		/* add the scsi buffer to a post list */</div><div class='add'>+		list_add_tail(&amp;psb-&gt;list, &amp;post_sblist);</div><div class='add'>+		spin_lock_irq(&amp;phba-&gt;scsi_buf_list_lock);</div><div class='add'>+		phba-&gt;sli4_hba.scsi_xri_cnt++;</div><div class='add'>+		spin_unlock_irq(&amp;phba-&gt;scsi_buf_list_lock);</div><div class='ctx'> 	}</div><div class='add'>+	lpfc_printf_log(phba, KERN_INFO, LOG_BG,</div><div class='add'>+			"3021 Allocate %d out of %d requested new SCSI "</div><div class='add'>+			"buffers\n", bcnt, num_to_alloc);</div><div class='add'>+</div><div class='add'>+	/* post the list of scsi buffer sgls to port if available */</div><div class='add'>+	if (!list_empty(&amp;post_sblist))</div><div class='add'>+		num_posted = lpfc_sli4_post_scsi_sgl_list(phba,</div><div class='add'>+							  &amp;post_sblist, bcnt);</div><div class='add'>+	else</div><div class='add'>+		num_posted = 0;</div><div class='ctx'> </div><div class='del'>-	return bcnt + non_sequential_xri;</div><div class='add'>+	return num_posted;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1043,7 +1100,7 @@ lpfc_get_scsi_buf_s4(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp)</div><div class='ctx'> 	list_for_each_entry(lpfc_cmd, &amp;phba-&gt;lpfc_scsi_buf_list,</div><div class='ctx'> 							list) {</div><div class='ctx'> 		if (lpfc_test_rrq_active(phba, ndlp,</div><div class='del'>-					 lpfc_cmd-&gt;cur_iocbq.sli4_xritag))</div><div class='add'>+					 lpfc_cmd-&gt;cur_iocbq.sli4_lxritag))</div><div class='ctx'> 			continue;</div><div class='ctx'> 		list_del(&amp;lpfc_cmd-&gt;list);</div><div class='ctx'> 		found = 1;</div><div class='hunk'>@@ -1897,7 +1954,9 @@ lpfc_bg_setup_bpl(struct lpfc_hba *phba, struct scsi_cmnd *sc,</div><div class='ctx'> 	dma_addr_t physaddr;</div><div class='ctx'> 	int i = 0, num_bde = 0, status;</div><div class='ctx'> 	int datadir = sc-&gt;sc_data_direction;</div><div class='add'>+#ifdef CONFIG_SCSI_LPFC_DEBUG_FS</div><div class='ctx'> 	uint32_t rc;</div><div class='add'>+#endif</div><div class='ctx'> 	uint32_t checking = 1;</div><div class='ctx'> 	uint32_t reftag;</div><div class='ctx'> 	unsigned blksize;</div><div class='hunk'>@@ -2034,7 +2093,9 @@ lpfc_bg_setup_bpl_prot(struct lpfc_hba *phba, struct scsi_cmnd *sc,</div><div class='ctx'> 	int datadir = sc-&gt;sc_data_direction;</div><div class='ctx'> 	unsigned char pgdone = 0, alldone = 0;</div><div class='ctx'> 	unsigned blksize;</div><div class='add'>+#ifdef CONFIG_SCSI_LPFC_DEBUG_FS</div><div class='ctx'> 	uint32_t rc;</div><div class='add'>+#endif</div><div class='ctx'> 	uint32_t checking = 1;</div><div class='ctx'> 	uint32_t reftag;</div><div class='ctx'> 	uint8_t txop, rxop;</div><div class='hunk'>@@ -2253,7 +2314,9 @@ lpfc_bg_setup_sgl(struct lpfc_hba *phba, struct scsi_cmnd *sc,</div><div class='ctx'> 	uint32_t reftag;</div><div class='ctx'> 	unsigned blksize;</div><div class='ctx'> 	uint8_t txop, rxop;</div><div class='add'>+#ifdef CONFIG_SCSI_LPFC_DEBUG_FS</div><div class='ctx'> 	uint32_t rc;</div><div class='add'>+#endif</div><div class='ctx'> 	uint32_t checking = 1;</div><div class='ctx'> 	uint32_t dma_len;</div><div class='ctx'> 	uint32_t dma_offset = 0;</div><div class='hunk'>@@ -2383,7 +2446,9 @@ lpfc_bg_setup_sgl_prot(struct lpfc_hba *phba, struct scsi_cmnd *sc,</div><div class='ctx'> 	uint32_t reftag;</div><div class='ctx'> 	uint8_t txop, rxop;</div><div class='ctx'> 	uint32_t dma_len;</div><div class='add'>+#ifdef CONFIG_SCSI_LPFC_DEBUG_FS</div><div class='ctx'> 	uint32_t rc;</div><div class='add'>+#endif</div><div class='ctx'> 	uint32_t checking = 1;</div><div class='ctx'> 	uint32_t dma_offset = 0;</div><div class='ctx'> 	int num_sge = 0;</div><div class='hunk'>@@ -3604,11 +3669,16 @@ lpfc_scsi_cmd_iocb_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *pIocbIn,</div><div class='ctx'> 			logit = LOG_FCP | LOG_FCP_UNDER;</div><div class='ctx'> 		lpfc_printf_vlog(vport, KERN_WARNING, logit,</div><div class='ctx'> 			 "9030 FCP cmd x%x failed &lt;%d/%d&gt; "</div><div class='del'>-			 "status: x%x result: x%x Data: x%x x%x\n",</div><div class='add'>+			 "status: x%x result: x%x "</div><div class='add'>+			 "sid: x%x did: x%x oxid: x%x "</div><div class='add'>+			 "Data: x%x x%x\n",</div><div class='ctx'> 			 cmd-&gt;cmnd[0],</div><div class='ctx'> 			 cmd-&gt;device ? cmd-&gt;device-&gt;id : 0xffff,</div><div class='ctx'> 			 cmd-&gt;device ? cmd-&gt;device-&gt;lun : 0xffff,</div><div class='ctx'> 			 lpfc_cmd-&gt;status, lpfc_cmd-&gt;result,</div><div class='add'>+			 vport-&gt;fc_myDID, pnode-&gt;nlp_DID,</div><div class='add'>+			 phba-&gt;sli_rev == LPFC_SLI_REV4 ?</div><div class='add'>+			     lpfc_cmd-&gt;cur_iocbq.sli4_xritag : 0xffff,</div><div class='ctx'> 			 pIocbOut-&gt;iocb.ulpContext,</div><div class='ctx'> 			 lpfc_cmd-&gt;cur_iocbq.iocb.ulpIoTag);</div><div class='ctx'> </div><div class='hunk'>@@ -3689,8 +3759,8 @@ lpfc_scsi_cmd_iocb_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *pIocbIn,</div><div class='ctx'> 				 * ABTS we cannot generate and RRQ.</div><div class='ctx'> 				 */</div><div class='ctx'> 				lpfc_set_rrq_active(phba, pnode,</div><div class='del'>-						lpfc_cmd-&gt;cur_iocbq.sli4_xritag,</div><div class='del'>-						0, 0);</div><div class='add'>+					lpfc_cmd-&gt;cur_iocbq.sli4_lxritag,</div><div class='add'>+					0, 0);</div><div class='ctx'> 			}</div><div class='ctx'> 		/* else: fall through */</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -4348,8 +4418,20 @@ lpfc_abort_handler(struct scsi_cmnd *cmnd)</div><div class='ctx'> 	ret = fc_block_scsi_eh(cmnd);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+	/* driver queued commands are in process of being flushed */</div><div class='add'>+	if (phba-&gt;hba_flag &amp; HBA_FCP_IOQ_FLUSH) {</div><div class='add'>+		spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+		lpfc_printf_vlog(vport, KERN_WARNING, LOG_FCP,</div><div class='add'>+			"3168 SCSI Layer abort requested I/O has been "</div><div class='add'>+			"flushed by LLD.\n");</div><div class='add'>+		return FAILED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	lpfc_cmd = (struct lpfc_scsi_buf *)cmnd-&gt;host_scribble;</div><div class='ctx'> 	if (!lpfc_cmd) {</div><div class='add'>+		spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='ctx'> 		lpfc_printf_vlog(vport, KERN_WARNING, LOG_FCP,</div><div class='ctx'> 			 "2873 SCSI Layer I/O Abort Request IO CMPL Status "</div><div class='ctx'> 			 "x%x ID %d LUN %d\n",</div><div class='hunk'>@@ -4357,23 +4439,34 @@ lpfc_abort_handler(struct scsi_cmnd *cmnd)</div><div class='ctx'> 		return SUCCESS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	iocb = &amp;lpfc_cmd-&gt;cur_iocbq;</div><div class='add'>+	/* the command is in process of being cancelled */</div><div class='add'>+	if (!(iocb-&gt;iocb_flag &amp; LPFC_IO_ON_TXCMPLQ)) {</div><div class='add'>+		spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+		lpfc_printf_vlog(vport, KERN_WARNING, LOG_FCP,</div><div class='add'>+			"3169 SCSI Layer abort requested I/O has been "</div><div class='add'>+			"cancelled by LLD.\n");</div><div class='add'>+		return FAILED;</div><div class='add'>+	}</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If pCmd field of the corresponding lpfc_scsi_buf structure</div><div class='ctx'> 	 * points to a different SCSI command, then the driver has</div><div class='ctx'> 	 * already completed this command, but the midlayer did not</div><div class='del'>-	 * see the completion before the eh fired.  Just return</div><div class='del'>-	 * SUCCESS.</div><div class='add'>+	 * see the completion before the eh fired. Just return SUCCESS.</div><div class='ctx'> 	 */</div><div class='del'>-	iocb = &amp;lpfc_cmd-&gt;cur_iocbq;</div><div class='del'>-	if (lpfc_cmd-&gt;pCmd != cmnd)</div><div class='del'>-		goto out;</div><div class='add'>+	if (lpfc_cmd-&gt;pCmd != cmnd) {</div><div class='add'>+		lpfc_printf_vlog(vport, KERN_WARNING, LOG_FCP,</div><div class='add'>+			"3170 SCSI Layer abort requested I/O has been "</div><div class='add'>+			"completed by LLD.\n");</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(iocb-&gt;context1 != lpfc_cmd);</div><div class='ctx'> </div><div class='del'>-	abtsiocb = lpfc_sli_get_iocbq(phba);</div><div class='add'>+	abtsiocb = __lpfc_sli_get_iocbq(phba);</div><div class='ctx'> 	if (abtsiocb == NULL) {</div><div class='ctx'> 		ret = FAILED;</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -4405,6 +4498,9 @@ lpfc_abort_handler(struct scsi_cmnd *cmnd)</div><div class='ctx'> </div><div class='ctx'> 	abtsiocb-&gt;iocb_cmpl = lpfc_sli_abort_fcp_cmpl;</div><div class='ctx'> 	abtsiocb-&gt;vport = vport;</div><div class='add'>+	/* no longer need the lock after this point */</div><div class='add'>+	spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+</div><div class='ctx'> 	if (lpfc_sli_issue_iocb(phba, LPFC_FCP_RING, abtsiocb, 0) ==</div><div class='ctx'> 	    IOCB_ERROR) {</div><div class='ctx'> 		lpfc_sli_release_iocbq(phba, abtsiocb);</div><div class='hunk'>@@ -4421,10 +4517,7 @@ lpfc_abort_handler(struct scsi_cmnd *cmnd)</div><div class='ctx'> 	wait_event_timeout(waitq,</div><div class='ctx'> 			  (lpfc_cmd-&gt;pCmd != cmnd),</div><div class='ctx'> 			   (2*vport-&gt;cfg_devloss_tmo*HZ));</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(shost-&gt;host_lock);</div><div class='ctx'> 	lpfc_cmd-&gt;waitq = NULL;</div><div class='del'>-	spin_unlock_irq(shost-&gt;host_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (lpfc_cmd-&gt;pCmd == cmnd) {</div><div class='ctx'> 		ret = FAILED;</div><div class='hunk'>@@ -4434,8 +4527,11 @@ lpfc_abort_handler(struct scsi_cmnd *cmnd)</div><div class='ctx'> 				 "LUN %d\n",</div><div class='ctx'> 				 ret, cmnd-&gt;device-&gt;id, cmnd-&gt;device-&gt;lun);</div><div class='ctx'> 	}</div><div class='add'>+	goto out;</div><div class='ctx'> </div><div class='del'>- out:</div><div class='add'>+out_unlock:</div><div class='add'>+	spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+out:</div><div class='ctx'> 	lpfc_printf_vlog(vport, KERN_WARNING, LOG_FCP,</div><div class='ctx'> 			 "0749 SCSI Layer I/O Abort Request Status x%x ID %d "</div><div class='ctx'> 			 "LUN %d\n", ret, cmnd-&gt;device-&gt;id,</div><div class='hunk'>@@ -4863,6 +4959,43 @@ lpfc_bus_reset_handler(struct scsi_cmnd *cmnd)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * lpfc_host_reset_handler - scsi_host_template eh_host_reset_handler entry pt</div><div class='add'>+ * @cmnd: Pointer to scsi_cmnd data structure.</div><div class='add'>+ *</div><div class='add'>+ * This routine does host reset to the adaptor port. It brings the HBA</div><div class='add'>+ * offline, performs a board restart, and then brings the board back online.</div><div class='add'>+ * The lpfc_offline calls lpfc_sli_hba_down which will abort and local</div><div class='add'>+ * reject all outstanding SCSI commands to the host and error returned</div><div class='add'>+ * back to SCSI mid-level. As this will be SCSI mid-level's last resort</div><div class='add'>+ * of error handling, it will only return error if resetting of the adapter</div><div class='add'>+ * is not successful; in all other cases, will return success.</div><div class='add'>+ *</div><div class='add'>+ * Return code :</div><div class='add'>+ *  0x2003 - Error</div><div class='add'>+ *  0x2002 - Success</div><div class='add'>+ **/</div><div class='add'>+static int</div><div class='add'>+lpfc_host_reset_handler(struct scsi_cmnd *cmnd)</div><div class='add'>+{</div><div class='add'>+	struct Scsi_Host *shost = cmnd-&gt;device-&gt;host;</div><div class='add'>+	struct lpfc_vport *vport = (struct lpfc_vport *) shost-&gt;hostdata;</div><div class='add'>+	struct lpfc_hba *phba = vport-&gt;phba;</div><div class='add'>+	int rc, ret = SUCCESS;</div><div class='add'>+</div><div class='add'>+	lpfc_offline_prep(phba);</div><div class='add'>+	lpfc_offline(phba);</div><div class='add'>+	rc = lpfc_sli_brdrestart(phba);</div><div class='add'>+	if (rc)</div><div class='add'>+		ret = FAILED;</div><div class='add'>+	lpfc_online(phba);</div><div class='add'>+	lpfc_unblock_mgmt_io(phba);</div><div class='add'>+</div><div class='add'>+	lpfc_printf_log(phba, KERN_ERR, LOG_FCP,</div><div class='add'>+			"3172 SCSI layer issued Host Reset Data: x%x\n", ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * lpfc_slave_alloc - scsi_host_template slave_alloc entry point</div><div class='ctx'>  * @sdev: Pointer to scsi_device.</div><div class='ctx'>  *</div><div class='hunk'>@@ -4994,6 +5127,7 @@ struct scsi_host_template lpfc_template = {</div><div class='ctx'> 	.eh_device_reset_handler = lpfc_device_reset_handler,</div><div class='ctx'> 	.eh_target_reset_handler = lpfc_target_reset_handler,</div><div class='ctx'> 	.eh_bus_reset_handler	= lpfc_bus_reset_handler,</div><div class='add'>+	.eh_host_reset_handler  = lpfc_host_reset_handler,</div><div class='ctx'> 	.slave_alloc		= lpfc_slave_alloc,</div><div class='ctx'> 	.slave_configure	= lpfc_slave_configure,</div><div class='ctx'> 	.slave_destroy		= lpfc_slave_destroy,</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c<br/>index dbaf5b963bff..b4720a109817 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_sli.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_sli.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_sli.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_sli.c</a></div><div class='hunk'>@@ -67,6 +67,8 @@ static void lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *,</div><div class='ctx'> 				      struct hbq_dmabuf *);</div><div class='ctx'> static int lpfc_sli4_fp_handle_wcqe(struct lpfc_hba *, struct lpfc_queue *,</div><div class='ctx'> 				    struct lpfc_cqe *);</div><div class='add'>+static int lpfc_sli4_post_els_sgl_list(struct lpfc_hba *, struct list_head *,</div><div class='add'>+				       int);</div><div class='ctx'> </div><div class='ctx'> static IOCB_t *</div><div class='ctx'> lpfc_get_iocb_from_iocbq(struct lpfc_iocbq *iocbq)</div><div class='hunk'>@@ -500,7 +502,7 @@ lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)</div><div class='ctx'>  * allocation is successful, it returns pointer to the newly</div><div class='ctx'>  * allocated iocb object else it returns NULL.</div><div class='ctx'>  **/</div><div class='del'>-static struct lpfc_iocbq *</div><div class='add'>+struct lpfc_iocbq *</div><div class='ctx'> __lpfc_sli_get_iocbq(struct lpfc_hba *phba)</div><div class='ctx'> {</div><div class='ctx'> 	struct list_head *lpfc_iocb_list = &amp;phba-&gt;lpfc_iocb_list;</div><div class='hunk'>@@ -875,6 +877,9 @@ __lpfc_sli_get_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)</div><div class='ctx'> 	} else  if ((piocbq-&gt;iocb.ulpCommand == CMD_GEN_REQUEST64_CR) &amp;&amp;</div><div class='ctx'> 			!(piocbq-&gt;iocb_flag &amp; LPFC_IO_LIBDFC))</div><div class='ctx'> 		ndlp = piocbq-&gt;context_un.ndlp;</div><div class='add'>+	else  if ((piocbq-&gt;iocb.ulpCommand == CMD_ELS_REQUEST64_CR) &amp;&amp;</div><div class='add'>+			(piocbq-&gt;iocb_flag &amp; LPFC_IO_LIBDFC))</div><div class='add'>+		ndlp = piocbq-&gt;context_un.ndlp;</div><div class='ctx'> 	else</div><div class='ctx'> 		ndlp = piocbq-&gt;context1;</div><div class='ctx'> </div><div class='hunk'>@@ -883,7 +888,7 @@ __lpfc_sli_get_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)</div><div class='ctx'> 	while (!found) {</div><div class='ctx'> 		if (!sglq)</div><div class='ctx'> 			return NULL;</div><div class='del'>-		if (lpfc_test_rrq_active(phba, ndlp, sglq-&gt;sli4_xritag)) {</div><div class='add'>+		if (lpfc_test_rrq_active(phba, ndlp, sglq-&gt;sli4_lxritag)) {</div><div class='ctx'> 			/* This xri has an rrq outstanding for this DID.</div><div class='ctx'> 			 * put it back in the list and get another xri.</div><div class='ctx'> 			 */</div><div class='hunk'>@@ -1257,7 +1262,7 @@ lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,</div><div class='ctx'> 			struct lpfc_iocbq *piocb)</div><div class='ctx'> {</div><div class='ctx'> 	list_add_tail(&amp;piocb-&gt;list, &amp;pring-&gt;txcmplq);</div><div class='del'>-	piocb-&gt;iocb_flag |= LPFC_IO_ON_Q;</div><div class='add'>+	piocb-&gt;iocb_flag |= LPFC_IO_ON_TXCMPLQ;</div><div class='ctx'> 	pring-&gt;txcmplq_cnt++;</div><div class='ctx'> 	if (pring-&gt;txcmplq_cnt &gt; pring-&gt;txcmplq_max)</div><div class='ctx'> 		pring-&gt;txcmplq_max = pring-&gt;txcmplq_cnt;</div><div class='hunk'>@@ -2556,9 +2561,9 @@ lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,</div><div class='ctx'> 	if (iotag != 0 &amp;&amp; iotag &lt;= phba-&gt;sli.last_iotag) {</div><div class='ctx'> 		cmd_iocb = phba-&gt;sli.iocbq_lookup[iotag];</div><div class='ctx'> 		list_del_init(&amp;cmd_iocb-&gt;list);</div><div class='del'>-		if (cmd_iocb-&gt;iocb_flag &amp; LPFC_IO_ON_Q) {</div><div class='add'>+		if (cmd_iocb-&gt;iocb_flag &amp; LPFC_IO_ON_TXCMPLQ) {</div><div class='ctx'> 			pring-&gt;txcmplq_cnt--;</div><div class='del'>-			cmd_iocb-&gt;iocb_flag &amp;= ~LPFC_IO_ON_Q;</div><div class='add'>+			cmd_iocb-&gt;iocb_flag &amp;= ~LPFC_IO_ON_TXCMPLQ;</div><div class='ctx'> 		}</div><div class='ctx'> 		return cmd_iocb;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2591,14 +2596,14 @@ lpfc_sli_iocbq_lookup_by_tag(struct lpfc_hba *phba,</div><div class='ctx'> </div><div class='ctx'> 	if (iotag != 0 &amp;&amp; iotag &lt;= phba-&gt;sli.last_iotag) {</div><div class='ctx'> 		cmd_iocb = phba-&gt;sli.iocbq_lookup[iotag];</div><div class='del'>-		list_del_init(&amp;cmd_iocb-&gt;list);</div><div class='del'>-		if (cmd_iocb-&gt;iocb_flag &amp; LPFC_IO_ON_Q) {</div><div class='del'>-			cmd_iocb-&gt;iocb_flag &amp;= ~LPFC_IO_ON_Q;</div><div class='add'>+		if (cmd_iocb-&gt;iocb_flag &amp; LPFC_IO_ON_TXCMPLQ) {</div><div class='add'>+			/* remove from txcmpl queue list */</div><div class='add'>+			list_del_init(&amp;cmd_iocb-&gt;list);</div><div class='add'>+			cmd_iocb-&gt;iocb_flag &amp;= ~LPFC_IO_ON_TXCMPLQ;</div><div class='ctx'> 			pring-&gt;txcmplq_cnt--;</div><div class='add'>+			return cmd_iocb;</div><div class='ctx'> 		}</div><div class='del'>-		return cmd_iocb;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='ctx'> 			"0372 iotag x%x is out off range: max iotag (x%x)\n",</div><div class='ctx'> 			iotag, phba-&gt;sli.last_iotag);</div><div class='hunk'>@@ -3466,6 +3471,9 @@ lpfc_sli_flush_fcp_rings(struct lpfc_hba *phba)</div><div class='ctx'> 	/* Retrieve everything on the txcmplq */</div><div class='ctx'> 	list_splice_init(&amp;pring-&gt;txcmplq, &amp;txcmplq);</div><div class='ctx'> 	pring-&gt;txcmplq_cnt = 0;</div><div class='add'>+</div><div class='add'>+	/* Indicate the I/O queues are flushed */</div><div class='add'>+	phba-&gt;hba_flag |= HBA_FCP_IOQ_FLUSH;</div><div class='ctx'> 	spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='ctx'> </div><div class='ctx'> 	/* Flush the txq */</div><div class='hunk'>@@ -3877,6 +3885,7 @@ lpfc_sli4_brdreset(struct lpfc_hba *phba)</div><div class='ctx'> {</div><div class='ctx'> 	struct lpfc_sli *psli = &amp;phba-&gt;sli;</div><div class='ctx'> 	uint16_t cfg_value;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	/* Reset HBA */</div><div class='ctx'> 	lpfc_printf_log(phba, KERN_INFO, LOG_SLI,</div><div class='hunk'>@@ -3905,12 +3914,12 @@ lpfc_sli4_brdreset(struct lpfc_hba *phba)</div><div class='ctx'> </div><div class='ctx'> 	/* Perform FCoE PCI function reset */</div><div class='ctx'> 	lpfc_sli4_queue_destroy(phba);</div><div class='del'>-	lpfc_pci_function_reset(phba);</div><div class='add'>+	rc = lpfc_pci_function_reset(phba);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore PCI cmd register */</div><div class='ctx'> 	pci_write_config_word(phba-&gt;pcidev, PCI_COMMAND, cfg_value);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4002,6 +4011,7 @@ lpfc_sli_brdrestart_s4(struct lpfc_hba *phba)</div><div class='ctx'> {</div><div class='ctx'> 	struct lpfc_sli *psli = &amp;phba-&gt;sli;</div><div class='ctx'> 	uint32_t hba_aer_enabled;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	/* Restart HBA */</div><div class='ctx'> 	lpfc_printf_log(phba, KERN_INFO, LOG_SLI,</div><div class='hunk'>@@ -4011,7 +4021,7 @@ lpfc_sli_brdrestart_s4(struct lpfc_hba *phba)</div><div class='ctx'> 	/* Take PCIe device Advanced Error Reporting (AER) state */</div><div class='ctx'> 	hba_aer_enabled = phba-&gt;hba_flag &amp; HBA_AER_ENABLED;</div><div class='ctx'> </div><div class='del'>-	lpfc_sli4_brdreset(phba);</div><div class='add'>+	rc = lpfc_sli4_brdreset(phba);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;phba-&gt;hbalock);</div><div class='ctx'> 	phba-&gt;pport-&gt;stopped = 0;</div><div class='hunk'>@@ -4028,7 +4038,7 @@ lpfc_sli_brdrestart_s4(struct lpfc_hba *phba)</div><div class='ctx'> </div><div class='ctx'> 	lpfc_hba_down_post(phba);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4967,7 +4977,12 @@ lpfc_sli4_get_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type,</div><div class='ctx'> 			      &amp;rsrc_info-&gt;u.rsp);</div><div class='ctx'> 	*extnt_size = bf_get(lpfc_mbx_get_rsrc_extent_info_size,</div><div class='ctx'> 			     &amp;rsrc_info-&gt;u.rsp);</div><div class='del'>- err_exit:</div><div class='add'>+</div><div class='add'>+	lpfc_printf_log(phba, KERN_INFO, LOG_SLI,</div><div class='add'>+			"3162 Retrieved extents type-%d from port: count:%d, "</div><div class='add'>+			"size:%d\n", type, *extnt_count, *extnt_size);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='ctx'> 	mempool_free(mbox, phba-&gt;mbox_mem_pool);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='hunk'>@@ -5051,7 +5066,7 @@ lpfc_sli4_chk_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type)</div><div class='ctx'>  *   0: if successful</div><div class='ctx'>  **/</div><div class='ctx'> static int</div><div class='del'>-lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t *extnt_cnt,</div><div class='add'>+lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t extnt_cnt,</div><div class='ctx'> 			  uint16_t type, bool *emb, LPFC_MBOXQ_t *mbox)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = 0;</div><div class='hunk'>@@ -5060,7 +5075,7 @@ lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t *extnt_cnt,</div><div class='ctx'> 	uint32_t alloc_len, mbox_tmo;</div><div class='ctx'> </div><div class='ctx'> 	/* Calculate the total requested length of the dma memory */</div><div class='del'>-	req_len = *extnt_cnt * sizeof(uint16_t);</div><div class='add'>+	req_len = extnt_cnt * sizeof(uint16_t);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Calculate the size of an embedded mailbox.  The uint32_t</div><div class='hunk'>@@ -5075,7 +5090,7 @@ lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t *extnt_cnt,</div><div class='ctx'> 	 */</div><div class='ctx'> 	*emb = LPFC_SLI4_MBX_EMBED;</div><div class='ctx'> 	if (req_len &gt; emb_len) {</div><div class='del'>-		req_len = *extnt_cnt * sizeof(uint16_t) +</div><div class='add'>+		req_len = extnt_cnt * sizeof(uint16_t) +</div><div class='ctx'> 			sizeof(union lpfc_sli4_cfg_shdr) +</div><div class='ctx'> 			sizeof(uint32_t);</div><div class='ctx'> 		*emb = LPFC_SLI4_MBX_NEMBED;</div><div class='hunk'>@@ -5091,7 +5106,7 @@ lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t *extnt_cnt,</div><div class='ctx'> 			"size (x%x)\n", alloc_len, req_len);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='del'>-	rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, *extnt_cnt, type, *emb);</div><div class='add'>+	rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, extnt_cnt, type, *emb);</div><div class='ctx'> 	if (unlikely(rc))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='hunk'>@@ -5149,17 +5164,15 @@ lpfc_sli4_alloc_extent(struct lpfc_hba *phba, uint16_t type)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_INIT,</div><div class='del'>-			"2903 Available Resource Extents "</div><div class='del'>-			"for resource type 0x%x: Count: 0x%x, "</div><div class='del'>-			"Size 0x%x\n", type, rsrc_cnt,</div><div class='del'>-			rsrc_size);</div><div class='add'>+	lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_INIT | LOG_SLI,</div><div class='add'>+			"2903 Post resource extents type-0x%x: "</div><div class='add'>+			"count:%d, size %d\n", type, rsrc_cnt, rsrc_size);</div><div class='ctx'> </div><div class='ctx'> 	mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba-&gt;mbox_mem_pool, GFP_KERNEL);</div><div class='ctx'> 	if (!mbox)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	rc = lpfc_sli4_cfg_post_extnts(phba, &amp;rsrc_cnt, type, &amp;emb, mbox);</div><div class='add'>+	rc = lpfc_sli4_cfg_post_extnts(phba, rsrc_cnt, type, &amp;emb, mbox);</div><div class='ctx'> 	if (unlikely(rc)) {</div><div class='ctx'> 		rc = -EIO;</div><div class='ctx'> 		goto err_exit;</div><div class='hunk'>@@ -5250,6 +5263,7 @@ lpfc_sli4_alloc_extent(struct lpfc_hba *phba, uint16_t type)</div><div class='ctx'> 			rc = -ENOMEM;</div><div class='ctx'> 			goto err_exit;</div><div class='ctx'> 		}</div><div class='add'>+		phba-&gt;sli4_hba.max_cfg_param.xri_used = 0;</div><div class='ctx'> 		phba-&gt;sli4_hba.xri_ids = kzalloc(rsrc_id_cnt *</div><div class='ctx'> 						 sizeof(uint16_t),</div><div class='ctx'> 						 GFP_KERNEL);</div><div class='hunk'>@@ -5420,7 +5434,6 @@ lpfc_sli4_dealloc_extent(struct lpfc_hba *phba, uint16_t type)</div><div class='ctx'> 	case LPFC_RSC_TYPE_FCOE_XRI:</div><div class='ctx'> 		kfree(phba-&gt;sli4_hba.xri_bmask);</div><div class='ctx'> 		kfree(phba-&gt;sli4_hba.xri_ids);</div><div class='del'>-		bf_set(lpfc_xri_rsrc_rdy, &amp;phba-&gt;sli4_hba.sli4_flags, 0);</div><div class='ctx'> 		list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,</div><div class='ctx'> 				    &amp;phba-&gt;sli4_hba.lpfc_xri_blk_list, list) {</div><div class='ctx'> 			list_del_init(&amp;rsrc_blk-&gt;list);</div><div class='hunk'>@@ -5612,7 +5625,6 @@ lpfc_sli4_alloc_resource_identifiers(struct lpfc_hba *phba)</div><div class='ctx'> 			goto free_vpi_ids;</div><div class='ctx'> 		}</div><div class='ctx'> 		phba-&gt;sli4_hba.max_cfg_param.xri_used = 0;</div><div class='del'>-		phba-&gt;sli4_hba.xri_count = 0;</div><div class='ctx'> 		phba-&gt;sli4_hba.xri_ids = kzalloc(count *</div><div class='ctx'> 						 sizeof(uint16_t),</div><div class='ctx'> 						 GFP_KERNEL);</div><div class='hunk'>@@ -5694,7 +5706,6 @@ lpfc_sli4_dealloc_resource_identifiers(struct lpfc_hba *phba)</div><div class='ctx'> 		bf_set(lpfc_vpi_rsrc_rdy, &amp;phba-&gt;sli4_hba.sli4_flags, 0);</div><div class='ctx'> 		kfree(phba-&gt;sli4_hba.xri_bmask);</div><div class='ctx'> 		kfree(phba-&gt;sli4_hba.xri_ids);</div><div class='del'>-		bf_set(lpfc_xri_rsrc_rdy, &amp;phba-&gt;sli4_hba.sli4_flags, 0);</div><div class='ctx'> 		kfree(phba-&gt;sli4_hba.vfi_bmask);</div><div class='ctx'> 		kfree(phba-&gt;sli4_hba.vfi_ids);</div><div class='ctx'> 		bf_set(lpfc_vfi_rsrc_rdy, &amp;phba-&gt;sli4_hba.sli4_flags, 0);</div><div class='hunk'>@@ -5853,6 +5864,149 @@ lpfc_sli4_get_allocated_extnts(struct lpfc_hba *phba, uint16_t type,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * lpfc_sli4_repost_els_sgl_list - Repsot the els buffers sgl pages as block</div><div class='add'>+ * @phba: pointer to lpfc hba data structure.</div><div class='add'>+ *</div><div class='add'>+ * This routine walks the list of els buffers that have been allocated and</div><div class='add'>+ * repost them to the port by using SGL block post. This is needed after a</div><div class='add'>+ * pci_function_reset/warm_start or start. It attempts to construct blocks</div><div class='add'>+ * of els buffer sgls which contains contiguous xris and uses the non-embedded</div><div class='add'>+ * SGL block post mailbox commands to post them to the port. For single els</div><div class='add'>+ * buffer sgl with non-contiguous xri, if any, it shall use embedded SGL post</div><div class='add'>+ * mailbox command for posting.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 = success, non-zero failure.</div><div class='add'>+ **/</div><div class='add'>+static int</div><div class='add'>+lpfc_sli4_repost_els_sgl_list(struct lpfc_hba *phba)</div><div class='add'>+{</div><div class='add'>+	struct lpfc_sglq *sglq_entry = NULL;</div><div class='add'>+	struct lpfc_sglq *sglq_entry_next = NULL;</div><div class='add'>+	struct lpfc_sglq *sglq_entry_first = NULL;</div><div class='add'>+	int status, post_cnt = 0, num_posted = 0, block_cnt = 0;</div><div class='add'>+	int last_xritag = NO_XRI;</div><div class='add'>+	LIST_HEAD(prep_sgl_list);</div><div class='add'>+	LIST_HEAD(blck_sgl_list);</div><div class='add'>+	LIST_HEAD(allc_sgl_list);</div><div class='add'>+	LIST_HEAD(post_sgl_list);</div><div class='add'>+	LIST_HEAD(free_sgl_list);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;phba-&gt;hbalock);</div><div class='add'>+	list_splice_init(&amp;phba-&gt;sli4_hba.lpfc_sgl_list, &amp;allc_sgl_list);</div><div class='add'>+	spin_unlock(&amp;phba-&gt;hbalock);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(sglq_entry, sglq_entry_next,</div><div class='add'>+				 &amp;allc_sgl_list, list) {</div><div class='add'>+		list_del_init(&amp;sglq_entry-&gt;list);</div><div class='add'>+		block_cnt++;</div><div class='add'>+		if ((last_xritag != NO_XRI) &amp;&amp;</div><div class='add'>+		    (sglq_entry-&gt;sli4_xritag != last_xritag + 1)) {</div><div class='add'>+			/* a hole in xri block, form a sgl posting block */</div><div class='add'>+			list_splice_init(&amp;prep_sgl_list, &amp;blck_sgl_list);</div><div class='add'>+			post_cnt = block_cnt - 1;</div><div class='add'>+			/* prepare list for next posting block */</div><div class='add'>+			list_add_tail(&amp;sglq_entry-&gt;list, &amp;prep_sgl_list);</div><div class='add'>+			block_cnt = 1;</div><div class='add'>+		} else {</div><div class='add'>+			/* prepare list for next posting block */</div><div class='add'>+			list_add_tail(&amp;sglq_entry-&gt;list, &amp;prep_sgl_list);</div><div class='add'>+			/* enough sgls for non-embed sgl mbox command */</div><div class='add'>+			if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {</div><div class='add'>+				list_splice_init(&amp;prep_sgl_list,</div><div class='add'>+						 &amp;blck_sgl_list);</div><div class='add'>+				post_cnt = block_cnt;</div><div class='add'>+				block_cnt = 0;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		num_posted++;</div><div class='add'>+</div><div class='add'>+		/* keep track of last sgl's xritag */</div><div class='add'>+		last_xritag = sglq_entry-&gt;sli4_xritag;</div><div class='add'>+</div><div class='add'>+		/* end of repost sgl list condition for els buffers */</div><div class='add'>+		if (num_posted == phba-&gt;sli4_hba.els_xri_cnt) {</div><div class='add'>+			if (post_cnt == 0) {</div><div class='add'>+				list_splice_init(&amp;prep_sgl_list,</div><div class='add'>+						 &amp;blck_sgl_list);</div><div class='add'>+				post_cnt = block_cnt;</div><div class='add'>+			} else if (block_cnt == 1) {</div><div class='add'>+				status = lpfc_sli4_post_sgl(phba,</div><div class='add'>+						sglq_entry-&gt;phys, 0,</div><div class='add'>+						sglq_entry-&gt;sli4_xritag);</div><div class='add'>+				if (!status) {</div><div class='add'>+					/* successful, put sgl to posted list */</div><div class='add'>+					list_add_tail(&amp;sglq_entry-&gt;list,</div><div class='add'>+						      &amp;post_sgl_list);</div><div class='add'>+				} else {</div><div class='add'>+					/* Failure, put sgl to free list */</div><div class='add'>+					lpfc_printf_log(phba, KERN_WARNING,</div><div class='add'>+						LOG_SLI,</div><div class='add'>+						"3159 Failed to post els "</div><div class='add'>+						"sgl, xritag:x%x\n",</div><div class='add'>+						sglq_entry-&gt;sli4_xritag);</div><div class='add'>+					list_add_tail(&amp;sglq_entry-&gt;list,</div><div class='add'>+						      &amp;free_sgl_list);</div><div class='add'>+					spin_lock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+					phba-&gt;sli4_hba.els_xri_cnt--;</div><div class='add'>+					spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* continue until a nembed page worth of sgls */</div><div class='add'>+		if (post_cnt == 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* post the els buffer list sgls as a block */</div><div class='add'>+		status = lpfc_sli4_post_els_sgl_list(phba, &amp;blck_sgl_list,</div><div class='add'>+						     post_cnt);</div><div class='add'>+</div><div class='add'>+		if (!status) {</div><div class='add'>+			/* success, put sgl list to posted sgl list */</div><div class='add'>+			list_splice_init(&amp;blck_sgl_list, &amp;post_sgl_list);</div><div class='add'>+		} else {</div><div class='add'>+			/* Failure, put sgl list to free sgl list */</div><div class='add'>+			sglq_entry_first = list_first_entry(&amp;blck_sgl_list,</div><div class='add'>+							    struct lpfc_sglq,</div><div class='add'>+							    list);</div><div class='add'>+			lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,</div><div class='add'>+					"3160 Failed to post els sgl-list, "</div><div class='add'>+					"xritag:x%x-x%x\n",</div><div class='add'>+					sglq_entry_first-&gt;sli4_xritag,</div><div class='add'>+					(sglq_entry_first-&gt;sli4_xritag +</div><div class='add'>+					 post_cnt - 1));</div><div class='add'>+			list_splice_init(&amp;blck_sgl_list, &amp;free_sgl_list);</div><div class='add'>+			spin_lock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+			phba-&gt;sli4_hba.els_xri_cnt -= post_cnt;</div><div class='add'>+			spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* don't reset xirtag due to hole in xri block */</div><div class='add'>+		if (block_cnt == 0)</div><div class='add'>+			last_xritag = NO_XRI;</div><div class='add'>+</div><div class='add'>+		/* reset els sgl post count for next round of posting */</div><div class='add'>+		post_cnt = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* free the els sgls failed to post */</div><div class='add'>+	lpfc_free_sgl_list(phba, &amp;free_sgl_list);</div><div class='add'>+</div><div class='add'>+	/* push els sgls posted to the availble list */</div><div class='add'>+	if (!list_empty(&amp;post_sgl_list)) {</div><div class='add'>+		spin_lock(&amp;phba-&gt;hbalock);</div><div class='add'>+		list_splice_init(&amp;post_sgl_list,</div><div class='add'>+				 &amp;phba-&gt;sli4_hba.lpfc_sgl_list);</div><div class='add'>+		spin_unlock(&amp;phba-&gt;hbalock);</div><div class='add'>+	} else {</div><div class='add'>+		lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='add'>+				"3161 Failure to post els sgl to port.\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * lpfc_sli4_hba_setup - SLI4 device intialization PCI function</div><div class='ctx'>  * @phba: Pointer to HBA context object.</div><div class='ctx'>  *</div><div class='hunk'>@@ -5923,6 +6077,8 @@ lpfc_sli4_hba_setup(struct lpfc_hba *phba)</div><div class='ctx'> 	else</div><div class='ctx'> 		phba-&gt;hba_flag &amp;= ~HBA_FIP_SUPPORT;</div><div class='ctx'> </div><div class='add'>+	phba-&gt;hba_flag &amp;= ~HBA_FCP_IOQ_FLUSH;</div><div class='add'>+</div><div class='ctx'> 	if (phba-&gt;sli_rev != LPFC_SLI_REV4) {</div><div class='ctx'> 		lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,</div><div class='ctx'> 			"0376 READ_REV Error. SLI Level %d "</div><div class='hunk'>@@ -6063,8 +6219,6 @@ lpfc_sli4_hba_setup(struct lpfc_hba *phba)</div><div class='ctx'> 				"rc = x%x\n", rc);</div><div class='ctx'> 		goto out_free_mbox;</div><div class='ctx'> 	}</div><div class='del'>-	/* update physical xri mappings in the scsi buffers */</div><div class='del'>-	lpfc_scsi_buf_update(phba);</div><div class='ctx'> </div><div class='ctx'> 	/* Read the port's service parameters. */</div><div class='ctx'> 	rc = lpfc_read_sparam(phba, mboxq, vport-&gt;vpi);</div><div class='hunk'>@@ -6105,28 +6259,26 @@ lpfc_sli4_hba_setup(struct lpfc_hba *phba)</div><div class='ctx'> 	fc_host_node_name(shost) = wwn_to_u64(vport-&gt;fc_nodename.u.wwn);</div><div class='ctx'> 	fc_host_port_name(shost) = wwn_to_u64(vport-&gt;fc_portname.u.wwn);</div><div class='ctx'> </div><div class='del'>-	/* Register SGL pool to the device using non-embedded mailbox command */</div><div class='del'>-	if (!phba-&gt;sli4_hba.extents_in_use) {</div><div class='del'>-		rc = lpfc_sli4_post_els_sgl_list(phba);</div><div class='del'>-		if (unlikely(rc)) {</div><div class='del'>-			lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,</div><div class='del'>-					"0582 Error %d during els sgl post "</div><div class='del'>-					"operation\n", rc);</div><div class='del'>-			rc = -ENODEV;</div><div class='del'>-			goto out_free_mbox;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		rc = lpfc_sli4_post_els_sgl_list_ext(phba);</div><div class='del'>-		if (unlikely(rc)) {</div><div class='del'>-			lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,</div><div class='del'>-					"2560 Error %d during els sgl post "</div><div class='del'>-					"operation\n", rc);</div><div class='del'>-			rc = -ENODEV;</div><div class='del'>-			goto out_free_mbox;</div><div class='del'>-		}</div><div class='add'>+	/* update host els and scsi xri-sgl sizes and mappings */</div><div class='add'>+	rc = lpfc_sli4_xri_sgl_update(phba);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,</div><div class='add'>+				"1400 Failed to update xri-sgl size and "</div><div class='add'>+				"mapping: %d\n", rc);</div><div class='add'>+		goto out_free_mbox;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Register SCSI SGL pool to the device */</div><div class='add'>+	/* register the els sgl pool to the port */</div><div class='add'>+	rc = lpfc_sli4_repost_els_sgl_list(phba);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,</div><div class='add'>+				"0582 Error %d during els sgl post "</div><div class='add'>+				"operation\n", rc);</div><div class='add'>+		rc = -ENODEV;</div><div class='add'>+		goto out_free_mbox;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* register the allocated scsi sgl pool to the port */</div><div class='ctx'> 	rc = lpfc_sli4_repost_scsi_sgl_list(phba);</div><div class='ctx'> 	if (unlikely(rc)) {</div><div class='ctx'> 		lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,</div><div class='hunk'>@@ -7060,14 +7212,19 @@ lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,</div><div class='ctx'> 		if (rc != MBX_SUCCESS)</div><div class='ctx'> 			lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,</div><div class='ctx'> 					"(%d):2541 Mailbox command x%x "</div><div class='del'>-					"(x%x/x%x) cannot issue Data: "</div><div class='del'>-					"x%x x%x\n",</div><div class='add'>+					"(x%x/x%x) failure: "</div><div class='add'>+					"mqe_sta: x%x mcqe_sta: x%x/x%x "</div><div class='add'>+					"Data: x%x x%x\n,",</div><div class='ctx'> 					mboxq-&gt;vport ? mboxq-&gt;vport-&gt;vpi : 0,</div><div class='ctx'> 					mboxq-&gt;u.mb.mbxCommand,</div><div class='ctx'> 					lpfc_sli_config_mbox_subsys_get(phba,</div><div class='ctx'> 									mboxq),</div><div class='ctx'> 					lpfc_sli_config_mbox_opcode_get(phba,</div><div class='ctx'> 									mboxq),</div><div class='add'>+					bf_get(lpfc_mqe_status, &amp;mboxq-&gt;u.mqe),</div><div class='add'>+					bf_get(lpfc_mcqe_status, &amp;mboxq-&gt;mcqe),</div><div class='add'>+					bf_get(lpfc_mcqe_ext_status,</div><div class='add'>+					       &amp;mboxq-&gt;mcqe),</div><div class='ctx'> 					psli-&gt;sli_flag, flag);</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	} else if (flag == MBX_POLL) {</div><div class='hunk'>@@ -7086,18 +7243,22 @@ lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,</div><div class='ctx'> 			/* Successfully blocked, now issue sync mbox cmd */</div><div class='ctx'> 			rc = lpfc_sli4_post_sync_mbox(phba, mboxq);</div><div class='ctx'> 			if (rc != MBX_SUCCESS)</div><div class='del'>-				lpfc_printf_log(phba, KERN_ERR,</div><div class='add'>+				lpfc_printf_log(phba, KERN_WARNING,</div><div class='ctx'> 					LOG_MBOX | LOG_SLI,</div><div class='del'>-					"(%d):2597 Mailbox command "</div><div class='del'>-					"x%x (x%x/x%x) cannot issue "</div><div class='del'>-					"Data: x%x x%x\n",</div><div class='del'>-					mboxq-&gt;vport ?</div><div class='del'>-					mboxq-&gt;vport-&gt;vpi : 0,</div><div class='add'>+					"(%d):2597 Sync Mailbox command "</div><div class='add'>+					"x%x (x%x/x%x) failure: "</div><div class='add'>+					"mqe_sta: x%x mcqe_sta: x%x/x%x "</div><div class='add'>+					"Data: x%x x%x\n,",</div><div class='add'>+					mboxq-&gt;vport ? mboxq-&gt;vport-&gt;vpi : 0,</div><div class='ctx'> 					mboxq-&gt;u.mb.mbxCommand,</div><div class='ctx'> 					lpfc_sli_config_mbox_subsys_get(phba,</div><div class='ctx'> 									mboxq),</div><div class='ctx'> 					lpfc_sli_config_mbox_opcode_get(phba,</div><div class='ctx'> 									mboxq),</div><div class='add'>+					bf_get(lpfc_mqe_status, &amp;mboxq-&gt;u.mqe),</div><div class='add'>+					bf_get(lpfc_mcqe_status, &amp;mboxq-&gt;mcqe),</div><div class='add'>+					bf_get(lpfc_mcqe_ext_status,</div><div class='add'>+					       &amp;mboxq-&gt;mcqe),</div><div class='ctx'> 					psli-&gt;sli_flag, flag);</div><div class='ctx'> 			/* Unblock the async mailbox posting afterward */</div><div class='ctx'> 			lpfc_sli4_async_mbox_unblock(phba);</div><div class='hunk'>@@ -7712,7 +7873,10 @@ lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,</div><div class='ctx'> </div><div class='ctx'> 	switch (iocbq-&gt;iocb.ulpCommand) {</div><div class='ctx'> 	case CMD_ELS_REQUEST64_CR:</div><div class='del'>-		ndlp = (struct lpfc_nodelist *)iocbq-&gt;context1;</div><div class='add'>+		if (iocbq-&gt;iocb_flag &amp; LPFC_IO_LIBDFC)</div><div class='add'>+			ndlp = iocbq-&gt;context_un.ndlp;</div><div class='add'>+		else</div><div class='add'>+			ndlp = (struct lpfc_nodelist *)iocbq-&gt;context1;</div><div class='ctx'> 		if (!iocbq-&gt;iocb.ulpLe) {</div><div class='ctx'> 			lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='ctx'> 				"2007 Only Limited Edition cmd Format"</div><div class='hunk'>@@ -7751,9 +7915,13 @@ lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,</div><div class='ctx'> 				bf_set(els_req64_sp, &amp;wqe-&gt;els_req, 1);</div><div class='ctx'> 				bf_set(els_req64_sid, &amp;wqe-&gt;els_req,</div><div class='ctx'> 					iocbq-&gt;vport-&gt;fc_myDID);</div><div class='add'>+				if ((*pcmd == ELS_CMD_FLOGI) &amp;&amp;</div><div class='add'>+					!(phba-&gt;fc_topology ==</div><div class='add'>+						LPFC_TOPOLOGY_LOOP))</div><div class='add'>+					bf_set(els_req64_sid, &amp;wqe-&gt;els_req, 0);</div><div class='ctx'> 				bf_set(wqe_ct, &amp;wqe-&gt;els_req.wqe_com, 1);</div><div class='ctx'> 				bf_set(wqe_ctxt_tag, &amp;wqe-&gt;els_req.wqe_com,</div><div class='del'>-					phba-&gt;vpi_ids[phba-&gt;pport-&gt;vpi]);</div><div class='add'>+					phba-&gt;vpi_ids[iocbq-&gt;vport-&gt;vpi]);</div><div class='ctx'> 			} else if (pcmd &amp;&amp; iocbq-&gt;context1) {</div><div class='ctx'> 				bf_set(wqe_ct, &amp;wqe-&gt;els_req.wqe_com, 0);</div><div class='ctx'> 				bf_set(wqe_ctxt_tag, &amp;wqe-&gt;els_req.wqe_com,</div><div class='hunk'>@@ -7908,11 +8076,25 @@ lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,</div><div class='ctx'> 		/* words0-2 BDE memcpy */</div><div class='ctx'> 		/* word3 iocb=iotag32 wqe=response_payload_len */</div><div class='ctx'> 		wqe-&gt;xmit_els_rsp.response_payload_len = xmit_len;</div><div class='del'>-		/* word4 iocb=did wge=rsvd. */</div><div class='del'>-		wqe-&gt;xmit_els_rsp.rsvd4 = 0;</div><div class='add'>+		/* word4 */</div><div class='add'>+		wqe-&gt;xmit_els_rsp.word4 = 0;</div><div class='ctx'> 		/* word5 iocb=rsvd wge=did */</div><div class='ctx'> 		bf_set(wqe_els_did, &amp;wqe-&gt;xmit_els_rsp.wqe_dest,</div><div class='del'>-			 iocbq-&gt;iocb.un.elsreq64.remoteID);</div><div class='add'>+			 iocbq-&gt;iocb.un.xseq64.xmit_els_remoteID);</div><div class='add'>+</div><div class='add'>+		if_type = bf_get(lpfc_sli_intf_if_type,</div><div class='add'>+					&amp;phba-&gt;sli4_hba.sli_intf);</div><div class='add'>+		if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {</div><div class='add'>+			if (iocbq-&gt;vport-&gt;fc_flag &amp; FC_PT2PT) {</div><div class='add'>+				bf_set(els_rsp64_sp, &amp;wqe-&gt;xmit_els_rsp, 1);</div><div class='add'>+				bf_set(els_rsp64_sid, &amp;wqe-&gt;xmit_els_rsp,</div><div class='add'>+					iocbq-&gt;vport-&gt;fc_myDID);</div><div class='add'>+				if (iocbq-&gt;vport-&gt;fc_myDID == Fabric_DID) {</div><div class='add'>+					bf_set(wqe_els_did,</div><div class='add'>+						&amp;wqe-&gt;xmit_els_rsp.wqe_dest, 0);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 		bf_set(wqe_ct, &amp;wqe-&gt;xmit_els_rsp.wqe_com,</div><div class='ctx'> 		       ((iocbq-&gt;iocb.ulpCt_h &lt;&lt; 1) | iocbq-&gt;iocb.ulpCt_l));</div><div class='ctx'> 		bf_set(wqe_pu, &amp;wqe-&gt;xmit_els_rsp.wqe_com, iocbq-&gt;iocb.ulpPU);</div><div class='hunk'>@@ -7932,11 +8114,11 @@ lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,</div><div class='ctx'> 		pcmd = (uint32_t *) (((struct lpfc_dmabuf *)</div><div class='ctx'> 					iocbq-&gt;context2)-&gt;virt);</div><div class='ctx'> 		if (phba-&gt;fc_topology == LPFC_TOPOLOGY_LOOP) {</div><div class='del'>-				bf_set(els_req64_sp, &amp;wqe-&gt;els_req, 1);</div><div class='del'>-				bf_set(els_req64_sid, &amp;wqe-&gt;els_req,</div><div class='add'>+				bf_set(els_rsp64_sp, &amp;wqe-&gt;xmit_els_rsp, 1);</div><div class='add'>+				bf_set(els_rsp64_sid, &amp;wqe-&gt;xmit_els_rsp,</div><div class='ctx'> 					iocbq-&gt;vport-&gt;fc_myDID);</div><div class='del'>-				bf_set(wqe_ct, &amp;wqe-&gt;els_req.wqe_com, 1);</div><div class='del'>-				bf_set(wqe_ctxt_tag, &amp;wqe-&gt;els_req.wqe_com,</div><div class='add'>+				bf_set(wqe_ct, &amp;wqe-&gt;xmit_els_rsp.wqe_com, 1);</div><div class='add'>+				bf_set(wqe_ctxt_tag, &amp;wqe-&gt;xmit_els_rsp.wqe_com,</div><div class='ctx'> 					phba-&gt;vpi_ids[phba-&gt;pport-&gt;vpi]);</div><div class='ctx'> 		}</div><div class='ctx'> 		command_type = OTHER_COMMAND;</div><div class='hunk'>@@ -13080,9 +13262,7 @@ lpfc_sli4_alloc_xri(struct lpfc_hba *phba)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		set_bit(xri, phba-&gt;sli4_hba.xri_bmask);</div><div class='ctx'> 		phba-&gt;sli4_hba.max_cfg_param.xri_used++;</div><div class='del'>-		phba-&gt;sli4_hba.xri_count++;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	spin_unlock_irq(&amp;phba-&gt;hbalock);</div><div class='ctx'> 	return xri;</div><div class='ctx'> }</div><div class='hunk'>@@ -13098,7 +13278,6 @@ void</div><div class='ctx'> __lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)</div><div class='ctx'> {</div><div class='ctx'> 	if (test_and_clear_bit(xri, phba-&gt;sli4_hba.xri_bmask)) {</div><div class='del'>-		phba-&gt;sli4_hba.xri_count--;</div><div class='ctx'> 		phba-&gt;sli4_hba.max_cfg_param.xri_used--;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -13134,46 +13313,45 @@ lpfc_sli4_next_xritag(struct lpfc_hba *phba)</div><div class='ctx'> 	uint16_t xri_index;</div><div class='ctx'> </div><div class='ctx'> 	xri_index = lpfc_sli4_alloc_xri(phba);</div><div class='del'>-	if (xri_index != NO_XRI)</div><div class='del'>-		return xri_index;</div><div class='del'>-</div><div class='del'>-	lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='del'>-			"2004 Failed to allocate XRI.last XRITAG is %d"</div><div class='del'>-			" Max XRI is %d, Used XRI is %d\n",</div><div class='del'>-			xri_index,</div><div class='del'>-			phba-&gt;sli4_hba.max_cfg_param.max_xri,</div><div class='del'>-			phba-&gt;sli4_hba.max_cfg_param.xri_used);</div><div class='del'>-	return NO_XRI;</div><div class='add'>+	if (xri_index == NO_XRI)</div><div class='add'>+		lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,</div><div class='add'>+				"2004 Failed to allocate XRI.last XRITAG is %d"</div><div class='add'>+				" Max XRI is %d, Used XRI is %d\n",</div><div class='add'>+				xri_index,</div><div class='add'>+				phba-&gt;sli4_hba.max_cfg_param.max_xri,</div><div class='add'>+				phba-&gt;sli4_hba.max_cfg_param.xri_used);</div><div class='add'>+	return xri_index;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * lpfc_sli4_post_els_sgl_list - post a block of ELS sgls to the port.</div><div class='ctx'>  * @phba: pointer to lpfc hba data structure.</div><div class='add'>+ * @post_sgl_list: pointer to els sgl entry list.</div><div class='add'>+ * @count: number of els sgl entries on the list.</div><div class='ctx'>  *</div><div class='ctx'>  * This routine is invoked to post a block of driver's sgl pages to the</div><div class='ctx'>  * HBA using non-embedded mailbox command. No Lock is held. This routine</div><div class='ctx'>  * is only called when the driver is loading and after all IO has been</div><div class='ctx'>  * stopped.</div><div class='ctx'>  **/</div><div class='del'>-int</div><div class='del'>-lpfc_sli4_post_els_sgl_list(struct lpfc_hba *phba)</div><div class='add'>+static int</div><div class='add'>+lpfc_sli4_post_els_sgl_list(struct lpfc_hba *phba,</div><div class='add'>+			    struct list_head *post_sgl_list,</div><div class='add'>+			    int post_cnt)</div><div class='ctx'> {</div><div class='del'>-	struct lpfc_sglq *sglq_entry;</div><div class='add'>+	struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;</div><div class='ctx'> 	struct lpfc_mbx_post_uembed_sgl_page1 *sgl;</div><div class='ctx'> 	struct sgl_page_pairs *sgl_pg_pairs;</div><div class='ctx'> 	void *viraddr;</div><div class='ctx'> 	LPFC_MBOXQ_t *mbox;</div><div class='ctx'> 	uint32_t reqlen, alloclen, pg_pairs;</div><div class='ctx'> 	uint32_t mbox_tmo;</div><div class='del'>-	uint16_t xritag_start = 0, lxri = 0;</div><div class='del'>-	int els_xri_cnt, rc = 0;</div><div class='add'>+	uint16_t xritag_start = 0;</div><div class='add'>+	int rc = 0;</div><div class='ctx'> 	uint32_t shdr_status, shdr_add_status;</div><div class='ctx'> 	union lpfc_sli4_cfg_shdr *shdr;</div><div class='ctx'> </div><div class='del'>-	/* The number of sgls to be posted */</div><div class='del'>-	els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);</div><div class='del'>-</div><div class='del'>-	reqlen = els_xri_cnt * sizeof(struct sgl_page_pairs) +</div><div class='add'>+	reqlen = phba-&gt;sli4_hba.els_xri_cnt * sizeof(struct sgl_page_pairs) +</div><div class='ctx'> 		 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);</div><div class='ctx'> 	if (reqlen &gt; SLI4_PAGE_SIZE) {</div><div class='ctx'> 		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,</div><div class='hunk'>@@ -13203,25 +13381,8 @@ lpfc_sli4_post_els_sgl_list(struct lpfc_hba *phba)</div><div class='ctx'> 	sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;</div><div class='ctx'> 	sgl_pg_pairs = &amp;sgl-&gt;sgl_pg_pairs;</div><div class='ctx'> </div><div class='del'>-	for (pg_pairs = 0; pg_pairs &lt; els_xri_cnt; pg_pairs++) {</div><div class='del'>-		sglq_entry = phba-&gt;sli4_hba.lpfc_els_sgl_array[pg_pairs];</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Assign the sglq a physical xri only if the driver has not</div><div class='del'>-		 * initialized those resources.  A port reset only needs</div><div class='del'>-		 * the sglq's posted.</div><div class='del'>-		 */</div><div class='del'>-		if (bf_get(lpfc_xri_rsrc_rdy, &amp;phba-&gt;sli4_hba.sli4_flags) !=</div><div class='del'>-		    LPFC_XRI_RSRC_RDY) {</div><div class='del'>-			lxri = lpfc_sli4_next_xritag(phba);</div><div class='del'>-			if (lxri == NO_XRI) {</div><div class='del'>-				lpfc_sli4_mbox_cmd_free(phba, mbox);</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-			}</div><div class='del'>-			sglq_entry-&gt;sli4_lxritag = lxri;</div><div class='del'>-			sglq_entry-&gt;sli4_xritag = phba-&gt;sli4_hba.xri_ids[lxri];</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+	pg_pairs = 0;</div><div class='add'>+	list_for_each_entry_safe(sglq_entry, sglq_next, post_sgl_list, list) {</div><div class='ctx'> 		/* Set up the sge entry */</div><div class='ctx'> 		sgl_pg_pairs-&gt;sgl_pg0_addr_lo =</div><div class='ctx'> 				cpu_to_le32(putPaddrLow(sglq_entry-&gt;phys));</div><div class='hunk'>@@ -13236,11 +13397,12 @@ lpfc_sli4_post_els_sgl_list(struct lpfc_hba *phba)</div><div class='ctx'> 		if (pg_pairs == 0)</div><div class='ctx'> 			xritag_start = sglq_entry-&gt;sli4_xritag;</div><div class='ctx'> 		sgl_pg_pairs++;</div><div class='add'>+		pg_pairs++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Complete initialization and perform endian conversion. */</div><div class='ctx'> 	bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);</div><div class='del'>-	bf_set(lpfc_post_sgl_pages_xricnt, sgl, els_xri_cnt);</div><div class='add'>+	bf_set(lpfc_post_sgl_pages_xricnt, sgl, phba-&gt;sli4_hba.els_xri_cnt);</div><div class='ctx'> 	sgl-&gt;word0 = cpu_to_le32(sgl-&gt;word0);</div><div class='ctx'> 	if (!phba-&gt;sli4_hba.intr_enable)</div><div class='ctx'> 		rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);</div><div class='hunk'>@@ -13260,183 +13422,6 @@ lpfc_sli4_post_els_sgl_list(struct lpfc_hba *phba)</div><div class='ctx'> 				shdr_status, shdr_add_status, rc);</div><div class='ctx'> 		rc = -ENXIO;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (rc == 0)</div><div class='del'>-		bf_set(lpfc_xri_rsrc_rdy, &amp;phba-&gt;sli4_hba.sli4_flags,</div><div class='del'>-		       LPFC_XRI_RSRC_RDY);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * lpfc_sli4_post_els_sgl_list_ext - post a block of ELS sgls to the port.</div><div class='del'>- * @phba: pointer to lpfc hba data structure.</div><div class='del'>- *</div><div class='del'>- * This routine is invoked to post a block of driver's sgl pages to the</div><div class='del'>- * HBA using non-embedded mailbox command. No Lock is held. This routine</div><div class='del'>- * is only called when the driver is loading and after all IO has been</div><div class='del'>- * stopped.</div><div class='del'>- **/</div><div class='del'>-int</div><div class='del'>-lpfc_sli4_post_els_sgl_list_ext(struct lpfc_hba *phba)</div><div class='del'>-{</div><div class='del'>-	struct lpfc_sglq *sglq_entry;</div><div class='del'>-	struct lpfc_mbx_post_uembed_sgl_page1 *sgl;</div><div class='del'>-	struct sgl_page_pairs *sgl_pg_pairs;</div><div class='del'>-	void *viraddr;</div><div class='del'>-	LPFC_MBOXQ_t *mbox;</div><div class='del'>-	uint32_t reqlen, alloclen, index;</div><div class='del'>-	uint32_t mbox_tmo;</div><div class='del'>-	uint16_t rsrc_start, rsrc_size, els_xri_cnt, post_els_xri_cnt;</div><div class='del'>-	uint16_t xritag_start = 0, lxri = 0;</div><div class='del'>-	struct lpfc_rsrc_blks *rsrc_blk;</div><div class='del'>-	int cnt, ttl_cnt, rc = 0;</div><div class='del'>-	int loop_cnt;</div><div class='del'>-	uint32_t shdr_status, shdr_add_status;</div><div class='del'>-	union lpfc_sli4_cfg_shdr *shdr;</div><div class='del'>-</div><div class='del'>-	/* The number of sgls to be posted */</div><div class='del'>-	els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);</div><div class='del'>-</div><div class='del'>-	reqlen = els_xri_cnt * sizeof(struct sgl_page_pairs) +</div><div class='del'>-		 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);</div><div class='del'>-	if (reqlen &gt; SLI4_PAGE_SIZE) {</div><div class='del'>-		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,</div><div class='del'>-				"2989 Block sgl registration required DMA "</div><div class='del'>-				"size (%d) great than a page\n", reqlen);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cnt = 0;</div><div class='del'>-	ttl_cnt = 0;</div><div class='del'>-	post_els_xri_cnt = els_xri_cnt;</div><div class='del'>-	list_for_each_entry(rsrc_blk, &amp;phba-&gt;sli4_hba.lpfc_xri_blk_list,</div><div class='del'>-			    list) {</div><div class='del'>-		rsrc_start = rsrc_blk-&gt;rsrc_start;</div><div class='del'>-		rsrc_size = rsrc_blk-&gt;rsrc_size;</div><div class='del'>-</div><div class='del'>-		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,</div><div class='del'>-				"3014 Working ELS Extent start %d, cnt %d\n",</div><div class='del'>-				rsrc_start, rsrc_size);</div><div class='del'>-</div><div class='del'>-		loop_cnt = min(post_els_xri_cnt, rsrc_size);</div><div class='del'>-		if (loop_cnt &lt; post_els_xri_cnt) {</div><div class='del'>-			post_els_xri_cnt -= loop_cnt;</div><div class='del'>-			ttl_cnt += loop_cnt;</div><div class='del'>-		} else</div><div class='del'>-			ttl_cnt += post_els_xri_cnt;</div><div class='del'>-</div><div class='del'>-		mbox = mempool_alloc(phba-&gt;mbox_mem_pool, GFP_KERNEL);</div><div class='del'>-		if (!mbox)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		/*</div><div class='del'>-		 * Allocate DMA memory and set up the non-embedded mailbox</div><div class='del'>-		 * command.</div><div class='del'>-		 */</div><div class='del'>-		alloclen = lpfc_sli4_config(phba, mbox,</div><div class='del'>-					LPFC_MBOX_SUBSYSTEM_FCOE,</div><div class='del'>-					LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,</div><div class='del'>-					reqlen, LPFC_SLI4_MBX_NEMBED);</div><div class='del'>-		if (alloclen &lt; reqlen) {</div><div class='del'>-			lpfc_printf_log(phba, KERN_ERR, LOG_INIT,</div><div class='del'>-					"2987 Allocated DMA memory size (%d) "</div><div class='del'>-					"is less than the requested DMA memory "</div><div class='del'>-					"size (%d)\n", alloclen, reqlen);</div><div class='del'>-			lpfc_sli4_mbox_cmd_free(phba, mbox);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Set up the SGL pages in the non-embedded DMA pages */</div><div class='del'>-		viraddr = mbox-&gt;sge_array-&gt;addr[0];</div><div class='del'>-		sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;</div><div class='del'>-		sgl_pg_pairs = &amp;sgl-&gt;sgl_pg_pairs;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * The starting resource may not begin at zero. Control</div><div class='del'>-		 * the loop variants via the block resource parameters,</div><div class='del'>-		 * but handle the sge pointers with a zero-based index</div><div class='del'>-		 * that doesn't get reset per loop pass.</div><div class='del'>-		 */</div><div class='del'>-		for (index = rsrc_start;</div><div class='del'>-		     index &lt; rsrc_start + loop_cnt;</div><div class='del'>-		     index++) {</div><div class='del'>-			sglq_entry = phba-&gt;sli4_hba.lpfc_els_sgl_array[cnt];</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Assign the sglq a physical xri only if the driver</div><div class='del'>-			 * has not initialized those resources.  A port reset</div><div class='del'>-			 * only needs the sglq's posted.</div><div class='del'>-			 */</div><div class='del'>-			if (bf_get(lpfc_xri_rsrc_rdy,</div><div class='del'>-				   &amp;phba-&gt;sli4_hba.sli4_flags) !=</div><div class='del'>-				   LPFC_XRI_RSRC_RDY) {</div><div class='del'>-				lxri = lpfc_sli4_next_xritag(phba);</div><div class='del'>-				if (lxri == NO_XRI) {</div><div class='del'>-					lpfc_sli4_mbox_cmd_free(phba, mbox);</div><div class='del'>-					rc = -ENOMEM;</div><div class='del'>-					goto err_exit;</div><div class='del'>-				}</div><div class='del'>-				sglq_entry-&gt;sli4_lxritag = lxri;</div><div class='del'>-				sglq_entry-&gt;sli4_xritag =</div><div class='del'>-						phba-&gt;sli4_hba.xri_ids[lxri];</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* Set up the sge entry */</div><div class='del'>-			sgl_pg_pairs-&gt;sgl_pg0_addr_lo =</div><div class='del'>-				cpu_to_le32(putPaddrLow(sglq_entry-&gt;phys));</div><div class='del'>-			sgl_pg_pairs-&gt;sgl_pg0_addr_hi =</div><div class='del'>-				cpu_to_le32(putPaddrHigh(sglq_entry-&gt;phys));</div><div class='del'>-			sgl_pg_pairs-&gt;sgl_pg1_addr_lo =</div><div class='del'>-				cpu_to_le32(putPaddrLow(0));</div><div class='del'>-			sgl_pg_pairs-&gt;sgl_pg1_addr_hi =</div><div class='del'>-				cpu_to_le32(putPaddrHigh(0));</div><div class='del'>-</div><div class='del'>-			/* Track the starting physical XRI for the mailbox. */</div><div class='del'>-			if (index == rsrc_start)</div><div class='del'>-				xritag_start = sglq_entry-&gt;sli4_xritag;</div><div class='del'>-			sgl_pg_pairs++;</div><div class='del'>-			cnt++;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Complete initialization and perform endian conversion. */</div><div class='del'>-		rsrc_blk-&gt;rsrc_used += loop_cnt;</div><div class='del'>-		bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);</div><div class='del'>-		bf_set(lpfc_post_sgl_pages_xricnt, sgl, loop_cnt);</div><div class='del'>-		sgl-&gt;word0 = cpu_to_le32(sgl-&gt;word0);</div><div class='del'>-</div><div class='del'>-		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,</div><div class='del'>-				"3015 Post ELS Extent SGL, start %d, "</div><div class='del'>-				"cnt %d, used %d\n",</div><div class='del'>-				xritag_start, loop_cnt, rsrc_blk-&gt;rsrc_used);</div><div class='del'>-		if (!phba-&gt;sli4_hba.intr_enable)</div><div class='del'>-			rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);</div><div class='del'>-		else {</div><div class='del'>-			mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);</div><div class='del'>-			rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);</div><div class='del'>-		}</div><div class='del'>-		shdr = (union lpfc_sli4_cfg_shdr *) &amp;sgl-&gt;cfg_shdr;</div><div class='del'>-		shdr_status = bf_get(lpfc_mbox_hdr_status,</div><div class='del'>-				     &amp;shdr-&gt;response);</div><div class='del'>-		shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,</div><div class='del'>-					 &amp;shdr-&gt;response);</div><div class='del'>-		if (rc != MBX_TIMEOUT)</div><div class='del'>-			lpfc_sli4_mbox_cmd_free(phba, mbox);</div><div class='del'>-		if (shdr_status || shdr_add_status || rc) {</div><div class='del'>-			lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='del'>-					"2988 POST_SGL_BLOCK mailbox "</div><div class='del'>-					"command failed status x%x "</div><div class='del'>-					"add_status x%x mbx status x%x\n",</div><div class='del'>-					shdr_status, shdr_add_status, rc);</div><div class='del'>-			rc = -ENXIO;</div><div class='del'>-			goto err_exit;</div><div class='del'>-		}</div><div class='del'>-		if (ttl_cnt &gt;= els_xri_cnt)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>- err_exit:</div><div class='del'>-	if (rc == 0)</div><div class='del'>-		bf_set(lpfc_xri_rsrc_rdy, &amp;phba-&gt;sli4_hba.sli4_flags,</div><div class='del'>-		       LPFC_XRI_RSRC_RDY);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -13452,8 +13437,9 @@ lpfc_sli4_post_els_sgl_list_ext(struct lpfc_hba *phba)</div><div class='ctx'>  *</div><div class='ctx'>  **/</div><div class='ctx'> int</div><div class='del'>-lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *phba, struct list_head *sblist,</div><div class='del'>-			      int cnt)</div><div class='add'>+lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *phba,</div><div class='add'>+			      struct list_head *sblist,</div><div class='add'>+			      int count)</div><div class='ctx'> {</div><div class='ctx'> 	struct lpfc_scsi_buf *psb;</div><div class='ctx'> 	struct lpfc_mbx_post_uembed_sgl_page1 *sgl;</div><div class='hunk'>@@ -13469,7 +13455,7 @@ lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *phba, struct list_head *sblist,</div><div class='ctx'> 	union lpfc_sli4_cfg_shdr *shdr;</div><div class='ctx'> </div><div class='ctx'> 	/* Calculate the requested length of the dma memory */</div><div class='del'>-	reqlen = cnt * sizeof(struct sgl_page_pairs) +</div><div class='add'>+	reqlen = count * sizeof(struct sgl_page_pairs) +</div><div class='ctx'> 		 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);</div><div class='ctx'> 	if (reqlen &gt; SLI4_PAGE_SIZE) {</div><div class='ctx'> 		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,</div><div class='hunk'>@@ -13553,169 +13539,6 @@ lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *phba, struct list_head *sblist,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * lpfc_sli4_post_scsi_sgl_blk_ext - post a block of scsi sgls to the port.</div><div class='del'>- * @phba: pointer to lpfc hba data structure.</div><div class='del'>- * @sblist: pointer to scsi buffer list.</div><div class='del'>- * @count: number of scsi buffers on the list.</div><div class='del'>- *</div><div class='del'>- * This routine is invoked to post a block of @count scsi sgl pages from a</div><div class='del'>- * SCSI buffer list @sblist to the HBA using non-embedded mailbox command.</div><div class='del'>- * No Lock is held.</div><div class='del'>- *</div><div class='del'>- **/</div><div class='del'>-int</div><div class='del'>-lpfc_sli4_post_scsi_sgl_blk_ext(struct lpfc_hba *phba, struct list_head *sblist,</div><div class='del'>-				int cnt)</div><div class='del'>-{</div><div class='del'>-	struct lpfc_scsi_buf *psb = NULL;</div><div class='del'>-	struct lpfc_mbx_post_uembed_sgl_page1 *sgl;</div><div class='del'>-	struct sgl_page_pairs *sgl_pg_pairs;</div><div class='del'>-	void *viraddr;</div><div class='del'>-	LPFC_MBOXQ_t *mbox;</div><div class='del'>-	uint32_t reqlen, alloclen, pg_pairs;</div><div class='del'>-	uint32_t mbox_tmo;</div><div class='del'>-	uint16_t xri_start = 0, scsi_xri_start;</div><div class='del'>-	uint16_t rsrc_range;</div><div class='del'>-	int rc = 0, avail_cnt;</div><div class='del'>-	uint32_t shdr_status, shdr_add_status;</div><div class='del'>-	dma_addr_t pdma_phys_bpl1;</div><div class='del'>-	union lpfc_sli4_cfg_shdr *shdr;</div><div class='del'>-	struct lpfc_rsrc_blks *rsrc_blk;</div><div class='del'>-	uint32_t xri_cnt = 0;</div><div class='del'>-</div><div class='del'>-	/* Calculate the total requested length of the dma memory */</div><div class='del'>-	reqlen = cnt * sizeof(struct sgl_page_pairs) +</div><div class='del'>-		 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);</div><div class='del'>-	if (reqlen &gt; SLI4_PAGE_SIZE) {</div><div class='del'>-		lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,</div><div class='del'>-				"2932 Block sgl registration required DMA "</div><div class='del'>-				"size (%d) great than a page\n", reqlen);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The use of extents requires the driver to post the sgl headers</div><div class='del'>-	 * in multiple postings to meet the contiguous resource assignment.</div><div class='del'>-	 */</div><div class='del'>-	psb = list_prepare_entry(psb, sblist, list);</div><div class='del'>-	scsi_xri_start = phba-&gt;sli4_hba.scsi_xri_start;</div><div class='del'>-	list_for_each_entry(rsrc_blk, &amp;phba-&gt;sli4_hba.lpfc_xri_blk_list,</div><div class='del'>-			    list) {</div><div class='del'>-		rsrc_range = rsrc_blk-&gt;rsrc_start + rsrc_blk-&gt;rsrc_size;</div><div class='del'>-		if (rsrc_range &lt; scsi_xri_start)</div><div class='del'>-			continue;</div><div class='del'>-		else if (rsrc_blk-&gt;rsrc_used &gt;= rsrc_blk-&gt;rsrc_size)</div><div class='del'>-			continue;</div><div class='del'>-		else</div><div class='del'>-			avail_cnt = rsrc_blk-&gt;rsrc_size - rsrc_blk-&gt;rsrc_used;</div><div class='del'>-</div><div class='del'>-		reqlen = (avail_cnt * sizeof(struct sgl_page_pairs)) +</div><div class='del'>-			sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);</div><div class='del'>-		/*</div><div class='del'>-		 * Allocate DMA memory and set up the non-embedded mailbox</div><div class='del'>-		 * command. The mbox is used to post an SGL page per loop</div><div class='del'>-		 * but the DMA memory has a use-once semantic so the mailbox</div><div class='del'>-		 * is used and freed per loop pass.</div><div class='del'>-		 */</div><div class='del'>-		mbox = mempool_alloc(phba-&gt;mbox_mem_pool, GFP_KERNEL);</div><div class='del'>-		if (!mbox) {</div><div class='del'>-			lpfc_printf_log(phba, KERN_ERR, LOG_INIT,</div><div class='del'>-					"2933 Failed to allocate mbox cmd "</div><div class='del'>-					"memory\n");</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-		alloclen = lpfc_sli4_config(phba, mbox,</div><div class='del'>-					LPFC_MBOX_SUBSYSTEM_FCOE,</div><div class='del'>-					LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,</div><div class='del'>-					reqlen,</div><div class='del'>-					LPFC_SLI4_MBX_NEMBED);</div><div class='del'>-		if (alloclen &lt; reqlen) {</div><div class='del'>-			lpfc_printf_log(phba, KERN_ERR, LOG_INIT,</div><div class='del'>-					"2934 Allocated DMA memory size (%d) "</div><div class='del'>-					"is less than the requested DMA memory "</div><div class='del'>-					"size (%d)\n", alloclen, reqlen);</div><div class='del'>-			lpfc_sli4_mbox_cmd_free(phba, mbox);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Get the first SGE entry from the non-embedded DMA memory */</div><div class='del'>-		viraddr = mbox-&gt;sge_array-&gt;addr[0];</div><div class='del'>-</div><div class='del'>-		/* Set up the SGL pages in the non-embedded DMA pages */</div><div class='del'>-		sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;</div><div class='del'>-		sgl_pg_pairs = &amp;sgl-&gt;sgl_pg_pairs;</div><div class='del'>-</div><div class='del'>-		/* pg_pairs tracks posted SGEs per loop iteration. */</div><div class='del'>-		pg_pairs = 0;</div><div class='del'>-		list_for_each_entry_continue(psb, sblist, list) {</div><div class='del'>-			/* Set up the sge entry */</div><div class='del'>-			sgl_pg_pairs-&gt;sgl_pg0_addr_lo =</div><div class='del'>-				cpu_to_le32(putPaddrLow(psb-&gt;dma_phys_bpl));</div><div class='del'>-			sgl_pg_pairs-&gt;sgl_pg0_addr_hi =</div><div class='del'>-				cpu_to_le32(putPaddrHigh(psb-&gt;dma_phys_bpl));</div><div class='del'>-			if (phba-&gt;cfg_sg_dma_buf_size &gt; SGL_PAGE_SIZE)</div><div class='del'>-				pdma_phys_bpl1 = psb-&gt;dma_phys_bpl +</div><div class='del'>-					SGL_PAGE_SIZE;</div><div class='del'>-			else</div><div class='del'>-				pdma_phys_bpl1 = 0;</div><div class='del'>-			sgl_pg_pairs-&gt;sgl_pg1_addr_lo =</div><div class='del'>-				cpu_to_le32(putPaddrLow(pdma_phys_bpl1));</div><div class='del'>-			sgl_pg_pairs-&gt;sgl_pg1_addr_hi =</div><div class='del'>-				cpu_to_le32(putPaddrHigh(pdma_phys_bpl1));</div><div class='del'>-			/* Keep the first xri for this extent. */</div><div class='del'>-			if (pg_pairs == 0)</div><div class='del'>-				xri_start = psb-&gt;cur_iocbq.sli4_xritag;</div><div class='del'>-			sgl_pg_pairs++;</div><div class='del'>-			pg_pairs++;</div><div class='del'>-			xri_cnt++;</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Track two exit conditions - the loop has constructed</div><div class='del'>-			 * all of the caller's SGE pairs or all available</div><div class='del'>-			 * resource IDs in this extent are consumed.</div><div class='del'>-			 */</div><div class='del'>-			if ((xri_cnt == cnt) || (pg_pairs &gt;= avail_cnt))</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-		rsrc_blk-&gt;rsrc_used += pg_pairs;</div><div class='del'>-		bf_set(lpfc_post_sgl_pages_xri, sgl, xri_start);</div><div class='del'>-		bf_set(lpfc_post_sgl_pages_xricnt, sgl, pg_pairs);</div><div class='del'>-</div><div class='del'>-		lpfc_printf_log(phba, KERN_INFO, LOG_INIT,</div><div class='del'>-				"3016 Post SCSI Extent SGL, start %d, cnt %d "</div><div class='del'>-				"blk use %d\n",</div><div class='del'>-				xri_start, pg_pairs, rsrc_blk-&gt;rsrc_used);</div><div class='del'>-		/* Perform endian conversion if necessary */</div><div class='del'>-		sgl-&gt;word0 = cpu_to_le32(sgl-&gt;word0);</div><div class='del'>-		if (!phba-&gt;sli4_hba.intr_enable)</div><div class='del'>-			rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);</div><div class='del'>-		else {</div><div class='del'>-			mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);</div><div class='del'>-			rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);</div><div class='del'>-		}</div><div class='del'>-		shdr = (union lpfc_sli4_cfg_shdr *) &amp;sgl-&gt;cfg_shdr;</div><div class='del'>-		shdr_status = bf_get(lpfc_mbox_hdr_status, &amp;shdr-&gt;response);</div><div class='del'>-		shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,</div><div class='del'>-					 &amp;shdr-&gt;response);</div><div class='del'>-		if (rc != MBX_TIMEOUT)</div><div class='del'>-			lpfc_sli4_mbox_cmd_free(phba, mbox);</div><div class='del'>-		if (shdr_status || shdr_add_status || rc) {</div><div class='del'>-			lpfc_printf_log(phba, KERN_ERR, LOG_SLI,</div><div class='del'>-					"2935 POST_SGL_BLOCK mailbox command "</div><div class='del'>-					"failed status x%x add_status x%x "</div><div class='del'>-					"mbx status x%x\n",</div><div class='del'>-					shdr_status, shdr_add_status, rc);</div><div class='del'>-			return -ENXIO;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Post only what is requested. */</div><div class='del'>-		if (xri_cnt &gt;= cnt)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * lpfc_fc_frame_check - Check that this frame is a valid frame to handle</div><div class='ctx'>  * @phba: pointer to lpfc_hba struct that the frame was received on</div><div class='ctx'>  * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)</div><div class='hunk'>@@ -13839,8 +13662,13 @@ lpfc_fc_frame_to_vport(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr,</div><div class='ctx'> 	uint32_t did = (fc_hdr-&gt;fh_d_id[0] &lt;&lt; 16 |</div><div class='ctx'> 			fc_hdr-&gt;fh_d_id[1] &lt;&lt; 8 |</div><div class='ctx'> 			fc_hdr-&gt;fh_d_id[2]);</div><div class='add'>+</div><div class='ctx'> 	if (did == Fabric_DID)</div><div class='ctx'> 		return phba-&gt;pport;</div><div class='add'>+	if ((phba-&gt;pport-&gt;fc_flag &amp; FC_PT2PT) &amp;&amp;</div><div class='add'>+		!(phba-&gt;link_state == LPFC_HBA_READY))</div><div class='add'>+		return phba-&gt;pport;</div><div class='add'>+</div><div class='ctx'> 	vports = lpfc_create_vport_work_array(phba);</div><div class='ctx'> 	if (vports != NULL)</div><div class='ctx'> 		for (i = 0; i &lt;= phba-&gt;max_vpi &amp;&amp; vports[i] != NULL; i++) {</div><div class='hunk'>@@ -14133,7 +13961,6 @@ lpfc_sli4_xri_inrange(struct lpfc_hba *phba,</div><div class='ctx'> 	return NO_XRI;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * lpfc_sli4_seq_abort_rsp - bls rsp to sequence abort</div><div class='ctx'>  * @phba: Pointer to HBA context object.</div><div class='hunk'>@@ -14148,7 +13975,7 @@ lpfc_sli4_seq_abort_rsp(struct lpfc_hba *phba,</div><div class='ctx'> {</div><div class='ctx'> 	struct lpfc_iocbq *ctiocb = NULL;</div><div class='ctx'> 	struct lpfc_nodelist *ndlp;</div><div class='del'>-	uint16_t oxid, rxid;</div><div class='add'>+	uint16_t oxid, rxid, xri, lxri;</div><div class='ctx'> 	uint32_t sid, fctl;</div><div class='ctx'> 	IOCB_t *icmd;</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -14167,8 +13994,6 @@ lpfc_sli4_seq_abort_rsp(struct lpfc_hba *phba,</div><div class='ctx'> 				"SID:x%x\n", oxid, sid);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	if (lpfc_sli4_xri_inrange(phba, rxid))</div><div class='del'>-		lpfc_set_rrq_active(phba, ndlp, rxid, oxid, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate buffer for rsp iocb */</div><div class='ctx'> 	ctiocb = lpfc_sli_get_iocbq(phba);</div><div class='hunk'>@@ -14199,13 +14024,24 @@ lpfc_sli4_seq_abort_rsp(struct lpfc_hba *phba,</div><div class='ctx'> 	ctiocb-&gt;sli4_lxritag = NO_XRI;</div><div class='ctx'> 	ctiocb-&gt;sli4_xritag = NO_XRI;</div><div class='ctx'> </div><div class='add'>+	if (fctl &amp; FC_FC_EX_CTX)</div><div class='add'>+		/* Exchange responder sent the abort so we</div><div class='add'>+		 * own the oxid.</div><div class='add'>+		 */</div><div class='add'>+		xri = oxid;</div><div class='add'>+	else</div><div class='add'>+		xri = rxid;</div><div class='add'>+	lxri = lpfc_sli4_xri_inrange(phba, xri);</div><div class='add'>+	if (lxri != NO_XRI)</div><div class='add'>+		lpfc_set_rrq_active(phba, ndlp, lxri,</div><div class='add'>+			(xri == oxid) ? rxid : oxid, 0);</div><div class='ctx'> 	/* If the oxid maps to the FCP XRI range or if it is out of range,</div><div class='ctx'> 	 * send a BLS_RJT.  The driver no longer has that exchange.</div><div class='ctx'> 	 * Override the IOCB for a BA_RJT.</div><div class='ctx'> 	 */</div><div class='del'>-	if (oxid &gt; (phba-&gt;sli4_hba.max_cfg_param.max_xri +</div><div class='add'>+	if (xri &gt; (phba-&gt;sli4_hba.max_cfg_param.max_xri +</div><div class='ctx'> 		    phba-&gt;sli4_hba.max_cfg_param.xri_base) ||</div><div class='del'>-	    oxid &gt; (lpfc_sli4_get_els_iocb_cnt(phba) +</div><div class='add'>+	    xri &gt; (lpfc_sli4_get_els_iocb_cnt(phba) +</div><div class='ctx'> 		    phba-&gt;sli4_hba.max_cfg_param.xri_base)) {</div><div class='ctx'> 		icmd-&gt;un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;</div><div class='ctx'> 		bf_set(lpfc_vndr_code, &amp;icmd-&gt;un.bls_rsp, 0);</div><div class='hunk'>@@ -14377,7 +14213,15 @@ lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)</div><div class='ctx'> 		/* Initialize the first IOCB. */</div><div class='ctx'> 		first_iocbq-&gt;iocb.unsli3.rcvsli3.acc_len = 0;</div><div class='ctx'> 		first_iocbq-&gt;iocb.ulpStatus = IOSTAT_SUCCESS;</div><div class='del'>-		first_iocbq-&gt;iocb.ulpCommand = CMD_IOCB_RCV_SEQ64_CX;</div><div class='add'>+</div><div class='add'>+		/* Check FC Header to see what TYPE of frame we are rcv'ing */</div><div class='add'>+		if (sli4_type_from_fc_hdr(fc_hdr) == FC_TYPE_ELS) {</div><div class='add'>+			first_iocbq-&gt;iocb.ulpCommand = CMD_IOCB_RCV_ELS64_CX;</div><div class='add'>+			first_iocbq-&gt;iocb.un.rcvels.parmRo =</div><div class='add'>+				sli4_did_from_fc_hdr(fc_hdr);</div><div class='add'>+			first_iocbq-&gt;iocb.ulpPU = PARM_NPIV_DID;</div><div class='add'>+		} else</div><div class='add'>+			first_iocbq-&gt;iocb.ulpCommand = CMD_IOCB_RCV_SEQ64_CX;</div><div class='ctx'> 		first_iocbq-&gt;iocb.ulpContext = NO_XRI;</div><div class='ctx'> 		first_iocbq-&gt;iocb.unsli3.rcvsli3.ox_id =</div><div class='ctx'> 			be16_to_cpu(fc_hdr-&gt;fh_ox_id);</div><div class='hunk'>@@ -14507,6 +14351,7 @@ lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,</div><div class='ctx'> 	struct fc_frame_header *fc_hdr;</div><div class='ctx'> 	struct lpfc_vport *vport;</div><div class='ctx'> 	uint32_t fcfi;</div><div class='add'>+	uint32_t did;</div><div class='ctx'> </div><div class='ctx'> 	/* Process each received buffer */</div><div class='ctx'> 	fc_hdr = (struct fc_frame_header *)dmabuf-&gt;hbuf.virt;</div><div class='hunk'>@@ -14522,12 +14367,32 @@ lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,</div><div class='ctx'> 	else</div><div class='ctx'> 		fcfi = bf_get(lpfc_rcqe_fcf_id,</div><div class='ctx'> 			      &amp;dmabuf-&gt;cq_event.cqe.rcqe_cmpl);</div><div class='add'>+</div><div class='ctx'> 	vport = lpfc_fc_frame_to_vport(phba, fc_hdr, fcfi);</div><div class='del'>-	if (!vport || !(vport-&gt;vpi_state &amp; LPFC_VPI_REGISTERED)) {</div><div class='add'>+	if (!vport) {</div><div class='ctx'> 		/* throw out the frame */</div><div class='ctx'> 		lpfc_in_buf_free(phba, &amp;dmabuf-&gt;dbuf);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* d_id this frame is directed to */</div><div class='add'>+	did = sli4_did_from_fc_hdr(fc_hdr);</div><div class='add'>+</div><div class='add'>+	/* vport is registered unless we rcv a FLOGI directed to Fabric_DID */</div><div class='add'>+	if (!(vport-&gt;vpi_state &amp; LPFC_VPI_REGISTERED) &amp;&amp;</div><div class='add'>+		(did != Fabric_DID)) {</div><div class='add'>+		/*</div><div class='add'>+		 * Throw out the frame if we are not pt2pt.</div><div class='add'>+		 * The pt2pt protocol allows for discovery frames</div><div class='add'>+		 * to be received without a registered VPI.</div><div class='add'>+		 */</div><div class='add'>+		if (!(vport-&gt;fc_flag &amp; FC_PT2PT) ||</div><div class='add'>+			(phba-&gt;link_state == LPFC_HBA_READY)) {</div><div class='add'>+			lpfc_in_buf_free(phba, &amp;dmabuf-&gt;dbuf);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Handle the basic abort sequence (BA_ABTS) event */</div><div class='ctx'> 	if (fc_hdr-&gt;fh_r_ctl == FC_RCTL_BA_ABTS) {</div><div class='ctx'> 		lpfc_sli4_handle_unsol_abort(vport, dmabuf);</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_sli.h b/drivers/scsi/lpfc/lpfc_sli.h<br/>index 3290b8e7ab65..2626f58c0747 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_sli.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_sli.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_sli.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_sli.h</a></div><div class='hunk'>@@ -68,7 +68,7 @@ struct lpfc_iocbq {</div><div class='ctx'> #define LPFC_EXCHANGE_BUSY	0x40    /* SLI4 hba reported XB in response */</div><div class='ctx'> #define LPFC_USE_FCPWQIDX	0x80    /* Submit to specified FCPWQ index */</div><div class='ctx'> #define DSS_SECURITY_OP		0x100	/* security IO */</div><div class='del'>-#define LPFC_IO_ON_Q		0x200	/* The IO is still on the TXCMPLQ */</div><div class='add'>+#define LPFC_IO_ON_TXCMPLQ	0x200	/* The IO is still on the TXCMPLQ */</div><div class='ctx'> #define LPFC_IO_DIF		0x400	/* T10 DIF IO */</div><div class='ctx'> </div><div class='ctx'> #define LPFC_FIP_ELS_ID_MASK	0xc000	/* ELS_ID range 0-3, non-shifted mask */</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_sli4.h b/drivers/scsi/lpfc/lpfc_sli4.h<br/>index c19d139618b7..a4a77080091b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_sli4.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_sli4.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_sli4.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_sli4.h</a></div><div class='hunk'>@@ -75,11 +75,19 @@</div><div class='ctx'> 	 (fc_hdr)-&gt;fh_s_id[1] &lt;&lt;  8 | \</div><div class='ctx'> 	 (fc_hdr)-&gt;fh_s_id[2])</div><div class='ctx'> </div><div class='add'>+#define sli4_did_from_fc_hdr(fc_hdr)  \</div><div class='add'>+	((fc_hdr)-&gt;fh_d_id[0] &lt;&lt; 16 | \</div><div class='add'>+	 (fc_hdr)-&gt;fh_d_id[1] &lt;&lt;  8 | \</div><div class='add'>+	 (fc_hdr)-&gt;fh_d_id[2])</div><div class='add'>+</div><div class='ctx'> #define sli4_fctl_from_fc_hdr(fc_hdr)  \</div><div class='ctx'> 	((fc_hdr)-&gt;fh_f_ctl[0] &lt;&lt; 16 | \</div><div class='ctx'> 	 (fc_hdr)-&gt;fh_f_ctl[1] &lt;&lt;  8 | \</div><div class='ctx'> 	 (fc_hdr)-&gt;fh_f_ctl[2])</div><div class='ctx'> </div><div class='add'>+#define sli4_type_from_fc_hdr(fc_hdr)  \</div><div class='add'>+	((fc_hdr)-&gt;fh_type)</div><div class='add'>+</div><div class='ctx'> #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000</div><div class='ctx'> </div><div class='ctx'> enum lpfc_sli4_queue_type {</div><div class='hunk'>@@ -493,14 +501,12 @@ struct lpfc_sli4_hba {</div><div class='ctx'> 	uint16_t next_rpi;</div><div class='ctx'> 	uint16_t scsi_xri_max;</div><div class='ctx'> 	uint16_t scsi_xri_cnt;</div><div class='add'>+	uint16_t els_xri_cnt;</div><div class='ctx'> 	uint16_t scsi_xri_start;</div><div class='ctx'> 	struct list_head lpfc_free_sgl_list;</div><div class='ctx'> 	struct list_head lpfc_sgl_list;</div><div class='del'>-	struct lpfc_sglq **lpfc_els_sgl_array;</div><div class='ctx'> 	struct list_head lpfc_abts_els_sgl_list;</div><div class='del'>-	struct lpfc_scsi_buf **lpfc_scsi_psb_array;</div><div class='ctx'> 	struct list_head lpfc_abts_scsi_buf_list;</div><div class='del'>-	uint32_t total_sglq_bufs;</div><div class='ctx'> 	struct lpfc_sglq **lpfc_sglq_active_list;</div><div class='ctx'> 	struct list_head lpfc_rpi_hdr_list;</div><div class='ctx'> 	unsigned long *rpi_bmask;</div><div class='hunk'>@@ -509,7 +515,6 @@ struct lpfc_sli4_hba {</div><div class='ctx'> 	struct list_head lpfc_rpi_blk_list;</div><div class='ctx'> 	unsigned long *xri_bmask;</div><div class='ctx'> 	uint16_t *xri_ids;</div><div class='del'>-	uint16_t xri_count;</div><div class='ctx'> 	struct list_head lpfc_xri_blk_list;</div><div class='ctx'> 	unsigned long *vfi_bmask;</div><div class='ctx'> 	uint16_t *vfi_ids;</div><div class='hunk'>@@ -614,11 +619,7 @@ int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t);</div><div class='ctx'> int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *);</div><div class='ctx'> uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *);</div><div class='ctx'> int lpfc_sli4_post_async_mbox(struct lpfc_hba *);</div><div class='del'>-int lpfc_sli4_post_els_sgl_list(struct lpfc_hba *phba);</div><div class='del'>-int lpfc_sli4_post_els_sgl_list_ext(struct lpfc_hba *phba);</div><div class='ctx'> int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int);</div><div class='del'>-int lpfc_sli4_post_scsi_sgl_blk_ext(struct lpfc_hba *, struct list_head *,</div><div class='del'>-				    int);</div><div class='ctx'> struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *);</div><div class='ctx'> struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *);</div><div class='ctx'> void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);</div><div class='head'>diff --git a/drivers/scsi/lpfc/lpfc_version.h b/drivers/scsi/lpfc/lpfc_version.h<br/>index 25cefc254b76..59c57a409981 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_version.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/lpfc/lpfc_version.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/lpfc/lpfc_version.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/lpfc/lpfc_version.h</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'>  * included with this package.                                     *</div><div class='ctx'>  *******************************************************************/</div><div class='ctx'> </div><div class='del'>-#define LPFC_DRIVER_VERSION "8.3.30"</div><div class='add'>+#define LPFC_DRIVER_VERSION "8.3.31"</div><div class='ctx'> #define LPFC_DRIVER_NAME		"lpfc"</div><div class='ctx'> #define LPFC_SP_DRIVER_HANDLER_NAME	"lpfc:sp"</div><div class='ctx'> #define LPFC_FP_DRIVER_HANDLER_NAME	"lpfc:fp"</div><div class='head'>diff --git a/drivers/scsi/megaraid/megaraid_sas.h b/drivers/scsi/megaraid/megaraid_sas.h<br/>index e5f416f8042d..e8f892647681 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/megaraid/megaraid_sas.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/megaraid/megaraid_sas.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/megaraid/megaraid_sas.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/megaraid/megaraid_sas.h</a></div><div class='hunk'>@@ -33,9 +33,9 @@</div><div class='ctx'> /*</div><div class='ctx'>  * MegaRAID SAS Driver meta data</div><div class='ctx'>  */</div><div class='del'>-#define MEGASAS_VERSION				"00.00.06.14-rc1"</div><div class='del'>-#define MEGASAS_RELDATE				"Jan. 6, 2012"</div><div class='del'>-#define MEGASAS_EXT_VERSION			"Fri. Jan. 6 17:00:00 PDT 2012"</div><div class='add'>+#define MEGASAS_VERSION				"00.00.06.15-rc1"</div><div class='add'>+#define MEGASAS_RELDATE				"Mar. 19, 2012"</div><div class='add'>+#define MEGASAS_EXT_VERSION			"Mon. Mar. 19 17:00:00 PDT 2012"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Device IDs</div><div class='head'>diff --git a/drivers/scsi/megaraid/megaraid_sas_base.c b/drivers/scsi/megaraid/megaraid_sas_base.c<br/>index 8b300be44284..dc27598785e5 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/megaraid/megaraid_sas_base.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/megaraid/megaraid_sas_base.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/megaraid/megaraid_sas_base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/megaraid/megaraid_sas_base.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'>  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA</div><div class='ctx'>  *</div><div class='ctx'>  *  FILE: megaraid_sas_base.c</div><div class='del'>- *  Version : v00.00.06.14-rc1</div><div class='add'>+ *  Version : v00.00.06.15-rc1</div><div class='ctx'>  *</div><div class='ctx'>  *  Authors: LSI Corporation</div><div class='ctx'>  *           Sreenivas Bagalkote</div><div class='head'>diff --git a/drivers/scsi/megaraid/megaraid_sas_fp.c b/drivers/scsi/megaraid/megaraid_sas_fp.c<br/>index 294abb0defa6..e3d251a2e26a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/megaraid/megaraid_sas_fp.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/megaraid/megaraid_sas_fp.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/megaraid/megaraid_sas_fp.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/megaraid/megaraid_sas_fp.c</a></div><div class='hunk'>@@ -362,15 +362,20 @@ MR_BuildRaidContext(struct megasas_instance *instance,</div><div class='ctx'> 	/* assume this IO needs the full row - we'll adjust if not true */</div><div class='ctx'> 	regSize             = stripSize;</div><div class='ctx'> </div><div class='del'>-	/* If IO spans more than 1 strip, fp is not possible</div><div class='del'>-	   FP is not possible for writes on non-0 raid levels</div><div class='del'>-	   FP is not possible if LD is not capable */</div><div class='del'>-	if (num_strips &gt; 1 || (!isRead &amp;&amp; raid-&gt;level != 0) ||</div><div class='del'>-	    !raid-&gt;capability.fpCapable) {</div><div class='add'>+	/* Check if we can send this I/O via FastPath */</div><div class='add'>+	if (raid-&gt;capability.fpCapable) {</div><div class='add'>+		if (isRead)</div><div class='add'>+			io_info-&gt;fpOkForIo = (raid-&gt;capability.fpReadCapable &amp;&amp;</div><div class='add'>+					      ((num_strips == 1) ||</div><div class='add'>+					       raid-&gt;capability.</div><div class='add'>+					       fpReadAcrossStripe));</div><div class='add'>+		else</div><div class='add'>+			io_info-&gt;fpOkForIo = (raid-&gt;capability.fpWriteCapable &amp;&amp;</div><div class='add'>+					      ((num_strips == 1) ||</div><div class='add'>+					       raid-&gt;capability.</div><div class='add'>+					       fpWriteAcrossStripe));</div><div class='add'>+	} else</div><div class='ctx'> 		io_info-&gt;fpOkForIo = FALSE;</div><div class='del'>-	} else {</div><div class='del'>-		io_info-&gt;fpOkForIo = TRUE;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (numRows == 1) {</div><div class='ctx'> 		/* single-strip IOs can always lock only the data needed */</div><div class='head'>diff --git a/drivers/scsi/megaraid/megaraid_sas_fusion.c b/drivers/scsi/megaraid/megaraid_sas_fusion.c<br/>index bfd87fab39aa..a610cf1d4847 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/megaraid/megaraid_sas_fusion.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/megaraid/megaraid_sas_fusion.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/megaraid/megaraid_sas_fusion.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/megaraid/megaraid_sas_fusion.c</a></div><div class='hunk'>@@ -634,9 +634,7 @@ megasas_ioc_init_fusion(struct megasas_instance *instance)</div><div class='ctx'> 		fusion-&gt;reply_frames_desc_phys;</div><div class='ctx'> 	IOCInitMessage-&gt;SystemRequestFrameBaseAddress =</div><div class='ctx'> 		fusion-&gt;io_request_frames_phys;</div><div class='del'>-	/* Set to 0 for none or 1 MSI-X vectors */</div><div class='del'>-	IOCInitMessage-&gt;HostMSIxVectors = (instance-&gt;msix_vectors &gt; 0 ?</div><div class='del'>-					   instance-&gt;msix_vectors : 0);</div><div class='add'>+	IOCInitMessage-&gt;HostMSIxVectors = instance-&gt;msix_vectors;</div><div class='ctx'> 	init_frame = (struct megasas_init_frame *)cmd-&gt;frame;</div><div class='ctx'> 	memset(init_frame, 0, MEGAMFI_FRAME_SIZE);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/mpt2sas/mpi/mpi2.h b/drivers/scsi/mpt2sas/mpi/mpi2.h<br/>index a01f0aa66f20..a80f3220c641 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpi/mpi2.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/mpt2sas/mpi/mpi2.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpi/mpi2.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpi/mpi2.h</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'>  *                  scatter/gather formats.</div><div class='ctx'>  *  Creation Date:  June 21, 2006</div><div class='ctx'>  *</div><div class='del'>- *  mpi2.h Version:  02.00.22</div><div class='add'>+ *  mpi2.h Version:  02.00.23</div><div class='ctx'>  *</div><div class='ctx'>  *  Version History</div><div class='ctx'>  *  ---------------</div><div class='hunk'>@@ -71,6 +71,7 @@</div><div class='ctx'>  *  03-09-11  02.00.20  Bumped MPI2_HEADER_VERSION_UNIT.</div><div class='ctx'>  *  05-25-11  02.00.21  Bumped MPI2_HEADER_VERSION_UNIT.</div><div class='ctx'>  *  08-24-11  02.00.22  Bumped MPI2_HEADER_VERSION_UNIT.</div><div class='add'>+ *  11-18-11  02.00.23  Bumped MPI2_HEADER_VERSION_UNIT.</div><div class='ctx'>  *  --------------------------------------------------------------------------</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -96,7 +97,7 @@</div><div class='ctx'> #define MPI2_VERSION_02_00                  (0x0200)</div><div class='ctx'> </div><div class='ctx'> /* versioning for this MPI header set */</div><div class='del'>-#define MPI2_HEADER_VERSION_UNIT            (0x16)</div><div class='add'>+#define MPI2_HEADER_VERSION_UNIT            (0x17)</div><div class='ctx'> #define MPI2_HEADER_VERSION_DEV             (0x00)</div><div class='ctx'> #define MPI2_HEADER_VERSION_UNIT_MASK       (0xFF00)</div><div class='ctx'> #define MPI2_HEADER_VERSION_UNIT_SHIFT      (8)</div><div class='hunk'>@@ -480,7 +481,7 @@ typedef union _MPI2_REPLY_DESCRIPTORS_UNION</div><div class='ctx'>     MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR  RAIDAcceleratorSuccess;</div><div class='ctx'>     U64                                             Words;</div><div class='ctx'> } MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION,</div><div class='del'>-  Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t;</div><div class='add'>+Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h b/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h<br/>index 3a023dad77a1..737fa8cfb54a 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'>  *          Title:  MPI Configuration messages and pages</div><div class='ctx'>  *  Creation Date:  November 10, 2006</div><div class='ctx'>  *</div><div class='del'>- *    mpi2_cnfg.h Version:  02.00.21</div><div class='add'>+ *    mpi2_cnfg.h Version:  02.00.22</div><div class='ctx'>  *</div><div class='ctx'>  *  Version History</div><div class='ctx'>  *  ---------------</div><div class='hunk'>@@ -146,7 +146,9 @@</div><div class='ctx'>  *                      Added SpinupFlags field containing a Disable Spin-up</div><div class='ctx'>  *                      bit to the MPI2_SAS_IOUNIT4_SPINUP_GROUP fields of</div><div class='ctx'>  *                      SAS IO Unit Page 4.</div><div class='del'>-</div><div class='add'>+ *  11-18-11  02.00.22  Added define MPI2_IOCPAGE6_CAP_FLAGS_4K_SECTORS_SUPPORT.</div><div class='add'>+ *                      Added UEFIVersion field to BIOS Page 1 and defined new</div><div class='add'>+ *                      BiosOptions bits.</div><div class='ctx'>  *  --------------------------------------------------------------------------</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -1131,9 +1133,10 @@ typedef struct _MPI2_CONFIG_PAGE_IOC_6</div><div class='ctx'> } MPI2_CONFIG_PAGE_IOC_6, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_6,</div><div class='ctx'>   Mpi2IOCPage6_t, MPI2_POINTER pMpi2IOCPage6_t;</div><div class='ctx'> </div><div class='del'>-#define MPI2_IOCPAGE6_PAGEVERSION                       (0x04)</div><div class='add'>+#define MPI2_IOCPAGE6_PAGEVERSION                       (0x05)</div><div class='ctx'> </div><div class='ctx'> /* defines for IOC Page 6 CapabilitiesFlags */</div><div class='add'>+#define MPI2_IOCPAGE6_CAP_FLAGS_4K_SECTORS_SUPPORT      (0x00000020)</div><div class='ctx'> #define MPI2_IOCPAGE6_CAP_FLAGS_RAID10_SUPPORT          (0x00000010)</div><div class='ctx'> #define MPI2_IOCPAGE6_CAP_FLAGS_RAID1_SUPPORT           (0x00000008)</div><div class='ctx'> #define MPI2_IOCPAGE6_CAP_FLAGS_RAID1E_SUPPORT          (0x00000004)</div><div class='hunk'>@@ -1204,24 +1207,29 @@ typedef struct _MPI2_CONFIG_PAGE_IOC_8</div><div class='ctx'> </div><div class='ctx'> typedef struct _MPI2_CONFIG_PAGE_BIOS_1</div><div class='ctx'> {</div><div class='del'>-    MPI2_CONFIG_PAGE_HEADER Header;                     /* 0x00 */</div><div class='del'>-    U32                     BiosOptions;                /* 0x04 */</div><div class='del'>-    U32                     IOCSettings;                /* 0x08 */</div><div class='del'>-    U32                     Reserved1;                  /* 0x0C */</div><div class='del'>-    U32                     DeviceSettings;             /* 0x10 */</div><div class='del'>-    U16                     NumberOfDevices;            /* 0x14 */</div><div class='del'>-    U16                     Reserved2;                  /* 0x16 */</div><div class='del'>-    U16                     IOTimeoutBlockDevicesNonRM; /* 0x18 */</div><div class='del'>-    U16                     IOTimeoutSequential;        /* 0x1A */</div><div class='del'>-    U16                     IOTimeoutOther;             /* 0x1C */</div><div class='del'>-    U16                     IOTimeoutBlockDevicesRM;    /* 0x1E */</div><div class='add'>+	MPI2_CONFIG_PAGE_HEADER Header;                     /* 0x00 */</div><div class='add'>+	U32                     BiosOptions;                /* 0x04 */</div><div class='add'>+	U32                     IOCSettings;                /* 0x08 */</div><div class='add'>+	U32                     Reserved1;                  /* 0x0C */</div><div class='add'>+	U32                     DeviceSettings;             /* 0x10 */</div><div class='add'>+	U16                     NumberOfDevices;            /* 0x14 */</div><div class='add'>+	U16                     UEFIVersion;                /* 0x16 */</div><div class='add'>+	U16                     IOTimeoutBlockDevicesNonRM; /* 0x18 */</div><div class='add'>+	U16                     IOTimeoutSequential;        /* 0x1A */</div><div class='add'>+	U16                     IOTimeoutOther;             /* 0x1C */</div><div class='add'>+	U16                     IOTimeoutBlockDevicesRM;    /* 0x1E */</div><div class='ctx'> } MPI2_CONFIG_PAGE_BIOS_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_1,</div><div class='ctx'>   Mpi2BiosPage1_t, MPI2_POINTER pMpi2BiosPage1_t;</div><div class='ctx'> </div><div class='del'>-#define MPI2_BIOSPAGE1_PAGEVERSION                      (0x04)</div><div class='add'>+#define MPI2_BIOSPAGE1_PAGEVERSION                      (0x05)</div><div class='ctx'> </div><div class='ctx'> /* values for BIOS Page 1 BiosOptions field */</div><div class='del'>-#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_BIOS             (0x00000001)</div><div class='add'>+#define MPI2_BIOSPAGE1_OPTIONS_MASK_UEFI_HII_REGISTRATION   (0x00000006)</div><div class='add'>+#define MPI2_BIOSPAGE1_OPTIONS_ENABLE_UEFI_HII              (0x00000000)</div><div class='add'>+#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_UEFI_HII             (0x00000002)</div><div class='add'>+#define MPI2_BIOSPAGE1_OPTIONS_VERSION_CHECK_UEFI_HII       (0x00000004)</div><div class='add'>+</div><div class='add'>+#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_BIOS                 (0x00000001)</div><div class='ctx'> </div><div class='ctx'> /* values for BIOS Page 1 IOCSettings field */</div><div class='ctx'> #define MPI2_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE      (0x00030000)</div><div class='hunk'>@@ -1248,6 +1256,13 @@ typedef struct _MPI2_CONFIG_PAGE_BIOS_1</div><div class='ctx'> #define MPI2_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN        (0x00000002)</div><div class='ctx'> #define MPI2_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN         (0x00000001)</div><div class='ctx'> </div><div class='add'>+/* defines for BIOS Page 1 UEFIVersion field */</div><div class='add'>+#define MPI2_BIOSPAGE1_UEFI_VER_MAJOR_MASK              (0xFF00)</div><div class='add'>+#define MPI2_BIOSPAGE1_UEFI_VER_MAJOR_SHIFT             (8)</div><div class='add'>+#define MPI2_BIOSPAGE1_UEFI_VER_MINOR_MASK              (0x00FF)</div><div class='add'>+#define MPI2_BIOSPAGE1_UEFI_VER_MINOR_SHIFT             (0)</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /* BIOS Page 2 */</div><div class='ctx'> </div><div class='hunk'>@@ -2216,6 +2231,27 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_8 {</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+/* SAS IO Unit Page 16 */</div><div class='add'>+</div><div class='add'>+typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT16 {</div><div class='add'>+	MPI2_CONFIG_EXTENDED_PAGE_HEADER  Header;                  /* 0x00 */</div><div class='add'>+	U64                         TimeStamp;                     /* 0x08 */</div><div class='add'>+	U32                         Reserved1;                     /* 0x10 */</div><div class='add'>+	U32                         Reserved2;                     /* 0x14 */</div><div class='add'>+	U32                         FastPathPendedRequests;        /* 0x18 */</div><div class='add'>+	U32                         FastPathUnPendedRequests;      /* 0x1C */</div><div class='add'>+	U32                         FastPathHostRequestStarts;     /* 0x20 */</div><div class='add'>+	U32                         FastPathFirmwareRequestStarts; /* 0x24 */</div><div class='add'>+	U32                         FastPathHostCompletions;       /* 0x28 */</div><div class='add'>+	U32                         FastPathFirmwareCompletions;   /* 0x2C */</div><div class='add'>+	U32                         NonFastPathRequestStarts;      /* 0x30 */</div><div class='add'>+	U32			    NonFastPathHostCompletions;    /* 0x30 */</div><div class='add'>+} MPI2_CONFIG_PAGE_SASIOUNIT16,</div><div class='add'>+MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT16,</div><div class='add'>+Mpi2SasIOUnitPage16_t, MPI2_POINTER pMpi2SasIOUnitPage16_t;</div><div class='add'>+</div><div class='add'>+#define MPI2_SASIOUNITPAGE16_PAGEVERSION    (0x00)</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /****************************************************************************</div><div class='ctx'> *   SAS Expander Config Pages</div><div class='head'>diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.c b/drivers/scsi/mpt2sas/mpt2sas_base.c<br/>index 8a59a772fdf2..6102ef2cb2d8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpt2sas_base.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/mpt2sas/mpt2sas_base.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpt2sas_base.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpt2sas_base.c</a></div><div class='hunk'>@@ -699,6 +699,11 @@ _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,</div><div class='ctx'> 	u16 ioc_status;</div><div class='ctx'> </div><div class='ctx'> 	mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);</div><div class='add'>+	if (unlikely(!mpi_reply)) {</div><div class='add'>+		printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",</div><div class='add'>+			ioc-&gt;name, __FILE__, __LINE__, __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> 	ioc_status = le16_to_cpu(mpi_reply-&gt;IOCStatus);</div><div class='ctx'> #ifdef CONFIG_SCSI_MPT2SAS_LOGGING</div><div class='ctx'> 	if ((ioc_status &amp; MPI2_IOCSTATUS_MASK) &amp;&amp;</div><div class='hunk'>@@ -930,16 +935,18 @@ _base_interrupt(int irq, void *bus_id)</div><div class='ctx'> 		else if (request_desript_type ==</div><div class='ctx'> 		    MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)</div><div class='ctx'> 			goto next;</div><div class='del'>-		if (smid)</div><div class='add'>+		if (smid) {</div><div class='ctx'> 			cb_idx = _base_get_cb_idx(ioc, smid);</div><div class='del'>-		if (smid &amp;&amp; cb_idx != 0xFF) {</div><div class='del'>-			rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,</div><div class='del'>-			    reply);</div><div class='add'>+		if ((likely(cb_idx &lt; MPT_MAX_CALLBACKS))</div><div class='add'>+			    &amp;&amp; (likely(mpt_callbacks[cb_idx] != NULL))) {</div><div class='add'>+				rc = mpt_callbacks[cb_idx](ioc, smid,</div><div class='add'>+				    msix_index, reply);</div><div class='ctx'> 			if (reply)</div><div class='del'>-				_base_display_reply_info(ioc, smid, msix_index,</div><div class='del'>-				    reply);</div><div class='add'>+				_base_display_reply_info(ioc, smid,</div><div class='add'>+				    msix_index, reply);</div><div class='ctx'> 			if (rc)</div><div class='ctx'> 				mpt2sas_base_free_smid(ioc, smid);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!smid)</div><div class='ctx'> 			_base_async_event(ioc, msix_index, reply);</div><div class='hunk'>@@ -3343,7 +3350,7 @@ _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pfacts = &amp;ioc-&gt;pfacts[port];</div><div class='del'>-	memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));</div><div class='add'>+	memset(pfacts, 0, sizeof(struct mpt2sas_port_facts));</div><div class='ctx'> 	pfacts-&gt;PortNumber = mpi_reply.PortNumber;</div><div class='ctx'> 	pfacts-&gt;VP_ID = mpi_reply.VP_ID;</div><div class='ctx'> 	pfacts-&gt;VF_ID = mpi_reply.VF_ID;</div><div class='hunk'>@@ -3385,7 +3392,7 @@ _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	facts = &amp;ioc-&gt;facts;</div><div class='del'>-	memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));</div><div class='add'>+	memset(facts, 0, sizeof(struct mpt2sas_facts));</div><div class='ctx'> 	facts-&gt;MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);</div><div class='ctx'> 	facts-&gt;HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);</div><div class='ctx'> 	facts-&gt;VP_ID = mpi_reply.VP_ID;</div><div class='hunk'>@@ -4153,7 +4160,8 @@ _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)</div><div class='ctx'> 	if (ioc-&gt;is_driver_loading) {</div><div class='ctx'> 		if (ioc-&gt;is_warpdrive &amp;&amp; ioc-&gt;manu_pg10.OEMIdentifier</div><div class='ctx'> 		    == 0x80) {</div><div class='del'>-			hide_flag = (u8) (ioc-&gt;manu_pg10.OEMSpecificFlags0 &amp;</div><div class='add'>+			hide_flag = (u8) (</div><div class='add'>+			    le32_to_cpu(ioc-&gt;manu_pg10.OEMSpecificFlags0) &amp;</div><div class='ctx'> 			    MFG_PAGE10_HIDE_SSDS_MASK);</div><div class='ctx'> 			if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)</div><div class='ctx'> 				ioc-&gt;mfg_pg10_hide_flag = hide_flag;</div><div class='hunk'>@@ -4262,7 +4270,7 @@ mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 		goto out_free_resources;</div><div class='ctx'> </div><div class='ctx'> 	ioc-&gt;pfacts = kcalloc(ioc-&gt;facts.NumberOfPorts,</div><div class='del'>-	    sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);</div><div class='add'>+	    sizeof(struct mpt2sas_port_facts), GFP_KERNEL);</div><div class='ctx'> 	if (!ioc-&gt;pfacts) {</div><div class='ctx'> 		r = -ENOMEM;</div><div class='ctx'> 		goto out_free_resources;</div><div class='hunk'>@@ -4279,7 +4287,6 @@ mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 		goto out_free_resources;</div><div class='ctx'> </div><div class='ctx'> 	init_waitqueue_head(&amp;ioc-&gt;reset_wq);</div><div class='del'>-</div><div class='ctx'> 	/* allocate memory pd handle bitmask list */</div><div class='ctx'> 	ioc-&gt;pd_handles_sz = (ioc-&gt;facts.MaxDevHandle / 8);</div><div class='ctx'> 	if (ioc-&gt;facts.MaxDevHandle % 8)</div><div class='hunk'>@@ -4290,7 +4297,12 @@ mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 		r = -ENOMEM;</div><div class='ctx'> 		goto out_free_resources;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+	ioc-&gt;blocking_handles = kzalloc(ioc-&gt;pd_handles_sz,</div><div class='add'>+	    GFP_KERNEL);</div><div class='add'>+	if (!ioc-&gt;blocking_handles) {</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto out_free_resources;</div><div class='add'>+	}</div><div class='ctx'> 	ioc-&gt;fwfault_debug = mpt2sas_fwfault_debug;</div><div class='ctx'> </div><div class='ctx'> 	/* base internal command bits */</div><div class='hunk'>@@ -4377,6 +4389,7 @@ mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 	if (ioc-&gt;is_warpdrive)</div><div class='ctx'> 		kfree(ioc-&gt;reply_post_host_index);</div><div class='ctx'> 	kfree(ioc-&gt;pd_handles);</div><div class='add'>+	kfree(ioc-&gt;blocking_handles);</div><div class='ctx'> 	kfree(ioc-&gt;tm_cmds.reply);</div><div class='ctx'> 	kfree(ioc-&gt;transport_cmds.reply);</div><div class='ctx'> 	kfree(ioc-&gt;scsih_cmds.reply);</div><div class='hunk'>@@ -4418,6 +4431,7 @@ mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 	if (ioc-&gt;is_warpdrive)</div><div class='ctx'> 		kfree(ioc-&gt;reply_post_host_index);</div><div class='ctx'> 	kfree(ioc-&gt;pd_handles);</div><div class='add'>+	kfree(ioc-&gt;blocking_handles);</div><div class='ctx'> 	kfree(ioc-&gt;pfacts);</div><div class='ctx'> 	kfree(ioc-&gt;ctl_cmds.reply);</div><div class='ctx'> 	kfree(ioc-&gt;ctl_cmds.sense);</div><div class='head'>diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.h b/drivers/scsi/mpt2sas/mpt2sas_base.h<br/>index c7459fdc06cc..b6dd3a5de7f9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpt2sas_base.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/mpt2sas/mpt2sas_base.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpt2sas_base.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpt2sas_base.h</a></div><div class='hunk'>@@ -69,8 +69,8 @@</div><div class='ctx'> #define MPT2SAS_DRIVER_NAME		"mpt2sas"</div><div class='ctx'> #define MPT2SAS_AUTHOR	"LSI Corporation &lt;DL-MPTFusionLinux@lsi.com&gt;"</div><div class='ctx'> #define MPT2SAS_DESCRIPTION	"LSI MPT Fusion SAS 2.0 Device Driver"</div><div class='del'>-#define MPT2SAS_DRIVER_VERSION		"12.100.00.00"</div><div class='del'>-#define MPT2SAS_MAJOR_VERSION		12</div><div class='add'>+#define MPT2SAS_DRIVER_VERSION		"13.100.00.00"</div><div class='add'>+#define MPT2SAS_MAJOR_VERSION		13</div><div class='ctx'> #define MPT2SAS_MINOR_VERSION		100</div><div class='ctx'> #define MPT2SAS_BUILD_VERSION		00</div><div class='ctx'> #define MPT2SAS_RELEASE_VERSION		00</div><div class='hunk'>@@ -720,6 +720,7 @@ typedef void (*MPT2SAS_FLUSH_RUNNING_CMDS)(struct MPT2SAS_ADAPTER *ioc);</div><div class='ctx'>  * @io_missing_delay: time for IO completed by fw when PDR enabled</div><div class='ctx'>  * @device_missing_delay: time for device missing by fw when PDR enabled</div><div class='ctx'>  * @sas_id : used for setting volume target IDs</div><div class='add'>+ * @blocking_handles: bitmask used to identify which devices need blocking</div><div class='ctx'>  * @pd_handles : bitmask for PD handles</div><div class='ctx'>  * @pd_handles_sz : size of pd_handle bitmask</div><div class='ctx'>  * @config_page_sz: config page size</div><div class='hunk'>@@ -889,7 +890,7 @@ struct MPT2SAS_ADAPTER {</div><div class='ctx'> 	u8		io_missing_delay;</div><div class='ctx'> 	u16		device_missing_delay;</div><div class='ctx'> 	int		sas_id;</div><div class='del'>-</div><div class='add'>+	void		*blocking_handles;</div><div class='ctx'> 	void		*pd_handles;</div><div class='ctx'> 	u16		pd_handles_sz;</div><div class='ctx'> </div><div class='hunk'>@@ -1058,7 +1059,8 @@ int mpt2sas_scsih_issue_tm(struct MPT2SAS_ADAPTER *ioc, u16 handle,</div><div class='ctx'> void mpt2sas_scsih_set_tm_flag(struct MPT2SAS_ADAPTER *ioc, u16 handle);</div><div class='ctx'> void mpt2sas_scsih_clear_tm_flag(struct MPT2SAS_ADAPTER *ioc, u16 handle);</div><div class='ctx'> void mpt2sas_expander_remove(struct MPT2SAS_ADAPTER *ioc, u64 sas_address);</div><div class='del'>-void mpt2sas_device_remove(struct MPT2SAS_ADAPTER *ioc, u64 sas_address);</div><div class='add'>+void mpt2sas_device_remove_by_sas_address(struct MPT2SAS_ADAPTER *ioc,</div><div class='add'>+		u64 sas_address);</div><div class='ctx'> struct _sas_node *mpt2sas_scsih_expander_find_by_handle(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'>     u16 handle);</div><div class='ctx'> struct _sas_node *mpt2sas_scsih_expander_find_by_sas_address(struct MPT2SAS_ADAPTER</div><div class='head'>diff --git a/drivers/scsi/mpt2sas/mpt2sas_ctl.c b/drivers/scsi/mpt2sas/mpt2sas_ctl.c<br/>index 3b9a28efea82..49bdd2dc8452 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpt2sas_ctl.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/mpt2sas/mpt2sas_ctl.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpt2sas_ctl.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpt2sas_ctl.c</a></div><div class='hunk'>@@ -620,11 +620,10 @@ _ctl_set_task_mid(struct MPT2SAS_ADAPTER *ioc, struct mpt2_ioctl_command *karg,</div><div class='ctx'>  * @ioc: per adapter object</div><div class='ctx'>  * @karg - (struct mpt2_ioctl_command)</div><div class='ctx'>  * @mf - pointer to mf in user space</div><div class='del'>- * @state - NON_BLOCKING or BLOCKING</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_do_mpt_command(struct MPT2SAS_ADAPTER *ioc,</div><div class='del'>-    struct mpt2_ioctl_command karg, void __user *mf, enum block_state state)</div><div class='add'>+_ctl_do_mpt_command(struct MPT2SAS_ADAPTER *ioc, struct mpt2_ioctl_command karg,</div><div class='add'>+	void __user *mf)</div><div class='ctx'> {</div><div class='ctx'> 	MPI2RequestHeader_t *mpi_request = NULL, *request;</div><div class='ctx'> 	MPI2DefaultReply_t *mpi_reply;</div><div class='hunk'>@@ -647,11 +646,6 @@ _ctl_do_mpt_command(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> </div><div class='ctx'> 	issue_reset = 0;</div><div class='ctx'> </div><div class='del'>-	if (state == NON_BLOCKING &amp;&amp; !mutex_trylock(&amp;ioc-&gt;ctl_cmds.mutex))</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	else if (mutex_lock_interruptible(&amp;ioc-&gt;ctl_cmds.mutex))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='ctx'> 	if (ioc-&gt;ctl_cmds.status != MPT2_CMD_NOT_USED) {</div><div class='ctx'> 		printk(MPT2SAS_ERR_FMT "%s: ctl_cmd in use\n",</div><div class='ctx'> 		    ioc-&gt;name, __func__);</div><div class='hunk'>@@ -871,8 +865,16 @@ _ctl_do_mpt_command(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 		if (smp_request-&gt;PassthroughFlags &amp;</div><div class='ctx'> 		    MPI2_SMP_PT_REQ_PT_FLAGS_IMMEDIATE)</div><div class='ctx'> 			data = (u8 *)&amp;smp_request-&gt;SGL;</div><div class='del'>-		else</div><div class='add'>+		else {</div><div class='add'>+			if (unlikely(data_out == NULL)) {</div><div class='add'>+				printk(KERN_ERR "failure at %s:%d/%s()!\n",</div><div class='add'>+				    __FILE__, __LINE__, __func__);</div><div class='add'>+				mpt2sas_base_free_smid(ioc, smid);</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='ctx'> 			data = data_out;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if (data[1] == 0x91 &amp;&amp; (data[10] == 1 || data[10] == 2)) {</div><div class='ctx'> 			ioc-&gt;ioc_link_reset_in_progress = 1;</div><div class='hunk'>@@ -985,7 +987,8 @@ _ctl_do_mpt_command(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 		ret = -ENODATA;</div><div class='ctx'> 		if ((mpi_request-&gt;Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||</div><div class='ctx'> 		    mpi_request-&gt;Function ==</div><div class='del'>-		    MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH)) {</div><div class='add'>+		    MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||</div><div class='add'>+		    mpi_request-&gt;Function == MPI2_FUNCTION_SATA_PASSTHROUGH)) {</div><div class='ctx'> 			printk(MPT2SAS_INFO_FMT "issue target reset: handle "</div><div class='ctx'> 			    "= (0x%04x)\n", ioc-&gt;name,</div><div class='ctx'> 			    le16_to_cpu(mpi_request-&gt;FunctionDependent1));</div><div class='hunk'>@@ -1013,27 +1016,24 @@ _ctl_do_mpt_command(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> </div><div class='ctx'> 	kfree(mpi_request);</div><div class='ctx'> 	ioc-&gt;ctl_cmds.status = MPT2_CMD_NOT_USED;</div><div class='del'>-	mutex_unlock(&amp;ioc-&gt;ctl_cmds.mutex);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * _ctl_getiocinfo - main handler for MPT2IOCINFO opcode</div><div class='add'>+ * @ioc: per adapter object</div><div class='ctx'>  * @arg - user space buffer containing ioctl content</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_getiocinfo(void __user *arg)</div><div class='add'>+_ctl_getiocinfo(struct MPT2SAS_ADAPTER *ioc, void __user *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpt2_ioctl_iocinfo karg;</div><div class='del'>-	struct MPT2SAS_ADAPTER *ioc;</div><div class='ctx'> </div><div class='ctx'> 	if (copy_from_user(&amp;karg, arg, sizeof(karg))) {</div><div class='ctx'> 		printk(KERN_ERR "failure at %s:%d/%s()!\n",</div><div class='ctx'> 		    __FILE__, __LINE__, __func__);</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-	if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	dctlprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc-&gt;name,</div><div class='ctx'> 	    __func__));</div><div class='hunk'>@@ -1069,21 +1069,19 @@ _ctl_getiocinfo(void __user *arg)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * _ctl_eventquery - main handler for MPT2EVENTQUERY opcode</div><div class='add'>+ * @ioc: per adapter object</div><div class='ctx'>  * @arg - user space buffer containing ioctl content</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_eventquery(void __user *arg)</div><div class='add'>+_ctl_eventquery(struct MPT2SAS_ADAPTER *ioc, void __user *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpt2_ioctl_eventquery karg;</div><div class='del'>-	struct MPT2SAS_ADAPTER *ioc;</div><div class='ctx'> </div><div class='ctx'> 	if (copy_from_user(&amp;karg, arg, sizeof(karg))) {</div><div class='ctx'> 		printk(KERN_ERR "failure at %s:%d/%s()!\n",</div><div class='ctx'> 		    __FILE__, __LINE__, __func__);</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-	if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	dctlprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc-&gt;name,</div><div class='ctx'> 	    __func__));</div><div class='hunk'>@@ -1102,21 +1100,19 @@ _ctl_eventquery(void __user *arg)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * _ctl_eventenable - main handler for MPT2EVENTENABLE opcode</div><div class='add'>+ * @ioc: per adapter object</div><div class='ctx'>  * @arg - user space buffer containing ioctl content</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_eventenable(void __user *arg)</div><div class='add'>+_ctl_eventenable(struct MPT2SAS_ADAPTER *ioc, void __user *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpt2_ioctl_eventenable karg;</div><div class='del'>-	struct MPT2SAS_ADAPTER *ioc;</div><div class='ctx'> </div><div class='ctx'> 	if (copy_from_user(&amp;karg, arg, sizeof(karg))) {</div><div class='ctx'> 		printk(KERN_ERR "failure at %s:%d/%s()!\n",</div><div class='ctx'> 		    __FILE__, __LINE__, __func__);</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-	if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	dctlprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc-&gt;name,</div><div class='ctx'> 	    __func__));</div><div class='hunk'>@@ -1142,13 +1138,13 @@ _ctl_eventenable(void __user *arg)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * _ctl_eventreport - main handler for MPT2EVENTREPORT opcode</div><div class='add'>+ * @ioc: per adapter object</div><div class='ctx'>  * @arg - user space buffer containing ioctl content</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_eventreport(void __user *arg)</div><div class='add'>+_ctl_eventreport(struct MPT2SAS_ADAPTER *ioc, void __user *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpt2_ioctl_eventreport karg;</div><div class='del'>-	struct MPT2SAS_ADAPTER *ioc;</div><div class='ctx'> 	u32 number_bytes, max_events, max;</div><div class='ctx'> 	struct mpt2_ioctl_eventreport __user *uarg = arg;</div><div class='ctx'> </div><div class='hunk'>@@ -1157,8 +1153,6 @@ _ctl_eventreport(void __user *arg)</div><div class='ctx'> 		    __FILE__, __LINE__, __func__);</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-	if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	dctlprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc-&gt;name,</div><div class='ctx'> 	    __func__));</div><div class='hunk'>@@ -1188,13 +1182,13 @@ _ctl_eventreport(void __user *arg)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * _ctl_do_reset - main handler for MPT2HARDRESET opcode</div><div class='add'>+ * @ioc: per adapter object</div><div class='ctx'>  * @arg - user space buffer containing ioctl content</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_do_reset(void __user *arg)</div><div class='add'>+_ctl_do_reset(struct MPT2SAS_ADAPTER *ioc, void __user *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpt2_ioctl_diag_reset karg;</div><div class='del'>-	struct MPT2SAS_ADAPTER *ioc;</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='ctx'> 	if (copy_from_user(&amp;karg, arg, sizeof(karg))) {</div><div class='hunk'>@@ -1202,8 +1196,6 @@ _ctl_do_reset(void __user *arg)</div><div class='ctx'> 		    __FILE__, __LINE__, __func__);</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-	if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (ioc-&gt;shost_recovery || ioc-&gt;pci_error_recovery ||</div><div class='ctx'> 		ioc-&gt;is_driver_loading)</div><div class='hunk'>@@ -1292,13 +1284,13 @@ _ctl_btdh_search_raid_device(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * _ctl_btdh_mapping - main handler for MPT2BTDHMAPPING opcode</div><div class='add'>+ * @ioc: per adapter object</div><div class='ctx'>  * @arg - user space buffer containing ioctl content</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_btdh_mapping(void __user *arg)</div><div class='add'>+_ctl_btdh_mapping(struct MPT2SAS_ADAPTER *ioc, void __user *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpt2_ioctl_btdh_mapping karg;</div><div class='del'>-	struct MPT2SAS_ADAPTER *ioc;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	if (copy_from_user(&amp;karg, arg, sizeof(karg))) {</div><div class='hunk'>@@ -1306,8 +1298,6 @@ _ctl_btdh_mapping(void __user *arg)</div><div class='ctx'> 		    __FILE__, __LINE__, __func__);</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-	if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	dctlprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc-&gt;name,</div><div class='ctx'> 	    __func__));</div><div class='hunk'>@@ -1576,17 +1566,16 @@ mpt2sas_enable_diag_buffer(struct MPT2SAS_ADAPTER *ioc, u8 bits_to_register)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * _ctl_diag_register - application register with driver</div><div class='add'>+ * @ioc: per adapter object</div><div class='ctx'>  * @arg - user space buffer containing ioctl content</div><div class='del'>- * @state - NON_BLOCKING or BLOCKING</div><div class='ctx'>  *</div><div class='ctx'>  * This will allow the driver to setup any required buffers that will be</div><div class='ctx'>  * needed by firmware to communicate with the driver.</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_diag_register(void __user *arg, enum block_state state)</div><div class='add'>+_ctl_diag_register(struct MPT2SAS_ADAPTER *ioc, void __user *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpt2_diag_register karg;</div><div class='del'>-	struct MPT2SAS_ADAPTER *ioc;</div><div class='ctx'> 	long rc;</div><div class='ctx'> </div><div class='ctx'> 	if (copy_from_user(&amp;karg, arg, sizeof(karg))) {</div><div class='hunk'>@@ -1594,30 +1583,23 @@ _ctl_diag_register(void __user *arg, enum block_state state)</div><div class='ctx'> 		    __FILE__, __LINE__, __func__);</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-	if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (state == NON_BLOCKING &amp;&amp; !mutex_trylock(&amp;ioc-&gt;ctl_cmds.mutex))</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	else if (mutex_lock_interruptible(&amp;ioc-&gt;ctl_cmds.mutex))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='ctx'> 	rc = _ctl_diag_register_2(ioc, &amp;karg);</div><div class='del'>-	mutex_unlock(&amp;ioc-&gt;ctl_cmds.mutex);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * _ctl_diag_unregister - application unregister with driver</div><div class='add'>+ * @ioc: per adapter object</div><div class='ctx'>  * @arg - user space buffer containing ioctl content</div><div class='ctx'>  *</div><div class='ctx'>  * This will allow the driver to cleanup any memory allocated for diag</div><div class='ctx'>  * messages and to free up any resources.</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_diag_unregister(void __user *arg)</div><div class='add'>+_ctl_diag_unregister(struct MPT2SAS_ADAPTER *ioc, void __user *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpt2_diag_unregister karg;</div><div class='del'>-	struct MPT2SAS_ADAPTER *ioc;</div><div class='ctx'> 	void *request_data;</div><div class='ctx'> 	dma_addr_t request_data_dma;</div><div class='ctx'> 	u32 request_data_sz;</div><div class='hunk'>@@ -1628,8 +1610,6 @@ _ctl_diag_unregister(void __user *arg)</div><div class='ctx'> 		    __FILE__, __LINE__, __func__);</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-	if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	dctlprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc-&gt;name,</div><div class='ctx'> 	    __func__));</div><div class='hunk'>@@ -1678,6 +1658,7 @@ _ctl_diag_unregister(void __user *arg)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * _ctl_diag_query - query relevant info associated with diag buffers</div><div class='add'>+ * @ioc: per adapter object</div><div class='ctx'>  * @arg - user space buffer containing ioctl content</div><div class='ctx'>  *</div><div class='ctx'>  * The application will send only buffer_type and unique_id.  Driver will</div><div class='hunk'>@@ -1685,10 +1666,9 @@ _ctl_diag_unregister(void __user *arg)</div><div class='ctx'>  * 0x00, the driver will return info specified by Buffer Type.</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_diag_query(void __user *arg)</div><div class='add'>+_ctl_diag_query(struct MPT2SAS_ADAPTER *ioc, void __user *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpt2_diag_query karg;</div><div class='del'>-	struct MPT2SAS_ADAPTER *ioc;</div><div class='ctx'> 	void *request_data;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u8 buffer_type;</div><div class='hunk'>@@ -1698,8 +1678,6 @@ _ctl_diag_query(void __user *arg)</div><div class='ctx'> 		    __FILE__, __LINE__, __func__);</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-	if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	dctlprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc-&gt;name,</div><div class='ctx'> 	    __func__));</div><div class='hunk'>@@ -1866,17 +1844,15 @@ _ctl_send_release(struct MPT2SAS_ADAPTER *ioc, u8 buffer_type, u8 *issue_reset)</div><div class='ctx'> /**</div><div class='ctx'>  * _ctl_diag_release - request to send Diag Release Message to firmware</div><div class='ctx'>  * @arg - user space buffer containing ioctl content</div><div class='del'>- * @state - NON_BLOCKING or BLOCKING</div><div class='ctx'>  *</div><div class='ctx'>  * This allows ownership of the specified buffer to returned to the driver,</div><div class='ctx'>  * allowing an application to read the buffer without fear that firmware is</div><div class='ctx'>  * overwritting information in the buffer.</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_diag_release(void __user *arg, enum block_state state)</div><div class='add'>+_ctl_diag_release(struct MPT2SAS_ADAPTER *ioc, void __user *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpt2_diag_release karg;</div><div class='del'>-	struct MPT2SAS_ADAPTER *ioc;</div><div class='ctx'> 	void *request_data;</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	u8 buffer_type;</div><div class='hunk'>@@ -1887,8 +1863,6 @@ _ctl_diag_release(void __user *arg, enum block_state state)</div><div class='ctx'> 		    __FILE__, __LINE__, __func__);</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-	if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	dctlprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc-&gt;name,</div><div class='ctx'> 	    __func__));</div><div class='hunk'>@@ -1942,32 +1916,25 @@ _ctl_diag_release(void __user *arg, enum block_state state)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (state == NON_BLOCKING &amp;&amp; !mutex_trylock(&amp;ioc-&gt;ctl_cmds.mutex))</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	else if (mutex_lock_interruptible(&amp;ioc-&gt;ctl_cmds.mutex))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='del'>-</div><div class='ctx'> 	rc = _ctl_send_release(ioc, buffer_type, &amp;issue_reset);</div><div class='ctx'> </div><div class='ctx'> 	if (issue_reset)</div><div class='ctx'> 		mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,</div><div class='ctx'> 		    FORCE_BIG_HAMMER);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;ioc-&gt;ctl_cmds.mutex);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * _ctl_diag_read_buffer - request for copy of the diag buffer</div><div class='add'>+ * @ioc: per adapter object</div><div class='ctx'>  * @arg - user space buffer containing ioctl content</div><div class='del'>- * @state - NON_BLOCKING or BLOCKING</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_diag_read_buffer(void __user *arg, enum block_state state)</div><div class='add'>+_ctl_diag_read_buffer(struct MPT2SAS_ADAPTER *ioc, void __user *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpt2_diag_read_buffer karg;</div><div class='ctx'> 	struct mpt2_diag_read_buffer __user *uarg = arg;</div><div class='del'>-	struct MPT2SAS_ADAPTER *ioc;</div><div class='ctx'> 	void *request_data, *diag_data;</div><div class='ctx'> 	Mpi2DiagBufferPostRequest_t *mpi_request;</div><div class='ctx'> 	Mpi2DiagBufferPostReply_t *mpi_reply;</div><div class='hunk'>@@ -1983,8 +1950,6 @@ _ctl_diag_read_buffer(void __user *arg, enum block_state state)</div><div class='ctx'> 		    __FILE__, __LINE__, __func__);</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-	if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	dctlprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc-&gt;name,</div><div class='ctx'> 	    __func__));</div><div class='hunk'>@@ -2055,10 +2020,6 @@ _ctl_diag_read_buffer(void __user *arg, enum block_state state)</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Get a free request frame and save the message context.</div><div class='ctx'> 	*/</div><div class='del'>-	if (state == NON_BLOCKING &amp;&amp; !mutex_trylock(&amp;ioc-&gt;ctl_cmds.mutex))</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	else if (mutex_lock_interruptible(&amp;ioc-&gt;ctl_cmds.mutex))</div><div class='del'>-		return -ERESTARTSYS;</div><div class='ctx'> </div><div class='ctx'> 	if (ioc-&gt;ctl_cmds.status != MPT2_CMD_NOT_USED) {</div><div class='ctx'> 		printk(MPT2SAS_ERR_FMT "%s: ctl_cmd in use\n",</div><div class='hunk'>@@ -2139,115 +2100,170 @@ _ctl_diag_read_buffer(void __user *arg, enum block_state state)</div><div class='ctx'>  out:</div><div class='ctx'> </div><div class='ctx'> 	ioc-&gt;ctl_cmds.status = MPT2_CMD_NOT_USED;</div><div class='del'>-	mutex_unlock(&amp;ioc-&gt;ctl_cmds.mutex);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_COMPAT</div><div class='add'>+/**</div><div class='add'>+ * _ctl_compat_mpt_command - convert 32bit pointers to 64bit.</div><div class='add'>+ * @ioc: per adapter object</div><div class='add'>+ * @cmd - ioctl opcode</div><div class='add'>+ * @arg - (struct mpt2_ioctl_command32)</div><div class='add'>+ *</div><div class='add'>+ * MPT2COMMAND32 - Handle 32bit applications running on 64bit os.</div><div class='add'>+ */</div><div class='add'>+static long</div><div class='add'>+_ctl_compat_mpt_command(struct MPT2SAS_ADAPTER *ioc, unsigned cmd,</div><div class='add'>+	void __user *arg)</div><div class='add'>+{</div><div class='add'>+	struct mpt2_ioctl_command32 karg32;</div><div class='add'>+	struct mpt2_ioctl_command32 __user *uarg;</div><div class='add'>+	struct mpt2_ioctl_command karg;</div><div class='add'>+</div><div class='add'>+	if (_IOC_SIZE(cmd) != sizeof(struct mpt2_ioctl_command32))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	uarg = (struct mpt2_ioctl_command32 __user *) arg;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(&amp;karg32, (char __user *)arg, sizeof(karg32))) {</div><div class='add'>+		printk(KERN_ERR "failure at %s:%d/%s()!\n",</div><div class='add'>+		    __FILE__, __LINE__, __func__);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;karg, 0, sizeof(struct mpt2_ioctl_command));</div><div class='add'>+	karg.hdr.ioc_number = karg32.hdr.ioc_number;</div><div class='add'>+	karg.hdr.port_number = karg32.hdr.port_number;</div><div class='add'>+	karg.hdr.max_data_size = karg32.hdr.max_data_size;</div><div class='add'>+	karg.timeout = karg32.timeout;</div><div class='add'>+	karg.max_reply_bytes = karg32.max_reply_bytes;</div><div class='add'>+	karg.data_in_size = karg32.data_in_size;</div><div class='add'>+	karg.data_out_size = karg32.data_out_size;</div><div class='add'>+	karg.max_sense_bytes = karg32.max_sense_bytes;</div><div class='add'>+	karg.data_sge_offset = karg32.data_sge_offset;</div><div class='add'>+	karg.reply_frame_buf_ptr = compat_ptr(karg32.reply_frame_buf_ptr);</div><div class='add'>+	karg.data_in_buf_ptr = compat_ptr(karg32.data_in_buf_ptr);</div><div class='add'>+	karg.data_out_buf_ptr = compat_ptr(karg32.data_out_buf_ptr);</div><div class='add'>+	karg.sense_data_ptr = compat_ptr(karg32.sense_data_ptr);</div><div class='add'>+	return _ctl_do_mpt_command(ioc, karg, &amp;uarg-&gt;mf);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * _ctl_ioctl_main - main ioctl entry point</div><div class='ctx'>  * @file - (struct file)</div><div class='ctx'>  * @cmd - ioctl opcode</div><div class='ctx'>  * @arg -</div><div class='add'>+ * compat - handles 32 bit applications in 64bit os</div><div class='ctx'>  */</div><div class='ctx'> static long</div><div class='del'>-_ctl_ioctl_main(struct file *file, unsigned int cmd, void __user *arg)</div><div class='add'>+_ctl_ioctl_main(struct file *file, unsigned int cmd, void __user *arg,</div><div class='add'>+	u8 compat)</div><div class='ctx'> {</div><div class='add'>+	struct MPT2SAS_ADAPTER *ioc;</div><div class='add'>+	struct mpt2_ioctl_header ioctl_header;</div><div class='ctx'> 	enum block_state state;</div><div class='ctx'> 	long ret = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	state = (file-&gt;f_flags &amp; O_NONBLOCK) ? NON_BLOCKING :</div><div class='del'>-	    BLOCKING;</div><div class='add'>+	/* get IOCTL header */</div><div class='add'>+	if (copy_from_user(&amp;ioctl_header, (char __user *)arg,</div><div class='add'>+	    sizeof(struct mpt2_ioctl_header))) {</div><div class='add'>+		printk(KERN_ERR "failure at %s:%d/%s()!\n",</div><div class='add'>+		    __FILE__, __LINE__, __func__);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (_ctl_verify_adapter(ioctl_header.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	if (ioc-&gt;shost_recovery || ioc-&gt;pci_error_recovery ||</div><div class='add'>+	    ioc-&gt;is_driver_loading)</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	state = (file-&gt;f_flags &amp; O_NONBLOCK) ? NON_BLOCKING : BLOCKING;</div><div class='add'>+	if (state == NON_BLOCKING &amp;&amp; !mutex_trylock(&amp;ioc-&gt;ctl_cmds.mutex))</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	else if (mutex_lock_interruptible(&amp;ioc-&gt;ctl_cmds.mutex))</div><div class='add'>+		return -ERESTARTSYS;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case MPT2IOCINFO:</div><div class='ctx'> 		if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_iocinfo))</div><div class='del'>-			ret = _ctl_getiocinfo(arg);</div><div class='add'>+			ret = _ctl_getiocinfo(ioc, arg);</div><div class='ctx'> 		break;</div><div class='add'>+#ifdef CONFIG_COMPAT</div><div class='add'>+	case MPT2COMMAND32:</div><div class='add'>+#endif</div><div class='ctx'> 	case MPT2COMMAND:</div><div class='ctx'> 	{</div><div class='del'>-		struct mpt2_ioctl_command karg;</div><div class='ctx'> 		struct mpt2_ioctl_command __user *uarg;</div><div class='del'>-		struct MPT2SAS_ADAPTER *ioc;</div><div class='del'>-</div><div class='add'>+		struct mpt2_ioctl_command karg;</div><div class='add'>+#ifdef CONFIG_COMPAT</div><div class='add'>+		if (compat) {</div><div class='add'>+			ret = _ctl_compat_mpt_command(ioc, cmd, arg);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+#endif</div><div class='ctx'> 		if (copy_from_user(&amp;karg, arg, sizeof(karg))) {</div><div class='ctx'> 			printk(KERN_ERR "failure at %s:%d/%s()!\n",</div><div class='ctx'> 			    __FILE__, __LINE__, __func__);</div><div class='del'>-			return -EFAULT;</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 ||</div><div class='del'>-		    !ioc)</div><div class='del'>-			return -ENODEV;</div><div class='del'>-</div><div class='del'>-		if (ioc-&gt;shost_recovery || ioc-&gt;pci_error_recovery ||</div><div class='del'>-				ioc-&gt;is_driver_loading)</div><div class='del'>-			return -EAGAIN;</div><div class='del'>-</div><div class='ctx'> 		if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_command)) {</div><div class='ctx'> 			uarg = arg;</div><div class='del'>-			ret = _ctl_do_mpt_command(ioc, karg, &amp;uarg-&gt;mf, state);</div><div class='add'>+			ret = _ctl_do_mpt_command(ioc, karg, &amp;uarg-&gt;mf);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	case MPT2EVENTQUERY:</div><div class='ctx'> 		if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_eventquery))</div><div class='del'>-			ret = _ctl_eventquery(arg);</div><div class='add'>+			ret = _ctl_eventquery(ioc, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MPT2EVENTENABLE:</div><div class='ctx'> 		if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_eventenable))</div><div class='del'>-			ret = _ctl_eventenable(arg);</div><div class='add'>+			ret = _ctl_eventenable(ioc, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MPT2EVENTREPORT:</div><div class='del'>-		ret = _ctl_eventreport(arg);</div><div class='add'>+		ret = _ctl_eventreport(ioc, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MPT2HARDRESET:</div><div class='ctx'> 		if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_diag_reset))</div><div class='del'>-			ret = _ctl_do_reset(arg);</div><div class='add'>+			ret = _ctl_do_reset(ioc, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MPT2BTDHMAPPING:</div><div class='ctx'> 		if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_btdh_mapping))</div><div class='del'>-			ret = _ctl_btdh_mapping(arg);</div><div class='add'>+			ret = _ctl_btdh_mapping(ioc, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MPT2DIAGREGISTER:</div><div class='ctx'> 		if (_IOC_SIZE(cmd) == sizeof(struct mpt2_diag_register))</div><div class='del'>-			ret = _ctl_diag_register(arg, state);</div><div class='add'>+			ret = _ctl_diag_register(ioc, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MPT2DIAGUNREGISTER:</div><div class='ctx'> 		if (_IOC_SIZE(cmd) == sizeof(struct mpt2_diag_unregister))</div><div class='del'>-			ret = _ctl_diag_unregister(arg);</div><div class='add'>+			ret = _ctl_diag_unregister(ioc, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MPT2DIAGQUERY:</div><div class='ctx'> 		if (_IOC_SIZE(cmd) == sizeof(struct mpt2_diag_query))</div><div class='del'>-			ret = _ctl_diag_query(arg);</div><div class='add'>+			ret = _ctl_diag_query(ioc, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MPT2DIAGRELEASE:</div><div class='ctx'> 		if (_IOC_SIZE(cmd) == sizeof(struct mpt2_diag_release))</div><div class='del'>-			ret = _ctl_diag_release(arg, state);</div><div class='add'>+			ret = _ctl_diag_release(ioc, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MPT2DIAGREADBUFFER:</div><div class='ctx'> 		if (_IOC_SIZE(cmd) == sizeof(struct mpt2_diag_read_buffer))</div><div class='del'>-			ret = _ctl_diag_read_buffer(arg, state);</div><div class='add'>+			ret = _ctl_diag_read_buffer(ioc, arg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-	{</div><div class='del'>-		struct mpt2_ioctl_command karg;</div><div class='del'>-		struct MPT2SAS_ADAPTER *ioc;</div><div class='del'>-</div><div class='del'>-		if (copy_from_user(&amp;karg, arg, sizeof(karg))) {</div><div class='del'>-			printk(KERN_ERR "failure at %s:%d/%s()!\n",</div><div class='del'>-			    __FILE__, __LINE__, __func__);</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (_ctl_verify_adapter(karg.hdr.ioc_number, &amp;ioc) == -1 ||</div><div class='del'>-		    !ioc)</div><div class='del'>-			return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 		dctlprintk(ioc, printk(MPT2SAS_INFO_FMT</div><div class='ctx'> 		    "unsupported ioctl opcode(0x%08x)\n", ioc-&gt;name, cmd));</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ioc-&gt;ctl_cmds.mutex);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2262,66 +2278,11 @@ _ctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg)</div><div class='ctx'> {</div><div class='ctx'> 	long ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;_ctl_mutex);</div><div class='del'>-	ret = _ctl_ioctl_main(file, cmd, (void __user *)arg);</div><div class='del'>-	mutex_unlock(&amp;_ctl_mutex);</div><div class='add'>+	ret = _ctl_ioctl_main(file, cmd, (void __user *)arg, 0);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='ctx'> /**</div><div class='del'>- * _ctl_compat_mpt_command - convert 32bit pointers to 64bit.</div><div class='del'>- * @file - (struct file)</div><div class='del'>- * @cmd - ioctl opcode</div><div class='del'>- * @arg - (struct mpt2_ioctl_command32)</div><div class='del'>- *</div><div class='del'>- * MPT2COMMAND32 - Handle 32bit applications running on 64bit os.</div><div class='del'>- */</div><div class='del'>-static long</div><div class='del'>-_ctl_compat_mpt_command(struct file *file, unsigned cmd, unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	struct mpt2_ioctl_command32 karg32;</div><div class='del'>-	struct mpt2_ioctl_command32 __user *uarg;</div><div class='del'>-	struct mpt2_ioctl_command karg;</div><div class='del'>-	struct MPT2SAS_ADAPTER *ioc;</div><div class='del'>-	enum block_state state;</div><div class='del'>-</div><div class='del'>-	if (_IOC_SIZE(cmd) != sizeof(struct mpt2_ioctl_command32))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	uarg = (struct mpt2_ioctl_command32 __user *) arg;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;karg32, (char __user *)arg, sizeof(karg32))) {</div><div class='del'>-		printk(KERN_ERR "failure at %s:%d/%s()!\n",</div><div class='del'>-		    __FILE__, __LINE__, __func__);</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	}</div><div class='del'>-	if (_ctl_verify_adapter(karg32.hdr.ioc_number, &amp;ioc) == -1 || !ioc)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	if (ioc-&gt;shost_recovery || ioc-&gt;pci_error_recovery ||</div><div class='del'>-			ioc-&gt;is_driver_loading)</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-</div><div class='del'>-	memset(&amp;karg, 0, sizeof(struct mpt2_ioctl_command));</div><div class='del'>-	karg.hdr.ioc_number = karg32.hdr.ioc_number;</div><div class='del'>-	karg.hdr.port_number = karg32.hdr.port_number;</div><div class='del'>-	karg.hdr.max_data_size = karg32.hdr.max_data_size;</div><div class='del'>-	karg.timeout = karg32.timeout;</div><div class='del'>-	karg.max_reply_bytes = karg32.max_reply_bytes;</div><div class='del'>-	karg.data_in_size = karg32.data_in_size;</div><div class='del'>-	karg.data_out_size = karg32.data_out_size;</div><div class='del'>-	karg.max_sense_bytes = karg32.max_sense_bytes;</div><div class='del'>-	karg.data_sge_offset = karg32.data_sge_offset;</div><div class='del'>-	karg.reply_frame_buf_ptr = compat_ptr(karg32.reply_frame_buf_ptr);</div><div class='del'>-	karg.data_in_buf_ptr = compat_ptr(karg32.data_in_buf_ptr);</div><div class='del'>-	karg.data_out_buf_ptr = compat_ptr(karg32.data_out_buf_ptr);</div><div class='del'>-	karg.sense_data_ptr = compat_ptr(karg32.sense_data_ptr);</div><div class='del'>-	state = (file-&gt;f_flags &amp; O_NONBLOCK) ? NON_BLOCKING : BLOCKING;</div><div class='del'>-	return _ctl_do_mpt_command(ioc, karg, &amp;uarg-&gt;mf, state);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * _ctl_ioctl_compat - main ioctl entry point (compat)</div><div class='ctx'>  * @file -</div><div class='ctx'>  * @cmd -</div><div class='hunk'>@@ -2334,12 +2295,7 @@ _ctl_ioctl_compat(struct file *file, unsigned cmd, unsigned long arg)</div><div class='ctx'> {</div><div class='ctx'> 	long ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;_ctl_mutex);</div><div class='del'>-	if (cmd == MPT2COMMAND32)</div><div class='del'>-		ret = _ctl_compat_mpt_command(file, cmd, arg);</div><div class='del'>-	else</div><div class='del'>-		ret = _ctl_ioctl_main(file, cmd, (void __user *)arg);</div><div class='del'>-	mutex_unlock(&amp;_ctl_mutex);</div><div class='add'>+	ret = _ctl_ioctl_main(file, cmd, (void __user *)arg, 1);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -2884,7 +2840,7 @@ _ctl_host_trace_buffer_enable_store(struct device *cdev,</div><div class='ctx'> 	struct mpt2_diag_register diag_register;</div><div class='ctx'> 	u8 issue_reset = 0;</div><div class='ctx'> </div><div class='del'>-	if (sscanf(buf, "%s", str) != 1)</div><div class='add'>+	if (sscanf(buf, "%9s", str) != 1)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (!strcmp(str, "post")) {</div><div class='head'>diff --git a/drivers/scsi/mpt2sas/mpt2sas_scsih.c b/drivers/scsi/mpt2sas/mpt2sas_scsih.c<br/>index d953a57e779d..76973e8ca4ba 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpt2sas_scsih.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/mpt2sas/mpt2sas_scsih.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpt2sas_scsih.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpt2sas_scsih.c</a></div><div class='hunk'>@@ -579,14 +579,12 @@ _scsih_sas_device_remove(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='del'>-	if (mpt2sas_scsih_sas_device_find_by_sas_address(ioc,</div><div class='del'>-	    sas_device-&gt;sas_address)) {</div><div class='del'>-		list_del(&amp;sas_device-&gt;list);</div><div class='del'>-		kfree(sas_device);</div><div class='del'>-	}</div><div class='add'>+	list_del(&amp;sas_device-&gt;list);</div><div class='add'>+	kfree(sas_device);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * _scsih_sas_device_add - insert sas_device to the list.</div><div class='ctx'>  * @ioc: per adapter object</div><div class='hunk'>@@ -645,8 +643,8 @@ _scsih_sas_device_init_add(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 	list_add_tail(&amp;sas_device-&gt;list, &amp;ioc-&gt;sas_device_init_list);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 	_scsih_determine_boot_device(ioc, sas_device, 0);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -755,7 +753,6 @@ _scsih_raid_device_add(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'>  * @ioc: per adapter object</div><div class='ctx'>  * @raid_device: raid_device object</div><div class='ctx'>  *</div><div class='del'>- * This is removed from the raid_device_list link list.</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> _scsih_raid_device_remove(struct MPT2SAS_ADAPTER *ioc,</div><div class='hunk'>@@ -765,7 +762,6 @@ _scsih_raid_device_remove(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> 	list_del(&amp;raid_device-&gt;list);</div><div class='del'>-	memset(raid_device, 0, sizeof(struct _raid_device));</div><div class='ctx'> 	kfree(raid_device);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> }</div><div class='hunk'>@@ -1199,10 +1195,10 @@ _scsih_adjust_queue_depth(struct scsi_device *sdev, int qdepth)</div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 	sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,</div><div class='ctx'> 	   sas_device_priv_data-&gt;sas_target-&gt;sas_address);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 	if (sas_device &amp;&amp; sas_device-&gt;device_info &amp;</div><div class='ctx'> 	    MPI2_SAS_DEVICE_INFO_SATA_DEVICE)</div><div class='ctx'> 		max_depth = MPT2SAS_SATA_QUEUE_DEPTH;</div><div class='add'>+	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> </div><div class='ctx'>  not_sata:</div><div class='ctx'> </div><div class='hunk'>@@ -1299,7 +1295,8 @@ _scsih_target_alloc(struct scsi_target *starget)</div><div class='ctx'> 			sas_target_priv_data-&gt;handle = raid_device-&gt;handle;</div><div class='ctx'> 			sas_target_priv_data-&gt;sas_address = raid_device-&gt;wwid;</div><div class='ctx'> 			sas_target_priv_data-&gt;flags |= MPT_TARGET_FLAGS_VOLUME;</div><div class='del'>-			sas_target_priv_data-&gt;raid_device = raid_device;</div><div class='add'>+			if (ioc-&gt;is_warpdrive)</div><div class='add'>+				sas_target_priv_data-&gt;raid_device = raid_device;</div><div class='ctx'> 			raid_device-&gt;starget = starget;</div><div class='ctx'> 		}</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='hunk'>@@ -1465,12 +1462,12 @@ _scsih_slave_destroy(struct scsi_device *sdev)</div><div class='ctx'> /**</div><div class='ctx'>  * _scsih_display_sata_capabilities - sata capabilities</div><div class='ctx'>  * @ioc: per adapter object</div><div class='del'>- * @sas_device: the sas_device object</div><div class='add'>+ * @handle: device handle</div><div class='ctx'>  * @sdev: scsi device struct</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> _scsih_display_sata_capabilities(struct MPT2SAS_ADAPTER *ioc,</div><div class='del'>-    struct _sas_device *sas_device, struct scsi_device *sdev)</div><div class='add'>+	u16 handle, struct scsi_device *sdev)</div><div class='ctx'> {</div><div class='ctx'> 	Mpi2ConfigReply_t mpi_reply;</div><div class='ctx'> 	Mpi2SasDevicePage0_t sas_device_pg0;</div><div class='hunk'>@@ -1479,7 +1476,7 @@ _scsih_display_sata_capabilities(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 	u32 device_info;</div><div class='ctx'> </div><div class='ctx'> 	if ((mpt2sas_config_get_sas_device_pg0(ioc, &amp;mpi_reply, &amp;sas_device_pg0,</div><div class='del'>-	    MPI2_SAS_DEVICE_PGAD_FORM_HANDLE, sas_device-&gt;handle))) {</div><div class='add'>+	    MPI2_SAS_DEVICE_PGAD_FORM_HANDLE, handle))) {</div><div class='ctx'> 		printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",</div><div class='ctx'> 		    ioc-&gt;name, __FILE__, __LINE__, __func__);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1537,27 +1534,40 @@ _scsih_get_resync(struct device *dev)</div><div class='ctx'> 	Mpi2RaidVolPage0_t vol_pg0;</div><div class='ctx'> 	Mpi2ConfigReply_t mpi_reply;</div><div class='ctx'> 	u32 volume_status_flags;</div><div class='del'>-	u8 percent_complete = 0;</div><div class='add'>+	u8 percent_complete;</div><div class='add'>+	u16 handle;</div><div class='add'>+</div><div class='add'>+	percent_complete = 0;</div><div class='add'>+	handle = 0;</div><div class='add'>+	if (ioc-&gt;is_warpdrive)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> 	raid_device = _scsih_raid_device_find_by_id(ioc, sdev-&gt;id,</div><div class='ctx'> 	    sdev-&gt;channel);</div><div class='add'>+	if (raid_device) {</div><div class='add'>+		handle = raid_device-&gt;handle;</div><div class='add'>+		percent_complete = raid_device-&gt;percent_complete;</div><div class='add'>+	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> </div><div class='del'>-	if (!raid_device || ioc-&gt;is_warpdrive)</div><div class='add'>+	if (!handle)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (mpt2sas_config_get_raid_volume_pg0(ioc, &amp;mpi_reply, &amp;vol_pg0,</div><div class='del'>-	     MPI2_RAID_VOLUME_PGAD_FORM_HANDLE, raid_device-&gt;handle,</div><div class='add'>+	     MPI2_RAID_VOLUME_PGAD_FORM_HANDLE, handle,</div><div class='ctx'> 	     sizeof(Mpi2RaidVolPage0_t))) {</div><div class='ctx'> 		printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",</div><div class='ctx'> 		    ioc-&gt;name, __FILE__, __LINE__, __func__);</div><div class='add'>+		percent_complete = 0;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	volume_status_flags = le32_to_cpu(vol_pg0.VolumeStatusFlags);</div><div class='del'>-	if (volume_status_flags &amp; MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS)</div><div class='del'>-		percent_complete = raid_device-&gt;percent_complete;</div><div class='add'>+	if (!(volume_status_flags &amp;</div><div class='add'>+	    MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS))</div><div class='add'>+		percent_complete = 0;</div><div class='add'>+</div><div class='ctx'>  out:</div><div class='ctx'> 	raid_set_resync(mpt2sas_raid_template, dev, percent_complete);</div><div class='ctx'> }</div><div class='hunk'>@@ -1577,17 +1587,20 @@ _scsih_get_state(struct device *dev)</div><div class='ctx'> 	Mpi2ConfigReply_t mpi_reply;</div><div class='ctx'> 	u32 volstate;</div><div class='ctx'> 	enum raid_state state = RAID_STATE_UNKNOWN;</div><div class='add'>+	u16 handle = 0;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> 	raid_device = _scsih_raid_device_find_by_id(ioc, sdev-&gt;id,</div><div class='ctx'> 	    sdev-&gt;channel);</div><div class='add'>+	if (raid_device)</div><div class='add'>+		handle = raid_device-&gt;handle;</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (!raid_device)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (mpt2sas_config_get_raid_volume_pg0(ioc, &amp;mpi_reply, &amp;vol_pg0,</div><div class='del'>-	     MPI2_RAID_VOLUME_PGAD_FORM_HANDLE, raid_device-&gt;handle,</div><div class='add'>+	     MPI2_RAID_VOLUME_PGAD_FORM_HANDLE, handle,</div><div class='ctx'> 	     sizeof(Mpi2RaidVolPage0_t))) {</div><div class='ctx'> 		printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",</div><div class='ctx'> 		    ioc-&gt;name, __FILE__, __LINE__, __func__);</div><div class='hunk'>@@ -1620,14 +1633,14 @@ _scsih_get_state(struct device *dev)</div><div class='ctx'> /**</div><div class='ctx'>  * _scsih_set_level - set raid level</div><div class='ctx'>  * @sdev: scsi device struct</div><div class='del'>- * @raid_device: raid_device object</div><div class='add'>+ * @volume_type: volume type</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='del'>-_scsih_set_level(struct scsi_device *sdev, struct _raid_device *raid_device)</div><div class='add'>+_scsih_set_level(struct scsi_device *sdev, u8 volume_type)</div><div class='ctx'> {</div><div class='ctx'> 	enum raid_level level = RAID_LEVEL_UNKNOWN;</div><div class='ctx'> </div><div class='del'>-	switch (raid_device-&gt;volume_type) {</div><div class='add'>+	switch (volume_type) {</div><div class='ctx'> 	case MPI2_RAID_VOL_TYPE_RAID0:</div><div class='ctx'> 		level = RAID_LEVEL_0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1722,6 +1735,7 @@ _scsih_disable_ddio(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 	struct _raid_device *raid_device;</div><div class='ctx'> 	u16 handle;</div><div class='ctx'> 	u16 ioc_status;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	handle = 0xFFFF;</div><div class='ctx'> 	while (!(mpt2sas_config_get_raid_volume_pg1(ioc, &amp;mpi_reply,</div><div class='hunk'>@@ -1731,9 +1745,11 @@ _scsih_disable_ddio(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 		if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)</div><div class='ctx'> 			break;</div><div class='ctx'> 		handle = le16_to_cpu(vol_pg1.DevHandle);</div><div class='add'>+		spin_lock_irqsave(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> 		raid_device = _scsih_raid_device_find_by_handle(ioc, handle);</div><div class='ctx'> 		if (raid_device)</div><div class='ctx'> 			raid_device-&gt;direct_io_enabled = 0;</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='hunk'>@@ -1838,7 +1854,8 @@ _scsih_init_warpdrive_properties(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 		if (mpt2sas_config_get_phys_disk_pg0(ioc, &amp;mpi_reply,</div><div class='ctx'> 		    &amp;pd_pg0, MPI2_PHYSDISK_PGAD_FORM_PHYSDISKNUM,</div><div class='ctx'> 		    vol_pg0-&gt;PhysDisk[count].PhysDiskNum) ||</div><div class='del'>-		    pd_pg0.DevHandle == MPT2SAS_INVALID_DEVICE_HANDLE) {</div><div class='add'>+		     le16_to_cpu(pd_pg0.DevHandle) ==</div><div class='add'>+		    MPT2SAS_INVALID_DEVICE_HANDLE) {</div><div class='ctx'> 			printk(MPT2SAS_INFO_FMT "WarpDrive : Direct IO is "</div><div class='ctx'> 			    "disabled for the drive with handle(0x%04x) member"</div><div class='ctx'> 			    "handle retrieval failed for member number=%d\n",</div><div class='hunk'>@@ -1968,19 +1985,21 @@ _scsih_slave_configure(struct scsi_device *sdev)</div><div class='ctx'> 	u8 ssp_target = 0;</div><div class='ctx'> 	char *ds = "";</div><div class='ctx'> 	char *r_level = "";</div><div class='add'>+	u16 handle, volume_handle = 0;</div><div class='add'>+	u64 volume_wwid = 0;</div><div class='ctx'> </div><div class='ctx'> 	qdepth = 1;</div><div class='ctx'> 	sas_device_priv_data = sdev-&gt;hostdata;</div><div class='ctx'> 	sas_device_priv_data-&gt;configured_lun = 1;</div><div class='ctx'> 	sas_device_priv_data-&gt;flags &amp;= ~MPT_DEVICE_FLAGS_INIT;</div><div class='ctx'> 	sas_target_priv_data = sas_device_priv_data-&gt;sas_target;</div><div class='add'>+	handle = sas_target_priv_data-&gt;handle;</div><div class='ctx'> </div><div class='ctx'> 	/* raid volume handling */</div><div class='ctx'> 	if (sas_target_priv_data-&gt;flags &amp; MPT_TARGET_FLAGS_VOLUME) {</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_irqsave(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='del'>-		raid_device = _scsih_raid_device_find_by_handle(ioc,</div><div class='del'>-		     sas_target_priv_data-&gt;handle);</div><div class='add'>+		raid_device = _scsih_raid_device_find_by_handle(ioc, handle);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> 		if (!raid_device) {</div><div class='ctx'> 			dfailprintk(ioc, printk(MPT2SAS_WARN_FMT</div><div class='hunk'>@@ -1989,8 +2008,6 @@ _scsih_slave_configure(struct scsi_device *sdev)</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		_scsih_get_volume_capabilities(ioc, raid_device);</div><div class='del'>-</div><div class='ctx'> 		if (_scsih_get_volume_capabilities(ioc, raid_device)) {</div><div class='ctx'> 			dfailprintk(ioc, printk(MPT2SAS_WARN_FMT</div><div class='ctx'> 			    "failure at %s:%d/%s()!\n", ioc-&gt;name, __FILE__,</div><div class='hunk'>@@ -2058,68 +2075,67 @@ _scsih_slave_configure(struct scsi_device *sdev)</div><div class='ctx'> 		_scsih_change_queue_depth(sdev, qdepth, SCSI_QDEPTH_DEFAULT);</div><div class='ctx'> 		/* raid transport support */</div><div class='ctx'> 		if (!ioc-&gt;is_warpdrive)</div><div class='del'>-			_scsih_set_level(sdev, raid_device);</div><div class='add'>+			_scsih_set_level(sdev, raid_device-&gt;volume_type);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* non-raid handling */</div><div class='del'>-	spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='del'>-	sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,</div><div class='del'>-	   sas_device_priv_data-&gt;sas_target-&gt;sas_address);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='del'>-	if (sas_device) {</div><div class='del'>-		if (sas_target_priv_data-&gt;flags &amp;</div><div class='del'>-		    MPT_TARGET_FLAGS_RAID_COMPONENT) {</div><div class='del'>-			if (mpt2sas_config_get_volume_handle(ioc,</div><div class='del'>-			    sas_device-&gt;handle, &amp;sas_device-&gt;volume_handle)) {</div><div class='del'>-				dfailprintk(ioc, printk(MPT2SAS_WARN_FMT</div><div class='del'>-				    "failure at %s:%d/%s()!\n", ioc-&gt;name,</div><div class='del'>-				    __FILE__, __LINE__, __func__));</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='del'>-			if (sas_device-&gt;volume_handle &amp;&amp;</div><div class='del'>-			    mpt2sas_config_get_volume_wwid(ioc,</div><div class='del'>-			    sas_device-&gt;volume_handle,</div><div class='del'>-			    &amp;sas_device-&gt;volume_wwid)) {</div><div class='del'>-				dfailprintk(ioc, printk(MPT2SAS_WARN_FMT</div><div class='del'>-				    "failure at %s:%d/%s()!\n", ioc-&gt;name,</div><div class='del'>-				    __FILE__, __LINE__, __func__));</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='add'>+	if (sas_target_priv_data-&gt;flags &amp; MPT_TARGET_FLAGS_RAID_COMPONENT) {</div><div class='add'>+		if (mpt2sas_config_get_volume_handle(ioc, handle,</div><div class='add'>+		    &amp;volume_handle)) {</div><div class='add'>+			dfailprintk(ioc, printk(MPT2SAS_WARN_FMT</div><div class='add'>+			    "failure at %s:%d/%s()!\n", ioc-&gt;name,</div><div class='add'>+			    __FILE__, __LINE__, __func__));</div><div class='add'>+			return 1;</div><div class='ctx'> 		}</div><div class='del'>-		if (sas_device-&gt;device_info &amp; MPI2_SAS_DEVICE_INFO_SSP_TARGET) {</div><div class='del'>-			qdepth = MPT2SAS_SAS_QUEUE_DEPTH;</div><div class='del'>-			ssp_target = 1;</div><div class='del'>-			ds = "SSP";</div><div class='del'>-		} else {</div><div class='del'>-			qdepth = MPT2SAS_SATA_QUEUE_DEPTH;</div><div class='del'>-			if (sas_device-&gt;device_info &amp;</div><div class='del'>-			    MPI2_SAS_DEVICE_INFO_STP_TARGET)</div><div class='del'>-				ds = "STP";</div><div class='del'>-			else if (sas_device-&gt;device_info &amp;</div><div class='del'>-			    MPI2_SAS_DEVICE_INFO_SATA_DEVICE)</div><div class='del'>-				ds = "SATA";</div><div class='add'>+		if (volume_handle &amp;&amp; mpt2sas_config_get_volume_wwid(ioc,</div><div class='add'>+		    volume_handle, &amp;volume_wwid)) {</div><div class='add'>+			dfailprintk(ioc, printk(MPT2SAS_WARN_FMT</div><div class='add'>+			    "failure at %s:%d/%s()!\n", ioc-&gt;name,</div><div class='add'>+			    __FILE__, __LINE__, __func__));</div><div class='add'>+			return 1;</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		sdev_printk(KERN_INFO, sdev, "%s: handle(0x%04x), "</div><div class='del'>-		    "sas_addr(0x%016llx), phy(%d), device_name(0x%016llx)\n",</div><div class='del'>-		    ds, sas_device-&gt;handle,</div><div class='del'>-		    (unsigned long long)sas_device-&gt;sas_address,</div><div class='del'>-		    sas_device-&gt;phy,</div><div class='del'>-		    (unsigned long long)sas_device-&gt;device_name);</div><div class='del'>-		sdev_printk(KERN_INFO, sdev, "%s: "</div><div class='del'>-		    "enclosure_logical_id(0x%016llx), slot(%d)\n", ds,</div><div class='del'>-		    (unsigned long long) sas_device-&gt;enclosure_logical_id,</div><div class='del'>-		    sas_device-&gt;slot);</div><div class='del'>-</div><div class='del'>-		if (!ssp_target)</div><div class='del'>-			_scsih_display_sata_capabilities(ioc, sas_device, sdev);</div><div class='del'>-	} else {</div><div class='add'>+	spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='add'>+	sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,</div><div class='add'>+	   sas_device_priv_data-&gt;sas_target-&gt;sas_address);</div><div class='add'>+	if (!sas_device) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 		dfailprintk(ioc, printk(MPT2SAS_WARN_FMT</div><div class='del'>-		    "failure at %s:%d/%s()!\n", ioc-&gt;name, __FILE__, __LINE__,</div><div class='del'>-		    __func__));</div><div class='add'>+			"failure at %s:%d/%s()!\n", ioc-&gt;name, __FILE__,</div><div class='add'>+			__LINE__, __func__));</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='add'>+	sas_device-&gt;volume_handle = volume_handle;</div><div class='add'>+	sas_device-&gt;volume_wwid = volume_wwid;</div><div class='add'>+	if (sas_device-&gt;device_info &amp; MPI2_SAS_DEVICE_INFO_SSP_TARGET) {</div><div class='add'>+		qdepth = MPT2SAS_SAS_QUEUE_DEPTH;</div><div class='add'>+		ssp_target = 1;</div><div class='add'>+		ds = "SSP";</div><div class='add'>+	} else {</div><div class='add'>+		qdepth = MPT2SAS_SATA_QUEUE_DEPTH;</div><div class='add'>+		if (sas_device-&gt;device_info &amp; MPI2_SAS_DEVICE_INFO_STP_TARGET)</div><div class='add'>+			ds = "STP";</div><div class='add'>+		else if (sas_device-&gt;device_info &amp;</div><div class='add'>+		    MPI2_SAS_DEVICE_INFO_SATA_DEVICE)</div><div class='add'>+			ds = "SATA";</div><div class='add'>+	}</div><div class='add'>+	sdev_printk(KERN_INFO, sdev, "%s: handle(0x%04x), "</div><div class='add'>+	    "sas_addr(0x%016llx), phy(%d), device_name(0x%016llx)\n",</div><div class='add'>+	    ds, sas_device-&gt;handle,</div><div class='add'>+	    (unsigned long long)sas_device-&gt;sas_address,</div><div class='add'>+	    sas_device-&gt;phy,</div><div class='add'>+	    (unsigned long long)sas_device-&gt;device_name);</div><div class='add'>+	sdev_printk(KERN_INFO, sdev, "%s: "</div><div class='add'>+	    "enclosure_logical_id(0x%016llx), slot(%d)\n", ds,</div><div class='add'>+	    (unsigned long long) sas_device-&gt;enclosure_logical_id,</div><div class='add'>+	    sas_device-&gt;slot);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='add'>+	if (!ssp_target)</div><div class='add'>+		_scsih_display_sata_capabilities(ioc, handle, sdev);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	_scsih_change_queue_depth(sdev, qdepth, SCSI_QDEPTH_DEFAULT);</div><div class='ctx'> </div><div class='hunk'>@@ -2899,7 +2915,7 @@ _scsih_ublock_io_all_device(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'>  * During device pull we need to appropiately set the sdev state.</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='del'>-_scsih_ublock_io_device(struct MPT2SAS_ADAPTER *ioc, u16 handle)</div><div class='add'>+_scsih_ublock_io_device(struct MPT2SAS_ADAPTER *ioc, u64 sas_address)</div><div class='ctx'> {</div><div class='ctx'> 	struct MPT2SAS_DEVICE *sas_device_priv_data;</div><div class='ctx'> 	struct scsi_device *sdev;</div><div class='hunk'>@@ -2910,10 +2926,12 @@ _scsih_ublock_io_device(struct MPT2SAS_ADAPTER *ioc, u16 handle)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (!sas_device_priv_data-&gt;block)</div><div class='ctx'> 			continue;</div><div class='del'>-		if (sas_device_priv_data-&gt;sas_target-&gt;handle == handle) {</div><div class='add'>+		if (sas_device_priv_data-&gt;sas_target-&gt;sas_address ==</div><div class='add'>+								sas_address) {</div><div class='ctx'> 			dewtprintk(ioc, sdev_printk(KERN_INFO, sdev,</div><div class='ctx'> 			    MPT2SAS_INFO_FMT "SDEV_RUNNING: "</div><div class='del'>-			    "handle(0x%04x)\n", ioc-&gt;name, handle));</div><div class='add'>+			    "sas address(0x%016llx)\n", ioc-&gt;name,</div><div class='add'>+				(unsigned long long)sas_address));</div><div class='ctx'> 			sas_device_priv_data-&gt;block = 0;</div><div class='ctx'> 			scsi_internal_device_unblock(sdev);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3006,10 +3024,10 @@ _scsih_block_io_to_children_attached_to_ex(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 			sas_device =</div><div class='ctx'> 			    mpt2sas_scsih_sas_device_find_by_sas_address(ioc,</div><div class='ctx'> 			   mpt2sas_port-&gt;remote_identify.sas_address);</div><div class='add'>+			if (sas_device)</div><div class='add'>+				set_bit(sas_device-&gt;handle,</div><div class='add'>+				    ioc-&gt;blocking_handles);</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='del'>-			if (!sas_device)</div><div class='del'>-				continue;</div><div class='del'>-			_scsih_block_io_device(ioc, sas_device-&gt;handle);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3020,12 +3038,9 @@ _scsih_block_io_to_children_attached_to_ex(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 		    SAS_EDGE_EXPANDER_DEVICE ||</div><div class='ctx'> 		    mpt2sas_port-&gt;remote_identify.device_type ==</div><div class='ctx'> 		    SAS_FANOUT_EXPANDER_DEVICE) {</div><div class='del'>-</div><div class='del'>-			spin_lock_irqsave(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 			expander_sibling =</div><div class='ctx'> 			    mpt2sas_scsih_expander_find_by_sas_address(</div><div class='ctx'> 			    ioc, mpt2sas_port-&gt;remote_identify.sas_address);</div><div class='del'>-			spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 			_scsih_block_io_to_children_attached_to_ex(ioc,</div><div class='ctx'> 			    expander_sibling);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3124,7 +3139,7 @@ _scsih_tm_tr_send(struct MPT2SAS_ADAPTER *ioc, u16 handle)</div><div class='ctx'> 		dewtprintk(ioc, printk(MPT2SAS_INFO_FMT "setting delete flag: "</div><div class='ctx'> 		"handle(0x%04x), sas_addr(0x%016llx)\n", ioc-&gt;name, handle,</div><div class='ctx'> 			(unsigned long long)sas_address));</div><div class='del'>-		_scsih_ublock_io_device(ioc, handle);</div><div class='add'>+		_scsih_ublock_io_device(ioc, sas_address);</div><div class='ctx'> 		sas_target_priv_data-&gt;handle = MPT2SAS_INVALID_DEVICE_HANDLE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3174,16 +3189,19 @@ static u8</div><div class='ctx'> _scsih_sas_control_complete(struct MPT2SAS_ADAPTER *ioc, u16 smid,</div><div class='ctx'>     u8 msix_index, u32 reply)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_SCSI_MPT2SAS_LOGGING</div><div class='ctx'> 	Mpi2SasIoUnitControlReply_t *mpi_reply =</div><div class='ctx'> 	    mpt2sas_base_get_reply_virt_addr(ioc, reply);</div><div class='del'>-#endif</div><div class='del'>-	dewtprintk(ioc, printk(MPT2SAS_INFO_FMT</div><div class='del'>-	    "sc_complete:handle(0x%04x), (open) "</div><div class='del'>-	    "smid(%d), ioc_status(0x%04x), loginfo(0x%08x)\n",</div><div class='del'>-	    ioc-&gt;name, le16_to_cpu(mpi_reply-&gt;DevHandle), smid,</div><div class='del'>-	    le16_to_cpu(mpi_reply-&gt;IOCStatus),</div><div class='del'>-	    le32_to_cpu(mpi_reply-&gt;IOCLogInfo)));</div><div class='add'>+	if (likely(mpi_reply)) {</div><div class='add'>+		dewtprintk(ioc, printk(MPT2SAS_INFO_FMT</div><div class='add'>+		"sc_complete:handle(0x%04x), (open) "</div><div class='add'>+		"smid(%d), ioc_status(0x%04x), loginfo(0x%08x)\n",</div><div class='add'>+		ioc-&gt;name, le16_to_cpu(mpi_reply-&gt;DevHandle), smid,</div><div class='add'>+		le16_to_cpu(mpi_reply-&gt;IOCStatus),</div><div class='add'>+		le32_to_cpu(mpi_reply-&gt;IOCLogInfo)));</div><div class='add'>+	} else {</div><div class='add'>+		printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",</div><div class='add'>+		    ioc-&gt;name, __FILE__, __LINE__, __func__);</div><div class='add'>+	}</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3262,7 +3280,11 @@ _scsih_tm_volume_tr_complete(struct MPT2SAS_ADAPTER *ioc, u16 smid,</div><div class='ctx'> 		   "progress!\n", __func__, ioc-&gt;name));</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+	if (unlikely(!mpi_reply)) {</div><div class='add'>+		printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",</div><div class='add'>+		    ioc-&gt;name, __FILE__, __LINE__, __func__);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='ctx'> 	mpi_request_tm = mpt2sas_base_get_msg_frame(ioc, smid);</div><div class='ctx'> 	handle = le16_to_cpu(mpi_request_tm-&gt;DevHandle);</div><div class='ctx'> 	if (handle != le16_to_cpu(mpi_reply-&gt;DevHandle)) {</div><div class='hunk'>@@ -3325,7 +3347,11 @@ _scsih_tm_tr_complete(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,</div><div class='ctx'> 		    "operational\n", __func__, ioc-&gt;name));</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+	if (unlikely(!mpi_reply)) {</div><div class='add'>+		printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",</div><div class='add'>+		    ioc-&gt;name, __FILE__, __LINE__, __func__);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='ctx'> 	mpi_request_tm = mpt2sas_base_get_msg_frame(ioc, smid);</div><div class='ctx'> 	handle = le16_to_cpu(mpi_request_tm-&gt;DevHandle);</div><div class='ctx'> 	if (handle != le16_to_cpu(mpi_reply-&gt;DevHandle)) {</div><div class='hunk'>@@ -3441,14 +3467,20 @@ _scsih_check_topo_delete_events(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 		_scsih_block_io_to_children_attached_directly(ioc, event_data);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (event_data-&gt;ExpStatus == MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING</div><div class='del'>-	 || event_data-&gt;ExpStatus == MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING) {</div><div class='add'>+	if (event_data-&gt;ExpStatus ==</div><div class='add'>+	    MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING) {</div><div class='add'>+		/* put expander attached devices into blocking state */</div><div class='ctx'> 		spin_lock_irqsave(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 		sas_expander = mpt2sas_scsih_expander_find_by_handle(ioc,</div><div class='ctx'> 		    expander_handle);</div><div class='del'>-		spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 		_scsih_block_io_to_children_attached_to_ex(ioc, sas_expander);</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='add'>+		do {</div><div class='add'>+			handle = find_first_bit(ioc-&gt;blocking_handles,</div><div class='add'>+			    ioc-&gt;facts.MaxDevHandle);</div><div class='add'>+			if (handle &lt; ioc-&gt;facts.MaxDevHandle)</div><div class='add'>+				_scsih_block_io_device(ioc, handle);</div><div class='add'>+		} while (test_and_clear_bit(handle, ioc-&gt;blocking_handles));</div><div class='ctx'> 	} else if (event_data-&gt;ExpStatus == MPI2_EVENT_SAS_TOPO_ES_RESPONDING)</div><div class='ctx'> 		_scsih_block_io_to_children_attached_directly(ioc, event_data);</div><div class='ctx'> </div><div class='hunk'>@@ -4446,8 +4478,8 @@ _scsih_io_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply)</div><div class='ctx'> 	    != MPI2_IOCSTATUS_SCSI_TASK_TERMINATED)) {</div><div class='ctx'> 		spin_lock_irqsave(&amp;ioc-&gt;scsi_lookup_lock, flags);</div><div class='ctx'> 		ioc-&gt;scsi_lookup[smid - 1].scmd = scmd;</div><div class='del'>-		spin_unlock_irqrestore(&amp;ioc-&gt;scsi_lookup_lock, flags);</div><div class='ctx'> 		_scsih_scsi_direct_io_set(ioc, smid, 0);</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;scsi_lookup_lock, flags);</div><div class='ctx'> 		memcpy(mpi_request-&gt;CDB.CDB32, scmd-&gt;cmnd, scmd-&gt;cmd_len);</div><div class='ctx'> 		mpi_request-&gt;DevHandle =</div><div class='ctx'> 		    cpu_to_le16(sas_device_priv_data-&gt;sas_target-&gt;handle);</div><div class='hunk'>@@ -5020,13 +5052,11 @@ mpt2sas_expander_remove(struct MPT2SAS_ADAPTER *ioc, u64 sas_address)</div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 	sas_expander = mpt2sas_scsih_expander_find_by_sas_address(ioc,</div><div class='ctx'> 	    sas_address);</div><div class='del'>-	if (!sas_expander) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	list_del(&amp;sas_expander-&gt;list);</div><div class='add'>+	if (sas_expander)</div><div class='add'>+		list_del(&amp;sas_expander-&gt;list);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='del'>-	_scsih_expander_node_remove(ioc, sas_expander);</div><div class='add'>+	if (sas_expander)</div><div class='add'>+		_scsih_expander_node_remove(ioc, sas_expander);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -5106,6 +5136,7 @@ _scsih_check_device(struct MPT2SAS_ADAPTER *ioc, u16 handle)</div><div class='ctx'> 	struct MPT2SAS_TARGET *sas_target_priv_data;</div><div class='ctx'> 	u32 device_info;</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 	if ((mpt2sas_config_get_sas_device_pg0(ioc, &amp;mpi_reply, &amp;sas_device_pg0,</div><div class='ctx'> 	    MPI2_SAS_DEVICE_PGAD_FORM_HANDLE, handle)))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -5139,21 +5170,24 @@ _scsih_check_device(struct MPT2SAS_ADAPTER *ioc, u16 handle)</div><div class='ctx'> 		sas_target_priv_data-&gt;handle = handle;</div><div class='ctx'> 		sas_device-&gt;handle = handle;</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* check if device is present */</div><div class='ctx'> 	if (!(le16_to_cpu(sas_device_pg0.Flags) &amp;</div><div class='ctx'> 	    MPI2_SAS_DEVICE0_FLAGS_DEVICE_PRESENT)) {</div><div class='ctx'> 		printk(MPT2SAS_ERR_FMT "device is not present "</div><div class='ctx'> 		    "handle(0x%04x), flags!!!\n", ioc-&gt;name, handle);</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* check if there were any issues with discovery */</div><div class='ctx'> 	if (_scsih_check_access_status(ioc, sas_address, handle,</div><div class='del'>-	    sas_device_pg0.AccessStatus))</div><div class='add'>+	    sas_device_pg0.AccessStatus)) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 		return;</div><div class='del'>-	_scsih_ublock_io_device(ioc, handle);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='add'>+	_scsih_ublock_io_device(ioc, sas_address);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5280,54 +5314,71 @@ static void</div><div class='ctx'> _scsih_remove_device(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'>     struct _sas_device *sas_device)</div><div class='ctx'> {</div><div class='del'>-	struct _sas_device sas_device_backup;</div><div class='ctx'> 	struct MPT2SAS_TARGET *sas_target_priv_data;</div><div class='ctx'> </div><div class='del'>-	if (!sas_device)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;sas_device_backup, sas_device, sizeof(struct _sas_device));</div><div class='del'>-	_scsih_sas_device_remove(ioc, sas_device);</div><div class='del'>-</div><div class='ctx'> 	dewtprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter: "</div><div class='ctx'> 	    "handle(0x%04x), sas_addr(0x%016llx)\n", ioc-&gt;name, __func__,</div><div class='del'>-	    sas_device_backup.handle, (unsigned long long)</div><div class='del'>-	    sas_device_backup.sas_address));</div><div class='add'>+		sas_device-&gt;handle, (unsigned long long)</div><div class='add'>+	    sas_device-&gt;sas_address));</div><div class='ctx'> </div><div class='del'>-	if (sas_device_backup.starget &amp;&amp; sas_device_backup.starget-&gt;hostdata) {</div><div class='del'>-		sas_target_priv_data = sas_device_backup.starget-&gt;hostdata;</div><div class='add'>+	if (sas_device-&gt;starget &amp;&amp; sas_device-&gt;starget-&gt;hostdata) {</div><div class='add'>+		sas_target_priv_data = sas_device-&gt;starget-&gt;hostdata;</div><div class='ctx'> 		sas_target_priv_data-&gt;deleted = 1;</div><div class='del'>-		_scsih_ublock_io_device(ioc, sas_device_backup.handle);</div><div class='add'>+		_scsih_ublock_io_device(ioc, sas_device-&gt;sas_address);</div><div class='ctx'> 		sas_target_priv_data-&gt;handle =</div><div class='ctx'> 		     MPT2SAS_INVALID_DEVICE_HANDLE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	_scsih_ublock_io_device(ioc, sas_device_backup.handle);</div><div class='del'>-</div><div class='ctx'> 	if (!ioc-&gt;hide_drives)</div><div class='ctx'> 		mpt2sas_transport_port_remove(ioc,</div><div class='del'>-		    sas_device_backup.sas_address,</div><div class='del'>-		    sas_device_backup.sas_address_parent);</div><div class='add'>+		    sas_device-&gt;sas_address,</div><div class='add'>+		    sas_device-&gt;sas_address_parent);</div><div class='ctx'> </div><div class='ctx'> 	printk(MPT2SAS_INFO_FMT "removing handle(0x%04x), sas_addr"</div><div class='del'>-	    "(0x%016llx)\n", ioc-&gt;name, sas_device_backup.handle,</div><div class='del'>-	    (unsigned long long) sas_device_backup.sas_address);</div><div class='add'>+	    "(0x%016llx)\n", ioc-&gt;name, sas_device-&gt;handle,</div><div class='add'>+	    (unsigned long long) sas_device-&gt;sas_address);</div><div class='ctx'> </div><div class='ctx'> 	dewtprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit: "</div><div class='ctx'> 	    "handle(0x%04x), sas_addr(0x%016llx)\n", ioc-&gt;name, __func__,</div><div class='del'>-	    sas_device_backup.handle, (unsigned long long)</div><div class='del'>-	    sas_device_backup.sas_address));</div><div class='add'>+	    sas_device-&gt;handle, (unsigned long long)</div><div class='add'>+	    sas_device-&gt;sas_address));</div><div class='add'>+	kfree(sas_device);</div><div class='add'>+}</div><div class='add'>+/**</div><div class='add'>+ * _scsih_device_remove_by_handle - removing device object by handle</div><div class='add'>+ * @ioc: per adapter object</div><div class='add'>+ * @handle: device handle</div><div class='add'>+ *</div><div class='add'>+ * Return nothing.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+_scsih_device_remove_by_handle(struct MPT2SAS_ADAPTER *ioc, u16 handle)</div><div class='add'>+{</div><div class='add'>+	struct _sas_device *sas_device;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (ioc-&gt;shost_recovery)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='add'>+	sas_device = _scsih_sas_device_find_by_handle(ioc, handle);</div><div class='add'>+	if (sas_device)</div><div class='add'>+		list_del(&amp;sas_device-&gt;list);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='add'>+	if (sas_device)</div><div class='add'>+		_scsih_remove_device(ioc, sas_device);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * mpt2sas_device_remove - removing device object</div><div class='add'>+ * mpt2sas_device_remove_by_sas_address - removing device object by sas address</div><div class='ctx'>  * @ioc: per adapter object</div><div class='del'>- * @sas_address: expander sas_address</div><div class='add'>+ * @sas_address: device sas_address</div><div class='ctx'>  *</div><div class='ctx'>  * Return nothing.</div><div class='ctx'>  */</div><div class='ctx'> void</div><div class='del'>-mpt2sas_device_remove(struct MPT2SAS_ADAPTER *ioc, u64 sas_address)</div><div class='add'>+mpt2sas_device_remove_by_sas_address(struct MPT2SAS_ADAPTER *ioc,</div><div class='add'>+	u64 sas_address)</div><div class='ctx'> {</div><div class='ctx'> 	struct _sas_device *sas_device;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -5338,14 +5389,12 @@ mpt2sas_device_remove(struct MPT2SAS_ADAPTER *ioc, u64 sas_address)</div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 	sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,</div><div class='ctx'> 	    sas_address);</div><div class='del'>-	if (!sas_device) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	if (sas_device)</div><div class='add'>+		list_del(&amp;sas_device-&gt;list);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='del'>-	_scsih_remove_device(ioc, sas_device);</div><div class='add'>+	if (sas_device)</div><div class='add'>+		_scsih_remove_device(ioc, sas_device);</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_SCSI_MPT2SAS_LOGGING</div><div class='ctx'> /**</div><div class='ctx'>  * _scsih_sas_topology_change_event_debug - debug for topology event</div><div class='hunk'>@@ -5442,7 +5491,6 @@ _scsih_sas_topology_change_event(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 	u16 reason_code;</div><div class='ctx'> 	u8 phy_number, max_phys;</div><div class='ctx'> 	struct _sas_node *sas_expander;</div><div class='del'>-	struct _sas_device *sas_device;</div><div class='ctx'> 	u64 sas_address;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u8 link_rate, prev_link_rate;</div><div class='hunk'>@@ -5477,15 +5525,17 @@ _scsih_sas_topology_change_event(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 	sas_expander = mpt2sas_scsih_expander_find_by_handle(ioc,</div><div class='ctx'> 	    parent_handle);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 	if (sas_expander) {</div><div class='ctx'> 		sas_address = sas_expander-&gt;sas_address;</div><div class='ctx'> 		max_phys = sas_expander-&gt;num_phys;</div><div class='ctx'> 	} else if (parent_handle &lt; ioc-&gt;sas_hba.num_phys) {</div><div class='ctx'> 		sas_address = ioc-&gt;sas_hba.sas_address;</div><div class='ctx'> 		max_phys = ioc-&gt;sas_hba.num_phys;</div><div class='del'>-	} else</div><div class='add'>+	} else {</div><div class='add'>+	spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* handle siblings events */</div><div class='ctx'> 	for (i = 0; i &lt; event_data-&gt;NumEntries; i++) {</div><div class='hunk'>@@ -5540,16 +5590,7 @@ _scsih_sas_topology_change_event(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 			break;</div><div class='ctx'> 		case MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING:</div><div class='ctx'> </div><div class='del'>-			spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='del'>-			sas_device = _scsih_sas_device_find_by_handle(ioc,</div><div class='del'>-			    handle);</div><div class='del'>-			if (!sas_device) {</div><div class='del'>-				spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock,</div><div class='del'>-				    flags);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='del'>-			_scsih_remove_device(ioc, sas_device);</div><div class='add'>+			_scsih_device_remove_by_handle(ioc, handle);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5672,20 +5713,24 @@ _scsih_sas_device_status_change_event(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 	sas_address = le64_to_cpu(event_data-&gt;SASAddress);</div><div class='ctx'> 	sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,</div><div class='ctx'> 	    sas_address);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> </div><div class='del'>-	if (!sas_device || !sas_device-&gt;starget)</div><div class='add'>+	if (!sas_device || !sas_device-&gt;starget) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	target_priv_data = sas_device-&gt;starget-&gt;hostdata;</div><div class='del'>-	if (!target_priv_data)</div><div class='add'>+	if (!target_priv_data) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (event_data-&gt;ReasonCode ==</div><div class='ctx'> 	    MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET)</div><div class='ctx'> 		target_priv_data-&gt;tm_busy = 1;</div><div class='ctx'> 	else</div><div class='ctx'> 		target_priv_data-&gt;tm_busy = 0;</div><div class='add'>+	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SCSI_MPT2SAS_LOGGING</div><div class='hunk'>@@ -5950,30 +5995,6 @@ _scsih_reprobe_lun(struct scsi_device *sdev, void *no_uld_attach)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * _scsih_reprobe_target - reprobing target</div><div class='del'>- * @starget: scsi target struct</div><div class='del'>- * @no_uld_attach: sdev-&gt;no_uld_attach flag setting</div><div class='del'>- *</div><div class='del'>- * Note: no_uld_attach flag determines whether the disk device is attached</div><div class='del'>- * to block layer. A value of `1` means to not attach.</div><div class='del'>- **/</div><div class='del'>-static void</div><div class='del'>-_scsih_reprobe_target(struct scsi_target *starget, int no_uld_attach)</div><div class='del'>-{</div><div class='del'>-	struct MPT2SAS_TARGET *sas_target_priv_data;</div><div class='del'>-</div><div class='del'>-	if (starget == NULL)</div><div class='del'>-		return;</div><div class='del'>-	sas_target_priv_data = starget-&gt;hostdata;</div><div class='del'>-	if (no_uld_attach)</div><div class='del'>-		sas_target_priv_data-&gt;flags |= MPT_TARGET_FLAGS_RAID_COMPONENT;</div><div class='del'>-	else</div><div class='del'>-		sas_target_priv_data-&gt;flags &amp;= ~MPT_TARGET_FLAGS_RAID_COMPONENT;</div><div class='del'>-</div><div class='del'>-	starget_for_each_device(starget, no_uld_attach ? (void *)1 : NULL,</div><div class='del'>-	    _scsih_reprobe_lun);</div><div class='del'>-}</div><div class='del'>-/**</div><div class='ctx'>  * _scsih_sas_volume_add - add new volume</div><div class='ctx'>  * @ioc: per adapter object</div><div class='ctx'>  * @element: IR config element data</div><div class='hunk'>@@ -6024,8 +6045,11 @@ _scsih_sas_volume_add(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 		    raid_device-&gt;id, 0);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			_scsih_raid_device_remove(ioc, raid_device);</div><div class='del'>-	} else</div><div class='add'>+	} else {</div><div class='add'>+		spin_lock_irqsave(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> 		_scsih_determine_boot_device(ioc, raid_device, 1);</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -6042,21 +6066,25 @@ _scsih_sas_volume_delete(struct MPT2SAS_ADAPTER *ioc, u16 handle)</div><div class='ctx'> 	struct _raid_device *raid_device;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct MPT2SAS_TARGET *sas_target_priv_data;</div><div class='add'>+	struct scsi_target *starget = NULL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> 	raid_device = _scsih_raid_device_find_by_handle(ioc, handle);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='del'>-	if (!raid_device)</div><div class='del'>-		return;</div><div class='del'>-	if (raid_device-&gt;starget) {</div><div class='del'>-		sas_target_priv_data = raid_device-&gt;starget-&gt;hostdata;</div><div class='del'>-		sas_target_priv_data-&gt;deleted = 1;</div><div class='del'>-		scsi_remove_target(&amp;raid_device-&gt;starget-&gt;dev);</div><div class='add'>+	if (raid_device) {</div><div class='add'>+		if (raid_device-&gt;starget) {</div><div class='add'>+			starget = raid_device-&gt;starget;</div><div class='add'>+			sas_target_priv_data = starget-&gt;hostdata;</div><div class='add'>+			sas_target_priv_data-&gt;deleted = 1;</div><div class='add'>+		}</div><div class='add'>+		printk(MPT2SAS_INFO_FMT "removing handle(0x%04x), wwid"</div><div class='add'>+		    "(0x%016llx)\n", ioc-&gt;name,  raid_device-&gt;handle,</div><div class='add'>+		    (unsigned long long) raid_device-&gt;wwid);</div><div class='add'>+		list_del(&amp;raid_device-&gt;list);</div><div class='add'>+		kfree(raid_device);</div><div class='ctx'> 	}</div><div class='del'>-	printk(MPT2SAS_INFO_FMT "removing handle(0x%04x), wwid"</div><div class='del'>-	    "(0x%016llx)\n", ioc-&gt;name,  raid_device-&gt;handle,</div><div class='del'>-	    (unsigned long long) raid_device-&gt;wwid);</div><div class='del'>-	_scsih_raid_device_remove(ioc, raid_device);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='add'>+	if (starget)</div><div class='add'>+		scsi_remove_target(&amp;starget-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -6072,20 +6100,31 @@ _scsih_sas_pd_expose(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'>     Mpi2EventIrConfigElement_t *element)</div><div class='ctx'> {</div><div class='ctx'> 	struct _sas_device *sas_device;</div><div class='add'>+	struct scsi_target *starget = NULL;</div><div class='add'>+	struct MPT2SAS_TARGET *sas_target_priv_data;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u16 handle = le16_to_cpu(element-&gt;PhysDiskDevHandle);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 	sas_device = _scsih_sas_device_find_by_handle(ioc, handle);</div><div class='add'>+	if (sas_device) {</div><div class='add'>+		sas_device-&gt;volume_handle = 0;</div><div class='add'>+		sas_device-&gt;volume_wwid = 0;</div><div class='add'>+		clear_bit(handle, ioc-&gt;pd_handles);</div><div class='add'>+		if (sas_device-&gt;starget &amp;&amp; sas_device-&gt;starget-&gt;hostdata) {</div><div class='add'>+			starget = sas_device-&gt;starget;</div><div class='add'>+			sas_target_priv_data = starget-&gt;hostdata;</div><div class='add'>+			sas_target_priv_data-&gt;flags &amp;=</div><div class='add'>+			    ~MPT_TARGET_FLAGS_RAID_COMPONENT;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 	if (!sas_device)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* exposing raid component */</div><div class='del'>-	sas_device-&gt;volume_handle = 0;</div><div class='del'>-	sas_device-&gt;volume_wwid = 0;</div><div class='del'>-	clear_bit(handle, ioc-&gt;pd_handles);</div><div class='del'>-	_scsih_reprobe_target(sas_device-&gt;starget, 0);</div><div class='add'>+	if (starget)</div><div class='add'>+		starget_for_each_device(starget, NULL, _scsih_reprobe_lun);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -6101,23 +6140,38 @@ _scsih_sas_pd_hide(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'>     Mpi2EventIrConfigElement_t *element)</div><div class='ctx'> {</div><div class='ctx'> 	struct _sas_device *sas_device;</div><div class='add'>+	struct scsi_target *starget = NULL;</div><div class='add'>+	struct MPT2SAS_TARGET *sas_target_priv_data;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u16 handle = le16_to_cpu(element-&gt;PhysDiskDevHandle);</div><div class='add'>+	u16 volume_handle = 0;</div><div class='add'>+	u64 volume_wwid = 0;</div><div class='add'>+</div><div class='add'>+	mpt2sas_config_get_volume_handle(ioc, handle, &amp;volume_handle);</div><div class='add'>+	if (volume_handle)</div><div class='add'>+		mpt2sas_config_get_volume_wwid(ioc, volume_handle,</div><div class='add'>+		    &amp;volume_wwid);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 	sas_device = _scsih_sas_device_find_by_handle(ioc, handle);</div><div class='add'>+	if (sas_device) {</div><div class='add'>+		set_bit(handle, ioc-&gt;pd_handles);</div><div class='add'>+		if (sas_device-&gt;starget &amp;&amp; sas_device-&gt;starget-&gt;hostdata) {</div><div class='add'>+			starget = sas_device-&gt;starget;</div><div class='add'>+			sas_target_priv_data = starget-&gt;hostdata;</div><div class='add'>+			sas_target_priv_data-&gt;flags |=</div><div class='add'>+			    MPT_TARGET_FLAGS_RAID_COMPONENT;</div><div class='add'>+			sas_device-&gt;volume_handle = volume_handle;</div><div class='add'>+			sas_device-&gt;volume_wwid = volume_wwid;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 	if (!sas_device)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* hiding raid component */</div><div class='del'>-	mpt2sas_config_get_volume_handle(ioc, handle,</div><div class='del'>-	    &amp;sas_device-&gt;volume_handle);</div><div class='del'>-	mpt2sas_config_get_volume_wwid(ioc, sas_device-&gt;volume_handle,</div><div class='del'>-	    &amp;sas_device-&gt;volume_wwid);</div><div class='del'>-	set_bit(handle, ioc-&gt;pd_handles);</div><div class='del'>-	_scsih_reprobe_target(sas_device-&gt;starget, 1);</div><div class='del'>-</div><div class='add'>+	if (starget)</div><div class='add'>+		starget_for_each_device(starget, (void *)1, _scsih_reprobe_lun);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -6132,16 +6186,9 @@ static void</div><div class='ctx'> _scsih_sas_pd_delete(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'>     Mpi2EventIrConfigElement_t *element)</div><div class='ctx'> {</div><div class='del'>-	struct _sas_device *sas_device;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	u16 handle = le16_to_cpu(element-&gt;PhysDiskDevHandle);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='del'>-	sas_device = _scsih_sas_device_find_by_handle(ioc, handle);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='del'>-	if (!sas_device)</div><div class='del'>-		return;</div><div class='del'>-	_scsih_remove_device(ioc, sas_device);</div><div class='add'>+	_scsih_device_remove_by_handle(ioc, handle);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -6583,18 +6630,13 @@ _scsih_sas_ir_operation_status_event(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 	/* code added for raid transport support */</div><div class='ctx'> 	if (event_data-&gt;RAIDOperation == MPI2_EVENT_IR_RAIDOP_RESYNC) {</div><div class='ctx'> </div><div class='del'>-		handle = le16_to_cpu(event_data-&gt;VolDevHandle);</div><div class='del'>-</div><div class='ctx'> 		spin_lock_irqsave(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='add'>+		handle = le16_to_cpu(event_data-&gt;VolDevHandle);</div><div class='ctx'> 		raid_device = _scsih_raid_device_find_by_handle(ioc, handle);</div><div class='del'>-		spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='del'>-</div><div class='del'>-		if (!raid_device)</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-		if (event_data-&gt;RAIDOperation == MPI2_EVENT_IR_RAIDOP_RESYNC)</div><div class='add'>+		if (raid_device)</div><div class='ctx'> 			raid_device-&gt;percent_complete =</div><div class='ctx'> 			    event_data-&gt;PercentComplete;</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6761,13 +6803,18 @@ _scsih_mark_responding_raid_device(struct MPT2SAS_ADAPTER *ioc, u64 wwid,</div><div class='ctx'> 			 * required data for Direct IO</div><div class='ctx'> 			 */</div><div class='ctx'> 			_scsih_init_warpdrive_properties(ioc, raid_device);</div><div class='del'>-			if (raid_device-&gt;handle == handle)</div><div class='add'>+			spin_lock_irqsave(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='add'>+			if (raid_device-&gt;handle == handle) {</div><div class='add'>+				spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock,</div><div class='add'>+				    flags);</div><div class='ctx'> 				return;</div><div class='add'>+			}</div><div class='ctx'> 			printk(KERN_INFO "\thandle changed from(0x%04x)!!!\n",</div><div class='ctx'> 			    raid_device-&gt;handle);</div><div class='ctx'> 			raid_device-&gt;handle = handle;</div><div class='ctx'> 			if (sas_target_priv_data)</div><div class='ctx'> 				sas_target_priv_data-&gt;handle = handle;</div><div class='add'>+			spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6939,58 +6986,56 @@ static void</div><div class='ctx'> _scsih_remove_unresponding_sas_devices(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> {</div><div class='ctx'> 	struct _sas_device *sas_device, *sas_device_next;</div><div class='del'>-	struct _sas_node *sas_expander;</div><div class='add'>+	struct _sas_node *sas_expander, *sas_expander_next;</div><div class='ctx'> 	struct _raid_device *raid_device, *raid_device_next;</div><div class='add'>+	struct list_head tmp_list;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	printk(MPT2SAS_INFO_FMT "removing unresponding devices: start\n",</div><div class='ctx'> 	    ioc-&gt;name);</div><div class='ctx'> </div><div class='add'>+	/* removing unresponding end devices */</div><div class='add'>+	printk(MPT2SAS_INFO_FMT "removing unresponding devices: end-devices\n",</div><div class='add'>+	    ioc-&gt;name);</div><div class='ctx'> 	list_for_each_entry_safe(sas_device, sas_device_next,</div><div class='ctx'> 	    &amp;ioc-&gt;sas_device_list, list) {</div><div class='del'>-		if (sas_device-&gt;responding) {</div><div class='add'>+		if (!sas_device-&gt;responding)</div><div class='add'>+			mpt2sas_device_remove_by_sas_address(ioc,</div><div class='add'>+				sas_device-&gt;sas_address);</div><div class='add'>+		else</div><div class='ctx'> 			sas_device-&gt;responding = 0;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		if (sas_device-&gt;starget)</div><div class='del'>-			starget_printk(KERN_INFO, sas_device-&gt;starget,</div><div class='del'>-			    "removing: handle(0x%04x), sas_addr(0x%016llx), "</div><div class='del'>-			    "enclosure logical id(0x%016llx), slot(%d)\n",</div><div class='del'>-			    sas_device-&gt;handle,</div><div class='del'>-			    (unsigned long long)sas_device-&gt;sas_address,</div><div class='del'>-			    (unsigned long long)</div><div class='del'>-			    sas_device-&gt;enclosure_logical_id,</div><div class='del'>-			    sas_device-&gt;slot);</div><div class='del'>-		_scsih_remove_device(ioc, sas_device);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!ioc-&gt;ir_firmware)</div><div class='del'>-		goto retry_expander_search;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(raid_device, raid_device_next,</div><div class='del'>-	    &amp;ioc-&gt;raid_device_list, list) {</div><div class='del'>-		if (raid_device-&gt;responding) {</div><div class='del'>-			raid_device-&gt;responding = 0;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		if (raid_device-&gt;starget) {</div><div class='del'>-			starget_printk(KERN_INFO, raid_device-&gt;starget,</div><div class='del'>-			    "removing: handle(0x%04x), wwid(0x%016llx)\n",</div><div class='del'>-			      raid_device-&gt;handle,</div><div class='del'>-			    (unsigned long long)raid_device-&gt;wwid);</div><div class='del'>-			scsi_remove_target(&amp;raid_device-&gt;starget-&gt;dev);</div><div class='add'>+	/* removing unresponding volumes */</div><div class='add'>+	if (ioc-&gt;ir_firmware) {</div><div class='add'>+		printk(MPT2SAS_INFO_FMT "removing unresponding devices: "</div><div class='add'>+		    "volumes\n", ioc-&gt;name);</div><div class='add'>+		list_for_each_entry_safe(raid_device, raid_device_next,</div><div class='add'>+		    &amp;ioc-&gt;raid_device_list, list) {</div><div class='add'>+			if (!raid_device-&gt;responding)</div><div class='add'>+				_scsih_sas_volume_delete(ioc,</div><div class='add'>+				    raid_device-&gt;handle);</div><div class='add'>+			else</div><div class='add'>+				raid_device-&gt;responding = 0;</div><div class='ctx'> 		}</div><div class='del'>-		_scsih_raid_device_remove(ioc, raid_device);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>- retry_expander_search:</div><div class='del'>-	sas_expander = NULL;</div><div class='del'>-	list_for_each_entry(sas_expander, &amp;ioc-&gt;sas_expander_list, list) {</div><div class='del'>-		if (sas_expander-&gt;responding) {</div><div class='add'>+	/* removing unresponding expanders */</div><div class='add'>+	printk(MPT2SAS_INFO_FMT "removing unresponding devices: expanders\n",</div><div class='add'>+	    ioc-&gt;name);</div><div class='add'>+	spin_lock_irqsave(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='add'>+	INIT_LIST_HEAD(&amp;tmp_list);</div><div class='add'>+	list_for_each_entry_safe(sas_expander, sas_expander_next,</div><div class='add'>+	    &amp;ioc-&gt;sas_expander_list, list) {</div><div class='add'>+		if (!sas_expander-&gt;responding)</div><div class='add'>+			list_move_tail(&amp;sas_expander-&gt;list, &amp;tmp_list);</div><div class='add'>+		else</div><div class='ctx'> 			sas_expander-&gt;responding = 0;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		mpt2sas_expander_remove(ioc, sas_expander-&gt;sas_address);</div><div class='del'>-		goto retry_expander_search;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='add'>+	list_for_each_entry_safe(sas_expander, sas_expander_next, &amp;tmp_list,</div><div class='add'>+	    list) {</div><div class='add'>+		list_del(&amp;sas_expander-&gt;list);</div><div class='add'>+		_scsih_expander_node_remove(ioc, sas_expander);</div><div class='ctx'> 	}</div><div class='ctx'> 	printk(MPT2SAS_INFO_FMT "removing unresponding devices: complete\n",</div><div class='ctx'> 	    ioc-&gt;name);</div><div class='hunk'>@@ -7043,6 +7088,7 @@ _scsih_scan_for_devices_after_reset(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 	struct _sas_device *sas_device;</div><div class='ctx'> 	struct _sas_node *expander_device;</div><div class='ctx'> 	static struct _raid_device *raid_device;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	printk(MPT2SAS_INFO_FMT "scan devices: start\n", ioc-&gt;name);</div><div class='ctx'> </div><div class='hunk'>@@ -7057,8 +7103,10 @@ _scsih_scan_for_devices_after_reset(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 		if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)</div><div class='ctx'> 			break;</div><div class='ctx'> 		handle = le16_to_cpu(expander_pg0.DevHandle);</div><div class='add'>+		spin_lock_irqsave(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 		expander_device = mpt2sas_scsih_expander_find_by_sas_address(</div><div class='ctx'> 		    ioc, le64_to_cpu(expander_pg0.SASAddress));</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 		if (expander_device)</div><div class='ctx'> 			_scsih_refresh_expander_links(ioc, expander_device,</div><div class='ctx'> 			    handle);</div><div class='hunk'>@@ -7080,7 +7128,9 @@ _scsih_scan_for_devices_after_reset(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 			break;</div><div class='ctx'> 		phys_disk_num = pd_pg0.PhysDiskNum;</div><div class='ctx'> 		handle = le16_to_cpu(pd_pg0.DevHandle);</div><div class='add'>+		spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 		sas_device = _scsih_sas_device_find_by_handle(ioc, handle);</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 		if (sas_device)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (mpt2sas_config_get_sas_device_pg0(ioc, &amp;mpi_reply,</div><div class='hunk'>@@ -7107,8 +7157,10 @@ _scsih_scan_for_devices_after_reset(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 		if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)</div><div class='ctx'> 			break;</div><div class='ctx'> 		handle = le16_to_cpu(volume_pg1.DevHandle);</div><div class='add'>+		spin_lock_irqsave(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> 		raid_device = _scsih_raid_device_find_by_wwid(ioc,</div><div class='ctx'> 		    le64_to_cpu(volume_pg1.WWID));</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;raid_device_lock, flags);</div><div class='ctx'> 		if (raid_device)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (mpt2sas_config_get_raid_volume_pg0(ioc, &amp;mpi_reply,</div><div class='hunk'>@@ -7140,8 +7192,10 @@ _scsih_scan_for_devices_after_reset(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 		if (!(_scsih_is_end_device(</div><div class='ctx'> 		    le32_to_cpu(sas_device_pg0.DeviceInfo))))</div><div class='ctx'> 			continue;</div><div class='add'>+		spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 		sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,</div><div class='ctx'> 		    le64_to_cpu(sas_device_pg0.SASAddress));</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 		if (sas_device)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		parent_handle = le16_to_cpu(sas_device_pg0.ParentDevHandle);</div><div class='hunk'>@@ -7235,7 +7289,7 @@ _firmware_event_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	switch (fw_event-&gt;event) {</div><div class='ctx'> 	case MPT2SAS_REMOVE_UNRESPONDING_DEVICES:</div><div class='del'>-		while (scsi_host_in_recovery(ioc-&gt;shost))</div><div class='add'>+		while (scsi_host_in_recovery(ioc-&gt;shost) || ioc-&gt;shost_recovery)</div><div class='ctx'> 			ssleep(1);</div><div class='ctx'> 		_scsih_remove_unresponding_sas_devices(ioc);</div><div class='ctx'> 		_scsih_scan_for_devices_after_reset(ioc);</div><div class='hunk'>@@ -7313,6 +7367,13 @@ mpt2sas_scsih_event_callback(struct MPT2SAS_ADAPTER *ioc, u8 msix_index,</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!mpi_reply)) {</div><div class='add'>+		printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",</div><div class='add'>+		    ioc-&gt;name, __FILE__, __LINE__, __func__);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	event = le16_to_cpu(mpi_reply-&gt;Event);</div><div class='ctx'> </div><div class='ctx'> 	switch (event) {</div><div class='hunk'>@@ -7353,14 +7414,14 @@ mpt2sas_scsih_event_callback(struct MPT2SAS_ADAPTER *ioc, u8 msix_index,</div><div class='ctx'> 	case MPI2_EVENT_LOG_ENTRY_ADDED:</div><div class='ctx'> 	{</div><div class='ctx'> 		Mpi2EventDataLogEntryAdded_t *log_entry;</div><div class='del'>-		u32 *log_code;</div><div class='add'>+		__le32 *log_code;</div><div class='ctx'> </div><div class='ctx'> 		if (!ioc-&gt;is_warpdrive)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		log_entry = (Mpi2EventDataLogEntryAdded_t *)</div><div class='ctx'> 		    mpi_reply-&gt;EventData;</div><div class='del'>-		log_code = (u32 *)log_entry-&gt;LogData;</div><div class='add'>+		log_code = (__le32 *)log_entry-&gt;LogData;</div><div class='ctx'> </div><div class='ctx'> 		if (le16_to_cpu(log_entry-&gt;LogEntryQualifier)</div><div class='ctx'> 		    != MPT2_WARPDRIVE_LOGENTRY)</div><div class='hunk'>@@ -7487,7 +7548,7 @@ _scsih_expander_node_remove(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> 			return;</div><div class='ctx'> 		if (mpt2sas_port-&gt;remote_identify.device_type ==</div><div class='ctx'> 		    SAS_END_DEVICE)</div><div class='del'>-			mpt2sas_device_remove(ioc,</div><div class='add'>+			mpt2sas_device_remove_by_sas_address(ioc,</div><div class='ctx'> 			    mpt2sas_port-&gt;remote_identify.sas_address);</div><div class='ctx'> 		else if (mpt2sas_port-&gt;remote_identify.device_type ==</div><div class='ctx'> 		    SAS_EDGE_EXPANDER_DEVICE ||</div><div class='hunk'>@@ -7661,7 +7722,7 @@ _scsih_remove(struct pci_dev *pdev)</div><div class='ctx'> 	   &amp;ioc-&gt;sas_hba.sas_port_list, port_list) {</div><div class='ctx'> 		if (mpt2sas_port-&gt;remote_identify.device_type ==</div><div class='ctx'> 		    SAS_END_DEVICE)</div><div class='del'>-			mpt2sas_device_remove(ioc,</div><div class='add'>+			mpt2sas_device_remove_by_sas_address(ioc,</div><div class='ctx'> 			    mpt2sas_port-&gt;remote_identify.sas_address);</div><div class='ctx'> 		else if (mpt2sas_port-&gt;remote_identify.device_type ==</div><div class='ctx'> 		    SAS_EDGE_EXPANDER_DEVICE ||</div><div class='hunk'>@@ -7733,11 +7794,11 @@ _scsih_probe_boot_devices(struct MPT2SAS_ADAPTER *ioc)</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			_scsih_raid_device_remove(ioc, raid_device);</div><div class='ctx'> 	} else {</div><div class='add'>+		spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 		sas_device = device;</div><div class='ctx'> 		handle = sas_device-&gt;handle;</div><div class='ctx'> 		sas_address_parent = sas_device-&gt;sas_address_parent;</div><div class='ctx'> 		sas_address = sas_device-&gt;sas_address;</div><div class='del'>-		spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 		list_move_tail(&amp;sas_device-&gt;list, &amp;ioc-&gt;sas_device_list);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -8061,8 +8122,8 @@ _scsih_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'>  out_thread_fail:</div><div class='ctx'> 	list_del(&amp;ioc-&gt;list);</div><div class='ctx'> 	scsi_remove_host(shost);</div><div class='del'>-	scsi_host_put(shost);</div><div class='ctx'>  out_add_shost_fail:</div><div class='add'>+	scsi_host_put(shost);</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/mpt2sas/mpt2sas_transport.c b/drivers/scsi/mpt2sas/mpt2sas_transport.c<br/>index 831047466a5a..c6cf20f60720 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpt2sas_transport.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/mpt2sas/mpt2sas_transport.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/mpt2sas/mpt2sas_transport.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/mpt2sas/mpt2sas_transport.c</a></div><div class='hunk'>@@ -163,12 +163,15 @@ _transport_set_identify(struct MPT2SAS_ADAPTER *ioc, u16 handle,</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memset(identify, 0, sizeof(*identify));</div><div class='add'>+	memset(identify, 0, sizeof(struct sas_identify));</div><div class='ctx'> 	device_info = le32_to_cpu(sas_device_pg0.DeviceInfo);</div><div class='ctx'> </div><div class='ctx'> 	/* sas_address */</div><div class='ctx'> 	identify-&gt;sas_address = le64_to_cpu(sas_device_pg0.SASAddress);</div><div class='ctx'> </div><div class='add'>+	/* phy number of the parent device this device is linked to */</div><div class='add'>+	identify-&gt;phy_identifier = sas_device_pg0.PhyNum;</div><div class='add'>+</div><div class='ctx'> 	/* device_type */</div><div class='ctx'> 	switch (device_info &amp; MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE) {</div><div class='ctx'> 	case MPI2_SAS_DEVICE_INFO_NO_DEVICE:</div><div class='hunk'>@@ -484,7 +487,7 @@ _transport_delete_port(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> </div><div class='ctx'> 	ioc-&gt;logging_level |= MPT_DEBUG_TRANSPORT;</div><div class='ctx'> 	if (device_type == SAS_END_DEVICE)</div><div class='del'>-		mpt2sas_device_remove(ioc, sas_address);</div><div class='add'>+		mpt2sas_device_remove_by_sas_address(ioc, sas_address);</div><div class='ctx'> 	else if (device_type == SAS_EDGE_EXPANDER_DEVICE ||</div><div class='ctx'> 	    device_type == SAS_FANOUT_EXPANDER_DEVICE)</div><div class='ctx'> 		mpt2sas_expander_remove(ioc, sas_address);</div><div class='hunk'>@@ -792,9 +795,10 @@ mpt2sas_transport_port_remove(struct MPT2SAS_ADAPTER *ioc, u64 sas_address,</div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 	sas_node = _transport_sas_node_find_by_sas_address(ioc,</div><div class='ctx'> 	    sas_address_parent);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='del'>-	if (!sas_node)</div><div class='add'>+	if (!sas_node) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> 	list_for_each_entry_safe(mpt2sas_port, next, &amp;sas_node-&gt;sas_port_list,</div><div class='ctx'> 	    port_list) {</div><div class='ctx'> 		if (mpt2sas_port-&gt;remote_identify.sas_address != sas_address)</div><div class='hunk'>@@ -804,8 +808,10 @@ mpt2sas_transport_port_remove(struct MPT2SAS_ADAPTER *ioc, u64 sas_address,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'>  out:</div><div class='del'>-	if (!found)</div><div class='add'>+	if (!found) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; sas_node-&gt;num_phys; i++) {</div><div class='ctx'> 		if (sas_node-&gt;phy[i].remote_identify.sas_address == sas_address)</div><div class='hunk'>@@ -813,6 +819,7 @@ mpt2sas_transport_port_remove(struct MPT2SAS_ADAPTER *ioc, u64 sas_address,</div><div class='ctx'> 			    sizeof(struct sas_identify));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 	list_for_each_entry_safe(mpt2sas_phy, next_phy,</div><div class='ctx'> 	    &amp;mpt2sas_port-&gt;phy_list, port_siblings) {</div><div class='ctx'> 		if ((ioc-&gt;logging_level &amp; MPT_DEBUG_TRANSPORT))</div><div class='hunk'>@@ -986,12 +993,14 @@ mpt2sas_transport_update_links(struct MPT2SAS_ADAPTER *ioc,</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 	sas_node = _transport_sas_node_find_by_sas_address(ioc, sas_address);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='del'>-	if (!sas_node)</div><div class='add'>+	if (!sas_node) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mpt2sas_phy = &amp;sas_node-&gt;phy[phy_number];</div><div class='ctx'> 	mpt2sas_phy-&gt;attached_handle = handle;</div><div class='add'>+	spin_unlock_irqrestore(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 	if (handle &amp;&amp; (link_rate &gt;= MPI2_SAS_NEG_LINK_RATE_1_5)) {</div><div class='ctx'> 		_transport_set_identify(ioc, handle,</div><div class='ctx'> 		    &amp;mpt2sas_phy-&gt;remote_identify);</div><div class='hunk'>@@ -1310,17 +1319,20 @@ _transport_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)</div><div class='ctx'> 	struct MPT2SAS_ADAPTER *ioc = rphy_to_ioc(rphy);</div><div class='ctx'> 	struct _sas_device *sas_device;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 	sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,</div><div class='ctx'> 	    rphy-&gt;identify.sas_address);</div><div class='add'>+	if (sas_device) {</div><div class='add'>+		*identifier = sas_device-&gt;enclosure_logical_id;</div><div class='add'>+		rc = 0;</div><div class='add'>+	} else {</div><div class='add'>+		*identifier = 0;</div><div class='add'>+		rc = -ENXIO;</div><div class='add'>+	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='del'>-</div><div class='del'>-	if (!sas_device)</div><div class='del'>-		return -ENXIO;</div><div class='del'>-</div><div class='del'>-	*identifier = sas_device-&gt;enclosure_logical_id;</div><div class='del'>-	return 0;</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1335,16 +1347,17 @@ _transport_get_bay_identifier(struct sas_rphy *rphy)</div><div class='ctx'> 	struct MPT2SAS_ADAPTER *ioc = rphy_to_ioc(rphy);</div><div class='ctx'> 	struct _sas_device *sas_device;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='ctx'> 	sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,</div><div class='ctx'> 	    rphy-&gt;identify.sas_address);</div><div class='add'>+	if (sas_device)</div><div class='add'>+		rc = sas_device-&gt;slot;</div><div class='add'>+	else</div><div class='add'>+		rc = -ENXIO;</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ioc-&gt;sas_device_lock, flags);</div><div class='del'>-</div><div class='del'>-	if (!sas_device)</div><div class='del'>-		return -ENXIO;</div><div class='del'>-</div><div class='del'>-	return sas_device-&gt;slot;</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* phy control request structure */</div><div class='hunk'>@@ -1629,11 +1642,13 @@ _transport_phy_enable(struct sas_phy *phy, int enable)</div><div class='ctx'> {</div><div class='ctx'> 	struct MPT2SAS_ADAPTER *ioc = phy_to_ioc(phy);</div><div class='ctx'> 	Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;</div><div class='add'>+	Mpi2SasIOUnitPage0_t *sas_iounit_pg0 = NULL;</div><div class='ctx'> 	Mpi2ConfigReply_t mpi_reply;</div><div class='ctx'> 	u16 ioc_status;</div><div class='ctx'> 	u16 sz;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	int i, discovery_active;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ioc-&gt;sas_node_lock, flags);</div><div class='ctx'> 	if (_transport_sas_node_find_by_sas_address(ioc,</div><div class='hunk'>@@ -1651,7 +1666,50 @@ _transport_phy_enable(struct sas_phy *phy, int enable)</div><div class='ctx'> </div><div class='ctx'> 	/* handle hba phys */</div><div class='ctx'> </div><div class='del'>-	/* sas_iounit page 1 */</div><div class='add'>+	/* read sas_iounit page 0 */</div><div class='add'>+	sz = offsetof(Mpi2SasIOUnitPage0_t, PhyData) + (ioc-&gt;sas_hba.num_phys *</div><div class='add'>+	    sizeof(Mpi2SasIOUnit0PhyData_t));</div><div class='add'>+	sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL);</div><div class='add'>+	if (!sas_iounit_pg0) {</div><div class='add'>+		printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",</div><div class='add'>+		    ioc-&gt;name, __FILE__, __LINE__, __func__);</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	if ((mpt2sas_config_get_sas_iounit_pg0(ioc, &amp;mpi_reply,</div><div class='add'>+	    sas_iounit_pg0, sz))) {</div><div class='add'>+		printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",</div><div class='add'>+		    ioc-&gt;name, __FILE__, __LINE__, __func__);</div><div class='add'>+		rc = -ENXIO;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &amp;</div><div class='add'>+	    MPI2_IOCSTATUS_MASK;</div><div class='add'>+	if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {</div><div class='add'>+		printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",</div><div class='add'>+		    ioc-&gt;name, __FILE__, __LINE__, __func__);</div><div class='add'>+		rc = -EIO;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* unable to enable/disable phys when when discovery is active */</div><div class='add'>+	for (i = 0, discovery_active = 0; i &lt; ioc-&gt;sas_hba.num_phys ; i++) {</div><div class='add'>+		if (sas_iounit_pg0-&gt;PhyData[i].PortFlags &amp;</div><div class='add'>+		    MPI2_SASIOUNIT0_PORTFLAGS_DISCOVERY_IN_PROGRESS) {</div><div class='add'>+			printk(MPT2SAS_ERR_FMT "discovery is active on "</div><div class='add'>+			    "port = %d, phy = %d: unable to enable/disable "</div><div class='add'>+			    "phys, try again later!\n", ioc-&gt;name,</div><div class='add'>+			    sas_iounit_pg0-&gt;PhyData[i].Port, i);</div><div class='add'>+			discovery_active = 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (discovery_active) {</div><div class='add'>+		rc = -EAGAIN;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* read sas_iounit page 1 */</div><div class='ctx'> 	sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (ioc-&gt;sas_hba.num_phys *</div><div class='ctx'> 	    sizeof(Mpi2SasIOUnit1PhyData_t));</div><div class='ctx'> 	sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);</div><div class='hunk'>@@ -1676,7 +1734,18 @@ _transport_phy_enable(struct sas_phy *phy, int enable)</div><div class='ctx'> 		rc = -EIO;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+	/* copy Port/PortFlags/PhyFlags from page 0 */</div><div class='add'>+	for (i = 0; i &lt; ioc-&gt;sas_hba.num_phys ; i++) {</div><div class='add'>+		sas_iounit_pg1-&gt;PhyData[i].Port =</div><div class='add'>+		    sas_iounit_pg0-&gt;PhyData[i].Port;</div><div class='add'>+		sas_iounit_pg1-&gt;PhyData[i].PortFlags =</div><div class='add'>+		    (sas_iounit_pg0-&gt;PhyData[i].PortFlags &amp;</div><div class='add'>+		    MPI2_SASIOUNIT0_PORTFLAGS_AUTO_PORT_CONFIG);</div><div class='add'>+		sas_iounit_pg1-&gt;PhyData[i].PhyFlags =</div><div class='add'>+		    (sas_iounit_pg0-&gt;PhyData[i].PhyFlags &amp;</div><div class='add'>+		    (MPI2_SASIOUNIT0_PHYFLAGS_ZONING_ENABLED +</div><div class='add'>+		    MPI2_SASIOUNIT0_PHYFLAGS_PHY_DISABLED));</div><div class='add'>+	}</div><div class='ctx'> 	if (enable)</div><div class='ctx'> 		sas_iounit_pg1-&gt;PhyData[phy-&gt;number].PhyFlags</div><div class='ctx'> 		    &amp;= ~MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE;</div><div class='hunk'>@@ -1692,6 +1761,7 @@ _transport_phy_enable(struct sas_phy *phy, int enable)</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='ctx'> 	kfree(sas_iounit_pg1);</div><div class='add'>+	kfree(sas_iounit_pg0);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1828,7 +1898,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,</div><div class='ctx'> 	struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);</div><div class='ctx'> 	Mpi2SmpPassthroughRequest_t *mpi_request;</div><div class='ctx'> 	Mpi2SmpPassthroughReply_t *mpi_reply;</div><div class='del'>-	int rc;</div><div class='add'>+	int rc, i;</div><div class='ctx'> 	u16 smid;</div><div class='ctx'> 	u32 ioc_state;</div><div class='ctx'> 	unsigned long timeleft;</div><div class='hunk'>@@ -1837,24 +1907,20 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,</div><div class='ctx'> 	u8 issue_reset = 0;</div><div class='ctx'> 	dma_addr_t dma_addr_in = 0;</div><div class='ctx'> 	dma_addr_t dma_addr_out = 0;</div><div class='add'>+	dma_addr_t pci_dma_in = 0;</div><div class='add'>+	dma_addr_t pci_dma_out = 0;</div><div class='add'>+	void *pci_addr_in = NULL;</div><div class='add'>+	void *pci_addr_out = NULL;</div><div class='ctx'> 	u16 wait_state_count;</div><div class='ctx'> 	struct request *rsp = req-&gt;next_rq;</div><div class='add'>+	struct bio_vec *bvec = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (!rsp) {</div><div class='ctx'> 		printk(MPT2SAS_ERR_FMT "%s: the smp response space is "</div><div class='ctx'> 		    "missing\n", ioc-&gt;name, __func__);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	/* do we need to support multiple segments? */</div><div class='del'>-	if (req-&gt;bio-&gt;bi_vcnt &gt; 1 || rsp-&gt;bio-&gt;bi_vcnt &gt; 1) {</div><div class='del'>-		printk(MPT2SAS_ERR_FMT "%s: multiple segments req %u %u, "</div><div class='del'>-		    "rsp %u %u\n", ioc-&gt;name, __func__, req-&gt;bio-&gt;bi_vcnt,</div><div class='del'>-		    blk_rq_bytes(req), rsp-&gt;bio-&gt;bi_vcnt, blk_rq_bytes(rsp));</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ioc-&gt;shost_recovery) {</div><div class='add'>+	if (ioc-&gt;shost_recovery || ioc-&gt;pci_error_recovery) {</div><div class='ctx'> 		printk(MPT2SAS_INFO_FMT "%s: host reset in progress!\n",</div><div class='ctx'> 		    __func__, ioc-&gt;name);</div><div class='ctx'> 		return -EFAULT;</div><div class='hunk'>@@ -1872,6 +1938,59 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,</div><div class='ctx'> 	}</div><div class='ctx'> 	ioc-&gt;transport_cmds.status = MPT2_CMD_PENDING;</div><div class='ctx'> </div><div class='add'>+	/* Check if the request is split across multiple segments */</div><div class='add'>+	if (req-&gt;bio-&gt;bi_vcnt &gt; 1) {</div><div class='add'>+		u32 offset = 0;</div><div class='add'>+</div><div class='add'>+		/* Allocate memory and copy the request */</div><div class='add'>+		pci_addr_out = pci_alloc_consistent(ioc-&gt;pdev,</div><div class='add'>+		    blk_rq_bytes(req), &amp;pci_dma_out);</div><div class='add'>+		if (!pci_addr_out) {</div><div class='add'>+			printk(MPT2SAS_INFO_FMT "%s(): PCI Addr out = NULL\n",</div><div class='add'>+			    ioc-&gt;name, __func__);</div><div class='add'>+			rc = -ENOMEM;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		bio_for_each_segment(bvec, req-&gt;bio, i) {</div><div class='add'>+			memcpy(pci_addr_out + offset,</div><div class='add'>+			    page_address(bvec-&gt;bv_page) + bvec-&gt;bv_offset,</div><div class='add'>+			    bvec-&gt;bv_len);</div><div class='add'>+			offset += bvec-&gt;bv_len;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		dma_addr_out = pci_map_single(ioc-&gt;pdev, bio_data(req-&gt;bio),</div><div class='add'>+		    blk_rq_bytes(req), PCI_DMA_BIDIRECTIONAL);</div><div class='add'>+		if (!dma_addr_out) {</div><div class='add'>+			printk(MPT2SAS_INFO_FMT "%s(): DMA Addr out = NULL\n",</div><div class='add'>+			    ioc-&gt;name, __func__);</div><div class='add'>+			rc = -ENOMEM;</div><div class='add'>+			goto free_pci;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check if the response needs to be populated across</div><div class='add'>+	 * multiple segments */</div><div class='add'>+	if (rsp-&gt;bio-&gt;bi_vcnt &gt; 1) {</div><div class='add'>+		pci_addr_in = pci_alloc_consistent(ioc-&gt;pdev, blk_rq_bytes(rsp),</div><div class='add'>+		    &amp;pci_dma_in);</div><div class='add'>+		if (!pci_addr_in) {</div><div class='add'>+			printk(MPT2SAS_INFO_FMT "%s(): PCI Addr in = NULL\n",</div><div class='add'>+			    ioc-&gt;name, __func__);</div><div class='add'>+			rc = -ENOMEM;</div><div class='add'>+			goto unmap;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		dma_addr_in =  pci_map_single(ioc-&gt;pdev, bio_data(rsp-&gt;bio),</div><div class='add'>+		    blk_rq_bytes(rsp), PCI_DMA_BIDIRECTIONAL);</div><div class='add'>+		if (!dma_addr_in) {</div><div class='add'>+			printk(MPT2SAS_INFO_FMT "%s(): DMA Addr in = NULL\n",</div><div class='add'>+			    ioc-&gt;name, __func__);</div><div class='add'>+			rc = -ENOMEM;</div><div class='add'>+			goto unmap;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	wait_state_count = 0;</div><div class='ctx'> 	ioc_state = mpt2sas_base_get_iocstate(ioc, 1);</div><div class='ctx'> 	while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {</div><div class='hunk'>@@ -1880,7 +1999,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,</div><div class='ctx'> 			    "%s: failed due to ioc not operational\n",</div><div class='ctx'> 			    ioc-&gt;name, __func__);</div><div class='ctx'> 			rc = -EFAULT;</div><div class='del'>-			goto out;</div><div class='add'>+			goto unmap;</div><div class='ctx'> 		}</div><div class='ctx'> 		ssleep(1);</div><div class='ctx'> 		ioc_state = mpt2sas_base_get_iocstate(ioc, 1);</div><div class='hunk'>@@ -1897,7 +2016,7 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,</div><div class='ctx'> 		printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",</div><div class='ctx'> 		    ioc-&gt;name, __func__);</div><div class='ctx'> 		rc = -EAGAIN;</div><div class='del'>-		goto out;</div><div class='add'>+		goto unmap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rc = 0;</div><div class='hunk'>@@ -1919,16 +2038,14 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,</div><div class='ctx'> 	sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |</div><div class='ctx'> 	    MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_HOST_TO_IOC);</div><div class='ctx'> 	sgl_flags = sgl_flags &lt;&lt; MPI2_SGE_FLAGS_SHIFT;</div><div class='del'>-	dma_addr_out = pci_map_single(ioc-&gt;pdev, bio_data(req-&gt;bio),</div><div class='del'>-		blk_rq_bytes(req), PCI_DMA_BIDIRECTIONAL);</div><div class='del'>-	if (!dma_addr_out) {</div><div class='del'>-		mpt2sas_base_free_smid(ioc, smid);</div><div class='del'>-		goto unmap;</div><div class='add'>+	if (req-&gt;bio-&gt;bi_vcnt &gt; 1) {</div><div class='add'>+		ioc-&gt;base_add_sg_single(psge, sgl_flags |</div><div class='add'>+		    (blk_rq_bytes(req) - 4), pci_dma_out);</div><div class='add'>+	} else {</div><div class='add'>+		ioc-&gt;base_add_sg_single(psge, sgl_flags |</div><div class='add'>+		    (blk_rq_bytes(req) - 4), dma_addr_out);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ioc-&gt;base_add_sg_single(psge, sgl_flags | (blk_rq_bytes(req) - 4),</div><div class='del'>-	    dma_addr_out);</div><div class='del'>-</div><div class='ctx'> 	/* incr sgel */</div><div class='ctx'> 	psge += ioc-&gt;sge_size;</div><div class='ctx'> </div><div class='hunk'>@@ -1937,16 +2054,14 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,</div><div class='ctx'> 	    MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |</div><div class='ctx'> 	    MPI2_SGE_FLAGS_END_OF_LIST);</div><div class='ctx'> 	sgl_flags = sgl_flags &lt;&lt; MPI2_SGE_FLAGS_SHIFT;</div><div class='del'>-	dma_addr_in = pci_map_single(ioc-&gt;pdev, bio_data(rsp-&gt;bio),</div><div class='del'>-				     blk_rq_bytes(rsp), PCI_DMA_BIDIRECTIONAL);</div><div class='del'>-	if (!dma_addr_in) {</div><div class='del'>-		mpt2sas_base_free_smid(ioc, smid);</div><div class='del'>-		goto unmap;</div><div class='add'>+	if (rsp-&gt;bio-&gt;bi_vcnt &gt; 1) {</div><div class='add'>+		ioc-&gt;base_add_sg_single(psge, sgl_flags |</div><div class='add'>+		    (blk_rq_bytes(rsp) + 4), pci_dma_in);</div><div class='add'>+	} else {</div><div class='add'>+		ioc-&gt;base_add_sg_single(psge, sgl_flags |</div><div class='add'>+		    (blk_rq_bytes(rsp) + 4), dma_addr_in);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ioc-&gt;base_add_sg_single(psge, sgl_flags | (blk_rq_bytes(rsp) + 4),</div><div class='del'>-	    dma_addr_in);</div><div class='del'>-</div><div class='ctx'> 	dtransportprintk(ioc, printk(MPT2SAS_INFO_FMT "%s - "</div><div class='ctx'> 	    "sending smp request\n", ioc-&gt;name, __func__));</div><div class='ctx'> </div><div class='hunk'>@@ -1982,6 +2097,27 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,</div><div class='ctx'> 		req-&gt;resid_len = 0;</div><div class='ctx'> 		rsp-&gt;resid_len -=</div><div class='ctx'> 		    le16_to_cpu(mpi_reply-&gt;ResponseDataLength);</div><div class='add'>+		/* check if the resp needs to be copied from the allocated</div><div class='add'>+		 * pci mem */</div><div class='add'>+		if (rsp-&gt;bio-&gt;bi_vcnt &gt; 1) {</div><div class='add'>+			u32 offset = 0;</div><div class='add'>+			u32 bytes_to_copy =</div><div class='add'>+			    le16_to_cpu(mpi_reply-&gt;ResponseDataLength);</div><div class='add'>+			bio_for_each_segment(bvec, rsp-&gt;bio, i) {</div><div class='add'>+				if (bytes_to_copy &lt;= bvec-&gt;bv_len) {</div><div class='add'>+					memcpy(page_address(bvec-&gt;bv_page) +</div><div class='add'>+					    bvec-&gt;bv_offset, pci_addr_in +</div><div class='add'>+					    offset, bytes_to_copy);</div><div class='add'>+					break;</div><div class='add'>+				} else {</div><div class='add'>+					memcpy(page_address(bvec-&gt;bv_page) +</div><div class='add'>+					    bvec-&gt;bv_offset, pci_addr_in +</div><div class='add'>+					    offset, bvec-&gt;bv_len);</div><div class='add'>+					bytes_to_copy -= bvec-&gt;bv_len;</div><div class='add'>+				}</div><div class='add'>+				offset += bvec-&gt;bv_len;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dtransportprintk(ioc, printk(MPT2SAS_INFO_FMT</div><div class='ctx'> 		    "%s - no reply\n", ioc-&gt;name, __func__));</div><div class='hunk'>@@ -2003,6 +2139,15 @@ _transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,</div><div class='ctx'> 		pci_unmap_single(ioc-&gt;pdev, dma_addr_in, blk_rq_bytes(rsp),</div><div class='ctx'> 		    PCI_DMA_BIDIRECTIONAL);</div><div class='ctx'> </div><div class='add'>+ free_pci:</div><div class='add'>+	if (pci_addr_out)</div><div class='add'>+		pci_free_consistent(ioc-&gt;pdev, blk_rq_bytes(req), pci_addr_out,</div><div class='add'>+		    pci_dma_out);</div><div class='add'>+</div><div class='add'>+	if (pci_addr_in)</div><div class='add'>+		pci_free_consistent(ioc-&gt;pdev, blk_rq_bytes(rsp), pci_addr_in,</div><div class='add'>+		    pci_dma_in);</div><div class='add'>+</div><div class='ctx'>  out:</div><div class='ctx'> 	ioc-&gt;transport_cmds.status = MPT2_CMD_NOT_USED;</div><div class='ctx'> 	mutex_unlock(&amp;ioc-&gt;transport_cmds.mutex);</div><div class='head'>diff --git a/drivers/scsi/pm8001/pm8001_defs.h b/drivers/scsi/pm8001/pm8001_defs.h<br/>index 944afada61ee..c3d20c8d4abe 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/pm8001/pm8001_defs.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/pm8001/pm8001_defs.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/pm8001/pm8001_defs.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/pm8001/pm8001_defs.h</a></div><div class='hunk'>@@ -66,9 +66,10 @@ enum port_type {</div><div class='ctx'> </div><div class='ctx'> /* driver compile-time configuration */</div><div class='ctx'> #define	PM8001_MAX_CCB		 512	/* max ccbs supported */</div><div class='add'>+#define PM8001_MPI_QUEUE         1024   /* maximum mpi queue entries */</div><div class='ctx'> #define	PM8001_MAX_INB_NUM	 1</div><div class='ctx'> #define	PM8001_MAX_OUTB_NUM	 1</div><div class='del'>-#define	PM8001_CAN_QUEUE	 128	/* SCSI Queue depth */</div><div class='add'>+#define	PM8001_CAN_QUEUE	 508	/* SCSI Queue depth */</div><div class='ctx'> </div><div class='ctx'> /* unchangeable hardware details */</div><div class='ctx'> #define	PM8001_MAX_PHYS		 8	/* max. possible phys */</div><div class='head'>diff --git a/drivers/scsi/pm8001/pm8001_hwi.c b/drivers/scsi/pm8001/pm8001_hwi.c<br/>index 9d82ee5c10de..bf54aafc2d71 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/pm8001/pm8001_hwi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/pm8001/pm8001_hwi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/pm8001/pm8001_hwi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/pm8001/pm8001_hwi.c</a></div><div class='hunk'>@@ -192,7 +192,7 @@ init_default_table_values(struct pm8001_hba_info *pm8001_ha)</div><div class='ctx'> 	pm8001_ha-&gt;main_cfg_tbl.fatal_err_interrupt		= 0x01;</div><div class='ctx'> 	for (i = 0; i &lt; qn; i++) {</div><div class='ctx'> 		pm8001_ha-&gt;inbnd_q_tbl[i].element_pri_size_cnt	=</div><div class='del'>-			0x00000100 | (0x00000040 &lt;&lt; 16) | (0x00&lt;&lt;30);</div><div class='add'>+			PM8001_MPI_QUEUE | (64 &lt;&lt; 16) | (0x00&lt;&lt;30);</div><div class='ctx'> 		pm8001_ha-&gt;inbnd_q_tbl[i].upper_base_addr	=</div><div class='ctx'> 			pm8001_ha-&gt;memoryMap.region[IB].phys_addr_hi;</div><div class='ctx'> 		pm8001_ha-&gt;inbnd_q_tbl[i].lower_base_addr	=</div><div class='hunk'>@@ -218,7 +218,7 @@ init_default_table_values(struct pm8001_hba_info *pm8001_ha)</div><div class='ctx'> 	}</div><div class='ctx'> 	for (i = 0; i &lt; qn; i++) {</div><div class='ctx'> 		pm8001_ha-&gt;outbnd_q_tbl[i].element_size_cnt	=</div><div class='del'>-			256 | (64 &lt;&lt; 16) | (1&lt;&lt;30);</div><div class='add'>+			PM8001_MPI_QUEUE | (64 &lt;&lt; 16) | (0x01&lt;&lt;30);</div><div class='ctx'> 		pm8001_ha-&gt;outbnd_q_tbl[i].upper_base_addr	=</div><div class='ctx'> 			pm8001_ha-&gt;memoryMap.region[OB].phys_addr_hi;</div><div class='ctx'> 		pm8001_ha-&gt;outbnd_q_tbl[i].lower_base_addr	=</div><div class='hunk'>@@ -1245,7 +1245,7 @@ static int mpi_msg_free_get(struct inbound_queue_table *circularQ,</div><div class='ctx'> 	/* Stores the new consumer index */</div><div class='ctx'> 	consumer_index = pm8001_read_32(circularQ-&gt;ci_virt);</div><div class='ctx'> 	circularQ-&gt;consumer_index = cpu_to_le32(consumer_index);</div><div class='del'>-	if (((circularQ-&gt;producer_idx + bcCount) % 256) ==</div><div class='add'>+	if (((circularQ-&gt;producer_idx + bcCount) % PM8001_MPI_QUEUE) ==</div><div class='ctx'> 		le32_to_cpu(circularQ-&gt;consumer_index)) {</div><div class='ctx'> 		*messagePtr = NULL;</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -1253,7 +1253,8 @@ static int mpi_msg_free_get(struct inbound_queue_table *circularQ,</div><div class='ctx'> 	/* get memory IOMB buffer address */</div><div class='ctx'> 	offset = circularQ-&gt;producer_idx * 64;</div><div class='ctx'> 	/* increment to next bcCount element */</div><div class='del'>-	circularQ-&gt;producer_idx = (circularQ-&gt;producer_idx + bcCount) % 256;</div><div class='add'>+	circularQ-&gt;producer_idx = (circularQ-&gt;producer_idx + bcCount)</div><div class='add'>+				% PM8001_MPI_QUEUE;</div><div class='ctx'> 	/* Adds that distance to the base of the region virtual address plus</div><div class='ctx'> 	the message header size*/</div><div class='ctx'> 	msgHeader = (struct mpi_msg_hdr *)(circularQ-&gt;base_virt	+ offset);</div><div class='hunk'>@@ -1326,7 +1327,8 @@ static u32 mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* free the circular queue buffer elements associated with the message*/</div><div class='del'>-	circularQ-&gt;consumer_idx = (circularQ-&gt;consumer_idx + bc) % 256;</div><div class='add'>+	circularQ-&gt;consumer_idx = (circularQ-&gt;consumer_idx + bc)</div><div class='add'>+				% PM8001_MPI_QUEUE;</div><div class='ctx'> 	/* update the CI of outbound queue */</div><div class='ctx'> 	pm8001_cw32(pm8001_ha, circularQ-&gt;ci_pci_bar, circularQ-&gt;ci_offset,</div><div class='ctx'> 		circularQ-&gt;consumer_idx);</div><div class='hunk'>@@ -1383,7 +1385,8 @@ static u32 mpi_msg_consume(struct pm8001_hba_info *pm8001_ha,</div><div class='ctx'> 					circularQ-&gt;consumer_idx =</div><div class='ctx'> 						(circularQ-&gt;consumer_idx +</div><div class='ctx'> 						((le32_to_cpu(msgHeader_tmp)</div><div class='del'>-						&gt;&gt; 24) &amp; 0x1f)) % 256;</div><div class='add'>+						 &gt;&gt; 24) &amp; 0x1f))</div><div class='add'>+							% PM8001_MPI_QUEUE;</div><div class='ctx'> 					msgHeader_tmp = 0;</div><div class='ctx'> 					pm8001_write_32(msgHeader, 0, 0);</div><div class='ctx'> 					/* update the CI of outbound queue */</div><div class='hunk'>@@ -1396,7 +1399,7 @@ static u32 mpi_msg_consume(struct pm8001_hba_info *pm8001_ha,</div><div class='ctx'> 				circularQ-&gt;consumer_idx =</div><div class='ctx'> 					(circularQ-&gt;consumer_idx +</div><div class='ctx'> 					((le32_to_cpu(msgHeader_tmp) &gt;&gt; 24) &amp;</div><div class='del'>-					0x1f)) % 256;</div><div class='add'>+					0x1f)) % PM8001_MPI_QUEUE;</div><div class='ctx'> 				msgHeader_tmp = 0;</div><div class='ctx'> 				pm8001_write_32(msgHeader, 0, 0);</div><div class='ctx'> 				/* update the CI of outbound queue */</div><div class='hunk'>@@ -3357,7 +3360,7 @@ mpi_fw_flash_update_resp(struct pm8001_hba_info *pm8001_ha, void *piomb)</div><div class='ctx'> 	struct fw_control_ex	fw_control_context;</div><div class='ctx'> 	struct fw_flash_Update_resp *ppayload =</div><div class='ctx'> 		(struct fw_flash_Update_resp *)(piomb + 4);</div><div class='del'>-	u32 tag = ppayload-&gt;tag;</div><div class='add'>+	u32 tag = le32_to_cpu(ppayload-&gt;tag);</div><div class='ctx'> 	struct pm8001_ccb_info *ccb = &amp;pm8001_ha-&gt;ccb_info[tag];</div><div class='ctx'> 	status = le32_to_cpu(ppayload-&gt;status);</div><div class='ctx'> 	memcpy(&amp;fw_control_context,</div><div class='hunk'>@@ -3703,8 +3706,8 @@ static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void* piomb)</div><div class='ctx'>  */</div><div class='ctx'> static void process_one_iomb(struct pm8001_hba_info *pm8001_ha, void *piomb)</div><div class='ctx'> {</div><div class='del'>-	u32 pHeader = (u32)*(u32 *)piomb;</div><div class='del'>-	u8 opc = (u8)(pHeader &amp; 0xFFF);</div><div class='add'>+	__le32 pHeader = *(__le32 *)piomb;</div><div class='add'>+	u8 opc = (u8)((le32_to_cpu(pHeader)) &amp; 0xFFF);</div><div class='ctx'> </div><div class='ctx'> 	PM8001_MSG_DBG(pm8001_ha, pm8001_printk("process_one_iomb:"));</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/pm8001/pm8001_hwi.h b/drivers/scsi/pm8001/pm8001_hwi.h<br/>index 1a4611eb0321..d437309cb1e1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/pm8001/pm8001_hwi.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/pm8001/pm8001_hwi.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/pm8001/pm8001_hwi.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/pm8001/pm8001_hwi.h</a></div><div class='hunk'>@@ -599,7 +599,7 @@ struct fw_flash_Update_req {</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> struct fw_flash_Update_resp {</div><div class='del'>-	dma_addr_t	tag;</div><div class='add'>+	__le32	tag;</div><div class='ctx'> 	__le32	status;</div><div class='ctx'> 	u32	reserved[13];</div><div class='ctx'> } __attribute__((packed, aligned(4)));</div><div class='head'>diff --git a/drivers/scsi/pm8001/pm8001_init.c b/drivers/scsi/pm8001/pm8001_init.c<br/>index 36efaa7c3a54..0267c22f8741 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/pm8001/pm8001_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/pm8001/pm8001_init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/pm8001/pm8001_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/pm8001/pm8001_init.c</a></div><div class='hunk'>@@ -235,15 +235,15 @@ static int __devinit pm8001_alloc(struct pm8001_hba_info *pm8001_ha)</div><div class='ctx'> 	pm8001_ha-&gt;memoryMap.region[PI].alignment = 4;</div><div class='ctx'> </div><div class='ctx'> 	/* MPI Memory region 5 inbound queues */</div><div class='del'>-	pm8001_ha-&gt;memoryMap.region[IB].num_elements = 256;</div><div class='add'>+	pm8001_ha-&gt;memoryMap.region[IB].num_elements = PM8001_MPI_QUEUE;</div><div class='ctx'> 	pm8001_ha-&gt;memoryMap.region[IB].element_size = 64;</div><div class='del'>-	pm8001_ha-&gt;memoryMap.region[IB].total_len = 256 * 64;</div><div class='add'>+	pm8001_ha-&gt;memoryMap.region[IB].total_len = PM8001_MPI_QUEUE * 64;</div><div class='ctx'> 	pm8001_ha-&gt;memoryMap.region[IB].alignment = 64;</div><div class='ctx'> </div><div class='del'>-	/* MPI Memory region 6 inbound queues */</div><div class='del'>-	pm8001_ha-&gt;memoryMap.region[OB].num_elements = 256;</div><div class='add'>+	/* MPI Memory region 6 outbound queues */</div><div class='add'>+	pm8001_ha-&gt;memoryMap.region[OB].num_elements = PM8001_MPI_QUEUE;</div><div class='ctx'> 	pm8001_ha-&gt;memoryMap.region[OB].element_size = 64;</div><div class='del'>-	pm8001_ha-&gt;memoryMap.region[OB].total_len = 256 * 64;</div><div class='add'>+	pm8001_ha-&gt;memoryMap.region[OB].total_len = PM8001_MPI_QUEUE * 64;</div><div class='ctx'> 	pm8001_ha-&gt;memoryMap.region[OB].alignment = 64;</div><div class='ctx'> </div><div class='ctx'> 	/* Memory region write DMA*/</div><div class='head'>diff --git a/drivers/scsi/qla1280.c b/drivers/scsi/qla1280.c<br/>index 6c6486f626ee..538230be5cca 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla1280.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla1280.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla1280.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla1280.c</a></div><div class='hunk'>@@ -4473,17 +4473,14 @@ qla1280_exit(void)</div><div class='ctx'> 	pci_unregister_driver(&amp;qla1280_pci_driver);</div><div class='ctx'> 	/* release any allocated firmware images */</div><div class='ctx'> 	for (i = 0; i &lt; QL_NUM_FW_IMAGES; i++) {</div><div class='del'>-		if (qla1280_fw_tbl[i].fw) {</div><div class='del'>-			release_firmware(qla1280_fw_tbl[i].fw);</div><div class='del'>-			qla1280_fw_tbl[i].fw = NULL;</div><div class='del'>-		}</div><div class='add'>+		release_firmware(qla1280_fw_tbl[i].fw);</div><div class='add'>+		qla1280_fw_tbl[i].fw = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(qla1280_init);</div><div class='ctx'> module_exit(qla1280_exit);</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> MODULE_AUTHOR("Qlogic &amp; Jes Sorensen");</div><div class='ctx'> MODULE_DESCRIPTION("Qlogic ISP SCSI (qla1x80/qla1x160) driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/Kconfig b/drivers/scsi/qla2xxx/Kconfig<br/>index 6208d562890d..317a7fdc3b82 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/Kconfig?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/Kconfig</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/Kconfig?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/Kconfig</a></div><div class='hunk'>@@ -25,3 +25,12 @@ config SCSI_QLA_FC</div><div class='ctx'> 	Firmware images can be retrieved from:</div><div class='ctx'> </div><div class='ctx'> 		ftp://ftp.qlogic.com/outgoing/linux/firmware/</div><div class='add'>+</div><div class='add'>+config TCM_QLA2XXX</div><div class='add'>+	tristate "TCM_QLA2XXX fabric module for Qlogic 2xxx series target mode HBAs"</div><div class='add'>+	depends on SCSI_QLA_FC &amp;&amp; TARGET_CORE</div><div class='add'>+	select LIBFC</div><div class='add'>+	select BTREE</div><div class='add'>+	default n</div><div class='add'>+	---help---</div><div class='add'>+	Say Y here to enable the TCM_QLA2XXX fabric module for Qlogic 2xxx series target mode HBAs</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/Makefile b/drivers/scsi/qla2xxx/Makefile<br/>index 5df782f4a097..dce7d788cdc9 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/Makefile?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/Makefile</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/Makefile?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/Makefile</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> qla2xxx-y := qla_os.o qla_init.o qla_mbx.o qla_iocb.o qla_isr.o qla_gs.o \</div><div class='ctx'> 		qla_dbg.o qla_sup.o qla_attr.o qla_mid.o qla_dfs.o qla_bsg.o \</div><div class='del'>-        qla_nx.o</div><div class='add'>+        qla_nx.o qla_target.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SCSI_QLA_FC) += qla2xxx.o</div><div class='add'>+obj-$(CONFIG_TCM_QLA2XXX) += tcm_qla2xxx.o</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c<br/>index 5926f5a87ea8..5ab953029f8d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_attr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_attr.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_attr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_attr.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  * See LICENSE.qla2xxx for copyright and licensing details.</div><div class='ctx'>  */</div><div class='ctx'> #include "qla_def.h"</div><div class='add'>+#include "qla_target.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kthread.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='hunk'>@@ -576,6 +577,7 @@ qla2x00_sysfs_write_reset(struct file *filp, struct kobject *kobj,</div><div class='ctx'> 		scsi_block_requests(vha-&gt;host);</div><div class='ctx'> 		set_bit(ISP_ABORT_NEEDED, &amp;vha-&gt;dpc_flags);</div><div class='ctx'> 		if (IS_QLA82XX(ha)) {</div><div class='add'>+			ha-&gt;flags.isp82xx_no_md_cap = 1;</div><div class='ctx'> 			qla82xx_idc_lock(ha);</div><div class='ctx'> 			qla82xx_set_reset_owner(vha);</div><div class='ctx'> 			qla82xx_idc_unlock(ha);</div><div class='hunk'>@@ -585,7 +587,7 @@ qla2x00_sysfs_write_reset(struct file *filp, struct kobject *kobj,</div><div class='ctx'> 		scsi_unblock_requests(vha-&gt;host);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x2025d:</div><div class='del'>-		if (!IS_QLA81XX(ha))</div><div class='add'>+		if (!IS_QLA81XX(ha) || !IS_QLA8031(ha))</div><div class='ctx'> 			return -EPERM;</div><div class='ctx'> </div><div class='ctx'> 		ql_log(ql_log_info, vha, 0x706f,</div><div class='hunk'>@@ -1105,9 +1107,8 @@ qla2x00_total_isp_aborts_show(struct device *dev,</div><div class='ctx'> 			      struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));</div><div class='del'>-	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> 	return snprintf(buf, PAGE_SIZE, "%d\n",</div><div class='del'>-	    ha-&gt;qla_stats.total_isp_aborts);</div><div class='add'>+	    vha-&gt;qla_stats.total_isp_aborts);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t</div><div class='hunk'>@@ -1154,7 +1155,7 @@ qla2x00_phy_version_show(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 	scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	if (!IS_QLA81XX(ha) &amp;&amp; !IS_QLA83XX(ha))</div><div class='add'>+	if (!IS_QLA81XX(ha) &amp;&amp; !IS_QLA8031(ha))</div><div class='ctx'> 		return snprintf(buf, PAGE_SIZE, "\n");</div><div class='ctx'> </div><div class='ctx'> 	return snprintf(buf, PAGE_SIZE, "%d.%02d.%02d\n",</div><div class='hunk'>@@ -1537,7 +1538,7 @@ qla2x00_get_fc_host_stats(struct Scsi_Host *shost)</div><div class='ctx'> 	dma_addr_t stats_dma;</div><div class='ctx'> 	struct fc_host_statistics *pfc_host_stat;</div><div class='ctx'> </div><div class='del'>-	pfc_host_stat = &amp;ha-&gt;fc_host_stat;</div><div class='add'>+	pfc_host_stat = &amp;vha-&gt;fc_host_stat;</div><div class='ctx'> 	memset(pfc_host_stat, -1, sizeof(struct fc_host_statistics));</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(UNLOADING, &amp;vha-&gt;dpc_flags))</div><div class='hunk'>@@ -1580,8 +1581,8 @@ qla2x00_get_fc_host_stats(struct Scsi_Host *shost)</div><div class='ctx'> 		pfc_host_stat-&gt;dumped_frames = stats-&gt;dumped_frames;</div><div class='ctx'> 		pfc_host_stat-&gt;nos_count = stats-&gt;nos_rcvd;</div><div class='ctx'> 	}</div><div class='del'>-	pfc_host_stat-&gt;fcp_input_megabytes = ha-&gt;qla_stats.input_bytes &gt;&gt; 20;</div><div class='del'>-	pfc_host_stat-&gt;fcp_output_megabytes = ha-&gt;qla_stats.output_bytes &gt;&gt; 20;</div><div class='add'>+	pfc_host_stat-&gt;fcp_input_megabytes = vha-&gt;qla_stats.input_bytes &gt;&gt; 20;</div><div class='add'>+	pfc_host_stat-&gt;fcp_output_megabytes = vha-&gt;qla_stats.output_bytes &gt;&gt; 20;</div><div class='ctx'> </div><div class='ctx'> done_free:</div><div class='ctx'>         dma_pool_free(ha-&gt;s_dma_pool, stats, stats_dma);</div><div class='hunk'>@@ -1737,6 +1738,7 @@ qla24xx_vport_create(struct fc_vport *fc_vport, bool disable)</div><div class='ctx'> 	fc_host_supported_speeds(vha-&gt;host) =</div><div class='ctx'> 		fc_host_supported_speeds(base_vha-&gt;host);</div><div class='ctx'> </div><div class='add'>+	qlt_vport_create(vha, ha);</div><div class='ctx'> 	qla24xx_vport_disable(fc_vport, disable);</div><div class='ctx'> </div><div class='ctx'> 	if (ha-&gt;flags.cpu_affinity_enabled) {</div><div class='hunk'>@@ -1951,12 +1953,16 @@ qla2x00_init_host_attr(scsi_qla_host_t *vha)</div><div class='ctx'> 	fc_host_dev_loss_tmo(vha-&gt;host) = ha-&gt;port_down_retry_count;</div><div class='ctx'> 	fc_host_node_name(vha-&gt;host) = wwn_to_u64(vha-&gt;node_name);</div><div class='ctx'> 	fc_host_port_name(vha-&gt;host) = wwn_to_u64(vha-&gt;port_name);</div><div class='del'>-	fc_host_supported_classes(vha-&gt;host) = FC_COS_CLASS3;</div><div class='add'>+	fc_host_supported_classes(vha-&gt;host) = ha-&gt;tgt.enable_class_2 ?</div><div class='add'>+			(FC_COS_CLASS2|FC_COS_CLASS3) : FC_COS_CLASS3;</div><div class='ctx'> 	fc_host_max_npiv_vports(vha-&gt;host) = ha-&gt;max_npiv_vports;</div><div class='ctx'> 	fc_host_npiv_vports_inuse(vha-&gt;host) = ha-&gt;cur_vport_count;</div><div class='ctx'> </div><div class='ctx'> 	if (IS_CNA_CAPABLE(ha))</div><div class='ctx'> 		speed = FC_PORTSPEED_10GBIT;</div><div class='add'>+	else if (IS_QLA2031(ha))</div><div class='add'>+		speed = FC_PORTSPEED_16GBIT | FC_PORTSPEED_8GBIT |</div><div class='add'>+		    FC_PORTSPEED_4GBIT;</div><div class='ctx'> 	else if (IS_QLA25XX(ha))</div><div class='ctx'> 		speed = FC_PORTSPEED_8GBIT | FC_PORTSPEED_4GBIT |</div><div class='ctx'> 		    FC_PORTSPEED_2GBIT | FC_PORTSPEED_1GBIT;</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_bsg.c b/drivers/scsi/qla2xxx/qla_bsg.c<br/>index f74cc0602f3b..c68883806c54 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_bsg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_bsg.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_bsg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_bsg.c</a></div><div class='hunk'>@@ -297,7 +297,6 @@ qla2x00_process_els(struct fc_bsg_job *bsg_job)</div><div class='ctx'> </div><div class='ctx'> 		/* Initialize all required  fields of fcport */</div><div class='ctx'> 		fcport-&gt;vha = vha;</div><div class='del'>-		fcport-&gt;vp_idx = vha-&gt;vp_idx;</div><div class='ctx'> 		fcport-&gt;d_id.b.al_pa =</div><div class='ctx'> 			bsg_job-&gt;request-&gt;rqst_data.h_els.port_id[0];</div><div class='ctx'> 		fcport-&gt;d_id.b.area =</div><div class='hunk'>@@ -483,7 +482,6 @@ qla2x00_process_ct(struct fc_bsg_job *bsg_job)</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize all required  fields of fcport */</div><div class='ctx'> 	fcport-&gt;vha = vha;</div><div class='del'>-	fcport-&gt;vp_idx = vha-&gt;vp_idx;</div><div class='ctx'> 	fcport-&gt;d_id.b.al_pa = bsg_job-&gt;request-&gt;rqst_data.h_ct.port_id[0];</div><div class='ctx'> 	fcport-&gt;d_id.b.area = bsg_job-&gt;request-&gt;rqst_data.h_ct.port_id[1];</div><div class='ctx'> 	fcport-&gt;d_id.b.domain = bsg_job-&gt;request-&gt;rqst_data.h_ct.port_id[2];</div><div class='hunk'>@@ -544,7 +542,7 @@ qla81xx_set_internal_loopback(scsi_qla_host_t *vha, uint16_t *config,</div><div class='ctx'> 	int rval = 0;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	if (!IS_QLA81XX(ha) &amp;&amp; !IS_QLA83XX(ha))</div><div class='add'>+	if (!IS_QLA81XX(ha) &amp;&amp; !IS_QLA8031(ha))</div><div class='ctx'> 		goto done_set_internal;</div><div class='ctx'> </div><div class='ctx'> 	new_config[0] = config[0] | (ENABLE_INTERNAL_LOOPBACK &lt;&lt; 1);</div><div class='hunk'>@@ -586,7 +584,7 @@ qla81xx_reset_internal_loopback(scsi_qla_host_t *vha, uint16_t *config,</div><div class='ctx'> 	uint16_t new_config[4];</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	if (!IS_QLA81XX(ha) &amp;&amp; !IS_QLA83XX(ha))</div><div class='add'>+	if (!IS_QLA81XX(ha) &amp;&amp; !IS_QLA8031(ha))</div><div class='ctx'> 		goto done_reset_internal;</div><div class='ctx'> </div><div class='ctx'> 	memset(new_config, 0 , sizeof(new_config));</div><div class='hunk'>@@ -710,8 +708,7 @@ qla2x00_process_loopback(struct fc_bsg_job *bsg_job)</div><div class='ctx'> 	elreq.options = bsg_job-&gt;request-&gt;rqst_data.h_vendor.vendor_cmd[1];</div><div class='ctx'> </div><div class='ctx'> 	if ((ha-&gt;current_topology == ISP_CFG_F ||</div><div class='del'>-	    (atomic_read(&amp;vha-&gt;loop_state) == LOOP_DOWN) ||</div><div class='del'>-	    ((IS_QLA81XX(ha) || IS_QLA83XX(ha)) &amp;&amp;</div><div class='add'>+	    ((IS_QLA81XX(ha) || IS_QLA8031(ha)) &amp;&amp;</div><div class='ctx'> 	    le32_to_cpu(*(uint32_t *)req_data) == ELS_OPCODE_BYTE</div><div class='ctx'> 	    &amp;&amp; req_data_len == MAX_ELS_FRAME_PAYLOAD)) &amp;&amp;</div><div class='ctx'> 		elreq.options == EXTERNAL_LOOPBACK) {</div><div class='hunk'>@@ -1367,6 +1364,9 @@ qla2x00_read_optrom(struct fc_bsg_job *bsg_job)</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> 	int rval = 0;</div><div class='ctx'> </div><div class='add'>+	if (ha-&gt;flags.isp82xx_reset_hdlr_active)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='ctx'> 	rval = qla2x00_optrom_setup(bsg_job, vha, 0);</div><div class='ctx'> 	if (rval)</div><div class='ctx'> 		return rval;</div><div class='hunk'>@@ -1399,6 +1399,9 @@ qla2x00_update_optrom(struct fc_bsg_job *bsg_job)</div><div class='ctx'> 	if (rval)</div><div class='ctx'> 		return rval;</div><div class='ctx'> </div><div class='add'>+	/* Set the isp82xx_no_md_cap not to capture minidump */</div><div class='add'>+	ha-&gt;flags.isp82xx_no_md_cap = 1;</div><div class='add'>+</div><div class='ctx'> 	sg_copy_to_buffer(bsg_job-&gt;request_payload.sg_list,</div><div class='ctx'> 	    bsg_job-&gt;request_payload.sg_cnt, ha-&gt;optrom_buffer,</div><div class='ctx'> 	    ha-&gt;optrom_region_size);</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c<br/>index 897731b93df2..fdee5611f3e2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_dbg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_dbg.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_dbg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_dbg.c</a></div><div class='hunk'>@@ -11,27 +11,31 @@</div><div class='ctx'>  * ----------------------------------------------------------------------</div><div class='ctx'>  * |             Level            |   Last Value Used  |     Holes	|</div><div class='ctx'>  * ----------------------------------------------------------------------</div><div class='del'>- * | Module Init and Probe        |       0x0120       | 0x4b,0xba,0xfa |</div><div class='del'>- * | Mailbox commands             |       0x113e       | 0x112c-0x112e  |</div><div class='add'>+ * | Module Init and Probe        |       0x0122       | 0x4b,0xba,0xfa |</div><div class='add'>+ * | Mailbox commands             |       0x1140       | 0x111a-0x111b  |</div><div class='add'>+ * |                              |                    | 0x112c-0x112e  |</div><div class='ctx'>  * |                              |                    | 0x113a         |</div><div class='ctx'>  * | Device Discovery             |       0x2086       | 0x2020-0x2022  |</div><div class='del'>- * | Queue Command and IO tracing |       0x302f       | 0x3006,0x3008  |</div><div class='add'>+ * | Queue Command and IO tracing |       0x3030       | 0x3006,0x3008  |</div><div class='ctx'>  * |                              |                    | 0x302d-0x302e  |</div><div class='del'>- * | DPC Thread                   |       0x401c       |		|</div><div class='del'>- * | Async Events                 |       0x505d       | 0x502b-0x502f  |</div><div class='add'>+ * | DPC Thread                   |       0x401c       | 0x4002,0x4013  |</div><div class='add'>+ * | Async Events                 |       0x505f       | 0x502b-0x502f  |</div><div class='ctx'>  * |                              |                    | 0x5047,0x5052  |</div><div class='del'>- * | Timer Routines               |       0x6011       | 0x600e-0x600f  |</div><div class='add'>+ * | Timer Routines               |       0x6011       |                |</div><div class='ctx'>  * | User Space Interactions      |       0x709f       | 0x7018,0x702e, |</div><div class='ctx'>  * |                              |                    | 0x7039,0x7045, |</div><div class='ctx'>  * |                              |                    | 0x7073-0x7075, |</div><div class='ctx'>  * |                              |                    | 0x708c         |</div><div class='ctx'>  * | Task Management              |       0x803c       | 0x8025-0x8026  |</div><div class='ctx'>  * |                              |                    | 0x800b,0x8039  |</div><div class='del'>- * | AER/EEH                      |       0x900f       |		|</div><div class='add'>+ * | AER/EEH                      |       0x9011       |		|</div><div class='ctx'>  * | Virtual Port                 |       0xa007       |		|</div><div class='del'>- * | ISP82XX Specific             |       0xb054       | 0xb053         |</div><div class='add'>+ * | ISP82XX Specific             |       0xb054       | 0xb024         |</div><div class='ctx'>  * | MultiQ                       |       0xc00c       |		|</div><div class='ctx'>  * | Misc                         |       0xd010       |		|</div><div class='add'>+ * | Target Mode		  |	  0xe06f       |		|</div><div class='add'>+ * | Target Mode Management	  |	  0xf071       |		|</div><div class='add'>+ * | Target Mode Task Management  |	  0x1000b      |		|</div><div class='ctx'>  * ----------------------------------------------------------------------</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -379,6 +383,54 @@ qla25xx_copy_fce(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void *</div><div class='add'>+qla2xxx_copy_atioqueues(struct qla_hw_data *ha, void *ptr,</div><div class='add'>+	uint32_t **last_chain)</div><div class='add'>+{</div><div class='add'>+	struct qla2xxx_mqueue_chain *q;</div><div class='add'>+	struct qla2xxx_mqueue_header *qh;</div><div class='add'>+	uint32_t num_queues;</div><div class='add'>+	int que;</div><div class='add'>+	struct {</div><div class='add'>+		int length;</div><div class='add'>+		void *ring;</div><div class='add'>+	} aq, *aqp;</div><div class='add'>+</div><div class='add'>+	if (!ha-&gt;tgt.atio_q_length)</div><div class='add'>+		return ptr;</div><div class='add'>+</div><div class='add'>+	num_queues = 1;</div><div class='add'>+	aqp = &amp;aq;</div><div class='add'>+	aqp-&gt;length = ha-&gt;tgt.atio_q_length;</div><div class='add'>+	aqp-&gt;ring = ha-&gt;tgt.atio_ring;</div><div class='add'>+</div><div class='add'>+	for (que = 0; que &lt; num_queues; que++) {</div><div class='add'>+		/* aqp = ha-&gt;atio_q_map[que]; */</div><div class='add'>+		q = ptr;</div><div class='add'>+		*last_chain = &amp;q-&gt;type;</div><div class='add'>+		q-&gt;type = __constant_htonl(DUMP_CHAIN_QUEUE);</div><div class='add'>+		q-&gt;chain_size = htonl(</div><div class='add'>+		    sizeof(struct qla2xxx_mqueue_chain) +</div><div class='add'>+		    sizeof(struct qla2xxx_mqueue_header) +</div><div class='add'>+		    (aqp-&gt;length * sizeof(request_t)));</div><div class='add'>+		ptr += sizeof(struct qla2xxx_mqueue_chain);</div><div class='add'>+</div><div class='add'>+		/* Add header. */</div><div class='add'>+		qh = ptr;</div><div class='add'>+		qh-&gt;queue = __constant_htonl(TYPE_ATIO_QUEUE);</div><div class='add'>+		qh-&gt;number = htonl(que);</div><div class='add'>+		qh-&gt;size = htonl(aqp-&gt;length * sizeof(request_t));</div><div class='add'>+		ptr += sizeof(struct qla2xxx_mqueue_header);</div><div class='add'>+</div><div class='add'>+		/* Add data. */</div><div class='add'>+		memcpy(ptr, aqp-&gt;ring, aqp-&gt;length * sizeof(request_t));</div><div class='add'>+</div><div class='add'>+		ptr += aqp-&gt;length * sizeof(request_t);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ptr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void *</div><div class='ctx'> qla25xx_copy_mqueues(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain)</div><div class='ctx'> {</div><div class='ctx'> 	struct qla2xxx_mqueue_chain *q;</div><div class='hunk'>@@ -873,6 +925,8 @@ qla24xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)</div><div class='ctx'> 	struct qla24xx_fw_dump *fw;</div><div class='ctx'> 	uint32_t	ext_mem_cnt;</div><div class='ctx'> 	void		*nxt;</div><div class='add'>+	void		*nxt_chain;</div><div class='add'>+	uint32_t	*last_chain = NULL;</div><div class='ctx'> 	struct scsi_qla_host *base_vha = pci_get_drvdata(ha-&gt;pdev);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_QLA82XX(ha))</div><div class='hunk'>@@ -1091,6 +1145,16 @@ qla24xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)</div><div class='ctx'> </div><div class='ctx'> 	qla24xx_copy_eft(ha, nxt);</div><div class='ctx'> </div><div class='add'>+	nxt_chain = (void *)ha-&gt;fw_dump + ha-&gt;chain_offset;</div><div class='add'>+	nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &amp;last_chain);</div><div class='add'>+	if (last_chain) {</div><div class='add'>+		ha-&gt;fw_dump-&gt;version |= __constant_htonl(DUMP_CHAIN_VARIANT);</div><div class='add'>+		*last_chain |= __constant_htonl(DUMP_CHAIN_LAST);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Adjust valid length. */</div><div class='add'>+	ha-&gt;fw_dump_len = (nxt_chain - (void *)ha-&gt;fw_dump);</div><div class='add'>+</div><div class='ctx'> qla24xx_fw_dump_failed_0:</div><div class='ctx'> 	qla2xxx_dump_post_process(base_vha, rval);</div><div class='ctx'> </div><div class='hunk'>@@ -1399,6 +1463,7 @@ qla25xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)</div><div class='ctx'> 	/* Chain entries -- started with MQ. */</div><div class='ctx'> 	nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &amp;last_chain);</div><div class='ctx'> 	nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &amp;last_chain);</div><div class='add'>+	nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &amp;last_chain);</div><div class='ctx'> 	if (last_chain) {</div><div class='ctx'> 		ha-&gt;fw_dump-&gt;version |= __constant_htonl(DUMP_CHAIN_VARIANT);</div><div class='ctx'> 		*last_chain |= __constant_htonl(DUMP_CHAIN_LAST);</div><div class='hunk'>@@ -1717,6 +1782,7 @@ qla81xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)</div><div class='ctx'> 	/* Chain entries -- started with MQ. */</div><div class='ctx'> 	nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &amp;last_chain);</div><div class='ctx'> 	nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &amp;last_chain);</div><div class='add'>+	nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &amp;last_chain);</div><div class='ctx'> 	if (last_chain) {</div><div class='ctx'> 		ha-&gt;fw_dump-&gt;version |= __constant_htonl(DUMP_CHAIN_VARIANT);</div><div class='ctx'> 		*last_chain |= __constant_htonl(DUMP_CHAIN_LAST);</div><div class='hunk'>@@ -2218,6 +2284,7 @@ copy_queue:</div><div class='ctx'> 	/* Chain entries -- started with MQ. */</div><div class='ctx'> 	nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &amp;last_chain);</div><div class='ctx'> 	nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &amp;last_chain);</div><div class='add'>+	nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &amp;last_chain);</div><div class='ctx'> 	if (last_chain) {</div><div class='ctx'> 		ha-&gt;fw_dump-&gt;version |= __constant_htonl(DUMP_CHAIN_VARIANT);</div><div class='ctx'> 		*last_chain |= __constant_htonl(DUMP_CHAIN_LAST);</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_dbg.h b/drivers/scsi/qla2xxx/qla_dbg.h<br/>index 2157bdf1569a..f278df8cce0f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_dbg.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_dbg.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_dbg.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_dbg.h</a></div><div class='hunk'>@@ -244,6 +244,7 @@ struct qla2xxx_mqueue_header {</div><div class='ctx'> 	uint32_t queue;</div><div class='ctx'> #define TYPE_REQUEST_QUEUE	0x1</div><div class='ctx'> #define TYPE_RESPONSE_QUEUE	0x2</div><div class='add'>+#define TYPE_ATIO_QUEUE		0x3</div><div class='ctx'> 	uint32_t number;</div><div class='ctx'> 	uint32_t size;</div><div class='ctx'> };</div><div class='hunk'>@@ -339,3 +340,11 @@ ql_log_pci(uint32_t, struct pci_dev *pdev, int32_t, const char *fmt, ...);</div><div class='ctx'> #define ql_dbg_misc	0x00010000 /* For dumping everything that is not</div><div class='ctx'> 				    * not covered by upper categories</div><div class='ctx'> 				    */</div><div class='add'>+#define ql_dbg_verbose	0x00008000 /* More verbosity for each level</div><div class='add'>+				    * This is to be used with other levels where</div><div class='add'>+				    * more verbosity is required. It might not</div><div class='add'>+				    * be applicable to all the levels.</div><div class='add'>+				    */</div><div class='add'>+#define ql_dbg_tgt	0x00004000 /* Target mode */</div><div class='add'>+#define ql_dbg_tgt_mgt	0x00002000 /* Target mode management */</div><div class='add'>+#define ql_dbg_tgt_tmr	0x00001000 /* Target mode task management */</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h<br/>index a2443031dbe7..39007f53aec0 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_def.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_def.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_def.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_def.h</a></div><div class='hunk'>@@ -186,6 +186,7 @@</div><div class='ctx'> #define RESPONSE_ENTRY_CNT_2100		64	/* Number of response entries.*/</div><div class='ctx'> #define RESPONSE_ENTRY_CNT_2300		512	/* Number of response entries.*/</div><div class='ctx'> #define RESPONSE_ENTRY_CNT_MQ		128	/* Number of response entries.*/</div><div class='add'>+#define ATIO_ENTRY_CNT_24XX		4096	/* Number of ATIO entries. */</div><div class='ctx'> </div><div class='ctx'> struct req_que;</div><div class='ctx'> </div><div class='hunk'>@@ -1234,11 +1235,27 @@ typedef struct {</div><div class='ctx'>  * ISP queue - response queue entry definition.</div><div class='ctx'>  */</div><div class='ctx'> typedef struct {</div><div class='del'>-	uint8_t		data[60];</div><div class='add'>+	uint8_t		entry_type;		/* Entry type. */</div><div class='add'>+	uint8_t		entry_count;		/* Entry count. */</div><div class='add'>+	uint8_t		sys_define;		/* System defined. */</div><div class='add'>+	uint8_t		entry_status;		/* Entry Status. */</div><div class='add'>+	uint32_t	handle;			/* System defined handle */</div><div class='add'>+	uint8_t		data[52];</div><div class='ctx'> 	uint32_t	signature;</div><div class='ctx'> #define RESPONSE_PROCESSED	0xDEADDEAD	/* Signature */</div><div class='ctx'> } response_t;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * ISP queue - ATIO queue entry definition.</div><div class='add'>+ */</div><div class='add'>+struct atio {</div><div class='add'>+	uint8_t		entry_type;		/* Entry type. */</div><div class='add'>+	uint8_t		entry_count;		/* Entry count. */</div><div class='add'>+	uint8_t		data[58];</div><div class='add'>+	uint32_t	signature;</div><div class='add'>+#define ATIO_PROCESSED 0xDEADDEAD		/* Signature */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> typedef union {</div><div class='ctx'> 	uint16_t extended;</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -1719,11 +1736,13 @@ typedef struct fc_port {</div><div class='ctx'> 	struct fc_rport *rport, *drport;</div><div class='ctx'> 	u32 supported_classes;</div><div class='ctx'> </div><div class='del'>-	uint16_t vp_idx;</div><div class='ctx'> 	uint8_t fc4_type;</div><div class='ctx'> 	uint8_t scan_state;</div><div class='ctx'> } fc_port_t;</div><div class='ctx'> </div><div class='add'>+#define QLA_FCPORT_SCAN_NONE	0</div><div class='add'>+#define QLA_FCPORT_SCAN_FOUND	1</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Fibre channel port/lun states.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1747,6 +1766,7 @@ static const char * const port_state_str[] = {</div><div class='ctx'> #define FCF_LOGIN_NEEDED	BIT_1</div><div class='ctx'> #define FCF_FCP2_DEVICE		BIT_2</div><div class='ctx'> #define FCF_ASYNC_SENT		BIT_3</div><div class='add'>+#define FCF_CONF_COMP_SUPPORTED BIT_4</div><div class='ctx'> </div><div class='ctx'> /* No loop ID flag. */</div><div class='ctx'> #define FC_NO_LOOP_ID		0x1000</div><div class='hunk'>@@ -2419,6 +2439,40 @@ struct qlfc_fw {</div><div class='ctx'> 	uint32_t len;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct qlt_hw_data {</div><div class='add'>+	/* Protected by hw lock */</div><div class='add'>+	uint32_t enable_class_2:1;</div><div class='add'>+	uint32_t enable_explicit_conf:1;</div><div class='add'>+	uint32_t ini_mode_force_reverse:1;</div><div class='add'>+	uint32_t node_name_set:1;</div><div class='add'>+</div><div class='add'>+	dma_addr_t atio_dma;	/* Physical address. */</div><div class='add'>+	struct atio *atio_ring;	/* Base virtual address */</div><div class='add'>+	struct atio *atio_ring_ptr;	/* Current address. */</div><div class='add'>+	uint16_t atio_ring_index; /* Current index. */</div><div class='add'>+	uint16_t atio_q_length;</div><div class='add'>+</div><div class='add'>+	void *target_lport_ptr;</div><div class='add'>+	struct qla_tgt_func_tmpl *tgt_ops;</div><div class='add'>+	struct qla_tgt *qla_tgt;</div><div class='add'>+	struct qla_tgt_cmd *cmds[MAX_OUTSTANDING_COMMANDS];</div><div class='add'>+	uint16_t current_handle;</div><div class='add'>+</div><div class='add'>+	struct qla_tgt_vp_map *tgt_vp_map;</div><div class='add'>+	struct mutex tgt_mutex;</div><div class='add'>+	struct mutex tgt_host_action_mutex;</div><div class='add'>+</div><div class='add'>+	int saved_set;</div><div class='add'>+	uint16_t saved_exchange_count;</div><div class='add'>+	uint32_t saved_firmware_options_1;</div><div class='add'>+	uint32_t saved_firmware_options_2;</div><div class='add'>+	uint32_t saved_firmware_options_3;</div><div class='add'>+	uint8_t saved_firmware_options[2];</div><div class='add'>+	uint8_t saved_add_firmware_options[2];</div><div class='add'>+</div><div class='add'>+	uint8_t tgt_node_name[WWN_SIZE];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Qlogic host adapter specific data structure.</div><div class='ctx'> */</div><div class='hunk'>@@ -2460,7 +2514,9 @@ struct qla_hw_data {</div><div class='ctx'> 		uint32_t	thermal_supported:1;</div><div class='ctx'> 		uint32_t	isp82xx_reset_hdlr_active:1;</div><div class='ctx'> 		uint32_t	isp82xx_reset_owner:1;</div><div class='del'>-		/* 28 bits */</div><div class='add'>+		uint32_t	isp82xx_no_md_cap:1;</div><div class='add'>+		uint32_t	host_shutting_down:1;</div><div class='add'>+		/* 30 bits */</div><div class='ctx'> 	} flags;</div><div class='ctx'> </div><div class='ctx'> 	/* This spinlock is used to protect "io transactions", you must</div><div class='hunk'>@@ -2804,7 +2860,6 @@ struct qla_hw_data {</div><div class='ctx'> 					/* ISP2322: red, green, amber. */</div><div class='ctx'> 	uint16_t        zio_mode;</div><div class='ctx'> 	uint16_t        zio_timer;</div><div class='del'>-	struct fc_host_statistics fc_host_stat;</div><div class='ctx'> </div><div class='ctx'> 	struct qla_msix_entry *msix_entries;</div><div class='ctx'> </div><div class='hunk'>@@ -2817,7 +2872,6 @@ struct qla_hw_data {</div><div class='ctx'> 	int             cur_vport_count;</div><div class='ctx'> </div><div class='ctx'> 	struct qla_chip_state_84xx *cs84xx;</div><div class='del'>-	struct qla_statistics qla_stats;</div><div class='ctx'> 	struct isp_operations *isp_ops;</div><div class='ctx'> 	struct workqueue_struct *wq;</div><div class='ctx'> 	struct qlfc_fw fw_buf;</div><div class='hunk'>@@ -2863,6 +2917,8 @@ struct qla_hw_data {</div><div class='ctx'> 	dma_addr_t      md_tmplt_hdr_dma;</div><div class='ctx'> 	void            *md_dump;</div><div class='ctx'> 	uint32_t	md_dump_size;</div><div class='add'>+</div><div class='add'>+	struct qlt_hw_data tgt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2920,6 +2976,7 @@ typedef struct scsi_qla_host {</div><div class='ctx'> #define FCOE_CTX_RESET_NEEDED	18	/* Initiate FCoE context reset */</div><div class='ctx'> #define MPI_RESET_NEEDED	19	/* Initiate MPI FW reset */</div><div class='ctx'> #define ISP_QUIESCE_NEEDED	20	/* Driver need some quiescence */</div><div class='add'>+#define SCR_PENDING		21	/* SCR in target mode */</div><div class='ctx'> </div><div class='ctx'> 	uint32_t	device_flags;</div><div class='ctx'> #define SWITCH_FOUND		BIT_0</div><div class='hunk'>@@ -2979,10 +3036,21 @@ typedef struct scsi_qla_host {</div><div class='ctx'> 	struct req_que *req;</div><div class='ctx'> 	int		fw_heartbeat_counter;</div><div class='ctx'> 	int		seconds_since_last_heartbeat;</div><div class='add'>+	struct fc_host_statistics fc_host_stat;</div><div class='add'>+	struct qla_statistics qla_stats;</div><div class='ctx'> </div><div class='ctx'> 	atomic_t	vref_count;</div><div class='ctx'> } scsi_qla_host_t;</div><div class='ctx'> </div><div class='add'>+#define SET_VP_IDX	1</div><div class='add'>+#define SET_AL_PA	2</div><div class='add'>+#define RESET_VP_IDX	3</div><div class='add'>+#define RESET_AL_PA	4</div><div class='add'>+struct qla_tgt_vp_map {</div><div class='add'>+	uint8_t	idx;</div><div class='add'>+	scsi_qla_host_t *vha;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Macros to help code, maintain, etc.</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h<br/>index 9f065804bd12..9eacd2df111b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_gbl.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_gbl.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_gbl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_gbl.h</a></div><div class='hunk'>@@ -175,6 +175,7 @@ extern int  qla2x00_vp_abort_isp(scsi_qla_host_t *);</div><div class='ctx'> /*</div><div class='ctx'>  * Global Function Prototypes in qla_iocb.c source file.</div><div class='ctx'>  */</div><div class='add'>+</div><div class='ctx'> extern uint16_t qla2x00_calc_iocbs_32(uint16_t);</div><div class='ctx'> extern uint16_t qla2x00_calc_iocbs_64(uint16_t);</div><div class='ctx'> extern void qla2x00_build_scsi_iocbs_32(srb_t *, cmd_entry_t *, uint16_t);</div><div class='hunk'>@@ -188,6 +189,8 @@ extern uint16_t qla24xx_calc_iocbs(scsi_qla_host_t *, uint16_t);</div><div class='ctx'> extern void qla24xx_build_scsi_iocbs(srb_t *, struct cmd_type_7 *, uint16_t);</div><div class='ctx'> extern int qla24xx_dif_start_scsi(srb_t *);</div><div class='ctx'> </div><div class='add'>+extern void *qla2x00_alloc_iocbs(scsi_qla_host_t *, srb_t *);</div><div class='add'>+extern int qla2x00_issue_marker(scsi_qla_host_t *, int);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Global Function Prototypes in qla_mbx.c source file.</div><div class='hunk'>@@ -239,6 +242,9 @@ extern int</div><div class='ctx'> qla2x00_init_firmware(scsi_qla_host_t *, uint16_t);</div><div class='ctx'> </div><div class='ctx'> extern int</div><div class='add'>+qla2x00_get_node_name_list(scsi_qla_host_t *, void **, int *);</div><div class='add'>+</div><div class='add'>+extern int</div><div class='ctx'> qla2x00_get_port_database(scsi_qla_host_t *, fc_port_t *, uint8_t);</div><div class='ctx'> </div><div class='ctx'> extern int</div><div class='hunk'>@@ -383,6 +389,8 @@ extern int qla2x00_request_irqs(struct qla_hw_data *, struct rsp_que *);</div><div class='ctx'> extern void qla2x00_free_irqs(scsi_qla_host_t *);</div><div class='ctx'> </div><div class='ctx'> extern int qla2x00_get_data_rate(scsi_qla_host_t *);</div><div class='add'>+extern char *qla2x00_get_link_speed_str(struct qla_hw_data *);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Global Function Prototypes in qla_sup.c source file.</div><div class='ctx'>  */</div><div class='hunk'>@@ -546,6 +554,7 @@ extern void qla2x00_sp_free(void *, void *);</div><div class='ctx'> extern void qla2x00_sp_timeout(unsigned long);</div><div class='ctx'> extern void qla2x00_bsg_job_done(void *, void *, int);</div><div class='ctx'> extern void qla2x00_bsg_sp_free(void *, void *);</div><div class='add'>+extern void qla2x00_start_iocbs(struct scsi_qla_host *, struct req_que *);</div><div class='ctx'> </div><div class='ctx'> /* Interrupt related */</div><div class='ctx'> extern irqreturn_t qla82xx_intr_handler(int, void *);</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_gs.c b/drivers/scsi/qla2xxx/qla_gs.c<br/>index 3128f80441f5..05260d25fe46 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_gs.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_gs.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_gs.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_gs.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  * See LICENSE.qla2xxx for copyright and licensing details.</div><div class='ctx'>  */</div><div class='ctx'> #include "qla_def.h"</div><div class='add'>+#include "qla_target.h"</div><div class='ctx'> </div><div class='ctx'> static int qla2x00_sns_ga_nxt(scsi_qla_host_t *, fc_port_t *);</div><div class='ctx'> static int qla2x00_sns_gid_pt(scsi_qla_host_t *, sw_info_t *);</div><div class='hunk'>@@ -556,7 +557,8 @@ qla2x00_rff_id(scsi_qla_host_t *vha)</div><div class='ctx'> 	ct_req-&gt;req.rff_id.port_id[1] = vha-&gt;d_id.b.area;</div><div class='ctx'> 	ct_req-&gt;req.rff_id.port_id[2] = vha-&gt;d_id.b.al_pa;</div><div class='ctx'> </div><div class='del'>-	ct_req-&gt;req.rff_id.fc4_feature = BIT_1;</div><div class='add'>+	qlt_rff_id(vha, ct_req);</div><div class='add'>+</div><div class='ctx'> 	ct_req-&gt;req.rff_id.fc4_type = 0x08;		/* SCSI - FCP */</div><div class='ctx'> </div><div class='ctx'> 	/* Execute MS IOCB */</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c<br/>index b9465643396b..ca5084743135 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_init.c</a></div><div class='hunk'>@@ -17,6 +17,9 @@</div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#include &lt;target/target_core_base.h&gt;</div><div class='add'>+#include "qla_target.h"</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'> *  QLogic ISP2x00 Hardware Support Function Prototypes.</div><div class='ctx'> */</div><div class='hunk'>@@ -518,7 +521,10 @@ qla2x00_initialize_adapter(scsi_qla_host_t *vha)</div><div class='ctx'> 			return QLA_FUNCTION_FAILED;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	rval = qla2x00_init_rings(vha);</div><div class='add'>+</div><div class='add'>+	if (qla_ini_mode_enabled(vha))</div><div class='add'>+		rval = qla2x00_init_rings(vha);</div><div class='add'>+</div><div class='ctx'> 	ha-&gt;flags.chip_reset_done = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (rval == QLA_SUCCESS &amp;&amp; IS_QLA84XX(ha)) {</div><div class='hunk'>@@ -1233,6 +1239,8 @@ qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)</div><div class='ctx'> 			mq_size += ha-&gt;max_rsp_queues *</div><div class='ctx'> 			    (rsp-&gt;length * sizeof(response_t));</div><div class='ctx'> 		}</div><div class='add'>+		if (ha-&gt;tgt.atio_q_length)</div><div class='add'>+			mq_size += ha-&gt;tgt.atio_q_length * sizeof(request_t);</div><div class='ctx'> 		/* Allocate memory for Fibre Channel Event Buffer. */</div><div class='ctx'> 		if (!IS_QLA25XX(ha) &amp;&amp; !IS_QLA81XX(ha) &amp;&amp; !IS_QLA83XX(ha))</div><div class='ctx'> 			goto try_eft;</div><div class='hunk'>@@ -1696,6 +1704,12 @@ qla24xx_config_rings(struct scsi_qla_host *vha)</div><div class='ctx'> 	icb-&gt;response_q_address[0] = cpu_to_le32(LSD(rsp-&gt;dma));</div><div class='ctx'> 	icb-&gt;response_q_address[1] = cpu_to_le32(MSD(rsp-&gt;dma));</div><div class='ctx'> </div><div class='add'>+	/* Setup ATIO queue dma pointers for target mode */</div><div class='add'>+	icb-&gt;atio_q_inpointer = __constant_cpu_to_le16(0);</div><div class='add'>+	icb-&gt;atio_q_length = cpu_to_le16(ha-&gt;tgt.atio_q_length);</div><div class='add'>+	icb-&gt;atio_q_address[0] = cpu_to_le32(LSD(ha-&gt;tgt.atio_dma));</div><div class='add'>+	icb-&gt;atio_q_address[1] = cpu_to_le32(MSD(ha-&gt;tgt.atio_dma));</div><div class='add'>+</div><div class='ctx'> 	if (ha-&gt;mqenable || IS_QLA83XX(ha)) {</div><div class='ctx'> 		icb-&gt;qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);</div><div class='ctx'> 		icb-&gt;rid = __constant_cpu_to_le16(rid);</div><div class='hunk'>@@ -1739,6 +1753,8 @@ qla24xx_config_rings(struct scsi_qla_host *vha)</div><div class='ctx'> 		WRT_REG_DWORD(&amp;reg-&gt;isp24.rsp_q_in, 0);</div><div class='ctx'> 		WRT_REG_DWORD(&amp;reg-&gt;isp24.rsp_q_out, 0);</div><div class='ctx'> 	}</div><div class='add'>+	qlt_24xx_config_rings(vha, reg);</div><div class='add'>+</div><div class='ctx'> 	/* PCI posting */</div><div class='ctx'> 	RD_REG_DWORD(&amp;ioreg-&gt;hccr);</div><div class='ctx'> }</div><div class='hunk'>@@ -1794,6 +1810,11 @@ qla2x00_init_rings(scsi_qla_host_t *vha)</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;ha-&gt;vport_slock);</div><div class='ctx'> </div><div class='add'>+	ha-&gt;tgt.atio_ring_ptr = ha-&gt;tgt.atio_ring;</div><div class='add'>+	ha-&gt;tgt.atio_ring_index = 0;</div><div class='add'>+	/* Initialize ATIO queue entries */</div><div class='add'>+	qlt_init_atio_q_entries(vha);</div><div class='add'>+</div><div class='ctx'> 	ha-&gt;isp_ops-&gt;config_rings(vha);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='hunk'>@@ -2051,6 +2072,10 @@ qla2x00_configure_hba(scsi_qla_host_t *vha)</div><div class='ctx'> 	vha-&gt;d_id.b.area = area;</div><div class='ctx'> 	vha-&gt;d_id.b.al_pa = al_pa;</div><div class='ctx'> </div><div class='add'>+	spin_lock(&amp;ha-&gt;vport_slock);</div><div class='add'>+	qlt_update_vp_map(vha, SET_AL_PA);</div><div class='add'>+	spin_unlock(&amp;ha-&gt;vport_slock);</div><div class='add'>+</div><div class='ctx'> 	if (!vha-&gt;flags.init_done)</div><div class='ctx'> 		ql_log(ql_log_info, vha, 0x2010,</div><div class='ctx'> 		    "Topology - %s, Host Loop address 0x%x.\n",</div><div class='hunk'>@@ -2185,7 +2210,7 @@ qla2x00_nvram_config(scsi_qla_host_t *vha)</div><div class='ctx'> 	    nv-&gt;id[2] != 'P' || nv-&gt;id[3] != ' ' || nv-&gt;nvram_version &lt; 1) {</div><div class='ctx'> 		/* Reset NVRAM data. */</div><div class='ctx'> 		ql_log(ql_log_warn, vha, 0x0064,</div><div class='del'>-		    "Inconisistent NVRAM "</div><div class='add'>+		    "Inconsistent NVRAM "</div><div class='ctx'> 		    "detected: checksum=0x%x id=%c version=0x%x.\n",</div><div class='ctx'> 		    chksum, nv-&gt;id[0], nv-&gt;nvram_version);</div><div class='ctx'> 		ql_log(ql_log_warn, vha, 0x0065,</div><div class='hunk'>@@ -2270,7 +2295,7 @@ qla2x00_nvram_config(scsi_qla_host_t *vha)</div><div class='ctx'> 	if (IS_QLA23XX(ha)) {</div><div class='ctx'> 		nv-&gt;firmware_options[0] |= BIT_2;</div><div class='ctx'> 		nv-&gt;firmware_options[0] &amp;= ~BIT_3;</div><div class='del'>-		nv-&gt;firmware_options[0] &amp;= ~BIT_6;</div><div class='add'>+		nv-&gt;special_options[0] &amp;= ~BIT_6;</div><div class='ctx'> 		nv-&gt;add_firmware_options[1] |= BIT_5 | BIT_4;</div><div class='ctx'> </div><div class='ctx'> 		if (IS_QLA2300(ha)) {</div><div class='hunk'>@@ -2467,14 +2492,21 @@ qla2x00_rport_del(void *data)</div><div class='ctx'> {</div><div class='ctx'> 	fc_port_t *fcport = data;</div><div class='ctx'> 	struct fc_rport *rport;</div><div class='add'>+	scsi_qla_host_t *vha = fcport-&gt;vha;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(fcport-&gt;vha-&gt;host-&gt;host_lock, flags);</div><div class='ctx'> 	rport = fcport-&gt;drport ? fcport-&gt;drport: fcport-&gt;rport;</div><div class='ctx'> 	fcport-&gt;drport = NULL;</div><div class='ctx'> 	spin_unlock_irqrestore(fcport-&gt;vha-&gt;host-&gt;host_lock, flags);</div><div class='del'>-	if (rport)</div><div class='add'>+	if (rport) {</div><div class='ctx'> 		fc_remote_port_delete(rport);</div><div class='add'>+		/*</div><div class='add'>+		 * Release the target mode FC NEXUS in qla_target.c code</div><div class='add'>+		 * if target mod is enabled.</div><div class='add'>+		 */</div><div class='add'>+		qlt_fc_port_deleted(vha, fcport);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2495,11 +2527,11 @@ qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)</div><div class='ctx'> </div><div class='ctx'> 	/* Setup fcport template structure. */</div><div class='ctx'> 	fcport-&gt;vha = vha;</div><div class='del'>-	fcport-&gt;vp_idx = vha-&gt;vp_idx;</div><div class='ctx'> 	fcport-&gt;port_type = FCT_UNKNOWN;</div><div class='ctx'> 	fcport-&gt;loop_id = FC_NO_LOOP_ID;</div><div class='ctx'> 	qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);</div><div class='ctx'> 	fcport-&gt;supported_classes = FC_COS_UNSPECIFIED;</div><div class='add'>+	fcport-&gt;scan_state = QLA_FCPORT_SCAN_NONE;</div><div class='ctx'> </div><div class='ctx'> 	return fcport;</div><div class='ctx'> }</div><div class='hunk'>@@ -2726,7 +2758,6 @@ qla2x00_configure_local_loop(scsi_qla_host_t *vha)</div><div class='ctx'> 		new_fcport-&gt;d_id.b.area = area;</div><div class='ctx'> 		new_fcport-&gt;d_id.b.al_pa = al_pa;</div><div class='ctx'> 		new_fcport-&gt;loop_id = loop_id;</div><div class='del'>-		new_fcport-&gt;vp_idx = vha-&gt;vp_idx;</div><div class='ctx'> 		rval2 = qla2x00_get_port_database(vha, new_fcport, 0);</div><div class='ctx'> 		if (rval2 != QLA_SUCCESS) {</div><div class='ctx'> 			ql_dbg(ql_dbg_disc, vha, 0x201a,</div><div class='hunk'>@@ -2760,10 +2791,6 @@ qla2x00_configure_local_loop(scsi_qla_host_t *vha)</div><div class='ctx'> </div><div class='ctx'> 		if (!found) {</div><div class='ctx'> 			/* New device, add to fcports list. */</div><div class='del'>-			if (vha-&gt;vp_idx) {</div><div class='del'>-				new_fcport-&gt;vha = vha;</div><div class='del'>-				new_fcport-&gt;vp_idx = vha-&gt;vp_idx;</div><div class='del'>-			}</div><div class='ctx'> 			list_add_tail(&amp;new_fcport-&gt;list, &amp;vha-&gt;vp_fcports);</div><div class='ctx'> </div><div class='ctx'> 			/* Allocate a new replacement fcport. */</div><div class='hunk'>@@ -2800,8 +2827,6 @@ cleanup_allocation:</div><div class='ctx'> static void</div><div class='ctx'> qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)</div><div class='ctx'> {</div><div class='del'>-#define LS_UNKNOWN      2</div><div class='del'>-	static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };</div><div class='ctx'> 	char *link_speed;</div><div class='ctx'> 	int rval;</div><div class='ctx'> 	uint16_t mb[4];</div><div class='hunk'>@@ -2829,11 +2854,7 @@ qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)</div><div class='ctx'> 		    fcport-&gt;port_name[6], fcport-&gt;port_name[7], rval,</div><div class='ctx'> 		    fcport-&gt;fp_speed, mb[0], mb[1]);</div><div class='ctx'> 	} else {</div><div class='del'>-		link_speed = link_speeds[LS_UNKNOWN];</div><div class='del'>-		if (fcport-&gt;fp_speed &lt; 5)</div><div class='del'>-			link_speed = link_speeds[fcport-&gt;fp_speed];</div><div class='del'>-		else if (fcport-&gt;fp_speed == 0x13)</div><div class='del'>-			link_speed = link_speeds[5];</div><div class='add'>+		link_speed = qla2x00_get_link_speed_str(ha);</div><div class='ctx'> 		ql_dbg(ql_dbg_disc, vha, 0x2005,</div><div class='ctx'> 		    "iIDMA adjusted to %s GB/s "</div><div class='ctx'> 		    "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed,</div><div class='hunk'>@@ -2864,6 +2885,12 @@ qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)</div><div class='ctx'> 		    "Unable to allocate fc remote port.\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+	/*</div><div class='add'>+	 * Create target mode FC NEXUS in qla_target.c if target mode is</div><div class='add'>+	 * enabled..</div><div class='add'>+	 */</div><div class='add'>+	qlt_fc_port_added(vha, fcport);</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(fcport-&gt;vha-&gt;host-&gt;host_lock, flags);</div><div class='ctx'> 	*((fc_port_t **)rport-&gt;dd_data) = fcport;</div><div class='ctx'> 	spin_unlock_irqrestore(fcport-&gt;vha-&gt;host-&gt;host_lock, flags);</div><div class='hunk'>@@ -2921,7 +2948,7 @@ static int</div><div class='ctx'> qla2x00_configure_fabric(scsi_qla_host_t *vha)</div><div class='ctx'> {</div><div class='ctx'> 	int	rval;</div><div class='del'>-	fc_port_t	*fcport, *fcptemp;</div><div class='add'>+	fc_port_t	*fcport;</div><div class='ctx'> 	uint16_t	next_loopid;</div><div class='ctx'> 	uint16_t	mb[MAILBOX_REGISTER_COUNT];</div><div class='ctx'> 	uint16_t	loop_id;</div><div class='hunk'>@@ -2959,7 +2986,7 @@ qla2x00_configure_fabric(scsi_qla_host_t *vha)</div><div class='ctx'> 		    0xfc, mb, BIT_1|BIT_0);</div><div class='ctx'> 		if (rval != QLA_SUCCESS) {</div><div class='ctx'> 			set_bit(LOOP_RESYNC_NEEDED, &amp;vha-&gt;dpc_flags);</div><div class='del'>-			return rval;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (mb[0] != MBS_COMMAND_COMPLETE) {</div><div class='ctx'> 			ql_dbg(ql_dbg_disc, vha, 0x2042,</div><div class='hunk'>@@ -2991,21 +3018,16 @@ qla2x00_configure_fabric(scsi_qla_host_t *vha)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-#define QLA_FCPORT_SCAN		1</div><div class='del'>-#define QLA_FCPORT_FOUND	2</div><div class='del'>-</div><div class='del'>-		list_for_each_entry(fcport, &amp;vha-&gt;vp_fcports, list) {</div><div class='del'>-			fcport-&gt;scan_state = QLA_FCPORT_SCAN;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		rval = qla2x00_find_all_fabric_devs(vha, &amp;new_fcports);</div><div class='ctx'> 		if (rval != QLA_SUCCESS)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Logout all previous fabric devices marked lost, except</div><div class='del'>-		 * FCP2 devices.</div><div class='del'>-		 */</div><div class='add'>+		/* Add new ports to existing port list */</div><div class='add'>+		list_splice_tail_init(&amp;new_fcports, &amp;vha-&gt;vp_fcports);</div><div class='add'>+</div><div class='add'>+		/* Starting free loop ID. */</div><div class='add'>+		next_loopid = ha-&gt;min_external_loopid;</div><div class='add'>+</div><div class='ctx'> 		list_for_each_entry(fcport, &amp;vha-&gt;vp_fcports, list) {</div><div class='ctx'> 			if (test_bit(LOOP_RESYNC_NEEDED, &amp;vha-&gt;dpc_flags))</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -3013,7 +3035,8 @@ qla2x00_configure_fabric(scsi_qla_host_t *vha)</div><div class='ctx'> 			if ((fcport-&gt;flags &amp; FCF_FABRIC_DEVICE) == 0)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			if (fcport-&gt;scan_state == QLA_FCPORT_SCAN &amp;&amp;</div><div class='add'>+			/* Logout lost/gone fabric devices (non-FCP2) */</div><div class='add'>+			if (fcport-&gt;scan_state != QLA_FCPORT_SCAN_FOUND &amp;&amp;</div><div class='ctx'> 			    atomic_read(&amp;fcport-&gt;state) == FCS_ONLINE) {</div><div class='ctx'> 				qla2x00_mark_device_lost(vha, fcport,</div><div class='ctx'> 				    ql2xplogiabsentdevice, 0);</div><div class='hunk'>@@ -3026,78 +3049,30 @@ qla2x00_configure_fabric(scsi_qla_host_t *vha)</div><div class='ctx'> 					    fcport-&gt;d_id.b.domain,</div><div class='ctx'> 					    fcport-&gt;d_id.b.area,</div><div class='ctx'> 					    fcport-&gt;d_id.b.al_pa);</div><div class='del'>-					fcport-&gt;loop_id = FC_NO_LOOP_ID;</div><div class='ctx'> 				}</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Starting free loop ID. */</div><div class='del'>-		next_loopid = ha-&gt;min_external_loopid;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Scan through our port list and login entries that need to be</div><div class='del'>-		 * logged in.</div><div class='del'>-		 */</div><div class='del'>-		list_for_each_entry(fcport, &amp;vha-&gt;vp_fcports, list) {</div><div class='del'>-			if (atomic_read(&amp;vha-&gt;loop_down_timer) ||</div><div class='del'>-			    test_bit(LOOP_RESYNC_NEEDED, &amp;vha-&gt;dpc_flags))</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			if ((fcport-&gt;flags &amp; FCF_FABRIC_DEVICE) == 0 ||</div><div class='del'>-			    (fcport-&gt;flags &amp; FCF_LOGIN_NEEDED) == 0)</div><div class='ctx'> 				continue;</div><div class='del'>-</div><div class='del'>-			if (fcport-&gt;loop_id == FC_NO_LOOP_ID) {</div><div class='del'>-				fcport-&gt;loop_id = next_loopid;</div><div class='del'>-				rval = qla2x00_find_new_loop_id(</div><div class='del'>-				    base_vha, fcport);</div><div class='del'>-				if (rval != QLA_SUCCESS) {</div><div class='del'>-					/* Ran out of IDs to use */</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='ctx'> 			}</div><div class='del'>-			/* Login and update database */</div><div class='del'>-			qla2x00_fabric_dev_login(vha, fcport, &amp;next_loopid);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Exit if out of loop IDs. */</div><div class='del'>-		if (rval != QLA_SUCCESS) {</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Login and add the new devices to our port list.</div><div class='del'>-		 */</div><div class='del'>-		list_for_each_entry_safe(fcport, fcptemp, &amp;new_fcports, list) {</div><div class='del'>-			if (atomic_read(&amp;vha-&gt;loop_down_timer) ||</div><div class='del'>-			    test_bit(LOOP_RESYNC_NEEDED, &amp;vha-&gt;dpc_flags))</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			/* Find a new loop ID to use. */</div><div class='del'>-			fcport-&gt;loop_id = next_loopid;</div><div class='del'>-			rval = qla2x00_find_new_loop_id(base_vha, fcport);</div><div class='del'>-			if (rval != QLA_SUCCESS) {</div><div class='del'>-				/* Ran out of IDs to use */</div><div class='del'>-				break;</div><div class='add'>+			fcport-&gt;scan_state = QLA_FCPORT_SCAN_NONE;</div><div class='add'>+</div><div class='add'>+			/* Login fabric devices that need a login */</div><div class='add'>+			if ((fcport-&gt;flags &amp; FCF_LOGIN_NEEDED) != 0 &amp;&amp;</div><div class='add'>+			    atomic_read(&amp;vha-&gt;loop_down_timer) == 0) {</div><div class='add'>+				if (fcport-&gt;loop_id == FC_NO_LOOP_ID) {</div><div class='add'>+					fcport-&gt;loop_id = next_loopid;</div><div class='add'>+					rval = qla2x00_find_new_loop_id(</div><div class='add'>+					    base_vha, fcport);</div><div class='add'>+					if (rval != QLA_SUCCESS) {</div><div class='add'>+						/* Ran out of IDs to use */</div><div class='add'>+						continue;</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* Login and update database */</div><div class='ctx'> 			qla2x00_fabric_dev_login(vha, fcport, &amp;next_loopid);</div><div class='del'>-</div><div class='del'>-			if (vha-&gt;vp_idx) {</div><div class='del'>-				fcport-&gt;vha = vha;</div><div class='del'>-				fcport-&gt;vp_idx = vha-&gt;vp_idx;</div><div class='del'>-			}</div><div class='del'>-			list_move_tail(&amp;fcport-&gt;list, &amp;vha-&gt;vp_fcports);</div><div class='ctx'> 		}</div><div class='ctx'> 	} while (0);</div><div class='ctx'> </div><div class='del'>-	/* Free all new device structures not processed. */</div><div class='del'>-	list_for_each_entry_safe(fcport, fcptemp, &amp;new_fcports, list) {</div><div class='del'>-		list_del(&amp;fcport-&gt;list);</div><div class='del'>-		kfree(fcport);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (rval) {</div><div class='ctx'> 		ql_dbg(ql_dbg_disc, vha, 0x2068,</div><div class='ctx'> 		    "Configure fabric error exit rval=%d.\n", rval);</div><div class='hunk'>@@ -3287,7 +3262,7 @@ qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,</div><div class='ctx'> 			    WWN_SIZE))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			fcport-&gt;scan_state = QLA_FCPORT_FOUND;</div><div class='add'>+			fcport-&gt;scan_state = QLA_FCPORT_SCAN_FOUND;</div><div class='ctx'> </div><div class='ctx'> 			found++;</div><div class='ctx'> </div><div class='hunk'>@@ -3595,6 +3570,12 @@ qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,</div><div class='ctx'> 			if (mb[10] &amp; BIT_1)</div><div class='ctx'> 				fcport-&gt;supported_classes |= FC_COS_CLASS3;</div><div class='ctx'> </div><div class='add'>+			if (IS_FWI2_CAPABLE(ha)) {</div><div class='add'>+				if (mb[10] &amp; BIT_7)</div><div class='add'>+					fcport-&gt;flags |=</div><div class='add'>+					    FCF_CONF_COMP_SUPPORTED;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			rval = QLA_SUCCESS;</div><div class='ctx'> 			break;</div><div class='ctx'> 		} else if (mb[0] == MBS_LOOP_ID_USED) {</div><div class='hunk'>@@ -3841,7 +3822,7 @@ qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)</div><div class='ctx'> 		vha-&gt;flags.online = 0;</div><div class='ctx'> 	ha-&gt;flags.chip_reset_done = 0;</div><div class='ctx'> 	clear_bit(ISP_ABORT_NEEDED, &amp;vha-&gt;dpc_flags);</div><div class='del'>-	ha-&gt;qla_stats.total_isp_aborts++;</div><div class='add'>+	vha-&gt;qla_stats.total_isp_aborts++;</div><div class='ctx'> </div><div class='ctx'> 	ql_log(ql_log_info, vha, 0x00af,</div><div class='ctx'> 	    "Performing ISP error recovery - ha=%p.\n", ha);</div><div class='hunk'>@@ -4066,6 +4047,7 @@ qla2x00_restart_isp(scsi_qla_host_t *vha)</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> 	struct req_que *req = ha-&gt;req_q_map[0];</div><div class='ctx'> 	struct rsp_que *rsp = ha-&gt;rsp_q_map[0];</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	/* If firmware needs to be loaded */</div><div class='ctx'> 	if (qla2x00_isp_firmware(vha)) {</div><div class='hunk'>@@ -4090,6 +4072,16 @@ qla2x00_restart_isp(scsi_qla_host_t *vha)</div><div class='ctx'> 			qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);</div><div class='ctx'> </div><div class='ctx'> 			vha-&gt;flags.online = 1;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Process any ATIO queue entries that came in</div><div class='add'>+			 * while we weren't online.</div><div class='add'>+			 */</div><div class='add'>+			spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+			if (qla_tgt_mode_enabled(vha))</div><div class='add'>+				qlt_24xx_process_atio_queue(vha);</div><div class='add'>+			spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='ctx'> 			/* Wait at most MAX_TARGET RSCNs for a stable link. */</div><div class='ctx'> 			wait_time = 256;</div><div class='ctx'> 			do {</div><div class='hunk'>@@ -4279,7 +4271,7 @@ qla24xx_nvram_config(scsi_qla_host_t *vha)</div><div class='ctx'> 	    nv-&gt;nvram_version &lt; __constant_cpu_to_le16(ICB_VERSION)) {</div><div class='ctx'> 		/* Reset NVRAM data. */</div><div class='ctx'> 		ql_log(ql_log_warn, vha, 0x006b,</div><div class='del'>-		    "Inconisistent NVRAM detected: checksum=0x%x id=%c "</div><div class='add'>+		    "Inconsistent NVRAM detected: checksum=0x%x id=%c "</div><div class='ctx'> 		    "version=0x%x.\n", chksum, nv-&gt;id[0], nv-&gt;nvram_version);</div><div class='ctx'> 		ql_log(ql_log_warn, vha, 0x006c,</div><div class='ctx'> 		    "Falling back to functioning (yet invalid -- WWPN) "</div><div class='hunk'>@@ -4330,6 +4322,15 @@ qla24xx_nvram_config(scsi_qla_host_t *vha)</div><div class='ctx'> 		rval = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!qla_ini_mode_enabled(vha)) {</div><div class='add'>+		/* Don't enable full login after initial LIP */</div><div class='add'>+		nv-&gt;firmware_options_1 &amp;= __constant_cpu_to_le32(~BIT_13);</div><div class='add'>+		/* Don't enable LIP full login for initiator */</div><div class='add'>+		nv-&gt;host_p &amp;= __constant_cpu_to_le32(~BIT_10);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qlt_24xx_config_nvram_stage1(vha, nv);</div><div class='add'>+</div><div class='ctx'> 	/* Reset Initialization control block */</div><div class='ctx'> 	memset(icb, 0, ha-&gt;init_cb_size);</div><div class='ctx'> </div><div class='hunk'>@@ -4357,8 +4358,10 @@ qla24xx_nvram_config(scsi_qla_host_t *vha)</div><div class='ctx'> 	qla2x00_set_model_info(vha, nv-&gt;model_name, sizeof(nv-&gt;model_name),</div><div class='ctx'> 	    "QLA2462");</div><div class='ctx'> </div><div class='del'>-	/* Use alternate WWN? */</div><div class='add'>+	qlt_24xx_config_nvram_stage2(vha, icb);</div><div class='add'>+</div><div class='ctx'> 	if (nv-&gt;host_p &amp; __constant_cpu_to_le32(BIT_15)) {</div><div class='add'>+		/* Use alternate WWN? */</div><div class='ctx'> 		memcpy(icb-&gt;node_name, nv-&gt;alternate_node_name, WWN_SIZE);</div><div class='ctx'> 		memcpy(icb-&gt;port_name, nv-&gt;alternate_port_name, WWN_SIZE);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5029,7 +5032,7 @@ qla81xx_nvram_config(scsi_qla_host_t *vha)</div><div class='ctx'> 	    nv-&gt;nvram_version &lt; __constant_cpu_to_le16(ICB_VERSION)) {</div><div class='ctx'> 		/* Reset NVRAM data. */</div><div class='ctx'> 		ql_log(ql_log_info, vha, 0x0073,</div><div class='del'>-		    "Inconisistent NVRAM detected: checksum=0x%x id=%c "</div><div class='add'>+		    "Inconsistent NVRAM detected: checksum=0x%x id=%c "</div><div class='ctx'> 		    "version=0x%x.\n", chksum, nv-&gt;id[0],</div><div class='ctx'> 		    le16_to_cpu(nv-&gt;nvram_version));</div><div class='ctx'> 		ql_log(ql_log_info, vha, 0x0074,</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_iocb.c b/drivers/scsi/qla2xxx/qla_iocb.c<br/>index eac950924497..70dbf53d9e0f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_iocb.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_iocb.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_iocb.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_iocb.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  * See LICENSE.qla2xxx for copyright and licensing details.</div><div class='ctx'>  */</div><div class='ctx'> #include "qla_def.h"</div><div class='add'>+#include "qla_target.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/blkdev.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='hunk'>@@ -23,18 +24,17 @@ qla2x00_get_cmd_direction(srb_t *sp)</div><div class='ctx'> {</div><div class='ctx'> 	uint16_t cflags;</div><div class='ctx'> 	struct scsi_cmnd *cmd = GET_CMD_SP(sp);</div><div class='add'>+	struct scsi_qla_host *vha = sp-&gt;fcport-&gt;vha;</div><div class='ctx'> </div><div class='ctx'> 	cflags = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Set transfer direction */</div><div class='ctx'> 	if (cmd-&gt;sc_data_direction == DMA_TO_DEVICE) {</div><div class='ctx'> 		cflags = CF_WRITE;</div><div class='del'>-		sp-&gt;fcport-&gt;vha-&gt;hw-&gt;qla_stats.output_bytes +=</div><div class='del'>-		    scsi_bufflen(cmd);</div><div class='add'>+		vha-&gt;qla_stats.output_bytes += scsi_bufflen(cmd);</div><div class='ctx'> 	} else if (cmd-&gt;sc_data_direction == DMA_FROM_DEVICE) {</div><div class='ctx'> 		cflags = CF_READ;</div><div class='del'>-		sp-&gt;fcport-&gt;vha-&gt;hw-&gt;qla_stats.input_bytes +=</div><div class='del'>-		    scsi_bufflen(cmd);</div><div class='add'>+		vha-&gt;qla_stats.input_bytes += scsi_bufflen(cmd);</div><div class='ctx'> 	}</div><div class='ctx'> 	return (cflags);</div><div class='ctx'> }</div><div class='hunk'>@@ -385,9 +385,10 @@ qla2x00_start_scsi(srb_t *sp)</div><div class='ctx'> 		else</div><div class='ctx'> 			req-&gt;cnt = req-&gt;length -</div><div class='ctx'> 			    (req-&gt;ring_index - cnt);</div><div class='add'>+		/* If still no head room then bail out */</div><div class='add'>+		if (req-&gt;cnt &lt; (req_cnt + 2))</div><div class='add'>+			goto queuing_error;</div><div class='ctx'> 	}</div><div class='del'>-	if (req-&gt;cnt &lt; (req_cnt + 2))</div><div class='del'>-		goto queuing_error;</div><div class='ctx'> </div><div class='ctx'> 	/* Build command packet */</div><div class='ctx'> 	req-&gt;current_outstanding_cmd = handle;</div><div class='hunk'>@@ -470,7 +471,7 @@ queuing_error:</div><div class='ctx'> /**</div><div class='ctx'>  * qla2x00_start_iocbs() - Execute the IOCB command</div><div class='ctx'>  */</div><div class='del'>-static void</div><div class='add'>+void</div><div class='ctx'> qla2x00_start_iocbs(struct scsi_qla_host *vha, struct req_que *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='hunk'>@@ -571,6 +572,29 @@ qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,</div><div class='ctx'> 	return (ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * qla2x00_issue_marker</div><div class='add'>+ *</div><div class='add'>+ * Issue marker</div><div class='add'>+ * Caller CAN have hardware lock held as specified by ha_locked parameter.</div><div class='add'>+ * Might release it, then reaquire.</div><div class='add'>+ */</div><div class='add'>+int qla2x00_issue_marker(scsi_qla_host_t *vha, int ha_locked)</div><div class='add'>+{</div><div class='add'>+	if (ha_locked) {</div><div class='add'>+		if (__qla2x00_marker(vha, vha-&gt;req, vha-&gt;req-&gt;rsp, 0, 0,</div><div class='add'>+					MK_SYNC_ALL) != QLA_SUCCESS)</div><div class='add'>+			return QLA_FUNCTION_FAILED;</div><div class='add'>+	} else {</div><div class='add'>+		if (qla2x00_marker(vha, vha-&gt;req, vha-&gt;req-&gt;rsp, 0, 0,</div><div class='add'>+					MK_SYNC_ALL) != QLA_SUCCESS)</div><div class='add'>+			return QLA_FUNCTION_FAILED;</div><div class='add'>+	}</div><div class='add'>+	vha-&gt;marker_needed = 0;</div><div class='add'>+</div><div class='add'>+	return QLA_SUCCESS;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * qla24xx_calc_iocbs() - Determine number of Command Type 3 and</div><div class='ctx'>  * Continuation Type 1 IOCBs to allocate.</div><div class='hunk'>@@ -629,11 +653,11 @@ qla24xx_build_scsi_type_6_iocbs(srb_t *sp, struct cmd_type_6 *cmd_pkt,</div><div class='ctx'> 	if (cmd-&gt;sc_data_direction == DMA_TO_DEVICE) {</div><div class='ctx'> 		cmd_pkt-&gt;control_flags =</div><div class='ctx'> 		    __constant_cpu_to_le16(CF_WRITE_DATA);</div><div class='del'>-		ha-&gt;qla_stats.output_bytes += scsi_bufflen(cmd);</div><div class='add'>+		vha-&gt;qla_stats.output_bytes += scsi_bufflen(cmd);</div><div class='ctx'> 	} else if (cmd-&gt;sc_data_direction == DMA_FROM_DEVICE) {</div><div class='ctx'> 		cmd_pkt-&gt;control_flags =</div><div class='ctx'> 		    __constant_cpu_to_le16(CF_READ_DATA);</div><div class='del'>-		ha-&gt;qla_stats.input_bytes += scsi_bufflen(cmd);</div><div class='add'>+		vha-&gt;qla_stats.input_bytes += scsi_bufflen(cmd);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cur_seg = scsi_sglist(cmd);</div><div class='hunk'>@@ -745,13 +769,11 @@ qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,</div><div class='ctx'> 	if (cmd-&gt;sc_data_direction == DMA_TO_DEVICE) {</div><div class='ctx'> 		cmd_pkt-&gt;task_mgmt_flags =</div><div class='ctx'> 		    __constant_cpu_to_le16(TMF_WRITE_DATA);</div><div class='del'>-		sp-&gt;fcport-&gt;vha-&gt;hw-&gt;qla_stats.output_bytes +=</div><div class='del'>-		    scsi_bufflen(cmd);</div><div class='add'>+		vha-&gt;qla_stats.output_bytes += scsi_bufflen(cmd);</div><div class='ctx'> 	} else if (cmd-&gt;sc_data_direction == DMA_FROM_DEVICE) {</div><div class='ctx'> 		cmd_pkt-&gt;task_mgmt_flags =</div><div class='ctx'> 		    __constant_cpu_to_le16(TMF_READ_DATA);</div><div class='del'>-		sp-&gt;fcport-&gt;vha-&gt;hw-&gt;qla_stats.input_bytes +=</div><div class='del'>-		    scsi_bufflen(cmd);</div><div class='add'>+		vha-&gt;qla_stats.input_bytes += scsi_bufflen(cmd);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* One DSD is available in the Command Type 3 IOCB */</div><div class='hunk'>@@ -1245,7 +1267,7 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,</div><div class='ctx'> 		return QLA_SUCCESS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cmd_pkt-&gt;vp_index = sp-&gt;fcport-&gt;vp_idx;</div><div class='add'>+	cmd_pkt-&gt;vp_index = sp-&gt;fcport-&gt;vha-&gt;vp_idx;</div><div class='ctx'> </div><div class='ctx'> 	/* Set transfer direction */</div><div class='ctx'> 	if (cmd-&gt;sc_data_direction == DMA_TO_DEVICE) {</div><div class='hunk'>@@ -1502,9 +1524,9 @@ qla24xx_start_scsi(srb_t *sp)</div><div class='ctx'> 		else</div><div class='ctx'> 			req-&gt;cnt = req-&gt;length -</div><div class='ctx'> 				(req-&gt;ring_index - cnt);</div><div class='add'>+		if (req-&gt;cnt &lt; (req_cnt + 2))</div><div class='add'>+			goto queuing_error;</div><div class='ctx'> 	}</div><div class='del'>-	if (req-&gt;cnt &lt; (req_cnt + 2))</div><div class='del'>-		goto queuing_error;</div><div class='ctx'> </div><div class='ctx'> 	/* Build command packet. */</div><div class='ctx'> 	req-&gt;current_outstanding_cmd = handle;</div><div class='hunk'>@@ -1527,7 +1549,7 @@ qla24xx_start_scsi(srb_t *sp)</div><div class='ctx'> 	cmd_pkt-&gt;port_id[0] = sp-&gt;fcport-&gt;d_id.b.al_pa;</div><div class='ctx'> 	cmd_pkt-&gt;port_id[1] = sp-&gt;fcport-&gt;d_id.b.area;</div><div class='ctx'> 	cmd_pkt-&gt;port_id[2] = sp-&gt;fcport-&gt;d_id.b.domain;</div><div class='del'>-	cmd_pkt-&gt;vp_index = sp-&gt;fcport-&gt;vp_idx;</div><div class='add'>+	cmd_pkt-&gt;vp_index = sp-&gt;fcport-&gt;vha-&gt;vp_idx;</div><div class='ctx'> </div><div class='ctx'> 	int_to_scsilun(cmd-&gt;device-&gt;lun, &amp;cmd_pkt-&gt;lun);</div><div class='ctx'> 	host_to_fcp_swap((uint8_t *)&amp;cmd_pkt-&gt;lun, sizeof(cmd_pkt-&gt;lun));</div><div class='hunk'>@@ -1717,11 +1739,10 @@ qla24xx_dif_start_scsi(srb_t *sp)</div><div class='ctx'> 		else</div><div class='ctx'> 			req-&gt;cnt = req-&gt;length -</div><div class='ctx'> 				(req-&gt;ring_index - cnt);</div><div class='add'>+		if (req-&gt;cnt &lt; (req_cnt + 2))</div><div class='add'>+			goto queuing_error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (req-&gt;cnt &lt; (req_cnt + 2))</div><div class='del'>-		goto queuing_error;</div><div class='del'>-</div><div class='ctx'> 	status |= QDSS_GOT_Q_SPACE;</div><div class='ctx'> </div><div class='ctx'> 	/* Build header part of command packet (excluding the OPCODE). */</div><div class='hunk'>@@ -1898,7 +1919,7 @@ qla24xx_login_iocb(srb_t *sp, struct logio_entry_24xx *logio)</div><div class='ctx'> 	logio-&gt;port_id[0] = sp-&gt;fcport-&gt;d_id.b.al_pa;</div><div class='ctx'> 	logio-&gt;port_id[1] = sp-&gt;fcport-&gt;d_id.b.area;</div><div class='ctx'> 	logio-&gt;port_id[2] = sp-&gt;fcport-&gt;d_id.b.domain;</div><div class='del'>-	logio-&gt;vp_index = sp-&gt;fcport-&gt;vp_idx;</div><div class='add'>+	logio-&gt;vp_index = sp-&gt;fcport-&gt;vha-&gt;vp_idx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1922,7 +1943,7 @@ qla2x00_login_iocb(srb_t *sp, struct mbx_entry *mbx)</div><div class='ctx'> 	mbx-&gt;mb2 = cpu_to_le16(sp-&gt;fcport-&gt;d_id.b.domain);</div><div class='ctx'> 	mbx-&gt;mb3 = cpu_to_le16(sp-&gt;fcport-&gt;d_id.b.area &lt;&lt; 8 |</div><div class='ctx'> 	    sp-&gt;fcport-&gt;d_id.b.al_pa);</div><div class='del'>-	mbx-&gt;mb9 = cpu_to_le16(sp-&gt;fcport-&gt;vp_idx);</div><div class='add'>+	mbx-&gt;mb9 = cpu_to_le16(sp-&gt;fcport-&gt;vha-&gt;vp_idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1935,7 +1956,7 @@ qla24xx_logout_iocb(srb_t *sp, struct logio_entry_24xx *logio)</div><div class='ctx'> 	logio-&gt;port_id[0] = sp-&gt;fcport-&gt;d_id.b.al_pa;</div><div class='ctx'> 	logio-&gt;port_id[1] = sp-&gt;fcport-&gt;d_id.b.area;</div><div class='ctx'> 	logio-&gt;port_id[2] = sp-&gt;fcport-&gt;d_id.b.domain;</div><div class='del'>-	logio-&gt;vp_index = sp-&gt;fcport-&gt;vp_idx;</div><div class='add'>+	logio-&gt;vp_index = sp-&gt;fcport-&gt;vha-&gt;vp_idx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1952,7 +1973,7 @@ qla2x00_logout_iocb(srb_t *sp, struct mbx_entry *mbx)</div><div class='ctx'> 	mbx-&gt;mb2 = cpu_to_le16(sp-&gt;fcport-&gt;d_id.b.domain);</div><div class='ctx'> 	mbx-&gt;mb3 = cpu_to_le16(sp-&gt;fcport-&gt;d_id.b.area &lt;&lt; 8 |</div><div class='ctx'> 	    sp-&gt;fcport-&gt;d_id.b.al_pa);</div><div class='del'>-	mbx-&gt;mb9 = cpu_to_le16(sp-&gt;fcport-&gt;vp_idx);</div><div class='add'>+	mbx-&gt;mb9 = cpu_to_le16(sp-&gt;fcport-&gt;vha-&gt;vp_idx);</div><div class='ctx'> 	/* Implicit: mbx-&gt;mbx10 = 0. */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1962,7 +1983,7 @@ qla24xx_adisc_iocb(srb_t *sp, struct logio_entry_24xx *logio)</div><div class='ctx'> 	logio-&gt;entry_type = LOGINOUT_PORT_IOCB_TYPE;</div><div class='ctx'> 	logio-&gt;control_flags = cpu_to_le16(LCF_COMMAND_ADISC);</div><div class='ctx'> 	logio-&gt;nport_handle = cpu_to_le16(sp-&gt;fcport-&gt;loop_id);</div><div class='del'>-	logio-&gt;vp_index = sp-&gt;fcport-&gt;vp_idx;</div><div class='add'>+	logio-&gt;vp_index = sp-&gt;fcport-&gt;vha-&gt;vp_idx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1983,7 +2004,7 @@ qla2x00_adisc_iocb(srb_t *sp, struct mbx_entry *mbx)</div><div class='ctx'> 	mbx-&gt;mb3 = cpu_to_le16(LSW(ha-&gt;async_pd_dma));</div><div class='ctx'> 	mbx-&gt;mb6 = cpu_to_le16(MSW(MSD(ha-&gt;async_pd_dma)));</div><div class='ctx'> 	mbx-&gt;mb7 = cpu_to_le16(LSW(MSD(ha-&gt;async_pd_dma)));</div><div class='del'>-	mbx-&gt;mb9 = cpu_to_le16(sp-&gt;fcport-&gt;vp_idx);</div><div class='add'>+	mbx-&gt;mb9 = cpu_to_le16(sp-&gt;fcport-&gt;vha-&gt;vp_idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -2009,7 +2030,7 @@ qla24xx_tm_iocb(srb_t *sp, struct tsk_mgmt_entry *tsk)</div><div class='ctx'> 	tsk-&gt;port_id[0] = fcport-&gt;d_id.b.al_pa;</div><div class='ctx'> 	tsk-&gt;port_id[1] = fcport-&gt;d_id.b.area;</div><div class='ctx'> 	tsk-&gt;port_id[2] = fcport-&gt;d_id.b.domain;</div><div class='del'>-	tsk-&gt;vp_index = fcport-&gt;vp_idx;</div><div class='add'>+	tsk-&gt;vp_index = fcport-&gt;vha-&gt;vp_idx;</div><div class='ctx'> </div><div class='ctx'> 	if (flags == TCF_LUN_RESET) {</div><div class='ctx'> 		int_to_scsilun(lun, &amp;tsk-&gt;lun);</div><div class='hunk'>@@ -2030,7 +2051,7 @@ qla24xx_els_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)</div><div class='ctx'>         els_iocb-&gt;handle = sp-&gt;handle;</div><div class='ctx'>         els_iocb-&gt;nport_handle = cpu_to_le16(sp-&gt;fcport-&gt;loop_id);</div><div class='ctx'>         els_iocb-&gt;tx_dsd_count = __constant_cpu_to_le16(bsg_job-&gt;request_payload.sg_cnt);</div><div class='del'>-        els_iocb-&gt;vp_index = sp-&gt;fcport-&gt;vp_idx;</div><div class='add'>+	els_iocb-&gt;vp_index = sp-&gt;fcport-&gt;vha-&gt;vp_idx;</div><div class='ctx'>         els_iocb-&gt;sof_type = EST_SOFI3;</div><div class='ctx'>         els_iocb-&gt;rx_dsd_count = __constant_cpu_to_le16(bsg_job-&gt;reply_payload.sg_cnt);</div><div class='ctx'> </div><div class='hunk'>@@ -2160,7 +2181,7 @@ qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)</div><div class='ctx'>         ct_iocb-&gt;handle = sp-&gt;handle;</div><div class='ctx'> </div><div class='ctx'> 	ct_iocb-&gt;nport_handle = cpu_to_le16(sp-&gt;fcport-&gt;loop_id);</div><div class='del'>-	ct_iocb-&gt;vp_index = sp-&gt;fcport-&gt;vp_idx;</div><div class='add'>+	ct_iocb-&gt;vp_index = sp-&gt;fcport-&gt;vha-&gt;vp_idx;</div><div class='ctx'>         ct_iocb-&gt;comp_status = __constant_cpu_to_le16(0);</div><div class='ctx'> </div><div class='ctx'> 	ct_iocb-&gt;cmd_dsd_count =</div><div class='hunk'>@@ -2343,11 +2364,10 @@ sufficient_dsds:</div><div class='ctx'> 			else</div><div class='ctx'> 				req-&gt;cnt = req-&gt;length -</div><div class='ctx'> 					(req-&gt;ring_index - cnt);</div><div class='add'>+			if (req-&gt;cnt &lt; (req_cnt + 2))</div><div class='add'>+				goto queuing_error;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (req-&gt;cnt &lt; (req_cnt + 2))</div><div class='del'>-			goto queuing_error;</div><div class='del'>-</div><div class='ctx'> 		ctx = sp-&gt;u.scmd.ctx =</div><div class='ctx'> 		    mempool_alloc(ha-&gt;ctx_mempool, GFP_ATOMIC);</div><div class='ctx'> 		if (!ctx) {</div><div class='hunk'>@@ -2362,7 +2382,7 @@ sufficient_dsds:</div><div class='ctx'> 		if (!ctx-&gt;fcp_cmnd) {</div><div class='ctx'> 			ql_log(ql_log_fatal, vha, 0x3011,</div><div class='ctx'> 			    "Failed to allocate fcp_cmnd for cmd=%p.\n", cmd);</div><div class='del'>-			goto queuing_error_fcp_cmnd;</div><div class='add'>+			goto queuing_error;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Initialize the DSD list and dma handle */</div><div class='hunk'>@@ -2400,7 +2420,7 @@ sufficient_dsds:</div><div class='ctx'> 		cmd_pkt-&gt;port_id[0] = sp-&gt;fcport-&gt;d_id.b.al_pa;</div><div class='ctx'> 		cmd_pkt-&gt;port_id[1] = sp-&gt;fcport-&gt;d_id.b.area;</div><div class='ctx'> 		cmd_pkt-&gt;port_id[2] = sp-&gt;fcport-&gt;d_id.b.domain;</div><div class='del'>-		cmd_pkt-&gt;vp_index = sp-&gt;fcport-&gt;vp_idx;</div><div class='add'>+		cmd_pkt-&gt;vp_index = sp-&gt;fcport-&gt;vha-&gt;vp_idx;</div><div class='ctx'> </div><div class='ctx'> 		/* Build IOCB segments */</div><div class='ctx'> 		if (qla24xx_build_scsi_type_6_iocbs(sp, cmd_pkt, tot_dsds))</div><div class='hunk'>@@ -2489,7 +2509,7 @@ sufficient_dsds:</div><div class='ctx'> 		cmd_pkt-&gt;port_id[0] = sp-&gt;fcport-&gt;d_id.b.al_pa;</div><div class='ctx'> 		cmd_pkt-&gt;port_id[1] = sp-&gt;fcport-&gt;d_id.b.area;</div><div class='ctx'> 		cmd_pkt-&gt;port_id[2] = sp-&gt;fcport-&gt;d_id.b.domain;</div><div class='del'>-		cmd_pkt-&gt;vp_index = sp-&gt;fcport-&gt;vp_idx;</div><div class='add'>+		cmd_pkt-&gt;vp_index = sp-&gt;fcport-&gt;vha-&gt;vp_idx;</div><div class='ctx'> </div><div class='ctx'> 		int_to_scsilun(cmd-&gt;device-&gt;lun, &amp;cmd_pkt-&gt;lun);</div><div class='ctx'> 		host_to_fcp_swap((uint8_t *)&amp;cmd_pkt-&gt;lun,</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c<br/>index f79844ce7122..6f67a9d4998b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_isr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_isr.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_isr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_isr.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  * See LICENSE.qla2xxx for copyright and licensing details.</div><div class='ctx'>  */</div><div class='ctx'> #include "qla_def.h"</div><div class='add'>+#include "qla_target.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -309,6 +310,28 @@ qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)</div><div class='ctx'> 		    "IDC failed to post ACK.\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define LS_UNKNOWN	2</div><div class='add'>+char *</div><div class='add'>+qla2x00_get_link_speed_str(struct qla_hw_data *ha)</div><div class='add'>+{</div><div class='add'>+	static char *link_speeds[] = {"1", "2", "?", "4", "8", "16", "10"};</div><div class='add'>+	char *link_speed;</div><div class='add'>+	int fw_speed = ha-&gt;link_data_rate;</div><div class='add'>+</div><div class='add'>+	if (IS_QLA2100(ha) || IS_QLA2200(ha))</div><div class='add'>+		link_speed = link_speeds[0];</div><div class='add'>+	else if (fw_speed == 0x13)</div><div class='add'>+		link_speed = link_speeds[6];</div><div class='add'>+	else {</div><div class='add'>+		link_speed = link_speeds[LS_UNKNOWN];</div><div class='add'>+		if (fw_speed &lt; 6)</div><div class='add'>+			link_speed =</div><div class='add'>+			    link_speeds[fw_speed];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return link_speed;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * qla2x00_async_event() - Process aynchronous events.</div><div class='ctx'>  * @ha: SCSI driver HA context</div><div class='hunk'>@@ -317,9 +340,6 @@ qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)</div><div class='ctx'> void</div><div class='ctx'> qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)</div><div class='ctx'> {</div><div class='del'>-#define LS_UNKNOWN	2</div><div class='del'>-	static char *link_speeds[] = { "1", "2", "?", "4", "8", "16", "10" };</div><div class='del'>-	char		*link_speed;</div><div class='ctx'> 	uint16_t	handle_cnt;</div><div class='ctx'> 	uint16_t	cnt, mbx;</div><div class='ctx'> 	uint32_t	handles[5];</div><div class='hunk'>@@ -454,8 +474,8 @@ skip_rio:</div><div class='ctx'> 	case MBA_WAKEUP_THRES:		/* Request Queue Wake-up */</div><div class='ctx'> 		ql_dbg(ql_dbg_async, vha, 0x5008,</div><div class='ctx'> 		    "Asynchronous WAKEUP_THRES.\n");</div><div class='del'>-		break;</div><div class='ctx'> </div><div class='add'>+		break;</div><div class='ctx'> 	case MBA_LIP_OCCURRED:		/* Loop Initialization Procedure */</div><div class='ctx'> 		ql_dbg(ql_dbg_async, vha, 0x5009,</div><div class='ctx'> 		    "LIP occurred (%x).\n", mb[1]);</div><div class='hunk'>@@ -479,20 +499,14 @@ skip_rio:</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case MBA_LOOP_UP:		/* Loop Up Event */</div><div class='del'>-		if (IS_QLA2100(ha) || IS_QLA2200(ha)) {</div><div class='del'>-			link_speed = link_speeds[0];</div><div class='add'>+		if (IS_QLA2100(ha) || IS_QLA2200(ha))</div><div class='ctx'> 			ha-&gt;link_data_rate = PORT_SPEED_1GB;</div><div class='del'>-		} else {</div><div class='del'>-			link_speed = link_speeds[LS_UNKNOWN];</div><div class='del'>-			if (mb[1] &lt; 6)</div><div class='del'>-				link_speed = link_speeds[mb[1]];</div><div class='del'>-			else if (mb[1] == 0x13)</div><div class='del'>-				link_speed = link_speeds[6];</div><div class='add'>+		else</div><div class='ctx'> 			ha-&gt;link_data_rate = mb[1];</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		ql_dbg(ql_dbg_async, vha, 0x500a,</div><div class='del'>-		    "LOOP UP detected (%s Gbps).\n", link_speed);</div><div class='add'>+		    "LOOP UP detected (%s Gbps).\n",</div><div class='add'>+		    qla2x00_get_link_speed_str(ha));</div><div class='ctx'> </div><div class='ctx'> 		vha-&gt;flags.management_server_logged_in = 0;</div><div class='ctx'> 		qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha-&gt;link_data_rate);</div><div class='hunk'>@@ -638,6 +652,8 @@ skip_rio:</div><div class='ctx'> 			ql_dbg(ql_dbg_async, vha, 0x5010,</div><div class='ctx'> 			    "Port unavailable %04x %04x %04x.\n",</div><div class='ctx'> 			    mb[1], mb[2], mb[3]);</div><div class='add'>+			ql_log(ql_log_warn, vha, 0x505e,</div><div class='add'>+			    "Link is offline.\n");</div><div class='ctx'> </div><div class='ctx'> 			if (atomic_read(&amp;vha-&gt;loop_state) != LOOP_DOWN) {</div><div class='ctx'> 				atomic_set(&amp;vha-&gt;loop_state, LOOP_DOWN);</div><div class='hunk'>@@ -670,12 +686,17 @@ skip_rio:</div><div class='ctx'> 			ql_dbg(ql_dbg_async, vha, 0x5011,</div><div class='ctx'> 			    "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",</div><div class='ctx'> 			    mb[1], mb[2], mb[3]);</div><div class='add'>+</div><div class='add'>+			qlt_async_event(mb[0], vha, mb);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ql_dbg(ql_dbg_async, vha, 0x5012,</div><div class='ctx'> 		    "Port database changed %04x %04x %04x.\n",</div><div class='ctx'> 		    mb[1], mb[2], mb[3]);</div><div class='add'>+		ql_log(ql_log_warn, vha, 0x505f,</div><div class='add'>+		    "Link is operational (%s Gbps).\n",</div><div class='add'>+		    qla2x00_get_link_speed_str(ha));</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Mark all devices as missing so we will login again.</div><div class='hunk'>@@ -684,8 +705,13 @@ skip_rio:</div><div class='ctx'> </div><div class='ctx'> 		qla2x00_mark_all_devices_lost(vha, 1);</div><div class='ctx'> </div><div class='add'>+		if (vha-&gt;vp_idx == 0 &amp;&amp; !qla_ini_mode_enabled(vha))</div><div class='add'>+			set_bit(SCR_PENDING, &amp;vha-&gt;dpc_flags);</div><div class='add'>+</div><div class='ctx'> 		set_bit(LOOP_RESYNC_NEEDED, &amp;vha-&gt;dpc_flags);</div><div class='ctx'> 		set_bit(LOCAL_LOOP_UPDATE, &amp;vha-&gt;dpc_flags);</div><div class='add'>+</div><div class='add'>+		qlt_async_event(mb[0], vha, mb);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case MBA_RSCN_UPDATE:		/* State Change Registration */</div><div class='hunk'>@@ -807,6 +833,8 @@ skip_rio:</div><div class='ctx'> 		    mb[0], mb[1], mb[2], mb[3]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	qlt_async_event(mb[0], vha, mb);</div><div class='add'>+</div><div class='ctx'> 	if (!vha-&gt;vp_idx &amp;&amp; ha-&gt;num_vhosts)</div><div class='ctx'> 		qla2x00_alert_all_vps(rsp, mb);</div><div class='ctx'> }</div><div class='hunk'>@@ -1172,6 +1200,9 @@ qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,</div><div class='ctx'> 		} else if (iop[0] &amp; BIT_5)</div><div class='ctx'> 			fcport-&gt;port_type = FCT_INITIATOR;</div><div class='ctx'> </div><div class='add'>+		if (iop[0] &amp; BIT_7)</div><div class='add'>+			fcport-&gt;flags |= FCF_CONF_COMP_SUPPORTED;</div><div class='add'>+</div><div class='ctx'> 		if (logio-&gt;io_parameter[7] || logio-&gt;io_parameter[8])</div><div class='ctx'> 			fcport-&gt;supported_classes |= FC_COS_CLASS2;</div><div class='ctx'> 		if (logio-&gt;io_parameter[9] || logio-&gt;io_parameter[10])</div><div class='hunk'>@@ -1715,13 +1746,24 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)</div><div class='ctx'> 				res = DID_ERROR &lt;&lt; 16;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='del'>-		} else {</div><div class='add'>+		} else if (lscsi_status != SAM_STAT_TASK_SET_FULL &amp;&amp;</div><div class='add'>+			    lscsi_status != SAM_STAT_BUSY) {</div><div class='add'>+			/*</div><div class='add'>+			 * scsi status of task set and busy are considered to be</div><div class='add'>+			 * task not completed.</div><div class='add'>+			 */</div><div class='add'>+</div><div class='ctx'> 			ql_dbg(ql_dbg_io, fcport-&gt;vha, 0x301f,</div><div class='ctx'> 			    "Dropped frame(s) detected (0x%x "</div><div class='del'>-			    "of 0x%x bytes).\n", resid, scsi_bufflen(cp));</div><div class='add'>+			    "of 0x%x bytes).\n", resid,</div><div class='add'>+			    scsi_bufflen(cp));</div><div class='ctx'> </div><div class='ctx'> 			res = DID_ERROR &lt;&lt; 16 | lscsi_status;</div><div class='ctx'> 			goto check_scsi_status;</div><div class='add'>+		} else {</div><div class='add'>+			ql_dbg(ql_dbg_io, fcport-&gt;vha, 0x3030,</div><div class='add'>+			    "scsi_status: 0x%x, lscsi_status: 0x%x\n",</div><div class='add'>+			    scsi_status, lscsi_status);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		res = DID_OK &lt;&lt; 16 | lscsi_status;</div><div class='hunk'>@@ -1975,6 +2017,9 @@ void qla24xx_process_response_queue(struct scsi_qla_host *vha,</div><div class='ctx'> </div><div class='ctx'> 		if (pkt-&gt;entry_status != 0) {</div><div class='ctx'> 			qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt);</div><div class='add'>+</div><div class='add'>+			(void)qlt_24xx_process_response_error(vha, pkt);</div><div class='add'>+</div><div class='ctx'> 			((response_t *)pkt)-&gt;signature = RESPONSE_PROCESSED;</div><div class='ctx'> 			wmb();</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -2005,6 +2050,14 @@ void qla24xx_process_response_queue(struct scsi_qla_host *vha,</div><div class='ctx'>                 case ELS_IOCB_TYPE:</div><div class='ctx'> 			qla24xx_els_ct_entry(vha, rsp-&gt;req, pkt, ELS_IOCB_TYPE);</div><div class='ctx'> 			break;</div><div class='add'>+		case ABTS_RECV_24XX:</div><div class='add'>+			/* ensure that the ATIO queue is empty */</div><div class='add'>+			qlt_24xx_process_atio_queue(vha);</div><div class='add'>+		case ABTS_RESP_24XX:</div><div class='add'>+		case CTIO_TYPE7:</div><div class='add'>+		case NOTIFY_ACK_TYPE:</div><div class='add'>+			qlt_response_pkt_all_vps(vha, (response_t *)pkt);</div><div class='add'>+			break;</div><div class='ctx'> 		case MARKER_TYPE:</div><div class='ctx'> 			/* Do nothing in this case, this check is to prevent it</div><div class='ctx'> 			 * from falling into default case</div><div class='hunk'>@@ -2157,6 +2210,13 @@ qla24xx_intr_handler(int irq, void *dev_id)</div><div class='ctx'> 		case 0x14:</div><div class='ctx'> 			qla24xx_process_response_queue(vha, rsp);</div><div class='ctx'> 			break;</div><div class='add'>+		case 0x1C: /* ATIO queue updated */</div><div class='add'>+			qlt_24xx_process_atio_queue(vha);</div><div class='add'>+			break;</div><div class='add'>+		case 0x1D: /* ATIO and response queues updated */</div><div class='add'>+			qlt_24xx_process_atio_queue(vha);</div><div class='add'>+			qla24xx_process_response_queue(vha, rsp);</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			ql_dbg(ql_dbg_async, vha, 0x504f,</div><div class='ctx'> 			    "Unrecognized interrupt type (%d).\n", stat * 0xff);</div><div class='hunk'>@@ -2301,6 +2361,13 @@ qla24xx_msix_default(int irq, void *dev_id)</div><div class='ctx'> 		case 0x14:</div><div class='ctx'> 			qla24xx_process_response_queue(vha, rsp);</div><div class='ctx'> 			break;</div><div class='add'>+		case 0x1C: /* ATIO queue updated */</div><div class='add'>+			qlt_24xx_process_atio_queue(vha);</div><div class='add'>+			break;</div><div class='add'>+		case 0x1D: /* ATIO and response queues updated */</div><div class='add'>+			qlt_24xx_process_atio_queue(vha);</div><div class='add'>+			qla24xx_process_response_queue(vha, rsp);</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			ql_dbg(ql_dbg_async, vha, 0x5051,</div><div class='ctx'> 			    "Unrecognized interrupt type (%d).\n", stat &amp; 0xff);</div><div class='hunk'>@@ -2553,7 +2620,15 @@ void</div><div class='ctx'> qla2x00_free_irqs(scsi_qla_host_t *vha)</div><div class='ctx'> {</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='del'>-	struct rsp_que *rsp = ha-&gt;rsp_q_map[0];</div><div class='add'>+	struct rsp_que *rsp;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We need to check that ha-&gt;rsp_q_map is valid in case we are called</div><div class='add'>+	 * from a probe failure context.</div><div class='add'>+	 */</div><div class='add'>+	if (!ha-&gt;rsp_q_map || !ha-&gt;rsp_q_map[0])</div><div class='add'>+		return;</div><div class='add'>+	rsp = ha-&gt;rsp_q_map[0];</div><div class='ctx'> </div><div class='ctx'> 	if (ha-&gt;flags.msix_enabled)</div><div class='ctx'> 		qla24xx_disable_msix(ha);</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c<br/>index b4a23394a7bd..d5ce92c0a8fc 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_mbx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_mbx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_mbx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_mbx.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  * See LICENSE.qla2xxx for copyright and licensing details.</div><div class='ctx'>  */</div><div class='ctx'> #include "qla_def.h"</div><div class='add'>+#include "qla_target.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='hunk'>@@ -270,11 +271,8 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)</div><div class='ctx'> 			ictrl = RD_REG_WORD(&amp;reg-&gt;isp.ictrl);</div><div class='ctx'> 		}</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,</div><div class='del'>-		    "MBX Command timeout for cmd %x.\n", command);</div><div class='del'>-		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111a,</div><div class='del'>-		    "iocontrol=%x jiffies=%lx.\n", ictrl, jiffies);</div><div class='del'>-		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111b,</div><div class='del'>-		    "mb[0] = 0x%x.\n", mb0);</div><div class='add'>+		    "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "</div><div class='add'>+		    "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);</div><div class='ctx'> 		ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -320,7 +318,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)</div><div class='ctx'> 					    CRB_NIU_XG_PAUSE_CTL_P1);</div><div class='ctx'> 				}</div><div class='ctx'> 				ql_log(ql_log_info, base_vha, 0x101c,</div><div class='del'>-				    "Mailbox cmd timeout occured, cmd=0x%x, "</div><div class='add'>+				    "Mailbox cmd timeout occurred, cmd=0x%x, "</div><div class='ctx'> 				    "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "</div><div class='ctx'> 				    "abort.\n", command, mcp-&gt;mb[0],</div><div class='ctx'> 				    ha-&gt;flags.eeh_busy);</div><div class='hunk'>@@ -345,7 +343,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)</div><div class='ctx'> 					    CRB_NIU_XG_PAUSE_CTL_P1);</div><div class='ctx'> 				}</div><div class='ctx'> 				ql_log(ql_log_info, base_vha, 0x101e,</div><div class='del'>-				    "Mailbox cmd timeout occured, cmd=0x%x, "</div><div class='add'>+				    "Mailbox cmd timeout occurred, cmd=0x%x, "</div><div class='ctx'> 				    "mb[0]=0x%x. Scheduling ISP abort ",</div><div class='ctx'> 				    command, mcp-&gt;mb[0]);</div><div class='ctx'> 				set_bit(ABORT_ISP_ACTIVE, &amp;vha-&gt;dpc_flags);</div><div class='hunk'>@@ -390,7 +388,8 @@ qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1022, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {</div><div class='ctx'> 		mcp-&gt;mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;</div><div class='hunk'>@@ -424,7 +423,8 @@ qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1023,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1024, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -454,7 +454,8 @@ qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1025, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_EXECUTE_FIRMWARE;</div><div class='ctx'> 	mcp-&gt;out_mb = MBX_0;</div><div class='hunk'>@@ -489,10 +490,11 @@ qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (IS_FWI2_CAPABLE(ha)) {</div><div class='del'>-			ql_dbg(ql_dbg_mbx, vha, 0x1027,</div><div class='add'>+			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,</div><div class='ctx'> 			    "Done exchanges=%x.\n", mcp-&gt;mb[1]);</div><div class='ctx'> 		} else {</div><div class='del'>-			ql_dbg(ql_dbg_mbx, vha, 0x1028, "Done %s.\n", __func__);</div><div class='add'>+			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,</div><div class='add'>+			    "Done %s.\n", __func__);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -523,7 +525,8 @@ qla2x00_get_fw_version(scsi_qla_host_t *vha)</div><div class='ctx'> 	mbx_cmd_t	*mcp = &amp;mc;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1029, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_GET_FIRMWARE_VERSION;</div><div class='ctx'> 	mcp-&gt;out_mb = MBX_0;</div><div class='hunk'>@@ -561,11 +564,11 @@ qla2x00_get_fw_version(scsi_qla_host_t *vha)</div><div class='ctx'> 			ha-&gt;fw_attributes_h = mcp-&gt;mb[15];</div><div class='ctx'> 			ha-&gt;fw_attributes_ext[0] = mcp-&gt;mb[16];</div><div class='ctx'> 			ha-&gt;fw_attributes_ext[1] = mcp-&gt;mb[17];</div><div class='del'>-			ql_dbg(ql_dbg_mbx, vha, 0x1139,</div><div class='add'>+			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,</div><div class='ctx'> 			    "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",</div><div class='ctx'> 			    __func__, mcp-&gt;mb[15], mcp-&gt;mb[6]);</div><div class='ctx'> 		} else</div><div class='del'>-			ql_dbg(ql_dbg_mbx, vha, 0x112f,</div><div class='add'>+			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,</div><div class='ctx'> 			    "%s: FwAttributes [Upper]  invalid, MB6:%04x\n",</div><div class='ctx'> 			    __func__, mcp-&gt;mb[6]);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -576,7 +579,8 @@ failed:</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x102b, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> 	return rval;</div><div class='ctx'> }</div><div class='hunk'>@@ -602,7 +606,8 @@ qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x102c, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_GET_FIRMWARE_OPTION;</div><div class='ctx'> 	mcp-&gt;out_mb = MBX_0;</div><div class='hunk'>@@ -620,7 +625,8 @@ qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)</div><div class='ctx'> 		fwopts[2] = mcp-&gt;mb[2];</div><div class='ctx'> 		fwopts[3] = mcp-&gt;mb[3];</div><div class='ctx'> </div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x102e, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -648,7 +654,8 @@ qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x102f, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_SET_FIRMWARE_OPTION;</div><div class='ctx'> 	mcp-&gt;mb[1] = fwopts[1];</div><div class='hunk'>@@ -676,7 +683,8 @@ qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)</div><div class='ctx'> 		    "Failed=%x (%x/%x).\n", rval, mcp-&gt;mb[0], mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1031, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -704,7 +712,8 @@ qla2x00_mbx_reg_test(scsi_qla_host_t *vha)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1032, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_MAILBOX_REGISTER_TEST;</div><div class='ctx'> 	mcp-&gt;mb[1] = 0xAAAA;</div><div class='hunk'>@@ -734,7 +743,8 @@ qla2x00_mbx_reg_test(scsi_qla_host_t *vha)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1034, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -762,7 +772,8 @@ qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1035, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_VERIFY_CHECKSUM;</div><div class='ctx'> 	mcp-&gt;out_mb = MBX_0;</div><div class='hunk'>@@ -787,7 +798,8 @@ qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)</div><div class='ctx'> 		    "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha-&gt;hw) ?</div><div class='ctx'> 		    (mcp-&gt;mb[2] &lt;&lt; 16) | mcp-&gt;mb[1] : mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1037, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -819,7 +831,8 @@ qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,</div><div class='ctx'> 	mbx_cmd_t	mc;</div><div class='ctx'> 	mbx_cmd_t	*mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1038, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_IOCB_COMMAND_A64;</div><div class='ctx'> 	mcp-&gt;mb[1] = 0;</div><div class='hunk'>@@ -842,7 +855,8 @@ qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,</div><div class='ctx'> 		/* Mask reserved bits. */</div><div class='ctx'> 		sts_entry-&gt;entry_status &amp;=</div><div class='ctx'> 		    IS_FWI2_CAPABLE(vha-&gt;hw) ? RF_MASK_24XX : RF_MASK;</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x103a, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -884,7 +898,8 @@ qla2x00_abort_command(srb_t *sp)</div><div class='ctx'> 	struct req_que *req = vha-&gt;req;</div><div class='ctx'> 	struct scsi_cmnd *cmd = GET_CMD_SP(sp);</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x103b, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='ctx'> 	for (handle = 1; handle &lt; MAX_OUTSTANDING_COMMANDS; handle++) {</div><div class='hunk'>@@ -915,7 +930,8 @@ qla2x00_abort_command(srb_t *sp)</div><div class='ctx'> 	if (rval != QLA_SUCCESS) {</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x103d, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -934,7 +950,8 @@ qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)</div><div class='ctx'> 	l = l;</div><div class='ctx'> 	vha = fcport-&gt;vha;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x103e, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	req = vha-&gt;hw-&gt;req_q_map[0];</div><div class='ctx'> 	rsp = req-&gt;rsp;</div><div class='hunk'>@@ -955,7 +972,8 @@ qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)</div><div class='ctx'> 	mcp-&gt;flags = 0;</div><div class='ctx'> 	rval = qla2x00_mailbox_command(vha, mcp);</div><div class='ctx'> 	if (rval != QLA_SUCCESS) {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x103f, "Failed=%x.\n", rval);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,</div><div class='add'>+		    "Failed=%x.\n", rval);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Issue marker IOCB. */</div><div class='hunk'>@@ -965,7 +983,8 @@ qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1040,</div><div class='ctx'> 		    "Failed to issue marker IOCB (%x).\n", rval2);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1041, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -983,7 +1002,8 @@ qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)</div><div class='ctx'> </div><div class='ctx'> 	vha = fcport-&gt;vha;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1042, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	req = vha-&gt;hw-&gt;req_q_map[0];</div><div class='ctx'> 	rsp = req-&gt;rsp;</div><div class='hunk'>@@ -1012,7 +1032,8 @@ qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1044,</div><div class='ctx'> 		    "Failed to issue marker IOCB (%x).\n", rval2);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1045, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -1046,7 +1067,8 @@ qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1046, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_GET_ADAPTER_LOOP_ID;</div><div class='ctx'> 	mcp-&gt;mb[9] = vha-&gt;vp_idx;</div><div class='hunk'>@@ -1074,7 +1096,8 @@ qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,</div><div class='ctx'> 		/*EMPTY*/</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1048, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 		if (IS_CNA_CAPABLE(vha-&gt;hw)) {</div><div class='ctx'> 			vha-&gt;fcoe_vlan_id = mcp-&gt;mb[9] &amp; 0xfff;</div><div class='hunk'>@@ -1115,7 +1138,8 @@ qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1049, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_GET_RETRY_COUNT;</div><div class='ctx'> 	mcp-&gt;out_mb = MBX_0;</div><div class='hunk'>@@ -1138,7 +1162,7 @@ qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,</div><div class='ctx'> 			*tov = ratov;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x104b,</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,</div><div class='ctx'> 		    "Done %s mb3=%d ratov=%d.\n", __func__, mcp-&gt;mb[3], ratov);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1170,7 +1194,8 @@ qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x104c, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_QLA82XX(ha) &amp;&amp; ql2xdbwr)</div><div class='ctx'> 		qla82xx_wr_32(ha, ha-&gt;nxdb_wr_ptr,</div><div class='hunk'>@@ -1213,9 +1238,100 @@ qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1], mcp-&gt;mb[2], mcp-&gt;mb[3]);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x104e, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * qla2x00_get_node_name_list</div><div class='add'>+ *      Issue get node name list mailbox command, kmalloc()</div><div class='add'>+ *      and return the resulting list. Caller must kfree() it!</div><div class='add'>+ *</div><div class='add'>+ * Input:</div><div class='add'>+ *      ha = adapter state pointer.</div><div class='add'>+ *      out_data = resulting list</div><div class='add'>+ *      out_len = length of the resulting list</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ *      qla2x00 local function return status code.</div><div class='add'>+ *</div><div class='add'>+ * Context:</div><div class='add'>+ *      Kernel context.</div><div class='add'>+ */</div><div class='add'>+int</div><div class='add'>+qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_port_24xx_data *list = NULL;</div><div class='add'>+	void *pmap;</div><div class='add'>+	mbx_cmd_t mc;</div><div class='add'>+	dma_addr_t pmap_dma;</div><div class='add'>+	ulong dma_size;</div><div class='add'>+	int rval, left;</div><div class='add'>+</div><div class='add'>+	left = 1;</div><div class='add'>+	while (left &gt; 0) {</div><div class='add'>+		dma_size = left * sizeof(*list);</div><div class='add'>+		pmap = dma_alloc_coherent(&amp;ha-&gt;pdev-&gt;dev, dma_size,</div><div class='add'>+					 &amp;pmap_dma, GFP_KERNEL);</div><div class='add'>+		if (!pmap) {</div><div class='add'>+			ql_log(ql_log_warn, vha, 0x113f,</div><div class='add'>+			    "%s(%ld): DMA Alloc failed of %ld\n",</div><div class='add'>+			    __func__, vha-&gt;host_no, dma_size);</div><div class='add'>+			rval = QLA_MEMORY_ALLOC_FAILED;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mc.mb[0] = MBC_PORT_NODE_NAME_LIST;</div><div class='add'>+		mc.mb[1] = BIT_1 | BIT_3;</div><div class='add'>+		mc.mb[2] = MSW(pmap_dma);</div><div class='add'>+		mc.mb[3] = LSW(pmap_dma);</div><div class='add'>+		mc.mb[6] = MSW(MSD(pmap_dma));</div><div class='add'>+		mc.mb[7] = LSW(MSD(pmap_dma));</div><div class='add'>+		mc.mb[8] = dma_size;</div><div class='add'>+		mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8;</div><div class='add'>+		mc.in_mb = MBX_0|MBX_1;</div><div class='add'>+		mc.tov = 30;</div><div class='add'>+		mc.flags = MBX_DMA_IN;</div><div class='add'>+</div><div class='add'>+		rval = qla2x00_mailbox_command(vha, &amp;mc);</div><div class='add'>+		if (rval != QLA_SUCCESS) {</div><div class='add'>+			if ((mc.mb[0] == MBS_COMMAND_ERROR) &amp;&amp;</div><div class='add'>+			    (mc.mb[1] == 0xA)) {</div><div class='add'>+				left += le16_to_cpu(mc.mb[2]) /</div><div class='add'>+				    sizeof(struct qla_port_24xx_data);</div><div class='add'>+				goto restart;</div><div class='add'>+			}</div><div class='add'>+			goto out_free;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		left = 0;</div><div class='add'>+</div><div class='add'>+		list = kzalloc(dma_size, GFP_KERNEL);</div><div class='add'>+		if (!list) {</div><div class='add'>+			ql_log(ql_log_warn, vha, 0x1140,</div><div class='add'>+			    "%s(%ld): failed to allocate node names list "</div><div class='add'>+			    "structure.\n", __func__, vha-&gt;host_no);</div><div class='add'>+			rval = QLA_MEMORY_ALLOC_FAILED;</div><div class='add'>+			goto out_free;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		memcpy(list, pmap, dma_size);</div><div class='add'>+restart:</div><div class='add'>+		dma_free_coherent(&amp;ha-&gt;pdev-&gt;dev, dma_size, pmap, pmap_dma);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	*out_data = list;</div><div class='add'>+	*out_len = dma_size;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return rval;</div><div class='add'>+</div><div class='add'>+out_free:</div><div class='add'>+	dma_free_coherent(&amp;ha-&gt;pdev-&gt;dev, dma_size, pmap, pmap_dma);</div><div class='ctx'> 	return rval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1246,7 +1362,8 @@ qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)</div><div class='ctx'> 	dma_addr_t pd_dma;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x104f, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	pd24 = NULL;</div><div class='ctx'> 	pd = dma_pool_alloc(ha-&gt;s_dma_pool, GFP_KERNEL, &amp;pd_dma);</div><div class='hunk'>@@ -1326,6 +1443,13 @@ qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)</div><div class='ctx'> 			fcport-&gt;port_type = FCT_INITIATOR;</div><div class='ctx'> 		else</div><div class='ctx'> 			fcport-&gt;port_type = FCT_TARGET;</div><div class='add'>+</div><div class='add'>+		/* Passback COS information. */</div><div class='add'>+		fcport-&gt;supported_classes = (pd24-&gt;flags &amp; PDF_CLASS_2) ?</div><div class='add'>+				FC_COS_CLASS2 : FC_COS_CLASS3;</div><div class='add'>+</div><div class='add'>+		if (pd24-&gt;prli_svc_param_word_3[0] &amp; BIT_7)</div><div class='add'>+			fcport-&gt;flags |= FCF_CONF_COMP_SUPPORTED;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		uint64_t zero = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1378,7 +1502,8 @@ gpd_error_out:</div><div class='ctx'> 		    "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,</div><div class='ctx'> 		    mcp-&gt;mb[0], mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1053, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -1407,7 +1532,8 @@ qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1054, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_GET_FIRMWARE_STATE;</div><div class='ctx'> 	mcp-&gt;out_mb = MBX_0;</div><div class='hunk'>@@ -1433,7 +1559,8 @@ qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1056, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -1465,7 +1592,8 @@ qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1057, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_GET_PORT_NAME;</div><div class='ctx'> 	mcp-&gt;mb[9] = vha-&gt;vp_idx;</div><div class='hunk'>@@ -1499,7 +1627,8 @@ qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,</div><div class='ctx'> 			name[7] = LSB(mcp-&gt;mb[7]);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1059, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -1527,7 +1656,8 @@ qla2x00_lip_reset(scsi_qla_host_t *vha)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x105a, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_CNA_CAPABLE(vha-&gt;hw)) {</div><div class='ctx'> 		/* Logout across all FCFs. */</div><div class='hunk'>@@ -1564,7 +1694,8 @@ qla2x00_lip_reset(scsi_qla_host_t *vha)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x105c, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -1596,9 +1727,10 @@ qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x105d, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x105e,</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,</div><div class='ctx'> 	    "Retry cnt=%d ratov=%d total tov=%d.\n",</div><div class='ctx'> 	    vha-&gt;hw-&gt;retry_count, vha-&gt;hw-&gt;login_timeout, mcp-&gt;tov);</div><div class='ctx'> </div><div class='hunk'>@@ -1622,7 +1754,8 @@ qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1060, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -1641,7 +1774,8 @@ qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,</div><div class='ctx'> 	struct req_que *req;</div><div class='ctx'> 	struct rsp_que *rsp;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1061, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (ha-&gt;flags.cpu_affinity_enabled)</div><div class='ctx'> 		req = ha-&gt;req_q_map[0];</div><div class='hunk'>@@ -1715,7 +1849,8 @@ qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1066, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 		iop[0] = le32_to_cpu(lg-&gt;io_parameter[0]);</div><div class='ctx'> </div><div class='hunk'>@@ -1733,6 +1868,10 @@ qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,</div><div class='ctx'> 			mb[10] |= BIT_0;	/* Class 2. */</div><div class='ctx'> 		if (lg-&gt;io_parameter[9] || lg-&gt;io_parameter[10])</div><div class='ctx'> 			mb[10] |= BIT_1;	/* Class 3. */</div><div class='add'>+		if (lg-&gt;io_parameter[0] &amp; __constant_cpu_to_le32(BIT_7))</div><div class='add'>+			mb[10] |= BIT_7;	/* Confirmed Completion</div><div class='add'>+						 * Allowed</div><div class='add'>+						 */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dma_pool_free(ha-&gt;s_dma_pool, lg, lg_dma);</div><div class='hunk'>@@ -1770,7 +1909,8 @@ qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1067, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_LOGIN_FABRIC_PORT;</div><div class='ctx'> 	mcp-&gt;out_mb = MBX_3|MBX_2|MBX_1|MBX_0;</div><div class='hunk'>@@ -1818,7 +1958,8 @@ qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1], mcp-&gt;mb[2]);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1069, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -1849,7 +1990,8 @@ qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x106a, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_FWI2_CAPABLE(ha))</div><div class='ctx'> 		return qla24xx_login_fabric(vha, fcport-&gt;loop_id,</div><div class='hunk'>@@ -1891,7 +2033,8 @@ qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1], mcp-&gt;mb[6], mcp-&gt;mb[7]);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x106c, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return (rval);</div><div class='hunk'>@@ -1908,7 +2051,8 @@ qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,</div><div class='ctx'> 	struct req_que *req;</div><div class='ctx'> 	struct rsp_que *rsp;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x106d, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	lg = dma_pool_alloc(ha-&gt;s_dma_pool, GFP_KERNEL, &amp;lg_dma);</div><div class='ctx'> 	if (lg == NULL) {</div><div class='hunk'>@@ -1952,7 +2096,8 @@ qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,</div><div class='ctx'> 		    le32_to_cpu(lg-&gt;io_parameter[1]));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1072, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dma_pool_free(ha-&gt;s_dma_pool, lg, lg_dma);</div><div class='hunk'>@@ -1984,7 +2129,8 @@ qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1073, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_LOGOUT_FABRIC_PORT;</div><div class='ctx'> 	mcp-&gt;out_mb = MBX_1|MBX_0;</div><div class='hunk'>@@ -2007,7 +2153,8 @@ qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,</div><div class='ctx'> 		    "Failed=%x mb[1]=%x.\n", rval, mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1075, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -2035,7 +2182,8 @@ qla2x00_full_login_lip(scsi_qla_host_t *vha)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1076, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_LIP_FULL_LOGIN;</div><div class='ctx'> 	mcp-&gt;mb[1] = IS_FWI2_CAPABLE(vha-&gt;hw) ? BIT_3 : 0;</div><div class='hunk'>@@ -2052,7 +2200,8 @@ qla2x00_full_login_lip(scsi_qla_host_t *vha)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1078, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -2078,7 +2227,8 @@ qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1079, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (id_list == NULL)</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -2110,7 +2260,8 @@ qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		*entries = mcp-&gt;mb[1];</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x107b, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -2138,7 +2289,8 @@ qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x107c, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_GET_RESOURCE_COUNTS;</div><div class='ctx'> 	mcp-&gt;out_mb = MBX_0;</div><div class='hunk'>@@ -2154,7 +2306,7 @@ qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x107d,</div><div class='ctx'> 		    "Failed mb[0]=%x.\n", mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x107e,</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,</div><div class='ctx'> 		    "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "</div><div class='ctx'> 		    "mb11=%x mb12=%x.\n", __func__, mcp-&gt;mb[1], mcp-&gt;mb[2],</div><div class='ctx'> 		    mcp-&gt;mb[3], mcp-&gt;mb[6], mcp-&gt;mb[7], mcp-&gt;mb[10],</div><div class='hunk'>@@ -2201,7 +2353,8 @@ qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)</div><div class='ctx'> 	dma_addr_t pmap_dma;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x107f, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	pmap = dma_pool_alloc(ha-&gt;s_dma_pool, GFP_KERNEL, &amp;pmap_dma);</div><div class='ctx'> 	if (pmap  == NULL) {</div><div class='hunk'>@@ -2224,7 +2377,7 @@ qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)</div><div class='ctx'> 	rval = qla2x00_mailbox_command(vha, mcp);</div><div class='ctx'> </div><div class='ctx'> 	if (rval == QLA_SUCCESS) {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1081,</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,</div><div class='ctx'> 		    "mb0/mb1=%x/%X FC/AL position map size (%x).\n",</div><div class='ctx'> 		    mcp-&gt;mb[0], mcp-&gt;mb[1], (unsigned)pmap[0]);</div><div class='ctx'> 		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,</div><div class='hunk'>@@ -2238,7 +2391,8 @@ qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)</div><div class='ctx'> 	if (rval != QLA_SUCCESS) {</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1083, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -2267,7 +2421,8 @@ qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,</div><div class='ctx'> 	uint32_t *siter, *diter, dwords;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1084, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_GET_LINK_STATUS;</div><div class='ctx'> 	mcp-&gt;mb[2] = MSW(stats_dma);</div><div class='hunk'>@@ -2301,7 +2456,8 @@ qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,</div><div class='ctx'> 			rval = QLA_FUNCTION_FAILED;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Copy over data -- firmware data is LE. */</div><div class='del'>-			ql_dbg(ql_dbg_mbx, vha, 0x1086, "Done %s.\n", __func__);</div><div class='add'>+			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,</div><div class='add'>+			    "Done %s.\n", __func__);</div><div class='ctx'> 			dwords = offsetof(struct link_statistics, unused1) / 4;</div><div class='ctx'> 			siter = diter = &amp;stats-&gt;link_fail_cnt;</div><div class='ctx'> 			while (dwords--)</div><div class='hunk'>@@ -2324,7 +2480,8 @@ qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	uint32_t *siter, *diter, dwords;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1088, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_GET_LINK_PRIV_STATS;</div><div class='ctx'> 	mcp-&gt;mb[2] = MSW(stats_dma);</div><div class='hunk'>@@ -2346,7 +2503,8 @@ qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,</div><div class='ctx'> 			    "Failed mb[0]=%x.\n", mcp-&gt;mb[0]);</div><div class='ctx'> 			rval = QLA_FUNCTION_FAILED;</div><div class='ctx'> 		} else {</div><div class='del'>-			ql_dbg(ql_dbg_mbx, vha, 0x108a, "Done %s.\n", __func__);</div><div class='add'>+			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,</div><div class='add'>+			    "Done %s.\n", __func__);</div><div class='ctx'> 			/* Copy over data -- firmware data is LE. */</div><div class='ctx'> 			dwords = sizeof(struct link_statistics) / 4;</div><div class='ctx'> 			siter = diter = &amp;stats-&gt;link_fail_cnt;</div><div class='hunk'>@@ -2375,7 +2533,8 @@ qla24xx_abort_command(srb_t *sp)</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> 	struct req_que *req = vha-&gt;req;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x108c, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='ctx'> 	for (handle = 1; handle &lt; MAX_OUTSTANDING_COMMANDS; handle++) {</div><div class='hunk'>@@ -2404,7 +2563,7 @@ qla24xx_abort_command(srb_t *sp)</div><div class='ctx'> 	abt-&gt;port_id[0] = fcport-&gt;d_id.b.al_pa;</div><div class='ctx'> 	abt-&gt;port_id[1] = fcport-&gt;d_id.b.area;</div><div class='ctx'> 	abt-&gt;port_id[2] = fcport-&gt;d_id.b.domain;</div><div class='del'>-	abt-&gt;vp_index = fcport-&gt;vp_idx;</div><div class='add'>+	abt-&gt;vp_index = fcport-&gt;vha-&gt;vp_idx;</div><div class='ctx'> </div><div class='ctx'> 	abt-&gt;req_que_no = cpu_to_le16(req-&gt;id);</div><div class='ctx'> </div><div class='hunk'>@@ -2423,7 +2582,8 @@ qla24xx_abort_command(srb_t *sp)</div><div class='ctx'> 		    le16_to_cpu(abt-&gt;nport_handle));</div><div class='ctx'> 		rval = QLA_FUNCTION_FAILED;</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1091, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dma_pool_free(ha-&gt;s_dma_pool, abt, abt_dma);</div><div class='hunk'>@@ -2455,7 +2615,8 @@ __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,</div><div class='ctx'> 	ha = vha-&gt;hw;</div><div class='ctx'> 	req = vha-&gt;req;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1092, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (ha-&gt;flags.cpu_affinity_enabled)</div><div class='ctx'> 		rsp = ha-&gt;rsp_q_map[tag + 1];</div><div class='hunk'>@@ -2478,7 +2639,7 @@ __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,</div><div class='ctx'> 	tsk-&gt;p.tsk.port_id[0] = fcport-&gt;d_id.b.al_pa;</div><div class='ctx'> 	tsk-&gt;p.tsk.port_id[1] = fcport-&gt;d_id.b.area;</div><div class='ctx'> 	tsk-&gt;p.tsk.port_id[2] = fcport-&gt;d_id.b.domain;</div><div class='del'>-	tsk-&gt;p.tsk.vp_index = fcport-&gt;vp_idx;</div><div class='add'>+	tsk-&gt;p.tsk.vp_index = fcport-&gt;vha-&gt;vp_idx;</div><div class='ctx'> 	if (type == TCF_LUN_RESET) {</div><div class='ctx'> 		int_to_scsilun(l, &amp;tsk-&gt;p.tsk.lun);</div><div class='ctx'> 		host_to_fcp_swap((uint8_t *)&amp;tsk-&gt;p.tsk.lun,</div><div class='hunk'>@@ -2504,7 +2665,7 @@ __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,</div><div class='ctx'> 	} else if (le16_to_cpu(sts-&gt;scsi_status) &amp;</div><div class='ctx'> 	    SS_RESPONSE_INFO_LEN_VALID) {</div><div class='ctx'> 		if (le32_to_cpu(sts-&gt;rsp_data_len) &lt; 4) {</div><div class='del'>-			ql_dbg(ql_dbg_mbx, vha, 0x1097,</div><div class='add'>+			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,</div><div class='ctx'> 			    "Ignoring inconsistent data length -- not enough "</div><div class='ctx'> 			    "response info (%d).\n",</div><div class='ctx'> 			    le32_to_cpu(sts-&gt;rsp_data_len));</div><div class='hunk'>@@ -2523,7 +2684,8 @@ __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1099,</div><div class='ctx'> 		    "Failed to issue marker IOCB (%x).\n", rval2);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x109a, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dma_pool_free(ha-&gt;s_dma_pool, tsk, tsk_dma);</div><div class='hunk'>@@ -2564,7 +2726,8 @@ qla2x00_system_error(scsi_qla_host_t *vha)</div><div class='ctx'> 	if (!IS_QLA23XX(ha) &amp;&amp; !IS_FWI2_CAPABLE(ha))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x109b, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_GEN_SYSTEM_ERROR;</div><div class='ctx'> 	mcp-&gt;out_mb = MBX_0;</div><div class='hunk'>@@ -2576,7 +2739,8 @@ qla2x00_system_error(scsi_qla_host_t *vha)</div><div class='ctx'> 	if (rval != QLA_SUCCESS) {</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x109d, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -2596,7 +2760,8 @@ qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x109e, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_SERDES_PARAMS;</div><div class='ctx'> 	mcp-&gt;mb[1] = BIT_0;</div><div class='hunk'>@@ -2615,7 +2780,8 @@ qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*EMPTY*/</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10a0, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -2631,7 +2797,8 @@ qla2x00_stop_firmware(scsi_qla_host_t *vha)</div><div class='ctx'> 	if (!IS_FWI2_CAPABLE(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10a1, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_STOP_FIRMWARE;</div><div class='ctx'> 	mcp-&gt;mb[1] = 0;</div><div class='hunk'>@@ -2646,7 +2813,8 @@ qla2x00_stop_firmware(scsi_qla_host_t *vha)</div><div class='ctx'> 		if (mcp-&gt;mb[0] == MBS_INVALID_COMMAND)</div><div class='ctx'> 			rval = QLA_INVALID_COMMAND;</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10a3, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -2660,7 +2828,8 @@ qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10a4, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_FWI2_CAPABLE(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -2686,7 +2855,8 @@ qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10a6, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -2699,7 +2869,8 @@ qla2x00_disable_eft_trace(scsi_qla_host_t *vha)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10a7, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_FWI2_CAPABLE(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -2719,7 +2890,8 @@ qla2x00_disable_eft_trace(scsi_qla_host_t *vha)</div><div class='ctx'> 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10a9, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -2733,7 +2905,8 @@ qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10aa, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_QLA25XX(vha-&gt;hw) &amp;&amp; !IS_QLA81XX(vha-&gt;hw) &amp;&amp;</div><div class='ctx'> 	    !IS_QLA83XX(vha-&gt;hw))</div><div class='hunk'>@@ -2764,7 +2937,8 @@ qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10ac, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 		if (mb)</div><div class='ctx'> 			memcpy(mb, mcp-&gt;mb, 8 * sizeof(*mb));</div><div class='hunk'>@@ -2782,7 +2956,8 @@ qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10ad, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_FWI2_CAPABLE(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -2804,7 +2979,8 @@ qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)</div><div class='ctx'> 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10af, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 		if (wr)</div><div class='ctx'> 			*wr = (uint64_t) mcp-&gt;mb[5] &lt;&lt; 48 |</div><div class='hunk'>@@ -2829,7 +3005,8 @@ qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10b0, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_IIDMA_CAPABLE(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -2854,7 +3031,8 @@ qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,</div><div class='ctx'> 	if (rval != QLA_SUCCESS) {</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10b2, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 		if (port_speed)</div><div class='ctx'> 			*port_speed = mcp-&gt;mb[3];</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2870,7 +3048,8 @@ qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10b3, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_IIDMA_CAPABLE(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -2897,9 +3076,11 @@ qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rval != QLA_SUCCESS) {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10b4, "Failed=%x.\n", rval);</div><div class='add'>+		ql_dbg(ql_dbg_mbx, vha, 0x10b4,</div><div class='add'>+		    "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10b5, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -2915,24 +3096,25 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *vha,</div><div class='ctx'> 	scsi_qla_host_t *vp;</div><div class='ctx'> 	unsigned long   flags;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10b6, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (rptid_entry-&gt;entry_status != 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (rptid_entry-&gt;format == 0) {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10b7,</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7,</div><div class='ctx'> 		    "Format 0 : Number of VPs setup %d, number of "</div><div class='ctx'> 		    "VPs acquired %d.\n",</div><div class='ctx'> 		    MSB(le16_to_cpu(rptid_entry-&gt;vp_count)),</div><div class='ctx'> 		    LSB(le16_to_cpu(rptid_entry-&gt;vp_count)));</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10b8,</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8,</div><div class='ctx'> 		    "Primary port id %02x%02x%02x.\n",</div><div class='ctx'> 		    rptid_entry-&gt;port_id[2], rptid_entry-&gt;port_id[1],</div><div class='ctx'> 		    rptid_entry-&gt;port_id[0]);</div><div class='ctx'> 	} else if (rptid_entry-&gt;format == 1) {</div><div class='ctx'> 		vp_idx = LSB(stat);</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10b9,</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9,</div><div class='ctx'> 		    "Format 1: VP[%d] enabled - status %d - with "</div><div class='ctx'> 		    "port id %02x%02x%02x.\n", vp_idx, MSB(stat),</div><div class='ctx'> 		    rptid_entry-&gt;port_id[2], rptid_entry-&gt;port_id[1],</div><div class='hunk'>@@ -2999,7 +3181,8 @@ qla24xx_modify_vp_config(scsi_qla_host_t *vha)</div><div class='ctx'> </div><div class='ctx'> 	/* This can be called by the parent */</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10bb, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	vpmod = dma_pool_alloc(ha-&gt;s_dma_pool, GFP_KERNEL, &amp;vpmod_dma);</div><div class='ctx'> 	if (!vpmod) {</div><div class='hunk'>@@ -3015,6 +3198,9 @@ qla24xx_modify_vp_config(scsi_qla_host_t *vha)</div><div class='ctx'> 	vpmod-&gt;vp_count = 1;</div><div class='ctx'> 	vpmod-&gt;vp_index1 = vha-&gt;vp_idx;</div><div class='ctx'> 	vpmod-&gt;options_idx1 = BIT_3|BIT_4|BIT_5;</div><div class='add'>+</div><div class='add'>+	qlt_modify_vp_config(vha, vpmod);</div><div class='add'>+</div><div class='ctx'> 	memcpy(vpmod-&gt;node_name_idx1, vha-&gt;node_name, WWN_SIZE);</div><div class='ctx'> 	memcpy(vpmod-&gt;port_name_idx1, vha-&gt;port_name, WWN_SIZE);</div><div class='ctx'> 	vpmod-&gt;entry_count = 1;</div><div class='hunk'>@@ -3035,7 +3221,8 @@ qla24xx_modify_vp_config(scsi_qla_host_t *vha)</div><div class='ctx'> 		rval = QLA_FUNCTION_FAILED;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* EMPTY */</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10c0, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 		fc_vport_set_state(vha-&gt;fc_vport, FC_VPORT_INITIALIZING);</div><div class='ctx'> 	}</div><div class='ctx'> 	dma_pool_free(ha-&gt;s_dma_pool, vpmod, vpmod_dma);</div><div class='hunk'>@@ -3069,7 +3256,7 @@ qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)</div><div class='ctx'> 	int	vp_index = vha-&gt;vp_idx;</div><div class='ctx'> 	struct scsi_qla_host *base_vha = pci_get_drvdata(ha-&gt;pdev);</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10c1,</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,</div><div class='ctx'> 	    "Entered %s enabling index %d.\n", __func__, vp_index);</div><div class='ctx'> </div><div class='ctx'> 	if (vp_index == 0 || vp_index &gt;= ha-&gt;max_npiv_vports)</div><div class='hunk'>@@ -3112,7 +3299,8 @@ qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)</div><div class='ctx'> 		    le16_to_cpu(vce-&gt;comp_status));</div><div class='ctx'> 		rval = QLA_FUNCTION_FAILED;</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10c6, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dma_pool_free(ha-&gt;s_dma_pool, vce, vce_dma);</div><div class='hunk'>@@ -3149,14 +3337,8 @@ qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10c7, "Entered %s.\n", __func__);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * This command is implicitly executed by firmware during login for the</div><div class='del'>-	 * physical hosts</div><div class='del'>-	 */</div><div class='del'>-	if (vp_idx == 0)</div><div class='del'>-		return QLA_FUNCTION_FAILED;</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_SEND_CHANGE_REQUEST;</div><div class='ctx'> 	mcp-&gt;mb[1] = format;</div><div class='hunk'>@@ -3185,7 +3367,8 @@ qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1009, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (MSW(addr) || IS_FWI2_CAPABLE(vha-&gt;hw)) {</div><div class='ctx'> 		mcp-&gt;mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;</div><div class='hunk'>@@ -3219,7 +3402,8 @@ qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1008,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1007, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -3244,7 +3428,8 @@ qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10c8, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mn = dma_pool_alloc(ha-&gt;s_dma_pool, GFP_KERNEL, &amp;mn_dma);</div><div class='ctx'> 	if (mn == NULL) {</div><div class='hunk'>@@ -3285,7 +3470,7 @@ qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)</div><div class='ctx'> 		status[0] = le16_to_cpu(mn-&gt;p.rsp.comp_status);</div><div class='ctx'> 		status[1] = status[0] == CS_VCS_CHIP_FAILURE ?</div><div class='ctx'> 		    le16_to_cpu(mn-&gt;p.rsp.failure_code) : 0;</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10ce,</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,</div><div class='ctx'> 		    "cs=%x fc=%x.\n", status[0], status[1]);</div><div class='ctx'> </div><div class='ctx'> 		if (status[0] != CS_COMPLETE) {</div><div class='hunk'>@@ -3299,7 +3484,7 @@ qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)</div><div class='ctx'> 				retry = 1;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='del'>-			ql_dbg(ql_dbg_mbx, vha, 0x10d0,</div><div class='add'>+			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,</div><div class='ctx'> 			    "Firmware updated to %x.\n",</div><div class='ctx'> 			    le32_to_cpu(mn-&gt;p.rsp.fw_ver));</div><div class='ctx'> </div><div class='hunk'>@@ -3316,9 +3501,11 @@ verify_done:</div><div class='ctx'> 	dma_pool_free(ha-&gt;s_dma_pool, mn, mn_dma);</div><div class='ctx'> </div><div class='ctx'> 	if (rval != QLA_SUCCESS) {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10d1, "Failed=%x.\n", rval);</div><div class='add'>+		ql_dbg(ql_dbg_mbx, vha, 0x10d1,</div><div class='add'>+		    "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10d2, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -3334,7 +3521,8 @@ qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)</div><div class='ctx'> 	struct device_reg_25xxmq __iomem *reg;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10d3, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_INITIALIZE_MULTIQ;</div><div class='ctx'> 	mcp-&gt;mb[1] = req-&gt;options;</div><div class='hunk'>@@ -3388,7 +3576,8 @@ qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x10d4,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10d5, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -3404,7 +3593,8 @@ qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)</div><div class='ctx'> 	struct device_reg_25xxmq __iomem *reg;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10d6, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_INITIALIZE_MULTIQ;</div><div class='ctx'> 	mcp-&gt;mb[1] = rsp-&gt;options;</div><div class='hunk'>@@ -3456,7 +3646,8 @@ qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x10d7,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10d8, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -3469,7 +3660,8 @@ qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10d9, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_IDC_ACK;</div><div class='ctx'> 	memcpy(&amp;mcp-&gt;mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));</div><div class='hunk'>@@ -3483,7 +3675,8 @@ qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x10da,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10db, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -3496,7 +3689,8 @@ qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10dc, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_QLA81XX(vha-&gt;hw) &amp;&amp; !IS_QLA83XX(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -3514,7 +3708,8 @@ qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)</div><div class='ctx'> 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10de, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 		*sector_size = mcp-&gt;mb[1];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3531,7 +3726,8 @@ qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)</div><div class='ctx'> 	if (!IS_QLA81XX(vha-&gt;hw) &amp;&amp; !IS_QLA83XX(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10df, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_FLASH_ACCESS_CTRL;</div><div class='ctx'> 	mcp-&gt;mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :</div><div class='hunk'>@@ -3547,7 +3743,8 @@ qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)</div><div class='ctx'> 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10e1, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -3563,7 +3760,8 @@ qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)</div><div class='ctx'> 	if (!IS_QLA81XX(vha-&gt;hw) &amp;&amp; !IS_QLA83XX(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10e2, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_FLASH_ACCESS_CTRL;</div><div class='ctx'> 	mcp-&gt;mb[1] = FAC_OPT_CMD_ERASE_SECTOR;</div><div class='hunk'>@@ -3582,7 +3780,8 @@ qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)</div><div class='ctx'> 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1], mcp-&gt;mb[2]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10e4, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -3595,7 +3794,8 @@ qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10e5, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_RESTART_MPI_FW;</div><div class='ctx'> 	mcp-&gt;out_mb = MBX_0;</div><div class='hunk'>@@ -3609,7 +3809,8 @@ qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)</div><div class='ctx'> 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10e7, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -3624,7 +3825,8 @@ qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10e8, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_FWI2_CAPABLE(ha))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -3654,7 +3856,8 @@ qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x10e9,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10ea, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -3669,7 +3872,8 @@ qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10eb, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_FWI2_CAPABLE(ha))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -3699,7 +3903,8 @@ qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x10ec,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10ed, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -3713,7 +3918,8 @@ qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10ee, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_CNA_CAPABLE(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -3735,7 +3941,8 @@ qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1], mcp-&gt;mb[2]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10f0, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 		*actual_size = mcp-&gt;mb[2] &lt;&lt; 2;</div><div class='hunk'>@@ -3752,7 +3959,8 @@ qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10f1, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_CNA_CAPABLE(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -3775,7 +3983,8 @@ qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1], mcp-&gt;mb[2]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10f3, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -3788,7 +3997,8 @@ qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10f4, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_FWI2_CAPABLE(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -3805,7 +4015,8 @@ qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x10f5,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10f6, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 		*data = mcp-&gt;mb[3] &lt;&lt; 16 | mcp-&gt;mb[2];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3821,7 +4032,8 @@ qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	uint32_t iter_cnt = 0x1;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10f7, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	memset(mcp-&gt;mb, 0 , sizeof(mcp-&gt;mb));</div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;</div><div class='hunk'>@@ -3865,7 +4077,8 @@ qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,</div><div class='ctx'> 		    "mb[19]=%x.\n", rval, mcp-&gt;mb[0], mcp-&gt;mb[1], mcp-&gt;mb[2],</div><div class='ctx'> 		    mcp-&gt;mb[3], mcp-&gt;mb[18], mcp-&gt;mb[19]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10f9, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Copy mailbox information */</div><div class='hunk'>@@ -3882,7 +4095,8 @@ qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10fa, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	memset(mcp-&gt;mb, 0 , sizeof(mcp-&gt;mb));</div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_DIAGNOSTIC_ECHO;</div><div class='hunk'>@@ -3926,7 +4140,8 @@ qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",</div><div class='ctx'> 		    rval, mcp-&gt;mb[0], mcp-&gt;mb[1]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10fc, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Copy mailbox information */</div><div class='hunk'>@@ -3941,7 +4156,7 @@ qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10fd,</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,</div><div class='ctx'> 	    "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_ISP84XX_RESET;</div><div class='hunk'>@@ -3955,7 +4170,8 @@ qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)</div><div class='ctx'> 	if (rval != QLA_SUCCESS)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);</div><div class='ctx'> 	else</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10ff, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='ctx'> }</div><div class='hunk'>@@ -3967,7 +4183,8 @@ qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1100, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_FWI2_CAPABLE(vha-&gt;hw))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -3986,7 +4203,8 @@ qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1101,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1102, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -4003,7 +4221,8 @@ qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)</div><div class='ctx'> </div><div class='ctx'> 	rval = QLA_SUCCESS;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1103, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(MBX_INTERRUPT, &amp;ha-&gt;mbx_cmd_flags);</div><div class='ctx'> </div><div class='hunk'>@@ -4046,7 +4265,8 @@ qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1104,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1105, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -4060,7 +4280,8 @@ qla2x00_get_data_rate(scsi_qla_host_t *vha)</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1106, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_FWI2_CAPABLE(ha))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -4078,7 +4299,8 @@ qla2x00_get_data_rate(scsi_qla_host_t *vha)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1107,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1108, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 		if (mcp-&gt;mb[1] != 0x7)</div><div class='ctx'> 			ha-&gt;link_data_rate = mcp-&gt;mb[1];</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4094,7 +4316,8 @@ qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1109, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_QLA81XX(ha) &amp;&amp; !IS_QLA83XX(ha))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -4113,7 +4336,8 @@ qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)</div><div class='ctx'> 		/* Copy all bits to preserve original value */</div><div class='ctx'> 		memcpy(mb, &amp;mcp-&gt;mb[1], sizeof(uint16_t) * 4);</div><div class='ctx'> </div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x110b, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> 	return rval;</div><div class='ctx'> }</div><div class='hunk'>@@ -4125,7 +4349,8 @@ qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x110c, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_SET_PORT_CONFIG;</div><div class='ctx'> 	/* Copy all bits to preserve original setting */</div><div class='hunk'>@@ -4140,7 +4365,8 @@ qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x110d,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x110e, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='ctx'> }</div><div class='hunk'>@@ -4155,7 +4381,8 @@ qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x110f, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_QLA24XX_TYPE(ha) &amp;&amp; !IS_QLA25XX(ha))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -4183,7 +4410,8 @@ qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,</div><div class='ctx'> 	if (rval != QLA_SUCCESS) {</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x10cc, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -4196,7 +4424,8 @@ qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp, uint16_t *frac)</div><div class='ctx'> 	uint8_t byte;</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x10ca, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ca,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	/* Integer part */</div><div class='ctx'> 	rval = qla2x00_read_sfp(vha, 0, &amp;byte, 0x98, 0x01, 1, BIT_13|BIT_0);</div><div class='hunk'>@@ -4216,7 +4445,8 @@ qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp, uint16_t *frac)</div><div class='ctx'> 	}</div><div class='ctx'> 	*frac = (byte &gt;&gt; 6) * 25;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1018, "Done %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1018,</div><div class='add'>+	    "Done %s.\n", __func__);</div><div class='ctx'> fail:</div><div class='ctx'> 	return rval;</div><div class='ctx'> }</div><div class='hunk'>@@ -4229,7 +4459,8 @@ qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1017, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_FWI2_CAPABLE(ha))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -4248,7 +4479,8 @@ qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1016,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x100e, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -4262,7 +4494,8 @@ qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)</div><div class='ctx'> 	mbx_cmd_t mc;</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x100d, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_QLA82XX(ha))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='hunk'>@@ -4281,7 +4514,8 @@ qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x100c,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x100b, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -4295,7 +4529,8 @@ qla82xx_md_get_template_size(scsi_qla_host_t *vha)</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	int rval = QLA_FUNCTION_FAILED;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x111f, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	memset(mcp-&gt;mb, 0 , sizeof(mcp-&gt;mb));</div><div class='ctx'> 	mcp-&gt;mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);</div><div class='hunk'>@@ -4318,7 +4553,8 @@ qla82xx_md_get_template_size(scsi_qla_host_t *vha)</div><div class='ctx'> 		    (mcp-&gt;mb[1] &lt;&lt; 16) | mcp-&gt;mb[0],</div><div class='ctx'> 		    (mcp-&gt;mb[3] &lt;&lt; 16) | mcp-&gt;mb[2]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1121, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 		ha-&gt;md_template_size = ((mcp-&gt;mb[3] &lt;&lt; 16) | mcp-&gt;mb[2]);</div><div class='ctx'> 		if (!ha-&gt;md_template_size) {</div><div class='ctx'> 			ql_dbg(ql_dbg_mbx, vha, 0x1122,</div><div class='hunk'>@@ -4337,7 +4573,8 @@ qla82xx_md_get_template(scsi_qla_host_t *vha)</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> 	int rval = QLA_FUNCTION_FAILED;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1123, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	ha-&gt;md_tmplt_hdr = dma_alloc_coherent(&amp;ha-&gt;pdev-&gt;dev,</div><div class='ctx'> 	   ha-&gt;md_template_size, &amp;ha-&gt;md_tmplt_hdr_dma, GFP_KERNEL);</div><div class='hunk'>@@ -4372,7 +4609,8 @@ qla82xx_md_get_template(scsi_qla_host_t *vha)</div><div class='ctx'> 		    ((mcp-&gt;mb[1] &lt;&lt; 16) | mcp-&gt;mb[0]),</div><div class='ctx'> 		    ((mcp-&gt;mb[3] &lt;&lt; 16) | mcp-&gt;mb[2]));</div><div class='ctx'> 	} else</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1126, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	return rval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4387,7 +4625,8 @@ qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)</div><div class='ctx'> 	if (!IS_QLA81XX(ha) &amp;&amp; !IS_QLA8031(ha))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1133, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	memset(mcp, 0, sizeof(mbx_cmd_t));</div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_SET_LED_CONFIG;</div><div class='hunk'>@@ -4412,7 +4651,8 @@ qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1134,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1135, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -4429,7 +4669,8 @@ qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)</div><div class='ctx'> 	if (!IS_QLA81XX(ha) &amp;&amp; !IS_QLA8031(ha))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1136, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	memset(mcp, 0, sizeof(mbx_cmd_t));</div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_GET_LED_CONFIG;</div><div class='hunk'>@@ -4454,7 +4695,8 @@ qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)</div><div class='ctx'> 			led_cfg[4] = mcp-&gt;mb[5];</div><div class='ctx'> 			led_cfg[5] = mcp-&gt;mb[6];</div><div class='ctx'> 		}</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1138, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='hunk'>@@ -4471,7 +4713,7 @@ qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)</div><div class='ctx'> 	if (!IS_QLA82XX(ha))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1127,</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,</div><div class='ctx'> 		"Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	memset(mcp, 0, sizeof(mbx_cmd_t));</div><div class='hunk'>@@ -4491,7 +4733,7 @@ qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1128,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1129,</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,</div><div class='ctx'> 		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4509,7 +4751,8 @@ qla83xx_write_remote_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)</div><div class='ctx'> 	if (!IS_QLA83XX(ha))</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x1130, "Entered %s.\n", __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,</div><div class='add'>+	    "Entered %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_WRITE_REMOTE_REG;</div><div class='ctx'> 	mcp-&gt;mb[1] = LSW(reg);</div><div class='hunk'>@@ -4527,7 +4770,7 @@ qla83xx_write_remote_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x1131,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	} else {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x1132,</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,</div><div class='ctx'> 		    "Done %s.\n", __func__);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4543,13 +4786,14 @@ qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)</div><div class='ctx'> 	mbx_cmd_t *mcp = &amp;mc;</div><div class='ctx'> </div><div class='ctx'> 	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x113b,</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,</div><div class='ctx'> 		    "Implicit LOGO Unsupported.\n");</div><div class='ctx'> 		return QLA_FUNCTION_FAILED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_mbx, vha, 0x113c, "Done %s.\n",  __func__);</div><div class='add'>+	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,</div><div class='add'>+	    "Entering %s.\n",  __func__);</div><div class='ctx'> </div><div class='ctx'> 	/* Perform Implicit LOGO. */</div><div class='ctx'> 	mcp-&gt;mb[0] = MBC_PORT_LOGOUT;</div><div class='hunk'>@@ -4564,7 +4808,8 @@ qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)</div><div class='ctx'> 		ql_dbg(ql_dbg_mbx, vha, 0x113d,</div><div class='ctx'> 		    "Failed=%x mb[0]=%x.\n", rval, mcp-&gt;mb[0]);</div><div class='ctx'> 	else</div><div class='del'>-		ql_dbg(ql_dbg_mbx, vha, 0x113e, "Done %s.\n", __func__);</div><div class='add'>+		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,</div><div class='add'>+		    "Done %s.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_mid.c b/drivers/scsi/qla2xxx/qla_mid.c<br/>index aa062a1b0ca4..3e8b32419e68 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_mid.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_mid.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_mid.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_mid.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include "qla_def.h"</div><div class='ctx'> #include "qla_gbl.h"</div><div class='add'>+#include "qla_target.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='hunk'>@@ -49,6 +50,9 @@ qla24xx_allocate_vp_id(scsi_qla_host_t *vha)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ha-&gt;vport_slock, flags);</div><div class='ctx'> 	list_add_tail(&amp;vha-&gt;list, &amp;ha-&gt;vp_list);</div><div class='add'>+</div><div class='add'>+	qlt_update_vp_map(vha, SET_VP_IDX);</div><div class='add'>+</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ha-&gt;vport_slock, flags);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;ha-&gt;vport_lock);</div><div class='hunk'>@@ -79,6 +83,7 @@ qla24xx_deallocate_vp_id(scsi_qla_host_t *vha)</div><div class='ctx'> 		spin_lock_irqsave(&amp;ha-&gt;vport_slock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> 	list_del(&amp;vha-&gt;list);</div><div class='add'>+	qlt_update_vp_map(vha, RESET_VP_IDX);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ha-&gt;vport_slock, flags);</div><div class='ctx'> </div><div class='ctx'> 	vp_id = vha-&gt;vp_idx;</div><div class='hunk'>@@ -134,7 +139,7 @@ qla2x00_mark_vp_devices_dead(scsi_qla_host_t *vha)</div><div class='ctx'> 	list_for_each_entry(fcport, &amp;vha-&gt;vp_fcports, list) {</div><div class='ctx'> 		ql_dbg(ql_dbg_vport, vha, 0xa001,</div><div class='ctx'> 		    "Marking port dead, loop_id=0x%04x : %x.\n",</div><div class='del'>-		    fcport-&gt;loop_id, fcport-&gt;vp_idx);</div><div class='add'>+		    fcport-&gt;loop_id, fcport-&gt;vha-&gt;vp_idx);</div><div class='ctx'> </div><div class='ctx'> 		qla2x00_mark_device_lost(vha, fcport, 0, 0);</div><div class='ctx'> 		qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);</div><div class='hunk'>@@ -150,6 +155,9 @@ qla24xx_disable_vp(scsi_qla_host_t *vha)</div><div class='ctx'> 	atomic_set(&amp;vha-&gt;loop_state, LOOP_DOWN);</div><div class='ctx'> 	atomic_set(&amp;vha-&gt;loop_down_timer, LOOP_DOWN_TIME);</div><div class='ctx'> </div><div class='add'>+	/* Remove port id from vp target map */</div><div class='add'>+	qlt_update_vp_map(vha, RESET_AL_PA);</div><div class='add'>+</div><div class='ctx'> 	qla2x00_mark_vp_devices_dead(vha);</div><div class='ctx'> 	atomic_set(&amp;vha-&gt;vp_state, VP_FAILED);</div><div class='ctx'> 	vha-&gt;flags.management_server_logged_in = 0;</div><div class='hunk'>@@ -295,10 +303,8 @@ qla2x00_vp_abort_isp(scsi_qla_host_t *vha)</div><div class='ctx'> static int</div><div class='ctx'> qla2x00_do_dpc_vp(scsi_qla_host_t *vha)</div><div class='ctx'> {</div><div class='del'>-	ql_dbg(ql_dbg_dpc, vha, 0x4012,</div><div class='del'>-	    "Entering %s.\n", __func__);</div><div class='del'>-	ql_dbg(ql_dbg_dpc, vha, 0x4013,</div><div class='del'>-	    "vp_flags: 0x%lx.\n", vha-&gt;vp_flags);</div><div class='add'>+	ql_dbg(ql_dbg_dpc + ql_dbg_verbose, vha, 0x4012,</div><div class='add'>+	    "Entering %s vp_flags: 0x%lx.\n", __func__, vha-&gt;vp_flags);</div><div class='ctx'> </div><div class='ctx'> 	qla2x00_do_work(vha);</div><div class='ctx'> </div><div class='hunk'>@@ -348,7 +354,7 @@ qla2x00_do_dpc_vp(scsi_qla_host_t *vha)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ql_dbg(ql_dbg_dpc, vha, 0x401c,</div><div class='add'>+	ql_dbg(ql_dbg_dpc + ql_dbg_verbose, vha, 0x401c,</div><div class='ctx'> 	    "Exiting %s.\n", __func__);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c<br/>index f0528539bbbc..caf627ba7fa8 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_nx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_nx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_nx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_nx.c</a></div><div class='hunk'>@@ -1190,12 +1190,12 @@ qla82xx_pinit_from_rom(scsi_qla_host_t *vha)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Offset in flash = lower 16 bits</div><div class='del'>-	 * Number of enteries = upper 16 bits</div><div class='add'>+	 * Number of entries = upper 16 bits</div><div class='ctx'> 	 */</div><div class='ctx'> 	offset = n &amp; 0xffffU;</div><div class='ctx'> 	n = (n &gt;&gt; 16) &amp; 0xffffU;</div><div class='ctx'> </div><div class='del'>-	/* number of addr/value pair should not exceed 1024 enteries */</div><div class='add'>+	/* number of addr/value pair should not exceed 1024 entries */</div><div class='ctx'> 	if (n  &gt;= 1024) {</div><div class='ctx'> 		ql_log(ql_log_fatal, vha, 0x0071,</div><div class='ctx'> 		    "Card flash not initialized:n=0x%x.\n", n);</div><div class='hunk'>@@ -2050,7 +2050,7 @@ qla82xx_intr_handler(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	rsp = (struct rsp_que *) dev_id;</div><div class='ctx'> 	if (!rsp) {</div><div class='del'>-		ql_log(ql_log_info, NULL, 0xb054,</div><div class='add'>+		ql_log(ql_log_info, NULL, 0xb053,</div><div class='ctx'> 		    "%s: NULL response queue pointer.\n", __func__);</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2446,7 +2446,7 @@ qla82xx_load_fw(scsi_qla_host_t *vha)</div><div class='ctx'> </div><div class='ctx'> 	if (qla82xx_fw_load_from_flash(ha) == QLA_SUCCESS) {</div><div class='ctx'> 		ql_log(ql_log_info, vha, 0x00a1,</div><div class='del'>-		    "Firmware loaded successully from flash.\n");</div><div class='add'>+		    "Firmware loaded successfully from flash.\n");</div><div class='ctx'> 		return QLA_SUCCESS;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ql_log(ql_log_warn, vha, 0x0108,</div><div class='hunk'>@@ -2461,7 +2461,7 @@ try_blob_fw:</div><div class='ctx'> 	blob = ha-&gt;hablob = qla2x00_request_firmware(vha);</div><div class='ctx'> 	if (!blob) {</div><div class='ctx'> 		ql_log(ql_log_fatal, vha, 0x00a3,</div><div class='del'>-		    "Firmware image not preset.\n");</div><div class='add'>+		    "Firmware image not present.\n");</div><div class='ctx'> 		goto fw_load_failed;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2689,7 +2689,7 @@ qla82xx_write_flash_data(struct scsi_qla_host *vha, uint32_t *dwptr,</div><div class='ctx'> 		if (!optrom) {</div><div class='ctx'> 			ql_log(ql_log_warn, vha, 0xb01b,</div><div class='ctx'> 			    "Unable to allocate memory "</div><div class='del'>-			    "for optron burst write (%x KB).\n",</div><div class='add'>+			    "for optrom burst write (%x KB).\n",</div><div class='ctx'> 			    OPTROM_BURST_SIZE / 1024);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2960,9 +2960,8 @@ qla82xx_need_qsnt_handler(scsi_qla_host_t *vha)</div><div class='ctx'> 			 * changing the state to DEV_READY</div><div class='ctx'> 			 */</div><div class='ctx'> 			ql_log(ql_log_info, vha, 0xb023,</div><div class='del'>-			    "%s : QUIESCENT TIMEOUT.\n", QLA2XXX_DRIVER_NAME);</div><div class='del'>-			ql_log(ql_log_info, vha, 0xb024,</div><div class='del'>-			    "DRV_ACTIVE:%d DRV_STATE:%d.\n",</div><div class='add'>+			    "%s : QUIESCENT TIMEOUT DRV_ACTIVE:%d "</div><div class='add'>+			    "DRV_STATE:%d.\n", QLA2XXX_DRIVER_NAME,</div><div class='ctx'> 			    drv_active, drv_state);</div><div class='ctx'> 			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,</div><div class='ctx'> 			    QLA82XX_DEV_READY);</div><div class='hunk'>@@ -3125,10 +3124,11 @@ qla82xx_need_reset_handler(scsi_qla_host_t *vha)</div><div class='ctx'> 		ql_log(ql_log_info, vha, 0x00b7,</div><div class='ctx'> 		    "HW State: COLD/RE-INIT.\n");</div><div class='ctx'> 		qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA82XX_DEV_COLD);</div><div class='add'>+		qla82xx_set_rst_ready(ha);</div><div class='ctx'> 		if (ql2xmdenable) {</div><div class='ctx'> 			if (qla82xx_md_collect(vha))</div><div class='ctx'> 				ql_log(ql_log_warn, vha, 0xb02c,</div><div class='del'>-				    "Not able to collect minidump.\n");</div><div class='add'>+				    "Minidump not collected.\n");</div><div class='ctx'> 		} else</div><div class='ctx'> 			ql_log(ql_log_warn, vha, 0xb04f,</div><div class='ctx'> 			    "Minidump disabled.\n");</div><div class='hunk'>@@ -3159,11 +3159,11 @@ qla82xx_check_md_needed(scsi_qla_host_t *vha)</div><div class='ctx'> 				    "Firmware version differs "</div><div class='ctx'> 				    "Previous version: %d:%d:%d - "</div><div class='ctx'> 				    "New version: %d:%d:%d\n",</div><div class='add'>+				    fw_major_version, fw_minor_version,</div><div class='add'>+				    fw_subminor_version,</div><div class='ctx'> 				    ha-&gt;fw_major_version,</div><div class='ctx'> 				    ha-&gt;fw_minor_version,</div><div class='del'>-				    ha-&gt;fw_subminor_version,</div><div class='del'>-				    fw_major_version, fw_minor_version,</div><div class='del'>-				    fw_subminor_version);</div><div class='add'>+				    ha-&gt;fw_subminor_version);</div><div class='ctx'> 				/* Release MiniDump resources */</div><div class='ctx'> 				qla82xx_md_free(vha);</div><div class='ctx'> 				/* ALlocate MiniDump resources */</div><div class='hunk'>@@ -3324,6 +3324,30 @@ exit:</div><div class='ctx'> 	return rval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int qla82xx_check_temp(scsi_qla_host_t *vha)</div><div class='add'>+{</div><div class='add'>+	uint32_t temp, temp_state, temp_val;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+</div><div class='add'>+	temp = qla82xx_rd_32(ha, CRB_TEMP_STATE);</div><div class='add'>+	temp_state = qla82xx_get_temp_state(temp);</div><div class='add'>+	temp_val = qla82xx_get_temp_val(temp);</div><div class='add'>+</div><div class='add'>+	if (temp_state == QLA82XX_TEMP_PANIC) {</div><div class='add'>+		ql_log(ql_log_warn, vha, 0x600e,</div><div class='add'>+		    "Device temperature %d degrees C exceeds "</div><div class='add'>+		    " maximum allowed. Hardware has been shut down.\n",</div><div class='add'>+		    temp_val);</div><div class='add'>+		return 1;</div><div class='add'>+	} else if (temp_state == QLA82XX_TEMP_WARN) {</div><div class='add'>+		ql_log(ql_log_warn, vha, 0x600f,</div><div class='add'>+		    "Device temperature %d degrees C exceeds "</div><div class='add'>+		    "operating range. Immediate action needed.\n",</div><div class='add'>+		    temp_val);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void qla82xx_clear_pending_mbx(scsi_qla_host_t *vha)</div><div class='ctx'> {</div><div class='ctx'> 	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='hunk'>@@ -3346,18 +3370,20 @@ void qla82xx_watchdog(scsi_qla_host_t *vha)</div><div class='ctx'> 	/* don't poll if reset is going on */</div><div class='ctx'> 	if (!ha-&gt;flags.isp82xx_reset_hdlr_active) {</div><div class='ctx'> 		dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE);</div><div class='del'>-		if (dev_state == QLA82XX_DEV_NEED_RESET &amp;&amp;</div><div class='add'>+		if (qla82xx_check_temp(vha)) {</div><div class='add'>+			set_bit(ISP_UNRECOVERABLE, &amp;vha-&gt;dpc_flags);</div><div class='add'>+			ha-&gt;flags.isp82xx_fw_hung = 1;</div><div class='add'>+			qla82xx_clear_pending_mbx(vha);</div><div class='add'>+		} else if (dev_state == QLA82XX_DEV_NEED_RESET &amp;&amp;</div><div class='ctx'> 		    !test_bit(ISP_ABORT_NEEDED, &amp;vha-&gt;dpc_flags)) {</div><div class='ctx'> 			ql_log(ql_log_warn, vha, 0x6001,</div><div class='ctx'> 			    "Adapter reset needed.\n");</div><div class='ctx'> 			set_bit(ISP_ABORT_NEEDED, &amp;vha-&gt;dpc_flags);</div><div class='del'>-			qla2xxx_wake_dpc(vha);</div><div class='ctx'> 		} else if (dev_state == QLA82XX_DEV_NEED_QUIESCENT &amp;&amp;</div><div class='ctx'> 			!test_bit(ISP_QUIESCE_NEEDED, &amp;vha-&gt;dpc_flags)) {</div><div class='ctx'> 			ql_log(ql_log_warn, vha, 0x6002,</div><div class='ctx'> 			    "Quiescent needed.\n");</div><div class='ctx'> 			set_bit(ISP_QUIESCE_NEEDED, &amp;vha-&gt;dpc_flags);</div><div class='del'>-			qla2xxx_wake_dpc(vha);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (qla82xx_check_fw_alive(vha)) {</div><div class='ctx'> 				ql_dbg(ql_dbg_timer, vha, 0x6011,</div><div class='hunk'>@@ -3397,7 +3423,6 @@ void qla82xx_watchdog(scsi_qla_host_t *vha)</div><div class='ctx'> 					set_bit(ISP_ABORT_NEEDED,</div><div class='ctx'> 					    &amp;vha-&gt;dpc_flags);</div><div class='ctx'> 				}</div><div class='del'>-				qla2xxx_wake_dpc(vha);</div><div class='ctx'> 				ha-&gt;flags.isp82xx_fw_hung = 1;</div><div class='ctx'> 				ql_log(ql_log_warn, vha, 0x6007, "Firmware hung.\n");</div><div class='ctx'> 				qla82xx_clear_pending_mbx(vha);</div><div class='hunk'>@@ -4112,6 +4137,14 @@ qla82xx_md_collect(scsi_qla_host_t *vha)</div><div class='ctx'> 		goto md_failed;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ha-&gt;flags.isp82xx_no_md_cap) {</div><div class='add'>+		ql_log(ql_log_warn, vha, 0xb054,</div><div class='add'>+		    "Forced reset from application, "</div><div class='add'>+		    "ignore minidump capture\n");</div><div class='add'>+		ha-&gt;flags.isp82xx_no_md_cap = 0;</div><div class='add'>+		goto md_failed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (qla82xx_validate_template_chksum(vha)) {</div><div class='ctx'> 		ql_log(ql_log_info, vha, 0xb039,</div><div class='ctx'> 		    "Template checksum validation error\n");</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_nx.h b/drivers/scsi/qla2xxx/qla_nx.h<br/>index 4ac50e274661..6eb210e3cc63 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_nx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_nx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_nx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_nx.h</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #define CRB_RCVPEG_STATE		QLA82XX_REG(0x13c)</div><div class='ctx'> #define BOOT_LOADER_DIMM_STATUS		QLA82XX_REG(0x54)</div><div class='ctx'> #define CRB_DMA_SHIFT			QLA82XX_REG(0xcc)</div><div class='add'>+#define CRB_TEMP_STATE			QLA82XX_REG(0x1b4)</div><div class='ctx'> #define QLA82XX_DMA_SHIFT_VALUE		0x55555555</div><div class='ctx'> </div><div class='ctx'> #define QLA82XX_HW_H0_CH_HUB_ADR    0x05</div><div class='hunk'>@@ -561,7 +562,6 @@</div><div class='ctx'> #define QLA82XX_FW_VERSION_SUB		(QLA82XX_CAM_RAM(0x158))</div><div class='ctx'> #define QLA82XX_PCIE_REG(reg)		(QLA82XX_CRB_PCIE + (reg))</div><div class='ctx'> </div><div class='del'>-#define PCIE_CHICKEN3			(0x120c8)</div><div class='ctx'> #define PCIE_SETUP_FUNCTION		(0x12040)</div><div class='ctx'> #define PCIE_SETUP_FUNCTION2		(0x12048)</div><div class='ctx'> </div><div class='hunk'>@@ -1178,4 +1178,16 @@ static const int MD_MIU_TEST_AGT_RDDATA[] = { 0x410000A8, 0x410000AC,</div><div class='ctx'> #define CRB_NIU_XG_PAUSE_CTL_P0        0x1</div><div class='ctx'> #define CRB_NIU_XG_PAUSE_CTL_P1        0x8</div><div class='ctx'> </div><div class='add'>+#define qla82xx_get_temp_val(x)          ((x) &gt;&gt; 16)</div><div class='add'>+#define qla82xx_get_temp_state(x)        ((x) &amp; 0xffff)</div><div class='add'>+#define qla82xx_encode_temp(val, state)  (((val) &lt;&lt; 16) | (state))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Temperature control.</div><div class='add'>+ */</div><div class='add'>+enum {</div><div class='add'>+	QLA82XX_TEMP_NORMAL = 0x1, /* Normal operating range */</div><div class='add'>+	QLA82XX_TEMP_WARN,	   /* Sound alert, temperature getting high */</div><div class='add'>+	QLA82XX_TEMP_PANIC	   /* Fatal error, hardware has shut down. */</div><div class='add'>+};</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c<br/>index a2f999273a5f..6d1d873a20e2 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_os.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_os.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_os.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_os.c</a></div><div class='hunk'>@@ -13,12 +13,13 @@</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/kobject.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-</div><div class='ctx'> #include &lt;scsi/scsi_tcq.h&gt;</div><div class='ctx'> #include &lt;scsi/scsicam.h&gt;</div><div class='ctx'> #include &lt;scsi/scsi_transport.h&gt;</div><div class='ctx'> #include &lt;scsi/scsi_transport_fc.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "qla_target.h"</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Driver version</div><div class='ctx'>  */</div><div class='hunk'>@@ -40,6 +41,12 @@ static struct kmem_cache *ctx_cachep;</div><div class='ctx'>  */</div><div class='ctx'> int ql_errlev = ql_log_all;</div><div class='ctx'> </div><div class='add'>+int ql2xenableclass2;</div><div class='add'>+module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);</div><div class='add'>+MODULE_PARM_DESC(ql2xenableclass2,</div><div class='add'>+		"Specify if Class 2 operations are supported from the very "</div><div class='add'>+		"beginning. Default is 0 - class 2 not supported.");</div><div class='add'>+</div><div class='ctx'> int ql2xlogintimeout = 20;</div><div class='ctx'> module_param(ql2xlogintimeout, int, S_IRUGO);</div><div class='ctx'> MODULE_PARM_DESC(ql2xlogintimeout,</div><div class='hunk'>@@ -255,6 +262,8 @@ struct scsi_host_template qla2xxx_driver_template = {</div><div class='ctx'> </div><div class='ctx'> 	.max_sectors		= 0xFFFF,</div><div class='ctx'> 	.shost_attrs		= qla2x00_host_attrs,</div><div class='add'>+</div><div class='add'>+	.supported_mode		= MODE_INITIATOR,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct scsi_transport_template *qla2xxx_transport_template = NULL;</div><div class='hunk'>@@ -306,7 +315,8 @@ static void qla2x00_free_fw_dump(struct qla_hw_data *);</div><div class='ctx'> static void qla2x00_mem_free(struct qla_hw_data *);</div><div class='ctx'> </div><div class='ctx'> /* -------------------------------------------------------------------------- */</div><div class='del'>-static int qla2x00_alloc_queues(struct qla_hw_data *ha)</div><div class='add'>+static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,</div><div class='add'>+				struct rsp_que *rsp)</div><div class='ctx'> {</div><div class='ctx'> 	scsi_qla_host_t *vha = pci_get_drvdata(ha-&gt;pdev);</div><div class='ctx'> 	ha-&gt;req_q_map = kzalloc(sizeof(struct req_que *) * ha-&gt;max_req_queues,</div><div class='hunk'>@@ -324,6 +334,12 @@ static int qla2x00_alloc_queues(struct qla_hw_data *ha)</div><div class='ctx'> 		    "Unable to allocate memory for response queue ptrs.\n");</div><div class='ctx'> 		goto fail_rsp_map;</div><div class='ctx'> 	}</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure we record at least the request and response queue zero in</div><div class='add'>+	 * case we need to free them if part of the probe fails.</div><div class='add'>+	 */</div><div class='add'>+	ha-&gt;rsp_q_map[0] = rsp;</div><div class='add'>+	ha-&gt;req_q_map[0] = req;</div><div class='ctx'> 	set_bit(0, ha-&gt;rsp_qid_map);</div><div class='ctx'> 	set_bit(0, ha-&gt;req_qid_map);</div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -642,12 +658,12 @@ qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)</div><div class='ctx'> </div><div class='ctx'> 	if (ha-&gt;flags.eeh_busy) {</div><div class='ctx'> 		if (ha-&gt;flags.pci_channel_io_perm_failure) {</div><div class='del'>-			ql_dbg(ql_dbg_io, vha, 0x3001,</div><div class='add'>+			ql_dbg(ql_dbg_aer, vha, 0x9010,</div><div class='ctx'> 			    "PCI Channel IO permanent failure, exiting "</div><div class='ctx'> 			    "cmd=%p.\n", cmd);</div><div class='ctx'> 			cmd-&gt;result = DID_NO_CONNECT &lt;&lt; 16;</div><div class='ctx'> 		} else {</div><div class='del'>-			ql_dbg(ql_dbg_io, vha, 0x3002,</div><div class='add'>+			ql_dbg(ql_dbg_aer, vha, 0x9011,</div><div class='ctx'> 			    "EEH_Busy, Requeuing the cmd=%p.\n", cmd);</div><div class='ctx'> 			cmd-&gt;result = DID_REQUEUE &lt;&lt; 16;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -657,7 +673,7 @@ qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)</div><div class='ctx'> 	rval = fc_remote_port_chkready(rport);</div><div class='ctx'> 	if (rval) {</div><div class='ctx'> 		cmd-&gt;result = rval;</div><div class='del'>-		ql_dbg(ql_dbg_io, vha, 0x3003,</div><div class='add'>+		ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,</div><div class='ctx'> 		    "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",</div><div class='ctx'> 		    cmd, rval);</div><div class='ctx'> 		goto qc24_fail_command;</div><div class='hunk'>@@ -1136,7 +1152,7 @@ qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)</div><div class='ctx'> 	ret = FAILED;</div><div class='ctx'> </div><div class='ctx'> 	ql_log(ql_log_info, vha, 0x8012,</div><div class='del'>-	    "BUS RESET ISSUED nexus=%ld:%d%d.\n", vha-&gt;host_no, id, lun);</div><div class='add'>+	    "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha-&gt;host_no, id, lun);</div><div class='ctx'> </div><div class='ctx'> 	if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {</div><div class='ctx'> 		ql_log(ql_log_fatal, vha, 0x8013,</div><div class='hunk'>@@ -2180,6 +2196,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	ql_dbg_pci(ql_dbg_init, pdev, 0x000a,</div><div class='ctx'> 	    "Memory allocated for ha=%p.\n", ha);</div><div class='ctx'> 	ha-&gt;pdev = pdev;</div><div class='add'>+	ha-&gt;tgt.enable_class_2 = ql2xenableclass2;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear our data area */</div><div class='ctx'> 	ha-&gt;bars = bars;</div><div class='hunk'>@@ -2243,6 +2260,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 		ha-&gt;mbx_count = MAILBOX_REGISTER_COUNT;</div><div class='ctx'> 		req_length = REQUEST_ENTRY_CNT_24XX;</div><div class='ctx'> 		rsp_length = RESPONSE_ENTRY_CNT_2300;</div><div class='add'>+		ha-&gt;tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;</div><div class='ctx'> 		ha-&gt;max_loop_id = SNS_LAST_LOOP_ID_2300;</div><div class='ctx'> 		ha-&gt;init_cb_size = sizeof(struct mid_init_cb_24xx);</div><div class='ctx'> 		ha-&gt;gid_list_info_size = 8;</div><div class='hunk'>@@ -2258,6 +2276,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 		ha-&gt;mbx_count = MAILBOX_REGISTER_COUNT;</div><div class='ctx'> 		req_length = REQUEST_ENTRY_CNT_24XX;</div><div class='ctx'> 		rsp_length = RESPONSE_ENTRY_CNT_2300;</div><div class='add'>+		ha-&gt;tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;</div><div class='ctx'> 		ha-&gt;max_loop_id = SNS_LAST_LOOP_ID_2300;</div><div class='ctx'> 		ha-&gt;init_cb_size = sizeof(struct mid_init_cb_24xx);</div><div class='ctx'> 		ha-&gt;gid_list_info_size = 8;</div><div class='hunk'>@@ -2417,6 +2436,17 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	    host-&gt;max_cmd_len, host-&gt;max_channel, host-&gt;max_lun,</div><div class='ctx'> 	    host-&gt;transportt, sht-&gt;vendor_id);</div><div class='ctx'> </div><div class='add'>+que_init:</div><div class='add'>+	/* Alloc arrays of request and response ring ptrs */</div><div class='add'>+	if (!qla2x00_alloc_queues(ha, req, rsp)) {</div><div class='add'>+		ql_log(ql_log_fatal, base_vha, 0x003d,</div><div class='add'>+		    "Failed to allocate memory for queue pointers..."</div><div class='add'>+		    "aborting.\n");</div><div class='add'>+		goto probe_init_failed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qlt_probe_one_stage1(base_vha, ha);</div><div class='add'>+</div><div class='ctx'> 	/* Set up the irqs */</div><div class='ctx'> 	ret = qla2x00_request_irqs(ha, rsp);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -2424,20 +2454,10 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	pci_save_state(pdev);</div><div class='ctx'> </div><div class='del'>-	/* Alloc arrays of request and response ring ptrs */</div><div class='del'>-que_init:</div><div class='del'>-	if (!qla2x00_alloc_queues(ha)) {</div><div class='del'>-		ql_log(ql_log_fatal, base_vha, 0x003d,</div><div class='del'>-		    "Failed to allocate memory for queue pointers.. aborting.\n");</div><div class='del'>-		goto probe_init_failed;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ha-&gt;rsp_q_map[0] = rsp;</div><div class='del'>-	ha-&gt;req_q_map[0] = req;</div><div class='add'>+	/* Assign back pointers */</div><div class='ctx'> 	rsp-&gt;req = req;</div><div class='ctx'> 	req-&gt;rsp = rsp;</div><div class='del'>-	set_bit(0, ha-&gt;req_qid_map);</div><div class='del'>-	set_bit(0, ha-&gt;rsp_qid_map);</div><div class='add'>+</div><div class='ctx'> 	/* FWI2-capable only. */</div><div class='ctx'> 	req-&gt;req_q_in = &amp;ha-&gt;iobase-&gt;isp24.req_q_in;</div><div class='ctx'> 	req-&gt;req_q_out = &amp;ha-&gt;iobase-&gt;isp24.req_q_out;</div><div class='hunk'>@@ -2514,6 +2534,14 @@ que_init:</div><div class='ctx'> 	ql_dbg(ql_dbg_init, base_vha, 0x00ee,</div><div class='ctx'> 	    "DPC thread started successfully.\n");</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If we're not coming up in initiator mode, we might sit for</div><div class='add'>+	 * a while without waking up the dpc thread, which leads to a</div><div class='add'>+	 * stuck process warning.  So just kick the dpc once here and</div><div class='add'>+	 * let the kthread start (and go back to sleep in qla2x00_do_dpc).</div><div class='add'>+	 */</div><div class='add'>+	qla2xxx_wake_dpc(base_vha);</div><div class='add'>+</div><div class='ctx'> skip_dpc:</div><div class='ctx'> 	list_add_tail(&amp;base_vha-&gt;list, &amp;ha-&gt;vp_list);</div><div class='ctx'> 	base_vha-&gt;host-&gt;irq = ha-&gt;pdev-&gt;irq;</div><div class='hunk'>@@ -2559,7 +2587,11 @@ skip_dpc:</div><div class='ctx'> 	ql_dbg(ql_dbg_init, base_vha, 0x00f2,</div><div class='ctx'> 	    "Init done and hba is online.\n");</div><div class='ctx'> </div><div class='del'>-	scsi_scan_host(host);</div><div class='add'>+	if (qla_ini_mode_enabled(base_vha))</div><div class='add'>+		scsi_scan_host(host);</div><div class='add'>+	else</div><div class='add'>+		ql_dbg(ql_dbg_init, base_vha, 0x0122,</div><div class='add'>+			"skipping scsi_scan_host() for non-initiator port\n");</div><div class='ctx'> </div><div class='ctx'> 	qla2x00_alloc_sysfs_attr(base_vha);</div><div class='ctx'> </div><div class='hunk'>@@ -2577,11 +2609,17 @@ skip_dpc:</div><div class='ctx'> 	    base_vha-&gt;host_no,</div><div class='ctx'> 	    ha-&gt;isp_ops-&gt;fw_version_str(base_vha, fw_str));</div><div class='ctx'> </div><div class='add'>+	qlt_add_target(ha, base_vha);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> probe_init_failed:</div><div class='ctx'> 	qla2x00_free_req_que(ha, req);</div><div class='add'>+	ha-&gt;req_q_map[0] = NULL;</div><div class='add'>+	clear_bit(0, ha-&gt;req_qid_map);</div><div class='ctx'> 	qla2x00_free_rsp_que(ha, rsp);</div><div class='add'>+	ha-&gt;rsp_q_map[0] = NULL;</div><div class='add'>+	clear_bit(0, ha-&gt;rsp_qid_map);</div><div class='ctx'> 	ha-&gt;max_req_queues = ha-&gt;max_rsp_queues = 0;</div><div class='ctx'> </div><div class='ctx'> probe_failed:</div><div class='hunk'>@@ -2621,6 +2659,22 @@ probe_out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='add'>+qla2x00_stop_dpc_thread(scsi_qla_host_t *vha)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct task_struct *t = ha-&gt;dpc_thread;</div><div class='add'>+</div><div class='add'>+	if (ha-&gt;dpc_thread == NULL)</div><div class='add'>+		return;</div><div class='add'>+	/*</div><div class='add'>+	 * qla2xxx_wake_dpc checks for -&gt;dpc_thread</div><div class='add'>+	 * so we need to zero it out.</div><div class='add'>+	 */</div><div class='add'>+	ha-&gt;dpc_thread = NULL;</div><div class='add'>+	kthread_stop(t);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='ctx'> qla2x00_shutdown(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	scsi_qla_host_t *vha;</div><div class='hunk'>@@ -2663,9 +2717,18 @@ qla2x00_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 	struct qla_hw_data  *ha;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If the PCI device is disabled that means that probe failed and any</div><div class='add'>+	 * resources should be have cleaned up on probe exit.</div><div class='add'>+	 */</div><div class='add'>+	if (!atomic_read(&amp;pdev-&gt;enable_cnt))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	base_vha = pci_get_drvdata(pdev);</div><div class='ctx'> 	ha = base_vha-&gt;hw;</div><div class='ctx'> </div><div class='add'>+	ha-&gt;flags.host_shutting_down = 1;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;ha-&gt;vport_lock);</div><div class='ctx'> 	while (ha-&gt;cur_vport_count) {</div><div class='ctx'> 		struct Scsi_Host *scsi_host;</div><div class='hunk'>@@ -2719,6 +2782,7 @@ qla2x00_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 		ha-&gt;dpc_thread = NULL;</div><div class='ctx'> 		kthread_stop(t);</div><div class='ctx'> 	}</div><div class='add'>+	qlt_remove_target(ha, base_vha);</div><div class='ctx'> </div><div class='ctx'> 	qla2x00_free_sysfs_attr(base_vha);</div><div class='ctx'> </div><div class='hunk'>@@ -2770,17 +2834,7 @@ qla2x00_free_device(scsi_qla_host_t *vha)</div><div class='ctx'> 	if (vha-&gt;timer_active)</div><div class='ctx'> 		qla2x00_stop_timer(vha);</div><div class='ctx'> </div><div class='del'>-	/* Kill the kernel thread for this host */</div><div class='del'>-	if (ha-&gt;dpc_thread) {</div><div class='del'>-		struct task_struct *t = ha-&gt;dpc_thread;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * qla2xxx_wake_dpc checks for -&gt;dpc_thread</div><div class='del'>-		 * so we need to zero it out.</div><div class='del'>-		 */</div><div class='del'>-		ha-&gt;dpc_thread = NULL;</div><div class='del'>-		kthread_stop(t);</div><div class='del'>-	}</div><div class='add'>+	qla2x00_stop_dpc_thread(vha);</div><div class='ctx'> </div><div class='ctx'> 	qla25xx_delete_queues(vha);</div><div class='ctx'> </div><div class='hunk'>@@ -2842,8 +2896,10 @@ qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,</div><div class='ctx'> 		spin_unlock_irqrestore(vha-&gt;host-&gt;host_lock, flags);</div><div class='ctx'> 		set_bit(FCPORT_UPDATE_NEEDED, &amp;base_vha-&gt;dpc_flags);</div><div class='ctx'> 		qla2xxx_wake_dpc(base_vha);</div><div class='del'>-	} else</div><div class='add'>+	} else {</div><div class='ctx'> 		fc_remote_port_delete(rport);</div><div class='add'>+		qlt_fc_port_deleted(vha, fcport);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2859,7 +2915,7 @@ void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,</div><div class='ctx'>     int do_login, int defer)</div><div class='ctx'> {</div><div class='ctx'> 	if (atomic_read(&amp;fcport-&gt;state) == FCS_ONLINE &amp;&amp;</div><div class='del'>-	    vha-&gt;vp_idx == fcport-&gt;vp_idx) {</div><div class='add'>+	    vha-&gt;vp_idx == fcport-&gt;vha-&gt;vp_idx) {</div><div class='ctx'> 		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);</div><div class='ctx'> 		qla2x00_schedule_rport_del(vha, fcport, defer);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2908,7 +2964,7 @@ qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)</div><div class='ctx'> 	fc_port_t *fcport;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(fcport, &amp;vha-&gt;vp_fcports, list) {</div><div class='del'>-		if (vha-&gt;vp_idx != 0 &amp;&amp; vha-&gt;vp_idx != fcport-&gt;vp_idx)</div><div class='add'>+		if (vha-&gt;vp_idx != 0 &amp;&amp; vha-&gt;vp_idx != fcport-&gt;vha-&gt;vp_idx)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -2921,7 +2977,7 @@ qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)</div><div class='ctx'> 			qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);</div><div class='ctx'> 			if (defer)</div><div class='ctx'> 				qla2x00_schedule_rport_del(vha, fcport, defer);</div><div class='del'>-			else if (vha-&gt;vp_idx == fcport-&gt;vp_idx)</div><div class='add'>+			else if (vha-&gt;vp_idx == fcport-&gt;vha-&gt;vp_idx)</div><div class='ctx'> 				qla2x00_schedule_rport_del(vha, fcport, defer);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2946,10 +3002,13 @@ qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,</div><div class='ctx'> 	if (!ha-&gt;init_cb)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='add'>+	if (qlt_mem_alloc(ha) &lt; 0)</div><div class='add'>+		goto fail_free_init_cb;</div><div class='add'>+</div><div class='ctx'> 	ha-&gt;gid_list = dma_alloc_coherent(&amp;ha-&gt;pdev-&gt;dev,</div><div class='ctx'> 		qla2x00_gid_list_size(ha), &amp;ha-&gt;gid_list_dma, GFP_KERNEL);</div><div class='ctx'> 	if (!ha-&gt;gid_list)</div><div class='del'>-		goto fail_free_init_cb;</div><div class='add'>+		goto fail_free_tgt_mem;</div><div class='ctx'> </div><div class='ctx'> 	ha-&gt;srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);</div><div class='ctx'> 	if (!ha-&gt;srb_mempool)</div><div class='hunk'>@@ -3167,6 +3226,8 @@ fail_free_gid_list:</div><div class='ctx'> 	ha-&gt;gid_list_dma);</div><div class='ctx'> 	ha-&gt;gid_list = NULL;</div><div class='ctx'> 	ha-&gt;gid_list_dma = 0;</div><div class='add'>+fail_free_tgt_mem:</div><div class='add'>+	qlt_mem_free(ha);</div><div class='ctx'> fail_free_init_cb:</div><div class='ctx'> 	dma_free_coherent(&amp;ha-&gt;pdev-&gt;dev, ha-&gt;init_cb_size, ha-&gt;init_cb,</div><div class='ctx'> 	ha-&gt;init_cb_dma);</div><div class='hunk'>@@ -3282,6 +3343,8 @@ qla2x00_mem_free(struct qla_hw_data *ha)</div><div class='ctx'> 	if (ha-&gt;ctx_mempool)</div><div class='ctx'> 		mempool_destroy(ha-&gt;ctx_mempool);</div><div class='ctx'> </div><div class='add'>+	qlt_mem_free(ha);</div><div class='add'>+</div><div class='ctx'> 	if (ha-&gt;init_cb)</div><div class='ctx'> 		dma_free_coherent(&amp;ha-&gt;pdev-&gt;dev, ha-&gt;init_cb_size,</div><div class='ctx'> 			ha-&gt;init_cb, ha-&gt;init_cb_dma);</div><div class='hunk'>@@ -3311,6 +3374,10 @@ qla2x00_mem_free(struct qla_hw_data *ha)</div><div class='ctx'> </div><div class='ctx'> 	ha-&gt;gid_list = NULL;</div><div class='ctx'> 	ha-&gt;gid_list_dma = 0;</div><div class='add'>+</div><div class='add'>+	ha-&gt;tgt.atio_ring = NULL;</div><div class='add'>+	ha-&gt;tgt.atio_dma = 0;</div><div class='add'>+	ha-&gt;tgt.tgt_vp_map = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,</div><div class='hunk'>@@ -3577,9 +3644,25 @@ void qla2x00_relogin(struct scsi_qla_host *vha)</div><div class='ctx'> 						continue;</div><div class='ctx'> 					/* Attempt a retry. */</div><div class='ctx'> 					status = 1;</div><div class='del'>-				} else</div><div class='add'>+				} else {</div><div class='ctx'> 					status = qla2x00_fabric_login(vha,</div><div class='ctx'> 					    fcport, &amp;next_loopid);</div><div class='add'>+					if (status ==  QLA_SUCCESS) {</div><div class='add'>+						int status2;</div><div class='add'>+						uint8_t opts;</div><div class='add'>+</div><div class='add'>+						opts = 0;</div><div class='add'>+						if (fcport-&gt;flags &amp;</div><div class='add'>+						    FCF_FCP2_DEVICE)</div><div class='add'>+							opts |= BIT_1;</div><div class='add'>+							status2 =</div><div class='add'>+							    qla2x00_get_port_database(</div><div class='add'>+								vha, fcport,</div><div class='add'>+								opts);</div><div class='add'>+						if (status2 != QLA_SUCCESS)</div><div class='add'>+							status = 1;</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='ctx'> 			} else</div><div class='ctx'> 				status = qla2x00_local_device_login(vha,</div><div class='ctx'> 								fcport);</div><div class='hunk'>@@ -3655,10 +3738,9 @@ qla2x00_do_dpc(void *data)</div><div class='ctx'> </div><div class='ctx'> 		ha-&gt;dpc_active = 1;</div><div class='ctx'> </div><div class='del'>-		ql_dbg(ql_dbg_dpc, base_vha, 0x4001,</div><div class='del'>-		    "DPC handler waking up.\n");</div><div class='del'>-		ql_dbg(ql_dbg_dpc, base_vha, 0x4002,</div><div class='del'>-		    "dpc_flags=0x%lx.\n", base_vha-&gt;dpc_flags);</div><div class='add'>+		ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,</div><div class='add'>+		    "DPC handler waking up, dpc_flags=0x%lx.\n",</div><div class='add'>+		    base_vha-&gt;dpc_flags);</div><div class='ctx'> </div><div class='ctx'> 		qla2x00_do_work(base_vha);</div><div class='ctx'> </div><div class='hunk'>@@ -3724,6 +3806,16 @@ qla2x00_do_dpc(void *data)</div><div class='ctx'> 			clear_bit(FCPORT_UPDATE_NEEDED, &amp;base_vha-&gt;dpc_flags);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (test_bit(SCR_PENDING, &amp;base_vha-&gt;dpc_flags)) {</div><div class='add'>+			int ret;</div><div class='add'>+			ret = qla2x00_send_change_request(base_vha, 0x3, 0);</div><div class='add'>+			if (ret != QLA_SUCCESS)</div><div class='add'>+				ql_log(ql_log_warn, base_vha, 0x121,</div><div class='add'>+				    "Failed to enable receiving of RSCN "</div><div class='add'>+				    "requests: 0x%x.\n", ret);</div><div class='add'>+			clear_bit(SCR_PENDING, &amp;base_vha-&gt;dpc_flags);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (test_bit(ISP_QUIESCE_NEEDED, &amp;base_vha-&gt;dpc_flags)) {</div><div class='ctx'> 			ql_dbg(ql_dbg_dpc, base_vha, 0x4009,</div><div class='ctx'> 			    "Quiescence mode scheduled.\n");</div><div class='hunk'>@@ -4106,8 +4198,7 @@ qla2x00_release_firmware(void)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;qla_fw_lock);</div><div class='ctx'> 	for (idx = 0; idx &lt; FW_BLOBS; idx++)</div><div class='del'>-		if (qla_fw_blobs[idx].fw)</div><div class='del'>-			release_firmware(qla_fw_blobs[idx].fw);</div><div class='add'>+		release_firmware(qla_fw_blobs[idx].fw);</div><div class='ctx'> 	mutex_unlock(&amp;qla_fw_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4442,6 +4533,21 @@ qla2x00_module_init(void)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Initialize target kmem_cache and mem_pools */</div><div class='add'>+	ret = qlt_init();</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		kmem_cache_destroy(srb_cachep);</div><div class='add'>+		return ret;</div><div class='add'>+	} else if (ret &gt; 0) {</div><div class='add'>+		/*</div><div class='add'>+		 * If initiator mode is explictly disabled by qlt_init(),</div><div class='add'>+		 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from</div><div class='add'>+		 * performing scsi_scan_target() during LOOP UP event.</div><div class='add'>+		 */</div><div class='add'>+		qla2xxx_transport_functions.disable_target_scan = 1;</div><div class='add'>+		qla2xxx_transport_vport_functions.disable_target_scan = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Derive version string. */</div><div class='ctx'> 	strcpy(qla2x00_version_str, QLA2XXX_VERSION);</div><div class='ctx'> 	if (ql2xextended_error_logging)</div><div class='hunk'>@@ -4453,6 +4559,7 @@ qla2x00_module_init(void)</div><div class='ctx'> 		kmem_cache_destroy(srb_cachep);</div><div class='ctx'> 		ql_log(ql_log_fatal, NULL, 0x0002,</div><div class='ctx'> 		    "fc_attach_transport failed...Failing load!.\n");</div><div class='add'>+		qlt_exit();</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4466,6 +4573,7 @@ qla2x00_module_init(void)</div><div class='ctx'> 	    fc_attach_transport(&amp;qla2xxx_transport_vport_functions);</div><div class='ctx'> 	if (!qla2xxx_transport_vport_template) {</div><div class='ctx'> 		kmem_cache_destroy(srb_cachep);</div><div class='add'>+		qlt_exit();</div><div class='ctx'> 		fc_release_transport(qla2xxx_transport_template);</div><div class='ctx'> 		ql_log(ql_log_fatal, NULL, 0x0004,</div><div class='ctx'> 		    "fc_attach_transport vport failed...Failing load!.\n");</div><div class='hunk'>@@ -4477,6 +4585,7 @@ qla2x00_module_init(void)</div><div class='ctx'> 	ret = pci_register_driver(&amp;qla2xxx_pci_driver);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		kmem_cache_destroy(srb_cachep);</div><div class='add'>+		qlt_exit();</div><div class='ctx'> 		fc_release_transport(qla2xxx_transport_template);</div><div class='ctx'> 		fc_release_transport(qla2xxx_transport_vport_template);</div><div class='ctx'> 		ql_log(ql_log_fatal, NULL, 0x0006,</div><div class='hunk'>@@ -4496,6 +4605,7 @@ qla2x00_module_exit(void)</div><div class='ctx'> 	pci_unregister_driver(&amp;qla2xxx_pci_driver);</div><div class='ctx'> 	qla2x00_release_firmware();</div><div class='ctx'> 	kmem_cache_destroy(srb_cachep);</div><div class='add'>+	qlt_exit();</div><div class='ctx'> 	if (ctx_cachep)</div><div class='ctx'> 		kmem_cache_destroy(ctx_cachep);</div><div class='ctx'> 	fc_release_transport(qla2xxx_transport_template);</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c<br/>index 3c13c0a6be63..a683e766d1ae 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_sup.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_sup.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_sup.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_sup.c</a></div><div class='hunk'>@@ -1017,6 +1017,9 @@ qla2xxx_flash_npiv_conf(scsi_qla_host_t *vha)</div><div class='ctx'> 	    !IS_CNA_CAPABLE(ha) &amp;&amp; !IS_QLA2031(ha))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (ha-&gt;flags.isp82xx_reset_hdlr_active)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	ha-&gt;isp_ops-&gt;read_optrom(vha, (uint8_t *)&amp;hdr,</div><div class='ctx'> 	    ha-&gt;flt_region_npiv_conf &lt;&lt; 2, sizeof(struct qla_npiv_header));</div><div class='ctx'> 	if (hdr.version == __constant_cpu_to_le16(0xffff))</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_target.c b/drivers/scsi/qla2xxx/qla_target.c<br/>new file mode 100644<br/>index 000000000000..04f80ebf09eb<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_target.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_target.c</a></div><div class='hunk'>@@ -0,0 +1,4973 @@</div><div class='add'>+/*</div><div class='add'>+ *  qla_target.c SCSI LLD infrastructure for QLogic 22xx/23xx/24xx/25xx</div><div class='add'>+ *</div><div class='add'>+ *  based on qla2x00t.c code:</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2004 - 2010 Vladislav Bolkhovitin &lt;vst@vlnb.net&gt;</div><div class='add'>+ *  Copyright (C) 2004 - 2005 Leonid Stoljar</div><div class='add'>+ *  Copyright (C) 2006 Nathaniel Clark &lt;nate@misrule.us&gt;</div><div class='add'>+ *  Copyright (C) 2006 - 2010 ID7 Ltd.</div><div class='add'>+ *</div><div class='add'>+ *  Forward port and refactoring to modern qla2xxx and target/configfs</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2010-2011 Nicholas A. Bellinger &lt;nab@kernel.org&gt;</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or</div><div class='add'>+ *  modify it under the terms of the GNU General Public License</div><div class='add'>+ *  as published by the Free Software Foundation, version 2</div><div class='add'>+ *  of the License.</div><div class='add'>+ *</div><div class='add'>+ *  This program is distributed in the hope that it will be useful,</div><div class='add'>+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='add'>+ *  GNU General Public License for more details.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/version.h&gt;</div><div class='add'>+#include &lt;linux/blkdev.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;asm/unaligned.h&gt;</div><div class='add'>+#include &lt;scsi/scsi.h&gt;</div><div class='add'>+#include &lt;scsi/scsi_host.h&gt;</div><div class='add'>+#include &lt;scsi/scsi_tcq.h&gt;</div><div class='add'>+#include &lt;target/target_core_base.h&gt;</div><div class='add'>+#include &lt;target/target_core_fabric.h&gt;</div><div class='add'>+</div><div class='add'>+#include "qla_def.h"</div><div class='add'>+#include "qla_target.h"</div><div class='add'>+</div><div class='add'>+static char *qlini_mode = QLA2XXX_INI_MODE_STR_ENABLED;</div><div class='add'>+module_param(qlini_mode, charp, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(qlini_mode,</div><div class='add'>+	"Determines when initiator mode will be enabled. Possible values: "</div><div class='add'>+	"\"exclusive\" - initiator mode will be enabled on load, "</div><div class='add'>+	"disabled on enabling target mode and then on disabling target mode "</div><div class='add'>+	"enabled back; "</div><div class='add'>+	"\"disabled\" - initiator mode will never be enabled; "</div><div class='add'>+	"\"enabled\" (default) - initiator mode will always stay enabled.");</div><div class='add'>+</div><div class='add'>+static int ql2x_ini_mode = QLA2XXX_INI_MODE_EXCLUSIVE;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * From scsi/fc/fc_fcp.h</div><div class='add'>+ */</div><div class='add'>+enum fcp_resp_rsp_codes {</div><div class='add'>+	FCP_TMF_CMPL = 0,</div><div class='add'>+	FCP_DATA_LEN_INVALID = 1,</div><div class='add'>+	FCP_CMND_FIELDS_INVALID = 2,</div><div class='add'>+	FCP_DATA_PARAM_MISMATCH = 3,</div><div class='add'>+	FCP_TMF_REJECTED = 4,</div><div class='add'>+	FCP_TMF_FAILED = 5,</div><div class='add'>+	FCP_TMF_INVALID_LUN = 9,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * fc_pri_ta from scsi/fc/fc_fcp.h</div><div class='add'>+ */</div><div class='add'>+#define FCP_PTA_SIMPLE      0   /* simple task attribute */</div><div class='add'>+#define FCP_PTA_HEADQ       1   /* head of queue task attribute */</div><div class='add'>+#define FCP_PTA_ORDERED     2   /* ordered task attribute */</div><div class='add'>+#define FCP_PTA_ACA         4   /* auto. contigent allegiance */</div><div class='add'>+#define FCP_PTA_MASK        7   /* mask for task attribute field */</div><div class='add'>+#define FCP_PRI_SHIFT       3   /* priority field starts in bit 3 */</div><div class='add'>+#define FCP_PRI_RESVD_MASK  0x80        /* reserved bits in priority field */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This driver calls qla2x00_alloc_iocbs() and qla2x00_issue_marker(), which</div><div class='add'>+ * must be called under HW lock and could unlock/lock it inside.</div><div class='add'>+ * It isn't an issue, since in the current implementation on the time when</div><div class='add'>+ * those functions are called:</div><div class='add'>+ *</div><div class='add'>+ *   - Either context is IRQ and only IRQ handler can modify HW data,</div><div class='add'>+ *     including rings related fields,</div><div class='add'>+ *</div><div class='add'>+ *   - Or access to target mode variables from struct qla_tgt doesn't</div><div class='add'>+ *     cross those functions boundaries, except tgt_stop, which</div><div class='add'>+ *     additionally protected by irq_cmd_count.</div><div class='add'>+ */</div><div class='add'>+/* Predefs for callbacks handed to qla2xxx LLD */</div><div class='add'>+static void qlt_24xx_atio_pkt(struct scsi_qla_host *ha,</div><div class='add'>+	struct atio_from_isp *pkt);</div><div class='add'>+static void qlt_response_pkt(struct scsi_qla_host *ha, response_t *pkt);</div><div class='add'>+static int qlt_issue_task_mgmt(struct qla_tgt_sess *sess, uint32_t lun,</div><div class='add'>+	int fn, void *iocb, int flags);</div><div class='add'>+static void qlt_send_term_exchange(struct scsi_qla_host *ha, struct qla_tgt_cmd</div><div class='add'>+	*cmd, struct atio_from_isp *atio, int ha_locked);</div><div class='add'>+static void qlt_reject_free_srr_imm(struct scsi_qla_host *ha,</div><div class='add'>+	struct qla_tgt_srr_imm *imm, int ha_lock);</div><div class='add'>+/*</div><div class='add'>+ * Global Variables</div><div class='add'>+ */</div><div class='add'>+static struct kmem_cache *qla_tgt_cmd_cachep;</div><div class='add'>+static struct kmem_cache *qla_tgt_mgmt_cmd_cachep;</div><div class='add'>+static mempool_t *qla_tgt_mgmt_cmd_mempool;</div><div class='add'>+static struct workqueue_struct *qla_tgt_wq;</div><div class='add'>+static DEFINE_MUTEX(qla_tgt_mutex);</div><div class='add'>+static LIST_HEAD(qla_tgt_glist);</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry (to protect tgt-&gt;sess_list) */</div><div class='add'>+static struct qla_tgt_sess *qlt_find_sess_by_port_name(</div><div class='add'>+	struct qla_tgt *tgt,</div><div class='add'>+	const uint8_t *port_name)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_sess *sess;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(sess, &amp;tgt-&gt;sess_list, sess_list_entry) {</div><div class='add'>+		if (!memcmp(sess-&gt;port_name, port_name, WWN_SIZE))</div><div class='add'>+			return sess;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Might release hw lock, then reaquire!! */</div><div class='add'>+static inline int qlt_issue_marker(struct scsi_qla_host *vha, int vha_locked)</div><div class='add'>+{</div><div class='add'>+	/* Send marker if required */</div><div class='add'>+	if (unlikely(vha-&gt;marker_needed != 0)) {</div><div class='add'>+		int rc = qla2x00_issue_marker(vha, vha_locked);</div><div class='add'>+		if (rc != QLA_SUCCESS) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe03d,</div><div class='add'>+			    "qla_target(%d): issue_marker() failed\n",</div><div class='add'>+			    vha-&gt;vp_idx);</div><div class='add'>+		}</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+	return QLA_SUCCESS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline</div><div class='add'>+struct scsi_qla_host *qlt_find_host_by_d_id(struct scsi_qla_host *vha,</div><div class='add'>+	uint8_t *d_id)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	uint8_t vp_idx;</div><div class='add'>+</div><div class='add'>+	if ((vha-&gt;d_id.b.area != d_id[1]) || (vha-&gt;d_id.b.domain != d_id[0]))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (vha-&gt;d_id.b.al_pa == d_id[2])</div><div class='add'>+		return vha;</div><div class='add'>+</div><div class='add'>+	BUG_ON(ha-&gt;tgt.tgt_vp_map == NULL);</div><div class='add'>+	vp_idx = ha-&gt;tgt.tgt_vp_map[d_id[2]].idx;</div><div class='add'>+	if (likely(test_bit(vp_idx, ha-&gt;vp_idx_map)))</div><div class='add'>+		return ha-&gt;tgt.tgt_vp_map[vp_idx].vha;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline</div><div class='add'>+struct scsi_qla_host *qlt_find_host_by_vp_idx(struct scsi_qla_host *vha,</div><div class='add'>+	uint16_t vp_idx)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+</div><div class='add'>+	if (vha-&gt;vp_idx == vp_idx)</div><div class='add'>+		return vha;</div><div class='add'>+</div><div class='add'>+	BUG_ON(ha-&gt;tgt.tgt_vp_map == NULL);</div><div class='add'>+	if (likely(test_bit(vp_idx, ha-&gt;vp_idx_map)))</div><div class='add'>+		return ha-&gt;tgt.tgt_vp_map[vp_idx].vha;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qlt_24xx_atio_pkt_all_vps(struct scsi_qla_host *vha,</div><div class='add'>+	struct atio_from_isp *atio)</div><div class='add'>+{</div><div class='add'>+	switch (atio-&gt;u.raw.entry_type) {</div><div class='add'>+	case ATIO_TYPE7:</div><div class='add'>+	{</div><div class='add'>+		struct scsi_qla_host *host = qlt_find_host_by_d_id(vha,</div><div class='add'>+		    atio-&gt;u.isp24.fcp_hdr.d_id);</div><div class='add'>+		if (unlikely(NULL == host)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe03e,</div><div class='add'>+			    "qla_target(%d): Received ATIO_TYPE7 "</div><div class='add'>+			    "with unknown d_id %x:%x:%x\n", vha-&gt;vp_idx,</div><div class='add'>+			    atio-&gt;u.isp24.fcp_hdr.d_id[0],</div><div class='add'>+			    atio-&gt;u.isp24.fcp_hdr.d_id[1],</div><div class='add'>+			    atio-&gt;u.isp24.fcp_hdr.d_id[2]);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		qlt_24xx_atio_pkt(host, atio);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case IMMED_NOTIFY_TYPE:</div><div class='add'>+	{</div><div class='add'>+		struct scsi_qla_host *host = vha;</div><div class='add'>+		struct imm_ntfy_from_isp *entry =</div><div class='add'>+		    (struct imm_ntfy_from_isp *)atio;</div><div class='add'>+</div><div class='add'>+		if ((entry-&gt;u.isp24.vp_index != 0xFF) &amp;&amp;</div><div class='add'>+		    (entry-&gt;u.isp24.nport_handle != 0xFFFF)) {</div><div class='add'>+			host = qlt_find_host_by_vp_idx(vha,</div><div class='add'>+			    entry-&gt;u.isp24.vp_index);</div><div class='add'>+			if (unlikely(!host)) {</div><div class='add'>+				ql_dbg(ql_dbg_tgt, vha, 0xe03f,</div><div class='add'>+				    "qla_target(%d): Received "</div><div class='add'>+				    "ATIO (IMMED_NOTIFY_TYPE) "</div><div class='add'>+				    "with unknown vp_index %d\n",</div><div class='add'>+				    vha-&gt;vp_idx, entry-&gt;u.isp24.vp_index);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		qlt_24xx_atio_pkt(host, atio);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe040,</div><div class='add'>+		    "qla_target(%d): Received unknown ATIO atio "</div><div class='add'>+		    "type %x\n", vha-&gt;vp_idx, atio-&gt;u.raw.entry_type);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qlt_response_pkt_all_vps(struct scsi_qla_host *vha, response_t *pkt)</div><div class='add'>+{</div><div class='add'>+	switch (pkt-&gt;entry_type) {</div><div class='add'>+	case CTIO_TYPE7:</div><div class='add'>+	{</div><div class='add'>+		struct ctio7_from_24xx *entry = (struct ctio7_from_24xx *)pkt;</div><div class='add'>+		struct scsi_qla_host *host = qlt_find_host_by_vp_idx(vha,</div><div class='add'>+		    entry-&gt;vp_index);</div><div class='add'>+		if (unlikely(!host)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe041,</div><div class='add'>+			    "qla_target(%d): Response pkt (CTIO_TYPE7) "</div><div class='add'>+			    "received, with unknown vp_index %d\n",</div><div class='add'>+			    vha-&gt;vp_idx, entry-&gt;vp_index);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		qlt_response_pkt(host, pkt);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case IMMED_NOTIFY_TYPE:</div><div class='add'>+	{</div><div class='add'>+		struct scsi_qla_host *host = vha;</div><div class='add'>+		struct imm_ntfy_from_isp *entry =</div><div class='add'>+		    (struct imm_ntfy_from_isp *)pkt;</div><div class='add'>+</div><div class='add'>+		host = qlt_find_host_by_vp_idx(vha, entry-&gt;u.isp24.vp_index);</div><div class='add'>+		if (unlikely(!host)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe042,</div><div class='add'>+			    "qla_target(%d): Response pkt (IMMED_NOTIFY_TYPE) "</div><div class='add'>+			    "received, with unknown vp_index %d\n",</div><div class='add'>+			    vha-&gt;vp_idx, entry-&gt;u.isp24.vp_index);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		qlt_response_pkt(host, pkt);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case NOTIFY_ACK_TYPE:</div><div class='add'>+	{</div><div class='add'>+		struct scsi_qla_host *host = vha;</div><div class='add'>+		struct nack_to_isp *entry = (struct nack_to_isp *)pkt;</div><div class='add'>+</div><div class='add'>+		if (0xFF != entry-&gt;u.isp24.vp_index) {</div><div class='add'>+			host = qlt_find_host_by_vp_idx(vha,</div><div class='add'>+			    entry-&gt;u.isp24.vp_index);</div><div class='add'>+			if (unlikely(!host)) {</div><div class='add'>+				ql_dbg(ql_dbg_tgt, vha, 0xe043,</div><div class='add'>+				    "qla_target(%d): Response "</div><div class='add'>+				    "pkt (NOTIFY_ACK_TYPE) "</div><div class='add'>+				    "received, with unknown "</div><div class='add'>+				    "vp_index %d\n", vha-&gt;vp_idx,</div><div class='add'>+				    entry-&gt;u.isp24.vp_index);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		qlt_response_pkt(host, pkt);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case ABTS_RECV_24XX:</div><div class='add'>+	{</div><div class='add'>+		struct abts_recv_from_24xx *entry =</div><div class='add'>+		    (struct abts_recv_from_24xx *)pkt;</div><div class='add'>+		struct scsi_qla_host *host = qlt_find_host_by_vp_idx(vha,</div><div class='add'>+		    entry-&gt;vp_index);</div><div class='add'>+		if (unlikely(!host)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe044,</div><div class='add'>+			    "qla_target(%d): Response pkt "</div><div class='add'>+			    "(ABTS_RECV_24XX) received, with unknown "</div><div class='add'>+			    "vp_index %d\n", vha-&gt;vp_idx, entry-&gt;vp_index);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		qlt_response_pkt(host, pkt);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case ABTS_RESP_24XX:</div><div class='add'>+	{</div><div class='add'>+		struct abts_resp_to_24xx *entry =</div><div class='add'>+		    (struct abts_resp_to_24xx *)pkt;</div><div class='add'>+		struct scsi_qla_host *host = qlt_find_host_by_vp_idx(vha,</div><div class='add'>+		    entry-&gt;vp_index);</div><div class='add'>+		if (unlikely(!host)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe045,</div><div class='add'>+			    "qla_target(%d): Response pkt "</div><div class='add'>+			    "(ABTS_RECV_24XX) received, with unknown "</div><div class='add'>+			    "vp_index %d\n", vha-&gt;vp_idx, entry-&gt;vp_index);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		qlt_response_pkt(host, pkt);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		qlt_response_pkt(vha, pkt);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qlt_free_session_done(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_sess *sess = container_of(work, struct qla_tgt_sess,</div><div class='add'>+	    free_work);</div><div class='add'>+	struct qla_tgt *tgt = sess-&gt;tgt;</div><div class='add'>+	struct scsi_qla_host *vha = sess-&gt;vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+</div><div class='add'>+	BUG_ON(!tgt);</div><div class='add'>+	/*</div><div class='add'>+	 * Release the target session for FC Nexus from fabric module code.</div><div class='add'>+	 */</div><div class='add'>+	if (sess-&gt;se_sess != NULL)</div><div class='add'>+		ha-&gt;tgt.tgt_ops-&gt;free_session(sess);</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf001,</div><div class='add'>+	    "Unregistration of sess %p finished\n", sess);</div><div class='add'>+</div><div class='add'>+	kfree(sess);</div><div class='add'>+	/*</div><div class='add'>+	 * We need to protect against race, when tgt is freed before or</div><div class='add'>+	 * inside wake_up()</div><div class='add'>+	 */</div><div class='add'>+	tgt-&gt;sess_count--;</div><div class='add'>+	if (tgt-&gt;sess_count == 0)</div><div class='add'>+		wake_up_all(&amp;tgt-&gt;waitQ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+void qlt_unreg_sess(struct qla_tgt_sess *sess)</div><div class='add'>+{</div><div class='add'>+	struct scsi_qla_host *vha = sess-&gt;vha;</div><div class='add'>+</div><div class='add'>+	vha-&gt;hw-&gt;tgt.tgt_ops-&gt;clear_nacl_from_fcport_map(sess);</div><div class='add'>+</div><div class='add'>+	list_del(&amp;sess-&gt;sess_list_entry);</div><div class='add'>+	if (sess-&gt;deleted)</div><div class='add'>+		list_del(&amp;sess-&gt;del_list_entry);</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;sess-&gt;free_work, qlt_free_session_done);</div><div class='add'>+	schedule_work(&amp;sess-&gt;free_work);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(qlt_unreg_sess);</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static int qlt_reset(struct scsi_qla_host *vha, void *iocb, int mcmd)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt_sess *sess = NULL;</div><div class='add'>+	uint32_t unpacked_lun, lun = 0;</div><div class='add'>+	uint16_t loop_id;</div><div class='add'>+	int res = 0;</div><div class='add'>+	struct imm_ntfy_from_isp *n = (struct imm_ntfy_from_isp *)iocb;</div><div class='add'>+	struct atio_from_isp *a = (struct atio_from_isp *)iocb;</div><div class='add'>+</div><div class='add'>+	loop_id = le16_to_cpu(n-&gt;u.isp24.nport_handle);</div><div class='add'>+	if (loop_id == 0xFFFF) {</div><div class='add'>+#if 0 /* FIXME: Re-enable Global event handling.. */</div><div class='add'>+		/* Global event */</div><div class='add'>+		atomic_inc(&amp;ha-&gt;tgt.qla_tgt-&gt;tgt_global_resets_count);</div><div class='add'>+		qlt_clear_tgt_db(ha-&gt;tgt.qla_tgt, 1);</div><div class='add'>+		if (!list_empty(&amp;ha-&gt;tgt.qla_tgt-&gt;sess_list)) {</div><div class='add'>+			sess = list_entry(ha-&gt;tgt.qla_tgt-&gt;sess_list.next,</div><div class='add'>+			    typeof(*sess), sess_list_entry);</div><div class='add'>+			switch (mcmd) {</div><div class='add'>+			case QLA_TGT_NEXUS_LOSS_SESS:</div><div class='add'>+				mcmd = QLA_TGT_NEXUS_LOSS;</div><div class='add'>+				break;</div><div class='add'>+			case QLA_TGT_ABORT_ALL_SESS:</div><div class='add'>+				mcmd = QLA_TGT_ABORT_ALL;</div><div class='add'>+				break;</div><div class='add'>+			case QLA_TGT_NEXUS_LOSS:</div><div class='add'>+			case QLA_TGT_ABORT_ALL:</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				ql_dbg(ql_dbg_tgt, vha, 0xe046,</div><div class='add'>+				    "qla_target(%d): Not allowed "</div><div class='add'>+				    "command %x in %s", vha-&gt;vp_idx,</div><div class='add'>+				    mcmd, __func__);</div><div class='add'>+				sess = NULL;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		} else</div><div class='add'>+			sess = NULL;</div><div class='add'>+#endif</div><div class='add'>+	} else {</div><div class='add'>+		sess = ha-&gt;tgt.tgt_ops-&gt;find_sess_by_loop_id(vha, loop_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe000,</div><div class='add'>+	    "Using sess for qla_tgt_reset: %p\n", sess);</div><div class='add'>+	if (!sess) {</div><div class='add'>+		res = -ESRCH;</div><div class='add'>+		return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe047,</div><div class='add'>+	    "scsi(%ld): resetting (session %p from port "</div><div class='add'>+	    "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x, "</div><div class='add'>+	    "mcmd %x, loop_id %d)\n", vha-&gt;host_no, sess,</div><div class='add'>+	    sess-&gt;port_name[0], sess-&gt;port_name[1],</div><div class='add'>+	    sess-&gt;port_name[2], sess-&gt;port_name[3],</div><div class='add'>+	    sess-&gt;port_name[4], sess-&gt;port_name[5],</div><div class='add'>+	    sess-&gt;port_name[6], sess-&gt;port_name[7],</div><div class='add'>+	    mcmd, loop_id);</div><div class='add'>+</div><div class='add'>+	lun = a-&gt;u.isp24.fcp_cmnd.lun;</div><div class='add'>+	unpacked_lun = scsilun_to_int((struct scsi_lun *)&amp;lun);</div><div class='add'>+</div><div class='add'>+	return qlt_issue_task_mgmt(sess, unpacked_lun, mcmd,</div><div class='add'>+	    iocb, QLA24XX_MGMT_SEND_NACK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static void qlt_schedule_sess_for_deletion(struct qla_tgt_sess *sess,</div><div class='add'>+	bool immediate)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt *tgt = sess-&gt;tgt;</div><div class='add'>+	uint32_t dev_loss_tmo = tgt-&gt;ha-&gt;port_down_retry_count + 5;</div><div class='add'>+</div><div class='add'>+	if (sess-&gt;deleted)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, sess-&gt;vha, 0xe001,</div><div class='add'>+	    "Scheduling sess %p for deletion\n", sess);</div><div class='add'>+	list_add_tail(&amp;sess-&gt;del_list_entry, &amp;tgt-&gt;del_sess_list);</div><div class='add'>+	sess-&gt;deleted = 1;</div><div class='add'>+</div><div class='add'>+	if (immediate)</div><div class='add'>+		dev_loss_tmo = 0;</div><div class='add'>+</div><div class='add'>+	sess-&gt;expires = jiffies + dev_loss_tmo * HZ;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, sess-&gt;vha, 0xe048,</div><div class='add'>+	    "qla_target(%d): session for port %02x:%02x:%02x:"</div><div class='add'>+	    "%02x:%02x:%02x:%02x:%02x (loop ID %d) scheduled for "</div><div class='add'>+	    "deletion in %u secs (expires: %lu) immed: %d\n",</div><div class='add'>+	    sess-&gt;vha-&gt;vp_idx,</div><div class='add'>+	    sess-&gt;port_name[0], sess-&gt;port_name[1],</div><div class='add'>+	    sess-&gt;port_name[2], sess-&gt;port_name[3],</div><div class='add'>+	    sess-&gt;port_name[4], sess-&gt;port_name[5],</div><div class='add'>+	    sess-&gt;port_name[6], sess-&gt;port_name[7],</div><div class='add'>+	    sess-&gt;loop_id, dev_loss_tmo, sess-&gt;expires, immediate);</div><div class='add'>+</div><div class='add'>+	if (immediate)</div><div class='add'>+		schedule_delayed_work(&amp;tgt-&gt;sess_del_work, 0);</div><div class='add'>+	else</div><div class='add'>+		schedule_delayed_work(&amp;tgt-&gt;sess_del_work,</div><div class='add'>+		    jiffies - sess-&gt;expires);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static void qlt_clear_tgt_db(struct qla_tgt *tgt, bool local_only)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_sess *sess;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(sess, &amp;tgt-&gt;sess_list, sess_list_entry)</div><div class='add'>+		qlt_schedule_sess_for_deletion(sess, true);</div><div class='add'>+</div><div class='add'>+	/* At this point tgt could be already dead */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qla24xx_get_loop_id(struct scsi_qla_host *vha, const uint8_t *s_id,</div><div class='add'>+	uint16_t *loop_id)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	dma_addr_t gid_list_dma;</div><div class='add'>+	struct gid_list_info *gid_list;</div><div class='add'>+	char *id_iter;</div><div class='add'>+	int res, rc, i;</div><div class='add'>+	uint16_t entries;</div><div class='add'>+</div><div class='add'>+	gid_list = dma_alloc_coherent(&amp;ha-&gt;pdev-&gt;dev, qla2x00_gid_list_size(ha),</div><div class='add'>+	    &amp;gid_list_dma, GFP_KERNEL);</div><div class='add'>+	if (!gid_list) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf044,</div><div class='add'>+		    "qla_target(%d): DMA Alloc failed of %u\n",</div><div class='add'>+		    vha-&gt;vp_idx, qla2x00_gid_list_size(ha));</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Get list of logged in devices */</div><div class='add'>+	rc = qla2x00_get_id_list(vha, gid_list, gid_list_dma, &amp;entries);</div><div class='add'>+	if (rc != QLA_SUCCESS) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf045,</div><div class='add'>+		    "qla_target(%d): get_id_list() failed: %x\n",</div><div class='add'>+		    vha-&gt;vp_idx, rc);</div><div class='add'>+		res = -1;</div><div class='add'>+		goto out_free_id_list;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	id_iter = (char *)gid_list;</div><div class='add'>+	res = -1;</div><div class='add'>+	for (i = 0; i &lt; entries; i++) {</div><div class='add'>+		struct gid_list_info *gid = (struct gid_list_info *)id_iter;</div><div class='add'>+		if ((gid-&gt;al_pa == s_id[2]) &amp;&amp;</div><div class='add'>+		    (gid-&gt;area == s_id[1]) &amp;&amp;</div><div class='add'>+		    (gid-&gt;domain == s_id[0])) {</div><div class='add'>+			*loop_id = le16_to_cpu(gid-&gt;loop_id);</div><div class='add'>+			res = 0;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		id_iter += ha-&gt;gid_list_info_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out_free_id_list:</div><div class='add'>+	dma_free_coherent(&amp;ha-&gt;pdev-&gt;dev, qla2x00_gid_list_size(ha),</div><div class='add'>+	    gid_list, gid_list_dma);</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool qlt_check_fcport_exist(struct scsi_qla_host *vha,</div><div class='add'>+	struct qla_tgt_sess *sess)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_port_24xx_data *pmap24;</div><div class='add'>+	bool res, found = false;</div><div class='add'>+	int rc, i;</div><div class='add'>+	uint16_t loop_id = 0xFFFF; /* to eliminate compiler's warning */</div><div class='add'>+	uint16_t entries;</div><div class='add'>+	void *pmap;</div><div class='add'>+	int pmap_len;</div><div class='add'>+	fc_port_t *fcport;</div><div class='add'>+	int global_resets;</div><div class='add'>+</div><div class='add'>+retry:</div><div class='add'>+	global_resets = atomic_read(&amp;ha-&gt;tgt.qla_tgt-&gt;tgt_global_resets_count);</div><div class='add'>+</div><div class='add'>+	rc = qla2x00_get_node_name_list(vha, &amp;pmap, &amp;pmap_len);</div><div class='add'>+	if (rc != QLA_SUCCESS) {</div><div class='add'>+		res = false;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pmap24 = pmap;</div><div class='add'>+	entries = pmap_len/sizeof(*pmap24);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; entries; ++i) {</div><div class='add'>+		if (!memcmp(sess-&gt;port_name, pmap24[i].port_name, WWN_SIZE)) {</div><div class='add'>+			loop_id = le16_to_cpu(pmap24[i].loop_id);</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(pmap);</div><div class='add'>+</div><div class='add'>+	if (!found) {</div><div class='add'>+		res = false;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf046,</div><div class='add'>+	    "qlt_check_fcport_exist(): loop_id %d", loop_id);</div><div class='add'>+</div><div class='add'>+	fcport = kzalloc(sizeof(*fcport), GFP_KERNEL);</div><div class='add'>+	if (fcport == NULL) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf047,</div><div class='add'>+		    "qla_target(%d): Allocation of tmp FC port failed",</div><div class='add'>+		    vha-&gt;vp_idx);</div><div class='add'>+		res = false;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fcport-&gt;loop_id = loop_id;</div><div class='add'>+</div><div class='add'>+	rc = qla2x00_get_port_database(vha, fcport, 0);</div><div class='add'>+	if (rc != QLA_SUCCESS) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf048,</div><div class='add'>+		    "qla_target(%d): Failed to retrieve fcport "</div><div class='add'>+		    "information -- get_port_database() returned %x "</div><div class='add'>+		    "(loop_id=0x%04x)", vha-&gt;vp_idx, rc, loop_id);</div><div class='add'>+		res = false;</div><div class='add'>+		goto out_free_fcport;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (global_resets !=</div><div class='add'>+	    atomic_read(&amp;ha-&gt;tgt.qla_tgt-&gt;tgt_global_resets_count)) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf002,</div><div class='add'>+		    "qla_target(%d): global reset during session discovery"</div><div class='add'>+		    " (counter was %d, new %d), retrying",</div><div class='add'>+		    vha-&gt;vp_idx, global_resets,</div><div class='add'>+		    atomic_read(&amp;ha-&gt;tgt.qla_tgt-&gt;tgt_global_resets_count));</div><div class='add'>+		goto retry;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,</div><div class='add'>+	    "Updating sess %p s_id %x:%x:%x, loop_id %d) to d_id %x:%x:%x, "</div><div class='add'>+	    "loop_id %d", sess, sess-&gt;s_id.b.domain, sess-&gt;s_id.b.al_pa,</div><div class='add'>+	    sess-&gt;s_id.b.area, sess-&gt;loop_id, fcport-&gt;d_id.b.domain,</div><div class='add'>+	    fcport-&gt;d_id.b.al_pa, fcport-&gt;d_id.b.area, fcport-&gt;loop_id);</div><div class='add'>+</div><div class='add'>+	sess-&gt;s_id = fcport-&gt;d_id;</div><div class='add'>+	sess-&gt;loop_id = fcport-&gt;loop_id;</div><div class='add'>+	sess-&gt;conf_compl_supported = !!(fcport-&gt;flags &amp;</div><div class='add'>+	    FCF_CONF_COMP_SUPPORTED);</div><div class='add'>+</div><div class='add'>+	res = true;</div><div class='add'>+</div><div class='add'>+out_free_fcport:</div><div class='add'>+	kfree(fcport);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static void qlt_undelete_sess(struct qla_tgt_sess *sess)</div><div class='add'>+{</div><div class='add'>+	BUG_ON(!sess-&gt;deleted);</div><div class='add'>+</div><div class='add'>+	list_del(&amp;sess-&gt;del_list_entry);</div><div class='add'>+	sess-&gt;deleted = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qlt_del_sess_work_fn(struct delayed_work *work)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt *tgt = container_of(work, struct qla_tgt,</div><div class='add'>+	    sess_del_work);</div><div class='add'>+	struct scsi_qla_host *vha = tgt-&gt;vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt_sess *sess;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	while (!list_empty(&amp;tgt-&gt;del_sess_list)) {</div><div class='add'>+		sess = list_entry(tgt-&gt;del_sess_list.next, typeof(*sess),</div><div class='add'>+		    del_list_entry);</div><div class='add'>+		if (time_after_eq(jiffies, sess-&gt;expires)) {</div><div class='add'>+			bool cancel;</div><div class='add'>+</div><div class='add'>+			qlt_undelete_sess(sess);</div><div class='add'>+</div><div class='add'>+			spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+			cancel = qlt_check_fcport_exist(vha, sess);</div><div class='add'>+</div><div class='add'>+			if (cancel) {</div><div class='add'>+				if (sess-&gt;deleted) {</div><div class='add'>+					/*</div><div class='add'>+					 * sess was again deleted while we were</div><div class='add'>+					 * discovering it</div><div class='add'>+					 */</div><div class='add'>+					spin_lock_irqsave(&amp;ha-&gt;hardware_lock,</div><div class='add'>+					    flags);</div><div class='add'>+					continue;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				ql_dbg(ql_dbg_tgt_mgt, vha, 0xf049,</div><div class='add'>+				    "qla_target(%d): cancel deletion of "</div><div class='add'>+				    "session for port %02x:%02x:%02x:%02x:%02x:"</div><div class='add'>+				    "%02x:%02x:%02x (loop ID %d), because "</div><div class='add'>+				    " it isn't deleted by firmware",</div><div class='add'>+				    vha-&gt;vp_idx, sess-&gt;port_name[0],</div><div class='add'>+				    sess-&gt;port_name[1], sess-&gt;port_name[2],</div><div class='add'>+				    sess-&gt;port_name[3], sess-&gt;port_name[4],</div><div class='add'>+				    sess-&gt;port_name[5], sess-&gt;port_name[6],</div><div class='add'>+				    sess-&gt;port_name[7], sess-&gt;loop_id);</div><div class='add'>+			} else {</div><div class='add'>+				ql_dbg(ql_dbg_tgt_mgt, vha, 0xf004,</div><div class='add'>+				    "Timeout: sess %p about to be deleted\n",</div><div class='add'>+				    sess);</div><div class='add'>+				ha-&gt;tgt.tgt_ops-&gt;shutdown_sess(sess);</div><div class='add'>+				ha-&gt;tgt.tgt_ops-&gt;put_sess(sess);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+		} else {</div><div class='add'>+			schedule_delayed_work(&amp;tgt-&gt;sess_del_work,</div><div class='add'>+			    jiffies - sess-&gt;expires);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Adds an extra ref to allow to drop hw lock after adding sess to the list.</div><div class='add'>+ * Caller must put it.</div><div class='add'>+ */</div><div class='add'>+static struct qla_tgt_sess *qlt_create_sess(</div><div class='add'>+	struct scsi_qla_host *vha,</div><div class='add'>+	fc_port_t *fcport,</div><div class='add'>+	bool local)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt_sess *sess;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned char be_sid[3];</div><div class='add'>+</div><div class='add'>+	/* Check to avoid double sessions */</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	list_for_each_entry(sess, &amp;ha-&gt;tgt.qla_tgt-&gt;sess_list,</div><div class='add'>+				sess_list_entry) {</div><div class='add'>+		if (!memcmp(sess-&gt;port_name, fcport-&gt;port_name, WWN_SIZE)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf005,</div><div class='add'>+			    "Double sess %p found (s_id %x:%x:%x, "</div><div class='add'>+			    "loop_id %d), updating to d_id %x:%x:%x, "</div><div class='add'>+			    "loop_id %d", sess, sess-&gt;s_id.b.domain,</div><div class='add'>+			    sess-&gt;s_id.b.al_pa, sess-&gt;s_id.b.area,</div><div class='add'>+			    sess-&gt;loop_id, fcport-&gt;d_id.b.domain,</div><div class='add'>+			    fcport-&gt;d_id.b.al_pa, fcport-&gt;d_id.b.area,</div><div class='add'>+			    fcport-&gt;loop_id);</div><div class='add'>+</div><div class='add'>+			if (sess-&gt;deleted)</div><div class='add'>+				qlt_undelete_sess(sess);</div><div class='add'>+</div><div class='add'>+			kref_get(&amp;sess-&gt;se_sess-&gt;sess_kref);</div><div class='add'>+			sess-&gt;s_id = fcport-&gt;d_id;</div><div class='add'>+			sess-&gt;loop_id = fcport-&gt;loop_id;</div><div class='add'>+			sess-&gt;conf_compl_supported = !!(fcport-&gt;flags &amp;</div><div class='add'>+			    FCF_CONF_COMP_SUPPORTED);</div><div class='add'>+			if (sess-&gt;local &amp;&amp; !local)</div><div class='add'>+				sess-&gt;local = 0;</div><div class='add'>+			spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+			return sess;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	sess = kzalloc(sizeof(*sess), GFP_KERNEL);</div><div class='add'>+	if (!sess) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf04a,</div><div class='add'>+		    "qla_target(%u): session allocation failed, "</div><div class='add'>+		    "all commands from port %02x:%02x:%02x:%02x:"</div><div class='add'>+		    "%02x:%02x:%02x:%02x will be refused", vha-&gt;vp_idx,</div><div class='add'>+		    fcport-&gt;port_name[0], fcport-&gt;port_name[1],</div><div class='add'>+		    fcport-&gt;port_name[2], fcport-&gt;port_name[3],</div><div class='add'>+		    fcport-&gt;port_name[4], fcport-&gt;port_name[5],</div><div class='add'>+		    fcport-&gt;port_name[6], fcport-&gt;port_name[7]);</div><div class='add'>+</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	sess-&gt;tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+	sess-&gt;vha = vha;</div><div class='add'>+	sess-&gt;s_id = fcport-&gt;d_id;</div><div class='add'>+	sess-&gt;loop_id = fcport-&gt;loop_id;</div><div class='add'>+	sess-&gt;local = local;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf006,</div><div class='add'>+	    "Adding sess %p to tgt %p via -&gt;check_initiator_node_acl()\n",</div><div class='add'>+	    sess, ha-&gt;tgt.qla_tgt);</div><div class='add'>+</div><div class='add'>+	be_sid[0] = sess-&gt;s_id.b.domain;</div><div class='add'>+	be_sid[1] = sess-&gt;s_id.b.area;</div><div class='add'>+	be_sid[2] = sess-&gt;s_id.b.al_pa;</div><div class='add'>+	/*</div><div class='add'>+	 * Determine if this fc_port-&gt;port_name is allowed to access</div><div class='add'>+	 * target mode using explict NodeACLs+MappedLUNs, or using</div><div class='add'>+	 * TPG demo mode.  If this is successful a target mode FC nexus</div><div class='add'>+	 * is created.</div><div class='add'>+	 */</div><div class='add'>+	if (ha-&gt;tgt.tgt_ops-&gt;check_initiator_node_acl(vha,</div><div class='add'>+	    &amp;fcport-&gt;port_name[0], sess, &amp;be_sid[0], fcport-&gt;loop_id) &lt; 0) {</div><div class='add'>+		kfree(sess);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Take an extra reference to -&gt;sess_kref here to handle qla_tgt_sess</div><div class='add'>+	 * access across -&gt;hardware_lock reaquire.</div><div class='add'>+	 */</div><div class='add'>+	kref_get(&amp;sess-&gt;se_sess-&gt;sess_kref);</div><div class='add'>+</div><div class='add'>+	sess-&gt;conf_compl_supported = !!(fcport-&gt;flags &amp;</div><div class='add'>+	    FCF_CONF_COMP_SUPPORTED);</div><div class='add'>+	BUILD_BUG_ON(sizeof(sess-&gt;port_name) != sizeof(fcport-&gt;port_name));</div><div class='add'>+	memcpy(sess-&gt;port_name, fcport-&gt;port_name, sizeof(sess-&gt;port_name));</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	list_add_tail(&amp;sess-&gt;sess_list_entry, &amp;ha-&gt;tgt.qla_tgt-&gt;sess_list);</div><div class='add'>+	ha-&gt;tgt.qla_tgt-&gt;sess_count++;</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf04b,</div><div class='add'>+	    "qla_target(%d): %ssession for wwn %02x:%02x:%02x:%02x:"</div><div class='add'>+	    "%02x:%02x:%02x:%02x (loop_id %d, s_id %x:%x:%x, confirmed"</div><div class='add'>+	    " completion %ssupported) added\n",</div><div class='add'>+	    vha-&gt;vp_idx, local ?  "local " : "", fcport-&gt;port_name[0],</div><div class='add'>+	    fcport-&gt;port_name[1], fcport-&gt;port_name[2], fcport-&gt;port_name[3],</div><div class='add'>+	    fcport-&gt;port_name[4], fcport-&gt;port_name[5], fcport-&gt;port_name[6],</div><div class='add'>+	    fcport-&gt;port_name[7], fcport-&gt;loop_id, sess-&gt;s_id.b.domain,</div><div class='add'>+	    sess-&gt;s_id.b.area, sess-&gt;s_id.b.al_pa, sess-&gt;conf_compl_supported ?</div><div class='add'>+	    "" : "not ");</div><div class='add'>+</div><div class='add'>+	return sess;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called from drivers/scsi/qla2xxx/qla_init.c:qla2x00_reg_remote_port()</div><div class='add'>+ */</div><div class='add'>+void qlt_fc_port_added(struct scsi_qla_host *vha, fc_port_t *fcport)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+	struct qla_tgt_sess *sess;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!vha-&gt;hw-&gt;tgt.tgt_ops)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!tgt || (fcport-&gt;port_type != FCT_INITIATOR))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	if (tgt-&gt;tgt_stop) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	sess = qlt_find_sess_by_port_name(tgt, fcport-&gt;port_name);</div><div class='add'>+	if (!sess) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+		sess = qlt_create_sess(vha, fcport, false);</div><div class='add'>+		mutex_unlock(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	} else {</div><div class='add'>+		kref_get(&amp;sess-&gt;se_sess-&gt;sess_kref);</div><div class='add'>+</div><div class='add'>+		if (sess-&gt;deleted) {</div><div class='add'>+			qlt_undelete_sess(sess);</div><div class='add'>+</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf04c,</div><div class='add'>+			    "qla_target(%u): %ssession for port %02x:"</div><div class='add'>+			    "%02x:%02x:%02x:%02x:%02x:%02x:%02x (loop ID %d) "</div><div class='add'>+			    "reappeared\n", vha-&gt;vp_idx, sess-&gt;local ? "local "</div><div class='add'>+			    : "", sess-&gt;port_name[0], sess-&gt;port_name[1],</div><div class='add'>+			    sess-&gt;port_name[2], sess-&gt;port_name[3],</div><div class='add'>+			    sess-&gt;port_name[4], sess-&gt;port_name[5],</div><div class='add'>+			    sess-&gt;port_name[6], sess-&gt;port_name[7],</div><div class='add'>+			    sess-&gt;loop_id);</div><div class='add'>+</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf007,</div><div class='add'>+			    "Reappeared sess %p\n", sess);</div><div class='add'>+		}</div><div class='add'>+		sess-&gt;s_id = fcport-&gt;d_id;</div><div class='add'>+		sess-&gt;loop_id = fcport-&gt;loop_id;</div><div class='add'>+		sess-&gt;conf_compl_supported = !!(fcport-&gt;flags &amp;</div><div class='add'>+		    FCF_CONF_COMP_SUPPORTED);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sess &amp;&amp; sess-&gt;local) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf04d,</div><div class='add'>+		    "qla_target(%u): local session for "</div><div class='add'>+		    "port %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x "</div><div class='add'>+		    "(loop ID %d) became global\n", vha-&gt;vp_idx,</div><div class='add'>+		    fcport-&gt;port_name[0], fcport-&gt;port_name[1],</div><div class='add'>+		    fcport-&gt;port_name[2], fcport-&gt;port_name[3],</div><div class='add'>+		    fcport-&gt;port_name[4], fcport-&gt;port_name[5],</div><div class='add'>+		    fcport-&gt;port_name[6], fcport-&gt;port_name[7],</div><div class='add'>+		    sess-&gt;loop_id);</div><div class='add'>+		sess-&gt;local = 0;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	ha-&gt;tgt.tgt_ops-&gt;put_sess(sess);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qlt_fc_port_deleted(struct scsi_qla_host *vha, fc_port_t *fcport)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+	struct qla_tgt_sess *sess;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!vha-&gt;hw-&gt;tgt.tgt_ops)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!tgt || (fcport-&gt;port_type != FCT_INITIATOR))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	if (tgt-&gt;tgt_stop) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	sess = qlt_find_sess_by_port_name(tgt, fcport-&gt;port_name);</div><div class='add'>+	if (!sess) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf008, "qla_tgt_fc_port_deleted %p", sess);</div><div class='add'>+</div><div class='add'>+	sess-&gt;local = 1;</div><div class='add'>+	qlt_schedule_sess_for_deletion(sess, false);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int test_tgt_sess_count(struct qla_tgt *tgt)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = tgt-&gt;ha;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int res;</div><div class='add'>+	/*</div><div class='add'>+	 * We need to protect against race, when tgt is freed before or</div><div class='add'>+	 * inside wake_up()</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	ql_dbg(ql_dbg_tgt, tgt-&gt;vha, 0xe002,</div><div class='add'>+	    "tgt %p, empty(sess_list)=%d sess_count=%d\n",</div><div class='add'>+	    tgt, list_empty(&amp;tgt-&gt;sess_list), tgt-&gt;sess_count);</div><div class='add'>+	res = (tgt-&gt;sess_count == 0);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Called by tcm_qla2xxx configfs code */</div><div class='add'>+void qlt_stop_phase1(struct qla_tgt *tgt)</div><div class='add'>+{</div><div class='add'>+	struct scsi_qla_host *vha = tgt-&gt;vha;</div><div class='add'>+	struct qla_hw_data *ha = tgt-&gt;ha;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (tgt-&gt;tgt_stop || tgt-&gt;tgt_stopped) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf04e,</div><div class='add'>+		    "Already in tgt-&gt;tgt_stop or tgt_stopped state\n");</div><div class='add'>+		dump_stack();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe003, "Stopping target for host %ld(%p)\n",</div><div class='add'>+	    vha-&gt;host_no, vha);</div><div class='add'>+	/*</div><div class='add'>+	 * Mutex needed to sync with qla_tgt_fc_port_[added,deleted].</div><div class='add'>+	 * Lock is needed, because we still can get an incoming packet.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	tgt-&gt;tgt_stop = 1;</div><div class='add'>+	qlt_clear_tgt_db(tgt, true);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	mutex_unlock(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+</div><div class='add'>+	flush_delayed_work_sync(&amp;tgt-&gt;sess_del_work);</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf009,</div><div class='add'>+	    "Waiting for sess works (tgt %p)", tgt);</div><div class='add'>+	spin_lock_irqsave(&amp;tgt-&gt;sess_work_lock, flags);</div><div class='add'>+	while (!list_empty(&amp;tgt-&gt;sess_works_list)) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;tgt-&gt;sess_work_lock, flags);</div><div class='add'>+		flush_scheduled_work();</div><div class='add'>+		spin_lock_irqsave(&amp;tgt-&gt;sess_work_lock, flags);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;tgt-&gt;sess_work_lock, flags);</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf00a,</div><div class='add'>+	    "Waiting for tgt %p: list_empty(sess_list)=%d "</div><div class='add'>+	    "sess_count=%d\n", tgt, list_empty(&amp;tgt-&gt;sess_list),</div><div class='add'>+	    tgt-&gt;sess_count);</div><div class='add'>+</div><div class='add'>+	wait_event(tgt-&gt;waitQ, test_tgt_sess_count(tgt));</div><div class='add'>+</div><div class='add'>+	/* Big hammer */</div><div class='add'>+	if (!ha-&gt;flags.host_shutting_down &amp;&amp; qla_tgt_mode_enabled(vha))</div><div class='add'>+		qlt_disable_vha(vha);</div><div class='add'>+</div><div class='add'>+	/* Wait for sessions to clear out (just in case) */</div><div class='add'>+	wait_event(tgt-&gt;waitQ, test_tgt_sess_count(tgt));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(qlt_stop_phase1);</div><div class='add'>+</div><div class='add'>+/* Called by tcm_qla2xxx configfs code */</div><div class='add'>+void qlt_stop_phase2(struct qla_tgt *tgt)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = tgt-&gt;ha;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (tgt-&gt;tgt_stopped) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, tgt-&gt;vha, 0xf04f,</div><div class='add'>+		    "Already in tgt-&gt;tgt_stopped state\n");</div><div class='add'>+		dump_stack();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, tgt-&gt;vha, 0xf00b,</div><div class='add'>+	    "Waiting for %d IRQ commands to complete (tgt %p)",</div><div class='add'>+	    tgt-&gt;irq_cmd_count, tgt);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	while (tgt-&gt;irq_cmd_count != 0) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+		udelay(2);</div><div class='add'>+		spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	}</div><div class='add'>+	tgt-&gt;tgt_stop = 0;</div><div class='add'>+	tgt-&gt;tgt_stopped = 1;</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	mutex_unlock(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, tgt-&gt;vha, 0xf00c, "Stop of tgt %p finished",</div><div class='add'>+	    tgt);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(qlt_stop_phase2);</div><div class='add'>+</div><div class='add'>+/* Called from qlt_remove_target() -&gt; qla2x00_remove_one() */</div><div class='add'>+void qlt_release(struct qla_tgt *tgt)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = tgt-&gt;ha;</div><div class='add'>+</div><div class='add'>+	if ((ha-&gt;tgt.qla_tgt != NULL) &amp;&amp; !tgt-&gt;tgt_stopped)</div><div class='add'>+		qlt_stop_phase2(tgt);</div><div class='add'>+</div><div class='add'>+	ha-&gt;tgt.qla_tgt = NULL;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, tgt-&gt;vha, 0xf00d,</div><div class='add'>+	    "Release of tgt %p finished\n", tgt);</div><div class='add'>+</div><div class='add'>+	kfree(tgt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static int qlt_sched_sess_work(struct qla_tgt *tgt, int type,</div><div class='add'>+	const void *param, unsigned int param_size)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_sess_work_param *prm;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	prm = kzalloc(sizeof(*prm), GFP_ATOMIC);</div><div class='add'>+	if (!prm) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, tgt-&gt;vha, 0xf050,</div><div class='add'>+		    "qla_target(%d): Unable to create session "</div><div class='add'>+		    "work, command will be refused", 0);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, tgt-&gt;vha, 0xf00e,</div><div class='add'>+	    "Scheduling work (type %d, prm %p)"</div><div class='add'>+	    " to find session for param %p (size %d, tgt %p)\n",</div><div class='add'>+	    type, prm, param, param_size, tgt);</div><div class='add'>+</div><div class='add'>+	prm-&gt;type = type;</div><div class='add'>+	memcpy(&amp;prm-&gt;tm_iocb, param, param_size);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;tgt-&gt;sess_work_lock, flags);</div><div class='add'>+	list_add_tail(&amp;prm-&gt;sess_works_list_entry, &amp;tgt-&gt;sess_works_list);</div><div class='add'>+	spin_unlock_irqrestore(&amp;tgt-&gt;sess_work_lock, flags);</div><div class='add'>+</div><div class='add'>+	schedule_work(&amp;tgt-&gt;sess_work);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. Might drop it, then reaquire</div><div class='add'>+ */</div><div class='add'>+static void qlt_send_notify_ack(struct scsi_qla_host *vha,</div><div class='add'>+	struct imm_ntfy_from_isp *ntfy,</div><div class='add'>+	uint32_t add_flags, uint16_t resp_code, int resp_code_valid,</div><div class='add'>+	uint16_t srr_flags, uint16_t srr_reject_code, uint8_t srr_explan)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	request_t *pkt;</div><div class='add'>+	struct nack_to_isp *nack;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe004, "Sending NOTIFY_ACK (ha=%p)\n", ha);</div><div class='add'>+</div><div class='add'>+	/* Send marker if required */</div><div class='add'>+	if (qlt_issue_marker(vha, 1) != QLA_SUCCESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pkt = (request_t *)qla2x00_alloc_iocbs(vha, NULL);</div><div class='add'>+	if (!pkt) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe049,</div><div class='add'>+		    "qla_target(%d): %s failed: unable to allocate "</div><div class='add'>+		    "request packet\n", vha-&gt;vp_idx, __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ha-&gt;tgt.qla_tgt != NULL)</div><div class='add'>+		ha-&gt;tgt.qla_tgt-&gt;notify_ack_expected++;</div><div class='add'>+</div><div class='add'>+	pkt-&gt;entry_type = NOTIFY_ACK_TYPE;</div><div class='add'>+	pkt-&gt;entry_count = 1;</div><div class='add'>+</div><div class='add'>+	nack = (struct nack_to_isp *)pkt;</div><div class='add'>+	nack-&gt;ox_id = ntfy-&gt;ox_id;</div><div class='add'>+</div><div class='add'>+	nack-&gt;u.isp24.nport_handle = ntfy-&gt;u.isp24.nport_handle;</div><div class='add'>+	if (le16_to_cpu(ntfy-&gt;u.isp24.status) == IMM_NTFY_ELS) {</div><div class='add'>+		nack-&gt;u.isp24.flags = ntfy-&gt;u.isp24.flags &amp;</div><div class='add'>+			__constant_cpu_to_le32(NOTIFY24XX_FLAGS_PUREX_IOCB);</div><div class='add'>+	}</div><div class='add'>+	nack-&gt;u.isp24.srr_rx_id = ntfy-&gt;u.isp24.srr_rx_id;</div><div class='add'>+	nack-&gt;u.isp24.status = ntfy-&gt;u.isp24.status;</div><div class='add'>+	nack-&gt;u.isp24.status_subcode = ntfy-&gt;u.isp24.status_subcode;</div><div class='add'>+	nack-&gt;u.isp24.exchange_address = ntfy-&gt;u.isp24.exchange_address;</div><div class='add'>+	nack-&gt;u.isp24.srr_rel_offs = ntfy-&gt;u.isp24.srr_rel_offs;</div><div class='add'>+	nack-&gt;u.isp24.srr_ui = ntfy-&gt;u.isp24.srr_ui;</div><div class='add'>+	nack-&gt;u.isp24.srr_flags = cpu_to_le16(srr_flags);</div><div class='add'>+	nack-&gt;u.isp24.srr_reject_code = srr_reject_code;</div><div class='add'>+	nack-&gt;u.isp24.srr_reject_code_expl = srr_explan;</div><div class='add'>+	nack-&gt;u.isp24.vp_index = ntfy-&gt;u.isp24.vp_index;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe005,</div><div class='add'>+	    "qla_target(%d): Sending 24xx Notify Ack %d\n",</div><div class='add'>+	    vha-&gt;vp_idx, nack-&gt;u.isp24.status);</div><div class='add'>+</div><div class='add'>+	qla2x00_start_iocbs(vha, vha-&gt;req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. Might drop it, then reaquire</div><div class='add'>+ */</div><div class='add'>+static void qlt_24xx_send_abts_resp(struct scsi_qla_host *vha,</div><div class='add'>+	struct abts_recv_from_24xx *abts, uint32_t status,</div><div class='add'>+	bool ids_reversed)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct abts_resp_to_24xx *resp;</div><div class='add'>+	uint32_t f_ctl;</div><div class='add'>+	uint8_t *p;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe006,</div><div class='add'>+	    "Sending task mgmt ABTS response (ha=%p, atio=%p, status=%x\n",</div><div class='add'>+	    ha, abts, status);</div><div class='add'>+</div><div class='add'>+	/* Send marker if required */</div><div class='add'>+	if (qlt_issue_marker(vha, 1) != QLA_SUCCESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	resp = (struct abts_resp_to_24xx *)qla2x00_alloc_iocbs(vha, NULL);</div><div class='add'>+	if (!resp) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe04a,</div><div class='add'>+		    "qla_target(%d): %s failed: unable to allocate "</div><div class='add'>+		    "request packet", vha-&gt;vp_idx, __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	resp-&gt;entry_type = ABTS_RESP_24XX;</div><div class='add'>+	resp-&gt;entry_count = 1;</div><div class='add'>+	resp-&gt;nport_handle = abts-&gt;nport_handle;</div><div class='add'>+	resp-&gt;vp_index = vha-&gt;vp_idx;</div><div class='add'>+	resp-&gt;sof_type = abts-&gt;sof_type;</div><div class='add'>+	resp-&gt;exchange_address = abts-&gt;exchange_address;</div><div class='add'>+	resp-&gt;fcp_hdr_le = abts-&gt;fcp_hdr_le;</div><div class='add'>+	f_ctl = __constant_cpu_to_le32(F_CTL_EXCH_CONTEXT_RESP |</div><div class='add'>+	    F_CTL_LAST_SEQ | F_CTL_END_SEQ |</div><div class='add'>+	    F_CTL_SEQ_INITIATIVE);</div><div class='add'>+	p = (uint8_t *)&amp;f_ctl;</div><div class='add'>+	resp-&gt;fcp_hdr_le.f_ctl[0] = *p++;</div><div class='add'>+	resp-&gt;fcp_hdr_le.f_ctl[1] = *p++;</div><div class='add'>+	resp-&gt;fcp_hdr_le.f_ctl[2] = *p;</div><div class='add'>+	if (ids_reversed) {</div><div class='add'>+		resp-&gt;fcp_hdr_le.d_id[0] = abts-&gt;fcp_hdr_le.d_id[0];</div><div class='add'>+		resp-&gt;fcp_hdr_le.d_id[1] = abts-&gt;fcp_hdr_le.d_id[1];</div><div class='add'>+		resp-&gt;fcp_hdr_le.d_id[2] = abts-&gt;fcp_hdr_le.d_id[2];</div><div class='add'>+		resp-&gt;fcp_hdr_le.s_id[0] = abts-&gt;fcp_hdr_le.s_id[0];</div><div class='add'>+		resp-&gt;fcp_hdr_le.s_id[1] = abts-&gt;fcp_hdr_le.s_id[1];</div><div class='add'>+		resp-&gt;fcp_hdr_le.s_id[2] = abts-&gt;fcp_hdr_le.s_id[2];</div><div class='add'>+	} else {</div><div class='add'>+		resp-&gt;fcp_hdr_le.d_id[0] = abts-&gt;fcp_hdr_le.s_id[0];</div><div class='add'>+		resp-&gt;fcp_hdr_le.d_id[1] = abts-&gt;fcp_hdr_le.s_id[1];</div><div class='add'>+		resp-&gt;fcp_hdr_le.d_id[2] = abts-&gt;fcp_hdr_le.s_id[2];</div><div class='add'>+		resp-&gt;fcp_hdr_le.s_id[0] = abts-&gt;fcp_hdr_le.d_id[0];</div><div class='add'>+		resp-&gt;fcp_hdr_le.s_id[1] = abts-&gt;fcp_hdr_le.d_id[1];</div><div class='add'>+		resp-&gt;fcp_hdr_le.s_id[2] = abts-&gt;fcp_hdr_le.d_id[2];</div><div class='add'>+	}</div><div class='add'>+	resp-&gt;exchange_addr_to_abort = abts-&gt;exchange_addr_to_abort;</div><div class='add'>+	if (status == FCP_TMF_CMPL) {</div><div class='add'>+		resp-&gt;fcp_hdr_le.r_ctl = R_CTL_BASIC_LINK_SERV | R_CTL_B_ACC;</div><div class='add'>+		resp-&gt;payload.ba_acct.seq_id_valid = SEQ_ID_INVALID;</div><div class='add'>+		resp-&gt;payload.ba_acct.low_seq_cnt = 0x0000;</div><div class='add'>+		resp-&gt;payload.ba_acct.high_seq_cnt = 0xFFFF;</div><div class='add'>+		resp-&gt;payload.ba_acct.ox_id = abts-&gt;fcp_hdr_le.ox_id;</div><div class='add'>+		resp-&gt;payload.ba_acct.rx_id = abts-&gt;fcp_hdr_le.rx_id;</div><div class='add'>+	} else {</div><div class='add'>+		resp-&gt;fcp_hdr_le.r_ctl = R_CTL_BASIC_LINK_SERV | R_CTL_B_RJT;</div><div class='add'>+		resp-&gt;payload.ba_rjt.reason_code =</div><div class='add'>+			BA_RJT_REASON_CODE_UNABLE_TO_PERFORM;</div><div class='add'>+		/* Other bytes are zero */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ha-&gt;tgt.qla_tgt-&gt;abts_resp_expected++;</div><div class='add'>+</div><div class='add'>+	qla2x00_start_iocbs(vha, vha-&gt;req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. Might drop it, then reaquire</div><div class='add'>+ */</div><div class='add'>+static void qlt_24xx_retry_term_exchange(struct scsi_qla_host *vha,</div><div class='add'>+	struct abts_resp_from_24xx_fw *entry)</div><div class='add'>+{</div><div class='add'>+	struct ctio7_to_24xx *ctio;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe007,</div><div class='add'>+	    "Sending retry TERM EXCH CTIO7 (ha=%p)\n", vha-&gt;hw);</div><div class='add'>+	/* Send marker if required */</div><div class='add'>+	if (qlt_issue_marker(vha, 1) != QLA_SUCCESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ctio = (struct ctio7_to_24xx *)qla2x00_alloc_iocbs(vha, NULL);</div><div class='add'>+	if (ctio == NULL) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe04b,</div><div class='add'>+		    "qla_target(%d): %s failed: unable to allocate "</div><div class='add'>+		    "request packet\n", vha-&gt;vp_idx, __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We've got on entrance firmware's response on by us generated</div><div class='add'>+	 * ABTS response. So, in it ID fields are reversed.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	ctio-&gt;entry_type = CTIO_TYPE7;</div><div class='add'>+	ctio-&gt;entry_count = 1;</div><div class='add'>+	ctio-&gt;nport_handle = entry-&gt;nport_handle;</div><div class='add'>+	ctio-&gt;handle = QLA_TGT_SKIP_HANDLE |	CTIO_COMPLETION_HANDLE_MARK;</div><div class='add'>+	ctio-&gt;timeout = __constant_cpu_to_le16(QLA_TGT_TIMEOUT);</div><div class='add'>+	ctio-&gt;vp_index = vha-&gt;vp_idx;</div><div class='add'>+	ctio-&gt;initiator_id[0] = entry-&gt;fcp_hdr_le.d_id[0];</div><div class='add'>+	ctio-&gt;initiator_id[1] = entry-&gt;fcp_hdr_le.d_id[1];</div><div class='add'>+	ctio-&gt;initiator_id[2] = entry-&gt;fcp_hdr_le.d_id[2];</div><div class='add'>+	ctio-&gt;exchange_addr = entry-&gt;exchange_addr_to_abort;</div><div class='add'>+	ctio-&gt;u.status1.flags =</div><div class='add'>+	    __constant_cpu_to_le16(CTIO7_FLAGS_STATUS_MODE_1 |</div><div class='add'>+		CTIO7_FLAGS_TERMINATE);</div><div class='add'>+	ctio-&gt;u.status1.ox_id = entry-&gt;fcp_hdr_le.ox_id;</div><div class='add'>+</div><div class='add'>+	qla2x00_start_iocbs(vha, vha-&gt;req);</div><div class='add'>+</div><div class='add'>+	qlt_24xx_send_abts_resp(vha, (struct abts_recv_from_24xx *)entry,</div><div class='add'>+	    FCP_TMF_CMPL, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static int __qlt_24xx_handle_abts(struct scsi_qla_host *vha,</div><div class='add'>+	struct abts_recv_from_24xx *abts, struct qla_tgt_sess *sess)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt_mgmt_cmd *mcmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf00f,</div><div class='add'>+	    "qla_target(%d): task abort (tag=%d)\n",</div><div class='add'>+	    vha-&gt;vp_idx, abts-&gt;exchange_addr_to_abort);</div><div class='add'>+</div><div class='add'>+	mcmd = mempool_alloc(qla_tgt_mgmt_cmd_mempool, GFP_ATOMIC);</div><div class='add'>+	if (mcmd == NULL) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf051,</div><div class='add'>+		    "qla_target(%d): %s: Allocation of ABORT cmd failed",</div><div class='add'>+		    vha-&gt;vp_idx, __func__);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	memset(mcmd, 0, sizeof(*mcmd));</div><div class='add'>+</div><div class='add'>+	mcmd-&gt;sess = sess;</div><div class='add'>+	memcpy(&amp;mcmd-&gt;orig_iocb.abts, abts, sizeof(mcmd-&gt;orig_iocb.abts));</div><div class='add'>+</div><div class='add'>+	rc = ha-&gt;tgt.tgt_ops-&gt;handle_tmr(mcmd, 0, TMR_ABORT_TASK,</div><div class='add'>+	    abts-&gt;exchange_addr_to_abort);</div><div class='add'>+	if (rc != 0) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf052,</div><div class='add'>+		    "qla_target(%d):  tgt_ops-&gt;handle_tmr()"</div><div class='add'>+		    " failed: %d", vha-&gt;vp_idx, rc);</div><div class='add'>+		mempool_free(mcmd, qla_tgt_mgmt_cmd_mempool);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. Might drop it, then reaquire</div><div class='add'>+ */</div><div class='add'>+static void qlt_24xx_handle_abts(struct scsi_qla_host *vha,</div><div class='add'>+	struct abts_recv_from_24xx *abts)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt_sess *sess;</div><div class='add'>+	uint32_t tag = abts-&gt;exchange_addr_to_abort;</div><div class='add'>+	uint8_t s_id[3];</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (le32_to_cpu(abts-&gt;fcp_hdr_le.parameter) &amp; ABTS_PARAM_ABORT_SEQ) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf053,</div><div class='add'>+		    "qla_target(%d): ABTS: Abort Sequence not "</div><div class='add'>+		    "supported\n", vha-&gt;vp_idx);</div><div class='add'>+		qlt_24xx_send_abts_resp(vha, abts, FCP_TMF_REJECTED, false);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tag == ATIO_EXCHANGE_ADDRESS_UNKNOWN) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf010,</div><div class='add'>+		    "qla_target(%d): ABTS: Unknown Exchange "</div><div class='add'>+		    "Address received\n", vha-&gt;vp_idx);</div><div class='add'>+		qlt_24xx_send_abts_resp(vha, abts, FCP_TMF_REJECTED, false);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf011,</div><div class='add'>+	    "qla_target(%d): task abort (s_id=%x:%x:%x, "</div><div class='add'>+	    "tag=%d, param=%x)\n", vha-&gt;vp_idx, abts-&gt;fcp_hdr_le.s_id[2],</div><div class='add'>+	    abts-&gt;fcp_hdr_le.s_id[1], abts-&gt;fcp_hdr_le.s_id[0], tag,</div><div class='add'>+	    le32_to_cpu(abts-&gt;fcp_hdr_le.parameter));</div><div class='add'>+</div><div class='add'>+	s_id[0] = abts-&gt;fcp_hdr_le.s_id[2];</div><div class='add'>+	s_id[1] = abts-&gt;fcp_hdr_le.s_id[1];</div><div class='add'>+	s_id[2] = abts-&gt;fcp_hdr_le.s_id[0];</div><div class='add'>+</div><div class='add'>+	sess = ha-&gt;tgt.tgt_ops-&gt;find_sess_by_s_id(vha, s_id);</div><div class='add'>+	if (!sess) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf012,</div><div class='add'>+		    "qla_target(%d): task abort for non-existant session\n",</div><div class='add'>+		    vha-&gt;vp_idx);</div><div class='add'>+		rc = qlt_sched_sess_work(ha-&gt;tgt.qla_tgt,</div><div class='add'>+		    QLA_TGT_SESS_WORK_ABORT, abts, sizeof(*abts));</div><div class='add'>+		if (rc != 0) {</div><div class='add'>+			qlt_24xx_send_abts_resp(vha, abts, FCP_TMF_REJECTED,</div><div class='add'>+			    false);</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = __qlt_24xx_handle_abts(vha, abts, sess);</div><div class='add'>+	if (rc != 0) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf054,</div><div class='add'>+		    "qla_target(%d): __qlt_24xx_handle_abts() failed: %d\n",</div><div class='add'>+		    vha-&gt;vp_idx, rc);</div><div class='add'>+		qlt_24xx_send_abts_resp(vha, abts, FCP_TMF_REJECTED, false);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. Might drop it, then reaquire</div><div class='add'>+ */</div><div class='add'>+static void qlt_24xx_send_task_mgmt_ctio(struct scsi_qla_host *ha,</div><div class='add'>+	struct qla_tgt_mgmt_cmd *mcmd, uint32_t resp_code)</div><div class='add'>+{</div><div class='add'>+	struct atio_from_isp *atio = &amp;mcmd-&gt;orig_iocb.atio;</div><div class='add'>+	struct ctio7_to_24xx *ctio;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, ha, 0xe008,</div><div class='add'>+	    "Sending task mgmt CTIO7 (ha=%p, atio=%p, resp_code=%x\n",</div><div class='add'>+	    ha, atio, resp_code);</div><div class='add'>+</div><div class='add'>+	/* Send marker if required */</div><div class='add'>+	if (qlt_issue_marker(ha, 1) != QLA_SUCCESS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ctio = (struct ctio7_to_24xx *)qla2x00_alloc_iocbs(ha, NULL);</div><div class='add'>+	if (ctio == NULL) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, ha, 0xe04c,</div><div class='add'>+		    "qla_target(%d): %s failed: unable to allocate "</div><div class='add'>+		    "request packet\n", ha-&gt;vp_idx, __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctio-&gt;entry_type = CTIO_TYPE7;</div><div class='add'>+	ctio-&gt;entry_count = 1;</div><div class='add'>+	ctio-&gt;handle = QLA_TGT_SKIP_HANDLE | CTIO_COMPLETION_HANDLE_MARK;</div><div class='add'>+	ctio-&gt;nport_handle = mcmd-&gt;sess-&gt;loop_id;</div><div class='add'>+	ctio-&gt;timeout = __constant_cpu_to_le16(QLA_TGT_TIMEOUT);</div><div class='add'>+	ctio-&gt;vp_index = ha-&gt;vp_idx;</div><div class='add'>+	ctio-&gt;initiator_id[0] = atio-&gt;u.isp24.fcp_hdr.s_id[2];</div><div class='add'>+	ctio-&gt;initiator_id[1] = atio-&gt;u.isp24.fcp_hdr.s_id[1];</div><div class='add'>+	ctio-&gt;initiator_id[2] = atio-&gt;u.isp24.fcp_hdr.s_id[0];</div><div class='add'>+	ctio-&gt;exchange_addr = atio-&gt;u.isp24.exchange_addr;</div><div class='add'>+	ctio-&gt;u.status1.flags = (atio-&gt;u.isp24.attr &lt;&lt; 9) |</div><div class='add'>+	    __constant_cpu_to_le16(CTIO7_FLAGS_STATUS_MODE_1 |</div><div class='add'>+		CTIO7_FLAGS_SEND_STATUS);</div><div class='add'>+	ctio-&gt;u.status1.ox_id = swab16(atio-&gt;u.isp24.fcp_hdr.ox_id);</div><div class='add'>+	ctio-&gt;u.status1.scsi_status =</div><div class='add'>+	    __constant_cpu_to_le16(SS_RESPONSE_INFO_LEN_VALID);</div><div class='add'>+	ctio-&gt;u.status1.response_len = __constant_cpu_to_le16(8);</div><div class='add'>+	((uint32_t *)ctio-&gt;u.status1.sense_data)[0] = cpu_to_be32(resp_code);</div><div class='add'>+</div><div class='add'>+	qla2x00_start_iocbs(ha, ha-&gt;req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qlt_free_mcmd(struct qla_tgt_mgmt_cmd *mcmd)</div><div class='add'>+{</div><div class='add'>+	mempool_free(mcmd, qla_tgt_mgmt_cmd_mempool);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(qlt_free_mcmd);</div><div class='add'>+</div><div class='add'>+/* callback from target fabric module code */</div><div class='add'>+void qlt_xmit_tm_rsp(struct qla_tgt_mgmt_cmd *mcmd)</div><div class='add'>+{</div><div class='add'>+	struct scsi_qla_host *vha = mcmd-&gt;sess-&gt;vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf013,</div><div class='add'>+	    "TM response mcmd (%p) status %#x state %#x",</div><div class='add'>+	    mcmd, mcmd-&gt;fc_tm_rsp, mcmd-&gt;flags);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	if (mcmd-&gt;flags == QLA24XX_MGMT_SEND_NACK)</div><div class='add'>+		qlt_send_notify_ack(vha, &amp;mcmd-&gt;orig_iocb.imm_ntfy,</div><div class='add'>+		    0, 0, 0, 0, 0, 0);</div><div class='add'>+	else {</div><div class='add'>+		if (mcmd-&gt;se_cmd.se_tmr_req-&gt;function == TMR_ABORT_TASK)</div><div class='add'>+			qlt_24xx_send_abts_resp(vha, &amp;mcmd-&gt;orig_iocb.abts,</div><div class='add'>+			    mcmd-&gt;fc_tm_rsp, false);</div><div class='add'>+		else</div><div class='add'>+			qlt_24xx_send_task_mgmt_ctio(vha, mcmd,</div><div class='add'>+			    mcmd-&gt;fc_tm_rsp);</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Make the callback for -&gt;free_mcmd() to queue_work() and invoke</div><div class='add'>+	 * target_put_sess_cmd() to drop cmd_kref to 1.  The final</div><div class='add'>+	 * target_put_sess_cmd() call will be made from TFO-&gt;check_stop_free()</div><div class='add'>+	 * -&gt; tcm_qla2xxx_check_stop_free() to release the TMR associated se_cmd</div><div class='add'>+	 * descriptor after TFO-&gt;queue_tm_rsp() -&gt; tcm_qla2xxx_queue_tm_rsp() -&gt;</div><div class='add'>+	 * qlt_xmit_tm_rsp() returns here..</div><div class='add'>+	 */</div><div class='add'>+	ha-&gt;tgt.tgt_ops-&gt;free_mcmd(mcmd);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(qlt_xmit_tm_rsp);</div><div class='add'>+</div><div class='add'>+/* No locks */</div><div class='add'>+static int qlt_pci_map_calc_cnt(struct qla_tgt_prm *prm)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_cmd *cmd = prm-&gt;cmd;</div><div class='add'>+</div><div class='add'>+	BUG_ON(cmd-&gt;sg_cnt == 0);</div><div class='add'>+</div><div class='add'>+	prm-&gt;sg = (struct scatterlist *)cmd-&gt;sg;</div><div class='add'>+	prm-&gt;seg_cnt = pci_map_sg(prm-&gt;tgt-&gt;ha-&gt;pdev, cmd-&gt;sg,</div><div class='add'>+	    cmd-&gt;sg_cnt, cmd-&gt;dma_data_direction);</div><div class='add'>+	if (unlikely(prm-&gt;seg_cnt == 0))</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	prm-&gt;cmd-&gt;sg_mapped = 1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If greater than four sg entries then we need to allocate</div><div class='add'>+	 * the continuation entries</div><div class='add'>+	 */</div><div class='add'>+	if (prm-&gt;seg_cnt &gt; prm-&gt;tgt-&gt;datasegs_per_cmd)</div><div class='add'>+		prm-&gt;req_cnt += DIV_ROUND_UP(prm-&gt;seg_cnt -</div><div class='add'>+		    prm-&gt;tgt-&gt;datasegs_per_cmd, prm-&gt;tgt-&gt;datasegs_per_cont);</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, prm-&gt;cmd-&gt;vha, 0xe009, "seg_cnt=%d, req_cnt=%d\n",</div><div class='add'>+	    prm-&gt;seg_cnt, prm-&gt;req_cnt);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_err:</div><div class='add'>+	ql_dbg(ql_dbg_tgt, prm-&gt;cmd-&gt;vha, 0xe04d,</div><div class='add'>+	    "qla_target(%d): PCI mapping failed: sg_cnt=%d",</div><div class='add'>+	    0, prm-&gt;cmd-&gt;sg_cnt);</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void qlt_unmap_sg(struct scsi_qla_host *vha,</div><div class='add'>+	struct qla_tgt_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+</div><div class='add'>+	BUG_ON(!cmd-&gt;sg_mapped);</div><div class='add'>+	pci_unmap_sg(ha-&gt;pdev, cmd-&gt;sg, cmd-&gt;sg_cnt, cmd-&gt;dma_data_direction);</div><div class='add'>+	cmd-&gt;sg_mapped = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qlt_check_reserve_free_req(struct scsi_qla_host *vha,</div><div class='add'>+	uint32_t req_cnt)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	device_reg_t __iomem *reg = ha-&gt;iobase;</div><div class='add'>+	uint32_t cnt;</div><div class='add'>+</div><div class='add'>+	if (vha-&gt;req-&gt;cnt &lt; (req_cnt + 2)) {</div><div class='add'>+		cnt = (uint16_t)RD_REG_DWORD(&amp;reg-&gt;isp24.req_q_out);</div><div class='add'>+</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe00a,</div><div class='add'>+		    "Request ring circled: cnt=%d, vha-&gt;-&gt;ring_index=%d, "</div><div class='add'>+		    "vha-&gt;req-&gt;cnt=%d, req_cnt=%d\n", cnt,</div><div class='add'>+		    vha-&gt;req-&gt;ring_index, vha-&gt;req-&gt;cnt, req_cnt);</div><div class='add'>+		if  (vha-&gt;req-&gt;ring_index &lt; cnt)</div><div class='add'>+			vha-&gt;req-&gt;cnt = cnt - vha-&gt;req-&gt;ring_index;</div><div class='add'>+		else</div><div class='add'>+			vha-&gt;req-&gt;cnt = vha-&gt;req-&gt;length -</div><div class='add'>+			    (vha-&gt;req-&gt;ring_index - cnt);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(vha-&gt;req-&gt;cnt &lt; (req_cnt + 2))) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe00b,</div><div class='add'>+		    "qla_target(%d): There is no room in the "</div><div class='add'>+		    "request ring: vha-&gt;req-&gt;ring_index=%d, vha-&gt;req-&gt;cnt=%d, "</div><div class='add'>+		    "req_cnt=%d\n", vha-&gt;vp_idx, vha-&gt;req-&gt;ring_index,</div><div class='add'>+		    vha-&gt;req-&gt;cnt, req_cnt);</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+	vha-&gt;req-&gt;cnt -= req_cnt;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. Might drop it, then reaquire</div><div class='add'>+ */</div><div class='add'>+static inline void *qlt_get_req_pkt(struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	/* Adjust ring index. */</div><div class='add'>+	vha-&gt;req-&gt;ring_index++;</div><div class='add'>+	if (vha-&gt;req-&gt;ring_index == vha-&gt;req-&gt;length) {</div><div class='add'>+		vha-&gt;req-&gt;ring_index = 0;</div><div class='add'>+		vha-&gt;req-&gt;ring_ptr = vha-&gt;req-&gt;ring;</div><div class='add'>+	} else {</div><div class='add'>+		vha-&gt;req-&gt;ring_ptr++;</div><div class='add'>+	}</div><div class='add'>+	return (cont_entry_t *)vha-&gt;req-&gt;ring_ptr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static inline uint32_t qlt_make_handle(struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	uint32_t h;</div><div class='add'>+</div><div class='add'>+	h = ha-&gt;tgt.current_handle;</div><div class='add'>+	/* always increment cmd handle */</div><div class='add'>+	do {</div><div class='add'>+		++h;</div><div class='add'>+		if (h &gt; MAX_OUTSTANDING_COMMANDS)</div><div class='add'>+			h = 1; /* 0 is QLA_TGT_NULL_HANDLE */</div><div class='add'>+		if (h == ha-&gt;tgt.current_handle) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe04e,</div><div class='add'>+			    "qla_target(%d): Ran out of "</div><div class='add'>+			    "empty cmd slots in ha %p\n", vha-&gt;vp_idx, ha);</div><div class='add'>+			h = QLA_TGT_NULL_HANDLE;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} while ((h == QLA_TGT_NULL_HANDLE) ||</div><div class='add'>+	    (h == QLA_TGT_SKIP_HANDLE) ||</div><div class='add'>+	    (ha-&gt;tgt.cmds[h-1] != NULL));</div><div class='add'>+</div><div class='add'>+	if (h != QLA_TGT_NULL_HANDLE)</div><div class='add'>+		ha-&gt;tgt.current_handle = h;</div><div class='add'>+</div><div class='add'>+	return h;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static int qlt_24xx_build_ctio_pkt(struct qla_tgt_prm *prm,</div><div class='add'>+	struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	uint32_t h;</div><div class='add'>+	struct ctio7_to_24xx *pkt;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct atio_from_isp *atio = &amp;prm-&gt;cmd-&gt;atio;</div><div class='add'>+</div><div class='add'>+	pkt = (struct ctio7_to_24xx *)vha-&gt;req-&gt;ring_ptr;</div><div class='add'>+	prm-&gt;pkt = pkt;</div><div class='add'>+	memset(pkt, 0, sizeof(*pkt));</div><div class='add'>+</div><div class='add'>+	pkt-&gt;entry_type = CTIO_TYPE7;</div><div class='add'>+	pkt-&gt;entry_count = (uint8_t)prm-&gt;req_cnt;</div><div class='add'>+	pkt-&gt;vp_index = vha-&gt;vp_idx;</div><div class='add'>+</div><div class='add'>+	h = qlt_make_handle(vha);</div><div class='add'>+	if (unlikely(h == QLA_TGT_NULL_HANDLE)) {</div><div class='add'>+		/*</div><div class='add'>+		 * CTIO type 7 from the firmware doesn't provide a way to</div><div class='add'>+		 * know the initiator's LOOP ID, hence we can't find</div><div class='add'>+		 * the session and, so, the command.</div><div class='add'>+		 */</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	} else</div><div class='add'>+		ha-&gt;tgt.cmds[h-1] = prm-&gt;cmd;</div><div class='add'>+</div><div class='add'>+	pkt-&gt;handle = h | CTIO_COMPLETION_HANDLE_MARK;</div><div class='add'>+	pkt-&gt;nport_handle = prm-&gt;cmd-&gt;loop_id;</div><div class='add'>+	pkt-&gt;timeout = __constant_cpu_to_le16(QLA_TGT_TIMEOUT);</div><div class='add'>+	pkt-&gt;initiator_id[0] = atio-&gt;u.isp24.fcp_hdr.s_id[2];</div><div class='add'>+	pkt-&gt;initiator_id[1] = atio-&gt;u.isp24.fcp_hdr.s_id[1];</div><div class='add'>+	pkt-&gt;initiator_id[2] = atio-&gt;u.isp24.fcp_hdr.s_id[0];</div><div class='add'>+	pkt-&gt;exchange_addr = atio-&gt;u.isp24.exchange_addr;</div><div class='add'>+	pkt-&gt;u.status0.flags |= (atio-&gt;u.isp24.attr &lt;&lt; 9);</div><div class='add'>+	pkt-&gt;u.status0.ox_id = swab16(atio-&gt;u.isp24.fcp_hdr.ox_id);</div><div class='add'>+	pkt-&gt;u.status0.relative_offset = cpu_to_le32(prm-&gt;cmd-&gt;offset);</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe00c,</div><div class='add'>+	    "qla_target(%d): handle(cmd) -&gt; %08x, timeout %d, ox_id %#x\n",</div><div class='add'>+	    vha-&gt;vp_idx, pkt-&gt;handle, QLA_TGT_TIMEOUT,</div><div class='add'>+	    le16_to_cpu(pkt-&gt;u.status0.ox_id));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. We have already made sure</div><div class='add'>+ * that there is sufficient amount of request entries to not drop it.</div><div class='add'>+ */</div><div class='add'>+static void qlt_load_cont_data_segments(struct qla_tgt_prm *prm,</div><div class='add'>+	struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	int cnt;</div><div class='add'>+	uint32_t *dword_ptr;</div><div class='add'>+	int enable_64bit_addressing = prm-&gt;tgt-&gt;tgt_enable_64bit_addr;</div><div class='add'>+</div><div class='add'>+	/* Build continuation packets */</div><div class='add'>+	while (prm-&gt;seg_cnt &gt; 0) {</div><div class='add'>+		cont_a64_entry_t *cont_pkt64 =</div><div class='add'>+			(cont_a64_entry_t *)qlt_get_req_pkt(vha);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Make sure that from cont_pkt64 none of</div><div class='add'>+		 * 64-bit specific fields used for 32-bit</div><div class='add'>+		 * addressing. Cast to (cont_entry_t *) for</div><div class='add'>+		 * that.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		memset(cont_pkt64, 0, sizeof(*cont_pkt64));</div><div class='add'>+</div><div class='add'>+		cont_pkt64-&gt;entry_count = 1;</div><div class='add'>+		cont_pkt64-&gt;sys_define = 0;</div><div class='add'>+</div><div class='add'>+		if (enable_64bit_addressing) {</div><div class='add'>+			cont_pkt64-&gt;entry_type = CONTINUE_A64_TYPE;</div><div class='add'>+			dword_ptr =</div><div class='add'>+			    (uint32_t *)&amp;cont_pkt64-&gt;dseg_0_address;</div><div class='add'>+		} else {</div><div class='add'>+			cont_pkt64-&gt;entry_type = CONTINUE_TYPE;</div><div class='add'>+			dword_ptr =</div><div class='add'>+			    (uint32_t *)&amp;((cont_entry_t *)</div><div class='add'>+				cont_pkt64)-&gt;dseg_0_address;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Load continuation entry data segments */</div><div class='add'>+		for (cnt = 0;</div><div class='add'>+		    cnt &lt; prm-&gt;tgt-&gt;datasegs_per_cont &amp;&amp; prm-&gt;seg_cnt;</div><div class='add'>+		    cnt++, prm-&gt;seg_cnt--) {</div><div class='add'>+			*dword_ptr++ =</div><div class='add'>+			    cpu_to_le32(pci_dma_lo32</div><div class='add'>+				(sg_dma_address(prm-&gt;sg)));</div><div class='add'>+			if (enable_64bit_addressing) {</div><div class='add'>+				*dword_ptr++ =</div><div class='add'>+				    cpu_to_le32(pci_dma_hi32</div><div class='add'>+					(sg_dma_address</div><div class='add'>+					(prm-&gt;sg)));</div><div class='add'>+			}</div><div class='add'>+			*dword_ptr++ = cpu_to_le32(sg_dma_len(prm-&gt;sg));</div><div class='add'>+</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe00d,</div><div class='add'>+			    "S/G Segment Cont. phys_addr=%llx:%llx, len=%d\n",</div><div class='add'>+			    (long long unsigned int)</div><div class='add'>+			    pci_dma_hi32(sg_dma_address(prm-&gt;sg)),</div><div class='add'>+			    (long long unsigned int)</div><div class='add'>+			    pci_dma_lo32(sg_dma_address(prm-&gt;sg)),</div><div class='add'>+			    (int)sg_dma_len(prm-&gt;sg));</div><div class='add'>+</div><div class='add'>+			prm-&gt;sg = sg_next(prm-&gt;sg);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. We have already made sure</div><div class='add'>+ * that there is sufficient amount of request entries to not drop it.</div><div class='add'>+ */</div><div class='add'>+static void qlt_load_data_segments(struct qla_tgt_prm *prm,</div><div class='add'>+	struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	int cnt;</div><div class='add'>+	uint32_t *dword_ptr;</div><div class='add'>+	int enable_64bit_addressing = prm-&gt;tgt-&gt;tgt_enable_64bit_addr;</div><div class='add'>+	struct ctio7_to_24xx *pkt24 = (struct ctio7_to_24xx *)prm-&gt;pkt;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe00e,</div><div class='add'>+	    "iocb-&gt;scsi_status=%x, iocb-&gt;flags=%x\n",</div><div class='add'>+	    le16_to_cpu(pkt24-&gt;u.status0.scsi_status),</div><div class='add'>+	    le16_to_cpu(pkt24-&gt;u.status0.flags));</div><div class='add'>+</div><div class='add'>+	pkt24-&gt;u.status0.transfer_length = cpu_to_le32(prm-&gt;cmd-&gt;bufflen);</div><div class='add'>+</div><div class='add'>+	/* Setup packet address segment pointer */</div><div class='add'>+	dword_ptr = pkt24-&gt;u.status0.dseg_0_address;</div><div class='add'>+</div><div class='add'>+	/* Set total data segment count */</div><div class='add'>+	if (prm-&gt;seg_cnt)</div><div class='add'>+		pkt24-&gt;dseg_count = cpu_to_le16(prm-&gt;seg_cnt);</div><div class='add'>+</div><div class='add'>+	if (prm-&gt;seg_cnt == 0) {</div><div class='add'>+		/* No data transfer */</div><div class='add'>+		*dword_ptr++ = 0;</div><div class='add'>+		*dword_ptr = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If scatter gather */</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe00f, "%s", "Building S/G data segments...");</div><div class='add'>+</div><div class='add'>+	/* Load command entry data segments */</div><div class='add'>+	for (cnt = 0;</div><div class='add'>+	    (cnt &lt; prm-&gt;tgt-&gt;datasegs_per_cmd) &amp;&amp; prm-&gt;seg_cnt;</div><div class='add'>+	    cnt++, prm-&gt;seg_cnt--) {</div><div class='add'>+		*dword_ptr++ =</div><div class='add'>+		    cpu_to_le32(pci_dma_lo32(sg_dma_address(prm-&gt;sg)));</div><div class='add'>+		if (enable_64bit_addressing) {</div><div class='add'>+			*dword_ptr++ =</div><div class='add'>+			    cpu_to_le32(pci_dma_hi32(</div><div class='add'>+				sg_dma_address(prm-&gt;sg)));</div><div class='add'>+		}</div><div class='add'>+		*dword_ptr++ = cpu_to_le32(sg_dma_len(prm-&gt;sg));</div><div class='add'>+</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe010,</div><div class='add'>+		    "S/G Segment phys_addr=%llx:%llx, len=%d\n",</div><div class='add'>+		    (long long unsigned int)pci_dma_hi32(sg_dma_address(</div><div class='add'>+		    prm-&gt;sg)),</div><div class='add'>+		    (long long unsigned int)pci_dma_lo32(sg_dma_address(</div><div class='add'>+		    prm-&gt;sg)),</div><div class='add'>+		    (int)sg_dma_len(prm-&gt;sg));</div><div class='add'>+</div><div class='add'>+		prm-&gt;sg = sg_next(prm-&gt;sg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qlt_load_cont_data_segments(prm, vha);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int qlt_has_data(struct qla_tgt_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	return cmd-&gt;bufflen &gt; 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called without ha-&gt;hardware_lock held</div><div class='add'>+ */</div><div class='add'>+static int qlt_pre_xmit_response(struct qla_tgt_cmd *cmd,</div><div class='add'>+	struct qla_tgt_prm *prm, int xmit_type, uint8_t scsi_status,</div><div class='add'>+	uint32_t *full_req_cnt)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt *tgt = cmd-&gt;tgt;</div><div class='add'>+	struct scsi_qla_host *vha = tgt-&gt;vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct se_cmd *se_cmd = &amp;cmd-&gt;se_cmd;</div><div class='add'>+</div><div class='add'>+	if (unlikely(cmd-&gt;aborted)) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf014,</div><div class='add'>+		    "qla_target(%d): terminating exchange "</div><div class='add'>+		    "for aborted cmd=%p (se_cmd=%p, tag=%d)", vha-&gt;vp_idx, cmd,</div><div class='add'>+		    se_cmd, cmd-&gt;tag);</div><div class='add'>+</div><div class='add'>+		cmd-&gt;state = QLA_TGT_STATE_ABORTED;</div><div class='add'>+</div><div class='add'>+		qlt_send_term_exchange(vha, cmd, &amp;cmd-&gt;atio, 0);</div><div class='add'>+</div><div class='add'>+		/* !! At this point cmd could be already freed !! */</div><div class='add'>+		return QLA_TGT_PRE_XMIT_RESP_CMD_ABORTED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe011, "qla_target(%d): tag=%u\n",</div><div class='add'>+	    vha-&gt;vp_idx, cmd-&gt;tag);</div><div class='add'>+</div><div class='add'>+	prm-&gt;cmd = cmd;</div><div class='add'>+	prm-&gt;tgt = tgt;</div><div class='add'>+	prm-&gt;rq_result = scsi_status;</div><div class='add'>+	prm-&gt;sense_buffer = &amp;cmd-&gt;sense_buffer[0];</div><div class='add'>+	prm-&gt;sense_buffer_len = TRANSPORT_SENSE_BUFFER;</div><div class='add'>+	prm-&gt;sg = NULL;</div><div class='add'>+	prm-&gt;seg_cnt = -1;</div><div class='add'>+	prm-&gt;req_cnt = 1;</div><div class='add'>+	prm-&gt;add_status_pkt = 0;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe012, "rq_result=%x, xmit_type=%x\n",</div><div class='add'>+	    prm-&gt;rq_result, xmit_type);</div><div class='add'>+</div><div class='add'>+	/* Send marker if required */</div><div class='add'>+	if (qlt_issue_marker(vha, 0) != QLA_SUCCESS)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe013, "CTIO start: vha(%d)\n", vha-&gt;vp_idx);</div><div class='add'>+</div><div class='add'>+	if ((xmit_type &amp; QLA_TGT_XMIT_DATA) &amp;&amp; qlt_has_data(cmd)) {</div><div class='add'>+		if  (qlt_pci_map_calc_cnt(prm) != 0)</div><div class='add'>+			return -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*full_req_cnt = prm-&gt;req_cnt;</div><div class='add'>+</div><div class='add'>+	if (se_cmd-&gt;se_cmd_flags &amp; SCF_UNDERFLOW_BIT) {</div><div class='add'>+		prm-&gt;residual = se_cmd-&gt;residual_count;</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe014,</div><div class='add'>+		    "Residual underflow: %d (tag %d, "</div><div class='add'>+		    "op %x, bufflen %d, rq_result %x)\n", prm-&gt;residual,</div><div class='add'>+		    cmd-&gt;tag, se_cmd-&gt;t_task_cdb ? se_cmd-&gt;t_task_cdb[0] : 0,</div><div class='add'>+		    cmd-&gt;bufflen, prm-&gt;rq_result);</div><div class='add'>+		prm-&gt;rq_result |= SS_RESIDUAL_UNDER;</div><div class='add'>+	} else if (se_cmd-&gt;se_cmd_flags &amp; SCF_OVERFLOW_BIT) {</div><div class='add'>+		prm-&gt;residual = se_cmd-&gt;residual_count;</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe015,</div><div class='add'>+		    "Residual overflow: %d (tag %d, "</div><div class='add'>+		    "op %x, bufflen %d, rq_result %x)\n", prm-&gt;residual,</div><div class='add'>+		    cmd-&gt;tag, se_cmd-&gt;t_task_cdb ? se_cmd-&gt;t_task_cdb[0] : 0,</div><div class='add'>+		    cmd-&gt;bufflen, prm-&gt;rq_result);</div><div class='add'>+		prm-&gt;rq_result |= SS_RESIDUAL_OVER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (xmit_type &amp; QLA_TGT_XMIT_STATUS) {</div><div class='add'>+		/*</div><div class='add'>+		 * If QLA_TGT_XMIT_DATA is not set, add_status_pkt will be</div><div class='add'>+		 * ignored in *xmit_response() below</div><div class='add'>+		 */</div><div class='add'>+		if (qlt_has_data(cmd)) {</div><div class='add'>+			if (QLA_TGT_SENSE_VALID(prm-&gt;sense_buffer) ||</div><div class='add'>+			    (IS_FWI2_CAPABLE(ha) &amp;&amp;</div><div class='add'>+			    (prm-&gt;rq_result != 0))) {</div><div class='add'>+				prm-&gt;add_status_pkt = 1;</div><div class='add'>+				(*full_req_cnt)++;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe016,</div><div class='add'>+	    "req_cnt=%d, full_req_cnt=%d, add_status_pkt=%d\n",</div><div class='add'>+	    prm-&gt;req_cnt, *full_req_cnt, prm-&gt;add_status_pkt);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int qlt_need_explicit_conf(struct qla_hw_data *ha,</div><div class='add'>+	struct qla_tgt_cmd *cmd, int sending_sense)</div><div class='add'>+{</div><div class='add'>+	if (ha-&gt;tgt.enable_class_2)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (sending_sense)</div><div class='add'>+		return cmd-&gt;conf_compl_supported;</div><div class='add'>+	else</div><div class='add'>+		return ha-&gt;tgt.enable_explicit_conf &amp;&amp;</div><div class='add'>+		    cmd-&gt;conf_compl_supported;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_QLA_TGT_DEBUG_SRR</div><div class='add'>+/*</div><div class='add'>+ *  Original taken from the XFS code</div><div class='add'>+ */</div><div class='add'>+static unsigned long qlt_srr_random(void)</div><div class='add'>+{</div><div class='add'>+	static int Inited;</div><div class='add'>+	static unsigned long RandomValue;</div><div class='add'>+	static DEFINE_SPINLOCK(lock);</div><div class='add'>+	/* cycles pseudo-randomly through all values between 1 and 2^31 - 2 */</div><div class='add'>+	register long rv;</div><div class='add'>+	register long lo;</div><div class='add'>+	register long hi;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;lock, flags);</div><div class='add'>+	if (!Inited) {</div><div class='add'>+		RandomValue = jiffies;</div><div class='add'>+		Inited = 1;</div><div class='add'>+	}</div><div class='add'>+	rv = RandomValue;</div><div class='add'>+	hi = rv / 127773;</div><div class='add'>+	lo = rv % 127773;</div><div class='add'>+	rv = 16807 * lo - 2836 * hi;</div><div class='add'>+	if (rv &lt;= 0)</div><div class='add'>+		rv += 2147483647;</div><div class='add'>+	RandomValue = rv;</div><div class='add'>+	spin_unlock_irqrestore(&amp;lock, flags);</div><div class='add'>+	return rv;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qlt_check_srr_debug(struct qla_tgt_cmd *cmd, int *xmit_type)</div><div class='add'>+{</div><div class='add'>+#if 0 /* This is not a real status packets lost, so it won't lead to SRR */</div><div class='add'>+	if ((*xmit_type &amp; QLA_TGT_XMIT_STATUS) &amp;&amp; (qlt_srr_random() % 200)</div><div class='add'>+	    == 50) {</div><div class='add'>+		*xmit_type &amp;= ~QLA_TGT_XMIT_STATUS;</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, cmd-&gt;vha, 0xf015,</div><div class='add'>+		    "Dropping cmd %p (tag %d) status", cmd, cmd-&gt;tag);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	/*</div><div class='add'>+	 * It's currently not possible to simulate SRRs for FCP_WRITE without</div><div class='add'>+	 * a physical link layer failure, so don't even try here..</div><div class='add'>+	 */</div><div class='add'>+	if (cmd-&gt;dma_data_direction != DMA_FROM_DEVICE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (qlt_has_data(cmd) &amp;&amp; (cmd-&gt;sg_cnt &gt; 1) &amp;&amp;</div><div class='add'>+	    ((qlt_srr_random() % 100) == 20)) {</div><div class='add'>+		int i, leave = 0;</div><div class='add'>+		unsigned int tot_len = 0;</div><div class='add'>+</div><div class='add'>+		while (leave == 0)</div><div class='add'>+			leave = qlt_srr_random() % cmd-&gt;sg_cnt;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; leave; i++)</div><div class='add'>+			tot_len += cmd-&gt;sg[i].length;</div><div class='add'>+</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, cmd-&gt;vha, 0xf016,</div><div class='add'>+		    "Cutting cmd %p (tag %d) buffer"</div><div class='add'>+		    " tail to len %d, sg_cnt %d (cmd-&gt;bufflen %d,"</div><div class='add'>+		    " cmd-&gt;sg_cnt %d)", cmd, cmd-&gt;tag, tot_len, leave,</div><div class='add'>+		    cmd-&gt;bufflen, cmd-&gt;sg_cnt);</div><div class='add'>+</div><div class='add'>+		cmd-&gt;bufflen = tot_len;</div><div class='add'>+		cmd-&gt;sg_cnt = leave;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (qlt_has_data(cmd) &amp;&amp; ((qlt_srr_random() % 100) == 70)) {</div><div class='add'>+		unsigned int offset = qlt_srr_random() % cmd-&gt;bufflen;</div><div class='add'>+</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, cmd-&gt;vha, 0xf017,</div><div class='add'>+		    "Cutting cmd %p (tag %d) buffer head "</div><div class='add'>+		    "to offset %d (cmd-&gt;bufflen %d)", cmd, cmd-&gt;tag, offset,</div><div class='add'>+		    cmd-&gt;bufflen);</div><div class='add'>+		if (offset == 0)</div><div class='add'>+			*xmit_type &amp;= ~QLA_TGT_XMIT_DATA;</div><div class='add'>+		else if (qlt_set_data_offset(cmd, offset)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, cmd-&gt;vha, 0xf018,</div><div class='add'>+			    "qlt_set_data_offset() failed (tag %d)", cmd-&gt;tag);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline void qlt_check_srr_debug(struct qla_tgt_cmd *cmd, int *xmit_type)</div><div class='add'>+{}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void qlt_24xx_init_ctio_to_isp(struct ctio7_to_24xx *ctio,</div><div class='add'>+	struct qla_tgt_prm *prm)</div><div class='add'>+{</div><div class='add'>+	prm-&gt;sense_buffer_len = min_t(uint32_t, prm-&gt;sense_buffer_len,</div><div class='add'>+	    (uint32_t)sizeof(ctio-&gt;u.status1.sense_data));</div><div class='add'>+	ctio-&gt;u.status0.flags |=</div><div class='add'>+	    __constant_cpu_to_le16(CTIO7_FLAGS_SEND_STATUS);</div><div class='add'>+	if (qlt_need_explicit_conf(prm-&gt;tgt-&gt;ha, prm-&gt;cmd, 0)) {</div><div class='add'>+		ctio-&gt;u.status0.flags |= __constant_cpu_to_le16(</div><div class='add'>+		    CTIO7_FLAGS_EXPLICIT_CONFORM |</div><div class='add'>+		    CTIO7_FLAGS_CONFORM_REQ);</div><div class='add'>+	}</div><div class='add'>+	ctio-&gt;u.status0.residual = cpu_to_le32(prm-&gt;residual);</div><div class='add'>+	ctio-&gt;u.status0.scsi_status = cpu_to_le16(prm-&gt;rq_result);</div><div class='add'>+	if (QLA_TGT_SENSE_VALID(prm-&gt;sense_buffer)) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		if (qlt_need_explicit_conf(prm-&gt;tgt-&gt;ha, prm-&gt;cmd, 1)) {</div><div class='add'>+			if (prm-&gt;cmd-&gt;se_cmd.scsi_status != 0) {</div><div class='add'>+				ql_dbg(ql_dbg_tgt, prm-&gt;cmd-&gt;vha, 0xe017,</div><div class='add'>+				    "Skipping EXPLICIT_CONFORM and "</div><div class='add'>+				    "CTIO7_FLAGS_CONFORM_REQ for FCP READ w/ "</div><div class='add'>+				    "non GOOD status\n");</div><div class='add'>+				goto skip_explict_conf;</div><div class='add'>+			}</div><div class='add'>+			ctio-&gt;u.status1.flags |= __constant_cpu_to_le16(</div><div class='add'>+			    CTIO7_FLAGS_EXPLICIT_CONFORM |</div><div class='add'>+			    CTIO7_FLAGS_CONFORM_REQ);</div><div class='add'>+		}</div><div class='add'>+skip_explict_conf:</div><div class='add'>+		ctio-&gt;u.status1.flags &amp;=</div><div class='add'>+		    ~__constant_cpu_to_le16(CTIO7_FLAGS_STATUS_MODE_0);</div><div class='add'>+		ctio-&gt;u.status1.flags |=</div><div class='add'>+		    __constant_cpu_to_le16(CTIO7_FLAGS_STATUS_MODE_1);</div><div class='add'>+		ctio-&gt;u.status1.scsi_status |=</div><div class='add'>+		    __constant_cpu_to_le16(SS_SENSE_LEN_VALID);</div><div class='add'>+		ctio-&gt;u.status1.sense_length =</div><div class='add'>+		    cpu_to_le16(prm-&gt;sense_buffer_len);</div><div class='add'>+		for (i = 0; i &lt; prm-&gt;sense_buffer_len/4; i++)</div><div class='add'>+			((uint32_t *)ctio-&gt;u.status1.sense_data)[i] =</div><div class='add'>+				cpu_to_be32(((uint32_t *)prm-&gt;sense_buffer)[i]);</div><div class='add'>+#if 0</div><div class='add'>+		if (unlikely((prm-&gt;sense_buffer_len % 4) != 0)) {</div><div class='add'>+			static int q;</div><div class='add'>+			if (q &lt; 10) {</div><div class='add'>+				ql_dbg(ql_dbg_tgt, vha, 0xe04f,</div><div class='add'>+				    "qla_target(%d): %d bytes of sense "</div><div class='add'>+				    "lost", prm-&gt;tgt-&gt;ha-&gt;vp_idx,</div><div class='add'>+				    prm-&gt;sense_buffer_len % 4);</div><div class='add'>+				q++;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+#endif</div><div class='add'>+	} else {</div><div class='add'>+		ctio-&gt;u.status1.flags &amp;=</div><div class='add'>+		    ~__constant_cpu_to_le16(CTIO7_FLAGS_STATUS_MODE_0);</div><div class='add'>+		ctio-&gt;u.status1.flags |=</div><div class='add'>+		    __constant_cpu_to_le16(CTIO7_FLAGS_STATUS_MODE_1);</div><div class='add'>+		ctio-&gt;u.status1.sense_length = 0;</div><div class='add'>+		memset(ctio-&gt;u.status1.sense_data, 0,</div><div class='add'>+		    sizeof(ctio-&gt;u.status1.sense_data));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Sense with len &gt; 24, is it possible ??? */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Callback to setup response of xmit_type of QLA_TGT_XMIT_DATA and *</div><div class='add'>+ * QLA_TGT_XMIT_STATUS for &gt;= 24xx silicon</div><div class='add'>+ */</div><div class='add'>+int qlt_xmit_response(struct qla_tgt_cmd *cmd, int xmit_type,</div><div class='add'>+	uint8_t scsi_status)</div><div class='add'>+{</div><div class='add'>+	struct scsi_qla_host *vha = cmd-&gt;vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct ctio7_to_24xx *pkt;</div><div class='add'>+	struct qla_tgt_prm prm;</div><div class='add'>+	uint32_t full_req_cnt = 0;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	memset(&amp;prm, 0, sizeof(prm));</div><div class='add'>+	qlt_check_srr_debug(cmd, &amp;xmit_type);</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, cmd-&gt;vha, 0xe018,</div><div class='add'>+	    "is_send_status=%d, cmd-&gt;bufflen=%d, cmd-&gt;sg_cnt=%d, "</div><div class='add'>+	    "cmd-&gt;dma_data_direction=%d\n", (xmit_type &amp; QLA_TGT_XMIT_STATUS) ?</div><div class='add'>+	    1 : 0, cmd-&gt;bufflen, cmd-&gt;sg_cnt, cmd-&gt;dma_data_direction);</div><div class='add'>+</div><div class='add'>+	res = qlt_pre_xmit_response(cmd, &amp;prm, xmit_type, scsi_status,</div><div class='add'>+	    &amp;full_req_cnt);</div><div class='add'>+	if (unlikely(res != 0)) {</div><div class='add'>+		if (res == QLA_TGT_PRE_XMIT_RESP_CMD_ABORTED)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* Does F/W have an IOCBs for this request */</div><div class='add'>+	res = qlt_check_reserve_free_req(vha, full_req_cnt);</div><div class='add'>+	if (unlikely(res))</div><div class='add'>+		goto out_unmap_unlock;</div><div class='add'>+</div><div class='add'>+	res = qlt_24xx_build_ctio_pkt(&amp;prm, vha);</div><div class='add'>+	if (unlikely(res != 0))</div><div class='add'>+		goto out_unmap_unlock;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	pkt = (struct ctio7_to_24xx *)prm.pkt;</div><div class='add'>+</div><div class='add'>+	if (qlt_has_data(cmd) &amp;&amp; (xmit_type &amp; QLA_TGT_XMIT_DATA)) {</div><div class='add'>+		pkt-&gt;u.status0.flags |=</div><div class='add'>+		    __constant_cpu_to_le16(CTIO7_FLAGS_DATA_IN |</div><div class='add'>+			CTIO7_FLAGS_STATUS_MODE_0);</div><div class='add'>+</div><div class='add'>+		qlt_load_data_segments(&amp;prm, vha);</div><div class='add'>+</div><div class='add'>+		if (prm.add_status_pkt == 0) {</div><div class='add'>+			if (xmit_type &amp; QLA_TGT_XMIT_STATUS) {</div><div class='add'>+				pkt-&gt;u.status0.scsi_status =</div><div class='add'>+				    cpu_to_le16(prm.rq_result);</div><div class='add'>+				pkt-&gt;u.status0.residual =</div><div class='add'>+				    cpu_to_le32(prm.residual);</div><div class='add'>+				pkt-&gt;u.status0.flags |= __constant_cpu_to_le16(</div><div class='add'>+				    CTIO7_FLAGS_SEND_STATUS);</div><div class='add'>+				if (qlt_need_explicit_conf(ha, cmd, 0)) {</div><div class='add'>+					pkt-&gt;u.status0.flags |=</div><div class='add'>+					    __constant_cpu_to_le16(</div><div class='add'>+						CTIO7_FLAGS_EXPLICIT_CONFORM |</div><div class='add'>+						CTIO7_FLAGS_CONFORM_REQ);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+		} else {</div><div class='add'>+			/*</div><div class='add'>+			 * We have already made sure that there is sufficient</div><div class='add'>+			 * amount of request entries to not drop HW lock in</div><div class='add'>+			 * req_pkt().</div><div class='add'>+			 */</div><div class='add'>+			struct ctio7_to_24xx *ctio =</div><div class='add'>+				(struct ctio7_to_24xx *)qlt_get_req_pkt(vha);</div><div class='add'>+</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe019,</div><div class='add'>+			    "Building additional status packet\n");</div><div class='add'>+</div><div class='add'>+			memcpy(ctio, pkt, sizeof(*ctio));</div><div class='add'>+			ctio-&gt;entry_count = 1;</div><div class='add'>+			ctio-&gt;dseg_count = 0;</div><div class='add'>+			ctio-&gt;u.status1.flags &amp;= ~__constant_cpu_to_le16(</div><div class='add'>+			    CTIO7_FLAGS_DATA_IN);</div><div class='add'>+</div><div class='add'>+			/* Real finish is ctio_m1's finish */</div><div class='add'>+			pkt-&gt;handle |= CTIO_INTERMEDIATE_HANDLE_MARK;</div><div class='add'>+			pkt-&gt;u.status0.flags |= __constant_cpu_to_le16(</div><div class='add'>+			    CTIO7_FLAGS_DONT_RET_CTIO);</div><div class='add'>+			qlt_24xx_init_ctio_to_isp((struct ctio7_to_24xx *)ctio,</div><div class='add'>+			    &amp;prm);</div><div class='add'>+			pr_debug("Status CTIO7: %p\n", ctio);</div><div class='add'>+		}</div><div class='add'>+	} else</div><div class='add'>+		qlt_24xx_init_ctio_to_isp(pkt, &amp;prm);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	cmd-&gt;state = QLA_TGT_STATE_PROCESSED; /* Mid-level is done processing */</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe01a,</div><div class='add'>+	    "Xmitting CTIO7 response pkt for 24xx: %p scsi_status: 0x%02x\n",</div><div class='add'>+	    pkt, scsi_status);</div><div class='add'>+</div><div class='add'>+	qla2x00_start_iocbs(vha, vha-&gt;req);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_unmap_unlock:</div><div class='add'>+	if (cmd-&gt;sg_mapped)</div><div class='add'>+		qlt_unmap_sg(vha, cmd);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(qlt_xmit_response);</div><div class='add'>+</div><div class='add'>+int qlt_rdy_to_xfer(struct qla_tgt_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct ctio7_to_24xx *pkt;</div><div class='add'>+	struct scsi_qla_host *vha = cmd-&gt;vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = cmd-&gt;tgt;</div><div class='add'>+	struct qla_tgt_prm prm;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int res = 0;</div><div class='add'>+</div><div class='add'>+	memset(&amp;prm, 0, sizeof(prm));</div><div class='add'>+	prm.cmd = cmd;</div><div class='add'>+	prm.tgt = tgt;</div><div class='add'>+	prm.sg = NULL;</div><div class='add'>+	prm.req_cnt = 1;</div><div class='add'>+</div><div class='add'>+	/* Send marker if required */</div><div class='add'>+	if (qlt_issue_marker(vha, 0) != QLA_SUCCESS)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe01b, "CTIO_start: vha(%d)",</div><div class='add'>+	    (int)vha-&gt;vp_idx);</div><div class='add'>+</div><div class='add'>+	/* Calculate number of entries and segments required */</div><div class='add'>+	if (qlt_pci_map_calc_cnt(&amp;prm) != 0)</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* Does F/W have an IOCBs for this request */</div><div class='add'>+	res = qlt_check_reserve_free_req(vha, prm.req_cnt);</div><div class='add'>+	if (res != 0)</div><div class='add'>+		goto out_unlock_free_unmap;</div><div class='add'>+</div><div class='add'>+	res = qlt_24xx_build_ctio_pkt(&amp;prm, vha);</div><div class='add'>+	if (unlikely(res != 0))</div><div class='add'>+		goto out_unlock_free_unmap;</div><div class='add'>+	pkt = (struct ctio7_to_24xx *)prm.pkt;</div><div class='add'>+	pkt-&gt;u.status0.flags |= __constant_cpu_to_le16(CTIO7_FLAGS_DATA_OUT |</div><div class='add'>+	    CTIO7_FLAGS_STATUS_MODE_0);</div><div class='add'>+	qlt_load_data_segments(&amp;prm, vha);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;state = QLA_TGT_STATE_NEED_DATA;</div><div class='add'>+</div><div class='add'>+	qla2x00_start_iocbs(vha, vha-&gt;req);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+</div><div class='add'>+out_unlock_free_unmap:</div><div class='add'>+	if (cmd-&gt;sg_mapped)</div><div class='add'>+		qlt_unmap_sg(vha, cmd);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(qlt_rdy_to_xfer);</div><div class='add'>+</div><div class='add'>+/* If hardware_lock held on entry, might drop it, then reaquire */</div><div class='add'>+/* This function sends the appropriate CTIO to ISP 2xxx or 24xx */</div><div class='add'>+static int __qlt_send_term_exchange(struct scsi_qla_host *vha,</div><div class='add'>+	struct qla_tgt_cmd *cmd,</div><div class='add'>+	struct atio_from_isp *atio)</div><div class='add'>+{</div><div class='add'>+	struct ctio7_to_24xx *ctio24;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	request_t *pkt;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe01c, "Sending TERM EXCH CTIO (ha=%p)\n", ha);</div><div class='add'>+</div><div class='add'>+	pkt = (request_t *)qla2x00_alloc_iocbs(vha, NULL);</div><div class='add'>+	if (pkt == NULL) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe050,</div><div class='add'>+		    "qla_target(%d): %s failed: unable to allocate "</div><div class='add'>+		    "request packet\n", vha-&gt;vp_idx, __func__);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cmd != NULL) {</div><div class='add'>+		if (cmd-&gt;state &lt; QLA_TGT_STATE_PROCESSED) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe051,</div><div class='add'>+			    "qla_target(%d): Terminating cmd %p with "</div><div class='add'>+			    "incorrect state %d\n", vha-&gt;vp_idx, cmd,</div><div class='add'>+			    cmd-&gt;state);</div><div class='add'>+		} else</div><div class='add'>+			ret = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pkt-&gt;entry_count = 1;</div><div class='add'>+	pkt-&gt;handle = QLA_TGT_SKIP_HANDLE | CTIO_COMPLETION_HANDLE_MARK;</div><div class='add'>+</div><div class='add'>+	ctio24 = (struct ctio7_to_24xx *)pkt;</div><div class='add'>+	ctio24-&gt;entry_type = CTIO_TYPE7;</div><div class='add'>+	ctio24-&gt;nport_handle = cmd ? cmd-&gt;loop_id : CTIO7_NHANDLE_UNRECOGNIZED;</div><div class='add'>+	ctio24-&gt;timeout = __constant_cpu_to_le16(QLA_TGT_TIMEOUT);</div><div class='add'>+	ctio24-&gt;vp_index = vha-&gt;vp_idx;</div><div class='add'>+	ctio24-&gt;initiator_id[0] = atio-&gt;u.isp24.fcp_hdr.s_id[2];</div><div class='add'>+	ctio24-&gt;initiator_id[1] = atio-&gt;u.isp24.fcp_hdr.s_id[1];</div><div class='add'>+	ctio24-&gt;initiator_id[2] = atio-&gt;u.isp24.fcp_hdr.s_id[0];</div><div class='add'>+	ctio24-&gt;exchange_addr = atio-&gt;u.isp24.exchange_addr;</div><div class='add'>+	ctio24-&gt;u.status1.flags = (atio-&gt;u.isp24.attr &lt;&lt; 9) |</div><div class='add'>+	    __constant_cpu_to_le16(CTIO7_FLAGS_STATUS_MODE_1 |</div><div class='add'>+		CTIO7_FLAGS_TERMINATE);</div><div class='add'>+	ctio24-&gt;u.status1.ox_id = swab16(atio-&gt;u.isp24.fcp_hdr.ox_id);</div><div class='add'>+</div><div class='add'>+	/* Most likely, it isn't needed */</div><div class='add'>+	ctio24-&gt;u.status1.residual = get_unaligned((uint32_t *)</div><div class='add'>+	    &amp;atio-&gt;u.isp24.fcp_cmnd.add_cdb[</div><div class='add'>+	    atio-&gt;u.isp24.fcp_cmnd.add_cdb_len]);</div><div class='add'>+	if (ctio24-&gt;u.status1.residual != 0)</div><div class='add'>+		ctio24-&gt;u.status1.scsi_status |= SS_RESIDUAL_UNDER;</div><div class='add'>+</div><div class='add'>+	qla2x00_start_iocbs(vha, vha-&gt;req);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qlt_send_term_exchange(struct scsi_qla_host *vha,</div><div class='add'>+	struct qla_tgt_cmd *cmd, struct atio_from_isp *atio, int ha_locked)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (qlt_issue_marker(vha, ha_locked) &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (ha_locked) {</div><div class='add'>+		rc = __qlt_send_term_exchange(vha, cmd, atio);</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+	spin_lock_irqsave(&amp;vha-&gt;hw-&gt;hardware_lock, flags);</div><div class='add'>+	rc = __qlt_send_term_exchange(vha, cmd, atio);</div><div class='add'>+	spin_unlock_irqrestore(&amp;vha-&gt;hw-&gt;hardware_lock, flags);</div><div class='add'>+done:</div><div class='add'>+	if (rc == 1) {</div><div class='add'>+		if (!ha_locked &amp;&amp; !in_interrupt())</div><div class='add'>+			msleep(250); /* just in case */</div><div class='add'>+</div><div class='add'>+		vha-&gt;hw-&gt;tgt.tgt_ops-&gt;free_cmd(cmd);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qlt_free_cmd(struct qla_tgt_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	BUG_ON(cmd-&gt;sg_mapped);</div><div class='add'>+</div><div class='add'>+	if (unlikely(cmd-&gt;free_sg))</div><div class='add'>+		kfree(cmd-&gt;sg);</div><div class='add'>+	kmem_cache_free(qla_tgt_cmd_cachep, cmd);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(qlt_free_cmd);</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static int qlt_prepare_srr_ctio(struct scsi_qla_host *vha,</div><div class='add'>+	struct qla_tgt_cmd *cmd, void *ctio)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_srr_ctio *sc;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+	struct qla_tgt_srr_imm *imm;</div><div class='add'>+</div><div class='add'>+	tgt-&gt;ctio_srr_id++;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf019,</div><div class='add'>+	    "qla_target(%d): CTIO with SRR status received\n", vha-&gt;vp_idx);</div><div class='add'>+</div><div class='add'>+	if (!ctio) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf055,</div><div class='add'>+		    "qla_target(%d): SRR CTIO, but ctio is NULL\n",</div><div class='add'>+		    vha-&gt;vp_idx);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sc = kzalloc(sizeof(*sc), GFP_ATOMIC);</div><div class='add'>+	if (sc != NULL) {</div><div class='add'>+		sc-&gt;cmd = cmd;</div><div class='add'>+		/* IRQ is already OFF */</div><div class='add'>+		spin_lock(&amp;tgt-&gt;srr_lock);</div><div class='add'>+		sc-&gt;srr_id = tgt-&gt;ctio_srr_id;</div><div class='add'>+		list_add_tail(&amp;sc-&gt;srr_list_entry,</div><div class='add'>+		    &amp;tgt-&gt;srr_ctio_list);</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf01a,</div><div class='add'>+		    "CTIO SRR %p added (id %d)\n", sc, sc-&gt;srr_id);</div><div class='add'>+		if (tgt-&gt;imm_srr_id == tgt-&gt;ctio_srr_id) {</div><div class='add'>+			int found = 0;</div><div class='add'>+			list_for_each_entry(imm, &amp;tgt-&gt;srr_imm_list,</div><div class='add'>+			    srr_list_entry) {</div><div class='add'>+				if (imm-&gt;srr_id == sc-&gt;srr_id) {</div><div class='add'>+					found = 1;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			if (found) {</div><div class='add'>+				ql_dbg(ql_dbg_tgt_mgt, vha, 0xf01b,</div><div class='add'>+				    "Scheduling srr work\n");</div><div class='add'>+				schedule_work(&amp;tgt-&gt;srr_work);</div><div class='add'>+			} else {</div><div class='add'>+				ql_dbg(ql_dbg_tgt_mgt, vha, 0xf056,</div><div class='add'>+				    "qla_target(%d): imm_srr_id "</div><div class='add'>+				    "== ctio_srr_id (%d), but there is no "</div><div class='add'>+				    "corresponding SRR IMM, deleting CTIO "</div><div class='add'>+				    "SRR %p\n", vha-&gt;vp_idx,</div><div class='add'>+				    tgt-&gt;ctio_srr_id, sc);</div><div class='add'>+				list_del(&amp;sc-&gt;srr_list_entry);</div><div class='add'>+				spin_unlock(&amp;tgt-&gt;srr_lock);</div><div class='add'>+</div><div class='add'>+				kfree(sc);</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		spin_unlock(&amp;tgt-&gt;srr_lock);</div><div class='add'>+	} else {</div><div class='add'>+		struct qla_tgt_srr_imm *ti;</div><div class='add'>+</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf057,</div><div class='add'>+		    "qla_target(%d): Unable to allocate SRR CTIO entry\n",</div><div class='add'>+		    vha-&gt;vp_idx);</div><div class='add'>+		spin_lock(&amp;tgt-&gt;srr_lock);</div><div class='add'>+		list_for_each_entry_safe(imm, ti, &amp;tgt-&gt;srr_imm_list,</div><div class='add'>+		    srr_list_entry) {</div><div class='add'>+			if (imm-&gt;srr_id == tgt-&gt;ctio_srr_id) {</div><div class='add'>+				ql_dbg(ql_dbg_tgt_mgt, vha, 0xf01c,</div><div class='add'>+				    "IMM SRR %p deleted (id %d)\n",</div><div class='add'>+				    imm, imm-&gt;srr_id);</div><div class='add'>+				list_del(&amp;imm-&gt;srr_list_entry);</div><div class='add'>+				qlt_reject_free_srr_imm(vha, imm, 1);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		spin_unlock(&amp;tgt-&gt;srr_lock);</div><div class='add'>+</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. Might drop it, then reaquire</div><div class='add'>+ */</div><div class='add'>+static int qlt_term_ctio_exchange(struct scsi_qla_host *vha, void *ctio,</div><div class='add'>+	struct qla_tgt_cmd *cmd, uint32_t status)</div><div class='add'>+{</div><div class='add'>+	int term = 0;</div><div class='add'>+</div><div class='add'>+	if (ctio != NULL) {</div><div class='add'>+		struct ctio7_from_24xx *c = (struct ctio7_from_24xx *)ctio;</div><div class='add'>+		term = !(c-&gt;flags &amp;</div><div class='add'>+		    __constant_cpu_to_le16(OF_TERM_EXCH));</div><div class='add'>+	} else</div><div class='add'>+		term = 1;</div><div class='add'>+</div><div class='add'>+	if (term)</div><div class='add'>+		qlt_send_term_exchange(vha, cmd, &amp;cmd-&gt;atio, 1);</div><div class='add'>+</div><div class='add'>+	return term;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static inline struct qla_tgt_cmd *qlt_get_cmd(struct scsi_qla_host *vha,</div><div class='add'>+	uint32_t handle)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+</div><div class='add'>+	handle--;</div><div class='add'>+	if (ha-&gt;tgt.cmds[handle] != NULL) {</div><div class='add'>+		struct qla_tgt_cmd *cmd = ha-&gt;tgt.cmds[handle];</div><div class='add'>+		ha-&gt;tgt.cmds[handle] = NULL;</div><div class='add'>+		return cmd;</div><div class='add'>+	} else</div><div class='add'>+		return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static struct qla_tgt_cmd *qlt_ctio_to_cmd(struct scsi_qla_host *vha,</div><div class='add'>+	uint32_t handle, void *ctio)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_cmd *cmd = NULL;</div><div class='add'>+</div><div class='add'>+	/* Clear out internal marks */</div><div class='add'>+	handle &amp;= ~(CTIO_COMPLETION_HANDLE_MARK |</div><div class='add'>+	    CTIO_INTERMEDIATE_HANDLE_MARK);</div><div class='add'>+</div><div class='add'>+	if (handle != QLA_TGT_NULL_HANDLE) {</div><div class='add'>+		if (unlikely(handle == QLA_TGT_SKIP_HANDLE)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe01d, "%s",</div><div class='add'>+			    "SKIP_HANDLE CTIO\n");</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+		/* handle-1 is actually used */</div><div class='add'>+		if (unlikely(handle &gt; MAX_OUTSTANDING_COMMANDS)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe052,</div><div class='add'>+			    "qla_target(%d): Wrong handle %x received\n",</div><div class='add'>+			    vha-&gt;vp_idx, handle);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+		cmd = qlt_get_cmd(vha, handle);</div><div class='add'>+		if (unlikely(cmd == NULL)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe053,</div><div class='add'>+			    "qla_target(%d): Suspicious: unable to "</div><div class='add'>+			    "find the command with handle %x\n", vha-&gt;vp_idx,</div><div class='add'>+			    handle);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+	} else if (ctio != NULL) {</div><div class='add'>+		/* We can't get loop ID from CTIO7 */</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe054,</div><div class='add'>+		    "qla_target(%d): Wrong CTIO received: QLA24xx doesn't "</div><div class='add'>+		    "support NULL handles\n", vha-&gt;vp_idx);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return cmd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. Might drop it, then reaquire</div><div class='add'>+ */</div><div class='add'>+static void qlt_do_ctio_completion(struct scsi_qla_host *vha, uint32_t handle,</div><div class='add'>+	uint32_t status, void *ctio)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct se_cmd *se_cmd;</div><div class='add'>+	struct target_core_fabric_ops *tfo;</div><div class='add'>+	struct qla_tgt_cmd *cmd;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe01e,</div><div class='add'>+	    "qla_target(%d): handle(ctio %p status %#x) &lt;- %08x\n",</div><div class='add'>+	    vha-&gt;vp_idx, ctio, status, handle);</div><div class='add'>+</div><div class='add'>+	if (handle &amp; CTIO_INTERMEDIATE_HANDLE_MARK) {</div><div class='add'>+		/* That could happen only in case of an error/reset/abort */</div><div class='add'>+		if (status != CTIO_SUCCESS) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf01d,</div><div class='add'>+			    "Intermediate CTIO received"</div><div class='add'>+			    " (status %x)\n", status);</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd = qlt_ctio_to_cmd(vha, handle, ctio);</div><div class='add'>+	if (cmd == NULL) {</div><div class='add'>+		if (status != CTIO_SUCCESS)</div><div class='add'>+			qlt_term_ctio_exchange(vha, ctio, NULL, status);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	se_cmd = &amp;cmd-&gt;se_cmd;</div><div class='add'>+	tfo = se_cmd-&gt;se_tfo;</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;sg_mapped)</div><div class='add'>+		qlt_unmap_sg(vha, cmd);</div><div class='add'>+</div><div class='add'>+	if (unlikely(status != CTIO_SUCCESS)) {</div><div class='add'>+		switch (status &amp; 0xFFFF) {</div><div class='add'>+		case CTIO_LIP_RESET:</div><div class='add'>+		case CTIO_TARGET_RESET:</div><div class='add'>+		case CTIO_ABORTED:</div><div class='add'>+		case CTIO_TIMEOUT:</div><div class='add'>+		case CTIO_INVALID_RX_ID:</div><div class='add'>+			/* They are OK */</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf058,</div><div class='add'>+			    "qla_target(%d): CTIO with "</div><div class='add'>+			    "status %#x received, state %x, se_cmd %p, "</div><div class='add'>+			    "(LIP_RESET=e, ABORTED=2, TARGET_RESET=17, "</div><div class='add'>+			    "TIMEOUT=b, INVALID_RX_ID=8)\n", vha-&gt;vp_idx,</div><div class='add'>+			    status, cmd-&gt;state, se_cmd);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case CTIO_PORT_LOGGED_OUT:</div><div class='add'>+		case CTIO_PORT_UNAVAILABLE:</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf059,</div><div class='add'>+			    "qla_target(%d): CTIO with PORT LOGGED "</div><div class='add'>+			    "OUT (29) or PORT UNAVAILABLE (28) status %x "</div><div class='add'>+			    "received (state %x, se_cmd %p)\n", vha-&gt;vp_idx,</div><div class='add'>+			    status, cmd-&gt;state, se_cmd);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case CTIO_SRR_RECEIVED:</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf05a,</div><div class='add'>+			    "qla_target(%d): CTIO with SRR_RECEIVED"</div><div class='add'>+			    " status %x received (state %x, se_cmd %p)\n",</div><div class='add'>+			    vha-&gt;vp_idx, status, cmd-&gt;state, se_cmd);</div><div class='add'>+			if (qlt_prepare_srr_ctio(vha, cmd, ctio) != 0)</div><div class='add'>+				break;</div><div class='add'>+			else</div><div class='add'>+				return;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf05b,</div><div class='add'>+			    "qla_target(%d): CTIO with error status "</div><div class='add'>+			    "0x%x received (state %x, se_cmd %p\n",</div><div class='add'>+			    vha-&gt;vp_idx, status, cmd-&gt;state, se_cmd);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (cmd-&gt;state != QLA_TGT_STATE_NEED_DATA)</div><div class='add'>+			if (qlt_term_ctio_exchange(vha, ctio, cmd, status))</div><div class='add'>+				return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;state == QLA_TGT_STATE_PROCESSED) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe01f, "Command %p finished\n", cmd);</div><div class='add'>+	} else if (cmd-&gt;state == QLA_TGT_STATE_NEED_DATA) {</div><div class='add'>+		int rx_status = 0;</div><div class='add'>+</div><div class='add'>+		cmd-&gt;state = QLA_TGT_STATE_DATA_IN;</div><div class='add'>+</div><div class='add'>+		if (unlikely(status != CTIO_SUCCESS))</div><div class='add'>+			rx_status = -EIO;</div><div class='add'>+		else</div><div class='add'>+			cmd-&gt;write_data_transferred = 1;</div><div class='add'>+</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe020,</div><div class='add'>+		    "Data received, context %x, rx_status %d\n",</div><div class='add'>+		    0x0, rx_status);</div><div class='add'>+</div><div class='add'>+		ha-&gt;tgt.tgt_ops-&gt;handle_data(cmd);</div><div class='add'>+		return;</div><div class='add'>+	} else if (cmd-&gt;state == QLA_TGT_STATE_ABORTED) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf01e,</div><div class='add'>+		    "Aborted command %p (tag %d) finished\n", cmd, cmd-&gt;tag);</div><div class='add'>+	} else {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf05c,</div><div class='add'>+		    "qla_target(%d): A command in state (%d) should "</div><div class='add'>+		    "not return a CTIO complete\n", vha-&gt;vp_idx, cmd-&gt;state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(status != CTIO_SUCCESS)) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf01f, "Finishing failed CTIO\n");</div><div class='add'>+		dump_stack();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ha-&gt;tgt.tgt_ops-&gt;free_cmd(cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+/* called via callback from qla2xxx */</div><div class='add'>+void qlt_ctio_completion(struct scsi_qla_host *vha, uint32_t handle)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+</div><div class='add'>+	if (likely(tgt == NULL)) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe021,</div><div class='add'>+		    "CTIO, but target mode not enabled"</div><div class='add'>+		    " (ha %d %p handle %#x)", vha-&gt;vp_idx, ha, handle);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tgt-&gt;irq_cmd_count++;</div><div class='add'>+	qlt_do_ctio_completion(vha, handle, CTIO_SUCCESS, NULL);</div><div class='add'>+	tgt-&gt;irq_cmd_count--;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int qlt_get_fcp_task_attr(struct scsi_qla_host *vha,</div><div class='add'>+	uint8_t task_codes)</div><div class='add'>+{</div><div class='add'>+	int fcp_task_attr;</div><div class='add'>+</div><div class='add'>+	switch (task_codes) {</div><div class='add'>+	case ATIO_SIMPLE_QUEUE:</div><div class='add'>+		fcp_task_attr = MSG_SIMPLE_TAG;</div><div class='add'>+		break;</div><div class='add'>+	case ATIO_HEAD_OF_QUEUE:</div><div class='add'>+		fcp_task_attr = MSG_HEAD_TAG;</div><div class='add'>+		break;</div><div class='add'>+	case ATIO_ORDERED_QUEUE:</div><div class='add'>+		fcp_task_attr = MSG_ORDERED_TAG;</div><div class='add'>+		break;</div><div class='add'>+	case ATIO_ACA_QUEUE:</div><div class='add'>+		fcp_task_attr = MSG_ACA_TAG;</div><div class='add'>+		break;</div><div class='add'>+	case ATIO_UNTAGGED:</div><div class='add'>+		fcp_task_attr = MSG_SIMPLE_TAG;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf05d,</div><div class='add'>+		    "qla_target: unknown task code %x, use ORDERED instead\n",</div><div class='add'>+		    task_codes);</div><div class='add'>+		fcp_task_attr = MSG_ORDERED_TAG;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return fcp_task_attr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct qla_tgt_sess *qlt_make_local_sess(struct scsi_qla_host *,</div><div class='add'>+					uint8_t *);</div><div class='add'>+/*</div><div class='add'>+ * Process context for I/O path into tcm_qla2xxx code</div><div class='add'>+ */</div><div class='add'>+static void qlt_do_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_cmd *cmd = container_of(work, struct qla_tgt_cmd, work);</div><div class='add'>+	scsi_qla_host_t *vha = cmd-&gt;vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+	struct qla_tgt_sess *sess = NULL;</div><div class='add'>+	struct atio_from_isp *atio = &amp;cmd-&gt;atio;</div><div class='add'>+	unsigned char *cdb;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	uint32_t data_length;</div><div class='add'>+	int ret, fcp_task_attr, data_dir, bidi = 0;</div><div class='add'>+</div><div class='add'>+	if (tgt-&gt;tgt_stop)</div><div class='add'>+		goto out_term;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	sess = ha-&gt;tgt.tgt_ops-&gt;find_sess_by_s_id(vha,</div><div class='add'>+	    atio-&gt;u.isp24.fcp_hdr.s_id);</div><div class='add'>+	if (sess) {</div><div class='add'>+		if (unlikely(sess-&gt;tearing_down)) {</div><div class='add'>+			sess = NULL;</div><div class='add'>+			spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+			goto out_term;</div><div class='add'>+		} else {</div><div class='add'>+			/*</div><div class='add'>+			 * Do the extra kref_get() before dropping</div><div class='add'>+			 * qla_hw_data-&gt;hardware_lock.</div><div class='add'>+			 */</div><div class='add'>+			kref_get(&amp;sess-&gt;se_sess-&gt;sess_kref);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!sess)) {</div><div class='add'>+		uint8_t *s_id =	atio-&gt;u.isp24.fcp_hdr.s_id;</div><div class='add'>+</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf022,</div><div class='add'>+			"qla_target(%d): Unable to find wwn login"</div><div class='add'>+			" (s_id %x:%x:%x), trying to create it manually\n",</div><div class='add'>+			vha-&gt;vp_idx, s_id[0], s_id[1], s_id[2]);</div><div class='add'>+</div><div class='add'>+		if (atio-&gt;u.raw.entry_count &gt; 1) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf023,</div><div class='add'>+				"Dropping multy entry cmd %p\n", cmd);</div><div class='add'>+			goto out_term;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+		sess = qlt_make_local_sess(vha, s_id);</div><div class='add'>+		/* sess has an extra creation ref. */</div><div class='add'>+		mutex_unlock(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+</div><div class='add'>+		if (!sess)</div><div class='add'>+			goto out_term;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd-&gt;sess = sess;</div><div class='add'>+	cmd-&gt;loop_id = sess-&gt;loop_id;</div><div class='add'>+	cmd-&gt;conf_compl_supported = sess-&gt;conf_compl_supported;</div><div class='add'>+</div><div class='add'>+	cdb = &amp;atio-&gt;u.isp24.fcp_cmnd.cdb[0];</div><div class='add'>+	cmd-&gt;tag = atio-&gt;u.isp24.exchange_addr;</div><div class='add'>+	cmd-&gt;unpacked_lun = scsilun_to_int(</div><div class='add'>+	    (struct scsi_lun *)&amp;atio-&gt;u.isp24.fcp_cmnd.lun);</div><div class='add'>+</div><div class='add'>+	if (atio-&gt;u.isp24.fcp_cmnd.rddata &amp;&amp;</div><div class='add'>+	    atio-&gt;u.isp24.fcp_cmnd.wrdata) {</div><div class='add'>+		bidi = 1;</div><div class='add'>+		data_dir = DMA_TO_DEVICE;</div><div class='add'>+	} else if (atio-&gt;u.isp24.fcp_cmnd.rddata)</div><div class='add'>+		data_dir = DMA_FROM_DEVICE;</div><div class='add'>+	else if (atio-&gt;u.isp24.fcp_cmnd.wrdata)</div><div class='add'>+		data_dir = DMA_TO_DEVICE;</div><div class='add'>+	else</div><div class='add'>+		data_dir = DMA_NONE;</div><div class='add'>+</div><div class='add'>+	fcp_task_attr = qlt_get_fcp_task_attr(vha,</div><div class='add'>+	    atio-&gt;u.isp24.fcp_cmnd.task_attr);</div><div class='add'>+	data_length = be32_to_cpu(get_unaligned((uint32_t *)</div><div class='add'>+	    &amp;atio-&gt;u.isp24.fcp_cmnd.add_cdb[</div><div class='add'>+	    atio-&gt;u.isp24.fcp_cmnd.add_cdb_len]));</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe022,</div><div class='add'>+	    "qla_target: START qla command: %p lun: 0x%04x (tag %d)\n",</div><div class='add'>+	    cmd, cmd-&gt;unpacked_lun, cmd-&gt;tag);</div><div class='add'>+</div><div class='add'>+	ret = vha-&gt;hw-&gt;tgt.tgt_ops-&gt;handle_cmd(vha, cmd, cdb, data_length,</div><div class='add'>+	    fcp_task_attr, data_dir, bidi);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		goto out_term;</div><div class='add'>+	/*</div><div class='add'>+	 * Drop extra session reference from qla_tgt_handle_cmd_for_atio*(</div><div class='add'>+	 */</div><div class='add'>+	ha-&gt;tgt.tgt_ops-&gt;put_sess(sess);</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+out_term:</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf020, "Terminating work cmd %p", cmd);</div><div class='add'>+	/*</div><div class='add'>+	 * cmd has not sent to target yet, so pass NULL as the second argument</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	qlt_send_term_exchange(vha, NULL, &amp;cmd-&gt;atio, 1);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	if (sess)</div><div class='add'>+		ha-&gt;tgt.tgt_ops-&gt;put_sess(sess);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static int qlt_handle_cmd_for_atio(struct scsi_qla_host *vha,</div><div class='add'>+	struct atio_from_isp *atio)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+	struct qla_tgt_cmd *cmd;</div><div class='add'>+</div><div class='add'>+	if (unlikely(tgt-&gt;tgt_stop)) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf021,</div><div class='add'>+		    "New command while device %p is shutting down\n", tgt);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd = kmem_cache_zalloc(qla_tgt_cmd_cachep, GFP_ATOMIC);</div><div class='add'>+	if (!cmd) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf05e,</div><div class='add'>+		    "qla_target(%d): Allocation of cmd failed\n", vha-&gt;vp_idx);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;cmd-&gt;cmd_list);</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;cmd-&gt;atio, atio, sizeof(*atio));</div><div class='add'>+	cmd-&gt;state = QLA_TGT_STATE_NEW;</div><div class='add'>+	cmd-&gt;tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+	cmd-&gt;vha = vha;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;cmd-&gt;work, qlt_do_work);</div><div class='add'>+	queue_work(qla_tgt_wq, &amp;cmd-&gt;work);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static int qlt_issue_task_mgmt(struct qla_tgt_sess *sess, uint32_t lun,</div><div class='add'>+	int fn, void *iocb, int flags)</div><div class='add'>+{</div><div class='add'>+	struct scsi_qla_host *vha = sess-&gt;vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt_mgmt_cmd *mcmd;</div><div class='add'>+	int res;</div><div class='add'>+	uint8_t tmr_func;</div><div class='add'>+</div><div class='add'>+	mcmd = mempool_alloc(qla_tgt_mgmt_cmd_mempool, GFP_ATOMIC);</div><div class='add'>+	if (!mcmd) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_tmr, vha, 0x10009,</div><div class='add'>+		    "qla_target(%d): Allocation of management "</div><div class='add'>+		    "command failed, some commands and their data could "</div><div class='add'>+		    "leak\n", vha-&gt;vp_idx);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	memset(mcmd, 0, sizeof(*mcmd));</div><div class='add'>+	mcmd-&gt;sess = sess;</div><div class='add'>+</div><div class='add'>+	if (iocb) {</div><div class='add'>+		memcpy(&amp;mcmd-&gt;orig_iocb.imm_ntfy, iocb,</div><div class='add'>+		    sizeof(mcmd-&gt;orig_iocb.imm_ntfy));</div><div class='add'>+	}</div><div class='add'>+	mcmd-&gt;tmr_func = fn;</div><div class='add'>+	mcmd-&gt;flags = flags;</div><div class='add'>+</div><div class='add'>+	switch (fn) {</div><div class='add'>+	case QLA_TGT_CLEAR_ACA:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_tmr, vha, 0x10000,</div><div class='add'>+		    "qla_target(%d): CLEAR_ACA received\n", sess-&gt;vha-&gt;vp_idx);</div><div class='add'>+		tmr_func = TMR_CLEAR_ACA;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case QLA_TGT_TARGET_RESET:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_tmr, vha, 0x10001,</div><div class='add'>+		    "qla_target(%d): TARGET_RESET received\n",</div><div class='add'>+		    sess-&gt;vha-&gt;vp_idx);</div><div class='add'>+		tmr_func = TMR_TARGET_WARM_RESET;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case QLA_TGT_LUN_RESET:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_tmr, vha, 0x10002,</div><div class='add'>+		    "qla_target(%d): LUN_RESET received\n", sess-&gt;vha-&gt;vp_idx);</div><div class='add'>+		tmr_func = TMR_LUN_RESET;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case QLA_TGT_CLEAR_TS:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_tmr, vha, 0x10003,</div><div class='add'>+		    "qla_target(%d): CLEAR_TS received\n", sess-&gt;vha-&gt;vp_idx);</div><div class='add'>+		tmr_func = TMR_CLEAR_TASK_SET;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case QLA_TGT_ABORT_TS:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_tmr, vha, 0x10004,</div><div class='add'>+		    "qla_target(%d): ABORT_TS received\n", sess-&gt;vha-&gt;vp_idx);</div><div class='add'>+		tmr_func = TMR_ABORT_TASK_SET;</div><div class='add'>+		break;</div><div class='add'>+#if 0</div><div class='add'>+	case QLA_TGT_ABORT_ALL:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_tmr, vha, 0x10005,</div><div class='add'>+		    "qla_target(%d): Doing ABORT_ALL_TASKS\n",</div><div class='add'>+		    sess-&gt;vha-&gt;vp_idx);</div><div class='add'>+		tmr_func = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case QLA_TGT_ABORT_ALL_SESS:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_tmr, vha, 0x10006,</div><div class='add'>+		    "qla_target(%d): Doing ABORT_ALL_TASKS_SESS\n",</div><div class='add'>+		    sess-&gt;vha-&gt;vp_idx);</div><div class='add'>+		tmr_func = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case QLA_TGT_NEXUS_LOSS_SESS:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_tmr, vha, 0x10007,</div><div class='add'>+		    "qla_target(%d): Doing NEXUS_LOSS_SESS\n",</div><div class='add'>+		    sess-&gt;vha-&gt;vp_idx);</div><div class='add'>+		tmr_func = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case QLA_TGT_NEXUS_LOSS:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_tmr, vha, 0x10008,</div><div class='add'>+		    "qla_target(%d): Doing NEXUS_LOSS\n", sess-&gt;vha-&gt;vp_idx);</div><div class='add'>+		tmr_func = 0;</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='add'>+	default:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_tmr, vha, 0x1000a,</div><div class='add'>+		    "qla_target(%d): Unknown task mgmt fn 0x%x\n",</div><div class='add'>+		    sess-&gt;vha-&gt;vp_idx, fn);</div><div class='add'>+		mempool_free(mcmd, qla_tgt_mgmt_cmd_mempool);</div><div class='add'>+		return -ENOSYS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = ha-&gt;tgt.tgt_ops-&gt;handle_tmr(mcmd, lun, tmr_func, 0);</div><div class='add'>+	if (res != 0) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_tmr, vha, 0x1000b,</div><div class='add'>+		    "qla_target(%d): tgt.tgt_ops-&gt;handle_tmr() failed: %d\n",</div><div class='add'>+		    sess-&gt;vha-&gt;vp_idx, res);</div><div class='add'>+		mempool_free(mcmd, qla_tgt_mgmt_cmd_mempool);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static int qlt_handle_task_mgmt(struct scsi_qla_host *vha, void *iocb)</div><div class='add'>+{</div><div class='add'>+	struct atio_from_isp *a = (struct atio_from_isp *)iocb;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt;</div><div class='add'>+	struct qla_tgt_sess *sess;</div><div class='add'>+	uint32_t lun, unpacked_lun;</div><div class='add'>+	int lun_size, fn;</div><div class='add'>+</div><div class='add'>+	tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+</div><div class='add'>+	lun = a-&gt;u.isp24.fcp_cmnd.lun;</div><div class='add'>+	lun_size = sizeof(a-&gt;u.isp24.fcp_cmnd.lun);</div><div class='add'>+	fn = a-&gt;u.isp24.fcp_cmnd.task_mgmt_flags;</div><div class='add'>+	sess = ha-&gt;tgt.tgt_ops-&gt;find_sess_by_s_id(vha,</div><div class='add'>+	    a-&gt;u.isp24.fcp_hdr.s_id);</div><div class='add'>+	unpacked_lun = scsilun_to_int((struct scsi_lun *)&amp;lun);</div><div class='add'>+</div><div class='add'>+	if (!sess) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf024,</div><div class='add'>+		    "qla_target(%d): task mgmt fn 0x%x for "</div><div class='add'>+		    "non-existant session\n", vha-&gt;vp_idx, fn);</div><div class='add'>+		return qlt_sched_sess_work(tgt, QLA_TGT_SESS_WORK_TM, iocb,</div><div class='add'>+		    sizeof(struct atio_from_isp));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return qlt_issue_task_mgmt(sess, unpacked_lun, fn, iocb, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static int __qlt_abort_task(struct scsi_qla_host *vha,</div><div class='add'>+	struct imm_ntfy_from_isp *iocb, struct qla_tgt_sess *sess)</div><div class='add'>+{</div><div class='add'>+	struct atio_from_isp *a = (struct atio_from_isp *)iocb;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt_mgmt_cmd *mcmd;</div><div class='add'>+	uint32_t lun, unpacked_lun;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	mcmd = mempool_alloc(qla_tgt_mgmt_cmd_mempool, GFP_ATOMIC);</div><div class='add'>+	if (mcmd == NULL) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf05f,</div><div class='add'>+		    "qla_target(%d): %s: Allocation of ABORT cmd failed\n",</div><div class='add'>+		    vha-&gt;vp_idx, __func__);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	memset(mcmd, 0, sizeof(*mcmd));</div><div class='add'>+</div><div class='add'>+	mcmd-&gt;sess = sess;</div><div class='add'>+	memcpy(&amp;mcmd-&gt;orig_iocb.imm_ntfy, iocb,</div><div class='add'>+	    sizeof(mcmd-&gt;orig_iocb.imm_ntfy));</div><div class='add'>+</div><div class='add'>+	lun = a-&gt;u.isp24.fcp_cmnd.lun;</div><div class='add'>+	unpacked_lun = scsilun_to_int((struct scsi_lun *)&amp;lun);</div><div class='add'>+</div><div class='add'>+	rc = ha-&gt;tgt.tgt_ops-&gt;handle_tmr(mcmd, unpacked_lun, TMR_ABORT_TASK,</div><div class='add'>+	    le16_to_cpu(iocb-&gt;u.isp2x.seq_id));</div><div class='add'>+	if (rc != 0) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf060,</div><div class='add'>+		    "qla_target(%d): tgt_ops-&gt;handle_tmr() failed: %d\n",</div><div class='add'>+		    vha-&gt;vp_idx, rc);</div><div class='add'>+		mempool_free(mcmd, qla_tgt_mgmt_cmd_mempool);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static int qlt_abort_task(struct scsi_qla_host *vha,</div><div class='add'>+	struct imm_ntfy_from_isp *iocb)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt_sess *sess;</div><div class='add'>+	int loop_id;</div><div class='add'>+</div><div class='add'>+	loop_id = GET_TARGET_ID(ha, (struct atio_from_isp *)iocb);</div><div class='add'>+</div><div class='add'>+	sess = ha-&gt;tgt.tgt_ops-&gt;find_sess_by_loop_id(vha, loop_id);</div><div class='add'>+	if (sess == NULL) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf025,</div><div class='add'>+		    "qla_target(%d): task abort for unexisting "</div><div class='add'>+		    "session\n", vha-&gt;vp_idx);</div><div class='add'>+		return qlt_sched_sess_work(ha-&gt;tgt.qla_tgt,</div><div class='add'>+		    QLA_TGT_SESS_WORK_ABORT, iocb, sizeof(*iocb));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return __qlt_abort_task(vha, iocb, sess);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. Might drop it, then reaquire</div><div class='add'>+ */</div><div class='add'>+static int qlt_24xx_handle_els(struct scsi_qla_host *vha,</div><div class='add'>+	struct imm_ntfy_from_isp *iocb)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	int res = 0;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf026,</div><div class='add'>+	    "qla_target(%d): Port ID: 0x%02x:%02x:%02x"</div><div class='add'>+	    " ELS opcode: 0x%02x\n", vha-&gt;vp_idx, iocb-&gt;u.isp24.port_id[0],</div><div class='add'>+	    iocb-&gt;u.isp24.port_id[1], iocb-&gt;u.isp24.port_id[2],</div><div class='add'>+	    iocb-&gt;u.isp24.status_subcode);</div><div class='add'>+</div><div class='add'>+	switch (iocb-&gt;u.isp24.status_subcode) {</div><div class='add'>+	case ELS_PLOGI:</div><div class='add'>+	case ELS_FLOGI:</div><div class='add'>+	case ELS_PRLI:</div><div class='add'>+	case ELS_LOGO:</div><div class='add'>+	case ELS_PRLO:</div><div class='add'>+		res = qlt_reset(vha, iocb, QLA_TGT_NEXUS_LOSS_SESS);</div><div class='add'>+		break;</div><div class='add'>+	case ELS_PDISC:</div><div class='add'>+	case ELS_ADISC:</div><div class='add'>+	{</div><div class='add'>+		struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+		if (tgt-&gt;link_reinit_iocb_pending) {</div><div class='add'>+			qlt_send_notify_ack(vha, &amp;tgt-&gt;link_reinit_iocb,</div><div class='add'>+			    0, 0, 0, 0, 0, 0);</div><div class='add'>+			tgt-&gt;link_reinit_iocb_pending = 0;</div><div class='add'>+		}</div><div class='add'>+		res = 1; /* send notify ack */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf061,</div><div class='add'>+		    "qla_target(%d): Unsupported ELS command %x "</div><div class='add'>+		    "received\n", vha-&gt;vp_idx, iocb-&gt;u.isp24.status_subcode);</div><div class='add'>+		res = qlt_reset(vha, iocb, QLA_TGT_NEXUS_LOSS_SESS);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qlt_set_data_offset(struct qla_tgt_cmd *cmd, uint32_t offset)</div><div class='add'>+{</div><div class='add'>+	struct scatterlist *sg, *sgp, *sg_srr, *sg_srr_start = NULL;</div><div class='add'>+	size_t first_offset = 0, rem_offset = offset, tmp = 0;</div><div class='add'>+	int i, sg_srr_cnt, bufflen = 0;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, cmd-&gt;vha, 0xe023,</div><div class='add'>+	    "Entering qla_tgt_set_data_offset: cmd: %p, cmd-&gt;sg: %p, "</div><div class='add'>+	    "cmd-&gt;sg_cnt: %u, direction: %d\n",</div><div class='add'>+	    cmd, cmd-&gt;sg, cmd-&gt;sg_cnt, cmd-&gt;dma_data_direction);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * FIXME: Reject non zero SRR relative offset until we can test</div><div class='add'>+	 * this code properly.</div><div class='add'>+	 */</div><div class='add'>+	pr_debug("Rejecting non zero SRR rel_offs: %u\n", offset);</div><div class='add'>+	return -1;</div><div class='add'>+</div><div class='add'>+	if (!cmd-&gt;sg || !cmd-&gt;sg_cnt) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, cmd-&gt;vha, 0xe055,</div><div class='add'>+		    "Missing cmd-&gt;sg or zero cmd-&gt;sg_cnt in"</div><div class='add'>+		    " qla_tgt_set_data_offset\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Walk the current cmd-&gt;sg list until we locate the new sg_srr_start</div><div class='add'>+	 */</div><div class='add'>+	for_each_sg(cmd-&gt;sg, sg, cmd-&gt;sg_cnt, i) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, cmd-&gt;vha, 0xe024,</div><div class='add'>+		    "sg[%d]: %p page: %p, length: %d, offset: %d\n",</div><div class='add'>+		    i, sg, sg_page(sg), sg-&gt;length, sg-&gt;offset);</div><div class='add'>+</div><div class='add'>+		if ((sg-&gt;length + tmp) &gt; offset) {</div><div class='add'>+			first_offset = rem_offset;</div><div class='add'>+			sg_srr_start = sg;</div><div class='add'>+			ql_dbg(ql_dbg_tgt, cmd-&gt;vha, 0xe025,</div><div class='add'>+			    "Found matching sg[%d], using %p as sg_srr_start, "</div><div class='add'>+			    "and using first_offset: %zu\n", i, sg,</div><div class='add'>+			    first_offset);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		tmp += sg-&gt;length;</div><div class='add'>+		rem_offset -= sg-&gt;length;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!sg_srr_start) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, cmd-&gt;vha, 0xe056,</div><div class='add'>+		    "Unable to locate sg_srr_start for offset: %u\n", offset);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	sg_srr_cnt = (cmd-&gt;sg_cnt - i);</div><div class='add'>+</div><div class='add'>+	sg_srr = kzalloc(sizeof(struct scatterlist) * sg_srr_cnt, GFP_KERNEL);</div><div class='add'>+	if (!sg_srr) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, cmd-&gt;vha, 0xe057,</div><div class='add'>+		    "Unable to allocate sgp\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	sg_init_table(sg_srr, sg_srr_cnt);</div><div class='add'>+	sgp = &amp;sg_srr[0];</div><div class='add'>+	/*</div><div class='add'>+	 * Walk the remaining list for sg_srr_start, mapping to the newly</div><div class='add'>+	 * allocated sg_srr taking first_offset into account.</div><div class='add'>+	 */</div><div class='add'>+	for_each_sg(sg_srr_start, sg, sg_srr_cnt, i) {</div><div class='add'>+		if (first_offset) {</div><div class='add'>+			sg_set_page(sgp, sg_page(sg),</div><div class='add'>+			    (sg-&gt;length - first_offset), first_offset);</div><div class='add'>+			first_offset = 0;</div><div class='add'>+		} else {</div><div class='add'>+			sg_set_page(sgp, sg_page(sg), sg-&gt;length, 0);</div><div class='add'>+		}</div><div class='add'>+		bufflen += sgp-&gt;length;</div><div class='add'>+</div><div class='add'>+		sgp = sg_next(sgp);</div><div class='add'>+		if (!sgp)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd-&gt;sg = sg_srr;</div><div class='add'>+	cmd-&gt;sg_cnt = sg_srr_cnt;</div><div class='add'>+	cmd-&gt;bufflen = bufflen;</div><div class='add'>+	cmd-&gt;offset += offset;</div><div class='add'>+	cmd-&gt;free_sg = 1;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, cmd-&gt;vha, 0xe026, "New cmd-&gt;sg: %p\n", cmd-&gt;sg);</div><div class='add'>+	ql_dbg(ql_dbg_tgt, cmd-&gt;vha, 0xe027, "New cmd-&gt;sg_cnt: %u\n",</div><div class='add'>+	    cmd-&gt;sg_cnt);</div><div class='add'>+	ql_dbg(ql_dbg_tgt, cmd-&gt;vha, 0xe028, "New cmd-&gt;bufflen: %u\n",</div><div class='add'>+	    cmd-&gt;bufflen);</div><div class='add'>+	ql_dbg(ql_dbg_tgt, cmd-&gt;vha, 0xe029, "New cmd-&gt;offset: %u\n",</div><div class='add'>+	    cmd-&gt;offset);</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;sg_cnt &lt; 0)</div><div class='add'>+		BUG();</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;bufflen &lt; 0)</div><div class='add'>+		BUG();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int qlt_srr_adjust_data(struct qla_tgt_cmd *cmd,</div><div class='add'>+	uint32_t srr_rel_offs, int *xmit_type)</div><div class='add'>+{</div><div class='add'>+	int res = 0, rel_offs;</div><div class='add'>+</div><div class='add'>+	rel_offs = srr_rel_offs - cmd-&gt;offset;</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, cmd-&gt;vha, 0xf027, "srr_rel_offs=%d, rel_offs=%d",</div><div class='add'>+	    srr_rel_offs, rel_offs);</div><div class='add'>+</div><div class='add'>+	*xmit_type = QLA_TGT_XMIT_ALL;</div><div class='add'>+</div><div class='add'>+	if (rel_offs &lt; 0) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, cmd-&gt;vha, 0xf062,</div><div class='add'>+		    "qla_target(%d): SRR rel_offs (%d) &lt; 0",</div><div class='add'>+		    cmd-&gt;vha-&gt;vp_idx, rel_offs);</div><div class='add'>+		res = -1;</div><div class='add'>+	} else if (rel_offs == cmd-&gt;bufflen)</div><div class='add'>+		*xmit_type = QLA_TGT_XMIT_STATUS;</div><div class='add'>+	else if (rel_offs &gt; 0)</div><div class='add'>+		res = qlt_set_data_offset(cmd, rel_offs);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* No locks, thread context */</div><div class='add'>+static void qlt_handle_srr(struct scsi_qla_host *vha,</div><div class='add'>+	struct qla_tgt_srr_ctio *sctio, struct qla_tgt_srr_imm *imm)</div><div class='add'>+{</div><div class='add'>+	struct imm_ntfy_from_isp *ntfy =</div><div class='add'>+	    (struct imm_ntfy_from_isp *)&amp;imm-&gt;imm_ntfy;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt_cmd *cmd = sctio-&gt;cmd;</div><div class='add'>+	struct se_cmd *se_cmd = &amp;cmd-&gt;se_cmd;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int xmit_type = 0, resp = 0;</div><div class='add'>+	uint32_t offset;</div><div class='add'>+	uint16_t srr_ui;</div><div class='add'>+</div><div class='add'>+	offset = le32_to_cpu(ntfy-&gt;u.isp24.srr_rel_offs);</div><div class='add'>+	srr_ui = ntfy-&gt;u.isp24.srr_ui;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf028, "SRR cmd %p, srr_ui %x\n",</div><div class='add'>+	    cmd, srr_ui);</div><div class='add'>+</div><div class='add'>+	switch (srr_ui) {</div><div class='add'>+	case SRR_IU_STATUS:</div><div class='add'>+		spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+		qlt_send_notify_ack(vha, ntfy,</div><div class='add'>+		    0, 0, 0, NOTIFY_ACK_SRR_FLAGS_ACCEPT, 0, 0);</div><div class='add'>+		spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+		xmit_type = QLA_TGT_XMIT_STATUS;</div><div class='add'>+		resp = 1;</div><div class='add'>+		break;</div><div class='add'>+	case SRR_IU_DATA_IN:</div><div class='add'>+		if (!cmd-&gt;sg || !cmd-&gt;sg_cnt) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf063,</div><div class='add'>+			    "Unable to process SRR_IU_DATA_IN due to"</div><div class='add'>+			    " missing cmd-&gt;sg, state: %d\n", cmd-&gt;state);</div><div class='add'>+			dump_stack();</div><div class='add'>+			goto out_reject;</div><div class='add'>+		}</div><div class='add'>+		if (se_cmd-&gt;scsi_status != 0) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe02a,</div><div class='add'>+			    "Rejecting SRR_IU_DATA_IN with non GOOD "</div><div class='add'>+			    "scsi_status\n");</div><div class='add'>+			goto out_reject;</div><div class='add'>+		}</div><div class='add'>+		cmd-&gt;bufflen = se_cmd-&gt;data_length;</div><div class='add'>+</div><div class='add'>+		if (qlt_has_data(cmd)) {</div><div class='add'>+			if (qlt_srr_adjust_data(cmd, offset, &amp;xmit_type) != 0)</div><div class='add'>+				goto out_reject;</div><div class='add'>+			spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+			qlt_send_notify_ack(vha, ntfy,</div><div class='add'>+			    0, 0, 0, NOTIFY_ACK_SRR_FLAGS_ACCEPT, 0, 0);</div><div class='add'>+			spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+			resp = 1;</div><div class='add'>+		} else {</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf064,</div><div class='add'>+			    "qla_target(%d): SRR for in data for cmd "</div><div class='add'>+			    "without them (tag %d, SCSI status %d), "</div><div class='add'>+			    "reject", vha-&gt;vp_idx, cmd-&gt;tag,</div><div class='add'>+			    cmd-&gt;se_cmd.scsi_status);</div><div class='add'>+			goto out_reject;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case SRR_IU_DATA_OUT:</div><div class='add'>+		if (!cmd-&gt;sg || !cmd-&gt;sg_cnt) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf065,</div><div class='add'>+			    "Unable to process SRR_IU_DATA_OUT due to"</div><div class='add'>+			    " missing cmd-&gt;sg\n");</div><div class='add'>+			dump_stack();</div><div class='add'>+			goto out_reject;</div><div class='add'>+		}</div><div class='add'>+		if (se_cmd-&gt;scsi_status != 0) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe02b,</div><div class='add'>+			    "Rejecting SRR_IU_DATA_OUT"</div><div class='add'>+			    " with non GOOD scsi_status\n");</div><div class='add'>+			goto out_reject;</div><div class='add'>+		}</div><div class='add'>+		cmd-&gt;bufflen = se_cmd-&gt;data_length;</div><div class='add'>+</div><div class='add'>+		if (qlt_has_data(cmd)) {</div><div class='add'>+			if (qlt_srr_adjust_data(cmd, offset, &amp;xmit_type) != 0)</div><div class='add'>+				goto out_reject;</div><div class='add'>+			spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+			qlt_send_notify_ack(vha, ntfy,</div><div class='add'>+			    0, 0, 0, NOTIFY_ACK_SRR_FLAGS_ACCEPT, 0, 0);</div><div class='add'>+			spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+			if (xmit_type &amp; QLA_TGT_XMIT_DATA)</div><div class='add'>+				qlt_rdy_to_xfer(cmd);</div><div class='add'>+		} else {</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf066,</div><div class='add'>+			    "qla_target(%d): SRR for out data for cmd "</div><div class='add'>+			    "without them (tag %d, SCSI status %d), "</div><div class='add'>+			    "reject", vha-&gt;vp_idx, cmd-&gt;tag,</div><div class='add'>+			    cmd-&gt;se_cmd.scsi_status);</div><div class='add'>+			goto out_reject;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf067,</div><div class='add'>+		    "qla_target(%d): Unknown srr_ui value %x",</div><div class='add'>+		    vha-&gt;vp_idx, srr_ui);</div><div class='add'>+		goto out_reject;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Transmit response in case of status and data-in cases */</div><div class='add'>+	if (resp)</div><div class='add'>+		qlt_xmit_response(cmd, xmit_type, se_cmd-&gt;scsi_status);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+out_reject:</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	qlt_send_notify_ack(vha, ntfy, 0, 0, 0,</div><div class='add'>+	    NOTIFY_ACK_SRR_FLAGS_REJECT,</div><div class='add'>+	    NOTIFY_ACK_SRR_REJECT_REASON_UNABLE_TO_PERFORM,</div><div class='add'>+	    NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_NO_EXPL);</div><div class='add'>+	if (cmd-&gt;state == QLA_TGT_STATE_NEED_DATA) {</div><div class='add'>+		cmd-&gt;state = QLA_TGT_STATE_DATA_IN;</div><div class='add'>+		dump_stack();</div><div class='add'>+	} else</div><div class='add'>+		qlt_send_term_exchange(vha, cmd, &amp;cmd-&gt;atio, 1);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qlt_reject_free_srr_imm(struct scsi_qla_host *vha,</div><div class='add'>+	struct qla_tgt_srr_imm *imm, int ha_locked)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+</div><div class='add'>+	if (!ha_locked)</div><div class='add'>+		spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	qlt_send_notify_ack(vha, (void *)&amp;imm-&gt;imm_ntfy, 0, 0, 0,</div><div class='add'>+	    NOTIFY_ACK_SRR_FLAGS_REJECT,</div><div class='add'>+	    NOTIFY_ACK_SRR_REJECT_REASON_UNABLE_TO_PERFORM,</div><div class='add'>+	    NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_NO_EXPL);</div><div class='add'>+</div><div class='add'>+	if (!ha_locked)</div><div class='add'>+		spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	kfree(imm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qlt_handle_srr_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt *tgt = container_of(work, struct qla_tgt, srr_work);</div><div class='add'>+	struct scsi_qla_host *vha = tgt-&gt;vha;</div><div class='add'>+	struct qla_tgt_srr_ctio *sctio;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf029, "Entering SRR work (tgt %p)\n",</div><div class='add'>+	    tgt);</div><div class='add'>+</div><div class='add'>+restart:</div><div class='add'>+	spin_lock_irqsave(&amp;tgt-&gt;srr_lock, flags);</div><div class='add'>+	list_for_each_entry(sctio, &amp;tgt-&gt;srr_ctio_list, srr_list_entry) {</div><div class='add'>+		struct qla_tgt_srr_imm *imm, *i, *ti;</div><div class='add'>+		struct qla_tgt_cmd *cmd;</div><div class='add'>+		struct se_cmd *se_cmd;</div><div class='add'>+</div><div class='add'>+		imm = NULL;</div><div class='add'>+		list_for_each_entry_safe(i, ti, &amp;tgt-&gt;srr_imm_list,</div><div class='add'>+						srr_list_entry) {</div><div class='add'>+			if (i-&gt;srr_id == sctio-&gt;srr_id) {</div><div class='add'>+				list_del(&amp;i-&gt;srr_list_entry);</div><div class='add'>+				if (imm) {</div><div class='add'>+					ql_dbg(ql_dbg_tgt_mgt, vha, 0xf068,</div><div class='add'>+					  "qla_target(%d): There must be "</div><div class='add'>+					  "only one IMM SRR per CTIO SRR "</div><div class='add'>+					  "(IMM SRR %p, id %d, CTIO %p\n",</div><div class='add'>+					  vha-&gt;vp_idx, i, i-&gt;srr_id, sctio);</div><div class='add'>+					qlt_reject_free_srr_imm(tgt-&gt;vha, i, 0);</div><div class='add'>+				} else</div><div class='add'>+					imm = i;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf02a,</div><div class='add'>+		    "IMM SRR %p, CTIO SRR %p (id %d)\n", imm, sctio,</div><div class='add'>+		    sctio-&gt;srr_id);</div><div class='add'>+</div><div class='add'>+		if (imm == NULL) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf02b,</div><div class='add'>+			    "Not found matching IMM for SRR CTIO (id %d)\n",</div><div class='add'>+			    sctio-&gt;srr_id);</div><div class='add'>+			continue;</div><div class='add'>+		} else</div><div class='add'>+			list_del(&amp;sctio-&gt;srr_list_entry);</div><div class='add'>+</div><div class='add'>+		spin_unlock_irqrestore(&amp;tgt-&gt;srr_lock, flags);</div><div class='add'>+</div><div class='add'>+		cmd = sctio-&gt;cmd;</div><div class='add'>+		/*</div><div class='add'>+		 * Reset qla_tgt_cmd SRR values and SGL pointer+count to follow</div><div class='add'>+		 * tcm_qla2xxx_write_pending() and tcm_qla2xxx_queue_data_in()</div><div class='add'>+		 * logic..</div><div class='add'>+		 */</div><div class='add'>+		cmd-&gt;offset = 0;</div><div class='add'>+		if (cmd-&gt;free_sg) {</div><div class='add'>+			kfree(cmd-&gt;sg);</div><div class='add'>+			cmd-&gt;sg = NULL;</div><div class='add'>+			cmd-&gt;free_sg = 0;</div><div class='add'>+		}</div><div class='add'>+		se_cmd = &amp;cmd-&gt;se_cmd;</div><div class='add'>+</div><div class='add'>+		cmd-&gt;sg_cnt = se_cmd-&gt;t_data_nents;</div><div class='add'>+		cmd-&gt;sg = se_cmd-&gt;t_data_sg;</div><div class='add'>+</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf02c,</div><div class='add'>+		    "SRR cmd %p (se_cmd %p, tag %d, op %x), "</div><div class='add'>+		    "sg_cnt=%d, offset=%d", cmd, &amp;cmd-&gt;se_cmd, cmd-&gt;tag,</div><div class='add'>+		    se_cmd-&gt;t_task_cdb[0], cmd-&gt;sg_cnt, cmd-&gt;offset);</div><div class='add'>+</div><div class='add'>+		qlt_handle_srr(vha, sctio, imm);</div><div class='add'>+</div><div class='add'>+		kfree(imm);</div><div class='add'>+		kfree(sctio);</div><div class='add'>+		goto restart;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;tgt-&gt;srr_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+static void qlt_prepare_srr_imm(struct scsi_qla_host *vha,</div><div class='add'>+	struct imm_ntfy_from_isp *iocb)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_srr_imm *imm;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+	struct qla_tgt_srr_ctio *sctio;</div><div class='add'>+</div><div class='add'>+	tgt-&gt;imm_srr_id++;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf02d, "qla_target(%d): SRR received\n",</div><div class='add'>+	    vha-&gt;vp_idx);</div><div class='add'>+</div><div class='add'>+	imm = kzalloc(sizeof(*imm), GFP_ATOMIC);</div><div class='add'>+	if (imm != NULL) {</div><div class='add'>+		memcpy(&amp;imm-&gt;imm_ntfy, iocb, sizeof(imm-&gt;imm_ntfy));</div><div class='add'>+</div><div class='add'>+		/* IRQ is already OFF */</div><div class='add'>+		spin_lock(&amp;tgt-&gt;srr_lock);</div><div class='add'>+		imm-&gt;srr_id = tgt-&gt;imm_srr_id;</div><div class='add'>+		list_add_tail(&amp;imm-&gt;srr_list_entry,</div><div class='add'>+		    &amp;tgt-&gt;srr_imm_list);</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf02e,</div><div class='add'>+		    "IMM NTFY SRR %p added (id %d, ui %x)\n",</div><div class='add'>+		    imm, imm-&gt;srr_id, iocb-&gt;u.isp24.srr_ui);</div><div class='add'>+		if (tgt-&gt;imm_srr_id == tgt-&gt;ctio_srr_id) {</div><div class='add'>+			int found = 0;</div><div class='add'>+			list_for_each_entry(sctio, &amp;tgt-&gt;srr_ctio_list,</div><div class='add'>+			    srr_list_entry) {</div><div class='add'>+				if (sctio-&gt;srr_id == imm-&gt;srr_id) {</div><div class='add'>+					found = 1;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			if (found) {</div><div class='add'>+				ql_dbg(ql_dbg_tgt_mgt, vha, 0xf02f, "%s",</div><div class='add'>+				    "Scheduling srr work\n");</div><div class='add'>+				schedule_work(&amp;tgt-&gt;srr_work);</div><div class='add'>+			} else {</div><div class='add'>+				ql_dbg(ql_dbg_tgt_mgt, vha, 0xf030,</div><div class='add'>+				    "qla_target(%d): imm_srr_id "</div><div class='add'>+				    "== ctio_srr_id (%d), but there is no "</div><div class='add'>+				    "corresponding SRR CTIO, deleting IMM "</div><div class='add'>+				    "SRR %p\n", vha-&gt;vp_idx, tgt-&gt;ctio_srr_id,</div><div class='add'>+				    imm);</div><div class='add'>+				list_del(&amp;imm-&gt;srr_list_entry);</div><div class='add'>+</div><div class='add'>+				kfree(imm);</div><div class='add'>+</div><div class='add'>+				spin_unlock(&amp;tgt-&gt;srr_lock);</div><div class='add'>+				goto out_reject;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		spin_unlock(&amp;tgt-&gt;srr_lock);</div><div class='add'>+	} else {</div><div class='add'>+		struct qla_tgt_srr_ctio *ts;</div><div class='add'>+</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf069,</div><div class='add'>+		    "qla_target(%d): Unable to allocate SRR IMM "</div><div class='add'>+		    "entry, SRR request will be rejected\n", vha-&gt;vp_idx);</div><div class='add'>+</div><div class='add'>+		/* IRQ is already OFF */</div><div class='add'>+		spin_lock(&amp;tgt-&gt;srr_lock);</div><div class='add'>+		list_for_each_entry_safe(sctio, ts, &amp;tgt-&gt;srr_ctio_list,</div><div class='add'>+		    srr_list_entry) {</div><div class='add'>+			if (sctio-&gt;srr_id == tgt-&gt;imm_srr_id) {</div><div class='add'>+				ql_dbg(ql_dbg_tgt_mgt, vha, 0xf031,</div><div class='add'>+				    "CTIO SRR %p deleted (id %d)\n",</div><div class='add'>+				    sctio, sctio-&gt;srr_id);</div><div class='add'>+				list_del(&amp;sctio-&gt;srr_list_entry);</div><div class='add'>+				qlt_send_term_exchange(vha, sctio-&gt;cmd,</div><div class='add'>+				    &amp;sctio-&gt;cmd-&gt;atio, 1);</div><div class='add'>+				kfree(sctio);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		spin_unlock(&amp;tgt-&gt;srr_lock);</div><div class='add'>+		goto out_reject;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+out_reject:</div><div class='add'>+	qlt_send_notify_ack(vha, iocb, 0, 0, 0,</div><div class='add'>+	    NOTIFY_ACK_SRR_FLAGS_REJECT,</div><div class='add'>+	    NOTIFY_ACK_SRR_REJECT_REASON_UNABLE_TO_PERFORM,</div><div class='add'>+	    NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_NO_EXPL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. Might drop it, then reaquire</div><div class='add'>+ */</div><div class='add'>+static void qlt_handle_imm_notify(struct scsi_qla_host *vha,</div><div class='add'>+	struct imm_ntfy_from_isp *iocb)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	uint32_t add_flags = 0;</div><div class='add'>+	int send_notify_ack = 1;</div><div class='add'>+	uint16_t status;</div><div class='add'>+</div><div class='add'>+	status = le16_to_cpu(iocb-&gt;u.isp2x.status);</div><div class='add'>+	switch (status) {</div><div class='add'>+	case IMM_NTFY_LIP_RESET:</div><div class='add'>+	{</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf032,</div><div class='add'>+		    "qla_target(%d): LIP reset (loop %#x), subcode %x\n",</div><div class='add'>+		    vha-&gt;vp_idx, le16_to_cpu(iocb-&gt;u.isp24.nport_handle),</div><div class='add'>+		    iocb-&gt;u.isp24.status_subcode);</div><div class='add'>+</div><div class='add'>+		if (qlt_reset(vha, iocb, QLA_TGT_ABORT_ALL) == 0)</div><div class='add'>+			send_notify_ack = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case IMM_NTFY_LIP_LINK_REINIT:</div><div class='add'>+	{</div><div class='add'>+		struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf033,</div><div class='add'>+		    "qla_target(%d): LINK REINIT (loop %#x, "</div><div class='add'>+		    "subcode %x)\n", vha-&gt;vp_idx,</div><div class='add'>+		    le16_to_cpu(iocb-&gt;u.isp24.nport_handle),</div><div class='add'>+		    iocb-&gt;u.isp24.status_subcode);</div><div class='add'>+		if (tgt-&gt;link_reinit_iocb_pending) {</div><div class='add'>+			qlt_send_notify_ack(vha, &amp;tgt-&gt;link_reinit_iocb,</div><div class='add'>+			    0, 0, 0, 0, 0, 0);</div><div class='add'>+		}</div><div class='add'>+		memcpy(&amp;tgt-&gt;link_reinit_iocb, iocb, sizeof(*iocb));</div><div class='add'>+		tgt-&gt;link_reinit_iocb_pending = 1;</div><div class='add'>+		/*</div><div class='add'>+		 * QLogic requires to wait after LINK REINIT for possible</div><div class='add'>+		 * PDISC or ADISC ELS commands</div><div class='add'>+		 */</div><div class='add'>+		send_notify_ack = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case IMM_NTFY_PORT_LOGOUT:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf034,</div><div class='add'>+		    "qla_target(%d): Port logout (loop "</div><div class='add'>+		    "%#x, subcode %x)\n", vha-&gt;vp_idx,</div><div class='add'>+		    le16_to_cpu(iocb-&gt;u.isp24.nport_handle),</div><div class='add'>+		    iocb-&gt;u.isp24.status_subcode);</div><div class='add'>+</div><div class='add'>+		if (qlt_reset(vha, iocb, QLA_TGT_NEXUS_LOSS_SESS) == 0)</div><div class='add'>+			send_notify_ack = 0;</div><div class='add'>+		/* The sessions will be cleared in the callback, if needed */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case IMM_NTFY_GLBL_TPRLO:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf035,</div><div class='add'>+		    "qla_target(%d): Global TPRLO (%x)\n", vha-&gt;vp_idx, status);</div><div class='add'>+		if (qlt_reset(vha, iocb, QLA_TGT_NEXUS_LOSS) == 0)</div><div class='add'>+			send_notify_ack = 0;</div><div class='add'>+		/* The sessions will be cleared in the callback, if needed */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case IMM_NTFY_PORT_CONFIG:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf036,</div><div class='add'>+		    "qla_target(%d): Port config changed (%x)\n", vha-&gt;vp_idx,</div><div class='add'>+		    status);</div><div class='add'>+		if (qlt_reset(vha, iocb, QLA_TGT_ABORT_ALL) == 0)</div><div class='add'>+			send_notify_ack = 0;</div><div class='add'>+		/* The sessions will be cleared in the callback, if needed */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case IMM_NTFY_GLBL_LOGO:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf06a,</div><div class='add'>+		    "qla_target(%d): Link failure detected\n",</div><div class='add'>+		    vha-&gt;vp_idx);</div><div class='add'>+		/* I_T nexus loss */</div><div class='add'>+		if (qlt_reset(vha, iocb, QLA_TGT_NEXUS_LOSS) == 0)</div><div class='add'>+			send_notify_ack = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case IMM_NTFY_IOCB_OVERFLOW:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf06b,</div><div class='add'>+		    "qla_target(%d): Cannot provide requested "</div><div class='add'>+		    "capability (IOCB overflowed the immediate notify "</div><div class='add'>+		    "resource count)\n", vha-&gt;vp_idx);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case IMM_NTFY_ABORT_TASK:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf037,</div><div class='add'>+		    "qla_target(%d): Abort Task (S %08x I %#x -&gt; "</div><div class='add'>+		    "L %#x)\n", vha-&gt;vp_idx,</div><div class='add'>+		    le16_to_cpu(iocb-&gt;u.isp2x.seq_id),</div><div class='add'>+		    GET_TARGET_ID(ha, (struct atio_from_isp *)iocb),</div><div class='add'>+		    le16_to_cpu(iocb-&gt;u.isp2x.lun));</div><div class='add'>+		if (qlt_abort_task(vha, iocb) == 0)</div><div class='add'>+			send_notify_ack = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case IMM_NTFY_RESOURCE:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf06c,</div><div class='add'>+		    "qla_target(%d): Out of resources, host %ld\n",</div><div class='add'>+		    vha-&gt;vp_idx, vha-&gt;host_no);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case IMM_NTFY_MSG_RX:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf038,</div><div class='add'>+		    "qla_target(%d): Immediate notify task %x\n",</div><div class='add'>+		    vha-&gt;vp_idx, iocb-&gt;u.isp2x.task_flags);</div><div class='add'>+		if (qlt_handle_task_mgmt(vha, iocb) == 0)</div><div class='add'>+			send_notify_ack = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case IMM_NTFY_ELS:</div><div class='add'>+		if (qlt_24xx_handle_els(vha, iocb) == 0)</div><div class='add'>+			send_notify_ack = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case IMM_NTFY_SRR:</div><div class='add'>+		qlt_prepare_srr_imm(vha, iocb);</div><div class='add'>+		send_notify_ack = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf06d,</div><div class='add'>+		    "qla_target(%d): Received unknown immediate "</div><div class='add'>+		    "notify status %x\n", vha-&gt;vp_idx, status);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (send_notify_ack)</div><div class='add'>+		qlt_send_notify_ack(vha, iocb, add_flags, 0, 0, 0, 0, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. Might drop it, then reaquire</div><div class='add'>+ * This function sends busy to ISP 2xxx or 24xx.</div><div class='add'>+ */</div><div class='add'>+static void qlt_send_busy(struct scsi_qla_host *vha,</div><div class='add'>+	struct atio_from_isp *atio, uint16_t status)</div><div class='add'>+{</div><div class='add'>+	struct ctio7_to_24xx *ctio24;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	request_t *pkt;</div><div class='add'>+	struct qla_tgt_sess *sess = NULL;</div><div class='add'>+</div><div class='add'>+	sess = ha-&gt;tgt.tgt_ops-&gt;find_sess_by_s_id(vha,</div><div class='add'>+	    atio-&gt;u.isp24.fcp_hdr.s_id);</div><div class='add'>+	if (!sess) {</div><div class='add'>+		qlt_send_term_exchange(vha, NULL, atio, 1);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	/* Sending marker isn't necessary, since we called from ISR */</div><div class='add'>+</div><div class='add'>+	pkt = (request_t *)qla2x00_alloc_iocbs(vha, NULL);</div><div class='add'>+	if (!pkt) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf06e,</div><div class='add'>+		    "qla_target(%d): %s failed: unable to allocate "</div><div class='add'>+		    "request packet", vha-&gt;vp_idx, __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pkt-&gt;entry_count = 1;</div><div class='add'>+	pkt-&gt;handle = QLA_TGT_SKIP_HANDLE | CTIO_COMPLETION_HANDLE_MARK;</div><div class='add'>+</div><div class='add'>+	ctio24 = (struct ctio7_to_24xx *)pkt;</div><div class='add'>+	ctio24-&gt;entry_type = CTIO_TYPE7;</div><div class='add'>+	ctio24-&gt;nport_handle = sess-&gt;loop_id;</div><div class='add'>+	ctio24-&gt;timeout = __constant_cpu_to_le16(QLA_TGT_TIMEOUT);</div><div class='add'>+	ctio24-&gt;vp_index = vha-&gt;vp_idx;</div><div class='add'>+	ctio24-&gt;initiator_id[0] = atio-&gt;u.isp24.fcp_hdr.s_id[2];</div><div class='add'>+	ctio24-&gt;initiator_id[1] = atio-&gt;u.isp24.fcp_hdr.s_id[1];</div><div class='add'>+	ctio24-&gt;initiator_id[2] = atio-&gt;u.isp24.fcp_hdr.s_id[0];</div><div class='add'>+	ctio24-&gt;exchange_addr = atio-&gt;u.isp24.exchange_addr;</div><div class='add'>+	ctio24-&gt;u.status1.flags = (atio-&gt;u.isp24.attr &lt;&lt; 9) |</div><div class='add'>+	    __constant_cpu_to_le16(</div><div class='add'>+		CTIO7_FLAGS_STATUS_MODE_1 | CTIO7_FLAGS_SEND_STATUS |</div><div class='add'>+		CTIO7_FLAGS_DONT_RET_CTIO);</div><div class='add'>+	/*</div><div class='add'>+	 * CTIO from fw w/o se_cmd doesn't provide enough info to retry it,</div><div class='add'>+	 * if the explicit conformation is used.</div><div class='add'>+	 */</div><div class='add'>+	ctio24-&gt;u.status1.ox_id = swab16(atio-&gt;u.isp24.fcp_hdr.ox_id);</div><div class='add'>+	ctio24-&gt;u.status1.scsi_status = cpu_to_le16(status);</div><div class='add'>+	ctio24-&gt;u.status1.residual = get_unaligned((uint32_t *)</div><div class='add'>+	    &amp;atio-&gt;u.isp24.fcp_cmnd.add_cdb[</div><div class='add'>+	    atio-&gt;u.isp24.fcp_cmnd.add_cdb_len]);</div><div class='add'>+	if (ctio24-&gt;u.status1.residual != 0)</div><div class='add'>+		ctio24-&gt;u.status1.scsi_status |= SS_RESIDUAL_UNDER;</div><div class='add'>+</div><div class='add'>+	qla2x00_start_iocbs(vha, vha-&gt;req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+/* called via callback from qla2xxx */</div><div class='add'>+static void qlt_24xx_atio_pkt(struct scsi_qla_host *vha,</div><div class='add'>+	struct atio_from_isp *atio)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (unlikely(tgt == NULL)) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf039,</div><div class='add'>+		    "ATIO pkt, but no tgt (ha %p)", ha);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe02c,</div><div class='add'>+	    "qla_target(%d): ATIO pkt %p: type %02x count %02x",</div><div class='add'>+	    vha-&gt;vp_idx, atio, atio-&gt;u.raw.entry_type,</div><div class='add'>+	    atio-&gt;u.raw.entry_count);</div><div class='add'>+	/*</div><div class='add'>+	 * In tgt_stop mode we also should allow all requests to pass.</div><div class='add'>+	 * Otherwise, some commands can stuck.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	tgt-&gt;irq_cmd_count++;</div><div class='add'>+</div><div class='add'>+	switch (atio-&gt;u.raw.entry_type) {</div><div class='add'>+	case ATIO_TYPE7:</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe02d,</div><div class='add'>+		    "ATIO_TYPE7 instance %d, lun %Lx, read/write %d/%d, "</div><div class='add'>+		    "add_cdb_len %d, data_length %04x, s_id %x:%x:%x\n",</div><div class='add'>+		    vha-&gt;vp_idx, atio-&gt;u.isp24.fcp_cmnd.lun,</div><div class='add'>+		    atio-&gt;u.isp24.fcp_cmnd.rddata,</div><div class='add'>+		    atio-&gt;u.isp24.fcp_cmnd.wrdata,</div><div class='add'>+		    atio-&gt;u.isp24.fcp_cmnd.add_cdb_len,</div><div class='add'>+		    be32_to_cpu(get_unaligned((uint32_t *)</div><div class='add'>+			&amp;atio-&gt;u.isp24.fcp_cmnd.add_cdb[</div><div class='add'>+			atio-&gt;u.isp24.fcp_cmnd.add_cdb_len])),</div><div class='add'>+		    atio-&gt;u.isp24.fcp_hdr.s_id[0],</div><div class='add'>+		    atio-&gt;u.isp24.fcp_hdr.s_id[1],</div><div class='add'>+		    atio-&gt;u.isp24.fcp_hdr.s_id[2]);</div><div class='add'>+</div><div class='add'>+		if (unlikely(atio-&gt;u.isp24.exchange_addr ==</div><div class='add'>+		    ATIO_EXCHANGE_ADDRESS_UNKNOWN)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe058,</div><div class='add'>+			    "qla_target(%d): ATIO_TYPE7 "</div><div class='add'>+			    "received with UNKNOWN exchange address, "</div><div class='add'>+			    "sending QUEUE_FULL\n", vha-&gt;vp_idx);</div><div class='add'>+			qlt_send_busy(vha, atio, SAM_STAT_TASK_SET_FULL);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (likely(atio-&gt;u.isp24.fcp_cmnd.task_mgmt_flags == 0))</div><div class='add'>+			rc = qlt_handle_cmd_for_atio(vha, atio);</div><div class='add'>+		else</div><div class='add'>+			rc = qlt_handle_task_mgmt(vha, atio);</div><div class='add'>+		if (unlikely(rc != 0)) {</div><div class='add'>+			if (rc == -ESRCH) {</div><div class='add'>+#if 1 /* With TERM EXCHANGE some FC cards refuse to boot */</div><div class='add'>+				qlt_send_busy(vha, atio, SAM_STAT_BUSY);</div><div class='add'>+#else</div><div class='add'>+				qlt_send_term_exchange(vha, NULL, atio, 1);</div><div class='add'>+#endif</div><div class='add'>+			} else {</div><div class='add'>+				if (tgt-&gt;tgt_stop) {</div><div class='add'>+					ql_dbg(ql_dbg_tgt, vha, 0xe059,</div><div class='add'>+					    "qla_target: Unable to send "</div><div class='add'>+					    "command to target for req, "</div><div class='add'>+					    "ignoring.\n");</div><div class='add'>+				} else {</div><div class='add'>+					ql_dbg(ql_dbg_tgt, vha, 0xe05a,</div><div class='add'>+					    "qla_target(%d): Unable to send "</div><div class='add'>+					    "command to target, sending BUSY "</div><div class='add'>+					    "status.\n", vha-&gt;vp_idx);</div><div class='add'>+					qlt_send_busy(vha, atio, SAM_STAT_BUSY);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case IMMED_NOTIFY_TYPE:</div><div class='add'>+	{</div><div class='add'>+		if (unlikely(atio-&gt;u.isp2x.entry_status != 0)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe05b,</div><div class='add'>+			    "qla_target(%d): Received ATIO packet %x "</div><div class='add'>+			    "with error status %x\n", vha-&gt;vp_idx,</div><div class='add'>+			    atio-&gt;u.raw.entry_type,</div><div class='add'>+			    atio-&gt;u.isp2x.entry_status);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe02e, "%s", "IMMED_NOTIFY ATIO");</div><div class='add'>+		qlt_handle_imm_notify(vha, (struct imm_ntfy_from_isp *)atio);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe05c,</div><div class='add'>+		    "qla_target(%d): Received unknown ATIO atio "</div><div class='add'>+		    "type %x\n", vha-&gt;vp_idx, atio-&gt;u.raw.entry_type);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tgt-&gt;irq_cmd_count--;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ha-&gt;hardware_lock supposed to be held on entry */</div><div class='add'>+/* called via callback from qla2xxx */</div><div class='add'>+static void qlt_response_pkt(struct scsi_qla_host *vha, response_t *pkt)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+</div><div class='add'>+	if (unlikely(tgt == NULL)) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe05d,</div><div class='add'>+		    "qla_target(%d): Response pkt %x received, but no "</div><div class='add'>+		    "tgt (ha %p)\n", vha-&gt;vp_idx, pkt-&gt;entry_type, ha);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe02f,</div><div class='add'>+	    "qla_target(%d): response pkt %p: T %02x C %02x S %02x "</div><div class='add'>+	    "handle %#x\n", vha-&gt;vp_idx, pkt, pkt-&gt;entry_type,</div><div class='add'>+	    pkt-&gt;entry_count, pkt-&gt;entry_status, pkt-&gt;handle);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In tgt_stop mode we also should allow all requests to pass.</div><div class='add'>+	 * Otherwise, some commands can stuck.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	tgt-&gt;irq_cmd_count++;</div><div class='add'>+</div><div class='add'>+	switch (pkt-&gt;entry_type) {</div><div class='add'>+	case CTIO_TYPE7:</div><div class='add'>+	{</div><div class='add'>+		struct ctio7_from_24xx *entry = (struct ctio7_from_24xx *)pkt;</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe030, "CTIO_TYPE7: instance %d\n",</div><div class='add'>+		    vha-&gt;vp_idx);</div><div class='add'>+		qlt_do_ctio_completion(vha, entry-&gt;handle,</div><div class='add'>+		    le16_to_cpu(entry-&gt;status)|(pkt-&gt;entry_status &lt;&lt; 16),</div><div class='add'>+		    entry);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case ACCEPT_TGT_IO_TYPE:</div><div class='add'>+	{</div><div class='add'>+		struct atio_from_isp *atio = (struct atio_from_isp *)pkt;</div><div class='add'>+		int rc;</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe031,</div><div class='add'>+		    "ACCEPT_TGT_IO instance %d status %04x "</div><div class='add'>+		    "lun %04x read/write %d data_length %04x "</div><div class='add'>+		    "target_id %02x rx_id %04x\n ", vha-&gt;vp_idx,</div><div class='add'>+		    le16_to_cpu(atio-&gt;u.isp2x.status),</div><div class='add'>+		    le16_to_cpu(atio-&gt;u.isp2x.lun),</div><div class='add'>+		    atio-&gt;u.isp2x.execution_codes,</div><div class='add'>+		    le32_to_cpu(atio-&gt;u.isp2x.data_length), GET_TARGET_ID(ha,</div><div class='add'>+		    atio), atio-&gt;u.isp2x.rx_id);</div><div class='add'>+		if (atio-&gt;u.isp2x.status !=</div><div class='add'>+		    __constant_cpu_to_le16(ATIO_CDB_VALID)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe05e,</div><div class='add'>+			    "qla_target(%d): ATIO with error "</div><div class='add'>+			    "status %x received\n", vha-&gt;vp_idx,</div><div class='add'>+			    le16_to_cpu(atio-&gt;u.isp2x.status));</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe032,</div><div class='add'>+		    "FCP CDB: 0x%02x, sizeof(cdb): %lu",</div><div class='add'>+		    atio-&gt;u.isp2x.cdb[0], (unsigned long</div><div class='add'>+		    int)sizeof(atio-&gt;u.isp2x.cdb));</div><div class='add'>+</div><div class='add'>+		rc = qlt_handle_cmd_for_atio(vha, atio);</div><div class='add'>+		if (unlikely(rc != 0)) {</div><div class='add'>+			if (rc == -ESRCH) {</div><div class='add'>+#if 1 /* With TERM EXCHANGE some FC cards refuse to boot */</div><div class='add'>+				qlt_send_busy(vha, atio, 0);</div><div class='add'>+#else</div><div class='add'>+				qlt_send_term_exchange(vha, NULL, atio, 1);</div><div class='add'>+#endif</div><div class='add'>+			} else {</div><div class='add'>+				if (tgt-&gt;tgt_stop) {</div><div class='add'>+					ql_dbg(ql_dbg_tgt, vha, 0xe05f,</div><div class='add'>+					    "qla_target: Unable to send "</div><div class='add'>+					    "command to target, sending TERM "</div><div class='add'>+					    "EXCHANGE for rsp\n");</div><div class='add'>+					qlt_send_term_exchange(vha, NULL,</div><div class='add'>+					    atio, 1);</div><div class='add'>+				} else {</div><div class='add'>+					ql_dbg(ql_dbg_tgt, vha, 0xe060,</div><div class='add'>+					    "qla_target(%d): Unable to send "</div><div class='add'>+					    "command to target, sending BUSY "</div><div class='add'>+					    "status\n", vha-&gt;vp_idx);</div><div class='add'>+					qlt_send_busy(vha, atio, 0);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	break;</div><div class='add'>+</div><div class='add'>+	case CONTINUE_TGT_IO_TYPE:</div><div class='add'>+	{</div><div class='add'>+		struct ctio_to_2xxx *entry = (struct ctio_to_2xxx *)pkt;</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe033,</div><div class='add'>+		    "CONTINUE_TGT_IO: instance %d\n", vha-&gt;vp_idx);</div><div class='add'>+		qlt_do_ctio_completion(vha, entry-&gt;handle,</div><div class='add'>+		    le16_to_cpu(entry-&gt;status)|(pkt-&gt;entry_status &lt;&lt; 16),</div><div class='add'>+		    entry);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case CTIO_A64_TYPE:</div><div class='add'>+	{</div><div class='add'>+		struct ctio_to_2xxx *entry = (struct ctio_to_2xxx *)pkt;</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe034, "CTIO_A64: instance %d\n",</div><div class='add'>+		    vha-&gt;vp_idx);</div><div class='add'>+		qlt_do_ctio_completion(vha, entry-&gt;handle,</div><div class='add'>+		    le16_to_cpu(entry-&gt;status)|(pkt-&gt;entry_status &lt;&lt; 16),</div><div class='add'>+		    entry);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case IMMED_NOTIFY_TYPE:</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe035, "%s", "IMMED_NOTIFY\n");</div><div class='add'>+		qlt_handle_imm_notify(vha, (struct imm_ntfy_from_isp *)pkt);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case NOTIFY_ACK_TYPE:</div><div class='add'>+		if (tgt-&gt;notify_ack_expected &gt; 0) {</div><div class='add'>+			struct nack_to_isp *entry = (struct nack_to_isp *)pkt;</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe036,</div><div class='add'>+			    "NOTIFY_ACK seq %08x status %x\n",</div><div class='add'>+			    le16_to_cpu(entry-&gt;u.isp2x.seq_id),</div><div class='add'>+			    le16_to_cpu(entry-&gt;u.isp2x.status));</div><div class='add'>+			tgt-&gt;notify_ack_expected--;</div><div class='add'>+			if (entry-&gt;u.isp2x.status !=</div><div class='add'>+			    __constant_cpu_to_le16(NOTIFY_ACK_SUCCESS)) {</div><div class='add'>+				ql_dbg(ql_dbg_tgt, vha, 0xe061,</div><div class='add'>+				    "qla_target(%d): NOTIFY_ACK "</div><div class='add'>+				    "failed %x\n", vha-&gt;vp_idx,</div><div class='add'>+				    le16_to_cpu(entry-&gt;u.isp2x.status));</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe062,</div><div class='add'>+			    "qla_target(%d): Unexpected NOTIFY_ACK received\n",</div><div class='add'>+			    vha-&gt;vp_idx);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ABTS_RECV_24XX:</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe037,</div><div class='add'>+		    "ABTS_RECV_24XX: instance %d\n", vha-&gt;vp_idx);</div><div class='add'>+		qlt_24xx_handle_abts(vha, (struct abts_recv_from_24xx *)pkt);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ABTS_RESP_24XX:</div><div class='add'>+		if (tgt-&gt;abts_resp_expected &gt; 0) {</div><div class='add'>+			struct abts_resp_from_24xx_fw *entry =</div><div class='add'>+				(struct abts_resp_from_24xx_fw *)pkt;</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe038,</div><div class='add'>+			    "ABTS_RESP_24XX: compl_status %x\n",</div><div class='add'>+			    entry-&gt;compl_status);</div><div class='add'>+			tgt-&gt;abts_resp_expected--;</div><div class='add'>+			if (le16_to_cpu(entry-&gt;compl_status) !=</div><div class='add'>+			    ABTS_RESP_COMPL_SUCCESS) {</div><div class='add'>+				if ((entry-&gt;error_subcode1 == 0x1E) &amp;&amp;</div><div class='add'>+				    (entry-&gt;error_subcode2 == 0)) {</div><div class='add'>+					/*</div><div class='add'>+					 * We've got a race here: aborted</div><div class='add'>+					 * exchange not terminated, i.e.</div><div class='add'>+					 * response for the aborted command was</div><div class='add'>+					 * sent between the abort request was</div><div class='add'>+					 * received and processed.</div><div class='add'>+					 * Unfortunately, the firmware has a</div><div class='add'>+					 * silly requirement that all aborted</div><div class='add'>+					 * exchanges must be explicitely</div><div class='add'>+					 * terminated, otherwise it refuses to</div><div class='add'>+					 * send responses for the abort</div><div class='add'>+					 * requests. So, we have to</div><div class='add'>+					 * (re)terminate the exchange and retry</div><div class='add'>+					 * the abort response.</div><div class='add'>+					 */</div><div class='add'>+					qlt_24xx_retry_term_exchange(vha,</div><div class='add'>+					    entry);</div><div class='add'>+				} else</div><div class='add'>+					ql_dbg(ql_dbg_tgt, vha, 0xe063,</div><div class='add'>+					    "qla_target(%d): ABTS_RESP_24XX "</div><div class='add'>+					    "failed %x (subcode %x:%x)",</div><div class='add'>+					    vha-&gt;vp_idx, entry-&gt;compl_status,</div><div class='add'>+					    entry-&gt;error_subcode1,</div><div class='add'>+					    entry-&gt;error_subcode2);</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe064,</div><div class='add'>+			    "qla_target(%d): Unexpected ABTS_RESP_24XX "</div><div class='add'>+			    "received\n", vha-&gt;vp_idx);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe065,</div><div class='add'>+		    "qla_target(%d): Received unknown response pkt "</div><div class='add'>+		    "type %x\n", vha-&gt;vp_idx, pkt-&gt;entry_type);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tgt-&gt;irq_cmd_count--;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ha-&gt;hardware_lock supposed to be held on entry. Might drop it, then reaquire</div><div class='add'>+ */</div><div class='add'>+void qlt_async_event(uint16_t code, struct scsi_qla_host *vha,</div><div class='add'>+	uint16_t *mailbox)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+	int reason_code;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe039,</div><div class='add'>+	    "scsi(%ld): ha state %d init_done %d oper_mode %d topo %d\n",</div><div class='add'>+	    vha-&gt;host_no, atomic_read(&amp;vha-&gt;loop_state), vha-&gt;flags.init_done,</div><div class='add'>+	    ha-&gt;operating_mode, ha-&gt;current_topology);</div><div class='add'>+</div><div class='add'>+	if (!ha-&gt;tgt.tgt_ops)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (unlikely(tgt == NULL)) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe03a,</div><div class='add'>+		    "ASYNC EVENT %#x, but no tgt (ha %p)\n", code, ha);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (((code == MBA_POINT_TO_POINT) || (code == MBA_CHG_IN_CONNECTION)) &amp;&amp;</div><div class='add'>+	    IS_QLA2100(ha))</div><div class='add'>+		return;</div><div class='add'>+	/*</div><div class='add'>+	 * In tgt_stop mode we also should allow all requests to pass.</div><div class='add'>+	 * Otherwise, some commands can stuck.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	tgt-&gt;irq_cmd_count++;</div><div class='add'>+</div><div class='add'>+	switch (code) {</div><div class='add'>+	case MBA_RESET:			/* Reset */</div><div class='add'>+	case MBA_SYSTEM_ERR:		/* System Error */</div><div class='add'>+	case MBA_REQ_TRANSFER_ERR:	/* Request Transfer Error */</div><div class='add'>+	case MBA_RSP_TRANSFER_ERR:	/* Response Transfer Error */</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf03a,</div><div class='add'>+		    "qla_target(%d): System error async event %#x "</div><div class='add'>+		    "occured", vha-&gt;vp_idx, code);</div><div class='add'>+		break;</div><div class='add'>+	case MBA_WAKEUP_THRES:		/* Request Queue Wake-up. */</div><div class='add'>+		set_bit(ISP_ABORT_NEEDED, &amp;vha-&gt;dpc_flags);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case MBA_LOOP_UP:</div><div class='add'>+	{</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf03b,</div><div class='add'>+		    "qla_target(%d): Async LOOP_UP occured "</div><div class='add'>+		    "(m[1]=%x, m[2]=%x, m[3]=%x, m[4]=%x)", vha-&gt;vp_idx,</div><div class='add'>+		    le16_to_cpu(mailbox[1]), le16_to_cpu(mailbox[2]),</div><div class='add'>+		    le16_to_cpu(mailbox[3]), le16_to_cpu(mailbox[4]));</div><div class='add'>+		if (tgt-&gt;link_reinit_iocb_pending) {</div><div class='add'>+			qlt_send_notify_ack(vha, (void *)&amp;tgt-&gt;link_reinit_iocb,</div><div class='add'>+			    0, 0, 0, 0, 0, 0);</div><div class='add'>+			tgt-&gt;link_reinit_iocb_pending = 0;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	case MBA_LIP_OCCURRED:</div><div class='add'>+	case MBA_LOOP_DOWN:</div><div class='add'>+	case MBA_LIP_RESET:</div><div class='add'>+	case MBA_RSCN_UPDATE:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf03c,</div><div class='add'>+		    "qla_target(%d): Async event %#x occured "</div><div class='add'>+		    "(m[1]=%x, m[2]=%x, m[3]=%x, m[4]=%x)", vha-&gt;vp_idx, code,</div><div class='add'>+		    le16_to_cpu(mailbox[1]), le16_to_cpu(mailbox[2]),</div><div class='add'>+		    le16_to_cpu(mailbox[3]), le16_to_cpu(mailbox[4]));</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case MBA_PORT_UPDATE:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf03d,</div><div class='add'>+		    "qla_target(%d): Port update async event %#x "</div><div class='add'>+		    "occured: updating the ports database (m[1]=%x, m[2]=%x, "</div><div class='add'>+		    "m[3]=%x, m[4]=%x)", vha-&gt;vp_idx, code,</div><div class='add'>+		    le16_to_cpu(mailbox[1]), le16_to_cpu(mailbox[2]),</div><div class='add'>+		    le16_to_cpu(mailbox[3]), le16_to_cpu(mailbox[4]));</div><div class='add'>+		reason_code = le16_to_cpu(mailbox[2]);</div><div class='add'>+		if (reason_code == 0x4)</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf03e,</div><div class='add'>+			    "Async MB 2: Got PLOGI Complete\n");</div><div class='add'>+		else if (reason_code == 0x7)</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf03f,</div><div class='add'>+			    "Async MB 2: Port Logged Out\n");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf040,</div><div class='add'>+		    "qla_target(%d): Async event %#x occured: "</div><div class='add'>+		    "ignore (m[1]=%x, m[2]=%x, m[3]=%x, m[4]=%x)", vha-&gt;vp_idx,</div><div class='add'>+		    code, le16_to_cpu(mailbox[1]), le16_to_cpu(mailbox[2]),</div><div class='add'>+		    le16_to_cpu(mailbox[3]), le16_to_cpu(mailbox[4]));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tgt-&gt;irq_cmd_count--;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static fc_port_t *qlt_get_port_database(struct scsi_qla_host *vha,</div><div class='add'>+	uint16_t loop_id)</div><div class='add'>+{</div><div class='add'>+	fc_port_t *fcport;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	fcport = kzalloc(sizeof(*fcport), GFP_KERNEL);</div><div class='add'>+	if (!fcport) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf06f,</div><div class='add'>+		    "qla_target(%d): Allocation of tmp FC port failed",</div><div class='add'>+		    vha-&gt;vp_idx);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf041, "loop_id %d", loop_id);</div><div class='add'>+</div><div class='add'>+	fcport-&gt;loop_id = loop_id;</div><div class='add'>+</div><div class='add'>+	rc = qla2x00_get_port_database(vha, fcport, 0);</div><div class='add'>+	if (rc != QLA_SUCCESS) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf070,</div><div class='add'>+		    "qla_target(%d): Failed to retrieve fcport "</div><div class='add'>+		    "information -- get_port_database() returned %x "</div><div class='add'>+		    "(loop_id=0x%04x)", vha-&gt;vp_idx, rc, loop_id);</div><div class='add'>+		kfree(fcport);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return fcport;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Must be called under tgt_mutex */</div><div class='add'>+static struct qla_tgt_sess *qlt_make_local_sess(struct scsi_qla_host *vha,</div><div class='add'>+	uint8_t *s_id)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt_sess *sess = NULL;</div><div class='add'>+	fc_port_t *fcport = NULL;</div><div class='add'>+	int rc, global_resets;</div><div class='add'>+	uint16_t loop_id = 0;</div><div class='add'>+</div><div class='add'>+retry:</div><div class='add'>+	global_resets = atomic_read(&amp;ha-&gt;tgt.qla_tgt-&gt;tgt_global_resets_count);</div><div class='add'>+</div><div class='add'>+	rc = qla24xx_get_loop_id(vha, s_id, &amp;loop_id);</div><div class='add'>+	if (rc != 0) {</div><div class='add'>+		if ((s_id[0] == 0xFF) &amp;&amp;</div><div class='add'>+		    (s_id[1] == 0xFC)) {</div><div class='add'>+			/*</div><div class='add'>+			 * This is Domain Controller, so it should be</div><div class='add'>+			 * OK to drop SCSI commands from it.</div><div class='add'>+			 */</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf042,</div><div class='add'>+			    "Unable to find initiator with S_ID %x:%x:%x",</div><div class='add'>+			    s_id[0], s_id[1], s_id[2]);</div><div class='add'>+		} else</div><div class='add'>+			ql_dbg(ql_dbg_tgt_mgt, vha, 0xf071,</div><div class='add'>+			    "qla_target(%d): Unable to find "</div><div class='add'>+			    "initiator with S_ID %x:%x:%x",</div><div class='add'>+			    vha-&gt;vp_idx, s_id[0], s_id[1],</div><div class='add'>+			    s_id[2]);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fcport = qlt_get_port_database(vha, loop_id);</div><div class='add'>+	if (!fcport)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (global_resets !=</div><div class='add'>+	    atomic_read(&amp;ha-&gt;tgt.qla_tgt-&gt;tgt_global_resets_count)) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt_mgt, vha, 0xf043,</div><div class='add'>+		    "qla_target(%d): global reset during session discovery "</div><div class='add'>+		    "(counter was %d, new %d), retrying", vha-&gt;vp_idx,</div><div class='add'>+		    global_resets,</div><div class='add'>+		    atomic_read(&amp;ha-&gt;tgt.qla_tgt-&gt;tgt_global_resets_count));</div><div class='add'>+		goto retry;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sess = qlt_create_sess(vha, fcport, true);</div><div class='add'>+</div><div class='add'>+	kfree(fcport);</div><div class='add'>+	return sess;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qlt_abort_work(struct qla_tgt *tgt,</div><div class='add'>+	struct qla_tgt_sess_work_param *prm)</div><div class='add'>+{</div><div class='add'>+	struct scsi_qla_host *vha = tgt-&gt;vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt_sess *sess = NULL;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	uint32_t be_s_id;</div><div class='add'>+	uint8_t s_id[3];</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (tgt-&gt;tgt_stop)</div><div class='add'>+		goto out_term;</div><div class='add'>+</div><div class='add'>+	s_id[0] = prm-&gt;abts.fcp_hdr_le.s_id[2];</div><div class='add'>+	s_id[1] = prm-&gt;abts.fcp_hdr_le.s_id[1];</div><div class='add'>+	s_id[2] = prm-&gt;abts.fcp_hdr_le.s_id[0];</div><div class='add'>+</div><div class='add'>+	sess = ha-&gt;tgt.tgt_ops-&gt;find_sess_by_s_id(vha,</div><div class='add'>+	    (unsigned char *)&amp;be_s_id);</div><div class='add'>+	if (!sess) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+		sess = qlt_make_local_sess(vha, s_id);</div><div class='add'>+		/* sess has got an extra creation ref */</div><div class='add'>+		mutex_unlock(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+		if (!sess)</div><div class='add'>+			goto out_term;</div><div class='add'>+	} else {</div><div class='add'>+		kref_get(&amp;sess-&gt;se_sess-&gt;sess_kref);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tgt-&gt;tgt_stop)</div><div class='add'>+		goto out_term;</div><div class='add'>+</div><div class='add'>+	rc = __qlt_24xx_handle_abts(vha, &amp;prm-&gt;abts, sess);</div><div class='add'>+	if (rc != 0)</div><div class='add'>+		goto out_term;</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	ha-&gt;tgt.tgt_ops-&gt;put_sess(sess);</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+out_term:</div><div class='add'>+	qlt_24xx_send_abts_resp(vha, &amp;prm-&gt;abts, FCP_TMF_REJECTED, false);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	if (sess)</div><div class='add'>+		ha-&gt;tgt.tgt_ops-&gt;put_sess(sess);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qlt_tmr_work(struct qla_tgt *tgt,</div><div class='add'>+	struct qla_tgt_sess_work_param *prm)</div><div class='add'>+{</div><div class='add'>+	struct atio_from_isp *a = &amp;prm-&gt;tm_iocb2;</div><div class='add'>+	struct scsi_qla_host *vha = tgt-&gt;vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt_sess *sess = NULL;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	uint8_t *s_id = NULL; /* to hide compiler warnings */</div><div class='add'>+	int rc;</div><div class='add'>+	uint32_t lun, unpacked_lun;</div><div class='add'>+	int lun_size, fn;</div><div class='add'>+	void *iocb;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (tgt-&gt;tgt_stop)</div><div class='add'>+		goto out_term;</div><div class='add'>+</div><div class='add'>+	s_id = prm-&gt;tm_iocb2.u.isp24.fcp_hdr.s_id;</div><div class='add'>+	sess = ha-&gt;tgt.tgt_ops-&gt;find_sess_by_s_id(vha, s_id);</div><div class='add'>+	if (!sess) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+		sess = qlt_make_local_sess(vha, s_id);</div><div class='add'>+		/* sess has got an extra creation ref */</div><div class='add'>+		mutex_unlock(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+		if (!sess)</div><div class='add'>+			goto out_term;</div><div class='add'>+	} else {</div><div class='add'>+		kref_get(&amp;sess-&gt;se_sess-&gt;sess_kref);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iocb = a;</div><div class='add'>+	lun = a-&gt;u.isp24.fcp_cmnd.lun;</div><div class='add'>+	lun_size = sizeof(lun);</div><div class='add'>+	fn = a-&gt;u.isp24.fcp_cmnd.task_mgmt_flags;</div><div class='add'>+	unpacked_lun = scsilun_to_int((struct scsi_lun *)&amp;lun);</div><div class='add'>+</div><div class='add'>+	rc = qlt_issue_task_mgmt(sess, unpacked_lun, fn, iocb, 0);</div><div class='add'>+	if (rc != 0)</div><div class='add'>+		goto out_term;</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	ha-&gt;tgt.tgt_ops-&gt;put_sess(sess);</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+out_term:</div><div class='add'>+	qlt_send_term_exchange(vha, NULL, &amp;prm-&gt;tm_iocb2, 1);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	if (sess)</div><div class='add'>+		ha-&gt;tgt.tgt_ops-&gt;put_sess(sess);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qlt_sess_work_fn(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt *tgt = container_of(work, struct qla_tgt, sess_work);</div><div class='add'>+	struct scsi_qla_host *vha = tgt-&gt;vha;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf000, "Sess work (tgt %p)", tgt);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;tgt-&gt;sess_work_lock, flags);</div><div class='add'>+	while (!list_empty(&amp;tgt-&gt;sess_works_list)) {</div><div class='add'>+		struct qla_tgt_sess_work_param *prm = list_entry(</div><div class='add'>+		    tgt-&gt;sess_works_list.next, typeof(*prm),</div><div class='add'>+		    sess_works_list_entry);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * This work can be scheduled on several CPUs at time, so we</div><div class='add'>+		 * must delete the entry to eliminate double processing</div><div class='add'>+		 */</div><div class='add'>+		list_del(&amp;prm-&gt;sess_works_list_entry);</div><div class='add'>+</div><div class='add'>+		spin_unlock_irqrestore(&amp;tgt-&gt;sess_work_lock, flags);</div><div class='add'>+</div><div class='add'>+		switch (prm-&gt;type) {</div><div class='add'>+		case QLA_TGT_SESS_WORK_ABORT:</div><div class='add'>+			qlt_abort_work(tgt, prm);</div><div class='add'>+			break;</div><div class='add'>+		case QLA_TGT_SESS_WORK_TM:</div><div class='add'>+			qlt_tmr_work(tgt, prm);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			BUG_ON(1);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;tgt-&gt;sess_work_lock, flags);</div><div class='add'>+</div><div class='add'>+		kfree(prm);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;tgt-&gt;sess_work_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Must be called under tgt_host_action_mutex */</div><div class='add'>+int qlt_add_target(struct qla_hw_data *ha, struct scsi_qla_host *base_vha)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt *tgt;</div><div class='add'>+</div><div class='add'>+	if (!QLA_TGT_MODE_ENABLED())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, base_vha, 0xe03b,</div><div class='add'>+	    "Registering target for host %ld(%p)", base_vha-&gt;host_no, ha);</div><div class='add'>+</div><div class='add'>+	BUG_ON((ha-&gt;tgt.qla_tgt != NULL) || (ha-&gt;tgt.tgt_ops != NULL));</div><div class='add'>+</div><div class='add'>+	tgt = kzalloc(sizeof(struct qla_tgt), GFP_KERNEL);</div><div class='add'>+	if (!tgt) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, base_vha, 0xe066,</div><div class='add'>+		    "Unable to allocate struct qla_tgt\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(base_vha-&gt;host-&gt;hostt-&gt;supported_mode &amp; MODE_TARGET))</div><div class='add'>+		base_vha-&gt;host-&gt;hostt-&gt;supported_mode |= MODE_TARGET;</div><div class='add'>+</div><div class='add'>+	tgt-&gt;ha = ha;</div><div class='add'>+	tgt-&gt;vha = base_vha;</div><div class='add'>+	init_waitqueue_head(&amp;tgt-&gt;waitQ);</div><div class='add'>+	INIT_LIST_HEAD(&amp;tgt-&gt;sess_list);</div><div class='add'>+	INIT_LIST_HEAD(&amp;tgt-&gt;del_sess_list);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;tgt-&gt;sess_del_work,</div><div class='add'>+		(void (*)(struct work_struct *))qlt_del_sess_work_fn);</div><div class='add'>+	spin_lock_init(&amp;tgt-&gt;sess_work_lock);</div><div class='add'>+	INIT_WORK(&amp;tgt-&gt;sess_work, qlt_sess_work_fn);</div><div class='add'>+	INIT_LIST_HEAD(&amp;tgt-&gt;sess_works_list);</div><div class='add'>+	spin_lock_init(&amp;tgt-&gt;srr_lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;tgt-&gt;srr_ctio_list);</div><div class='add'>+	INIT_LIST_HEAD(&amp;tgt-&gt;srr_imm_list);</div><div class='add'>+	INIT_WORK(&amp;tgt-&gt;srr_work, qlt_handle_srr_work);</div><div class='add'>+	atomic_set(&amp;tgt-&gt;tgt_global_resets_count, 0);</div><div class='add'>+</div><div class='add'>+	ha-&gt;tgt.qla_tgt = tgt;</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, base_vha, 0xe067,</div><div class='add'>+		"qla_target(%d): using 64 Bit PCI addressing",</div><div class='add'>+		base_vha-&gt;vp_idx);</div><div class='add'>+	tgt-&gt;tgt_enable_64bit_addr = 1;</div><div class='add'>+	/* 3 is reserved */</div><div class='add'>+	tgt-&gt;sg_tablesize = QLA_TGT_MAX_SG_24XX(base_vha-&gt;req-&gt;length - 3);</div><div class='add'>+	tgt-&gt;datasegs_per_cmd = QLA_TGT_DATASEGS_PER_CMD_24XX;</div><div class='add'>+	tgt-&gt;datasegs_per_cont = QLA_TGT_DATASEGS_PER_CONT_24XX;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;qla_tgt_mutex);</div><div class='add'>+	list_add_tail(&amp;tgt-&gt;tgt_list_entry, &amp;qla_tgt_glist);</div><div class='add'>+	mutex_unlock(&amp;qla_tgt_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Must be called under tgt_host_action_mutex */</div><div class='add'>+int qlt_remove_target(struct qla_hw_data *ha, struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	if (!ha-&gt;tgt.qla_tgt)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;qla_tgt_mutex);</div><div class='add'>+	list_del(&amp;ha-&gt;tgt.qla_tgt-&gt;tgt_list_entry);</div><div class='add'>+	mutex_unlock(&amp;qla_tgt_mutex);</div><div class='add'>+</div><div class='add'>+	ql_dbg(ql_dbg_tgt, vha, 0xe03c, "Unregistering target for host %ld(%p)",</div><div class='add'>+	    vha-&gt;host_no, ha);</div><div class='add'>+	qlt_release(ha-&gt;tgt.qla_tgt);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qlt_lport_dump(struct scsi_qla_host *vha, u64 wwpn,</div><div class='add'>+	unsigned char *b)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	pr_debug("qla2xxx HW vha-&gt;node_name: ");</div><div class='add'>+	for (i = 0; i &lt; WWN_SIZE; i++)</div><div class='add'>+		pr_debug("%02x ", vha-&gt;node_name[i]);</div><div class='add'>+	pr_debug("\n");</div><div class='add'>+	pr_debug("qla2xxx HW vha-&gt;port_name: ");</div><div class='add'>+	for (i = 0; i &lt; WWN_SIZE; i++)</div><div class='add'>+		pr_debug("%02x ", vha-&gt;port_name[i]);</div><div class='add'>+	pr_debug("\n");</div><div class='add'>+</div><div class='add'>+	pr_debug("qla2xxx passed configfs WWPN: ");</div><div class='add'>+	put_unaligned_be64(wwpn, b);</div><div class='add'>+	for (i = 0; i &lt; WWN_SIZE; i++)</div><div class='add'>+		pr_debug("%02x ", b[i]);</div><div class='add'>+	pr_debug("\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * qla_tgt_lport_register - register lport with external module</div><div class='add'>+ *</div><div class='add'>+ * @qla_tgt_ops: Pointer for tcm_qla2xxx qla_tgt_ops</div><div class='add'>+ * @wwpn: Passwd FC target WWPN</div><div class='add'>+ * @callback:  lport initialization callback for tcm_qla2xxx code</div><div class='add'>+ * @target_lport_ptr: pointer for tcm_qla2xxx specific lport data</div><div class='add'>+ */</div><div class='add'>+int qlt_lport_register(struct qla_tgt_func_tmpl *qla_tgt_ops, u64 wwpn,</div><div class='add'>+	int (*callback)(struct scsi_qla_host *), void *target_lport_ptr)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt *tgt;</div><div class='add'>+	struct scsi_qla_host *vha;</div><div class='add'>+	struct qla_hw_data *ha;</div><div class='add'>+	struct Scsi_Host *host;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int rc;</div><div class='add'>+	u8 b[WWN_SIZE];</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;qla_tgt_mutex);</div><div class='add'>+	list_for_each_entry(tgt, &amp;qla_tgt_glist, tgt_list_entry) {</div><div class='add'>+		vha = tgt-&gt;vha;</div><div class='add'>+		ha = vha-&gt;hw;</div><div class='add'>+</div><div class='add'>+		host = vha-&gt;host;</div><div class='add'>+		if (!host)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (ha-&gt;tgt.tgt_ops != NULL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!(host-&gt;hostt-&gt;supported_mode &amp; MODE_TARGET))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+		if (host-&gt;active_mode &amp; MODE_TARGET) {</div><div class='add'>+			pr_debug("MODE_TARGET already active on qla2xxx(%d)\n",</div><div class='add'>+			    host-&gt;host_no);</div><div class='add'>+			spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+		if (!scsi_host_get(host)) {</div><div class='add'>+			ql_dbg(ql_dbg_tgt, vha, 0xe068,</div><div class='add'>+			    "Unable to scsi_host_get() for"</div><div class='add'>+			    " qla2xxx scsi_host\n");</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		qlt_lport_dump(vha, wwpn, b);</div><div class='add'>+</div><div class='add'>+		if (memcmp(vha-&gt;port_name, b, WWN_SIZE)) {</div><div class='add'>+			scsi_host_put(host);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		/*</div><div class='add'>+		 * Setup passed parameters ahead of invoking callback</div><div class='add'>+		 */</div><div class='add'>+		ha-&gt;tgt.tgt_ops = qla_tgt_ops;</div><div class='add'>+		ha-&gt;tgt.target_lport_ptr = target_lport_ptr;</div><div class='add'>+		rc = (*callback)(vha);</div><div class='add'>+		if (rc != 0) {</div><div class='add'>+			ha-&gt;tgt.tgt_ops = NULL;</div><div class='add'>+			ha-&gt;tgt.target_lport_ptr = NULL;</div><div class='add'>+		}</div><div class='add'>+		mutex_unlock(&amp;qla_tgt_mutex);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;qla_tgt_mutex);</div><div class='add'>+</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(qlt_lport_register);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * qla_tgt_lport_deregister - Degister lport</div><div class='add'>+ *</div><div class='add'>+ * @vha:  Registered scsi_qla_host pointer</div><div class='add'>+ */</div><div class='add'>+void qlt_lport_deregister(struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct Scsi_Host *sh = vha-&gt;host;</div><div class='add'>+	/*</div><div class='add'>+	 * Clear the target_lport_ptr qla_target_template pointer in qla_hw_data</div><div class='add'>+	 */</div><div class='add'>+	ha-&gt;tgt.target_lport_ptr = NULL;</div><div class='add'>+	ha-&gt;tgt.tgt_ops = NULL;</div><div class='add'>+	/*</div><div class='add'>+	 * Release the Scsi_Host reference for the underlying qla2xxx host</div><div class='add'>+	 */</div><div class='add'>+	scsi_host_put(sh);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(qlt_lport_deregister);</div><div class='add'>+</div><div class='add'>+/* Must be called under HW lock */</div><div class='add'>+void qlt_set_mode(struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+</div><div class='add'>+	switch (ql2x_ini_mode) {</div><div class='add'>+	case QLA2XXX_INI_MODE_DISABLED:</div><div class='add'>+	case QLA2XXX_INI_MODE_EXCLUSIVE:</div><div class='add'>+		vha-&gt;host-&gt;active_mode = MODE_TARGET;</div><div class='add'>+		break;</div><div class='add'>+	case QLA2XXX_INI_MODE_ENABLED:</div><div class='add'>+		vha-&gt;host-&gt;active_mode |= MODE_TARGET;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ha-&gt;tgt.ini_mode_force_reverse)</div><div class='add'>+		qla_reverse_ini_mode(vha);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Must be called under HW lock */</div><div class='add'>+void qlt_clear_mode(struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+</div><div class='add'>+	switch (ql2x_ini_mode) {</div><div class='add'>+	case QLA2XXX_INI_MODE_DISABLED:</div><div class='add'>+		vha-&gt;host-&gt;active_mode = MODE_UNKNOWN;</div><div class='add'>+		break;</div><div class='add'>+	case QLA2XXX_INI_MODE_EXCLUSIVE:</div><div class='add'>+		vha-&gt;host-&gt;active_mode = MODE_INITIATOR;</div><div class='add'>+		break;</div><div class='add'>+	case QLA2XXX_INI_MODE_ENABLED:</div><div class='add'>+		vha-&gt;host-&gt;active_mode &amp;= ~MODE_TARGET;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ha-&gt;tgt.ini_mode_force_reverse)</div><div class='add'>+		qla_reverse_ini_mode(vha);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * qla_tgt_enable_vha - NO LOCK HELD</div><div class='add'>+ *</div><div class='add'>+ * host_reset, bring up w/ Target Mode Enabled</div><div class='add'>+ */</div><div class='add'>+void</div><div class='add'>+qlt_enable_vha(struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!tgt) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe069,</div><div class='add'>+		    "Unable to locate qla_tgt pointer from"</div><div class='add'>+		    " struct qla_hw_data\n");</div><div class='add'>+		dump_stack();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	tgt-&gt;tgt_stopped = 0;</div><div class='add'>+	qlt_set_mode(vha);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	set_bit(ISP_ABORT_NEEDED, &amp;vha-&gt;dpc_flags);</div><div class='add'>+	qla2xxx_wake_dpc(vha);</div><div class='add'>+	qla2x00_wait_for_hba_online(vha);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(qlt_enable_vha);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * qla_tgt_disable_vha - NO LOCK HELD</div><div class='add'>+ *</div><div class='add'>+ * Disable Target Mode and reset the adapter</div><div class='add'>+ */</div><div class='add'>+void</div><div class='add'>+qlt_disable_vha(struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct qla_tgt *tgt = ha-&gt;tgt.qla_tgt;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!tgt) {</div><div class='add'>+		ql_dbg(ql_dbg_tgt, vha, 0xe06a,</div><div class='add'>+		    "Unable to locate qla_tgt pointer from"</div><div class='add'>+		    " struct qla_hw_data\n");</div><div class='add'>+		dump_stack();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	qlt_clear_mode(vha);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	set_bit(ISP_ABORT_NEEDED, &amp;vha-&gt;dpc_flags);</div><div class='add'>+	qla2xxx_wake_dpc(vha);</div><div class='add'>+	qla2x00_wait_for_hba_online(vha);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called from qla_init.c:qla24xx_vport_create() contex to setup</div><div class='add'>+ * the target mode specific struct scsi_qla_host and struct qla_hw_data</div><div class='add'>+ * members.</div><div class='add'>+ */</div><div class='add'>+void</div><div class='add'>+qlt_vport_create(struct scsi_qla_host *vha, struct qla_hw_data *ha)</div><div class='add'>+{</div><div class='add'>+	if (!qla_tgt_mode_enabled(vha))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+	mutex_init(&amp;ha-&gt;tgt.tgt_host_action_mutex);</div><div class='add'>+</div><div class='add'>+	qlt_clear_mode(vha);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * NOTE: Currently the value is kept the same for &lt;24xx and</div><div class='add'>+	 * &gt;=24xx ISPs. If it is necessary to change it,</div><div class='add'>+	 * the check should be added for specific ISPs,</div><div class='add'>+	 * assigning the value appropriately.</div><div class='add'>+	 */</div><div class='add'>+	ha-&gt;tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+qlt_rff_id(struct scsi_qla_host *vha, struct ct_sns_req *ct_req)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * FC-4 Feature bit 0 indicates target functionality to the name server.</div><div class='add'>+	 */</div><div class='add'>+	if (qla_tgt_mode_enabled(vha)) {</div><div class='add'>+		if (qla_ini_mode_enabled(vha))</div><div class='add'>+			ct_req-&gt;req.rff_id.fc4_feature = BIT_0 | BIT_1;</div><div class='add'>+		else</div><div class='add'>+			ct_req-&gt;req.rff_id.fc4_feature = BIT_0;</div><div class='add'>+	} else if (qla_ini_mode_enabled(vha)) {</div><div class='add'>+		ct_req-&gt;req.rff_id.fc4_feature = BIT_1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * qlt_init_atio_q_entries() - Initializes ATIO queue entries.</div><div class='add'>+ * @ha: HA context</div><div class='add'>+ *</div><div class='add'>+ * Beginning of ATIO ring has initialization control block already built</div><div class='add'>+ * by nvram config routine.</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 on success.</div><div class='add'>+ */</div><div class='add'>+void</div><div class='add'>+qlt_init_atio_q_entries(struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	uint16_t cnt;</div><div class='add'>+	struct atio_from_isp *pkt = (struct atio_from_isp *)ha-&gt;tgt.atio_ring;</div><div class='add'>+</div><div class='add'>+	if (!qla_tgt_mode_enabled(vha))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (cnt = 0; cnt &lt; ha-&gt;tgt.atio_q_length; cnt++) {</div><div class='add'>+		pkt-&gt;u.raw.signature = ATIO_PROCESSED;</div><div class='add'>+		pkt++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * qlt_24xx_process_atio_queue() - Process ATIO queue entries.</div><div class='add'>+ * @ha: SCSI driver HA context</div><div class='add'>+ */</div><div class='add'>+void</div><div class='add'>+qlt_24xx_process_atio_queue(struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct device_reg_24xx __iomem *reg = &amp;ha-&gt;iobase-&gt;isp24;</div><div class='add'>+	struct atio_from_isp *pkt;</div><div class='add'>+	int cnt, i;</div><div class='add'>+</div><div class='add'>+	if (!vha-&gt;flags.online)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	while (ha-&gt;tgt.atio_ring_ptr-&gt;signature != ATIO_PROCESSED) {</div><div class='add'>+		pkt = (struct atio_from_isp *)ha-&gt;tgt.atio_ring_ptr;</div><div class='add'>+		cnt = pkt-&gt;u.raw.entry_count;</div><div class='add'>+</div><div class='add'>+		qlt_24xx_atio_pkt_all_vps(vha, (struct atio_from_isp *)pkt);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; cnt; i++) {</div><div class='add'>+			ha-&gt;tgt.atio_ring_index++;</div><div class='add'>+			if (ha-&gt;tgt.atio_ring_index == ha-&gt;tgt.atio_q_length) {</div><div class='add'>+				ha-&gt;tgt.atio_ring_index = 0;</div><div class='add'>+				ha-&gt;tgt.atio_ring_ptr = ha-&gt;tgt.atio_ring;</div><div class='add'>+			} else</div><div class='add'>+				ha-&gt;tgt.atio_ring_ptr++;</div><div class='add'>+</div><div class='add'>+			pkt-&gt;u.raw.signature = ATIO_PROCESSED;</div><div class='add'>+			pkt = (struct atio_from_isp *)ha-&gt;tgt.atio_ring_ptr;</div><div class='add'>+		}</div><div class='add'>+		wmb();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Adjust ring index */</div><div class='add'>+	WRT_REG_DWORD(&amp;reg-&gt;atio_q_out, ha-&gt;tgt.atio_ring_index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+qlt_24xx_config_rings(struct scsi_qla_host *vha, device_reg_t __iomem *reg)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+</div><div class='add'>+/* FIXME: atio_q in/out for ha-&gt;mqenable=1..? */</div><div class='add'>+	if (ha-&gt;mqenable) {</div><div class='add'>+#if 0</div><div class='add'>+		WRT_REG_DWORD(&amp;reg-&gt;isp25mq.atio_q_in, 0);</div><div class='add'>+		WRT_REG_DWORD(&amp;reg-&gt;isp25mq.atio_q_out, 0);</div><div class='add'>+		RD_REG_DWORD(&amp;reg-&gt;isp25mq.atio_q_out);</div><div class='add'>+#endif</div><div class='add'>+	} else {</div><div class='add'>+		/* Setup APTIO registers for target mode */</div><div class='add'>+		WRT_REG_DWORD(&amp;reg-&gt;isp24.atio_q_in, 0);</div><div class='add'>+		WRT_REG_DWORD(&amp;reg-&gt;isp24.atio_q_out, 0);</div><div class='add'>+		RD_REG_DWORD(&amp;reg-&gt;isp24.atio_q_out);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+qlt_24xx_config_nvram_stage1(struct scsi_qla_host *vha, struct nvram_24xx *nv)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+</div><div class='add'>+	if (qla_tgt_mode_enabled(vha)) {</div><div class='add'>+		if (!ha-&gt;tgt.saved_set) {</div><div class='add'>+			/* We save only once */</div><div class='add'>+			ha-&gt;tgt.saved_exchange_count = nv-&gt;exchange_count;</div><div class='add'>+			ha-&gt;tgt.saved_firmware_options_1 =</div><div class='add'>+			    nv-&gt;firmware_options_1;</div><div class='add'>+			ha-&gt;tgt.saved_firmware_options_2 =</div><div class='add'>+			    nv-&gt;firmware_options_2;</div><div class='add'>+			ha-&gt;tgt.saved_firmware_options_3 =</div><div class='add'>+			    nv-&gt;firmware_options_3;</div><div class='add'>+			ha-&gt;tgt.saved_set = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		nv-&gt;exchange_count = __constant_cpu_to_le16(0xFFFF);</div><div class='add'>+</div><div class='add'>+		/* Enable target mode */</div><div class='add'>+		nv-&gt;firmware_options_1 |= __constant_cpu_to_le32(BIT_4);</div><div class='add'>+</div><div class='add'>+		/* Disable ini mode, if requested */</div><div class='add'>+		if (!qla_ini_mode_enabled(vha))</div><div class='add'>+			nv-&gt;firmware_options_1 |= __constant_cpu_to_le32(BIT_5);</div><div class='add'>+</div><div class='add'>+		/* Disable Full Login after LIP */</div><div class='add'>+		nv-&gt;firmware_options_1 &amp;= __constant_cpu_to_le32(~BIT_13);</div><div class='add'>+		/* Enable initial LIP */</div><div class='add'>+		nv-&gt;firmware_options_1 &amp;= __constant_cpu_to_le32(~BIT_9);</div><div class='add'>+		/* Enable FC tapes support */</div><div class='add'>+		nv-&gt;firmware_options_2 |= __constant_cpu_to_le32(BIT_12);</div><div class='add'>+		/* Disable Full Login after LIP */</div><div class='add'>+		nv-&gt;host_p &amp;= __constant_cpu_to_le32(~BIT_10);</div><div class='add'>+		/* Enable target PRLI control */</div><div class='add'>+		nv-&gt;firmware_options_2 |= __constant_cpu_to_le32(BIT_14);</div><div class='add'>+	} else {</div><div class='add'>+		if (ha-&gt;tgt.saved_set) {</div><div class='add'>+			nv-&gt;exchange_count = ha-&gt;tgt.saved_exchange_count;</div><div class='add'>+			nv-&gt;firmware_options_1 =</div><div class='add'>+			    ha-&gt;tgt.saved_firmware_options_1;</div><div class='add'>+			nv-&gt;firmware_options_2 =</div><div class='add'>+			    ha-&gt;tgt.saved_firmware_options_2;</div><div class='add'>+			nv-&gt;firmware_options_3 =</div><div class='add'>+			    ha-&gt;tgt.saved_firmware_options_3;</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* out-of-order frames reassembly */</div><div class='add'>+	nv-&gt;firmware_options_3 |= BIT_6|BIT_9;</div><div class='add'>+</div><div class='add'>+	if (ha-&gt;tgt.enable_class_2) {</div><div class='add'>+		if (vha-&gt;flags.init_done)</div><div class='add'>+			fc_host_supported_classes(vha-&gt;host) =</div><div class='add'>+				FC_COS_CLASS2 | FC_COS_CLASS3;</div><div class='add'>+</div><div class='add'>+		nv-&gt;firmware_options_2 |= __constant_cpu_to_le32(BIT_8);</div><div class='add'>+	} else {</div><div class='add'>+		if (vha-&gt;flags.init_done)</div><div class='add'>+			fc_host_supported_classes(vha-&gt;host) = FC_COS_CLASS3;</div><div class='add'>+</div><div class='add'>+		nv-&gt;firmware_options_2 &amp;= ~__constant_cpu_to_le32(BIT_8);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+qlt_24xx_config_nvram_stage2(struct scsi_qla_host *vha,</div><div class='add'>+	struct init_cb_24xx *icb)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+</div><div class='add'>+	if (ha-&gt;tgt.node_name_set) {</div><div class='add'>+		memcpy(icb-&gt;node_name, ha-&gt;tgt.tgt_node_name, WWN_SIZE);</div><div class='add'>+		icb-&gt;firmware_options_1 |= __constant_cpu_to_le32(BIT_14);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+qlt_24xx_process_response_error(struct scsi_qla_host *vha,</div><div class='add'>+	struct sts_entry_24xx *pkt)</div><div class='add'>+{</div><div class='add'>+	switch (pkt-&gt;entry_type) {</div><div class='add'>+	case ABTS_RECV_24XX:</div><div class='add'>+	case ABTS_RESP_24XX:</div><div class='add'>+	case CTIO_TYPE7:</div><div class='add'>+	case NOTIFY_ACK_TYPE:</div><div class='add'>+		return 1;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+qlt_modify_vp_config(struct scsi_qla_host *vha,</div><div class='add'>+	struct vp_config_entry_24xx *vpmod)</div><div class='add'>+{</div><div class='add'>+	if (qla_tgt_mode_enabled(vha))</div><div class='add'>+		vpmod-&gt;options_idx1 &amp;= ~BIT_5;</div><div class='add'>+	/* Disable ini mode, if requested */</div><div class='add'>+	if (!qla_ini_mode_enabled(vha))</div><div class='add'>+		vpmod-&gt;options_idx1 &amp;= ~BIT_4;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+qlt_probe_one_stage1(struct scsi_qla_host *base_vha, struct qla_hw_data *ha)</div><div class='add'>+{</div><div class='add'>+	if (!QLA_TGT_MODE_ENABLED())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;ha-&gt;tgt.tgt_mutex);</div><div class='add'>+	mutex_init(&amp;ha-&gt;tgt.tgt_host_action_mutex);</div><div class='add'>+	qlt_clear_mode(base_vha);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+qlt_mem_alloc(struct qla_hw_data *ha)</div><div class='add'>+{</div><div class='add'>+	if (!QLA_TGT_MODE_ENABLED())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ha-&gt;tgt.tgt_vp_map = kzalloc(sizeof(struct qla_tgt_vp_map) *</div><div class='add'>+	    MAX_MULTI_ID_FABRIC, GFP_KERNEL);</div><div class='add'>+	if (!ha-&gt;tgt.tgt_vp_map)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ha-&gt;tgt.atio_ring = dma_alloc_coherent(&amp;ha-&gt;pdev-&gt;dev,</div><div class='add'>+	    (ha-&gt;tgt.atio_q_length + 1) * sizeof(struct atio_from_isp),</div><div class='add'>+	    &amp;ha-&gt;tgt.atio_dma, GFP_KERNEL);</div><div class='add'>+	if (!ha-&gt;tgt.atio_ring) {</div><div class='add'>+		kfree(ha-&gt;tgt.tgt_vp_map);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+qlt_mem_free(struct qla_hw_data *ha)</div><div class='add'>+{</div><div class='add'>+	if (!QLA_TGT_MODE_ENABLED())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (ha-&gt;tgt.atio_ring) {</div><div class='add'>+		dma_free_coherent(&amp;ha-&gt;pdev-&gt;dev, (ha-&gt;tgt.atio_q_length + 1) *</div><div class='add'>+		    sizeof(struct atio_from_isp), ha-&gt;tgt.atio_ring,</div><div class='add'>+		    ha-&gt;tgt.atio_dma);</div><div class='add'>+	}</div><div class='add'>+	kfree(ha-&gt;tgt.tgt_vp_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* vport_slock to be held by the caller */</div><div class='add'>+void</div><div class='add'>+qlt_update_vp_map(struct scsi_qla_host *vha, int cmd)</div><div class='add'>+{</div><div class='add'>+	if (!QLA_TGT_MODE_ENABLED())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (cmd) {</div><div class='add'>+	case SET_VP_IDX:</div><div class='add'>+		vha-&gt;hw-&gt;tgt.tgt_vp_map[vha-&gt;vp_idx].vha = vha;</div><div class='add'>+		break;</div><div class='add'>+	case SET_AL_PA:</div><div class='add'>+		vha-&gt;hw-&gt;tgt.tgt_vp_map[vha-&gt;d_id.b.al_pa].idx = vha-&gt;vp_idx;</div><div class='add'>+		break;</div><div class='add'>+	case RESET_VP_IDX:</div><div class='add'>+		vha-&gt;hw-&gt;tgt.tgt_vp_map[vha-&gt;vp_idx].vha = NULL;</div><div class='add'>+		break;</div><div class='add'>+	case RESET_AL_PA:</div><div class='add'>+		vha-&gt;hw-&gt;tgt.tgt_vp_map[vha-&gt;d_id.b.al_pa].idx = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init qlt_parse_ini_mode(void)</div><div class='add'>+{</div><div class='add'>+	if (strcasecmp(qlini_mode, QLA2XXX_INI_MODE_STR_EXCLUSIVE) == 0)</div><div class='add'>+		ql2x_ini_mode = QLA2XXX_INI_MODE_EXCLUSIVE;</div><div class='add'>+	else if (strcasecmp(qlini_mode, QLA2XXX_INI_MODE_STR_DISABLED) == 0)</div><div class='add'>+		ql2x_ini_mode = QLA2XXX_INI_MODE_DISABLED;</div><div class='add'>+	else if (strcasecmp(qlini_mode, QLA2XXX_INI_MODE_STR_ENABLED) == 0)</div><div class='add'>+		ql2x_ini_mode = QLA2XXX_INI_MODE_ENABLED;</div><div class='add'>+	else</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init qlt_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!qlt_parse_ini_mode()) {</div><div class='add'>+		ql_log(ql_log_fatal, NULL, 0xe06b,</div><div class='add'>+		    "qlt_parse_ini_mode() failed\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!QLA_TGT_MODE_ENABLED())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	qla_tgt_cmd_cachep = kmem_cache_create("qla_tgt_cmd_cachep",</div><div class='add'>+	    sizeof(struct qla_tgt_cmd), __alignof__(struct qla_tgt_cmd), 0,</div><div class='add'>+	    NULL);</div><div class='add'>+	if (!qla_tgt_cmd_cachep) {</div><div class='add'>+		ql_log(ql_log_fatal, NULL, 0xe06c,</div><div class='add'>+		    "kmem_cache_create for qla_tgt_cmd_cachep failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qla_tgt_mgmt_cmd_cachep = kmem_cache_create("qla_tgt_mgmt_cmd_cachep",</div><div class='add'>+	    sizeof(struct qla_tgt_mgmt_cmd), __alignof__(struct</div><div class='add'>+	    qla_tgt_mgmt_cmd), 0, NULL);</div><div class='add'>+	if (!qla_tgt_mgmt_cmd_cachep) {</div><div class='add'>+		ql_log(ql_log_fatal, NULL, 0xe06d,</div><div class='add'>+		    "kmem_cache_create for qla_tgt_mgmt_cmd_cachep failed\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qla_tgt_mgmt_cmd_mempool = mempool_create(25, mempool_alloc_slab,</div><div class='add'>+	    mempool_free_slab, qla_tgt_mgmt_cmd_cachep);</div><div class='add'>+	if (!qla_tgt_mgmt_cmd_mempool) {</div><div class='add'>+		ql_log(ql_log_fatal, NULL, 0xe06e,</div><div class='add'>+		    "mempool_create for qla_tgt_mgmt_cmd_mempool failed\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_mgmt_cmd_cachep;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qla_tgt_wq = alloc_workqueue("qla_tgt_wq", 0, 0);</div><div class='add'>+	if (!qla_tgt_wq) {</div><div class='add'>+		ql_log(ql_log_fatal, NULL, 0xe06f,</div><div class='add'>+		    "alloc_workqueue for qla_tgt_wq failed\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_cmd_mempool;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Return 1 to signal that initiator-mode is being disabled</div><div class='add'>+	 */</div><div class='add'>+	return (ql2x_ini_mode == QLA2XXX_INI_MODE_DISABLED) ? 1 : 0;</div><div class='add'>+</div><div class='add'>+out_cmd_mempool:</div><div class='add'>+	mempool_destroy(qla_tgt_mgmt_cmd_mempool);</div><div class='add'>+out_mgmt_cmd_cachep:</div><div class='add'>+	kmem_cache_destroy(qla_tgt_mgmt_cmd_cachep);</div><div class='add'>+out:</div><div class='add'>+	kmem_cache_destroy(qla_tgt_cmd_cachep);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qlt_exit(void)</div><div class='add'>+{</div><div class='add'>+	if (!QLA_TGT_MODE_ENABLED())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	destroy_workqueue(qla_tgt_wq);</div><div class='add'>+	mempool_destroy(qla_tgt_mgmt_cmd_mempool);</div><div class='add'>+	kmem_cache_destroy(qla_tgt_mgmt_cmd_cachep);</div><div class='add'>+	kmem_cache_destroy(qla_tgt_cmd_cachep);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_target.h b/drivers/scsi/qla2xxx/qla_target.h<br/>new file mode 100644<br/>index 000000000000..9ec19bc2f0fe<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_target.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_target.h</a></div><div class='hunk'>@@ -0,0 +1,1005 @@</div><div class='add'>+/*</div><div class='add'>+ *  Copyright (C) 2004 - 2010 Vladislav Bolkhovitin &lt;vst@vlnb.net&gt;</div><div class='add'>+ *  Copyright (C) 2004 - 2005 Leonid Stoljar</div><div class='add'>+ *  Copyright (C) 2006 Nathaniel Clark &lt;nate@misrule.us&gt;</div><div class='add'>+ *  Copyright (C) 2007 - 2010 ID7 Ltd.</div><div class='add'>+ *</div><div class='add'>+ *  Forward port and refactoring to modern qla2xxx and target/configfs</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2010-2011 Nicholas A. Bellinger &lt;nab@kernel.org&gt;</div><div class='add'>+ *</div><div class='add'>+ *  Additional file for the target driver support.</div><div class='add'>+ *</div><div class='add'>+ *  This program is free software; you can redistribute it and/or</div><div class='add'>+ *  modify it under the terms of the GNU General Public License</div><div class='add'>+ *  as published by the Free Software Foundation; either version 2</div><div class='add'>+ *  of the License, or (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ *  This program is distributed in the hope that it will be useful,</div><div class='add'>+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='add'>+ *  GNU General Public License for more details.</div><div class='add'>+ */</div><div class='add'>+/*</div><div class='add'>+ * This is the global def file that is useful for including from the</div><div class='add'>+ * target portion.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __QLA_TARGET_H</div><div class='add'>+#define __QLA_TARGET_H</div><div class='add'>+</div><div class='add'>+#include "qla_def.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Must be changed on any change in any initiator visible interfaces or</div><div class='add'>+ * data in the target add-on</div><div class='add'>+ */</div><div class='add'>+#define QLA2XXX_TARGET_MAGIC	269</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Must be changed on any change in any target visible interfaces or</div><div class='add'>+ * data in the initiator</div><div class='add'>+ */</div><div class='add'>+#define QLA2XXX_INITIATOR_MAGIC   57222</div><div class='add'>+</div><div class='add'>+#define QLA2XXX_INI_MODE_STR_EXCLUSIVE	"exclusive"</div><div class='add'>+#define QLA2XXX_INI_MODE_STR_DISABLED	"disabled"</div><div class='add'>+#define QLA2XXX_INI_MODE_STR_ENABLED	"enabled"</div><div class='add'>+</div><div class='add'>+#define QLA2XXX_INI_MODE_EXCLUSIVE	0</div><div class='add'>+#define QLA2XXX_INI_MODE_DISABLED	1</div><div class='add'>+#define QLA2XXX_INI_MODE_ENABLED	2</div><div class='add'>+</div><div class='add'>+#define QLA2XXX_COMMAND_COUNT_INIT	250</div><div class='add'>+#define QLA2XXX_IMMED_NOTIFY_COUNT_INIT 250</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Used to mark which completion handles (for RIO Status's) are for CTIO's</div><div class='add'>+ * vs. regular (non-target) info. This is checked for in</div><div class='add'>+ * qla2x00_process_response_queue() to see if a handle coming back in a</div><div class='add'>+ * multi-complete should come to the tgt driver or be handled there by qla2xxx</div><div class='add'>+ */</div><div class='add'>+#define CTIO_COMPLETION_HANDLE_MARK	BIT_29</div><div class='add'>+#if (CTIO_COMPLETION_HANDLE_MARK &lt;= MAX_OUTSTANDING_COMMANDS)</div><div class='add'>+#error "CTIO_COMPLETION_HANDLE_MARK not larger than MAX_OUTSTANDING_COMMANDS"</div><div class='add'>+#endif</div><div class='add'>+#define HANDLE_IS_CTIO_COMP(h) (h &amp; CTIO_COMPLETION_HANDLE_MARK)</div><div class='add'>+</div><div class='add'>+/* Used to mark CTIO as intermediate */</div><div class='add'>+#define CTIO_INTERMEDIATE_HANDLE_MARK	BIT_30</div><div class='add'>+</div><div class='add'>+#ifndef OF_SS_MODE_0</div><div class='add'>+/*</div><div class='add'>+ * ISP target entries - Flags bit definitions.</div><div class='add'>+ */</div><div class='add'>+#define OF_SS_MODE_0        0</div><div class='add'>+#define OF_SS_MODE_1        1</div><div class='add'>+#define OF_SS_MODE_2        2</div><div class='add'>+#define OF_SS_MODE_3        3</div><div class='add'>+</div><div class='add'>+#define OF_EXPL_CONF        BIT_5       /* Explicit Confirmation Requested */</div><div class='add'>+#define OF_DATA_IN          BIT_6       /* Data in to initiator */</div><div class='add'>+					/*  (data from target to initiator) */</div><div class='add'>+#define OF_DATA_OUT         BIT_7       /* Data out from initiator */</div><div class='add'>+					/*  (data from initiator to target) */</div><div class='add'>+#define OF_NO_DATA          (BIT_7 | BIT_6)</div><div class='add'>+#define OF_INC_RC           BIT_8       /* Increment command resource count */</div><div class='add'>+#define OF_FAST_POST        BIT_9       /* Enable mailbox fast posting. */</div><div class='add'>+#define OF_CONF_REQ         BIT_13      /* Confirmation Requested */</div><div class='add'>+#define OF_TERM_EXCH        BIT_14      /* Terminate exchange */</div><div class='add'>+#define OF_SSTS             BIT_15      /* Send SCSI status */</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef QLA_TGT_DATASEGS_PER_CMD32</div><div class='add'>+#define QLA_TGT_DATASEGS_PER_CMD32	3</div><div class='add'>+#define QLA_TGT_DATASEGS_PER_CONT32	7</div><div class='add'>+#define QLA_TGT_MAX_SG32(ql) \</div><div class='add'>+	(((ql) &gt; 0) ? (QLA_TGT_DATASEGS_PER_CMD32 + \</div><div class='add'>+		QLA_TGT_DATASEGS_PER_CONT32*((ql) - 1)) : 0)</div><div class='add'>+</div><div class='add'>+#define QLA_TGT_DATASEGS_PER_CMD64	2</div><div class='add'>+#define QLA_TGT_DATASEGS_PER_CONT64	5</div><div class='add'>+#define QLA_TGT_MAX_SG64(ql) \</div><div class='add'>+	(((ql) &gt; 0) ? (QLA_TGT_DATASEGS_PER_CMD64 + \</div><div class='add'>+		QLA_TGT_DATASEGS_PER_CONT64*((ql) - 1)) : 0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef QLA_TGT_DATASEGS_PER_CMD_24XX</div><div class='add'>+#define QLA_TGT_DATASEGS_PER_CMD_24XX	1</div><div class='add'>+#define QLA_TGT_DATASEGS_PER_CONT_24XX	5</div><div class='add'>+#define QLA_TGT_MAX_SG_24XX(ql) \</div><div class='add'>+	(min(1270, ((ql) &gt; 0) ? (QLA_TGT_DATASEGS_PER_CMD_24XX + \</div><div class='add'>+		QLA_TGT_DATASEGS_PER_CONT_24XX*((ql) - 1)) : 0))</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define GET_TARGET_ID(ha, iocb) ((HAS_EXTENDED_IDS(ha))			\</div><div class='add'>+			 ? le16_to_cpu((iocb)-&gt;u.isp2x.target.extended)	\</div><div class='add'>+			 : (uint16_t)(iocb)-&gt;u.isp2x.target.id.standard)</div><div class='add'>+</div><div class='add'>+#ifndef IMMED_NOTIFY_TYPE</div><div class='add'>+#define IMMED_NOTIFY_TYPE 0x0D		/* Immediate notify entry. */</div><div class='add'>+/*</div><div class='add'>+ * ISP queue -	immediate notify entry structure definition.</div><div class='add'>+ *		This is sent by the ISP to the Target driver.</div><div class='add'>+ *		This IOCB would have report of events sent by the</div><div class='add'>+ *		initiator, that needs to be handled by the target</div><div class='add'>+ *		driver immediately.</div><div class='add'>+ */</div><div class='add'>+struct imm_ntfy_from_isp {</div><div class='add'>+	uint8_t	 entry_type;		    /* Entry type. */</div><div class='add'>+	uint8_t	 entry_count;		    /* Entry count. */</div><div class='add'>+	uint8_t	 sys_define;		    /* System defined. */</div><div class='add'>+	uint8_t	 entry_status;		    /* Entry Status. */</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			uint32_t sys_define_2; /* System defined. */</div><div class='add'>+			target_id_t target;</div><div class='add'>+			uint16_t lun;</div><div class='add'>+			uint8_t  target_id;</div><div class='add'>+			uint8_t  reserved_1;</div><div class='add'>+			uint16_t status_modifier;</div><div class='add'>+			uint16_t status;</div><div class='add'>+			uint16_t task_flags;</div><div class='add'>+			uint16_t seq_id;</div><div class='add'>+			uint16_t srr_rx_id;</div><div class='add'>+			uint32_t srr_rel_offs;</div><div class='add'>+			uint16_t srr_ui;</div><div class='add'>+#define SRR_IU_DATA_IN	0x1</div><div class='add'>+#define SRR_IU_DATA_OUT	0x5</div><div class='add'>+#define SRR_IU_STATUS	0x7</div><div class='add'>+			uint16_t srr_ox_id;</div><div class='add'>+			uint8_t reserved_2[28];</div><div class='add'>+		} isp2x;</div><div class='add'>+		struct {</div><div class='add'>+			uint32_t reserved;</div><div class='add'>+			uint16_t nport_handle;</div><div class='add'>+			uint16_t reserved_2;</div><div class='add'>+			uint16_t flags;</div><div class='add'>+#define NOTIFY24XX_FLAGS_GLOBAL_TPRLO   BIT_1</div><div class='add'>+#define NOTIFY24XX_FLAGS_PUREX_IOCB     BIT_0</div><div class='add'>+			uint16_t srr_rx_id;</div><div class='add'>+			uint16_t status;</div><div class='add'>+			uint8_t  status_subcode;</div><div class='add'>+			uint8_t  reserved_3;</div><div class='add'>+			uint32_t exchange_address;</div><div class='add'>+			uint32_t srr_rel_offs;</div><div class='add'>+			uint16_t srr_ui;</div><div class='add'>+			uint16_t srr_ox_id;</div><div class='add'>+			uint8_t  reserved_4[19];</div><div class='add'>+			uint8_t  vp_index;</div><div class='add'>+			uint32_t reserved_5;</div><div class='add'>+			uint8_t  port_id[3];</div><div class='add'>+			uint8_t  reserved_6;</div><div class='add'>+		} isp24;</div><div class='add'>+	} u;</div><div class='add'>+	uint16_t reserved_7;</div><div class='add'>+	uint16_t ox_id;</div><div class='add'>+} __packed;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef NOTIFY_ACK_TYPE</div><div class='add'>+#define NOTIFY_ACK_TYPE 0x0E	  /* Notify acknowledge entry. */</div><div class='add'>+/*</div><div class='add'>+ * ISP queue -	notify acknowledge entry structure definition.</div><div class='add'>+ *		This is sent to the ISP from the target driver.</div><div class='add'>+ */</div><div class='add'>+struct nack_to_isp {</div><div class='add'>+	uint8_t	 entry_type;		    /* Entry type. */</div><div class='add'>+	uint8_t	 entry_count;		    /* Entry count. */</div><div class='add'>+	uint8_t	 sys_define;		    /* System defined. */</div><div class='add'>+	uint8_t	 entry_status;		    /* Entry Status. */</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			uint32_t sys_define_2; /* System defined. */</div><div class='add'>+			target_id_t target;</div><div class='add'>+			uint8_t	 target_id;</div><div class='add'>+			uint8_t	 reserved_1;</div><div class='add'>+			uint16_t flags;</div><div class='add'>+			uint16_t resp_code;</div><div class='add'>+			uint16_t status;</div><div class='add'>+			uint16_t task_flags;</div><div class='add'>+			uint16_t seq_id;</div><div class='add'>+			uint16_t srr_rx_id;</div><div class='add'>+			uint32_t srr_rel_offs;</div><div class='add'>+			uint16_t srr_ui;</div><div class='add'>+			uint16_t srr_flags;</div><div class='add'>+			uint16_t srr_reject_code;</div><div class='add'>+			uint8_t  srr_reject_vendor_uniq;</div><div class='add'>+			uint8_t  srr_reject_code_expl;</div><div class='add'>+			uint8_t  reserved_2[24];</div><div class='add'>+		} isp2x;</div><div class='add'>+		struct {</div><div class='add'>+			uint32_t handle;</div><div class='add'>+			uint16_t nport_handle;</div><div class='add'>+			uint16_t reserved_1;</div><div class='add'>+			uint16_t flags;</div><div class='add'>+			uint16_t srr_rx_id;</div><div class='add'>+			uint16_t status;</div><div class='add'>+			uint8_t  status_subcode;</div><div class='add'>+			uint8_t  reserved_3;</div><div class='add'>+			uint32_t exchange_address;</div><div class='add'>+			uint32_t srr_rel_offs;</div><div class='add'>+			uint16_t srr_ui;</div><div class='add'>+			uint16_t srr_flags;</div><div class='add'>+			uint8_t  reserved_4[19];</div><div class='add'>+			uint8_t  vp_index;</div><div class='add'>+			uint8_t  srr_reject_vendor_uniq;</div><div class='add'>+			uint8_t  srr_reject_code_expl;</div><div class='add'>+			uint8_t  srr_reject_code;</div><div class='add'>+			uint8_t  reserved_5[5];</div><div class='add'>+		} isp24;</div><div class='add'>+	} u;</div><div class='add'>+	uint8_t  reserved[2];</div><div class='add'>+	uint16_t ox_id;</div><div class='add'>+} __packed;</div><div class='add'>+#define NOTIFY_ACK_SRR_FLAGS_ACCEPT	0</div><div class='add'>+#define NOTIFY_ACK_SRR_FLAGS_REJECT	1</div><div class='add'>+</div><div class='add'>+#define NOTIFY_ACK_SRR_REJECT_REASON_UNABLE_TO_PERFORM	0x9</div><div class='add'>+</div><div class='add'>+#define NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_NO_EXPL		0</div><div class='add'>+#define NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_UNABLE_TO_SUPPLY_DATA	0x2a</div><div class='add'>+</div><div class='add'>+#define NOTIFY_ACK_SUCCESS      0x01</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef ACCEPT_TGT_IO_TYPE</div><div class='add'>+#define ACCEPT_TGT_IO_TYPE 0x16 /* Accept target I/O entry. */</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef CONTINUE_TGT_IO_TYPE</div><div class='add'>+#define CONTINUE_TGT_IO_TYPE 0x17</div><div class='add'>+/*</div><div class='add'>+ * ISP queue -	Continue Target I/O (CTIO) entry for status mode 0 structure.</div><div class='add'>+ *		This structure is sent to the ISP 2xxx from target driver.</div><div class='add'>+ */</div><div class='add'>+struct ctio_to_2xxx {</div><div class='add'>+	uint8_t	 entry_type;		/* Entry type. */</div><div class='add'>+	uint8_t	 entry_count;		/* Entry count. */</div><div class='add'>+	uint8_t	 sys_define;		/* System defined. */</div><div class='add'>+	uint8_t	 entry_status;		/* Entry Status. */</div><div class='add'>+	uint32_t handle;		/* System defined handle */</div><div class='add'>+	target_id_t target;</div><div class='add'>+	uint16_t rx_id;</div><div class='add'>+	uint16_t flags;</div><div class='add'>+	uint16_t status;</div><div class='add'>+	uint16_t timeout;		/* 0 = 30 seconds, 0xFFFF = disable */</div><div class='add'>+	uint16_t dseg_count;		/* Data segment count. */</div><div class='add'>+	uint32_t relative_offset;</div><div class='add'>+	uint32_t residual;</div><div class='add'>+	uint16_t reserved_1[3];</div><div class='add'>+	uint16_t scsi_status;</div><div class='add'>+	uint32_t transfer_length;</div><div class='add'>+	uint32_t dseg_0_address;	/* Data segment 0 address. */</div><div class='add'>+	uint32_t dseg_0_length;		/* Data segment 0 length. */</div><div class='add'>+	uint32_t dseg_1_address;	/* Data segment 1 address. */</div><div class='add'>+	uint32_t dseg_1_length;		/* Data segment 1 length. */</div><div class='add'>+	uint32_t dseg_2_address;	/* Data segment 2 address. */</div><div class='add'>+	uint32_t dseg_2_length;		/* Data segment 2 length. */</div><div class='add'>+} __packed;</div><div class='add'>+#define ATIO_PATH_INVALID       0x07</div><div class='add'>+#define ATIO_CANT_PROV_CAP      0x16</div><div class='add'>+#define ATIO_CDB_VALID          0x3D</div><div class='add'>+</div><div class='add'>+#define ATIO_EXEC_READ          BIT_1</div><div class='add'>+#define ATIO_EXEC_WRITE         BIT_0</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef CTIO_A64_TYPE</div><div class='add'>+#define CTIO_A64_TYPE 0x1F</div><div class='add'>+#define CTIO_SUCCESS			0x01</div><div class='add'>+#define CTIO_ABORTED			0x02</div><div class='add'>+#define CTIO_INVALID_RX_ID		0x08</div><div class='add'>+#define CTIO_TIMEOUT			0x0B</div><div class='add'>+#define CTIO_LIP_RESET			0x0E</div><div class='add'>+#define CTIO_TARGET_RESET		0x17</div><div class='add'>+#define CTIO_PORT_UNAVAILABLE		0x28</div><div class='add'>+#define CTIO_PORT_LOGGED_OUT		0x29</div><div class='add'>+#define CTIO_PORT_CONF_CHANGED		0x2A</div><div class='add'>+#define CTIO_SRR_RECEIVED		0x45</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef CTIO_RET_TYPE</div><div class='add'>+#define CTIO_RET_TYPE	0x17		/* CTIO return entry */</div><div class='add'>+#define ATIO_TYPE7 0x06 /* Accept target I/O entry for 24xx */</div><div class='add'>+</div><div class='add'>+struct fcp_hdr {</div><div class='add'>+	uint8_t  r_ctl;</div><div class='add'>+	uint8_t  d_id[3];</div><div class='add'>+	uint8_t  cs_ctl;</div><div class='add'>+	uint8_t  s_id[3];</div><div class='add'>+	uint8_t  type;</div><div class='add'>+	uint8_t  f_ctl[3];</div><div class='add'>+	uint8_t  seq_id;</div><div class='add'>+	uint8_t  df_ctl;</div><div class='add'>+	uint16_t seq_cnt;</div><div class='add'>+	uint16_t ox_id;</div><div class='add'>+	uint16_t rx_id;</div><div class='add'>+	uint32_t parameter;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct fcp_hdr_le {</div><div class='add'>+	uint8_t  d_id[3];</div><div class='add'>+	uint8_t  r_ctl;</div><div class='add'>+	uint8_t  s_id[3];</div><div class='add'>+	uint8_t  cs_ctl;</div><div class='add'>+	uint8_t  f_ctl[3];</div><div class='add'>+	uint8_t  type;</div><div class='add'>+	uint16_t seq_cnt;</div><div class='add'>+	uint8_t  df_ctl;</div><div class='add'>+	uint8_t  seq_id;</div><div class='add'>+	uint16_t rx_id;</div><div class='add'>+	uint16_t ox_id;</div><div class='add'>+	uint32_t parameter;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define F_CTL_EXCH_CONTEXT_RESP	BIT_23</div><div class='add'>+#define F_CTL_SEQ_CONTEXT_RESIP	BIT_22</div><div class='add'>+#define F_CTL_LAST_SEQ		BIT_20</div><div class='add'>+#define F_CTL_END_SEQ		BIT_19</div><div class='add'>+#define F_CTL_SEQ_INITIATIVE	BIT_16</div><div class='add'>+</div><div class='add'>+#define R_CTL_BASIC_LINK_SERV	0x80</div><div class='add'>+#define R_CTL_B_ACC		0x4</div><div class='add'>+#define R_CTL_B_RJT		0x5</div><div class='add'>+</div><div class='add'>+struct atio7_fcp_cmnd {</div><div class='add'>+	uint64_t lun;</div><div class='add'>+	uint8_t  cmnd_ref;</div><div class='add'>+	uint8_t  task_attr:3;</div><div class='add'>+	uint8_t  reserved:5;</div><div class='add'>+	uint8_t  task_mgmt_flags;</div><div class='add'>+#define FCP_CMND_TASK_MGMT_CLEAR_ACA		6</div><div class='add'>+#define FCP_CMND_TASK_MGMT_TARGET_RESET		5</div><div class='add'>+#define FCP_CMND_TASK_MGMT_LU_RESET		4</div><div class='add'>+#define FCP_CMND_TASK_MGMT_CLEAR_TASK_SET	2</div><div class='add'>+#define FCP_CMND_TASK_MGMT_ABORT_TASK_SET	1</div><div class='add'>+	uint8_t  wrdata:1;</div><div class='add'>+	uint8_t  rddata:1;</div><div class='add'>+	uint8_t  add_cdb_len:6;</div><div class='add'>+	uint8_t  cdb[16];</div><div class='add'>+	/*</div><div class='add'>+	 * add_cdb is optional and can absent from struct atio7_fcp_cmnd. Size 4</div><div class='add'>+	 * only to make sizeof(struct atio7_fcp_cmnd) be as expected by</div><div class='add'>+	 * BUILD_BUG_ON in qlt_init().</div><div class='add'>+	 */</div><div class='add'>+	uint8_t  add_cdb[4];</div><div class='add'>+	/* uint32_t data_length; */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ISP queue -	Accept Target I/O (ATIO) type entry IOCB structure.</div><div class='add'>+ *		This is sent from the ISP to the target driver.</div><div class='add'>+ */</div><div class='add'>+struct atio_from_isp {</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			uint16_t entry_hdr;</div><div class='add'>+			uint8_t  sys_define;   /* System defined. */</div><div class='add'>+			uint8_t  entry_status; /* Entry Status.   */</div><div class='add'>+			uint32_t sys_define_2; /* System defined. */</div><div class='add'>+			target_id_t target;</div><div class='add'>+			uint16_t rx_id;</div><div class='add'>+			uint16_t flags;</div><div class='add'>+			uint16_t status;</div><div class='add'>+			uint8_t  command_ref;</div><div class='add'>+			uint8_t  task_codes;</div><div class='add'>+			uint8_t  task_flags;</div><div class='add'>+			uint8_t  execution_codes;</div><div class='add'>+			uint8_t  cdb[MAX_CMDSZ];</div><div class='add'>+			uint32_t data_length;</div><div class='add'>+			uint16_t lun;</div><div class='add'>+			uint8_t  initiator_port_name[WWN_SIZE]; /* on qla23xx */</div><div class='add'>+			uint16_t reserved_32[6];</div><div class='add'>+			uint16_t ox_id;</div><div class='add'>+		} isp2x;</div><div class='add'>+		struct {</div><div class='add'>+			uint16_t entry_hdr;</div><div class='add'>+			uint8_t  fcp_cmnd_len_low;</div><div class='add'>+			uint8_t  fcp_cmnd_len_high:4;</div><div class='add'>+			uint8_t  attr:4;</div><div class='add'>+			uint32_t exchange_addr;</div><div class='add'>+#define ATIO_EXCHANGE_ADDRESS_UNKNOWN	0xFFFFFFFF</div><div class='add'>+			struct fcp_hdr fcp_hdr;</div><div class='add'>+			struct atio7_fcp_cmnd fcp_cmnd;</div><div class='add'>+		} isp24;</div><div class='add'>+		struct {</div><div class='add'>+			uint8_t  entry_type;	/* Entry type. */</div><div class='add'>+			uint8_t  entry_count;	/* Entry count. */</div><div class='add'>+			uint8_t  data[58];</div><div class='add'>+			uint32_t signature;</div><div class='add'>+#define ATIO_PROCESSED 0xDEADDEAD		/* Signature */</div><div class='add'>+		} raw;</div><div class='add'>+	} u;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define CTIO_TYPE7 0x12 /* Continue target I/O entry (for 24xx) */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ISP queue -	Continue Target I/O (ATIO) type 7 entry (for 24xx) structure.</div><div class='add'>+ *		This structure is sent to the ISP 24xx from the target driver.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct ctio7_to_24xx {</div><div class='add'>+	uint8_t	 entry_type;		    /* Entry type. */</div><div class='add'>+	uint8_t	 entry_count;		    /* Entry count. */</div><div class='add'>+	uint8_t	 sys_define;		    /* System defined. */</div><div class='add'>+	uint8_t	 entry_status;		    /* Entry Status. */</div><div class='add'>+	uint32_t handle;		    /* System defined handle */</div><div class='add'>+	uint16_t nport_handle;</div><div class='add'>+#define CTIO7_NHANDLE_UNRECOGNIZED	0xFFFF</div><div class='add'>+	uint16_t timeout;</div><div class='add'>+	uint16_t dseg_count;		    /* Data segment count. */</div><div class='add'>+	uint8_t  vp_index;</div><div class='add'>+	uint8_t  add_flags;</div><div class='add'>+	uint8_t  initiator_id[3];</div><div class='add'>+	uint8_t  reserved;</div><div class='add'>+	uint32_t exchange_addr;</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			uint16_t reserved1;</div><div class='add'>+			uint16_t flags;</div><div class='add'>+			uint32_t residual;</div><div class='add'>+			uint16_t ox_id;</div><div class='add'>+			uint16_t scsi_status;</div><div class='add'>+			uint32_t relative_offset;</div><div class='add'>+			uint32_t reserved2;</div><div class='add'>+			uint32_t transfer_length;</div><div class='add'>+			uint32_t reserved3;</div><div class='add'>+			/* Data segment 0 address. */</div><div class='add'>+			uint32_t dseg_0_address[2];</div><div class='add'>+			/* Data segment 0 length. */</div><div class='add'>+			uint32_t dseg_0_length;</div><div class='add'>+		} status0;</div><div class='add'>+		struct {</div><div class='add'>+			uint16_t sense_length;</div><div class='add'>+			uint16_t flags;</div><div class='add'>+			uint32_t residual;</div><div class='add'>+			uint16_t ox_id;</div><div class='add'>+			uint16_t scsi_status;</div><div class='add'>+			uint16_t response_len;</div><div class='add'>+			uint16_t reserved;</div><div class='add'>+			uint8_t sense_data[24];</div><div class='add'>+		} status1;</div><div class='add'>+	} u;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ISP queue - CTIO type 7 from ISP 24xx to target driver</div><div class='add'>+ * returned entry structure.</div><div class='add'>+ */</div><div class='add'>+struct ctio7_from_24xx {</div><div class='add'>+	uint8_t	 entry_type;		    /* Entry type. */</div><div class='add'>+	uint8_t	 entry_count;		    /* Entry count. */</div><div class='add'>+	uint8_t	 sys_define;		    /* System defined. */</div><div class='add'>+	uint8_t	 entry_status;		    /* Entry Status. */</div><div class='add'>+	uint32_t handle;		    /* System defined handle */</div><div class='add'>+	uint16_t status;</div><div class='add'>+	uint16_t timeout;</div><div class='add'>+	uint16_t dseg_count;		    /* Data segment count. */</div><div class='add'>+	uint8_t  vp_index;</div><div class='add'>+	uint8_t  reserved1[5];</div><div class='add'>+	uint32_t exchange_address;</div><div class='add'>+	uint16_t reserved2;</div><div class='add'>+	uint16_t flags;</div><div class='add'>+	uint32_t residual;</div><div class='add'>+	uint16_t ox_id;</div><div class='add'>+	uint16_t reserved3;</div><div class='add'>+	uint32_t relative_offset;</div><div class='add'>+	uint8_t  reserved4[24];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* CTIO7 flags values */</div><div class='add'>+#define CTIO7_FLAGS_SEND_STATUS		BIT_15</div><div class='add'>+#define CTIO7_FLAGS_TERMINATE		BIT_14</div><div class='add'>+#define CTIO7_FLAGS_CONFORM_REQ		BIT_13</div><div class='add'>+#define CTIO7_FLAGS_DONT_RET_CTIO	BIT_8</div><div class='add'>+#define CTIO7_FLAGS_STATUS_MODE_0	0</div><div class='add'>+#define CTIO7_FLAGS_STATUS_MODE_1	BIT_6</div><div class='add'>+#define CTIO7_FLAGS_EXPLICIT_CONFORM	BIT_5</div><div class='add'>+#define CTIO7_FLAGS_CONFIRM_SATISF	BIT_4</div><div class='add'>+#define CTIO7_FLAGS_DSD_PTR		BIT_2</div><div class='add'>+#define CTIO7_FLAGS_DATA_IN		BIT_1</div><div class='add'>+#define CTIO7_FLAGS_DATA_OUT		BIT_0</div><div class='add'>+</div><div class='add'>+#define ELS_PLOGI			0x3</div><div class='add'>+#define ELS_FLOGI			0x4</div><div class='add'>+#define ELS_LOGO			0x5</div><div class='add'>+#define ELS_PRLI			0x20</div><div class='add'>+#define ELS_PRLO			0x21</div><div class='add'>+#define ELS_TPRLO			0x24</div><div class='add'>+#define ELS_PDISC			0x50</div><div class='add'>+#define ELS_ADISC			0x52</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ISP queue - ABTS received/response entries structure definition for 24xx.</div><div class='add'>+ */</div><div class='add'>+#define ABTS_RECV_24XX		0x54 /* ABTS received (for 24xx) */</div><div class='add'>+#define ABTS_RESP_24XX		0x55 /* ABTS responce (for 24xx) */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ISP queue -	ABTS received IOCB entry structure definition for 24xx.</div><div class='add'>+ *		The ABTS BLS received from the wire is sent to the</div><div class='add'>+ *		target driver by the ISP 24xx.</div><div class='add'>+ *		The IOCB is placed on the response queue.</div><div class='add'>+ */</div><div class='add'>+struct abts_recv_from_24xx {</div><div class='add'>+	uint8_t	 entry_type;		    /* Entry type. */</div><div class='add'>+	uint8_t	 entry_count;		    /* Entry count. */</div><div class='add'>+	uint8_t	 sys_define;		    /* System defined. */</div><div class='add'>+	uint8_t	 entry_status;		    /* Entry Status. */</div><div class='add'>+	uint8_t  reserved_1[6];</div><div class='add'>+	uint16_t nport_handle;</div><div class='add'>+	uint8_t  reserved_2[2];</div><div class='add'>+	uint8_t  vp_index;</div><div class='add'>+	uint8_t  reserved_3:4;</div><div class='add'>+	uint8_t  sof_type:4;</div><div class='add'>+	uint32_t exchange_address;</div><div class='add'>+	struct fcp_hdr_le fcp_hdr_le;</div><div class='add'>+	uint8_t  reserved_4[16];</div><div class='add'>+	uint32_t exchange_addr_to_abort;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define ABTS_PARAM_ABORT_SEQ		BIT_0</div><div class='add'>+</div><div class='add'>+struct ba_acc_le {</div><div class='add'>+	uint16_t reserved;</div><div class='add'>+	uint8_t  seq_id_last;</div><div class='add'>+	uint8_t  seq_id_valid;</div><div class='add'>+#define SEQ_ID_VALID	0x80</div><div class='add'>+#define SEQ_ID_INVALID	0x00</div><div class='add'>+	uint16_t rx_id;</div><div class='add'>+	uint16_t ox_id;</div><div class='add'>+	uint16_t high_seq_cnt;</div><div class='add'>+	uint16_t low_seq_cnt;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ba_rjt_le {</div><div class='add'>+	uint8_t vendor_uniq;</div><div class='add'>+	uint8_t reason_expl;</div><div class='add'>+	uint8_t reason_code;</div><div class='add'>+#define BA_RJT_REASON_CODE_INVALID_COMMAND	0x1</div><div class='add'>+#define BA_RJT_REASON_CODE_UNABLE_TO_PERFORM	0x9</div><div class='add'>+	uint8_t reserved;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ISP queue -	ABTS Response IOCB entry structure definition for 24xx.</div><div class='add'>+ *		The ABTS response to the ABTS received is sent by the</div><div class='add'>+ *		target driver to the ISP 24xx.</div><div class='add'>+ *		The IOCB is placed on the request queue.</div><div class='add'>+ */</div><div class='add'>+struct abts_resp_to_24xx {</div><div class='add'>+	uint8_t	 entry_type;		    /* Entry type. */</div><div class='add'>+	uint8_t	 entry_count;		    /* Entry count. */</div><div class='add'>+	uint8_t	 sys_define;		    /* System defined. */</div><div class='add'>+	uint8_t	 entry_status;		    /* Entry Status. */</div><div class='add'>+	uint32_t handle;</div><div class='add'>+	uint16_t reserved_1;</div><div class='add'>+	uint16_t nport_handle;</div><div class='add'>+	uint16_t control_flags;</div><div class='add'>+#define ABTS_CONTR_FLG_TERM_EXCHG	BIT_0</div><div class='add'>+	uint8_t  vp_index;</div><div class='add'>+	uint8_t  reserved_3:4;</div><div class='add'>+	uint8_t  sof_type:4;</div><div class='add'>+	uint32_t exchange_address;</div><div class='add'>+	struct fcp_hdr_le fcp_hdr_le;</div><div class='add'>+	union {</div><div class='add'>+		struct ba_acc_le ba_acct;</div><div class='add'>+		struct ba_rjt_le ba_rjt;</div><div class='add'>+	} __packed payload;</div><div class='add'>+	uint32_t reserved_4;</div><div class='add'>+	uint32_t exchange_addr_to_abort;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ISP queue -	ABTS Response IOCB from ISP24xx Firmware entry structure.</div><div class='add'>+ *		The ABTS response with completion status to the ABTS response</div><div class='add'>+ *		(sent by the target driver to the ISP 24xx) is sent by the</div><div class='add'>+ *		ISP24xx firmware to the target driver.</div><div class='add'>+ *		The IOCB is placed on the response queue.</div><div class='add'>+ */</div><div class='add'>+struct abts_resp_from_24xx_fw {</div><div class='add'>+	uint8_t	 entry_type;		    /* Entry type. */</div><div class='add'>+	uint8_t	 entry_count;		    /* Entry count. */</div><div class='add'>+	uint8_t	 sys_define;		    /* System defined. */</div><div class='add'>+	uint8_t	 entry_status;		    /* Entry Status. */</div><div class='add'>+	uint32_t handle;</div><div class='add'>+	uint16_t compl_status;</div><div class='add'>+#define ABTS_RESP_COMPL_SUCCESS		0</div><div class='add'>+#define ABTS_RESP_COMPL_SUBCODE_ERROR	0x31</div><div class='add'>+	uint16_t nport_handle;</div><div class='add'>+	uint16_t reserved_1;</div><div class='add'>+	uint8_t  reserved_2;</div><div class='add'>+	uint8_t  reserved_3:4;</div><div class='add'>+	uint8_t  sof_type:4;</div><div class='add'>+	uint32_t exchange_address;</div><div class='add'>+	struct fcp_hdr_le fcp_hdr_le;</div><div class='add'>+	uint8_t reserved_4[8];</div><div class='add'>+	uint32_t error_subcode1;</div><div class='add'>+#define ABTS_RESP_SUBCODE_ERR_ABORTED_EXCH_NOT_TERM	0x1E</div><div class='add'>+	uint32_t error_subcode2;</div><div class='add'>+	uint32_t exchange_addr_to_abort;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/********************************************************************\</div><div class='add'>+ * Type Definitions used by initiator &amp; target halves</div><div class='add'>+\********************************************************************/</div><div class='add'>+</div><div class='add'>+struct qla_tgt_mgmt_cmd;</div><div class='add'>+struct qla_tgt_sess;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This structure provides a template of function calls that the</div><div class='add'>+ * target driver (from within qla_target.c) can issue to the</div><div class='add'>+ * target module (tcm_qla2xxx).</div><div class='add'>+ */</div><div class='add'>+struct qla_tgt_func_tmpl {</div><div class='add'>+</div><div class='add'>+	int (*handle_cmd)(struct scsi_qla_host *, struct qla_tgt_cmd *,</div><div class='add'>+			unsigned char *, uint32_t, int, int, int);</div><div class='add'>+	int (*handle_data)(struct qla_tgt_cmd *);</div><div class='add'>+	int (*handle_tmr)(struct qla_tgt_mgmt_cmd *, uint32_t, uint8_t,</div><div class='add'>+			uint32_t);</div><div class='add'>+	void (*free_cmd)(struct qla_tgt_cmd *);</div><div class='add'>+	void (*free_mcmd)(struct qla_tgt_mgmt_cmd *);</div><div class='add'>+	void (*free_session)(struct qla_tgt_sess *);</div><div class='add'>+</div><div class='add'>+	int (*check_initiator_node_acl)(struct scsi_qla_host *, unsigned char *,</div><div class='add'>+					void *, uint8_t *, uint16_t);</div><div class='add'>+	struct qla_tgt_sess *(*find_sess_by_loop_id)(struct scsi_qla_host *,</div><div class='add'>+						const uint16_t);</div><div class='add'>+	struct qla_tgt_sess *(*find_sess_by_s_id)(struct scsi_qla_host *,</div><div class='add'>+						const uint8_t *);</div><div class='add'>+	void (*clear_nacl_from_fcport_map)(struct qla_tgt_sess *);</div><div class='add'>+	void (*put_sess)(struct qla_tgt_sess *);</div><div class='add'>+	void (*shutdown_sess)(struct qla_tgt_sess *);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int qla2x00_wait_for_hba_online(struct scsi_qla_host *);</div><div class='add'>+</div><div class='add'>+#include &lt;target/target_core_base.h&gt;</div><div class='add'>+</div><div class='add'>+#define QLA_TGT_TIMEOUT			10	/* in seconds */</div><div class='add'>+</div><div class='add'>+#define QLA_TGT_MAX_HW_PENDING_TIME	60 /* in seconds */</div><div class='add'>+</div><div class='add'>+/* Immediate notify status constants */</div><div class='add'>+#define IMM_NTFY_LIP_RESET          0x000E</div><div class='add'>+#define IMM_NTFY_LIP_LINK_REINIT    0x000F</div><div class='add'>+#define IMM_NTFY_IOCB_OVERFLOW      0x0016</div><div class='add'>+#define IMM_NTFY_ABORT_TASK         0x0020</div><div class='add'>+#define IMM_NTFY_PORT_LOGOUT        0x0029</div><div class='add'>+#define IMM_NTFY_PORT_CONFIG        0x002A</div><div class='add'>+#define IMM_NTFY_GLBL_TPRLO         0x002D</div><div class='add'>+#define IMM_NTFY_GLBL_LOGO          0x002E</div><div class='add'>+#define IMM_NTFY_RESOURCE           0x0034</div><div class='add'>+#define IMM_NTFY_MSG_RX             0x0036</div><div class='add'>+#define IMM_NTFY_SRR                0x0045</div><div class='add'>+#define IMM_NTFY_ELS                0x0046</div><div class='add'>+</div><div class='add'>+/* Immediate notify task flags */</div><div class='add'>+#define IMM_NTFY_TASK_MGMT_SHIFT    8</div><div class='add'>+</div><div class='add'>+#define QLA_TGT_CLEAR_ACA               0x40</div><div class='add'>+#define QLA_TGT_TARGET_RESET            0x20</div><div class='add'>+#define QLA_TGT_LUN_RESET               0x10</div><div class='add'>+#define QLA_TGT_CLEAR_TS                0x04</div><div class='add'>+#define QLA_TGT_ABORT_TS                0x02</div><div class='add'>+#define QLA_TGT_ABORT_ALL_SESS          0xFFFF</div><div class='add'>+#define QLA_TGT_ABORT_ALL               0xFFFE</div><div class='add'>+#define QLA_TGT_NEXUS_LOSS_SESS         0xFFFD</div><div class='add'>+#define QLA_TGT_NEXUS_LOSS              0xFFFC</div><div class='add'>+</div><div class='add'>+/* Notify Acknowledge flags */</div><div class='add'>+#define NOTIFY_ACK_RES_COUNT        BIT_8</div><div class='add'>+#define NOTIFY_ACK_CLEAR_LIP_RESET  BIT_5</div><div class='add'>+#define NOTIFY_ACK_TM_RESP_CODE_VALID BIT_4</div><div class='add'>+</div><div class='add'>+/* Command's states */</div><div class='add'>+#define QLA_TGT_STATE_NEW		0 /* New command + target processing */</div><div class='add'>+#define QLA_TGT_STATE_NEED_DATA		1 /* target needs data to continue */</div><div class='add'>+#define QLA_TGT_STATE_DATA_IN		2 /* Data arrived + target processing */</div><div class='add'>+#define QLA_TGT_STATE_PROCESSED		3 /* target done processing */</div><div class='add'>+#define QLA_TGT_STATE_ABORTED		4 /* Command aborted */</div><div class='add'>+</div><div class='add'>+/* Special handles */</div><div class='add'>+#define QLA_TGT_NULL_HANDLE	0</div><div class='add'>+#define QLA_TGT_SKIP_HANDLE	(0xFFFFFFFF &amp; ~CTIO_COMPLETION_HANDLE_MARK)</div><div class='add'>+</div><div class='add'>+/* ATIO task_codes field */</div><div class='add'>+#define ATIO_SIMPLE_QUEUE           0</div><div class='add'>+#define ATIO_HEAD_OF_QUEUE          1</div><div class='add'>+#define ATIO_ORDERED_QUEUE          2</div><div class='add'>+#define ATIO_ACA_QUEUE              4</div><div class='add'>+#define ATIO_UNTAGGED               5</div><div class='add'>+</div><div class='add'>+/* TM failed response codes, see FCP (9.4.11 FCP_RSP_INFO) */</div><div class='add'>+#define	FC_TM_SUCCESS               0</div><div class='add'>+#define	FC_TM_BAD_FCP_DATA          1</div><div class='add'>+#define	FC_TM_BAD_CMD               2</div><div class='add'>+#define	FC_TM_FCP_DATA_MISMATCH     3</div><div class='add'>+#define	FC_TM_REJECT                4</div><div class='add'>+#define FC_TM_FAILED                5</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Error code of qlt_pre_xmit_response() meaning that cmd's exchange was</div><div class='add'>+ * terminated, so no more actions is needed and success should be returned</div><div class='add'>+ * to target.</div><div class='add'>+ */</div><div class='add'>+#define QLA_TGT_PRE_XMIT_RESP_CMD_ABORTED	0x1717</div><div class='add'>+</div><div class='add'>+#if (BITS_PER_LONG &gt; 32) || defined(CONFIG_HIGHMEM64G)</div><div class='add'>+#define pci_dma_lo32(a) (a &amp; 0xffffffff)</div><div class='add'>+#define pci_dma_hi32(a) ((((a) &gt;&gt; 16)&gt;&gt;16) &amp; 0xffffffff)</div><div class='add'>+#else</div><div class='add'>+#define pci_dma_lo32(a) (a &amp; 0xffffffff)</div><div class='add'>+#define pci_dma_hi32(a) 0</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define QLA_TGT_SENSE_VALID(sense)  ((sense != NULL) &amp;&amp; \</div><div class='add'>+				(((const uint8_t *)(sense))[0] &amp; 0x70) == 0x70)</div><div class='add'>+</div><div class='add'>+struct qla_port_24xx_data {</div><div class='add'>+	uint8_t port_name[WWN_SIZE];</div><div class='add'>+	uint16_t loop_id;</div><div class='add'>+	uint16_t reserved;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qla_tgt {</div><div class='add'>+	struct scsi_qla_host *vha;</div><div class='add'>+	struct qla_hw_data *ha;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * To sync between IRQ handlers and qlt_target_release(). Needed,</div><div class='add'>+	 * because req_pkt() can drop/reaquire HW lock inside. Protected by</div><div class='add'>+	 * HW lock.</div><div class='add'>+	 */</div><div class='add'>+	int irq_cmd_count;</div><div class='add'>+</div><div class='add'>+	int datasegs_per_cmd, datasegs_per_cont, sg_tablesize;</div><div class='add'>+</div><div class='add'>+	/* Target's flags, serialized by pha-&gt;hardware_lock */</div><div class='add'>+	unsigned int tgt_enable_64bit_addr:1; /* 64-bits PCI addr enabled */</div><div class='add'>+	unsigned int link_reinit_iocb_pending:1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Protected by tgt_mutex AND hardware_lock for writing and tgt_mutex</div><div class='add'>+	 * OR hardware_lock for reading.</div><div class='add'>+	 */</div><div class='add'>+	int tgt_stop; /* the target mode driver is being stopped */</div><div class='add'>+	int tgt_stopped; /* the target mode driver has been stopped */</div><div class='add'>+</div><div class='add'>+	/* Count of sessions refering qla_tgt. Protected by hardware_lock. */</div><div class='add'>+	int sess_count;</div><div class='add'>+</div><div class='add'>+	/* Protected by hardware_lock. Addition also protected by tgt_mutex. */</div><div class='add'>+	struct list_head sess_list;</div><div class='add'>+</div><div class='add'>+	/* Protected by hardware_lock */</div><div class='add'>+	struct list_head del_sess_list;</div><div class='add'>+	struct delayed_work sess_del_work;</div><div class='add'>+</div><div class='add'>+	spinlock_t sess_work_lock;</div><div class='add'>+	struct list_head sess_works_list;</div><div class='add'>+	struct work_struct sess_work;</div><div class='add'>+</div><div class='add'>+	struct imm_ntfy_from_isp link_reinit_iocb;</div><div class='add'>+	wait_queue_head_t waitQ;</div><div class='add'>+	int notify_ack_expected;</div><div class='add'>+	int abts_resp_expected;</div><div class='add'>+	int modify_lun_expected;</div><div class='add'>+</div><div class='add'>+	int ctio_srr_id;</div><div class='add'>+	int imm_srr_id;</div><div class='add'>+	spinlock_t srr_lock;</div><div class='add'>+	struct list_head srr_ctio_list;</div><div class='add'>+	struct list_head srr_imm_list;</div><div class='add'>+	struct work_struct srr_work;</div><div class='add'>+</div><div class='add'>+	atomic_t tgt_global_resets_count;</div><div class='add'>+</div><div class='add'>+	struct list_head tgt_list_entry;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Equivilant to IT Nexus (Initiator-Target)</div><div class='add'>+ */</div><div class='add'>+struct qla_tgt_sess {</div><div class='add'>+	uint16_t loop_id;</div><div class='add'>+	port_id_t s_id;</div><div class='add'>+</div><div class='add'>+	unsigned int conf_compl_supported:1;</div><div class='add'>+	unsigned int deleted:1;</div><div class='add'>+	unsigned int local:1;</div><div class='add'>+	unsigned int tearing_down:1;</div><div class='add'>+</div><div class='add'>+	struct se_session *se_sess;</div><div class='add'>+	struct scsi_qla_host *vha;</div><div class='add'>+	struct qla_tgt *tgt;</div><div class='add'>+</div><div class='add'>+	struct list_head sess_list_entry;</div><div class='add'>+	unsigned long expires;</div><div class='add'>+	struct list_head del_list_entry;</div><div class='add'>+</div><div class='add'>+	uint8_t port_name[WWN_SIZE];</div><div class='add'>+	struct work_struct free_work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qla_tgt_cmd {</div><div class='add'>+	struct qla_tgt_sess *sess;</div><div class='add'>+	int state;</div><div class='add'>+	struct se_cmd se_cmd;</div><div class='add'>+	struct work_struct free_work;</div><div class='add'>+	struct work_struct work;</div><div class='add'>+	/* Sense buffer that will be mapped into outgoing status */</div><div class='add'>+	unsigned char sense_buffer[TRANSPORT_SENSE_BUFFER];</div><div class='add'>+</div><div class='add'>+	/* to save extra sess dereferences */</div><div class='add'>+	unsigned int conf_compl_supported:1;</div><div class='add'>+	unsigned int sg_mapped:1;</div><div class='add'>+	unsigned int free_sg:1;</div><div class='add'>+	unsigned int aborted:1; /* Needed in case of SRR */</div><div class='add'>+	unsigned int write_data_transferred:1;</div><div class='add'>+</div><div class='add'>+	struct scatterlist *sg;	/* cmd data buffer SG vector */</div><div class='add'>+	int sg_cnt;		/* SG segments count */</div><div class='add'>+	int bufflen;		/* cmd buffer length */</div><div class='add'>+	int offset;</div><div class='add'>+	uint32_t tag;</div><div class='add'>+	uint32_t unpacked_lun;</div><div class='add'>+	enum dma_data_direction dma_data_direction;</div><div class='add'>+</div><div class='add'>+	uint16_t loop_id;	/* to save extra sess dereferences */</div><div class='add'>+	struct qla_tgt *tgt;	/* to save extra sess dereferences */</div><div class='add'>+	struct scsi_qla_host *vha;</div><div class='add'>+	struct list_head cmd_list;</div><div class='add'>+</div><div class='add'>+	struct atio_from_isp atio;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qla_tgt_sess_work_param {</div><div class='add'>+	struct list_head sess_works_list_entry;</div><div class='add'>+</div><div class='add'>+#define QLA_TGT_SESS_WORK_ABORT	1</div><div class='add'>+#define QLA_TGT_SESS_WORK_TM	2</div><div class='add'>+	int type;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct abts_recv_from_24xx abts;</div><div class='add'>+		struct imm_ntfy_from_isp tm_iocb;</div><div class='add'>+		struct atio_from_isp tm_iocb2;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qla_tgt_mgmt_cmd {</div><div class='add'>+	uint8_t tmr_func;</div><div class='add'>+	uint8_t fc_tm_rsp;</div><div class='add'>+	struct qla_tgt_sess *sess;</div><div class='add'>+	struct se_cmd se_cmd;</div><div class='add'>+	struct work_struct free_work;</div><div class='add'>+	unsigned int flags;</div><div class='add'>+#define QLA24XX_MGMT_SEND_NACK	1</div><div class='add'>+	union {</div><div class='add'>+		struct atio_from_isp atio;</div><div class='add'>+		struct imm_ntfy_from_isp imm_ntfy;</div><div class='add'>+		struct abts_recv_from_24xx abts;</div><div class='add'>+	} __packed orig_iocb;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qla_tgt_prm {</div><div class='add'>+	struct qla_tgt_cmd *cmd;</div><div class='add'>+	struct qla_tgt *tgt;</div><div class='add'>+	void *pkt;</div><div class='add'>+	struct scatterlist *sg;	/* cmd data buffer SG vector */</div><div class='add'>+	int seg_cnt;</div><div class='add'>+	int req_cnt;</div><div class='add'>+	uint16_t rq_result;</div><div class='add'>+	uint16_t scsi_status;</div><div class='add'>+	unsigned char *sense_buffer;</div><div class='add'>+	int sense_buffer_len;</div><div class='add'>+	int residual;</div><div class='add'>+	int add_status_pkt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qla_tgt_srr_imm {</div><div class='add'>+	struct list_head srr_list_entry;</div><div class='add'>+	int srr_id;</div><div class='add'>+	struct imm_ntfy_from_isp imm_ntfy;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qla_tgt_srr_ctio {</div><div class='add'>+	struct list_head srr_list_entry;</div><div class='add'>+	int srr_id;</div><div class='add'>+	struct qla_tgt_cmd *cmd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define QLA_TGT_XMIT_DATA		1</div><div class='add'>+#define QLA_TGT_XMIT_STATUS		2</div><div class='add'>+#define QLA_TGT_XMIT_ALL		(QLA_TGT_XMIT_STATUS|QLA_TGT_XMIT_DATA)</div><div class='add'>+</div><div class='add'>+#include &lt;linux/version.h&gt;</div><div class='add'>+</div><div class='add'>+extern struct qla_tgt_data qla_target;</div><div class='add'>+/*</div><div class='add'>+ * Internal function prototypes</div><div class='add'>+ */</div><div class='add'>+void qlt_disable_vha(struct scsi_qla_host *);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Function prototypes for qla_target.c logic used by qla2xxx LLD code.</div><div class='add'>+ */</div><div class='add'>+extern int qlt_add_target(struct qla_hw_data *, struct scsi_qla_host *);</div><div class='add'>+extern int qlt_remove_target(struct qla_hw_data *, struct scsi_qla_host *);</div><div class='add'>+extern int qlt_lport_register(struct qla_tgt_func_tmpl *, u64,</div><div class='add'>+			int (*callback)(struct scsi_qla_host *), void *);</div><div class='add'>+extern void qlt_lport_deregister(struct scsi_qla_host *);</div><div class='add'>+extern void qlt_unreg_sess(struct qla_tgt_sess *);</div><div class='add'>+extern void qlt_fc_port_added(struct scsi_qla_host *, fc_port_t *);</div><div class='add'>+extern void qlt_fc_port_deleted(struct scsi_qla_host *, fc_port_t *);</div><div class='add'>+extern void qlt_set_mode(struct scsi_qla_host *ha);</div><div class='add'>+extern void qlt_clear_mode(struct scsi_qla_host *ha);</div><div class='add'>+extern int __init qlt_init(void);</div><div class='add'>+extern void qlt_exit(void);</div><div class='add'>+extern void qlt_update_vp_map(struct scsi_qla_host *, int);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This macro is used during early initializations when host-&gt;active_mode</div><div class='add'>+ * is not set. Right now, ha value is ignored.</div><div class='add'>+ */</div><div class='add'>+#define QLA_TGT_MODE_ENABLED() (ql2x_ini_mode != QLA2XXX_INI_MODE_ENABLED)</div><div class='add'>+</div><div class='add'>+static inline bool qla_tgt_mode_enabled(struct scsi_qla_host *ha)</div><div class='add'>+{</div><div class='add'>+	return ha-&gt;host-&gt;active_mode &amp; MODE_TARGET;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool qla_ini_mode_enabled(struct scsi_qla_host *ha)</div><div class='add'>+{</div><div class='add'>+	return ha-&gt;host-&gt;active_mode &amp; MODE_INITIATOR;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void qla_reverse_ini_mode(struct scsi_qla_host *ha)</div><div class='add'>+{</div><div class='add'>+	if (ha-&gt;host-&gt;active_mode &amp; MODE_INITIATOR)</div><div class='add'>+		ha-&gt;host-&gt;active_mode &amp;= ~MODE_INITIATOR;</div><div class='add'>+	else</div><div class='add'>+		ha-&gt;host-&gt;active_mode |= MODE_INITIATOR;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Exported symbols from qla_target.c LLD logic used by qla2xxx code..</div><div class='add'>+ */</div><div class='add'>+extern void qlt_24xx_atio_pkt_all_vps(struct scsi_qla_host *,</div><div class='add'>+	struct atio_from_isp *);</div><div class='add'>+extern void qlt_response_pkt_all_vps(struct scsi_qla_host *, response_t *);</div><div class='add'>+extern int qlt_rdy_to_xfer(struct qla_tgt_cmd *);</div><div class='add'>+extern int qlt_xmit_response(struct qla_tgt_cmd *, int, uint8_t);</div><div class='add'>+extern void qlt_xmit_tm_rsp(struct qla_tgt_mgmt_cmd *);</div><div class='add'>+extern void qlt_free_mcmd(struct qla_tgt_mgmt_cmd *);</div><div class='add'>+extern void qlt_free_cmd(struct qla_tgt_cmd *cmd);</div><div class='add'>+extern void qlt_ctio_completion(struct scsi_qla_host *, uint32_t);</div><div class='add'>+extern void qlt_async_event(uint16_t, struct scsi_qla_host *, uint16_t *);</div><div class='add'>+extern void qlt_enable_vha(struct scsi_qla_host *);</div><div class='add'>+extern void qlt_vport_create(struct scsi_qla_host *, struct qla_hw_data *);</div><div class='add'>+extern void qlt_rff_id(struct scsi_qla_host *, struct ct_sns_req *);</div><div class='add'>+extern void qlt_init_atio_q_entries(struct scsi_qla_host *);</div><div class='add'>+extern void qlt_24xx_process_atio_queue(struct scsi_qla_host *);</div><div class='add'>+extern void qlt_24xx_config_rings(struct scsi_qla_host *,</div><div class='add'>+	device_reg_t __iomem *);</div><div class='add'>+extern void qlt_24xx_config_nvram_stage1(struct scsi_qla_host *,</div><div class='add'>+	struct nvram_24xx *);</div><div class='add'>+extern void qlt_24xx_config_nvram_stage2(struct scsi_qla_host *,</div><div class='add'>+	struct init_cb_24xx *);</div><div class='add'>+extern int qlt_24xx_process_response_error(struct scsi_qla_host *,</div><div class='add'>+	struct sts_entry_24xx *);</div><div class='add'>+extern void qlt_modify_vp_config(struct scsi_qla_host *,</div><div class='add'>+	struct vp_config_entry_24xx *);</div><div class='add'>+extern void qlt_probe_one_stage1(struct scsi_qla_host *, struct qla_hw_data *);</div><div class='add'>+extern int qlt_mem_alloc(struct qla_hw_data *);</div><div class='add'>+extern void qlt_mem_free(struct qla_hw_data *);</div><div class='add'>+extern void qlt_stop_phase1(struct qla_tgt *);</div><div class='add'>+extern void qlt_stop_phase2(struct qla_tgt *);</div><div class='add'>+</div><div class='add'>+#endif /* __QLA_TARGET_H */</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h<br/>index 29d780c38040..f5fdb16bec9b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_version.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla2xxx/qla_version.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/qla_version.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/qla_version.h</a></div><div class='hunk'>@@ -7,9 +7,9 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Driver version</div><div class='ctx'>  */</div><div class='del'>-#define QLA2XXX_VERSION      "8.03.07.13-k"</div><div class='add'>+#define QLA2XXX_VERSION      "8.04.00.03-k"</div><div class='ctx'> </div><div class='ctx'> #define QLA_DRIVER_MAJOR_VER	8</div><div class='del'>-#define QLA_DRIVER_MINOR_VER	3</div><div class='del'>-#define QLA_DRIVER_PATCH_VER	7</div><div class='add'>+#define QLA_DRIVER_MINOR_VER	4</div><div class='add'>+#define QLA_DRIVER_PATCH_VER	0</div><div class='ctx'> #define QLA_DRIVER_BETA_VER	3</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/tcm_qla2xxx.c b/drivers/scsi/qla2xxx/tcm_qla2xxx.c<br/>new file mode 100644<br/>index 000000000000..436598f57404<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/tcm_qla2xxx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/tcm_qla2xxx.c</a></div><div class='hunk'>@@ -0,0 +1,1955 @@</div><div class='add'>+/*******************************************************************************</div><div class='add'>+ * This file contains tcm implementation using v4 configfs fabric infrastructure</div><div class='add'>+ * for QLogic target mode HBAs</div><div class='add'>+ *</div><div class='add'>+ * ?? Copyright 2010-2011 RisingTide Systems LLC.</div><div class='add'>+ *</div><div class='add'>+ * Licensed to the Linux Foundation under the General Public License (GPL)</div><div class='add'>+ * version 2.</div><div class='add'>+ *</div><div class='add'>+ * Author: Nicholas A. Bellinger &lt;nab@risingtidesystems.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * tcm_qla2xxx_parse_wwn() and tcm_qla2xxx_format_wwn() contains code from</div><div class='add'>+ * the TCM_FC / Open-FCoE.org fabric module.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2010 Cisco Systems, Inc</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful,</div><div class='add'>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='add'>+ * GNU General Public License for more details.</div><div class='add'>+ ****************************************************************************/</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/moduleparam.h&gt;</div><div class='add'>+#include &lt;generated/utsrelease.h&gt;</div><div class='add'>+#include &lt;linux/utsname.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/kthread.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/configfs.h&gt;</div><div class='add'>+#include &lt;linux/ctype.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/ctype.h&gt;</div><div class='add'>+#include &lt;asm/unaligned.h&gt;</div><div class='add'>+#include &lt;scsi/scsi.h&gt;</div><div class='add'>+#include &lt;scsi/scsi_host.h&gt;</div><div class='add'>+#include &lt;scsi/scsi_device.h&gt;</div><div class='add'>+#include &lt;scsi/scsi_cmnd.h&gt;</div><div class='add'>+#include &lt;target/target_core_base.h&gt;</div><div class='add'>+#include &lt;target/target_core_fabric.h&gt;</div><div class='add'>+#include &lt;target/target_core_fabric_configfs.h&gt;</div><div class='add'>+#include &lt;target/target_core_configfs.h&gt;</div><div class='add'>+#include &lt;target/configfs_macros.h&gt;</div><div class='add'>+</div><div class='add'>+#include "qla_def.h"</div><div class='add'>+#include "qla_target.h"</div><div class='add'>+#include "tcm_qla2xxx.h"</div><div class='add'>+</div><div class='add'>+struct workqueue_struct *tcm_qla2xxx_free_wq;</div><div class='add'>+struct workqueue_struct *tcm_qla2xxx_cmd_wq;</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_check_true(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_check_false(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Parse WWN.</div><div class='add'>+ * If strict, we require lower-case hex and colon separators to be sure</div><div class='add'>+ * the name is the same as what would be generated by ft_format_wwn()</div><div class='add'>+ * so the name and wwn are mapped one-to-one.</div><div class='add'>+ */</div><div class='add'>+static ssize_t tcm_qla2xxx_parse_wwn(const char *name, u64 *wwn, int strict)</div><div class='add'>+{</div><div class='add'>+	const char *cp;</div><div class='add'>+	char c;</div><div class='add'>+	u32 nibble;</div><div class='add'>+	u32 byte = 0;</div><div class='add'>+	u32 pos = 0;</div><div class='add'>+	u32 err;</div><div class='add'>+</div><div class='add'>+	*wwn = 0;</div><div class='add'>+	for (cp = name; cp &lt; &amp;name[TCM_QLA2XXX_NAMELEN - 1]; cp++) {</div><div class='add'>+		c = *cp;</div><div class='add'>+		if (c == '\n' &amp;&amp; cp[1] == '\0')</div><div class='add'>+			continue;</div><div class='add'>+		if (strict &amp;&amp; pos++ == 2 &amp;&amp; byte++ &lt; 7) {</div><div class='add'>+			pos = 0;</div><div class='add'>+			if (c == ':')</div><div class='add'>+				continue;</div><div class='add'>+			err = 1;</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='add'>+		if (c == '\0') {</div><div class='add'>+			err = 2;</div><div class='add'>+			if (strict &amp;&amp; byte != 8)</div><div class='add'>+				goto fail;</div><div class='add'>+			return cp - name;</div><div class='add'>+		}</div><div class='add'>+		err = 3;</div><div class='add'>+		if (isdigit(c))</div><div class='add'>+			nibble = c - '0';</div><div class='add'>+		else if (isxdigit(c) &amp;&amp; (islower(c) || !strict))</div><div class='add'>+			nibble = tolower(c) - 'a' + 10;</div><div class='add'>+		else</div><div class='add'>+			goto fail;</div><div class='add'>+		*wwn = (*wwn &lt;&lt; 4) | nibble;</div><div class='add'>+	}</div><div class='add'>+	err = 4;</div><div class='add'>+fail:</div><div class='add'>+	pr_debug("err %u len %zu pos %u byte %u\n",</div><div class='add'>+			err, cp - name, pos, byte);</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t tcm_qla2xxx_format_wwn(char *buf, size_t len, u64 wwn)</div><div class='add'>+{</div><div class='add'>+	u8 b[8];</div><div class='add'>+</div><div class='add'>+	put_unaligned_be64(wwn, b);</div><div class='add'>+	return snprintf(buf, len,</div><div class='add'>+		"%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x",</div><div class='add'>+		b[0], b[1], b[2], b[3], b[4], b[5], b[6], b[7]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static char *tcm_qla2xxx_get_fabric_name(void)</div><div class='add'>+{</div><div class='add'>+	return "qla2xxx";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * From drivers/scsi/scsi_transport_fc.c:fc_parse_wwn</div><div class='add'>+ */</div><div class='add'>+static int tcm_qla2xxx_npiv_extract_wwn(const char *ns, u64 *nm)</div><div class='add'>+{</div><div class='add'>+	unsigned int i, j, value;</div><div class='add'>+	u8 wwn[8];</div><div class='add'>+</div><div class='add'>+	memset(wwn, 0, sizeof(wwn));</div><div class='add'>+</div><div class='add'>+	/* Validate and store the new name */</div><div class='add'>+	for (i = 0, j = 0; i &lt; 16; i++) {</div><div class='add'>+		value = hex_to_bin(*ns++);</div><div class='add'>+		if (value &gt;= 0)</div><div class='add'>+			j = (j &lt;&lt; 4) | value;</div><div class='add'>+		else</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		if (i % 2) {</div><div class='add'>+			wwn[i/2] = j &amp; 0xff;</div><div class='add'>+			j = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*nm = wwn_to_u64(wwn);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This parsing logic follows drivers/scsi/scsi_transport_fc.c:</div><div class='add'>+ * store_fc_host_vport_create()</div><div class='add'>+ */</div><div class='add'>+static int tcm_qla2xxx_npiv_parse_wwn(</div><div class='add'>+	const char *name,</div><div class='add'>+	size_t count,</div><div class='add'>+	u64 *wwpn,</div><div class='add'>+	u64 *wwnn)</div><div class='add'>+{</div><div class='add'>+	unsigned int cnt = count;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	*wwpn = 0;</div><div class='add'>+	*wwnn = 0;</div><div class='add'>+</div><div class='add'>+	/* count may include a LF at end of string */</div><div class='add'>+	if (name[cnt-1] == '\n')</div><div class='add'>+		cnt--;</div><div class='add'>+</div><div class='add'>+	/* validate we have enough characters for WWPN */</div><div class='add'>+	if ((cnt != (16+1+16)) || (name[16] != ':'))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rc = tcm_qla2xxx_npiv_extract_wwn(&amp;name[0], wwpn);</div><div class='add'>+	if (rc != 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = tcm_qla2xxx_npiv_extract_wwn(&amp;name[17], wwnn);</div><div class='add'>+	if (rc != 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t tcm_qla2xxx_npiv_format_wwn(char *buf, size_t len,</div><div class='add'>+					u64 wwpn, u64 wwnn)</div><div class='add'>+{</div><div class='add'>+	u8 b[8], b2[8];</div><div class='add'>+</div><div class='add'>+	put_unaligned_be64(wwpn, b);</div><div class='add'>+	put_unaligned_be64(wwnn, b2);</div><div class='add'>+	return snprintf(buf, len,</div><div class='add'>+		"%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x,"</div><div class='add'>+		"%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x",</div><div class='add'>+		b[0], b[1], b[2], b[3], b[4], b[5], b[6], b[7],</div><div class='add'>+		b2[0], b2[1], b2[2], b2[3], b2[4], b2[5], b2[6], b2[7]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static char *tcm_qla2xxx_npiv_get_fabric_name(void)</div><div class='add'>+{</div><div class='add'>+	return "qla2xxx_npiv";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 tcm_qla2xxx_get_fabric_proto_ident(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+				struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = tpg-&gt;lport;</div><div class='add'>+	u8 proto_id;</div><div class='add'>+</div><div class='add'>+	switch (lport-&gt;lport_proto_id) {</div><div class='add'>+	case SCSI_PROTOCOL_FCP:</div><div class='add'>+	default:</div><div class='add'>+		proto_id = fc_get_fabric_proto_ident(se_tpg);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return proto_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static char *tcm_qla2xxx_get_fabric_wwn(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+				struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = tpg-&gt;lport;</div><div class='add'>+</div><div class='add'>+	return &amp;lport-&gt;lport_name[0];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static char *tcm_qla2xxx_npiv_get_fabric_wwn(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+				struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = tpg-&gt;lport;</div><div class='add'>+</div><div class='add'>+	return &amp;lport-&gt;lport_npiv_name[0];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 tcm_qla2xxx_get_tag(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+				struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+	return tpg-&gt;lport_tpgt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 tcm_qla2xxx_get_default_depth(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 tcm_qla2xxx_get_pr_transport_id(</div><div class='add'>+	struct se_portal_group *se_tpg,</div><div class='add'>+	struct se_node_acl *se_nacl,</div><div class='add'>+	struct t10_pr_registration *pr_reg,</div><div class='add'>+	int *format_code,</div><div class='add'>+	unsigned char *buf)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+				struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = tpg-&gt;lport;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (lport-&gt;lport_proto_id) {</div><div class='add'>+	case SCSI_PROTOCOL_FCP:</div><div class='add'>+	default:</div><div class='add'>+		ret = fc_get_pr_transport_id(se_tpg, se_nacl, pr_reg,</div><div class='add'>+					format_code, buf);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 tcm_qla2xxx_get_pr_transport_id_len(</div><div class='add'>+	struct se_portal_group *se_tpg,</div><div class='add'>+	struct se_node_acl *se_nacl,</div><div class='add'>+	struct t10_pr_registration *pr_reg,</div><div class='add'>+	int *format_code)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+				struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = tpg-&gt;lport;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (lport-&gt;lport_proto_id) {</div><div class='add'>+	case SCSI_PROTOCOL_FCP:</div><div class='add'>+	default:</div><div class='add'>+		ret = fc_get_pr_transport_id_len(se_tpg, se_nacl, pr_reg,</div><div class='add'>+					format_code);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static char *tcm_qla2xxx_parse_pr_out_transport_id(</div><div class='add'>+	struct se_portal_group *se_tpg,</div><div class='add'>+	const char *buf,</div><div class='add'>+	u32 *out_tid_len,</div><div class='add'>+	char **port_nexus_ptr)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+				struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = tpg-&gt;lport;</div><div class='add'>+	char *tid = NULL;</div><div class='add'>+</div><div class='add'>+	switch (lport-&gt;lport_proto_id) {</div><div class='add'>+	case SCSI_PROTOCOL_FCP:</div><div class='add'>+	default:</div><div class='add'>+		tid = fc_parse_pr_out_transport_id(se_tpg, buf, out_tid_len,</div><div class='add'>+					port_nexus_ptr);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return tid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_check_demo_mode(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+				struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+</div><div class='add'>+	return QLA_TPG_ATTRIB(tpg)-&gt;generate_node_acls;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_check_demo_mode_cache(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+				struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+</div><div class='add'>+	return QLA_TPG_ATTRIB(tpg)-&gt;cache_dynamic_acls;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_check_demo_write_protect(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+				struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+</div><div class='add'>+	return QLA_TPG_ATTRIB(tpg)-&gt;demo_mode_write_protect;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_check_prod_write_protect(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+				struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+</div><div class='add'>+	return QLA_TPG_ATTRIB(tpg)-&gt;prod_mode_write_protect;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct se_node_acl *tcm_qla2xxx_alloc_fabric_acl(</div><div class='add'>+	struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_nacl *nacl;</div><div class='add'>+</div><div class='add'>+	nacl = kzalloc(sizeof(struct tcm_qla2xxx_nacl), GFP_KERNEL);</div><div class='add'>+	if (!nacl) {</div><div class='add'>+		pr_err("Unable to alocate struct tcm_qla2xxx_nacl\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return &amp;nacl-&gt;se_node_acl;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_release_fabric_acl(</div><div class='add'>+	struct se_portal_group *se_tpg,</div><div class='add'>+	struct se_node_acl *se_nacl)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_nacl *nacl = container_of(se_nacl,</div><div class='add'>+			struct tcm_qla2xxx_nacl, se_node_acl);</div><div class='add'>+	kfree(nacl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 tcm_qla2xxx_tpg_get_inst_index(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+				struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+</div><div class='add'>+	return tpg-&gt;lport_tpgt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_complete_mcmd(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_mgmt_cmd *mcmd = container_of(work,</div><div class='add'>+			struct qla_tgt_mgmt_cmd, free_work);</div><div class='add'>+</div><div class='add'>+	transport_generic_free_cmd(&amp;mcmd-&gt;se_cmd, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called from qla_target_template-&gt;free_mcmd(), and will call</div><div class='add'>+ * tcm_qla2xxx_release_cmd() via normal struct target_core_fabric_ops</div><div class='add'>+ * release callback.  qla_hw_data-&gt;hardware_lock is expected to be held</div><div class='add'>+ */</div><div class='add'>+static void tcm_qla2xxx_free_mcmd(struct qla_tgt_mgmt_cmd *mcmd)</div><div class='add'>+{</div><div class='add'>+	INIT_WORK(&amp;mcmd-&gt;free_work, tcm_qla2xxx_complete_mcmd);</div><div class='add'>+	queue_work(tcm_qla2xxx_free_wq, &amp;mcmd-&gt;free_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_complete_free(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_cmd *cmd = container_of(work, struct qla_tgt_cmd, work);</div><div class='add'>+</div><div class='add'>+	transport_generic_free_cmd(&amp;cmd-&gt;se_cmd, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called from qla_target_template-&gt;free_cmd(), and will call</div><div class='add'>+ * tcm_qla2xxx_release_cmd via normal struct target_core_fabric_ops</div><div class='add'>+ * release callback.  qla_hw_data-&gt;hardware_lock is expected to be held</div><div class='add'>+ */</div><div class='add'>+static void tcm_qla2xxx_free_cmd(struct qla_tgt_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	INIT_WORK(&amp;cmd-&gt;work, tcm_qla2xxx_complete_free);</div><div class='add'>+	queue_work(tcm_qla2xxx_free_wq, &amp;cmd-&gt;work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called from struct target_core_fabric_ops-&gt;check_stop_free() context</div><div class='add'>+ */</div><div class='add'>+static int tcm_qla2xxx_check_stop_free(struct se_cmd *se_cmd)</div><div class='add'>+{</div><div class='add'>+	return target_put_sess_cmd(se_cmd-&gt;se_sess, se_cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* tcm_qla2xxx_release_cmd - Callback from TCM Core to release underlying</div><div class='add'>+ * fabric descriptor @se_cmd command to release</div><div class='add'>+ */</div><div class='add'>+static void tcm_qla2xxx_release_cmd(struct se_cmd *se_cmd)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_cmd *cmd;</div><div class='add'>+</div><div class='add'>+	if (se_cmd-&gt;se_cmd_flags &amp; SCF_SCSI_TMR_CDB) {</div><div class='add'>+		struct qla_tgt_mgmt_cmd *mcmd = container_of(se_cmd,</div><div class='add'>+				struct qla_tgt_mgmt_cmd, se_cmd);</div><div class='add'>+		qlt_free_mcmd(mcmd);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd = container_of(se_cmd, struct qla_tgt_cmd, se_cmd);</div><div class='add'>+	qlt_free_cmd(cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_shutdown_session(struct se_session *se_sess)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_sess *sess = se_sess-&gt;fabric_sess_ptr;</div><div class='add'>+	struct scsi_qla_host *vha;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	BUG_ON(!sess);</div><div class='add'>+	vha = sess-&gt;vha;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;vha-&gt;hw-&gt;hardware_lock, flags);</div><div class='add'>+	sess-&gt;tearing_down = 1;</div><div class='add'>+	target_splice_sess_cmd_list(se_sess);</div><div class='add'>+	spin_unlock_irqrestore(&amp;vha-&gt;hw-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_close_session(struct se_session *se_sess)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_sess *sess = se_sess-&gt;fabric_sess_ptr;</div><div class='add'>+	struct scsi_qla_host *vha;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	BUG_ON(!sess);</div><div class='add'>+	vha = sess-&gt;vha;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;vha-&gt;hw-&gt;hardware_lock, flags);</div><div class='add'>+	qlt_unreg_sess(sess);</div><div class='add'>+	spin_unlock_irqrestore(&amp;vha-&gt;hw-&gt;hardware_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 tcm_qla2xxx_sess_get_index(struct se_session *se_sess)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The LIO target core uses DMA_TO_DEVICE to mean that data is going</div><div class='add'>+ * to the target (eg handling a WRITE) and DMA_FROM_DEVICE to mean</div><div class='add'>+ * that data is coming from the target (eg handling a READ).  However,</div><div class='add'>+ * this is just the opposite of what we have to tell the DMA mapping</div><div class='add'>+ * layer -- eg when handling a READ, the HBA will have to DMA the data</div><div class='add'>+ * out of memory so it can send it to the initiator, which means we</div><div class='add'>+ * need to use DMA_TO_DEVICE when we map the data.</div><div class='add'>+ */</div><div class='add'>+static enum dma_data_direction tcm_qla2xxx_mapping_dir(struct se_cmd *se_cmd)</div><div class='add'>+{</div><div class='add'>+	if (se_cmd-&gt;se_cmd_flags &amp; SCF_BIDI)</div><div class='add'>+		return DMA_BIDIRECTIONAL;</div><div class='add'>+</div><div class='add'>+	switch (se_cmd-&gt;data_direction) {</div><div class='add'>+	case DMA_TO_DEVICE:</div><div class='add'>+		return DMA_FROM_DEVICE;</div><div class='add'>+	case DMA_FROM_DEVICE:</div><div class='add'>+		return DMA_TO_DEVICE;</div><div class='add'>+	case DMA_NONE:</div><div class='add'>+	default:</div><div class='add'>+		return DMA_NONE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_write_pending(struct se_cmd *se_cmd)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_cmd *cmd = container_of(se_cmd,</div><div class='add'>+				struct qla_tgt_cmd, se_cmd);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;bufflen = se_cmd-&gt;data_length;</div><div class='add'>+	cmd-&gt;dma_data_direction = tcm_qla2xxx_mapping_dir(se_cmd);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;sg_cnt = se_cmd-&gt;t_data_nents;</div><div class='add'>+	cmd-&gt;sg = se_cmd-&gt;t_data_sg;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * qla_target.c:qlt_rdy_to_xfer() will call pci_map_sg() to setup</div><div class='add'>+	 * the SGL mappings into PCIe memory for incoming FCP WRITE data.</div><div class='add'>+	 */</div><div class='add'>+	return qlt_rdy_to_xfer(cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_write_pending_status(struct se_cmd *se_cmd)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	/*</div><div class='add'>+	 * Check for WRITE_PENDING status to determine if we need to wait for</div><div class='add'>+	 * CTIO aborts to be posted via hardware in tcm_qla2xxx_handle_data().</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;se_cmd-&gt;t_state_lock, flags);</div><div class='add'>+	if (se_cmd-&gt;t_state == TRANSPORT_WRITE_PENDING ||</div><div class='add'>+	    se_cmd-&gt;t_state == TRANSPORT_COMPLETE_QF_WP) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;se_cmd-&gt;t_state_lock, flags);</div><div class='add'>+		wait_for_completion_timeout(&amp;se_cmd-&gt;t_transport_stop_comp,</div><div class='add'>+						3000);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;se_cmd-&gt;t_state_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_set_default_node_attrs(struct se_node_acl *nacl)</div><div class='add'>+{</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 tcm_qla2xxx_get_task_tag(struct se_cmd *se_cmd)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_cmd *cmd = container_of(se_cmd,</div><div class='add'>+				struct qla_tgt_cmd, se_cmd);</div><div class='add'>+</div><div class='add'>+	return cmd-&gt;tag;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_get_cmd_state(struct se_cmd *se_cmd)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called from process context in qla_target.c:qlt_do_work() code</div><div class='add'>+ */</div><div class='add'>+static int tcm_qla2xxx_handle_cmd(scsi_qla_host_t *vha, struct qla_tgt_cmd *cmd,</div><div class='add'>+	unsigned char *cdb, uint32_t data_length, int fcp_task_attr,</div><div class='add'>+	int data_dir, int bidi)</div><div class='add'>+{</div><div class='add'>+	struct se_cmd *se_cmd = &amp;cmd-&gt;se_cmd;</div><div class='add'>+	struct se_session *se_sess;</div><div class='add'>+	struct qla_tgt_sess *sess;</div><div class='add'>+	int flags = TARGET_SCF_ACK_KREF;</div><div class='add'>+</div><div class='add'>+	if (bidi)</div><div class='add'>+		flags |= TARGET_SCF_BIDI_OP;</div><div class='add'>+</div><div class='add'>+	sess = cmd-&gt;sess;</div><div class='add'>+	if (!sess) {</div><div class='add'>+		pr_err("Unable to locate struct qla_tgt_sess from qla_tgt_cmd\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	se_sess = sess-&gt;se_sess;</div><div class='add'>+	if (!se_sess) {</div><div class='add'>+		pr_err("Unable to locate active struct se_session\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	target_submit_cmd(se_cmd, se_sess, cdb, &amp;cmd-&gt;sense_buffer[0],</div><div class='add'>+				cmd-&gt;unpacked_lun, data_length, fcp_task_attr,</div><div class='add'>+				data_dir, flags);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_do_rsp(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_cmd *cmd = container_of(work, struct qla_tgt_cmd, work);</div><div class='add'>+	/*</div><div class='add'>+	 * Dispatch -&gt;queue_status from workqueue process context</div><div class='add'>+	 */</div><div class='add'>+	transport_generic_request_failure(&amp;cmd-&gt;se_cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called from qla_target.c:qlt_do_ctio_completion()</div><div class='add'>+ */</div><div class='add'>+static int tcm_qla2xxx_handle_data(struct qla_tgt_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct se_cmd *se_cmd = &amp;cmd-&gt;se_cmd;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure that the complete FCP WRITE payload has been received.</div><div class='add'>+	 * Otherwise return an exception via CHECK_CONDITION status.</div><div class='add'>+	 */</div><div class='add'>+	if (!cmd-&gt;write_data_transferred) {</div><div class='add'>+		/*</div><div class='add'>+		 * Check if se_cmd has already been aborted via LUN_RESET, and</div><div class='add'>+		 * waiting upon completion in tcm_qla2xxx_write_pending_status()</div><div class='add'>+		 */</div><div class='add'>+		spin_lock_irqsave(&amp;se_cmd-&gt;t_state_lock, flags);</div><div class='add'>+		if (se_cmd-&gt;transport_state &amp; CMD_T_ABORTED) {</div><div class='add'>+			spin_unlock_irqrestore(&amp;se_cmd-&gt;t_state_lock, flags);</div><div class='add'>+			complete(&amp;se_cmd-&gt;t_transport_stop_comp);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;se_cmd-&gt;t_state_lock, flags);</div><div class='add'>+</div><div class='add'>+		se_cmd-&gt;scsi_sense_reason = TCM_CHECK_CONDITION_ABORT_CMD;</div><div class='add'>+		INIT_WORK(&amp;cmd-&gt;work, tcm_qla2xxx_do_rsp);</div><div class='add'>+		queue_work(tcm_qla2xxx_free_wq, &amp;cmd-&gt;work);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * We now tell TCM to queue this WRITE CDB with TRANSPORT_PROCESS_WRITE</div><div class='add'>+	 * status to the backstore processing thread.</div><div class='add'>+	 */</div><div class='add'>+	return transport_generic_handle_data(&amp;cmd-&gt;se_cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called from qla_target.c:qlt_issue_task_mgmt()</div><div class='add'>+ */</div><div class='add'>+int tcm_qla2xxx_handle_tmr(struct qla_tgt_mgmt_cmd *mcmd, uint32_t lun,</div><div class='add'>+			uint8_t tmr_func, uint32_t tag)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_sess *sess = mcmd-&gt;sess;</div><div class='add'>+	struct se_cmd *se_cmd = &amp;mcmd-&gt;se_cmd;</div><div class='add'>+</div><div class='add'>+	return target_submit_tmr(se_cmd, sess-&gt;se_sess, NULL, lun, mcmd,</div><div class='add'>+			tmr_func, GFP_ATOMIC, tag, TARGET_SCF_ACK_KREF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_queue_data_in(struct se_cmd *se_cmd)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_cmd *cmd = container_of(se_cmd,</div><div class='add'>+				struct qla_tgt_cmd, se_cmd);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;bufflen = se_cmd-&gt;data_length;</div><div class='add'>+	cmd-&gt;dma_data_direction = tcm_qla2xxx_mapping_dir(se_cmd);</div><div class='add'>+	cmd-&gt;aborted = (se_cmd-&gt;transport_state &amp; CMD_T_ABORTED);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;sg_cnt = se_cmd-&gt;t_data_nents;</div><div class='add'>+	cmd-&gt;sg = se_cmd-&gt;t_data_sg;</div><div class='add'>+	cmd-&gt;offset = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Now queue completed DATA_IN the qla2xxx LLD and response ring</div><div class='add'>+	 */</div><div class='add'>+	return qlt_xmit_response(cmd, QLA_TGT_XMIT_DATA|QLA_TGT_XMIT_STATUS,</div><div class='add'>+				se_cmd-&gt;scsi_status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_queue_status(struct se_cmd *se_cmd)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt_cmd *cmd = container_of(se_cmd,</div><div class='add'>+				struct qla_tgt_cmd, se_cmd);</div><div class='add'>+	int xmit_type = QLA_TGT_XMIT_STATUS;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;bufflen = se_cmd-&gt;data_length;</div><div class='add'>+	cmd-&gt;sg = NULL;</div><div class='add'>+	cmd-&gt;sg_cnt = 0;</div><div class='add'>+	cmd-&gt;offset = 0;</div><div class='add'>+	cmd-&gt;dma_data_direction = tcm_qla2xxx_mapping_dir(se_cmd);</div><div class='add'>+	cmd-&gt;aborted = (se_cmd-&gt;transport_state &amp; CMD_T_ABORTED);</div><div class='add'>+</div><div class='add'>+	if (se_cmd-&gt;data_direction == DMA_FROM_DEVICE) {</div><div class='add'>+		/*</div><div class='add'>+		 * For FCP_READ with CHECK_CONDITION status, clear cmd-&gt;bufflen</div><div class='add'>+		 * for qla_tgt_xmit_response LLD code</div><div class='add'>+		 */</div><div class='add'>+		se_cmd-&gt;se_cmd_flags |= SCF_UNDERFLOW_BIT;</div><div class='add'>+		se_cmd-&gt;residual_count = se_cmd-&gt;data_length;</div><div class='add'>+</div><div class='add'>+		cmd-&gt;bufflen = 0;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Now queue status response to qla2xxx LLD code and response ring</div><div class='add'>+	 */</div><div class='add'>+	return qlt_xmit_response(cmd, xmit_type, se_cmd-&gt;scsi_status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_queue_tm_rsp(struct se_cmd *se_cmd)</div><div class='add'>+{</div><div class='add'>+	struct se_tmr_req *se_tmr = se_cmd-&gt;se_tmr_req;</div><div class='add'>+	struct qla_tgt_mgmt_cmd *mcmd = container_of(se_cmd,</div><div class='add'>+				struct qla_tgt_mgmt_cmd, se_cmd);</div><div class='add'>+</div><div class='add'>+	pr_debug("queue_tm_rsp: mcmd: %p func: 0x%02x response: 0x%02x\n",</div><div class='add'>+			mcmd, se_tmr-&gt;function, se_tmr-&gt;response);</div><div class='add'>+	/*</div><div class='add'>+	 * Do translation between TCM TM response codes and</div><div class='add'>+	 * QLA2xxx FC TM response codes.</div><div class='add'>+	 */</div><div class='add'>+	switch (se_tmr-&gt;response) {</div><div class='add'>+	case TMR_FUNCTION_COMPLETE:</div><div class='add'>+		mcmd-&gt;fc_tm_rsp = FC_TM_SUCCESS;</div><div class='add'>+		break;</div><div class='add'>+	case TMR_TASK_DOES_NOT_EXIST:</div><div class='add'>+		mcmd-&gt;fc_tm_rsp = FC_TM_BAD_CMD;</div><div class='add'>+		break;</div><div class='add'>+	case TMR_FUNCTION_REJECTED:</div><div class='add'>+		mcmd-&gt;fc_tm_rsp = FC_TM_REJECT;</div><div class='add'>+		break;</div><div class='add'>+	case TMR_LUN_DOES_NOT_EXIST:</div><div class='add'>+	default:</div><div class='add'>+		mcmd-&gt;fc_tm_rsp = FC_TM_FAILED;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Queue the TM response to QLA2xxx LLD to build a</div><div class='add'>+	 * CTIO response packet.</div><div class='add'>+	 */</div><div class='add'>+	qlt_xmit_tm_rsp(mcmd);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 tcm_qla2xxx_get_fabric_sense_len(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 tcm_qla2xxx_set_fabric_sense_len(struct se_cmd *se_cmd,</div><div class='add'>+					u32 sense_length)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Local pointer to allocated TCM configfs fabric module */</div><div class='add'>+struct target_fabric_configfs *tcm_qla2xxx_fabric_configfs;</div><div class='add'>+struct target_fabric_configfs *tcm_qla2xxx_npiv_fabric_configfs;</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_setup_nacl_from_rport(</div><div class='add'>+	struct se_portal_group *se_tpg,</div><div class='add'>+	struct se_node_acl *se_nacl,</div><div class='add'>+	struct tcm_qla2xxx_lport *lport,</div><div class='add'>+	struct tcm_qla2xxx_nacl *nacl,</div><div class='add'>+	u64 rport_wwnn)</div><div class='add'>+{</div><div class='add'>+	struct scsi_qla_host *vha = lport-&gt;qla_vha;</div><div class='add'>+	struct Scsi_Host *sh = vha-&gt;host;</div><div class='add'>+	struct fc_host_attrs *fc_host = shost_to_fc_host(sh);</div><div class='add'>+	struct fc_rport *rport;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	void *node;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Scan the existing rports, and create a session for the</div><div class='add'>+	 * explict NodeACL is an matching rport-&gt;node_name already</div><div class='add'>+	 * exists.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(sh-&gt;host_lock, flags);</div><div class='add'>+	list_for_each_entry(rport, &amp;fc_host-&gt;rports, peers) {</div><div class='add'>+		if (rport_wwnn != rport-&gt;node_name)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pr_debug("Located existing rport_wwpn and rport-&gt;node_name: 0x%016LX, port_id: 0x%04x\n",</div><div class='add'>+		    rport-&gt;node_name, rport-&gt;port_id);</div><div class='add'>+		nacl-&gt;nport_id = rport-&gt;port_id;</div><div class='add'>+</div><div class='add'>+		spin_unlock_irqrestore(sh-&gt;host_lock, flags);</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;vha-&gt;hw-&gt;hardware_lock, flags);</div><div class='add'>+		node = btree_lookup32(&amp;lport-&gt;lport_fcport_map, rport-&gt;port_id);</div><div class='add'>+		if (node) {</div><div class='add'>+			rc = btree_update32(&amp;lport-&gt;lport_fcport_map,</div><div class='add'>+					    rport-&gt;port_id, se_nacl);</div><div class='add'>+		} else {</div><div class='add'>+			rc = btree_insert32(&amp;lport-&gt;lport_fcport_map,</div><div class='add'>+					    rport-&gt;port_id, se_nacl,</div><div class='add'>+					    GFP_ATOMIC);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;vha-&gt;hw-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+		if (rc) {</div><div class='add'>+			pr_err("Unable to insert se_nacl into fcport_map");</div><div class='add'>+			WARN_ON(rc &gt; 0);</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pr_debug("Inserted into fcport_map: %p for WWNN: 0x%016LX, port_id: 0x%08x\n",</div><div class='add'>+		    se_nacl, rport_wwnn, nacl-&gt;nport_id);</div><div class='add'>+</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(sh-&gt;host_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Expected to be called with struct qla_hw_data-&gt;hardware_lock held</div><div class='add'>+ */</div><div class='add'>+static void tcm_qla2xxx_clear_nacl_from_fcport_map(struct qla_tgt_sess *sess)</div><div class='add'>+{</div><div class='add'>+	struct se_node_acl *se_nacl = sess-&gt;se_sess-&gt;se_node_acl;</div><div class='add'>+	struct se_portal_group *se_tpg = se_nacl-&gt;se_tpg;</div><div class='add'>+	struct se_wwn *se_wwn = se_tpg-&gt;se_tpg_wwn;</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = container_of(se_wwn,</div><div class='add'>+				struct tcm_qla2xxx_lport, lport_wwn);</div><div class='add'>+	struct tcm_qla2xxx_nacl *nacl = container_of(se_nacl,</div><div class='add'>+				struct tcm_qla2xxx_nacl, se_node_acl);</div><div class='add'>+	void *node;</div><div class='add'>+</div><div class='add'>+	pr_debug("fc_rport domain: port_id 0x%06x\n", nacl-&gt;nport_id);</div><div class='add'>+</div><div class='add'>+	node = btree_remove32(&amp;lport-&gt;lport_fcport_map, nacl-&gt;nport_id);</div><div class='add'>+	WARN_ON(node &amp;&amp; (node != se_nacl));</div><div class='add'>+</div><div class='add'>+	pr_debug("Removed from fcport_map: %p for WWNN: 0x%016LX, port_id: 0x%06x\n",</div><div class='add'>+	    se_nacl, nacl-&gt;nport_wwnn, nacl-&gt;nport_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_put_sess(struct qla_tgt_sess *sess)</div><div class='add'>+{</div><div class='add'>+	target_put_session(sess-&gt;se_sess);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_shutdown_sess(struct qla_tgt_sess *sess)</div><div class='add'>+{</div><div class='add'>+	tcm_qla2xxx_shutdown_session(sess-&gt;se_sess);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct se_node_acl *tcm_qla2xxx_make_nodeacl(</div><div class='add'>+	struct se_portal_group *se_tpg,</div><div class='add'>+	struct config_group *group,</div><div class='add'>+	const char *name)</div><div class='add'>+{</div><div class='add'>+	struct se_wwn *se_wwn = se_tpg-&gt;se_tpg_wwn;</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = container_of(se_wwn,</div><div class='add'>+				struct tcm_qla2xxx_lport, lport_wwn);</div><div class='add'>+	struct se_node_acl *se_nacl, *se_nacl_new;</div><div class='add'>+	struct tcm_qla2xxx_nacl *nacl;</div><div class='add'>+	u64 wwnn;</div><div class='add'>+	u32 qla2xxx_nexus_depth;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (tcm_qla2xxx_parse_wwn(name, &amp;wwnn, 1) &lt; 0)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	se_nacl_new = tcm_qla2xxx_alloc_fabric_acl(se_tpg);</div><div class='add'>+	if (!se_nacl_new)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+/* #warning FIXME: Hardcoded qla2xxx_nexus depth in tcm_qla2xxx_make_nodeacl */</div><div class='add'>+	qla2xxx_nexus_depth = 1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * se_nacl_new may be released by core_tpg_add_initiator_node_acl()</div><div class='add'>+	 * when converting a NodeACL from demo mode -&gt; explict</div><div class='add'>+	 */</div><div class='add'>+	se_nacl = core_tpg_add_initiator_node_acl(se_tpg, se_nacl_new,</div><div class='add'>+				name, qla2xxx_nexus_depth);</div><div class='add'>+	if (IS_ERR(se_nacl)) {</div><div class='add'>+		tcm_qla2xxx_release_fabric_acl(se_tpg, se_nacl_new);</div><div class='add'>+		return se_nacl;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Locate our struct tcm_qla2xxx_nacl and set the FC Nport WWPN</div><div class='add'>+	 */</div><div class='add'>+	nacl = container_of(se_nacl, struct tcm_qla2xxx_nacl, se_node_acl);</div><div class='add'>+	nacl-&gt;nport_wwnn = wwnn;</div><div class='add'>+	tcm_qla2xxx_format_wwn(&amp;nacl-&gt;nport_name[0], TCM_QLA2XXX_NAMELEN, wwnn);</div><div class='add'>+	/*</div><div class='add'>+	 * Setup a se_nacl handle based on an a matching struct fc_rport setup</div><div class='add'>+	 * via drivers/scsi/qla2xxx/qla_init.c:qla2x00_reg_remote_port()</div><div class='add'>+	 */</div><div class='add'>+	rc = tcm_qla2xxx_setup_nacl_from_rport(se_tpg, se_nacl, lport,</div><div class='add'>+					nacl, wwnn);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		tcm_qla2xxx_release_fabric_acl(se_tpg, se_nacl_new);</div><div class='add'>+		return ERR_PTR(rc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return se_nacl;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_drop_nodeacl(struct se_node_acl *se_acl)</div><div class='add'>+{</div><div class='add'>+	struct se_portal_group *se_tpg = se_acl-&gt;se_tpg;</div><div class='add'>+	struct tcm_qla2xxx_nacl *nacl = container_of(se_acl,</div><div class='add'>+				struct tcm_qla2xxx_nacl, se_node_acl);</div><div class='add'>+</div><div class='add'>+	core_tpg_del_initiator_node_acl(se_tpg, se_acl, 1);</div><div class='add'>+	kfree(nacl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Start items for tcm_qla2xxx_tpg_attrib_cit */</div><div class='add'>+</div><div class='add'>+#define DEF_QLA_TPG_ATTRIB(name)					\</div><div class='add'>+									\</div><div class='add'>+static ssize_t tcm_qla2xxx_tpg_attrib_show_##name(			\</div><div class='add'>+	struct se_portal_group *se_tpg,					\</div><div class='add'>+	char *page)							\</div><div class='add'>+{									\</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,		\</div><div class='add'>+			struct tcm_qla2xxx_tpg, se_tpg);		\</div><div class='add'>+									\</div><div class='add'>+	return sprintf(page, "%u\n", QLA_TPG_ATTRIB(tpg)-&gt;name);	\</div><div class='add'>+}									\</div><div class='add'>+									\</div><div class='add'>+static ssize_t tcm_qla2xxx_tpg_attrib_store_##name(			\</div><div class='add'>+	struct se_portal_group *se_tpg,					\</div><div class='add'>+	const char *page,						\</div><div class='add'>+	size_t count)							\</div><div class='add'>+{									\</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,		\</div><div class='add'>+			struct tcm_qla2xxx_tpg, se_tpg);		\</div><div class='add'>+	unsigned long val;						\</div><div class='add'>+	int ret;							\</div><div class='add'>+									\</div><div class='add'>+	ret = kstrtoul(page, 0, &amp;val);					\</div><div class='add'>+	if (ret &lt; 0) {							\</div><div class='add'>+		pr_err("kstrtoul() failed with"				\</div><div class='add'>+				" ret: %d\n", ret);			\</div><div class='add'>+		return -EINVAL;						\</div><div class='add'>+	}								\</div><div class='add'>+	ret = tcm_qla2xxx_set_attrib_##name(tpg, val);			\</div><div class='add'>+									\</div><div class='add'>+	return (!ret) ? count : -EINVAL;				\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define DEF_QLA_TPG_ATTR_BOOL(_name)					\</div><div class='add'>+									\</div><div class='add'>+static int tcm_qla2xxx_set_attrib_##_name(				\</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg,					\</div><div class='add'>+	unsigned long val)						\</div><div class='add'>+{									\</div><div class='add'>+	struct tcm_qla2xxx_tpg_attrib *a = &amp;tpg-&gt;tpg_attrib;		\</div><div class='add'>+									\</div><div class='add'>+	if ((val != 0) &amp;&amp; (val != 1)) {					\</div><div class='add'>+		pr_err("Illegal boolean value %lu\n", val);		\</div><div class='add'>+		return -EINVAL;						\</div><div class='add'>+	}								\</div><div class='add'>+									\</div><div class='add'>+	a-&gt;_name = val;							\</div><div class='add'>+	return 0;							\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define QLA_TPG_ATTR(_name, _mode) \</div><div class='add'>+	TF_TPG_ATTRIB_ATTR(tcm_qla2xxx, _name, _mode);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Define tcm_qla2xxx_tpg_attrib_s_generate_node_acls</div><div class='add'>+ */</div><div class='add'>+DEF_QLA_TPG_ATTR_BOOL(generate_node_acls);</div><div class='add'>+DEF_QLA_TPG_ATTRIB(generate_node_acls);</div><div class='add'>+QLA_TPG_ATTR(generate_node_acls, S_IRUGO | S_IWUSR);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ Define tcm_qla2xxx_attrib_s_cache_dynamic_acls</div><div class='add'>+ */</div><div class='add'>+DEF_QLA_TPG_ATTR_BOOL(cache_dynamic_acls);</div><div class='add'>+DEF_QLA_TPG_ATTRIB(cache_dynamic_acls);</div><div class='add'>+QLA_TPG_ATTR(cache_dynamic_acls, S_IRUGO | S_IWUSR);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Define tcm_qla2xxx_tpg_attrib_s_demo_mode_write_protect</div><div class='add'>+ */</div><div class='add'>+DEF_QLA_TPG_ATTR_BOOL(demo_mode_write_protect);</div><div class='add'>+DEF_QLA_TPG_ATTRIB(demo_mode_write_protect);</div><div class='add'>+QLA_TPG_ATTR(demo_mode_write_protect, S_IRUGO | S_IWUSR);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Define tcm_qla2xxx_tpg_attrib_s_prod_mode_write_protect</div><div class='add'>+ */</div><div class='add'>+DEF_QLA_TPG_ATTR_BOOL(prod_mode_write_protect);</div><div class='add'>+DEF_QLA_TPG_ATTRIB(prod_mode_write_protect);</div><div class='add'>+QLA_TPG_ATTR(prod_mode_write_protect, S_IRUGO | S_IWUSR);</div><div class='add'>+</div><div class='add'>+static struct configfs_attribute *tcm_qla2xxx_tpg_attrib_attrs[] = {</div><div class='add'>+	&amp;tcm_qla2xxx_tpg_attrib_generate_node_acls.attr,</div><div class='add'>+	&amp;tcm_qla2xxx_tpg_attrib_cache_dynamic_acls.attr,</div><div class='add'>+	&amp;tcm_qla2xxx_tpg_attrib_demo_mode_write_protect.attr,</div><div class='add'>+	&amp;tcm_qla2xxx_tpg_attrib_prod_mode_write_protect.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* End items for tcm_qla2xxx_tpg_attrib_cit */</div><div class='add'>+</div><div class='add'>+static ssize_t tcm_qla2xxx_tpg_show_enable(</div><div class='add'>+	struct se_portal_group *se_tpg,</div><div class='add'>+	char *page)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+			struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+</div><div class='add'>+	return snprintf(page, PAGE_SIZE, "%d\n",</div><div class='add'>+			atomic_read(&amp;tpg-&gt;lport_tpg_enabled));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t tcm_qla2xxx_tpg_store_enable(</div><div class='add'>+	struct se_portal_group *se_tpg,</div><div class='add'>+	const char *page,</div><div class='add'>+	size_t count)</div><div class='add'>+{</div><div class='add'>+	struct se_wwn *se_wwn = se_tpg-&gt;se_tpg_wwn;</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = container_of(se_wwn,</div><div class='add'>+			struct tcm_qla2xxx_lport, lport_wwn);</div><div class='add'>+	struct scsi_qla_host *vha = lport-&gt;qla_vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+			struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+	unsigned long op;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = kstrtoul(page, 0, &amp;op);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		pr_err("kstrtoul() returned %d\n", rc);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if ((op != 1) &amp;&amp; (op != 0)) {</div><div class='add'>+		pr_err("Illegal value for tpg_enable: %lu\n", op);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (op) {</div><div class='add'>+		atomic_set(&amp;tpg-&gt;lport_tpg_enabled, 1);</div><div class='add'>+		qlt_enable_vha(vha);</div><div class='add'>+	} else {</div><div class='add'>+		if (!ha-&gt;tgt.qla_tgt) {</div><div class='add'>+			pr_err("truct qla_hw_data *ha-&gt;tgt.qla_tgt is NULL\n");</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+		atomic_set(&amp;tpg-&gt;lport_tpg_enabled, 0);</div><div class='add'>+		qlt_stop_phase1(ha-&gt;tgt.qla_tgt);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+TF_TPG_BASE_ATTR(tcm_qla2xxx, enable, S_IRUGO | S_IWUSR);</div><div class='add'>+</div><div class='add'>+static struct configfs_attribute *tcm_qla2xxx_tpg_attrs[] = {</div><div class='add'>+	&amp;tcm_qla2xxx_tpg_enable.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct se_portal_group *tcm_qla2xxx_make_tpg(</div><div class='add'>+	struct se_wwn *wwn,</div><div class='add'>+	struct config_group *group,</div><div class='add'>+	const char *name)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = container_of(wwn,</div><div class='add'>+			struct tcm_qla2xxx_lport, lport_wwn);</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg;</div><div class='add'>+	unsigned long tpgt;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (strstr(name, "tpgt_") != name)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+	if (kstrtoul(name + 5, 10, &amp;tpgt) || tpgt &gt; USHRT_MAX)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	if (!lport-&gt;qla_npiv_vp &amp;&amp; (tpgt != 1)) {</div><div class='add'>+		pr_err("In non NPIV mode, a single TPG=1 is used for HW port mappings\n");</div><div class='add'>+		return ERR_PTR(-ENOSYS);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tpg = kzalloc(sizeof(struct tcm_qla2xxx_tpg), GFP_KERNEL);</div><div class='add'>+	if (!tpg) {</div><div class='add'>+		pr_err("Unable to allocate struct tcm_qla2xxx_tpg\n");</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+	tpg-&gt;lport = lport;</div><div class='add'>+	tpg-&gt;lport_tpgt = tpgt;</div><div class='add'>+	/*</div><div class='add'>+	 * By default allow READ-ONLY TPG demo-mode access w/ cached dynamic</div><div class='add'>+	 * NodeACLs</div><div class='add'>+	 */</div><div class='add'>+	QLA_TPG_ATTRIB(tpg)-&gt;generate_node_acls = 1;</div><div class='add'>+	QLA_TPG_ATTRIB(tpg)-&gt;demo_mode_write_protect = 1;</div><div class='add'>+	QLA_TPG_ATTRIB(tpg)-&gt;cache_dynamic_acls = 1;</div><div class='add'>+</div><div class='add'>+	ret = core_tpg_register(&amp;tcm_qla2xxx_fabric_configfs-&gt;tf_ops, wwn,</div><div class='add'>+				&amp;tpg-&gt;se_tpg, tpg, TRANSPORT_TPG_TYPE_NORMAL);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		kfree(tpg);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Setup local TPG=1 pointer for non NPIV mode.</div><div class='add'>+	 */</div><div class='add'>+	if (lport-&gt;qla_npiv_vp == NULL)</div><div class='add'>+		lport-&gt;tpg_1 = tpg;</div><div class='add'>+</div><div class='add'>+	return &amp;tpg-&gt;se_tpg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_drop_tpg(struct se_portal_group *se_tpg)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg = container_of(se_tpg,</div><div class='add'>+			struct tcm_qla2xxx_tpg, se_tpg);</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = tpg-&gt;lport;</div><div class='add'>+	struct scsi_qla_host *vha = lport-&gt;qla_vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	/*</div><div class='add'>+	 * Call into qla2x_target.c LLD logic to shutdown the active</div><div class='add'>+	 * FC Nexuses and disable target mode operation for this qla_hw_data</div><div class='add'>+	 */</div><div class='add'>+	if (ha-&gt;tgt.qla_tgt &amp;&amp; !ha-&gt;tgt.qla_tgt-&gt;tgt_stop)</div><div class='add'>+		qlt_stop_phase1(ha-&gt;tgt.qla_tgt);</div><div class='add'>+</div><div class='add'>+	core_tpg_deregister(se_tpg);</div><div class='add'>+	/*</div><div class='add'>+	 * Clear local TPG=1 pointer for non NPIV mode.</div><div class='add'>+	 */</div><div class='add'>+	if (lport-&gt;qla_npiv_vp == NULL)</div><div class='add'>+		lport-&gt;tpg_1 = NULL;</div><div class='add'>+</div><div class='add'>+	kfree(tpg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct se_portal_group *tcm_qla2xxx_npiv_make_tpg(</div><div class='add'>+	struct se_wwn *wwn,</div><div class='add'>+	struct config_group *group,</div><div class='add'>+	const char *name)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = container_of(wwn,</div><div class='add'>+			struct tcm_qla2xxx_lport, lport_wwn);</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg;</div><div class='add'>+	unsigned long tpgt;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (strstr(name, "tpgt_") != name)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+	if (kstrtoul(name + 5, 10, &amp;tpgt) || tpgt &gt; USHRT_MAX)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	tpg = kzalloc(sizeof(struct tcm_qla2xxx_tpg), GFP_KERNEL);</div><div class='add'>+	if (!tpg) {</div><div class='add'>+		pr_err("Unable to allocate struct tcm_qla2xxx_tpg\n");</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+	tpg-&gt;lport = lport;</div><div class='add'>+	tpg-&gt;lport_tpgt = tpgt;</div><div class='add'>+</div><div class='add'>+	ret = core_tpg_register(&amp;tcm_qla2xxx_npiv_fabric_configfs-&gt;tf_ops, wwn,</div><div class='add'>+				&amp;tpg-&gt;se_tpg, tpg, TRANSPORT_TPG_TYPE_NORMAL);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		kfree(tpg);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	return &amp;tpg-&gt;se_tpg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Expected to be called with struct qla_hw_data-&gt;hardware_lock held</div><div class='add'>+ */</div><div class='add'>+static struct qla_tgt_sess *tcm_qla2xxx_find_sess_by_s_id(</div><div class='add'>+	scsi_qla_host_t *vha,</div><div class='add'>+	const uint8_t *s_id)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct tcm_qla2xxx_lport *lport;</div><div class='add'>+	struct se_node_acl *se_nacl;</div><div class='add'>+	struct tcm_qla2xxx_nacl *nacl;</div><div class='add'>+	u32 key;</div><div class='add'>+</div><div class='add'>+	lport = ha-&gt;tgt.target_lport_ptr;</div><div class='add'>+	if (!lport) {</div><div class='add'>+		pr_err("Unable to locate struct tcm_qla2xxx_lport\n");</div><div class='add'>+		dump_stack();</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	key = (((unsigned long)s_id[0] &lt;&lt; 16) |</div><div class='add'>+	       ((unsigned long)s_id[1] &lt;&lt; 8) |</div><div class='add'>+	       (unsigned long)s_id[2]);</div><div class='add'>+	pr_debug("find_sess_by_s_id: 0x%06x\n", key);</div><div class='add'>+</div><div class='add'>+	se_nacl = btree_lookup32(&amp;lport-&gt;lport_fcport_map, key);</div><div class='add'>+	if (!se_nacl) {</div><div class='add'>+		pr_debug("Unable to locate s_id: 0x%06x\n", key);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	pr_debug("find_sess_by_s_id: located se_nacl: %p, initiatorname: %s\n",</div><div class='add'>+	    se_nacl, se_nacl-&gt;initiatorname);</div><div class='add'>+</div><div class='add'>+	nacl = container_of(se_nacl, struct tcm_qla2xxx_nacl, se_node_acl);</div><div class='add'>+	if (!nacl-&gt;qla_tgt_sess) {</div><div class='add'>+		pr_err("Unable to locate struct qla_tgt_sess\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return nacl-&gt;qla_tgt_sess;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Expected to be called with struct qla_hw_data-&gt;hardware_lock held</div><div class='add'>+ */</div><div class='add'>+static void tcm_qla2xxx_set_sess_by_s_id(</div><div class='add'>+	struct tcm_qla2xxx_lport *lport,</div><div class='add'>+	struct se_node_acl *new_se_nacl,</div><div class='add'>+	struct tcm_qla2xxx_nacl *nacl,</div><div class='add'>+	struct se_session *se_sess,</div><div class='add'>+	struct qla_tgt_sess *qla_tgt_sess,</div><div class='add'>+	uint8_t *s_id)</div><div class='add'>+{</div><div class='add'>+	u32 key;</div><div class='add'>+	void *slot;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	key = (((unsigned long)s_id[0] &lt;&lt; 16) |</div><div class='add'>+	       ((unsigned long)s_id[1] &lt;&lt; 8) |</div><div class='add'>+	       (unsigned long)s_id[2]);</div><div class='add'>+	pr_debug("set_sess_by_s_id: %06x\n", key);</div><div class='add'>+</div><div class='add'>+	slot = btree_lookup32(&amp;lport-&gt;lport_fcport_map, key);</div><div class='add'>+	if (!slot) {</div><div class='add'>+		if (new_se_nacl) {</div><div class='add'>+			pr_debug("Setting up new fc_port entry to new_se_nacl\n");</div><div class='add'>+			nacl-&gt;nport_id = key;</div><div class='add'>+			rc = btree_insert32(&amp;lport-&gt;lport_fcport_map, key,</div><div class='add'>+					new_se_nacl, GFP_ATOMIC);</div><div class='add'>+			if (rc)</div><div class='add'>+				printk(KERN_ERR "Unable to insert s_id into fcport_map: %06x\n",</div><div class='add'>+				    (int)key);</div><div class='add'>+		} else {</div><div class='add'>+			pr_debug("Wiping nonexisting fc_port entry\n");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		qla_tgt_sess-&gt;se_sess = se_sess;</div><div class='add'>+		nacl-&gt;qla_tgt_sess = qla_tgt_sess;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (nacl-&gt;qla_tgt_sess) {</div><div class='add'>+		if (new_se_nacl == NULL) {</div><div class='add'>+			pr_debug("Clearing existing nacl-&gt;qla_tgt_sess and fc_port entry\n");</div><div class='add'>+			btree_remove32(&amp;lport-&gt;lport_fcport_map, key);</div><div class='add'>+			nacl-&gt;qla_tgt_sess = NULL;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		pr_debug("Replacing existing nacl-&gt;qla_tgt_sess and fc_port entry\n");</div><div class='add'>+		btree_update32(&amp;lport-&gt;lport_fcport_map, key, new_se_nacl);</div><div class='add'>+		qla_tgt_sess-&gt;se_sess = se_sess;</div><div class='add'>+		nacl-&gt;qla_tgt_sess = qla_tgt_sess;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (new_se_nacl == NULL) {</div><div class='add'>+		pr_debug("Clearing existing fc_port entry\n");</div><div class='add'>+		btree_remove32(&amp;lport-&gt;lport_fcport_map, key);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_debug("Replacing existing fc_port entry w/o active nacl-&gt;qla_tgt_sess\n");</div><div class='add'>+	btree_update32(&amp;lport-&gt;lport_fcport_map, key, new_se_nacl);</div><div class='add'>+	qla_tgt_sess-&gt;se_sess = se_sess;</div><div class='add'>+	nacl-&gt;qla_tgt_sess = qla_tgt_sess;</div><div class='add'>+</div><div class='add'>+	pr_debug("Setup nacl-&gt;qla_tgt_sess %p by s_id for se_nacl: %p, initiatorname: %s\n",</div><div class='add'>+	    nacl-&gt;qla_tgt_sess, new_se_nacl, new_se_nacl-&gt;initiatorname);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Expected to be called with struct qla_hw_data-&gt;hardware_lock held</div><div class='add'>+ */</div><div class='add'>+static struct qla_tgt_sess *tcm_qla2xxx_find_sess_by_loop_id(</div><div class='add'>+	scsi_qla_host_t *vha,</div><div class='add'>+	const uint16_t loop_id)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct tcm_qla2xxx_lport *lport;</div><div class='add'>+	struct se_node_acl *se_nacl;</div><div class='add'>+	struct tcm_qla2xxx_nacl *nacl;</div><div class='add'>+	struct tcm_qla2xxx_fc_loopid *fc_loopid;</div><div class='add'>+</div><div class='add'>+	lport = ha-&gt;tgt.target_lport_ptr;</div><div class='add'>+	if (!lport) {</div><div class='add'>+		pr_err("Unable to locate struct tcm_qla2xxx_lport\n");</div><div class='add'>+		dump_stack();</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_debug("find_sess_by_loop_id: Using loop_id: 0x%04x\n", loop_id);</div><div class='add'>+</div><div class='add'>+	fc_loopid = lport-&gt;lport_loopid_map + loop_id;</div><div class='add'>+	se_nacl = fc_loopid-&gt;se_nacl;</div><div class='add'>+	if (!se_nacl) {</div><div class='add'>+		pr_debug("Unable to locate se_nacl by loop_id: 0x%04x\n",</div><div class='add'>+		    loop_id);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nacl = container_of(se_nacl, struct tcm_qla2xxx_nacl, se_node_acl);</div><div class='add'>+</div><div class='add'>+	if (!nacl-&gt;qla_tgt_sess) {</div><div class='add'>+		pr_err("Unable to locate struct qla_tgt_sess\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return nacl-&gt;qla_tgt_sess;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Expected to be called with struct qla_hw_data-&gt;hardware_lock held</div><div class='add'>+ */</div><div class='add'>+static void tcm_qla2xxx_set_sess_by_loop_id(</div><div class='add'>+	struct tcm_qla2xxx_lport *lport,</div><div class='add'>+	struct se_node_acl *new_se_nacl,</div><div class='add'>+	struct tcm_qla2xxx_nacl *nacl,</div><div class='add'>+	struct se_session *se_sess,</div><div class='add'>+	struct qla_tgt_sess *qla_tgt_sess,</div><div class='add'>+	uint16_t loop_id)</div><div class='add'>+{</div><div class='add'>+	struct se_node_acl *saved_nacl;</div><div class='add'>+	struct tcm_qla2xxx_fc_loopid *fc_loopid;</div><div class='add'>+</div><div class='add'>+	pr_debug("set_sess_by_loop_id: Using loop_id: 0x%04x\n", loop_id);</div><div class='add'>+</div><div class='add'>+	fc_loopid = &amp;((struct tcm_qla2xxx_fc_loopid *)</div><div class='add'>+			lport-&gt;lport_loopid_map)[loop_id];</div><div class='add'>+</div><div class='add'>+	saved_nacl = fc_loopid-&gt;se_nacl;</div><div class='add'>+	if (!saved_nacl) {</div><div class='add'>+		pr_debug("Setting up new fc_loopid-&gt;se_nacl to new_se_nacl\n");</div><div class='add'>+		fc_loopid-&gt;se_nacl = new_se_nacl;</div><div class='add'>+		if (qla_tgt_sess-&gt;se_sess != se_sess)</div><div class='add'>+			qla_tgt_sess-&gt;se_sess = se_sess;</div><div class='add'>+		if (nacl-&gt;qla_tgt_sess != qla_tgt_sess)</div><div class='add'>+			nacl-&gt;qla_tgt_sess = qla_tgt_sess;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (nacl-&gt;qla_tgt_sess) {</div><div class='add'>+		if (new_se_nacl == NULL) {</div><div class='add'>+			pr_debug("Clearing nacl-&gt;qla_tgt_sess and fc_loopid-&gt;se_nacl\n");</div><div class='add'>+			fc_loopid-&gt;se_nacl = NULL;</div><div class='add'>+			nacl-&gt;qla_tgt_sess = NULL;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pr_debug("Replacing existing nacl-&gt;qla_tgt_sess and fc_loopid-&gt;se_nacl\n");</div><div class='add'>+		fc_loopid-&gt;se_nacl = new_se_nacl;</div><div class='add'>+		if (qla_tgt_sess-&gt;se_sess != se_sess)</div><div class='add'>+			qla_tgt_sess-&gt;se_sess = se_sess;</div><div class='add'>+		if (nacl-&gt;qla_tgt_sess != qla_tgt_sess)</div><div class='add'>+			nacl-&gt;qla_tgt_sess = qla_tgt_sess;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (new_se_nacl == NULL) {</div><div class='add'>+		pr_debug("Clearing fc_loopid-&gt;se_nacl\n");</div><div class='add'>+		fc_loopid-&gt;se_nacl = NULL;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_debug("Replacing existing fc_loopid-&gt;se_nacl w/o active nacl-&gt;qla_tgt_sess\n");</div><div class='add'>+	fc_loopid-&gt;se_nacl = new_se_nacl;</div><div class='add'>+	if (qla_tgt_sess-&gt;se_sess != se_sess)</div><div class='add'>+		qla_tgt_sess-&gt;se_sess = se_sess;</div><div class='add'>+	if (nacl-&gt;qla_tgt_sess != qla_tgt_sess)</div><div class='add'>+		nacl-&gt;qla_tgt_sess = qla_tgt_sess;</div><div class='add'>+</div><div class='add'>+	pr_debug("Setup nacl-&gt;qla_tgt_sess %p by loop_id for se_nacl: %p, initiatorname: %s\n",</div><div class='add'>+	    nacl-&gt;qla_tgt_sess, new_se_nacl, new_se_nacl-&gt;initiatorname);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_free_session(struct qla_tgt_sess *sess)</div><div class='add'>+{</div><div class='add'>+	struct qla_tgt *tgt = sess-&gt;tgt;</div><div class='add'>+	struct qla_hw_data *ha = tgt-&gt;ha;</div><div class='add'>+	struct se_session *se_sess;</div><div class='add'>+	struct se_node_acl *se_nacl;</div><div class='add'>+	struct tcm_qla2xxx_lport *lport;</div><div class='add'>+	struct tcm_qla2xxx_nacl *nacl;</div><div class='add'>+	unsigned char be_sid[3];</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	BUG_ON(in_interrupt());</div><div class='add'>+</div><div class='add'>+	se_sess = sess-&gt;se_sess;</div><div class='add'>+	if (!se_sess) {</div><div class='add'>+		pr_err("struct qla_tgt_sess-&gt;se_sess is NULL\n");</div><div class='add'>+		dump_stack();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	se_nacl = se_sess-&gt;se_node_acl;</div><div class='add'>+	nacl = container_of(se_nacl, struct tcm_qla2xxx_nacl, se_node_acl);</div><div class='add'>+</div><div class='add'>+	lport = ha-&gt;tgt.target_lport_ptr;</div><div class='add'>+	if (!lport) {</div><div class='add'>+		pr_err("Unable to locate struct tcm_qla2xxx_lport\n");</div><div class='add'>+		dump_stack();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	target_wait_for_sess_cmds(se_sess, 0);</div><div class='add'>+	/*</div><div class='add'>+	 * And now clear the se_nacl and session pointers from our HW lport</div><div class='add'>+	 * mappings for fabric S_ID and LOOP_ID.</div><div class='add'>+	 */</div><div class='add'>+	memset(&amp;be_sid, 0, 3);</div><div class='add'>+	be_sid[0] = sess-&gt;s_id.b.domain;</div><div class='add'>+	be_sid[1] = sess-&gt;s_id.b.area;</div><div class='add'>+	be_sid[2] = sess-&gt;s_id.b.al_pa;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	tcm_qla2xxx_set_sess_by_s_id(lport, NULL, nacl, se_sess,</div><div class='add'>+			sess, be_sid);</div><div class='add'>+	tcm_qla2xxx_set_sess_by_loop_id(lport, NULL, nacl, se_sess,</div><div class='add'>+			sess, sess-&gt;loop_id);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='add'>+	transport_deregister_session_configfs(sess-&gt;se_sess);</div><div class='add'>+	transport_deregister_session(sess-&gt;se_sess);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Called via qlt_create_sess():ha-&gt;qla2x_tmpl-&gt;check_initiator_node_acl()</div><div class='add'>+ * to locate struct se_node_acl</div><div class='add'>+ */</div><div class='add'>+static int tcm_qla2xxx_check_initiator_node_acl(</div><div class='add'>+	scsi_qla_host_t *vha,</div><div class='add'>+	unsigned char *fc_wwpn,</div><div class='add'>+	void *qla_tgt_sess,</div><div class='add'>+	uint8_t *s_id,</div><div class='add'>+	uint16_t loop_id)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct tcm_qla2xxx_lport *lport;</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg;</div><div class='add'>+	struct tcm_qla2xxx_nacl *nacl;</div><div class='add'>+	struct se_portal_group *se_tpg;</div><div class='add'>+	struct se_node_acl *se_nacl;</div><div class='add'>+	struct se_session *se_sess;</div><div class='add'>+	struct qla_tgt_sess *sess = qla_tgt_sess;</div><div class='add'>+	unsigned char port_name[36];</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	lport = ha-&gt;tgt.target_lport_ptr;</div><div class='add'>+	if (!lport) {</div><div class='add'>+		pr_err("Unable to locate struct tcm_qla2xxx_lport\n");</div><div class='add'>+		dump_stack();</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Locate the TPG=1 reference..</div><div class='add'>+	 */</div><div class='add'>+	tpg = lport-&gt;tpg_1;</div><div class='add'>+	if (!tpg) {</div><div class='add'>+		pr_err("Unable to lcoate struct tcm_qla2xxx_lport-&gt;tpg_1\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	se_tpg = &amp;tpg-&gt;se_tpg;</div><div class='add'>+</div><div class='add'>+	se_sess = transport_init_session();</div><div class='add'>+	if (IS_ERR(se_sess)) {</div><div class='add'>+		pr_err("Unable to initialize struct se_session\n");</div><div class='add'>+		return PTR_ERR(se_sess);</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Format the FCP Initiator port_name into colon seperated values to</div><div class='add'>+	 * match the format by tcm_qla2xxx explict ConfigFS NodeACLs.</div><div class='add'>+	 */</div><div class='add'>+	memset(&amp;port_name, 0, 36);</div><div class='add'>+	snprintf(port_name, 36, "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",</div><div class='add'>+		fc_wwpn[0], fc_wwpn[1], fc_wwpn[2], fc_wwpn[3], fc_wwpn[4],</div><div class='add'>+		fc_wwpn[5], fc_wwpn[6], fc_wwpn[7]);</div><div class='add'>+	/*</div><div class='add'>+	 * Locate our struct se_node_acl either from an explict NodeACL created</div><div class='add'>+	 * via ConfigFS, or via running in TPG demo mode.</div><div class='add'>+	 */</div><div class='add'>+	se_sess-&gt;se_node_acl = core_tpg_check_initiator_node_acl(se_tpg,</div><div class='add'>+					port_name);</div><div class='add'>+	if (!se_sess-&gt;se_node_acl) {</div><div class='add'>+		transport_free_session(se_sess);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	se_nacl = se_sess-&gt;se_node_acl;</div><div class='add'>+	nacl = container_of(se_nacl, struct tcm_qla2xxx_nacl, se_node_acl);</div><div class='add'>+	/*</div><div class='add'>+	 * And now setup the new se_nacl and session pointers into our HW lport</div><div class='add'>+	 * mappings for fabric S_ID and LOOP_ID.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	tcm_qla2xxx_set_sess_by_s_id(lport, se_nacl, nacl, se_sess,</div><div class='add'>+			qla_tgt_sess, s_id);</div><div class='add'>+	tcm_qla2xxx_set_sess_by_loop_id(lport, se_nacl, nacl, se_sess,</div><div class='add'>+			qla_tgt_sess, loop_id);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+	/*</div><div class='add'>+	 * Finally register the new FC Nexus with TCM</div><div class='add'>+	 */</div><div class='add'>+	__transport_register_session(se_nacl-&gt;se_tpg, se_nacl, se_sess, sess);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Calls into tcm_qla2xxx used by qla2xxx LLD I/O path.</div><div class='add'>+ */</div><div class='add'>+static struct qla_tgt_func_tmpl tcm_qla2xxx_template = {</div><div class='add'>+	.handle_cmd		= tcm_qla2xxx_handle_cmd,</div><div class='add'>+	.handle_data		= tcm_qla2xxx_handle_data,</div><div class='add'>+	.handle_tmr		= tcm_qla2xxx_handle_tmr,</div><div class='add'>+	.free_cmd		= tcm_qla2xxx_free_cmd,</div><div class='add'>+	.free_mcmd		= tcm_qla2xxx_free_mcmd,</div><div class='add'>+	.free_session		= tcm_qla2xxx_free_session,</div><div class='add'>+	.check_initiator_node_acl = tcm_qla2xxx_check_initiator_node_acl,</div><div class='add'>+	.find_sess_by_s_id	= tcm_qla2xxx_find_sess_by_s_id,</div><div class='add'>+	.find_sess_by_loop_id	= tcm_qla2xxx_find_sess_by_loop_id,</div><div class='add'>+	.clear_nacl_from_fcport_map = tcm_qla2xxx_clear_nacl_from_fcport_map,</div><div class='add'>+	.put_sess		= tcm_qla2xxx_put_sess,</div><div class='add'>+	.shutdown_sess		= tcm_qla2xxx_shutdown_sess,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_init_lport(struct tcm_qla2xxx_lport *lport)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = btree_init32(&amp;lport-&gt;lport_fcport_map);</div><div class='add'>+	if (rc) {</div><div class='add'>+		pr_err("Unable to initialize lport-&gt;lport_fcport_map btree\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lport-&gt;lport_loopid_map = vmalloc(sizeof(struct tcm_qla2xxx_fc_loopid) *</div><div class='add'>+				65536);</div><div class='add'>+	if (!lport-&gt;lport_loopid_map) {</div><div class='add'>+		pr_err("Unable to allocate lport-&gt;lport_loopid_map of %zu bytes\n",</div><div class='add'>+		    sizeof(struct tcm_qla2xxx_fc_loopid) * 65536);</div><div class='add'>+		btree_destroy32(&amp;lport-&gt;lport_fcport_map);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	memset(lport-&gt;lport_loopid_map, 0, sizeof(struct tcm_qla2xxx_fc_loopid)</div><div class='add'>+	       * 65536);</div><div class='add'>+	pr_debug("qla2xxx: Allocated lport_loopid_map of %zu bytes\n",</div><div class='add'>+	       sizeof(struct tcm_qla2xxx_fc_loopid) * 65536);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_lport_register_cb(struct scsi_qla_host *vha)</div><div class='add'>+{</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct tcm_qla2xxx_lport *lport;</div><div class='add'>+	/*</div><div class='add'>+	 * Setup local pointer to vha, NPIV VP pointer (if present) and</div><div class='add'>+	 * vha-&gt;tcm_lport pointer</div><div class='add'>+	 */</div><div class='add'>+	lport = (struct tcm_qla2xxx_lport *)ha-&gt;tgt.target_lport_ptr;</div><div class='add'>+	lport-&gt;qla_vha = vha;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct se_wwn *tcm_qla2xxx_make_lport(</div><div class='add'>+	struct target_fabric_configfs *tf,</div><div class='add'>+	struct config_group *group,</div><div class='add'>+	const char *name)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_lport *lport;</div><div class='add'>+	u64 wwpn;</div><div class='add'>+	int ret = -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (tcm_qla2xxx_parse_wwn(name, &amp;wwpn, 1) &lt; 0)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	lport = kzalloc(sizeof(struct tcm_qla2xxx_lport), GFP_KERNEL);</div><div class='add'>+	if (!lport) {</div><div class='add'>+		pr_err("Unable to allocate struct tcm_qla2xxx_lport\n");</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+	lport-&gt;lport_wwpn = wwpn;</div><div class='add'>+	tcm_qla2xxx_format_wwn(&amp;lport-&gt;lport_name[0], TCM_QLA2XXX_NAMELEN,</div><div class='add'>+				wwpn);</div><div class='add'>+</div><div class='add'>+	ret = tcm_qla2xxx_init_lport(lport);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = qlt_lport_register(&amp;tcm_qla2xxx_template, wwpn,</div><div class='add'>+				tcm_qla2xxx_lport_register_cb, lport);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		goto out_lport;</div><div class='add'>+</div><div class='add'>+	return &amp;lport-&gt;lport_wwn;</div><div class='add'>+out_lport:</div><div class='add'>+	vfree(lport-&gt;lport_loopid_map);</div><div class='add'>+	btree_destroy32(&amp;lport-&gt;lport_fcport_map);</div><div class='add'>+out:</div><div class='add'>+	kfree(lport);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_drop_lport(struct se_wwn *wwn)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = container_of(wwn,</div><div class='add'>+			struct tcm_qla2xxx_lport, lport_wwn);</div><div class='add'>+	struct scsi_qla_host *vha = lport-&gt;qla_vha;</div><div class='add'>+	struct qla_hw_data *ha = vha-&gt;hw;</div><div class='add'>+	struct se_node_acl *node;</div><div class='add'>+	u32 key = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Call into qla2x_target.c LLD logic to complete the</div><div class='add'>+	 * shutdown of struct qla_tgt after the call to</div><div class='add'>+	 * qlt_stop_phase1() from tcm_qla2xxx_drop_tpg() above..</div><div class='add'>+	 */</div><div class='add'>+	if (ha-&gt;tgt.qla_tgt &amp;&amp; !ha-&gt;tgt.qla_tgt-&gt;tgt_stopped)</div><div class='add'>+		qlt_stop_phase2(ha-&gt;tgt.qla_tgt);</div><div class='add'>+</div><div class='add'>+	qlt_lport_deregister(vha);</div><div class='add'>+</div><div class='add'>+	vfree(lport-&gt;lport_loopid_map);</div><div class='add'>+	btree_for_each_safe32(&amp;lport-&gt;lport_fcport_map, key, node)</div><div class='add'>+		btree_remove32(&amp;lport-&gt;lport_fcport_map, key);</div><div class='add'>+	btree_destroy32(&amp;lport-&gt;lport_fcport_map);</div><div class='add'>+	kfree(lport);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct se_wwn *tcm_qla2xxx_npiv_make_lport(</div><div class='add'>+	struct target_fabric_configfs *tf,</div><div class='add'>+	struct config_group *group,</div><div class='add'>+	const char *name)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_lport *lport;</div><div class='add'>+	u64 npiv_wwpn, npiv_wwnn;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (tcm_qla2xxx_npiv_parse_wwn(name, strlen(name)+1,</div><div class='add'>+				&amp;npiv_wwpn, &amp;npiv_wwnn) &lt; 0)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	lport = kzalloc(sizeof(struct tcm_qla2xxx_lport), GFP_KERNEL);</div><div class='add'>+	if (!lport) {</div><div class='add'>+		pr_err("Unable to allocate struct tcm_qla2xxx_lport for NPIV\n");</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+	lport-&gt;lport_npiv_wwpn = npiv_wwpn;</div><div class='add'>+	lport-&gt;lport_npiv_wwnn = npiv_wwnn;</div><div class='add'>+	tcm_qla2xxx_npiv_format_wwn(&amp;lport-&gt;lport_npiv_name[0],</div><div class='add'>+			TCM_QLA2XXX_NAMELEN, npiv_wwpn, npiv_wwnn);</div><div class='add'>+</div><div class='add'>+/* FIXME: tcm_qla2xxx_npiv_make_lport */</div><div class='add'>+	ret = -ENOSYS;</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	return &amp;lport-&gt;lport_wwn;</div><div class='add'>+out:</div><div class='add'>+	kfree(lport);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_npiv_drop_lport(struct se_wwn *wwn)</div><div class='add'>+{</div><div class='add'>+	struct tcm_qla2xxx_lport *lport = container_of(wwn,</div><div class='add'>+			struct tcm_qla2xxx_lport, lport_wwn);</div><div class='add'>+	struct scsi_qla_host *vha = lport-&gt;qla_vha;</div><div class='add'>+	struct Scsi_Host *sh = vha-&gt;host;</div><div class='add'>+	/*</div><div class='add'>+	 * Notify libfc that we want to release the lport-&gt;npiv_vport</div><div class='add'>+	 */</div><div class='add'>+	fc_vport_terminate(lport-&gt;npiv_vport);</div><div class='add'>+</div><div class='add'>+	scsi_host_put(sh);</div><div class='add'>+	kfree(lport);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static ssize_t tcm_qla2xxx_wwn_show_attr_version(</div><div class='add'>+	struct target_fabric_configfs *tf,</div><div class='add'>+	char *page)</div><div class='add'>+{</div><div class='add'>+	return sprintf(page,</div><div class='add'>+	    "TCM QLOGIC QLA2XXX NPIV capable fabric module %s on %s/%s on "</div><div class='add'>+	    UTS_RELEASE"\n", TCM_QLA2XXX_VERSION, utsname()-&gt;sysname,</div><div class='add'>+	    utsname()-&gt;machine);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+TF_WWN_ATTR_RO(tcm_qla2xxx, version);</div><div class='add'>+</div><div class='add'>+static struct configfs_attribute *tcm_qla2xxx_wwn_attrs[] = {</div><div class='add'>+	&amp;tcm_qla2xxx_wwn_version.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct target_core_fabric_ops tcm_qla2xxx_ops = {</div><div class='add'>+	.get_fabric_name		= tcm_qla2xxx_get_fabric_name,</div><div class='add'>+	.get_fabric_proto_ident		= tcm_qla2xxx_get_fabric_proto_ident,</div><div class='add'>+	.tpg_get_wwn			= tcm_qla2xxx_get_fabric_wwn,</div><div class='add'>+	.tpg_get_tag			= tcm_qla2xxx_get_tag,</div><div class='add'>+	.tpg_get_default_depth		= tcm_qla2xxx_get_default_depth,</div><div class='add'>+	.tpg_get_pr_transport_id	= tcm_qla2xxx_get_pr_transport_id,</div><div class='add'>+	.tpg_get_pr_transport_id_len	= tcm_qla2xxx_get_pr_transport_id_len,</div><div class='add'>+	.tpg_parse_pr_out_transport_id	= tcm_qla2xxx_parse_pr_out_transport_id,</div><div class='add'>+	.tpg_check_demo_mode		= tcm_qla2xxx_check_demo_mode,</div><div class='add'>+	.tpg_check_demo_mode_cache	= tcm_qla2xxx_check_demo_mode_cache,</div><div class='add'>+	.tpg_check_demo_mode_write_protect =</div><div class='add'>+					tcm_qla2xxx_check_demo_write_protect,</div><div class='add'>+	.tpg_check_prod_mode_write_protect =</div><div class='add'>+					tcm_qla2xxx_check_prod_write_protect,</div><div class='add'>+	.tpg_check_demo_mode_login_only = tcm_qla2xxx_check_true,</div><div class='add'>+	.tpg_alloc_fabric_acl		= tcm_qla2xxx_alloc_fabric_acl,</div><div class='add'>+	.tpg_release_fabric_acl		= tcm_qla2xxx_release_fabric_acl,</div><div class='add'>+	.tpg_get_inst_index		= tcm_qla2xxx_tpg_get_inst_index,</div><div class='add'>+	.new_cmd_map			= NULL,</div><div class='add'>+	.check_stop_free		= tcm_qla2xxx_check_stop_free,</div><div class='add'>+	.release_cmd			= tcm_qla2xxx_release_cmd,</div><div class='add'>+	.shutdown_session		= tcm_qla2xxx_shutdown_session,</div><div class='add'>+	.close_session			= tcm_qla2xxx_close_session,</div><div class='add'>+	.sess_get_index			= tcm_qla2xxx_sess_get_index,</div><div class='add'>+	.sess_get_initiator_sid		= NULL,</div><div class='add'>+	.write_pending			= tcm_qla2xxx_write_pending,</div><div class='add'>+	.write_pending_status		= tcm_qla2xxx_write_pending_status,</div><div class='add'>+	.set_default_node_attributes	= tcm_qla2xxx_set_default_node_attrs,</div><div class='add'>+	.get_task_tag			= tcm_qla2xxx_get_task_tag,</div><div class='add'>+	.get_cmd_state			= tcm_qla2xxx_get_cmd_state,</div><div class='add'>+	.queue_data_in			= tcm_qla2xxx_queue_data_in,</div><div class='add'>+	.queue_status			= tcm_qla2xxx_queue_status,</div><div class='add'>+	.queue_tm_rsp			= tcm_qla2xxx_queue_tm_rsp,</div><div class='add'>+	.get_fabric_sense_len		= tcm_qla2xxx_get_fabric_sense_len,</div><div class='add'>+	.set_fabric_sense_len		= tcm_qla2xxx_set_fabric_sense_len,</div><div class='add'>+	/*</div><div class='add'>+	 * Setup function pointers for generic logic in</div><div class='add'>+	 * target_core_fabric_configfs.c</div><div class='add'>+	 */</div><div class='add'>+	.fabric_make_wwn		= tcm_qla2xxx_make_lport,</div><div class='add'>+	.fabric_drop_wwn		= tcm_qla2xxx_drop_lport,</div><div class='add'>+	.fabric_make_tpg		= tcm_qla2xxx_make_tpg,</div><div class='add'>+	.fabric_drop_tpg		= tcm_qla2xxx_drop_tpg,</div><div class='add'>+	.fabric_post_link		= NULL,</div><div class='add'>+	.fabric_pre_unlink		= NULL,</div><div class='add'>+	.fabric_make_np			= NULL,</div><div class='add'>+	.fabric_drop_np			= NULL,</div><div class='add'>+	.fabric_make_nodeacl		= tcm_qla2xxx_make_nodeacl,</div><div class='add'>+	.fabric_drop_nodeacl		= tcm_qla2xxx_drop_nodeacl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct target_core_fabric_ops tcm_qla2xxx_npiv_ops = {</div><div class='add'>+	.get_fabric_name		= tcm_qla2xxx_npiv_get_fabric_name,</div><div class='add'>+	.get_fabric_proto_ident		= tcm_qla2xxx_get_fabric_proto_ident,</div><div class='add'>+	.tpg_get_wwn			= tcm_qla2xxx_npiv_get_fabric_wwn,</div><div class='add'>+	.tpg_get_tag			= tcm_qla2xxx_get_tag,</div><div class='add'>+	.tpg_get_default_depth		= tcm_qla2xxx_get_default_depth,</div><div class='add'>+	.tpg_get_pr_transport_id	= tcm_qla2xxx_get_pr_transport_id,</div><div class='add'>+	.tpg_get_pr_transport_id_len	= tcm_qla2xxx_get_pr_transport_id_len,</div><div class='add'>+	.tpg_parse_pr_out_transport_id	= tcm_qla2xxx_parse_pr_out_transport_id,</div><div class='add'>+	.tpg_check_demo_mode		= tcm_qla2xxx_check_false,</div><div class='add'>+	.tpg_check_demo_mode_cache	= tcm_qla2xxx_check_true,</div><div class='add'>+	.tpg_check_demo_mode_write_protect = tcm_qla2xxx_check_true,</div><div class='add'>+	.tpg_check_prod_mode_write_protect = tcm_qla2xxx_check_false,</div><div class='add'>+	.tpg_check_demo_mode_login_only	= tcm_qla2xxx_check_true,</div><div class='add'>+	.tpg_alloc_fabric_acl		= tcm_qla2xxx_alloc_fabric_acl,</div><div class='add'>+	.tpg_release_fabric_acl		= tcm_qla2xxx_release_fabric_acl,</div><div class='add'>+	.tpg_get_inst_index		= tcm_qla2xxx_tpg_get_inst_index,</div><div class='add'>+	.release_cmd			= tcm_qla2xxx_release_cmd,</div><div class='add'>+	.shutdown_session		= tcm_qla2xxx_shutdown_session,</div><div class='add'>+	.close_session			= tcm_qla2xxx_close_session,</div><div class='add'>+	.sess_get_index			= tcm_qla2xxx_sess_get_index,</div><div class='add'>+	.sess_get_initiator_sid		= NULL,</div><div class='add'>+	.write_pending			= tcm_qla2xxx_write_pending,</div><div class='add'>+	.write_pending_status		= tcm_qla2xxx_write_pending_status,</div><div class='add'>+	.set_default_node_attributes	= tcm_qla2xxx_set_default_node_attrs,</div><div class='add'>+	.get_task_tag			= tcm_qla2xxx_get_task_tag,</div><div class='add'>+	.get_cmd_state			= tcm_qla2xxx_get_cmd_state,</div><div class='add'>+	.queue_data_in			= tcm_qla2xxx_queue_data_in,</div><div class='add'>+	.queue_status			= tcm_qla2xxx_queue_status,</div><div class='add'>+	.queue_tm_rsp			= tcm_qla2xxx_queue_tm_rsp,</div><div class='add'>+	.get_fabric_sense_len		= tcm_qla2xxx_get_fabric_sense_len,</div><div class='add'>+	.set_fabric_sense_len		= tcm_qla2xxx_set_fabric_sense_len,</div><div class='add'>+	/*</div><div class='add'>+	 * Setup function pointers for generic logic in</div><div class='add'>+	 * target_core_fabric_configfs.c</div><div class='add'>+	 */</div><div class='add'>+	.fabric_make_wwn		= tcm_qla2xxx_npiv_make_lport,</div><div class='add'>+	.fabric_drop_wwn		= tcm_qla2xxx_npiv_drop_lport,</div><div class='add'>+	.fabric_make_tpg		= tcm_qla2xxx_npiv_make_tpg,</div><div class='add'>+	.fabric_drop_tpg		= tcm_qla2xxx_drop_tpg,</div><div class='add'>+	.fabric_post_link		= NULL,</div><div class='add'>+	.fabric_pre_unlink		= NULL,</div><div class='add'>+	.fabric_make_np			= NULL,</div><div class='add'>+	.fabric_drop_np			= NULL,</div><div class='add'>+	.fabric_make_nodeacl		= tcm_qla2xxx_make_nodeacl,</div><div class='add'>+	.fabric_drop_nodeacl		= tcm_qla2xxx_drop_nodeacl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tcm_qla2xxx_register_configfs(void)</div><div class='add'>+{</div><div class='add'>+	struct target_fabric_configfs *fabric, *npiv_fabric;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pr_debug("TCM QLOGIC QLA2XXX fabric module %s on %s/%s on "</div><div class='add'>+	    UTS_RELEASE"\n", TCM_QLA2XXX_VERSION, utsname()-&gt;sysname,</div><div class='add'>+	    utsname()-&gt;machine);</div><div class='add'>+	/*</div><div class='add'>+	 * Register the top level struct config_item_type with TCM core</div><div class='add'>+	 */</div><div class='add'>+	fabric = target_fabric_configfs_init(THIS_MODULE, "qla2xxx");</div><div class='add'>+	if (IS_ERR(fabric)) {</div><div class='add'>+		pr_err("target_fabric_configfs_init() failed\n");</div><div class='add'>+		return PTR_ERR(fabric);</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Setup fabric-&gt;tf_ops from our local tcm_qla2xxx_ops</div><div class='add'>+	 */</div><div class='add'>+	fabric-&gt;tf_ops = tcm_qla2xxx_ops;</div><div class='add'>+	/*</div><div class='add'>+	 * Setup default attribute lists for various fabric-&gt;tf_cit_tmpl</div><div class='add'>+	 */</div><div class='add'>+	TF_CIT_TMPL(fabric)-&gt;tfc_wwn_cit.ct_attrs = tcm_qla2xxx_wwn_attrs;</div><div class='add'>+	TF_CIT_TMPL(fabric)-&gt;tfc_tpg_base_cit.ct_attrs = tcm_qla2xxx_tpg_attrs;</div><div class='add'>+	TF_CIT_TMPL(fabric)-&gt;tfc_tpg_attrib_cit.ct_attrs =</div><div class='add'>+						tcm_qla2xxx_tpg_attrib_attrs;</div><div class='add'>+	TF_CIT_TMPL(fabric)-&gt;tfc_tpg_param_cit.ct_attrs = NULL;</div><div class='add'>+	TF_CIT_TMPL(fabric)-&gt;tfc_tpg_np_base_cit.ct_attrs = NULL;</div><div class='add'>+	TF_CIT_TMPL(fabric)-&gt;tfc_tpg_nacl_base_cit.ct_attrs = NULL;</div><div class='add'>+	TF_CIT_TMPL(fabric)-&gt;tfc_tpg_nacl_attrib_cit.ct_attrs = NULL;</div><div class='add'>+	TF_CIT_TMPL(fabric)-&gt;tfc_tpg_nacl_auth_cit.ct_attrs = NULL;</div><div class='add'>+	TF_CIT_TMPL(fabric)-&gt;tfc_tpg_nacl_param_cit.ct_attrs = NULL;</div><div class='add'>+	/*</div><div class='add'>+	 * Register the fabric for use within TCM</div><div class='add'>+	 */</div><div class='add'>+	ret = target_fabric_configfs_register(fabric);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pr_err("target_fabric_configfs_register() failed for TCM_QLA2XXX\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Setup our local pointer to *fabric</div><div class='add'>+	 */</div><div class='add'>+	tcm_qla2xxx_fabric_configfs = fabric;</div><div class='add'>+	pr_debug("TCM_QLA2XXX[0] - Set fabric -&gt; tcm_qla2xxx_fabric_configfs\n");</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Register the top level struct config_item_type for NPIV with TCM core</div><div class='add'>+	 */</div><div class='add'>+	npiv_fabric = target_fabric_configfs_init(THIS_MODULE, "qla2xxx_npiv");</div><div class='add'>+	if (IS_ERR(npiv_fabric)) {</div><div class='add'>+		pr_err("target_fabric_configfs_init() failed\n");</div><div class='add'>+		ret = PTR_ERR(npiv_fabric);</div><div class='add'>+		goto out_fabric;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Setup fabric-&gt;tf_ops from our local tcm_qla2xxx_npiv_ops</div><div class='add'>+	 */</div><div class='add'>+	npiv_fabric-&gt;tf_ops = tcm_qla2xxx_npiv_ops;</div><div class='add'>+	/*</div><div class='add'>+	 * Setup default attribute lists for various npiv_fabric-&gt;tf_cit_tmpl</div><div class='add'>+	 */</div><div class='add'>+	TF_CIT_TMPL(npiv_fabric)-&gt;tfc_wwn_cit.ct_attrs = tcm_qla2xxx_wwn_attrs;</div><div class='add'>+	TF_CIT_TMPL(npiv_fabric)-&gt;tfc_tpg_base_cit.ct_attrs = NULL;</div><div class='add'>+	TF_CIT_TMPL(npiv_fabric)-&gt;tfc_tpg_attrib_cit.ct_attrs = NULL;</div><div class='add'>+	TF_CIT_TMPL(npiv_fabric)-&gt;tfc_tpg_param_cit.ct_attrs = NULL;</div><div class='add'>+	TF_CIT_TMPL(npiv_fabric)-&gt;tfc_tpg_np_base_cit.ct_attrs = NULL;</div><div class='add'>+	TF_CIT_TMPL(npiv_fabric)-&gt;tfc_tpg_nacl_base_cit.ct_attrs = NULL;</div><div class='add'>+	TF_CIT_TMPL(npiv_fabric)-&gt;tfc_tpg_nacl_attrib_cit.ct_attrs = NULL;</div><div class='add'>+	TF_CIT_TMPL(npiv_fabric)-&gt;tfc_tpg_nacl_auth_cit.ct_attrs = NULL;</div><div class='add'>+	TF_CIT_TMPL(npiv_fabric)-&gt;tfc_tpg_nacl_param_cit.ct_attrs = NULL;</div><div class='add'>+	/*</div><div class='add'>+	 * Register the npiv_fabric for use within TCM</div><div class='add'>+	 */</div><div class='add'>+	ret = target_fabric_configfs_register(npiv_fabric);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pr_err("target_fabric_configfs_register() failed for TCM_QLA2XXX\n");</div><div class='add'>+		goto out_fabric;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Setup our local pointer to *npiv_fabric</div><div class='add'>+	 */</div><div class='add'>+	tcm_qla2xxx_npiv_fabric_configfs = npiv_fabric;</div><div class='add'>+	pr_debug("TCM_QLA2XXX[0] - Set fabric -&gt; tcm_qla2xxx_npiv_fabric_configfs\n");</div><div class='add'>+</div><div class='add'>+	tcm_qla2xxx_free_wq = alloc_workqueue("tcm_qla2xxx_free",</div><div class='add'>+						WQ_MEM_RECLAIM, 0);</div><div class='add'>+	if (!tcm_qla2xxx_free_wq) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_fabric_npiv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tcm_qla2xxx_cmd_wq = alloc_workqueue("tcm_qla2xxx_cmd", 0, 0);</div><div class='add'>+	if (!tcm_qla2xxx_cmd_wq) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_free_wq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_free_wq:</div><div class='add'>+	destroy_workqueue(tcm_qla2xxx_free_wq);</div><div class='add'>+out_fabric_npiv:</div><div class='add'>+	target_fabric_configfs_deregister(tcm_qla2xxx_npiv_fabric_configfs);</div><div class='add'>+out_fabric:</div><div class='add'>+	target_fabric_configfs_deregister(tcm_qla2xxx_fabric_configfs);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcm_qla2xxx_deregister_configfs(void)</div><div class='add'>+{</div><div class='add'>+	destroy_workqueue(tcm_qla2xxx_cmd_wq);</div><div class='add'>+	destroy_workqueue(tcm_qla2xxx_free_wq);</div><div class='add'>+</div><div class='add'>+	target_fabric_configfs_deregister(tcm_qla2xxx_fabric_configfs);</div><div class='add'>+	tcm_qla2xxx_fabric_configfs = NULL;</div><div class='add'>+	pr_debug("TCM_QLA2XXX[0] - Cleared tcm_qla2xxx_fabric_configfs\n");</div><div class='add'>+</div><div class='add'>+	target_fabric_configfs_deregister(tcm_qla2xxx_npiv_fabric_configfs);</div><div class='add'>+	tcm_qla2xxx_npiv_fabric_configfs = NULL;</div><div class='add'>+	pr_debug("TCM_QLA2XXX[0] - Cleared tcm_qla2xxx_npiv_fabric_configfs\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init tcm_qla2xxx_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = tcm_qla2xxx_register_configfs();</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit tcm_qla2xxx_exit(void)</div><div class='add'>+{</div><div class='add'>+	tcm_qla2xxx_deregister_configfs();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("TCM QLA2XXX series NPIV enabled fabric driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+module_init(tcm_qla2xxx_init);</div><div class='add'>+module_exit(tcm_qla2xxx_exit);</div><div class='head'>diff --git a/drivers/scsi/qla2xxx/tcm_qla2xxx.h b/drivers/scsi/qla2xxx/tcm_qla2xxx.h<br/>new file mode 100644<br/>index 000000000000..825498103352<br/>--- /dev/null<br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla2xxx/tcm_qla2xxx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla2xxx/tcm_qla2xxx.h</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+#include &lt;target/target_core_base.h&gt;</div><div class='add'>+#include &lt;linux/btree.h&gt;</div><div class='add'>+</div><div class='add'>+#define TCM_QLA2XXX_VERSION	"v0.1"</div><div class='add'>+/* length of ASCII WWPNs including pad */</div><div class='add'>+#define TCM_QLA2XXX_NAMELEN	32</div><div class='add'>+/* lenth of ASCII NPIV 'WWPN+WWNN' including pad */</div><div class='add'>+#define TCM_QLA2XXX_NPIV_NAMELEN 66</div><div class='add'>+</div><div class='add'>+#include "qla_target.h"</div><div class='add'>+</div><div class='add'>+struct tcm_qla2xxx_nacl {</div><div class='add'>+	/* From libfc struct fc_rport-&gt;port_id */</div><div class='add'>+	u32 nport_id;</div><div class='add'>+	/* Binary World Wide unique Node Name for remote FC Initiator Nport */</div><div class='add'>+	u64 nport_wwnn;</div><div class='add'>+	/* ASCII formatted WWPN for FC Initiator Nport */</div><div class='add'>+	char nport_name[TCM_QLA2XXX_NAMELEN];</div><div class='add'>+	/* Pointer to qla_tgt_sess */</div><div class='add'>+	struct qla_tgt_sess *qla_tgt_sess;</div><div class='add'>+	/* Pointer to TCM FC nexus */</div><div class='add'>+	struct se_session *nport_nexus;</div><div class='add'>+	/* Returned by tcm_qla2xxx_make_nodeacl() */</div><div class='add'>+	struct se_node_acl se_node_acl;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tcm_qla2xxx_tpg_attrib {</div><div class='add'>+	int generate_node_acls;</div><div class='add'>+	int cache_dynamic_acls;</div><div class='add'>+	int demo_mode_write_protect;</div><div class='add'>+	int prod_mode_write_protect;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tcm_qla2xxx_tpg {</div><div class='add'>+	/* FC lport target portal group tag for TCM */</div><div class='add'>+	u16 lport_tpgt;</div><div class='add'>+	/* Atomic bit to determine TPG active status */</div><div class='add'>+	atomic_t lport_tpg_enabled;</div><div class='add'>+	/* Pointer back to tcm_qla2xxx_lport */</div><div class='add'>+	struct tcm_qla2xxx_lport *lport;</div><div class='add'>+	/* Used by tcm_qla2xxx_tpg_attrib_cit */</div><div class='add'>+	struct tcm_qla2xxx_tpg_attrib tpg_attrib;</div><div class='add'>+	/* Returned by tcm_qla2xxx_make_tpg() */</div><div class='add'>+	struct se_portal_group se_tpg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define QLA_TPG_ATTRIB(tpg)	(&amp;(tpg)-&gt;tpg_attrib)</div><div class='add'>+</div><div class='add'>+struct tcm_qla2xxx_fc_loopid {</div><div class='add'>+	struct se_node_acl *se_nacl;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tcm_qla2xxx_lport {</div><div class='add'>+	/* SCSI protocol the lport is providing */</div><div class='add'>+	u8 lport_proto_id;</div><div class='add'>+	/* Binary World Wide unique Port Name for FC Target Lport */</div><div class='add'>+	u64 lport_wwpn;</div><div class='add'>+	/* Binary World Wide unique Port Name for FC NPIV Target Lport */</div><div class='add'>+	u64 lport_npiv_wwpn;</div><div class='add'>+	/* Binary World Wide unique Node Name for FC NPIV Target Lport */</div><div class='add'>+	u64 lport_npiv_wwnn;</div><div class='add'>+	/* ASCII formatted WWPN for FC Target Lport */</div><div class='add'>+	char lport_name[TCM_QLA2XXX_NAMELEN];</div><div class='add'>+	/* ASCII formatted WWPN+WWNN for NPIV FC Target Lport */</div><div class='add'>+	char lport_npiv_name[TCM_QLA2XXX_NPIV_NAMELEN];</div><div class='add'>+	/* map for fc_port pointers in 24-bit FC Port ID space */</div><div class='add'>+	struct btree_head32 lport_fcport_map;</div><div class='add'>+	/* vmalloc-ed memory for fc_port pointers for 16-bit FC loop ID */</div><div class='add'>+	struct tcm_qla2xxx_fc_loopid *lport_loopid_map;</div><div class='add'>+	/* Pointer to struct scsi_qla_host from qla2xxx LLD */</div><div class='add'>+	struct scsi_qla_host *qla_vha;</div><div class='add'>+	/* Pointer to struct scsi_qla_host for NPIV VP from qla2xxx LLD */</div><div class='add'>+	struct scsi_qla_host *qla_npiv_vp;</div><div class='add'>+	/* Pointer to struct qla_tgt pointer */</div><div class='add'>+	struct qla_tgt lport_qla_tgt;</div><div class='add'>+	/* Pointer to struct fc_vport for NPIV vport from libfc */</div><div class='add'>+	struct fc_vport *npiv_vport;</div><div class='add'>+	/* Pointer to TPG=1 for non NPIV mode */</div><div class='add'>+	struct tcm_qla2xxx_tpg *tpg_1;</div><div class='add'>+	/* Returned by tcm_qla2xxx_make_lport() */</div><div class='add'>+	struct se_wwn lport_wwn;</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/scsi/qla4xxx/ql4_attr.c b/drivers/scsi/qla4xxx/ql4_attr.c<br/>index 0b0a7d42137d..c681b2a355e1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_attr.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla4xxx/ql4_attr.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_attr.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_attr.c</a></div><div class='hunk'>@@ -9,6 +9,140 @@</div><div class='ctx'> #include "ql4_glbl.h"</div><div class='ctx'> #include "ql4_dbg.h"</div><div class='ctx'> </div><div class='add'>+static ssize_t</div><div class='add'>+qla4_8xxx_sysfs_read_fw_dump(struct file *filep, struct kobject *kobj,</div><div class='add'>+			     struct bin_attribute *ba, char *buf, loff_t off,</div><div class='add'>+			     size_t count)</div><div class='add'>+{</div><div class='add'>+	struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj,</div><div class='add'>+					       struct device, kobj)));</div><div class='add'>+</div><div class='add'>+	if (!is_qla8022(ha))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(AF_82XX_DUMP_READING, &amp;ha-&gt;flags))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return memory_read_from_buffer(buf, count, &amp;off, ha-&gt;fw_dump,</div><div class='add'>+				       ha-&gt;fw_dump_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+qla4_8xxx_sysfs_write_fw_dump(struct file *filep, struct kobject *kobj,</div><div class='add'>+			      struct bin_attribute *ba, char *buf, loff_t off,</div><div class='add'>+			      size_t count)</div><div class='add'>+{</div><div class='add'>+	struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj,</div><div class='add'>+					       struct device, kobj)));</div><div class='add'>+	uint32_t dev_state;</div><div class='add'>+	long reading;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!is_qla8022(ha))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (off != 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	buf[1] = 0;</div><div class='add'>+	ret = kstrtol(buf, 10, &amp;reading);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ql4_printk(KERN_ERR, ha, "%s: Invalid input. Return err %d\n",</div><div class='add'>+			   __func__, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (reading) {</div><div class='add'>+	case 0:</div><div class='add'>+		/* clear dump collection flags */</div><div class='add'>+		if (test_and_clear_bit(AF_82XX_DUMP_READING, &amp;ha-&gt;flags)) {</div><div class='add'>+			clear_bit(AF_82XX_FW_DUMPED, &amp;ha-&gt;flags);</div><div class='add'>+			/* Reload minidump template */</div><div class='add'>+			qla4xxx_alloc_fw_dump(ha);</div><div class='add'>+			DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+					  "Firmware template reloaded\n"));</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		/* Set flag to read dump */</div><div class='add'>+		if (test_bit(AF_82XX_FW_DUMPED, &amp;ha-&gt;flags) &amp;&amp;</div><div class='add'>+		    !test_bit(AF_82XX_DUMP_READING, &amp;ha-&gt;flags)) {</div><div class='add'>+			set_bit(AF_82XX_DUMP_READING, &amp;ha-&gt;flags);</div><div class='add'>+			DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+					  "Raw firmware dump ready for read on (%ld).\n",</div><div class='add'>+					  ha-&gt;host_no));</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		/* Reset HBA */</div><div class='add'>+		qla4_8xxx_idc_lock(ha);</div><div class='add'>+		dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);</div><div class='add'>+		if (dev_state == QLA82XX_DEV_READY) {</div><div class='add'>+			ql4_printk(KERN_INFO, ha,</div><div class='add'>+				   "%s: Setting Need reset, reset_owner is 0x%x.\n",</div><div class='add'>+				   __func__, ha-&gt;func_num);</div><div class='add'>+			qla4_8xxx_wr_32(ha, QLA82XX_CRB_DEV_STATE,</div><div class='add'>+					QLA82XX_DEV_NEED_RESET);</div><div class='add'>+			set_bit(AF_82XX_RST_OWNER, &amp;ha-&gt;flags);</div><div class='add'>+		} else</div><div class='add'>+			ql4_printk(KERN_INFO, ha,</div><div class='add'>+				   "%s: Reset not performed as device state is 0x%x\n",</div><div class='add'>+				   __func__, dev_state);</div><div class='add'>+</div><div class='add'>+		qla4_8xxx_idc_unlock(ha);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* do nothing */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct bin_attribute sysfs_fw_dump_attr = {</div><div class='add'>+	.attr = {</div><div class='add'>+		.name = "fw_dump",</div><div class='add'>+		.mode = S_IRUSR | S_IWUSR,</div><div class='add'>+	},</div><div class='add'>+	.size = 0,</div><div class='add'>+	.read = qla4_8xxx_sysfs_read_fw_dump,</div><div class='add'>+	.write = qla4_8xxx_sysfs_write_fw_dump,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sysfs_entry {</div><div class='add'>+	char *name;</div><div class='add'>+	struct bin_attribute *attr;</div><div class='add'>+} bin_file_entries[] = {</div><div class='add'>+	{ "fw_dump", &amp;sysfs_fw_dump_attr },</div><div class='add'>+	{ NULL },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void qla4_8xxx_alloc_sysfs_attr(struct scsi_qla_host *ha)</div><div class='add'>+{</div><div class='add'>+	struct Scsi_Host *host = ha-&gt;host;</div><div class='add'>+	struct sysfs_entry *iter;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	for (iter = bin_file_entries; iter-&gt;name; iter++) {</div><div class='add'>+		ret = sysfs_create_bin_file(&amp;host-&gt;shost_gendev.kobj,</div><div class='add'>+					    iter-&gt;attr);</div><div class='add'>+		if (ret)</div><div class='add'>+			ql4_printk(KERN_ERR, ha,</div><div class='add'>+				   "Unable to create sysfs %s binary attribute (%d).\n",</div><div class='add'>+				   iter-&gt;name, ret);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha)</div><div class='add'>+{</div><div class='add'>+	struct Scsi_Host *host = ha-&gt;host;</div><div class='add'>+	struct sysfs_entry *iter;</div><div class='add'>+</div><div class='add'>+	for (iter = bin_file_entries; iter-&gt;name; iter++)</div><div class='add'>+		sysfs_remove_bin_file(&amp;host-&gt;shost_gendev.kobj,</div><div class='add'>+				      iter-&gt;attr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Scsi_Host attributes. */</div><div class='ctx'> static ssize_t</div><div class='ctx'> qla4xxx_fw_version_show(struct device *dev,</div><div class='head'>diff --git a/drivers/scsi/qla4xxx/ql4_def.h b/drivers/scsi/qla4xxx/ql4_def.h<br/>index 7f2492e88be7..96a5616a8fda 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_def.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla4xxx/ql4_def.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_def.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_def.h</a></div><div class='hunk'>@@ -398,6 +398,16 @@ struct isp_operations {</div><div class='ctx'> 	int (*get_sys_info) (struct scsi_qla_host *);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ql4_mdump_size_table {</div><div class='add'>+	uint32_t size;</div><div class='add'>+	uint32_t size_cmask_02;</div><div class='add'>+	uint32_t size_cmask_04;</div><div class='add'>+	uint32_t size_cmask_08;</div><div class='add'>+	uint32_t size_cmask_10;</div><div class='add'>+	uint32_t size_cmask_FF;</div><div class='add'>+	uint32_t version;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*qla4xxx ipaddress configuration details */</div><div class='ctx'> struct ipaddress_config {</div><div class='ctx'> 	uint16_t ipv4_options;</div><div class='hunk'>@@ -485,6 +495,10 @@ struct scsi_qla_host {</div><div class='ctx'> #define AF_EEH_BUSY			20 /* 0x00100000 */</div><div class='ctx'> #define AF_PCI_CHANNEL_IO_PERM_FAILURE	21 /* 0x00200000 */</div><div class='ctx'> #define AF_BUILD_DDB_LIST		22 /* 0x00400000 */</div><div class='add'>+#define AF_82XX_FW_DUMPED		24 /* 0x01000000 */</div><div class='add'>+#define AF_82XX_RST_OWNER		25 /* 0x02000000 */</div><div class='add'>+#define AF_82XX_DUMP_READING		26 /* 0x04000000 */</div><div class='add'>+</div><div class='ctx'> 	unsigned long dpc_flags;</div><div class='ctx'> </div><div class='ctx'> #define DPC_RESET_HA			1 /* 0x00000002 */</div><div class='hunk'>@@ -662,6 +676,11 @@ struct scsi_qla_host {</div><div class='ctx'> </div><div class='ctx'> 	uint32_t nx_dev_init_timeout;</div><div class='ctx'> 	uint32_t nx_reset_timeout;</div><div class='add'>+	void *fw_dump;</div><div class='add'>+	uint32_t fw_dump_size;</div><div class='add'>+	uint32_t fw_dump_capture_mask;</div><div class='add'>+	void *fw_dump_tmplt_hdr;</div><div class='add'>+	uint32_t fw_dump_tmplt_size;</div><div class='ctx'> </div><div class='ctx'> 	struct completion mbx_intr_comp;</div><div class='ctx'> </div><div class='hunk'>@@ -936,4 +955,7 @@ static inline int ql4xxx_reset_active(struct scsi_qla_host *ha)</div><div class='ctx'> #define PROCESS_ALL_AENS	 0</div><div class='ctx'> #define FLUSH_DDB_CHANGED_AENS	 1</div><div class='ctx'> </div><div class='add'>+/* Defines for udev events */</div><div class='add'>+#define QL4_UEVENT_CODE_FW_DUMP		0</div><div class='add'>+</div><div class='ctx'> #endif	/*_QLA4XXX_H */</div><div class='head'>diff --git a/drivers/scsi/qla4xxx/ql4_fw.h b/drivers/scsi/qla4xxx/ql4_fw.h<br/>index 210cd1d64475..7240948fb929 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_fw.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla4xxx/ql4_fw.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_fw.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_fw.h</a></div><div class='hunk'>@@ -385,6 +385,11 @@ struct qla_flt_region {</div><div class='ctx'> #define MBOX_CMD_GET_IP_ADDR_STATE		0x0091</div><div class='ctx'> #define MBOX_CMD_SEND_IPV6_ROUTER_SOL		0x0092</div><div class='ctx'> #define MBOX_CMD_GET_DB_ENTRY_CURRENT_IP_ADDR	0x0093</div><div class='add'>+#define MBOX_CMD_MINIDUMP			0x0129</div><div class='add'>+</div><div class='add'>+/* Minidump subcommand */</div><div class='add'>+#define MINIDUMP_GET_SIZE_SUBCOMMAND		0x00</div><div class='add'>+#define MINIDUMP_GET_TMPLT_SUBCOMMAND		0x01</div><div class='ctx'> </div><div class='ctx'> /* Mailbox 1 */</div><div class='ctx'> #define FW_STATE_READY				0x0000</div><div class='hunk'>@@ -1190,4 +1195,27 @@ struct ql_iscsi_stats {</div><div class='ctx'> 	uint8_t reserved2[264]; /* 0x0308 - 0x040F */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define QLA82XX_DBG_STATE_ARRAY_LEN		16</div><div class='add'>+#define QLA82XX_DBG_CAP_SIZE_ARRAY_LEN		8</div><div class='add'>+#define QLA82XX_DBG_RSVD_ARRAY_LEN		8</div><div class='add'>+</div><div class='add'>+struct qla4_8xxx_minidump_template_hdr {</div><div class='add'>+	uint32_t entry_type;</div><div class='add'>+	uint32_t first_entry_offset;</div><div class='add'>+	uint32_t size_of_template;</div><div class='add'>+	uint32_t capture_debug_level;</div><div class='add'>+	uint32_t num_of_entries;</div><div class='add'>+	uint32_t version;</div><div class='add'>+	uint32_t driver_timestamp;</div><div class='add'>+	uint32_t checksum;</div><div class='add'>+</div><div class='add'>+	uint32_t driver_capture_mask;</div><div class='add'>+	uint32_t driver_info_word2;</div><div class='add'>+	uint32_t driver_info_word3;</div><div class='add'>+	uint32_t driver_info_word4;</div><div class='add'>+</div><div class='add'>+	uint32_t saved_state_array[QLA82XX_DBG_STATE_ARRAY_LEN];</div><div class='add'>+	uint32_t capture_size_array[QLA82XX_DBG_CAP_SIZE_ARRAY_LEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif /*  _QLA4X_FW_H */</div><div class='head'>diff --git a/drivers/scsi/qla4xxx/ql4_glbl.h b/drivers/scsi/qla4xxx/ql4_glbl.h<br/>index 910536667cf5..20b49d019043 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_glbl.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla4xxx/ql4_glbl.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_glbl.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_glbl.h</a></div><div class='hunk'>@@ -196,10 +196,18 @@ int qla4xxx_bsg_request(struct bsg_job *bsg_job);</div><div class='ctx'> int qla4xxx_process_vendor_specific(struct bsg_job *bsg_job);</div><div class='ctx'> </div><div class='ctx'> void qla4xxx_arm_relogin_timer(struct ddb_entry *ddb_entry);</div><div class='add'>+int qla4xxx_get_minidump_template(struct scsi_qla_host *ha,</div><div class='add'>+				  dma_addr_t phys_addr);</div><div class='add'>+int qla4xxx_req_template_size(struct scsi_qla_host *ha);</div><div class='add'>+void qla4_8xxx_alloc_sysfs_attr(struct scsi_qla_host *ha);</div><div class='add'>+void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha);</div><div class='add'>+void qla4xxx_alloc_fw_dump(struct scsi_qla_host *ha);</div><div class='ctx'> </div><div class='ctx'> extern int ql4xextended_error_logging;</div><div class='ctx'> extern int ql4xdontresethba;</div><div class='ctx'> extern int ql4xenablemsix;</div><div class='add'>+extern int ql4xmdcapmask;</div><div class='add'>+extern int ql4xenablemd;</div><div class='ctx'> </div><div class='ctx'> extern struct device_attribute *qla4xxx_host_attrs[];</div><div class='ctx'> #endif /* _QLA4x_GBL_H */</div><div class='head'>diff --git a/drivers/scsi/qla4xxx/ql4_init.c b/drivers/scsi/qla4xxx/ql4_init.c<br/>index 90ee5d8fa731..bf36723b84e1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_init.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla4xxx/ql4_init.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_init.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_init.c</a></div><div class='hunk'>@@ -277,6 +277,94 @@ qla4xxx_wait_for_ip_config(struct scsi_qla_host *ha)</div><div class='ctx'> 	return ipv4_wait|ipv6_wait;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * qla4xxx_alloc_fw_dump - Allocate memory for minidump data.</div><div class='add'>+ * @ha: pointer to host adapter structure.</div><div class='add'>+ **/</div><div class='add'>+void qla4xxx_alloc_fw_dump(struct scsi_qla_host *ha)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+	uint32_t capture_debug_level;</div><div class='add'>+	int hdr_entry_bit, k;</div><div class='add'>+	void *md_tmp;</div><div class='add'>+	dma_addr_t md_tmp_dma;</div><div class='add'>+	struct qla4_8xxx_minidump_template_hdr *md_hdr;</div><div class='add'>+</div><div class='add'>+	if (ha-&gt;fw_dump) {</div><div class='add'>+		ql4_printk(KERN_WARNING, ha,</div><div class='add'>+			   "Firmware dump previously allocated.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = qla4xxx_req_template_size(ha);</div><div class='add'>+	if (status != QLA_SUCCESS) {</div><div class='add'>+		ql4_printk(KERN_INFO, ha,</div><div class='add'>+			   "scsi%ld: Failed to get template size\n",</div><div class='add'>+			   ha-&gt;host_no);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clear_bit(AF_82XX_FW_DUMPED, &amp;ha-&gt;flags);</div><div class='add'>+</div><div class='add'>+	/* Allocate memory for saving the template */</div><div class='add'>+	md_tmp = dma_alloc_coherent(&amp;ha-&gt;pdev-&gt;dev, ha-&gt;fw_dump_tmplt_size,</div><div class='add'>+				    &amp;md_tmp_dma, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	/* Request template */</div><div class='add'>+	status =  qla4xxx_get_minidump_template(ha, md_tmp_dma);</div><div class='add'>+	if (status != QLA_SUCCESS) {</div><div class='add'>+		ql4_printk(KERN_INFO, ha,</div><div class='add'>+			   "scsi%ld: Failed to get minidump template\n",</div><div class='add'>+			   ha-&gt;host_no);</div><div class='add'>+		goto alloc_cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	md_hdr = (struct qla4_8xxx_minidump_template_hdr *)md_tmp;</div><div class='add'>+</div><div class='add'>+	capture_debug_level = md_hdr-&gt;capture_debug_level;</div><div class='add'>+</div><div class='add'>+	/* Get capture mask based on module loadtime setting. */</div><div class='add'>+	if (ql4xmdcapmask &gt;= 0x3 &amp;&amp; ql4xmdcapmask &lt;= 0x7F)</div><div class='add'>+		ha-&gt;fw_dump_capture_mask = ql4xmdcapmask;</div><div class='add'>+	else</div><div class='add'>+		ha-&gt;fw_dump_capture_mask = capture_debug_level;</div><div class='add'>+</div><div class='add'>+	md_hdr-&gt;driver_capture_mask = ha-&gt;fw_dump_capture_mask;</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Minimum num of entries = %d\n",</div><div class='add'>+			  md_hdr-&gt;num_of_entries));</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Dump template size  = %d\n",</div><div class='add'>+			  ha-&gt;fw_dump_tmplt_size));</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Selected Capture mask =0x%x\n",</div><div class='add'>+			  ha-&gt;fw_dump_capture_mask));</div><div class='add'>+</div><div class='add'>+	/* Calculate fw_dump_size */</div><div class='add'>+	for (hdr_entry_bit = 0x2, k = 1; (hdr_entry_bit &amp; 0xFF);</div><div class='add'>+	     hdr_entry_bit &lt;&lt;= 1, k++) {</div><div class='add'>+		if (hdr_entry_bit &amp; ha-&gt;fw_dump_capture_mask)</div><div class='add'>+			ha-&gt;fw_dump_size += md_hdr-&gt;capture_size_array[k];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Total firmware dump size including command header */</div><div class='add'>+	ha-&gt;fw_dump_size += ha-&gt;fw_dump_tmplt_size;</div><div class='add'>+	ha-&gt;fw_dump = vmalloc(ha-&gt;fw_dump_size);</div><div class='add'>+	if (!ha-&gt;fw_dump)</div><div class='add'>+		goto alloc_cleanup;</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+			  "Minidump Tempalate Size = 0x%x KB\n",</div><div class='add'>+			  ha-&gt;fw_dump_tmplt_size));</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+			  "Total Minidump size = 0x%x KB\n", ha-&gt;fw_dump_size));</div><div class='add'>+</div><div class='add'>+	memcpy(ha-&gt;fw_dump, md_tmp, ha-&gt;fw_dump_tmplt_size);</div><div class='add'>+	ha-&gt;fw_dump_tmplt_hdr = ha-&gt;fw_dump;</div><div class='add'>+</div><div class='add'>+alloc_cleanup:</div><div class='add'>+	dma_free_coherent(&amp;ha-&gt;pdev-&gt;dev, ha-&gt;fw_dump_tmplt_size,</div><div class='add'>+			  md_tmp, md_tmp_dma);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int qla4xxx_fw_ready(struct scsi_qla_host *ha)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t timeout_count;</div><div class='hunk'>@@ -445,9 +533,13 @@ static int qla4xxx_init_firmware(struct scsi_qla_host *ha)</div><div class='ctx'> 			      "control block\n", ha-&gt;host_no, __func__));</div><div class='ctx'> 		return status;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	if (!qla4xxx_fw_ready(ha))</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='add'>+	if (is_qla8022(ha) &amp;&amp; !test_bit(AF_INIT_DONE, &amp;ha-&gt;flags))</div><div class='add'>+		qla4xxx_alloc_fw_dump(ha);</div><div class='add'>+</div><div class='ctx'> 	return qla4xxx_get_firmware_status(ha);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -884,8 +976,8 @@ int qla4xxx_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index,</div><div class='ctx'> 		switch (state) {</div><div class='ctx'> 		case DDB_DS_SESSION_ACTIVE:</div><div class='ctx'> 		case DDB_DS_DISCOVERY:</div><div class='del'>-			ddb_entry-&gt;unblock_sess(ddb_entry-&gt;sess);</div><div class='ctx'> 			qla4xxx_update_session_conn_param(ha, ddb_entry);</div><div class='add'>+			ddb_entry-&gt;unblock_sess(ddb_entry-&gt;sess);</div><div class='ctx'> 			status = QLA_SUCCESS;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case DDB_DS_SESSION_FAILED:</div><div class='hunk'>@@ -897,6 +989,7 @@ int qla4xxx_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index,</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DDB_DS_SESSION_ACTIVE:</div><div class='add'>+	case DDB_DS_DISCOVERY:</div><div class='ctx'> 		switch (state) {</div><div class='ctx'> 		case DDB_DS_SESSION_FAILED:</div><div class='ctx'> 			/*</div><div class='head'>diff --git a/drivers/scsi/qla4xxx/ql4_mbx.c b/drivers/scsi/qla4xxx/ql4_mbx.c<br/>index 7ac21dabbf22..cab8f665a41f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_mbx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla4xxx/ql4_mbx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_mbx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_mbx.c</a></div><div class='hunk'>@@ -51,25 +51,6 @@ int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (is_qla8022(ha)) {</div><div class='del'>-		if (test_bit(AF_FW_RECOVERY, &amp;ha-&gt;flags)) {</div><div class='del'>-			DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: "</div><div class='del'>-			    "prematurely completing mbx cmd as firmware "</div><div class='del'>-			    "recovery detected\n", ha-&gt;host_no, __func__));</div><div class='del'>-			return status;</div><div class='del'>-		}</div><div class='del'>-		/* Do not send any mbx cmd if h/w is in failed state*/</div><div class='del'>-		qla4_8xxx_idc_lock(ha);</div><div class='del'>-		dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);</div><div class='del'>-		qla4_8xxx_idc_unlock(ha);</div><div class='del'>-		if (dev_state == QLA82XX_DEV_FAILED) {</div><div class='del'>-			ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: H/W is in "</div><div class='del'>-			    "failed state, do not send any mailbox commands\n",</div><div class='del'>-			    ha-&gt;host_no, __func__);</div><div class='del'>-			return status;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if ((is_aer_supported(ha)) &amp;&amp;</div><div class='ctx'> 	    (test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &amp;ha-&gt;flags))) {</div><div class='ctx'> 		DEBUG2(printk(KERN_WARNING "scsi%ld: %s: Perm failure on EEH, "</div><div class='hunk'>@@ -96,6 +77,25 @@ int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,</div><div class='ctx'> 		msleep(10);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (is_qla8022(ha)) {</div><div class='add'>+		if (test_bit(AF_FW_RECOVERY, &amp;ha-&gt;flags)) {</div><div class='add'>+			DEBUG2(ql4_printk(KERN_WARNING, ha,</div><div class='add'>+					  "scsi%ld: %s: prematurely completing mbx cmd as firmware recovery detected\n",</div><div class='add'>+					  ha-&gt;host_no, __func__));</div><div class='add'>+			goto mbox_exit;</div><div class='add'>+		}</div><div class='add'>+		/* Do not send any mbx cmd if h/w is in failed state*/</div><div class='add'>+		qla4_8xxx_idc_lock(ha);</div><div class='add'>+		dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);</div><div class='add'>+		qla4_8xxx_idc_unlock(ha);</div><div class='add'>+		if (dev_state == QLA82XX_DEV_FAILED) {</div><div class='add'>+			ql4_printk(KERN_WARNING, ha,</div><div class='add'>+				   "scsi%ld: %s: H/W is in failed state, do not send any mailbox commands\n",</div><div class='add'>+				   ha-&gt;host_no, __func__);</div><div class='add'>+			goto mbox_exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	ha-&gt;mbox_status_count = outCount;</div><div class='hunk'>@@ -270,6 +270,79 @@ mbox_exit:</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * qla4xxx_get_minidump_template - Get the firmware template</div><div class='add'>+ * @ha: Pointer to host adapter structure.</div><div class='add'>+ * @phys_addr: dma address for template</div><div class='add'>+ *</div><div class='add'>+ * Obtain the minidump template from firmware during initialization</div><div class='add'>+ * as it may not be available when minidump is desired.</div><div class='add'>+ **/</div><div class='add'>+int qla4xxx_get_minidump_template(struct scsi_qla_host *ha,</div><div class='add'>+				  dma_addr_t phys_addr)</div><div class='add'>+{</div><div class='add'>+	uint32_t mbox_cmd[MBOX_REG_COUNT];</div><div class='add'>+	uint32_t mbox_sts[MBOX_REG_COUNT];</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	memset(&amp;mbox_cmd, 0, sizeof(mbox_cmd));</div><div class='add'>+	memset(&amp;mbox_sts, 0, sizeof(mbox_sts));</div><div class='add'>+</div><div class='add'>+	mbox_cmd[0] = MBOX_CMD_MINIDUMP;</div><div class='add'>+	mbox_cmd[1] = MINIDUMP_GET_TMPLT_SUBCOMMAND;</div><div class='add'>+	mbox_cmd[2] = LSDW(phys_addr);</div><div class='add'>+	mbox_cmd[3] = MSDW(phys_addr);</div><div class='add'>+	mbox_cmd[4] = ha-&gt;fw_dump_tmplt_size;</div><div class='add'>+	mbox_cmd[5] = 0;</div><div class='add'>+</div><div class='add'>+	status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &amp;mbox_cmd[0],</div><div class='add'>+					 &amp;mbox_sts[0]);</div><div class='add'>+	if (status != QLA_SUCCESS) {</div><div class='add'>+		DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+				  "scsi%ld: %s: Cmd = %08X, mbx[0] = 0x%04x, mbx[1] = 0x%04x\n",</div><div class='add'>+				  ha-&gt;host_no, __func__, mbox_cmd[0],</div><div class='add'>+				  mbox_sts[0], mbox_sts[1]));</div><div class='add'>+	}</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * qla4xxx_req_template_size - Get minidump template size from firmware.</div><div class='add'>+ * @ha: Pointer to host adapter structure.</div><div class='add'>+ **/</div><div class='add'>+int qla4xxx_req_template_size(struct scsi_qla_host *ha)</div><div class='add'>+{</div><div class='add'>+	uint32_t mbox_cmd[MBOX_REG_COUNT];</div><div class='add'>+	uint32_t mbox_sts[MBOX_REG_COUNT];</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	memset(&amp;mbox_cmd, 0, sizeof(mbox_cmd));</div><div class='add'>+	memset(&amp;mbox_sts, 0, sizeof(mbox_sts));</div><div class='add'>+</div><div class='add'>+	mbox_cmd[0] = MBOX_CMD_MINIDUMP;</div><div class='add'>+	mbox_cmd[1] = MINIDUMP_GET_SIZE_SUBCOMMAND;</div><div class='add'>+</div><div class='add'>+	status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 8, &amp;mbox_cmd[0],</div><div class='add'>+					 &amp;mbox_sts[0]);</div><div class='add'>+	if (status == QLA_SUCCESS) {</div><div class='add'>+		ha-&gt;fw_dump_tmplt_size = mbox_sts[1];</div><div class='add'>+		DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+				  "%s: sts[0]=0x%04x, template  size=0x%04x, size_cm_02=0x%04x, size_cm_04=0x%04x, size_cm_08=0x%04x, size_cm_10=0x%04x, size_cm_FF=0x%04x, version=0x%04x\n",</div><div class='add'>+				  __func__, mbox_sts[0], mbox_sts[1],</div><div class='add'>+				  mbox_sts[2], mbox_sts[3], mbox_sts[4],</div><div class='add'>+				  mbox_sts[5], mbox_sts[6], mbox_sts[7]));</div><div class='add'>+		if (ha-&gt;fw_dump_tmplt_size == 0)</div><div class='add'>+			status = QLA_ERROR;</div><div class='add'>+	} else {</div><div class='add'>+		ql4_printk(KERN_WARNING, ha,</div><div class='add'>+			   "%s: Error sts[0]=0x%04x, mbx[1]=0x%04x\n",</div><div class='add'>+			   __func__, mbox_sts[0], mbox_sts[1]);</div><div class='add'>+		status = QLA_ERROR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void qla4xxx_mailbox_premature_completion(struct scsi_qla_host *ha)</div><div class='ctx'> {</div><div class='ctx'> 	set_bit(AF_FW_RECOVERY, &amp;ha-&gt;flags);</div><div class='head'>diff --git a/drivers/scsi/qla4xxx/ql4_nx.c b/drivers/scsi/qla4xxx/ql4_nx.c<br/>index e1e46b6dac75..228b67020d2c 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_nx.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla4xxx/ql4_nx.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_nx.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_nx.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/ratelimit.h&gt;</div><div class='ctx'> #include "ql4_def.h"</div><div class='ctx'> #include "ql4_glbl.h"</div><div class='ctx'> </div><div class='hunk'>@@ -420,6 +421,38 @@ qla4_8xxx_rd_32(struct scsi_qla_host *ha, ulong off)</div><div class='ctx'> 	return data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Minidump related functions */</div><div class='add'>+static int qla4_8xxx_md_rw_32(struct scsi_qla_host *ha, uint32_t off,</div><div class='add'>+			      u32 data, uint8_t flag)</div><div class='add'>+{</div><div class='add'>+	uint32_t win_read, off_value, rval = QLA_SUCCESS;</div><div class='add'>+</div><div class='add'>+	off_value  = off &amp; 0xFFFF0000;</div><div class='add'>+	writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha-&gt;nx_pcibase));</div><div class='add'>+</div><div class='add'>+	/* Read back value to make sure write has gone through before trying</div><div class='add'>+	 * to use it.</div><div class='add'>+	 */</div><div class='add'>+	win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha-&gt;nx_pcibase));</div><div class='add'>+	if (win_read != off_value) {</div><div class='add'>+		DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+				  "%s: Written (0x%x) != Read (0x%x), off=0x%x\n",</div><div class='add'>+				   __func__, off_value, win_read, off));</div><div class='add'>+		return QLA_ERROR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	off_value  = off &amp; 0x0000FFFF;</div><div class='add'>+</div><div class='add'>+	if (flag)</div><div class='add'>+		writel(data, (void __iomem *)(off_value + CRB_INDIRECT_2M +</div><div class='add'>+					      ha-&gt;nx_pcibase));</div><div class='add'>+	else</div><div class='add'>+		rval = readl((void __iomem *)(off_value + CRB_INDIRECT_2M +</div><div class='add'>+					      ha-&gt;nx_pcibase));</div><div class='add'>+</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define CRB_WIN_LOCK_TIMEOUT 100000000</div><div class='ctx'> </div><div class='ctx'> int qla4_8xxx_crb_win_lock(struct scsi_qla_host *ha)</div><div class='hunk'>@@ -1252,9 +1285,9 @@ qla4_8xxx_pci_mem_read_2M(struct scsi_qla_host *ha,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (j &gt;= MAX_CTL_CHECK) {</div><div class='del'>-			if (printk_ratelimit())</div><div class='del'>-				ql4_printk(KERN_ERR, ha,</div><div class='del'>-				    "failed to read through agent\n");</div><div class='add'>+			printk_ratelimited(KERN_ERR</div><div class='add'>+					   "%s: failed to read through agent\n",</div><div class='add'>+					   __func__);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1390,7 +1423,8 @@ qla4_8xxx_pci_mem_write_2M(struct scsi_qla_host *ha,</div><div class='ctx'> 		if (j &gt;= MAX_CTL_CHECK) {</div><div class='ctx'> 			if (printk_ratelimit())</div><div class='ctx'> 				ql4_printk(KERN_ERR, ha,</div><div class='del'>-				    "failed to write through agent\n");</div><div class='add'>+					   "%s: failed to read through agent\n",</div><div class='add'>+					   __func__);</div><div class='ctx'> 			ret = -1;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1462,6 +1496,8 @@ qla4_8xxx_set_drv_active(struct scsi_qla_host *ha)</div><div class='ctx'> </div><div class='ctx'> 	drv_active = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);</div><div class='ctx'> 	drv_active |= (1 &lt;&lt; (ha-&gt;func_num * 4));</div><div class='add'>+	ql4_printk(KERN_INFO, ha, "%s(%ld): drv_active: 0x%08x\n",</div><div class='add'>+		   __func__, ha-&gt;host_no, drv_active);</div><div class='ctx'> 	qla4_8xxx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, drv_active);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1472,6 +1508,8 @@ qla4_8xxx_clear_drv_active(struct scsi_qla_host *ha)</div><div class='ctx'> </div><div class='ctx'> 	drv_active = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);</div><div class='ctx'> 	drv_active &amp;= ~(1 &lt;&lt; (ha-&gt;func_num * 4));</div><div class='add'>+	ql4_printk(KERN_INFO, ha, "%s(%ld): drv_active: 0x%08x\n",</div><div class='add'>+		   __func__, ha-&gt;host_no, drv_active);</div><div class='ctx'> 	qla4_8xxx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, drv_active);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1497,6 +1535,8 @@ qla4_8xxx_set_rst_ready(struct scsi_qla_host *ha)</div><div class='ctx'> </div><div class='ctx'> 	drv_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_STATE);</div><div class='ctx'> 	drv_state |= (1 &lt;&lt; (ha-&gt;func_num * 4));</div><div class='add'>+	ql4_printk(KERN_INFO, ha, "%s(%ld): drv_state: 0x%08x\n",</div><div class='add'>+		   __func__, ha-&gt;host_no, drv_state);</div><div class='ctx'> 	qla4_8xxx_wr_32(ha, QLA82XX_CRB_DRV_STATE, drv_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1507,6 +1547,8 @@ qla4_8xxx_clear_rst_ready(struct scsi_qla_host *ha)</div><div class='ctx'> </div><div class='ctx'> 	drv_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_STATE);</div><div class='ctx'> 	drv_state &amp;= ~(1 &lt;&lt; (ha-&gt;func_num * 4));</div><div class='add'>+	ql4_printk(KERN_INFO, ha, "%s(%ld): drv_state: 0x%08x\n",</div><div class='add'>+		   __func__, ha-&gt;host_no, drv_state);</div><div class='ctx'> 	qla4_8xxx_wr_32(ha, QLA82XX_CRB_DRV_STATE, drv_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1601,6 +1643,629 @@ static void qla4_8xxx_rom_lock_recovery(struct scsi_qla_host *ha)</div><div class='ctx'> 	qla4_8xxx_rom_unlock(ha);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void qla4_8xxx_minidump_process_rdcrb(struct scsi_qla_host *ha,</div><div class='add'>+				struct qla82xx_minidump_entry_hdr *entry_hdr,</div><div class='add'>+				uint32_t **d_ptr)</div><div class='add'>+{</div><div class='add'>+	uint32_t r_addr, r_stride, loop_cnt, i, r_value;</div><div class='add'>+	struct qla82xx_minidump_entry_crb *crb_hdr;</div><div class='add'>+	uint32_t *data_ptr = *d_ptr;</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));</div><div class='add'>+	crb_hdr = (struct qla82xx_minidump_entry_crb *)entry_hdr;</div><div class='add'>+	r_addr = crb_hdr-&gt;addr;</div><div class='add'>+	r_stride = crb_hdr-&gt;crb_strd.addr_stride;</div><div class='add'>+	loop_cnt = crb_hdr-&gt;op_count;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; loop_cnt; i++) {</div><div class='add'>+		r_value = qla4_8xxx_md_rw_32(ha, r_addr, 0, 0);</div><div class='add'>+		*data_ptr++ = cpu_to_le32(r_addr);</div><div class='add'>+		*data_ptr++ = cpu_to_le32(r_value);</div><div class='add'>+		r_addr += r_stride;</div><div class='add'>+	}</div><div class='add'>+	*d_ptr = data_ptr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qla4_8xxx_minidump_process_l2tag(struct scsi_qla_host *ha,</div><div class='add'>+				 struct qla82xx_minidump_entry_hdr *entry_hdr,</div><div class='add'>+				 uint32_t **d_ptr)</div><div class='add'>+{</div><div class='add'>+	uint32_t addr, r_addr, c_addr, t_r_addr;</div><div class='add'>+	uint32_t i, k, loop_count, t_value, r_cnt, r_value;</div><div class='add'>+	unsigned long p_wait, w_time, p_mask;</div><div class='add'>+	uint32_t c_value_w, c_value_r;</div><div class='add'>+	struct qla82xx_minidump_entry_cache *cache_hdr;</div><div class='add'>+	int rval = QLA_ERROR;</div><div class='add'>+	uint32_t *data_ptr = *d_ptr;</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));</div><div class='add'>+	cache_hdr = (struct qla82xx_minidump_entry_cache *)entry_hdr;</div><div class='add'>+</div><div class='add'>+	loop_count = cache_hdr-&gt;op_count;</div><div class='add'>+	r_addr = cache_hdr-&gt;read_addr;</div><div class='add'>+	c_addr = cache_hdr-&gt;control_addr;</div><div class='add'>+	c_value_w = cache_hdr-&gt;cache_ctrl.write_value;</div><div class='add'>+</div><div class='add'>+	t_r_addr = cache_hdr-&gt;tag_reg_addr;</div><div class='add'>+	t_value = cache_hdr-&gt;addr_ctrl.init_tag_value;</div><div class='add'>+	r_cnt = cache_hdr-&gt;read_ctrl.read_addr_cnt;</div><div class='add'>+	p_wait = cache_hdr-&gt;cache_ctrl.poll_wait;</div><div class='add'>+	p_mask = cache_hdr-&gt;cache_ctrl.poll_mask;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; loop_count; i++) {</div><div class='add'>+		qla4_8xxx_md_rw_32(ha, t_r_addr, t_value, 1);</div><div class='add'>+</div><div class='add'>+		if (c_value_w)</div><div class='add'>+			qla4_8xxx_md_rw_32(ha, c_addr, c_value_w, 1);</div><div class='add'>+</div><div class='add'>+		if (p_mask) {</div><div class='add'>+			w_time = jiffies + p_wait;</div><div class='add'>+			do {</div><div class='add'>+				c_value_r = qla4_8xxx_md_rw_32(ha, c_addr,</div><div class='add'>+								0, 0);</div><div class='add'>+				if ((c_value_r &amp; p_mask) == 0) {</div><div class='add'>+					break;</div><div class='add'>+				} else if (time_after_eq(jiffies, w_time)) {</div><div class='add'>+					/* capturing dump failed */</div><div class='add'>+					return rval;</div><div class='add'>+				}</div><div class='add'>+			} while (1);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		addr = r_addr;</div><div class='add'>+		for (k = 0; k &lt; r_cnt; k++) {</div><div class='add'>+			r_value = qla4_8xxx_md_rw_32(ha, addr, 0, 0);</div><div class='add'>+			*data_ptr++ = cpu_to_le32(r_value);</div><div class='add'>+			addr += cache_hdr-&gt;read_ctrl.read_addr_stride;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		t_value += cache_hdr-&gt;addr_ctrl.tag_value_stride;</div><div class='add'>+	}</div><div class='add'>+	*d_ptr = data_ptr;</div><div class='add'>+	return QLA_SUCCESS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qla4_8xxx_minidump_process_control(struct scsi_qla_host *ha,</div><div class='add'>+				struct qla82xx_minidump_entry_hdr *entry_hdr)</div><div class='add'>+{</div><div class='add'>+	struct qla82xx_minidump_entry_crb *crb_entry;</div><div class='add'>+	uint32_t read_value, opcode, poll_time, addr, index, rval = QLA_SUCCESS;</div><div class='add'>+	uint32_t crb_addr;</div><div class='add'>+	unsigned long wtime;</div><div class='add'>+	struct qla4_8xxx_minidump_template_hdr *tmplt_hdr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));</div><div class='add'>+	tmplt_hdr = (struct qla4_8xxx_minidump_template_hdr *)</div><div class='add'>+						ha-&gt;fw_dump_tmplt_hdr;</div><div class='add'>+	crb_entry = (struct qla82xx_minidump_entry_crb *)entry_hdr;</div><div class='add'>+</div><div class='add'>+	crb_addr = crb_entry-&gt;addr;</div><div class='add'>+	for (i = 0; i &lt; crb_entry-&gt;op_count; i++) {</div><div class='add'>+		opcode = crb_entry-&gt;crb_ctrl.opcode;</div><div class='add'>+		if (opcode &amp; QLA82XX_DBG_OPCODE_WR) {</div><div class='add'>+			qla4_8xxx_md_rw_32(ha, crb_addr,</div><div class='add'>+					   crb_entry-&gt;value_1, 1);</div><div class='add'>+			opcode &amp;= ~QLA82XX_DBG_OPCODE_WR;</div><div class='add'>+		}</div><div class='add'>+		if (opcode &amp; QLA82XX_DBG_OPCODE_RW) {</div><div class='add'>+			read_value = qla4_8xxx_md_rw_32(ha, crb_addr, 0, 0);</div><div class='add'>+			qla4_8xxx_md_rw_32(ha, crb_addr, read_value, 1);</div><div class='add'>+			opcode &amp;= ~QLA82XX_DBG_OPCODE_RW;</div><div class='add'>+		}</div><div class='add'>+		if (opcode &amp; QLA82XX_DBG_OPCODE_AND) {</div><div class='add'>+			read_value = qla4_8xxx_md_rw_32(ha, crb_addr, 0, 0);</div><div class='add'>+			read_value &amp;= crb_entry-&gt;value_2;</div><div class='add'>+			opcode &amp;= ~QLA82XX_DBG_OPCODE_AND;</div><div class='add'>+			if (opcode &amp; QLA82XX_DBG_OPCODE_OR) {</div><div class='add'>+				read_value |= crb_entry-&gt;value_3;</div><div class='add'>+				opcode &amp;= ~QLA82XX_DBG_OPCODE_OR;</div><div class='add'>+			}</div><div class='add'>+			qla4_8xxx_md_rw_32(ha, crb_addr, read_value, 1);</div><div class='add'>+		}</div><div class='add'>+		if (opcode &amp; QLA82XX_DBG_OPCODE_OR) {</div><div class='add'>+			read_value = qla4_8xxx_md_rw_32(ha, crb_addr, 0, 0);</div><div class='add'>+			read_value |= crb_entry-&gt;value_3;</div><div class='add'>+			qla4_8xxx_md_rw_32(ha, crb_addr, read_value, 1);</div><div class='add'>+			opcode &amp;= ~QLA82XX_DBG_OPCODE_OR;</div><div class='add'>+		}</div><div class='add'>+		if (opcode &amp; QLA82XX_DBG_OPCODE_POLL) {</div><div class='add'>+			poll_time = crb_entry-&gt;crb_strd.poll_timeout;</div><div class='add'>+			wtime = jiffies + poll_time;</div><div class='add'>+			read_value = qla4_8xxx_md_rw_32(ha, crb_addr, 0, 0);</div><div class='add'>+</div><div class='add'>+			do {</div><div class='add'>+				if ((read_value &amp; crb_entry-&gt;value_2) ==</div><div class='add'>+				    crb_entry-&gt;value_1)</div><div class='add'>+					break;</div><div class='add'>+				else if (time_after_eq(jiffies, wtime)) {</div><div class='add'>+					/* capturing dump failed */</div><div class='add'>+					rval = QLA_ERROR;</div><div class='add'>+					break;</div><div class='add'>+				} else</div><div class='add'>+					read_value = qla4_8xxx_md_rw_32(ha,</div><div class='add'>+								crb_addr, 0, 0);</div><div class='add'>+			} while (1);</div><div class='add'>+			opcode &amp;= ~QLA82XX_DBG_OPCODE_POLL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (opcode &amp; QLA82XX_DBG_OPCODE_RDSTATE) {</div><div class='add'>+			if (crb_entry-&gt;crb_strd.state_index_a) {</div><div class='add'>+				index = crb_entry-&gt;crb_strd.state_index_a;</div><div class='add'>+				addr = tmplt_hdr-&gt;saved_state_array[index];</div><div class='add'>+			} else {</div><div class='add'>+				addr = crb_addr;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			read_value = qla4_8xxx_md_rw_32(ha, addr, 0, 0);</div><div class='add'>+			index = crb_entry-&gt;crb_ctrl.state_index_v;</div><div class='add'>+			tmplt_hdr-&gt;saved_state_array[index] = read_value;</div><div class='add'>+			opcode &amp;= ~QLA82XX_DBG_OPCODE_RDSTATE;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (opcode &amp; QLA82XX_DBG_OPCODE_WRSTATE) {</div><div class='add'>+			if (crb_entry-&gt;crb_strd.state_index_a) {</div><div class='add'>+				index = crb_entry-&gt;crb_strd.state_index_a;</div><div class='add'>+				addr = tmplt_hdr-&gt;saved_state_array[index];</div><div class='add'>+			} else {</div><div class='add'>+				addr = crb_addr;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (crb_entry-&gt;crb_ctrl.state_index_v) {</div><div class='add'>+				index = crb_entry-&gt;crb_ctrl.state_index_v;</div><div class='add'>+				read_value =</div><div class='add'>+					tmplt_hdr-&gt;saved_state_array[index];</div><div class='add'>+			} else {</div><div class='add'>+				read_value = crb_entry-&gt;value_1;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			qla4_8xxx_md_rw_32(ha, addr, read_value, 1);</div><div class='add'>+			opcode &amp;= ~QLA82XX_DBG_OPCODE_WRSTATE;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (opcode &amp; QLA82XX_DBG_OPCODE_MDSTATE) {</div><div class='add'>+			index = crb_entry-&gt;crb_ctrl.state_index_v;</div><div class='add'>+			read_value = tmplt_hdr-&gt;saved_state_array[index];</div><div class='add'>+			read_value &lt;&lt;= crb_entry-&gt;crb_ctrl.shl;</div><div class='add'>+			read_value &gt;&gt;= crb_entry-&gt;crb_ctrl.shr;</div><div class='add'>+			if (crb_entry-&gt;value_2)</div><div class='add'>+				read_value &amp;= crb_entry-&gt;value_2;</div><div class='add'>+			read_value |= crb_entry-&gt;value_3;</div><div class='add'>+			read_value += crb_entry-&gt;value_1;</div><div class='add'>+			tmplt_hdr-&gt;saved_state_array[index] = read_value;</div><div class='add'>+			opcode &amp;= ~QLA82XX_DBG_OPCODE_MDSTATE;</div><div class='add'>+		}</div><div class='add'>+		crb_addr += crb_entry-&gt;crb_strd.addr_stride;</div><div class='add'>+	}</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Leaving fn: %s\n", __func__));</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qla4_8xxx_minidump_process_rdocm(struct scsi_qla_host *ha,</div><div class='add'>+				struct qla82xx_minidump_entry_hdr *entry_hdr,</div><div class='add'>+				uint32_t **d_ptr)</div><div class='add'>+{</div><div class='add'>+	uint32_t r_addr, r_stride, loop_cnt, i, r_value;</div><div class='add'>+	struct qla82xx_minidump_entry_rdocm *ocm_hdr;</div><div class='add'>+	uint32_t *data_ptr = *d_ptr;</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));</div><div class='add'>+	ocm_hdr = (struct qla82xx_minidump_entry_rdocm *)entry_hdr;</div><div class='add'>+	r_addr = ocm_hdr-&gt;read_addr;</div><div class='add'>+	r_stride = ocm_hdr-&gt;read_addr_stride;</div><div class='add'>+	loop_cnt = ocm_hdr-&gt;op_count;</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+			  "[%s]: r_addr: 0x%x, r_stride: 0x%x, loop_cnt: 0x%x\n",</div><div class='add'>+			  __func__, r_addr, r_stride, loop_cnt));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; loop_cnt; i++) {</div><div class='add'>+		r_value = readl((void __iomem *)(r_addr + ha-&gt;nx_pcibase));</div><div class='add'>+		*data_ptr++ = cpu_to_le32(r_value);</div><div class='add'>+		r_addr += r_stride;</div><div class='add'>+	}</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Leaving fn: %s datacount: 0x%lx\n",</div><div class='add'>+			  __func__, (loop_cnt * sizeof(uint32_t))));</div><div class='add'>+	*d_ptr = data_ptr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qla4_8xxx_minidump_process_rdmux(struct scsi_qla_host *ha,</div><div class='add'>+				struct qla82xx_minidump_entry_hdr *entry_hdr,</div><div class='add'>+				uint32_t **d_ptr)</div><div class='add'>+{</div><div class='add'>+	uint32_t r_addr, s_stride, s_addr, s_value, loop_cnt, i, r_value;</div><div class='add'>+	struct qla82xx_minidump_entry_mux *mux_hdr;</div><div class='add'>+	uint32_t *data_ptr = *d_ptr;</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));</div><div class='add'>+	mux_hdr = (struct qla82xx_minidump_entry_mux *)entry_hdr;</div><div class='add'>+	r_addr = mux_hdr-&gt;read_addr;</div><div class='add'>+	s_addr = mux_hdr-&gt;select_addr;</div><div class='add'>+	s_stride = mux_hdr-&gt;select_value_stride;</div><div class='add'>+	s_value = mux_hdr-&gt;select_value;</div><div class='add'>+	loop_cnt = mux_hdr-&gt;op_count;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; loop_cnt; i++) {</div><div class='add'>+		qla4_8xxx_md_rw_32(ha, s_addr, s_value, 1);</div><div class='add'>+		r_value = qla4_8xxx_md_rw_32(ha, r_addr, 0, 0);</div><div class='add'>+		*data_ptr++ = cpu_to_le32(s_value);</div><div class='add'>+		*data_ptr++ = cpu_to_le32(r_value);</div><div class='add'>+		s_value += s_stride;</div><div class='add'>+	}</div><div class='add'>+	*d_ptr = data_ptr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qla4_8xxx_minidump_process_l1cache(struct scsi_qla_host *ha,</div><div class='add'>+				struct qla82xx_minidump_entry_hdr *entry_hdr,</div><div class='add'>+				uint32_t **d_ptr)</div><div class='add'>+{</div><div class='add'>+	uint32_t addr, r_addr, c_addr, t_r_addr;</div><div class='add'>+	uint32_t i, k, loop_count, t_value, r_cnt, r_value;</div><div class='add'>+	uint32_t c_value_w;</div><div class='add'>+	struct qla82xx_minidump_entry_cache *cache_hdr;</div><div class='add'>+	uint32_t *data_ptr = *d_ptr;</div><div class='add'>+</div><div class='add'>+	cache_hdr = (struct qla82xx_minidump_entry_cache *)entry_hdr;</div><div class='add'>+	loop_count = cache_hdr-&gt;op_count;</div><div class='add'>+	r_addr = cache_hdr-&gt;read_addr;</div><div class='add'>+	c_addr = cache_hdr-&gt;control_addr;</div><div class='add'>+	c_value_w = cache_hdr-&gt;cache_ctrl.write_value;</div><div class='add'>+</div><div class='add'>+	t_r_addr = cache_hdr-&gt;tag_reg_addr;</div><div class='add'>+	t_value = cache_hdr-&gt;addr_ctrl.init_tag_value;</div><div class='add'>+	r_cnt = cache_hdr-&gt;read_ctrl.read_addr_cnt;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; loop_count; i++) {</div><div class='add'>+		qla4_8xxx_md_rw_32(ha, t_r_addr, t_value, 1);</div><div class='add'>+		qla4_8xxx_md_rw_32(ha, c_addr, c_value_w, 1);</div><div class='add'>+		addr = r_addr;</div><div class='add'>+		for (k = 0; k &lt; r_cnt; k++) {</div><div class='add'>+			r_value = qla4_8xxx_md_rw_32(ha, addr, 0, 0);</div><div class='add'>+			*data_ptr++ = cpu_to_le32(r_value);</div><div class='add'>+			addr += cache_hdr-&gt;read_ctrl.read_addr_stride;</div><div class='add'>+		}</div><div class='add'>+		t_value += cache_hdr-&gt;addr_ctrl.tag_value_stride;</div><div class='add'>+	}</div><div class='add'>+	*d_ptr = data_ptr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qla4_8xxx_minidump_process_queue(struct scsi_qla_host *ha,</div><div class='add'>+				struct qla82xx_minidump_entry_hdr *entry_hdr,</div><div class='add'>+				uint32_t **d_ptr)</div><div class='add'>+{</div><div class='add'>+	uint32_t s_addr, r_addr;</div><div class='add'>+	uint32_t r_stride, r_value, r_cnt, qid = 0;</div><div class='add'>+	uint32_t i, k, loop_cnt;</div><div class='add'>+	struct qla82xx_minidump_entry_queue *q_hdr;</div><div class='add'>+	uint32_t *data_ptr = *d_ptr;</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));</div><div class='add'>+	q_hdr = (struct qla82xx_minidump_entry_queue *)entry_hdr;</div><div class='add'>+	s_addr = q_hdr-&gt;select_addr;</div><div class='add'>+	r_cnt = q_hdr-&gt;rd_strd.read_addr_cnt;</div><div class='add'>+	r_stride = q_hdr-&gt;rd_strd.read_addr_stride;</div><div class='add'>+	loop_cnt = q_hdr-&gt;op_count;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; loop_cnt; i++) {</div><div class='add'>+		qla4_8xxx_md_rw_32(ha, s_addr, qid, 1);</div><div class='add'>+		r_addr = q_hdr-&gt;read_addr;</div><div class='add'>+		for (k = 0; k &lt; r_cnt; k++) {</div><div class='add'>+			r_value = qla4_8xxx_md_rw_32(ha, r_addr, 0, 0);</div><div class='add'>+			*data_ptr++ = cpu_to_le32(r_value);</div><div class='add'>+			r_addr += r_stride;</div><div class='add'>+		}</div><div class='add'>+		qid += q_hdr-&gt;q_strd.queue_id_stride;</div><div class='add'>+	}</div><div class='add'>+	*d_ptr = data_ptr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MD_DIRECT_ROM_WINDOW		0x42110030</div><div class='add'>+#define MD_DIRECT_ROM_READ_BASE		0x42150000</div><div class='add'>+</div><div class='add'>+static void qla4_8xxx_minidump_process_rdrom(struct scsi_qla_host *ha,</div><div class='add'>+				struct qla82xx_minidump_entry_hdr *entry_hdr,</div><div class='add'>+				uint32_t **d_ptr)</div><div class='add'>+{</div><div class='add'>+	uint32_t r_addr, r_value;</div><div class='add'>+	uint32_t i, loop_cnt;</div><div class='add'>+	struct qla82xx_minidump_entry_rdrom *rom_hdr;</div><div class='add'>+	uint32_t *data_ptr = *d_ptr;</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));</div><div class='add'>+	rom_hdr = (struct qla82xx_minidump_entry_rdrom *)entry_hdr;</div><div class='add'>+	r_addr = rom_hdr-&gt;read_addr;</div><div class='add'>+	loop_cnt = rom_hdr-&gt;read_data_size/sizeof(uint32_t);</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+			  "[%s]: flash_addr: 0x%x, read_data_size: 0x%x\n",</div><div class='add'>+			   __func__, r_addr, loop_cnt));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; loop_cnt; i++) {</div><div class='add'>+		qla4_8xxx_md_rw_32(ha, MD_DIRECT_ROM_WINDOW,</div><div class='add'>+				   (r_addr &amp; 0xFFFF0000), 1);</div><div class='add'>+		r_value = qla4_8xxx_md_rw_32(ha,</div><div class='add'>+					     MD_DIRECT_ROM_READ_BASE +</div><div class='add'>+					     (r_addr &amp; 0x0000FFFF), 0, 0);</div><div class='add'>+		*data_ptr++ = cpu_to_le32(r_value);</div><div class='add'>+		r_addr += sizeof(uint32_t);</div><div class='add'>+	}</div><div class='add'>+	*d_ptr = data_ptr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MD_MIU_TEST_AGT_CTRL		0x41000090</div><div class='add'>+#define MD_MIU_TEST_AGT_ADDR_LO		0x41000094</div><div class='add'>+#define MD_MIU_TEST_AGT_ADDR_HI		0x41000098</div><div class='add'>+</div><div class='add'>+static int qla4_8xxx_minidump_process_rdmem(struct scsi_qla_host *ha,</div><div class='add'>+				struct qla82xx_minidump_entry_hdr *entry_hdr,</div><div class='add'>+				uint32_t **d_ptr)</div><div class='add'>+{</div><div class='add'>+	uint32_t r_addr, r_value, r_data;</div><div class='add'>+	uint32_t i, j, loop_cnt;</div><div class='add'>+	struct qla82xx_minidump_entry_rdmem *m_hdr;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	uint32_t *data_ptr = *d_ptr;</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));</div><div class='add'>+	m_hdr = (struct qla82xx_minidump_entry_rdmem *)entry_hdr;</div><div class='add'>+	r_addr = m_hdr-&gt;read_addr;</div><div class='add'>+	loop_cnt = m_hdr-&gt;read_data_size/16;</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+			  "[%s]: Read addr: 0x%x, read_data_size: 0x%x\n",</div><div class='add'>+			  __func__, r_addr, m_hdr-&gt;read_data_size));</div><div class='add'>+</div><div class='add'>+	if (r_addr &amp; 0xf) {</div><div class='add'>+		DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+				  "[%s]: Read addr 0x%x not 16 bytes alligned\n",</div><div class='add'>+				  __func__, r_addr));</div><div class='add'>+		return QLA_ERROR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (m_hdr-&gt;read_data_size % 16) {</div><div class='add'>+		DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+				  "[%s]: Read data[0x%x] not multiple of 16 bytes\n",</div><div class='add'>+				  __func__, m_hdr-&gt;read_data_size));</div><div class='add'>+		return QLA_ERROR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+			  "[%s]: rdmem_addr: 0x%x, read_data_size: 0x%x, loop_cnt: 0x%x\n",</div><div class='add'>+			  __func__, r_addr, m_hdr-&gt;read_data_size, loop_cnt));</div><div class='add'>+</div><div class='add'>+	write_lock_irqsave(&amp;ha-&gt;hw_lock, flags);</div><div class='add'>+	for (i = 0; i &lt; loop_cnt; i++) {</div><div class='add'>+		qla4_8xxx_md_rw_32(ha, MD_MIU_TEST_AGT_ADDR_LO, r_addr, 1);</div><div class='add'>+		r_value = 0;</div><div class='add'>+		qla4_8xxx_md_rw_32(ha, MD_MIU_TEST_AGT_ADDR_HI, r_value, 1);</div><div class='add'>+		r_value = MIU_TA_CTL_ENABLE;</div><div class='add'>+		qla4_8xxx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL, r_value, 1);</div><div class='add'>+		r_value = MIU_TA_CTL_START | MIU_TA_CTL_ENABLE;</div><div class='add'>+		qla4_8xxx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL, r_value, 1);</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; MAX_CTL_CHECK; j++) {</div><div class='add'>+			r_value = qla4_8xxx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL,</div><div class='add'>+						     0, 0);</div><div class='add'>+			if ((r_value &amp; MIU_TA_CTL_BUSY) == 0)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (j &gt;= MAX_CTL_CHECK) {</div><div class='add'>+			printk_ratelimited(KERN_ERR</div><div class='add'>+					   "%s: failed to read through agent\n",</div><div class='add'>+					    __func__);</div><div class='add'>+			write_unlock_irqrestore(&amp;ha-&gt;hw_lock, flags);</div><div class='add'>+			return QLA_SUCCESS;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; 4; j++) {</div><div class='add'>+			r_data = qla4_8xxx_md_rw_32(ha,</div><div class='add'>+						    MD_MIU_TEST_AGT_RDDATA[j],</div><div class='add'>+						    0, 0);</div><div class='add'>+			*data_ptr++ = cpu_to_le32(r_data);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		r_addr += 16;</div><div class='add'>+	}</div><div class='add'>+	write_unlock_irqrestore(&amp;ha-&gt;hw_lock, flags);</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Leaving fn: %s datacount: 0x%x\n",</div><div class='add'>+			  __func__, (loop_cnt * 16)));</div><div class='add'>+</div><div class='add'>+	*d_ptr = data_ptr;</div><div class='add'>+	return QLA_SUCCESS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ql4_8xxx_mark_entry_skipped(struct scsi_qla_host *ha,</div><div class='add'>+				struct qla82xx_minidump_entry_hdr *entry_hdr,</div><div class='add'>+				int index)</div><div class='add'>+{</div><div class='add'>+	entry_hdr-&gt;d_ctrl.driver_flags |= QLA82XX_DBG_SKIPPED_FLAG;</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+			  "scsi(%ld): Skipping entry[%d]: ETYPE[0x%x]-ELEVEL[0x%x]\n",</div><div class='add'>+			  ha-&gt;host_no, index, entry_hdr-&gt;entry_type,</div><div class='add'>+			  entry_hdr-&gt;d_ctrl.entry_capture_mask));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * qla82xx_collect_md_data - Retrieve firmware minidump data.</div><div class='add'>+ * @ha: pointer to adapter structure</div><div class='add'>+ **/</div><div class='add'>+static int qla4_8xxx_collect_md_data(struct scsi_qla_host *ha)</div><div class='add'>+{</div><div class='add'>+	int num_entry_hdr = 0;</div><div class='add'>+	struct qla82xx_minidump_entry_hdr *entry_hdr;</div><div class='add'>+	struct qla4_8xxx_minidump_template_hdr *tmplt_hdr;</div><div class='add'>+	uint32_t *data_ptr;</div><div class='add'>+	uint32_t data_collected = 0;</div><div class='add'>+	int i, rval = QLA_ERROR;</div><div class='add'>+	uint64_t now;</div><div class='add'>+	uint32_t timestamp;</div><div class='add'>+</div><div class='add'>+	if (!ha-&gt;fw_dump) {</div><div class='add'>+		ql4_printk(KERN_INFO, ha, "%s(%ld) No buffer to dump\n",</div><div class='add'>+			   __func__, ha-&gt;host_no);</div><div class='add'>+		return rval;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tmplt_hdr = (struct qla4_8xxx_minidump_template_hdr *)</div><div class='add'>+						ha-&gt;fw_dump_tmplt_hdr;</div><div class='add'>+	data_ptr = (uint32_t *)((uint8_t *)ha-&gt;fw_dump +</div><div class='add'>+						ha-&gt;fw_dump_tmplt_size);</div><div class='add'>+	data_collected += ha-&gt;fw_dump_tmplt_size;</div><div class='add'>+</div><div class='add'>+	num_entry_hdr = tmplt_hdr-&gt;num_of_entries;</div><div class='add'>+	ql4_printk(KERN_INFO, ha, "[%s]: starting data ptr: %p\n",</div><div class='add'>+		   __func__, data_ptr);</div><div class='add'>+	ql4_printk(KERN_INFO, ha,</div><div class='add'>+		   "[%s]: no of entry headers in Template: 0x%x\n",</div><div class='add'>+		   __func__, num_entry_hdr);</div><div class='add'>+	ql4_printk(KERN_INFO, ha, "[%s]: Capture Mask obtained: 0x%x\n",</div><div class='add'>+		   __func__, ha-&gt;fw_dump_capture_mask);</div><div class='add'>+	ql4_printk(KERN_INFO, ha, "[%s]: Total_data_size 0x%x, %d obtained\n",</div><div class='add'>+		   __func__, ha-&gt;fw_dump_size, ha-&gt;fw_dump_size);</div><div class='add'>+</div><div class='add'>+	/* Update current timestamp before taking dump */</div><div class='add'>+	now = get_jiffies_64();</div><div class='add'>+	timestamp = (u32)(jiffies_to_msecs(now) / 1000);</div><div class='add'>+	tmplt_hdr-&gt;driver_timestamp = timestamp;</div><div class='add'>+</div><div class='add'>+	entry_hdr = (struct qla82xx_minidump_entry_hdr *)</div><div class='add'>+					(((uint8_t *)ha-&gt;fw_dump_tmplt_hdr) +</div><div class='add'>+					 tmplt_hdr-&gt;first_entry_offset);</div><div class='add'>+</div><div class='add'>+	/* Walk through the entry headers - validate/perform required action */</div><div class='add'>+	for (i = 0; i &lt; num_entry_hdr; i++) {</div><div class='add'>+		if (data_collected &gt;= ha-&gt;fw_dump_size) {</div><div class='add'>+			ql4_printk(KERN_INFO, ha,</div><div class='add'>+				   "Data collected: [0x%x], Total Dump size: [0x%x]\n",</div><div class='add'>+				   data_collected, ha-&gt;fw_dump_size);</div><div class='add'>+			return rval;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!(entry_hdr-&gt;d_ctrl.entry_capture_mask &amp;</div><div class='add'>+		      ha-&gt;fw_dump_capture_mask)) {</div><div class='add'>+			entry_hdr-&gt;d_ctrl.driver_flags |=</div><div class='add'>+						QLA82XX_DBG_SKIPPED_FLAG;</div><div class='add'>+			goto skip_nxt_entry;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+				  "Data collected: [0x%x], Dump size left:[0x%x]\n",</div><div class='add'>+				  data_collected,</div><div class='add'>+				  (ha-&gt;fw_dump_size - data_collected)));</div><div class='add'>+</div><div class='add'>+		/* Decode the entry type and take required action to capture</div><div class='add'>+		 * debug data</div><div class='add'>+		 */</div><div class='add'>+		switch (entry_hdr-&gt;entry_type) {</div><div class='add'>+		case QLA82XX_RDEND:</div><div class='add'>+			ql4_8xxx_mark_entry_skipped(ha, entry_hdr, i);</div><div class='add'>+			break;</div><div class='add'>+		case QLA82XX_CNTRL:</div><div class='add'>+			rval = qla4_8xxx_minidump_process_control(ha,</div><div class='add'>+								  entry_hdr);</div><div class='add'>+			if (rval != QLA_SUCCESS) {</div><div class='add'>+				ql4_8xxx_mark_entry_skipped(ha, entry_hdr, i);</div><div class='add'>+				goto md_failed;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case QLA82XX_RDCRB:</div><div class='add'>+			qla4_8xxx_minidump_process_rdcrb(ha, entry_hdr,</div><div class='add'>+							 &amp;data_ptr);</div><div class='add'>+			break;</div><div class='add'>+		case QLA82XX_RDMEM:</div><div class='add'>+			rval = qla4_8xxx_minidump_process_rdmem(ha, entry_hdr,</div><div class='add'>+								&amp;data_ptr);</div><div class='add'>+			if (rval != QLA_SUCCESS) {</div><div class='add'>+				ql4_8xxx_mark_entry_skipped(ha, entry_hdr, i);</div><div class='add'>+				goto md_failed;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case QLA82XX_BOARD:</div><div class='add'>+		case QLA82XX_RDROM:</div><div class='add'>+			qla4_8xxx_minidump_process_rdrom(ha, entry_hdr,</div><div class='add'>+							 &amp;data_ptr);</div><div class='add'>+			break;</div><div class='add'>+		case QLA82XX_L2DTG:</div><div class='add'>+		case QLA82XX_L2ITG:</div><div class='add'>+		case QLA82XX_L2DAT:</div><div class='add'>+		case QLA82XX_L2INS:</div><div class='add'>+			rval = qla4_8xxx_minidump_process_l2tag(ha, entry_hdr,</div><div class='add'>+								&amp;data_ptr);</div><div class='add'>+			if (rval != QLA_SUCCESS) {</div><div class='add'>+				ql4_8xxx_mark_entry_skipped(ha, entry_hdr, i);</div><div class='add'>+				goto md_failed;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case QLA82XX_L1DAT:</div><div class='add'>+		case QLA82XX_L1INS:</div><div class='add'>+			qla4_8xxx_minidump_process_l1cache(ha, entry_hdr,</div><div class='add'>+							   &amp;data_ptr);</div><div class='add'>+			break;</div><div class='add'>+		case QLA82XX_RDOCM:</div><div class='add'>+			qla4_8xxx_minidump_process_rdocm(ha, entry_hdr,</div><div class='add'>+							 &amp;data_ptr);</div><div class='add'>+			break;</div><div class='add'>+		case QLA82XX_RDMUX:</div><div class='add'>+			qla4_8xxx_minidump_process_rdmux(ha, entry_hdr,</div><div class='add'>+							 &amp;data_ptr);</div><div class='add'>+			break;</div><div class='add'>+		case QLA82XX_QUEUE:</div><div class='add'>+			qla4_8xxx_minidump_process_queue(ha, entry_hdr,</div><div class='add'>+							 &amp;data_ptr);</div><div class='add'>+			break;</div><div class='add'>+		case QLA82XX_RDNOP:</div><div class='add'>+		default:</div><div class='add'>+			ql4_8xxx_mark_entry_skipped(ha, entry_hdr, i);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		data_collected = (uint8_t *)data_ptr -</div><div class='add'>+				 ((uint8_t *)((uint8_t *)ha-&gt;fw_dump +</div><div class='add'>+						ha-&gt;fw_dump_tmplt_size));</div><div class='add'>+skip_nxt_entry:</div><div class='add'>+		/*  next entry in the template */</div><div class='add'>+		entry_hdr = (struct qla82xx_minidump_entry_hdr *)</div><div class='add'>+				(((uint8_t *)entry_hdr) +</div><div class='add'>+				 entry_hdr-&gt;entry_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((data_collected + ha-&gt;fw_dump_tmplt_size) != ha-&gt;fw_dump_size) {</div><div class='add'>+		ql4_printk(KERN_INFO, ha,</div><div class='add'>+			   "Dump data mismatch: Data collected: [0x%x], total_data_size:[0x%x]\n",</div><div class='add'>+			   data_collected, ha-&gt;fw_dump_size);</div><div class='add'>+		goto md_failed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Leaving fn: %s Last entry: 0x%x\n",</div><div class='add'>+			  __func__, i));</div><div class='add'>+md_failed:</div><div class='add'>+	return rval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * qla4_8xxx_uevent_emit - Send uevent when the firmware dump is ready.</div><div class='add'>+ * @ha: pointer to adapter structure</div><div class='add'>+ **/</div><div class='add'>+static void qla4_8xxx_uevent_emit(struct scsi_qla_host *ha, u32 code)</div><div class='add'>+{</div><div class='add'>+	char event_string[40];</div><div class='add'>+	char *envp[] = { event_string, NULL };</div><div class='add'>+</div><div class='add'>+	switch (code) {</div><div class='add'>+	case QL4_UEVENT_CODE_FW_DUMP:</div><div class='add'>+		snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",</div><div class='add'>+			 ha-&gt;host_no);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/*do nothing*/</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kobject_uevent_env(&amp;(&amp;ha-&gt;pdev-&gt;dev)-&gt;kobj, KOBJ_CHANGE, envp);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * qla4_8xxx_device_bootstrap - Initialize device, set DEV_READY, start fw</div><div class='ctx'>  * @ha: pointer to adapter structure</div><div class='hunk'>@@ -1659,6 +2324,15 @@ dev_initialize:</div><div class='ctx'> 	qla4_8xxx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, QLA82XX_IDC_VERSION);</div><div class='ctx'> </div><div class='ctx'> 	qla4_8xxx_idc_unlock(ha);</div><div class='add'>+	if (ql4xenablemd &amp;&amp; test_bit(AF_FW_RECOVERY, &amp;ha-&gt;flags) &amp;&amp;</div><div class='add'>+	    !test_and_set_bit(AF_82XX_FW_DUMPED, &amp;ha-&gt;flags)) {</div><div class='add'>+		if (!qla4_8xxx_collect_md_data(ha)) {</div><div class='add'>+			qla4_8xxx_uevent_emit(ha, QL4_UEVENT_CODE_FW_DUMP);</div><div class='add'>+		} else {</div><div class='add'>+			ql4_printk(KERN_INFO, ha, "Unable to collect minidump\n");</div><div class='add'>+			clear_bit(AF_82XX_FW_DUMPED, &amp;ha-&gt;flags);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	rval = qla4_8xxx_try_start_fw(ha);</div><div class='ctx'> 	qla4_8xxx_idc_lock(ha);</div><div class='ctx'> </div><div class='hunk'>@@ -1686,6 +2360,7 @@ static void</div><div class='ctx'> qla4_8xxx_need_reset_handler(struct scsi_qla_host *ha)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t dev_state, drv_state, drv_active;</div><div class='add'>+	uint32_t active_mask = 0xFFFFFFFF;</div><div class='ctx'> 	unsigned long reset_timeout;</div><div class='ctx'> </div><div class='ctx'> 	ql4_printk(KERN_INFO, ha,</div><div class='hunk'>@@ -1697,7 +2372,14 @@ qla4_8xxx_need_reset_handler(struct scsi_qla_host *ha)</div><div class='ctx'> 		qla4_8xxx_idc_lock(ha);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	qla4_8xxx_set_rst_ready(ha);</div><div class='add'>+	if (!test_bit(AF_82XX_RST_OWNER, &amp;ha-&gt;flags)) {</div><div class='add'>+		DEBUG2(ql4_printk(KERN_INFO, ha,</div><div class='add'>+				  "%s(%ld): reset acknowledged\n",</div><div class='add'>+				  __func__, ha-&gt;host_no));</div><div class='add'>+		qla4_8xxx_set_rst_ready(ha);</div><div class='add'>+	} else {</div><div class='add'>+		active_mask = (~(1 &lt;&lt; (ha-&gt;func_num * 4)));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* wait for 10 seconds for reset ack from all functions */</div><div class='ctx'> 	reset_timeout = jiffies + (ha-&gt;nx_reset_timeout * HZ);</div><div class='hunk'>@@ -1709,12 +2391,24 @@ qla4_8xxx_need_reset_handler(struct scsi_qla_host *ha)</div><div class='ctx'> 		"%s(%ld): drv_state = 0x%x, drv_active = 0x%x\n",</div><div class='ctx'> 		__func__, ha-&gt;host_no, drv_state, drv_active);</div><div class='ctx'> </div><div class='del'>-	while (drv_state != drv_active) {</div><div class='add'>+	while (drv_state != (drv_active &amp; active_mask)) {</div><div class='ctx'> 		if (time_after_eq(jiffies, reset_timeout)) {</div><div class='del'>-			printk("%s: RESET TIMEOUT!\n", DRIVER_NAME);</div><div class='add'>+			ql4_printk(KERN_INFO, ha,</div><div class='add'>+				   "%s: RESET TIMEOUT! drv_state: 0x%08x, drv_active: 0x%08x\n",</div><div class='add'>+				   DRIVER_NAME, drv_state, drv_active);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * When reset_owner times out, check which functions</div><div class='add'>+		 * acked/did not ack</div><div class='add'>+		 */</div><div class='add'>+		if (test_bit(AF_82XX_RST_OWNER, &amp;ha-&gt;flags)) {</div><div class='add'>+			ql4_printk(KERN_INFO, ha,</div><div class='add'>+				   "%s(%ld): drv_state = 0x%x, drv_active = 0x%x\n",</div><div class='add'>+				   __func__, ha-&gt;host_no, drv_state,</div><div class='add'>+				   drv_active);</div><div class='add'>+		}</div><div class='ctx'> 		qla4_8xxx_idc_unlock(ha);</div><div class='ctx'> 		msleep(1000);</div><div class='ctx'> 		qla4_8xxx_idc_lock(ha);</div><div class='hunk'>@@ -1723,14 +2417,18 @@ qla4_8xxx_need_reset_handler(struct scsi_qla_host *ha)</div><div class='ctx'> 		drv_active = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Clear RESET OWNER as we are not going to use it any further */</div><div class='add'>+	clear_bit(AF_82XX_RST_OWNER, &amp;ha-&gt;flags);</div><div class='add'>+</div><div class='ctx'> 	dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);</div><div class='del'>-	ql4_printk(KERN_INFO, ha, "3:Device state is 0x%x = %s\n", dev_state,</div><div class='del'>-		dev_state &lt; MAX_STATES ? qdev_state[dev_state] : "Unknown");</div><div class='add'>+	ql4_printk(KERN_INFO, ha, "Device state is 0x%x = %s\n", dev_state,</div><div class='add'>+		   dev_state &lt; MAX_STATES ? qdev_state[dev_state] : "Unknown");</div><div class='ctx'> </div><div class='ctx'> 	/* Force to DEV_COLD unless someone else is starting a reset */</div><div class='ctx'> 	if (dev_state != QLA82XX_DEV_INITIALIZING) {</div><div class='ctx'> 		ql4_printk(KERN_INFO, ha, "HW State: COLD/RE-INIT\n");</div><div class='ctx'> 		qla4_8xxx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA82XX_DEV_COLD);</div><div class='add'>+		qla4_8xxx_set_rst_ready(ha);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1765,8 +2463,9 @@ int qla4_8xxx_device_state_handler(struct scsi_qla_host *ha)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);</div><div class='del'>-	ql4_printk(KERN_INFO, ha, "1:Device state is 0x%x = %s\n", dev_state,</div><div class='del'>-		dev_state &lt; MAX_STATES ? qdev_state[dev_state] : "Unknown");</div><div class='add'>+	DEBUG2(ql4_printk(KERN_INFO, ha, "Device state is 0x%x = %s\n",</div><div class='add'>+			  dev_state, dev_state &lt; MAX_STATES ?</div><div class='add'>+			  qdev_state[dev_state] : "Unknown"));</div><div class='ctx'> </div><div class='ctx'> 	/* wait for 30 seconds for device to go ready */</div><div class='ctx'> 	dev_init_timeout = jiffies + (ha-&gt;nx_dev_init_timeout * HZ);</div><div class='hunk'>@@ -1775,15 +2474,19 @@ int qla4_8xxx_device_state_handler(struct scsi_qla_host *ha)</div><div class='ctx'> 	while (1) {</div><div class='ctx'> </div><div class='ctx'> 		if (time_after_eq(jiffies, dev_init_timeout)) {</div><div class='del'>-			ql4_printk(KERN_WARNING, ha, "Device init failed!\n");</div><div class='add'>+			ql4_printk(KERN_WARNING, ha,</div><div class='add'>+				   "%s: Device Init Failed 0x%x = %s\n",</div><div class='add'>+				   DRIVER_NAME,</div><div class='add'>+				   dev_state, dev_state &lt; MAX_STATES ?</div><div class='add'>+				   qdev_state[dev_state] : "Unknown");</div><div class='ctx'> 			qla4_8xxx_wr_32(ha, QLA82XX_CRB_DEV_STATE,</div><div class='ctx'> 				QLA82XX_DEV_FAILED);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);</div><div class='del'>-		ql4_printk(KERN_INFO, ha,</div><div class='del'>-		    "2:Device state is 0x%x = %s\n", dev_state,</div><div class='del'>-		    dev_state &lt; MAX_STATES ? qdev_state[dev_state] : "Unknown");</div><div class='add'>+		ql4_printk(KERN_INFO, ha, "Device state is 0x%x = %s\n",</div><div class='add'>+			   dev_state, dev_state &lt; MAX_STATES ?</div><div class='add'>+			   qdev_state[dev_state] : "Unknown");</div><div class='ctx'> </div><div class='ctx'> 		/* NOTE: Make sure idc unlocked upon exit of switch statement */</div><div class='ctx'> 		switch (dev_state) {</div><div class='hunk'>@@ -2184,6 +2887,7 @@ qla4_8xxx_isp_reset(struct scsi_qla_host *ha)</div><div class='ctx'> 		ql4_printk(KERN_INFO, ha, "HW State: NEED RESET\n");</div><div class='ctx'> 		qla4_8xxx_wr_32(ha, QLA82XX_CRB_DEV_STATE,</div><div class='ctx'> 		    QLA82XX_DEV_NEED_RESET);</div><div class='add'>+		set_bit(AF_82XX_RST_OWNER, &amp;ha-&gt;flags);</div><div class='ctx'> 	} else</div><div class='ctx'> 		ql4_printk(KERN_INFO, ha, "HW State: DEVICE INITIALIZING\n");</div><div class='ctx'> </div><div class='hunk'>@@ -2195,8 +2899,10 @@ qla4_8xxx_isp_reset(struct scsi_qla_host *ha)</div><div class='ctx'> 	qla4_8xxx_clear_rst_ready(ha);</div><div class='ctx'> 	qla4_8xxx_idc_unlock(ha);</div><div class='ctx'> </div><div class='del'>-	if (rval == QLA_SUCCESS)</div><div class='add'>+	if (rval == QLA_SUCCESS) {</div><div class='add'>+		ql4_printk(KERN_INFO, ha, "Clearing AF_RECOVERY in qla4_8xxx_isp_reset\n");</div><div class='ctx'> 		clear_bit(AF_FW_RECOVERY, &amp;ha-&gt;flags);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return rval;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/scsi/qla4xxx/ql4_nx.h b/drivers/scsi/qla4xxx/ql4_nx.h<br/>index dc7500e47b8b..30258479f100 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_nx.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla4xxx/ql4_nx.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_nx.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_nx.h</a></div><div class='hunk'>@@ -792,4 +792,196 @@ struct crb_addr_pair {</div><div class='ctx'> #define MIU_TEST_AGT_WRDATA_UPPER_LO	(0x0b0)</div><div class='ctx'> #define	MIU_TEST_AGT_WRDATA_UPPER_HI	(0x0b4)</div><div class='ctx'> </div><div class='add'>+/* Minidump related */</div><div class='add'>+</div><div class='add'>+/* Entry Type Defines */</div><div class='add'>+#define QLA82XX_RDNOP	0</div><div class='add'>+#define QLA82XX_RDCRB	1</div><div class='add'>+#define QLA82XX_RDMUX	2</div><div class='add'>+#define QLA82XX_QUEUE	3</div><div class='add'>+#define QLA82XX_BOARD	4</div><div class='add'>+#define QLA82XX_RDOCM	6</div><div class='add'>+#define QLA82XX_PREGS	7</div><div class='add'>+#define QLA82XX_L1DTG	8</div><div class='add'>+#define QLA82XX_L1ITG	9</div><div class='add'>+#define QLA82XX_L1DAT	11</div><div class='add'>+#define QLA82XX_L1INS	12</div><div class='add'>+#define QLA82XX_L2DTG	21</div><div class='add'>+#define QLA82XX_L2ITG	22</div><div class='add'>+#define QLA82XX_L2DAT	23</div><div class='add'>+#define QLA82XX_L2INS	24</div><div class='add'>+#define QLA82XX_RDROM	71</div><div class='add'>+#define QLA82XX_RDMEM	72</div><div class='add'>+#define QLA82XX_CNTRL	98</div><div class='add'>+#define QLA82XX_RDEND	255</div><div class='add'>+</div><div class='add'>+/* Opcodes for Control Entries.</div><div class='add'>+ * These Flags are bit fields.</div><div class='add'>+ */</div><div class='add'>+#define QLA82XX_DBG_OPCODE_WR		0x01</div><div class='add'>+#define QLA82XX_DBG_OPCODE_RW		0x02</div><div class='add'>+#define QLA82XX_DBG_OPCODE_AND		0x04</div><div class='add'>+#define QLA82XX_DBG_OPCODE_OR		0x08</div><div class='add'>+#define QLA82XX_DBG_OPCODE_POLL		0x10</div><div class='add'>+#define QLA82XX_DBG_OPCODE_RDSTATE	0x20</div><div class='add'>+#define QLA82XX_DBG_OPCODE_WRSTATE	0x40</div><div class='add'>+#define QLA82XX_DBG_OPCODE_MDSTATE	0x80</div><div class='add'>+</div><div class='add'>+/* Driver Flags */</div><div class='add'>+#define QLA82XX_DBG_SKIPPED_FLAG	0x80 /* driver skipped this entry  */</div><div class='add'>+#define QLA82XX_DBG_SIZE_ERR_FLAG	0x40 /* Entry vs Capture size</div><div class='add'>+					      * mismatch */</div><div class='add'>+</div><div class='add'>+/* Driver_code is for driver to write some info about the entry</div><div class='add'>+ * currently not used.</div><div class='add'>+ */</div><div class='add'>+struct qla82xx_minidump_entry_hdr {</div><div class='add'>+	uint32_t entry_type;</div><div class='add'>+	uint32_t entry_size;</div><div class='add'>+	uint32_t entry_capture_size;</div><div class='add'>+	struct {</div><div class='add'>+		uint8_t entry_capture_mask;</div><div class='add'>+		uint8_t entry_code;</div><div class='add'>+		uint8_t driver_code;</div><div class='add'>+		uint8_t driver_flags;</div><div class='add'>+	} d_ctrl;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*  Read CRB entry header */</div><div class='add'>+struct qla82xx_minidump_entry_crb {</div><div class='add'>+	struct qla82xx_minidump_entry_hdr h;</div><div class='add'>+	uint32_t addr;</div><div class='add'>+	struct {</div><div class='add'>+		uint8_t addr_stride;</div><div class='add'>+		uint8_t state_index_a;</div><div class='add'>+		uint16_t poll_timeout;</div><div class='add'>+	} crb_strd;</div><div class='add'>+	uint32_t data_size;</div><div class='add'>+	uint32_t op_count;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		uint8_t opcode;</div><div class='add'>+		uint8_t state_index_v;</div><div class='add'>+		uint8_t shl;</div><div class='add'>+		uint8_t shr;</div><div class='add'>+	} crb_ctrl;</div><div class='add'>+</div><div class='add'>+	uint32_t value_1;</div><div class='add'>+	uint32_t value_2;</div><div class='add'>+	uint32_t value_3;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qla82xx_minidump_entry_cache {</div><div class='add'>+	struct qla82xx_minidump_entry_hdr h;</div><div class='add'>+	uint32_t tag_reg_addr;</div><div class='add'>+	struct {</div><div class='add'>+		uint16_t tag_value_stride;</div><div class='add'>+		uint16_t init_tag_value;</div><div class='add'>+	} addr_ctrl;</div><div class='add'>+	uint32_t data_size;</div><div class='add'>+	uint32_t op_count;</div><div class='add'>+	uint32_t control_addr;</div><div class='add'>+	struct {</div><div class='add'>+		uint16_t write_value;</div><div class='add'>+		uint8_t poll_mask;</div><div class='add'>+		uint8_t poll_wait;</div><div class='add'>+	} cache_ctrl;</div><div class='add'>+	uint32_t read_addr;</div><div class='add'>+	struct {</div><div class='add'>+		uint8_t read_addr_stride;</div><div class='add'>+		uint8_t read_addr_cnt;</div><div class='add'>+		uint16_t rsvd_1;</div><div class='add'>+	} read_ctrl;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Read OCM */</div><div class='add'>+struct qla82xx_minidump_entry_rdocm {</div><div class='add'>+	struct qla82xx_minidump_entry_hdr h;</div><div class='add'>+	uint32_t rsvd_0;</div><div class='add'>+	uint32_t rsvd_1;</div><div class='add'>+	uint32_t data_size;</div><div class='add'>+	uint32_t op_count;</div><div class='add'>+	uint32_t rsvd_2;</div><div class='add'>+	uint32_t rsvd_3;</div><div class='add'>+	uint32_t read_addr;</div><div class='add'>+	uint32_t read_addr_stride;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Read Memory */</div><div class='add'>+struct qla82xx_minidump_entry_rdmem {</div><div class='add'>+	struct qla82xx_minidump_entry_hdr h;</div><div class='add'>+	uint32_t rsvd[6];</div><div class='add'>+	uint32_t read_addr;</div><div class='add'>+	uint32_t read_data_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Read ROM */</div><div class='add'>+struct qla82xx_minidump_entry_rdrom {</div><div class='add'>+	struct qla82xx_minidump_entry_hdr h;</div><div class='add'>+	uint32_t rsvd[6];</div><div class='add'>+	uint32_t read_addr;</div><div class='add'>+	uint32_t read_data_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Mux entry */</div><div class='add'>+struct qla82xx_minidump_entry_mux {</div><div class='add'>+	struct qla82xx_minidump_entry_hdr h;</div><div class='add'>+	uint32_t select_addr;</div><div class='add'>+	uint32_t rsvd_0;</div><div class='add'>+	uint32_t data_size;</div><div class='add'>+	uint32_t op_count;</div><div class='add'>+	uint32_t select_value;</div><div class='add'>+	uint32_t select_value_stride;</div><div class='add'>+	uint32_t read_addr;</div><div class='add'>+	uint32_t rsvd_1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Queue entry */</div><div class='add'>+struct qla82xx_minidump_entry_queue {</div><div class='add'>+	struct qla82xx_minidump_entry_hdr h;</div><div class='add'>+	uint32_t select_addr;</div><div class='add'>+	struct {</div><div class='add'>+		uint16_t queue_id_stride;</div><div class='add'>+		uint16_t rsvd_0;</div><div class='add'>+	} q_strd;</div><div class='add'>+	uint32_t data_size;</div><div class='add'>+	uint32_t op_count;</div><div class='add'>+	uint32_t rsvd_1;</div><div class='add'>+	uint32_t rsvd_2;</div><div class='add'>+	uint32_t read_addr;</div><div class='add'>+	struct {</div><div class='add'>+		uint8_t read_addr_stride;</div><div class='add'>+		uint8_t read_addr_cnt;</div><div class='add'>+		uint16_t rsvd_3;</div><div class='add'>+	} rd_strd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define QLA82XX_MINIDUMP_OCM0_SIZE		(256 * 1024)</div><div class='add'>+#define QLA82XX_MINIDUMP_L1C_SIZE		(256 * 1024)</div><div class='add'>+#define QLA82XX_MINIDUMP_L2C_SIZE		1572864</div><div class='add'>+#define QLA82XX_MINIDUMP_COMMON_STR_SIZE	0</div><div class='add'>+#define QLA82XX_MINIDUMP_FCOE_STR_SIZE		0</div><div class='add'>+#define QLA82XX_MINIDUMP_MEM_SIZE		0</div><div class='add'>+#define QLA82XX_MAX_ENTRY_HDR			4</div><div class='add'>+</div><div class='add'>+struct qla82xx_minidump {</div><div class='add'>+	uint32_t md_ocm0_data[QLA82XX_MINIDUMP_OCM0_SIZE];</div><div class='add'>+	uint32_t md_l1c_data[QLA82XX_MINIDUMP_L1C_SIZE];</div><div class='add'>+	uint32_t md_l2c_data[QLA82XX_MINIDUMP_L2C_SIZE];</div><div class='add'>+	uint32_t md_cs_data[QLA82XX_MINIDUMP_COMMON_STR_SIZE];</div><div class='add'>+	uint32_t md_fcoes_data[QLA82XX_MINIDUMP_FCOE_STR_SIZE];</div><div class='add'>+	uint32_t md_mem_data[QLA82XX_MINIDUMP_MEM_SIZE];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE	0x129</div><div class='add'>+#define RQST_TMPLT_SIZE				0x0</div><div class='add'>+#define RQST_TMPLT				0x1</div><div class='add'>+#define MD_DIRECT_ROM_WINDOW			0x42110030</div><div class='add'>+#define MD_DIRECT_ROM_READ_BASE			0x42150000</div><div class='add'>+#define MD_MIU_TEST_AGT_CTRL			0x41000090</div><div class='add'>+#define MD_MIU_TEST_AGT_ADDR_LO			0x41000094</div><div class='add'>+#define MD_MIU_TEST_AGT_ADDR_HI			0x41000098</div><div class='add'>+</div><div class='add'>+static const int MD_MIU_TEST_AGT_RDDATA[] = { 0x410000A8,</div><div class='add'>+				0x410000AC, 0x410000B8, 0x410000BC };</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c<br/>index ee47820c30a6..cd15678f9ada 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_os.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla4xxx/ql4_os.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_os.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_os.c</a></div><div class='hunk'>@@ -68,12 +68,34 @@ MODULE_PARM_DESC(ql4xmaxqdepth,</div><div class='ctx'> 		 " Maximum queue depth to report for target devices.\n"</div><div class='ctx'> 		 "\t\t  Default: 32.");</div><div class='ctx'> </div><div class='add'>+static int ql4xqfulltracking = 1;</div><div class='add'>+module_param(ql4xqfulltracking, int, S_IRUGO | S_IWUSR);</div><div class='add'>+MODULE_PARM_DESC(ql4xqfulltracking,</div><div class='add'>+		 " Enable or disable dynamic tracking and adjustment of\n"</div><div class='add'>+		 "\t\t scsi device queue depth.\n"</div><div class='add'>+		 "\t\t  0 - Disable.\n"</div><div class='add'>+		 "\t\t  1 - Enable. (Default)");</div><div class='add'>+</div><div class='ctx'> static int ql4xsess_recovery_tmo = QL4_SESS_RECOVERY_TMO;</div><div class='ctx'> module_param(ql4xsess_recovery_tmo, int, S_IRUGO);</div><div class='ctx'> MODULE_PARM_DESC(ql4xsess_recovery_tmo,</div><div class='ctx'> 		" Target Session Recovery Timeout.\n"</div><div class='ctx'> 		"\t\t  Default: 120 sec.");</div><div class='ctx'> </div><div class='add'>+int ql4xmdcapmask = 0x1F;</div><div class='add'>+module_param(ql4xmdcapmask, int, S_IRUGO);</div><div class='add'>+MODULE_PARM_DESC(ql4xmdcapmask,</div><div class='add'>+		 " Set the Minidump driver capture mask level.\n"</div><div class='add'>+		 "\t\t  Default is 0x1F.\n"</div><div class='add'>+		 "\t\t  Can be set to 0x3, 0x7, 0xF, 0x1F, 0x3F, 0x7F");</div><div class='add'>+</div><div class='add'>+int ql4xenablemd = 1;</div><div class='add'>+module_param(ql4xenablemd, int, S_IRUGO | S_IWUSR);</div><div class='add'>+MODULE_PARM_DESC(ql4xenablemd,</div><div class='add'>+		 " Set to enable minidump.\n"</div><div class='add'>+		 "\t\t  0 - disable minidump\n"</div><div class='add'>+		 "\t\t  1 - enable minidump (Default)");</div><div class='add'>+</div><div class='ctx'> static int qla4xxx_wait_for_hba_online(struct scsi_qla_host *ha);</div><div class='ctx'> /*</div><div class='ctx'>  * SCSI host template entry points</div><div class='hunk'>@@ -140,6 +162,8 @@ static int qla4xxx_slave_configure(struct scsi_device *device);</div><div class='ctx'> static void qla4xxx_slave_destroy(struct scsi_device *sdev);</div><div class='ctx'> static umode_t ql4_attr_is_visible(int param_type, int param);</div><div class='ctx'> static int qla4xxx_host_reset(struct Scsi_Host *shost, int reset_type);</div><div class='add'>+static int qla4xxx_change_queue_depth(struct scsi_device *sdev, int qdepth,</div><div class='add'>+				      int reason);</div><div class='ctx'> </div><div class='ctx'> static struct qla4_8xxx_legacy_intr_set legacy_intr[] =</div><div class='ctx'>     QLA82XX_LEGACY_INTR_CONFIG;</div><div class='hunk'>@@ -159,6 +183,7 @@ static struct scsi_host_template qla4xxx_driver_template = {</div><div class='ctx'> 	.slave_configure	= qla4xxx_slave_configure,</div><div class='ctx'> 	.slave_alloc		= qla4xxx_slave_alloc,</div><div class='ctx'> 	.slave_destroy		= qla4xxx_slave_destroy,</div><div class='add'>+	.change_queue_depth	= qla4xxx_change_queue_depth,</div><div class='ctx'> </div><div class='ctx'> 	.this_id		= -1,</div><div class='ctx'> 	.cmd_per_lun		= 3,</div><div class='hunk'>@@ -1555,19 +1580,53 @@ static void qla4xxx_session_destroy(struct iscsi_cls_session *cls_sess)</div><div class='ctx'> 	struct iscsi_session *sess;</div><div class='ctx'> 	struct ddb_entry *ddb_entry;</div><div class='ctx'> 	struct scsi_qla_host *ha;</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	unsigned long flags, wtime;</div><div class='add'>+	struct dev_db_entry *fw_ddb_entry = NULL;</div><div class='add'>+	dma_addr_t fw_ddb_entry_dma;</div><div class='add'>+	uint32_t ddb_state;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	DEBUG2(printk(KERN_INFO "Func: %s\n", __func__));</div><div class='ctx'> 	sess = cls_sess-&gt;dd_data;</div><div class='ctx'> 	ddb_entry = sess-&gt;dd_data;</div><div class='ctx'> 	ha = ddb_entry-&gt;ha;</div><div class='ctx'> </div><div class='add'>+	fw_ddb_entry = dma_alloc_coherent(&amp;ha-&gt;pdev-&gt;dev, sizeof(*fw_ddb_entry),</div><div class='add'>+					  &amp;fw_ddb_entry_dma, GFP_KERNEL);</div><div class='add'>+	if (!fw_ddb_entry) {</div><div class='add'>+		ql4_printk(KERN_ERR, ha,</div><div class='add'>+			   "%s: Unable to allocate dma buffer\n", __func__);</div><div class='add'>+		goto destroy_session;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wtime = jiffies + (HZ * LOGOUT_TOV);</div><div class='add'>+	do {</div><div class='add'>+		ret = qla4xxx_get_fwddb_entry(ha, ddb_entry-&gt;fw_ddb_index,</div><div class='add'>+					      fw_ddb_entry, fw_ddb_entry_dma,</div><div class='add'>+					      NULL, NULL, &amp;ddb_state, NULL,</div><div class='add'>+					      NULL, NULL);</div><div class='add'>+		if (ret == QLA_ERROR)</div><div class='add'>+			goto destroy_session;</div><div class='add'>+</div><div class='add'>+		if ((ddb_state == DDB_DS_NO_CONNECTION_ACTIVE) ||</div><div class='add'>+		    (ddb_state == DDB_DS_SESSION_FAILED))</div><div class='add'>+			goto destroy_session;</div><div class='add'>+</div><div class='add'>+		schedule_timeout_uninterruptible(HZ);</div><div class='add'>+	} while ((time_after(wtime, jiffies)));</div><div class='add'>+</div><div class='add'>+destroy_session:</div><div class='ctx'> 	qla4xxx_clear_ddb_entry(ha, ddb_entry-&gt;fw_ddb_index);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ha-&gt;hardware_lock, flags);</div><div class='ctx'> 	qla4xxx_free_ddb(ha, ddb_entry);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ha-&gt;hardware_lock, flags);</div><div class='add'>+</div><div class='ctx'> 	iscsi_session_teardown(cls_sess);</div><div class='add'>+</div><div class='add'>+	if (fw_ddb_entry)</div><div class='add'>+		dma_free_coherent(&amp;ha-&gt;pdev-&gt;dev, sizeof(*fw_ddb_entry),</div><div class='add'>+				  fw_ddb_entry, fw_ddb_entry_dma);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct iscsi_cls_conn *</div><div class='hunk'>@@ -2220,6 +2279,9 @@ static void qla4xxx_mem_free(struct scsi_qla_host *ha)</div><div class='ctx'> 		dma_free_coherent(&amp;ha-&gt;pdev-&gt;dev, ha-&gt;queues_len, ha-&gt;queues,</div><div class='ctx'> 				  ha-&gt;queues_dma);</div><div class='ctx'> </div><div class='add'>+	 if (ha-&gt;fw_dump)</div><div class='add'>+		vfree(ha-&gt;fw_dump);</div><div class='add'>+</div><div class='ctx'> 	ha-&gt;queues_len = 0;</div><div class='ctx'> 	ha-&gt;queues = NULL;</div><div class='ctx'> 	ha-&gt;queues_dma = 0;</div><div class='hunk'>@@ -2229,6 +2291,8 @@ static void qla4xxx_mem_free(struct scsi_qla_host *ha)</div><div class='ctx'> 	ha-&gt;response_dma = 0;</div><div class='ctx'> 	ha-&gt;shadow_regs = NULL;</div><div class='ctx'> 	ha-&gt;shadow_regs_dma = 0;</div><div class='add'>+	ha-&gt;fw_dump = NULL;</div><div class='add'>+	ha-&gt;fw_dump_size = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Free srb pool. */</div><div class='ctx'> 	if (ha-&gt;srb_mempool)</div><div class='hunk'>@@ -5023,6 +5087,8 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	set_bit(AF_INIT_DONE, &amp;ha-&gt;flags);</div><div class='ctx'> </div><div class='add'>+	qla4_8xxx_alloc_sysfs_attr(ha);</div><div class='add'>+</div><div class='ctx'> 	printk(KERN_INFO</div><div class='ctx'> 	       " QLogic iSCSI HBA Driver version: %s\n"</div><div class='ctx'> 	       "  QLogic ISP%04x @ %s, host#=%ld, fw=%02d.%02d.%02d.%02d\n",</div><div class='hunk'>@@ -5149,6 +5215,7 @@ static void __devexit qla4xxx_remove_adapter(struct pci_dev *pdev)</div><div class='ctx'> 		iscsi_boot_destroy_kset(ha-&gt;boot_kset);</div><div class='ctx'> </div><div class='ctx'> 	qla4xxx_destroy_fw_ddb_session(ha);</div><div class='add'>+	qla4_8xxx_free_sysfs_attr(ha);</div><div class='ctx'> </div><div class='ctx'> 	scsi_remove_host(ha-&gt;host);</div><div class='ctx'> </div><div class='hunk'>@@ -5217,6 +5284,15 @@ static void qla4xxx_slave_destroy(struct scsi_device *sdev)</div><div class='ctx'> 	scsi_deactivate_tcq(sdev, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int qla4xxx_change_queue_depth(struct scsi_device *sdev, int qdepth,</div><div class='add'>+				      int reason)</div><div class='add'>+{</div><div class='add'>+	if (!ql4xqfulltracking)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return iscsi_change_queue_depth(sdev, qdepth, reason);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * qla4xxx_del_from_active_array - returns an active srb</div><div class='ctx'>  * @ha: Pointer to host adapter structure.</div><div class='head'>diff --git a/drivers/scsi/qla4xxx/ql4_version.h b/drivers/scsi/qla4xxx/ql4_version.h<br/>index 97b30c108e36..cc1cc3518b87 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_version.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/qla4xxx/ql4_version.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/qla4xxx/ql4_version.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/qla4xxx/ql4_version.h</a></div><div class='hunk'>@@ -5,4 +5,4 @@</div><div class='ctx'>  * See LICENSE.qla4xxx for copyright and licensing details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define QLA4XXX_DRIVER_VERSION	"5.02.00-k16"</div><div class='add'>+#define QLA4XXX_DRIVER_VERSION	"5.02.00-k17"</div><div class='head'>diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c<br/>index 07322ecff90d..61c82a345f82 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/scsi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/scsi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/scsi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi.c</a></div><div class='hunk'>@@ -90,6 +90,12 @@ unsigned int scsi_logging_level;</div><div class='ctx'> EXPORT_SYMBOL(scsi_logging_level);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_PM) || IS_ENABLED(CONFIG_BLK_DEV_SD)</div><div class='add'>+/* sd and scsi_pm need to coordinate flushing async actions */</div><div class='add'>+LIST_HEAD(scsi_sd_probe_domain);</div><div class='add'>+EXPORT_SYMBOL(scsi_sd_probe_domain);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* NB: These are exposed through /proc/scsi/scsi and form part of the ABI.</div><div class='ctx'>  * You may not alter any existing entry (although adding new ones is</div><div class='ctx'>  * encouraged once assigned by ANSI/INCITS T10</div><div class='head'>diff --git a/drivers/scsi/scsi_error.c b/drivers/scsi/scsi_error.c<br/>index 386f0c53bea7..d0f71e5d065f 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/scsi_error.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/scsi_error.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/scsi_error.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_error.c</a></div><div class='hunk'>@@ -664,7 +664,7 @@ static void scsi_abort_eh_cmnd(struct scsi_cmnd *scmd)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * scsi_eh_prep_cmnd  - Save a scsi command info as part of error recory</div><div class='add'>+ * scsi_eh_prep_cmnd  - Save a scsi command info as part of error recovery</div><div class='ctx'>  * @scmd:       SCSI command structure to hijack</div><div class='ctx'>  * @ses:        structure to save restore information</div><div class='ctx'>  * @cmnd:       CDB to send. Can be NULL if no new cmnd is needed</div><div class='hunk'>@@ -739,7 +739,7 @@ void scsi_eh_prep_cmnd(struct scsi_cmnd *scmd, struct scsi_eh_save *ses,</div><div class='ctx'> EXPORT_SYMBOL(scsi_eh_prep_cmnd);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * scsi_eh_restore_cmnd  - Restore a scsi command info as part of error recory</div><div class='add'>+ * scsi_eh_restore_cmnd  - Restore a scsi command info as part of error recovery</div><div class='ctx'>  * @scmd:       SCSI command structure to restore</div><div class='ctx'>  * @ses:        saved information from a coresponding call to scsi_eh_prep_cmnd</div><div class='ctx'>  *</div><div class='hunk'>@@ -762,7 +762,7 @@ void scsi_eh_restore_cmnd(struct scsi_cmnd* scmd, struct scsi_eh_save *ses)</div><div class='ctx'> EXPORT_SYMBOL(scsi_eh_restore_cmnd);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * scsi_send_eh_cmnd  - submit a scsi command as part of error recory</div><div class='add'>+ * scsi_send_eh_cmnd  - submit a scsi command as part of error recovery</div><div class='ctx'>  * @scmd:       SCSI command structure to hijack</div><div class='ctx'>  * @cmnd:       CDB to send</div><div class='ctx'>  * @cmnd_size:  size in bytes of @cmnd</div><div class='head'>diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c<br/>index ead6405f3e51..6dfb9785d345 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/scsi_lib.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/scsi_lib.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/scsi_lib.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_lib.c</a></div><div class='hunk'>@@ -1378,16 +1378,19 @@ static int scsi_lld_busy(struct request_queue *q)</div><div class='ctx'> {</div><div class='ctx'> 	struct scsi_device *sdev = q-&gt;queuedata;</div><div class='ctx'> 	struct Scsi_Host *shost;</div><div class='del'>-	struct scsi_target *starget;</div><div class='ctx'> </div><div class='ctx'> 	if (!sdev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	shost = sdev-&gt;host;</div><div class='del'>-	starget = scsi_target(sdev);</div><div class='ctx'> </div><div class='del'>-	if (scsi_host_in_recovery(shost) || scsi_host_is_busy(shost) ||</div><div class='del'>-	    scsi_target_is_busy(starget) || scsi_device_is_busy(sdev))</div><div class='add'>+	/*</div><div class='add'>+	 * Ignore host/starget busy state.</div><div class='add'>+	 * Since block layer does not have a concept of fairness across</div><div class='add'>+	 * multiple queues, congestion of host/starget needs to be handled</div><div class='add'>+	 * in SCSI layer.</div><div class='add'>+	 */</div><div class='add'>+	if (scsi_host_in_recovery(shost) || scsi_device_is_busy(sdev))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1638,7 +1641,7 @@ struct request_queue *__scsi_alloc_queue(struct Scsi_Host *shost,</div><div class='ctx'> 					 request_fn_proc *request_fn)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_queue *q;</div><div class='del'>-	struct device *dev = shost-&gt;shost_gendev.parent;</div><div class='add'>+	struct device *dev = shost-&gt;dma_dev;</div><div class='ctx'> </div><div class='ctx'> 	q = blk_init_queue(request_fn, NULL);</div><div class='ctx'> 	if (!q)</div><div class='hunk'>@@ -2348,10 +2351,14 @@ EXPORT_SYMBOL(scsi_device_quiesce);</div><div class='ctx'>  *</div><div class='ctx'>  *	Must be called with user context, may sleep.</div><div class='ctx'>  */</div><div class='del'>-void</div><div class='del'>-scsi_device_resume(struct scsi_device *sdev)</div><div class='add'>+void scsi_device_resume(struct scsi_device *sdev)</div><div class='ctx'> {</div><div class='del'>-	if(scsi_device_set_state(sdev, SDEV_RUNNING))</div><div class='add'>+	/* check if the device state was mutated prior to resume, and if</div><div class='add'>+	 * so assume the state is being managed elsewhere (for example</div><div class='add'>+	 * device deleted during suspend)</div><div class='add'>+	 */</div><div class='add'>+	if (sdev-&gt;sdev_state != SDEV_QUIESCE ||</div><div class='add'>+	    scsi_device_set_state(sdev, SDEV_RUNNING))</div><div class='ctx'> 		return;</div><div class='ctx'> 	scsi_run_queue(sdev-&gt;request_queue);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/scsi/scsi_pm.c b/drivers/scsi/scsi_pm.c<br/>index c4670642d023..d4201ded3b22 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/scsi_pm.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/scsi_pm.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/scsi_pm.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_pm.c</a></div><div class='hunk'>@@ -24,8 +24,11 @@ static int scsi_dev_type_suspend(struct device *dev, pm_message_t msg)</div><div class='ctx'> 	err = scsi_device_quiesce(to_scsi_device(dev));</div><div class='ctx'> 	if (err == 0) {</div><div class='ctx'> 		drv = dev-&gt;driver;</div><div class='del'>-		if (drv &amp;&amp; drv-&gt;suspend)</div><div class='add'>+		if (drv &amp;&amp; drv-&gt;suspend) {</div><div class='ctx'> 			err = drv-&gt;suspend(dev, msg);</div><div class='add'>+			if (err)</div><div class='add'>+				scsi_device_resume(to_scsi_device(dev));</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	dev_dbg(dev, "scsi suspend: %d\n", err);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -97,7 +100,7 @@ static int scsi_bus_prepare(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	if (scsi_is_sdev_device(dev)) {</div><div class='ctx'> 		/* sd probing uses async_schedule.  Wait until it finishes. */</div><div class='del'>-		async_synchronize_full();</div><div class='add'>+		async_synchronize_full_domain(&amp;scsi_sd_probe_domain);</div><div class='ctx'> </div><div class='ctx'> 	} else if (scsi_is_host_device(dev)) {</div><div class='ctx'> 		/* Wait until async scanning is finished */</div><div class='head'>diff --git a/drivers/scsi/scsi_priv.h b/drivers/scsi/scsi_priv.h<br/>index be4fa6d179b1..07ce3f51701d 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/scsi_priv.h?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/scsi_priv.h</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/scsi_priv.h?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_priv.h</a></div><div class='hunk'>@@ -163,6 +163,8 @@ static inline int scsi_autopm_get_host(struct Scsi_Host *h) { return 0; }</div><div class='ctx'> static inline void scsi_autopm_put_host(struct Scsi_Host *h) {}</div><div class='ctx'> #endif /* CONFIG_PM_RUNTIME */</div><div class='ctx'> </div><div class='add'>+extern struct list_head scsi_sd_probe_domain;</div><div class='add'>+</div><div class='ctx'> /* </div><div class='ctx'>  * internal scsi timeout functions: for use by mid-layer and transport</div><div class='ctx'>  * classes.</div><div class='head'>diff --git a/drivers/scsi/scsi_scan.c b/drivers/scsi/scsi_scan.c<br/>index 01b03744f1f9..2e5fe584aad3 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/scsi_scan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/scsi_scan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/scsi_scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_scan.c</a></div><div class='hunk'>@@ -147,7 +147,7 @@ int scsi_complete_async_scans(void)</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		if (list_empty(&amp;scanning_hosts))</div><div class='del'>-			return 0;</div><div class='add'>+			goto out;</div><div class='ctx'> 		/* If we can't get memory immediately, that's OK.  Just</div><div class='ctx'> 		 * sleep a little.  Even if we never get memory, the async</div><div class='ctx'> 		 * scans will finish eventually.</div><div class='hunk'>@@ -179,8 +179,11 @@ int scsi_complete_async_scans(void)</div><div class='ctx'> 	}</div><div class='ctx'>  done:</div><div class='ctx'> 	spin_unlock(&amp;async_scan_lock);</div><div class='del'>-</div><div class='ctx'> 	kfree(data);</div><div class='add'>+</div><div class='add'>+ out:</div><div class='add'>+	async_synchronize_full_domain(&amp;scsi_sd_probe_domain);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c<br/>index 80fbe2ac0b47..579760420d53 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/scsi_transport_fc.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/scsi_transport_fc.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/scsi_transport_fc.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_transport_fc.c</a></div><div class='hunk'>@@ -2808,17 +2808,20 @@ fc_remote_port_add(struct Scsi_Host *shost, int channel,</div><div class='ctx'> 						  FC_RPORT_DEVLOSS_PENDING |</div><div class='ctx'> 						  FC_RPORT_DEVLOSS_CALLBK_DONE);</div><div class='ctx'> </div><div class='add'>+				spin_unlock_irqrestore(shost-&gt;host_lock, flags);</div><div class='add'>+</div><div class='ctx'> 				/* if target, initiate a scan */</div><div class='ctx'> 				if (rport-&gt;scsi_target_id != -1) {</div><div class='add'>+					scsi_target_unblock(&amp;rport-&gt;dev);</div><div class='add'>+</div><div class='add'>+					spin_lock_irqsave(shost-&gt;host_lock,</div><div class='add'>+							  flags);</div><div class='ctx'> 					rport-&gt;flags |= FC_RPORT_SCAN_PENDING;</div><div class='ctx'> 					scsi_queue_work(shost,</div><div class='ctx'> 							&amp;rport-&gt;scan_work);</div><div class='ctx'> 					spin_unlock_irqrestore(shost-&gt;host_lock,</div><div class='ctx'> 							flags);</div><div class='del'>-					scsi_target_unblock(&amp;rport-&gt;dev);</div><div class='del'>-				} else</div><div class='del'>-					spin_unlock_irqrestore(shost-&gt;host_lock,</div><div class='del'>-							flags);</div><div class='add'>+				}</div><div class='ctx'> </div><div class='ctx'> 				fc_bsg_goose_queue(rport);</div><div class='ctx'> </div><div class='hunk'>@@ -2876,16 +2879,17 @@ fc_remote_port_add(struct Scsi_Host *shost, int channel,</div><div class='ctx'> 			if (fci-&gt;f-&gt;dd_fcrport_size)</div><div class='ctx'> 				memset(rport-&gt;dd_data, 0,</div><div class='ctx'> 						fci-&gt;f-&gt;dd_fcrport_size);</div><div class='add'>+			spin_unlock_irqrestore(shost-&gt;host_lock, flags);</div><div class='add'>+</div><div class='add'>+			if (ids-&gt;roles &amp; FC_PORT_ROLE_FCP_TARGET) {</div><div class='add'>+				scsi_target_unblock(&amp;rport-&gt;dev);</div><div class='ctx'> </div><div class='del'>-			if (rport-&gt;roles &amp; FC_PORT_ROLE_FCP_TARGET) {</div><div class='ctx'> 				/* initiate a scan of the target */</div><div class='add'>+				spin_lock_irqsave(shost-&gt;host_lock, flags);</div><div class='ctx'> 				rport-&gt;flags |= FC_RPORT_SCAN_PENDING;</div><div class='ctx'> 				scsi_queue_work(shost, &amp;rport-&gt;scan_work);</div><div class='ctx'> 				spin_unlock_irqrestore(shost-&gt;host_lock, flags);</div><div class='del'>-				scsi_target_unblock(&amp;rport-&gt;dev);</div><div class='del'>-			} else</div><div class='del'>-				spin_unlock_irqrestore(shost-&gt;host_lock, flags);</div><div class='del'>-</div><div class='add'>+			}</div><div class='ctx'> 			return rport;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3083,12 +3087,12 @@ fc_remote_port_rolechg(struct fc_rport  *rport, u32 roles)</div><div class='ctx'> 		/* ensure any stgt delete functions are done */</div><div class='ctx'> 		fc_flush_work(shost);</div><div class='ctx'> </div><div class='add'>+		scsi_target_unblock(&amp;rport-&gt;dev);</div><div class='ctx'> 		/* initiate a scan of the target */</div><div class='ctx'> 		spin_lock_irqsave(shost-&gt;host_lock, flags);</div><div class='ctx'> 		rport-&gt;flags |= FC_RPORT_SCAN_PENDING;</div><div class='ctx'> 		scsi_queue_work(shost, &amp;rport-&gt;scan_work);</div><div class='ctx'> 		spin_unlock_irqrestore(shost-&gt;host_lock, flags);</div><div class='del'>-		scsi_target_unblock(&amp;rport-&gt;dev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(fc_remote_port_rolechg);</div><div class='head'>diff --git a/drivers/scsi/scsi_transport_spi.c b/drivers/scsi/scsi_transport_spi.c<br/>index a2715c31e754..cf08071a9b6e 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/scsi_transport_spi.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/scsi_transport_spi.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/scsi_transport_spi.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_transport_spi.c</a></div><div class='hunk'>@@ -1010,10 +1010,10 @@ spi_dv_device(struct scsi_device *sdev)</div><div class='ctx'> 	u8 *buffer;</div><div class='ctx'> 	const int len = SPI_MAX_ECHO_BUFFER_SIZE*2;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(scsi_device_get(sdev)))</div><div class='add'>+	if (unlikely(spi_dv_in_progress(starget)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(spi_dv_in_progress(starget)))</div><div class='add'>+	if (unlikely(scsi_device_get(sdev)))</div><div class='ctx'> 		return;</div><div class='ctx'> 	spi_dv_in_progress(starget) = 1;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/scsi/scsi_wait_scan.c b/drivers/scsi/scsi_wait_scan.c<br/>index 74708fcaf82f..ae7814874618 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/scsi_wait_scan.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/scsi_wait_scan.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/scsi_wait_scan.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/scsi_wait_scan.c</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;scsi/scsi_scan.h&gt;</div><div class='add'>+#include "scsi_priv.h"</div><div class='ctx'> </div><div class='ctx'> static int __init wait_scan_init(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c<br/>index 5ba5c2a9e8e9..6f0a4c612b3b 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/sd.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/sd.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/sd.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/sd.c</a></div><div class='hunk'>@@ -65,6 +65,7 @@</div><div class='ctx'> #include &lt;scsi/scsicam.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "sd.h"</div><div class='add'>+#include "scsi_priv.h"</div><div class='ctx'> #include "scsi_logging.h"</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Eric Youngdale");</div><div class='hunk'>@@ -2722,7 +2723,7 @@ static int sd_probe(struct device *dev)</div><div class='ctx'> 	dev_set_drvdata(dev, sdkp);</div><div class='ctx'> </div><div class='ctx'> 	get_device(&amp;sdkp-&gt;dev);	/* prevent release before async_schedule */</div><div class='del'>-	async_schedule(sd_probe_async, sdkp);</div><div class='add'>+	async_schedule_domain(sd_probe_async, sdkp, &amp;scsi_sd_probe_domain);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2756,7 +2757,7 @@ static int sd_remove(struct device *dev)</div><div class='ctx'> 	sdkp = dev_get_drvdata(dev);</div><div class='ctx'> 	scsi_autopm_get_device(sdkp-&gt;device);</div><div class='ctx'> </div><div class='del'>-	async_synchronize_full();</div><div class='add'>+	async_synchronize_full_domain(&amp;scsi_sd_probe_domain);</div><div class='ctx'> 	blk_queue_prep_rq(sdkp-&gt;device-&gt;request_queue, scsi_prep_fn);</div><div class='ctx'> 	blk_queue_unprep_rq(sdkp-&gt;device-&gt;request_queue, NULL);</div><div class='ctx'> 	device_del(&amp;sdkp-&gt;dev);</div><div class='head'>diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c<br/>index eacd46bb36b9..9c5c5f2b3962 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/sg.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/sg.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/sg.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/sg.c</a></div><div class='hunk'>@@ -104,7 +104,7 @@ static int scatter_elem_sz_prev = SG_SCATTER_SZ;</div><div class='ctx'> static int sg_add(struct device *, struct class_interface *);</div><div class='ctx'> static void sg_remove(struct device *, struct class_interface *);</div><div class='ctx'> </div><div class='del'>-static DEFINE_MUTEX(sg_mutex);</div><div class='add'>+static DEFINE_SPINLOCK(sg_open_exclusive_lock);</div><div class='ctx'> </div><div class='ctx'> static DEFINE_IDR(sg_index_idr);</div><div class='ctx'> static DEFINE_RWLOCK(sg_index_lock);	/* Also used to lock</div><div class='hunk'>@@ -137,13 +137,15 @@ typedef struct sg_request {	/* SG_MAX_QUEUE requests outstanding per file */</div><div class='ctx'> 	char res_used;		/* 1 -&gt; using reserve buffer, 0 -&gt; not ... */</div><div class='ctx'> 	char orphan;		/* 1 -&gt; drop on sight, 0 -&gt; normal */</div><div class='ctx'> 	char sg_io_owned;	/* 1 -&gt; packet belongs to SG_IO */</div><div class='del'>-	volatile char done;	/* 0-&gt;before bh, 1-&gt;before read, 2-&gt;read */</div><div class='add'>+	/* done protected by rq_list_lock */</div><div class='add'>+	char done;		/* 0-&gt;before bh, 1-&gt;before read, 2-&gt;read */</div><div class='ctx'> 	struct request *rq;</div><div class='ctx'> 	struct bio *bio;</div><div class='ctx'> 	struct execute_work ew;</div><div class='ctx'> } Sg_request;</div><div class='ctx'> </div><div class='ctx'> typedef struct sg_fd {		/* holds the state of a file descriptor */</div><div class='add'>+	/* sfd_siblings is protected by sg_index_lock */</div><div class='ctx'> 	struct list_head sfd_siblings;</div><div class='ctx'> 	struct sg_device *parentdp;	/* owning device */</div><div class='ctx'> 	wait_queue_head_t read_wait;	/* queue read until command done */</div><div class='hunk'>@@ -157,7 +159,6 @@ typedef struct sg_fd {		/* holds the state of a file descriptor */</div><div class='ctx'> 	Sg_request req_arr[SG_MAX_QUEUE];	/* used as singly-linked list */</div><div class='ctx'> 	char low_dma;		/* as in parent but possibly overridden to 1 */</div><div class='ctx'> 	char force_packid;	/* 1 -&gt; pack_id input to read(), 0 -&gt; ignored */</div><div class='del'>-	volatile char closed;	/* 1 -&gt; fd closed but request(s) outstanding */</div><div class='ctx'> 	char cmd_q;		/* 1 -&gt; allow command queuing, 0 -&gt; don't */</div><div class='ctx'> 	char next_cmd_len;	/* 0 -&gt; automatic (def), &gt;0 -&gt; use on next write() */</div><div class='ctx'> 	char keep_orphan;	/* 0 -&gt; drop orphan (def), 1 -&gt; keep for read() */</div><div class='hunk'>@@ -171,9 +172,11 @@ typedef struct sg_device { /* holds the state of each scsi generic device */</div><div class='ctx'> 	wait_queue_head_t o_excl_wait;	/* queue open() when O_EXCL in use */</div><div class='ctx'> 	int sg_tablesize;	/* adapter's max scatter-gather table size */</div><div class='ctx'> 	u32 index;		/* device index number */</div><div class='add'>+	/* sfds is protected by sg_index_lock */</div><div class='ctx'> 	struct list_head sfds;</div><div class='ctx'> 	volatile char detached;	/* 0-&gt;attached, 1-&gt;detached pending removal */</div><div class='del'>-	volatile char exclude;	/* opened for exclusive access */</div><div class='add'>+	/* exclude protected by sg_open_exclusive_lock */</div><div class='add'>+	char exclude;		/* opened for exclusive access */</div><div class='ctx'> 	char sgdebug;		/* 0-&gt;off, 1-&gt;sense, 9-&gt;dump dev, 10-&gt; all devs */</div><div class='ctx'> 	struct gendisk *disk;</div><div class='ctx'> 	struct cdev * cdev;	/* char_dev [sysfs: /sys/cdev/major/sg&lt;n&gt;] */</div><div class='hunk'>@@ -221,6 +224,38 @@ static int sg_allow_access(struct file *filp, unsigned char *cmd)</div><div class='ctx'> 	return blk_verify_command(cmd, filp-&gt;f_mode &amp; FMODE_WRITE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int get_exclude(Sg_device *sdp)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;sg_open_exclusive_lock, flags);</div><div class='add'>+	ret = sdp-&gt;exclude;</div><div class='add'>+	spin_unlock_irqrestore(&amp;sg_open_exclusive_lock, flags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_exclude(Sg_device *sdp, char val)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;sg_open_exclusive_lock, flags);</div><div class='add'>+	sdp-&gt;exclude = val;</div><div class='add'>+	spin_unlock_irqrestore(&amp;sg_open_exclusive_lock, flags);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sfds_list_empty(Sg_device *sdp)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	read_lock_irqsave(&amp;sg_index_lock, flags);</div><div class='add'>+	ret = list_empty(&amp;sdp-&gt;sfds);</div><div class='add'>+	read_unlock_irqrestore(&amp;sg_index_lock, flags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> sg_open(struct inode *inode, struct file *filp)</div><div class='ctx'> {</div><div class='hunk'>@@ -232,7 +267,6 @@ sg_open(struct inode *inode, struct file *filp)</div><div class='ctx'> 	int res;</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;sg_mutex);</div><div class='ctx'> 	nonseekable_open(inode, filp);</div><div class='ctx'> 	SCSI_LOG_TIMEOUT(3, printk("sg_open: dev=%d, flags=0x%x\n", dev, flags));</div><div class='ctx'> 	sdp = sg_get_dev(dev);</div><div class='hunk'>@@ -264,25 +298,22 @@ sg_open(struct inode *inode, struct file *filp)</div><div class='ctx'> 			retval = -EPERM; /* Can't lock it with read only access */</div><div class='ctx'> 			goto error_out;</div><div class='ctx'> 		}</div><div class='del'>-		if (!list_empty(&amp;sdp-&gt;sfds) &amp;&amp; (flags &amp; O_NONBLOCK)) {</div><div class='add'>+		if (!sfds_list_empty(sdp) &amp;&amp; (flags &amp; O_NONBLOCK)) {</div><div class='ctx'> 			retval = -EBUSY;</div><div class='ctx'> 			goto error_out;</div><div class='ctx'> 		}</div><div class='del'>-		res = 0;</div><div class='del'>-		__wait_event_interruptible(sdp-&gt;o_excl_wait,</div><div class='del'>-					   ((!list_empty(&amp;sdp-&gt;sfds) || sdp-&gt;exclude) ? 0 : (sdp-&gt;exclude = 1)), res);</div><div class='add'>+		res = wait_event_interruptible(sdp-&gt;o_excl_wait,</div><div class='add'>+					   ((!sfds_list_empty(sdp) || get_exclude(sdp)) ? 0 : set_exclude(sdp, 1)));</div><div class='ctx'> 		if (res) {</div><div class='ctx'> 			retval = res;	/* -ERESTARTSYS because signal hit process */</div><div class='ctx'> 			goto error_out;</div><div class='ctx'> 		}</div><div class='del'>-	} else if (sdp-&gt;exclude) {	/* some other fd has an exclusive lock on dev */</div><div class='add'>+	} else if (get_exclude(sdp)) {	/* some other fd has an exclusive lock on dev */</div><div class='ctx'> 		if (flags &amp; O_NONBLOCK) {</div><div class='ctx'> 			retval = -EBUSY;</div><div class='ctx'> 			goto error_out;</div><div class='ctx'> 		}</div><div class='del'>-		res = 0;</div><div class='del'>-		__wait_event_interruptible(sdp-&gt;o_excl_wait, (!sdp-&gt;exclude),</div><div class='del'>-					   res);</div><div class='add'>+		res = wait_event_interruptible(sdp-&gt;o_excl_wait, !get_exclude(sdp));</div><div class='ctx'> 		if (res) {</div><div class='ctx'> 			retval = res;	/* -ERESTARTSYS because signal hit process */</div><div class='ctx'> 			goto error_out;</div><div class='hunk'>@@ -292,7 +323,7 @@ sg_open(struct inode *inode, struct file *filp)</div><div class='ctx'> 		retval = -ENODEV;</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> 	}</div><div class='del'>-	if (list_empty(&amp;sdp-&gt;sfds)) {	/* no existing opens on this device */</div><div class='add'>+	if (sfds_list_empty(sdp)) {	/* no existing opens on this device */</div><div class='ctx'> 		sdp-&gt;sgdebug = 0;</div><div class='ctx'> 		q = sdp-&gt;device-&gt;request_queue;</div><div class='ctx'> 		sdp-&gt;sg_tablesize = queue_max_segments(q);</div><div class='hunk'>@@ -301,7 +332,7 @@ sg_open(struct inode *inode, struct file *filp)</div><div class='ctx'> 		filp-&gt;private_data = sfp;</div><div class='ctx'> 	else {</div><div class='ctx'> 		if (flags &amp; O_EXCL) {</div><div class='del'>-			sdp-&gt;exclude = 0;	/* undo if error */</div><div class='add'>+			set_exclude(sdp, 0);	/* undo if error */</div><div class='ctx'> 			wake_up_interruptible(&amp;sdp-&gt;o_excl_wait);</div><div class='ctx'> 		}</div><div class='ctx'> 		retval = -ENOMEM;</div><div class='hunk'>@@ -317,7 +348,6 @@ sdp_put:</div><div class='ctx'> sg_put:</div><div class='ctx'> 	if (sdp)</div><div class='ctx'> 		sg_put_dev(sdp);</div><div class='del'>-	mutex_unlock(&amp;sg_mutex);</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -332,9 +362,7 @@ sg_release(struct inode *inode, struct file *filp)</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	SCSI_LOG_TIMEOUT(3, printk("sg_release: %s\n", sdp-&gt;disk-&gt;disk_name));</div><div class='ctx'> </div><div class='del'>-	sfp-&gt;closed = 1;</div><div class='del'>-</div><div class='del'>-	sdp-&gt;exclude = 0;</div><div class='add'>+	set_exclude(sdp, 0);</div><div class='ctx'> 	wake_up_interruptible(&amp;sdp-&gt;o_excl_wait);</div><div class='ctx'> </div><div class='ctx'> 	scsi_autopm_put_device(sdp-&gt;device);</div><div class='hunk'>@@ -398,19 +426,14 @@ sg_read(struct file *filp, char __user *buf, size_t count, loff_t * ppos)</div><div class='ctx'> 			retval = -EAGAIN;</div><div class='ctx'> 			goto free_old_hdr;</div><div class='ctx'> 		}</div><div class='del'>-		while (1) {</div><div class='del'>-			retval = 0; /* following macro beats race condition */</div><div class='del'>-			__wait_event_interruptible(sfp-&gt;read_wait,</div><div class='del'>-				(sdp-&gt;detached ||</div><div class='del'>-				(srp = sg_get_rq_mark(sfp, req_pack_id))), </div><div class='del'>-				retval);</div><div class='del'>-			if (sdp-&gt;detached) {</div><div class='del'>-				retval = -ENODEV;</div><div class='del'>-				goto free_old_hdr;</div><div class='del'>-			}</div><div class='del'>-			if (0 == retval)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='add'>+		retval = wait_event_interruptible(sfp-&gt;read_wait,</div><div class='add'>+			(sdp-&gt;detached ||</div><div class='add'>+			(srp = sg_get_rq_mark(sfp, req_pack_id))));</div><div class='add'>+		if (sdp-&gt;detached) {</div><div class='add'>+			retval = -ENODEV;</div><div class='add'>+			goto free_old_hdr;</div><div class='add'>+		}</div><div class='add'>+		if (retval) {</div><div class='ctx'> 			/* -ERESTARTSYS as signal hit process */</div><div class='ctx'> 			goto free_old_hdr;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -771,7 +794,18 @@ sg_common_write(Sg_fd * sfp, Sg_request * srp,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='add'>+static int srp_done(Sg_fd *sfp, Sg_request *srp)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	read_lock_irqsave(&amp;sfp-&gt;rq_list_lock, flags);</div><div class='add'>+	ret = srp-&gt;done;</div><div class='add'>+	read_unlock_irqrestore(&amp;sfp-&gt;rq_list_lock, flags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long</div><div class='ctx'> sg_ioctl(struct file *filp, unsigned int cmd_in, unsigned long arg)</div><div class='ctx'> {</div><div class='ctx'> 	void __user *p = (void __user *)arg;</div><div class='hunk'>@@ -791,40 +825,30 @@ sg_ioctl(struct file *filp, unsigned int cmd_in, unsigned long arg)</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd_in) {</div><div class='ctx'> 	case SG_IO:</div><div class='del'>-		{</div><div class='del'>-			int blocking = 1;	/* ignore O_NONBLOCK flag */</div><div class='del'>-</div><div class='del'>-			if (sdp-&gt;detached)</div><div class='del'>-				return -ENODEV;</div><div class='del'>-			if (!scsi_block_when_processing_errors(sdp-&gt;device))</div><div class='del'>-				return -ENXIO;</div><div class='del'>-			if (!access_ok(VERIFY_WRITE, p, SZ_SG_IO_HDR))</div><div class='del'>-				return -EFAULT;</div><div class='del'>-			result =</div><div class='del'>-			    sg_new_write(sfp, filp, p, SZ_SG_IO_HDR,</div><div class='del'>-					 blocking, read_only, 1, &amp;srp);</div><div class='del'>-			if (result &lt; 0)</div><div class='del'>-				return result;</div><div class='del'>-			while (1) {</div><div class='del'>-				result = 0;	/* following macro to beat race condition */</div><div class='del'>-				__wait_event_interruptible(sfp-&gt;read_wait,</div><div class='del'>-					(srp-&gt;done || sdp-&gt;detached),</div><div class='del'>-					result);</div><div class='del'>-				if (sdp-&gt;detached)</div><div class='del'>-					return -ENODEV;</div><div class='del'>-				write_lock_irq(&amp;sfp-&gt;rq_list_lock);</div><div class='del'>-				if (srp-&gt;done) {</div><div class='del'>-					srp-&gt;done = 2;</div><div class='del'>-					write_unlock_irq(&amp;sfp-&gt;rq_list_lock);</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='del'>-				srp-&gt;orphan = 1;</div><div class='del'>-				write_unlock_irq(&amp;sfp-&gt;rq_list_lock);</div><div class='del'>-				return result;	/* -ERESTARTSYS because signal hit process */</div><div class='del'>-			}</div><div class='add'>+		if (sdp-&gt;detached)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		if (!scsi_block_when_processing_errors(sdp-&gt;device))</div><div class='add'>+			return -ENXIO;</div><div class='add'>+		if (!access_ok(VERIFY_WRITE, p, SZ_SG_IO_HDR))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		result = sg_new_write(sfp, filp, p, SZ_SG_IO_HDR,</div><div class='add'>+				 1, read_only, 1, &amp;srp);</div><div class='add'>+		if (result &lt; 0)</div><div class='add'>+			return result;</div><div class='add'>+		result = wait_event_interruptible(sfp-&gt;read_wait,</div><div class='add'>+			(srp_done(sfp, srp) || sdp-&gt;detached));</div><div class='add'>+		if (sdp-&gt;detached)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		write_lock_irq(&amp;sfp-&gt;rq_list_lock);</div><div class='add'>+		if (srp-&gt;done) {</div><div class='add'>+			srp-&gt;done = 2;</div><div class='add'>+			write_unlock_irq(&amp;sfp-&gt;rq_list_lock);</div><div class='ctx'> 			result = sg_new_read(sfp, p, SZ_SG_IO_HDR, srp);</div><div class='ctx'> 			return (result &lt; 0) ? result : 0;</div><div class='ctx'> 		}</div><div class='add'>+		srp-&gt;orphan = 1;</div><div class='add'>+		write_unlock_irq(&amp;sfp-&gt;rq_list_lock);</div><div class='add'>+		return result;	/* -ERESTARTSYS because signal hit process */</div><div class='ctx'> 	case SG_SET_TIMEOUT:</div><div class='ctx'> 		result = get_user(val, ip);</div><div class='ctx'> 		if (result)</div><div class='hunk'>@@ -1091,18 +1115,6 @@ sg_ioctl(struct file *filp, unsigned int cmd_in, unsigned long arg)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static long</div><div class='del'>-sg_unlocked_ioctl(struct file *filp, unsigned int cmd_in, unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;sg_mutex);</div><div class='del'>-	ret = sg_ioctl(filp, cmd_in, arg);</div><div class='del'>-	mutex_unlock(&amp;sg_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='ctx'> static long sg_compat_ioctl(struct file *filp, unsigned int cmd_in, unsigned long arg)</div><div class='ctx'> {</div><div class='hunk'>@@ -1136,8 +1148,11 @@ sg_poll(struct file *filp, poll_table * wait)</div><div class='ctx'> 	int count = 0;</div><div class='ctx'> 	unsigned long iflags;</div><div class='ctx'> </div><div class='del'>-	if ((!(sfp = (Sg_fd *) filp-&gt;private_data)) || (!(sdp = sfp-&gt;parentdp))</div><div class='del'>-	    || sfp-&gt;closed)</div><div class='add'>+	sfp = filp-&gt;private_data;</div><div class='add'>+	if (!sfp)</div><div class='add'>+		return POLLERR;</div><div class='add'>+	sdp = sfp-&gt;parentdp;</div><div class='add'>+	if (!sdp)</div><div class='ctx'> 		return POLLERR;</div><div class='ctx'> 	poll_wait(filp, &amp;sfp-&gt;read_wait, wait);</div><div class='ctx'> 	read_lock_irqsave(&amp;sfp-&gt;rq_list_lock, iflags);</div><div class='hunk'>@@ -1347,7 +1362,7 @@ static const struct file_operations sg_fops = {</div><div class='ctx'> 	.read = sg_read,</div><div class='ctx'> 	.write = sg_write,</div><div class='ctx'> 	.poll = sg_poll,</div><div class='del'>-	.unlocked_ioctl = sg_unlocked_ioctl,</div><div class='add'>+	.unlocked_ioctl = sg_ioctl,</div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='ctx'> 	.compat_ioctl = sg_compat_ioctl,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -2312,7 +2327,7 @@ struct sg_proc_leaf {</div><div class='ctx'> 	const struct file_operations * fops;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct sg_proc_leaf sg_proc_leaf_arr[] = {</div><div class='add'>+static const struct sg_proc_leaf sg_proc_leaf_arr[] = {</div><div class='ctx'> 	{"allow_dio", &amp;adio_fops},</div><div class='ctx'> 	{"debug", &amp;debug_fops},</div><div class='ctx'> 	{"def_reserved_size", &amp;dressz_fops},</div><div class='hunk'>@@ -2332,7 +2347,7 @@ sg_proc_init(void)</div><div class='ctx'> 	if (!sg_proc_sgp)</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	for (k = 0; k &lt; num_leaves; ++k) {</div><div class='del'>-		struct sg_proc_leaf *leaf = &amp;sg_proc_leaf_arr[k];</div><div class='add'>+		const struct sg_proc_leaf *leaf = &amp;sg_proc_leaf_arr[k];</div><div class='ctx'> 		umode_t mask = leaf-&gt;fops-&gt;write ? S_IRUGO | S_IWUSR : S_IRUGO;</div><div class='ctx'> 		proc_create(leaf-&gt;name, mask, sg_proc_sgp, leaf-&gt;fops);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2533,9 +2548,9 @@ static void sg_proc_debug_helper(struct seq_file *s, Sg_device * sdp)</div><div class='ctx'> 			   fp-&gt;reserve.bufflen,</div><div class='ctx'> 			   (int) fp-&gt;reserve.k_use_sg,</div><div class='ctx'> 			   (int) fp-&gt;low_dma);</div><div class='del'>-		seq_printf(s, "   cmd_q=%d f_packid=%d k_orphan=%d closed=%d\n",</div><div class='add'>+		seq_printf(s, "   cmd_q=%d f_packid=%d k_orphan=%d closed=0\n",</div><div class='ctx'> 			   (int) fp-&gt;cmd_q, (int) fp-&gt;force_packid,</div><div class='del'>-			   (int) fp-&gt;keep_orphan, (int) fp-&gt;closed);</div><div class='add'>+			   (int) fp-&gt;keep_orphan);</div><div class='ctx'> 		for (m = 0, srp = fp-&gt;headrp;</div><div class='ctx'> 				srp != NULL;</div><div class='ctx'> 				++m, srp = srp-&gt;nextrp) {</div><div class='hunk'>@@ -2612,7 +2627,7 @@ static int sg_proc_seq_show_debug(struct seq_file *s, void *v)</div><div class='ctx'> 			     scsidp-&gt;lun,</div><div class='ctx'> 			     scsidp-&gt;host-&gt;hostt-&gt;emulated);</div><div class='ctx'> 		seq_printf(s, " sg_tablesize=%d excl=%d\n",</div><div class='del'>-			   sdp-&gt;sg_tablesize, sdp-&gt;exclude);</div><div class='add'>+			   sdp-&gt;sg_tablesize, get_exclude(sdp));</div><div class='ctx'> 		sg_proc_debug_helper(s, sdp);</div><div class='ctx'> 	}</div><div class='ctx'> 	read_unlock_irqrestore(&amp;sg_index_lock, iflags);</div><div class='head'>diff --git a/drivers/scsi/sim710.c b/drivers/scsi/sim710.c<br/>index 8ac6ce792b69..a318264a4ba1 100644<br/>--- a/<a href='/drm-misc/tree/drivers/scsi/sim710.c?id=f52c44cd27b4a0be37ef97f0466e4095ebebef3f'>drivers/scsi/sim710.c</a><br/>+++ b/<a href='/drm-misc/tree/drivers/scsi/sim710.c?id=66dd07b88a1c9d446f32253da606b87324fa620e'>drivers/scsi/sim710.c</a></div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'>  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='ctx'>  *----------------------------------------------------------------------------</div><div class='ctx'>  *</div><div class='del'>- * MCA card detection code by Trent McNair.</div><div class='add'>+ * MCA card detection code by Trent McNair. (now deleted)</div><div class='ctx'>  * Fixes to not explicitly nul bss data from Xavier Bestel.</div><div class='ctx'>  * Some multiboard fixes from Rolf Eike Beer.</div><div class='ctx'>  * Auto probing of EISA config space from Trevor Hemsley.</div><div class='hunk'>@@ -32,7 +32,6 @@</div><div class='ctx'> #include &lt;linux/blkdev.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/mca.h&gt;</div><div class='ctx'> #include &lt;linux/eisa.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'>